--- linux-fsl-imx51-2.6.31.orig/Makefile +++ linux-fsl-imx51-2.6.31/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 31 -EXTRAVERSION = +EXTRAVERSION = .12 NAME = Man-Eating Seals of Antiquity # *DOCUMENTATION* @@ -330,14 +330,23 @@ AFLAGS_KERNEL = CFLAGS_GCOV = -fprofile-arcs -ftest-coverage +# Prefer linux-backports-modules +ifneq ($(KBUILD_SRC),) +ifneq ($(shell if test -e $(KBUILD_OUTPUT)/ubuntu-build; then echo yes; fi),yes) +UBUNTUINCLUDE := -I/usr/src/linux-headers-lbm-$(KERNELRELEASE) +endif +endif # Use LINUXINCLUDE when you must reference the include/ directory. # Needed to be compatible with the O= option -LINUXINCLUDE := -Iinclude \ +LINUXINCLUDE := $(UBUNTUINCLUDE) -Iinclude \ $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \ -I$(srctree)/arch/$(hdr-arch)/include \ -include include/linux/autoconf.h +# UBUNTU: Include our third party driver stuff too +LINUXINCLUDE += -Iubuntu/include $(if $(KBUILD_SRC),-I$(srctree)/ubuntu/include) + KBUILD_CPPFLAGS := -D__KERNEL__ KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ @@ -462,12 +471,12 @@ # Carefully list dependencies so we do not try to build scripts twice # in parallel PHONY += scripts -scripts: scripts_basic include/config/auto.conf +scripts: scripts_basic include/config/auto.conf include/config/tristate.conf $(Q)$(MAKE) $(build)=$(@) # Objects we will link into vmlinux / subdirs we need to visit init-y := init/ -drivers-y := drivers/ sound/ firmware/ +drivers-y := drivers/ sound/ firmware/ ubuntu/ net-y := net/ libs-y := lib/ core-y := usr/ @@ -489,7 +498,7 @@ # with it and forgot to run make oldconfig. # if auto.conf.cmd is missing then we are probably in a cleaned tree so # we execute the config step to be sure to catch updated Kconfig files -include/config/auto.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd +include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd $(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig else # external modules needs include/linux/autoconf.h and include/config/auto.conf @@ -871,6 +880,9 @@ PHONY += $(vmlinux-dirs) $(vmlinux-dirs): prepare scripts $(Q)$(MAKE) $(build)=$@ +ifdef CONFIG_MODULES + $(Q)$(MAKE) $(modbuiltin)=$@ +endif # Build the kernel release string # @@ -980,11 +992,6 @@ # All the preparing.. prepare: prepare0 -# Leave this as default for preprocessing vmlinux.lds.S, which is now -# done in arch/$(ARCH)/kernel/Makefile - -export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH) - # The asm symlink changes when $(ARCH) changes. # Detect this and ask user to run make mrproper # If asm is a stale symlink (point to dir that does not exist) remove it @@ -1126,6 +1133,7 @@ PHONY += modules modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order + $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.builtin) > $(objtree)/modules.builtin @$(kecho) ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild @@ -1155,6 +1163,7 @@ ln -s $(objtree) $(MODLIB)/build ; \ fi @cp -f $(objtree)/modules.order $(MODLIB)/ + @cp -f $(objtree)/modules.builtin $(MODLIB)/ $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst # This depmod is only for convenience to give the initial @@ -1218,6 +1227,7 @@ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ -o -name '*.symtypes' -o -name 'modules.order' \ -o -name 'Module.markers' -o -name '.tmp_*.o.*' \ + -o -name 'modules.builtin' \ -o -name '*.gcno' \) -type f -print | xargs rm -f # mrproper - Delete all generated files, including .config @@ -1416,7 +1426,8 @@ clean: rm-dirs := $(MODVERDIR) clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \ $(KBUILD_EXTMOD)/Module.markers \ - $(KBUILD_EXTMOD)/modules.order + $(KBUILD_EXTMOD)/modules.order \ + $(KBUILD_EXTMOD)/modules.builtin clean: $(clean-dirs) $(call cmd,rmdirs) $(call cmd,rmfiles) --- linux-fsl-imx51-2.6.31.orig/MAINTAINERS +++ linux-fsl-imx51-2.6.31/MAINTAINERS @@ -897,6 +897,12 @@ S: Maintained F: drivers/net/wireless/ath/ar9170/ +ATK0110 HWMON DRIVER +M: Luca Tettamanti +L: lm-sensors@lm-sensors.org +S: Maintained +F: drivers/hwmon/asus_atk0110.c + ATI_REMOTE2 DRIVER M: Ville Syrjala S: Maintained @@ -1986,7 +1992,7 @@ F: fs/* FINTEK F75375S HARDWARE MONITOR AND FAN CONTROLLER DRIVER -M: Riku Voipio +M: Riku Voipio L: lm-sensors@lm-sensors.org S: Maintained F: drivers/hwmon/f75375s.c --- linux-fsl-imx51-2.6.31.orig/sound/mips/sgio2audio.c +++ linux-fsl-imx51-2.6.31/sound/mips/sgio2audio.c @@ -609,7 +609,7 @@ /* alloc virtual 'dma' area */ if (runtime->dma_area) vfree(runtime->dma_area); - runtime->dma_area = vmalloc(size); + runtime->dma_area = vmalloc_user(size); if (runtime->dma_area == NULL) return -ENOMEM; runtime->dma_bytes = size; --- linux-fsl-imx51-2.6.31.orig/sound/arm/mxc-alsa-mixer.c +++ linux-fsl-imx51-2.6.31/sound/arm/mxc-alsa-mixer.c @@ -0,0 +1,410 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file mxc-alsa-mixer.c + * @brief this file implements the mxc sound driver mixer interface for ALSA. + * The mxc sound driver supports mono/stereo recording (there are + * some limitations due to hardware), mono/stereo playback and + * audio mixing. This file implements output switching, volume/balance controls + * mono adder config, I/P dev switching and gain on the PCM streams. + * Recording supports 8000 khz and 16000 khz sample rate. + * Playback supports 8000, 11025, 16000, 22050, 24000, 32000, + * 44100 and 48000 khz for mono and stereo. + * + * @ingroup SOUND_DRV + */ + +#include +#include +#include +#include +#include +#include +#include "mxc-alsa-common.h" +/*! + * These are the functions implemented in the ALSA PCM driver that + * are used for mixer operations + * + */ + +/*! + * These are the callback functions for mixer controls + * + */ +/* Output device control*/ +static int pmic_mixer_output_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 15; + uinfo->value.integer.step = 1; + return 0; +} +static int pmic_mixer_output_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int dev, i; + dev = uvalue->value.integer.value[0]; + for (i = OP_EARPIECE; i < OP_MAXDEV; i++) { + if (dev & (1 << i)) { + set_mixer_output_device(NULL, MIXER_OUT, i, 1); + } else { + set_mixer_output_device(NULL, MIXER_OUT, i, 0); + } + } + return 0; +} +static int pmic_mixer_output_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int val, ret = 0, i = 0; + for (i = OP_EARPIECE; i < OP_MAXDEV; i++) { + val = get_mixer_output_device(); + if (val & SOUND_MASK_PHONEOUT) + ret = ret | 1; + if (val & SOUND_MASK_SPEAKER) + ret = ret | 2; + if (val & SOUND_MASK_VOLUME) + ret = ret | 4; + if (val & SOUND_MASK_PCM) + ret = ret | 8; + uvalue->value.integer.value[0] = ret; + } + return 0; + +} + +/* Input gain control*/ +static int pmic_cap_volume_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 100; + uinfo->value.integer.step = 1; + return 0; +} +static int pmic_cap_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int val; + val = get_mixer_input_gain(); + val = val & 0xFF; + uvalue->value.integer.value[0] = val; + return 0; +} + +static int pmic_cap_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + + int vol; + vol = uvalue->value.integer.value[0]; + vol = vol | (vol << 8); + set_mixer_input_gain(NULL, vol); + return 0; +} + +/* Mono adder control*/ +static int pmic_pb_monoconfig_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 3; + uinfo->value.integer.step = 1; + return 0; +} +static int pmic_pb_monoconfig_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int mono; + mono = uvalue->value.integer.value[0]; + set_mixer_output_mono_adder(mono); + return 0; +} +static int pmic_pb_monoconfig_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + uvalue->value.integer.value[0] = get_mixer_output_mono_adder(); + return 0; +} + +/*! + * These are the ALSA control structures with init values + * + */ + +/* Input device control*/ +static int pmic_cap_input_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 7; + uinfo->value.integer.step = 1; + return 0; +} +static int pmic_cap_input_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int dev, i; + dev = uvalue->value.integer.value[0]; + for (i = IP_HANDSET; i < IP_MAXDEV; i++) { + if (dev & (1 << i)) { + set_mixer_input_device(NULL, i, 1); + } else { + set_mixer_input_device(NULL, i, 0); + } + } + return 0; +} +static int pmic_cap_input_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int val, ret = 0, i = 0; + for (i = IP_HANDSET; i < IP_MAXDEV; i++) { + val = get_mixer_input_device(); + if (val & SOUND_MASK_PHONEIN) + ret = ret | 1; + if (val & SOUND_MASK_MIC) + ret = ret | 2; + if (val & SOUND_MASK_LINE) + ret = ret | 4; + uvalue->value.integer.value[0] = ret; + } + return 0; +} + +/* Volume control*/ +static int pmic_pb_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int volume; + volume = uvalue->value.integer.value[0]; + volume = volume | (volume << 8); + set_mixer_output_volume(NULL, volume, OP_NODEV); + return 0; +} +static int pmic_pb_volume_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 1; + uinfo->value.integer.max = 100; + uinfo->value.integer.step = 1; + return 0; +} + +static int pmic_pb_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int val; + val = get_mixer_output_volume(); + val = val & 0xFF; + uvalue->value.integer.value[0] = val; + return 0; +} + +/* Balance control start */ +static int pmic_pb_balance_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 100; + uinfo->value.integer.step = 1; + return 0; +} + +static int pmic_pb_balance_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + uvalue->value.integer.value[0] = get_mixer_output_balance(); + return 0; + +} +static int pmic_pb_balance_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int bal; + bal = uvalue->value.integer.value[0]; + set_mixer_output_balance(bal); + return 0; +} + +/* Balance control end */ + +/* loopback control start */ +static int pmic_loopback_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + return 0; +} + +static int pmic_loopback_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + uvalue->value.integer.value[0] = kcontrol->private_value; + return 0; + +} +static int pmic_loopback_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + int changed; + long flag = uvalue->value.integer.value[0]; + changed = + (uvalue->value.integer.value[0] == kcontrol->private_value) ? 0 : 1; + kcontrol->private_value = uvalue->value.integer.value[0]; + if (flag) + pmic_audio_fm_output_enable(true); + else + pmic_audio_fm_output_enable(false); + + return changed; +} + +/* Loopback control end */ + +/* Kcontrol structure definitions */ +struct snd_kcontrol_new pmic_control_pb_vol __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Playback Volume", + .index = 0x00, + .info = pmic_pb_volume_info, + .get = pmic_pb_volume_get, + .put = pmic_pb_volume_put, + .private_value = 0xffab1, +}; + +struct snd_kcontrol_new pmic_control_pb_bal __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Balance Playback Volume", + .index = 0x00, + .info = pmic_pb_balance_info, + .get = pmic_pb_balance_get, + .put = pmic_pb_balance_put, + .private_value = 0xffab2, +}; +struct snd_kcontrol_new pmic_control_pb_monoconfig __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Monoconfig Playback Volume", + .index = 0x00, + .info = pmic_pb_monoconfig_info, + .get = pmic_pb_monoconfig_get, + .put = pmic_pb_monoconfig_put, + .private_value = 0xffab2, +}; +struct snd_kcontrol_new pmic_control_op_sw __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Output Playback Volume", + .index = 0x00, + .info = pmic_mixer_output_info, + .get = pmic_mixer_output_get, + .put = pmic_mixer_output_put, + .private_value = 0xffab4, +}; + +struct snd_kcontrol_new pmic_control_cap_vol __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Capture Volume", + .index = 0x00, + .info = pmic_cap_volume_info, + .get = pmic_cap_volume_get, + .put = pmic_cap_volume_put, + .private_value = 0xffab5, +}; +struct snd_kcontrol_new pmic_control_ip_sw __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Input Capture Volume", + .index = 0x00, + .info = pmic_cap_input_info, + .get = pmic_cap_input_get, + .put = pmic_cap_input_put, + .private_value = 0xffab5, +}; + +struct snd_kcontrol_new pmic_control_loop_out __devinitdata = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Loopback Line-in", + .index = 0x00, + .info = pmic_loopback_info, + .get = pmic_loopback_get, + .put = pmic_loopback_put, + .private_value = 0, +}; + +/*! + * This function registers the control components of ALSA Mixer + * It is called by ALSA PCM init. + * + * @param card pointer to the ALSA sound card structure. + * + * @return 0 on success, -ve otherwise. + */ +int __devinit mxc_alsa_create_ctl(struct snd_card *card, void *p_value) +{ + int err = 0; + + if ((err = + snd_ctl_add(card, snd_ctl_new1(&pmic_control_op_sw, p_value))) < 0) + return err; + + if ((err = + snd_ctl_add(card, + snd_ctl_new1(&pmic_control_pb_vol, p_value))) < 0) + return err; + if ((err = + snd_ctl_add(card, + snd_ctl_new1(&pmic_control_pb_monoconfig, + p_value))) < 0) + return err; + if ((err = + snd_ctl_add(card, + snd_ctl_new1(&pmic_control_pb_bal, p_value))) < 0) + return err; + if ((err = + snd_ctl_add(card, + snd_ctl_new1(&pmic_control_cap_vol, p_value))) < 0) + return err; + if ((err = + snd_ctl_add(card, snd_ctl_new1(&pmic_control_ip_sw, p_value))) < 0) + return err; + err = snd_ctl_add(card, snd_ctl_new1(&pmic_control_loop_out, p_value)); + if (err < 0) + return err; + + return 0; +} + +EXPORT_SYMBOL(mxc_alsa_create_ctl); --- linux-fsl-imx51-2.6.31.orig/sound/arm/Kconfig +++ linux-fsl-imx51-2.6.31/sound/arm/Kconfig @@ -39,5 +39,54 @@ Say Y or M if you want to support any AC97 codec attached to the PXA2xx AC97 interface. +config SND_MXC_SPDIF + tristate "MXC SPDIF sound card spport" + select SND_PCM + help + Say Y here to enable SPDIF sound card + +config SND_MXC_PMIC + tristate "MXC PMIC sound system" + depends on ARCH_MXC && MXC_DAM && MXC_SSI && \ + (MXC_MC13783_AUDIO || MXC_PMIC_SC55112_AUDIO) + default y + select SND_PCM + help + Say Y here to include support for soundcards based on the + MC13783 chip. + + To compile this driver as a module, choose M here: the module + will be called snd-mc13783. + +config SND_MXC_PLAYBACK_MIXING + bool "Playback Stream Mixing" + depends on (!ARCH_MX27) && (!ARCH_MXC91131) && ARCH_MXC && MXC_DAM && MXC_SSI && \ + (MXC_MC13783_AUDIO) + default n + select SND_PCM + help + Say Y here to include support mixing for soundcards based on the + MC13783 chip. This supports audio stream mixing on VCODEC for mc13783 based platforms. + Analog mixng as well as Digital mixing can be tested on these platforms. + As of now , mixing of mono files only are supported in Digital Mixing since it is done on VCODEC. + SSI 2 channel mode is used to mix 2 streams on a single SSI. This is supported on all platforms except imx27ads(imx27ads - Analog mixing only). + +config HEADSET_DETECT_ENABLE + bool "Headset Detect Enable" + depends on (!ARCH_MXC91131) && ARCH_MXC && MXC_DAM && MXC_SSI && \ + (MXC_MC13783_AUDIO) + default n + select SND_PCM + help + Say Y here to enable Headset Detect Feature. + +config SND_MXC_PMIC_IRAM + bool "MXC PMIC sound system supports IRAM" + depends on SND_MXC_PMIC && SDMA_IRAM + default n + select SND_PCM + help + It will use IRAM as the DMA buffer of ALSA playback. + endif # SND_ARM --- linux-fsl-imx51-2.6.31.orig/sound/arm/mxc-alsa-pmic.c +++ linux-fsl-imx51-2.6.31/sound/arm/mxc-alsa-pmic.c @@ -0,0 +1,3790 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @defgroup SOUND_DRV MXC Sound Driver for ALSA + */ + + /*! + * @file mxc-alsa-pmic.c + * @brief this fle mxc-alsa-pmic.c + * @brief this file implements the mxc sound driver interface for ALSA. + * The mxc sound driver supports mono/stereo recording (there are + * some limitations due to hardware), mono/stereo playback and + * audio mixing. + * Recording supports 8000 khz and 16000 khz sample rate. + * Playback supports 8000, 11025, 16000, 22050, 24000, 32000, + * 44100, 48000 and 96000 Hz for mono and stereo. + * This file also handles the software mixer and abstraction APIs + * that control the volume,balance,mono-adder,input and output + * devices for PMIC. + * These mixer controls shall be accessible thru alsa as well as + * OSS emulation modes + * + * @ingroup SOUND_DRV + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "mxc-alsa-pmic.h" +#include "mxc-alsa-common.h" + +/* + * PMIC driver buffer policy. + * Customize here if the sound is not correct + */ +#define MAX_BUFFER_SIZE (32*1024) +#define DMA_BUF_SIZE (8*1024) +#define MIN_PERIOD_SIZE 64 +#define MIN_PERIOD 2 +#define MAX_PERIOD 255 + +#define AUD_MUX_CONF 0x0031010 +#define MASK_2_TS 0xfffffffc +#define MASK_1_TS 0xfffffffd +#define MASK_1_TS_MIX 0xfffffffc +#define MASK_1_TS_STDAC 0xfffffffe +#define MASK_1_TS_REC 0xfffffffe +#define SOUND_CARD_NAME "MXC" + +#ifdef CONFIG_SND_MXC_PMIC_IRAM +#define MAX_IRAM_SIZE (IRAM_SIZE - CONFIG_SDMA_IRAM_SIZE) +#define DMA_IRAM_SIZE (4*1024) +#define ADMA_BASE_PADDR (IRAM_BASE_ADDR + CONFIG_SDMA_IRAM_SIZE) +#define ADMA_BASE_VADDR (IRAM_BASE_ADDR_VIRT + CONFIG_SDMA_IRAM_SIZE) + +#if (MAX_IRAM_SIZE + CONFIG_SDMA_IRAM_SIZE) > IRAM_SIZE +#error "The IRAM size required has beyond the limitation of IC spec" +#endif + +#if (MAX_IRAM_SIZE&(DMA_IRAM_SIZE-1)) +#error "The IRAM size for DMA ring buffer should be multiples of dma buffer size" +#endif + +#endif /* CONFIG_SND_MXC_PMIC_IRAM */ + +/*! + * These defines enable DMA chaining for playback + * and capture respectively. + */ +#define MXC_SOUND_PLAYBACK_CHAIN_DMA_EN 1 +#define MXC_SOUND_CAPTURE_CHAIN_DMA_EN 1 + +/*! + * ID for this card + */ +static char *id = NULL; + +#define MXC_ALSA_MAX_PCM_DEV 3 +#define MXC_ALSA_MAX_PLAYBACK 3 +#define MXC_ALSA_MAX_CAPTURE 1 + +struct mxc_audio_platform_data *audio_data; +/*! + * This structure is the global configuration of the soundcard + * that are accessed by the mixer as well as by the playback/recording + * stream. This contains various volume, balance, mono adder settings + * + */ +typedef struct audio_mixer_control { + + /*! + * This variable holds the current active output device(s) + */ + int output_device; + + /*! + * This variable holds the current active input device. + */ + int input_device; + + /* Used only for playback/recording on codec .. Use 1 for playback + * and 0 for recording*/ + int direction; + + /*! + * This variable holds the current source for active ouput device(s) + */ + OUTPUT_SOURCE source_for_output[OP_MAXDEV]; + + /*! + * This variable says if a given output device is part of an ongoing + * playback. This variable will be set and reset by the playback stream + * when stream is activated and when stream is closed. This shall also + * be set and reset my mixer functions for enabling/disabling output devs + */ + int output_active[OP_MAXDEV]; + + /*! + * This variable holds the current volume for active input device. + * This maps to the input gain of recording device + */ + int input_volume; + + /*! + * This variable holds the current volume for playback devices. + */ + //int output_volume[OP_MAXDEV]; + int master_volume_out; + + /*! + * This variable holds the balance setting for the mixer out. + * The range is 0 to 100. 50 means both L and R equal. + * < 50 attenuates left side and > 50 attenualtes right side + */ + int mixer_balance; + + /*! + * This variable holds the current mono adder config. + */ + PMIC_AUDIO_MONO_ADDER_MODE mixer_mono_adder; + + /*! + * Semaphore used to control the access to this structure. + */ + struct semaphore sem; + + /*! + * These variables are set by PCM stream and mixer when the voice codec's / ST dac's outputs are + * connected to the analog mixer of PMIC audio chip + */ + int codec_out_to_mixer; + int stdac_out_to_mixer; + + int codec_playback_active; + int codec_capture_active; + int stdac_playback_active; + int mixing_active; + + /*! + * This variable holds the configuration of the headset which was previously enabled. + */ + int old_prof; + + PMIC_AUDIO_HANDLE stdac_handle; + PMIC_AUDIO_HANDLE voice_codec_handle; + +} audio_mixer_control_t; + +/*! + * This structure stores current state of audio configuration + * soundcard wrt a specific stream (playback on different DACs, recording on the codec etc). + * It is used to set/get current values and are NOT accessed by the Mixer. This structure shall + * be retrieved thru pcm substream pointer and hence the mixer component will have no access + * to it. There will be as many structures as the number of streams. In our case it's 3. Codec playback + * STDAC playback and voice codec recording. + * This structure will be used at the beginning of activating a stream to configure audio chip. + * + */ +typedef struct pmic_audio_device { + + PMIC_AUDIO_HANDLE handle; + /*! + * This variable holds the sample rate currently being used. + */ + int sample_rate; + + /*! + * This variable holds the current protocol PMIC is using. + * PMIC can use one of three protocols at any given time: + * normal, network and I2S. + */ + int protocol; + + /*! + * This variables tells us whether PMIC runs in + * master mode (PMIC generates audio clocks)or slave mode (AP side + * generates audio clocks) + * + * Currently the default mode is master mode because PMIC clocks have + * higher precision. + */ + int mode; + + /* This variable holds the value representing the + * base clock PMIC will use to generate internal + * clocks (BCL clock and FrameSync clock) + */ + int pll; + + /*! + * This variable holds the SSI to which PMIC is currently connected. + */ + int ssi; + + /*! + * This variable tell us whether bit clock is inverted or not. + */ + int bcl_inverted; + + /*! + * This variable tell us whether frame clock is inverted or not. + */ + int fs_inverted; + + /*! + * This variable holds the pll used for PMIC audio operations. + */ + int pll_rate; + + /*! + * This variable holds the filter that PMIC is applying to + * CODEC operations. + */ + int codec_filter; + +} pmic_audio_device_t; + +/*! + * This structure represents an audio stream in term of + * channel DMA, HW configuration on PMIC and on AudioMux/SSI + */ +typedef struct audio_stream { + /*! + * identification string + */ + char *id; + + /*! + * numeric identification + */ + int stream_id; + + /*! + * SSI ID on the ARM side + */ + int ssi; + + /*! + * DAM port on the ARM side + */ + int dam_port; + + /*! + * device identifier for DMA + */ + int dma_wchannel; + + /*! + * we are using this stream for transfer now + */ + int active:1; + + /*! + * current transfer period + */ + int period; + + /*! + * current count of transfered periods + */ + int periods; + + /*! + * are we recording - flag used to do DMA trans. for sync + */ + int tx_spin; + + /*! + * Previous offset value for resume + */ + unsigned int old_offset; +#if 0 + /*! + * Path for this stream + */ + device_data_t stream_device; +#endif + + /*! + * pmic audio chip stream specific configuration + */ + pmic_audio_device_t pmic_audio_device; + + /*! + * for locking in DMA operations + */ + spinlock_t dma_lock; + + /*! + * Alsa substream pointer + */ + struct snd_pcm_substream *stream; +} audio_stream_t; + +/*! + * This structure represents the PMIC sound card with its + * 2 streams (StDac and Codecs) and its shared parameters + */ +typedef struct snd_card_mxc_pmic_audio { + /*! + * ALSA sound card handle + */ + struct snd_card *card; + + /*! + * ALSA pcm driver type handle + */ + struct snd_pcm *pcm[MXC_ALSA_MAX_PCM_DEV]; + + /*! + * playback & capture streams handle + * We can support a maximum of two playback streams (voice-codec + * and ST-DAC) and 1 recording stream + */ + audio_stream_t s[MXC_ALSA_MAX_CAPTURE + MXC_ALSA_MAX_PLAYBACK]; + +} mxc_pmic_audio_t; + +/*! + * pmic audio chip parameters for IP/OP and volume controls + */ +audio_mixer_control_t audio_mixer_control; + +/*! + * Global variable that represents the PMIC soundcard + * with its 2 availables stream devices: stdac and codec + */ +mxc_pmic_audio_t *mxc_audio = NULL; + +/*! + * Supported playback rates array + */ +static unsigned int playback_rates_stereo[] = { + 8000, + 11025, + 12000, + 16000, + 22050, + 24000, + 32000, + 44100, + 48000, + 64000, + 96000, +}; + +static unsigned int playback_rates_mono[] = { + 8000, + 16000, +}; + +/*! + * Supported capture rates array + */ +static unsigned int capture_rates[] = { + 8000, + 16000, +}; + +/*! + * this structure represents the sample rates supported + * by PMIC for playback operations on StDac. + */ +static struct snd_pcm_hw_constraint_list hw_playback_rates_stereo = { + .count = ARRAY_SIZE(playback_rates_stereo), + .list = playback_rates_stereo, + .mask = 0, +}; + +#ifdef CONFIG_SND_MXC_PMIC_IRAM +static spinlock_t g_audio_iram_lock = SPIN_LOCK_UNLOCKED; +static int g_audio_iram_en = 1; +static int g_device_opened = 0; +extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); + +static inline int mxc_snd_enable_iram(int enable) +{ + int ret = -EBUSY; + unsigned long flags; + spin_lock_irqsave(&g_audio_iram_lock, flags); + if (!g_device_opened) { + g_audio_iram_en = (enable != 0); + ret = 0; + } + spin_unlock_irqrestore(&g_audio_iram_lock, flags); + return ret; +} + +static inline void mxc_snd_pcm_iram_get(void) +{ + unsigned long flags; + spin_lock_irqsave(&g_audio_iram_lock, flags); + g_audio_iram_en++; + spin_unlock_irqrestore(&g_audio_iram_lock, flags); +} + +static inline void mxc_snd_pcm_iram_put(void) +{ + unsigned long flags; + spin_lock_irqsave(&g_audio_iram_lock, flags); + g_audio_iram_en--; + spin_unlock_irqrestore(&g_audio_iram_lock, flags); +} + +struct snd_dma_buffer g_iram_dmab; + +#endif /* CONFIG_SND_MXC_PMIC_IRAM */ + +/*! + * this structure represents the sample rates supported + * by PMIC for playback operations on Voice codec. + */ +static struct snd_pcm_hw_constraint_list hw_playback_rates_mono = { + .count = ARRAY_SIZE(playback_rates_mono), + .list = playback_rates_mono, + .mask = 0, +}; + +/*! + * this structure represents the sample rates supported + * by PMIC for capture operations on Codec. + */ +static struct snd_pcm_hw_constraint_list hw_capture_rates = { + .count = ARRAY_SIZE(capture_rates), + .list = capture_rates, + .mask = 0, +}; + +#ifdef CONFIG_HEADSET_DETECT_ENABLE +static PMIC_HS_STATE hs_state; + +/*! + *This is used to maintain the state of the Headset*/ +static int headset_state = 0; + +/*Callback for headset event. */ +static void HSCallback(const PMIC_HS_STATE hs_st) +{ + + msleep(10); + + if (headset_state == 1) { + pmic_audio_output_disable_phantom_ground(); + headset_state = 0; + if (audio_mixer_control.stdac_playback_active) + pmic_audio_output_clear_port(audio_mixer_control. + stdac_handle, + STEREO_HEADSET_LEFT | + STEREO_HEADSET_RIGHT); + else if (audio_mixer_control.voice_codec_handle) + pmic_audio_output_clear_port(audio_mixer_control. + voice_codec_handle, + STEREO_HEADSET_LEFT | + STEREO_HEADSET_RIGHT); + + if (audio_mixer_control.old_prof & (SOUND_MASK_PHONEOUT)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_EARPIECE, + 1); + } + if (audio_mixer_control.old_prof & (SOUND_MASK_VOLUME)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_HANDSFREE, + 1); + } + if (audio_mixer_control.old_prof & (SOUND_MASK_SPEAKER)) { +#ifdef CONFIG_HEADSET_DETECT_ENABLE + /*This is a temporary workaround which should be removed later */ + set_mixer_output_device(NULL, MIXER_OUT, OP_MONO, 1); +#else + set_mixer_output_device(NULL, MIXER_OUT, OP_HEADSET, 1); +#endif + } + if (audio_mixer_control.old_prof & (SOUND_MASK_PCM)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_LINEOUT, 1); + } + + } else { + headset_state = 1; + + pmic_audio_output_enable_phantom_ground(); + + audio_mixer_control.old_prof = + audio_mixer_control.output_device; + + if (audio_mixer_control.old_prof & (SOUND_MASK_PHONEOUT)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_EARPIECE, + 0); + } + if (audio_mixer_control.old_prof & (SOUND_MASK_VOLUME)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_HANDSFREE, + 0); + } + if (audio_mixer_control.old_prof & (SOUND_MASK_SPEAKER)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_HEADSET, 0); + } + if (audio_mixer_control.old_prof & (SOUND_MASK_PCM)) { + set_mixer_output_device(NULL, MIXER_OUT, OP_LINEOUT, 0); + } + /*This is a temporary workaround which should be removed later */ + set_mixer_output_device(NULL, MIXER_OUT, OP_MONO, 1); + + } +} + +#endif +/*! + * This function configures audio multiplexer to support + * audio data routing in PMIC master mode. + * + * @param ssi SSI of the ARM to connect to the DAM. + */ +void configure_dam_pmic_master(int ssi) +{ + int source_port; + int target_port; + + if (ssi == SSI1) { + pr_debug("DAM: port 1 -> port 4\n"); + source_port = audio_data->src_port; + + target_port = port_4; + } else { + pr_debug("DAM: port 2 -> port 5\n"); + source_port = port_2; + target_port = port_5; + } + + dam_reset_register(source_port); + dam_reset_register(target_port); + + dam_select_mode(source_port, normal_mode); + dam_select_mode(target_port, internal_network_mode); + + dam_set_synchronous(source_port, true); + dam_set_synchronous(target_port, true); + + dam_select_RxD_source(source_port, target_port); + dam_select_RxD_source(target_port, source_port); + + dam_select_TxFS_direction(source_port, signal_out); + dam_select_TxFS_source(source_port, false, target_port); + + dam_select_TxClk_direction(source_port, signal_out); + dam_select_TxClk_source(source_port, false, target_port); + + dam_select_RxFS_direction(source_port, signal_out); + dam_select_RxFS_source(source_port, false, target_port); + + dam_select_RxClk_direction(source_port, signal_out); + dam_select_RxClk_source(source_port, false, target_port); + + dam_set_internal_network_mode_mask(target_port, 0xfc); + + writel(AUD_MUX_CONF, IO_ADDRESS(AUDMUX_BASE_ADDR) + 0x38); +} + +/*! + * This function configures the SSI in order to receive audio + * from PMIC (recording). Configuration of SSI consists mainly in + * setting the following: + * + * 1) SSI to use (SSI1 or SSI2) + * 2) SSI mode (normal or network. We use always network mode) + * 3) SSI STCCR register settings, which control the sample rate (BCL and + * FS clocks) + * 4) Watermarks for SSI FIFOs as well as timeslots to be used. + * 5) Enable SSI. + * + * @param substream pointer to the structure of the current stream. + */ +void configure_ssi_rx(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + int ssi; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[substream->pstr->stream]; + ssi = s->ssi; + + pr_debug("configure_ssi_rx: SSI %d\n", ssi + 1); + + ssi_enable(ssi, false); + ssi_synchronous_mode(ssi, true); + ssi_network_mode(ssi, true); + + if (machine_is_mx27ads()) { + ssi_tx_clock_divide_by_two(ssi, 0); + ssi_tx_clock_prescaler(ssi, 0); + ssi_tx_frame_rate(ssi, 2); + } + /* OJO */ + ssi_tx_frame_rate(ssi, 1); + + ssi_tx_early_frame_sync(ssi, ssi_frame_sync_one_bit_before); + ssi_tx_frame_sync_length(ssi, ssi_frame_sync_one_bit); + ssi_tx_word_length(ssi, ssi_16_bits); + + ssi_rx_early_frame_sync(ssi, ssi_frame_sync_one_bit_before); + ssi_rx_frame_sync_length(ssi, ssi_frame_sync_one_bit); + ssi_rx_fifo_enable(ssi, ssi_fifo_0, true); + ssi_rx_bit0(ssi, true); + + ssi_rx_fifo_full_watermark(ssi, ssi_fifo_0, RX_WATERMARK); + + /* We never use the divider by 2 implemented in SSI */ + ssi_rx_clock_divide_by_two(ssi, 0); + + /* Set prescaler range (a fixed divide-by-eight prescaler + * in series with the variable prescaler) to 0 as we don't + * need it. + */ + ssi_rx_clock_prescaler(ssi, 0); + + /* Currently, only supported sample length is 16 bits */ + ssi_rx_word_length(ssi, ssi_16_bits); + + /* set direction of clocks ("externally" means that clocks come + * from PMIC to MCU) + */ + ssi_rx_frame_direction(ssi, ssi_tx_rx_externally); + ssi_rx_clock_direction(ssi, ssi_tx_rx_externally); + + /* Frame Rate Divider Control. + * In Normal mode, this ratio determines the word + * transfer rate. In Network mode, this ration sets + * the number of words per frame. + */ + ssi_tx_frame_rate(ssi, 4); + ssi_rx_frame_rate(ssi, 4); + + ssi_enable(ssi, true); +} + +/*! + * This function configures the SSI in order to + * send data to PMIC. Configuration of SSI consists + * mainly in setting the following: + * + * 1) SSI to use (SSI1 or SSI2) + * 2) SSI mode (normal for normal use e.g. playback, network for mixing) + * 3) SSI STCCR register settings, which control the sample rate (BCL and + * FS clocks) + * 4) Watermarks for SSI FIFOs as well as timeslots to be used. + * 5) Enable SSI. + * + * @param substream pointer to the structure of the current stream. + */ +void configure_ssi_tx(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + struct snd_pcm_runtime *runtime; + int ssi; + int device, stream_id = -1; + device = substream->pcm->device; + if (device == 0) + stream_id = 0; + else if (device == 1) + stream_id = 2; + else + stream_id = 3; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[stream_id]; + runtime = substream->runtime; + ssi = s->ssi; + + pr_debug("configure_ssi_tx: SSI %d\n", ssi + 1); + + ssi_enable(ssi, false); + ssi_synchronous_mode(ssi, true); + if (runtime->channels == 1) { + if (stream_id == 2) { + ssi_network_mode(ssi, true); + } else { +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + ssi_network_mode(ssi, false); +#endif + } + } else { + ssi_network_mode(ssi, true); + } + +#ifdef CONFIG_SND_MXC_PLAYBACK_MIXING + ssi_two_channel_mode(ssi, true); + ssi_tx_fifo_enable(ssi, ssi_fifo_1, true); + ssi_tx_fifo_empty_watermark(ssi, ssi_fifo_1, TX_WATERMARK); +#endif + + ssi_tx_early_frame_sync(ssi, ssi_frame_sync_one_bit_before); + ssi_tx_frame_sync_length(ssi, ssi_frame_sync_one_bit); + ssi_tx_fifo_enable(ssi, ssi_fifo_0, true); + ssi_tx_bit0(ssi, true); + + ssi_tx_fifo_empty_watermark(ssi, ssi_fifo_0, TX_WATERMARK); + + /* We never use the divider by 2 implemented in SSI */ + ssi_tx_clock_divide_by_two(ssi, 0); + + ssi_tx_clock_prescaler(ssi, 0); + + /*Currently, only supported sample length is 16 bits */ + ssi_tx_word_length(ssi, ssi_16_bits); + + /* clocks are being provided by PMIC */ + ssi_tx_frame_direction(ssi, ssi_tx_rx_externally); + ssi_tx_clock_direction(ssi, ssi_tx_rx_externally); + + if (runtime->channels == 1) { +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + if (stream_id == 2) { + ssi_tx_frame_rate(ssi, 4); + } else { + ssi_tx_frame_rate(ssi, 1); + } +#else + if (stream_id == 2) { + ssi_tx_frame_rate(ssi, 2); + } +#endif + + } else { + ssi_tx_frame_rate(ssi, 2); + } + + ssi_enable(ssi, true); +} + +/*! + * This function normalizes speed given by the user + * if speed is not supported, the function will + * calculate the nearest one. + * + * @param speed speed requested by the user. + * + * @return The normalized speed. + */ +int adapt_speed(int speed) +{ + + /* speeds from 8k to 96k */ + if (speed >= (64000 + 96000) / 2) { + speed = 96000; + } else if (speed >= (48000 + 64000) / 2) { + speed = 64000; + } else if (speed >= (44100 + 48000) / 2) { + speed = 48000; + } else if (speed >= (32000 + 44100) / 2) { + speed = 44100; + } else if (speed >= (24000 + 32000) / 2) { + speed = 32000; + } else if (speed >= (22050 + 24000) / 2) { + speed = 24000; + } else if (speed >= (16000 + 22050) / 2) { + speed = 22050; + } else if (speed >= (12000 + 16000) / 2) { + speed = 16000; + } else if (speed >= (11025 + 12000) / 2) { + speed = 12000; + } else if (speed >= (8000 + 11025) / 2) { + speed = 11025; + } else { + speed = 8000; + } + return speed; +} + +/*! + * This function get values to be put in PMIC registers. + * This values represents the sample rate that PMIC + * should use for current playback or recording. + * + * @param substream pointer to the structure of the current stream. + */ +void normalize_speed_for_pmic(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + pmic_audio_device_t *pmic_device; + struct snd_pcm_runtime *runtime; + int device, stream_id = -1; + device = substream->pcm->device; + if (device == 0) { + if ((audio_mixer_control.codec_capture_active == 1) + && (substream->stream == 1)) { + stream_id = 1; + } else + stream_id = 0; + } else { + stream_id = 2; + } + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[stream_id]; + pmic_device = &s->pmic_audio_device; + runtime = substream->runtime; + + /* As the driver allows continuous sample rate, we must adapt the rate */ + runtime->rate = adapt_speed(runtime->rate); + + if (pmic_device->handle == audio_mixer_control.voice_codec_handle) { + switch (runtime->rate) { + case 8000: + pmic_device->sample_rate = VCODEC_RATE_8_KHZ; + break; + case 16000: + pmic_device->sample_rate = VCODEC_RATE_16_KHZ; + break; + default: + pmic_device->sample_rate = VCODEC_RATE_8_KHZ; + break; + } + + } else if (pmic_device->handle == audio_mixer_control.stdac_handle) { + switch (runtime->rate) { + case 8000: + pmic_device->sample_rate = STDAC_RATE_8_KHZ; + break; + + case 11025: + pmic_device->sample_rate = STDAC_RATE_11_025_KHZ; + break; + + case 12000: + pmic_device->sample_rate = STDAC_RATE_12_KHZ; + break; + + case 16000: + pmic_device->sample_rate = STDAC_RATE_16_KHZ; + break; + + case 22050: + pmic_device->sample_rate = STDAC_RATE_22_050_KHZ; + break; + + case 24000: + pmic_device->sample_rate = STDAC_RATE_24_KHZ; + break; + + case 32000: + pmic_device->sample_rate = STDAC_RATE_32_KHZ; + break; + + case 44100: + pmic_device->sample_rate = STDAC_RATE_44_1_KHZ; + break; + + case 48000: + pmic_device->sample_rate = STDAC_RATE_48_KHZ; + break; + + case 64000: + pmic_device->sample_rate = STDAC_RATE_64_KHZ; + break; + + case 96000: + pmic_device->sample_rate = STDAC_RATE_96_KHZ; + break; + + default: + pmic_device->sample_rate = STDAC_RATE_8_KHZ; + } + } + +} + +/*! + * This function configures number of channels for next audio operation + * (recording/playback) Number of channels define if sound is stereo + * or mono. + * + * @param substream pointer to the structure of the current stream. + * + */ +void set_pmic_channels(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + struct snd_pcm_runtime *runtime; + int device = -1, stream_id = -1; + + chip = snd_pcm_substream_chip(substream); + device = substream->pcm->device; + + if (device == 0) { + if (substream->pstr->stream == 1) { + stream_id = 1; + } else { + stream_id = 0; + } + } else { + stream_id = 2; + } + s = &chip->s[stream_id]; + runtime = substream->runtime; + + if (runtime->channels == 2) { + ssi_tx_mask_time_slot(s->ssi, MASK_2_TS); + ssi_rx_mask_time_slot(s->ssi, MASK_1_TS_REC); + } else { + if (stream_id == 2) { +#ifdef CONFIG_MXC_PMIC_SC55112 + ssi_tx_mask_time_slot(s->ssi, MASK_1_TS_REC); +#else + + if (audio_mixer_control.mixing_active == 1) + ssi_tx_mask_time_slot(s->ssi, MASK_1_TS_MIX); + else + ssi_tx_mask_time_slot(s->ssi, MASK_1_TS); + +#endif + } else { + + ssi_tx_mask_time_slot(s->ssi, MASK_1_TS_STDAC); + } +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + ssi_rx_mask_time_slot(s->ssi, MASK_1_TS_REC); +#endif + + } + +} + +/*! + * This function sets the input device in PMIC. It takes an + * ALSA value and modifies registers using pmic-specific values. + * + * @param handle Handle to the PMIC device opened + * @param val ALSA value. This value defines the input device that + * PMIC should activate to get audio signal (recording) + * @param enable Whether to enable or diable the input + */ +int set_mixer_input_device(PMIC_AUDIO_HANDLE handle, INPUT_DEVICES dev, + bool enable) +{ + + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + if (handle != NULL) { + if (audio_mixer_control.input_device & SOUND_MASK_PHONEIN) { + pmic_audio_vcodec_set_mic(handle, MIC1_LEFT, + MIC1_RIGHT_MIC_MONO); + pmic_audio_vcodec_enable_micbias(handle, MIC_BIAS1); + } else { + pmic_audio_vcodec_set_mic_on_off(handle, + MIC1_LEFT, + MIC1_RIGHT_MIC_MONO); + pmic_audio_vcodec_disable_micbias(handle, MIC_BIAS1); + } + if (audio_mixer_control.input_device & SOUND_MASK_MIC) { + pmic_audio_vcodec_set_mic(handle, NO_MIC, MIC2_AUX); + pmic_audio_vcodec_enable_micbias(handle, MIC_BIAS2); + } else { + pmic_audio_vcodec_set_mic_on_off(handle, NO_MIC, + MIC2_AUX); + pmic_audio_vcodec_disable_micbias(handle, MIC_BIAS2); + } + if (audio_mixer_control.input_device & SOUND_MASK_LINE) { + pmic_audio_vcodec_set_mic(handle, NO_MIC, TXIN_EXT); + } else { + pmic_audio_vcodec_set_mic_on_off(handle, NO_MIC, + TXIN_EXT); + } + up(&audio_mixer_control.sem); + return 0; + + } + switch (dev) { + case IP_HANDSET: + pr_debug("Input: SOUND_MASK_PHONEIN \n"); + if (handle == NULL) { + if (enable) { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic(handle, + MIC1_LEFT, + MIC1_RIGHT_MIC_MONO); + pmic_audio_vcodec_enable_micbias(handle, + MIC_BIAS1); + } + audio_mixer_control.input_device |= + SOUND_MASK_PHONEIN; + } else { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic_on_off(handle, + MIC1_LEFT, + MIC1_RIGHT_MIC_MONO); + pmic_audio_vcodec_disable_micbias + (handle, MIC_BIAS1); + } + audio_mixer_control.input_device &= + ~SOUND_MASK_PHONEIN; + } + } + break; + + case IP_HEADSET: + if (handle == NULL) { + if (enable) { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic(handle, + NO_MIC, + MIC2_AUX); + pmic_audio_vcodec_enable_micbias(handle, + MIC_BIAS2); + } + audio_mixer_control.input_device |= + SOUND_MASK_MIC; + } else { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic_on_off(handle, + NO_MIC, + MIC2_AUX); + pmic_audio_vcodec_disable_micbias + (handle, MIC_BIAS2); + } + audio_mixer_control.input_device &= + ~SOUND_MASK_MIC; + } + // Enable Mic with MIC2_AUX + } + break; + + case IP_LINEIN: + if (handle == NULL) { + if (enable) { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic(handle, + NO_MIC, + TXIN_EXT); + } + audio_mixer_control.input_device |= + SOUND_MASK_LINE; + } else { + if (audio_mixer_control.codec_capture_active) { + handle = + audio_mixer_control. + voice_codec_handle; + pmic_audio_vcodec_set_mic_on_off(handle, + NO_MIC, + TXIN_EXT); + } + audio_mixer_control.input_device &= + ~SOUND_MASK_LINE; + } + } + break; + + default: + up(&audio_mixer_control.sem); + return -1; + break; + } + up(&audio_mixer_control.sem); + return 0; +} + +EXPORT_SYMBOL(set_mixer_input_device); + +int get_mixer_input_device() +{ + int val; + val = audio_mixer_control.input_device; + return val; +} + +EXPORT_SYMBOL(get_mixer_input_device); + +/*! + * This function sets the PMIC input device's gain. + * Note that the gain is the input volume + * + * @param handle Handle to the opened PMIC device + * @param val gain to be applied. This value can go + * from 0 (mute) to 100 (max gain) + */ +int set_mixer_input_gain(PMIC_AUDIO_HANDLE handle, int val) +{ + int leftdb, rightdb; + int left, right; + + left = (val & 0x00ff); + right = ((val & 0xff00) >> 8); + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + leftdb = (left * PMIC_INPUT_VOLUME_MAX) / INPUT_VOLUME_MAX; + rightdb = (right * PMIC_INPUT_VOLUME_MAX) / INPUT_VOLUME_MAX; + audio_mixer_control.input_volume = val; + if (audio_mixer_control.voice_codec_handle == handle) { + pmic_audio_vcodec_set_record_gain(handle, VOLTAGE_TO_VOLTAGE, + leftdb, VOLTAGE_TO_VOLTAGE, + rightdb); + } else if ((handle == NULL) + && (audio_mixer_control.codec_capture_active)) { + pmic_audio_vcodec_set_record_gain(audio_mixer_control. + voice_codec_handle, + VOLTAGE_TO_VOLTAGE, leftdb, + VOLTAGE_TO_VOLTAGE, rightdb); + } + up(&audio_mixer_control.sem); + return 0; +} + +EXPORT_SYMBOL(set_mixer_input_gain); + +int get_mixer_input_gain() +{ + int val; + val = audio_mixer_control.input_volume; + return val; +} + +EXPORT_SYMBOL(get_mixer_input_gain); + +/*! + * This function sets the PMIC output device's volume. + * + * @param handle Handle to the PMIC device opened + * @param volume ALSA value. This value defines the playback volume + * @param dev which output device gets affected by this volume + * + */ + +int set_mixer_output_volume(PMIC_AUDIO_HANDLE handle, int volume, + OUTPUT_DEVICES dev) +{ + int leftdb, rightdb; + int right, left; + + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + left = (volume & 0x00ff); + right = ((volume & 0xff00) >> 8); + + leftdb = (left * PMIC_OUTPUT_VOLUME_MAX) / OUTPUT_VOLUME_MAX; + rightdb = (right * PMIC_OUTPUT_VOLUME_MAX) / OUTPUT_VOLUME_MAX; + if (handle == NULL) { + /* Invoked by mixer */ + audio_mixer_control.master_volume_out = volume; + if (audio_mixer_control.codec_playback_active) + pmic_audio_output_set_pgaGain(audio_mixer_control. + voice_codec_handle, + rightdb); + if (audio_mixer_control.stdac_playback_active) + pmic_audio_output_set_pgaGain(audio_mixer_control. + stdac_handle, rightdb); + + } else { + /* change the required volume */ + audio_mixer_control.master_volume_out = volume; + pmic_audio_output_set_pgaGain(handle, rightdb); + } + up(&audio_mixer_control.sem); + return 0; +} + +EXPORT_SYMBOL(set_mixer_output_volume); + +int get_mixer_output_volume() +{ + int val; + val = audio_mixer_control.master_volume_out; + return val; +} + +EXPORT_SYMBOL(get_mixer_output_volume); + +/*! + * This function sets the PMIC output device's balance. + * + * @param bal Balance to be applied. This value can go + * from 0 (Left atten) to 100 (Right atten) + * 50 is both equal + */ +int set_mixer_output_balance(int bal) +{ + int channel = 0; + PMIC_AUDIO_OUTPUT_BALANCE_GAIN b_gain; + PMIC_AUDIO_HANDLE handle; + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + // Convert ALSA value to PMIC value i.e. atten and channel value + if (bal < 0) + bal = 0; + if (bal > 100) + bal = 100; + if (bal < 50) { + channel = 1; + } else { + bal = 100 - bal; + channel = 0; + } + + b_gain = bal / 8; + + audio_mixer_control.mixer_balance = bal; + if (audio_mixer_control.codec_playback_active) { + handle = audio_mixer_control.voice_codec_handle; + // Use codec's handle to set balance + } else if (audio_mixer_control.stdac_playback_active) { + handle = audio_mixer_control.stdac_handle; + // Use STDac's handle to set balance + } else { + up(&audio_mixer_control.sem); + return 0; + } + if (channel == 0) + pmic_audio_output_set_balance(handle, BAL_GAIN_0DB, b_gain); + else + pmic_audio_output_set_balance(handle, b_gain, BAL_GAIN_0DB); + up(&audio_mixer_control.sem); + return 0; +} + +EXPORT_SYMBOL(set_mixer_output_balance); + +int get_mixer_output_balance() +{ + int val; + val = audio_mixer_control.mixer_balance; + return val; +} + +EXPORT_SYMBOL(get_mixer_output_balance); + +/*! + * This function sets the PMIC output device's mono adder config. + * + * @param mode Mono adder mode to be set + */ +int set_mixer_output_mono_adder(PMIC_AUDIO_MONO_ADDER_MODE mode) +{ + PMIC_AUDIO_HANDLE handle; + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + audio_mixer_control.mixer_mono_adder = mode; + if (audio_mixer_control.codec_playback_active) { + handle = audio_mixer_control.voice_codec_handle; + // Use codec's handle to set balance + pmic_audio_output_enable_mono_adder(audio_mixer_control. + voice_codec_handle, mode); + } else if (audio_mixer_control.stdac_playback_active) { + handle = audio_mixer_control.stdac_handle; + pmic_audio_output_enable_mono_adder(audio_mixer_control. + stdac_handle, mode); + // Use STDac's handle to set balance + } + up(&audio_mixer_control.sem); + return 0; +} + +EXPORT_SYMBOL(set_mixer_output_mono_adder); + +int get_mixer_output_mono_adder() +{ + int val; + val = audio_mixer_control.mixer_mono_adder; + return val; +} + +EXPORT_SYMBOL(get_mixer_output_mono_adder); + +/*! + * This function sets the output device(s) in PMIC. It takes an + * ALSA value and modifies registers using PMIC-specific values. + * + * @param handle handle to the device already opened + * @param src Source connected to o/p device + * @param dev Output device to be enabled + * @param enable Enable or disable the device + * + */ +int set_mixer_output_device(PMIC_AUDIO_HANDLE handle, OUTPUT_SOURCE src, + OUTPUT_DEVICES dev, bool enable) +{ + PMIC_AUDIO_OUTPUT_PORT port; + if (down_interruptible(&audio_mixer_control.sem)) + return -EINTR; + if (!((src == CODEC_DIR_OUT) || (src == MIXER_OUT))) { + up(&audio_mixer_control.sem); + return -1; + } + if (handle != (PMIC_AUDIO_HANDLE) NULL) { + /* Invoked by playback stream */ + if (audio_mixer_control.output_device & SOUND_MASK_PHONEOUT) { + audio_mixer_control.output_active[OP_EARPIECE] = 1; + pmic_audio_output_set_port(handle, MONO_SPEAKER); + } else { + audio_mixer_control.output_active[OP_EARPIECE] = 0; + pmic_audio_output_clear_port(handle, MONO_SPEAKER); + } + if (audio_mixer_control.output_device & SOUND_MASK_SPEAKER) { + audio_mixer_control.output_active[OP_HANDSFREE] = 1; + pmic_audio_output_set_port(handle, MONO_LOUDSPEAKER); + } else { + audio_mixer_control.output_active[OP_HANDSFREE] = 0; + pmic_audio_output_clear_port(handle, MONO_LOUDSPEAKER); + } + if (audio_mixer_control.output_device & SOUND_MASK_VOLUME) { + audio_mixer_control.output_active[OP_HEADSET] = 1; + if (dev != OP_MONO) { + pmic_audio_output_set_port(handle, + STEREO_HEADSET_LEFT | + STEREO_HEADSET_RIGHT); + } else { + pmic_audio_output_set_port(handle, + STEREO_HEADSET_LEFT); + /*This is a temporary workaround which should be removed later */ + } + + } else { + audio_mixer_control.output_active[OP_HEADSET] = 0; + pmic_audio_output_clear_port(handle, + STEREO_HEADSET_LEFT | + STEREO_HEADSET_RIGHT); + } + if (audio_mixer_control.output_device & SOUND_MASK_PCM) { + audio_mixer_control.output_active[OP_LINEOUT] = 1; + pmic_audio_output_set_port(handle, + STEREO_OUT_LEFT | + STEREO_OUT_RIGHT); + } else { + audio_mixer_control.output_active[OP_LINEOUT] = 0; + pmic_audio_output_clear_port(handle, + STEREO_OUT_LEFT | + STEREO_OUT_RIGHT); + } + } else { + switch (dev) { + case OP_EARPIECE: + if (enable) { + audio_mixer_control.output_device |= + SOUND_MASK_PHONEOUT; + audio_mixer_control.source_for_output[dev] = + src; + } else { + audio_mixer_control.output_device &= + ~SOUND_MASK_PHONEOUT; + } + port = MONO_SPEAKER; + break; + case OP_HANDSFREE: + if (enable) { + audio_mixer_control.output_device |= + SOUND_MASK_SPEAKER; + audio_mixer_control.source_for_output[dev] = + src; + } else { + audio_mixer_control.output_device &= + ~SOUND_MASK_SPEAKER; + } + port = MONO_LOUDSPEAKER; + break; + case OP_HEADSET: + if (enable) { + audio_mixer_control.output_device |= + SOUND_MASK_VOLUME; + audio_mixer_control.source_for_output[dev] = + src; + } else { + audio_mixer_control.output_device &= + ~SOUND_MASK_VOLUME; + } + port = STEREO_HEADSET_LEFT | STEREO_HEADSET_RIGHT; + break; + case OP_MONO: + /*This is a temporary workaround which should be removed later */ + if (enable) { + audio_mixer_control.output_device |= + SOUND_MASK_VOLUME; + audio_mixer_control.source_for_output[dev] = + src; + } else { + audio_mixer_control.output_device &= + ~SOUND_MASK_VOLUME; + } + port = STEREO_HEADSET_LEFT; + break; + case OP_LINEOUT: + if (enable) { + audio_mixer_control.output_device |= + SOUND_MASK_PCM; + audio_mixer_control.source_for_output[dev] = + src; + } else { + audio_mixer_control.output_device &= + ~SOUND_MASK_PCM; + } + port = STEREO_OUT_LEFT | STEREO_OUT_RIGHT; + break; + default: + up(&audio_mixer_control.sem); + return -1; + break; + } + /* Invoked by mixer .. little tricky to handle over here */ + if (audio_mixer_control.codec_playback_active) { + if (enable) { + audio_mixer_control.output_active[dev] = 1; + pmic_audio_output_set_port(audio_mixer_control. + voice_codec_handle, + port); + } else { + audio_mixer_control.output_active[dev] = 0; + pmic_audio_output_clear_port + (audio_mixer_control.voice_codec_handle, + port); + } + } + if (audio_mixer_control.stdac_playback_active) { + if (enable) { + audio_mixer_control.output_active[dev] = 1; + pmic_audio_output_set_port(audio_mixer_control. + stdac_handle, port); + } else { + audio_mixer_control.output_active[dev] = 0; + pmic_audio_output_clear_port + (audio_mixer_control.stdac_handle, port); + } + } + + } + up(&audio_mixer_control.sem); + return 0; + // Set O/P device with handle and port + +} + +EXPORT_SYMBOL(set_mixer_output_device); + +int get_mixer_output_device() +{ + int val; + val = audio_mixer_control.output_device; + return val; +} + +EXPORT_SYMBOL(get_mixer_output_device); + +/*! + * This function configures the CODEC for playback/recording. + * + * main configured elements are: + * - audio path on PMIC + * - external clock to generate BC and FS clocks + * - PMIC mode (master or slave) + * - protocol + * - sample rate + * + * @param substream pointer to the structure of the current stream. + * @param stream_id index into the audio_stream array. + */ +void configure_codec(struct snd_pcm_substream *substream, int stream_id) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + pmic_audio_device_t *pmic; + PMIC_AUDIO_HANDLE handle; + int ssi_bus; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[stream_id]; + pmic = &s->pmic_audio_device; + handle = audio_mixer_control.voice_codec_handle; + + ssi_bus = (pmic->ssi == SSI1) ? AUDIO_DATA_BUS_1 : AUDIO_DATA_BUS_2; + + pmic_audio_vcodec_set_rxtx_timeslot(handle, USE_TS0); + pmic_audio_vcodec_enable_mixer(handle, USE_TS1, VCODEC_MIX_IN_0DB, + VCODEC_MIX_OUT_0DB); + pmic_audio_set_protocol(handle, ssi_bus, pmic->protocol, pmic->mode, + USE_4_TIMESLOTS); + + msleep(20); + pmic_audio_vcodec_set_clock(handle, pmic->pll, pmic->pll_rate, + pmic->sample_rate, NO_INVERT); + msleep(20); + pmic_audio_vcodec_set_config(handle, VCODEC_MASTER_CLOCK_OUTPUTS); + pmic_audio_digital_filter_reset(handle); + msleep(15); + if (stream_id == 2) { + pmic_audio_output_enable_mixer(handle); + set_mixer_output_device(handle, MIXER_OUT, OP_NODEV, 1); + set_mixer_output_volume(handle, + audio_mixer_control.master_volume_out, + OP_HEADSET); + } else { + set_mixer_input_device(handle, IP_NODEV, 1); + set_mixer_input_gain(handle, audio_mixer_control.input_volume); + } + pmic_audio_enable(handle); +} + +/*! + * This function configures the STEREODAC for playback/recording. + * + * main configured elements are: + * - audio path on PMIC + * - external clock to generate BC and FS clocks + * - PMIC mode (master or slave) + * - protocol + * - sample rate + * + * @param substream pointer to the structure of the current stream. + */ +void configure_stereodac(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + int stream_id; + audio_stream_t *s; + pmic_audio_device_t *pmic; + int ssi_bus; + PMIC_AUDIO_HANDLE handle; + struct snd_pcm_runtime *runtime; + + chip = snd_pcm_substream_chip(substream); + stream_id = substream->pstr->stream; + s = &chip->s[stream_id]; + pmic = &s->pmic_audio_device; + handle = pmic->handle; + runtime = substream->runtime; + + if (runtime->channels == 1) { + audio_mixer_control.mixer_mono_adder = MONO_ADD_LEFT_RIGHT; + } else { + audio_mixer_control.mixer_mono_adder = MONO_ADDER_OFF; + } + + ssi_bus = (pmic->ssi == SSI1) ? AUDIO_DATA_BUS_1 : AUDIO_DATA_BUS_2; + pmic_audio_stdac_set_rxtx_timeslot(handle, USE_TS0_TS1); + pmic_audio_stdac_enable_mixer(handle, USE_TS2_TS3, STDAC_NO_MIX, + STDAC_MIX_OUT_0DB); +#ifdef CONFIG_MXC_PMIC_SC55112 + pmic_audio_set_protocol(handle, ssi_bus, pmic->protocol, pmic->mode, + USE_4_TIMESLOTS); +#else + pmic_audio_set_protocol(handle, ssi_bus, pmic->protocol, pmic->mode, + USE_2_TIMESLOTS); +#endif + pmic_audio_stdac_set_clock(handle, pmic->pll, pmic->pll_rate, + pmic->sample_rate, NO_INVERT); + + pmic_audio_stdac_set_config(handle, STDAC_MASTER_CLOCK_OUTPUTS); + pmic_audio_output_enable_mixer(handle); + audio_mixer_control.stdac_out_to_mixer = 1; + pmic_audio_digital_filter_reset(handle); + msleep(10); + pmic_audio_output_enable_phantom_ground(); + set_mixer_output_volume(handle, audio_mixer_control.master_volume_out, + OP_HEADSET); + pmic_audio_output_enable_mono_adder(handle, + audio_mixer_control. + mixer_mono_adder); +#ifdef CONFIG_HEADSET_DETECT_ENABLE + set_mixer_output_device(handle, MIXER_OUT, OP_MONO, 1); +#else + set_mixer_output_device(handle, MIXER_OUT, OP_NODEV, 1); +#endif + pmic_audio_enable(handle); + +} + +/*! + * This function disables CODEC's amplifiers, volume and clock. + * @param handle Handle of voice codec + */ + +void disable_codec(PMIC_AUDIO_HANDLE handle) +{ + pmic_audio_disable(handle); + pmic_audio_vcodec_clear_config(handle, VCODEC_MASTER_CLOCK_OUTPUTS); +} + +/*! + * This function disables STEREODAC's amplifiers, volume and clock. + * @param handle Handle of STdac + * @param + */ + +void disable_stereodac(void) +{ + + audio_mixer_control.stdac_out_to_mixer = 0; +} + +/*! + * This function configures PMIC for recording. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +int configure_pmic_recording(struct snd_pcm_substream *substream) +{ + + configure_codec(substream, 1); + return 0; +} + +/*! + * This function configures PMIC for playing back. + * + * @param substream pointer to the structure of the current stream. + * @param stream_id Index into the audio_stream array . + * + * @return 0 on success, -1 otherwise. + */ + +int configure_pmic_playback(struct snd_pcm_substream *substream, int stream_id) +{ + if (stream_id == 0) { + configure_stereodac(substream); + } else if (stream_id == 2 || stream_id == 3) { + configure_codec(substream, stream_id); + } + return 0; +} + +/*! + * This function shutsdown the PMIC soundcard. + * Nothing to be done here + * + * @param mxc_audio pointer to the sound card structure. + * + * @return + */ +/* +static void mxc_pmic_audio_shutdown(mxc_pmic_audio_t * mxc_audio) +{ + +} +*/ + +/*! + * This function configures the DMA channel used to transfer + * audio from MCU to PMIC + * + * @param substream pointer to the structure of the current stream. + * @param callback pointer to function that will be + * called when a SDMA TX transfer finishes. + * + * @return 0 on success, -1 otherwise. + */ +static int +configure_write_channel(audio_stream_t * s, mxc_dma_callback_t callback, + int stream_id) +{ + int ret = -1; + int channel = -1; +#ifdef CONFIG_SND_MXC_PLAYBACK_MIXING + + int channel1 = -1; +#endif + + if (stream_id == 0) { + if (audio_data->ssi_num == 2) { + channel = + mxc_dma_request(MXC_DMA_SSI2_16BIT_TX0, + "ALSA TX DMA"); + ret = + mxc_dma_callback_set(channel, + (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel); + return -1; + } + s->dma_wchannel = channel; + + } else { + channel = + mxc_dma_request(MXC_DMA_SSI1_16BIT_TX0, + "ALSA TX DMA"); + ret = + mxc_dma_callback_set(channel, + (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel); + return -1; + } + s->dma_wchannel = channel; + } + + } + if (stream_id == 3) { + channel = + mxc_dma_request(MXC_DMA_SSI1_16BIT_TX0, "ALSA TX DMA"); + if (channel < 0) { + pr_debug("error requesting a write dma channel\n"); + return -1; + } + ret = + mxc_dma_callback_set(channel, (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel); + + return -1; + } + s->dma_wchannel = channel; + } +#ifdef CONFIG_SND_MXC_PLAYBACK_MIXING + else if (stream_id == 2) { + channel1 = + mxc_dma_request(MXC_DMA_SSI1_16BIT_TX1, "ALSA TX DMA"); + ret = + mxc_dma_callback_set(channel1, + (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel1); + return -1; + } + s->dma_wchannel = channel1; + } +#else + + if (stream_id == 2) { + channel = + mxc_dma_request(MXC_DMA_SSI1_16BIT_TX0, "ALSA TX DMA"); + ret = + mxc_dma_callback_set(channel, (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel); + return -1; + } + s->dma_wchannel = channel; + } +#endif + /*if (channel < 0) { + pr_debug("error requesting a write dma channel\n"); + return -1; + } */ + + return 0; +} + +/*! + * This function configures the DMA channel used to transfer + * audio from PMIC to MCU + * + * @param substream pointer to the structure of the current stream. + * @param callback pointer to function that will be + * called when a SDMA RX transfer finishes. + * + * @return 0 on success, -1 otherwise. + */ +static int configure_read_channel(audio_stream_t * s, + mxc_dma_callback_t callback) +{ + int ret = -1; + int channel = -1; + + channel = mxc_dma_request(MXC_DMA_SSI1_16BIT_RX0, "ALSA RX DMA"); + if (channel < 0) { + pr_debug("error requesting a read dma channel\n"); + return -1; + } + + ret = + mxc_dma_callback_set(channel, (mxc_dma_callback_t) callback, + (void *)s); + if (ret != 0) { + mxc_dma_free(channel); + return -1; + } + s->dma_wchannel = channel; + + return 0; +} + +/*! + * This function frees the stream structure + * + * @param s pointer to the structure of the current stream. + */ +static void audio_dma_free(audio_stream_t * s) +{ + /* + * There is nothing to be done here since the dma channel has been + * freed either in the callback or in the stop method + */ + +} + +/*! + * This function gets the dma pointer position during record. + * Our DMA implementation does not allow to retrieve this position + * when a transfert is active, so, it answers the middle of + * the current period beeing transfered + * + * @param s pointer to the structure of the current stream. + * + */ +static u_int audio_get_capture_dma_pos(audio_stream_t * s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int offset; + + substream = s->stream; + runtime = substream->runtime; + offset = 0; + + /* tx_spin value is used here to check if a transfert is active */ + if (s->tx_spin) { + offset = (runtime->period_size * (s->periods)) + 0; + if (offset >= runtime->buffer_size) + offset = 0; + pr_debug("MXC: audio_get_dma_pos offset %d\n", offset); + } else { + offset = (runtime->period_size * (s->periods)); + if (offset >= runtime->buffer_size) + offset = 0; + pr_debug("MXC: audio_get_dma_pos BIS offset %d\n", offset); + } + + return offset; +} + +/*! + * This function gets the dma pointer position during playback. + * Our DMA implementation does not allow to retrieve this position + * when a transfert is active, so, it answers the middle of + * the current period beeing transfered + * + * @param s pointer to the structure of the current stream. + * + */ +static u_int audio_get_playback_dma_pos(audio_stream_t * s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int offset; + + substream = s->stream; + runtime = substream->runtime; + offset = 0; + + /* tx_spin value is used here to check if a transfert is active */ + if (s->tx_spin) { + offset = (runtime->period_size * (s->periods)) + 0; + if (offset >= runtime->buffer_size) + offset = 0; + pr_debug("MXC: audio_get_dma_pos offset %d\n", offset); + } else { + offset = (runtime->period_size * (s->periods)); + if (offset >= runtime->buffer_size) + offset = 0; + pr_debug("MXC: audio_get_dma_pos BIS offset %d\n", offset); + } + + return offset; +} + +/*! + * This function is called whenever a new audio block needs to be + * transferred to PMIC. The function receives the address and the size + * of the new block and start a new DMA transfer. + * + * @param substream pointer to the structure of the current stream. + * + */ +static void audio_playback_dma(audio_stream_t * s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size = 0; + unsigned int offset; + int ret = 0; + mxc_dma_requestbuf_t dma_request; +#ifdef CONFIG_SND_MXC_PLAYBACK_MIXING + unsigned int dma_size_mix = 0, offset_mix; + mxc_dma_requestbuf_t dma_request_mix; + int ret1 = 0; +#endif + int device; + int stream_id; + + substream = s->stream; + runtime = substream->runtime; + device = substream->pcm->device; + if (device == 0) { + stream_id = 0; + } else if (device == 1) { + stream_id = 2; + } else { + stream_id = 3; + } + + pr_debug("\nDMA direction %d\(0 is playback 1 is capture)\n", + s->stream_id); + +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + +#else + if (stream_id == 2) { + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + } else if (stream_id == 3) { + memset(&dma_request_mix, 0, sizeof(mxc_dma_requestbuf_t)); + } +#endif + if (s->active) { + if (ssi_get_status(s->ssi) & (ssi_transmitter_underrun_0)) { + ssi_enable(s->ssi, false); + ssi_transmit_enable(s->ssi, false); + ssi_enable(s->ssi, true); + } +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + + dma_size = frames_to_bytes(runtime, runtime->period_size); + pr_debug("s->period (%x) runtime->periods (%d)\n", + s->period, runtime->periods); + pr_debug("runtime->period_size (%d) dma_size (%d)\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes); + + offset = dma_size * s->period; + if (snd_BUG_ON(dma_size > DMA_BUF_SIZE)) + return; +#ifdef CONFIG_SND_MXC_PMIC_IRAM + + if (g_audio_iram_en && stream_id == 0) { + dma_request.src_addr = ADMA_BASE_PADDR + offset; + } else +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + { + + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, + dma_size, DMA_TO_DEVICE)); + } + if (stream_id == 0) { + dma_request.dst_addr = + (dma_addr_t) get_ssi_fifo_addr(s->ssi, 1); + } else if (stream_id == 2) { + dma_request.dst_addr = + (dma_addr_t) get_ssi_fifo_addr(s->ssi, 1); + } + dma_request.num_of_bytes = dma_size; + pr_debug("MXC: Start DMA offset (%d) size (%d)\n", + offset, runtime->dma_bytes); + + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); + ret = mxc_dma_enable(s->dma_wchannel); + ssi_transmit_enable(s->ssi, true); + s->tx_spin = 1; /* FGA little trick to retrieve DMA pos */ + + if (ret) { + pr_debug("audio_process_dma: cannot queue DMA buffer\ + (%i)\n", ret); + return; + } + s->period++; + s->period %= runtime->periods; +#else + + if (stream_id == 2) { + dma_size = + frames_to_bytes(runtime, runtime->period_size); + pr_debug("s->period (%x) runtime->periods (%d)\n", + s->period, runtime->periods); + pr_debug("runtime->period_size (%d) dma_size (%d)\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes); + + offset = dma_size * s->period; + if (snd_BUG_ON(dma_size > DMA_BUF_SIZE)) + return; + + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, + dma_size, DMA_TO_DEVICE)); + dma_request.dst_addr = + (dma_addr_t) get_ssi_fifo_addr(s->ssi, 1); + dma_request.num_of_bytes = dma_size; + pr_debug("MXC: Start DMA offset (%d) size (%d)\n", + offset, runtime->dma_bytes); + + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); + ret = mxc_dma_enable(s->dma_wchannel); + ssi_transmit_enable(s->ssi, true); + s->tx_spin = 1; /* FGA little trick to retrieve DMA pos */ + + if (ret) { + pr_debug("audio_process_dma: cannot queue DMA buffer\ + (%i)\n", + ret); + return; + } + s->period++; + s->period %= runtime->periods; + + } else if (stream_id == 3) { + + dma_size_mix = + frames_to_bytes(runtime, runtime->period_size); + pr_debug("s->period (%x) runtime->periods (%d)\n", + s->period, runtime->periods); + pr_debug("runtime->period_size (%d) dma_size (%d)\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes); + + offset_mix = dma_size_mix * s->period; + if (snd_BUG_ON(dma_size_mix > DMA_BUF_SIZE)) + return; + dma_request_mix.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset_mix, + dma_size_mix, DMA_TO_DEVICE)); + dma_request_mix.dst_addr = + (dma_addr_t) get_ssi_fifo_addr(s->ssi, 1); + dma_request_mix.num_of_bytes = dma_size_mix; + + pr_debug("MXC: Start DMA offset (%d) size (%d)\n", + offset_mix, runtime->dma_bytes); + + mxc_dma_config(s->dma_wchannel, &dma_request_mix, 1, + MXC_DMA_MODE_WRITE); + ret1 = mxc_dma_enable(s->dma_wchannel); + ssi_transmit_enable(s->ssi, true); + s->tx_spin = 1; /* FGA little trick to retrieve DMA pos */ + + if (ret1) { + pr_debug("audio_process_dma: cannot queue DMA buffer\ + (%i)\n", + ret1); + return; + } + s->period++; + s->period %= runtime->periods; + + } +#endif +#ifdef MXC_SOUND_PLAYBACK_CHAIN_DMA_EN + + if ((s->period > s->periods) && ((s->period - s->periods) > 1)) { + pr_debug + ("audio playback chain dma: already double buffered\n"); + return; + } + + if ((s->period < s->periods) + && ((s->period + runtime->periods - s->periods) > 1)) { + pr_debug + ("audio playback chain dma: already double buffered\n"); + return; + } + + if (s->period == s->periods) { + pr_debug + ("audio playback chain dma: s->period == s->periods\n"); + return; + } + + if (snd_pcm_playback_hw_avail(runtime) < + 2 * runtime->period_size) { + pr_debug + ("audio playback chain dma: available data is not enough\n"); + return; + } + + pr_debug + ("audio playback chain dma:to set up the 2nd dma buffer\n"); + +#ifndef CONFIG_SND_MXC_PLAYBACK_MIXING + offset = dma_size * s->period; +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if (g_audio_iram_en && stream_id == 0) { + dma_request.src_addr = ADMA_BASE_PADDR + offset; + } else +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + { + + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, + dma_size, DMA_TO_DEVICE)); + } + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); +#else + if (stream_id == 3) { + offset_mix = dma_size_mix * s->period; + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, + runtime->dma_area + offset_mix, + dma_size, DMA_TO_DEVICE)); + + mxc_dma_config(s->dma_wchannel, &dma_request_mix, 1, + MXC_DMA_MODE_WRITE); + } else { + offset = dma_size * s->period; + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, + runtime->dma_area + offset, + dma_size, DMA_TO_DEVICE)); + + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); + } + +#endif + ret = mxc_dma_enable(s->dma_wchannel); + + s->period++; + s->period %= runtime->periods; +#endif /* MXC_SOUND_PLAYBACK_CHAIN_DMA_EN */ + } +} + +/*! + * This function is called whenever a new audio block needs to be + * transferred from PMIC. The function receives the address and the size + * of the block that will store the audio samples and start a new DMA transfer. + * + * @param substream pointer to the structure of the current stream. + * + */ +static void audio_capture_dma(audio_stream_t * s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int offset; + int ret = 0; + mxc_dma_requestbuf_t dma_request; + + substream = s->stream; + runtime = substream->runtime; + + pr_debug("\nDMA direction %d\ + (0 is playback 1 is capture)\n", s->stream_id); + + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + + if (s->active) { + dma_size = frames_to_bytes(runtime, runtime->period_size); + pr_debug("s->period (%x) runtime->periods (%d)\n", + s->period, runtime->periods); + pr_debug("runtime->period_size (%d) dma_size (%d)\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes); + + offset = dma_size * s->period; + snd_BUG_ON(dma_size > DMA_BUF_SIZE); + + dma_request.dst_addr = (dma_addr_t) (dma_map_single(NULL, + runtime-> + dma_area + + offset, + dma_size, + DMA_FROM_DEVICE)); + dma_request.src_addr = + (dma_addr_t) get_ssi_fifo_addr(s->ssi, 0); + dma_request.num_of_bytes = dma_size; + + pr_debug("MXC: Start DMA offset (%d) size (%d)\n", offset, + runtime->dma_bytes); + + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_READ); + ret = mxc_dma_enable(s->dma_wchannel); + + s->tx_spin = 1; /* FGA little trick to retrieve DMA pos */ + + if (ret) { + pr_debug("audio_process_dma: cannot queue DMA buffer\ + (%i)\n", ret); + return; + } + s->period++; + s->period %= runtime->periods; + +#ifdef MXC_SOUND_CAPTURE_CHAIN_DMA_EN + if ((s->period > s->periods) && ((s->period - s->periods) > 1)) { + pr_debug + ("audio capture chain dma: already double buffered\n"); + return; + } + + if ((s->period < s->periods) + && ((s->period + runtime->periods - s->periods) > 1)) { + pr_debug + ("audio capture chain dma: already double buffered\n"); + return; + } + + if (s->period == s->periods) { + pr_debug + ("audio capture chain dma: s->period == s->periods\n"); + return; + } + + if (snd_pcm_capture_hw_avail(runtime) < + 2 * runtime->period_size) { + pr_debug + ("audio capture chain dma: available data is not enough\n"); + return; + } + + pr_debug + ("audio capture chain dma:to set up the 2nd dma buffer\n"); + offset = dma_size * s->period; + dma_request.dst_addr = (dma_addr_t) (dma_map_single(NULL, + runtime-> + dma_area + + offset, + dma_size, + DMA_FROM_DEVICE)); + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_READ); + ret = mxc_dma_enable(s->dma_wchannel); + + s->period++; + s->period %= runtime->periods; +#endif /* MXC_SOUND_CAPTURE_CHAIN_DMA_EN */ + } +} + +/*! + * This is a callback which will be called + * when a TX transfer finishes. The call occurs + * in interrupt context. + * + * @param dat pointer to the structure of the current stream. + * + */ +static void audio_playback_dma_callback(void *data, int error, + unsigned int count) +{ + audio_stream_t *s; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int previous_period; + unsigned int offset; + + s = data; + substream = s->stream; + runtime = substream->runtime; + previous_period = s->periods; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * previous_period; + + s->tx_spin = 0; + s->periods++; + s->periods %= runtime->periods; + + /* + * Give back to the CPU the access to the non cached memory + */ + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_TO_DEVICE); + + /* + * If we are getting a callback for an active stream then we inform + * the PCM middle layer we've finished a period + */ + if (s->active) + snd_pcm_period_elapsed(s->stream); + spin_lock(&s->dma_lock); + + /* + * Trig next DMA transfer + */ + audio_playback_dma(s); + + spin_unlock(&s->dma_lock); + +} + +/*! + * This is a callback which will be called + * when a RX transfer finishes. The call occurs + * in interrupt context. + * + * @param substream pointer to the structure of the current stream. + * + */ +static void audio_capture_dma_callback(void *data, int error, + unsigned int count) +{ + audio_stream_t *s; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int previous_period; + unsigned int offset; + + s = data; + substream = s->stream; + runtime = substream->runtime; + previous_period = s->periods; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * previous_period; + + s->tx_spin = 0; + s->periods++; + s->periods %= runtime->periods; + + /* + * Give back to the CPU the access to the non cached memory + */ + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_FROM_DEVICE); + + /* + * If we are getting a callback for an active stream then we inform + * the PCM middle layer we've finished a period + */ + if (s->active) + snd_pcm_period_elapsed(s->stream); + + spin_lock(&s->dma_lock); + + /* + * Trig next DMA transfer + */ + audio_capture_dma(s); + + spin_unlock(&s->dma_lock); + +} + +/*! + * This function is a dispatcher of command to be executed + * by the driver for playback. + * + * @param substream pointer to the structure of the current stream. + * @param cmd command to be executed + * + * @return 0 on success, -1 otherwise. + */ +static int +snd_mxc_audio_playback_trigger(struct snd_pcm_substream *substream, int cmd) +{ + mxc_pmic_audio_t *chip; + int stream_id; + audio_stream_t *s; + int err; + int device; + device = substream->pcm->device; + if (device == 0) { + stream_id = 0; + } else if (device == 1) { + stream_id = 2; + } else { + stream_id = 3; + } + + chip = snd_pcm_substream_chip(substream); + //stream_id = substream->pstr->stream; + s = &chip->s[stream_id]; + err = 0; + + /* note local interrupts are already disabled in the midlevel code */ + spin_lock(&s->dma_lock); + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + s->tx_spin = 0; + s->active = 1; + audio_playback_dma(s); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + s->active = 0; + break; + default: + err = -EINVAL; + break; + } + spin_unlock(&s->dma_lock); + return err; +} + +/*! + * This function is a dispatcher of command to be executed + * by the driver for capture. + * + * @param substream pointer to the structure of the current stream. + * @param cmd command to be executed + * + * @return 0 on success, -1 otherwise. + */ +static int +snd_mxc_audio_capture_trigger(struct snd_pcm_substream *substream, int cmd) +{ + mxc_pmic_audio_t *chip; + int stream_id; + audio_stream_t *s; + int err; + + chip = snd_pcm_substream_chip(substream); + stream_id = substream->pstr->stream; + s = &chip->s[stream_id]; + err = 0; + + /* note local interrupts are already disabled in the midlevel code */ + spin_lock(&s->dma_lock); + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + s->tx_spin = 0; + s->active = 1; + audio_capture_dma(s); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + s->active = 0; + break; + default: + err = -EINVAL; + break; + } + spin_unlock(&s->dma_lock); + return err; +} + +/*! + * This function configures the hardware to allow audio + * playback operations. It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_playback_prepare(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + int ssi; + int device = -1, stream_id = -1; + + device = substream->pcm->device; + if (device == 0) + stream_id = 0; + else if (device == 1) + stream_id = 2; + else if (device == 2) + stream_id = 3; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[stream_id]; + ssi = s->ssi; + + normalize_speed_for_pmic(substream); + + configure_dam_pmic_master(ssi); + + configure_ssi_tx(substream); + + ssi_interrupt_enable(ssi, ssi_tx_dma_interrupt_enable); + ssi_interrupt_enable(ssi, ssi_tx_interrupt_enable); + + if (configure_pmic_playback(substream, stream_id) == -1) + pr_debug(KERN_ERR "MXC: PMIC Playback Config FAILED\n"); + ssi_interrupt_enable(ssi, ssi_tx_fifo_0_empty); + ssi_interrupt_enable(ssi, ssi_tx_fifo_1_empty); + /* + ssi_transmit_enable(ssi, true); + */ + msleep(20); + set_pmic_channels(substream); + s->period = 0; + s->periods = 0; + + msleep(100); + + return 0; +} + +/*! + * This function gets the current capture pointer position. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + */ +static +snd_pcm_uframes_t snd_mxc_audio_capture_pointer(struct snd_pcm_substream + *substream) +{ + mxc_pmic_audio_t *chip; + + chip = snd_pcm_substream_chip(substream); + return audio_get_capture_dma_pos(&chip->s[substream->pstr->stream]); +} + +/*! + * This function gets the current playback pointer position. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + */ +static snd_pcm_uframes_t +snd_mxc_audio_playback_pointer(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + int device; + int stream_id; + device = substream->pcm->device; + if (device == 0) + stream_id = 0; + else if (device == 1) + stream_id = 2; + else + stream_id = 3; + chip = snd_pcm_substream_chip(substream); + return audio_get_playback_dma_pos(&chip->s[stream_id]); +} + +/*! + * This structure reprensents the capabilities of the driver + * in capture mode. + * It is used by ALSA framework. + */ +static struct snd_pcm_hardware snd_mxc_pmic_capture = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .rate_min = 8000, + .rate_max = 16000, + .channels_min = 1, + .channels_max = 1, + .buffer_bytes_max = MAX_BUFFER_SIZE, + .period_bytes_min = MIN_PERIOD_SIZE, + .period_bytes_max = DMA_BUF_SIZE, + .periods_min = MIN_PERIOD, + .periods_max = MAX_PERIOD, + .fifo_size = 0, + +}; + +/*! + * This structure reprensents the capabilities of the driver + * in playback mode for ST-Dac. + * It is used by ALSA framework. + */ +static struct snd_pcm_hardware snd_mxc_pmic_playback_stereo = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_CONTINUOUS), + .rate_min = 8000, + .rate_max = 96000, + .channels_min = 1, + .channels_max = 2, + .buffer_bytes_max = MAX_BUFFER_SIZE, + .period_bytes_min = MIN_PERIOD_SIZE, + .period_bytes_max = DMA_BUF_SIZE, + .periods_min = MIN_PERIOD, + .periods_max = MAX_PERIOD, + .fifo_size = 0, + +}; + +/*! + * This structure reprensents the capabilities of the driver + * in playback mode for Voice-codec. + * It is used by ALSA framework. + */ +static struct snd_pcm_hardware snd_mxc_pmic_playback_mono = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .rate_min = 8000, + .rate_max = 16000, + .channels_min = 1, + .channels_max = 1, + .buffer_bytes_max = MAX_BUFFER_SIZE, + .period_bytes_min = MIN_PERIOD_SIZE, + .period_bytes_max = DMA_BUF_SIZE, + .periods_min = MIN_PERIOD, + .periods_max = MAX_PERIOD, + .fifo_size = 0, + +}; + +/*! + * This function opens a PMIC audio device in playback mode + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_audio_playback_open(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + struct snd_pcm_runtime *runtime; + int stream_id = -1; + int err; + audio_stream_t *s; + PMIC_AUDIO_HANDLE temp_handle; + int device = -1; + + device = substream->pcm->device; + + chip = snd_pcm_substream_chip(substream); + runtime = substream->runtime; + if (device == 0) + stream_id = 0; + else if (device == 1) + stream_id = 2; + else if (device == 2) { + stream_id = 3; + } + + s = &chip->s[stream_id]; + err = -1; + + if (stream_id == 0) { + if ((audio_data->ssi_num == 1) + && (audio_mixer_control.codec_playback_active + || audio_mixer_control.codec_capture_active)) { + return -EBUSY; + } + + if (PMIC_SUCCESS == pmic_audio_open(&temp_handle, STEREO_DAC)) { + audio_mixer_control.stdac_handle = temp_handle; + audio_mixer_control.stdac_playback_active = 1; + chip->s[stream_id].pmic_audio_device.handle = + temp_handle; + } else { + return -EBUSY; + } + } else if (stream_id == 2) { + if ((audio_data->ssi_num == 1) + && (audio_mixer_control.stdac_playback_active)) { + return -EBUSY; + } + + audio_mixer_control.codec_playback_active = 1; + if (PMIC_SUCCESS == pmic_audio_open(&temp_handle, VOICE_CODEC)) { + audio_mixer_control.voice_codec_handle = temp_handle; + chip->s[stream_id].pmic_audio_device.handle = + temp_handle; + } else { + if (audio_mixer_control.codec_capture_active) { + temp_handle = + audio_mixer_control.voice_codec_handle; + } else { + return -EBUSY; + } + } + + } else if (stream_id == 3) { + audio_mixer_control.mixing_active = 1; + + } + + pmic_audio_antipop_enable(ANTI_POP_RAMP_SLOW); + msleep(250); + + chip->s[stream_id].stream = substream; + + if (stream_id == 0) + runtime->hw = snd_mxc_pmic_playback_stereo; + else if (stream_id == 2) + runtime->hw = snd_mxc_pmic_playback_mono; + + else if (stream_id == 3) { + runtime->hw = snd_mxc_pmic_playback_mono; + + if ((err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_playback_rates_mono)) + < 0) + return err; + } +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if (g_audio_iram_en && stream_id == 0) { + runtime->hw.buffer_bytes_max = MAX_IRAM_SIZE; + runtime->hw.period_bytes_max = DMA_IRAM_SIZE; + } +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + + if ((err = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS)) < + 0) + goto exit_err; + if (stream_id == 0) { + if ((err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_playback_rates_stereo)) + < 0) + goto exit_err; + + } else if (stream_id == 2) { + if ((err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_playback_rates_mono)) + < 0) + goto exit_err; + } + msleep(10); + + /* setup DMA controller for playback */ + if ((err = + configure_write_channel(&mxc_audio->s[stream_id], + audio_playback_dma_callback, + stream_id)) < 0) + goto exit_err; + + /* enable ssi clock */ + clk_enable(audio_data->ssi_clk[s->ssi]); + + return 0; + exit_err: +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if (stream_id == 0) + mxc_snd_pcm_iram_put(); +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + return err; + +} + +/*! + * This function closes an PMIC audio device for playback. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_audio_playback_close(struct snd_pcm_substream + *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + PMIC_AUDIO_HANDLE handle; + int ssi; + int device, stream_id = -1; + handle = (PMIC_AUDIO_HANDLE) NULL; + device = substream->pcm->device; + if (device == 0) { + stream_id = 0; + } else if (device == 1) { + stream_id = 2; + } else + stream_id = 3; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[stream_id]; + ssi = s->ssi; + + if (audio_mixer_control.mixing_active == 1) { + goto End; + + } else { + + if (stream_id == 0) { + disable_stereodac(); + audio_mixer_control.stdac_playback_active = 0; + handle = audio_mixer_control.stdac_handle; + audio_mixer_control.stdac_handle = NULL; + chip->s[stream_id].pmic_audio_device.handle = NULL; + } else if ((stream_id == 2) || (stream_id == 3)) { + + audio_mixer_control.codec_playback_active = 0; + handle = audio_mixer_control.voice_codec_handle; + disable_codec(handle); + audio_mixer_control.voice_codec_handle = NULL; + chip->s[stream_id].pmic_audio_device.handle = NULL; + } + + } + pmic_audio_close(handle); + + ssi_transmit_enable(ssi, false); + ssi_interrupt_disable(ssi, ssi_tx_dma_interrupt_enable); + ssi_tx_fifo_enable(ssi, ssi_fifo_0, false); + ssi_enable(ssi, false); + mxc_dma_free((mxc_audio->s[stream_id]).dma_wchannel); + + chip->s[stream_id].stream = NULL; + End: + audio_mixer_control.mixing_active = 0; +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if (stream_id == 0) + mxc_snd_pcm_iram_put(); +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + /* disable ssi clock */ + clk_disable(audio_data->ssi_clk[ssi]); + + return 0; +} + +/*! + * This function closes a PMIC audio device for capture. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_audio_capture_close(struct snd_pcm_substream *substream) +{ + PMIC_AUDIO_HANDLE handle; + mxc_pmic_audio_t *chip; + audio_stream_t *s; + int ssi; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[substream->pstr->stream]; + ssi = s->ssi; + + audio_mixer_control.codec_capture_active = 0; + handle = audio_mixer_control.voice_codec_handle; + disable_codec(handle); + audio_mixer_control.voice_codec_handle = NULL; + chip->s[SNDRV_PCM_STREAM_CAPTURE].pmic_audio_device.handle = NULL; + + pmic_audio_close(handle); + + ssi_receive_enable(ssi, false); + ssi_interrupt_disable(ssi, ssi_rx_dma_interrupt_enable); + ssi_rx_fifo_enable(ssi, ssi_fifo_0, false); + ssi_enable(ssi, false); + mxc_dma_free((mxc_audio->s[1]).dma_wchannel); + + chip->s[substream->pstr->stream].stream = NULL; + + /* disable ssi clock */ + clk_disable(audio_data->ssi_clk[ssi]); + + return 0; +} + +/*! + * This function configure the Audio HW in terms of memory allocation. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params) +{ + struct snd_pcm_runtime *runtime; + int ret = 0, size; + int device, stream_id = -1; +#ifdef CONFIG_SND_MXC_PMIC_IRAM + struct snd_dma_buffer *dmab; +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + + runtime = substream->runtime; + ret = + snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); + if (ret < 0) + return ret; + size = params_buffer_bytes(hw_params); + device = substream->pcm->device; + if (device == 0) + stream_id = 0; + else if (device == 1) + stream_id = 2; + + runtime->dma_addr = virt_to_phys(runtime->dma_area); + +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) && g_audio_iram_en + && stream_id == 0) { + if (runtime->dma_buffer_p + && (runtime->dma_buffer_p != &g_iram_dmab)) { + snd_pcm_lib_free_pages(substream); + } + dmab = &g_iram_dmab; + dmab->dev = substream->dma_buffer.dev; + dmab->area = (char *)ADMA_BASE_VADDR; + dmab->addr = ADMA_BASE_PADDR; + dmab->bytes = size; + snd_pcm_set_runtime_buffer(substream, dmab); + runtime->dma_bytes = size; + } else +#endif /* CONFIG_SND_MXC_PMIC_IRAM */ + { + ret = snd_pcm_lib_malloc_pages(substream, size); + if (ret < 0) + return ret; + + runtime->dma_addr = virt_to_phys(runtime->dma_area); + } + + pr_debug("MXC: snd_mxc_audio_hw_params runtime->dma_addr 0x(%x)\n", + (unsigned int)runtime->dma_addr); + pr_debug("MXC: snd_mxc_audio_hw_params runtime->dma_area 0x(%x)\n", + (unsigned int)runtime->dma_area); + pr_debug("MXC: snd_mxc_audio_hw_params runtime->dma_bytes 0x(%x)\n", + (unsigned int)runtime->dma_bytes); + + return ret; +} + +/*! + * This function frees the audio hardware at the end of playback/capture. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_hw_free(struct snd_pcm_substream *substream) +{ +#ifdef CONFIG_SND_MXC_PMIC_IRAM + if (substream->runtime->dma_buffer_p == &g_iram_dmab) { + snd_pcm_set_runtime_buffer(substream, NULL); + return 0; + } else +#endif /* CONFIG_SND_MXC_PMIC_IRAM */ + { + return snd_pcm_lib_free_pages(substream); + } + return 0; +} + +/*! + * This function configures the hardware to allow audio + * capture operations. It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_capture_prepare(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + audio_stream_t *s; + int ssi; + + chip = snd_pcm_substream_chip(substream); + s = &chip->s[substream->pstr->stream]; + ssi = s->ssi; + + normalize_speed_for_pmic(substream); + + pr_debug("substream->pstr->stream %d\n", substream->pstr->stream); + pr_debug("SSI %d\n", ssi + 1); + configure_dam_pmic_master(ssi); + + configure_ssi_rx(substream); + + ssi_interrupt_enable(ssi, ssi_rx_dma_interrupt_enable); + + if (configure_pmic_recording(substream) == -1) + pr_debug(KERN_ERR "MXC: PMIC Record Config FAILED\n"); + + ssi_interrupt_enable(ssi, ssi_rx_fifo_0_full); + ssi_receive_enable(ssi, true); + + msleep(20); + set_pmic_channels(substream); + + s->period = 0; + s->periods = 0; + + return 0; +} + +/*! + * This function opens an PMIC audio device in capture mode + * on Codec. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_audio_capture_open(struct snd_pcm_substream *substream) +{ + mxc_pmic_audio_t *chip; + struct snd_pcm_runtime *runtime; + int stream_id; + int err; + PMIC_AUDIO_HANDLE temp_handle; + audio_stream_t *s; + + chip = snd_pcm_substream_chip(substream); + runtime = substream->runtime; + stream_id = substream->pstr->stream; + s = &chip->s[stream_id]; + err = -1; + + if ((audio_data->ssi_num == 1) + && (audio_mixer_control.stdac_playback_active)) { + return -EBUSY; + } + if (PMIC_SUCCESS == pmic_audio_open(&temp_handle, VOICE_CODEC)) { + audio_mixer_control.voice_codec_handle = temp_handle; + audio_mixer_control.codec_capture_active = 1; + chip->s[SNDRV_PCM_STREAM_CAPTURE].pmic_audio_device.handle = + temp_handle; + } else { + if (audio_mixer_control.codec_playback_active) { + temp_handle = audio_mixer_control.voice_codec_handle; + } else { + return -EBUSY; + } + } + pmic_audio_antipop_enable(ANTI_POP_RAMP_SLOW); + + chip->s[stream_id].stream = substream; + + if (stream_id == SNDRV_PCM_STREAM_CAPTURE) { + runtime->hw = snd_mxc_pmic_capture; + } else { + return err; + } + + if ((err = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS)) < + 0) { + return err; + } + + if ((err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_capture_rates)) < 0) { + return err; + } + + /* setup DMA controller for Record */ + err = configure_read_channel(&mxc_audio->s[SNDRV_PCM_STREAM_CAPTURE], + audio_capture_dma_callback); + if (err < 0) { + return err; + } + + /* enable ssi clock */ + clk_enable(audio_data->ssi_clk[s->ssi]); + + msleep(50); + + return 0; +} + +#ifdef CONFIG_SND_MXC_PMIC_IRAM +static struct page *snd_mxc_audio_playback_nopage(struct vm_area_struct *area, + unsigned long address, + int *type) +{ + struct snd_pcm_substream *substream = area->vm_private_data; + struct snd_pcm_runtime *runtime; + unsigned long offset; + struct page *page; + void *vaddr; + size_t dma_bytes; + + if (substream == NULL) + return NOPAGE_OOM; + runtime = substream->runtime; + if (g_audio_iram_en) { + return NOPAGE_SIGBUS; + } + offset = area->vm_pgoff << PAGE_SHIFT; + offset += address - area->vm_start; + if (snd_BUG_ON(offset % PAGE_SIZE) != 0) + return NOPAGE_OOM; + dma_bytes = PAGE_ALIGN(runtime->dma_bytes); + if (offset > dma_bytes - PAGE_SIZE) + return NOPAGE_SIGBUS; + if (substream->ops->page) { + page = substream->ops->page(substream, offset); + if (!page) + return NOPAGE_OOM; + } else { + vaddr = runtime->dma_area + offset; + page = virt_to_page(vaddr); + } + get_page(page); + if (type) + *type = VM_FAULT_MINOR; + return page; +} + +static struct vm_operations_struct snd_mxc_audio_playback_vm_ops = { + .open = snd_pcm_mmap_data_open, + .close = snd_pcm_mmap_data_close, + .nopage = snd_mxc_audio_playback_nopage, +}; + +#ifdef CONFIG_ARCH_MX3 +static inline int snd_mxc_set_pte_attr(struct mm_struct *mm, + pmd_t * pmd, + unsigned long addr, unsigned long end) +{ + + pte_t *pte; + spinlock_t *ptl; + pte = pte_alloc_map_lock(mm, pmd, addr, &ptl); + + if (!pte) + return -ENOMEM; + do { + BUG_ON(pte_none(*pte)); //The mapping is created. It should not be none. + *(pte - 512) |= 0x83; //Directly modify to non-shared device + } while (pte++, addr += PAGE_SIZE, addr != end); + + pte_unmap_unlock(pte - 1, ptl); + + return 0; + +} + +static int snd_mxc_set_pmd_attr(struct mm_struct *mm, + pud_t * pud, + unsigned long addr, unsigned long end) +{ + + pmd_t *pmd; + unsigned long next; + pmd = pmd_alloc(mm, pud, addr); + + if (!pmd) + return -ENOMEM; + do { + + next = pmd_addr_end(addr, end); + if (snd_mxc_set_pte_attr(mm, pmd, addr, next)) + return -ENOMEM; + + } while (pmd++, addr = next, addr != end); + + return 0; + +} + +static int snd_mxc_set_pud_attr(struct mm_struct *mm, + pgd_t * pgd, + unsigned long addr, unsigned long end) +{ + + pud_t *pud; + unsigned long next; + pud = pud_alloc(mm, pgd, addr); + + if (!pud) + return -ENOMEM; + do { + + next = pud_addr_end(addr, end); + if (snd_mxc_set_pmd_attr(mm, pud, addr, next)) + return -ENOMEM; + + } while (pud++, addr = next, addr != end); + + return 0; + +} + +static inline int snd_mxc_set_pgd_attr(struct vm_area_struct *area) +{ + + int ret = 0; + pgd_t *pgd; + struct mm_struct *mm = current->mm; + unsigned long next, addr = area->vm_start; + + pgd = pgd_offset(mm, addr); + flush_cache_range(area, addr, area->vm_end); + + do { + if (!pgd_present(*pgd)) + return -1; + + next = pgd_addr_end(addr, area->vm_end); + if ((ret = snd_mxc_set_pud_attr(mm, pgd, addr, next))) + break; + + } while (pgd++, addr = next, addr != area->vm_end); + + return ret; + +} + +#else +#define snd_mxc_set_page_attr() (0) +#endif + +static int snd_mxc_audio_playback_mmap(struct snd_pcm_substream *substream, + struct vm_area_struct *area) +{ + int ret = 0; + area->vm_ops = &snd_mxc_audio_playback_vm_ops; + area->vm_private_data = substream; + if (g_audio_iram_en) { + unsigned long off = area->vm_pgoff << PAGE_SHIFT; + unsigned long phys = ADMA_BASE_PADDR + off; + unsigned long size = area->vm_end - area->vm_start; + if (off + size > MAX_IRAM_SIZE) { + return -EINVAL; + } + area->vm_page_prot = pgprot_nonshareddev(area->vm_page_prot); + area->vm_flags |= VM_IO; + ret = + remap_pfn_range(area, area->vm_start, phys >> PAGE_SHIFT, + size, area->vm_page_prot); + if (ret == 0) { + ret = snd_mxc_set_pgd_attr(area); + } + + } else { + area->vm_flags |= VM_RESERVED; + } + if (ret == 0) + area->vm_ops->open(area); + return ret; +} + +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ + +/*! + * This structure is the list of operation that the driver + * must provide for the capture interface + */ +static struct snd_pcm_ops snd_card_mxc_audio_capture_ops = { + .open = snd_card_mxc_audio_capture_open, + .close = snd_card_mxc_audio_capture_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_mxc_audio_hw_params, + .hw_free = snd_mxc_audio_hw_free, + .prepare = snd_mxc_audio_capture_prepare, + .trigger = snd_mxc_audio_capture_trigger, + .pointer = snd_mxc_audio_capture_pointer, +}; + +/*! + * This structure is the list of operation that the driver + * must provide for the playback interface + */ +static struct snd_pcm_ops snd_card_mxc_audio_playback_ops = { + .open = snd_card_mxc_audio_playback_open, + .close = snd_card_mxc_audio_playback_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_mxc_audio_hw_params, + .hw_free = snd_mxc_audio_hw_free, + .prepare = snd_mxc_audio_playback_prepare, + .trigger = snd_mxc_audio_playback_trigger, + .pointer = snd_mxc_audio_playback_pointer, +#ifdef CONFIG_SND_MXC_PMIC_IRAM + .mmap = snd_mxc_audio_playback_mmap, +#endif /*CONFIG_SND_MXC_PMIC_IRAM */ +}; + +/*! + * This functions initializes the capture audio device supported by + * PMIC IC. + * + * @param mxc_audio pointer to the sound card structure + * + */ +void init_device_capture(mxc_pmic_audio_t * mxc_audio) +{ + audio_stream_t *audio_stream; + pmic_audio_device_t *pmic_device; + + audio_stream = &mxc_audio->s[SNDRV_PCM_STREAM_CAPTURE]; + pmic_device = &audio_stream->pmic_audio_device; + + /* These parameters defines the identity of + * the device (codec or stereodac) + */ + audio_stream->ssi = SSI1; + audio_stream->dam_port = DAM_PORT_4; + pmic_device->ssi = SSI1; + + pmic_device->mode = BUS_MASTER_MODE; + pmic_device->protocol = NETWORK_MODE; + +#ifdef CONFIG_MXC_PMIC_SC55112 + pmic_device->pll = CLOCK_IN_CLKIN; + pmic_device->pll_rate = VCODEC_CLI_33_6MHZ; +#else + if (machine_is_mx31ads()) { + pmic_device->pll = CLOCK_IN_CLIB; + } else { + pmic_device->pll = CLOCK_IN_CLIA; + } + pmic_device->pll_rate = VCODEC_CLI_26MHZ; +#endif + pmic_device->bcl_inverted = 0; + pmic_device->fs_inverted = 0; + +} + +/*! + * This functions initializes the playback audio device supported by + * PMIC IC. + * + * @param mxc_audio pointer to the sound card structure. + * @param device device ID of PCM instance. + * + */ +void init_device_playback(mxc_pmic_audio_t * mxc_audio, int device) +{ + audio_stream_t *audio_stream; + pmic_audio_device_t *pmic_device; + if (device == 0) + audio_stream = &mxc_audio->s[0]; + else + audio_stream = &mxc_audio->s[2]; + pmic_device = &audio_stream->pmic_audio_device; + + /* These parameters defines the identity of + * the device (codec or stereodac) + */ + if (device == 0) { + if (audio_data->ssi_num == 2) { + audio_stream->ssi = SSI2; + audio_stream->dam_port = DAM_PORT_5; + pmic_device->ssi = SSI2; + } else { + audio_stream->ssi = SSI1; + audio_stream->dam_port = DAM_PORT_4; + pmic_device->ssi = SSI1; + } + + pmic_device->mode = BUS_MASTER_MODE; + pmic_device->protocol = NETWORK_MODE; + +#ifdef CONFIG_MXC_PMIC_SC55112 + pmic_device->pll = CLOCK_IN_CLKIN; + pmic_device->pll_rate = STDAC_CLI_33_6MHZ; +#else + if (machine_is_mx31ads()) { + pmic_device->pll = CLOCK_IN_CLIB; + } else { + pmic_device->pll = CLOCK_IN_CLIA; + } + pmic_device->pll_rate = STDAC_CLI_26MHZ; +#endif + + pmic_device->bcl_inverted = 0; + pmic_device->fs_inverted = 0; + + } else if ((device == 1) || (device == 2)) { + audio_stream->ssi = SSI1; + audio_stream->dam_port = DAM_PORT_4; + pmic_device->ssi = SSI1; + + pmic_device->mode = BUS_MASTER_MODE; + pmic_device->protocol = NETWORK_MODE; + +#ifdef CONFIG_MXC_PMIC_SC55112 + pmic_device->pll = CLOCK_IN_CLKIN; + pmic_device->pll_rate = VCODEC_CLI_33_6MHZ; +#else + if (machine_is_mx31ads()) { + pmic_device->pll = CLOCK_IN_CLIB; + } else { + pmic_device->pll = CLOCK_IN_CLIA; + } + pmic_device->pll_rate = VCODEC_CLI_26MHZ; +#endif + pmic_device->bcl_inverted = 0; + pmic_device->fs_inverted = 0; + } + +} + +/*! + * This functions initializes the mixer related information + * + * @param mxc_audio pointer to the sound card structure. + * + */ +void mxc_pmic_mixer_controls_init(mxc_pmic_audio_t * mxc_audio) +{ + audio_mixer_control_t *audio_control; + int i = 0; + + audio_control = &audio_mixer_control; + + memset(audio_control, 0, sizeof(audio_mixer_control_t)); + sema_init(&audio_control->sem, 1); + + audio_control->input_device = SOUND_MASK_MIC; + audio_control->output_device = SOUND_MASK_VOLUME | SOUND_MASK_PCM; + + /* PMIC has to internal sources that can be routed to output + One is codec direct out and the other is mixer out + Initially we configure all outputs to have no source and + will be later configured either by PCM stream handler or mixer */ + for (i = 0; i < OP_MAXDEV && i != OP_HEADSET; i++) { + audio_control->source_for_output[i] = MIXER_OUT; + } + + /* These bits are initially reset and set when playback begins */ + audio_control->codec_out_to_mixer = 0; + audio_control->stdac_out_to_mixer = 0; + + audio_control->mixer_balance = 50; + if (machine_is_mx31ads()) + audio_control->mixer_mono_adder = STEREO_OPPOSITE_PHASE; + else + audio_control->mixer_mono_adder = MONO_ADDER_OFF; + /* Default values for input and output */ + audio_control->input_volume = ((40 << 8) & 0xff00) | (40 & 0x00ff); + audio_control->master_volume_out = ((50 << 8) & 0xff00) | (50 & 0x00ff); + + if (PMIC_SUCCESS != pmic_audio_set_autodetect(1)) + msleep(30); +} + +/*! + * This functions initializes the 2 audio devices supported by + * PMIC IC. The parameters define the type of device (CODEC or STEREODAC) + * + * @param mxc_audio pointer to the sound card structure. + * @param device device id of the PCM stream. + * + */ +void mxc_pmic_audio_init(mxc_pmic_audio_t * mxc_audio, int device) +{ + if (device == 0) { + mxc_audio->s[SNDRV_PCM_STREAM_PLAYBACK].id = "Audio out"; + mxc_audio->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = + SNDRV_PCM_STREAM_PLAYBACK; + mxc_audio->s[SNDRV_PCM_STREAM_CAPTURE].id = "Audio in"; + mxc_audio->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = + SNDRV_PCM_STREAM_CAPTURE; + } else if (device == 1) { + mxc_audio->s[2].id = "Audio out"; + mxc_audio->s[2].stream_id = 2; + } else if (device == 2) { + mxc_audio->s[2].id = "Audio out"; + mxc_audio->s[2].stream_id = 3; + } + + init_device_playback(mxc_audio, device); + if (!device) { + init_device_capture(mxc_audio); + } +} + +/*! + * This function the soundcard structure. + * + * @param mxc_audio pointer to the sound card structure. + * @param device the device index (zero based) + * + * @return 0 on success, -1 otherwise. + */ +static int __devinit snd_card_mxc_audio_pcm(mxc_pmic_audio_t *mxc_audio, + int device) +{ + struct snd_pcm *pcm; + int err; + + /* + * Create a new PCM instance with 1 capture stream and 1 playback substream + */ + if ((err = snd_pcm_new(mxc_audio->card, "MXC", device, 1, 1, &pcm)) < 0) { + return err; + } + + /* + * this sets up our initial buffers and sets the dma_type to isa. + * isa works but I'm not sure why (or if) it's the right choice + * this may be too large, trying it for now + */ + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, + snd_dma_continuous_data + (GFP_KERNEL), MAX_BUFFER_SIZE * 2, + MAX_BUFFER_SIZE * 2); + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, + &snd_card_mxc_audio_playback_ops); + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, + &snd_card_mxc_audio_capture_ops); + + pcm->private_data = mxc_audio; + pcm->info_flags = 0; + strncpy(pcm->name, SOUND_CARD_NAME, sizeof(pcm->name)); + mxc_audio->pcm[device] = pcm; + mxc_pmic_audio_init(mxc_audio, device); + + /* Allocating a second device for PCM playback on voice codec */ + device = 1; + if ((err = snd_pcm_new(mxc_audio->card, "MXC", device, 1, 0, &pcm)) < 0) { + return err; + } + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, + snd_dma_continuous_data + (GFP_KERNEL), MAX_BUFFER_SIZE * 2, + MAX_BUFFER_SIZE * 2); + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, + &snd_card_mxc_audio_playback_ops); + pcm->private_data = mxc_audio; + pcm->info_flags = 0; + strncpy(pcm->name, SOUND_CARD_NAME, sizeof(pcm->name)); + mxc_audio->pcm[device] = pcm; + mxc_pmic_audio_init(mxc_audio, device); + + device = 2; + if ((err = snd_pcm_new(mxc_audio->card, "MXC", device, 1, 0, &pcm)) < 0) { + return err; + } + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, + snd_dma_continuous_data + (GFP_KERNEL), MAX_BUFFER_SIZE * 2, + MAX_BUFFER_SIZE * 2); + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, + &snd_card_mxc_audio_playback_ops); + pcm->private_data = mxc_audio; + pcm->info_flags = 0; + strncpy(pcm->name, SOUND_CARD_NAME, sizeof(pcm->name)); + mxc_audio->pcm[device] = pcm; + + /* End of allocation */ + /* FGA for record and not hard coded playback */ + mxc_pmic_mixer_controls_init(mxc_audio); + + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function suspends all active streams. + * + * TBD + * + * @param card pointer to the sound card structure. + * @param state requested state + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_suspend(struct platform_device *dev, + pm_message_t state) +{ + struct snd_card *card = platform_get_drvdata(dev); + mxc_pmic_audio_t *chip = card->private_data; + + snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); + snd_pcm_suspend_all(chip->pcm[0]); + //mxc_alsa_audio_shutdown(chip); + + return 0; +} + +/*! + * This function resumes all suspended streams. + * + * TBD + * + * @param card pointer to the sound card structure. + * @param state requested state + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_audio_resume(struct platform_device *dev) +{ + struct snd_card *card = platform_get_drvdata(dev); + + snd_power_change_state(card, SNDRV_CTL_POWER_D0); + + return 0; +} +#endif /* COMFIG_PM */ + +/*! + * This function frees the sound card structure + * + * @param card pointer to the sound card structure. + * + * @return 0 on success, -1 otherwise. + */ +void snd_mxc_audio_free(struct snd_card *card) +{ + mxc_pmic_audio_t *chip; + + chip = card->private_data; + audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]); + audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]); + mxc_audio = NULL; + card->private_data = NULL; + kfree(chip); + +} + +/*! + * This function initializes the driver in terms of memory of the soundcard + * and some basic HW clock settings. + * + * @return 0 on success, -1 otherwise. + */ +static int __devinit mxc_alsa_audio_probe(struct platform_device *pdev) +{ + int err; + struct snd_card *card; + + audio_data = (struct mxc_audio_platform_data *)pdev->dev.platform_data; + if (!audio_data) { + dev_err(&pdev->dev, "Can't get the platform data for ALSA\n"); + return -EINVAL; + } + /* register the soundcard */ + err = snd_card_create(-1, id, THIS_MODULE, sizeof(mxc_pmic_audio_t), &card); + if (err < 0) { + return -ENOMEM; + } + + mxc_audio = kcalloc(1, sizeof(*mxc_audio), GFP_KERNEL); + if (mxc_audio == NULL) { + return -ENOMEM; + } + + card->private_data = (void *)mxc_audio; + card->private_free = snd_mxc_audio_free; + + mxc_audio->card = card; + card->dev = &pdev->dev; + if ((err = snd_card_mxc_audio_pcm(mxc_audio, 0)) < 0) { + goto nodev; + } + + if (0 == mxc_alsa_create_ctl(card, (void *)&audio_mixer_control)) + printk(KERN_INFO "Control ALSA component registered\n"); + +#ifdef CONFIG_HEADSET_DETECT_ENABLE + pmic_audio_antipop_enable(ANTI_POP_RAMP_SLOW); + pmic_audio_set_callback((PMIC_AUDIO_CALLBACK) HSCallback, + HEADSET_DETECTED | HEADSET_REMOVED, &hs_state); +#endif + /* Set autodetect feature in order to allow audio operations */ + + spin_lock_init(&(mxc_audio->s[0].dma_lock)); + spin_lock_init(&(mxc_audio->s[1].dma_lock)); + spin_lock_init(&(mxc_audio->s[2].dma_lock)); + + strcpy(card->driver, "MXC"); + strcpy(card->shortname, "PMIC-audio"); + sprintf(card->longname, "MXC Freescale with PMIC"); + + if ((err = snd_card_register(card)) == 0) { + pr_debug(KERN_INFO "MXC audio support initialized\n"); + platform_set_drvdata(pdev, card); + return 0; + } + + nodev: + snd_card_free(card); + return err; +} + +static int __devexit mxc_alsa_audio_remove(struct platform_device *dev) +{ + snd_card_free(mxc_audio->card); + kfree(mxc_audio); + platform_set_drvdata(dev, NULL); + + return 0; +} + +static struct platform_driver mxc_alsa_audio_driver = { + .probe = mxc_alsa_audio_probe, + .remove = __devexit_p(mxc_alsa_audio_remove), +#ifdef CONFIG_PM + .suspend = snd_mxc_audio_suspend, + .resume = snd_mxc_audio_resume, +#endif + .driver = { + .name = "mxc_alsa", + }, +}; + +static int __init mxc_alsa_audio_init(void) +{ + return platform_driver_register(&mxc_alsa_audio_driver); +} + +/*! + * This function frees the sound driver structure. + * + */ + +static void __exit mxc_alsa_audio_exit(void) +{ + platform_driver_unregister(&mxc_alsa_audio_driver); +} + +module_init(mxc_alsa_audio_init); +module_exit(mxc_alsa_audio_exit); + +MODULE_AUTHOR("FREESCALE SEMICONDUCTOR"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MXC driver for ALSA"); +MODULE_SUPPORTED_DEVICE("{{PMIC}}"); + +module_param(id, charp, 0444); +MODULE_PARM_DESC(id, "ID string for MXC + PMIC soundcard."); --- linux-fsl-imx51-2.6.31.orig/sound/arm/mxc-alsa-pmic.h +++ linux-fsl-imx51-2.6.31/sound/arm/mxc-alsa-pmic.h @@ -0,0 +1,110 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /*! + * @file mxc-alsa-pmic.h + * @brief + * @ingroup SOUND_DRV + */ + +#ifndef __MXC_ALSA_PMIC_H__ +#define __MXC_ALSA_PMIC_H__ + +#ifdef __KERNEL__ + + /**/ +#define PMIC_MASTER 0x1 +#define PMIC_SLAVE 0x2 + /**/ +#define DAM_PORT_4 port_4 +#define DAM_PORT_5 port_5 + /**/ +#define PMIC_STEREODAC 0x1 +#define PMIC_CODEC 0x2 + /**/ +#define PMIC_AUDIO_ADDER_STEREO 0x1 +#define PMIC_AUDIO_ADDER_STEREO_OPPOSITE 0x2 +#define PMIC_AUDIO_ADDER_MONO 0x4 +#define PMIC_AUDIO_ADDER_MONO_OPPOSITE 0x8 +#define TX_WATERMARK 0x4 +#define RX_WATERMARK 0x6 + /**/ +#define SSI_DEFAULT_FIFO 0x0 +#define DEFAULT_MASTER_CLOCK 0x1 + /**/ +#define SDMA_TXFIFO_WATERMARK 0x4 +#define SDMA_RXFIFO_WATERMARK 0x6 + /**/ +#define TIMESLOTS_2 0x3 +#define TIMESLOTS_4 0x2 +#define SAMPLE_RATE_MAX 0x9 + /**/ +#define CLK_SELECT_SLAVE_BCL 0x7 +#define CLK_SELECT_SLAVE_CLI 0x5 +#define CLK_SELECT_MASTER_CLI 0x4 +/* Volume to balance ratio */ +#define VOLUME_BALANCE_RATIO ((6 + 39) / (21 + 21)) +/* -21dB */ +#define PMIC_BALANCE_MIN 0x0 +/* 0dB*/ +#define PMIC_BALANCE_MAX 0x7 +/* -21dB left */ +#define BALANCE_MIN 0x0 +/* 0db, no balance */ +#define NO_BALANCE 0x32 +/* -21dB right*/ +#define BALANCE_MAX 0x64 +/* -8dB */ +#define PMIC_INPUT_VOLUME_MIN 0x0 +/* +23dB */ +#define PMIC_INPUT_VOLUME_MAX 0x1f +/* -39dB */ +#define PMIC_OUTPUT_VOLUME_MIN PMIC_INPUT_VOLUME_MIN +/* +6dB */ +#define PMIC_OUTPUT_VOLUME_MAX 0xd +/* -8dB */ +#define INPUT_VOLUME_MIN 0x0 +/* +23dB */ +#define INPUT_VOLUME_MAX 0x64 +/* -39dB */ +#define OUTPUT_VOLUME_MIN 0x0 +/* +6dB */ +#define OUTPUT_VOLUME_MAX 0x64 +/* 96 Khz */ +#define SAMPLE_FREQ_MAX 96000 +/* 8 Khz */ +#define SAMPLE_FREQ_MIN 8000 +/*! + * Define channels available on MC13783. This is mainly used + * in mixer interface to control different input/output + * devices + */ +#define MXC_STEREO_OUTPUT ( SOUND_MASK_VOLUME | SOUND_MASK_PCM ) +#define MXC_STEREO_INPUT ( SOUND_MASK_PHONEIN ) +#define MXC_MONO_OUTPUT ( SOUND_MASK_PHONEOUT | SOUND_MASK_SPEAKER ) +#define MXC_MONO_INPUT ( SOUND_MASK_LINE | SOUND_MASK_MIC ) +#define SNDCTL_CLK_SET_MASTER _SIOR('Z', 30, int) +#define SNDCTL_PMIC_READ_OUT_BALANCE _SIOR('Z', 8, int) +//#define SNDCTL_MC13783_WRITE_OUT_BALANCE _SIOWR('Z', 9, int) +#define SNDCTL_PMIC_WRITE_OUT_ADDER _SIOWR('Z', 10, int) +#define SNDCTL_PMIC_READ_OUT_ADDER _SIOR('Z', 11, int) +#define SNDCTL_PMIC_WRITE_CODEC_FILTER _SIOWR('Z', 12, int) +#define SNDCTL_PMIC_READ_CODEC_FILTER _SIOR('Z', 13, int) +#define SNDCTL_DAM_SET_OUT_PORT _SIOWR('Z', 14, int) +#endif /* __KERNEL__ */ +#endif /* __MXC_ALSA_PMIC_H__ */ --- linux-fsl-imx51-2.6.31.orig/sound/arm/Makefile +++ linux-fsl-imx51-2.6.31/sound/arm/Makefile @@ -14,3 +14,14 @@ obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o snd-pxa2xx-ac97-objs := pxa2xx-ac97.o + +# +# Define the header file locations for PMIC drivers. +# +CFLAGS_mxc-alsa-pmic.o = -I$(srctree)/drivers/mxc +obj-$(CONFIG_SND_MXC_PMIC) += snd-mxc-alsa.o +snd-mxc-alsa-objs := mxc-alsa-pmic.o mxc-alsa-mixer.o + +CFLGS_mxc_alsa_spdif.o = -I$(TOPDIR)/drivers/mxc +obj-$(CONFIG_SND_MXC_SPDIF) += snd-spdif.o +snd-spdif-objs := mxc-alsa-spdif.o --- linux-fsl-imx51-2.6.31.orig/sound/arm/mxc-alsa-common.h +++ linux-fsl-imx51-2.6.31/sound/arm/mxc-alsa-common.h @@ -0,0 +1,68 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file mxc-alsa-common.h + * @brief + * @ingroup SOUND_DRV + */ + +#ifndef __MXC_ALSA_COMMON_H__ +#define __MXC_ALSA_COMMON_H__ + +/* Enums typically used by the Mixer support APIs + * Emunerates IP, OP and mixer sources. + */ + +typedef enum { + CODEC_DIR_OUT, + MIXER_OUT +} OUTPUT_SOURCE; + +typedef enum { + OP_NODEV = -1, + OP_EARPIECE, + OP_HANDSFREE, + OP_HEADSET, + OP_LINEOUT, + OP_MAXDEV, + OP_MONO +} OUTPUT_DEVICES; + +typedef enum { + IP_NODEV = -1, + IP_HANDSET, + IP_HEADSET, + IP_LINEIN, + IP_MAXDEV +} INPUT_DEVICES; + +extern int mxc_alsa_create_ctl(struct snd_card *card, void *p_value); + +extern int set_mixer_output_device(PMIC_AUDIO_HANDLE handle, OUTPUT_SOURCE src, + OUTPUT_DEVICES dev, bool enable); +extern int set_mixer_output_volume(PMIC_AUDIO_HANDLE handle, int volume, + OUTPUT_DEVICES dev); +extern int set_mixer_input_device(PMIC_AUDIO_HANDLE handle, INPUT_DEVICES dev, + bool enable); +extern int set_mixer_output_mono_adder(PMIC_AUDIO_MONO_ADDER_MODE mode); +extern int set_mixer_input_gain(PMIC_AUDIO_HANDLE handle, int val); +extern int set_mixer_output_balance(int bal); + +extern int get_mixer_output_device(void); +extern int get_mixer_output_volume(void); +extern int get_mixer_output_mono_adder(void); +extern int get_mixer_output_balance(void); +extern int get_mixer_input_gain(void); +extern int get_mixer_input_device(void); +#endif /* __MXC_ALSA_COMMON_H__ */ --- linux-fsl-imx51-2.6.31.orig/sound/arm/mxc-alsa-spdif.c +++ linux-fsl-imx51-2.6.31/sound/arm/mxc-alsa-spdif.c @@ -0,0 +1,2266 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup SOUND_DRV MXC Sound Driver for ALSA + */ + +/*! + * @file mxc-alsa-spdif.c + * @brief this fle mxc-alsa-spdif.c + * @brief this file implements mxc alsa driver for spdif. + * The spdif tx supports consumer channel for linear PCM and + * compressed audio data. The supported sample rates are + * 48KHz, 44.1KHz and 32KHz. + * + * @ingroup SOUND_DRV + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_PM +#include +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define MXC_SPDIF_NAME "MXC_SPDIF" +static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; +static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; +static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE; +module_param_array(index, int, NULL, 0444); +MODULE_PARM_DESC(index, "Index value for spdif sound card."); +module_param_array(id, charp, NULL, 0444); +MODULE_PARM_DESC(id, "ID string for spdif sound card."); +module_param_array(enable, bool, NULL, 0444); +MODULE_PARM_DESC(enable, "Enable spdif sound card."); + +#define SPDIF_MAX_BUF_SIZE (32*1024) +#define SPDIF_DMA_BUF_SIZE (8*1024) +#define SPDIF_MIN_PERIOD_SIZE 64 +#define SPDIF_MIN_PERIOD 2 +#define SPDIF_MAX_PERIOD 255 + +#define SPDIF_REG_SCR 0x00 +#define SPDIF_REG_SRCD 0x04 +#define SPDIF_REG_SRPC 0x08 +#define SPDIF_REG_SIE 0x0C +#define SPDIF_REG_SIS 0x10 +#define SPDIF_REG_SIC 0x10 +#define SPDIF_REG_SRL 0x14 +#define SPDIF_REG_SRR 0x18 +#define SPDIF_REG_SRCSLH 0x1C +#define SPDIF_REG_SRCSLL 0x20 +#define SPDIF_REG_SQU 0x24 +#define SPDIF_REG_SRQ 0x28 +#define SPDIF_REG_STL 0x2C +#define SPDIF_REG_STR 0x30 +#define SPDIF_REG_STCSCH 0x34 +#define SPDIF_REG_STCSCL 0x38 +#define SPDIF_REG_SRFM 0x44 +#define SPDIF_REG_STC 0x50 + +/* SPDIF Configuration register */ +#define SCR_RXFIFO_CTL_ZERO (1 << 23) +#define SCR_RXFIFO_OFF (1 << 22) +#define SCR_RXFIFO_RST (1 << 21) +#define SCR_RXFIFO_FSEL_BIT (19) +#define SCR_RXFIFO_FSEL_MASK (0x3 << SCR_RXFIFO_FSEL_BIT) +#define SCR_RXFIFO_AUTOSYNC (1 << 18) +#define SCR_TXFIFO_AUTOSYNC (1 << 17) +#define SCR_TXFIFO_ESEL_BIT (15) +#define SCR_TXFIFO_ESEL_MASK (0x3 << SCR_TXFIFO_FSEL_BIT) +#define SCR_LOW_POWER (1 << 13) +#define SCR_SOFT_RESET (1 << 12) +#define SCR_TXFIFO_ZERO (0 << 10) +#define SCR_TXFIFO_NORMAL (1 << 10) +#define SCR_TXFIFO_ONESAMPLE (1 << 11) +#define SCR_DMA_RX_EN (1 << 9) +#define SCR_DMA_TX_EN (1 << 8) +#define SCR_VAL_CLEAR (1 << 5) +#define SCR_TXSEL_OFF (0 << 2) +#define SCR_TXSEL_RX (1 << 2) +#define SCR_TXSEL_NORMAL (0x5 << 2) +#define SCR_USRC_SEL_NONE (0x0) +#define SCR_USRC_SEL_RECV (0x1) +#define SCR_USRC_SEL_CHIP (0x3) + +/* SPDIF CDText control */ +#define SRCD_CD_USER_OFFSET 1 +#define SRCD_CD_USER (1 << SRCD_CD_USER_OFFSET) + +/* SPDIF Phase Configuration register */ +#define SRPC_DPLL_LOCKED (1 << 6) +#define SRPC_CLKSRC_SEL_OFFSET 7 +#define SRPC_CLKSRC_SEL_LOCKED 5 +/* gain sel */ +#define SRPC_GAINSEL_OFFSET 3 + +enum spdif_gainsel { + GAINSEL_MULTI_24 = 0, + GAINSEL_MULTI_16, + GAINSEL_MULTI_12, + GAINSEL_MULTI_8, + GAINSEL_MULTI_6, + GAINSEL_MULTI_4, + GAINSEL_MULTI_3, + GAINSEL_MULTI_MAX, +}; + +#define SPDIF_DEFAULT_GAINSEL GAINSEL_MULTI_8 + +/* SPDIF interrupt mask define */ +#define INT_DPLL_LOCKED (1 << 20) +#define INT_TXFIFO_UNOV (1 << 19) +#define INT_TXFIFO_RESYNC (1 << 18) +#define INT_CNEW (1 << 17) +#define INT_VAL_NOGOOD (1 << 16) +#define INT_SYM_ERR (1 << 15) +#define INT_BIT_ERR (1 << 14) +#define INT_URX_FUL (1 << 10) +#define INT_URX_OV (1 << 9) +#define INT_QRX_FUL (1 << 8) +#define INT_QRX_OV (1 << 7) +#define INT_UQ_SYNC (1 << 6) +#define INT_UQ_ERR (1 << 5) +#define INT_RX_UNOV (1 << 4) +#define INT_RX_RESYNC (1 << 3) +#define INT_LOSS_LOCK (1 << 2) +#define INT_TX_EMPTY (1 << 1) +#define INT_RXFIFO_FUL (1 << 0) + +/* SPDIF Clock register */ +#define STC_SYSCLK_DIV_OFFSET 11 +#define STC_TXCLK_SRC_OFFSET 8 +#define STC_TXCLK_DIV_OFFSET 0 + +#define SPDIF_CSTATUS_BYTE 6 +#define SPDIF_UBITS_SIZE 96 +#define SPDIF_QSUB_SIZE (SPDIF_UBITS_SIZE/8) + +enum spdif_clk_accuracy { + SPDIF_CLK_ACCURACY_LEV2 = 0, + SPDIF_CLK_ACCURACY_LEV1 = 2, + SPDIF_CLK_ACCURACY_LEV3 = 1, + SPDIF_CLK_ACCURACY_RESV = 3 +}; + +/* SPDIF clock source */ +enum spdif_clk_src { + SPDIF_CLK_SRC1 = 0, + SPDIF_CLK_SRC2, + SPDIF_CLK_SRC3, + SPDIF_CLK_SRC4, + SPDIF_CLK_SRC5, +}; + +enum spdif_max_wdl { + SPDIF_MAX_WDL_20, + SPDIF_MAX_WDL_24 +}; + +enum spdif_wdl { + SPDIF_WDL_DEFAULT = 0, + SPDIF_WDL_FIFTH = 4, + SPDIF_WDL_FOURTH = 3, + SPDIF_WDL_THIRD = 2, + SPDIF_WDL_SECOND = 1, + SPDIF_WDL_MAX = 5 +}; + +static unsigned int gainsel_multi[GAINSEL_MULTI_MAX] = { + 24 * 1024, 16 * 1024, 12 * 1024, + 8 * 1024, 6 * 1024, 4 * 1024, + 3 * 1024, +}; + +/*! + * SPDIF control structure + * Defines channel status, subcode and Q sub + */ +struct spdif_mixer_control { + + /* spinlock to access control data */ + spinlock_t ctl_lock; + /* IEC958 channel tx status bit */ + unsigned char ch_status[4]; + /* User bits */ + unsigned char subcode[2 * SPDIF_UBITS_SIZE]; + /* Q subcode part of user bits */ + unsigned char qsub[2 * SPDIF_QSUB_SIZE]; + /* buffer ptrs for writer */ + unsigned int upos; + unsigned int qpos; + /* ready buffer index of the two buffers */ + unsigned int ready_buf; +}; + +/*! + * This structure represents an audio stream in term of + * channel DMA, HW configuration on spdif controller. + */ +struct mxc_spdif_stream { + + /*! + * identification string + */ + char *id; + /*! + * device identifier for DMA + */ + int dma_wchannel; + /*! + * we are using this stream for transfer now + */ + int active:1; + /*! + * current transfer period + */ + int period; + /*! + * current count of transfered periods + */ + int periods; + /*! + * for locking in DMA operations + */ + spinlock_t dma_lock; + /*! + * Alsa substream pointer + */ + struct snd_pcm_substream *stream; +}; + +struct mxc_spdif_device { + /*! + * SPDIF module register base address + */ + unsigned long __iomem *reg_base; + + /*! + * spdif tx available or not + */ + int mxc_spdif_tx; + + /*! + * spdif rx available or not + */ + int mxc_spdif_rx; + + /*! + * spdif 44100 clock src + */ + int spdif_txclk_44100; + + /*! + * spdif 48000 clock src + */ + int spdif_txclk_48000; + + /*! + * ALSA SPDIF sound card handle + */ + struct snd_card *card; + + /*! + * ALSA spdif driver type handle + */ + struct snd_pcm *pcm; + + /*! + * DPLL locked status + */ + atomic_t dpll_locked; + + /*! + * Playback/Capture substream + */ + struct mxc_spdif_stream s[2]; +}; + +static struct spdif_mixer_control mxc_spdif_control; + +static unsigned long spdif_base_addr; + +/* define each spdif interrupt handlers */ +typedef void (*spdif_irq_func_t) (unsigned int bit, void *desc); + +/* spdif irq functions declare */ +static void spdif_irq_fifo(unsigned int bit, void *devid); +static void spdif_irq_dpll_lock(unsigned int bit, void *devid); +static void spdif_irq_uq(unsigned int bit, void *devid); +static void spdif_irq_bit_error(unsigned int bit, void *devid); +static void spdif_irq_sym_error(unsigned int bit, void *devid); +static void spdif_irq_valnogood(unsigned int bit, void *devid); +static void spdif_irq_cnew(unsigned int bit, void *devid); + +/* irq function list */ +static spdif_irq_func_t spdif_irq_handlers[] = { + spdif_irq_fifo, + spdif_irq_fifo, + spdif_irq_dpll_lock, + NULL, + spdif_irq_fifo, + spdif_irq_uq, + spdif_irq_uq, + spdif_irq_uq, + spdif_irq_uq, + spdif_irq_uq, + spdif_irq_uq, + NULL, + NULL, + NULL, + spdif_irq_bit_error, + spdif_irq_sym_error, + spdif_irq_valnogood, + spdif_irq_cnew, + NULL, + spdif_irq_fifo, + spdif_irq_dpll_lock, +}; + +/*! + * @brief Enable/Disable spdif DMA request + * + * This function is called to enable or disable the dma transfer + */ +static void spdif_dma_enable(int txrx, int enable) +{ + unsigned long value; + + value = __raw_readl(SPDIF_REG_SCR + spdif_base_addr) & 0xfffeff; + if (enable) + value |= txrx; + + __raw_writel(value, SPDIF_REG_SCR + spdif_base_addr); + +} + +/*! + * @brief Enable spdif interrupt + * + * This function is called to enable relevant interrupts. + */ +static void spdif_intr_enable(unsigned long intr, int enable) +{ + unsigned long value; + + value = __raw_readl(spdif_base_addr + SPDIF_REG_SIE) & 0xffffff; + if (enable) + value |= intr; + else + value &= ~intr; + + __raw_writel(value, spdif_base_addr + SPDIF_REG_SIE); +} + +/*! + * @brief Set the clock accuracy level in the channel bit + * + * This function is called to set the clock accuracy level + */ +static int spdif_set_clk_accuracy(enum spdif_clk_accuracy level) +{ + unsigned long value; + + value = __raw_readl(SPDIF_REG_STCSCL + spdif_base_addr) & 0xffffcf; + value |= (level << 4); + __raw_writel(value, SPDIF_REG_STCSCL + spdif_base_addr); + + return 0; +} + +/*! + * set SPDIF PhaseConfig register for rx clock + */ +static int spdif_set_rx_clksrc(enum spdif_clk_src clksrc, + enum spdif_gainsel gainsel, int dpll_locked) +{ + unsigned long value; + if (clksrc > SPDIF_CLK_SRC5 || gainsel > GAINSEL_MULTI_3) + return 1; + + value = (dpll_locked ? (clksrc) : + (clksrc + SRPC_CLKSRC_SEL_LOCKED)) << SRPC_CLKSRC_SEL_OFFSET | + (gainsel << SRPC_GAINSEL_OFFSET); + __raw_writel(value, spdif_base_addr + SPDIF_REG_SRPC); + + return 0; +} + +/*! + * Get RX data clock rate + * given the SPDIF bus_clk + */ +static int spdif_get_rxclk_rate(struct clk *bus_clk, enum spdif_gainsel gainsel) +{ + unsigned long freqmeas, phaseconf, busclk_freq = 0; + u64 tmpval64; + enum spdif_clk_src clksrc; + + freqmeas = __raw_readl(spdif_base_addr + SPDIF_REG_SRFM); + phaseconf = __raw_readl(spdif_base_addr + SPDIF_REG_SRPC); + + clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0x0F; + if (clksrc < 5 && (phaseconf & SRPC_DPLL_LOCKED)) { + /* get bus clock from system */ + busclk_freq = clk_get_rate(bus_clk); + } + + /* FreqMeas_CLK = (BUS_CLK*FreqMeas[23:0])/2^10/GAINSEL/128 */ + tmpval64 = (u64) busclk_freq * freqmeas; + do_div(tmpval64, gainsel_multi[gainsel]); + do_div(tmpval64, 128 * 1024); + return (int)tmpval64; +} + +/*! + * @brief Set the audio sample rate in the channel status bit + * + * This function is called to set the audio sample rate to be transfered. + */ +static int spdif_set_sample_rate(int src_44100, int src_48000, int sample_rate) +{ + unsigned long cstatus, stc; + + cstatus = __raw_readl(SPDIF_REG_STCSCL + spdif_base_addr) & 0xfffff0; + stc = __raw_readl(SPDIF_REG_STC + spdif_base_addr) & ~0x7FF; + + switch (sample_rate) { + case 44100: + __raw_writel(cstatus, SPDIF_REG_STCSCL + spdif_base_addr); + stc |= (src_44100 << 8) | 0x07; + __raw_writel(stc, SPDIF_REG_STC + spdif_base_addr); + pr_debug("set sample rate to 44100\n"); + break; + case 48000: + cstatus |= 0x04; + __raw_writel(cstatus, SPDIF_REG_STCSCL + spdif_base_addr); + stc |= (src_48000 << 8) | 0x07; + __raw_writel(stc, SPDIF_REG_STC + spdif_base_addr); + pr_debug("set sample rate to 48000\n"); + break; + case 32000: + cstatus |= 0x0c; + __raw_writel(cstatus, SPDIF_REG_STCSCL + spdif_base_addr); + stc |= (src_48000 << 8) | 0x0b; + __raw_writel(stc, SPDIF_REG_STC + spdif_base_addr); + pr_debug("set sample rate to 32000\n"); + break; + } + + return 0; +} + +/*! + * @brief Set the lchannel status bit + * + * This function is called to set the channel status + */ +static int spdif_set_channel_status(int value, unsigned long reg) +{ + __raw_writel(value & 0xffffff, reg + spdif_base_addr); + + return 0; +} + +/*! + * @brief Get spdif interrupt status and clear the interrupt + * + * This function is called to check relevant interrupt status + */ +static int spdif_intr_status(void) +{ + unsigned long value; + + value = __raw_readl(SPDIF_REG_SIS + spdif_base_addr) & 0xffffff; + value &= __raw_readl(spdif_base_addr + SPDIF_REG_SIE); + __raw_writel(value, SPDIF_REG_SIC + spdif_base_addr); + + return value; +} + +/*! + * @brief spdif interrupt handler + */ +static irqreturn_t spdif_isr(int irq, void *dev_id) +{ + unsigned long int_stat; + int line; + + int_stat = spdif_intr_status(); + + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + if (spdif_irq_handlers[line - 1] != NULL) + spdif_irq_handlers[line - 1] (line - 1, dev_id); + } + + return IRQ_HANDLED; +} + +/*! + * Interrupt handlers + * + */ +/*! + * FIFO related interrupts handler + * + * Rx FIFO Full, Underrun/Overrun interrupts + * Tx FIFO Empty, Underrun/Overrun interrupts + */ +static void spdif_irq_fifo(unsigned int bit, void *devid) +{ + +} + +/*! + * DPLL lock related interrupts handler + * + * DPLL locked and lock loss interrupts + */ +static void spdif_irq_dpll_lock(unsigned int bit, void *devid) +{ + struct mxc_spdif_device *chip = (struct mxc_spdif_device *)devid; + unsigned int locked = __raw_readl(spdif_base_addr + SPDIF_REG_SRPC); + + if (locked & SRPC_DPLL_LOCKED) { + pr_debug("SPDIF Rx dpll locked\n"); + atomic_set(&chip->dpll_locked, 1); + } else { + /* INT_LOSS_LOCK */ + pr_debug("SPDIF Rx dpll loss lock\n"); + atomic_set(&chip->dpll_locked, 0); + } +} + +/*! + * U/Q channel related interrupts handler + * + * U/QChannel full, overrun interrupts + * U/QChannel sync error and frame error interrupts + */ +static void spdif_irq_uq(unsigned int bit, void *devid) +{ + unsigned long val; + int index; + struct spdif_mixer_control *ctrl = &mxc_spdif_control; + + bit = 1 << bit; + /* get U/Q channel datas */ + switch (bit) { + + case INT_URX_OV: /* read U data */ + pr_debug("User bit receive overrun\n"); + case INT_URX_FUL: + pr_debug("U bit receive full\n"); + + if (ctrl->upos >= SPDIF_UBITS_SIZE * 2) { + ctrl->upos = 0; + } else if (unlikely((ctrl->upos % SPDIF_UBITS_SIZE) + 3 + > SPDIF_UBITS_SIZE)) { + pr_err("User bit receivce buffer overflow\n"); + break; + } + val = __raw_readl(spdif_base_addr + SPDIF_REG_SQU); + ctrl->subcode[ctrl->upos++] = val >> 16; + ctrl->subcode[ctrl->upos++] = val >> 8; + ctrl->subcode[ctrl->upos++] = val; + + break; + + case INT_QRX_OV: /* read Q data */ + pr_debug("Q bit receive overrun\n"); + case INT_QRX_FUL: + pr_debug("Q bit receive full\n"); + + if (ctrl->qpos >= SPDIF_QSUB_SIZE * 2) { + ctrl->qpos = 0; + } else if (unlikely((ctrl->qpos % SPDIF_QSUB_SIZE) + 3 + > SPDIF_QSUB_SIZE)) { + pr_err("Q bit receivce buffer overflow\n"); + break; + } + val = __raw_readl(spdif_base_addr + SPDIF_REG_SRQ); + ctrl->qsub[ctrl->qpos++] = val >> 16; + ctrl->qsub[ctrl->qpos++] = val >> 8; + ctrl->qsub[ctrl->qpos++] = val; + + break; + + case INT_UQ_ERR: /* read U/Q data and do buffer reset */ + pr_debug("U/Q bit receive error\n"); + val = __raw_readl(spdif_base_addr + SPDIF_REG_SQU); + val = __raw_readl(spdif_base_addr + SPDIF_REG_SRQ); + /* drop this U/Q buffer */ + ctrl->ready_buf = ctrl->upos = ctrl->qpos = 0; + break; + + case INT_UQ_SYNC: /* U/Q buffer reset */ + pr_debug("U/Q sync receive\n"); + + if (ctrl->qpos == 0) + break; + index = (ctrl->qpos - 1) / SPDIF_QSUB_SIZE; + /* set ready to this buffer */ + ctrl->ready_buf = index + 1; + break; + } +} + +/*! + * SPDIF receiver found parity bit error interrupt handler + */ +static void spdif_irq_bit_error(unsigned int bit, void *devid) +{ + pr_debug("SPDIF interrupt parity bit error\n"); +} + +/*! + * SPDIF receiver found illegal symbol interrupt handler + */ +static void spdif_irq_sym_error(unsigned int bit, void *devid) +{ + pr_debug("SPDIF interrupt symbol error\n"); +} + +/*! + * SPDIF validity flag no good interrupt handler + */ +static void spdif_irq_valnogood(unsigned int bit, void *devid) +{ + pr_debug("SPDIF interrupt validate is not good\n"); +} + +/*! + * SPDIF receive change in value of control channel + */ +static void spdif_irq_cnew(unsigned int bit, void *devid) +{ + pr_debug("SPDIF interrupt cstatus new\n"); +} + +/*! + * Do software reset to SPDIF + */ +static void spdif_softreset(void) +{ + unsigned long value = 1; + int cycle = 0; + __raw_writel(SCR_SOFT_RESET, spdif_base_addr + SPDIF_REG_SCR); + while (value && (cycle++ < 10)) { + value = __raw_readl(spdif_base_addr + SPDIF_REG_SCR) & 0x1000; + } + +} + +/*! + * SPDIF RX initial function + */ +static void spdif_rx_init(void) +{ + unsigned long regval; + + regval = __raw_readl(spdif_base_addr + SPDIF_REG_SCR); + /** + * initial and reset SPDIF configuration: + * RxFIFO off + * RxFIFO sel to 8 sample + * Autosync + * Valid bit set + */ + regval &= ~(SCR_RXFIFO_OFF | SCR_RXFIFO_CTL_ZERO | SCR_LOW_POWER); + regval |= (2 << SCR_RXFIFO_FSEL_BIT) | SCR_RXFIFO_AUTOSYNC; + __raw_writel(regval, spdif_base_addr + SPDIF_REG_SCR); +} + +/*! + * SPDIF RX un-initial function + */ +static void spdif_rx_uninit(void) +{ + unsigned long regval; + + /* turn off RX fifo, disable dma and autosync */ + regval = __raw_readl(spdif_base_addr + SPDIF_REG_SCR); + regval |= SCR_RXFIFO_OFF | SCR_RXFIFO_CTL_ZERO; + regval &= ~(SCR_DMA_RX_EN | SCR_RXFIFO_AUTOSYNC); + __raw_writel(regval, spdif_base_addr + SPDIF_REG_SCR); +} + +/*! + * @brief Initialize spdif module + * + * This function is called to set the spdif to initial state. + */ +static void spdif_tx_init(void) +{ + unsigned long regval; + + regval = __raw_readl(spdif_base_addr + SPDIF_REG_SCR); + + regval &= 0xfc32e3; + regval |= SCR_TXFIFO_AUTOSYNC | SCR_TXFIFO_NORMAL | + SCR_TXSEL_NORMAL | SCR_USRC_SEL_CHIP | (2 << SCR_TXFIFO_ESEL_BIT); + __raw_writel(regval, SPDIF_REG_SCR + spdif_base_addr); + + /* Default clock source from EXTAL, divider by 8, generate 44.1kHz + sample rate */ + regval = 0x07; + __raw_writel(regval, SPDIF_REG_STC + spdif_base_addr); + +} + +/*! + * @brief deinitialize spdif module + * + * This function is called to stop the spdif + */ +static void spdif_tx_uninit(void) +{ + unsigned long regval; + + regval = __raw_readl(SPDIF_REG_SCR + spdif_base_addr) & 0xffffe3; + regval |= SCR_TXSEL_OFF; + __raw_writel(regval, SPDIF_REG_SCR + spdif_base_addr); + regval = __raw_readl(SPDIF_REG_STC + spdif_base_addr) & ~0x7FF; + regval |= (0x7 << STC_TXCLK_SRC_OFFSET); + __raw_writel(regval, SPDIF_REG_STC + spdif_base_addr); + +} + +static unsigned int spdif_playback_rates[] = { 32000, 44100, 48000 }; +static unsigned int spdif_capture_rates[] = { + 16000, 32000, 44100, 48000, 64000, 96000 +}; + +/*! + * this structure represents the sample rates supported + * by SPDIF + */ +static struct snd_pcm_hw_constraint_list hw_playback_rates_stereo = { + .count = ARRAY_SIZE(spdif_playback_rates), + .list = spdif_playback_rates, + .mask = 0, +}; + +static struct snd_pcm_hw_constraint_list hw_capture_rates_stereo = { + .count = ARRAY_SIZE(spdif_capture_rates), + .list = spdif_capture_rates, + .mask = 0, +}; + +/*! + * This structure reprensents the capabilities of the driver + * in playback mode. + */ +static struct snd_pcm_hardware snd_spdif_playback_hw = { + .info = + (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_HALF_DUPLEX | + SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | + SNDRV_PCM_FMTBIT_S24_LE, + .rates = + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .rate_min = 32000, + .rate_max = 48000, + .channels_min = 2, + .channels_max = 2, + .buffer_bytes_max = SPDIF_MAX_BUF_SIZE, + .period_bytes_min = SPDIF_MIN_PERIOD_SIZE, + .period_bytes_max = SPDIF_DMA_BUF_SIZE, + .periods_min = SPDIF_MIN_PERIOD, + .periods_max = SPDIF_MAX_PERIOD, + .fifo_size = 0, +}; + +/*! + * This structure reprensents the capabilities of the driver + * in capture mode. + */ +static struct snd_pcm_hardware snd_spdif_capture_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S24_LE, + .rates = + (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 + | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | + SNDRV_PCM_RATE_96000), + .rate_min = 16000, + .rate_max = 96000, + .channels_min = 2, + .channels_max = 2, + .buffer_bytes_max = SPDIF_MAX_BUF_SIZE, + .period_bytes_min = SPDIF_MIN_PERIOD_SIZE, + .period_bytes_max = SPDIF_DMA_BUF_SIZE, + .periods_min = SPDIF_MIN_PERIOD, + .periods_max = SPDIF_MAX_PERIOD, + .fifo_size = 0, + +}; + +/*! + * This function configures the DMA channel used to transfer + * audio from MCU to SPDIF or from SPDIF to MCU + * + * @param s pointer to the structure of the current stream. + * @param callback pointer to function that will be + * called when a SDMA TX transfer finishes. + * + * @return 0 on success, -1 otherwise. + */ +static int +spdif_configure_dma_channel(struct mxc_spdif_stream *s, + mxc_dma_callback_t callback) +{ + int ret = -1; + int channel = -1; + + if (s->dma_wchannel != 0) + mxc_dma_free(s->dma_wchannel); + + if (s->stream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + + if (s->stream->runtime->sample_bits > 16) { + channel = + mxc_dma_request(MXC_DMA_SPDIF_32BIT_TX, + "SPDIF TX DMA"); + } else { + channel = + mxc_dma_request(MXC_DMA_SPDIF_16BIT_TX, + "SPDIF TX DMA"); + } + + } else if (s->stream->stream == SNDRV_PCM_STREAM_CAPTURE) { + + channel = mxc_dma_request(MXC_DMA_SPDIF_32BIT_RX, + "SPDIF RX DMA"); + + } + + pr_debug("spdif_configure_dma_channel: %d\n", channel); + + ret = mxc_dma_callback_set(channel, + (mxc_dma_callback_t) callback, (void *)s); + if (ret != 0) { + pr_info("spdif_configure_dma_channel - err\n"); + mxc_dma_free(channel); + return -1; + } + s->dma_wchannel = channel; + return 0; +} + +/*! + * This function gets the dma pointer position during playback/capture. + * Our DMA implementation does not allow to retrieve this position + * when a transfert is active, so, it answers the middle of + * the current period beeing transfered + * + * @param s pointer to the structure of the current stream. + * + */ +static u_int spdif_get_dma_pos(struct mxc_spdif_stream *s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int offset = 0; + substream = s->stream; + runtime = substream->runtime; + + offset = (runtime->period_size * (s->periods)); + if (offset >= runtime->buffer_size) + offset = 0; + pr_debug + ("MXC: spdif_get_dma_pos BIS offset %d, buffer_size %d\n", + offset, (int)runtime->buffer_size); + return offset; +} + +/*! + * This function stops the current dma transfert for playback + * and clears the dma pointers. + * + * @param s pointer to the structure of the current stream. + * + */ +static void spdif_stop_tx(struct mxc_spdif_stream *s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int offset; + + substream = s->stream; + runtime = substream->runtime; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * s->periods; + + s->active = 0; + s->period = 0; + s->periods = 0; + + /* this stops the dma channel and clears the buffer ptrs */ + mxc_dma_disable(s->dma_wchannel); + spdif_dma_enable(SCR_DMA_TX_EN, 0); + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_TO_DEVICE); +} + +/*! + * This function is called whenever a new audio block needs to be + * transferred to SPDIF. The function receives the address and the size + * of the new block and start a new DMA transfer. + * + * @param s pointer to the structure of the current stream. + * + */ +static void spdif_start_tx(struct mxc_spdif_stream *s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size = 0; + unsigned int offset; + int ret = 0; + mxc_dma_requestbuf_t dma_request; + substream = s->stream; + runtime = substream->runtime; + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + if (s->active) { + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * s->period; + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, dma_size, + DMA_TO_DEVICE)); + + dma_request.dst_addr = (dma_addr_t) (SPDIF_BASE_ADDR + 0x2c); + + dma_request.num_of_bytes = dma_size; + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); + ret = mxc_dma_enable(s->dma_wchannel); + spdif_dma_enable(SCR_DMA_TX_EN, 1); + if (ret) { + pr_info("audio_process_dma: cannot queue DMA \ + buffer\n"); + return; + } + s->period++; + s->period %= runtime->periods; + + if ((s->period > s->periods) + && ((s->period - s->periods) > 1)) { + pr_debug("audio playback chain dma: already double \ + buffered\n"); + return; + } + + if ((s->period < s->periods) + && ((s->period + runtime->periods - s->periods) > 1)) { + pr_debug("audio playback chain dma: already double \ + buffered\n"); + return; + } + + if (s->period == s->periods) { + pr_debug("audio playback chain dma: s->period == \ + s->periods\n"); + return; + } + + if (snd_pcm_playback_hw_avail(runtime) < + 2 * runtime->period_size) { + pr_debug("audio playback chain dma: available data \ + is not enough\n"); + return; + } + + pr_debug + ("audio playback chain dma:to set up the 2nd dma buffer\n"); + pr_debug("SCR: 0x%08x\n", + __raw_readl(spdif_base_addr + SPDIF_REG_SCR)); + + offset = dma_size * s->period; + dma_request.src_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, dma_size, + DMA_TO_DEVICE)); + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_WRITE); + ret = mxc_dma_enable(s->dma_wchannel); + s->period++; + s->period %= runtime->periods; + + } + return; +} + +/*! + * This is a callback which will be called + * when a TX transfer finishes. The call occurs + * in interrupt context. + * + * @param data pointer to the structure of the current stream + * @param error DMA error flag + * @param count number of bytes transfered by the DMA + */ +static void spdif_tx_callback(void *data, int error, unsigned int count) +{ + struct mxc_spdif_stream *s; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int previous_period; + unsigned int offset; + s = data; + substream = s->stream; + runtime = substream->runtime; + previous_period = s->periods; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * previous_period; + + spin_lock(&s->dma_lock); + s->periods++; + s->periods %= runtime->periods; + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_TO_DEVICE); + spin_unlock(&s->dma_lock); + + if (s->active) + snd_pcm_period_elapsed(s->stream); + + spin_lock(&s->dma_lock); + spdif_start_tx(s); + spin_unlock(&s->dma_lock); +} + +/*! + * This function is a dispatcher of command to be executed + * by the driver for playback. + * + * @param substream pointer to the structure of the current stream. + * @param cmd command to be executed + * + * @return 0 on success, -1 otherwise. + */ +static int +snd_mxc_spdif_playback_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct mxc_spdif_device *chip; + struct mxc_spdif_stream *s; + int err = 0; + unsigned long flags; + chip = snd_pcm_substream_chip(substream); + s = &chip->s[SNDRV_PCM_STREAM_PLAYBACK]; + + spin_lock_irqsave(&s->dma_lock, flags); + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + s->active = 1; + spdif_start_tx(s); + break; + case SNDRV_PCM_TRIGGER_STOP: + spdif_stop_tx(s); + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + s->active = 0; + s->periods = 0; + break; + case SNDRV_PCM_TRIGGER_RESUME: + s->active = 1; + spdif_start_tx(s); + break; + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + s->active = 0; + break; + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + s->active = 1; + spdif_start_tx(s); + break; + default: + err = -EINVAL; + break; + } + spin_unlock_irqrestore(&s->dma_lock, flags); + return err; +} + +/*! + * This function configures the hardware to allow audio + * playback operations. It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_spdif_playback_prepare(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + struct snd_pcm_runtime *runtime; + int err; + unsigned int ch_status; + + chip = snd_pcm_substream_chip(substream); + runtime = substream->runtime; + + spdif_tx_init(); + + ch_status = + ((mxc_spdif_control.ch_status[2] << 16) | (mxc_spdif_control. + ch_status[1] << 8) | + mxc_spdif_control.ch_status[0]); + spdif_set_channel_status(ch_status, SPDIF_REG_STCSCH); + ch_status = mxc_spdif_control.ch_status[3]; + spdif_set_channel_status(ch_status, SPDIF_REG_STCSCL); + spdif_intr_enable(INT_TXFIFO_RESYNC, 1); + spdif_set_sample_rate(chip->spdif_txclk_44100, chip->spdif_txclk_48000, + runtime->rate); + spdif_set_clk_accuracy(SPDIF_CLK_ACCURACY_LEV2); + /* setup DMA controller for spdif tx */ + err = spdif_configure_dma_channel(&chip-> + s[SNDRV_PCM_STREAM_PLAYBACK], + spdif_tx_callback); + if (err < 0) { + pr_info("snd_mxc_spdif_playback_prepare - err < 0\n"); + return err; + } + + /** + * FIXME: dump registers + */ + pr_debug("SCR: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SCR)); + pr_debug("SIE: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SIE)); + pr_debug("STC: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_STC)); + return 0; +} + +/*! + * This function gets the current playback pointer position. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + */ +static snd_pcm_uframes_t +snd_mxc_spdif_playback_pointer(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + chip = snd_pcm_substream_chip(substream); + return spdif_get_dma_pos(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]); +} + +static int snd_card_mxc_spdif_playback_open(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + struct snd_pcm_runtime *runtime; + int err; + struct mxc_spdif_platform_data *spdif_data; + + chip = snd_pcm_substream_chip(substream); + + spdif_data = chip->card->dev->platform_data; + /* enable tx clock */ + clk_enable(spdif_data->spdif_clk); + clk_enable(spdif_data->spdif_audio_clk); + + runtime = substream->runtime; + chip->s[SNDRV_PCM_STREAM_PLAYBACK].stream = substream; + runtime->hw = snd_spdif_playback_hw; + err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_playback_rates_stereo); + if (err < 0) + goto failed; + err = + snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); + if (err < 0) + goto failed; + + return 0; + failed: + clk_disable(spdif_data->spdif_clk); + return err; +} + +/*! + * This function closes an spdif device for playback. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_spdif_playback_close(struct snd_pcm_substream + *substream) +{ + struct mxc_spdif_device *chip; + struct mxc_spdif_platform_data *spdif_data; + + chip = snd_pcm_substream_chip(substream); + spdif_data = chip->card->dev->platform_data; + + pr_debug("SIS: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SIS)); + + spdif_intr_status(); + spdif_intr_enable(INT_TXFIFO_RESYNC, 0); + spdif_tx_uninit(); + clk_disable(spdif_data->spdif_audio_clk); + clk_disable(spdif_data->spdif_clk); + mxc_dma_free(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dma_wchannel); + chip->s[SNDRV_PCM_STREAM_PLAYBACK].dma_wchannel = 0; + + return 0; +} + +/*! TODO: update the dma start/stop callback routine + * This function stops the current dma transfert for capture + * and clears the dma pointers. + * + * @param s pointer to the structure of the current stream. + * + */ +static void spdif_stop_rx(struct mxc_spdif_stream *s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int offset; + + substream = s->stream; + runtime = substream->runtime; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * s->periods; + + s->active = 0; + s->period = 0; + s->periods = 0; + + /* this stops the dma channel and clears the buffer ptrs */ + mxc_dma_disable(s->dma_wchannel); + spdif_dma_enable(SCR_DMA_RX_EN, 0); + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_FROM_DEVICE); +} + +/*! + * This function is called whenever a new audio block needs to be + * received from SPDIF. The function receives the address and the size + * of the new block and start a new DMA transfer. + * + * @param s pointer to the structure of the current stream. + * + */ +static void spdif_start_rx(struct mxc_spdif_stream *s) +{ + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size = 0; + unsigned int offset; + int ret = 0; + mxc_dma_requestbuf_t dma_request; + + substream = s->stream; + runtime = substream->runtime; + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + + if (s->active) { + dma_size = frames_to_bytes(runtime, runtime->period_size); + pr_debug("s->period (%x) runtime->periods (%d)\n", + s->period, runtime->periods); + pr_debug("runtime->period_size (%d) dma_size (%d)\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes); + + offset = dma_size * s->period; + dma_request.dst_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, dma_size, + DMA_FROM_DEVICE)); + + dma_request.src_addr = + (dma_addr_t) (SPDIF_BASE_ADDR + SPDIF_REG_SRL); + dma_request.num_of_bytes = dma_size; + /* config and enable sdma for RX */ + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_READ); + ret = mxc_dma_enable(s->dma_wchannel); + /* enable SPDIF dma */ + spdif_dma_enable(SCR_DMA_RX_EN, 1); + + if (ret) { + pr_info("audio_process_dma: cannot queue DMA \ + buffer\n"); + return; + } + s->period++; + s->period %= runtime->periods; + + if ((s->period > s->periods) + && ((s->period - s->periods) > 1)) { + pr_debug("audio capture chain dma: already double \ + buffered\n"); + return; + } + + if ((s->period < s->periods) + && ((s->period + runtime->periods - s->periods) > 1)) { + pr_debug("audio capture chain dma: already double \ + buffered\n"); + return; + } + + if (s->period == s->periods) { + pr_debug("audio capture chain dma: s->period == \ + s->periods\n"); + return; + } + + if (snd_pcm_capture_hw_avail(runtime) < + 2 * runtime->period_size) { + pr_debug("audio capture chain dma: available data \ + is not enough\n"); + return; + } + + pr_debug + ("audio playback chain dma:to set up the 2nd dma buffer\n"); + + offset = dma_size * s->period; + dma_request.dst_addr = + (dma_addr_t) (dma_map_single + (NULL, runtime->dma_area + offset, dma_size, + DMA_FROM_DEVICE)); + mxc_dma_config(s->dma_wchannel, &dma_request, 1, + MXC_DMA_MODE_READ); + ret = mxc_dma_enable(s->dma_wchannel); + s->period++; + s->period %= runtime->periods; + + } + return; +} + +/*! + * This is a callback which will be called + * when a RX transfer finishes. The call occurs + * in interrupt context. + * + * @param data pointer to the structure of the current stream + * @param error DMA error flag + * @param count number of bytes transfered by the DMA + */ +static void spdif_rx_callback(void *data, int error, unsigned int count) +{ + struct mxc_spdif_stream *s; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + unsigned int dma_size; + unsigned int previous_period; + unsigned int offset; + + s = data; + substream = s->stream; + runtime = substream->runtime; + previous_period = s->periods; + dma_size = frames_to_bytes(runtime, runtime->period_size); + offset = dma_size * previous_period; + + spin_lock(&s->dma_lock); + s->periods++; + s->periods %= runtime->periods; + + dma_unmap_single(NULL, runtime->dma_addr + offset, dma_size, + DMA_FROM_DEVICE); + spin_unlock(&s->dma_lock); + + if (s->active) + snd_pcm_period_elapsed(s->stream); + spin_lock(&s->dma_lock); + spdif_start_rx(s); + spin_unlock(&s->dma_lock); +} + +/*! + * This function is a dispatcher of command to be executed + * by the driver for capture. + * + * @param substream pointer to the structure of the current stream. + * @param cmd command to be executed + * + * @return 0 on success, -1 otherwise. + */ +static int +snd_mxc_spdif_capture_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct mxc_spdif_device *chip; + struct mxc_spdif_stream *s; + int err = 0; + unsigned long flags; + chip = snd_pcm_substream_chip(substream); + s = &chip->s[SNDRV_PCM_STREAM_CAPTURE]; + + spin_lock_irqsave(&s->dma_lock, flags); + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + s->active = 1; + spdif_start_rx(s); + break; + case SNDRV_PCM_TRIGGER_STOP: + spdif_stop_rx(s); + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + s->active = 0; + s->periods = 0; + break; + case SNDRV_PCM_TRIGGER_RESUME: + s->active = 1; + spdif_start_rx(s); + break; + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + s->active = 0; + break; + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + s->active = 1; + spdif_start_rx(s); + break; + default: + err = -EINVAL; + break; + } + spin_unlock_irqrestore(&s->dma_lock, flags); + return err; +} + +/*! + * This function configures the hardware to allow audio + * capture operations. It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_spdif_capture_prepare(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + struct mxc_spdif_platform_data *spdif_data; + struct snd_pcm_runtime *runtime; + int err; + + chip = snd_pcm_substream_chip(substream); + runtime = substream->runtime; + spdif_data = chip->card->dev->platform_data; + + spdif_rx_init(); + /* enable interrupts, include DPLL lock */ + spdif_intr_enable(INT_SYM_ERR | INT_BIT_ERR | INT_URX_FUL | + INT_URX_OV | INT_QRX_FUL | INT_QRX_OV | + INT_UQ_SYNC | INT_UQ_ERR | INT_RX_RESYNC | + INT_LOSS_LOCK, 1); + + /* setup rx clock source */ + spdif_set_rx_clksrc(spdif_data->spdif_clkid, SPDIF_DEFAULT_GAINSEL, 1); + + /* setup DMA controller for spdif rx */ + err = spdif_configure_dma_channel(&chip-> + s[SNDRV_PCM_STREAM_CAPTURE], + spdif_rx_callback); + if (err < 0) { + pr_info("snd_mxc_spdif_playback_prepare - err < 0\n"); + return err; + } + + /* Debug: dump registers */ + pr_debug("SCR: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SCR)); + pr_debug("SIE: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SIE)); + pr_debug("SRPC: 0x%08x\n", + __raw_readl(spdif_base_addr + SPDIF_REG_SRPC)); + pr_debug("FreqMeas: 0x%08x\n", + __raw_readl(spdif_base_addr + SPDIF_REG_SRFM)); + + return 0; +} + +/*! + * This function gets the current capture pointer position. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + */ +static snd_pcm_uframes_t +snd_mxc_spdif_capture_pointer(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + chip = snd_pcm_substream_chip(substream); + return spdif_get_dma_pos(&chip->s[SNDRV_PCM_STREAM_CAPTURE]); +} + +/*! + * This function opens a spdif device in capture mode + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_spdif_capture_open(struct snd_pcm_substream *substream) +{ + struct mxc_spdif_device *chip; + struct snd_pcm_runtime *runtime; + int err = 0; + struct mxc_spdif_platform_data *spdif_data; + + chip = snd_pcm_substream_chip(substream); + + spdif_data = chip->card->dev->platform_data; + /* enable rx bus clock */ + clk_enable(spdif_data->spdif_clk); + + runtime = substream->runtime; + chip->s[SNDRV_PCM_STREAM_CAPTURE].stream = substream; + runtime->hw = snd_spdif_capture_hw; + + /* set hw param constraints */ + err = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + &hw_capture_rates_stereo); + if (err < 0) + goto failed; + err = + snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); + if (err < 0) + goto failed; + + /* enable spdif dpll lock interrupt */ + spdif_intr_enable(INT_DPLL_LOCKED, 1); + + return 0; + + failed: + clk_disable(spdif_data->spdif_clk); + return err; +} + +/*! + * This function closes an spdif device for capture. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_spdif_capture_close(struct snd_pcm_substream + *substream) +{ + struct mxc_spdif_device *chip; + struct mxc_spdif_platform_data *spdif_data; + + chip = snd_pcm_substream_chip(substream); + spdif_data = chip->card->dev->platform_data; + + pr_debug("SIS: 0x%08x\n", __raw_readl(spdif_base_addr + SPDIF_REG_SIS)); + pr_debug("SRPC: 0x%08x\n", + __raw_readl(spdif_base_addr + SPDIF_REG_SRPC)); + pr_debug("FreqMeas: 0x%08x\n", + __raw_readl(spdif_base_addr + SPDIF_REG_SRFM)); + + spdif_intr_enable(INT_DPLL_LOCKED | INT_SYM_ERR | INT_BIT_ERR | + INT_URX_FUL | INT_URX_OV | INT_QRX_FUL | INT_QRX_OV | + INT_UQ_SYNC | INT_UQ_ERR | INT_RX_RESYNC | + INT_LOSS_LOCK, 0); + spdif_rx_uninit(); + clk_disable(spdif_data->spdif_clk); + mxc_dma_free(chip->s[SNDRV_PCM_STREAM_CAPTURE].dma_wchannel); + chip->s[SNDRV_PCM_STREAM_CAPTURE].dma_wchannel = 0; + return 0; +} + +/*! + * This function configure the Audio HW in terms of memory allocation. + * It is called by ALSA framework. + * + * @param substream pointer to the structure of the current stream. + * @param hw_params Pointer to hardware paramters structure + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_spdif_hw_params(struct snd_pcm_substream + *substream, struct snd_pcm_hw_params + *hw_params) +{ + struct snd_pcm_runtime *runtime; + int ret = 0; + runtime = substream->runtime; + ret = + snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); + if (ret < 0) { + pr_info("snd_mxc_spdif_hw_params - ret: %d\n", ret); + return ret; + } + runtime->dma_addr = virt_to_phys(runtime->dma_area); + return ret; +} + +/*! + * This function frees the spdif hardware at the end of playback. + * + * @param substream pointer to the structure of the current stream. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_mxc_spdif_hw_free(struct snd_pcm_substream *substream) +{ + return snd_pcm_lib_free_pages(substream); +} + +/*! + * This structure is the list of operation that the driver + * must provide for the playback interface + */ +static struct snd_pcm_ops snd_card_mxc_spdif_playback_ops = { + .open = snd_card_mxc_spdif_playback_open, + .close = snd_card_mxc_spdif_playback_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_mxc_spdif_hw_params, + .hw_free = snd_mxc_spdif_hw_free, + .prepare = snd_mxc_spdif_playback_prepare, + .trigger = snd_mxc_spdif_playback_trigger, + .pointer = snd_mxc_spdif_playback_pointer, +}; + +static struct snd_pcm_ops snd_card_mxc_spdif_capture_ops = { + .open = snd_card_mxc_spdif_capture_open, + .close = snd_card_mxc_spdif_capture_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_mxc_spdif_hw_params, + .hw_free = snd_mxc_spdif_hw_free, + .prepare = snd_mxc_spdif_capture_prepare, + .trigger = snd_mxc_spdif_capture_trigger, + .pointer = snd_mxc_spdif_capture_pointer, +}; + +/*! + * This functions initializes the playback audio device supported by + * spdif + * + * @param mxc_spdif pointer to the sound card structure. + * + */ +void mxc_init_spdif_device(struct mxc_spdif_device *mxc_spdif) +{ + + /* initial spinlock for control data */ + spin_lock_init(&mxc_spdif_control.ctl_lock); + + if (mxc_spdif->mxc_spdif_tx) { + + mxc_spdif->s[SNDRV_PCM_STREAM_PLAYBACK].id = "spdif tx"; + /* init tx channel status default value */ + mxc_spdif_control.ch_status[0] = + IEC958_AES0_CON_NOT_COPYRIGHT | + IEC958_AES0_CON_EMPHASIS_5015; + mxc_spdif_control.ch_status[1] = IEC958_AES1_CON_DIGDIGCONV_ID; + mxc_spdif_control.ch_status[2] = 0x00; + mxc_spdif_control.ch_status[3] = + IEC958_AES3_CON_FS_44100 | IEC958_AES3_CON_CLOCK_1000PPM; + } + if (mxc_spdif->mxc_spdif_rx) { + + /* TODO: Add code here if capture is available */ + mxc_spdif->s[SNDRV_PCM_STREAM_CAPTURE].id = "spdif rx"; + } + +} + +/*! + * MXC SPDIF IEC958 controller(mixer) functions + * + * Channel status get/put control + * User bit value get/put control + * Valid bit value get control + * DPLL lock status get control + * User bit sync mode selection control + * + */ +static int mxc_pb_spdif_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; + uinfo->count = 1; + return 0; +} + +static int mxc_pb_spdif_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + uvalue->value.iec958.status[0] = mxc_spdif_control.ch_status[0]; + uvalue->value.iec958.status[1] = mxc_spdif_control.ch_status[1]; + uvalue->value.iec958.status[2] = mxc_spdif_control.ch_status[2]; + uvalue->value.iec958.status[3] = mxc_spdif_control.ch_status[3]; + return 0; +} + +static int mxc_pb_spdif_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uvalue) +{ + unsigned int ch_status; + mxc_spdif_control.ch_status[0] = uvalue->value.iec958.status[0]; + mxc_spdif_control.ch_status[1] = uvalue->value.iec958.status[1]; + mxc_spdif_control.ch_status[2] = uvalue->value.iec958.status[2]; + mxc_spdif_control.ch_status[3] = uvalue->value.iec958.status[3]; + ch_status = + ((mxc_spdif_control.ch_status[2] << 16) | (mxc_spdif_control. + ch_status[1] << 8) | + mxc_spdif_control.ch_status[0]); + spdif_set_channel_status(ch_status, SPDIF_REG_STCSCH); + ch_status = mxc_spdif_control.ch_status[3]; + spdif_set_channel_status(ch_status, SPDIF_REG_STCSCL); + return 0; +} + +static int snd_mxc_spdif_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; + uinfo->count = 1; + return 0; +} + +/*! + * Get channel status from SPDIF_RX_CCHAN register + */ +static int snd_mxc_spdif_capture_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned int cstatus; + + if (!(__raw_readl(spdif_base_addr + SPDIF_REG_SIS) & INT_CNEW)) + return -EAGAIN; + + cstatus = __raw_readl(spdif_base_addr + SPDIF_REG_SRCSLH); + ucontrol->value.iec958.status[0] = (cstatus >> 16) & 0xFF; + ucontrol->value.iec958.status[1] = (cstatus >> 8) & 0xFF; + ucontrol->value.iec958.status[2] = cstatus & 0xFF; + cstatus = __raw_readl(spdif_base_addr + SPDIF_REG_SRCSLL); + ucontrol->value.iec958.status[3] = (cstatus >> 16) & 0xFF; + ucontrol->value.iec958.status[4] = (cstatus >> 8) & 0xFF; + ucontrol->value.iec958.status[5] = cstatus & 0xFF; + + /* clear intr */ + __raw_writel(INT_CNEW, spdif_base_addr + SPDIF_REG_SIC); + + return 0; +} + +/*! + * Get User bits (subcode) from chip value which readed out + * in UChannel register. + */ +static int snd_mxc_spdif_subcode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&mxc_spdif_control.ctl_lock, flags); + if (mxc_spdif_control.ready_buf) { + memcpy(&ucontrol->value.iec958.subcode[0], + &mxc_spdif_control. + subcode[(mxc_spdif_control.ready_buf - + 1) * SPDIF_UBITS_SIZE], SPDIF_UBITS_SIZE); + } else { + ret = -EAGAIN; + } + spin_unlock_irqrestore(&mxc_spdif_control.ctl_lock, flags); + + return ret; +} + +/*! + * Q-subcode infomation. + * the byte size is SPDIF_UBITS_SIZE/8 + */ +static int snd_mxc_spdif_qinfo(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; + uinfo->count = SPDIF_QSUB_SIZE; + return 0; +} + +/*! + * Get Q subcode from chip value which readed out + * in QChannel register. + */ +static int snd_mxc_spdif_qget(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&mxc_spdif_control.ctl_lock, flags); + if (mxc_spdif_control.ready_buf) { + memcpy(&ucontrol->value.bytes.data[0], + &mxc_spdif_control. + qsub[(mxc_spdif_control.ready_buf - + 1) * SPDIF_QSUB_SIZE], SPDIF_QSUB_SIZE); + } else { + ret = -EAGAIN; + } + spin_unlock_irqrestore(&mxc_spdif_control.ctl_lock, flags); + + return ret; +} + +/*! + * Valid bit infomation. + */ +static int snd_mxc_spdif_vbit_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + return 0; +} + +/*! + * Get valid good bit from interrupt status register. + */ +static int snd_mxc_spdif_vbit_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned int int_val; + + int_val = __raw_readl(spdif_base_addr + SPDIF_REG_SIS); + ucontrol->value.integer.value[0] = (int_val & INT_VAL_NOGOOD) != 0; + __raw_writel(INT_VAL_NOGOOD, spdif_base_addr + SPDIF_REG_SIC); + + return 0; +} + +/*! + * DPLL lock infomation. + */ +static int snd_mxc_spdif_rxrate_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 16000; + uinfo->value.integer.max = 96000; + return 0; +} + +/*! + * Get DPLL lock or not info from stable interrupt status register. + * User application must use this control to get locked, + * then can do next PCM operation + */ +static int snd_mxc_spdif_rxrate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct mxc_spdif_device *chip = snd_kcontrol_chip(kcontrol); + struct mxc_spdif_platform_data *spdif_data; + + spdif_data = chip->card->dev->platform_data; + + if (atomic_read(&chip->dpll_locked)) { + ucontrol->value.integer.value[0] = + spdif_get_rxclk_rate(spdif_data->spdif_clk, + SPDIF_DEFAULT_GAINSEL); + } else { + ucontrol->value.integer.value[0] = 0; + } + return 0; +} + +/*! + * User bit sync mode info + */ +static int snd_mxc_spdif_usync_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 1; + return 0; +} + +/*! + * User bit sync mode: + * 1 CD User channel subcode + * 0 Non-CD data + */ +static int snd_mxc_spdif_usync_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned int int_val; + + int_val = __raw_readl(spdif_base_addr + SPDIF_REG_SRCD); + ucontrol->value.integer.value[0] = (int_val & SRCD_CD_USER) != 0; + return 0; +} + +/*! + * User bit sync mode: + * 1 CD User channel subcode + * 0 Non-CD data + */ +static int snd_mxc_spdif_usync_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + unsigned int int_val; + + int_val = ucontrol->value.integer.value[0] << SRCD_CD_USER_OFFSET; + __raw_writel(int_val, spdif_base_addr + SPDIF_REG_SRCD); + return 0; +} + +/*! + * MXC SPDIF IEC958 controller defines + */ +static struct snd_kcontrol_new snd_mxc_spdif_ctrls[] = { + /* status cchanel controller */ + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | + SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = mxc_pb_spdif_info, + .get = mxc_pb_spdif_get, + .put = mxc_pb_spdif_put, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT), + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_info, + .get = snd_mxc_spdif_capture_get, + }, + /* user bits controller */ + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = "IEC958 Subcode Capture Default", + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_info, + .get = snd_mxc_spdif_subcode_get, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = "IEC958 Q-subcode Capture Default", + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_qinfo, + .get = snd_mxc_spdif_qget, + }, + /* valid bit error controller */ + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = "IEC958 V-Bit Errors", + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_vbit_info, + .get = snd_mxc_spdif_vbit_get, + }, + /* DPLL lock info get controller */ + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = "RX Sample Rate", + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_rxrate_info, + .get = snd_mxc_spdif_rxrate_get, + }, + /* User bit sync mode set/get controller */ + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = "IEC958 USyncMode CDText", + .access = + SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE | + SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_mxc_spdif_usync_info, + .get = snd_mxc_spdif_usync_get, + .put = snd_mxc_spdif_usync_put, + }, +}; + +/*! + * This function the soundcard structure. + * + * @param mxc_spdif pointer to the sound card structure. + * + * @return 0 on success, -1 otherwise. + */ +static int snd_card_mxc_spdif_pcm(struct mxc_spdif_device *mxc_spdif) +{ + struct snd_pcm *pcm; + int err; + err = snd_pcm_new(mxc_spdif->card, MXC_SPDIF_NAME, 0, + mxc_spdif->mxc_spdif_tx, + mxc_spdif->mxc_spdif_rx, &pcm); + if (err < 0) + return err; + + snd_pcm_lib_preallocate_pages_for_all(pcm, + SNDRV_DMA_TYPE_CONTINUOUS, + snd_dma_continuous_data + (GFP_KERNEL), + SPDIF_MAX_BUF_SIZE * 2, + SPDIF_MAX_BUF_SIZE * 2); + if (mxc_spdif->mxc_spdif_tx) + snd_pcm_set_ops(pcm, + SNDRV_PCM_STREAM_PLAYBACK, + &snd_card_mxc_spdif_playback_ops); + if (mxc_spdif->mxc_spdif_rx) + snd_pcm_set_ops(pcm, + SNDRV_PCM_STREAM_CAPTURE, + &snd_card_mxc_spdif_capture_ops); + pcm->private_data = mxc_spdif; + pcm->info_flags = 0; + strncpy(pcm->name, MXC_SPDIF_NAME, sizeof(pcm->name)); + mxc_spdif->pcm = pcm; + mxc_init_spdif_device(mxc_spdif); + return 0; +} + +extern void gpio_spdif_active(void); + +/*! + * This function initializes the driver in terms of memory of the soundcard + * and some basic HW clock settings. + * + * @param pdev Pointer to the platform device + * @return 0 on success, -1 otherwise. + */ +static int mxc_alsa_spdif_probe(struct platform_device + *pdev) +{ + int err, idx; + static int dev; + struct snd_card *card; + struct mxc_spdif_device *chip; + struct resource *res; + struct snd_kcontrol *kctl; + struct mxc_spdif_platform_data *plat_data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENOENT; + + if (dev >= SNDRV_CARDS) + return -ENODEV; + if (!enable[dev]) { + dev++; + return -ENOENT; + } + + /* register the soundcard */ + err = snd_card_create(index[dev], id[dev], THIS_MODULE, + sizeof(struct mxc_spdif_device), &card); + if (err < 0) + return err; + chip = card->private_data; + chip->card = card; + card->dev = &pdev->dev; + chip->reg_base = ioremap(res->start, res->end - res->start + 1); + spdif_base_addr = (unsigned long)chip->reg_base; + plat_data = (struct mxc_spdif_platform_data *)pdev->dev.platform_data; + chip->mxc_spdif_tx = plat_data->spdif_tx; + chip->mxc_spdif_rx = plat_data->spdif_rx; + chip->spdif_txclk_44100 = plat_data->spdif_clk_44100; + chip->spdif_txclk_48000 = plat_data->spdif_clk_48000; + atomic_set(&chip->dpll_locked, 0); + + err = snd_card_mxc_spdif_pcm(chip); + if (err < 0) + goto nodev; + + /*! + * Add controls to the card + */ + for (idx = 0; idx < ARRAY_SIZE(snd_mxc_spdif_ctrls); idx++) { + + kctl = snd_ctl_new1(&snd_mxc_spdif_ctrls[idx], chip); + if (kctl == NULL) { + err = -ENOMEM; + goto nodev; + } + /* check to add control to corresponding substream */ + if (strstr(kctl->id.name, "Playback")) + kctl->id.device = 0; + else + kctl->id.device = 1; + + err = snd_ctl_add(card, kctl); + if (err < 0) + goto nodev; + } + + clk_enable(plat_data->spdif_core_clk); + /*! + * SPDIF interrupt initialization + * software reset to SPDIF + */ + spdif_softreset(); + /* disable all the interrupts */ + spdif_intr_enable(0xffffff, 0); + /* spdif interrupt register and disable */ + if (request_irq(MXC_INT_SPDIF, spdif_isr, 0, "spdif", chip)) { + pr_err("MXC spdif: failed to request irq\n"); + err = -EBUSY; + goto nodev; + } + + if (chip->mxc_spdif_tx) + spin_lock_init(&chip->s[SNDRV_PCM_STREAM_PLAYBACK].dma_lock); + if (chip->mxc_spdif_rx) + spin_lock_init(&chip->s[SNDRV_PCM_STREAM_CAPTURE].dma_lock); + strcpy(card->driver, MXC_SPDIF_NAME); + strcpy(card->shortname, "MXC SPDIF TX/RX"); + sprintf(card->longname, "MXC Freescale with SPDIF"); + + err = snd_card_register(card); + if (err == 0) { + pr_info("MXC spdif support initialized\n"); + platform_set_drvdata(pdev, card); + gpio_spdif_active(); + return 0; + } + + nodev: + snd_card_free(card); + return err; +} + +extern void gpio_spdif_inactive(void); + +/*! + * This function releases the sound card and unmap the io address + * + * @param pdev Pointer to the platform device + * @return 0 on success, -1 otherwise. + */ + +static int mxc_alsa_spdif_remove(struct platform_device *pdev) +{ + struct mxc_spdif_device *chip; + struct snd_card *card; + struct mxc_spdif_platform_data *plat_data; + + card = platform_get_drvdata(pdev); + plat_data = pdev->dev.platform_data; + chip = card->private_data; + free_irq(MXC_INT_SPDIF, chip); + iounmap(chip->reg_base); + + snd_card_free(card); + platform_set_drvdata(pdev, NULL); + + clk_disable(plat_data->spdif_core_clk); + gpio_spdif_inactive(); + + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function suspends all active streams. + * + * TBD + * + * @param card pointer to the sound card structure. + * @param state requested state + * + * @return 0 on success, -1 otherwise. + */ +static int mxc_alsa_spdif_suspend(struct platform_device *pdev, + pm_message_t state) +{ + return 0; +} + +/*! + * This function resumes all suspended streams. + * + * TBD + * + * @param card pointer to the sound card structure. + * @param state requested state + * + * @return 0 on success, -1 otherwise. + */ +static int mxc_alsa_spdif_resume(struct platform_device *pdev) +{ + return 0; +} +#endif + +static struct platform_driver mxc_alsa_spdif_driver = { + .probe = mxc_alsa_spdif_probe, + .remove = mxc_alsa_spdif_remove, +#ifdef CONFIG_PM + .suspend = mxc_alsa_spdif_suspend, + .resume = mxc_alsa_spdif_resume, +#endif + .driver = { + .name = "mxc_alsa_spdif", + }, +}; + +/*! + * This function registers the sound driver structure. + * + */ +static int __init mxc_alsa_spdif_init(void) +{ + return platform_driver_register(&mxc_alsa_spdif_driver); +} + +/*! + * This function frees the sound driver structure. + * + */ +static void __exit mxc_alsa_spdif_exit(void) +{ + platform_driver_unregister(&mxc_alsa_spdif_driver); +} + +module_init(mxc_alsa_spdif_init); +module_exit(mxc_alsa_spdif_exit); +MODULE_AUTHOR("FREESCALE SEMICONDUCTOR"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MXC ALSA driver for SPDIF"); --- linux-fsl-imx51-2.6.31.orig/sound/arm/aaci.c +++ linux-fsl-imx51-2.6.31/sound/arm/aaci.c @@ -504,6 +504,10 @@ int err; aaci_pcm_hw_free(substream); + if (aacirun->pcm_open) { + snd_ac97_pcm_close(aacirun->pcm); + aacirun->pcm_open = 0; + } err = devdma_hw_alloc(NULL, substream, params_buffer_bytes(params)); @@ -517,7 +521,7 @@ else err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params), params_channels(params), - aacirun->pcm->r[1].slots); + aacirun->pcm->r[0].slots); if (err) goto out; --- linux-fsl-imx51-2.6.31.orig/sound/pcmcia/pdaudiocf/pdaudiocf_pcm.c +++ linux-fsl-imx51-2.6.31/sound/pcmcia/pdaudiocf/pdaudiocf_pcm.c @@ -51,7 +51,7 @@ return 0; /* already enough large */ vfree(runtime->dma_area); } - runtime->dma_area = vmalloc_32(size); + runtime->dma_area = vmalloc_32_user(size); if (! runtime->dma_area) return -ENOMEM; runtime->dma_bytes = size; --- linux-fsl-imx51-2.6.31.orig/sound/aoa/codecs/tas.c +++ linux-fsl-imx51-2.6.31/sound/aoa/codecs/tas.c @@ -897,6 +897,15 @@ client = i2c_new_device(adapter, &info); if (!client) return -ENODEV; + /* + * We know the driver is already loaded, so the device should be + * already bound. If not it means binding failed, and then there + * is no point in keeping the device instantiated. + */ + if (!client->driver) { + i2c_unregister_device(client); + return -ENODEV; + } /* * Let i2c-core delete that device on driver removal. --- linux-fsl-imx51-2.6.31.orig/sound/pci/via82xx.c +++ linux-fsl-imx51-2.6.31/sound/pci/via82xx.c @@ -1626,7 +1626,7 @@ struct snd_ctl_elem_value *ucontrol) { struct via82xx *chip = snd_kcontrol_chip(kcontrol); - unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id); + unsigned int idx = kcontrol->id.subdevice; ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0]; ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1]; @@ -1646,7 +1646,7 @@ struct snd_ctl_elem_value *ucontrol) { struct via82xx *chip = snd_kcontrol_chip(kcontrol); - unsigned int idx = snd_ctl_get_ioff(kcontrol, &ucontrol->id); + unsigned int idx = kcontrol->id.subdevice; unsigned long port = chip->port + 0x10 * idx; unsigned char val; int i, change = 0; @@ -1705,11 +1705,12 @@ }; static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = { - .name = "VIA DXS Playback Volume", - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .device = 0, + /* .subdevice set later */ + .name = "PCM Playback Volume", .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ), - .count = 4, .info = snd_via8233_dxs_volume_info, .get = snd_via8233_dxs_volume_get, .put = snd_via8233_dxs_volume_put, @@ -1936,10 +1937,18 @@ } else /* Using DXS when PCM emulation is enabled is really weird */ { - /* Standalone DXS controls */ - err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs_volume_control, chip)); - if (err < 0) - return err; + for (i = 0; i < 4; ++i) { + struct snd_kcontrol *kctl; + + kctl = snd_ctl_new1( + &snd_via8233_dxs_volume_control, chip); + if (!kctl) + return -ENOMEM; + kctl->id.subdevice = i; + err = snd_ctl_add(chip->card, kctl); + if (err < 0) + return err; + } } } /* select spdif data slot 10/11 */ --- linux-fsl-imx51-2.6.31.orig/sound/pci/intel8x0.c +++ linux-fsl-imx51-2.6.31/sound/pci/intel8x0.c @@ -1954,6 +1954,18 @@ .name = "Sony S1XP", .type = AC97_TUNE_INV_EAPD }, + { + .subvendor = 0x104d, + .subdevice = 0x81c0, + .name = "Sony VAIO VGN-T350P", /*AD1981B*/ + .type = AC97_TUNE_INV_EAPD + }, + { + .subvendor = 0x104d, + .subdevice = 0x81c5, + .name = "Sony VAIO VGN-B1VP", /*AD1981B*/ + .type = AC97_TUNE_INV_EAPD + }, { .subvendor = 0x1043, .subdevice = 0x80f3, --- linux-fsl-imx51-2.6.31.orig/sound/pci/ice1712/ice1724.c +++ linux-fsl-imx51-2.6.31/sound/pci/ice1712/ice1724.c @@ -643,7 +643,7 @@ (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { /* running? we cannot change the rate now... */ spin_unlock_irqrestore(&ice->reg_lock, flags); - return -EBUSY; + return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; } if (!force && is_pro_rate_locked(ice)) { spin_unlock_irqrestore(&ice->reg_lock, flags); --- linux-fsl-imx51-2.6.31.orig/sound/pci/rme9652/hdsp.c +++ linux-fsl-imx51-2.6.31/sound/pci/rme9652/hdsp.c @@ -4605,6 +4605,7 @@ if (err < 0) return err; + memset(&info, 0, sizeof(info)); spin_lock_irqsave(&hdsp->lock, flags); info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp); info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp); --- linux-fsl-imx51-2.6.31.orig/sound/pci/rme9652/hdspm.c +++ linux-fsl-imx51-2.6.31/sound/pci/rme9652/hdspm.c @@ -4127,6 +4127,7 @@ case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO: + memset(&info, 0, sizeof(info)); spin_lock_irq(&hdspm->lock); info.pref_sync_ref = hdspm_pref_sync_ref(hdspm); info.wordclock_sync_check = hdspm_wc_sync_check(hdspm); --- linux-fsl-imx51-2.6.31.orig/sound/pci/hda/hda_codec.c +++ linux-fsl-imx51-2.6.31/sound/pci/hda/hda_codec.c @@ -2356,9 +2356,14 @@ hda_nid_t nid; int i; - snd_hda_codec_write(codec, fg, 0, AC_VERB_SET_POWER_STATE, + /* this delay seems necessary to avoid click noise at power-down */ + if (power_state == AC_PWRST_D3) + msleep(100); + snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state); - msleep(10); /* partial workaround for "azx_get_response timeout" */ + /* partial workaround for "azx_get_response timeout" */ + if (power_state == AC_PWRST_D0) + msleep(10); nid = codec->start_nid; for (i = 0; i < codec->num_nodes; i++, nid++) { --- linux-fsl-imx51-2.6.31.orig/sound/pci/hda/patch_nvhdmi.c +++ linux-fsl-imx51-2.6.31/sound/pci/hda/patch_nvhdmi.c @@ -377,6 +377,7 @@ */ static struct hda_codec_preset snd_hda_preset_nvhdmi[] = { { .id = 0x10de0002, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch }, + { .id = 0x10de0003, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch }, { .id = 0x10de0006, .name = "MCP78 HDMI", .patch = patch_nvhdmi_8ch }, { .id = 0x10de0007, .name = "MCP7A HDMI", .patch = patch_nvhdmi_8ch }, { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, @@ -385,6 +386,7 @@ }; MODULE_ALIAS("snd-hda-codec-id:10de0002"); +MODULE_ALIAS("snd-hda-codec-id:10de0003"); MODULE_ALIAS("snd-hda-codec-id:10de0006"); MODULE_ALIAS("snd-hda-codec-id:10de0007"); MODULE_ALIAS("snd-hda-codec-id:10de0067"); --- linux-fsl-imx51-2.6.31.orig/sound/pci/hda/patch_realtek.c +++ linux-fsl-imx51-2.6.31/sound/pci/hda/patch_realtek.c @@ -16876,6 +16876,7 @@ SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_ECS), SND_PCI_QUIRK(0x105b, 0x0d47, "Foxconn 45CMX/45GMX/45CMX-K", ALC662_3ST_6ch_DIG), + SND_PCI_QUIRK(0x1179, 0xff6e, "Toshiba NB200", ALC663_ASUS_MODE4), SND_PCI_QUIRK(0x144d, 0xca00, "Samsung NC10", ALC272_SAMSUNG_NC10), SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte 945GCM-S2L", ALC662_3ST_6ch_DIG), --- linux-fsl-imx51-2.6.31.orig/sound/pci/hda/patch_sigmatel.c +++ linux-fsl-imx51-2.6.31/sound/pci/hda/patch_sigmatel.c @@ -1817,6 +1817,8 @@ "Dell Studio 17", STAC_DELL_M6_DMIC), SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, "Dell Studio 1555", STAC_DELL_M6_DMIC), + SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, + "Dell Studio 1557", STAC_DELL_M6_DMIC), {} /* terminator */ }; @@ -1927,6 +1929,10 @@ "HP mini 1000", STAC_HP_M4), SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, "HP HDX", STAC_HP_HDX), /* HDX16 */ + SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, + "HP dv6", STAC_HP_DV5), + SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, + "HP", STAC_HP_DV5), SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, "unknown Dell", STAC_DELL_M4_1), SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, @@ -4754,6 +4760,20 @@ static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state) { struct sigmatel_spec *spec = codec->spec; + int i; + hda_nid_t nid; + + /* reset each pin before powering down DAC/ADC to avoid click noise */ + nid = codec->start_nid; + for (i = 0; i < codec->num_nodes; i++, nid++) { + unsigned int wcaps = get_wcaps(codec, nid); + unsigned int wid_type = (wcaps & AC_WCAP_TYPE) >> + AC_WCAP_TYPE_SHIFT; + if (wid_type == AC_WID_PIN) + snd_hda_codec_read(codec, nid, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, 0); + } + if (spec->eapd_mask) stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data & @@ -5440,6 +5460,11 @@ case STAC_HP_DV5: snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN); + /* HP dv6 gives the headphone pin as a line-out. Thus we + * need to set hp_detect flag here to force to enable HP + * detection. + */ + spec->hp_detect = 1; break; case STAC_HP_HDX: spec->num_dmics = 1; --- linux-fsl-imx51-2.6.31.orig/sound/pci/hda/hda_intel.c +++ linux-fsl-imx51-2.6.31/sound/pci/hda/hda_intel.c @@ -1839,6 +1839,12 @@ if (!bdl_pos_adj[chip->dev_index]) return 1; /* no delayed ack */ + if (azx_dev->period_bytes == 0) { + printk(KERN_WARNING + "hda-intel: Divide by zero was avoided " + "in azx_dev->period_bytes.\n"); + return 0; + } if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) return 0; /* NG - it's below the period boundary */ return 1; /* OK, it's fine */ @@ -2254,6 +2260,9 @@ /* forced codec slots */ SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103), SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103), + /* conflict of ALC268 in slot#3 (digital I/O); a temporary fix */ + SND_PCI_QUIRK(0x1179, 0xff00, "Toshiba laptop", 0x03), + SND_PCI_QUIRK(0x1028, 0x0271, "Dell Studio XPS 1340", 0x09), {} }; @@ -2284,6 +2293,31 @@ } } +/* + * white-list for enable_msi + */ +static struct snd_pci_quirk msi_white_list[] __devinitdata = { + SND_PCI_QUIRK(0x103c, 0x30f7, "HP Pavilion dv4t-1300", 1), + SND_PCI_QUIRK(0x103c, 0x3607, "HP Compa CQ40", 1), + {} +}; + +static void __devinit check_msi(struct azx *chip) +{ + const struct snd_pci_quirk *q; + + chip->msi = enable_msi; + if (chip->msi) + return; + q = snd_pci_quirk_lookup(chip->pci, msi_white_list); + if (q) { + printk(KERN_INFO + "hda_intel: msi for device %04x:%04x set to %d\n", + q->subvendor, q->subdevice, q->value); + chip->msi = q->value; + } +} + /* * constructor @@ -2318,7 +2352,7 @@ chip->pci = pci; chip->irq = -1; chip->driver_type = driver_type; - chip->msi = enable_msi; + check_msi(chip); chip->dev_index = dev; INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work); @@ -2392,6 +2426,11 @@ } } + /* disable 64bit DMA address for Teradici */ + /* it does not work with device 6549:1200 subsys e4a2:040b */ + if (chip->driver_type == AZX_DRIVER_TERA) + gcap &= ~ICH6_GCAP_64OK; + /* allow 64bit DMA address if supported by H/W */ if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64))) pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64)); @@ -2649,11 +2688,15 @@ /* this entry seems still valid -- i.e. without emu20kx chip */ { PCI_DEVICE(0x1102, 0x0009), .driver_data = AZX_DRIVER_GENERIC }, #endif - /* AMD Generic, PCI class code and Vendor ID for HD Audio */ + /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */ { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID), .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8, .class_mask = 0xffffff, .driver_data = AZX_DRIVER_GENERIC }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID), + .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8, + .class_mask = 0xffffff, + .driver_data = AZX_DRIVER_GENERIC }, { 0, } }; MODULE_DEVICE_TABLE(pci, azx_ids); --- linux-fsl-imx51-2.6.31.orig/sound/pci/cs46xx/cs46xx_lib.h +++ linux-fsl-imx51-2.6.31/sound/pci/cs46xx/cs46xx_lib.h @@ -35,7 +35,7 @@ #ifdef CONFIG_SND_CS46XX_NEW_DSP -#define CS46XX_MIN_PERIOD_SIZE 1 +#define CS46XX_MIN_PERIOD_SIZE 64 #define CS46XX_MAX_PERIOD_SIZE 1024*1024 #else #define CS46XX_MIN_PERIOD_SIZE 2048 --- linux-fsl-imx51-2.6.31.orig/sound/pci/oxygen/oxygen_io.c +++ linux-fsl-imx51-2.6.31/sound/pci/oxygen/oxygen_io.c @@ -215,17 +215,8 @@ void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data) { - unsigned long timeout; - /* should not need more than about 300 us */ - timeout = jiffies + msecs_to_jiffies(1); - do { - if (!(oxygen_read16(chip, OXYGEN_2WIRE_BUS_STATUS) - & OXYGEN_2WIRE_BUSY)) - break; - udelay(1); - cond_resched(); - } while (time_after_eq(timeout, jiffies)); + msleep(1); oxygen_write8(chip, OXYGEN_2WIRE_MAP, map); oxygen_write8(chip, OXYGEN_2WIRE_DATA, data); --- linux-fsl-imx51-2.6.31.orig/sound/soc/Kconfig +++ linux-fsl-imx51-2.6.31/sound/soc/Kconfig @@ -35,6 +35,8 @@ source "sound/soc/s6000/Kconfig" source "sound/soc/sh/Kconfig" source "sound/soc/txx9/Kconfig" +source "sound/soc/imx/Kconfig" +source "sound/soc/stmp3xxx/Kconfig" # Supported codecs source "sound/soc/codecs/Kconfig" --- linux-fsl-imx51-2.6.31.orig/sound/soc/Makefile +++ linux-fsl-imx51-2.6.31/sound/soc/Makefile @@ -13,3 +13,5 @@ obj-$(CONFIG_SND_SOC) += s6000/ obj-$(CONFIG_SND_SOC) += sh/ obj-$(CONFIG_SND_SOC) += txx9/ +obj-$(CONFIG_SND_SOC) += imx/ +obj-$(CONFIG_SND_SOC) += stmp3xxx/ --- linux-fsl-imx51-2.6.31.orig/sound/soc/soc-dapm.c +++ linux-fsl-imx51-2.6.31/sound/soc/soc-dapm.c @@ -774,9 +774,19 @@ if (!w->power_check) continue; - power = w->power_check(w); - if (power) - sys_power = 1; + /* If we're suspending then pull down all the + * power. */ + switch (event) { + case SND_SOC_DAPM_STREAM_SUSPEND: + power = 0; + break; + + default: + power = w->power_check(w); + if (power) + sys_power = 1; + break; + } if (w->power == power) continue; --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-pcm.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-pcm.c @@ -0,0 +1,706 @@ +/* + * imx-pcm.c -- ALSA SoC interface for the Freescale i.MX3 CPU's + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Based on imx31-pcm.c by Nicolas Pitre, (C) 2004 MontaVista Software, Inc. + * and on mxc-alsa-mc13783 (C) 2006-2009 Freescale. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-pcm.h" +#include "imx-ssi.h" +#include "imx-esai.h" + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +#include +#include +#endif + +#ifdef CONFIG_SND_MXC_SOC_IRAM +static bool UseIram = 1; +#else +static bool UseIram; +#endif + +/* debug */ +#define IMX_PCM_DEBUG 0 +#if IMX_PCM_DEBUG +#define dbg(format, arg...) printk(format, ## arg) +#else +#define dbg(format, arg...) +#endif + +static const struct snd_pcm_hardware imx_pcm_hardware = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, +#ifdef CONFIG_SND_MXC_SOC_IRAM + .buffer_bytes_max = SND_RAM_SIZE, + .period_bytes_max = SND_RAM_SIZE / 4, +#else + .buffer_bytes_max = 64 * 1024, + .period_bytes_max = 16 * 1024, +#endif + .period_bytes_min = 2 * SZ_1K, + .periods_min = 2, + .periods_max = 255, + .fifo_size = 0, +}; + +static uint32_t audio_iram_phys_base_addr; +static void *audio_iram_virt_base_addr; + +static struct vm_operations_struct snd_mxc_audio_playback_vm_ops = { + .open = snd_pcm_mmap_data_open, + .close = snd_pcm_mmap_data_close, +}; + +/* + enable user space access to iram buffer +*/ +static int imx_iram_audio_playback_mmap(struct snd_pcm_substream *substream, + struct vm_area_struct *area) +{ + unsigned long off; + unsigned long phys; + unsigned long size; + int ret = 0; + + area->vm_ops = &snd_mxc_audio_playback_vm_ops; + area->vm_private_data = substream; + + off = area->vm_pgoff << PAGE_SHIFT; + phys = audio_iram_phys_base_addr + off; + size = area->vm_end - area->vm_start; + + if (off + size > SND_RAM_SIZE) + return -EINVAL; + + area->vm_page_prot = pgprot_writecombine(area->vm_page_prot); + area->vm_flags |= VM_IO; + ret = + remap_pfn_range(area, area->vm_start, phys >> PAGE_SHIFT, + size, area->vm_page_prot); + if (ret == 0) + area->vm_ops->open(area); + + return ret; +} + +/* + Map nbytes in virtual space + bytes -audio iram iram partition size + phys_addr - physical address of iram buffer + returns - virtual address of the iram buffer or NULL if fail +*/ +static void *imx_iram_init(dma_addr_t *phys_addr, size_t bytes) +{ + void *iram_base; + + iram_base = (void *)ioremap((uint32_t) SND_RAM_BASE_ADDR, bytes); + + audio_iram_virt_base_addr = iram_base; + audio_iram_phys_base_addr = (uint32_t) SND_RAM_BASE_ADDR; + *phys_addr = (dma_addr_t) SND_RAM_BASE_ADDR; + + return audio_iram_virt_base_addr; + +} + +/* + destroy the virtual mapping of the iram buffer +*/ + +static void imx_iram_free(void) +{ + iounmap(audio_iram_virt_base_addr); +} + +static int imx_get_sdma_transfer(int format, int dai_port, + struct snd_pcm_substream *substream) +{ + int transfer = -1; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + if (prtd->asrc_enable == 1) { + if (dai_port == IMX_DAI_SSI0) { + if (prtd->asrc_index == 0) + transfer = MXC_DMA_ASRCA_SSI1_TX0; + else if (prtd->asrc_index == 1) + transfer = MXC_DMA_ASRCB_SSI1_TX0; + } else if (dai_port == IMX_DAI_SSI1) { + if (prtd->asrc_index == 0) + transfer = MXC_DMA_ASRCA_SSI1_TX1; + else if (prtd->asrc_index == 1) + transfer = MXC_DMA_ASRCB_SSI1_TX1; + } else if (dai_port == IMX_DAI_SSI2) { + if (prtd->asrc_index == 0) + transfer = MXC_DMA_ASRCA_SSI2_TX0; + else if (prtd->asrc_index == 1) + transfer = MXC_DMA_ASRCB_SSI2_TX0; + } else if (dai_port == IMX_DAI_SSI3) { + if (prtd->asrc_index == 0) + transfer = MXC_DMA_ASRCA_SSI2_TX1; + else if (prtd->asrc_index == 1) + transfer = MXC_DMA_ASRCB_SSI2_TX1; + } else if (dai_port & IMX_DAI_ESAI_TX) { + if (prtd->asrc_index == 0) + transfer = MXC_DMA_ASRCA_ESAI; + else if (prtd->asrc_index == 1) + transfer = MXC_DMA_ASRCB_ESAI; + else + transfer = MXC_DMA_ASRCC_ESAI; + } + } else { +#endif + + if (dai_port == IMX_DAI_SSI0) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI1_16BIT_TX0; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI1_24BIT_TX0; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI1_24BIT_TX0; + } else { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI1_16BIT_RX0; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI1_24BIT_RX0; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI1_24BIT_RX0; + } + } else if (dai_port == IMX_DAI_SSI1) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI1_16BIT_TX1; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI1_24BIT_TX1; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI1_24BIT_TX1; + } else { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI1_16BIT_RX1; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI1_24BIT_RX1; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI1_24BIT_RX1; + } + } else if (dai_port == IMX_DAI_SSI2) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI2_16BIT_TX0; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI2_24BIT_TX0; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI2_24BIT_TX0; + } else { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI2_16BIT_RX0; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI2_24BIT_RX0; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI2_24BIT_RX0; + } + } else if (dai_port == IMX_DAI_SSI3) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI2_16BIT_TX1; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI2_24BIT_TX1; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI2_24BIT_TX1; + } else { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_SSI2_16BIT_RX1; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_SSI2_24BIT_RX1; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_SSI2_24BIT_RX1; + } + } else if ((dai_port & IMX_DAI_ESAI_TX) + || (dai_port & IMX_DAI_ESAI_RX)) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_ESAI_16BIT_TX; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_ESAI_24BIT_TX; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_ESAI_24BIT_TX; + } else { + if (format == SNDRV_PCM_FORMAT_S16_LE) + transfer = MXC_DMA_ESAI_16BIT_RX; + else if (format == SNDRV_PCM_FORMAT_S24_LE) + transfer = MXC_DMA_ESAI_24BIT_RX; + else if (format == SNDRV_PCM_FORMAT_S20_3LE) + transfer = MXC_DMA_ESAI_24BIT_RX; + } + } +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + } +#endif + return transfer; +} + +static int dma_new_period(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + unsigned int dma_size = frames_to_bytes(runtime, runtime->period_size); + unsigned int offset = dma_size * prtd->period; + int ret = 0; + mxc_dma_requestbuf_t sdma_request; + + if (!prtd->active) + return 0; + + memset(&sdma_request, 0, sizeof(mxc_dma_requestbuf_t)); + + dbg("period pos ALSA %x DMA %x\n", runtime->periods, prtd->period); + dbg("period size ALSA %x DMA %x Offset %x dmasize %x\n", + (unsigned int)runtime->period_size, + runtime->dma_bytes, offset, dma_size); + dbg("DMA addr %x\n", runtime->dma_addr + offset); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + sdma_request.src_addr = + (dma_addr_t) (runtime->dma_addr + offset); + else + sdma_request.dst_addr = + (dma_addr_t) (runtime->dma_addr + offset); + + sdma_request.num_of_bytes = dma_size; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + mxc_dma_config(prtd->dma_wchannel, + &sdma_request, 1, MXC_DMA_MODE_WRITE); + ret = mxc_dma_enable(prtd->dma_wchannel); + } else { + + mxc_dma_config(prtd->dma_wchannel, + &sdma_request, 1, MXC_DMA_MODE_READ); + ret = mxc_dma_enable(prtd->dma_wchannel); + } + prtd->dma_active = 1; + prtd->period++; + prtd->period %= runtime->periods; + + return ret; +} + +static void audio_dma_irq(void *data) +{ + struct snd_pcm_substream *substream = (struct snd_pcm_substream *)data; + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + + prtd->dma_active = 0; + prtd->periods++; + prtd->periods %= runtime->periods; + + dbg("irq per %d offset %x\n", prtd->periods, + frames_to_bytes(runtime, runtime->period_size) * prtd->periods); + + if (prtd->active) + snd_pcm_period_elapsed(substream); + dma_new_period(substream); +} + +static int imx_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + int ret = 0, channel = 0; + + if (prtd->dma_alloc) { + mxc_dma_free(prtd->dma_wchannel); + prtd->dma_alloc = 0; + } + + /* only allocate the DMA chn once */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (prtd->asrc_enable == 1) { + struct dma_channel_info info; + mxc_dma_requestbuf_t sdma_request; + info.asrc.channs = runtime->channels; + if (prtd->dma_asrc) { + mxc_dma_free(prtd->dma_asrc); + prtd->dma_asrc = 0; + } + memset(&sdma_request, 0, sizeof(mxc_dma_requestbuf_t)); + /* num_of_bytes can be set any value except for zero */ + sdma_request.num_of_bytes = 0x40; + channel = + mxc_dma_request_ext(prtd->dma_ch, + "ALSA TX SDMA", &info); + + mxc_dma_config(channel, &sdma_request, + 1, MXC_DMA_MODE_WRITE); + prtd->dma_asrc = channel; + if (prtd->asrc_index == 0) + prtd->dma_ch = MXC_DMA_ASRC_A_RX; + else if (prtd->asrc_index == 1) + prtd->dma_ch = MXC_DMA_ASRC_B_RX; + else + prtd->dma_ch = MXC_DMA_ASRC_C_RX; + + channel = + mxc_dma_request(MXC_DMA_ASRC_A_RX, "ALSA ASRC RX"); + } else + channel = mxc_dma_request(prtd->dma_ch, "ALSA TX SDMA"); +#else + channel = mxc_dma_request(prtd->dma_ch, "ALSA TX SDMA"); +#endif + if (channel < 0) { + pr_err("imx-pcm: error requesting \ + a write dma channel\n"); + return channel; + } + ret = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + audio_dma_irq, (void *)substream); + + } else { + channel = mxc_dma_request(prtd->dma_ch, "ALSA RX SDMA"); + if (channel < 0) { + pr_err("imx-pcm: error requesting \ + a read dma channel\n"); + return channel; + } + ret = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + audio_dma_irq, (void *)substream); + } + prtd->dma_wchannel = channel; + prtd->dma_alloc = 1; + + prtd->period = 0; + prtd->periods = 0; + return 0; +} + +static int imx_pcm_hw_params(struct snd_pcm_substream + *substream, struct snd_pcm_hw_params *params) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + prtd->dma_ch = + imx_get_sdma_transfer(params_format(params), + rtd->dai->cpu_dai->id, substream); + + if (prtd->dma_ch < 0) { + printk(KERN_ERR "imx-pcm: invaild sdma transfer type"); + return -1; + } + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + + return 0; +} + +static int imx_pcm_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + + if (prtd->dma_wchannel) { + mxc_dma_free(prtd->dma_wchannel); + prtd->dma_wchannel = 0; + prtd->dma_alloc = 0; + } +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if ((prtd->asrc_enable == 1) && prtd->dma_asrc) { + mxc_dma_free(prtd->dma_asrc); + prtd->dma_asrc = 0; + } +#endif + + return 0; +} + +static int imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct mxc_runtime_data *prtd = substream->runtime->private_data; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + prtd->dma_active = 0; + prtd->active = 1; + ret = dma_new_period(substream); + ret = dma_new_period(substream); +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (prtd->asrc_enable == 1) { + ret = mxc_dma_enable(prtd->dma_asrc); + asrc_start_conv(prtd->asrc_index); + /* There is underrun, if immediately enable SSI after + start ASRC */ + mdelay(1); + } +#endif + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + prtd->active = 0; +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (prtd->asrc_enable == 1) { + mxc_dma_disable(prtd->dma_asrc); + asrc_stop_conv(prtd->asrc_index); + } +#endif + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static snd_pcm_uframes_t imx_pcm_pointer(struct + snd_pcm_substream + *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + unsigned int offset = 0; + + offset = (runtime->period_size * (prtd->periods)); + if (offset >= runtime->buffer_size) + offset = 0; + dbg("pointer offset %x\n", offset); + + return offset; +} + +static int imx_pcm_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd; + int ret; + + snd_soc_set_runtime_hwparams(substream, &imx_pcm_hardware); + + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + return ret; + + prtd = kzalloc(sizeof(struct mxc_runtime_data), GFP_KERNEL); + if (prtd == NULL) + return -ENOMEM; + + runtime->private_data = prtd; + return 0; +} + +static int imx_pcm_close(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct mxc_runtime_data *prtd = runtime->private_data; + + kfree(prtd); + return 0; +} + +static int +imx_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_dai *cpu_dai = socdev->card->dai_link->cpu_dai; + struct mxc_audio_platform_data *dev_data; + int ext_ram = 0; + int ret = 0; + + dbg("+imx_pcm_mmap:" + "UseIram=%d dma_addr=%x dma_area=%x dma_bytes=%d\n", + UseIram, (unsigned int)runtime->dma_addr, + runtime->dma_area, runtime->dma_bytes); + + if (cpu_dai->dev && cpu_dai->dev->platform_data) { + dev_data = cpu_dai->dev->platform_data; + ext_ram = dev_data->ext_ram; + } + + if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE) + || ext_ram || !UseIram) { + ret = + dma_mmap_writecombine(substream->pcm->card-> + dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); + return ret; + } else + return imx_iram_audio_playback_mmap(substream, vma); +} + +struct snd_pcm_ops imx_pcm_ops = { + .open = imx_pcm_open, + .close = imx_pcm_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = imx_pcm_hw_params, + .hw_free = imx_pcm_hw_free, + .prepare = imx_pcm_prepare, + .trigger = imx_pcm_trigger, + .pointer = imx_pcm_pointer, + .mmap = imx_pcm_mmap, +}; + +static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + struct snd_soc_pcm_runtime *rtd = pcm->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_dai *cpu_dai = socdev->card->dai_link->cpu_dai; + struct mxc_audio_platform_data *dev_data; + int ext_ram = 0; + size_t size = imx_pcm_hardware.buffer_bytes_max; + + if (cpu_dai->dev && cpu_dai->dev->platform_data) { + dev_data = cpu_dai->dev->platform_data; + ext_ram = dev_data->ext_ram; + } + + buf->dev.type = SNDRV_DMA_TYPE_DEV; + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + + if ((stream == SNDRV_PCM_STREAM_CAPTURE) || ext_ram || !UseIram) + buf->area = + dma_alloc_writecombine(pcm->card->dev, size, + &buf->addr, GFP_KERNEL); + else + buf->area = imx_iram_init(&buf->addr, size); + + if (!buf->area) + return -ENOMEM; + buf->bytes = size; + printk(KERN_INFO "DMA Sound Buffers Allocated:" + "UseIram=%d buf->addr=%x buf->area=%p size=%d\n", + UseIram, buf->addr, buf->area, size); + return 0; +} + +static void imx_pcm_free_dma_buffers(struct snd_pcm *pcm) +{ + struct snd_pcm_substream *substream; + struct snd_dma_buffer *buf; + struct snd_soc_pcm_runtime *rtd = pcm->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_dai *cpu_dai = socdev->card->dai_link->cpu_dai; + struct mxc_audio_platform_data *dev_data; + int ext_ram = 0; + int stream; + + if (cpu_dai->dev && cpu_dai->dev->platform_data) { + dev_data = cpu_dai->dev->platform_data; + ext_ram = dev_data->ext_ram; + } + + for (stream = 0; stream < 2; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + + buf = &substream->dma_buffer; + if (!buf->area) + continue; + + if ((stream == SNDRV_PCM_STREAM_CAPTURE) + || ext_ram || !UseIram) + dma_free_writecombine(pcm->card->dev, + buf->bytes, buf->area, buf->addr); + else + imx_iram_free(); + buf->area = NULL; + } +} + +static u64 imx_pcm_dmamask = 0xffffffff; + +static int imx_pcm_new(struct snd_card *card, + struct snd_soc_dai *dai, struct snd_pcm *pcm) +{ + int ret = 0; + + if (!card->dev->dma_mask) + card->dev->dma_mask = &imx_pcm_dmamask; + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = 0xffffffff; + + if (dai->playback.channels_min) { + ret = imx_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_PLAYBACK); + if (ret) + goto out; + } + + if (dai->capture.channels_min) { + ret = imx_pcm_preallocate_dma_buffer(pcm, + SNDRV_PCM_STREAM_CAPTURE); + if (ret) + goto out; + } + out: + return ret; +} + +struct snd_soc_platform imx_soc_platform = { + .name = "imx-audio", + .pcm_ops = &imx_pcm_ops, + .pcm_new = imx_pcm_new, + .pcm_free = imx_pcm_free_dma_buffers, +}; +EXPORT_SYMBOL_GPL(imx_soc_platform); + +static int __init imx_pcm_init(void) +{ + return snd_soc_register_platform(&imx_soc_platform); +} +module_init(imx_pcm_init); + +static void __exit imx_pcm_exit(void) +{ + snd_soc_unregister_platform(&imx_soc_platform); +} +module_exit(imx_pcm_exit); + +MODULE_AUTHOR("Liam Girdwood"); +MODULE_DESCRIPTION("Freescale i.MX3x PCM DMA module"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-bt.h +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-bt.h @@ -0,0 +1,21 @@ +/* + * imx-3stack-bt.h -- Bluetooth PCM driver header file for Freescale IMX + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef _MXC_BTPCM_H +#define _MXC_BTPCM_H + +extern struct snd_soc_dai bt_dai; +extern struct snd_soc_codec_device soc_codec_dev_bt; +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-ak4647.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-ak4647.c @@ -0,0 +1,448 @@ +/* + * imx-3stack-ak4647.c -- SoC audio for imx_3stack + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-pcm.h" +#include "imx-ssi.h" + +#define AK4647_SSI_MASTER 1 + +extern struct snd_soc_dai ak4647_hifi_dai; +extern struct snd_soc_codec_device soc_codec_dev_ak4647; + +static void headphone_detect_handler(struct work_struct *work); +static DECLARE_WORK(hp_event, headphone_detect_handler); +static int ak4647_jack_func; +static int ak4647_spk_func; + +struct imx_3stack_priv { + struct platform_device *pdev; +}; + +static struct imx_3stack_priv card_priv; + +static void imx_3stack_init_dam(int ssi_port, int dai_port) +{ + /* AK4647 uses SSI1 or SSI2 via AUDMUX port dai_port for audio */ + unsigned int ssi_ptcr = 0; + unsigned int dai_ptcr = 0; + unsigned int ssi_pdcr = 0; + unsigned int dai_pdcr = 0; + + /* reset port ssi_port & dai_port */ + __raw_writel(0, DAM_PTCR(ssi_port)); + __raw_writel(0, DAM_PTCR(dai_port)); + __raw_writel(0, DAM_PDCR(ssi_port)); + __raw_writel(0, DAM_PDCR(dai_port)); + + /* set to synchronous */ + ssi_ptcr |= AUDMUX_PTCR_SYN; + dai_ptcr |= AUDMUX_PTCR_SYN; + +#if AK4647_SSI_MASTER + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TFSDIR; + ssi_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, dai_port); + + /* set Tx Clock direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TCLKDIR; + ssi_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, dai_port); +#else + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source ssi_port --> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TFSDIR; + dai_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, ssi_port); + + /* set Tx Clock direction and source ssi_port--> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TCLKDIR; + dai_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, ssi_port); +#endif + + __raw_writel(ssi_ptcr, DAM_PTCR(ssi_port)); + __raw_writel(dai_ptcr, DAM_PTCR(dai_port)); + __raw_writel(ssi_pdcr, DAM_PDCR(ssi_port)); + __raw_writel(dai_pdcr, DAM_PDCR(dai_port)); +} + +static int imx_3stack_hifi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + unsigned int channels = params_channels(params); + unsigned int rate = params_rate(params); + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + int ret = 0; + u32 dai_format; + +#if AK4647_SSI_MASTER + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; +#else + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS; +#endif + + ssi_mode->sync_mode = 1; + if (channels == 1) + ssi_mode->network_mode = 0; + else + ssi_mode->network_mode = 1; + + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, dai_format); + if (ret < 0) + return ret; + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, + channels == 1 ? 0xfffffffe : 0xfffffffc, 2); + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); + if (ret < 0) + return ret; + + /* set the SSI system clock as input (unused) */ + snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, SND_SOC_CLOCK_IN); + + snd_soc_dai_set_sysclk(codec_dai, 0, rate, 0); + + /* set codec BCLK division for sample rate */ + snd_soc_dai_set_clkdiv(codec_dai, 0, 0); + + return 0; +} + +/* + * imx_3stack ak4647 HiFi DAI operations. + */ +static struct snd_soc_ops imx_3stack_hifi_ops = { + .hw_params = imx_3stack_hifi_hw_params, +}; + +static int ak4647_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = ak4647_jack_func; + return 0; +} + +static int ak4647_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + if (ak4647_jack_func == ucontrol->value.integer.value[0]) + return 0; + + ak4647_jack_func = ucontrol->value.integer.value[0]; + + if (ak4647_jack_func) + snd_soc_dapm_enable_pin(codec, "Headphone Jack"); + else + snd_soc_dapm_disable_pin(codec, "Headphone Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int ak4647_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = ak4647_spk_func; + return 0; +} + +static int ak4647_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + if (ak4647_spk_func == ucontrol->value.integer.value[0]) + return 0; + + ak4647_spk_func = ucontrol->value.integer.value[0]; + if (ak4647_spk_func) + snd_soc_dapm_enable_pin(codec, "Line Out Jack"); + else + snd_soc_dapm_disable_pin(codec, "Line Out Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int spk_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + + if (plat->amp_enable == NULL) + return 0; + + if (SND_SOC_DAPM_EVENT_ON(event)) + plat->amp_enable(1); + else + plat->amp_enable(0); + return 0; +} + +/* imx_3stack card dapm widgets */ +static const struct snd_soc_dapm_widget imx_3stack_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Mic1 Jack", NULL), + SND_SOC_DAPM_LINE("Line In Jack", NULL), + SND_SOC_DAPM_LINE("Line Out Jack", NULL), + SND_SOC_DAPM_SPK("Ext Spk", spk_amp_event), + SND_SOC_DAPM_HP("Headphone Jack", NULL), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + /* mic is connected to mic1 - with bias */ + {"Left Input", NULL, "Mic1 Jack"}, + + /* Line in jack */ + {"Left Input", NULL, "Line In Jack"}, + {"Right Input", NULL, "Line In Jack"}, + + /* Headphone jack */ + {"Headphone Jack", NULL, "HPL"}, + {"Headphone Jack", NULL, "HPR"}, + + /* Line out jack */ + {"Line Out Jack", NULL, "LOUT"}, + + /* Ext Spk */ + {"Ext Spk", NULL, "LOUT"}, + +}; + +static const char *jack_function[] = { "off", "on" }; + +static const char *spk_function[] = { "off", "on" }; + +static const struct soc_enum ak4647_enum[] = { + SOC_ENUM_SINGLE_EXT(2, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), +}; + +static const struct snd_kcontrol_new ak4647_card_controls[] = { + SOC_ENUM_EXT("Jack Function", ak4647_enum[0], ak4647_get_jack, + ak4647_set_jack), + SOC_ENUM_EXT("Speaker Function", ak4647_enum[1], ak4647_get_spk, + ak4647_set_spk), +}; + +static void headphone_detect_handler(struct work_struct *work) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + + sysfs_notify(&pdev->dev.kobj, NULL, "headphone"); +} + +static irqreturn_t imx_headphone_detect_handler(int irq, void *dev_id) +{ + schedule_work(&hp_event); + return IRQ_HANDLED; + +} + +static ssize_t show_headphone(struct device_driver *dev, char *buf) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + unsigned int value; + + value = plat->hp_status(); + + if (value == 0) + strcpy(buf, "speaker\n"); + else + strcpy(buf, "headphone\n"); + + return strlen(buf); +} + +DRIVER_ATTR(headphone, S_IRUGO | S_IWUSR, show_headphone, NULL); + +static int imx_3stack_ak4647_init(struct snd_soc_codec *codec) +{ + int i, ret; + for (i = 0; i < ARRAY_SIZE(ak4647_card_controls); i++) { + ret = snd_ctl_add(codec->card, + snd_soc_cnew(&ak4647_card_controls[i], + codec, NULL)); + if (ret < 0) + return ret; + } + + snd_soc_dapm_new_controls(codec, imx_3stack_dapm_widgets, + ARRAY_SIZE(imx_3stack_dapm_widgets)); + + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_sync(codec); + + return 0; +} + +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "ak4647", + .stream_name = "ak4647", + .codec_dai = &ak4647_hifi_dai, + .init = imx_3stack_ak4647_init, + .ops = &imx_3stack_hifi_ops, +}; + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_ak4647, +}; + +/* + * This function will register the snd_soc_pcm_link drivers. + * It also registers devices for platform DMA, I2S, SSP and registers an + * I2C driver to probe the codec. + */ +static int __init imx_3stack_ak4647_probe(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *dev_data = pdev->dev.platform_data; + struct imx_3stack_priv *priv = &card_priv; + struct snd_soc_dai *ak4647_cpu_dai; + int ret = 0; + + dev_data->init(); + + if (dev_data->src_port == 1) + ak4647_cpu_dai = &imx_ssi_dai[0]; + else + ak4647_cpu_dai = &imx_ssi_dai[2]; + + imx_3stack_dai.cpu_dai = ak4647_cpu_dai; + + /* Configure audio port 3 */ + gpio_activate_audio_ports(); + imx_3stack_init_dam(dev_data->src_port, dev_data->ext_port); + + ret = request_irq(dev_data->intr_id_hp, imx_headphone_detect_handler, 0, + "headphone", NULL); + if (ret < 0) + goto err; + + ret = driver_create_file(pdev->dev.driver, &driver_attr_headphone); + if (ret < 0) + goto sysfs_err; + + priv->pdev = pdev; + return ret; + +sysfs_err: + free_irq(dev_data->intr_id_hp, NULL); +err: + return ret; +} + +static int __devexit imx_3stack_ak4647_remove(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *dev_data = pdev->dev.platform_data; + gpio_inactivate_audio_ports(); + free_irq(dev_data->intr_id_hp, NULL); + driver_remove_file(pdev->dev.driver, &driver_attr_headphone); + return 0; +} + +static struct platform_driver imx_3stack_ak4647_driver = { + .probe = imx_3stack_ak4647_probe, + .remove = __devexit_p(imx_3stack_ak4647_remove), + .driver = { + .name = "imx-3stack-ak4647", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_asoc_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_ak4647_driver); + if (ret < 0) + goto exit; + + if (snd_soc_card_imx_3stack.codec == NULL) { + ret = -ENOMEM; + goto err_device_alloc; + } + + imx_3stack_snd_device = platform_device_alloc("soc-audio", 3); + if (!imx_3stack_snd_device) + goto err_device_alloc; + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + if (0 == ret) + goto exit; + + platform_device_put(imx_3stack_snd_device); +err_device_alloc: + platform_driver_unregister(&imx_3stack_ak4647_driver); +exit: + return ret; +} + +static void __exit imx_3stack_asoc_exit(void) +{ + platform_driver_unregister(&imx_3stack_ak4647_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_asoc_init); +module_exit(imx_3stack_asoc_exit); + +/* Module information */ +MODULE_DESCRIPTION("ALSA SoC ak4647 imx_3stack"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/Kconfig +++ linux-fsl-imx51-2.6.31/sound/soc/imx/Kconfig @@ -0,0 +1,74 @@ +config SND_MXC_SOC + tristate "SoC Audio for the Freescale i.MX CPU" + depends on ARCH_MXC && SND + select SND_PCM + help + Say Y or M if you want to add support for codecs attached to + the MXC I2S or SSP interface. You will also need + to select the audio interfaces to support below. + +if SND_MXC_SOC + +config SND_MXC_SOC_SSI + tristate + +config SND_MXC_SOC_ESAI + tristate + +config SND_MXC_SOC_AC97 + tristate + +config SND_MXC_SOC_IRAM + bool "Locate Audio DMA playback buffers in IRAM" + help + Say Y if you don't want Audio playback buffers in external ram + +config SND_SOC_IMX_3STACK_WM8350 + tristate "SoC Audio support for IMX - WM8350" + depends on MFD_WM8350 + select SND_MXC_SOC_SSI + select SND_SOC_WM8350 + help + Say Y if you want to add support for SoC audio on IMX 3STACK + with the WM8350. + +config SND_SOC_IMX_3STACK_SGTL5000 + tristate "SoC Audio support for IMX - SGTL5000" + select SND_MXC_SOC_SSI + select SND_SOC_SGTL5000 + help + Say Y if you want to add support for SoC audio on IMX 3STACK + with the SGTL5000. + +config SND_SOC_IMX_3STACK_AK4647 + tristate "SoC Audio support for IMX - AK4647" + select SND_MXC_SOC_SSI + select SND_SOC_AK4647 + help + Say Y if you want to add support for SoC audio on IMX 3STACK + with the AK4647. + +config SND_SOC_IMX_3STACK_WM8580 + tristate "SoC Audio support for IMX - WM8580" + select SND_MXC_SOC_ESAI + select SND_SOC_WM8580 + help + Say Y if you want to add support for Soc audio on IMX 3STACK + with the WM8580 + +config SND_SOC_IMX_3STACK_AK5702 + tristate "SoC Audio support for IMX - AK5702" + select SND_MXC_SOC_ESAI + select SND_SOC_AK5702 + help + Say Y if you want to add support for Soc audio on IMX 3STACK + with the AK5702 + +config SND_SOC_IMX_3STACK_BLUETOOTH + tristate "SoC Audio support for IMX - BLUETOOTH" + select SND_MXC_SOC_SSI + select SND_SOC_BLUETOOTH + help + Say Y if you want to add support for Soc audio on IMX 3STACK + with the BLUETOOTH +endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-sgtl5000.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-sgtl5000.c @@ -0,0 +1,689 @@ +/* + * imx-3stack-sgtl5000.c -- i.MX 3Stack Driver for Freescale SGTL5000 Codec + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 21th Oct 2008 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/sgtl5000.h" +#include "imx-ssi.h" +#include "imx-pcm.h" + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +#include + +static unsigned int sgtl5000_rates[] = { + 0, + 32000, + 44100, + 48000, + 96000, +}; + +struct asrc_esai { + unsigned int cpu_dai_rates; + unsigned int codec_dai_rates; + enum asrc_pair_index asrc_index; + unsigned int output_sample_rate; +}; + +static struct asrc_esai asrc_ssi_data; +#endif + +/* SSI BCLK and LRC master */ +#define SGTL5000_SSI_MASTER 1 + +struct imx_3stack_priv { + int sysclk; + int hw; + struct platform_device *pdev; +}; + +static struct imx_3stack_priv card_priv; + +static int imx_3stack_audio_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *machine = rtd->dai; + struct snd_soc_dai *cpu_dai = machine->cpu_dai; + struct snd_soc_dai *codec_dai = machine->codec_dai; + struct imx_3stack_priv *priv = &card_priv; + unsigned int rate = params_rate(params); + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + int ret = 0; + + unsigned int channels = params_channels(params); + u32 dai_format; + + /* only need to do this once as capture and playback are sync */ + if (priv->hw) + return 0; + priv->hw = 1; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if ((asrc_ssi_data.output_sample_rate != 0) + && (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)) { + unsigned int asrc_input_rate = rate; + unsigned int channel = params_channels(params); + struct mxc_runtime_data *pcm_data = + substream->runtime->private_data; + struct asrc_config config; + struct mxc_audio_platform_data *plat; + struct imx_3stack_priv *priv = &card_priv; + int retVal = 0; + retVal = asrc_req_pair(channel, &asrc_ssi_data.asrc_index); + if (retVal < 0) { + pr_err("asrc_req_pair fail\n"); + return -1; + } + config.pair = asrc_ssi_data.asrc_index; + config.channel_num = channel; + config.input_sample_rate = asrc_input_rate; + config.output_sample_rate = asrc_ssi_data.output_sample_rate; + config.inclk = INCLK_NONE; + config.word_width = 32; + plat = priv->pdev->dev.platform_data; + if (plat->src_port == 1) + config.outclk = OUTCLK_SSI1_TX; + else + config.outclk = OUTCLK_SSI2_TX; + retVal = asrc_config_pair(&config); + if (retVal < 0) { + pr_err("Fail to config asrc\n"); + asrc_release_pair(asrc_ssi_data.asrc_index); + return retVal; + } + rate = asrc_ssi_data.output_sample_rate; + pcm_data->asrc_index = asrc_ssi_data.asrc_index; + pcm_data->asrc_enable = 1; + } +#endif + + snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, priv->sysclk, 0); + snd_soc_dai_set_sysclk(codec_dai, SGTL5000_LRCLK, rate, 0); + +#if SGTL5000_SSI_MASTER + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; +#else + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS; +#endif + + ssi_mode->sync_mode = 1; + if (channels == 1) + ssi_mode->network_mode = 0; + else + ssi_mode->network_mode = 1; + + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, dai_format); + if (ret < 0) + return ret; + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, + channels == 1 ? 0xfffffffe : 0xfffffffc, 2); + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); + if (ret < 0) + return ret; + + /* set the SSI system clock as input (unused) */ + snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, SND_SOC_CLOCK_IN); + + return 0; +} + +static int imx_3stack_startup(struct snd_pcm_substream *substream) +{ +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (asrc_ssi_data.output_sample_rate != 0) { + struct snd_soc_pcm_runtime *rtd = + substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + asrc_ssi_data.cpu_dai_rates = cpu_dai->playback.rates; + asrc_ssi_data.codec_dai_rates = + codec_dai->playback.rates; + cpu_dai->playback.rates = + SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT; + codec_dai->playback.rates = + SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT; + } + } +#endif + return 0; +} + +static void imx_3stack_shutdown(struct snd_pcm_substream *substream) +{ + struct imx_3stack_priv *priv = &card_priv; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (asrc_ssi_data.output_sample_rate != 0) { + struct snd_soc_pcm_runtime *rtd = + substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + codec_dai->playback.rates = + asrc_ssi_data.codec_dai_rates; + cpu_dai->playback.rates = asrc_ssi_data.cpu_dai_rates; + asrc_release_pair(asrc_ssi_data.asrc_index); + } + } +#endif + + priv->hw = 0; +} + +/* + * imx_3stack SGTL5000 audio DAI opserations. + */ +static struct snd_soc_ops imx_3stack_ops = { + .startup = imx_3stack_startup, + .shutdown = imx_3stack_shutdown, + .hw_params = imx_3stack_audio_hw_params, +}; + +static void imx_3stack_init_dam(int ssi_port, int dai_port) +{ + unsigned int ssi_ptcr = 0; + unsigned int dai_ptcr = 0; + unsigned int ssi_pdcr = 0; + unsigned int dai_pdcr = 0; + /* SGTL5000 uses SSI1 or SSI2 via AUDMUX port dai_port for audio */ + + /* reset port ssi_port & dai_port */ + __raw_writel(0, DAM_PTCR(ssi_port)); + __raw_writel(0, DAM_PTCR(dai_port)); + __raw_writel(0, DAM_PDCR(ssi_port)); + __raw_writel(0, DAM_PDCR(dai_port)); + + /* set to synchronous */ + ssi_ptcr |= AUDMUX_PTCR_SYN; + dai_ptcr |= AUDMUX_PTCR_SYN; + +#if SGTL5000_SSI_MASTER + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TFSDIR; + ssi_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, dai_port); + + /* set Tx Clock direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TCLKDIR; + ssi_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, dai_port); +#else + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source ssi_port --> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TFSDIR; + dai_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, ssi_port); + + /* set Tx Clock direction and source ssi_port--> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TCLKDIR; + dai_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, ssi_port); +#endif + + __raw_writel(ssi_ptcr, DAM_PTCR(ssi_port)); + __raw_writel(dai_ptcr, DAM_PTCR(dai_port)); + __raw_writel(ssi_pdcr, DAM_PDCR(ssi_port)); + __raw_writel(dai_pdcr, DAM_PDCR(dai_port)); +} + +/* imx_3stack machine connections to the codec pins */ +static const struct snd_soc_dapm_route audio_map[] = { + + /* Mic Jack --> MIC_IN (with automatic bias) */ + {"MIC_IN", NULL, "Mic Jack"}, + + /* Line in Jack --> LINE_IN */ + {"LINE_IN", NULL, "Line In Jack"}, + + /* HP_OUT --> Headphone Jack */ + {"Headphone Jack", NULL, "HP_OUT"}, + + /* LINE_OUT --> Ext Speaker */ + {"Ext Spk", NULL, "LINE_OUT"}, +}; + +static int sgtl5000_jack_func; +static int sgtl5000_spk_func; +static int sgtl5000_line_in_func; + +static void headphone_detect_handler(struct work_struct *work) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + int hp_status; + + sysfs_notify(&pdev->dev.kobj, NULL, "headphone"); + hp_status = plat->hp_status(); + if (hp_status) + set_irq_type(plat->hp_irq, IRQ_TYPE_EDGE_FALLING); + else + set_irq_type(plat->hp_irq, IRQ_TYPE_EDGE_RISING); + enable_irq(plat->hp_irq); +} + +static DECLARE_DELAYED_WORK(hp_event, headphone_detect_handler); + +static irqreturn_t imx_headphone_detect_handler(int irq, void *data) +{ + disable_irq_nosync(irq); + schedule_delayed_work(&hp_event, msecs_to_jiffies(200)); + return IRQ_HANDLED; +} + +static ssize_t show_headphone(struct device_driver *dev, char *buf) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + u16 hp_status; + + /* determine whether hp is plugged in */ + hp_status = plat->hp_status(); + + if (hp_status == 0) + strcpy(buf, "speaker\n"); + else + strcpy(buf, "headphone\n"); + + return strlen(buf); +} + +static DRIVER_ATTR(headphone, S_IRUGO | S_IWUSR, show_headphone, NULL); + +static const char *jack_function[] = { "off", "on"}; + +static const char *spk_function[] = { "off", "on" }; + +static const char *line_in_function[] = { "off", "on" }; + +static const struct soc_enum sgtl5000_enum[] = { + SOC_ENUM_SINGLE_EXT(2, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), + SOC_ENUM_SINGLE_EXT(2, line_in_function), +}; + +static int sgtl5000_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = sgtl5000_jack_func; + return 0; +} + +static int sgtl5000_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + if (sgtl5000_jack_func == ucontrol->value.enumerated.item[0]) + return 0; + + sgtl5000_jack_func = ucontrol->value.enumerated.item[0]; + if (sgtl5000_jack_func) + snd_soc_dapm_enable_pin(codec, "Headphone Jack"); + else + snd_soc_dapm_disable_pin(codec, "Headphone Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int sgtl5000_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = sgtl5000_spk_func; + return 0; +} + +static int sgtl5000_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + if (sgtl5000_spk_func == ucontrol->value.enumerated.item[0]) + return 0; + + sgtl5000_spk_func = ucontrol->value.enumerated.item[0]; + if (sgtl5000_spk_func) + snd_soc_dapm_enable_pin(codec, "Ext Spk"); + else + snd_soc_dapm_disable_pin(codec, "Ext Spk"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int sgtl5000_get_line_in(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = sgtl5000_line_in_func; + return 0; +} + +static int sgtl5000_set_line_in(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + if (sgtl5000_line_in_func == ucontrol->value.enumerated.item[0]) + return 0; + + sgtl5000_line_in_func = ucontrol->value.enumerated.item[0]; + if (sgtl5000_line_in_func) + snd_soc_dapm_enable_pin(codec, "Line In Jack"); + else + snd_soc_dapm_disable_pin(codec, "Line In Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int spk_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct imx_3stack_priv *priv = &card_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + + if (plat->amp_enable == NULL) + return 0; + + if (SND_SOC_DAPM_EVENT_ON(event)) + plat->amp_enable(1); + else + plat->amp_enable(0); + + return 0; +} + +/* imx_3stack card dapm widgets */ +static const struct snd_soc_dapm_widget imx_3stack_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Mic Jack", NULL), + SND_SOC_DAPM_LINE("Line In Jack", NULL), + SND_SOC_DAPM_SPK("Ext Spk", spk_amp_event), + SND_SOC_DAPM_HP("Headphone Jack", NULL), +}; + +static const struct snd_kcontrol_new sgtl5000_machine_controls[] = { + SOC_ENUM_EXT("Jack Function", sgtl5000_enum[0], sgtl5000_get_jack, + sgtl5000_set_jack), + SOC_ENUM_EXT("Speaker Function", sgtl5000_enum[1], sgtl5000_get_spk, + sgtl5000_set_spk), + SOC_ENUM_EXT("Line In Function", sgtl5000_enum[1], sgtl5000_get_line_in, + sgtl5000_set_line_in), +}; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +static int asrc_func; + +static const char *asrc_function[] = + { "disable", "32KHz", "44.1KHz", "48KHz", "96KHz" }; + +static const struct soc_enum asrc_enum[] = { + SOC_ENUM_SINGLE_EXT(5, asrc_function), +}; + +static int asrc_get_rate(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = asrc_func; + return 0; +} + +static int asrc_set_rate(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + if (asrc_func == ucontrol->value.enumerated.item[0]) + return 0; + + asrc_func = ucontrol->value.enumerated.item[0]; + asrc_ssi_data.output_sample_rate = sgtl5000_rates[asrc_func]; + + return 1; +} + +static const struct snd_kcontrol_new asrc_controls[] = { + SOC_ENUM_EXT("ASRC", asrc_enum[0], asrc_get_rate, + asrc_set_rate), +}; +#endif + +static int imx_3stack_sgtl5000_init(struct snd_soc_codec *codec) +{ + int i, ret; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + for (i = 0; i < ARRAY_SIZE(asrc_controls); i++) { + ret = snd_ctl_add(codec->card, + snd_soc_cnew(&asrc_controls[i], codec, NULL)); + if (ret < 0) + return ret; + } + asrc_ssi_data.output_sample_rate = sgtl5000_rates[asrc_func]; +#endif + + /* Add imx_3stack specific controls */ + for (i = 0; i < ARRAY_SIZE(sgtl5000_machine_controls); i++) { + ret = snd_ctl_add(codec->card, + snd_soc_cnew(&sgtl5000_machine_controls[i], + codec, NULL)); + if (ret < 0) + return ret; + } + + /* Add imx_3stack specific widgets */ + snd_soc_dapm_new_controls(codec, imx_3stack_dapm_widgets, + ARRAY_SIZE(imx_3stack_dapm_widgets)); + + /* Set up imx_3stack specific audio path audio_map */ + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_disable_pin(codec, "Line In Jack"); + + snd_soc_dapm_sync(codec); + + return 0; +} + +/* imx_3stack digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "SGTL5000", + .stream_name = "SGTL5000", + .codec_dai = &sgtl5000_dai, + .init = imx_3stack_sgtl5000_init, + .ops = &imx_3stack_ops, +}; + +static int imx_3stack_card_remove(struct platform_device *pdev) +{ + struct imx_3stack_priv *priv = &card_priv; + struct mxc_audio_platform_data *plat; + if (priv->pdev) { + plat = priv->pdev->dev.platform_data; + if (plat->finit) + plat->finit(); + } + + return 0; +} + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, + .remove = imx_3stack_card_remove, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_sgtl5000, +}; + +static int __devinit imx_3stack_sgtl5000_probe(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + struct imx_3stack_priv *priv = &card_priv; + struct snd_soc_dai *sgtl5000_cpu_dai; + int ret = 0; + + priv->sysclk = plat->sysclk; + priv->pdev = pdev; + + gpio_activate_audio_ports(); + imx_3stack_init_dam(plat->src_port, plat->ext_port); + + if (plat->src_port == 2) + sgtl5000_cpu_dai = &imx_ssi_dai[2]; + else + sgtl5000_cpu_dai = &imx_ssi_dai[0]; + + imx_3stack_dai.cpu_dai = sgtl5000_cpu_dai; + + ret = driver_create_file(pdev->dev.driver, &driver_attr_headphone); + if (ret < 0) { + pr_err("%s:failed to create driver_attr_headphone\n", __func__); + goto sysfs_err; + } + + ret = -EINVAL; + if (plat->init && plat->init()) + goto err_plat_init; + + /* The SGTL5000 has an internal reset that is deasserted 8 SYS_MCLK + cycles after all power rails have been brought up. After this time + communication can start */ + + if (plat->hp_status()) + ret = request_irq(plat->hp_irq, + imx_headphone_detect_handler, + IRQ_TYPE_EDGE_FALLING, pdev->name, priv); + else + ret = request_irq(plat->hp_irq, + imx_headphone_detect_handler, + IRQ_TYPE_EDGE_RISING, pdev->name, priv); + if (ret < 0) { + pr_err("%s: request irq failed\n", __func__); + goto err_card_reg; + } + + sgtl5000_jack_func = 1; + sgtl5000_spk_func = 1; + sgtl5000_line_in_func = 0; + + return 0; + +err_card_reg: + if (plat->finit) + plat->finit(); +err_plat_init: + driver_remove_file(pdev->dev.driver, &driver_attr_headphone); +sysfs_err: + return ret; +} + +static int imx_3stack_sgtl5000_remove(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + struct imx_3stack_priv *priv = &card_priv; + + free_irq(plat->hp_irq, priv); + + if (plat->finit) + plat->finit(); + + driver_remove_file(pdev->dev.driver, &driver_attr_headphone); + + return 0; +} + +static struct platform_driver imx_3stack_sgtl5000_audio_driver = { + .probe = imx_3stack_sgtl5000_probe, + .remove = imx_3stack_sgtl5000_remove, + .driver = { + .name = "imx-3stack-sgtl5000", + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_sgtl5000_audio_driver); + if (ret) + return -ENOMEM; + + imx_3stack_snd_device = platform_device_alloc("soc-audio", 2); + if (!imx_3stack_snd_device) + return -ENOMEM; + + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + + if (ret) + platform_device_put(imx_3stack_snd_device); + + return ret; +} + +static void __exit imx_3stack_exit(void) +{ + platform_driver_unregister(&imx_3stack_sgtl5000_audio_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_init); +module_exit(imx_3stack_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("SGTL5000 Driver for i.MX 3STACK"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-ak5702.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-ak5702.c @@ -0,0 +1,227 @@ +/* + * imx-3stack-ak5702.c -- SoC audio for imx_3stack + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "imx-pcm.h" +#include "imx-esai.h" +#include "../codecs/ak5702.h" + +struct imx_3stack_pcm_state { + int lr_clk_active; +}; + +static struct imx_3stack_pcm_state clk_state; + +static int imx_3stack_startup(struct snd_pcm_substream *substream) +{ + clk_state.lr_clk_active++; + return 0; +} + +static void imx_3stack_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + + /* disable the PLL if there are no active Rx channels */ + if (!codec_dai->active) + snd_soc_dai_set_pll(codec_dai, 0, 0, 0); + clk_state.lr_clk_active--; +} + +static int imx_3stack_surround_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + unsigned int rate = params_rate(params); + struct imx_esai *esai_mode = (struct imx_esai *)cpu_dai->private_data; + u32 dai_format; + + if (clk_state.lr_clk_active > 1) + return 0; + + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; + + esai_mode->sync_mode = 0; + esai_mode->network_mode = 1; + + /* set codec DAI configuration */ + snd_soc_dai_set_fmt(codec_dai, dai_format); + + /* set cpu DAI configuration */ + snd_soc_dai_set_fmt(cpu_dai, dai_format); + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, 0xffffffff, 2); + + /* set the ESAI system clock as input */ + snd_soc_dai_set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_IN); + + /* set codec BCLK division */ + snd_soc_dai_set_clkdiv(codec_dai, AK5702_BCLK_CLKDIV, + AK5702_BCLK_DIV_32); + + snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_OUT); + + snd_soc_dai_set_pll(codec_dai, 1, 12000000, 0); + return 0; +} + +/* + * imx_3stack ak5702 DAI opserations. + */ +static struct snd_soc_ops imx_3stack_surround_ops = { + .startup = imx_3stack_startup, + .shutdown = imx_3stack_shutdown, + .hw_params = imx_3stack_surround_hw_params, +}; + +/* imx_3stack card dapm widgets */ +static const struct snd_soc_dapm_widget imx_3stack_dapm_widgets[] = { + SND_SOC_DAPM_LINE("Line In Jack", NULL), +}; + +/* example card audio map */ +static const struct snd_soc_dapm_route audio_map[] = { + /* Line in jack */ + {"ADCA Left Input", NULL, "Line In Jack"}, + {"ADCA Right Input", NULL, "Line In Jack"}, + {"ADCB Left Input", NULL, "Line In Jack"}, + {"ADCB Right Input", NULL, "Line In Jack"}, +}; + +static int imx_3stack_ak5702_init(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, imx_3stack_dapm_widgets, + ARRAY_SIZE(imx_3stack_dapm_widgets)); + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + snd_soc_dapm_sync(codec); + return 0; +} + +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "ak5702", + .stream_name = "ak5702", + .codec_dai = &ak5702_dai, + .init = imx_3stack_ak5702_init, + .ops = &imx_3stack_surround_ops, +}; + +static int imx_3stack_card_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + + kfree(socdev->codec_data); + return 0; +} + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, + .remove = imx_3stack_card_remove, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_ak5702, +}; + +static int __devinit imx_3stack_ak5702_probe(struct platform_device *pdev) +{ + struct ak5702_setup_data *setup; + + imx_3stack_dai.cpu_dai = &imx_esai_dai[2]; + + setup = kzalloc(sizeof(struct ak5702_setup_data), GFP_KERNEL); + setup->i2c_bus = 1; + setup->i2c_address = 0x13; + imx_3stack_snd_devdata.codec_data = setup; + + gpio_activate_esai_ports(); + return 0; +} + +static int imx_3stack_ak5702_remove(struct platform_device *pdev) +{ + gpio_deactivate_esai_ports(); + return 0; +} + +static struct platform_driver imx_3stack_ak5702_driver = { + .probe = imx_3stack_ak5702_probe, + .remove = imx_3stack_ak5702_remove, + .driver = { + .name = "imx-3stack-ak5702", + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_asoc_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_ak5702_driver); + if (ret) + return -ENOMEM; + + imx_3stack_snd_device = platform_device_alloc("soc-audio", -1); + if (!imx_3stack_snd_device) + return -ENOMEM; + + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + if (ret) + platform_device_put(imx_3stack_snd_device); + + return ret; +} + +static void __exit imx_3stack_asoc_exit(void) +{ + platform_driver_unregister(&imx_3stack_ak5702_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_asoc_init); +module_exit(imx_3stack_asoc_exit); + +/* Module information */ +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("ALSA SoC ak5702 imx_3stack"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-ssi.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-ssi.c @@ -0,0 +1,845 @@ +/* + * imx-ssi.c -- SSI driver for Freescale IMX + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Based on mxc-alsa-mc13783 (C) 2006-2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 29th Aug 2006 Initial version. + * + * TODO: + * Need to rework SSI register defs when new defs go into mainline. + * Add support for TDM and FIFO 1. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-ssi.h" +#include "imx-pcm.h" + +static struct imx_ssi imx_ssi_data[4]; + +/* debug */ +#define IMX_SSI_DEBUG 0 +#if IMX_SSI_DEBUG +#define dbg(format, arg...) printk(format, ## arg) +#else +#define dbg(format, arg...) +#endif + +#define IMX_SSI_DUMP 0 +#if IMX_SSI_DUMP +#define SSI_DUMP() \ + do { \ + printk(KERN_INFO "dump @ %s\n", __func__); \ + printk(KERN_INFO "scr %x\t, %x\n", \ + __raw_readl(SSI1_SCR), __raw_readl(SSI2_SCR)); \ + printk(KERN_INFO "sisr %x\t, %x\n", \ + __raw_readl(SSI1_SISR), __raw_readl(SSI2_SISR)); \ + printk(KERN_INFO "stcr %x\t, %x\n", \ + __raw_readl(SSI1_STCR), __raw_readl(SSI2_STCR)); \ + printk(KERN_INFO "srcr %x\t, %x\n", \ + __raw_readl(SSI1_SRCR), __raw_readl(SSI2_SRCR)); \ + printk(KERN_INFO "stccr %x\t, %x\n", \ + __raw_readl(SSI1_STCCR), __raw_readl(SSI2_STCCR)); \ + printk(KERN_INFO "srccr %x\t, %x\n", \ + __raw_readl(SSI1_SRCCR), __raw_readl(SSI2_SRCCR)); \ + printk(KERN_INFO "sfcsr %x\t, %x\n", \ + __raw_readl(SSI1_SFCSR), __raw_readl(SSI2_SFCSR)); \ + printk(KERN_INFO "stmsk %x\t, %x\n", \ + __raw_readl(SSI1_STMSK), __raw_readl(SSI2_STMSK)); \ + printk(KERN_INFO "srmsk %x\t, %x\n", \ + __raw_readl(SSI1_SRMSK), __raw_readl(SSI2_SRMSK)); \ + printk(KERN_INFO "sier %x\t, %x\n", \ + __raw_readl(SSI1_SIER), __raw_readl(SSI2_SIER)); \ + } while (0); +#else +#define SSI_DUMP() +#endif + +#define SSI1_PORT 0 +#define SSI2_PORT 1 + +static int ssi_active[2] = { 0, 0 }; + +/* + * SSI system clock configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + scr = __raw_readl(SSI1_SCR); + else + scr = __raw_readl(SSI2_SCR); + + if (scr & SSI_SCR_SSIEN) + return 0; + + switch (clk_id) { + case IMX_SSP_SYS_CLK: + if (dir == SND_SOC_CLOCK_OUT) + scr |= SSI_SCR_SYS_CLK_EN; + else + scr &= ~SSI_SCR_SYS_CLK_EN; + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + __raw_writel(scr, SSI1_SCR); + else + __raw_writel(scr, SSI2_SCR); + + return 0; +} + +/* + * SSI Clock dividers + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + u32 stccr, srccr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + if (__raw_readl(SSI1_SCR) & SSI_SCR_SSIEN) + return 0; + + srccr = __raw_readl(SSI1_SRCCR); + stccr = __raw_readl(SSI1_STCCR); + } else { + if (__raw_readl(SSI2_SCR) & SSI_SCR_SSIEN) + return 0; + + srccr = __raw_readl(SSI2_SRCCR); + stccr = __raw_readl(SSI2_STCCR); + } + + switch (div_id) { + case IMX_SSI_TX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_TX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + case IMX_SSI_RX_DIV_2: + stccr &= ~SSI_STCCR_DIV2; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PSR: + stccr &= ~SSI_STCCR_PSR; + stccr |= div; + break; + case IMX_SSI_RX_DIV_PM: + stccr &= ~0xff; + stccr |= SSI_STCCR_PM(div); + break; + default: + return -EINVAL; + } + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(stccr, SSI1_STCCR); + __raw_writel(srccr, SSI1_SRCCR); + } else { + __raw_writel(stccr, SSI2_STCCR); + __raw_writel(srccr, SSI2_SRCCR); + } + return 0; +} + +/* + * SSI Network Mode or TDM slots configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + */ +static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, + unsigned int mask, int slots) +{ + u32 stmsk, srmsk, stccr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + if (__raw_readl(SSI1_SCR) & SSI_SCR_SSIEN) + return 0; + stccr = __raw_readl(SSI1_STCCR); + } else { + if (__raw_readl(SSI2_SCR) & SSI_SCR_SSIEN) + return 0; + stccr = __raw_readl(SSI2_STCCR); + } + + stmsk = srmsk = mask; + stccr &= ~SSI_STCCR_DC_MASK; + stccr |= SSI_STCCR_DC(slots - 1); + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(stmsk, SSI1_STMSK); + __raw_writel(srmsk, SSI1_SRMSK); + __raw_writel(stccr, SSI1_STCCR); + __raw_writel(stccr, SSI1_SRCCR); + } else { + __raw_writel(stmsk, SSI2_STMSK); + __raw_writel(srmsk, SSI2_SRMSK); + __raw_writel(stccr, SSI2_STCCR); + __raw_writel(stccr, SSI2_SRCCR); + } + + return 0; +} + +/* + * SSI DAI format configuration. + * Should only be called when port is inactive (i.e. SSIEN = 0). + * Note: We don't use the I2S modes but instead manually configure the + * SSI for I2S. + */ +static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) +{ + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + u32 stcr = 0, srcr = 0, scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + scr = __raw_readl(SSI1_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET); + else + scr = __raw_readl(SSI2_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET); + + if (scr & SSI_SCR_SSIEN) + return 0; + + /* DAI mode */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* data on rising edge of bclk, frame low 1clk before data */ + stcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_REFS | SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_LEFT_J: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TXBIT0; + srcr |= SSI_SRCR_RXBIT0; + break; + case SND_SOC_DAIFMT_DSP_B: + /* data on rising edge of bclk, frame high with data */ + stcr |= SSI_STCR_TFSL; + srcr |= SSI_SRCR_RFSL; + break; + case SND_SOC_DAIFMT_DSP_A: + /* data on rising edge of bclk, frame high 1clk before data */ + stcr |= SSI_STCR_TFSL | SSI_STCR_TEFS; + srcr |= SSI_SRCR_RFSL | SSI_SRCR_REFS; + break; + } + + /* DAI clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + stcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI); + srcr &= ~(SSI_SRCR_RSCKP | SSI_SRCR_RFSI); + break; + case SND_SOC_DAIFMT_IB_NF: + stcr |= SSI_STCR_TFSI; + stcr &= ~SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI; + srcr &= ~SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_NB_IF: + stcr &= ~SSI_STCR_TFSI; + stcr |= SSI_STCR_TSCKP; + srcr &= ~SSI_SRCR_RFSI; + srcr |= SSI_SRCR_RSCKP; + break; + case SND_SOC_DAIFMT_NB_NF: + stcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP; + srcr |= SSI_SRCR_RFSI | SSI_SRCR_RSCKP; + break; + } + + /* DAI clock master masks */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + stcr |= SSI_STCR_TFDIR | SSI_STCR_TXDIR; + if (((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S) + && ssi_mode->network_mode) { + scr &= ~SSI_SCR_I2S_MODE_MASK; + scr |= SSI_SCR_I2S_MODE_MSTR; + } + break; + case SND_SOC_DAIFMT_CBM_CFS: + stcr |= SSI_STCR_TFDIR; + srcr |= SSI_SRCR_RFDIR; + break; + case SND_SOC_DAIFMT_CBS_CFM: + stcr |= SSI_STCR_TXDIR; + srcr |= SSI_SRCR_RXDIR; + break; + case SND_SOC_DAIFMT_CBM_CFM: + if (((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S) + && ssi_mode->network_mode) { + scr &= ~SSI_SCR_I2S_MODE_MASK; + scr |= SSI_SCR_I2S_MODE_SLAVE; + } + break; + } + + /* sync */ + if (ssi_mode->sync_mode) + scr |= SSI_SCR_SYN; + + /* tdm - only for stereo atm */ + if (ssi_mode->network_mode) + scr |= SSI_SCR_NET; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(stcr, SSI1_STCR); + __raw_writel(srcr, SSI1_SRCR); + __raw_writel(scr, SSI1_SCR); + } else { + __raw_writel(stcr, SSI2_STCR); + __raw_writel(srcr, SSI2_SRCR); + __raw_writel(scr, SSI2_SCR); + } + SSI_DUMP(); + return 0; +} + +static struct clk *ssi1_clk; +static struct clk *ssi2_clk; + +static int imx_ssi_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + /* we cant really change any SSI values after SSI is enabled + * need to fix in software for max flexibility - lrg */ + if (cpu_dai->playback.active || cpu_dai->capture.active) + return 0; + + /* reset the SSI port - Sect 45.4.4 */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + + if (ssi_active[SSI1_PORT]++) + return 0; + + __raw_writel(0, SSI1_SCR); + ssi1_clk = clk_get(NULL, "ssi_clk.0"); + clk_enable(ssi1_clk); + + /* BIG FAT WARNING + * SDMA FIFO watermark must == SSI FIFO watermark for + * best results. + */ + __raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)), + SSI1_SFCSR); + __raw_writel(0, SSI1_SIER); + } else { + + if (ssi_active[SSI2_PORT]++) + return 0; + + __raw_writel(0, SSI2_SCR); + ssi2_clk = clk_get(NULL, "ssi_clk.1"); + clk_enable(ssi2_clk); + /* above warning applies here too */ + __raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)), + SSI2_SFCSR); + __raw_writel(0, SSI2_SIER); + } + + SSI_DUMP(); + return 0; +} + +static int imx_ssi_hw_tx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + u32 stccr, stcr, sier; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + stccr = __raw_readl(SSI1_STCCR) & ~SSI_STCCR_WL_MASK; + stcr = __raw_readl(SSI1_STCR); + sier = __raw_readl(SSI1_SIER); + } else { + stccr = __raw_readl(SSI2_STCCR) & ~SSI_STCCR_WL_MASK; + stcr = __raw_readl(SSI2_STCR); + sier = __raw_readl(SSI2_SIER); + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + stccr |= SSI_STCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + stccr |= SSI_STCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + stccr |= SSI_STCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + stcr |= SSI_STCR_TFEN0; + else + stcr |= SSI_STCR_TFEN1; + sier |= SSI_SIER_TDMAE | SSI_SIER_TIE | SSI_SIER_TUE0_EN; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(stcr, SSI1_STCR); + __raw_writel(stccr, SSI1_STCCR); + __raw_writel(sier, SSI1_SIER); + } else { + __raw_writel(stcr, SSI2_STCR); + __raw_writel(stccr, SSI2_STCCR); + __raw_writel(sier, SSI2_SIER); + } + + return 0; +} + +static int imx_ssi_hw_rx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + u32 srccr, srcr, sier; + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + bool sync_mode = ssi_mode->sync_mode; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + srccr = + sync_mode ? __raw_readl(SSI1_STCCR) : + __raw_readl(SSI1_SRCCR); + srcr = __raw_readl(SSI1_SRCR); + sier = __raw_readl(SSI1_SIER); + } else { + srccr = + sync_mode ? __raw_readl(SSI2_STCCR) : + __raw_readl(SSI2_SRCCR); + srcr = __raw_readl(SSI2_SRCR); + sier = __raw_readl(SSI2_SIER); + } + srccr &= ~SSI_SRCCR_WL_MASK; + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + srccr |= SSI_SRCCR_WL(16); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + srccr |= SSI_SRCCR_WL(20); + break; + case SNDRV_PCM_FORMAT_S24_LE: + srccr |= SSI_SRCCR_WL(24); + break; + } + + /* enable interrupts */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI2) + srcr |= SSI_SRCR_RFEN0; + else + srcr |= SSI_SRCR_RFEN1; + sier |= SSI_SIER_RDMAE | SSI_SIER_RIE | SSI_SIER_ROE0_EN; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(srcr, SSI1_SRCR); + if (sync_mode) + __raw_writel(srccr, SSI1_STCCR); + else + __raw_writel(srccr, SSI1_SRCCR); + __raw_writel(sier, SSI1_SIER); + } else { + __raw_writel(srcr, SSI2_SRCR); + if (sync_mode) + __raw_writel(srccr, SSI2_STCCR); + else + __raw_writel(srccr, SSI2_SRCCR); + __raw_writel(sier, SSI2_SIER); + } + return 0; +} + +/* + * Should only be called when port is inactive (i.e. SSIEN = 0), + * although can be called multiple times by upper layers. + */ +static int imx_ssi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + int id; + + id = cpu_dai->id; + + /* Tx/Rx config */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* cant change any parameters when SSI is running */ + if (id == IMX_DAI_SSI0 || id == IMX_DAI_SSI1) { + if ((__raw_readl(SSI1_SCR) & SSI_SCR_SSIEN) && + (__raw_readl(SSI1_SCR) & SSI_SCR_TE)) + return 0; + } else { + if ((__raw_readl(SSI2_SCR) & SSI_SCR_SSIEN) && + (__raw_readl(SSI2_SCR) & SSI_SCR_TE)) + return 0; + } + return imx_ssi_hw_tx_params(substream, params, cpu_dai); + } else { + /* cant change any parameters when SSI is running */ + if (id == IMX_DAI_SSI0 || id == IMX_DAI_SSI1) { + if ((__raw_readl(SSI1_SCR) & SSI_SCR_SSIEN) && + (__raw_readl(SSI1_SCR) & SSI_SCR_RE)) + return 0; + } else { + if ((__raw_readl(SSI2_SCR) & SSI_SCR_SSIEN) && + (__raw_readl(SSI2_SCR) & SSI_SCR_RE)) + return 0; + } + return imx_ssi_hw_rx_params(substream, params, cpu_dai); + } +} + +static int imx_ssi_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + u32 scr; + + /* enable the SSI port, note that no other port config + * should happen after SSIEN is set */ + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + scr = __raw_readl(SSI1_SCR); + __raw_writel((scr | SSI_SCR_SSIEN), SSI1_SCR); + } else { + scr = __raw_readl(SSI2_SCR); + __raw_writel((scr | SSI_SCR_SSIEN), SSI2_SCR); + } + SSI_DUMP(); + return 0; +} + +static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *cpu_dai) +{ + u32 scr; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + scr = __raw_readl(SSI1_SCR); + else + scr = __raw_readl(SSI2_SCR); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (scr & SSI_SCR_RE) { + if (cpu_dai->id == IMX_DAI_SSI0 + || cpu_dai->id == IMX_DAI_SSI1) + __raw_writel(0, SSI1_SCR); + else + __raw_writel(0, SSI2_SCR); + } + scr |= SSI_SCR_TE; + } else + scr |= SSI_SCR_RE; + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + scr &= ~SSI_SCR_TE; + else + scr &= ~SSI_SCR_RE; + break; + default: + return -EINVAL; + } + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + __raw_writel(scr, SSI1_SCR); + else + __raw_writel(scr, SSI2_SCR); + + SSI_DUMP(); + return 0; +} + +static void imx_ssi_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + int id; + + id = cpu_dai->id; + + /* shutdown SSI if neither Tx or Rx is active */ + if (cpu_dai->playback.active || cpu_dai->capture.active) + return; + + if (id == IMX_DAI_SSI0 || id == IMX_DAI_SSI1) { + + if (--ssi_active[SSI1_PORT] > 1) + return; + + __raw_writel(0, SSI1_SCR); + + clk_disable(ssi1_clk); + clk_put(ssi1_clk); + + } else { + if (--ssi_active[SSI2_PORT]) + return; + __raw_writel(0, SSI2_SCR); + clk_disable(ssi2_clk); + clk_put(ssi2_clk); + } +} + +#ifdef CONFIG_PM +static int imx_ssi_suspend(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /* do we need to disable any clocks? */ + + return 0; +} + +static int imx_ssi_resume(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /* do we need to enable any clocks? */ + + return 0; +} +#else +#define imx_ssi_suspend NULL +#define imx_ssi_resume NULL +#endif + +static int fifo_err_counter; + +static irqreturn_t ssi1_irq(int irq, void *dev_id) +{ + if (fifo_err_counter++ % 1000 == 0) + printk(KERN_ERR "ssi1_irq SISR %x SIER %x fifo_errs=%d\n", + __raw_readl(SSI1_SISR), __raw_readl(SSI1_SIER), + fifo_err_counter); + __raw_writel((SSI_SIER_TUE0_EN | SSI_SIER_ROE0_EN), SSI1_SISR); + return IRQ_HANDLED; +} + +static irqreturn_t ssi2_irq(int irq, void *dev_id) +{ + if (fifo_err_counter++ % 1000 == 0) + printk(KERN_ERR "ssi2_irq SISR %x SIER %x fifo_errs=%d\n", + __raw_readl(SSI2_SISR), __raw_readl(SSI2_SIER), + fifo_err_counter); + __raw_writel((SSI_SIER_TUE0_EN | SSI_SIER_ROE0_EN), SSI2_SISR); + return IRQ_HANDLED; +} + +static int imx_ssi_probe(struct platform_device *pdev, struct snd_soc_dai *dai) +{ + if ((!strcmp(dai->name, "imx-ssi-1-0")) || + (!strcmp(dai->name, "imx-ssi-1-1"))) + if (request_irq(MXC_INT_SSI1, ssi1_irq, 0, "ssi1", dai)) { + printk(KERN_ERR "%s: failure requesting irq %s\n", + __func__, "ssi1"); + return -EBUSY; + } + + if ((!strcmp(dai->name, "imx-ssi-2-0")) || + (!strcmp(dai->name, "imx-ssi-2-1"))) + if (request_irq(MXC_INT_SSI2, ssi2_irq, 0, "ssi2", dai)) { + printk(KERN_ERR "%s: failure requesting irq %s\n", + __func__, "ssi2"); + return -EBUSY; + } + + return 0; +} + +static void imx_ssi_remove(struct platform_device *pdev, + struct snd_soc_dai *dai) +{ + if ((!strcmp(dai->name, "imx-ssi-1-0")) || + (!strcmp(dai->name, "imx-ssi-1-1"))) + free_irq(MXC_INT_SSI1, dai); + + if ((!strcmp(dai->name, "imx-ssi-2-0")) || + (!strcmp(dai->name, "imx-ssi-2-1"))) + free_irq(MXC_INT_SSI2, dai); +} + +#define IMX_SSI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_96000) + +#define IMX_SSI_FORMATS \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE) + +static struct snd_soc_dai_ops imx_ssi_dai_ops = { + .startup = imx_ssi_startup, + .shutdown = imx_ssi_shutdown, + .trigger = imx_ssi_trigger, + .prepare = imx_ssi_prepare, + .hw_params = imx_ssi_hw_params, + .set_sysclk = imx_ssi_set_dai_sysclk, + .set_clkdiv = imx_ssi_set_dai_clkdiv, + .set_fmt = imx_ssi_set_dai_fmt, + .set_tdm_slot = imx_ssi_set_dai_tdm_slot, +}; + +struct snd_soc_dai imx_ssi_dai[] = { + { + .name = "imx-ssi-1-0", + .id = IMX_DAI_SSI0, + .probe = imx_ssi_probe, + .suspend = imx_ssi_suspend, + .remove = imx_ssi_remove, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .ops = &imx_ssi_dai_ops, + .private_data = &imx_ssi_data[IMX_DAI_SSI0], + }, + { + .name = "imx-ssi-1-1", + .id = IMX_DAI_SSI1, + .probe = imx_ssi_probe, + .suspend = imx_ssi_suspend, + .remove = imx_ssi_remove, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .ops = &imx_ssi_dai_ops, + .private_data = &imx_ssi_data[IMX_DAI_SSI1], + }, + { + .name = "imx-ssi-2-0", + .id = IMX_DAI_SSI2, + .probe = imx_ssi_probe, + .suspend = imx_ssi_suspend, + .remove = imx_ssi_remove, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .ops = &imx_ssi_dai_ops, + .private_data = &imx_ssi_data[IMX_DAI_SSI2], + }, + { + .name = "imx-ssi-2-1", + .id = IMX_DAI_SSI3, + .probe = imx_ssi_probe, + .suspend = imx_ssi_suspend, + .remove = imx_ssi_remove, + .resume = imx_ssi_resume, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = IMX_SSI_RATES, + .formats = IMX_SSI_FORMATS, + }, + .ops = &imx_ssi_dai_ops, + .private_data = &imx_ssi_data[IMX_DAI_SSI3], + }, +}; + +EXPORT_SYMBOL_GPL(imx_ssi_dai); + +static int __init imx_ssi_init(void) +{ + return snd_soc_register_dais(imx_ssi_dai, ARRAY_SIZE(imx_ssi_dai)); +} + +static void __exit imx_ssi_exit(void) +{ + snd_soc_unregister_dais(imx_ssi_dai, ARRAY_SIZE(imx_ssi_dai)); +} + +module_init(imx_ssi_init); +module_exit(imx_ssi_exit); +MODULE_AUTHOR + ("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("i.MX ASoC I2S driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/Makefile +++ linux-fsl-imx51-2.6.31/sound/soc/imx/Makefile @@ -0,0 +1,24 @@ +# i.MX Platform Support +snd-soc-imx-objs := imx-pcm.o +snd-soc-imx-ssi-objs := imx-ssi.o +snd-soc-imx-esai-objs := imx-esai.o +snd-soc-imx-ac97-objs := imx-ac97.o + +obj-$(CONFIG_SND_MXC_SOC) += snd-soc-imx.o +obj-$(CONFIG_SND_MXC_SOC_SSI) += snd-soc-imx-ssi.o +obj-$(CONFIG_SND_MXC_SOC_ESAI) += snd-soc-imx-esai.o +obj-$(CONFIG_SND_MXC_SOC_AC97) += snd-soc-imx-ac97.o + +# i.MX Machine Support +snd-soc-imx-3stack-wm8350-objs := imx-3stack-wm8350.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_WM8350) += snd-soc-imx-3stack-wm8350.o +snd-soc-imx-3stack-sgtl5000-objs := imx-3stack-sgtl5000.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) += snd-soc-imx-3stack-sgtl5000.o +snd-soc-imx-3stack-ak4647-objs := imx-3stack-ak4647.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_AK4647) += snd-soc-imx-3stack-ak4647.o +snd-soc-imx-3stack-wm8580-objs := imx-3stack-wm8580.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_WM8580) += snd-soc-imx-3stack-wm8580.o +snd-soc-imx-3stack-ak5702-objs := imx-3stack-ak5702.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_AK5702) += snd-soc-imx-3stack-ak5702.o +snd-soc-imx-3stack-bt-objs := imx-3stack-bt.o +obj-$(CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH) += snd-soc-imx-3stack-bt.o --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-esai.h +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-esai.h @@ -0,0 +1,30 @@ +/* + * imx-esai.h -- ESAI driver header file for Freescale IMX + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef _MXC_ESAI_H +#define _MXC_ESAI_H + +#define IMX_DAI_ESAI_TX 0x04 +#define IMX_DAI_ESAI_RX 0x08 +#define IMX_DAI_ESAI_TXRX (IMX_DAI_ESAI_TX | IMX_DAI_ESAI_RX) + +struct imx_esai { + bool network_mode; + bool sync_mode; +}; + +extern struct snd_soc_dai imx_esai_dai[]; + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-esai.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-esai.c @@ -0,0 +1,950 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file imx-esai.c + * @brief this file implements the esai interface + * in according to ASoC architeture + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-esai.h" +#include "imx-pcm.h" + +/*#define IMX_ESAI_DUMP 1*/ + +#ifdef IMX_ESAI_DUMP +#define ESAI_DUMP() \ + do {pr_info("dump @ %s\n", __func__); \ + pr_info("ecr %x\n", __raw_readl(ESAI_ECR)); \ + pr_info("esr %x\n", __raw_readl(ESAI_ESR)); \ + pr_info("tfcr %x\n", __raw_readl(ESAI_TFCR)); \ + pr_info("tfsr %x\n", __raw_readl(ESAI_TFSR)); \ + pr_info("rfcr %x\n", __raw_readl(ESAI_RFCR)); \ + pr_info("rfsr %x\n", __raw_readl(ESAI_RFSR)); \ + pr_info("tsr %x\n", __raw_readl(ESAI_TSR)); \ + pr_info("saisr %x\n", __raw_readl(ESAI_SAISR)); \ + pr_info("saicr %x\n", __raw_readl(ESAI_SAICR)); \ + pr_info("tcr %x\n", __raw_readl(ESAI_TCR)); \ + pr_info("tccr %x\n", __raw_readl(ESAI_TCCR)); \ + pr_info("rcr %x\n", __raw_readl(ESAI_RCR)); \ + pr_info("rccr %x\n", __raw_readl(ESAI_RCCR)); \ + pr_info("tsma %x\n", __raw_readl(ESAI_TSMA)); \ + pr_info("tsmb %x\n", __raw_readl(ESAI_TSMB)); \ + pr_info("rsma %x\n", __raw_readl(ESAI_RSMA)); \ + pr_info("rsmb %x\n", __raw_readl(ESAI_RSMB)); \ + pr_info("prrc %x\n", __raw_readl(ESAI_PRRC)); \ + pr_info("pcrc %x\n", __raw_readl(ESAI_PCRC)); } while (0); +#else +#define ESAI_DUMP() +#endif + +#define ESAI_IO_BASE_ADDR IO_ADDRESS(ESAI_BASE_ADDR) + +#define ESAI_ETDR (ESAI_IO_BASE_ADDR + 0x00) +#define ESAI_ERDR (ESAI_IO_BASE_ADDR + 0x04) +#define ESAI_ECR (ESAI_IO_BASE_ADDR + 0x08) +#define ESAI_ESR (ESAI_IO_BASE_ADDR + 0x0C) +#define ESAI_TFCR (ESAI_IO_BASE_ADDR + 0x10) +#define ESAI_TFSR (ESAI_IO_BASE_ADDR + 0x14) +#define ESAI_RFCR (ESAI_IO_BASE_ADDR + 0x18) +#define ESAI_RFSR (ESAI_IO_BASE_ADDR + 0x1C) +#define ESAI_TX0 (ESAI_IO_BASE_ADDR + 0x80) +#define ESAI_TX1 (ESAI_IO_BASE_ADDR + 0x84) +#define ESAI_TX2 (ESAI_IO_BASE_ADDR + 0x88) +#define ESAI_TX3 (ESAI_IO_BASE_ADDR + 0x8C) +#define ESAI_TX4 (ESAI_IO_BASE_ADDR + 0x90) +#define ESAI_TX5 (ESAI_IO_BASE_ADDR + 0x94) +#define ESAI_TSR (ESAI_IO_BASE_ADDR + 0x98) +#define ESAI_RX0 (ESAI_IO_BASE_ADDR + 0xA0) +#define ESAI_RX1 (ESAI_IO_BASE_ADDR + 0xA4) +#define ESAI_RX2 (ESAI_IO_BASE_ADDR + 0xA8) +#define ESAI_RX3 (ESAI_IO_BASE_ADDR + 0xAC) +#define ESAI_SAISR (ESAI_IO_BASE_ADDR + 0xCC) +#define ESAI_SAICR (ESAI_IO_BASE_ADDR + 0xD0) +#define ESAI_TCR (ESAI_IO_BASE_ADDR + 0xD4) +#define ESAI_TCCR (ESAI_IO_BASE_ADDR + 0xD8) +#define ESAI_RCR (ESAI_IO_BASE_ADDR + 0xDC) +#define ESAI_RCCR (ESAI_IO_BASE_ADDR + 0xE0) +#define ESAI_TSMA (ESAI_IO_BASE_ADDR + 0xE4) +#define ESAI_TSMB (ESAI_IO_BASE_ADDR + 0xE8) +#define ESAI_RSMA (ESAI_IO_BASE_ADDR + 0xEC) +#define ESAI_RSMB (ESAI_IO_BASE_ADDR + 0xF0) +#define ESAI_PRRC (ESAI_IO_BASE_ADDR + 0xF8) +#define ESAI_PCRC (ESAI_IO_BASE_ADDR + 0xFC) + +#define ESAI_ECR_ETI (1 << 19) +#define ESAI_ECR_ETO (1 << 18) +#define ESAI_ECR_ERI (1 << 17) +#define ESAI_ECR_ERO (1 << 16) +#define ESAI_ECR_ERST (1 << 1) +#define ESAI_ECR_ESAIEN (1 << 0) + +#define ESAI_ESR_TINIT (1 << 10) +#define ESAI_ESR_RFF (1 << 9) +#define ESAI_ESR_TFE (1 << 8) +#define ESAI_ESR_TLS (1 << 7) +#define ESAI_ESR_TDE (1 << 6) +#define ESAI_ESR_TED (1 << 5) +#define ESAI_ESR_TD (1 << 4) +#define ESAI_ESR_RLS (1 << 3) +#define ESAI_ESR_RDE (1 << 2) +#define ESAI_ESR_RED (1 << 1) +#define ESAI_ESR_RD (1 << 0) + +#define ESAI_TFCR_TIEN (1 << 19) +#define ESAI_TFCR_TE5 (1 << 7) +#define ESAI_TFCR_TE4 (1 << 6) +#define ESAI_TFCR_TE3 (1 << 5) +#define ESAI_TFCR_TE2 (1 << 4) +#define ESAI_TFCR_TE1 (1 << 3) +#define ESAI_TFCR_TE0 (1 << 2) +#define ESAI_TFCR_TFR (1 << 1) +#define ESAI_TFCR_TFEN (1 << 0) +#define ESAI_TFCR_TE(x) ((0x3f >> (6 - ((x + 1) >> 1))) << 2) +#define ESAI_TFCR_TE_MASK 0xfff03 +#define ESAI_TFCR_TFWM(x) ((x - 1) << 8) +#define ESAI_TFCR_TWA_MASK 0xf8ffff + +#define ESAI_RFCR_REXT (1 << 19) +#define ESAI_RFCR_RE3 (1 << 5) +#define ESAI_RFCR_RE2 (1 << 4) +#define ESAI_RFCR_RE1 (1 << 3) +#define ESAI_RFCR_RE0 (1 << 2) +#define ESAI_RFCR_RFR (1 << 1) +#define ESAI_RFCR_RFEN (1 << 0) +#define ESAI_RFCR_RE(x) ((0xf >> (4 - ((x + 1) >> 1))) << 3) +#define ESAI_RFCR_RE_MASK 0xfffc3 +#define ESAI_RFCR_RFWM(x) ((x-1) << 8) +#define ESAI_RFCR_RWA_MASK 0xf8ffff + +#define ESAI_WORD_LEN_32 (0x00 << 16) +#define ESAI_WORD_LEN_28 (0x01 << 16) +#define ESAI_WORD_LEN_24 (0x02 << 16) +#define ESAI_WORD_LEN_20 (0x03 << 16) +#define ESAI_WORD_LEN_16 (0x04 << 16) +#define ESAI_WORD_LEN_12 (0x05 << 16) +#define ESAI_WORD_LEN_8 (0x06 << 16) +#define ESAI_WORD_LEN_4 (0x07 << 16) + +#define ESAI_SAISR_TODFE (1 << 17) +#define ESAI_SAISR_TEDE (1 << 16) +#define ESAI_SAISR_TDE (1 << 15) +#define ESAI_SAISR_TUE (1 << 14) +#define ESAI_SAISR_TFS (1 << 13) +#define ESAI_SAISR_RODF (1 << 10) +#define ESAI_SAISR_REDF (1 << 9) +#define ESAI_SAISR_RDF (1 << 8) +#define ESAI_SAISR_ROE (1 << 7) +#define ESAI_SAISR_RFS (1 << 6) +#define ESAI_SAISR_IF2 (1 << 2) +#define ESAI_SAISR_IF1 (1 << 1) +#define ESAI_SAISR_IF0 (1 << 0) + +#define ESAI_SAICR_ALC (1 << 8) +#define ESAI_SAICR_TEBE (1 << 7) +#define ESAI_SAICR_SYNC (1 << 6) +#define ESAI_SAICR_OF2 (1 << 2) +#define ESAI_SAICR_OF1 (1 << 1) +#define ESAI_SAICR_OF0 (1 << 0) + +#define ESAI_TCR_TLIE (1 << 23) +#define ESAI_TCR_TIE (1 << 22) +#define ESAI_TCR_TEDIE (1 << 21) +#define ESAI_TCR_TEIE (1 << 20) +#define ESAI_TCR_TPR (1 << 19) +#define ESAI_TCR_PADC (1 << 17) +#define ESAI_TCR_TFSR (1 << 16) +#define ESAI_TCR_TFSL (1 << 15) +#define ESAI_TCR_TWA (1 << 7) +#define ESAI_TCR_TSHFD_MSB (0 << 6) +#define ESAI_TCR_TSHFD_LSB (1 << 6) +#define ESAI_TCR_TE5 (1 << 5) +#define ESAI_TCR_TE4 (1 << 4) +#define ESAI_TCR_TE3 (1 << 3) +#define ESAI_TCR_TE2 (1 << 2) +#define ESAI_TCR_TE1 (1 << 1) +#define ESAI_TCR_TE0 (1 << 0) +#define ESAI_TCR_TE(x) (0x3f >> (6 - ((x + 1) >> 1))) + +#define ESAI_TCR_TSWS_MASK 0xff83ff +#define ESAI_TCR_TSWS_STL8_WDL8 (0x00 << 10) +#define ESAI_TCR_TSWS_STL12_WDL8 (0x04 << 10) +#define ESAI_TCR_TSWS_STL12_WDL12 (0x01 << 10) +#define ESAI_TCR_TSWS_STL16_WDL8 (0x08 << 10) +#define ESAI_TCR_TSWS_STL16_WDL12 (0x05 << 10) +#define ESAI_TCR_TSWS_STL16_WDL16 (0x02 << 10) +#define ESAI_TCR_TSWS_STL20_WDL8 (0x0c << 10) +#define ESAI_TCR_TSWS_STL20_WDL12 (0x09 << 10) +#define ESAI_TCR_TSWS_STL20_WDL16 (0x06 << 10) +#define ESAI_TCR_TSWS_STL20_WDL20 (0x03 << 10) +#define ESAI_TCR_TSWS_STL24_WDL8 (0x10 << 10) +#define ESAI_TCR_TSWS_STL24_WDL12 (0x0d << 10) +#define ESAI_TCR_TSWS_STL24_WDL16 (0x0a << 10) +#define ESAI_TCR_TSWS_STL24_WDL20 (0x07 << 10) +#define ESAI_TCR_TSWS_STL24_WDL24 (0x1e << 10) +#define ESAI_TCR_TSWS_STL32_WDL8 (0x18 << 10) +#define ESAI_TCR_TSWS_STL32_WDL12 (0x15 << 10) +#define ESAI_TCR_TSWS_STL32_WDL16 (0x12 << 10) +#define ESAI_TCR_TSWS_STL32_WDL20 (0x0f << 10) +#define ESAI_TCR_TSWS_STL32_WDL24 (0x1f << 10) + +#define ESAI_TCR_TMOD_MASK 0xfffcff +#define ESAI_TCR_TMOD_NORMAL (0x00 << 8) +#define ESAI_TCR_TMOD_ONDEMAND (0x01 << 8) +#define ESAI_TCR_TMOD_NETWORK (0x01 << 8) +#define ESAI_TCR_TMOD_RESERVED (0x02 << 8) +#define ESAI_TCR_TMOD_AC97 (0x03 << 8) + +#define ESAI_TCCR_THCKD (1 << 23) +#define ESAI_TCCR_TFSD (1 << 22) +#define ESAI_TCCR_TCKD (1 << 21) +#define ESAI_TCCR_THCKP (1 << 20) +#define ESAI_TCCR_TFSP (1 << 19) +#define ESAI_TCCR_TCKP (1 << 18) + +#define ESAI_TCCR_TPSR_MASK 0xfffeff +#define ESAI_TCCR_TPSR_BYPASS (1 << 8) +#define ESAI_TCCR_TPSR_DIV8 (0 << 8) + +#define ESAI_TCCR_TFP_MASK 0xfc3fff +#define ESAI_TCCR_TFP(x) ((x & 0xf) << 14) + +#define ESAI_TCCR_TDC_MASK 0xffc1ff +#define ESAI_TCCR_TDC(x) (((x) & 0x1f) << 9) + +#define ESAI_TCCR_TPM_MASK 0xffff00 +#define ESAI_TCCR_TPM(x) (x & 0xff) + +#define ESAI_RCR_RLIE (1 << 23) +#define ESAI_RCR_RIE (1 << 22) +#define ESAI_RCR_REDIE (1 << 21) +#define ESAI_RCR_REIE (1 << 20) +#define ESAI_RCR_RPR (1 << 19) +#define ESAI_RCR_RFSR (1 << 16) +#define ESAI_RCR_RFSL (1 << 15) +#define ESAI_RCR_RWA (1 << 7) +#define ESAI_RCR_RSHFD_MSB (0 << 6) +#define ESAI_RCR_RSHFD_LSB (1 << 6) +#define ESAI_RCR_RE3 (1 << 3) +#define ESAI_RCR_RE2 (1 << 2) +#define ESAI_RCR_RE1 (1 << 1) +#define ESAI_RCR_RE0 (1 << 0) +#define ESAI_RCR_RE(x) ((0xf >> (4 - ((x + 1) >> 1))) << 1) + +#define ESAI_RCR_RSWS_MASK 0xff83ff +#define ESAI_RCR_RSWS_STL8_WDL8 (0x00 << 10) +#define ESAI_RCR_RSWS_STL12_WDL8 (0x04 << 10) +#define ESAI_RCR_RSWS_STL12_WDL12 (0x01 << 10) +#define ESAI_RCR_RSWS_STL16_WDL8 (0x08 << 10) +#define ESAI_RCR_RSWS_STL16_WDL12 (0x05 << 10) +#define ESAI_RCR_RSWS_STL16_WDL16 (0x02 << 10) +#define ESAI_RCR_RSWS_STL20_WDL8 (0x0c << 10) +#define ESAI_RCR_RSWS_STL20_WDL12 (0x09 << 10) +#define ESAI_RCR_RSWS_STL20_WDL16 (0x06 << 10) +#define ESAI_RCR_RSWS_STL20_WDL20 (0x03 << 10) +#define ESAI_RCR_RSWS_STL24_WDL8 (0x10 << 10) +#define ESAI_RCR_RSWS_STL24_WDL12 (0x0d << 10) +#define ESAI_RCR_RSWS_STL24_WDL16 (0x0a << 10) +#define ESAI_RCR_RSWS_STL24_WDL20 (0x07 << 10) +#define ESAI_RCR_RSWS_STL24_WDL24 (0x1e << 10) +#define ESAI_RCR_RSWS_STL32_WDL8 (0x18 << 10) +#define ESAI_RCR_RSWS_STL32_WDL12 (0x15 << 10) +#define ESAI_RCR_RSWS_STL32_WDL16 (0x12 << 10) +#define ESAI_RCR_RSWS_STL32_WDL20 (0x0f << 10) +#define ESAI_RCR_RSWS_STL32_WDL24 (0x1f << 10) + +#define ESAI_RCR_RMOD_MASK 0xfffcff +#define ESAI_RCR_RMOD_NORMAL (0x00 << 8) +#define ESAI_RCR_RMOD_ONDEMAND (0x01 << 8) +#define ESAI_RCR_RMOD_NETWORK (0x01 << 8) +#define ESAI_RCR_RMOD_RESERVED (0x02 << 8) +#define ESAI_RCR_RMOD_AC97 (0x03 << 8) + +#define ESAI_RCCR_RHCKD (1 << 23) +#define ESAI_RCCR_RFSD (1 << 22) +#define ESAI_RCCR_RCKD (1 << 21) +#define ESAI_RCCR_RHCKP (1 << 20) +#define ESAI_RCCR_RFSP (1 << 19) +#define ESAI_RCCR_RCKP (1 << 18) + +#define ESAI_RCCR_RPSR_MASK 0xfffeff +#define ESAI_RCCR_RPSR_BYPASS (1 << 8) +#define ESAI_RCCR_RPSR_DIV8 (0 << 8) + +#define ESAI_RCCR_RFP_MASK 0xfc3fff +#define ESAI_RCCR_RFP(x) ((x & 0xf) << 14) + +#define ESAI_RCCR_RDC_MASK 0xffc1ff +#define ESAI_RCCR_RDC(x) (((x) & 0x1f) << 9) + +#define ESAI_RCCR_RPM_MASK 0xffff00 +#define ESAI_RCCR_RPM(x) (x & 0xff) + +#define ESAI_GPIO_ESAI 0xfff + +/* ESAI clock source */ +#define ESAI_CLK_FSYS 0 +#define ESAI_CLK_EXTAL 1 + +/* ESAI clock divider */ +#define ESAI_TX_DIV_PSR 0 +#define ESAI_TX_DIV_PM 1 +#define ESAI_TX_DIV_FP 2 +#define ESAI_RX_DIV_PSR 3 +#define ESAI_RX_DIV_PM 4 +#define ESAI_RX_DIV_FP 5 + +static int imx_esai_txrx_state; +static struct imx_esai imx_esai_priv[3]; + +static int imx_esai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, int dir) +{ + u32 ecr, tccr, rccr; + + ecr = __raw_readl(ESAI_ECR); + tccr = __raw_readl(ESAI_TCCR); + rccr = __raw_readl(ESAI_RCCR); + + if (dir == SND_SOC_CLOCK_IN) { + if (cpu_dai->id & IMX_DAI_ESAI_TX) + tccr &= + ~(ESAI_TCCR_THCKD | ESAI_TCCR_TCKD | + ESAI_TCCR_TFSD); + if (cpu_dai->id & IMX_DAI_ESAI_RX) + rccr &= + ~(ESAI_RCCR_RHCKD | ESAI_RCCR_RCKD | + ESAI_RCCR_RFSD); + } else { + if (cpu_dai->id & IMX_DAI_ESAI_TX) + tccr |= + ESAI_TCCR_THCKD | ESAI_TCCR_TCKD | ESAI_TCCR_TFSD; + if (cpu_dai->id & IMX_DAI_ESAI_RX) + rccr |= + ESAI_RCCR_RHCKD | ESAI_RCCR_RCKD | ESAI_RCCR_RFSD; + if (clk_id == ESAI_CLK_FSYS) { + if (cpu_dai->id & IMX_DAI_ESAI_TX) + ecr &= ~(ESAI_ECR_ETI | ESAI_ECR_ETO); + if (cpu_dai->id & IMX_DAI_ESAI_RX) + ecr &= ~(ESAI_ECR_ERI | ESAI_ECR_ERO); + } else if (clk_id == ESAI_CLK_EXTAL) { + if (cpu_dai->id & IMX_DAI_ESAI_TX) { + ecr |= ESAI_ECR_ETI; + ecr &= ~ESAI_ECR_ETO; + } + if (cpu_dai->id & IMX_DAI_ESAI_RX) { + ecr |= ESAI_ECR_ERI; + ecr &= ~ESAI_ECR_ERO; + } + } + } + + __raw_writel(ecr, ESAI_ECR); + if (cpu_dai->id & IMX_DAI_ESAI_TX) + __raw_writel(tccr, ESAI_TCCR); + if (cpu_dai->id & IMX_DAI_ESAI_RX) + __raw_writel(rccr, ESAI_RCCR); + + ESAI_DUMP(); + + return 0; +} + +static int imx_esai_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + u32 tccr, rccr; + + tccr = __raw_readl(ESAI_TCCR); + rccr = __raw_readl(ESAI_RCCR); + + switch (div_id) { + case ESAI_TX_DIV_PSR: + tccr &= ESAI_TCCR_TPSR_MASK; + tccr |= div; + break; + case ESAI_TX_DIV_PM: + tccr &= ESAI_TCCR_TPM_MASK; + tccr |= ESAI_TCCR_TPM(div); + break; + case ESAI_TX_DIV_FP: + tccr &= ESAI_TCCR_TFP_MASK; + tccr |= ESAI_TCCR_TFP(div); + break; + case ESAI_RX_DIV_PSR: + rccr &= ESAI_RCCR_RPSR_MASK; + rccr |= div; + break; + case ESAI_RX_DIV_PM: + rccr &= ESAI_RCCR_RPM_MASK; + rccr |= ESAI_RCCR_RPM(div); + break; + case ESAI_RX_DIV_FP: + rccr &= ESAI_RCCR_RFP_MASK; + rccr |= ESAI_RCCR_RFP(div); + break; + return -EINVAL; + } + if (cpu_dai->id & IMX_DAI_ESAI_TX) + __raw_writel(tccr, ESAI_TCCR); + if (cpu_dai->id & IMX_DAI_ESAI_RX) + __raw_writel(rccr, ESAI_RCCR); + return 0; +} + +/* + * ESAI Network Mode or TDM slots configuration. + */ +static int imx_esai_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, + unsigned int mask, int slots) +{ + u32 tccr, rccr; + + if (cpu_dai->id & IMX_DAI_ESAI_TX) { + tccr = __raw_readl(ESAI_TCCR); + + tccr &= ESAI_TCCR_TDC_MASK; + tccr |= ESAI_TCCR_TDC(slots - 1); + + __raw_writel(tccr, ESAI_TCCR); + __raw_writel((mask & 0xffff), ESAI_TSMA); + __raw_writel(((mask >> 16) & 0xffff), ESAI_TSMB); + } + + if (cpu_dai->id & IMX_DAI_ESAI_RX) { + rccr = __raw_readl(ESAI_RCCR); + + rccr &= ESAI_RCCR_RDC_MASK; + rccr |= ESAI_RCCR_RDC(slots - 1); + + __raw_writel(rccr, ESAI_RCCR); + __raw_writel((mask & 0xffff), ESAI_RSMA); + __raw_writel(((mask >> 16) & 0xffff), ESAI_RSMB); + } + + ESAI_DUMP(); + + return 0; +} + +/* + * ESAI DAI format configuration. + */ +static int imx_esai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) +{ + struct imx_esai *esai_mode = (struct imx_esai *)cpu_dai->private_data; + u32 tcr, tccr, rcr, rccr, saicr; + + tcr = __raw_readl(ESAI_TCR); + tccr = __raw_readl(ESAI_TCCR); + rcr = __raw_readl(ESAI_RCR); + rccr = __raw_readl(ESAI_RCCR); + saicr = __raw_readl(ESAI_SAICR); + + /* DAI mode */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* data on rising edge of bclk, frame low 1clk before data */ + tcr &= ~ESAI_TCR_TFSL; + tcr |= ESAI_TCR_TFSR; + rcr &= ~ESAI_RCR_RFSL; + rcr |= ESAI_RCR_RFSR; + break; + case SND_SOC_DAIFMT_LEFT_J: + /* data on rising edge of bclk, frame high with data */ + tcr &= ~(ESAI_TCR_TFSL | ESAI_TCR_TFSR); + rcr &= ~(ESAI_RCR_RFSL | ESAI_RCR_RFSR); + break; + case SND_SOC_DAIFMT_DSP_B: + /* data on rising edge of bclk, frame high with data */ + tcr |= ESAI_TCR_TFSL; + rcr |= ESAI_RCR_RFSL; + break; + case SND_SOC_DAIFMT_DSP_A: + /* data on rising edge of bclk, frame high 1clk before data */ + tcr |= ESAI_TCR_TFSL; + rcr |= ESAI_RCR_RFSL; + break; + } + + /* DAI clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + tccr |= ESAI_TCCR_TFSP; + tccr &= ~(ESAI_TCCR_TCKP | ESAI_TCCR_THCKP); + rccr &= ~(ESAI_RCCR_RCKP | ESAI_RCCR_RHCKP); + rccr |= ESAI_RCCR_RFSP; + break; + case SND_SOC_DAIFMT_IB_NF: + tccr &= ~(ESAI_TCCR_TCKP | ESAI_TCCR_THCKP | ESAI_TCCR_TFSP); + rccr &= ~(ESAI_RCCR_RCKP | ESAI_RCCR_RHCKP | ESAI_RCCR_RFSP); + break; + case SND_SOC_DAIFMT_NB_IF: + tccr |= ESAI_TCCR_TCKP | ESAI_TCCR_THCKP | ESAI_TCCR_TFSP; + rccr |= ESAI_RCCR_RCKP | ESAI_RCCR_RHCKP | ESAI_RCCR_RFSP; + break; + case SND_SOC_DAIFMT_NB_NF: + tccr &= ~ESAI_TCCR_TFSP; + tccr |= ESAI_TCCR_TCKP | ESAI_TCCR_THCKP; + rccr &= ~ESAI_RCCR_RFSP; + rccr |= ESAI_RCCR_RCKP | ESAI_RCCR_RHCKP; + break; + } + + /* DAI clock master masks */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + tccr &= ~(ESAI_TCCR_TFSD | ESAI_TCCR_TCKD); + rccr &= ~(ESAI_RCCR_RFSD | ESAI_RCCR_RCKD); + break; + case SND_SOC_DAIFMT_CBS_CFM: + tccr &= ~ESAI_TCCR_TFSD; + tccr |= ESAI_TCCR_TCKD; + rccr &= ~ESAI_RCCR_RFSD; + rccr |= ESAI_RCCR_RCKD; + break; + case SND_SOC_DAIFMT_CBM_CFS: + tccr &= ~ESAI_TCCR_TCKD; + tccr |= ESAI_TCCR_TFSD; + rccr &= ~ESAI_RCCR_RCKD; + rccr |= ESAI_RCCR_RFSD; + break; + case SND_SOC_DAIFMT_CBS_CFS: + tccr |= (ESAI_TCCR_TFSD | ESAI_TCCR_TCKD); + rccr |= (ESAI_RCCR_RFSD | ESAI_RCCR_RCKD); + } + + /* sync */ + if (esai_mode->sync_mode) + saicr |= ESAI_SAICR_SYNC; + else + saicr &= ~ESAI_SAICR_SYNC; + + tcr &= ESAI_TCR_TMOD_MASK; + rcr &= ESAI_RCR_RMOD_MASK; + if (esai_mode->network_mode) { + tcr |= ESAI_TCR_TMOD_NETWORK; + rcr |= ESAI_RCR_RMOD_NETWORK; + } else { + tcr |= ESAI_TCR_TMOD_NORMAL; + rcr |= ESAI_RCR_RMOD_NORMAL; + } + + if (cpu_dai->id & IMX_DAI_ESAI_TX) { + __raw_writel(tcr, ESAI_TCR); + __raw_writel(tccr, ESAI_TCCR); + } + if (cpu_dai->id & IMX_DAI_ESAI_RX) { + __raw_writel(rcr, ESAI_RCR); + __raw_writel(rccr, ESAI_RCCR); + } + + __raw_writel(saicr, ESAI_SAICR); + + ESAI_DUMP(); + return 0; +} + +static struct clk *esai_clk; + +static int fifo_err_counter; + +static irqreturn_t esai_irq(int irq, void *dev_id) +{ + if (fifo_err_counter++ % 1000 == 0) + printk(KERN_ERR + "esai_irq SAISR %x fifo_errs=%d\n", + __raw_readl(ESAI_SAISR), fifo_err_counter); + return IRQ_HANDLED; +} + +static int imx_esai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *cpu_dai) +{ + if (cpu_dai->playback.active && (cpu_dai->id & IMX_DAI_ESAI_TX)) + return 0; + if (cpu_dai->capture.active && (cpu_dai->id & IMX_DAI_ESAI_RX)) + return 0; + + if (!(imx_esai_txrx_state & IMX_DAI_ESAI_TXRX)) { + if (request_irq(MXC_INT_ESAI, esai_irq, 0, "esai", NULL)) { + pr_err("%s: failure requesting esai irq\n", __func__); + return -EBUSY; + } + clk_enable(esai_clk); + __raw_writel(ESAI_ECR_ERST, ESAI_ECR); + __raw_writel(ESAI_ECR_ESAIEN, ESAI_ECR); + + __raw_writel(ESAI_GPIO_ESAI, ESAI_PRRC); + __raw_writel(ESAI_GPIO_ESAI, ESAI_PCRC); + } + + if (cpu_dai->id & IMX_DAI_ESAI_TX) { + imx_esai_txrx_state |= IMX_DAI_ESAI_TX; + __raw_writel(ESAI_TCR_TPR, ESAI_TCR); + } + if (cpu_dai->id & IMX_DAI_ESAI_RX) { + imx_esai_txrx_state |= IMX_DAI_ESAI_RX; + __raw_writel(ESAI_RCR_RPR, ESAI_RCR); + } + + ESAI_DUMP(); + return 0; +} + +/* + * This function is called to initialize the TX port before enable + * the tx port. + */ +static int imx_esai_hw_tx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + u32 tcr, tfcr; + unsigned int channels; + + tcr = __raw_readl(ESAI_TCR); + tfcr = __raw_readl(ESAI_TFCR); + + tfcr |= ESAI_TFCR_TFR; + __raw_writel(tfcr, ESAI_TFCR); + tfcr &= ~ESAI_TFCR_TFR; + /* DAI data (word) size */ + tfcr &= ESAI_TFCR_TWA_MASK; + tcr &= ESAI_TCR_TSWS_MASK; + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + tfcr |= ESAI_WORD_LEN_16; + tcr |= ESAI_TCR_TSHFD_MSB | ESAI_TCR_TSWS_STL32_WDL16; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + tfcr |= ESAI_WORD_LEN_20; + tcr |= ESAI_TCR_TSHFD_MSB | ESAI_TCR_TSWS_STL32_WDL20; + break; + case SNDRV_PCM_FORMAT_S24_LE: + tfcr |= ESAI_WORD_LEN_24; + tcr |= ESAI_TCR_TSHFD_MSB | ESAI_TCR_TSWS_STL32_WDL24; + break; + } + + channels = params_channels(params); + tfcr &= ESAI_TFCR_TE_MASK; + tfcr |= ESAI_TFCR_TE(channels); + + tfcr |= ESAI_TFCR_TFWM(64); + + /* Left aligned, Zero padding */ + tcr |= ESAI_TCR_PADC; + + __raw_writel(tcr, ESAI_TCR); + __raw_writel(tfcr, ESAI_TFCR); + + ESAI_DUMP(); + return 0; +} + +/* + * This function is called to initialize the RX port before enable + * the rx port. + */ +static int imx_esai_hw_rx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + u32 rcr, rfcr; + unsigned int channels; + + rcr = __raw_readl(ESAI_RCR); + rfcr = __raw_readl(ESAI_RFCR); + + rfcr |= ESAI_RFCR_RFR; + __raw_writel(rfcr, ESAI_RFCR); + rfcr &= ~ESAI_RFCR_RFR; + + rfcr &= ESAI_RFCR_RWA_MASK; + rcr &= ESAI_RCR_RSWS_MASK; + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + rfcr |= ESAI_WORD_LEN_16; + rcr |= ESAI_RCR_RSHFD_MSB | ESAI_RCR_RSWS_STL16_WDL16; + break; + } + + channels = params_channels(params); + rfcr &= ESAI_RFCR_RE_MASK; + rfcr |= ESAI_RFCR_RE(channels); + + rfcr |= ESAI_RFCR_RFWM(64); + + __raw_writel(rcr, ESAI_RCR); + __raw_writel(rfcr, ESAI_RFCR); + return 0; +} + +/* + * This function is called to initialize the TX or RX port, + */ +static int imx_esai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + /* Tx/Rx config */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (__raw_readl(ESAI_TCR) & ESAI_TCR_TE0) + return 0; + return imx_esai_hw_tx_params(substream, params, dai); + } else { + if (__raw_readl(ESAI_RCR) & ESAI_RCR_RE1) + return 0; + return imx_esai_hw_rx_params(substream, params, dai); + } +} + +static int imx_esai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + u32 reg, tfcr = 0, rfcr = 0; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + tfcr = __raw_readl(ESAI_TFCR); + reg = __raw_readl(ESAI_TCR); + } else { + rfcr = __raw_readl(ESAI_RFCR); + reg = __raw_readl(ESAI_RCR); + } + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + tfcr |= ESAI_TFCR_TFEN; + __raw_writel(tfcr, ESAI_TFCR); + reg &= ~ESAI_TCR_TPR; + reg |= ESAI_TCR_TE(substream->runtime->channels); + __raw_writel(reg, ESAI_TCR); + } else { + rfcr |= ESAI_RFCR_RFEN; + __raw_writel(rfcr, ESAI_RFCR); + reg &= ~ESAI_RCR_RPR; + reg |= ESAI_RCR_RE(substream->runtime->channels); + __raw_writel(reg, ESAI_RCR); + } + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + reg &= ~ESAI_TCR_TE(substream->runtime->channels); + __raw_writel(reg, ESAI_TCR); + reg |= ESAI_TCR_TPR; + __raw_writel(reg, ESAI_TCR); + tfcr |= ESAI_TFCR_TFR; + tfcr &= ~ESAI_TFCR_TFEN; + __raw_writel(tfcr, ESAI_TFCR); + tfcr &= ~ESAI_TFCR_TFR; + __raw_writel(tfcr, ESAI_TFCR); + } else { + reg &= ~ESAI_RCR_RE(substream->runtime->channels); + __raw_writel(reg, ESAI_RCR); + reg |= ESAI_RCR_RPR; + __raw_writel(reg, ESAI_RCR); + rfcr |= ESAI_RFCR_RFR; + rfcr &= ~ESAI_RFCR_RFEN; + __raw_writel(rfcr, ESAI_RFCR); + rfcr &= ~ESAI_RFCR_RFR; + __raw_writel(rfcr, ESAI_RFCR); + } + break; + default: + return -EINVAL; + } + + ESAI_DUMP(); + return 0; +} + +static void imx_esai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + if (dai->id & IMX_DAI_ESAI_TX) + imx_esai_txrx_state &= ~IMX_DAI_ESAI_TX; + if (dai->id & IMX_DAI_ESAI_RX) + imx_esai_txrx_state &= ~IMX_DAI_ESAI_RX; + + /* shutdown ESAI if neither Tx or Rx is active */ + if (!(imx_esai_txrx_state & IMX_DAI_ESAI_TXRX)) { + free_irq(MXC_INT_ESAI, NULL); + clk_disable(esai_clk); + } +} + +#ifdef CONFIG_PM +static int imx_esai_suspend(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /*do we need to disable any clocks */ + return 0; +} + +static int imx_esai_resume(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /* do we need to enable any clocks */ + return 0; +} + +#else +#define imx_esai_suspend NULL +#define imx_esai_resume NULL +#endif + +static int imx_esai_probe(struct platform_device *pdev, struct snd_soc_dai *dai) +{ + imx_esai_txrx_state = 0; + + esai_clk = clk_get(NULL, "esai_clk"); + + return 0; +} + +static void imx_esai_remove(struct platform_device *pdev, + struct snd_soc_dai *dai) +{ + + clk_put(esai_clk); +} + +#define IMX_ESAI_RATES SNDRV_PCM_RATE_8000_192000 + +#define IMX_ESAI_FORMATS \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE) + +static struct snd_soc_dai_ops imx_esai_dai_ops = { + .startup = imx_esai_startup, + .shutdown = imx_esai_shutdown, + .trigger = imx_esai_trigger, + .hw_params = imx_esai_hw_params, + .set_sysclk = imx_esai_set_dai_sysclk, + .set_clkdiv = imx_esai_set_dai_clkdiv, + .set_fmt = imx_esai_set_dai_fmt, + .set_tdm_slot = imx_esai_set_dai_tdm_slot, +}; + +struct snd_soc_dai imx_esai_dai[] = { + { + .name = "imx-esai-tx", + .id = IMX_DAI_ESAI_TX, + .probe = imx_esai_probe, + .remove = imx_esai_remove, + .suspend = imx_esai_suspend, + .resume = imx_esai_resume, + .playback = { + .channels_min = 1, + .channels_max = 6, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 4, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .ops = &imx_esai_dai_ops, + .private_data = &imx_esai_priv[0], + }, + { + .name = "imx-esai-rx", + .id = IMX_DAI_ESAI_RX, + .probe = imx_esai_probe, + .remove = imx_esai_remove, + .suspend = imx_esai_suspend, + .resume = imx_esai_resume, + .playback = { + .channels_min = 1, + .channels_max = 6, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 4, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .ops = &imx_esai_dai_ops, + .private_data = &imx_esai_priv[1], + }, + { + .name = "imx-esai-txrx", + .id = IMX_DAI_ESAI_TXRX, + .probe = imx_esai_probe, + .remove = imx_esai_remove, + .suspend = imx_esai_suspend, + .resume = imx_esai_resume, + .playback = { + .channels_min = 1, + .channels_max = 6, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 4, + .rates = IMX_ESAI_RATES, + .formats = IMX_ESAI_FORMATS, + }, + .ops = &imx_esai_dai_ops, + .private_data = &imx_esai_priv[2], + }, + +}; + +EXPORT_SYMBOL_GPL(imx_esai_dai); + +static int __init imx_esai_init(void) +{ + return snd_soc_register_dais(imx_esai_dai, ARRAY_SIZE(imx_esai_dai)); +} + +static void __exit imx_esai_exit(void) +{ + snd_soc_unregister_dais(imx_esai_dai, ARRAY_SIZE(imx_esai_dai)); +} + +module_init(imx_esai_init); +module_exit(imx_esai_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("i.MX ASoC ESAI driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-bt.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-bt.c @@ -0,0 +1,256 @@ +/* + * imx-3stack-bt.c -- SoC bluetooth audio for imx_3stack + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-pcm.h" +#include "imx-ssi.h" +#include "imx-3stack-bt.h" + +#define BT_SSI_MASTER 1 + +struct imx_3stack_priv { + struct platform_device *pdev; + int active; +}; + +static struct imx_3stack_priv card_priv; + +static void imx_3stack_init_dam(int ssi_port, int dai_port) +{ + /* bt uses SSI1 or SSI2 via AUDMUX port dai_port for audio */ + unsigned int ssi_ptcr = 0; + unsigned int dai_ptcr = 0; + unsigned int ssi_pdcr = 0; + unsigned int dai_pdcr = 0; + + /* reset port ssi_port & dai_port */ + __raw_writel(0, DAM_PTCR(ssi_port)); + __raw_writel(0, DAM_PTCR(dai_port)); + __raw_writel(0, DAM_PDCR(ssi_port)); + __raw_writel(0, DAM_PDCR(dai_port)); + + /* set to synchronous */ + ssi_ptcr |= AUDMUX_PTCR_SYN; + dai_ptcr |= AUDMUX_PTCR_SYN; + +#if BT_SSI_MASTER + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TFSDIR; + ssi_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, dai_port); + + /* set Tx Clock direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TCLKDIR; + ssi_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, dai_port); +#else + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source ssi_port --> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TFSDIR; + dai_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, ssi_port); + + /* set Tx Clock direction and source ssi_port--> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TCLKDIR; + dai_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, ssi_port); +#endif + + __raw_writel(ssi_ptcr, DAM_PTCR(ssi_port)); + __raw_writel(dai_ptcr, DAM_PTCR(dai_port)); + __raw_writel(ssi_pdcr, DAM_PDCR(ssi_port)); + __raw_writel(dai_pdcr, DAM_PDCR(dai_port)); +} + +static int imx_3stack_bt_startup(struct snd_pcm_substream *substream) +{ + struct imx_3stack_priv *priv = &card_priv; + + if (!priv->active) + gpio_activate_bt_audio_port(); + priv->active++; + return 0; +} + +static int imx_3stack_bt_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + unsigned int channels = params_channels(params); + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + int ret = 0; + u32 dai_format; + +#if BT_SSI_MASTER + dai_format = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_IB_IF | + SND_SOC_DAIFMT_CBM_CFM; +#else + dai_format = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_IB_IF | + SND_SOC_DAIFMT_CBS_CFS; +#endif + + ssi_mode->sync_mode = 1; + if (channels == 1) + ssi_mode->network_mode = 0; + else + ssi_mode->network_mode = 1; + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, + channels == 1 ? 0xfffffffe : 0xfffffffc, 2); + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); + if (ret < 0) + return ret; + + /* set the SSI system clock as input (unused) */ + snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, SND_SOC_CLOCK_IN); + + return 0; +} + +static void imx_3stack_bt_shutdown(struct snd_pcm_substream *substream) +{ + struct imx_3stack_priv *priv = &card_priv; + + priv->active--; + if (!priv->active) + gpio_inactivate_bt_audio_port(); +} + +/* + * imx_3stack bt DAI opserations. + */ +static struct snd_soc_ops imx_3stack_bt_ops = { + .startup = imx_3stack_bt_startup, + .hw_params = imx_3stack_bt_hw_params, + .shutdown = imx_3stack_bt_shutdown, +}; + +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "bluetooth", + .stream_name = "bluetooth", + .codec_dai = &bt_dai, + .ops = &imx_3stack_bt_ops, +}; + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_bt, +}; + +/* + * This function will register the snd_soc_pcm_link drivers. + * It also registers devices for platform DMA, I2S, SSP and registers an + * I2C driver to probe the codec. + */ +static int __init imx_3stack_bt_probe(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *dev_data = pdev->dev.platform_data; + struct imx_3stack_priv *priv = &card_priv; + struct snd_soc_dai *bt_cpu_dai; + + if (dev_data->src_port == 1) + bt_cpu_dai = &imx_ssi_dai[0]; + else + bt_cpu_dai = &imx_ssi_dai[2]; + + bt_cpu_dai->dev = &pdev->dev; + imx_3stack_dai.cpu_dai = bt_cpu_dai; + + /* Configure audio port */ + imx_3stack_init_dam(dev_data->src_port, dev_data->ext_port); + + priv->pdev = pdev; + priv->active = 0; + return 0; + +} + +static int __devexit imx_3stack_bt_remove(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver imx_3stack_bt_driver = { + .probe = imx_3stack_bt_probe, + .remove = __devexit_p(imx_3stack_bt_remove), + .driver = { + .name = "imx-3stack-bt", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_asoc_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_bt_driver); + if (ret < 0) + goto exit; + imx_3stack_snd_device = platform_device_alloc("soc-audio", 4); + if (!imx_3stack_snd_device) + goto err_device_alloc; + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + if (0 == ret) + goto exit; + + platform_device_put(imx_3stack_snd_device); +err_device_alloc: + platform_driver_unregister(&imx_3stack_bt_driver); +exit: + return ret; +} + +static void __exit imx_3stack_asoc_exit(void) +{ + platform_driver_unregister(&imx_3stack_bt_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_asoc_init); +module_exit(imx_3stack_asoc_exit); + +/* Module information */ +MODULE_DESCRIPTION("ALSA SoC bluetooth imx_3stack"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-wm8350.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-wm8350.c @@ -0,0 +1,697 @@ +/* + * imx-3stack-wm8350.c -- i.MX 3Stack Driver for Wolfson WM8350 Codec + * + * Copyright 2007 Wolfson Microelectronics PLC. + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 19th Jun 2007 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm8350.h" +#include "imx-ssi.h" +#include "imx-pcm.h" + +void gpio_activate_audio_ports(void); + +/* SSI BCLK and LRC master */ +#define WM8350_SSI_MASTER 1 + +struct imx_3stack_priv { + int lr_clk_active; + int playback_active; + int capture_active; + struct platform_device *pdev; + struct wm8350 *wm8350; +}; + +static struct imx_3stack_priv machine_priv; + +struct _wm8350_audio { + unsigned int channels; + snd_pcm_format_t format; + unsigned int rate; + unsigned int sysclk; + unsigned int bclkdiv; + unsigned int clkdiv; + unsigned int lr_rate; +}; + +/* in order of power consumption per rate (lowest first) */ +static const struct _wm8350_audio wm8350_audio[] = { + /* 16bit mono modes */ + + {1, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000, + WM8350_BCLK_DIV_48, WM8350_DACDIV_6, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 16000, 12288000, + WM8350_BCLK_DIV_24, WM8350_DACDIV_6, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 32000, 12288000, + WM8350_BCLK_DIV_12, WM8350_DACDIV_3, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 48000, 12288000, + WM8350_BCLK_DIV_8, WM8350_DACDIV_2, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 96000, 24576000, + WM8350_BCLK_DIV_8, WM8350_DACDIV_2, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 11025, 11289600, + WM8350_BCLK_DIV_32, WM8350_DACDIV_4, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 22050, 11289600, + WM8350_BCLK_DIV_16, WM8350_DACDIV_4, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 44100, 11289600, + WM8350_BCLK_DIV_8, WM8350_DACDIV_2, 32,}, + {1, SNDRV_PCM_FORMAT_S16_LE, 88200, 22579200, + WM8350_BCLK_DIV_8, WM8350_DACDIV_2, 32,}, + + /* 16 bit stereo modes */ + {2, SNDRV_PCM_FORMAT_S16_LE, 8000, 12288000, + WM8350_BCLK_DIV_48, WM8350_DACDIV_6, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 16000, 12288000, + WM8350_BCLK_DIV_24, WM8350_DACDIV_3, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 32000, 12288000, + WM8350_BCLK_DIV_12, WM8350_DACDIV_1_5, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 48000, 12288000, + WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 96000, 24576000, + WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 11025, 11289600, + WM8350_BCLK_DIV_32, WM8350_DACDIV_4, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 22050, 11289600, + WM8350_BCLK_DIV_16, WM8350_DACDIV_2, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 44100, 11289600, + WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,}, + {2, SNDRV_PCM_FORMAT_S16_LE, 88200, 22579200, + WM8350_BCLK_DIV_8, WM8350_DACDIV_1, 32,}, + + /* 24bit stereo modes */ + {2, SNDRV_PCM_FORMAT_S24_LE, 48000, 12288000, + WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,}, + {2, SNDRV_PCM_FORMAT_S24_LE, 96000, 24576000, + WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,}, + {2, SNDRV_PCM_FORMAT_S24_LE, 44100, 11289600, + WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,}, + {2, SNDRV_PCM_FORMAT_S24_LE, 88200, 22579200, + WM8350_BCLK_DIV_4, WM8350_DACDIV_1, 64,}, +}; + +#if WM8350_SSI_MASTER +static int imx_3stack_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->card->codec; + struct wm8350 *wm8350 = codec->control_data; + struct imx_3stack_priv *priv = &machine_priv; + + /* In master mode the LR clock can come from either the DAC or ADC. + * We use the LR clock from whatever stream is enabled first. + */ + + if (!priv->lr_clk_active) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + wm8350_clear_bits(wm8350, WM8350_CLOCK_CONTROL_2, + WM8350_LRC_ADC_SEL); + else + wm8350_set_bits(wm8350, WM8350_CLOCK_CONTROL_2, + WM8350_LRC_ADC_SEL); + } + priv->lr_clk_active++; + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + priv->capture_active = 1; + else + priv->playback_active = 1; + return 0; +} +#else +#define imx_3stack_startup NULL +#endif + +static int imx_3stack_audio_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *machine = rtd->dai; + struct snd_soc_dai *cpu_dai = machine->cpu_dai; + struct snd_soc_dai *codec_dai = machine->codec_dai; + struct imx_3stack_priv *priv = &machine_priv; + int ret = 0; + int i, found = 0; + snd_pcm_format_t format = params_format(params); + unsigned int rate = params_rate(params); + unsigned int channels = params_channels(params); + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + u32 dai_format; + + /* only need to do this once as capture and playback are sync */ + if (priv->lr_clk_active > 1) + return 0; + + /* find the correct audio parameters */ + for (i = 0; i < ARRAY_SIZE(wm8350_audio); i++) { + if (rate == wm8350_audio[i].rate && + format == wm8350_audio[i].format && + channels == wm8350_audio[i].channels) { + found = 1; + break; + } + } + if (!found) { + printk(KERN_ERR "%s: invalid params\n", __func__); + return -EINVAL; + } + +#if WM8350_SSI_MASTER + /* codec FLL input is 32768 kHz from MCLK */ + snd_soc_dai_set_pll(codec_dai, 0, 32768, wm8350_audio[i].sysclk); +#else + /* codec FLL input is rate from DAC LRC */ + snd_soc_dai_set_pll(codec_dai, 0, rate, wm8350_audio[i].sysclk); +#endif + +#if WM8350_SSI_MASTER + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; + + ssi_mode->sync_mode = 1; + if (channels == 1) + ssi_mode->network_mode = 0; + else + ssi_mode->network_mode = 1; + + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, dai_format); + if (ret < 0) + return ret; + + /* set cpu DAI configuration */ + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + dai_format &= ~SND_SOC_DAIFMT_INV_MASK; + /* Invert frame to switch mic from right channel to left */ + dai_format |= SND_SOC_DAIFMT_NB_IF; + } + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, + channels == 1 ? 0xfffffffe : 0xfffffffc, + channels); + + ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); + if (ret < 0) + return ret; + + /* set 32KHZ as the codec system clock for DAC and ADC */ + snd_soc_dai_set_sysclk(codec_dai, WM8350_MCLK_SEL_PLL_32K, + wm8350_audio[i].sysclk, SND_SOC_CLOCK_IN); +#else + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS; + + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, dai_format); + if (ret < 0) + return ret; + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, + channels == 1 ? 0xfffffffe : 0xfffffffc, + channels); + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, dai_format); + if (ret < 0) + return ret; + + /* set DAC LRC as the codec system clock for DAC and ADC */ + snd_soc_dai_set_sysclk(codec_dai, WM8350_MCLK_SEL_PLL_DAC, + wm8350_audio[i].sysclk, SND_SOC_CLOCK_IN); +#endif + + /* set the SSI system clock as input (unused) */ + snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, SND_SOC_CLOCK_IN); + + /* set codec BCLK division for sample rate */ + snd_soc_dai_set_clkdiv(codec_dai, WM8350_BCLK_CLKDIV, + wm8350_audio[i].bclkdiv); + + /* DAI is synchronous and clocked with DAC LRCLK & ADC LRC */ + snd_soc_dai_set_clkdiv(codec_dai, + WM8350_DACLR_CLKDIV, + wm8350_audio[i].lr_rate); + snd_soc_dai_set_clkdiv(codec_dai, + WM8350_ADCLR_CLKDIV, + wm8350_audio[i].lr_rate); + + /* now configure DAC and ADC clocks */ + snd_soc_dai_set_clkdiv(codec_dai, + WM8350_DAC_CLKDIV, wm8350_audio[i].clkdiv); + + snd_soc_dai_set_clkdiv(codec_dai, + WM8350_ADC_CLKDIV, wm8350_audio[i].clkdiv); + + return 0; +} + +static void imx_3stack_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->card->codec; + struct snd_soc_dai_link *machine = rtd->dai; + struct snd_soc_dai *codec_dai = machine->codec_dai; + struct imx_3stack_priv *priv = &machine_priv; + struct wm8350 *wm8350 = codec->control_data; + + /* disable the PLL if there are no active Tx or Rx channels */ + if (!codec_dai->active) + snd_soc_dai_set_pll(codec_dai, 0, 0, 0); + priv->lr_clk_active--; + + /* + * We need to keep track of active streams in master mode and + * switch LRC source if necessary. + */ + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + priv->capture_active = 0; + else + priv->playback_active = 0; + + if (priv->capture_active) + wm8350_set_bits(wm8350, WM8350_CLOCK_CONTROL_2, + WM8350_LRC_ADC_SEL); + else if (priv->playback_active) + wm8350_clear_bits(wm8350, WM8350_CLOCK_CONTROL_2, + WM8350_LRC_ADC_SEL); +} + +/* + * imx_3stack WM8350 HiFi DAI operations. + */ +static struct snd_soc_ops imx_3stack_ops = { + .startup = imx_3stack_startup, + .shutdown = imx_3stack_shutdown, + .hw_params = imx_3stack_audio_hw_params, +}; + +static void imx_3stack_init_dam(int ssi_port, int dai_port) +{ + unsigned int ssi_ptcr = 0; + unsigned int dai_ptcr = 0; + unsigned int ssi_pdcr = 0; + unsigned int dai_pdcr = 0; + /* WM8350 uses SSI1 or SSI2 via AUDMUX port dai_port for audio */ + + /* reset port ssi_port & dai_port */ + __raw_writel(0, DAM_PTCR(ssi_port)); + __raw_writel(0, DAM_PTCR(dai_port)); + __raw_writel(0, DAM_PDCR(ssi_port)); + __raw_writel(0, DAM_PDCR(dai_port)); + + /* set to synchronous */ + ssi_ptcr |= AUDMUX_PTCR_SYN; + dai_ptcr |= AUDMUX_PTCR_SYN; + +#if WM8350_SSI_MASTER + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TFSDIR; + ssi_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, dai_port); + + /* set Tx Clock direction and source dai_port--> ssi_port output */ + ssi_ptcr |= AUDMUX_PTCR_TCLKDIR; + ssi_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, dai_port); +#else + /* set Rx sources ssi_port <--> dai_port */ + ssi_pdcr |= AUDMUX_PDCR_RXDSEL(dai_port); + dai_pdcr |= AUDMUX_PDCR_RXDSEL(ssi_port); + + /* set Tx frame direction and source ssi_port --> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TFSDIR; + dai_ptcr |= AUDMUX_PTCR_TFSSEL(AUDMUX_FROM_TXFS, ssi_port); + + /* set Tx Clock direction and source ssi_port--> dai_port output */ + dai_ptcr |= AUDMUX_PTCR_TCLKDIR; + dai_ptcr |= AUDMUX_PTCR_TCSEL(AUDMUX_FROM_TXFS, ssi_port); +#endif + + __raw_writel(ssi_ptcr, DAM_PTCR(ssi_port)); + __raw_writel(dai_ptcr, DAM_PTCR(dai_port)); + __raw_writel(ssi_pdcr, DAM_PDCR(ssi_port)); + __raw_writel(dai_pdcr, DAM_PDCR(dai_port)); +} + +static const struct snd_soc_dapm_route audio_map[] = { + /* SiMIC --> IN1LN (with automatic bias) via SP1 */ + {"IN1RP", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "SiMIC"}, + + /* Mic 1 Jack --> IN1LN and IN1LP (with automatic bias) */ + {"IN1LN", NULL, "Mic Bias"}, + {"IN1LP", NULL, "Mic1 Jack"}, + {"Mic Bias", NULL, "Mic1 Jack"}, + + /* Mic 2 Jack --> IN1RN and IN1RP (with automatic bias) */ + {"IN1RN", NULL, "Mic2 Jack"}, + {"IN1RP", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Mic2 Jack"}, + + /* Line in Jack --> AUX (L+R) */ + {"IN3R", NULL, "Line In Jack"}, + {"IN3L", NULL, "Line In Jack"}, + + /* Out1 --> Headphone Jack */ + {"Headphone Jack", NULL, "OUT1R"}, + {"Headphone Jack", NULL, "OUT1L"}, + + /* Out1 --> Line Out Jack */ + {"Line Out Jack", NULL, "OUT2R"}, + {"Line Out Jack", NULL, "OUT2L"}, +}; + +static int wm8350_jack_func; +static int wm8350_spk_func; + +static void headphone_detect_handler(struct work_struct *work) +{ + struct imx_3stack_priv *priv = &machine_priv; + struct platform_device *pdev = priv->pdev; + struct wm8350 *wm8350 = priv->wm8350; + + sysfs_notify(&pdev->dev.kobj, NULL, "headphone"); + wm8350_unmask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); +} + +static DECLARE_DELAYED_WORK(hp_event, headphone_detect_handler); + +static void imx_3stack_jack_handler(struct wm8350 *wm8350, int irq, void *data) +{ + wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); + schedule_delayed_work(&hp_event, msecs_to_jiffies(200)); +} + +static ssize_t show_headphone(struct device_driver *dev, char *buf) +{ + struct imx_3stack_priv *priv = &machine_priv; + u16 reg; + + reg = wm8350_reg_read(priv->wm8350, WM8350_JACK_PIN_STATUS); + + if (reg & WM8350_JACK_R_LVL) + strcpy(buf, "speaker\n"); + else + strcpy(buf, "headphone\n"); + + return strlen(buf); +} + +static DRIVER_ATTR(headphone, S_IRUGO | S_IWUSR, show_headphone, NULL); + +static const char *jack_function[] = { "off", "on" +}; + +static const char *spk_function[] = { "off", "on" }; + +static const struct soc_enum wm8350_enum[] = { + SOC_ENUM_SINGLE_EXT(2, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), +}; + +static int wm8350_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = wm8350_jack_func; + return 0; +} + +static int wm8350_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + if (wm8350_jack_func == ucontrol->value.enumerated.item[0]) + return 0; + + wm8350_jack_func = ucontrol->value.enumerated.item[0]; + if (wm8350_jack_func) + snd_soc_dapm_enable_pin(codec, "Headphone Jack"); + else + snd_soc_dapm_disable_pin(codec, "Headphone Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int wm8350_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = wm8350_spk_func; + return 0; +} + +static int wm8350_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + if (wm8350_spk_func == ucontrol->value.enumerated.item[0]) + return 0; + + wm8350_spk_func = ucontrol->value.enumerated.item[0]; + if (wm8350_spk_func) + snd_soc_dapm_enable_pin(codec, "Line Out Jack"); + else + snd_soc_dapm_disable_pin(codec, "Line Out Jack"); + + snd_soc_dapm_sync(codec); + return 1; +} + +static int spk_amp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct imx_3stack_priv *priv = &machine_priv; + struct platform_device *pdev = priv->pdev; + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + + if (plat->amp_enable == NULL) + return 0; + + if (SND_SOC_DAPM_EVENT_ON(event)) + plat->amp_enable(1); + else + plat->amp_enable(0); + + return 0; +} + +static const struct snd_soc_dapm_widget imx_3stack_dapm_widgets[] = { + SND_SOC_DAPM_MIC("SiMIC", NULL), + SND_SOC_DAPM_MIC("Mic1 Jack", NULL), + SND_SOC_DAPM_MIC("Mic2 Jack", NULL), + SND_SOC_DAPM_LINE("Line In Jack", NULL), + SND_SOC_DAPM_LINE("Line Out Jack", NULL), + SND_SOC_DAPM_SPK("Ext Spk", spk_amp_event), + SND_SOC_DAPM_HP("Headphone Jack", NULL), +}; + +static const struct snd_kcontrol_new wm8350_machine_controls[] = { + SOC_ENUM_EXT("Jack Function", wm8350_enum[0], wm8350_get_jack, + wm8350_set_jack), + SOC_ENUM_EXT("Speaker Function", wm8350_enum[1], wm8350_get_spk, + wm8350_set_spk), +}; + +static int imx_3stack_wm8350_init(struct snd_soc_codec *codec) +{ + struct imx_3stack_priv *priv = &machine_priv; + struct wm8350 *wm8350 = priv->wm8350; + int i, ret; + + codec->control_data = wm8350; + + /* Add imx_3stack specific controls */ + for (i = 0; i < ARRAY_SIZE(wm8350_machine_controls); i++) { + ret = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8350_machine_controls[i], + codec, NULL)); + if (ret < 0) + return ret; + } + + /* Add imx_3stack specific widgets */ + snd_soc_dapm_new_controls(codec, imx_3stack_dapm_widgets, + ARRAY_SIZE(imx_3stack_dapm_widgets)); + + /* Set up imx_3stack specific audio path audio_map */ + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_sync(codec); + + return 0; + +} + +/* imx_3stack digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "WM8350", + .stream_name = "WM8350", + .codec_dai = &wm8350_dai, + .init = imx_3stack_wm8350_init, + .ops = &imx_3stack_ops, +}; + +static int imx_3stack_machine_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct imx_3stack_priv *priv = &machine_priv; + struct wm8350 *wm8350 = priv->wm8350; + + socdev->codec_data = wm8350; + + return 0; +} + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, + .probe = imx_3stack_machine_probe, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_wm8350, +}; + +static int __devinit imx_3stack_wm8350_probe(struct platform_device *pdev) +{ + struct mxc_audio_platform_data *plat = pdev->dev.platform_data; + struct imx_3stack_priv *priv = &machine_priv; + struct wm8350 *wm8350 = plat->priv; + struct snd_soc_dai *wm8350_cpu_dai; + int ret = 0; + u16 reg; + + priv->pdev = pdev; + priv->wm8350 = wm8350; + + gpio_activate_audio_ports(); + imx_3stack_init_dam(plat->src_port, plat->ext_port); + + if (plat->src_port == 2) + wm8350_cpu_dai = &imx_ssi_dai[2]; + else + wm8350_cpu_dai = &imx_ssi_dai[0]; + + imx_3stack_dai.cpu_dai = wm8350_cpu_dai; + + ret = driver_create_file(pdev->dev.driver, &driver_attr_headphone); + if (ret < 0) { + pr_err("%s:failed to create driver_attr_headphone\n", __func__); + return ret; + } + + /* enable slow clock gen for jack detect */ + reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_4); + wm8350_reg_write(wm8350, WM8350_POWER_MGMT_4, reg | WM8350_TOCLK_ENA); + /* enable jack detect */ + reg = wm8350_reg_read(wm8350, WM8350_JACK_DETECT); + wm8350_reg_write(wm8350, WM8350_JACK_DETECT, reg | WM8350_JDR_ENA); + wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R, + imx_3stack_jack_handler, NULL); + wm8350_unmask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); + + wm8350_jack_func = 1; + wm8350_spk_func = 1; + + return 0; +} + +static int imx_3stack_wm8350_remove(struct platform_device *pdev) +{ + struct imx_3stack_priv *priv = &machine_priv; + struct wm8350 *wm8350 = priv->wm8350; + + wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); + wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); + + return 0; +} + +static struct platform_driver imx_3stack_wm8350_audio_driver = { + .probe = imx_3stack_wm8350_probe, + .remove = __devexit_p(imx_3stack_wm8350_remove), + .driver = { + .name = "wm8350-imx-3stack-audio", + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_wm8350_audio_driver); + if (ret) + return -ENOMEM; + + imx_3stack_snd_device = platform_device_alloc("soc-audio", -1); + if (!imx_3stack_snd_device) + return -ENOMEM; + + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + + if (ret) + platform_device_put(imx_3stack_snd_device); + + return ret; +} + +static void __exit imx_3stack_exit(void) +{ + platform_driver_unregister(&imx_3stack_wm8350_audio_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_init); +module_exit(imx_3stack_exit); + +MODULE_AUTHOR("Liam Girdwood"); +MODULE_DESCRIPTION("PMIC WM8350 Driver for i.MX 3STACK"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-ac97.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-ac97.c @@ -0,0 +1,564 @@ +/* + * imx-ac97.c -- AC97 driver for Freescale IMX + * + * + * Copyright 2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 26th Nov. 2009 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imx-ssi.h" +#include "imx-pcm.h" + +static DEFINE_MUTEX(ac97_mutex); +static DECLARE_COMPLETION(ac97_completion); + +struct imx_ac97_runtime { + u32 id; + u32 playback; + u32 capture; +}; + +static struct imx_ac97_runtime imx_ac97_para; +static struct imx_ssi imx_ac97_data[2]; + +#define IMX_SSI_DUMP 0 +#if IMX_SSI_DUMP +#define SSI_DUMP() \ + do { \ + printk(KERN_INFO "dump @ %s\n", __func__); \ + printk(KERN_INFO "scr %x\t, %x\n", \ + __raw_readl(SSI1_SCR), __raw_readl(SSI2_SCR)); \ + printk(KERN_INFO "sisr %x\t, %x\n", \ + __raw_readl(SSI1_SISR), __raw_readl(SSI2_SISR)); \ + printk(KERN_INFO "stcr %x\t, %x\n", \ + __raw_readl(SSI1_STCR), __raw_readl(SSI2_STCR)); \ + printk(KERN_INFO "srcr %x\t, %x\n", \ + __raw_readl(SSI1_SRCR), __raw_readl(SSI2_SRCR)); \ + printk(KERN_INFO "stccr %x\t, %x\n", \ + __raw_readl(SSI1_STCCR), __raw_readl(SSI2_STCCR)); \ + printk(KERN_INFO "srccr %x\t, %x\n", \ + __raw_readl(SSI1_SRCCR), __raw_readl(SSI2_SRCCR)); \ + printk(KERN_INFO "sfcsr %x\t, %x\n", \ + __raw_readl(SSI1_SFCSR), __raw_readl(SSI2_SFCSR)); \ + printk(KERN_INFO "stmsk %x\t, %x\n", \ + __raw_readl(SSI1_STMSK), __raw_readl(SSI2_STMSK)); \ + printk(KERN_INFO "srmsk %x\t, %x\n", \ + __raw_readl(SSI1_SRMSK), __raw_readl(SSI2_SRMSK)); \ + printk(KERN_INFO "sier %x\t, %x\n", \ + __raw_readl(SSI1_SIER), __raw_readl(SSI2_SIER)); \ + printk(KERN_INFO "sacnt %x\t, %x\n", \ + __raw_readl(SSI1_SACNT), __raw_readl(SSI2_SACNT)); \ + printk(KERN_INFO "sacdd %x\t, %x\n", \ + __raw_readl(SSI1_SACADD), __raw_readl(SSI2_SACADD)); \ + printk(KERN_INFO "sacdat %x\t, %x\n", \ + __raw_readl(SSI1_SACDAT), __raw_readl(SSI2_SACDAT)); \ + printk(KERN_INFO "satag %x\t, %x\n", \ + __raw_readl(SSI1_SATAG), __raw_readl(SSI2_SATAG)); \ + printk(KERN_INFO "saccst %x\t, %x\n", \ + __raw_readl(SSI1_SACCST), __raw_readl(SSI2_SACCST)); \ + printk(KERN_INFO "saccen %x\t, %x\n", \ + __raw_readl(SSI1_SACCEN), __raw_readl(SSI2_SACCEN)); \ + printk(KERN_INFO "saccdis %x\t, %x\n", \ + __raw_readl(SSI1_SACCDIS), __raw_readl(SSI2_SACCDIS)); \ + } while (0); +#else +#define SSI_DUMP() +#endif + +/* + * Read register value from codec, the read command is sent from + * AC97 slot 2 - 3. The register value is sent back at slot 2 -3 + * in next RX frame. + */ +static unsigned short imx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) +{ + u32 sacdat, sier, scr; + mutex_lock(&ac97_mutex); + if (imx_ac97_para.id == IMX_DAI_AC97_1) { + sier = __raw_readl(SSI1_SIER); + scr = __raw_readl(SSI1_SCR); + __raw_writel((reg << 12), SSI1_SACADD); + __raw_writel(sier | SSI_SIER_CMDDU_EN, SSI1_SIER); + __raw_writel(SSI_SACNT_RD | __raw_readl(SSI1_SACNT), + SSI1_SACNT); + __raw_writel(scr | SSI_SCR_TE | SSI_SCR_RE, SSI1_SCR); + wait_for_completion_timeout(&ac97_completion, HZ); + sacdat = __raw_readl(SSI1_SACDAT); + __raw_writel(sier, SSI1_SIER); + __raw_writel(scr, SSI1_SCR); + } else { + sier = __raw_readl(SSI2_SIER); + scr = __raw_readl(SSI2_SCR); + __raw_writel((reg << 12), SSI2_SACADD); + __raw_writel(sier | SSI_SIER_CMDDU_EN, SSI2_SIER); + __raw_writel(SSI_SACNT_RD | __raw_readl(SSI2_SACNT), + SSI2_SACNT); + __raw_writel(scr | SSI_SCR_TE | SSI_SCR_RE, SSI2_SCR); + wait_for_completion_timeout(&ac97_completion, HZ); + sacdat = __raw_readl(SSI2_SACDAT); + __raw_writel(sier, SSI2_SIER); + __raw_writel(scr, SSI2_SCR); + } + mutex_unlock(&ac97_mutex); + return (unsigned short)(sacdat >> 4); + +} + +/* + * This fucntion is used to send command to codec. + */ +static void imx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, + unsigned short val) +{ + u32 scr; + mutex_lock(&ac97_mutex); + if (imx_ac97_para.id == IMX_DAI_AC97_1) { + scr = __raw_readl(SSI1_SCR); + __raw_writel(reg << 12, SSI1_SACADD); + __raw_writel(val << 4, SSI1_SACDAT); + __raw_writel(SSI_SACNT_WR | __raw_readl(SSI1_SACNT), + SSI1_SACNT); + __raw_writel(scr | SSI_SCR_TE | SSI_SCR_RE, SSI1_SCR); + udelay(100); + __raw_writel(scr, SSI1_SCR); + } else { + scr = __raw_readl(SSI2_SCR); + __raw_writel(reg << 12, SSI2_SACADD); + __raw_writel(val << 4, SSI2_SACDAT); + __raw_writel(SSI_SACNT_WR | __raw_readl(SSI2_SACNT), + SSI2_SACNT); + __raw_writel(scr | SSI_SCR_TE | SSI_SCR_RE, SSI2_SCR); + udelay(100); + __raw_writel(scr, SSI1_SCR); + } + mutex_unlock(&ac97_mutex); + +} + +struct snd_ac97_bus_ops soc_ac97_ops = { + .read = imx_ac97_read, + .write = imx_ac97_write, +}; +EXPORT_SYMBOL_GPL(soc_ac97_ops); + +static struct clk *ssi1_clk; +static struct clk *ssi2_clk; + +static int imx_ac97_hw_tx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + u32 channel = params_channels(params); + u32 stccr, sier; + + if (cpu_dai->id == IMX_DAI_AC97_1) { + stccr = + __raw_readl(SSI1_STCCR) & ~(SSI_STCCR_WL_MASK | + SSI_STCCR_DC_MASK); + sier = __raw_readl(SSI1_SIER); + } else { + stccr = + __raw_readl(SSI2_STCCR) & ~(SSI_STCCR_WL_MASK | + SSI_STCCR_DC_MASK); + sier = __raw_readl(SSI2_SIER); + } + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + stccr |= SSI_STCCR_WL(16) | SSI_STCCR_DC(0x0C); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + stccr |= SSI_STCCR_WL(20) | SSI_STCCR_DC(0x0C); + break; + } + if (ssi_mode->ac97_rx_slots) + __raw_writel(ssi_mode->ac97_rx_slots, SSI1_SACCEN); + else + __raw_writel(((1 << channel) - 1) << (10 - channel), + SSI1_SACCEN); + + sier |= SSI_SIER_TDMAE; + + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) { + __raw_writel(stccr, SSI1_STCCR); + __raw_writel(sier, SSI1_SIER); + } else { + __raw_writel(stccr, SSI2_STCCR); + __raw_writel(sier, SSI2_SIER); + } + + return 0; +} + +static int imx_ac97_hw_rx_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + struct imx_ssi *ssi_mode = (struct imx_ssi *)cpu_dai->private_data; + u32 channel = params_channels(params); + u32 srccr, sier; + + if (cpu_dai->id == IMX_DAI_AC97_1) { + srccr = __raw_readl(SSI1_SRCCR); + sier = __raw_readl(SSI1_SIER); + } else { + srccr = __raw_readl(SSI2_SRCCR); + sier = __raw_readl(SSI2_SIER); + } + srccr &= ~(SSI_SRCCR_WL_MASK | SSI_SRCCR_DC_MASK); + + /* DAI data (word) size */ + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + srccr |= SSI_SRCCR_WL(16) | SSI_SRCCR_DC(0x0C); + break; + case SNDRV_PCM_FORMAT_S20_3LE: + srccr |= SSI_SRCCR_WL(20) | SSI_SRCCR_DC(0x0C); + break; + } + + if (ssi_mode->ac97_tx_slots) + __raw_writel(ssi_mode->ac97_tx_slots, SSI1_SACCEN); + else + __raw_writel(((1 << channel) - 1) << (10 - channel), + SSI1_SACCEN); + + /* enable interrupts */ + sier |= SSI_SIER_RDMAE; + + if (cpu_dai->id == IMX_DAI_AC97_1) { + __raw_writel(srccr, SSI1_SRCCR); + __raw_writel(sier, SSI1_SIER); + } else { + __raw_writel(srccr, SSI2_SRCCR); + __raw_writel(sier, SSI2_SIER); + } + return 0; +} + +static int imx_ac97_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *cpu_dai) +{ + u32 rate = params_rate(params); + u32 sacnt; + + if (cpu_dai->id == IMX_DAI_AC97_1) + sacnt = __raw_readl(SSI1_SACNT); + else + sacnt = __raw_readl(SSI2_SACNT); + + switch (rate) { + case 8000: + sacnt |= SSI_SACNT_FV | SSI_SACNT_FRDIV(0x05); + break; + case 11050: + sacnt |= SSI_SACNT_FV | SSI_SACNT_FRDIV(0x03); + break; + case 16000: + sacnt |= SSI_SACNT_FV | SSI_SACNT_FRDIV(0x02); + break; + case 22050: + sacnt |= SSI_SACNT_FV | SSI_SACNT_FRDIV(0x01); + break; + case 44100: + case 48000: + sacnt |= SSI_SACNT_FV | SSI_SACNT_FRDIV(0x00); + break; + } + + if (cpu_dai->id == IMX_DAI_AC97_1) + __raw_writel(sacnt, SSI1_SACNT); + else + __raw_writel(sacnt, SSI2_SACNT); + + /* Tx/Rx config */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + return imx_ac97_hw_tx_params(substream, params, cpu_dai); + else + return imx_ac97_hw_rx_params(substream, params, cpu_dai); +} + +static int imx_ac97_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + u32 scr, i, reg; + + if (cpu_dai->id == IMX_DAI_AC97_1) + scr = __raw_readl(SSI1_SCR); + else + scr = __raw_readl(SSI2_SCR); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + for (i = 0; i < 12; i++) + __raw_writel(0x0, SSI1_STX0); + } else { + for (i = 0; i < 12; i++) + reg = __raw_readl(SSI1_SRX0); + } + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + imx_ac97_para.playback = 1; + else + imx_ac97_para.capture = 1; + scr |= SSI_SCR_TE | SSI_SCR_RE; + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + imx_ac97_para.playback = 0; + else + imx_ac97_para.capture = 0; + + if ((imx_ac97_para.playback == 0) + && (imx_ac97_para.capture == 0)) + scr &= ~(SSI_SCR_TE | SSI_SCR_RE); + break; + default: + return -EINVAL; + } + if (cpu_dai->id == IMX_DAI_SSI0 || cpu_dai->id == IMX_DAI_SSI1) + __raw_writel(scr, SSI1_SCR); + else + __raw_writel(scr, SSI2_SCR); + SSI_DUMP(); + return 0; +} + +#ifdef CONFIG_PM +static int imx_ac97_suspend(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /* do we need to disable any clocks? */ + + return 0; +} + +static int imx_ac97_resume(struct snd_soc_dai *dai) +{ + if (!dai->active) + return 0; + + /* do we need to enable any clocks? */ + + return 0; +} +#else +#define imx_ac97_suspend NULL +#define imx_ac97_resume NULL +#endif + +static irqreturn_t ssi1_irq(int irq, void *dev_id) +{ + u32 sier, sisr, reg; + sier = __raw_readl(SSI1_SIER); + sisr = __raw_readl(SSI1_SISR); + if ((sier & SSI_SIER_CMDDU_EN) && (sisr & SSI_SISR_CMDDU)) { + reg = __raw_readl(SSI1_SACADD); + reg = __raw_readl(SSI1_SACDAT); + complete(&ac97_completion); + } + return IRQ_HANDLED; +} + +static irqreturn_t ssi2_irq(int irq, void *dev_id) +{ + u32 sier, sisr, reg; + sier = __raw_readl(SSI1_SIER); + sisr = __raw_readl(SSI1_SISR); + if ((sier & SSI_SIER_CMDDU_EN) && (sisr & SSI_SISR_CMDDU)) { + reg = __raw_readl(SSI2_SACADD); + reg = __raw_readl(SSI2_SACDAT); + complete(&ac97_completion); + } + return IRQ_HANDLED; +} + +static int imx_ac97_probe(struct platform_device *pdev, struct snd_soc_dai *dai) +{ + + u32 stccr; + stccr = SSI_STCCR_WL(16) | SSI_STCCR_DC(0x0C); + + if (!strcmp(dai->name, "imx-ac97-1")) { + dai->id = IMX_DAI_AC97_1; + ssi1_clk = clk_get(NULL, "ssi_clk.0"); + clk_enable(ssi1_clk); + + __raw_writel(SSI_SCR_SSIEN, SSI1_SCR); + + __raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)), + SSI1_SFCSR); + + __raw_writel(stccr, SSI1_STCCR); + __raw_writel(stccr, SSI1_SRCCR); + __raw_writel(SSI_SACNT_AC97EN, SSI1_SACNT); + } else if (!strcmp(dai->name, "imx-ac97-2")) { + dai->id = IMX_DAI_AC97_2; + ssi2_clk = clk_get(NULL, "ssi_clk.1"); + clk_enable(ssi2_clk); + + __raw_writel(SSI_SCR_SSIEN, SSI2_SCR); + + __raw_writel((SSI_SFCSR_RFWM1(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_RFWM0(SSI_RXFIFO_WATERMARK) | + SSI_SFCSR_TFWM1(SSI_TXFIFO_WATERMARK) | + SSI_SFCSR_TFWM0(SSI_TXFIFO_WATERMARK)), + SSI2_SFCSR); + + __raw_writel(stccr, SSI2_STCCR); + __raw_writel(stccr, SSI2_SRCCR); + + __raw_writel(SSI_SACNT_AC97EN, SSI2_SACNT); + } else { + printk(KERN_ERR "%s: invalid device %s\n", __func__, dai->name); + return -ENODEV; + } + + if (!strcmp(dai->name, "imx-ac97-1")) { + if (request_irq(MXC_INT_SSI1, ssi1_irq, 0, "ssi1", dai)) { + printk(KERN_ERR + "%s: failure requesting irq %s\n", + __func__, "ssi1"); + return -EBUSY; + } + } + + if (!strcmp(dai->name, "imx-ac97-2")) { + if (request_irq(MXC_INT_SSI2, ssi2_irq, 0, "ssi2", dai)) { + printk(KERN_ERR + "%s: failure requesting irq %s\n", + __func__, "ssi2"); + return -EBUSY; + } + } + + return 0; +} + +static void imx_ac97_remove(struct platform_device *pdev, + struct snd_soc_dai *dai) +{ + if (!strcmp(dai->name, "imx-ac97-1")) + free_irq(MXC_INT_SSI1, dai); + + if (!strcmp(dai->name, "imx-ac97-2")) + free_irq(MXC_INT_SSI2, dai); +} + +#define IMX_AC97_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +#define IMX_AC97_FORMATS \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE) + +static struct snd_soc_dai_ops imx_ac97_dai_ops = { + .hw_params = imx_ac97_hw_params, + .trigger = imx_ac97_trigger, +}; + +struct snd_soc_dai imx_ac97_dai[] = { + { + .name = "imx-ac97-1", + .id = 0, + .ac97_control = 1, + .probe = imx_ac97_probe, + .remove = imx_ac97_remove, + .suspend = imx_ac97_suspend, + .resume = imx_ac97_resume, + .playback = { + .stream_name = "AC97 Playback", + .channels_min = 1, + .channels_max = 10, + .rates = IMX_AC97_RATES, + .formats = IMX_AC97_FORMATS, + }, + .capture = { + .stream_name = "AC97 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = IMX_AC97_RATES, + .formats = IMX_AC97_FORMATS, + }, + .ops = &imx_ac97_dai_ops, + .private_data = &imx_ac97_data[IMX_DAI_AC97_1], + }, + { + .name = "imx-ac97-2", + .id = 1, + .ac97_control = 1, + .probe = imx_ac97_probe, + .remove = imx_ac97_remove, + .suspend = imx_ac97_suspend, + .resume = imx_ac97_resume, + .playback = { + .stream_name = "AC97 Playback", + .channels_min = 1, + .channels_max = 10, + .rates = IMX_AC97_RATES, + .formats = IMX_AC97_FORMATS, + }, + .capture = { + .stream_name = "AC97 Capture", + .channels_min = 1, + .channels_max = 6, + .rates = IMX_AC97_RATES, + .formats = IMX_AC97_FORMATS, + }, + .ops = &imx_ac97_dai_ops, + .private_data = &imx_ac97_data[IMX_DAI_AC97_2], + }, +}; +EXPORT_SYMBOL_GPL(imx_ac97_dai); + +static int __init imx_ac97_init(void) +{ + return snd_soc_register_dais(imx_ac97_dai, ARRAY_SIZE(imx_ac97_dai)); +} + +static void __exit imx_ac97_exit(void) +{ + snd_soc_unregister_dais(imx_ac97_dai, ARRAY_SIZE(imx_ac97_dai)); +} + +module_init(imx_ac97_init); +module_exit(imx_ac97_exit); + +MODULE_DESCRIPTION("i.MX ASoC AC97 driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-3stack-wm8580.c +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-3stack-wm8580.c @@ -0,0 +1,439 @@ +/* + * imx-3stack-wm8580.c -- SoC 5.1 audio for imx_3stack + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "imx-pcm.h" +#include "imx-esai.h" +#include "../codecs/wm8580.h" + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +#include +#endif + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +static unsigned int asrc_rates[] = { + 0, + 8000, + 11025, + 16000, + 22050, + 32000, + 44100, + 48000, + 64000, + 88200, + 96000, + 176400, + 192000, +}; + +struct asrc_esai { + unsigned int cpu_dai_rates; + unsigned int codec_dai_rates; + enum asrc_pair_index asrc_index; + unsigned int output_sample_rate; +}; + +static struct asrc_esai asrc_esai_data; + +#endif + +struct imx_3stack_pcm_state { + int lr_clk_active; +}; + +extern void gpio_activate_esai_ports(void); +extern void gpio_deactivate_esai_ports(void); + +static struct imx_3stack_pcm_state clk_state; + +static int imx_3stack_startup(struct snd_pcm_substream *substream) +{ + clk_state.lr_clk_active++; +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (asrc_esai_data.output_sample_rate >= 32000) { + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + asrc_esai_data.cpu_dai_rates = cpu_dai->playback.rates; + asrc_esai_data.codec_dai_rates = codec_dai->playback.rates; + cpu_dai->playback.rates = + SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT; + codec_dai->playback.rates = + SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT; + } +#endif + + return 0; +} + +static void imx_3stack_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (asrc_esai_data.output_sample_rate >= 32000) { + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + codec_dai->playback.rates = asrc_esai_data.codec_dai_rates; + cpu_dai->playback.rates = asrc_esai_data.cpu_dai_rates; + asrc_release_pair(asrc_esai_data.asrc_index); + } +#endif + + /* disable the PLL if there are no active Tx or Rx channels */ + if (!codec_dai->active) + snd_soc_dai_set_pll(codec_dai, 0, 0, 0); + clk_state.lr_clk_active--; +} + +static int imx_3stack_surround_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai_link *pcm_link = rtd->dai; + struct snd_soc_dai *cpu_dai = pcm_link->cpu_dai; + struct snd_soc_dai *codec_dai = pcm_link->codec_dai; + unsigned int rate = params_rate(params); + u32 dai_format; + unsigned int pll_out = 0, lrclk_ratio = 0; + unsigned int channel = params_channels(params); + struct imx_esai *esai_mode = (struct imx_esai *)cpu_dai->private_data; + + if (clk_state.lr_clk_active > 1) + return 0; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + if (asrc_esai_data.output_sample_rate >= 32000) { + unsigned int asrc_input_rate = rate; + struct mxc_runtime_data *pcm_data = + substream->runtime->private_data; + struct asrc_config config; + int retVal = 0;; + + retVal = asrc_req_pair(channel, &asrc_esai_data.asrc_index); + if (retVal < 0) { + pr_err("Fail to request asrc pair\n"); + return -1; + } + + config.pair = asrc_esai_data.asrc_index; + config.channel_num = channel; + config.input_sample_rate = asrc_input_rate; + config.output_sample_rate = asrc_esai_data.output_sample_rate; + config.inclk = INCLK_NONE; + config.word_width = 32; + config.outclk = OUTCLK_ESAI_TX; + retVal = asrc_config_pair(&config); + if (retVal < 0) { + pr_err("Fail to config asrc\n"); + asrc_release_pair(asrc_esai_data.asrc_index); + return retVal; + } + rate = asrc_esai_data.output_sample_rate; + pcm_data->asrc_index = asrc_esai_data.asrc_index; + pcm_data->asrc_enable = 1; + } +#endif + + switch (rate) { + case 8000: + lrclk_ratio = 5; + pll_out = 6144000; + break; + case 11025: + lrclk_ratio = 4; + pll_out = 5644800; + break; + case 16000: + lrclk_ratio = 3; + pll_out = 6144000; + break; + case 32000: + lrclk_ratio = 3; + pll_out = 12288000; + break; + case 48000: + lrclk_ratio = 2; + pll_out = 12288000; + break; + case 64000: + lrclk_ratio = 1; + pll_out = 12288000; + break; + case 96000: + lrclk_ratio = 2; + pll_out = 24576000; + break; + case 128000: + lrclk_ratio = 1; + pll_out = 24576000; + break; + case 22050: + lrclk_ratio = 4; + pll_out = 11289600; + break; + case 44100: + lrclk_ratio = 2; + pll_out = 11289600; + break; + case 88200: + lrclk_ratio = 0; + pll_out = 11289600; + break; + case 176400: + lrclk_ratio = 0; + pll_out = 22579200; + break; + case 192000: + lrclk_ratio = 0; + pll_out = 24576000; + break; + default: + pr_info("Rate not support.\n"); + return -EINVAL;; + } + + dai_format = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; + + esai_mode->sync_mode = 0; + esai_mode->network_mode = 1; + + /* set codec DAI configuration */ + snd_soc_dai_set_fmt(codec_dai, dai_format); + + /* set cpu DAI configuration */ + snd_soc_dai_set_fmt(cpu_dai, dai_format); + + /* set i.MX active slot mask */ + snd_soc_dai_set_tdm_slot(cpu_dai, channel == 1 ? 0x1 : 0x3, 2); + + /* set the ESAI system clock as input (unused) */ + snd_soc_dai_set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_IN); + + snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK, WM8580_CLKSRC_PLLA); + snd_soc_dai_set_clkdiv(codec_dai, WM8580_DAC_CLKSEL, + WM8580_CLKSRC_PLLA); + + /* set codec LRCLK and BCLK */ + snd_soc_dai_set_sysclk(codec_dai, WM8580_BCLK_CLKDIV, 0, + SND_SOC_CLOCK_OUT); + snd_soc_dai_set_sysclk(codec_dai, WM8580_LRCLK_CLKDIV, lrclk_ratio, + SND_SOC_CLOCK_OUT); + + snd_soc_dai_set_pll(codec_dai, 1, 12000000, pll_out); + return 0; +} + +static struct snd_soc_ops imx_3stack_surround_ops = { + .startup = imx_3stack_startup, + .shutdown = imx_3stack_shutdown, + .hw_params = imx_3stack_surround_hw_params, +}; + +static const struct snd_soc_dapm_widget imx_3stack_dapm_widgets[] = { + SND_SOC_DAPM_LINE("Line Out Jack", NULL), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + /* Line out jack */ + {"Line Out Jack", NULL, "VOUT1L"}, + {"Line Out Jack", NULL, "VOUT1R"}, + {"Line Out Jack", NULL, "VOUT2L"}, + {"Line Out Jack", NULL, "VOUT2R"}, + {"Line Out Jack", NULL, "VOUT3L"}, + {"Line Out Jack", NULL, "VOUT3R"}, +}; + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) +static int asrc_func; + +static const char *asrc_function[] = + { "disable", "32KHz", "44.1KHz", + "48KHz", "64KHz", "88.2KHz", "96KHz", "176.4KHz", "192KHz" +}; + +static const struct soc_enum asrc_enum[] = { + SOC_ENUM_SINGLE_EXT(9, asrc_function), +}; + +static int asrc_get_rate(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.enumerated.item[0] = asrc_func; + return 0; +} + +static int asrc_set_rate(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + if (asrc_func == ucontrol->value.enumerated.item[0]) + return 0; + + asrc_func = ucontrol->value.enumerated.item[0]; + asrc_esai_data.output_sample_rate = asrc_rates[asrc_func + 4]; + + return 1; +} + +static const struct snd_kcontrol_new asrc_controls[] = { + SOC_ENUM_EXT("ASRC", asrc_enum[0], asrc_get_rate, + asrc_set_rate), +}; + +#endif + +static int imx_3stack_wm8580_init(struct snd_soc_codec *codec) +{ + +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + int i; + int ret; + for (i = 0; i < ARRAY_SIZE(asrc_controls); i++) { + ret = snd_ctl_add(codec->card, + snd_soc_cnew(&asrc_controls[i], codec, NULL)); + if (ret < 0) + return ret; + } + asrc_esai_data.output_sample_rate = asrc_rates[asrc_func + 4]; +#endif + + snd_soc_dapm_new_controls(codec, imx_3stack_dapm_widgets, + ARRAY_SIZE(imx_3stack_dapm_widgets)); + + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_sync(codec); + + return 0; +} + +static struct snd_soc_dai_link imx_3stack_dai = { + .name = "wm8580", + .stream_name = "wm8580", + .codec_dai = wm8580_dai, + .init = imx_3stack_wm8580_init, + .ops = &imx_3stack_surround_ops, +}; + +static int imx_3stack_card_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + kfree(socdev->codec_data); + return 0; +} + +static struct snd_soc_card snd_soc_card_imx_3stack = { + .name = "imx-3stack", + .platform = &imx_soc_platform, + .dai_link = &imx_3stack_dai, + .num_links = 1, + .remove = imx_3stack_card_remove, +}; + +static struct snd_soc_device imx_3stack_snd_devdata = { + .card = &snd_soc_card_imx_3stack, + .codec_dev = &soc_codec_dev_wm8580, +}; + +/* + * This function will register the snd_soc_pcm_link drivers. + */ +static int __devinit imx_3stack_wm8580_probe(struct platform_device *pdev) +{ + struct wm8580_setup_data *setup; + + imx_3stack_dai.cpu_dai = &imx_esai_dai[2]; + + setup = kzalloc(sizeof(struct wm8580_setup_data), GFP_KERNEL); + setup->spi = 1; + imx_3stack_snd_devdata.codec_data = setup; + + /* Configure audio port 3 */ + gpio_activate_esai_ports(); + + return 0; +} + +static int __devexit imx_3stack_wm8580_remove(struct platform_device *pdev) +{ + gpio_deactivate_esai_ports(); + return 0; +} + +static struct platform_driver imx_3stack_wm8580_driver = { + .probe = imx_3stack_wm8580_probe, + .remove = __devexit_p(imx_3stack_wm8580_remove), + .driver = { + .name = "imx-3stack-wm8580", + .owner = THIS_MODULE, + }, +}; + +static struct platform_device *imx_3stack_snd_device; + +static int __init imx_3stack_asoc_init(void) +{ + int ret; + + ret = platform_driver_register(&imx_3stack_wm8580_driver); + if (ret < 0) + goto exit; + imx_3stack_snd_device = platform_device_alloc("soc-audio", 1); + if (!imx_3stack_snd_device) + goto err_device_alloc; + platform_set_drvdata(imx_3stack_snd_device, &imx_3stack_snd_devdata); + imx_3stack_snd_devdata.dev = &imx_3stack_snd_device->dev; + ret = platform_device_add(imx_3stack_snd_device); + if (0 == ret) + goto exit; + + platform_device_put(imx_3stack_snd_device); + err_device_alloc: + platform_driver_unregister(&imx_3stack_wm8580_driver); + exit: + return ret; +} + +static void __exit imx_3stack_asoc_exit(void) +{ + platform_driver_unregister(&imx_3stack_wm8580_driver); + platform_device_unregister(imx_3stack_snd_device); +} + +module_init(imx_3stack_asoc_init); +module_exit(imx_3stack_asoc_exit); + +/* Module information */ +MODULE_DESCRIPTION("ALSA SoC wm8580 imx_3stack"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-ssi.h +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-ssi.h @@ -0,0 +1,236 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _IMX_SSI_H +#define _IMX_SSI_H + +#include + +/* SSI regs definition */ +#define SSI1_IO_BASE_ADDR IO_ADDRESS(SSI1_BASE_ADDR) +#define SSI2_IO_BASE_ADDR IO_ADDRESS(SSI2_BASE_ADDR) + +#define SSI1_STX0 ((SSI1_IO_BASE_ADDR) + 0x00) +#define SSI1_STX1 ((SSI1_IO_BASE_ADDR) + 0x04) +#define SSI1_SRX0 ((SSI1_IO_BASE_ADDR) + 0x08) +#define SSI1_SRX1 ((SSI1_IO_BASE_ADDR) + 0x0c) +#define SSI1_SCR ((SSI1_IO_BASE_ADDR) + 0x10) +#define SSI1_SISR ((SSI1_IO_BASE_ADDR) + 0x14) +#define SSI1_SIER ((SSI1_IO_BASE_ADDR) + 0x18) +#define SSI1_STCR ((SSI1_IO_BASE_ADDR) + 0x1c) +#define SSI1_SRCR ((SSI1_IO_BASE_ADDR) + 0x20) +#define SSI1_STCCR ((SSI1_IO_BASE_ADDR) + 0x24) +#define SSI1_SRCCR ((SSI1_IO_BASE_ADDR) + 0x28) +#define SSI1_SFCSR ((SSI1_IO_BASE_ADDR) + 0x2c) +#define SSI1_STR ((SSI1_IO_BASE_ADDR) + 0x30) +#define SSI1_SOR ((SSI1_IO_BASE_ADDR) + 0x34) +#define SSI1_SACNT ((SSI1_IO_BASE_ADDR) + 0x38) +#define SSI1_SACADD ((SSI1_IO_BASE_ADDR) + 0x3c) +#define SSI1_SACDAT ((SSI1_IO_BASE_ADDR) + 0x40) +#define SSI1_SATAG ((SSI1_IO_BASE_ADDR) + 0x44) +#define SSI1_STMSK ((SSI1_IO_BASE_ADDR) + 0x48) +#define SSI1_SRMSK ((SSI1_IO_BASE_ADDR) + 0x4c) +#define SSI1_SACCST ((SSI1_IO_BASE_ADDR) + 0x50) +#define SSI1_SACCEN ((SSI1_IO_BASE_ADDR) + 0x54) +#define SSI1_SACCDIS ((SSI1_IO_BASE_ADDR) + 0x58) + +#define SSI2_STX0 ((SSI2_IO_BASE_ADDR) + 0x00) +#define SSI2_STX1 ((SSI2_IO_BASE_ADDR) + 0x04) +#define SSI2_SRX0 ((SSI2_IO_BASE_ADDR) + 0x08) +#define SSI2_SRX1 ((SSI2_IO_BASE_ADDR) + 0x0c) +#define SSI2_SCR ((SSI2_IO_BASE_ADDR) + 0x10) +#define SSI2_SISR ((SSI2_IO_BASE_ADDR) + 0x14) +#define SSI2_SIER ((SSI2_IO_BASE_ADDR) + 0x18) +#define SSI2_STCR ((SSI2_IO_BASE_ADDR) + 0x1c) +#define SSI2_SRCR ((SSI2_IO_BASE_ADDR) + 0x20) +#define SSI2_STCCR ((SSI2_IO_BASE_ADDR) + 0x24) +#define SSI2_SRCCR ((SSI2_IO_BASE_ADDR) + 0x28) +#define SSI2_SFCSR ((SSI2_IO_BASE_ADDR) + 0x2c) +#define SSI2_STR ((SSI2_IO_BASE_ADDR) + 0x30) +#define SSI2_SOR ((SSI2_IO_BASE_ADDR) + 0x34) +#define SSI2_SACNT ((SSI2_IO_BASE_ADDR) + 0x38) +#define SSI2_SACADD ((SSI2_IO_BASE_ADDR) + 0x3c) +#define SSI2_SACDAT ((SSI2_IO_BASE_ADDR) + 0x40) +#define SSI2_SATAG ((SSI2_IO_BASE_ADDR) + 0x44) +#define SSI2_STMSK ((SSI2_IO_BASE_ADDR) + 0x48) +#define SSI2_SRMSK ((SSI2_IO_BASE_ADDR) + 0x4c) +#define SSI2_SACCST ((SSI2_IO_BASE_ADDR) + 0x50) +#define SSI2_SACCEN ((SSI2_IO_BASE_ADDR) + 0x54) +#define SSI2_SACCDIS ((SSI2_IO_BASE_ADDR) + 0x58) + +#define SSI_SCR_CLK_IST (1 << 9) +#define SSI_SCR_TCH_EN (1 << 8) +#define SSI_SCR_SYS_CLK_EN (1 << 7) +#define SSI_SCR_I2S_MODE_NORM (0 << 5) +#define SSI_SCR_I2S_MODE_MSTR (1 << 5) +#define SSI_SCR_I2S_MODE_SLAVE (2 << 5) +#define SSI_SCR_SYN (1 << 4) +#define SSI_SCR_NET (1 << 3) +#define SSI_SCR_RE (1 << 2) +#define SSI_SCR_TE (1 << 1) +#define SSI_SCR_SSIEN (1 << 0) +#define SSI_SCR_I2S_MODE_MASK (3 << 5) + +#define SSI_SISR_CMDAU (1 << 18) +#define SSI_SISR_CMDDU (1 << 17) +#define SSI_SISR_RXT (1 << 16) +#define SSI_SISR_RDR1 (1 << 15) +#define SSI_SISR_RDR0 (1 << 14) +#define SSI_SISR_TDE1 (1 << 13) +#define SSI_SISR_TDE0 (1 << 12) +#define SSI_SISR_ROE1 (1 << 11) +#define SSI_SISR_ROE0 (1 << 10) +#define SSI_SISR_TUE1 (1 << 9) +#define SSI_SISR_TUE0 (1 << 8) +#define SSI_SISR_TFS (1 << 7) +#define SSI_SISR_RFS (1 << 6) +#define SSI_SISR_TLS (1 << 5) +#define SSI_SISR_RLS (1 << 4) +#define SSI_SISR_RFF1 (1 << 3) +#define SSI_SISR_RFF0 (1 << 2) +#define SSI_SISR_TFE1 (1 << 1) +#define SSI_SISR_TFE0 (1 << 0) + +#define SSI_SIER_RDMAE (1 << 22) +#define SSI_SIER_RIE (1 << 21) +#define SSI_SIER_TDMAE (1 << 20) +#define SSI_SIER_TIE (1 << 19) +#define SSI_SIER_CMDAU_EN (1 << 18) +#define SSI_SIER_CMDDU_EN (1 << 17) +#define SSI_SIER_RXT_EN (1 << 16) +#define SSI_SIER_RDR1_EN (1 << 15) +#define SSI_SIER_RDR0_EN (1 << 14) +#define SSI_SIER_TDE1_EN (1 << 13) +#define SSI_SIER_TDE0_EN (1 << 12) +#define SSI_SIER_ROE1_EN (1 << 11) +#define SSI_SIER_ROE0_EN (1 << 10) +#define SSI_SIER_TUE1_EN (1 << 9) +#define SSI_SIER_TUE0_EN (1 << 8) +#define SSI_SIER_TFS_EN (1 << 7) +#define SSI_SIER_RFS_EN (1 << 6) +#define SSI_SIER_TLS_EN (1 << 5) +#define SSI_SIER_RLS_EN (1 << 4) +#define SSI_SIER_RFF1_EN (1 << 3) +#define SSI_SIER_RFF0_EN (1 << 2) +#define SSI_SIER_TFE1_EN (1 << 1) +#define SSI_SIER_TFE0_EN (1 << 0) + +#define SSI_STCR_TXBIT0 (1 << 9) +#define SSI_STCR_TFEN1 (1 << 8) +#define SSI_STCR_TFEN0 (1 << 7) +#define SSI_STCR_TFDIR (1 << 6) +#define SSI_STCR_TXDIR (1 << 5) +#define SSI_STCR_TSHFD (1 << 4) +#define SSI_STCR_TSCKP (1 << 3) +#define SSI_STCR_TFSI (1 << 2) +#define SSI_STCR_TFSL (1 << 1) +#define SSI_STCR_TEFS (1 << 0) + +#define SSI_SRCR_RXBIT0 (1 << 9) +#define SSI_SRCR_RFEN1 (1 << 8) +#define SSI_SRCR_RFEN0 (1 << 7) +#define SSI_SRCR_RFDIR (1 << 6) +#define SSI_SRCR_RXDIR (1 << 5) +#define SSI_SRCR_RSHFD (1 << 4) +#define SSI_SRCR_RSCKP (1 << 3) +#define SSI_SRCR_RFSI (1 << 2) +#define SSI_SRCR_RFSL (1 << 1) +#define SSI_SRCR_REFS (1 << 0) + +#define SSI_STCCR_DIV2 (1 << 18) +#define SSI_STCCR_PSR (1 << 15) +#define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_STCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_STCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_STCCR_WL_MASK (0xf << 13) +#define SSI_STCCR_DC_MASK (0x1f << 8) +#define SSI_STCCR_PM_MASK (0xff << 0) + +#define SSI_SRCCR_DIV2 (1 << 18) +#define SSI_SRCCR_PSR (1 << 15) +#define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) +#define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) +#define SSI_SRCCR_PM(x) (((x) & 0xff) << 0) +#define SSI_SRCCR_WL_MASK (0xf << 13) +#define SSI_SRCCR_DC_MASK (0x1f << 8) +#define SSI_SRCCR_PM_MASK (0xff << 0) + + +#define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28) +#define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24) +#define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20) +#define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16) +#define SSI_SFCSR_RFCNT0(x) (((x) & 0xf) << 12) +#define SSI_SFCSR_TFCNT0(x) (((x) & 0xf) << 8) +#define SSI_SFCSR_RFWM0(x) (((x) & 0xf) << 4) +#define SSI_SFCSR_TFWM0(x) (((x) & 0xf) << 0) + +#define SSI_STR_TEST (1 << 15) +#define SSI_STR_RCK2TCK (1 << 14) +#define SSI_STR_RFS2TFS (1 << 13) +#define SSI_STR_RXSTATE(x) (((x) & 0xf) << 8) +#define SSI_STR_TXD2RXD (1 << 7) +#define SSI_STR_TCK2RCK (1 << 6) +#define SSI_STR_TFS2RFS (1 << 5) +#define SSI_STR_TXSTATE(x) (((x) & 0xf) << 0) + +#define SSI_SOR_CLKOFF (1 << 6) +#define SSI_SOR_RX_CLR (1 << 5) +#define SSI_SOR_TX_CLR (1 << 4) +#define SSI_SOR_INIT (1 << 3) +#define SSI_SOR_WAIT(x) (((x) & 0x3) << 1) +#define SSI_SOR_SYNRST (1 << 0) + +#define SSI_SACNT_FRDIV(x) (((x) & 0x3f) << 5) +#define SSI_SACNT_WR (1 << 4) +#define SSI_SACNT_RD (1 << 3) +#define SSI_SACNT_TIF (1 << 2) +#define SSI_SACNT_FV (1 << 1) +#define SSI_SACNT_AC97EN (1 << 0) + +/* SDMA & SSI watermarks for FIFO's */ +#define SDMA_TXFIFO_WATERMARK 0x4 +#define SDMA_RXFIFO_WATERMARK 0x6 +#define SSI_TXFIFO_WATERMARK 0x4 +#define SSI_RXFIFO_WATERMARK 0x6 + +/* i.MX DAI SSP ID's */ +#define IMX_DAI_SSI0 0 /* SSI1 FIFO 0 */ +#define IMX_DAI_SSI1 1 /* SSI1 FIFO 1 */ +#define IMX_DAI_SSI2 2 /* SSI2 FIFO 0 */ +#define IMX_DAI_SSI3 3 /* SSI2 FIFO 1 */ + +/* SSI clock sources */ +#define IMX_SSP_SYS_CLK 0 + +/* SSI audio dividers */ +#define IMX_SSI_TX_DIV_2 0 +#define IMX_SSI_TX_DIV_PSR 1 +#define IMX_SSI_TX_DIV_PM 2 +#define IMX_SSI_RX_DIV_2 3 +#define IMX_SSI_RX_DIV_PSR 4 +#define IMX_SSI_RX_DIV_PM 5 + + +/* SSI Div 2 */ +#define IMX_SSI_DIV_2_OFF (~SSI_STCCR_DIV2) +#define IMX_SSI_DIV_2_ON SSI_STCCR_DIV2 + +#define IMX_DAI_AC97_1 0 +#define IMX_DAI_AC97_2 1 + +/* private info */ +struct imx_ssi { + bool network_mode; + bool sync_mode; + unsigned int ac97_tx_slots; + unsigned int ac97_rx_slots; +}; + +extern struct snd_soc_dai imx_ssi_dai[]; +extern struct snd_soc_dai imx_ac97_dai[]; + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/imx/imx-pcm.h +++ linux-fsl-imx51-2.6.31/sound/soc/imx/imx-pcm.h @@ -0,0 +1,83 @@ +/* + * imx-pcm.h :- ASoC platform header for Freescale i.MX + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Copyright 2006, 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _MXC_PCM_H +#define _MXC_PCM_H + +#include + +/* AUDMUX regs definition */ +#define AUDMUX_IO_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR) + +#define DAM_PTCR1 ((AUDMUX_IO_BASE_ADDR) + 0x00) +#define DAM_PDCR1 ((AUDMUX_IO_BASE_ADDR) + 0x04) +#define DAM_PTCR2 ((AUDMUX_IO_BASE_ADDR) + 0x08) +#define DAM_PDCR2 ((AUDMUX_IO_BASE_ADDR) + 0x0C) +#define DAM_PTCR3 ((AUDMUX_IO_BASE_ADDR) + 0x10) +#define DAM_PDCR3 ((AUDMUX_IO_BASE_ADDR) + 0x14) +#define DAM_PTCR4 ((AUDMUX_IO_BASE_ADDR) + 0x18) +#define DAM_PDCR4 ((AUDMUX_IO_BASE_ADDR) + 0x1C) +#define DAM_PTCR5 ((AUDMUX_IO_BASE_ADDR) + 0x20) +#define DAM_PDCR5 ((AUDMUX_IO_BASE_ADDR) + 0x24) +#define DAM_PTCR6 ((AUDMUX_IO_BASE_ADDR) + 0x28) +#define DAM_PDCR6 ((AUDMUX_IO_BASE_ADDR) + 0x2C) +#define DAM_PTCR7 ((AUDMUX_IO_BASE_ADDR) + 0x30) +#define DAM_PDCR7 ((AUDMUX_IO_BASE_ADDR) + 0x34) +#define DAM_CNMCR ((AUDMUX_IO_BASE_ADDR) + 0x38) +#define DAM_PTCR(a) ((AUDMUX_IO_BASE_ADDR) + (a-1)*8) +#define DAM_PDCR(a) ((AUDMUX_IO_BASE_ADDR) + 4 + (a-1)*8) + +#define AUDMUX_PTCR_TFSDIR (1 << 31) +#define AUDMUX_PTCR_TFSSEL(x, y) \ + ((x << 30) | (((y - 1) & 0x7) << 27)) +#define AUDMUX_PTCR_TCLKDIR (1 << 26) +#define AUDMUX_PTCR_TCSEL(x, y) \ + ((x << 25) | (((y - 1) & 0x7) << 22)) +#define AUDMUX_PTCR_RFSDIR (1 << 21) +#define AUDMUX_PTCR_RFSSEL(x, y) \ + ((x << 20) | (((y - 1) & 0x7) << 17)) +#define AUDMUX_PTCR_RCLKDIR (1 << 16) +#define AUDMUX_PTCR_RCSEL(x, y) \ + ((x << 15) | (((y - 1) & 0x7) << 12)) +#define AUDMUX_PTCR_SYN (1 << 11) + +#define AUDMUX_FROM_TXFS 0 +#define AUDMUX_FROM_RXFS 1 + +#define AUDMUX_PDCR_RXDSEL(x) (((x - 1) & 0x7) << 13) +#define AUDMUX_PDCR_TXDXEN (1 << 12) +#define AUDMUX_PDCR_MODE(x) (((x) & 0x3) << 8) +#define AUDMUX_PDCR_INNMASK(x) (((x) & 0xff) << 0) + +#define AUDMUX_CNMCR_CEN (1 << 18) +#define AUDMUX_CNMCR_FSPOL (1 << 17) +#define AUDMUX_CNMCR_CLKPOL (1 << 16) +#define AUDMUX_CNMCR_CNTHI(x) (((x) & 0xff) << 8) +#define AUDMUX_CNMCR_CNTLOW(x) (((x) & 0xff) << 0) + + +struct mxc_runtime_data { + int dma_ch; + spinlock_t dma_lock; + int active, period, periods; + int dma_wchannel; + int dma_active; + int dma_alloc; +#if defined(CONFIG_MXC_ASRC) || defined(CONFIG_MXC_ASRC_MODULE) + int dma_asrc; + int asrc_index; + int asrc_enable; +#endif +}; + +extern struct snd_soc_platform imx_soc_platform; + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/bluetooth.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/bluetooth.c @@ -0,0 +1,161 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file bluetooth.c + * @brief Driver for bluetooth PCM interface + * + * @ingroup Sound + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BLUETOOTH_RATES SNDRV_PCM_RATE_8000 + +#define BLUETOOTH_FORMATS SNDRV_PCM_FMTBIT_S16_LE + +struct snd_soc_dai bt_dai = { + .name = "bluetooth", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = BLUETOOTH_RATES, + .formats = BLUETOOTH_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = BLUETOOTH_RATES, + .formats = BLUETOOTH_FORMATS, + }, +}; +EXPORT_SYMBOL_GPL(bt_dai); + +static int bt_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->card->codec; + int ret = 0; + + codec->name = "bluetooth"; + codec->owner = THIS_MODULE; + codec->dai = &bt_dai; + codec->num_dai = 1; + + snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + pr_err("failed to create bluetooth pcms\n"); + return ret; + } + + ret = snd_soc_init_card(socdev); + strcpy(codec->card->id, "bluetooth"); + + if (ret < 0) { + pr_err("bluetooth: failed to register card\n"); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + return ret; + } + return 0; +} + +static struct snd_soc_device *bt_socdev; + +static int bt_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + int ret = 0; + + codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); + if (codec == NULL) + return -ENOMEM; + + socdev->card->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + bt_socdev = socdev; + + ret = bt_init(socdev); + if (ret < 0) { + pr_err("Bluetooth codec initialisation failed\n"); + kfree(codec); + } + + return ret; +} + +/* power down chip */ +static int bt_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + kfree(codec); + + return 0; +} + +static int bt_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int bt_resume(struct platform_device *pdev) +{ + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_bt = { + .probe = bt_probe, + .remove = bt_remove, + .suspend = bt_suspend, + .resume = bt_resume, +}; +EXPORT_SYMBOL_GPL(soc_codec_dev_bt); + +static int __init bluetooth_modinit(void) +{ + return snd_soc_register_dai(&bt_dai); +} + +module_init(bluetooth_modinit); + +static void __exit bluetooth_exit(void) +{ + snd_soc_unregister_dai(&bt_dai); +} + +module_exit(bluetooth_exit); + +MODULE_DESCRIPTION("ASoC bluetooth codec driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/ak4647.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/ak4647.h @@ -0,0 +1,92 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ak4647.h + * @brief Driver for AK4647 + * + * @ingroup Sound + */ +#ifndef _AK4647_H_ +#define _AK4647_H_ + +#ifdef __KERNEL__ + +/*! + * AK4647 registers + */ + +#define AK4647_PM1 0x00 +#define AK4647_PM2 0x01 +#define AK4647_SIG1 0x02 +#define AK4647_SIG2 0x03 +#define AK4647_MODE1 0x04 +#define AK4647_MODE2 0x05 +#define AK4647_TIMER 0x06 +#define AK4647_ALC1 0x07 +#define AK4647_ALC2 0x08 + +#define AK4647_LEFT_INPUT_VOLUME 0x09 +#define AK4647_LEFT_DGT_VOLUME 0x0A +#define AK4647_ALC3 0x0B +#define AK4647_RIGHT_INPUT_VOLUME 0x0C +#define AK4647_RIGHT_DGT_VOLUME 0x0D +#define AK4647_MODE3 0x0E +#define AK4647_MODE4 0x0F +#define AK4647_PM3 0x10 +#define AK4647_DGT_FIL_SEL 0x11 + +/* filter 3 coeffecient*/ + +#define AK4647_FIL3_COEF0 0x12 +#define AK4647_FIL3_COEF1 0x13 +#define AK4647_FIL3_COEF2 0x14 +#define AK4647_FIL3_COEF3 0x15 + +/* eq coeffecient*/ + +#define AK4647_EQ_COEF0 0x16 +#define AK4647_EQ_COEF1 0x17 +#define AK4647_EQ_COEF2 0x18 +#define AK4647_EQ_COEF3 0x19 +#define AK4647_EQ_COEF4 0x1A +#define AK4647_EQ_COEF5 0x1B + +/* filter 3 coeffecient*/ + +#define AK4647_FIL1_COEF0 0x1C +#define AK4647_FIL1_COEF1 0x1D +#define AK4647_FIL1_COEF2 0x1E +#define AK4647_FIL1_COEF3 0x1F + +#define AK4647_REG_START 0x00 +#define AK4647_REG_END 0x1F +#define AK4647_REG_NUMBER 0x20 + +/* clock divider id's */ +#define AK4647_BCLK_CLKDIV 0 +#define AK4647_MCLK_CLKDIV 1 + +/* bit clock div values (AK4647_BCLK_CLKDIV)*/ +#define AK4647_BCLK_DIV_32 0 +#define AK4647_BCLK_DIV_64 1 + +/* m clock div values (AK4647_MCLK_CLKDIV)*/ +#define AK4647_MCLK_DIV_32 0 +#define AK4647_MCLK_DIV_64 1 +#define AK4647_MCLK_DIV_128 2 +#define AK4647_MCLK_DIV_256 3 + +#endif /* __KERNEL__ */ + +#endif /* _AK4647_H_ */ --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/tlv320aic23.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/tlv320aic23.c @@ -625,11 +625,10 @@ { struct snd_soc_device *socdev = platform_get_drvdata(pdev); struct snd_soc_codec *codec = socdev->card->codec; - int i; u16 reg; /* Sync reg_cache with the hardware */ - for (reg = 0; reg < ARRAY_SIZE(tlv320aic23_reg); i++) { + for (reg = 0; reg < TLV320AIC23_RESET; reg++) { u16 val = tlv320aic23_read_reg_cache(codec, reg); tlv320aic23_write(codec, reg, val); } --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/Kconfig +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/Kconfig @@ -74,6 +74,10 @@ config SND_SOC_AK4535 tristate +config SND_SOC_AK5702 + tristate + depends on I2C + # Cirrus Logic CS4270 Codec config SND_SOC_CS4270 tristate @@ -176,3 +180,23 @@ config SND_SOC_WM9713 tristate + +config SND_SOC_SGTL5000 + tristate + depends on I2C + +config SND_SOC_AK4647 + tristate + depends on I2C + +config SND_SOC_STMP378X_CODEC + tristate + depends on SND_SOC + +config SND_SOC_STMP3XXX_SPDIF + tristate + depends on SND_SOC + +config SND_SOC_BLUETOOTH + tristate + depends on SND_SOC --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/wm8580.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/wm8580.h @@ -28,6 +28,15 @@ #define WM8580_CLKSRC_OSC 4 #define WM8580_CLKSRC_NONE 5 +/*clock divider id's */ +#define WM8580_BCLK_CLKDIV 0 +#define WM8580_LRCLK_CLKDIV 1 + +struct wm8580_setup_data { + unsigned short spi; + unsigned short i2c_address; +}; + #define WM8580_DAI_PAIFRX 0 #define WM8580_DAI_PAIFTX 1 --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/ak4647.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/ak4647.c @@ -0,0 +1,799 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ak4647.c + * @brief Driver for AK4647 + * + * @ingroup Sound + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "ak4647.h" + +#define SET_BIT_IN_BYTE(byte, pos) (byte |= (0x01 << pos)) +#define CLEAR_BIT_IN_BYTE(byte, pos) (byte &= ~(0x01 << pos)) + +static struct i2c_client *ak4647_i2c_client; + +int ak4647_read_reg(unsigned int reg, u8 *value) +{ + s32 retval; + retval = i2c_smbus_read_byte_data(ak4647_i2c_client, reg); + if (retval < 0) { + pr_err("%s:read reg errorr:reg=%x,val=%x\n", + __func__, reg, retval); + return -1; + } else { + *value = (u8) retval; + return 0; + } +} + +int ak4647_write_reg(unsigned int reg, u8 value) +{ + if (i2c_smbus_write_byte_data(ak4647_i2c_client, reg, value) < 0) { + pr_err("%s:write reg errorr:reg=%x,val=%x\n", + __func__, reg, value); + return -1; + } + return 0; +} + +static unsigned int ak4647_codec_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + u8 value; + ak4647_read_reg(reg, &value); + return value; +} + +static int ak4647_codec_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + return ak4647_write_reg(reg, value); +} + +#define DEBUG_AK4647 0 + +#if DEBUG_AK4647 + +static char *ak4647_reg_names[] = { + "AK4647_PM1", + "AK4647_PM2", + "AK4647_SIG1", + "AK4647_SIG2", + "AK4647_MODE1", + "AK4647_MODE2", + "AK4647_TIMER", + "AK4647_ALC1", + "AK4647_ALC2", + "AK4647_LEFT_INPUT_VOLUME", + "AK4647_LEFT_DGT_VOLUME", + "AK4647_ALC3", + "AK4647_RIGHT_INPUT_VOLUME", + "AK4647_RIGHT_DGT_VOLUME", + "AK4647_MODE3", + "AK4647_MODE4", + "AK4647_PM3", + "AK4647_DGT_FIL_SEL", + "AK4647_FIL3_COEF0", + "AK4647_FIL3_COEF1", + "AK4647_FIL3_COEF2", + "AK4647_FIL3_COEF3", + "AK4647_EQ_COEF0", + "AK4647_EQ_COEF1", + "AK4647_EQ_COEF2", + "AK4647_EQ_COEF3", + "AK4647_EQ_COEF4", + "AK4647_EQ_COEF5", + "AK4647_FIL1_COEF0", + "AK4647_FIL1_COEF1", + "AK4647_FIL1_COEF2", + "AK4647_FIL1_COEF3", +}; + +static void dump_all_regs(void) +{ + int i; + u8 value; + + for (i = AK4647_REG_START; i < AK4647_REG_NUMBER; i++) { + ak4647_read_reg(i, &value); + pr_info("%s = 0x%x\n", ak4647_reg_names[i], value); + } +} +#endif + +static int loopback_xhandle_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +static int loopback_xhandle_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +static const char *ak4647_hp_out[] = { "Stereo", "Mono" }; + +static const char *ak4647_left_in[] = { "LIN1", "LIN2" }; + +static const char *ak4647_right_in[] = { "RIN1", "RIN2" }; + +static const char *ak4647_deemp[] = { "44.1kHz", "Off", "48kHz", "32kHz" }; + +static const struct soc_enum ak4647_enum[] = { + SOC_ENUM_SINGLE(AK4647_MODE4, 2, 2, ak4647_hp_out), + SOC_ENUM_SINGLE(AK4647_MODE3, 0, 4, ak4647_deemp), + SOC_ENUM_SINGLE(AK4647_PM3, 1, 2, ak4647_left_in), + SOC_ENUM_SINGLE(AK4647_PM3, 2, 2, ak4647_right_in), +}; + +#undef snd_soc_info_bool_ext +#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info +static const struct snd_kcontrol_new ak4647_snd_controls[] = { + SOC_ENUM("Headphone Output", ak4647_enum[0]), + SOC_ENUM("Playback Deemphasis", ak4647_enum[1]), + SOC_ENUM("Left Capture Select", ak4647_enum[2]), + SOC_ENUM("Right Capture Select", ak4647_enum[3]), + SOC_SINGLE("Bass Volume", AK4647_MODE3, 2, 3, 0), + SOC_SINGLE("Mic Boost (+20dB) Switch", AK4647_SIG1, 0, 1, 0), + SOC_SINGLE("Mic Bias", AK4647_SIG1, 2, 1, 0), + SOC_SINGLE("ALC Switch", AK4647_ALC1, 5, 1, 0), + SOC_SINGLE("ALC Recovery Time", AK4647_TIMER, 2, 3, 0), + SOC_SINGLE("ALC ZC Time", AK4647_TIMER, 4, 3, 0), + SOC_SINGLE("ALC Volume", AK4647_ALC2, 0, 127, 0), + SOC_SINGLE("Left Capture Volume", AK4647_LEFT_INPUT_VOLUME, 0, 242, 0), + SOC_SINGLE("Right Capture Volume", + AK4647_RIGHT_INPUT_VOLUME, 0, 242, 0), + SOC_SINGLE("Left Playback Volume", AK4647_LEFT_DGT_VOLUME, 0, 255, 1), + SOC_SINGLE("Right Playback Volume", AK4647_RIGHT_DGT_VOLUME, 0, 255, 1), + SOC_SINGLE_BOOL_EXT("Loopback Line-in", 0, + loopback_xhandle_get, loopback_xhandle_put), +}; + +/* Stereo Mixer for HP*/ +static const struct snd_kcontrol_new ak4647_hp_stereo_mixer_controls[] = { + SOC_DAPM_SINGLE("Playback Switch", AK4647_MODE4, 0, 1, 0), + SOC_DAPM_SINGLE("Mic Sidetone Switch", AK4647_MODE4, 1, 1, 0), +}; + +/* Stereo Mixer for Line out*/ +static const struct snd_kcontrol_new ak4647_line_stereo_mixer_controls[] = { + SOC_DAPM_SINGLE("Playback Switch", AK4647_SIG1, 4, 1, 0), + SOC_DAPM_SINGLE("Mic Sidetone Switch", AK4647_SIG2, 2, 1, 0), +}; + +/* ak4647 dapm widgets */ +static const struct snd_soc_dapm_widget ak4647_dapm_widgets[] = { + SND_SOC_DAPM_MIXER("Headphone Mixer", SND_SOC_NOPM, 0, 0, + &ak4647_hp_stereo_mixer_controls[0], + ARRAY_SIZE(ak4647_hp_stereo_mixer_controls)), + SND_SOC_DAPM_MIXER("Lineout Mixer", SND_SOC_NOPM, 0, 0, + &ak4647_line_stereo_mixer_controls[0], + ARRAY_SIZE(ak4647_line_stereo_mixer_controls)), + SND_SOC_DAPM_DAC("DAC", "Playback", AK4647_PM1, 2, 0), + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("HPR"), + SND_SOC_DAPM_OUTPUT("LOUT"), + + SND_SOC_DAPM_ADC("Left ADC", "Capture", AK4647_PM1, 0, 0), + SND_SOC_DAPM_ADC("Right ADC", "Capture", AK4647_PM3, 0, 0), + SND_SOC_DAPM_PGA("HP R Amp", AK4647_PM2, 4, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP L Amp", AK4647_PM2, 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mic", AK4647_PM1, 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Line Out Amp", AK4647_PM1, 3, 0, NULL, 0), + + SND_SOC_DAPM_MICBIAS("Mic Bias", AK4647_SIG1, 2, 0), + SND_SOC_DAPM_INPUT("Left Input"), + SND_SOC_DAPM_INPUT("Right Input"), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + /*headphone stereo mixer */ + {"Headphone Mixer", "Playback Switch", "DAC"}, + {"Headphone Mixer", "Mic Sidetone Switch", "Mic"}, + + /*lineout stereo mixer */ + {"Lineout Mixer", "Playback Switch", "DAC"}, + {"Lineout Mixer", "Mic Sidetone Switch", "Mic"}, + + /* headphone amp */ + {"HP R Amp", NULL, "Headphone Mixer"}, + {"HP L Amp", NULL, "Headphone Mixer"}, + + /* headphone */ + {"HPR", NULL, "HP R Amp"}, + {"HPL", NULL, "HP L Amp"}, + + /* line out */ + {"Line Out Amp", NULL, "Lineout Mixer"}, + {"LOUT", NULL, "Line Out Amp"}, + + /* ADC */ + {"Left ADC", NULL, "Left Input"}, + {"Right ADC", NULL, "Right Input"}, + +}; + +static int ak4647_add_widgets(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, ak4647_dapm_widgets, + ARRAY_SIZE(ak4647_dapm_widgets)); + + /* set up audio path audio_mapnects */ + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +#define AK4647_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ + SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_32000 | \ + SNDRV_PCM_RATE_48000) + +#define AK4647_FORMATS SNDRV_PCM_FMTBIT_S16_LE + +static int ak4647_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + u8 value; + u8 fs = 0; + + /* FS3 is on D5 */ + switch (freq) { + case 8000: + fs = 0x0; + break; + case 11025: + fs = 0x5; + break; + case 16000: + fs = 0x2; + break; + case 22050: + fs = 0x7; + break; + case 32000: + fs = 0x22; + break; + case 44100: + fs = 0x27; + break; + case 48000: + fs = 0x23; + break; + default: + pr_err("unsupported sample rate"); + return -1; + } + + ak4647_read_reg(AK4647_MODE2, &value); + value &= 0xC0; + value |= fs; + ak4647_write_reg(AK4647_MODE2, value); + return 0; +} + +static int ak4647_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + u8 reg_mode1, reg_pm2; + + /* get current values */ + ak4647_read_reg(AK4647_MODE1, ®_mode1); + ak4647_read_reg(AK4647_PM2, ®_pm2); + + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + SET_BIT_IN_BYTE(reg_pm2, 3); + break; + case SND_SOC_DAIFMT_CBS_CFS: + CLEAR_BIT_IN_BYTE(reg_pm2, 3); + break; + default: + return -EINVAL; + } + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + SET_BIT_IN_BYTE(reg_mode1, 0); + SET_BIT_IN_BYTE(reg_mode1, 1); + break; + case SND_SOC_DAIFMT_RIGHT_J: + SET_BIT_IN_BYTE(reg_mode1, 0); + CLEAR_BIT_IN_BYTE(reg_mode1, 1); + break; + case SND_SOC_DAIFMT_LEFT_J: + CLEAR_BIT_IN_BYTE(reg_mode1, 0); + SET_BIT_IN_BYTE(reg_mode1, 1); + break; + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + default: + pr_err("dai format %d not supported", fmt); + return -EINVAL; + } + + ak4647_write_reg(AK4647_MODE1, reg_mode1); + ak4647_write_reg(AK4647_PM2, reg_pm2); + return 0; +} + +static int ak4647_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) +{ + int retval = 0; + u8 value; + if (AK4647_BCLK_CLKDIV == div_id) { + ak4647_read_reg(AK4647_MODE1, &value); + switch (div) { + case AK4647_BCLK_DIV_32: + CLEAR_BIT_IN_BYTE(value, 3); + ak4647_write_reg(AK4647_MODE1, value); + break; + case AK4647_BCLK_DIV_64: + SET_BIT_IN_BYTE(value, 3); + ak4647_write_reg(AK4647_MODE1, value); + break; + default: + retval = -1; + pr_err("wrong div value for divid %d", div_id); + break; + } + } else if (AK4647_MCLK_CLKDIV == div_id) { + ak4647_read_reg(AK4647_MODE2, &value); + switch (div) { + case AK4647_MCLK_DIV_32: + SET_BIT_IN_BYTE(value, 7); + SET_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_MODE2, value); + break; + case AK4647_MCLK_DIV_64: + SET_BIT_IN_BYTE(value, 7); + CLEAR_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_MODE2, value); + break; + case AK4647_MCLK_DIV_128: + CLEAR_BIT_IN_BYTE(value, 7); + SET_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_MODE2, value); + break; + case AK4647_MCLK_DIV_256: + CLEAR_BIT_IN_BYTE(value, 7); + CLEAR_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_MODE2, value); + break; + default: + retval = -1; + pr_err("wrong div value for div id %d", div_id); + break; + } + } else { + retval = -1; + pr_err("wrong div id"); + } + + return retval; +} + +static int ak4647_digital_mute(struct snd_soc_dai *dai, int mute) +{ + u8 value; + + ak4647_read_reg(AK4647_MODE3, &value); + + if (mute) + SET_BIT_IN_BYTE(value, 5); + else + CLEAR_BIT_IN_BYTE(value, 5); + ak4647_write_reg(AK4647_MODE3, value); + return 0; +} + +struct ak4647_state_data { + u8 left_capture_vol; + u8 right_capture_vol; +}; +static struct ak4647_state_data ak4647_state; + +static int ak4647_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + u8 value; + /* for playback, save down capture volume */ + if (SNDRV_PCM_STREAM_PLAYBACK == substream->stream) { + ak4647_read_reg(AK4647_LEFT_INPUT_VOLUME, &value); + ak4647_state.left_capture_vol = value; + ak4647_read_reg(AK4647_RIGHT_INPUT_VOLUME, &value); + ak4647_state.right_capture_vol = value; + + /* when PMADL=PMADR=0 set IVL &IVR to be 0x91 (0db) */ + ak4647_write_reg(AK4647_LEFT_INPUT_VOLUME, 0x91); + ak4647_write_reg(AK4647_RIGHT_INPUT_VOLUME, 0x91); + } + + /* output digital volume independent */ + ak4647_read_reg(AK4647_MODE3, &value); + CLEAR_BIT_IN_BYTE(value, 4); + ak4647_write_reg(AK4647_MODE3, value); + return 0; +} + +static void ak4647_pcm_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + u8 value; + ak4647_read_reg(AK4647_PM2, &value); + /* mute */ + CLEAR_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_PM2, value); + + /* after playback, restore capture volume */ + if (SNDRV_PCM_STREAM_PLAYBACK == substream->stream) { + ak4647_write_reg(AK4647_LEFT_INPUT_VOLUME, + ak4647_state.left_capture_vol); + ak4647_write_reg(AK4647_RIGHT_INPUT_VOLUME, + ak4647_state.right_capture_vol); + } +} + +static int ak4647_pcm_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + u8 value; + + /* VCOM power on */ + ak4647_write_reg(AK4647_PM1, 0x44); + msleep(30); + + ak4647_read_reg(AK4647_PM2, &value); + /* PLL enabled */ + SET_BIT_IN_BYTE(value, 0); + + ak4647_write_reg(AK4647_PM2, value); + /* wait for PLL locked */ + msleep(40); + + /* don't mute */ + SET_BIT_IN_BYTE(value, 6); + ak4647_write_reg(AK4647_PM2, value); + return 0; +} + +struct snd_soc_dai_ops ak4647_ops = { + .prepare = ak4647_pcm_prepare, + .startup = ak4647_pcm_startup, + .shutdown = ak4647_pcm_shutdown, + .digital_mute = ak4647_digital_mute, + .set_fmt = ak4647_set_dai_fmt, + .set_sysclk = ak4647_set_dai_sysclk, + .set_clkdiv = ak4647_set_clkdiv, +}; + +struct snd_soc_dai ak4647_hifi_dai = { + .name = "ak4647", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = AK4647_RATES, + .formats = AK4647_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = AK4647_RATES, + .formats = AK4647_FORMATS, + }, + .ops = &ak4647_ops, +}; +EXPORT_SYMBOL_GPL(ak4647_hifi_dai); + +static struct snd_soc_codec *ak4647_codec; + +static int ak4647_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = ak4647_codec; + int ret = 0; + + socdev->card->codec = ak4647_codec; + + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + dev_err(&ak4647_i2c_client->dev, "failed to create pcms\n"); + return ret; + } + + /* setup init value for audio path controls here */ + /* enable DAC to headphone */ + ak4647_write_reg(AK4647_MODE4, 0x9); + /* capture source to be LIN2 and RIN2 */ + ak4647_write_reg(AK4647_PM3, 0x6); + /* MPWR pin up */ + ak4647_write_reg(AK4647_SIG1, 0x5); + + /* MCKI = 12M, default audio interface format as "left-justified" */ + ak4647_write_reg(AK4647_MODE1, 0x62); + + /* ALC disabled */ + ak4647_write_reg(AK4647_ALC1, 0x0); + + ak4647_state.left_capture_vol = 0x91; + ak4647_state.right_capture_vol = 0x91; + + snd_soc_add_controls(codec, ak4647_snd_controls, + ARRAY_SIZE(ak4647_snd_controls)); + ak4647_add_widgets(codec); + + ret = snd_soc_init_card(socdev); + if (ret < 0) { + pr_err("ak4647: failed to register card\n"); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + return ret; + } + + return 0; +} + +static __devexit int ak4647_i2c_remove(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + + snd_soc_unregister_dai(&ak4647_hifi_dai); + snd_soc_unregister_codec(codec); + kfree(codec); + ak4647_codec = NULL; + return 0; +} + +static int ak4647_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct snd_soc_codec *codec; + int ret; + u8 val; + + if (ak4647_codec) { + dev_err(&client->dev, + "Multiple AK4647 devices not supported\n"); + return -ENOMEM; + } + + codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); + if (codec == NULL) + return -ENOMEM; + + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + i2c_set_clientdata(client, codec); + ak4647_i2c_client = client; + codec->control_data = client; + ret = ak4647_read_reg(AK4647_REG_START, &val); + if (ret < 0) { + pr_err("Device with ID register %x is not a AK4647\n", val); + return -ENODEV; + } + + codec->dev = &client->dev; + codec->name = "ak4647", codec->owner = THIS_MODULE; + codec->owner = THIS_MODULE; + codec->read = ak4647_codec_read; + codec->write = ak4647_codec_write; + codec->dai = &ak4647_hifi_dai; + codec->num_dai = 1; + + ak4647_codec = codec; + ak4647_hifi_dai.dev = &client->dev; + + ret = snd_soc_register_codec(codec); + if (ret != 0) { + dev_err(codec->dev, "Failed to register codec: %d\n", ret); + return ret; + } + + ret = snd_soc_register_dai(&ak4647_hifi_dai); + if (ret != 0) { + dev_err(codec->dev, "Failed to register DAIs: %d\n", ret); + return ret; + } + + return ret; +} + +static const struct i2c_device_id ak4647_id[] = { + {"ak4647-i2c", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, ak4647_id); + +static struct i2c_driver ak4647_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "ak4647-i2c", + }, + .probe = ak4647_i2c_probe, + .remove = __devexit_p(ak4647_i2c_remove), + .id_table = ak4647_id, +}; + +int pmic_audio_fm_output_enable(bool enable) +{ + u8 val; + if (enable) { + ak4647_set_dai_fmt(NULL, + SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM); + ak4647_set_dai_sysclk(NULL, 0, 44100, 0); + ak4647_set_clkdiv(NULL, 0, 0); + /* VCOM power on */ + ak4647_write_reg(AK4647_PM1, 0x44); + msleep(30); + + ak4647_read_reg(AK4647_PM2, &val); + /* PLL enabled */ + SET_BIT_IN_BYTE(val, 0); + + ak4647_write_reg(AK4647_PM2, val); + /* wait for PLL locked */ + msleep(40); + + /* don't mute */ + SET_BIT_IN_BYTE(val, 6); + ak4647_write_reg(AK4647_PM2, val); + + /* loopback STDO to DAC */ + ak4647_read_reg(AK4647_MODE3, &val); + SET_BIT_IN_BYTE(val, 6); + ak4647_write_reg(AK4647_MODE3, val); + + /* switch to R/L 1 */ + ak4647_read_reg(AK4647_PM3, &val); + CLEAR_BIT_IN_BYTE(val, 1); + CLEAR_BIT_IN_BYTE(val, 2); + ak4647_write_reg(AK4647_PM3, val); + + /* power up ADC */ + ak4647_read_reg(AK4647_PM1, &val); + SET_BIT_IN_BYTE(val, 0); + ak4647_write_reg(AK4647_PM1, val); + ak4647_read_reg(AK4647_PM3, &val); + SET_BIT_IN_BYTE(val, 0); + ak4647_write_reg(AK4647_PM3, val); + + /* power up DAC */ + ak4647_read_reg(AK4647_PM1, &val); + SET_BIT_IN_BYTE(val, 2); + ak4647_write_reg(AK4647_PM1, val); + + msleep(30); + + /* headphone output switch on */ + ak4647_read_reg(AK4647_MODE4, &val); + SET_BIT_IN_BYTE(val, 0); + ak4647_write_reg(AK4647_MODE4, val); + + /* power on headphone amp */ + ak4647_read_reg(AK4647_PM2, &val); + SET_BIT_IN_BYTE(val, 4); + SET_BIT_IN_BYTE(val, 5); + ak4647_write_reg(AK4647_PM2, val); + + ak4647_digital_mute(NULL, 0); + } else { + ak4647_digital_mute(NULL, 1); + + /* disbale loopback */ + ak4647_read_reg(AK4647_MODE3, &val); + CLEAR_BIT_IN_BYTE(val, 6); + SET_BIT_IN_BYTE(val, 5); + ak4647_write_reg(AK4647_MODE3, val); + + /* switch to R/L 2 */ + ak4647_read_reg(AK4647_PM3, &val); + SET_BIT_IN_BYTE(val, 1); + SET_BIT_IN_BYTE(val, 2); + ak4647_write_reg(AK4647_PM3, val); + } + return 0; +} + +static int loopback_xhandle_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = kcontrol->private_value; + return 0; +} + +static int loopback_xhandle_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int changed; + long flag = ucontrol->value.integer.value[0]; + changed = + (ucontrol->value.integer.value[0] == + kcontrol->private_value) ? 0 : 1; + kcontrol->private_value = flag; + if (flag) + pmic_audio_fm_output_enable(true); + else + pmic_audio_fm_output_enable(false); + + return changed; +} + +/* power down chip */ +static int ak4647_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + i2c_del_driver(&ak4647_i2c_driver); + kfree(codec); + + return 0; +} + +static int ak4647_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int ak4647_resume(struct platform_device *pdev) +{ + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_ak4647 = { + .probe = ak4647_probe, + .remove = ak4647_remove, + .suspend = ak4647_suspend, + .resume = ak4647_resume, +}; +EXPORT_SYMBOL_GPL(soc_codec_dev_ak4647); + +static int __init ak4647_modinit(void) +{ + return i2c_add_driver(&ak4647_i2c_driver); +} +module_init(ak4647_modinit); + +static void __exit ak4647_exit(void) +{ + i2c_del_driver(&ak4647_i2c_driver); +} +module_exit(ak4647_exit); + +MODULE_DESCRIPTION("ASoC ak4647 driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/stmp378x_codec.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/stmp378x_codec.c @@ -0,0 +1,1051 @@ +/* + * ALSA codec for Freescale STMP378X ADC/DAC + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stmp378x_codec.h" + +#define BV_AUDIOIN_ADCVOL_SELECT__MIC 0x00 /* missing define */ + +#define STMP378X_VERSION "0.1" +struct stmp378x_codec_priv { + struct clk *clk; + struct snd_soc_codec codec; +}; + +/* + * ALSA API + */ +static void __iomem *adc_regmap[] = { + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_STAT, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACDEBUG, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTCTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT0, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT1, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DATA, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_VERSION, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL, + REGS_AUDIOIN_BASE + HW_AUDIOIN_STAT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCDEBUG, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL, + REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL, + REGS_AUDIOIN_BASE + HW_AUDIOIN_DATA, +}; + +static u16 stmp378x_audio_regs[ADC_REGNUM]; + +static u8 dac_volumn_control_word[] = { + 0x37, 0x5e, 0x7e, 0x8e, + 0x9e, 0xae, 0xb6, 0xbe, + 0xc6, 0xce, 0xd6, 0xde, + 0xe6, 0xee, 0xf6, 0xfe, +}; + +/* + * ALSA core supports only 16 bit registers. It means we have to simulate it + * by virtually splitting a 32bit ADC/DAC registers into two halves + * high (bits 31:16) and low (bits 15:0). The routins abow detects which part + * of 32bit register is accessed. + */ +static void stmp378x_codec_write_cache(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg < ADC_REGNUM) + cache[reg] = value; +} + +static int stmp378x_codec_write(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + unsigned int reg_val; + unsigned int mask = 0xffff; + + if (reg >= ADC_REGNUM) + return -EIO; + + stmp378x_codec_write_cache(codec, reg, value); + + if (reg & 0x1) { + mask <<= 16; + value <<= 16; + } + + reg_val = __raw_readl(adc_regmap[reg >> 1]); + reg_val = (reg_val & ~mask) | value; + __raw_writel(reg_val, adc_regmap[reg >> 1]); + + return 0; +} + +static unsigned int stmp378x_codec_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + unsigned int reg_val; + + if (reg >= ADC_REGNUM) + return -1; + + reg_val = __raw_readl(adc_regmap[reg >> 1]); + if (reg & 1) + reg_val >>= 16; + + return reg_val & 0xffff; +} + +static unsigned int stmp378x_codec_read_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg >= ADC_REGNUM) + return -EINVAL; + return cache[reg]; +} + +static void stmp378x_codec_sync_reg_cache(struct snd_soc_codec *codec) +{ + int reg; + for (reg = 0; reg < ADC_REGNUM; reg += 1) + stmp378x_codec_write_cache(codec, reg, + stmp378x_codec_read(codec, reg)); +} + +static int stmp378x_codec_restore_reg(struct snd_soc_codec *codec, + unsigned int reg) +{ + unsigned int cached_val, hw_val; + + cached_val = stmp378x_codec_read_cache(codec, reg); + hw_val = stmp378x_codec_read(codec, reg); + + if (hw_val != cached_val) + return stmp378x_codec_write(codec, reg, cached_val); + + return 0; +} + +static int dac_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 2; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0xf; + return 0; +} + +static int dac_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int reg, l, r; + int i; + + reg = __raw_readl(REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME); + + l = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) >> + BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT; + r = (reg & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) >> + BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT; + /*Left channel */ + i = 0; + while (i < 16) { + if (l == dac_volumn_control_word[i]) { + ucontrol->value.integer.value[0] = i; + break; + } + i++; + } + if (i == 16) + ucontrol->value.integer.value[0] = i; + /*Right channel */ + i = 0; + while (i < 16) { + if (r == dac_volumn_control_word[i]) { + ucontrol->value.integer.value[1] = i; + break; + } + i++; + } + if (i == 16) + ucontrol->value.integer.value[1] = i; + + return 0; +} + +static int dac_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int reg, l, r; + int i; + + i = ucontrol->value.integer.value[0]; + l = dac_volumn_control_word[i]; + /*Get dac volume for left channel */ + reg = BF(l, AUDIOOUT_DACVOLUME_VOLUME_LEFT); + + i = ucontrol->value.integer.value[1]; + r = dac_volumn_control_word[i]; + /*Get dac volume for right channel */ + reg = reg | BF(r, AUDIOOUT_DACVOLUME_VOLUME_RIGHT); + + /*Clear left/right dac volume */ + __raw_writel(BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT | + BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_CLR); + __raw_writel(reg, REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET); + + return 0; +} + +static const char *stmp378x_codec_adc_input_sel[] = + { "Mic", "Line In 1", "Head Phone", "Line In 2" }; + +static const char *stmp378x_codec_hp_output_sel[] = { "DAC Out", "Line In 1" }; + +static const char *stmp378x_codec_adc_3d_sel[] = + { "Off", "Low", "Medium", "High" }; + +static const struct soc_enum stmp378x_codec_enum[] = { + SOC_ENUM_SINGLE(ADC_ADCVOL_L, 12, 4, stmp378x_codec_adc_input_sel), + SOC_ENUM_SINGLE(ADC_ADCVOL_L, 4, 4, stmp378x_codec_adc_input_sel), + SOC_ENUM_SINGLE(DAC_HPVOL_H, 0, 2, stmp378x_codec_hp_output_sel), + SOC_ENUM_SINGLE(DAC_CTRL_L, 8, 4, stmp378x_codec_adc_3d_sel), +}; + +/* Codec controls */ +static const struct snd_kcontrol_new stmp378x_snd_controls[] = { + /* Playback Volume */ + {.iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "DAC Playback Volume", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = dac_info_volsw, + .get = dac_get_volsw, + .put = dac_put_volsw, + }, + + SOC_DOUBLE_R("DAC Playback Switch", + DAC_VOLUME_H, DAC_VOLUME_L, 8, 0x01, 1), + SOC_DOUBLE("HP Playback Volume", DAC_HPVOL_L, 8, 0, 0x7F, 1), + SOC_SINGLE("HP Playback Switch", DAC_HPVOL_H, 8, 0x1, 1), + SOC_SINGLE("Speaker Playback Switch", DAC_SPEAKERCTRL_H, 8, 0x1, 1), + + /* Capture Volume */ + SOC_DOUBLE_R("ADC Capture Volume", + ADC_VOLUME_H, ADC_VOLUME_L, 0, 0xFF, 0), + SOC_DOUBLE("ADC PGA Capture Volume", ADC_ADCVOL_L, 8, 0, 0x0F, 0), + SOC_SINGLE("ADC PGA Capture Switch", ADC_ADCVOL_H, 8, 0x1, 1), + SOC_SINGLE("Mic PGA Capture Volume", ADC_MICLINE_L, 0, 0x03, 0), + + /* Virtual 3D effect */ + SOC_ENUM("3D effect", stmp378x_codec_enum[3]), +}; + +/* Left ADC Mux */ +static const struct snd_kcontrol_new stmp378x_left_adc_controls = +SOC_DAPM_ENUM("Route", stmp378x_codec_enum[0]); + +/* Right ADC Mux */ +static const struct snd_kcontrol_new stmp378x_right_adc_controls = +SOC_DAPM_ENUM("Route", stmp378x_codec_enum[1]); + +/* Head Phone Mux */ +static const struct snd_kcontrol_new stmp378x_hp_controls = +SOC_DAPM_ENUM("Route", stmp378x_codec_enum[2]); + +static const struct snd_soc_dapm_widget stmp378x_codec_widgets[] = { + + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", DAC_PWRDN_L, 8, 1), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", DAC_PWRDN_H, 0, 1), + + SND_SOC_DAPM_DAC("DAC", "Playback", DAC_PWRDN_L, 12, 1), + + SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, + &stmp378x_left_adc_controls), + SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, + &stmp378x_right_adc_controls), + SND_SOC_DAPM_MUX("HP Mux", SND_SOC_NOPM, 0, 0, + &stmp378x_hp_controls), + + SND_SOC_DAPM_PGA("HP_AMP", DAC_PWRDN_L, 0, 1, NULL, 0), + + SND_SOC_DAPM_PGA("HP_CAPLESS", DAC_PWRDN_L, 4, 1, NULL, 0), + + SND_SOC_DAPM_PGA("SPK_AMP", DAC_PWRDN_H, 8, 1, NULL, 0), + + SND_SOC_DAPM_INPUT("LINE1L"), + SND_SOC_DAPM_INPUT("LINE1R"), + SND_SOC_DAPM_INPUT("LINE2L"), + SND_SOC_DAPM_INPUT("LINE2R"), + SND_SOC_DAPM_INPUT("MIC"), + + SND_SOC_DAPM_OUTPUT("SPEAKER"), + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("HPR"), +}; + +static const struct snd_soc_dapm_route intercon[] = { + + /* Left ADC Mux */ + {"Left ADC Mux", "Mic", "MIC"}, + {"Left ADC Mux", "Line In 1", "LINE1L"}, + {"Left ADC Mux", "Line In 2", "LINE2L"}, + {"Left ADC Mux", "Head Phone", "HPL"}, + + /* Right ADC Mux */ + {"Right ADC Mux", "Mic", "MIC"}, + {"Right ADC Mux", "Line In 1", "LINE1R"}, + {"Right ADC Mux", "Line In 2", "LINE2R"}, + {"Right ADC Mux", "Head Phone", "HPR"}, + + /* ADC */ + {"Left ADC", NULL, "Left ADC Mux"}, + {"Right ADC", NULL, "Right ADC Mux"}, + + /* HP Mux */ + {"HP Mux", "DAC Out", "DAC"}, + {"HP Mux", "Line In 1", "LINE1L"}, + {"HP Mux", "Line In 1", "LINE1R"}, + + /* HP output */ + {"HP_CAPLESS", NULL, "HP Mux"}, + {"HP_AMP", NULL, "HP_CAPLESS"}, + {"HPR", NULL, "HP_AMP"}, + {"HPL", NULL, "HP_AMP"}, + + /* Speaker amp */ + {"SPK_AMP", NULL, "DAC"}, + {"SPEAKER", NULL, "SPK_AMP"}, +}; + +static int stmp378x_codec_add_widgets(struct snd_soc_codec *codec) +{ + int ret = 0; + + snd_soc_dapm_new_controls(codec, stmp378x_codec_widgets, + ARRAY_SIZE(stmp378x_codec_widgets)); + + if (ret) { + dev_err(codec->dev, "dapm control register failed\n"); + return ret; + } + /* set up audio path interconnects */ + snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); + + if (ret) { + dev_err(codec->dev, "DAPM route register failed\n"); + return ret; + } + + return snd_soc_dapm_new_widgets(codec); +} + +struct dac_srr { + u32 rate; + u32 basemult; + u32 src_hold; + u32 src_int; + u32 src_frac; +}; + +static struct dac_srr srr_values[] = { + {192000, 0x4, 0x0, 0x0F, 0x13FF}, + {176400, 0x4, 0x0, 0x11, 0x0037}, + {128000, 0x4, 0x0, 0x17, 0x0E00}, + {96000, 0x2, 0x0, 0x0F, 0x13FF}, + {88200, 0x2, 0x0, 0x11, 0x0037}, + {64000, 0x2, 0x0, 0x17, 0x0E00}, + {48000, 0x1, 0x0, 0x0F, 0x13FF}, + {44100, 0x1, 0x0, 0x11, 0x0037}, + {32000, 0x1, 0x0, 0x17, 0x0E00}, + {24000, 0x1, 0x1, 0x0F, 0x13FF}, + {22050, 0x1, 0x1, 0x11, 0x0037}, + {16000, 0x1, 0x1, 0x17, 0x0E00}, + {12000, 0x1, 0x3, 0x0F, 0x13FF}, + {11025, 0x1, 0x3, 0x11, 0x0037}, + {8000, 0x1, 0x3, 0x17, 0x0E00} +}; + +static inline int get_srr_values(int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(srr_values); i++) + if (srr_values[i].rate == rate) + return i; + + return -1; +} + +static int stmp378x_codec_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int i; + u32 srr_value = 0; + u32 src_hold = 0; + + i = get_srr_values(params_rate(params)); + if (i < 0) + dev_warn(socdev->dev, "%s doesn't support rate %d\n", + codec->name, params_rate(params)); + else { + src_hold = srr_values[i].src_hold; + + srr_value = + BF(srr_values[i].basemult, AUDIOOUT_DACSRR_BASEMULT) | + BF(srr_values[i].src_int, AUDIOOUT_DACSRR_SRC_INT) | + BF(srr_values[i].src_frac, AUDIOOUT_DACSRR_SRC_FRAC) | + BF(src_hold, AUDIOOUT_DACSRR_SRC_HOLD); + + if (playback) + __raw_writel(srr_value, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR); + else + __raw_writel(srr_value, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR); + } + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + if (playback) + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + else + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + + break; + + case SNDRV_PCM_FORMAT_S32_LE: + if (playback) + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + else + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + + break; + + default: + dev_warn(socdev->dev, "%s doesn't support format %d\n", + codec->name, params_format(params)); + + } + + return 0; +} + +static int stmp378x_codec_dig_mute(struct snd_soc_dai *dai, int mute) +{ + u32 dac_mask = BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT; + + if (mute) { + __raw_writel(dac_mask, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET); + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_SET); + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_SET); + } else { + __raw_writel(dac_mask, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_CLR); + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_CLR); + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_CLR); + } + return 0; +} + +/* + * Codec initialization + */ +#define VAG_BASE_VALUE ((1400/2 - 625)/25) +static void stmp378x_codec_dac_set_vag(void) +{ + u32 refctrl_val = __raw_readl(REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL); + + refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VAG_VAL); + refctrl_val &= ~(BM_AUDIOOUT_REFCTRL_VBG_ADJ); + refctrl_val |= BF(VAG_BASE_VALUE, AUDIOOUT_REFCTRL_VAG_VAL) | + BM_AUDIOOUT_REFCTRL_ADJ_VAG | + BF(0xF, AUDIOOUT_REFCTRL_ADC_REFVAL) | + BM_AUDIOOUT_REFCTRL_ADJ_ADC | + BF(0x3, AUDIOOUT_REFCTRL_VBG_ADJ) | BM_AUDIOOUT_REFCTRL_RAISE_REF; + + __raw_writel(refctrl_val, REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL); +} + +static void +stmp378x_codec_dac_power_on(struct stmp378x_codec_priv *stmp378x_adc) +{ + /* Ungate DAC clocks */ + __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL_CLR); + + /* 16 bit word length */ + __raw_writel(BM_AUDIOOUT_CTRL_WORD_LENGTH, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + + /* Update DAC volume over zero crossings */ + __raw_writel(BM_AUDIOOUT_DACVOLUME_EN_ZCD, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET); + /* Mute DAC */ + __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET); + + /* Update HP volume over zero crossings */ + __raw_writel(BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_SET); + + /* Prepare powering up HP output */ + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_SET); + __raw_writel(BF(0x2, RTC_PERSISTENT0_SPARE_ANALOG), + REGS_RTC_BASE + HW_RTC_PERSISTENT0_SET); + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_SET); + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_CLR); + /* Mute HP output */ + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_SET); + + /* Mute speaker amp */ + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_SET); +} + +static void +stmp378x_codec_dac_power_down(struct stmp378x_codec_priv *stmp378x_adc) +{ + /* Disable class AB */ + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_CLASSAB, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_CLR); + + /* Set hold to ground */ + __raw_writel(BM_AUDIOOUT_ANACTRL_HP_HOLD_GND, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_SET); + + /* Mute HP output */ + __raw_writel(BM_AUDIOOUT_HPVOL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_SET); + /* Power down HP output */ + __raw_writel(BM_AUDIOOUT_PWRDN_HEADPHONE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_SET); + + /* Mute speaker amp */ + __raw_writel(BM_AUDIOOUT_SPEAKERCTRL_MUTE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_SET); + /* Power down speaker amp */ + __raw_writel(BM_AUDIOOUT_PWRDN_SPEAKER, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_SET); + + /* Mute DAC */ + __raw_writel(BM_AUDIOOUT_DACVOLUME_MUTE_LEFT | + BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET); + /* Power down DAC */ + __raw_writel(BM_AUDIOOUT_PWRDN_DAC, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_SET); + + /* Gate DAC clocks */ + __raw_writel(BM_AUDIOOUT_ANACLKCTRL_CLKGATE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL_SET); + __raw_writel(BM_AUDIOOUT_CTRL_CLKGATE, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); +} + +static void +stmp378x_codec_adc_power_on(struct stmp378x_codec_priv *stmp378x_adc) +{ + u32 reg; + + /* Ungate ADC clocks */ + __raw_writel(BM_AUDIOIN_CTRL_CLKGATE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL_CLR); + + /* 16 bit word length */ + __raw_writel(BM_AUDIOIN_CTRL_WORD_LENGTH, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + + /* Unmute ADC channels */ + __raw_writel(BM_AUDIOIN_ADCVOL_MUTE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR); + + /* + * The MUTE_LEFT and MUTE_RIGHT fields need to be cleared. + * They aren't presented in the datasheet, so this is hardcode. + */ + __raw_writel(0x01000100, REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME_CLR); + + /* Set the Input channel gain 3dB */ + __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_LEFT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR); + __raw_writel(BM_AUDIOIN_ADCVOL_GAIN_RIGHT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR); + __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_LEFT), + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET); + __raw_writel(BF(2, AUDIOIN_ADCVOL_GAIN_RIGHT), + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET); + + /* Select default input - Microphone */ + __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_LEFT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR); + __raw_writel(BM_AUDIOIN_ADCVOL_SELECT_RIGHT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR); + __raw_writel(BF + (BV_AUDIOIN_ADCVOL_SELECT__MIC, + AUDIOIN_ADCVOL_SELECT_LEFT), + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET); + __raw_writel(BF + (BV_AUDIOIN_ADCVOL_SELECT__MIC, + AUDIOIN_ADCVOL_SELECT_RIGHT), + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET); + + /* Supply bias voltage to microphone */ + __raw_writel(BF(2, AUDIOIN_MICLINE_MIC_RESISTOR), + REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_SET); + __raw_writel(BM_AUDIOIN_MICLINE_MIC_SELECT, + REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_SET); + + /* Set max ADC volume */ + reg = __raw_readl(REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME); + reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT; + reg &= ~BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT; + reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_LEFT); + reg |= BF(ADC_VOLUME_MAX, AUDIOIN_ADCVOLUME_VOLUME_RIGHT); + __raw_writel(reg, REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME); +} + +static void +stmp378x_codec_adc_power_down(struct stmp378x_codec_priv *stmp378x_adc) +{ + /* Mute ADC channels */ + __raw_writel(BM_AUDIOIN_ADCVOL_MUTE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET); + + /* Power Down ADC */ + __raw_writel(BM_AUDIOOUT_PWRDN_ADC | BM_AUDIOOUT_PWRDN_RIGHT_ADC, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_SET); + + /* Gate ADC clocks */ + __raw_writel(BM_AUDIOIN_CTRL_CLKGATE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + __raw_writel(BM_AUDIOIN_ANACLKCTRL_CLKGATE, + REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL_SET); + + /* Disable bias voltage to microphone */ + __raw_writel(BF(0, AUDIOIN_MICLINE_MIC_RESISTOR), + REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_SET); +} + +static void stmp378x_codec_dac_enable(struct stmp378x_codec_priv *stmp378x_adc) +{ + /* Move DAC codec out of reset */ + __raw_writel(BM_AUDIOOUT_CTRL_SFTRST, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + + /* Reduce analog power */ + __raw_writel(BM_AUDIOOUT_TEST_HP_I1_ADJ, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST_CLR); + __raw_writel(BF(0x1, AUDIOOUT_TEST_HP_I1_ADJ), + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST_SET); + __raw_writel(BM_AUDIOOUT_REFCTRL_LOW_PWR, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_SET); + __raw_writel(BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_SET); + __raw_writel(BM_AUDIOOUT_REFCTRL_BIAS_CTRL, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_CLR); + __raw_writel(BF(0x1, AUDIOOUT_REFCTRL_BIAS_CTRL), + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_CLR); + + /* Set Vag value */ + stmp378x_codec_dac_set_vag(); + + /* Power on DAC codec */ + stmp378x_codec_dac_power_on(stmp378x_adc); +} + +static void stmp378x_codec_dac_disable(struct stmp378x_codec_priv *stmp378x_adc) +{ + stmp378x_codec_dac_power_down(stmp378x_adc); +} + +static void stmp378x_codec_adc_enable(struct stmp378x_codec_priv *stmp378x_adc) +{ + /* Move ADC codec out of reset */ + __raw_writel(BM_AUDIOIN_CTRL_SFTRST, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + + /* Power on ADC codec */ + stmp378x_codec_adc_power_on(stmp378x_adc); +} + +static void stmp378x_codec_adc_disable(struct stmp378x_codec_priv *stmp378x_adc) +{ + stmp378x_codec_adc_power_down(stmp378x_adc); +} + +static void stmp378x_codec_startup(struct snd_soc_codec *codec) +{ + struct stmp378x_codec_priv *stmp378x_adc = codec->private_data; + + /* Soft reset DAC block */ + __raw_writel(BM_AUDIOOUT_CTRL_SFTRST, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + while (!(__raw_readl(REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL) & + BM_AUDIOOUT_CTRL_CLKGATE)); + + /* Soft reset ADC block */ + __raw_writel(BM_AUDIOIN_CTRL_SFTRST, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + while (!(__raw_readl(REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL) & + BM_AUDIOIN_CTRL_CLKGATE)) ; + + stmp378x_codec_dac_enable(stmp378x_adc); + stmp378x_codec_adc_enable(stmp378x_adc); + + /*Sync regs and cache */ + stmp378x_codec_sync_reg_cache(codec); + + snd_soc_add_controls(codec, stmp378x_snd_controls, + ARRAY_SIZE(stmp378x_snd_controls)); + + stmp378x_codec_add_widgets(codec); +} + +static void stmp378x_codec_stop(struct snd_soc_codec *codec) +{ + struct stmp378x_codec_priv *stmp378x_adc = codec->private_data; + stmp378x_codec_dac_disable(stmp378x_adc); + stmp378x_codec_adc_disable(stmp378x_adc); +} + +#define STMP378X_ADC_RATES SNDRV_PCM_RATE_8000_192000 +#define STMP378X_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_ops stmp378x_dai_ops = { + .hw_params = stmp378x_codec_hw_params, + .digital_mute = stmp378x_codec_dig_mute, +}; + +struct snd_soc_dai stmp378x_codec_dai = { + .name = "stmp378x adc/dac", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = STMP378X_ADC_RATES, + .formats = STMP378X_ADC_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 2, + .channels_max = 2, + .rates = STMP378X_ADC_RATES, + .formats = STMP378X_ADC_FORMATS, + }, + .ops = &stmp378x_dai_ops, +}; + +EXPORT_SYMBOL_GPL(stmp378x_codec_dai); + +static struct snd_soc_codec *stmp378x_codec; + +static int stmp378x_codec_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + int ret = 0; + + socdev->card->codec = stmp378x_codec; + codec = stmp378x_codec; + + /* register pcms */ + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + dev_err(codec->dev, "failed to create pcms\n"); + return ret; + } + + stmp378x_codec_startup(codec); + + /* Register the socdev */ + ret = snd_soc_init_card(socdev); + if (ret < 0) { + dev_err(codec->dev, "failed to register card\n"); + snd_soc_dapm_free(socdev); + snd_soc_free_pcms(socdev); + return ret; + } + + return 0; +} + +static int stmp378x_codec_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + stmp378x_codec_stop(codec); + + snd_soc_dapm_free(socdev); + snd_soc_free_pcms(socdev); + + return 0; +} + +#ifdef CONFIG_PM +static int stmp378x_codec_suspend(struct platform_device *pdev, + pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + struct stmp378x_codec_priv *stmp378x_adc; + int ret = -EINVAL; + + if (codec == NULL) + goto out; + + stmp378x_adc = codec->private_data; + + stmp378x_codec_dac_disable(stmp378x_adc); + stmp378x_codec_adc_disable(stmp378x_adc); + clk_disable(stmp378x_adc->clk); + ret = 0; + +out: + return ret; +} + +static int stmp378x_codec_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + struct stmp378x_codec_priv *stmp378x_adc; + int ret = -EINVAL; + + if (codec == NULL) + goto out; + + stmp378x_adc = codec->private_data; + clk_enable(stmp378x_adc->clk); + + /* Soft reset DAC block */ + __raw_writel(BM_AUDIOOUT_CTRL_SFTRST, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + while (! + (__raw_readl(REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL) & + BM_AUDIOOUT_CTRL_CLKGATE)) ; + + /* Soft reset ADC block */ + __raw_writel(BM_AUDIOIN_CTRL_SFTRST, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + while (! + (__raw_readl(REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL) & + BM_AUDIOIN_CTRL_CLKGATE)) ; + + stmp378x_codec_dac_enable(stmp378x_adc); + stmp378x_codec_adc_enable(stmp378x_adc); + + /*restore registers relevant to amixer controls */ + stmp378x_codec_restore_reg(codec, DAC_CTRL_L); + stmp378x_codec_restore_reg(codec, DAC_VOLUME_L); + stmp378x_codec_restore_reg(codec, DAC_VOLUME_H); + stmp378x_codec_restore_reg(codec, DAC_HPVOL_L); + stmp378x_codec_restore_reg(codec, DAC_HPVOL_H); + stmp378x_codec_restore_reg(codec, DAC_SPEAKERCTRL_H); + stmp378x_codec_restore_reg(codec, ADC_VOLUME_L); + stmp378x_codec_restore_reg(codec, ADC_VOLUME_H); + stmp378x_codec_restore_reg(codec, ADC_ADCVOL_L); + stmp378x_codec_restore_reg(codec, ADC_ADCVOL_H); + stmp378x_codec_restore_reg(codec, ADC_MICLINE_L); + + ret = 0; + +out: + return ret; +} +#else +#define stmp378x_codec_suspend NULL +#define stmp378x_codec_resume NULL +#endif /* CONFIG_PM */ + +struct snd_soc_codec_device soc_codec_dev_stmp378x = { + .probe = stmp378x_codec_probe, + .remove = stmp378x_codec_remove, + .suspend = stmp378x_codec_suspend, + .resume = stmp378x_codec_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_stmp378x); + +/* codec register, unregister function */ +static int __init stmp378x_audio_probe(struct platform_device *pdev) +{ + struct stmp378x_codec_priv *stmp378x_adc; + struct snd_soc_codec *codec; + int ret = 0; + + dev_info(&pdev->dev, + "STMP378X ADC/DAC Audio Codec %s\n", STMP378X_VERSION); + + stmp378x_adc = kzalloc(sizeof(struct stmp378x_codec_priv), GFP_KERNEL); + if (stmp378x_adc == NULL) + return -ENOMEM; + + codec = &stmp378x_adc->codec; + codec->dev = &pdev->dev; + codec->name = "stmp378x adc/dac"; + codec->owner = THIS_MODULE; + codec->private_data = stmp378x_adc; + codec->read = stmp378x_codec_read; + codec->write = stmp378x_codec_write; + codec->dai = &stmp378x_codec_dai; + codec->num_dai = 1; + codec->reg_cache_size = sizeof(stmp378x_audio_regs) >> 1; + codec->reg_cache_step = 1; + codec->reg_cache = (void *)&stmp378x_audio_regs; + + platform_set_drvdata(pdev, stmp378x_adc); + + stmp378x_codec = codec; + + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + /* Turn on audio clock */ + stmp378x_adc->clk = clk_get(&pdev->dev, "audio"); + if (IS_ERR(stmp378x_adc->clk)) { + ret = PTR_ERR(stmp378x_adc->clk); + dev_err(&pdev->dev, "%s: Clocks initialization failed\n", __func__); + goto clk_err; + } + clk_enable(stmp378x_adc->clk); + + ret = snd_soc_register_codec(codec); + if (ret) { + dev_err(&pdev->dev, "failed to register card\n"); + goto card_err; + } + + ret = snd_soc_register_dai(&stmp378x_codec_dai); + if (ret) { + dev_err(&pdev->dev, "failed to register codec dai\n"); + goto dai_err; + } + + return 0; + +dai_err: + snd_soc_unregister_codec(codec); +card_err: + clk_disable(stmp378x_adc->clk); + clk_put(stmp378x_adc->clk); +clk_err: + kfree(stmp378x_adc); + return ret; +} + +static int __devexit stmp378x_audio_remove(struct platform_device *pdev) +{ + struct stmp378x_codec_priv *stmp378x_adc = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = &stmp378x_adc->codec; + + snd_soc_unregister_codec(codec); + + clk_disable(stmp378x_adc->clk); + clk_put(stmp378x_adc->clk); + + kfree(stmp378x_adc); + + return 0; +} + +struct platform_driver stmp378x_audio_driver = { + .driver = { + .name = "stmp378x-audio", + }, + .probe = stmp378x_audio_probe, + .remove = __devexit_p(stmp378x_audio_remove), +}; + +static int __init stmp378x_codec_init(void) +{ + return platform_driver_register(&stmp378x_audio_driver); +} + +static void __exit stmp378x_codec_exit(void) +{ + return platform_driver_unregister(&stmp378x_audio_driver); +} + +module_init(stmp378x_codec_init); +module_exit(stmp378x_codec_exit); + +MODULE_DESCRIPTION("STMP378X ADC/DAC codec"); +MODULE_AUTHOR("Vladislav Buzov"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/ak5702.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/ak5702.h @@ -0,0 +1,130 @@ +/* + * ak5702.h -- AK5702 Soc Audio driver + * + * Copyright 2009 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _AK5702_H +#define _AK5702_H + +/* AK5702 register space */ + +#define AK5702_PM1 0x00 +#define AK5702_PLL1 0x01 +#define AK5702_SIG1 0x02 +#define AK5702_MICG1 0x03 +#define AK5702_FMT1 0x04 +#define AK5702_FS1 0x05 +#define AK5702_CLK1 0x06 +#define AK5702_VOL1 0x07 +#define AK5702_LVOL1 0x08 +#define AK5702_RVOL1 0x09 +#define AK5702_TIMER1 0x0a +#define AK5702_ALC11 0x0b +#define AK5702_ALC12 0x0c +#define AK5702_MODE11 0x0d +#define AK5702_MODE12 0x0e +#define AK5702_MODE13 0x0f + +#define AK5702_PM2 0x10 +#define AK5702_PLL2 0x11 +#define AK5702_SIG2 0x12 +#define AK5702_MICG2 0x13 +#define AK5702_FMT2 0x14 +#define AK5702_FS2 0x15 +#define AK5702_CLK2 0x16 +#define AK5702_VOL2 0x17 +#define AK5702_LVOL2 0x18 +#define AK5702_RVOL2 0x19 +#define AK5702_TIMER2 0x1a +#define AK5702_ALC21 0x1b +#define AK5702_ALC22 0x1c +#define AK5702_MODE21 0x1d +#define AK5702_MODE22 0x1e + +#define AK5702_CACHEREGNUM 0x1F + +#define AK5702_PM1_PMADAL 0x01 +#define AK5702_PM1_PMADAR 0x02 +#define AK5702_PM1_PMVCM 0x04 +#define AK5702_PM2_PMADBL 0x01 +#define AK5702_PM2_PMADBR 0x02 + +#define AK5702_PLL1_POWERDOWN 0x0 +#define AK5702_PLL1_POWERUP 0x01 +#define AK5702_PLL1_MASTER 0x02 +#define AK5702_PLL1_SLAVE 0x0 +#define AK5702_PLL1_11289600 0x10 +#define AK5702_PLL1_12000000 0x24 +#define AK5702_PLL1_12288000 0x14 +#define AK5702_PLL1_19200000 0x20 + +#define AK5702_SIG1_L_LIN1 0x0 +#define AK5702_SIG1_L_LIN2 0x01 +#define AK5702_SIG1_R_RIN1 0x0 +#define AK5702_SIG1_R_RIN2 0x02 +#define AK5702_SIG1_PMMPA 0x10 +#define AK5702_SIG2_L_LIN3 0x0 +#define AK5702_SIG2_L_LIN4 0x01 +#define AK5702_SIG2_R_RIN3 0x0 +#define AK5702_SIG2_R_RIN4 0x02 +#define AK5702_SIG2_PMMPB 0x10 + +#define AK5702_MICG1_INIT 0x0 +#define AK5702_MICG2_INIT 0x0 + +#define AK5702_FMT1_I2S 0x23 +#define AK5702_FMT1_MSB 0x22 +#define AK5702_FMT2_STEREO 0x20 +#define AK5702_FS1_BCKO_32FS 0x10 +#define AK5702_FS1_BCKO_64FS 0x20 +#define AK5702_CLK1_PS_256FS 0x0 +#define AK5702_CLK1_PS_128FS 0x01 +#define AK5702_CLK1_PS_64FS 0x02 +#define AK5702_CLK1_PS_32FS 0x03 +#define AK5702_VOL1_IVOLAC 0x01 +#define AK5702_VOL2_IVOLBC 0x01 +#define AK5702_LVOL1_INIT 0x91 +#define AK5702_RVOL1_INIT 0x91 +#define AK5702_LVOL2_INIT 0x91 +#define AK5702_RVOL2_INIT 0x91 + +#define AK5702_PLL1_PM_MASK 0x01 +#define AK5702_PLL1_MODE_MASK 0x02 +#define AK5702_PLL1_PLL_MASK 0x3c +#define AK5702_FS1_BCKO_MASK 0x30 +#define AK5702_FS1_FS_MASK 0x0f +#define AK5702_CLK1_PS_MASK 0x03 + +/* clock divider id */ +#define AK5702_BCLK_CLKDIV 0 +#define AK5702_MCLK_CLKDIV 1 + +/* bit clock div values */ +#define AK5702_BCLK_DIV_32 0 +#define AK5702_BCLK_DIV_64 1 + +/* m clock div values */ +#define AK5702_MCLK_DIV_32 0 +#define AK5702_MCLK_DIV_64 1 +#define AK5702_MCLK_DIV_128 2 +#define AK5702_MCLK_DIV_256 3 + +/* PLL master and slave modes */ +#define AK5702_PLL_POWERDOWN 0 +#define AK5702_PLL_MASTER 1 +#define AK5702_PLL_SLAVE 2 + +struct ak5702_setup_data { + int i2c_bus; + unsigned short i2c_address; +}; + +extern struct snd_soc_dai ak5702_dai; +extern struct snd_soc_codec_device soc_codec_dev_ak5702; + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/ak5702.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/ak5702.c @@ -0,0 +1,607 @@ +/* + * ak5702.c -- AK5702 Soc Audio driver + * + * Copyright 2009 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ak5702.h" + +#define AK5702_VERSION "0.1" + +/* codec private data */ +struct ak5702_priv { + unsigned int sysclk; +}; + +/* + * ak5702 register cache + */ +static const u16 ak5702_reg[AK5702_CACHEREGNUM] = { + 0x0000, 0x0024, 0x0000, 0x0001, 0x0023, 0x001f, + 0x0000, 0x0001, 0x0091, 0x0000, 0x00e1, 0x0000, + 0x00a0, 0x0000, 0x0000, 0x0000, 0x0001, 0x0020, + 0x0000, 0x0000, 0x0001, 0x0091, 0x0000, 0x00e1, + 0x0000, +}; + +/* + * read ak5702 register cache + */ +static inline unsigned int ak5702_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + + if (reg >= AK5702_CACHEREGNUM) + return -1; + return cache[reg]; +} + +static inline unsigned int ak5702_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + u8 data; + data = reg; + + if (codec->hw_write(codec->control_data, &data, 1) != 1) + return -EIO; + if (codec->hw_read(codec->control_data, &data, 1) != 1) + return -EIO; + + return data; +}; + +/* + * write ak5702 register cache + */ +static inline void ak5702_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + + if (reg >= AK5702_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * write to the AK5702 register space + */ +static int ak5702_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + data[0] = reg & 0xff; + data[1] = value & 0xff; + + ak5702_write_reg_cache(codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +static const char *ak5702_mic_gain[] = { "0dB", "+15dB", "+30dB", "+36dB" }; +static const char *ak5702_adca_left_type[] = + { "Single-ended", "Full-differential" }; +static const char *ak5702_adca_right_type[] = + { "Single-ended", "Full-differential" }; +static const char *ak5702_adcb_left_type[] = + { "Single-ended", "Full-differential" }; +static const char *ak5702_adcb_right_type[] = + { "Single-ended", "Full-differential" }; +static const char *ak5702_adca_left_input[] = { "LIN1", "LIN2" }; +static const char *ak5702_adca_right_input[] = { "RIN1", "RIN2" }; +static const char *ak5702_adcb_left_input[] = { "LIN3", "LIN4" }; +static const char *ak5702_adcb_right_input[] = { "RIN3", "RIN4" }; + +static const struct soc_enum ak5702_enum[] = { + SOC_ENUM_SINGLE(AK5702_MICG1, 0, 4, ak5702_mic_gain), + SOC_ENUM_SINGLE(AK5702_MICG2, 0, 4, ak5702_mic_gain), + + SOC_ENUM_SINGLE(AK5702_SIG1, 0, 2, ak5702_adca_left_input), + SOC_ENUM_SINGLE(AK5702_SIG1, 1, 2, ak5702_adca_right_input), + SOC_ENUM_SINGLE(AK5702_SIG2, 0, 2, ak5702_adcb_left_input), + SOC_ENUM_SINGLE(AK5702_SIG1, 1, 2, ak5702_adcb_right_input), + + SOC_ENUM_SINGLE(AK5702_SIG1, 2, 2, ak5702_adca_left_type), + SOC_ENUM_SINGLE(AK5702_SIG1, 3, 2, ak5702_adca_right_type), + SOC_ENUM_SINGLE(AK5702_SIG2, 2, 2, ak5702_adcb_left_type), + SOC_ENUM_SINGLE(AK5702_SIG2, 3, 2, ak5702_adcb_right_type), +}; + +static const struct snd_kcontrol_new ak5702_snd_controls[] = { + SOC_SINGLE("ADCA Left Vol", AK5702_LVOL1, 0, 242, 0), + SOC_SINGLE("ADCA Right Vol", AK5702_RVOL1, 0, 242, 0), + SOC_SINGLE("ADCB Left Vol", AK5702_LVOL2, 0, 242, 0), + SOC_SINGLE("ADCB Right Vol", AK5702_RVOL2, 0, 242, 0), + + SOC_ENUM("MIC-AmpA Gain", ak5702_enum[0]), + SOC_ENUM("MIC-AmpB Gain", ak5702_enum[1]), + + SOC_ENUM("ADCA Left Source", ak5702_enum[2]), + SOC_ENUM("ADCA Right Source", ak5702_enum[3]), + SOC_ENUM("ADCB Left Source", ak5702_enum[4]), + SOC_ENUM("ADCB Right Source", ak5702_enum[5]), + + SOC_ENUM("ADCA Left Type", ak5702_enum[6]), + SOC_ENUM("ADCA Right Type", ak5702_enum[7]), + SOC_ENUM("ADCB Left Type", ak5702_enum[8]), + SOC_ENUM("ADCB Right Type", ak5702_enum[9]), +}; + +/* ak5702 dapm widgets */ +static const struct snd_soc_dapm_widget ak5702_dapm_widgets[] = { + SND_SOC_DAPM_ADC("ADCA Left", "Capture", AK5702_PM1, 0, 0), + SND_SOC_DAPM_ADC("ADCA Right", "Capture", AK5702_PM1, 1, 0), + SND_SOC_DAPM_ADC("ADCB Left", "Capture", AK5702_PM2, 0, 0), + SND_SOC_DAPM_ADC("ADCB Right", "Capture", AK5702_PM2, 1, 0), + + SND_SOC_DAPM_INPUT("ADCA Left Input"), + SND_SOC_DAPM_INPUT("ADCA Right Input"), + SND_SOC_DAPM_INPUT("ADCB Left Input"), + SND_SOC_DAPM_INPUT("ADCB Right Input"), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + {"ADCA Left", NULL, "ADCA Left Input"}, + {"ADCA Right", NULL, "ADCA Right Input"}, + {"ADCB Left", NULL, "ADCB Left Input"}, + {"ADCB Right", NULL, "ADCB Right Input"}, +}; + +static int ak5702_add_widgets(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, ak5702_dapm_widgets, + ARRAY_SIZE(ak5702_dapm_widgets)); + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static int ak5702_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u8 fs = 0; + u8 value; + + switch (freq) { + case 8000: + fs = 0x0; + break; + case 11025: + fs = 0x05; + break; + case 12000: + fs = 0x01; + break; + case 16000: + fs = 0x02; + break; + case 22050: + fs = 0x07; + break; + case 24000: + fs = 0x03; + break; + case 32000: + fs = 0x0a; + break; + case 44100: + fs = 0x0f; + break; + case 48000: + fs = 0x0b; + break; + default: + return -EINVAL; + } + + value = ak5702_read_reg_cache(codec, AK5702_FS1); + value &= (~AK5702_FS1_FS_MASK); + value |= fs; + ak5702_write(codec, AK5702_FS1, value); + return 0; +} + +static int ak5702_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u8 fmt1 = 0; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + fmt1 = AK5702_FMT1_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + fmt1 = AK5702_FMT1_MSB; + break; + default: + return -EINVAL; + } + + ak5702_write(codec, AK5702_FMT1, fmt1); + ak5702_write(codec, AK5702_FMT2, AK5702_FMT2_STEREO); + return 0; +} + +static int ak5702_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, + unsigned int freq_in, unsigned int freq_out) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u8 reg = 0; + + reg = ak5702_read_reg_cache(codec, AK5702_PLL1); + switch (pll_id) { + case AK5702_PLL_POWERDOWN: + reg &= (~AK5702_PLL1_PM_MASK); + reg |= AK5702_PLL1_POWERDOWN; + break; + case AK5702_PLL_MASTER: + reg &= (~AK5702_PLL1_MODE_MASK); + reg |= AK5702_PLL1_MASTER; + reg |= AK5702_PLL1_POWERUP; + break; + case AK5702_PLL_SLAVE: + reg &= (~AK5702_PLL1_MODE_MASK); + reg |= AK5702_PLL1_SLAVE; + reg |= AK5702_PLL1_POWERUP; + break; + default: + return -ENODEV; + } + + switch (freq_in) { + case 11289600: + reg &= (~AK5702_PLL1_PLL_MASK); + reg |= AK5702_PLL1_11289600; + break; + case 12000000: + reg &= (~AK5702_PLL1_PLL_MASK); + reg |= AK5702_PLL1_12000000; + break; + case 12288000: + reg &= (~AK5702_PLL1_PLL_MASK); + reg |= AK5702_PLL1_12288000; + break; + case 19200000: + reg &= (~AK5702_PLL1_PLL_MASK); + reg |= AK5702_PLL1_19200000; + break; + default: + return -ENODEV; + } + + ak5702_write(codec, AK5702_PLL1, reg); + return 0; +} + +static int ak5702_set_dai_clkdiv(struct snd_soc_dai *codec_dai, + int div_id, int div) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u8 reg = 0; + + if (div_id == AK5702_BCLK_CLKDIV) { + reg = ak5702_read_reg_cache(codec, AK5702_FS1); + switch (div) { + case AK5702_BCLK_DIV_32: + reg &= (~AK5702_FS1_BCKO_MASK); + reg |= AK5702_FS1_BCKO_32FS; + ak5702_write(codec, AK5702_FS1, reg); + break; + case AK5702_BCLK_DIV_64: + reg &= (~AK5702_FS1_BCKO_MASK); + reg |= AK5702_FS1_BCKO_64FS; + ak5702_write(codec, AK5702_FS1, reg); + break; + default: + return -EINVAL; + } + } + return 0; +} + +static int ak5702_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + u8 reg = 0; + + switch (level) { + case SND_SOC_BIAS_ON: + case SND_SOC_BIAS_PREPARE: + reg = ak5702_read_reg_cache(codec, AK5702_PM1); + ak5702_write(codec, AK5702_PM1, reg | AK5702_PM1_PMVCM); + reg = ak5702_read_reg_cache(codec, AK5702_PLL1); + reg = reg | AK5702_PLL1_POWERUP | AK5702_PLL1_MASTER; + ak5702_write(codec, AK5702_PLL1, reg); + break; + case SND_SOC_BIAS_STANDBY: + reg = ak5702_read_reg_cache(codec, AK5702_PM1); + ak5702_write(codec, AK5702_PM1, reg | AK5702_PM1_PMVCM); + reg = ak5702_read_reg_cache(codec, AK5702_PLL1); + ak5702_write(codec, AK5702_PLL1, reg & (~AK5702_PLL1_POWERUP)); + break; + case SND_SOC_BIAS_OFF: + reg = ak5702_read_reg_cache(codec, AK5702_PM1); + ak5702_write(codec, AK5702_PM1, reg & (~AK5702_PM1_PMVCM)); + break; + } + + codec->bias_level = level; + return 0; +} + +static int ak5702_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + ak5702_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static int ak5702_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + int i; + + /* Bring the codec back up to standby first to minimise pop/clicks */ + ak5702_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + ak5702_set_bias_level(codec, codec->suspend_bias_level); + + /* Sync back everything else */ + for (i = 0; i < ARRAY_SIZE(ak5702_reg); i++) + ak5702_write(codec, i, ak5702_reg[i]); + + return 0; +} + +#define AK5702_RATES SNDRV_PCM_RATE_8000_48000 +#define AK5702_FORMATS SNDRV_PCM_FMTBIT_S16_LE + +struct snd_soc_dai_ops ak5702_ops = { + .set_fmt = ak5702_set_dai_fmt, + .set_sysclk = ak5702_set_dai_sysclk, + .set_clkdiv = ak5702_set_dai_clkdiv, + .set_pll = ak5702_set_dai_pll, +}; + +struct snd_soc_dai ak5702_dai = { + .name = "AK5702", + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 4, + .rates = AK5702_RATES, + .formats = AK5702_FORMATS, + }, + .ops = &ak5702_ops, +}; +EXPORT_SYMBOL_GPL(ak5702_dai); + +static struct snd_soc_codec *ak5702_codec; + +static int ak5702_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = ak5702_codec; + int ret = 0; + u8 reg = 0; + + socdev->card->codec = ak5702_codec; + + /* register pcms */ + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + printk(KERN_ERR "ak5702: failed to create pcms\n"); + goto pcm_err; + } + + /* power on device */ + reg = ak5702_read_reg_cache(codec, AK5702_PM1); + reg |= AK5702_PM1_PMVCM; + ak5702_write(codec, AK5702_PM1, reg); + + /* initialize ADC */ + reg = AK5702_SIG1_L_LIN1 | AK5702_SIG1_R_RIN2; + ak5702_write(codec, AK5702_SIG1, reg); + reg = AK5702_SIG2_L_LIN3 | AK5702_SIG2_R_RIN4; + ak5702_write(codec, AK5702_SIG2, reg); + + reg = ak5702_read_reg_cache(codec, AK5702_PM1); + reg = reg | AK5702_PM1_PMADAL | AK5702_PM1_PMADAR; + ak5702_write(codec, AK5702_PM1, reg); + reg = ak5702_read_reg_cache(codec, AK5702_PM2); + reg = reg | AK5702_PM2_PMADBL | AK5702_PM2_PMADBR; + ak5702_write(codec, AK5702_PM2, reg); + + /* initialize volume */ + ak5702_write(codec, AK5702_MICG1, AK5702_MICG1_INIT); + ak5702_write(codec, AK5702_MICG2, AK5702_MICG2_INIT); + ak5702_write(codec, AK5702_VOL1, AK5702_VOL1_IVOLAC); + ak5702_write(codec, AK5702_VOL2, AK5702_VOL2_IVOLBC); + ak5702_write(codec, AK5702_LVOL1, AK5702_LVOL1_INIT); + ak5702_write(codec, AK5702_RVOL1, AK5702_RVOL1_INIT); + ak5702_write(codec, AK5702_LVOL2, AK5702_LVOL2_INIT); + ak5702_write(codec, AK5702_RVOL2, AK5702_RVOL2_INIT); + + snd_soc_add_controls(codec, ak5702_snd_controls, + ARRAY_SIZE(ak5702_snd_controls)); + ak5702_add_widgets(codec); + + ret = snd_soc_init_card(socdev); + if (ret < 0) { + printk(KERN_ERR "ak5702: failed to register card\n"); + goto card_err; + } + + return ret; +card_err: + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +pcm_err: + kfree(codec->reg_cache); + return ret; +} + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +static int ak5702_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct ak5702_priv *ak5702; + struct snd_soc_codec *codec; + int ret; + + if (ak5702_codec) { + dev_err(&client->dev, + "Multiple AK5702 devices not supported\n"); + return -ENOMEM; + } + + codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); + if (codec == NULL) + return -ENOMEM; + + ak5702 = kzalloc(sizeof(struct ak5702_priv), GFP_KERNEL); + if (ak5702 == NULL) { + kfree(codec); + return -ENOMEM; + } + + codec->private_data = ak5702; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + i2c_set_clientdata(client, codec); + codec->control_data = client; + + codec->dev = &client->dev; + codec->name = "AK5702"; + codec->owner = THIS_MODULE; + codec->read = ak5702_read_reg_cache; + codec->write = ak5702_write; + codec->set_bias_level = ak5702_set_bias_level; + codec->dai = &ak5702_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(ak5702_reg); + codec->reg_cache = (void *)&ak5702_reg; + if (codec->reg_cache == NULL) + return -ENOMEM; + + codec->hw_write = (hw_write_t) i2c_master_send; + codec->hw_read = (hw_read_t) i2c_master_recv; + + ak5702_codec = codec; + ak5702_dai.dev = &client->dev; + + ret = snd_soc_register_codec(codec); + if (ret != 0) { + dev_err(codec->dev, "Failed to register codec: %d\n", ret); + return ret; + } + + ret = snd_soc_register_dai(&ak5702_dai); + if (ret != 0) { + dev_err(codec->dev, "Failed to register DAIs: %d\n", ret); + return ret; + } + + return ret; +} + +static __devexit int ak5702_i2c_remove(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + struct ak5702_priv *ak5702 = codec->private_data; + + snd_soc_unregister_dai(&ak5702_dai); + snd_soc_unregister_codec(codec); + kfree(codec); + kfree(ak5702); + ak5702_codec = NULL; + return 0; +} + +static const struct i2c_device_id ak5702_i2c_id[] = { + {"ak5702-i2c", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, ak5702_i2c_id); + +static struct i2c_driver ak5702_i2c_driver = { + .driver = { + .name = "ak5702-i2c", + .owner = THIS_MODULE, + }, + .probe = ak5702_i2c_probe, + .remove = __devexit_p(ak5702_i2c_remove), + .id_table = ak5702_i2c_id, +}; +#endif + +static int ak5702_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + if (codec->control_data) + ak5702_set_bias_level(codec, SND_SOC_BIAS_OFF); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) + i2c_del_driver(&ak5702_i2c_driver); +#endif + kfree(codec->private_data); + kfree(codec); + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_ak5702 = { + .probe = ak5702_probe, + .remove = ak5702_remove, + .suspend = ak5702_suspend, + .resume = ak5702_resume, +}; +EXPORT_SYMBOL_GPL(soc_codec_dev_ak5702); + +static int __init ak5702_modinit(void) +{ + return i2c_add_driver(&ak5702_i2c_driver); +} +module_init(ak5702_modinit); + +static void __exit ak5702_exit(void) +{ + i2c_del_driver(&ak5702_i2c_driver); +} +module_exit(ak5702_exit); + +MODULE_DESCRIPTION("Soc AK5702 driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/Makefile +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/Makefile @@ -3,6 +3,7 @@ snd-soc-ad73311-objs := ad73311.o snd-soc-ak4104-objs := ak4104.o snd-soc-ak4535-objs := ak4535.o +snd-soc-ak5702-objs := ak5702.o snd-soc-cs4270-objs := cs4270.o snd-soc-l3-objs := l3.o snd-soc-pcm3008-objs := pcm3008.o @@ -34,12 +35,18 @@ snd-soc-wm9705-objs := wm9705.o snd-soc-wm9712-objs := wm9712.o snd-soc-wm9713-objs := wm9713.o +snd-soc-sgtl5000-objs := sgtl5000.o +snd-soc-ak4647-objs := ak4647.o +snd-soc-stmp378x-codec-objs := stmp378x_codec.o +snd-soc-stmp3xxx-spdif-objs := stmp3xxx_spdif.o +snd-soc-bluetooth-objs := bluetooth.o obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o obj-$(CONFIG_SND_SOC_AK4104) += snd-soc-ak4104.o obj-$(CONFIG_SND_SOC_AK4535) += snd-soc-ak4535.o +obj-$(CONFIG_SND_SOC_AK5702) += snd-soc-ak5702.o obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o @@ -71,3 +78,8 @@ obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o +obj-$(CONFIG_SND_SOC_SGTL5000) += snd-soc-sgtl5000.o +obj-$(CONFIG_SND_SOC_AK4647) += snd-soc-ak4647.o +obj-$(CONFIG_SND_SOC_STMP378X_CODEC) += snd-soc-stmp378x-codec.o +obj-$(CONFIG_SND_SOC_STMP3XXX_SPDIF) += snd-soc-stmp3xxx-spdif.o +obj-$(CONFIG_SND_SOC_BLUETOOTH) += snd-soc-bluetooth.o --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/stmp3xxx_spdif.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/stmp3xxx_spdif.c @@ -0,0 +1,455 @@ +/* + * ALSA SoC STMP3xxx SPDIF transmitter driver + * + * Vladimir Barinov + * + * Copyright 2008 SigmaTel, Inc + * Copyright 2008 Embedded Alley Solutions, Inc + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "stmp3xxx_spdif.h" + +#define STMP3XXX_VERSION "0.1" +struct stmp3xxx_codec_priv { + struct clk *clk; + struct snd_soc_codec codec; +}; + +/* + * ALSA API + */ +static void __iomem *spdif_regmap[] = { + REGS_SPDIF_BASE + HW_SPDIF_CTRL, + REGS_SPDIF_BASE + HW_SPDIF_STAT, + REGS_SPDIF_BASE + HW_SPDIF_FRAMECTRL, + REGS_SPDIF_BASE + HW_SPDIF_SRR, + REGS_SPDIF_BASE + HW_SPDIF_DEBUG, + REGS_SPDIF_BASE + HW_SPDIF_DATA, + REGS_SPDIF_BASE + HW_SPDIF_VERSION, +}; + +/* + * ALSA core supports only 16 bit registers. It means we have to simulate it + * by virtually splitting a 32bit SPDIF registers into two halves + * high (bits 31:16) and low (bits 15:0). The routins abow detects which part + * of 32bit register is accessed. + */ +static int stmp3xxx_codec_write(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + unsigned int reg_val; + unsigned int mask = 0xffff; + + if (reg >= SPDIF_REGNUM) + return -EIO; + + if (reg & 0x1) { + mask <<= 16; + value <<= 16; + } + + reg_val = __raw_readl(spdif_regmap[reg >> 1]); + reg_val = (reg_val & ~mask) | value; + __raw_writel(reg_val, spdif_regmap[reg >> 1]); + + return 0; +} + +static unsigned int stmp3xxx_codec_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + unsigned int reg_val; + + if (reg >= SPDIF_REGNUM) + return -1; + + reg_val = __raw_readl(spdif_regmap[reg >> 1]); + if (reg & 1) + reg_val >>= 16; + + return reg_val & 0xffff; +} + +/* Codec controls */ +static const struct snd_kcontrol_new stmp3xxx_snd_controls[] = { + SOC_SINGLE("PRO", SPDIF_FRAMECTRL_L, 0, 0x1, 0), + SOC_SINGLE("AUDIO", SPDIF_FRAMECTRL_L, 1, 0x1, 0), + SOC_SINGLE("COPY", SPDIF_FRAMECTRL_L, 2, 0x1, 0), + SOC_SINGLE("PRE", SPDIF_FRAMECTRL_L, 3, 0x1, 0), + SOC_SINGLE("CC", SPDIF_FRAMECTRL_L, 4, 0x7F, 0), + SOC_SINGLE("L", SPDIF_FRAMECTRL_L, 12, 0x1, 0), + SOC_SINGLE("V", SPDIF_FRAMECTRL_L, 13, 0x1, 0), + SOC_SINGLE("USER DATA", SPDIF_FRAMECTRL_L, 14, 0x1, 0), + SOC_SINGLE("AUTO MUTE", SPDIF_FRAMECTRL_H, 16, 0x1, 0), + SOC_SINGLE("V CONFIG", SPDIF_FRAMECTRL_H, 17, 0x1, 0), +}; + +struct spdif_srr { + u32 rate; + u32 basemult; + u32 rate_factor; +}; + +static struct spdif_srr srr_values[] = { + {96000, 0x2, 0x0BB80}, + {88200, 0x2, 0x0AC44}, + {64000, 0x2, 0x07D00}, + {48000, 0x1, 0x0BB80}, + {44100, 0x1, 0x0AC44}, + {32000, 0x1, 0x07D00}, +}; + +static inline int get_srr_values(int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(srr_values); i++) + if (srr_values[i].rate == rate) + return i; + + return -1; +} + +static int stmp3xxx_codec_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int i; + u32 srr_value = 0; + u32 basemult; + + i = get_srr_values(params_rate(params)); + if (i < 0) + printk(KERN_WARNING "%s doesn't support rate %d\n", + codec->name, params_rate(params)); + else { + basemult = srr_values[i].basemult; + + srr_value = BF(basemult, SPDIF_SRR_BASEMULT) | + BF(srr_values[i].rate_factor, SPDIF_SRR_RATE); + + if (playback) + __raw_writel(srr_value, REGS_SPDIF_BASE + HW_SPDIF_SRR); + } + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + if (playback) + __raw_writel(BM_SPDIF_CTRL_WORD_LENGTH, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); + break; + case SNDRV_PCM_FORMAT_S32_LE: + if (playback) + __raw_writel(BM_SPDIF_CTRL_WORD_LENGTH, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + break; + default: + printk(KERN_WARNING "%s doesn't support format %d\n", + codec->name, params_format(params)); + } + + return 0; +} + +static void +stmp3xxx_codec_spdif_enable(struct stmp3xxx_codec_priv *stmp3xxx_spdif) +{ + /* Move SPDIF codec out of reset */ + __raw_writel(BM_SPDIF_CTRL_SFTRST, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + + /* Ungate SPDIF clocks */ + __raw_writel(BM_SPDIF_CTRL_CLKGATE, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + + /* 16 bit word length */ + __raw_writel(BM_SPDIF_CTRL_WORD_LENGTH, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); +} + +static void +stmp3xxx_codec_spdif_disable(struct stmp3xxx_codec_priv *stmp3xxx_spdif) +{ + /* Gate SPDIF clocks */ + __raw_writel(BM_SPDIF_CTRL_CLKGATE, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); +} + +static void stmp3xxx_codec_init(struct snd_soc_codec *codec) +{ + struct stmp3xxx_codec_priv *stmp3xxx_spdif = codec->private_data; + + /* Soft reset SPDIF block */ + __raw_writel(BM_SPDIF_CTRL_SFTRST, REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); + while (!(__raw_readl(REGS_SPDIF_BASE + HW_SPDIF_CTRL) & BM_SPDIF_CTRL_CLKGATE)); + + stmp3xxx_codec_spdif_enable(stmp3xxx_spdif); + + snd_soc_add_controls(codec, stmp3xxx_snd_controls, + ARRAY_SIZE(stmp3xxx_snd_controls)); +} + +static void stmp3xxx_codec_exit(struct snd_soc_codec *codec) +{ + struct stmp3xxx_codec_priv *stmp3xxx_spdif = codec->private_data; + + stmp3xxx_codec_spdif_disable(stmp3xxx_spdif); +} + +#define STMP3XXX_SPDIF_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) +#define STMP3XXX_SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +struct snd_soc_dai_ops stmp3xxx_spdif_codec_dai_ops = { + .hw_params = stmp3xxx_codec_hw_params, +}; + +struct snd_soc_dai stmp3xxx_spdif_codec_dai = { + .name = "stmp3xxx spdif", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = STMP3XXX_SPDIF_RATES, + .formats = STMP3XXX_SPDIF_FORMATS, + }, + .ops = &stmp3xxx_spdif_codec_dai_ops, +}; +EXPORT_SYMBOL_GPL(stmp3xxx_spdif_codec_dai); + +static struct snd_soc_codec *stmp3xxx_spdif_codec; + +static int stmp3xxx_codec_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + int ret = 0; + + socdev->card->codec = stmp3xxx_spdif_codec; + codec = stmp3xxx_spdif_codec; + + /* register pcms */ + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + dev_err(codec->dev, "failed to create pcms\n"); + return ret; + } + + stmp3xxx_codec_init(codec); + + /* Register the socdev */ + ret = snd_soc_init_card(socdev); + if (ret < 0) { + dev_err(codec->dev, "failed to register card\n"); + snd_soc_dapm_free(socdev); + snd_soc_free_pcms(socdev); + return ret; + } + + return 0; +} + +static int stmp3xxx_codec_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + stmp3xxx_codec_exit(codec); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxx_codec_suspend(struct platform_device *pdev, + pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + struct stmp3xxx_codec_priv *stmp3xxx_spdif; + int ret = -EINVAL; + + if (codec == NULL) + goto out; + + stmp3xxx_spdif = codec->private_data; + + stmp3xxx_codec_spdif_disable(stmp3xxx_spdif); + clk_disable(stmp3xxx_spdif->clk); + ret = 0; + +out: + return ret; +} + +static int stmp3xxx_codec_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + struct stmp3xxx_codec_priv *stmp3xxx_spdif; + int ret = -EINVAL; + + if (codec == NULL) + goto out; + + stmp3xxx_spdif = codec->private_data; + clk_enable(stmp3xxx_spdif->clk); + + /* Soft reset SPDIF block */ + __raw_writel(BM_SPDIF_CTRL_SFTRST, REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); + while (!(__raw_readl(REGS_SPDIF_BASE + HW_SPDIF_CTRL) & BM_SPDIF_CTRL_CLKGATE)); + + stmp3xxx_codec_spdif_enable(stmp3xxx_spdif); + + ret = 0; + +out: + return ret; +} +#else +#define stmp3xxx_codec_suspend NULL +#define stmp3xxx_codec_resume NULL +#endif /* CONFIG_PM */ + +struct snd_soc_codec_device soc_spdif_codec_dev_stmp3xxx = { + .probe = stmp3xxx_codec_probe, + .remove = stmp3xxx_codec_remove, + .suspend = stmp3xxx_codec_suspend, + .resume = stmp3xxx_codec_resume, +}; +EXPORT_SYMBOL_GPL(soc_spdif_codec_dev_stmp3xxx); + +static int __init stmp3xxx_spdif_probe(struct platform_device *pdev) +{ + struct snd_soc_codec *codec; + struct stmp3xxx_codec_priv *stmp3xxx_spdif; + int ret = 0; + + dev_info(&pdev->dev, + "STMP3XXX SPDIF Audio Transmitter %s\n", STMP3XXX_VERSION); + + stmp3xxx_spdif = + kzalloc(sizeof(struct stmp3xxx_codec_priv), GFP_KERNEL); + if (stmp3xxx_spdif == NULL) + return -ENOMEM; + + codec = &stmp3xxx_spdif->codec; + codec->name = "stmp3xxx spdif"; + codec->owner = THIS_MODULE; + codec->private_data = stmp3xxx_spdif; + codec->read = stmp3xxx_codec_read; + codec->write = stmp3xxx_codec_write; + codec->dai = &stmp3xxx_spdif_codec_dai; + codec->num_dai = 1; + + platform_set_drvdata(pdev, stmp3xxx_spdif); + stmp3xxx_spdif_codec = codec; + + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + /* Turn on audio clock */ + stmp3xxx_spdif->clk = clk_get(&pdev->dev, "spdif"); + if (IS_ERR(stmp3xxx_spdif->clk)) { + ret = PTR_ERR(stmp3xxx_spdif->clk); + dev_err(&pdev->dev, "Clocks initialization failed\n"); + goto clk_err; + } + clk_enable(stmp3xxx_spdif->clk); + + ret = snd_soc_register_codec(codec); + if (ret) { + dev_err(&pdev->dev, "failed to register card\n"); + goto card_err; + } + + ret = snd_soc_register_dai(&stmp3xxx_spdif_codec_dai); + if (ret) { + dev_err(&pdev->dev, "failed to register card\n"); + goto dai_err; + } + + return 0; + +dai_err: + snd_soc_unregister_codec(codec); +card_err: + clk_disable(stmp3xxx_spdif->clk); + clk_put(stmp3xxx_spdif->clk); +clk_err: + kfree(stmp3xxx_spdif); + return ret; +} +static int __devexit stmp3xxx_spdif_remove(struct platform_device *pdev) +{ + struct stmp3xxx_codec_priv *stmp3xxx_spdif = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = &stmp3xxx_spdif->codec; + + snd_soc_unregister_codec(codec); + + clk_disable(stmp3xxx_spdif->clk); + clk_put(stmp3xxx_spdif->clk); + + kfree(stmp3xxx_spdif); + + return 0; +} + +struct platform_driver stmp3xxx_spdif_driver = { + .driver = { + .name = "stmp3xxx-spdif", + }, + .probe = stmp3xxx_spdif_probe, + .remove = __devexit_p(stmp3xxx_spdif_remove), +}; + +static int __init stmp3xxx_spdif_init(void) +{ + return platform_driver_register(&stmp3xxx_spdif_driver); +} + +static void __exit stmp3xxx_spdif_exit(void) +{ + return platform_driver_unregister(&stmp3xxx_spdif_driver); +} + +module_init(stmp3xxx_spdif_init); +module_exit(stmp3xxx_spdif_exit); + +MODULE_DESCRIPTION("STMP3XXX SPDIF transmitter"); +MODULE_AUTHOR("Vladimir Barinov"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/wm8350.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/wm8350.c @@ -406,7 +406,6 @@ static const char *wm8350_pol[] = { "Normal", "Inv R", "Inv L", "Inv L & R" }; static const char *wm8350_dacmutem[] = { "Normal", "Soft" }; static const char *wm8350_dacmutes[] = { "Fast", "Slow" }; -static const char *wm8350_dacfilter[] = { "Normal", "Sloping" }; static const char *wm8350_adcfilter[] = { "None", "High Pass" }; static const char *wm8350_adchp[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" }; static const char *wm8350_lr[] = { "Left", "Right" }; @@ -416,7 +415,6 @@ SOC_ENUM_SINGLE(WM8350_DAC_CONTROL, 0, 4, wm8350_pol), SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME, 14, 2, wm8350_dacmutem), SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME, 13, 2, wm8350_dacmutes), - SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME, 12, 2, wm8350_dacfilter), SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 15, 2, wm8350_adcfilter), SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 8, 4, wm8350_adchp), SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 0, 4, wm8350_pol), @@ -444,10 +442,9 @@ 0, 255, 0, dac_pcm_tlv), SOC_ENUM("Playback PCM Mute Function", wm8350_enum[2]), SOC_ENUM("Playback PCM Mute Speed", wm8350_enum[3]), - SOC_ENUM("Playback PCM Filter", wm8350_enum[4]), - SOC_ENUM("Capture PCM Filter", wm8350_enum[5]), - SOC_ENUM("Capture PCM HP Filter", wm8350_enum[6]), - SOC_ENUM("Capture ADC Inversion", wm8350_enum[7]), + SOC_ENUM("Capture PCM Filter", wm8350_enum[4]), + SOC_ENUM("Capture PCM HP Filter", wm8350_enum[5]), + SOC_ENUM("Capture ADC Inversion", wm8350_enum[6]), SOC_WM8350_DOUBLE_R_TLV("Capture PCM Volume", WM8350_ADC_DIGITAL_VOLUME_L, WM8350_ADC_DIGITAL_VOLUME_R, @@ -580,7 +577,7 @@ SOC_DAPM_SINGLE_TLV("L3 Capture Volume", WM8350_INPUT_MIXER_VOLUME_L, 9, 7, 0, out_mix_tlv), SOC_DAPM_SINGLE("PGA Capture Switch", - WM8350_LEFT_INPUT_VOLUME, 14, 1, 0), + WM8350_LEFT_INPUT_VOLUME, 14, 1, 1), }; /* Right Input Mixer */ @@ -590,7 +587,7 @@ SOC_DAPM_SINGLE_TLV("L3 Capture Volume", WM8350_INPUT_MIXER_VOLUME_R, 13, 7, 0, out_mix_tlv), SOC_DAPM_SINGLE("PGA Capture Switch", - WM8350_RIGHT_INPUT_VOLUME, 14, 1, 0), + WM8350_RIGHT_INPUT_VOLUME, 14, 1, 1), }; /* Left Mic Mixer */ @@ -613,7 +610,7 @@ /* Out4 Capture Mux */ static const struct snd_kcontrol_new wm8350_out4_capture_controls = -SOC_DAPM_ENUM("Route", wm8350_enum[8]); +SOC_DAPM_ENUM("Route", wm8350_enum[7]); static const struct snd_soc_dapm_widget wm8350_dapm_widgets[] = { @@ -993,6 +990,7 @@ struct snd_soc_dai *codec_dai) { struct snd_soc_codec *codec = codec_dai->codec; + struct wm8350 *wm8350 = codec->control_data; u16 iface = wm8350_codec_read(codec, WM8350_AI_FORMATING) & ~WM8350_AIF_WL_MASK; @@ -1012,6 +1010,19 @@ } wm8350_codec_write(codec, WM8350_AI_FORMATING, iface); + + /* The sloping stopband filter is recommended for use with + * lower sample rates to improve performance. + */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (params_rate(params) < 24000) + wm8350_set_bits(wm8350, WM8350_DAC_MUTE_VOLUME, + WM8350_DAC_SB_FILT); + else + wm8350_clear_bits(wm8350, WM8350_DAC_MUTE_VOLUME, + WM8350_DAC_SB_FILT); + } + return 0; } @@ -1116,7 +1127,7 @@ fll_1 = wm8350_codec_read(codec, WM8350_FLL_CONTROL_1) & ~(WM8350_FLL_OUTDIV_MASK | WM8350_FLL_RSP_RATE_MASK | 0xc000); wm8350_codec_write(codec, WM8350_FLL_CONTROL_1, - fll_1 | (fll_div.div << 8) | 0x50); + fll_1 | (fll_div.div << 8)); wm8350_codec_write(codec, WM8350_FLL_CONTROL_2, (fll_div.ratio << 11) | (fll_div. n & WM8350_FLL_N_MASK)); @@ -1454,13 +1465,13 @@ /* Latch VU bits & mute */ wm8350_set_bits(wm8350, WM8350_LOUT1_VOLUME, - WM8350_OUT1_VU | WM8350_OUT1L_MUTE); + WM8350_OUT1_VU); wm8350_set_bits(wm8350, WM8350_LOUT2_VOLUME, - WM8350_OUT2_VU | WM8350_OUT2L_MUTE); + WM8350_OUT2_VU); wm8350_set_bits(wm8350, WM8350_ROUT1_VOLUME, - WM8350_OUT1_VU | WM8350_OUT1R_MUTE); + WM8350_OUT1_VU); wm8350_set_bits(wm8350, WM8350_ROUT2_VOLUME, - WM8350_OUT2_VU | WM8350_OUT2R_MUTE); + WM8350_OUT2_VU); wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L); wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/wm9712.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/wm9712.c @@ -464,7 +464,8 @@ { u16 *cache = codec->reg_cache; - soc_ac97_ops.write(codec->ac97, reg, val); + if (reg < 0x7c) + soc_ac97_ops.write(codec->ac97, reg, val); reg = reg >> 1; if (reg < (ARRAY_SIZE(wm9712_reg))) cache[reg] = val; --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/stmp3xxx_spdif.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/stmp3xxx_spdif.h @@ -0,0 +1,37 @@ +/* + * ALSA SoC STMP378x SPDIF codec driver + * + * Vladimir Barinov + * + * Copyright 2008 SigmaTel, Inc + * Copyright 2008 Embedded Alley Solutions, Inc + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#ifndef __STMP3XXX_SPDIF_CODEC_H +#define __STMP3XXX_SPDIF_CODEC_H + +#define SPDIF_CTRL_L 0 +#define SPDIF_CTRL_H 1 +#define SPDIF_STAT_L 2 +#define SPDIF_STAT_H 3 +#define SPDIF_FRAMECTRL_L 4 +#define SPDIF_FRAMECTRL_H 5 +#define SPDIF_SRR_L 6 +#define SPDIF_SRR_H 7 +#define SPDIF_DEBUG_L 8 +#define SPDIF_DEBUG_H 9 +#define SPDIF_DATA_L 10 +#define SPDIF_DATA_H 11 +#define SPDIF_VERSION_L 12 +#define SPDIF_VERSION_H 13 + +#define SPDIF_REGNUM 14 + +extern struct snd_soc_dai stmp3xxx_spdif_codec_dai; +extern struct snd_soc_codec_device soc_spdif_codec_dev_stmp3xxx; + +#endif /* __STMP3XXX_SPDIF_CODEC_H */ --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/stmp378x_codec.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/stmp378x_codec.h @@ -0,0 +1,87 @@ +/* + * ALSA codec for Freescale STMP378X + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __STMP378X_CODEC_H +#define __STMP378X_CODEC_H + +#define DAC_CTRL_L 0 +#define DAC_CTRL_H 1 +#define DAC_STAT_L 2 +#define DAC_STAT_H 3 +#define DAC_SRR_L 4 +#define DAC_VOLUME_L 6 +#define DAC_VOLUME_H 7 +#define DAC_DEBUG_L 8 +#define DAC_DEBUG_H 9 +#define DAC_HPVOL_L 10 +#define DAC_HPVOL_H 11 +#define DAC_PWRDN_L 12 +#define DAC_PWRDN_H 13 +#define DAC_REFCTRL_L 14 +#define DAC_REFCTRL_H 15 +#define DAC_ANACTRL_L 16 +#define DAC_ANACTRL_H 17 +#define DAC_TEST_L 18 +#define DAC_TEST_H 19 +#define DAC_BISTCTRL_L 20 +#define DAC_BISTCTRL_H 21 +#define DAC_BISTSTAT0_L 22 +#define DAC_BISTSTAT0_H 23 +#define DAC_BISTSTAT1_L 24 +#define DAC_BISTSTAT1_H 25 +#define DAC_ANACLKCTRL_L 26 +#define DAC_ANACLKCTRL_H 27 +#define DAC_DATA_L 28 +#define DAC_DATA_H 29 +#define DAC_SPEAKERCTRL_L 30 +#define DAC_SPEAKERCTRL_H 31 +#define DAC_VERSION_L 32 +#define DAC_VERSION_H 33 +#define ADC_CTRL_L 34 +#define ADC_CTRL_H 35 +#define ADC_STAT_L 36 +#define ADC_STAT_H 37 +#define ADC_SRR_L 38 +#define ADC_SRR_H 39 +#define ADC_VOLUME_L 40 +#define ADC_VOLUME_H 41 +#define ADC_DEBUG_L 42 +#define ADC_DEBUG_H 43 +#define ADC_ADCVOL_L 44 +#define ADC_ADCVOL_H 45 +#define ADC_MICLINE_L 46 +#define ADC_MICLINE_H 47 +#define ADC_ANACLKCTRL_L 48 +#define ADC_ANACLKCTRL_H 49 +#define ADC_DATA_L 50 +#define ADC_DATA_H 51 + +#define ADC_REGNUM 52 + +#define DAC_VOLUME_MIN 0x37 +#define DAC_VOLUME_MAX 0xFE +#define ADC_VOLUME_MIN 0x37 +#define ADC_VOLUME_MAX 0xFE +#define HP_VOLUME_MAX 0x0 +#define HP_VOLUME_MIN 0x7F +#define LO_VOLUME_MAX 0x0 +#define LO_VOLUME_MIN 0x1F + +extern struct snd_soc_dai stmp378x_codec_dai; +extern struct snd_soc_codec_device soc_codec_dev_stmp378x; + +#endif /* __STMP378X_CODEC_H */ --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/sgtl5000.h +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/sgtl5000.h @@ -0,0 +1,399 @@ +/* + * sgtl5000.h - SGTL5000 audio codec interface + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef _SGTL5000_H +#define _SGTL5000_H + +#include + +extern struct snd_soc_dai sgtl5000_dai; +extern struct snd_soc_codec_device soc_codec_dev_sgtl5000; + +/* + * Register values. + */ +#define SGTL5000_CHIP_ID 0x0000 +#define SGTL5000_CHIP_DIG_POWER 0x0002 +#define SGTL5000_CHIP_CLK_CTRL 0x0004 +#define SGTL5000_CHIP_I2S_CTRL 0x0006 +#define SGTL5000_CHIP_SSS_CTRL 0x000a +#define SGTL5000_CHIP_ADCDAC_CTRL 0x000e +#define SGTL5000_CHIP_DAC_VOL 0x0010 +#define SGTL5000_CHIP_PAD_STRENGTH 0x0014 +#define SGTL5000_CHIP_ANA_ADC_CTRL 0x0020 +#define SGTL5000_CHIP_ANA_HP_CTRL 0x0022 +#define SGTL5000_CHIP_ANA_CTRL 0x0024 +#define SGTL5000_CHIP_LINREG_CTRL 0x0026 +#define SGTL5000_CHIP_REF_CTRL 0x0028 +#define SGTL5000_CHIP_MIC_CTRL 0x002a +#define SGTL5000_CHIP_LINE_OUT_CTRL 0x002c +#define SGTL5000_CHIP_LINE_OUT_VOL 0x002e +#define SGTL5000_CHIP_ANA_POWER 0x0030 +#define SGTL5000_CHIP_PLL_CTRL 0x0032 +#define SGTL5000_CHIP_CLK_TOP_CTRL 0x0034 +#define SGTL5000_CHIP_ANA_STATUS 0x0036 +#define SGTL5000_CHIP_SHORT_CTRL 0x003c +#define SGTL5000_CHIP_ANA_TEST2 0x003a +#define SGTL5000_DAP_CTRL 0x0100 +#define SGTL5000_DAP_PEQ 0x0102 +#define SGTL5000_DAP_BASS_ENHANCE 0x0104 +#define SGTL5000_DAP_BASS_ENHANCE_CTRL 0x0106 +#define SGTL5000_DAP_AUDIO_EQ 0x0108 +#define SGTL5000_DAP_SURROUND 0x010a +#define SGTL5000_DAP_FLT_COEF_ACCESS 0x010c +#define SGTL5000_DAP_COEF_WR_B0_MSB 0x010e +#define SGTL5000_DAP_COEF_WR_B0_LSB 0x0110 +#define SGTL5000_DAP_EQ_BASS_BAND0 0x0116 +#define SGTL5000_DAP_EQ_BASS_BAND1 0x0118 +#define SGTL5000_DAP_EQ_BASS_BAND2 0x011a +#define SGTL5000_DAP_EQ_BASS_BAND3 0x011c +#define SGTL5000_DAP_EQ_BASS_BAND4 0x011e +#define SGTL5000_DAP_MAIN_CHAN 0x0120 +#define SGTL5000_DAP_MIX_CHAN 0x0122 +#define SGTL5000_DAP_AVC_CTRL 0x0124 +#define SGTL5000_DAP_AVC_THRESHOLD 0x0126 +#define SGTL5000_DAP_AVC_ATTACK 0x0128 +#define SGTL5000_DAP_AVC_DECAY 0x012a +#define SGTL5000_DAP_COEF_WR_B1_MSB 0x012c +#define SGTL5000_DAP_COEF_WR_B1_LSB 0x012e +#define SGTL5000_DAP_COEF_WR_B2_MSB 0x0130 +#define SGTL5000_DAP_COEF_WR_B2_LSB 0x0132 +#define SGTL5000_DAP_COEF_WR_A1_MSB 0x0134 +#define SGTL5000_DAP_COEF_WR_A1_LSB 0x0136 +#define SGTL5000_DAP_COEF_WR_A2_MSB 0x0138 +#define SGTL5000_DAP_COEF_WR_A2_LSB 0x013a + +/* + * Field Definitions. + */ + +/* + * SGTL5000_CHIP_ID + */ +#define SGTL5000_PARTID_MASK 0xff00 +#define SGTL5000_PARTID_SHIFT 8 +#define SGTL5000_PARTID_WIDTH 8 +#define SGTL5000_PARTID_PART_ID 0xa0 +#define SGTL5000_REVID_MASK 0x00ff +#define SGTL5000_REVID_SHIFT 0 +#define SGTL5000_REVID_WIDTH 8 + +/* + * SGTL5000_CHIP_DIG_POWER + */ +#define SGTL5000_ADC_EN 0x0040 +#define SGTL5000_DAC_EN 0x0020 +#define SGTL5000_DAP_POWERUP 0x0010 +#define SGTL5000_I2S_OUT_POWERUP 0x0002 +#define SGTL5000_I2S_IN_POWERUP 0x0001 + +/* + * SGTL5000_CHIP_CLK_CTRL + */ +#define SGTL5000_SYS_FS_MASK 0x00c0 +#define SGTL5000_SYS_FS_SHIFT 2 +#define SGTL5000_SYS_FS_WIDTH 2 +#define SGTL5000_SYS_FS_32k 0x0 +#define SGTL5000_SYS_FS_44_1k 0x1 +#define SGTL5000_SYS_FS_48k 0x2 +#define SGTL5000_SYS_FS_96k 0x3 +#define SGTL5000_MCLK_FREQ_MASK 0x0003 +#define SGTL5000_MCLK_FREQ_SHIFT 0 +#define SGTL5000_MCLK_FREQ_WIDTH 2 +#define SGTL5000_MCLK_FREQ_256FS 0x0 +#define SGTL5000_MCLK_FREQ_384FS 0x1 +#define SGTL5000_MCLK_FREQ_512FS 0x2 +#define SGTL5000_MCLK_FREQ_PLL 0x3 + +/* + * SGTL5000_CHIP_I2S_CTRL + */ +#define SGTL5000_I2S_SCLKFREQ_MASK 0x0100 +#define SGTL5000_I2S_SCLKFREQ_SHIFT 8 +#define SGTL5000_I2S_SCLKFREQ_WIDTH 1 +#define SGTL5000_I2S_SCLKFREQ_64FS 0x0 +#define SGTL5000_I2S_SCLKFREQ_32FS 0x1 /* Not for RJ mode */ +#define SGTL5000_I2S_MASTER 0x0080 +#define SGTL5000_I2S_SCLK_INV 0x0040 +#define SGTL5000_I2S_DLEN_MASK 0x0030 +#define SGTL5000_I2S_DLEN_SHIFT 4 +#define SGTL5000_I2S_DLEN_WIDTH 2 +#define SGTL5000_I2S_DLEN_32 0x0 +#define SGTL5000_I2S_DLEN_24 0x1 +#define SGTL5000_I2S_DLEN_20 0x2 +#define SGTL5000_I2S_DLEN_16 0x3 +#define SGTL5000_I2S_MODE_MASK 0x000c +#define SGTL5000_I2S_MODE_SHIFT 2 +#define SGTL5000_I2S_MODE_WIDTH 2 +#define SGTL5000_I2S_MODE_I2S_LJ 0x0 +#define SGTL5000_I2S_MODE_RJ 0x1 +#define SGTL5000_I2S_MODE_PCM 0x2 +#define SGTL5000_I2S_LRALIGN 0x0002 +#define SGTL5000_I2S_LRPOL 0x0001 /* set for which mode */ + +/* + * SGTL5000_CHIP_SSS_CTRL + */ +#define SGTL5000_DAP_MIX_LRSWAP 0x4000 +#define SGTL5000_DAP_LRSWAP 0x2000 +#define SGTL5000_DAC_LRSWAP 0x1000 +#define SGTL5000_I2S_OUT_LRSWAP 0x0400 +#define SGTL5000_DAP_MIX_SEL_MASK 0x0300 +#define SGTL5000_DAP_MIX_SEL_SHIFT 8 +#define SGTL5000_DAP_MIX_SEL_WIDTH 2 +#define SGTL5000_DAP_MIX_SEL_ADC 0x0 +#define SGTL5000_DAP_MIX_SEL_I2S_IN 0x1 +#define SGTL5000_DAP_SEL_MASK 0x00c0 +#define SGTL5000_DAP_SEL_SHIFT 6 +#define SGTL5000_DAP_SEL_WIDTH 2 +#define SGTL5000_DAP_SEL_ADC 0x0 +#define SGTL5000_DAP_SEL_I2S_IN 0x1 +#define SGTL5000_DAC_SEL_MASK 0x0030 +#define SGTL5000_DAC_SEL_SHIFT 4 +#define SGTL5000_DAC_SEL_WIDTH 2 +#define SGTL5000_DAC_SEL_ADC 0x0 +#define SGTL5000_DAC_SEL_I2S_IN 0x1 +#define SGTL5000_DAC_SEL_DAP 0x3 +#define SGTL5000_I2S_OUT_SEL_MASK 0x0003 +#define SGTL5000_I2S_OUT_SEL_SHIFT 0 +#define SGTL5000_I2S_OUT_SEL_WIDTH 2 +#define SGTL5000_I2S_OUT_SEL_ADC 0x0 +#define SGTL5000_I2S_OUT_SEL_I2S_IN 0x1 +#define SGTL5000_I2S_OUT_SEL_DAP 0x3 + +/* + * SGTL5000_CHIP_ADCDAC_CTRL + */ +#define SGTL5000_VOL_BUSY_DAC_RIGHT 0x2000 +#define SGTL5000_VOL_BUSY_DAC_LEFT 0x1000 +#define SGTL5000_DAC_VOL_RAMP_EN 0x0200 +#define SGTL5000_DAC_VOL_RAMP_EXPO 0x0100 +#define SGTL5000_DAC_MUTE_RIGHT 0x0008 +#define SGTL5000_DAC_MUTE_LEFT 0x0004 +#define SGTL5000_ADC_HPF_FREEZE 0x0002 +#define SGTL5000_ADC_HPF_BYPASS 0x0001 + +/* + * SGTL5000_CHIP_DAC_VOL + */ +#define SGTL5000_DAC_VOL_RIGHT_MASK 0xff00 +#define SGTL5000_DAC_VOL_RIGHT_SHIFT 8 +#define SGTL5000_DAC_VOL_RIGHT_WIDTH 8 +#define SGTL5000_DAC_VOL_LEFT_MASK 0x00ff +#define SGTL5000_DAC_VOL_LEFT_SHIFT 0 +#define SGTL5000_DAC_VOL_LEFT_WIDTH 8 + +/* + * SGTL5000_CHIP_PAD_STRENGTH + */ +#define SGTL5000_PAD_I2S_LRCLK_MASK 0x0300 +#define SGTL5000_PAD_I2S_LRCLK_SHIFT 8 +#define SGTL5000_PAD_I2S_LRCLK_WIDTH 2 +#define SGTL5000_PAD_I2S_SCLK_MASK 0x00c0 +#define SGTL5000_PAD_I2S_SCLK_SHIFT 6 +#define SGTL5000_PAD_I2S_SCLK_WIDTH 2 +#define SGTL5000_PAD_I2S_DOUT_MASK 0x0030 +#define SGTL5000_PAD_I2S_DOUT_SHIFT 4 +#define SGTL5000_PAD_I2S_DOUT_WIDTH 2 +#define SGTL5000_PAD_I2C_SDA_MASK 0x000c +#define SGTL5000_PAD_I2C_SDA_SHIFT 2 +#define SGTL5000_PAD_I2C_SDA_WIDTH 2 +#define SGTL5000_PAD_I2C_SCL_MASK 0x0003 +#define SGTL5000_PAD_I2C_SCL_SHIFT 0 +#define SGTL5000_PAD_I2C_SCL_WIDTH 2 + +/* + * SGTL5000_CHIP_ANA_ADC_CTRL + */ +#define SGTL5000_ADC_VOL_M6DB 0x0100 +#define SGTL5000_ADC_VOL_RIGHT_MASK 0x00f0 +#define SGTL5000_ADC_VOL_RIGHT_SHIFT 4 +#define SGTL5000_ADC_VOL_RIGHT_WIDTH 4 +#define SGTL5000_ADC_VOL_LEFT_MASK 0x000f +#define SGTL5000_ADC_VOL_LEFT_SHIFT 0 +#define SGTL5000_ADC_VOL_LEFT_WIDTH 4 + +/* + * SGTL5000_CHIP_ANA_HP_CTRL + */ +#define SGTL5000_HP_VOL_RIGHT_MASK 0x7f00 +#define SGTL5000_HP_VOL_RIGHT_SHIFT 8 +#define SGTL5000_HP_VOL_RIGHT_WIDTH 7 +#define SGTL5000_HP_VOL_LEFT_MASK 0x007f +#define SGTL5000_HP_VOL_LEFT_SHIFT 0 +#define SGTL5000_HP_VOL_LEFT_WIDTH 7 + +/* + * SGTL5000_CHIP_ANA_CTRL + */ +#define SGTL5000_LINE_OUT_MUTE 0x0100 +#define SGTL5000_HP_SEL_MASK 0x0040 +#define SGTL5000_HP_SEL_SHIFT 6 +#define SGTL5000_HP_SEL_WIDTH 1 +#define SGTL5000_HP_SEL_DAC 0x0 +#define SGTL5000_HP_SEL_LINE_IN 0x1 +#define SGTL5000_HP_ZCD_EN 0x0020 +#define SGTL5000_HP_MUTE 0x0010 +#define SGTL5000_ADC_SEL_MASK 0x0004 +#define SGTL5000_ADC_SEL_SHIFT 2 +#define SGTL5000_ADC_SEL_WIDTH 1 +#define SGTL5000_ADC_SEL_MIC 0x0 +#define SGTL5000_ADC_SEL_LINE_IN 0x1 +#define SGTL5000_ADC_ZCD_EN 0x0002 +#define SGTL5000_ADC_MUTE 0x0001 + +/* + * SGTL5000_CHIP_LINREG_CTRL + */ +#define SGTL5000_VDDC_MAN_ASSN_MASK 0x0040 +#define SGTL5000_VDDC_MAN_ASSN_SHIFT 6 +#define SGTL5000_VDDC_MAN_ASSN_WIDTH 1 +#define SGTL5000_VDDC_MAN_ASSN_VDDA 0x0 +#define SGTL5000_VDDC_MAN_ASSN_VDDIO 0x1 +#define SGTL5000_VDDC_ASSN_OVRD 0x0020 +#define SGTL5000_LINREG_VDDD_MASK 0x000f +#define SGTL5000_LINREG_VDDD_SHIFT 0 +#define SGTL5000_LINREG_VDDD_WIDTH 4 + +/* + * SGTL5000_CHIP_REF_CTRL + */ +#define SGTL5000_ANA_GND_MASK 0x01f0 +#define SGTL5000_ANA_GND_SHIFT 4 +#define SGTL5000_ANA_GND_WIDTH 5 +#define SGTL5000_ANA_GND_BASE 800 /* mv */ +#define SGTL5000_ANA_GND_STP 25 /*mv */ +#define SGTL5000_BIAS_CTRL_MASK 0x000e +#define SGTL5000_BIAS_CTRL_SHIFT 1 +#define SGTL5000_BIAS_CTRL_WIDTH 3 +#define SGTL5000_SMALL_POP 0x0001 + +/* + * SGTL5000_CHIP_MIC_CTRL + */ +#define SGTL5000_BIAS_R_MASK 0x0200 +#define SGTL5000_BIAS_R_SHIFT 8 +#define SGTL5000_BIAS_R_WIDTH 2 +#define SGTL5000_BIAS_R_off 0x0 +#define SGTL5000_BIAS_R_2K 0x1 +#define SGTL5000_BIAS_R_4k 0x2 +#define SGTL5000_BIAS_R_8k 0x3 +#define SGTL5000_BIAS_VOLT_MASK 0x0070 +#define SGTL5000_BIAS_VOLT_SHIFT 4 +#define SGTL5000_BIAS_VOLT_WIDTH 3 +#define SGTL5000_MIC_GAIN_MASK 0x0003 +#define SGTL5000_MIC_GAIN_SHIFT 0 +#define SGTL5000_MIC_GAIN_WIDTH 2 + +/* + * SGTL5000_CHIP_LINE_OUT_CTRL + */ +#define SGTL5000_LINE_OUT_CURRENT_MASK 0x0f00 +#define SGTL5000_LINE_OUT_CURRENT_SHIFT 8 +#define SGTL5000_LINE_OUT_CURRENT_WIDTH 4 +#define SGTL5000_LINE_OUT_CURRENT_180u 0x0 +#define SGTL5000_LINE_OUT_CURRENT_270u 0x1 +#define SGTL5000_LINE_OUT_CURRENT_360u 0x3 +#define SGTL5000_LINE_OUT_CURRENT_450u 0x7 +#define SGTL5000_LINE_OUT_CURRENT_540u 0xf +#define SGTL5000_LINE_OUT_GND_MASK 0x003f +#define SGTL5000_LINE_OUT_GND_SHIFT 0 +#define SGTL5000_LINE_OUT_GND_WIDTH 6 +#define SGTL5000_LINE_OUT_GND_BASE 800 /* mv */ +#define SGTL5000_LINE_OUT_GND_STP 25 +#define SGTL5000_LINE_OUT_GND_MAX 0x23 + +/* + * SGTL5000_CHIP_LINE_OUT_VOL + */ +#define SGTL5000_LINE_OUT_VOL_RIGHT_MASK 0x1f00 +#define SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT 8 +#define SGTL5000_LINE_OUT_VOL_RIGHT_WIDTH 5 +#define SGTL5000_LINE_OUT_VOL_LEFT_MASK 0x001f +#define SGTL5000_LINE_OUT_VOL_LEFT_SHIFT 0 +#define SGTL5000_LINE_OUT_VOL_LEFT_WIDTH 5 + +/* + * SGTL5000_CHIP_ANA_POWER + */ +#define SGTL5000_DAC_STEREO 0x4000 +#define SGTL5000_LINREG_SIMPLE_POWERUP 0x2000 +#define SGTL5000_STARTUP_POWERUP 0x1000 +#define SGTL5000_VDDC_CHRGPMP_POWERUP 0x0800 +#define SGTL5000_PLL_POWERUP 0x0400 +#define SGTL5000_LINEREG_D_POWERUP 0x0200 +#define SGTL5000_VCOAMP_POWERUP 0x0100 +#define SGTL5000_VAG_POWERUP 0x0080 +#define SGTL5000_ADC_STEREO 0x0040 +#define SGTL5000_REFTOP_POWERUP 0x0020 +#define SGTL5000_HP_POWERUP 0x0010 +#define SGTL5000_DAC_POWERUP 0x0008 +#define SGTL5000_CAPLESS_HP_POWERUP 0x0004 +#define SGTL5000_ADC_POWERUP 0x0002 +#define SGTL5000_LINE_OUT_POWERUP 0x0001 + +/* + * SGTL5000_CHIP_PLL_CTRL + */ +#define SGTL5000_PLL_INT_DIV_MASK 0xf800 +#define SGTL5000_PLL_INT_DIV_SHIFT 11 +#define SGTL5000_PLL_INT_DIV_WIDTH 5 +#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700 +#define SGTL5000_PLL_FRAC_DIV_SHIFT 0 +#define SGTL5000_PLL_FRAC_DIV_WIDTH 11 + +/* + * SGTL5000_CHIP_CLK_TOP_CTRL + */ +#define SGTL5000_INT_OSC_EN 0x0800 +#define SGTL5000_INPUT_FREQ_DIV2 0x0008 + +/* + * SGTL5000_CHIP_ANA_STATUS + */ +#define SGTL5000_HP_LRSHORT 0x0200 +#define SGTL5000_CAPLESS_SHORT 0x0100 +#define SGTL5000_PLL_LOCKED 0x0010 + +/* + * SGTL5000_CHIP_SHORT_CTRL + */ +#define SGTL5000_LVLADJR_MASK 0x7000 +#define SGTL5000_LVLADJR_SHIFT 12 +#define SGTL5000_LVLADJR_WIDTH 3 +#define SGTL5000_LVLADJL_MASK 0x0700 +#define SGTL5000_LVLADJL_SHIFT 8 +#define SGTL5000_LVLADJL_WIDTH 3 +#define SGTL5000_LVLADJC_MASK 0x0070 +#define SGTL5000_LVLADJC_SHIFT 4 +#define SGTL5000_LVLADJC_WIDTH 3 +#define SGTL5000_LR_SHORT_MOD_MASK 0x000c +#define SGTL5000_LR_SHORT_MOD_SHIFT 2 +#define SGTL5000_LR_SHORT_MOD_WIDTH 2 +#define SGTL5000_CM_SHORT_MOD_MASK 0x0003 +#define SGTL5000_CM_SHORT_MOD_SHIFT 0 +#define SGTL5000_CM_SHORT_MOD_WIDTH 2 + +/* + *SGTL5000_CHIP_ANA_TEST2 + */ +#define SGTL5000_MONO_DAC 0x1000 + +/* + * SGTL5000_DAP_CTRL + */ +#define SGTL5000_DAP_MIX_EN 0x0010 +#define SGTL5000_DAP_EN 0x0001 + +#define SGTL5000_SYSCLK 0x00 +#define SGTL5000_LRCLK 0x01 + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/sgtl5000.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/sgtl5000.c @@ -0,0 +1,1298 @@ +/* + * sgtl5000.c -- SGTL5000 ALSA SoC Audio driver + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "sgtl5000.h" + +struct sgtl5000_priv { + int sysclk; + int master; + int fmt; + int rev; + int lrclk; + int capture_channels; + int playback_active; + int capture_active; + struct regulator *reg_vddio; + struct regulator *reg_vdda; + struct regulator *reg_vddd; + int vddio; /* voltage of VDDIO (mv) */ + int vdda; /* voltage of vdda (mv) */ + int vddd; /* voltage of vddd (mv), 0 if not connected */ + struct snd_pcm_substream *master_substream; + struct snd_pcm_substream *slave_substream; +}; + +static int sgtl5000_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level); + +#define SGTL5000_MAX_CACHED_REG SGTL5000_CHIP_SHORT_CTRL +static u16 sgtl5000_regs[(SGTL5000_MAX_CACHED_REG >> 1) + 1]; + +static unsigned int sgtl5000_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + unsigned int offset = reg >> 1; + if (offset >= ARRAY_SIZE(sgtl5000_regs)) + return -EINVAL; + pr_debug("r r:%02x,v:%04x\n", reg, cache[offset]); + return cache[offset]; +} + +static unsigned int sgtl5000_hw_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + struct i2c_client *client = codec->control_data; + int i2c_ret; + u16 value; + u8 buf0[2], buf1[2]; + u16 addr = client->addr; + u16 flags = client->flags; + struct i2c_msg msg[2] = { + {addr, flags, 2, buf0}, + {addr, flags | I2C_M_RD, 2, buf1}, + }; + + buf0[0] = (reg & 0xff00) >> 8; + buf0[1] = reg & 0xff; + i2c_ret = i2c_transfer(client->adapter, msg, 2); + if (i2c_ret < 0) { + pr_err("%s: read reg error : Reg 0x%02x\n", __func__, reg); + return 0; + } + + value = buf1[0] << 8 | buf1[1]; + + pr_debug("r r:%02x,v:%04x\n", reg, value); + return value; +} + +static unsigned int sgtl5000_read(struct snd_soc_codec *codec, unsigned int reg) +{ + if ((reg == SGTL5000_CHIP_ID) || + (reg == SGTL5000_CHIP_ADCDAC_CTRL) || + (reg == SGTL5000_CHIP_ANA_STATUS) || + (reg > SGTL5000_MAX_CACHED_REG)) + return sgtl5000_hw_read(codec, reg); + else + return sgtl5000_read_reg_cache(codec, reg); +} + +static inline void sgtl5000_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + unsigned int offset = reg >> 1; + if (offset < ARRAY_SIZE(sgtl5000_regs)) + cache[offset] = value; +} + +static int sgtl5000_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + struct i2c_client *client = codec->control_data; + u16 addr = client->addr; + u16 flags = client->flags; + u8 buf[4]; + int i2c_ret; + struct i2c_msg msg = { addr, flags, 4, buf }; + + sgtl5000_write_reg_cache(codec, reg, value); + pr_debug("w r:%02x,v:%04x\n", reg, value); + buf[0] = (reg & 0xff00) >> 8; + buf[1] = reg & 0xff; + buf[2] = (value & 0xff00) >> 8; + buf[3] = value & 0xff; + + i2c_ret = i2c_transfer(client->adapter, &msg, 1); + if (i2c_ret < 0) { + pr_err("%s: write reg error : Reg 0x%02x = 0x%04x\n", + __func__, reg, value); + return -EIO; + } + + return i2c_ret; +} + +static void sgtl5000_sync_reg_cache(struct snd_soc_codec *codec) +{ + int reg; + for (reg = 0; reg <= SGTL5000_MAX_CACHED_REG; reg += 2) + sgtl5000_write_reg_cache(codec, reg, + sgtl5000_hw_read(codec, reg)); +} + +static int sgtl5000_restore_reg(struct snd_soc_codec *codec, unsigned int reg) +{ + unsigned int cached_val, hw_val; + + cached_val = sgtl5000_read_reg_cache(codec, reg); + hw_val = sgtl5000_hw_read(codec, reg); + + if (hw_val != cached_val) + return sgtl5000_write(codec, reg, cached_val); + + return 0; +} + +static int all_reg[] = { + SGTL5000_CHIP_ID, + SGTL5000_CHIP_DIG_POWER, + SGTL5000_CHIP_CLK_CTRL, + SGTL5000_CHIP_I2S_CTRL, + SGTL5000_CHIP_SSS_CTRL, + SGTL5000_CHIP_ADCDAC_CTRL, + SGTL5000_CHIP_DAC_VOL, + SGTL5000_CHIP_PAD_STRENGTH, + SGTL5000_CHIP_ANA_ADC_CTRL, + SGTL5000_CHIP_ANA_HP_CTRL, + SGTL5000_CHIP_ANA_CTRL, + SGTL5000_CHIP_LINREG_CTRL, + SGTL5000_CHIP_REF_CTRL, + SGTL5000_CHIP_MIC_CTRL, + SGTL5000_CHIP_LINE_OUT_CTRL, + SGTL5000_CHIP_LINE_OUT_VOL, + SGTL5000_CHIP_ANA_POWER, + SGTL5000_CHIP_PLL_CTRL, + SGTL5000_CHIP_CLK_TOP_CTRL, + SGTL5000_CHIP_ANA_STATUS, + SGTL5000_CHIP_SHORT_CTRL, +}; + +#ifdef DEBUG +static void dump_reg(struct snd_soc_codec *codec) +{ + int i, reg; + printk(KERN_DEBUG "dump begin\n"); + for (i = 0; i < 21; i++) { + reg = sgtl5000_read(codec, all_reg[i]); + printk(KERN_DEBUG "d r %04x, v %04x\n", all_reg[i], reg); + } + printk(KERN_DEBUG "dump end\n"); +} +#else +static void dump_reg(struct snd_soc_codec *codec) +{ +} +#endif + +static int dac_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + struct snd_soc_codec *codec = widget->codec; + unsigned int reg; + + if (ucontrol->value.enumerated.item[0]) { + reg = sgtl5000_read(codec, SGTL5000_CHIP_CLK_TOP_CTRL); + reg |= SGTL5000_INT_OSC_EN; + sgtl5000_write(codec, SGTL5000_CHIP_CLK_TOP_CTRL, reg); + + if (codec->bias_level != SND_SOC_BIAS_ON) { + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_PREPARE); + snd_soc_dapm_put_enum_double(kcontrol, ucontrol); + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_ON); + } else + snd_soc_dapm_put_enum_double(kcontrol, ucontrol); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_CTRL); + reg &= ~(SGTL5000_LINE_OUT_MUTE | SGTL5000_HP_MUTE); + sgtl5000_write(codec, SGTL5000_CHIP_ANA_CTRL, reg); + } else { + reg = sgtl5000_read(codec, SGTL5000_CHIP_CLK_TOP_CTRL); + reg &= ~SGTL5000_INT_OSC_EN; + sgtl5000_write(codec, SGTL5000_CHIP_CLK_TOP_CTRL, reg); + + snd_soc_dapm_put_enum_double(kcontrol, ucontrol); + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + } + return 0; +} + +static const char *adc_mux_text[] = { + "MIC_IN", "LINE_IN" +}; + +static const char *dac_mux_text[] = { + "DAC", "LINE_IN" +}; + +static const struct soc_enum adc_enum = +SOC_ENUM_SINGLE(SGTL5000_CHIP_ANA_CTRL, 2, 2, adc_mux_text); + +static const struct soc_enum dac_enum = +SOC_ENUM_SINGLE(SGTL5000_CHIP_ANA_CTRL, 6, 2, dac_mux_text); + +static const struct snd_kcontrol_new adc_mux = +SOC_DAPM_ENUM("ADC Mux", adc_enum); + +static const struct snd_kcontrol_new dac_mux = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "DAC Mux", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE + | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = snd_soc_info_enum_double, + .get = snd_soc_dapm_get_enum_double, + .put = dac_mux_put, + .private_value = (unsigned long)&dac_enum, +}; + +static const struct snd_soc_dapm_widget sgtl5000_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("LINE_IN"), + SND_SOC_DAPM_INPUT("MIC_IN"), + + SND_SOC_DAPM_OUTPUT("HP_OUT"), + SND_SOC_DAPM_OUTPUT("LINE_OUT"), + + SND_SOC_DAPM_PGA("HP", SGTL5000_CHIP_ANA_CTRL, 4, 1, NULL, 0), + SND_SOC_DAPM_PGA("LO", SGTL5000_CHIP_ANA_CTRL, 8, 1, NULL, 0), + + SND_SOC_DAPM_MUX("ADC Mux", SND_SOC_NOPM, 0, 0, &adc_mux), + SND_SOC_DAPM_MUX("DAC Mux", SND_SOC_NOPM, 0, 0, &dac_mux), + + SND_SOC_DAPM_ADC("ADC", "Capture", SGTL5000_CHIP_DIG_POWER, 6, 0), + SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + {"ADC Mux", "LINE_IN", "LINE_IN"}, + {"ADC Mux", "MIC_IN", "MIC_IN"}, + {"ADC", NULL, "ADC Mux"}, + {"DAC Mux", "DAC", "DAC"}, + {"DAC Mux", "LINE_IN", "LINE_IN"}, + {"LO", NULL, "DAC"}, + {"HP", NULL, "DAC Mux"}, + {"LINE_OUT", NULL, "LO"}, + {"HP_OUT", NULL, "HP"}, +}; + +static int sgtl5000_add_widgets(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, sgtl5000_dapm_widgets, + ARRAY_SIZE(sgtl5000_dapm_widgets)); + + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static int dac_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 2; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0xfc - 0x3c; + return 0; +} + +static int dac_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + int reg, l, r; + + reg = sgtl5000_read(codec, SGTL5000_CHIP_DAC_VOL); + l = (reg & SGTL5000_DAC_VOL_LEFT_MASK) >> SGTL5000_DAC_VOL_LEFT_SHIFT; + r = (reg & SGTL5000_DAC_VOL_RIGHT_MASK) >> SGTL5000_DAC_VOL_RIGHT_SHIFT; + l = l < 0x3c ? 0x3c : l; + l = l > 0xfc ? 0xfc : l; + r = r < 0x3c ? 0x3c : r; + r = r > 0xfc ? 0xfc : r; + l = 0xfc - l; + r = 0xfc - r; + + ucontrol->value.integer.value[0] = l; + ucontrol->value.integer.value[1] = r; + + return 0; +} + +static int dac_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + int reg, l, r; + + l = ucontrol->value.integer.value[0]; + r = ucontrol->value.integer.value[1]; + + l = l < 0 ? 0 : l; + l = l > 0xfc - 0x3c ? 0xfc - 0x3c : l; + r = r < 0 ? 0 : r; + r = r > 0xfc - 0x3c ? 0xfc - 0x3c : r; + l = 0xfc - l; + r = 0xfc - r; + + reg = l << SGTL5000_DAC_VOL_LEFT_SHIFT | + r << SGTL5000_DAC_VOL_RIGHT_SHIFT; + + sgtl5000_write(codec, SGTL5000_CHIP_DAC_VOL, reg); + + return 0; +} + +static const char *mic_gain_text[] = { + "0dB", "20dB", "30dB", "40dB" +}; + +static const char *adc_m6db_text[] = { + "No Change", "Reduced by 6dB" +}; + +static const struct soc_enum mic_gain = +SOC_ENUM_SINGLE(SGTL5000_CHIP_MIC_CTRL, 0, 4, mic_gain_text); + +static const struct soc_enum adc_m6db = +SOC_ENUM_SINGLE(SGTL5000_CHIP_ANA_ADC_CTRL, 8, 2, adc_m6db_text); + +static const struct snd_kcontrol_new sgtl5000_snd_controls[] = { + SOC_ENUM("MIC GAIN", mic_gain), + SOC_DOUBLE("Capture Volume", SGTL5000_CHIP_ANA_ADC_CTRL, 0, 4, 0xf, 0), + SOC_ENUM("Capture Vol Reduction", adc_m6db), + {.iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Playback Volume", + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = dac_info_volsw, + .get = dac_get_volsw, + .put = dac_put_volsw, + }, + SOC_DOUBLE("Headphone Volume", SGTL5000_CHIP_ANA_HP_CTRL, 0, 8, 0x7f, + 1), +}; + +static int sgtl5000_digital_mute(struct snd_soc_dai *codec_dai, int mute) +{ + struct snd_soc_codec *codec = codec_dai->codec; + u16 adcdac_ctrl; + + adcdac_ctrl = sgtl5000_read(codec, SGTL5000_CHIP_ADCDAC_CTRL); + + if (mute) { + adcdac_ctrl |= SGTL5000_DAC_MUTE_LEFT; + adcdac_ctrl |= SGTL5000_DAC_MUTE_RIGHT; + } else { + adcdac_ctrl &= ~SGTL5000_DAC_MUTE_LEFT; + adcdac_ctrl &= ~SGTL5000_DAC_MUTE_RIGHT; + } + + sgtl5000_write(codec, SGTL5000_CHIP_ADCDAC_CTRL, adcdac_ctrl); + if (!mute) + dump_reg(codec); + return 0; +} + +static int sgtl5000_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + u16 i2sctl = 0; + pr_debug("%s:fmt=%08x\n", __func__, fmt); + sgtl5000->master = 0; + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + break; + case SND_SOC_DAIFMT_CBM_CFM: + i2sctl |= SGTL5000_I2S_MASTER; + sgtl5000->master = 1; + break; + case SND_SOC_DAIFMT_CBM_CFS: + case SND_SOC_DAIFMT_CBS_CFM: + return -EINVAL; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_A: + i2sctl |= SGTL5000_I2S_MODE_PCM; + break; + case SND_SOC_DAIFMT_DSP_B: + i2sctl |= SGTL5000_I2S_MODE_PCM; + i2sctl |= SGTL5000_I2S_LRALIGN; + break; + case SND_SOC_DAIFMT_I2S: + i2sctl |= SGTL5000_I2S_MODE_I2S_LJ; + break; + case SND_SOC_DAIFMT_RIGHT_J: + i2sctl |= SGTL5000_I2S_MODE_RJ; + i2sctl |= SGTL5000_I2S_LRPOL; + break; + case SND_SOC_DAIFMT_LEFT_J: + i2sctl |= SGTL5000_I2S_MODE_I2S_LJ; + i2sctl |= SGTL5000_I2S_LRALIGN; + break; + default: + return -EINVAL; + } + sgtl5000->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; + + /* Clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + case SND_SOC_DAIFMT_NB_IF: + break; + case SND_SOC_DAIFMT_IB_IF: + case SND_SOC_DAIFMT_IB_NF: + i2sctl |= SGTL5000_I2S_SCLK_INV; + break; + default: + return -EINVAL; + } + sgtl5000_write(codec, SGTL5000_CHIP_I2S_CTRL, i2sctl); + + return 0; +} + +static int sgtl5000_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + + switch (clk_id) { + case SGTL5000_SYSCLK: + sgtl5000->sysclk = freq; + break; + case SGTL5000_LRCLK: + sgtl5000->lrclk = freq; + break; + default: + return -EINVAL; + } + return 0; +} + +static int sgtl5000_pcm_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + int reg; + + reg = sgtl5000_read(codec, SGTL5000_CHIP_DIG_POWER); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + reg |= SGTL5000_I2S_IN_POWERUP; + else + reg |= SGTL5000_I2S_OUT_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_DIG_POWER, reg); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + reg |= SGTL5000_ADC_POWERUP; + if (sgtl5000->capture_channels == 1) + reg &= ~SGTL5000_ADC_STEREO; + else + reg |= SGTL5000_ADC_STEREO; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + } + + return 0; +} + +static int sgtl5000_pcm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + struct snd_pcm_runtime *master_runtime; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + sgtl5000->playback_active++; + else + sgtl5000->capture_active++; + + /* The DAI has shared clocks so if we already have a playback or + * capture going then constrain this substream to match it. + */ + if (sgtl5000->master_substream) { + master_runtime = sgtl5000->master_substream->runtime; + + pr_debug("Constraining to %d bits\n", + master_runtime->sample_bits); + + snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_SAMPLE_BITS, + master_runtime->sample_bits, + master_runtime->sample_bits); + + sgtl5000->slave_substream = substream; + } else + sgtl5000->master_substream = substream; + + return 0; +} + +static void sgtl5000_pcm_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + int reg, dig_pwr, ana_pwr; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + sgtl5000->playback_active--; + else + sgtl5000->capture_active--; + + if (sgtl5000->master_substream == substream) + sgtl5000->master_substream = sgtl5000->slave_substream; + + sgtl5000->slave_substream = NULL; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + ana_pwr = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + ana_pwr &= ~(SGTL5000_ADC_POWERUP | SGTL5000_ADC_STEREO); + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); + } + + dig_pwr = sgtl5000_read(codec, SGTL5000_CHIP_DIG_POWER); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + dig_pwr &= ~SGTL5000_I2S_IN_POWERUP; + else + dig_pwr &= ~SGTL5000_I2S_OUT_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_DIG_POWER, dig_pwr); + + if (!sgtl5000->playback_active && !sgtl5000->capture_active) { + reg = sgtl5000_read(codec, SGTL5000_CHIP_I2S_CTRL); + reg &= ~SGTL5000_I2S_MASTER; + sgtl5000_write(codec, SGTL5000_CHIP_I2S_CTRL, reg); + } +} + +/* + * Set PCM DAI bit size and sample rate. + * input: params_rate, params_fmt + */ +static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + int channels = params_channels(params); + int clk_ctl = 0; + int pll_ctl = 0; + int i2s_ctl; + int div2 = 0; + int reg; + + pr_debug("%s channels=%d\n", __func__, channels); + + if (!sgtl5000->sysclk) { + pr_err("%s: set sysclk first!\n", __func__); + return -EFAULT; + } + + if (substream == sgtl5000->slave_substream) { + pr_debug("Ignoring hw_params for slave substream\n"); + return 0; + } + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + sgtl5000->capture_channels = channels; + + switch (sgtl5000->lrclk) { + case 32000: + clk_ctl |= SGTL5000_SYS_FS_32k << SGTL5000_SYS_FS_SHIFT; + break; + case 44100: + clk_ctl |= SGTL5000_SYS_FS_44_1k << SGTL5000_SYS_FS_SHIFT; + break; + case 48000: + clk_ctl |= SGTL5000_SYS_FS_48k << SGTL5000_SYS_FS_SHIFT; + break; + case 96000: + clk_ctl |= SGTL5000_SYS_FS_96k << SGTL5000_SYS_FS_SHIFT; + break; + default: + pr_err("%s: sample rate %d not supported\n", __func__, + sgtl5000->lrclk); + return -EFAULT; + } + +#if 0 /* SGTL5000 rev1 has a IC bug to prevent switching to MCLK from PLL. */ + if (fs * 256 == sgtl5000->sysclk) + clk_ctl |= SGTL5000_MCLK_FREQ_256FS << SGTL5000_MCLK_FREQ_SHIFT; + else if (fs * 384 == sgtl5000->sysclk && fs != 96000) + clk_ctl |= SGTL5000_MCLK_FREQ_384FS << SGTL5000_MCLK_FREQ_SHIFT; + else if (fs * 512 == sgtl5000->sysclk && fs != 96000) + clk_ctl |= SGTL5000_MCLK_FREQ_512FS << SGTL5000_MCLK_FREQ_SHIFT; + else +#endif + { + if (!sgtl5000->master) { + pr_err("%s: PLL not supported in slave mode\n", + __func__); + return -EINVAL; + } + clk_ctl |= SGTL5000_MCLK_FREQ_PLL << SGTL5000_MCLK_FREQ_SHIFT; + } + + if ((clk_ctl & SGTL5000_MCLK_FREQ_MASK) == SGTL5000_MCLK_FREQ_PLL) { + u64 out, t; + unsigned int in, int_div, frac_div; + if (sgtl5000->sysclk > 17000000) { + div2 = 1; + in = sgtl5000->sysclk / 2; + } else { + div2 = 0; + in = sgtl5000->sysclk; + } + if (sgtl5000->lrclk == 44100) + out = 180633600; + else + out = 196608000; + t = do_div(out, in); + int_div = out; + t *= 2048; + do_div(t, in); + frac_div = t; + pll_ctl = int_div << SGTL5000_PLL_INT_DIV_SHIFT | + frac_div << SGTL5000_PLL_FRAC_DIV_SHIFT; + } + + i2s_ctl = sgtl5000_read(codec, SGTL5000_CHIP_I2S_CTRL); + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + if (sgtl5000->fmt == SND_SOC_DAIFMT_RIGHT_J) + return -EINVAL; + i2s_ctl |= SGTL5000_I2S_DLEN_16 << SGTL5000_I2S_DLEN_SHIFT; + i2s_ctl |= SGTL5000_I2S_SCLKFREQ_32FS << + SGTL5000_I2S_SCLKFREQ_SHIFT; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + i2s_ctl |= SGTL5000_I2S_DLEN_20 << SGTL5000_I2S_DLEN_SHIFT; + i2s_ctl |= SGTL5000_I2S_SCLKFREQ_64FS << + SGTL5000_I2S_SCLKFREQ_SHIFT; + break; + case SNDRV_PCM_FORMAT_S24_LE: + i2s_ctl |= SGTL5000_I2S_DLEN_24 << SGTL5000_I2S_DLEN_SHIFT; + i2s_ctl |= SGTL5000_I2S_SCLKFREQ_64FS << + SGTL5000_I2S_SCLKFREQ_SHIFT; + break; + case SNDRV_PCM_FORMAT_S32_LE: + if (sgtl5000->fmt == SND_SOC_DAIFMT_RIGHT_J) + return -EINVAL; + i2s_ctl |= SGTL5000_I2S_DLEN_32 << SGTL5000_I2S_DLEN_SHIFT; + i2s_ctl |= SGTL5000_I2S_SCLKFREQ_64FS << + SGTL5000_I2S_SCLKFREQ_SHIFT; + break; + default: + return -EINVAL; + } + + pr_debug("fs=%d,clk_ctl=%d,pll_ctl=%d,i2s_ctl=%d,div2=%d\n", + sgtl5000->lrclk, clk_ctl, pll_ctl, i2s_ctl, div2); + + if ((clk_ctl & SGTL5000_MCLK_FREQ_MASK) == SGTL5000_MCLK_FREQ_PLL) { + sgtl5000_write(codec, SGTL5000_CHIP_PLL_CTRL, pll_ctl); + reg = sgtl5000_read(codec, SGTL5000_CHIP_CLK_TOP_CTRL); + if (div2) + reg |= SGTL5000_INPUT_FREQ_DIV2; + else + reg &= ~SGTL5000_INPUT_FREQ_DIV2; + sgtl5000_write(codec, SGTL5000_CHIP_CLK_TOP_CTRL, reg); + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + reg |= SGTL5000_PLL_POWERUP | SGTL5000_VCOAMP_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + } + sgtl5000_write(codec, SGTL5000_CHIP_CLK_CTRL, clk_ctl); + sgtl5000_write(codec, SGTL5000_CHIP_I2S_CTRL, i2s_ctl); + + return 0; +} + +static void sgtl5000_mic_bias(struct snd_soc_codec *codec, int enable) +{ + int reg, bias_r = 0; + if (enable) + bias_r = SGTL5000_BIAS_R_4k << SGTL5000_BIAS_R_SHIFT; + reg = sgtl5000_read(codec, SGTL5000_CHIP_MIC_CTRL); + if ((reg & SGTL5000_BIAS_R_MASK) != bias_r) { + reg &= ~SGTL5000_BIAS_R_MASK; + reg |= bias_r; + sgtl5000_write(codec, SGTL5000_CHIP_MIC_CTRL, reg); + } +} + +static int sgtl5000_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + u16 reg, ana_pwr; + int delay = 0; + pr_debug("dapm level %d\n", level); + switch (level) { + case SND_SOC_BIAS_ON: /* full On */ + if (codec->bias_level == SND_SOC_BIAS_ON) + break; + + sgtl5000_mic_bias(codec, 1); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + reg |= SGTL5000_VAG_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + msleep(400); + + break; + + case SND_SOC_BIAS_PREPARE: /* partial On */ + if (codec->bias_level == SND_SOC_BIAS_PREPARE) + break; + + sgtl5000_mic_bias(codec, 0); + + /* must power up hp/line out before vag & dac to + avoid pops. */ + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + if (reg & SGTL5000_VAG_POWERUP) + delay = 400; + reg &= ~SGTL5000_VAG_POWERUP; + reg |= SGTL5000_DAC_POWERUP; + reg |= SGTL5000_HP_POWERUP; + reg |= SGTL5000_LINE_OUT_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + if (delay) + msleep(delay); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_DIG_POWER); + reg |= SGTL5000_DAC_EN; + sgtl5000_write(codec, SGTL5000_CHIP_DIG_POWER, reg); + + break; + + case SND_SOC_BIAS_STANDBY: /* Off, with power */ + /* soc doesn't do PREPARE state after record so make sure + that anything that needs to be turned OFF gets turned off. */ + if (codec->bias_level == SND_SOC_BIAS_STANDBY) + break; + + /* soc calls digital_mute to unmute before record but doesn't + call digital_mute to mute after record. */ + sgtl5000_digital_mute(&sgtl5000_dai, 1); + + sgtl5000_mic_bias(codec, 0); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + if (reg & SGTL5000_VAG_POWERUP) { + reg &= ~SGTL5000_VAG_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + msleep(400); + } + reg &= ~SGTL5000_DAC_POWERUP; + reg &= ~SGTL5000_HP_POWERUP; + reg &= ~SGTL5000_LINE_OUT_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_DIG_POWER); + reg &= ~SGTL5000_DAC_EN; + sgtl5000_write(codec, SGTL5000_CHIP_DIG_POWER, reg); + + break; + + case SND_SOC_BIAS_OFF: /* Off, without power */ + /* must power down hp/line out after vag & dac to + avoid pops. */ + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + ana_pwr = reg; + reg &= ~SGTL5000_VAG_POWERUP; + + /* Workaround for sgtl5000 rev 0x11 chip audio suspend failure + issue on mx25 */ + /* reg &= ~SGTL5000_REFTOP_POWERUP; */ + + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + msleep(600); + + reg &= ~SGTL5000_HP_POWERUP; + reg &= ~SGTL5000_LINE_OUT_POWERUP; + reg &= ~SGTL5000_DAC_POWERUP; + reg &= ~SGTL5000_ADC_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, reg); + + /* save ANA POWER register value for resume */ + sgtl5000_write_reg_cache(codec, SGTL5000_CHIP_ANA_POWER, + ana_pwr); + break; + } + codec->bias_level = level; + return 0; +} + +#define SGTL5000_RATES (SNDRV_PCM_RATE_32000 |\ + SNDRV_PCM_RATE_44100 |\ + SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000) + +#define SGTL5000_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S20_3LE |\ + SNDRV_PCM_FMTBIT_S24_LE) + +struct snd_soc_dai_ops sgtl5000_ops = { + .prepare = sgtl5000_pcm_prepare, + .startup = sgtl5000_pcm_startup, + .shutdown = sgtl5000_pcm_shutdown, + .hw_params = sgtl5000_pcm_hw_params, + .digital_mute = sgtl5000_digital_mute, + .set_fmt = sgtl5000_set_dai_fmt, + .set_sysclk = sgtl5000_set_dai_sysclk +}; + +struct snd_soc_dai sgtl5000_dai = { + .name = "SGTL5000", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SGTL5000_RATES, + .formats = SGTL5000_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SGTL5000_RATES, + .formats = SGTL5000_FORMATS, + }, + .ops = &sgtl5000_ops, + .symmetric_rates = 1, +}; +EXPORT_SYMBOL_GPL(sgtl5000_dai); + +static int sgtl5000_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_OFF); + + return 0; +} + +static int sgtl5000_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + unsigned int i; + + /* Restore refs first in same order as in sgtl5000_init */ + sgtl5000_restore_reg(codec, SGTL5000_CHIP_LINREG_CTRL); + sgtl5000_restore_reg(codec, SGTL5000_CHIP_ANA_POWER); + msleep(10); + sgtl5000_restore_reg(codec, SGTL5000_CHIP_REF_CTRL); + sgtl5000_restore_reg(codec, SGTL5000_CHIP_LINE_OUT_CTRL); + + /* Restore everythine else */ + for (i = 1; i < sizeof(all_reg) / sizeof(int); i++) + sgtl5000_restore_reg(codec, all_reg[i]); + + sgtl5000_write(codec, SGTL5000_DAP_CTRL, 0); + + /* Bring the codec back up to standby first to minimise pop/clicks */ + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + if (codec->suspend_bias_level == SND_SOC_BIAS_ON) + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_PREPARE); + sgtl5000_set_bias_level(codec, codec->suspend_bias_level); + + return 0; +} + +static struct snd_soc_codec *sgtl5000_codec; + +/* + * initialise the SGTL5000 driver + * register the mixer and dsp interfaces with the kernel + */ +static int sgtl5000_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = sgtl5000_codec; + struct sgtl5000_priv *sgtl5000 = codec->private_data; + u16 reg, ana_pwr, lreg_ctrl, ref_ctrl, lo_ctrl, short_ctrl, sss; + int vag; + int ret = 0; + + socdev->card->codec = sgtl5000_codec; + + /* register pcms */ + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + dev_err(codec->dev, "failed to create pcms\n"); + return ret; + } + + /* reset value */ + ana_pwr = SGTL5000_DAC_STEREO | + SGTL5000_LINREG_SIMPLE_POWERUP | + SGTL5000_STARTUP_POWERUP | + SGTL5000_ADC_STEREO | SGTL5000_REFTOP_POWERUP; + lreg_ctrl = 0; + ref_ctrl = 0; + lo_ctrl = 0; + short_ctrl = 0; + sss = SGTL5000_DAC_SEL_I2S_IN << SGTL5000_DAC_SEL_SHIFT; + + /* workaround for rev 0x11: use vddd linear regulator */ + if (!sgtl5000->vddd || (sgtl5000->rev >= 0x11)) { + /* set VDDD to 1.2v */ + lreg_ctrl |= 0x8 << SGTL5000_LINREG_VDDD_SHIFT; + /* power internal linear regulator */ + ana_pwr |= SGTL5000_LINEREG_D_POWERUP; + } else { + /* turn of startup power */ + ana_pwr &= ~SGTL5000_STARTUP_POWERUP; + ana_pwr &= ~SGTL5000_LINREG_SIMPLE_POWERUP; + } + if (sgtl5000->vddio < 3100 && sgtl5000->vdda < 3100) { + /* Enable VDDC charge pump */ + ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP; + } + if (sgtl5000->vddio >= 3100 && sgtl5000->vdda >= 3100) { + /* VDDC use VDDIO rail */ + lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD; + if (sgtl5000->vddio >= 3100) + lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO << + SGTL5000_VDDC_MAN_ASSN_SHIFT; + } + /* If PLL is powered up (such as on power cycle) leave it on. */ + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_POWER); + ana_pwr |= reg & (SGTL5000_PLL_POWERUP | SGTL5000_VCOAMP_POWERUP); + + /* set ADC/DAC ref voltage to vdda/2 */ + vag = sgtl5000->vdda / 2; + if (vag <= SGTL5000_ANA_GND_BASE) + vag = 0; + else if (vag >= SGTL5000_ANA_GND_BASE + SGTL5000_ANA_GND_STP * + (SGTL5000_ANA_GND_MASK >> SGTL5000_ANA_GND_SHIFT)) + vag = SGTL5000_ANA_GND_MASK >> SGTL5000_ANA_GND_SHIFT; + else + vag = (vag - SGTL5000_ANA_GND_BASE) / SGTL5000_ANA_GND_STP; + ref_ctrl |= vag << SGTL5000_ANA_GND_SHIFT; + + /* set line out ref voltage to vddio/2 */ + vag = sgtl5000->vddio / 2; + if (vag <= SGTL5000_LINE_OUT_GND_BASE) + vag = 0; + else if (vag >= SGTL5000_LINE_OUT_GND_BASE + SGTL5000_LINE_OUT_GND_STP * + SGTL5000_LINE_OUT_GND_MAX) + vag = SGTL5000_LINE_OUT_GND_MAX; + else + vag = (vag - SGTL5000_LINE_OUT_GND_BASE) / + SGTL5000_LINE_OUT_GND_STP; + lo_ctrl |= vag << SGTL5000_LINE_OUT_GND_SHIFT; + + /* enable small pop */ + ref_ctrl |= SGTL5000_SMALL_POP; + + /* Controls the output bias current for the lineout */ + lo_ctrl |= + (SGTL5000_LINE_OUT_CURRENT_360u << SGTL5000_LINE_OUT_CURRENT_SHIFT); + + /* set short detect */ + /* keep default */ + + /* set routing */ + /* keep default, bypass DAP */ + + sgtl5000_write(codec, SGTL5000_CHIP_LINREG_CTRL, lreg_ctrl); + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); + msleep(10); + + /* For rev 0x11, if vddd linear reg has been enabled, we have + to disable simple reg to get proper VDDD voltage. */ + if ((ana_pwr & SGTL5000_LINEREG_D_POWERUP) && (sgtl5000->rev >= 0x11)) { + ana_pwr &= ~SGTL5000_LINREG_SIMPLE_POWERUP; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_POWER, ana_pwr); + msleep(10); + } + + sgtl5000_write(codec, SGTL5000_CHIP_REF_CTRL, ref_ctrl); + sgtl5000_write(codec, SGTL5000_CHIP_LINE_OUT_CTRL, lo_ctrl); + sgtl5000_write(codec, SGTL5000_CHIP_SHORT_CTRL, short_ctrl); + sgtl5000_write(codec, SGTL5000_CHIP_SSS_CTRL, sss); + sgtl5000_write(codec, SGTL5000_CHIP_DIG_POWER, 0); + + reg = SGTL5000_DAC_VOL_RAMP_EN | + SGTL5000_DAC_MUTE_RIGHT | SGTL5000_DAC_MUTE_LEFT; + sgtl5000_write(codec, SGTL5000_CHIP_ADCDAC_CTRL, reg); + + if (cpu_is_mx25()) + sgtl5000_write(codec, SGTL5000_CHIP_PAD_STRENGTH, 0x01df); + else + sgtl5000_write(codec, SGTL5000_CHIP_PAD_STRENGTH, 0x015f); + + reg = sgtl5000_read(codec, SGTL5000_CHIP_ANA_ADC_CTRL); + reg &= ~SGTL5000_ADC_VOL_M6DB; + reg &= ~(SGTL5000_ADC_VOL_LEFT_MASK | SGTL5000_ADC_VOL_RIGHT_MASK); + reg |= (0xf << SGTL5000_ADC_VOL_LEFT_SHIFT) + | (0xf << SGTL5000_ADC_VOL_RIGHT_SHIFT); + sgtl5000_write(codec, SGTL5000_CHIP_ANA_ADC_CTRL, reg); + + reg = SGTL5000_LINE_OUT_MUTE | SGTL5000_HP_MUTE | + SGTL5000_HP_ZCD_EN | SGTL5000_ADC_ZCD_EN; + sgtl5000_write(codec, SGTL5000_CHIP_ANA_CTRL, reg); + + sgtl5000_write(codec, SGTL5000_CHIP_MIC_CTRL, 0); + sgtl5000_write(codec, SGTL5000_CHIP_CLK_TOP_CTRL, 0); + /* disable DAP */ + sgtl5000_write(codec, SGTL5000_DAP_CTRL, 0); + /* TODO: initialize DAP */ + + snd_soc_add_controls(codec, sgtl5000_snd_controls, + ARRAY_SIZE(sgtl5000_snd_controls)); + sgtl5000_add_widgets(codec); + + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + + ret = snd_soc_init_card(socdev); + if (ret < 0) { + printk(KERN_ERR "sgtl5000: failed to register card\n"); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + return ret; + } + + return 0; +} + +/* power down chip */ +static int sgtl5000_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + if (codec->control_data) + sgtl5000_set_bias_level(codec, SND_SOC_BIAS_OFF); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_sgtl5000 = { + .probe = sgtl5000_probe, + .remove = sgtl5000_remove, + .suspend = sgtl5000_suspend, + .resume = sgtl5000_resume, +}; +EXPORT_SYMBOL_GPL(soc_codec_dev_sgtl5000); + +static __devinit int sgtl5000_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct sgtl5000_priv *sgtl5000; + struct snd_soc_codec *codec; + struct regulator *reg; + int ret = 0; + u32 val; + + if (sgtl5000_codec) { + dev_err(&client->dev, + "Multiple SGTL5000 devices not supported\n"); + return -ENOMEM; + } + + codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); + if (codec == NULL) + return -ENOMEM; + + sgtl5000 = kzalloc(sizeof(struct sgtl5000_priv), GFP_KERNEL); + if (sgtl5000 == NULL) { + kfree(codec); + return -ENOMEM; + } + + codec->private_data = sgtl5000; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + i2c_set_clientdata(client, codec); + codec->control_data = client; + + reg = regulator_get(&client->dev, "VDDIO"); + if (!IS_ERR(reg)) + sgtl5000->reg_vddio = reg; + + reg = regulator_get(&client->dev, "VDDA"); + if (!IS_ERR(reg)) + sgtl5000->reg_vdda = reg; + + reg = regulator_get(&client->dev, "VDDD"); + if (!IS_ERR(reg)) + sgtl5000->reg_vddd = reg; + + if (sgtl5000->reg_vdda) { + sgtl5000->vdda = + regulator_get_voltage(sgtl5000->reg_vdda) / 1000; + regulator_enable(sgtl5000->reg_vdda); + } + if (sgtl5000->reg_vddio) { + sgtl5000->vddio = + regulator_get_voltage(sgtl5000->reg_vddio) / 1000; + regulator_enable(sgtl5000->reg_vddio); + } + if (sgtl5000->reg_vddd) { + sgtl5000->vddd = + regulator_get_voltage(sgtl5000->reg_vddd) / 1000; + regulator_enable(sgtl5000->reg_vddd); + } else { + sgtl5000->vddd = 0; /* use internal regulator */ + } + + msleep(1); + + val = sgtl5000_read(codec, SGTL5000_CHIP_ID); + if (((val & SGTL5000_PARTID_MASK) >> SGTL5000_PARTID_SHIFT) != + SGTL5000_PARTID_PART_ID) { + pr_err("Device with ID register %x is not a SGTL5000\n", val); + ret = -ENODEV; + goto err_codec_reg; + } + + sgtl5000->rev = (val & SGTL5000_REVID_MASK) >> SGTL5000_REVID_SHIFT; + dev_info(&client->dev, "SGTL5000 revision %d\n", sgtl5000->rev); + + codec->dev = &client->dev; + codec->name = "SGTL5000"; + codec->owner = THIS_MODULE; + codec->read = sgtl5000_read_reg_cache; + codec->write = sgtl5000_write; + codec->bias_level = SND_SOC_BIAS_OFF; + codec->set_bias_level = sgtl5000_set_bias_level; + codec->dai = &sgtl5000_dai; + codec->num_dai = 1; + codec->reg_cache_size = sizeof(sgtl5000_regs); + codec->reg_cache_step = 2; + codec->reg_cache = (void *)&sgtl5000_regs; + + sgtl5000_sync_reg_cache(codec); + + sgtl5000_codec = codec; + sgtl5000_dai.dev = &client->dev; + + ret = snd_soc_register_codec(codec); + if (ret != 0) { + dev_err(codec->dev, "Failed to register codec: %d\n", ret); + goto err_codec_reg; + } + + ret = snd_soc_register_dai(&sgtl5000_dai); + if (ret != 0) { + dev_err(codec->dev, "Failed to register DAIs: %d\n", ret); + goto err_codec_reg; + } + + return 0; + +err_codec_reg: + if (sgtl5000->reg_vddd) + regulator_disable(sgtl5000->reg_vddd); + if (sgtl5000->reg_vdda) + regulator_disable(sgtl5000->reg_vdda); + if (sgtl5000->reg_vddio) + regulator_disable(sgtl5000->reg_vddio); + if (sgtl5000->reg_vddd) + regulator_put(sgtl5000->reg_vddd); + if (sgtl5000->reg_vdda) + regulator_put(sgtl5000->reg_vdda); + if (sgtl5000->reg_vddio) + regulator_put(sgtl5000->reg_vddio); + kfree(sgtl5000); + kfree(codec); + return ret; +} + +static __devexit int sgtl5000_i2c_remove(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + struct sgtl5000_priv *sgtl5000 = codec->private_data; + + snd_soc_unregister_dai(&sgtl5000_dai); + snd_soc_unregister_codec(codec); + + if (sgtl5000->reg_vddio) { + regulator_disable(sgtl5000->reg_vddio); + regulator_put(sgtl5000->reg_vddio); + } + if (sgtl5000->reg_vddd) { + regulator_disable(sgtl5000->reg_vddd); + regulator_put(sgtl5000->reg_vddd); + } + if (sgtl5000->reg_vdda) { + regulator_disable(sgtl5000->reg_vdda); + regulator_put(sgtl5000->reg_vdda); + } + + kfree(codec); + kfree(sgtl5000); + sgtl5000_codec = NULL; + return 0; +} + +static const struct i2c_device_id sgtl5000_id[] = { + {"sgtl5000-i2c", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, sgtl5000_id); + +static struct i2c_driver sgtl5000_i2c_driver = { + .driver = { + .name = "sgtl5000-i2c", + .owner = THIS_MODULE, + }, + .probe = sgtl5000_i2c_probe, + .remove = __devexit_p(sgtl5000_i2c_remove), + .id_table = sgtl5000_id, +}; + +static int __init sgtl5000_modinit(void) +{ + return i2c_add_driver(&sgtl5000_i2c_driver); +} +module_init(sgtl5000_modinit); + +static void __exit sgtl5000_exit(void) +{ + i2c_del_driver(&sgtl5000_i2c_driver); +} +module_exit(sgtl5000_exit); + +MODULE_DESCRIPTION("ASoC SGTL5000 driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/codecs/wm8580.c +++ linux-fsl-imx51-2.6.31/sound/soc/codecs/wm8580.c @@ -23,7 +23,10 @@ #include #include #include +#include #include +#include + #include #include #include @@ -160,6 +163,8 @@ #define WM8580_DAC_CONTROL5_MUTEALL 0x10 +#define WM8580_REG_DATA_LENGTH 9 + /* * wm8580 register cache * We can't read the WM8580 register space when we @@ -187,15 +192,19 @@ unsigned int out; }; +#define WM8580_NUM_SUPPLIES 0 +static const char *wm8580_supply_names[WM8580_NUM_SUPPLIES] = { +}; + /* codec private data */ struct wm8580_priv { struct snd_soc_codec codec; + struct regulator_bulk_data supplies[WM8580_NUM_SUPPLIES]; u16 reg_cache[WM8580_MAX_REGISTER + 1]; struct pll_state a; struct pll_state b; }; - /* * read wm8580 register cache */ @@ -319,7 +328,6 @@ WM8580_DIGITAL_ATTENUATION_DACL3, WM8580_DIGITAL_ATTENUATION_DACR3, 0, 0xff, 0, dac_tlv), - SOC_SINGLE("DAC1 Deemphasis Switch", WM8580_DAC_CONTROL3, 0, 1, 0), SOC_SINGLE("DAC2 Deemphasis Switch", WM8580_DAC_CONTROL3, 1, 1, 0), SOC_SINGLE("DAC3 Deemphasis Switch", WM8580_DAC_CONTROL3, 2, 1, 0), @@ -524,7 +532,7 @@ (pll_div.k >> 18 & 0xf) | (pll_div.n << 4)); reg = wm8580_read(codec, WM8580_PLLA4 + offset); - reg &= ~0x3f; + reg &= ~0x3b; reg |= pll_div.prescale | pll_div.postscale << 1 | pll_div.freqmode << 3; @@ -740,6 +748,33 @@ return 0; } +static int wm8580_set_paif_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + unsigned int reg; + + switch (clk_id) { + case WM8580_BCLK_CLKDIV: + reg = wm8580_read(codec, WM8580_PAIF1) & + ~WM8580_AIF_BCLKSEL_MASK; + wm8580_write(codec, WM8580_PAIF1, reg | freq); + reg = wm8580_read(codec, WM8580_PAIF2) & + ~WM8580_AIF_BCLKSEL_MASK; + wm8580_write(codec, WM8580_PAIF2, reg | freq); + break; + case WM8580_LRCLK_CLKDIV: + reg = wm8580_read(codec, WM8580_PAIF1) & ~0x07; + wm8580_write(codec, WM8580_PAIF1, reg | freq); + break; + + default: + return -EINVAL; + } + + return 0; +} + static int wm8580_digital_mute(struct snd_soc_dai *codec_dai, int mute) { struct snd_soc_codec *codec = codec_dai->codec; @@ -795,6 +830,7 @@ static struct snd_soc_dai_ops wm8580_dai_ops_playback = { .hw_params = wm8580_paif_hw_params, .set_fmt = wm8580_set_paif_dai_fmt, + .set_sysclk = wm8580_set_paif_dai_sysclk, .set_clkdiv = wm8580_set_dai_clkdiv, .set_pll = wm8580_set_dai_pll, .digital_mute = wm8580_digital_mute, @@ -922,11 +958,28 @@ memcpy(codec->reg_cache, wm8580_reg, sizeof(wm8580_reg)); + for (i = 0; i < ARRAY_SIZE(wm8580->supplies); i++) + wm8580->supplies[i].supply = wm8580_supply_names[i]; + + ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8580->supplies), + wm8580->supplies); + if (ret != 0) { + dev_err(codec->dev, "Failed to request supplies: %d\n", ret); + goto err; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm8580->supplies), + wm8580->supplies); + if (ret != 0) { + dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); + goto err_regulator_get; + } + /* Get the codec into a known state */ ret = wm8580_write(codec, WM8580_RESET, 0); if (ret != 0) { dev_err(codec->dev, "Failed to reset codec: %d\n", ret); - goto err; + goto err_regulator_enable; } for (i = 0; i < ARRAY_SIZE(wm8580_dai); i++) @@ -939,7 +992,7 @@ ret = snd_soc_register_codec(codec); if (ret != 0) { dev_err(codec->dev, "Failed to register codec: %d\n", ret); - goto err; + goto err_regulator_enable; } ret = snd_soc_register_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai)); @@ -952,6 +1005,10 @@ err_codec: snd_soc_unregister_codec(codec); +err_regulator_enable: + regulator_bulk_disable(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); +err_regulator_get: + regulator_bulk_free(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); err: kfree(wm8580); return ret; @@ -962,6 +1019,8 @@ wm8580_set_bias_level(&wm8580->codec, SND_SOC_BIAS_OFF); snd_soc_unregister_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai)); snd_soc_unregister_codec(&wm8580->codec); + regulator_bulk_disable(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); + regulator_bulk_free(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); kfree(wm8580); wm8580_codec = NULL; } @@ -1012,6 +1071,92 @@ }; #endif +#if defined(CONFIG_SPI) || defined(CONFIG_SPI_MODULE) + /*! + * This function is called to transfer data to WM8580 on SPI. + * + * @param spi the SPI slave device(WM8580) + * @param buf the pointer to the data buffer + * @param len the length of the data to be transferred + * + * @return Returns 0 on success -1 on failure. + */ +static inline int spi_rw(void *control_data, char *data, int length) +{ + int ret; + struct spi_transfer t = { + .tx_buf = (const void *)data, + .rx_buf = (void *)data, + .len = length / 2, + .cs_change = 0, + .delay_usecs = 0, + }; + struct spi_message m; + u8 temp = data[0]; + data[0] = data[1]; + data[1] = temp; + + spi_message_init(&m); + spi_message_add_tail(&t, &m); + ret = spi_sync((struct spi_device *)control_data, &m); + if (unlikely(ret < 0)) + return ret; + else + return length; + +} + +/*! + * This function is called whenever the SPI slave device is detected. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devinit wm8580_spi_probe(struct spi_device *spi) +{ + struct wm8580_priv *wm8580; + struct snd_soc_codec *codec; + + wm8580 = kzalloc(sizeof(struct wm8580_priv), GFP_KERNEL); + if (wm8580 == NULL) + return -ENOMEM; + + codec = &wm8580->codec; + + spi->bits_per_word = 16; + spi->mode = SPI_MODE_2; + + spi_setup(spi); + + spi_set_drvdata(spi, wm8580); + codec->hw_write = (hw_write_t) spi_rw; + codec->hw_read = (hw_read_t) spi_rw; + codec->control_data = spi; + + codec->dev = &spi->dev; + + return wm8580_register(wm8580); +} + +static int __devinit wm8580_spi_remove(struct spi_device *spi) +{ + struct wm8580_priv *wm8580 = spi_get_drvdata(spi); + wm8580_unregister(wm8580); + return 0; +} + +static struct spi_driver wm8580_spi_driver = { + .driver = { + .name = "wm8580_spi", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = wm8580_spi_probe, + .remove = __devexit_p(wm8580_spi_remove), +}; +#endif + static int __init wm8580_modinit(void) { int ret; @@ -1023,6 +1168,13 @@ } #endif +#if defined(CONFIG_SPI) || defined(CONFIG_SPI_MODULE) + spi_register_driver(&wm8580_spi_driver); + if (ret != 0) { + pr_err("Failed to register WM8580 SPI driver: %d\n", ret); + } +#endif + return 0; } module_init(wm8580_modinit); @@ -1032,6 +1184,10 @@ #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) i2c_del_driver(&wm8580_i2c_driver); #endif + +#if defined(CONFIG_SPI) || defined(CONFIG_SPI_MODULE) + spi_unregister_driver(&wm8580_spi_driver); +#endif } module_exit(wm8580_exit); --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_dai.h +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_dai.h @@ -0,0 +1,21 @@ +/* + * ASoC Audio Layer for Freescale STMP37XX/STMP378X ADC/DAC + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _STMP3XXX_DEV_H +#define _STMP3XXX_DEV_H +extern struct snd_soc_dai stmp3xxx_adc_dai; +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3780_devb_spdif.c +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3780_devb_spdif.c @@ -0,0 +1,95 @@ +/* + * ASoC driver for STMP3780 development board + * + * Vladimir Barinov + * + * Copyright 2008 SigmaTel, Inc + * Copyright 2008 Embedded Alley Solutions, Inc + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "../codecs/stmp3xxx_spdif.h" +#include "stmp3xxx_spdif_dai.h" +#include "stmp3xxx_pcm.h" + +extern int spdif_pinmux(int); + +/* stmp3780 devb digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link stmp3780_devb_dai = { + .name = "STMP3XXX SPDIF", + .stream_name = "STMP3XXX SPDIF", + .cpu_dai = &stmp3xxx_spdif_dai, + .codec_dai = &stmp3xxx_spdif_codec_dai, +}; + +/* stmp3780 devb audio machine driver */ +static struct snd_soc_card snd_soc_machine_stmp3780_devb = { + .name = "STMP3780 Devb", + .platform = &stmp3xxx_soc_platform, + .dai_link = &stmp3780_devb_dai, + .num_links = 1, +}; + +/* stmp3780 devb audio subsystem */ +static struct snd_soc_device stmp3780_devb_snd_devdata = { + .card = &snd_soc_machine_stmp3780_devb, + .codec_dev = &soc_spdif_codec_dev_stmp3xxx, +}; + +static struct platform_device *stmp3780_devb_snd_device; + +static int __init stmp3780_devb_init(void) +{ + int ret = 0; + + stmp3780_devb_snd_device = platform_device_alloc("soc-audio", 1); + if (!stmp3780_devb_snd_device) + return -ENOMEM; + + platform_set_drvdata(stmp3780_devb_snd_device, + &stmp3780_devb_snd_devdata); + stmp3780_devb_snd_devdata.dev = &stmp3780_devb_snd_device->dev; + stmp3780_devb_snd_device->dev.platform_data = + &stmp3780_devb_snd_devdata; + + ret = platform_device_add(stmp3780_devb_snd_device); + if (ret) + platform_device_put(stmp3780_devb_snd_device); + + spdif_pinmux(1); + + return ret; +} + +static void __exit stmp3780_devb_exit(void) +{ + spdif_pinmux(0); + platform_device_unregister(stmp3780_devb_snd_device); +} + +module_init(stmp3780_devb_init); +module_exit(stmp3780_devb_exit); + +MODULE_AUTHOR("Vladimir Barinov"); +MODULE_DESCRIPTION("STMP3780 development board ASoC driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/Kconfig +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/Kconfig @@ -0,0 +1,31 @@ +config SND_STMP3XXX_SOC + tristate "SoC Audio for the SigmaTel STMP3XXX chips" + depends on ARCH_STMP3XXX && SND_SOC + select SND_PCM + help + Say Y or M if you want to add support for codecs embedded into + the STMP3XXX chips. + +config SND_STMP3XXX_SOC_DAI + tristate + +config SND_STMP3XXX_SOC_SPDIF_DAI + tristate + +config SND_STMP3XXX_SOC_STMP3780_DEVB + tristate "SoC Audio support for STMP3780 Development Board" + depends on SND_STMP3XXX_SOC && ARCH_STMP378X + select SND_STMP3XXX_SOC_DAI + select SND_SOC_STMP378X_CODEC + help + Say Y if you want to add support for SoC audio on stmp3780 development + board with the stmp378x codec. + +config SND_STMP3XXX_SOC_STMP3780_DEVB_SPDIF + tristate "SoC SPDIF support for STMP3780 Development Board" + depends on SND_STMP3XXX_SOC && ARCH_STMP378X + select SND_STMP3XXX_SOC_SPDIF_DAI + select SND_SOC_STMP3XXX_SPDIF + help + Say Y if you want to add support for SoC audio on stmp3780 development + board with the SPDIF transmitter. --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_dai.c +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_dai.c @@ -0,0 +1,257 @@ +/* + * ASoC Audio Layer for Freescale STMP37XX/STMP378X ADC/DAC + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include "stmp3xxx_pcm.h" +#include + +#define STMP3XXX_ADC_RATES SNDRV_PCM_RATE_8000_192000 +#define STMP3XXX_ADC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +struct stmp3xxx_pcm_dma_params stmp3xxx_audio_in = { + .name = "stmp3xxx adc", + .dma_bus = STMP3XXX_BUS_APBX, + .dma_ch = 0, + .irq = IRQ_ADC_DMA, +}; + +struct stmp3xxx_pcm_dma_params stmp3xxx_audio_out = { + .name = "stmp3xxx dac", + .dma_bus = STMP3XXX_BUS_APBX, + .dma_ch = 1, + .irq = IRQ_DAC_DMA, +}; + +static irqreturn_t stmp3xxx_err_irq(int irq, void *dev_id) +{ + struct snd_pcm_substream *substream = dev_id; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + u32 ctrl_reg; + u32 overflow_mask; + u32 underflow_mask; + + if (playback) { + ctrl_reg = __raw_readl(REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL); + underflow_mask = BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ; + overflow_mask = BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ; + } else { + ctrl_reg = __raw_readl(REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL); + underflow_mask = BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ; + overflow_mask = BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ; + } + + if (ctrl_reg & underflow_mask) { + printk(KERN_DEBUG "%s underflow detected\n", + playback ? "DAC" : "ADC"); + + if (playback) + __raw_writel( + BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + else + __raw_writel( + BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + + } else if (ctrl_reg & overflow_mask) { + printk(KERN_DEBUG "%s overflow detected\n", + playback ? "DAC" : "ADC"); + + if (playback) + __raw_writel( + BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + else + __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + } else + printk(KERN_WARNING "Unknown DAC error interrupt\n"); + + return IRQ_HANDLED; +} + +static int stmp3xxx_adc_trigger(struct snd_pcm_substream *substream, + int cmd, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + if (playback) + __raw_writel(BM_AUDIOOUT_CTRL_RUN, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + else + __raw_writel(BM_AUDIOIN_CTRL_RUN, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + break; + + case SNDRV_PCM_TRIGGER_STOP: + if (playback) + __raw_writel(BM_AUDIOOUT_CTRL_RUN, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + else + __raw_writel(BM_AUDIOIN_CTRL_RUN, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + break; + + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int stmp3xxx_adc_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int irq; + int ret; + + if (playback) { + irq = IRQ_DAC_ERROR; + cpu_dai->dma_data = &stmp3xxx_audio_out; + } else { + irq = IRQ_ADC_ERROR; + cpu_dai->dma_data = &stmp3xxx_audio_in; + } + + ret = request_irq(irq, stmp3xxx_err_irq, 0, "STMP3xxx DAC/ADC Error", + substream); + if (ret) { + printk(KERN_ERR "%s: Unable to request ADC/DAC error irq %d\n", + __func__, IRQ_DAC_ERROR); + return ret; + } + + /* Enable error interrupt */ + if (playback) { + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET); + } else { + __raw_writel(BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + __raw_writel(BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET); + } + + return 0; +} + +static void stmp3xxx_adc_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + + /* Disable error interrupt */ + if (playback) { + __raw_writel(BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN, + REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR); + free_irq(IRQ_DAC_ERROR, substream); + } else { + __raw_writel(BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN, + REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR); + free_irq(IRQ_ADC_ERROR, substream); + } +} + +#ifdef CONFIG_PM +static int stmp3xxx_adc_suspend(struct snd_soc_dai *cpu_dai) +{ + return 0; +} + +static int stmp3xxx_adc_resume(struct snd_soc_dai *cpu_dai) +{ + return 0; +} +#else +#define stmp3xxx_adc_suspend NULL +#define stmp3xxx_adc_resume NULL +#endif /* CONFIG_PM */ + +struct snd_soc_dai_ops stmp3xxx_adc_dai_ops = { + .startup = stmp3xxx_adc_startup, + .shutdown = stmp3xxx_adc_shutdown, + .trigger = stmp3xxx_adc_trigger, +}; + +struct snd_soc_dai stmp3xxx_adc_dai = { + .name = "stmp3xxx adc/dac", + .id = 0, + .suspend = stmp3xxx_adc_suspend, + .resume = stmp3xxx_adc_resume, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = STMP3XXX_ADC_RATES, + .formats = STMP3XXX_ADC_FORMATS, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = STMP3XXX_ADC_RATES, + .formats = STMP3XXX_ADC_FORMATS, + }, + .ops = &stmp3xxx_adc_dai_ops, +}; +EXPORT_SYMBOL_GPL(stmp3xxx_adc_dai); + +static int __init stmp3xxx_dai_init(void) +{ + return snd_soc_register_dai(&stmp3xxx_adc_dai); +} + +static void __exit stmp3xxx_dai_exit(void) +{ + snd_soc_unregister_dai(&stmp3xxx_adc_dai); +} +module_init(stmp3xxx_dai_init); +module_exit(stmp3xxx_dai_exit); + +MODULE_AUTHOR("Vladislav Buzov"); +MODULE_DESCRIPTION("stmp3xxx dac/adc DAI"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_spdif_dai.c +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_spdif_dai.c @@ -0,0 +1,207 @@ +/* + * ALSA SoC SPDIF Audio Layer for STMP3xxx processor familiy + * + * Vladimir Barinov + * + * Copyright 2008 SigmaTel, Inc + * Copyright 2008 Embedded Alley Solutions, Inc + * Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "stmp3xxx_pcm.h" +#include + +#define STMP3XXX_SPDIF_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) +#define STMP3XXX_SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct stmp3xxx_pcm_dma_params stmp3xxx_spdif = { + .name = "stmp3xxx spdif", + .dma_bus = STMP3XXX_BUS_APBX, + .dma_ch = 2, + .irq = IRQ_SPDIF_DMA, +}; + +static irqreturn_t stmp3xxx_err_irq(int irq, void *dev_id) +{ + struct snd_pcm_substream *substream = dev_id; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + u32 ctrl_reg = 0; + u32 overflow_mask; + u32 underflow_mask; + + if (playback) { + ctrl_reg = __raw_readl(REGS_SPDIF_BASE + HW_SPDIF_CTRL); + underflow_mask = BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ; + overflow_mask = BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ; + } + + if (ctrl_reg & underflow_mask) { + printk(KERN_DEBUG "underflow detected SPDIF\n"); + + if (playback) + __raw_writel(BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + } else if (ctrl_reg & overflow_mask) { + printk(KERN_DEBUG "overflow detected SPDIF\n"); + + if (playback) + __raw_writel(BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + } else + printk(KERN_WARNING "Unknown SPDIF error interrupt\n"); + + return IRQ_HANDLED; +} + +static int stmp3xxx_spdif_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + if (playback) + __raw_writel(BM_SPDIF_CTRL_RUN, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); + break; + case SNDRV_PCM_TRIGGER_STOP: + if (playback) + __raw_writel(BM_SPDIF_CTRL_RUN, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + break; + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + + default: + ret = -EINVAL; + } + + return ret; +} + +static int stmp3xxx_spdif_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + int irq; + int ret; + + if (playback) { + irq = IRQ_SPDIF_ERROR; + cpu_dai->dma_data = &stmp3xxx_spdif; + } + + ret = request_irq(irq, stmp3xxx_err_irq, 0, "STMP3xxx SPDIF Error", + substream); + if (ret) { + printk(KERN_ERR "%s: Unable to request SPDIF error irq %d\n", + __func__, IRQ_SPDIF_ERROR); + return ret; + } + + /* Enable error interrupt */ + if (playback) { + __raw_writel(BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + __raw_writel(BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + __raw_writel(BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET); + } + + return 0; +} + +static void stmp3xxx_spdif_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + + /* Disable error interrupt */ + if (playback) { + __raw_writel(BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN, + REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR); + free_irq(IRQ_SPDIF_ERROR, substream); + } +} + +#ifdef CONFIG_PM +static int stmp3xxx_spdif_suspend(struct snd_soc_dai *cpu_dai) +{ + return 0; +} + +static int stmp3xxx_spdif_resume(struct snd_soc_dai *cpu_dai) +{ + return 0; +} +#else +#define stmp3xxx_spdif_suspend NULL +#define stmp3xxx_spdif_resume NULL +#endif /* CONFIG_PM */ + +struct snd_soc_dai_ops stmp3xxx_spdif_dai_ops = { + .startup = stmp3xxx_spdif_startup, + .shutdown = stmp3xxx_spdif_shutdown, + .trigger = stmp3xxx_spdif_trigger, +}; + +struct snd_soc_dai stmp3xxx_spdif_dai = { + .name = "stmp3xxx spdif", + .id = 0, + .suspend = stmp3xxx_spdif_suspend, + .resume = stmp3xxx_spdif_resume, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = STMP3XXX_SPDIF_RATES, + .formats = STMP3XXX_SPDIF_FORMATS, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = STMP3XXX_SPDIF_RATES, + .formats = STMP3XXX_SPDIF_FORMATS, + }, + .ops = &stmp3xxx_spdif_dai_ops, +}; +EXPORT_SYMBOL_GPL(stmp3xxx_spdif_dai); + +static int __init stmp3xxx_spdif_dai_init(void) +{ + return snd_soc_register_dai(&stmp3xxx_spdif_dai); +} + +static void __exit stmp3xxx_spdif_dai_exit(void) +{ + snd_soc_unregister_dai(&stmp3xxx_spdif_dai); +} +module_init(stmp3xxx_spdif_dai_init); +module_exit(stmp3xxx_spdif_dai_exit); + +MODULE_AUTHOR("Vladimir Barinov"); +MODULE_DESCRIPTION("stmp3xxx SPDIF DAI"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/Makefile +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/Makefile @@ -0,0 +1,12 @@ +# STMP3XXX platfrom support +snd-soc-stmp3xxx-objs := stmp3xxx_pcm.o +snd-soc-stmp3xxx-dai-objs := stmp3xxx_dai.o +snd-soc-stmp3xxx-spdif-dai-objs := stmp3xxx_spdif_dai.o +snd-soc-stmp3780-devb-objs := stmp3780_devb.o +snd-soc-stmp3780-devb-spdif-objs := stmp3780_devb_spdif.o + +obj-$(CONFIG_SND_STMP3XXX_SOC) += snd-soc-stmp3xxx.o +obj-$(CONFIG_SND_STMP3XXX_SOC_DAI) += snd-soc-stmp3xxx-dai.o +obj-$(CONFIG_SND_STMP3XXX_SOC_SPDIF_DAI) += snd-soc-stmp3xxx-spdif-dai.o +obj-$(CONFIG_SND_STMP3XXX_SOC_STMP3780_DEVB) += snd-soc-stmp3780-devb.o +obj-$(CONFIG_SND_STMP3XXX_SOC_STMP3780_DEVB_SPDIF) += snd-soc-stmp3780-devb-spdif.o --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_pcm.h +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_pcm.h @@ -0,0 +1,30 @@ +/* + * ASoC PCM interface for Freescale STMP37XX/STMP378X ADC/DAC + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _STMP3XXX_PCM_H +#define _STMP3XXX_PCM_H + +struct stmp3xxx_pcm_dma_params { + char *name; + int dma_bus; /* DMA bus */ + int dma_ch; /* DMA channel number */ + int irq; /* DMA interrupt number */ +}; + +extern struct snd_soc_platform stmp3xxx_soc_platform; + +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_spdif_dai.h +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_spdif_dai.h @@ -0,0 +1,21 @@ +/* + * ASoC Audio Layer for Freescale STMP3XXX SPDIF transmitter + * + * Author: Vladimir Barinov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _STMP3XXX_SPDIF_H +#define _STMP3XXX_SPDIF_H +extern struct snd_soc_dai stmp3xxx_spdif_dai; +#endif --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3780_devb.c +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3780_devb.c @@ -0,0 +1,92 @@ +/* + * ASoC driver for Freescale STMP3780 development board + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "../codecs/stmp378x_codec.h" +#include "stmp3xxx_dai.h" +#include "stmp3xxx_pcm.h" + +/* stmp3780 devb digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link stmp3780_devb_dai = { + .name = "STMP378X ADC/DAC", + .stream_name = "STMP378X ADC/DAC", + .cpu_dai = &stmp3xxx_adc_dai, + .codec_dai = &stmp378x_codec_dai, +}; + +/* stmp3780 devb audio machine driver */ +static struct snd_soc_card snd_soc_card_stmp3780_devb = { + .name = "STMP3780 Devb", + .platform = &stmp3xxx_soc_platform, + .dai_link = &stmp3780_devb_dai, + .num_links = 1, +}; + +/* stmp3780 devb audio subsystem */ +static struct snd_soc_device stmp3780_devb_snd_devdata = { + .card = &snd_soc_card_stmp3780_devb, + .codec_dev = &soc_codec_dev_stmp378x, +}; + +static struct platform_device *stmp3780_devb_snd_device; + +static int __init stmp3780_devb_init(void) +{ + int ret = 0; + + stmp3780_devb_snd_device = platform_device_alloc("soc-audio", 0); + if (!stmp3780_devb_snd_device) + return -ENOMEM; + + platform_set_drvdata(stmp3780_devb_snd_device, + &stmp3780_devb_snd_devdata); + stmp3780_devb_snd_devdata.dev = &stmp3780_devb_snd_device->dev; + stmp3780_devb_snd_device->dev.platform_data = + &stmp3780_devb_snd_devdata; + + ret = platform_device_add(stmp3780_devb_snd_device); + if (ret) + platform_device_put(stmp3780_devb_snd_device); + + return ret; +} + +static void __exit stmp3780_devb_exit(void) +{ + platform_device_unregister(stmp3780_devb_snd_device); +} + +module_init(stmp3780_devb_init); +module_exit(stmp3780_devb_exit); + +MODULE_AUTHOR("Vladislav Buzov"); +MODULE_DESCRIPTION("STMP3780 development board ASoC driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/soc/stmp3xxx/stmp3xxx_pcm.c +++ linux-fsl-imx51-2.6.31/sound/soc/stmp3xxx/stmp3xxx_pcm.c @@ -0,0 +1,461 @@ +/* + * ASoC PCM interface for Freescale STMP37XX/STMP378X ADC/DAC + * + * Author: Vladislav Buzov + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "stmp3xxx_pcm.h" + +static const struct snd_pcm_hardware stmp3xxx_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME | + SNDRV_PCM_INFO_INTERLEAVED, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + .channels_min = 2, + .channels_max = 2, + .period_bytes_min = 32, + .period_bytes_max = 8192, + .periods_min = 1, + .periods_max = 255, + .buffer_bytes_max = 64 * 1024, + .fifo_size = 32, +}; + +/* + * Required to request DMA channels + */ +struct device *stmp3xxx_pcm_dev; + +struct stmp3xxx_runtime_data { + u32 dma_ch; + u32 dma_period; + u32 dma_totsize; + + struct stmp3xxx_pcm_dma_params *params; + struct stmp3xxx_dma_descriptor *dma_desc_array; +}; + +static irqreturn_t stmp3xxx_pcm_dma_irq(int irq, void *dev_id) +{ + struct snd_pcm_substream *substream = dev_id; + struct stmp3xxx_runtime_data *prtd = substream->runtime->private_data; + +#ifdef CONFIG_ARCH_STMP37XX + u32 err_mask = 1 << (16 + prtd->params->dma_ch); +#endif +#ifdef CONFIG_ARCH_STMP378X + u32 err_mask = 1 << prtd->params->dma_ch; +#endif + u32 irq_mask = 1 << prtd->params->dma_ch; + +#ifdef CONFIG_ARCH_STMP37XX + if (__raw_readl(REGS_APBX_BASE + HW_APBX_CTRL1) & err_mask) { +#endif +#ifdef CONFIG_ARCH_STMP378X + if (__raw_readl(REGS_APBX_BASE + HW_APBX_CTRL2) & err_mask) { +#endif + printk(KERN_WARNING "%s: DMA audio channel %d (%s) error\n", + __func__, prtd->params->dma_ch, prtd->params->name); +#ifdef CONFIG_ARCH_STMP37XX + __raw_writel(err_mask, REGS_APBX_BASE + HW_APBX_CTRL1_CLR); +#endif +#ifdef CONFIG_ARCH_STMP378X + __raw_writel(err_mask, REGS_APBX_BASE + HW_APBX_CTRL2_CLR); +#endif + } else if (__raw_readl(REGS_APBX_BASE + HW_APBX_CTRL1) & irq_mask) { + stmp3xxx_dma_clear_interrupt(prtd->dma_ch); + snd_pcm_period_elapsed(substream); + } else + printk(KERN_WARNING "%s: Unknown interrupt\n", __func__); + + return IRQ_HANDLED; +} + +/* + * Make a circular DMA descriptor list + */ +static int stmp3xxx_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stmp3xxx_runtime_data *prtd = runtime->private_data; + dma_addr_t dma_buffer_phys; + int periods_num, playback, i; + + playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 1 : 0; + periods_num = prtd->dma_totsize / prtd->dma_period; + dma_buffer_phys = runtime->dma_addr; + + /* Reset DMA channel, enable interrupt */ + stmp3xxx_dma_reset_channel(prtd->dma_ch); + + /* Set up a DMA chain to sent DMA buffer */ + for (i = 0; i < periods_num; i++) { + int next = (i + 1) % periods_num; + u32 cmd = 0; + + /* Link with previous command */ + prtd->dma_desc_array[i].command->next = + prtd->dma_desc_array[next].handle; + + prtd->dma_desc_array[i].next_descr = + &prtd->dma_desc_array[next]; + + cmd = BF(prtd->dma_period, APBX_CHn_CMD_XFER_COUNT) | + BM_APBX_CHn_CMD_IRQONCMPLT | + BM_APBX_CHn_CMD_CHAIN; + + /* Set DMA direction */ + if (playback) + cmd |= BF(BV_APBX_CHn_CMD_COMMAND__DMA_READ, + APBX_CHn_CMD_COMMAND); + else + cmd |= BF(BV_APBX_CHn_CMD_COMMAND__DMA_WRITE, + APBX_CHn_CMD_COMMAND); + + prtd->dma_desc_array[i].command->cmd = cmd; + prtd->dma_desc_array[i].command->buf_ptr = dma_buffer_phys; + + /* Next data chunk */ + dma_buffer_phys += prtd->dma_period; + } + + return 0; +} + +/* + * Stop circular DMA descriptor list + * We should not stop DMA in a middle of current transaction once we receive + * stop request from ALSA core. This function finds the next DMA descriptor + * and set it up to decrement DMA channel semaphore. So the current transaction + * is the last data transfer. + */ +static void stmp3xxx_pcm_stop(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stmp3xxx_runtime_data *prtd = runtime->private_data; + dma_addr_t pos; + int desc; + + /* Freez DMA channel for a moment */ + stmp3xxx_dma_freeze(prtd->dma_ch); + + /* Find current DMA descriptor */ + pos = __raw_readl(REGS_APBX_BASE + + HW_APBX_CHn_BAR(prtd->params->dma_ch)); + desc = (pos - runtime->dma_addr) / prtd->dma_period; + + /* Set up the next descriptor to decrement DMA channel sempahore */ + prtd->dma_desc_array[desc].next_descr->command->cmd + = BM_APBX_CHn_CMD_SEMAPHORE; + + /* Let the current DMA transaction finish */ + stmp3xxx_dma_unfreeze(prtd->dma_ch); +} + +static int stmp3xxx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct stmp3xxx_runtime_data *prtd = substream->runtime->private_data; + int ret = 0; + + switch (cmd) { + + case SNDRV_PCM_TRIGGER_START: + stmp3xxx_dma_go(prtd->dma_ch, prtd->dma_desc_array, 1); + break; + + case SNDRV_PCM_TRIGGER_STOP: + stmp3xxx_pcm_stop(substream); + break; + + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + stmp3xxx_dma_unfreeze(prtd->dma_ch); + break; + + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + stmp3xxx_dma_freeze(prtd->dma_ch); + break; + + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static snd_pcm_uframes_t +stmp3xxx_pcm_pointer(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stmp3xxx_runtime_data *prtd = runtime->private_data; + unsigned int offset; + dma_addr_t pos; + + pos = __raw_readl(REGS_APBX_BASE + + HW_APBX_CHn_BAR(prtd->params->dma_ch)); + offset = bytes_to_frames(runtime, pos - runtime->dma_addr); + + if (offset >= runtime->buffer_size) + offset = 0; + + return offset; +} + +static int stmp3xxx_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params) +{ + struct stmp3xxx_runtime_data *prtd = substream->runtime->private_data; + + prtd->dma_period = params_period_bytes(hw_params); + prtd->dma_totsize = params_buffer_bytes(hw_params); + + return snd_pcm_lib_malloc_pages(substream, + params_buffer_bytes(hw_params)); +} + +static int stmp3xxx_pcm_hw_free(struct snd_pcm_substream *substream) +{ + return snd_pcm_lib_free_pages(substream); +} + +static int stmp3xxx_pcm_dma_request(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct stmp3xxx_runtime_data *prtd = runtime->private_data; + struct stmp3xxx_pcm_dma_params *dma_data = rtd->dai->cpu_dai->dma_data; + int desc_num = stmp3xxx_pcm_hardware.periods_max; + int desc; + int ret; + + if (!dma_data) + return -ENODEV; + + prtd->params = dma_data; + prtd->dma_ch = STMP3XXX_DMA(dma_data->dma_ch, dma_data->dma_bus); + + ret = stmp3xxx_dma_request(prtd->dma_ch, stmp3xxx_pcm_dev, + prtd->params->name); + if (ret) { + printk(KERN_ERR "%s: Failed to request DMA channel (%d:%d)\n", + __func__, dma_data->dma_bus, dma_data->dma_ch); + return ret; + } + + /* Allocate memory for data and pio DMA descriptors */ + prtd->dma_desc_array = + kzalloc(sizeof(struct stmp3xxx_dma_descriptor) * desc_num, + GFP_KERNEL); + if (prtd->dma_desc_array == NULL) { + printk(KERN_ERR "%s: Unable to allocate memory\n", __func__); + stmp3xxx_dma_release(prtd->dma_ch); + return -ENOMEM; + } + + for (desc = 0; desc < desc_num; desc++) { + ret = stmp3xxx_dma_allocate_command(prtd->dma_ch, + &prtd->dma_desc_array[desc]); + if (ret) { + printk(KERN_ERR"%s Unable to allocate DMA command %d\n", + __func__, desc); + goto err; + } + } + + ret = request_irq(prtd->params->irq, stmp3xxx_pcm_dma_irq, 0, + "STMP3xxx PCM DMA", substream); + if (ret) { + printk(KERN_ERR "%s: Unable to request DMA irq %d\n", __func__, + prtd->params->irq); + goto err; + } + + + /* Enable completion interrupt */ + stmp3xxx_dma_clear_interrupt(prtd->dma_ch); + stmp3xxx_dma_enable_interrupt(prtd->dma_ch); + + return 0; + +err: + while (--desc >= 0) + stmp3xxx_dma_free_command(prtd->dma_ch, + &prtd->dma_desc_array[desc]); + kfree(prtd->dma_desc_array); + stmp3xxx_dma_release(prtd->dma_ch); + + return ret; +} + +static int stmp3xxx_pcm_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stmp3xxx_runtime_data *prtd; + int ret; + + /* Ensure that buffer size is a multiple of the period size */ + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + return ret; + + snd_soc_set_runtime_hwparams(substream, &stmp3xxx_pcm_hardware); + + prtd = kzalloc(sizeof(struct stmp3xxx_runtime_data), GFP_KERNEL); + if (prtd == NULL) + return -ENOMEM; + + runtime->private_data = prtd; + + ret = stmp3xxx_pcm_dma_request(substream); + if (ret) { + printk(KERN_ERR "stmp3xxx_pcm: Failed to request channels\n"); + kfree(prtd); + return ret; + } + + return 0; +} + +static int stmp3xxx_pcm_close(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stmp3xxx_runtime_data *prtd = runtime->private_data; + int desc_num = stmp3xxx_pcm_hardware.periods_max; + int desc; + + /* Free DMA irq */ + free_irq(prtd->params->irq, substream); + + /* Free DMA channel */ + for (desc = 0; desc < desc_num; desc++) + stmp3xxx_dma_free_command(prtd->dma_ch, + &prtd->dma_desc_array[desc]); + kfree(prtd->dma_desc_array); + stmp3xxx_dma_release(prtd->dma_ch); + + /* Free private runtime data */ + kfree(prtd); + + return 0; +} + +static int stmp3xxx_pcm_mmap(struct snd_pcm_substream *substream, + struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + + return dma_mmap_coherent(NULL, vma, runtime->dma_area, + runtime->dma_addr, runtime->dma_bytes); +} + +struct snd_pcm_ops stmp3xxx_pcm_ops = { + .open = stmp3xxx_pcm_open, + .close = stmp3xxx_pcm_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = stmp3xxx_pcm_hw_params, + .hw_free = stmp3xxx_pcm_hw_free, + .prepare = stmp3xxx_pcm_prepare, + .trigger = stmp3xxx_pcm_trigger, + .pointer = stmp3xxx_pcm_pointer, + .mmap = stmp3xxx_pcm_mmap, +}; + +static u64 stmp3xxx_pcm_dma_mask = DMA_BIT_MASK(32); + +static int stmp3xxx_pcm_new(struct snd_card *card, + struct snd_soc_dai *dai, struct snd_pcm *pcm) +{ + size_t size = stmp3xxx_pcm_hardware.buffer_bytes_max; + + if (!card->dev->dma_mask) + card->dev->dma_mask = &stmp3xxx_pcm_dma_mask; + + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = DMA_BIT_MASK(32); + + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, NULL, + size, size); + + return 0; +} + +static void stmp3xxx_pcm_free(struct snd_pcm *pcm) +{ + snd_pcm_lib_preallocate_free_for_all(pcm); +} + +/* + * We need probe/remove callbacks to setup stmp3xxx_pcm_dev + */ +static int stmp3xxx_pcm_probe(struct platform_device *pdev) +{ + stmp3xxx_pcm_dev = &pdev->dev; + return 0; +} + +static int stmp3xxx_pcm_remove(struct platform_device *pdev) +{ + stmp3xxx_pcm_dev = NULL; + return 0; +} + +struct snd_soc_platform stmp3xxx_soc_platform = { + .name = "STMP3xxx Audio", + .pcm_ops = &stmp3xxx_pcm_ops, + .probe = stmp3xxx_pcm_probe, + .remove = stmp3xxx_pcm_remove, + .pcm_new = stmp3xxx_pcm_new, + .pcm_free = stmp3xxx_pcm_free, +}; +EXPORT_SYMBOL_GPL(stmp3xxx_soc_platform); + +static int __init stmp3xxx_pcm_init(void) +{ + return snd_soc_register_platform(&stmp3xxx_soc_platform); +} + +static void __exit stmp3xxx_pcm_exit(void) +{ + snd_soc_unregister_platform(&stmp3xxx_soc_platform); +} +module_init(stmp3xxx_pcm_init); +module_exit(stmp3xxx_pcm_exit); + +MODULE_AUTHOR("Vladislav Buzov"); +MODULE_DESCRIPTION("STMP3xxx DMA Module"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/sound/core/rawmidi.c +++ linux-fsl-imx51-2.6.31/sound/core/rawmidi.c @@ -248,7 +248,8 @@ list_for_each_entry(substream, &s->substreams, list) { if (substream->opened) { if (stream == SNDRV_RAWMIDI_STREAM_INPUT || - !(mode & SNDRV_RAWMIDI_LFLG_APPEND)) + !(mode & SNDRV_RAWMIDI_LFLG_APPEND) || + !substream->append) continue; } if (subdevice < 0 || subdevice == substream->number) { @@ -266,17 +267,21 @@ { int err; - err = snd_rawmidi_runtime_create(substream); - if (err < 0) - return err; - err = substream->ops->open(substream); - if (err < 0) - return err; - substream->opened = 1; - if (substream->use_count++ == 0) - substream->active_sensing = 1; - if (mode & SNDRV_RAWMIDI_LFLG_APPEND) - substream->append = 1; + if (substream->use_count == 0) { + err = snd_rawmidi_runtime_create(substream); + if (err < 0) + return err; + err = substream->ops->open(substream); + if (err < 0) { + snd_rawmidi_runtime_free(substream); + return err; + } + substream->opened = 1; + substream->active_sensing = 0; + if (mode & SNDRV_RAWMIDI_LFLG_APPEND) + substream->append = 1; + } + substream->use_count++; rmidi->streams[substream->stream].substream_opened++; return 0; } @@ -297,27 +302,27 @@ SNDRV_RAWMIDI_STREAM_INPUT, mode, &sinput); if (err < 0) - goto __error; + return err; } if (mode & SNDRV_RAWMIDI_LFLG_OUTPUT) { err = assign_substream(rmidi, subdevice, SNDRV_RAWMIDI_STREAM_OUTPUT, mode, &soutput); if (err < 0) - goto __error; + return err; } if (sinput) { err = open_substream(rmidi, sinput, mode); if (err < 0) - goto __error; + return err; } if (soutput) { err = open_substream(rmidi, soutput, mode); if (err < 0) { if (sinput) close_substream(rmidi, sinput, 0); - goto __error; + return err; } } @@ -325,13 +330,6 @@ rfile->input = sinput; rfile->output = soutput; return 0; - - __error: - if (sinput && sinput->runtime) - snd_rawmidi_runtime_free(sinput); - if (soutput && soutput->runtime) - snd_rawmidi_runtime_free(soutput); - return err; } /* called from sound/core/seq/seq_midi.c */ --- linux-fsl-imx51-2.6.31.orig/sound/core/control.c +++ linux-fsl-imx51-2.6.31/sound/core/control.c @@ -31,6 +31,7 @@ /* max number of user-defined controls */ #define MAX_USER_CONTROLS 32 +#define MAX_CONTROL_COUNT 1028 struct snd_kctl_ioctl { struct list_head list; /* list of all ioctls */ @@ -190,6 +191,10 @@ if (snd_BUG_ON(!control || !control->count)) return NULL; + + if (control->count > MAX_CONTROL_COUNT) + return NULL; + kctl = kzalloc(sizeof(*kctl) + sizeof(struct snd_kcontrol_volatile) * control->count, GFP_KERNEL); if (kctl == NULL) { snd_printk(KERN_ERR "Cannot allocate control instance\n"); --- linux-fsl-imx51-2.6.31.orig/sound/core/hrtimer.c +++ linux-fsl-imx51-2.6.31/sound/core/hrtimer.c @@ -37,14 +37,22 @@ struct snd_hrtimer { struct snd_timer *timer; struct hrtimer hrt; + atomic_t running; }; static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt) { struct snd_hrtimer *stime = container_of(hrt, struct snd_hrtimer, hrt); struct snd_timer *t = stime->timer; + + if (!atomic_read(&stime->running)) + return HRTIMER_NORESTART; + hrtimer_forward_now(hrt, ns_to_ktime(t->sticks * resolution)); snd_timer_interrupt(stime->timer, t->sticks); + + if (!atomic_read(&stime->running)) + return HRTIMER_NORESTART; return HRTIMER_RESTART; } @@ -58,6 +66,7 @@ hrtimer_init(&stime->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL); stime->timer = t; stime->hrt.function = snd_hrtimer_callback; + atomic_set(&stime->running, 0); t->private_data = stime; return 0; } @@ -78,16 +87,18 @@ { struct snd_hrtimer *stime = t->private_data; + atomic_set(&stime->running, 0); + hrtimer_cancel(&stime->hrt); hrtimer_start(&stime->hrt, ns_to_ktime(t->sticks * resolution), HRTIMER_MODE_REL); + atomic_set(&stime->running, 1); return 0; } static int snd_hrtimer_stop(struct snd_timer *t) { struct snd_hrtimer *stime = t->private_data; - - hrtimer_cancel(&stime->hrt); + atomic_set(&stime->running, 0); return 0; } --- linux-fsl-imx51-2.6.31.orig/sound/core/seq/seq_midi.c +++ linux-fsl-imx51-2.6.31/sound/core/seq/seq_midi.c @@ -236,6 +236,7 @@ memset(¶ms, 0, sizeof(params)); params.avail_min = 1; params.buffer_size = output_buffer_size; + params.no_active_sensing = 1; if ((err = snd_rawmidi_output_params(msynth->output_rfile.output, ¶ms)) < 0) { snd_rawmidi_kernel_release(&msynth->output_rfile); return err; --- linux-fsl-imx51-2.6.31.orig/sound/core/seq/oss/seq_oss_init.c +++ linux-fsl-imx51-2.6.31/sound/core/seq/oss/seq_oss_init.c @@ -280,13 +280,10 @@ return 0; _error: - snd_seq_oss_writeq_delete(dp->writeq); - snd_seq_oss_readq_delete(dp->readq); snd_seq_oss_synth_cleanup(dp); snd_seq_oss_midi_cleanup(dp); - delete_port(dp); delete_seq_queue(dp->queue); - kfree(dp); + delete_port(dp); return rc; } @@ -349,8 +346,10 @@ static int delete_port(struct seq_oss_devinfo *dp) { - if (dp->port < 0) + if (dp->port < 0) { + kfree(dp); return 0; + } debug_printk(("delete_port %i\n", dp->port)); return snd_seq_event_port_detach(dp->cseq, dp->port); --- linux-fsl-imx51-2.6.31.orig/sound/oss/soundcard.c +++ linux-fsl-imx51-2.6.31/sound/oss/soundcard.c @@ -87,7 +87,7 @@ int i, n; for (i = 0; i < num_mixer_volumes; i++) { - if (strcmp(name, mixer_vols[i].name) == 0) { + if (strncmp(name, mixer_vols[i].name, 32) == 0) { if (present) mixer_vols[i].num = i; return mixer_vols[i].levels; @@ -99,7 +99,7 @@ } n = num_mixer_volumes++; - strcpy(mixer_vols[n].name, name); + strncpy(mixer_vols[n].name, name, 32); if (present) mixer_vols[n].num = n; --- linux-fsl-imx51-2.6.31.orig/sound/ppc/keywest.c +++ linux-fsl-imx51-2.6.31/sound/ppc/keywest.c @@ -59,6 +59,18 @@ strlcpy(info.type, "keywest", I2C_NAME_SIZE); info.addr = keywest_ctx->addr; keywest_ctx->client = i2c_new_device(adapter, &info); + if (!keywest_ctx->client) + return -ENODEV; + /* + * We know the driver is already loaded, so the device should be + * already bound. If not it means binding failed, and then there + * is no point in keeping the device instantiated. + */ + if (!keywest_ctx->client->driver) { + i2c_unregister_device(keywest_ctx->client); + keywest_ctx->client = NULL; + return -ENODEV; + } /* * Let i2c-core delete that device on driver removal. --- linux-fsl-imx51-2.6.31.orig/sound/usb/usbaudio.c +++ linux-fsl-imx51-2.6.31/sound/usb/usbaudio.c @@ -752,7 +752,7 @@ return 0; /* already large enough */ vfree(runtime->dma_area); } - runtime->dma_area = vmalloc(size); + runtime->dma_area = vmalloc_user(size); if (!runtime->dma_area) return -ENOMEM; runtime->dma_bytes = size; --- linux-fsl-imx51-2.6.31.orig/sound/usb/usbaudio.h +++ linux-fsl-imx51-2.6.31/sound/usb/usbaudio.h @@ -210,7 +210,7 @@ /* */ -#define combine_word(s) ((*s) | ((unsigned int)(s)[1] << 8)) +#define combine_word(s) ((*(s)) | ((unsigned int)(s)[1] << 8)) #define combine_triple(s) (combine_word(s) | ((unsigned int)(s)[2] << 16)) #define combine_quad(s) (combine_triple(s) | ((unsigned int)(s)[3] << 24)) --- linux-fsl-imx51-2.6.31.orig/sound/usb/caiaq/midi.c +++ linux-fsl-imx51-2.6.31/sound/usb/caiaq/midi.c @@ -135,7 +135,7 @@ if (ret < 0) return ret; - strcpy(rmidi->name, device->product_name); + strlcpy(rmidi->name, device->product_name, sizeof(rmidi->name)); rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX; rmidi->private_data = device; --- linux-fsl-imx51-2.6.31.orig/sound/usb/caiaq/audio.c +++ linux-fsl-imx51-2.6.31/sound/usb/caiaq/audio.c @@ -629,7 +629,7 @@ } dev->pcm->private_data = dev; - strcpy(dev->pcm->name, dev->product_name); + strlcpy(dev->pcm->name, dev->product_name, sizeof(dev->pcm->name)); memset(dev->sub_playback, 0, sizeof(dev->sub_playback)); memset(dev->sub_capture, 0, sizeof(dev->sub_capture)); --- linux-fsl-imx51-2.6.31.orig/include/Kbuild +++ linux-fsl-imx51-2.6.31/include/Kbuild @@ -9,4 +9,3 @@ header-y += video/ header-y += drm/ header-y += xen/ -header-y += scsi/ --- linux-fsl-imx51-2.6.31.orig/include/mtd/mtd-abi.h +++ linux-fsl-imx51-2.6.31/include/mtd/mtd-abi.h @@ -42,12 +42,13 @@ #define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ #define MTD_NO_ERASE 0x1000 /* No erase necessary */ #define MTD_POWERUP_LOCK 0x2000 /* Always locked after reset */ +#define MTD_OOB_WRITEABLE 0x4000 /* Use Out-Of-Band area */ // Some common devices / combinations of capabilities #define MTD_CAP_ROM 0 #define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE) #define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE) -#define MTD_CAP_NANDFLASH (MTD_WRITEABLE) +#define MTD_CAP_NANDFLASH (MTD_WRITEABLE | MTD_OOB_WRITEABLE) /* ECC byte placement */ #define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended) --- linux-fsl-imx51-2.6.31.orig/include/trace/events/fs.h +++ linux-fsl-imx51-2.6.31/include/trace/events/fs.h @@ -0,0 +1,53 @@ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM fs + +#if !defined(_TRACE_FS_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_FS_H + +#include +#include + +TRACE_EVENT(do_sys_open, + + TP_PROTO(char *filename, int flags, int mode), + + TP_ARGS(filename, flags, mode), + + TP_STRUCT__entry( + __string( filename, filename ) + __field( int, flags ) + __field( int, mode ) + ), + + TP_fast_assign( + __assign_str(filename, filename); + __entry->flags = flags; + __entry->mode = mode; + ), + + TP_printk("\"%s\" %x %o", + __get_str(filename), __entry->flags, __entry->mode) +); + +TRACE_EVENT(open_exec, + + TP_PROTO(char *filename), + + TP_ARGS(filename), + + TP_STRUCT__entry( + __string( filename, filename ) + ), + + TP_fast_assign( + __assign_str(filename, filename); + ), + + TP_printk("\"%s\"", + __get_str(filename)) +); + +#endif /* _TRACE_FS_H */ + +/* This part must be outside protection */ +#include --- linux-fsl-imx51-2.6.31.orig/include/trace/events/ext4.h +++ linux-fsl-imx51-2.6.31/include/trace/events/ext4.h @@ -5,10 +5,12 @@ #define _TRACE_EXT4_H #include -#include "../../../fs/ext4/ext4.h" -#include "../../../fs/ext4/mballoc.h" #include +struct ext4_allocation_context; +struct ext4_allocation_request; +struct ext4_prealloc_space; + TRACE_EVENT(ext4_free_inode, TP_PROTO(struct inode *inode), @@ -229,6 +231,7 @@ __field( char, for_reclaim ) __field( char, for_writepages ) __field( char, range_cyclic ) + __field( pgoff_t, writeback_index ) ), TP_fast_assign( @@ -243,14 +246,51 @@ __entry->for_reclaim = wbc->for_reclaim; __entry->for_writepages = wbc->for_writepages; __entry->range_cyclic = wbc->range_cyclic; + __entry->writeback_index = inode->i_mapping->writeback_index; ), - TP_printk("dev %s ino %lu nr_t_write %ld pages_skipped %ld range_start %llu range_end %llu nonblocking %d for_kupdate %d for_reclaim %d for_writepages %d range_cyclic %d", - jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->nr_to_write, + TP_printk("dev %s ino %lu nr_to_write %ld pages_skipped %ld range_start %llu range_end %llu nonblocking %d for_kupdate %d for_reclaim %d for_writepages %d range_cyclic %d writeback_index %lu", + jbd2_dev_to_name(__entry->dev), + (unsigned long) __entry->ino, __entry->nr_to_write, __entry->pages_skipped, __entry->range_start, __entry->range_end, __entry->nonblocking, __entry->for_kupdate, __entry->for_reclaim, - __entry->for_writepages, __entry->range_cyclic) + __entry->for_writepages, __entry->range_cyclic, + (unsigned long) __entry->writeback_index) +); + +TRACE_EVENT(ext4_da_write_pages, + TP_PROTO(struct inode *inode, struct mpage_da_data *mpd), + + TP_ARGS(inode, mpd), + + TP_STRUCT__entry( + __field( dev_t, dev ) + __field( ino_t, ino ) + __field( __u64, b_blocknr ) + __field( __u32, b_size ) + __field( __u32, b_state ) + __field( unsigned long, first_page ) + __field( int, io_done ) + __field( int, pages_written ) + ), + + TP_fast_assign( + __entry->dev = inode->i_sb->s_dev; + __entry->ino = inode->i_ino; + __entry->b_blocknr = mpd->b_blocknr; + __entry->b_size = mpd->b_size; + __entry->b_state = mpd->b_state; + __entry->first_page = mpd->first_page; + __entry->io_done = mpd->io_done; + __entry->pages_written = mpd->pages_written; + ), + + TP_printk("dev %s ino %lu b_blocknr %llu b_size %u b_state 0x%04x first_page %lu io_done %d pages_written %d", + jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, + __entry->b_blocknr, __entry->b_size, + __entry->b_state, __entry->first_page, + __entry->io_done, __entry->pages_written) ); TRACE_EVENT(ext4_da_writepages_result, @@ -268,6 +308,7 @@ __field( char, encountered_congestion ) __field( char, more_io ) __field( char, no_nrwrite_index_update ) + __field( pgoff_t, writeback_index ) ), TP_fast_assign( @@ -279,13 +320,16 @@ __entry->encountered_congestion = wbc->encountered_congestion; __entry->more_io = wbc->more_io; __entry->no_nrwrite_index_update = wbc->no_nrwrite_index_update; + __entry->writeback_index = inode->i_mapping->writeback_index; ), - TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld congestion %d more_io %d no_nrwrite_index_update %d", - jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->ret, + TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld congestion %d more_io %d no_nrwrite_index_update %d writeback_index %lu", + jbd2_dev_to_name(__entry->dev), + (unsigned long) __entry->ino, __entry->ret, __entry->pages_written, __entry->pages_skipped, __entry->encountered_congestion, __entry->more_io, - __entry->no_nrwrite_index_update) + __entry->no_nrwrite_index_update, + (unsigned long) __entry->writeback_index) ); TRACE_EVENT(ext4_da_write_begin, --- linux-fsl-imx51-2.6.31.orig/include/asm-generic/vmlinux.lds.h +++ linux-fsl-imx51-2.6.31/include/asm-generic/vmlinux.lds.h @@ -587,6 +587,7 @@ *(.initcall0s.init) \ *(.initcall1.init) \ *(.initcall1s.init) \ + *(.initcallearlyrootfs.init) \ *(.initcall2.init) \ *(.initcall2s.init) \ *(.initcall3.init) \ --- linux-fsl-imx51-2.6.31.orig/include/pcmcia/ss.h +++ linux-fsl-imx51-2.6.31/include/pcmcia/ss.h @@ -262,6 +262,8 @@ struct device dev; /* data internal to the socket driver */ void *driver_data; + /* status of the card during resume from a system sleep state */ + int resume_status; }; @@ -279,7 +281,9 @@ extern struct pccard_resource_ops pccard_nonstatic_ops; /* socket drivers are expected to use these callbacks in their .drv struct */ -extern int pcmcia_socket_dev_suspend(struct device *dev, pm_message_t state); +extern int pcmcia_socket_dev_suspend(struct device *dev); +extern void pcmcia_socket_dev_early_resume(struct device *dev); +extern void pcmcia_socket_dev_late_resume(struct device *dev); extern int pcmcia_socket_dev_resume(struct device *dev); /* socket drivers use this callback in their IRQ handler */ --- linux-fsl-imx51-2.6.31.orig/include/drm/drm_pciids.h +++ linux-fsl-imx51-2.6.31/include/drm/drm_pciids.h @@ -552,6 +552,8 @@ {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ {0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ + {0x8086, 0x2e42, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ + {0x8086, 0x2e92, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ --- linux-fsl-imx51-2.6.31.orig/include/drm/drmP.h +++ linux-fsl-imx51-2.6.31/include/drm/drmP.h @@ -989,7 +989,7 @@ struct pci_controller *hose; #endif struct drm_sg_mem *sg; /**< Scatter gather memory */ - int num_crtcs; /**< Number of CRTCs on this device */ + unsigned int num_crtcs; /**< Number of CRTCs on this device */ void *dev_private; /**< device private data */ void *mm_private; struct address_space *dev_mapping; @@ -1268,6 +1268,7 @@ extern void drm_handle_vblank(struct drm_device *dev, int crtc); extern int drm_vblank_get(struct drm_device *dev, int crtc); extern void drm_vblank_put(struct drm_device *dev, int crtc); +extern void drm_vblank_off(struct drm_device *dev, int crtc); extern void drm_vblank_cleanup(struct drm_device *dev); /* Modesetting support */ extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc); --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_sim_interface.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_sim_interface.h @@ -0,0 +1,108 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_sim_interface.h + * + * @brief Driver for Freescale IMX SIM interface + * + */ + +#ifndef MXC_SIM_INTERFACE_H +#define MXC_SIM_INTERFACE_H + +#define SIM_ATR_LENGTH_MAX 32 + +/* Raw ATR SIM_IOCTL_GET_ATR */ +typedef struct { + uint32_t size; /* length of ATR received */ + uint8_t t[SIM_ATR_LENGTH_MAX]; /* raw ATR string received */ +} sim_atr_t; + +/* Communication parameters for SIM_IOCTL_[GET|SET]_PARAM */ +typedef struct { + uint8_t convention; /* direct = 0, indirect = 1 */ + uint8_t FI, DI; /* frequency multiplier and devider indices */ + uint8_t PI1, II; /* programming voltage and current indices */ + uint8_t N; /* extra guard time */ + uint8_t T; /* protocol type: T0 = 0, T1 = 1 */ + uint8_t PI2; /* programming voltage 2 value */ + uint8_t WWT; /* working wait time */ +} sim_param_t; + +/* ISO7816-3 protocols */ +#define SIM_PROTOCOL_T0 0 +#define SIM_PROTOCOL_T1 1 + +/* Transfer data for SIM_IOCTL_XFER */ +typedef struct { + uint8_t *xmt_buffer; /* transmit buffer pointer */ + int32_t xmt_length; /* transmit buffer length */ + uint8_t *rcv_buffer; /* receive buffer pointer */ + int32_t rcv_length; /* receive buffer length */ + int type; /* transfer type: TPDU = 0, PTS = 1 */ + int timeout; /* transfer timeout in milliseconds */ + uint8_t sw1; /* status word 1 */ + uint8_t sw2; /* status word 2 */ +} sim_xfer_t; + +/* Transfer types for SIM_IOCTL_XFER */ +#define SIM_XFER_TYPE_TPDU 0 +#define SIM_XFER_TYPE_PTS 1 + +/* Interface power states */ +#define SIM_POWER_OFF 0 +#define SIM_POWER_ON 1 + +/* Return values for SIM_IOCTL_GET_PRESENSE */ +#define SIM_PRESENT_REMOVED 0 +#define SIM_PRESENT_DETECTED 1 +#define SIM_PRESENT_OPERATIONAL 2 + +/* Return values for SIM_IOCTL_GET_ERROR */ +#define SIM_OK 0 +#define SIM_E_ACCESS 1 +#define SIM_E_TPDUSHORT 2 +#define SIM_E_PTSEMPTY 3 +#define SIM_E_INVALIDXFERTYPE 4 +#define SIM_E_INVALIDXMTLENGTH 5 +#define SIM_E_INVALIDRCVLENGTH 6 +#define SIM_E_NACK 7 +#define SIM_E_TIMEOUT 8 +#define SIM_E_NOCARD 9 +#define SIM_E_PARAM_FI_INVALID 10 +#define SIM_E_PARAM_DI_INVALID 11 +#define SIM_E_PARAM_FBYD_WITHFRACTION 12 +#define SIM_E_PARAM_FBYD_NOTDIVBY8OR12 13 +#define SIM_E_PARAM_DIVISOR_RANGE 14 +#define SIM_E_MALLOC 15 +#define SIM_E_IRQ 16 +#define SIM_E_POWERED_ON 17 +#define SIM_E_POWERED_OFF 18 + +/* ioctl encodings */ +#define SIM_IOCTL_BASE 0xc0 +#define SIM_IOCTL_GET_PRESENSE _IOR(SIM_IOCTL_BASE, 1, int) +#define SIM_IOCTL_GET_ATR _IOR(SIM_IOCTL_BASE, 2, sim_atr_t) +#define SIM_IOCTL_GET_PARAM_ATR _IOR(SIM_IOCTL_BASE, 3, sim_param_t) +#define SIM_IOCTL_GET_PARAM _IOR(SIM_IOCTL_BASE, 4, sim_param_t) +#define SIM_IOCTL_SET_PARAM _IOW(SIM_IOCTL_BASE, 5, sim_param_t) +#define SIM_IOCTL_XFER _IOR(SIM_IOCTL_BASE, 6, sim_xfer_t) +#define SIM_IOCTL_POWER_ON _IO(SIM_IOCTL_BASE, 7) +#define SIM_IOCTL_POWER_OFF _IO(SIM_IOCTL_BASE, 8) +#define SIM_IOCTL_WARM_RESET _IO(SIM_IOCTL_BASE, 9) +#define SIM_IOCTL_COLD_RESET _IO(SIM_IOCTL_BASE, 10) +#define SIM_IOCTL_CARD_LOCK _IO(SIM_IOCTL_BASE, 11) +#define SIM_IOCTL_CARD_EJECT _IO(SIM_IOCTL_BASE, 12) + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/splice.h +++ linux-fsl-imx51-2.6.31/include/linux/splice.h @@ -82,4 +82,10 @@ extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, splice_direct_actor *); +extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, + loff_t *ppos, size_t len, unsigned int flags); +extern long do_splice_to(struct file *in, loff_t *ppos, + struct pipe_inode_info *pipe, size_t len, + unsigned int flags); + #endif --- linux-fsl-imx51-2.6.31.orig/include/linux/cryptodev.h +++ linux-fsl-imx51-2.6.31/include/linux/cryptodev.h @@ -0,0 +1,82 @@ +/* + * Driver for /dev/crypto device (aka CryptoDev) + * + * Copyright (c) 2004 Michal Ludvig , SuSE Labs + * + * Structures and ioctl command names were taken from + * OpenBSD to preserve compatibility with their API. + * + */ + +#ifndef _CRYPTODEV_H +#define _CRYPTODEV_H + +#ifndef __KERNEL__ +#include +#endif + +#define CRYPTODEV_MINOR MISC_DYNAMIC_MINOR + +#define CRYPTO_FLAG_ECB 0x0000 +#define CRYPTO_FLAG_CBC 0x0001 +#define CRYPTO_FLAG_CFB 0x0002 +#define CRYPTO_FLAG_OFB 0x0003 +#define CRYPTO_FLAG_CTR 0x0004 +#define CRYPTO_FLAG_HMAC 0x0010 +#define CRYPTO_FLAG_MASK 0x00FF + +#define CRYPTO_CIPHER_NAME 0x0100 +#define CRYPTO_CIPHER_NAME_CBC (CRYPTO_CIPHER_NAME | CRYPTO_FLAG_CBC) +#define CRYPTO_HASH_NAME 0x0200 +#define CRYPTO_HASH_NAME_HMAC (CRYPTO_HASH_NAME | CRYPTO_FLAG_HMAC) + +/* ioctl parameter to create a session */ +struct session_op { + unsigned int cipher; /* e.g. CRYPTO_DES_CBC */ + unsigned int mac; /* e.g. CRYPTO_MD5_HMAC */ + char *alg_name; /* set cipher=CRYPTO_CIPHER_NAME + or mac=CRYPTO_HASH_NAME */ + #define MAX_ALG_NAME_LEN 128 + size_t alg_namelen; + + size_t keylen; /* cipher key */ + char *key; + int mackeylen; /* mac key */ + char *mackey; + + /* Return values */ + unsigned int blocksize; /* selected algorithm's block size */ + uint32_t ses; /* session ID */ +}; + +/* ioctl parameter to request a crypt/decrypt operation against a session */ +struct crypt_op { + uint32_t ses; /* from session_op->ses */ + #define COP_DECRYPT 0 + #define COP_ENCRYPT 1 + uint32_t op; /* ie. COP_ENCRYPT */ + uint32_t flags; /* unused */ + + size_t len; + char *src, *dst; + char *mac; + char *iv; +}; + +/* clone original filedescriptor */ +#define CRIOGET _IOWR('c', 100, uint32_t) + +/* create crypto session */ +#define CIOCGSESSION _IOWR('c', 101, struct session_op) + +/* finish crypto session */ +#define CIOCFSESSION _IOW('c', 102, uint32_t) + +/* request encryption/decryptions of a given buffer */ +#define CIOCCRYPT _IOWR('c', 103, struct crypt_op) + +/* ioctl()s for asym-crypto. Not yet supported. */ +#define CIOCKEY _IOWR('c', 104, void *) +#define CIOCASYMFEAT _IOR('c', 105, uint32_t) + +#endif /* _CRYPTODEV_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_v4l2.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_v4l2.h @@ -0,0 +1,48 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @file arch-mxc/mxc_v4l2.h + * + * @brief mxc V4L2 private structures + * + * @ingroup MXC_V4L2_CAPTURE + */ + +#ifndef __ASM_ARCH_MXC_V4L2_H__ +#define __ASM_ARCH_MXC_V4L2_H__ + +/* + * For IPUv1 and IPUv3, V4L2_CID_MXC_ROT means encoder ioctl ID. + * And V4L2_CID_MXC_VF_ROT is viewfinder ioctl ID only for IPUv1 and IPUv3. + */ +#define V4L2_CID_MXC_ROT (V4L2_CID_PRIVATE_BASE + 0) +#define V4L2_CID_MXC_FLASH (V4L2_CID_PRIVATE_BASE + 1) +#define V4L2_CID_MXC_VF_ROT (V4L2_CID_PRIVATE_BASE + 2) +#define V4L2_CID_MXC_MOTION (V4L2_CID_PRIVATE_BASE + 3) + +#define V4L2_MXC_ROTATE_NONE 0 +#define V4L2_MXC_ROTATE_VERT_FLIP 1 +#define V4L2_MXC_ROTATE_HORIZ_FLIP 2 +#define V4L2_MXC_ROTATE_180 3 +#define V4L2_MXC_ROTATE_90_RIGHT 4 +#define V4L2_MXC_ROTATE_90_RIGHT_VFLIP 5 +#define V4L2_MXC_ROTATE_90_RIGHT_HFLIP 6 +#define V4L2_MXC_ROTATE_90_LEFT 7 + +struct v4l2_mxc_offset { + uint32_t u_offset; + uint32_t v_offset; +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/ftrace.h +++ linux-fsl-imx51-2.6.31/include/linux/ftrace.h @@ -241,7 +241,7 @@ # define ftrace_set_filter(buf, len, reset) do { } while (0) # define ftrace_disable_daemon() do { } while (0) # define ftrace_enable_daemon() do { } while (0) -static inline void ftrace_release(void *start, unsigned long size) { } +static inline void ftrace_release_mod(struct module *mod) {} static inline int register_ftrace_command(struct ftrace_func_command *cmd) { return -EINVAL; --- linux-fsl-imx51-2.6.31.orig/include/linux/module.h +++ linux-fsl-imx51-2.6.31/include/linux/module.h @@ -720,4 +720,13 @@ static inline void module_bug_cleanup(struct module *mod) {} #endif /* CONFIG_GENERIC_BUG */ +/* + * Establish a symbolic link between 2 modules so that depmod + * and modprobe do the heavy lifting of loading the modules in the + * correct dependency order. + */ +#define MODULE_EXPORT(mod_name) int sym_link_##mod_name; EXPORT_SYMBOL(sym_link_##mod_name); +#define MODULE_IMPORT(mod_name) extern int sym_link_##mod_name; int func_sym_link_##mod_name(void) {sym_link_##mod_name=1;}; EXPORT_SYMBOL(func_sym_link_##mod_name); + + #endif /* _LINUX_MODULE_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/moduleparam.h +++ linux-fsl-imx51-2.6.31/include/linux/moduleparam.h @@ -37,7 +37,6 @@ typedef int (*param_get_fn)(char *buffer, struct kernel_param *kp); /* Flag bits for kernel_param.flags */ -#define KPARAM_KMALLOCED 1 #define KPARAM_ISBOOL 2 struct kernel_param { --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_mlb.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_mlb.h @@ -0,0 +1,51 @@ +/* + * mxc_mlb.h + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef _MXC_MLB_H +#define _MXC_MLB_H + +/* define IOCTL command */ +#define MLB_SET_FPS _IOW('S', 0x10, unsigned int) +#define MLB_GET_VER _IOR('S', 0x11, unsigned long) +#define MLB_SET_DEVADDR _IOR('S', 0x12, unsigned char) +/*! + * set channel address for each logical channel + * the MSB 16bits is for tx channel, the left LSB is for rx channel + */ +#define MLB_CHAN_SETADDR _IOW('S', 0x13, unsigned int) +#define MLB_CHAN_STARTUP _IO('S', 0x14) +#define MLB_CHAN_SHUTDOWN _IO('S', 0x15) +#define MLB_CHAN_GETEVENT _IOR('S', 0x16, unsigned long) + +/*! + * MLB event define + */ +enum { + MLB_EVT_TX_PROTO_ERR_CUR = 1 << 0, + MLB_EVT_TX_BRK_DETECT_CUR = 1 << 1, + MLB_EVT_TX_PROTO_ERR_PREV = 1 << 8, + MLB_EVT_TX_BRK_DETECT_PREV = 1 << 9, + MLB_EVT_RX_PROTO_ERR_CUR = 1 << 16, + MLB_EVT_RX_BRK_DETECT_CUR = 1 << 17, + MLB_EVT_RX_PROTO_ERR_PREV = 1 << 24, + MLB_EVT_RX_BRK_DETECT_PREV = 1 << 25, +}; + +#ifdef __KERNEL__ +extern void gpio_mlb_active(void); +extern void gpio_mlb_inactive(void); +#endif + +#endif /* _MXC_MLB_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/namei.h +++ linux-fsl-imx51-2.6.31/include/linux/namei.h @@ -75,6 +75,9 @@ extern struct file *nameidata_to_filp(struct nameidata *nd, int flags); extern void release_open_intent(struct nameidata *); +extern struct dentry *lookup_hash(struct nameidata *nd); +extern int __lookup_one_len(const char *name, struct qstr *this, + struct dentry *base, int len); extern struct dentry *lookup_one_len(const char *, struct dentry *, int); extern struct dentry *lookup_one_noperm(const char *, struct dentry *); --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_external.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_external.h @@ -0,0 +1,1108 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_EXTERNAL_H__ +#define __ASM_ARCH_MXC_PMIC_EXTERNAL_H__ + +#ifdef __KERNEL__ +#include +#endif + +/*! + * @defgroup PMIC_DRVRS PMIC Drivers + */ + +/*! + * @defgroup PMIC_CORE PMIC Protocol Drivers + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_external.h + * @brief This file contains interface of PMIC protocol driver. + * + * @ingroup PMIC_CORE + */ + +#include +#include + +/*! + * This is the enumeration of versions of PMIC + */ +typedef enum { + PMIC_MC13783 = 1, /*!< MC13783 */ + PMIC_SC55112 = 2, /*!< SC55112 */ + PMIC_MC13892 = 3, + PMIC_MC34704 = 4 +} pmic_id_t; + +/*! + * @struct pmic_version_t + * @brief PMIC version and revision + */ +typedef struct { + /*! + * PMIC version identifier. + */ + pmic_id_t id; + /*! + * Revision of the PMIC. + */ + int revision; +} pmic_version_t; + +/*! + * struct pmic_event_callback_t + * @brief This structure contains callback function pointer and its + * parameter to be used when un/registering and launching a callback + * for an event. + */ +typedef struct { + /*! + * call back function + */ + void (*func) (void *); + + /*! + * call back function parameter + */ + void *param; +} pmic_event_callback_t; + +/*! + * This structure is used with IOCTL. + * It defines register, register value, register mask and event number + */ +typedef struct { + /*! + * register number + */ + int reg; + /*! + * value of register + */ + unsigned int reg_value; + /*! + * mask of bits, only used with PMIC_WRITE_REG + */ + unsigned int reg_mask; +} register_info; + +/*! + * @name IOCTL definitions for sc55112 core driver + */ +/*! @{ */ +/*! Read a PMIC register */ +#define PMIC_READ_REG _IOWR('P', 0xa0, register_info*) +/*! Write a PMIC register */ +#define PMIC_WRITE_REG _IOWR('P', 0xa1, register_info*) +/*! Subscribe a PMIC interrupt event */ +#define PMIC_SUBSCRIBE _IOR('P', 0xa2, int) +/*! Unsubscribe a PMIC interrupt event */ +#define PMIC_UNSUBSCRIBE _IOR('P', 0xa3, int) +/*! Subscribe a PMIC event for user notification*/ +#define PMIC_NOTIFY_USER _IOR('P', 0xa4, int) +/*! Get the PMIC event occured for which user recieved notification */ +#define PMIC_GET_NOTIFY _IOW('P', 0xa5, int) +/*! @} */ + +/*! + * This is PMIC registers valid bits + */ +#define PMIC_ALL_BITS 0xFFFFFF +#define PMIC_MAX_EVENTS 48 + +#define PMIC_ARBITRATION "NULL" + +#ifdef CONFIG_MXC_PMIC_MC13783 +/*! + * This is the enumeration of register names of MC13783 + */ +typedef enum { + /*! + * REG_INTERRUPT_STATUS_0 + */ + REG_INTERRUPT_STATUS_0 = 0, + /*! + * REG_INTERRUPT_MASK_0 + */ + REG_INTERRUPT_MASK_0, + /*! + * REG_INTERRUPT_SENSE_0 + */ + REG_INTERRUPT_SENSE_0, + /*! + * REG_INTERRUPT_STATUS_1 + */ + REG_INTERRUPT_STATUS_1, + /*! + * REG_INTERRUPT_MASK_1 + */ + REG_INTERRUPT_MASK_1, + /*! + * REG_INTERRUPT_SENSE_1 + */ + REG_INTERRUPT_SENSE_1, + /*! + * REG_POWER_UP_MODE_SENSE + */ + REG_POWER_UP_MODE_SENSE, + /*! + * REG_REVISION + */ + REG_REVISION, + /*! + * REG_SEMAPHORE + */ + REG_SEMAPHORE, + /*! + * REG_ARBITRATION_PERIPHERAL_AUDIO + */ + REG_ARBITRATION_PERIPHERAL_AUDIO, + /*! + * REG_ARBITRATION_SWITCHERS + */ + REG_ARBITRATION_SWITCHERS, + /*! + * REG_ARBITRATION_REGULATORS_0 + */ + REG_ARBITRATION_REGULATORS_0, + /*! + * REG_ARBITRATION_REGULATORS_1 + */ + REG_ARBITRATION_REGULATORS_1, + /*! + * REG_POWER_CONTROL_0 + */ + REG_POWER_CONTROL_0, + /*! + * REG_POWER_CONTROL_1 + */ + REG_POWER_CONTROL_1, + /*! + * REG_POWER_CONTROL_2 + */ + REG_POWER_CONTROL_2, + /*! + * REG_REGEN_ASSIGNMENT + */ + REG_REGEN_ASSIGNMENT, + /*! + * REG_CONTROL_SPARE + */ + REG_CONTROL_SPARE, + /*! + * REG_MEMORY_A + */ + REG_MEMORY_A, + /*! + * REG_MEMORY_B + */ + REG_MEMORY_B, + /*! + * REG_RTC_TIME + */ + REG_RTC_TIME, + /*! + * REG_RTC_ALARM + */ + REG_RTC_ALARM, + /*! + * REG_RTC_DAY + */ + REG_RTC_DAY, + /*! + * REG_RTC_DAY_ALARM + */ + REG_RTC_DAY_ALARM, + /*! + * REG_SWITCHERS_0 + */ + REG_SWITCHERS_0, + /*! + * REG_SWITCHERS_1 + */ + REG_SWITCHERS_1, + /*! + * REG_SWITCHERS_2 + */ + REG_SWITCHERS_2, + /*! + * REG_SWITCHERS_3 + */ + REG_SWITCHERS_3, + /*! + * REG_SWITCHERS_4 + */ + REG_SWITCHERS_4, + /*! + * REG_SWITCHERS_5 + */ + REG_SWITCHERS_5, + /*! + * REG_REGULATOR_SETTING_0 + */ + REG_REGULATOR_SETTING_0, + /*! + * REG_REGULATOR_SETTING_1 + */ + REG_REGULATOR_SETTING_1, + /*! + * REG_REGULATOR_MODE_0 + */ + REG_REGULATOR_MODE_0, + /*! + * REG_REGULATOR_MODE_1 + */ + REG_REGULATOR_MODE_1, + /*! + * REG_POWER_MISCELLANEOUS + */ + REG_POWER_MISCELLANEOUS, + /*! + * REG_POWER_SPARE + */ + REG_POWER_SPARE, + /*! + * REG_AUDIO_RX_0 + */ + REG_AUDIO_RX_0, + /*! + * REG_AUDIO_RX_1 + */ + REG_AUDIO_RX_1, + /*! + * REG_AUDIO_TX + */ + REG_AUDIO_TX, + /*! + * REG_AUDIO_SSI_NETWORK + */ + REG_AUDIO_SSI_NETWORK, + /*! + * REG_AUDIO_CODEC + */ + REG_AUDIO_CODEC, + /*! + * REG_AUDIO_STEREO_DAC + */ + REG_AUDIO_STEREO_DAC, + /*! + * REG_AUDIO_SPARE + */ + REG_AUDIO_SPARE, + /*! + * REG_ADC_0 + */ + REG_ADC_0, + /*! + * REG_ADC_1 + */ + REG_ADC_1, + /*! + * REG_ADC_2 + */ + REG_ADC_2, + /*! + * REG_ADC_3 + */ + REG_ADC_3, + /*! + * REG_ADC_4 + */ + REG_ADC_4, + /*! + * REG_CHARGER + */ + REG_CHARGER, + /*! + * REG_USB + */ + REG_USB, + /*! + * REG_CHARGE_USB_SPARE + */ + REG_CHARGE_USB_SPARE, + /*! + * REG_LED_CONTROL_0 + */ + REG_LED_CONTROL_0, + /*! + * REG_LED_CONTROL_1 + */ + REG_LED_CONTROL_1, + /*! + * REG_LED_CONTROL_2 + */ + REG_LED_CONTROL_2, + /*! + * REG_LED_CONTROL_3 + */ + REG_LED_CONTROL_3, + /*! + * REG_LED_CONTROL_4 + */ + REG_LED_CONTROL_4, + /*! + * REG_LED_CONTROL_5 + */ + REG_LED_CONTROL_5, + /*! + * REG_SPARE + */ + REG_SPARE, + /*! + * REG_TRIM_0 + */ + REG_TRIM_0, + /*! + * REG_TRIM_1 + */ + REG_TRIM_1, + /*! + * REG_TEST_0 + */ + REG_TEST_0, + /*! + * REG_TEST_1 + */ + REG_TEST_1, + /*! + * REG_TEST_2 + */ + REG_TEST_2, + /*! + * REG_TEST_3 + */ + REG_TEST_3, + /*! + * REG_NB + */ + REG_NB, +} pmic_reg; + +/*! + * This is event list of mc13783 interrupt + */ + +typedef enum { + /*! + * ADC has finished requested conversions + */ + EVENT_ADCDONEI = 0, + /*! + * ADCBIS has finished requested conversions + */ + EVENT_ADCBISDONEI = 1, + /*! + * Touchscreen wakeup + */ + EVENT_TSI = 2, + /*! + * ADC reading above high limit + */ + EVENT_WHIGHI = 3, + /*! + * ADC reading below low limit + */ + EVENT_WLOWI = 4, + /*! + * Charger attach and removal + */ + EVENT_CHGDETI = 6, + /*! + * Charger over-voltage detection + */ + EVENT_CHGOVI = 7, + /*! + * Charger path reverse current + */ + EVENT_CHGREVI = 8, + /*! + * Charger path short circuit + */ + EVENT_CHGSHORTI = 9, + /*! + * BP regulator current or voltage regulation + */ + EVENT_CCCVI = 10, + /*! + * Charge current below threshold + */ + EVENT_CHRGCURRI = 11, + /*! + * BP turn on threshold detection + */ + EVENT_BPONI = 12, + /*! + * End of life / low battery detect + */ + EVENT_LOBATLI = 13, + /*! + * Low battery warning + */ + EVENT_LOBATHI = 14, + /*! + * USB detect + */ + EVENT_USBI = 16, + /*! + * USB ID Line detect + */ + EVENT_IDI = 19, + /*! + * Single ended 1 detect + */ + EVENT_SE1I = 21, + /*! + * Car-kit detect + */ + EVENT_CKDETI = 22, + /*! + * 1 Hz time-tick + */ + EVENT_E1HZI = 24, + /*! + * Time of day alarm + */ + EVENT_TODAI = 25, + /*! + * ON1B event + */ + EVENT_ONOFD1I = 27, + /*! + * ON2B event + */ + EVENT_ONOFD2I = 28, + /*! + * ON3B event + */ + EVENT_ONOFD3I = 29, + /*! + * System reset + */ + EVENT_SYSRSTI = 30, + /*! + * RTC reset occurred + */ + EVENT_RTCRSTI = 31, + /*! + * Power cut event + */ + EVENT_PCI = 32, + /*! + * Warm start event + */ + EVENT_WARMI = 33, + /*! + * Memory hold event + */ + EVENT_MEMHLDI = 34, + /*! + * Power ready + */ + EVENT_PWRRDYI = 35, + /*! + * Thermal warning lower threshold + */ + EVENT_THWARNLI = 36, + /*! + * Thermal warning higher threshold + */ + EVENT_THWARNHI = 37, + /*! + * Clock source change + */ + EVENT_CLKI = 38, + /*! + * Semaphore + */ + EVENT_SEMAFI = 39, + /*! + * Microphone bias 2 detect + */ + EVENT_MC2BI = 41, + /*! + * Headset attach + */ + EVENT_HSDETI = 42, + /*! + * Stereo headset detect + */ + EVENT_HSLI = 43, + /*! + * Thermal shutdown ALSP + */ + EVENT_ALSPTHI = 44, + /*! + * Short circuit on AHS outputs + */ + EVENT_AHSSHORTI = 45, + /*! + * number of event + */ + EVENT_NB, +} type_event; + +/*! + * This enumeration all senses of MC13783. + */ +typedef enum { + /*! + * Charger attach sense + */ + SENSE_CHGDETS = 6, + /*! + * Charger over-voltage sense + */ + SENSE_CHGOVS, + /*! + * Charger reverse current + * If 1 current flows into phone + */ + SENSE_CHGREVS, + /*! + * Charger short circuit + */ + SENSE_CHGSHORTS, + /*! + * Charger regulator operating mode + */ + SENSE_CCCVS, + /*! + * Charger current below threshold + */ + SENSE_CHGCURRS, + /*! + * BP turn on + */ + SENSE_BPONS, + /*! + * Low bat detect + */ + SENSE_LOBATLS, + /*! + * Low bat warning + */ + SENSE_LOBATHS, + /*! + * UDPS + */ + SENSE_UDPS, + /*! + * USB 4V4 + */ + SENSE_USB4V4S, + /*! + * USB 2V0 + */ + SENSE_USB2V0S, + /*! + * USB 0V8 + */ + SENSE_USB0V8S, + /*! + * ID Floats + */ + SENSE_ID_FLOATS, + /*! + * ID Gnds + */ + SENSE_ID_GNDS, + /*! + * Single ended + */ + SENSE_SE1S, + /*! + * Car-kit detect + */ + SENSE_CKDETS, + /*! + * UDMS + */ + SENSE_UDMS, + /*! + * mic bias detect + */ + SENSE_MC2BS, + /*! + * headset attached + */ + SENSE_HSDETS, + /*! + * ST headset attached + */ + SENSE_HSLS, + /*! + * Thermal shutdown ALSP + */ + SENSE_ALSPTHS, + /*! + * short circuit on AHS + */ + SENSE_AHSSHORTS, + /*! + * ON1B pin is hight + */ + SENSE_ONOFD1S, + /*! + * ON2B pin is hight + */ + SENSE_ONOFD2S, + /*! + * ON3B pin is hight + */ + SENSE_ONOFD3S, + /*! + * System reset power ready + */ + SENSE_PWRRDYS, + /*! + * Thermal warning higher threshold + */ + SENSE_THWARNHS, + /*! + * Thermal warning lower threshold + */ + SENSE_THWARNLS, + /*! + * Clock source is XTAL + */ + SENSE_CLKS, +} t_sensor; + +/*! + * This structure is used to read all sense bits of MC13783. + */ +typedef struct { + /*! + * Charger attach sense + */ + bool sense_chgdets; + /*! + * Charger over-voltage sense + */ + bool sense_chgovs; + /*! + * Charger reverse current + * If 1 current flows into phone + */ + bool sense_chgrevs; + /*! + * Charger short circuit + */ + bool sense_chgshorts; + /*! + * Charger regulator operating mode + */ + bool sense_cccvs; + /*! + * Charger current below threshold + */ + bool sense_chgcurrs; + /*! + * BP turn on + */ + bool sense_bpons; + /*! + * Low bat detect + */ + bool sense_lobatls; + /*! + * Low bat warning + */ + bool sense_lobaths; + /*! + * USB 4V4 + */ + bool sense_usb4v4s; + /*! + * USB 2V0 + */ + bool sense_usb2v0s; + /*! + * USB 0V8 + */ + bool sense_usb0v8s; + /*! + * ID Floats + */ + bool sense_id_floats; + /*! + * ID Gnds + */ + bool sense_id_gnds; + /*! + * Single ended + */ + bool sense_se1s; + /*! + * Car-kit detect + */ + bool sense_ckdets; + /*! + * mic bias detect + */ + bool sense_mc2bs; + /*! + * headset attached + */ + bool sense_hsdets; + /*! + * ST headset attached + */ + bool sense_hsls; + /*! + * Thermal shutdown ALSP + */ + bool sense_alspths; + /*! + * short circuit on AHS + */ + bool sense_ahsshorts; + /*! + * ON1B pin is hight + */ + bool sense_onofd1s; + /*! + * ON2B pin is hight + */ + bool sense_onofd2s; + /*! + * ON3B pin is hight + */ + bool sense_onofd3s; + /*! + * System reset power ready + */ + bool sense_pwrrdys; + /*! + * Thermal warning higher threshold + */ + bool sense_thwarnhs; + /*! + * Thermal warning lower threshold + */ + bool sense_thwarnls; + /*! + * Clock source is XTAL + */ + bool sense_clks; +} t_sensor_bits; + +#endif /*CONFIG_MXC_PMIC_MC13783 */ + +#if defined(CONFIG_MXC_PMIC_MC13892_MODULE) || defined(CONFIG_MXC_PMIC_MC13892) +enum { + REG_INT_STATUS0 = 0, + REG_INT_MASK0, + REG_INT_SENSE0, + REG_INT_STATUS1, + REG_INT_MASK1, + REG_INT_SENSE1, + REG_PU_MODE_S, + REG_IDENTIFICATION, + REG_UNUSED0, + REG_ACC0, + REG_ACC1, /*10 */ + REG_UNUSED1, + REG_UNUSED2, + REG_POWER_CTL0, + REG_POWER_CTL1, + REG_POWER_CTL2, + REG_REGEN_ASSIGN, + REG_UNUSED3, + REG_MEM_A, + REG_MEM_B, + REG_RTC_TIME, /*20 */ + REG_RTC_ALARM, + REG_RTC_DAY, + REG_RTC_DAY_ALARM, + REG_SW_0, + REG_SW_1, + REG_SW_2, + REG_SW_3, + REG_SW_4, + REG_SW_5, + REG_SETTING_0, /*30 */ + REG_SETTING_1, + REG_MODE_0, + REG_MODE_1, + REG_POWER_MISC, + REG_UNUSED4, + REG_UNUSED5, + REG_UNUSED6, + REG_UNUSED7, + REG_UNUSED8, + REG_UNUSED9, /*40 */ + REG_UNUSED10, + REG_UNUSED11, + REG_ADC0, + REG_ADC1, + REG_ADC2, + REG_ADC3, + REG_ADC4, + REG_CHARGE, + REG_USB0, + REG_USB1, /*50 */ + REG_LED_CTL0, + REG_LED_CTL1, + REG_LED_CTL2, + REG_LED_CTL3, + REG_UNUSED12, + REG_UNUSED13, + REG_TRIM0, + REG_TRIM1, + REG_TEST0, + REG_TEST1, /*60 */ + REG_TEST2, + REG_TEST3, + REG_TEST4, +}; + +typedef enum { + EVENT_ADCDONEI = 0, + EVENT_ADCBISDONEI = 1, + EVENT_TSI = 2, + EVENT_VBUSVI = 3, + EVENT_IDFACI = 4, + EVENT_USBOVI = 5, + EVENT_CHGDETI = 6, + EVENT_CHGFAULTI = 7, + EVENT_CHGREVI = 8, + EVENT_CHGRSHORTI = 9, + EVENT_CCCVI = 10, + EVENT_CHGCURRI = 11, + EVENT_BPONI = 12, + EVENT_LOBATLI = 13, + EVENT_LOBATHI = 14, + EVENT_IDFLOATI = 19, + EVENT_IDGNDI = 20, + EVENT_SE1I = 21, + EVENT_CKDETI = 22, + EVENT_1HZI = 24, + EVENT_TODAI = 25, + EVENT_PWRONI = 27, + EVENT_WDIRESETI = 29, + EVENT_SYSRSTI = 30, + EVENT_RTCRSTI = 31, + EVENT_PCI = 32, + EVENT_WARMI = 33, + EVENT_MEMHLDI = 34, + EVENT_THWARNLI = 36, + EVENT_THWARNHI = 37, + EVENT_CLKI = 38, + EVENT_SCPI = 40, + EVENT_LBPI = 44, + EVENT_NB, +} type_event; + +typedef enum { + SENSE_VBUSVS = 3, + SENSE_IDFACS = 4, + SENSE_USBOVS = 5, + SENSE_CHGDETS = 6, + SENSE_CHGREVS = 8, + SENSE_CHGRSHORTS = 9, + SENSE_CCCVS = 10, + SENSE_CHGCURRS = 11, + SENSE_BPONS = 12, + SENSE_LOBATLS = 13, + SENSE_LOBATHS = 14, + SENSE_IDFLOATS = 19, + SENSE_IDGNDS = 20, + SENSE_SE1S = 21, + SENSE_PWRONS = 27, + SENSE_THWARNLS = 36, + SENSE_THWARNHS = 37, + SENSE_CLKS = 38, + SENSE_LBPS = 44, + SENSE_NB, +} t_sensor; + +typedef struct { + bool sense_vbusvs; + bool sense_idfacs; + bool sense_usbovs; + bool sense_chgdets; + bool sense_chgrevs; + bool sense_chgrshorts; + bool sense_cccvs; + bool sense_chgcurrs; + bool sense_bpons; + bool sense_lobatls; + bool sense_lobaths; + bool sense_idfloats; + bool sense_idgnds; + bool sense_se1s; + bool sense_pwrons; + bool sense_thwarnls; + bool sense_thwarnhs; + bool sense_clks; + bool sense_lbps; +} t_sensor_bits; + +extern struct i2c_client *mc13892_client; +int pmic_i2c_24bit_read(struct i2c_client *client, unsigned int reg_num, + unsigned int *value); +int pmic_read(int reg_num, unsigned int *reg_val); +int pmic_write(int reg_num, const unsigned int reg_val); +void gpio_pmic_active(void); +void pmic_event_list_init(void); +void mc13892_power_off(void); + +#endif + +#if defined(CONFIG_MXC_PMIC_MC34704_MODULE) || defined(CONFIG_MXC_PMIC_MC34704) + +typedef enum { + /* register names for mc34704 */ + REG_MC34704_GENERAL1 = 0x01, + REG_MC34704_GENERAL2 = 0x02, + REG_MC34704_GENERAL3 = 0x03, + REG_MC34704_VGSET1 = 0x04, + REG_MC34704_VGSET2 = 0x05, + REG_MC34704_REG2SET1 = 0x06, + REG_MC34704_REG2SET2 = 0x07, + REG_MC34704_REG3SET1 = 0x08, + REG_MC34704_REG3SET2 = 0x09, + REG_MC34704_REG4SET1 = 0x0A, + REG_MC34704_REG4SET2 = 0x0B, + REG_MC34704_REG5SET1 = 0x0C, + REG_MC34704_REG5SET2 = 0x0D, + REG_MC34704_REG5SET3 = 0x0E, + REG_MC34704_REG6SET1 = 0x0F, + REG_MC34704_REG6SET2 = 0x10, + REG_MC34704_REG6SET3 = 0x11, + REG_MC34704_REG7SET1 = 0x12, + REG_MC34704_REG7SET2 = 0x13, + REG_MC34704_REG7SET3 = 0x14, + REG_MC34704_REG8SET1 = 0x15, + REG_MC34704_REG8SET2 = 0x16, + REG_MC34704_REG8SET3 = 0x17, + REG_MC34704_FAULTS = 0x18, + REG_MC34704_I2CSET1 = 0x19, + REG_MC34704_REG3DAC = 0x49, + REG_MC34704_REG7CR0 = 0x58, + REG_MC34704_REG7DAC = 0x59, + REG_NB = 0x60, +} pmic_reg; + +typedef enum { + /* events for mc34704 */ + EVENT_FLT1 = 0, + EVENT_FLT2, + EVENT_FLT3, + EVENT_FLT4, + EVENT_FLT5, + EVENT_FLT6, + EVENT_FLT7, + EVENT_FLT8, + EVENT_NB, +} type_event; + +typedef enum { + MCU_SENSOR_NOT_SUPPORT +} t_sensor; + +typedef enum { + MCU_SENSOR_BIT_NOT_SUPPORT +} t_sensor_bits; + +#endif /* MXC_PMIC_MC34704 */ + +/* EXPORTED FUNCTIONS */ +#ifdef __KERNEL__ + +#if defined(CONFIG_MXC_PMIC) +/*! + * This function is used to determine the PMIC type and its revision. + * + * @return Returns the PMIC type and its revision. + */ +pmic_version_t pmic_get_version(void); + +/*! + * This function is called by PMIC clients to read a register on PMIC. + * + * @param priority priority of access + * @param reg number of register + * @param reg_value return value of register + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_read_reg(int reg, unsigned int *reg_value, + unsigned int reg_mask); +/*! + * This function is called by PMIC clients to write a register on MC13783. + * + * @param priority priority of access + * @param reg number of register + * @param reg_value New value of register + * @param reg_mask Bitmap mask indicating which bits to modify + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_write_reg(int reg, unsigned int reg_value, + unsigned int reg_mask); + +/*! + * This function is called by PMIC clients to subscribe on an event. + * + * @param event_sub structure of event, it contains type of event and callback + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_event_subscribe(type_event event, + pmic_event_callback_t callback); +/*! +* This function is called by PMIC clients to un-subscribe on an event. +* +* @param event_unsub structure of event, it contains type of event and callback +* +* @return This function returns PMIC_SUCCESS if successful. +*/ +PMIC_STATUS pmic_event_unsubscribe(type_event event, + pmic_event_callback_t callback); +/*! +* This function is called to read all sensor bits of PMIC. +* +* @param sensor Sensor to be checked. +* +* @return This function returns true if the sensor bit is high; +* or returns false if the sensor bit is low. +*/ +bool pmic_check_sensor(t_sensor sensor); + +/*! +* This function checks one sensor of PMIC. +* +* @param sensor_bits structure of all sensor bits. +* +* @return This function returns PMIC_SUCCESS if successful. +*/ +PMIC_STATUS pmic_get_sensors(t_sensor_bits * sensor_bits); + +void pmic_event_callback(type_event event); +void pmic_event_list_init(void); + +#endif /*CONFIG_MXC_PMIC*/ +#endif /* __KERNEL__ */ +/* CONFIG_MXC_PMIC_MC13783 || CONFIG_MXC_PMIC_MC9SDZ60 */ + +struct pmic_platform_data { + int (*init)(void *); + int power_key_irq; +}; + +#endif /* __ASM_ARCH_MXC_PMIC_EXTERNAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/init.h +++ linux-fsl-imx51-2.6.31/include/linux/init.h @@ -186,6 +186,7 @@ #define core_initcall(fn) __define_initcall("1",fn,1) #define core_initcall_sync(fn) __define_initcall("1s",fn,1s) +#define earlyrootfs_initcall(fn) __define_initcall("earlyrootfs",fn,rootfs) #define postcore_initcall(fn) __define_initcall("2",fn,2) #define postcore_initcall_sync(fn) __define_initcall("2s",fn,2s) #define arch_initcall(fn) __define_initcall("3",fn,3) @@ -213,6 +214,8 @@ static initcall_t __initcall_##fn \ __used __section(.security_initcall.init) = fn +extern struct list_head populate_rootfs_domain; + struct obs_kernel_param { const char *str; int (*setup_func)(char *); --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_asrc.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_asrc.h @@ -0,0 +1,210 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx35_asrc.h + * + * @brief MX35 Asynchronous Sample Rate Converter + * + * @ingroup ?? + */ + +#ifndef __MXC_ASRC_H__ +#define __MXC_ASRC_H__ + +#define ASRC_IOC_MAGIC 'C' + +#define ASRC_REQ_PAIR _IOWR(ASRC_IOC_MAGIC, 0, struct asrc_req) +#define ASRC_CONFIG_PAIR _IOWR(ASRC_IOC_MAGIC, 1, struct asrc_config) +#define ASRC_RELEASE_PAIR _IOW(ASRC_IOC_MAGIC, 2, enum asrc_pair_index) +#define ASRC_QUERYBUF _IOWR(ASRC_IOC_MAGIC, 3, struct asrc_buffer) +#define ASRC_Q_INBUF _IOW(ASRC_IOC_MAGIC, 4, struct asrc_buffer) +#define ASRC_DQ_INBUF _IOW(ASRC_IOC_MAGIC, 5, struct asrc_buffer) +#define ASRC_Q_OUTBUF _IOW(ASRC_IOC_MAGIC, 6, struct asrc_buffer) +#define ASRC_DQ_OUTBUF _IOW(ASRC_IOC_MAGIC, 7, struct asrc_buffer) +#define ASRC_START_CONV _IOW(ASRC_IOC_MAGIC, 8, enum asrc_pair_index) +#define ASRC_STOP_CONV _IOW(ASRC_IOC_MAGIC, 9, enum asrc_pair_index) +#define ASRC_STATUS _IOW(ASRC_IOC_MAGIC, 10, struct asrc_status_flags) +#define ASRC_FLUSH _IOW(ASRC_IOC_MAGIC, 11, enum asrc_pair_index) + +enum asrc_pair_index { + ASRC_PAIR_A, + ASRC_PAIR_B, + ASRC_PAIR_C +}; + +enum asrc_inclk { + INCLK_NONE = 0x03, + INCLK_ESAI_RX = 0x00, + INCLK_SSI1_RX = 0x01, + INCLK_SSI2_RX = 0x02, + INCLK_SPDIF_RX = 0x04, + INCLK_MLB_CLK = 0x05, + INCLK_ESAI_TX = 0x08, + INCLK_SSI1_TX = 0x09, + INCLK_SSI2_TX = 0x0a, + INCLK_SPDIF_TX = 0x0c, + INCLK_ASRCK1_CLK = 0x0f, +}; + +enum asrc_outclk { + OUTCLK_NONE = 0x03, + OUTCLK_ESAI_TX = 0x00, + OUTCLK_SSI1_TX = 0x01, + OUTCLK_SSI2_TX = 0x02, + OUTCLK_SPDIF_TX = 0x04, + OUTCLK_MLB_CLK = 0x05, + OUTCLK_ESAI_RX = 0x08, + OUTCLK_SSI1_RX = 0x09, + OUTCLK_SSI2_RX = 0x0a, + OUTCLK_SPDIF_RX = 0x0c, + OUTCLK_ASRCK1_CLK = 0x0f, +}; + +struct asrc_config { + enum asrc_pair_index pair; + unsigned int channel_num; + unsigned int buffer_num; + unsigned int dma_buffer_size; + unsigned int input_sample_rate; + unsigned int output_sample_rate; + unsigned int word_width; + enum asrc_inclk inclk; + enum asrc_outclk outclk; +}; + +struct asrc_pair { + unsigned int start_channel; + unsigned int chn_num; + unsigned int chn_max; + unsigned int active; + unsigned int overload_error; +}; + +struct asrc_req { + unsigned int chn_num; + enum asrc_pair_index index; +}; + +struct asrc_querybuf { + unsigned int buffer_index; + unsigned int input_length; + unsigned int output_length; + unsigned long input_offset; + unsigned long output_offset; +}; + +struct asrc_buffer { + unsigned int index; + unsigned int length; + int buf_valid; +}; + +struct asrc_status_flags { + enum asrc_pair_index index; + unsigned int overload_error; +}; + +#define ASRC_BUF_NA -35 /* ASRC DQ's buffer is NOT available */ +#define ASRC_BUF_AV 35 /* ASRC DQ's buffer is available */ +enum asrc_error_status { + ASRC_TASK_Q_OVERLOAD = 0x01, + ASRC_OUTPUT_TASK_OVERLOAD = 0x02, + ASRC_INPUT_TASK_OVERLOAD = 0x04, + ASRC_OUTPUT_BUFFER_OVERFLOW = 0x08, + ASRC_INPUT_BUFFER_UNDERRUN = 0x10, +}; + +#ifdef __KERNEL__ + +#define ASRC_DMA_BUFFER_NUM 8 + +#define ASRC_ASRCTR_REG 0x00 +#define ASRC_ASRIER_REG 0x04 +#define ASRC_ASRCNCR_REG 0x0C +#define ASRC_ASRCFG_REG 0x10 +#define ASRC_ASRCSR_REG 0x14 +#define ASRC_ASRCDR1_REG 0x18 +#define ASRC_ASRCDR2_REG 0x1C +#define ASRC_ASRSTR_REG 0x20 +#define ASRC_ASRRA_REG 0x24 +#define ASRC_ASRRB_REG 0x28 +#define ASRC_ASRRC_REG 0x2C +#define ASRC_ASRPM1_REG 0x40 +#define ASRC_ASRPM2_REG 0x44 +#define ASRC_ASRPM3_REG 0x48 +#define ASRC_ASRPM4_REG 0x4C +#define ASRC_ASRPM5_REG 0x50 +#define ASRC_ASRTFR1 0x54 +#define ASRC_ASRCCR_REG 0x5C +#define ASRC_ASRDIA_REG 0x60 +#define ASRC_ASRDOA_REG 0x64 +#define ASRC_ASRDIB_REG 0x68 +#define ASRC_ASRDOB_REG 0x6C +#define ASRC_ASRDIC_REG 0x70 +#define ASRC_ASRDOC_REG 0x74 +#define ASRC_ASRIDRHA_REG 0x80 +#define ASRC_ASRIDRLA_REG 0x84 +#define ASRC_ASRIDRHB_REG 0x88 +#define ASRC_ASRIDRLB_REG 0x8C +#define ASRC_ASRIDRHC_REG 0x90 +#define ASRC_ASRIDRLC_REG 0x94 +#define ASRC_ASR76K_REG 0x98 +#define ASRC_ASR56K_REG 0x9C + +struct dma_block { + unsigned int index; + unsigned int length; + unsigned char *dma_vaddr; + dma_addr_t dma_paddr; + struct list_head queue; +}; + +struct asrc_pair_params { + enum asrc_pair_index index; + struct list_head input_queue; + struct list_head input_done_queue; + struct list_head output_queue; + struct list_head output_done_queue; + wait_queue_head_t input_wait_queue; + wait_queue_head_t output_wait_queue; + unsigned int input_counter; + unsigned int output_counter; + unsigned int input_queue_empty; + unsigned int output_queue_empty; + unsigned int input_dma_channel; + unsigned int output_dma_channel; + unsigned int input_buffer_size; + unsigned int output_buffer_size; + unsigned int buffer_num; + unsigned int pair_hold; + unsigned int asrc_active; + struct dma_block input_dma[ASRC_DMA_BUFFER_NUM]; + struct dma_block output_dma[ASRC_DMA_BUFFER_NUM]; + struct semaphore busy_lock; +}; + +struct asrc_data { + struct asrc_pair asrc_pair[3]; +}; + +extern int asrc_req_pair(int chn_num, enum asrc_pair_index *index); +extern void asrc_release_pair(enum asrc_pair_index index); +extern int asrc_config_pair(struct asrc_config *config); +extern void asrc_get_status(struct asrc_status_flags *flags); +extern void asrc_start_conv(enum asrc_pair_index index); +extern void asrc_stop_conv(enum asrc_pair_index index); + +#endif /* __kERNEL__ */ + +#endif /* __MXC_ASRC_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/kvm_para.h +++ linux-fsl-imx51-2.6.31/include/linux/kvm_para.h @@ -13,6 +13,7 @@ #define KVM_ENOSYS 1000 #define KVM_EFAULT EFAULT #define KVM_E2BIG E2BIG +#define KVM_EPERM EPERM #define KVM_HC_VAPIC_POLL_IRQ 1 #define KVM_HC_MMU_OP 2 --- linux-fsl-imx51-2.6.31.orig/include/linux/hrtimer.h +++ linux-fsl-imx51-2.6.31/include/linux/hrtimer.h @@ -448,7 +448,7 @@ static inline void timer_stats_account_hrtimer(struct hrtimer *timer) { - if (likely(!timer->start_site)) + if (likely(!timer_stats_active)) return; timer_stats_update_stats(timer, timer->start_pid, timer->start_site, timer->function, timer->start_comm, 0); @@ -459,8 +459,6 @@ static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer) { - if (likely(!timer_stats_active)) - return; __timer_stats_hrtimer_set_start_info(timer, __builtin_return_address(0)); } --- linux-fsl-imx51-2.6.31.orig/include/linux/usb_usual.h +++ linux-fsl-imx51-2.6.31/include/linux/usb_usual.h @@ -56,7 +56,9 @@ US_FLAG(SANE_SENSE, 0x00008000) \ /* Sane Sense (> 18 bytes) */ \ US_FLAG(CAPACITY_OK, 0x00010000) \ - /* READ CAPACITY response is correct */ + /* READ CAPACITY response is correct */ \ + US_FLAG(BAD_SENSE, 0x00020000) \ + /* Bad Sense (never more than 18 bytes) */ #define US_FLAG(name, value) US_FL_##name = value , enum { US_DO_ALL_FLAGS }; --- linux-fsl-imx51-2.6.31.orig/include/linux/shmem_fs.h +++ linux-fsl-imx51-2.6.31/include/linux/shmem_fs.h @@ -38,6 +38,9 @@ return container_of(inode, struct shmem_inode_info, vfs_inode); } +extern int init_tmpfs(void); +extern int shmem_fill_super(struct super_block *sb, void *data, int silent); + #ifdef CONFIG_TMPFS_POSIX_ACL int shmem_permission(struct inode *, int); int shmem_acl_init(struct inode *, struct inode *); --- linux-fsl-imx51-2.6.31.orig/include/linux/input.h +++ linux-fsl-imx51-2.6.31/include/linux/input.h @@ -1118,6 +1118,7 @@ int (*event)(struct input_dev *dev, unsigned int type, unsigned int code, int value); struct input_handle *grab; + struct input_handle *filter; spinlock_t event_lock; struct mutex mutex; @@ -1218,6 +1219,7 @@ void *private; void (*event)(struct input_handle *handle, unsigned int type, unsigned int code, int value); + bool (*filter)(struct input_handle *handle, unsigned int type, unsigned int code, int value); int (*connect)(struct input_handler *handler, struct input_dev *dev, const struct input_device_id *id); void (*disconnect)(struct input_handle *handle); void (*start)(struct input_handle *handle); @@ -1295,6 +1297,9 @@ int input_grab_device(struct input_handle *); void input_release_device(struct input_handle *); +int input_filter_device(struct input_handle *); +void input_unfilter_device(struct input_handle *); + int input_open_device(struct input_handle *); void input_close_device(struct input_handle *); --- linux-fsl-imx51-2.6.31.orig/include/linux/kvm.h +++ linux-fsl-imx51-2.6.31/include/linux/kvm.h @@ -104,6 +104,11 @@ __u64 cr8; __u64 apic_base; +#ifdef __KVM_S390 + /* the processor status word for s390 */ + __u64 psw_mask; /* psw upper half */ + __u64 psw_addr; /* psw lower half */ +#endif union { /* KVM_EXIT_UNKNOWN */ struct { @@ -155,8 +160,6 @@ /* KVM_EXIT_S390_SIEIC */ struct { __u8 icptcode; - __u64 mask; /* psw upper half */ - __u64 addr; /* psw lower half */ __u16 ipa; __u32 ipb; } s390_sieic; @@ -453,6 +456,7 @@ }; #endif +#define KVM_CAP_S390_PSW 42 /* * ioctls for VM fds --- linux-fsl-imx51-2.6.31.orig/include/linux/cryptohash.h +++ linux-fsl-imx51-2.6.31/include/linux/cryptohash.h @@ -7,6 +7,11 @@ void sha_init(__u32 *buf); void sha_transform(__u32 *digest, const char *data, __u32 *W); +#define MD5_DIGEST_WORDS 4 +#define MD5_MESSAGE_BYTES 64 + +void md5_transform(__u32 *hash, __u32 const *in); + __u32 half_md4_transform(__u32 buf[4], __u32 const in[8]); #endif --- linux-fsl-imx51-2.6.31.orig/include/linux/audit.h +++ linux-fsl-imx51-2.6.31/include/linux/audit.h @@ -33,7 +33,7 @@ * 1200 - 1299 messages internal to the audit daemon * 1300 - 1399 audit event messages * 1400 - 1499 SE Linux use - * 1500 - 1599 kernel LSPP events + * 1500 - 1599 AppArmor use * 1600 - 1699 kernel crypto events * 1700 - 1799 kernel anomaly records * 1800 - 1899 kernel integrity events @@ -122,6 +122,14 @@ #define AUDIT_MAC_UNLBL_STCADD 1416 /* NetLabel: add a static label */ #define AUDIT_MAC_UNLBL_STCDEL 1417 /* NetLabel: del a static label */ +#define AUDIT_APPARMOR_AUDIT 1501 /* AppArmor audited grants */ +#define AUDIT_APPARMOR_ALLOWED 1502 /* Allowed Access for learning */ +#define AUDIT_APPARMOR_DENIED 1503 +#define AUDIT_APPARMOR_HINT 1504 /* Process Tracking information */ +#define AUDIT_APPARMOR_STATUS 1505 /* Changes in config */ +#define AUDIT_APPARMOR_ERROR 1506 /* Internal AppArmor Errors */ +#define AUDIT_APPARMOR_KILL 1507 /* AppArmor killing processes */ + #define AUDIT_FIRST_KERN_ANOM_MSG 1700 #define AUDIT_LAST_KERN_ANOM_MSG 1799 #define AUDIT_ANOM_PROMISCUOUS 1700 /* Device changed promiscuous mode */ --- linux-fsl-imx51-2.6.31.orig/include/linux/fsl_devices.h +++ linux-fsl-imx51-2.6.31/include/linux/fsl_devices.h @@ -6,7 +6,7 @@ * * Maintainer: Kumar Gala * - * Copyright 2004 Freescale Semiconductor, Inc + * Copyright 2004, 2009 Freescale Semiconductor, Inc * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -50,6 +50,15 @@ FSL_USB2_DR_OTG, }; +/* this used for usb port type */ +enum fsl_usb2_modes { + FSL_USB_DR_HOST, + FSL_USB_DR_DEVICE, + FSL_USB_MPH_HOST1, + FSL_USB_MPH_HOST2, + FSL_USB_UNKNOWN, /* unkonwn status */ +}; + enum fsl_usb2_phy_modes { FSL_USB2_PHY_NONE, FSL_USB2_PHY_ULPI, @@ -58,11 +67,49 @@ FSL_USB2_PHY_SERIAL, }; +struct platform_device; struct fsl_usb2_platform_data { /* board specific information */ enum fsl_usb2_operating_modes operating_mode; enum fsl_usb2_phy_modes phy_mode; unsigned int port_enables; + + char *name; /* pretty print */ + int (*platform_init) (struct platform_device *); + void (*platform_uninit) (struct fsl_usb2_platform_data *); + void __iomem *regs; /* ioremap'd register base */ + u32 xcvr_type; /* PORTSC_PTS_* */ + char *transceiver; /* transceiver name */ + unsigned power_budget; /* for hcd->power_budget */ + struct platform_device *pdev; + struct fsl_xcvr_ops *xcvr_ops; + struct fsl_xcvr_power *xcvr_pwr; + int (*gpio_usb_active) (void); + void (*gpio_usb_inactive) (void); + void (*usb_clock_for_pm) (bool); + void (*platform_suspend)(struct fsl_usb2_platform_data *); + void (*platform_resume)(struct fsl_usb2_platform_data *); + void (*wake_up_enable)(struct fsl_usb2_platform_data *pdata, bool on); + unsigned big_endian_mmio : 1; + unsigned big_endian_desc : 1; + unsigned es : 1; /* need USBMODE:ES */ + unsigned have_sysif_regs : 1; + unsigned le_setup_buf : 1; + unsigned change_ahb_burst:1; + unsigned ahb_burst_mode:3; + unsigned suspended : 1; + unsigned already_suspended : 1; + + /* register save area for suspend/resume */ + u32 pm_command; + u32 pm_status; + u32 pm_intr_enable; + u32 pm_frame_index; + u32 pm_segment; + u32 pm_frame_list; + u32 pm_async_next; + u32 pm_configured_flag; + u32 pm_portsc; }; /* Flags in fsl_usb2_mph_platform_data */ @@ -81,6 +128,20 @@ u32 sysclk; }; +struct fsl_ata_platform_data { + int adma_flag; /* AMDA mode is used or not, 1:used.*/ + int udma_mask; /* UDMA modes h/w can handle */ + int mwdma_mask; /* MDMA modes h/w can handle */ + int pio_mask; /* PIO modes h/w can handle */ + int fifo_alarm; /* value for fifo_alarm reg */ + int max_sg; /* longest sglist h/w can handle */ + int (*init)(struct platform_device *pdev); + void (*exit)(void); + char *io_reg; + char *core_reg; +}; + + struct mpc8xx_pcmcia_ops { void(*hw_ctrl)(int slot, int enable); int(*voltage_set)(int slot, int vcc, int vpp); --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_scc_driver.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_scc_driver.h @@ -0,0 +1,1031 @@ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_SCC_DRIVER_H__ +#define __ASM_ARCH_MXC_SCC_DRIVER_H__ + +/* Start marker for C++ compilers */ +#ifdef __cplusplus +extern "C" { +#endif + +/* + * NAMING CONVENTIONS + * ================== + * (A note to maintainers and other interested parties) + * + * Use scc_ or SCC_ prefix for 'high-level' interface routines and the types + * passed to those routines. Try to avoid #defines in these interfaces. + * + * Use SMN_ or SCM_ prefix for the #defines used with scc_read_register() and + * scc_write_register, or values passed/retrieved from those routines. + */ + +/*! + * @defgroup MXCSCC SCC Driver + * + * @ingroup MXCSECDRVRS + */ + +/*! + * @file arch-mxc/mxc_scc_driver.h + * + * @brief (Header file to use the SCC driver.) + * + * The SCC driver will only be available to other kernel modules. That is, + * there will be no node file in /dev, no way for a user-mode program to access + * the driver, no way for a user program to access the device directly. + * + * With the exception of #scc_monitor_security_failure(), all routines are + * 'synchronous', i.e. they will not return to their caller until the requested + * action is complete, or fails to complete. Some of these functions could + * take quite a while to perform, depending upon the request. + * + * Routines are provided to: + * @li encrypt or decrypt secrets - #scc_crypt() + * @li trigger a security-violation alarm - #scc_set_sw_alarm() + * @li get configuration and version information - #scc_get_configuration() + * @li zeroize memory - #scc_zeroize_memories() + * @li Work on wrapped and stored secret values: #scc_alloc_slot(), + * #scc_dealloc_slot(), scc_load_slot(), #scc_decrypt_slot(), + * #scc_encrypt_slot(), #scc_get_slot_info() + + * @li monitor the Security Failure alarm - #scc_monitor_security_failure() + * @li stop monitoring Security Failure alarm - + * #scc_stop_monitoring_security_failure() + * @li write registers of the SCC - #scc_write_register() + * @li read registers of the SCC - #scc_read_register() + * + * The driver does not allow "storage" of data in either the Red or Black + * memories. Any decrypted secret is returned to the user, and if the user + * wants to use it at a later point, the encrypted form must again be passed + * to the driver, and it must be decrypted again. + * + * The SCC encrypts and decrypts using Triple DES with an internally stored + * key. When the SCC is in Secure mode, it uses its secret, unique-per-chip + * key. When it is in Non-Secure mode, it uses a default key. This ensures + * that secrets stay secret if the SCC is not in Secure mode. + * + * Not all functions that could be provided in a 'high level' manner have been + * implemented. Among the missing are interfaces to the ASC/AIC components and + * the timer functions. These and other features must be accessed through + * #scc_read_register() and #scc_write_register(), using the @c \#define values + * provided. + * + * Here is a glossary of acronyms used in the SCC driver documentation: + * - CBC - Cipher Block Chaining. A method of performing a block cipher. + * Each block is encrypted using some part of the result of the previous + * block's encryption. It needs an 'initialization vector' to seed the + * operation. + * - ECB - Electronic Code Book. A method of performing a block cipher. + * With a given key, a given block will always encrypt to the same value. + * - DES - Data Encryption Standard. (8-byte) Block cipher algorithm which + * uses 56-bit keys. In SCC, this key is constant and unique to the device. + * SCC uses the "triple DES" form of this algorithm. + * - AIC - Algorithm Integrity Checker. + * - ASC - Algorithm Sequence Checker. + * - SMN - Security Monitor. The part of the SCC responsible for monitoring + * for security problems and notifying the CPU and other PISA components. + * - SCM - Secure Memory. The part of the SCC which handles the cryptography. + * - SCC - Security Controller. Central security mechanism for PISA. + * - PISA - Platform-Independent Security Architecture. + */ + +/* Temporarily define compile-time flags to make Doxygen happy. */ +#ifdef DOXYGEN_HACK +/*! @defgroup scccompileflags SCC Driver compile-time flags + * + * These preprocessor flags should be set, if desired, in a makefile so + * that they show up on the compiler command line. + */ +/*! @addtogroup scccompileflags */ + +/*! @{ */ +/*! + * Compile-time flag to change @ref smnregs and @ref scmregs + * offset values for the SCC's implementation on the MX.21 board. + * + * This must also be set properly for any code which calls the + * scc_read_register() or scc_write_register() functions or references the + * register offsets. + */ +#define TAHITI +/*! @} */ +#undef TAHITI + +#endif /* DOXYGEN_HACK */ + +/*! Major Version of the driver. Used for + scc_configuration->driver_major_version */ +#define SCC_DRIVER_MAJOR_VERSION_1 1 +/*! Old Minor Version of the driver. */ +#define SCC_DRIVER_MINOR_VERSION_0 0 +/*! Old Minor Version of the driver. */ +#define SCC_DRIVER_MINOR_VERSION_4 4 +/*! Old Minor Version of the driver. */ +#define SCC_DRIVER_MINOR_VERSION_5 5 +/*! Old Minor Version of the driver. */ +#define SCC_DRIVER_MINOR_VERSION_6 6 +/*! Minor Version of the driver. Used for + scc_configuration->driver_minor_version */ +#define SCC_DRIVER_MINOR_VERSION_8 8 + + +/*! + * @typedef scc_return_t + */ +/*! Common status return values from SCC driver functions. */ + typedef enum scc_return_t { + SCC_RET_OK = 0, /*!< Function succeeded */ + SCC_RET_FAIL, /*!< Non-specific failure */ + SCC_RET_VERIFICATION_FAILED, /*!< Decrypt validation failed */ + SCC_RET_TOO_MANY_FUNCTIONS, /*!< At maximum registered functions */ + SCC_RET_BUSY, /*!< SCC is busy and cannot handle request */ + SCC_RET_INSUFFICIENT_SPACE, /*!< Encryption or decryption failed because + @c count_out_bytes says that @c data_out is + too small to hold the value. */ + } scc_return_t; + +/*! + * Configuration information about SCC and the driver. + * + * This struct/typedef contains information from the SCC and the driver to + * allow the user of the driver to determine the size of the SCC's memories and + * the version of the SCC and the driver. + */ + typedef struct scc_config_t { + int driver_major_version; /*!< Major version of the SCC driver code */ + int driver_minor_version; /*!< Minor version of the SCC driver code */ + int scm_version; /*!< Version from SCM Configuration register */ + int smn_version; /*!< Version from SMN Status register */ + int block_size_bytes; /*!< Number of bytes per block of RAM; also + block size of the crypto algorithm. */ + int black_ram_size_blocks; /*!< Number of blocks of Black RAM */ + int red_ram_size_blocks; /*!< Number of blocks of Red RAM */ + } scc_config_t; + +/*! + * @typedef scc_enc_dec_t + */ +/*! + * Determine whether SCC will run its cryptographic + * function as an encryption or decryption. Used as an argument to + * #scc_crypt(). + */ + typedef enum scc_enc_dec_t { + SCC_ENCRYPT, /*!< Encrypt (from Red to Black) */ + SCC_DECRYPT /*!< Decrypt (from Black to Red) */ + } scc_enc_dec_t; + +/* + * @typedef scc_crypto_mode_t + */ +/*! + * Determine whether SCC will run its cryptographic function in ECB (electronic + * codebook) or CBC (cipher-block chaining) mode. Used as an argument to + * #scc_crypt(). + */ + typedef enum scc_crypto_mode_t { + SCC_ECB_MODE, /*!< Electronic Codebook Mode */ + SCC_CBC_MODE /*!< Cipher Block Chaining Mode */ + } scc_crypto_mode_t; + +/*! + * @typedef scc_verify_t + */ +/*! + * Tell the driver whether it is responsible for verifying the integrity of a + * secret. During an encryption, using other than #SCC_VERIFY_MODE_NONE will + * cause a check value to be generated and appended to the plaintext before + * encryption. During decryption, the check value will be verified after + * decryption, and then stripped from the message. + */ + typedef enum scc_verify_t { + /*! No verification value added or checked. Input plaintext data must be + * be a multiple of the blocksize (#scc_get_configuration()). */ + SCC_VERIFY_MODE_NONE, + /*! Driver will generate/validate a 2-byte CCITT CRC. Input plaintext will + be padded to a multiple of the blocksize, adding 3-10 bytes to the + resulting output ciphertext. Upon decryption, this padding will be + stripped, and the CRC will be verified. */ + SCC_VERIFY_MODE_CCITT_CRC + } scc_verify_t; + +/*! + * Determine if the given credentials match that of the key slot. + * + * @param[in] owner_id A value which will control access to the slot. + * @param[in] slot Key Slot to query + * @param[in] access_len Length of the key + * + * @return 0 on success, non-zero on failure. See #scc_return_t. + */ + scc_return_t + scc_verify_slot_access(uint64_t owner_id, uint32_t slot, + uint32_t access_len); + +/*! + * Retrieve configuration information from the SCC. + * + * This function always succeeds. + * + * @return A pointer to the configuration information. This is a pointer to + * static memory and must not be freed. The values never change, and + * the return value will never be null. + */ + extern scc_config_t *scc_get_configuration(void); + +/*! + * Zeroize Red and Black memories of the SCC. This will start the Zeroizing + * process. The routine will return when the memories have zeroized or failed + * to do so. The driver will poll waiting for this to occur, so this + * routine must not be called from interrupt level. Some future version of + * driver may elect instead to sleep. + * + * @return 0 or error if initialization fails. + */ + extern scc_return_t scc_zeroize_memories(void); + +/*! + * Perform a Triple DES encryption or decryption operation. + * + * This routine will cause the SCM to perform an encryption or decryption with + * its internal key. If the SCC's #SMN_STATUS register shows that the SCC is + * in #SMN_STATE_SECURE, then the Secret Key will be used. If it is + * #SMN_STATE_NON_SECURE (or health check), then the Default Key will be used. + * + * This function will perform in a variety of ways, depending upon the values + * of @c direction, @c crypto_mode, and @c check_mode. If + * #SCC_VERIFY_MODE_CCITT_CRC mode is requested, upon successful completion, + * the @c count_in_bytes will be different from the returned value of @c + * count_out_bytes. This is because the two-byte CRC and some amount of + * padding (at least one byte) will either be added or stripped. + * + * This function will not return until the SCC has performed the operation (or + * reported failure to do so). It must therefore not be called from interrupt + * level. In the current version, it will poll the SCC for completion. In + * future versions, it may sleep. + * + * @param[in] count_in_bytes The number of bytes to move through the crypto + * function. Must be greater than zero. + * + * @param[in] data_in Pointer to the array of bytes to be used as input + * to the crypto function. + * + * @param[in] init_vector Pointer to the block-sized (8 byte) array of + * bytes which form the initialization vector for + * this operation. A non-null value is required + * when @c crypto_mode has the value #SCC_CBC_MODE; + * the value is ignored in #SCC_ECB_MODE. + * + * @param[in] direction Direct the driver to perform encryption or + * decryption. + * + * @param[in] crypto_mode Run the crypto function in ECB or CBC mode. + * + * @param[in] check_mode During encryption, generate and append a check + * value to the plaintext and pad the resulting + * data. During decryption, validate the plaintext + * with that check value and remove the padding. + * + * @param[in,out] count_out_bytes On input, the number of bytes available for + * copying to @c data_out. On return, the number of + * bytes copied to @c data_out. + * + * @param[out] data_out Pointer to the array of bytes that are where the + * output of the crypto function are to be placed. + * For encryption, this must be able to hold a + * longer ciphertext than the plaintext message at + * @c data_in. The driver will append a 'pad' of + * 1-8 bytes to the message, and if @c check_mode is + * used, additional bytes may be added, the number + * depending upon the type of check being requested. + * + * @return 0 on success, non-zero on failure. See #scc_return_t. + * + * @internal + * This function will verify SCC state and the functions parameters. It will + * acquire the crypto lock, and set up some SCC registers and variables common + * to encryption and decryption. A rough check will be made to verify that + * enough space is available in @c count_out_bytes. Upon success, either the + * #scc_encrypt or #scc_decrypt routine will be called to do the actual work. + * The crypto lock will then be released. + */ +extern scc_return_t scc_crypt(unsigned long count_in_bytes, + const uint8_t * data_in, + const uint8_t * init_vector, + scc_enc_dec_t direction, + scc_crypto_mode_t crypto_mode, + scc_verify_t check_mode, + uint8_t * data_out, + unsigned long *count_out_bytes); + + +/*! + * Allocate a key slot for a stored key (or other stored value). + * + * This feature is to allow decrypted secret values to be kept in RED RAM. + * This can all visibility of the data only by Sahara. + * + * @param value_size_bytes Size, in bytes, of RED key/value. Currently only + * a size up to 32 bytes is supported. + * + * @param owner_id A value which will control access to the slot. + * It must be passed into to any subsequent calls to + * use the assigned slot. + * + * @param[out] slot The slot number for the key. + * + * @return 0 on success, non-zero on failure. See #scc_return_t. + */ + extern scc_return_t scc_alloc_slot(uint32_t value_size_bytes, + uint64_t owner_id, uint32_t * slot); + +/*! + * Deallocate the key slot of a stored key or secret value. + * + * @param owner_id The id which owns the @c slot. + * + * @param slot The slot number for the key. + + * @return 0 on success, non-zero on failure. See #scc_return_t. + */ + extern scc_return_t scc_dealloc_slot(uint64_t owner_id, uint32_t slot); + +/*! + * Load a value into a slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param key_data Data to load into the slot + * @param key_length Length, in bytes, of @c key_data to copy to SCC. + * + * @return SCC_RET_OK on success. SCC_RET_FAIL will be returned if slot + * specified cannot be accessed for any reason, or SCC_RET_INSUFFICIENT_SPACE + * if @c key_length exceeds the size of the slot. + */ + extern scc_return_t scc_load_slot(uint64_t owner_id, uint32_t slot, + const uint8_t * key_data, + uint32_t key_length); +/*! + * Read a value from a slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param key_length Length, in bytes, of @c key_data to copy from SCC. + * @param key_data Location to write the key + * + * @return SCC_RET_OK on success. SCC_RET_FAIL will be returned if slot + * specified cannot be accessed for any reason, or SCC_RET_INSUFFICIENT_SPACE + * if @c key_length exceeds the size of the slot. + */ + extern scc_return_t scc_read_slot(uint64_t owner_id, uint32_t slot, + uint32_t key_length, + uint8_t * key_data); + +/*! + * Allocate a key slot to fit the requested size. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param length Length, in bytes, of @c black_data + * @param black_data Location to store result of encrypting RED data in slot + * + * @return SCC_RET_OK on success, SCC_RET_FAIL if slot specified cannot be + * accessed for any reason. + */ + extern scc_return_t scc_encrypt_slot(uint64_t owner_id, uint32_t slot, + uint32_t length, + uint8_t * black_data); + +/*! + * Decrypt some black data and leave result in the slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param length Length, in bytes, of @c black_data + * @param black_data Location of data to dencrypt and store in slot + * + * @return SCC_RET_OK on success, SCC_RET_FAIL if slot specified cannot be + * accessed for any reason. + */ + extern scc_return_t scc_decrypt_slot(uint64_t owner_id, uint32_t slot, + uint32_t length, + const uint8_t * black_data); + +/*! + * Get attributes of data in RED slot. + * + * @param owner_id The id which owns the @c slot. + * + * @param slot The slot number for the key. + * + * @param[out] address Physical address of RED value. + * + * @param[out] value_size_bytes Length, in bytes, of RED value, + * or NULL if unneeded.. + * + * @param[out] slot_size_bytes Length, in bytes, of slot size, + * or NULL if unneeded.. + * + * @return 0 on success, non-zero on failure. See #scc_return_t. + */ + extern scc_return_t scc_get_slot_info(uint64_t owner_id, uint32_t slot, + uint32_t *address, + uint32_t *value_size_bytes, + uint32_t *slot_size_bytes); + +/*! + * Signal a software alarm to the SCC. This will take the SCC and other PISA + * parts out of Secure mode and into Security Failure mode. The SCC will stay + * in failed mode until a reboot. + * + * @internal + * If the SCC is not already in fail state, simply write the + * #SMN_COMMAND_SET_SOFTWARE_ALARM bit in #SMN_COMMAND. Since there is no + * reason to wait for the interrupt to bounce back, simply act as though + * one did. + */ + extern void scc_set_sw_alarm(void); + +/*! + * This routine will register a function to be called should a Security Failure + * be signalled by the SCC (Security Monitor). + * + * The callback function may be called from interrupt level, it may be called + * from some process' task. It should therefore not take a long time to + * perform its operation, and it may not sleep. + * + * @param callback_func Function pointer to routine which will receive + * notification of the security failure. + * @return 0 if function was successfully registered, non-zero on + * failure. See #scc_return_t. + * + * @internal + * There is a fixed global static array which keeps track of the requests to + * monitor the failure. + * + * Add @c callback_func to the first empty slot in #scc_callbacks[]. If there + * is no room, return #SCC_RET_TOO_MANY_FUNCTIONS. + */ + extern scc_return_t scc_monitor_security_failure(void + callback_func(void)); + +/*! + * This routine will deregister a function previously registered with + * #scc_monitor_security_failure(). + * + * @param callback_func Function pointer to routine previously registered with + * #scc_stop_monitoring_security_failure(). + */ + extern void scc_stop_monitoring_security_failure(void + callback_func(void)); + +/*! + * Read value from an SCC register. + * The offset will be checked for validity (range) as well as whether it is + * accessible (e.g. not busy, not in failed state) at the time of the call. + * + * @param[in] register_offset The (byte) offset within the SCC block + * of the register to be queried. See + * @ref scmregs and @ref smnregs. + * @param[out] value Pointer to where value from the register + * should be placed. + * @return 0 if OK, non-zero on error. See #scc_return_t. + * + * @internal + * Verify that the register_offset is a) valid, b) refers to a readable + * register, and c) the SCC is in a state which would allow a read of this + * register. + */ + extern scc_return_t scc_read_register(int register_offset, + uint32_t * value); + +/*! + * Write a new value into an SCC register. + * The offset will be checked for validity (range) as well as whether it is + * accessible (e.g. not busy, not in failed state) at the time of the call. + * + * @param[in] register_offset The (byte) offset within the SCC block + * of the register to be modified. See + * @ref scmregs and @ref smnregs. + * @param[in] value The value to store into the register. + * @return 0 if OK, non-zero on error. See #scc_return_t. + * + * @internal + * Verify that the register_offset is a) valid, b) refers to a writeable + * register, and c) the SCC is in a state which would allow a write to this + * register. + */ + extern scc_return_t scc_write_register(int register_offset, + uint32_t value); + +/* + * NOTE TO MAINTAINERS + * + * All of the doxygen comments for the register offset values are in this the + * following comment section. Any changes to register names or definitions + * must be reflected in this section and in both the TAHITI and non-TAHITI + *version of the memory map. + */ + +/*! + * @defgroup scmregs SCM Registers + * + * These values are offsets into the SCC for the Secure Memory + * (SCM) registers. They are used in the @c register_offset parameter of + * #scc_read_register() and #scc_write_register(). + */ +/*! @addtogroup scmregs */ +/*! @{ */ +/*! @def SCM_RED_START + * Starting block offset in red memory for cipher function. */ + +/*! @def SCM_BLACK_START + * Starting block offset in black memory for cipher function. */ + +/*! @def SCM_LENGTH + * Number of blocks to process during cipher function */ + +/*! @def SCM_CONTROL + * SCM Control register. + * See @ref scmcontrolregdefs "SCM Control Register definitions" for details. + */ + +/*! @def SCM_STATUS + * SCM Status register. + * See @ref scmstatusregdefs "SCM Status Register Definitions" for details. + */ + +/*! @def SCM_ERROR_STATUS + * SCM Error Status Register. + * See @ref scmerrstatdefs "SCM Error Status Register definitions" for + * details. */ + +/*! @def SCM_INTERRUPT_CTRL + * SCM Interrupt Control Register. + * See @ref scminterruptcontroldefs "SCM Interrupt Control Register definitions" + * for details. + */ + +/*! @def SCM_CONFIGURATION + * SCM Configuration Register. + * See @ref scmconfigdefs "SCM Configuration Register Definitions" for + * details. + */ + +/*! @def SCM_INIT_VECTOR_0 + * Upper Half of the Initialization Vector */ + +/*! @def SCM_INIT_VECTOR_1 + * Lower Half of the Initialization Vector */ + +/*! @def SCM_RED_MEMORY + * Starting location of first block of Red memory */ + +/*! @def SCM_BLACK_MEMORY + * Starting location of first block of Black memory */ + + /*! @} *//* end of SCM group */ + +/*! + * @defgroup smnregs SMN Registers + * + * These values are offsets into the SCC for the Security Monitor + * (SMN) registers. They are used in the @c register_offset parameter of the + * #scc_read_register() and #scc_write_register(). + */ +/*! @addtogroup smnregs */ +/*! @{ */ +/*! @def SMN_STATUS + * Status register for SMN. + * See @ref smnstatusregdefs "SMN Status Register definitions" for further + * information. + */ + +/*! @def SMN_COMMAND + * Command register for SMN. See + * @ref smncommandregdefs "Command Register Definitions" for further + * information. + */ + +/*! @def SMN_SEQUENCE_START + * Sequence Start register for ASC. See #SMN_SEQUENCE_START_MASK + */ + +/*! @def SMN_SEQUENCE_END + * Sequence End register for ASC. See #SMN_SEQUENCE_CHECK_MASK + */ + +/*! @def SMN_SEQUENCE_CHECK + * Sequence Check register for ASC. See #SMN_SEQUENCE_END_MASK + */ + +/*! @def SMN_BIT_COUNT + * Bit Bank Repository for AIC. See #SMN_BIT_COUNT_MASK + */ + +/*! @def SMN_BITBANK_INC_SIZE + * Bit Bank Increment Size for AIC. See #SMN_BITBANK_INC_SIZE_MASK + */ + +/*! @def SMN_BITBANK_DECREMENT + * Bit Bank Decrement for AIC. See #SMN_BITBANK_DECREMENT_MASK + */ + +/*! @def SMN_COMPARE_SIZE + * Compare Size register for Plaintext/Ciphertext checker. See + * #SMN_COMPARE_SIZE_MASK */ + +/*! @def SMN_PLAINTEXT_CHECK + * Plaintext Check register for Plaintext/Ciphertext checker. + */ + +/*! @def SMN_CIPHERTEXT_CHECK + * Ciphertext Check register for Plaintext/Ciphertext checker. + */ + +/*! @def SMN_TIMER_IV + * Timer Initial Value register + */ + +/*! @def SMN_TIMER_CONTROL + * Timer Control register. + * See @ref smntimercontroldefs "SMN Timer Control Register definitions". + */ + +/*! @def SMN_DEBUG_DETECT_STAT + * Debug Detector Status Register + * See @ref smndbgdetdefs "SMN Debug Detector Status Register"for definitions. + */ + +/*! @def SMN_TIMER + * Current value of the Timer Register + */ + + /*! @} *//* end of SMN group */ + +/* + * SCC MEMORY MAP + * + */ + +/* SCM registers */ +#define SCM_RED_START 0x00000000 /* read/write */ +#define SCM_BLACK_START 0x00000004 /* read/write */ +#define SCM_LENGTH 0x00000008 /* read/write */ +#define SCM_CONTROL 0x0000000C /* read/write */ +#define SCM_STATUS 0x00000010 /* read only */ +#define SCM_ERROR_STATUS 0x00000014 /* read/write */ +#define SCM_INTERRUPT_CTRL 0x00000018 /* read/write */ +#define SCM_CONFIGURATION 0x0000001C /* read only */ +#define SCM_INIT_VECTOR_0 0x00000020 /* read/write */ +#define SCM_INIT_VECTOR_1 0x00000024 /* read/write */ +#define SCM_RED_MEMORY 0x00000400 /* read/write */ +#define SCM_BLACK_MEMORY 0x00000800 /* read/write */ + +/* SMN Registers */ +#define SMN_STATUS 0x00001000 /* read/write */ +#define SMN_COMMAND 0x00001004 /* read/write */ +#define SMN_SEQUENCE_START 0x00001008 /* read/write */ +#define SMN_SEQUENCE_END 0x0000100C /* read/write */ +#define SMN_SEQUENCE_CHECK 0x00001010 /* read/write */ +#define SMN_BIT_COUNT 0x00001014 /* read only */ +#define SMN_BITBANK_INC_SIZE 0x00001018 /* read/write */ +#define SMN_BITBANK_DECREMENT 0x0000101C /* write only */ +#define SMN_COMPARE_SIZE 0x00001020 /* read/write */ +#define SMN_PLAINTEXT_CHECK 0x00001024 /* read/write */ +#define SMN_CIPHERTEXT_CHECK 0x00001028 /* read/write */ +#define SMN_TIMER_IV 0x0000102C /* read/write */ +#define SMN_TIMER_CONTROL 0x00001030 /* read/write */ +#define SMN_DEBUG_DETECT_STAT 0x00001034 /* read/write */ +#define SMN_TIMER 0x00001038 /* read only */ + +/*! Total address space of the SCC, in bytes */ +#define SCC_ADDRESS_RANGE 0x103c + +/*! + * @defgroup smnstatusregdefs SMN Status Register definitions (SMN_STATUS) + */ +/*! @addtogroup smnstatusregdefs */ +/*! @{ */ +/*! SMN version id. */ +#define SMN_STATUS_VERSION_ID_MASK 0xfc000000 +/*! number of bits to shift #SMN_STATUS_VERSION_ID_MASK to get it to LSB */ +#define SMN_STATUS_VERSION_ID_SHIFT 26 +/*! Cacheable access to SMN attempted. */ +#define SMN_STATUS_CACHEABLE_ACCESS 0x02000000 +/*! Illegal bus master access attempted. */ +#define SMN_STATUS_ILLEGAL_MASTER 0x01000000 +/*! Scan mode entered/exited since last reset. */ +#define SMN_STATUS_SCAN_EXIT 0x00800000 +/*! Unaligned access attempted. */ +#define SMN_STATUS_UNALIGNED_ACCESS 0x00400000 +/*! Bad byte offset access attempted. */ +#define SMN_STATUS_BYTE_ACCESS 0x00200000 +/*! Illegal address access attempted. */ +#define SMN_STATUS_ILLEGAL_ADDRESS 0x00100000 +/*! User access attempted. */ +#define SMN_STATUS_USER_ACCESS 0x00080000 +/*! SCM is using DEFAULT key. */ +#define SMN_STATUS_DEFAULT_KEY 0x00040000 +/*! SCM detects weak or bad key. */ +#define SMN_STATUS_BAD_KEY 0x00020000 +/*! Illegal access to SCM detected. */ +#define SMN_STATUS_ILLEGAL_ACCESS 0x00010000 +/*! Internal error detected in SCM. */ +#define SMN_STATUS_SCM_ERROR 0x00008000 +/*! SMN has an outstanding interrupt. */ +#define SMN_STATUS_SMN_STATUS_IRQ 0x00004000 +/*! Software Alarm was triggered. */ +#define SMN_STATUS_SOFTWARE_ALARM 0x00002000 +/*! Timer has expired. */ +#define SMN_STATUS_TIMER_ERROR 0x00001000 +/*! Plaintext/Ciphertext compare failed. */ +#define SMN_STATUS_PC_ERROR 0x00000800 +/*! Bit Bank detected overflow or underflow */ +#define SMN_STATUS_BITBANK_ERROR 0x00000400 +/*! Algorithm Sequence Check failed. */ +#define SMN_STATUS_ASC_ERROR 0x00000200 +/*! Security Policy Block detected error. */ +#define SMN_STATUS_SECURITY_POLICY_ERROR 0x00000100 +/*! At least one Debug signal is active. */ +#define SMN_STATUS_DEBUG_ACTIVE 0x00000080 +/*! SCM failed to zeroize its memory. */ +#define SMN_STATUS_ZEROIZE_FAIL 0x00000040 +/*! Processor booted from internal ROM. */ +#define SMN_STATUS_INTERNAL_BOOT 0x00000020 +/*! SMN's internal state. */ +#define SMN_STATUS_STATE_MASK 0x0000001F +/*! Number of bits to shift #SMN_STATUS_STATE_MASK to get it to LSB. */ +#define SMN_STATUS_STATE_SHIFT 0 +/*! @} */ + +/*! + * @defgroup sccscmstates SMN Model Secure State Controller States (SMN_STATE_MASK) + */ +/*! @addtogroup sccscmstates */ +/*! @{ */ +/*! This is the first state of the SMN after power-on reset */ +#define SMN_STATE_START 0x0 +/*! The SMN is zeroizing its RAM during reset */ +#define SMN_STATE_ZEROIZE_RAM 0x5 +/*! SMN has passed internal checks, and is waiting for Software check-in */ +#define SMN_STATE_HEALTH_CHECK 0x6 +/*! Fatal Security Violation. SMN is locked, SCM is inoperative. */ +#define SMN_STATE_FAIL 0x9 +/*! SCC is in secure state. SCM is using secret key. */ +#define SMN_STATE_SECURE 0xA +/*! Due to non-fatal error, device is not secure. SCM is using default key. */ +#define SMN_STATE_NON_SECURE 0xC +/*! @} */ + +/*! + * @defgroup scmconfigdefs SCM Configuration Register definitions (SCM_CONFIGURATION) + **/ +/*! @addtogroup scmconfigdefs */ +/*! @{ */ +/*! Version number of the Secure Memory. */ +#define SCM_CFG_VERSION_ID_MASK 0xf8000000 +/*! Number of bits to shift #SCM_CFG_VERSION_ID_MASK to get it to LSB. */ +#define SCM_CFG_VERSION_ID_SHIFT 27 +/*! Version one value for SCC configuration */ +#define SCM_VERSION_1 1 +/*! Size, in blocks, of Red memory. */ +#define SCM_CFG_BLACK_SIZE_MASK 0x07fe0000 +/*! Number of bits to shift #SCM_CFG_BLACK_SIZE_MASK to get it to LSB. */ +#define SCM_CFG_BLACK_SIZE_SHIFT 17 +/*! Size, in blocks, of Black memory. */ +#define SCM_CFG_RED_SIZE_MASK 0x0001ff80 +/*! Number of bits to shift #SCM_CFG_RED_SIZE_MASK to get it to LSB. */ +#define SCM_CFG_RED_SIZE_SHIFT 7 +/*! Number of bytes per block. */ +#define SCM_CFG_BLOCK_SIZE_MASK 0x0000007f +/*! Number of bits to shift #SCM_CFG_BLOCK_SIZE_MASK to get it to LSB. */ +#define SCM_CFG_BLOCK_SIZE_SHIFT 0 +/*! @} */ + +/*! + * @defgroup smncommandregdefs SMN Command Register Definitions (SMN_COMMAND) + */ +/*! @addtogroup smncommandregdefs */ +/*! @{ */ +#define SMN_COMMAND_ZEROS_MASK 0xffffff70 /*!< These bits are unimplemented + or reserved */ +#define SMN_COMMAND_TAMPER_LOCK 0x10 /*!< Lock Tamper Detect Bit */ +#define SMN_COMMAND_CLEAR_INTERRUPT 0x8 /*!< Clear SMN Interrupt */ +#define SMN_COMMAND_CLEAR_BIT_BANK 0x4 /*!< Clear SMN Bit Bank */ +#define SMN_COMMAND_ENABLE_INTERRUPT 0x2 /*!< Enable SMN Interrupts */ +#define SMN_COMMAND_SET_SOFTWARE_ALARM 0x1 /*!< Set Software Alarm */ +/*! @} */ + +/*! + * @defgroup smntimercontroldefs SMN Timer Control Register definitions (SMN_TIMER_CONTROL) + */ +/*! @addtogroup smntimercontroldefs */ +/*! @{ */ +/*! These bits are reserved or zero */ +#define SMN_TIMER_CTRL_ZEROS_MASK 0xfffffffc +/*! Load the timer from #SMN_TIMER_IV */ +#define SMN_TIMER_LOAD_TIMER 0x2 +/*! Setting to zero stops the Timer */ +#define SMN_TIMER_STOP_MASK 0x1 +/*! Setting this value starts the timer */ +#define SMN_TIMER_START_TIMER 0x1 +/*! @} */ + +/*! + * @defgroup scminterruptcontroldefs SCM Interrupt Control Register definitions (SCM_INTERRUPT_CTRL) + * + * These are the bit definitions for the #SCM_INTERRUPT_CTRL register. + */ +/*! @addtogroup scminterruptcontroldefs */ +/*! @{ */ +/*! Clear SCM memory */ +#define SCM_INTERRUPT_CTRL_ZEROIZE_MEMORY 0x4 +/*! Clear outstanding SCM interrupt */ +#define SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT 0x2 +/*! Inhibit SCM interrupts */ +#define SCM_INTERRUPT_CTRL_MASK_INTERRUPTS 0x1 +/*! @} */ + +/*! + * @defgroup scmcontrolregdefs SCM Control Register definitions (SCM_CONTROL). + * These values are used with the #SCM_CONTROL register. + */ +/*! @addtogroup scmcontrolregdefs */ +/*! @{ */ +/*! These bits are zero or reserved */ +#define SCM_CONTROL_ZEROS_MASK 0xfffffff8 +/*! Setting this will start encrypt/decrypt */ +#define SCM_CONTROL_START_CIPHER 0x04 +/*! CBC/ECB flag. + * See @ref scmchainmodedefs "Chaining Mode bit definitions." + */ +#define SCM_CONTROL_CHAINING_MODE_MASK 0x02 +/*! Encrypt/decrypt choice. + * See @ref scmciphermodedefs "Cipher Mode bit definitions." */ +#define SCM_CONTROL_CIPHER_MODE_MASK 0x01 +/*! @} */ + +/*! + * @defgroup scmchainmodedefs SCM_CHAINING_MODE_MASK - Bit definitions + */ +/*! @addtogroup scmchainmodedefs */ +/*! @{ */ +#define SCM_CBC_MODE 0x2 /*!< Cipher block chaining */ +#define SCM_ECB_MODE 0x0 /*!< Electronic codebook. */ +/*! @} */ + +/* Bit definitions in the SCM_CIPHER_MODE_MASK */ +/*! + * @defgroup scmciphermodedefs SCM_CIPHER_MODE_MASK - Bit definitions + */ +/*! @{ */ +#define SCM_DECRYPT_MODE 0x1 /*!< decrypt from black to red memory */ +#define SCM_ENCRYPT_MODE 0x0 /*!< encrypt from red to black memory */ +/*! @} */ + +/*! + * @defgroup scmstatusregdefs SCM Status Register (SCM_STATUS). + * Bit and field definitions of the SCM_STATUS register. + */ +/*! @addtogroup scmstatusregdefs */ +/*! @{ */ +/*! These bits are zero or reserved */ +#define SCM_STATUS_ZEROS_MASK 0xffffe000 +/*! Ciphering failed due to length error. */ +#define SCM_STATUS_LENGTH_ERROR 0x1000 +/*! SMN has stopped blocking access to the SCM */ +#define SCM_STATUS_BLOCK_ACCESS_REMOVED 0x0800 +/*! Ciphering done. */ +#define SCM_STATUS_CIPHERING_DONE 0x0400 +/*! Zeroizing done. */ +#define SCM_STATUS_ZEROIZING_DONE 0x0200 +/*! SCM wants attention. Interrupt status is available. */ +#define SCM_STATUS_INTERRUPT_STATUS 0x0100 +/*! Secret Key is in use. */ +#define SCM_STATUS_SECRET_KEY 0x0080 +/*! Secret Key is in use. Deprecated. Use #SCM_STATUS_SECRET_KEY. */ +#define SCM_STATUS_DEFAULT_KEY 0x0080 +/*! Internal error to SCM. */ +#define SCM_STATUS_INTERNAL_ERROR 0x0040 +/*! Secret key is not valid. */ +#define SCM_STATUS_BAD_SECRET_KEY 0x0020 +/*! Failed to zeroize memory. */ +#define SCM_STATUS_ZEROIZE_FAILED 0x0010 +/*! SMN is blocking access to Secure Memory. */ +#define SCM_STATUS_SMN_BLOCKING_ACCESS 0x0008 +/*! SCM is current encrypting or decrypting data. */ +#define SCM_STATUS_CIPHERING 0x0004 +/*! SCM is currently zeroizing data. */ +#define SCM_STATUS_ZEROIZING 0x0002 +/*! SCM is busy and access to memory is blocked. */ +#define SCM_STATUS_BUSY 0x0001 +/*! @} */ + +/*! + * @defgroup scmerrstatdefs SCM Error Status Register (SCM_ERROR_STATUS) + * + * These definitions are associated with the SCM Error Status Register + * (SCM_ERROR_STATUS). + */ +/*! @addtogroup scmerrstatdefs */ +/*! @{ */ +/*! These bits are zero or reserved */ +#define SCM_ERR_ZEROS_MASK 0xffffc000 +/*! Cacheable access to SCM was attempted */ +#define SCM_ERR_CACHEABLE_ACCESS 0x2000 +/*! Access attempted by illegal bus master */ +#define SCM_ERR_ILLEGAL_MASTER 0x1000 +/*! Unaligned access attempted */ +#define SCM_ERR_UNALIGNED_ACCESS 0x0800 +/*! Byte or half-word access attempted */ +#define SCM_ERR_BYTE_ACCESS 0x0400 +/*! Illegal address attempted */ +#define SCM_ERR_ILLEGAL_ADDRESS 0x0200 +/*! User access attempted */ +#define SCM_ERR_USER_ACCESS 0x0100 +/*! Access attempted while SCM was using default key */ +#define SCM_ERR_SECRET_KEY_IN_USE 0x0080 +/*! Access attempted while SCM had internal error */ +#define SCM_ERR_INTERNAL_ERROR 0x0040 +/*! Access attempted while SCM was detecting Bad Key */ +#define SCM_ERR_BAD_SECRET_KEY 0x0020 +/*! The SCM failed to Zeroize memory */ +#define SCM_ERR_ZEROIZE_FAILED 0x0010 +/*! Access attempted while SMN was Blocking Access */ +#define SCM_ERR_SMN_BLOCKING_ACCESS 0x0008 +/*! Access attempted while SCM was CIPHERING */ +#define SCM_ERR_CIPHERING 0x0004 +/*! Access attempted while SCM was ZEROIZING */ +#define SCM_ERR_ZEROIZING 0x0002 +/*! Access attempted while SCM was BUSY */ +#define SCM_ERR_BUSY 0x0001 +/*! @} */ + +/*! + * @defgroup smndbgdetdefs SMN Debug Detector Status Register + * (SCM_DEBUG_DETECT_STAT) + */ +/*! @addtogroup smndbgdetdefs */ +/*! @{ */ +#define SMN_DBG_ZEROS_MASK 0xfffff000 /*!< These bits are zero or reserved */ +#define SMN_DBG_D12 0x0800 /*!< Error detected on Debug Port D12 */ +#define SMN_DBG_D11 0x0400 /*!< Error detected on Debug Port D11 */ +#define SMN_DBG_D10 0x0200 /*!< Error detected on Debug Port D10 */ +#define SMN_DBG_D9 0x0100 /*!< Error detected on Debug Port D9 */ +#define SMN_DBG_D8 0x0080 /*!< Error detected on Debug Port D8 */ +#define SMN_DBG_D7 0x0040 /*!< Error detected on Debug Port D7 */ +#define SMN_DBG_D6 0x0020 /*!< Error detected on Debug Port D6 */ +#define SMN_DBG_D5 0x0010 /*!< Error detected on Debug Port D5 */ +#define SMN_DBG_D4 0x0008 /*!< Error detected on Debug Port D4 */ +#define SMN_DBG_D3 0x0004 /*!< Error detected on Debug Port D3 */ +#define SMN_DBG_D2 0x0002 /*!< Error detected on Debug Port D2 */ +#define SMN_DBG_D1 0x0001 /*!< Error detected on Debug Port D1 */ +/*! @} */ + +/*! Mask for the usable bits of the Sequence Start Register + (#SMN_SEQUENCE_START) */ +#define SMN_SEQUENCE_START_MASK 0x0000ffff + +/*! Mask for the usable bits of the Sequence End Register + (#SMN_SEQUENCE_END) */ +#define SMN_SEQUENCE_END_MASK 0x0000ffff + +/*! Mask for the usable bits of the Sequence Check Register + (#SMN_SEQUENCE_CHECK) */ +#define SMN_SEQUENCE_CHECK_MASK 0x0000ffff + +/*! Mask for the usable bits of the Bit Counter Register + (#SMN_BIT_COUNT) */ +#define SMN_BIT_COUNT_MASK 0x000007ff + +/*! Mask for the usable bits of the Bit Bank Increment Size Register + (#SMN_BITBANK_INC_SIZE) */ +#define SMN_BITBANK_INC_SIZE_MASK 0x000007ff + +/*! Mask for the usable bits of the Bit Bank Decrement Register + (#SMN_BITBANK_DECREMENT) */ +#define SMN_BITBANK_DECREMENT_MASK 0x000007ff + +/*! Mask for the usable bits of the Compare Size Register + (#SMN_COMPARE_SIZE) */ +#define SMN_COMPARE_SIZE_MASK 0x0000003f + +/* Close out marker for C++ compilers */ +#ifdef __cplusplus +} +#endif +#endif /* __ASM_ARCH_MXC_SCC_DRIVER_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/syscalls.h +++ linux-fsl-imx51-2.6.31/include/linux/syscalls.h @@ -761,4 +761,8 @@ asmlinkage long sys_perf_counter_open( struct perf_counter_attr __user *attr_uptr, pid_t pid, int cpu, int group_fd, unsigned long flags); + +asmlinkage long sys_mmap_pgoff(unsigned long addr, unsigned long len, + unsigned long prot, unsigned long flags, + unsigned long fd, unsigned long pgoff); #endif --- linux-fsl-imx51-2.6.31.orig/include/linux/pci_ids.h +++ linux-fsl-imx51-2.6.31/include/linux/pci_ids.h @@ -479,6 +479,9 @@ #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE 0x0361 #define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 +#define PCI_SUBVENDOR_ID_IBM 0x1014 +#define PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT 0x03d4 + #define PCI_VENDOR_ID_UNISYS 0x1018 #define PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR 0x001C @@ -877,6 +880,7 @@ #define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 #define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 #define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 +#define PCI_DEVICE_ID_APPLE_U4_PCIE 0x005b #define PCI_DEVICE_ID_APPLE_IPID2_AGP 0x0066 #define PCI_DEVICE_ID_APPLE_IPID2_ATA 0x0069 #define PCI_DEVICE_ID_APPLE_IPID2_FW 0x006a --- linux-fsl-imx51-2.6.31.orig/include/linux/mm.h +++ linux-fsl-imx51-2.6.31/include/linux/mm.h @@ -1118,7 +1118,15 @@ unsigned long addr, unsigned long len, unsigned long flags, struct page **pages); -extern unsigned long get_unmapped_area(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); +extern unsigned long get_unmapped_area_prot(struct file *, unsigned long, + unsigned long, unsigned long, unsigned long, int); + +static inline unsigned long get_unmapped_area(struct file *file, + unsigned long addr, unsigned long len, unsigned long pgoff, + unsigned long flags) +{ + return get_unmapped_area_prot(file, addr, len, pgoff, flags, 0); +} extern unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, unsigned long len, unsigned long prot, @@ -1211,6 +1219,28 @@ return (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; } +static inline int stack_guard_page(struct vm_area_struct *vma, + unsigned long addr) +{ + struct vm_area_struct *prev; + + /* No need to look further if addr is not the start of a stack vma */ + if (!(vma->vm_flags & VM_GROWSDOWN) || vma->vm_start != addr) + return 0; + + prev = find_vma(vma->vm_mm, addr - PAGE_SIZE); + + /* + * Only if there is no previous vma that is a continuation of this + * vma, the current vma includes the guard page. + */ + if (!prev || !(prev->vm_flags & VM_GROWSDOWN) || + prev->vm_end != vma->vm_start) + return 1; + + return 0; +} + pgprot_t vm_get_page_prot(unsigned long vm_flags); struct vm_area_struct *find_extend_vma(struct mm_struct *, unsigned long addr); int remap_pfn_range(struct vm_area_struct *, unsigned long addr, --- linux-fsl-imx51-2.6.31.orig/include/linux/soundcard.h +++ linux-fsl-imx51-2.6.31/include/linux/soundcard.h @@ -873,12 +873,16 @@ #define SOUND_MIXER_READ_LINE1 MIXER_READ(SOUND_MIXER_LINE1) #define SOUND_MIXER_READ_LINE2 MIXER_READ(SOUND_MIXER_LINE2) #define SOUND_MIXER_READ_LINE3 MIXER_READ(SOUND_MIXER_LINE3) +#define SOUND_MIXER_READ_PHONEIN MIXER_READ(SOUND_MIXER_PHONEIN) +#define SOUND_MIXER_READ_PHONEOUT MIXER_READ(SOUND_MIXER_PHONEOUT) /* Obsolete macros */ #define SOUND_MIXER_READ_MUTE MIXER_READ(SOUND_MIXER_MUTE) #define SOUND_MIXER_READ_ENHANCE MIXER_READ(SOUND_MIXER_ENHANCE) #define SOUND_MIXER_READ_LOUD MIXER_READ(SOUND_MIXER_LOUD) +#define SOUND_MIXER_READ_OUTSRC MIXER_READ(SOUND_MIXER_OUTSRC) +#define SOUND_MIXER_READ_OUTMASK MIXER_READ(SOUND_MIXER_OUTMASK) #define SOUND_MIXER_READ_RECSRC MIXER_READ(SOUND_MIXER_RECSRC) #define SOUND_MIXER_READ_DEVMASK MIXER_READ(SOUND_MIXER_DEVMASK) #define SOUND_MIXER_READ_RECMASK MIXER_READ(SOUND_MIXER_RECMASK) @@ -903,6 +907,8 @@ #define SOUND_MIXER_WRITE_LINE1 MIXER_WRITE(SOUND_MIXER_LINE1) #define SOUND_MIXER_WRITE_LINE2 MIXER_WRITE(SOUND_MIXER_LINE2) #define SOUND_MIXER_WRITE_LINE3 MIXER_WRITE(SOUND_MIXER_LINE3) +#define SOUND_MIXER_WRITE_PHONEIN MIXER_WRITE(SOUND_MIXER_PHONEIN) +#define SOUND_MIXER_WRITE_PHONEOUT MIXER_WRITE(SOUND_MIXER_PHONEOUT) /* Obsolete macros */ #define SOUND_MIXER_WRITE_MUTE MIXER_WRITE(SOUND_MIXER_MUTE) @@ -910,6 +916,7 @@ #define SOUND_MIXER_WRITE_LOUD MIXER_WRITE(SOUND_MIXER_LOUD) #define SOUND_MIXER_WRITE_RECSRC MIXER_WRITE(SOUND_MIXER_RECSRC) +#define SOUND_MIXER_WRITE_OUTSRC MIXER_WRITE(SOUND_MIXER_OUTSRC) typedef struct mixer_info { --- linux-fsl-imx51-2.6.31.orig/include/linux/fs.h +++ linux-fsl-imx51-2.6.31/include/linux/fs.h @@ -2296,6 +2296,7 @@ extern int generic_readlink(struct dentry *, char __user *, int); extern void generic_fillattr(struct inode *, struct kstat *); extern int vfs_getattr(struct vfsmount *, struct dentry *, struct kstat *); +void __inode_add_bytes(struct inode *inode, loff_t bytes); void inode_add_bytes(struct inode *inode, loff_t bytes); void inode_sub_bytes(struct inode *inode, loff_t bytes); loff_t inode_get_bytes(struct inode *inode); --- linux-fsl-imx51-2.6.31.orig/include/linux/swap.h +++ linux-fsl-imx51-2.6.31/include/linux/swap.h @@ -155,6 +155,7 @@ unsigned int max; unsigned int inuse_pages; unsigned int old_block_size; + void (*notify_swap_entry_free_fn) (unsigned long); }; struct swap_list_t { @@ -296,6 +297,7 @@ extern int reuse_swap_page(struct page *); extern int try_to_free_swap(struct page *); struct backing_dev_info; +extern void set_notify_swap_entry_free(unsigned, void (*) (unsigned long)); /* linux/mm/thrash.c */ extern struct mm_struct *swap_token_mm; --- linux-fsl-imx51-2.6.31.orig/include/linux/tty.h +++ linux-fsl-imx51-2.6.31/include/linux/tty.h @@ -185,7 +185,12 @@ struct tty_port_operations { /* Return 1 if the carrier is raised */ int (*carrier_raised)(struct tty_port *port); + /* Control the DTR line */ void (*dtr_rts)(struct tty_port *port, int raise); + /* Called when the last close completes or a hangup finishes + IFF the port was initialized. Do not use to free resources */ + void (*shutdown)(struct tty_port *port); + void (*drop)(struct tty_port *port); }; struct tty_port { @@ -457,7 +462,8 @@ extern int tty_port_close_start(struct tty_port *port, struct tty_struct *tty, struct file *filp); extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty); - +extern void tty_port_close(struct tty_port *port, + struct tty_struct *tty, struct file *filp); extern int tty_register_ldisc(int disc, struct tty_ldisc_ops *new_ldisc); extern int tty_unregister_ldisc(int disc); extern int tty_set_ldisc(struct tty_struct *tty, int ldisc); --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_light.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_light.h @@ -0,0 +1,1082 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_LIGHT_H__ +#define __ASM_ARCH_MXC_PMIC_LIGHT_H__ + +/*! + * @defgroup PMIC_LIGHT PMIC Light Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_light.h + * @brief This is the header of PMIC Light driver. + * + * @ingroup PMIC_LIGHT + */ + +#include +#include +#include + +/*! + * @name IOCTL user space interface + */ + +/*! @{ */ +/*! + * Enable Backlight. + * Argument type: none. + */ +#define PMIC_BKLIT_ENABLE _IO('p', 0xe0) +/*! + * Disable Backlight. + * Argument type: none. + */ +#define PMIC_BKLIT_DISABLE _IO('p', 0xe1) +/*! + * Set backlight configuration. + * Argument type: pointer to t_bklit_setting_param + */ +#define PMIC_SET_BKLIT _IOW('p', 0xe2, int) +/*! + * Get backlight configuration. + * Argument type: pointer to t_bklit_setting_param + */ +#define PMIC_GET_BKLIT _IOWR('p', 0xe3, int) +/*! + * Ramp up configuration. + * Argument type: t_bklit_channel + */ +#define PMIC_RAMPUP_BKLIT _IOW('p', 0xe4, int) +/*! + * Ramp down configuration. + * Argument type: t_bklit_channel + */ +#define PMIC_RAMPDOWN_BKLIT _IOW('p', 0xe5, int) +/*! + * Enable Tri-color LED. + * Argument type: t_tcled_enable_param + */ +#define PMIC_TCLED_ENABLE _IOW('p', 0xe6, int) +/*! + * Disable Tri-color LED. + * Argument type: t_funlight_bank + */ +#define PMIC_TCLED_DISABLE _IOW('p', 0xe7, int) +/*! + * Start Tri-color LED pattern. + * Argument type: t_fun_param + */ +#define PMIC_TCLED_PATTERN _IOW('p', 0xe8, int) +/*! + * Enable Backlight & tcled. + * Argument type: none. + */ +#define PMIC_BKLIT_TCLED_ENABLE _IO('p', 0xe9) +/*! + * Disable Backlight & tcled. + * Argument type: none. + */ +#define PMIC_BKLIT_TCLED_DISABLE _IO('p', 0xea) +/*! + * Reset ramp up configuration. + * Argument type: t_bklit_channel + */ +#define PMIC_OFF_RAMPUP_BKLIT _IOW('p', 0xeb, int) +/*! + * Reset ramp down configuration. + * Argument type: t_bklit_channel + */ +#define PMIC_OFF_RAMPDOWN_BKLIT _IOW('p', 0xec, int) +/*! + * Set tcled ind configuration. + * Argument type: t_tcled_ind_param + */ +#define PMIC_SET_TCLED _IOW('p', 0xed, int) +/*! + * Get tcled ind configuration. + * Argument type: t_tcled_ind_param + */ +#define PMIC_GET_TCLED _IOWR('p', 0xee, int) +/*! @} */ +/*! + * @enum t_bklit_mode + * @brief Backlight modes. + */ +typedef enum { + BACKLIGHT_CURRENT_CTRL_MODE, /*! < Current control mode */ + BACKLIGHT_TRIODE_MODE /*! < Triode mode */ +} t_bklit_mode; + +/*! + * @enum t_bklit_channel + * @brief Backlight channels. + */ +typedef enum { + BACKLIGHT_LED1, /*! < Backlight channel 1 */ + BACKLIGHT_LED2, /*! < Backlight channel 2 */ + BACKLIGHT_LED3 /*! < Backlight channel 3 */ +} t_bklit_channel; + +/*! + * @enum t_bklit_strobe_mode + * @brief Backlight Strobe Light Pulsing modes. + */ +typedef enum { + /*! + * No Strobe Light Pulsing + */ + BACKLIGHT_STROBE_NONE, + /*! + * Strobe Light Pulsing at 3.3% duty cycle over 300msec (Driver goes + * into Triode Mode with pulses constrained to 10msec.) + */ + BACKLIGHT_STROBE_FAST, + /*! + * Strobe Light Pulsing at 10% duty cycle over 100msec (Driver goes + * into Triode Mode with pulses constrained to 10msec.) + */ + BACKLIGHT_STROBE_SLOW +} t_bklit_strobe_mode; + +/*! + * @struct t_bklit_setting_param + * @brief Backlight setting. + */ + +typedef struct { + t_bklit_channel channel; /*!< Channel */ + t_bklit_mode mode; /*!< Mode */ + t_bklit_strobe_mode strobe; /*!< Strobe mode */ + unsigned char current_level; /*!< Current level */ + unsigned char duty_cycle; /*!< Duty cycle */ + unsigned char cycle_time; /*!< Cycle time */ + bool edge_slow; /*!< Edge Slow */ + bool en_dis; /*!< Enable disable boost mode */ + unsigned int abms; /*!< Adaptive boost + * mode selection */ + unsigned int abr; /*!< Adaptive + * boost reference */ +} t_bklit_setting_param; + +/*! + * @enum t_funlight_bank + * @brief Tri-color LED fun light banks. + */ +typedef enum { + TCLED_FUN_BANK1 = 0, /*! < Fun light bank 1 */ + TCLED_FUN_BANK2, /*! < Fun light bank 2 */ + TCLED_FUN_BANK3 /*! < Fun light bank 3 */ +} t_funlight_bank; + +/*! + * @enum t_tcled_mode + * @brief Tri-color LED operation modes. + * + * The Tri-Color LED Driver circuitry includes 2 modes of operation. In LED + * Indicator Mode, this circuitry operates as Red and Green LED Drivers with + * flasher timing to indicate GSM network status. In Fun Light Mode, this + * circuitry provides expanded capability for current control and distribution + * that supplements the three channels. + */ +typedef enum { + TCLED_IND_MODE = 0, /*! < LED Indicator Mode */ + TCLED_FUN_MODE /*! < Fun Light Mode */ +} t_tcled_mode; + +/*! + * @struct t_tcled_enable_param + * @brief enable setting. + */ +typedef struct { + t_funlight_bank bank; /*!< Bank */ + t_tcled_mode mode; /*!< Mode */ +} t_tcled_enable_param; + +/*! + * @enum t_ind_channel + * @brief Tri-color LED indicator mode channels. + * + */ + +typedef enum { + TCLED_IND_RED = 0, /*! < Red LED */ + TCLED_IND_GREEN, /*! < Green LED */ + TCLED_IND_BLUE /*! < Blue LED */ +} t_ind_channel; + +/*! + * @enum t_funlight_channel + * @brief Tri-color LED fun light mode channels. + * + */ +typedef enum { + TCLED_FUN_CHANNEL1 = 0, /*! < Fun light channel 1 (Red) */ + TCLED_FUN_CHANNEL2, /*! < Fun light channel 2 (Green) */ + TCLED_FUN_CHANNEL3 /*! < Fun light channel 3 (Blue) */ +} t_funlight_channel; + +/*! + * @enum t_tcled_ind_blink_pattern + * @brief Tri-color LED Indicator Mode blinking mode. + */ +typedef enum { + TCLED_IND_OFF = 0, /*! < Continuous off */ + TCLED_IND_BLINK_1, /*! < 1 / 31 */ + TCLED_IND_BLINK_2, /*! < 2 / 31 */ + TCLED_IND_BLINK_3, /*! < 3 / 31 */ + TCLED_IND_BLINK_4, /*! < 4 / 31 */ + TCLED_IND_BLINK_5, /*! < 5 / 31 */ + TCLED_IND_BLINK_6, /*! < 6 / 31 */ + TCLED_IND_BLINK_7, /*! < 7 / 31 */ + TCLED_IND_BLINK_8, /*! < 8 / 31 */ + TCLED_IND_BLINK_9, /*! < 9 / 31 */ + TCLED_IND_BLINK_10, /*! < 10 / 31 */ + TCLED_IND_BLINK_11, /*! < 11 / 31 */ + TCLED_IND_BLINK_12, /*! < 12 / 31 */ + TCLED_IND_BLINK_13, /*! < 13 / 31 */ + TCLED_IND_BLINK_14, /*! < 14 / 31 */ + TCLED_IND_BLINK_15, /*! < 15 / 31 */ + TCLED_IND_BLINK_16, /*! < 16 / 31 */ + TCLED_IND_BLINK_17, /*! < 17 / 31 */ + TCLED_IND_BLINK_18, /*! < 18 / 31 */ + TCLED_IND_BLINK_19, /*! < 19 / 31 */ + TCLED_IND_BLINK_20, /*! < 20 / 31 */ + TCLED_IND_BLINK_21, /*! < 21 / 31 */ + TCLED_IND_BLINK_22, /*! < 22 / 31 */ + TCLED_IND_BLINK_23, /*! < 23 / 31 */ + TCLED_IND_BLINK_24, /*! < 24 / 31 */ + TCLED_IND_BLINK_25, /*! < 25 / 31 */ + TCLED_IND_BLINK_26, /*! < 26 / 31 */ + TCLED_IND_BLINK_27, /*! < 27 / 31 */ + TCLED_IND_BLINK_28, /*! < 28 / 31 */ + TCLED_IND_BLINK_29, /*! < 29 / 31 */ + TCLED_IND_BLINK_30, /*! < 30 / 31 */ + TCLED_IND_ON /*! < Continuous on */ +} t_tcled_ind_blink_pattern; + +/*! + * @enum t_tcled_cur_level + * @brief Tri-color LED current levels. + */ +typedef enum { + TCLED_CUR_LEVEL_1 = 0, /*! < Tri-Color LED current level 1 */ + TCLED_CUR_LEVEL_2, /*! < Tri-Color LED current level 2 */ + TCLED_CUR_LEVEL_3, /*! < Tri-Color LED current level 3 */ + TCLED_CUR_LEVEL_4 /*! < Tri-Color LED current level 4 */ +} t_tcled_cur_level; + +/*! + * @enum t_tcled_fun_cycle_time + * @brief Tri-color LED fun light mode cycle time. + */ +typedef enum { + TC_CYCLE_TIME_1 = 0, /*! < Tri-Color LED cycle time 1 */ + TC_CYCLE_TIME_2, /*! < Tri-Color LED cycle time 2 */ + TC_CYCLE_TIME_3, /*! < Tri-Color LED cycle time 3 */ + TC_CYCLE_TIME_4 /*! < Tri-Color LED cycle time 4 */ +} t_tcled_fun_cycle_time; + +/*! + * @enum t_tcled_fun_speed + * @brief Tri-color LED fun light mode pattern speed. + */ +typedef enum { + TC_OFF = 0, /*! < Tri-Color pattern off */ + TC_SLOW, /*! < Tri-Color slow pattern */ + TC_FAST /*! < Tri-Color fast pattern */ +} t_tcled_fun_speed; + +/*! + * @enum t_tcled_fun_speed + * @brief Tri-color LED fun light mode pattern speed. + */ +typedef enum { + TC_STROBE_OFF = 0, /*! < No strobe */ + TC_STROBE_SLOW, /*! < Slow strobe pattern */ + TC_STROBE_FAST /*! < fast strobe pattern */ +} t_tcled_fun_strobe_speed; + +/*! + * @enum t_chaselight_pattern + * @brief Tri-color LED fun light mode chasing light patterns. + */ +typedef enum { + PMIC_RGB = 0, /*!< R -> G -> B */ + BGR /*!< B -> G -> R */ +} t_chaselight_pattern; + +/*! + * This enumeration of Fun Light Pattern. + */ +typedef enum { + /*! + * Blended ramps slow + */ + BLENDED_RAMPS_SLOW, + /*! + * Blended ramps fast + */ + BLENDED_RAMPS_FAST, + /*! + * Saw ramps slow + */ + SAW_RAMPS_SLOW, + /*! + * Saw ramps fast + */ + SAW_RAMPS_FAST, + /*! + * Blended bowtie slow + */ + BLENDED_BOWTIE_SLOW, + /*! + * Blended bowtie fast + */ + BLENDED_BOWTIE_FAST, + /*! + * Strobe slow + */ + STROBE_SLOW, + /*! + * Strobe fast + */ + STROBE_FAST, + /*! + * Chasing Light RGB Slow + */ + CHASING_LIGHT_RGB_SLOW, + /*! + * Chasing Light RGB fast + */ + CHASING_LIGHT_RGB_FAST, + /*! + * Chasing Light BGR Slow + */ + CHASING_LIGHT_BGR_SLOW, + /*! + * Chasing Light BGR fast + */ + CHASING_LIGHT_BGR_FAST, +} t_fun_pattern; + +/*! + * @struct t_fun_param + * @brief LED fun pattern IOCTL parameter + */ +typedef struct { + t_funlight_bank bank; /*!< TCLED bank */ + t_funlight_channel channel; /*!< TCLED channel */ + t_fun_pattern pattern; /*!< Fun pattern */ +} t_fun_param; + +/*! + * @enum t_led_channel + * @brief LED channels including backlight and tri-color LEDs. + */ +typedef enum { + AUDIO_LED1, /*! < Backlight channel 1 */ + AUDIO_LED2, /*! < Backlight channel 2 */ + AUDIO_LEDR, /*! < Fun light channel 1 (Red) */ + AUDIO_LEDG, /*! < Fun light channel 2 (Green) */ + AUDIO_LEDB /*! < Fun light channel 3 (Blue) */ +} t_led_channel; + +/*! + * @enum t_aud_path + * @brief LED audio modulation in-out audio channels + */ +typedef enum { + MIXED_RX = 0, /*!< Mixed L & R Channel RX audio */ + TX /*!< TX path */ +} t_aud_path; + +/*! + * @enum t_aud_gain + * @brief LED audio modulation in-out audio channels + */ +typedef enum { + GAIN_MINUS6DB = 0, /*!< -6 dB */ + GAIN_0DB, /*!< 0 dB */ + GAIN_6DB, /*!< 6 dB */ + GAIN_12DB /*!< 12 dB */ +} t_aud_gain; + +/*! + * @struct t_tcled_ind_param + * @brief LED parameter + */ +typedef struct { + t_funlight_bank bank; /*! < tcled bank */ + t_ind_channel channel; /*! < tcled channel */ + t_tcled_cur_level level; /*! < tcled current level */ + t_tcled_ind_blink_pattern pattern; /*! < tcled dutty cycle */ + bool skip; /*! < tcled skip */ + bool rampup; /*! < tcled rampup */ + bool rampdown; /*! < tcled rampdown */ + bool half_current; /*! < tcled half current */ +} t_tcled_ind_param; + +#if defined(CONFIG_MXC_PMIC_MC13892) + +enum curr_level { + LIT_CURR_0 = 0, + LIT_CURR_3, + LIT_CURR_6, + LIT_CURR_9, + LIT_CURR_12, + LIT_CURR_15, + LIT_CURR_18, + LIT_CURR_21, + /* below setting only used for main/aux/keypad */ + LIT_CURR_HI_0, + LIT_CURR_HI_6, + LIT_CURR_HI_12, + LIT_CURR_HI_18, + LIT_CURR_HI_24, + LIT_CURR_HI_30, + LIT_CURR_HI_36, + LIT_CURR_HI_42, +}; + +enum lit_channel { + LIT_MAIN = 0, + LIT_AUX, + LIT_KEY, + LIT_RED, + LIT_GREEN, + LIT_BLUE, +}; + +#endif + +/* EXPORTED FUNCTIONS */ +#ifdef __KERNEL__ +/*! + * This function enables backlight & tcled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_tcled_master_enable(void); + +/*! + * This function disables backlight & tcled. + * + * @return This function returns PMIC_SUCCESS if successful + */ +PMIC_STATUS pmic_bklit_tcled_master_disable(void); + +/*! + * This function enables backlight. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_master_enable(void); + +/*! + * This function disables backlight. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_master_disable(void); + +/*! + * This function sets backlight current level. + * + * @param channel Backlight channel + * @param level Backlight current level, as the following table. + * @verbatim + level current + ------ ----------- + 0 0 mA + 1 12 mA + 2 24 mA + 3 36 mA + 4 48 mA + 5 60 mA + 6 72 mA + 7 84 mA + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_current(t_bklit_channel channel, + unsigned char level); + +/*! + * This function retrives backlight current level. + * + * @param channel Backlight channel + * @param level Pointer to store backlight current level result. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_current(t_bklit_channel channel, + unsigned char *level); + +/*! + * This function sets a backlight channel duty cycle. + * LED perceived brightness for each zone may be individually set by setting + * duty cycle. The default setting is for 0% duty cycle; this keeps all zone + * drivers turned off even after the master enable command. Each LED current + * sink can be turned on and adjusted for brightness with an independent 4 bit + * word for a duty cycle ranging from 0% to 100% in approximately 6.7% steps. + * + * @param channel Backlight channel. + * @param dc Backlight duty cycle, as the following table. + * @verbatim + dc Duty Cycle (% On-time over Cycle Time) + ------ --------------------------------------- + 0 0% + 1 6.7% + 2 13.3% + 3 20% + 4 26.7% + 5 33.3% + 6 40% + 7 46.7% + 8 53.3% + 9 60% + 10 66.7% + 11 73.3% + 12 80% + 13 86.7% + 14 93.3% + 15 100% + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_dutycycle(t_bklit_channel channel, unsigned char dc); + +/*! + * This function retrives a backlight channel duty cycle. + * + * @param channel Backlight channel. + * @param cycle Pointer to backlight duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_dutycycle(t_bklit_channel channel, + unsigned char *dc); + +/*! + * This function sets a backlight channel cycle time. + * Cycle Time is defined as the period of a complete cycle of + * Time_on + Time_off. The default Cycle Time is set to 0.01 seconds such that + * the 100 Hz on-off cycling is averaged out by the eye to eliminate + * flickering. Additionally, the Cycle Time can be programmed to intentionally + * extend the period of on-off cycles for a visual pulsating or blinking effect. + * + * @param period Backlight cycle time, as the following table. + * @verbatim + period Cycle Time + -------- ------------ + 0 0.01 seconds + 1 0.1 seconds + 2 0.5 seconds + 3 2 seconds + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_cycle_time(unsigned char period); + +/*! + * This function retrives a backlight channel cycle time setting. + * + * @param period Pointer to save backlight cycle time setting result. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_cycle_time(unsigned char *period); + +/*! + * This function sets backlight operation mode. There are two modes of + * operations: current control and triode mode. + * The Duty Cycle/Cycle Time control is retained in Triode Mode. Audio + * coupling is not available in Triode Mode. + * + * @param channel Backlight channel. + * @param mode Backlight operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_mode(t_bklit_channel channel, t_bklit_mode mode); +/*! + * This function gets backlight operation mode. There are two modes of + * operations: current control and triode mode. + * The Duty Cycle/Cycle Time control is retained in Triode Mode. Audio + * coupling is not available in Triode Mode. + * + * @param channel Backlight channel. + * @param mode Backlight operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_mode(t_bklit_channel channel, t_bklit_mode * mode); +/*! + * This function starts backlight brightness ramp up function; ramp time is + * fixed at 0.5 seconds. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_rampup(t_bklit_channel channel); +/*! + * This function stops backlight brightness ramp up function; + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_off_rampup(t_bklit_channel channel); +/*! + * This function starts backlight brightness ramp down function; ramp time is + * fixed at 0.5 seconds. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_rampdown(t_bklit_channel channel); +/*! + * This function stops backlight brightness ramp down function. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_off_rampdown(t_bklit_channel channel); +/*! + * This function enables backlight analog edge slowing mode. Analog Edge + * Slowing slows down the transient edges to reduce the chance of coupling LED + * modulation activity into other circuits. Rise and fall times will be targeted + * for approximately 50usec. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_enable_edge_slow(void); + +/*! + * This function disables backlight analog edge slowing mode. The backlight + * drivers will default to an “Instant On” mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_disable_edge_slow(void); +/*! + * This function gets backlight analog edge slowing mode. DThe backlight + * + * @param edge Edge slowing mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_edge_slow(bool * edge); +/*! + * This function sets backlight Strobe Light Pulsing mode. + * + * @param channel Backlight channel. + * @param mode Strobe Light Pulsing mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_strobemode(t_bklit_channel channel, + t_bklit_strobe_mode mode); + +/*! + * This function enables tri-color LED. + * + * @param mode Tri-color LED operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_enable(t_tcled_mode mode, t_funlight_bank bank); +/*! + * This function disables tri-color LED. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_disable(t_funlight_bank bank); +/*! + * This function retrives tri-color LED operation mode. + * + * @param mode Pointer to Tri-color LED operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_mode(t_tcled_mode * mode, t_funlight_bank bank); +/*! + * This function sets a tri-color LED channel current level in indicator mode. + * + * @param channel Tri-color LED channel. + * @param level Current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_set_current(t_ind_channel channel, + t_tcled_cur_level level, + t_funlight_bank bank); +/*! + * This function retrives a tri-color LED channel current level in indicator mode. + * + * @param channel Tri-color LED channel. + * @param level Pointer to current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_get_current(t_ind_channel channel, + t_tcled_cur_level * level, + t_funlight_bank bank); +/*! + * This function sets a tri-color LED channel blinking pattern in indication + * mode. + * + * @param channel Tri-color LED channel. + * @param pattern Blinking pattern. + * @param skip If true, skip a cycle after each cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_tcled_ind_set_blink_pattern(t_ind_channel channel, + t_tcled_ind_blink_pattern pattern, + bool skip, t_funlight_bank bank); +/*! + * This function retrives a tri-color LED channel blinking pattern in + * indication mode. + * + * @param channel Tri-color LED channel. + * @param pattern Pointer to Blinking pattern. + * @param skip Pointer to a boolean variable indicating if skip + * a cycle after each cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_get_blink_pattern(t_ind_channel channel, + t_tcled_ind_blink_pattern * + pattern, bool * skip, + t_funlight_bank bank); +/*! + * This function sets a tri-color LED channel current level in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param level Current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_current(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_cur_level level); + +/*! + * This function retrives a tri-color LED channel current level + * in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param level Pointer to current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_current(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_cur_level * level); + +/*! + * This function sets tri-color LED cycle time in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param ct Cycle time. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_cycletime(t_funlight_bank bank, + t_tcled_fun_cycle_time ct); + +/*! + * This function retrives tri-color LED cycle time in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param ct Pointer to cycle time. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_cycletime(t_funlight_bank bank, + t_tcled_fun_cycle_time * ct); + +/*! + * This function sets a tri-color LED channel duty cycle in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param dc Duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_dutycycle(t_funlight_bank bank, + t_funlight_channel channel, + unsigned char dc); + +/*! + * This function retrives a tri-color LED channel duty cycle in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param dc Pointer to duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_dutycycle(t_funlight_bank bank, + t_funlight_channel channel, + unsigned char *dc); + +/*! + * This function initiates Blended Ramp fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_blendedramps(t_funlight_bank bank, + t_tcled_fun_speed speed); + +/*! + * This function initiates Saw Ramp fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_sawramps(t_funlight_bank bank, + t_tcled_fun_speed speed); + +/*! + * This function initiates Blended Bowtie fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_blendedbowtie(t_funlight_bank bank, + t_tcled_fun_speed speed); + +/*! + * This function initiates Chasing Lights fun light pattern. + * + * @param bank Tri-color LED bank + * @param pattern Chasing light pattern mode. + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_chasinglightspattern(t_funlight_bank bank, + t_chaselight_pattern pattern, + t_tcled_fun_speed speed); + +/*! + * This function initiates Strobe Mode fun light pattern. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_strobe(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_fun_strobe_speed speed); + +/*! + * This function initiates Tri-color LED brightness Ramp Up function; Ramp time + * is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampup Ramp-up configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_rampup(t_funlight_bank bank, + t_funlight_channel channel, bool rampup); +/*! + * This function gets Tri-color LED brightness Ramp Up function; Ramp time + * is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampup Ramp-up configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_fun_rampup(t_funlight_bank bank, + t_funlight_channel channel, + bool * rampup); + +/*! + * This function initiates Tri-color LED brightness Ramp Down function; Ramp + * time is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampdown Ramp-down configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_rampdown(t_funlight_bank bank, + t_funlight_channel channel, bool rampdown); +/*! + * This function initiates Tri-color LED brightness Ramp Down function; Ramp + * time is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampdown Ramp-down configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_fun_rampdown(t_funlight_bank bank, + t_funlight_channel channel, + bool * rampdown); + +/*! + * This function enables a Tri-color channel triode mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_triode_on(t_funlight_bank bank, + t_funlight_channel channel); + +/*! + * This function disables a Tri-color LED channel triode mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_triode_off(t_funlight_bank bank, + t_funlight_channel channel); + +/*! + * This function enables Tri-color LED edge slowing. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_enable_edge_slow(void); + +/*! + * This function disables Tri-color LED edge slowing. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_disable_edge_slow(void); + +/*! + * This function enables Tri-color LED half current mode. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_enable_half_current(void); + +/*! + * This function disables Tri-color LED half current mode. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_disable_half_current(void); + +/*! + * This function enables backlight or Tri-color LED audio modulation. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_enable_audio_modulation(t_led_channel channel, + t_aud_path path, + t_aud_gain gain, + bool lpf_bypass); + +/*! + * This function disables backlight or Tri-color LED audio modulation. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_disable_audio_modulation(void); +/*! + * This function enables the boost mode. + * Only on mc13783 2.0 or higher + * + * @param en_dis Enable or disable the boost mode + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_set_boost_mode(bool en_dis); + +/*! + * This function gets the boost mode. + * Only on mc13783 2.0 or higher + * + * @param en_dis Enable or disable the boost mode + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_get_boost_mode(bool * en_dis); + +/*! + * This function sets boost mode configuration + * Only on mc13783 2.0 or higher + * + * @param abms Define adaptive boost mode selection + * @param abr Define adaptive boost reference + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_config_boost_mode(unsigned int abms, unsigned int abr); + +/*! + * This function gets boost mode configuration + * Only on mc13783 2.0 or higher + * + * @param abms Define adaptive boost mode selection + * @param abr Define adaptive boost reference + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_gets_boost_mode(unsigned int *abms, unsigned int *abr); + +#if defined(CONFIG_MXC_PMIC_MC13892) + +PMIC_STATUS mc13892_bklit_set_current(enum lit_channel channel, + unsigned char level); +PMIC_STATUS mc13892_bklit_get_current(enum lit_channel channel, + unsigned char *level); +PMIC_STATUS mc13892_bklit_set_dutycycle(enum lit_channel channel, + unsigned char dc); +PMIC_STATUS mc13892_bklit_get_dutycycle(enum lit_channel channel, + unsigned char *dc); +PMIC_STATUS mc13892_bklit_set_ramp(enum lit_channel channel, int flag); +PMIC_STATUS mc13892_bklit_get_ramp(enum lit_channel channel, int *flag); +PMIC_STATUS mc13892_bklit_set_blink_p(enum lit_channel channel, int period); +PMIC_STATUS mc13892_bklit_get_blink_p(enum lit_channel channel, int *period); + +#endif + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_PMIC_LIGHT_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/skbuff.h +++ linux-fsl-imx51-2.6.31/include/linux/skbuff.h @@ -1761,6 +1761,8 @@ int to_offset, int size); extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); +extern void skb_free_datagram_locked(struct sock *sk, + struct sk_buff *skb); extern int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags); extern __wsum skb_checksum(const struct sk_buff *skb, int offset, --- linux-fsl-imx51-2.6.31.orig/include/linux/connector.h +++ linux-fsl-imx51-2.6.31/include/linux/connector.h @@ -24,9 +24,6 @@ #include -#define CN_IDX_CONNECTOR 0xffffffff -#define CN_VAL_CONNECTOR 0xffffffff - /* * Process Events connector unique ids -- used for message routing */ @@ -73,30 +70,6 @@ __u8 data[0]; }; -/* - * Notify structure - requests notification about - * registering/unregistering idx/val in range [first, first+range]. - */ -struct cn_notify_req { - __u32 first; - __u32 range; -}; - -/* - * Main notification control message - * *_notify_num - number of appropriate cn_notify_req structures after - * this struct. - * group - notification receiver's idx. - * len - total length of the attached data. - */ -struct cn_ctl_msg { - __u32 idx_notify_num; - __u32 val_notify_num; - __u32 group; - __u32 len; - __u8 data[0]; -}; - #ifdef __KERNEL__ #include @@ -132,11 +105,8 @@ }; struct cn_callback_data { - void (*destruct_data) (void *); - void *ddata; - - void *callback_priv; - void (*callback) (void *); + struct sk_buff *skb; + void (*callback) (struct cn_msg *, struct netlink_skb_parms *); void *free; }; @@ -152,11 +122,6 @@ u32 seq, group; }; -struct cn_ctl_entry { - struct list_head notify_entry; - struct cn_ctl_msg *msg; -}; - struct cn_dev { struct cb_id id; @@ -167,11 +132,11 @@ struct cn_queue_dev *cbdev; }; -int cn_add_callback(struct cb_id *, char *, void (*callback) (void *)); +int cn_add_callback(struct cb_id *, char *, void (*callback) (struct cn_msg *, struct netlink_skb_parms *)); void cn_del_callback(struct cb_id *); int cn_netlink_send(struct cn_msg *, u32, gfp_t); -int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(void *)); +int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(struct cn_msg *, struct netlink_skb_parms *)); void cn_queue_del_callback(struct cn_queue_dev *dev, struct cb_id *id); int queue_cn_work(struct cn_callback_entry *cbq, struct work_struct *work); --- linux-fsl-imx51-2.6.31.orig/include/linux/isdn_ppp.h +++ linux-fsl-imx51-2.6.31/include/linux/isdn_ppp.h @@ -157,7 +157,7 @@ typedef struct { int mp_mrru; /* unused */ - struct sk_buff_head frags; /* fragments sl list */ + struct sk_buff * frags; /* fragments sl list -- use skb->next */ long frames; /* number of frames in the frame list */ unsigned int seq; /* last processed packet seq #: any packets * with smaller seq # will be dropped --- linux-fsl-imx51-2.6.31.orig/include/linux/mm_types.h +++ linux-fsl-imx51-2.6.31/include/linux/mm_types.h @@ -206,6 +206,9 @@ unsigned long (*get_unmapped_area) (struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags); + unsigned long (*get_unmapped_exec_area) (struct file *filp, + unsigned long addr, unsigned long len, + unsigned long pgoff, unsigned long flags); void (*unmap_area) (struct mm_struct *mm, unsigned long addr); unsigned long mmap_base; /* base of mmap area */ unsigned long task_size; /* size of task vm space */ --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_si4702.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_si4702.h @@ -0,0 +1,39 @@ +/* + * linux/drivers/char/mxc_si4702.h + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Character device driver for SI4702 FM radio + */ + +/* + * @file mxc_si4702.h + * + * @brief SI4702 Radio FM driver + * + * @ingroup Character + */ + +#ifndef _MXC_SI4702_FM_H +#define _MXC_SI4702_FM_H + +/* define IOCTL command */ +#define SI4702_GETVOLUME _IOR('S', 0x10, unsigned int) +#define SI4702_SETVOLUME _IOW('S', 0x11, unsigned int) +#define SI4702_MUTEON _IO('S', 0x12) +#define SI4702_MUTEOFF _IO('S', 0x13) +#define SI4702_SELECT _IOW('S', 0x14, unsigned int) +#define SI4702_SEEK _IOWR('S', 0x15, unsigned int) + +#endif /* _MXC_SI4702_FM_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/tty_driver.h +++ linux-fsl-imx51-2.6.31/include/linux/tty_driver.h @@ -216,6 +216,12 @@ * unless the tty also has a valid tty->termiox pointer. * * Optional: Called under the termios lock + * + * int (*get_icount)(struct tty_struct *tty, struct serial_icounter *icount); + * + * Called when the device receives a TIOCGICOUNT ioctl. Passed a kernel + * structure to complete. This method is optional and will only be called + * if provided (otherwise EINVAL will be returned). */ #include @@ -224,6 +230,7 @@ struct tty_struct; struct tty_driver; +struct serial_icounter_struct; struct tty_operations { struct tty_struct * (*lookup)(struct tty_driver *driver, @@ -259,6 +266,8 @@ unsigned int set, unsigned int clear); int (*resize)(struct tty_struct *tty, struct winsize *ws); int (*set_termiox)(struct tty_struct *tty, struct termiox *tnew); + int (*get_icount)(struct tty_struct *tty, + struct serial_icounter_struct *icount); #ifdef CONFIG_CONSOLE_POLL int (*poll_init)(struct tty_driver *driver, int line, char *options); int (*poll_get_char)(struct tty_driver *driver, int line); --- linux-fsl-imx51-2.6.31.orig/include/linux/device.h +++ linux-fsl-imx51-2.6.31/include/linux/device.h @@ -546,6 +546,16 @@ extern void wait_for_device_probe(void); +#ifdef CONFIG_DEVTMPFS +extern int devtmpfs_create_node(struct device *dev); +extern int devtmpfs_delete_node(struct device *dev); +extern int devtmpfs_mount(const char *mountpoint); +#else +static inline int devtmpfs_create_node(struct device *dev) { return 0; } +static inline int devtmpfs_delete_node(struct device *dev) { return 0; } +static inline int devtmpfs_mount(const char *mountpoint) { return 0; } +#endif + /* drivers/base/power/shutdown.c */ extern void device_shutdown(void); --- linux-fsl-imx51-2.6.31.orig/include/linux/major.h +++ linux-fsl-imx51-2.6.31/include/linux/major.h @@ -171,6 +171,8 @@ #define VIOTAPE_MAJOR 230 +#define LBA_MAJOR 240 + #define BLOCK_EXT_MAJOR 259 #define SCSI_OSD_MAJOR 260 /* open-osd's OSD scsi device */ --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_status.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_status.h @@ -0,0 +1,82 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_STATUS_H__ +#define __ASM_ARCH_MXC_PMIC_STATUS_H__ +#include +#ifdef __KERNEL__ +#include /* copy_{from,to}_user() */ +#endif +/*! + * @file arch-mxc/pmic_status.h + * @brief PMIC APIs return code definition. + * + * @ingroup PMIC_CORE + */ + +/*! + * @enum PMIC_STATUS + * @brief Define return values for all PMIC APIs. + * + * These return values are used by all of the PMIC APIs. + * + * @ingroup PMIC + */ +typedef enum { + PMIC_SUCCESS = 0, /*!< The requested operation was successfully + completed. */ + PMIC_ERROR = -1, /*!< The requested operation could not be completed + due to an error. */ + PMIC_PARAMETER_ERROR = -2, /*!< The requested operation failed because + one or more of the parameters was + invalid. */ + PMIC_NOT_SUPPORTED = -3, /*!< The requested operation could not be + completed because the PMIC hardware + does not support it. */ + PMIC_SYSTEM_ERROR_EINTR = -EINTR, + + PMIC_MALLOC_ERROR = -5, /*!< Error in malloc function */ + PMIC_UNSUBSCRIBE_ERROR = -6, /*!< Error in un-subscribe event */ + PMIC_EVENT_NOT_SUBSCRIBED = -7, /*!< Event occur and not subscribed */ + PMIC_EVENT_CALL_BACK = -8, /*!< Error - bad call back */ + PMIC_CLIENT_NBOVERFLOW = -9, /*!< The requested operation could not be + completed because there are too many + PMIC client requests */ +} PMIC_STATUS; + +/* + * Bitfield macros that use rely on bitfield width/shift information. + */ +#define BITFMASK(field) (((1U << (field ## _WID)) - 1) << (field ## _LSH)) +#define BITFVAL(field, val) ((val) << (field ## _LSH)) +#define BITFEXT(var, bit) ((var & BITFMASK(bit)) >> (bit ## _LSH)) + +/* + * Macros implementing error handling + */ +#define CHECK_ERROR(a) \ +do { \ + int ret = (a); \ + if (ret != PMIC_SUCCESS) \ + return ret; \ +} while (0) + +#define CHECK_ERROR_KFREE(func, freeptrs) \ +do { \ + int ret = (func); \ + if (ret != PMIC_SUCCESS) { \ + freeptrs; \ + return ret; \ + } \ +} while (0); + +#endif /* __ASM_ARCH_MXC_PMIC_STATUS_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/imx_adc.h +++ linux-fsl-imx51-2.6.31/include/linux/imx_adc.h @@ -0,0 +1,275 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef __ASM_ARCH_IMX_ADC_H__ +#define __ASM_ARCH_IMX_ADC_H__ + +/*! + * @defgroup IMX_ADC Digitizer Driver + * @ingroup IMX_DRVRS + */ + +/*! + * @file arch-mxc/imx_adc.h + * @brief This is the header of IMX ADC driver. + * + * @ingroup IMX_ADC + */ + +#include + +/*! + * @enum IMX_ADC_STATUS + * @brief Define return values for all IMX_ADC APIs. + * + * These return values are used by all of the IMX_ADC APIs. + * + * @ingroup IMX_ADC + */ +enum IMX_ADC_STATUS { + /*! The requested operation was successfully completed. */ + IMX_ADC_SUCCESS = 0, + /*! The requested operation could not be completed due to an error. */ + IMX_ADC_ERROR = -1, + /*! + * The requested operation failed because one or more of the + * parameters was invalid. + */ + IMX_ADC_PARAMETER_ERROR = -2, + /*! + * The requested operation could not be completed because the ADC + * hardware does not support it. + */ + IMX_ADC_NOT_SUPPORTED = -3, + /*! Error in malloc function */ + IMX_ADC_MALLOC_ERROR = -5, + /*! Error in un-subscribe event */ + IMX_ADC_UNSUBSCRIBE_ERROR = -6, + /*! Event occur and not subscribed */ + IMX_ADC_EVENT_NOT_SUBSCRIBED = -7, + /*! Error - bad call back */ + IMX_ADC_EVENT_CALL_BACK = -8, + /*! + * The requested operation could not be completed because there + * are too many ADC client requests + */ + IMX_ADC_CLIENT_NBOVERFLOW = -9, +}; + +/* + * Macros implementing error handling + */ +#define CHECK_ERROR(a) \ +do { \ + int ret = (a); \ + if (ret != IMX_ADC_SUCCESS) \ + return ret; \ +} while (0) + +#define CHECK_ERROR_KFREE(func, freeptrs) \ +do { \ + int ret = (func); \ + if (ret != IMX_ADC_SUCCESS) { \ + freeptrs; \ + return ret; \ + } \ +} while (0) + +#define MOD_NAME "mxcadc" + +/*! + * @name IOCTL user space interface + */ + +/*! + * Initialize ADC. + * Argument type: none. + */ +#define IMX_ADC_INIT _IO('p', 0xb0) +/*! + * De-initialize ADC. + * Argument type: none. + */ +#define IMX_ADC_DEINIT _IO('p', 0xb1) +/*! + * Convert one channel. + * Argument type: pointer to t_adc_convert_param. + */ +#define IMX_ADC_CONVERT _IOWR('p', 0xb2, int) +/*! + * Convert multiple channels. + * Argument type: pointer to t_adc_convert_param. + */ +#define IMX_ADC_CONVERT_MULTICHANNEL _IOWR('p', 0xb4, int) + +/*! @{ */ +/*! + * @name Touch Screen minimum and maximum values + */ +#define IMX_ADC_DEVICE "/dev/imx_adc" + +/* + * Maximun allowed variation in the three X/Y co-ordinates acquired from + * touch screen + */ +#define DELTA_Y_MAX 100 +#define DELTA_X_MAX 100 + +/* Upon clearing the filter, this is the delay in restarting the filter */ +#define FILTER_MIN_DELAY 4 + +/* Length of X and Y touch screen filters */ +#define FILTLEN 3 + +#define TS_X_MAX 1000 +#define TS_Y_MAX 1000 + +#define TS_X_MIN 80 +#define TS_Y_MIN 80 + +/*! @} */ +/*! + * This enumeration defines input channels for IMX ADC + */ + +enum t_channel { + TS_X_POS, + TS_Y_POS, + GER_PURPOSE_ADC0, + GER_PURPOSE_ADC1, + GER_PURPOSE_ADC2, + GER_PURPOSE_MULTICHNNEL, +}; + +/*! + * This structure is used to report touch screen value. + */ +struct t_touch_screen { + /* Touch Screen X position */ + unsigned int x_position; + /* Touch Screen X position1 */ + unsigned int x_position1; + /* Touch Screen X position2 */ + unsigned int x_position2; + /* Touch Screen X position3 */ + unsigned int x_position3; + /* Touch Screen Y position */ + unsigned int y_position; + /* Touch Screen Y position1 */ + unsigned int y_position1; + /* Touch Screen Y position2 */ + unsigned int y_position2; + /* Touch Screen Y position3 */ + unsigned int y_position3; + /* Touch Screen contact value */ + unsigned int contact_resistance; + /* Flag indicate the data usability */ + unsigned int valid_flag; +}; + +/*! + * This structure is used with IOCTL code \a IMX_ADC_CONVERT, + * \a IMX_ADC_CONVERT_8X and \a IMX_ADC_CONVERT_MULTICHANNEL. + */ + +struct t_adc_convert_param { + /* channel or channels to be sampled. */ + enum t_channel channel; + /* holds up to 16 sampling results */ + unsigned short result[16]; +}; + +/* EXPORTED FUNCTIONS */ + +#ifdef __KERNEL__ +/* Driver data */ +struct imx_adc_data { + u32 irq; + struct clk *adc_clk; +}; + +/*! + * This function initializes all ADC registers with default values. This + * function also registers the interrupt events. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_init(void); + +/*! + * This function disables the ADC, de-registers the interrupt events. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_deinit(void); + +/*! + * This function triggers a conversion and returns one sampling result of one + * channel. + * + * @param channel The channel to be sampled + * @param result The pointer to the conversion result. The memory + * should be allocated by the caller of this function. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ + +enum IMX_ADC_STATUS imx_adc_convert(enum t_channel channel, + unsigned short *result); + +/*! + * This function triggers a conversion and returns sampling results of each + * specified channel. + * + * @param channels This input parameter is bitmap to specify channels + * to be sampled. + * @param result The pointer to array to store sampling result. + * The order of the result in the array is from lowest + * channel number to highest channel number of the + * sampled channels. + * The memory should be allocated by the caller of this + * function. + * Note that the behavior of this function might differ + * from one platform to another regarding especially + * channels order. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ + +enum IMX_ADC_STATUS imx_adc_convert_multichnnel(enum t_channel channels, + unsigned short *result); + +/*! + * This function retrieves the current touch screen operation mode. + * + * @param touch_sample Pointer to touch sample. + * @param wait_tsi if true, we wait until interrupt occurs + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_get_touch_sample(struct t_touch_screen *ts_value, + int wait_tsi); + +/*! + * This function read the touch screen value. + * + * @param touch_sample return value of touch screen + * @param wait_tsi if true, we need wait until interrupt occurs + * @return This function returns 0. + */ +enum IMX_ADC_STATUS imx_adc_read_ts(struct t_touch_screen *touch_sample, + int wait_tsi); + +int is_imx_adc_ready(void); + +#endif /* _KERNEL */ +#endif /* __ASM_ARCH_IMX_ADC_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/binfmts.h +++ linux-fsl-imx51-2.6.31/include/linux/binfmts.h @@ -29,6 +29,7 @@ char buf[BINPRM_BUF_SIZE]; #ifdef CONFIG_MMU struct vm_area_struct *vma; + unsigned long vma_pages; #else # define MAX_ARG_PAGES 32 struct page *page[MAX_ARG_PAGES]; @@ -59,6 +60,10 @@ unsigned long loader, exec; }; +extern void acct_arg_size(struct linux_binprm *bprm, unsigned long pages); +extern struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, + int write); + #define BINPRM_FLAGS_ENFORCE_NONDUMP_BIT 0 #define BINPRM_FLAGS_ENFORCE_NONDUMP (1 << BINPRM_FLAGS_ENFORCE_NONDUMP_BIT) @@ -101,6 +106,7 @@ extern int __must_check remove_arg_zero(struct linux_binprm *); extern int search_binary_handler(struct linux_binprm *,struct pt_regs *); extern int flush_old_exec(struct linux_binprm * bprm); +extern void setup_new_exec(struct linux_binprm * bprm); extern int suid_dumpable; #define SUID_DUMP_DISABLE 0 /* No setuid dumping */ --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_rtc.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_rtc.h @@ -0,0 +1,153 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef __ASM_ARCH_MXC_PMIC_RTC_H__ +#define __ASM_ARCH_MXC_PMIC_RTC_H__ + +/*! + * @defgroup PMIC_RTC PMIC RTC Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_rtc.h + * @brief This is the header of PMIC RTC driver. + * + * @ingroup PMIC_RTC + */ + +/* + * Includes + */ +#include +#include +#include + +#define PMIC_RTC_SET_TIME _IOWR('p',0xd1, int) +#define PMIC_RTC_GET_TIME _IOWR('p',0xd2, int) +#define PMIC_RTC_SET_ALARM _IOWR('p',0xd3, int) +#define PMIC_RTC_GET_ALARM _IOWR('p',0xd4, int) +#define PMIC_RTC_WAIT_ALARM _IOWR('p',0xd5, int) +#define PMIC_RTC_ALARM_REGISTER _IOWR('p',0xd6, int) +#define PMIC_RTC_ALARM_UNREGISTER _IOWR('p',0xd7, int) + +/*! + * This enumeration define all RTC interrupt + */ +typedef enum { + /*! + * Time of day alarm + */ + RTC_IT_ALARM, + /*! + * 1 Hz timetick + */ + RTC_IT_1HZ, + /*! + * RTC reset occurred + */ + RTC_IT_RST, +} t_rtc_int; + +/* + * RTC PMIC API + */ + +/* EXPORTED FUNCTIONS */ +#ifdef __KERNEL__ + +/*! + * This function set the real time clock of PMIC + * + * @param pmic_time value of date and time + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_set_time(struct timeval *pmic_time); + +/*! + * This function get the real time clock of PMIC + * + * @param pmic_time return value of date and time + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_get_time(struct timeval *pmic_time); + +/*! + * This function set the real time clock alarm of PMIC + * + * @param pmic_time value of date and time + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_set_time_alarm(struct timeval *pmic_time); + +/*! + * This function get the real time clock alarm of PMIC + * + * @param pmic_time return value of date and time + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_get_time_alarm(struct timeval *pmic_time); + +/*! + * This function wait the Alarm event + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_wait_alarm(void); + +/*! + * This function is used to un/subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * @param sub define if Un/subscribe event. + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_event(t_rtc_int event, void *callback, bool sub); + +/*! + * This function is used to subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_event_sub(t_rtc_int event, void *callback); + +/*! + * This function is used to un-subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns PMIC_STATUS if successful. + */ +PMIC_STATUS pmic_rtc_event_unsub(t_rtc_int event, void *callback); + +/*! + * This function is used to tell if PMIC RTC has been correctly loaded. + * + * @return This function returns 1 if RTC was successfully loaded + * 0 otherwise. + */ +int pmic_rtc_loaded(void); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_PMIC_RTC_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_adc.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_adc.h @@ -0,0 +1,455 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef __ASM_ARCH_MXC_PMIC_ADC_H__ +#define __ASM_ARCH_MXC_PMIC_ADC_H__ + +/*! + * @defgroup PMIC_ADC PMIC Digitizer Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_adc.h + * @brief This is the header of PMIC ADC driver. + * + * @ingroup PMIC_ADC + */ + +#include +#include +#include + +/*! + * @name IOCTL user space interface + */ + +/*! @{ */ +/*! + * Initialize ADC. + * Argument type: none. + */ +#define PMIC_ADC_INIT _IO('p', 0xb0) +/*! + * De-initialize ADC. + * Argument type: none. + */ +#define PMIC_ADC_DEINIT _IO('p', 0xb1) +/*! + * Convert one channel. + * Argument type: pointer to t_adc_convert_param. + */ +#define PMIC_ADC_CONVERT _IOWR('p', 0xb2, int) +/*! + * Convert one channel eight samples. + * Argument type: pointer to t_adc_convert_param. + */ +#define PMIC_ADC_CONVERT_8X _IOWR('p', 0xb3, int) +/*! + * Convert multiple channels. + * Argument type: pointer to t_adc_convert_param. + */ +#define PMIC_ADC_CONVERT_MULTICHANNEL _IOWR('p', 0xb4, int) +/*! + * Set touch screen operation mode. + * Argument type: t_touch_mode. + */ +#define PMIC_ADC_SET_TOUCH_MODE _IOW('p', 0xb5, int) +/*! + * Get touch screen operation mode. + * Argument type: pointer to t_touch_mode. + */ +#define PMIC_ADC_GET_TOUCH_MODE _IOR('p', 0xb6, int) +/*! + * Get touch screen sample. + * Argument type: pointer to t_touch_sample. + */ +#define PMIC_ADC_GET_TOUCH_SAMPLE _IOWR('p', 0xb7, int) +/*! + * Get battery current. + * Argument type: pointer to unsigned short. + */ +#define PMIC_ADC_GET_BATTERY_CURRENT _IOR('p', 0xb8, int) +/*! + * Activate comparator. + * Argument type: pointer to t_adc_comp_param. + */ +#define PMIC_ADC_ACTIVATE_COMPARATOR _IOW('p', 0xb9, int) +/*! + * De-active comparator. + * Argument type: none. + */ +#define PMIC_ADC_DEACTIVE_COMPARATOR _IOW('p', 0xba, int) + +/*! + * Install touch screen read interface. + */ +#define TOUCH_SCREEN_READ_INSTALL _IOWR('D',4, int) +/*! + * Remove touch screen read interface. + */ +#define TOUCH_SCREEN_READ_UNINSTALL _IOWR('D',5, int) + +/*! @{ */ +/*! + * @name Touch Screen minimum and maximum values + */ +#define TS_X_MIN 80 /*! < Minimum X */ +#define TS_Y_MIN 80 /*! < Minimum Y */ + +#define TS_X_MAX 1000 /*! < Maximum X */ +#define TS_Y_MAX 1000 /*! < Maximum Y */ +/*! @} */ +/*! + * This enumeration defines input channels for PMIC ADC + */ + +typedef enum { + BATTERY_VOLTAGE, + BATTERY_CURRENT, + CHARGE_VOLTAGE, + CHARGE_CURRENT, + APPLICATION_SUPPLY, + TS_X_POS1, + TS_X_POS2, + TS_Y_POS1, + TS_Y_POS2, + GEN_PURPOSE_AD4, + GEN_PURPOSE_AD5, + GEN_PURPOSE_AD6, + GEN_PURPOSE_AD7, + GEN_PURPOSE_AD8, + GEN_PURPOSE_AD9, + GEN_PURPOSE_AD10, + GEN_PURPOSE_AD11, + USB_ID, + LICELL, + RAWEXTBPLUSSENSE, + MPBSENSE, + BATSENSE, + GND, + THERMISTOR, + DIE_TEMP +} t_channel; + +/*! + * This enumeration defines reason of ADC Comparator interrupt. + */ +typedef enum { + /*! + * Greater than WHIGH + */ + GTWHIGH, + /*! + * Less than WLOW + */ + LTWLOW, +} t_comp_exception; + +/*! + * ADC comparator callback function type + */ +typedef void (*t_comparator_cb) (t_comp_exception reason); + +/*! + * This enumeration defines the touch screen operation modes. + */ +typedef enum { + /*! + * Touch Screen X position + */ + TS_X_POSITION = 0, + /*! + * Touch Screen Y position + */ + TS_Y_POSITION = 1, + /*! + * Pressure + */ + TS_PRESSURE = 2, + /*! + * Plate X + */ + TS_PLATE_X = 3, + /*! + * Plate Y + */ + TS_PLATE_Y = 4, + /*! + * Standby + */ + TS_STANDBY = 5, + /*! + * No touch screen, TSX1, TSX2, TSY1 and TSY2 are used as general + * purpose A/D inputs. + */ + TS_NONE = 6, +} t_touch_mode; +/*! + * This structure is used to report touch screen value. + */ +typedef struct { +/*! + * Touch Screen X position + */ + unsigned int x_position; + /*! + * Touch Screen X position1 + */ + unsigned int x_position1; + /*! + * Touch Screen X position2 + */ + unsigned int x_position2; + /*! + * Touch Screen X position3 + */ + unsigned int x_position3; + /*! + * Touch Screen Y position + */ + unsigned int y_position; + /*! + * Touch Screen Y position1 + */ + unsigned int y_position1; + /*! + * Touch Screen Y position2 + */ + unsigned int y_position2; + /*! + * Touch Screen Y position3 + */ + unsigned int y_position3; + /*! + * Touch Screen contact value + */ + unsigned int contact_resistance; +} t_touch_screen; + +/*! + * This enumeration defines ADC conversion modes. + */ +typedef enum { + /*! + * Sample 8 channels, 1 sample per channel + */ + ADC_8CHAN_1X = 0, + /*! + * Sample 1 channel 8 times + */ + ADC_1CHAN_8X, +} t_conversion_mode; + +/*! + * This structure is used with IOCTL code \a PMIC_ADC_CONVERT, + * \a PMIC_ADC_CONVERT_8X and \a PMIC_ADC_CONVERT_MULTICHANNEL. + */ + +typedef struct { + /*! + * channel or channels to be sampled. + */ + t_channel channel; + /*! + * holds up to 16 sampling results + */ + unsigned short result[16]; +} t_adc_convert_param; + +/*! + * This structure is used to activate/deactivate ADC comparator. + */ +typedef struct { + /*! + * wlow. + */ + unsigned char wlow; + /*! + * whigh. + */ + unsigned char whigh; + /*! + * channel to monitor + */ + t_channel channel; + /*! + * callback function. + */ + t_comparator_cb callback; +} t_adc_comp_param; + +/* EXPORTED FUNCTIONS */ + +#ifdef __KERNEL__ +/*! + * This function initializes all ADC registers with default values. This + * function also registers the interrupt events. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_init(void); + +/*! + * This function disables the ADC, de-registers the interrupt events. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_deinit(void); + +/*! + * This function triggers a conversion and returns one sampling result of one + * channel. + * + * @param channel The channel to be sampled + * @param result The pointer to the conversion result. The memory + * should be allocated by the caller of this function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_adc_convert(t_channel channel, unsigned short *result); + +/*! + * This function triggers a conversion and returns eight sampling results of + * one channel. + * + * @param channel The channel to be sampled + * @param result The pointer to array to store eight sampling results. + * The memory should be allocated by the caller of this + * function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_adc_convert_8x(t_channel channel, unsigned short *result); + +/*! + * This function triggers a conversion and returns sampling results of each + * specified channel. + * + * @param channels This input parameter is bitmap to specify channels + * to be sampled. + * @param result The pointer to array to store sampling result. + * The order of the result in the array is from lowest + * channel number to highest channel number of the + * sampled channels. + * The memory should be allocated by the caller of this + * function. + * Note that the behavior of this function might differ + * from one platform to another regarding especially + * channels order. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_adc_convert_multichnnel(t_channel channels, + unsigned short *result); + +/*! + * This function sets touch screen operation mode. + * + * @param touch_mode Touch screen operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_set_touch_mode(t_touch_mode touch_mode); + +/*! + * This function retrieves the current touch screen operation mode. + * + * @param touch_mode Pointer to the retrieved touch screen operation + * mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_touch_mode(t_touch_mode * touch_mode); + +/*! + * This function retrieves the current touch screen operation mode. + * + * @param touch_sample Pointer to touch sample. + * @param wait Indicates if this function needs to block or not. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_touch_sample(t_touch_screen * ts_value, int wait); + +/*! + * This function starts a Battery Current mode conversion. + * + * @param mode Conversion mode. + * @param result Battery Current measurement result. + * if \a mode = ADC_8CHAN_1X, the result is \n + * result[0] = (BATTP - BATT_I) \n + * if \a mode = ADC_1CHAN_8X, the result is \n + * result[0] = BATTP \n + * result[1] = BATT_I \n + * result[2] = BATTP \n + * result[3] = BATT_I \n + * result[4] = BATTP \n + * result[5] = BATT_I \n + * result[6] = BATTP \n + * result[7] = BATT_I + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_battery_current(t_conversion_mode mode, + unsigned short *result); + +/*! + * This function actives the comparator. When comparator is activated and ADC + * is enabled, the 8th converted value will be digitally compared against the + * window defined by WLOW and WHIGH registers. + * + * @param low Comparison window low threshold (WLOW). + * @param high Comparison window high threshold (WHIGH). + * @param callback Callback function to be called when the converted + * value is beyond the comparison window. The callback + * function will pass a parameter of type + * \b t_comp_expection to indicate the reason of + * comparator exception. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_adc_active_comparator(unsigned char low, + unsigned char high, + t_channel channel, + t_comparator_cb callback); + +/*! + * This function de-actives the comparator. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_deactive_comparator(void); + +/*! + * This function enables the touch screen read interface. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_adc_install_ts(void); + +/*! + * This function disables the touch screen read interface. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_adc_remove_ts(void); + +int is_pmic_adc_ready(void); + +#endif /* _KERNEL */ +#endif /* __ASM_ARCH_MXC_PMIC_ADC_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/quota.h +++ linux-fsl-imx51-2.6.31/include/linux/quota.h @@ -313,8 +313,9 @@ int (*claim_space) (struct inode *, qsize_t); /* release rsved quota for delayed alloc */ void (*release_rsv) (struct inode *, qsize_t); - /* get reserved quota for delayed alloc */ - qsize_t (*get_reserved_space) (struct inode *); + /* get reserved quota for delayed alloc, value returned is managed by + * quota code only */ + qsize_t *(*get_reserved_space) (struct inode *); }; /* Operations handling requests from userspace */ --- linux-fsl-imx51-2.6.31.orig/include/linux/security.h +++ linux-fsl-imx51-2.6.31/include/linux/security.h @@ -76,7 +76,7 @@ extern int cap_task_setscheduler(struct task_struct *p, int policy, struct sched_param *lp); extern int cap_task_setioprio(struct task_struct *p, int ioprio); extern int cap_task_setnice(struct task_struct *p, int nice); -extern int cap_syslog(int type); +extern int cap_syslog(int type, bool from_file); extern int cap_vm_enough_memory(struct mm_struct *mm, long pages); struct msghdr; @@ -1293,6 +1293,7 @@ * logging to the console. * See the syslog(2) manual page for an explanation of the @type values. * @type contains the type of action. + * @from_file indicates the context of action (if it came from /proc). * Return 0 if permission is granted. * @settime: * Check permission to change the system time. @@ -1372,7 +1373,7 @@ int (*sysctl) (struct ctl_table *table, int op); int (*quotactl) (int cmds, int type, int id, struct super_block *sb); int (*quota_on) (struct dentry *dentry); - int (*syslog) (int type); + int (*syslog) (int type, bool from_file); int (*settime) (struct timespec *ts, struct timezone *tz); int (*vm_enough_memory) (struct mm_struct *mm, long pages); @@ -1654,7 +1655,7 @@ int security_sysctl(struct ctl_table *table, int op); int security_quotactl(int cmds, int type, int id, struct super_block *sb); int security_quota_on(struct dentry *dentry); -int security_syslog(int type); +int security_syslog(int type, bool from_file); int security_settime(struct timespec *ts, struct timezone *tz); int security_vm_enough_memory(long pages); int security_vm_enough_memory_mm(struct mm_struct *mm, long pages); @@ -1894,9 +1895,9 @@ return 0; } -static inline int security_syslog(int type) +static inline int security_syslog(int type, bool from_file) { - return cap_syslog(type); + return cap_syslog(type, from_file); } static inline int security_settime(struct timespec *ts, struct timezone *tz) --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_scc2_driver.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_scc2_driver.h @@ -0,0 +1,975 @@ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef SCC_DRIVER_H +#define SCC_DRIVER_H + +/* + * NAMING CONVENTIONS + * ================== + * (A note to maintainers and other interested parties) + * + * Use scc_ or SCC_ prefix for 'high-level' interface routines and the types + * passed to those routines. Try to avoid #defines in these interfaces. + * + * Use SMN_ or SCM_ prefix for the #defines used with scc_read_register() and + * scc_write_register, or values passed/retrieved from those routines. + */ + +/*! @file mxc_scc2_driver.h + * + * @brief (Header file to use the SCC2 driver.) + * + * The SCC2 driver is available to other kernel modules directly. Secure + * Partition functionality is extended to users through the SHW API. Other + * functionality of the SCC2 is limited to kernel-space users. + * + * With the exception of #scc_monitor_security_failure(), all routines are + * 'synchronous', i.e. they will not return to their caller until the requested + * action is complete, or fails to complete. Some of these functions could + * take quite a while to perform, depending upon the request. + * + * Routines are provided to: + * @li trigger a security-violation alarm - #scc_set_sw_alarm() + * @li get configuration and version information - #scc_get_configuration() + * @li zeroize memory - #scc_zeroize_memories() + * @li Work with secure partitions: #scc_allocate_partition() + * #scc_engage_partition() #scc_diminish_permissions() + * #scc_release_partition() + * @li Encrypt or decrypt regions of data: #scc_encrypt_region() + * #scc_decrypt_region() + * @li monitor the Security Failure alarm - #scc_monitor_security_failure() + * @li stop monitoring Security Failure alarm - + * #scc_stop_monitoring_security_failure() + * @li write registers of the SCC - #scc_write_register() + * @li read registers of the SCC - #scc_read_register() + * + * The SCC2 encrypts and decrypts using Triple DES with an internally stored + * key. When the SCC2 is in Secure mode, it uses its secret, unique-per-chip + * key. When it is in Non-Secure mode, it uses a default key. This ensures + * that secrets stay secret if the SCC2 is not in Secure mode. + * + * Not all functions that could be provided in a 'high level' manner have been + * implemented. Among the missing are interfaces to the ASC/AIC components and + * the timer functions. These and other features must be accessed through + * #scc_read_register() and #scc_write_register(), using the @c \#define values + * provided. + * + * Here is a glossary of acronyms used in the SCC2 driver documentation: + * - CBC - Cipher Block Chaining. A method of performing a block cipher. + * Each block is encrypted using some part of the result of the previous + * block's encryption. It needs an 'initialization vector' to seed the + * operation. + * - ECB - Electronic Code Book. A method of performing a block cipher. + * With a given key, a given block will always encrypt to the same value. + * - DES - Data Encryption Standard. (8-byte) Block cipher algorithm which + * uses 56-bit keys. In SCC2, this key is constant and unique to the device. + * SCC uses the "triple DES" form of this algorithm. + * - AIC - Algorithm Integrity Checker. + * - ASC - Algorithm Sequence Checker. + * - SMN - Security Monitor. The part of the SCC2 responsible for monitoring + * for security problems and notifying the CPU and other PISA components. + * - SCM - Secure Memory. The part of the SCC2 which handles the cryptography. + * - SCC - Security Controller. Central security mechanism for PISA. + * - PISA - Platform-Independent Security Architecture. + */ + +/* Temporarily define compile-time flags to make Doxygen happy. */ +#ifdef DOXYGEN_HACK +/** @defgroup scccompileflags SCC Driver compile-time flags + * + * These preprocessor flags should be set, if desired, in a makefile so + * that they show up on the compiler command line. + */ +/** @addtogroup scccompileflags */ + +/** @{ */ +/** + * Compile-time flag to change @ref smnregs and @ref scmregs + * offset values for the SCC's implementation on the MX.21 board. + * + * This must also be set properly for any code which calls the + * scc_read_register() or scc_write_register() functions or references the + * register offsets. + */ +#define TAHITI +/** @} */ +#undef TAHITI + +#endif /* DOXYGEN_HACK */ + +/*! Major Version of the driver. Used for + scc_configuration->driver_major_version */ +#define SCC_DRIVER_MAJOR_VERSION 2 +/*! Old Minor Version of the driver. */ +#define SCC_DRIVER_MINOR_VERSION_0 0 +/*! Minor Version of the driver. Used for + scc_configuration->driver_minor_version */ +#define SCC_DRIVER_MINOR_VERSION_2 2 + + +/*! + * Interrupt line number of SCM interrupt. + */ +#define INT_SCC_SCM MXC_INT_SCC_SCM + +/*! + * Interrupt line number of the SMN interrupt. + */ +#define INT_SCC_SMN MXC_INT_SCC_SMN + +/** + * @typedef scc_return_t + */ +/** Common status return values from SCC driver functions. */ + typedef enum scc_return_t { + SCC_RET_OK = 0, /**< Function succeeded */ + SCC_RET_FAIL, /**< Non-specific failure */ + SCC_RET_VERIFICATION_FAILED, + /**< Decrypt validation failed */ + SCC_RET_TOO_MANY_FUNCTIONS, + /**< At maximum registered functions */ + SCC_RET_BUSY, /**< SCC is busy and cannot handle request */ + /**< Encryption or decryption failed because@c count_out_bytes + says that @c data_out is too small to hold the value. */ + SCC_RET_INSUFFICIENT_SPACE, + } scc_return_t; + +/** + * @typedef scc_partition_status_t + */ +/** Partition status information. */ + typedef enum scc_partition_status_t { + SCC_PART_S_UNUSABLE, + /**< Partition not implemented */ + SCC_PART_S_UNAVAILABLE, + /**< Partition owned by other host */ + SCC_PART_S_AVAILABLE, + /**< Partition available */ + SCC_PART_S_ALLOCATED, + /**< Partition owned by host but not engaged*/ + SCC_PART_S_ENGAGED, + /**< Partition owned by host and engaged */ + } scc_partition_status_t; + +/** + * Configuration information about SCC and the driver. + * + * This struct/typedef contains information from the SCC and the driver to + * allow the user of the driver to determine the size of the SCC's memories and + * the version of the SCC and the driver. + */ + typedef struct scc_config_t { + int driver_major_version; + /**< Major version of the SCC driver code */ + int driver_minor_version; + /**< Minor version of the SCC driver code */ + int scm_version; /**< Version from SCM Configuration register */ + int smn_version; /**< Version from SMN Status register */ + /**< Number of bytes per block of RAM; also + block size of the crypto algorithm. */ + int block_size_bytes; + int partition_size_bytes; + /**< Number of bytes in each partition */ + int partition_count; + /**< Number of partitions on this platform */ + } scc_config_t; + +/** + * @typedef scc_enc_dec_t + */ +/** + * Determine whether SCC will run its cryptographic + * function as an encryption or decryption. + */ + typedef enum scc_enc_dec_t { + SCC_ENCRYPT, /**< Encrypt (from Red to Black) */ + SCC_DECRYPT /**< Decrypt (from Black to Red) */ + } scc_enc_dec_t; + +/** + * @typedef scc_verify_t + */ +/** + * Tell the driver whether it is responsible for verifying the integrity of a + * secret. During an encryption, using other than #SCC_VERIFY_MODE_NONE will + * cause a check value to be generated and appended to the plaintext before + * encryption. During decryption, the check value will be verified after + * decryption, and then stripped from the message. + */ + typedef enum scc_verify_t { + /** No verification value added or checked. Input plaintext data must be + * be a multiple of the blocksize (#scc_get_configuration()). */ + SCC_VERIFY_MODE_NONE, + /** Driver will generate/validate a 2-byte CCITT CRC. Input plaintext + will be padded to a multiple of the blocksize, adding 3-10 bytes + to the resulting output ciphertext. Upon decryption, this padding + will be stripped, and the CRC will be verified. */ + SCC_VERIFY_MODE_CCITT_CRC + } scc_verify_t; + +/** + * @typedef scc_cypher_mode_t + */ +/** + * Select the cypher mode to use for partition cover/uncover operations. + */ + + typedef enum scc_cypher_mode_t { + SCC_CYPHER_MODE_ECB = 1, + /**< ECB mode */ + SCC_CYPHER_MODE_CBC = 2, + /**< CBC mode */ + } scc_cypher_mode_t; + +/** + * Allocate a partition of secure memory + * + * @param smid_value Value to use for the SMID register. Must be 0 for + * kernel mode ownership. + * @param[out] part_no (If successful) Assigned partition number. + * @param[out] part_base Kernel virtual address of the partition. + * @param[out] part_phys Physical address of the partition. + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t + scc_allocate_partition(uint32_t smid_value, + int *part_no, + void **part_base, uint32_t *part_phys); + +/* Note: This function has to be run in the same context (userspace or kernel + * mode) as the process that will be using the partition. Because the SCC2 API + * is not accessible in user mode, this function is also provided as a macro in + * in fsl_shw.h. Kernel-mode users that include this file are able to use this + * version of the function without having to include the whole SHW API. If the + * macro definition was defined before we got here, un-define it so this + * version will be used instead. + */ + +#ifdef scc_engage_partition +#undef scc_engage_partition +#endif + +/** + * Engage partition of secure memory + * + * @param part_base (kernel) Virtual + * @param UMID NULL, or 16-byte UMID for partition security + * @param permissions ORed values of the type SCM_PERM_* which will be used as + * initial partition permissions. SHW API users should use + * the FSL_PERM_* definitions instead. + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t + scc_engage_partition(void *part_base, + const uint8_t *UMID, uint32_t permissions); + +/** + * Release a partition of secure memory + * + * @param part_base Kernel virtual address of the partition to be released. + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t scc_release_partition(void *part_base); + +/** + * Diminish the permissions on a partition of secure memory + * + * @param part_base Kernel virtual address of the partition. + * + * @param permissions ORed values of the type SCM_PERM_* which will be used as + * initial partition permissions. SHW API users should use + * the FSL_PERM_* definitions instead. + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t + scc_diminish_permissions(void *part_base, uint32_t permissions); + +/** + * Query the status of a partition of secure memory + * + * @param part_base Kernel virtual address of the partition. + * + * @return SCC_RET_OK if successful. + */ + extern scc_partition_status_t scc_partition_status(void *part_base); + +/** + * Calculate the physical address from the kernel virtual address. + */ + extern uint32_t scc_virt_to_phys(void *address); +/*scc_return_t +scc_verify_slot_access(uint64_t owner_id, uint32_t slot, uint32_t access_len);*/ + + +/** + * Encrypt a region of secure memory. + * + * @param part_base Kernel virtual address of the partition. + * @param offset_bytes Offset from the start of the partition to the plaintext + * data. + * @param byte_count Length of the region (octets). + * @param black_data Physical location to store the encrypted data. + * @param IV Value to use for the Initialization Vector. + * @param cypher_mode Cyphering mode to use, specified by type + * #scc_cypher_mode_t + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t + scc_encrypt_region(uint32_t part_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t *black_data, + uint32_t *IV, scc_cypher_mode_t cypher_mode); + +/** + * Decrypt a region into secure memory + * + * @param part_base Kernel virtual address of the partition. + * @param offset_bytes Offset from the start of the partition to store the + * plaintext data. + * @param byte_count Length of the region (octets). + * @param black_data Physical location of the encrypted data. + * @param IV Value to use for the Initialization Vector. + * @param cypher_mode Cyphering mode to use, specified by type + * #scc_cypher_mode_t + * + * @return SCC_RET_OK if successful. + */ + extern scc_return_t + scc_decrypt_region(uint32_t part_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t *black_data, + uint32_t *IV, scc_cypher_mode_t cypher_mode); + +/** + * Retrieve configuration information from the SCC. + * + * This function always succeeds. + * + * @return A pointer to the configuration information. This is a pointer to + * static memory and must not be freed. The values never change, and + * the return value will never be null. + */ + extern scc_config_t *scc_get_configuration(void); + +/** + * Zeroize Red and Black memories of the SCC. This will start the Zeroizing + * process. The routine will return when the memories have zeroized or failed + * to do so. The driver will poll waiting for this to occur, so this + * routine must not be called from interrupt level. Some future version of + * driver may elect instead to sleep. + * + * @return 0 or error if initialization fails. + */ + extern scc_return_t scc_zeroize_memories(void); + +/** + * Signal a software alarm to the SCC. This will take the SCC and other PISA + * parts out of Secure mode and into Security Failure mode. The SCC will stay + * in failed mode until a reboot. + * + * @internal + * If the SCC is not already in fail state, simply write the + * #SMN_COMMAND_SET_SOFTWARE_ALARM bit in #SMN_COMMAND_REG. Since there is no + * reason to wait for the interrupt to bounce back, simply act as though + * one did. + */ + extern void scc_set_sw_alarm(void); + +/** + * This routine will register a function to be called should a Security Failure + * be signalled by the SCC (Security Monitor). + * + * The callback function may be called from interrupt level, it may be called + * from some process' task. It should therefore not take a long time to + * perform its operation, and it may not sleep. + * + * @param callback_func Function pointer to routine which will receive + * notification of the security failure. + * @return 0 if function was successfully registered, non-zero on + * failure. See #scc_return_t. + * + * @internal + * There is a fixed global static array which keeps track of the requests to + * monitor the failure. + * + * Add @c callback_func to the first empty slot in #scc_callbacks[]. If there + * is no room, return #SCC_RET_TOO_MANY_FUNCTIONS. + */ + extern scc_return_t scc_monitor_security_failure(void + callback_func(void)); + +/** + * This routine will deregister a function previously registered with + * #scc_monitor_security_failure(). + * + * @param callback_func Function pointer to routine previously registered with + * #scc_stop_monitoring_security_failure(). + */ + extern void scc_stop_monitoring_security_failure(void + callback_func(void)); + +/** + * Read value from an SCC register. + * The offset will be checked for validity (range) as well as whether it is + * accessible (e.g. not busy, not in failed state) at the time of the call. + * + * @param[in] register_offset The (byte) offset within the SCC block + * of the register to be queried. See + * @ref scmregs and @ref smnregs. + * @param[out] value Pointer to where value from the register + * should be placed. + * @return 0 if OK, non-zero on error. See #scc_return_t. + * + * @internal + * Verify that the register_offset is a) valid, b) refers to a readable + * register, and c) the SCC is in a state which would allow a read of this + * register. + */ + extern scc_return_t scc_read_register(int register_offset, + uint32_t * value); + +/** + * Write a new value into an SCC register. + * The offset will be checked for validity (range) as well as whether it is + * accessible (e.g. not busy, not in failed state) at the time of the call. + * + * @param[in] register_offset The (byte) offset within the SCC block + * of the register to be modified. See + * @ref scmregs and @ref smnregs + * @param[in] value The value to store into the register. + * @return 0 if OK, non-zero on error. See #scc_return_t. + * + * @internal + * Verify that the register_offset is a) valid, b) refers to a writeable + * register, and c) the SCC is in a state which would allow a write to this + * register. + */ + extern scc_return_t scc_write_register(int register_offset, + uint32_t value); + +/** + * @defgroup scmregs SCM Registers + * + * These values are offsets into the SCC for the Secure Memory + * (SCM) registers. They are used in the @c register_offset parameter of + * #scc_read_register() and #scc_write_register(). + */ +/** @addtogroup scmregs */ +/** @{ */ +/** Offset of SCM Version ID Register */ +#define SCM_VERSION_REG 0x000 +/** Offset of SCM Interrupt Control Register */ +#define SCM_INT_CTL_REG 0x008 +/** Offset of SCM Status Register */ +#define SCM_STATUS_REG 0x00c +/** Offset of SCM Error Status Register */ +#define SCM_ERR_STATUS_REG 0x010 +/** Offset of SCM Fault Address Register */ +#define SCM_FAULT_ADR_REG 0x014 +/** Offset of SCM Partition Owners Register */ +#define SCM_PART_OWNERS_REG 0x018 +/** Offset of SCM Partitions Engaged Register */ +#define SCM_PART_ENGAGED_REG 0x01c +/** Offset of SCM Unique Number 0 Register */ +#define SCM_UNIQUE_ID0_REG 0x020 +/** Offset of SCM Unique Number 1 Register */ +#define SCM_UNIQUE_ID1_REG 0x024 +/** Offset of SCM Unique Number 2 Register */ +#define SCM_UNIQUE_ID2_REG 0x028 +/** Offset of SCM Unique Number 3 Register */ +#define SCM_UNIQUE_ID3_REG 0x02c +/** Offset of SCM Zeroize Command Register */ +#define SCM_ZCMD_REG 0x050 +/** Offset of SCM Cipher Command Register */ +#define SCM_CCMD_REG 0x054 +/** Offset of SCM Cipher Black RAM Start Address Register */ +#define SCM_C_BLACK_ST_REG 0x058 +/** Offset of SCM Internal Debug Register */ +#define SCM_DBG_STATUS_REG 0x05c +/** Offset of SCM Cipher IV 0 Register */ +#define SCM_AES_CBC_IV0_REG 0x060 +/** Offset of SCM Cipher IV 1 Register */ +#define SCM_AES_CBC_IV1_REG 0x064 +/** Offset of SCM Cipher IV 2 Register */ +#define SCM_AES_CBC_IV2_REG 0x068 +/** Offset of SCM Cipher IV 3 Register */ +#define SCM_AES_CBC_IV3_REG 0x06c +/** Offset of SCM SMID Partition 0 Register */ +#define SCM_SMID0_REG 0x080 +/** Offset of SCM Partition 0 Access Permissions Register */ +#define SCM_ACC0_REG 0x084 +/** Offset of SCM SMID Partition 1 Register */ +#define SCM_SMID1_REG 0x088 +/** Offset of SCM Partition 1 Access Permissions Register */ +#define SCM_ACC1_REG 0x08c +/** Offset of SCM SMID Partition 2 Register */ +#define SCM_SMID2_REG 0x090 +/** Offset of SCM Partition 2 Access Permissions Register */ +#define SCM_ACC2_REG 0x094 +/** Offset of SCM SMID Partition 3 Register */ +#define SCM_SMID3_REG 0x098 +/** Offset of SCM Partition 3 Access Permissions Register */ +#define SCM_ACC3_REG 0x09c +/** Offset of SCM SMID Partition 4 Register */ +#define SCM_SMID4_REG 0x0a0 +/** Offset of SCM Partition 4 Access Permissions Register */ +#define SCM_ACC4_REG 0x0a4 +/** Offset of SCM SMID Partition 5 Register */ +#define SCM_SMID5_REG 0x0a8 +/** Offset of SCM Partition 5 Access Permissions Register */ +#define SCM_ACC5_REG 0x0ac +/** Offset of SCM SMID Partition 6 Register */ +#define SCM_SMID6_REG 0x0b0 +/** Offset of SCM Partition 6 Access Permissions Register */ +#define SCM_ACC6_REG 0x0b4 +/** Offset of SCM SMID Partition 7 Register */ +#define SCM_SMID7_REG 0x0b8 +/** Offset of SCM Partition 7 Access Permissions Register */ +#define SCM_ACC7_REG 0x0bc +/** Offset of SCM SMID Partition 8 Register */ +#define SCM_SMID8_REG 0x0c0 +/** Offset of SCM Partition 8 Access Permissions Register */ +#define SCM_ACC8_REG 0x0c4 +/** Offset of SCM SMID Partition 9 Register */ +#define SCM_SMID9_REG 0x0c8 +/** Offset of SCM Partition 9 Access Permissions Register */ +#define SCM_ACC9_REG 0x0cc +/** Offset of SCM SMID Partition 10 Register */ +#define SCM_SMID10_REG 0x0d0 +/** Offset of SCM Partition 10 Access Permissions Register */ +#define SCM_ACC10_REG 0x0d4 +/** Offset of SCM SMID Partition 11 Register */ +#define SCM_SMID11_REG 0x0d8 +/** Offset of SCM Partition 11 Access Permissions Register */ +#define SCM_ACC11_REG 0x0dc +/** Offset of SCM SMID Partition 12 Register */ +#define SCM_SMID12_REG 0x0e0 +/** Offset of SCM Partition 12 Access Permissions Register */ +#define SCM_ACC12_REG 0x0e4 +/** Offset of SCM SMID Partition 13 Register */ +#define SCM_SMID13_REG 0x0e8 +/** Offset of SCM Partition 13 Access Permissions Register */ +#define SCM_ACC13_REG 0x0ec +/** Offset of SCM SMID Partition 14 Register */ +#define SCM_SMID14_REG 0x0f0 +/** Offset of SCM Partition 14 Access Permissions Register */ +#define SCM_ACC14_REG 0x0f4 +/** Offset of SCM SMID Partition 15 Register */ +#define SCM_SMID15_REG 0x0f8 +/** Offset of SCM Partition 15 Access Permissions Register */ +#define SCM_ACC15_REG 0x0fc +/** @} */ + +/** Number of bytes of register space for the SCM. */ +#define SCM_REG_BANK_SIZE 0x100 + +/** Number of bytes of register space for the SCM. */ +#define SCM_REG_BANK_SIZE 0x100 + +/** Offset of the SMN registers */ +#define SMN_ADDR_OFFSET 0x100 + +/** + * @defgroup smnregs SMN Registers + * + * These values are offsets into the SCC for the Security Monitor + * (SMN) registers. They are used in the @c register_offset parameter of the + * #scc_read_register() and #scc_write_register(). + */ +/** @addtogroup smnregs */ +/** @{ */ +/** Offset of SMN Status Register */ +#define SMN_STATUS_REG (SMN_ADDR_OFFSET+0x00000000) +/** Offset of SMH Command Register */ +#define SMN_COMMAND_REG (SMN_ADDR_OFFSET+0x00000004) +/** Offset of SMH Sequence Start Register */ +#define SMN_SEQ_START_REG (SMN_ADDR_OFFSET+0x00000008) +/** Offset of SMH Sequence End Register */ +#define SMN_SEQ_END_REG (SMN_ADDR_OFFSET+0x0000000c) +/** Offset of SMH Sequence Check Register */ +#define SMN_SEQ_CHECK_REG (SMN_ADDR_OFFSET+0x00000010) +/** Offset of SMH BitBank Count Register */ +#define SMN_BB_CNT_REG (SMN_ADDR_OFFSET+0x00000014) +/** Offset of SMH BitBank Increment Register */ +#define SMN_BB_INC_REG (SMN_ADDR_OFFSET+0x00000018) +/** Offset of SMH BitBank Decrement Register */ +#define SMN_BB_DEC_REG (SMN_ADDR_OFFSET+0x0000001c) +/** Offset of SMH Compare Register */ +#define SMN_COMPARE_REG (SMN_ADDR_OFFSET+0x00000020) +/** Offset of SMH Plaintext Check Register */ +#define SMN_PT_CHK_REG (SMN_ADDR_OFFSET+0x00000024) +/** Offset of SMH Ciphertext Check Register */ +#define SMN_CT_CHK_REG (SMN_ADDR_OFFSET+0x00000028) +/** Offset of SMH Timer Initial Value Register */ +#define SMN_TIMER_IV_REG (SMN_ADDR_OFFSET+0x0000002c) +/** Offset of SMH Timer Control Register */ +#define SMN_TIMER_CTL_REG (SMN_ADDR_OFFSET+0x00000030) +/** Offset of SMH Security Violation Register */ +#define SMN_SEC_VIO_REG (SMN_ADDR_OFFSET+0x00000034) +/** Offset of SMH Timer Register */ +#define SMN_TIMER_REG (SMN_ADDR_OFFSET+0x00000038) +/** Offset of SMH High-Assurance Control Register */ +#define SMN_HAC_REG (SMN_ADDR_OFFSET+0x0000003c) +/** Number of bytes allocated to the SMN registers */ +#define SMN_REG_BANK_SIZE 0x40 +/** @} */ + +/** Number of bytes of total register space for the SCC. */ +#define SCC_ADDRESS_RANGE (SMN_ADDR_OFFSET + SMN_REG_BANK_SIZE) + +/** + * @defgroup smnstatusregdefs SMN Status Register definitions (SMN_STATUS) + */ +/** @addtogroup smnstatusregdefs */ +/** @{ */ +/** SMN version id. */ +#define SMN_STATUS_VERSION_ID_MASK 0xfc000000 +/** number of bits to shift #SMN_STATUS_VERSION_ID_MASK to get it to LSB */ +#define SMN_STATUS_VERSION_ID_SHIFT 28 +/** Illegal bus master access attempted. */ +#define SMN_STATUS_ILLEGAL_MASTER 0x01000000 +/** Scan mode entered/exited since last reset. */ +#define SMN_STATUS_SCAN_EXIT 0x00800000 +/** Some security peripheral is initializing */ +#define SMN_STATUS_PERIP_INIT 0x00010000 +/** Internal error detected in SMN. */ +#define SMN_STATUS_SMN_ERROR 0x00004000 +/** SMN has an outstanding interrupt. */ +#define SMN_STATUS_SMN_STATUS_IRQ 0x00004000 +/** Software Alarm was triggered. */ +#define SMN_STATUS_SOFTWARE_ALARM 0x00002000 +/** Timer has expired. */ +#define SMN_STATUS_TIMER_ERROR 0x00001000 +/** Plaintext/Ciphertext compare failed. */ +#define SMN_STATUS_PC_ERROR 0x00000800 +/** Bit Bank detected overflow or underflow */ +#define SMN_STATUS_BITBANK_ERROR 0x00000400 +/** Algorithm Sequence Check failed. */ +#define SMN_STATUS_ASC_ERROR 0x00000200 +/** Security Policy Block detected error. */ +#define SMN_STATUS_SECURITY_POLICY_ERROR 0x00000100 +/** Security Violation Active error. */ +#define SMN_STATUS_SEC_VIO_ACTIVE_ERROR 0x00000080 +/** Processor booted from internal ROM. */ +#define SMN_STATUS_INTERNAL_BOOT 0x00000020 +/** SMN's internal state. */ +#define SMN_STATUS_STATE_MASK 0x0000001F +/** Number of bits to shift #SMN_STATUS_STATE_MASK to get it to LSB. */ +#define SMN_STATUS_STATE_SHIFT 0 +/** @} */ + +/** + * @defgroup sccscmstates SMN Model Secure State Controller States (SMN_STATE_MASK) + */ +/** @addtogroup sccscmstates */ +/** @{ */ +/** This is the first state of the SMN after power-on reset */ +#define SMN_STATE_START 0x0 +/** The SMN is zeroizing its RAM during reset */ +#define SMN_STATE_ZEROIZE_RAM 0x5 +/** SMN has passed internal checks, and is waiting for Software check-in */ +#define SMN_STATE_HEALTH_CHECK 0x6 +/** Fatal Security Violation. SMN is locked, SCM is inoperative. */ +#define SMN_STATE_FAIL 0x9 +/** SCC is in secure state. SCM is using secret key. */ +#define SMN_STATE_SECURE 0xA +/** Due to non-fatal error, device is not secure. SCM is using default key. */ +#define SMN_STATE_NON_SECURE 0xC +/** @} */ + +/** @{ */ +/** SCM Status bit: Key Status is Default Key in Use */ +#define SCM_STATUS_KST_DEFAULT_KEY 0x80000000 +/** SCM Status bit: Key Status is (reserved) */ +#define SCM_STATUS_KST_RESERVED1 0x40000000 +/** SCM Status bit: Key status is Wrong Key */ +#define SCM_STATUS_KST_WRONG_KEY 0x20000000 +/** SCM Status bit: Bad Key detected */ +#define SCM_STATUS_KST_BAD_KEY 0x10000000 +/** SCM Status bit: Error has occurred */ +#define SCM_STATUS_ERR 0x00008000 +/** SCM Status bit: Monitor State is Failed */ +#define SCM_STATUS_MSS_FAIL 0x00004000 +/** SCM Status bit: Monitor State is Secure */ +#define SCM_STATUS_MSS_SEC 0x00002000 +/** SCM Status bit: Secure Storage is Failed */ +#define SCM_STATUS_RSS_FAIL 0x00000400 +/** SCM Status bit: Secure Storage is Secure */ +#define SCM_STATUS_RSS_SEC 0x00000200 +/** SCM Status bit: Secure Storage is Initializing */ +#define SCM_STATUS_RSS_INIT 0x00000100 +/** SCM Status bit: Unique Number Valid */ +#define SCM_STATUS_UNV 0x00000080 +/** SCM Status bit: Big Endian mode */ +#define SCM_STATUS_BIG 0x00000040 +/** SCM Status bit: Using Secret Key */ +#define SCM_STATUS_USK 0x00000020 +/** SCM Status bit: Ram is being blocked */ +#define SCM_STATUS_BAR 0x00000010 +/** Bit mask of SRS */ +#define SCM_STATUS_SRS_MASK 0x0000000F +/** Number of bits to shift SRS to/from MSb */ +#define SCM_STATUS_SRS_SHIFT 0 +/** @} */ + +#define SCM_STATUS_SRS_RESET 0x0 /**< Reset, Zeroise All */ +#define SCM_STATUS_SRS_READY 0x1 /**< All Ready */ +#define SCM_STATUS_SRS_ZBUSY 0x2 /**< Zeroize Busy (Partition Only) */ +#define SCM_STATUS_SRS_CBUSY 0x3 /**< Cipher Busy */ +#define SCM_STATUS_SRS_ABUSY 0x4 /**< All Busy */ +#define SCM_STATUS_SRS_ZDONE 0x5 /**< Zeroize Done, Cipher Ready */ +#define SCM_STATUS_SRS_CDONE 0x6 /**< Cipher Done, Zeroize Ready */ +#define SCM_STATUS_SRS_ZDONE2 0x7 /**< Zeroize Done, Cipher Busy */ +#define SCM_STATUS_SRS_CDONE2 0x8 /**< Cipher Done, Zeroize Busy */ +#define SCM_STATUS_SRS_ADONE 0xD /**< All Done */ +#define SCM_STATUS_SRS_FAIL 0xF /**< Fail State */ + + +/* Format of the SCM VERSION ID REGISTER */ +#define SCM_VER_BPP_MASK 0xFF000000 /**< Bytes Per Partition Mask */ +#define SCM_VER_BPP_SHIFT 24 /**< Bytes Per Partition Shift */ +#define SCM_VER_BPCB_MASK 0x001F0000 /**< Bytes Per Cipher Block Mask */ +#define SCM_VER_BPCB_SHIFT 16 /**< Bytes Per Cipher Block Shift */ +#define SCM_VER_NP_MASK 0x0000F000 /**< Number of Partitions Mask */ +#define SCM_VER_NP_SHIFT 12 /**< Number of Partitions Shift */ +#define SCM_VER_MAJ_MASK 0x00000F00 /**< Major Version Mask */ +#define SCM_VER_MAJ_SHIFT 8 /**< Major Version Shift */ +#define SCM_VER_MIN_MASK 0x000000FF /**< Minor Version Mask */ +#define SCM_VER_MIN_SHIFT 0 /**< Minor Version Shift */ + +/**< SCC Hardware version supported by this driver */ +#define SCM_MAJOR_VERSION_2 2 + +/* Format of the SCM ERROR STATUS REGISTER */ +#define SCM_ERRSTAT_MID_MASK 0x00F00000 /**< Master ID Mask */ +#define SCM_ERRSTAT_MID_SHIFT 20 /**< Master ID Shift */ +#define SCM_ERRSTAT_ILM 0x00080000 /**< Illegal Master */ +#define SCM_ERRSTAT_SUP 0x00008000 /**< Supervisor Access */ +#define SCM_ERRSTAT_ERC_MASK 0x00000F00 /**< Error Code Mask */ +#define SCM_ERRSTAT_ERC_SHIFT 8 /**< Error Code Shift */ +#define SCM_ERRSTAT_SMS_MASK 0x000000F0 /**< Secure Monitor State Mask */ +#define SCM_ERRSTAT_SMS_SHIFT 4 /**< Secure Monitor State Shift */ +#define SCM_ERRSTAT_SRS_MASK 0x0000000F /**< Secure Ram State Mask */ +#define SCM_ERRSTAT_SRS_SHIFT 0 /**< Secure Ram State Shift */ + +/* SCM ERROR STATUS REGISTER ERROR CODES */ +#define SCM_ERCD_UNK_ADDR 0x1 /**< Unknown Address */ +#define SCM_ERCD_UNK_CMD 0x2 /**< Unknown Command */ +#define SCM_ERCD_READ_PERM 0x3 /**< Read Permission Error */ +#define SCM_ERCD_WRITE_PERM 0x4 /**< Write Permission Error */ +#define SCM_ERCD_DMA_ERROR 0x5 /**< DMA Error */ +#define SCM_ERCD_BLK_OVFL 0x6 /**< Encryption Block Length Overflow */ +#define SCM_ERCD_NO_KEY 0x7 /**< Key Not Engaged */ +#define SCM_ERCD_ZRZ_OVFL 0x8 /**< Zeroize Command Queue Overflow */ +#define SCM_ERCD_CPHR_OVFL 0x9 /**< Cipher Command Queue Overflow */ +#define SCM_ERCD_PROC_INTR 0xA /**< Process Interrupted */ +#define SCM_ERCD_WRNG_KEY 0xB /**< Wrong Key */ +#define SCM_ERCD_DEVICE_BUSY 0xC /**< Device Busy */ +#define SCM_ERCD_UNALGN_ADDR 0xD /**< DMA Unaligned Address */ + +/* Format of the CIPHER COMMAND REGISTER */ +#define SCM_CCMD_LENGTH_MASK 0xFFF00000 /**< Cipher Length Mask */ +#define SCM_CCMD_LENGTH_SHIFT 20 /**< Cipher Length Shift */ +#define SCM_CCMD_OFFSET_MASK 0x000FFF00 /**< Block Offset Mask */ +#define SCM_CCMD_OFFSET_SHIFT 8 /**< Block Offset Shift */ +#define SCM_CCMD_PART_MASK 0x000000F0 /**< Partition Number Mask */ +#define SCM_CCMD_PART_SHIFT 4 /**< Partition Number Shift */ +#define SCM_CCMD_CCMD_MASK 0x0000000F /**< Cipher Command Mask */ +#define SCM_CCMD_CCMD_SHIFT 0 /**< Cipher Command Shift */ + +/* Values for SCM_CCMD_CCMD field */ +#define SCM_CCMD_AES_DEC_ECB 1 /**< Decrypt without Chaining (ECB) */ +#define SCM_CCMD_AES_ENC_ECB 3 /**< Encrypt without Chaining (ECB) */ +#define SCM_CCMD_AES_DEC_CBC 5 /**< Decrypt with Chaining (CBC) */ +#define SCM_CCMD_AES_ENC_CBC 7 /**< Encrypt with Chaining (CBC) */ + +#define SCM_CCMD_AES 1 /**< Use AES Mode */ +#define SCM_CCMD_DEC 0 /**< Decrypt */ +#define SCM_CCMD_ENC 2 /**< Encrypt */ +#define SCM_CCMD_ECB 0 /**< Perform operation without chaining (ECB) */ +#define SCM_CCMD_CBC 4 /**< Perform operation with chaining (CBC) */ + +/* Format of the ZEROIZE COMMAND REGISTER */ +#define SCM_ZCMD_PART_MASK 0x000000F0 /**< Target Partition Mask */ +#define SCM_ZCMD_PART_SHIFT 4 /**< Target Partition Shift */ +#define SCM_ZCMD_CCMD_MASK 0x0000000F /**< Zeroize Command Mask */ +#define SCM_ZCMD_CCMD_SHIFT 0 /**< Zeroize Command Shift */ + +/* MASTER ACCESS PERMISSIONS REGISTER */ +/* Note that API users should use the FSL_PERM_ defines instead of these */ +/** SCM Access Permission: Do not zeroize/deallocate partition + on SMN Fail state */ +#define SCM_PERM_NO_ZEROIZE 0x10000000 +/** SCM Access Permission: Ignore Supervisor/User mode + in permission determination */ +#define SCM_PERM_HD_SUP_DISABLE 0x00000800 +/** SCM Access Permission: Allow Read Access to Host Domain */ +#define SCM_PERM_HD_READ 0x00000400 +/** SCM Access Permission: Allow Write Access to Host Domain */ +#define SCM_PERM_HD_WRITE 0x00000200 +/** SCM Access Permission: Allow Execute Access to Host Domain */ +#define SCM_PERM_HD_EXECUTE 0x00000100 +/** SCM Access Permission: Allow Read Access to Trusted Host Domain */ +#define SCM_PERM_TH_READ 0x00000040 +/** SCM Access Permission: Allow Write Access to Trusted Host Domain */ +#define SCM_PERM_TH_WRITE 0x00000020 +/** SCM Access Permission: Allow Read Access to Other/World Domain */ +#define SCM_PERM_OT_READ 0x00000004 +/** SCM Access Permission: Allow Write Access to Other/World Domain */ +#define SCM_PERM_OT_WRITE 0x00000002 +/** SCM Access Permission: Allow Execute Access to Other/World Domain */ +#define SCM_PERM_OT_EXECUTE 0x00000001 +/**< Valid bits that can be set in the Permissions register */ +#define SCM_PERM_MASK 0xC0000F67 + +/* Zeroize Command register definitions */ +#define ZCMD_DEALLOC_PART 3 /**< Deallocate Partition */ +#define Z_INT_EN 0x00000002 /**< Zero Interrupt Enable */ + +/** + * @defgroup scmpartitionownersregdefs SCM Partition Owners Register + */ +/** @addtogroup scmpartitionownersregdefs */ +/** @{ */ +/** Number of bits to shift partition number to get to its field. */ +#define SCM_POWN_SHIFT 2 +/** Mask for a field once the register has been shifted. */ +#define SCM_POWN_MASK 3 +/** Partition is free */ +#define SCM_POWN_PART_FREE 0 +/** Partition is unable to be allocated */ +#define SCM_POWN_PART_UNUSABLE 1 +/** Partition is owned by another master */ +#define SCM_POWN_PART_OTHER 2 +/** Partition is owned by this master */ +#define SCM_POWN_PART_OWNED 3 +/** @} */ + +/** + * @defgroup smnpartitionsengagedregdefs SCM Partitions Engaged Register + */ +/** @addtogroup smnpartitionsengagedregdefs */ +/** @{ */ +/** Number of bits to shift partition number to get to its field. */ +#define SCM_PENG_SHIFT 1 +/** Engaged value for a field once the register has been shifted. */ +#define SCM_PENG_ENGAGED 1 +/** @} */ + +/** Number of bytes between each subsequent SMID register */ +#define SCM_SMID_WIDTH 8 + +/** + * @defgroup smncommandregdefs SMN Command Register Definitions (SMN_COMMAND_REG) + */ +/** @addtogroup smncommandregdefs */ +/** @{ */ + +/** These bits are unimplemented or reserved */ +#define SMN_COMMAND_ZEROS_MASK 0xfffffff0 +#define SMN_COMMAND_CLEAR_INTERRUPT 0x8 /**< Clear SMN Interrupt */ +#define SMN_COMMAND_CLEAR_BIT_BANK 0x4 /**< Clear SMN Bit Bank */ +#define SMN_COMMAND_ENABLE_INTERRUPT 0x2 /**< Enable SMN Interrupts */ +#define SMN_COMMAND_SET_SOFTWARE_ALARM 0x1 /**< Set Software Alarm */ +/** @} */ + +/** + * @defgroup smntimercontroldefs SMN Timer Control Register definitions (SMN_TIMER_CONTROL) + */ +/** @addtogroup smntimercontroldefs */ +/** @{ */ +/** These bits are reserved or zero */ +#define SMN_TIMER_CTRL_ZEROS_MASK 0xfffffffc +/** Load the timer from #SMN_TIMER_IV_REG */ +#define SMN_TIMER_LOAD_TIMER 0x2 +/** Setting to zero stops the Timer */ +#define SMN_TIMER_STOP_MASK 0x1 +/** Setting this value starts the timer */ +#define SMN_TIMER_START_TIMER 0x1 +/** @} */ + +/** + * @defgroup scmchainmodedefs SCM_CHAINING_MODE_MASK - Bit definitions + */ +/** @addtogroup scmchainmodedefs */ +/** @{ */ +#define SCM_CBC_MODE 0x2 /**< Cipher block chaining */ +#define SCM_ECB_MODE 0x0 /**< Electronic codebook. */ +/** @} */ + +/* Bit definitions in the SCM_CIPHER_MODE_MASK */ +/** + * @defgroup scmciphermodedefs SCM_CIPHER_MODE_MASK - Bit definitions + */ +/** @addtogroup scmciphermodedefs */ +/** @{ */ +#define SCM_DECRYPT_MODE 0x1 /**< decrypt from black to red memory */ +#define SCM_ENCRYPT_MODE 0x0 /**< encrypt from red to black memory */ +/** @} */ + +/** + * @defgroup smndbgdetdefs SMN Debug Detector Status Register (SCM_DEBUG_DETECT_STAT) + */ +/** @addtogroup smndbgdetdefs */ +/** @{ */ +#define SMN_DBG_ZEROS_MASK 0xfffff000 /**< These bits are zero or reserved */ +#define SMN_DBG_D12 0x0800 /**< Error detected on Debug Port D12 */ +#define SMN_DBG_D11 0x0400 /**< Error detected on Debug Port D11 */ +#define SMN_DBG_D10 0x0200 /**< Error detected on Debug Port D10 */ +#define SMN_DBG_D9 0x0100 /**< Error detected on Debug Port D9 */ +#define SMN_DBG_D8 0x0080 /**< Error detected on Debug Port D8 */ +#define SMN_DBG_D7 0x0040 /**< Error detected on Debug Port D7 */ +#define SMN_DBG_D6 0x0020 /**< Error detected on Debug Port D6 */ +#define SMN_DBG_D5 0x0010 /**< Error detected on Debug Port D5 */ +#define SMN_DBG_D4 0x0008 /**< Error detected on Debug Port D4 */ +#define SMN_DBG_D3 0x0004 /**< Error detected on Debug Port D3 */ +#define SMN_DBG_D2 0x0002 /**< Error detected on Debug Port D2 */ +#define SMN_DBG_D1 0x0001 /**< Error detected on Debug Port D1 */ +/** @} */ + +/** Mask for the usable bits of the Sequence Start Register + (#SMN_SEQ_START_REG) */ +#define SMN_SEQUENCE_START_MASK 0x0000ffff + +/** Mask for the usable bits of the Sequence End Register + (#SMN_SEQ_END_REG) */ +#define SMN_SEQUENCE_END_MASK 0x0000ffff + +/** Mask for the usable bits of the Sequence Check Register + (#SMN_SEQ_CHECK_REG) */ +#define SMN_SEQUENCE_CHECK_MASK 0x0000ffff + +/** Mask for the usable bits of the Bit Counter Register + (#SMN_BB_CNT_REG) */ +#define SMN_BIT_COUNT_MASK 0x000007ff + +/** Mask for the usable bits of the Bit Bank Increment Size Register + (#SMN_BB_INC_REG) */ +#define SMN_BITBANK_INC_SIZE_MASK 0x000007ff + +/** Mask for the usable bits of the Bit Bank Decrement Register + (#SMN_BB_DEC_REG) */ +#define SMN_BITBANK_DECREMENT_MASK 0x000007ff + +/** Mask for the usable bits of the Compare Size Register + (#SMN_COMPARE_REG) */ +#define SMN_COMPARE_SIZE_MASK 0x0000003f + +/*! @} */ + +#endif /* SCC_DRIVER_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/compat.h +++ linux-fsl-imx51-2.6.31/include/linux/compat.h @@ -309,5 +309,7 @@ asmlinkage long compat_sys_openat(unsigned int dfd, const char __user *filename, int flags, int mode); +extern void __user *compat_alloc_user_space(unsigned long len); + #endif /* CONFIG_COMPAT */ #endif /* _LINUX_COMPAT_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/ipu.h +++ linux-fsl-imx51-2.6.31/include/linux/ipu.h @@ -0,0 +1,1263 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @defgroup IPU MXC Image Processing Unit (IPU) Driver + */ +/*! + * @file arch-mxc/ipu.h + * + * @brief This file contains the IPU driver API declarations. + * + * @ingroup IPU + */ + +#ifndef __ASM_ARCH_IPU_H__ +#define __ASM_ARCH_IPU_H__ + +#include +#include +#ifdef __KERNEL__ +#include +#else +#ifndef __cplusplus +typedef unsigned char bool; +#endif +#define irqreturn_t int +#define dma_addr_t int +#define u32 unsigned int +#define __u32 u32 +#endif + +/*! + * Enumeration of IPU rotation modes + */ +typedef enum { + /* Note the enum values correspond to BAM value */ + IPU_ROTATE_NONE = 0, + IPU_ROTATE_VERT_FLIP = 1, + IPU_ROTATE_HORIZ_FLIP = 2, + IPU_ROTATE_180 = 3, + IPU_ROTATE_90_RIGHT = 4, + IPU_ROTATE_90_RIGHT_VFLIP = 5, + IPU_ROTATE_90_RIGHT_HFLIP = 6, + IPU_ROTATE_90_LEFT = 7, +} ipu_rotate_mode_t; + +/*! + * Enumeration of Post Filter modes + */ +typedef enum { + PF_DISABLE_ALL = 0, + PF_MPEG4_DEBLOCK = 1, + PF_MPEG4_DERING = 2, + PF_MPEG4_DEBLOCK_DERING = 3, + PF_H264_DEBLOCK = 4, +} pf_operation_t; + +/*! + * Enumeration of Synchronous (Memory-less) panel types + */ +typedef enum { + IPU_PANEL_SHARP_TFT, + IPU_PANEL_TFT, +} ipu_panel_t; + +/*! + * Enumeration of VDI MOTION select + */ +typedef enum { + MED_MOTION = 0, + LOW_MOTION = 1, + HIGH_MOTION = 2, +} ipu_motion_sel; + +/* IPU Pixel format definitions */ +/* Four-character-code (FOURCC) */ +#define fourcc(a, b, c, d)\ + (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24)) + +/*! + * @name IPU Pixel Formats + * + * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are + * the same used by V4L2 API. + */ + +/*! @{ */ +/*! @name Generic or Raw Data Formats */ +/*! @{ */ +#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0') /*!< IPU Generic Data */ +#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1') /*!< IPU Generic Data */ +#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6') /*!< IPU Generic Data */ +#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8') /*!< IPU Generic Data */ +/*! @} */ +/*! @name RGB Formats */ +/*! @{ */ +#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*!< 8 RGB-3-3-2 */ +#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*!< 16 RGB-5-5-5 */ +#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*!< 1 6 RGB-5-6-5 */ +#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*!< 18 RGB-6-6-6 */ +#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*!< 18 BGR-6-6-6 */ +#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*!< 24 BGR-8-8-8 */ +#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*!< 24 RGB-8-8-8 */ +#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*!< 32 BGR-8-8-8-8 */ +#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*!< 32 BGR-8-8-8-8 */ +#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*!< 32 RGB-8-8-8-8 */ +#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*!< 32 RGB-8-8-8-8 */ +#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*!< 32 ABGR-8-8-8-8 */ +/*! @} */ +/*! @name YUV Interleaved Formats */ +/*! @{ */ +#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*!< 16 YUV 4:2:2 */ +#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*!< 16 YUV 4:2:2 */ +#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*!< 12 YUV 4:1:1 */ +#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*!< 24 YUV 4:4:4 */ +/* two planes -- one Y, one Cb + Cr interleaved */ +#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */ +/*! @} */ +/*! @name YUV Planar Formats */ +/*! @{ */ +#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*!< 8 Greyscale */ +#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*!< 9 YVU 4:1:0 */ +#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*!< 9 YUV 4:1:0 */ +#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*!< 12 YVU 4:2:0 */ +#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*!< 12 YUV 4:2:0 */ +#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*!< 12 YUV 4:2:0 */ +#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*!< 16 YVU 4:2:2 */ +#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*!< 16 YUV 4:2:2 */ +/*! @} */ + +/* IPU Driver channels definitions. */ +/* Note these are different from IDMA channels */ +#ifdef CONFIG_MXC_IPU_V1 +#define _MAKE_CHAN(num, in, out, sec) ((num << 24) | (sec << 16) | (out << 8) | in) +#define IPU_CHAN_ID(ch) (ch >> 24) +#define IPU_CHAN_SEC_DMA(ch) ((uint32_t) (ch >> 16) & 0xFF) +#define IPU_CHAN_OUT_DMA(ch) ((uint32_t) (ch >> 8) & 0xFF) +#define IPU_CHAN_IN_DMA(ch) ((uint32_t) (ch & 0xFF)) + +#else +#define IPU_MAX_CH 32 +#define _MAKE_CHAN(num, v_in, g_in, a_in, out) \ + ((num << 24) | (v_in << 18) | (g_in << 12) | (a_in << 6) | out) +#define _MAKE_ALT_CHAN(ch) (ch | (IPU_MAX_CH << 24)) +#define IPU_CHAN_ID(ch) (ch >> 24) +#define IPU_CHAN_ALT(ch) (ch & 0x02000000) +#define IPU_CHAN_ALPHA_IN_DMA(ch) ((uint32_t) (ch >> 6) & 0x3F) +#define IPU_CHAN_GRAPH_IN_DMA(ch) ((uint32_t) (ch >> 12) & 0x3F) +#define IPU_CHAN_VIDEO_IN_DMA(ch) ((uint32_t) (ch >> 18) & 0x3F) +#define IPU_CHAN_OUT_DMA(ch) ((uint32_t) (ch & 0x3F)) +#define NO_DMA 0x3F +#define ALT 1 +#endif +/*! + * Enumeration of IPU logical channels. An IPU logical channel is defined as a + * combination of an input (memory to IPU), output (IPU to memory), and/or + * secondary input IDMA channels and in some cases an Image Converter task. + * Some channels consist of only an input or output. + */ +typedef enum { + CHAN_NONE = -1, +#ifdef CONFIG_MXC_IPU_V1 + CSI_MEM = _MAKE_CHAN(1, 0xFF, 7, 0xFF), /*!< CSI raw sensor data to memory */ + + CSI_PRP_ENC_MEM = _MAKE_CHAN(2, 0xFF, 0, 0xFF), /*!< CSI to IC Encoder PreProcessing to Memory */ + MEM_PRP_ENC_MEM = _MAKE_CHAN(3, 6, 0, 0xFF), /*!< Memory to IC Encoder PreProcessing to Memory */ + MEM_ROT_ENC_MEM = _MAKE_CHAN(4, 10, 8, 0xFF), /*!< Memory to IC Encoder Rotation to Memory */ + + CSI_PRP_VF_MEM = _MAKE_CHAN(5, 0xFF, 1, 0xFF), /*!< CSI to IC Viewfinder PreProcessing to Memory */ + CSI_PRP_VF_ADC = _MAKE_CHAN(6, 0xFF, 1, 0xFF), /*!< CSI to IC Viewfinder PreProcessing to ADC */ + MEM_PRP_VF_MEM = _MAKE_CHAN(7, 6, 1, 3), /*!< Memory to IC Viewfinder PreProcessing to Memory */ + MEM_PRP_VF_ADC = _MAKE_CHAN(8, 6, 1, 3), /*!< Memory to IC Viewfinder PreProcessing to ADC */ + MEM_ROT_VF_MEM = _MAKE_CHAN(9, 11, 9, 0xFF), /*!< Memory to IC Viewfinder Rotation to Memory */ + + MEM_PP_MEM = _MAKE_CHAN(10, 5, 2, 4), /*!< Memory to IC PostProcessing to Memory */ + MEM_ROT_PP_MEM = _MAKE_CHAN(11, 13, 12, 0xFF), /*!< Memory to IC PostProcessing Rotation to Memory */ + MEM_PP_ADC = _MAKE_CHAN(12, 5, 2, 4), /*!< Memory to IC PostProcessing to ADC */ + + MEM_SDC_BG = _MAKE_CHAN(14, 14, 0xFF, 0xFF), /*!< Memory to SDC Background plane */ + MEM_SDC_FG = _MAKE_CHAN(15, 15, 0xFF, 0xFF), /*!< Memory to SDC Foreground plane */ + MEM_SDC_MASK = _MAKE_CHAN(16, 16, 0xFF, 0xFF), /*!< Memory to SDC Mask */ + + MEM_BG_SYNC = MEM_SDC_BG, + MEM_FG_SYNC = MEM_SDC_FG, + + ADC_SYS1 = _MAKE_CHAN(17, 18, 22, 20), /*!< Memory to ADC System Channel 1 */ + ADC_SYS2 = _MAKE_CHAN(18, 19, 23, 21), /*!< Memory to ADC System Channel 2 */ + + MEM_PF_Y_MEM = _MAKE_CHAN(19, 26, 29, 24), /*!< Y and PF Memory to Post-filter to Y Memory */ + MEM_PF_U_MEM = _MAKE_CHAN(20, 27, 30, 25), /*!< U and PF Memory to Post-filter to U Memory */ + MEM_PF_V_MEM = _MAKE_CHAN(21, 28, 31, 0xFF), /*!< V Memory to Post-filter to V Memory */ + + MEM_DC_SYNC = CHAN_NONE, + DIRECT_ASYNC0 = CHAN_NONE, + DIRECT_ASYNC1 = CHAN_NONE, + MEM_VDI_PRP_VF_MEM_P = CHAN_NONE, + MEM_VDI_PRP_VF_MEM = CHAN_NONE, + MEM_VDI_PRP_VF_MEM_N = CHAN_NONE, +#else + MEM_ROT_ENC_MEM = _MAKE_CHAN(1, 45, NO_DMA, NO_DMA, 48), + MEM_ROT_VF_MEM = _MAKE_CHAN(2, 46, NO_DMA, NO_DMA, 49), + MEM_ROT_PP_MEM = _MAKE_CHAN(3, 47, NO_DMA, NO_DMA, 50), + + MEM_PRP_ENC_MEM = _MAKE_CHAN(4, 12, 14, 17, 20), + MEM_PRP_VF_MEM = _MAKE_CHAN(5, 12, 14, 17, 21), + MEM_PP_MEM = _MAKE_CHAN(6, 11, 15, 18, 22), + + MEM_DC_SYNC = _MAKE_CHAN(7, 28, NO_DMA, NO_DMA, NO_DMA), + MEM_DC_ASYNC = _MAKE_CHAN(8, 41, NO_DMA, NO_DMA, NO_DMA), + MEM_BG_SYNC = _MAKE_CHAN(9, 23, NO_DMA, 51, NO_DMA), + MEM_FG_SYNC = _MAKE_CHAN(10, 27, NO_DMA, 31, NO_DMA), + + MEM_BG_ASYNC0 = _MAKE_CHAN(11, 24, NO_DMA, 52, NO_DMA), + MEM_FG_ASYNC0 = _MAKE_CHAN(12, 29, NO_DMA, 33, NO_DMA), + MEM_BG_ASYNC1 = _MAKE_ALT_CHAN(MEM_BG_ASYNC0), + MEM_FG_ASYNC1 = _MAKE_ALT_CHAN(MEM_FG_ASYNC0), + + DIRECT_ASYNC0 = _MAKE_CHAN(13, NO_DMA, NO_DMA, NO_DMA, NO_DMA), + DIRECT_ASYNC1 = _MAKE_CHAN(14, NO_DMA, NO_DMA, NO_DMA, NO_DMA), + + CSI_MEM0 = _MAKE_CHAN(15, NO_DMA, NO_DMA, NO_DMA, 0), + CSI_MEM1 = _MAKE_CHAN(16, NO_DMA, NO_DMA, NO_DMA, 1), + CSI_MEM2 = _MAKE_CHAN(17, NO_DMA, NO_DMA, NO_DMA, 2), + CSI_MEM3 = _MAKE_CHAN(18, NO_DMA, NO_DMA, NO_DMA, 3), + + CSI_MEM = CSI_MEM0, + + CSI_PRP_ENC_MEM = _MAKE_CHAN(19, NO_DMA, NO_DMA, NO_DMA, 20), + CSI_PRP_VF_MEM = _MAKE_CHAN(20, NO_DMA, NO_DMA, NO_DMA, 21), + + MEM_VDI_PRP_VF_MEM_P = _MAKE_CHAN(21, 8, 14, 17, 21), + MEM_VDI_PRP_VF_MEM = _MAKE_CHAN(22, 9, 14, 17, 21), + MEM_VDI_PRP_VF_MEM_N = _MAKE_CHAN(23, 10, 14, 17, 21), + + MEM_PP_ADC = CHAN_NONE, + ADC_SYS2 = CHAN_NONE, +#endif + +} ipu_channel_t; + +/*! + * Enumeration of types of buffers for a logical channel. + */ +typedef enum { + IPU_OUTPUT_BUFFER = 0, /*!< Buffer for output from IPU */ + IPU_ALPHA_IN_BUFFER = 1, /*!< Buffer for input to IPU */ + IPU_GRAPH_IN_BUFFER = 2, /*!< Buffer for input to IPU */ + IPU_VIDEO_IN_BUFFER = 3, /*!< Buffer for input to IPU */ + IPU_INPUT_BUFFER = IPU_VIDEO_IN_BUFFER, + IPU_SEC_INPUT_BUFFER = IPU_GRAPH_IN_BUFFER, +} ipu_buffer_t; + +#define IPU_PANEL_SERIAL 1 +#define IPU_PANEL_PARALLEL 2 + +/*! + * Enumeration of DI ports for ADC. + */ +typedef enum { + DISP0, + DISP1, + DISP2, + DISP3 +} display_port_t; + +/*! + * Enumeration of ADC channel operation mode. + */ +typedef enum { + Disable, + WriteTemplateNonSeq, + ReadTemplateNonSeq, + WriteTemplateUnCon, + ReadTemplateUnCon, + WriteDataWithRS, + WriteDataWoRS, + WriteCmd +} mcu_mode_t; + +/*! + * Enumeration of ADC channel addressing mode. + */ +typedef enum { + FullWoBE, + FullWithBE, + XY +} display_addressing_t; + +/*! + * Union of initialization parameters for a logical channel. + */ +typedef union { + struct { + uint32_t csi; + bool mipi_en; + uint32_t mipi_id; + } csi_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + uint32_t csi; + } csi_prp_enc_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + uint32_t out_resize_ratio; + } mem_prp_enc_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + } mem_rot_enc_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + bool graphics_combine_en; + bool global_alpha_en; + bool key_color_en; + uint32_t csi; + } csi_prp_vf_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + bool graphics_combine_en; + bool global_alpha_en; + bool key_color_en; + display_port_t disp; + uint32_t out_left; + uint32_t out_top; + } csi_prp_vf_adc; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + uint32_t out_resize_ratio; + bool graphics_combine_en; + bool global_alpha_en; + bool key_color_en; + uint32_t in_g_pixel_fmt; + uint8_t alpha; + uint32_t key_color; + bool alpha_chan_en; + ipu_motion_sel motion_sel; + enum v4l2_field field_fmt; + } mem_prp_vf_mem; + struct { + uint32_t temp; + } mem_prp_vf_adc; + struct { + uint32_t temp; + } mem_rot_vf_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + uint32_t out_resize_ratio; + bool graphics_combine_en; + bool global_alpha_en; + bool key_color_en; + uint32_t in_g_pixel_fmt; + uint8_t alpha; + uint32_t key_color; + bool alpha_chan_en; + } mem_pp_mem; + struct { + uint32_t temp; + } mem_rot_mem; + struct { + uint32_t in_width; + uint32_t in_height; + uint32_t in_pixel_fmt; + uint32_t out_width; + uint32_t out_height; + uint32_t out_pixel_fmt; + bool graphics_combine_en; + bool global_alpha_en; + bool key_color_en; + display_port_t disp; + uint32_t out_left; + uint32_t out_top; + } mem_pp_adc; + struct { + pf_operation_t operation; + } mem_pf_mem; + struct { + uint32_t di; + bool interlaced; + } mem_dc_sync; + struct { + uint32_t temp; + } mem_sdc_fg; + struct { + uint32_t di; + bool interlaced; + uint32_t in_pixel_fmt; + uint32_t out_pixel_fmt; + bool alpha_chan_en; + } mem_dp_bg_sync; + struct { + uint32_t temp; + } mem_sdc_bg; + struct { + uint32_t di; + bool interlaced; + uint32_t in_pixel_fmt; + uint32_t out_pixel_fmt; + bool alpha_chan_en; + } mem_dp_fg_sync; + struct { + uint32_t di; + } direct_async; + struct { + display_port_t disp; + mcu_mode_t ch_mode; + uint32_t out_left; + uint32_t out_top; + } adc_sys1; + struct { + display_port_t disp; + mcu_mode_t ch_mode; + uint32_t out_left; + uint32_t out_top; + } adc_sys2; +} ipu_channel_params_t; + +/*! + * Enumeration of IPU interrupt sources. + */ +enum ipu_irq_line { +#ifdef CONFIG_MXC_IPU_V1 + IPU_IRQ_DC_FC_1 = -1, + + IPU_IRQ_PRP_ENC_OUT_EOF = 0, + IPU_IRQ_PRP_VF_OUT_EOF = 1, + IPU_IRQ_PP_OUT_EOF = 2, + IPU_IRQ_PRP_GRAPH_IN_EOF = 3, + IPU_IRQ_PP_GRAPH_IN_EOF = 4, + IPU_IRQ_PP_IN_EOF = 5, + IPU_IRQ_PRP_IN_EOF = 6, + IPU_IRQ_SENSOR_OUT_EOF = 7, + IPU_IRQ_CSI0_OUT_EOF = IPU_IRQ_SENSOR_OUT_EOF, + IPU_IRQ_PRP_ENC_ROT_OUT_EOF = 8, + IPU_IRQ_PRP_VF_ROT_OUT_EOF = 9, + IPU_IRQ_PRP_ENC_ROT_IN_EOF = 10, + IPU_IRQ_PRP_VF_ROT_IN_EOF = 11, + IPU_IRQ_PP_ROT_OUT_EOF = 12, + IPU_IRQ_PP_ROT_IN_EOF = 13, + IPU_IRQ_BG_SYNC_EOF = 14, + IPU_IRQ_SDC_BG_EOF = IPU_IRQ_BG_SYNC_EOF, + IPU_IRQ_FG_SYNC_EOF = 15, + IPU_IRQ_SDC_FG_EOF = IPU_IRQ_FG_SYNC_EOF, + IPU_IRQ_SDC_MASK_EOF = 16, + IPU_IRQ_SDC_BG_PART_EOF = 17, + IPU_IRQ_ADC_SYS1_WR_EOF = 18, + IPU_IRQ_ADC_SYS2_WR_EOF = 19, + IPU_IRQ_ADC_SYS1_CMD_EOF = 20, + IPU_IRQ_ADC_SYS2_CMD_EOF = 21, + IPU_IRQ_ADC_SYS1_RD_EOF = 22, + IPU_IRQ_ADC_SYS2_RD_EOF = 23, + IPU_IRQ_PF_QP_IN_EOF = 24, + IPU_IRQ_PF_BSP_IN_EOF = 25, + IPU_IRQ_PF_Y_IN_EOF = 26, + IPU_IRQ_PF_U_IN_EOF = 27, + IPU_IRQ_PF_V_IN_EOF = 28, + IPU_IRQ_PF_Y_OUT_EOF = 29, + IPU_IRQ_PF_U_OUT_EOF = 30, + IPU_IRQ_PF_V_OUT_EOF = 31, + + IPU_IRQ_PRP_ENC_OUT_NF = 32, + IPU_IRQ_PRP_VF_OUT_NF = 33, + IPU_IRQ_PP_OUT_NF = 34, + IPU_IRQ_PRP_GRAPH_IN_NF = 35, + IPU_IRQ_PP_GRAPH_IN_NF = 36, + IPU_IRQ_PP_IN_NF = 37, + IPU_IRQ_PRP_IN_NF = 38, + IPU_IRQ_SENSOR_OUT_NF = 39, + IPU_IRQ_PRP_ENC_ROT_OUT_NF = 40, + IPU_IRQ_PRP_VF_ROT_OUT_NF = 41, + IPU_IRQ_PRP_ENC_ROT_IN_NF = 42, + IPU_IRQ_PRP_VF_ROT_IN_NF = 43, + IPU_IRQ_PP_ROT_OUT_NF = 44, + IPU_IRQ_PP_ROT_IN_NF = 45, + IPU_IRQ_SDC_FG_NF = 46, + IPU_IRQ_SDC_BG_NF = 47, + IPU_IRQ_SDC_MASK_NF = 48, + IPU_IRQ_SDC_BG_PART_NF = 49, + IPU_IRQ_ADC_SYS1_WR_NF = 50, + IPU_IRQ_ADC_SYS2_WR_NF = 51, + IPU_IRQ_ADC_SYS1_CMD_NF = 52, + IPU_IRQ_ADC_SYS2_CMD_NF = 53, + IPU_IRQ_ADC_SYS1_RD_NF = 54, + IPU_IRQ_ADC_SYS2_RD_NF = 55, + IPU_IRQ_PF_QP_IN_NF = 56, + IPU_IRQ_PF_BSP_IN_NF = 57, + IPU_IRQ_PF_Y_IN_NF = 58, + IPU_IRQ_PF_U_IN_NF = 59, + IPU_IRQ_PF_V_IN_NF = 60, + IPU_IRQ_PF_Y_OUT_NF = 61, + IPU_IRQ_PF_U_OUT_NF = 62, + IPU_IRQ_PF_V_OUT_NF = 63, + + IPU_IRQ_BREAKRQ = 64, + IPU_IRQ_SDC_BG_OUT_EOF = 65, + IPU_IRQ_BG_SF_END = IPU_IRQ_SDC_BG_OUT_EOF, + IPU_IRQ_SDC_FG_OUT_EOF = 66, + IPU_IRQ_SDC_MASK_OUT_EOF = 67, + IPU_IRQ_ADC_SERIAL_DATA_OUT = 68, + IPU_IRQ_SENSOR_NF = 69, + IPU_IRQ_SENSOR_EOF = 70, + IPU_IRQ_SDC_DISP3_VSYNC = 80, + IPU_IRQ_ADC_DISP0_VSYNC = 81, + IPU_IRQ_ADC_DISP12_VSYNC = 82, + IPU_IRQ_ADC_PRP_EOF = 83, + IPU_IRQ_ADC_PP_EOF = 84, + IPU_IRQ_ADC_SYS1_EOF = 85, + IPU_IRQ_ADC_SYS2_EOF = 86, + + IPU_IRQ_PRP_ENC_OUT_NFB4EOF_ERR = 96, + IPU_IRQ_PRP_VF_OUT_NFB4EOF_ERR = 97, + IPU_IRQ_PP_OUT_NFB4EOF_ERR = 98, + IPU_IRQ_PRP_GRAPH_IN_NFB4EOF_ERR = 99, + IPU_IRQ_PP_GRAPH_IN_NFB4EOF_ERR = 100, + IPU_IRQ_PP_IN_NFB4EOF_ERR = 101, + IPU_IRQ_PRP_IN_NFB4EOF_ERR = 102, + IPU_IRQ_SENSOR_OUT_NFB4EOF_ERR = 103, + IPU_IRQ_PRP_ENC_ROT_OUT_NFB4EOF_ERR = 104, + IPU_IRQ_PRP_VF_ROT_OUT_NFB4EOF_ERR = 105, + IPU_IRQ_PRP_ENC_ROT_IN_NFB4EOF_ERR = 106, + IPU_IRQ_PRP_VF_ROT_IN_NFB4EOF_ERR = 107, + IPU_IRQ_PP_ROT_OUT_NFB4EOF_ERR = 108, + IPU_IRQ_PP_ROT_IN_NFB4EOF_ERR = 109, + IPU_IRQ_SDC_FG_NFB4EOF_ERR = 110, + IPU_IRQ_SDC_BG_NFB4EOF_ERR = 111, + IPU_IRQ_SDC_MASK_NFB4EOF_ERR = 112, + IPU_IRQ_SDC_BG_PART_NFB4EOF_ERR = 113, + IPU_IRQ_ADC_SYS1_WR_NFB4EOF_ERR = 114, + IPU_IRQ_ADC_SYS2_WR_NFB4EOF_ERR = 115, + IPU_IRQ_ADC_SYS1_CMD_NFB4EOF_ERR = 116, + IPU_IRQ_ADC_SYS2_CMD_NFB4EOF_ERR = 117, + IPU_IRQ_ADC_SYS1_RD_NFB4EOF_ERR = 118, + IPU_IRQ_ADC_SYS2_RD_NFB4EOF_ERR = 119, + IPU_IRQ_PF_QP_IN_NFB4EOF_ERR = 120, + IPU_IRQ_PF_BSP_IN_NFB4EOF_ERR = 121, + IPU_IRQ_PF_Y_IN_NFB4EOF_ERR = 122, + IPU_IRQ_PF_U_IN_NFB4EOF_ERR = 123, + IPU_IRQ_PF_V_IN_NFB4EOF_ERR = 124, + IPU_IRQ_PF_Y_OUT_NFB4EOF_ERR = 125, + IPU_IRQ_PF_U_OUT_NFB4EOF_ERR = 126, + IPU_IRQ_PF_V_OUT_NFB4EOF_ERR = 127, + + IPU_IRQ_BAYER_BUFOVF_ERR = 128, + IPU_IRQ_ENC_BUFOVF_ERR = 129, + IPU_IRQ_VF_BUFOVF_ERR = 130, + IPU_IRQ_ADC_PP_TEAR_ERR = 131, + IPU_IRQ_ADC_SYS1_TEAR_ERR = 132, + IPU_IRQ_ADC_SYS2_TEAR_ERR = 133, + IPU_IRQ_SDC_BGD_ERR = 134, + IPU_IRQ_SDC_FGD_ERR = 135, + IPU_IRQ_SDC_MASKD_ERR = 136, + IPU_IRQ_BAYER_FRM_LOST_ERR = 137, + IPU_IRQ_ENC_FRM_LOST_ERR = 138, + IPU_IRQ_VF_FRM_LOST_ERR = 139, + IPU_IRQ_ADC_LOCK_ERR = 140, + IPU_IRQ_DI_LLA_LOCK_ERR = 141, + IPU_IRQ_AHB_M1_ERR = 142, + IPU_IRQ_AHB_M12_ERR = 143, +#else + IPU_IRQ_CSI0_OUT_EOF = 0, + IPU_IRQ_CSI1_OUT_EOF = 1, + IPU_IRQ_CSI2_OUT_EOF = 2, + IPU_IRQ_CSI3_OUT_EOF = 3, + IPU_IRQ_PP_IN_EOF = 11, + IPU_IRQ_PRP_IN_EOF = 12, + IPU_IRQ_PRP_GRAPH_IN_EOF = 14, + IPU_IRQ_PP_GRAPH_IN_EOF = 15, + IPU_IRQ_PRP_ALPHA_IN_EOF = 17, + IPU_IRQ_PP_ALPHA_IN_EOF = 18, + IPU_IRQ_PRP_ENC_OUT_EOF = 20, + IPU_IRQ_PRP_VF_OUT_EOF = 21, + IPU_IRQ_PP_OUT_EOF = 22, + IPU_IRQ_BG_SYNC_EOF = 23, + IPU_IRQ_BG_ASYNC_EOF = 24, + IPU_IRQ_FG_SYNC_EOF = 27, + IPU_IRQ_DC_SYNC_EOF = 28, + IPU_IRQ_FG_ASYNC_EOF = 29, + IPU_IRQ_FG_ALPHA_SYNC_EOF = 31, + + IPU_IRQ_FG_ALPHA_ASYNC_EOF = 33, + IPU_IRQ_DC_READ_EOF = 40, + IPU_IRQ_DC_ASYNC_EOF = 41, + IPU_IRQ_DC_CMD1_EOF = 42, + IPU_IRQ_DC_CMD2_EOF = 43, + IPU_IRQ_DC_MASK_EOF = 44, + IPU_IRQ_PRP_ENC_ROT_IN_EOF = 45, + IPU_IRQ_PRP_VF_ROT_IN_EOF = 46, + IPU_IRQ_PP_ROT_IN_EOF = 47, + IPU_IRQ_PRP_ENC_ROT_OUT_EOF = 48, + IPU_IRQ_PRP_VF_ROT_OUT_EOF = 49, + IPU_IRQ_PP_ROT_OUT_EOF = 50, + IPU_IRQ_BG_ALPHA_SYNC_EOF = 51, + IPU_IRQ_BG_ALPHA_ASYNC_EOF = 52, + + IPU_IRQ_DP_SF_START = 448 + 2, + IPU_IRQ_DP_SF_END = 448 + 3, + IPU_IRQ_BG_SF_END = IPU_IRQ_DP_SF_END, + IPU_IRQ_DC_FC_0 = 448 + 8, + IPU_IRQ_DC_FC_1 = 448 + 9, + IPU_IRQ_DC_FC_2 = 448 + 10, + IPU_IRQ_DC_FC_3 = 448 + 11, + IPU_IRQ_DC_FC_4 = 448 + 12, + IPU_IRQ_DC_FC_6 = 448 + 13, + IPU_IRQ_VSYNC_PRE_0 = 448 + 14, + IPU_IRQ_VSYNC_PRE_1 = 448 + 15, +#endif + + IPU_IRQ_COUNT +}; + +/*! + * Bitfield of Display Interface signal polarities. + */ +typedef struct { + unsigned datamask_en:1; + unsigned ext_clk:1; + unsigned interlaced:1; + unsigned odd_field_first:1; + unsigned clksel_en:1; + unsigned clkidle_en:1; + unsigned data_pol:1; /* true = inverted */ + unsigned clk_pol:1; /* true = rising edge */ + unsigned enable_pol:1; + unsigned Hsync_pol:1; /* true = active high */ + unsigned Vsync_pol:1; +} ipu_di_signal_cfg_t; + +/*! + * Bitfield of CSI signal polarities and modes. + */ + +typedef struct { + unsigned data_width:4; + unsigned clk_mode:3; + unsigned ext_vsync:1; + unsigned Vsync_pol:1; + unsigned Hsync_pol:1; + unsigned pixclk_pol:1; + unsigned data_pol:1; + unsigned sens_clksrc:1; + unsigned pack_tight:1; + unsigned force_eof:1; + unsigned data_en_pol:1; + unsigned data_fmt; + unsigned csi; + unsigned mclk; +} ipu_csi_signal_cfg_t; + +/*! + * Enumeration of CSI data bus widths. + */ +enum { + IPU_CSI_DATA_WIDTH_4, + IPU_CSI_DATA_WIDTH_8, + IPU_CSI_DATA_WIDTH_10, + IPU_CSI_DATA_WIDTH_16, +}; + +/*! + * Enumeration of CSI clock modes. + */ +enum { + IPU_CSI_CLK_MODE_GATED_CLK, + IPU_CSI_CLK_MODE_NONGATED_CLK, + IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE, + IPU_CSI_CLK_MODE_CCIR656_INTERLACED, + IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR, + IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR, + IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_DDR, + IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_SDR, +}; + +enum { + IPU_CSI_MIPI_DI0, + IPU_CSI_MIPI_DI1, + IPU_CSI_MIPI_DI2, + IPU_CSI_MIPI_DI3, +}; + +typedef enum { + RGB, + YCbCr, + YUV +} ipu_color_space_t; + +/*! + * Enumeration of ADC vertical sync mode. + */ +typedef enum { + VsyncNone, + VsyncInternal, + VsyncCSI, + VsyncExternal +} vsync_t; + +typedef enum { + DAT, + CMD +} cmddata_t; + +/*! + * Enumeration of ADC display update mode. + */ +typedef enum { + IPU_ADC_REFRESH_NONE, + IPU_ADC_AUTO_REFRESH, + IPU_ADC_AUTO_REFRESH_SNOOP, + IPU_ADC_SNOOPING, +} ipu_adc_update_mode_t; + +/*! + * Enumeration of ADC display interface types (serial or parallel). + */ +enum { + IPU_ADC_IFC_MODE_SYS80_TYPE1, + IPU_ADC_IFC_MODE_SYS80_TYPE2, + IPU_ADC_IFC_MODE_SYS68K_TYPE1, + IPU_ADC_IFC_MODE_SYS68K_TYPE2, + IPU_ADC_IFC_MODE_3WIRE_SERIAL, + IPU_ADC_IFC_MODE_4WIRE_SERIAL, + IPU_ADC_IFC_MODE_5WIRE_SERIAL_CLK, + IPU_ADC_IFC_MODE_5WIRE_SERIAL_CS, +}; + +enum { + IPU_ADC_IFC_WIDTH_8, + IPU_ADC_IFC_WIDTH_16, +}; + +/*! + * Enumeration of ADC display interface burst mode. + */ +enum { + IPU_ADC_BURST_WCS, + IPU_ADC_BURST_WBLCK, + IPU_ADC_BURST_NONE, + IPU_ADC_BURST_SERIAL, +}; + +/*! + * Enumeration of ADC display interface RW signal timing modes. + */ +enum { + IPU_ADC_SER_NO_RW, + IPU_ADC_SER_RW_BEFORE_RS, + IPU_ADC_SER_RW_AFTER_RS, +}; + +/*! + * Bitfield of ADC signal polarities and modes. + */ +typedef struct { + unsigned data_pol:1; + unsigned clk_pol:1; + unsigned cs_pol:1; + unsigned rs_pol:1; + unsigned addr_pol:1; + unsigned read_pol:1; + unsigned write_pol:1; + unsigned Vsync_pol:1; + unsigned burst_pol:1; + unsigned burst_mode:2; + unsigned ifc_mode:3; + unsigned ifc_width:5; + unsigned ser_preamble_len:4; + unsigned ser_preamble:8; + unsigned ser_rw_mode:2; +} ipu_adc_sig_cfg_t; + +/*! + * Enumeration of ADC template commands. + */ +enum { + RD_DATA, + RD_ACK, + RD_WAIT, + WR_XADDR, + WR_YADDR, + WR_ADDR, + WR_CMND, + WR_DATA, +}; + +/*! + * Enumeration of ADC template command flow control. + */ +enum { + SINGLE_STEP, + PAUSE, + STOP, +}; + + +/*Define template constants*/ +#define ATM_ADDR_RANGE 0x20 /*offset address of DISP */ +#define TEMPLATE_BUF_SIZE 0x20 /*size of template */ + +/*! + * Define to create ADC template command entry. + */ +#define ipu_adc_template_gen(oc, rs, fc, dat) ( ((rs) << 29) | ((fc) << 27) | \ + ((oc) << 24) | (dat) ) + +typedef struct { + u32 reg; + u32 value; +} ipu_lpmc_reg_t; + +#define IPU_LPMC_REG_READ 0x80000000L + +#define CSI_MCLK_VF 1 +#define CSI_MCLK_ENC 2 +#define CSI_MCLK_RAW 4 +#define CSI_MCLK_I2C 8 + +/* Common IPU API */ +int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t * params); +void ipu_uninit_channel(ipu_channel_t channel); + +static inline bool ipu_can_rotate_in_place(ipu_rotate_mode_t rot) +{ +#ifdef CONFIG_MXC_IPU_V3D + return (rot < IPU_ROTATE_HORIZ_FLIP); +#else + return (rot < IPU_ROTATE_90_RIGHT); +#endif +} + +int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + ipu_rotate_mode_t rot_mode, + dma_addr_t phyaddr_0, dma_addr_t phyaddr_1, + uint32_t u_offset, uint32_t v_offset); + +int32_t ipu_update_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum, dma_addr_t phyaddr); + +int32_t ipu_update_channel_offset(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + uint32_t u, uint32_t v, + uint32_t vertical_offset, uint32_t horizontal_offset); + +int32_t ipu_select_buffer(ipu_channel_t channel, + ipu_buffer_t type, uint32_t bufNum); +int32_t ipu_select_multi_vdi_buffer(uint32_t bufNum); + +int32_t ipu_link_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch); +int32_t ipu_unlink_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch); + +int32_t ipu_is_channel_busy(ipu_channel_t channel); +void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum); +int32_t ipu_enable_channel(ipu_channel_t channel); +int32_t ipu_disable_channel(ipu_channel_t channel, bool wait_for_stop); +int32_t ipu_swap_channel(ipu_channel_t from_ch, ipu_channel_t to_ch); + +int ipu_lowpwr_display_enable(void); +int ipu_lowpwr_display_disable(void); + +void ipu_enable_irq(uint32_t irq); +void ipu_disable_irq(uint32_t irq); +void ipu_clear_irq(uint32_t irq); +int ipu_request_irq(uint32_t irq, + irqreturn_t(*handler) (int, void *), + uint32_t irq_flags, const char *devname, void *dev_id); +void ipu_free_irq(uint32_t irq, void *dev_id); +bool ipu_get_irq_status(uint32_t irq); +void ipu_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]); + +/* SDC API */ +int32_t ipu_sdc_init_panel(ipu_panel_t panel, + uint32_t pixel_clk, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint16_t hStartWidth, uint16_t hSyncWidth, + uint16_t hEndWidth, uint16_t vStartWidth, + uint16_t vSyncWidth, uint16_t vEndWidth, + ipu_di_signal_cfg_t sig); + +int32_t ipu_sdc_set_global_alpha(bool enable, uint8_t alpha); +int32_t ipu_sdc_set_color_key(ipu_channel_t channel, bool enable, + uint32_t colorKey); +int32_t ipu_sdc_set_brightness(uint8_t value); + +int32_t ipu_init_sync_panel(int disp, + uint32_t pixel_clk, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint16_t h_start_width, uint16_t h_sync_width, + uint16_t h_end_width, uint16_t v_start_width, + uint16_t v_sync_width, uint16_t v_end_width, + uint32_t v_to_h_sync, ipu_di_signal_cfg_t sig); + +int32_t ipu_disp_set_window_pos(ipu_channel_t channel, int16_t x_pos, + int16_t y_pos); +int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, bool enable, + uint8_t alpha); +int32_t ipu_disp_set_color_key(ipu_channel_t channel, bool enable, + uint32_t colorKey); +int32_t ipu_disp_set_gamma_correction(ipu_channel_t channel, bool enable, + int constk[], int slopek[]); + +int ipu_init_async_panel(int disp, int type, uint32_t cycle_time, + uint32_t pixel_fmt, ipu_adc_sig_cfg_t sig); +void ipu_disp_direct_write(ipu_channel_t channel, u32 value, u32 offset); +void ipu_reset_disp_panel(void); + +/* ADC API */ +int32_t ipu_adc_write_template(display_port_t disp, uint32_t * pCmd, + bool write); + +int32_t ipu_adc_set_update_mode(ipu_channel_t channel, + ipu_adc_update_mode_t mode, + uint32_t refresh_rate, unsigned long addr, + uint32_t * size); + +int32_t ipu_adc_get_snooping_status(uint32_t * statl, uint32_t * stath); + +int32_t ipu_adc_write_cmd(display_port_t disp, cmddata_t type, + uint32_t cmd, const uint32_t * params, + uint16_t numParams); + +int32_t ipu_adc_init_panel(display_port_t disp, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint32_t stride, + ipu_adc_sig_cfg_t sig, + display_addressing_t addr, + uint32_t vsync_width, vsync_t mode); + +int32_t ipu_adc_init_ifc_timing(display_port_t disp, bool read, + uint32_t cycle_time, + uint32_t up_time, + uint32_t down_time, + uint32_t read_latch_time, uint32_t pixel_clk); + +/* CMOS Sensor Interface API */ +int32_t ipu_csi_init_interface(uint16_t width, uint16_t height, + uint32_t pixel_fmt, ipu_csi_signal_cfg_t sig); + +int32_t ipu_csi_enable_mclk(int src, bool flag, bool wait); + +static inline int32_t ipu_csi_enable_mclk_if(int src, uint32_t csi, + bool flag, bool wait) +{ +#ifdef CONFIG_MXC_IPU_V1 + return ipu_csi_enable_mclk(src, flag, wait); +#else + return ipu_csi_enable_mclk(csi, flag, wait); +#endif +} + +int ipu_csi_read_mclk_flag(void); + +void ipu_csi_flash_strobe(bool flag); + +void ipu_csi_get_window_size(uint32_t *width, uint32_t *height, uint32_t csi); + +void ipu_csi_set_window_size(uint32_t width, uint32_t height, uint32_t csi); + +void ipu_csi_set_window_pos(uint32_t left, uint32_t top, uint32_t csi); + +/* Post Filter functions */ +int32_t ipu_pf_set_pause_row(uint32_t pause_row); + +uint32_t bytes_per_pixel(uint32_t fmt); + +/* New added for IPU-lib functionality*/ +int ipu_open(void); +int ipu_register_generic_isr(int irq, void *dev); +void ipu_close(void); + +/* two stripe calculations */ +struct stripe_param{ + unsigned int input_width; /* width of the input stripe */ + unsigned int output_width; /* width of the output stripe */ + unsigned int input_column; /* the first column on the input stripe */ + unsigned int output_column; /* the first column on the output stripe */ + unsigned int idr; + /* inverse downisizing ratio parameter; expressed as a power of 2 */ + unsigned int irr; + /* inverse resizing ratio parameter; expressed as a multiple of 2^-13 */ +}; + +typedef struct _ipu_stripe_parm { + unsigned int input_width; + unsigned int output_width; + unsigned int maximal_stripe_width; + unsigned long long cirr; + unsigned int equal_stripes; + u32 input_pixelformat; + u32 output_pixelformat; + struct stripe_param left; + struct stripe_param right; +} ipu_stripe_parm; + +typedef struct _ipu_channel_parm { + ipu_channel_t channel; + ipu_channel_params_t params; + bool flag; +} ipu_channel_parm; + +typedef struct _ipu_channel_buf_parm { + ipu_channel_t channel; + ipu_buffer_t type; + uint32_t pixel_fmt; + uint16_t width; + uint16_t height; + uint16_t stride; + ipu_rotate_mode_t rot_mode; + dma_addr_t phyaddr_0; + dma_addr_t phyaddr_1; + uint32_t u_offset; + uint32_t v_offset; + uint32_t bufNum; +} ipu_channel_buf_parm; + +typedef struct _ipu_buf_offset_parm { + ipu_channel_t channel; + ipu_buffer_t type; + uint32_t pixel_fmt; + uint16_t width; + uint16_t height; + uint16_t stride; + uint32_t u_offset; + uint32_t v_offset; + uint32_t vertical_offset; + uint32_t horizontal_offset; +} ipu_buf_offset_parm; + +typedef struct _ipu_channel_link { + ipu_channel_t src_ch; + ipu_channel_t dest_ch; +} ipu_channel_link; + +typedef struct _ipu_channel_info { + ipu_channel_t channel; + bool stop; +} ipu_channel_info; + +typedef struct ipu_irq_info { + uint32_t irq; + irqreturn_t(*handler) (int, void *); + uint32_t irq_flags; + char *devname; + void *dev_id; +} ipu_irq_info; + +typedef struct _ipu_sdc_panel_info { + ipu_panel_t panel; + uint32_t pixel_clk; + uint16_t width; + uint16_t height; + uint32_t pixel_fmt; + uint16_t hStartWidth; + uint16_t hSyncWidth; + uint16_t hEndWidth; + uint16_t vStartWidth; + uint16_t vSyncWidth; + uint16_t vEndWidth; + ipu_di_signal_cfg_t signal; +} ipu_sdc_panel_info; + +typedef struct _ipu_sdc_window_pos { + ipu_channel_t channel; + int16_t x_pos; + int16_t y_pos; +} ipu_sdc_window_pos; + +typedef struct _ipu_sdc_global_alpha { + bool enable; + uint8_t alpha; +} ipu_sdc_global_alpha; + +typedef struct _ipu_sdc_color_key { + ipu_channel_t channel; + bool enable; + uint32_t colorKey; +} ipu_sdc_color_key; + +typedef struct _ipu_adc_template { + display_port_t disp; + uint32_t *pCmd; + bool write; +} ipu_adc_template; + +typedef struct _ipu_adc_update { + ipu_channel_t channel; + ipu_adc_update_mode_t mode; + uint32_t refresh_rate; + unsigned long addr; + uint32_t *size; +} ipu_adc_update; + +typedef struct _ipu_adc_snoop { + uint32_t *statl; + uint32_t *stath; +} ipu_adc_snoop; + +typedef struct _ipu_adc_cmd { + display_port_t disp; + cmddata_t type; + uint32_t cmd; + uint32_t *params; + uint16_t numParams; +} ipu_adc_cmd; + +typedef struct _ipu_adc_panel { + display_port_t disp; + uint16_t width; + uint16_t height; + uint32_t pixel_fmt; + uint32_t stride; + ipu_adc_sig_cfg_t signal; + display_addressing_t addr; + uint32_t vsync_width; + vsync_t mode; +} ipu_adc_panel; + +typedef struct _ipu_adc_ifc_timing { + display_port_t disp; + bool read; + uint32_t cycle_time; + uint32_t up_time; + uint32_t down_time; + uint32_t read_latch_time; + uint32_t pixel_clk; +} ipu_adc_ifc_timing; + +typedef struct _ipu_csi_interface { + uint16_t width; + uint16_t height; + uint16_t pixel_fmt; + ipu_csi_signal_cfg_t signal; +} ipu_csi_interface; + +typedef struct _ipu_csi_mclk { + int src; + bool flag; + bool wait; +} ipu_csi_mclk; + +typedef struct _ipu_csi_window { + uint32_t left; + uint32_t top; +} ipu_csi_window; + +typedef struct _ipu_csi_window_size { + uint32_t width; + uint32_t height; +} ipu_csi_window_size; + +typedef struct _ipu_event_info { + int irq; + void *dev; +} ipu_event_info; + +typedef struct _ipu_mem_info { + dma_addr_t paddr; + void *vaddr; + int size; +} ipu_mem_info; + +/* IOCTL commands */ + +#define IPU_INIT_CHANNEL _IOW('I',0x1,ipu_channel_parm) +#define IPU_UNINIT_CHANNEL _IOW('I',0x2,ipu_channel_t) +#define IPU_INIT_CHANNEL_BUFFER _IOW('I',0x3,ipu_channel_buf_parm) +#define IPU_UPDATE_CHANNEL_BUFFER _IOW('I',0x4,ipu_channel_buf_parm) +#define IPU_SELECT_CHANNEL_BUFFER _IOW('I',0x5,ipu_channel_buf_parm) +#define IPU_LINK_CHANNELS _IOW('I',0x6,ipu_channel_link) +#define IPU_UNLINK_CHANNELS _IOW('I',0x7,ipu_channel_link) +#define IPU_ENABLE_CHANNEL _IOW('I',0x8,ipu_channel_t) +#define IPU_DISABLE_CHANNEL _IOW('I',0x9,ipu_channel_info) +#define IPU_ENABLE_IRQ _IOW('I',0xA,int) +#define IPU_DISABLE_IRQ _IOW('I',0xB,int) +#define IPU_CLEAR_IRQ _IOW('I',0xC,int) +#define IPU_FREE_IRQ _IOW('I',0xD,ipu_irq_info) +#define IPU_REQUEST_IRQ_STATUS _IOW('I',0xE,int) +#define IPU_SDC_INIT_PANEL _IOW('I',0xF,ipu_sdc_panel_info) +#define IPU_SDC_SET_WIN_POS _IOW('I',0x10,ipu_sdc_window_pos) +#define IPU_SDC_SET_GLOBAL_ALPHA _IOW('I',0x11,ipu_sdc_global_alpha) +#define IPU_SDC_SET_COLOR_KEY _IOW('I',0x12,ipu_sdc_color_key) +#define IPU_SDC_SET_BRIGHTNESS _IOW('I',0x13,int) +#define IPU_ADC_WRITE_TEMPLATE _IOW('I',0x14,ipu_adc_template) +#define IPU_ADC_UPDATE _IOW('I',0x15,ipu_adc_update) +#define IPU_ADC_SNOOP _IOW('I',0x16,ipu_adc_snoop) +#define IPU_ADC_CMD _IOW('I',0x17,ipu_adc_cmd) +#define IPU_ADC_INIT_PANEL _IOW('I',0x18,ipu_adc_panel) +#define IPU_ADC_IFC_TIMING _IOW('I',0x19,ipu_adc_ifc_timing) +#define IPU_CSI_INIT_INTERFACE _IOW('I',0x1A,ipu_csi_interface) +#define IPU_CSI_ENABLE_MCLK _IOW('I',0x1B,ipu_csi_mclk) +#define IPU_CSI_READ_MCLK_FLAG _IOR('I',0x1C,ipu_csi_mclk) +#define IPU_CSI_FLASH_STROBE _IOW('I',0x1D,ipu_csi_mclk) +#define IPU_CSI_GET_WIN_SIZE _IOR('I',0x1E,ipu_csi_window_size) +#define IPU_CSI_SET_WIN_SIZE _IOW('I',0x1F,ipu_csi_window_size) +#define IPU_CSI_SET_WINDOW _IOW('I',0x20,ipu_csi_window) +#define IPU_PF_SET_PAUSE_ROW _IOW('I',0x21, uint32_t) +#define IPU_REGISTER_GENERIC_ISR _IOW('I', 0x22, ipu_event_info) +#define IPU_GET_EVENT _IOWR('I', 0x23, ipu_event_info) +#define IPU_ALOC_MEM _IOWR('I', 0x24, ipu_mem_info) +#define IPU_FREE_MEM _IOW('I', 0x25, ipu_mem_info) +#define IPU_IS_CHAN_BUSY _IOW('I', 0x26, ipu_channel_t) +#define IPU_CALC_STRIPES_SIZE _IOWR('I', 0x27, ipu_stripe_parm) +#define IPU_UPDATE_BUF_OFFSET _IOW('I', 0x28, ipu_buf_offset_parm) + +int ipu_calc_stripes_sizes(const unsigned int input_frame_width, + unsigned int output_frame_width, + const unsigned int maximal_stripe_width, + const unsigned long long cirr, + const unsigned int equal_stripes, + u32 input_pixelformat, + u32 output_pixelformat, + struct stripe_param *left, + struct stripe_param *right); +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/Kbuild +++ linux-fsl-imx51-2.6.31/include/linux/Kbuild @@ -51,6 +51,7 @@ header-y += const.h header-y += cgroupstats.h header-y += cramfs_fs.h +header-y += cryptodev.h header-y += cycx_cfm.h header-y += dcbnl.h header-y += dlmconstants.h @@ -375,6 +376,27 @@ unifdef-y += xattr.h unifdef-y += xfrm.h +## i.MX specific files +unifdef-y += fsl_devices.h +unifdef-y += imx_adc.h +unifdef-y += ipu.h +unifdef-y += mxc_asrc.h +unifdef-y += mxc_mlb.h +unifdef-y += mxc_pf.h +unifdef-y += mxc_scc2_driver.h +unifdef-y += mxc_scc_driver.h +unifdef-y += mxc_si4702.h +unifdef-y += mxc_sim_interface.h +unifdef-y += mxc_v4l2.h +unifdef-y += mxcfb.h +unifdef-y += pmic_adc.h +unifdef-y += pmic_battery.h +unifdef-y += pmic_external.h +unifdef-y += pmic_light.h +unifdef-y += pmic_rtc.h +unifdef-y += pmic_status.h +unifdef-y += soundcard.h + objhdr-y += version.h header-y += wimax.h header-y += wimax/ --- linux-fsl-imx51-2.6.31.orig/include/linux/sched.h +++ linux-fsl-imx51-2.6.31/include/linux/sched.h @@ -372,6 +372,9 @@ arch_get_unmapped_area(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); extern unsigned long +arch_get_unmapped_exec_area(struct file *, unsigned long, unsigned long, + unsigned long, unsigned long); +extern unsigned long arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags); @@ -1296,7 +1299,7 @@ char comm[TASK_COMM_LEN]; /* executable name excluding path - access with [gs]et_task_comm (which lock it with task_lock()) - - initialized normally by flush_old_exec */ + - initialized normally by setup_new_exec */ /* file system info */ int link_count, total_link_count; #ifdef CONFIG_SYSVIPC @@ -1999,11 +2002,18 @@ return info <= SEND_SIG_FORCED; } -/* True if we are on the alternate signal stack. */ - +/* + * True if we are on the alternate signal stack. + */ static inline int on_sig_stack(unsigned long sp) { - return (sp - current->sas_ss_sp < current->sas_ss_size); +#ifdef CONFIG_STACK_GROWSUP + return sp >= current->sas_ss_sp && + sp - current->sas_ss_sp < current->sas_ss_size; +#else + return sp > current->sas_ss_sp && + sp - current->sas_ss_sp <= current->sas_ss_size; +#endif } static inline int sas_ss_flags(unsigned long sp) @@ -2476,6 +2486,28 @@ } #endif /* CONFIG_MM_OWNER */ +static inline unsigned long task_rlimit(const struct task_struct *tsk, + unsigned int limit) +{ + return ACCESS_ONCE(tsk->signal->rlim[limit].rlim_cur); +} + +static inline unsigned long task_rlimit_max(const struct task_struct *tsk, + unsigned int limit) +{ + return ACCESS_ONCE(tsk->signal->rlim[limit].rlim_max); +} + +static inline unsigned long rlimit(unsigned int limit) +{ + return task_rlimit(current, limit); +} + +static inline unsigned long rlimit_max(unsigned int limit) +{ + return task_rlimit_max(current, limit); +} + #define TASK_STATE_TO_CHAR_STR "RSDTtZX" #endif /* __KERNEL__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/ethtool.h +++ linux-fsl-imx51-2.6.31/include/linux/ethtool.h @@ -357,6 +357,8 @@ __u32 flow_type; /* The rx flow hash value or the rule DB size */ __u64 data; + /* The following fields are not valid and must not be used for + * the ETHTOOL_{G,X}RXFH commands. */ struct ethtool_rx_flow_spec fs; __u32 rule_cnt; __u32 rule_locs[0]; --- linux-fsl-imx51-2.6.31.orig/include/linux/syslog.h +++ linux-fsl-imx51-2.6.31/include/linux/syslog.h @@ -0,0 +1,29 @@ +/* Syslog internals + * + * Copyright 2010 Canonical, Ltd. + * Author: Kees Cook + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _LINUX_SYSLOG_H +#define _LINUX_SYSLOG_H + +#define SYSLOG_FROM_CALL 0 +#define SYSLOG_FROM_FILE 1 + +int do_syslog(int type, char __user *buf, int count, bool from_file); + +#endif /* _LINUX_SYSLOG_H */ --- linux-fsl-imx51-2.6.31.orig/include/linux/resource.h +++ linux-fsl-imx51-2.6.31/include/linux/resource.h @@ -55,8 +55,11 @@ /* * Limit the stack by to some sane default: root can always * increase this limit if needed.. 8MB seems reasonable. + * + * (2MB more to cover randomization effects.) */ -#define _STK_LIM (8*1024*1024) +#define _STK_LIM (10*1024*1024) +#define EXEC_STACK_BIAS (2*1024*1024) /* * GPG2 wants 64kB of mlocked memory, to make sure pass phrases --- linux-fsl-imx51-2.6.31.orig/include/linux/pci.h +++ linux-fsl-imx51-2.6.31/include/linux/pci.h @@ -560,6 +560,9 @@ resource_size_t); void pcibios_update_irq(struct pci_dev *, int irq); +/* Weak but can be overriden by arch */ +void pci_fixup_cardbus(struct pci_bus *); + /* Generic PCI functions used internally */ extern struct pci_bus *pci_find_bus(int domain, int busnr); --- linux-fsl-imx51-2.6.31.orig/include/linux/random.h +++ linux-fsl-imx51-2.6.31/include/linux/random.h @@ -53,17 +53,6 @@ extern void get_random_bytes(void *buf, int nbytes); void generate_random_uuid(unsigned char uuid_out[16]); -extern __u32 secure_ip_id(__be32 daddr); -extern u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); -extern u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, - __be16 dport); -extern __u32 secure_tcp_sequence_number(__be32 saddr, __be32 daddr, - __be16 sport, __be16 dport); -extern __u32 secure_tcpv6_sequence_number(__be32 *saddr, __be32 *daddr, - __be16 sport, __be16 dport); -extern u64 secure_dccp_sequence_number(__be32 saddr, __be32 daddr, - __be16 sport, __be16 dport); - #ifndef MODULE extern const struct file_operations random_fops, urandom_fops; #endif --- linux-fsl-imx51-2.6.31.orig/include/linux/pid.h +++ linux-fsl-imx51-2.6.31/include/linux/pid.h @@ -117,7 +117,7 @@ */ extern struct pid *find_get_pid(int nr); extern struct pid *find_ge_pid(int nr, struct pid_namespace *); -int next_pidmap(struct pid_namespace *pid_ns, int last); +int next_pidmap(struct pid_namespace *pid_ns, unsigned int last); extern struct pid *alloc_pid(struct pid_namespace *ns); extern void free_pid(struct pid *pid); --- linux-fsl-imx51-2.6.31.orig/include/linux/mxc_pf.h +++ linux-fsl-imx51-2.6.31/include/linux/mxc_pf.h @@ -0,0 +1,125 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @defgroup MXC_PF MPEG4/H.264 Post Filter Driver + */ +/*! + * @file arch-mxc/mxc_pf.h + * + * @brief MXC IPU MPEG4/H.264 Post-filtering driver + * + * User-level API for IPU Hardware MPEG4/H.264 Post-filtering. + * + * @ingroup MXC_PF + */ +#ifndef __INCLUDED_MXC_PF_H__ +#define __INCLUDED_MXC_PF_H__ + +#define PF_MAX_BUFFER_CNT 17 + +#define PF_WAIT_Y 0x0001 +#define PF_WAIT_U 0x0002 +#define PF_WAIT_V 0x0004 +#define PF_WAIT_ALL (PF_WAIT_Y|PF_WAIT_U|PF_WAIT_V) + +/*! + * Structure for Post Filter initialization parameters. + */ +typedef struct { + uint16_t pf_mode; /*!< Post filter operation mode */ + uint16_t width; /*!< Width of frame in pixels */ + uint16_t height; /*!< Height of frame in pixels */ + uint16_t stride; /*!< Stride of Y plane in pixels. Stride for U and V planes is half Y stride */ + uint32_t qp_size; + unsigned long qp_paddr; +} pf_init_params; + +/*! + * Structure for Post Filter buffer request parameters. + */ +typedef struct { + int count; /*!< Number of buffers requested */ + __u32 req_size; +} pf_reqbufs_params; + +/*! + * Structure for Post Filter buffer request parameters. + */ +typedef struct { + int index; + int size; /*!< Size of buffer allocated */ + __u32 offset; /*!< Buffer offset in driver memory. Set by QUERYBUF */ + __u32 y_offset; /*!< Optional starting relative offset of Y data + from beginning of buffer. Set to 0 to use default + calculated based on height and stride */ + __u32 u_offset; /*!< Optional starting relative offset of U data + from beginning of buffer. Set to 0 to use default + calculated based on height and stride */ + __u32 v_offset; /*!< Optional starting relative offset of V data + from beginning of buffer. Set to 0 to use default + calculated based on height and stride */ +} pf_buf; + +/*! + * Structure for Post Filter start parameters. + */ +typedef struct { + pf_buf in; /*!< Input buffer address and offsets */ + pf_buf out; /*!< Output buffer address and offsets */ + int qp_buf; + int wait; + uint32_t h264_pause_row; /*!< Row to pause at for H.264 mode. 0 to disable pause */ +} pf_start_params; + +/*! @name User Client Ioctl Interface */ +/*! @{ */ + +/*! + * IOCTL to Initialize the Post Filter. + */ +#define PF_IOCTL_INIT _IOW('F',0x0, pf_init_params) + +/*! + * IOCTL to Uninitialize the Post Filter. + */ +#define PF_IOCTL_UNINIT _IO('F',0x1) + +/*! + * IOCTL to set the buffer mode and allocate buffers if driver allocated. + */ +#define PF_IOCTL_REQBUFS _IOWR('F',0x2, pf_reqbufs_params) + +/*! + * IOCTL to set the buffer mode and allocate buffers if driver allocated. + */ +#define PF_IOCTL_QUERYBUF _IOR('F',0x2, pf_buf) + +/*! + * IOCTL to start post filtering on a frame of data. This ioctl may block until + * processing is done or return immediately. + */ +#define PF_IOCTL_START _IOWR('F',0x3, pf_start_params) + +/*! + * IOCTL to resume post-filtering after an intra frame pause in H.264 mode. + */ +#define PF_IOCTL_RESUME _IOW('F',0x4, int) + +/*! + * IOCTL to wait for post-filtering to complete. + */ +#define PF_IOCTL_WAIT _IOW('F',0x5, int) +/*! @} */ + +#endif /* __INCLUDED_MXC_PF_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/pmic_battery.h +++ linux-fsl-imx51-2.6.31/include/linux/pmic_battery.h @@ -0,0 +1,419 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_BATTERY_H__ +#define __ASM_ARCH_MXC_PMIC_BATTERY_H__ + +/*! + * @defgroup PMIC_BATTERY PMIC Battery Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_battery.h + * @brief This is the header of PMIC Battery driver. + * + * @ingroup PMIC_BATTERY + */ + +#include +#include +#include + +/*! + * @name IOCTL user space interface + */ + +/*! @{ */ +/*! + * Enable and disable charger. + * Argument type: pointer to t_charger_setting + */ +#define PMIC_BATT_CHARGER_CONTROL _IOW('p', 0xc0, int) +/*! + * Set charger configuration. + * Argument type: pointer to t_charger_setting + */ +#define PMIC_BATT_SET_CHARGER _IOW('p', 0xc1, int) +/*! + * Get charger configuration. + * Argument type: pointer to t_charger_setting + */ +#define PMIC_BATT_GET_CHARGER _IOR('p', 0xc2, int) +/*! + * Get charger current. + * Argument type: pointer to t_charger_setting + */ +#define PMIC_BATT_GET_CHARGER_CURRENT _IOR('p', 0xc3, int) +/*! + * Set EOL control + * Argument type: pointer to t_eol_setting + */ +#define PMIC_BATT_EOL_CONTROL _IOW('p', 0xc4, int) +/*! + * Enable and disable charging LED. + * Argument type: bool + */ +#define PMIC_BATT_LED_CONTROL _IOW('p', 0xc5, int) +/*! + * Enable and disable reverse supply. + * Argument type: bool + */ +#define PMIC_BATT_REV_SUPP_CONTROL _IOW('p', 0xc6, int) +/*! + * Enable and disable unregulated charging mode. + * Argument type: bool + */ +#define PMIC_BATT_UNREG_CONTROL _IOW('p', 0xc7, int) + +/*! + * Set the output controls. + * Argument type: t_control + */ +#define PMIC_BATT_SET_OUT_CONTROL _IOW('p', 0xc8, int) +/*! + * Set the over voltage threshold. + * Argument type: int + */ +#define PMIC_BATT_SET_THRESHOLD _IOW('p', 0xc9, int) + +/*! + * Get the charger voltage. + * Argument type: int + */ +#define PMIC_BATT_GET_CHARGER_VOLTAGE _IOR('p', 0xca, int) +/*! + * Get the battery voltage. + * Argument type: int + */ +#define PMIC_BATT_GET_BATTERY_VOLTAGE _IOR('p', 0xcb, int) +/*! + * Get the battery current. + * Argument type: int + */ +#define PMIC_BATT_GET_BATTERY_CURRENT _IOR('p', 0xcc, int) +/*! + * Get the charger sensor. + * Argument type: int + */ +#define PMIC_BATT_GET_CHARGER_SENSOR _IOR('p', 0xcd, int) +/*! + * Get the battery temperature. + * Argument type: int + */ +#define PMIC_BATT_GET_BATTERY_TEMPERATURE _IOR('p', 0xce, int) +/*! @} */ + +/*! + * This enumeration defines battery chargers. + */ +typedef enum { + BATT_MAIN_CHGR = 0, /*!< Main battery charger */ + BATT_CELL_CHGR, /*!< Cell battery charger */ + BATT_TRCKLE_CHGR /*!< Trickle charger (only available on mc13783) */ +} t_batt_charger; + +/*! + * This enumeration defines the bp threshold. + */ +typedef enum { + BATT_BP_0 = 0, /*!< LOBATL UVDET + 0.2 */ + BATT_BP_1, /*!< LOBATL UVDET + 0.3 */ + BATT_BP_2, /*!< LOBATL UVDET + 0.4 */ + BATT_BP_3 /*!< LOBATL UVDET + 0.5 */ +} t_bp_threshold; + +/*! + * This enumeration of all types of output controls + */ +typedef enum { + /*! + * controlled hardware + */ + CONTROL_HARDWARE = 0, + /*! + * BPFET is driven low, BATTFET is driven high + */ + CONTROL_BPFET_LOW, + /*! + * BPFET is driven high, BATTFET is driven low + */ + CONTROL_BPFET_HIGH, +} t_control; + +/*! + * This enumeration define all battery interrupt + */ +typedef enum { + /*! + * Charge detection interrupt + */ + BAT_IT_CHG_DET, + /*! + * Charge over voltage detection it + */ + BAT_IT_CHG_OVERVOLT, + /*! + * Charge path reverse current it + */ + BAT_IT_CHG_REVERSE, + /*! + * Charge path short circuitin revers supply mode it + */ + BAT_IT_CHG_SHORT_CIRCUIT, + /*! + * Charger has switched its mode (CC to CV or CV to CC) + */ + BAT_IT_CCCV, + /*! + * Charge current has dropped below its threshold + */ + BAT_IT_BELOW_THRESHOLD, +} t_batt_event; + +/*! + * This structure is used for the following battery changer control + * IOCTLs: + * - PMIC_BATT_CHARGER_CONTROL + * - PMIC_BATT_SET_CHARGER + * - PMIC_BATT_GET_CHARGER + */ +typedef struct { + /*! + * Charger + */ + t_batt_charger chgr; + /*! + * Turn on charger + */ + bool on; + /*! + * Charging voltage + */ + unsigned char c_voltage; + /*! + * Charging current + */ + unsigned char c_current; +} t_charger_setting; + +/*! + * This structure is used for EOL setting IOCTL PMIC_BATT_EOL_CONTROL + */ +typedef struct { + /*! + * Enable EOL comparator + */ + bool enable; + /*! + * c_voltage threshold - Used on SC55112 + */ + unsigned char threshold; + /*! + * bp threshold - Used on mc13783 + */ + t_bp_threshold typical; +} t_eol_setting; + +/* EXPORTED FUNCTIONS */ + +#ifdef __KERNEL__ + +/*START: for 3ds hw event*/ +/*! + * Battery event type enum + */ +enum { + BAT_EVENT_CHARGER_PLUG = 0x01, + BAT_EVENT_CHARGER_UNPLUG = 0x02, + BAT_EVENT_CHARGER_OVERVOLTAGE = 0x04, + BAT_EVENT_BATTERY_LOW = 0x08, + BAT_EVENT_POWER_FAILED = 0x10, + BAT_EVENT_CHARGER_FULL = 0x20, +} t_bat_event; +/*END: for 3ds hw event*/ + +/*! + * This function is used to start charging a battery. For different charger, + * different c_voltage and current range are supported. \n + * + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Charging voltage. + * @param c_current Charging current. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_enable_charger(t_batt_charger chgr, + unsigned char c_voltage, + unsigned char c_current); + +/*! + * This function turns off a charger. + * + * @param chgr Charger as defined in \b t_batt_charger. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_disable_charger(t_batt_charger chgr); + +/*! + * This function is used to change the charger setting. + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Charging voltage. + * @param c_current Charging current. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_charger(t_batt_charger chgr, + unsigned char c_voltage, + unsigned char c_current); + +/*! + * This function is used to retrieve the charger setting. + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Output parameter for charging c_voltage setting. + * @param c_current Output parameter for charging current setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_charger_setting(t_batt_charger chgr, + unsigned char *c_voltage, + unsigned char *c_current); + +/*! + * This function is retrieves the main battery charging current. + * + * @param c_current Output parameter for charging current setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_batt_get_charge_current(unsigned short *c_current); + +/*! + * This function enables End-of-Life comparator. + * + * @param threshold End-of-Life threshold. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_enable_eol(unsigned char threshold); + +/*! + * This function enables End-of-Life comparator. + * + * @param typical Falling Edge Threshold threshold. + * @verbatim + BPDET UVDET LOBATL + ____ _____ ___________ + 0 2.6 UVDET + 0.2 + 1 2.6 UVDET + 0.3 + 2 2.6 UVDET + 0.4 + 3 2.6 UVDET + 0.5 + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_bp_enable_eol(t_bp_threshold typical); + +/*! + * This function disables End-of-Life comparator. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_disable_eol(void); + +/*! + * This function sets the output controls. + * It sets the FETOVRD and FETCTRL bits of mc13783 + * + * @param control type of control. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_set_out_control(t_control control); + +/*! + * This function sets over voltage threshold. + * + * @param threshold value of over voltage threshold. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_set_threshold(int threshold); + +/*! + * This function controls charge LED. + * + * @param on If on is true, LED will be turned on, + * or otherwise, LED will be turned off. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_led_control(bool on); + +/*! + * This function sets reverse supply mode. + * + * @param enable If enable is true, reverse supply mode is enable, + * or otherwise, reverse supply mode is disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_reverse_supply(bool enable); + +/*! + * This function sets unregulated charging mode on main battery. + * + * @param enable If enable is true, unregulated charging mode is + * enable, or otherwise, disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_unregulated(bool enable); + +/*! + * This function sets a 5K pull down at CHRGRAW. + * To be used in the dual path charging configuration. + * + * @param enable If enable is true, 5k pull down is + * enable, or otherwise, disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_5k_pull(bool enable); + +/*! + * This function is used to subscribe on battery event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_event_subscribe(t_batt_event event, void *callback); + +/*! + * This function is used to un subscribe on battery event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_event_unsubscribe(t_batt_event event, void *callback); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_PMIC_BATTERY_H__ */ --- linux-fsl-imx51-2.6.31.orig/include/linux/netdevice.h +++ linux-fsl-imx51-2.6.31/include/linux/netdevice.h @@ -1152,9 +1152,12 @@ static inline void *skb_gro_header_slow(struct sk_buff *skb, unsigned int hlen, unsigned int offset) { + if (!pskb_may_pull(skb, hlen)) + return NULL; + NAPI_GRO_CB(skb)->frag0 = NULL; NAPI_GRO_CB(skb)->frag0_len = 0; - return pskb_may_pull(skb, hlen) ? skb->data + offset : NULL; + return skb->data + offset; } static inline void *skb_gro_mac_header(struct sk_buff *skb) --- linux-fsl-imx51-2.6.31.orig/include/linux/mxcfb.h +++ linux-fsl-imx51-2.6.31/include/linux/mxcfb.h @@ -0,0 +1,92 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/* + * @file arch-mxc/ mxcfb.h + * + * @brief Global header file for the MXC Frame buffer + * + * @ingroup Framebuffer + */ +#ifndef __ASM_ARCH_MXCFB_H__ +#define __ASM_ARCH_MXCFB_H__ + +#include + +#define FB_SYNC_OE_LOW_ACT 0x80000000 +#define FB_SYNC_CLK_LAT_FALL 0x40000000 +#define FB_SYNC_DATA_INVERT 0x20000000 +#define FB_SYNC_CLK_IDLE_EN 0x10000000 +#define FB_SYNC_SHARP_MODE 0x08000000 +#define FB_SYNC_SWAP_RGB 0x04000000 + +struct mxcfb_gbl_alpha { + int enable; + int alpha; +}; + +struct mxcfb_loc_alpha { + int enable; + int alpha_in_pixel; + unsigned long alpha_phy_addr0; + unsigned long alpha_phy_addr1; +}; + +struct mxcfb_color_key { + int enable; + __u32 color_key; +}; + +struct mxcfb_pos { + __u16 x; + __u16 y; +}; + +struct mxcfb_gamma { + int enable; + int constk[16]; + int slopek[16]; +}; + +#define MXCFB_WAIT_FOR_VSYNC _IOW('F', 0x20, u_int32_t) +#define MXCFB_SET_GBL_ALPHA _IOW('F', 0x21, struct mxcfb_gbl_alpha) +#define MXCFB_SET_CLR_KEY _IOW('F', 0x22, struct mxcfb_color_key) +#define MXCFB_SET_OVERLAY_POS _IOWR('F', 0x24, struct mxcfb_pos) +#define MXCFB_GET_FB_IPU_CHAN _IOR('F', 0x25, u_int32_t) +#define MXCFB_SET_LOC_ALPHA _IOWR('F', 0x26, struct mxcfb_loc_alpha) +#define MXCFB_SET_LOC_ALP_BUF _IOW('F', 0x27, unsigned long) +#define MXCFB_SET_GAMMA _IOW('F', 0x28, struct mxcfb_gamma) + +#ifdef __KERNEL__ + +extern struct fb_videomode mxcfb_modedb[]; +extern int mxcfb_modedb_sz; + +enum { + MXCFB_REFRESH_OFF, + MXCFB_REFRESH_AUTO, + MXCFB_REFRESH_PARTIAL, +}; + +struct mxcfb_rect { + u32 top; + u32 left; + u32 width; + u32 height; +}; + +int mxcfb_set_refresh_mode(struct fb_info *fbi, int mode, + struct mxcfb_rect *update_region); + +#endif /* __KERNEL__ */ +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mtd/nand.h +++ linux-fsl-imx51-2.6.31/include/linux/mtd/nand.h @@ -43,8 +43,8 @@ * is supported now. If you add a chip with bigger oobsize/page * adjust this accordingly. */ -#define NAND_MAX_OOBSIZE 128 -#define NAND_MAX_PAGESIZE 4096 +#define NAND_MAX_OOBSIZE (218 * NAND_MAX_CHIPS) +#define NAND_MAX_PAGESIZE (4096 * NAND_MAX_CHIPS) /* * Constants for hardware specific CLE/ALE/NCE function @@ -434,6 +434,8 @@ #define NAND_MFR_HYNIX 0xad #define NAND_MFR_MICRON 0x2c #define NAND_MFR_AMD 0x01 +#define NAND_MFR_SANDISK 0x45 +#define NAND_MFR_INTEL 0x89 /** * struct nand_flash_dev - NAND Flash Device ID Structure @@ -546,7 +548,10 @@ int allowbbt); extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, uint8_t * buf); - +extern int nand_do_read_ops(struct mtd_info *mtd, loff_t from, + struct mtd_oob_ops *ops); +extern int nand_do_write_ops(struct mtd_info *mtd, loff_t to, + struct mtd_oob_ops *ops); /* * Constants for oob configuration */ --- linux-fsl-imx51-2.6.31.orig/include/linux/netfilter/Kbuild +++ linux-fsl-imx51-2.6.31/include/linux/netfilter/Kbuild @@ -38,6 +38,8 @@ header-y += xt_pkttype.h header-y += xt_quota.h header-y += xt_rateest.h +header-y += xt_policy.h +header-y += xt_quota.h header-y += xt_realm.h header-y += xt_recent.h header-y += xt_sctp.h --- linux-fsl-imx51-2.6.31.orig/include/linux/nfsd/state.h +++ linux-fsl-imx51-2.6.31/include/linux/nfsd/state.h @@ -89,7 +89,6 @@ /* RPC client info */ atomic_t cb_set; /* successful CB_NULL call */ struct rpc_clnt * cb_client; - struct rpc_cred * cb_cred; }; /* Maximum number of slots per session. 128 is useful for long haul TCP */ @@ -345,6 +344,7 @@ extern __be32 nfs4_check_open_reclaim(clientid_t *clid); extern void put_nfs4_client(struct nfs4_client *clp); extern void nfs4_free_stateowner(struct kref *kref); +extern int set_callback_cred(void); extern void nfsd4_probe_callback(struct nfs4_client *clp); extern void nfsd4_cb_recall(struct nfs4_delegation *dp); extern void nfs4_put_delegation(struct nfs4_delegation *dp); --- linux-fsl-imx51-2.6.31.orig/include/linux/sunrpc/sched.h +++ linux-fsl-imx51-2.6.31/include/linux/sunrpc/sched.h @@ -55,6 +55,7 @@ struct rpc_message tk_msg; /* RPC call info */ __u8 tk_garb_retry; __u8 tk_cred_retry; + __u8 tk_rebind_retry; /* * callback to be executed after waking up --- linux-fsl-imx51-2.6.31.orig/include/linux/regulator/machine.h +++ linux-fsl-imx51-2.6.31/include/linux/regulator/machine.h @@ -126,13 +126,18 @@ /** * struct regulator_consumer_supply - supply -> device mapping * - * This maps a supply name to a device. + * This maps a supply name to a device. Only one of dev or dev_name + * can be specified. Use of dev_name allows support for buses which + * make struct device available late such as I2C and is the preferred + * form. * * @dev: Device structure for the consumer. + * @dev_name: Result of dev_name() for the consumer. * @supply: Name for the supply. */ struct regulator_consumer_supply { struct device *dev; /* consumer */ + const char *dev_name; /* dev_name() for consumer */ const char *supply; /* consumer supply - e.g. "vcc" */ }; --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/wm8350/audio.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/wm8350/audio.h @@ -603,6 +603,8 @@ int drain_msecs; /* OFF drain time */ int cap_discharge_msecs; /* Cap ON (from OFF) discharge time */ int vmid_charge_msecs; /* vmid power up time */ + char *regulator1; + char *regulator2; u32 vmid_s_curve:2; /* vmid enable s curve speed */ u32 dis_out4:2; /* out4 discharge speed */ u32 dis_out3:2; /* out3 discharge speed */ --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/wm8350/bl.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/wm8350/bl.h @@ -0,0 +1,32 @@ +/* + * bl.h -- Backlight Driver for Wolfson WM8350 PMIC + * + * Copyright 2009 Wolfson Microelectronics PLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __LINUX_MFD_WM8350_BL_H_ +#define __LINUX_MFD_WM8350_BL_H_ + +#include + +/* + * WM8350 Backlight platform data + */ +struct wm8350_bl_platform_data { + int isink; + int dcdc; + int voltage_ramp; + int retries; + int max_brightness; + int power; + int brightness; + int (*check_fb)(struct fb_info *); +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/mc9s08dz60/pmic.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/mc9s08dz60/pmic.h @@ -0,0 +1,82 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +#ifndef __LINUX_MCU_PMIC_H_ +#define __LINUX_MCU_PMIC_H_ + +enum { + + /*reg names for mcu */ + REG_MCU_VERSION = 0, + REG_MCU_SECS, + REG_MCU_MINS, + REG_MCU_HRS, + REG_MCU_DAY, + REG_MCU_DATE, + REG_MCU_MONTH, + REG_MCU_YEAR, + REG_MCU_ALARM_SECS, + REG_MCU_ALARM_MINS, + REG_MCU_ALARM_HRS, + REG_MCU_TS_CONTROL, + REG_MCU_X_LOW, + REG_MCU_Y_LOW, + REG_MCU_XY_HIGH, + REG_MCU_X_LEFT_LOW, + REG_MCU_X_LEFT_HIGH, + REG_MCU_X_RIGHT, + REG_MCU_Y_TOP_LOW, + REG_MCU_Y_TOP_HIGH, + REG_MCU_Y_BOTTOM, + REG_MCU_RESET_1, + REG_MCU_RESET_2, + REG_MCU_POWER_CTL, + REG_MCU_DELAY_CONFIG, + REG_MCU_GPIO_1, + REG_MCU_GPIO_2, + REG_MCU_KPD_1, + REG_MCU_KPD_2, + REG_MCU_KPD_CONTROL, + REG_MCU_INT_ENABLE_1, + REG_MCU_INT_ENABLE_2, + REG_MCU_INT_FLAG_1, + REG_MCU_INT_FLAG_2, + REG_MCU_DES_FLAG, +}; + +enum { + + MCU_GPIO_REG_RESET_1, + MCU_GPIO_REG_RESET_2, + MCU_GPIO_REG_POWER_CONTROL, + MCU_GPIO_REG_GPIO_CONTROL_1, + MCU_GPIO_REG_GPIO_CONTROL_2, +}; + +int pmic_gpio_set_bit_val(int reg, unsigned int bit, + unsigned int val); + +int pmic_gpio_get_bit_val(int reg, unsigned int bit, + unsigned int *val); + +int pmic_gpio_get_designation_bit_val(unsigned int bit, + unsigned int *val); + + +int mcu_pmic_read_reg(int reg, unsigned int *reg_value, + unsigned int reg_mask); + +int mcu_pmic_write_reg(int reg, unsigned int reg_value, + unsigned int reg_mask); +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/mc9s08dz60/core.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/mc9s08dz60/core.h @@ -0,0 +1,59 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __LINUX_MFD_MC13892_CORE_H_ +#define __LINUX_MFD_MC13892_CORE_H_ + +#include +#include +#include + +#define MC9S08DZ60_LCD 0 +#define MC9S08DZ60_WIFI 1 +#define MC9S08DZ60_HDD 2 +#define MC9S08DZ60_GPS 3 +#define MC9S08DZ60_SPKR 4 +#define MC9S08DZ60_REG_NUM 5 + +struct mc9s08dz60; +struct regulator_init_data; + +struct mc9s08dz60_platform_data { + int (*init)(struct mc9s08dz60 *); +}; + +struct mc9s08dz60_pmic { + /* regulator devices */ + struct platform_device *pdev[MC9S08DZ60_REG_NUM]; +}; + +struct mc9s08dz60 { + int rev; /* chip revision */ + + struct device *dev; + + /* device IO */ + union { + struct i2c_client *i2c_client; + struct spi_device *spi_device; + }; + u16 *reg_cache; + + /* Client devices */ + struct mc9s08dz60_pmic pmic; +}; + +int mc9s08dz60_register_regulator(struct mc9s08dz60 *mc9s08dz60, int reg, + struct regulator_init_data *initdata); + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/mc13783/core.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/mc13783/core.h @@ -0,0 +1,72 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __LINUX_MFD_MC13783_CORE_H_ +#define __LINUX_MFD_MC13783_CORE_H_ + +#include + +/*! + * brief PMIC regulators. + */ +#define MC13783_SW1A 0 +#define MC13783_SW1B 1 +#define MC13783_SW2A 2 +#define MC13783_SW2B 3 +#define MC13783_SW3 4 +#define MC13783_VAUDIO 5 +#define MC13783_VIOHI 6 +#define MC13783_VIOLO 7 +#define MC13783_VDIG 8 +#define MC13783_VGEN 9 +#define MC13783_VRFDIG 10 +#define MC13783_VRFREF 11 +#define MC13783_VRFCP 12 +#define MC13783_VSIM 13 +#define MC13783_VESIM 14 +#define MC13783_VCAM 15 +#define MC13783_VRFBG 16 +#define MC13783_VVIB 17 +#define MC13783_VRF1 18 +#define MC13783_VRF2 19 +#define MC13783_VMMC1 20 +#define MC13783_VMMC2 21 +#define MC13783_GPO1 22 +#define MC13783_GPO2 23 +#define MC13783_GPO3 24 +#define MC13783_GPO4 25 +#define MC13783_REG_NUM 26 + +struct mc13783; +struct regulator_init_data; + +struct mc13783_pmic { + /* regulator devices */ + struct platform_device *pdev[MC13783_REG_NUM]; +}; + +struct mc13783 { + int rev; /* chip revision */ + + struct device *dev; + + u16 *reg_cache; + + /* Client devices */ + struct mc13783_pmic pmic; +}; + +int mc13783_register_regulator(struct mc13783 *mc13783, int reg, + struct regulator_init_data *initdata); + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/mc13892/core.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/mc13892/core.h @@ -0,0 +1,77 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __LINUX_MFD_MC13892_CORE_H_ +#define __LINUX_MFD_MC13892_CORE_H_ + +#include +#include +#include + +#define MC13892_SW1 0 +#define MC13892_SW2 1 +#define MC13892_SW3 2 +#define MC13892_SW4 3 +#define MC13892_SWBST 4 +#define MC13892_VIOHI 5 +#define MC13892_VPLL 6 +#define MC13892_VDIG 7 +#define MC13892_VSD 8 +#define MC13892_VUSB2 9 +#define MC13892_VVIDEO 10 +#define MC13892_VAUDIO 11 +#define MC13892_VCAM 12 +#define MC13892_VGEN1 13 +#define MC13892_VGEN2 14 +#define MC13892_VGEN3 15 +#define MC13892_VUSB 16 +#define MC13892_GPO1 17 +#define MC13892_GPO2 18 +#define MC13892_GPO3 19 +#define MC13892_GPO4 20 +#define MC13892_PWGT1 21 +#define MC13892_PWGT2 22 +#define MC13892_REG_NUM 23 + +struct mc13892; +struct regulator_init_data; + +struct mc13892_platform_data { + int (*init)(struct mc13892 *); +}; + +struct mc13892_pmic { + /* regulator devices */ + struct platform_device *pdev[MC13892_REG_NUM]; +}; + +struct mc13892 { + int rev; /* chip revision */ + + struct device *dev; + + /* device IO */ + union { + struct i2c_client *i2c_client; + struct spi_device *spi_device; + }; + u16 *reg_cache; + + /* Client devices */ + struct mc13892_pmic pmic; +}; + +int mc13892_register_regulator(struct mc13892 *mc13892, int reg, + struct regulator_init_data *initdata); + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/mfd/mc34704/core.h +++ linux-fsl-imx51-2.6.31/include/linux/mfd/mc34704/core.h @@ -0,0 +1,84 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __LINUX_MFD_MC34704_CORE_H_ +#define __LINUX_MFD_MC34704_CORE_H_ + +#include +#include +#include + +#define MC34704_BKLT 0 /* REG1 5V for Backlight */ +#define MC34704_CPU 1 /* REG2 3.3V for CPU & CPU board peripherals */ +#define MC34704_CORE 2 /* REG3 1.45V for CPU Core */ +#define MC34704_DDR 3 /* REG4 1.8V for DDR */ +#define MC34704_PERS 4 /* REG5 3.3V for Personality board */ +#define MC34704_REG6 5 /* REG6 not used */ +#define MC34704_REG7 6 /* REG7 not used */ +#define MC34704_REG8 7 /* REG8 not used */ +#define MC34704_REG_NUM 8 + +/* Regulator voltages in mV and dynamic voltage scaling limits in percent */ + +#define REG1_V_MV 5000 +#define REG1_DVS_MIN_PCT (-10) +#define REG1_DVS_MAX_PCT 10 + +#define REG2_V_MV 3300 +#define REG2_DVS_MIN_PCT (-20) +#define REG2_DVS_MAX_PCT 17.5 + +#define REG3_V_MV 1450 +#define REG3_DVS_MIN_PCT (-20) +#define REG3_DVS_MAX_PCT 17.5 + +#define REG4_V_MV 1800 +#define REG4_DVS_MIN_PCT (-20) +#define REG4_DVS_MAX_PCT 17.5 + +#define REG5_V_MV 3300 +#define REG5_DVS_MIN_PCT (-20) +#define REG5_DVS_MAX_PCT 17.5 + +struct mc34704; +struct regulator_init_data; + +struct mc34704_platform_data { + int (*init) (struct mc34704 *); +}; + +struct mc34704_pmic { + /* regulator devices */ + struct platform_device *pdev[MC34704_REG_NUM]; +}; + +struct mc34704 { + int rev; /* chip revision */ + + struct device *dev; + + /* device IO */ + union { + struct i2c_client *i2c_client; + struct spi_device *spi_device; + }; + u16 *reg_cache; + + /* Client devices */ + struct mc34704_pmic pmic; +}; + +int mc34704_register_regulator(struct mc34704 *mc34704, int reg, + struct regulator_init_data *initdata); + +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/usb/usbnet.h +++ linux-fsl-imx51-2.6.31/include/linux/usb/usbnet.h @@ -86,6 +86,7 @@ #define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */ #define FLAG_WLAN 0x0080 /* use "wlan%d" names */ +#define FLAG_SEND_ZLP 0x0200 /* hw requires ZLPs are sent */ /* init device ... can sleep, or cause probe() failure */ --- linux-fsl-imx51-2.6.31.orig/include/linux/usb/ehci_def.h +++ linux-fsl-imx51-2.6.31/include/linux/usb/ehci_def.h @@ -100,7 +100,8 @@ /* PORTSC: offset 0x44 */ u32 port_status [0]; /* up to N_PORTS */ -/* 31:23 reserved */ +/* 31:24 reserved */ +#define PORT_PHCD (1<<23) /* PHY Low Power Suspend */ #define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */ #define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */ #define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */ --- linux-fsl-imx51-2.6.31.orig/include/linux/usb/fsl_xcvr.h +++ linux-fsl-imx51-2.6.31/include/linux/usb/fsl_xcvr.h @@ -0,0 +1,44 @@ +#ifndef __LINUX_USB_FSL_XCVR_H +#define __LINUX_USB_FSL_XCVR_H +#include +#include + +struct fsl_usb2_platform_data; + +enum usb_test_mode{ + USB_TEST_J = 1, + USB_TEST_K = 2, +}; + +/** + * @name: transceiver name + * @xcvr_type: one of PORTSC_PTS_{UTMI,SERIAL,ULPI} + * @init: transceiver- and board-specific initialization function + * @uninit: transceiver- and board-specific uninitialization function + * @set_host: + * @set_device: + * @pullup: enable or disable D+ pullup + * + */ +struct fsl_xcvr_ops { + char *name; + u32 xcvr_type; + + void (*init)(struct fsl_xcvr_ops *ops); + void (*uninit)(struct fsl_xcvr_ops *ops); + void (*suspend)(struct fsl_xcvr_ops *ops); + void (*set_host)(void); + void (*set_device)(void); + void (*set_vbus_power)(struct fsl_xcvr_ops *ops, + struct fsl_usb2_platform_data *pdata, int on); + void (*set_remote_wakeup)(u32 *view); + void (*pullup)(int on); + void(*set_test_mode)(u32 *view, enum usb_test_mode mode); +}; + +struct fsl_xcvr_power { + struct platform_device *usb_pdev; + struct regulator *regu1; + struct regulator *regu2; +}; +#endif --- linux-fsl-imx51-2.6.31.orig/include/linux/usb/serial.h +++ linux-fsl-imx51-2.6.31/include/linux/usb/serial.h @@ -148,6 +148,7 @@ struct usb_interface *interface; unsigned char disconnected:1; unsigned char suspending:1; + unsigned char attached:1; unsigned char minor; unsigned char num_ports; unsigned char num_port_pointers; @@ -257,10 +258,15 @@ int (*tiocmget)(struct tty_struct *tty, struct file *file); int (*tiocmset)(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear); + int (*get_icount)(struct tty_struct *tty, + struct serial_icounter_struct *icount); /* Called by the tty layer for port level work. There may or may not be an attached tty at this point */ void (*dtr_rts)(struct usb_serial_port *port, int on); int (*carrier_raised)(struct usb_serial_port *port); + /* Called by the usb serial hooks to allow the user to rework the + termios state */ + void (*init_termios)(struct tty_struct *tty); /* USB events */ void (*read_int_callback)(struct urb *urb); void (*write_int_callback)(struct urb *urb); --- linux-fsl-imx51-2.6.31.orig/include/net/x25.h +++ linux-fsl-imx51-2.6.31/include/net/x25.h @@ -182,6 +182,10 @@ extern int sysctl_x25_ack_holdback_timeout; extern int sysctl_x25_forward; +extern int x25_parse_address_block(struct sk_buff *skb, + struct x25_address *called_addr, + struct x25_address *calling_addr); + extern int x25_addr_ntoa(unsigned char *, struct x25_address *, struct x25_address *); extern int x25_addr_aton(unsigned char *, struct x25_address *, --- linux-fsl-imx51-2.6.31.orig/include/net/mac80211.h +++ linux-fsl-imx51-2.6.31/include/net/mac80211.h @@ -1244,6 +1244,12 @@ * * These flags are used with the ampdu_action() callback in * &struct ieee80211_ops to indicate which action is needed. + * + * Note that drivers MUST be able to deal with a TX aggregation + * session being stopped even before they OK'ed starting it by + * calling ieee80211_start_tx_ba_cb(_irqsafe), because the peer + * might receive the addBA frame and send a delBA right away! + * * @IEEE80211_AMPDU_RX_START: start Rx aggregation * @IEEE80211_AMPDU_RX_STOP: stop Rx aggregation * @IEEE80211_AMPDU_TX_START: start Tx aggregation --- linux-fsl-imx51-2.6.31.orig/include/net/rose.h +++ linux-fsl-imx51-2.6.31/include/net/rose.h @@ -14,6 +14,12 @@ #define ROSE_MIN_LEN 3 +#define ROSE_CALL_REQ_ADDR_LEN_OFF 3 +#define ROSE_CALL_REQ_ADDR_LEN_VAL 0xAA /* each address is 10 digits */ +#define ROSE_CALL_REQ_DEST_ADDR_OFF 4 +#define ROSE_CALL_REQ_SRC_ADDR_OFF 9 +#define ROSE_CALL_REQ_FACILITIES_OFF 14 + #define ROSE_GFI 0x10 #define ROSE_Q_BIT 0x80 #define ROSE_D_BIT 0x40 @@ -214,7 +220,7 @@ extern int rose_validate_nr(struct sock *, unsigned short); extern void rose_write_internal(struct sock *, int); extern int rose_decode(struct sk_buff *, int *, int *, int *, int *, int *); -extern int rose_parse_facilities(unsigned char *, struct rose_facilities_struct *); +extern int rose_parse_facilities(unsigned char *, unsigned int, struct rose_facilities_struct *); extern void rose_disconnect(struct sock *, int, int, int); /* rose_timer.c */ --- linux-fsl-imx51-2.6.31.orig/include/net/netlink.h +++ linux-fsl-imx51-2.6.31/include/net/netlink.h @@ -384,7 +384,7 @@ * * Returns the first attribute which matches the specified type. */ -static inline struct nlattr *nlmsg_find_attr(struct nlmsghdr *nlh, +static inline struct nlattr *nlmsg_find_attr(const struct nlmsghdr *nlh, int hdrlen, int attrtype) { return nla_find(nlmsg_attrdata(nlh, hdrlen), --- linux-fsl-imx51-2.6.31.orig/include/net/secure_seq.h +++ linux-fsl-imx51-2.6.31/include/net/secure_seq.h @@ -0,0 +1,20 @@ +#ifndef _NET_SECURE_SEQ +#define _NET_SECURE_SEQ + +#include + +extern __u32 secure_ip_id(__be32 daddr); +extern __u32 secure_ipv6_id(const __be32 daddr[4]); +extern u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); +extern u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, + __be16 dport); +extern __u32 secure_tcp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport); +extern __u32 secure_tcpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport); +extern u64 secure_dccp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport); +extern u64 secure_dccpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport); + +#endif /* _NET_SECURE_SEQ */ --- linux-fsl-imx51-2.6.31.orig/include/net/ipv6.h +++ linux-fsl-imx51-2.6.31/include/net/ipv6.h @@ -354,8 +354,15 @@ struct inet_frag_queue; +enum ip6_defrag_users { + IP6_DEFRAG_LOCAL_DELIVER, + IP6_DEFRAG_CONNTRACK_IN, + IP6_DEFRAG_CONNTRACK_OUT, +}; + struct ip6_create_arg { __be32 id; + u32 user; struct in6_addr *src; struct in6_addr *dst; }; @@ -441,6 +448,8 @@ return __ipv6_addr_diff(a1, a2, sizeof(struct in6_addr)); } +extern void ipv6_select_ident(struct frag_hdr *fhdr, struct rt6_info *rt); + /* * Prototypes exported by ipv6 */ --- linux-fsl-imx51-2.6.31.orig/include/net/transp_v6.h +++ linux-fsl-imx51-2.6.31/include/net/transp_v6.h @@ -16,6 +16,8 @@ struct flowi; +extern void initialize_hashidentrnd(void); + /* extention headers */ extern int ipv6_exthdrs_init(void); extern void ipv6_exthdrs_exit(void); --- linux-fsl-imx51-2.6.31.orig/include/net/sock.h +++ linux-fsl-imx51-2.6.31/include/net/sock.h @@ -242,6 +242,7 @@ struct { struct sk_buff *head; struct sk_buff *tail; + int len; } sk_backlog; wait_queue_head_t *sk_sleep; struct dst_entry *sk_dst_cache; @@ -561,8 +562,8 @@ return sk->sk_wmem_queued < sk->sk_sndbuf; } -/* The per-socket spinlock must be held here. */ -static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb) +/* OOB backlog add */ +static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb) { if (!sk->sk_backlog.tail) { sk->sk_backlog.head = sk->sk_backlog.tail = skb; @@ -573,6 +574,27 @@ skb->next = NULL; } +/* + * Take into account size of receive queue and backlog queue + */ +static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb) +{ + unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc); + + return qsize + skb->truesize > sk->sk_rcvbuf; +} + +/* The per-socket spinlock must be held here. */ +static inline int sk_add_backlog(struct sock *sk, struct sk_buff *skb) +{ + if (sk_rcvqueues_full(sk, skb)) + return -ENOBUFS; + + __sk_add_backlog(sk, skb); + sk->sk_backlog.len += skb->truesize; + return 0; +} + static inline int sk_backlog_rcv(struct sock *sk, struct sk_buff *skb) { return sk->sk_backlog_rcv(sk, skb); --- linux-fsl-imx51-2.6.31.orig/include/net/netfilter/nf_conntrack.h +++ linux-fsl-imx51-2.6.31/include/net/netfilter/nf_conntrack.h @@ -255,11 +255,9 @@ } /* These are for NAT. Icky. */ -/* Update TCP window tracking data when NAT mangles the packet */ -extern void nf_conntrack_tcp_update(const struct sk_buff *skb, - unsigned int dataoff, - struct nf_conn *ct, int dir, - s16 offset); +extern s16 (*nf_ct_nat_offset)(const struct nf_conn *ct, + enum ip_conntrack_dir dir, + u32 seq); /* Fake conntrack entry for untracked connections */ extern struct nf_conn nf_conntrack_untracked; --- linux-fsl-imx51-2.6.31.orig/include/net/netfilter/nf_nat_helper.h +++ linux-fsl-imx51-2.6.31/include/net/netfilter/nf_nat_helper.h @@ -32,4 +32,8 @@ * to port ct->master->saved_proto. */ extern void nf_nat_follow_master(struct nf_conn *ct, struct nf_conntrack_expect *this); + +extern s16 nf_nat_get_offset(const struct nf_conn *ct, + enum ip_conntrack_dir dir, + u32 seq); #endif --- linux-fsl-imx51-2.6.31.orig/include/net/netfilter/ipv6/nf_conntrack_ipv6.h +++ linux-fsl-imx51-2.6.31/include/net/netfilter/ipv6/nf_conntrack_ipv6.h @@ -9,7 +9,7 @@ extern int nf_ct_frag6_init(void); extern void nf_ct_frag6_cleanup(void); -extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb); +extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user); extern void nf_ct_frag6_output(unsigned int hooknum, struct sk_buff *skb, struct net_device *in, struct net_device *out, --- linux-fsl-imx51-2.6.31.orig/include/net/sctp/sm.h +++ linux-fsl-imx51-2.6.31/include/net/sctp/sm.h @@ -278,6 +278,7 @@ /* 2nd level prototypes */ void sctp_generate_t3_rtx_event(unsigned long peer); void sctp_generate_heartbeat_event(unsigned long peer); +void sctp_generate_proto_unreach_event(unsigned long peer); void sctp_ootb_pkt_free(struct sctp_packet *); --- linux-fsl-imx51-2.6.31.orig/include/net/sctp/structs.h +++ linux-fsl-imx51-2.6.31/include/net/sctp/structs.h @@ -761,6 +761,7 @@ struct iovec *data); void sctp_chunk_free(struct sctp_chunk *); void *sctp_addto_chunk(struct sctp_chunk *, int len, const void *data); +void *sctp_addto_chunk_fixed(struct sctp_chunk *, int len, const void *data); struct sctp_chunk *sctp_chunkify(struct sk_buff *, const struct sctp_association *, struct sock *); @@ -1007,6 +1008,9 @@ /* Heartbeat timer is per destination. */ struct timer_list hb_timer; + /* Timer to handle ICMP proto unreachable envets */ + struct timer_list proto_unreach_timer; + /* Since we're using per-destination retransmission timers * (see above), we're also using per-destination "transmitted" * queues. This probably ought to be a private struct --- linux-fsl-imx51-2.6.31.orig/include/net/bluetooth/hci_core.h +++ linux-fsl-imx51-2.6.31/include/net/bluetooth/hci_core.h @@ -187,6 +187,7 @@ struct work_struct work_del; struct device dev; + atomic_t devref; struct hci_dev *hdev; void *l2cap_data; @@ -339,6 +340,9 @@ void hci_conn_enter_active_mode(struct hci_conn *conn); void hci_conn_enter_sniff_mode(struct hci_conn *conn); +void hci_conn_hold_device(struct hci_conn *conn); +void hci_conn_put_device(struct hci_conn *conn); + static inline void hci_conn_hold(struct hci_conn *conn) { atomic_inc(&conn->refcnt); --- linux-fsl-imx51-2.6.31.orig/include/scsi/scsi_host.h +++ linux-fsl-imx51-2.6.31/include/scsi/scsi_host.h @@ -677,6 +677,12 @@ void *shost_data; /* + * Points to the physical bus device we'd use to do DMA + * Needed just in case we have virtual hosts. + */ + struct device *dma_dev; + + /* * We should ensure that this is aligned, both for better performance * and also because some compilers (m68k) don't automatically force * alignment to a long boundary. @@ -720,7 +726,9 @@ extern void scsi_flush_work(struct Scsi_Host *); extern struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *, int); -extern int __must_check scsi_add_host(struct Scsi_Host *, struct device *); +extern int __must_check scsi_add_host_with_dma(struct Scsi_Host *, + struct device *, + struct device *); extern void scsi_scan_host(struct Scsi_Host *); extern void scsi_rescan_device(struct device *); extern void scsi_remove_host(struct Scsi_Host *); @@ -731,6 +739,12 @@ extern u64 scsi_calculate_bounce_limit(struct Scsi_Host *); +static inline int __must_check scsi_add_host(struct Scsi_Host *host, + struct device *dev) +{ + return scsi_add_host_with_dma(host, dev, dev); +} + static inline struct device *scsi_get_device(struct Scsi_Host *shost) { return shost->shost_gendev.parent; --- linux-fsl-imx51-2.6.31.orig/include/scsi/osd_protocol.h +++ linux-fsl-imx51-2.6.31/include/scsi/osd_protocol.h @@ -17,6 +17,7 @@ #define __OSD_PROTOCOL_H__ #include +#include #include #include --- linux-fsl-imx51-2.6.31.orig/crypto/cryptodev.c +++ linux-fsl-imx51-2.6.31/crypto/cryptodev.c @@ -0,0 +1,558 @@ +/* + * Driver for /dev/crypto device (aka CryptoDev) + * + * Copyright (c) 2004 Michal Ludvig , SuSE Labs + * + * Device /dev/crypto provides an interface for + * accessing kernel CryptoAPI algorithms (ciphers, + * hashes) from userspace programs. + * + * /dev/crypto interface was originally introduced in + * OpenBSD and this module attempts to keep the API, + * although a bit extended. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_AUTHOR("Michal Ludvig "); +MODULE_DESCRIPTION("CryptoDev driver"); +MODULE_LICENSE("Dual BSD/GPL"); + +/* ====== Compile-time config ====== */ + +#define CRYPTODEV_STATS + +/* ====== Module parameters ====== */ + +static int verbosity = 0; +module_param(verbosity, int, 0644); +MODULE_PARM_DESC(verbosity, "0: normal, 1: verbose, 2: debug"); + +#ifdef CRYPTODEV_STATS +static int enable_stats = 0; +module_param(enable_stats, int, 0644); +MODULE_PARM_DESC(enable_stats, "collect statictics about cryptodev usage"); +#endif + +/* ====== Debug helpers ====== */ + +#define PFX "cryptodev: " +#define dprintk(level,severity,format,a...) \ + do { \ + if (level <= verbosity) \ + printk(severity PFX "%s[%u]: " format, \ + current->comm, current->pid, \ + ##a); \ + } while (0) + +/* ====== CryptoAPI ====== */ + +struct csession { + struct list_head entry; + struct semaphore sem; + struct crypto_blkcipher *tfm; + uint32_t sid; +#ifdef CRYPTODEV_STATS +#if ! ((COP_ENCRYPT < 2) && (COP_DECRYPT < 2)) +#error Struct csession.stat uses COP_{ENCRYPT,DECRYPT} as indices. Do something! +#endif + unsigned long long stat[2]; + size_t stat_max_size, stat_count; +#endif +}; + +struct fcrypt { + struct list_head list; + struct semaphore sem; +}; + +/* Prepare session for future use. */ +static int +crypto_create_session(struct fcrypt *fcr, struct session_op *sop) +{ + struct csession *ses_new, *ses_ptr; + struct crypto_blkcipher *tfm; + int ret = 0; + char alg_name[MAX_ALG_NAME_LEN+1]; + char alg_full_name[MAX_ALG_NAME_LEN+1]; + const char *mode; + u8 *keyp; + + /* Does the request make sense? */ + if (!sop->cipher == !sop->mac) { + dprintk(1, KERN_DEBUG, "Both 'cipher' and 'mac' set or unset.\n"); + return -EINVAL; + } + + /* Copy-in the algorithm name if necessary. */ + if (!sop->alg_namelen) { + /* Hmm, compatibility with OpenBSD CRYPTO_* constants... + Should we support it? */ + dprintk(2, KERN_DEBUG, "OpenBSD constants are not (yet?) supported.\n"); + return -EINVAL; + } + + if(sop->alg_namelen > MAX_ALG_NAME_LEN) { + dprintk(1, KERN_DEBUG, "Algorithm name too long (%zu > %u)\n", + sop->alg_namelen, MAX_ALG_NAME_LEN); + return -EINVAL; + } + + copy_from_user(alg_name, sop->alg_name, sop->alg_namelen); + alg_name[sop->alg_namelen] = '\0'; + + if(!sop->cipher) { + dprintk(2, KERN_DEBUG, "Hashes are not yet supported.\n"); + return -EINVAL; + } + + switch (sop->cipher & CRYPTO_FLAG_MASK) { + case CRYPTO_FLAG_ECB: mode = "ebc"; break; + case CRYPTO_FLAG_CBC: mode = "cbc"; break; + case CRYPTO_FLAG_CFB: mode = "cfb"; break; + case CRYPTO_FLAG_CTR: mode = "ctr"; break; +#if 0 + /* These modes are not yet supported. */ + case CRYPTO_FLAG_OFB: mode = "ofb"; break; +#endif + default: return -EINVAL; + } + snprintf(alg_full_name, sizeof(alg_full_name) - 1, "%s(%s)", mode, alg_name); + + /* Set-up crypto transform. */ + tfm = crypto_alloc_blkcipher(alg_full_name, 0, 0); + if (!tfm) { + dprintk(1, KERN_DEBUG, "Failed to load transform for %s %s\n", + alg_name, mode); + return -EINVAL; + } + +#if 0 + /* Was correct key length supplied? */ + if ((sop->keylen < crypto_tfm_alg_min_keysize(tfm)) || + (sop->keylen > crypto_tfm_alg_max_keysize(tfm))) { + dprintk(1, KERN_DEBUG, + "Wrong keylen '%zu' for algorithm '%s'. Use %u to %u.\n", + sop->keylen, alg_name, crypto_tfm_alg_min_keysize(tfm), + crypto_tfm_alg_max_keysize(tfm)); + crypto_free_blkcipher(tfm); + return -EINVAL; + } +#endif + + /* Copy the key from user and set to TFM. */ + keyp = kmalloc(sop->keylen, GFP_KERNEL); + if (keyp == NULL) { + dprintk(1, KERN_ERR, + "Unable to allocate key buffer.\n"); + crypto_free_blkcipher(tfm); + return -ENOMEM; + } + copy_from_user(keyp, sop->key, sop->keylen); + ret = crypto_blkcipher_setkey(tfm, keyp, sop->keylen); + kfree(keyp); + if (ret) { + dprintk(2, KERN_DEBUG, + "Setting key failed for %s-%zu-%s: flags=0x%X\n", + alg_name, sop->keylen*8, mode, crypto_blkcipher_tfm(tfm)->crt_flags); + dprintk(2, KERN_DEBUG, + "(see CRYPTO_TFM_RES_* in for details)\n"); + crypto_free_blkcipher(tfm); + return -EINVAL; + } + + /* Create a session and put it to the list. */ + ses_new = kmalloc(sizeof(*ses_new), GFP_KERNEL); + if(!ses_new) + return -ENOMEM; + + memset(ses_new, 0, sizeof(*ses_new)); + get_random_bytes(&ses_new->sid, sizeof(ses_new->sid)); + ses_new->tfm = tfm; + init_MUTEX(&ses_new->sem); + + down(&fcr->sem); +restart: + list_for_each_entry(ses_ptr, &fcr->list, entry) { + /* Check for duplicate SID */ + if (unlikely(ses_new->sid == ses_ptr->sid)) { + get_random_bytes(&ses_new->sid, sizeof(ses_new->sid)); + /* Unless we have a broken RNG this + shouldn't loop forever... ;-) */ + goto restart; + } + } + + list_add(&ses_new->entry, &fcr->list); + up(&fcr->sem); + + dprintk(2, KERN_DEBUG, "Added session 0x%08X (%s-%zu-%s)\n", + ses_new->sid, alg_name, sop->keylen*8, mode); + + /* Fill in some values for the user. */ + sop->ses = ses_new->sid; + sop->blocksize = crypto_blkcipher_blocksize(tfm); + + return 0; +} + +/* Everything that needs to be done when remowing a session. */ +static inline void +crypto_destroy_session(struct csession *ses_ptr) +{ + if(down_trylock(&ses_ptr->sem)) { + dprintk(2, KERN_DEBUG, "Waiting for semaphore of sid=0x%08X\n", + ses_ptr->sid); + down(&ses_ptr->sem); + } + dprintk(2, KERN_DEBUG, "Removed session 0x%08X\n", ses_ptr->sid); +#if defined(CRYPTODEV_STATS) + if(enable_stats) + dprintk(2, KERN_DEBUG, + "Usage in Bytes: enc=%llu, dec=%llu, max=%zu, avg=%lu, cnt=%zu\n", + ses_ptr->stat[COP_ENCRYPT], ses_ptr->stat[COP_DECRYPT], + ses_ptr->stat_max_size, ses_ptr->stat_count > 0 + ? ((unsigned long)(ses_ptr->stat[COP_ENCRYPT]+ + ses_ptr->stat[COP_DECRYPT]) / + ses_ptr->stat_count) : 0, + ses_ptr->stat_count); +#endif + crypto_free_blkcipher(ses_ptr->tfm); + ses_ptr->tfm = NULL; + up(&ses_ptr->sem); + kfree(ses_ptr); +} + +/* Look up a session by ID and remove. */ +static int +crypto_finish_session(struct fcrypt *fcr, uint32_t sid) +{ + struct csession *tmp, *ses_ptr; + struct list_head *head; + int ret = 0; + + down(&fcr->sem); + head = &fcr->list; + list_for_each_entry_safe(ses_ptr, tmp, head, entry) { + if(ses_ptr->sid == sid) { + list_del(&ses_ptr->entry); + crypto_destroy_session(ses_ptr); + break; + } + } + + if (!ses_ptr) { + dprintk(1, KERN_ERR, "Session with sid=0x%08X not found!\n", sid); + ret = -ENOENT; + } + up(&fcr->sem); + + return ret; +} + +/* Remove all sessions when closing the file */ +static int +crypto_finish_all_sessions(struct fcrypt *fcr) +{ + struct csession *tmp, *ses_ptr; + + down(&fcr->sem); + list_for_each_entry_safe(ses_ptr, tmp, &fcr->list, entry) { + list_del(&ses_ptr->entry); + crypto_destroy_session(ses_ptr); + } + up(&fcr->sem); + + return 0; +} + +/* Look up session by session ID. The returned session is locked. */ +static struct csession * +crypto_get_session_by_sid(struct fcrypt *fcr, uint32_t sid) +{ + struct csession *ses_ptr; + + down(&fcr->sem); + list_for_each_entry(ses_ptr, &fcr->list, entry) { + if(ses_ptr->sid == sid) { + down(&ses_ptr->sem); + break; + } + } + up(&fcr->sem); + + return ses_ptr; +} + +/* This is the main crypto function - feed it with plaintext + and get a ciphertext (or vice versa :-) */ +static int +crypto_run(struct fcrypt *fcr, struct crypt_op *cop) +{ + char *data, *ivp; + char __user *src, __user *dst; + struct scatterlist sg; + struct csession *ses_ptr; + unsigned int ivsize; + size_t nbytes, bufsize; + int ret = 0; + struct blkcipher_desc desc; + + nbytes = cop->len; + + if (cop->op != COP_ENCRYPT && cop->op != COP_DECRYPT) { + dprintk(1, KERN_DEBUG, "invalid operation op=%u\n", cop->op); + return -EINVAL; + } + + ses_ptr = crypto_get_session_by_sid(fcr, cop->ses); + if (!ses_ptr) { + dprintk(1, KERN_ERR, "invalid session ID=0x%08X\n", cop->ses); + return -EINVAL; + } + + if (nbytes % crypto_blkcipher_blocksize(ses_ptr->tfm)) { + dprintk(1, KERN_ERR, + "data size (%zu) isn't a multiple of block size (%u)\n", + nbytes, crypto_blkcipher_blocksize(ses_ptr->tfm)); + ret = -EINVAL; + goto out_unlock; + } + + bufsize = PAGE_SIZE < nbytes ? PAGE_SIZE : nbytes; + data = (char*)__get_free_page(GFP_KERNEL); + + if (unlikely(!data)) { + ret = -ENOMEM; + goto out_unlock; + } + + ivsize = crypto_blkcipher_ivsize(ses_ptr->tfm); + + ivp = kmalloc(ivsize, GFP_KERNEL); + if (unlikely(!ivp)) { + free_page((unsigned long)data); + ret = -ENOMEM; + goto out_unlock; + } + + if (cop->iv) { + copy_from_user(ivp, cop->iv, ivsize); + crypto_blkcipher_set_iv(ses_ptr->tfm, ivp, ivsize); + } + + src = cop->src; + dst = cop->dst; + + desc.tfm = ses_ptr->tfm; + desc.info = NULL; + desc.flags = 0; + + while (nbytes > 0) { + size_t current_len = nbytes > bufsize ? bufsize : nbytes; + + copy_from_user(data, src, current_len); + + sg_set_buf(&sg, data, current_len); + + if (cop->op == COP_DECRYPT) + ret = crypto_blkcipher_decrypt(&desc, &sg, &sg, current_len); + else + ret = crypto_blkcipher_encrypt(&desc, &sg, &sg, current_len); + + if (unlikely(ret)) { + dprintk(0, KERN_ERR, "CryptoAPI failure: flags=0x%x\n", + crypto_blkcipher_tfm(ses_ptr->tfm)->crt_flags); + goto out; + } + + copy_to_user(dst, data, current_len); + + nbytes -= current_len; + src += current_len; + dst += current_len; + } + +#if defined(CRYPTODEV_STATS) + if (enable_stats) { + /* this is safe - we check cop->op at the function entry */ + ses_ptr->stat[cop->op] += cop->len; + if (ses_ptr->stat_max_size < cop->len) + ses_ptr->stat_max_size = cop->len; + ses_ptr->stat_count++; + } +#endif + +out: + free_page((unsigned long)data); + + kfree(ivp); + +out_unlock: + up(&ses_ptr->sem); + + return ret; +} + +/* ====== /dev/crypto ====== */ + +static int +cryptodev_open(struct inode *inode, struct file *filp) +{ + struct fcrypt *fcr; + + fcr = kmalloc(sizeof(*fcr), GFP_KERNEL); + if(!fcr) + return -ENOMEM; + + memset(fcr, 0, sizeof(*fcr)); + init_MUTEX(&fcr->sem); + INIT_LIST_HEAD(&fcr->list); + filp->private_data = fcr; + + return 0; +} + +static int +cryptodev_release(struct inode *inode, struct file *filp) +{ + struct fcrypt *fcr = filp->private_data; + + if(fcr) { + crypto_finish_all_sessions(fcr); + kfree(fcr); + filp->private_data = NULL; + } + return 0; +} + +static int +clonefd(struct file *filp) +{ + int fd; + + fd = get_unused_fd(); + if (fd >= 0) { + get_file(filp); + fd_install(fd, filp); + } + + return fd; +} + +static int +cryptodev_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + struct session_op sop; + struct crypt_op cop; + struct fcrypt *fcr = filp->private_data; + uint32_t ses; + int ret, fd; + + if (!fcr) + BUG(); + + switch (cmd) { + case CRIOGET: + fd = clonefd(filp); + put_user(fd, (int*)arg); + return 0; + + case CIOCGSESSION: + copy_from_user(&sop, (void*)arg, sizeof(sop)); + ret = crypto_create_session(fcr, &sop); + if (ret) + return ret; + copy_to_user((void*)arg, &sop, sizeof(sop)); + return 0; + + case CIOCFSESSION: + get_user(ses, (uint32_t*)arg); + ret = crypto_finish_session(fcr, ses); + return ret; + + case CIOCCRYPT: + copy_from_user(&cop, (void*)arg, sizeof(cop)); + ret = crypto_run(fcr, &cop); + copy_to_user((void*)arg, &cop, sizeof(cop)); + return ret; + + default: + return -EINVAL; + } +} + +struct file_operations cryptodev_fops = { + .owner = THIS_MODULE, + .open = cryptodev_open, + .release = cryptodev_release, + .ioctl = cryptodev_ioctl, +}; + +struct miscdevice cryptodev = { + .minor = CRYPTODEV_MINOR, + .name = "crypto", + .fops = &cryptodev_fops, +}; + +static int +cryptodev_register(void) +{ + int rc; + + rc = misc_register (&cryptodev); + if (rc) { + printk(KERN_ERR PFX "registeration of /dev/crypto failed\n"); + return rc; + } + + return 0; +} + +static void +cryptodev_deregister(void) +{ + misc_deregister(&cryptodev); +} + +/* ====== Module init/exit ====== */ + +int __init +init_cryptodev(void) +{ + int rc; + + rc = cryptodev_register(); + if (rc) + return rc; + + printk(KERN_INFO PFX "driver loaded.\n"); + + return 0; +} + +void __exit +exit_cryptodev(void) +{ + cryptodev_deregister(); + printk(KERN_INFO PFX "driver unloaded.\n"); +} + +module_init(init_cryptodev); +module_exit(exit_cryptodev); --- linux-fsl-imx51-2.6.31.orig/crypto/Kconfig +++ linux-fsl-imx51-2.6.31/crypto/Kconfig @@ -143,6 +143,14 @@ help Quick & dirty crypto test module. +config CRYPTO_CRYPTODEV + tristate "Cryptodev (/dev/crypto) interface" + depends on CRYPTO + select CRYPTO_ALGAPI + help + Device /dev/crypto gives userspace programs access to + kernel crypto algorithms. + comment "Authenticated Encryption with Associated Data" config CRYPTO_CCM --- linux-fsl-imx51-2.6.31.orig/crypto/md5.c +++ linux-fsl-imx51-2.6.31/crypto/md5.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #define MD5_DIGEST_SIZE 16 @@ -27,103 +28,12 @@ #define MD5_BLOCK_WORDS 16 #define MD5_HASH_WORDS 4 -#define F1(x, y, z) (z ^ (x & (y ^ z))) -#define F2(x, y, z) F1(z, x, y) -#define F3(x, y, z) (x ^ y ^ z) -#define F4(x, y, z) (y ^ (x | ~z)) - -#define MD5STEP(f, w, x, y, z, in, s) \ - (w += f(x, y, z) + in, w = (w<>(32-s)) + x) - struct md5_ctx { u32 hash[MD5_HASH_WORDS]; u32 block[MD5_BLOCK_WORDS]; u64 byte_count; }; -static void md5_transform(u32 *hash, u32 const *in) -{ - u32 a, b, c, d; - - a = hash[0]; - b = hash[1]; - c = hash[2]; - d = hash[3]; - - MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); - MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12); - MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17); - MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22); - MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); - MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12); - MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17); - MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22); - MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7); - MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12); - MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17); - MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22); - MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7); - MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12); - MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17); - MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22); - - MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5); - MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9); - MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14); - MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20); - MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5); - MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9); - MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14); - MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20); - MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5); - MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9); - MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14); - MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20); - MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5); - MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9); - MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14); - MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20); - - MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4); - MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11); - MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16); - MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23); - MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4); - MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11); - MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16); - MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23); - MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4); - MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11); - MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16); - MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23); - MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4); - MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11); - MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16); - MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23); - - MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); - MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); - MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); - MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); - MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); - MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); - MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); - MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); - MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); - MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10); - MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15); - MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21); - MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6); - MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10); - MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15); - MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21); - - hash[0] += a; - hash[1] += b; - hash[2] += c; - hash[3] += d; -} - /* XXX: this stuff can be optimized */ static inline void le32_to_cpu_array(u32 *buf, unsigned int words) { --- linux-fsl-imx51-2.6.31.orig/crypto/Makefile +++ linux-fsl-imx51-2.6.31/crypto/Makefile @@ -84,6 +84,8 @@ obj-$(CONFIG_CRYPTO_ANSI_CPRNG) += ansi_cprng.o obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o +obj-$(CONFIG_CRYPTO_CRYPTODEV) += cryptodev.o + # # generic algorithms and the async_tx api # --- linux-fsl-imx51-2.6.31.orig/drivers/Makefile +++ linux-fsl-imx51-2.6.31/drivers/Makefile @@ -72,6 +72,7 @@ obj-$(CONFIG_I2O) += message/ obj-$(CONFIG_RTC_LIB) += rtc/ obj-y += i2c/ media/ +obj-$(CONFIG_I2C_SLAVE) += i2c-slave/ obj-$(CONFIG_PPS) += pps/ obj-$(CONFIG_W1) += w1/ obj-$(CONFIG_POWER_SUPPLY) += power/ @@ -90,6 +91,7 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq/ obj-$(CONFIG_CPU_IDLE) += cpuidle/ obj-y += idle/ +obj-$(CONFIG_ARCH_MXC) += mxc/ obj-$(CONFIG_MMC) += mmc/ obj-$(CONFIG_MEMSTICK) += memstick/ obj-$(CONFIG_NEW_LEDS) += leds/ --- linux-fsl-imx51-2.6.31.orig/drivers/misc/sgi-gru/gruprocfs.c +++ linux-fsl-imx51-2.6.31/drivers/misc/sgi-gru/gruprocfs.c @@ -161,14 +161,15 @@ static ssize_t options_write(struct file *file, const char __user *userbuf, size_t count, loff_t *data) { - unsigned long val; - char buf[80]; + char buf[20]; - if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) + memset(buf, 0, sizeof(buf)); + if (count >= sizeof(buf)) + return -EINVAL; + if (copy_from_user(buf, userbuf, count)) return -EFAULT; - buf[count - 1] = '\0'; - if (!strict_strtoul(buf, 10, &val)) - gru_options = val; + if (strict_strtoul(buf, 0, &gru_options)) + return -EINVAL; return count; } --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/ofpart.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/ofpart.c @@ -46,21 +46,12 @@ const u32 *reg; int len; - /* check if this is a partition node */ - partname = of_get_property(pp, "name", &len); - if (strcmp(partname, "partition") != 0) { + reg = of_get_property(pp, "reg", &len); + if (!reg) { nr_parts--; continue; } - reg = of_get_property(pp, "reg", &len); - if (!reg || (len != 2 * sizeof(u32))) { - of_node_put(pp); - dev_err(dev, "Invalid 'reg' on %s\n", node->full_name); - kfree(*pparts); - *pparts = NULL; - return -EINVAL; - } (*pparts)[i].offset = reg[0]; (*pparts)[i].size = reg[1]; @@ -75,6 +66,14 @@ i++; } + if (!i) { + of_node_put(pp); + dev_err(dev, "No valid partition found on %s\n", node->full_name); + kfree(*pparts); + *pparts = NULL; + return -EINVAL; + } + return nr_parts; } EXPORT_SYMBOL(of_mtd_parse_partitions); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mtd/Kconfig @@ -329,4 +329,12 @@ source "drivers/mtd/ubi/Kconfig" +config MTD_UBI_BLOCK + tristate "Simple mtdblock-like FTL over UBI volumes" + depends on MTD_UBI + select MTD_BLKDEVS + default n + help + This enables cached block access to UBI volumes + endif # MTD --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/mtd_blkdevs.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/mtd_blkdevs.c @@ -137,6 +137,24 @@ wake_up_process(tr->blkcore_priv->thread); } +static int blktrans_mtd_get(struct mtd_info *mtd) +{ + if (mtd) { + if (!get_mtd_device(mtd, mtd->index)) + return -ENODEV; + mtd->usecount++; + } + return 0; +} + +static int blktrans_mtd_put(struct mtd_info *mtd) +{ + if (mtd) { + mtd->usecount--; + put_mtd_device(mtd); + } + return 0; +} static int blktrans_open(struct block_device *bdev, fmode_t mode) { @@ -144,25 +162,25 @@ struct mtd_blktrans_ops *tr = dev->tr; int ret = -ENODEV; - if (!get_mtd_device(NULL, dev->mtd->index)) + if (!try_module_get(tr->owner)) goto out; - if (!try_module_get(tr->owner)) + ret = blktrans_mtd_get(dev->mtd); + if (ret < 0) goto out_tr; - /* FIXME: Locking. A hot pluggable device can go away - (del_mtd_device can be called for it) without its module - being unloaded. */ - dev->mtd->usecount++; - ret = 0; + if (tr->open && (ret = tr->open(dev))) { - dev->mtd->usecount--; - put_mtd_device(dev->mtd); - out_tr: - module_put(tr->owner); + blktrans_mtd_put(dev->mtd); + goto out_tr; } - out: + + return 0; + +out_tr: + module_put(tr->owner); +out: return ret; } @@ -176,8 +194,7 @@ ret = tr->release(dev); if (!ret) { - dev->mtd->usecount--; - put_mtd_device(dev->mtd); + blktrans_mtd_put(dev->mtd); module_put(tr->owner); } @@ -291,7 +308,8 @@ gd->private_data = new; new->blkcore_priv = gd; gd->queue = tr->blkcore_priv->rq; - gd->driverfs_dev = &new->mtd->dev; + if (new->mtd) + gd->driverfs_dev = &new->mtd->dev; if (new->readonly) set_disk_ro(gd, 1); @@ -360,13 +378,15 @@ mutex_lock(&mtd_table_mutex); ret = register_blkdev(tr->major, tr->name); - if (ret) { + if (ret < 0) { printk(KERN_WARNING "Unable to register %s block device on major %d: %d\n", tr->name, tr->major, ret); kfree(tr->blkcore_priv); mutex_unlock(&mtd_table_mutex); return ret; } + if (!tr->major) + tr->major = ret; spin_lock_init(&tr->blkcore_priv->queue_lock); tr->blkcore_priv->rq = blk_init_queue(mtd_blktrans_request, &tr->blkcore_priv->queue_lock); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/Makefile @@ -32,3 +32,4 @@ obj-y += chips/ lpddr/ maps/ devices/ nand/ onenand/ tests/ obj-$(CONFIG_MTD_UBI) += ubi/ +obj-$(CONFIG_MTD_UBI_BLOCK) += ubiblock.o --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/ubiblock.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/ubiblock.c @@ -0,0 +1,589 @@ +/* + * Direct UBI block device access + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc. All Rights Reserved. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + * Based on mtdblock by: + * (C) 2000-2003 Nicolas Pitre + * (C) 1999-2003 David Woodhouse + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mtdcore.h" + +static LIST_HEAD(ubiblk_devices); + +/** + * ubiblk_dev - the structure representing translation layer + * + * @m: interface to mtd_blktrans + * @ubi_num: UBI device number + * @ubi_vol: UBI volume ID + * @usecount: reference count + * + * @cache_mutex: protects access to cache_data + * @cache_data: content of the cached LEB + * @cache_offset: offset of cached data on UBI volume, in bytes + * @cache_size: cache size in bytes, usually equal to LEB size + */ +struct ubiblk_dev { + struct mtd_blktrans_dev m; + + int ubi_num; + int ubi_vol; + int usecount; + struct ubi_volume_desc *ubi; + + struct mutex cache_mutex; + unsigned char *cache_data; + unsigned long cache_offset; + unsigned int cache_size; + + enum { + STATE_EMPTY, + STATE_CLEAN, + STATE_DIRTY + } cache_state; + + struct list_head list; + + struct work_struct unbind; +}; + +static int ubiblock_open(struct mtd_blktrans_dev *mbd); +static int ubiblock_release(struct mtd_blktrans_dev *mbd); +static int ubiblock_flush(struct mtd_blktrans_dev *mbd); +static int ubiblock_readsect(struct mtd_blktrans_dev *mbd, + unsigned long block, char *buf); +static int ubiblock_writesect(struct mtd_blktrans_dev *mbd, + unsigned long block, char *buf); +static int ubiblock_getgeo(struct mtd_blktrans_dev *mbd, + struct hd_geometry *geo); +static void *ubiblk_add(int ubi_num, int ubi_vol_id); +static void *ubiblk_add_locked(int ubi_num, int ubi_vol_id); +static int ubiblk_del(struct ubiblk_dev *u); +static int ubiblk_del_locked(struct ubiblk_dev *u); + +/* + * These two routines are just to satify mtd_blkdev's requirements + */ +static void ubiblock_add_mtd(struct mtd_blktrans_ops *tr, struct mtd_info *mtd) +{ + return; +} + +static void ubiblock_remove_dev(struct mtd_blktrans_dev *mbd) +{ + return; +} + +static struct mtd_blktrans_ops ubiblock_tr = { + + .name = "ubiblk", + .major = 0, /* assign dynamically */ + .part_bits = 3, /* allow up to 8 parts */ + .blksize = 512, + + .open = ubiblock_open, + .release = ubiblock_release, + .flush = ubiblock_flush, + .readsect = ubiblock_readsect, + .writesect = ubiblock_writesect, + .getgeo = ubiblock_getgeo, + + .add_mtd = ubiblock_add_mtd, + .remove_dev = ubiblock_remove_dev, + .owner = THIS_MODULE, +}; + +static int ubiblock_getgeo(struct mtd_blktrans_dev *bdev, + struct hd_geometry *geo) +{ + return -ENOTTY; +} + +/** + * ubiblk_write_cached_data - flush the cache to the UBI volume + */ +static int ubiblk_write_cached_data(struct ubiblk_dev *u) +{ + int ret; + + if (u->cache_state != STATE_DIRTY) + return 0; + + pr_debug("%s: volume %d:%d, writing at %lx of size %x\n", + __func__, u->ubi_num, u->ubi_vol, + u->cache_offset, u->cache_size); + + ret = ubi_write(u->ubi, u->cache_offset / u->cache_size, + u->cache_data, 0, u->cache_size); + pr_debug("leb_write status %d\n", ret); + + u->cache_state = STATE_EMPTY; + return ret; +} + +/** + * ubiblk_do_cached_write - cached write the data to the UBI volume + * + * @u: ubiblk_dev + * @pos: offset on the block device + * @len: buffer length + * @buf: buffer itself + * + * if buffer contains one or more whole sectors (=LEBs), write them to the + * volume. Otherwise, fill the cache that will be flushed later + */ +static int ubiblk_do_cached_write(struct ubiblk_dev *u, unsigned long pos, + int len, const char *buf) +{ + unsigned int sect_size = u->cache_size, + size, offset; + unsigned long sect_start; + int ret = 0; + int leb; + + pr_debug("%s: volume %d:%d, writing at pos %lx of size %x\n", + __func__, u->ubi_num, u->ubi_vol, pos, len); + + while (len > 0) { + leb = pos / sect_size; + sect_start = leb * sect_size; + offset = pos - sect_start; + size = sect_size - offset; + + if (size > len) + size = len; + + if (size == sect_size) { + /* + * We are covering a whole sector. Thus there is no + * need to bother with the cache while it may still be + * useful for other partial writes. + */ + ret = ubi_leb_change(u->ubi, leb, + buf, size, UBI_UNKNOWN); + if (ret) + goto out; + } else { + /* Partial sector: need to use the cache */ + + if (u->cache_state == STATE_DIRTY && + u->cache_offset != sect_start) { + ret = ubiblk_write_cached_data(u); + if (ret) + goto out; + } + + if (u->cache_state == STATE_EMPTY || + u->cache_offset != sect_start) { + /* fill the cache with the current sector */ + u->cache_state = STATE_EMPTY; + ret = ubi_leb_read(u->ubi, leb, + u->cache_data, 0, u->cache_size, 0); + if (ret) + return ret; + ret = ubi_leb_unmap(u->ubi, leb); + if (ret) + return ret; + ret = ubi_leb_unmap(u->ubi, leb); + if (ret) + return ret; + u->cache_offset = sect_start; + u->cache_state = STATE_CLEAN; + } + + /* write data to our local cache */ + memcpy(u->cache_data + offset, buf, size); + u->cache_state = STATE_DIRTY; + } + + buf += size; + pos += size; + len -= size; + } + +out: + return ret; +} + +/** + * ubiblk_do_cached_read - cached read the data from ubi volume + * + * @u: ubiblk_dev + * @pos: offset on the block device + * @len: buffer length + * @buf: preallocated buffer + * + * Cached LEB will be used if possible; otherwise data will be using + * ubi_leb_read + */ +static int ubiblk_do_cached_read(struct ubiblk_dev *u, unsigned long pos, + int len, char *buf) +{ + unsigned int sect_size = u->cache_size; + int err = 0; + unsigned long sect_start; + unsigned offset, size; + int leb; + + pr_debug("%s: read at 0x%lx, size 0x%x\n", + __func__, pos, len); + + while (len > 0) { + + leb = pos/sect_size; + sect_start = leb*sect_size; + offset = pos - sect_start; + size = sect_size - offset; + + if (size > len) + size = len; + + /* + * Check if the requested data is already cached + * Read the requested amount of data from our internal + * cache if it contains what we want, otherwise we read + * the data directly from flash. + */ + if (u->cache_state != STATE_EMPTY && + u->cache_offset == sect_start) { + pr_debug("%s: cached, returning back from cache\n", + __func__); + memcpy(buf, u->cache_data + offset, size); + err = 0; + } else { + pr_debug("%s: pos = %ld, reading leb = %d\n", + __func__, pos, leb); + err = ubi_leb_read(u->ubi, leb, buf, offset, size, 0); + if (err) + goto out; + } + + buf += size; + pos += size; + len -= size; + } + +out: + return err; +} + +/** + * ubiblock_writesect - write the sector + * + * Allocate the cache, if necessary and perform actual write using + * ubiblk_do_cached_write + */ +static int ubiblock_writesect(struct mtd_blktrans_dev *mbd, + unsigned long block, char *buf) +{ + struct ubiblk_dev *u = container_of(mbd, struct ubiblk_dev, m); + + if (unlikely(!u->cache_data)) { + u->cache_data = vmalloc(u->cache_size); + if (!u->cache_data) + return -EAGAIN; + } + return ubiblk_do_cached_write(u, block<<9, 512, buf); +} + +/** + * ubiblk_readsect - read the sector + * + * Allocate the cache, if necessary, and perform actual read using + * ubiblk_do_cached_read + */ +static int ubiblock_readsect(struct mtd_blktrans_dev *mbd, + unsigned long block, char *buf) +{ + struct ubiblk_dev *u = container_of(mbd, struct ubiblk_dev, m); + + if (unlikely(!u->cache_data)) { + u->cache_data = vmalloc(u->cache_size); + if (!u->cache_data) + return -EAGAIN; + } + return ubiblk_do_cached_read(u, block<<9, 512, buf); +} + +static int ubiblk_flush_locked(struct ubiblk_dev *u) +{ + ubiblk_write_cached_data(u); + ubi_sync(u->ubi_num); + return 0; +} + +static int ubiblock_flush(struct mtd_blktrans_dev *mbd) +{ + struct ubiblk_dev *u = container_of(mbd, struct ubiblk_dev, m); + + mutex_lock(&u->cache_mutex); + ubiblk_flush_locked(u); + mutex_unlock(&u->cache_mutex); + return 0; +} + + +static int ubiblock_open(struct mtd_blktrans_dev *mbd) +{ + struct ubiblk_dev *u = container_of(mbd, struct ubiblk_dev, m); + + if (u->usecount == 0) { + u->ubi = ubi_open_volume(u->ubi_num, u->ubi_vol, + UBI_READWRITE); + if (IS_ERR(u->ubi)) + return PTR_ERR(u->ubi); + } + u->usecount++; + return 0; +} + +static int ubiblock_release(struct mtd_blktrans_dev *mbd) +{ + struct ubiblk_dev *u = container_of(mbd, struct ubiblk_dev, m); + + if (--u->usecount == 0) { + mutex_lock(&u->cache_mutex); + ubiblk_flush_locked(u); + vfree(u->cache_data); + u->cache_data = NULL; + mutex_unlock(&u->cache_mutex); + ubi_close_volume(u->ubi); + u->ubi = NULL; + } + return 0; +} + +/* + * sysfs routines. The ubiblk creates two entries under /sys/block/ubiblkX: + * - volume, R/O, which is read like "ubi0:volume_name" + * - unbind, W/O; when user writes something here, the block device is + * removed + * + * unbind schedules a work item to perform real unbind, because sysfs entry + * handler cannot delete itself :) + */ +ssize_t volume_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct gendisk *gd = dev_to_disk(dev); + struct mtd_blktrans_dev *m = gd->private_data; + struct ubiblk_dev *u = container_of(m, struct ubiblk_dev, m); + + return sprintf(buf, "%d:%d\n", u->ubi_num, u->ubi_vol); +} + +static void ubiblk_unbind(struct work_struct *ws) +{ + struct ubiblk_dev *u = container_of(ws, struct ubiblk_dev, unbind); + + ubiblk_del(u); +} + +ssize_t unbind_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct gendisk *gd = dev_to_disk(dev); + struct mtd_blktrans_dev *m = gd->private_data; + struct ubiblk_dev *u = container_of(m, struct ubiblk_dev, m); + + INIT_WORK(&u->unbind, ubiblk_unbind); + schedule_work(&u->unbind); + return count; +} + +DEVICE_ATTR(unbind, 0644, NULL, unbind_store); +DEVICE_ATTR(volume, 0644, volume_show, NULL); + +static int ubiblk_sysfs(struct gendisk *hd, int add) +{ + int r = 0; + + if (add) { + r = device_create_file(disk_to_dev(hd), &dev_attr_unbind); + if (r < 0) + goto out; + r = device_create_file(disk_to_dev(hd), &dev_attr_volume); + if (r < 0) + goto out1; + return 0; + } + + device_remove_file(disk_to_dev(hd), &dev_attr_unbind); +out1: + device_remove_file(disk_to_dev(hd), &dev_attr_volume); +out: + return r; +} + + +/** + * add the FTL by registering it with mtd_blkdevs + */ +static void *ubiblk_add(int ubi_num, int ubi_vol_id) +{ + void *p; + + mutex_lock(&mtd_table_mutex); + p = ubiblk_add_locked(ubi_num, ubi_vol_id); + mutex_unlock(&mtd_table_mutex); + return p; +} + +static void *ubiblk_add_locked(int ubi_num, int ubi_vol_id) +{ + struct ubiblk_dev *u = kzalloc(sizeof(*u), GFP_KERNEL); + struct ubi_volume_info uvi; + struct ubi_volume_desc *ubi; + + if (!u) { + u = ERR_PTR(-ENOMEM); + goto out; + } + + ubi = ubi_open_volume(ubi_num, ubi_vol_id, UBI_READONLY); + if (IS_ERR(u->ubi)) { + pr_err("cannot open the volume\n"); + u = (void *)u->ubi; + goto out; + } + + ubi_get_volume_info(ubi, &uvi); + ubi_close_volume(ubi); + + pr_debug("adding volume of size %d (used_size %lld), LEB size %d\n", + uvi.size, uvi.used_bytes, uvi.usable_leb_size); + + u->m.mtd = NULL; + u->m.devnum = -1; + u->m.size = uvi.used_bytes >> 9; + u->m.tr = &ubiblock_tr; + + u->ubi_num = ubi_num; + u->ubi_vol = ubi_vol_id; + + mutex_init(&u->cache_mutex); + u->cache_state = STATE_EMPTY; + u->cache_size = uvi.usable_leb_size; + u->cache_data = NULL; + u->usecount = 0; + INIT_LIST_HEAD(&u->list); + + list_add_tail(&u->list, &ubiblk_devices); + add_mtd_blktrans_dev(&u->m); + ubiblk_sysfs(u->m.blkcore_priv, true); +out: + return u; +} + +static int ubiblk_del(struct ubiblk_dev *u) +{ + int r; + mutex_lock(&mtd_table_mutex); + r = ubiblk_del_locked(u); + mutex_unlock(&mtd_table_mutex); + return r; +} + +static int ubiblk_del_locked(struct ubiblk_dev *u) +{ + if (u->usecount != 0) + return -EBUSY; + ubiblk_sysfs(u->m.blkcore_priv, false); + del_mtd_blktrans_dev(&u->m); + list_del(&u->list); + BUG_ON(u->cache_data != NULL); /* who did not free the cache ?! */ + kfree(u); + return 0; +} + +static struct ubiblk_dev *ubiblk_find(int num, int vol) +{ + struct ubiblk_dev *pos; + + list_for_each_entry(pos, &ubiblk_devices, list) + if (pos->ubi_num == num && pos->ubi_vol == vol) + return pos; + return NULL; +} + +static int ubiblock_notification(struct notifier_block *blk, + unsigned long type, void *v) +{ + struct ubi_notification *nt = v; + struct ubiblk_dev *u; + + switch (type) { + case UBI_VOLUME_ADDED: + ubiblk_add(nt->vi.ubi_num, nt->vi.vol_id); + break; + case UBI_VOLUME_REMOVED: + u = ubiblk_find(nt->vi.ubi_num, nt->vi.vol_id); + if (u) + ubiblk_del(u); + break; + case UBI_VOLUME_RENAMED: + case UBI_VOLUME_RESIZED: + break; + } + return NOTIFY_OK; +} + +static struct notifier_block ubiblock_nb = { + .notifier_call = ubiblock_notification, +}; + +static int __init ubiblock_init(void) +{ + int r; + + r = register_mtd_blktrans(&ubiblock_tr); + if (r) + goto out; + r = ubi_register_volume_notifier(&ubiblock_nb, 0); + if (r) + goto out_unreg; + return 0; + +out_unreg: + deregister_mtd_blktrans(&ubiblock_tr); +out: + return 0; +} + +static void __exit ubiblock_exit(void) +{ + ubi_unregister_volume_notifier(&ubiblock_nb); + deregister_mtd_blktrans(&ubiblock_tr); +} + +module_init(ubiblock_init); +module_exit(ubiblock_exit); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Caching block device emulation access to UBI devices"); +MODULE_AUTHOR("dmitry pervushin "); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/chips/cfi_util.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/chips/cfi_util.c @@ -81,6 +81,10 @@ { cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); + /* M29W128G flashes require an additional reset command + when exit qry mode */ + if ((cfi->mfr == CFI_MFR_ST) && (cfi->id == 0x227E || cfi->id == 0x7E)) + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); } EXPORT_SYMBOL_GPL(cfi_qry_mode_off); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/chips/cfi_cmdset_0002.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/chips/cfi_cmdset_0002.c @@ -282,16 +282,6 @@ } } -static void fixup_M29W128G_write_buffer(struct mtd_info *mtd, void *param) -{ - struct map_info *map = mtd->priv; - struct cfi_private *cfi = map->fldrv_priv; - if (cfi->cfiq->BufWriteTimeoutTyp) { - pr_warning("Don't use write buffer on ST flash M29W128G\n"); - cfi->cfiq->BufWriteTimeoutTyp = 0; - } -} - static struct cfi_fixup cfi_fixup_table[] = { { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, #ifdef AMD_BOOTLOC_BUG @@ -308,7 +298,6 @@ { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors, NULL, }, { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors, NULL, }, { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors, NULL, }, - { CFI_MFR_ST, 0x227E, fixup_M29W128G_write_buffer, NULL, }, #if !FORCE_WORD_WRITE { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, #endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/Kconfig @@ -378,6 +378,102 @@ The simulator may simulate various NAND flash chips for the MTD nand layer. +config MTD_NAND_IMX_NFC + tristate "i.MX NAND Flash Controller driver" + depends on MTD_NAND + help + Enables the i.MX NAND Flash controller driver. + +config MTD_NAND_MXC + tristate "MXC NAND support" + depends on MTD_NAND && ARCH_MXC_HAS_NFC_V1 + help + This enables the driver for the NAND flash controller on the + MXC processors. + +config MTD_NAND_MXC_V2 + tristate "MXC NAND Version 2 support" + depends on MTD_NAND && ARCH_MXC_HAS_NFC_V2 + help + This enables the driver for the version 2 of NAND flash controller + on the MXC processors. + +config MTD_NAND_MXC_V3 + tristate "MXC NAND Version 3 support" + depends on MTD_NAND && ARCH_MXC_HAS_NFC_V3 + help + This enables the driver for the version 3 of NAND flash controller + on the MXC processors. + +config MTD_NAND_MXC_SWECC + bool "Software ECC support " + depends on MTD_NAND_MXC || MTD_NAND_MXC_V2 || MTD_NAND_MXC_V3 + help + This enables the support for Software ECC handling. By + default MXC NAND controller Hardware ECC is supported. + + +config MTD_NAND_MXC_FORCE_CE + bool "NAND chip select operation support" + depends on MTD_NAND_MXC || MTD_NAND_MXC_V2|| MTD_NAND_MXC_V3 + help + This enables the NAND chip select by using CE control line. By + default CE operation is disabled. + +config MTD_NAND_MXC_ECC_CORRECTION_OPTION2 + bool "ECC correction in S/W" + depends on MTD_NAND_MXC + help + This enables the Option2 NFC ECC correction in software. By + default Option 1 is selected. Enable if you need option2 ECC correction. + +config MXC_NAND_LOW_LEVEL_ERASE + bool "Low level NAND erase" + depends on MTD_NAND_MXC || MTD_NAND_MXC_V2 || MTD_NAND_MXC_V3 + help + This enables the erase of whole NAND flash. By + default low level erase operation is disabled. + +config MTD_NAND_GPMI_LBA + tristate "GPMI LBA NAND driver" + depends on MTD_NAND && ARCH_STMP3XXX + help + Enables support of LBA devices on GPMI on 37xx/378x SigmaTel + boards + +config MTD_NAND_GPMI + tristate "GPMI NAND driver" + depends on MTD_NAND && ARCH_STMP3XXX && !MTD_NAND_GPMI_LBA + help + Enables support of NAND devices on GPMI on 37xx/378x SigmaTel + boards + +config MTD_NAND_GPMI_SYSFS_ENTRIES + bool "Create /sys entries for GPMI device" + depends on MTD_NAND_GPMI + help + Check this to enable /sys entries for GPMI devices + +config MTD_NAND_GPMI_BCH + bool "Enable BCH HWECC" + depends on MTD_NAND_GPMI + depends on ARCH_STMP378X + default y + help + Check this to enable /sys entries for GPMI devices + +config MTD_NAND_GPMI_TA1 + bool "Support for TA1 NCB format (Hamming code 22,16)" + depends on MTD_NAND_GPMI + depends on ARCH_STMP378X + default y + +config MTD_NAND_GPMI_TA3 + bool "Support for TA3 NCB format (Hamming code 13,8)" + depends on MTD_NAND_GPMI + depends on ARCH_STMP378X + default y + config MTD_NAND_PLATFORM tristate "Support for generic platform NAND driver" depends on MTD_NAND --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/imx_nfc.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/imx_nfc.c @@ -0,0 +1,8286 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_VERSION "1.0" + +/* Define this macro to enable event reporting. */ + +#define EVENT_REPORTING + +/* + * For detailed information that will be helpful in understanding this driver, + * see: + * + * Documentation/imx_nfc.txt + */ + +/* + * Macros that describe NFC hardware have names of the form: + * + * NFC_* + * + * Macros that apply only to specific versions of the NFC have names of the + * following form: + * + * NFC___* + * + * where: + * + * is the major version of the NFC hardware. + * is the minor version of the NFC hardware. + * + * The minor version can be 'X', which means that the macro applies to *all* + * NFCs of the same major version. + * + * For NFC versions with only one set of registers, macros that give offsets + * against the base address have names of the form: + * + * *_REG_OFF + * + * Macros that give the position of a field's LSB within a given register have + * names of the form: + * + * *__POS + * + * Macros that mask a field within a given register have names of the form: + * + * *__MSK + */ + +/* + * Macro definitions for ALL NFC versions. + */ + +#define NFC_MAIN_BUF_SIZE (512) + +/* + * Macro definitions for version 1.0 NFCs. + */ + +#define NFC_1_0_BUF_SIZE_REG_OFF (0x00) +#define NFC_1_0_BUF_ADDR_REG_OFF (0x04) +#define NFC_1_0_FLASH_ADDR_REG_OFF (0x06) +#define NFC_1_0_FLASH_CMD_REG_OFF (0x08) +#define NFC_1_0_CONFIG_REG_OFF (0x0A) +#define NFC_1_0_ECC_STATUS_RESULT_REG_OFF (0x0C) +#define NFC_1_0_RSLTMAIN_AREA_REG_OFF (0x0E) +#define NFC_1_0_RSLTSPARE_AREA_REG_OFF (0x10) +#define NFC_1_0_WRPROT_REG_OFF (0x12) +#define NFC_1_0_UNLOCKSTART_BLKADDR_REG_OFF (0x14) +#define NFC_1_0_UNLOCKEND_BLKADDR_REG_OFF (0x16) +#define NFC_1_0_NF_WRPRST_REG_OFF (0x18) + +#define NFC_1_0_CONFIG1_REG_OFF (0x1A) +#define NFC_1_0_CONFIG1_NF_CE_POS (7) +#define NFC_1_0_CONFIG1_NF_CE_MSK (0x1 << 7) + +#define NFC_1_0_CONFIG2_REG_OFF (0x1C) + +/* +* Macro definitions for version 2.X NFCs. +*/ + +#define NFC_2_X_FLASH_ADDR_REG_OFF (0x06) +#define NFC_2_X_FLASH_CMD_REG_OFF (0x08) +#define NFC_2_X_CONFIG_REG_OFF (0x0A) + +#define NFC_2_X_WR_PROT_REG_OFF (0x12) + +#define NFC_2_X_NF_WR_PR_ST_REG_OFF (0x18) + +#define NFC_2_X_CONFIG2_REG_OFF (0x1C) +#define NFC_2_X_CONFIG2_FCMD_POS (0) +#define NFC_2_X_CONFIG2_FCMD_MSK (0x1 << 0) +#define NFC_2_X_CONFIG2_FADD_POS (1) +#define NFC_2_X_CONFIG2_FADD_MSK (0x1 << 1) +#define NFC_2_X_CONFIG2_FDI_POS (2) +#define NFC_2_X_CONFIG2_FDI_MSK (0x1 << 2) +#define NFC_2_X_CONFIG2_FDO_POS (3) +#define NFC_2_X_CONFIG2_FDO_MSK (0x7 << 3) +#define NFC_2_X_CONFIG2_INT_POS (15) +#define NFC_2_X_CONFIG2_INT_MSK (0x1 << 15) + +/* +* Macro definitions for version 2.0 NFCs. +*/ + +#define NFC_2_0_BUF_ADDR_REG_OFF (0x04) +#define NFC_2_0_BUF_ADDR_RBA_POS (0) +#define NFC_2_0_BUF_ADDR_RBA_MSK (0xf << 0) + +#define NFC_2_0_ECC_STATUS_REG_OFF (0x0C) +#define NFC_2_0_ECC_STATUS_NOSER1_POS (0) +#define NFC_2_0_ECC_STATUS_NOSER1_MSK (0xF << 0) +#define NFC_2_0_ECC_STATUS_NOSER2_POS (4) +#define NFC_2_0_ECC_STATUS_NOSER2_MSK (0xF << 4) +#define NFC_2_0_ECC_STATUS_NOSER3_POS (8) +#define NFC_2_0_ECC_STATUS_NOSER3_MSK (0xF << 8) +#define NFC_2_0_ECC_STATUS_NOSER4_POS (12) +#define NFC_2_0_ECC_STATUS_NOSER4_MSK (0xF << 12) + +#define NFC_2_0_CONFIG1_REG_OFF (0x1A) +#define NFC_2_0_CONFIG1_SP_EN_POS (2) +#define NFC_2_0_CONFIG1_SP_EN_MSK (0x1 << 2) +#define NFC_2_0_CONFIG1_ECC_EN_POS (3) +#define NFC_2_0_CONFIG1_ECC_EN_MSK (0x1 << 3) +#define NFC_2_0_CONFIG1_INT_MSK_POS (4) +#define NFC_2_0_CONFIG1_INT_MSK_MSK (0x1 << 4) +#define NFC_2_0_CONFIG1_NF_BIG_POS (5) +#define NFC_2_0_CONFIG1_NF_BIG_MSK (0x1 << 5) +#define NFC_2_0_CONFIG1_NFC_RST_POS (6) +#define NFC_2_0_CONFIG1_NFC_RST_MSK (0x1 << 6) +#define NFC_2_0_CONFIG1_NF_CE_POS (7) +#define NFC_2_0_CONFIG1_NF_CE_MSK (0x1 << 7) +#define NFC_2_0_CONFIG1_ONE_CYLE_POS (8) +#define NFC_2_0_CONFIG1_ONE_CYLE_MSK (0x1 << 8) +#define NFC_2_0_CONFIG1_MLC_POS (9) +#define NFC_2_0_CONFIG1_MLC_MSK (0x1 << 9) + +#define NFC_2_0_UNLOCK_START_REG_OFF (0x14) +#define NFC_2_0_UNLOCK_END_REG_OFF (0x16) + +/* +* Macro definitions for version 2.1 NFCs. +*/ + +#define NFC_2_1_BUF_ADDR_REG_OFF (0x04) +#define NFC_2_1_BUF_ADDR_RBA_POS (0) +#define NFC_2_1_BUF_ADDR_RBA_MSK (0x7 << 0) +#define NFC_2_1_BUF_ADDR_CS_POS (4) +#define NFC_2_1_BUF_ADDR_CS_MSK (0x3 << 4) + +#define NFC_2_1_ECC_STATUS_REG_OFF (0x0C) +#define NFC_2_1_ECC_STATUS_NOSER1_POS (0) +#define NFC_2_1_ECC_STATUS_NOSER1_MSK (0xF << 0) +#define NFC_2_1_ECC_STATUS_NOSER2_POS (4) +#define NFC_2_1_ECC_STATUS_NOSER2_MSK (0xF << 4) +#define NFC_2_1_ECC_STATUS_NOSER3_POS (8) +#define NFC_2_1_ECC_STATUS_NOSER3_MSK (0xF << 8) +#define NFC_2_1_ECC_STATUS_NOSER4_POS (12) +#define NFC_2_1_ECC_STATUS_NOSER4_MSK (0xF << 12) + +#define NFC_2_1_CONFIG1_REG_OFF (0x1A) +#define NFC_2_1_CONFIG1_ECC_MODE_POS (0) +#define NFC_2_1_CONFIG1_ECC_MODE_MSK (0x1 << 0) +#define NFC_2_1_CONFIG1_DMA_MODE_POS (1) +#define NFC_2_1_CONFIG1_DMA_MODE_MSK (0x1 << 1) +#define NFC_2_1_CONFIG1_SP_EN_POS (2) +#define NFC_2_1_CONFIG1_SP_EN_MSK (0x1 << 2) +#define NFC_2_1_CONFIG1_ECC_EN_POS (3) +#define NFC_2_1_CONFIG1_ECC_EN_MSK (0x1 << 3) +#define NFC_2_1_CONFIG1_INT_MSK_POS (4) +#define NFC_2_1_CONFIG1_INT_MSK_MSK (0x1 << 4) +#define NFC_2_1_CONFIG1_NF_BIG_POS (5) +#define NFC_2_1_CONFIG1_NF_BIG_MSK (0x1 << 5) +#define NFC_2_1_CONFIG1_NFC_RST_POS (6) +#define NFC_2_1_CONFIG1_NFC_RST_MSK (0x1 << 6) +#define NFC_2_1_CONFIG1_NF_CE_POS (7) +#define NFC_2_1_CONFIG1_NF_CE_MSK (0x1 << 7) +#define NFC_2_1_CONFIG1_SYM_POS (8) +#define NFC_2_1_CONFIG1_SYM_MSK (0x1 << 8) +#define NFC_2_1_CONFIG1_PPB_POS (9) +#define NFC_2_1_CONFIG1_PPB_MSK (0x3 << 9) +#define NFC_2_1_CONFIG1_FP_INT_POS (11) +#define NFC_2_1_CONFIG1_FP_INT_MSK (0x1 << 11) + +#define NFC_2_1_UNLOCK_START_0_REG_OFF (0x20) +#define NFC_2_1_UNLOCK_END_0_REG_OFF (0x22) +#define NFC_2_1_UNLOCK_START_1_REG_OFF (0x24) +#define NFC_2_1_UNLOCK_END_1_REG_OFF (0x26) +#define NFC_2_1_UNLOCK_START_2_REG_OFF (0x28) +#define NFC_2_1_UNLOCK_END_2_REG_OFF (0x2A) +#define NFC_2_1_UNLOCK_START_3_REG_OFF (0x2C) +#define NFC_2_1_UNLOCK_END_3_REG_OFF (0x2E) + +/* +* Macro definitions for version 3.X NFCs. +*/ + +/* +* Macro definitions for version 3.1 NFCs. +*/ + +#define NFC_3_1_FLASH_ADDR_CMD_REG_OFF (0x00) +#define NFC_3_1_CONFIG1_REG_OFF (0x04) +#define NFC_3_1_ECC_STATUS_RESULT_REG_OFF (0x08) +#define NFC_3_1_LAUNCH_NFC_REG_OFF (0x0C) + +#define NFC_3_1_WRPROT_REG_OFF (0x00) +#define NFC_3_1_WRPROT_UNLOCK_BLK_ADD0_REG_OFF (0x04) +#define NFC_3_1_CONFIG2_REG_OFF (0x14) +#define NFC_3_1_IPC_REG_OFF (0x18) + +/* +* Macro definitions for version 3.2 NFCs. +*/ + +#define NFC_3_2_CMD_REG_OFF (0x00) + +#define NFC_3_2_ADD0_REG_OFF (0x04) +#define NFC_3_2_ADD1_REG_OFF (0x08) +#define NFC_3_2_ADD2_REG_OFF (0x0C) +#define NFC_3_2_ADD3_REG_OFF (0x10) +#define NFC_3_2_ADD4_REG_OFF (0x14) +#define NFC_3_2_ADD5_REG_OFF (0x18) +#define NFC_3_2_ADD6_REG_OFF (0x1C) +#define NFC_3_2_ADD7_REG_OFF (0x20) +#define NFC_3_2_ADD8_REG_OFF (0x24) +#define NFC_3_2_ADD9_REG_OFF (0x28) +#define NFC_3_2_ADD10_REG_OFF (0x2C) +#define NFC_3_2_ADD11_REG_OFF (0x30) + +#define NFC_3_2_CONFIG1_REG_OFF (0x34) +#define NFC_3_2_CONFIG1_SP_EN_POS (0) +#define NFC_3_2_CONFIG1_SP_EN_MSK (0x1 << 0) +#define NFC_3_2_CONFIG1_NF_CE_POS (1) +#define NFC_3_2_CONFIG1_NF_CE_MSK (0x1 << 1) +#define NFC_3_2_CONFIG1_RST_POS (2) +#define NFC_3_2_CONFIG1_RST_MSK (0x1 << 2) +#define NFC_3_2_CONFIG1_RBA_POS (4) +#define NFC_3_2_CONFIG1_RBA_MSK (0x7 << 4) +#define NFC_3_2_CONFIG1_ITER_POS (8) +#define NFC_3_2_CONFIG1_ITER_MSK (0xf << 8) +#define NFC_3_2_CONFIG1_CS_POS (12) +#define NFC_3_2_CONFIG1_CS_MSK (0x7 << 12) +#define NFC_3_2_CONFIG1_STATUS_POS (16) +#define NFC_3_2_CONFIG1_STATUS_MSK (0xFFFF<<16) + +#define NFC_3_2_ECC_STATUS_REG_OFF (0x38) +#define NFC_3_2_ECC_STATUS_NOBER1_POS (0) +#define NFC_3_2_ECC_STATUS_NOBER1_MSK (0xF << 0) +#define NFC_3_2_ECC_STATUS_NOBER2_POS (4) +#define NFC_3_2_ECC_STATUS_NOBER2_MSK (0xF << 4) +#define NFC_3_2_ECC_STATUS_NOBER3_POS (8) +#define NFC_3_2_ECC_STATUS_NOBER3_MSK (0xF << 8) +#define NFC_3_2_ECC_STATUS_NOBER4_POS (12) +#define NFC_3_2_ECC_STATUS_NOBER4_MSK (0xF << 12) +#define NFC_3_2_ECC_STATUS_NOBER5_POS (16) +#define NFC_3_2_ECC_STATUS_NOBER5_MSK (0xF << 16) +#define NFC_3_2_ECC_STATUS_NOBER6_POS (20) +#define NFC_3_2_ECC_STATUS_NOBER6_MSK (0xF << 20) +#define NFC_3_2_ECC_STATUS_NOBER7_POS (24) +#define NFC_3_2_ECC_STATUS_NOBER7_MSK (0xF << 24) +#define NFC_3_2_ECC_STATUS_NOBER8_POS (28) +#define NFC_3_2_ECC_STATUS_NOBER8_MSK (0xF << 28) + + +#define NFC_3_2_STATUS_SUM_REG_OFF (0x3C) +#define NFC_3_2_STATUS_SUM_NAND_SUM_POS (0x0) +#define NFC_3_2_STATUS_SUM_NAND_SUM_MSK (0xFF << 0) +#define NFC_3_2_STATUS_SUM_ECC_SUM_POS (8) +#define NFC_3_2_STATUS_SUM_ECC_SUM_MSK (0xFF << 8) + +#define NFC_3_2_LAUNCH_REG_OFF (0x40) +#define NFC_3_2_LAUNCH_FCMD_POS (0) +#define NFC_3_2_LAUNCH_FCMD_MSK (0x1 << 0) +#define NFC_3_2_LAUNCH_FADD_POS (1) +#define NFC_3_2_LAUNCH_FADD_MSK (0x1 << 1) +#define NFC_3_2_LAUNCH_FDI_POS (2) +#define NFC_3_2_LAUNCH_FDI_MSK (0x1 << 2) +#define NFC_3_2_LAUNCH_FDO_POS (3) +#define NFC_3_2_LAUNCH_FDO_MSK (0x7 << 3) +#define NFC_3_2_LAUNCH_AUTO_PROG_POS (6) +#define NFC_3_2_LAUNCH_AUTO_PROG_MSK (0x1 << 6) +#define NFC_3_2_LAUNCH_AUTO_READ_POS (7) +#define NFC_3_2_LAUNCH_AUTO_READ_MSK (0x1 << 7) +#define NFC_3_2_LAUNCH_AUTO_ERASE_POS (9) +#define NFC_3_2_LAUNCH_AUTO_ERASE_MSK (0x1 << 9) +#define NFC_3_2_LAUNCH_COPY_BACK0_POS (10) +#define NFC_3_2_LAUNCH_COPY_BACK0_MSK (0x1 << 10) +#define NFC_3_2_LAUNCH_COPY_BACK1_POS (11) +#define NFC_3_2_LAUNCH_COPY_BACK1_MSK (0x1 << 11) +#define NFC_3_2_LAUNCH_AUTO_STATUS_POS (12) +#define NFC_3_2_LAUNCH_AUTO_STATUS_MSK (0x1 << 12) + +#define NFC_3_2_WRPROT_REG_OFF (0x00) +#define NFC_3_2_WRPROT_WPC_POS (0) +#define NFC_3_2_WRPROT_WPC_MSK (0x7 << 0) +#define NFC_3_2_WRPROT_CS2L_POS (3) +#define NFC_3_2_WRPROT_CS2L_MSK (0x7 << 3) +#define NFC_3_2_WRPROT_BLS_POS (6) +#define NFC_3_2_WRPROT_BLS_MSK (0x3 << 6) +#define NFC_3_2_WRPROT_LTS0_POS (8) +#define NFC_3_2_WRPROT_LTS0_MSK (0x1 << 8) +#define NFC_3_2_WRPROT_LS0_POS (9) +#define NFC_3_2_WRPROT_LS0_MSK (0x1 << 9) +#define NFC_3_2_WRPROT_US0_POS (10) +#define NFC_3_2_WRPROT_US0_MSK (0x1 << 10) +#define NFC_3_2_WRPROT_LTS1_POS (11) +#define NFC_3_2_WRPROT_LTS1_MSK (0x1 << 11) +#define NFC_3_2_WRPROT_LS1_POS (12) +#define NFC_3_2_WRPROT_LS1_MSK (0x1 << 12) +#define NFC_3_2_WRPROT_US1_POS (13) +#define NFC_3_2_WRPROT_US1_MSK (0x1 << 13) +#define NFC_3_2_WRPROT_LTS2_POS (14) +#define NFC_3_2_WRPROT_LTS2_MSK (0x1 << 14) +#define NFC_3_2_WRPROT_LS2_POS (15) +#define NFC_3_2_WRPROT_LS2_MSK (0x1 << 15) +#define NFC_3_2_WRPROT_US2_POS (16) +#define NFC_3_2_WRPROT_US2_MSK (0x1 << 16) +#define NFC_3_2_WRPROT_LTS3_POS (17) +#define NFC_3_2_WRPROT_LTS3_MSK (0x1 << 17) +#define NFC_3_2_WRPROT_LS3_POS (18) +#define NFC_3_2_WRPROT_LS3_MSK (0x1 << 18) +#define NFC_3_2_WRPROT_US3_POS (19) +#define NFC_3_2_WRPROT_US3_MSK (0x1 << 19) +#define NFC_3_2_WRPROT_LTS4_POS (20) +#define NFC_3_2_WRPROT_LTS4_MSK (0x1 << 20) +#define NFC_3_2_WRPROT_LS4_POS (21) +#define NFC_3_2_WRPROT_LS4_MSK (0x1 << 21) +#define NFC_3_2_WRPROT_US4_POS (22) +#define NFC_3_2_WRPROT_US4_MSK (0x1 << 22) +#define NFC_3_2_WRPROT_LTS5_POS (23) +#define NFC_3_2_WRPROT_LTS5_MSK (0x1 << 23) +#define NFC_3_2_WRPROT_LS5_POS (24) +#define NFC_3_2_WRPROT_LS5_MSK (0x1 << 24) +#define NFC_3_2_WRPROT_US5_POS (25) +#define NFC_3_2_WRPROT_US5_MSK (0x1 << 25) +#define NFC_3_2_WRPROT_LTS6_POS (26) +#define NFC_3_2_WRPROT_LTS6_MSK (0x1 << 26) +#define NFC_3_2_WRPROT_LS6_POS (27) +#define NFC_3_2_WRPROT_LS6_MSK (0x1 << 27) +#define NFC_3_2_WRPROT_US6_POS (28) +#define NFC_3_2_WRPROT_US6_MSK (0x1 << 28) +#define NFC_3_2_WRPROT_LTS7_POS (29) +#define NFC_3_2_WRPROT_LTS7_MSK (0x1 << 29) +#define NFC_3_2_WRPROT_LS7_POS (30) +#define NFC_3_2_WRPROT_LS7_MSK (0x1 << 30) +#define NFC_3_2_WRPROT_US7_POS (31) +#define NFC_3_2_WRPROT_US7_MSK (0x1 << 31) + +#define NFC_3_2_UNLOCK_BLK_ADD0_REG_OFF (0x04) +#define NFC_3_2_UNLOCK_BLK_ADD0_USBA0_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD0_USBA0_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD0_UEBA0_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD0_UEBA0_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD1_REG_OFF (0x08) +#define NFC_3_2_UNLOCK_BLK_ADD1_USBA1_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD1_USBA1_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD1_UEBA1_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD1_UEBA1_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD2_REG_OFF (0x0C) +#define NFC_3_2_UNLOCK_BLK_ADD2_USBA2_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD2_USBA2_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD2_UEBA2_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD2_UEBA2_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD3_REG_OFF (0x10) +#define NFC_3_2_UNLOCK_BLK_ADD3_USBA3_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD3_USBA3_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD3_UEBA3_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD3_UEBA3_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD4_REG_OFF (0x14) +#define NFC_3_2_UNLOCK_BLK_ADD4_USBA4_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD4_USBA4_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD4_UEBA4_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD4_UEBA4_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD5_REG_OFF (0x18) +#define NFC_3_2_UNLOCK_BLK_ADD5_USBA5_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD5_USBA5_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD5_UEBA5_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD5_UEBA5_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD6_REG_OFF (0x1C) +#define NFC_3_2_UNLOCK_BLK_ADD6_USBA6_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD6_USBA6_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD6_UEBA6_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD6_UEBA6_MSK (0xFFFF<<16) + +#define NFC_3_2_UNLOCK_BLK_ADD7_REG_OFF (0x20) +#define NFC_3_2_UNLOCK_BLK_ADD7_USBA7_POS (0) +#define NFC_3_2_UNLOCK_BLK_ADD7_USBA7_MSK (0xFFFF << 0) +#define NFC_3_2_UNLOCK_BLK_ADD7_UEBA7_POS (16) +#define NFC_3_2_UNLOCK_BLK_ADD7_UEBA7_MSK (0xFFFF<<16) + +#define NFC_3_2_CONFIG2_REG_OFF (0x24) +#define NFC_3_2_CONFIG2_PS_POS (0) +#define NFC_3_2_CONFIG2_PS_MSK (0x3 << 0) +#define NFC_3_2_CONFIG2_SYM_POS (2) +#define NFC_3_2_CONFIG2_SYM_MSK (0x1 << 2) +#define NFC_3_2_CONFIG2_ECC_EN_POS (3) +#define NFC_3_2_CONFIG2_ECC_EN_MSK (0x1 << 3) +#define NFC_3_2_CONFIG2_CMD_PHASES_POS (4) +#define NFC_3_2_CONFIG2_CMD_PHASES_MSK (0x1 << 4) +#define NFC_3_2_CONFIG2_ADDR_PHASES0_POS (5) +#define NFC_3_2_CONFIG2_ADDR_PHASES0_MSK (0x1 << 5) +#define NFC_3_2_CONFIG2_ECC_MODE_POS (6) +#define NFC_3_2_CONFIG2_ECC_MODE_MSK (0x1 << 6) +#define NFC_3_2_CONFIG2_PPB_POS (7) +#define NFC_3_2_CONFIG2_PPB_MSK (0x3 << 7) +#define NFC_3_2_CONFIG2_EDC_POS (9) +#define NFC_3_2_CONFIG2_EDC_MSK (0x7 << 9) +#define NFC_3_2_CONFIG2_ADDR_PHASES1_POS (12) +#define NFC_3_2_CONFIG2_ADDR_PHASES1_MSK (0x3 << 12) +#define NFC_3_2_CONFIG2_AUTO_DONE_MSK_POS (14) +#define NFC_3_2_CONFIG2_AUTO_DONE_MSK_MSK (0x1 << 14) +#define NFC_3_2_CONFIG2_INT_MSK_POS (15) +#define NFC_3_2_CONFIG2_INT_MSK_MSK (0x1 << 15) +#define NFC_3_2_CONFIG2_SPAS_POS (16) +#define NFC_3_2_CONFIG2_SPAS_MSK (0xFF << 16) +#define NFC_3_2_CONFIG2_ST_CMD_POS (24) +#define NFC_3_2_CONFIG2_ST_CMD_MSK (0xFF << 24) + +#define NFC_3_2_CONFIG3_REG_OFF (0x28) +#define NFC_3_2_CONFIG3_ADD_OP_POS (0) +#define NFC_3_2_CONFIG3_ADD_OP_MSK (0x3 << 0) +#define NFC_3_2_CONFIG3_TOO_POS (2) +#define NFC_3_2_CONFIG3_TOO_MSK (0x1 << 2) +#define NFC_3_2_CONFIG3_FW_POS (3) +#define NFC_3_2_CONFIG3_FW_MSK (0x1 << 3) +#define NFC_3_2_CONFIG3_SB2R_POS (4) +#define NFC_3_2_CONFIG3_SB2R_MSK (0x7 << 4) +#define NFC_3_2_CONFIG3_NF_BIG_POS (7) +#define NFC_3_2_CONFIG3_NF_BIG_MSK (0x1 << 7) +#define NFC_3_2_CONFIG3_SBB_POS (8) +#define NFC_3_2_CONFIG3_SBB_MSK (0x7 << 8) +#define NFC_3_2_CONFIG3_DMA_MODE_POS (11) +#define NFC_3_2_CONFIG3_DMA_MODE_MSK (0x1 << 11) +#define NFC_3_2_CONFIG3_NUM_OF_DEVICES_POS (12) +#define NFC_3_2_CONFIG3_NUM_OF_DEVICES_MSK (0x7 << 12) +#define NFC_3_2_CONFIG3_RBB_MODE_POS (15) +#define NFC_3_2_CONFIG3_RBB_MODE_MSK (0x1 << 15) +#define NFC_3_2_CONFIG3_FMP_POS (16) +#define NFC_3_2_CONFIG3_FMP_MSK (0xF << 16) +#define NFC_3_2_CONFIG3_NO_SDMA_POS (20) +#define NFC_3_2_CONFIG3_NO_SDMA_MSK (0x1 << 20) + +#define NFC_3_2_IPC_REG_OFF (0x2C) +#define NFC_3_2_IPC_CREQ_POS (0) +#define NFC_3_2_IPC_CREQ_MSK (0x1 << 0) +#define NFC_3_2_IPC_CACK_POS (1) +#define NFC_3_2_IPC_CACK_MSK (0x1 << 1) +#define NFC_3_2_IPC_DMA_STATUS_POS (26) +#define NFC_3_2_IPC_DMA_STATUS_MSK (0x3 << 26) +#define NFC_3_2_IPC_RB_B_POS (28) +#define NFC_3_2_IPC_RB_B_MSK (0x1 << 28) +#define NFC_3_2_IPC_LPS_POS (29) +#define NFC_3_2_IPC_LPS_MSK (0x1 << 29) +#define NFC_3_2_IPC_AUTO_PROG_DONE_POS (30) +#define NFC_3_2_IPC_AUTO_PROG_DONE_MSK (0x1 << 30) +#define NFC_3_2_IPC_INT_POS (31) +#define NFC_3_2_IPC_INT_MSK (0x1 << 31) + +#define NFC_3_2_AXI_ERR_ADD_REG_OFF (0x30) + +/** + * enum override - Choices for overrides. + * + * Some functions of this driver can be overriden at run time. This is a + * convenient enumerated type for all such options. + */ + +enum override { + NEVER = -1, + DRIVER_CHOICE = 0, + ALWAYS = 1, +}; + +/** + * struct physical_geometry - Physical geometry description. + * + * This structure describes the physical geometry of the medium. + * + * @chip_count: The number of chips in the medium. + * @chip_size: The size, in bytes, of a single chip (excluding the + * out-of-band bytes). + * @block_size: The size, in bytes, of a single block (excluding the + * out-of-band bytes). + * @page_data_size: The size, in bytes, of the data area in a page (excluding + * the out-of-band bytes). + * @page_oob_size: The size, in bytes, of the out-of-band area in a page. + */ + +struct physical_geometry { + unsigned int chip_count; + uint64_t chip_size; + unsigned int block_size; + unsigned int page_data_size; + unsigned int page_oob_size; +}; + +/** + * struct nfc_geometry - NFC geometry description. + * + * This structure describes the NFC's view of the medium geometry, which may be + * different from the physical geometry (for example, we treat pages that are + * physically 2K+112 as if they are 2K+64). + * + * @page_data_size: The size of the data area in a page (excluding the + * out-of-band bytes). This is almost certain to be the same + * as the physical data size. + * @page_oob_size: The size of the out-of-band area in a page. This may be + * different from the physical OOB size. + * @ecc_algorithm: The name of the ECC algorithm (e.g., "Reed-Solomon" or + * "BCH"). + * @ecc_strength: A number that describes the strength of the ECC algorithm. + * For example, various i.MX SoC's support ECC-1, ECC-4 or + * ECC-8 of the Reed-Solomon ECC algorithm. + * @buffer_count: The number of main/spare buffers used with this geometry. + * @spare_buf_size: The number of bytes held in each spare buffer. + * @spare_buf_spill: The number of extra bytes held in the last spare buffer. + * @mtd_layout: The MTD layout that best matches the geometry described by + * the rest of this structure. The logical layer might not use + * this structure, especially when interleaving. + */ + +struct nfc_geometry { + const unsigned int page_data_size; + const unsigned int page_oob_size; + const char *ecc_algorithm; + const int ecc_strength; + const unsigned int buffer_count; + const unsigned int spare_buf_size; + const unsigned int spare_buf_spill; + struct nand_ecclayout mtd_layout; +}; + +/** + * struct logical_geometry - Logical geometry description. + * + * This structure describes the logical geometry we expose to MTD. This geometry + * may be different from the physical or NFC geometries, especially when + * interleaving. + * + * @chip_count: The number of chips in the medium. + * @chip_size: The size, in bytes, of a single chip (excluding the + * out-of-band bytes). + * @usable_size: The size, in bytes, of the medium that MTD can actually + * use. This may be less than the chip size multiplied by the + * number of chips. + * @block_size: The size, in bytes, of a single block (excluding the + * out-of-band bytes). + * @page_data_size: The size of the data area in a page (excluding the + * out-of-band bytes). + * @page_oob_size: The size of the out-of-band area in a page. + */ + +struct logical_geometry { + unsigned int chip_count; + uint32_t chip_size; + uint32_t usable_size; + unsigned int block_size; + unsigned int page_data_size; + unsigned int page_oob_size; + struct nand_ecclayout *mtd_layout; +}; + +/** + * struct imx_nfc_data - i.MX NFC per-device data. + * + * Note that the "device" managed by this driver represents the NAND Flash + * controller *and* the NAND Flash medium behind it. Thus, the per-device data + * structure has information about the controller, the chips to which it is + * connected, and properties of the medium as a whole. + * + * @dev: A pointer to the owning struct device. + * @pdev: A pointer to the owning struct platform_device. + * @pdata: A pointer to the device's platform data. + * @buffers: A pointer to the NFC buffers. + * @primary_regs: A pointer to the NFC primary registers. + * @secondary_regs: A pointer to the NFC secondary registers. + * @clock: A pointer to the NFC struct clk. + * @interrupt: The NFC interrupt number. + * @physical_geometry: A description of the medium's physical geometry. + * @nfc: A pointer to the NFC HAL. + * @nfc_geometry: A description of the medium geometry as viewed by the + * NFC. + * @done: The struct completion we use to handle interrupts. + * @logical_geometry: A description of the logical geometry exposed to MTD. + * @interrupt_override: Can override how the driver uses interrupts when + * waiting for the NFC. + * @auto_op_override: Can override whether the driver uses automatic NFC + * operations. + * @inject_ecc_error: Indicates that the driver should inject an ECC error in + * the next read operation that uses ECC. User space + * programs can set this value through the sysfs node of + * the same name. If this value is less than zero, the + * driver will inject an uncorrectable ECC error. If this + * value is greater than zero, the driver will inject that + * number of correctable errors, capped at whatever + * possible maximum currently applies. + * @current_chip: The chip currently selected by the NAND Fash MTD HIL. + * A negative value indicates that no chip is selected. + * We use this field to detect when the HIL begins and + * ends essential transactions. This helps us to know when + * we should turn the NFC clock on or off. + * @command: The last command the HIL tried to send by calling + * cmdfunc(). Later functions use this information to + * adjust their behavior. The sentinel value ~0 indicates + * no command. + * @command_is_new: Indicates the command has just come down to cmdfunc() + * from the HIL and hasn't yet been handled. Other + * functions use this to adjust their behavior. + * @page_address: The current page address of interest. For reads, this + * information arrives in calls to cmdfunc(), but we don't + * actually use it until later. + * @nand: The data structure that represents this NAND Flash + * medium to the MTD NAND Flash system. + * @mtd: The data structure that represents this NAND Flash + * medium to MTD. + * @partitions: A pointer to a set of partitions collected from one of + * several possible sources (e.g., the boot loader, the + * kernel command line, etc.). See the global variable + * partition_source_types for the list of partition + * sources we examine. If this member is NULL, then no + * partitions were discovered. + * @partition_count: The number of discovered partitions. + */ + +struct imx_nfc_data { + + /* System Interface */ + struct device *dev; + struct platform_device *pdev; + + /* Platform Configuration */ + struct imx_nfc_platform_data *pdata; + void *buffers; + void *primary_regs; + void *secondary_regs; + struct clk *clock; + unsigned int interrupt; + + /* Flash Hardware */ + struct physical_geometry physical_geometry; + + /* NFC HAL and NFC Utilities */ + struct nfc_hal *nfc; + struct nfc_geometry *nfc_geometry; + struct completion done; + + /* Medium Abstraction Layer */ + struct logical_geometry logical_geometry; + enum override interrupt_override; + enum override auto_op_override; + int inject_ecc_error; + + /* MTD Interface Layer */ + int current_chip; + unsigned int command; + int command_is_new; + int page_address; + + /* NAND Flash MTD */ + struct nand_chip nand; + + /* MTD */ + struct mtd_info mtd; + struct mtd_partition *partitions; + unsigned int partition_count; + +}; + +/** + * struct nfc_hal - i.MX NFC HAL + * + * This structure embodies an abstract interface to the underlying NFC hardware. + * + * @major_version: The major version number of the NFC to which this + * structure applies. + * @minor_version: The minor version number of the NFC to which this + * structure applies. + * @max_chip_count: The maximum number of chips the NFC can possibly + * support. This may *not* be the actual number of chips + * currently connected. This value is constant for NFC's + * of a given version. + * @max_buffer_count: The number of main/spare buffers available in the NFC's + * memory. This value is constant for NFC's of a given + * version. + * @spare_buf_stride: The stride, in bytes, from the beginning of one spare + * buffer to the beginning of the next one. This value is + * constant for NFC's of a given version. + * @has_secondary_regs: Indicates if the NFC has a secondary register set that + * must be mapped in. + * @can_be_symmetric: Indicates if the NFC supports a "symmetric" clock. When + * the clock is "symmetric," the hardware waits one NFC + * clock for every read/write cycle. When the clock is + * "asymmetric," the hardware waits two NFC clocks for + * every read/write cycle. + * @init: Initializes the NFC and any version-specific data + * structures. This function will be called after + * everything has been set up for communication with the + * NFC itself, but before the platform has set up off-chip + * communication. Thus, this function must not attempt to + * communicate with the NAND Flash hardware. A non-zero + * return value indicates failure. + * @set_geometry: Based on the physical geometry, this function selects + * an NFC geometry structure and configures the NFC + * hardware to match. A non-zero return value indicates + * failure. + * @exit: Shuts down the NFC and cleans up version-specific data + * structures. This function will be called after the + * platform has shut down off-chip communication but while + * communication with the NFC still works. + * @set_closest_cycle: Configures the hardware to make the NAND Flash bus + * cycle period as close as possible to the given cycle + * period. This function is called during boot up and may + * assume that, at the time it's called, the parent clock + * is running at the highest rate it will ever run. Thus, + * this function need never worry that the NAND Flash bus + * will run faster and potentially make it impossible to + * communicate with the NAND Flash device -- it will only + * run slower. + * @mask_interrupt: Masks the NFC's interrupt. + * @unmask_interrupt: Unmasks the NFC's interrupt. + * @clear_interrupt: Clears the NFC's interrupt. + * @is_interrupting: Returns true if the NFC is interrupting. + * @is_ready: Returns true if all the chips in the medium are ready. + * This member may be set to NULL, which indicates that + * the underlying NFC hardware doesn't expose ready/busy + * signals. + * @set_force_ce: If passed true, forces the hardware chip enable signal + * for the current chip to be asserted always. If passed + * false, causes the chip enable signal to be asserted + * only during I/O. + * @set_ecc: Sets ECC on or off. + * @get_ecc_status: Examines the hardware ECC status and returns: + * == 0 => No errors. + * > 0 => The number of corrected errors. + * < 0 => There were uncorrectable errors. + * @get_symmetric: Gets the current symmetric clock setting. For versions + * that don't support symmetric clocks, this function + * always returns false. + * @set_symmetric: For versions that support symmetric clocks, sets + * whether or not the clock is symmetric. + * @select_chip: Selects the current chip. + * @command_cycle: Sends a command code and then returns immediately + * *without* waiting for the NFC to finish. + * @write_cycle: Applies a single write cycle to the current chip, + * sending the given byte, and waiting for the NFC to + * finish. + * @read_cycle: Applies a single read cycle to the current chip and + * returns the result, necessarily waiting for the NFC to + * finish. The width of the result is the same as the + * width of the Flash bus. + * @read_page: Applies read cycles to the current chip to read an + * entire page into the NFC. Note that ECC is enabled or + * disabled with the set_ecc function pointer (see above). + * This function waits for the NFC to finish before + * returning. + * @send_page: Applies write cycles to send an entire page from the + * NFC to the current chip. Note that ECC is enabled or + * disabled with the set_ecc function pointer (see above). + * This function waits for the NFC to finish before + * returning. + * @start_auto_read: Starts an automatic read operation. A NULL pointer + * indicates automatic read operations aren't available + * with this NFC version. + * @wait_for_auto_read: Blocks until an automatic read operation is ready for + * the CPU to copy a page out of the NFC. + * @resume_auto_read: Resumes an automatic read operation after the CPU has + * copied a page out. + * @start_auto_write: Starts an automatic write operation. A NULL pointer + * indicates automatic write operations aren't available + * with this NFC version. + * @wait_for_auto_write: Blocks until an automatic write operation is ready for + * the CPU to copy a page into the NFC. + * @start_auto_erase: Starts an automatic erase operation. A NULL pointer + * indicates automatic erase operations aren't available + * with this NFC version. + */ + +struct nfc_hal { + const unsigned int major_version; + const unsigned int minor_version; + const unsigned int max_chip_count; + const unsigned int max_buffer_count; + const unsigned int spare_buf_stride; + const int has_secondary_regs; + const int can_be_symmetric; + int (*init) (struct imx_nfc_data *); + int (*set_geometry) (struct imx_nfc_data *); + void (*exit) (struct imx_nfc_data *); + int (*set_closest_cycle) (struct imx_nfc_data *, unsigned ns); + void (*mask_interrupt) (struct imx_nfc_data *); + void (*unmask_interrupt) (struct imx_nfc_data *); + void (*clear_interrupt) (struct imx_nfc_data *); + int (*is_interrupting) (struct imx_nfc_data *); + int (*is_ready) (struct imx_nfc_data *); + void (*set_force_ce) (struct imx_nfc_data *, int on); + void (*set_ecc) (struct imx_nfc_data *, int on); + int (*get_ecc_status) (struct imx_nfc_data *); + int (*get_symmetric) (struct imx_nfc_data *); + void (*set_symmetric) (struct imx_nfc_data *, int on); + void (*select_chip) (struct imx_nfc_data *, int chip); + void (*command_cycle) (struct imx_nfc_data *, unsigned cmd); + void (*write_cycle) (struct imx_nfc_data *, unsigned byte); + unsigned (*read_cycle) (struct imx_nfc_data *); + void (*read_page) (struct imx_nfc_data *); + void (*send_page) (struct imx_nfc_data *); + int (*start_auto_read) (struct imx_nfc_data *, + unsigned start, unsigned count, unsigned column, unsigned page); + int (*wait_for_auto_read) (struct imx_nfc_data *); + int (*resume_auto_read) (struct imx_nfc_data *); + int (*start_auto_write) (struct imx_nfc_data *, + unsigned start, unsigned count, unsigned column, unsigned page); + int (*wait_for_auto_write)(struct imx_nfc_data *); + int (*start_auto_erase) (struct imx_nfc_data *, + unsigned start, unsigned count, unsigned page); +}; + +/* + * This variable controls whether or not probing is enabled. If false, then + * the driver will refuse to probe. The "enable" module parameter controls the + * value of this variable. + */ + +static int imx_nfc_module_enable = true; + +#ifdef EVENT_REPORTING + +/* + * This variable controls whether the driver reports event information by + * printing to the console. The "report_events" module parameter controls the + * value of this variable. + */ + +static int imx_nfc_module_report_events; /* implicitly initialized false*/ + +#endif + +/* + * This variable potentially overrides the driver's choice to interleave. The + * "interleave_override" module parameter controls the value of this variable. + */ + +static enum override imx_nfc_module_interleave_override = DRIVER_CHOICE; + +/* + * When set, this variable forces the driver to use the bytewise copy functions + * to get data in and out of the NFC. This is intended for testing, not typical + * use. + */ + +static int imx_nfc_module_force_bytewise_copy; /* implicitly initialized false*/ + +/* + * The list of algorithms we use to get partition information from the + * environment. + */ + +#ifdef CONFIG_MTD_PARTITIONS +static const char *partition_source_types[] = { "cmdlinepart", NULL }; +#endif + +/* + * The following structures describe the NFC geometries we support. + * + * Notice that pieces of some structure definitions are commented out and edited + * because various parts of the MTD system can't handle the way our hardware + * formats the out-of-band area. + * + * Here are the problems: + * + * - struct nand_ecclayout expects no more than 64 ECC bytes. + * + * The eccpos member of struct nand_ecclayout can't hold more than 64 ECC + * byte positions. Some of our formats have more so, unedited, they won't + * even compile. We comment out all ECC byte positions after the 64th one. + * + * - struct nand_ecclayout expects no more than 8 free spans. + * + * The oobfree member of struct nand_ecclayout can't hold more than 8 free + * spans. Some of our formats have more so, unedited, they won't even + * compile. We comment out all free spans after the eighth one. + * + * - The MEMGETOOBSEL command in the mtdchar driver. + * + * The mtdchar ioctl command MEMGETOOBSEL checks the number of ECC bytes + * against the length of the eccpos array in struct nand_oobinfo + * (see include/mtd/mtd-abi.h). This array can handle up to 32 ECC bytes, + * but some of our formats have more. + * + * To make this work, we cap the value assigned to eccbytes at 32. + * + * Notice that struct nand_oobinfo, used by mtdchar, is *different* from the + * struct nand_ecclayout that MTD uses internally. The latter structure + * can accomodate up to 64 ECC byte positions. Thus, we declare up to 64 + * ECC byte positions here, even if the advertised number of ECC bytes is + * less. + * + * This command is obsolete and, if no one used it, we wouldn't care about + * this problem. Unfortunately The nandwrite program uses it, and everyone + * expects nandwrite to work (it's how everyone usually lays down their + * JFFS2 file systems). + */ + +static struct nfc_geometry nfc_geometry_512_16_RS_ECC1 = { + .page_data_size = 512, + .page_oob_size = 16, + .ecc_algorithm = "Reed-Solomon", + .ecc_strength = 1, + .buffer_count = 1, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 5, + .eccpos = {6, 7, 8, 9, 10}, + .oobavail = 11, + .oobfree = { {0, 6}, {11, 5} }, + } +}; + +static struct nfc_geometry nfc_geometry_512_16_RS_ECC4 = { + .page_data_size = 512, + .page_oob_size = 16, + .ecc_algorithm = "Reed-Solomon", + .ecc_strength = 4, + .buffer_count = 1, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 7, + .oobfree = { {0, 7} }, + } +}; + +static struct nfc_geometry nfc_geometry_512_16_BCH_ECC4 = { + .page_data_size = 512, + .page_oob_size = 16, + .ecc_algorithm = "BCH", + .ecc_strength = 4, + .buffer_count = 1, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 8, + .eccpos = {8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 8, + .oobfree = { {0, 8} }, + } +}; + +static struct nfc_geometry nfc_geometry_2K_64_RS_ECC4 = { + .page_data_size = 2048, + .page_oob_size = 64, + .ecc_algorithm = "Reed-Solomon", + .ecc_strength = 4, + .buffer_count = 4, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 32 /*9 * 4*/, /* See notes above. */ + .eccpos = { + + (0*16)+7 , (0*16)+8 , (0*16)+9 , (0*16)+10, (0*16)+11, + (0*16)+12, (0*16)+13, (0*16)+14, (0*16)+15, + + (1*16)+7 , (1*16)+8 , (1*16)+9 , (1*16)+10, (1*16)+11, + (1*16)+12, (1*16)+13, (1*16)+14, (1*16)+15, + + (2*16)+7 , (2*16)+8 , (2*16)+9 , (2*16)+10, (2*16)+11, + (2*16)+12, (2*16)+13, (2*16)+14, (2*16)+15, + + (3*16)+7 , (3*16)+8 , (3*16)+9 , (3*16)+10, (3*16)+11, + (3*16)+12, (3*16)+13, (3*16)+14, (3*16)+15, + + }, + .oobavail = 7 * 4, + .oobfree = { + {(0*16)+0, 7}, + {(1*16)+0, 7}, + {(2*16)+0, 7}, + {(3*16)+0, 7}, + }, + } +}; + +static struct nfc_geometry nfc_geometry_2K_64_BCH_ECC4 = { + .page_data_size = 2048, + .page_oob_size = 64, + .ecc_algorithm = "BCH", + .ecc_strength = 4, + .buffer_count = 4, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 8 * 4, + .eccpos = { + + (0*16)+8 , (0*16)+9 , (0*16)+10, (0*16)+11, + (0*16)+12, (0*16)+13, (0*16)+14, (0*16)+15, + + (1*16)+8 , (1*16)+9 , (1*16)+10, (1*16)+11, + (1*16)+12, (1*16)+13, (1*16)+14, (1*16)+15, + + (2*16)+8 , (2*16)+9 , (2*16)+10, (2*16)+11, + (2*16)+12, (2*16)+13, (2*16)+14, (2*16)+15, + + (3*16)+8 , (3*16)+9 , (3*16)+10, (3*16)+11, + (3*16)+12, (3*16)+13, (3*16)+14, (3*16)+15, + + }, + .oobavail = 8 * 4, + .oobfree = { + {(0*16)+0, 8}, + {(1*16)+0, 8}, + {(2*16)+0, 8}, + {(3*16)+0, 8}, + }, + } +}; + +static struct nfc_geometry nfc_geometry_4K_128_BCH_ECC4 = { + .page_data_size = 4096, + .page_oob_size = 128, + .ecc_algorithm = "BCH", + .ecc_strength = 4, + .buffer_count = 8, + .spare_buf_size = 16, + .spare_buf_spill = 0, + .mtd_layout = { + .eccbytes = 8 * 8, + .eccpos = { + + (0*16)+8 , (0*16)+9 , (0*16)+10, (0*16)+11, + (0*16)+12, (0*16)+13, (0*16)+14, (0*16)+15, + + (1*16)+8 , (1*16)+9 , (1*16)+10, (1*16)+11, + (1*16)+12, (1*16)+13, (1*16)+14, (1*16)+15, + + (2*16)+8 , (2*16)+9 , (2*16)+10, (2*16)+11, + (2*16)+12, (2*16)+13, (2*16)+14, (2*16)+15, + + (3*16)+8 , (3*16)+9 , (3*16)+10, (3*16)+11, + (3*16)+12, (3*16)+13, (3*16)+14, (3*16)+15, + + (4*16)+8 , (4*16)+9 , (4*16)+10, (4*16)+11, + (4*16)+12, (4*16)+13, (4*16)+14, (4*16)+15, + + (5*16)+8 , (5*16)+9 , (5*16)+10, (5*16)+11, + (5*16)+12, (5*16)+13, (5*16)+14, (5*16)+15, + + (6*16)+8 , (6*16)+9 , (6*16)+10, (6*16)+11, + (6*16)+12, (6*16)+13, (6*16)+14, (6*16)+15, + + (7*16)+8 , (7*16)+9 , (7*16)+10, (7*16)+11, + (7*16)+12, (7*16)+13, (7*16)+14, (7*16)+15, + + }, + .oobavail = 8 * 8, + .oobfree = { + {(0*16)+0, 8}, + {(1*16)+0, 8}, + {(2*16)+0, 8}, + {(3*16)+0, 8}, + {(4*16)+0, 8}, + {(5*16)+0, 8}, + {(6*16)+0, 8}, + {(7*16)+0, 8}, + }, + } +}; + +static struct nfc_geometry nfc_geometry_4K_218_BCH_ECC8 = { + .page_data_size = 4096, + .page_oob_size = 218, + .ecc_algorithm = "BCH", + .ecc_strength = 8, + .buffer_count = 8, + .spare_buf_size = 26, + .spare_buf_spill = 10, + .mtd_layout = { + .eccbytes = 32 /*10 * 8*/, /* See notes above. */ + .eccpos = { + + (0*26)+12, (0*26)+13, (0*26)+14, (0*26)+15, (0*26)+16, + (0*26)+17, (0*26)+18, (0*26)+19, (0*26)+20, (0*26)+21, + + (1*26)+12, (1*26)+13, (1*26)+14, (1*26)+15, (1*26)+16, + (1*26)+17, (1*26)+18, (1*26)+19, (1*26)+20, (1*26)+21, + + (2*26)+12, (2*26)+13, (2*26)+14, (2*26)+15, (2*26)+16, + (2*26)+17, (2*26)+18, (2*26)+19, (2*26)+20, (2*26)+21, + + (3*26)+12, (3*26)+13, (3*26)+14, (3*26)+15, (3*26)+16, + (3*26)+17, (3*26)+18, (3*26)+19, (3*26)+20, (3*26)+21, + + (4*26)+12, (4*26)+13, (4*26)+14, (4*26)+15, (4*26)+16, + (4*26)+17, (4*26)+18, (4*26)+19, (4*26)+20, (4*26)+21, + + (5*26)+12, (5*26)+13, (5*26)+14, (5*26)+15, (5*26)+16, + (5*26)+17, (5*26)+18, (5*26)+19, (5*26)+20, (5*26)+21, + + (6*26)+12, (6*26)+13, (6*26)+14, (6*26)+15, + /* See notes above. + (6*26)+16, + (6*26)+17, (6*26)+18, (6*26)+19, (6*26)+20, (6*26)+21, + + (7*26)+12, (7*26)+13, (7*26)+14, (7*26)+15, (7*26)+16, + (7*26)+17, (7*26)+18, (7*26)+19, (7*26)+20, (7*26)+21, + */ + + }, + .oobavail = 96 /*(16 * 8) + 10*/, /* See notes above. */ + .oobfree = { + {(0*26)+0, 12}, {(0*26)+22, 4}, + {(1*26)+0, 12}, {(1*26)+22, 4}, + {(2*26)+0, 12}, {(2*26)+22, 4}, + {(3*26)+0, 48}, /* See notes above. */ + /* See notes above. + {(3*26)+0, 12}, {(3*26)+22, 4}, + {(4*26)+0, 12}, {(4*26)+22, 4}, + {(5*26)+0, 12}, {(5*26)+22, 4}, + {(6*26)+0, 12}, {(6*26)+22, 4}, + {(7*26)+0, 12}, {(7*26)+22, 4 + 10}, + */ + }, + } +}; + +/* + * When the logical geometry differs from the NFC geometry (e.g., + * interleaving), we synthesize a layout rather than use the one that comes with + * the NFC geometry. See mal_set_logical_geometry(). + */ + +static struct nand_ecclayout synthetic_layout; + +/* + * These structures describe how the BBT code will find block marks in the OOB + * area of a page. Don't be confused by the fact that this is the same type used + * to describe bad block tables. Some of the same information is needed, so the + * designers use the same structure for two conceptually distinct functions. + */ + +static uint8_t block_mark_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr small_page_block_mark_descriptor = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = 5, + .len = 1, + .pattern = block_mark_pattern, +}; + +static struct nand_bbt_descr large_page_block_mark_descriptor = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = 0, + .len = 2, + .pattern = block_mark_pattern, +}; + +/* + * Bad block table descriptors for the main and mirror tables. + */ + +static uint8_t bbt_main_pattern[] = { 'B', 'b', 't', '0' }; +static uint8_t bbt_mirror_pattern[] = { '1', 't', 'b', 'B' }; + +static struct nand_bbt_descr bbt_main_descriptor = { + .options = + NAND_BBT_LASTBLOCK | + NAND_BBT_CREATE | + NAND_BBT_WRITE | + NAND_BBT_2BIT | + NAND_BBT_VERSION | + NAND_BBT_PERCHIP, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = bbt_main_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descriptor = { + .options = + NAND_BBT_LASTBLOCK | + NAND_BBT_CREATE | + NAND_BBT_WRITE | + NAND_BBT_2BIT | + NAND_BBT_VERSION | + NAND_BBT_PERCHIP, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = bbt_mirror_pattern, +}; + +#ifdef EVENT_REPORTING + +/** + * struct event - A single record in the event trace. + * + * @time: The time at which the event occurred. + * @nesting: Indicates function call nesting. + * @description: A description of the event. + */ + +struct event { + ktime_t time; + unsigned int nesting; + char *description; +}; + +/** + * The event trace. + * + * @overhead: The delay to take a time stamp and nothing else. + * @nesting: The current nesting level. + * @overflow: Indicates the trace overflowed. + * @next: Index of the next event to write. + * @events: The array of events. + */ + +#define MAX_EVENT_COUNT (200) + +static struct { + ktime_t overhead; + int nesting; + int overflow; + unsigned int next; + struct event events[MAX_EVENT_COUNT]; +} event_trace; + +/** + * reset_event_trace() - Resets the event trace. + */ +static void reset_event_trace(void) +{ + event_trace.nesting = 0; + event_trace.overflow = false; + event_trace.next = 0; +} + +/** + * add_event() - Adds an event to the event trace. + * + * @description: A description of the event. + * @delta: A delta to the nesting level for this event [-1, 0, 1]. + */ +static inline void add_event(char *description, int delta) +{ + struct event *event; + + if (!imx_nfc_module_report_events) + return; + + if (event_trace.overflow) + return; + + if (event_trace.next >= MAX_EVENT_COUNT) { + event_trace.overflow = true; + return; + } + + event = event_trace.events + event_trace.next; + + event->time = ktime_get(); + + event->description = description; + + if (!delta) + event->nesting = event_trace.nesting; + else if (delta < 0) { + event->nesting = event_trace.nesting - 1; + event_trace.nesting -= 2; + } else { + event->nesting = event_trace.nesting + 1; + event_trace.nesting += 2; + } + + if (event_trace.nesting < 0) + event_trace.nesting = 0; + + event_trace.next++; + +} + +/** + * add_state_event_l() - Adds an event to display some state. + * + * @address: The address to examine. + * @mask: A mask to apply to the contents of the given address. + * @clear: An event message to add if the result is zero. + * @not_zero: An event message to add if the result is not zero. + */ +static void add_state_event_l(void *address, uint32_t mask, + char *zero, char *not_zero) +{ + int state; + state = !!(__raw_readl(address) & mask); + if (state) + add_event(not_zero, 0); + else + add_event(zero, 0); +} + +/** + * start_event_trace() - Starts an event trace and adds the first event. + * + * @description: A description of the first event. + */ +static void start_event_trace(char *description) +{ + + ktime_t t0; + ktime_t t1; + + if (!imx_nfc_module_report_events) + return; + + reset_event_trace(); + + t0 = ktime_get(); + t1 = ktime_get(); + + event_trace.overhead = ktime_sub(t1, t0); + + add_event(description, 1); + +} + +/** + * dump_event_trace() - Dumps the event trace. + */ +static void dump_event_trace(void) +{ + unsigned int i; + time_t seconds; + long nanoseconds; + char line[100]; + int o; + struct event *first_event; + struct event *last_event; + struct event *matching_event; + struct event *event; + ktime_t delta; + + /* Check if event reporting is turned off. */ + + if (!imx_nfc_module_report_events) + return; + + /* Print important facts about this event trace. */ + + printk(KERN_DEBUG "\n+--------------\n"); + + printk(KERN_DEBUG "| Overhead : [%d:%d]\n", + event_trace.overhead.tv.sec, + event_trace.overhead.tv.nsec); + + if (!event_trace.next) { + printk(KERN_DEBUG "| No Events\n"); + return; + } + + first_event = event_trace.events; + last_event = event_trace.events + (event_trace.next - 1); + + delta = ktime_sub(last_event->time, first_event->time); + printk(KERN_DEBUG "| Elapsed Time: [%d:%d]\n", + delta.tv.sec, delta.tv.nsec); + + if (event_trace.overflow) + printk(KERN_DEBUG "| Overflow!\n"); + + /* Print the events in this history. */ + + for (i = 0, event = event_trace.events; + i < event_trace.next; i++, event++) { + + /* Get the delta between this event and the previous event. */ + + if (!i) { + seconds = 0; + nanoseconds = 0; + } else { + delta = ktime_sub(event[0].time, event[-1].time); + seconds = delta.tv.sec; + nanoseconds = delta.tv.nsec; + } + + /* Print the current event. */ + + o = 0; + + o = snprintf(line, sizeof(line) - o, "| [%ld:% 10ld]%*s %s", + seconds, nanoseconds, + event->nesting, "", + event->description); + /* Check if this is the last event in a nested series. */ + + if (i && (event[0].nesting < event[-1].nesting)) { + + for (matching_event = event - 1;; matching_event--) { + + if (matching_event < event_trace.events) { + matching_event = 0; + break; + } + + if (matching_event->nesting == event->nesting) + break; + + } + + if (matching_event) { + delta = ktime_sub(event->time, + matching_event->time); + o += snprintf(line + o, sizeof(line) - o, + " <%d:%d]", delta.tv.sec, + delta.tv.nsec); + } + + } + + /* Check if this is the first event in a nested series. */ + + if ((i < event_trace.next - 1) && + (event[0].nesting < event[1].nesting)) { + + for (matching_event = event + 1;; matching_event++) { + + if (matching_event >= + (event_trace.events+event_trace.next)) { + matching_event = 0; + break; + } + + if (matching_event->nesting == event->nesting) + break; + + } + + if (matching_event) { + delta = ktime_sub(matching_event->time, + event->time); + o += snprintf(line + o, sizeof(line) - o, + " [%d:%d>", delta.tv.sec, + delta.tv.nsec); + } + + } + + printk(KERN_DEBUG "%s\n", line); + + } + + printk(KERN_DEBUG "+--------------\n"); + +} + +/** + * stop_event_trace() - Stops an event trace. + * + * @description: A description of the last event. + */ +static void stop_event_trace(char *description) +{ + struct event *event; + + if (!imx_nfc_module_report_events) + return; + + /* + * We want the end of the trace, no matter what happens. If the trace + * has already overflowed, or is about to, just jam this event into the + * last spot. Otherwise, add this event like any other. + */ + + if (event_trace.overflow || (event_trace.next >= MAX_EVENT_COUNT)) { + event = event_trace.events + (MAX_EVENT_COUNT - 1); + event->time = ktime_get(); + event->description = description; + event->nesting = 0; + } else { + add_event(description, -1); + } + + dump_event_trace(); + reset_event_trace(); + +} + +#else /* EVENT_REPORTING */ + +#define start_event_trace(description) do {} while (0) +#define add_event(description, delta) do {} while (0) +#define add_state_event_l(address, mask, zero, not_zero) do {} while (0) +#define stop_event_trace(description) do {} while (0) +#define dump_event_trace() do {} while (0) + +#endif /* EVENT_REPORTING */ + +/** + * unimplemented() - Announces intentionally unimplemented features. + * + * @this: Per-device data. + * @msg: A message about the unimplemented feature. + */ +static inline void unimplemented(struct imx_nfc_data *this, const char * msg) +{ + dev_err(this->dev, "Intentionally unimplemented: %s", msg); +} + +/** + * raw_read_mask_w() - Reads masked bits in a 16-bit hardware register. + */ +static inline uint16_t raw_read_mask_w(uint16_t mask, void *address) +{ + return __raw_readw(address) & mask; +} + +/** + * raw_set_mask_w() - Sets bits in a 16-bit hardware register. + */ +static inline void raw_set_mask_w(uint16_t mask, void *address) +{ + __raw_writew(__raw_readw(address) | mask, address); +} + +/** + * raw_clr_mask_w() - Clears bits in a 16-bit hardware register. + */ +static inline void raw_clr_mask_w(uint16_t mask, void *address) +{ + __raw_writew(__raw_readw(address) & (~mask), address); +} + +/** + * raw_read_mask_l() - Reads masked bits in a 32-bit hardware register. + */ +static inline uint32_t raw_read_mask_l(uint32_t mask, void *address) +{ + return __raw_readl(address) & mask; +} + +/** + * raw_set_mask_l() - Sets bits in a 32-bit hardware register. + */ +static inline void raw_set_mask_l(uint32_t mask, void *address) +{ + __raw_writel(__raw_readl(address) | mask, address); +} + +/** + * raw_clr_mask_l() - Clears bits in a 32-bit hardware register. + */ +static inline void raw_clr_mask_l(uint32_t mask, void *address) +{ + __raw_writel(__raw_readl(address) & (~mask), address); +} + +/** + * is_large_page_chip() - Returns true for large page media. + * + * @this: Per-device data. + */ +static inline int is_large_page_chip(struct imx_nfc_data *this) +{ + return (this->physical_geometry.page_data_size > 512); +} + +/** + * is_small_page_chip() - Returns true for small page media. + * + * @this: Per-device data. + */ +static inline int is_small_page_chip(struct imx_nfc_data *this) +{ + return !is_large_page_chip(this); +} + +/** + * get_cycle_in_ns() - Returns the given device's cycle period, in ns. + * + * @this: Per-device data. + */ +static inline unsigned get_cycle_in_ns(struct imx_nfc_data *this) +{ + unsigned long cycle_in_ns; + + cycle_in_ns = 1000000000 / clk_get_rate(this->clock); + + if (!this->nfc->get_symmetric(this)) + cycle_in_ns *= 2; + + return cycle_in_ns; + +} + +/** + * nfc_util_set_best_cycle() - Sets the closest possible NAND Flash bus cycle. + * + * This function computes the clock setup that will best approximate the given + * target Flash bus cycle period. + * + * For some NFC versions, we can make the clock "symmetric." When the clock + * is "symmetric," the hardware waits one NFC clock for every read/write cycle. + * When the clock is "asymmetric," the hardware waits two NFC clocks for every + * read/write cycle. Thus, making the clock asymmetric essentially divides the + * NFC clock by two. + * + * We compute the target frequency that matches the given target period. We then + * discover the closest available match with that frequency and the closest + * available match with double that frequency (for use with an asymmetric + * clock). We implement the best choice of original clock and symmetric or + * asymmetric setting, preferring symmetric clocks. + * + * @this: Per-device data. + * @ns: The target cycle period, in nanoseconds. + * @no_asym: Disallow making the clock asymmetric. + * @no_sym: Disallow making the clock symmetric. + */ +static int nfc_util_set_best_cycle(struct imx_nfc_data *this, + unsigned int ns, int no_asym, int no_sym) +{ + unsigned long target_hz; + long symmetric_hz; + long symmetric_delta_hz; + long asymmetric_hz; + long asymmetric_delta_hz; + unsigned long best_hz; + int best_symmetry_setting; + struct device *dev = this->dev; + + /* The target cycle period must be greater than zero. */ + + if (!ns) + return -EINVAL; + + /* Compute the target frequency. */ + + target_hz = 1000000000 / ns; + + /* Find out how close we can get with a symmetric clock. */ + + if (!no_sym && this->nfc->can_be_symmetric) + symmetric_hz = clk_round_rate(this->clock, target_hz); + else + symmetric_hz = -EINVAL; + + /* Find out how close we can get with an asymmetric clock. */ + + if (!no_asym) + asymmetric_hz = clk_round_rate(this->clock, target_hz * 2); + else + asymmetric_hz = -EINVAL; + + /* Does anything work at all? */ + + if ((symmetric_hz == -EINVAL) && (asymmetric_hz == -EINVAL)) { + dev_err(dev, "Can't support Flash bus cycle of %uns\n", ns); + return -EINVAL; + } + + /* Discover the best match. */ + + if ((symmetric_hz != -EINVAL) && (asymmetric_hz != -EINVAL)) { + + symmetric_delta_hz = target_hz - symmetric_hz; + asymmetric_delta_hz = target_hz - (asymmetric_hz / 2); + + if (symmetric_delta_hz <= asymmetric_delta_hz) + best_symmetry_setting = true; + else + best_symmetry_setting = false; + + } else if (symmetric_hz != -EINVAL) { + best_symmetry_setting = true; + } else { + best_symmetry_setting = false; + } + + best_hz = best_symmetry_setting ? symmetric_hz : asymmetric_hz; + + /* Implement the best match. */ + + this->nfc->set_symmetric(this, best_symmetry_setting); + + return clk_set_rate(this->clock, best_hz); + +} + +/** + * nfc_util_wait_for_the_nfc() - Waits for the NFC to finish an operation. + * + * @this: Per-device data. + * @use_irq: Indicates that we should wait for an interrupt rather than polling + * and delaying. + */ +static void nfc_util_wait_for_the_nfc(struct imx_nfc_data *this, int use_irq) +{ + unsigned spin_count; + struct device *dev = this->dev; + + /* Apply the override, if any. */ + + switch (this->interrupt_override) { + + case NEVER: + use_irq = false; + break; + + case DRIVER_CHOICE: + break; + + case ALWAYS: + use_irq = true; + break; + + } + + /* Check if we're using interrupts. */ + + if (use_irq) { + + /* + * If control arrives here, the caller wants to use interrupts. + * Presumably, this operation is known to take a very long time. + */ + + if (this->nfc->is_interrupting(this)) { + add_event("Waiting for the NFC (early interrupt)", 1); + this->nfc->clear_interrupt(this); + } else { + add_event("Waiting for the NFC (interrupt)", 1); + this->nfc->unmask_interrupt(this); + wait_for_completion(&this->done); + } + + add_event("NFC done", -1); + + } else { + + /* + * If control arrives here, the caller doesn't want to use + * interrupts. Presumably, this operation is too quick to + * justify the overhead. Leave the interrupt masked, and loop + * until the interrupt bit lights up, or we time out. + * + * We spin for a maximum of about 2ms before declaring a time + * out. No operation we could possibly spin on should take that + * long. + */ + + spin_count = 2000; + + add_event("Waiting for the NFC (polling)", 1); + + for (; spin_count > 0; spin_count--) { + + if (this->nfc->is_interrupting(this)) { + this->nfc->clear_interrupt(this); + add_event("NFC done", -1); + return; + } + + udelay(1); + + } + + /* Timed out. */ + + add_event("Timed out", -1); + + dev_err(dev, "[wait_for_the_nfc] ===== Time Out =====\n"); + dump_event_trace(); + + } + +} + +/** + * nfc_util_bytewise_copy_from_nfc_mem() - Copies bytes from the NFC memory. + * + * @from: A pointer to the source memory. + * @to: A pointer to the destination memory. + * @size: The number of bytes to copy. + */ +static void nfc_util_bytewise_copy_from_nfc_mem(const void *from, + void *to, size_t n) +{ + unsigned int i; + const uint8_t *f = from; + uint8_t *t = to; + uint16_t *p; + uint16_t x; + + for (i = 0; i < n; i++, f++, t++) { + + p = (uint16_t *) (((unsigned long) f) & ~((unsigned long) 1)); + + x = __raw_readw(p); + + if (((unsigned long) f) & 0x1) + *t = (x >> 8) & 0xff; + else + *t = (x >> 0) & 0xff; + + } + +} + +/** + * nfc_util_bytewise_copy_to_nfc_mem() - Copies bytes to the NFC memory. + * + * @from: A pointer to the source memory. + * @to: A pointer to the destination memory. + * @size: The number of bytes to copy. + */ +static void nfc_util_bytewise_copy_to_nfc_mem(const void *from, + void *to, size_t n) +{ + unsigned int i; + const uint8_t *f = from; + uint8_t *t = to; + uint16_t *p; + uint16_t x; + + for (i = 0; i < n; i++, f++, t++) { + + p = (uint16_t *) (((unsigned long) t) & ~((unsigned long) 1)); + + x = __raw_readw(p); + + if (((unsigned long) t) & 0x1) + ((uint8_t *)(&x))[1] = *f; + else + ((uint8_t *)(&x))[0] = *f; + + __raw_writew(x, p); + + } + +} + +/** + * nfc_util_copy_from_nfc_mem() - Copies from the NFC memory to main memory. + * + * @from: A pointer to the source memory. + * @to: A pointer to the destination memory. + * @size: The number of bytes to copy. + */ +static void nfc_util_copy_from_nfc_mem(const void *from, void *to, size_t n) +{ + unsigned int chunk_count; + + /* + * Check if we're testing bytewise copies. + */ + + if (imx_nfc_module_force_bytewise_copy) + goto force_bytewise_copy; + + /* + * We'd like to use memcpy to get data out of the NFC but, because that + * memory responds only to 16- and 32-byte reads, we can only do so + * safely if both the start and end of both the source and destination + * are perfectly aligned on 4-byte boundaries. + */ + + if (!(((unsigned long) from) & 0x3) && !(((unsigned long) to) & 0x3)) { + + /* + * If control arrives here, both the source and destination are + * aligned on 4-byte boundaries. Compute the number of whole, + * 4-byte chunks we can move. + */ + + chunk_count = n / 4; + + /* + * Move all the chunks we can, and then update the pointers and + * byte count to show what's left. + */ + + if (chunk_count) { + memcpy(to, from, chunk_count * 4); + from += chunk_count * 4; + to += chunk_count * 4; + n -= chunk_count * 4; + } + + } + + /* + * Move what's left. + */ + +force_bytewise_copy: + + nfc_util_bytewise_copy_from_nfc_mem(from, to, n); + +} + +/** + * nfc_util_copy_to_nfc_mem() - Copies from main memory to the NFC memory. + * + * @from: A pointer to the source memory. + * @to: A pointer to the destination memory. + * @size: The number of bytes to copy. + */ +static void nfc_util_copy_to_nfc_mem(const void *from, void *to, size_t n) +{ + unsigned int chunk_count; + + /* + * Check if we're testing bytewise copies. + */ + + if (imx_nfc_module_force_bytewise_copy) + goto force_bytewise_copy; + + /* + * We'd like to use memcpy to get data into the NFC but, because that + * memory responds only to 16- and 32-byte writes, we can only do so + * safely if both the start and end of both the source and destination + * are perfectly aligned on 4-byte boundaries. + */ + + if (!(((unsigned long) from) & 0x3) && !(((unsigned long) to) & 0x3)) { + + /* + * If control arrives here, both the source and destination are + * aligned on 4-byte boundaries. Compute the number of whole, + * 4-byte chunks we can move. + */ + + chunk_count = n / 4; + + /* + * Move all the chunks we can, and then update the pointers and + * byte count to show what's left. + */ + + if (chunk_count) { + memcpy(to, from, chunk_count * 4); + from += chunk_count * 4; + to += chunk_count * 4; + n -= chunk_count * 4; + } + + } + + /* + * Move what's left. + */ + +force_bytewise_copy: + + nfc_util_bytewise_copy_to_nfc_mem(from, to, n); + +} + +/** + * nfc_util_copy_from_the_nfc() - Copies bytes out of the NFC. + * + * This function makes the data in the NFC look like a contiguous, model page. + * + * @this: Per-device data. + * @start: The index of the starting byte in the NFC. + * @buf: A pointer to the destination buffer. + * @len: The number of bytes to copy out. + */ +static void nfc_util_copy_from_the_nfc(struct imx_nfc_data *this, + unsigned int start, uint8_t *buf, unsigned int len) +{ + unsigned int i; + unsigned int count; + unsigned int offset; + unsigned int data_size; + unsigned int oob_size; + unsigned int total_size; + void *spare_base; + unsigned int first_spare; + void *from; + struct nfc_geometry *geometry = this->nfc_geometry; + + /* + * During initialization, the HIL will attempt to read ID bytes. For + * some NFC hardware versions, the ID bytes are deposited in the NFC + * memory, so this function will be called to deliver them. At that + * point, we won't know the NFC geometry. That's OK because we're only + * going to be reading a byte at a time. + * + * If we don't yet know the NFC geometry, just plug in some values that + * make things work for now. + */ + + if (unlikely(!geometry)) { + data_size = NFC_MAIN_BUF_SIZE; + oob_size = 0; + } else { + data_size = geometry->page_data_size; + oob_size = geometry->page_oob_size; + } + + total_size = data_size + oob_size; + + /* Validate. */ + + if ((start >= total_size) || ((start + len) > total_size)) { + dev_err(this->dev, "Bad copy from NFC memory: [%u, %u]\n", + start, len); + return; + } + + /* Check if we're copying anything at all. */ + + if (!len) + return; + + /* Check if anything comes from the main area. */ + + if (start < data_size) { + + /* Compute the bytes to copy from the main area. */ + + count = min(len, data_size - start); + + /* Copy. */ + + nfc_util_copy_from_nfc_mem(this->buffers + start, buf, count); + + buf += count; + start += count; + len -= count; + + } + + /* Check if we're done. */ + + if (!len) + return; + + /* Compute the base address of the spare buffers. */ + + spare_base = this->buffers + + (this->nfc->max_buffer_count * NFC_MAIN_BUF_SIZE); + + /* Discover in which spare buffer the copying begins. */ + + first_spare = (start - data_size) / geometry->spare_buf_size; + + /* Check if anything comes from the regular spare buffer area. */ + + if (first_spare < geometry->buffer_count) { + + /* Start copying from spare buffers. */ + + for (i = first_spare; i < geometry->buffer_count; i++) { + + /* Compute the offset into this spare area. */ + + offset = start - + (data_size + (geometry->spare_buf_size * i)); + + /* Compute the address of that offset. */ + + from = spare_base + offset + + (this->nfc->spare_buf_stride * i); + + /* Compute the bytes to copy from this spare area. */ + + count = min(len, geometry->spare_buf_size - offset); + + /* Copy. */ + + nfc_util_copy_from_nfc_mem(from, buf, count); + + buf += count; + start += count; + len -= count; + + } + + } + + /* Check if we're done. */ + + if (!len) + return; + + /* Compute the offset into the extra spare area. */ + + offset = start - + (data_size + (geometry->spare_buf_size*geometry->buffer_count)); + + /* Compute the address of that offset. */ + + from = spare_base + offset + + (this->nfc->spare_buf_stride * geometry->buffer_count); + + /* Compute the bytes to copy from the extra spare area. */ + + count = min(len, geometry->spare_buf_spill - offset); + + /* Copy. */ + + nfc_util_copy_from_nfc_mem(from, buf, count); + +} + +/** + * nfc_util_copy_to_the_nfc() - Copies bytes into the NFC memory. + * + * This function makes the data in the NFC look like a contiguous, model page. + * + * @this: Per-device data. + * @buf: A pointer to the source buffer. + * @start: The index of the starting byte in the NFC memory. + * @len: The number of bytes to copy in. + */ +static void nfc_util_copy_to_the_nfc(struct imx_nfc_data *this, + const uint8_t *buf, unsigned int start, unsigned int len) +{ + unsigned int i; + unsigned int count; + unsigned int offset; + unsigned int data_size; + unsigned int oob_size; + unsigned int total_size; + void *spare_base; + unsigned int first_spare; + void *to; + struct nfc_geometry *geometry = this->nfc_geometry; + + /* Establish some important facts. */ + + data_size = geometry->page_data_size; + oob_size = geometry->page_oob_size; + total_size = data_size + oob_size; + + /* Validate. */ + + if ((start >= total_size) || ((start + len) > total_size)) { + dev_err(this->dev, "Bad copy to NFC memory: [%u, %u]\n", + start, len); + return; + } + + /* Check if we're copying anything at all. */ + + if (!len) + return; + + /* Check if anything goes to the main area. */ + + if (start < data_size) { + + /* Compute the bytes to copy to the main area. */ + + count = min(len, data_size - start); + + /* Copy. */ + + nfc_util_copy_to_nfc_mem(buf, this->buffers + start, count); + + buf += count; + start += count; + len -= count; + + } + + /* Check if we're done. */ + + if (!len) + return; + + /* Compute the base address of the spare buffers. */ + + spare_base = this->buffers + + (this->nfc->max_buffer_count * NFC_MAIN_BUF_SIZE); + + /* Discover in which spare buffer the copying begins. */ + + first_spare = (start - data_size) / geometry->spare_buf_size; + + /* Check if anything goes to the regular spare buffer area. */ + + if (first_spare < geometry->buffer_count) { + + /* Start copying to spare buffers. */ + + for (i = first_spare; i < geometry->buffer_count; i++) { + + /* Compute the offset into this spare area. */ + + offset = start - + (data_size + (geometry->spare_buf_size * i)); + + /* Compute the address of that offset. */ + + to = spare_base + offset + + (this->nfc->spare_buf_stride * i); + + /* Compute the bytes to copy to this spare area. */ + + count = min(len, geometry->spare_buf_size - offset); + + /* Copy. */ + + nfc_util_copy_to_nfc_mem(buf, to, count); + + buf += count; + start += count; + len -= count; + + } + + } + + /* Check if we're done. */ + + if (!len) + return; + + /* Compute the offset into the extra spare area. */ + + offset = start - + (data_size + (geometry->spare_buf_size*geometry->buffer_count)); + + /* Compute the address of that offset. */ + + to = spare_base + offset + + (this->nfc->spare_buf_stride * geometry->buffer_count); + + /* Compute the bytes to copy to the extra spare area. */ + + count = min(len, geometry->spare_buf_spill - offset); + + /* Copy. */ + + nfc_util_copy_to_nfc_mem(buf, to, count); + +} + +/** + * nfc_util_isr() - i.MX NFC ISR. + * + * @irq: The arriving interrupt number. + * @context: A cookie for this ISR. + */ +static irqreturn_t nfc_util_isr(int irq, void *cookie) +{ + struct imx_nfc_data *this = cookie; + this->nfc->mask_interrupt(this); + this->nfc->clear_interrupt(this); + complete(&this->done); + return IRQ_HANDLED; +} + +/** + * nfc_util_send_cmd() - Sends a command to the current chip, without waiting. + * + * @this: Per-device data. + * @command: The command code. + */ + +static void nfc_util_send_cmd(struct imx_nfc_data *this, unsigned int command) +{ + + add_event("Entering nfc_util_send_cmd", 1); + + this->nfc->command_cycle(this, command); + + add_event("Exiting nfc_util_send_cmd", -1); + +} + +/** + * nfc_util_send_cmd_and_addrs() - Sends a cmd and addrs to the current chip. + * + * This function conveniently combines sending a command, and then sending + * optional addresses, waiting for the NFC to finish will all steps. + * + * @this: Per-device data. + * @command: The command code. + * @column: The column address to send, or -1 if no column address applies. + * @page: The page address to send, or -1 if no page address applies. + */ + +static void nfc_util_send_cmd_and_addrs(struct imx_nfc_data *this, + unsigned command, int column, int page) +{ + uint32_t page_mask; + + add_event("Entering nfc_util_send_cmd_and_addrs", 1); + + /* Send the command.*/ + + add_event("Sending the command...", 0); + + nfc_util_send_cmd(this, command); + + nfc_util_wait_for_the_nfc(this, false); + + /* Send the addresses. */ + + add_event("Sending the addresses...", 0); + + if (column != -1) { + + this->nfc->write_cycle(this, (column >> 0) & 0xff); + + if (is_large_page_chip(this)) + this->nfc->write_cycle(this, (column >> 8) & 0xff); + + } + + if (page != -1) { + + page_mask = this->nand.pagemask; + + do { + this->nfc->write_cycle(this, page & 0xff); + page_mask >>= 8; + page >>= 8; + } while (page_mask != 0); + + } + + add_event("Exiting nfc_util_send_cmd_and_addrs", -1); + +} + +/** + * nfc_2_x_exit() - Version-specific shut down. + * + * @this: Per-device data. + */ +static void nfc_2_x_exit(struct imx_nfc_data *this) +{ +} + +/** + * nfc_2_x_clear_interrupt() - Clears an interrupt. + * + * @this: Per-device data. + */ +static void nfc_2_x_clear_interrupt(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + raw_clr_mask_w(NFC_2_X_CONFIG2_INT_MSK, base + NFC_2_X_CONFIG2_REG_OFF); +} + +/** + * nfc_2_x_is_interrupting() - Returns the interrupt bit status. + * + * @this: Per-device data. + */ +static int nfc_2_x_is_interrupting(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + return raw_read_mask_w(NFC_2_X_CONFIG2_INT_MSK, + base + NFC_2_X_CONFIG2_REG_OFF); +} + +/** + * nfc_2_x_command_cycle() - Sends a command. + * + * @this: Per-device data. + * @command: The command code. + */ +static void nfc_2_x_command_cycle(struct imx_nfc_data *this, unsigned command) +{ + void *base = this->primary_regs; + + /* Write the command we want to send. */ + + __raw_writew(command, base + NFC_2_X_FLASH_CMD_REG_OFF); + + /* Launch a command cycle. */ + + __raw_writew(NFC_2_X_CONFIG2_FCMD_MSK, base + NFC_2_X_CONFIG2_REG_OFF); + +} + +/** + * nfc_2_x_write_cycle() - Writes a single byte. + * + * @this: Per-device data. + * @byte: The byte. + */ +static void nfc_2_x_write_cycle(struct imx_nfc_data *this, unsigned int byte) +{ + void *base = this->primary_regs; + + /* Give the NFC the byte we want to write. */ + + __raw_writew(byte, base + NFC_2_X_FLASH_ADDR_REG_OFF); + + /* Launch an address cycle. + * + * This is *sort* of a hack, but not really. The intent of the NFC + * design is for this operation to send an address byte. In fact, the + * NFC neither knows nor cares what we're sending. It justs runs a write + * cycle. + */ + + __raw_writew(NFC_2_X_CONFIG2_FADD_MSK, base + NFC_2_X_CONFIG2_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, false); + +} + +/** + * nfc_2_0_init() - Version-specific hardware initialization. + * + * @this: Per-device data. + */ +static int nfc_2_0_init(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + + /* Initialize the interrupt machinery. */ + + this->nfc->mask_interrupt(this); + this->nfc->clear_interrupt(this); + + /* Unlock the NFC memory. */ + + __raw_writew(0x2, base + NFC_2_X_CONFIG_REG_OFF); + + /* Set the unlocked block range to cover the entire medium. */ + + __raw_writew(0 , base + NFC_2_0_UNLOCK_START_REG_OFF); + __raw_writew(~0, base + NFC_2_0_UNLOCK_END_REG_OFF); + + /* Unlock all blocks. */ + + __raw_writew(0x4, base + NFC_2_X_WR_PROT_REG_OFF); + + /* Return success. */ + + return 0; + +} + +/** + * nfc_2_0_mask_interrupt() - Masks interrupts. + * + * @this: Per-device data. + */ +static void nfc_2_0_mask_interrupt(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + raw_set_mask_w(NFC_2_0_CONFIG1_INT_MSK_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); +} + +/** + * nfc_2_0_unmask_interrupt() - Unmasks interrupts. + * + * @this: Per-device data. + */ +static void nfc_2_0_unmask_interrupt(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + raw_clr_mask_w(NFC_2_0_CONFIG1_INT_MSK_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); +} + +/** + * nfc_2_0_set_ecc() - Turns ECC on or off. + * + * @this: Per-device data. + * @on: Indicates if ECC should be on or off. + */ +static void nfc_2_0_set_ecc(struct imx_nfc_data *this, int on) +{ + void *base = this->primary_regs; + + if (on) + raw_set_mask_w(NFC_2_0_CONFIG1_ECC_EN_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); + else + raw_clr_mask_w(NFC_2_0_CONFIG1_ECC_EN_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); + +} + +/** + * nfc_2_0_get_ecc_status() - Reports ECC errors. + * + * @this: Per-device data. + */ +static int nfc_2_0_get_ecc_status(struct imx_nfc_data *this) +{ + unsigned int i; + void *base = this->primary_regs; + uint16_t status_reg; + unsigned int buffer_status[4]; + int status; + + /* Get the entire status register. */ + + status_reg = __raw_readw(base + NFC_2_0_ECC_STATUS_REG_OFF); + + /* Pick out the status for each buffer. */ + + buffer_status[0] = (status_reg & NFC_2_0_ECC_STATUS_NOSER1_MSK) + >> NFC_2_0_ECC_STATUS_NOSER1_POS; + + buffer_status[1] = (status_reg & NFC_2_0_ECC_STATUS_NOSER2_MSK) + >> NFC_2_0_ECC_STATUS_NOSER2_POS; + + buffer_status[2] = (status_reg & NFC_2_0_ECC_STATUS_NOSER3_MSK) + >> NFC_2_0_ECC_STATUS_NOSER3_POS; + + buffer_status[3] = (status_reg & NFC_2_0_ECC_STATUS_NOSER4_MSK) + >> NFC_2_0_ECC_STATUS_NOSER4_POS; + + /* Loop through the buffers we're actually using. */ + + status = 0; + + for (i = 0; i < this->nfc_geometry->buffer_count; i++) { + + if (buffer_status[i] > this->nfc_geometry->ecc_strength) { + status = -1; + break; + } + + status += buffer_status[i]; + + } + + /* Return the final result. */ + + return status; + +} + +/** + * nfc_2_0_get_symmetric() - Indicates if the clock is symmetric. + * + * @this: Per-device data. + */ +static int nfc_2_0_get_symmetric(struct imx_nfc_data *this) +{ + void *base = this->primary_regs; + + return !!raw_read_mask_w(NFC_2_0_CONFIG1_ONE_CYLE_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); + +} + +/** + * nfc_2_0_set_symmetric() - Turns symmetric clock mode on or off. + * + * @this: Per-device data. + */ +static void nfc_2_0_set_symmetric(struct imx_nfc_data *this, int on) +{ + void *base = this->primary_regs; + + if (on) + raw_set_mask_w(NFC_2_0_CONFIG1_ONE_CYLE_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); + else + raw_clr_mask_w(NFC_2_0_CONFIG1_ONE_CYLE_MSK, + base + NFC_2_0_CONFIG1_REG_OFF); + +} + +/** + * nfc_2_0_set_geometry() - Configures for the medium geometry. + * + * @this: Per-device data. + */ +static int nfc_2_0_set_geometry(struct imx_nfc_data *this) +{ + struct physical_geometry *physical = &this->physical_geometry; + + /* Select an NFC geometry. */ + + switch (physical->page_data_size) { + + case 512: + this->nfc_geometry = &nfc_geometry_512_16_RS_ECC4; + break; + + case 2048: + this->nfc_geometry = &nfc_geometry_2K_64_RS_ECC4; + break; + + default: + dev_err(this->dev, "NFC can't handle page size: %u", + physical->page_data_size); + return !0; + break; + + } + + /* + * This NFC version receives page size information from a register + * that's external to the NFC. We must rely on platform-specific code + * to set this register for us. + */ + + return this->pdata->set_page_size(physical->page_data_size); + +} + +/** + * nfc_2_0_select_chip() - Selects the current chip. + * + * @this: Per-device data. + * @chip: The chip number to select, or -1 to select no chip. + */ +static void nfc_2_0_select_chip(struct imx_nfc_data *this, int chip) +{ +} + +/** + * nfc_2_0_read_cycle() - Applies a single read cycle to the current chip. + * + * @this: Per-device data. + */ +static unsigned int nfc_2_0_read_cycle(struct imx_nfc_data *this) +{ + uint8_t byte; + unsigned int result; + void *base = this->primary_regs; + + /* Read into main buffer 0. */ + + __raw_writew(0x0, base + NFC_2_0_BUF_ADDR_REG_OFF); + + /* Launch a "Data Out" operation. */ + + __raw_writew(0x4 << NFC_2_X_CONFIG2_FDO_POS, + base + NFC_2_X_CONFIG2_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, false); + + /* Get the result from the NFC memory. */ + + nfc_util_copy_from_the_nfc(this, 0, &byte, 1); + result = byte; + + /* Return the results. */ + + return result; + +} + +/** + * nfc_2_0_read_page() - Reads a page from the current chip into the NFC. + * + * @this: Per-device data. + */ +static void nfc_2_0_read_page(struct imx_nfc_data *this) +{ + unsigned int i; + void *base = this->primary_regs; + + /* Loop over the number of buffers in use. */ + + for (i = 0; i < this->nfc_geometry->buffer_count; i++) { + + /* Make the NFC read into the current buffer. */ + + __raw_writew(i << NFC_2_0_BUF_ADDR_RBA_POS, + base + NFC_2_0_BUF_ADDR_REG_OFF); + + /* Launch a page data out operation. */ + + __raw_writew(0x1 << NFC_2_X_CONFIG2_FDO_POS, + base + NFC_2_X_CONFIG2_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + + } + +} + +/** + * nfc_2_0_send_page() - Sends a page from the NFC to the current chip. + * + * @this: Per-device data. + */ +static void nfc_2_0_send_page(struct imx_nfc_data *this) +{ + unsigned int i; + void *base = this->primary_regs; + + /* Loop over the number of buffers in use. */ + + for (i = 0; i < this->nfc_geometry->buffer_count; i++) { + + /* Make the NFC send from the current buffer. */ + + __raw_writew(i << NFC_2_0_BUF_ADDR_RBA_POS, + base + NFC_2_0_BUF_ADDR_REG_OFF); + + /* Launch a page data in operation. */ + + __raw_writew(0x1 << NFC_2_X_CONFIG2_FDI_POS, + base + NFC_2_X_CONFIG2_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + + } + +} + +/** + * nfc_3_2_init() - Hardware initialization. + * + * @this: Per-device data. + */ +static int nfc_3_2_init(struct imx_nfc_data *this) +{ + int error; + unsigned int no_sdma; + unsigned int fmp; + unsigned int rbb_mode; + unsigned int num_of_devices; + unsigned int dma_mode; + unsigned int sbb; + unsigned int nf_big; + unsigned int sb2r; + unsigned int fw; + unsigned int too; + unsigned int add_op; + uint32_t config3; + void *primary_base = this->primary_regs; + void *secondary_base = this->secondary_regs; + + /* Initialize the interrupt machinery. */ + + this->nfc->mask_interrupt(this); + this->nfc->clear_interrupt(this); + + /* Set up the clock. */ + + error = this->nfc->set_closest_cycle(this, + this->pdata->target_cycle_in_ns); + + if (error) + return !0; + + /* We never read the spare area alone. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_SP_EN_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Tell the NFC the "Read Status" command code. */ + + raw_clr_mask_l(NFC_3_2_CONFIG2_ST_CMD_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + + raw_set_mask_l(NAND_CMD_STATUS << NFC_3_2_CONFIG2_ST_CMD_POS, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + + /* + * According to erratum ENGcm09051, the CONFIG3 register doesn't reset + * correctly, so we need to re-build the entire register just in case. + */ + + /* + * Set the NO_SDMA bit to tell the NFC that we are NOT using SDMA. If + * you clear this bit (to indicates you *are* using SDMA), but you + * don't actually set up SDMA, the NFC has been observed to crash the + * hardware when it asserts its DMA request signals. In the future, we + * *may* use SDMA, but it's not worth the effort at this writing. + */ + + no_sdma = 0x1; + + /* + * Set the default FIFO Mode Protection (128 bytes). FMP doesn't work if + * the NO_SDMA bit is set. + */ + + fmp = 0x2; + + /* + * The rbb_mode bit determines how the NFC figures out whether chips are + * ready during automatic operations only (this has no effect on atomic + * operations). The two choices are either to monitor the ready/busy + * signals, or to read the status register. We monitor the ready/busy + * signals. + */ + + rbb_mode = 0x1; + + /* + * We don't yet know how many devices are connected. We'll find out in + * out in nfc_3_2_set_geometry(). + */ + + num_of_devices = 0; + + /* Set the default DMA mode. */ + + dma_mode = 0x0; + + /* Set the default status busy bit. */ + + sbb = 0x6; + + /* Little-endian (the default). */ + + nf_big = 0x0; + + /* Set the default (standard) status bit to record. */ + + sb2r = 0x0; + + /* We support only 8-bit Flash bus width. */ + + fw = 0x1; + + /* We don't support "two-on-one." */ + + too = 0x0; + + /* Set the addressing option. */ + + add_op = 0x3; + + /* Set the CONFIG3 register. */ + + config3 = 0; + + config3 |= no_sdma << NFC_3_2_CONFIG3_NO_SDMA_POS; + config3 |= fmp << NFC_3_2_CONFIG3_FMP_POS; + config3 |= rbb_mode << NFC_3_2_CONFIG3_RBB_MODE_POS; + config3 |= num_of_devices << NFC_3_2_CONFIG3_NUM_OF_DEVICES_POS; + config3 |= dma_mode << NFC_3_2_CONFIG3_DMA_MODE_POS; + config3 |= sbb << NFC_3_2_CONFIG3_SBB_POS; + config3 |= nf_big << NFC_3_2_CONFIG3_NF_BIG_POS; + config3 |= sb2r << NFC_3_2_CONFIG3_SB2R_POS; + config3 |= fw << NFC_3_2_CONFIG3_FW_POS; + config3 |= too << NFC_3_2_CONFIG3_TOO_POS; + config3 |= add_op << NFC_3_2_CONFIG3_ADD_OP_POS; + + __raw_writel(config3, secondary_base + NFC_3_2_CONFIG3_REG_OFF); + + /* Return success. */ + + return 0; + +} + +/** + * nfc_3_2_set_geometry() - Configures for the medium geometry. + * + * @this: Per-device data. + */ +static int nfc_3_2_set_geometry(struct imx_nfc_data *this) +{ + unsigned int ps; + unsigned int cmd_phases; + unsigned int pages_per_chip; + unsigned int addr_phases0; + unsigned int addr_phases1; + unsigned int pages_per_block; + unsigned int ecc_mode; + unsigned int ppb; + unsigned int spas; + unsigned int mask; + uint32_t config2; + unsigned int num_of_devices; + uint32_t config3; + unsigned int x; + unsigned int chip; + struct physical_geometry *physical = &this->physical_geometry; + void *secondary_base = this->secondary_regs; + + /* + * Select an NFC geometry based on the physical geometry and the + * capabilities of this NFC. + */ + + switch (physical->page_data_size) { + + case 512: + this->nfc_geometry = &nfc_geometry_512_16_BCH_ECC4; + ps = 0; + break; + + case 2048: + this->nfc_geometry = &nfc_geometry_2K_64_BCH_ECC4; + ps = 1; + break; + + case 4096: + + switch (this->physical_geometry.page_oob_size) { + + case 128: + this->nfc_geometry = &nfc_geometry_4K_128_BCH_ECC4; + break; + + case 218: + this->nfc_geometry = &nfc_geometry_4K_218_BCH_ECC8; + break; + + default: + dev_err(this->dev, + "NFC can't handle page geometry: %u+%u", + physical->page_data_size, + physical->page_oob_size); + return !0; + break; + + } + + ps = 2; + + break; + + default: + dev_err(this->dev, "NFC can't handle page size: %u", + physical->page_data_size); + return !0; + break; + + } + + /* Compute the ECC mode. */ + + switch (this->nfc_geometry->ecc_strength) { + + case 4: + ecc_mode = 0; + break; + + case 8: + ecc_mode = 1; + break; + + default: + dev_err(this->dev, "NFC can't handle ECC strength: %u", + this->nfc_geometry->ecc_strength); + return !0; + break; + + } + + /* Compute the pages per block. */ + + pages_per_block = physical->block_size / physical->page_data_size; + + switch (pages_per_block) { + case 32: + ppb = 0; + break; + case 64: + ppb = 1; + break; + case 128: + ppb = 2; + break; + case 256: + ppb = 3; + break; + default: + dev_err(this->dev, "NFC can't handle pages per block: %d", + pages_per_block); + return !0; + break; + } + + /* + * The hardware needs to know the physical size of the spare area, in + * units of half-words (16 bits). This may be different from the amount + * of the spare area we actually expose to MTD. For example, for for + * 2K+112, we only expose 64 spare bytes, but the hardware needs to know + * the real facts. + */ + + spas = this->physical_geometry.page_oob_size >> 1; + + /* + * The number of command phases needed to read a page is directly + * dependent on whether this is a small page or large page device. Large + * page devices need more address phases, terminated by a second command + * phase. + */ + + cmd_phases = is_large_page_chip(this) ? 1 : 0; + + /* + * The num_adr_phases1 field contains the number of phases needed to + * transmit addresses for read and program operations. This is the sum + * of the number of phases for a page address and the number of phases + * for a column address. + * + * The number of phases for a page address is the number of bytes needed + * to contain a page address. + * + * The number of phases for a column address is the number of bytes + * needed to contain a column address. + * + * After computing the sum, we subtract three because a value of zero in + * this field indicates three address phases, and this is the minimum + * number of phases the hardware can comprehend. + * + * We compute the number of phases based on the *physical* geometry, not + * the NFC geometry. For example, even if we are treating a very large + * device as if it contains fewer pages than it actually does, the + * hardware still needs the additional address phases. + */ + + pages_per_chip = + physical->chip_size >> (fls(physical->page_data_size) - 1); + + addr_phases1 = (fls(pages_per_chip) >> 3) + 1; + + addr_phases1 += (fls(physical->page_data_size) >> 3) + 1; + + addr_phases1 -= 3; + + /* + * The num_adr_phases0 field contains the number of phases needed to + * transmit a page address for an erase operation. That is, this is + * the value of addr_phases1, less the number of phases for the column + * address. + * + * The hardware expresses this phase count as one or two cycles less + * than the count indicated by add_phases1 (see the reference manual). + */ + + addr_phases0 = is_large_page_chip(this) ? 1 : 0; + + /* Set the CONFIG2 register. */ + + mask = + NFC_3_2_CONFIG2_PS_MSK | + NFC_3_2_CONFIG2_CMD_PHASES_MSK | + NFC_3_2_CONFIG2_ADDR_PHASES0_MSK | + NFC_3_2_CONFIG2_ECC_MODE_MSK | + NFC_3_2_CONFIG2_PPB_MSK | + NFC_3_2_CONFIG2_ADDR_PHASES1_MSK | + NFC_3_2_CONFIG2_SPAS_MSK ; + + config2 = __raw_readl(secondary_base + NFC_3_2_CONFIG2_REG_OFF); + + config2 &= ~mask; + + config2 |= ps << NFC_3_2_CONFIG2_PS_POS; + config2 |= cmd_phases << NFC_3_2_CONFIG2_CMD_PHASES_POS; + config2 |= addr_phases0 << NFC_3_2_CONFIG2_ADDR_PHASES0_POS; + config2 |= ecc_mode << NFC_3_2_CONFIG2_ECC_MODE_POS; + config2 |= ppb << NFC_3_2_CONFIG2_PPB_POS; + config2 |= addr_phases1 << NFC_3_2_CONFIG2_ADDR_PHASES1_POS; + config2 |= spas << NFC_3_2_CONFIG2_SPAS_POS; + + config2 = __raw_writel(config2, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + + /* + * Compute the num_of_devices field. + * + * It's very important to set this field correctly. This controls the + * set of ready/busy lines to which the NFC listens with automatic + * transactions. If this number is too large, the NFC will listen to + * ready/busy signals that are electrically floating, or it will try to + * read the status registers of chips that don't exist. Conversely, if + * the number is too small, the NFC could believe an operation is + * finished when some chips are still busy. + */ + + num_of_devices = physical->chip_count - 1; + + /* Set the CONFIG3 register. */ + + mask = NFC_3_2_CONFIG3_NUM_OF_DEVICES_MSK; + + config3 = __raw_readl(secondary_base + NFC_3_2_CONFIG3_REG_OFF); + + config3 &= ~mask; + + config3 |= num_of_devices << NFC_3_2_CONFIG3_NUM_OF_DEVICES_POS; + + __raw_writel(config3, secondary_base + NFC_3_2_CONFIG3_REG_OFF); + + /* + * Check if the physical chip count is a power of 2. If not, then + * automatic operations aren't available. This is because we use an + * addressing option (see the ADD_OP field of CONFIG3) that requires + * a number of chips that is a power of 2. + */ + + if (ffs(physical->chip_count) != fls(physical->chip_count)) { + this->nfc->start_auto_read = 0; + this->nfc->start_auto_write = 0; + this->nfc->start_auto_erase = 0; + } + + /* Unlock the NFC RAM. */ + + x = __raw_readl(secondary_base + NFC_3_2_WRPROT_REG_OFF); + x &= ~NFC_3_2_WRPROT_BLS_MSK; + x |= 0x2 << NFC_3_2_WRPROT_BLS_POS; + __raw_writel(x, secondary_base + NFC_3_2_WRPROT_REG_OFF); + + /* Loop over chip selects, setting the unlocked ranges. */ + + for (chip = 0; chip < this->nfc->max_chip_count; chip++) { + + /* Set the unlocked range to cover the entire chip.*/ + + __raw_writel(0xffff0000, secondary_base + + NFC_3_2_UNLOCK_BLK_ADD0_REG_OFF + (chip * 4)); + + /* Unlock. */ + + x = __raw_readl(secondary_base + NFC_3_2_WRPROT_REG_OFF); + x &= ~(NFC_3_2_WRPROT_CS2L_MSK | NFC_3_2_WRPROT_WPC_MSK); + x |= chip << NFC_3_2_WRPROT_CS2L_POS; + x |= 0x4 << NFC_3_2_WRPROT_WPC_POS ; + __raw_writel(x, secondary_base + NFC_3_2_WRPROT_REG_OFF); + + } + + /* Return success. */ + + return 0; + +} + +/** + * nfc_3_2_exit() - Hardware cleanup. + * + * @this: Per-device data. + */ +static void nfc_3_2_exit(struct imx_nfc_data *this) +{ +} + +/** + * nfc_3_2_set_closest_cycle() - Version-specific hardware cleanup. + * + * @this: Per-device data. + */ +static int nfc_3_2_set_closest_cycle(struct imx_nfc_data *this, unsigned ns) +{ + struct clk *parent_clock; + unsigned long parent_clock_rate_in_hz; + unsigned long sym_low_clock_rate_in_hz; + unsigned long asym_low_clock_rate_in_hz; + unsigned int sym_high_cycle_in_ns; + unsigned int asym_high_cycle_in_ns; + + /* + * According to ENGcm09121: + * + * - If the NFC is set to SYMMETRIC mode, the NFC clock divider must + * divide the EMI Slow Clock by NO MORE THAN 4. + * + * - If the NFC is set for ASYMMETRIC mode, the NFC clock divider must + * divide the EMI Slow Clock by NO MORE THAN 3. + * + * We need to compute the corresponding cycle time constraints. Start + * by getting information about the parent clock. + */ + + parent_clock = clk_get_parent(this->clock); + parent_clock_rate_in_hz = clk_get_rate(parent_clock); + + /* Compute the limit frequencies. */ + + sym_low_clock_rate_in_hz = parent_clock_rate_in_hz / 4; + asym_low_clock_rate_in_hz = parent_clock_rate_in_hz / 3; + + /* Compute the corresponding limit cycle periods. */ + + sym_high_cycle_in_ns = 1000000000 / sym_low_clock_rate_in_hz; + asym_high_cycle_in_ns = (1000000000 / asym_low_clock_rate_in_hz) * 2; + + /* Attempt to implement the given cycle. */ + + return nfc_util_set_best_cycle(this, ns, + ns > asym_high_cycle_in_ns, ns > sym_high_cycle_in_ns); + +} + +/** + * nfc_3_2_mask_interrupt() - Masks interrupts. + * + * @this: Per-device data. + */ +static void nfc_3_2_mask_interrupt(struct imx_nfc_data *this) +{ + void *secondary_base = this->secondary_regs; + raw_set_mask_l(NFC_3_2_CONFIG2_INT_MSK_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); +} + +/** + * nfc_3_2_unmask_interrupt() - Unmasks interrupts. + * + * @this: Per-device data. + */ +static void nfc_3_2_unmask_interrupt(struct imx_nfc_data *this) +{ + void *secondary_base = this->secondary_regs; + raw_clr_mask_l(NFC_3_2_CONFIG2_INT_MSK_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); +} + +/** + * nfc_3_2_clear_interrupt() - Clears an interrupt. + * + * @this: Per-device data. + */ +static void nfc_3_2_clear_interrupt(struct imx_nfc_data *this) +{ + int done; + void *secondary_base = this->secondary_regs; + + /* Request IP bus interface access. */ + + raw_set_mask_l(NFC_3_2_IPC_CREQ_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + + /* Wait for access. */ + + do + done = !!raw_read_mask_l(NFC_3_2_IPC_CACK_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + while (!done); + + /* Clear the interrupt. */ + + raw_clr_mask_l(NFC_3_2_IPC_INT_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + + /* Release the IP bus interface. */ + + raw_clr_mask_l(NFC_3_2_IPC_CREQ_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + +} + +/** + * nfc_3_2_is_interrupting() - Returns the interrupt bit status. + * + * @this: Per-device data. + */ +static int nfc_3_2_is_interrupting(struct imx_nfc_data *this) +{ + void *secondary_base = this->secondary_regs; + return !!raw_read_mask_l(NFC_3_2_IPC_INT_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); +} + +/** + * nfc_3_2_is_ready() - Returns the ready/busy status. + * + * @this: Per-device data. + */ +static int nfc_3_2_is_ready(struct imx_nfc_data *this) +{ + void *secondary_base = this->secondary_regs; + return !!raw_read_mask_l(NFC_3_2_IPC_RB_B_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); +} + +/** + * nfc_3_2_set_force_ce() - Can force CE to be asserted always. + * + * @this: Per-device data. + * @on: Indicates if the hardware CE signal should be asserted always. + */ +static void nfc_3_2_set_force_ce(struct imx_nfc_data *this, int on) +{ + void *primary_base = this->primary_regs; + + if (on) + raw_set_mask_l(NFC_3_2_CONFIG1_NF_CE_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + else + raw_clr_mask_l(NFC_3_2_CONFIG1_NF_CE_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + +} + +/** + * nfc_3_2_set_ecc() - Turns ECC on or off. + * + * @this: Per-device data. + * @on: Indicates if ECC should be on or off. + */ +static void nfc_3_2_set_ecc(struct imx_nfc_data *this, int on) +{ + void *secondary_base = this->secondary_regs; + + if (on) + raw_set_mask_l(NFC_3_2_CONFIG2_ECC_EN_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + else + raw_clr_mask_l(NFC_3_2_CONFIG2_ECC_EN_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + +} + +/** + * nfc_3_2_get_ecc_status() - Reports ECC errors. + * + * @this: Per-device data. + */ +static int nfc_3_2_get_ecc_status(struct imx_nfc_data *this) +{ + unsigned int i; + void *base = this->primary_regs; + uint16_t status_reg; + unsigned int buffer_status[8]; + int status; + + /* Get the entire status register. */ + + status_reg = __raw_readw(base + NFC_3_2_ECC_STATUS_REG_OFF); + + /* Pick out the status for each buffer. */ + + buffer_status[0] = (status_reg & NFC_3_2_ECC_STATUS_NOBER1_MSK) + >> NFC_3_2_ECC_STATUS_NOBER1_POS; + + buffer_status[1] = (status_reg & NFC_3_2_ECC_STATUS_NOBER2_MSK) + >> NFC_3_2_ECC_STATUS_NOBER2_POS; + + buffer_status[2] = (status_reg & NFC_3_2_ECC_STATUS_NOBER3_MSK) + >> NFC_3_2_ECC_STATUS_NOBER3_POS; + + buffer_status[3] = (status_reg & NFC_3_2_ECC_STATUS_NOBER4_MSK) + >> NFC_3_2_ECC_STATUS_NOBER4_POS; + + buffer_status[4] = (status_reg & NFC_3_2_ECC_STATUS_NOBER5_MSK) + >> NFC_3_2_ECC_STATUS_NOBER5_POS; + + buffer_status[5] = (status_reg & NFC_3_2_ECC_STATUS_NOBER6_MSK) + >> NFC_3_2_ECC_STATUS_NOBER6_POS; + + buffer_status[6] = (status_reg & NFC_3_2_ECC_STATUS_NOBER7_MSK) + >> NFC_3_2_ECC_STATUS_NOBER7_POS; + + buffer_status[7] = (status_reg & NFC_3_2_ECC_STATUS_NOBER8_MSK) + >> NFC_3_2_ECC_STATUS_NOBER8_POS; + + /* Loop through the buffers we're actually using. */ + + status = 0; + + for (i = 0; i < this->nfc_geometry->buffer_count; i++) { + + if (buffer_status[i] > this->nfc_geometry->ecc_strength) { + status = -1; + break; + } + + status += buffer_status[i]; + + } + + /* Return the final result. */ + + return status; + +} + +/** + * nfc_3_2_get_symmetric() - Indicates if the clock is symmetric. + * + * @this: Per-device data. + */ +static int nfc_3_2_get_symmetric(struct imx_nfc_data *this) +{ + void *secondary_base = this->secondary_regs; + + return !!raw_read_mask_w(NFC_3_2_CONFIG2_SYM_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + +} + +/** + * nfc_3_2_set_symmetric() - Turns symmetric clock mode on or off. + * + * @this: Per-device data. + */ +static void nfc_3_2_set_symmetric(struct imx_nfc_data *this, int on) +{ + void *secondary_base = this->secondary_regs; + + if (on) + raw_set_mask_l(NFC_3_2_CONFIG2_SYM_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + else + raw_clr_mask_l(NFC_3_2_CONFIG2_SYM_MSK, + secondary_base + NFC_3_2_CONFIG2_REG_OFF); + +} + +/** + * nfc_3_2_select_chip() - Selects the current chip. + * + * @this: Per-device data. + * @chip: The chip number to select, or -1 to select no chip. + */ +static void nfc_3_2_select_chip(struct imx_nfc_data *this, int chip) +{ + unsigned long x; + void *primary_base = this->primary_regs; + + if (chip < 0) + return; + + x = __raw_readl(primary_base + NFC_3_2_CONFIG1_REG_OFF); + + x &= ~NFC_3_2_CONFIG1_CS_MSK; + + x |= (chip << NFC_3_2_CONFIG1_CS_POS) & NFC_3_2_CONFIG1_CS_MSK; + + __raw_writel(x, primary_base + NFC_3_2_CONFIG1_REG_OFF); + +} + +/** + * nfc_3_2_command_cycle() - Sends a command. + * + * @this: Per-device data. + * @command: The command code. + */ +static void nfc_3_2_command_cycle(struct imx_nfc_data *this, unsigned command) +{ + void *primary_base = this->primary_regs; + + /* Write the command we want to send. */ + + __raw_writel(command, primary_base + NFC_3_2_CMD_REG_OFF); + + /* Launch a command cycle. */ + + __raw_writel(NFC_3_2_LAUNCH_FCMD_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + +} + +/** + * nfc_3_2_write_cycle() - writes a single byte. + * + * @this: Per-device data. + * @byte: The byte. + */ +static void nfc_3_2_write_cycle(struct imx_nfc_data *this, unsigned int byte) +{ + void *primary_base = this->primary_regs; + + /* Give the NFC the byte we want to write. */ + + __raw_writel(byte, primary_base + NFC_3_2_ADD0_REG_OFF); + + /* Launch an address cycle. + * + * This is *sort* of a hack, but not really. The intent of the NFC + * design is for this operation to send an address byte. In fact, the + * NFC neither knows nor cares what we're sending. It justs runs a write + * cycle. + */ + + __raw_writel(NFC_3_2_LAUNCH_FADD_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, false); + +} + +/** + * nfc_3_2_read_cycle() - Applies a single read cycle to the current chip. + * + * @this: Per-device data. + */ +static unsigned int nfc_3_2_read_cycle(struct imx_nfc_data *this) +{ + unsigned int result; + void *primary_base = this->primary_regs; + + /* Launch a "Data Out" operation. */ + + __raw_writel(0x4 << NFC_3_2_LAUNCH_FDO_POS, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, false); + + /* Get the result. */ + + result = __raw_readl(primary_base + NFC_3_2_CONFIG1_REG_OFF) + >> NFC_3_2_CONFIG1_STATUS_POS; + result &= 0xff; + + /* Return the result. */ + + return result; + +} + +/** + * nfc_3_2_read_page() - Reads a page into the NFC memory. + * + * @this: Per-device data. + */ +static void nfc_3_2_read_page(struct imx_nfc_data *this) +{ + void *primary_base = this->primary_regs; + + /* Start reading into buffer 0. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_RBA_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Launch a page data out operation. */ + + __raw_writel(0x1 << NFC_3_2_LAUNCH_FDO_POS, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + +} + +/** + * nfc_3_2_send_page() - Sends a page from the NFC to the current chip. + * + * @this: Per-device data. + */ +static void nfc_3_2_send_page(struct imx_nfc_data *this) +{ + void *primary_base = this->primary_regs; + + /* Start sending from buffer 0. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_RBA_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Launch a page data in operation. */ + + __raw_writel(NFC_3_2_LAUNCH_FDI_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + +} + +/** + * nfc_3_2_add_state_events() - Adds events to display important state. + * + * @this: Per-device data. + */ +static void nfc_3_2_add_state_events(struct imx_nfc_data *this) +{ +#ifdef EVENT_REPORTING + void *secondary_base = this->secondary_regs; + + add_state_event_l + ( + secondary_base + NFC_3_2_IPC_REG_OFF, + NFC_3_2_IPC_INT_MSK, + " Interrupt : 0", + " Interrupt : X" + ); + + add_state_event_l + ( + secondary_base + NFC_3_2_IPC_REG_OFF, + NFC_3_2_IPC_AUTO_PROG_DONE_MSK, + " auto_prog_done: 0", + " auto_prog_done: X" + ); + + add_state_event_l + ( + secondary_base + NFC_3_2_IPC_REG_OFF, + NFC_3_2_IPC_RB_B_MSK, + " Medium : Busy", + " Medium : Ready" + ); +#endif +} + +/** + * nfc_3_2_get_auto_loop_params() - Gets automatic operation loop parameters. + * + * This function and the corresponding "setter" enable the automatic operations + * to keep some state as they iterate over chips. + * + * The most "obvious" way to save state would be to allocate a private data + * structure and hang it off the owning struct nfc_hal. On the other hand, + * writing the code to allocate the memory and then release it when the NFC + * shuts down is annoying - and we have some perfectly good memory in the NFC + * hardware that we can use. Since we only use two commands at a time, we can + * stash our loop limits and loop index in the top 16 bits of the NAND_CMD + * register. To paraphrase the reference manual: + * + * + * NAND_CMD + * + * |<-- 4 bits -->|<-- 4 bits -->|<-- 8 bits -->| + * +----------------+---------------+--------------------------------+ + * | First | Last | Loop Index | + * +----------------+---------------+--------------------------------+ + * | NAND COMMAND1 | NAND COMMAND0 | + * +--------------------------------+--------------------------------+ + * |<-- 16 bits -->|<-- 16 bits -->| + * + * + * @this: Per-device data. + * @first: A pointer to a variable that will receive the first chip number. + * @last: A pointer to a variable that will receive the last chip number. + * @index: A pointer to a variable that will receive the current chip number. + */ +static void nfc_3_2_get_auto_loop_params(struct imx_nfc_data *this, + unsigned *first, unsigned *last, unsigned *index) +{ + uint32_t x; + void *primary_base = this->primary_regs; + + x = __raw_readl(primary_base + NFC_3_2_CMD_REG_OFF); + + *first = (x >> 28) & 0x0f; + *last = (x >> 24) & 0x0f; + *index = (x >> 16) & 0xff; + +} + +/** + * nfc_3_2_set_auto_loop_params() - Sets automatic operation loop parameters. + * + * See nfc_3_2_get_auto_loop_params() for detailed information about these + * functions. + * + * @this: Per-device data. + * @first: The first chip number. + * @last: The last chip number. + * @index: The current chip number. + */ +static void nfc_3_2_set_auto_loop_params(struct imx_nfc_data *this, + unsigned first, unsigned last, unsigned index) +{ + uint32_t x; + void *primary_base = this->primary_regs; + + x = __raw_readl(primary_base + NFC_3_2_CMD_REG_OFF); + + x &= 0x0000ffff; + x |= (first & 0x0f) << 28; + x |= (last & 0x0f) << 24; + x |= (index & 0xff) << 16; + + __raw_writel(x, primary_base + NFC_3_2_CMD_REG_OFF); + +} + +/** + * nfc_3_2_get_auto_addresses() - Gets automatic operation addresses. + * + * @this: Per-device data. + * @group: The address group number. + * @chip: A pointer to a variable that will receive the chip number. + * @column: A pointer to a variable that will receive the column address. + * A NULL pointer indicates there is no column address. + * @page: A pointer to a variable that will receive the page address. + */ +static void nfc_3_2_get_auto_addresses(struct imx_nfc_data *this, + unsigned group, unsigned *chip, unsigned *column, unsigned *page) +{ + uint32_t x; + unsigned int chip_count; + unsigned int cs_width; + unsigned int cs_mask; + unsigned int page_lsbs; + unsigned int page_msbs; + uint32_t *low; + uint16_t *high; + void *primary_base = this->primary_regs; + void *secondary_base = this->secondary_regs; + + /* + * The width of the chip select field depends on the number of connected + * chips. + * + * Notice that these computations work only if the number of chips is a + * power of 2. In fact, that is a fundamental limitation for using + * automatic operations. + */ + + x = __raw_readl(secondary_base + NFC_3_2_CONFIG3_REG_OFF); + + chip_count = + (x & NFC_3_2_CONFIG3_NUM_OF_DEVICES_MSK) >> + NFC_3_2_CONFIG3_NUM_OF_DEVICES_POS; + chip_count++; + + cs_width = ffs(chip_count) - 1; + cs_mask = chip_count - 1; + + /* Construct pointers to the pieces of the given address group. */ + + low = primary_base + NFC_3_2_ADD0_REG_OFF; + low += group; + + high = primary_base + NFC_3_2_ADD8_REG_OFF; + high += group; + + /* Check if there's a column address. */ + + if (column) { + + /* + * The low 32 bits of the address group look like this: + * + * 16 - n n + * | <- bits ->|<->|<- 16 bits ->| + * +-------------+---+----------------+ + * | Page LSBs |CS | Column | + * +-------------+---+----------------+ + */ + + x = __raw_readl(low); + + *column = x & 0xffff; + *chip = (x >> 16) & cs_mask; + page_lsbs = x >> (16 + cs_width); + + /* The high 16 bits contain the MSB's of the page address. */ + + page_msbs = __raw_readw(high); + + *page = (page_msbs << (16 - cs_width)) | page_lsbs; + + } else { + + /* + * The low 32 bits of the address group look like this: + * + * n + * | <- (32 - n) bits ->|<->| + * +-----------------------------+---+ + * | Page LSBs |CS | + * +-----------------------------+---+ + */ + + x = __raw_readl(low); + + *chip = x & cs_mask; + page_lsbs = x >> cs_width; + + /* The high 16 bits contain the MSB's of the page address. */ + + page_msbs = __raw_readw(high); + + *page = (page_msbs << (32 - cs_width)) | page_lsbs; + + } + +} + +/** + * nfc_3_2_set_auto_addresses() - Sets automatic operation addresses. + * + * @this: Per-device data. + * @group: The address group number. + * @chip: The chip number. + * @column: The column address. The sentinel value ~0 indicates that there is + * no column address. + * @page: The page address. + */ +static void nfc_3_2_set_auto_addresses(struct imx_nfc_data *this, + unsigned group, unsigned chip, unsigned column, unsigned page) +{ + uint32_t x; + unsigned chip_count; + unsigned int cs_width; + unsigned int cs_mask; + uint32_t *low; + uint16_t *high; + void *primary_base = this->primary_regs; + void *secondary_base = this->secondary_regs; + + /* + * The width of the chip select field depends on the number of connected + * chips. + * + * Notice that these computations work only if the number of chips is a + * power of 2. In fact, that is a fundamental limitation for using + * automatic operations. + */ + + x = __raw_readl(secondary_base + NFC_3_2_CONFIG3_REG_OFF); + + chip_count = + (x & NFC_3_2_CONFIG3_NUM_OF_DEVICES_MSK) >> + NFC_3_2_CONFIG3_NUM_OF_DEVICES_POS; + chip_count++; + + cs_width = ffs(chip_count) - 1; + cs_mask = chip_count - 1; + + /* Construct pointers to the pieces of the given address group. */ + + low = primary_base + NFC_3_2_ADD0_REG_OFF; + low += group; + + high = primary_base + NFC_3_2_ADD8_REG_OFF; + high += group; + + /* Check if we have a column address. */ + + if (column != ~0) { + + /* + * The low 32 bits of the address group look like this: + * + * 16 - n n + * | <- bits ->|<->|<- 16 bits ->| + * +-------------+---+----------------+ + * | Page LSBs |CS | Column | + * +-------------+---+----------------+ + */ + + x = 0; + x |= column & 0xffff; + x |= (chip & cs_mask) << 16; + x |= page << (16 + cs_width); + + __raw_writel(x, low); + + /* The high 16 bits contain the MSB's of the page address. */ + + x = (page >> (16 - cs_width)) & 0xffff; + + __raw_writew(x, high); + + } else { + + /* + * The low 32 bits of the address group look like this: + * + * n + * | <- (32 - n) bits ->|<->| + * +-----------------------------+---+ + * | Page LSBs |CS | + * +-----------------------------+---+ + */ + + x = 0; + x |= chip & cs_mask; + x |= page << cs_width; + + __raw_writel(x, low); + + /* The high 16 bits contain the MSB's of the page address. */ + + x = (page >> (32 - cs_width)) & 0xffff; + + __raw_writew(x, high); + + } + +} + +/** + * nfc_3_2_start_auto_read() - Starts an automatic read. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + * @start: The first physical chip number on which to operate. + * @count: The number of physical chips on which to operate. + * @column: The column address. + * @page: The page address. + */ +static int nfc_3_2_start_auto_read(struct imx_nfc_data *this, + unsigned start, unsigned count, unsigned column, unsigned page) +{ + uint32_t x; + int return_value = 0; + void *primary_base = this->primary_regs; + + add_event("Entering nfc_3_2_start_auto_read", 1); + + /* Check for nonsense. */ + + if ((start > 7) || (!count) || (count > 8)) { + return_value = !0; + goto exit; + } + + /* Set state. */ + + nfc_3_2_set_auto_loop_params(this, start, start + count - 1, start); + nfc_3_2_set_auto_addresses(this, 0, start, column, page); + + /* Set up for ONE iteration at a time. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_ITER_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Reset to buffer 0. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_RBA_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* + * Set up the commands. Note that the number of command phases was + * configured in the set_geometry() function so, even though we're + * giving both commands here, they won't necessarily both be used. + */ + + x = __raw_readl(primary_base + NFC_3_2_CMD_REG_OFF); + + x &= 0xffff0000; + x |= NAND_CMD_READ0 << 0; + x |= NAND_CMD_READSTART << 8; + + __raw_writel(x, primary_base + NFC_3_2_CMD_REG_OFF); + + /* Launch the operation. */ + + add_event("Launching", 0); + + __raw_writel(NFC_3_2_LAUNCH_AUTO_READ_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_start_auto_read", -1); + + return return_value; + +} + +/** + * nfc_3_2_wait_for_auto_read() - Waits until auto read is ready for the CPU. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + */ +static int nfc_3_2_wait_for_auto_read(struct imx_nfc_data *this) +{ + unsigned int first; + unsigned int last; + unsigned int index; + int return_value = 0; + + add_event("Entering nfc_3_2_wait_for_auto_read", 1); + + /* Get state. */ + + nfc_3_2_get_auto_loop_params(this, &first, &last, &index); + + /* This function should be called for every chip. */ + + if ((index < first) || (index > last)) { + return_value = !0; + goto exit; + } + + /* Wait for the NFC to completely finish and interrupt. */ + + nfc_util_wait_for_the_nfc(this, true); + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_wait_for_auto_read", -1); + + return return_value; + +} + +/** + * nfc_3_2_resume_auto_read() - Resumes auto read after CPU intervention. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + */ +static int nfc_3_2_resume_auto_read(struct imx_nfc_data *this) +{ + unsigned int first; + unsigned int last; + unsigned int index; + unsigned int chip; + unsigned int column; + unsigned int page; + int return_value = 0; + void *primary_base = this->primary_regs; + + add_event("Entering nfc_3_2_resume_auto_read", 1); + + /* Get state. */ + + nfc_3_2_get_auto_loop_params(this, &first, &last, &index); + nfc_3_2_get_auto_addresses(this, 0, &chip, &column, &page); + + /* This function should be called for every chip, except the last. */ + + if ((index < first) || (index >= last)) { + return_value = !0; + goto exit; + } + + /* Move to the next chip. */ + + index++; + + /* Update state. */ + + nfc_3_2_set_auto_loop_params(this, first, last, index); + nfc_3_2_set_auto_addresses(this, 0, index, column, page); + + /* Reset to buffer 0. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_RBA_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Launch the operation. */ + + add_event("Launching", 0); + + __raw_writel(NFC_3_2_LAUNCH_AUTO_READ_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_resume_auto_read", -1); + + return return_value; + +} + +/** + * nfc_3_2_start_auto_write() - Starts an automatic write. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + * @start: The first physical chip number on which to operate. + * @count: The number of physical chips on which to operate. + * @column: The column address. + * @page: The page address. + */ +static int nfc_3_2_start_auto_write(struct imx_nfc_data *this, + unsigned start, unsigned count, unsigned column, unsigned page) +{ + uint32_t x; + int return_value = 0; + void *primary_base = this->primary_regs; + void *secondary_base = this->secondary_regs; + + add_event("Entering nfc_3_2_start_auto_write", 1); + + /* Check for nonsense. */ + + if ((start > 7) || (!count) || (count > 8)) { + return_value = !0; + goto exit; + } + + /* Set state. */ + + nfc_3_2_set_auto_loop_params(this, start, start + count - 1, start); + nfc_3_2_set_auto_addresses(this, 0, start, column, page); + + /* Set up for ONE iteration at a time. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_ITER_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Set up the commands. */ + + x = __raw_readl(primary_base + NFC_3_2_CMD_REG_OFF); + + x &= 0xffff0000; + x |= NAND_CMD_SEQIN << 0; + x |= NAND_CMD_PAGEPROG << 8; + + __raw_writel(x, primary_base + NFC_3_2_CMD_REG_OFF); + + /* Clear the auto_prog_done bit. */ + + raw_clr_mask_l(NFC_3_2_IPC_AUTO_PROG_DONE_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_start_auto_write", -1); + + return return_value; + +} + +/** + * nfc_3_2_wait_for_auto_write() - Waits for auto write to be writey for the CPU. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + */ +static int nfc_3_2_wait_for_auto_write(struct imx_nfc_data *this) +{ + unsigned int first; + unsigned int last; + unsigned int index; + unsigned int chip; + unsigned int column; + unsigned int page; + uint32_t x; + int interrupt; + int transmitted; + int ready; + int return_value = 0; + void *primary_base = this->primary_regs; + void *secondary_base = this->secondary_regs; + + add_event("Entering nfc_3_2_wait_for_auto_write", 1); + + /* Get state. */ + + nfc_3_2_get_auto_loop_params(this, &first, &last, &index); + nfc_3_2_get_auto_addresses(this, 0, &chip, &column, &page); + + /* This function should be called for every chip. */ + + if ((index < first) || (index > last)) { + return_value = !0; + goto exit; + } + + /* Reset to buffer 0. */ + + raw_clr_mask_l(NFC_3_2_CONFIG1_RBA_MSK, + primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Launch the operation. */ + + nfc_3_2_add_state_events(this); + + add_event("Launching", 0); + + __raw_writel(NFC_3_2_LAUNCH_AUTO_PROG_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + + nfc_3_2_add_state_events(this); + + /* Wait for the NFC to transmit the page. */ + + add_event("Spinning while the NFC transmits the page...", 0); + + do + transmitted = !!raw_read_mask_l(NFC_3_2_IPC_AUTO_PROG_DONE_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + while (!transmitted); + + /* + * When control arrives here, the auto_prog_done bit is set. This + * indicates the NFC has finished transmitting the current page. The CPU + * is now free to write the next page into the NFC's memory. The Flash + * hardware is still busy programming the page into its storage array. + * + * Clear the auto_prog_done bit. This is analogous to acknowledging an + * interrupt. + */ + + nfc_3_2_add_state_events(this); + + add_event("Acknowledging the page...", 0); + + raw_clr_mask_l(NFC_3_2_IPC_AUTO_PROG_DONE_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + + nfc_3_2_add_state_events(this); + + /* + * If this is *not* the last iteration, move to the next chip and return + * to the caller so he can put the next page in the NFC buffer. + */ + + if (index < last) { + + add_event("Moving to the next chip...", 0); + + index++; + + nfc_3_2_set_auto_loop_params(this, first, last, index); + nfc_3_2_set_auto_addresses(this, 0, index, column, page); + + goto exit; + + } + + /* + * If control arrives here, this is the last iteration, so it's time to + * close out the entire operation. We need to wait for the medium to be + * ready and then acknowledge the final interrupt. + * + * Because of the way the NFC hardware works, the code here requires a + * bit of explanation. The most important rule is: + * + * During automatic operations, the NFC sets its + * interrupt bit *whenever* it sees the ready/busy + * signal transition from "Busy" to "Ready". + * + * Recall that the ready/busy signals from all the chips in the medium + * are "wire-anded." Thus, the NFC will only see that the medium is + * ready if *all* chips are ready. + * + * Because of variability in NAND Flash timing, the medium *may* have + * become ready during previous iterations, which means the interrupt + * bit *may* be set at this moment. This is a "left-over" interrupt, and + * can complicate our logic. + * + * The two bits of state that interest us here are the interrupt bit + * and the ready/busy bit. It boils down to the following truth table: + * + * | Interrupt | Ready/Busy | Description + * +------------+------------+--------------- + * | | | Busy medium and no left-over interrupt. + * | 0 | 0 | The final interrupt will arrive in the + * | | | future. + * +------------+------------+--------------- + * | | | Ready medium and no left-over interrupt. + * | 0 | 1 | There will be no final interrupt. This + * | | | case should be impossible. + * +------------+------------+--------------- + * | | | Busy medium and left-over interrupt. + * | 1 | 0 | The final interrupt will arrive in the + * | | | future. This is the hard case. + * +------------+------------+--------------- + * | | | Ready medium and left-over interrupt. + * | 1 | 1 | The final interrupt has already + * | | | arrived. Acknowledge it and exit. + * +------------+------------+--------------- + * + * Case #3 is a small problem. If we clear the interrupt, we may or may + * not have another interrupt following. + */ + + /* Sample the IPC register. */ + + x = __raw_readl(secondary_base + NFC_3_2_IPC_REG_OFF); + + interrupt = !!(x & NFC_3_2_IPC_INT_MSK); + ready = !!(x & NFC_3_2_IPC_RB_B_MSK); + + /* Check for the easy cases. */ + + if (!interrupt && !ready) { + add_event("Waiting for the final interrupt..." , 0); + nfc_util_wait_for_the_nfc(this, true); + goto exit; + } else if (!interrupt && ready) { + add_event("Done." , 0); + goto exit; + } else if (interrupt && ready) { + add_event("Acknowledging the final interrupt..." , 0); + nfc_util_wait_for_the_nfc(this, false); + goto exit; + + } + + /* + * If control arrives here, we hit case #3. Begin by acknowledging the + * interrupt we have right now. + */ + + add_event("Clearing the left-over interrupt..." , 0); + nfc_util_wait_for_the_nfc(this, false); + + /* + * Check the ready/busy bit again. If the medium is still busy, then + * we're going to get one more interrupt. + */ + + ready = !!raw_read_mask_l(NFC_3_2_IPC_RB_B_MSK, + secondary_base + NFC_3_2_IPC_REG_OFF); + + if (!ready) { + add_event("Waiting for the final interrupt..." , 0); + nfc_util_wait_for_the_nfc(this, true); + } + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_wait_for_auto_write", -1); + + return return_value; + +} + +/** + * nfc_3_2_start_auto_erase() - Starts an automatic erase. + * + * This function returns 0 if everything went well. + * + * @this: Per-device data. + * @start: The first physical chip number on which to operate. + * @count: The number of physical chips on which to operate. + * @page: The page address. + */ +static int nfc_3_2_start_auto_erase(struct imx_nfc_data *this, + unsigned start, unsigned count, unsigned page) +{ + uint32_t x; + unsigned i; + int return_value = 0; + void *primary_base = this->primary_regs; + + add_event("Entering nfc_3_2_start_auto_erase", 1); + + /* Check for nonsense. */ + + if ((start > 7) || (!count) || (count > 8)) { + return_value = !0; + goto exit; + } + + /* Set up the commands. */ + + x = __raw_readl(primary_base + NFC_3_2_CMD_REG_OFF); + + x &= 0xffff0000; + x |= NAND_CMD_ERASE1 << 0; + x |= NAND_CMD_ERASE2 << 8; + + __raw_writel(x, primary_base + NFC_3_2_CMD_REG_OFF); + + /* Set the iterations. */ + + x = __raw_readl(primary_base + NFC_3_2_CONFIG1_REG_OFF); + + x &= ~NFC_3_2_CONFIG1_ITER_MSK; + x |= ((count - 1) << NFC_3_2_CONFIG1_ITER_POS) & + NFC_3_2_CONFIG1_ITER_MSK; + + __raw_writel(x, primary_base + NFC_3_2_CONFIG1_REG_OFF); + + /* Loop over chips, setting up the address groups. */ + + for (i = 0; i < count; i++) + nfc_3_2_set_auto_addresses(this, i, start + i, ~0, page); + + /* Launch the operation. */ + + add_event("Launching", 0); + + __raw_writel(NFC_3_2_LAUNCH_AUTO_ERASE_MSK, + primary_base + NFC_3_2_LAUNCH_REG_OFF); + +exit: /* Return. */ + + add_event("Exiting nfc_3_2_start_auto_erase", -1); + + return return_value; + +} + +/* + * At this point, we've defined all the version-specific primitives. We're now + * ready to construct the NFC HAL structures for every version. + */ + +struct nfc_hal nfc_1_0_hal = { + .major_version = 1, + .minor_version = 0, + .max_chip_count = 1, + .max_buffer_count = 4, + .spare_buf_stride = 16, + .has_secondary_regs = 0, + .can_be_symmetric = 0, + }; + +struct nfc_hal nfc_2_0_hal = { + .major_version = 2, + .minor_version = 0, + .max_chip_count = 1, + .max_buffer_count = 4, + .spare_buf_stride = 16, + .has_secondary_regs = false, + .can_be_symmetric = true, + .init = nfc_2_0_init, + .set_geometry = nfc_2_0_set_geometry, + .exit = nfc_2_x_exit, + .mask_interrupt = nfc_2_0_mask_interrupt, + .unmask_interrupt = nfc_2_0_unmask_interrupt, + .clear_interrupt = nfc_2_x_clear_interrupt, + .is_interrupting = nfc_2_x_is_interrupting, + .is_ready = 0, /* Ready/Busy not exposed. */ + .set_ecc = nfc_2_0_set_ecc, + .get_ecc_status = nfc_2_0_get_ecc_status, + .get_symmetric = nfc_2_0_get_symmetric, + .set_symmetric = nfc_2_0_set_symmetric, + .select_chip = nfc_2_0_select_chip, + .command_cycle = nfc_2_x_command_cycle, + .write_cycle = nfc_2_x_write_cycle, + .read_cycle = nfc_2_0_read_cycle, + .read_page = nfc_2_0_read_page, + .send_page = nfc_2_0_send_page, + .start_auto_read = 0, /* Not supported. */ + .wait_for_auto_read = 0, /* Not supported. */ + .resume_auto_read = 0, /* Not supported. */ + .start_auto_write = 0, /* Not supported. */ + .wait_for_auto_write = 0, /* Not supported. */ + .start_auto_erase = 0, /* Not supported. */ + }; + +struct nfc_hal nfc_2_1_hal = { + .major_version = 2, + .minor_version = 1, + .max_chip_count = 4, + .max_buffer_count = 8, + .spare_buf_stride = 64, + .has_secondary_regs = 0, + .can_be_symmetric = !0, + }; + +struct nfc_hal nfc_3_1_hal = { + .major_version = 3, + .minor_version = 1, + .max_chip_count = 4, + .max_buffer_count = 8, + .spare_buf_stride = 64, + .has_secondary_regs = !0, + .can_be_symmetric = !0, + }; + +struct nfc_hal nfc_3_2_hal = { + .major_version = 3, + .minor_version = 2, + .max_chip_count = 8, + .max_buffer_count = 8, + .spare_buf_stride = 64, + .has_secondary_regs = true, + .can_be_symmetric = true, + .init = nfc_3_2_init, + .set_geometry = nfc_3_2_set_geometry, + .exit = nfc_3_2_exit, + .set_closest_cycle = nfc_3_2_set_closest_cycle, + .mask_interrupt = nfc_3_2_mask_interrupt, + .unmask_interrupt = nfc_3_2_unmask_interrupt, + .clear_interrupt = nfc_3_2_clear_interrupt, + .is_interrupting = nfc_3_2_is_interrupting, + .is_ready = nfc_3_2_is_ready, + .set_force_ce = nfc_3_2_set_force_ce, + .set_ecc = nfc_3_2_set_ecc, + .get_ecc_status = nfc_3_2_get_ecc_status, + .get_symmetric = nfc_3_2_get_symmetric, + .set_symmetric = nfc_3_2_set_symmetric, + .select_chip = nfc_3_2_select_chip, + .command_cycle = nfc_3_2_command_cycle, + .write_cycle = nfc_3_2_write_cycle, + .read_cycle = nfc_3_2_read_cycle, + .read_page = nfc_3_2_read_page, + .send_page = nfc_3_2_send_page, + .start_auto_read = nfc_3_2_start_auto_read, + .wait_for_auto_read = nfc_3_2_wait_for_auto_read, + .resume_auto_read = nfc_3_2_resume_auto_read, + .start_auto_write = nfc_3_2_start_auto_write, + .wait_for_auto_write = nfc_3_2_wait_for_auto_write, + .start_auto_erase = nfc_3_2_start_auto_erase, + }; + +/* + * This array has a pointer to every NFC HAL structure. The probing process will + * find the one that matches the version given by the platform. + */ + +struct nfc_hal *(nfc_hals[]) = { + &nfc_1_0_hal, + &nfc_2_0_hal, + &nfc_2_1_hal, + &nfc_3_1_hal, + &nfc_3_2_hal, +}; + +/** + * mal_init() - Initialize the Medium Abstraction Layer. + * + * @this: Per-device data. + */ +static void mal_init(struct imx_nfc_data *this) +{ + this->interrupt_override = DRIVER_CHOICE; + this->auto_op_override = DRIVER_CHOICE; + this->inject_ecc_error = 0; +} + +/** + * mal_set_physical_geometry() - Set up the physical medium geometry. + * + * This function retrieves the physical geometry information discovered by + * nand_scan(), corrects it, and records it in the per-device data structure. + * + * @this: Per-device data. + */ +static int mal_set_physical_geometry(struct imx_nfc_data *this) +{ + struct mtd_info *mtd = &this->mtd; + struct nand_chip *nand = &this->nand; + struct device *dev = this->dev; + uint8_t manufacturer_id; + uint8_t device_id; + unsigned int block_size_in_pages; + unsigned int chip_size_in_blocks; + unsigned int chip_size_in_pages; + uint64_t medium_size_in_bytes; + struct physical_geometry *physical = &this->physical_geometry; + + /* + * Begin by transcribing exactly what the MTD code discovered. If there + * are any mistakes, we'll fix them in a moment. + */ + + physical->chip_count = nand->numchips; + physical->chip_size = nand->chipsize; + physical->block_size = mtd->erasesize; + physical->page_data_size = mtd->writesize; + physical->page_oob_size = mtd->oobsize; + + /* Read some of the ID bytes from the first NAND Flash chip. */ + + nand->select_chip(mtd, 0); + + nfc_util_send_cmd_and_addrs(this, NAND_CMD_READID, 0x00, -1); + + manufacturer_id = nand->read_byte(mtd); + device_id = nand->read_byte(mtd); + + /* + * Most manufacturers sell 4K page devices with 218 out-of-band bytes + * per page to accomodate ECC-8. + * + * Samsung and Hynix claim their parts have better reliability, so they + * only need ECC-4 and they have only 128 out-of-band bytes. + * + * The MTD code pays no attention to the manufacturer ID (something that + * eventually will have to change), so it believes that all 4K pages + * have 218 out-of-band bytes. + * + * We correct that mistake here. + */ + + if (physical->page_data_size == 4096) { + if ((manufacturer_id == NAND_MFR_SAMSUNG) || + (manufacturer_id == NAND_MFR_HYNIX)) { + physical->page_oob_size = 128; + } + } + + /* Compute some interesting facts. */ + + block_size_in_pages = + physical->block_size / physical->page_data_size; + chip_size_in_pages = + physical->chip_size >> (fls(physical->page_data_size) - 1); + chip_size_in_blocks = + physical->chip_size >> (fls(physical->block_size) - 1); + medium_size_in_bytes = + physical->chip_size * physical->chip_count; + + /* Report. */ + + dev_dbg(dev, "-----------------\n"); + dev_dbg(dev, "Physical Geometry\n"); + dev_dbg(dev, "-----------------\n"); + dev_dbg(dev, "Chip Count : %d\n", physical->chip_count); + dev_dbg(dev, "Page Data Size in Bytes: %u (0x%x)\n", + physical->page_data_size, physical->page_data_size); + dev_dbg(dev, "Page OOB Size in Bytes : %u\n", + physical->page_oob_size); + dev_dbg(dev, "Block Size in Bytes : %u (0x%x)\n", + physical->block_size, physical->block_size); + dev_dbg(dev, "Block Size in Pages : %u (0x%x)\n", + block_size_in_pages, block_size_in_pages); + dev_dbg(dev, "Chip Size in Bytes : %llu (0x%llx)\n", + physical->chip_size, physical->chip_size); + dev_dbg(dev, "Chip Size in Pages : %u (0x%x)\n", + chip_size_in_pages, chip_size_in_pages); + dev_dbg(dev, "Chip Size in Blocks : %u (0x%x)\n", + chip_size_in_blocks, chip_size_in_blocks); + dev_dbg(dev, "Medium Size in Bytes : %llu (0x%llx)\n", + medium_size_in_bytes, medium_size_in_bytes); + + /* Return success. */ + + return 0; + +} + +/** + * mal_set_nfc_geometry() - Set up the NFC geometry. + * + * This function calls the NFC HAL to select an NFC geometry that is compatible + * with the medium's physical geometry. + * + * @this: Per-device data. + */ +static int mal_set_nfc_geometry(struct imx_nfc_data *this) +{ + struct device *dev = this->dev; + struct nfc_geometry *nfc; + + /* Set the NFC geometry. */ + + if (this->nfc->set_geometry(this)) + return !0; + + /* Get a pointer to the new NFC geometry information. */ + + nfc = this->nfc_geometry; + + /* Report. */ + + dev_dbg(dev, "------------\n"); + dev_dbg(dev, "NFC Geometry\n"); + dev_dbg(dev, "------------\n"); + dev_dbg(dev, "Page Data Size in Bytes: %u (0x%x)\n", + nfc->page_data_size, nfc->page_data_size); + dev_dbg(dev, "Page OOB Size in Bytes : %u\n", nfc->page_oob_size); + dev_dbg(dev, "ECC Algorithm : %s\n", nfc->ecc_algorithm); + dev_dbg(dev, "ECC Strength : %d\n", nfc->ecc_strength); + dev_dbg(dev, "Buffer Count : %u\n", nfc->buffer_count); + dev_dbg(dev, "Spare Buffer Size : %u\n", nfc->spare_buf_size); + dev_dbg(dev, "Spare Buffer Spillover : %u\n", nfc->spare_buf_spill); + dev_dbg(dev, "Auto Read Available : %s\n", + this->nfc->start_auto_read ? "Yes" : "No"); + dev_dbg(dev, "Auto Write Available : %s\n", + this->nfc->start_auto_write ? "Yes" : "No"); + dev_dbg(dev, "Auto Erase Available : %s\n", + this->nfc->start_auto_erase ? "Yes" : "No"); + + /* Return success. */ + + return 0; + +} + +/** + * mal_set_logical_geometry() - Set up the logical medium geometry. + * + * This function constructs the logical geometry that we will expose to MTD, + * based on the physical and NFC geometries, and whether or not interleaving is + * on. + * + * @this: Per-device data. + */ +static int mal_set_logical_geometry(struct imx_nfc_data *this) +{ + const uint32_t max_medium_size_in_bytes = ~0; + int we_are_interleaving; + uint64_t physical_medium_size_in_bytes; + unsigned int usable_blocks; + unsigned int block_size_in_pages; + unsigned int chip_size_in_blocks; + unsigned int chip_size_in_pages; + unsigned int usable_medium_size_in_pages; + unsigned int usable_medium_size_in_blocks; + struct physical_geometry *physical = &this->physical_geometry; + struct nfc_geometry *nfc = this->nfc_geometry; + struct logical_geometry *logical = &this->logical_geometry; + struct device *dev = this->dev; + + /* Figure out if we're interleaving. */ + + we_are_interleaving = this->pdata->interleave; + + switch (imx_nfc_module_interleave_override) { + + case NEVER: + we_are_interleaving = false; + break; + + case DRIVER_CHOICE: + break; + + case ALWAYS: + we_are_interleaving = true; + break; + + } + + /* Compute the physical size of the medium. */ + + physical_medium_size_in_bytes = + physical->chip_count * physical->chip_size; + + /* Compute the logical geometry. */ + + if (!we_are_interleaving) { + + /* + * At this writing, MTD uses unsigned 32-bit variables to + * represent the size of the medium. If the physical medium is + * larger than that, the logical medium must be smaller. Here, + * we compute the total number of physical blocks in the medium + * that we can actually use. + */ + + if (physical_medium_size_in_bytes <= max_medium_size_in_bytes) { + usable_blocks = + physical_medium_size_in_bytes >> + (ffs(physical->block_size) - 1); + } else { + usable_blocks = + max_medium_size_in_bytes / physical->block_size; + } + + /* Set up the logical geometry. + * + * Notice that the usable medium size is not necessarily the + * same as the chip size multiplied by the number of physical + * chips. We can't afford to touch the physical chip size + * because the NAND Flash MTD code *requires* it to be a power + * of 2. + */ + + logical->chip_count = physical->chip_count; + logical->chip_size = physical->chip_size; + logical->usable_size = usable_blocks * physical->block_size; + logical->block_size = physical->block_size; + logical->page_data_size = nfc->page_data_size; + + /* Use the MTD layout that best matches the NFC geometry. */ + + logical->mtd_layout = &nfc->mtd_layout; + logical->page_oob_size = nfc->mtd_layout.eccbytes + + nfc->mtd_layout.oobavail; + + } else { + + /* + * If control arrives here, we are interleaving. Specifically, + * we are "horizontally concatenating" the pages in all the + * physical chips. + * + * - A logical page will be the size of a physical page + * multiplied by the number of physical chips. + * + * - A logical block will have the same number of pages as a + * physical block but, since the logical page size is larger, + * the logical block size is larger. + * + * - The entire medium will appear to be a single chip. + * + * At this writing, MTD uses unsigned 32-bit variables to + * represent the size of the medium. If the physical medium is + * larger than that, the logical medium must be smaller. + * + * The NAND Flash MTD code represents the size of a single chip + * as an unsigned 32-bit value. It also *requires* that the size + * of a chip be a power of two. Thus, the largest possible chip + * size is 2GiB. + * + * When interleaving, the entire medium appears to be one chip. + * Thus, when interleaving, the largest possible medium size is + * 2GiB. + */ + + if (physical_medium_size_in_bytes <= max_medium_size_in_bytes) { + logical->chip_size = + 0x1 << (fls(physical_medium_size_in_bytes) - 1); + } else { + logical->chip_size = + 0x1 << (fls(max_medium_size_in_bytes) - 1); + } + + /* + * If control arrives here, we're interleaving. The logical + * geometry is very different from the physical geometry. + */ + + logical->chip_count = 1; + logical->usable_size = logical->chip_size; + logical->block_size = + physical->block_size * physical->chip_count; + logical->page_data_size = + nfc->page_data_size * physical->chip_count; + + /* + * Since the logical geometry doesn't match the physical + * geometry, we can't use the MTD layout that matches the + * NFC geometry. We synthesize one here. + * + * Our "logical" OOB will be the concatenation of the first 5 + * bytes of the "physical" OOB of every chip. This has some + * important properties: + * + * - This will make the block mark of every physical chip + * visible (even for small page chips, which put their block + * mark in the 5th OOB byte). + * + * - None of the NFC controllers put ECC in the first 5 OOB + * bytes, so this layout exposes no ECC. + */ + + logical->page_oob_size = 5 * physical->chip_count; + + synthetic_layout.eccbytes = 0; + synthetic_layout.oobavail = 5 * physical->chip_count; + synthetic_layout.oobfree[0].offset = 0; + synthetic_layout.oobfree[0].length = synthetic_layout.oobavail; + + /* Install the synthetic layout. */ + + logical->mtd_layout = &synthetic_layout; + + } + + /* Compute some interesting facts. */ + + block_size_in_pages = logical->block_size / logical->page_data_size; + chip_size_in_pages = logical->chip_size / logical->page_data_size; + chip_size_in_blocks = logical->chip_size / logical->block_size; + usable_medium_size_in_pages = + logical->usable_size / logical->page_data_size; + usable_medium_size_in_blocks = + logical->usable_size / logical->block_size; + + /* Report. */ + + dev_dbg(dev, "----------------\n"); + dev_dbg(dev, "Logical Geometry\n"); + dev_dbg(dev, "----------------\n"); + dev_dbg(dev, "Chip Count : %d\n", logical->chip_count); + dev_dbg(dev, "Page Data Size in Bytes: %u (0x%x)\n", + logical->page_data_size, logical->page_data_size); + dev_dbg(dev, "Page OOB Size in Bytes : %u\n", + logical->page_oob_size); + dev_dbg(dev, "Block Size in Bytes : %u (0x%x)\n", + logical->block_size, logical->block_size); + dev_dbg(dev, "Block Size in Pages : %u (0x%x)\n", + block_size_in_pages, block_size_in_pages); + dev_dbg(dev, "Chip Size in Bytes : %u (0x%x)\n", + logical->chip_size, logical->chip_size); + dev_dbg(dev, "Chip Size in Pages : %u (0x%x)\n", + chip_size_in_pages, chip_size_in_pages); + dev_dbg(dev, "Chip Size in Blocks : %u (0x%x)\n", + chip_size_in_blocks, chip_size_in_blocks); + dev_dbg(dev, "Physical Size in Bytes : %llu (0x%llx)\n", + physical_medium_size_in_bytes, physical_medium_size_in_bytes); + dev_dbg(dev, "Usable Size in Bytes : %u (0x%x)\n", + logical->usable_size, logical->usable_size); + dev_dbg(dev, "Usable Size in Pages : %u (0x%x)\n", + usable_medium_size_in_pages, usable_medium_size_in_pages); + dev_dbg(dev, "Usable Size in Blocks : %u (0x%x)\n", + usable_medium_size_in_blocks, usable_medium_size_in_blocks); + + /* Return success. */ + + return 0; + +} + +/** + * mal_set_mtd_geometry() - Set up the MTD geometry. + * + * This function adjusts the owning MTD data structures to match the logical + * geometry we've chosen. + * + * @this: Per-device data. + */ +static int mal_set_mtd_geometry(struct imx_nfc_data *this) +{ + struct logical_geometry *logical = &this->logical_geometry; + struct mtd_info *mtd = &this->mtd; + struct nand_chip *nand = &this->nand; + + /* Configure the struct mtd_info. */ + + mtd->size = logical->usable_size; + mtd->erasesize = logical->block_size; + mtd->writesize = logical->page_data_size; + mtd->ecclayout = logical->mtd_layout; + mtd->oobavail = mtd->ecclayout->oobavail; + mtd->oobsize = mtd->ecclayout->oobavail + mtd->ecclayout->eccbytes; + mtd->subpage_sft = 0; /* We don't support sub-page writing. */ + + /* Configure the struct nand_chip. */ + + nand->numchips = logical->chip_count; + nand->chipsize = logical->chip_size; + nand->page_shift = ffs(logical->page_data_size) - 1; + nand->pagemask = (nand->chipsize >> nand->page_shift) - 1; + nand->subpagesize = mtd->writesize >> mtd->subpage_sft; + nand->phys_erase_shift = ffs(logical->block_size) - 1; + nand->bbt_erase_shift = nand->phys_erase_shift; + nand->chip_shift = ffs(logical->chip_size) - 1; + nand->oob_poi = nand->buffers->databuf+logical->page_data_size; + nand->ecc.layout = logical->mtd_layout; + + /* Set up the pattern that describes block marks. */ + + if (is_small_page_chip(this)) + nand->badblock_pattern = &small_page_block_mark_descriptor; + else + nand->badblock_pattern = &large_page_block_mark_descriptor; + + /* Return success. */ + + return 0; +} + +/** + * mal_set_geometry() - Set up the medium geometry. + * + * @this: Per-device data. + */ +static int mal_set_geometry(struct imx_nfc_data *this) +{ + + /* Set up the various layers of geometry, in this specific order. */ + + if (mal_set_physical_geometry(this)) + return !0; + + if (mal_set_nfc_geometry(this)) + return !0; + + if (mal_set_logical_geometry(this)) + return !0; + + if (mal_set_mtd_geometry(this)) + return !0; + + /* Return success. */ + + return 0; + +} + +/** + * mal_reset() - Resets the given chip. + * + * This is the fully-generalized reset operation, including support for + * interleaving. All reset operations funnel through here. + * + * @this: Per-device data. + * @chip: The logical chip of interest. + */ +static void mal_reset(struct imx_nfc_data *this, unsigned chip) +{ + int we_are_interleaving; + unsigned int start; + unsigned int end; + unsigned int i; + struct physical_geometry *physical = &this->physical_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + add_event("Entering mal_get_status", 1); + + /* Establish some important facts. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + + /* Choose the loop bounds. */ + + if (we_are_interleaving) { + start = 0; + end = physical->chip_count; + } else { + start = chip; + end = start + 1; + } + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (i = start; i < end; i++) { + + /* Select the current chip. */ + + this->nfc->select_chip(this, i); + + /* Reset the current chip. */ + + add_event("Resetting...", 0); + + nfc_util_send_cmd(this, NAND_CMD_RESET); + nfc_util_wait_for_the_nfc(this, false); + + } + + add_event("Exiting mal_get_status", -1); + +} + +/** + * mal_get_status() - Abstracted status retrieval. + * + * For media with a single chip, or concatenated chips, the HIL explicitly + * addresses a single chip at a time and wants the status from that chip only. + * + * For interleaved media, we must combine the individual chip states. At this + * writing, the NAND MTD system knows about the following bits in status + * registers: + * + * +------------------------+-------+---------+ + * | | | Combine | + * | Macro | Value | With | + * +------------------------+-------+---------+ + * | NAND_STATUS_FAIL | 0x01 | OR | + * | NAND_STATUS_FAIL_N1 | 0x02 | OR | + * | NAND_STATUS_TRUE_READY | 0x20 | AND | + * | NAND_STATUS_READY | 0x40 | AND | + * | NAND_STATUS_WP | 0x80 | AND | + * +------------------------+-------+---------+ + * + * @this: Per-device data. + * @chip: The logical chip of interest. + */ +static uint8_t mal_get_status(struct imx_nfc_data *this, unsigned chip) +{ + int we_are_interleaving; + unsigned int start; + unsigned int end; + unsigned int i; + unsigned int x; + unsigned int or_mask; + unsigned int and_mask; + uint8_t status; + struct physical_geometry *physical = &this->physical_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + add_event("Entering mal_get_status", 1); + + /* Establish some important facts. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + + /* Compute the masks we need. */ + + or_mask = NAND_STATUS_FAIL | NAND_STATUS_FAIL_N1; + and_mask = NAND_STATUS_TRUE_READY | NAND_STATUS_READY | NAND_STATUS_WP; + + /* Assume the chip is successful, ready and writeable. */ + + status = and_mask & ~or_mask; + + /* Choose the loop bounds. */ + + if (we_are_interleaving) { + start = 0; + end = physical->chip_count; + } else { + start = chip; + end = start + 1; + } + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (i = start; i < end; i++) { + + /* Select the current chip. */ + + this->nfc->select_chip(this, i); + + /* Get the current chip's status. */ + + add_event("Sending the command...", 0); + + nfc_util_send_cmd(this, NAND_CMD_STATUS); + nfc_util_wait_for_the_nfc(this, false); + + add_event("Reading the status...", 0); + + x = this->nfc->read_cycle(this); + + /* Fold this chip's status into the combined status. */ + + status |= (x & or_mask); + status &= (x & and_mask) | or_mask; + + } + + add_event("Exiting mal_get_status", -1); + + return status; + +} + +/** + * mal_read_a_page() - Abstracted page read. + * + * This function returns the ECC status for the entire read operation. A + * positive return value indicates the number of errors that were corrected + * (symbol errors for Reed-Solomon hardware engines, bit errors for BCH hardware + * engines). A negative return value indicates that the ECC engine failed to + * correct all errors and the data is corrupted. A zero return value indicates + * there were no errors at all. + * + * @this: Per-device data. + * @use_ecc: Indicates if we're to use ECC. + * @chip: The logical chip of interest. + * @page: The logical page number to read. + * @data: A pointer to the destination data buffer. If this pointer is null, + * that indicates the caller doesn't want the data. + * @oob: A pointer to the destination OOB buffer. If this pointer is null, + * that indicates the caller doesn't want the OOB. + */ +static int mal_read_a_page(struct imx_nfc_data *this, int use_ecc, + unsigned chip, unsigned page, uint8_t *data, uint8_t *oob) +{ + int we_are_interleaving; + int use_automatic_op; + unsigned int start; + unsigned int end; + unsigned int current_chip; + unsigned int oob_bytes_to_copy; + unsigned int data_bytes_to_copy; + int status; + unsigned int worst_case_ecc_status; + int return_value = 0; + struct physical_geometry *physical = &this->physical_geometry; + struct nfc_geometry *nfc = this->nfc_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + add_event("Entering mal_read_a_page", 1); + + /* Establish some important facts. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + use_automatic_op = !!this->nfc->start_auto_read; + + /* Apply the automatic operation override, if any. */ + + switch (this->auto_op_override) { + + case NEVER: + use_automatic_op = false; + break; + + case DRIVER_CHOICE: + break; + + case ALWAYS: + if (this->nfc->start_auto_read) + use_automatic_op = true; + break; + + } + + /* Set up ECC. */ + + this->nfc->set_ecc(this, use_ecc); + + /* Check if we're interleaving and set up the loop iterations. */ + + if (we_are_interleaving) { + + start = 0; + end = physical->chip_count; + + data_bytes_to_copy = + this->logical_geometry.page_data_size / + this->physical_geometry.chip_count; + oob_bytes_to_copy = + this->logical_geometry.page_oob_size / + this->physical_geometry.chip_count; + + } else { + + start = chip; + end = start + 1; + + data_bytes_to_copy = this->logical_geometry.page_data_size; + oob_bytes_to_copy = this->logical_geometry.page_oob_size; + + } + + /* If we're using the automatic operation, start it now. */ + + if (use_automatic_op) { + add_event("Starting the automatic operation...", 0); + this->nfc->start_auto_read(this, start, end - start, 0, page); + } + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (current_chip = start; current_chip < end; current_chip++) { + + /* Check if we're using the automatic operation. */ + + if (use_automatic_op) { + + add_event("Waiting...", 0); + this->nfc->wait_for_auto_read(this); + + } else { + + /* Select the current chip. */ + + this->nfc->select_chip(this, current_chip); + + /* Set up the chip. */ + + add_event("Sending the command and addresses...", 0); + + nfc_util_send_cmd_and_addrs(this, + NAND_CMD_READ0, 0, page); + + if (is_large_page_chip(this)) { + add_event("Sending the final command...", 0); + nfc_util_send_cmd(this, NAND_CMD_READSTART); + } + + /* Wait till the page is ready. */ + + add_event("Waiting for the page to arrive...", 0); + + nfc_util_wait_for_the_nfc(this, true); + + /* Read the page. */ + + add_event("Reading the page...", 0); + + this->nfc->read_page(this); + + } + + /* Copy a page out of the NFC. */ + + add_event("Copying from the NFC...", 0); + + if (oob) { + nfc_util_copy_from_the_nfc(this, + nfc->page_data_size, oob, oob_bytes_to_copy); + oob += oob_bytes_to_copy; + } + + if (data) { + nfc_util_copy_from_the_nfc(this, + 0, data, data_bytes_to_copy); + data += data_bytes_to_copy; + } + + /* + * If we're using ECC, and we haven't already seen an ECC + * failure, continue to gather ECC status. Note that, if we + * *do* see an ECC failure, we continue to read because the + * client might want the data for forensic purposes. + */ + + if (use_ecc && (return_value >= 0)) { + + add_event("Getting ECC status...", 0); + + status = this->nfc->get_ecc_status(this); + + if (status >= 0) + return_value += status; + else + return_value = -1; + + } + + /* Check if we're using the automatic operation. */ + + if (use_automatic_op) { + + /* + * If this is not the last iteration, resume the + * automatic operation. + */ + + if (current_chip < (end - 1)) { + add_event("Resuming...", 0); + this->nfc->resume_auto_read(this); + } + + } + + } + + /* Check if we're supposed to inject an ECC error. */ + + if (use_ecc && this->inject_ecc_error) { + + /* Inject the appropriate error. */ + + if (this->inject_ecc_error < 0) { + + add_event("Injecting an uncorrectable error...", 0); + + return_value = -1; + + } else { + + add_event("Injecting correctable errors...", 0); + + worst_case_ecc_status = + physical->chip_count * + nfc->buffer_count * + nfc->ecc_strength; + + if (this->inject_ecc_error > worst_case_ecc_status) + return_value = worst_case_ecc_status; + else + return_value = this->inject_ecc_error; + + } + + /* Stop injecting further errors. */ + + this->inject_ecc_error = 0; + + } + + /* Return. */ + + add_event("Exiting mal_read_a_page", -1); + + return return_value; + +} + +/** + * mal_write_a_page() - Abstracted page write. + * + * This function returns zero if the operation succeeded, or -EIO if the + * operation failed. + * + * @this: Per-device data. + * @use_ecc: Indicates if we're to use ECC. + * @chip: The logical chip of interest. + * @page: The logical page number to write. + * @data: A pointer to the source data buffer. + * @oob: A pointer to the source OOB buffer. + */ +static int mal_write_a_page(struct imx_nfc_data *this, int use_ecc, + unsigned chip, unsigned page, const uint8_t *data, const uint8_t *oob) +{ + int we_are_interleaving; + int use_automatic_op; + unsigned int start; + unsigned int end; + unsigned int current_chip; + unsigned int oob_bytes_to_copy; + unsigned int data_bytes_to_copy; + int return_value = 0; + struct physical_geometry *physical = &this->physical_geometry; + struct nfc_geometry *nfc = this->nfc_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + add_event("Entering mal_write_a_page", 1); + + /* Establish some important facts. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + use_automatic_op = !!this->nfc->start_auto_write; + + /* Apply the automatic operation override, if any. */ + + switch (this->auto_op_override) { + + case NEVER: + use_automatic_op = false; + break; + + case DRIVER_CHOICE: + break; + + case ALWAYS: + if (this->nfc->start_auto_write) + use_automatic_op = true; + break; + + } + + /* Set up ECC. */ + + this->nfc->set_ecc(this, use_ecc); + + /* Check if we're interleaving and set up the loop iterations. */ + + if (we_are_interleaving) { + + start = 0; + end = physical->chip_count; + + data_bytes_to_copy = + this->logical_geometry.page_data_size / + this->physical_geometry.chip_count; + oob_bytes_to_copy = + this->logical_geometry.page_oob_size / + this->physical_geometry.chip_count; + + } else { + + start = chip; + end = start + 1; + + data_bytes_to_copy = this->logical_geometry.page_data_size; + oob_bytes_to_copy = this->logical_geometry.page_oob_size; + + } + + /* If we're using the automatic operation, start the hardware now. */ + + if (use_automatic_op) { + add_event("Starting the automatic operation...", 0); + this->nfc->start_auto_write(this, start, end - start, 0, page); + } + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (current_chip = start; current_chip < end; current_chip++) { + + /* Copy a page into the NFC. */ + + add_event("Copying to the NFC...", 0); + + nfc_util_copy_to_the_nfc(this, oob, nfc->page_data_size, + oob_bytes_to_copy); + oob += oob_bytes_to_copy; + + nfc_util_copy_to_the_nfc(this, data, 0, data_bytes_to_copy); + + data += data_bytes_to_copy; + + /* Check if we're using the automatic operation. */ + + if (use_automatic_op) { + + /* Wait for the write operation to finish. */ + + add_event("Waiting...", 0); + + this->nfc->wait_for_auto_write(this); + + } else { + + /* Select the current chip. */ + + this->nfc->select_chip(this, current_chip); + + /* Set up the chip. */ + + add_event("Sending the command and addresses...", 0); + + nfc_util_send_cmd_and_addrs(this, + NAND_CMD_SEQIN, 0, page); + + /* Send the page. */ + + add_event("Sending the page...", 0); + + this->nfc->send_page(this); + + /* Start programming the page. */ + + add_event("Programming the page...", 0); + + nfc_util_send_cmd(this, NAND_CMD_PAGEPROG); + + /* Wait until the page is finished. */ + + add_event("Waiting...", 0); + + nfc_util_wait_for_the_nfc(this, true); + + } + + } + + /* Get status. */ + + add_event("Gathering status...", 0); + + if (mal_get_status(this, chip) & NAND_STATUS_FAIL) { + add_event("Bad status", 0); + return_value = -EIO; + } else { + add_event("Good status", 0); + } + + /* Return. */ + + add_event("Exiting mal_write_a_page", -1); + + return return_value; + +} + +/** + * mal_erase_a_block() - Abstract block erase operation. + * + * Note that this function does *not* wait for the operation to finish. The + * caller is expected to call waitfunc() at some later time. + * + * @this: Per-device data. + * @chip: The logical chip of interest. + * @page: A logical page address that identifies the block to erase. + */ +static void mal_erase_a_block(struct imx_nfc_data *this, + unsigned chip, unsigned page) +{ + int we_are_interleaving; + int use_automatic_op; + unsigned int start; + unsigned int end; + unsigned int i; + struct physical_geometry *physical = &this->physical_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + add_event("Entering mal_erase_a_block", 1); + + /* Establish some important facts. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + use_automatic_op = !!this->nfc->start_auto_erase; + + /* Apply the automatic operation override, if any. */ + + switch (this->auto_op_override) { + + case NEVER: + use_automatic_op = false; + break; + + case DRIVER_CHOICE: + break; + + case ALWAYS: + if (this->nfc->start_auto_erase) + use_automatic_op = true; + break; + + } + + /* Choose the loop bounds. */ + + if (we_are_interleaving) { + start = 0; + end = physical->chip_count; + } else { + start = chip; + end = start + 1; + } + + /* Check if we're using the automatic operation. */ + + if (use_automatic_op) { + + /* + * Start the operation. Note that we don't wait for it to + * finish because the HIL will call our waitfunc(). + */ + + add_event("Starting the automatic operation...", 0); + + this->nfc->start_auto_erase(this, start, end - start, page); + + } else { + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (i = start; i < end; i++) { + + /* Select the current chip. */ + + this->nfc->select_chip(this, i); + + /* Set up the chip. */ + + nfc_util_send_cmd_and_addrs(this, + NAND_CMD_ERASE1, -1, page); + + /* Start the erase. */ + + nfc_util_send_cmd(this, NAND_CMD_ERASE2); + + /* + * If this is the last time through the loop, break out + * now so we don't try to wait (the HIL will call our + * waitfunc() for the final wait). + */ + + if (i >= (end - 1)) + break; + + /* Wait for the erase on the current chip to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + + } + + } + + add_event("Exiting mal_erase_a_block", -1); + +} + +/** + * mal_is_block_bad() - Abstract bad block check. + * + * @this: Per-device data. + * @chip: The logical chip of interest. + * @page: The logical page number to read. + */ + #if 0 + +/* TODO: Finish this function and plug it in. */ + +static int mal_is_block_bad(struct imx_nfc_data *this, + unsigned chip, unsigned page) +{ + int we_are_interleaving; + unsigned int start; + unsigned int end; + unsigned int i; + uint8_t *p; + int return_value = 0; + struct nand_chip *nand = &this->nand; + struct physical_geometry *physical = &this->physical_geometry; + struct logical_geometry *logical = &this->logical_geometry; + + /* Figure out if we're interleaving. */ + + we_are_interleaving = logical->chip_count != physical->chip_count; + + /* + * We're about to use the NAND Flash MTD layer's buffer, so invalidate + * the page cache. + */ + + this->nand.pagebuf = -1; + + /* + * Read the OOB of the given page, using the NAND Flash MTD's buffer. + * + * Notice that ECC is off, which it *must* be when scanning block marks. + */ + + mal_read_a_page(this, false, + this->current_chip, this->page_address, 0, nand->oob_poi); + + /* Choose the loop bounds. */ + + if (we_are_interleaving) { + start = 0; + end = physical->chip_count; + } else { + start = chip; + end = start + 1; + } + + /* Start scanning at the beginning of the OOB data. */ + + p = nand->oob_poi; + + /* Loop over physical chips. */ + + add_event("Looping over physical chips...", 0); + + for (i = start; i < end; i++, p += 5) { + + /* Examine the OOB for this chip. */ + + if (p[nand->badblockpos] != 0xff) { + return_value = !0; + break; + } + + } + + /* Return. */ + + return return_value; + +} +#endif + +/** + * mil_init() - Initializes the MTD Interface Layer. + * + * @this: Per-device data. + */ +static void mil_init(struct imx_nfc_data *this) +{ + this->current_chip = -1; /* No chip is selected yet. */ + this->command_is_new = false; /* No command yet. */ +} + +/** + * mil_cmd_ctrl() - MTD Interface cmd_ctrl() + * + * @mtd: A pointer to the owning MTD. + * @dat: The data signals to present to the chip. + * @ctrl: The control signals to present to the chip. + */ +static void mil_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_dev_ready() - MTD Interface dev_ready() + * + * @mtd: A pointer to the owning MTD. + */ +static int mil_dev_ready(struct mtd_info *mtd) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc dev_ready]\n"); + + add_event("Entering mil_dev_ready", 1); + + if (this->nfc->is_ready(this)) { + add_event("Exiting mil_dev_ready - Returning ready", -1); + return !0; + } else { + add_event("Exiting mil_dev_ready - Returning busy", -1); + return 0; + } + +} + +/** + * mil_select_chip() - MTD Interface select_chip() + * + * @mtd: A pointer to the owning MTD. + * @chip: The chip number to select, or -1 to select no chip. + */ +static void mil_select_chip(struct mtd_info *mtd, int chip) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc select_chip] chip: %d\n", chip); + + /* Figure out what kind of transition this is. */ + + if ((this->current_chip < 0) && (chip >= 0)) { + start_event_trace("Entering mil_select_chip"); + if (this->pdata->force_ce) + this->nfc->set_force_ce(this, true); + clk_enable(this->clock); + add_event("Exiting mil_select_chip", -1); + } else if ((this->current_chip >= 0) && (chip < 0)) { + add_event("Entering mil_select_chip", 1); + if (this->pdata->force_ce) + this->nfc->set_force_ce(this, false); + clk_disable(this->clock); + stop_event_trace("Exiting mil_select_chip"); + } else { + add_event("Entering mil_select_chip", 1); + add_event("Exiting mil_select_chip", -1); + } + + this->current_chip = chip; + +} + +/** + * mil_cmdfunc() - MTD Interface cmdfunc() + * + * This function handles NAND Flash command codes from the HIL. Since only the + * HIL calls this function (none of the reference implementations we use do), it + * needs to handle very few command codes. + * + * @mtd: A pointer to the owning MTD. + * @command: The command code. + * @column: The column address associated with this command code, or -1 if no + * column address applies. + * @page: The page address associated with this command code, or -1 if no + * page address applies. + */ +static void mil_cmdfunc(struct mtd_info *mtd, + unsigned command, int column, int page) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc cmdfunc] command: 0x%02x, " + "column: 0x%04x, page: 0x%06x\n", command, column, page); + + add_event("Entering mil_cmdfunc", 1); + + /* Record the command and the fact that it hasn't yet been sent. */ + + this->command = command; + this->command_is_new = true; + + /* + * Process the command code. + * + * Note the default case to trap unrecognized codes. Thus, every command + * we support must have a case here, even if we don't have to do any + * pre-processing work. If the HIL changes and starts sending commands + * we haven't explicitly implemented, this will warn us. + */ + + switch (command) { + + case NAND_CMD_READ0: + add_event("NAND_CMD_READ0", 0); + /* + * After calling this function to send the command and + * addresses, the HIL will call ecc.read_page() or + * ecc.read_page_raw() to collect the data. + * + * The column address from the HIL is always zero. The only + * information we need to keep from this call is the page + * address. + */ + this->page_address = page; + break; + + case NAND_CMD_STATUS: + add_event("NAND_CMD_STATUS", 0); + /* + * After calling this function to send the command, the HIL + * will call read_byte() once to collect the status. + */ + break; + + case NAND_CMD_READID: + add_event("NAND_CMD_READID", 0); + /* + * After calling this function to send the command, the HIL + * will call read_byte() repeatedly to collect ID bytes. + */ + break; + + case NAND_CMD_RESET: + add_event("NAND_CMD_RESET", 0); + mal_reset(this, this->current_chip); + break; + + default: + dev_emerg(this->dev, "Unsupported NAND Flash command code: " + "0x%02x\n", command); + BUG(); + break; + + } + + add_event("Exiting mil_cmdfunc", -1); + +} + +/** + * mil_waitfunc() - MTD Interface waifunc() + * + * This function blocks until the current chip is ready and then returns the + * contents of the chip's status register. The HIL only calls this function + * after starting an erase operation. + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + */ +static int mil_waitfunc(struct mtd_info *mtd, struct nand_chip *nand) +{ + int status; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc waitfunc]\n"); + + add_event("Entering mil_waitfunc", 1); + + /* Wait for the NFC to finish. */ + + nfc_util_wait_for_the_nfc(this, true); + + /* Get the status. */ + + status = mal_get_status(this, this->current_chip); + + add_event("Exiting mil_waitfunc", -1); + + return status; + +} + +/** + * mil_read_byte() - MTD Interface read_byte(). + * + * @mtd: A pointer to the owning MTD. + */ +static uint8_t mil_read_byte(struct mtd_info *mtd) +{ + uint8_t byte = 0; + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + add_event("Entering mil_read_byte", 1); + + /* + * The command sent by the HIL before it called this function determines + * how we get the byte we're going to return. + */ + + switch (this->command) { + + case NAND_CMD_STATUS: + add_event("NAND_CMD_STATUS", 0); + byte = mal_get_status(this, this->current_chip); + break; + + case NAND_CMD_READID: + add_event("NAND_CMD_READID", 0); + + /* + * Check if the command is new. If so, then the HIL just + * recently called cmdfunc(), so the current chip isn't selected + * and the command hasn't been sent to the chip. + */ + + if (this->command_is_new) { + add_event("Sending the \"Read ID\" command...", 0); + this->nfc->select_chip(this, this->current_chip); + nfc_util_send_cmd_and_addrs(this, + NAND_CMD_READID, 0, -1); + this->command_is_new = false; + } + + /* Read the ID byte. */ + + add_event("Reading the ID byte...", 0); + + byte = this->nfc->read_cycle(this); + + break; + + default: + dev_emerg(this->dev, "Unsupported NAND Flash command code: " + "0x%02x\n", this->command); + BUG(); + break; + + } + + DEBUG(MTD_DEBUG_LEVEL2, + "[imx_nfc read_byte] Returning: 0x%02x\n", byte); + + add_event("Exiting mil_read_byte", -1); + + return byte; + +} + +/** + * mil_read_word() - MTD Interface read_word(). + * + * @mtd: A pointer to the owning MTD. + */ +static uint16_t mil_read_word(struct mtd_info *mtd) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); + return 0; +} + +/** + * mil_read_buf() - MTD Interface read_buf(). + * + * @mtd: A pointer to the owning MTD. + * @buf: The destination buffer. + * @len: The number of bytes to read. + */ +static void mil_read_buf(struct mtd_info *mtd, uint8_t * buf, int len) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_write_buf() - MTD Interface write_buf(). + * + * @mtd: A pointer to the owning MTD. + * @buf: The source buffer. + * @len: The number of bytes to read. + */ +static void mil_write_buf(struct mtd_info *mtd, const uint8_t * buf, int len) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_verify_buf() - MTD Interface verify_buf(). + * + * @mtd: A pointer to the owning MTD. + * @buf: The destination buffer. + * @len: The number of bytes to read. + */ +static int mil_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); + return 0; +} + +/** + * mil_ecc_hwctl() - MTD Interface ecc.hwctl(). + * + * @mtd: A pointer to the owning MTD. + * @mode: The ECC mode. + */ +static void mil_ecc_hwctl(struct mtd_info *mtd, int mode) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_ecc_calculate() - MTD Interface ecc.calculate(). + * + * @mtd: A pointer to the owning MTD. + * @dat: A pointer to the source data. + * @ecc_code: A pointer to a buffer that will receive the resulting ECC. + */ +static int mil_ecc_calculate(struct mtd_info *mtd, + const uint8_t *dat, uint8_t *ecc_code) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); + return 0; +} + +/** + * mil_ecc_correct() - MTD Interface ecc.correct(). + * + * @mtd: A pointer to the owning MTD. + * @dat: A pointer to the source data. + * @read_ecc: A pointer to the ECC that was read from the medium. + * @calc_ecc: A pointer to the ECC that was calculated for the source data. + */ +static int mil_ecc_correct(struct mtd_info *mtd, + uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); + return 0; +} + +/** + * mil_ecc_read_page() - MTD Interface ecc.read_page(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @buf: A pointer to the destination buffer. + */ +static int mil_ecc_read_page(struct mtd_info *mtd, + struct nand_chip *nand, uint8_t *buf) +{ + int ecc_status; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc ecc_read_page]\n"); + + add_event("Entering mil_ecc_read_page", 1); + + /* Read the page. */ + + ecc_status = + mal_read_a_page(this, true, this->current_chip, + this->page_address, buf, nand->oob_poi); + + /* Propagate ECC information. */ + + if (ecc_status < 0) { + add_event("ECC Failure", 0); + mtd->ecc_stats.failed++; + } else if (ecc_status > 0) { + add_event("ECC Corrections", 0); + mtd->ecc_stats.corrected += ecc_status; + } + + add_event("Exiting mil_ecc_read_page", -1); + + return 0; + +} + +/** + * mil_ecc_read_page_raw() - MTD Interface ecc.read_page_raw(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @buf: A pointer to the destination buffer. + */ +static int mil_ecc_read_page_raw(struct mtd_info *mtd, + struct nand_chip *nand, uint8_t *buf) +{ + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc ecc_read_page_raw]\n"); + + add_event("Entering mil_ecc_read_page_raw", 1); + + mal_read_a_page(this, false, this->current_chip, + this->page_address, buf, nand->oob_poi); + + add_event("Exiting mil_ecc_read_page_raw", -1); + + return 0; + +} + +/** + * mil_ecc_write_page() - MTD Interface ecc.write_page(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @buf: A pointer to the source buffer. + */ +static void mil_ecc_write_page(struct mtd_info *mtd, + struct nand_chip *nand, const uint8_t *buf) +{ + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_ecc_write_page_raw() - MTD Interface ecc.write_page_raw(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @buf: A pointer to the source buffer. + */ +static void mil_ecc_write_page_raw(struct mtd_info *mtd, + struct nand_chip *nand, const uint8_t *buf) +{ + struct imx_nfc_data *this = nand->priv; + unimplemented(this, __func__); +} + +/** + * mil_write_page() - MTD Interface ecc.write_page(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @buf: A pointer to the source buffer. + * @page: The page number to write. + * @cached: Indicates cached programming (ignored). + * @raw: Indicates not to use ECC. + */ +static int mil_write_page(struct mtd_info *mtd, + struct nand_chip *nand, const uint8_t *buf, + int page, int cached, int raw) +{ + int return_value; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc write_page]\n"); + + add_event("Entering mil_write_page", 1); + + return_value = mal_write_a_page(this, !raw, + this->current_chip, page, buf, nand->oob_poi); + + add_event("Exiting mil_write_page", -1); + + return return_value; + +} + +/** + * mil_ecc_read_oob() - MTD Interface read_oob(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @page: The page number to read. + * @sndcmd: Indicates this function should send a command to the chip before + * reading the out-of-band bytes. This is only false for small page + * chips that support auto-increment. + */ +static int mil_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand, + int page, int sndcmd) +{ + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc ecc_read_oob] " + "page: 0x%06x, sndcmd: %s\n", page, sndcmd ? "Yes" : "No"); + + add_event("Entering mil_ecc_read_oob", 1); + + mal_read_a_page(this, false, + this->current_chip, page, 0, nand->oob_poi); + + add_event("Exiting mil_ecc_read_oob", -1); + + /* + * Return true, indicating that the next call to this function must send + * a command. + */ + + return true; + +} + +/** + * mil_ecc_write_oob() - MTD Interface write_oob(). + * + * @mtd: A pointer to the owning MTD. + * @nand: A pointer to the owning NAND Flash MTD. + * @page: The page number to write. + */ +static int mil_ecc_write_oob(struct mtd_info *mtd, + struct nand_chip *nand, int page) +{ + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc ecc_write_oob] page: 0x%06x\n", page); + + /* + * There are fundamental incompatibilities between the i.MX NFC and the + * NAND Flash MTD model that make it essentially impossible to write the + * out-of-band bytes. + */ + + dev_emerg(this->dev, "This driver doesn't support writing the OOB\n"); + WARN_ON(1); + + /* Return status. */ + + return -EIO; + +} + +/** + * mil_erase_cmd() - MTD Interface erase_cmd(). + * + * We set the erase_cmd pointer in struct nand_chip to point to this function. + * Thus, the HIL will call here for all erase operations. + * + * Strictly speaking, since the erase_cmd pointer is marked "Internal," we + * shouldn't be doing this. However, the only reason the HIL uses that pointer + * is to install a different function for erasing conventional NAND Flash or AND + * Flash. Since AND Flash is obsolete and we don't support it, this isn't + * important. + * + * Furthermore, to cleanly implement interleaving (which is critical to speeding + * up erase operations), we want to "hook into" the operation at the highest + * semantic level possible. If we don't hook this function, then the only way + * we'll know that an erase is happening is when the HIL calls cmdfunc() with + * an erase command. Implementing interleaving at that level is roughly a + * billion times less desirable. + * + * This function does *not* wait for the operation to finish. The HIL will call + * waitfunc() later to wait for the operation to finish. + * + * @mtd: A pointer to the owning MTD. + * @page: A page address that identifies the block to erase. + */ +static void mil_erase_cmd(struct mtd_info *mtd, int page) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc erase_cmd] page: 0x%06x\n", page); + + add_event("Entering mil_erase_cmd", 1); + + mal_erase_a_block(this, this->current_chip, page); + + add_event("Exiting mil_erase_cmd", -1); + +} + +/** + * mil_block_bad() - MTD Interface block_bad(). + * + * @mtd: A pointer to the owning MTD. + * @ofs: The offset of the block of interest, from the start of the medium. + * @getchip: Indicates this function must acquire the MTD before using it. + */ +#if 0 + +/* TODO: Finish this function and plug it in. */ + +static int mil_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) +{ + unsigned int chip; + unsigned int page; + int return_value; + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc block_bad] page: 0x%06x\n", page); + + add_event("Entering mil_block_bad", 1); + + /* Compute the logical chip number that contains the given offset. */ + + chip = (unsigned int) (ofs >> nand->chip_shift); + + /* Compute the logical page address within the logical chip. */ + + page = ((unsigned int) (ofs >> nand->page_shift)) & nand->pagemask; + + /* Check if the block is bad. */ + + return_value = mal_is_block_bad(this, chip, page); + + if (return_value) + add_event("Bad block", 0); + + /* Return. */ + + add_event("Exiting mil_block_bad", -1); + + return return_value; + +} +#endif + +/** + * mil_scan_bbt() - MTD Interface scan_bbt(). + * + * The HIL calls this function once, when it initializes the NAND Flash MTD. + * + * Nominally, the purpose of this function is to look for or create the bad + * block table. In fact, since the HIL calls this function at the very end of + * the initialization process started by nand_scan(), and the HIL doesn't have a + * more formal mechanism, everyone "hooks" this function to continue the + * initialization process. + * + * At this point, the physical NAND Flash chips have been identified and + * counted, so we know the physical geometry. This enables us to make some + * important configuration decisions. + * + * The return value of this function propogates directly back to this driver's + * call to nand_scan(). Anything other than zero will cause this driver to + * tear everything down and declare failure. + * + * @mtd: A pointer to the owning MTD. + */ +static int mil_scan_bbt(struct mtd_info *mtd) +{ + struct nand_chip *nand = mtd->priv; + struct imx_nfc_data *this = nand->priv; + + DEBUG(MTD_DEBUG_LEVEL2, "[imx_nfc scan_bbt] \n"); + + add_event("Entering mil_scan_bbt", 1); + + /* + * We replace the erase_cmd() function that the MTD NAND Flash system + * has installed with our own. See mil_erase_cmd() for the reasons. + */ + + nand->erase_cmd = mil_erase_cmd; + + /* + * Tell MTD users that the out-of-band area can't be written. + * + * This flag is not part of the standard kernel source tree. It comes + * from a patch that touches both MTD and JFFS2. + * + * The problem is that, without this patch, JFFS2 believes it can write + * the data area and the out-of-band area separately. This is wrong for + * two reasons: + * + * 1) Our NFC distributes out-of-band bytes throughout the page, + * intermingled with the data, and covered by the same ECC. + * Thus, it's not possible to write the out-of-band bytes and + * data bytes separately. + * + * 2) Large page (MLC) Flash chips don't support partial page + * writes. You must write the entire page at a time. Thus, even + * if our NFC didn't force you to write out-of-band and data + * bytes together, it would *still* be a bad idea to do + * otherwise. + */ + + mtd->flags &= ~MTD_OOB_WRITEABLE; + + /* Set up geometry. */ + + mal_set_geometry(this); + + /* We use the reference implementation for bad block management. */ + + add_event("Exiting mil_scan_bbt", -1); + + return nand_scan_bbt(mtd, nand->badblock_pattern); + +} + +/** + * parse_bool_param() - Parses the value of a boolean parameter string. + * + * @s: The string to parse. + */ +static int parse_bool_param(const char *s) +{ + + if (!strcmp(s, "1") || !strcmp(s, "on") || + !strcmp(s, "yes") || !strcmp(s, "true")) { + return 1; + } else if (!strcmp(s, "0") || !strcmp(s, "off") || + !strcmp(s, "no") || !strcmp(s, "false")) { + return 0; + } else { + return -1; + } + +} + +/** + * set_module_enable() - Controls whether this driver is enabled. + * + * Note that this state can be controlled from the command line. Disabling this + * driver is sometimes useful for debugging. + * + * @s: The new value of the parameter. + * @kp: The owning kernel parameter. + */ +static int set_module_enable(const char *s, struct kernel_param *kp) +{ + + switch (parse_bool_param(s)) { + + case 1: + imx_nfc_module_enable = true; + break; + + case 0: + imx_nfc_module_enable = false; + break; + + default: + return -EINVAL; + break; + + } + + return 0; + +} + +/** + * get_module_enable() - Indicates whether this driver is enabled. + * + * @p: A pointer to a (small) buffer that will receive the response. + * @kp: The owning kernel parameter. + */ +static int get_module_enable(char *p, struct kernel_param *kp) +{ + p[0] = imx_nfc_module_enable ? '1' : '0'; + p[1] = 0; + return 1; +} + +#ifdef EVENT_REPORTING + +/** + * set_module_report_events() - Controls whether this driver reports events. + * + * @s: The new value of the parameter. + * @kp: The owning kernel parameter. + */ +static int set_module_report_events(const char *s, struct kernel_param *kp) +{ + + switch (parse_bool_param(s)) { + + case 1: + imx_nfc_module_report_events = true; + break; + + case 0: + imx_nfc_module_report_events = false; + reset_event_trace(); + break; + + default: + return -EINVAL; + break; + + } + + return 0; + +} + +/** + * get_module_report_events() - Indicates whether the driver reports events. + * + * @p: A pointer to a (small) buffer that will receive the response. + * @kp: The owning kernel parameter. + */ +static int get_module_report_events(char *p, struct kernel_param *kp) +{ + p[0] = imx_nfc_module_report_events ? '1' : '0'; + p[1] = 0; + return 1; +} + +/** + * set_module_dump_events() - Forces the driver to dump current events. + * + * @s: The new value of the parameter. + * @kp: The owning kernel parameter. + */ +static int set_module_dump_events(const char *s, struct kernel_param *kp) +{ + dump_event_trace(); + return 0; +} + +#endif /*EVENT_REPORTING*/ + +/** + * set_module_interleave_override() - Controls the interleave override. + * + * @s: The new value of the parameter. + * @kp: The owning kernel parameter. + */ +static int set_module_interleave_override(const char *s, + struct kernel_param *kp) +{ + + if (!strcmp(s, "-1")) + imx_nfc_module_interleave_override = NEVER; + else if (!strcmp(s, "0")) + imx_nfc_module_interleave_override = DRIVER_CHOICE; + else if (!strcmp(s, "1")) + imx_nfc_module_interleave_override = ALWAYS; + else + return -EINVAL; + + return 0; + +} + +/** + * get_module_interleave_override() - Indicates the interleave override state. + * + * @p: A pointer to a (small) buffer that will receive the response. + * @kp: The owning kernel parameter. + */ +static int get_module_interleave_override(char *p, struct kernel_param *kp) +{ + return sprintf(p, "%d", imx_nfc_module_interleave_override); +} + +/** + * set_force_bytewise_copy() - Controls forced bytewise copy from/to the NFC. + * + * @s: The new value of the parameter. + * @kp: The owning kernel parameter. + */ +static int set_module_force_bytewise_copy(const char *s, + struct kernel_param *kp) +{ + + switch (parse_bool_param(s)) { + + case 1: + imx_nfc_module_force_bytewise_copy = true; + break; + + case 0: + imx_nfc_module_force_bytewise_copy = false; + break; + + default: + return -EINVAL; + break; + + } + + return 0; + +} + +/** + * get_force_bytewise_copy() - Indicates whether bytewise copy is being forced. + * + * @p: A pointer to a (small) buffer that will receive the response. + * @kp: The owning kernel parameter. + */ +static int get_module_force_bytewise_copy(char *p, struct kernel_param *kp) +{ + p[0] = imx_nfc_module_force_bytewise_copy ? '1' : '0'; + p[1] = 0; + return 1; +} + +/* Module attributes that appear in sysfs. */ + +module_param_call(enable, set_module_enable, get_module_enable, 0, 0444); +MODULE_PARM_DESC(enable, "enables/disables probing"); + +#ifdef EVENT_REPORTING +module_param_call(report_events, + set_module_report_events, get_module_report_events, 0, 0644); +MODULE_PARM_DESC(report_events, "enables/disables event reporting"); + +module_param_call(dump_events, set_module_dump_events, 0, 0, 0644); +MODULE_PARM_DESC(dump_events, "forces current event dump"); +#endif + +module_param_call(interleave_override, set_module_interleave_override, + get_module_interleave_override, 0, 0444); +MODULE_PARM_DESC(interleave_override, "overrides interleaving choice"); + +module_param_call(force_bytewise_copy, set_module_force_bytewise_copy, + get_module_force_bytewise_copy, 0, 0644); +MODULE_PARM_DESC(force_bytewise_copy, "forces bytewise copy from/to NFC"); + +/** + * show_device_platform_info() - Shows the device's platform information. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_platform_info(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int o = 0; + unsigned int i; + void *buffer_base; + void *primary_base; + void *secondary_base; + unsigned int interrupt_number; + struct resource *r; + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct platform_device *pdev = this->pdev; + struct imx_nfc_platform_data *pdata = this->pdata; + struct mtd_partition *partition; + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_BUFFERS_ADDR_RES_NAME); + + buffer_base = (void *) r->start; + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME); + + primary_base = (void *) r->start; + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME); + + secondary_base = (void *) r->start; + + r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, + IMX_NFC_INTERRUPT_RES_NAME); + + interrupt_number = r->start; + + o += sprintf(buf, + "NFC Major Version : %u\n" + "NFC Minor Version : %u\n" + "Force CE : %s\n" + "Target Cycle in ns : %u\n" + "Clock Name : %s\n" + "Interleave : %s\n" + "Buffer Base : 0x%p\n" + "Primary Registers Base : 0x%p\n" + "Secondary Registers Base: 0x%p\n" + "Interrupt Number : %u\n" + , + pdata->nfc_major_version, + pdata->nfc_minor_version, + pdata->force_ce ? "Yes" : "No", + pdata->target_cycle_in_ns, + pdata->clock_name, + pdata->interleave ? "Yes" : "No", + buffer_base, + primary_base, + secondary_base, + interrupt_number + ); + + #ifdef CONFIG_MTD_PARTITIONS + + o += sprintf(buf + o, + "Partition Count : %u\n" + , + pdata->partition_count + ); + + /* Loop over partitions. */ + + for (i = 0; i < pdata->partition_count; i++) { + + partition = pdata->partitions + i; + + o += sprintf(buf+o, " [%d]\n", i); + o += sprintf(buf+o, " Name : %s\n", partition->name); + + switch (partition->offset) { + + case MTDPART_OFS_NXTBLK: + o += sprintf(buf+o, " Offset: " + "MTDPART_OFS_NXTBLK\n"); + break; + case MTDPART_OFS_APPEND: + o += sprintf(buf+o, " Offset: " + "MTDPART_OFS_APPEND\n"); + break; + default: + o += sprintf(buf+o, " Offset: %u (%u MiB)\n", + partition->offset, + partition->offset / (1024 * 1024)); + break; + + } + + if (partition->size == MTDPART_SIZ_FULL) { + o += sprintf(buf+o, " Size : " + "MTDPART_SIZ_FULL\n"); + } else { + o += sprintf(buf+o, " Size : %u (%u MiB)\n", + partition->size, + partition->size / (1024 * 1024)); + } + + } + + #endif + + return o; + +} + +/** + * show_device_physical_geometry() - Shows the physical Flash device geometry. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_physical_geometry(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct physical_geometry *physical = &this->physical_geometry; + + return sprintf(buf, + "Chip Count : %u\n" + "Chip Size in Bytes : %llu\n" + "Block Size in Bytes : %u\n" + "Page Data Size in Bytes: %u\n" + "Page OOB Size in Bytes : %u\n" + , + physical->chip_count, + physical->chip_size, + physical->block_size, + physical->page_data_size, + physical->page_oob_size + ); + +} + +/** + * show_device_nfc_info() - Shows the NFC-specific information. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_nfc_info(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned long parent_clock_rate_in_hz; + unsigned long clock_rate_in_hz; + struct clk *parent_clock; + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct nfc_hal *nfc = this->nfc; + + parent_clock = clk_get_parent(this->clock); + parent_clock_rate_in_hz = clk_get_rate(parent_clock); + clock_rate_in_hz = clk_get_rate(this->clock); + + return sprintf(buf, + "Major Version : %u\n" + "Minor Version : %u\n" + "Max Chip Count : %u\n" + "Max Buffer Count : %u\n" + "Spare Buffer Stride : %u\n" + "Has Secondary Registers : %s\n" + "Can Be Symmetric : %s\n" + "Exposes Ready/Busy : %s\n" + "Parent Clock Rate in Hz : %lu\n" + "Clock Rate in Hz : %lu\n" + "Symmetric Clock : %s\n" + , + nfc->major_version, + nfc->minor_version, + nfc->max_chip_count, + nfc->max_buffer_count, + nfc->spare_buf_stride, + nfc->has_secondary_regs ? "Yes" : "No", + nfc->can_be_symmetric ? "Yes" : "No", + nfc->is_ready ? "Yes" : "No", + parent_clock_rate_in_hz, + clock_rate_in_hz, + this->nfc->get_symmetric(this) ? "Yes" : "No" + ); + +} + +/** + * show_device_nfc_geometry() - Shows the NFC view of the device geometry. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_nfc_geometry(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + return sprintf(buf, + "Page Data Size in Bytes : %u\n" + "Page OOB Size in Bytes : %u\n" + "ECC Algorithm : %s\n" + "ECC Strength : %u\n" + "Buffers in Use : %u\n" + "Spare Buffer Size in Use: %u\n" + "Spare Buffer Spillover : %u\n" + , + this->nfc_geometry->page_data_size, + this->nfc_geometry->page_oob_size, + this->nfc_geometry->ecc_algorithm, + this->nfc_geometry->ecc_strength, + this->nfc_geometry->buffer_count, + this->nfc_geometry->spare_buf_size, + this->nfc_geometry->spare_buf_spill + ); + +} + +/** + * show_device_logical_geometry() - Shows the logical device geometry. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_logical_geometry(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct logical_geometry *logical = &this->logical_geometry; + + return sprintf(buf, + "Chip Count : %u\n" + "Chip Size in Bytes : %u\n" + "Usable Size in Bytes : %u\n" + "Block Size in Bytes : %u\n" + "Page Data Size in Bytes: %u\n" + "Page OOB Size in Bytes : %u\n" + , + logical->chip_count, + logical->chip_size, + logical->usable_size, + logical->block_size, + logical->page_data_size, + logical->page_oob_size + ); + +} + +/** + * show_device_mtd_nand_info() - Shows the device's MTD NAND-specific info. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_mtd_nand_info(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int o = 0; + unsigned int i; + unsigned int j; + static const unsigned int columns = 8; + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct nand_chip *nand = &this->nand; + + o += sprintf(buf + o, + "Options : 0x%08x\n" + "Chip Count : %u\n" + "Chip Size : %lu\n" + "Minimum Writable Size: %u\n" + "Page Shift : %u\n" + "Page Mask : 0x%x\n" + "Block Shift : %u\n" + "BBT Block Shift : %u\n" + "Chip Shift : %u\n" + "Block Mark Offset : %u\n" + "Cached Page Number : %d\n" + , + nand->options, + nand->numchips, + nand->chipsize, + nand->subpagesize, + nand->page_shift, + nand->pagemask, + nand->phys_erase_shift, + nand->bbt_erase_shift, + nand->chip_shift, + nand->badblockpos, + nand->pagebuf + ); + + o += sprintf(buf + o, + "ECC Byte Count : %u\n" + , + nand->ecc.layout->eccbytes + ); + + /* Loop over rows. */ + + for (i = 0; (i * columns) < nand->ecc.layout->eccbytes; i++) { + + /* Loop over columns within rows. */ + + for (j = 0; j < columns; j++) { + + if (((i * columns) + j) >= nand->ecc.layout->eccbytes) + break; + + o += sprintf(buf + o, " %3u", + nand->ecc.layout->eccpos[(i * columns) + j]); + + } + + o += sprintf(buf + o, "\n"); + + } + + o += sprintf(buf + o, + "OOB Available Bytes : %u\n" + , + nand->ecc.layout->oobavail + ); + + j = 0; + + for (i = 0; j < nand->ecc.layout->oobavail; i++) { + + j += nand->ecc.layout->oobfree[i].length; + + o += sprintf(buf + o, + " [%3u, %2u]\n" + , + nand->ecc.layout->oobfree[i].offset, + nand->ecc.layout->oobfree[i].length + ); + + } + + return o; + +} + +/** + * show_device_mtd_info() - Shows the device's MTD-specific information. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_mtd_info(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int o = 0; + unsigned int i; + unsigned int j; + static const unsigned int columns = 8; + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct mtd_info *mtd = &this->mtd; + + o += sprintf(buf + o, + "Name : %s\n" + "Type : %u\n" + "Flags : 0x%08x\n" + "Size in Bytes : %u\n" + "Erase Region Count : %d\n" + "Erase Size in Bytes: %u\n" + "Write Size in Bytes: %u\n" + "OOB Size in Bytes : %u\n" + "Errors Corrected : %u\n" + "Failed Reads : %u\n" + "Bad Block Count : %u\n" + "BBT Block Count : %u\n" + , + mtd->name, + mtd->type, + mtd->flags, + mtd->size, + mtd->numeraseregions, + mtd->erasesize, + mtd->writesize, + mtd->oobsize, + mtd->ecc_stats.corrected, + mtd->ecc_stats.failed, + mtd->ecc_stats.badblocks, + mtd->ecc_stats.bbtblocks + ); + + o += sprintf(buf + o, + "ECC Byte Count : %u\n" + , + mtd->ecclayout->eccbytes + ); + + /* Loop over rows. */ + + for (i = 0; (i * columns) < mtd->ecclayout->eccbytes; i++) { + + /* Loop over columns within rows. */ + + for (j = 0; j < columns; j++) { + + if (((i * columns) + j) >= mtd->ecclayout->eccbytes) + break; + + o += sprintf(buf + o, " %3u", + mtd->ecclayout->eccpos[(i * columns) + j]); + + } + + o += sprintf(buf + o, "\n"); + + } + + o += sprintf(buf + o, + "OOB Available Bytes: %u\n" + , + mtd->ecclayout->oobavail + ); + + j = 0; + + for (i = 0; j < mtd->ecclayout->oobavail; i++) { + + j += mtd->ecclayout->oobfree[i].length; + + o += sprintf(buf + o, + " [%3u, %2u]\n" + , + mtd->ecclayout->oobfree[i].offset, + mtd->ecclayout->oobfree[i].length + ); + + } + + return o; + +} + +/** + * show_device_bbt_pages() - Shows the pages in which BBT's appear. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_bbt_pages(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int o = 0; + unsigned int i; + struct imx_nfc_data *this = dev_get_drvdata(dev); + struct nand_chip *nand = &this->nand; + + /* Loop over main BBT pages. */ + + if (nand->bbt_td) + for (i = 0; i < NAND_MAX_CHIPS; i++) + o += sprintf(buf + o, "%d: 0x%08x\n", + i, nand->bbt_td->pages[i]); + + /* Loop over mirror BBT pages. */ + + if (nand->bbt_md) + for (i = 0; i < NAND_MAX_CHIPS; i++) + o += sprintf(buf + o, "%d: 0x%08x\n", + i, nand->bbt_md->pages[i]); + + return o; + +} + +/** + * show_device_cycle_in_ns() - Shows the device's cycle in ns. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_cycle_in_ns(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + return sprintf(buf, "%u\n", get_cycle_in_ns(this)); +} + +/** + * store_device_cycle_in_ns() - Sets the device's cycle in ns. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_cycle_in_ns(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + int error; + unsigned long new_cycle_in_ns; + struct imx_nfc_data *this = dev_get_drvdata(dev); + + /* Look for nonsense. */ + + if (!size) + return -EINVAL; + + /* Try to understand the new cycle period. */ + + if (strict_strtoul(buf, 0, &new_cycle_in_ns)) + return -EINVAL; + + /* Try to implement the new cycle period. */ + + error = this->nfc->set_closest_cycle(this, new_cycle_in_ns); + + if (error) + return -EINVAL; + + /* Return success. */ + + return size; + +} + +/** + * show_device_interrupt_override() - Shows the device's interrupt override. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_interrupt_override(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + switch (this->interrupt_override) { + + case NEVER: + return sprintf(buf, "-1\n"); + break; + + case DRIVER_CHOICE: + return sprintf(buf, "0\n"); + break; + + case ALWAYS: + return sprintf(buf, "1\n"); + break; + + default: + return sprintf(buf, "?\n"); + break; + + } + +} + +/** + * store_device_interrupt_override() - Sets the device's interrupt override. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_interrupt_override(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + if (!strcmp(buf, "-1")) + this->interrupt_override = NEVER; + else if (!strcmp(buf, "0")) + this->interrupt_override = DRIVER_CHOICE; + else if (!strcmp(buf, "1")) + this->interrupt_override = ALWAYS; + else + return -EINVAL; + + return size; + +} + +/** + * show_device_auto_op_override() - Shows the device's automatic op override. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_auto_op_override(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + switch (this->auto_op_override) { + + case NEVER: + return sprintf(buf, "-1\n"); + break; + + case DRIVER_CHOICE: + return sprintf(buf, "0\n"); + break; + + case ALWAYS: + return sprintf(buf, "1\n"); + break; + + default: + return sprintf(buf, "?\n"); + break; + + } + +} + +/** + * store_device_auto_op_override() - Sets the device's automatic op override. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_auto_op_override(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + if (!strcmp(buf, "-1")) + this->auto_op_override = NEVER; + else if (!strcmp(buf, "0")) + this->auto_op_override = DRIVER_CHOICE; + else if (!strcmp(buf, "1")) + this->auto_op_override = ALWAYS; + else + return -EINVAL; + + return size; + +} + +/** + * show_device_inject_ecc_error() - Shows the device's error injection flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_device_inject_ecc_error(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", this->inject_ecc_error); + +} + +/** + * store_device_inject_ecc_error() - Sets the device's error injection flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_inject_ecc_error(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + unsigned long new_inject_ecc_error; + struct imx_nfc_data *this = dev_get_drvdata(dev); + + /* Look for nonsense. */ + + if (!size) + return -EINVAL; + + /* Try to understand the new cycle period. */ + + if (strict_strtol(buf, 0, &new_inject_ecc_error)) + return -EINVAL; + + /* Store the value. */ + + this->inject_ecc_error = new_inject_ecc_error; + + /* Return success. */ + + return size; + +} + +/** + * store_device_invalidate_page_cache() - Invalidates the device's page cache. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_device_invalidate_page_cache(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct imx_nfc_data *this = dev_get_drvdata(dev); + + /* Invalidate the page cache. */ + + this->nand.pagebuf = -1; + + /* Return success. */ + + return size; + +} + +/* Device attributes that appear in sysfs. */ + +static DEVICE_ATTR(platform_info , 0444, show_device_platform_info , 0); +static DEVICE_ATTR(physical_geometry, 0444, show_device_physical_geometry, 0); +static DEVICE_ATTR(nfc_info , 0444, show_device_nfc_info , 0); +static DEVICE_ATTR(nfc_geometry , 0444, show_device_nfc_geometry , 0); +static DEVICE_ATTR(logical_geometry , 0444, show_device_logical_geometry , 0); +static DEVICE_ATTR(mtd_nand_info , 0444, show_device_mtd_nand_info , 0); +static DEVICE_ATTR(mtd_info , 0444, show_device_mtd_info , 0); +static DEVICE_ATTR(bbt_pages , 0444, show_device_bbt_pages , 0); + +static DEVICE_ATTR(cycle_in_ns, 0644, + show_device_cycle_in_ns, store_device_cycle_in_ns); + +static DEVICE_ATTR(interrupt_override, 0644, + show_device_interrupt_override, store_device_interrupt_override); + +static DEVICE_ATTR(auto_op_override, 0644, + show_device_auto_op_override, store_device_auto_op_override); + +static DEVICE_ATTR(inject_ecc_error, 0644, + show_device_inject_ecc_error, store_device_inject_ecc_error); + +static DEVICE_ATTR(invalidate_page_cache, 0644, + 0, store_device_invalidate_page_cache); + +static struct device_attribute *device_attributes[] = { + &dev_attr_platform_info, + &dev_attr_physical_geometry, + &dev_attr_nfc_info, + &dev_attr_nfc_geometry, + &dev_attr_logical_geometry, + &dev_attr_mtd_nand_info, + &dev_attr_mtd_info, + &dev_attr_bbt_pages, + &dev_attr_cycle_in_ns, + &dev_attr_interrupt_override, + &dev_attr_auto_op_override, + &dev_attr_inject_ecc_error, + &dev_attr_invalidate_page_cache, +}; + +/** + * validate_the_platform() - Validates information about the platform. + * + * Note that this function doesn't validate the NFC version. That's done when + * the probing process attempts to configure for the specific hardware version. + * + * @pdev: A pointer to the platform device. + */ +static int validate_the_platform(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct imx_nfc_platform_data *pdata = pdev->dev.platform_data; + + /* Validate the clock name. */ + + if (!pdata->clock_name) { + dev_err(dev, "No clock name\n"); + return -ENXIO; + } + + /* Validate the partitions. */ + + if ((pdata->partitions && (!pdata->partition_count)) || + (!pdata->partitions && (pdata->partition_count))) { + dev_err(dev, "Bad partition data\n"); + return -ENXIO; + } + + /* Return success */ + + return 0; + +} + +/** + * set_up_the_nfc_hal() - Sets up for the specific NFC hardware HAL. + * + * @this: Per-device data. + */ +static int set_up_the_nfc_hal(struct imx_nfc_data *this) +{ + unsigned int i; + struct nfc_hal *p; + struct imx_nfc_platform_data *pdata = this->pdata; + + for (i = 0; i < ARRAY_SIZE(nfc_hals); i++) { + + p = nfc_hals[i]; + + /* + * Restrict to 3.2 until others are fully implemented. + * + * TODO: Remove this. + */ + + if ((p->major_version != 3) && (p->minor_version != 2)) + continue; + + if ((p->major_version == pdata->nfc_major_version) && + (p->minor_version == pdata->nfc_minor_version)) { + this->nfc = p; + return 0; + break; + } + + } + + dev_err(this->dev, "Unkown NFC version %d.%d\n", + pdata->nfc_major_version, pdata->nfc_minor_version); + + return !0; + +} + +/** + * acquire_resources() - Tries to acquire resources. + * + * @this: Per-device data. + */ +static int acquire_resources(struct imx_nfc_data *this) +{ + + int error = 0; + struct platform_device *pdev = this->pdev; + struct device *dev = this->dev; + struct imx_nfc_platform_data *pdata = this->pdata; + struct resource *r; + + /* Find the buffers and map them. */ + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_BUFFERS_ADDR_RES_NAME); + + if (!r) { + dev_err(dev, "Can't get '%s'\n", IMX_NFC_BUFFERS_ADDR_RES_NAME); + error = -ENXIO; + goto exit_buffers; + } + + this->buffers = ioremap(r->start, r->end - r->start + 1); + + if (!this->buffers) { + dev_err(dev, "Can't remap buffers\n"); + error = -EIO; + goto exit_buffers; + } + + /* Find the primary registers and map them. */ + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME); + + if (!r) { + dev_err(dev, "Can't get '%s'\n", + IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME); + error = -ENXIO; + goto exit_primary_registers; + } + + this->primary_regs = ioremap(r->start, r->end - r->start + 1); + + if (!this->primary_regs) { + dev_err(dev, "Can't remap the primary registers\n"); + error = -EIO; + goto exit_primary_registers; + } + + /* Check for secondary registers. */ + + r = platform_get_resource_byname(pdev, IORESOURCE_MEM, + IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME); + + if (r && !this->nfc->has_secondary_regs) { + + dev_err(dev, "Resource '%s' should not be present\n", + IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME); + error = -ENXIO; + goto exit_secondary_registers; + + } + + if (this->nfc->has_secondary_regs) { + + if (!r) { + dev_err(dev, "Can't get '%s'\n", + IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME); + error = -ENXIO; + goto exit_secondary_registers; + } + + this->secondary_regs = ioremap(r->start, r->end - r->start + 1); + + if (!this->secondary_regs) { + dev_err(dev, + "Can't remap the secondary registers\n"); + error = -EIO; + goto exit_secondary_registers; + } + + } + + /* Find out what our interrupt is and try to own it. */ + + r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, + IMX_NFC_INTERRUPT_RES_NAME); + + if (!r) { + dev_err(dev, "Can't get '%s'\n", IMX_NFC_INTERRUPT_RES_NAME); + error = -ENXIO; + goto exit_irq; + } + + this->interrupt = r->start; + + error = request_irq(this->interrupt, + nfc_util_isr, 0, this->dev->bus_id, this); + + if (error) { + dev_err(dev, "Can't own interrupt %d\n", this->interrupt); + goto exit_irq; + } + + /* Find out the name of our clock and try to own it. */ + + this->clock = clk_get(dev, pdata->clock_name); + + if (this->clock == ERR_PTR(-ENOENT)) { + dev_err(dev, "Can't get clock '%s'\n", pdata->clock_name); + error = -ENXIO; + goto exit_clock; + } + + /* Return success. */ + + return 0; + + /* Error return paths begin here. */ + +exit_clock: + free_irq(this->interrupt, this); +exit_irq: + if (this->secondary_regs) + iounmap(this->secondary_regs); +exit_secondary_registers: + iounmap(this->primary_regs); +exit_primary_registers: + iounmap(this->buffers); +exit_buffers: + return error; + +} + +/** + * release_resources() - Releases resources. + * + * @this: Per-device data. + */ +static void release_resources(struct imx_nfc_data *this) +{ + + /* Release our clock. */ + + clk_disable(this->clock); + clk_put(this->clock); + + /* Release our interrupt. */ + + free_irq(this->interrupt, this); + + /* Release mapped memory. */ + + iounmap(this->buffers); + iounmap(this->primary_regs); + if (this->secondary_regs) + iounmap(this->secondary_regs); + +} + +/** + * register_with_mtd() - Registers this medium with MTD. + * + * @this: Per-device data. + */ +static int register_with_mtd(struct imx_nfc_data *this) +{ + int error = 0; + struct mtd_info *mtd = &this->mtd; + struct nand_chip *nand = &this->nand; + struct device *dev = this->dev; + struct imx_nfc_platform_data *pdata = this->pdata; + + /* Link the MTD structures together, along with our own data. */ + + mtd->priv = nand; + nand->priv = this; + + /* Prepare the MTD structure. */ + + mtd->owner = THIS_MODULE; + + /* + * Signal Control Functions + */ + + nand->cmd_ctrl = mil_cmd_ctrl; + + /* + * Chip Control Functions + * + * Not all of our NFC hardware versions expose Ready/Busy signals. For + * versions that don't, the is_ready function pointer will be NULL. In + * those cases, we leave the dev_ready member unassigned, which will + * cause the HIL to use a reference implementation's algorithm to + * discover when the hardware is ready. + */ + + nand->select_chip = mil_select_chip; + nand->cmdfunc = mil_cmdfunc; + nand->waitfunc = mil_waitfunc; + + if (this->nfc->is_ready) + nand->dev_ready = mil_dev_ready; + + /* + * Low-level I/O Functions + */ + + nand->read_byte = mil_read_byte; + nand->read_word = mil_read_word; + nand->read_buf = mil_read_buf; + nand->write_buf = mil_write_buf; + nand->verify_buf = mil_verify_buf; + + /* + * ECC Control Functions + */ + + nand->ecc.hwctl = mil_ecc_hwctl; + nand->ecc.calculate = mil_ecc_calculate; + nand->ecc.correct = mil_ecc_correct; + + /* + * ECC-Aware I/O Functions + */ + + nand->ecc.read_page = mil_ecc_read_page; + nand->ecc.read_page_raw = mil_ecc_read_page_raw; + nand->ecc.write_page = mil_ecc_write_page; + nand->ecc.write_page_raw = mil_ecc_write_page_raw; + + /* + * High-level I/O Functions + */ + + nand->write_page = mil_write_page; + nand->ecc.read_oob = mil_ecc_read_oob; + nand->ecc.write_oob = mil_ecc_write_oob; + + /* + * Bad Block Marking Functions + * + * We want to use the reference block_bad and block_markbad + * implementations, so we don't assign those members. + */ + + nand->scan_bbt = mil_scan_bbt; + + /* + * Error Recovery Functions + * + * We don't fill in the errstat function pointer because it's optional + * and we don't have a need for it. + */ + + /* + * Device Attributes + * + * We don't fill in the chip_delay member because we don't have a need + * for it. + * + * We support only 8-bit Flash bus width. + */ + + /* + * ECC Attributes + * + * Members that aren't set here are configured by a version-specific + * set_geometry() function. + */ + + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.size = NFC_MAIN_BUF_SIZE; + nand->ecc.prepad = 0; + nand->ecc.postpad = 0; + + /* + * Bad Block Management Attributes + * + * We don't fill in the following attributes: + * + * badblockpos + * bbt + * badblock_pattern + * bbt_erase_shift + * + * These attributes aren't hardware-specific, and the HIL makes fine + * choices without our help. + */ + + nand->options |= NAND_USE_FLASH_BBT; + nand->bbt_td = &bbt_main_descriptor; + nand->bbt_md = &bbt_mirror_descriptor; + + /* + * Device Control + * + * We don't fill in the controller attribute. In principle, we could set + * up a structure to represent the controller. However, since it's + * vanishingly improbable that we'll have more than one medium behind + * the controller, it's not worth the effort. We let the HIL handle it. + */ + + /* + * Memory-mapped I/O + * + * We don't fill in the following attributes: + * + * IO_ADDR_R + * IO_ADDR_W + * + * None of these are necessary because we don't have a memory-mapped + * implementation. + */ + + /* + * Install a "fake" ECC layout. + * + * We'll be calling nand_scan() to do the final MTD setup. If we haven't + * already chosen an ECC layout, then nand_scan() will choose one based + * on the part geometry it discovers. Unfortunately, it doesn't make + * good choices. It would be best if we could install the correct ECC + * layout now, before we call nand_scan(). We can't do that because we + * don't know the medium geometry yet. Here, we install a "fake" ECC + * layout just to stop nand_scan() from trying to pick on for itself. + * Later, in imx_nfc_scan_bbt(), when we know the medium geometry, we'll + * install the correct choice. + * + * Of course, this tactic depends critically on nand_scan() not using + * the fake layout before we can install a good one. This is in fact the + * case. + */ + + nand->ecc.layout = &nfc_geometry_512_16_RS_ECC1.mtd_layout; + + /* + * Ask the NAND Flash system to scan for chips. + * + * This will fill in reference implementations for all the members of + * the MTD structures that we didn't set, and will make the medium fully + * usable. + */ + + error = nand_scan(mtd, this->nfc->max_chip_count); + + if (error) { + dev_err(dev, "Chip scan failed\n"); + error = -ENXIO; + goto exit_scan; + } + + /* Register the MTD that represents the entire medium. */ + + mtd->name = "NAND Flash Medium"; + + add_mtd_device(mtd); + + /* Check if we're doing partitions and register MTD's accordingly. */ + + #ifdef CONFIG_MTD_PARTITIONS + + /* + * Look for partition information. If we find some, install + * them. Otherwise, use the partitions handed to us by the + * platform. + */ + + this->partition_count = + parse_mtd_partitions(mtd, partition_source_types, + &this->partitions, 0); + + if ((this->partition_count <= 0) && (pdata->partitions)) { + this->partition_count = pdata->partition_count; + this->partitions = pdata->partitions; + } + + if (this->partitions) + add_mtd_partitions(mtd, this->partitions, + this->partition_count); + + #endif + + /* Return success. */ + + return 0; + + /* Error return paths begin here. */ + +exit_scan: + return error; + +} + +/** + * unregister_with_mtd() - Unregisters this medium with MTD. + * + * @this: Per-device data. + */ +static void unregister_with_mtd(struct imx_nfc_data *this) +{ + + /* Get MTD to let go. */ + + nand_release(&this->mtd); + +} + +/** + * manage_sysfs_files() - Creates/removes sysfs files for this device. + * + * @this: Per-device data. + */ +static void manage_sysfs_files(struct imx_nfc_data *this, int create) +{ + int error; + unsigned int i; + struct device_attribute **attr; + + for (i = 0, attr = device_attributes; + i < ARRAY_SIZE(device_attributes); i++, attr++) { + + if (create) { + error = device_create_file(this->dev, *attr); + if (error) { + while (--attr >= device_attributes) + device_remove_file(this->dev, *attr); + return; + } + } else { + device_remove_file(this->dev, *attr); + } + + } + +} + +/** + * imx_nfc_probe() - Probes for a device and, if possible, takes ownership. + * + * @pdev: A pointer to the platform device. + */ +static int imx_nfc_probe(struct platform_device *pdev) +{ + int error = 0; + char *symmetric_clock; + struct clk *parent_clock; + unsigned long parent_clock_rate_in_hz; + unsigned long parent_clock_rate_in_mhz; + unsigned long nfc_clock_rate_in_hz; + unsigned long nfc_clock_rate_in_mhz; + unsigned long clock_divisor; + unsigned long cycle_in_ns; + struct device *dev = &pdev->dev; + struct imx_nfc_platform_data *pdata = pdev->dev.platform_data; + struct imx_nfc_data *this = 0; + + /* Say hello. */ + + dev_info(dev, "Probing...\n"); + + /* Check if we're enabled. */ + + if (!imx_nfc_module_enable) { + dev_info(dev, "Disabled\n"); + return -ENXIO; + } + + /* Validate the platform device data. */ + + error = validate_the_platform(pdev); + + if (error) + goto exit_validate_platform; + + /* Allocate memory for the per-device data. */ + + this = kzalloc(sizeof(*this), GFP_KERNEL); + + if (!this) { + dev_err(dev, "Failed to allocate per-device memory\n"); + error = -ENOMEM; + goto exit_allocate_this; + } + + /* Link our per-device data to the owning device. */ + + platform_set_drvdata(pdev, this); + + /* Fill in the convenience pointers in our per-device data. */ + + this->pdev = pdev; + this->dev = &pdev->dev; + this->pdata = pdata; + + /* Initialize the interrupt service pathway. */ + + init_completion(&this->done); + + /* Set up the NFC HAL. */ + + error = set_up_the_nfc_hal(this); + + if (error) + goto exit_set_up_nfc_hal; + + /* Attempt to acquire the resources we need. */ + + error = acquire_resources(this); + + if (error) + goto exit_acquire_resources; + + /* Initialize the NFC HAL. */ + + if (this->nfc->init(this)) { + error = -ENXIO; + goto exit_nfc_init; + } + + /* Tell the platform we're bringing this device up. */ + + if (pdata->init) + error = pdata->init(); + + if (error) + goto exit_platform_init; + + /* Report. */ + + parent_clock = clk_get_parent(this->clock); + parent_clock_rate_in_hz = clk_get_rate(parent_clock); + parent_clock_rate_in_mhz = parent_clock_rate_in_hz / 1000000; + nfc_clock_rate_in_hz = clk_get_rate(this->clock); + nfc_clock_rate_in_mhz = nfc_clock_rate_in_hz / 1000000; + + clock_divisor = parent_clock_rate_in_hz / nfc_clock_rate_in_hz; + symmetric_clock = this->nfc->get_symmetric(this) ? "Yes" : "No"; + cycle_in_ns = get_cycle_in_ns(this); + + dev_dbg(dev, "-------------\n"); + dev_dbg(dev, "Configuration\n"); + dev_dbg(dev, "-------------\n"); + dev_dbg(dev, "NFC Version : %d.%d\n" , this->nfc->major_version, + this->nfc->minor_version); + dev_dbg(dev, "Buffers : 0x%p\n" , this->buffers); + dev_dbg(dev, "Primary Regs : 0x%p\n" , this->primary_regs); + dev_dbg(dev, "Secondary Regs : 0x%p\n" , this->secondary_regs); + dev_dbg(dev, "Interrupt : %u\n" , this->interrupt); + dev_dbg(dev, "Clock Name : %s\n" , pdata->clock_name); + dev_dbg(dev, "Parent Clock Rate: %lu Hz (%lu MHz)\n", + parent_clock_rate_in_hz, + parent_clock_rate_in_mhz); + dev_dbg(dev, "Clock Divisor : %lu\n", clock_divisor); + dev_dbg(dev, "NFC Clock Rate : %lu Hz (%lu MHz)\n", + nfc_clock_rate_in_hz, + nfc_clock_rate_in_mhz); + dev_dbg(dev, "Symmetric Clock : %s\n" , symmetric_clock); + dev_dbg(dev, "Actual Cycle : %lu ns\n" , cycle_in_ns); + dev_dbg(dev, "Target Cycle : %u ns\n" , pdata->target_cycle_in_ns); + + /* Initialize the Medium Abstraction Layer. */ + + mal_init(this); + + /* Initialize the MTD Interface Layer. */ + + mil_init(this); + + /* Register this medium with MTD. */ + + error = register_with_mtd(this); + + if (error) + goto exit_mtd_registration; + + /* Create sysfs entries for this device. */ + + manage_sysfs_files(this, true); + + /* Return success. */ + + return 0; + + /* Error return paths begin here. */ + +exit_mtd_registration: + if (pdata->exit) + pdata->exit(); +exit_platform_init: + this->nfc->exit(this); +exit_nfc_init: +exit_acquire_resources: +exit_set_up_nfc_hal: + platform_set_drvdata(pdev, NULL); + kfree(this); +exit_allocate_this: +exit_validate_platform: + return error; + +} + +/** + * imx_nfc_remove() - Dissociates this driver from the given device. + * + * @pdev: A pointer to the device. + */ +static int __exit imx_nfc_remove(struct platform_device *pdev) +{ + struct imx_nfc_data *this = platform_get_drvdata(pdev); + + /* Remove sysfs entries for this device. */ + + manage_sysfs_files(this, false); + + /* Unregister with the NAND Flash MTD system. */ + + unregister_with_mtd(this); + + /* Tell the platform we're shutting down this device. */ + + if (this->pdata->exit) + this->pdata->exit(); + + /* Shut down the NFC. */ + + this->nfc->exit(this); + + /* Release our resources. */ + + release_resources(this); + + /* Unlink our per-device data from the platform device. */ + + platform_set_drvdata(pdev, NULL); + + /* Free our per-device data. */ + + kfree(this); + + /* Return success. */ + + return 0; +} + +#ifdef CONFIG_PM + +/** + * suspend() - Puts the NFC in a low power state. + * + * Refer to Documentation/driver-model/driver.txt for more information. + * + * @pdev: A pointer to the device. + * @state: The new power state. + */ + +static int imx_nfc_suspend(struct platform_device *pdev, pm_message_t state) +{ + int error = 0; + struct imx_nfc_data *this = platform_get_drvdata(pdev); + struct mtd_info *mtd = &this->mtd; + struct device *dev = &this->pdev->dev; + + dev_dbg(dev, "Suspending...\n"); + + /* Suspend MTD's use of this device. */ + + error = mtd->suspend(mtd); + + /* Suspend the actual hardware. */ + + clk_disable(this->clock); + + return error; + +} + +/** + * resume() - Brings the NFC back from a low power state. + * + * Refer to Documentation/driver-model/driver.txt for more information. + * + * @pdev: A pointer to the device. + */ +static int imx_nfc_resume(struct platform_device *pdev) +{ + struct imx_nfc_data *this = platform_get_drvdata(pdev); + struct mtd_info *mtd = &this->mtd; + struct device *dev = &this->pdev->dev; + + dev_dbg(dev, "Resuming...\n"); + + /* Resume MTD's use of this device. */ + + mtd->resume(mtd); + + return 0; + +} + +#else + +#define suspend NULL +#define resume NULL + +#endif /* CONFIG_PM */ + +/* + * This structure represents this driver to the platform management system. + */ +static struct platform_driver imx_nfc_driver = { + .driver = { + .name = IMX_NFC_DRIVER_NAME, + }, + .probe = imx_nfc_probe, + .remove = __exit_p(imx_nfc_remove), + .suspend = imx_nfc_suspend, + .resume = imx_nfc_resume, +}; + +/** + * imx_nfc_init() - Initializes this module. + */ +static int __init imx_nfc_init(void) +{ + + pr_info("i.MX NFC driver %s\n", DRIVER_VERSION); + + /* Register this driver with the platform management system. */ + + if (platform_driver_register(&imx_nfc_driver) != 0) { + pr_err("i.MX NFC driver registration failed\n"); + return -ENODEV; + } + + return 0; + +} + +/** + * imx_nfc_exit() - Deactivates this module. + */ +static void __exit imx_nfc_exit(void) +{ + pr_debug("i.MX NFC driver exiting...\n"); + platform_driver_unregister(&imx_nfc_driver); +} + +module_init(imx_nfc_init); +module_exit(imx_nfc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("i.MX NAND Flash Controller Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/mxc_nd2.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/mxc_nd2.c @@ -0,0 +1,1471 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_nd2.h" +#include "nand_device_info.h" + +#define DVR_VER "3.0" + +/* Global address Variables */ +static void __iomem *nfc_axi_base, *nfc_ip_base; + +struct mxc_mtd_s { + struct mtd_info mtd; + struct nand_chip nand; + struct mtd_partition *parts; + struct device *dev; +}; + +static struct mxc_mtd_s *mxc_nand_data; + +/* + * Define delay timeout value + */ +#define TROP_US_DELAY (1000 * 1000) + +struct nand_info { + bool bStatusRequest; + u16 colAddr; +}; + +static struct nand_info g_nandfc_info; + +#ifdef CONFIG_MTD_NAND_MXC_SWECC +static int hardware_ecc = 0; +#else +static int hardware_ecc = 1; +#endif + +static u8 num_of_interleave = 1; + +static u8 *data_buf; +static u8 *oob_buf; + +static int g_page_mask; + +static struct clk *nfc_clk; + +/* + * OOB placement block for use with hardware ecc generation + */ +static struct nand_ecclayout nand_hw_eccoob_512 = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{0, 4}} +}; + +static struct nand_ecclayout nand_hw_eccoob_2k = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{2, 4}} +}; + +static struct nand_ecclayout nand_hw_eccoob_4k = { + .eccbytes = 9, + .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, + .oobavail = 4, + .oobfree = {{2, 4}} +}; + +/*! + * @defgroup NAND_MTD NAND Flash MTD Driver for MXC processors + */ + +/*! + * @file mxc_nd2.c + * + * @brief This file contains the hardware specific layer for NAND Flash on + * MXC processor + * + * @ingroup NAND_MTD + */ + +#ifdef CONFIG_MTD_PARTITIONS +static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL }; +#endif + +static wait_queue_head_t irq_waitq; + +static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) +{ + /* Disable Interuupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) | NFC_INT_MSK, REG_NFC_INTRRUPT); + wake_up(&irq_waitq); + + return IRQ_HANDLED; +} + +static void nfc_memcpy(void *dest, void *src, int len) +{ + u8 *d = dest; + u8 *s = src; + + while (len > 0) { + if (len >= 4) { + *(u32 *)d = *(u32 *)s; + d += 4; + s += 4; + len -= 4; + } else { + *(u16 *)d = *(u16 *)s; + len -= 2; + break; + } + } + + if (len) + BUG(); +} + +/* + * Functions to transfer data to/from spare erea. + */ +static void +copy_spare(struct mtd_info *mtd, void *pbuf, void *pspare, int len, bool bfrom) +{ + u16 i, j; + u16 m = mtd->oobsize; + u16 n = mtd->writesize >> 9; + u8 *d = (u8 *) pbuf; + u8 *s = (u8 *) pspare; + u16 t = SPARE_LEN; + + m /= num_of_interleave; + n /= num_of_interleave; + + j = (m / n >> 1) << 1; + + if (bfrom) { + for (i = 0; i < n - 1; i++) + nfc_memcpy(&d[i * j], &s[i * t], j); + + /* the last section */ + nfc_memcpy(&d[i * j], &s[i * t], len - i * j); + } else { + for (i = 0; i < n - 1; i++) + nfc_memcpy(&s[i * t], &d[i * j], j); + + /* the last section */ + nfc_memcpy(&s[i * t], &d[i * j], len - i * j); + } +} + +/*! + * This function polls the NFC to wait for the basic operation to complete by + * checking the INT bit of config2 register. + * + * @param maxRetries number of retry attempts (separated by 1 us) + * @param useirq True if IRQ should be used rather than polling + */ +static void wait_op_done(int maxRetries, bool useirq) +{ + if (useirq) { + if ((raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT) == 0) { + /* enable interrupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) & ~NFC_INT_MSK, + REG_NFC_INTRRUPT); + if (!wait_event_timeout(irq_waitq, + (raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT), + msecs_to_jiffies(TROP_US_DELAY / 1000)) > 0) { + /* disable interrupt */ + raw_write(raw_read(REG_NFC_INTRRUPT) + | NFC_INT_MSK, REG_NFC_INTRRUPT); + + printk(KERN_WARNING "%s(%d): INT not set\n", + __func__, __LINE__); + return; + } + } + WRITE_NFC_IP_REG((raw_read(REG_NFC_OPS_STAT) & + ~NFC_OPS_STAT), REG_NFC_OPS_STAT); + } else { + while (1) { + maxRetries--; + if (raw_read(REG_NFC_OPS_STAT) & NFC_OPS_STAT) { + WRITE_NFC_IP_REG((raw_read(REG_NFC_OPS_STAT) & + ~NFC_OPS_STAT), + REG_NFC_OPS_STAT); + break; + } + udelay(1); + if (maxRetries <= 0) { + printk(KERN_WARNING "%s(%d): INT not set\n", + __func__, __LINE__); + break; + } + } + } +} + +static inline void send_atomic_cmd(u16 cmd, bool useirq) +{ + /* fill command */ + raw_write(cmd, REG_NFC_FLASH_CMD); + + /* send out command */ + raw_write(NFC_CMD, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, useirq); +} + +static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr); +static int mxc_check_ecc_status(struct mtd_info *mtd); + +#ifdef NFC_AUTO_MODE_ENABLE +/*! + * This function handle the interleave related work + * @param mtd mtd info + * @param cmd command + */ +static void auto_cmd_interleave(struct mtd_info *mtd, u16 cmd) +{ + u32 i, page_addr, ncs; + u32 j = num_of_interleave; + struct nand_chip *this = mtd->priv; + u32 addr_low = raw_read(NFC_FLASH_ADDR0); + u32 addr_high = raw_read(NFC_FLASH_ADDR8); + u8 *dbuf = data_buf; + u8 *obuf = oob_buf; + u32 dlen = mtd->writesize / j; + u32 olen = mtd->oobsize / j; + + /* adjust the addr value + * since ADD_OP mode is 01 + */ + if (cmd == NAND_CMD_ERASE2) + page_addr = addr_low; + else + page_addr = addr_low >> 16 | addr_high << 16; + + ncs = page_addr >> (this->chip_shift - this->page_shift); + + if (j > 1) { + page_addr *= j; + } else { + page_addr *= this->numchips; + page_addr += ncs; + } + + switch (cmd) { + case NAND_CMD_PAGEPROG: + for (i = 0; i < j; i++) { + /* reset addr cycle */ + mxc_do_addr_cycle(mtd, 0, page_addr++); + + /* data transfer */ + memcpy(MAIN_AREA0, dbuf, dlen); + copy_spare(mtd, obuf, SPARE_AREA0, olen, false); + + /* update the value */ + dbuf += dlen; + obuf += olen; + + NFC_SET_RBA(0); + raw_write(NFC_AUTO_PROG, REG_NFC_OPS); + + /* wait auto_prog_done bit set */ + while (!(raw_read(REG_NFC_OPS_STAT) & NFC_OP_DONE)) ; + } + + wait_op_done(TROP_US_DELAY, true); + while (!(raw_read(REG_NFC_OPS_STAT) & NFC_RB)) ; + + break; + case NAND_CMD_READSTART: + for (i = 0; i < j; i++) { + /* reset addr cycle */ + mxc_do_addr_cycle(mtd, 0, page_addr++); + + NFC_SET_RBA(0); + raw_write(NFC_AUTO_READ, REG_NFC_OPS); + wait_op_done(TROP_US_DELAY, true); + + /* check ecc error */ + mxc_check_ecc_status(mtd); + + /* data transfer */ + memcpy(dbuf, MAIN_AREA0, dlen); + copy_spare(mtd, obuf, SPARE_AREA0, olen, true); + + /* update the value */ + dbuf += dlen; + obuf += olen; + } + break; + case NAND_CMD_ERASE2: + for (i = 0; i < j; i++) { + mxc_do_addr_cycle(mtd, -1, page_addr++); + raw_write(NFC_AUTO_ERASE, REG_NFC_OPS); + wait_op_done(TROP_US_DELAY, true); + } + break; + case NAND_CMD_RESET: + for (i = 0; i < j; i++) { + if (j > 1) + NFC_SET_NFC_ACTIVE_CS(i); + send_atomic_cmd(cmd, false); + } + break; + default: + break; + } +} +#endif + +static void send_addr(u16 addr, bool useirq); + +/*! + * This function issues the specified command to the NAND device and + * waits for completion. + * + * @param cmd command for NAND Flash + * @param useirq True if IRQ should be used rather than polling + */ +static void send_cmd(struct mtd_info *mtd, u16 cmd, bool useirq) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(0x%x, %d)\n", cmd, useirq); + +#ifdef NFC_AUTO_MODE_ENABLE + switch (cmd) { + case NAND_CMD_READ0: + case NAND_CMD_READOOB: + raw_write(NAND_CMD_READ0, REG_NFC_FLASH_CMD); + break; + case NAND_CMD_SEQIN: + case NAND_CMD_ERASE1: + raw_write(cmd, REG_NFC_FLASH_CMD); + break; + case NAND_CMD_PAGEPROG: + case NAND_CMD_ERASE2: + case NAND_CMD_READSTART: + raw_write(raw_read(REG_NFC_FLASH_CMD) | cmd << NFC_CMD_1_SHIFT, + REG_NFC_FLASH_CMD); + auto_cmd_interleave(mtd, cmd); + break; + case NAND_CMD_READID: + send_atomic_cmd(cmd, useirq); + send_addr(0, false); + break; + case NAND_CMD_RESET: + auto_cmd_interleave(mtd, cmd); + break; + case NAND_CMD_STATUS: + send_atomic_cmd(cmd, useirq); + break; + default: + break; + } +#else + send_atomic_cmd(cmd, useirq); +#endif +} + +/*! + * This function sends an address (or partial address) to the + * NAND device. The address is used to select the source/destination for + * a NAND command. + * + * @param addr address to be written to NFC. + * @param useirq True if IRQ should be used rather than polling + */ +static void send_addr(u16 addr, bool useirq) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_addr(0x%x %d)\n", addr, useirq); + + /* fill address */ + raw_write((addr << NFC_FLASH_ADDR_SHIFT), REG_NFC_FLASH_ADDR); + + /* send out address */ + raw_write(NFC_ADDR, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, useirq); +} + +/*! + * This function requests the NFC to initate the transfer + * of data currently in the NFC RAM buffer to the NAND device. + * + * @param buf_id Specify Internal RAM Buffer number + */ +static void send_prog_page(u8 buf_id) +{ +#ifndef NFC_AUTO_MODE_ENABLE + DEBUG(MTD_DEBUG_LEVEL3, "%s\n", __FUNCTION__); + + /* set ram buffer id */ + NFC_SET_RBA(buf_id); + + /* transfer data from NFC ram to nand */ + raw_write(NFC_INPUT, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); +#endif +} + +/*! + * This function requests the NFC to initated the transfer + * of data from the NAND device into in the NFC ram buffer. + * + * @param buf_id Specify Internal RAM Buffer number + */ +static void send_read_page(u8 buf_id) +{ +#ifndef NFC_AUTO_MODE_ENABLE + DEBUG(MTD_DEBUG_LEVEL3, "%s(%d)\n", __FUNCTION__, buf_id); + + /* set ram buffer id */ + NFC_SET_RBA(buf_id); + + /* transfer data from nand to NFC ram */ + raw_write(NFC_OUTPUT, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); +#endif +} + +/*! + * This function requests the NFC to perform a read of the + * NAND device ID. + */ +static void send_read_id(void) +{ + /* Set RBA bits for BUFFER0 */ + NFC_SET_RBA(0); + + /* Read ID into main buffer */ + raw_write(NFC_ID, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, false); + +} + +#ifdef NFC_AUTO_MODE_ENABLE +static inline void read_dev_status(u16 *status) +{ + u32 mask = 0xFF << 16; + + /* use atomic mode to read status instead + of using auto mode,auto-mode has issues + and the status is not correct. + */ + raw_write(NFC_STATUS, REG_NFC_OPS); + + wait_op_done(TROP_US_DELAY, true); + + *status = (raw_read(NFC_CONFIG1) & mask) >> 16; + +} +#endif + +/*! + * This function requests the NFC to perform a read of the + * NAND device status and returns the current status. + * + * @return device status + */ +static u16 get_dev_status(void) +{ +#ifdef NFC_AUTO_MODE_ENABLE + int i; + u16 status = 0; + for (i = 0; i < num_of_interleave; i++) { + + /* set ative cs */ + NFC_SET_NFC_ACTIVE_CS(i); + + /* FIXME, NFC Auto erase may have + * problem, have to pollingit until + * the nand get idle, otherwise + * it may get error + */ + read_dev_status(&status); + if (status & NAND_STATUS_FAIL) + break; + } + + return status; +#else + volatile u16 *mainBuf = MAIN_AREA1; + u8 val = 1; + u16 ret; + + /* Set ram buffer id */ + NFC_SET_RBA(val); + + /* Read status into main buffer */ + raw_write(NFC_STATUS, REG_NFC_OPS); + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, true); + + /* Status is placed in first word of main buffer */ + /* get status, then recovery area 1 data */ + ret = *mainBuf; + + return ret; +#endif +} + +static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode) +{ + raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), REG_NFC_ECC_EN); + return; +} + +/* + * Function to record the ECC corrected/uncorrected errors resulted + * after a page read. This NFC detects and corrects upto to 4 symbols + * of 9-bits each. + */ +static int mxc_check_ecc_status(struct mtd_info *mtd) +{ + u32 ecc_stat, err; + int no_subpages = 1; + int ret = 0; + u8 ecc_bit_mask, err_limit; + + ecc_bit_mask = (IS_4BIT_ECC ? 0x7 : 0xf); + err_limit = (IS_4BIT_ECC ? 0x4 : 0x8); + + no_subpages = mtd->writesize >> 9; + + no_subpages /= num_of_interleave; + + ecc_stat = GET_NFC_ECC_STATUS(); + do { + err = ecc_stat & ecc_bit_mask; + if (err > err_limit) { + mtd->ecc_stats.failed++; + printk(KERN_WARNING "UnCorrectable RS-ECC Error\n"); + return -1; + } else { + ret += err; + } + ecc_stat >>= 4; + } while (--no_subpages); + + mtd->ecc_stats.corrected += ret; + pr_debug("%d Symbol Correctable RS-ECC Error\n", ret); + + return ret; +} + +/* + * Function to correct the detected errors. This NFC corrects all the errors + * detected. So this function just return 0. + */ +static int mxc_nand_correct_data(struct mtd_info *mtd, u_char * dat, + u_char * read_ecc, u_char * calc_ecc) +{ + return 0; +} + +/* + * Function to calculate the ECC for the data to be stored in the Nand device. + * This NFC has a hardware RS(511,503) ECC engine together with the RS ECC + * CONTROL blocks are responsible for detection and correction of up to + * 8 symbols of 9 bits each in 528 byte page. + * So this function is just return 0. + */ + +static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, + u_char * ecc_code) +{ + return 0; +} + +/*! + * This function id is used to read the data buffer from the NAND Flash. To + * read the data from NAND Flash first the data output cycle is initiated by + * the NFC, which copies the data to RAMbuffer. This data of length \b len is + * then copied to buffer \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be read from NAND Flash + * @param len number of bytes to be read + */ +static void mxc_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) +{ + u16 col = g_nandfc_info.colAddr; + + if (mtd->writesize) { + + int j = mtd->writesize - col; + int n = mtd->oobsize + j; + + n = min(n, len); + + if (j > 0) { + if (n > j) { + memcpy(buf, &data_buf[col], j); + memcpy(buf + j, &oob_buf[0], n - j); + } else { + memcpy(buf, &data_buf[col], n); + } + } else { + col -= mtd->writesize; + memcpy(buf, &oob_buf[col], len); + } + + /* update */ + g_nandfc_info.colAddr += n; + + } else { + /* At flash identify phase, + * mtd->writesize has not been + * set correctly, it should + * be zero.And len will less 2 + */ + memcpy(buf, &data_buf[col], len); + + /* update */ + g_nandfc_info.colAddr += len; + } + +} + +/*! + * This function reads byte from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static uint8_t mxc_nand_read_byte(struct mtd_info *mtd) +{ + uint8_t ret; + + /* Check for status request */ + if (g_nandfc_info.bStatusRequest) { + return (get_dev_status() & 0xFF); + } + + mxc_nand_read_buf(mtd, &ret, 1); + + return ret; +} + +/*! + * This function reads word from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u16 mxc_nand_read_word(struct mtd_info *mtd) +{ + u16 ret; + + mxc_nand_read_buf(mtd, (uint8_t *) &ret, sizeof(u16)); + + return ret; +} + +/*! + * This function reads byte from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u_char mxc_nand_read_byte16(struct mtd_info *mtd) +{ + /* Check for status request */ + if (g_nandfc_info.bStatusRequest) { + return (get_dev_status() & 0xFF); + } + + return mxc_nand_read_word(mtd) & 0xFF; +} + +/*! + * This function writes data of length \b len from buffer \b buf to the NAND + * internal RAM buffer's MAIN area 0. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be written to NAND Flash + * @param len number of bytes to be written + */ +static void mxc_nand_write_buf(struct mtd_info *mtd, + const u_char * buf, int len) +{ + u16 col = g_nandfc_info.colAddr; + int j = mtd->writesize - col; + int n = mtd->oobsize + j; + + n = min(n, len); + + if (j > 0) { + if (n > j) { + memcpy(&data_buf[col], buf, j); + memcpy(&oob_buf[0], buf + j, n - j); + } else { + memcpy(&data_buf[col], buf, n); + } + } else { + col -= mtd->writesize; + memcpy(&oob_buf[col], buf, len); + } + + /* update */ + g_nandfc_info.colAddr += n; +} + +/*! + * This function is used by the upper layer to verify the data in NAND Flash + * with the data in the \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be verified + * @param len length of the data to be verified + * + * @return -EFAULT if error else 0 + * + */ +static int mxc_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, + int len) +{ + u_char *s = data_buf; + + const u_char *p = buf; + + for (; len > 0; len--) { + if (*p++ != *s++) + return -EFAULT; + } + + return 0; +} + +/*! + * This function is used by upper layer for select and deselect of the NAND + * chip + * + * @param mtd MTD structure for the NAND Flash + * @param chip val indicating select or deselect + */ +static void mxc_nand_select_chip(struct mtd_info *mtd, int chip) +{ + + switch (chip) { + case -1: + /* Disable the NFC clock */ + clk_disable(nfc_clk); + break; + case 0 ... 7: + /* Enable the NFC clock */ + clk_enable(nfc_clk); + + NFC_SET_NFC_ACTIVE_CS(chip); + break; + + default: + break; + } +} + +/* + * Function to perform the address cycles. + */ +static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) +{ +#ifdef NFC_AUTO_MODE_ENABLE + + if (page_addr != -1 && column != -1) { + u32 mask = 0xFFFF; + /* the column address */ + raw_write(column & mask, NFC_FLASH_ADDR0); + raw_write((raw_read(NFC_FLASH_ADDR0) | + ((page_addr & mask) << 16)), NFC_FLASH_ADDR0); + /* the row address */ + raw_write(((raw_read(NFC_FLASH_ADDR8) & (mask << 16)) | + ((page_addr & (mask << 16)) >> 16)), + NFC_FLASH_ADDR8); + } else if (page_addr != -1) { + raw_write(page_addr, NFC_FLASH_ADDR0); + raw_write(0, NFC_FLASH_ADDR8); + } + + DEBUG(MTD_DEBUG_LEVEL3, + "AutoMode:the ADDR REGS value is (0x%x, 0x%x)\n", + raw_read(NFC_FLASH_ADDR0), raw_read(NFC_FLASH_ADDR8)); +#else + + u32 page_mask = g_page_mask; + + if (column != -1) { + send_addr(column & 0xFF, true); + if (IS_2K_PAGE_NAND) { + /* another col addr cycle for 2k page */ + send_addr((column >> 8) & 0xF, true); + } else if (IS_4K_PAGE_NAND) { + /* another col addr cycle for 4k page */ + send_addr((column >> 8) & 0x1F, true); + } + } + if (page_addr != -1) { + do { + send_addr((page_addr & 0xff), true); + page_mask >>= 8; + page_addr >>= 8; + } while (page_mask != 0); + } +#endif +} + +/*! + * This function is used by the upper layer to write command to NAND Flash for + * different operations to be carried out on NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * @param command command for NAND Flash + * @param column column offset for the page read + * @param page_addr page to be read from NAND Flash + */ +static void mxc_nand_command(struct mtd_info *mtd, unsigned command, + int column, int page_addr) +{ + bool useirq = true; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n", + command, column, page_addr); + /* + * Reset command state information + */ + g_nandfc_info.bStatusRequest = false; + + /* + * Command pre-processing step + */ + switch (command) { + case NAND_CMD_STATUS: + g_nandfc_info.colAddr = 0; + g_nandfc_info.bStatusRequest = true; + break; + + case NAND_CMD_READ0: + g_nandfc_info.colAddr = column; + break; + + case NAND_CMD_READOOB: + g_nandfc_info.colAddr = column; + command = NAND_CMD_READ0; + break; + + case NAND_CMD_SEQIN: + if (column != 0) { + + /* FIXME: before send SEQIN command for + * partial write,We need read one page out. + * FSL NFC does not support partial write + * It alway send out 512+ecc+512+ecc ... + * for large page nand flash. But for small + * page nand flash, it did support SPARE + * ONLY operation. But to make driver + * simple. We take the same as large page,read + * whole page out and update. As for MLC nand + * NOP(num of operation) = 1. Partial written + * on one programed page is not allowed! We + * can't limit it on the driver, it need the + * upper layer applicaiton take care it + */ + + mxc_nand_command(mtd, NAND_CMD_READ0, 0, page_addr); + } + + g_nandfc_info.colAddr = column; + column = 0; + + break; + + case NAND_CMD_PAGEPROG: +#ifndef NFC_AUTO_MODE_ENABLE + /* FIXME:the NFC interal buffer + * access has some limitation, it + * does not allow byte access. To + * make the code simple and ease use + * not every time check the address + * alignment.Use the temp buffer + * to accomadate the data.since We + * know data_buf will be at leat 4 + * byte alignment, so we can use + * memcpy safely + */ + nfc_memcpy(MAIN_AREA0, data_buf, mtd->writesize); + copy_spare(mtd, oob_buf, SPARE_AREA0, mtd->oobsize, false); +#endif + + if (IS_LARGE_PAGE_NAND) + PROG_PAGE(); + else + send_prog_page(0); + + break; + + case NAND_CMD_ERASE1: + break; + case NAND_CMD_ERASE2: + break; + } + + /* + * Write out the command to the device. + */ + send_cmd(mtd, command, useirq); + + mxc_do_addr_cycle(mtd, column, page_addr); + + /* + * Command post-processing step + */ + switch (command) { + + case NAND_CMD_READOOB: + case NAND_CMD_READ0: + if (IS_LARGE_PAGE_NAND) { + /* send read confirm command */ + send_cmd(mtd, NAND_CMD_READSTART, true); + /* read for each AREA */ + READ_PAGE(); + } else { + send_read_page(0); + } + +#ifndef NFC_AUTO_MODE_ENABLE + /* FIXME, the NFC interal buffer + * access has some limitation, it + * does not allow byte access. To + * make the code simple and ease use + * not every time check the address + * alignment.Use the temp buffer + * to accomadate the data.since We + * know data_buf will be at leat 4 + * byte alignment, so we can use + * memcpy safely + */ + nfc_memcpy(data_buf, MAIN_AREA0, mtd->writesize); + copy_spare(mtd, oob_buf, SPARE_AREA0, mtd->oobsize, true); +#endif + + break; + + case NAND_CMD_READID: + send_read_id(); + g_nandfc_info.colAddr = column; + nfc_memcpy(data_buf, MAIN_AREA0, 2048); + + break; + } +} + +static int mxc_nand_read_oob(struct mtd_info *mtd, + struct nand_chip *chip, int page, int sndcmd) +{ + if (sndcmd) { + + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + sndcmd = 0; + } + + memcpy(chip->oob_poi, oob_buf, mtd->oobsize); + + return sndcmd; +} + +static int mxc_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t * buf) +{ + +#ifndef NFC_AUTO_MODE_ENABLE + mxc_check_ecc_status(mtd); +#endif + + memcpy(buf, data_buf, mtd->writesize); + memcpy(chip->oob_poi, oob_buf, mtd->oobsize); + + return 0; +} + +static void mxc_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t * buf) +{ + memcpy(data_buf, buf, mtd->writesize); + memcpy(oob_buf, chip->oob_poi, mtd->oobsize); + +} + +/* Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr smallpage_memorybased = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = 5, + .len = 1, + .pattern = scan_ff_pattern +}; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern +}; + +/* Generic flash bbt decriptors +*/ +static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; +static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = bbt_pattern +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = mirror_pattern +}; + +static int mxc_nand_scan_bbt(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + + g_page_mask = this->pagemask; + + if (IS_2K_PAGE_NAND) { + NFC_SET_NFMS(1 << NFMS_NF_PG_SZ); + this->ecc.layout = &nand_hw_eccoob_2k; + } else if (IS_4K_PAGE_NAND) { + NFC_SET_NFMS(1 << NFMS_NF_PG_SZ); + this->ecc.layout = &nand_hw_eccoob_4k; + } else { + this->ecc.layout = &nand_hw_eccoob_512; + } + + /* propagate ecc.layout to mtd_info */ + mtd->ecclayout = this->ecc.layout; + + /* jffs2 not write oob */ + mtd->flags &= ~MTD_OOB_WRITEABLE; + + /* use flash based bbt */ + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + + /* update flash based bbt */ + this->options |= NAND_USE_FLASH_BBT; + + if (!this->badblock_pattern) { + this->badblock_pattern = (mtd->writesize > 512) ? + &largepage_memorybased : &smallpage_memorybased; + } + + /* Build bad block table */ + return nand_scan_bbt(mtd, this->badblock_pattern); +} + +static void mxc_nfc_init(void) +{ + /* Disable interrupt */ + raw_write((raw_read(REG_NFC_INTRRUPT) | NFC_INT_MSK), REG_NFC_INTRRUPT); + + /* disable spare enable */ + raw_write(raw_read(REG_NFC_SP_EN) & ~NFC_SP_EN, REG_NFC_SP_EN); + + /* Unlock the internal RAM Buffer */ + raw_write(NFC_SET_BLS(NFC_BLS_UNLCOKED), REG_NFC_BLS); + + /* Blocks to be unlocked */ + UNLOCK_ADDR(0x0, 0xFFFF); + + /* Unlock Block Command for given address range */ + raw_write(NFC_SET_WPC(NFC_WPC_UNLOCK), REG_NFC_WPC); + + /* Enable symetric mode by default except mx37TO1.0 */ + if (!(cpu_is_mx37_rev(CHIP_REV_1_0) == 1)) + raw_write(raw_read(REG_NFC_ONE_CYCLE) | + NFC_ONE_CYCLE, REG_NFC_ONE_CYCLE); +} + +static int mxc_alloc_buf(void) +{ + int err = 0; + + data_buf = kzalloc(NAND_MAX_PAGESIZE, GFP_KERNEL); + if (!data_buf) { + printk(KERN_ERR "%s: failed to allocate data_buf\n", __func__); + err = -ENOMEM; + goto out; + } + oob_buf = kzalloc(NAND_MAX_OOBSIZE, GFP_KERNEL); + if (!oob_buf) { + printk(KERN_ERR "%s: failed to allocate oob_buf\n", __func__); + err = -ENOMEM; + goto out; + } + + out: + return err; +} + +static void mxc_free_buf(void) +{ + kfree(data_buf); + kfree(oob_buf); +} + +int nand_scan_mid(struct mtd_info *mtd) +{ + int i; + uint8_t id_bytes[NAND_DEVICE_ID_BYTE_COUNT]; + struct nand_chip *this = mtd->priv; + struct nand_device_info *dev_info; + + if (!IS_LARGE_PAGE_NAND) + return 0; + + /* Read ID bytes from the first NAND Flash chip. */ + this->select_chip(mtd, 0); + + this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); + + for (i = 0; i < NAND_DEVICE_ID_BYTE_COUNT; i++) + id_bytes[i] = this->read_byte(mtd); + + /* Get information about this device, based on the ID bytes. */ + dev_info = nand_device_get_info(id_bytes); + + /* Check if we understand this device. */ + if (!dev_info) { + printk(KERN_ERR "Unrecognized NAND Flash device.\n"); + return !0; + } + + /* Correct mtd setting */ + this->chipsize = dev_info->chip_size_in_bytes; + mtd->size = dev_info->chip_size_in_bytes * this->numchips; + mtd->writesize = dev_info->page_total_size_in_bytes & ~0x3ff; + mtd->oobsize = dev_info->page_total_size_in_bytes & 0x3ff; + mtd->erasesize = dev_info->block_size_in_pages * mtd->writesize; + + /* limit to 2G size due to Kernel + * larger 4G space support,need fix + * it later + */ + if ((u32)mtd->size == 0) { + mtd->size = (u32)(1 << 31); + this->numchips = 1; + this->chipsize = mtd->size; + } + + /* Calculate the address shift from the page size */ + this->page_shift = ffs(mtd->writesize) - 1; + /* Convert chipsize to number of pages per chip -1. */ + this->pagemask = (this->chipsize >> this->page_shift) - 1; + + this->bbt_erase_shift = this->phys_erase_shift = + ffs(mtd->erasesize) - 1; + this->chip_shift = ffs(this->chipsize) - 1; + + return 0; +} + + +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and + * remove functions + * + * @return The function always returns 0. + */ +static int __init mxcnd_probe(struct platform_device *pdev) +{ + struct nand_chip *this; + struct mtd_info *mtd; + struct flash_platform_data *flash = pdev->dev.platform_data; + int nr_parts = 0, err = 0; + + nfc_axi_base = IO_ADDRESS(NFC_AXI_BASE_ADDR); + nfc_ip_base = IO_ADDRESS(NFC_BASE_ADDR); + + /* init the nfc */ + mxc_nfc_init(); + + /* init data buf */ + if (mxc_alloc_buf()) + goto out; + + /* Allocate memory for MTD device structure and private data */ + mxc_nand_data = kzalloc(sizeof(struct mxc_mtd_s), GFP_KERNEL); + if (!mxc_nand_data) { + printk(KERN_ERR "%s: failed to allocate mtd_info\n", + __FUNCTION__); + err = -ENOMEM; + goto out; + } + + memset((char *)&g_nandfc_info, 0, sizeof(g_nandfc_info)); + + mxc_nand_data->dev = &pdev->dev; + /* structures must be linked */ + this = &mxc_nand_data->nand; + mtd = &mxc_nand_data->mtd; + mtd->priv = this; + mtd->owner = THIS_MODULE; + + this->priv = mxc_nand_data; + this->cmdfunc = mxc_nand_command; + this->select_chip = mxc_nand_select_chip; + this->read_byte = mxc_nand_read_byte; + this->read_word = mxc_nand_read_word; + this->write_buf = mxc_nand_write_buf; + this->read_buf = mxc_nand_read_buf; + this->verify_buf = mxc_nand_verify_buf; + this->scan_bbt = mxc_nand_scan_bbt; + + /* NAND bus width determines access funtions used by upper layer */ + if (flash->width == 2) { + this->read_byte = mxc_nand_read_byte16; + this->options |= NAND_BUSWIDTH_16; + NFC_SET_NFMS(1 << NFMS_NF_DWIDTH); + } else { + NFC_SET_NFMS(0); + } + + nfc_clk = clk_get(&pdev->dev, "nfc_clk"); + clk_enable(nfc_clk); + + init_waitqueue_head(&irq_waitq); + err = request_irq(MXC_INT_NANDFC, mxc_nfc_irq, 0, "mxc_nd", NULL); + if (err) { + goto out_1; + } + + if (hardware_ecc) { + this->ecc.read_page = mxc_nand_read_page; + this->ecc.write_page = mxc_nand_write_page; + this->ecc.read_oob = mxc_nand_read_oob; + this->ecc.layout = &nand_hw_eccoob_512; + this->ecc.calculate = mxc_nand_calculate_ecc; + this->ecc.hwctl = mxc_nand_enable_hwecc; + this->ecc.correct = mxc_nand_correct_data; + this->ecc.mode = NAND_ECC_HW; + this->ecc.size = 512; + this->ecc.bytes = 9; + raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), + REG_NFC_ECC_EN); + } else { + this->ecc.mode = NAND_ECC_SOFT; + raw_write((raw_read(REG_NFC_ECC_EN) & ~NFC_ECC_EN), + REG_NFC_ECC_EN); + } + + /* config the gpio */ + if (flash->init) + flash->init(); + + /* Reset NAND */ + this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + + /* Scan to find existence of the device */ + if (nand_scan_ident(mtd, NFC_GET_MAXCHIP_SP()) + || nand_scan_mid(mtd) + || nand_scan_tail(mtd)) { + DEBUG(MTD_DEBUG_LEVEL0, + "MXC_ND2: Unable to find any NAND device.\n"); + err = -ENXIO; + goto out_1; + } + + /* Register the partitions */ +#ifdef CONFIG_MTD_PARTITIONS + nr_parts = + parse_mtd_partitions(mtd, part_probes, &mxc_nand_data->parts, 0); + if (nr_parts > 0) + add_mtd_partitions(mtd, mxc_nand_data->parts, nr_parts); + else if (flash->parts) + add_mtd_partitions(mtd, flash->parts, flash->nr_parts); + else +#endif + { + pr_info("Registering %s as whole device\n", mtd->name); + add_mtd_device(mtd); + } + + platform_set_drvdata(pdev, mtd); + + return 0; + + out_1: + kfree(mxc_nand_data); + out: + return err; + +} + + /*! + * Dissociates the driver from the device. + * + * @param pdev the device structure used to give information on which + * + * @return The function always returns 0. + */ + +static int __exit mxcnd_remove(struct platform_device *pdev) +{ + struct mtd_info *mtd = platform_get_drvdata(pdev); + struct flash_platform_data *flash = pdev->dev.platform_data; + + if (flash->exit) + flash->exit(); + + mxc_free_buf(); + + clk_disable(nfc_clk); + clk_put(nfc_clk); + platform_set_drvdata(pdev, NULL); + + if (mxc_nand_data) { + nand_release(mtd); + free_irq(MXC_INT_NANDFC, NULL); + kfree(mxc_nand_data); + } + + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function is called to put the NAND in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure + */ + +static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state) +{ + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND2 : NAND suspend\n"); + + /* Disable the NFC clock */ + clk_disable(nfc_clk); + + return 0; +} + +/*! + * This function is called to bring the NAND back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxcnd_resume(struct platform_device *pdev) +{ + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND2 : NAND resume\n"); + + /* Enable the NFC clock */ + clk_enable(nfc_clk); + + return 0; +} + +#else +#define mxcnd_suspend NULL +#define mxcnd_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcnd_driver = { + .driver = { + .name = "mxc_nandv2_flash", + }, + .probe = mxcnd_probe, + .remove = __exit_p(mxcnd_remove), + .suspend = mxcnd_suspend, + .resume = mxcnd_resume, +}; + +/*! + * Main initialization routine + * @return 0 if successful; non-zero otherwise + */ +static int __init mxc_nd_init(void) +{ + /* Register the device driver structure. */ + pr_info("MXC MTD nand Driver %s\n", DVR_VER); + if (platform_driver_register(&mxcnd_driver) != 0) { + printk(KERN_ERR "Driver register failed for mxcnd_driver\n"); + return -ENODEV; + } + return 0; +} + +/*! + * Clean up routine + */ +static void __exit mxc_nd_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&mxcnd_driver); +} + +module_init(mxc_nd_init); +module_exit(mxc_nd_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC NAND MTD driver Version 2-5"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/mxc_nd.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/mxc_nd.h @@ -0,0 +1,112 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_nd.h + * + * @brief This file contains the NAND Flash Controller register information. + * + * + * @ingroup NAND_MTD + */ + +#ifndef __MXC_ND_H__ +#define __MXC_ND_H__ + +#include + +/* + * Addresses for NFC registers + */ +#define NFC_BUF_SIZE (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE00))) +#define NFC_BUF_ADDR (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE04))) +#define NFC_FLASH_ADDR (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE06))) +#define NFC_FLASH_CMD (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE08))) +#define NFC_CONFIG (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE0A))) +#define NFC_ECC_STATUS_RESULT (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE0C))) +#define NFC_RSLTMAIN_AREA (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE0E))) +#define NFC_RSLTSPARE_AREA (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE10))) +#define NFC_WRPROT (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE12))) +#define NFC_UNLOCKSTART_BLKADDR (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE14))) +#define NFC_UNLOCKEND_BLKADDR (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE16))) +#define NFC_NF_WRPRST (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE18))) +#define NFC_CONFIG1 (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE1A))) +#define NFC_CONFIG2 (*((volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0xE1C))) + +/*! + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x000) +#define MAIN_AREA1 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x200) +#define MAIN_AREA2 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x400) +#define MAIN_AREA3 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x600) + +/*! + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#define SPARE_AREA0 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x800) +#define SPARE_AREA1 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x810) +#define SPARE_AREA2 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x820) +#define SPARE_AREA3 (volatile u16 *)IO_ADDRESS(NFC_BASE_ADDR + 0x830) + +/*! + * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command + * operation + */ +#define NFC_CMD 0x1 + +/*! + * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address + * operation + */ +#define NFC_ADDR 0x2 + +/*! + * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input + * operation + */ +#define NFC_INPUT 0x4 + +/*! + * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data Output + * operation + */ +#define NFC_OUTPUT 0x8 + +/*! + * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID + * operation + */ +#define NFC_ID 0x10 + +/*! + * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read Status + * operation + */ +#define NFC_STATUS 0x20 + +/*! + * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status + * operation + */ +#define NFC_INT 0x8000 + +#define NFC_SP_EN (1 << 2) +#define NFC_ECC_EN (1 << 3) +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_RST (1 << 6) +#define NFC_CE (1 << 7) +#define NFC_ONE_CYCLE (1 << 8) + +#endif /* MXCND_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/mxc_nd2.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/mxc_nd2.h @@ -0,0 +1,693 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_nd2.h + * + * @brief This file contains the NAND Flash Controller register information. + * + * + * @ingroup NAND_MTD + */ + +#ifndef __MXC_ND2_H__ +#define __MXC_ND2_H__ + +#include + +#define IS_2K_PAGE_NAND ((mtd->writesize / num_of_interleave) \ + == NAND_PAGESIZE_2KB) +#define IS_4K_PAGE_NAND ((mtd->writesize / num_of_interleave) \ + == NAND_PAGESIZE_4KB) +#define IS_LARGE_PAGE_NAND ((mtd->writesize / num_of_interleave) > 512) + +#define GET_NAND_OOB_SIZE (mtd->oobsize / num_of_interleave) + +#define NAND_PAGESIZE_2KB 2048 +#define NAND_PAGESIZE_4KB 4096 + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3 +/* + * For V3 NFC registers Definition + */ +/* AXI Bus Mapped */ +#define NFC_AXI_BASE_ADDR NFC_BASE_ADDR_AXI + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) /* mx37 */ +#define MXC_INT_NANDFC MXC_INT_EMI +#define NFC_FLASH_ADDR_CMD (nfc_axi_base + 0x1E00) +#define NFC_CONFIG1 (nfc_axi_base + 0x1E04) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0x1E08) +#define LAUNCH_NFC (nfc_axi_base + 0x1E0c) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x14) +#define NFC_IPC (nfc_ip_base + 0x18) +#elif defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define MXC_INT_NANDFC MXC_INT_NFC +#define NFC_AUTO_MODE_ENABLE +#define NFC_FLASH_CMD (nfc_axi_base + 0x1E00) +#define NFC_FLASH_ADDR0 (nfc_axi_base + 0x1E04) +#define NFC_FLASH_ADDR8 (nfc_axi_base + 0x1E24) +#define NFC_CONFIG1 (nfc_axi_base + 0x1E34) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0x1E38) +#define NFC_ECC_STATUS_SUM (nfc_axi_base + 0x1E3C) +#define LAUNCH_NFC (nfc_axi_base + 0x1E40) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x24) +#define NFC_CONFIG3 (nfc_ip_base + 0x28) +#define NFC_IPC (nfc_ip_base + 0x2C) +#define NFC_DELAY_LINE (nfc_ip_base + 0x34) +#else /* skye */ +#define NFC_FLASH_ADDR_CMD (nfc_axi_base + 0xE00) +#define NFC_CONFIG1 (nfc_axi_base + 0xE04) +#define NFC_ECC_STATUS_RESULT (nfc_axi_base + 0xE08) +#define LAUNCH_NFC (nfc_axi_base + 0xE0C) +#define NFC_WRPROT (nfc_ip_base + 0x00) +#define NFC_WRPROT_UNLOCK_BLK_ADD0 (nfc_ip_base + 0x04) +#define NFC_CONFIG2 (nfc_ip_base + 0x14) +#define NFC_IPC (nfc_ip_base + 0x18) +#endif +/*! + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 ((u16 *)(nfc_axi_base + 0x000)) +#define MAIN_AREA1 ((u16 *)(nfc_axi_base + 0x200)) + +/*! + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define SPARE_AREA0 ((u16 *)(nfc_axi_base + 0x1000)) +#define SPARE_LEN 64 +#define SPARE_COUNT 8 +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) +#else +#define SPARE_AREA0 ((u16 *)(nfc_axi_base + 0x800)) +#define SPARE_LEN 16 +#define SPARE_COUNT 4 +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) +#endif + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_SPAS_WIDTH 8 +#define NFC_SPAS_SHIFT 16 + +#define IS_4BIT_ECC \ +( \ + cpu_is_mx51_rev(CHIP_REV_2_0) > 0 ? \ + !((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) : \ + ((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) \ +) + +#define NFC_SET_SPAS(v) \ + raw_write((((raw_read(NFC_CONFIG2) & \ + NFC_FIELD_RESET(NFC_SPAS_WIDTH, NFC_SPAS_SHIFT)) | ((v) << 16))), \ + NFC_CONFIG2) + +#define NFC_SET_ECC_MODE(v) \ +do { \ + if (cpu_is_mx51_rev(CHIP_REV_2_0) > 0) { \ + if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ + raw_write(((raw_read(NFC_CONFIG2) & \ + NFC_ECC_MODE_MASK) | \ + NFC_ECC_MODE_4), NFC_CONFIG2); \ + else \ + raw_write(((raw_read(NFC_CONFIG2) & \ + NFC_ECC_MODE_MASK) & \ + NFC_ECC_MODE_8), NFC_CONFIG2); \ + } else { \ + if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ + raw_write(((raw_read(NFC_CONFIG2) & \ + NFC_ECC_MODE_MASK) & \ + NFC_ECC_MODE_8), NFC_CONFIG2); \ + else \ + raw_write(((raw_read(NFC_CONFIG2) & \ + NFC_ECC_MODE_MASK) | \ + NFC_ECC_MODE_4), NFC_CONFIG2); \ + } \ +} while (0) + +#define WRITE_NFC_IP_REG(val,reg) \ + do { \ + raw_write(raw_read(NFC_IPC) | NFC_IPC_CREQ, NFC_IPC); \ + while (!(raw_read(NFC_IPC) & NFC_IPC_ACK)) \ + ; \ + raw_write(val, reg); \ + raw_write(raw_read(NFC_IPC) & ~NFC_IPC_CREQ, NFC_IPC); \ + } while(0) + +#else +#define IS_4BIT_ECC 1 +#define NFC_SET_SPAS(v) +#define NFC_SET_ECC_MODE(v) +#define NFC_SET_NFMS(v) (NFMS |= (v)) + +#define WRITE_NFC_IP_REG(val,reg) \ + raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \ + REG_NFC_OPS_STAT) +#endif + +#define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); + +/*! + * Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for + * Specific operation + */ +#define NFC_CMD 0x1 +#define NFC_ADDR 0x2 +#define NFC_INPUT 0x4 +#define NFC_OUTPUT 0x8 +#define NFC_ID 0x10 +#define NFC_STATUS 0x20 + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_AUTO_PROG 0x40 +#define NFC_AUTO_READ 0x80 +#define NFC_AUTO_ERASE 0x200 +#define NFC_COPY_BACK_0 0x400 +#define NFC_COPY_BACK_1 0x800 +#define NFC_AUTO_STATE 0x1000 +#endif + +/* Bit Definitions for NFC_IPC*/ +#define NFC_OPS_STAT (1 << 31) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_OP_DONE (1 << 30) +#define NFC_RB (1 << 28) +#define NFC_PS_WIDTH 2 +#define NFC_PS_SHIFT 0 +#define NFC_PS_512 0 +#define NFC_PS_2K 1 +#define NFC_PS_4K 2 +#else +#define NFC_RB (1 << 29) +#endif + +#define NFC_ONE_CYCLE (1 << 2) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 /* mx51 */ +#define NFC_INT_MSK (1 << 15) +#define NFC_AUTO_PROG_DONE_MSK (1 << 14) +#define NFC_NUM_ADDR_PHASE1_WIDTH 2 +#define NFC_NUM_ADDR_PHASE1_SHIFT 12 + +#define NFC_NUM_ADDR_PHASE0_WIDTH 1 +#define NFC_NUM_ADDR_PHASE0_SHIFT 5 + +#define NFC_ONE_LESS_PHASE1 0 +#define NFC_TWO_LESS_PHASE1 1 + +#define NFC_FLASH_ADDR_SHIFT 0 +#else +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_FLASH_ADDR_SHIFT 16 +#endif + +#define NFC_UNLOCK_END_ADDR_SHIFT 16 + +/* Bit definition for NFC_CONFIGRATION_1 */ +#define NFC_SP_EN (1 << 0) +#define NFC_CE (1 << 1) +#define NFC_RST (1 << 2) +#define NFC_ECC_EN (1 << 3) + +#define NFC_FIELD_RESET(width, shift) ~(((1 << (width)) - 1) << (shift)) + +#define NFC_RBA_SHIFT 4 + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define NFC_RBA_WIDTH 3 +#else +#define NFC_RBA_WIDTH 2 +#endif + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) /* mx51 */ +#define NFC_ITERATION_SHIFT 8 +#define NFC_ITERATION_WIDTH 4 +#define NFC_ACTIVE_CS_SHIFT 12 +#define NFC_ACTIVE_CS_WIDTH 3 +/* bit definition for CONFIGRATION3 */ +#define NFC_NO_SDMA (1 << 20) +#define NFC_FMP_SHIFT 16 +#define NFC_FMP_WIDTH 4 +#define NFC_RBB_MODE (1 << 15) +#define NFC_NUM_OF_DEVICES_SHIFT 12 +#define NFC_NUM_OF_DEVICES_WIDTH 4 +#define NFC_DMA_MODE_SHIFT 11 +#define NFC_DMA_MODE_WIDTH 1 +#define NFC_SBB_SHIFT 8 +#define NFC_SBB_WIDTH 3 +#define NFC_BIG (1 << 7) +#define NFC_SB2R_SHIFT 4 +#define NFC_SB2R_WIDTH 3 +#define NFC_FW_SHIFT 3 +#define NFC_FW_WIDTH 1 +#define NFC_TOO (1 << 2) +#define NFC_ADD_OP_SHIFT 0 +#define NFC_ADD_OP_WIDTH 2 +#define NFC_FW_8 1 +#define NFC_FW_16 0 +#define NFC_ST_CMD_SHITF 24 +#define NFC_ST_CMD_WIDTH 8 +#endif + +#define NFC_PPB_32 (0 << 7) +#define NFC_PPB_64 (1 << 7) +#define NFC_PPB_128 (2 << 7) +#define NFC_PPB_256 (3 << 7) +#define NFC_PPB_RESET ~(3 << 7) + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_BLS_LOCKED (0 << 6) +#define NFC_BLS_LOCKED_DEFAULT (1 << 6) +#define NFC_BLS_UNLCOKED (2 << 6) +#define NFC_BLS_RESET (~(3 << 6)) +#else +#define NFC_BLS_LOCKED (0 << 16) +#define NFC_BLS_LOCKED_DEFAULT (1 << 16) +#define NFC_BLS_UNLCOKED (2 << 16) +#define NFC_BLS_RESET (~(3 << 16)) +#endif + +#define NFC_WPC_LOCK_TIGHT 1 +#define NFC_WPC_LOCK (1 << 1) +#define NFC_WPC_UNLOCK (1 << 2) +#define NFC_WPC_RESET ~(7) +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_1) || \ + defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_ECC_MODE_4 (1 << 6) +#define NFC_ECC_MODE_8 ~(1 << 6) +#define NFC_ECC_MODE_MASK ~(1 << 6) +#define NFC_SPAS_16 8 +#define NFC_SPAS_64 32 +#define NFC_SPAS_128 64 +#define NFC_SPAS_112 56 +#define NFC_SPAS_218 109 +#define NFC_IPC_CREQ (1 << 0) +#define NFC_IPC_ACK (1 << 1) +#endif + +#define REG_NFC_OPS_STAT NFC_IPC +#define REG_NFC_INTRRUPT NFC_CONFIG2 +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR0 +#define REG_NFC_FLASH_CMD NFC_FLASH_CMD +#else +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR_CMD +#define REG_NFC_FLASH_CMD NFC_FLASH_ADDR_CMD +#endif +#define REG_NFC_OPS LAUNCH_NFC +#define REG_NFC_SET_RBA NFC_CONFIG1 +#define REG_NFC_RB NFC_IPC +#define REG_NFC_ECC_EN NFC_CONFIG2 +#define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT +#define REG_NFC_CE NFC_CONFIG1 +#define REG_NFC_RST NFC_CONFIG1 +#define REG_NFC_PPB NFC_CONFIG2 +#define REG_NFC_SP_EN NFC_CONFIG1 +#define REG_NFC_BLS NFC_WRPROT +#define REG_UNLOCK_BLK_ADD0 NFC_WRPROT_UNLOCK_BLK_ADD0 +#define REG_UNLOCK_BLK_ADD1 NFC_WRPROT_UNLOCK_BLK_ADD1 +#define REG_UNLOCK_BLK_ADD2 NFC_WRPROT_UNLOCK_BLK_ADD2 +#define REG_UNLOCK_BLK_ADD3 NFC_WRPROT_UNLOCK_BLK_ADD3 +#define REG_NFC_WPC NFC_WRPROT +#define REG_NFC_ONE_CYCLE NFC_CONFIG2 + +/* NFC V3 Specific MACRO functions definitions */ +#define raw_write(v,a) __raw_writel(v,a) +#define raw_read(a) __raw_readl(a) + +/* Set RBA buffer id*/ +#define NFC_SET_RBA(val) \ + raw_write((raw_read(REG_NFC_SET_RBA) & \ + (NFC_FIELD_RESET(NFC_RBA_WIDTH, NFC_RBA_SHIFT))) | \ + ((val) << NFC_RBA_SHIFT), REG_NFC_SET_RBA); + +#define NFC_SET_PS(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_PS_WIDTH, NFC_PS_SHIFT))) | \ + ((val) << NFC_PS_SHIFT), NFC_CONFIG2); + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_2 +#define UNLOCK_ADDR(start_addr,end_addr) \ +{ \ + int i = 0; \ + for (; i < NAND_MAX_CHIPS; i++) \ + raw_write(start_addr | \ + (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), \ + REG_UNLOCK_BLK_ADD0 + (i << 2)); \ +} +#define NFC_SET_NFC_ACTIVE_CS(val) \ + raw_write((raw_read(NFC_CONFIG1) & \ + (NFC_FIELD_RESET(NFC_ACTIVE_CS_WIDTH, NFC_ACTIVE_CS_SHIFT))) | \ + ((val) << NFC_ACTIVE_CS_SHIFT), NFC_CONFIG1); + +#define NFC_GET_MAXCHIP_SP() 8 + +#else +#define UNLOCK_ADDR(start_addr,end_addr) \ + raw_write(start_addr | \ + (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), REG_UNLOCK_BLK_ADD0); + +#define NFC_SET_NFC_ACTIVE_CS(val) +#define NFC_GET_MAXCHIP_SP() 1 +#endif + +#define NFC_SET_BLS(val) ((raw_read(REG_NFC_BLS) & NFC_BLS_RESET) | val ) +#define NFC_SET_WPC(val) ((raw_read(REG_NFC_WPC) & NFC_WPC_RESET) | val ) +#define CHECK_NFC_RB raw_read(REG_NFC_RB) & NFC_RB + +#if defined(CONFIG_ARCH_MXC_HAS_NFC_V3_2) +#define NFC_SET_NFC_NUM_ADDR_PHASE1(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE1_WIDTH, \ + NFC_NUM_ADDR_PHASE1_SHIFT))) | \ + ((val) << NFC_NUM_ADDR_PHASE1_SHIFT), NFC_CONFIG2); + +#define NFC_SET_NFC_NUM_ADDR_PHASE0(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE0_WIDTH, \ + NFC_NUM_ADDR_PHASE0_SHIFT))) | \ + ((val) << NFC_NUM_ADDR_PHASE0_SHIFT), NFC_CONFIG2); + +#define NFC_SET_NFC_ITERATION(val) \ + raw_write((raw_read(NFC_CONFIG1) & \ + (NFC_FIELD_RESET(NFC_ITERATION_WIDTH, NFC_ITERATION_SHIFT))) | \ + ((val) << NFC_ITERATION_SHIFT), NFC_CONFIG1); + +#define NFC_SET_FW(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_FW_WIDTH, NFC_FW_SHIFT))) | \ + ((val) << NFC_FW_SHIFT), NFC_CONFIG3); + +#define NFC_SET_NUM_OF_DEVICE(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_NUM_OF_DEVICES_WIDTH, \ + NFC_NUM_OF_DEVICES_SHIFT))) | \ + ((val) << NFC_NUM_OF_DEVICES_SHIFT), NFC_CONFIG3); + +#define NFC_SET_ADD_OP_MODE(val) \ + raw_write((raw_read(NFC_CONFIG3) & \ + (NFC_FIELD_RESET(NFC_ADD_OP_WIDTH, NFC_ADD_OP_SHIFT))) | \ + ((val) << NFC_ADD_OP_SHIFT), NFC_CONFIG3); + +#define NFC_SET_ADD_CS_MODE(val) \ +{ \ + NFC_SET_ADD_OP_MODE(val); \ + NFC_SET_NUM_OF_DEVICE(this->numchips - 1); \ +} + +#define NFC_SET_ST_CMD(val) \ + raw_write((raw_read(NFC_CONFIG2) & \ + (NFC_FIELD_RESET(NFC_ST_CMD_WIDTH, \ + NFC_ST_CMD_SHITF))) | \ + ((val) << NFC_ST_CMD_SHITF), NFC_CONFIG2); + +#define NFMS_NF_DWIDTH 0 +#define NFMS_NF_PG_SZ 1 +#define NFC_CMD_1_SHIFT 8 + +#define NUM_OF_ADDR_CYCLE (fls(g_page_mask) >> 3) +#define SET_NFC_DELAY_LINE(val) raw_write((val), NFC_DELAY_LINE) + +/*should set the fw,ps,spas,ppb*/ +#define NFC_SET_NFMS(v) \ +do { \ + if (!(v)) \ + NFC_SET_FW(NFC_FW_8); \ + if (((v) & (1 << NFMS_NF_DWIDTH))) \ + NFC_SET_FW(NFC_FW_16); \ + if (((v) & (1 << NFMS_NF_PG_SZ))) { \ + if (IS_2K_PAGE_NAND) { \ + NFC_SET_PS(NFC_PS_2K); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \ + } else if (IS_4K_PAGE_NAND) { \ + NFC_SET_PS(NFC_PS_4K); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \ + } else { \ + NFC_SET_PS(NFC_PS_512); \ + NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE - 1); \ + NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_ONE_LESS_PHASE1); \ + } \ + NFC_SET_ADD_CS_MODE(1); \ + NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1); \ + NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \ + NFC_SET_ST_CMD(0x70); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \ + SET_NFC_DELAY_LINE(0); \ + } \ +} while (0) +#endif + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V3_1 +#define NFC_SET_NFMS(v) +#endif + +#define READ_PAGE() send_read_page(0) +#define PROG_PAGE() send_prog_page(0) + +#elif CONFIG_ARCH_MXC_HAS_NFC_V2 + +/* + * For V1/V2 NFC registers Definition + */ + +#define NFC_AXI_BASE_ADDR 0x00 +/* + * Addresses for NFC registers + */ +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_REG_BASE (nfc_ip_base + 0x1000) +#else +#define NFC_REG_BASE nfc_ip_base +#endif +#define NFC_BUF_SIZE (NFC_REG_BASE + 0xE00) +#define NFC_BUF_ADDR (NFC_REG_BASE + 0xE04) +#define NFC_FLASH_ADDR (NFC_REG_BASE + 0xE06) +#define NFC_FLASH_CMD (NFC_REG_BASE + 0xE08) +#define NFC_CONFIG (NFC_REG_BASE + 0xE0A) +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_ECC_STATUS_RESULT (NFC_REG_BASE + 0xE0C) +#define NFC_ECC_STATUS_RESULT_1 (NFC_REG_BASE + 0xE0C) +#define NFC_ECC_STATUS_RESULT_2 (NFC_REG_BASE + 0xE0E) +#define NFC_SPAS (NFC_REG_BASE + 0xE10) +#else +#define NFC_ECC_STATUS_RESULT (NFC_REG_BASE + 0xE0C) +#define NFC_RSLTMAIN_AREA (NFC_REG_BASE + 0xE0E) +#define NFC_RSLTSPARE_AREA (NFC_REG_BASE + 0xE10) +#endif +#define NFC_WRPROT (NFC_REG_BASE + 0xE12) +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_UNLOCKSTART_BLKADDR (NFC_REG_BASE + 0xE20) +#define NFC_UNLOCKEND_BLKADDR (NFC_REG_BASE + 0xE22) +#define NFC_UNLOCKSTART_BLKADDR1 (NFC_REG_BASE + 0xE24) +#define NFC_UNLOCKEND_BLKADDR1 (NFC_REG_BASE + 0xE26) +#define NFC_UNLOCKSTART_BLKADDR2 (NFC_REG_BASE + 0xE28) +#define NFC_UNLOCKEND_BLKADDR2 (NFC_REG_BASE + 0xE2A) +#define NFC_UNLOCKSTART_BLKADDR3 (NFC_REG_BASE + 0xE2C) +#define NFC_UNLOCKEND_BLKADDR3 (NFC_REG_BASE + 0xE2E) +#else +#define NFC_UNLOCKSTART_BLKADDR (NFC_REG_BASE + 0xE14) +#define NFC_UNLOCKEND_BLKADDR (NFC_REG_BASE + 0xE16) +#endif +#define NFC_NF_WRPRST (NFC_REG_BASE + 0xE18) +#define NFC_CONFIG1 (NFC_REG_BASE + 0xE1A) +#define NFC_CONFIG2 (NFC_REG_BASE + 0xE1C) + +/*! + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 (u16 *)(nfc_ip_base + 0x000) +#define MAIN_AREA1 (u16 *)(nfc_ip_base + 0x200) + +/*! + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define SPARE_AREA0 (u16 *)(nfc_ip_base + 0x1000) +#define SPARE_LEN 64 +#define SPARE_COUNT 8 +#else +#define SPARE_AREA0 (u16 *)(nfc_ip_base + 0x800) +#define SPARE_LEN 16 +#define SPARE_COUNT 4 +#endif +#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define REG_NFC_ECC_MODE NFC_CONFIG1 +#define SPAS_SHIFT (0) +#define REG_NFC_SPAS NFC_SPAS +#define SPAS_MASK (0xFF00) +#define IS_4BIT_ECC \ + ((raw_read(REG_NFC_ECC_MODE) & NFC_ECC_MODE_4) >> 0) + +#define NFC_SET_SPAS(v) \ + raw_write(((raw_read(REG_NFC_SPAS) & SPAS_MASK) | ((v<> 1); \ + } \ +} while (0) +#else +#define IS_4BIT_ECC (1) +#define NFC_SET_SPAS(v) +#define NFC_SET_ECC_MODE(v) +#define GET_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); +#define NFC_SET_NFMS(v) (NFMS |= (v)) +#endif + +#define WRITE_NFC_IP_REG(val,reg) \ + raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \ + REG_NFC_OPS_STAT) + +#define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT); + +/*! + * Set INT to 0, Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for + * Specific operation + */ +#define NFC_CMD 0x1 +#define NFC_ADDR 0x2 +#define NFC_INPUT 0x4 +#define NFC_OUTPUT 0x8 +#define NFC_ID 0x10 +#define NFC_STATUS 0x20 + +/* Bit Definitions */ +#define NFC_OPS_STAT (1 << 15) +#define NFC_SP_EN (1 << 2) +#define NFC_ECC_EN (1 << 3) +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_RST (1 << 6) +#define NFC_CE (1 << 7) +#define NFC_ONE_CYCLE (1 << 8) +#define NFC_BLS_LOCKED 0 +#define NFC_BLS_LOCKED_DEFAULT 1 +#define NFC_BLS_UNLCOKED 2 +#define NFC_WPC_LOCK_TIGHT 1 +#define NFC_WPC_LOCK (1 << 1) +#define NFC_WPC_UNLOCK (1 << 2) +#define NFC_FLASH_ADDR_SHIFT 0 +#define NFC_UNLOCK_END_ADDR_SHIFT 0 + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define NFC_ECC_MODE_4 (1<<0) +#define NFC_ECC_MODE_8 ~(1<<0) +#define NFC_SPAS_16 8 +#define NFC_SPAS_64 32 +#define NFC_SPAS_112 56 +#define NFC_SPAS_128 64 +#define NFC_SPAS_218 109 +#endif +/* NFC Register Mapping */ +#define REG_NFC_OPS_STAT NFC_CONFIG2 +#define REG_NFC_INTRRUPT NFC_CONFIG1 +#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR +#define REG_NFC_FLASH_CMD NFC_FLASH_CMD +#define REG_NFC_OPS NFC_CONFIG2 +#define REG_NFC_SET_RBA NFC_BUF_ADDR +#define REG_NFC_ECC_EN NFC_CONFIG1 +#define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT +#define REG_NFC_CE NFC_CONFIG1 +#define REG_NFC_SP_EN NFC_CONFIG1 +#define REG_NFC_BLS NFC_CONFIG +#define REG_NFC_WPC NFC_WRPROT +#define REG_START_BLKADDR NFC_UNLOCKSTART_BLKADDR +#define REG_END_BLKADDR NFC_UNLOCKEND_BLKADDR +#define REG_NFC_RST NFC_CONFIG1 +#define REG_NFC_ONE_CYCLE NFC_CONFIG1 + +/* NFC V1/V2 Specific MACRO functions definitions */ + +#define raw_write(v,a) __raw_writew(v,a) +#define raw_read(a) __raw_readw(a) + +#define NFC_SET_BLS(val) val + +#define UNLOCK_ADDR(start_addr,end_addr) \ +{ \ + raw_write(start_addr,REG_START_BLKADDR); \ + raw_write(end_addr,REG_END_BLKADDR); \ +} + +#define NFC_SET_NFC_ACTIVE_CS(val) +#define NFC_GET_MAXCHIP_SP() 1 +#define NFC_SET_WPC(val) val + +#define NFC_SET_RBA(val) raw_write(val, REG_NFC_SET_RBA); + +#ifdef CONFIG_ARCH_MXC_HAS_NFC_V2_1 +#define READ_PAGE() send_read_page(0) +#define PROG_PAGE() send_prog_page(0) +#else +#define READ_PAGE() \ +do { \ + send_read_page(0); \ + send_read_page(1); \ + send_read_page(2); \ + send_read_page(3); \ +} while (0) + +#define PROG_PAGE() \ +do { \ + send_prog_page(0); \ + send_prog_page(1); \ + send_prog_page(2); \ + send_prog_page(3); \ +} while (0) +#endif +#define CHECK_NFC_RB 1 + +#endif + +#endif /* __MXC_ND2_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/ndfc.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/ndfc.c @@ -102,8 +102,8 @@ wmb(); ecc = in_be32(ndfc->ndfcbase + NDFC_ECC); /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[2]; - ecc_code[1] = p[1]; + ecc_code[0] = p[1]; + ecc_code[1] = p[2]; ecc_code[2] = p[3]; return 0; --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/nand_device_info.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/nand_device_info.c @@ -0,0 +1,2297 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include + +#include "nand_device_info.h" + +/* + * Type 2 + */ +static struct nand_device_info nand_device_info_table_type_2[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND01GW3", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 25, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F1F08", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 20, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG0S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND02GW3", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 25, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UF082G2M, HY27UG082G2M, HY27UG082G1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F2G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F2G08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG1S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 10, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UH084G2M, HY27UG084G2M, HY27UH084G1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 25, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 25, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG2S3", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 30, + .data_hold_in_ns = 25, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UH088G2M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND08GW3BxANx", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08FABWG", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 30, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 32, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + {true} +}; + +/* + * Large MLC + */ +static struct nand_device_info nand_device_info_table_large_mlc[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG1D4BFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG3D4xFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 20, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 15, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG4D4xFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x45, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 35, + .data_hold_in_ns = 15, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 30, + .address_setup_in_ns = 0, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG2D4BFT00", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9G4G08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 45, + .data_hold_in_ns = 25, + .address_setup_in_ns = 50, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UT084G2M, HY27UU088G5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x20, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 40, + .data_hold_in_ns = 20, + .address_setup_in_ns = 30, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "NAND04GW3C2AN1E", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 15, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9G8G08U0M, K9HAG08U1M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 60, + .data_hold_in_ns = 30, + .address_setup_in_ns = 50, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UV08AG5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "Intel JS29F08G08AAMiB1 and Micron MT29F8G08MAA; " + "Intel JS29F08G08CAMiB1 and Micron MT29F16G08QAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 15, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9LAG08U0M K9HBG08U1M K9GAG08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "Intel JS29F32G08FAMiB1 and Micron MT29F32G08TAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 20, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F08G08AAMiB2, JS29F08G08CAMiB2", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F32G08FAMiB2", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "HY27UW08CGFM", + }, + {true} +}; + +/* + * Type 7 + */ +static struct nand_device_info nand_device_info_table_type_7[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F8G08FABWG", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F4G08AAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xdc, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 512LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F4G08", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 35, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9K8G08UXM, K9NBG08U5A, K9WAG08U1A", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9WAG08UXM", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xda, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 256LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F2G08U0A", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xf1, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 128LL*SZ_1M, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 2*SZ_1K + 64, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 12, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9F1F08", + }, + {true} +}; + +/* + * Type 8 + */ +static struct nand_device_info nand_device_info_table_type_8[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9GAG08U0M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9LBG08U0M (32Gb), K9HCG08U1M (64Gb), K9MDG08U5M (128Gb)", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 20, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 0, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "H27UAG, H27UBG", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 23, + .data_hold_in_ns = 20, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 0, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "H27UCG", + }, + {true} +}; + +/* + * Type 9 + */ +static struct nand_device_info nand_device_info_table_type_9[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG3D1DTG00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TC58NVG4D1DTG00", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 10, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "TH58NVG6D1DTG20", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JS29F16G08AAMC1, JS29F32G08CAMC1", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F16G08MAA, MT29F32G08QAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F64G08TAA (32Gb), MT29F32G08CBAAA (32Gb) MT29F64G08CFAAA (64Gb)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd9, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "MT29F128G08CJAAA", + }, + { + .end_of_table = false, + .manufacturer_code = 0x89, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "JSF64G08FAMC1", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9LBG08U0D", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 8, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9GAG08U0D, K9LBG08U1D, K9HCG08U5D", + }, + {true} +}; + +/* + * Type 10 + */ +static struct nand_device_info nand_device_info_table_type_10[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd3, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 1LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd5, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 25, + .data_hold_in_ns = 15, + .address_setup_in_ns = 30, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + "K9NCG08U5M", + }, + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_SLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 64, + .page_total_size_in_bytes = 4*SZ_1K + 128, + .ecc_strength_in_bits = 4, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 15, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, + NULL, + }, + {true} +}; + +/* + * Type 11 + */ +static struct nand_device_info nand_device_info_table_type_11[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 376, + .ecc_strength_in_bits = 14, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 8, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 25, + "TC58NVG5D2ELAM8 (4GB), TH58NVG6D2ELAM8 (8GB)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x98, + .device_code = 0xde, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 376, + .ecc_strength_in_bits = 14, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 8, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 25, + "TH58NVG7D2ELAM8", + }, + {true} +}; + +/* + * Type 15 + */ +static struct nand_device_info nand_device_info_table_type_15[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0xec, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 8*SZ_1K + 436, + .ecc_strength_in_bits = 16, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 20, + .data_hold_in_ns = 10, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 25, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "K9GBG08U0M (4GB, 1CE); K9LCG08U1M (8GB, 2CE); K9HDG08U5M (16GB, 4CE)", + }, + {true} +}; + +/* + * BCH ECC12 + */ +static struct nand_device_info nand_device_info_table_bch_ecc12[] __initdata = +{ + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "H27UBG8T2M (4GB, 1CE), H27UCG8UDM (8GB, 2CE), H27UDG8VEM (16GB, 4CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0xad, + .device_code = 0xde, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "H27UEG8YEM (32GB, 4CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd7, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 16, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F32G08CBAAA (4GB, 1CE), MT29F64G08CFAAA (8GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0xd9, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 128, + .page_total_size_in_bytes = 4*SZ_1K + 218, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 10, + .data_hold_in_ns = 10, + .address_setup_in_ns = 15, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 16, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F128G08CJAAA (16GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x48, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 2LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F16G08CBABA (2GB, 1CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x68, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 4LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F32G08CBABA (4GB, 1CE); " + "MT29F64G08CEABA (8GB, 2CE); " + "MT29F64G08CFABA (8GB, 2CE)", + }, + { + .end_of_table = false, + .manufacturer_code = 0x2c, + .device_code = 0x88, + .cell_technology = NAND_DEVICE_CELL_TECH_MLC, + .chip_size_in_bytes = 8LL*SZ_1G, + .block_size_in_pages = 256, + .page_total_size_in_bytes = 4*SZ_1K + 224, + .ecc_strength_in_bits = 12, + .ecc_size_in_bytes = 512, + .data_setup_in_ns = 15, + .data_hold_in_ns = 10, + .address_setup_in_ns = 20, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = 20, + .tRLOH_in_ns = 5, + .tRHOH_in_ns = 15, + "MT29F128G08CJABA (16GB, 2CE); " + "MT29F128G08CKABA (16GB, 2CE); " + "MT29F256G08CUABA (32GB, 4CE)", + }, + {true} +}; + +/* + * The following macros make it convenient to extract information from an ID + * byte array. All these macros begin with the prefix "ID_". + * + * Macros of the form: + * + * ID_GET_[_[_]] + * + * extract the given field from an ID byte array. Macros of the form: + * + * ID_[_[_]]_ + * + * contain the value for the given field that has the given meaning. + * + * If the appears, it means this macro represents a view of this + * field that is specific to the given manufacturer. + * + * If the appears, it means this macro represents a view of this + * field that the given manufacturer applies only under specific conditions. + * + * Here is a simple example: + * + * ID_PAGE_SIZE_CODE_2K + * + * This macro has the value of the "Page Size" field that indicates the page + * size is 2K. + * + * A more complicated example: + * + * ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K (0x2) + * + * This macro has the value of the "Page Size" field for Samsung parts that + * indicates the page size is 8K. However, this interpretation is only correct + * for devices that return 6 ID bytes. + */ + +/* Byte 1 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_1(id) ((id)[0]) + +#define ID_GET_MFR_CODE(id) ID_GET_BYTE_1(id) + +/* Byte 2 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_2(id) ((id)[1]) + +#define ID_GET_DEVICE_CODE(id) ID_GET_BYTE_2(id) + #define ID_SAMSUNG_DEVICE_CODE_1_GBIT (0xf1) + #define ID_SAMSUNG_DEVICE_CODE_2_GBIT (0xda) + #define ID_HYNIX_DEVICE_CODE_ECC12 (0xd7) + #define ID_HYNIX_DEVICE_CODE_ECC12_LARGE (0xde) + #define ID_MICRON_DEVICE_CODE_ECC12 (0xd7) /* ECC12 */ + #define ID_MICRON_DEVICE_CODE_ECC12_LARGE (0xd9) /* ECC12 8GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_2GB_PER_CE (0x48) /* L63B 2GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_4GB_PER_CE (0x68) /* L63B 4GB/CE */ + #define ID_MICRON_DEVICE_CODE_ECC12_8GB_PER_CE (0x88) /* L63B 8GB/CE */ + +/* Byte 3 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_3(id) ((id)[2]) + +#define ID_GET_DIE_COUNT_CODE(id) ((ID_GET_BYTE_3(id) >> 0) & 0x3) + +#define ID_GET_CELL_TYPE_CODE(id) ((ID_GET_BYTE_3(id) >> 2) & 0x3) + #define ID_CELL_TYPE_CODE_SLC (0x0) /* All others => MLC. */ + +#define ID_GET_SAMSUNG_SIMUL_PROG(id) ((ID_GET_BYTE_3(id) >> 4) & 0x3) + +#define ID_GET_MICRON_SIMUL_PROG(id) ((ID_GET_BYTE_3(id) >> 4) & 0x3) + +#define ID_GET_CACHE_PROGRAM(id) ((ID_GET_BYTE_3(id) >> 7) & 0x1) + +/* Byte 4 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_4(id) ((id)[3]) + #define ID_HYNIX_BYTE_4_ECC12_DEVICE (0x25) + +#define ID_GET_PAGE_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 0) & 0x3) + #define ID_PAGE_SIZE_CODE_1K (0x0) + #define ID_PAGE_SIZE_CODE_2K (0x1) + #define ID_PAGE_SIZE_CODE_4K (0x2) + #define ID_PAGE_SIZE_CODE_8K (0x3) + #define ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K (0x2) + +#define ID_GET_OOB_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 2) & 0x1) + +#define ID_GET_BLOCK_SIZE_CODE(id) ((ID_GET_BYTE_4(id) >> 4) & 0x3) + +/* Byte 5 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_5(id) ((id)[4]) + #define ID_MICRON_BYTE_5_ECC12 (0x84) + +#define ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) ((ID_GET_BYTE_5(id) >> 4) & 0x7) + #define ID_SAMSUNG_ECC_LEVEL_CODE_8 (0x03) + #define ID_SAMSUNG_ECC_LEVEL_CODE_24 (0x05) + +#define ID_GET_PLANE_COUNT_CODE(id) ((ID_GET_BYTE_5(id) >> 2) & 0x3) + +/* Byte 6 ------------------------------------------------------------------- */ + +#define ID_GET_BYTE_6(id) ((id)[5]) + #define ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_8K (0x54) + #define ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_4K (0x13) + +#define ID_GET_SAMSUNG_DEVICE_VERSION_CODE(id) ((ID_GET_BYTE_6(id)>>0) & 0x7) + #define ID_SAMSUNG_DEVICE_VERSION_CODE_40NM (0x01) + +/* -------------------------------------------------------------------------- */ + +void nand_device_print_info(struct nand_device_info *info) +{ + unsigned i; + const char *mfr_name; + const char *cell_technology_name; + uint64_t chip_size; + const char *chip_size_units; + unsigned page_data_size_in_bytes; + unsigned page_oob_size_in_bytes; + + /* Check for nonsense. */ + + if (!info) + return; + + /* Prepare the manufacturer name. */ + + mfr_name = "Unknown"; + + for (i = 0; nand_manuf_ids[i].id; i++) { + if (nand_manuf_ids[i].id == info->manufacturer_code) { + mfr_name = nand_manuf_ids[i].name; + break; + } + } + + /* Prepare the name of the cell technology. */ + + switch (info->cell_technology) { + case NAND_DEVICE_CELL_TECH_SLC: + cell_technology_name = "SLC"; + break; + case NAND_DEVICE_CELL_TECH_MLC: + cell_technology_name = "MLC"; + break; + default: + cell_technology_name = "Unknown"; + break; + } + + /* Prepare the chip size. */ + + if ((info->chip_size_in_bytes >= SZ_1G) && + !(info->chip_size_in_bytes % SZ_1G)) { + chip_size = info->chip_size_in_bytes / ((uint64_t) SZ_1G); + chip_size_units = "GiB"; + } else if ((info->chip_size_in_bytes >= SZ_1M) && + !(info->chip_size_in_bytes % SZ_1M)) { + chip_size = info->chip_size_in_bytes / ((uint64_t) SZ_1M); + chip_size_units = "MiB"; + } else { + chip_size = info->chip_size_in_bytes; + chip_size_units = "B"; + } + + /* Prepare the page geometry. */ + + page_data_size_in_bytes = (1<<(fls(info->page_total_size_in_bytes)-1)); + page_oob_size_in_bytes = info->page_total_size_in_bytes - + page_data_size_in_bytes; + + /* Print the information. */ + + printk(KERN_INFO "Manufacturer : %s (0x%02x)\n", mfr_name, + info->manufacturer_code); + printk(KERN_INFO "Device Code : 0x%02x\n", info->device_code); + printk(KERN_INFO "Cell Technology : %s\n", cell_technology_name); + printk(KERN_INFO "Chip Size : %llu %s\n", chip_size, + chip_size_units); + printk(KERN_INFO "Pages per Block : %u\n", + info->block_size_in_pages); + printk(KERN_INFO "Page Geometry : %u+%u\n", page_data_size_in_bytes, + page_oob_size_in_bytes); + printk(KERN_INFO "ECC Strength : %u bits\n", + info->ecc_strength_in_bits); + printk(KERN_INFO "ECC Size : %u B\n", info->ecc_size_in_bytes); + printk(KERN_INFO "Data Setup Time : %u ns\n", info->data_setup_in_ns); + printk(KERN_INFO "Data Hold Time : %u ns\n", info->data_hold_in_ns); + printk(KERN_INFO "Address Setup Time: %u ns\n", + info->address_setup_in_ns); + printk(KERN_INFO "GPMI Sample Delay : %u ns\n", + info->gpmi_sample_delay_in_ns); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tREA : %u ns\n", + info->tREA_in_ns); + else + printk(KERN_INFO "tREA : Unknown\n"); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tRLOH : %u ns\n", + info->tRLOH_in_ns); + else + printk(KERN_INFO "tRLOH : Unknown\n"); + if (info->tREA_in_ns >= 0) + printk(KERN_INFO "tRHOH : %u ns\n", + info->tRHOH_in_ns); + else + printk(KERN_INFO "tRHOH : Unknown\n"); + if (info->description) + printk(KERN_INFO "Description : %s\n", info->description); + else + printk(KERN_INFO "Description : \n"); + +} + +static struct nand_device_info *nand_device_info_search( + struct nand_device_info *table, uint8_t mfr_code, uint8_t device_code) +{ + + for (; !table->end_of_table; table++) { + if (table->manufacturer_code != mfr_code) + continue; + if (table->device_code != device_code) + continue; + return table; + } + + return 0; + +} + +static struct nand_device_info * __init nand_device_info_fn_toshiba(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + /* + * Look for 8K page Toshiba MLC devices. + * + * The page size field in byte 4 can't be used because the field was + * redefined in the 8K parts so the value meaning "8K page" is the same + * as the value meaning "4K page" on the 4K page devices. + * + * The only identifiable difference between the 4K and 8K page Toshiba + * devices with a device code of 0xd7 is the undocumented 6th ID byte. + * The 4K device returns a value of 0x13 and the 8K a value of 0x54. + * Toshiba has verified that this is an acceptable method to distinguish + * the two device families. + */ + + if (ID_GET_BYTE_6(id) == ID_TOSHIBA_BYTE_6_PAGE_SIZE_CODE_8K) { + /* Type 11 */ + table = nand_device_info_table_type_11; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_samsung(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an MLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) != ID_CELL_TYPE_CODE_SLC) { + + /* Is this a Samsung 8K Page MLC device with 16 bit ECC? */ + if ((ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) == + ID_SAMSUNG_ECC_LEVEL_CODE_24) && + (ID_GET_PAGE_SIZE_CODE(id) == + ID_SAMSUNG_6_BYTE_PAGE_SIZE_CODE_8K)) { + /* Type 15 */ + table = nand_device_info_table_type_15; + } + /* Is this a Samsung 42nm ECC8 device with a 6 byte ID? */ + else if ((ID_GET_SAMSUNG_ECC_LEVEL_CODE(id) == + ID_SAMSUNG_ECC_LEVEL_CODE_8) && + (ID_GET_SAMSUNG_DEVICE_VERSION_CODE(id) == + ID_SAMSUNG_DEVICE_VERSION_CODE_40NM)) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 8 */ + table = nand_device_info_table_type_8; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + } else { + + /* Check the page size first. */ + if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 10 */ + table = nand_device_info_table_type_10; + } + /* Check the chip size. */ + else if (ID_GET_DEVICE_CODE(id) == + ID_SAMSUNG_DEVICE_CODE_1_GBIT) { + if (!ID_GET_CACHE_PROGRAM(id)) { + /* + * 128 MiB Samsung chips without cache program + * are Type 7. + * + * The K9F1G08U0B does not support multi-plane + * program, so the if statement below cannot be + * used to identify it. + */ + table = nand_device_info_table_type_7; + + } else { + /* Smaller sizes are Type 2 by default. */ + table = nand_device_info_table_type_2; + } + } else { + /* Check number of simultaneously programmed pages. */ + if (ID_GET_SAMSUNG_SIMUL_PROG(id) && + ID_GET_PLANE_COUNT_CODE(id)) { + /* Type 7 */ + table = nand_device_info_table_type_7; + } else { + /* Type 2 */ + table = nand_device_info_table_type_2; + } + + } + + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_stmicro(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) + /* Type 2 */ + table = nand_device_info_table_type_2; + else + /* Large MLC */ + table = nand_device_info_table_large_mlc; + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_hynix(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + /* + * Check for ECC12 devices. + * + * We look at the 4th ID byte to distinguish some Hynix ECC12 devices + * from the similar ECC8 part. For example H27UBG8T2M (ECC12) 4th byte + * is 0x25, whereas H27UDG8WFM (ECC8) 4th byte is 0xB6. + */ + + if ((ID_GET_DEVICE_CODE(id) == ID_HYNIX_DEVICE_CODE_ECC12 && + ID_GET_BYTE_4(id) == ID_HYNIX_BYTE_4_ECC12_DEVICE) || + (ID_GET_DEVICE_CODE(id) == ID_HYNIX_DEVICE_CODE_ECC12_LARGE)) { + /* BCH ECC 12 */ + table = nand_device_info_table_bch_ecc12; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* + * So far, all other Samsung and Hynix 4K page devices are + * Type 8. + */ + table = nand_device_info_table_type_8; + } else + /* Large MLC */ + table = nand_device_info_table_large_mlc; + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_micron(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + + /* Check number of simultaneously programmed pages. */ + + if (ID_GET_MICRON_SIMUL_PROG(id)) { + /* Type 7 */ + table = nand_device_info_table_type_7; + } else { + /* Zero simultaneously programmed pages means Type 2. */ + table = nand_device_info_table_type_2; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + + } + + /* + * We look at the 5th ID byte to distinguish some Micron ECC12 NANDs + * from the similar ECC8 part. + * + * For example MT29F64G08CFAAA (ECC12) 5th byte is 0x84, whereas + * MT29F64G08TAA (ECC8) 5th byte is 0x78. + * + * We also have a special case for the Micron L63B family + * (256 page/block), which has unique device codes but no ID fields that + * can easily be used to distinguish the family. + */ + + if ((ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12 && + ID_GET_BYTE_5(id) == ID_MICRON_BYTE_5_ECC12) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_LARGE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_2GB_PER_CE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_4GB_PER_CE) || + (ID_GET_DEVICE_CODE(id) == ID_MICRON_DEVICE_CODE_ECC12_8GB_PER_CE)) { + /* BCH ECC 12 */ + table = nand_device_info_table_bch_ecc12; + } else if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Toshiba devices with 4K pages are Type 9. */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_sandisk(const uint8_t id[]) +{ + struct nand_device_info *table; + + if (ID_GET_CELL_TYPE_CODE(id) != ID_CELL_TYPE_CODE_SLC) { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } else { + /* Type 2 */ + table = nand_device_info_table_type_2; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +static struct nand_device_info * __init nand_device_info_fn_intel(const uint8_t id[]) +{ + struct nand_device_info *table; + + /* Check for an SLC device. */ + + if (ID_GET_CELL_TYPE_CODE(id) == ID_CELL_TYPE_CODE_SLC) { + /* Type 2 */ + return nand_device_info_search(nand_device_info_table_type_2, + ID_GET_MFR_CODE(id), ID_GET_DEVICE_CODE(id)); + } + + if (ID_GET_PAGE_SIZE_CODE(id) == ID_PAGE_SIZE_CODE_4K) { + /* Type 9 */ + table = nand_device_info_table_type_9; + } else { + /* Large MLC */ + table = nand_device_info_table_large_mlc; + } + + return nand_device_info_search(table, ID_GET_MFR_CODE(id), + ID_GET_DEVICE_CODE(id)); + +} + +/** + * struct nand_device_type_info - Information about a NAND Flash type. + * + * @name: A human-readable name for this type. + * @table: The device info table for this type. + */ + +struct nand_device_type_info { + struct nand_device_info *table; + const char *name; +}; + +/* + * A table that maps manufacturer IDs to device information tables. + */ + +static struct nand_device_type_info nand_device_type_directory[] __initdata = +{ + {nand_device_info_table_type_2, "Type 2" }, + {nand_device_info_table_large_mlc, "Large MLC"}, + {nand_device_info_table_type_7, "Type 7" }, + {nand_device_info_table_type_8, "Type 8" }, + {nand_device_info_table_type_9, "Type 9" }, + {nand_device_info_table_type_10, "Type 10" }, + {nand_device_info_table_type_11, "Type 11" }, + {nand_device_info_table_type_15, "Type 15" }, + {nand_device_info_table_bch_ecc12, "BCH ECC12"}, + {0, 0}, +}; + +/** + * struct nand_device_mfr_info - Information about a NAND Flash manufacturer. + * + * @id: The value of the first NAND Flash ID byte, which identifies the + * manufacturer. + * @fn: A pointer to a function to use for identifying devices from the + * given manufacturer. + */ + +struct nand_device_mfr_info { + uint8_t id; + struct nand_device_info *(*fn)(const uint8_t id[]); +}; + +/* + * A table that maps manufacturer IDs to device information tables. + */ + +static struct nand_device_mfr_info nand_device_mfr_directory[] __initdata = +{ + { + .id = NAND_MFR_TOSHIBA, + .fn = nand_device_info_fn_toshiba, + }, + { + .id = NAND_MFR_SAMSUNG, + .fn = nand_device_info_fn_samsung, + }, + { + .id = NAND_MFR_FUJITSU, + .fn = 0, + }, + { + .id = NAND_MFR_NATIONAL, + .fn = 0, + }, + { + .id = NAND_MFR_RENESAS, + .fn = 0, + }, + { + .id = NAND_MFR_STMICRO, + .fn = nand_device_info_fn_stmicro, + }, + { + .id = NAND_MFR_HYNIX, + .fn = nand_device_info_fn_hynix, + }, + { + .id = NAND_MFR_MICRON, + .fn = nand_device_info_fn_micron, + }, + { + .id = NAND_MFR_AMD, + .fn = 0, + }, + { + .id = NAND_MFR_SANDISK, + .fn = nand_device_info_fn_sandisk, + }, + { + .id = NAND_MFR_INTEL, + .fn = nand_device_info_fn_intel, + }, + {0, 0} +}; + +/** + * nand_device_info_test_table - Validate a device info table. + * + * This function runs tests on the given device info table to check that it + * meets the current assumptions. + */ + +static void __init nand_device_info_test_table( + struct nand_device_info *table, const char * name) +{ + unsigned i; + unsigned j; + uint8_t mfr_code; + uint8_t device_code; + + /* Loop over entries in this table. */ + + for (i = 0; !table[i].end_of_table; i++) { + + /* Get discriminating attributes of the current device. */ + + mfr_code = table[i].manufacturer_code; + device_code = table[i].device_code; + + /* Compare with the remaining devices in this table. */ + + for (j = i + 1; !table[j].end_of_table; j++) { + if ((mfr_code == table[j].manufacturer_code) && + (device_code == table[j].device_code)) + goto error; + } + + } + + return; + +error: + + printk(KERN_EMERG + "\n== NAND Flash device info table failed validity check ==\n"); + + printk(KERN_EMERG "\nDevice Info Table: %s\n", name); + printk(KERN_EMERG "\nTable Index %u\n", i); + nand_device_print_info(table + i); + printk(KERN_EMERG "\nTable Index %u\n", j); + nand_device_print_info(table + j); + printk(KERN_EMERG "\n"); + + BUG(); + +} + +/** + * nand_device_info_test_data - Test the NAND Flash device data. + */ + +static void __init nand_device_info_test_data(void) +{ + + unsigned i; + + for (i = 0; nand_device_type_directory[i].name; i++) { + nand_device_info_test_table( + nand_device_type_directory[i].table, + nand_device_type_directory[i].name); + } + +} + +struct nand_device_info * __init nand_device_get_info(const uint8_t id[]) +{ + unsigned i; + uint8_t mfr_id = ID_GET_MFR_CODE(id); + struct nand_device_info *(*fn)(const uint8_t id[]) = 0; + + /* Test the data. */ + + nand_device_info_test_data(); + + /* Look for information about this manufacturer. */ + + for (i = 0; nand_device_mfr_directory[i].id; i++) { + if (nand_device_mfr_directory[i].id == mfr_id) { + fn = nand_device_mfr_directory[i].fn; + break; + } + } + + if (!fn) + return 0; + + /* + * If control arrives here, we found both a table of device information, + * and a function we can use to identify the current device. Attempt to + * identify the device and return the result. + */ + + return fn(id); + +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/Makefile @@ -37,7 +37,12 @@ obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o +obj-$(CONFIG_MTD_NAND_IMX_NFC) += imx_nfc.o obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o +obj-$(CONFIG_MTD_NAND_MXC_V2) += mxc_nd2.o nand_device_info.o +obj-$(CONFIG_MTD_NAND_MXC_V3) += mxc_nd2.o nand_device_info.o +obj-$(CONFIG_MTD_NAND_GPMI) += gpmi/ nand_device_info.o +obj-$(CONFIG_MTD_NAND_GPMI_LBA) += lba/ obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/nand_ids.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/nand_ids.c @@ -109,6 +109,9 @@ {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, + /* 32 Gigabit ,only use 2G due to the linux mtd limitation*/ + {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 2048, 0, LP_OPTIONS}, + /* * Renesas AND 1 Gigabit. Those chips do not support extended id and * have a strange page/block layout ! The chosen minimum erasesize is @@ -140,6 +143,8 @@ {NAND_MFR_HYNIX, "Hynix"}, {NAND_MFR_MICRON, "Micron"}, {NAND_MFR_AMD, "AMD"}, + {NAND_MFR_SANDISK, "SanDisk"}, + {NAND_MFR_INTEL, "Intel"}, {0x0, "Unknown"} }; --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/nand_base.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/nand_base.c @@ -1090,7 +1090,7 @@ * * Internal function. Called with chip held. */ -static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, +int nand_do_read_ops(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) { int chipnr, page, realpage, col, bytes, aligned; @@ -1218,6 +1218,7 @@ return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; } +EXPORT_SYMBOL(nand_do_read_ops); /** * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc @@ -1800,7 +1801,7 @@ * * NAND write with ECC */ -static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, +int nand_do_write_ops(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { int chipnr, realpage, page, blockmask, column; @@ -1892,6 +1893,7 @@ ops->oobretlen = ops->ooblen; return ret; } +EXPORT_SYMBOL(nand_do_write_ops); /** * nand_write - [MTD Interface] NAND write with ECC @@ -2281,6 +2283,7 @@ /* Return more or less happy */ return ret; } +EXPORT_SYMBOL_GPL(nand_erase_nand); /** * nand_sync - [MTD Interface] sync @@ -2478,7 +2481,8 @@ mtd->writesize = 1024 << (extid & 0x3); extid >>= 2; /* Calc oobsize */ - mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); + mtd->oobsize = (*maf_id == 0x2c && dev_id == 0xd5) ? + 218 : (8 << (extid & 0x01)) * (mtd->writesize >> 9); extid >>= 2; /* Calc blocksize. Blocksize is multiples of 64KiB */ mtd->erasesize = (64 * 1024) << (extid & 0x03); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/mxc_nd.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/mxc_nd.c @@ -0,0 +1,1413 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_nd.h" + +#define DVR_VER "2.1" + +struct mxc_mtd_s { + struct mtd_info mtd; + struct nand_chip nand; + struct mtd_partition *parts; + struct device *dev; +}; + +static struct mxc_mtd_s *mxc_nand_data; + +/* + * Define delays in microsec for NAND device operations + */ +#define TROP_US_DELAY 2000 +/* + * Macros to get half word and bit positions of ECC + */ +#define COLPOS(x) ((x) >> 4) +#define BITPOS(x) ((x) & 0xf) + +/* Define single bit Error positions in Main & Spare area */ +#define MAIN_SINGLEBIT_ERROR 0x4 +#define SPARE_SINGLEBIT_ERROR 0x1 + +struct nand_info { + bool bSpareOnly; + bool bStatusRequest; + u16 colAddr; +}; + +static struct nand_info g_nandfc_info; + +#ifdef CONFIG_MTD_NAND_MXC_SWECC +static int hardware_ecc = 0; +#else +static int hardware_ecc = 1; +#endif + +#ifndef CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 +static int Ecc_disabled; +#endif + +static int is2k_Pagesize = 0; + +static struct clk *nfc_clk; + +/* + * OOB placement block for use with hardware ecc generation + */ +static struct nand_ecclayout nand_hw_eccoob_8 = { + .eccbytes = 5, + .eccpos = {6, 7, 8, 9, 10}, + .oobfree = {{0, 5}, {11, 5}} +}; + +static struct nand_ecclayout nand_hw_eccoob_16 = { + .eccbytes = 5, + .eccpos = {6, 7, 8, 9, 10}, + .oobfree = {{0, 6}, {12, 4}} +}; + +static struct nand_ecclayout nand_hw_eccoob_2k = { + .eccbytes = 20, + .eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26, + 38, 39, 40, 41, 42, 54, 55, 56, 57, 58}, + .oobfree = { + {.offset = 0, + .length = 5}, + + {.offset = 11, + .length = 10}, + + {.offset = 27, + .length = 10}, + + {.offset = 43, + .length = 10}, + + {.offset = 59, + .length = 5} + } +}; + +/*! + * @defgroup NAND_MTD NAND Flash MTD Driver for MXC processors + */ + +/*! + * @file mxc_nd.c + * + * @brief This file contains the hardware specific layer for NAND Flash on + * MXC processor + * + * @ingroup NAND_MTD + */ + +#ifdef CONFIG_MTD_PARTITIONS +static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL }; +#endif + +static wait_queue_head_t irq_waitq; + +static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) +{ + NFC_CONFIG1 |= NFC_INT_MSK; /* Disable interrupt */ + wake_up(&irq_waitq); + + return IRQ_RETVAL(1); +} + +/*! + * This function polls the NANDFC to wait for the basic operation to complete by + * checking the INT bit of config2 register. + * + * @param maxRetries number of retry attempts (separated by 1 us) + * @param param parameter for debug + * @param useirq True if IRQ should be used rather than polling + */ +static void wait_op_done(int maxRetries, u16 param, bool useirq) +{ + if (useirq) { + if ((NFC_CONFIG2 & NFC_INT) == 0) { + NFC_CONFIG1 &= ~NFC_INT_MSK; /* Enable interrupt */ + wait_event(irq_waitq, NFC_CONFIG2 & NFC_INT); + } + NFC_CONFIG2 &= ~NFC_INT; + } else { + while (maxRetries-- > 0) { + if (NFC_CONFIG2 & NFC_INT) { + NFC_CONFIG2 &= ~NFC_INT; + break; + } + udelay(1); + } + if (maxRetries <= 0) + DEBUG(MTD_DEBUG_LEVEL0, "%s(%d): INT not set\n", + __FUNCTION__, param); + } +} + +/*! + * This function issues the specified command to the NAND device and + * waits for completion. + * + * @param cmd command for NAND Flash + * @param useirq True if IRQ should be used rather than polling + */ +static void send_cmd(u16 cmd, bool useirq) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(0x%x, %d)\n", cmd, useirq); + + NFC_FLASH_CMD = (u16) cmd; + NFC_CONFIG2 = NFC_CMD; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, cmd, useirq); +} + +/*! + * This function sends an address (or partial address) to the + * NAND device. The address is used to select the source/destination for + * a NAND command. + * + * @param addr address to be written to NFC. + * @param islast True if this is the last address cycle for command + */ +static void send_addr(u16 addr, bool islast) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_addr(0x%x %d)\n", addr, islast); + + NFC_FLASH_ADDR = addr; + NFC_CONFIG2 = NFC_ADDR; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, addr, islast); +} + +/*! + * This function requests the NANDFC to initate the transfer + * of data currently in the NANDFC RAM buffer to the NAND device. + * + * @param buf_id Specify Internal RAM Buffer number (0-3) + * @param bSpareOnly set true if only the spare area is transferred + */ +static void send_prog_page(u8 buf_id, bool bSpareOnly) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_prog_page (%d)\n", bSpareOnly); + + /* NANDFC buffer 0 is used for page read/write */ + + NFC_BUF_ADDR = buf_id; + + /* Configure spare or page+spare access */ + if (!is2k_Pagesize) { + if (bSpareOnly) { + NFC_CONFIG1 |= NFC_SP_EN; + } else { + NFC_CONFIG1 &= ~(NFC_SP_EN); + } + } + NFC_CONFIG2 = NFC_INPUT; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, bSpareOnly, true); +} + +/*! + * This function will correct the single bit ECC error + * + * @param buf_id Specify Internal RAM Buffer number (0-3) + * @param eccpos Ecc byte and bit position + * @param bSpareOnly set to true if only spare area needs correction + */ + +static void mxc_nd_correct_error(u8 buf_id, u16 eccpos, bool bSpareOnly) +{ + u16 col; + u8 pos; + volatile u16 *buf; + + /* Get col & bit position of error + these macros works for both 8 & 16 bits */ + col = COLPOS(eccpos); /* Get half-word position */ + pos = BITPOS(eccpos); /* Get bit position */ + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nd_correct_error (col=%d pos=%d)\n", col, pos); + + /* Set the pointer for main / spare area */ + if (!bSpareOnly) { + buf = (volatile u16 *)(MAIN_AREA0 + col + (256 * buf_id)); + } else { + buf = (volatile u16 *)(SPARE_AREA0 + col + (8 * buf_id)); + } + + /* Fix the data */ + *buf ^= (1 << pos); +} + +/*! + * This function will maintains state of single bit Error + * in Main & spare area + * + * @param buf_id Specify Internal RAM Buffer number (0-3) + * @param spare set to true if only spare area needs correction + */ +static void mxc_nd_correct_ecc(u8 buf_id, bool spare) +{ +#ifdef CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 + static int lastErrMain = 0, lastErrSpare = 0; /* To maintain single bit + error in previous page */ +#endif + u16 value, ecc_status; + /* Read the ECC result */ + ecc_status = NFC_ECC_STATUS_RESULT; + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nd_correct_ecc (Ecc status=%x)\n", ecc_status); + +#ifdef CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 + /* Check for Error in Mainarea */ + if ((ecc_status & 0xC) == MAIN_SINGLEBIT_ERROR) { + /* Check for error in previous page */ + if (lastErrMain && !spare) { + value = NFC_RSLTMAIN_AREA; + /* Correct single bit error in Mainarea + NFC will not correct the error in + current page */ + mxc_nd_correct_error(buf_id, value, false); + } else { + /* Set if single bit error in current page */ + lastErrMain = 1; + } + } else { + /* Reset if no single bit error in current page */ + lastErrMain = 0; + } + + /* Check for Error in Sparearea */ + if ((ecc_status & 0x3) == SPARE_SINGLEBIT_ERROR) { + /* Check for error in previous page */ + if (lastErrSpare) { + value = NFC_RSLTSPARE_AREA; + /* Correct single bit error in Mainarea + NFC will not correct the error in + current page */ + mxc_nd_correct_error(buf_id, value, true); + } else { + /* Set if single bit error in current page */ + lastErrSpare = 1; + } + } else { + /* Reset if no single bit error in current page */ + lastErrSpare = 0; + } +#else + if (((ecc_status & 0xC) == MAIN_SINGLEBIT_ERROR) + || ((ecc_status & 0x3) == SPARE_SINGLEBIT_ERROR)) { + if (Ecc_disabled) { + if ((ecc_status & 0xC) == MAIN_SINGLEBIT_ERROR) { + value = NFC_RSLTMAIN_AREA; + /* Correct single bit error in Mainarea + NFC will not correct the error in + current page */ + mxc_nd_correct_error(buf_id, value, false); + } + if ((ecc_status & 0x3) == SPARE_SINGLEBIT_ERROR) { + value = NFC_RSLTSPARE_AREA; + /* Correct single bit error in Mainarea + NFC will not correct the error in + current page */ + mxc_nd_correct_error(buf_id, value, true); + } + + } else { + /* Disable ECC */ + NFC_CONFIG1 &= ~(NFC_ECC_EN); + Ecc_disabled = 1; + } + } else if (ecc_status == 0) { + if (Ecc_disabled) { + /* Enable ECC */ + NFC_CONFIG1 |= NFC_ECC_EN; + Ecc_disabled = 0; + } + } else { + /* 2-bit Error Do nothing */ + } +#endif /* CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 */ + +} + +/*! + * This function requests the NANDFC to initated the transfer + * of data from the NAND device into in the NANDFC ram buffer. + * + * @param buf_id Specify Internal RAM Buffer number (0-3) + * @param bSpareOnly set true if only the spare area is transferred + */ +static void send_read_page(u8 buf_id, bool bSpareOnly) +{ + DEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", bSpareOnly); + + /* NANDFC buffer 0 is used for page read/write */ + NFC_BUF_ADDR = buf_id; + + /* Configure spare or page+spare access */ + if (!is2k_Pagesize) { + if (bSpareOnly) { + NFC_CONFIG1 |= NFC_SP_EN; + } else { + NFC_CONFIG1 &= ~(NFC_SP_EN); + } + } + + NFC_CONFIG2 = NFC_OUTPUT; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, bSpareOnly, true); + + /* If there are single bit errors in + two consecutive page reads then + the error is not corrected by the + NFC for the second page. + Correct single bit error in driver */ + + mxc_nd_correct_ecc(buf_id, bSpareOnly); +} + +/*! + * This function requests the NANDFC to perform a read of the + * NAND device ID. + */ +static void send_read_id(void) +{ + struct nand_chip *this = &mxc_nand_data->nand; + + /* NANDFC buffer 0 is used for device ID output */ + NFC_BUF_ADDR = 0x0; + + /* Read ID into main buffer */ + NFC_CONFIG1 &= (~(NFC_SP_EN)); + NFC_CONFIG2 = NFC_ID; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, 0, true); + + if (this->options & NAND_BUSWIDTH_16) { + volatile u16 *mainBuf = MAIN_AREA0; + + /* + * Pack the every-other-byte result for 16-bit ID reads + * into every-byte as the generic code expects and various + * chips implement. + */ + + mainBuf[0] = (mainBuf[0] & 0xff) | ((mainBuf[1] & 0xff) << 8); + mainBuf[1] = (mainBuf[2] & 0xff) | ((mainBuf[3] & 0xff) << 8); + mainBuf[2] = (mainBuf[4] & 0xff) | ((mainBuf[5] & 0xff) << 8); + } +} + +/*! + * This function requests the NANDFC to perform a read of the + * NAND device status and returns the current status. + * + * @return device status + */ +static u16 get_dev_status(void) +{ + volatile u16 *mainBuf = MAIN_AREA1; + u32 store; + u16 ret; + /* Issue status request to NAND device */ + + /* store the main area1 first word, later do recovery */ + store = *((u32 *) mainBuf); + /* + * NANDFC buffer 1 is used for device status to prevent + * corruption of read/write buffer on status requests. + */ + NFC_BUF_ADDR = 1; + + /* Read status into main buffer */ + NFC_CONFIG1 &= (~(NFC_SP_EN)); + NFC_CONFIG2 = NFC_STATUS; + + /* Wait for operation to complete */ + wait_op_done(TROP_US_DELAY, 0, true); + + /* Status is placed in first word of main buffer */ + /* get status, then recovery area 1 data */ + ret = mainBuf[0]; + *((u32 *) mainBuf) = store; + + return ret; +} + +/*! + * This functions is used by upper layer to checks if device is ready + * + * @param mtd MTD structure for the NAND Flash + * + * @return 0 if device is busy else 1 + */ +static int mxc_nand_dev_ready(struct mtd_info *mtd) +{ + /* + * NFC handles R/B internally.Therefore,this function + * always returns status as ready. + */ + return 1; +} + +static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode) +{ + /* + * If HW ECC is enabled, we turn it on during init. There is + * no need to enable again here. + */ +} + +static int mxc_nand_correct_data(struct mtd_info *mtd, u_char * dat, + u_char * read_ecc, u_char * calc_ecc) +{ + /* + * 1-Bit errors are automatically corrected in HW. No need for + * additional correction. 2-Bit errors cannot be corrected by + * HW ECC, so we need to return failure + */ + u16 ecc_status = NFC_ECC_STATUS_RESULT; + + if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) { + DEBUG(MTD_DEBUG_LEVEL0, + "MXC_NAND: HWECC uncorrectable 2-bit ECC error\n"); + return -1; + } + + return 0; +} + +static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, + u_char * ecc_code) +{ + /* + * Just return success. HW ECC does not read/write the NFC spare + * buffer. Only the FLASH spare area contains the calcuated ECC. + */ + return 0; +} + +/*! + * This function reads byte from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u_char mxc_nand_read_byte(struct mtd_info *mtd) +{ + u_char retVal = 0; + u16 col, rdWord; + volatile u16 *mainBuf = MAIN_AREA0; + volatile u16 *spareBuf = SPARE_AREA0; + + /* Check for status request */ + if (g_nandfc_info.bStatusRequest) { + return (get_dev_status() & 0xFF); + } + + /* Get column for 16-bit access */ + col = g_nandfc_info.colAddr >> 1; + + /* If we are accessing the spare region */ + if (g_nandfc_info.bSpareOnly) { + rdWord = spareBuf[col]; + } else { + rdWord = mainBuf[col]; + } + + /* Pick upper/lower byte of word from RAM buffer */ + if (g_nandfc_info.colAddr & 0x1) { + retVal = (rdWord >> 8) & 0xFF; + } else { + retVal = rdWord & 0xFF; + } + + /* Update saved column address */ + g_nandfc_info.colAddr++; + + return retVal; +} + +/*! + * This function reads word from the NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * + * @return data read from the NAND Flash + */ +static u16 mxc_nand_read_word(struct mtd_info *mtd) +{ + u16 col; + u16 rdWord, retVal; + volatile u16 *p; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_read_word(col = %d)\n", g_nandfc_info.colAddr); + + col = g_nandfc_info.colAddr; + /* Adjust saved column address */ + if (col < mtd->writesize && g_nandfc_info.bSpareOnly) + col += mtd->writesize; + + if (col < mtd->writesize) + p = (MAIN_AREA0) + (col >> 1); + else + p = (SPARE_AREA0) + ((col - mtd->writesize) >> 1); + + if (col & 1) { + rdWord = *p; + retVal = (rdWord >> 8) & 0xff; + rdWord = *(p + 1); + retVal |= (rdWord << 8) & 0xff00; + + } else { + retVal = *p; + + } + + /* Update saved column address */ + g_nandfc_info.colAddr = col + 2; + + return retVal; +} + +/*! + * This function writes data of length \b len to buffer \b buf. The data to be + * written on NAND Flash is first copied to RAMbuffer. After the Data Input + * Operation by the NFC, the data is written to NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be written to NAND Flash + * @param len number of bytes to be written + */ +static void mxc_nand_write_buf(struct mtd_info *mtd, + const u_char * buf, int len) +{ + int n; + int col; + int i = 0; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_write_buf(col = %d, len = %d)\n", g_nandfc_info.colAddr, + len); + + col = g_nandfc_info.colAddr; + + /* Adjust saved column address */ + if (col < mtd->writesize && g_nandfc_info.bSpareOnly) + col += mtd->writesize; + + n = mtd->writesize + mtd->oobsize - col; + n = min(len, n); + + DEBUG(MTD_DEBUG_LEVEL3, + "%s:%d: col = %d, n = %d\n", __FUNCTION__, __LINE__, col, n); + + while (n) { + volatile u32 *p; + if (col < mtd->writesize) + p = (volatile u32 *)((ulong) (MAIN_AREA0) + (col & ~3)); + else + p = (volatile u32 *)((ulong) (SPARE_AREA0) - + mtd->writesize + (col & ~3)); + + DEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n", __FUNCTION__, + __LINE__, p); + + if (((col | (int)&buf[i]) & 3) || n < 16) { + u32 data = 0; + + if (col & 3 || n < 4) + data = *p; + + switch (col & 3) { + case 0: + if (n) { + data = (data & 0xffffff00) | + (buf[i++] << 0); + n--; + col++; + } + case 1: + if (n) { + data = (data & 0xffff00ff) | + (buf[i++] << 8); + n--; + col++; + } + case 2: + if (n) { + data = (data & 0xff00ffff) | + (buf[i++] << 16); + n--; + col++; + } + case 3: + if (n) { + data = (data & 0x00ffffff) | + (buf[i++] << 24); + n--; + col++; + } + } + + *p = data; + } else { + int m = mtd->writesize - col; + + if (col >= mtd->writesize) + m += mtd->oobsize; + + m = min(n, m) & ~3; + + DEBUG(MTD_DEBUG_LEVEL3, + "%s:%d: n = %d, m = %d, i = %d, col = %d\n", + __FUNCTION__, __LINE__, n, m, i, col); + + memcpy((void *)(p), &buf[i], m); + col += m; + i += m; + n -= m; + } + } + /* Update saved column address */ + g_nandfc_info.colAddr = col; + +} + +/*! + * This function id is used to read the data buffer from the NAND Flash. To + * read the data from NAND Flash first the data output cycle is initiated by + * the NFC, which copies the data to RAMbuffer. This data of length \b len is + * then copied to buffer \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be read from NAND Flash + * @param len number of bytes to be read + */ +static void mxc_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) +{ + + int n; + int col; + int i = 0; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_read_buf(col = %d, len = %d)\n", g_nandfc_info.colAddr, + len); + + col = g_nandfc_info.colAddr; + /* Adjust saved column address */ + if (col < mtd->writesize && g_nandfc_info.bSpareOnly) + col += mtd->writesize; + + n = mtd->writesize + mtd->oobsize - col; + n = min(len, n); + + while (n) { + volatile u32 *p; + + if (col < mtd->writesize) + p = (volatile u32 *)((ulong) (MAIN_AREA0) + (col & ~3)); + else + p = (volatile u32 *)((ulong) (SPARE_AREA0) - + mtd->writesize + (col & ~3)); + + if (((col | (int)&buf[i]) & 3) || n < 16) { + u32 data; + + data = *p; + switch (col & 3) { + case 0: + if (n) { + buf[i++] = (u8) (data); + n--; + col++; + } + case 1: + if (n) { + buf[i++] = (u8) (data >> 8); + n--; + col++; + } + case 2: + if (n) { + buf[i++] = (u8) (data >> 16); + n--; + col++; + } + case 3: + if (n) { + buf[i++] = (u8) (data >> 24); + n--; + col++; + } + } + } else { + int m = mtd->writesize - col; + + if (col >= mtd->writesize) + m += mtd->oobsize; + + m = min(n, m) & ~3; + memcpy(&buf[i], (void *)(p), m); + col += m; + i += m; + n -= m; + } + } + /* Update saved column address */ + g_nandfc_info.colAddr = col; + +} + +/*! + * This function is used by the upper layer to verify the data in NAND Flash + * with the data in the \b buf. + * + * @param mtd MTD structure for the NAND Flash + * @param buf data to be verified + * @param len length of the data to be verified + * + * @return -EFAULT if error else 0 + * + */ +static int +mxc_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, int len) +{ + return -EFAULT; +} + +/*! + * This function is used by upper layer for select and deselect of the NAND + * chip + * + * @param mtd MTD structure for the NAND Flash + * @param chip val indicating select or deselect + */ +static void mxc_nand_select_chip(struct mtd_info *mtd, int chip) +{ +#ifdef CONFIG_MTD_NAND_MXC_FORCE_CE + if (chip > 0) { + DEBUG(MTD_DEBUG_LEVEL0, + "ERROR: Illegal chip select (chip = %d)\n", chip); + return; + } + + if (chip == -1) { + NFC_CONFIG1 &= (~(NFC_CE)); + return; + } + + NFC_CONFIG1 |= NFC_CE; +#endif + + switch (chip) { + case -1: + /* Disable the NFC clock */ + clk_disable(nfc_clk); + break; + case 0: + /* Enable the NFC clock */ + clk_enable(nfc_clk); + break; + + default: + break; + } +} + +/*! + * This function is used by the upper layer to write command to NAND Flash for + * different operations to be carried out on NAND Flash + * + * @param mtd MTD structure for the NAND Flash + * @param command command for NAND Flash + * @param column column offset for the page read + * @param page_addr page to be read from NAND Flash + */ +static void mxc_nand_command(struct mtd_info *mtd, unsigned command, + int column, int page_addr) +{ + bool useirq = true; + + DEBUG(MTD_DEBUG_LEVEL3, + "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n", + command, column, page_addr); + + /* + * Reset command state information + */ + g_nandfc_info.bStatusRequest = false; + + /* Reset column address to 0 */ + g_nandfc_info.colAddr = 0; + + /* + * Command pre-processing step + */ + switch (command) { + + case NAND_CMD_STATUS: + g_nandfc_info.bStatusRequest = true; + break; + + case NAND_CMD_READ0: + g_nandfc_info.colAddr = column; + g_nandfc_info.bSpareOnly = false; + useirq = false; + break; + + case NAND_CMD_READOOB: + g_nandfc_info.colAddr = column; + g_nandfc_info.bSpareOnly = true; + useirq = false; + if (is2k_Pagesize) + command = NAND_CMD_READ0; /* only READ0 is valid */ + break; + + case NAND_CMD_SEQIN: + if (column >= mtd->writesize) { + if (is2k_Pagesize) { + /** + * FIXME: before send SEQIN command for write OOB, + * We must read one page out. + * For K9F1GXX has no READ1 command to set current HW + * pointer to spare area, we must write the whole page including OOB together. + */ + /* call itself to read a page */ + mxc_nand_command(mtd, NAND_CMD_READ0, 0, + page_addr); + } + g_nandfc_info.colAddr = column - mtd->writesize; + g_nandfc_info.bSpareOnly = true; + /* Set program pointer to spare region */ + if (!is2k_Pagesize) + send_cmd(NAND_CMD_READOOB, false); + } else { + g_nandfc_info.bSpareOnly = false; + g_nandfc_info.colAddr = column; + /* Set program pointer to page start */ + if (!is2k_Pagesize) + send_cmd(NAND_CMD_READ0, false); + } + useirq = false; + break; + + case NAND_CMD_PAGEPROG: +#ifndef CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 + if (Ecc_disabled) { + /* Enable Ecc for page writes */ + NFC_CONFIG1 |= NFC_ECC_EN; + } +#endif + + send_prog_page(0, g_nandfc_info.bSpareOnly); + + if (is2k_Pagesize) { + /* data in 4 areas datas */ + send_prog_page(1, g_nandfc_info.bSpareOnly); + send_prog_page(2, g_nandfc_info.bSpareOnly); + send_prog_page(3, g_nandfc_info.bSpareOnly); + } + + break; + + case NAND_CMD_ERASE1: + useirq = false; + break; + } + + /* + * Write out the command to the device. + */ + send_cmd(command, useirq); + + /* + * Write out column address, if necessary + */ + if (column != -1) { + /* + * MXC NANDFC can only perform full page+spare or + * spare-only read/write. When the upper layers + * layers perform a read/write buf operation, + * we will used the saved column adress to index into + * the full page. + */ + send_addr(0, page_addr == -1); + if (is2k_Pagesize) + /* another col addr cycle for 2k page */ + send_addr(0, false); + } + + /* + * Write out page address, if necessary + */ + if (page_addr != -1) { + send_addr((page_addr & 0xff), false); /* paddr_0 - p_addr_7 */ + + if (is2k_Pagesize) { + /* One more address cycle for higher density devices */ + if (mtd->size >= 0x10000000) { + /* paddr_8 - paddr_15 */ + send_addr((page_addr >> 8) & 0xff, false); + send_addr((page_addr >> 16) & 0xff, true); + } else + /* paddr_8 - paddr_15 */ + send_addr((page_addr >> 8) & 0xff, true); + } else { + /* One more address cycle for higher density devices */ + if (mtd->size >= 0x4000000) { + /* paddr_8 - paddr_15 */ + send_addr((page_addr >> 8) & 0xff, false); + send_addr((page_addr >> 16) & 0xff, true); + } else + /* paddr_8 - paddr_15 */ + send_addr((page_addr >> 8) & 0xff, true); + } + } + + /* + * Command post-processing step + */ + switch (command) { + + case NAND_CMD_RESET: + break; + + case NAND_CMD_READOOB: + case NAND_CMD_READ0: + if (is2k_Pagesize) { + /* send read confirm command */ + send_cmd(NAND_CMD_READSTART, true); + /* read for each AREA */ + send_read_page(0, g_nandfc_info.bSpareOnly); + send_read_page(1, g_nandfc_info.bSpareOnly); + send_read_page(2, g_nandfc_info.bSpareOnly); + send_read_page(3, g_nandfc_info.bSpareOnly); + } else { + send_read_page(0, g_nandfc_info.bSpareOnly); + } + break; + + case NAND_CMD_READID: + send_read_id(); + break; + + case NAND_CMD_PAGEPROG: +#ifndef CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 + if (Ecc_disabled) { + /* Disble Ecc after page writes */ + NFC_CONFIG1 &= ~(NFC_ECC_EN); + } +#endif + break; + + case NAND_CMD_STATUS: + break; + + case NAND_CMD_ERASE2: + break; + } +} + +/* Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr smallpage_memorybased = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = 5, + .len = 1, + .pattern = scan_ff_pattern +}; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern +}; + +/* Generic flash bbt decriptors +*/ +static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; +static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = bbt_pattern +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE + | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, + .offs = 0, + .len = 4, + .veroffs = 4, + .maxblocks = 4, + .pattern = mirror_pattern +}; + +static int mxc_nand_scan_bbt(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + + /* Config before scanning */ + /* Do not rely on NFMS_BIT, set/clear NFMS bit based on mtd->writesize */ + if (mtd->writesize == 2048) { + NFMS |= (1 << NFMS_BIT); + is2k_Pagesize = 1; + } else { + if ((NFMS >> NFMS_BIT) & 0x1) { /* This case strangly happened on MXC91321 P1.2.2 */ + printk(KERN_INFO + "Oops... NFMS Bit set for 512B Page, resetting it. [RCSR: 0x%08x]\n", + NFMS); + NFMS &= ~(1 << NFMS_BIT); + } + is2k_Pagesize = 0; + } + + if (is2k_Pagesize) + this->ecc.layout = &nand_hw_eccoob_2k; + + /* jffs2 not write oob */ + mtd->flags &= ~MTD_OOB_WRITEABLE; + + /* use flash based bbt */ + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + + /* update flash based bbt */ + this->options |= NAND_USE_FLASH_BBT; + + if (!this->badblock_pattern) { + if (mtd->writesize == 2048) + this->badblock_pattern = &smallpage_memorybased; + else + this->badblock_pattern = (mtd->writesize > 512) ? + &largepage_memorybased : &smallpage_memorybased; + } + /* Build bad block table */ + return nand_scan_bbt(mtd, this->badblock_pattern); +} + +#ifdef CONFIG_MXC_NAND_LOW_LEVEL_ERASE +static void mxc_low_erase(struct mtd_info *mtd) +{ + + struct nand_chip *this = mtd->priv; + unsigned int page_addr, addr; + u_char status; + + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : mxc_low_erase:Erasing NAND\n"); + for (addr = 0; addr < this->chipsize; addr += mtd->erasesize) { + page_addr = addr / mtd->writesize; + mxc_nand_command(mtd, NAND_CMD_ERASE1, -1, page_addr); + mxc_nand_command(mtd, NAND_CMD_ERASE2, -1, -1); + mxc_nand_command(mtd, NAND_CMD_STATUS, -1, -1); + status = mxc_nand_read_byte(mtd); + if (status & NAND_STATUS_FAIL) { + printk(KERN_ERR + "ERASE FAILED(block = %d,status = 0x%x)\n", + addr / mtd->erasesize, status); + } + } + +} +#endif +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and + * remove functions + * + * @return The function always returns 0. + */ +static int __init mxcnd_probe(struct platform_device *pdev) +{ + struct nand_chip *this; + struct mtd_info *mtd; + struct flash_platform_data *flash = pdev->dev.platform_data; + int nr_parts = 0; + + int err = 0; + /* Allocate memory for MTD device structure and private data */ + mxc_nand_data = kzalloc(sizeof(struct mxc_mtd_s), GFP_KERNEL); + if (!mxc_nand_data) { + printk(KERN_ERR "%s: failed to allocate mtd_info\n", + __FUNCTION__); + err = -ENOMEM; + goto out; + } + memset((char *)&g_nandfc_info, 0, sizeof(g_nandfc_info)); + + mxc_nand_data->dev = &pdev->dev; + /* structures must be linked */ + this = &mxc_nand_data->nand; + mtd = &mxc_nand_data->mtd; + mtd->priv = this; + mtd->owner = THIS_MODULE; + + /* 50 us command delay time */ + this->chip_delay = 5; + + this->priv = mxc_nand_data; + this->dev_ready = mxc_nand_dev_ready; + this->cmdfunc = mxc_nand_command; + this->select_chip = mxc_nand_select_chip; + this->read_byte = mxc_nand_read_byte; + this->read_word = mxc_nand_read_word; + this->write_buf = mxc_nand_write_buf; + this->read_buf = mxc_nand_read_buf; + this->verify_buf = mxc_nand_verify_buf; + this->scan_bbt = mxc_nand_scan_bbt; + + nfc_clk = clk_get(&pdev->dev, "nfc_clk"); + clk_enable(nfc_clk); + + NFC_CONFIG1 |= NFC_INT_MSK; + init_waitqueue_head(&irq_waitq); + err = request_irq(MXC_INT_NANDFC, mxc_nfc_irq, 0, "mxc_nd", NULL); + if (err) { + goto out_1; + } + + if (hardware_ecc) { + this->ecc.calculate = mxc_nand_calculate_ecc; + this->ecc.hwctl = mxc_nand_enable_hwecc; + this->ecc.correct = mxc_nand_correct_data; + this->ecc.mode = NAND_ECC_HW; + this->ecc.size = 512; + this->ecc.bytes = 3; + this->ecc.layout = &nand_hw_eccoob_8; + NFC_CONFIG1 |= NFC_ECC_EN; + } else { + this->ecc.mode = NAND_ECC_SOFT; + } + + /* Reset NAND */ + this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + + /* preset operation */ + /* Unlock the internal RAM Buffer */ + NFC_CONFIG = 0x2; + + /* Blocks to be unlocked */ + NFC_UNLOCKSTART_BLKADDR = 0x0; + NFC_UNLOCKEND_BLKADDR = 0x4000; + + /* Unlock Block Command for given address range */ + NFC_WRPROT = 0x4; + + /* NAND bus width determines access funtions used by upper layer */ + if (flash->width == 2) { + this->options |= NAND_BUSWIDTH_16; + this->ecc.layout = &nand_hw_eccoob_16; + } else { + this->options |= 0; + } + + is2k_Pagesize = 0; + + /* Scan to find existence of the device */ + if (nand_scan(mtd, 1)) { + DEBUG(MTD_DEBUG_LEVEL0, + "MXC_ND: Unable to find any NAND device.\n"); + err = -ENXIO; + goto out_1; + } + + /* Register the partitions */ +#ifdef CONFIG_MTD_PARTITIONS + nr_parts = + parse_mtd_partitions(mtd, part_probes, &mxc_nand_data->parts, 0); + if (nr_parts > 0) + add_mtd_partitions(mtd, mxc_nand_data->parts, nr_parts); + else if (flash->parts) + add_mtd_partitions(mtd, flash->parts, flash->nr_parts); + else +#endif + { + pr_info("Registering %s as whole device\n", mtd->name); + add_mtd_device(mtd); + } +#ifdef CONFIG_MXC_NAND_LOW_LEVEL_ERASE + /* Erase all the blocks of a NAND */ + mxc_low_erase(mtd); +#endif + + platform_set_drvdata(pdev, mtd); + return 0; + + out_1: + kfree(mxc_nand_data); + out: + return err; + +} + + /*! + * Dissociates the driver from the device. + * + * @param pdev the device structure used to give information on which + * + * @return The function always returns 0. + */ + +static int __exit mxcnd_remove(struct platform_device *pdev) +{ + struct mtd_info *mtd = platform_get_drvdata(pdev); + + clk_put(nfc_clk); + platform_set_drvdata(pdev, NULL); + + if (mxc_nand_data) { + nand_release(mtd); + free_irq(MXC_INT_NANDFC, NULL); + kfree(mxc_nand_data); + } + + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function is called to put the NAND in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure + */ + +static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct mtd_info *info = platform_get_drvdata(pdev); + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND suspend\n"); + if (info) + ret = info->suspend(info); + + /* Disable the NFC clock */ + clk_disable(nfc_clk); + + return ret; +} + +/*! + * This function is called to bring the NAND back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device information structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxcnd_resume(struct platform_device *pdev) +{ + struct mtd_info *info = platform_get_drvdata(pdev); + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND resume\n"); + /* Enable the NFC clock */ + clk_enable(nfc_clk); + + if (info) { + info->resume(info); + } + + return ret; +} + +#else +#define mxcnd_suspend NULL +#define mxcnd_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcnd_driver = { + .driver = { + .name = "mxc_nand_flash", + }, + .probe = mxcnd_probe, + .remove = __exit_p(mxcnd_remove), + .suspend = mxcnd_suspend, + .resume = mxcnd_resume, +}; + +/*! + * Main initialization routine + * @return 0 if successful; non-zero otherwise + */ +static int __init mxc_nd_init(void) +{ + /* Register the device driver structure. */ + pr_info("MXC MTD nand Driver %s\n", DVR_VER); + if (platform_driver_register(&mxcnd_driver) != 0) { + printk(KERN_ERR "Driver register failed for mxcnd_driver\n"); + return -ENODEV; + } + return 0; +} + +/*! + * Clean up routine + */ +static void __exit mxc_nd_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&mxcnd_driver); +} + +module_init(mxc_nd_init); +module_exit(mxc_nd_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC NAND MTD driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/nand_device_info.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/nand_device_info.h @@ -0,0 +1,140 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __DRIVERS_NAND_DEVICE_INFO_H +#define __DRIVERS_NAND_DEVICE_INFO_H + + /* + * The number of ID bytes to read from the NAND Flash device and hand over to + * the identification system. + */ + +#define NAND_DEVICE_ID_BYTE_COUNT (6) + + /* + * The number of ID bytes to read from the NAND Flash device and hand over to + * the identification system. + */ + +enum nand_device_cell_technology { + NAND_DEVICE_CELL_TECH_SLC = 0, + NAND_DEVICE_CELL_TECH_MLC = 1, +}; + +/** + * struct nand_device_info - Information about a single NAND Flash device. + * + * This structure contains all the *essential* information about a NAND Flash + * device, derived from the device's data sheet. For each manufacturer, we have + * an array of these structures. + * + * @end_of_table: If true, marks the end of a table of device + * information. + * @manufacturer_code: The manufacturer code (1st ID byte) reported by + * the device. + * @device_code: The device code (2nd ID byte) reported by the + * device. + * @cell_technology: The storage cell technology. + * @chip_size_in_bytes: The total size of the storage behind a single + * chip select, in bytes. Notice that this is *not* + * necessarily the total size of the storage in a + * *package*, which may contain several chips. + * @block_size_in_pages: The number of pages in a block. + * @page_total_size_in_bytes: The total size of a page, in bytes, including + * both the data and the OOB. + * @ecc_strength_in_bits: The strength of the ECC called for by the + * manufacturer, in number of correctable bits. + * @ecc_size_in_bytes: The size of the data block over which the + * manufacturer calls for the given ECC algorithm + * and strength. + * @data_setup_in_ns: The data setup time, in nanoseconds. Usually the + * maximum of tDS and tWP. A negative value + * indicates this characteristic isn't known. + * @data_hold_in_ns: The data hold time, in nanoseconds. Usually the + * maximum of tDH, tWH and tREH. A negative value + * indicates this characteristic isn't known. + * @address_setup_in_ns: The address setup time, in nanoseconds. Usually + * the maximum of tCLS, tCS and tALS. A negative + * value indicates this characteristic isn't known. + * @gpmi_sample_delay_in_ns: A GPMI-specific timing parameter. A negative + * value indicates this characteristic isn't known. + * @tREA_in_ns: tREA, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRLOH_in_ns: tRLOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRHOH_in_ns: tRHOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + */ + +struct nand_device_info { + + /* End of table marker */ + + bool end_of_table; + + /* Manufacturer and Device codes */ + + uint8_t manufacturer_code; + uint8_t device_code; + + /* Technology */ + + enum nand_device_cell_technology cell_technology; + + /* Geometry */ + + uint64_t chip_size_in_bytes; + uint32_t block_size_in_pages; + uint16_t page_total_size_in_bytes; + + /* ECC */ + + uint8_t ecc_strength_in_bits; + uint16_t ecc_size_in_bytes; + + /* Timing */ + + int8_t data_setup_in_ns; + int8_t data_hold_in_ns; + int8_t address_setup_in_ns; + int8_t gpmi_sample_delay_in_ns; + int8_t tREA_in_ns; + int8_t tRLOH_in_ns; + int8_t tRHOH_in_ns; + + /* Description */ + + const char *description; + +}; + +/** + * nand_device_get_info - Get info about a device based on ID bytes. + * + * @id_bytes: An array of NAND_DEVICE_ID_BYTE_COUNT ID bytes retrieved from the + * NAND Flash device. + */ + +struct nand_device_info *nand_device_get_info(const uint8_t id_bytes[]); + +/** + * nand_device_print_info - Prints information about a NAND Flash device. + * + * @info A pointer to a NAND Flash device information structure. + */ + +void nand_device_print_info(struct nand_device_info *info); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/gpmi-transport.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/gpmi-transport.c @@ -0,0 +1,832 @@ +/* + * Freescale STMP37XX/STMP378X GPMI transport layer for LBA driver + * + * Author: Dmitrij Frasenyak + * Clock settings and hw init comes from + * gpmi driver by Dmitry Pervushin. + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "gpmi.h" +#include "lba.h" + +struct lba_data *g_data; +static int max_chips = 1; +static long clk = -1; + +struct gpmi_nand_timing gpmi_safe_timing = { + .address_setup = 25, + .data_setup = 80, + .data_hold = 60, + .dsample_time = 6, +}; + +/****************************************************************************** + * HW init part + ******************************************************************************/ + +/** + * gpmi_irq - IRQ handler + * + * @irq: irq no + * @context: IRQ context, pointer to gpmi_nand_data + */ +static irqreturn_t gpmi_irq(int irq, void *context) +{ + struct lba_data *data = context; + int i; + + for (i = 0; i < max_chips; i++) { + if (stmp3xxx_dma_is_interrupt(data->nand[i].dma_ch)) { + stmp3xxx_dma_clear_interrupt(data->nand[i].dma_ch); + complete(&data->nand[i].done); + } + + } + __raw_writel(BM_GPMI_CTRL1_DEV_IRQ | BM_GPMI_CTRL1_TIMEOUT_IRQ, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + return IRQ_HANDLED; +} + +static inline u32 gpmi_cycles_ceil(u32 ntime, u32 period) +{ + int k; + + k = (ntime + period - 1) / period; + if (k == 0) + k++; + return k ; +} + + +/** + * gpmi_set_timings - set GPMI timings + * @pdev: pointer to GPMI platform device + * @tm: pointer to structure &gpmi_nand_timing with new timings + * + * During initialization, GPMI uses safe sub-optimal timings, which + * can be changed after reading boot control blocks + */ +void gpmi_set_timings(struct lba_data *data, struct gpmi_nand_timing *tm) +{ + u32 period_ns = 1000000 / clk_get_rate(data->clk) + 1; + u32 address_cycles, data_setup_cycles; + u32 data_hold_cycles, data_sample_cycles; + u32 busy_timeout; + u32 t0, reg; + + address_cycles = gpmi_cycles_ceil(tm->address_setup, period_ns); + data_setup_cycles = gpmi_cycles_ceil(tm->data_setup, period_ns); + data_hold_cycles = gpmi_cycles_ceil(tm->data_hold, period_ns); + data_sample_cycles = gpmi_cycles_ceil(tm->dsample_time + period_ns / 4, + period_ns / 2); + busy_timeout = gpmi_cycles_ceil(10000000 / 4096, period_ns); + + t0 = address_cycles << BP_GPMI_TIMING0_ADDRESS_SETUP; + t0 |= data_setup_cycles << BP_GPMI_TIMING0_DATA_SETUP; + t0 |= data_hold_cycles << BP_GPMI_TIMING0_DATA_HOLD; + __raw_writel(t0, REGS_GPMI_BASE + HW_GPMI_TIMING0); + + __raw_writel(busy_timeout, REGS_GPMI_BASE + HW_GPMI_TIMING1); + + reg = __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL1); +#ifdef CONFIG_ARCH_STMP378X + reg &= ~BM_GPMI_CTRL1_RDN_DELAY; + reg |= data_sample_cycles << BP_GPMI_CTRL1_RDN_DELAY; +#else + reg &= ~BM_GPMI_CTRL1_DSAMPLE_TIME; + reg |= data_sample_cycles << BP_GPMI_CTRL1_DSAMPLE_TIME; +#endif + __raw_writel(reg, REGS_GPMI_BASE + HW_GPMI_CTRL1); +} + +void queue_plug(struct lba_data *data) +{ + u32 ctrl1; + clk_enable(data->clk); + if (clk <= 0) + clk = 24000; /* safe setting, some chips do not work on + speeds >= 24kHz */ + clk_set_rate(data->clk, clk); + + clk = clk_get_rate(data->clk); + + + stmp3xxx_reset_block(HW_GPMI_CTRL0 + REGS_GPMI_BASE, 1); + + ctrl1 = __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL1); + + /* write protection OFF */ + ctrl1 |= BM_GPMI_CTRL1_DEV_RESET; + + /* IRQ polarity */ + ctrl1 |= BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY; + + /* ...and ECC module */ + /*HW_GPMI_CTRL1_SET(bch_mode());*/ + + /* choose NAND mode (1 means ATA, 0 - NAND */ + ctrl1 &= ~BM_GPMI_CTRL1_GPMI_MODE; + + __raw_writel(ctrl1, REGS_GPMI_BASE + HW_GPMI_CTRL1); + + gpmi_set_timings(data, &gpmi_safe_timing); +} + +void queue_release(struct lba_data *data) +{ + __raw_writel(BM_GPMI_CTRL0_SFTRST, REGS_GPMI_BASE + HW_GPMI_CTRL0_SET); + + clk_disable(data->clk); +} + + +/** + * gpmi_init_hw - initialize the hardware + * @pdev: pointer to platform device + * + * Initialize GPMI hardware and set default (safe) timings for NAND access. + * Returns error code or 0 on success + */ +static int gpmi_init_hw(struct platform_device *pdev, int request_pins) +{ + struct lba_data *data = platform_get_drvdata(pdev); + struct gpmi_platform_data *gpd = + (struct gpmi_platform_data *)pdev->dev.platform_data; + int err = 0; + + data->clk = clk_get(NULL, "gpmi"); + if (IS_ERR(data->clk)) { + err = PTR_ERR(data->clk); + dev_err(&pdev->dev, "cannot set failsafe clockrate\n"); + goto out; + } + if (request_pins) + gpd->pinmux(1); + + queue_plug(data); + +out: + return err; +} +/** + * gpmi_release_hw - free the hardware + * @pdev: pointer to platform device + * + * In opposite to gpmi_init_hw, release all acquired resources + */ +static void gpmi_release_hw(struct platform_device *pdev) +{ + struct gpmi_platform_data *gpd = + (struct gpmi_platform_data *)pdev->dev.platform_data; + struct lba_data *data = platform_get_drvdata(pdev); + + queue_release(data); + clk_put(data->clk); + gpd->pinmux(0); +} + + +/** + * gpmi_alloc_buffers - allocate DMA buffers for one chip + * + * @pdev: GPMI platform device + * @g: pointer to structure associated with NAND chip + * + * Allocate buffer using dma_alloc_coherent + */ +static int gpmi_alloc_buffers(struct platform_device *pdev, + struct gpmi_perchip_data *g) +{ + g->cmd_buffer = dma_alloc_coherent(&pdev->dev, + g->cmd_buffer_size, + &g->cmd_buffer_handle, GFP_DMA); + if (!g->cmd_buffer) + goto out1; + + g->write_buffer = dma_alloc_coherent(&pdev->dev, + g->write_buffer_size, + &g->write_buffer_handle, GFP_DMA); + if (!g->write_buffer) + goto out2; + + g->data_buffer = dma_alloc_coherent(&pdev->dev, + g->data_buffer_size, + &g->data_buffer_handle, GFP_DMA); + if (!g->data_buffer) + goto out3; + + g->oob_buffer = dma_alloc_coherent(&pdev->dev, + g->oob_buffer_size, + &g->oob_buffer_handle, GFP_DMA); + if (!g->oob_buffer) + goto out4; + + g->cmdtail_buffer = dma_alloc_coherent(&pdev->dev, + g->cmdtail_buffer_size, + &g->cmdtail_buffer_handle, GFP_DMA); + if (!g->oob_buffer) + goto out5; + + return 0; + +out5: + dma_free_coherent(&pdev->dev, g->oob_buffer_size, + g->oob_buffer, g->oob_buffer_handle); + +out4: + dma_free_coherent(&pdev->dev, g->data_buffer_size, + g->data_buffer, g->data_buffer_handle); +out3: + dma_free_coherent(&pdev->dev, g->write_buffer_size, + g->write_buffer, g->write_buffer_handle); +out2: + dma_free_coherent(&pdev->dev, g->cmd_buffer_size, + g->cmd_buffer, g->cmd_buffer_handle); +out1: + return -ENOMEM; +} + +/** + * gpmi_free_buffers - free buffers allocated by gpmi_alloc_buffers + * + * @pdev: platform device + * @g: pointer to structure associated with NAND chip + * + * Deallocate buffers on exit + */ +static void gpmi_free_buffers(struct platform_device *pdev, + struct gpmi_perchip_data *g) +{ + dma_free_coherent(&pdev->dev, g->oob_buffer_size, + g->oob_buffer, g->oob_buffer_handle); + dma_free_coherent(&pdev->dev, g->write_buffer_size, + g->write_buffer, g->write_buffer_handle); + dma_free_coherent(&pdev->dev, g->cmd_buffer_size, + g->cmd_buffer, g->cmd_buffer_handle); + dma_free_coherent(&pdev->dev, g->cmdtail_buffer_size, + g->cmdtail_buffer, g->cmdtail_buffer_handle); + dma_free_coherent(&pdev->dev, g->data_buffer_size, + g->data_buffer, g->data_buffer_handle); +} + + +/****************************************************************************** + * Arch specific chain_* callbaks + ******************************************************************************/ + +/** + * chain_w4r - Initialize descriptor to perform W4R operation + * + * @chain: Descriptor to use + * @cs: CS for this operation + * + * Due to HW bug we have to put W4R into separate desc. + */ +static void chain_w4r(struct stmp3xxx_dma_descriptor *chain, int cs) +{ + chain->command->cmd = + (4 << BP_APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + (BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER << BP_APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + (BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY << BP_GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + (BV_GPMI_CTRL0_ADDRESS__NAND_DATA << BP_GPMI_CTRL0_ADDRESS) | + (cs << BP_GPMI_CTRL0_CS); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->pio_words[3] = 0; + chain->command->buf_ptr = 0; +} + +/** + * chain_cmd - Initialize descriptor to push CMD to the bus + * + * @chain: Descriptor to use + * @cmd_handle: dma_addr_t pointer that holds the command + * @lba_cmd: flags and lenghth of this command. + * @cs: CS for this operation + * + * CLE || CLE+ALE + */ +static void chain_cmd(struct stmp3xxx_dma_descriptor *chain, + dma_addr_t cmd_handle, + struct lba_cmd *lba_cmd, + int cs) +{ + /* output command */ + chain->command->cmd = + (lba_cmd->len << BP_APBH_CHn_CMD_XFER_COUNT) | + (3 << BP_APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + (BV_APBH_CHn_CMD_COMMAND__DMA_READ << BP_APBH_CHn_CMD_COMMAND); + chain->command->cmd |= BM_APBH_CHn_CMD_CHAIN; + chain->command->pio_words[0] = + (BV_GPMI_CTRL0_COMMAND_MODE__WRITE << BP_GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + (cs << BP_GPMI_CTRL0_CS) | + (BV_GPMI_CTRL0_ADDRESS__NAND_CLE << BP_GPMI_CTRL0_ADDRESS) | + (lba_cmd->len << BP_GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->buf_ptr = cmd_handle; + + if (lba_cmd->flag & FE_CMD_INC) + chain->command->pio_words[0] |= BM_GPMI_CTRL0_ADDRESS_INCREMENT; +/*BUG if (lba_cmd->flag & FE_W4R) */ +/* chain->command->cmd |= BM_APBH_CHn_CMD_NANDWAIT4READY; */ +} + +/** + * chain_cmd - Initialize descriptor to read data from the bus + * + * @chain: Descriptor to use + * @data_handle: dma_addr_t pointer to buffer to store data + * @data_len: the size of the data buffer to read + * @cmd_handle: dma_addr_t pointer that holds the command + * @lba_cmd: flags and lenghth of this command. + * @cs: CS for this operation + */ +static void chain_read_data(struct stmp3xxx_dma_descriptor *chain, + dma_addr_t data_handle, + dma_addr_t data_len, + struct lba_cmd *lba_cmd, + int cs) +{ + chain->command->cmd = + (data_len << BP_APBH_CHn_CMD_XFER_COUNT) | + (4 << BP_APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + (BV_APBH_CHn_CMD_COMMAND__DMA_WRITE << BP_APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + (BV_GPMI_CTRL0_COMMAND_MODE__READ << BP_GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + (cs << BP_GPMI_CTRL0_CS) | + (BV_GPMI_CTRL0_ADDRESS__NAND_DATA << BP_GPMI_CTRL0_ADDRESS) | + (data_len << BP_GPMI_CTRL0_XFER_COUNT); + + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->pio_words[3] = 0; + chain->command->buf_ptr = data_handle; + + if (lba_cmd->flag & FE_CMD_INC) + chain->command->pio_words[0] |= BM_GPMI_CTRL0_ADDRESS_INCREMENT; +/*BUG if (lba_cmd->flag & FE_W4R) */ +/* chain->command->cmd |= BM_APBH_CHn_CMD_NANDWAIT4READY; */ + +} + +/** + * chain_cmd - Initialize descriptor to read data from the bus + * + * @chain: Descriptor to use + * @data_handle: dma_addr_t pointer to buffer to read data from + * @data_len: the size of the data buffer to write + * @cmd_handle: dma_addr_t pointer that holds the command + * @lba_cmd: flags and lenghth of this command. + * @cs: CS for this operation + */ +static void chain_write_data(struct stmp3xxx_dma_descriptor *chain, + dma_addr_t data_handle, + int data_len, + struct lba_cmd *lba_cmd, + int cs) +{ + + chain->command->cmd = + (data_len << BP_APBH_CHn_CMD_XFER_COUNT) | + (4 << BP_APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + (BV_APBH_CHn_CMD_COMMAND__DMA_READ << BP_APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + (BV_GPMI_CTRL0_COMMAND_MODE__WRITE << BP_GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + (cs << BP_GPMI_CTRL0_CS) | + (BV_GPMI_CTRL0_ADDRESS__NAND_DATA << BP_GPMI_CTRL0_ADDRESS) | + (data_len << BP_GPMI_CTRL0_XFER_COUNT); + + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->pio_words[3] = 0; + chain->command->buf_ptr = data_handle; + + if (lba_cmd->flag & FE_CMD_INC) + chain->command->pio_words[0] |= BM_GPMI_CTRL0_ADDRESS_INCREMENT; +/*BUG if (lba_cmd->flag & FE_W4R) */ +/* chain->command->cmd |= BM_APBH_CHn_CMD_NANDWAIT4READY; */ + +} + + +/****************************************************************************** + * Interface to arch independent part + ******************************************************************************/ +/** + * queue_cmd - Setup a chain of descriptors + * + * @priv: private data passed + * @cmd_buf: pointer to command buffer (to be removed) + * @cmd_handle: dma_addr_t pointer that holds the command + * @cmd_len: the size of the command buffer (to be removed) + * @data_handle: dma_addr_t pointer to a data buffer + * @data_len: the size of the data buffer + * @cmd_flags: commands flags + */ +int queue_cmd(void *priv, + uint8_t *cmd_buf, dma_addr_t cmd_handle, int cmd_len, + dma_addr_t data, int data_len, + struct lba_cmd *cmd_flags) +{ + + struct gpmi_perchip_data *g = priv; + unsigned long flags; + int idx; + int ret = 0; + struct stmp3xxx_dma_descriptor *chain ; + int i; + + if (!g || !(cmd_buf || cmd_handle)) + BUG(); + + spin_lock_irqsave(&g->lock, flags); + + /* Keep it for debug purpose */ + chain = g->d; + for (i = g->d_tail; i < GPMI_DMA_MAX_CHAIN; i++) { + chain[i].command->cmd = 0; + chain[i].command->buf_ptr = 0; + } + /* End */ + + if (!cmd_handle) { + if (!cmd_buf) + BUG(); + memcpy(g->cmd_buffer, cmd_buf, cmd_len); + cmd_handle = g->cmd_buffer_handle; + } + + idx = g->d_tail; + chain = &g->d[idx]; + + do { + if (!cmd_flags) + BUG(); + + if (cmd_flags->flag & FE_W4R) { + /* there seems to be HW BUG with W4R flag. + * IRQ controller hangs forever when it's combined + * with real operation. + */ + chain_w4r(chain, g->cs); + chain++; idx++; + } + + + switch (cmd_flags->flag & F_MASK) { + + case F_CMD: + chain_cmd(chain, cmd_handle, cmd_flags, g->cs); + break; + case F_DATA_READ: + chain_read_data(chain, data, data_len, + cmd_flags, g->cs); + break; + case F_DATA_WRITE: + chain_write_data(chain, data, data_len, + cmd_flags, g->cs); + break; + default:{ + if (cmd_flags->flag & FE_END) + goto out; + else{ + printk(KERN_ERR "uknown cmd\n"); + BUG(); + } + } + } + + + chain++; idx++; + cmd_handle += cmd_flags->len; + + if (idx >= GPMI_DMA_MAX_CHAIN) { + printk(KERN_ERR "to many chains; idx is 0x%x\n", idx); + BUG(); + } + + } while (!((cmd_flags++)->flag & FE_END)); + +out: + if (idx < GPMI_DMA_MAX_CHAIN) { + ret = idx; + g->d_tail = idx; + } + spin_unlock_irqrestore(g->lock, flags); + + return ret; + +} + +dma_addr_t queue_get_cmd_handle(void *priv) +{ + struct gpmi_perchip_data *g = priv; + return g->cmd_buffer_handle; +} + +uint8_t *queue_get_cmd_ptr(void *priv) +{ + struct gpmi_perchip_data *g = priv; + return g->cmd_buffer; +} + +dma_addr_t queue_get_data_handle(void *priv) +{ + struct gpmi_perchip_data *g = priv; + return g->data_buffer_handle; +} + +uint8_t *queue_get_data_ptr(void *priv) +{ + struct gpmi_perchip_data *g = priv; + return g->data_buffer; +} + + +/** + * queue_run - run the chain + * + * @priv: private data. + */ +int queue_run(void *priv) +{ + struct gpmi_perchip_data *g = priv; + + if (!g->d_tail) + return 0; + stmp3xxx_dma_reset_channel(g->dma_ch); + stmp3xxx_dma_clear_interrupt(g->dma_ch); + stmp3xxx_dma_enable_interrupt(g->dma_ch); + + g->d[g->d_tail-1].command->cmd &= ~(BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN); + g->d[g->d_tail-1].command->cmd |= BM_APBH_CHn_CMD_IRQONCMPLT ; + + g->d[g->d_tail-1].command->pio_words[0] &= ~BM_GPMI_CTRL0_LOCK_CS; + +#ifdef DEBUG + /*stmp37cc_dma_print_chain(&g->chain);*/ +#endif + + init_completion(&g->done); + stmp3xxx_dma_go(g->dma_ch, g->d, 1); + wait_for_completion(&g->done); + + g->d_tail = 0; + + return 0; + +} + +/****************************************************************************** + * Platform specific part / chard driver and misc functions + ******************************************************************************/ + + + +static int __init lba_probe(struct platform_device *pdev) +{ + struct lba_data *data; + struct resource *r; + struct gpmi_perchip_data *g; + int err; + + /* Allocate memory for the device structure (and zero it) */ + data = kzalloc(sizeof(*data) + sizeof(struct gpmi_perchip_data), + GFP_KERNEL); + if (!data) { + dev_err(&pdev->dev, "failed to allocate gpmi_nand_data\n"); + err = -ENOMEM; + goto out1; + } + g_data = data; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(&pdev->dev, "failed to get resource\n"); + err = -ENXIO; + goto out2; + } + data->io_base = ioremap(r->start, r->end - r->start + 1); + if (!data->io_base) { + dev_err(&pdev->dev, "ioremap failed\n"); + err = -EIO; + goto out2; + } + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!r) { + err = -EIO; + dev_err(&pdev->dev, "can't get IRQ resource\n"); + goto out3; + } + data->irq = r->start; + + platform_set_drvdata(pdev, data); + err = gpmi_init_hw(pdev, 1); + if (err) + goto out3; + + + err = request_irq(data->irq, + gpmi_irq, 0, dev_name(&pdev->dev), data); + if (err) { + dev_err(&pdev->dev, "can't request GPMI IRQ\n"); + goto out4; + } + + g = data->nand; + + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (!r) { + dev_err(&pdev->dev, "can't get DMA resource\n"); + goto out_res; + } + g->cs = 0; + g->dma_ch = r->start; + + err = stmp3xxx_dma_request(g->dma_ch, NULL, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "can't request DMA channel 0x%x\n", + g->dma_ch); + goto out_res; + } + + err = stmp3xxx_dma_make_chain(g->dma_ch, &g->chain, + g->d, ARRAY_SIZE(g->d)); + if (err) { + dev_err(&pdev->dev, "can't setup DMA chain\n"); + stmp3xxx_dma_release(g->dma_ch); + goto out_res; + } + + g->cmd_buffer_size = GPMI_CMD_BUF_SZ; + g->cmdtail_buffer_size = GPMI_CMD_BUF_SZ; + g->write_buffer_size = GPMI_WRITE_BUF_SZ; + g->data_buffer_size = GPMI_DATA_BUF_SZ; + g->oob_buffer_size = GPMI_OOB_BUF_SZ; + + err = gpmi_alloc_buffers(pdev, g); + if (err) { + dev_err(&pdev->dev, "can't setup buffers\n"); + stmp3xxx_dma_free_chain(&g->chain); + stmp3xxx_dma_release(g->dma_ch); + goto out_res; + } + + g->dev = pdev; + g->chip.priv = g; + g->index = 0; + g->timing = gpmi_safe_timing; + + g->cmd_buffer_sz = + g->write_buffer_sz = + g->data_buffer_sz = + 0; + g->valid = !0; /* mark the data as valid */ + + + lba_core_init(data); + + return 0; + +out_res: + free_irq(data->irq, data); +out4: + gpmi_release_hw(pdev); +out3: + platform_set_drvdata(pdev, NULL); + iounmap(data->io_base); +out2: + kfree(data); +out1: + return err; +} + +static int gpmi_suspend(struct platform_device *pdev, pm_message_t pm) +{ + struct lba_data *data = platform_get_drvdata(pdev); + int err; + + printk(KERN_INFO "%s: %d\n", __func__, __LINE__); + err = lba_core_suspend(pdev, data); + if (!err) + gpmi_release_hw(pdev); + + return err; +} + +static int gpmi_resume(struct platform_device *pdev) +{ + struct lba_data *data = platform_get_drvdata(pdev); + int r; + + printk(KERN_INFO "%s: %d\n", __func__, __LINE__); + r = gpmi_init_hw(pdev, 1); + lba_core_resume(pdev, data); + return r; +} + +/** + * gpmi_nand_remove - remove a GPMI device + * + */ +static int __devexit lba_remove(struct platform_device *pdev) +{ + struct lba_data *data = platform_get_drvdata(pdev); + int i; + + lba_core_remove(data); + gpmi_release_hw(pdev); + free_irq(data->irq, data); + + for (i = 0; i < max_chips; i++) { + if (!data->nand[i].valid) + continue; + gpmi_free_buffers(pdev, &data->nand[i]); + stmp3xxx_dma_free_chain(&data->nand[i].chain); + stmp3xxx_dma_release(data->nand[i].dma_ch); + } + iounmap(data->io_base); + kfree(data); + + return 0; +} + +static struct platform_driver lba_driver = { + .probe = lba_probe, + .remove = __devexit_p(lba_remove), + .driver = { + .name = "gpmi", + .owner = THIS_MODULE, + }, + .suspend = gpmi_suspend, + .resume = gpmi_resume, + +}; + + +static int __init lba_init(void) +{ + return platform_driver_register(&lba_driver); +} + +static void lba_exit(void) +{ + platform_driver_unregister(&lba_driver); +} + +module_init(lba_init); +module_exit(lba_exit); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/lba.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/lba.h @@ -0,0 +1,140 @@ +/* + * Freescale STMP37XX/STMP378X LBA interface + * + * Author: Dmitrij Frasenyak + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __INCLUDE_LBA_H__ +#define __INCLUDE_LBA_H__ + + +#include +#include +#include "gpmi.h" + +struct lba_cmd { + uint8_t len; +#define F_MASK 0x0f +#define F_ALE 0x01 +#define F_CMD 0x02 +#define F_DATA_READ 0x04 +#define F_DATA_WRITE 0x08 + +#define FE_W4R 0x10 +#define FE_CMD_INC 0x20 +#define FE_END 0x40 + + uint8_t flag; +}; + +#define LBA_P_READ_A 0 +#define LBA_P_READ_B 2 +#define LBA_P_READ_C 3 +#define LBA_P_WRITE_A 0 +#define LBA_P_WRITE_B 4 +#define LBA_T_SIZE1 1 +#define LBA_T_SIZE4 2 +#define LBA_T_SIZE8 4 +#define LBA_T_CRC (1 << 6) +#define LBA_T_ECC_CHECK (2 << 6) +#define LBA_T_ECC_CORRECT (3 << 6) + +struct lba_data { + void __iomem *io_base; + struct clk *clk; + int irq; + + spinlock_t lock; + int use_count; + int mode; + struct semaphore mode_lock; +#define LBA_MODE_MASK 0x0000ffff +#define LBA_FLAG_MASK 0xffff0000 +#define LBA_MODE_RST 0 +#define LBA_MODE_PNR 1 +#define LBA_MODE_BCM 2 +#define LBA_MODE_MDP 3 +#define LBA_MODE_VFP 4 +#define LBA_MODE_SUSP 5 +#define LBA_MODE_SELFPM 0x80000000 + wait_queue_head_t suspend_q; + wait_queue_head_t selfpm_q; + struct task_struct *thread; + long long last_access; + /* PNR specific */ + /* BCM specific */ + /* VFP specific */ + uint8_t pass[2]; + + /* Size of the partiotions: pages for PNP; sectors for others */ + unsigned int pnp_size; + unsigned int vfp_size; + long long mdp_size; + void *priv; + /*should be last*/ + struct gpmi_perchip_data nand[0]; + +}; + +extern struct lba_data *g_data; + +void stmp37cc_dma_print_chain(struct stmp37xx_circ_dma_chain *chain); + +int lba_blk_init(struct lba_data *data); +int lba_blk_remove(struct lba_data *data); +int lba_blk_suspend(struct platform_device *pdev, struct lba_data *data); +int lba_blk_resume(struct platform_device *pdev, struct lba_data *data); + + +int lba_core_init(struct lba_data *data); +int lba_core_remove(struct lba_data *data); +int lba_core_suspend(struct platform_device *pdev, struct lba_data *data); +int lba_core_resume(struct platform_device *pdev, struct lba_data *data); +int lba_core_lock_mode(struct lba_data *data, int mode); +int lba_core_unlock_mode(struct lba_data *data); + +int lba_write_sectors(void *priv, unsigned int sector, unsigned int count, + void *buffer, dma_addr_t handle); +int lba_read_sectors(void *priv, unsigned int sector, unsigned int count, + void *buffer, dma_addr_t handle); +void lba_protocol1_set(void *priv, uint8_t param); +uint8_t lba_protocol1_get(void *priv); +uint8_t lba_get_status1(void *priv); +uint8_t lba_get_status2(void *priv); + +uint8_t lba_get_id1(void *priv, uint8_t *ret_buffer); +uint8_t lba_get_id2(void *priv, uint8_t *); + + +int queue_cmd(void *priv, + uint8_t *cmd_buf, dma_addr_t cmd_handle, int cmd_len, + dma_addr_t data, int data_len, + struct lba_cmd *cmd_flags); + +int queue_run(void *priv); + +dma_addr_t queue_get_cmd_handle(void *priv); + +uint8_t *queue_get_cmd_ptr(void *priv); + +dma_addr_t queue_get_data_handle(void *priv); + +uint8_t *queue_get_data_ptr(void *priv); + +void queue_plug(struct lba_data *data); +void queue_release(struct lba_data *data); + + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/lba-core.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/lba-core.c @@ -0,0 +1,619 @@ +/* + * Freescale STMP37XX/STMP378X LBA/core driver + * + * Author: Dmitrij Frasenyak + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "gpmi.h" +#include "lba.h" + +#define LBA_SELFPM_TIMEOUT 2000 /* msecs */ +dma_addr_t g_cmd_handle; +dma_addr_t g_data_handle; +uint8_t *g_data_buffer; +uint8_t *g_cmd_buffer; + +uint8_t lba_get_status1(void *priv) +{ + uint8_t cmd_buf[] = { 0x70 } ; + struct lba_cmd lba_flags[] = { + {1 , F_CMD | FE_W4R}, + {0, F_DATA_READ | FE_END}, + }; + *g_data_buffer = 0; + queue_cmd(priv, cmd_buf, 0, 1, g_data_handle, 1, lba_flags); + queue_run(priv); + return *g_data_buffer; +} + + +int lba_wait_for_ready(void *priv) +{ + int stat; + unsigned long j_start = jiffies; + + stat = lba_get_status1(priv); + if ((stat & 0x60) != 0x60) { + while (((stat & 0x60) != 0x60) && + (jiffies - j_start < msecs_to_jiffies(2000))) { + schedule(); + stat = lba_get_status1(priv); + } + } + if (stat != 0x60) + return stat; + + return 0; +} + +int lba_write_sectors(void *priv, unsigned int sector, unsigned int count, + void *buffer, dma_addr_t handle) +{ + uint8_t cmd_buf[] = { + 0x80, + count & 0xff, (count >> 8) & 0xff, /* Count */ + (sector & 0xff), (sector >> 8) & 0xff, /* Address */ + (sector >> 16) & 0xff, (sector >> 24) & 0xff, /* Addres */ + /* Data goes here */ + 0x10 + }; + + struct lba_cmd flags_t1[] = { /* Transmition mode 1/A */ + {7 , F_CMD | FE_CMD_INC | FE_W4R}, + {0, F_DATA_WRITE}, + {1 , F_CMD | FE_END} + }; + + if (count > 8) + return -EINVAL; + + if (lba_wait_for_ready(priv)) + return -EIO; + + while (count) { + int cnt = (count < 8) ? count : 8; + int data_len = cnt * 512; + + queue_cmd(priv, cmd_buf, 0, 8, + handle, data_len, flags_t1); + + handle += data_len; + count -= cnt; + + } + + queue_run(priv); + + return count; + +} + +int lba_read_sectors(void *priv, unsigned int sector, unsigned int count, + void *buffer, dma_addr_t handle) +{ + + int data_len; + int cnt; + uint8_t cmd_buf[] = { + 0x00, + count & 0xff, (count >> 8) & 0xff, /* Count */ + (sector & 0xff), (sector >> 8) & 0xff, /* Addr */ + (sector >> 16) & 0xff, (sector >> 24) & 0xff, /* Addr */ + 0x30 + /* Data goes here */ + + }; + + struct lba_cmd flags_r3[] = { /* Read mode 3/A */ + {7 , F_CMD | FE_CMD_INC | FE_W4R}, + {1 , F_CMD }, + {0 , F_DATA_READ | FE_W4R | FE_END }, + }; + struct lba_cmd flags_r3c[] = { /* Read mode 3/A */ + {0 , F_DATA_READ | FE_W4R | FE_END }, + }; + struct lba_cmd *flags = flags_r3; + int flags_len = 8; + + if (count > 8) + return -EINVAL; + + if (lba_wait_for_ready(priv)) + return -EIO; + + while (count) { + cnt = (count < 8) ? count : 8; + data_len = cnt * 512; + queue_cmd(priv, cmd_buf, 0, flags_len, handle, data_len, flags); + handle += data_len; + count -= cnt; + flags = flags_r3c; + flags_len = 0; + } + + queue_run(priv); + + return count; + +} + + +uint8_t lba_get_id1(void *priv, uint8_t *ret_buffer) +{ + uint8_t cmd_buf[] = { 0x90 , 0x00, /* Data read 5bytes*/ }; + struct lba_cmd lba_flags[] = { + {2 , F_CMD | FE_CMD_INC | FE_W4R}, + {0, F_DATA_READ | FE_END}, + }; + + queue_cmd(priv, cmd_buf, 0, 2, g_data_handle, 5, lba_flags); + queue_run(priv); + memcpy(ret_buffer, g_data_buffer, 5); + + return 0; +} + +uint8_t lba_get_id2(void *priv, uint8_t *ret_buffer) +{ + uint8_t cmd_buf[] = { 0x92 , 0x00, /* Data read 5bytes*/ }; + struct lba_cmd lba_flags[] = { + {2 , F_CMD | FE_CMD_INC | FE_W4R}, + {0, F_DATA_READ | FE_END}, + }; + + queue_cmd(priv, cmd_buf, 0, 2, g_data_handle, 5, lba_flags); + queue_run(priv); + memcpy(ret_buffer, g_data_buffer, 5); + return 0; +} + +uint8_t lba_get_status2(void *priv) +{ + uint8_t cmd_buf[] = { 0x71 }; + struct lba_cmd lba_flags[] = { + {1 , F_CMD | FE_CMD_INC | FE_W4R}, + {0 , F_DATA_READ | FE_END}, + }; + *g_data_buffer = 0; + queue_cmd(priv, cmd_buf, 0, 1, g_data_handle, 1, lba_flags); + queue_run(priv); + return *g_data_buffer; +} + +static uint8_t lba_parse_status2(void *priv) +{ + uint8_t stat; + + stat = lba_get_status2(priv); + printk(KERN_INFO "Status2:|"); + if (stat & 0x40) + printk(" C.PAR.ERR |"); /* no KERN_ here */ + if (stat & 0x20) + printk(" NO spare |"); + if (stat & 0x10) + printk(" ADDR OoRange |"); + if (stat & 0x8) + printk(" high speed |"); + if ((stat & 0x6) == 6) + printk(" MDP |"); + if ((stat & 0x6) == 4) + printk(" VFP |"); + if ((stat & 0x6) == 2) + printk(" PNP |"); + if (stat & 1) + printk(" PSW |"); + + printk("\n"); + return 0; +} + + +int lba_2mdp(void *priv) +{ + uint8_t cmd_buf[] = { 0xFC }; + struct lba_cmd lba_flags[] = { + {1 , F_CMD | FE_W4R | FE_END} + }; + + queue_cmd(priv, cmd_buf, 0, 1, 0, 0, lba_flags); + queue_run(priv); + return 0; +} + +void _lba_misc_cmd_set(void *priv, uint8_t *cmd_buf) +{ + struct lba_cmd lba_flags[] = { + {6 , F_CMD | FE_CMD_INC | FE_W4R }, + {1 , F_CMD | FE_END }, + }; + + queue_cmd(priv, cmd_buf, 0, 7, 0, 0, lba_flags); + queue_run(priv); +} + +uint8_t _lba_misc_cmd_get(void *priv, uint8_t *cmd_buf) +{ + struct lba_cmd lba_flags[] = { + {6 , F_CMD | FE_CMD_INC | FE_W4R }, + {1 , F_CMD }, + {0 , F_DATA_READ | FE_W4R | FE_END} + }; + + queue_cmd(priv, cmd_buf, 0, 7, g_data_handle, 1, lba_flags); + queue_run(priv); + return *g_data_buffer; +} +void lba_mdp2vfp(void *priv, uint8_t pass[2]) +{ + uint8_t cmd_buf[] = { 0x0, 0xbe, pass[0], pass[1], 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +void lba_bcm2vfp(void *priv, uint8_t pass[2]) +{ + lba_mdp2vfp(priv, pass); +} + +void lba_powersave_enable(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xba, 0, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} +void lba_powersave_disable(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xbb, 0, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +void lba_highspeed_enable(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xbc, 0, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +void lba_highspeed_disable(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xbd, 0, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +void lba_prot1_set(void *priv, uint8_t mode) +{ + uint8_t cmd_buf[] = { 0x0, 0xa2, mode, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +void lba_prot2_set(void *priv, uint8_t mode) +{ + uint8_t cmd_buf[] = { 0x0, 0xa3, mode, 0, 0, 0, 0x57 }; + _lba_misc_cmd_set(priv, cmd_buf); +} + +uint8_t lba_prot1_get(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xb2, 0, 0, 0, 0, 0x57 }; + return _lba_misc_cmd_get(priv, cmd_buf); +} + +uint8_t lba_prot2_get(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xb3, 0, 0, 0, 0, 0x57 }; + return _lba_misc_cmd_get(priv, cmd_buf); +} + +uint64_t lba_mdp_size_get(void *priv) +{ + uint8_t cmd_buf[] = { 0x0, 0xb0, 0, 0, 0, 0, 0x57 }; + struct lba_cmd lba_flags[] = { + {6 , F_CMD | FE_CMD_INC | FE_W4R }, + {1 , F_CMD }, + {0 , F_DATA_READ | FE_W4R | FE_END} + }; + + memset((void *)g_data_buffer, 0, 8); + queue_cmd(priv, cmd_buf, 0, 7, g_data_handle, 5, lba_flags); + queue_run(priv); + return le64_to_cpu(*(long long *)g_data_buffer); +} + +void lba_cache_flush(void *priv) +{ + uint8_t cmd_buf[] = { 0xF9 }; + struct lba_cmd lba_flags[] = { + {1 , F_CMD | FE_W4R }, + {0 , FE_W4R | FE_END} + }; + + queue_cmd(priv, cmd_buf, 0, 7, g_data_handle, 5, lba_flags); + queue_run(priv); +} + +void lba_reboot(void *priv) +{ + uint8_t cmd_buf[] = { 0xFD }; + struct lba_cmd lba_flags[] = { + {1 , F_CMD | FE_W4R }, + {0 , FE_W4R | FE_END} + }; + + queue_cmd(priv, cmd_buf, 0, 7, g_data_handle, 5, lba_flags); + queue_run(priv); +} + +void lba_def_state(void *priv) +{ + lba_wait_for_ready(priv); + lba_reboot(priv); + + lba_wait_for_ready(priv); + lba_parse_status2(priv); + + lba_wait_for_ready(priv); + lba_2mdp(priv); + + lba_wait_for_ready(priv); + lba_prot1_set(priv, LBA_T_SIZE8); /* 512 * 8 */ + + lba_wait_for_ready(priv); +/* Type C read; Type A write; */ + lba_prot2_set(priv, LBA_P_WRITE_A | LBA_P_READ_C); +} + +/* + * Should be called with mode locked + */ +void lba_core_setvfp_passwd(struct lba_data *data, uint8_t pass[2]) +{ + memcpy(data->pass, pass, 2); +} + +int lba_core_lock_mode(struct lba_data *data, int mode) +{ + void *priv = &data->nand; + + if (down_interruptible(&data->mode_lock)) + return -EAGAIN; + /* + * MDP and VFP are the only supported + * modes for now. + */ + if ((mode != LBA_MODE_MDP) && + (mode != LBA_MODE_VFP)) { + up(&data->mode_lock); + return -EINVAL; + } + + while ((data->mode & LBA_MODE_MASK) == LBA_MODE_SUSP) { + up(&data->mode_lock); + + if (wait_event_interruptible( + data->suspend_q, + (data->mode & LBA_MODE_MASK) != LBA_MODE_SUSP)) + return -EAGAIN; + + if (down_interruptible(&data->mode_lock)) + return -EAGAIN; + + data->last_access = jiffies; + } + + if (data->mode & LBA_MODE_SELFPM) { + queue_plug(data); + data->mode &= ~LBA_MODE_SELFPM; + } + + if (mode == data->mode) + return 0; + + /* + * mode = VFP || MDP only + * Revisit when more modes are added + */ + switch (data->mode) { + case LBA_MODE_RST: + case LBA_MODE_PNR: + case LBA_MODE_BCM: + lba_def_state(priv); + if (mode == LBA_MODE_MDP) { + data->mode = LBA_MODE_MDP; + break; + } + /*no break -> fall down to set VFP mode*/ + case LBA_MODE_MDP: + lba_wait_for_ready(priv); + lba_mdp2vfp(priv, data->pass); + data->mode = LBA_MODE_VFP; + break; + case LBA_MODE_VFP: + lba_wait_for_ready(priv); + lba_2mdp(priv); + data->mode = LBA_MODE_MDP; + break; + default: + up(&data->mode_lock); + return -EINVAL; + } + + return 0; +} + +int lba_core_unlock_mode(struct lba_data *data) +{ + data->last_access = jiffies; + up(&data->mode_lock); + wake_up(&data->selfpm_q); + return 0; +} + +static int selfpm_timeout_expired(struct lba_data *data) +{ + return jiffies_to_msecs(jiffies - data->last_access) > 2000; +} + +static int lba_selfpm_thread(void *d) +{ + struct lba_data *data = d; + + set_user_nice(current, -5); + + while (!kthread_should_stop()) { + + if (wait_event_interruptible(data->selfpm_q, + kthread_should_stop() || + !(data->mode & LBA_MODE_SELFPM))) + continue; + + set_current_state(TASK_UNINTERRUPTIBLE); + schedule_timeout(msecs_to_jiffies(LBA_SELFPM_TIMEOUT)); + + if (down_trylock(&data->mode_lock)) + continue; + + if (!selfpm_timeout_expired(data)) { + up(&data->mode_lock); + continue; + } + data->mode |= LBA_MODE_SELFPM; + lba_wait_for_ready((void *)data->nand); + lba_cache_flush((void *)data->nand); + queue_release(data); + up(&data->mode_lock); + + } + + return 0; +} + +int lba_core_init(struct lba_data *data) +{ + uint8_t id_buf[5]; + uint8_t capacity; + uint8_t id1_template[5] = {0x98, 0xDC, 0x00, 0x15, 0x00}; + uint8_t id2_template[5] = {0x98, 0x21, 0x00, 0x55, 0xAA}; + void *priv = (void *)data->nand; + + + g_data = data; + g_cmd_handle = queue_get_cmd_handle(priv); + g_data_handle = queue_get_data_handle(priv); + g_data_buffer = queue_get_data_ptr(priv); + g_cmd_buffer = queue_get_cmd_ptr(priv); + + spin_lock_init(&data->lock); + sema_init(&data->mode_lock, 1); + init_waitqueue_head(&data->suspend_q); + init_waitqueue_head(&data->selfpm_q); + + + lba_get_id1(data->nand, id_buf); + if (!memcmp(id_buf, id1_template, 5)) + printk(KERN_INFO + "LBA: Found LBA/SLC NAND emulated ID\n"); + else + return -ENODEV; + + lba_get_id2(data->nand, id_buf); + capacity = id_buf[2]; + id_buf[2] = 0; + + if (memcmp(id_buf, id2_template, 5)) { + printk(KERN_INFO + "LBA: Uknown LBA device\n"); + return -ENODEV; + } + printk(KERN_INFO + "LBA: Found %dGbytes LBA NAND device\n", + 1 << capacity); + + lba_wait_for_ready(priv); + lba_parse_status2(priv); + + lba_def_state(priv); + data->mode = LBA_MODE_MDP; + + g_data->pnp_size = 0xff; + g_data->vfp_size = 16384; + + lba_wait_for_ready(priv); + g_data->mdp_size = lba_mdp_size_get(priv); + + lba_wait_for_ready(priv); + /*lba_powersave_enable(priv);*/ + /*lba_highspeed_enable(priv);*/ + + lba_wait_for_ready(priv); + lba_parse_status2(priv); + + data->thread = kthread_create(lba_selfpm_thread, + data, "lba-selfpm-%d", 1); + if (IS_ERR(data->thread)) + return PTR_ERR(data->thread); + + lba_blk_init(g_data); + + wake_up_process(data->thread); + return 0; + +}; + +int lba_core_remove(struct lba_data *data) +{ + kthread_stop(data->thread); + lba_blk_remove(data); + lba_wait_for_ready((void *)data->nand); + lba_cache_flush((void *)data->nand); + return 0; +} + +int lba_core_suspend(struct platform_device *pdev, struct lba_data *data) +{ + BUG_ON((data->mode & 0xffff) == LBA_MODE_SUSP); + if (down_interruptible(&data->mode_lock)) + return -EAGAIN; + if (data->mode & LBA_MODE_SELFPM) + queue_plug(data); + + data->mode = LBA_MODE_SUSP | LBA_MODE_SELFPM; + up(&data->mode_lock); + lba_wait_for_ready((void *)data->nand); + lba_cache_flush((void *)data->nand); + return 0; +} + +int lba_core_resume(struct platform_device *pdev, struct lba_data *data) +{ + BUG_ON((data->mode & 0xffff) != LBA_MODE_SUSP); + lba_def_state((void *)data->nand); + data->last_access = jiffies; + data->mode = LBA_MODE_MDP; + wake_up(&data->suspend_q); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_MTD_NAND_GPMI_LBA) += gpmi_lba.o +gpmi_lba-objs += gpmi-transport.o lba-core.o lba-blk.o --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/lba-blk.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/lba-blk.c @@ -0,0 +1,345 @@ +/* + * Freescale STMP37XX/STMP378X LBA/block driver + * + * Author: Dmitrij Frasenyak + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include + +#include +#include /* printk() */ +#include /* kmalloc() */ +#include /* everything... */ +#include /* error codes */ +#include +#include +#include /* size_t */ +#include /* O_ACCMODE */ +#include /* HDIO_GETGEO */ +#include +#include +#include +#include +#include /* invalidate_bdev */ +#include +#include +#include +#include +#include "lba.h" + +static int lba_major; + +#define LBA_NAME "lba" + +#if 0 +#define TAG() printk(KERNE_ERR "%s: %d\n", __func__, __LINE__) +#else +#define TAG() +#endif + +/* + * The internal representation of our device. + */ +struct lba_blk_dev { + int size; /* Device size in sectors */ + spinlock_t lock; /* For mutual exclusion */ + int users; + struct request_queue *queue; /* The device request queue */ + struct gendisk *gd; /* The gendisk structure */ + struct lba_data *data; /* pointer from lba core */ + + struct task_struct *thread; + struct bio *bio_head; + struct bio *bio_tail; + wait_queue_head_t wait_q; + struct semaphore busy; + +}; + +static struct lba_blk_dev *g_lba_blk; + +static void blk_add_bio(struct lba_blk_dev *dev, struct bio *bio); + + +/* + * Transfer a single BIO. + */ +static int lba_blk_xfer_bio(struct lba_blk_dev *dev, struct bio *bio) +{ + int i; + struct bio_vec *bvec; + sector_t sector = bio->bi_sector; + enum dma_data_direction dir; + int status = 0; + int (*lba_xfer)(void *priv, + unsigned int sector, + unsigned int count, + void *buffer, + dma_addr_t handle); + + if (bio_data_dir(bio) == WRITE) { + lba_xfer = lba_write_sectors; + dir = DMA_TO_DEVICE; + } else { + lba_xfer = lba_read_sectors; + dir = DMA_FROM_DEVICE; + } + + /* Fixme: merge segments */ + bio_for_each_segment(bvec, bio, i) { + void *buffer = page_address(bvec->bv_page); + dma_addr_t handle ; + if (!buffer) + BUG(); + buffer += bvec->bv_offset; + handle = dma_map_single(&dev->data->nand->dev->dev, + buffer, + bvec->bv_len, + dir); + status = lba_xfer(dev->data->nand, sector, + bvec->bv_len >> 9, + buffer, + handle); + + dma_unmap_single(&dev->data->nand->dev->dev, + handle, + bvec->bv_len, + dir); + if (status) + break; + + sector += bio_cur_bytes(bio) >> 9; + } + + return status; +} + + +/* + * The direct make request version. + */ +static int lba_make_request(struct request_queue *q, struct bio *bio) +{ + struct lba_blk_dev *dev = q->queuedata; + + blk_add_bio(dev, bio); + return 0; +} + +/* + * Open and close. + */ + +static int lba_blk_open(struct block_device *bdev, fmode_t mode) +{ + struct lba_blk_dev *dev = bdev->bd_disk->private_data; + + TAG(); + + spin_lock_irq(&dev->lock); + dev->users++; + spin_unlock_irq(&dev->lock); + return 0; +} + + +static int lba_blk_release(struct gendisk *gd, fmode_t mode) +{ + struct lba_blk_dev *dev = gd->private_data; + + spin_lock(&dev->lock); + dev->users--; + spin_unlock(&dev->lock); + + return 0; +} + +static int lba_getgeo(struct block_device *bdev, struct hd_geometry *geo) +{ + /* + * get geometry: we have to fake one... trim the size to a + * multiple of 2048 (1M): tell we have 32 sectors, 64 heads, + * whatever cylinders. + */ + geo->heads = 1 << 6; + geo->sectors = 1 << 5; + geo->cylinders = get_capacity(bdev->bd_disk) >> 11; + return 0; +} + +/* + * Add bio to back of pending list + */ +static void blk_add_bio(struct lba_blk_dev *dev, struct bio *bio) +{ + unsigned long flags; + spin_lock_irqsave(&dev->lock, flags); + if (dev->bio_tail) { + dev->bio_tail->bi_next = bio; + dev->bio_tail = bio; + } else + dev->bio_head = dev->bio_tail = bio; + wake_up(&dev->wait_q); + spin_unlock_irqrestore(&dev->lock, flags); +} + +/* + * Grab first pending buffer + */ +static struct bio *blk_get_bio(struct lba_blk_dev *dev) +{ + struct bio *bio; + unsigned long flags; + + spin_lock_irqsave(&dev->lock, flags); + bio = dev->bio_head; + if (bio) { + if (bio == dev->bio_tail) { + dev->bio_tail = NULL; + dev->bio_head = NULL; + } + dev->bio_head = bio->bi_next; + bio->bi_next = NULL; + } + spin_unlock_irqrestore(&dev->lock, flags); + + return bio; +} + +static int lba_thread(void *data) +{ + struct lba_blk_dev *dev = data; + struct bio *bio; + int status; + + set_user_nice(current, -20); + + while (!kthread_should_stop() || dev->bio_head) { + + wait_event_interruptible(dev->wait_q, + dev->bio_head || kthread_should_stop()); + + if (!dev->bio_head) + continue; + + if (lba_core_lock_mode(dev->data, LBA_MODE_MDP)) + continue; + + bio = blk_get_bio(dev); + status = lba_blk_xfer_bio(dev, bio); + bio_endio(bio, status); + + lba_core_unlock_mode(dev->data); + } + + return 0; +} + + + +/* + * The device operations structure. + */ +static struct block_device_operations lba_blk_ops = { + .owner = THIS_MODULE, + .open = lba_blk_open, + .release = lba_blk_release, + .getgeo = lba_getgeo, +}; + + +int lba_blk_init(struct lba_data *data) +{ + + struct lba_blk_dev *dev; + int err; + if (!data) + BUG(); + + printk(KERN_INFO "LBA block driver v0.1\n"); + lba_major = LBA_MAJOR; + dev = g_lba_blk = kzalloc(sizeof(struct lba_blk_dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->data = data; + register_blkdev(lba_major, "lba"); + + spin_lock_init(&dev->lock); + init_waitqueue_head(&dev->wait_q); + sema_init(&dev->busy, 1); + + dev->queue = blk_alloc_queue(GFP_KERNEL); + if (!dev->queue) + goto out2; + blk_queue_make_request(dev->queue, lba_make_request); + /*dev->queue->unplug_fn = lba_unplug_device;*/ + blk_queue_logical_block_size(dev->queue, 512); + + dev->queue->queuedata = dev; + dev->gd = alloc_disk(32); + if (!dev->gd) { + printk(KERN_ERR "failed to alloc disk\n"); + goto out3; + } + dev->size = data->mdp_size ; + printk(KERN_INFO "%s: set capacity of the device to 0x%x\n", + __func__, dev->size); + dev->gd->major = lba_major; + dev->gd->first_minor = 0; + dev->gd->fops = &lba_blk_ops; + dev->gd->queue = dev->queue; + dev->gd->private_data = dev; + snprintf(dev->gd->disk_name, 8, LBA_NAME); + set_capacity(dev->gd, dev->size); + + dev->thread = kthread_create(lba_thread, dev, "lba-%d", 1); + if (IS_ERR(dev->thread)) { + err = PTR_ERR(dev->thread); + goto out3; + } + wake_up_process(dev->thread); + + add_disk(dev->gd); + + + TAG(); + + return 0; +out3: +out2: + unregister_blkdev(lba_major, "lba"); + return -ENOMEM; +} + +int lba_blk_remove(struct lba_data *data) +{ + + struct lba_blk_dev *dev = g_lba_blk; + + del_gendisk(dev->gd); + kthread_stop(dev->thread); + blk_cleanup_queue(dev->queue); + put_disk(dev->gd); + + unregister_blkdev(lba_major, LBA_NAME); + kfree(dev); + return 0; +} + +MODULE_LICENSE("GPL"); +MODULE_ALIAS_BLOCKDEV_MAJOR(254); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/lba/gpmi.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/lba/gpmi.h @@ -0,0 +1,103 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __DRIVERS_GPMI_H +#define __DRIVERS_GPMI_H + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#ifdef CONFIG_MTD_NAND_GPMI_BCH +#include +#endif + + +struct gpmi_nand_timing { + u8 data_setup; + u8 data_hold; + u8 address_setup; + u8 dsample_time; +}; + +#define GPMI_DMA_MAX_CHAIN 20 /* max DMA commands in chain */ + +#define GPMI_CMD_BUF_SZ 10 +#define GPMI_DATA_BUF_SZ 4096 +#define GPMI_WRITE_BUF_SZ 4096 +#define GPMI_OOB_BUF_SZ 218 + + +struct gpmi_perchip_data { + int valid; + struct nand_chip chip; + struct platform_device *dev; + int index; + + spinlock_t lock; /* protect chain operations */ + struct stmp37xx_circ_dma_chain chain; + struct stmp3xxx_dma_descriptor d[GPMI_DMA_MAX_CHAIN]; + int d_tail; + + struct completion done; + + u8 *cmd_buffer; + dma_addr_t cmd_buffer_handle; + int cmd_buffer_size, cmd_buffer_sz; + + u8 *cmdtail_buffer; + dma_addr_t cmdtail_buffer_handle; + int cmdtail_buffer_size, cmdtail_buffer_sz; + + u8 *write_buffer; + dma_addr_t write_buffer_handle; + int write_buffer_size, write_buffer_sz; + + u8 *data_buffer; + dma_addr_t data_buffer_handle; + u8 *data_buffer_cptr; + int data_buffer_size, data_buffer_sz, bytes2read; + + u8 *oob_buffer; + dma_addr_t oob_buffer_handle; + int oob_buffer_size; + + int cs; + unsigned dma_ch; + + int ecc_oob_bytes, oob_free; + + struct gpmi_nand_timing timing; + + void *p2w, *oob2w, *p2r, *oob2r; + size_t p2w_size, oob2w_size, p2r_size, oob2r_size; + dma_addr_t p2w_dma, oob2w_dma, p2r_dma, oob2r_dma; + unsigned read_memcpy:1, write_memcpy:1, + read_oob_memcpy:1, write_oob_memcpy:1; +}; + + +extern struct gpmi_nand_timing gpmi_safe_timing; + + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-bbt.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-bbt.c @@ -0,0 +1,844 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "gpmi.h" + +/* + * The equivalent of the BOOT_SEARCH_COUNT field in the OTP bits. That is, the + * logarithm to base 2 of the number of strides in a search area (a stride is + * 64 pages). + */ + +static int boot_search_count; + +/* + * The size, in pages, of a search area stride. + * + * This number is dictated by the ROM, so it's not clear why it isn't at least + * const, or perhaps a macro. + */ + +static int stride = 64; + +/* + * Indicates how NCBs are to be comprehended. + * + * A value of 0 indicates a format that is easy to develop and test with, but + * which the ROM can't actually boot. + * + * A value of 1 corresponds to the TA-1 ROM. + * + * A value of 3 corresponds to the TA-3 ROM. + */ + +static int ncb_version = 3; + +module_param(boot_search_count, int, 0400); +module_param(ncb_version, int, 0400); + +/* + * gpmi_read_page - + * + * @mtd: The owning MTD. + * @start: The offset at which to begin reading. + * @data: A pointer to a buff that will receive the data. This pointer may be + * NULL, in which case this function will allocate a buffer. + * @raw: If true, indicates that the caller doesn't want to use ECC. + */ +void *gpmi_read_page(struct mtd_info *mtd, loff_t start, void *data, int raw) +{ + int ret; + struct mtd_oob_ops ops; + + /* If the caller didn't send in his own buffer, allocate one. */ + + if (!data) + data = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); + if (!data) + return NULL; + + /* Check if the caller wants to use ECC. */ + + if (raw) + ops.mode = MTD_OOB_RAW; + else + ops.mode = MTD_OOB_PLACE; + + /* + * Call nand_do_read_ops() to do the dirty work. + */ + + ops.datbuf = data; + ops.len = mtd->writesize; + ops.oobbuf = data + mtd->writesize; + ops.ooblen = mtd->oobsize; + ops.ooboffs = 0; + ret = nand_do_read_ops(mtd, start, &ops); + + if (ret) + return NULL; + return data; +} + +/* + * gpmi_write_ncb - Writes an NCB to the medium. + * + * @mtd: The owning MTD. + * @b: Boot Control Block information. + */ +int gpmi_write_ncb(struct mtd_info *mtd, struct gpmi_bcb_info *b) +{ + struct gpmi_ncb *ncb = NULL, *unencoded_ncb = NULL; + struct nand_chip *chip = mtd->priv; + int err; + loff_t start = 0; + struct mtd_oob_ops ops; + struct erase_info instr; + int ncb_count; + + /* Allocate an I/O buffer for the NCB page, with OOB. */ + + ncb = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); + if (!ncb) { + err = -ENOMEM; + goto out; + } + + /* Allocate a buffer within which we will construct the NCB. */ + + unencoded_ncb = kzalloc(mtd->writesize, GFP_KERNEL); + if (!unencoded_ncb) { + err = -ENOMEM; + goto out; + } + + ops.mode = -1; /* if the value is not set in switch below, + this will cause BUG. Take care. */ + + /* + * Check if we got any Boot Control Block information and, specifically, + * if it contains an NCB for use to use. If not, we need to construct + * our own. + */ + + if (b && b->pre_ncb) + memcpy(unencoded_ncb, b->pre_ncb, b->pre_ncb_size); + else { + memcpy(&unencoded_ncb->fingerprint1, SIG1, sizeof(u32)); + memcpy(&unencoded_ncb->fingerprint2, SIG_NCB, sizeof(u32)); + if (b) + unencoded_ncb->timing = b->timing; + } + + /* Construct the encoded NCB from the unencoded one. */ + + switch (ncb_version) { + case 0: + ops.mode = MTD_OOB_AUTO; + memcpy(ncb, unencoded_ncb, sizeof(*unencoded_ncb)); + break; +#ifdef CONFIG_MTD_NAND_GPMI_TA1 + case 1: + ops.mode = MTD_OOB_RAW; + gpmi_encode_hamming_ncb_22_16(unencoded_ncb, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + ncb, mtd->writesize + mtd->oobsize); + break; +#endif +#ifdef CONFIG_MTD_NAND_GPMI_TA3 + case 3: + ops.mode = MTD_OOB_RAW; + gpmi_encode_hamming_ncb_13_8(unencoded_ncb, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + ncb, mtd->writesize + mtd->oobsize); + break; +#endif + + default: + printk(KERN_ERR"Incorrect ncb_version = %d\n", ncb_version); + err = -EINVAL; + goto out; + } + + /* Construct data structures for the write operation. */ + + ops.datbuf = (u8 *)ncb; + ops.len = mtd->writesize; + ops.oobbuf = (u8 *)ncb + mtd->writesize; + ops.ooblen = mtd->oobsize; + ops.ooboffs = 0; + + ncb_count = 0; + do { + printk(KERN_NOTICE"GPMI: Trying to store NCB at addr %lx\n", + (unsigned long)start); + + /* + * Attempt to erase the block that will contain the current NCB. + */ + + memset(&instr, 0, sizeof(instr)); + instr.mtd = mtd; + instr.addr = start; + instr.len = (1 << chip->phys_erase_shift); + err = nand_erase_nand(mtd, &instr, 0); + + /* + * Check if the erase worked and, if so, write the NCB. + */ + + if (err == 0) { + printk(KERN_NOTICE"GPMI: Erased, storing\n"); + err = nand_do_write_ops(mtd, start, &ops); + printk(KERN_NOTICE"GPMI: NCB update %s (%d).\n", + err ? "failed" : "succeeded", err); + } + + /* + * Move to the next block. + */ + + start += (1 << chip->phys_erase_shift); + ncb_count++; + + } while (err != 0 && ncb_count < 100); + + /* Tell the caller where we ended up putting the NCB. */ + + if (b) + b->ncbblock = start >> chip->bbt_erase_shift; + +out: + + /* Free our buffers. */ + + kfree(ncb); + kfree(unencoded_ncb); + + return 0; +} + +/* + * gpmi_redundancy_check_one - + * + * @pg: + * @dsize: + * @esize: + * @offset: + * @o1: + * @o2: + */ +static int gpmi_redundancy_check_one(u8 *pg, int dsize, int esize, int offset, + int o1, int o2) +{ + int r; + + if (o1 == o2) + return 0; + + r = memcmp(pg + o1 * dsize, pg + o2 * dsize, dsize); + if (r) { + pr_debug("DATA copies %d and %d are different: %d\n", + o1, o2, r); + return r; + } + + r = memcmp(pg + o1 * esize + offset, + pg + o2 * esize + offset, esize); + if (r) { + pr_debug("ECC copies %d and %d are different: %d\n", o1, o2, r); + return r; + } + pr_debug("Both DATA and ECC copies %d and %d are identical\n", o1, o2); + return r; +} + +/* + * gpmi_redundancy_check - + * + * @pg: + * @dsize: + * @esize: + * @ecc_offset: + */ +static int gpmi_redundancy_check(u8 *pg, int dsize, int esize, int ecc_offset) +{ + if (gpmi_redundancy_check_one(pg, dsize, esize, ecc_offset, 0, 1) == 0) + return 0; + if (gpmi_redundancy_check_one(pg, dsize, esize, ecc_offset, 0, 2) == 0) + return 0; + if (gpmi_redundancy_check_one(pg, dsize, esize, ecc_offset, 1, 2) == 0) + return 1; + return -1; +} + +/* + * gpmi_ncb1_redundancy_check_one - + * + * @pg: + * @dsize: + * @esize: + * @offset: + * @o1: + * @o2: + */ +static inline int gpmi_ncb1_redundancy_check(u8 *pg) +{ + return gpmi_redundancy_check(pg, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES, + NAND_HC_ECC_OFFSET_FIRST_PARITY_COPY); +} + +/* + * gpmi_scan_sigmatel_bbt - + * + * @mtd: The owning MTD. + * @nfo: + */ +static int gpmi_scan_sigmatel_bbt( + struct mtd_info *mtd, struct gpmi_bcb_info *nfo) +{ + int page, r; + u8 *pg; + struct gpmi_ncb *result = NULL; + + /* + * If the boot search count is 0, make it 1. + * + * This is old TA1 behavior. The correct answer is to map 0 to 2. + */ + + if (boot_search_count == 0) + boot_search_count = 1; + + /* Check for nonsense. */ + + if (nfo == NULL) + return -EINVAL; + + /* + * Loop through the medium, searching for the NCB. + * + * Note that this loop is wrong. Each stride is 64 pages, so it *should* + * be: + * + * for (page = 0; + * page < ((1<writesize, + pg, ncb_version != 0); + + printk(KERN_NOTICE"GPMI: Checking page 0x%08X\n", page); + + /* Check for NCB version 0. */ + + if (ncb_version == 0) { + if (memcmp(pg, SIG1, SIG_SIZE) != 0) + continue; + printk(KERN_NOTICE"GPMI: Signature found at 0x%08X\n", + page); + result = (struct gpmi_ncb *)pg; + } + +#ifdef CONFIG_MTD_NAND_GPMI_TA1 + if (ncb_version == 1) { + void *dptr, *eccptr; + + if (memcmp(pg, SIG1, SIG_SIZE) != 0) + continue; + printk(KERN_NOTICE"GPMI: Signature found at 0x%08X\n", + page); + + r = gpmi_ncb1_redundancy_check(pg); + + if (r < 0) { + printk(KERN_ERR"GPMI: Oops. All three " + "copies of NCB are differrent!\n"); + continue; + } + + dptr = pg + r * NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES; + eccptr = pg + NAND_HC_ECC_OFFSET_FIRST_PARITY_COPY + + r * NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES; + + if (gpmi_verify_hamming_22_16(dptr, eccptr, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) < 0) { + printk(KERN_ERR"Verification failed.\n"); + continue; + } + result = (struct gpmi_ncb *)pg; + } +#endif + +#ifdef CONFIG_MTD_NAND_GPMI_TA3 + + /* Check for TA-3 NCB handling. */ + + if (ncb_version == 3) { + + /* + * A valid NCB page contains the following: + * + * +------------+ + * . + * . + * Don't Care + * . + * . + * +------------+ 1036 + * | | + * | NCB ECC | + * | | + * +------------+ 524 + * | | + * | NCB | + * | | + * +------------+ 12 + * | Don't Care | + * +------------+ 0 + * + * Within the NCB, there are three "fingerprints": + * + * +-----------+--------------------+ + * | Offset In | | + * | NCB Page | Fingerprint | + * +-----------+--------------------+ + * | 0x0c | "STMP" 0x504d5453 | + * | 0x38 | "NCB " 0x2042434E | + * | 0x8c | "RBIN" 0x4E494252 | + * +-----------+--------------------+ + */ + + /* Check for the first signature. */ + + if (memcmp(pg + 12, SIG1, SIG_SIZE) != 0) + continue; + + printk(KERN_NOTICE"GPMI: Signature found at 0x%08X\n", + page); + + /* Validate the NCB against the ECC stored with it. */ + + if (gpmi_verify_hamming_13_8( + pg + 12, + pg + 524, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) < 0) { + printk(KERN_ERR"Verification failed.\n"); + continue; + } + + /* + * If control arrives here, we found what we were + * looking for. We want to return the address of the + * NCB itself. + */ + + result = (struct gpmi_ncb *)(pg + 12); + + } +#endif + + if (result) { + printk(KERN_NOTICE"GPMI: Valid NCB found " + "at 0x%08x\n", page); + nfo->timing = result->timing; + nfo->ncbblock = page * mtd->writesize; + break; + } + + } + + /* Free the page buffer */ + + kfree(pg); + + return result != NULL; +} + +/** + * gpmi_scan_bbt - Sets up to manage bad blocks. + * + * @mtd: The owning MTD. + */ +int gpmi_scan_bbt(struct mtd_info *mtd) +{ + struct gpmi_bcb_info stmp_bbt; + struct nand_chip *this = mtd->priv; + struct gpmi_nand_data *g = this->priv; + int r; + int numblocks, from, i, ign; + + memset(&stmp_bbt, 0, sizeof(stmp_bbt)); + g->transcribe_bbmark = 0; + + /* + * The following code assumes the NCB uses the full page. This was true + * in the TA1 revision of the boot ROM, but not later versions. + */ + + /* + * Since NCB uses the full page, including BB pattern bits, + * driver has to ignore result of gpmi_block_bad when reading + * these pages. + */ + ign = g->ignorebad; + + g->ignorebad = true; /* strictly speaking, I'd have to hide + * the BBT too. + * But we still scanning it :) */ + + r = gpmi_scan_sigmatel_bbt(mtd, &stmp_bbt); + + /* and then, driver has to restore the setting */ + g->ignorebad = ign; + + /* Check if we found the NCB. */ + + if (!r) { + + /* + * If control arrives here, the medium has no NCB, so we + * presume it is in common format. This means we must transcribe + * the bad block marks. + */ + + g->transcribe_bbmark = !0; + + /* + * Compute the number of blocks in the entire medium. + */ + + numblocks = this->chipsize >> this->bbt_erase_shift; + + /* + * Loop over all the blocks in the medium, transcribing block + * marks as we go. + */ + + from = 0; + printk(KERN_NOTICE"Checking BB on common-formatted flash\n"); + for (i = stmp_bbt.ncbblock + 1; i < numblocks; i++) { + /* check the block and transcribe the bb if needed */ + gpmi_block_bad(mtd, from, 0); + from += (1 << this->bbt_erase_shift); + } + } + + /* Use the reference implementation's BBT scan. */ + + r = nand_default_bbt(mtd); + + /* Check if we were transcribing block marks. */ + + if (g->transcribe_bbmark) { + + /* + * If control arrives here, we set the transcription flag + * because we didn't find an NCB. Now that we've + * transcribed all the bad block marks, we need to write an + * NCB to show that the medium is now formatted for SigmaTel + * Hardware. + */ + + g->transcribe_bbmark = 0; + + /* + * Store the timings we discovered from the NCB in the + * per-device data structure. + */ + + stmp_bbt.timing = gpmi_safe_timing; + + /* Write an NCB to the medium. */ + + r = gpmi_write_ncb(mtd, &stmp_bbt); + + } else { + /* NCB found, and its block should be marked as "good" */ + gpmi_block_mark_as(this, stmp_bbt.ncbblock, 0x00); + } + + return r; +} + +/** + * gpmi_block_bad - Checks if a block is bad, and may transcribes its mark. + * + * @mtd: The owning MTD. + * @ofs: + * @getchip: + */ +int gpmi_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) + +{ + int page, res = 0; + struct nand_chip *chip = mtd->priv; + u16 bad; + struct gpmi_nand_data *g = chip->priv; + int chipnr; + + /* + * Compute the position of the block mark within the OOB (this code + * appears to be wrong). + */ + + int badblockpos = chip->ecc.steps * chip->ecc.bytes; + + if (g->ignorebad) + return 0; + + /* + * Compute the page address of the first page in the block that contains + * the given offset. + */ + + page = (int)(ofs >> chip->page_shift) & chip->pagemask; + + /* + * Compute the chip number that contains the given offset, and select + * it. + */ + + chipnr = (int)(ofs >> chip->chip_shift); + chip->select_chip(mtd, chipnr); + + /* + * If we're transcribing block marks, set the position to that in a + * SigmaTel Hardware-format page. + */ + + if (g->transcribe_bbmark) + /* bad block marks still are on first byte of OOB */ + badblockpos = 0; + + /* Read the block mark. */ + + if (chip->options & NAND_BUSWIDTH_16) { + chip->cmdfunc(mtd, NAND_CMD_READOOB, badblockpos & 0xFE, + page); + bad = cpu_to_le16(chip->read_word(mtd)); + if (badblockpos & 0x1) + bad >>= 8; + if ((bad & 0xFF) != 0xff) + res = 1; + } else { + chip->cmdfunc(mtd, NAND_CMD_READOOB, badblockpos, page); + if (chip->read_byte(mtd) != 0xff) + res = 1; + } + + /* + * If we successfully read the block mark, and we're supposed to + * transcribe it, then do so. + */ + + if (g->transcribe_bbmark && res) + chip->block_markbad(mtd, ofs); + + /* + * Deselect the chip. + */ + + chip->select_chip(mtd, -1); + + return res; +} + +#if defined(CONFIG_STMP3XXX_UNIQUE_ID) +/* + * UID on NAND support + */ +const int uid_size = 256; + +struct gpmi_uid_context { + struct mtd_info *mtd; + struct nand_chip *nand; + u_int32_t start; + u_int32_t size; +}; + +static int gpmi_read_uid(struct gpmi_uid_context *ctx, void *result) +{ + void *pg = NULL; + int page, o; + int status = -ENOENT; + int h_size = gpmi_hamming_ecc_size_22_16(uid_size); + + for (page = ctx->start >> ctx->nand->page_shift; + page < (ctx->start + ctx->size) >> ctx->nand->page_shift;) { + pr_debug("%s: reading page 0x%x\n", __func__, page); + if (gpmi_block_bad(ctx->mtd, page * ctx->mtd->writesize, 0)) { + pr_debug("%s: bad block %x, skipping it\n", + __func__, page * ctx->mtd->writesize); + page += (1 << ctx->nand->phys_erase_shift) + >> ctx->nand->page_shift; + continue; + } + pg = gpmi_read_page(ctx->mtd, page * ctx->mtd->writesize, + pg, 0); + if (pg) + break; + page++; + } + + if (!pg) + return status; + + o = gpmi_redundancy_check(pg, uid_size, h_size, 3 * uid_size); + if (o >= 0) { + if (gpmi_verify_hamming_22_16( + pg + o * uid_size, + pg + 3 * uid_size + h_size, uid_size) >= 0) { + memcpy(result, pg + o * uid_size, uid_size); + status = 0; + } + } + kfree(pg); + return status; +} + +static int gpmi_write_uid(struct gpmi_uid_context *ctx, void *src) +{ + struct mtd_oob_ops ops; + struct erase_info instr; + u8 *data = kzalloc(ctx->mtd->writesize + ctx->mtd->oobsize, GFP_KERNEL); + int h_size = gpmi_hamming_ecc_size_22_16(uid_size); + char ecc[h_size]; + u_int32_t start; + int i; + int err; + + if (!data) + return -ENOMEM; + + gpmi_encode_hamming_22_16(src, uid_size, ecc, h_size); + for (i = 0; i < 3; i++) { + memcpy(data + i * uid_size, src, uid_size); + memcpy(data + 3 * uid_size + i * h_size, ecc, h_size); + } + + ops.mode = MTD_OOB_AUTO; + ops.datbuf = data; + ops.len = ctx->mtd->writesize; + ops.oobbuf = NULL; + ops.ooblen = ctx->mtd->oobsize; + ops.ooboffs = 0; + + start = ctx->start; + + do { + memset(&instr, 0, sizeof(instr)); + instr.mtd = ctx->mtd; + instr.addr = start; + instr.len = (1 << ctx->nand->phys_erase_shift); + err = nand_erase_nand(ctx->mtd, &instr, 0); + if (err == 0) + err = nand_do_write_ops(ctx->mtd, start, &ops); + start += (1 << ctx->nand->phys_erase_shift); + if (start > ctx->start + ctx->size) + break; + } while (err != 0); + + return err; +} + +static ssize_t gpmi_uid_store(void *context, const char *page, + size_t count, int ascii) +{ + u8 data[uid_size]; + + memset(data, 0, sizeof(data)); + memcpy(data, page, uid_size < count ? uid_size : count); + gpmi_write_uid(context, data); + return count; +} + +static ssize_t gpmi_uid_show(void *context, char *page, int ascii) +{ + u8 result[uid_size]; + int i; + char *p = page; + int r; + + r = gpmi_read_uid(context, result); + if (r < 0) + return r; + + if (ascii) { + for (i = 0; i < uid_size; i++) { + if (i % 16 == 0) { + if (i) + *p++ = '\n'; + sprintf(p, "%04X: ", i); + p += strlen(p); + } + sprintf(p, "%02X ", result[i]); + p += strlen(p); + } + *p++ = '\n'; + return p - page; + + } else { + memcpy(page, result, uid_size); + return uid_size; + } +} + +static struct uid_ops gpmi_uid_ops = { + .id_show = gpmi_uid_show, + .id_store = gpmi_uid_store, +}; + +static struct gpmi_uid_context gpmi_uid_context; + +int __init gpmi_uid_init(const char *name, struct mtd_info *mtd, + u_int32_t start, u_int32_t size) +{ + gpmi_uid_context.mtd = mtd; + gpmi_uid_context.nand = mtd->priv; + gpmi_uid_context.start = start; + gpmi_uid_context.size = size; + return uid_provider_init(name, &gpmi_uid_ops, &gpmi_uid_context) ? + 0 : -EFAULT; +} + +void gpmi_uid_remove(const char *name) +{ + uid_provider_remove(name); +} +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-bch.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-bch.c @@ -0,0 +1,453 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * STMP378X BCH hardware ECC engine + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "gpmi.h" + +#define BCH_MAX_NANDS 4 + +static int bch_available(void *context); +static int bch_setup(void *context, int index, int writesize, int oobsize); +static int bch_read(void *context, + int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); +static int bch_write(void *context, + int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); +static int bch_stat(void *ctx, int index, struct mtd_ecc_stats *r); +static int bch_reset(void *context, int index); + +/** + * bch_state_t - Describes the state of the BCH ECC. + * + * @chip: A descriptor the GPMI driver uses to track this ECC. + * @nands: An array of elements, each of which represents a physical chip. + * @stat: Used by the interrupt level to communicate ECC statistics to the + * base level. + * @done: A struct completion used to manage ECC interrupts. + * @writesize: The page data size. + * @oobsize: The page OOB size. + */ + +struct bch_state_t { + struct gpmi_ecc_descriptor chip; + struct { + struct mtd_ecc_stats stat; + struct completion done; + u32 writesize, oobsize; + u32 ecc0, eccn, metasize; + } nands[BCH_MAX_NANDS]; +}; + +/* The singleton struct bch_state_t for the BCH ECC. */ + +static struct bch_state_t state = { + .chip = { + .name = "bch", + .setup = bch_setup, + .stat = bch_stat, + .read = bch_read, + .write = bch_write, + .reset = bch_reset, + }, +}; + +/** + * bch_reset - Resets the BCH. + * + * @context: Context data -- a pointer to a struct bch_state_t. + * @index: ?? + */ +static int bch_reset(void *context, int index) +{ + stmp3xxx_reset_block(REGS_BCH_BASE, true); + __raw_writel(BM_BCH_CTRL_COMPLETE_IRQ_EN, + REGS_BCH_BASE + HW_BCH_CTRL_SET); + return 0; +} + +/** + * bch_stat - Gather statistics and clean up after a read operation. + * + * @context: Context data -- a pointer to a struct bch_state_t. + * @index: ?? + * @r: A statistics structure that will receive the results of the most + * recent operation. + */ +static int bch_stat(void *context, int index, struct mtd_ecc_stats *r) +{ + struct bch_state_t *state = context; + + wait_for_completion(&state->nands[index].done); + + *r = state->nands[index].stat; + state->nands[index].stat.failed = 0; + state->nands[index].stat.corrected = 0; + return 0; +} + +/** + * bch_irq - Interrupt handler for the BCH hardware. + * + * This function gains control when the BCH hardware interrupts. It acknowledges + * the interrupt and gathers status information. + * + * @irq: The interrupt number. + * @context: Context data -- a pointer to a struct bch_state_t. + */ +static irqreturn_t bch_irq(int irq, void *context) +{ + u32 b0, s0, ecc0; + struct mtd_ecc_stats stat; + int r; + struct bch_state_t *state = context; + + s0 = __raw_readl(REGS_BCH_BASE + HW_BCH_STATUS0); + r = (s0 & BM_BCH_STATUS0_COMPLETED_CE) >> 16; + + ecc0 = state->nands[r].ecc0; + stat.corrected = stat.failed = 0; + + b0 = (s0 & BM_BCH_STATUS0_STATUS_BLK0) >> 8; + if (b0 <= ecc0) + stat.corrected += b0; + if (b0 == 0xFE) + stat.failed++; + + if (s0 & BM_BCH_STATUS0_UNCORRECTABLE) + stat.failed++; + + __raw_writel(BM_BCH_CTRL_COMPLETE_IRQ, REGS_BCH_BASE + HW_BCH_CTRL_CLR); + + pr_debug("%s: chip %d, failed %d, corrected %d\n", + __func__, r, + state->nands[r].stat.failed, + state->nands[r].stat.corrected); + state->nands[r].stat.corrected += stat.corrected; + state->nands[r].stat.failed += stat.failed; + complete(&state->nands[r].done); + + return IRQ_HANDLED; +} + +/** + * bch_available - Returns whether the BCH hardware is available. + * + * @context: Context data -- a pointer to a struct bch_state_t. + */ +static int bch_available(void *context) +{ + stmp3xxx_reset_block(REGS_BCH_BASE, true); + return __raw_readl(REGS_BCH_BASE + HW_BCH_BLOCKNAME) == 0x20484342; +} + +/** + * bch_setup - Set up BCH for use. + * + * If the GPMI driver decides to use this ECC, it will call this function once, + * before it starts any operations. + * + * @context: Context data -- a pointer to a struct bch_state_t. + * @index: ?? + * @writesize: The page data size. + * @oobsize: The page OOB size. + */ +static int bch_setup(void *context, int index, int writesize, int oobsize) +{ + struct bch_state_t *state = context; + u32 layout = (u32)REGS_BCH_BASE + 0x80 + index * 0x20; + u32 ecc0, eccn, metasize; + u32 reg; + + switch (writesize) { + case 2048: + ecc0 = 8; + eccn = 8; + metasize = 10; + break; + case 4096: + if (oobsize == 128) { + ecc0 = 8; + eccn = 8; + } else { + ecc0 = 16; + eccn = 16; + } + + metasize = 10; + break; + default: + printk(KERN_ERR"%s: cannot tune BCH for page size %d\n", + __func__, writesize); + return -EINVAL; + } + + state->nands[index].oobsize = oobsize; + state->nands[index].writesize = writesize; + state->nands[index].metasize = metasize; + state->nands[index].ecc0 = ecc0; + state->nands[index].eccn = eccn; + + __raw_writel(BF(writesize/512 - 1, BCH_FLASH0LAYOUT0_NBLOCKS) | + BF(metasize, BCH_FLASH0LAYOUT0_META_SIZE) | + BF(ecc0 >> 1, BCH_FLASH0LAYOUT0_ECC0) | /* for oob */ + BF(512, BCH_FLASH0LAYOUT0_DATA0_SIZE), layout); + __raw_writel(BF(writesize + oobsize, BCH_FLASH0LAYOUT1_PAGE_SIZE) | + BF(eccn >> 1, BCH_FLASH0LAYOUT1_ECCN) | /* for dblock */ + BF(512, BCH_FLASH0LAYOUT1_DATAN_SIZE), layout + 0x10); + + /* + * since driver only supports CS 0..3, layouts are mapped 1:1 : + * FLASHnLAYOUT[1,2] => LAYOUTSELECT[n*2:n2*+1] + */ + reg = __raw_readl(REGS_BCH_BASE + HW_BCH_LAYOUTSELECT); + reg &= ~(0x03 << (index * 2)); + reg |= index << (index * 2); + __raw_writel(reg, REGS_BCH_BASE + HW_BCH_LAYOUTSELECT); + + bch_reset(context, index); + + printk(KERN_DEBUG"%s: CS = %d, LAYOUT = 0x%08X, layout_reg = " + "0x%08x+0x%08x: 0x%08x+0x%08x\n", + __func__, + index, __raw_readl(REGS_BCH_BASE + HW_BCH_LAYOUTSELECT), + layout, layout + 0x10, + __raw_readl(layout), + __raw_readl(layout+0x10)); + return 0; +} + +/** + * bch_read - Fill in a DMA chain to read a page. + * + * @context: Context data -- a pointer to a struct bch_state_t. + * @cs: The chip number to read. + * @chain: The main descriptor of the DMA chain to fill. + * @error: ?? + * @page: Physical address of the target page data buffer. + * @oob: Physical address of the target OOB data buffer. + * + * Return: status of operation -- 0 on success + */ +static int bch_read(void *context, + int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob) +{ + unsigned long readsize = 0; + u32 bufmask = 0; + struct bch_state_t *state = context; + + if (!dma_mapping_error(NULL, oob)) { + bufmask |= BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY; + readsize += state->nands[index].oobsize; + } + if (!dma_mapping_error(NULL, page)) { + bufmask |= (BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_PAGE + & ~BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY); + readsize += state->nands[index].writesize; + } + + printk(KERN_DEBUG"readsize = %ld, bufmask = 0x%X\n", readsize, bufmask); + bch_reset(context, index); + + /* wait for ready */ + chain->command->cmd = + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BF(index, GPMI_CTRL0_CS); + chain->command->alternate = 0; + chain++; + + /* enable BCH and read NAND data */ + chain->command->cmd = + BF(6, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__READ, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(index, GPMI_CTRL0_CS) | + BF(readsize, GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = + BM_GPMI_ECCCTRL_ENABLE_ECC | + BF(0x02, GPMI_ECCCTRL_ECC_CMD) | + BF(bufmask, GPMI_ECCCTRL_BUFFER_MASK); + chain->command->pio_words[3] = readsize; + chain->command->pio_words[4] = !dma_mapping_error(NULL, page) ? page : 0; + chain->command->pio_words[5] = !dma_mapping_error(NULL, oob) ? oob : 0; + chain->command->alternate = 0; + chain++; + + /* disable BCH block */ + chain->command->cmd = + BF(3, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(index, GPMI_CTRL0_CS) | + BF(readsize, GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->alternate = 0; + chain++; + + /* and deassert nand lock */ + chain->command->cmd = + BF(0, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->alternate = 0; + + init_completion(&state->nands[index].done); + return 0; +} + +static int bch_write(void *context, + int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob) +{ + unsigned long writesize = 0; + u32 bufmask = 0; + struct bch_state_t *state = context; + + if (!dma_mapping_error(NULL, oob)) { + bufmask |= BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY; + writesize += state->nands[index].oobsize; + } + if (!dma_mapping_error(NULL, page)) { + bufmask |= (BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_PAGE + & ~BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY); + writesize += state->nands[index].writesize; + } + + pr_debug("writesize = %ld, bufmask = 0x%X\n", writesize, bufmask); + bch_reset(context, index); + + /* enable BCH and write NAND data */ + chain->command->cmd = + BF(6, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WRITE, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(index, GPMI_CTRL0_CS) | + BF(0, GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = + BM_GPMI_ECCCTRL_ENABLE_ECC | + BF(0x03, GPMI_ECCCTRL_ECC_CMD) | + BF(bufmask, GPMI_ECCCTRL_BUFFER_MASK); + chain->command->pio_words[3] = writesize; + chain->command->pio_words[4] = + !dma_mapping_error(NULL, page) ? page : 0; + chain->command->pio_words[5] = + !dma_mapping_error(NULL, oob) ? oob : 0; + chain->command->alternate = 0; + chain++; + + /* emit IRQ */ + chain->command->cmd = + BF(0, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + + init_completion(&state->nands[index].done); + + return 0; +} + +/** + * bch_init - Initialize and register ECC. + * + * The GPMI driver calls this function once, at the beginning of time, whether + * or not it decides to use this ECC. + */ +int __init bch_init(void) +{ + int err; + + /* Check if the BCH hardware is available. */ + + if (!bch_available(&state.chip)) + return -ENXIO; + + /* Give the GPMI driver a descriptor. */ + + gpmi_ecc_add(&state.chip); + + /* Attempt to acquire the BCH interrupt. */ + + err = request_irq(IRQ_BCH, bch_irq, 0, state.chip.name, &state); + if (err) + return err; + + printk(KERN_INFO"%s: initialized\n", __func__); + return 0; +} + +/** + * bch_exit - Shut down and de-register ECC. + */ +void bch_exit(void) +{ + free_irq(IRQ_BCH, &state); + gpmi_ecc_remove(&state.chip); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-base.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-base.c @@ -0,0 +1,3382 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "gpmi.h" +#include "../nand_device_info.h" + +/* Macro definitions for the i.MX23. Some will be different for other SoC's. */ + +#define MAX_DATA_SETUP_CYCLES \ + (BM_GPMI_TIMING0_DATA_SETUP >> BP_GPMI_TIMING0_DATA_SETUP) + +#define MAX_DATA_SAMPLE_DELAY_CYCLES \ + ((uint32_t)(BM_GPMI_CTRL1_RDN_DELAY >> BP_GPMI_CTRL1_RDN_DELAY)) + +/* Right shift value to get the frational GPMI time for data delay. */ +#define GPMI_DELAY_SHIFT (3) + +/* Max GPMI clock period the GPMI DLL can tolerate. */ +#define GPMI_MAX_DLL_PERIOD_NS (32) + +/* + * The threshold for the GPMI clock period above which the DLL requires a divide + * by two. + */ +#define GPMI_DLL_HALF_THRESHOLD_PERIOD_NS (16) + +/* The number of GPMI clock cycles to wait for use of GPMI after DLL enable. */ +#define GPMI_WAIT_CYCLES_AFTER_DLL_ENABLE (64) + +/* The time in nanoseconds required for GPMI data read internal setup. */ +#define GPMI_DATA_SETUP_NS (0) + +/* The time in nanoseconds required for GPMI data read internal setup */ +#define GPMI_MAX_HARDWARE_DELAY_NS ((uint32_t)(16)) + +/* + * Max data delay possible for the GPMI. + * + * Use the min of the time (16 nS) or what will fit in the register. If the GPMI + * clock period is greater than GPMI_MAX_DLL_PERIOD_NS then can't use the delay. + * + * Where: + * + * c is the GPMI clock period in nanoseconds. + * f is the GPMI data sample delay fraction. + * + */ +#define GPMI_GET_MAX_DELAY_NS(c, f) \ + (\ + (c >= GPMI_MAX_DLL_PERIOD_NS) ? 0 :\ + min(GPMI_MAX_HARDWARE_DELAY_NS, \ + ((MAX_DATA_SAMPLE_DELAY_CYCLES * c) / f)) \ + ) + +/* + * Set this variable to a value greater than zero to see varying levels of + * debugging output. + */ + +static int debug; + +/* + * This variable counts the total number of times the driver has copied either + * page data or OOB data from/to a DMA buffer. + */ + +static int copies; + +/* + * Indicates that this driver should attempt to perform DMA directly to/from + * buffers passed into this driver. If false, this driver will use its own + * buffer for DMA and copy data between this buffer and the buffers that are + * passed in. + */ + +static int map_buffers = true; + +static int ff_writes; + +/* + * Forces all OOB reads and writes to NOT use ECC. + */ + +static int raw_mode; + +/* + * Indicates the driver should register an MTD that represents the entire + * medium. + */ + +static int add_mtd_entire; + +/* + * Indicates the driver should register a separate MTD for every physical chip. + */ + +static int add_mtd_chip; + +/* + * Indicates the driver should report that *all* blocks are good. + */ + +static int ignorebad; + +/* + * The maximum number of chips for which the NAND Flash MTD system is allowed to + * scan. + */ + +static int max_chips = 4; + +/* + * + */ + +static long clk = -1; + +/* + * This variable is connected to the "bch" module parameter. If set, it + * indicates the driver should use the BCH hardware block instead of the ECC8 + * hardware block for error correction. + */ + +static int bch = 1; + +/* Forward references. */ + +static int gpmi_nand_init_hw(struct platform_device *pdev, int request_pins); +static void gpmi_nand_release_hw(struct platform_device *pdev); +static int gpmi_dma_exchange(struct gpmi_nand_data *g, + struct stmp3xxx_dma_descriptor *dma); +static void gpmi_read_buf(struct mtd_info *mtd, uint8_t * buf, int len); + +/* + * This structure contains the "safe" GPMI timings that should succeed with any + * NAND Flash device (although, with less-than-optimal performance). + */ + +struct gpmi_nand_timing gpmi_safe_timing = { + .data_setup_in_ns = 80, + .data_hold_in_ns = 60, + .address_setup_in_ns = 25, + .gpmi_sample_delay_in_ns = 6, + .tREA_in_ns = -1, + .tRLOH_in_ns = -1, + .tRHOH_in_ns = -1, +}; + +/* + * ECC layout descriptions for various device geometries. + */ + +static struct nand_ecclayout gpmi_oob_128 = { + .oobfree = { + { + .offset = 2, + .length = 56, + }, { + .length = 0, + }, + }, +}; + +static struct nand_ecclayout gpmi_oob_64 = { + .oobfree = { + { + .offset = 2, + .length = 16, + }, { + .length = 0, + }, + }, +}; + +/** + * gpmi_cycles_ceil - Translates timings in nanoseconds to GPMI clock cycles. + * + * @ntime: The time in nanoseconds. + * @period: The GPMI clock period. + * @min: The minimum allowable number of cycles. + */ +static inline u32 gpmi_cycles_ceil(u32 ntime, u32 period, u32 min) +{ + int k; + + /* + * Compute the minimum number of clock periods that entirely contain the + * given time. + */ + + k = (ntime + period - 1) / period; + + return max(k, (int)min); + +} + +/** + * gpmi_timer_expiry - Inactivity timer expiration handler. + */ +static void gpmi_timer_expiry(unsigned long d) +{ +#ifdef CONFIG_PM + struct gpmi_nand_data *g = (struct gpmi_nand_data *)d; + + pr_debug("%s: timer expired\n", __func__); + del_timer_sync(&g->timer); + + if (g->use_count || + __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL0) & BM_GPMI_CTRL0_RUN) { + g->timer.expires = jiffies + 4 * HZ; + add_timer(&g->timer); + } else { + __raw_writel(BM_GPMI_CTRL0_CLKGATE, + REGS_GPMI_BASE + HW_GPMI_CTRL0_SET); + clk_disable(g->clk); + g->self_suspended = 1; + } +#endif +} + +/** + * gpmi_self_wakeup - wakeup from self-pm light suspend + */ +static void gpmi_self_wakeup(struct gpmi_nand_data *g) +{ +#ifdef CONFIG_PM + int i = 1000; + clk_enable(g->clk); + __raw_writel(BM_GPMI_CTRL0_CLKGATE, REGS_GPMI_BASE + HW_GPMI_CTRL0_CLR); + while (i-- + && __raw_readl(REGS_GPMI_BASE + + HW_GPMI_CTRL0) & BM_GPMI_CTRL0_CLKGATE) ; + + pr_debug("%s: i stopped at %d, data %p\n", __func__, i, g); + g->self_suspended = 0; + g->timer.expires = jiffies + 4 * HZ; + add_timer(&g->timer); +#endif +} + +/** + * gpmi_set_timings - Set GPMI timings. + * + * This function adjusts the GPMI hardware timing registers. If the override + * parameter is NULL, this function will use the timings specified in the per- + * device data. Otherwise, it will apply the given timings. + * + * @g: Per-device data. + * @override: If not NULL, override the timings in the per-device data. + */ +void gpmi_set_timings(struct gpmi_nand_data *g, + struct gpmi_nand_timing *override) +{ + struct gpmi_platform_data *gpd = g->gpd; + struct gpmi_nand_timing target; + + bool dynamic_timing_is_available; + uint32_t gpmi_delay_fraction; + uint32_t gpmi_max_delay_in_ns; + uint32_t address_setup_in_cycles; + uint32_t data_setup_in_ns; + uint32_t data_setup_in_cycles; + uint32_t data_hold_in_cycles; + int32_t data_sample_delay_in_ns; + uint32_t data_sample_delay_in_cycles; + int32_t tEYE; + uint32_t gpmi_clock_period_in_ns = 1000000 / clk_get_rate(g->clk) + 1; + uint32_t min_prop_delay_in_ns = gpd->min_prop_delay_in_ns; + uint32_t max_prop_delay_in_ns = gpd->max_prop_delay_in_ns; + uint32_t busy_timeout_in_cycles; + uint32_t register_image; + uint32_t dll_wait_time_in_us; + + /* Wake up. */ + + if (g->self_suspended) + gpmi_self_wakeup(g); + + g->use_count++; + + /* Figure out where we're getting our new timing. */ + + if (override) + target = *override; + else { + target.data_setup_in_ns = g->device_info.data_setup_in_ns; + target.data_hold_in_ns = g->device_info.data_hold_in_ns; + target.address_setup_in_ns = + g->device_info.address_setup_in_ns; + target.gpmi_sample_delay_in_ns = + g->device_info.gpmi_sample_delay_in_ns; + target.tREA_in_ns = g->device_info.tREA_in_ns; + target.tRLOH_in_ns = g->device_info.tRLOH_in_ns; + target.tRHOH_in_ns = g->device_info.tRHOH_in_ns; + } + + /* Check if dynamic timing information is available. */ + + dynamic_timing_is_available = 0; + + if ((target.tREA_in_ns >= 0) && + (target.tRLOH_in_ns >= 0) && + (target.tRHOH_in_ns >= 0)) + dynamic_timing_is_available = !0; + + /* Reset the DLL and sample delay to known values. */ + + __raw_writel( + BM_GPMI_CTRL1_RDN_DELAY | BM_GPMI_CTRL1_DLL_ENABLE, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + + /* + * Check how fast the GPMI clock is running. If it's running very + * slowly, we'll need to use half-periods. + */ + + if (gpmi_clock_period_in_ns > GPMI_DLL_HALF_THRESHOLD_PERIOD_NS) { + + /* + * The GPMI clock period is high enough that the DLL + * requires a divide by two. + */ + + register_image = __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL1); + register_image |= BM_GPMI_CTRL1_HALF_PERIOD; + __raw_writel(register_image, REGS_GPMI_BASE + HW_GPMI_CTRL1); + + gpmi_delay_fraction = GPMI_DELAY_SHIFT + 1; + + } else { + + gpmi_delay_fraction = GPMI_DELAY_SHIFT; + + } + + gpmi_max_delay_in_ns = + GPMI_GET_MAX_DELAY_NS(gpmi_clock_period_in_ns, + gpmi_delay_fraction); + + busy_timeout_in_cycles = gpmi_cycles_ceil(10000000 / 4096, + gpmi_clock_period_in_ns, 0); + + /* + * The hardware quantizes the setup and hold parameters to intervals of + * the GPMI clock period. + * + * Quantize the setup and hold parameters to the next-highest GPMI clock + * period to make sure we use at least the requested times. + * + * For data setup and data hold, the chip interprets a value of zero as + * the largest amount of delay supported. This is not what's intended by + * a zero in the input parameter, so we modify the zero input parameter + * to the smallest supported value. + */ + + address_setup_in_cycles = gpmi_cycles_ceil(target.address_setup_in_ns, + gpmi_clock_period_in_ns, 0); + data_setup_in_cycles = gpmi_cycles_ceil(target.data_setup_in_ns, + gpmi_clock_period_in_ns, 1); + data_hold_in_cycles = gpmi_cycles_ceil(target.data_hold_in_ns, + gpmi_clock_period_in_ns, 1); + + /* + * Check if dynamic timing is available. If not, we have to use a + * simpler algorithm for computing the values we put in the hardware + * registers. + */ + + if (!dynamic_timing_is_available) { + + /* + * Get the delay time and include the required chip read setup + * time. + */ + + data_sample_delay_in_ns = + target.gpmi_sample_delay_in_ns + GPMI_DATA_SETUP_NS; + + /* + * Extend the data setup time as needed to reduce delay time + * below the max supported by hardware. Also keep it in the + * allowable range + */ + + while ((data_sample_delay_in_ns > gpmi_max_delay_in_ns) && + (data_setup_in_cycles < MAX_DATA_SETUP_CYCLES)) { + + data_setup_in_cycles++; + data_sample_delay_in_ns -= gpmi_clock_period_in_ns; + + if (data_sample_delay_in_ns < 0) + data_sample_delay_in_ns = 0; + + } + + /* + * Compute the number of cycles that corresponds to the data + * sample delay. + */ + + data_sample_delay_in_cycles = + gpmi_cycles_ceil( + gpmi_delay_fraction * data_sample_delay_in_ns, + gpmi_clock_period_in_ns, 0); + + if (data_sample_delay_in_cycles > MAX_DATA_SAMPLE_DELAY_CYCLES) + data_sample_delay_in_cycles = + MAX_DATA_SAMPLE_DELAY_CYCLES; + + /* Go set up the hadware. */ + + goto set_up_the_hardware; + + } + + /* + * If control arrives here, we can use a more dynamic algorithm for + * computing the hardware register values. + */ + + /* Compute the data setup time for the given number of GPMI cycles. */ + + data_setup_in_ns = gpmi_clock_period_in_ns * data_setup_in_cycles; + + /* + * This accounts for chip specific GPMI read setup time on the + * data sample circuit. See i.MX23 reference manual section + * "14.3.4. High-Speed NAND Timing" + */ + + max_prop_delay_in_ns += GPMI_DATA_SETUP_NS; + + /* + * Compute tEYE, the width of the data eye when reading from the + * NAND Flash. + * + * Note that we use the quantized versions of setup and hold because the + * hardware uses these quantized values, and these timings create the + * eye. + * + * end of the eye = min_prop_delay_in_ns + target.tRHOH_in_ns + + * data_setup_in_ns + * start of the eye = max_prop_delay_in_ns + target.tREA_in_ns + */ + + tEYE = ((int)min_prop_delay_in_ns + + (int)target.tRHOH_in_ns + (int)data_setup_in_ns) - + ((int)max_prop_delay_in_ns + (int)target.tREA_in_ns); + + /* + * The eye has to be open. Constrain tEYE to be greater than zero + * and the number of data setup cycles to fit in the timing register. + */ + + while ((tEYE <= 0) && (data_setup_in_cycles < MAX_DATA_SETUP_CYCLES)) { + + /* + * The eye is not open. An increase in data setup time causes a + * coresponding increase to size of the eye. + */ + + /* Give an additional DataSetup cycle. */ + data_setup_in_cycles++; + /* Keep the data setup time in step with the cycles. */ + data_setup_in_ns += gpmi_clock_period_in_ns; + /* And adjust tEYE accordingly. */ + tEYE += gpmi_clock_period_in_ns; + + } + + /* + * Compute the ideal point at which to sample the data at the center of + * the eye. + */ + + /* + * Find the delay to get to the center of the eye, in time units. + * + * Delay for center of the eye: + * + * ((end of the eye + start of the eye) / 2) - data_setup + * + * This simplifies to the following: + */ + + data_sample_delay_in_ns = + ((int)max_prop_delay_in_ns + + (int)target.tREA_in_ns + + (int)min_prop_delay_in_ns + + (int)target.tRHOH_in_ns - + (int)data_setup_in_ns) >> 1; + + /* The chip can't handle a negative parameter for the sample point. */ + + if (data_sample_delay_in_ns < 0) + data_sample_delay_in_ns = 0; + + /* + * Make sure the required delay time does not exceed the max allowed + * value. Also make sure the quantized delay time (at + * data_sample_delay_in_cycles) is within the eye. + * + * Increasing data setup decreases the delay time required to get to + * into the eye. Increasing data setup also moves the rear of the eye + * back, enlarging the eye (helpful in the case where quantized delay + * time does not fall inside the initial eye). + * + * ____ _______________________________________ + * RDN \_______________/ + * + * <----- tEYE ----> + * /-------------------\ + * Read Data ----------------------------< >------ + * \-------------------/ + * ^ ^ ^ tEYE/2 ^ + * | | | | + * |<--DataSetup-->|<----DelayTime----->| | + * | | | | + * | | | + * | |<----Quantized DelayTime---------->| + * | | | + */ + + /* + * Extend the data setup time as needed to reduce delay time below the + * max allowable value. Also keep data setup in the allowable range. + */ + + while ((data_sample_delay_in_ns > gpmi_max_delay_in_ns) && + (data_setup_in_cycles < MAX_DATA_SETUP_CYCLES)) { + + /* Give an additional data setup cycle. */ + data_setup_in_cycles++; + /* Keep the data setup time in step with the cycles. */ + data_setup_in_ns += gpmi_clock_period_in_ns; + /* And adjust tEYE accordingly. */ + tEYE += gpmi_clock_period_in_ns; + + /* + * Decrease the delay time by one half data setup cycle worth, + * to keep in the middle of the eye. + */ + data_sample_delay_in_ns -= (gpmi_clock_period_in_ns >> 1); + + /* Do not allow a delay time less than zero. */ + if (data_sample_delay_in_ns < 0) + data_sample_delay_in_ns = 0; + + } + + /* + * The sample delay time is expressed in the chip in units of fractions + * of GPMI clocks. Convert the delay time to an integer quantity of + * fractional GPMI cycles. + */ + + data_sample_delay_in_cycles = + gpmi_cycles_ceil( + gpmi_delay_fraction * data_sample_delay_in_ns, + gpmi_clock_period_in_ns, 0); + + if (data_sample_delay_in_cycles > MAX_DATA_SAMPLE_DELAY_CYCLES) + data_sample_delay_in_cycles = MAX_DATA_SAMPLE_DELAY_CYCLES; + + #define DSAMPLE_IS_NOT_WITHIN_THE_DATA_EYE \ + (tEYE>>1 < abs((int32_t)((data_sample_delay_in_cycles * \ + gpmi_clock_period_in_ns) / gpmi_delay_fraction) - \ + data_sample_delay_in_ns)) + + /* + * While the quantized delay time is out of the eye, reduce the delay + * time or extend the data setup time to get in the eye. Do not allow + * the number of data setup cycles to exceed the max supported by + * the hardware. + */ + + while (DSAMPLE_IS_NOT_WITHIN_THE_DATA_EYE + && (data_setup_in_cycles < MAX_DATA_SETUP_CYCLES)) { + + if (((data_sample_delay_in_cycles * gpmi_clock_period_in_ns) / + gpmi_delay_fraction) > data_sample_delay_in_ns){ + + /* + * If the quantized delay time is greater than the max + * reach of the eye, decrease the quantized delay time + * to get it into the eye or before the eye. + */ + + if (data_sample_delay_in_cycles != 0) + data_sample_delay_in_cycles--; + + } else { + + /* + * If the quantized delay time is less than the min + * reach of the eye, shift up the sample point by + * increasing data setup. This will also open the eye + * (helping get the quantized delay time in the eye). + */ + + /* Give an additional data setup cycle. */ + data_setup_in_cycles++; + /* Keep the data setup time in step with the cycles. */ + data_setup_in_ns += gpmi_clock_period_in_ns; + /* And adjust tEYE accordingly. */ + tEYE += gpmi_clock_period_in_ns; + + /* + * Decrease the delay time by one half data setup cycle + * worth, to keep in the middle of the eye. + */ + data_sample_delay_in_ns -= (gpmi_clock_period_in_ns>>1); + + /* ...and one less period for the delay time. */ + data_sample_delay_in_ns -= gpmi_clock_period_in_ns; + + /* Keep the delay time from going negative. */ + if (data_sample_delay_in_ns < 0) + data_sample_delay_in_ns = 0; + + /* + * Convert time to GPMI cycles and make sure the number + * of cycles fits in the coresponding hardware register. + */ + + data_sample_delay_in_cycles = + gpmi_cycles_ceil(gpmi_delay_fraction * + data_sample_delay_in_ns, + gpmi_clock_period_in_ns, 0); + + if (data_sample_delay_in_cycles > + MAX_DATA_SAMPLE_DELAY_CYCLES) + data_sample_delay_in_cycles = + MAX_DATA_SAMPLE_DELAY_CYCLES; + + + } + + } + + /* + * Control arrives here when we've computed all the hardware register + * values (using eithe the static or dynamic algorithm) and we're ready + * to apply them. + */ + +set_up_the_hardware: + + /* Set the values in the registers. */ + + dev_dbg(&g->dev->dev, + "%s: tAS %u, tDS %u, tDH %u, tDSAMPLE %u, tBTO %u\n", + __func__, + address_setup_in_cycles, + data_setup_in_cycles, + data_hold_in_cycles, + data_sample_delay_in_cycles, + busy_timeout_in_cycles + ); + + /* Set up all the simple timing parameters. */ + + register_image = + BF(address_setup_in_cycles, GPMI_TIMING0_ADDRESS_SETUP) | + BF(data_setup_in_cycles, GPMI_TIMING0_DATA_SETUP) | + BF(data_hold_in_cycles, GPMI_TIMING0_DATA_HOLD) ; + + __raw_writel(register_image, REGS_GPMI_BASE + HW_GPMI_TIMING0); + + __raw_writel(BF(busy_timeout_in_cycles, + GPMI_TIMING1_DEVICE_BUSY_TIMEOUT), + REGS_GPMI_BASE + HW_GPMI_TIMING1); + + /* + * Hey - pay attention! + * + * DLL_ENABLE must be set to zero when setting RDN_DELAY or + * HALF_PERIOD. + */ + + /* BW_GPMI_CTRL1_DLL_ENABLE(0); */ + __raw_writel(BM_GPMI_CTRL1_DLL_ENABLE, + REGS_GPMI_BASE+HW_GPMI_CTRL1_CLR); + + if ((data_sample_delay_in_cycles == 0) || + (gpmi_clock_period_in_ns > GPMI_MAX_DLL_PERIOD_NS)) { + + /* + * If no delay is desired, or if the GPMI clock period is out of + * supported range, then don't enable the delay. + */ + + /* BW_GPMI_CTRL1_RDN_DELAY(0); */ + __raw_writel(BM_GPMI_CTRL1_RDN_DELAY, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + /* BW_GPMI_CTRL1_HALF_PERIOD(0); */ + __raw_writel(BM_GPMI_CTRL1_HALF_PERIOD, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + + } else { + + /* + * Set the delay and enable the DLL. GPMI_CTRL1_HALF_PERIOD is + * assumed to have already been set properly. + */ + + /* BW_GPMI_CTRL1_RDN_DELAY(data_sample_delay_in_cycles); */ + register_image = __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL1); + register_image &= ~BM_GPMI_CTRL1_RDN_DELAY; + register_image |= + (data_sample_delay_in_cycles << BP_GPMI_CTRL1_RDN_DELAY) + & BM_GPMI_CTRL1_RDN_DELAY; + __raw_writel(register_image, REGS_GPMI_BASE + HW_GPMI_CTRL1); + + /* BW_GPMI_CTRL1_DLL_ENABLE(1); */ + __raw_writel(BM_GPMI_CTRL1_DLL_ENABLE, + REGS_GPMI_BASE + HW_GPMI_CTRL1_SET); + + /* + * After we enable the GPMI DLL, we have to wait + * GPMI_WAIT_CYCLES_AFTER_DLL_ENABLE GPMI clock cycles before + * we can use the GPMI interface. + * + * Calculate the amount of time we need to wait, in + * microseconds. + */ + + /* + * Calculate the wait time and convert from nanoseconds to + * microseconds. + */ + + dll_wait_time_in_us = + (gpmi_clock_period_in_ns * + GPMI_WAIT_CYCLES_AFTER_DLL_ENABLE) / 1000; + + if (!dll_wait_time_in_us) + dll_wait_time_in_us = 1; + + /* + * Wait for the DLL to settle. + */ + + udelay(dll_wait_time_in_us); + + } + + /* Allow the driver to go back to sleep, if it wants to. */ + + g->use_count--; + +} + +/** + * bch_mode - Return a hardware register value that selects BCH. + */ +static inline u32 bch_mode(void) +{ + u32 c1 = 0; + +#ifdef CONFIG_MTD_NAND_GPMI_BCH + if (bch) + c1 |= BM_GPMI_CTRL1_BCH_MODE; +#endif + return c1; +} + +/** + * gpmi_nand_init_hw - Initialize the hardware. + * + * @pdev: A pointer to the owning platform device. + * @request_pins: Indicates this function should request GPMI pins. + * + * Initialize GPMI hardware and set default (safe) timings for NAND access. + * Returns error code or 0 on success + */ +static int gpmi_nand_init_hw(struct platform_device *pdev, int request_pins) +{ + struct gpmi_nand_data *g = platform_get_drvdata(pdev); + struct gpmi_platform_data *gpd = + (struct gpmi_platform_data *)pdev->dev.platform_data; + int err = 0; + + /* Try to get the GPMI clock. */ + + g->clk = clk_get(NULL, "gpmi"); + if (IS_ERR(g->clk)) { + err = PTR_ERR(g->clk); + dev_err(&pdev->dev, "Can't get GPMI clock\n"); + goto out; + } + + /* Turn on the GPMI clock. */ + + clk_enable(g->clk); + + /* + * Check the clock rate setting. We don't allow this value to go below + * 24KHz because some chips don't work in that regime. + */ + + if (clk <= 0) + clk = 24000; + + /* + * Set the GPMI clock rate and record the value that was actually + * implemented. + */ + + clk_set_rate(g->clk, clk); + + clk = clk_get_rate(g->clk); + + /* Check if we're supposed to ask for our pins. */ + + if (request_pins) + gpd->pinmux_handler(1); + + /* Reset the GPMI block. */ + + stmp3xxx_reset_block(HW_GPMI_CTRL0 + REGS_GPMI_BASE, 1); + + /* this CLEARS reset, despite of its name */ + __raw_writel(BM_GPMI_CTRL1_DEV_RESET, + REGS_GPMI_BASE + HW_GPMI_CTRL1_SET); + + /* IRQ polarity */ + __raw_writel(BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY, + REGS_GPMI_BASE + HW_GPMI_CTRL1_SET); + + /* + * Select the ECC to use. The bch_mode() function returns a value that + * selects whichever hardware is appropriate (q.v.). + */ + __raw_writel(bch_mode(), REGS_GPMI_BASE + HW_GPMI_CTRL1_SET); + + /* Choose NAND mode (1 means ATA, 0 - NAND */ + __raw_writel(BM_GPMI_CTRL1_GPMI_MODE, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + +out: + return err; +} + +/** + * gpmi_nand_release_hw - free the hardware + * + * @pdev: pointer to platform device + * + * In opposite to gpmi_nand_init_hw, release all acquired resources. + */ +static void gpmi_nand_release_hw(struct platform_device *pdev) +{ + struct gpmi_nand_data *g = platform_get_drvdata(pdev); + struct gpmi_platform_data *gpd = + (struct gpmi_platform_data *)pdev->dev.platform_data; + + __raw_writel(BM_GPMI_CTRL0_SFTRST, REGS_GPMI_BASE + HW_GPMI_CTRL0_SET); + + clk_disable(g->clk); + clk_put(g->clk); + gpd->pinmux_handler(0); +} + +/** + * gpmi_dma_is_error - + * + * @g: Per-device data structure. + */ +static int gpmi_dma_is_error(struct gpmi_nand_data *g) +{ + /* u32 n = __raw_readl(g->dma_ch); */ + + /* CURrent DMA command */ + u32 c = __raw_readl(REGS_APBH_BASE + + HW_APBH_CHn_NXTCMDAR(g->cchip->dma_ch)); + + if (c == g->cchip->error.handle) { + pr_debug("%s: dma chain has reached error terminator\n", + __func__); + return -EIO; + } + return 0; +} + +/** + * gpmi_dma_exchange - Run DMA to exchange with NAND chip + * + * @g: Per-device data structure. + * @d: DMA descriptor. + * + * Run DMA and wait for completion + */ +static int gpmi_dma_exchange(struct gpmi_nand_data *g, + struct stmp3xxx_dma_descriptor *d) +{ + struct platform_device *pdev = g->dev; + unsigned long timeout; + int err; + + if (g->self_suspended) + gpmi_self_wakeup(g); + g->use_count++; + + if (!g->regulator) { + g->regulator = regulator_get(&pdev->dev, "mmc_ssp-2"); + if (g->regulator && !IS_ERR(g->regulator)) + regulator_set_mode(g->regulator, REGULATOR_MODE_NORMAL); + else + g->regulator = NULL; + } + + if (g->regulator) + regulator_set_current_limit(g->regulator, g->reg_uA, g->reg_uA); + + init_completion(&g->done); + stmp3xxx_dma_enable_interrupt(g->cchip->dma_ch); + stmp3xxx_dma_go(g->cchip->dma_ch, d ? d : g->cchip->d, 1); + + timeout = wait_for_completion_timeout(&g->done, msecs_to_jiffies(1000)); + err = (timeout <= 0) ? -ETIMEDOUT : gpmi_dma_is_error(g); + + if (err) + printk(KERN_ERR "%s: error %d, CS = %d, channel %d\n", + __func__, err, g->cchip->cs, g->cchip->dma_ch); + + stmp3xxx_dma_reset_channel(g->cchip->dma_ch); + stmp3xxx_dma_clear_interrupt(g->cchip->dma_ch); + + if (g->regulator) + regulator_set_current_limit(g->regulator, 0, 0); + + mod_timer(&g->timer, jiffies + 4 * HZ); + g->use_count--; + + return err; +} + +/** + * gpmi_ecc_read_page - Replacement for nand_read_page + * + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: buffer to store read data + */ +static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t * buf) +{ + struct gpmi_nand_data *g = chip->priv; + struct mtd_ecc_stats stats; + dma_addr_t bufphys, oobphys; + int err; + + bufphys = oobphys = ~0; + + if (map_buffers && virt_addr_valid(buf)) + bufphys = dma_map_single(&g->dev->dev, buf, + mtd->writesize, DMA_FROM_DEVICE); + if (dma_mapping_error(&g->dev->dev, bufphys)) + bufphys = g->data_buffer_handle; + + if (map_buffers) + oobphys = dma_map_single(&g->dev->dev, chip->oob_poi, + mtd->oobsize, DMA_FROM_DEVICE); + if (dma_mapping_error(&g->dev->dev, oobphys)) + oobphys = g->oob_buffer_handle; + + /* ECC read */ + (void)g->hc->read(g->hc, g->selected_chip, g->cchip->d, + g->cchip->error.handle, bufphys, oobphys); + + err = gpmi_dma_exchange(g, NULL); + + g->hc->stat(g->hc, g->selected_chip, &stats); + + if (stats.failed || stats.corrected) { + + pr_debug("%s: ECC failed=%d, corrected=%d\n", + __func__, stats.failed, stats.corrected); + + g->mtd.ecc_stats.failed += stats.failed; + g->mtd.ecc_stats.corrected += stats.corrected; + } + + if (!dma_mapping_error(&g->dev->dev, oobphys)) { + if (oobphys != g->oob_buffer_handle) + dma_unmap_single(&g->dev->dev, oobphys, + mtd->oobsize, DMA_FROM_DEVICE); + else { + memcpy(chip->oob_poi, g->oob_buffer, mtd->oobsize); + copies++; + } + } + + if (!dma_mapping_error(&g->dev->dev, bufphys)) { + if (bufphys != g->data_buffer_handle) + dma_unmap_single(&g->dev->dev, bufphys, + mtd->writesize, DMA_FROM_DEVICE); + else { + memcpy(buf, g->data_buffer, mtd->writesize); + copies++; + } + } + + /* always fill the (possible ECC bytes with FF) */ + memset(chip->oob_poi + g->oob_free, 0xff, mtd->oobsize - g->oob_free); + + return err; +} + +/** + * is_ff - Checks if all the bits in a buffer are set. + * + * @buffer: The buffer of interest. + * @size: The size of the buffer. + */ +static inline int is_ff(const u8 * buffer, size_t size) +{ + while (size--) { + if (*buffer++ != 0xff) + return 0; + } + return 1; +} + +/** + * gpmi_ecc_write_page - replacement for nand_write_page + * + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: data buffer + */ +static void gpmi_ecc_write_page(struct mtd_info *mtd, + struct nand_chip *chip, const uint8_t * buf) +{ + struct gpmi_nand_data *g = chip->priv; + dma_addr_t bufphys, oobphys; + int err; + + /* if we can't map it, copy it */ + bufphys = oobphys = ~0; + + if (map_buffers && virt_addr_valid(buf)) + bufphys = dma_map_single(&g->dev->dev, + (void *)buf, mtd->writesize, + DMA_TO_DEVICE); + if (dma_mapping_error(&g->dev->dev, bufphys)) { + bufphys = g->data_buffer_handle; + memcpy(g->data_buffer, buf, mtd->writesize); + copies++; + } + + /* if OOB is all FF, leave it as such */ + if (!is_ff(chip->oob_poi, mtd->oobsize) || bch_mode()) { + if (map_buffers) + oobphys = dma_map_single(&g->dev->dev, chip->oob_poi, + mtd->oobsize, DMA_TO_DEVICE); + if (dma_mapping_error(&g->dev->dev, oobphys)) { + oobphys = g->oob_buffer_handle; + memcpy(g->oob_buffer, chip->oob_poi, mtd->oobsize); + copies++; + } + } else + ff_writes++; + + /* call ECC */ + g->hc->write(g->hc, g->selected_chip, g->cchip->d, + g->cchip->error.handle, bufphys, oobphys); + + err = gpmi_dma_exchange(g, NULL); + if (err < 0) + printk(KERN_ERR "%s: dma error\n", __func__); + + if (!dma_mapping_error(&g->dev->dev, oobphys)) { + if (oobphys != g->oob_buffer_handle) + dma_unmap_single(&g->dev->dev, oobphys, mtd->oobsize, + DMA_TO_DEVICE); + } + + if (bufphys != g->data_buffer_handle) + dma_unmap_single(&g->dev->dev, bufphys, mtd->writesize, + DMA_TO_DEVICE); +} + +/** + * gpmi_write_buf - replacement for nand_write_buf + * + * @mtd: MTD device + * @buf: data buffer + * @len: length of the data buffer + */ +static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t * buf, int len) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + struct stmp3xxx_dma_descriptor *chain = g->cchip->d; + dma_addr_t phys; + int err; + + BUG_ON(len > mtd->writesize); + + phys = ~0; + + if (map_buffers && virt_addr_valid(buf)) + phys = dma_map_single(&g->dev->dev, + (void *)buf, len, DMA_TO_DEVICE); + if (dma_mapping_error(&g->dev->dev, phys)) { + phys = g->write_buffer_handle; + memcpy(g->write_buffer, buf, len); + copies++; + } + + /* Write plain data */ + chain->command->cmd = + BF(len, APBH_CHn_CMD_XFER_COUNT) | + BF(4, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__DMA_READ, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WRITE, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + BF(g->selected_chip, GPMI_CTRL0_CS) | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BF(len, GPMI_CTRL0_XFER_COUNT); + + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->pio_words[3] = 0; + chain->command->buf_ptr = phys; + + err = gpmi_dma_exchange(g, NULL); + if (err) + printk(KERN_ERR "%s: dma error\n", __func__); + + if (phys != g->write_buffer_handle) + dma_unmap_single(&g->dev->dev, phys, len, DMA_TO_DEVICE); + + if (debug >= 2) + print_hex_dump_bytes("WBUF ", DUMP_PREFIX_OFFSET, buf, len); +} + +/** + * gpmi_read_buf - replacement for nand_read_buf + * + * @mtd: MTD device + * @buf: pointer to the buffer + * @len: size of the buffer + */ +static void gpmi_read_buf(struct mtd_info *mtd, uint8_t * buf, int len) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + struct stmp3xxx_dma_descriptor *chain; + dma_addr_t phys; + int err; + + phys = ~0; + + if (map_buffers && virt_addr_valid(buf)) + phys = dma_map_single(&g->dev->dev, buf, len, DMA_FROM_DEVICE); + if (dma_mapping_error(&g->dev->dev, phys)) + phys = g->read_buffer_handle; + + chain = g->cchip->d; + + /* read data */ + chain->command->cmd = + BF(len, APBH_CHn_CMD_XFER_COUNT) | + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__DMA_WRITE, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__READ, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + BF(g->selected_chip, GPMI_CTRL0_CS) | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BF(len, GPMI_CTRL0_XFER_COUNT); + chain->command->buf_ptr = phys; + chain++; + + chain->command->cmd = + BF(4, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BM_GPMI_CTRL0_LOCK_CS | BF(g->selected_chip, GPMI_CTRL0_CS); + chain->command->pio_words[1] = + chain->command->pio_words[2] = chain->command->pio_words[3] = 0; + chain->command->buf_ptr = 0; + + err = gpmi_dma_exchange(g, NULL); + if (err) + printk(KERN_ERR "%s: dma error\n", __func__); + + if (phys != g->read_buffer_handle) + dma_unmap_single(&g->dev->dev, phys, len, DMA_FROM_DEVICE); + else { + memcpy(buf, g->read_buffer, len); + copies++; + } + + if (debug >= 2) + print_hex_dump_bytes("RBUF ", DUMP_PREFIX_OFFSET, buf, len); +} + +/** + * gpmi_read_byte - replacement for nand_read_byte + * @mtd: MTD device + * + * Uses gpmi_read_buf to read 1 byte from device + */ +static u8 gpmi_read_byte(struct mtd_info *mtd) +{ + u8 b; + + gpmi_read_buf(mtd, (uint8_t *) & b, 1); + return b; +} + +/** + * gpmi_read_word - replacement for nand_read_word + * @mtd: The owning MTD. + * + * Uses gpmi_read_buf to read 2 bytes from device + */ +static u16 gpmi_read_word(struct mtd_info *mtd) +{ + u16 w; + + gpmi_read_buf(mtd, (uint8_t *) & w, sizeof(u16)); + return w; +} + +/** + * gpmi_erase - Hook for erase operations at the MTD level. + * + * We install this function in the "erase" function pointer of the owning + * struct mtd_info. Thus, this function will get called *instead* of the + * function that the NAND Flash MTD system installed (see nand_erase()). + * + * We do this because, if an erase operation fails, then the block should be + * marked bad. Unfortunately, the NAND Flash MTD code doesn't do this. Since + * we've "hooked" the call, we can "override" the base NAND Flash MTD behavior + * and make sure the proper marking gets done before we return to the + * original caller. + * + * @mtd: MTD device + * @instr: erase instruction + */ +int gpmi_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + int rc; + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + struct gpmi_nand_data *data = platform_get_drvdata(g->dev); + + if (g->self_suspended) + gpmi_self_wakeup(data); + g->use_count++; + + rc = nand_erase_nand(mtd, instr, 0); + + if (rc == -EIO) /* block cannot be erased */ + gpmi_block_mark_as(chip, + (instr->addr >> chip->bbt_erase_shift), + 0x01); + + mod_timer(&g->timer, jiffies + 4 * HZ); + g->use_count--; + return rc; +} + +/** + * gpmi_dev_ready - Wait until the medium is ready. + * + * This function is supposed to return the instantaneous state of the medium. + * Instead, it actually waits for the medium to be ready. This is mostly + * harmless, but isn't actually correct. + * + * @mtd: The owning MTD. + */ +static int gpmi_dev_ready(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + struct stmp3xxx_dma_descriptor *chain = g->cchip->d; + int ret; + + /* wait for ready */ + chain->command->cmd = + BF(4, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, + GPMI_CTRL0_ADDRESS) | BF(g->selected_chip, GPMI_CTRL0_CS); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->pio_words[3] = 0; + chain->command->buf_ptr = 0; + chain++; + + ret = gpmi_dma_exchange(g, NULL); + if (ret != 0) + printk(KERN_ERR "gpmi: gpmi_dma_exchange() timeout!\n"); + return ret == 0; +} + +/** + * gpmi_hwcontrol - Send command/address byte to the NAND Flash. + * + * This is the function that we install in the cmd_ctrl function pointer of the + * owning struct nand_chip. The only functions in the reference implementation + * that use these functions pointers are cmdfunc and select_chip. + * + * In this driver, we implement our own select_chip, so this function will only + * be called by the reference implementation's cmdfunc. For this reason, we can + * ignore the chip enable bit and concentrate only on sending bytes to the + * NAND Flash. + * + * @mtd: The owning MTD. + * @cmd: The command byte. + * @ctrl: Control flags. + */ +static void gpmi_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + struct stmp3xxx_dma_descriptor *chain = g->cchip->d; + int ret; + + /* + * Every operation begins with a series of command and address bytes, + * which are distinguished by either the Address Latch Enable (ALE) or + * Command Latch Enable (CLE) being asserted. Finally, when the caller + * is actually ready to execute the command, he will deassert both latch + * enables. + * + * Rather than run a separate DMA operation for every single byte, we + * queue them up and run a single DMA operation for the entire series + * of command and data bytes. + */ + + if ((ctrl & (NAND_ALE | NAND_CLE))) { + if (cmd != NAND_CMD_NONE) + g->cmd_buffer[g->cmd_buffer_sz++] = cmd; + return; + } + + /* + * If control arrives here, the caller has deasserted both the ALE and + * CLE, which means he's ready to run an operation. Check if we actually + * have any bytes to send. + */ + + if (g->cmd_buffer_sz == 0) + return; + + /* output command */ + chain->command->cmd = + BF(g->cmd_buffer_sz, APBH_CHn_CMD_XFER_COUNT) | + BF(3, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__DMA_READ, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WRITE, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + BF(g->selected_chip, GPMI_CTRL0_CS) | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_CLE, GPMI_CTRL0_ADDRESS) | + BF(g->cmd_buffer_sz, GPMI_CTRL0_XFER_COUNT); + if (g->cmd_buffer_sz > 0) + chain->command->pio_words[0] |= BM_GPMI_CTRL0_ADDRESS_INCREMENT; + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->buf_ptr = g->cmd_buffer_handle; + chain++; + + /* emit IRQ */ + chain->command->cmd = + BF(0, APBH_CHn_CMD_CMDWORDS) | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND) | + BM_APBH_CHn_CMD_WAIT4ENDCMD; + chain++; + + /* last in chain get the irq bit set */ + chain[-1].command->cmd |= BM_APBH_CHn_CMD_IRQONCMPLT; + + if (debug >= 3) + print_hex_dump(KERN_INFO, "CMD ", DUMP_PREFIX_OFFSET, 16, 1, + g->cmd_buffer, g->cmd_buffer_sz, 1); + + ret = gpmi_dma_exchange(g, NULL); + if (ret != 0) { + printk(KERN_ERR "%s: chip %d, dma error %d on the command:\n", + __func__, g->selected_chip, ret); + print_hex_dump(KERN_INFO, "CMD ", DUMP_PREFIX_OFFSET, 16, 1, + g->cmd_buffer, g->cmd_buffer_sz, 1); + } + + gpmi_dev_ready(mtd); + + g->cmd_buffer_sz = 0; +} + +/** + * gpmi_alloc_buffers - allocate DMA buffers for one chip + * + * @pdev: GPMI platform device + * @g: pointer to structure associated with NAND chip + * + * Allocate buffer using dma_alloc_coherent + */ +static int gpmi_alloc_buffers(struct platform_device *pdev, + struct gpmi_nand_data *g) +{ + g->cmd_buffer = dma_alloc_coherent(&pdev->dev, + g->cmd_buffer_size, + &g->cmd_buffer_handle, GFP_DMA); + if (!g->cmd_buffer) + goto out1; + + g->write_buffer = dma_alloc_coherent(&pdev->dev, + g->write_buffer_size * 2, + &g->write_buffer_handle, GFP_DMA); + if (!g->write_buffer) + goto out2; + + g->read_buffer = g->write_buffer + g->write_buffer_size; + g->read_buffer_handle = g->write_buffer_handle + g->write_buffer_size; + + g->data_buffer = dma_alloc_coherent(&pdev->dev, + g->data_buffer_size, + &g->data_buffer_handle, GFP_DMA); + if (!g->data_buffer) + goto out3; + + g->oob_buffer = dma_alloc_coherent(&pdev->dev, + g->oob_buffer_size, + &g->oob_buffer_handle, GFP_DMA); + if (!g->oob_buffer) + goto out4; + + g->verify_buffer = kzalloc(2 * (g->data_buffer_size + + g->oob_buffer_size), GFP_KERNEL); + if (!g->verify_buffer) + goto out5; + + return 0; + +out5: + dma_free_coherent(&pdev->dev, g->oob_buffer_size, + g->oob_buffer, g->oob_buffer_handle); +out4: + dma_free_coherent(&pdev->dev, g->data_buffer_size, + g->data_buffer, g->data_buffer_handle); +out3: + dma_free_coherent(&pdev->dev, g->write_buffer_size * 2, + g->write_buffer, g->write_buffer_handle); +out2: + dma_free_coherent(&pdev->dev, g->cmd_buffer_size, + g->cmd_buffer, g->cmd_buffer_handle); +out1: + return -ENOMEM; +} + +/** + * gpmi_free_buffers - free buffers allocated by gpmi_alloc_buffers + * + * @pdev: platform device + * @g: pointer to structure associated with NAND chip + * + * Deallocate buffers on exit + */ +static void gpmi_free_buffers(struct platform_device *pdev, + struct gpmi_nand_data *g) +{ + kfree(g->verify_buffer); + dma_free_coherent(&pdev->dev, g->oob_buffer_size, + g->oob_buffer, g->oob_buffer_handle); + dma_free_coherent(&pdev->dev, g->write_buffer_size * 2, + g->write_buffer, g->write_buffer_handle); + dma_free_coherent(&pdev->dev, g->cmd_buffer_size, + g->cmd_buffer, g->cmd_buffer_handle); + dma_free_coherent(&pdev->dev, g->data_buffer_size, + g->data_buffer, g->data_buffer_handle); +} + +/* only used in SW-ECC or NO-ECC cases */ +static int gpmi_verify_buf(struct mtd_info *mtd, const uint8_t * buf, int len) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + + chip->read_buf(mtd, g->verify_buffer, len); + + if (memcmp(buf, g->verify_buffer, len)) + return -EFAULT; + + return 0; +} + +/** + * gpmi_ecc_read_oob - replacement for nand_read_oob + * + * @mtd: MTD device + * @chip: mtd->priv + * @page: page address + * @sndcmd: flag indicates that command should be sent + */ +int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page, int sndcmd) +{ + struct gpmi_nand_data *g = chip->priv; + loff_t oob_offset = 0; + struct mtd_ecc_stats stats; + dma_addr_t bufphys, oobphys; + int ecc; + int ret; + + ecc = g->raw_oob_mode == 0 && raw_mode == 0; + + if (sndcmd) { + if (!bch_mode() || !ecc) + oob_offset = mtd->writesize; + if (likely(ecc) && !bch_mode()) + oob_offset += chip->ecc.bytes * chip->ecc.steps; + chip->cmdfunc(mtd, NAND_CMD_READ0, oob_offset, page); + sndcmd = 0; + } + + if (unlikely(!ecc)) { + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); + return 1; + } + + oobphys = ~0; + + if (map_buffers) + oobphys = dma_map_single(&g->dev->dev, chip->oob_poi, + mtd->oobsize, DMA_FROM_DEVICE); + if (dma_mapping_error(&g->dev->dev, oobphys)) + oobphys = g->oob_buffer_handle; + + bufphys = ~0; + + if (map_buffers && bch_mode()) + bufphys = dma_map_single(&g->dev->dev, chip->buffers->databuf, + mtd->writesize, DMA_FROM_DEVICE); + if (bch_mode() && dma_mapping_error(&g->dev->dev, bufphys)) + bufphys = g->data_buffer_handle; + + /* ECC read */ + (void)g->hc->read(g->hc, g->selected_chip, g->cchip->d, + g->cchip->error.handle, bufphys, oobphys); + + ret = gpmi_dma_exchange(g, NULL); + + g->hc->stat(g->hc, g->selected_chip, &stats); + + if (stats.failed || stats.corrected) { + + printk(KERN_DEBUG "%s: ECC failed=%d, corrected=%d\n", + __func__, stats.failed, stats.corrected); + + g->mtd.ecc_stats.failed += stats.failed; + g->mtd.ecc_stats.corrected += stats.corrected; + } + + if (oobphys != g->oob_buffer_handle) + dma_unmap_single(&g->dev->dev, oobphys, mtd->oobsize, + DMA_FROM_DEVICE); + else { + memcpy(chip->oob_poi, g->oob_buffer, mtd->oobsize); + copies++; + } + + if (bufphys != g->data_buffer_handle) + dma_unmap_single(&g->dev->dev, bufphys, mtd->writesize, + DMA_FROM_DEVICE); + + + /* fill rest with ff */ + memset(chip->oob_poi + g->oob_free, 0xff, mtd->oobsize - g->oob_free); + + return ret ? ret : 1; +} + +/** + * gpmi_ecc_write_oob - replacement for nand_write_oob + * + * @mtd: MTD device + * @chip: mtd->priv + * @page: page address + */ +static int gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + int status = 0; + struct gpmi_nand_data *g = chip->priv; + loff_t oob_offset = 0; + dma_addr_t oobphys, bufphys; + int ecc; + int err = 0; + + /* if OOB is all FF, leave it as such */ + if (is_ff(chip->oob_poi, mtd->oobsize)) { + ff_writes++; + + pr_debug("%s: Skipping an empty page 0x%x (0x%x)\n", + __func__, page, page << chip->page_shift); + return 0; + } + + ecc = g->raw_oob_mode == 0 && raw_mode == 0; + + /* Send command to start input data */ + if (!bch_mode() || !ecc) { + oob_offset = mtd->writesize; + if (likely(ecc)) { + oob_offset += chip->ecc.bytes * chip->ecc.steps; + memset(chip->oob_poi + g->oob_free, 0xff, + mtd->oobsize - g->oob_free); + } + } + + chip->cmdfunc(mtd, NAND_CMD_SEQIN, oob_offset, page); + + /* call ECC */ + if (likely(ecc)) { + + oobphys = ~0; + + if (map_buffers) + oobphys = dma_map_single(&g->dev->dev, chip->oob_poi, + mtd->oobsize, DMA_TO_DEVICE); + if (dma_mapping_error(&g->dev->dev, oobphys)) { + oobphys = g->oob_buffer_handle; + memcpy(g->oob_buffer, chip->oob_poi, mtd->oobsize); + copies++; + } + + bufphys = ~0; + + if (bch_mode()) { + bufphys = g->data_buffer_handle; + memset(g->data_buffer, 0xff, mtd->writesize); + } + + g->hc->write(g->hc, g->selected_chip, g->cchip->d, + g->cchip->error.handle, bufphys, oobphys); + + err = gpmi_dma_exchange(g, NULL); + } else + chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); + + /* Send command to program the OOB data */ + chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); + + /* ..and wait for result */ + status = chip->waitfunc(mtd, chip); + + if (likely(ecc)) { + if (oobphys != g->oob_buffer_handle) + dma_unmap_single(&g->dev->dev, oobphys, mtd->oobsize, + DMA_TO_DEVICE); + } + + if (status & NAND_STATUS_FAIL) { + pr_debug("%s: NAND_STATUS_FAIL\n", __func__); + return -EIO; + } + + return err; +} + +/** + * gpmi_irq - IRQ handler + * + * @irq: Interrupt number. + * @context: IRQ context, pointer to gpmi_nand_data + */ +static irqreturn_t gpmi_irq(int irq, void *context) +{ + struct gpmi_nand_data *g = context; + + if (stmp3xxx_dma_is_interrupt(g->cchip->dma_ch)) { + stmp3xxx_dma_clear_interrupt(g->cchip->dma_ch); + complete(&g->done); + } + __raw_writel(BM_GPMI_CTRL1_DEV_IRQ | BM_GPMI_CTRL1_TIMEOUT_IRQ, + REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR); + return IRQ_HANDLED; +} + +/** + * gpmi_select_chip() - NAND Flash MTD Interface select_chip() + * + * @mtd: A pointer to the owning MTD. + * @chipnr: The chip number to select, or -1 to select no chip. + */ +static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) +{ + struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + + if (chipnr == g->selected_chip) + return; + + g->selected_chip = chipnr; + g->cchip = NULL; + + if (chipnr == -1) + return; + + g->cchip = g->chips + chipnr; +} + +/** + * gpmi_command() - NAND Flash MTD Interface cmdfunc() + * + * This function is a veneer that calls the function originally installed by the + * NAND Flash MTD code. + * + * @mtd: A pointer to the owning MTD. + * @command: The command code. + * @column: The column address associated with this command code, or -1 if + * no column address applies. + * @page_addr: The page address associated with this command code, or -1 if no + * page address applies. + */ +static void gpmi_command(struct mtd_info *mtd, unsigned int command, + int column, int page_addr) +{ + register struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + + g->saved_command(mtd, command, column, page_addr); +} + +/** + * gpmi_read_oob() - MTD Interface read_oob(). + * + * This function is a veneer that replaces the function originally installed by + * the NAND Flash MTD code. + * + * @mtd: A pointer to the MTD. + * @from: The starting address to read. + * @ops: Describes the operation. + */ +static int gpmi_read_oob(struct mtd_info *mtd, loff_t from, + struct mtd_oob_ops *ops) +{ + register struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + int ret; + + g->raw_oob_mode = ops->mode == MTD_OOB_RAW; + ret = g->saved_read_oob(mtd, from, ops); + g->raw_oob_mode = 0; + return ret; +} + +/** + * gpmi_read_oob() - MTD Interface write_oob(). + * + * This function is a veneer that replaces the function originally installed by + * the NAND Flash MTD code. + * + * @mtd: A pointer to the MTD. + * @to: The starting address to write. + * @ops: Describes the operation. + */ +static int gpmi_write_oob(struct mtd_info *mtd, loff_t to, + struct mtd_oob_ops *ops) +{ + register struct nand_chip *chip = mtd->priv; + struct gpmi_nand_data *g = chip->priv; + int ret; + + g->raw_oob_mode = ops->mode == MTD_OOB_RAW; + ret = g->saved_write_oob(mtd, to, ops); + g->raw_oob_mode = 0; + return ret; +} + +/** + * gpmi_write_page - [REPLACEABLE] write one page + * @mtd: MTD device structure + * @chip: NAND chip descriptor + * @buf: the data to write + * @page: page number to write + * @cached: cached programming + * @raw: use _raw version of write_page + */ +static int gpmi_write_page(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t * buf, int page, int cached, int raw) +{ + struct gpmi_nand_data *g = chip->priv; + int status, empty_data, empty_oob; + int oobsz; +#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) + void *vbuf, *obuf; +#if 0 + void *voob, *ooob; +#endif +#endif + + oobsz = likely(g->raw_oob_mode == 0 && raw_mode == 0) ? + g->oob_free : mtd->oobsize; + + empty_data = is_ff(buf, mtd->writesize); + empty_oob = is_ff(buf, oobsz); + + if (empty_data && empty_oob) { + ff_writes++; + + pr_debug("%s: Skipping an empty page 0x%x (0x%x)\n", + __func__, page, page << chip->page_shift); + return 0; + } + + chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); + + if (likely(raw == 0)) + chip->ecc.write_page(mtd, chip, buf); + else + chip->ecc.write_page_raw(mtd, chip, buf); + + /* + * Cached progamming disabled for now, Not sure if its worth the + * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) + */ + cached = 0; + + if (!cached || !(chip->options & NAND_CACHEPRG)) { + + chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); + + status = chip->waitfunc(mtd, chip); + + /* + * See if operation failed and additional status checks are + * available + */ + if ((status & NAND_STATUS_FAIL) && (chip->errstat)) + status = chip->errstat(mtd, chip, FL_WRITING, status, + page); + + if (status & NAND_STATUS_FAIL) { + pr_debug("%s: NAND_STATUS_FAIL\n", __func__); + return -EIO; + } + } else { + chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); + status = chip->waitfunc(mtd, chip); + } + +#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) + if (empty_data) + return 0; + + obuf = g->verify_buffer; +#if 1 /* make vbuf aligned by mtd->writesize */ + vbuf = obuf + mtd->writesize; +#else + ooob = obuf + mtd->writesize; + vbuf = ooob + mtd->oobsize; + voob = vbuf + mtd->writesize; +#endif + + /* keep data around */ + memcpy(obuf, buf, mtd->writesize); +#if 0 + memcpy(ooob, chip->oob_poi, oobsz); +#endif + /* Send command to read back the data */ + chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); + + if (likely(raw == 0)) + chip->ecc.read_page(mtd, chip, vbuf); + else + chip->ecc.read_page_raw(mtd, chip, vbuf); + +#if 0 + memcpy(voob, chip->oob_poi, oobsz); +#endif + + if (!empty_data && memcmp(obuf, vbuf, mtd->writesize) != 0) + return -EIO; +#endif + + return 0; +} + +/** + * gpmi_read_page_raw - [Intern] read raw page data without ecc + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: buffer to store read data + */ +static int gpmi_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t * buf) +{ + chip->read_buf(mtd, buf, mtd->writesize); + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); + return 0; +} + +/** + * gpmi_write_page_raw - [Intern] raw page write function + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: data buffer + */ +static void gpmi_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t * buf) +{ + chip->write_buf(mtd, buf, mtd->writesize); + chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); +} + +/** + * gpmi_init_chip - Sets up the driver to control the given chip. + * + * @pdev: A pointer to the owning struct platform_device. + * @g: Per-device data. + * @n: The chip number. + * @dma_ch: The DMA channel to use with this chip. + */ +static int gpmi_init_chip(struct platform_device *pdev, + struct gpmi_nand_data *g, int n, unsigned dma_ch) +{ + int err; + + g->chips[n].dma_ch = dma_ch; + g->chips[n].cs = n; + + err = stmp3xxx_dma_request(dma_ch, NULL, dev_name(&pdev->dev)); + if (err) { + dev_err(&pdev->dev, "can't request DMA channel 0x%x\n", dma_ch); + goto out_all; + } + + err = stmp3xxx_dma_make_chain(dma_ch, + &g->chips[n].chain, + g->chips[n].d, ARRAY_SIZE(g->chips[n].d)); + if (err) { + dev_err(&pdev->dev, "can't setup DMA chain\n"); + goto out_all; + } + + err = stmp3xxx_dma_allocate_command(dma_ch, &g->chips[n].error); + if (err) { + dev_err(&pdev->dev, "can't setup DMA chain\n"); + goto out_all; + } + + g->chips[n].error.command->cmd = + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); +out_all: + return err; +} + +/** + * gpmi_deinit_chip - Tears down this driver's control of the given chip. + * + * @pdev: A pointer to the owning struct platform_device. + * @g: Per-device data. + * @n: The chip number. + */ +static void gpmi_deinit_chip(struct platform_device *pdev, + struct gpmi_nand_data *g, int n) +{ + int dma_ch; + + if (n < 0) { + for (n = 0; n < ARRAY_SIZE(g->chips); n++) + gpmi_deinit_chip(pdev, g, n); + return; + } + + if (g->chips[n].dma_ch <= 0) + return; + + dma_ch = g->chips[n].dma_ch; + + stmp3xxx_dma_free_command(dma_ch, &g->chips[n].error); + stmp3xxx_dma_free_chain(&g->chips[n].chain); + stmp3xxx_dma_release(dma_ch); +} + +/** + * gpmi_get_device_info() - Get information about the NAND Flash devices. + * + * @g: Per-device data. + */ +static int gpmi_get_device_info(struct gpmi_nand_data *g) +{ + unsigned i; + uint8_t id_bytes[NAND_DEVICE_ID_BYTE_COUNT]; + struct mtd_info *mtd = &g->mtd; + struct nand_chip *nand = &g->nand; + struct nand_device_info *info; + + /* Read ID bytes from the first NAND Flash chip. */ + + nand->select_chip(mtd, 0); + + gpmi_command(mtd, NAND_CMD_READID, 0x00, -1); + + for (i = 0; i < NAND_DEVICE_ID_BYTE_COUNT; i++) + id_bytes[i] = nand->read_byte(mtd); + + /* Get information about this device, based on the ID bytes. */ + + info = nand_device_get_info(id_bytes); + + /* Check if we understand this device. */ + + if (!info) { + printk(KERN_ERR "Unrecognized NAND Flash device.\n"); + return !0; + } + + /* + * Copy the device info into the per-device data. We can't just keep + * the pointer because that storage is reclaimed after initialization. + */ + + g->device_info = *info; + + /* Display the information we got. */ + + nand_device_print_info(&g->device_info); + + /* Return success. */ + + return 0; + +} + +/** + * gpmi_scan_middle - Intermediate initialization. + * + * @g: Per-device data structure. + * + * Rather than call nand_scan(), this function makes the same calls, but + * inserts this function into the initialization pathway. + */ +static int gpmi_scan_middle(struct gpmi_nand_data *g) +{ + struct mtd_info *mtd = &g->mtd; + struct nand_chip *nand = &g->nand; + struct nand_device_info *info = &g->device_info; + int index = 0; + uint64_t physical_medium_size_in_bytes; + uint64_t logical_medium_size_in_bytes; + uint64_t logical_chip_size_in_bytes; + uint32_t page_data_size_in_bytes; + uint32_t page_oob_size_in_bytes; + + /* + * Hook the command function provided by the reference implementation. + * This has to be done here, rather than at initialization time, because + * the NAND Flash MTD installed the reference implementation only just + * now. + */ + + g->saved_command = nand->cmdfunc; + nand->cmdfunc = gpmi_command; + + /* Identify the NAND Flash devices. */ + + if (gpmi_get_device_info(g)) + return -ENXIO; + + /* Update timings. */ + + gpmi_set_timings(g, 0); + + /* + * Compute some important facts about the medium. + * + * Note that we don't yet support a medium of size larger than 2 GiB. If + * we find the physical medium is too large, then we pretend it's + * smaller. + */ + + physical_medium_size_in_bytes = + nand->numchips * info->chip_size_in_bytes; + + if (physical_medium_size_in_bytes > (2LL*SZ_1G)) { + logical_medium_size_in_bytes = 2LL*SZ_1G; + logical_chip_size_in_bytes = 2LL*SZ_1G; + do_div(logical_chip_size_in_bytes, nand->numchips); + + } else { + logical_medium_size_in_bytes = physical_medium_size_in_bytes; + logical_chip_size_in_bytes = info->chip_size_in_bytes; + } + + page_data_size_in_bytes = 1 << (fls(info->page_total_size_in_bytes)-1); + page_oob_size_in_bytes = info->page_total_size_in_bytes - + page_data_size_in_bytes; + + /* + * In all currently-supported geometries, the number of ECC bytes that + * apply to the OOB bytes is the same. + */ + + g->ecc_oob_bytes = 9; + + /* Configure ECC. */ + + switch (page_data_size_in_bytes) { + case 2048: + nand->ecc.layout = &gpmi_oob_64; + nand->ecc.bytes = 9; + g->oob_free = 19; + g->hwecc_type_read = GPMI_ECC4_RD; + g->hwecc_type_write = GPMI_ECC4_WR; + break; + case 4096: + nand->ecc.layout = &gpmi_oob_128; + nand->ecc.bytes = 18; + g->oob_free = 65; + g->hwecc_type_read = GPMI_ECC8_RD; + g->hwecc_type_write = GPMI_ECC8_WR; + break; + default: + printk(KERN_ERR "Unsupported page data size %d.", + page_data_size_in_bytes); + return -ENXIO; + break; + } + + mtd->ecclayout = nand->ecc.layout; + + /* Configure the MTD geometry. */ + + mtd->size = logical_medium_size_in_bytes; + mtd->erasesize = info->block_size_in_pages * page_data_size_in_bytes; + mtd->writesize = page_data_size_in_bytes; + mtd->oobavail = mtd->ecclayout->oobavail; + mtd->oobsize = page_oob_size_in_bytes; + mtd->subpage_sft = 0; /* We don't support sub-page writing. */ + + /* Configure the struct nand_chip geometry. */ + + nand->chipsize = logical_chip_size_in_bytes; + nand->page_shift = ffs(page_data_size_in_bytes) - 1; + nand->pagemask = (nand->chipsize >> nand->page_shift) - 1; + nand->subpagesize = mtd->writesize >> mtd->subpage_sft; + nand->phys_erase_shift = ffs(mtd->erasesize) - 1; + nand->bbt_erase_shift = nand->phys_erase_shift; + nand->chip_shift = ffs(nand->chipsize) - 1; + + /* Sanity check */ + + if (mtd->oobsize > NAND_MAX_OOBSIZE || + mtd->writesize > NAND_MAX_PAGESIZE) { + printk(KERN_ERR "Internal error. Either page size " + "(%d) > max (%d) " + "or oob size (%d) > max(%d). Sorry.\n", + mtd->oobsize, NAND_MAX_OOBSIZE, + mtd->writesize, NAND_MAX_PAGESIZE); + return -ERANGE; + } + + /* Install the ECC. */ + + g->hc = gpmi_ecc_find("bch"); + for (index = 0; index < nand->numchips; index++) + g->hc->setup(g->hc, index, mtd->writesize, mtd->oobsize); + + /* Return success. */ + + return 0; + +} + +/** + * gpmi_register_with_mtd - Registers devices with MTD. + * + * @g: Per-device data. + */ +static int gpmi_register_with_mtd(struct gpmi_nand_data *g) +{ +#if defined(CONFIG_MTD_PARTITIONS) && defined(CONFIG_MTD_CONCAT) + int r; + unsigned i; + struct gpmi_platform_data *gpd = g->gpd; + struct mtd_info *mtd = &g->mtd; + struct nand_chip *nand = &g->nand; + struct mtd_partition partitions[4]; + struct mtd_info *search_mtd; + struct mtd_info *gpmi_0_remainder_mtd = 0; + struct mtd_info *gpmi_remainder_mtd = 0; + struct mtd_info *concatenate[2]; + + /* + * Here we declare the static strings we use to name partitions. We use + * static strings because, as of 2.6.31, the partitioning code *always* + * registers the partition MTDs it creates and leaves behind *no* other + * trace of its work. So, once we've created a partition, we must search + * the master table to find the MTDs we created. Since we're using + * static strings, we can search the master table for an MTD with a name + * field pointing to a known address. + */ + + static char *gpmi_0_boot_name = "gpmi-0-boot"; + static char *gpmi_0_remainder_name = "gpmi-0-remainder"; + static char *gpmi_1_boot_name = "gpmi-1-boot"; + static char *gpmi_remainder_name = "gpmi-remainder"; + static char *gpmi_general_use_name = "gpmi-general-use"; +#endif + + /* Initialize the MTD object. */ + + mtd->priv = &g->nand; + mtd->name = "gpmi-medium"; + mtd->owner = THIS_MODULE; + + /* + * Signal Control + */ + + g->nand.cmd_ctrl = gpmi_hwcontrol; + + /* + * Chip Control + * + * The cmdfunc pointer is assigned elsewhere. + * We use the reference implementation of waitfunc. + */ + + g->nand.dev_ready = gpmi_dev_ready; + g->nand.select_chip = gpmi_select_chip; + + /* + * Low-level I/O + */ + + g->nand.read_byte = gpmi_read_byte; + g->nand.read_word = gpmi_read_word; + g->nand.read_buf = gpmi_read_buf; + g->nand.write_buf = gpmi_write_buf; + g->nand.verify_buf = gpmi_verify_buf; + + /* + * ECC Control + * + * None of these functions are necessary: + * - ecc.hwctl + * - ecc.calculate + * - ecc.correct + */ + + /* + * ECC-aware I/O + */ + + g->nand.ecc.read_page = gpmi_ecc_read_page; + g->nand.ecc.read_page_raw = gpmi_read_page_raw; + g->nand.ecc.write_page = gpmi_ecc_write_page; + g->nand.ecc.write_page_raw = gpmi_write_page_raw; + + /* + * High-level I/O + * + * This driver doesn't assign the erase_cmd pointer at the NAND Flash + * chip level. Instead, it intercepts the erase operation at the MTD + * level (see the assignment to mtd.erase below). + */ + + g->nand.write_page = gpmi_write_page; + g->nand.ecc.read_oob = gpmi_ecc_read_oob; + g->nand.ecc.write_oob = gpmi_ecc_write_oob; + + /* + * Bad Block Management + * + * We use the reference implementation of block_markbad. + */ + + g->nand.block_bad = gpmi_block_bad; + g->nand.scan_bbt = gpmi_scan_bbt; + + g->nand.ecc.mode = NAND_ECC_HW_SYNDROME; + g->nand.ecc.size = 512; + + g->cmd_buffer_sz = 0; + + /* + * We now want the NAND Flash MTD system to scan for chips and create + * the MTD data structure that represents the medium. + * + * At this point, most drivers would call nand_scan(). Instead, this + * driver directly performs most of the same operations nand_scan() + * would, and introduces some additional initialization work in the + * "middle." + */ + + pr_info("Scanning for NAND Flash chips...\n"); + + if (nand_scan_ident(&g->mtd, max_chips) + || gpmi_scan_middle(g) + || nand_scan_tail(&g->mtd)) { + + /* + * If control arrives here, something went wrong. + */ + + dev_err(&g->dev->dev, "No NAND Flash chips found\n"); + return !0; + + } + + /* Completely disallow partial page writes. */ + + g->nand.options |= NAND_NO_SUBPAGE_WRITE; + g->nand.subpagesize = g->mtd.writesize; + g->mtd.subpage_sft = 0; + + /* Hook erase operations at the MTD level. */ + + g->mtd.erase = gpmi_erase; + + /* Hook OOB read and write operations at the MTD level. */ + + g->saved_read_oob = g->mtd.read_oob; + g->saved_write_oob = g->mtd.write_oob; + g->mtd.read_oob = gpmi_read_oob; + g->mtd.write_oob = gpmi_write_oob; + +#if !defined(CONFIG_MTD_PARTITIONS) || !defined(CONFIG_MTD_CONCAT) + + /* + * If control arrives here, we're missing support for either or both of + * MTD partitioning and concatenation. Do the simple thing and register + * the entire medium. + */ + + pr_info("MTD partitioning and/or concatenation are disabled.\n" + "Registering the entire GPMI medium...\n"); + + add_mtd_device(g->mtd); + +#else + + /* + * Our goal here is to partition the medium in a way that protects the + * boot area. First, check if the platform data says we need to + * protect it. + */ + + if (!gpd->boot_area_size_in_bytes) { + + /* + * If control arrives here, we don't need to protect the boot + * area. Make the entire medium available for general use. + */ + + pr_info("Boot area protection disabled.\n" + "Opening the entire medium for general use.\n"); + + g->general_use_mtd = mtd; + + } else { + + pr_info("Boot area protection enabled: 0x%x bytes.\n", + gpd->boot_area_size_in_bytes); + + /* + * If control arrives here, we need to protect the boot area. + * First, check if the area we're supposed to protect is larger + * than a single chip. + */ + + if (gpd->boot_area_size_in_bytes > nand->chipsize) { + dev_emerg(&g->dev->dev, "Protected boot area size is " + "larger than a single chip"); + BUG(); + } + + /* + * Recall that the boot ROM uses the first part of chip one and, + * if it exists, also the first part of chip two. We check now + * to see how many chips there are, and adjust our partitioning + * accordingly. + */ + + g->chip0_boot_mtd = 0; + g->chip1_boot_mtd = 0; + + if (nand->numchips == 1) { + + pr_info("Partitioning for one chip.\n"); + + /* + * If control arrives here, there's only one chip. We + * partition the medium like so: + * + * +------+-------------------------------------------+ + * | Boot | General Use | + * +------+-------------------------------------------+ + */ + + /* Chip 0 Boot */ + + partitions[0].name = gpmi_0_boot_name; + partitions[0].offset = 0; + partitions[0].size = gpd->boot_area_size_in_bytes; + partitions[0].mask_flags = 0; + + /* General Use */ + + partitions[1].name = gpmi_general_use_name; + partitions[1].offset = gpd->boot_area_size_in_bytes; + partitions[1].size = MTDPART_SIZ_FULL; + partitions[1].mask_flags = 0; + + /* Construct and register the partitions. */ + + add_mtd_partitions(mtd, partitions, 2); + + /* Find the general use MTD. */ + + for (i = 0; i < MAX_MTD_DEVICES; i++) { + search_mtd = get_mtd_device(0, i); + if (!search_mtd) + continue; + if (search_mtd == ERR_PTR(-ENODEV)) + continue; + if (search_mtd->name == gpmi_general_use_name) + g->general_use_mtd = search_mtd; + } + + if (!g->general_use_mtd) { + dev_emerg(&g->dev->dev, "Can't find general " + "use MTD"); + BUG(); + } + + } else { + + pr_info("Partitioning for multiple chips.\n"); + + /* + * If control arrives here, there is more than one chip. + * We partition the medium and concatenate the + * remainders like so: + * + * --- Chip 0 --- --- Chip 1 --- ... -- Chip N --- + * / \ / \ + * +----+----------+----+---------- ... --------------+ + * |Boot|Remainder |Boot| Remainder | + * +----+----------+----+---------- ... --------------+ + * | | / / + * | | / / + * | | / / + * | |/ / + * +----------+---------- ... --------------+ + * | General Use | + * +----------+---------- ... --------------+ + * + * Notice we do something just a little goofy here. + * Instead of numbering these partitions in the order + * they appear in the medium, we have them in this + * order: + * + * * Chip 0 Boot Area + * * Chip 1 Boot Area + * * Chip 0 Remainder + * * Medium Remainder + * + * Before 2.6.31, it was possible to "hide" partitions + * (to create them without registering them), which made + * it possible to hide the remainders. In the future, it + * may become possible to do so again. Also, some user + * space programs expect the boot partitions to appear + * first. This is naive, but let's try not to cause any + * trouble, where we can avoid it. + */ + + /* Chip 0 Boot */ + + partitions[0].name = gpmi_0_boot_name; + partitions[0].offset = 0; + partitions[0].size = gpd->boot_area_size_in_bytes; + partitions[0].mask_flags = 0; + + /* Chip 1 Boot */ + + partitions[1].name = gpmi_1_boot_name; + partitions[1].offset = nand->chipsize; + partitions[1].size = gpd->boot_area_size_in_bytes; + partitions[1].mask_flags = 0; + + /* Chip 0 Remainder */ + + partitions[2].name = gpmi_0_remainder_name; + partitions[2].offset = gpd->boot_area_size_in_bytes; + partitions[2].size = nand->chipsize - + gpd->boot_area_size_in_bytes; + partitions[2].mask_flags = 0; + + /* Medium Remainder */ + + partitions[3].name = gpmi_remainder_name; + partitions[3].offset = nand->chipsize + + gpd->boot_area_size_in_bytes; + partitions[3].size = MTDPART_SIZ_FULL; + partitions[3].mask_flags = 0; + + /* Construct and register the partitions. */ + + add_mtd_partitions(mtd, partitions, 4); + + /* Find the remainder partitions. */ + + for (i = 0; i < MAX_MTD_DEVICES; i++) { + search_mtd = get_mtd_device(0, i); + if (!search_mtd) + continue; + if (search_mtd == ERR_PTR(-ENODEV)) + continue; + if (search_mtd->name == gpmi_0_remainder_name) + gpmi_0_remainder_mtd = search_mtd; + if (search_mtd->name == gpmi_remainder_name) + gpmi_remainder_mtd = search_mtd; + } + + if (!gpmi_0_remainder_mtd || !gpmi_remainder_mtd) { + dev_emerg(&g->dev->dev, "Can't find remainder " + "partitions"); + BUG(); + } + + /* Concatenate the remainders and register. */ + + concatenate[0] = gpmi_0_remainder_mtd; + concatenate[1] = gpmi_remainder_mtd; + + g->general_use_mtd = mtd_concat_create(concatenate, + 2, "gpmi-general-use"); + + add_mtd_device(g->general_use_mtd); + + } + + } + + /* + * When control arrives here, we've done whatever partitioning and + * concatenation we needed to protect the boot area, and we have + * identified a single MTD that represents the "general use" portion of + * the medium. Check if the user wants to partition the general use MTD + * further. + */ + + /* Check for dynamic partitioning information. */ + + if (gpd->partition_source_types) { + r = parse_mtd_partitions(mtd, gpd->partition_source_types, + &g->partitions, 0); + if (r > 0) + g->partition_count = r; + else { + g->partitions = 0; + g->partition_count = 0; + } + } + + /* Fall back to platform partitions? */ + + if (!g->partition_count && gpd->partitions && gpd->partition_count) { + g->partitions = gpd->partitions; + g->partition_count = gpd->partition_count; + } + + /* If we have partitions, implement them. */ + + if (g->partitions) { + pr_info("Applying partitions to the general use area.\n"); + add_mtd_partitions(g->general_use_mtd, + g->partitions, g->partition_count); + } + + /* + * Check if we're supposed to register the MTD that represents + * the entire medium. + */ + + if (add_mtd_entire) { + pr_info("Registering the full NAND Flash medium MTD.\n"); + add_mtd_device(mtd); + } + +#endif + + /* If control arrives here, everything went well. */ + + return 0; + +} + +/** + * gpmi_unregister_with_mtd - Unregisters devices with MTD. + * + * @g: Per-device data. + */ +static void gpmi_unregister_with_mtd(struct gpmi_nand_data *g) +{ +#if defined(CONFIG_MTD_PARTITIONS) && defined(CONFIG_MTD_CONCAT) + struct gpmi_platform_data *gpd = g->gpd; + struct mtd_info *mtd = &g->mtd; + struct nand_chip *nand = &g->nand; +#endif + + /* + * This function mirrors, in reverse, the structure of + * gpmi_register_with_mtd(). See that function for details about how we + * partition the medium. + */ + +#if !defined(CONFIG_MTD_PARTITIONS) || !defined(CONFIG_MTD_CONCAT) + + del_mtd_device(mtd); + +#else + + /* + * If we registered the MTD that represents the entire medium, + * unregister it now. Note that this does *not* "destroy" the MTD - it + * merely unregisters it. That's important because all our other MTDs + * depend on this one. + */ + + if (add_mtd_entire) + del_mtd_device(mtd); + + /* If we partitioned the general use MTD, destroy the partitions. */ + + if (g->partitions) + del_mtd_partitions(g->general_use_mtd); + + /* + * If we're protecting the boot area, we have some additional MTDs to + * tear down. + */ + + if (gpd->boot_area_size_in_bytes) { + + /* + * If we have more than one chip, then we concatenated two + * "remainder" MTDs to produce the "general use" MTD. + * Unregister the concatenation MTD, and then destroy it. + */ + + if (nand->numchips > 1) { + del_mtd_device(g->general_use_mtd); + mtd_concat_destroy(g->general_use_mtd); + } + + /* + * Destroy all the partition MTDs based directly on the medium + * MTD. + */ + + del_mtd_partitions(mtd); + + } + +#endif + +} + +/** + * gpmi_nand_probe - Probes for a GPMI device and, if possible, takes ownership. + * + * @pdev: A pointer to the platform device. + */ +static int __init gpmi_nand_probe(struct platform_device *pdev) +{ + struct gpmi_nand_data *g; + struct gpmi_platform_data *gpd; + int err = 0; + struct resource *r; + int dma; + + /* Allocate memory for the per-device structure (and zero it). */ + g = kzalloc(sizeof(*g), GFP_KERNEL); + if (!g) { + dev_err(&pdev->dev, "failed to allocate gpmi_nand_data\n"); + err = -ENOMEM; + goto out1; + } + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(&pdev->dev, "failed to get resource\n"); + err = -ENXIO; + goto out2; + } + g->io_base = ioremap(r->start, r->end - r->start + 1); + if (!g->io_base) { + dev_err(&pdev->dev, "ioremap failed\n"); + err = -EIO; + goto out2; + } + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!r) { + err = -EIO; + dev_err(&pdev->dev, "can't get IRQ resource\n"); + goto out3; + } + + gpd = (struct gpmi_platform_data *)pdev->dev.platform_data; + g->gpd = gpd; + platform_set_drvdata(pdev, g); + err = gpmi_nand_init_hw(pdev, 1); + if (err) + goto out3; + + init_timer(&g->timer); + g->timer.data = (unsigned long)g; + g->timer.function = gpmi_timer_expiry; + g->timer.expires = jiffies + 4 * HZ; + add_timer(&g->timer); + dev_dbg(&pdev->dev, "%s: timer set to %ld\n", + __func__, jiffies + 4 * HZ); + + g->reg_uA = gpd->io_uA; + g->regulator = regulator_get(&pdev->dev, "mmc_ssp-2"); + if (g->regulator && !IS_ERR(g->regulator)) { + regulator_set_mode(g->regulator, REGULATOR_MODE_NORMAL); + } else + g->regulator = NULL; + + g->irq = r->start; + err = request_irq(g->irq, gpmi_irq, 0, dev_name(&pdev->dev), g); + if (err) { + dev_err(&pdev->dev, "can't request GPMI IRQ\n"); + goto out4; + } + + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (!r) { + dev_err(&pdev->dev, "can't get DMA resource\n"); + goto out5; + } + + if (r->end - r->start > GPMI_MAX_CHIPS) + dev_info(&pdev->dev, "too spread resource: max %d chips\n", + GPMI_MAX_CHIPS); + + for (dma = r->start; + dma < min_t(int, r->end, r->start + GPMI_MAX_CHIPS); dma++) { + err = gpmi_init_chip(pdev, g, dma - r->start, dma); + if (err) + goto out6; + } + + g->cmd_buffer_size = GPMI_CMD_BUF_SZ; + g->write_buffer_size = GPMI_WRITE_BUF_SZ; + g->data_buffer_size = GPMI_DATA_BUF_SZ; + g->oob_buffer_size = GPMI_OOB_BUF_SZ; + + err = gpmi_alloc_buffers(pdev, g); + if (err) { + dev_err(&pdev->dev, "can't setup buffers\n"); + goto out6; + } + + g->dev = pdev; + g->nand.priv = g; + g->timing = gpmi_safe_timing; + g->selected_chip = -1; + g->ignorebad = ignorebad; /* copy global setting */ + + /* Set up timings. */ + + gpmi_set_timings(g, &gpmi_safe_timing); + + /* Register with MTD. */ + + if (gpmi_register_with_mtd(g)) + goto out7; + + /* Stay away from Unique ID -- It's going away soon. */ + + /* Initialize the Unique ID facility. */ + + gpmi_uid_init("nand", &g->mtd, gpd->uid_offset, gpd->uid_size); + + /* + * Check if we should export sysfs entries. + * + * This configuration variable should be destroyed, and this driver + * should *always* create the sysfs entries. + */ + +#ifdef CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES + gpmi_sysfs(pdev, true); +#endif + + /* If control arrives here, everything worked. Return success. */ + + return 0; + + ecc8_exit(); + bch_exit(); +out7: + nand_release(&g->mtd); + gpmi_free_buffers(pdev, g); +out6: + gpmi_deinit_chip(pdev, g, -1); +out5: + free_irq(g->irq, g); +out4: + del_timer_sync(&g->timer); + gpmi_nand_release_hw(pdev); +out3: + platform_set_drvdata(pdev, NULL); + iounmap(g->io_base); +out2: + kfree(g); +out1: + return err; +} + +/** + * gpmi_nand_remove - Dissociates this driver from the given device. + * + * @pdev: A pointer to the platform device. + */ +static int __devexit gpmi_nand_remove(struct platform_device *pdev) +{ + struct gpmi_nand_data *g = platform_get_drvdata(pdev); + + gpmi_unregister_with_mtd(g); + del_timer_sync(&g->timer); + gpmi_uid_remove("nand"); + +#ifdef CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES + gpmi_sysfs(pdev, false); +#endif + + nand_release(&g->mtd); + gpmi_free_buffers(pdev, g); + gpmi_deinit_chip(pdev, g, -1); + gpmi_nand_release_hw(pdev); + free_irq(g->irq, g); + if (g->regulator) + regulator_put(g->regulator); + iounmap(g->io_base); + kfree(g); + + return 0; +} + +#ifdef CONFIG_PM + +/** + * gpmi_nand_suspend() - Suspends this driver. + * + * @pdev: A pointer to the owning struct platform_device. + * @pm: For future use, currently unused. + */ +static int gpmi_nand_suspend(struct platform_device *pdev, pm_message_t pm) +{ + struct gpmi_nand_data *g = platform_get_drvdata(pdev); + int r = 0; + + /* If the driver suspended itself due to inactivity, wake it up. */ + + if (g->self_suspended) + gpmi_self_wakeup(g); + + /* Deactivate the inactivity timer. */ + + del_timer_sync(&g->timer); + + /* + * Suspend MTD's use of this device and, if that works, then shut down + * the actual hardware. + */ + + r = g->mtd.suspend(&g->mtd); + if (r == 0) + gpmi_nand_release_hw(pdev); + + return r; + +} + +/** + * gpmi_nand_resume() - Resumes this driver from suspend. + * + * @pdev: A pointer to the owning struct platform_device. + */ +static int gpmi_nand_resume(struct platform_device *pdev) +{ + struct gpmi_nand_data *g = platform_get_drvdata(pdev); + int r; + + /* + * Spin up the hardware. + * + * Unfortunately, this code ignores the result of hardware + * initialization and spins up the driver unconditionally. + */ + + r = gpmi_nand_init_hw(pdev, 1); + gpmi_set_timings(g, 0); + + /* Tell MTD it can use this device again. */ + + g->mtd.resume(&g->mtd); + + /* Re-instate the inactivity timer. */ + + g->timer.expires = jiffies + 4 * HZ; + add_timer(&g->timer); + + return r; + +} + +#else +#define gpmi_nand_suspend NULL +#define gpmi_nand_resume NULL +#endif + +#ifdef CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES + +/** + * show_timings() - Shows the current NAND Flash timing. + * + * @d: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_timings(struct device *d, struct device_attribute *attr, + char *buf) +{ + struct gpmi_nand_data *g = dev_get_drvdata(d); + uint32_t register_image; + uint32_t data_setup_in_cycles; + uint32_t effective_data_setup_in_ns; + uint32_t data_hold_in_cycles; + uint32_t effective_data_hold_in_ns; + uint32_t address_setup_in_cycles; + uint32_t effective_address_setup_in_ns; + uint32_t sample_delay_in_cycles; + uint32_t effective_sample_delay_in_ns; + bool sample_delay_uses_half_period; + uint32_t gpmi_clock_frequency_in_khz = + clk_get_rate(g->clk); + uint32_t gpmi_clock_period_in_ns = + 1000000 / gpmi_clock_frequency_in_khz; + + /* Retrieve basic timing facts. */ + + register_image = __raw_readl(REGS_GPMI_BASE + HW_GPMI_TIMING0); + + data_setup_in_cycles = (register_image & BM_GPMI_TIMING0_DATA_SETUP) + >> BP_GPMI_TIMING0_DATA_SETUP; + data_hold_in_cycles = (register_image & BM_GPMI_TIMING0_DATA_HOLD) + >> BP_GPMI_TIMING0_DATA_HOLD; + address_setup_in_cycles = + (register_image & BM_GPMI_TIMING0_ADDRESS_SETUP) + >> BP_GPMI_TIMING0_ADDRESS_SETUP; + + effective_data_setup_in_ns = + data_setup_in_cycles * gpmi_clock_period_in_ns; + effective_data_hold_in_ns = + data_hold_in_cycles * gpmi_clock_period_in_ns; + effective_address_setup_in_ns = + address_setup_in_cycles * gpmi_clock_period_in_ns; + + /* Retrieve facts about the sample delay. */ + + register_image = __raw_readl(REGS_GPMI_BASE + HW_GPMI_CTRL1); + + sample_delay_in_cycles = (register_image & BM_GPMI_CTRL1_RDN_DELAY) + >> BP_GPMI_CTRL1_RDN_DELAY; + + sample_delay_uses_half_period = + !!((register_image & BM_GPMI_CTRL1_HALF_PERIOD) + >> BP_GPMI_CTRL1_HALF_PERIOD); + + effective_sample_delay_in_ns = + sample_delay_in_cycles * gpmi_clock_period_in_ns; + + if (sample_delay_uses_half_period) + effective_sample_delay_in_ns >>= 1; + + /* Show the results. */ + + return sprintf(buf, + "GPMI Clock Frequency : %u KHz\n" + "GPMI Clock Period : %u ns\n" + "Recorded Data Setup : %d ns\n" + "Hardware Data Setup : %u cycles\n" + "Effective Data Setup : %u ns\n" + "Recorded Data Hold : %d ns\n" + "Hardware Data Hold : %u cycles\n" + "Effective Data Hold : %u ns\n" + "Recorded Address Setup: %d ns\n" + "Hardware Address Setup: %u cycles\n" + "Effective Address Setup: %u ns\n" + "Recorded Sample Delay : %d ns\n" + "Hardware Sample Delay : %u cycles\n" + "Using Half Period : %s\n" + "Effective Sample Delay : %u ns\n" + "Recorded tREA : %d ns\n" + "Recorded tRLOH : %d ns\n" + "Recorded tRHOH : %d ns\n" + , + gpmi_clock_frequency_in_khz, + gpmi_clock_period_in_ns, + g->device_info.data_setup_in_ns, + data_setup_in_cycles, + effective_data_setup_in_ns, + g->device_info.data_hold_in_ns, + data_hold_in_cycles, + effective_data_hold_in_ns, + g->device_info.address_setup_in_ns, + address_setup_in_cycles, + effective_address_setup_in_ns, + g->device_info.gpmi_sample_delay_in_ns, + sample_delay_in_cycles, + (sample_delay_uses_half_period ? "Yes" : "No"), + effective_sample_delay_in_ns, + g->device_info.tREA_in_ns, + g->device_info.tRLOH_in_ns, + g->device_info.tRHOH_in_ns); + +} + +/** + * store_timings() - Sets the current NAND Flash timing. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_timings(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + const char *p, *end; + struct gpmi_nand_timing t; + struct gpmi_nand_data *g = dev_get_drvdata(d); + char tmps[20]; + u8 *timings[] = { + &t.data_setup_in_ns, + &t.data_hold_in_ns, + &t.address_setup_in_ns, + &t.gpmi_sample_delay_in_ns, + NULL, + }; + u8 **timing = timings; + + p = buf; + + /* parse values */ + while (*timing != NULL) { + unsigned long t_long; + + end = strchr(p, ','); + memset(tmps, 0, sizeof(tmps)); + if (end) + strncpy(tmps, p, min_t(int, sizeof(tmps) - 1, end - p)); + else + strncpy(tmps, p, sizeof(tmps) - 1); + + if (strict_strtoul(tmps, 0, &t_long) < 0) + return -EINVAL; + + if (t_long > 255) + return -EINVAL; + + **timing = (u8) t_long; + timing++; + + if (!end && *timing) + return -EINVAL; + p = end + 1; + } + + gpmi_set_timings(g, &t); + + return size; +} + +/** + * show_stat() - Shows current statistics. + * + * @d: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_stat(struct device *d, struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "copies\t\t%dff pages\t%d\n", copies, ff_writes); +} + +/** + * show_chips() - Shows the number of physical chips that were discovered. + * + * @d: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_chips(struct device *d, struct device_attribute *attr, + char *buf) +{ + struct gpmi_nand_data *g = dev_get_drvdata(d); + return sprintf(buf, "%d\n", g->nand.numchips); +} + +/** + * show_ignorebad() - Shows the value of the 'ignorebad' flag. + * + * @d: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer that will receive a representation of the attribute. + */ +static ssize_t show_ignorebad(struct device *d, struct device_attribute *attr, + char *buf) +{ + struct gpmi_nand_data *g = dev_get_drvdata(d); + + return sprintf(buf, "%d\n", g->ignorebad); +} + +/** + * store_ignorebad() - Sets the value of the 'ignorebad' flag. + * + * @dev: The device of interest. + * @attr: The attribute of interest. + * @buf: A buffer containing a new attribute value. + * @size: The size of the buffer. + */ +static ssize_t store_ignorebad(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct gpmi_nand_data *g = dev_get_drvdata(d); + const char *p = buf; + unsigned long v; + + if (strict_strtoul(p, 0, &v) < 0) + return size; + if (v > 0) + v = 1; + if (v != g->ignorebad) { + if (v) { + g->bbt = g->nand.bbt; + g->nand.bbt = NULL; + g->ignorebad = 1; + } else { + g->nand.bbt = g->bbt; + g->ignorebad = 0; + } + } + return size; +} + +static DEVICE_ATTR(timings, 0644, show_timings, store_timings); +static DEVICE_ATTR(stat, 0444, show_stat, NULL); +static DEVICE_ATTR(ignorebad, 0644, show_ignorebad, store_ignorebad); +static DEVICE_ATTR(numchips, 0444, show_chips, NULL); + +static struct device_attribute *gpmi_attrs[] = { + &dev_attr_timings, + &dev_attr_stat, + &dev_attr_ignorebad, + &dev_attr_numchips, + NULL, +}; + +/** + * gpmi_sysfs() - Creates or removes sysfs nodes. + * + * @pdev: A pointer to the owning platform device. + * @create: Indicates the nodes are to be created (otherwise, removed). + */ +int gpmi_sysfs(struct platform_device *pdev, int create) +{ + int err = 0; + int i; + + if (create) { + for (i = 0; gpmi_attrs[i]; i++) { + err = device_create_file(&pdev->dev, gpmi_attrs[i]); + if (err) + break; + } + if (err) + while (--i >= 0) + device_remove_file(&pdev->dev, gpmi_attrs[i]); + } else { + for (i = 0; gpmi_attrs[i]; i++) + device_remove_file(&pdev->dev, gpmi_attrs[i]); + } + return err; +} + +#endif + +/* + * The global list of ECC descriptors. + * + * Each descriptor represents an ECC option that's available to the driver. + */ + +static LIST_HEAD(gpmi_ecc_descriptor_list); + +/** + * gpmi_ecc_add() - Adds the given ECC descriptor. + * + * @name: The name of interest. + */ +void gpmi_ecc_add(struct gpmi_ecc_descriptor *chip) +{ + list_add(&chip->list, &gpmi_ecc_descriptor_list); +} +EXPORT_SYMBOL_GPL(gpmi_ecc_add); + +/** + * gpmi_ecc_remove() - Removes an ECC descriptor with the given name. + * + * @name: The name of interest. + */ +void gpmi_ecc_remove(struct gpmi_ecc_descriptor *chip) +{ + list_del(&chip->list); +} +EXPORT_SYMBOL_GPL(gpmi_ecc_remove); + +/** + * gpmi_ecc_find() - Tries to find an ECC descriptor with the given name. + * + * @name: The name of interest. + */ +struct gpmi_ecc_descriptor *gpmi_ecc_find(char *name) +{ + struct gpmi_ecc_descriptor *c; + + list_for_each_entry(c, &gpmi_ecc_descriptor_list, list) + if (strncmp(c->name, name, sizeof(c->name)) == 0) + return c; + + return NULL; + +} +EXPORT_SYMBOL_GPL(gpmi_ecc_find); + +/* + * This structure represents this driver to the platform management system. + */ + +static struct platform_driver gpmi_nand_driver = { + .probe = gpmi_nand_probe, + .remove = __devexit_p(gpmi_nand_remove), + .driver = { + .name = "gpmi", + .owner = THIS_MODULE, + }, + .suspend = gpmi_nand_suspend, + .resume = gpmi_nand_resume, +}; + +static int __init gpmi_nand_init(void) +{ + int return_value; + + pr_info("GPMI NAND Flash driver\n"); + + /* Initialize the BCH and ECC8 hardware blocks. */ + + bch_init(); + ecc8_init(); + + /* Attempt to register this driver with the platform. */ + + return_value = platform_driver_register(&gpmi_nand_driver); + + if (return_value) + pr_err("GPMI NAND Flash driver registration failed\n"); + + return return_value; + +} + +static void __exit gpmi_nand_exit(void) +{ + pr_info("GPMI NAND Flash driver exiting...\n"); + platform_driver_unregister(&gpmi_nand_driver); +} + +module_init(gpmi_nand_init); +module_exit(gpmi_nand_exit); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("GPMI NAND Flash driver"); +module_param(max_chips, int, 0400); +module_param(clk, long, 0400); +module_param(bch, int, 0600); +module_param(map_buffers, int, 0600); +module_param(raw_mode, int, 0600); +module_param(debug, int, 0600); +module_param(add_mtd_entire, int, 0400); +module_param(add_mtd_chip, int, 0400); +module_param(ignorebad, int, 0400); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-hamming-22-16.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-hamming-22-16.c @@ -0,0 +1,195 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * NCB software ECC Hamming code + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include "gpmi.h" +#include "gpmi-hamming-22-16.h" + +#define BIT_VAL(v, n) (((v) >> (n)) & 0x1) +#define B(n) (BIT_VAL(d, n)) +#define BSEQ(a1, a2, a3, a4, a5, a6, a7, a8) \ + (B(a1) ^ B(a2) ^ B(a3) ^ B(a4) ^ B(a5) ^ B(a6) ^ B(a7) ^ B(a8)) +static u8 calculate_parity(u16 d) +{ + u8 p = 0; + + if (d == 0 || d == 0xFFFF) + return 0; /* optimization :) */ + + p |= BSEQ(15, 12, 11, 8, 5, 4, 3, 2) << 0; + p |= BSEQ(13, 12, 11, 10, 9, 7, 3, 1) << 1; + p |= BSEQ(15, 14, 13, 11, 10, 9, 6, 5) << 2; + p |= BSEQ(15, 14, 13, 8, 7, 6, 4, 0) << 3; + p |= BSEQ(12, 9, 8, 7, 6, 2, 1, 0) << 4; + p |= BSEQ(14, 10, 5, 4, 3, 2, 1, 0) << 5; + return p; +} + +static inline int even_number_of_1s(u8 byte) +{ + int even = 1; + + while (byte > 0) { + even ^= (byte & 0x1); + byte >>= 1; + } + return even; +} + +static int lookup_single_error(u8 syndrome) +{ + int i; + u8 syndrome_table[] = { + 0x38, 0x32, 0x31, 0x23, 0x29, 0x25, 0x1C, 0x1A, + 0x19, 0x16, 0x26, 0x07, 0x13, 0x0E, 0x2C, 0x0D, + 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, + }; + + for (i = 0; i < ARRAY_SIZE(syndrome_table); i++) + if (syndrome_table[i] == syndrome) + return i; + return -ENOENT; +} + +int gpmi_verify_hamming_22_16(void *data, u8 *parity, size_t size) +{ + int i, j; + int bit_index, bit_to_flip; + u16 *pdata = data; + u8 p = 0, np, syndrome; + int errors = 0; + + for (bit_index = i = j = 0; + i < size / sizeof(u16); + i ++, pdata++) { + + switch (bit_index) { + + case 0: + p = parity[j] & 0x3F; + break; + case 2: + p = (parity[j++] & 0xC0) >> 6; + p |= (parity[j] & 0x0F) << 2; + break; + case 4: + p = (parity[j++] & 0xF0) >> 4; + p |= (parity[j] & 0x03) << 4; + break; + case 6: + p = (parity[j++] & 0xFC) >> 2; + break; + default: + BUG(); /* how did you get this ?! */ + break; + } + bit_index = (bit_index + 2) % 8; + + np = calculate_parity(*pdata); + syndrome = np ^ p; + if (syndrome == 0) /* cool */ { + continue; + } + + if (even_number_of_1s(syndrome)) + return -i; /* can't recover */ + + bit_to_flip = lookup_single_error(syndrome); + if (bit_to_flip < 0) + return -i; /* can't fix the error */ + + if (bit_to_flip < 16) { + *pdata ^= (1 << bit_to_flip); + errors++; + } + } + return errors; +} + +void gpmi_encode_hamming_22_16(void *source_block, size_t src_size, + void *source_ecc, size_t ecc_size) +{ + int i, j, bit_index; + u16 *src = source_block; + u8 *ecc = source_ecc; + u8 np; + + for (bit_index = j = i = 0; + j < src_size/sizeof(u16) && i < ecc_size; + j++) { + + np = calculate_parity(src[j]); + + switch (bit_index) { + + case 0: + ecc[i] = np & 0x3F; + break; + case 2: + ecc[i++] |= (np & 0x03) << 6; + ecc[i] = (np & 0x3C) >> 2; + break; + case 4: + ecc[i++] |= (np & 0x0F) << 4; + ecc[i] = (np & 0x30) >> 4; + break; + case 6: + ecc[i++] |= (np & 0x3F) << 2; + break; + } + bit_index = (bit_index + 2) % 8; + } + +} + +void gpmi_encode_hamming_ncb_22_16(void *source_block, size_t source_size, + void *target_block, size_t target_size) +{ + u8 *dst = target_block; + u8 ecc[NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES]; + + gpmi_encode_hamming_22_16(source_block, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + ecc, + NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES); + /* create THREE copies of source block */ + memcpy(dst + NAND_HC_ECC_OFFSET_FIRST_DATA_COPY, + source_block, NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES); + memcpy(dst + NAND_HC_ECC_OFFSET_SECOND_DATA_COPY, + source_block, NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES); + memcpy(dst + NAND_HC_ECC_OFFSET_THIRD_DATA_COPY, + source_block, NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES); + /* ..and three copies of ECC block */ + memcpy(dst + NAND_HC_ECC_OFFSET_FIRST_PARITY_COPY, + ecc, NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES); + memcpy(dst + NAND_HC_ECC_OFFSET_SECOND_PARITY_COPY, + ecc, NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES); + memcpy(dst + NAND_HC_ECC_OFFSET_THIRD_PARITY_COPY, + ecc, NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES); +} + +unsigned gpmi_hamming_ecc_size_22_16(int block_size) +{ + return (((block_size * 8) / 16) * 6) / 8; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-hamming-22-16.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-hamming-22-16.h @@ -0,0 +1,43 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * NCB software ECC Hamming code + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __LINUX_GPMI_H +#define __LINUX_GPMI_H + +#define NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES (512) +#define NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES \ + ((((NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES*8)/16)*6)/8) +#define NAND_HC_ECC_OFFSET_FIRST_DATA_COPY (0) +#define NAND_HC_ECC_OFFSET_SECOND_DATA_COPY \ + (NAND_HC_ECC_OFFSET_FIRST_DATA_COPY + \ + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) +#define NAND_HC_ECC_OFFSET_THIRD_DATA_COPY \ + (NAND_HC_ECC_OFFSET_SECOND_DATA_COPY + \ + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) +#define NAND_HC_ECC_OFFSET_FIRST_PARITY_COPY \ + (NAND_HC_ECC_OFFSET_THIRD_DATA_COPY + \ + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) +#define NAND_HC_ECC_OFFSET_SECOND_PARITY_COPY \ + (NAND_HC_ECC_OFFSET_FIRST_PARITY_COPY + \ + NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES) +#define NAND_HC_ECC_OFFSET_THIRD_PARITY_COPY \ + (NAND_HC_ECC_OFFSET_SECOND_PARITY_COPY + \ + NAND_HC_ECC_SIZEOF_PARITY_BLOCK_IN_BYTES) + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/Makefile @@ -0,0 +1,6 @@ +obj-$(CONFIG_MTD_NAND_GPMI) += gpmi.o +gpmi-objs += gpmi-base.o gpmi-bbt.o +gpmi-objs += gpmi-hamming-22-16.o +gpmi-objs += gpmi-hamming-13-8.o +gpmi-objs += gpmi-bch.o +gpmi-objs += gpmi-ecc8.o --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-hamming-13-8.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-hamming-13-8.c @@ -0,0 +1,130 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * NCB software ECC Hamming code + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include "gpmi.h" + +#define BIT_VAL(v, n) (((v) >> (n)) & 0x1) +#define B(n) (BIT_VAL(d, n)) + +static u8 calculate_parity(u8 d) +{ + u8 p = 0; + + if (d == 0 || d == 0xFF) + return 0; /* optimization :) */ + + p |= (B(6) ^ B(5) ^ B(3) ^ B(2)) << 0; + p |= (B(7) ^ B(5) ^ B(4) ^ B(2) ^ B(1)) << 1; + p |= (B(7) ^ B(6) ^ B(5) ^ B(1) ^ B(0)) << 2; + p |= (B(7) ^ B(4) ^ B(3) ^ B(0)) << 3; + p |= (B(6) ^ B(4) ^ B(3) ^ B(2) ^ B(1) ^ B(0)) << 4; + return p; +} + +static inline int even_number_of_1s(u8 byte) +{ + int even = 1; + + while (byte > 0) { + even ^= (byte & 0x1); + byte >>= 1; + } + return even; +} + +static int lookup_single_error(u8 syndrome) +{ + int i; + u8 syndrome_table[] = { + 0x1C, 0x16, 0x13, 0x19, + 0x1A, 0x07, 0x15, 0x0E, + 0x01, 0x02, 0x04, 0x08, + 0x10, + }; + + for (i = 0; i < ARRAY_SIZE(syndrome_table); i++) + if (syndrome_table[i] == syndrome) + return i; + return -ENOENT; +} + +int gpmi_verify_hamming_13_8(void *data, u8 *parity, size_t size) +{ + int i; + u8 *pdata = data; + int bit_to_flip; + u8 np, syndrome; + int errors = 0; + + for (i = 0; i < size; i ++, pdata++) { + np = calculate_parity(*pdata); + syndrome = np ^ parity[i]; + if (syndrome == 0) /* cool */ { + continue; + } + + if (even_number_of_1s(syndrome)) + return -i; /* can't recover */ + + bit_to_flip = lookup_single_error(syndrome); + if (bit_to_flip < 0) + return -i; /* can't fix the error */ + + if (bit_to_flip < 8) { + *pdata ^= (1 << bit_to_flip); + errors++; + } + } + return errors; +} + +void gpmi_encode_hamming_13_8(void *source_block, size_t src_size, + void *source_ecc, size_t ecc_size) +{ + int i; + u8 *src = source_block; + u8 *ecc = source_ecc; + + for (i = 0; i < src_size && i < ecc_size; i++) + ecc[i] = calculate_parity(src[i]); +} + +void gpmi_encode_hamming_ncb_13_8(void *source_block, size_t source_size, + void *target_block, size_t target_size) +{ + if (target_size < 12 + 2 * NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES) + return; + memset(target_block, 0xFF, target_size); + memcpy((u8 *)target_block + 12, source_block, source_size); + gpmi_encode_hamming_13_8(source_block, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + (u8 *)target_block + 12 + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES, + NAND_HC_ECC_SIZEOF_DATA_BLOCK_IN_BYTES); +} + +unsigned gpmi_hamming_ecc_size_13_8(int block_size) +{ + return block_size; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi-ecc8.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi-ecc8.c @@ -0,0 +1,513 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * STMP37XX/STMP378X ECC8 hardware ECC engine + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "gpmi.h" + +#define ECC8_MAX_NANDS 4 + +static int ecc8_available(void *context); +static int ecc8_setup(void *context, int index, int writesize, int oobsize); +static int ecc8_read(void *context, int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); +static int ecc8_write(void *context, int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); +static int ecc8_stat(void *ctx, int index, struct mtd_ecc_stats *r); +static int ecc8_reset(void *context, int index); + +struct ecc8_nand { +}; + +/** + * ecc8_state_t - Describes the state of the Reed-Solomon ECC. + * + * @chip: A descriptor the GPMI driver uses to track this ECC. + * @done: A struct completion used to manage ECC interrupts. + * @stat: Used by the interrupt level to communicate ECC statistics to the + * base level. + * @writesize: The page data size. + * @oobsize: The page OOB size. + * @ecc_page: The number of ECC bytes associated with each 512-byte data + * block. + * @ecc_oob: The number of ECC bytes that cover the free bytes in the OOB. + * @oob_free: The number of free bytes in the OOB. That is, the number of + * OOB bytes that are *not* ECC bytes. + * @r: A bit mask that sets the ECC_CMD field of the GPMI_ECCCTRL + * register for reading. + * @w: A bit mask that sets the ECC_CMD field of the GPMI_ECCCTRL + * register for writing. + * @bits: The number of 512-byte data blocks in a page. By coincidence, + * this is also the strength of the ECC algorithm since the + * hardware is constrained to use ECC-4 with 2K pages and ECC-8 + * with 4K pages. The ECC strength may be the original source of + * this field's name, but the code actually uses this value in the + * sense of the number of 512-byte blocks. + * @s0_mask: This is presumably the mask that should be applied to the + * ECC8_STATUS0 register before checking for ECC errors. In fact, + * it is assigned but never used. + * @s1_mask: This is presumably the mask that should be applied to the + * ECC8_STATUS1 register before checking for ECC errors. In fact, + * it is assigned but never used. + */ + +struct ecc8_state_t { + struct gpmi_ecc_descriptor chip; + struct completion done; + struct mtd_ecc_stats stat; + u32 writesize, oobsize; + u32 ecc_page, ecc_oob, oob_free; + u32 r, w; + int bits; + u32 s0_mask, s1_mask; +}; + +/* The singleton struct ecc8_state_t for the ECC8. */ + +static struct ecc8_state_t state = { + .chip = { + .name = "ecc8", + .setup = ecc8_setup, + .stat = ecc8_stat, + .read = ecc8_read, + .write = ecc8_write, + .reset = ecc8_reset, + }, +}; + +/** + * ecc8_reset - Resets the ECC8. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + * @index: ?? + */ +static int ecc8_reset(void *context, int index) +{ + stmp3xxx_reset_block(REGS_ECC8_BASE, false); + while (__raw_readl(REGS_ECC8_BASE + HW_ECC8_CTRL) & BM_ECC8_CTRL_AHBM_SFTRST) + __raw_writel(BM_ECC8_CTRL_AHBM_SFTRST, + REGS_ECC8_BASE + HW_ECC8_CTRL_CLR); + __raw_writel(BM_ECC8_CTRL_COMPLETE_IRQ_EN, + REGS_ECC8_BASE + HW_ECC8_CTRL_SET); + return 0; +} + +/** + * ecc8_stat - Gather statistics and clean up after a read operation. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + * @index: ?? + * @r: A statistics structure that will receive the results of the most + * recent operation. + */ +static int ecc8_stat(void *context, int index, struct mtd_ecc_stats *r) +{ + struct ecc8_state_t *state = context; + + wait_for_completion(&state->done); + + *r = state->stat; + state->stat.failed = 0; + state->stat.corrected = 0; + return 0; +} + +/** + * ecc8_irq - Interrupt handler for the ECC8 hardware. + * + * This function gains control when the ECC8 hardware interrupts. It + * acknowledges the interrupt and gathers status information. + * + * @irq: The interrupt number. + * @context: Context data -- a pointer to a struct ecc8_state_t. + */ +static irqreturn_t ecc8_irq(int irq, void *context) +{ + int r; + struct mtd_ecc_stats ecc_stats; + struct ecc8_state_t *state = context; + u32 corr; + u32 s0 = __raw_readl(REGS_ECC8_BASE + HW_ECC8_STATUS0), + s1 = __raw_readl(REGS_ECC8_BASE + HW_ECC8_STATUS1); + + /* Get the physical chip number to which this operation applied. */ + + r = (s0 & BM_ECC8_STATUS0_COMPLETED_CE) >> 16; + + /* Check if there were any errors. */ + + if (s0 & BM_ECC8_STATUS0_CORRECTED || + s0 & BM_ECC8_STATUS0_UNCORRECTABLE) { + + ecc_stats.failed = 0; + ecc_stats.corrected = 0; + + /* Check for errors in the OOB bytes. */ + + s0 = (s0 & BM_ECC8_STATUS0_STATUS_AUX) >> 8; + if (s0 <= 4) + ecc_stats.corrected += s0; + if (s0 == 0xE) + ecc_stats.failed++; + + /* Check for errors in the data bytes. */ + + for ( ; s1 != 0; s1 >>= 4) { + corr = s1 & 0xF; + if (corr == 0x0C) + continue; + if (corr == 0xE) + ecc_stats.failed++; + if (corr <= 8) + ecc_stats.corrected += corr; + s1 >>= 4; + } + + /* Accumulate statistics. */ + + state->stat.corrected += ecc_stats.corrected; + state->stat.failed += ecc_stats.failed; + + } + + /* Acknowledge the interrupt. */ + + complete(&state->done); + + __raw_writel(BM_ECC8_CTRL_COMPLETE_IRQ, + REGS_ECC8_BASE + HW_ECC8_CTRL_CLR); + return IRQ_HANDLED; +} + +/** + * ecc8_available - Returns whether the Reed-Solomon ECC hardware is available. + * + * Note that this function always returns true. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + */ +static int ecc8_available(void *context) +{ + return 1; +} + +/** + * ecc8_setup - Set up ECC for use. + * + * If the GPMI driver decides to use this ECC, it will call this function once, + * before it starts any operations. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + * @index: ?? + * @writesize: The page data size. + * @oobsize: The page OOB size. + */ +static int ecc8_setup(void *context, int index, int writesize, int oobsize) +{ + struct ecc8_state_t *state = context; + + switch (writesize) { + case 2048: + state->ecc_page = 9; + state->ecc_oob = 9; + state->bits = 4; + state->r = BF(BV_GPMI_ECCCTRL_ECC_CMD__DECODE_4_BIT, + GPMI_ECCCTRL_ECC_CMD); + state->w = BF(BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_4_BIT, + GPMI_ECCCTRL_ECC_CMD); + break; + case 4096: + state->ecc_page = 18; + state->ecc_oob = 9; + state->bits = 8; + state->r = BF(BV_GPMI_ECCCTRL_ECC_CMD__DECODE_8_BIT, + GPMI_ECCCTRL_ECC_CMD); + state->w = BF(BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_8_BIT, + GPMI_ECCCTRL_ECC_CMD); + break; + default: + return -ENOTSUPP; + } + + state->oob_free = oobsize - + (state->bits * state->ecc_page) - state->ecc_oob; + state->oobsize = oobsize; + state->writesize = writesize; + + ecc8_reset(context, index); + + return 0; +} + +/** + * ecc8_read - Fill in a DMA chain to read a page. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + * @cs: The chip number to read. + * @chain: The main descriptor of the DMA chain to fill. + * @error: ?? + * @page: Physical address of the target page data buffer. + * @oob: Physical address of the target OOB data buffer. + * + * Return: status of operation -- 0 on success + */ +static int ecc8_read(void *context, int cs, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob) +{ + unsigned long readsize = 0; + u32 bufmask = 0; + struct ecc8_state_t *state = context; + + ecc8_reset(context, cs); + + state->s0_mask = state->s1_mask = 0; + + if (!dma_mapping_error(NULL, page)) { + bufmask |= (1 << state->bits) - 1; + readsize += (state->bits * state->ecc_page); + readsize += state->writesize; + } + if (!dma_mapping_error(NULL, oob)) { + bufmask |= BV_GPMI_ECCCTRL_BUFFER_MASK__AUXILIARY; + readsize += state->oob_free + state->ecc_oob; + state->s0_mask = BM_ECC8_STATUS0_STATUS_AUX; + if (dma_mapping_error(NULL, page)) + page = oob; + } + + /* wait for ready */ + chain->command->cmd = + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BF(cs, GPMI_CTRL0_CS); + chain->command->buf_ptr = 0; + chain++; + + /* enable ECC and read NAND data */ + chain->command->cmd = + BF(6, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__READ, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(cs, GPMI_CTRL0_CS) | + BF(readsize, GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = + BM_GPMI_ECCCTRL_ENABLE_ECC | + state->r | + BF(bufmask, GPMI_ECCCTRL_BUFFER_MASK); + chain->command->pio_words[3] = readsize; + chain->command->pio_words[4] = !dma_mapping_error(NULL, page) ? page : 0; + chain->command->pio_words[5] = !dma_mapping_error(NULL, oob) ? oob : 0; + chain->command->buf_ptr = 0; + chain++; + + /* disable ECC block */ + chain->command->cmd = + BF(3, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDWAIT4READY | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY, + GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BF(cs, GPMI_CTRL0_CS); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = 0; + chain->command->buf_ptr = 0; + chain++; + + /* and deassert nand lock */ + chain->command->cmd = + BF(0, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, APBH_CHn_CMD_COMMAND); + chain->command->buf_ptr = 0; + + init_completion(&state->done); + + return 0; +} + +/** + * ecc8_write - Fill in a DMA chain to write a page. + * + * @context: Context data -- a pointer to a struct ecc8_state_t. + * @cs: The chip number to read. + * @chain: The main descriptor of the DMA chain to fill. + * @error: ?? + * @page: Physical address of the source page data buffer. + * @oob: Physical address of the source OOB data buffer. + * + * Return: status of operation -- 0 on success + */ +static int ecc8_write(void *context, int cs, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob) +{ + u32 bufmask = 0; + struct ecc8_state_t *state = context; + u32 data_w, data_w_ecc, + oob_w, oob_w_ecc; + + ecc8_reset(context, cs); + + data_w = data_w_ecc = oob_w = oob_w_ecc = 0; + + if (!dma_mapping_error(NULL, oob)) { + bufmask |= BV_GPMI_ECCCTRL_BUFFER_MASK__AUXILIARY; + oob_w = state->oob_free; + oob_w_ecc = oob_w + state->ecc_oob; + } + if (!dma_mapping_error(NULL, page)) { + bufmask |= (1 << state->bits) - 1; + data_w = state->bits * 512; + data_w_ecc = data_w + state->bits * state->ecc_page; + } + + /* enable ECC and send NAND data (page only) */ + chain->command->cmd = + BF(data_w ? data_w : oob_w, APBH_CHn_CMD_XFER_COUNT) | + BF(4, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_NANDLOCK | + BM_APBH_CHn_CMD_CHAIN | + BF(BV_APBH_CHn_CMD_COMMAND__DMA_READ, APBH_CHn_CMD_COMMAND); + chain->command->pio_words[0] = + BF(BV_GPMI_CTRL0_COMMAND_MODE__WRITE, GPMI_CTRL0_COMMAND_MODE) | + BM_GPMI_CTRL0_WORD_LENGTH | + BM_GPMI_CTRL0_LOCK_CS | + BF(cs, GPMI_CTRL0_CS) | + BF(BV_GPMI_CTRL0_ADDRESS__NAND_DATA, GPMI_CTRL0_ADDRESS) | + BF(data_w + oob_w, GPMI_CTRL0_XFER_COUNT); + chain->command->pio_words[1] = 0; + chain->command->pio_words[2] = + BM_GPMI_ECCCTRL_ENABLE_ECC | + state->w | + BF(bufmask, GPMI_ECCCTRL_BUFFER_MASK); + chain->command->pio_words[3] = + data_w_ecc + oob_w_ecc; + if (!dma_mapping_error(NULL, page)) + chain->command->buf_ptr = page; + else + chain->command->buf_ptr = oob; + chain++; + + if (!dma_mapping_error(NULL, page) && !dma_mapping_error(NULL, oob)) { + /* send NAND data (OOB only) */ + chain->command->cmd = + BM_APBH_CHn_CMD_CHAIN | + BF(oob_w, APBH_CHn_CMD_XFER_COUNT) | + BF(0, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_NANDLOCK | + BF(BV_APBH_CHn_CMD_COMMAND__DMA_READ, + APBH_CHn_CMD_COMMAND); + chain->command->buf_ptr = oob; /* never dma_mapping_error() */ + chain++; + } + /* emit IRQ */ + chain->command->cmd = + BF(0, APBH_CHn_CMD_CMDWORDS) | + BF(BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER, + APBH_CHn_CMD_COMMAND) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_IRQONCMPLT; + + return 0; +} + +/** + * ecc8_init - Initialize and register ECC. + * + * The GPMI driver calls this function once, at the beginning of time, whether + * or not it decides to use this ECC. + */ +int __init ecc8_init(void) +{ + int err; + + /* Check if the ECC8 hardware is available. */ + + if (!ecc8_available(&state)) + return -ENXIO; + + /* Give the GPMI driver a descriptor. */ + + gpmi_ecc_add(&state.chip); + + /* Attempt to acquire the ECC interrupt. */ + + err = request_irq(IRQ_ECC8_IRQ, ecc8_irq, 0, state.chip.name, &state); + if (err) + return err; + + printk(KERN_INFO"%s: initialized\n", __func__); + return 0; +} + +/** + * ecc8_exit - Shut down and de-register ECC. + */ +void ecc8_exit(void) +{ + + /* Relinquish the ECC interrupt. */ + + free_irq(IRQ_ECC8_IRQ, &state); + + /* Remove the descriptor for this ECC from the GPMI's list. */ + + gpmi_ecc_remove(&state.chip); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/nand/gpmi/gpmi.h +++ linux-fsl-imx51-2.6.31/drivers/mtd/nand/gpmi/gpmi.h @@ -0,0 +1,464 @@ +/* + * Freescale STMP37XX/STMP378X GPMI (General-Purpose-Media-Interface) + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __DRIVERS_GPMI_H +#define __DRIVERS_GPMI_H + +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MTD_NAND_GPMI_BCH +#include +#endif +#include + +#include "gpmi-hamming-22-16.h" +#include "../nand_device_info.h" + +#define GPMI_ECC4_WR \ + (BM_GPMI_ECCCTRL_ENABLE_ECC | \ + BF(BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_4_BIT, GPMI_ECCCTRL_ECC_CMD)) +#define GPMI_ECC4_RD \ + (BM_GPMI_ECCCTRL_ENABLE_ECC | \ + BF(BV_GPMI_ECCCTRL_ECC_CMD__DECODE_4_BIT, GPMI_ECCCTRL_ECC_CMD)) +#define GPMI_ECC8_WR \ + (BM_GPMI_ECCCTRL_ENABLE_ECC | \ + BF(BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_8_BIT, GPMI_ECCCTRL_ECC_CMD)) +#define GPMI_ECC8_RD \ + (BM_GPMI_ECCCTRL_ENABLE_ECC | \ + BF(BV_GPMI_ECCCTRL_ECC_CMD__DECODE_8_BIT, GPMI_ECCCTRL_ECC_CMD)) + +/* Fingerprints for Boot Control Blocks. */ + +#define SIG1 "STMP" +#define SIG_NCB "NCB " +#define SIG_LDLB "LDLB" +#define SIG_DBBT "DBBT" +#define SIG_SIZE 4 + +/** + * struct gpmi_nand_timing - NAND Flash timing parameters. + * + * This structure contains the fundamental timing attributes for the NAND Flash + * bus. + * + * @data_setup_in_ns: The data setup time, in nanoseconds. Usually the + * maximum of tDS and tWP. A negative value + * indicates this characteristic isn't known. + * @data_hold_in_ns: The data hold time, in nanoseconds. Usually the + * maximum of tDH, tWH and tREH. A negative value + * indicates this characteristic isn't known. + * @address_setup_in_ns: The address setup time, in nanoseconds. Usually + * the maximum of tCLS, tCS and tALS. A negative + * value indicates this characteristic isn't known. + * @gpmi_sample_time_in_ns: A GPMI-specific timing parameter. A negative + * value indicates this characteristic isn't known. + * @tREA_in_ns: tREA, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRLOH_in_ns: tRLOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + * @tRHOH_in_ns: tRHOH, in nanoseconds, from the data sheet. A + * negative value indicates this characteristic + * isn't known. + */ + +struct gpmi_nand_timing { + int8_t data_setup_in_ns; + int8_t data_hold_in_ns; + int8_t address_setup_in_ns; + int8_t gpmi_sample_delay_in_ns; + int8_t tREA_in_ns; + int8_t tRLOH_in_ns; + int8_t tRHOH_in_ns; +}; + +/** + * struct gpmi_bcb_info - Information obtained from Boot Control Blocks. + * + * @timing: Timing values extracted from an NCB. + * @ncbblock: The offset within the MTD at which the NCB was found. + * @pre_ncb: + * @pre_ncb_size: + */ + +struct gpmi_bcb_info { + struct gpmi_nand_timing timing; + loff_t ncbblock; + const void *pre_ncb; + size_t pre_ncb_size; +}; + +struct gpmi_ncb; + +int gpmi_erase(struct mtd_info *mtd, struct erase_info *instr); +int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs); +int gpmi_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip); +int gpmi_scan_bbt(struct mtd_info *mtd); +int gpmi_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip); +#ifdef CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES +int gpmi_sysfs(struct platform_device *p, int create); +#endif +int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page, int sndcmd); +int gpmi_write_ncb(struct mtd_info *mtd, struct gpmi_bcb_info *b); + +unsigned gpmi_hamming_ecc_size_22_16(int block_size); +void gpmi_encode_hamming_ncb_22_16(void *source_block, size_t source_size, + void *target_block, size_t target_size); +void gpmi_encode_hamming_22_16(void *source_block, size_t src_size, + void *source_ecc, size_t ecc_size); +int gpmi_verify_hamming_22_16(void *data, u8 *parity, size_t size); + +unsigned gpmi_hamming_ecc_size_13_8(int block_size); +void gpmi_encode_hamming_ncb_13_8(void *source_block, size_t source_size, + void *target_block, size_t target_size); +void gpmi_encode_hamming_13_8(void *source_block, size_t src_size, + void *source_ecc, size_t ecc_size); +int gpmi_verify_hamming_13_8(void *data, u8 *parity, size_t size); + +#define GPMI_DMA_MAX_CHAIN 20 /* max DMA commands in chain */ + +/* + * Sizes of data buffers to exchange commands/data with NAND chip. + * Default values cover 4K NAND page (4096 data bytes + 218 bytes OOB) + */ +#define GPMI_CMD_BUF_SZ 10 +#define GPMI_DATA_BUF_SZ NAND_MAX_PAGESIZE +#define GPMI_WRITE_BUF_SZ NAND_MAX_PAGESIZE +#define GPMI_OOB_BUF_SZ NAND_MAX_OOBSIZE + +#define GPMI_MAX_CHIPS 10 + +/** + * struct gpmi_ecc_descriptor - Abstract description of ECC. + * + * @name: The name of the ECC represented by this structure. + * @list: Infrastructure for the list to which this structure belongs. + * @setup: A pointer to a function that prepares the ECC to function. + * @reset: A pointer to a function that resets the ECC to a known state. This + * pointer is currently never used, and probably should be removed. + * @read: A pointer to a function that fills in a given DMA chain such that + * a page read will pass through the owning ECC. + * @write: A pointer to a function that fills in a given DMA chain such that + * a page write will pass through the owning ECC. + * @stat: A pointer to a function that reports on ECC statistics for + * the preceding read operation. + */ + +struct gpmi_ecc_descriptor { + char name[40]; + struct list_head list; + int (*setup)(void *ctx, int index, int writesize, int oobsize); + int (*reset)(void *ctx, int index); + int (*read)(void *ctx, int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); + int (*write)(void *ctx, int index, + struct stmp3xxx_dma_descriptor *chain, + dma_addr_t error, + dma_addr_t page, dma_addr_t oob); + int (*stat)(void *ctx, int index, struct mtd_ecc_stats *r); +}; + +/* ECC descriptor management. */ + +struct gpmi_ecc_descriptor *gpmi_ecc_find(char *name); +void gpmi_ecc_add(struct gpmi_ecc_descriptor *chip); +void gpmi_ecc_remove(struct gpmi_ecc_descriptor *chip); + +/* Housecleaning functions for the ECC hardware blocks. */ + +int bch_init(void); +int ecc8_init(void); +void bch_exit(void); +void ecc8_exit(void); + +/** + * struct gpmi_nand_data - GPMI driver per-device data structure. + * + * @dev: A pointer to the owning struct device. + * @gpd: GPMI-specific platform data. + * @io_base: The base I/O address of of the GPMI registers. + * @clk: A pointer to the structure that represents the GPMI + * clock. + * @irq: The GPMI interrupt request number. + * @inactivity_timer: A pointer to a timer the driver uses to shut itself + * down after periods of inactivity. + * @self_suspended: Indicates the driver suspended itself, rather than + * being suspended by higher layers of software. This is + * important because it effects how the driver wakes + * itself back up. + * @use_count: Used within the driver to hold off suspension until + * all operations are complete. + * @regulator: A pointer to the structure that represents the + * power regulator supplying power to the GPMI. + * @reg_uA: The GPMI current limit, in uA. + * @ignorebad: Forces the driver to report that all blocks are good. + * @bbt: Used to save a pointer to the in-memory NAND Flash MTD + * Bad Block Table if the "ignorebad" flag is turned on + * through the corresponding sysfs node. + * @mtd: The data structure that represents this NAND Flash + * medium to MTD. + * @nand: The data structure that represents this NAND Flash + * medium to the MTD NAND Flash system. + * @device_info Detailed information about the NAND Flash device. + * @partitions: A pointer to an array of partition descriptions + * collected from the platform. If this member is NULL, + * then no such partitions were given. + * @partition_count: The number of elements in the partitions array. + * @done: A struct completion used to manage GPMI interrupts. + * @cmd_buffer: + * @cmd_buffer_handle: + * @cmd_buffer_size: + * @cmd_buffer_sz: The number of command and address bytes queued up, + * waiting for transmission to the NAND Flash. + * @write_buffer: + * @write_buffer_handle: + * @write_buffer_size: + * @read_buffer: + * @read_buffer_handle: + * @data_buffer: + * @data_buffer_handle: + * @data_buffer_size: + * @oob_buffer: + * @oob_buffer_handle: + * @oob_buffer_size: + * @verify_buffer: + * @chips: An array of data structures, one for each physical + * chip. + * @cchip: A pointer to the element within the chips array that + * represents the currently selected chip. + * @selected_chip: The currently selectd chip number, or -1 if no chip + * is selected. + * @hwecc_type_read: + * @hwecc_type_write: + * @hwecc: Never used. + * @ecc_oob_bytes: The number of ECC bytes covering the OOB bytes alone. + * @oob_free: The total number of OOB bytes. + * @transcribe_bbmark: Used by the bad block management code to indicate + * that the medium is in common format and the bad block + * marks must be transcribed. + * @timing: The current timings installed in the hardware. + * @saved_command: Used to "hook" the NAND Flash MTD default + * implementation for the cmdfunc fuction pointer. + * @raw_oob_mode: + * @saved_read_oob: Used to "hook" the NAND Flash MTD interface function + * for the MTD read_oob fuction pointer. + * @saved_write_oob: Used to "hook" the NAND Flash MTD interface function + * for the MTD write_oob fuction pointer. + * @hc: A pointer to a structure that represents the ECC + * in use. + */ + +struct gpmi_nand_data { + + struct platform_device *dev; + struct gpmi_platform_data *gpd; + + void __iomem *io_base; + struct clk *clk; + int irq; + struct timer_list timer; + int self_suspended; + int use_count; + struct regulator *regulator; + int reg_uA; + + int ignorebad; + void *bbt; + + struct mtd_info mtd; + struct nand_chip nand; + + struct nand_device_info device_info; + +#if defined(CONFIG_MTD_PARTITIONS) && defined(CONFIG_MTD_CONCAT) + struct mtd_info *chip0_boot_mtd; + struct mtd_info *chip1_boot_mtd; + struct mtd_info *general_use_mtd; + struct mtd_partition *partitions; + unsigned partition_count; +#endif + + struct completion done; + + u8 *cmd_buffer; + dma_addr_t cmd_buffer_handle; + int cmd_buffer_size, cmd_buffer_sz; + + u8 *write_buffer; + dma_addr_t write_buffer_handle; + int write_buffer_size; + u8 *read_buffer; /* point in write_buffer */ + dma_addr_t read_buffer_handle; + + u8 *data_buffer; + dma_addr_t data_buffer_handle; + int data_buffer_size; + + u8 *oob_buffer; + dma_addr_t oob_buffer_handle; + int oob_buffer_size; + + void *verify_buffer; + + struct nchip { + unsigned dma_ch; + struct stmp37xx_circ_dma_chain chain; + struct stmp3xxx_dma_descriptor d[GPMI_DMA_MAX_CHAIN]; + struct stmp3xxx_dma_descriptor error; + int cs; + } chips[GPMI_MAX_CHIPS]; + struct nchip *cchip; + int selected_chip; + + unsigned hwecc_type_read, hwecc_type_write; + int hwecc; + + int ecc_oob_bytes, oob_free; + + int transcribe_bbmark; + struct gpmi_nand_timing timing; + + void (*saved_command)(struct mtd_info *mtd, unsigned int command, + int column, int page_addr); + + int raw_oob_mode; + int (*saved_read_oob)(struct mtd_info *mtd, loff_t from, + struct mtd_oob_ops *ops); + int (*saved_write_oob)(struct mtd_info *mtd, loff_t to, + struct mtd_oob_ops *ops); + + struct gpmi_ecc_descriptor *hc; + +}; + +extern struct gpmi_nand_timing gpmi_safe_timing; + +/** + * struct gpmi_ncb - + * + * @fingerprint1: + * @timing: + * @pagesize: + * @page_plus_oob_size: + * @sectors_per_block: + * @sector_in_page_mask: + * @sector_to_page_shift: + * @num_nands: + * @fingerprint2: + */ + +struct gpmi_ncb { + u32 fingerprint1; + struct gpmi_nand_timing timing; + u32 pagesize; + u32 page_plus_oob_size; + u32 sectors_per_block; + u32 sector_in_page_mask; + u32 sector_to_page_shift; + u32 num_nands; + u32 reserved[3]; + u32 fingerprint2; /* offset 0x2C */ +}; + +/** + * struct gpmi_ldlb - + * + * @fingerprint1: + * @major: + * @minor: + * @sub: + * @nand_bitmap: + * @fingerprint2: + * @fw: + * @fw_starting_nand: + * @fw_starting_sector: + * @fw_sector_stride: + * @fw_sectors_total: + * @fw_major: + * @fw_minor: + * @fw_sub: + * @fw_reserved: + * @bbt_blk: + * @bbt_blk_backup: + */ + +struct gpmi_ldlb { + u32 fingerprint1; + u16 major, minor, sub, reserved; + u32 nand_bitmap; + u32 reserved1[7]; + u32 fingerprint2; + struct { + u32 fw_starting_nand; + u32 fw_starting_sector; + u32 fw_sector_stride; + u32 fw_sectors_total; + } fw[2]; + u16 fw_major, fw_minor, fw_sub, fw_reserved; + u32 bbt_blk; + u32 bbt_blk_backup; +}; + +static inline void gpmi_block_mark_as(struct nand_chip *chip, + int block, int mark) +{ + u32 o; + int shift = (block & 0x03) << 1, + index = block >> 2; + + if (chip->bbt) { + mark &= 0x03; + + o = chip->bbt[index]; + o &= ~(0x03 << shift); + o |= (mark << shift); + chip->bbt[index] = o; + } +} + +static inline int gpmi_block_badness(struct nand_chip *chip, int block) +{ + u32 o; + int shift = (block & 0x03) << 1, + index = block >> 2; + + if (chip->bbt) { + o = (chip->bbt[index] >> shift) & 0x03; + pr_debug("%s: block = %d, o = %d\n", __func__, block, o); + return o; + } + return -1; +} + +#ifdef CONFIG_STMP3XXX_UNIQUE_ID +int __init gpmi_uid_init(const char *name, struct mtd_info *mtd, + u_int32_t start, u_int32_t size); +void gpmi_uid_remove(const char *name); +#else +#define gpmi_uid_init(name, mtd, start, size) +#define gpmi_uid_remove(name) +#endif + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/maps/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mtd/maps/Kconfig @@ -546,4 +546,14 @@ To build this as a module select M here, the module will be called vmu-flash. +config MTD_MXC + bool "Map driver for Freescale MXC boards" + depends on MTD && ARCH_MXC + default y + select MTD_CFI + select MTD_PARTITIONS + help + This enables access to the flash chips on Freescale MXC based + platforms. If you have such a board, say 'Y'. + endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/maps/mxc_nor.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/maps/mxc_nor.c @@ -0,0 +1,184 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * (c) 2005 MontaVista Software, Inc. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DVR_VER "2.0" + +#ifdef CONFIG_MTD_PARTITIONS +static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL }; +#endif + +struct clocksource *mtd_xip_clksrc; + +struct mxcflash_info { + struct mtd_partition *parts; + struct mtd_info *mtd; + struct map_info map; +}; + +/*! + * @defgroup NOR_MTD NOR Flash MTD Driver + */ + +/*! + * @file mxc_nor.c + * + * @brief This file contains the MTD Mapping information on the MXC. + * + * @ingroup NOR_MTD + */ + +static int __devinit mxcflash_probe(struct platform_device *pdev) +{ + int err, nr_parts = 0; + struct mxcflash_info *info; + struct flash_platform_data *flash = pdev->dev.platform_data; + struct resource *res = pdev->resource; + unsigned long size = res->end - res->start + 1; + + info = kzalloc(sizeof(struct mxcflash_info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + if (!request_mem_region(res->start, size, "flash")) { + err = -EBUSY; + goto out_free_info; + } + info->map.virt = ioremap(res->start, size); + if (!info->map.virt) { + err = -ENOMEM; + goto out_release_mem_region; + } + info->map.name = dev_name(&pdev->dev); + info->map.phys = res->start; + info->map.size = size; + info->map.bankwidth = flash->width; + + mtd_xip_clksrc = clocksource_get_next(); + + simple_map_init(&info->map); + info->mtd = do_map_probe(flash->map_name, &info->map); + if (!info->mtd) { + err = -EIO; + goto out_iounmap; + } + info->mtd->owner = THIS_MODULE; + +#ifdef CONFIG_MTD_PARTITIONS + nr_parts = + parse_mtd_partitions(info->mtd, part_probes, &info->parts, 0); + if (nr_parts > 0) { + add_mtd_partitions(info->mtd, info->parts, nr_parts); + } else if (flash->parts) { + add_mtd_partitions(info->mtd, flash->parts, flash->nr_parts); + } else +#endif + { + printk(KERN_NOTICE "MXC flash: no partition info " + "available, registering whole flash\n"); + add_mtd_device(info->mtd); + } + + platform_set_drvdata(pdev, info); + return 0; + + out_iounmap: + iounmap(info->map.virt); + out_release_mem_region: + release_mem_region(res->start, size); + out_free_info: + kfree(info); + + return err; +} + +static int __devexit mxcflash_remove(struct platform_device *pdev) +{ + + struct mxcflash_info *info = platform_get_drvdata(pdev); + struct flash_platform_data *flash = pdev->dev.platform_data; + + platform_set_drvdata(pdev, NULL); + + if (info) { + if (info->parts) { + del_mtd_partitions(info->mtd); + kfree(info->parts); + } else if (flash->parts) + del_mtd_partitions(info->mtd); + else + del_mtd_device(info->mtd); + + map_destroy(info->mtd); + release_mem_region(info->map.phys, info->map.size); + iounmap((void __iomem *)info->map.virt); + kfree(info); + } + return 0; +} + +static struct platform_driver mxcflash_driver = { + .driver = { + .name = "mxc_nor_flash", + }, + .probe = mxcflash_probe, + .remove = __devexit_p(mxcflash_remove), +}; + +/*! + * This is the module's entry function. It passes board specific + * config details into the MTD physmap driver which then does the + * real work for us. After this function runs, our job is done. + * + * @return 0 if successful; non-zero otherwise + */ +static int __init mxc_mtd_init(void) +{ + pr_info("MXC MTD nor Driver %s\n", DVR_VER); + if (platform_driver_register(&mxcflash_driver) != 0) { + printk(KERN_ERR "Driver register failed for mxcflash_driver\n"); + return -ENODEV; + } + return 0; +} + +/*! + * This function is the module's exit function. It's empty because the + * MTD physmap driver is doing the real work and our job was done after + * mxc_mtd_init() runs. + */ +static void __exit mxc_mtd_exit(void) +{ + platform_driver_unregister(&mxcflash_driver); +} + +module_init(mxc_mtd_init); +module_exit(mxc_mtd_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MTD map and partitions for Freescale MXC boards"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/maps/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/maps/Makefile @@ -60,3 +60,4 @@ obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o obj-$(CONFIG_MTD_VMU) += vmu-flash.o +obj-$(CONFIG_MTD_MXC) += mxc_nor.o --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/devices/mxc_dataflash.c +++ linux-fsl-imx51-2.6.31/drivers/mtd/devices/mxc_dataflash.c @@ -0,0 +1,1037 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * (c) 2005 MontaVista Software, Inc. + * + * This code is based on mtd_dataflash.c by adding FSL spi access. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +/* + * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in + * each chip, which may be used for double buffered I/O; but this driver + * doesn't (yet) use these for any kind of i/o overlap or prefetching. + * + * Sometimes DataFlash is packaged in MMC-format cards, although the + * MMC stack can't (yet?) distinguish between MMC and DataFlash + * protocols during enumeration. + */ + +/* reads can bypass the buffers */ +#define OP_READ_CONTINUOUS 0xE8 +#define OP_READ_PAGE 0xD2 + +/* group B requests can run even while status reports "busy" */ +#define OP_READ_STATUS 0xD7 /* group B */ + +/* move data between host and buffer */ +#define OP_READ_BUFFER1 0xD4 /* group B */ +#define OP_READ_BUFFER2 0xD6 /* group B */ +#define OP_WRITE_BUFFER1 0x84 /* group B */ +#define OP_WRITE_BUFFER2 0x87 /* group B */ + +/* erasing flash */ +#define OP_ERASE_PAGE 0x81 +#define OP_ERASE_BLOCK 0x50 + +/* move data between buffer and flash */ +#define OP_TRANSFER_BUF1 0x53 +#define OP_TRANSFER_BUF2 0x55 +#define OP_MREAD_BUFFER1 0xD4 +#define OP_MREAD_BUFFER2 0xD6 +#define OP_MWERASE_BUFFER1 0x83 +#define OP_MWERASE_BUFFER2 0x86 +#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ +#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ + +/* write to buffer, then write-erase to flash */ +#define OP_PROGRAM_VIA_BUF1 0x82 +#define OP_PROGRAM_VIA_BUF2 0x85 + +/* compare buffer to flash */ +#define OP_COMPARE_BUF1 0x60 +#define OP_COMPARE_BUF2 0x61 + +/* read flash to buffer, then write-erase to flash */ +#define OP_REWRITE_VIA_BUF1 0x58 +#define OP_REWRITE_VIA_BUF2 0x59 + +/* newer chips report JEDEC manufacturer and device IDs; chip + * serial number and OTP bits; and per-sector writeprotect. + */ +#define OP_READ_ID 0x9F +#define OP_READ_SECURITY 0x77 +#define OP_WRITE_SECURITY_REVC 0x9A +#define OP_WRITE_SECURITY 0x9B /* revision D */ + +#define SPI_FIFOSIZE 24 /* Bust size in bytes */ +#define CMD_SIZE 4 +#define DUMY_SIZE 4 + +struct dataflash { + uint8_t command[4]; + char name[24]; + + unsigned partitioned:1; + + unsigned short page_offset; /* offset in flash address */ + unsigned int page_size; /* of bytes per page */ + + struct mutex lock; + struct spi_device *spi; + + struct mtd_info mtd; +}; + +#ifdef CONFIG_MTD_PARTITIONS +#define mtd_has_partitions() (1) +#else +#define mtd_has_partitions() (0) +#endif + +/* ......................................................................... */ + +/* + * This function initializes the SPI device parameters. + */ +static inline int spi_nor_setup(struct spi_device *spi, u8 bst_len) +{ + spi->bits_per_word = bst_len << 3; + + return spi_setup(spi); +} + +/* + * This function perform spi read/write transfer. + */ +static int spi_read_write(struct spi_device *spi, u8 * buf, u32 len) +{ + struct spi_message m; + struct spi_transfer t; + + if (len > SPI_FIFOSIZE || len <= 0) + return -1; + + spi_nor_setup(spi, len); + + spi_message_init(&m); + memset(&t, 0, sizeof t); + + t.tx_buf = buf; + t.rx_buf = buf; + t.len = ((len - 1) >> 2) + 1; + + spi_message_add_tail(&t, &m); + + if (spi_sync(spi, &m) != 0 || m.status != 0) { + printk(KERN_ERR "%s: error\n", __func__); + return -1; + } + + DEBUG(MTD_DEBUG_LEVEL2, "%s: len: 0x%x success\n", __func__, len); + + return 0; + +} + +/* + * Return the status of the DataFlash device. + */ +static inline int dataflash_status(struct spi_device *spi) +{ + /* NOTE: at45db321c over 25 MHz wants to write + * a dummy byte after the opcode... + */ + ssize_t retval; + + u16 val = OP_READ_STATUS << 8; + + retval = spi_read_write(spi, (u8 *)&val, 2); + + if (retval < 0) + return retval; + + DEBUG(MTD_DEBUG_LEVEL2, "%s: status: 0x%x\n", __func__, val & 0xff); + + return val & 0xff; +} + +/* + * Poll the DataFlash device until it is READY. + * This usually takes 5-20 msec or so; more for sector erase. + */ +static int dataflash_waitready(struct spi_device *spi) +{ + int status; + + for (;;) { + status = dataflash_status(spi); + if (status < 0) { + DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n", + dev_name(&spi->dev), status); + status = 0; + } + + if (status & (1 << 7)) /* RDY/nBSY */ + return status; + + msleep(3); + } +} + +/* ......................................................................... */ + +/* + * Erase pages of flash. + */ +static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + struct dataflash *priv = (struct dataflash *)mtd->priv; + struct spi_device *spi = priv->spi; + unsigned blocksize = priv->page_size << 3; + uint8_t *command; + uint32_t rem; + + DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%llx len 0x%llx\n", + dev_name(&spi->dev), (long long)instr->addr, + (long long)instr->len); + + /* Sanity checks */ + if (instr->addr + instr->len > mtd->size) + return -EINVAL; + div_u64_rem(instr->len, priv->page_size, &rem); + if (rem) + return -EINVAL; + div_u64_rem(instr->addr, priv->page_size, &rem); + if (rem) + return -EINVAL; + + command = priv->command; + + mutex_lock(&priv->lock); + while (instr->len > 0) { + unsigned int pageaddr; + int status; + int do_block; + + /* Calculate flash page address; use block erase (for speed) if + * we're at a block boundary and need to erase the whole block. + */ + pageaddr = div_u64(instr->addr, priv->page_size); + do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; + pageaddr = pageaddr << priv->page_offset; + + command[3] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; + command[2] = (uint8_t) (pageaddr >> 16); + command[1] = (uint8_t) (pageaddr >> 8); + command[0] = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n", + do_block ? "block" : "page", + command[0], command[1], command[2], command[3], pageaddr); + + status = spi_read_write(spi, command, 4); + (void)dataflash_waitready(spi); + + if (status < 0) { + printk(KERN_ERR "%s: erase %x, err %d\n", + dev_name(&spi->dev), pageaddr, status); + /* REVISIT: can retry instr->retries times; or + * giveup and instr->fail_addr = instr->addr; + */ + continue; + } + + if (do_block) { + instr->addr += blocksize; + instr->len -= blocksize; + } else { + instr->addr += priv->page_size; + instr->len -= priv->page_size; + } + } + mutex_unlock(&priv->lock); + + /* Inform MTD subsystem that erase is complete */ + instr->state = MTD_ERASE_DONE; + mtd_erase_callback(instr); + + return 0; +} + +/* + * Read from the DataFlash device. + * from : Start offset in flash device + * len : Amount to read + * retlen : About of data actually read + * buf : Buffer containing the data + */ +static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) +{ + struct dataflash *priv = mtd->priv; + struct spi_device *spi = priv->spi; + u32 addr; + int rx_len = 0, count = 0, i = 0; + u_char txer[SPI_FIFOSIZE]; + u_char *s = txer; + u_char *d = buf; + int cmd_len = CMD_SIZE + DUMY_SIZE; + int status = 0; + + DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n", + dev_name(&priv->spi->dev), (unsigned)from, (unsigned)(from + len)); + + *retlen = 0; + + /* Sanity checks */ + if (!len) + return 0; + + if (from + len > mtd->size) + return -EINVAL; + + /* Calculate flash page/byte address */ + addr = (((unsigned)from / priv->page_size) << priv->page_offset) + + ((unsigned)from % priv->page_size); + + mutex_unlock(&priv->lock); + + while (len > 0) { + + rx_len = len > (SPI_FIFOSIZE - cmd_len) ? + SPI_FIFOSIZE - cmd_len : len; + + txer[3] = OP_READ_CONTINUOUS; + txer[2] = (addr >> 16) & 0xff; + txer[1] = (addr >> 8) & 0xff; + txer[0] = addr & 0xff; + + status = spi_read_write(spi, txer, + roundup(rx_len, 4) + cmd_len); + if (status) { + mutex_unlock(&priv->lock); + return status; + } + + s = txer + cmd_len; + + for (i = rx_len; i >= 0; i -= 4, s += 4) { + if (i < 4) { + if (i == 1) { + *d = s[3]; + } else if (i == 2) { + *d++ = s[3]; + *d++ = s[2]; + } else if (i == 3) { + *d++ = s[3]; + *d++ = s[2]; + *d++ = s[1]; + } + + break; + } + + *d++ = s[3]; + *d++ = s[2]; + *d++ = s[1]; + *d++ = s[0]; + } + + /* updaate */ + len -= rx_len; + addr += rx_len; + count += rx_len; + + DEBUG(MTD_DEBUG_LEVEL2, + "%s: left:0x%x, from:0x%08x, to:0x%p, done: 0x%x\n", + __func__, len, (u32) addr, d, count); + } + + *retlen = count; + + DEBUG(MTD_DEBUG_LEVEL2, "%s: %d bytes read\n", __func__, count); + + mutex_unlock(&priv->lock); + + return status; +} + +/* + * Write to the DataFlash device. + * to : Start offset in flash device + * len : Amount to write + * retlen : Amount of data actually written + * buf : Buffer containing the data + */ +static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) +{ + struct dataflash *priv = mtd->priv; + struct spi_device *spi = priv->spi; + u32 pageaddr, addr, offset, writelen; + size_t remaining = len; + u_char *writebuf = (u_char *) buf; + int status = -EINVAL; + u_char txer[SPI_FIFOSIZE] = { 0 }; + uint8_t *command = priv->command; + u_char *d = txer; + u_char *s = (u_char *) buf; + int delta = 0, l = 0, i = 0, count = 0; + + DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n", + dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len)); + + *retlen = 0; + + /* Sanity checks */ + if (!len) + return 0; + + if ((to + len) > mtd->size) + return -EINVAL; + + pageaddr = ((unsigned)to / priv->page_size); + offset = ((unsigned)to % priv->page_size); + if (offset + len > priv->page_size) + writelen = priv->page_size - offset; + else + writelen = len; + + mutex_lock(&priv->lock); + + while (remaining > 0) { + DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n", + pageaddr, offset, writelen); + + addr = pageaddr << priv->page_offset; + + /* (1) Maybe transfer partial page to Buffer1 */ + if (writelen != priv->page_size) { + command[3] = OP_TRANSFER_BUF1; + command[2] = (addr & 0x00FF0000) >> 16; + command[1] = (addr & 0x0000FF00) >> 8; + command[0] = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n", + command[3], command[2], command[1], command[0]); + + status = spi_read_write(spi, command, CMD_SIZE); + if (status) { + mutex_unlock(&priv->lock); + return status; + + } + + (void)dataflash_waitready(spi); + } + + count = writelen; + while (count) { + d = txer; + l = count > (SPI_FIFOSIZE - CMD_SIZE) ? + SPI_FIFOSIZE - CMD_SIZE : count; + + delta = l % 4; + if (delta) { + switch (delta) { + case 1: + d[0] = OP_WRITE_BUFFER1; + d[6] = (offset >> 8) & 0xff; + d[5] = offset & 0xff; + d[4] = *s++; + break; + case 2: + d[1] = OP_WRITE_BUFFER1; + d[7] = (offset >> 8) & 0xff; + d[6] = offset & 0xff; + d[5] = *s++; + d[4] = *s++; + break; + case 3: + d[2] = OP_WRITE_BUFFER1; + d[0] = (offset >> 8) & 0xff; + d[7] = offset & 0xff; + d[6] = *s++; + d[5] = *s++; + d[4] = *s++; + break; + default: + break; + } + + DEBUG(MTD_DEBUG_LEVEL3, + "WRITEBUF: (%x) %x %x %x\n", + txer[3], txer[2], txer[1], txer[0]); + + status = spi_read_write(spi, txer, + delta + CMD_SIZE); + if (status) { + mutex_unlock(&priv->lock); + return status; + } + + /* update */ + count -= delta; + offset += delta; + l -= delta; + } + + d[3] = OP_WRITE_BUFFER1; + d[1] = (offset >> 8) & 0xff; + d[0] = offset & 0xff; + + for (i = 0, d += 4; i < l / 4; i++, d += 4) { + d[3] = *s++; + d[2] = *s++; + d[1] = *s++; + d[0] = *s++; + } + + DEBUG(MTD_DEBUG_LEVEL3, "WRITEBUF: (%x) %x %x %x\n", + txer[3], txer[2], txer[1], txer[0]); + + status = spi_read_write(spi, txer, l + CMD_SIZE); + if (status) { + mutex_unlock(&priv->lock); + return status; + } + + /* update */ + count -= l; + offset += l; + } + + /* (2) Program full page via Buffer1 */ + command[3] = OP_MWERASE_BUFFER1; + command[2] = (addr >> 16) & 0xff; + command[1] = (addr >> 8) & 0xff; + + DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n", + command[3], command[2], command[1], command[0]); + + status = spi_read_write(spi, command, CMD_SIZE); + if (status) { + mutex_unlock(&priv->lock); + return status; + } + + (void)dataflash_waitready(spi); + + remaining -= writelen; + pageaddr++; + offset = 0; + writebuf += writelen; + *retlen += writelen; + + if (remaining > priv->page_size) + writelen = priv->page_size; + else + writelen = remaining; + } + mutex_unlock(&priv->lock); + + return status; +} + +/* ......................................................................... */ + +#ifdef CONFIG_MTD_DATAFLASH_OTP + +static int dataflash_get_otp_info(struct mtd_info *mtd, + struct otp_info *info, size_t len) +{ + /* Report both blocks as identical: bytes 0..64, locked. + * Unless the user block changed from all-ones, we can't + * tell whether it's still writable; so we assume it isn't. + */ + info->start = 0; + info->length = 64; + info->locked = 1; + return sizeof(*info); +} + +static ssize_t otp_read(struct spi_device *spi, unsigned base, + uint8_t *buf, loff_t off, size_t len) +{ + struct dataflash *priv = mtd->priv; + struct spi_device *spi = priv->spi; + int rx_len = 0, count = 0, i = 0; + u_char txer[SPI_FIFOSIZE]; + u_char *s = txer; + u_char *d = NULL; + int cmd_len = CMD_SIZE; + int status; + + if (off > 64) + return -EINVAL; + + if ((off + len) > 64) + len = 64 - off; + if (len == 0) + return len; + + /* to make simple, we read 64 out */ + l = base + 64; + + d = kzalloc(l, GFP_KERNEL); + if (!d) + return -ENOMEM; + + while (l > 0) { + + rx_len = l > (SPI_FIFOSIZE - cmd_len) ? + SPI_FIFOSIZE - cmd_len : l; + + txer[3] = OP_READ_SECURITY; + + status = spi_read_write(spi, txer, rx_len + cmd_len); + if (status) { + mutex_unlock(&priv->lock); + return status; + } + + s = txer + cmd_len; + for (i = rx_len; i >= 0; i -= 4, s += 4) { + + *d++ = s[3]; + *d++ = s[2]; + *d++ = s[1]; + *d++ = s[0]; + } + + /* updaate */ + l -= rx_len; + addr += rx_len; + count += rx_len; + + DEBUG(MTD_DEBUG_LEVEL2, + "%s: left:0x%x, from:0x%08x, to:0x%p, done: 0x%x\n", + __func__, len, (u32) addr, d, count); + } + + d -= count; + memcpy(buf, d + base + off, len); + + mutex_unlock(&priv->lock); + + return len; +} + +static int dataflash_read_fact_otp(struct mtd_info *mtd, + loff_t from, size_t len, size_t *retlen, + u_char *buf) +{ + struct dataflash *priv = (struct dataflash *)mtd->priv; + int status; + + /* 64 bytes, from 0..63 ... start at 64 on-chip */ + mutex_lock(&priv->lock); + status = otp_read(priv->spi, 64, buf, from, len); + mutex_unlock(&priv->lock); + + if (status < 0) + return status; + *retlen = status; + return 0; +} + +static int dataflash_read_user_otp(struct mtd_info *mtd, + loff_t from, size_t len, size_t *retlen, + u_char *buf) +{ + struct dataflash *priv = (struct dataflash *)mtd->priv; + int status; + + /* 64 bytes, from 0..63 ... start at 0 on-chip */ + mutex_lock(&priv->lock); + status = otp_read(priv->spi, 0, buf, from, len); + mutex_unlock(&priv->lock); + + if (status < 0) + return status; + *retlen = status; + return 0; +} + +static int dataflash_write_user_otp(struct mtd_info *mtd, + loff_t from, size_t len, size_t *retlen, + u_char *buf) +{ + printk(KERN_ERR "%s not support!!\n", __func__); + return 0; +} + +static char *otp_setup(struct mtd_info *device, char revision) +{ + device->get_fact_prot_info = dataflash_get_otp_info; + device->read_fact_prot_reg = dataflash_read_fact_otp; + device->get_user_prot_info = dataflash_get_otp_info; + device->read_user_prot_reg = dataflash_read_user_otp; + + /* rev c parts (at45db321c and at45db1281 only!) use a + * different write procedure; not (yet?) implemented. + */ + if (revision > 'c') + device->write_user_prot_reg = dataflash_write_user_otp; + + return ", OTP"; +} + +#else + +static char *otp_setup(struct mtd_info *device, char revision) +{ + return " (OTP)"; +} + +#endif + +/* ......................................................................... */ + +/* + * Register DataFlash device with MTD subsystem. + */ +static int __devinit +add_dataflash_otp(struct spi_device *spi, char *name, + int nr_pages, int pagesize, int pageoffset, char revision) +{ + struct dataflash *priv; + struct mtd_info *device; + struct flash_platform_data *pdata = spi->dev.platform_data; + char *otp_tag = ""; + + priv = kzalloc(sizeof *priv, GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->lock); + priv->spi = spi; + priv->page_size = pagesize; + priv->page_offset = pageoffset; + + /* name must be usable with cmdlinepart */ + sprintf(priv->name, "spi%d.%d-%s", + spi->master->bus_num, spi->chip_select, name); + + device = &priv->mtd; + device->name = (pdata && pdata->name) ? pdata->name : priv->name; + device->size = nr_pages * pagesize; + device->erasesize = pagesize; + device->writesize = pagesize; + device->owner = THIS_MODULE; + device->type = MTD_DATAFLASH; + device->flags = MTD_CAP_NORFLASH; + device->erase = dataflash_erase; + device->read = dataflash_read; + device->write = dataflash_write; + device->priv = priv; + + if (revision >= 'c') + otp_tag = otp_setup(device, revision); + + dev_info(&spi->dev, "%s (%llx KBytes) pagesize %d bytes%s\n", + name, DIV_ROUND_UP(device->size, 1024), pagesize, otp_tag); + dev_set_drvdata(&spi->dev, priv); + + if (mtd_has_partitions()) { + struct mtd_partition *parts; + int nr_parts = 0; + +#ifdef CONFIG_MTD_CMDLINE_PARTS + static const char *part_probes[] = { "cmdlinepart", NULL, }; + + nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0); +#endif + + if (nr_parts <= 0 && pdata && pdata->parts) { + parts = pdata->parts; + nr_parts = pdata->nr_parts; + } + + if (nr_parts > 0) { + priv->partitioned = 1; + return add_mtd_partitions(device, parts, nr_parts); + } + } else if (pdata && pdata->nr_parts) + dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", + pdata->nr_parts, device->name); + + return add_mtd_device(device) == 1 ? -ENODEV : 0; +} + +static inline int __devinit +add_dataflash(struct spi_device *spi, char *name, + int nr_pages, int pagesize, int pageoffset) +{ + return add_dataflash_otp(spi, name, nr_pages, pagesize, pageoffset, 0); +} + +struct flash_info { + char *name; + + /* JEDEC id has a high byte of zero plus three data bytes: + * the manufacturer id, then a two byte device id. + */ + uint32_t jedec_id; + + /* The size listed here is what works with OP_ERASE_PAGE. */ + unsigned nr_pages; + uint16_t pagesize; + uint16_t pageoffset; + + uint16_t flags; +#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ +#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ +}; + +static struct flash_info __devinitdata dataflash_data[] = { + + /* + * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, + * one with IS_POW2PS and the other without. The entry with the + * non-2^N byte page size can't name exact chip revisions without + * losing backwards compatibility for cmdlinepart. + * + * These newer chips also support 128-byte security registers (with + * 64 bytes one-time-programmable) and software write-protection. + */ + {"AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, + {"at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, + {"at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, + {"at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, + {"at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, + {"at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ + + {"AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, + {"at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, + + {"AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, + {"at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, +}; + +static struct flash_info *__devinit jedec_probe(struct spi_device *spi) +{ + int tmp; + u32 code = OP_READ_ID << 24; + u32 jedec; + struct flash_info *info; + int status; + + /* JEDEC also defines an optional "extended device information" + * string for after vendor-specific data, after the three bytes + * we use here. Supporting some chips might require using it. + * + * If the vendor ID isn't Atmel's (0x1f), assume this call failed. + * That's not an error; only rev C and newer chips handle it, and + * only Atmel sells these chips. + */ + + tmp = spi_read_write(spi, (u8 *)&code, 4); + if (tmp < 0) { + DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", + dev_name(&spi->dev), tmp); + return NULL; + } + + jedec = code & 0xFFFFFF; + + for (tmp = 0, info = dataflash_data; + tmp < ARRAY_SIZE(dataflash_data); tmp++, info++) { + if (info->jedec_id == jedec) { + DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n", + dev_name(&spi->dev), (info->flags & SUP_POW2PS) + ? ", binary pagesize" : ""); + if (info->flags & SUP_POW2PS) { + status = dataflash_status(spi); + if (status < 0) { + DEBUG(MTD_DEBUG_LEVEL1, + "%s: status error %d\n", + dev_name(&spi->dev), status); + return ERR_PTR(status); + } + if (status & 0x1) { + if (info->flags & IS_POW2PS) + return info; + } else { + if (!(info->flags & IS_POW2PS)) + return info; + } + } + } + } + + /* + * Treat other chips as errors ... we won't know the right page + * size (it might be binary) even when we can tell which density + * class is involved (legacy chip id scheme). + */ + dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec); + return ERR_PTR(-ENODEV); +} + +/* + * Detect and initialize DataFlash device, using JEDEC IDs on newer chips + * or else the ID code embedded in the status bits: + * + * Device Density ID code #Pages PageSize Offset + * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 + * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 + * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 + * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 + * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 + * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 + * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 + * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 + */ +static int __devinit dataflash_probe(struct spi_device *spi) +{ + int status; + struct flash_info *info; + + /* + * Try to detect dataflash by JEDEC ID. + * If it succeeds we know we have either a C or D part. + * D will support power of 2 pagesize option. + * Both support the security register, though with different + * write procedures. + */ + info = jedec_probe(spi); + if (IS_ERR(info)) + return PTR_ERR(info); + if (info != NULL) + return add_dataflash_otp(spi, info->name, info->nr_pages, + info->pagesize, info->pageoffset, + (info->flags & SUP_POW2PS) ? 'd' : + 'c'); + + /* + * Older chips support only legacy commands, identifing + * capacity using bits in the status byte. + */ + status = dataflash_status(spi); + if (status <= 0 || status == 0xff) { + DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", + dev_name(&spi->dev), status); + if (status == 0 || status == 0xff) + status = -ENODEV; + return status; + } + + /* if there's a device there, assume it's dataflash. + * board setup should have set spi->max_speed_max to + * match f(car) for continuous reads, mode 0 or 3. + */ + switch (status & 0x3c) { + case 0x0c: /* 0 0 1 1 x x */ + status = add_dataflash(spi, "AT45DB011B", 512, 264, 9); + break; + case 0x14: /* 0 1 0 1 x x */ + status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9); + break; + case 0x1c: /* 0 1 1 1 x x */ + status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); + break; + case 0x24: /* 1 0 0 1 x x */ + status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); + break; + case 0x2c: /* 1 0 1 1 x x */ + status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); + break; + case 0x34: /* 1 1 0 1 x x */ + status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); + break; + case 0x38: /* 1 1 1 x x x */ + case 0x3c: + status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11); + break; + /* obsolete AT45DB1282 not (yet?) supported */ + default: + DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n", + dev_name(&spi->dev), status & 0x3c); + status = -ENODEV; + } + + if (status < 0) + DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n", + dev_name(&spi->dev), status); + + return status; +} + +static int __devexit dataflash_remove(struct spi_device *spi) +{ + struct dataflash *flash = dev_get_drvdata(&spi->dev); + int status; + + DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", dev_name(&spi->dev)); + + if (mtd_has_partitions() && flash->partitioned) + status = del_mtd_partitions(&flash->mtd); + else + status = del_mtd_device(&flash->mtd); + if (status == 0) + kfree(flash); + return status; +} + +static struct spi_driver dataflash_driver = { + .driver = { + .name = "mxc_dataflash", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + + .probe = dataflash_probe, + .remove = __devexit_p(dataflash_remove), + + /* FIXME: investigate suspend and resume... */ +}; + +static int __init dataflash_init(void) +{ + return spi_register_driver(&dataflash_driver); +} + +module_init(dataflash_init); + +static void __exit dataflash_exit(void) +{ + spi_unregister_driver(&dataflash_driver); +} + +module_exit(dataflash_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MTD DataFlash driver"); --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/devices/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mtd/devices/Kconfig @@ -80,6 +80,14 @@ other key product data. The second half is programmed with a unique-to-each-chip bit pattern at the factory. +config MTD_MXC_DATAFLASH + tristate "Support for AT DataFlash via FSL SPI interface" + depends on SPI_MASTER && EXPERIMENTAL + help + This enables access to AT DataFlash chips, using FSL SPI. + Sometimes DataFlash chips are packaged inside MMC-format + cards; at this writing, the MMC stack won't handle those. + config MTD_M25P80 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)" depends on SPI_MASTER && EXPERIMENTAL --- linux-fsl-imx51-2.6.31.orig/drivers/mtd/devices/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mtd/devices/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o obj-$(CONFIG_MTD_M25P80) += m25p80.o +obj-$(CONFIG_MTD_MXC_DATAFLASH) += mxc_dataflash.o --- linux-fsl-imx51-2.6.31.orig/drivers/ide/cmd64x.c +++ linux-fsl-imx51-2.6.31/drivers/ide/cmd64x.c @@ -379,7 +379,8 @@ .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | - IDE_HFLAG_ABUSE_PREFETCH, + IDE_HFLAG_ABUSE_PREFETCH | + IDE_HFLAG_SERIALIZE, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, .udma_mask = 0x00, /* no udma */ @@ -389,7 +390,8 @@ .init_chipset = init_chipset_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd648_port_ops, - .host_flags = IDE_HFLAG_ABUSE_PREFETCH, + .host_flags = IDE_HFLAG_ABUSE_PREFETCH | + IDE_HFLAG_SERIALIZE, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, .udma_mask = ATA_UDMA2, --- linux-fsl-imx51-2.6.31.orig/drivers/ide/sis5513.c +++ linux-fsl-imx51-2.6.31/drivers/ide/sis5513.c @@ -2,7 +2,7 @@ * Copyright (C) 1999-2000 Andre Hedrick * Copyright (C) 2002 Lionel Bouton , Maintainer * Copyright (C) 2003 Vojtech Pavlik - * Copyright (C) 2007 Bartlomiej Zolnierkiewicz + * Copyright (C) 2007-2009 Bartlomiej Zolnierkiewicz * * May be copied or modified under the terms of the GNU General Public License * @@ -281,11 +281,13 @@ pci_read_config_byte(dev, 0x4b, ®4bh); + rw_prefetch = reg4bh & ~(0x11 << drive->dn); + if (drive->media == ide_disk) - rw_prefetch = 0x11 << drive->dn; + rw_prefetch |= 0x11 << drive->dn; - if ((reg4bh & (0x11 << drive->dn)) != rw_prefetch) - pci_write_config_byte(dev, 0x4b, reg4bh|rw_prefetch); + if (reg4bh != rw_prefetch) + pci_write_config_byte(dev, 0x4b, rw_prefetch); } static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio) --- linux-fsl-imx51-2.6.31.orig/drivers/ide/slc90e66.c +++ linux-fsl-imx51-2.6.31/drivers/ide/slc90e66.c @@ -91,8 +91,7 @@ if (!(reg48 & u_flag)) pci_write_config_word(dev, 0x48, reg48|u_flag); - /* FIXME: (reg4a & a_speed) ? */ - if ((reg4a & u_speed) != u_speed) { + if ((reg4a & a_speed) != u_speed) { pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); pci_read_config_word(dev, 0x4a, ®4a); pci_write_config_word(dev, 0x4a, reg4a|u_speed); --- linux-fsl-imx51-2.6.31.orig/drivers/ide/ide-probe.c +++ linux-fsl-imx51-2.6.31/drivers/ide/ide-probe.c @@ -1035,15 +1035,6 @@ if (port_ops && port_ops->init_dev) port_ops->init_dev(drive); } - - ide_port_for_each_dev(i, drive, hwif) { - /* - * default to PIO Mode 0 before we figure out - * the most suited mode for the attached device - */ - if (port_ops && port_ops->set_pio_mode) - port_ops->set_pio_mode(drive, 0); - } } static void ide_init_port(ide_hwif_t *hwif, unsigned int port, --- linux-fsl-imx51-2.6.31.orig/drivers/ide/ide-ioctls.c +++ linux-fsl-imx51-2.6.31/drivers/ide/ide-ioctls.c @@ -162,7 +162,7 @@ if (tf->command == ATA_CMD_SET_FEATURES && tf->feature == SETFEATURES_XFER && tf->nsect >= XFER_SW_DMA_0) { - xfer_rate = ide_find_dma_mode(drive, XFER_UDMA_6); + xfer_rate = ide_find_dma_mode(drive, tf->nsect); if (xfer_rate != tf->nsect) { err = -EINVAL; goto abort; --- linux-fsl-imx51-2.6.31.orig/drivers/virtio/virtio_ring.c +++ linux-fsl-imx51-2.6.31/drivers/virtio/virtio_ring.c @@ -281,6 +281,9 @@ return NULL; } + /* Only get used array entries after they have been exposed by host. */ + rmb(); + i = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].id; *len = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].len; --- linux-fsl-imx51-2.6.31.orig/drivers/serial/68360serial.c +++ linux-fsl-imx51-2.6.31/drivers/serial/68360serial.c @@ -1381,6 +1381,30 @@ } +/* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ +static int rs_360_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + ser_info_t *info = (ser_info_t *)tty->driver_data; + struct async_icount cnow; + + local_irq_disable(); + cnow = info->state->icount; + local_irq_enable(); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + + return 0; +} + static int rs_360_ioctl(struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg) { @@ -1394,7 +1418,7 @@ if (serial_paranoia_check(info, tty->name, "rs_ioctl")) return -ENODEV; - if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + if (cmd != TIOCMIWAIT) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -1477,31 +1501,6 @@ return 0; #endif - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - local_irq_disable(); - cnow = info->state->icount; - local_irq_enable(); - p_cuser = (struct serial_icounter_struct *) arg; -/* error = put_user(cnow.cts, &p_cuser->cts); */ -/* if (error) return error; */ -/* error = put_user(cnow.dsr, &p_cuser->dsr); */ -/* if (error) return error; */ -/* error = put_user(cnow.rng, &p_cuser->rng); */ -/* if (error) return error; */ -/* error = put_user(cnow.dcd, &p_cuser->dcd); */ -/* if (error) return error; */ - - put_user(cnow.cts, &p_cuser->cts); - put_user(cnow.dsr, &p_cuser->dsr); - put_user(cnow.rng, &p_cuser->rng); - put_user(cnow.dcd, &p_cuser->dcd); - return 0; default: return -ENOIOCTLCMD; --- linux-fsl-imx51-2.6.31.orig/drivers/serial/8250_pci.c +++ linux-fsl-imx51-2.6.31/drivers/serial/8250_pci.c @@ -1561,6 +1561,7 @@ pbn_exar_XR17C152, pbn_exar_XR17C154, pbn_exar_XR17C158, + pbn_exar_ibm_saturn, pbn_pasemi_1682M, pbn_ni8430_2, pbn_ni8430_4, @@ -2146,6 +2147,13 @@ .base_baud = 921600, .uart_offset = 0x200, }, + [pbn_exar_ibm_saturn] = { + .flags = FL_BASE0, + .num_ports = 1, + .base_baud = 921600, + .uart_offset = 0x200, + }, + /* * PA Semi PWRficient PA6T-1682M on-chip UART */ @@ -2649,6 +2657,9 @@ PCI_SUBVENDOR_ID_CONNECT_TECH, PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0, pbn_b0_8_1843200_200 }, + { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, + PCI_VENDOR_ID_IBM, PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT, + 0, 0, pbn_exar_ibm_saturn }, { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, --- linux-fsl-imx51-2.6.31.orig/drivers/serial/bfin_5xx.c +++ linux-fsl-imx51-2.6.31/drivers/serial/bfin_5xx.c @@ -42,6 +42,10 @@ # undef CONFIG_EARLY_PRINTK #endif +#ifdef CONFIG_SERIAL_BFIN_MODULE +# undef CONFIG_EARLY_PRINTK +#endif + /* UART name and device definitions */ #define BFIN_SERIAL_NAME "ttyBF" #define BFIN_SERIAL_MAJOR 204 --- linux-fsl-imx51-2.6.31.orig/drivers/serial/sunhv.c +++ linux-fsl-imx51-2.6.31/drivers/serial/sunhv.c @@ -566,7 +566,7 @@ goto out_free_con_read_page; sunserial_console_match(&sunhv_console, op->node, - &sunhv_reg, port->line); + &sunhv_reg, port->line, false); err = uart_add_one_port(&sunhv_reg, port); if (err) --- linux-fsl-imx51-2.6.31.orig/drivers/serial/mxc_uart_reg.h +++ linux-fsl-imx51-2.6.31/drivers/serial/mxc_uart_reg.h @@ -0,0 +1,128 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MXC_UART_REG_H__ +#define __MXC_UART_REG_H__ + +/* Address offsets of the UART registers */ +#define MXC_UARTURXD 0x000 /* Receive reg */ +#define MXC_UARTUTXD 0x040 /* Transmitter reg */ +#define MXC_UARTUCR1 0x080 /* Control reg 1 */ +#define MXC_UARTUCR2 0x084 /* Control reg 2 */ +#define MXC_UARTUCR3 0x088 /* Control reg 3 */ +#define MXC_UARTUCR4 0x08C /* Control reg 4 */ +#define MXC_UARTUFCR 0x090 /* FIFO control reg */ +#define MXC_UARTUSR1 0x094 /* Status reg 1 */ +#define MXC_UARTUSR2 0x098 /* Status reg 2 */ +#define MXC_UARTUESC 0x09C /* Escape character reg */ +#define MXC_UARTUTIM 0x0A0 /* Escape timer reg */ +#define MXC_UARTUBIR 0x0A4 /* BRM incremental reg */ +#define MXC_UARTUBMR 0x0A8 /* BRM modulator reg */ +#define MXC_UARTUBRC 0x0AC /* Baud rate count reg */ +#define MXC_UARTONEMS 0x0B0 /* One millisecond reg */ +#define MXC_UARTUTS 0x0B4 /* Test reg */ + +/* Bit definations of UCR1 */ +#define MXC_UARTUCR1_ADEN 0x8000 +#define MXC_UARTUCR1_ADBR 0x4000 +#define MXC_UARTUCR1_TRDYEN 0x2000 +#define MXC_UARTUCR1_IDEN 0x1000 +#define MXC_UARTUCR1_RRDYEN 0x0200 +#define MXC_UARTUCR1_RXDMAEN 0x0100 +#define MXC_UARTUCR1_IREN 0x0080 +#define MXC_UARTUCR1_TXMPTYEN 0x0040 +#define MXC_UARTUCR1_RTSDEN 0x0020 +#define MXC_UARTUCR1_SNDBRK 0x0010 +#define MXC_UARTUCR1_TXDMAEN 0x0008 +#define MXC_UARTUCR1_ATDMAEN 0x0004 +#define MXC_UARTUCR1_DOZE 0x0002 +#define MXC_UARTUCR1_UARTEN 0x0001 + +/* Bit definations of UCR2 */ +#define MXC_UARTUCR2_ESCI 0x8000 +#define MXC_UARTUCR2_IRTS 0x4000 +#define MXC_UARTUCR2_CTSC 0x2000 +#define MXC_UARTUCR2_CTS 0x1000 +#define MXC_UARTUCR2_PREN 0x0100 +#define MXC_UARTUCR2_PROE 0x0080 +#define MXC_UARTUCR2_STPB 0x0040 +#define MXC_UARTUCR2_WS 0x0020 +#define MXC_UARTUCR2_RTSEN 0x0010 +#define MXC_UARTUCR2_ATEN 0x0008 +#define MXC_UARTUCR2_TXEN 0x0004 +#define MXC_UARTUCR2_RXEN 0x0002 +#define MXC_UARTUCR2_SRST 0x0001 + +/* Bit definations of UCR3 */ +#define MXC_UARTUCR3_DTREN 0x2000 +#define MXC_UARTUCR3_PARERREN 0x1000 +#define MXC_UARTUCR3_FRAERREN 0x0800 +#define MXC_UARTUCR3_DSR 0x0400 +#define MXC_UARTUCR3_DCD 0x0200 +#define MXC_UARTUCR3_RI 0x0100 +#define MXC_UARTUCR3_RXDSEN 0x0040 +#define MXC_UARTUCR3_AWAKEN 0x0010 +#define MXC_UARTUCR3_DTRDEN 0x0008 +#define MXC_UARTUCR3_RXDMUXSEL 0x0004 +#define MXC_UARTUCR3_INVT 0x0002 + +/* Bit definations of UCR4 */ +#define MXC_UARTUCR4_CTSTL_OFFSET 10 +#define MXC_UARTUCR4_CTSTL_MASK (0x3F << 10) +#define MXC_UARTUCR4_INVR 0x0200 +#define MXC_UARTUCR4_ENIRI 0x0100 +#define MXC_UARTUCR4_REF16 0x0040 +#define MXC_UARTUCR4_IRSC 0x0020 +#define MXC_UARTUCR4_TCEN 0x0008 +#define MXC_UARTUCR4_OREN 0x0002 +#define MXC_UARTUCR4_DREN 0x0001 + +/* Bit definations of UFCR */ +#define MXC_UARTUFCR_RFDIV 0x0200 /* Ref freq div is set to 2 */ +#define MXC_UARTUFCR_RFDIV_OFFSET 7 +#define MXC_UARTUFCR_RFDIV_MASK (0x7 << 7) +#define MXC_UARTUFCR_TXTL_OFFSET 10 +#define MXC_UARTUFCR_DCEDTE 0x0040 + +/* Bit definations of URXD */ +#define MXC_UARTURXD_ERR 0x4000 +#define MXC_UARTURXD_OVRRUN 0x2000 +#define MXC_UARTURXD_FRMERR 0x1000 +#define MXC_UARTURXD_BRK 0x0800 +#define MXC_UARTURXD_PRERR 0x0400 + +/* Bit definations of USR1 */ +#define MXC_UARTUSR1_PARITYERR 0x8000 +#define MXC_UARTUSR1_RTSS 0x4000 +#define MXC_UARTUSR1_TRDY 0x2000 +#define MXC_UARTUSR1_RTSD 0x1000 +#define MXC_UARTUSR1_FRAMERR 0x0400 +#define MXC_UARTUSR1_RRDY 0x0200 +#define MXC_UARTUSR1_AGTIM 0x0100 +#define MXC_UARTUSR1_DTRD 0x0080 +#define MXC_UARTUSR1_AWAKE 0x0010 + +/* Bit definations of USR2 */ +#define MXC_UARTUSR2_TXFE 0x4000 +#define MXC_UARTUSR2_IDLE 0x1000 +#define MXC_UARTUSR2_RIDELT 0x0400 +#define MXC_UARTUSR2_RIIN 0x0200 +#define MXC_UARTUSR2_DCDDELT 0x0040 +#define MXC_UARTUSR2_DCDIN 0x0020 +#define MXC_UARTUSR2_TXDC 0x0008 +#define MXC_UARTUSR2_ORE 0x0002 +#define MXC_UARTUSR2_RDR 0x0001 + +/* Bit definations of UTS */ +#define MXC_UARTUTS_LOOP 0x1000 + +#endif /* __MXC_UART_REG_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/serial/mxc_uart_early.c +++ linux-fsl-imx51-2.6.31/drivers/serial/mxc_uart_early.c @@ -0,0 +1,253 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/serial/mxc_uart_early.c + * + * @brief Driver for the Freescale Semiconductor MXC serial ports based on + * drivers/char/8250_early.c, Copyright 2004 Hewlett-Packard Development Company, + * L.P. by Bjorn Helgaasby. + * + * Early serial console for MXC UARTS. + * + * This is for use before the serial driver has initialized, in + * particular, before the UARTs have been discovered and named. + * Instead of specifying the console device as, e.g., "ttymxc0", + * we locate the device directly by its MMIO or I/O port address. + * + * The user can specify the device directly, e.g., + * console=mxcuart,0x43f90000,115200n8 + * or platform code can call early_uart_console_init() to set + * the early UART device. + * + * After the normal serial driver starts, we try to locate the + * matching ttymxc device and start a console there. + */ + +/* + * Include Files + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mxc_early_uart_device { + struct uart_port port; + char options[16]; /* e.g., 115200n8 */ + unsigned int baud; +}; + +int __init mxc_uart_start_console(struct uart_port *, char *); +static struct mxc_early_uart_device mxc_early_device __initdata; +static int mxc_early_uart_registered __initdata; +static struct clk *clk; + +/* + * Write out a character once the UART is ready + */ +static void __init mxcuart_console_write_char(struct uart_port *port, int ch) +{ + unsigned int status; + + do { + status = readl(port->membase + MXC_UARTUSR1); + } while ((status & MXC_UARTUSR1_TRDY) == 0); + writel(ch, port->membase + MXC_UARTUTXD); +} + +/*! + * This function is called to write the console messages through the UART port. + * + * @param co the console structure + * @param s the log message to be written to the UART + * @param count length of the message + */ +void __init early_mxcuart_console_write(struct console *co, const char *s, + u_int count) +{ + struct uart_port *port = &mxc_early_device.port; + volatile unsigned int status, oldcr1, oldcr2, oldcr3, cr2, cr3; + + /* + * First save the control registers and then disable the interrupts + */ + oldcr1 = readl(port->membase + MXC_UARTUCR1); + oldcr2 = readl(port->membase + MXC_UARTUCR2); + oldcr3 = readl(port->membase + MXC_UARTUCR3); + cr2 = + oldcr2 & ~(MXC_UARTUCR2_ATEN | MXC_UARTUCR2_RTSEN | + MXC_UARTUCR2_ESCI); + cr3 = + oldcr3 & ~(MXC_UARTUCR3_DCD | MXC_UARTUCR3_RI | + MXC_UARTUCR3_DTRDEN); + writel(MXC_UARTUCR1_UARTEN, port->membase + MXC_UARTUCR1); + writel(cr2, port->membase + MXC_UARTUCR2); + writel(cr3, port->membase + MXC_UARTUCR3); + + /* Transmit string */ + uart_console_write(port, s, count, mxcuart_console_write_char); + + /* + * Finally, wait for the transmitter to become empty + */ + do { + status = readl(port->membase + MXC_UARTUSR2); + } while (!(status & MXC_UARTUSR2_TXDC)); + + /* + * Restore the control registers + */ + writel(oldcr1, port->membase + MXC_UARTUCR1); + writel(oldcr2, port->membase + MXC_UARTUCR2); + writel(oldcr3, port->membase + MXC_UARTUCR3); +} + +static unsigned int __init probe_baud(struct uart_port *port) +{ + /* FIXME Return Default Baud Rate */ + return 115200; +} + +static int __init parse_options(struct mxc_early_uart_device *device, + char *options) +{ + struct uart_port *port = &device->port; + int mapsize = 64; + int length; + + if (!options) + return -ENODEV; + + port->uartclk = 5600000; + port->iotype = UPIO_MEM; + port->mapbase = simple_strtoul(options, &options, 0); + port->membase = ioremap(port->mapbase, mapsize); + + if ((options = strchr(options, ','))) { + options++; + device->baud = simple_strtoul(options, NULL, 0); + length = min(strcspn(options, " "), sizeof(device->options)); + strncpy(device->options, options, length); + } else { + device->baud = probe_baud(port); + snprintf(device->options, sizeof(device->options), "%u", + device->baud); + } + printk(KERN_INFO + "MXC_Early serial console at MMIO 0x%x (options '%s')\n", + port->mapbase, device->options); + return 0; +} + +static int __init mxc_early_uart_setup(struct console *console, char *options) +{ + struct mxc_early_uart_device *device = &mxc_early_device; + int err; + if (device->port.membase || device->port.iobase) + return 0; + if ((err = parse_options(device, options)) < 0) + return err; + return 0; +} + +static struct console mxc_early_uart_console __initdata = { + .name = "mxcuart", + .write = early_mxcuart_console_write, + .setup = mxc_early_uart_setup, + .flags = CON_PRINTBUFFER, + .index = -1, +}; + +static int __init mxc_early_uart_console_init(void) +{ + + if (!mxc_early_uart_registered) { + register_console(&mxc_early_uart_console); + mxc_early_uart_registered = 1; + } + + return 0; +} + +int __init mxc_early_serial_console_init(char *cmdline) +{ + char *options; + int err; + int uart_paddr; + + options = strstr(cmdline, "console=mxcuart"); + if (!options) + return -ENODEV; + + /* Extracting MXC UART Uart Port Address from cmdline */ + options = strchr(cmdline, ',') + 1; + uart_paddr = simple_strtoul(options, NULL, 16); + +#ifdef UART1_BASE_ADDR + if (uart_paddr == UART1_BASE_ADDR) + clk = clk_get(NULL, "uart_clk.0"); +#endif +#ifdef UART2_BASE_ADDR + if (uart_paddr == UART2_BASE_ADDR) + clk = clk_get(NULL, "uart_clk.1"); +#endif +#ifdef UART3_BASE_ADDR + if (uart_paddr == UART3_BASE_ADDR) + clk = clk_get(NULL, "uart_clk.2"); +#endif + if (clk == NULL) + return -1; + + /* Enable Early MXC UART Clock */ + clk_enable(clk); + + options = strchr(cmdline, ',') + 1; + if ((err = mxc_early_uart_setup(NULL, options)) < 0) + return err; + return mxc_early_uart_console_init(); +} + +int __init mxc_early_uart_console_switch(void) +{ + struct mxc_early_uart_device *device = &mxc_early_device; + struct uart_port *port = &device->port; + int mmio, line; + + if (!(mxc_early_uart_console.flags & CON_ENABLED)) + return 0; + /* Try to start the normal driver on a matching line. */ + mmio = (port->iotype == UPIO_MEM); + line = mxc_uart_start_console(port, device->options); + + if (line < 0) + printk("No ttymxc device at %s 0x%lx for console\n", + mmio ? "MMIO" : "I/O port", + mmio ? port->mapbase : (unsigned long)port->iobase); + + unregister_console(&mxc_early_uart_console); + if (mmio) + iounmap(port->membase); + + clk_disable(clk); + clk_put(clk); + + return 0; +} + +late_initcall(mxc_early_uart_console_switch); --- linux-fsl-imx51-2.6.31.orig/drivers/serial/suncore.h +++ linux-fsl-imx51-2.6.31/drivers/serial/suncore.h @@ -26,7 +26,8 @@ extern void sunserial_unregister_minors(struct uart_driver *, int); extern int sunserial_console_match(struct console *, struct device_node *, - struct uart_driver *, int); -extern void sunserial_console_termios(struct console *); + struct uart_driver *, int, bool); +extern void sunserial_console_termios(struct console *, + struct device_node *); #endif /* !(_SERIAL_SUN_H) */ --- linux-fsl-imx51-2.6.31.orig/drivers/serial/of_serial.c +++ linux-fsl-imx51-2.6.31/drivers/serial/of_serial.c @@ -161,6 +161,7 @@ static struct of_device_id __devinitdata of_platform_serial_table[] = { { .type = "serial", .compatible = "ns8250", .data = (void *)PORT_8250, }, { .type = "serial", .compatible = "ns16450", .data = (void *)PORT_16450, }, + { .type = "serial", .compatible = "ns16550a", .data = (void *)PORT_16550A, }, { .type = "serial", .compatible = "ns16550", .data = (void *)PORT_16550, }, { .type = "serial", .compatible = "ns16750", .data = (void *)PORT_16750, }, { .type = "serial", .compatible = "ns16850", .data = (void *)PORT_16850, }, --- linux-fsl-imx51-2.6.31.orig/drivers/serial/stmp-app.c +++ linux-fsl-imx51-2.6.31/drivers/serial/stmp-app.c @@ -0,0 +1,1081 @@ +/* + * Freescale STMP37XX/STMP378X Application UART driver + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "stmp-app.h" + +static int pio_mode /* = 0 */; /* PIO mode = 1, DMA mode = 0 */ + +static struct platform_driver stmp_appuart_driver = { + .probe = stmp_appuart_probe, + .remove = __devexit_p(stmp_appuart_remove), + .suspend = stmp_appuart_suspend, + .resume = stmp_appuart_resume, + .driver = { + .name = "stmp3xxx-appuart", + .owner = THIS_MODULE, + }, +}; + +static struct uart_driver stmp_appuart_uart = { + .owner = THIS_MODULE, + .driver_name = "appuart", + .dev_name = "ttySP", + .major = 242, + .minor = 0, + .nr = 1, +}; + +static inline struct stmp_appuart_port *to_appuart(struct uart_port *u) +{ + return container_of(u, struct stmp_appuart_port, port); +} + +static struct uart_ops stmp_appuart_ops = { + .tx_empty = stmp_appuart_tx_empty, + .start_tx = stmp_appuart_start_tx, + .stop_tx = stmp_appuart_stop_tx, + .stop_rx = stmp_appuart_stop_rx, + .enable_ms = stmp_appuart_enable_ms, + .break_ctl = stmp_appuart_break_ctl, + .set_mctrl = stmp_appuart_set_mctrl, + .get_mctrl = stmp_appuart_get_mctrl, + .startup = stmp_appuart_startup, + .shutdown = stmp_appuart_shutdown, + .set_termios = stmp_appuart_settermios, + .type = stmp_appuart_type, + .release_port = stmp_appuart_release_port, + .request_port = stmp_appuart_request_port, + .config_port = stmp_appuart_config_port, + .verify_port = stmp_appuart_verify_port, +}; + +static inline int chr(int c) +{ + if (c < 0x20 || c > 0x7F) + return '#'; + return c; +} + +/* Allocate and initialize rx and tx DMA chains */ +static inline int stmp_appuart_dma_init(struct stmp_appuart_port *s) +{ + int err = 0; + struct stmp3xxx_dma_descriptor *t = &s->tx_desc; +#ifndef RX_CHAIN + struct stmp3xxx_dma_descriptor *r = &s->rx_desc; +#else + int i; +#endif + + err = stmp3xxx_dma_request(s->dma_rx, s->dev, dev_name(s->dev)); + if (err) + goto out; + err = stmp3xxx_dma_request(s->dma_tx, s->dev, dev_name(s->dev)); + if (err) + goto out1; + +#ifndef RX_CHAIN + err = stmp3xxx_dma_allocate_command(s->dma_rx, r); + if (err) + goto out2; +#endif + err = stmp3xxx_dma_allocate_command(s->dma_tx, t); + if (err) + goto out3; + t->virtual_buf_ptr = dma_alloc_coherent(s->dev, + TX_BUFFER_SIZE, + &t->command->buf_ptr, GFP_DMA); + if (!t->virtual_buf_ptr) + goto out4; +#ifdef DEBUG + memset(t->virtual_buf_ptr, 0x4B, TX_BUFFER_SIZE); +#endif + +#ifndef RX_CHAIN + r->virtual_buf_ptr = dma_alloc_coherent(s->dev, + RX_BUFFER_SIZE, + &r->command->buf_ptr, GFP_DMA); + if (!r->virtual_buf_ptr) + goto out5; +#ifdef DEBUG + memset(r->virtual_buf_ptr, 0x4C, RX_BUFFER_SIZE); +#endif +#else + stmp3xxx_dma_make_chain(s->dma_rx, &s->rx_chain, s->rxd, RX_CHAIN); + for (i = 0; i < RX_CHAIN; i++) { + struct stmp3xxx_dma_descriptor *r = s->rxd + i; + + r->command->cmd = + BF(RX_BUFFER_SIZE, APBX_CHn_CMD_XFER_COUNT) | + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_SEMAPHORE | + BM_APBX_CHn_CMD_IRQONCMPLT | + BM_APBX_CHn_CMD_CHAIN | + BF_APBX_CHn_CMD_COMMAND(BV_APBX_CHn_CMD_COMMAND__DMA_WRITE); + r->virtual_buf_ptr = dma_alloc_coherent(s->dev, + RX_BUFFER_SIZE, + &r->command->buf_ptr, + GFP_DMA); + r->command->pio_words[0] = /* BM_UARTAPP_CTRL0_RUN | */ + BF(RX_BUFFER_SIZE, UARTAPP_CTRL0_XFER_COUNT) | + BM_UARTAPP_CTRL0_RXTO_ENABLE | + BF(3, UARTAPP_CTRL0_RXTIMEOUT); + } +#endif + return 0; + + /* + * would be necessary on other error paths + + dma_free_coherent( s->dev, RX_BUFFER_SIZE, r->virtual_buf_ptr, + r->command->buf_ptr); + */ +out5: + dma_free_coherent(s->dev, TX_BUFFER_SIZE, t->virtual_buf_ptr, + t->command->buf_ptr); +out4: + stmp3xxx_dma_free_command(s->dma_tx, t); +out3: +#ifndef RX_CHAIN + stmp3xxx_dma_free_command(s->dma_rx, r); +#endif +out2: + stmp3xxx_dma_release(s->dma_tx); +out1: + stmp3xxx_dma_release(s->dma_rx); +out: + WARN_ON(err); + return err; +} + + +static void stmp_appuart_on(struct platform_device *dev) +{ + struct stmp_appuart_port *s = platform_get_drvdata(dev); + + if (!pio_mode) { + /* + Tell DMA to select UART. + Both DMA channels are shared between app UART and IrDA. + Target id of 0 means UART, 1 means IrDA + */ + stmp3xxx_dma_set_alt_target(s->dma_rx, 0); + stmp3xxx_dma_set_alt_target(s->dma_tx, 0); + /* + Reset DMA channels + */ + stmp3xxx_dma_reset_channel(s->dma_rx); + stmp3xxx_dma_reset_channel(s->dma_tx); + stmp3xxx_dma_enable_interrupt(s->dma_rx); + stmp3xxx_dma_enable_interrupt(s->dma_tx); + } +} + +#ifdef CONFIG_CPU_FREQ +static int stmp_appuart_updateclk(struct device *dev, void *clkdata) +{ + struct stmp_appuart_port *s = dev_get_drvdata(dev); + + if (s) { + s->port.uartclk = clk_get_rate(s->clk) * 1000; + /* FIXME: perform actual update */ + } + return 0; +} + +static int stmp_appuart_notifier(struct notifier_block *self, + unsigned long phase, void *p) +{ + int r = 0; + + if ((phase == CPUFREQ_POSTCHANGE) || (phase == CPUFREQ_RESUMECHANGE)) { + /* get new uartclock and setspeed */ + r = driver_for_each_device(&stmp_appuart_driver.driver, + NULL, p, stmp_appuart_updateclk); + } + return (r == 0) ? NOTIFY_OK : NOTIFY_DONE; +} + +static struct notifier_block stmp_appuart_nb = { + .notifier_call = &stmp_appuart_notifier, +}; +#endif /* CONFIG_CPU_FREQ */ + +static int __devinit stmp_appuart_probe(struct platform_device *device) +{ + struct stmp_appuart_port *s; + int err = 0; + struct resource *r; + int i; + u32 version; + int (*pinctl)(int req, int id); + + s = kzalloc(sizeof(struct stmp_appuart_port), GFP_KERNEL); + if (!s) { + err = -ENOMEM; + goto out; + } + + spin_lock_init(&s->lock); + + s->clk = clk_get(NULL, "uart"); + if (IS_ERR(s->clk)) { + err = PTR_ERR(s->clk); + goto out_free; + } + clk_enable(s->clk); + r = platform_get_resource(device, IORESOURCE_MEM, 0); + if (!r) { + err = -ENXIO; + goto out_free_clk; + } + s->port.mapbase = r->start; + s->port.irq = platform_get_irq(device, 0); + s->port.ops = &stmp_appuart_ops; + s->port.iotype = UPIO_MEM; + s->port.line = device->id < 0 ? 0 : device->id; + s->port.fifosize = 16; + s->port.timeout = HZ/10; + s->port.uartclk = clk_get_rate(s->clk) * 1000; + s->port.type = PORT_IMX; + s->port.dev = s->dev = get_device(&device->dev); + s->ctrl = 0; + s->keep_irq = 0; + + r = platform_get_resource(device, IORESOURCE_MEM, 0); + if (!r) { + err = -ENXIO; + goto out_free_clk; + } + + dev_dbg(s->dev, "%s\n", __func__); + for (i = 0; i < ARRAY_SIZE(s->irq); i++) { + s->irq[i] = platform_get_irq(device, i); + dev_dbg(s->dev, "Resources: irq[%d] = %d\n", i, s->irq[i]); + if (s->irq[i] < 0) { + err = s->irq[i]; + goto out_free_clk; + } + } + + r = platform_get_resource(device, IORESOURCE_DMA, 0); + if (!r) { + err = -ENXIO; + goto out_free; + } + s->dma_rx = r->start; + + r = platform_get_resource(device, IORESOURCE_DMA, 1); + if (!r) { + err = -ENXIO; + goto out_free; + } + s->dma_tx = r->start; + + r = platform_get_resource(device, IORESOURCE_MEM, 0); + if (!r) { + err = -ENXIO; + goto out_free; + } + s->mem = (void __iomem *)(r->start - STMP3XXX_REGS_PHBASE + + (u32)STMP3XXX_REGS_BASE); + s->memsize = r->end - r->start; + +#ifdef CONFIG_CPU_FREQ + cpufreq_register_notifier(&stmp_appuart_nb, + CPUFREQ_TRANSITION_NOTIFIER); +#endif + platform_set_drvdata(device, s); + + device_init_wakeup(&device->dev, 1); + + stmp_appuart_dma_init(s); + stmp_appuart_on(device); + + pinctl = device->dev.platform_data; + if (pinctl) { + err = pinctl(1, device->id); + if (err) + goto out_free_clk; + } + + err = uart_add_one_port(&stmp_appuart_uart, &s->port); + if (err) + goto out_free_pins; + + version = __raw_readl(REGS_UARTAPP1_BASE + HW_UARTAPP_VERSION); + printk(KERN_INFO "Found APPUART %d.%d.%d\n", + (version >> 24) & 0xFF, + (version >> 16) & 0xFF, version & 0xFFFF); + return 0; + +out_free_pins: + if (pinctl) + pinctl(0, device->id); +out_free_clk: + clk_put(s->clk); +out_free: + platform_set_drvdata(device, NULL); + kfree(s); +out: + return err; +} + +static int __devexit stmp_appuart_remove(struct platform_device *device) +{ + struct stmp_appuart_port *s; + void (*pinctl)(int req, int id); + + s = platform_get_drvdata(device); + if (s) { + pinctl = device->dev.platform_data; + put_device(s->dev); + clk_disable(s->clk); + clk_put(s->clk); + uart_remove_one_port(&stmp_appuart_uart, &s->port); + if (pinctl) + pinctl(0, device->id); + kfree(s); + platform_set_drvdata(device, NULL); + } + + return 0; +} + +static int stmp_appuart_suspend(struct platform_device *device, + pm_message_t state) +{ +#ifdef CONFIG_PM + struct stmp_appuart_port *s = platform_get_drvdata(device); + + if (!s) + return 0; + s->keep_irq = device_may_wakeup(&device->dev); + uart_suspend_port(&stmp_appuart_uart, &s->port); + if (!s->keep_irq) + clk_disable(s->clk); +#endif + return 0; +} + +static int stmp_appuart_resume(struct platform_device *device) +{ +#ifdef CONFIG_PM + struct stmp_appuart_port *s = platform_get_drvdata(device); + + if (!s) + return 0; + + if (!s->keep_irq) + clk_enable(s->clk); + stmp_appuart_on(device); + uart_resume_port(&stmp_appuart_uart, &s->port); + s->keep_irq = 0; +#endif + return 0; +} + +static int __init stmp_appuart_init() +{ + int r; + + r = uart_register_driver(&stmp_appuart_uart); + if (r) + goto out; + r = platform_driver_register(&stmp_appuart_driver); + if (r) + goto out_err; + return 0; +out_err: + uart_unregister_driver(&stmp_appuart_uart); +out: + return r; +} + +static void __exit stmp_appuart_exit() +{ + platform_driver_unregister(&stmp_appuart_driver); + uart_unregister_driver(&stmp_appuart_uart); +} + +module_init(stmp_appuart_init) +module_exit(stmp_appuart_exit) + +static void stmp_appuart_stop_rx(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); + __raw_writel(BM_UARTAPP_CTRL2_RXE, s->mem + HW_STMP3XXX_CLR); +} + +static void stmp_appuart_break_ctl(struct uart_port *u, int ctl) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s: break = %s\n", __func__, ctl ? "on" : "off"); + if (ctl) + __raw_writel(BM_UARTAPP_LINECTRL_BRK, + s->mem + HW_UARTAPP_LINECTRL_SET); + else + __raw_writel(BM_UARTAPP_LINECTRL_BRK, + s->mem + HW_UARTAPP_LINECTRL_CLR); +} + +static void stmp_appuart_enable_ms(struct uart_port *port) +{ + /* just empty */ +} + +static void stmp_appuart_set_mctrl(struct uart_port *u, unsigned mctrl) +{ + struct stmp_appuart_port *s = to_appuart(u); + + u32 ctrl = __raw_readl(s->mem + HW_UARTAPP_CTRL2); + + dev_dbg(s->dev, "%s (%x)\n", __func__, mctrl); + ctrl &= ~BM_UARTAPP_CTRL2_RTS; + if (mctrl & TIOCM_RTS) { + dev_dbg(s->dev, "...RTS\n"); + ctrl |= BM_UARTAPP_CTRL2_RTS; + } + s->ctrl = mctrl; + dev_dbg(s->dev, "...%x; ctrl = %x\n", s->ctrl, ctrl); + __raw_writel(ctrl, s->mem + HW_UARTAPP_CTRL2); +} + +static u32 stmp_appuart_get_mctrl(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + u32 stat = __raw_readl(s->mem + HW_UARTAPP_STAT); + int ctrl2 = __raw_readl(s->mem + HW_UARTAPP_CTRL2); + u32 mctrl = s->ctrl; + + dev_dbg(s->dev, "%s:\n", __func__); + mctrl &= ~TIOCM_CTS; + if (stat & BM_UARTAPP_STAT_CTS) { + dev_dbg(s->dev, "CTS"); + mctrl |= TIOCM_CTS; + } + if (ctrl2 & BM_UARTAPP_CTRL2_RTS) { + dev_dbg(s->dev, "RTS"); + mctrl |= TIOCM_RTS; + } + dev_dbg(s->dev, "...%x\n", mctrl); + return mctrl; +} + +static int stmp_appuart_request_port(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + int err = 0; + + if (!request_mem_region((u32)s->mem, s->memsize, dev_name(s->dev))) + err = -ENXIO; + return err; + +} + +static void stmp_appuart_release_port(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + release_mem_region((u32)s->mem, s->memsize); +} + +static int stmp_appuart_verify_port(struct uart_port *u, + struct serial_struct *ser) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); + return 0; +} + +static void stmp_appuart_config_port(struct uart_port *u, int flags) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); +} + +static const char *stmp_appuart_type(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); + return dev_name(s->dev); +} + +static void stmp_appuart_settermios(struct uart_port *u, + struct ktermios *nw, struct ktermios *old) +{ + static struct ktermios saved; + struct stmp_appuart_port *s = to_appuart(u); + unsigned int cflag; + u32 bm, ctrl, ctrl2, div; + int err = 0; + unsigned baud; + + dev_dbg(s->dev, "%s\n", __func__); + + if (nw) + memcpy(&saved, nw, sizeof *nw); + else + nw = old = &saved; + + cflag = nw->c_cflag; + + ctrl = BM_UARTAPP_LINECTRL_FEN; + ctrl2 = __raw_readl(s->mem + HW_UARTAPP_CTRL2); + + /* byte size */ + switch (cflag & CSIZE) { + case CS5: + bm = 0; + break; + case CS6: + bm = 1; + break; + case CS7: + bm = 2; + break; + case CS8: + bm = 3; + break; + default: + err = -EINVAL; + break; + } + if (err) + goto out; + + dev_dbg(s->dev, "Byte size %d bytes, mask %x\n", + bm + 5, BF(bm, UARTAPP_LINECTRL_WLEN)); + ctrl |= BF(bm, UARTAPP_LINECTRL_WLEN); + + /* parity */ + if (cflag & PARENB) { + dev_dbg(s->dev, "Parity check enabled\n"); + ctrl |= BM_UARTAPP_LINECTRL_PEN | BM_UARTAPP_LINECTRL_SPS; + if ((cflag & PARODD) == 0) { + dev_dbg(s->dev, "(Even) mask = %x\n", + BM_UARTAPP_LINECTRL_PEN | + BM_UARTAPP_LINECTRL_SPS | + BM_UARTAPP_LINECTRL_EPS); + ctrl |= BM_UARTAPP_LINECTRL_EPS; + } else + dev_dbg(s->dev, "(Odd) mask = %x\n", + BM_UARTAPP_LINECTRL_PEN | + BM_UARTAPP_LINECTRL_SPS); + } else + dev_dbg(s->dev, "Parity check disabled.\n"); + + /* figure out the stop bits requested */ + if (cflag & CSTOPB) { + dev_dbg(s->dev, "Stop bits, mask = %x\n", + BM_UARTAPP_LINECTRL_STP2); + ctrl |= BM_UARTAPP_LINECTRL_STP2; + } else + dev_dbg(s->dev, "No stop bits\n"); + + /* figure out the hardware flow control settings */ + if (cflag & CRTSCTS) { + dev_dbg(s->dev, "RTS/CTS flow control\n"); + ctrl2 |= BM_UARTAPP_CTRL2_CTSEN /* | BM_UARTAPP_CTRL2_RTSEN */ ; + } else { + dev_dbg(s->dev, "RTS/CTS disabled\n"); + ctrl2 &= ~BM_UARTAPP_CTRL2_CTSEN; + } + + /* set baud rate */ + baud = uart_get_baud_rate(u, nw, old, 0, u->uartclk); + dev_dbg(s->dev, "Baud rate requested: %d (clk = %d)\n", + baud, u->uartclk); + div = u->uartclk * 32 / baud; + ctrl |= BF(div & 0x3F, UARTAPP_LINECTRL_BAUD_DIVFRAC); + ctrl |= BF(div >> 6, UARTAPP_LINECTRL_BAUD_DIVINT); + + if ((cflag & CREAD) != 0) { + dev_dbg(s->dev, "RX started\n"); + ctrl2 |= BM_UARTAPP_CTRL2_RXE | BM_UARTAPP_CTRL2_RXDMAE; + } + + if (!err) { + dev_dbg(s->dev, "CTRLS = %x + %x\n", ctrl, ctrl2); + __raw_writel(ctrl, + s->mem + HW_UARTAPP_LINECTRL); + __raw_writel(ctrl2, + s->mem + HW_UARTAPP_CTRL2); + } +out: + return /* err */ ; +} + +static int stmp_appuart_free_irqs(struct stmp_appuart_port *s) +{ + int irqn = 0; + + if (s->keep_irq) { + dev_dbg(s->dev, "keep_irq != 0, ignoring\n"); + return 0; + } + for (irqn = 0; irqn < ARRAY_SIZE(s->irq); irqn++) + free_irq(s->irq[irqn], s); + return 0; +} + +void stmp_appuart_rx(struct stmp_appuart_port *s, u8 * rx_buffer, int count) +{ + u8 c; + int flag; + struct tty_struct *tty = s->port.info->port.tty; + u32 stat; + + spin_lock(&s->lock); + stat = __raw_readl(s->mem + HW_UARTAPP_STAT); + + if (count < 0) { + count = + __raw_readl(s->mem + + HW_UARTAPP_STAT) & BM_UARTAPP_STAT_RXCOUNT; + dev_dbg(s->dev, "count = %d\n", count); + } + + for (;;) { + if (!rx_buffer) { + if (stat & BM_UARTAPP_STAT_RXFE) + break; + c = __raw_readl(s->mem + HW_UARTAPP_DATA) & 0xFF; + } else { + if (count-- <= 0) + break; + c = *rx_buffer++; + dev_dbg(s->dev, "Received: %x(%c)\n", c, chr(c)); + } + + flag = TTY_NORMAL; + if (stat & BM_UARTAPP_STAT_BERR) { + stat &= ~BM_UARTAPP_STAT_BERR; + s->port.icount.brk++; + if (uart_handle_break(&s->port)) + goto ignore; + flag = TTY_BREAK; + } else if (stat & BM_UARTAPP_STAT_PERR) { + stat &= ~BM_UARTAPP_STAT_PERR; + s->port.icount.parity++; + flag = TTY_PARITY; + } else if (stat & BM_UARTAPP_STAT_FERR) { + stat &= ~BM_UARTAPP_STAT_FERR; + s->port.icount.frame++; + flag = TTY_FRAME; + } + + if (stat & BM_UARTAPP_STAT_OERR) + s->port.icount.overrun++; + + if (uart_handle_sysrq_char(&s->port, c)) + goto ignore; + + uart_insert_char(&s->port, stat, BM_UARTAPP_STAT_OERR, c, flag); +ignore: + if (pio_mode) { + __raw_writel(stat, s->mem + HW_UARTAPP_STAT); + stat = + __raw_readl(s->mem + HW_UARTAPP_STAT); + } + } + + __raw_writel(stat, s->mem + HW_UARTAPP_STAT); + tty_flip_buffer_push(tty); + spin_unlock(&s->lock); +} + +static inline void stmp_appuart_submit_rx(struct stmp_appuart_port *s) +{ +#ifndef RX_CHAIN + struct stmp3xxx_dma_descriptor *r = &s->rx_desc; + + dev_dbg(s->dev, "Submitting RX DMA request\n"); + r->command->cmd = + BM_APBX_CHn_CMD_HALTONTERMINATE | + BF(RX_BUFFER_SIZE, APBX_CHn_CMD_XFER_COUNT) | + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_SEMAPHORE | + BM_APBX_CHn_CMD_IRQONCMPLT | + BF(BV_APBX_CHn_CMD_COMMAND__DMA_WRITE, APBX_CHn_CMD_COMMAND); + r->command->pio_words[0] = + __raw_readl(REGS_UARTAPP1_BASE + + HW_UARTAPP_CTRL0) | BF(RX_BUFFER_SIZE, + UARTAPP_CTRL0_XFER_COUNT) | + BM_UARTAPP_CTRL0_RXTO_ENABLE | BF(3, UARTAPP_CTRL0_RXTIMEOUT); + r->command->pio_words[0] &= ~BM_UARTAPP_CTRL0_RUN; + + stmp3xxx_dma_reset_channel(s->dma_rx); + stmp3xxx_dma_go(s->dma_rx, r, 1); +#endif +} + +static irqreturn_t stmp_appuart_irq_int(int irq, void *context) +{ + u32 istatus; + struct stmp_appuart_port *s = context; + u32 stat = __raw_readl(s->mem + HW_UARTAPP_STAT); + + istatus = __raw_readl(s->mem + HW_UARTAPP_INTR); + dev_dbg(s->dev, "IRQ: int(%d), status = %08X\n", irq, istatus); + + if (istatus & BM_UARTAPP_INTR_CTSMIS) { + uart_handle_cts_change(&s->port, stat & BM_UARTAPP_STAT_CTS); + dev_dbg(s->dev, "CTS change: %x\n", stat & BM_UARTAPP_STAT_CTS); + __raw_writel(BM_UARTAPP_INTR_CTSMIS, + s->mem + HW_UARTAPP_INTR_CLR); + } + + else if (istatus & BM_UARTAPP_INTR_RTIS) { + dev_dbg(s->dev, "RX timeout, draining out\n"); + stmp_appuart_submit_rx(s); + } + + else + dev_info(s->dev, "Unhandled status %x\n", istatus); + + __raw_writel(istatus & 0xFFFF, + s->mem + HW_UARTAPP_INTR_CLR); + + return IRQ_HANDLED; +} + +static irqreturn_t stmp_appuart_irq_rx(int irq, void *context) +{ + struct stmp_appuart_port *s = context; + int count = -1; + + stmp3xxx_dma_clear_interrupt(s->dma_rx); + dev_dbg(s->dev, "%s(%d), count = %d\n", __func__, irq, count); + +#ifndef RX_CHAIN + stmp_appuart_rx(s, s->rx_desc.virtual_buf_ptr, count); + stmp_appuart_submit_rx(s); +#else + if (circ_advance_cooked(&s->rx_chain) == 0) { + BUG(); + return IRQ_HANDLED; + } + + circ_advance_active(&s->rx_chain, 1); + while (s->rx_chain.cooked_count) { + stmp_appuart_rx(s, + stmp3xxx_dma_circ_get_cooked_head(&s-> + rx_chain)->virtual_buf_ptr, + -1); + circ_advance_free(&s->rx_chain, 1); + } +#endif + return IRQ_HANDLED; +} + +static void stmp_appuart_submit_tx(struct stmp_appuart_port *s, int size) +{ + struct stmp3xxx_dma_descriptor *d = &s->tx_desc; + + dev_dbg(s->dev, "Submitting TX DMA request, %d bytes\n", size); + d->command->pio_words[0] = + /* BM_UARTAPP_CTRL1_RUN | */ BF(size, UARTAPP_CTRL1_XFER_COUNT); + d->command->cmd = BF(size, APBX_CHn_CMD_XFER_COUNT) | + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_SEMAPHORE | + BM_APBX_CHn_CMD_IRQONCMPLT | + BF(BV_APBX_CHn_CMD_COMMAND__DMA_READ, APBX_CHn_CMD_COMMAND); + stmp3xxx_dma_go(s->dma_tx, d, 1); +} + +static irqreturn_t stmp_appuart_irq_tx(int irq, void *context) +{ + struct stmp_appuart_port *s = context; + struct uart_port *u = &s->port; + int bytes; + + stmp3xxx_dma_clear_interrupt(s->dma_tx); + dev_dbg(s->dev, "%s(%d)\n", __func__, irq); + + bytes = stmp_appuart_copy_tx(u, s->tx_desc.virtual_buf_ptr, + TX_BUFFER_SIZE); + if (bytes > 0) { + dev_dbg(s->dev, "Sending %d bytes\n", bytes); + stmp_appuart_submit_tx(s, bytes); + } + return IRQ_HANDLED; +} + +static int stmp_appuart_request_irqs(struct stmp_appuart_port *s) +{ + int err = 0; + + /* + * order counts. resources should be listed in the same order + */ + irq_handler_t handlers[] = { + stmp_appuart_irq_int, + stmp_appuart_irq_rx, + stmp_appuart_irq_tx, + }; + char *handlers_names[] = { + "appuart internal", + "appuart rx", + "appuart tx", + }; + int irqn; + + if (s->keep_irq) { + dev_dbg(s->dev, "keep_irq is set, skipping request_irq"); + return 0; + } + for (irqn = 0; irqn < ARRAY_SIZE(handlers); irqn++) { + err = request_irq(s->irq[irqn], handlers[irqn], + 0, handlers_names[irqn], s); + dev_dbg(s->dev, "Requested IRQ %d with status %d\n", + s->irq[irqn], err); + if (err) + goto out; + } + return 0; +out: + stmp_appuart_free_irqs(s); + return err; +} + +static struct timer_list timer_task; + +static void stmp_appuart_check_rx(unsigned long data) +{ + stmp_appuart_rx((struct stmp_appuart_port *)data, NULL, -1); + mod_timer(&timer_task, jiffies + 2 * HZ); +} + +static int stmp_appuart_startup(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + int err; + + dev_dbg(s->dev, "%s\n", __func__); + + s->tx_buffer_index = 0; + + err = stmp_appuart_request_irqs(s); + if (err) + goto out; + + if (!s->keep_irq) + /* Release the block from reset and start the clocks. */ + stmp3xxx_reset_block(s->mem, 0); + + __raw_writel(BM_UARTAPP_CTRL2_UARTEN, + s->mem + HW_UARTAPP_CTRL2_SET); + /* Enable the Application UART DMA bits. */ + if (!pio_mode) { + __raw_writel(BM_UARTAPP_CTRL2_TXDMAE | BM_UARTAPP_CTRL2_RXDMAE + | BM_UARTAPP_CTRL2_DMAONERR, + s->mem + HW_UARTAPP_CTRL2_SET); + /* clear any pending interrupts */ + __raw_writel(0, s->mem + HW_UARTAPP_INTR); + + /* reset all dma channels */ + stmp3xxx_dma_reset_channel(s->dma_tx); + stmp3xxx_dma_reset_channel(s->dma_rx); + } else { + __raw_writel(BM_UARTAPP_INTR_RXIEN | + BM_UARTAPP_INTR_RTIEN, + s->mem + HW_UARTAPP_INTR); + } + __raw_writel(BM_UARTAPP_INTR_CTSMIEN, + s->mem + HW_UARTAPP_INTR_SET); + + /* + * Enable fifo so all four bytes of a DMA word are written to + * output (otherwise, only the LSB is written, ie. 1 in 4 bytes) + */ + __raw_writel(BM_UARTAPP_LINECTRL_FEN, s->mem + HW_UARTAPP_LINECTRL_SET); + + if (!pio_mode) { +#ifndef RX_CHAIN + stmp_appuart_submit_rx(s); +#else + circ_clear_chain(&s->rx_chain); + stmp3xxx_dma_go(s->dma_rx, &s->rxd[0], 0); + circ_advance_active(&s->rx_chain, 1); +#endif + } else { + init_timer(&timer_task); + timer_task.function = stmp_appuart_check_rx; + timer_task.expires = jiffies + HZ; + timer_task.data = (unsigned long)s; + add_timer(&timer_task); + } + +out: + return err; +} + +static void stmp_appuart_shutdown(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); + + if (!s->keep_irq) + /* set the IP block to RESET; this should disable clock too. */ + __raw_writel( + BM_UARTAPP_CTRL0_SFTRST, s->mem + HW_UARTAPP_CTRL0_SET); + + if (!pio_mode) { + /* reset all dma channels */ + stmp3xxx_dma_reset_channel(s->dma_tx); + stmp3xxx_dma_reset_channel(s->dma_rx); + } else { + del_timer(&timer_task); + } + stmp_appuart_free_irqs(s); +} + +static unsigned int stmp_appuart_tx_empty(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + if (pio_mode) + if (__raw_readl(s->mem + HW_UARTAPP_STAT) & + BM_UARTAPP_STAT_TXFE) + return TIOCSER_TEMT; + else + return 0; + else + return stmp3xxx_dma_running(s->dma_tx) ? 0 : TIOCSER_TEMT; +} + +static void stmp_appuart_start_tx(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + int bytes; + + dev_dbg(s->dev, "%s\n", __func__); + + /* enable transmitter */ + __raw_writel(BM_UARTAPP_CTRL2_TXE, s->mem + HW_UARTAPP_CTRL2_SET); + + if (!pio_mode) { + if (stmp3xxx_dma_running(s->dma_tx)) + return; + bytes = stmp_appuart_copy_tx(u, s->tx_desc.virtual_buf_ptr, + TX_BUFFER_SIZE); + if (bytes <= 0) + return; + + dev_dbg(s->dev, "Started DMA transfer with descriptor %p, " + "command %p, %d bytes long\n", + &s->tx_desc, s->tx_desc.command, bytes); + stmp_appuart_submit_tx(s, bytes); + } else { + int count = 0; + u8 c; + + while (! + (__raw_readl + (s->mem + HW_UARTAPP_STAT) & BM_UARTAPP_STAT_TXFF)) { + if (stmp_appuart_copy_tx(u, &c, 1) <= 0) + break; + dev_dbg(s->dev, "%d: '%c'/%x\n", ++count, chr(c), c); + __raw_writel(c, s->mem + HW_UARTAPP_DATA); + } + } +} + +static void stmp_appuart_stop_tx(struct uart_port *u) +{ + struct stmp_appuart_port *s = to_appuart(u); + + dev_dbg(s->dev, "%s\n", __func__); + __raw_writel(BM_UARTAPP_CTRL2_TXE, s->mem + HW_UARTAPP_CTRL2_CLR); +} + +static int stmp_appuart_copy_tx(struct uart_port *u, u8 * target, + int tx_buffer_size) +{ + int last = 0, portion; + struct circ_buf *xmit = &u->info->xmit; + + while (last < tx_buffer_size) { /* let's fill the only descriptor */ + if (u->x_char) { + target[last++] = u->x_char; + u->x_char = 0; + } else if (!uart_circ_empty(xmit) && !uart_tx_stopped(u)) { + portion = min((u32) tx_buffer_size, + (u32) uart_circ_chars_pending(xmit)); + portion = min((u32) portion, + (u32) CIRC_CNT_TO_END(xmit->head, + xmit->tail, + UART_XMIT_SIZE)); + memcpy(target + last, &xmit->buf[xmit->tail], portion); + xmit->tail = (xmit->tail + portion) & + (UART_XMIT_SIZE - 1); + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(u); + last += portion; + } else { /* All tx data copied into buffer */ + return last; + } + } + return last; +} + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("stmp3xxx app uart driver"); +MODULE_AUTHOR("dmitry pervushin "); +module_param(pio_mode, int, 0); --- linux-fsl-imx51-2.6.31.orig/drivers/serial/sunsab.c +++ linux-fsl-imx51-2.6.31/drivers/serial/sunsab.c @@ -883,7 +883,7 @@ printk("Console: ttyS%d (SAB82532)\n", (sunsab_reg.minor - 64) + con->index); - sunserial_console_termios(con); + sunserial_console_termios(con, to_of_device(up->port.dev)->node); switch (con->cflag & CBAUD) { case B150: baud = 150; break; @@ -1027,10 +1027,12 @@ goto out1; sunserial_console_match(SUNSAB_CONSOLE(), op->node, - &sunsab_reg, up[0].port.line); + &sunsab_reg, up[0].port.line, + false); sunserial_console_match(SUNSAB_CONSOLE(), op->node, - &sunsab_reg, up[1].port.line); + &sunsab_reg, up[1].port.line, + false); err = uart_add_one_port(&sunsab_reg, &up[0].port); if (err) @@ -1116,7 +1118,6 @@ if (!sunsab_ports) return -ENOMEM; - sunsab_reg.cons = SUNSAB_CONSOLE(); err = sunserial_register_minors(&sunsab_reg, num_channels); if (err) { kfree(sunsab_ports); --- linux-fsl-imx51-2.6.31.orig/drivers/serial/serial_cs.c +++ linux-fsl-imx51-2.6.31/drivers/serial/serial_cs.c @@ -884,6 +884,7 @@ PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "MT5634ZLX.cis"), + PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "COMpad2.cis"), PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "COMpad4.cis"), PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"), PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "RS-COM-2P.cis"), --- linux-fsl-imx51-2.6.31.orig/drivers/serial/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/serial/Kconfig @@ -304,6 +304,61 @@ your boot loader (lilo or loadlin) about how to pass options to the kernel at boot time.) +config SERIAL_MXC + tristate "MXC Internal serial port support" + depends on ARCH_MXC + select SERIAL_CORE + help + This selects the Freescale Semiconductor MXC Internal UART driver. + If unsure, say N. + +config SERIAL_MXC_CONSOLE + bool "Support for console on a MXC/MX27/MX21 Internal serial port" + depends on SERIAL_MXC=y + select SERIAL_CORE_CONSOLE + help + Say Y here if you wish to use an MXC Internal UART as the system + console (the system console is the device which receives all kernel + messages and warnings and which allows logins in single user mode). + + Even if you say Y here, the currently visible framebuffer console + (/dev/tty0) will still be used as the system console by default, but + you can alter that using a kernel command line option such as + "console=ttymxc". (Try "man bootparam" or see the documentation of + your boot loader (lilo or loadlin) about how to pass options to the + kernel at boot time.) + +config SERIAL_STMP_DBG + tristate "STMP debug serial port support" + depends on ARCH_STMP3XXX + select SERIAL_CORE + help + Driver for Sigmatel 36XX/37XX internal debug serial port + +config SERIAL_STMP_DBG_CONSOLE + bool "Support for console on STMP37XX DBG serial port" + depends on SERIAL_STMP_DBG=y + select SERIAL_CORE_CONSOLE + ---help--- + Say Y here if you wish to use the STMP36XX/37XX debug serial port as the + system console (the system console is the device which receives all + kernel messages and warnings and which allows logins in single user + mode). + + Even if you say Y here, the currently visible framebuffer console + (/dev/tty0) will still be used as the system console by default, but + you can alter that using a kernel command line option such as + "console=ttyAM0". (Try "man bootparam" or see the documentation of + your boot loader (lilo or loadlin) about how to pass options to the + kernel at boot time.) + +config SERIAL_STMP_APP + tristate "STMP app serial port support" + depends on ARCH_STMP3XXX + select SERIAL_CORE + help + Driver for Sigmatel 36XX/37XX internal application serial port + config SERIAL_AMBA_PL011 tristate "ARM AMBA PL011 serial port support" depends on ARM_AMBA --- linux-fsl-imx51-2.6.31.orig/drivers/serial/stmp-app.h +++ linux-fsl-imx51-2.6.31/drivers/serial/stmp-app.h @@ -0,0 +1,82 @@ +/* + * Freescale STMP37XX/STMP378X Application UART driver + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __STMP_APPUART_H +#define __STMP_APPUART_H + +#define RX_BUFFER_SIZE 4 +#define TX_BUFFER_SIZE 0xFFF0 + +#include + +/* #define RX_CHAIN 2 */ + +struct stmp_appuart_port { + int keep_irq; + int irq[3]; + void __iomem *mem; + u32 memsize; + int dma_rx, dma_tx; + struct clk *clk; + struct device *dev; + struct uart_port port; + unsigned tx_buffer_index; + struct stmp3xxx_dma_descriptor tx_desc; +#ifndef RX_CHAIN + struct stmp3xxx_dma_descriptor rx_desc; +#else + struct stmp3xxx_dma_descriptor rxd[RX_CHAIN]; + struct stmp37xx_circ_dma_chain rx_chain; +#endif + + u32 ctrl; + u8 running; + spinlock_t lock; /* protects irq handler */ +}; + +#ifdef CONFIG_CPU_FREQ +static int stmp_appuart_updateclk(struct device *dev, void *clkdata); +static int stmp_appuart_notifier(struct notifier_block *self, + unsigned long phase, void *p); +#endif /* CONFIG_CPU_FREQ */ +static int __init stmp_appuart_probe(struct platform_device *device); +static int stmp_appuart_remove(struct platform_device *device); +static int stmp_appuart_suspend(struct platform_device *device, + pm_message_t state); +static int stmp_appuart_resume(struct platform_device *device); +static int __init stmp_appuart_init(void); +static void __exit stmp_appuart_exit(void); +static int stmp_appuart_request_port(struct uart_port *u); +static void stmp_appuart_release_port(struct uart_port *u); +static int stmp_appuart_verify_port(struct uart_port *u, + struct serial_struct *); +static void stmp_appuart_config_port(struct uart_port *u, int flags); +static const char *stmp_appuart_type(struct uart_port *u); +static void stmp_appuart_settermios(struct uart_port *u, + struct ktermios *nw, struct ktermios *old); +static void stmp_appuart_shutdown(struct uart_port *u); +static int stmp_appuart_startup(struct uart_port *u); +static u32 stmp_appuart_get_mctrl(struct uart_port *u); +static void stmp_appuart_set_mctrl(struct uart_port *u, unsigned mctrl); +static void stmp_appuart_enable_ms(struct uart_port *port); +static void stmp_appuart_break_ctl(struct uart_port *port, int ctl); +static unsigned int stmp_appuart_tx_empty(struct uart_port *u); +static void stmp_appuart_stop_rx(struct uart_port *u); +static void stmp_appuart_start_tx(struct uart_port *u); +static void stmp_appuart_stop_tx(struct uart_port *u); +static int stmp_appuart_copy_tx(struct uart_port *u, u8 *target, int size); +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/serial/serial_core.c +++ linux-fsl-imx51-2.6.31/drivers/serial/serial_core.c @@ -1059,10 +1059,10 @@ * NB: both 1->0 and 0->1 transitions are counted except for * RI where only 0->1 is counted. */ -static int uart_get_count(struct uart_state *state, - struct serial_icounter_struct __user *icnt) +static int uart_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) { - struct serial_icounter_struct icount; + struct uart_state *state = tty->driver_data; struct uart_icount cnow; struct uart_port *port = state->port; @@ -1070,19 +1070,19 @@ memcpy(&cnow, &port->icount, sizeof(struct uart_icount)); spin_unlock_irq(&port->lock); - icount.cts = cnow.cts; - icount.dsr = cnow.dsr; - icount.rng = cnow.rng; - icount.dcd = cnow.dcd; - icount.rx = cnow.rx; - icount.tx = cnow.tx; - icount.frame = cnow.frame; - icount.overrun = cnow.overrun; - icount.parity = cnow.parity; - icount.brk = cnow.brk; - icount.buf_overrun = cnow.buf_overrun; + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; - return copy_to_user(icnt, &icount, sizeof(icount)) ? -EFAULT : 0; + return 0; } /* @@ -1134,10 +1134,6 @@ case TIOCMIWAIT: ret = uart_wait_modem_status(state, arg); break; - - case TIOCGICOUNT: - ret = uart_get_count(state, uarg); - break; } if (ret != -ENOIOCTLCMD) @@ -2299,6 +2295,7 @@ #endif .tiocmget = uart_tiocmget, .tiocmset = uart_tiocmset, + .get_icount = uart_get_icount, #ifdef CONFIG_CONSOLE_POLL .poll_init = uart_poll_init, .poll_get_char = uart_poll_get_char, --- linux-fsl-imx51-2.6.31.orig/drivers/serial/stmp-dbg.c +++ linux-fsl-imx51-2.6.31/drivers/serial/stmp-dbg.c @@ -0,0 +1,884 @@ +/* + * Freescale STMP37XX/STMP378X Debug UART driver + * + * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. + * + * Copyright 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * Modifications for STMP36XX Debug Serial (c) 2005 Sigmatel Inc + * + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include + +#if defined(CONFIG_SERIAL_STMP_DBG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include "stmp-dbg.h" + +/* treated as variable unless submitted to open-source */ +#define PORT_STMPDBG 100 +#define UART_NR 1 +#define SERIAL_STMPDBG_MAJOR 204 +#define SERIAL_STMPDBG_MINOR 16 + +#define ISR_PASS_LIMIT 256 + +#define STMPDBG_DEVID "Debug UART" + + +static int force_cd = 1; + +static struct uart_driver stmpdbg_reg; + +/* + * We wrap our port structure around the generic uart_port. + */ +struct uart_stmpdbg_port { + struct uart_port port; + struct clk *clk; + unsigned int im; /* interrupt mask */ + unsigned int old_status; + int suspended; +}; + + +static void stmpdbg_stop_tx(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + + uap->im &= ~UART011_TXIM; + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); +} + +static void stmpdbg_start_tx(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + + uap->im |= UART011_TXIM; + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); +} + +static void stmpdbg_stop_rx(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + + uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM| + UART011_PEIM|UART011_BEIM|UART011_OEIM); + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); +} + +static void stmpdbg_enable_ms(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + + uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM; + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); +} + +static void stmpdbg_rx_chars(struct uart_stmpdbg_port *uap) +{ + struct tty_struct *tty = uap->port.info->port.tty; + unsigned int status, ch, flag, rsr, max_count = 256; + + status = __raw_readl(uap->port.membase + UART01x_FR); + while ((status & UART01x_FR_RXFE) == 0 && max_count--) { +#if 0 + if (tty->flip.count >= TTY_FLIPBUF_SIZE) { + if (tty->low_latency) + tty_flip_buffer_push(tty); + /* + * If this failed then we will throw away the + * bytes but must do so to clear interrupts + */ + } +#endif + + ch = __raw_readl(uap->port.membase + UART01x_DR); + flag = TTY_NORMAL; + uap->port.icount.rx++; + + /* + * Note that the error handling code is + * out of the main execution path + */ + rsr = __raw_readl(uap->port.membase + UART01x_RSR) + | UART_DUMMY_RSR_RX; + if (unlikely(rsr & UART01x_RSR_ANY)) { + if (rsr & UART01x_RSR_BE) { + rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); + uap->port.icount.brk++; + if (uart_handle_break(&uap->port)) + goto ignore_char; + } else if (rsr & UART01x_RSR_PE) + uap->port.icount.parity++; + else if (rsr & UART01x_RSR_FE) + uap->port.icount.frame++; + if (rsr & UART01x_RSR_OE) + uap->port.icount.overrun++; + + rsr &= uap->port.read_status_mask; + + if (rsr & UART01x_RSR_BE) + flag = TTY_BREAK; + else if (rsr & UART01x_RSR_PE) + flag = TTY_PARITY; + else if (rsr & UART01x_RSR_FE) + flag = TTY_FRAME; + } + + if (uart_handle_sysrq_char(&uap->port, ch)) + goto ignore_char; + + uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag); + +ignore_char: + status = __raw_readl(uap->port.membase + UART01x_FR); + } + tty_flip_buffer_push(tty); + return; +} + +static void stmpdbg_tx_chars(struct uart_stmpdbg_port *uap) +{ + struct circ_buf *xmit = &uap->port.info->xmit; + int count; + + if (uap->port.x_char) { + __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR); + uap->port.icount.tx++; + uap->port.x_char = 0; + return; + } + if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) { + stmpdbg_stop_tx(&uap->port); + return; + } + + count = uap->port.fifosize >> 1; + do { + __raw_writel(xmit->buf[xmit->tail], + uap->port.membase + UART01x_DR); + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + uap->port.icount.tx++; + if (uart_circ_empty(xmit)) + break; + } while (--count > 0); + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(&uap->port); + + if (uart_circ_empty(xmit)) + stmpdbg_stop_tx(&uap->port); +} + +static void stmpdbg_modem_status(struct uart_stmpdbg_port *uap) +{ + unsigned int status, delta; + + status = __raw_readl(uap->port.membase + UART01x_FR) & + UART01x_FR_MODEM_ANY; + + delta = status ^ uap->old_status; + uap->old_status = status; + + if (!delta) + return; + + if (delta & UART01x_FR_DCD) + uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); + + if (delta & UART01x_FR_DSR) + uap->port.icount.dsr++; + + if (delta & UART01x_FR_CTS) + uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); + + wake_up_interruptible(&uap->port.info->delta_msr_wait); +} + +static irqreturn_t stmpdbg_int(int irq, void *dev_id) +{ + struct uart_stmpdbg_port *uap = dev_id; + unsigned int status, pass_counter = ISR_PASS_LIMIT; + int handled = 0; + + spin_lock(&uap->port.lock); + + status = __raw_readl(uap->port.membase + UART011_MIS); + if (status) { + do { + __raw_writel(status & ~(UART011_TXIS|UART011_RTIS| + UART011_RXIS), + uap->port.membase + UART011_ICR); + + if (status & (UART011_RTIS|UART011_RXIS)) + stmpdbg_rx_chars(uap); + if (status & (UART011_DSRMIS|UART011_DCDMIS| + UART011_CTSMIS|UART011_RIMIS)) + stmpdbg_modem_status(uap); + if (status & UART011_TXIS) + stmpdbg_tx_chars(uap); + + if (pass_counter-- == 0) + break; + + status = __raw_readl(uap->port.membase + UART011_MIS); + } while (status != 0); + handled = 1; + } + + spin_unlock(&uap->port.lock); + + return IRQ_RETVAL(handled); +} + +static unsigned int stmpdbg_tx_empty(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned int status = __raw_readl(uap->port.membase + UART01x_FR); + return status & (UART01x_FR_BUSY|UART01x_FR_TXFF) ? 0 : TIOCSER_TEMT; +} + +static unsigned int stmpdbg_get_mctrl(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned int result = 0; + unsigned int status = __raw_readl(uap->port.membase + UART01x_FR); + +#define TEST_AND_SET_BIT(uartbit, tiocmbit) do { \ + if (status & uartbit) \ + result |= tiocmbit; \ + } while (0) + + TEST_AND_SET_BIT(UART01x_FR_DCD, TIOCM_CAR); + TEST_AND_SET_BIT(UART01x_FR_DSR, TIOCM_DSR); + TEST_AND_SET_BIT(UART01x_FR_CTS, TIOCM_CTS); + TEST_AND_SET_BIT(UART011_FR_RI, TIOCM_RNG); +#undef TEST_AND_SET_BIT + if (force_cd) + result |= TIOCM_CAR; + return result; +} + +static void stmpdbg_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned int cr; + + cr = __raw_readl(uap->port.membase + UART011_CR); + +#define TEST_AND_SET_BIT(tiocmbit, uartbit) do { \ + if (mctrl & tiocmbit) \ + cr |= uartbit; \ + else \ + cr &= ~uartbit; \ + } while (0) + + TEST_AND_SET_BIT(TIOCM_RTS, UART011_CR_RTS); + TEST_AND_SET_BIT(TIOCM_DTR, UART011_CR_DTR); + TEST_AND_SET_BIT(TIOCM_OUT1, UART011_CR_OUT1); + TEST_AND_SET_BIT(TIOCM_OUT2, UART011_CR_OUT2); + TEST_AND_SET_BIT(TIOCM_LOOP, UART011_CR_LBE); +#undef TEST_AND_SET_BIT + + __raw_writel(cr, uap->port.membase + UART011_CR); +} + +static void stmpdbg_break_ctl(struct uart_port *port, int break_state) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned long flags; + unsigned int lcr_h; + + spin_lock_irqsave(&uap->port.lock, flags); + lcr_h = __raw_readl(uap->port.membase + UART011_LCRH); + if (break_state == -1) + lcr_h |= UART01x_LCRH_BRK; + else + lcr_h &= ~UART01x_LCRH_BRK; + __raw_writel(lcr_h, uap->port.membase + UART011_LCRH); + spin_unlock_irqrestore(&uap->port.lock, flags); +} + +static int stmpdbg_startup(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + u32 cr, lcr; + int retval; + + /* + * Allocate the IRQ + */ + retval = request_irq(uap->port.irq, stmpdbg_int, 0, STMPDBG_DEVID, uap); + if (retval) + return retval; + + __raw_writel(0, uap->port.membase + UART01x_DR); /* wake up the UART */ + + __raw_writel(UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, + uap->port.membase + UART011_IFLS); + + /* + * Provoke TX FIFO interrupt into asserting. + */ + cr = UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE; + __raw_writel(cr, uap->port.membase + UART011_CR); + + lcr = __raw_readl(uap->port.membase + UART011_LCRH); + lcr |= UART01x_LCRH_FEN; + __raw_writel(lcr, uap->port.membase + UART011_LCRH); + + /* + * initialise the old status of the modem signals + */ + uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & + UART01x_FR_MODEM_ANY; + + /* + * Finally, enable interrupts + */ + spin_lock_irq(&uap->port.lock); + uap->im = UART011_RXIM | UART011_RTIM; + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); + spin_unlock_irq(&uap->port.lock); + + return 0; +} + +static void stmpdbg_shutdown(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned long val; + + /* + * disable all interrupts + */ + spin_lock_irq(&uap->port.lock); + uap->im = 0; + __raw_writel(uap->im, uap->port.membase + UART011_IMSC); + __raw_writel(0xffff, uap->port.membase + UART011_ICR); + spin_unlock_irq(&uap->port.lock); + + free_irq(uap->port.irq, uap); + + /* + * disable the port + */ + __raw_writel(UART01x_CR_UARTEN | UART011_CR_TXE, + uap->port.membase + UART011_CR); + + /* + * disable break condition and fifos + */ + val = __raw_readl(uap->port.membase + UART011_LCRH); + val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); + __raw_writel(val, uap->port.membase + UART011_LCRH); +} + +static void +stmpdbg_set_termios(struct uart_port *port, struct ktermios *termios, + struct ktermios *old) +{ + unsigned int lcr_h, old_cr; + unsigned long flags; + unsigned int baud, quot; + + /* + * Ask the core to calculate the divisor for us. + */ + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); + quot = port->uartclk * 4 / baud; + + switch (termios->c_cflag & CSIZE) { + case CS5: + lcr_h = UART01x_LCRH_WLEN_5; + break; + case CS6: + lcr_h = UART01x_LCRH_WLEN_6; + break; + case CS7: + lcr_h = UART01x_LCRH_WLEN_7; + break; + default: /* CS8 */ + lcr_h = UART01x_LCRH_WLEN_8; + break; + } + if (termios->c_cflag & CSTOPB) + lcr_h |= UART01x_LCRH_STP2; + if (termios->c_cflag & PARENB) { + lcr_h |= UART01x_LCRH_PEN; + if (!(termios->c_cflag & PARODD)) + lcr_h |= UART01x_LCRH_EPS; + } + lcr_h |= UART01x_LCRH_FEN; + + spin_lock_irqsave(&port->lock, flags); + + /* + * Update the per-port timeout. + */ + uart_update_timeout(port, termios->c_cflag, baud); + + port->read_status_mask = UART01x_RSR_OE; + if (termios->c_iflag & INPCK) + port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; + if (termios->c_iflag & (BRKINT | PARMRK)) + port->read_status_mask |= UART01x_RSR_BE; + + /* + * Characters to ignore + */ + port->ignore_status_mask = 0; + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; + if (termios->c_iflag & IGNBRK) { + port->ignore_status_mask |= UART01x_RSR_BE; + /* + * If we're ignoring parity and break indicators, + * ignore overruns too (for real raw support). + */ + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= UART01x_RSR_OE; + } + + /* + * Ignore all characters if CREAD is not set. + */ + if ((termios->c_cflag & CREAD) == 0) + port->ignore_status_mask |= UART_DUMMY_RSR_RX; + + if (UART_ENABLE_MS(port, termios->c_cflag)) + stmpdbg_enable_ms(port); + + /* first, disable everything */ + old_cr = __raw_readl(port->membase + UART011_CR); + __raw_writel(0, port->membase + UART011_CR); + + /* Set baud rate */ + __raw_writel(quot & 0x3f, port->membase + UART011_FBRD); + __raw_writel(quot >> 6, port->membase + UART011_IBRD); + + /* + * ----------v----------v----------v----------v----- + * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L + * ----------^----------^----------^----------^----- + */ + __raw_writel(lcr_h, port->membase + UART011_LCRH); + __raw_writel(old_cr, port->membase + UART011_CR); + + spin_unlock_irqrestore(&port->lock, flags); +} + +static const char *stmpdbg_type(struct uart_port *port) +{ + return port->type == PORT_STMPDBG ? STMPDBG_DEVID : NULL; +} + + +/* + * Release the memory region(s) being used by 'port' + */ +static void stmpdbg_release_port(struct uart_port *port) +{ + release_mem_region(port->mapbase, UART_PORT_SIZE); +} + +/* + * Request the memory region(s) being used by 'port' + */ +static int stmpdbg_request_port(struct uart_port *port) +{ + return request_mem_region(port->mapbase, UART_PORT_SIZE, STMPDBG_DEVID) + != NULL ? 0 : -EBUSY; +} + +/* + * Configure/autoconfigure the port. + */ +static void stmpdbg_config_port(struct uart_port *port, int flags) +{ + if (flags & UART_CONFIG_TYPE) { + port->type = PORT_STMPDBG; + stmpdbg_request_port(port); + } +} + +/* + * verify the new serial_struct (for TIOCSSERIAL). + */ +static int stmpdbg_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + int ret = 0; + if (ser->type != PORT_UNKNOWN && ser->type != PORT_STMPDBG) + ret = -EINVAL; + if (ser->irq < 0 || ser->irq >= NR_IRQS) + ret = -EINVAL; + if (ser->baud_base < 9600) + ret = -EINVAL; + return ret; +} + +#ifdef CONFIG_CONSOLE_POLL +/* + * Console polling routines for writing and reading from the UART while + * in an interrupt or debug context. + */ + +static int stmpdbg_get_poll_char(struct uart_port *port) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + unsigned int status; + + /* Wait until a character arrives. */ + + do { + status = __raw_readl(uap->port.membase + UART01x_FR); + } while (status & UART01x_FR_RXFE); + + /* Read the character and return it. */ + + return __raw_readl(uap->port.membase + UART01x_DR) & 0xff; + +} + +static void stmpdbg_put_poll_char(struct uart_port *port, unsigned char c) +{ + struct uart_stmpdbg_port *uap = (struct uart_stmpdbg_port *)port; + + /* Wait until the transmit FIFO is empty. */ + + while (!(__raw_readl(uap->port.membase + UART01x_FR) & UART011_FR_TXFE)) + barrier(); + + /* Transmit the character. */ + + __raw_writel(c, uap->port.membase + UART01x_DR); + +} + +#endif /* CONFIG_CONSOLE_POLL */ + +static struct uart_ops stmpdbg_pops = { + .tx_empty = stmpdbg_tx_empty, + .set_mctrl = stmpdbg_set_mctrl, + .get_mctrl = stmpdbg_get_mctrl, + .stop_tx = stmpdbg_stop_tx, + .start_tx = stmpdbg_start_tx, + .stop_rx = stmpdbg_stop_rx, + .enable_ms = stmpdbg_enable_ms, + .break_ctl = stmpdbg_break_ctl, + .startup = stmpdbg_startup, + .shutdown = stmpdbg_shutdown, + .set_termios = stmpdbg_set_termios, + .type = stmpdbg_type, + .release_port = stmpdbg_release_port, + .request_port = stmpdbg_request_port, + .config_port = stmpdbg_config_port, + .verify_port = stmpdbg_verify_port, +#ifdef CONFIG_CONSOLE_POLL + .poll_get_char = stmpdbg_get_poll_char, + .poll_put_char = stmpdbg_put_poll_char, +#endif +}; + +static struct uart_stmpdbg_port stmpdbg_ports[UART_NR] = { + { + .port = { + /* This *is* the virtual address */ + .membase = (void *)REGS_UARTDBG_BASE + HW_UARTDBGDR, + .mapbase = REGS_UARTDBG_PHYS + HW_UARTDBGDR, + .iotype = SERIAL_IO_MEM, + .irq = IRQ_DEBUG_UART, + .fifosize = 16, + .ops = &stmpdbg_pops, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + .uartclk = 24000000, + }, + } +}; + +#ifdef CONFIG_SERIAL_STMP_DBG_CONSOLE + +static void +stmpdbg_console_write(struct console *co, const char *s, unsigned int count) +{ + struct uart_port *port = &stmpdbg_ports[co->index].port; + unsigned int status, old_cr; + int i; + + /* + * First save the CR then disable the interrupts + */ + old_cr = UART_GET_CR(port); + UART_PUT_CR(port, UART01x_CR_UARTEN); + + /* + * Now, do each character + */ + for (i = 0; i < count; i++) { + do { + status = UART_GET_FR(port); + } while (!UART_TX_READY(status)); + UART_PUT_CHAR(port, s[i]); + if (s[i] == '\n') { + do { + status = UART_GET_FR(port); + } while (!UART_TX_READY(status)); + UART_PUT_CHAR(port, '\r'); + } + } + + /* + * Finally, wait for transmitter to become empty + * and restore the TCR + */ + do { + status = UART_GET_FR(port); + } while (status & UART01x_FR_BUSY); + UART_PUT_CR(port, old_cr); +} + +static void __init +stmpdbg_console_get_options(struct uart_port *port, int *baud, + int *parity, int *bits) +{ + if (UART_GET_CR(port) & UART01x_CR_UARTEN) { + unsigned int lcr_h, quot; + lcr_h = UART_GET_LCRH(port); + + *parity = 'n'; + if (lcr_h & UART01x_LCRH_PEN) { + if (lcr_h & UART01x_LCRH_EPS) + *parity = 'e'; + else + *parity = 'o'; + } + + if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7) + *bits = 7; + else + *bits = 8; + + quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8; + *baud = port->uartclk / (16 * (quot + 1)); + } +} + +static int __init stmpdbg_console_setup(struct console *co, char *options) +{ + struct uart_port *port; + int baud = 115200; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + + /* + * Check whether an invalid uart number has been specified, and + * if so, search for the first available port that does have + * console support. + */ + if (co->index >= UART_NR) + co->index = 0; + port = &stmpdbg_ports[co->index].port; + + if (options) + uart_parse_options(options, &baud, &parity, &bits, &flow); + else + stmpdbg_console_get_options(port, &baud, &parity, &bits); + + return uart_set_options(port, co, baud, parity, bits, flow); +} + + +static struct console stmpdbg_console = { + .name = "ttyAM", + .write = stmpdbg_console_write, + .device = uart_console_device, + .setup = stmpdbg_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &stmpdbg_reg, +}; + +static int __init stmpdbg_console_init(void) +{ + /* + * All port initializations are done statically + */ + register_console(&stmpdbg_console); + return 0; +} +console_initcall(stmpdbg_console_init); + +static int __init stmpdbg_late_console_init(void) +{ + if (!(stmpdbg_console.flags & CON_ENABLED)) + register_console(&stmpdbg_console); + return 0; +} +late_initcall(stmpdbg_late_console_init); + +#endif + +static struct uart_driver stmpdbg_reg = { + .owner = THIS_MODULE, + .driver_name = "ttyAM", + .dev_name = "ttyAM", + .major = SERIAL_STMPDBG_MAJOR, + .minor = SERIAL_STMPDBG_MINOR, + .nr = UART_NR, +#ifdef CONFIG_SERIAL_STMP_DBG_CONSOLE + .cons = &stmpdbg_console, +#endif +}; + +static int __devinit stmpdbguart_probe(struct platform_device *device) +{ + int ret = 0; + int i; + void (*cfg)(int request, int port) = NULL; + + if (device->dev.platform_data) + cfg = device->dev.platform_data; + + device_init_wakeup(&device->dev, 1); + + for (i = 0; i < UART_NR; i++) { + stmpdbg_ports[i].clk = clk_get(NULL, "uart"); + if (IS_ERR(stmpdbg_ports[i].clk)) + continue; + stmpdbg_ports[i].suspended = 0; + stmpdbg_ports[i].port.dev = &device->dev; + stmpdbg_ports[i].port.uartclk = + clk_get_rate(stmpdbg_ports[i].clk) * 1000; + if (cfg) + (*cfg)(1, i); + uart_add_one_port(&stmpdbg_reg, &stmpdbg_ports[i].port); + } + return ret; +} + +static int __devexit stmpdbguart_remove(struct platform_device *device) +{ + int i; + void (*cfg)(int request, int port) = NULL; + + if (device->dev.platform_data) + cfg = device->dev.platform_data; + for (i = 0; i < UART_NR; i++) { + clk_put(stmpdbg_ports[i].clk); + uart_remove_one_port(&stmpdbg_reg, &stmpdbg_ports[0].port); + if (cfg) + (*cfg)(0, i); + } + return 0; +} + +static int stmpdbguart_suspend(struct platform_device *device, + pm_message_t state) +{ +#ifdef CONFIG_PM + int i; + int deep_sleep = (stmp37xx_pm_get_target() != PM_SUSPEND_STANDBY); + + for (i = 0; i < UART_NR; i++) { + if (deep_sleep) { + uart_suspend_port(&stmpdbg_reg, + &stmpdbg_ports[i].port); + clk_disable(stmpdbg_ports[i].clk); + stmpdbg_ports[i].suspended = 1; + } + } +#endif + return 0; +} + +static int stmpdbguart_resume(struct platform_device *device) +{ + int ret = 0; +#ifdef CONFIG_PM + int i; + + for (i = 0; i < UART_NR; i++) { + if (stmpdbg_ports[i].suspended) { + clk_enable(stmpdbg_ports[i].clk); + uart_resume_port(&stmpdbg_reg, &stmpdbg_ports[i].port); + } + stmpdbg_ports[i].suspended = 0; + } +#endif + return ret; +} + +static struct platform_driver stmpdbguart_driver = { + .probe = stmpdbguart_probe, + .remove = __devexit_p(stmpdbguart_remove), + .suspend = stmpdbguart_suspend, + .resume = stmpdbguart_resume, + .driver = { + .name = "stmp3xxx-dbguart", + .owner = THIS_MODULE, + }, +}; + +static int __init stmpdbg_init(void) +{ + int ret; + + ret = uart_register_driver(&stmpdbg_reg); + if (ret) + goto out; + + ret = platform_driver_register(&stmpdbguart_driver); + if (ret) + uart_unregister_driver(&stmpdbg_reg); +out: + return ret; +} + +static void __exit stmpdbg_exit(void) +{ + platform_driver_unregister(&stmpdbguart_driver); + uart_unregister_driver(&stmpdbg_reg); +} + +module_init(stmpdbg_init); +module_exit(stmpdbg_exit); +module_param(force_cd, int, 0644); +MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd/Sigmatel Inc"); +MODULE_DESCRIPTION("STMP37xx debug uart"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/serial/mxc_uart.c +++ linux-fsl-imx51-2.6.31/drivers/serial/mxc_uart.c @@ -0,0 +1,1950 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/serial/mxc_uart.c + * + * @brief Driver for the Freescale Semiconductor MXC serial ports based on + * drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. + * + * @ingroup UART + */ + +/* + * Include Files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_SERIAL_MXC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) +#define SUPPORT_SYSRQ +#endif +#define SERIAL_MXC_MAJOR 207 +#define SERIAL_MXC_MINOR 16 +#define MXC_ISR_PASS_LIMIT 256 +#define UART_CREAD_BIT 256 + +#define MXC_UART_NR 8 + +/* IRDA minimum pulse duration in micro seconds */ +#define MIN_PULSE_DUR 2 +/* + * Transmit DMA buffer size is set to 1024 bytes, this is limited + * by UART_XMIT_SIZE. + */ +#define TXDMA_BUFF_SIZE UART_XMIT_SIZE +/* + * Receive DMA sub-buffer size + */ +#define RXDMA_BUFF_SIZE 128 + +/*! + * This structure is used to store the information for DMA data transfer. + */ +typedef struct { + /*! + * Holds the read channel number. + */ + int rd_channel; + /*! + * Holds the write channel number. + */ + int wr_channel; + /*! + * UART Transmit Event ID + */ + int tx_event_id; + /*! + * UART Receive Event ID + */ + int rx_event_id; + /*! + * DMA Transmit tasklet + */ + struct tasklet_struct dma_tx_tasklet; + /*! + * Flag indicates if the channel is in use + */ + int dma_txchnl_inuse; +} dma_info; + +/*! + * This is used to indicate if we want echo cancellation in the Irda mode. + */ +static int echo_cancel; +extern void gpio_uart_active(int port, int no_irda); +extern void gpio_uart_inactive(int port, int no_irda); +extern void config_uartdma_event(int port); + +static uart_mxc_port *mxc_ports[MXC_UART_NR]; + +/*! + * This array holds the DMA channel information for each MXC UART + */ +static dma_info dma_list[MXC_UART_NR]; + +/*! + * This function is called by the core driver to stop UART transmission. + * This might be due to the TTY layer indicating that the user wants to stop + * transmission. + * + * @param port the port structure for the UART passed in by the core + * driver + */ +static void mxcuart_stop_tx(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + volatile unsigned int cr1; + + cr1 = readl(port->membase + MXC_UARTUCR1); + /* Disable Transmitter rdy interrupt */ + if (umxc->dma_enabled == 1) { + cr1 &= ~MXC_UARTUCR1_TXDMAEN; + } else { + cr1 &= ~MXC_UARTUCR1_TRDYEN; + } + writel(cr1, port->membase + MXC_UARTUCR1); +} + +/*! + * DMA Transmit tasklet method is scheduled on completion of a DMA transmit + * to send out any more data that is available in the UART xmit buffer. + * + * @param arg driver private data + */ +static void dma_tx_do_tasklet(unsigned long arg) +{ + uart_mxc_port *umxc = (uart_mxc_port *) arg; + struct circ_buf *xmit = &umxc->port.info->xmit; + mxc_dma_requestbuf_t writechnl_request; + int tx_num; + unsigned long flags; + + spin_lock_irqsave(&umxc->port.lock, flags); + tx_num = uart_circ_chars_pending(xmit); + if (tx_num > 0) { + if (xmit->tail > xmit->head) { + memcpy(umxc->tx_buf, xmit->buf + xmit->tail, + UART_XMIT_SIZE - xmit->tail); + memcpy(umxc->tx_buf + (UART_XMIT_SIZE - xmit->tail), + xmit->buf, xmit->head); + } else { + memcpy(umxc->tx_buf, xmit->buf + xmit->tail, tx_num); + } + umxc->tx_handle = dma_map_single(umxc->port.dev, umxc->tx_buf, + TXDMA_BUFF_SIZE, + DMA_TO_DEVICE); + + writechnl_request.dst_addr = umxc->port.mapbase + MXC_UARTUTXD; + writechnl_request.src_addr = umxc->tx_handle; + writechnl_request.num_of_bytes = tx_num; + + if ((mxc_dma_config(dma_list[umxc->port.line].wr_channel, + &writechnl_request, 1, + MXC_DMA_MODE_WRITE)) == 0) { + mxc_dma_enable(dma_list[umxc->port.line].wr_channel); + } + } else { + /* No more data available in the xmit queue, clear the flag */ + dma_list[umxc->port.line].dma_txchnl_inuse = 0; + } + spin_unlock_irqrestore(&umxc->port.lock, flags); +} + +/*! + * DMA Write callback is called by the SDMA controller after it has sent out all + * the data from the user buffer. This function updates the xmit buffer pointers. + * + * @param arg driver private data + * @param error any DMA error + * @param count amount of data that was transferred + */ +static void mxcuart_dma_writecallback(void *arg, int error, unsigned int count) +{ + uart_mxc_port *umxc = arg; + struct circ_buf *xmit = &umxc->port.info->xmit; + int tx_num; + + if (error != MXC_DMA_TRANSFER_ERROR) { + tx_num = count; + umxc->port.icount.tx += tx_num; + xmit->tail = (xmit->tail + tx_num) & (UART_XMIT_SIZE - 1); + } + + dma_unmap_single(umxc->port.dev, umxc->tx_handle, TXDMA_BUFF_SIZE, + DMA_TO_DEVICE); + tx_num = uart_circ_chars_pending(xmit); + /* Schedule a tasklet to send out the pending characters */ + if (tx_num > 0) { + tasklet_schedule(&dma_list[umxc->port.line].dma_tx_tasklet); + } else { + dma_list[umxc->port.line].dma_txchnl_inuse = 0; + } + if (tx_num < WAKEUP_CHARS) { + uart_write_wakeup(&umxc->port); + } +} + +/*! + * This function is called by the core driver to start transmitting characters. + * This function enables the transmit interrupts. + * + * @param port the port structure for the UART passed in by the core + * driver + */ +static void mxcuart_start_tx(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + struct circ_buf *xmit = &umxc->port.info->xmit; + volatile unsigned int cr1; + mxc_dma_requestbuf_t writechnl_request; + int tx_num; + + cr1 = readl(port->membase + MXC_UARTUCR1); + /* Enable Transmitter rdy interrupt */ + if (umxc->dma_enabled == 1) { + /* + * If the channel is in use then return immediately and use + * the dma_tx tasklet to transfer queued data when current DMA + * transfer is complete + */ + if (dma_list[umxc->port.line].dma_txchnl_inuse == 1) { + return; + } + tx_num = uart_circ_chars_pending(xmit); + if (tx_num > 0) { + dma_list[umxc->port.line].dma_txchnl_inuse = 1; + if (xmit->tail > xmit->head) { + memcpy(umxc->tx_buf, xmit->buf + xmit->tail, + UART_XMIT_SIZE - xmit->tail); + memcpy(umxc->tx_buf + + (UART_XMIT_SIZE - xmit->tail), xmit->buf, + xmit->head); + } else { + memcpy(umxc->tx_buf, xmit->buf + xmit->tail, + tx_num); + } + umxc->tx_handle = + dma_map_single(umxc->port.dev, umxc->tx_buf, + TXDMA_BUFF_SIZE, DMA_TO_DEVICE); + + writechnl_request.dst_addr = + umxc->port.mapbase + MXC_UARTUTXD; + writechnl_request.src_addr = umxc->tx_handle; + writechnl_request.num_of_bytes = tx_num; + if ((mxc_dma_config + (dma_list[umxc->port.line].wr_channel, + &writechnl_request, 1, + MXC_DMA_MODE_WRITE)) == 0) { + mxc_dma_enable(dma_list[umxc->port.line]. + wr_channel); + } + cr1 |= MXC_UARTUCR1_TXDMAEN; + } + } else { + cr1 |= MXC_UARTUCR1_TRDYEN; + } + writel(cr1, port->membase + MXC_UARTUCR1); +} + +/*! + * This function is called by the core driver to stop receiving characters; the + * port is in the process of being closed. + * + * @param port the port structure for the UART passed in by the core driver + */ +static void mxcuart_stop_rx(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + volatile unsigned int cr1; + + cr1 = readl(port->membase + MXC_UARTUCR1); + if (umxc->dma_enabled == 1) { + cr1 &= ~MXC_UARTUCR1_RXDMAEN; + } else { + cr1 &= ~MXC_UARTUCR1_RRDYEN; + } + writel(cr1, port->membase + MXC_UARTUCR1); +} + +/*! + * This function is called by the core driver to enable the modem status + * interrupts. If the port is configured to be in DTE mode then it enables the + * DCDDELT and RIDELT interrupts in addition to the DTRDEN interrupt. The RTSDEN + * interrupt is enabled only for interrupt-driven hardware flow control. + * + * @param port the port structure for the UART passed in by the core driver + */ +static void mxcuart_enable_ms(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + volatile unsigned int cr1, cr3; + + /* + * RTS interrupt is enabled only if we are using interrupt-driven + * software controlled hardware flow control + */ + if (umxc->hardware_flow == 0) { + cr1 = readl(umxc->port.membase + MXC_UARTUCR1); + cr1 |= MXC_UARTUCR1_RTSDEN; + writel(cr1, umxc->port.membase + MXC_UARTUCR1); + } + cr3 = readl(umxc->port.membase + MXC_UARTUCR3); + cr3 |= MXC_UARTUCR3_DTRDEN; + if (umxc->mode == MODE_DTE) { + cr3 |= MXC_UARTUCR3_DCD | MXC_UARTUCR3_RI; + } + writel(cr3, umxc->port.membase + MXC_UARTUCR3); +} + +/*! + * This function is called from the interrupt service routine if the status bit + * indicates that the receive fifo data level is above the set threshold. The + * function reads the character and queues them into the TTY layers read + * buffer. The function also looks for break characters, parity and framing + * errors in the received character and sets the appropriate flag in the TTY + * receive buffer. + * + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + */ +static void mxcuart_rx_chars(uart_mxc_port * umxc) +{ + volatile unsigned int ch, sr2; + unsigned int status, flag, max_count = 256; + + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + while (((sr2 & MXC_UARTUSR2_RDR) == 1) && (max_count-- > 0)) { + ch = readl(umxc->port.membase + MXC_UARTURXD); + + flag = TTY_NORMAL; + status = ch | UART_CREAD_BIT; + ch &= 0xFF; /* Clear the upper bits */ + umxc->port.icount.rx++; + + /* + * Check to see if there is an error in the received + * character. Perform the appropriate actions based on the + * error bit that was set. + */ + if (status & MXC_UARTURXD_ERR) { + if (status & MXC_UARTURXD_BRK) { + /* + * Clear the frame and parity error bits + * as these always get set on receiving a + * break character + */ + status &= ~(MXC_UARTURXD_FRMERR | + MXC_UARTURXD_PRERR); + umxc->port.icount.brk++; + if (uart_handle_break(&umxc->port)) { + goto ignore_char; + } + } else if (status & MXC_UARTURXD_FRMERR) { + umxc->port.icount.frame++; + } else if (status & MXC_UARTURXD_PRERR) { + umxc->port.icount.parity++; + } + if (status & MXC_UARTURXD_OVRRUN) { + umxc->port.icount.overrun++; + } + + status &= umxc->port.read_status_mask; + + if (status & MXC_UARTURXD_BRK) { + flag = TTY_BREAK; + } else if (status & MXC_UARTURXD_FRMERR) { + flag = TTY_FRAME; + } else if (status & MXC_UARTURXD_PRERR) { + flag = TTY_PARITY; + } + } + + if (uart_handle_sysrq_char(&umxc->port, ch)) { + goto ignore_char; + } + + uart_insert_char(&umxc->port, status, MXC_UARTURXD_OVRRUN, ch, + flag); + ignore_char: + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + } + tty_flip_buffer_push(umxc->port.info->port.tty); +} + +/*! + * This function is called from the interrupt service routine if the status bit + * indicates that the transmit fifo is emptied below its set threshold and + * requires data. The function pulls characters from the TTY layers write + * buffer and writes it out to the UART transmit fifo. + * + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + */ +static void mxcuart_tx_chars(uart_mxc_port * umxc) +{ + struct circ_buf *xmit = &umxc->port.info->xmit; + int count; + + /* + * Transmit the XON/XOFF character if required + */ + if (umxc->port.x_char) { + writel(umxc->port.x_char, umxc->port.membase + MXC_UARTUTXD); + umxc->port.icount.tx++; + umxc->port.x_char = 0; + return; + } + + /* + * Check to see if there is any data to be sent and that the + * port has not been currently stopped by anything. + */ + if (uart_circ_empty(xmit) || uart_tx_stopped(&umxc->port)) { + mxcuart_stop_tx(&umxc->port); + return; + } + + count = umxc->port.fifosize - umxc->tx_threshold; + do { + writel(xmit->buf[xmit->tail], + umxc->port.membase + MXC_UARTUTXD); + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); + umxc->port.icount.tx++; + if (uart_circ_empty(xmit)) { + break; + } + } while (--count > 0); + + /* + * Check to see if we have flushed enough characters to ask for more + * to be sent to us, if so, we notify the user space that we can + * accept more data + */ + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) { + uart_write_wakeup(&umxc->port); + } + + if (uart_circ_empty(xmit)) { + mxcuart_stop_tx(&umxc->port); + } +} + +/*! + * This function is called from the interrupt service routine if there is a + * change in the modem signals. This function handles these signal changes and + * also clears the appropriate status register bits. + * + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + * @param sr1 contents of status register 1 + * @param sr2 contents of status register 2 + */ +static void mxcuart_modem_status(uart_mxc_port * umxc, unsigned int sr1, + unsigned int sr2) +{ + if (umxc->mode == MODE_DTE) { + if (sr2 & MXC_UARTUSR2_DCDDELT) { + uart_handle_dcd_change(&umxc->port, + !(sr2 & MXC_UARTUSR2_DCDIN)); + } + if (sr2 & MXC_UARTUSR2_RIDELT) { + umxc->port.icount.rng++; + } + } + if (sr1 & MXC_UARTUSR1_DTRD) { + umxc->port.icount.dsr++; + } + if ((umxc->hardware_flow == 0) && (sr1 & MXC_UARTUSR1_RTSD)) { + uart_handle_cts_change(&umxc->port, sr1 & MXC_UARTUSR1_RTSS); + } + + wake_up_interruptible(&umxc->port.info->delta_msr_wait); +} + +/*! + * Interrupt service routine registered to handle the muxed ANDed interrupts. + * This routine is registered only in the case where the UART interrupts are + * muxed. + * + * @param irq the interrupt number + * @param dev_id driver private data + * + * @return The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + * \b IRQ_RETVAL is defined in \b include/linux/interrupt.h. + */ +static irqreturn_t mxcuart_int(int irq, void *dev_id) +{ + uart_mxc_port *umxc = dev_id; + volatile unsigned int sr1, sr2, cr1, cr; + unsigned int pass_counter = MXC_ISR_PASS_LIMIT; + unsigned int term_cond = 0; + int handled = 0; + + sr1 = readl(umxc->port.membase + MXC_UARTUSR1); + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + cr1 = readl(umxc->port.membase + MXC_UARTUCR1); + + do { + /* Clear the bits that triggered the interrupt */ + writel(sr1, umxc->port.membase + MXC_UARTUSR1); + writel(sr2, umxc->port.membase + MXC_UARTUSR2); + /* + * Read if there is data available + */ + if (sr2 & MXC_UARTUSR2_RDR) { + mxcuart_rx_chars(umxc); + } + + if ((sr1 & (MXC_UARTUSR1_RTSD | MXC_UARTUSR1_DTRD)) || + (sr2 & (MXC_UARTUSR2_DCDDELT | MXC_UARTUSR2_RIDELT))) { + mxcuart_modem_status(umxc, sr1, sr2); + } + + /* + * Send data if there is data to be sent + */ + if ((cr1 & MXC_UARTUCR1_TRDYEN) && (sr1 & MXC_UARTUSR1_TRDY)) { + /* Echo cancellation for IRDA Transmit chars */ + if (umxc->ir_mode == IRDA && echo_cancel) { + /* Disable the receiver */ + cr = readl(umxc->port.membase + MXC_UARTUCR2); + cr &= ~MXC_UARTUCR2_RXEN; + writel(cr, umxc->port.membase + MXC_UARTUCR2); + /* Enable Transmit complete intr to reenable RX */ + cr = readl(umxc->port.membase + MXC_UARTUCR4); + cr |= MXC_UARTUCR4_TCEN; + writel(cr, umxc->port.membase + MXC_UARTUCR4); + } + mxcuart_tx_chars(umxc); + } + + if (pass_counter-- == 0) { + break; + } + + sr1 = readl(umxc->port.membase + MXC_UARTUSR1); + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + + /* Is the transmit complete to reenable the receiver? */ + if (umxc->ir_mode == IRDA && echo_cancel) { + if (sr2 & MXC_UARTUSR2_TXDC) { + cr = readl(umxc->port.membase + MXC_UARTUCR2); + cr |= MXC_UARTUCR2_RXEN; + writel(cr, umxc->port.membase + MXC_UARTUCR2); + /* Disable the Transmit complete interrupt bit */ + cr = readl(umxc->port.membase + MXC_UARTUCR4); + cr &= ~MXC_UARTUCR4_TCEN; + writel(cr, umxc->port.membase + MXC_UARTUCR4); + } + } + + /* + * If there is no data to send or receive and if there is no + * change in the modem status signals then quit the routine + */ + term_cond = sr1 & (MXC_UARTUSR1_RTSD | MXC_UARTUSR1_DTRD); + term_cond |= sr2 & (MXC_UARTUSR2_RDR | MXC_UARTUSR2_DCDDELT); + term_cond |= !(sr2 & MXC_UARTUSR2_TXFE); + } while (term_cond > 0); + + handled = 1; + return IRQ_RETVAL(handled); +} + +/*! + * Interrupt service routine registered to handle the transmit interrupts. This + * routine is registered only in the case where the UART interrupts are not + * muxed. + * + * @param irq the interrupt number + * @param dev_id driver private data + * + * @return The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + * \b IRQ_RETVAL is defined in include/linux/interrupt.h. + */ +static irqreturn_t mxcuart_tx_int(int irq, void *dev_id) +{ + uart_mxc_port *umxc = dev_id; + int handled = 0; + volatile unsigned int sr2, cr; + + /* Echo cancellation for IRDA Transmit chars */ + if (umxc->ir_mode == IRDA && echo_cancel) { + /* Disable the receiver */ + cr = readl(umxc->port.membase + MXC_UARTUCR2); + cr &= ~MXC_UARTUCR2_RXEN; + writel(cr, umxc->port.membase + MXC_UARTUCR2); + /* Enable Transmit complete to reenable receiver */ + cr = readl(umxc->port.membase + MXC_UARTUCR4); + cr |= MXC_UARTUCR4_TCEN; + writel(cr, umxc->port.membase + MXC_UARTUCR4); + } + + mxcuart_tx_chars(umxc); + + /* Is the transmit complete to reenable the receiver? */ + if (umxc->ir_mode == IRDA && echo_cancel) { + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + if (sr2 & MXC_UARTUSR2_TXDC) { + cr = readl(umxc->port.membase + MXC_UARTUCR2); + cr |= MXC_UARTUCR2_RXEN; + writel(cr, umxc->port.membase + MXC_UARTUCR2); + /* Disable the Transmit complete interrupt bit */ + cr = readl(umxc->port.membase + MXC_UARTUCR4); + cr &= ~MXC_UARTUCR4_TCEN; + writel(cr, umxc->port.membase + MXC_UARTUCR4); + } + } + + handled = 1; + + return IRQ_RETVAL(handled); +} + +/*! + * Interrupt service routine registered to handle the receive interrupts. This + * routine is registered only in the case where the UART interrupts are not + * muxed. + * + * @param irq the interrupt number + * @param dev_id driver private data + * + * @return The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + * \b IRQ_RETVAL is defined in include/linux/interrupt.h. + */ +static irqreturn_t mxcuart_rx_int(int irq, void *dev_id) +{ + uart_mxc_port *umxc = dev_id; + int handled = 0; + + /* Clear the aging timer bit */ + writel(MXC_UARTUSR1_AGTIM, umxc->port.membase + MXC_UARTUSR1); + mxcuart_rx_chars(umxc); + handled = 1; + + return IRQ_RETVAL(handled); +} + +/*! + * Interrupt service routine registered to handle the master interrupts. This + * routine is registered only in the case where the UART interrupts are not + * muxed. + * + * @param irq the interrupt number + * @param dev_id driver private data + * + * @return The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + * \b IRQ_RETVAL is defined in include/linux/interrupt.h. + */ +static irqreturn_t mxcuart_mint_int(int irq, void *dev_id) +{ + uart_mxc_port *umxc = dev_id; + int handled = 0; + volatile unsigned int sr1, sr2; + + sr1 = readl(umxc->port.membase + MXC_UARTUSR1); + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + /* Clear the modem status interrupt bits */ + writel(MXC_UARTUSR1_RTSD | MXC_UARTUSR1_DTRD, + umxc->port.membase + MXC_UARTUSR1); + writel(MXC_UARTUSR2_DCDDELT | MXC_UARTUSR2_RIDELT, + umxc->port.membase + MXC_UARTUSR2); + mxcuart_modem_status(umxc, sr1, sr2); + handled = 1; + + return IRQ_RETVAL(handled); +} + +/*! + * This function is called by the core driver to test whether the transmitter + * fifo and shift register for the UART port are empty. + * + * @param port the port structure for the UART passed in by the core driver + * + * @return The function returns TIOCSER_TEMT if it is empty, else returns 0. + */ +static unsigned int mxcuart_tx_empty(struct uart_port *port) +{ + volatile unsigned int sr2; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + sr2 = readl(port->membase + MXC_UARTUSR2); + spin_unlock_irqrestore(&port->lock, flags); + + return sr2 & MXC_UARTUSR2_TXDC ? TIOCSER_TEMT : 0; +} + +/*! + * This function is called by the core driver to get the current status of the + * modem input signals. The state of the output signals is not collected. + * + * @param port the port structure for the UART passed in by the core driver + * + * @return The function returns an integer that contains the ORed value of the + * status of all the modem input signals or error. + */ +static unsigned int mxcuart_get_mctrl(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + unsigned int result = 0; + volatile unsigned int sr1, sr2; + + sr1 = readl(umxc->port.membase + MXC_UARTUSR1); + sr2 = readl(umxc->port.membase + MXC_UARTUSR2); + + if (sr1 & MXC_UARTUSR1_RTSS) { + result |= TIOCM_CTS; + } + if (umxc->mode == MODE_DTE) { + if (!(sr2 & MXC_UARTUSR2_DCDIN)) { + result |= TIOCM_CAR; + } + if (!(sr2 & MXC_UARTUSR2_RIIN)) { + result |= TIOCM_RI; + } + } + return result; +} + +/*! + * This function is called by the core driver to set the state of the modem + * control lines. + * + * @param port the port structure for the UART passed in by the core driver + * @param mctrl the state that the modem control lines should be changed to + */ +static void mxcuart_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + volatile unsigned int cr2 = 0, cr3 = 0, uts = 0; + + cr2 = readl(port->membase + MXC_UARTUCR2); + cr3 = readl(port->membase + MXC_UARTUCR3); + uts = readl(port->membase + MXC_UARTUTS); + + if (mctrl & TIOCM_RTS) { + /* + * Return to hardware-driven hardware flow control if the + * option is enabled + */ + if (umxc->hardware_flow == 1) { + cr2 |= MXC_UARTUCR2_CTSC; + } else { + cr2 |= MXC_UARTUCR2_CTS; + cr2 &= ~MXC_UARTUCR2_CTSC; + } + } else { + cr2 &= ~(MXC_UARTUCR2_CTS | MXC_UARTUCR2_CTSC); + } + writel(cr2, port->membase + MXC_UARTUCR2); + + if (mctrl & TIOCM_DTR) { + cr3 |= MXC_UARTUCR3_DSR; + } else { + cr3 &= ~MXC_UARTUCR3_DSR; + } + writel(cr3, port->membase + MXC_UARTUCR3); + + if (mctrl & TIOCM_LOOP) { + if (umxc->ir_mode == IRDA) { + echo_cancel = 0; + } else { + uts |= MXC_UARTUTS_LOOP; + } + } else { + if (umxc->ir_mode == IRDA) { + echo_cancel = 1; + } else { + uts &= ~MXC_UARTUTS_LOOP; + } + } + writel(uts, port->membase + MXC_UARTUTS); +} + +/*! + * This function is called by the core driver to control the transmission of + * the break signal. If break_state is non-zero, the break signal is + * transmitted, the signal is terminated when another call is made with + * break_state set to 0. + * + * @param port the port structure for the UART passed in by the core + * driver + * @param break_state the requested state of the break signal + */ +static void mxcuart_break_ctl(struct uart_port *port, int break_state) +{ + volatile unsigned int cr1; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + cr1 = readl(port->membase + MXC_UARTUCR1); + if (break_state == -1) { + cr1 |= MXC_UARTUCR1_SNDBRK; + } else { + cr1 &= ~MXC_UARTUCR1_SNDBRK; + } + writel(cr1, port->membase + MXC_UARTUCR1); + spin_unlock_irqrestore(&port->lock, flags); +} + +/*! + * The read DMA callback, this method is called when the DMA buffer has received its + * data. This functions copies the data to the tty buffer and updates the tty buffer + * pointers. It also queues the DMA buffer back to the DMA system. + * + * @param arg driver private data + * @param error any DMA error + * @param cnt amount of data that was transferred + */ +static void mxcuart_dmaread_callback(void *arg, int error, unsigned int cnt) +{ + uart_mxc_port *umxc = arg; + struct tty_struct *tty = umxc->port.info->port.tty; + int buff_id, flip_cnt, num_bufs; + mxc_dma_requestbuf_t readchnl_request; + mxc_uart_rxdmamap *rx_buf_elem = NULL; + unsigned int sr1, sr2; + char flag; + + num_bufs = umxc->dma_rxbuf_size / RXDMA_BUFF_SIZE; + /* Clear the aging timer bit */ + writel(MXC_UARTUSR1_AGTIM, umxc->port.membase + MXC_UARTUSR1); + + buff_id = umxc->dma_rxbuf_id; + flag = TTY_NORMAL; + + if ((umxc->dma_rxbuf_id += 1) >= num_bufs) { + umxc->dma_rxbuf_id = 0; + } + + rx_buf_elem = (mxc_uart_rxdmamap *) (umxc->rx_dmamap + buff_id); + + if (error == MXC_DMA_TRANSFER_ERROR) { + + sr1 = __raw_readl(umxc->port.membase + MXC_UARTUSR1); + sr2 = __raw_readl(umxc->port.membase + MXC_UARTUSR2); + + if (sr2 & MXC_UARTUSR2_BRCD) { + umxc->port.icount.brk++; + if (uart_handle_break(&umxc->port)) { + goto drop_data; + } + } else if (sr1 & MXC_UARTUSR1_PARITYERR) { + umxc->port.icount.parity++; + } else if (sr1 & MXC_UARTUSR1_FRAMERR) { + umxc->port.icount.frame++; + } else if (sr2 & MXC_UARTUSR2_ORE) { + umxc->port.icount.overrun++; + + } + + if (umxc->port.read_status_mask & MXC_UARTURXD_BRK) { + if (sr2 & MXC_UARTUSR2_BRCD) + flag = TTY_BREAK; + } else if (umxc->port.read_status_mask & MXC_UARTURXD_PRERR) { + if (sr1 & MXC_UARTUSR1_PARITYERR) + flag = TTY_PARITY; + } else if (umxc->port.read_status_mask & MXC_UARTURXD_FRMERR) { + if (sr1 & MXC_UARTUSR1_FRAMERR) + flag = TTY_FRAME; + } else if (umxc->port.read_status_mask & MXC_UARTURXD_OVRRUN) { + if (sr2 & MXC_UARTUSR2_ORE) + flag = TTY_OVERRUN; + } +/* By default clearing all error bits in status reg */ + __raw_writel((MXC_UARTUSR2_BRCD | MXC_UARTUSR2_ORE), + umxc->port.membase + MXC_UARTUSR2); + __raw_writel((MXC_UARTUSR1_PARITYERR | MXC_UARTUSR1_FRAMERR), + umxc->port.membase + MXC_UARTUSR1); + } + + flip_cnt = tty_buffer_request_room(tty, cnt); + + /* Check for space availability in the TTY Flip buffer */ + if (flip_cnt <= 0) { + goto drop_data; + } + umxc->port.icount.rx += flip_cnt; + + tty_insert_flip_string(tty, rx_buf_elem->rx_buf, flip_cnt); + + if (flag != TTY_NORMAL) { + tty_insert_flip_char(tty, 0, flag); + } + + tty_flip_buffer_push(tty); + umxc->port.info->port.tty->real_raw = 1; + + drop_data: + readchnl_request.src_addr = umxc->port.mapbase; + readchnl_request.dst_addr = rx_buf_elem->rx_handle; + readchnl_request.num_of_bytes = RXDMA_BUFF_SIZE; + mxc_dma_config(dma_list[umxc->port.line].rd_channel, &readchnl_request, + 1, MXC_DMA_MODE_READ); + mxc_dma_enable(dma_list[umxc->port.line].rd_channel); +} + +/*! + * Allocates DMA read and write channels, creates DMA read and write buffers and + * sets the channel specific parameters. + * + * @param d_info the structure that holds all the DMA information for a + * particular MXC UART + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int mxcuart_initdma(dma_info * d_info, uart_mxc_port * umxc) +{ + int ret = 0, rxbufs, i, j; + mxc_dma_requestbuf_t *readchnl_reqelem; + mxc_uart_rxdmamap *rx_buf_elem; + + /* Request for the read and write channels */ + d_info->rd_channel = mxc_dma_request(umxc->dma_rx_id, "MXC UART Read"); + if (d_info->rd_channel < 0) { + printk(KERN_ERR "MXC UART: Cannot allocate DMA read channel\n"); + return -1; + } else { + d_info->wr_channel = + mxc_dma_request(umxc->dma_tx_id, "MXC UART Write"); + if (d_info->wr_channel < 0) { + mxc_dma_free(d_info->rd_channel); + printk(KERN_ERR + "MXC UART: Cannot allocate DMA write channel\n"); + return -1; + } + } + + /* Allocate the DMA Transmit Buffer */ + if ((umxc->tx_buf = kmalloc(TXDMA_BUFF_SIZE, GFP_KERNEL)) == NULL) { + ret = -1; + goto err_dma_tx_buff; + } + rxbufs = umxc->dma_rxbuf_size / RXDMA_BUFF_SIZE; + /* Allocate the DMA Virtual Receive Buffer */ + if ((umxc->rx_dmamap = kmalloc(rxbufs * sizeof(mxc_uart_rxdmamap), + GFP_KERNEL)) == NULL) { + ret = -1; + goto err_dma_rx_buff; + } + + /* Allocate the DMA Receive Request structures */ + if ((readchnl_reqelem = + kmalloc(rxbufs * sizeof(mxc_dma_requestbuf_t), + GFP_KERNEL)) == NULL) { + ret = -1; + goto err_request; + } + + for (i = 0; i < rxbufs; i++) { + rx_buf_elem = (mxc_uart_rxdmamap *) (umxc->rx_dmamap + i); + rx_buf_elem->rx_buf = + dma_alloc_coherent(NULL, RXDMA_BUFF_SIZE, + &rx_buf_elem->rx_handle, GFP_DMA); + if (rx_buf_elem->rx_buf == NULL) { + for (j = 0; j < i; j++) { + rx_buf_elem = + (mxc_uart_rxdmamap *) (umxc->rx_dmamap + j); + dma_free_coherent(NULL, RXDMA_BUFF_SIZE, + rx_buf_elem->rx_buf, + rx_buf_elem->rx_handle); + } + ret = -1; + goto cleanup; + } + } + + umxc->dma_rxbuf_id = 0; + /* Setup the DMA read request structures */ + for (i = 0; i < rxbufs; i++) { + rx_buf_elem = (mxc_uart_rxdmamap *) (umxc->rx_dmamap + i); + (readchnl_reqelem + i)->src_addr = umxc->port.mapbase; + (readchnl_reqelem + i)->dst_addr = rx_buf_elem->rx_handle; + (readchnl_reqelem + i)->num_of_bytes = RXDMA_BUFF_SIZE; + } + mxc_dma_config(d_info->rd_channel, readchnl_reqelem, rxbufs, + MXC_DMA_MODE_READ); + mxc_dma_callback_set(d_info->rd_channel, mxcuart_dmaread_callback, + umxc); + mxc_dma_callback_set(d_info->wr_channel, mxcuart_dma_writecallback, + umxc); + + /* Start the read channel */ + mxc_dma_enable(d_info->rd_channel); + kfree(readchnl_reqelem); + tasklet_init(&d_info->dma_tx_tasklet, dma_tx_do_tasklet, + (unsigned long)umxc); + d_info->dma_txchnl_inuse = 0; + return ret; + cleanup: + kfree(readchnl_reqelem); + err_request: + kfree(umxc->rx_dmamap); + err_dma_rx_buff: + kfree(umxc->tx_buf); + err_dma_tx_buff: + mxc_dma_free(d_info->rd_channel); + mxc_dma_free(d_info->wr_channel); + + return ret; +} + +/*! + * Stops DMA and frees the DMA resources + * + * @param d_info the structure that holds all the DMA information for a + * particular MXC UART + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + */ +static void mxcuart_freedma(dma_info * d_info, uart_mxc_port * umxc) +{ + int i, rxbufs; + mxc_uart_rxdmamap *rx_buf_elem; + + rxbufs = umxc->dma_rxbuf_size / RXDMA_BUFF_SIZE; + + for (i = 0; i < rxbufs; i++) { + rx_buf_elem = (mxc_uart_rxdmamap *) (umxc->rx_dmamap + i); + dma_free_coherent(NULL, RXDMA_BUFF_SIZE, + rx_buf_elem->rx_buf, rx_buf_elem->rx_handle); + } + kfree(umxc->rx_dmamap); + kfree(umxc->tx_buf); + mxc_dma_free(d_info->rd_channel); + mxc_dma_free(d_info->wr_channel); +} + +/*! + * This function is called to free the interrupts. + * + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + */ +static void mxcuart_free_interrupts(uart_mxc_port * umxc) +{ + free_irq(umxc->port.irq, umxc); + if (umxc->ints_muxed == 0) { + free_irq(umxc->irqs[0], umxc); + free_irq(umxc->irqs[1], umxc); + } +} + +/*! + * Calculate and set the UART port clock value + * + * @param umxc the MXC UART port structure, this includes the \b uart_port + * structure and other members that are specific to MXC UARTs + * @param per_clk peripheral clock coming into the MXC UART module + * @param req_baud current baudrate requested + * @param div returns the reference frequency divider value + */ +static void mxcuart_set_ref_freq(uart_mxc_port * umxc, unsigned long per_clk, + unsigned int req_baud, int *div) +{ + unsigned int d = 1; + + /* + * Choose the smallest possible prescaler to maximize + * the chance of using integer scaling. Ensure that + * the calculation won't overflow. Limit the denom + * to 15 bits since a 16-bit denom doesn't work. + */ + if (req_baud < (1 << (31 - (4 + 15)))) + d = per_clk / (req_baud << (4 + 15)) + 1; + + umxc->port.uartclk = per_clk / d; + + /* + * Set the ONEMS register that is used by IR special case bit and + * the Escape character detect logic + */ + writel(umxc->port.uartclk / 1000, umxc->port.membase + MXC_UARTONEMS); + *div = d; +} + +/*! + * This function is called by the core driver to initialize the low-level + * driver. The function grabs the interrupt resources and registers its + * interrupt service routines. It then initializes the IOMUX registers to + * configure the pins for UART signals and finally initializes the various + * UART registers and enables the port for reception. + * + * @param port the port structure for the UART passed in by the core driver + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int mxcuart_startup(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + int retval; + volatile unsigned int cr, cr1 = 0, cr2 = 0, ufcr = 0; + + /* + * Some UARTs need separate registrations for the interrupts as + * they do not take the muxed interrupt output to the ARM core + */ + if (umxc->ints_muxed == 1) { + retval = request_irq(umxc->port.irq, mxcuart_int, 0, + "mxcintuart", umxc); + if (retval != 0) { + return retval; + } + } else { + retval = request_irq(umxc->port.irq, mxcuart_tx_int, + 0, "mxcintuart", umxc); + if (retval != 0) { + return retval; + } else { + retval = request_irq(umxc->irqs[0], mxcuart_rx_int, + 0, "mxcintuart", umxc); + if (retval != 0) { + free_irq(umxc->port.irq, umxc); + return retval; + } else { + retval = + request_irq(umxc->irqs[1], mxcuart_mint_int, + 0, "mxcintuart", umxc); + if (retval != 0) { + free_irq(umxc->port.irq, umxc); + free_irq(umxc->irqs[0], umxc); + return retval; + } + } + } + } + + /* Initialize the DMA if we need SDMA data transfer */ + if (umxc->dma_enabled == 1) { + retval = mxcuart_initdma(dma_list + umxc->port.line, umxc); + if (retval != 0) { + printk + (KERN_ERR + "MXC UART: Failed to initialize DMA for UART %d\n", + umxc->port.line); + mxcuart_free_interrupts(umxc); + return retval; + } + /* Configure the GPR register to receive SDMA events */ + config_uartdma_event(umxc->port.line); + } + + /* + * Clear Status Registers 1 and 2 + */ + writel(0xFFFF, umxc->port.membase + MXC_UARTUSR1); + writel(0xFFFF, umxc->port.membase + MXC_UARTUSR2); + + /* Configure the IOMUX for the UART */ + gpio_uart_active(umxc->port.line, umxc->ir_mode); + + /* + * Set the transceiver invert bits if required + */ + if (umxc->ir_mode == IRDA) { + echo_cancel = 1; + writel(umxc->ir_rx_inv | MXC_UARTUCR4_IRSC, umxc->port.membase + + MXC_UARTUCR4); + writel(umxc->rxd_mux | umxc->ir_tx_inv, + umxc->port.membase + MXC_UARTUCR3); + } else { + writel(umxc->rxd_mux, umxc->port.membase + MXC_UARTUCR3); + } + + /* + * Initialize UCR1,2 and UFCR registers + */ + if (umxc->dma_enabled == 1) { + cr2 = (MXC_UARTUCR2_TXEN | MXC_UARTUCR2_RXEN); + } else { + cr2 = + (MXC_UARTUCR2_ATEN | MXC_UARTUCR2_TXEN | MXC_UARTUCR2_RXEN); + } + + writel(cr2, umxc->port.membase + MXC_UARTUCR2); + /* Wait till we are out of software reset */ + do { + cr = readl(umxc->port.membase + MXC_UARTUCR2); + } while (!(cr & MXC_UARTUCR2_SRST)); + + if (umxc->mode == MODE_DTE) { + ufcr |= ((umxc->tx_threshold << MXC_UARTUFCR_TXTL_OFFSET) | + MXC_UARTUFCR_DCEDTE | MXC_UARTUFCR_RFDIV | umxc-> + rx_threshold); + } else { + ufcr |= ((umxc->tx_threshold << MXC_UARTUFCR_TXTL_OFFSET) | + MXC_UARTUFCR_RFDIV | umxc->rx_threshold); + } + writel(ufcr, umxc->port.membase + MXC_UARTUFCR); + + /* + * Finally enable the UART and the Receive interrupts + */ + if (umxc->ir_mode == IRDA) { + cr1 |= MXC_UARTUCR1_IREN; + } + if (umxc->dma_enabled == 1) { + cr1 |= (MXC_UARTUCR1_RXDMAEN | MXC_UARTUCR1_ATDMAEN | + MXC_UARTUCR1_UARTEN); + } else { + cr1 |= (MXC_UARTUCR1_RRDYEN | MXC_UARTUCR1_UARTEN); + } + writel(cr1, umxc->port.membase + MXC_UARTUCR1); + + return 0; +} + +/*! + * This function is called by the core driver for the low-level driver to free + * its resources. The function frees all its interrupts and disables the UART. + * + * @param port the port structure for the UART passed in by the core driver + */ +static void mxcuart_shutdown(struct uart_port *port) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + + /* Disable the IOMUX for the UART */ + gpio_uart_inactive(umxc->port.line, umxc->ir_mode); + mxcuart_free_interrupts(umxc); + /* Disable all interrupts, port and break condition */ + writel(0, umxc->port.membase + MXC_UARTUCR1); + writel(0, umxc->port.membase + MXC_UARTUCR3); + if (umxc->dma_enabled == 1) { + mxcuart_freedma(dma_list + umxc->port.line, umxc); + } +} + +/*! + * This function is called while changing the UART parameters. It is called to + * check if the Infrared special case bit (IRSC) in control register 4 should + * be set. + * + * @param baudrate the desired baudrate + * + * @return The functions returns 0 if the IRSC bit does not have to be set, + * else it returns a 1. + */ +/* +static int mxcuart_setir_special(u_int baudrate) +{ + u_int thresh_val; + + thresh_val = 1000000 / (8 * MIN_PULSE_DUR); + if (baudrate > thresh_val) { + return 0; + } + + return 1; +} +*/ + +/*! + * This function is called by the core driver to change the UART parameters, + * including baudrate, word length, parity, stop bits. The function also updates + * the port structures mask registers to indicate the types of events the user is + * interested in receiving. + * + * @param port the port structure for the UART passed in by the core driver + * @param termios the desired termios settings + * @param old old termios + */ +static void mxcuart_set_termios(struct uart_port *port, + struct ktermios *termios, struct ktermios *old) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + volatile unsigned int cr4 = 0, cr2 = 0, ufcr; + u_int num, denom, baud; + u_int cr2_mask; /* Used to add the changes to CR2 */ + unsigned long flags, per_clk; + int div; + + cr2_mask = ~(MXC_UARTUCR2_IRTS | MXC_UARTUCR2_CTSC | MXC_UARTUCR2_PREN | + MXC_UARTUCR2_PROE | MXC_UARTUCR2_STPB | MXC_UARTUCR2_WS); + + per_clk = clk_get_rate(umxc->clk); + + /* + * Ask the core to get the baudrate, if requested baudrate is not + * between max and min, then either use the baudrate in old termios + * setting. If it's still invalid, we try 9600 baud. + */ + baud = uart_get_baud_rate(&umxc->port, termios, old, 0, per_clk / 16); + /* Set the Reference frequency divider */ + mxcuart_set_ref_freq(umxc, per_clk, baud, &div); + + /* Byte size, default is 8-bit mode */ + switch (termios->c_cflag & CSIZE) { + case CS7: + cr2 = 0; + break; + default: + cr2 = MXC_UARTUCR2_WS; + break; + } + /* Check to see if we need 2 Stop bits */ + if (termios->c_cflag & CSTOPB) { + cr2 |= MXC_UARTUCR2_STPB; + } + + /* Check to see if we need Parity checking */ + if (termios->c_cflag & PARENB) { + cr2 |= MXC_UARTUCR2_PREN; + if (termios->c_cflag & PARODD) { + cr2 |= MXC_UARTUCR2_PROE; + } + } + spin_lock_irqsave(&umxc->port.lock, flags); + + ufcr = readl(umxc->port.membase + MXC_UARTUFCR); + ufcr = (ufcr & (~MXC_UARTUFCR_RFDIV_MASK)) | + ((6 - div) << MXC_UARTUFCR_RFDIV_OFFSET); + writel(ufcr, umxc->port.membase + MXC_UARTUFCR); + + /* + * Update the per-port timeout + */ + uart_update_timeout(&umxc->port, termios->c_cflag, baud); + + umxc->port.read_status_mask = MXC_UARTURXD_OVRRUN; + /* + * Enable appropriate events to be passed to the TTY layer + */ + if (termios->c_iflag & INPCK) { + umxc->port.read_status_mask |= MXC_UARTURXD_FRMERR | + MXC_UARTURXD_PRERR; + } + if (termios->c_iflag & (BRKINT | PARMRK)) { + umxc->port.read_status_mask |= MXC_UARTURXD_BRK; + } + + /* + * Characters to ignore + */ + umxc->port.ignore_status_mask = 0; + if (termios->c_iflag & IGNPAR) { + umxc->port.ignore_status_mask |= MXC_UARTURXD_FRMERR | + MXC_UARTURXD_PRERR; + } + if (termios->c_iflag & IGNBRK) { + umxc->port.ignore_status_mask |= MXC_UARTURXD_BRK; + /* + * If we are ignoring parity and break indicators, + * ignore overruns too (for real raw support) + */ + if (termios->c_iflag & IGNPAR) { + umxc->port.ignore_status_mask |= MXC_UARTURXD_OVRRUN; + } + } + + /* + * Ignore all characters if CREAD is not set, still receive characters + * from the port, but throw them away. + */ + if ((termios->c_cflag & CREAD) == 0) { + umxc->port.ignore_status_mask |= UART_CREAD_BIT; + } + + cr4 = readl(umxc->port.membase + MXC_UARTUCR4); + if (UART_ENABLE_MS(port, termios->c_cflag)) { + mxcuart_enable_ms(port); + if (umxc->hardware_flow == 1) { + cr4 = (cr4 & (~MXC_UARTUCR4_CTSTL_MASK)) | + (umxc->cts_threshold << MXC_UARTUCR4_CTSTL_OFFSET); + cr2 |= MXC_UARTUCR2_CTSC; + umxc->port.info->port.tty->hw_stopped = 0; + } else { + cr2 |= MXC_UARTUCR2_IRTS; + } + } else { + cr2 |= MXC_UARTUCR2_IRTS; + } + + /* Add Parity, character length and stop bits information */ + cr2 |= (readl(umxc->port.membase + MXC_UARTUCR2) & cr2_mask); + writel(cr2, umxc->port.membase + MXC_UARTUCR2); + /* + if (umxc->ir_mode == IRDA) { + ret = mxcuart_setir_special(baud); + if (ret == 0) { + cr4 &= ~MXC_UARTUCR4_IRSC; + } else { + cr4 |= MXC_UARTUCR4_IRSC; + } + } */ + writel(cr4, umxc->port.membase + MXC_UARTUCR4); + + /* + * Set baud rate + */ + + /* Use integer scaling, if possible. Limit the denom to 15 bits. */ + num = 0; + denom = (umxc->port.uartclk + 8 * baud) / (16 * baud) - 1; + + /* Use fractional scaling if needed to limit the max error to 0.5% */ + if (denom < 100) { + u64 n64 = (u64) 16 * 0x8000 * baud + (umxc->port.uartclk / 2); + do_div(n64, umxc->port.uartclk); + num = (u_int) n64 - 1; + denom = 0x7fff; + } + writel(num, umxc->port.membase + MXC_UARTUBIR); + writel(denom, umxc->port.membase + MXC_UARTUBMR); + + spin_unlock_irqrestore(&umxc->port.lock, flags); +} + +/*! + * This function is called by the core driver to know the UART type. + * + * @param port the port structure for the UART passed in by the core driver + * + * @return The function returns a pointer to a string describing the UART port. + */ +static const char *mxcuart_type(struct uart_port *port) +{ + return port->type == PORT_IMX ? "Freescale i.MX" : NULL; +} + +/*! + * This function is called by the core driver to release the memory resources + * currently in use by the UART port. + * + * @param port the port structure for the UART passed in by the core driver + */ +static void mxcuart_release_port(struct uart_port *port) +{ + release_mem_region(port->mapbase, SZ_4K); +} + +/*! + * This function is called by the core driver to request memory resources for + * the UART port. + * + * @param port the port structure for the UART passed in by the core driver + * + * @return The function returns \b -EBUSY on failure, else it returns 0. + */ +static int mxcuart_request_port(struct uart_port *port) +{ + return request_mem_region(port->mapbase, SZ_4K, "serial_mxc") + != NULL ? 0 : -EBUSY; +} + +/*! + * This function is called by the core driver to perform any autoconfiguration + * steps required for the UART port. This function sets the port->type field. + * + * @param port the port structure for the UART passed in by the core driver + * @param flags bit mask of the required configuration + */ +static void mxcuart_config_port(struct uart_port *port, int flags) +{ + if ((flags & UART_CONFIG_TYPE) && (mxcuart_request_port(port) == 0)) { + port->type = PORT_IMX; + } +} + +/*! + * This function is called by the core driver to verify that the new serial + * port information contained within \a ser is suitable for this UART port type. + * The function checks to see if the UART port type specified by the user + * application while setting the UART port information matches what is stored + * in the define \b PORT_MXC found in the header file include/linux/serial_core.h + * + * @param port the port structure for the UART passed in by the core driver + * @param ser the new serial port information + * + * @return The function returns 0 on success or \b -EINVAL if the port type + * specified is not equal to \b PORT_MXC. + */ +static int mxcuart_verify_port(struct uart_port *port, + struct serial_struct *ser) +{ + int ret = 0; + if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) { + ret = -EINVAL; + } + return ret; +} + +/*! + * This function is used to send a high priority XON/XOFF character + * + * @param port the port structure for the UART passed in by the core driver + * @param ch the character to send + */ +static void mxcuart_send_xchar(struct uart_port *port, char ch) +{ + unsigned long flags; + + port->x_char = ch; + if (port->info->port.tty->hw_stopped) { + return; + } + + if (ch) { + spin_lock_irqsave(&port->lock, flags); + port->ops->start_tx(port); + spin_unlock_irqrestore(&port->lock, flags); + } +} + +/*! + * This function is used enable/disable the MXC UART clocks + * + * @param port the port structure for the UART passed in by the core driver + * @param state New PM state + * @param oldstate Current PM state + */ +static void +mxcuart_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) +{ + uart_mxc_port *umxc = (uart_mxc_port *) port; + + if (state) + clk_disable(umxc->clk); + else + clk_enable(umxc->clk); +} + +/*! + * This structure contains the pointers to the control functions that are + * invoked by the core serial driver to access the UART hardware. The + * structure is passed to serial_core.c file during registration. + */ +static struct uart_ops mxc_ops = { + .tx_empty = mxcuart_tx_empty, + .set_mctrl = mxcuart_set_mctrl, + .get_mctrl = mxcuart_get_mctrl, + .stop_tx = mxcuart_stop_tx, + .start_tx = mxcuart_start_tx, + .stop_rx = mxcuart_stop_rx, + .enable_ms = mxcuart_enable_ms, + .break_ctl = mxcuart_break_ctl, + .startup = mxcuart_startup, + .shutdown = mxcuart_shutdown, + .set_termios = mxcuart_set_termios, + .type = mxcuart_type, + .pm = mxcuart_pm, + .release_port = mxcuart_release_port, + .request_port = mxcuart_request_port, + .config_port = mxcuart_config_port, + .verify_port = mxcuart_verify_port, + .send_xchar = mxcuart_send_xchar, +}; + +#ifdef CONFIG_SERIAL_MXC_CONSOLE + +/* + * Write out a character once the UART is ready + */ +static inline void mxcuart_console_write_char(struct uart_port *port, char ch) +{ + volatile unsigned int status; + + do { + status = readl(port->membase + MXC_UARTUSR1); + } while ((status & MXC_UARTUSR1_TRDY) == 0); + writel(ch, port->membase + MXC_UARTUTXD); +} + +/*! + * This function is called to write the console messages through the UART port. + * + * @param co the console structure + * @param s the log message to be written to the UART + * @param count length of the message + */ +static void mxcuart_console_write(struct console *co, const char *s, + u_int count) +{ + struct uart_port *port = &mxc_ports[co->index]->port; + volatile unsigned int status, oldcr1, oldcr2, oldcr3, cr2, cr3; + int i; + + /* + * First save the control registers and then disable the interrupts + */ + oldcr1 = readl(port->membase + MXC_UARTUCR1); + oldcr2 = readl(port->membase + MXC_UARTUCR2); + oldcr3 = readl(port->membase + MXC_UARTUCR3); + cr2 = + oldcr2 & ~(MXC_UARTUCR2_ATEN | MXC_UARTUCR2_RTSEN | + MXC_UARTUCR2_ESCI); + cr3 = + oldcr3 & ~(MXC_UARTUCR3_DCD | MXC_UARTUCR3_RI | + MXC_UARTUCR3_DTRDEN); + writel(MXC_UARTUCR1_UARTEN, port->membase + MXC_UARTUCR1); + writel(cr2, port->membase + MXC_UARTUCR2); + writel(cr3, port->membase + MXC_UARTUCR3); + /* + * Do each character + */ + for (i = 0; i < count; i++) { + mxcuart_console_write_char(port, s[i]); + if (s[i] == '\n') { + mxcuart_console_write_char(port, '\r'); + } + } + /* + * Finally, wait for the transmitter to become empty + */ + do { + status = readl(port->membase + MXC_UARTUSR2); + } while (!(status & MXC_UARTUSR2_TXDC)); + + /* + * Restore the control registers + */ + writel(oldcr1, port->membase + MXC_UARTUCR1); + writel(oldcr2, port->membase + MXC_UARTUCR2); + writel(oldcr3, port->membase + MXC_UARTUCR3); +} + +/*! + * Initializes the UART port to be used to print console message with the + * options specified. If no options are specified, then the function + * initializes the UART with the default options of baudrate=115200, 8 bit + * word size, no parity, no flow control. + * + * @param co The console structure + * @param options Any console options passed in from the command line + * + * @return The function returns 0 on success or error. + */ +static int __init mxcuart_console_setup(struct console *co, char *options) +{ + uart_mxc_port *umxc; + int baud = 115200; + int bits = 8; + int parity = 'n'; + int flow = 'n'; + volatile unsigned int cr = 0; + + /* + * Check whether an invalid uart number had been specified, and if + * so, search for the first available port that does have console + * support + */ + if (co->index >= MXC_UART_NR) { + co->index = 0; + } + umxc = mxc_ports[co->index]; + + if (umxc == NULL) { + return -ENODEV; + } + + clk_enable(umxc->clk); + + /* initialize port.lock else oops */ + spin_lock_init(&umxc->port.lock); + + /* + * Initialize the UART registers + */ + writel(MXC_UARTUCR1_UARTEN, umxc->port.membase + MXC_UARTUCR1); + /* Enable the transmitter and do a software reset */ + writel(MXC_UARTUCR2_TXEN, umxc->port.membase + MXC_UARTUCR2); + /* Wait till we are out of software reset */ + do { + cr = readl(umxc->port.membase + MXC_UARTUCR2); + } while (!(cr & MXC_UARTUCR2_SRST)); + + writel(0x0, umxc->port.membase + MXC_UARTUCR3); + writel(0x0, umxc->port.membase + MXC_UARTUCR4); + /* Set TXTL to 2, RXTL to 1 and RFDIV to 2 */ + cr = 0x0800 | MXC_UARTUFCR_RFDIV | 0x1; + if (umxc->mode == MODE_DTE) { + cr |= MXC_UARTUFCR_DCEDTE; + } + writel(cr, umxc->port.membase + MXC_UARTUFCR); + writel(0xFFFF, umxc->port.membase + MXC_UARTUSR1); + writel(0xFFFF, umxc->port.membase + MXC_UARTUSR2); + + if (options != NULL) { + uart_parse_options(options, &baud, &parity, &bits, &flow); + } + gpio_uart_active(umxc->port.line, umxc->ir_mode); + return uart_set_options(&umxc->port, co, baud, parity, bits, flow); +} + +static struct uart_driver mxc_reg; + +/*! + * This structure contains the pointers to the UART console functions. It is + * passed as an argument when registering the console. + */ +static struct console mxc_console = { + .name = "ttymxc", + .write = mxcuart_console_write, + .device = uart_console_device, + .setup = mxcuart_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, + .data = &mxc_reg, +}; + +/*! + * This function registers the console callback functions with the kernel. + */ +static int __init mxcuart_console_init(void) +{ + register_console(&mxc_console); + return 0; +} + +console_initcall(mxcuart_console_init); + +static int __init find_port(struct uart_port *p) +{ + int line; + struct uart_port *port; + for (line = 0; line < MXC_UART_NR; line++) { + if (!mxc_ports[line]) + continue; + port = &mxc_ports[line]->port; + if (uart_match_port(p, port)) + return line; + } + return -ENODEV; +} + +int __init mxc_uart_start_console(struct uart_port *port, char *options) +{ + int line; + line = find_port(port); + if (line < 0) + return -ENODEV; + + add_preferred_console("ttymxc", line, options); + printk("Switching Console to ttymxc%d at %s 0x%lx (options '%s')\n", + line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port", + port->iotype == + UPIO_MEM ? (unsigned long)port->mapbase : (unsigned long)port-> + iobase, options); + + if (!(mxc_console.flags & CON_ENABLED)) { + mxc_console.flags &= ~CON_PRINTBUFFER; + register_console(&mxc_console); + } + return 0; +} + +#define MXC_CONSOLE &mxc_console +#else +#define MXC_CONSOLE NULL +#endif /* CONFIG_SERIAL_MXC_CONSOLE */ + +/*! + * This structure contains the information such as the name of the UART driver + * that appears in the /dev folder, major and minor numbers etc. This structure + * is passed to the serial_core.c file. + */ +static struct uart_driver mxc_reg = { + .owner = THIS_MODULE, + .driver_name = "ttymxc", + .dev_name = "ttymxc", + .major = SERIAL_MXC_MAJOR, + .minor = SERIAL_MXC_MINOR, + .nr = MXC_UART_NR, + .cons = MXC_CONSOLE, +}; + +/*! + * This function is called to put the UART in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which UART + * to suspend + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxcuart_suspend(struct platform_device *pdev, pm_message_t state) +{ + uart_mxc_port *umxc = platform_get_drvdata(pdev); + + if (umxc == NULL) + return 0; /* skip disabled ports */ + + if (umxc->port.info && umxc->port.info->flags & UIF_INITIALIZED) + uart_suspend_port(&mxc_reg, &umxc->port); + + if (umxc->port.info && umxc->port.info->flags & UIF_SUSPENDED) + umxc->port.info->port.tty->hw_stopped = 1; + + return 0; +} + +/*! + * This function is called to bring the UART back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which UART + * to resume + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxcuart_resume(struct platform_device *pdev) +{ + uart_mxc_port *umxc = platform_get_drvdata(pdev); + + if (umxc == NULL) + return 0; /* skip disabled ports */ + + if (umxc->port.info && umxc->port.info->flags & UIF_SUSPENDED) { + umxc->port.info->port.tty->hw_stopped = 0; + uart_resume_port(&mxc_reg, &umxc->port); + } + + return 0; +} + +/*! + * This function is called during the driver binding process. Based on the UART + * that is being probed this function adds the appropriate UART port structure + * in the core driver. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions + * + * @return The function returns 0 if successful; -1 otherwise. + */ +static int mxcuart_probe(struct platform_device *pdev) +{ + int id = pdev->id; + + mxc_ports[id] = pdev->dev.platform_data; + mxc_ports[id]->port.ops = &mxc_ops; + + /* Do not use UARTs that are disabled during integration */ + if (mxc_ports[id]->enabled == 1) { + mxc_ports[id]->port.dev = &pdev->dev; + spin_lock_init(&mxc_ports[id]->port.lock); + /* Enable the low latency flag for DMA UART ports */ + if (mxc_ports[id]->dma_enabled == 1) { + mxc_ports[id]->port.flags |= UPF_LOW_LATENCY; + } + + mxc_ports[id]->clk = clk_get(&pdev->dev, "uart_clk"); + if (mxc_ports[id]->clk == NULL) + return -1; + + uart_add_one_port(&mxc_reg, &mxc_ports[id]->port); + platform_set_drvdata(pdev, mxc_ports[id]); + } + return 0; +} + +/*! + * Dissociates the driver from the UART device. Removes the appropriate UART + * port structure from the core driver. + * + * @param pdev the device structure used to give information on which UART + * to remove + * + * @return The function always returns 0. + */ +static int mxcuart_remove(struct platform_device *pdev) +{ + uart_mxc_port *umxc = platform_get_drvdata(pdev); + + platform_set_drvdata(pdev, NULL); + + if (umxc) { + uart_remove_one_port(&mxc_reg, &umxc->port); + } + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcuart_driver = { + .driver = { + .name = "mxcintuart", + }, + .probe = mxcuart_probe, + .remove = mxcuart_remove, + .suspend = mxcuart_suspend, + .resume = mxcuart_resume, +}; + +/*! + * This function is used to initialize the UART driver module. The function + * registers the power management callback functions with the kernel and also + * registers the UART callback functions with the core serial driver. + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int __init mxcuart_init(void) +{ + int ret = 0; + + printk(KERN_INFO "Serial: MXC Internal UART driver\n"); + ret = uart_register_driver(&mxc_reg); + if (ret == 0) { + /* Register the device driver structure. */ + ret = platform_driver_register(&mxcuart_driver); + if (ret != 0) { + uart_unregister_driver(&mxc_reg); + } + } + return ret; +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxcuart_exit(void) +{ + platform_driver_unregister(&mxcuart_driver); + uart_unregister_driver(&mxc_reg); +} + +module_init(mxcuart_init); +module_exit(mxcuart_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC serial port driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/serial/Makefile +++ linux-fsl-imx51-2.6.31/drivers/serial/Makefile @@ -73,6 +73,10 @@ obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o obj-$(CONFIG_SERIAL_MSM) += msm_serial.o obj-$(CONFIG_SERIAL_NETX) += netx-serial.o +obj-$(CONFIG_SERIAL_MXC) += mxc_uart.o +obj-$(CONFIG_SERIAL_MXC_CONSOLE) += mxc_uart_early.o +obj-$(CONFIG_SERIAL_STMP_DBG) += stmp-dbg.o +obj-$(CONFIG_SERIAL_STMP_APP) += stmp-app.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o --- linux-fsl-imx51-2.6.31.orig/drivers/serial/sunzilog.c +++ linux-fsl-imx51-2.6.31/drivers/serial/sunzilog.c @@ -1180,7 +1180,7 @@ (sunzilog_reg.minor - 64) + con->index, con->index); /* Get firmware console settings. */ - sunserial_console_termios(con); + sunserial_console_termios(con, to_of_device(up->port.dev)->node); /* Firmware console speed is limited to 150-->38400 baud so * this hackish cflag thing is OK. @@ -1416,7 +1416,8 @@ if (!keyboard_mouse) { if (sunserial_console_match(SUNZILOG_CONSOLE(), op->node, - &sunzilog_reg, up[0].port.line)) + &sunzilog_reg, up[0].port.line, + false)) up->flags |= SUNZILOG_FLAG_IS_CONS; err = uart_add_one_port(&sunzilog_reg, &up[0].port); if (err) { @@ -1425,7 +1426,8 @@ return err; } if (sunserial_console_match(SUNZILOG_CONSOLE(), op->node, - &sunzilog_reg, up[1].port.line)) + &sunzilog_reg, up[1].port.line, + false)) up->flags |= SUNZILOG_FLAG_IS_CONS; err = uart_add_one_port(&sunzilog_reg, &up[1].port); if (err) { --- linux-fsl-imx51-2.6.31.orig/drivers/serial/sunsu.c +++ linux-fsl-imx51-2.6.31/drivers/serial/sunsu.c @@ -1329,11 +1329,9 @@ */ static int __init sunsu_console_setup(struct console *co, char *options) { + static struct ktermios dummy; + struct ktermios termios; struct uart_port *port; - int baud = 9600; - int bits = 8; - int parity = 'n'; - int flow = 'n'; printk("Console: ttyS%d (SU)\n", (sunsu_reg.minor - 64) + co->index); @@ -1352,10 +1350,15 @@ */ spin_lock_init(&port->lock); - if (options) - uart_parse_options(options, &baud, &parity, &bits, &flow); + /* Get firmware console settings. */ + sunserial_console_termios(co, to_of_device(port->dev)->node); - return uart_set_options(port, co, baud, parity, bits, flow); + memset(&termios, 0, sizeof(struct ktermios)); + termios.c_cflag = co->cflag; + port->mctrl |= TIOCM_DTR; + port->ops->set_termios(port, &termios, &dummy); + + return 0; } static struct console sunsu_console = { @@ -1409,6 +1412,7 @@ struct uart_sunsu_port *up; struct resource *rp; enum su_type type; + bool ignore_line; int err; type = su_get_type(dp); @@ -1467,8 +1471,14 @@ up->port.ops = &sunsu_pops; + ignore_line = false; + if (!strcmp(dp->name, "rsc-console") || + !strcmp(dp->name, "lom-console")) + ignore_line = true; + sunserial_console_match(SUNSU_CONSOLE(), dp, - &sunsu_reg, up->port.line); + &sunsu_reg, up->port.line, + ignore_line); err = uart_add_one_port(&sunsu_reg, &up->port); if (err) goto out_unmap; @@ -1517,6 +1527,10 @@ .name = "serial", .compatible = "su", }, + { + .type = "serial", + .compatible = "su", + }, {}, }; MODULE_DEVICE_TABLE(of, su_match); @@ -1546,6 +1560,12 @@ if (of_device_is_compatible(dp, "su")) { if (su_get_type(dp) == SU_PORT_PORT) num_uart++; + } + } + for_each_node_by_type(dp, "serial") { + if (of_device_is_compatible(dp, "su")) { + if (su_get_type(dp) == SU_PORT_PORT) + num_uart++; } } --- linux-fsl-imx51-2.6.31.orig/drivers/serial/suncore.c +++ linux-fsl-imx51-2.6.31/drivers/serial/suncore.c @@ -53,20 +53,21 @@ EXPORT_SYMBOL(sunserial_unregister_minors); int sunserial_console_match(struct console *con, struct device_node *dp, - struct uart_driver *drv, int line) + struct uart_driver *drv, int line, bool ignore_line) { - int off; - if (!con || of_console_device != dp) return 0; - off = 0; - if (of_console_options && - *of_console_options == 'b') - off = 1; + if (!ignore_line) { + int off = 0; - if ((line & 1) != off) - return 0; + if (of_console_options && + *of_console_options == 'b') + off = 1; + + if ((line & 1) != off) + return 0; + } con->index = line; drv->cons = con; @@ -76,23 +77,24 @@ } EXPORT_SYMBOL(sunserial_console_match); -void -sunserial_console_termios(struct console *con) +void sunserial_console_termios(struct console *con, struct device_node *uart_dp) { - struct device_node *dp; - const char *od, *mode, *s; + const char *mode, *s; char mode_prop[] = "ttyX-mode"; int baud, bits, stop, cflag; char parity; - dp = of_find_node_by_path("/options"); - od = of_get_property(dp, "output-device", NULL); - if (!strcmp(od, "rsc")) { - mode = of_get_property(of_console_device, + if (!strcmp(uart_dp->name, "rsc") || + !strcmp(uart_dp->name, "rsc-console") || + !strcmp(uart_dp->name, "rsc-control")) { + mode = of_get_property(uart_dp, "ssp-console-modes", NULL); if (!mode) mode = "115200,8,n,1,-"; + } else if (!strcmp(uart_dp->name, "lom-console")) { + mode = "9600,8,n,1,-"; } else { + struct device_node *dp; char c; c = 'a'; @@ -101,6 +103,7 @@ mode_prop[3] = c; + dp = of_find_node_by_path("/options"); mode = of_get_property(dp, mode_prop, NULL); if (!mode) mode = "9600,8,n,1,-"; --- linux-fsl-imx51-2.6.31.orig/drivers/serial/8250.c +++ linux-fsl-imx51-2.6.31/drivers/serial/8250.c @@ -942,6 +942,10 @@ * Check for presence of the EFR when DLAB is set. * Only ST16C650V1 UARTs pass this test. */ +#ifndef CONFIG_ARCH_MXC + /* This test fails as EFR reads 0, but our uart requires LCR=0xBF + * to access EFR. + */ serial_outp(up, UART_LCR, UART_LCR_DLAB); if (serial_in(up, UART_EFR) == 0) { serial_outp(up, UART_EFR, 0xA8); @@ -955,6 +959,7 @@ serial_outp(up, UART_EFR, 0); return; } +#endif /* * Maybe it requires 0xbf to be written to the LCR. @@ -1337,14 +1342,12 @@ serial_out(up, UART_IER, up->ier); if (up->bugs & UART_BUG_TXEN) { - unsigned char lsr, iir; + unsigned char lsr; lsr = serial_in(up, UART_LSR); up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; - iir = serial_in(up, UART_IIR) & 0x0f; if ((up->port.type == PORT_RM9000) ? - (lsr & UART_LSR_THRE && - (iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) : - (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)) + (lsr & UART_LSR_THRE) : + (lsr & UART_LSR_TEMT)) transmit_chars(up); } } @@ -1477,7 +1480,12 @@ count = up->tx_loadsz; do { +#ifdef CONFIG_ARCH_MXC + /* Seems like back-to-back accesses are a problem */ + serial_out_sync(up, UART_TX, xmit->buf[xmit->tail]); +#else serial_out(up, UART_TX, xmit->buf[xmit->tail]); +#endif xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); up->port.icount.tx++; if (uart_circ_empty(xmit)) --- linux-fsl-imx51-2.6.31.orig/drivers/serial/stmp-dbg.h +++ linux-fsl-imx51-2.6.31/drivers/serial/stmp-dbg.h @@ -0,0 +1,180 @@ +/* + * Freescale STMP37XX/STMP378X Debug UART driver + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __STMP_DBG_H +#define __STMP_DBG_H +/* + * UART register offsets + */ +#define UART01x_DR 0x00 /* Data read or written */ +#define UART01x_RSR 0x04 /* Receive status register */ +#define UART01x_ECR 0x04 /* Error clear register (write) */ +#define UART010_LCRH 0x08 /* Line control register, MSB */ +#define UART010_LCRM 0x0C /* Line control register, */ +#define UART010_LCRL 0x10 /* Line control register, LSB */ +#define UART010_CR 0x14 /* Control register. */ +#define UART01x_FR 0x18 /* Flag register (Read only). */ +#define UART010_IIR 0x1C /* Interrupt identification */ +#define UART010_ICR 0x1C /* Interrupt clear register */ +#define UART01x_ILPR 0x20 /* IrDA low power counter */ +#define UART011_IBRD 0x24 /* Integer baud rate divisor */ +#define UART011_FBRD 0x28 /* Fractional baud rate divisor */ +#define UART011_LCRH 0x2c /* Line control */ +#define UART011_CR 0x30 /* Control */ +#define UART011_IFLS 0x34 /* Interrupt fifo level select */ +#define UART011_IMSC 0x38 /* Interrupt mask */ +#define UART011_RIS 0x3c /* Raw */ +#define UART011_MIS 0x40 /* Masked */ +#define UART011_ICR 0x44 /* Interrupt clear register */ +#define UART011_DMACR 0x48 /* DMA control register */ + +#define UART011_DR_OE (1 << 11) +#define UART011_DR_BE (1 << 10) +#define UART011_DR_PE (1 << 9) +#define UART011_DR_FE (1 << 8) + +#define UART01x_RSR_OE 0x08 +#define UART01x_RSR_BE 0x04 +#define UART01x_RSR_PE 0x02 +#define UART01x_RSR_FE 0x01 + +#define UART011_FR_RI 0x100 +#define UART011_FR_TXFE 0x080 +#define UART011_FR_RXFF 0x040 +#define UART01x_FR_TXFF 0x020 +#define UART01x_FR_RXFE 0x010 +#define UART01x_FR_BUSY 0x008 +#define UART01x_FR_DCD 0x004 +#define UART01x_FR_DSR 0x002 +#define UART01x_FR_CTS 0x001 +#define UART01x_FR_TMSK (UART01x_FR_TXFF + UART01x_FR_BUSY) + +#define UART011_CR_CTSEN 0x8000 /* CTS hardware flow control */ +#define UART011_CR_RTSEN 0x4000 /* RTS hardware flow control */ +#define UART011_CR_OUT2 0x2000 /* OUT2 */ +#define UART011_CR_OUT1 0x1000 /* OUT1 */ +#define UART011_CR_RTS 0x0800 /* RTS */ +#define UART011_CR_DTR 0x0400 /* DTR */ +#define UART011_CR_RXE 0x0200 /* receive enable */ +#define UART011_CR_TXE 0x0100 /* transmit enable */ +#define UART011_CR_LBE 0x0080 /* loopback enable */ +#define UART010_CR_RTIE 0x0040 +#define UART010_CR_TIE 0x0020 +#define UART010_CR_RIE 0x0010 +#define UART010_CR_MSIE 0x0008 +#define UART01x_CR_IIRLP 0x0004 /* SIR low power mode */ +#define UART01x_CR_SIREN 0x0002 /* SIR enable */ +#define UART01x_CR_UARTEN 0x0001 /* UART enable */ + +#define UART011_LCRH_SPS 0x80 +#define UART01x_LCRH_WLEN_8 0x60 +#define UART01x_LCRH_WLEN_7 0x40 +#define UART01x_LCRH_WLEN_6 0x20 +#define UART01x_LCRH_WLEN_5 0x00 +#define UART01x_LCRH_FEN 0x10 +#define UART01x_LCRH_STP2 0x08 +#define UART01x_LCRH_EPS 0x04 +#define UART01x_LCRH_PEN 0x02 +#define UART01x_LCRH_BRK 0x01 + +#define UART010_IIR_RTIS 0x08 +#define UART010_IIR_TIS 0x04 +#define UART010_IIR_RIS 0x02 +#define UART010_IIR_MIS 0x01 + +#define UART011_IFLS_RX1_8 (0 << 3) +#define UART011_IFLS_RX2_8 (1 << 3) +#define UART011_IFLS_RX4_8 (2 << 3) +#define UART011_IFLS_RX6_8 (3 << 3) +#define UART011_IFLS_RX7_8 (4 << 3) +#define UART011_IFLS_TX1_8 (0 << 0) +#define UART011_IFLS_TX2_8 (1 << 0) +#define UART011_IFLS_TX4_8 (2 << 0) +#define UART011_IFLS_TX6_8 (3 << 0) +#define UART011_IFLS_TX7_8 (4 << 0) + +/* Interrupt masks */ +#define UART011_OEIM (1 << 10) /* overrun error */ +#define UART011_BEIM (1 << 9) /* break error */ +#define UART011_PEIM (1 << 8) /* parity error */ +#define UART011_FEIM (1 << 7) /* framing error */ +#define UART011_RTIM (1 << 6) /* receive timeout */ +#define UART011_TXIM (1 << 5) /* transmit */ +#define UART011_RXIM (1 << 4) /* receive */ +#define UART011_DSRMIM (1 << 3) /* DSR interrupt mask */ +#define UART011_DCDMIM (1 << 2) /* DCD interrupt mask */ +#define UART011_CTSMIM (1 << 1) /* CTS interrupt mask */ +#define UART011_RIMIM (1 << 0) /* RI interrupt mask */ + +/* Interrupt statuses */ +#define UART011_OEIS (1 << 10) /* overrun error */ +#define UART011_BEIS (1 << 9) /* break error */ +#define UART011_PEIS (1 << 8) /* parity error */ +#define UART011_FEIS (1 << 7) /* framing error */ +#define UART011_RTIS (1 << 6) /* receive timeout */ +#define UART011_TXIS (1 << 5) /* transmit */ +#define UART011_RXIS (1 << 4) /* receive */ +#define UART011_DSRMIS (1 << 3) /* DSR */ +#define UART011_DCDMIS (1 << 2) /* DCD */ +#define UART011_CTSMIS (1 << 1) /* CTS */ +#define UART011_RIMIS (1 << 0) /* RI */ + +/* Interrupt clear masks */ +#define UART011_OEIC (1 << 10) /* overrun error */ +#define UART011_BEIC (1 << 9) /* break error */ +#define UART011_PEIC (1 << 8) /* parity error */ +#define UART011_FEIC (1 << 7) /* framing error */ +#define UART011_RTIC (1 << 6) /* receive timeout */ +#define UART011_TXIC (1 << 5) /* transmit */ +#define UART011_RXIC (1 << 4) /* receive */ +#define UART011_DSRMIC (1 << 3) /* DSR */ +#define UART011_DCDMIC (1 << 2) /* DCD */ +#define UART011_CTSMIC (1 << 1) /* CTS */ +#define UART011_RIMIC (1 << 0) /* RI */ + +#define UART011_DMAONERR (1 << 2) /* disable dma on error */ +#define UART011_TXDMAE (1 << 1) /* enable transmit dma */ +#define UART011_RXDMAE (1 << 0) /* enable receive dma */ + +#define UART01x_RSR_ANY (UART01x_RSR_OE | UART01x_RSR_BE | \ + UART01x_RSR_PE | UART01x_RSR_FE) +#define UART01x_FR_MODEM_ANY (UART01x_FR_DCD | UART01x_FR_DSR | \ + UART01x_FR_CTS) + +/* + * Access macros for the AMBA UARTs + */ +#define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR) +#define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR) +#define UART_GET_FR(p) readb((p)->membase + UART01x_FR) +#define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR) +#define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR) +#define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR) +#define UART_GET_CR(p) readb((p)->membase + UART010_CR) +#define UART_PUT_CR(p, c) writel((c), (p)->membase + UART010_CR) +#define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL) +#define UART_PUT_LCRL(p, c) writel((c), (p)->membase + UART010_LCRL) +#define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM) +#define UART_PUT_LCRM(p, c) writel((c), (p)->membase + UART010_LCRM) +#define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH) +#define UART_PUT_LCRH(p, c) writel((c), (p)->membase + UART010_LCRH) +#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) +#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) +#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0) + +#define UART_DUMMY_RSR_RX /*256*/0 +#define UART_PORT_SIZE 64 + +#endif /* STMP_DBG_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/leds/leds-stmp378x-pwm.c +++ linux-fsl-imx51-2.6.31/drivers/leds/leds-stmp378x-pwm.c @@ -0,0 +1,190 @@ +/* + * Freescale STMP378X PWM LED driver + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Up to 5 PWM lines are available. */ +#define PWM_MAX 5 + +/* PWM enables are the lowest PWM_MAX bits of HW_PWM_CTRL register */ +#define BM_PWM_CTRL_PWM_ENABLE(n) ((1<<(n)) & ((1<<(PWM_MAX))-1)) +#define BF_PWM_PERIODn_SETTINGS \ + (BF_PWM_PERIODn_CDIV(5) | /* divide by 64 */ \ + BF_PWM_PERIODn_INACTIVE_STATE(2) | /* low */ \ + BF_PWM_PERIODn_ACTIVE_STATE(3) | /* high */ \ + BF_PWM_PERIODn_PERIOD(LED_FULL)) /* 255 cycles */ + +struct stmp378x_led { + struct led_classdev led_dev; + int in_use; +}; + +static struct stmp378x_led leds[PWM_MAX]; + +static struct clk *pwm_clk; + +static void stmp378x_pwm_led_brightness_set(struct led_classdev *pled, + enum led_brightness value) +{ + unsigned int pwmn; + + pwmn = container_of(pled, struct stmp378x_led, led_dev) - leds; + + if (pwmn < PWM_MAX && leds[pwmn].in_use) { + HW_PWM_CTRL_CLR(BM_PWM_CTRL_PWM_ENABLE(pwmn)); + HW_PWM_ACTIVEn_WR(pwmn, BF_PWM_ACTIVEn_INACTIVE(value) | + BF_PWM_ACTIVEn_ACTIVE(0)); + HW_PWM_PERIODn_WR(pwmn, BF_PWM_PERIODn_SETTINGS); + HW_PWM_CTRL_SET(BM_PWM_CTRL_PWM_ENABLE(pwmn)); + } +} + +static int stmp378x_pwm_led_probe(struct platform_device *pdev) +{ + struct led_classdev *led; + unsigned int pwmn; + int leds_in_use = 0, rc = 0; + int i; + + stmp3xxx_reset_block(REGS_PWM_BASE, 1); + + pwm_clk = clk_get(&pdev->dev, "pwm"); + if (IS_ERR(pwm_clk)) { + rc = PTR_ERR(pwm_clk); + return rc; + } + + clk_enable(pwm_clk); + + for (i = 0; i < pdev->num_resources; i++) { + + if (pdev->resource[i].flags & IORESOURCE_DISABLED) + continue; + + pwmn = pdev->resource[i].start; + if (pwmn >= PWM_MAX) { + dev_err(&pdev->dev, "PWM %d doesn't exist\n", pwmn); + continue; + } + + rc = pwm_led_pinmux_request(pwmn, "stmp378x_pwm_led"); + if (rc) { + dev_err(&pdev->dev, + "PWM %d is not available (err=%d)\n", + pwmn, rc); + continue; + } + + led = &leds[pwmn].led_dev; + + led->flags = pdev->resource[i].flags; + led->name = pdev->resource[i].name; + led->brightness = LED_HALF; + led->flags = 0; + led->brightness_set = stmp378x_pwm_led_brightness_set; + led->default_trigger = 0; + + rc = led_classdev_register(&pdev->dev, led); + if (rc < 0) { + dev_err(&pdev->dev, + "Unable to register LED device %d (err=%d)\n", + pwmn, rc); + pwm_led_pinmux_free(pwmn, "stmp378x_pwm_led"); + continue; + } + + /* PWM LED is available now */ + leds[pwmn].in_use = !0; + leds_in_use++; + + /* Set default brightness */ + stmp378x_pwm_led_brightness_set(led, LED_HALF); + } + + if (leds_in_use == 0) { + dev_info(&pdev->dev, "No PWM LEDs available\n"); + clk_disable(pwm_clk); + clk_put(pwm_clk); + return -ENODEV; + } + + return 0; +} + +static int stmp378x_pwm_led_remove(struct platform_device *pdev) +{ + unsigned int pwmn; + + for (pwmn = 0; pwmn < PWM_MAX; pwmn++) { + + if (!leds[pwmn].in_use) + continue; + + /* Disable LED */ + HW_PWM_CTRL_CLR(BM_PWM_CTRL_PWM_ENABLE(pwmn)); + HW_PWM_ACTIVEn_WR(pwmn, BF_PWM_ACTIVEn_INACTIVE(0) | + BF_PWM_ACTIVEn_ACTIVE(0)); + HW_PWM_PERIODn_WR(pwmn, BF_PWM_PERIODn_SETTINGS); + + led_classdev_unregister(&leds[pwmn].led_dev); + pwm_led_pinmux_free(pwmn, "stmp378x_pwm_led"); + + leds[pwmn].led_dev.name = 0; + leds[pwmn].in_use = 0; + } + + clk_disable(pwm_clk); + clk_put(pwm_clk); + + return 0; +} + + +static struct platform_driver stmp378x_pwm_led_driver = { + .probe = stmp378x_pwm_led_probe, + .remove = stmp378x_pwm_led_remove, + .driver = { + .name = "stmp378x-pwm-led", + }, +}; + +static int __init stmp378x_pwm_led_init(void) +{ + return platform_driver_register(&stmp378x_pwm_led_driver); +} + +static void __exit stmp378x_pwm_led_exit(void) +{ + platform_driver_unregister(&stmp378x_pwm_led_driver); +} + +module_init(stmp378x_pwm_led_init); +module_exit(stmp378x_pwm_led_exit); + +MODULE_AUTHOR("Drew Benedetti "); +MODULE_DESCRIPTION("STMP378X PWM LED driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/leds/leds-mc13892.c +++ linux-fsl-imx51-2.6.31/drivers/leds/leds-mc13892.c @@ -0,0 +1,168 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +#define LED_NAME_LEN 16 + +struct mc13892_led { + char name[LED_NAME_LEN]; + enum lit_channel channel; + int brightness; + struct work_struct work; + struct led_classdev cdev; +}; + +static void mc13892_led_work(struct work_struct *work) +{ + struct mc13892_led *led = container_of(work, struct mc13892_led, work); + + /* set current with medium value, in case current is too large */ + mc13892_bklit_set_current(led->channel, LIT_CURR_12); + /* max duty cycle is 63, brightness needs to be divided by 4 */ + mc13892_bklit_set_dutycycle(led->channel, led->brightness / 4); +} + + +static void mc13892_led_set(struct led_classdev *led_cdev, + enum led_brightness value) +{ + struct mc13892_led *led = container_of(led_cdev, + struct mc13892_led, cdev); + led->brightness = value; + schedule_work(&led->work); +} + +static int mc13892_led_remove(struct platform_device *dev) +{ + struct mc13892_led *led = platform_get_drvdata(dev); + + led_classdev_unregister(&led->cdev); + flush_work(&led->work); + kfree(led); + + return 0; +} + +static enum lit_channel mc13892_led_channel(int id) +{ + switch (id) { + case 'r': + return LIT_RED; + case 'g': + return LIT_GREEN; + case 'b': + return LIT_BLUE; + default: + return -1; + } +} + +static int mc13892_led_probe(struct platform_device *dev) +{ + struct mc13892_led *led; + enum lit_channel chan; + int ret; + + /* ensure we have space for the channel name and a NUL */ + if (strlen(dev->name) > LED_NAME_LEN - 2) { + dev_err(&dev->dev, "led name is too long\n"); + return -EINVAL; + } + + chan = mc13892_led_channel(dev->id); + if (chan == -1) { + dev_err(&dev->dev, "invalid LED id '%d'\n", dev->id); + return -EINVAL; + } + + led = kzalloc(sizeof(*led), GFP_KERNEL); + if (!led) { + dev_err(&dev->dev, "No memory for device\n"); + return -ENOMEM; + } + + led->channel = chan; + led->cdev.name = led->name; + led->cdev.brightness_set = mc13892_led_set; + INIT_WORK(&led->work, mc13892_led_work); + snprintf(led->name, sizeof(led->name), "%s%c", + dev->name, (char)dev->id); + + ret = led_classdev_register(&dev->dev, &led->cdev); + if (ret < 0) { + dev_err(&dev->dev, "led_classdev_register failed\n"); + goto err_free; + } + + platform_set_drvdata(dev, led); + + return 0; +err_free: + kfree(led); + return ret; +} + +#ifdef CONFIG_PM +static int mc13892_led_suspend(struct platform_device *dev, pm_message_t state) +{ + struct mc13892_led *led = platform_get_drvdata(dev); + + led_classdev_suspend(&led->cdev); + return 0; +} + +static int mc13892_led_resume(struct platform_device *dev) +{ + struct mc13892_led *led = platform_get_drvdata(dev); + + led_classdev_resume(&led->cdev); + return 0; +} +#else +#define mc13892_led_suspend NULL +#define mc13892_led_resume NULL +#endif + +static struct platform_driver mc13892_led_driver = { + .probe = mc13892_led_probe, + .remove = mc13892_led_remove, + .suspend = mc13892_led_suspend, + .resume = mc13892_led_resume, + .driver = { + .name = "pmic_leds", + .owner = THIS_MODULE, + }, +}; + +static int __init mc13892_led_init(void) +{ + return platform_driver_register(&mc13892_led_driver); +} + +static void __exit mc13892_led_exit(void) +{ + platform_driver_unregister(&mc13892_led_driver); +} + +module_init(mc13892_led_init); +module_exit(mc13892_led_exit); + +MODULE_DESCRIPTION("Led driver for PMIC mc13892"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/leds/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/leds/Kconfig @@ -17,6 +17,14 @@ comment "LED drivers" +config LEDS_STMP378X + tristate "Support for PWM LEDs on STMP378X" + depends on LEDS_CLASS && MACH_STMP378X + help + This option enables support for the LEDs connected to PWM + outputs on the Freescale STMP378X. + + config LEDS_ATMEL_PWM tristate "LED Support using Atmel PWM outputs" depends on LEDS_CLASS && ATMEL_PWM @@ -24,6 +32,10 @@ This option enables support for LEDs driven using outputs of the dedicated PWM controller found on newer Atmel SOCs. +config LEDS_MC13892 + tristate "LED Support for mc13892 pmic" + depends on LEDS_CLASS && MXC_MC13892_LIGHT + config LEDS_LOCOMO tristate "LED Support for Locomo device" depends on LEDS_CLASS && SHARP_LOCOMO --- linux-fsl-imx51-2.6.31.orig/drivers/leds/Makefile +++ linux-fsl-imx51-2.6.31/drivers/leds/Makefile @@ -7,6 +7,8 @@ # LED Platform Drivers obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o obj-$(CONFIG_LEDS_BD2802) += leds-bd2802.o +obj-$(CONFIG_LEDS_MC13892) += leds-mc13892.o +obj-$(CONFIG_LEDS_STMP378X) += leds-stmp378x-pwm.o obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o obj-$(CONFIG_LEDS_MIKROTIK_RB532) += leds-rb532.o obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o --- linux-fsl-imx51-2.6.31.orig/drivers/video/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/video/Kconfig @@ -381,6 +381,10 @@ Say Y to enable the Framebuffer driver for the CLPS7111 and EP7212 processors. +if ARCH_MXC +source "drivers/video/mxc/Kconfig" +endif + config FB_SA1100 bool "SA-1100 LCD support" depends on (FB = y) && ARM && ARCH_SA1100 @@ -686,8 +690,8 @@ If unsure, say N. config FB_VESA - bool "VESA VGA graphics support" - depends on (FB = y) && X86 + tristate "VESA VGA graphics support" + depends on FB && X86 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -1978,6 +1982,16 @@ ---help--- Say Y here to enable support for PNX4008 RGB Framebuffer +config FB_STMP37XX + tristate "STMP 37XX LCD Framebuffer driver" + depends on FB && (ARCH_STMP37XX || ARCH_STMP378X) + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Say Y here to enable support for the framebuffer driver for the + Sigmatel STMP37XX board. + config FB_IBM_GXT4500 tristate "Framebuffer support for IBM GXT4500P adaptor" depends on FB && PPC --- linux-fsl-imx51-2.6.31.orig/drivers/video/stmp37xxfb.c +++ linux-fsl-imx51-2.6.31/drivers/video/stmp37xxfb.c @@ -0,0 +1,964 @@ +/* + * Freescale STMP37XX/STMP378X framebuffer driver + * + * Author: Vitaly Wool + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#define NUM_SCREENS 1 + +enum { + F_DISABLE = 0, + F_ENABLE, + F_REENABLE, +}; + +struct stmp3xxx_fb_data { + struct fb_info info; + struct stmp3xxx_platform_fb_data *pdata; + struct work_struct work; + struct mutex blank_mutex; + u32 state; + u32 task_state; + ssize_t mem_size; + ssize_t map_size; + dma_addr_t phys_start; + dma_addr_t cur_phys; + int dma_irq; + int err_irq; + void *virt_start; + struct device *dev; + wait_queue_head_t vsync_wait_q; + u32 vsync_count; + void *par; +}; + +/* forward declaration */ +static int stmp3xxxfb_blank(int blank, struct fb_info *info); +static unsigned char *default_panel_name; +static struct stmp3xxx_fb_data *cdata; +static void init_timings(struct stmp3xxx_fb_data *data); + +static void stmp3xxxfb_enable_controller(struct stmp3xxx_fb_data *data) +{ + struct stmp3xxx_platform_fb_entry *pentry = data->pdata->cur; + + if (!data || !data->pdata || !data->pdata->cur) + return; + + stmp3xxx_init_lcdif(); + init_timings(data); + pentry->init_panel(data->dev, data->phys_start, + data->info.fix.smem_len, data->pdata->cur); + pentry->run_panel(); + + if (pentry->blank_panel) + pentry->blank_panel(FB_BLANK_UNBLANK); +} + +static void stmp3xxxfb_disable_controller(struct stmp3xxx_fb_data *data) +{ + struct stmp3xxx_platform_fb_entry *pentry = data->pdata->cur; + + if (!data || !data->pdata || !data->pdata->cur) + return; + + if (pentry->blank_panel) + pentry->blank_panel(FB_BLANK_POWERDOWN); + + if (pentry->stop_panel) + pentry->stop_panel(); + pentry->release_panel(data->dev, pentry); +} + +static void set_controller_state(struct stmp3xxx_fb_data *data, u32 state) +{ + struct stmp3xxx_platform_fb_entry *pentry = data->pdata->cur; + struct fb_info *info = &data->info; + u32 old_state; + + mutex_lock(&data->blank_mutex); + old_state = data->state; + pr_debug("%s, old_state %d, state %d\n", __func__, old_state, state); + + switch (state) { + case F_DISABLE: + /* + * Disable controller + */ + if (old_state != F_DISABLE) { + data->state = F_DISABLE; + stmp3xxxfb_disable_controller(data); + } + break; + + case F_REENABLE: + /* + * Re-enable the controller when panel changed. + */ + if (old_state == F_ENABLE) { + stmp3xxxfb_disable_controller(data); + + pentry = data->pdata->cur = data->pdata->next; + info->fix.smem_len = pentry->y_res * pentry->x_res * + pentry->bpp / 8; + info->screen_size = info->fix.smem_len; + memset((void *)info->screen_base, 0, info->screen_size); + + stmp3xxxfb_enable_controller(data); + + data->state = F_ENABLE; + } else if (old_state == F_DISABLE) { + pentry = data->pdata->cur = data->pdata->next; + info->fix.smem_len = pentry->y_res * pentry->x_res * + pentry->bpp / 8; + info->screen_size = info->fix.smem_len; + memset((void *)info->screen_base, 0, info->screen_size); + + data->state = F_DISABLE; + } + break; + + case F_ENABLE: + if (old_state != F_ENABLE) { + data->state = F_ENABLE; + stmp3xxxfb_enable_controller(data); + } + break; + } + mutex_unlock(&data->blank_mutex); + +} + +static void stmp3xxxfb_task(struct work_struct *work) +{ + struct stmp3xxx_fb_data *data = + container_of(work, struct stmp3xxx_fb_data, work); + + u32 state = xchg(&data->task_state, -1); + pr_debug("%s: state = %d, data->task_state = %d\n", + __func__, state, data->task_state); + + set_controller_state(data, state); +} + +static void stmp3xxx_schedule_work(struct stmp3xxx_fb_data *data, u32 state) +{ + unsigned long flags; + + local_irq_save(flags); + + data->task_state = state; + schedule_work(&data->work); + + local_irq_restore(flags); +} + +static irqreturn_t lcd_irq_handler(int irq, void *dev_id) +{ + struct stmp3xxx_fb_data *data = dev_id; + u32 status_lcd = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + u32 status_apbh = __raw_readl(REGS_APBH_BASE + HW_APBH_CTRL1); + pr_debug("%s: irq %d\n", __func__, irq); + + if (status_apbh & BM_APBH_CTRL1_CH0_CMDCMPLT_IRQ) + __raw_writel(BM_APBH_CTRL1_CH0_CMDCMPLT_IRQ, + REGS_APBH_BASE + HW_APBH_CTRL1_CLR); + + if (status_lcd & BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ) { + pr_debug("%s: VSYNC irq\n", __func__); + data->vsync_count++; + __raw_writel(BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR); + wake_up_interruptible(&data->vsync_wait_q); + } + if (status_lcd & BM_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ) { + pr_debug("%s: frame done irq\n", __func__); + __raw_writel(BM_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR); + data->vsync_count++; + } + if (status_lcd & BM_LCDIF_CTRL1_UNDERFLOW_IRQ) { + pr_debug("%s: underflow irq\n", __func__); + __raw_writel(BM_LCDIF_CTRL1_UNDERFLOW_IRQ, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR); + } + if (status_lcd & BM_LCDIF_CTRL1_OVERFLOW_IRQ) { + pr_debug("%s: overflow irq\n", __func__); + __raw_writel(BM_LCDIF_CTRL1_OVERFLOW_IRQ, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR); + } + return IRQ_HANDLED; +} + +static struct fb_var_screeninfo stmp3xxxfb_default __devinitdata = { + .activate = FB_ACTIVATE_TEST, + .height = -1, + .width = -1, + .pixclock = 20000, + .left_margin = 64, + .right_margin = 64, + .upper_margin = 32, + .lower_margin = 32, + .hsync_len = 64, + .vsync_len = 2, + .vmode = FB_VMODE_NONINTERLACED, +}; + +static struct fb_fix_screeninfo stmp3xxxfb_fix __devinitdata = { + .id = "stmp3xxxfb", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .xpanstep = 0, + .ypanstep = 0, + .ywrapstep = 0, + .accel = FB_ACCEL_NONE, +}; + +int stmp3xxxfb_get_info(struct fb_var_screeninfo *var, + struct fb_fix_screeninfo *fix) +{ + if (!cdata) + return -ENODEV; + + *var = cdata->info.var; + *fix = cdata->info.fix; + return 0; +} + +void stmp3xxxfb_cfg_pxp(int enable, dma_addr_t pxp_phys) +{ + if (enable) + cdata->pdata->cur->pan_display(pxp_phys); + else + cdata->pdata->cur->pan_display(cdata->cur_phys); +} + +static int stmp3xxxfb_mmap(struct fb_info *info, struct vm_area_struct *vma) +{ + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + + unsigned long off = vma->vm_pgoff << PAGE_SHIFT; + + if (off < info->fix.smem_len) + return dma_mmap_writecombine(data->dev, vma, + data->virt_start, + data->phys_start, + info->fix.smem_len); + else + return -EINVAL; +} + +static int stmp3xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info) +{ + if (regno >= 256) /* no. of hw registers */ + return 1; + /* + * Program hardware... do anything you want with transp + */ + + /* grayscale works only partially under directcolor */ + if (info->var.grayscale) { + /* grayscale = 0.30*R + 0.59*G + 0.11*B */ + red = green = blue = + (red * 77 + green * 151 + blue * 28) >> 8; + } + + /* Directcolor: + * var->{color}.offset contains start of bitfield + * var->{color}.length contains length of bitfield + * {hardwarespecific} contains width of RAMDAC + * cmap[X] is programmed to + * (X << red.offset) | (X << green.offset) | (X << blue.offset) + * RAMDAC[X] is programmed to (red, green, blue) + * + * Pseudocolor: + * uses offset = 0 && length = RAMDAC register width. + * var->{color}.offset is 0 + * var->{color}.length contains widht of DAC + * cmap is not used + * RAMDAC[X] is programmed to (red, green, blue) + * Truecolor: + * does not use DAC. Usually 3 are present. + * var->{color}.offset contains start of bitfield + * var->{color}.length contains length of bitfield + * cmap is programmed to + * (red << red.offset) | (green << green.offset) | + * (blue << blue.offset) | (transp << transp.offset) + * RAMDAC does not exist + */ +#define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16) + switch (info->fix.visual) { + case FB_VISUAL_TRUECOLOR: + case FB_VISUAL_PSEUDOCOLOR: + red = CNVT_TOHW(red, info->var.red.length); + green = CNVT_TOHW(green, info->var.green.length); + blue = CNVT_TOHW(blue, info->var.blue.length); + transp = CNVT_TOHW(transp, info->var.transp.length); + break; + case FB_VISUAL_DIRECTCOLOR: + red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */ + green = CNVT_TOHW(green, 8); + blue = CNVT_TOHW(blue, 8); + /* hey, there is bug in transp handling... */ + transp = CNVT_TOHW(transp, 8); + break; + } +#undef CNVT_TOHW + /* Truecolor has hardware independent palette */ + if (info->fix.visual == FB_VISUAL_TRUECOLOR) { + + if (regno >= 16) + return 1; + + ((u32 *) (info->pseudo_palette))[regno] = + (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset) | + (transp << info->var.transp.offset); + } + return 0; +} + +static inline u_long get_line_length(int xres_virtual, int bpp) +{ + u_long length; + + length = xres_virtual * bpp; + length = (length + 31) & ~31; + length >>= 3; + return length; +} + +static int get_matching_pentry(struct stmp3xxx_platform_fb_entry *pentry, + void *data, int ret_prev) +{ + struct fb_var_screeninfo *info = data; + pr_debug("%s: %d:%d:%d vs %d:%d:%d\n", __func__, + pentry->x_res, pentry->y_res, pentry->bpp, + info->yres, info->xres, info->bits_per_pixel); + if (pentry->x_res == info->yres && pentry->y_res == info->xres && + pentry->bpp == info->bits_per_pixel) + ret_prev = (int)pentry; + return ret_prev; +} + +static int get_matching_pentry_by_name( + struct stmp3xxx_platform_fb_entry *pentry, + void *data, + int ret_prev) +{ + unsigned char *name = data; + if (!strcmp(pentry->name, name)) + ret_prev = (int)pentry; + return ret_prev; +} + +/* + * This routine actually sets the video mode. It's in here where we + * the hardware state info->par and fix which can be affected by the + * change in par. For this driver it doesn't do much. + * + * XXX: REVISIT + */ +static int stmp3xxxfb_set_par(struct fb_info *info) +{ + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + struct stmp3xxx_platform_fb_data *pdata = data->pdata; + struct stmp3xxx_platform_fb_entry *pentry; + pentry = (void *)stmp3xxx_lcd_iterate_pdata(pdata, + get_matching_pentry, + &info->var); + + dev_dbg(data->dev, "%s: xres %d, yres %d, bpp %d\n", + __func__, + info->var.xres, + info->var.yres, + info->var.bits_per_pixel); + if (!pentry) + return -EINVAL; + + info->fix.line_length = get_line_length(info->var.xres_virtual, + info->var.bits_per_pixel); + + if (pentry == pdata->cur || !pdata->cur) + return 0; + + /* init next panel */ + pdata->next = pentry; + + set_controller_state(data, F_REENABLE); + + return 0; +} + +static int stmp3xxxfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + u32 line_length; + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + struct stmp3xxx_platform_fb_data *pdata = data->pdata; + + /* + * FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal! + * as FB_VMODE_SMOOTH_XPAN is only used internally + */ + + if (var->vmode & FB_VMODE_CONUPDATE) { + var->vmode |= FB_VMODE_YWRAP; + var->xoffset = info->var.xoffset; + var->yoffset = info->var.yoffset; + } + + pr_debug("%s: xres %d, yres %d, bpp %d\n", __func__, + var->xres, var->yres, var->bits_per_pixel); + /* + * Some very basic checks + */ + if (!var->xres) + var->xres = 1; + if (!var->yres) + var->yres = 1; + if (var->xres > var->xres_virtual) + var->xres_virtual = var->xres; + if (var->yres > var->yres_virtual) + var->yres_virtual = var->yres; + + if (var->xres_virtual < var->xoffset + var->xres) + var->xres_virtual = var->xoffset + var->xres; + if (var->yres_virtual < var->yoffset + var->yres) + var->yres_virtual = var->yoffset + var->yres; + + line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); + dev_dbg(data->dev, + "line_length %d, var->yres_virtual %d, data->mem_size %d\n", + line_length, var->yres_virtual, data->mem_size); + if (line_length * var->yres_virtual > data->map_size) + return -ENOMEM; + + if (!stmp3xxx_lcd_iterate_pdata(pdata, get_matching_pentry, var)) + return -EINVAL; + + if (var->bits_per_pixel == 16) { + /* RGBA 5551 */ + if (var->transp.length) { + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 5; + var->blue.offset = 10; + var->blue.length = 5; + var->transp.offset = 15; + var->transp.length = 1; + } else { /* RGB 565 */ + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 6; + var->blue.offset = 11; + var->blue.length = 5; + var->transp.offset = 0; + var->transp.length = 0; + } + } else { + var->red.offset = 16; + var->red.length = 8; + var->green.offset = 8; + var->green.length = 8; + var->blue.offset = 0; + var->blue.length = 8; + } + + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + + return 0; +} + + +static int stmp3xxxfb_wait_for_vsync(u32 channel, struct fb_info *info) +{ + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + u32 count = data->vsync_count; + int ret = 0; + + __raw_writel(BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_SET); + ret = wait_event_interruptible_timeout(data->vsync_wait_q, + count != data->vsync_count, HZ / 10); + __raw_writel(BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR); + if (!ret) { + dev_err(data->dev, "wait for vsync timed out\n"); + ret = -ETIMEDOUT; + } + return ret; +} + +static int stmp3xxxfb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg) +{ + u32 channel = 0; + int ret = -EINVAL; + + switch (cmd) { + case FBIO_WAITFORVSYNC: + if (!get_user(channel, (__u32 __user *) arg)) + ret = stmp3xxxfb_wait_for_vsync(channel, info); + break; + default: + break; + } + return ret; +} + +static int stmp3xxxfb_blank(int blank, struct fb_info *info) +{ + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + int ret = 0; + + switch (blank) { + case FB_BLANK_NORMAL: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_POWERDOWN: + pr_debug("%s: FB_BLANK_POWERDOWN\n", __func__); + stmp3xxx_schedule_work(data, F_DISABLE); + break; + + case FB_BLANK_UNBLANK: + pr_debug("%s: FB_BLANK_UNBLANK\n", __func__); + stmp3xxx_schedule_work(data, F_ENABLE); + break; + + default: + ret = -EINVAL; + } + return ret; +} + +static int stmp3xxxfb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + struct stmp3xxx_fb_data *data = (struct stmp3xxx_fb_data *)info; + int ret = 0; + + pr_debug("%s: var->xoffset %d, info->var.xoffset %d\n", + __func__, var->xoffset, info->var.xoffset); + /* check if var is valid; also, xpan is not supported */ + if (!var || (var->xoffset != info->var.xoffset) || + (var->yoffset + var->yres > var->yres_virtual)) { + ret = -EINVAL; + goto out; + } + + if (!data->pdata->cur->pan_display) { + ret = -EINVAL; + goto out; + } + + /* update framebuffer visual */ + data->cur_phys = data->phys_start + + info->fix.line_length * var->yoffset; + data->pdata->cur->pan_display(data->cur_phys); +out: + return ret; +} + +static struct fb_ops stmp3xxxfb_ops = { + .owner = THIS_MODULE, + .fb_check_var = stmp3xxxfb_check_var, + .fb_set_par = stmp3xxxfb_set_par, + .fb_mmap = stmp3xxxfb_mmap, + .fb_setcolreg = stmp3xxxfb_setcolreg, + .fb_ioctl = stmp3xxxfb_ioctl, + .fb_blank = stmp3xxxfb_blank, + .fb_pan_display = stmp3xxxfb_pan_display, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, +}; + +static void init_timings(struct stmp3xxx_fb_data *data) +{ + unsigned phase_time; + unsigned timings; + + /* Just use a phase_time of 1. As optimal as it gets, now. */ + phase_time = 1; + + /* Program all 4 timings the same */ + timings = phase_time; + timings |= timings << 8; + timings |= timings << 16; + __raw_writel(timings, REGS_LCDIF_BASE + HW_LCDIF_TIMING); +} + +#ifdef CONFIG_CPU_FREQ + +struct stmp3xxxfb_notifier_block { + struct stmp3xxx_fb_data *fb_data; + struct notifier_block nb; +}; + +static int stmp3xxxfb_notifier(struct notifier_block *self, + unsigned long phase, void *p) +{ + struct stmp3xxxfb_notifier_block *block = + container_of(self, struct stmp3xxxfb_notifier_block, nb); + struct stmp3xxx_fb_data *data = block->fb_data; + struct stmp3xxx_platform_fb_entry *pentry = data->pdata->cur; + u32 old_state = data->state; + + if (!data || !data->pdata || !data->pdata->cur) + return NOTIFY_BAD; + + /* REVISIT */ + switch (phase) { + case CPUFREQ_PRECHANGE: + if (old_state == F_ENABLE) + if (pentry->blank_panel) + pentry->blank_panel(FB_BLANK_POWERDOWN); + break; + + case CPUFREQ_POSTCHANGE: + if (old_state == F_ENABLE) + if (pentry->blank_panel) + pentry->blank_panel(FB_BLANK_UNBLANK); + break; + + default: + dev_dbg(data->dev, "didn't handle notify %ld\n", phase); + } + + return NOTIFY_DONE; +} + +static struct stmp3xxxfb_notifier_block stmp3xxxfb_nb = { + .nb = { + .notifier_call = stmp3xxxfb_notifier, + }, +}; +#endif /* CONFIG_CPU_FREQ */ + +static int get_max_memsize(struct stmp3xxx_platform_fb_entry *pentry, + void *data, int ret_prev) +{ + struct stmp3xxx_fb_data *fbdata = data; + int sz = pentry->x_res * pentry->y_res * pentry->bpp / 8; + fbdata->mem_size = sz < ret_prev ? ret_prev : sz; + pr_debug("%s: mem_size now %d\n", __func__, fbdata->mem_size); + return fbdata->mem_size; +} + +static int __devinit stmp3xxxfb_probe(struct platform_device *pdev) +{ + int ret = 0; + struct stmp3xxx_fb_data *data; + struct resource *res; + struct fb_info *info; + struct stmp3xxx_platform_fb_data *pdata = pdev->dev.platform_data; + struct stmp3xxx_platform_fb_entry *pentry; + + if (pdata == NULL) { + ret = -ENODEV; + goto out; + } + + if (default_panel_name) { + pentry = (void *)stmp3xxx_lcd_iterate_pdata(pdata, + get_matching_pentry_by_name, + default_panel_name); + if (pentry) { + stmp3xxx_lcd_move_pentry_up(pentry, pdata); + pdata->cur = pentry; + } + } + if (!default_panel_name || !pentry) + pentry = pdata->cur; + if (!pentry || !pentry->init_panel || !pentry->run_panel || + !pentry->release_panel) { + ret = -EINVAL; + goto out; + } + + data = (struct stmp3xxx_fb_data *)framebuffer_alloc( + sizeof(struct stmp3xxx_fb_data) + + sizeof(u32) * 256 - + sizeof(struct fb_info), &pdev->dev); + if (data == NULL) { + ret = -ENOMEM; + goto out; + } + + cdata = data; + data->dev = &pdev->dev; + data->pdata = pdata; + platform_set_drvdata(pdev, data); + info = &data->info; + + dev_dbg(&pdev->dev, "resolution %dx%d, bpp %d\n", pentry->x_res, + pentry->y_res, pentry->bpp); + + stmp3xxx_lcd_iterate_pdata(pdata, get_max_memsize, data); + + data->map_size = PAGE_ALIGN(data->mem_size) * NUM_SCREENS; + dev_dbg(&pdev->dev, "memory to allocate: %d\n", data->map_size); + + data->virt_start = dma_alloc_writecombine(&pdev->dev, + data->map_size, + &data->phys_start, + GFP_KERNEL); + + if (data->virt_start == NULL) { + ret = -ENOMEM; + goto out_dma; + } + dev_dbg(&pdev->dev, "allocated at %p:0x%x\n", data->virt_start, + data->phys_start); + mutex_init(&data->blank_mutex); + INIT_WORK(&data->work, stmp3xxxfb_task); + data->state = F_ENABLE; + + stmp3xxxfb_default.bits_per_pixel = pentry->bpp; + /* NB: rotated */ + stmp3xxxfb_default.xres = pentry->y_res; + stmp3xxxfb_default.yres = pentry->x_res; + stmp3xxxfb_default.xres_virtual = pentry->y_res; + stmp3xxxfb_default.yres_virtual = data->map_size / + (pentry->y_res * pentry->bpp / 8); + if (stmp3xxxfb_default.yres_virtual >= stmp3xxxfb_default.yres * 2) + stmp3xxxfb_default.yres_virtual = stmp3xxxfb_default.yres * 2; + else + stmp3xxxfb_default.yres_virtual = stmp3xxxfb_default.yres; + + stmp3xxxfb_fix.smem_start = data->phys_start; + stmp3xxxfb_fix.smem_len = pentry->y_res * pentry->x_res * pentry->bpp / + 8; + stmp3xxxfb_fix.ypanstep = 1; + + switch (pentry->bpp) { + case 32: + case 24: + stmp3xxxfb_default.red.offset = 16; + stmp3xxxfb_default.red.length = 8; + stmp3xxxfb_default.green.offset = 8; + stmp3xxxfb_default.green.length = 8; + stmp3xxxfb_default.blue.offset = 0; + stmp3xxxfb_default.blue.length = 8; + break; + + case 16: + stmp3xxxfb_default.red.offset = 11; + stmp3xxxfb_default.red.length = 5; + stmp3xxxfb_default.green.offset = 5; + stmp3xxxfb_default.green.length = 6; + stmp3xxxfb_default.blue.offset = 0; + stmp3xxxfb_default.blue.length = 5; + break; + + default: + dev_err(&pdev->dev, "unsupported bitwidth %d\n", pentry->bpp); + ret = -EINVAL; + goto out_dma; + } + + info->screen_base = data->virt_start; + info->fbops = &stmp3xxxfb_ops; + info->var = stmp3xxxfb_default; + info->fix = stmp3xxxfb_fix; + info->pseudo_palette = &data->par; + data->par = NULL; + info->flags = FBINFO_FLAG_DEFAULT; + + init_waitqueue_head(&data->vsync_wait_q); + data->vsync_count = 0; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (res == NULL) { + dev_err(&pdev->dev, "cannot get IRQ resource\n"); + ret = -ENODEV; + goto out_dma; + } + data->dma_irq = res->start; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 1); + if (res == NULL) { + dev_err(&pdev->dev, "cannot get IRQ resource\n"); + ret = -ENODEV; + goto out_dma; + } + data->err_irq = res->start; + + ret = fb_alloc_cmap(&info->cmap, 256, 0); + if (ret) + goto out_cmap; + + stmp3xxx_init_lcdif(); + ret = pentry->init_panel(data->dev, data->phys_start, + stmp3xxxfb_fix.smem_len, pentry); + if (ret) { + dev_err(&pdev->dev, "cannot initialize LCD panel\n"); + goto out_panel; + } + dev_dbg(&pdev->dev, "LCD panel initialized\n"); + init_timings(data); + + ret = request_irq(data->dma_irq, lcd_irq_handler, 0, "fb_dma", data); + if (ret) { + dev_err(&pdev->dev, "request_irq (%d) failed with error %d\n", + data->dma_irq, ret); + goto out_panel; + } + ret = request_irq(data->err_irq, lcd_irq_handler, 0, "fb_error", data); + if (ret) { + dev_err(&pdev->dev, "request_irq (%d) failed with error %d\n", + data->err_irq, ret); + goto out_irq; + } + ret = register_framebuffer(info); + if (ret) + goto out_register; + + pentry->run_panel(); + dev_dbg(&pdev->dev, "LCD DMA channel has been started\n"); + data->cur_phys = data->phys_start; + dev_dbg(&pdev->dev, "LCD running now\n"); + +#ifdef CONFIG_CPU_FREQ + stmp3xxxfb_nb.fb_data = data; + cpufreq_register_notifier(&stmp3xxxfb_nb.nb, + CPUFREQ_TRANSITION_NOTIFIER); +#endif /* CONFIG_CPU_FREQ */ + + goto out; + +out_register: + free_irq(data->err_irq, data); +out_irq: + free_irq(data->dma_irq, data); +out_panel: + fb_dealloc_cmap(&info->cmap); +out_cmap: + dma_free_writecombine(&pdev->dev, data->map_size, data->virt_start, + data->phys_start); +out_dma: + kfree(data); +out: + return ret; +} + +static int stmp3xxxfb_remove(struct platform_device *pdev) +{ + struct stmp3xxx_fb_data *data = platform_get_drvdata(pdev); + + set_controller_state(data, F_DISABLE); + + unregister_framebuffer(&data->info); + framebuffer_release(&data->info); + fb_dealloc_cmap(&data->info.cmap); + free_irq(data->dma_irq, data); + free_irq(data->err_irq, data); + dma_free_writecombine(&pdev->dev, data->map_size, data->virt_start, + data->phys_start); + kfree(data); + platform_set_drvdata(pdev, NULL); + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxxfb_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct stmp3xxx_fb_data *data = platform_get_drvdata(pdev); + + set_controller_state(data, F_DISABLE); + + return 0; +} + +static int stmp3xxxfb_resume(struct platform_device *pdev) +{ + struct stmp3xxx_fb_data *data = platform_get_drvdata(pdev); + + set_controller_state(data, F_ENABLE); + return 0; +} +#else +#define stmp3xxxfb_suspend NULL +#define stmp3xxxfb_resume NULL +#endif + +static struct platform_driver stmp3xxxfb_driver = { + .probe = stmp3xxxfb_probe, + .remove = stmp3xxxfb_remove, + .suspend = stmp3xxxfb_suspend, + .resume = stmp3xxxfb_resume, + .driver = { + .name = "stmp3xxx-fb", + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxxfb_init(void) +{ + return platform_driver_register(&stmp3xxxfb_driver); +} + +static void __exit stmp3xxxfb_exit(void) +{ + platform_driver_unregister(&stmp3xxxfb_driver); +} + +module_init(stmp3xxxfb_init); +module_exit(stmp3xxxfb_exit); + +/* + * LCD panel select + */ +static int __init default_panel_select(char *str) +{ + default_panel_name = str; + return 0; +} +__setup("lcd_panel=", default_panel_select); + +MODULE_AUTHOR("Vitaly Wool "); +MODULE_DESCRIPTION("STMP3xxx Framebuffer Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/uvesafb.c +++ linux-fsl-imx51-2.6.31/drivers/video/uvesafb.c @@ -67,12 +67,14 @@ * find the kernel part of the task struct, copy the registers and * the buffer contents and then complete the task. */ -static void uvesafb_cn_callback(void *data) +static void uvesafb_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { - struct cn_msg *msg = data; struct uvesafb_task *utask; struct uvesafb_ktask *task; + if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) + return; + if (msg->seq >= UVESAFB_TASKS_MAX) return; --- linux-fsl-imx51-2.6.31.orig/drivers/video/Makefile +++ linux-fsl-imx51-2.6.31/drivers/video/Makefile @@ -117,6 +117,8 @@ obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/ obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/ +obj-$(CONFIG_FB_MXC) += mxc/ +obj-$(CONFIG_FB_STMP37XX) += stmp37xxfb.o obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o obj-$(CONFIG_FB_PS3) += ps3fb.o obj-$(CONFIG_FB_SM501) += sm501fb.o --- linux-fsl-imx51-2.6.31.orig/drivers/video/s3c-fb.c +++ linux-fsl-imx51-2.6.31/drivers/video/s3c-fb.c @@ -1036,7 +1036,7 @@ static struct platform_driver s3c_fb_driver = { .probe = s3c_fb_probe, - .remove = s3c_fb_remove, + .remove = __devexit_p(s3c_fb_remove), .suspend = s3c_fb_suspend, .resume = s3c_fb_resume, .driver = { --- linux-fsl-imx51-2.6.31.orig/drivers/video/vesafb.c +++ linux-fsl-imx51-2.6.31/drivers/video/vesafb.c @@ -28,6 +28,12 @@ #define dac_reg (0x3c8) #define dac_val (0x3c9) +struct vesafb_info +{ + u32 pseudo_palette[256]; + int mtrr_hdl; +}; + /* --------------------------------------------------------------------- */ static struct fb_var_screeninfo vesafb_defined __initdata = { @@ -47,16 +53,37 @@ .accel = FB_ACCEL_NONE, }; +#ifndef MODULE static int inverse __read_mostly; +#endif static int mtrr __read_mostly; /* disable mtrr */ static int vram_remap __initdata; /* Set amount of memory to be used */ static int vram_total __initdata; /* Set total amount of memory */ static int pmi_setpal __read_mostly = 1; /* pmi for palette changes ??? */ +static int redraw __read_mostly; static int ypan __read_mostly; /* 0..nothing, 1..ypan, 2..ywrap */ +static int ywrap __read_mostly; static void (*pmi_start)(void) __read_mostly; static void (*pmi_pal) (void) __read_mostly; static int depth __read_mostly; static int vga_compat __read_mostly; + +module_param(redraw, bool, 0); +module_param(ypan, bool, 0); +module_param(ywrap, bool, 0); +module_param_named(vgapal, pmi_setpal, invbool, 0); +MODULE_PARM_DESC(vgapal, "Use VGA for setting palette (default)"); +module_param_named(pmipal, pmi_setpal, bool, 0); +MODULE_PARM_DESC(pmipal, "Use PMI for setting palette"); +module_param(mtrr, bool, 0); +MODULE_PARM_DESC(mtrr, "Enable MTRR support (default)"); +module_param_named(nomtrr, mtrr, invbool, 0); +MODULE_PARM_DESC(nomtrr, "Disable MTRR support"); +module_param(vram_remap, int, 0); +MODULE_PARM_DESC(vram_remap, "Set total amount of memory to be used"); +module_param(vram_total, int, 0); +MODULE_PARM_DESC(vram_total, "Total amount of memory"); + /* --------------------------------------------------------------------- */ static int vesafb_pan_display(struct fb_var_screeninfo *var, @@ -192,6 +219,7 @@ .fb_imageblit = cfb_imageblit, }; +#ifndef MODULE static int __init vesafb_setup(char *options) { char *this_opt; @@ -225,10 +253,12 @@ } return 0; } +#endif static int __init vesafb_probe(struct platform_device *dev) { struct fb_info *info; + struct vesafb_info *vfb_info; int i, err; unsigned int size_vmode; unsigned int size_remap; @@ -287,13 +317,14 @@ spaces our resource handlers simply don't know about */ } - info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev); + info = framebuffer_alloc(sizeof(struct vesafb_info), &dev->dev); if (!info) { release_mem_region(vesafb_fix.smem_start, size_total); return -ENOMEM; } - info->pseudo_palette = info->par; - info->par = NULL; + vfb_info = (struct vesafb_info *) info->par; + vfb_info->mtrr_hdl = -1; + info->pseudo_palette = vfb_info->pseudo_palette; /* set vesafb aperture size for generic probing */ info->aperture_base = screen_info.lfb_base; @@ -431,18 +462,16 @@ } if (type) { - int rc; - /* Find the largest power-of-two */ while (temp_size & (temp_size - 1)) temp_size &= (temp_size - 1); /* Try and find a power of two to add */ do { - rc = mtrr_add(vesafb_fix.smem_start, temp_size, + vfb_info->mtrr_hdl = mtrr_add(vesafb_fix.smem_start, temp_size, type, 1); temp_size >>= 1; - } while (temp_size >= PAGE_SIZE && rc == -EINVAL); + } while (temp_size >= PAGE_SIZE && vfb_info->mtrr_hdl == -EINVAL); } } #endif @@ -476,8 +505,28 @@ return err; } +static int __exit vesafb_remove(struct platform_device *device) +{ + struct fb_info *info = dev_get_drvdata(&device->dev); + + unregister_framebuffer(info); +#ifdef CONFIG_MTRR + { + struct vesafb_info *vfb_info = (struct vesafb_info *) info->par; + if (vfb_info->mtrr_hdl >= 0) + mtrr_del(vfb_info->mtrr_hdl, 0, 0); + } +#endif + iounmap(info->screen_base); + framebuffer_release(info); + release_mem_region(vesafb_fix.smem_start, vesafb_fix.smem_len); + + return 0; +} + static struct platform_driver vesafb_driver = { .probe = vesafb_probe, + .remove = vesafb_remove, .driver = { .name = "vesafb", }, @@ -488,11 +537,18 @@ static int __init vesafb_init(void) { int ret; +#ifndef MODULE char *option = NULL; /* ignore error return of fb_get_options */ fb_get_options("vesafb", &option); vesafb_setup(option); +#else + if (redraw) + ypan = 0; + if (ywrap) + ypan = 2; +#endif ret = platform_driver_register(&vesafb_driver); if (!ret) { @@ -511,6 +567,14 @@ return ret; } + +static void __exit vesafb_exit(void) +{ + platform_device_unregister(vesafb_device); + platform_driver_unregister(&vesafb_driver); +} + module_init(vesafb_init); +module_exit(vesafb_exit); MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/ch7024.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/ch7024.c @@ -0,0 +1,866 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ch7024.c + * @brief Driver for CH7024 TV encoder + * + * @ingroup Framebuffer + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/*! + * CH7024 registers + */ +#define CH7024_DEVID 0x00 +#define CH7024_REVID 0x01 +#define CH7024_PG 0x02 + +#define CH7024_RESET 0x03 +#define CH7024_POWER 0x04 +#define CH7024_TVHUE 0x05 +#define CH7024_TVSAT 0x06 +#define CH7024_TVCTA 0x07 +#define CH7024_TVBRI 0x08 +#define CH7024_TVSHARP 0x09 +#define CH7024_OUT_FMT 0x0A +#define CH7024_XTAL 0x0B +#define CH7024_IDF1 0x0C +#define CH7024_IDF2 0x0D +#define CH7024_SYNC 0x0E +#define CH7024_TVFILTER1 0x0F +#define CH7024_TVFILTER2 0x10 +#define CH7024_IN_TIMING1 0x11 +#define CH7024_IN_TIMING2 0x12 +#define CH7024_IN_TIMING3 0x13 +#define CH7024_IN_TIMING4 0x14 +#define CH7024_IN_TIMING5 0x15 +#define CH7024_IN_TIMING6 0x16 +#define CH7024_IN_TIMING7 0x17 +#define CH7024_IN_TIMING8 0x18 +#define CH7024_IN_TIMING9 0x19 +#define CH7024_IN_TIMING10 0x1A +#define CH7024_IN_TIMING11 0x1B +#define CH7024_ACIV 0x1C +#define CH7024_CLK_TREE 0x1D +#define CH7024_OUT_TIMING1 0x1E +#define CH7024_OUT_TIMING2 0x1F +#define CH7024_V_POS1 0x20 +#define CH7024_V_POS2 0x21 +#define CH7024_H_POS1 0x22 +#define CH7024_H_POS2 0x23 +#define CH7024_PCLK_A1 0x24 +#define CH7024_PCLK_A2 0x25 +#define CH7024_PCLK_A3 0x26 +#define CH7024_PCLK_A4 0x27 +#define CH7024_CLK_P1 0x28 +#define CH7024_CLK_P2 0x29 +#define CH7024_CLK_P3 0x2A +#define CH7024_CLK_N1 0x2B +#define CH7024_CLK_N2 0x2C +#define CH7024_CLK_N3 0x2D +#define CH7024_CLK_T 0x2E +#define CH7024_PLL1 0x2F +#define CH7024_PLL2 0x30 +#define CH7024_PLL3 0x31 +#define CH7024_SC_FREQ1 0x34 +#define CH7024_SC_FREQ2 0x35 +#define CH7024_SC_FREQ3 0x36 +#define CH7024_SC_FREQ4 0x37 +#define CH7024_DAC_TRIM 0x62 +#define CH7024_DATA_IO 0x63 +#define CH7024_ATT_DISP 0x7E + +/*! + * CH7024 register values + */ +/* video output formats */ +#define CH7024_VOS_NTSC_M 0x0 +#define CH7024_VOS_NTSC_J 0x1 +#define CH7024_VOS_NTSC_443 0x2 +#define CH7024_VOS_PAL_BDGHKI 0x3 +#define CH7024_VOS_PAL_M 0x4 +#define CH7024_VOS_PAL_N 0x5 +#define CH7024_VOS_PAL_NC 0x6 +#define CH7024_VOS_PAL_60 0x7 +/* crystal predefined */ +#define CH7024_XTAL_13MHZ 0x4 +#define CH7024_XTAL_26MHZ 0xB + +/* chip ID */ +#define CH7024_DEVICE_ID 0x45 + +/* clock source define */ +#define CLK_HIGH 0 +#define CLK_LOW 1 + +/* CH7024 presets structs */ +struct ch7024_clock { + u32 A; + u32 P; + u32 N; + u32 T; + u8 PLLN1; + u8 PLLN2; + u8 PLLN3; +}; + +struct ch7024_input_timing { + u32 HTI; + u32 VTI; + u32 HAI; + u32 VAI; + u32 HW; + u32 HO; + u32 VW; + u32 VO; + u32 VOS; +}; + +#define TVOUT_FMT_OFF 0 +#define TVOUT_FMT_NTSC 1 +#define TVOUT_FMT_PAL 2 + +static int enabled; /* enable power on or not */ +static int pm_status; /* status before suspend */ + +static struct i2c_client *ch7024_client; +static struct fb_info *ch7024_fbi; +static int ch7024_cur_mode; +static u32 detect_gpio; +static struct regulator *io_reg; +static struct regulator *core_reg; +static struct regulator *analog_reg; + +static void hp_detect_wq_handler(struct work_struct *); +DECLARE_DELAYED_WORK(ch7024_wq, hp_detect_wq_handler); + +static inline int ch7024_read_reg(u8 reg) +{ + return i2c_smbus_read_byte_data(ch7024_client, reg); +} + +static inline int ch7024_write_reg(u8 reg, u8 word) +{ + return i2c_smbus_write_byte_data(ch7024_client, reg, word); +} + +/** + * PAL B/D/G/H/K/I clock and timting structures + */ +static struct ch7024_clock ch7024_clk_pal = { + .A = 0x0, + .P = 0x36b00, + .N = 0x41eb00, + .T = 0x3f, + .PLLN1 = 0x0, + .PLLN2 = 0x1b, + .PLLN3 = 0x12, +}; + +static struct ch7024_input_timing ch7024_timing_pal = { + .HTI = 950, + .VTI = 560, + .HAI = 640, + .VAI = 480, + .HW = 60, + .HO = 250, + .VW = 40, + .VO = 40, + .VOS = CH7024_VOS_PAL_BDGHKI, +}; + +/** + * NTSC_M clock and timting structures + * TODO: change values to work well. + */ +static struct ch7024_clock ch7024_clk_ntsc = { + .A = 0x0, + .P = 0x2ac90, + .N = 0x36fc90, + .T = 0x3f, + .PLLN1 = 0x0, + .PLLN2 = 0x1b, + .PLLN3 = 0x12, +}; + +static struct ch7024_input_timing ch7024_timing_ntsc = { + .HTI = 801, + .VTI = 554, + .HAI = 640, + .VAI = 480, + .HW = 60, + .HO = 101, + .VW = 20, + .VO = 54, + .VOS = CH7024_VOS_NTSC_M, +}; + +static struct fb_videomode video_modes[] = { + { + /* NTSC TV output */ + "TV-NTSC", 60, 640, 480, 37594, + 0, 101, + 0, 54, + 60, 20, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* PAL TV output */ + "TV-PAL", 50, 640, 480, 37594, + 0, 250, + 0, 40, + 60, 40, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +/** + * ch7024_setup + * initial the CH7024 chipset by setting register + * @param: + * vos: output video format + * @return: + * 0 successful + * otherwise failed + */ +static int ch7024_setup(int vos) +{ + struct ch7024_input_timing *ch_timing; + struct ch7024_clock *ch_clk; +#ifdef DEBUG_CH7024 + int i, val; +#endif + + /* select output video format */ + if (vos == TVOUT_FMT_PAL) { + ch_timing = &ch7024_timing_pal; + ch_clk = &ch7024_clk_pal; + pr_debug("CH7024: change to PAL video\n"); + } else if (vos == TVOUT_FMT_NTSC) { + ch_timing = &ch7024_timing_ntsc; + ch_clk = &ch7024_clk_ntsc; + pr_debug("CH7024: change to NTSC video\n"); + } else { + + pr_debug("CH7024: no such video format.\n"); + return -EINVAL; + } + ch7024_write_reg(CH7024_RESET, 0x0); + ch7024_write_reg(CH7024_RESET, 0x3); + + ch7024_write_reg(CH7024_POWER, 0x0C); /* power on, disable DAC */ + ch7024_write_reg(CH7024_XTAL, CH7024_XTAL_26MHZ); + ch7024_write_reg(CH7024_SYNC, 0x0D); /* SLAVE mode, and TTL */ + ch7024_write_reg(CH7024_IDF1, 0x00); + ch7024_write_reg(CH7024_TVFILTER1, 0x00); /* set XCH=0 */ + ch7024_write_reg(CH7024_CLK_TREE, 0x9E); /* Invert input clk */ + + /* set input clock and divider */ + /* set PLL */ + ch7024_write_reg(CH7024_PLL1, ch_clk->PLLN1); + ch7024_write_reg(CH7024_PLL2, ch_clk->PLLN2); + ch7024_write_reg(CH7024_PLL3, ch_clk->PLLN3); + /* set A register */ + ch7024_write_reg(CH7024_PCLK_A1, (ch_clk->A >> 24) & 0xFF); + ch7024_write_reg(CH7024_PCLK_A2, (ch_clk->A >> 16) & 0xFF); + ch7024_write_reg(CH7024_PCLK_A3, (ch_clk->A >> 8) & 0xFF); + ch7024_write_reg(CH7024_PCLK_A4, ch_clk->A & 0xFF); + /* set P register */ + ch7024_write_reg(CH7024_CLK_P1, (ch_clk->P >> 16) & 0xFF); + ch7024_write_reg(CH7024_CLK_P2, (ch_clk->P >> 8) & 0xFF); + ch7024_write_reg(CH7024_CLK_P3, ch_clk->P & 0xFF); + /* set N register */ + ch7024_write_reg(CH7024_CLK_N1, (ch_clk->N >> 16) & 0xFF); + ch7024_write_reg(CH7024_CLK_N2, (ch_clk->N >> 8) & 0xFF); + ch7024_write_reg(CH7024_CLK_N3, ch_clk->N & 0xFF); + /* set T register */ + ch7024_write_reg(CH7024_CLK_T, ch_clk->T & 0xFF); + + /* set sub-carrier frequency generation method */ + ch7024_write_reg(CH7024_ACIV, 0x00); /* ACIV = 0, automatical SCF */ + /* TV out pattern and DAC switch */ + ch7024_write_reg(CH7024_OUT_FMT, (0x10 | ch_timing->VOS) & 0xFF); + + /* input settings */ + /* input format, RGB666 */ + ch7024_write_reg(CH7024_IDF2, 0x02); + /* HAI/HTI VAI */ + ch7024_write_reg(CH7024_IN_TIMING1, ((ch_timing->HTI >> 5) & 0x38) | + ((ch_timing->HAI >> 8) & 0x07)); + ch7024_write_reg(CH7024_IN_TIMING2, ch_timing->HAI & 0xFF); + ch7024_write_reg(CH7024_IN_TIMING8, ch_timing->VAI & 0xFF); + /* HTI VTI */ + ch7024_write_reg(CH7024_IN_TIMING3, ch_timing->HTI & 0xFF); + ch7024_write_reg(CH7024_IN_TIMING9, ch_timing->VTI & 0xFF); + /* HW/HO(h) VW */ + ch7024_write_reg(CH7024_IN_TIMING4, ((ch_timing->HW >> 5) & 0x18) | + ((ch_timing->HO >> 8) & 0x7)); + ch7024_write_reg(CH7024_IN_TIMING6, ch_timing->HW & 0xFF); + ch7024_write_reg(CH7024_IN_TIMING11, ch_timing->VW & 0x3F); + /* HO(l) VO/VAI/VTI */ + ch7024_write_reg(CH7024_IN_TIMING5, ch_timing->HO & 0xFF); + ch7024_write_reg(CH7024_IN_TIMING7, ((ch_timing->VO >> 4) & 0x30) | + ((ch_timing->VTI >> 6) & 0x0C) | + ((ch_timing->VAI >> 8) & 0x03)); + ch7024_write_reg(CH7024_IN_TIMING10, ch_timing->VO & 0xFF); + + /* adjust the brightness */ + ch7024_write_reg(CH7024_TVBRI, 0x90); + + ch7024_write_reg(CH7024_OUT_TIMING1, 0x4); + ch7024_write_reg(CH7024_OUT_TIMING2, 0xe0); + + if (vos == TVOUT_FMT_PAL) { + ch7024_write_reg(CH7024_V_POS1, 0x03); + ch7024_write_reg(CH7024_V_POS2, 0x7d); + } else { + ch7024_write_reg(CH7024_V_POS1, 0x02); + ch7024_write_reg(CH7024_V_POS2, 0x7b); + } + + ch7024_write_reg(CH7024_POWER, 0x00); + +#ifdef DEBUG_CH7024 + for (i = 0; i < CH7024_SC_FREQ4; i++) { + + val = ch7024_read_reg(i); + pr_debug("CH7024, reg[0x%x] = %x\n", i, val); + } +#endif + return 0; +} + +/** + * ch7024_enable + * Enable the ch7024 Power to begin TV encoder + */ +static int ch7024_enable(void) +{ + int en = enabled; + + if (!enabled) { + regulator_enable(core_reg); + regulator_enable(io_reg); + regulator_enable(analog_reg); + msleep(200); + enabled = 1; + ch7024_write_reg(CH7024_POWER, 0x00); + pr_debug("CH7024 power on.\n"); + } + return en; +} + +/** + * ch7024_disable + * Disable the ch7024 Power to stop TV encoder + */ +static void ch7024_disable(void) +{ + if (enabled) { + enabled = 0; + ch7024_write_reg(CH7024_POWER, 0x0D); + regulator_disable(analog_reg); + regulator_disable(io_reg); + regulator_disable(core_reg); + pr_debug("CH7024 power off.\n"); + } +} + +static int ch7024_detect(void) +{ + int en; + int detect = 0; + + if (gpio_get_value(detect_gpio) == 1) { + set_irq_type(ch7024_client->irq, IRQF_TRIGGER_FALLING); + + en = ch7024_enable(); + + ch7024_write_reg(CH7024_DAC_TRIM, 0xB4); + msleep(50); + detect = ch7024_read_reg(CH7024_ATT_DISP) & 0x3; + ch7024_write_reg(CH7024_DAC_TRIM, 0x34); + + if (!en) + ch7024_disable(); + } else { + set_irq_type(ch7024_client->irq, IRQF_TRIGGER_RISING); + } + dev_dbg(&ch7024_client->dev, "detect = %d\n", detect); + return (detect); +} + +static irqreturn_t hp_detect_handler(int irq, void *data) +{ + disable_irq(irq); + schedule_delayed_work(&ch7024_wq, 50); + + return IRQ_HANDLED; +} + +static void hp_detect_wq_handler(struct work_struct *work) +{ + int detect; + struct mxc_hw_event event = { HWE_PHONEJACK_PLUG, 0 }; + + detect = ch7024_detect(); + + enable_irq(ch7024_client->irq); + + sysfs_notify(&ch7024_client->dev.kobj, NULL, "headphone"); + + /* send hw event by netlink */ + event.args = detect; + hw_event_send(1, &event); +} + +int ch7024_fb_event(struct notifier_block *nb, unsigned long val, void *v) +{ + struct fb_event *event = v; + struct fb_info *fbi = event->info; + + switch (val) { + case FB_EVENT_FB_REGISTERED: + if ((ch7024_fbi != NULL) || strcmp(fbi->fix.id, "DISP3 BG")) + break; + + ch7024_fbi = fbi; + fb_add_videomode(&video_modes[0], &ch7024_fbi->modelist); + fb_add_videomode(&video_modes[1], &ch7024_fbi->modelist); + break; + case FB_EVENT_MODE_CHANGE: + if (ch7024_fbi != fbi) + break; + + if (!fbi->mode) { + ch7024_disable(); + ch7024_cur_mode = TVOUT_FMT_OFF; + return 0; + } + + if (fb_mode_is_equal(fbi->mode, &video_modes[0])) { + ch7024_cur_mode = TVOUT_FMT_NTSC; + ch7024_enable(); + ch7024_setup(TVOUT_FMT_NTSC); + } else if (fb_mode_is_equal(fbi->mode, &video_modes[1])) { + ch7024_cur_mode = TVOUT_FMT_PAL; + ch7024_enable(); + ch7024_setup(TVOUT_FMT_PAL); + } else { + ch7024_disable(); + ch7024_cur_mode = TVOUT_FMT_OFF; + return 0; + } + break; + case FB_EVENT_BLANK: + if ((ch7024_fbi != fbi) || (ch7024_cur_mode == TVOUT_FMT_OFF)) + return 0; + + if (*((int *)event->data) == FB_BLANK_UNBLANK) { + ch7024_enable(); + ch7024_setup(ch7024_cur_mode); + } else { + ch7024_disable(); + } + break; + } + return 0; +} + +static struct notifier_block nb = { + .notifier_call = ch7024_fb_event, +}; + +static ssize_t show_headphone(struct device_driver *dev, char *buf) +{ + int detect; + + detect = ch7024_detect(); + + if (detect == 0) { + strcpy(buf, "none\n"); + } else if (detect == 1) { + strcpy(buf, "cvbs\n"); + } else { + strcpy(buf, "headset\n"); + } + + return strlen(buf); +} + +DRIVER_ATTR(headphone, 0644, show_headphone, NULL); + +static ssize_t show_brightness(struct device_driver *dev, char *buf) +{ + u32 reg; + reg = ch7024_read_reg(CH7024_TVBRI); + return snprintf(buf, PAGE_SIZE, "%u", reg); +} + +static ssize_t store_brightness(struct device_driver *dev, const char *buf, + size_t count) +{ + char *endp; + int brightness = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + if (brightness > 255) + brightness = 255; + + ch7024_write_reg(CH7024_TVBRI, brightness); + + return count; +} + +DRIVER_ATTR(brightness, 0644, show_brightness, store_brightness); + +static ssize_t show_contrast(struct device_driver *dev, char *buf) +{ + u32 reg; + reg = ch7024_read_reg(CH7024_TVCTA); + + reg *= 2; /* Scale to 0 - 255 */ + + return snprintf(buf, PAGE_SIZE, "%u", reg); +} + +static ssize_t store_contrast(struct device_driver *dev, const char *buf, + size_t count) +{ + char *endp; + int contrast = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + contrast /= 2; + if (contrast > 127) + contrast = 127; + + ch7024_write_reg(CH7024_TVCTA, contrast); + + return count; +} + +DRIVER_ATTR(contrast, 0644, show_contrast, store_contrast); + +static ssize_t show_hue(struct device_driver *dev, char *buf) +{ + u32 reg; + reg = ch7024_read_reg(CH7024_TVHUE); + + reg *= 2; /* Scale to 0 - 255 */ + + return snprintf(buf, PAGE_SIZE, "%u", reg); +} + +static ssize_t store_hue(struct device_driver *dev, const char *buf, + size_t count) +{ + char *endp; + int hue = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + hue /= 2; + if (hue > 127) + hue = 127; + + ch7024_write_reg(CH7024_TVHUE, hue); + + return count; +} + +DRIVER_ATTR(hue, 0644, show_hue, store_hue); + +static ssize_t show_saturation(struct device_driver *dev, char *buf) +{ + u32 reg; + reg = ch7024_read_reg(CH7024_TVSAT); + + reg *= 2; /* Scale to 0 - 255 */ + + return snprintf(buf, PAGE_SIZE, "%u", reg); +} + +static ssize_t store_saturation(struct device_driver *dev, const char *buf, + size_t count) +{ + char *endp; + int saturation = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + saturation /= 2; + if (saturation > 127) + saturation = 127; + + ch7024_write_reg(CH7024_TVSAT, saturation); + + return count; +} + +DRIVER_ATTR(saturation, 0644, show_saturation, store_saturation); + +static ssize_t show_sharpness(struct device_driver *dev, char *buf) +{ + u32 reg; + reg = ch7024_read_reg(CH7024_TVSHARP); + + reg *= 32; /* Scale to 0 - 255 */ + + return snprintf(buf, PAGE_SIZE, "%u", reg); +} + +static ssize_t store_sharpness(struct device_driver *dev, const char *buf, + size_t count) +{ + char *endp; + int sharpness = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + sharpness /= 32; /* Scale to 0 - 7 */ + if (sharpness > 7) + sharpness = 7; + + ch7024_write_reg(CH7024_TVSHARP, sharpness); + + return count; +} + +DRIVER_ATTR(sharpness, 0644, show_sharpness, store_sharpness); + +static int ch7024_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +{ + int ret, i; + u32 id; + u32 irqtype; + struct mxc_tvout_platform_data *plat_data = client->dev.platform_data; + + ch7024_client = client; + + io_reg = regulator_get(&client->dev, plat_data->io_reg); + core_reg = regulator_get(&client->dev, plat_data->core_reg); + analog_reg = regulator_get(&client->dev, plat_data->analog_reg); + + regulator_enable(io_reg); + regulator_enable(core_reg); + regulator_enable(analog_reg); + msleep(200); + + id = ch7024_read_reg(CH7024_DEVID); + + regulator_disable(core_reg); + regulator_disable(io_reg); + regulator_disable(analog_reg); + + if (id < 0 || id != CH7024_DEVICE_ID) { + printk(KERN_ERR + "ch7024: TV encoder not present: id = %x\n", id); + return -ENODEV; + } + printk(KERN_ERR "ch7024: TV encoder present: id = %x\n", id); + + detect_gpio = plat_data->detect_line; + + if (client->irq > 0) { + if (ch7024_detect() == 0) + irqtype = IRQF_TRIGGER_RISING; + else + irqtype = IRQF_TRIGGER_FALLING; + + ret = request_irq(client->irq, hp_detect_handler, irqtype, + client->name, client); + if (ret < 0) + goto err0; + + ret = driver_create_file(&client->driver->driver, + &driver_attr_headphone); + if (ret < 0) + goto err1; + } + + ret = driver_create_file(&client->driver->driver, + &driver_attr_brightness); + if (ret) + goto err2; + + ret = driver_create_file(&client->driver->driver, + &driver_attr_contrast); + if (ret) + goto err3; + ret = driver_create_file(&client->driver->driver, &driver_attr_hue); + if (ret) + goto err4; + ret = driver_create_file(&client->driver->driver, + &driver_attr_saturation); + if (ret) + goto err5; + ret = driver_create_file(&client->driver->driver, + &driver_attr_sharpness); + if (ret) + goto err6; + + for (i = 0; i < num_registered_fb; i++) { + if (strcmp(registered_fb[i]->fix.id, "DISP3 BG") == 0) { + ch7024_fbi = registered_fb[i]; + break; + } + } + if (ch7024_fbi != NULL) { + fb_add_videomode(&video_modes[0], &ch7024_fbi->modelist); + fb_add_videomode(&video_modes[1], &ch7024_fbi->modelist); + } + fb_register_client(&nb); + + return 0; + err6: + driver_remove_file(&client->driver->driver, &driver_attr_saturation); + err5: + driver_remove_file(&client->driver->driver, &driver_attr_hue); + err4: + driver_remove_file(&client->driver->driver, &driver_attr_contrast); + err3: + driver_remove_file(&client->driver->driver, &driver_attr_brightness); + err2: + driver_remove_file(&client->driver->driver, &driver_attr_headphone); + err1: + free_irq(client->irq, client); + err0: + return ret; +} + +static int ch7024_remove(struct i2c_client *client) +{ + free_irq(client->irq, client); + + regulator_put(io_reg); + regulator_put(core_reg); + regulator_put(analog_reg); + + driver_remove_file(&client->driver->driver, &driver_attr_headphone); + driver_remove_file(&client->driver->driver, &driver_attr_brightness); + driver_remove_file(&client->driver->driver, &driver_attr_contrast); + driver_remove_file(&client->driver->driver, &driver_attr_hue); + driver_remove_file(&client->driver->driver, &driver_attr_saturation); + driver_remove_file(&client->driver->driver, &driver_attr_sharpness); + + fb_unregister_client(&nb); + + ch7024_client = 0; + + return 0; +} + +#ifdef CONFIG_PM +/*! + * PM suspend/resume routing + */ +static int ch7024_suspend(struct i2c_client *client, pm_message_t state) +{ + pr_debug("Ch7024 suspend routing..\n"); + if (enabled) { + ch7024_disable(); + pm_status = 1; + } else { + pm_status = 0; + } + return 0; +} + +static int ch7024_resume(struct i2c_client *client) +{ + pr_debug("Ch7024 resume routing..\n"); + if (pm_status) { + ch7024_enable(); + ch7024_setup(ch7024_cur_mode); + } + return 0; +} +#else +#define ch7024_suspend NULL +#define ch7024_resume NULL +#endif + +static const struct i2c_device_id ch7024_id[] = { + { "ch7024", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, ch7024_id); + +static struct i2c_driver ch7024_driver = { + .driver = { + .name = "ch7024", + }, + .probe = ch7024_probe, + .remove = ch7024_remove, + .suspend = ch7024_suspend, + .resume = ch7024_resume, + .id_table = ch7024_id, +}; + +static int __init ch7024_init(void) +{ + return i2c_add_driver(&ch7024_driver); +} + +static void __exit ch7024_exit(void) +{ + i2c_del_driver(&ch7024_driver); +} + +module_init(ch7024_init); +module_exit(ch7024_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CH7024 TV encoder driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxc_edid.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxc_edid.c @@ -0,0 +1,88 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxc_edid.c + * + * @brief MXC EDID tools + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include + +#define EDID_LENGTH 128 + +static u8 edid[EDID_LENGTH]; + +int read_edid(struct i2c_adapter *adp, + struct fb_var_screeninfo *einfo, + int *dvi) +{ + u8 buf0[2] = {0, 0}; + int dat = 0; + u16 addr = 0x50; + struct i2c_msg msg[2] = { + { + .addr = addr, + .flags = 0, + .len = 1, + .buf = buf0, + }, { + .addr = addr, + .flags = I2C_M_RD, + .len = EDID_LENGTH, + .buf = edid, + }, + }; + + if (adp == NULL || einfo == NULL) + return -EINVAL; + + buf0[0] = 0x00; + memset(&edid, 0, sizeof(edid)); + memset(einfo, 0, sizeof(struct fb_var_screeninfo)); + dat = i2c_transfer(adp, msg, 2); + + /* If 0x50 fails, try 0x37. */ + if (edid[1] == 0x00) { + msg[0].addr = msg[1].addr = 0x37; + dat = i2c_transfer(adp, msg, 2); + } + + if (edid[1] == 0x00) + return -ENOENT; + + *dvi = 0; + if ((edid[20] == 0x80) || (edid[20] == 0x88) || (edid[20] == 0)) + *dvi = 1; + + dat = fb_parse_edid(edid, einfo); + if (dat) + return -dat; + + /* This is valid for version 1.3 of the EDID */ + if ((edid[18] == 1) && (edid[19] == 3)) { + einfo->height = edid[21] * 10; + einfo->width = edid[22] * 10; + } + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/Kconfig @@ -0,0 +1,83 @@ +config FB_MXC + tristate "MXC Framebuffer support" + depends on FB && (MXC_IPU || ARCH_MX21 || ARCH_MX27 || ARCH_MX25) + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + select FB_MODE_HELPERS + default y + help + This is a framebuffer device for the MXC LCD Controller. + See for information on framebuffer + devices. + + If you plan to use the LCD display with your MXC system, say + Y here. + +config FB_MXC_SYNC_PANEL + depends on FB_MXC + tristate "Synchronous Panel Framebuffer" + default y + +config FB_MXC_EPSON_VGA_SYNC_PANEL + depends on FB_MXC_SYNC_PANEL + tristate "Epson VGA Panel" + default n + +config FB_MXC_TVOUT_TVE + tristate "MXC TVE TV Out Encoder" + depends on FB_MXC_SYNC_PANEL + depends on MXC_IPU_V3 + +config FB_MXC_CLAA_WVGA_SYNC_PANEL + depends on FB_MXC_SYNC_PANEL + tristate "CLAA WVGA Panel" + +config FB_MXC_CH7026 + depends on FB_MXC_SYNC_PANEL + tristate "Chrontel CH7026 VGA Interface Chip" + +config FB_MXC_TVOUT_CH7024 + tristate "CH7024 TV Out Encoder" + depends on FB_MXC_SYNC_PANEL + +config FB_MXC_LOW_PWR_DISPLAY + bool "Low Power Display Refresh Mode" + depends on FB_MXC_SYNC_PANEL && MXC_FB_IRAM + default y + +config FB_MXC_INTERNAL_MEM + bool "Framebuffer in Internal RAM" + depends on FB_MXC_SYNC_PANEL && MXC_FB_IRAM + default y + +config FB_MXC_ASYNC_PANEL + depends on FB_MXC + bool "Asynchronous Panels" + default n + +menu "Asynchronous Panel Type" + depends on FB_MXC_ASYNC_PANEL && FB_MXC + +config FB_MXC_EPSON_PANEL + depends on FB_MXC_ASYNC_PANEL + default n + bool "Epson 176x220 Panel" + +endmenu + +choice + prompt "Async Panel Interface Type" + depends on FB_MXC_ASYNC_PANEL && FB_MXC + default FB_MXC_ASYNC_PANEL_IFC_16_BIT + +config FB_MXC_ASYNC_PANEL_IFC_8_BIT + bool "8-bit Parallel Bus Interface" + +config FB_MXC_ASYNC_PANEL_IFC_16_BIT + bool "16-bit Parallel Bus Interface" + +config FB_MXC_ASYNC_PANEL_IFC_SERIAL + bool "Serial Bus Interface" + +endchoice --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb_claa_wvga.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb_claa_wvga.c @@ -0,0 +1,237 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxcfb_claa_wvga.c + * + * @brief MXC Frame buffer driver for SDC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void lcd_poweron(void); +static void lcd_poweroff(void); + +static struct platform_device *plcd_dev; +static struct regulator *io_reg; +static struct regulator *core_reg; +static int lcd_on; + +static struct fb_videomode video_modes[] = { + { + /* 800x480 @ 55 Hz , pixel clk @ 25MHz */ + "CLAA-WVGA", 55, 800, 480, 40000, 40, 40, 5, 5, 20, 10, + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +static void lcd_init_fb(struct fb_info *info) +{ + struct fb_var_screeninfo var; + + memset(&var, 0, sizeof(var)); + + fb_videomode_to_var(&var, &video_modes[0]); + + var.activate = FB_ACTIVATE_ALL; + var.yres_virtual = var.yres * 2; + + acquire_console_sem(); + info->flags |= FBINFO_MISC_USEREVENT; + fb_set_var(info, &var); + info->flags &= ~FBINFO_MISC_USEREVENT; + release_console_sem(); +} + +static int lcd_fb_event(struct notifier_block *nb, unsigned long val, void *v) +{ + struct fb_event *event = v; + + if (strcmp(event->info->fix.id, "DISP3 BG")) { + return 0; + } + + switch (val) { + case FB_EVENT_FB_REGISTERED: + lcd_init_fb(event->info); + lcd_poweron(); + break; + case FB_EVENT_BLANK: + if ((event->info->var.xres != 800) || + (event->info->var.yres != 480)) { + break; + } + if (*((int *)event->data) == FB_BLANK_UNBLANK) { + lcd_poweron(); + } else { + lcd_poweroff(); + } + break; + } + return 0; +} + +static struct notifier_block nb = { + .notifier_call = lcd_fb_event, +}; + +/*! + * This function is called whenever the SPI slave device is detected. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devinit lcd_probe(struct platform_device *pdev) +{ + int i; + struct mxc_lcd_platform_data *plat = pdev->dev.platform_data; + + if (plat) { + if (plat->reset) + plat->reset(); + + io_reg = regulator_get(&pdev->dev, plat->io_reg); + if (IS_ERR(io_reg)) + io_reg = NULL; + core_reg = regulator_get(&pdev->dev, plat->core_reg); + if (!IS_ERR(core_reg)) { + regulator_set_voltage(io_reg, 1800000, 1800000); + } else { + core_reg = NULL; + } + } + + for (i = 0; i < num_registered_fb; i++) { + if (strcmp(registered_fb[i]->fix.id, "DISP3 BG") == 0) { + lcd_init_fb(registered_fb[i]); + fb_show_logo(registered_fb[i], 0); + lcd_poweron(); + } else if (strcmp(registered_fb[i]->fix.id, "DISP3 FG") == 0) { + lcd_init_fb(registered_fb[i]); + } + } + + fb_register_client(&nb); + + plcd_dev = pdev; + + return 0; +} + +static int __devexit lcd_remove(struct platform_device *pdev) +{ + fb_unregister_client(&nb); + lcd_poweroff(); + if (io_reg) + regulator_put(io_reg); + if (core_reg) + regulator_put(core_reg); + + return 0; +} + +#ifdef CONFIG_PM +static int lcd_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int lcd_resume(struct platform_device *pdev) +{ + return 0; +} +#else +#define lcd_suspend NULL +#define lcd_resume NULL +#endif + +/*! + * platform driver structure for CLAA WVGA + */ +static struct platform_driver lcd_driver = { + .driver = { + .name = "lcd_claa"}, + .probe = lcd_probe, + .remove = __devexit_p(lcd_remove), + .suspend = lcd_suspend, + .resume = lcd_resume, +}; + +/* + * Send Power On commands to L4F00242T03 + * + */ +static void lcd_poweron(void) +{ + if (lcd_on) + return; + + dev_dbg(&plcd_dev->dev, "turning on LCD\n"); + if (core_reg) + regulator_enable(core_reg); + if (io_reg) + regulator_enable(io_reg); + lcd_on = 1; +} + +/* + * Send Power Off commands to L4F00242T03 + * + */ +static void lcd_poweroff(void) +{ + lcd_on = 0; + dev_dbg(&plcd_dev->dev, "turning off LCD\n"); + if (io_reg) + regulator_disable(io_reg); + if (core_reg) + regulator_disable(core_reg); +} + +static int __init claa_lcd_init(void) +{ + return platform_driver_register(&lcd_driver); +} + +static void __exit claa_lcd_exit(void) +{ + platform_driver_unregister(&lcd_driver); +} + +module_init(claa_lcd_init); +module_exit(claa_lcd_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CLAA WVGA LCD init driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb.c @@ -0,0 +1,1377 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxcfb.c + * + * @brief MXC Frame buffer driver for SDC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Driver name + */ +#define MXCFB_NAME "mxc_sdc_fb" +/*! + * Structure containing the MXC specific framebuffer information. + */ +struct mxcfb_info { + int blank; + ipu_channel_t ipu_ch; + uint32_t ipu_ch_irq; + uint32_t cur_ipu_buf; + + u32 pseudo_palette[16]; + + struct semaphore flip_sem; + spinlock_t fb_lock; +}; + +struct mxcfb_data { + struct fb_info *fbi; + struct fb_info *fbi_ovl; + volatile int32_t vsync_flag; + wait_queue_head_t vsync_wq; + wait_queue_head_t suspend_wq; + bool suspended; + int backlight_level; +}; + +struct mxcfb_alloc_list { + struct list_head list; + dma_addr_t phy_addr; + void *cpu_addr; + u32 size; +}; + +static struct mxcfb_data mxcfb_drv_data; + +static char *fb_mode = NULL; +static unsigned long default_bpp = 16; +#ifdef CONFIG_FB_MXC_INTERNAL_MEM +static struct clk *iram_clk; +#endif +LIST_HEAD(fb_alloc_list); + +static uint32_t bpp_to_pixfmt(int bpp) +{ + uint32_t pixfmt = 0; + switch (bpp) { + case 24: + pixfmt = IPU_PIX_FMT_BGR24; + break; + case 32: + pixfmt = IPU_PIX_FMT_BGR32; + break; + case 16: + pixfmt = IPU_PIX_FMT_RGB565; + break; + } + return pixfmt; +} + +extern void gpio_lcd_active(void); +extern void gpio_lcd_inactive(void); +static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id); +static int mxcfb_blank(int blank, struct fb_info *info); +static int mxcfb_map_video_memory(struct fb_info *fbi, bool use_internal_ram); +static int mxcfb_unmap_video_memory(struct fb_info *fbi); + +/* + * Set fixed framebuffer parameters based on variable settings. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_fix(struct fb_info *info) +{ + struct fb_fix_screeninfo *fix = &info->fix; + struct fb_var_screeninfo *var = &info->var; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + + if (mxc_fbi->ipu_ch == MEM_SDC_FG) + strncpy(fix->id, "DISP3 FG", 8); + else + strncpy(fix->id, "DISP3 BG", 8); + + fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; + + fix->type = FB_TYPE_PACKED_PIXELS; + fix->accel = FB_ACCEL_NONE; + fix->visual = FB_VISUAL_TRUECOLOR; + fix->xpanstep = 1; + fix->ypanstep = 1; + + return 0; +} + +/* + * Set framebuffer parameters and change the operating mode. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_par(struct fb_info *fbi) +{ + int retval; + bool use_iram = false; + u32 mem_len; + ipu_di_signal_cfg_t sig_cfg; + ipu_panel_t mode = IPU_PANEL_TFT; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + ipu_disable_irq(mxc_fbi->ipu_ch_irq); + ipu_disable_channel(mxc_fbi->ipu_ch, true); + ipu_uninit_channel(mxc_fbi->ipu_ch); + ipu_clear_irq(mxc_fbi->ipu_ch_irq); + mxcfb_set_fix(fbi); + + mem_len = fbi->var.yres_virtual * fbi->fix.line_length; + if (mem_len > fbi->fix.smem_len) { + if (fbi->fix.smem_start) + mxcfb_unmap_video_memory(fbi); + +#ifdef CONFIG_FB_MXC_INTERNAL_MEM + if (mxc_fbi->ipu_ch == MEM_SDC_BG) { + use_iram = true; + } +#endif + if (mxcfb_map_video_memory(fbi, use_iram) < 0) + return -ENOMEM; + } + + ipu_init_channel(mxc_fbi->ipu_ch, NULL); + + /* Clear the screen */ + memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); + + if (mxc_fbi->ipu_ch == MEM_SDC_BG) { + memset(&sig_cfg, 0, sizeof(sig_cfg)); + if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT) + sig_cfg.Hsync_pol = true; + if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) + sig_cfg.Vsync_pol = true; + if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL)) + sig_cfg.clk_pol = true; + if (fbi->var.sync & FB_SYNC_DATA_INVERT) + sig_cfg.data_pol = true; + if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT)) + sig_cfg.enable_pol = true; + if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN) + sig_cfg.clkidle_en = true; + if (fbi->var.sync & FB_SYNC_SHARP_MODE) + mode = IPU_PANEL_SHARP_TFT; + + dev_dbg(fbi->device, "pixclock = %ul Hz\n", + (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL)); + + if (ipu_sdc_init_panel(mode, + (PICOS2KHZ(fbi->var.pixclock)) * 1000UL, + fbi->var.xres, fbi->var.yres, + (fbi->var.sync & FB_SYNC_SWAP_RGB) ? + IPU_PIX_FMT_BGR666 : IPU_PIX_FMT_RGB666, + fbi->var.left_margin, + fbi->var.hsync_len, + fbi->var.right_margin, + fbi->var.upper_margin, + fbi->var.vsync_len, + fbi->var.lower_margin, sig_cfg) != 0) { + dev_err(fbi->device, + "mxcfb: Error initializing panel.\n"); + return -EINVAL; + } + + fbi->mode = + (struct fb_videomode *)fb_match_mode(&fbi->var, + &fbi->modelist); + } + + ipu_disp_set_window_pos(mxc_fbi->ipu_ch, 0, 0); + + mxc_fbi->cur_ipu_buf = 1; + sema_init(&mxc_fbi->flip_sem, 1); + fbi->var.xoffset = fbi->var.yoffset = 0; + + retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + fbi->var.xres, fbi->var.yres, + fbi->var.xres_virtual, + IPU_ROTATE_NONE, + fbi->fix.smem_start + + (fbi->fix.line_length * fbi->var.yres), + fbi->fix.smem_start, + 0, 0); + if (retval) { + dev_err(fbi->device, + "ipu_init_channel_buffer error %d\n", retval); + return retval; + } + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) { + ipu_enable_channel(mxc_fbi->ipu_ch); + } + + return 0; +} + +/* + * Check framebuffer variable parameters and adjust to valid values. + * + * @param var framebuffer variable parameters + * + * @param info framebuffer information pointer + */ +static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + u32 vtotal; + u32 htotal; + + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; + +#ifdef CONFIG_FB_MXC_INTERNAL_MEM + if ((info->fix.smem_start == FB_RAM_BASE_ADDR) && + ((var->yres_virtual * var->xres_virtual * var->bits_per_pixel / 8) > + FB_RAM_SIZE)) { + return -EINVAL; + } +#endif + + if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && + (var->bits_per_pixel != 16)) { + var->bits_per_pixel = default_bpp; + } + + switch (var->bits_per_pixel) { + case 16: + var->red.length = 5; + var->red.offset = 11; + var->red.msb_right = 0; + + var->green.length = 6; + var->green.offset = 5; + var->green.msb_right = 0; + + var->blue.length = 5; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 24: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 32: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 8; + var->transp.offset = 24; + var->transp.msb_right = 0; + break; + } + + if (var->pixclock < 1000) { + htotal = var->xres + var->right_margin + var->hsync_len + + var->left_margin; + vtotal = var->yres + var->lower_margin + var->vsync_len + + var->upper_margin; + var->pixclock = (vtotal * htotal * 6UL) / 100UL; + var->pixclock = KHZ2PICOS(var->pixclock); + dev_dbg(info->device, + "pixclock set for 60Hz refresh = %u ps\n", + var->pixclock); + } + + var->height = -1; + var->width = -1; + var->grayscale = 0; + + /* nonstd used for YUV formats, but only RGB supported */ + var->nonstd = 0; + + return 0; +} + +static inline u_int _chan_to_field(u_int chan, struct fb_bitfield *bf) +{ + chan &= 0xffff; + chan >>= 16 - bf->length; + return chan << bf->offset; +} +static int +mxcfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int trans, struct fb_info *fbi) +{ + unsigned int val; + int ret = 1; + + /* + * If greyscale is true, then we convert the RGB value + * to greyscale no matter what visual we are using. + */ + if (fbi->var.grayscale) + red = green = blue = (19595 * red + 38470 * green + + 7471 * blue) >> 16; + switch (fbi->fix.visual) { + case FB_VISUAL_TRUECOLOR: + /* + * 16-bit True Colour. We encode the RGB value + * according to the RGB bitfield information. + */ + if (regno < 16) { + u32 *pal = fbi->pseudo_palette; + + val = _chan_to_field(red, &fbi->var.red); + val |= _chan_to_field(green, &fbi->var.green); + val |= _chan_to_field(blue, &fbi->var.blue); + + pal[regno] = val; + ret = 0; + } + break; + + case FB_VISUAL_STATIC_PSEUDOCOLOR: + case FB_VISUAL_PSEUDOCOLOR: + break; + } + + return ret; +} + +/* + * Function to handle custom ioctls for MXC framebuffer. + * + * @param inode inode struct + * + * @param file file struct + * + * @param cmd Ioctl command to handle + * + * @param arg User pointer to command arguments + * + * @param fbi framebuffer information pointer + */ +static int mxcfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg) +{ + int retval = 0; + int __user *argp = (void __user *)arg; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + switch (cmd) { + case MXCFB_SET_GBL_ALPHA: + { + struct mxcfb_gbl_alpha ga; + if (copy_from_user(&ga, (void *)arg, sizeof(ga))) { + retval = -EFAULT; + break; + } + retval = + ipu_sdc_set_global_alpha((bool) ga.enable, + ga.alpha); + dev_dbg(fbi->device, "Set global alpha to %d\n", + ga.alpha); + break; + } + case MXCFB_SET_CLR_KEY: + { + struct mxcfb_color_key key; + if (copy_from_user(&key, (void *)arg, sizeof(key))) { + retval = -EFAULT; + break; + } + retval = ipu_sdc_set_color_key(MEM_SDC_BG, key.enable, + key.color_key); + dev_dbg(fbi->device, "Set color key to 0x%08X\n", + key.color_key); + break; + } + case MXCFB_WAIT_FOR_VSYNC: + { +#ifndef CONFIG_ARCH_MX3 + mxcfb_drv_data.vsync_flag = 0; + ipu_enable_irq(IPU_IRQ_SDC_DISP3_VSYNC); + if (!wait_event_interruptible_timeout + (mxcfb_drv_data.vsync_wq, + mxcfb_drv_data.vsync_flag != 0, 1 * HZ)) { + dev_err(fbi->device, + "MXCFB_WAIT_FOR_VSYNC: timeout\n"); + retval = -ETIME; + break; + } else if (signal_pending(current)) { + dev_err(fbi->device, + "MXCFB_WAIT_FOR_VSYNC: interrupt received\n"); + retval = -ERESTARTSYS; + break; + } +#endif + break; + } + case MXCFB_GET_FB_IPU_CHAN: + { + struct mxcfb_info *mxc_fbi = + (struct mxcfb_info *)fbi->par; + + if (put_user(mxc_fbi->ipu_ch, argp)) + return -EFAULT; + + break; + } + default: + retval = -EINVAL; + } + return retval; +} + +/* + * Function to handle custom ioctls for MXC framebuffer. + * + * @param inode inode struct + * + * @param file file struct + * + * @param cmd Ioctl command to handle + * + * @param arg User pointer to command arguments + * + * @param fbi framebuffer information pointer + */ +static int mxcfb_ioctl_ovl(struct fb_info *fbi, unsigned int cmd, + unsigned long arg) +{ + int retval = 0; + int __user *argp = (void __user *)arg; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + switch (cmd) { + case FBIO_ALLOC: + { + int size; + struct mxcfb_alloc_list *mem; + + mem = kzalloc(sizeof(*mem), GFP_KERNEL); + if (mem == NULL) + return -ENOMEM; + + if (get_user(size, argp)) + return -EFAULT; + + mem->size = PAGE_ALIGN(size); + + mem->cpu_addr = dma_alloc_coherent(fbi->device, size, + &mem->phy_addr, + GFP_DMA); + if (mem->cpu_addr == NULL) { + kfree(mem); + return -ENOMEM; + } + + list_add(&mem->list, &fb_alloc_list); + + dev_dbg(fbi->device, "allocated %d bytes @ 0x%08X\n", + mem->size, mem->phy_addr); + + if (put_user(mem->phy_addr, argp)) + return -EFAULT; + + break; + } + case FBIO_FREE: + { + unsigned long offset; + struct mxcfb_alloc_list *mem; + + if (get_user(offset, argp)) + return -EFAULT; + + retval = -EINVAL; + list_for_each_entry(mem, &fb_alloc_list, list) { + if (mem->phy_addr == offset) { + list_del(&mem->list); + dma_free_coherent(fbi->device, + mem->size, + mem->cpu_addr, + mem->phy_addr); + kfree(mem); + retval = 0; + break; + } + } + + break; + } + case MXCFB_SET_OVERLAY_POS: + { + struct mxcfb_pos pos; + if (copy_from_user(&pos, (void *)arg, sizeof(pos))) { + retval = -EFAULT; + break; + } + retval = ipu_disp_set_window_pos(mxc_fbi->ipu_ch, + pos.x, pos.y); + break; + } + case MXCFB_GET_FB_IPU_CHAN: + { + struct mxcfb_info *mxc_fbi = + (struct mxcfb_info *)fbi->par; + + if (put_user(mxc_fbi->ipu_ch, argp)) + return -EFAULT; + + break; + } + default: + retval = -EINVAL; + } + return retval; +} + +/* + * mxcfb_blank(): + * Blank the display. + */ +static int mxcfb_blank(int blank, struct fb_info *info) +{ + int retval; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + + dev_dbg(info->device, "blank = %d\n", blank); + + if (mxc_fbi->blank == blank) + return 0; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + mxc_fbi->blank = blank; + + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + ipu_disable_channel(MEM_SDC_BG, true); + gpio_lcd_inactive(); + break; + case FB_BLANK_UNBLANK: + gpio_lcd_active(); + ipu_enable_channel(MEM_SDC_BG); + break; + } + return 0; +} + +/* + * mxcfb_blank_ovl(): + * Blank the display. + */ +static int mxcfb_blank_ovl(int blank, struct fb_info *info) +{ + int retval; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + + dev_dbg(info->device, "ovl blank = %d\n", blank); + + if (mxc_fbi->blank == blank) + return 0; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + mxc_fbi->blank = blank; + + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + ipu_disable_channel(MEM_SDC_FG, true); + break; + case FB_BLANK_UNBLANK: + ipu_enable_channel(MEM_SDC_FG); + break; + } + return 0; +} + +/* + * Pan or Wrap the Display + * + * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag + * + * @param var Variable screen buffer information + * @param info Framebuffer information pointer + */ +static int +mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) +{ + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + unsigned long lock_flags = 0; + int retval; + u_int y_bottom; + unsigned long base; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + if (var->xoffset > 0) { + dev_dbg(info->device, "x panning not supported\n"); + return -EINVAL; + } + + if ((info->var.xoffset == var->xoffset) && + (info->var.yoffset == var->yoffset)) { + return 0; // No change, do nothing + } + + y_bottom = var->yoffset; + + if (!(var->vmode & FB_VMODE_YWRAP)) { + y_bottom += var->yres; + } + + if (y_bottom > info->var.yres_virtual) { + return -EINVAL; + } + + base = (var->yoffset * var->xres_virtual + var->xoffset); + base *= (var->bits_per_pixel) / 8; + base += info->fix.smem_start; + + down(&mxc_fbi->flip_sem); + + spin_lock_irqsave(&mxc_fbi->fb_lock, lock_flags); + + dev_dbg(info->device, "Updating SDC BG buf %d address=0x%08lX\n", + mxc_fbi->cur_ipu_buf, base); + + mxc_fbi->cur_ipu_buf = !mxc_fbi->cur_ipu_buf; + if (ipu_update_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf, base) == 0) { + ipu_select_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf); + ipu_clear_irq(mxc_fbi->ipu_ch_irq); + ipu_enable_irq(mxc_fbi->ipu_ch_irq); + } else { + dev_err(info->device, + "Error updating SDC buf %d to address=0x%08lX\n", + mxc_fbi->cur_ipu_buf, base); + } + + spin_unlock_irqrestore(&mxc_fbi->fb_lock, lock_flags); + + dev_dbg(info->device, "Update complete\n"); + + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; + + if (var->vmode & FB_VMODE_YWRAP) { + info->var.vmode |= FB_VMODE_YWRAP; + } else { + info->var.vmode &= ~FB_VMODE_YWRAP; + } + + return 0; +} + +/* + * Function to handle custom mmap for MXC framebuffer. + * + * @param fbi framebuffer information pointer + * + * @param vma Pointer to vm_area_struct + */ +static int mxcfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) +{ + bool found = false; + u32 len; + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + struct mxcfb_alloc_list *mem; + + if (offset < fbi->fix.smem_len) { + /* mapping framebuffer memory */ + len = fbi->fix.smem_len - offset; + vma->vm_pgoff = (fbi->fix.smem_start + offset) >> PAGE_SHIFT; + } else { + list_for_each_entry(mem, &fb_alloc_list, list) { + if (offset == mem->phy_addr) { + found = true; + len = mem->size; + break; + } + } + if (!found) { + return -EINVAL; + } + } + + len = PAGE_ALIGN(len); + if (vma->vm_end - vma->vm_start > len) { + return -EINVAL; + } + + /* make buffers write-thru cacheable */ + vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) & + ~L_PTE_BUFFERABLE); + + vma->vm_flags |= VM_IO | VM_RESERVED; + + if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + vma->vm_end - vma->vm_start, vma->vm_page_prot)) { + dev_dbg(fbi->device, "mmap remap_pfn_range failed\n"); + return -ENOBUFS; + + } + + return 0; +} + +/*! + * This structure contains the pointers to the control functions that are + * invoked by the core framebuffer driver to perform operations like + * blitting, rectangle filling, copy regions and cursor definition. + */ +static struct fb_ops mxcfb_ops = { + .owner = THIS_MODULE, + .fb_set_par = mxcfb_set_par, + .fb_check_var = mxcfb_check_var, + .fb_setcolreg = mxcfb_setcolreg, + .fb_pan_display = mxcfb_pan_display, + .fb_ioctl = mxcfb_ioctl, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_blank = mxcfb_blank, +}; + +static struct fb_ops mxcfb_ovl_ops = { + .owner = THIS_MODULE, + .fb_set_par = mxcfb_set_par, + .fb_check_var = mxcfb_check_var, + .fb_setcolreg = mxcfb_setcolreg, + .fb_pan_display = mxcfb_pan_display, + .fb_ioctl = mxcfb_ioctl_ovl, + .fb_mmap = mxcfb_mmap, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_blank = mxcfb_blank_ovl, +}; + +static irqreturn_t mxcfb_vsync_irq_handler(int irq, void *dev_id) +{ + struct mxcfb_data *fb_data = dev_id; + + ipu_disable_irq(irq); + + fb_data->vsync_flag = 1; + wake_up_interruptible(&fb_data->vsync_wq); + return IRQ_HANDLED; +} + +static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id) +{ + struct fb_info *fbi = dev_id; + struct mxcfb_info *mxc_fbi = fbi->par; + + up(&mxc_fbi->flip_sem); + ipu_disable_irq(irq); + return IRQ_HANDLED; +} + +#ifdef CONFIG_PM +/* + * Power management hooks. Note that we won't be called from IRQ context, + * unlike the blank functions above, so we may sleep. + */ + +/* + * Suspends the framebuffer and blanks the screen. Power management support + */ +static int mxcfb_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct mxcfb_data *drv_data = platform_get_drvdata(pdev); + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)drv_data->fbi->par; + struct mxcfb_info *mxc_fbi_ovl = + (struct mxcfb_info *)drv_data->fbi_ovl->par; +#ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY + void *fbmem; +#endif + + drv_data->suspended = true; + + acquire_console_sem(); + fb_set_suspend(drv_data->fbi, 1); + fb_set_suspend(drv_data->fbi_ovl, 1); + release_console_sem(); + + if (mxc_fbi_ovl->blank == FB_BLANK_UNBLANK) { + ipu_disable_channel(MEM_SDC_FG, true); + } + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) { +#ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY + if (drv_data->fbi->fix.smem_start != FB_RAM_BASE_ADDR) { + fbmem = ioremap(FB_RAM_BASE_ADDR, FB_RAM_SIZE); + memcpy(fbmem, drv_data->fbi->screen_base, FB_RAM_SIZE); + iounmap(fbmem); + mxc_fbi->cur_ipu_buf = !mxc_fbi->cur_ipu_buf; + ipu_update_channel_buffer(MEM_SDC_BG, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf, + FB_RAM_BASE_ADDR); + ipu_select_buffer(MEM_SDC_BG, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf); + } + ipu_lowpwr_display_enable(); +#else + ipu_disable_channel(MEM_SDC_BG, true); + gpio_lcd_inactive(); +#endif + } + return 0; +} + +/* + * Resumes the framebuffer and unblanks the screen. Power management support + */ +static int mxcfb_resume(struct platform_device *pdev) +{ + struct mxcfb_data *drv_data = platform_get_drvdata(pdev); + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)drv_data->fbi->par; + struct mxcfb_info *mxc_fbi_ovl = + (struct mxcfb_info *)drv_data->fbi_ovl->par; + + drv_data->suspended = false; + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) { +#ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY + ipu_lowpwr_display_disable(); + if (drv_data->fbi->fix.smem_start != FB_RAM_BASE_ADDR) { + mxc_fbi->cur_ipu_buf = !mxc_fbi->cur_ipu_buf; + ipu_update_channel_buffer(MEM_SDC_BG, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf, + drv_data->fbi->fix. + smem_start); + ipu_select_buffer(MEM_SDC_BG, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf); + } +#else + gpio_lcd_active(); + ipu_enable_channel(MEM_SDC_BG); +#endif + } + + if (mxc_fbi_ovl->blank == FB_BLANK_UNBLANK) { + ipu_enable_channel(MEM_SDC_FG); + } + + acquire_console_sem(); + fb_set_suspend(drv_data->fbi, 0); + fb_set_suspend(drv_data->fbi_ovl, 0); + release_console_sem(); + + wake_up_interruptible(&drv_data->suspend_wq); + return 0; +} +#else +#define mxcfb_suspend NULL +#define mxcfb_resume NULL +#endif + +/* + * Main framebuffer functions + */ + +/*! + * Allocates the DRAM memory for the frame buffer. This buffer is remapped + * into a non-cached, non-buffered, memory region to allow palette and pixel + * writes to occur without flushing the cache. Once this area is remapped, + * all virtual memory access to the video memory should occur at the new region. + * + * @param fbi framebuffer information pointer + * + * @param use_internal_ram flag on whether to use internal RAM for memory + * + * @return Error code indicating success or failure + */ +static int mxcfb_map_video_memory(struct fb_info *fbi, bool use_internal_ram) +{ + int retval = 0; + +#ifdef CONFIG_FB_MXC_INTERNAL_MEM + if (use_internal_ram) { + fbi->fix.smem_len = FB_RAM_SIZE; + fbi->fix.smem_start = FB_RAM_BASE_ADDR; + if (fbi->fix.smem_len < + (fbi->var.yres_virtual * fbi->fix.line_length)) { + dev_err(fbi->device, + "Not enough internal RAM for framebuffer configuration\n"); + retval = -EINVAL; + goto err0; + } + + if (request_mem_region(fbi->fix.smem_start, fbi->fix.smem_len, + fbi->device->driver->name) == NULL) { + dev_err(fbi->device, + "Unable to request internal RAM\n"); + retval = -ENOMEM; + goto err0; + } + + if (!(fbi->screen_base = ioremap(fbi->fix.smem_start, + fbi->fix.smem_len))) { + dev_err(fbi->device, + "Unable to map fb memory to virtual address\n"); + release_mem_region(fbi->fix.smem_start, + fbi->fix.smem_len); + retval = -EIO; + goto err0; + } + + iram_clk = clk_get(NULL, "iram_clk"); + clk_enable(iram_clk); + } else +#endif + { + fbi->fix.smem_len = fbi->var.yres_virtual * + fbi->fix.line_length; + fbi->screen_base = + dma_alloc_writecombine(fbi->device, + fbi->fix.smem_len, + (dma_addr_t *) & fbi->fix.smem_start, + GFP_DMA); + + if (fbi->screen_base == 0) { + dev_err(fbi->device, + "Unable to allocate framebuffer memory\n"); + retval = -EBUSY; + goto err0; + } + } + + dev_dbg(fbi->device, "allocated fb @ paddr=0x%08X, size=%d.\n", + (uint32_t) fbi->fix.smem_start, fbi->fix.smem_len); + + fbi->screen_size = fbi->fix.smem_len; + + /* Clear the screen */ + memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); + + return 0; + + err0: + fbi->fix.smem_len = 0; + fbi->fix.smem_start = 0; + fbi->screen_base = NULL; + return retval; +} + +/*! + * De-allocates the DRAM memory for the frame buffer. + * + * @param fbi framebuffer information pointer + * + * @return Error code indicating success or failure + */ +static int mxcfb_unmap_video_memory(struct fb_info *fbi) +{ +#ifdef CONFIG_FB_MXC_INTERNAL_MEM + if (fbi->fix.smem_start == FB_RAM_BASE_ADDR) { + iounmap(fbi->screen_base); + release_mem_region(fbi->fix.smem_start, fbi->fix.smem_len); + fbi->fix.smem_start = 0; + fbi->fix.smem_len = 0; + clk_disable(iram_clk); + } else +#endif + { + dma_free_writecombine(fbi->device, fbi->fix.smem_len, + fbi->screen_base, fbi->fix.smem_start); + } + fbi->screen_base = 0; + fbi->fix.smem_start = 0; + fbi->fix.smem_len = 0; + return 0; +} + +/*! + * Initializes the framebuffer information pointer. After allocating + * sufficient memory for the framebuffer structure, the fields are + * filled with custom information passed in from the configurable + * structures. This includes information such as bits per pixel, + * color maps, screen width/height and RGBA offsets. + * + * @return Framebuffer structure initialized with our information + */ +static struct fb_info *mxcfb_init_fbinfo(struct device *dev, struct fb_ops *ops) +{ + struct fb_info *fbi; + struct mxcfb_info *mxcfbi; + + /* + * Allocate sufficient memory for the fb structure + */ + fbi = framebuffer_alloc(sizeof(struct mxcfb_info), dev); + if (!fbi) + return NULL; + + mxcfbi = (struct mxcfb_info *)fbi->par; + + fbi->var.activate = FB_ACTIVATE_NOW; + + fbi->fbops = ops; + fbi->flags = FBINFO_FLAG_DEFAULT; + fbi->pseudo_palette = mxcfbi->pseudo_palette; + + spin_lock_init(&mxcfbi->fb_lock); + + /* + * Allocate colormap + */ + fb_alloc_cmap(&fbi->cmap, 16, 0); + + return fbi; +} + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxcfb_probe(struct platform_device *pdev) +{ + char *mode = pdev->dev.platform_data; + struct fb_info *fbi; + struct mxcfb_info *mxcfbi; + struct fb_info *fbi_ovl; + int ret = 0; + + /* + * Initialize FB structures + */ + fbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops); + if (!fbi) { + ret = -ENOMEM; + goto err0; + } + mxcfbi = (struct mxcfb_info *)fbi->par; + + mxcfbi->ipu_ch_irq = IPU_IRQ_SDC_BG_EOF; + mxcfbi->cur_ipu_buf = 0; + mxcfbi->ipu_ch = MEM_SDC_BG; + + ipu_sdc_set_global_alpha(true, 0xFF); + ipu_sdc_set_color_key(MEM_SDC_BG, false, 0); + + if (ipu_request_irq(IPU_IRQ_SDC_BG_EOF, mxcfb_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(&pdev->dev, "Error registering BG irq handler.\n"); + ret = -EBUSY; + goto err1; + } + ipu_disable_irq(IPU_IRQ_SDC_BG_EOF); + + if (fb_mode == NULL) { + fb_mode = mode; + } + + if (!fb_find_mode(&fbi->var, fbi, fb_mode, mxcfb_modedb, + mxcfb_modedb_sz, NULL, default_bpp)) { + ret = -EBUSY; + goto err2; + } + fb_videomode_to_modelist(mxcfb_modedb, mxcfb_modedb_sz, &fbi->modelist); + + /* Default Y virtual size is 2x panel size */ +#ifndef CONFIG_FB_MXC_INTERNAL_MEM + fbi->var.yres_virtual = fbi->var.yres * 2; +#endif + + mxcfb_drv_data.fbi = fbi; + mxcfb_drv_data.backlight_level = 255; + mxcfb_drv_data.suspended = false; + init_waitqueue_head(&mxcfb_drv_data.suspend_wq); + + mxcfbi->blank = FB_BLANK_NORMAL; + ret = mxcfb_set_par(fbi); + if (ret < 0) { + goto err2; + } + mxcfb_blank(FB_BLANK_UNBLANK, fbi); + + /* + * Register framebuffer + */ + ret = register_framebuffer(fbi); + if (ret < 0) { + goto err2; + } + + /* + * Initialize Overlay FB structures + */ + fbi_ovl = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ovl_ops); + if (!fbi_ovl) { + ret = -ENOMEM; + goto err3; + } + mxcfb_drv_data.fbi_ovl = fbi_ovl; + mxcfbi = (struct mxcfb_info *)fbi_ovl->par; + + mxcfbi->ipu_ch_irq = IPU_IRQ_SDC_FG_EOF; + mxcfbi->cur_ipu_buf = 0; + mxcfbi->ipu_ch = MEM_SDC_FG; + + if (ipu_request_irq(IPU_IRQ_SDC_FG_EOF, mxcfb_irq_handler, 0, + MXCFB_NAME, fbi_ovl) != 0) { + dev_err(fbi->device, "Error registering FG irq handler.\n"); + ret = -EBUSY; + goto err4; + } + ipu_disable_irq(mxcfbi->ipu_ch_irq); + + /* Default Y virtual size is 2x panel size */ + fbi_ovl->var = fbi->var; + fbi_ovl->var.yres_virtual = fbi->var.yres * 2; + + /* Overlay is blanked by default */ + mxcfbi->blank = FB_BLANK_NORMAL; + + ret = mxcfb_set_par(fbi_ovl); + if (ret < 0) { + goto err5; + } + + /* + * Register overlay framebuffer + */ + ret = register_framebuffer(fbi_ovl); + if (ret < 0) { + goto err5; + } + + platform_set_drvdata(pdev, &mxcfb_drv_data); + + init_waitqueue_head(&mxcfb_drv_data.vsync_wq); + if (!cpu_is_mx31() && !cpu_is_mx32()) { + if ((ret = ipu_request_irq(IPU_IRQ_SDC_DISP3_VSYNC, + mxcfb_vsync_irq_handler, + 0, MXCFB_NAME, + &mxcfb_drv_data)) < 0) { + goto err6; + } + ipu_disable_irq(IPU_IRQ_SDC_DISP3_VSYNC); + } + + printk(KERN_INFO "mxcfb: fb registered, using mode %s\n", fb_mode); + return 0; + + err6: + unregister_framebuffer(fbi_ovl); + err5: + ipu_free_irq(IPU_IRQ_SDC_FG_EOF, fbi_ovl); + err4: + fb_dealloc_cmap(&fbi_ovl->cmap); + framebuffer_release(fbi_ovl); + err3: + unregister_framebuffer(fbi); + err2: + ipu_free_irq(IPU_IRQ_SDC_BG_EOF, fbi); + err1: + fb_dealloc_cmap(&fbi->cmap); + framebuffer_release(fbi); + err0: + printk(KERN_ERR "mxcfb: failed to register fb\n"); + return ret; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcfb_driver = { + .driver = { + .name = MXCFB_NAME, + }, + .probe = mxcfb_probe, + .suspend = mxcfb_suspend, + .resume = mxcfb_resume, +}; + +/* + * Parse user specified options (`video=trident:') + * example: + * video=trident:800x600,bpp=16,noaccel + */ +int mxcfb_setup(char *options) +{ + char *opt; + if (!options || !*options) + return 0; + while ((opt = strsep(&options, ",")) != NULL) { + if (!*opt) + continue; + if (!strncmp(opt, "bpp=", 4)) + default_bpp = simple_strtoul(opt + 4, NULL, 0); + else + fb_mode = opt; + } + return 0; +} + +/*! + * Main entry function for the framebuffer. The function registers the power + * management callback functions with the kernel and also registers the MXCFB + * callback functions with the core Linux framebuffer driver \b fbmem.c + * + * @return Error code indicating success or failure + */ +int __init mxcfb_init(void) +{ + int ret = 0; +#ifndef MODULE + char *option = NULL; +#endif + +#ifndef MODULE + if (fb_get_options("mxcfb", &option)) + return -ENODEV; + mxcfb_setup(option); +#endif + + ret = platform_driver_register(&mxcfb_driver); + return ret; +} + +void mxcfb_exit(void) +{ + struct fb_info *fbi = mxcfb_drv_data.fbi; + + if (fbi) { + mxcfb_unmap_video_memory(fbi); + + if (&fbi->cmap) + fb_dealloc_cmap(&fbi->cmap); + + unregister_framebuffer(fbi); + framebuffer_release(fbi); + } + + fbi = mxcfb_drv_data.fbi_ovl; + if (fbi) { + mxcfb_unmap_video_memory(fbi); + + if (&fbi->cmap) + fb_dealloc_cmap(&fbi->cmap); + + unregister_framebuffer(fbi); + framebuffer_release(fbi); + } +#ifndef CONFIG_ARCH_MX3 + ipu_free_irq(IPU_IRQ_SDC_DISP3_VSYNC, &mxcfb_drv_data); +#endif + + platform_driver_unregister(&mxcfb_driver); +} + +module_init(mxcfb_init); +module_exit(mxcfb_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC framebuffer driver"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("fb"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb_ch7026.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb_ch7026.c @@ -0,0 +1,369 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxcfb_epson_vga.c + * + * @brief MXC Frame buffer driver for SDC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct i2c_client *ch7026_client; + +static int lcd_init(void); +static void lcd_poweron(struct fb_info *info); +static void lcd_poweroff(void); + +static void (*lcd_reset) (void); +static struct regulator *io_reg; +static struct regulator *core_reg; +static struct regulator *analog_reg; + + /* 8 800x600-60 VESA */ +static struct fb_videomode mode = { + NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA +}; + +static void lcd_init_fb(struct fb_info *info) +{ + struct fb_var_screeninfo var; + + memset(&var, 0, sizeof(var)); + + fb_videomode_to_var(&var, &mode); + + var.activate = FB_ACTIVATE_ALL; + + acquire_console_sem(); + info->flags |= FBINFO_MISC_USEREVENT; + fb_set_var(info, &var); + fb_blank(info, FB_BLANK_UNBLANK); + info->flags &= ~FBINFO_MISC_USEREVENT; + release_console_sem(); +} + +static int lcd_fb_event(struct notifier_block *nb, unsigned long val, void *v) +{ + struct fb_event *event = v; + + if (strcmp(event->info->fix.id, "DISP3 BG - DI1")) + return 0; + + switch (val) { + case FB_EVENT_FB_REGISTERED: + lcd_init_fb(event->info); + lcd_poweron(event->info); + break; + case FB_EVENT_BLANK: + if (*((int *)event->data) == FB_BLANK_UNBLANK) + lcd_poweron(event->info); + else + lcd_poweroff(); + break; + } + return 0; +} + +static struct notifier_block nb = { + .notifier_call = lcd_fb_event, +}; + +/*! + * This function is called whenever the SPI slave device is detected. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devinit lcd_probe(struct device *dev) +{ + int ret = 0; + int i; + struct mxc_lcd_platform_data *plat = dev->platform_data; + + if (plat) { + + io_reg = regulator_get(dev, plat->io_reg); + if (!IS_ERR(io_reg)) { + regulator_set_voltage(io_reg, 1800000, 1800000); + regulator_enable(io_reg); + } else { + io_reg = NULL; + } + + core_reg = regulator_get(dev, plat->core_reg); + if (!IS_ERR(core_reg)) { + regulator_set_voltage(core_reg, 2500000, 2500000); + regulator_enable(core_reg); + } else { + core_reg = NULL; + } + analog_reg = regulator_get(dev, plat->analog_reg); + if (!IS_ERR(analog_reg)) { + regulator_set_voltage(analog_reg, 2775000, 2775000); + regulator_enable(analog_reg); + } else { + analog_reg = NULL; + } + msleep(100); + + lcd_reset = plat->reset; + if (lcd_reset) + lcd_reset(); + } + + for (i = 0; i < num_registered_fb; i++) { + if (strcmp(registered_fb[i]->fix.id, "DISP3 BG - DI1") == 0) { + ret = lcd_init(); + if (ret < 0) + goto err; + + lcd_init_fb(registered_fb[i]); + fb_show_logo(registered_fb[i], 0); + lcd_poweron(registered_fb[i]); + } + } + + fb_register_client(&nb); + return 0; +err: + if (io_reg) + regulator_disable(io_reg); + if (core_reg) + regulator_disable(core_reg); + if (analog_reg) + regulator_disable(analog_reg); + + return ret; +} + +static int __devinit ch7026_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + ch7026_client = client; + + return lcd_probe(&client->dev); +} + +static int __devexit ch7026_remove(struct i2c_client *client) +{ + fb_unregister_client(&nb); + lcd_poweroff(); + regulator_put(io_reg); + regulator_put(core_reg); + regulator_put(analog_reg); + + return 0; +} + +static int ch7026_suspend(struct i2c_client *client, pm_message_t message) +{ + return 0; +} + +static int ch7026_resume(struct i2c_client *client) +{ + return 0; +} + +u8 reg_init[][2] = { + { 0x02, 0x01 }, + { 0x02, 0x03 }, + { 0x03, 0x00 }, + { 0x06, 0x6B }, + { 0x08, 0x08 }, + { 0x09, 0x80 }, + { 0x0C, 0x0A }, + { 0x0D, 0x89 }, + { 0x0F, 0x23 }, + { 0x10, 0x20 }, + { 0x11, 0x20 }, + { 0x12, 0x40 }, + { 0x13, 0x28 }, + { 0x14, 0x80 }, + { 0x15, 0x52 }, + { 0x16, 0x58 }, + { 0x17, 0x74 }, + { 0x19, 0x01 }, + { 0x1A, 0x04 }, + { 0x1B, 0x23 }, + { 0x1C, 0x20 }, + { 0x1D, 0x20 }, + { 0x1F, 0x28 }, + { 0x20, 0x80 }, + { 0x21, 0x12 }, + { 0x22, 0x58 }, + { 0x23, 0x74 }, + { 0x25, 0x01 }, + { 0x26, 0x04 }, + { 0x37, 0x20 }, + { 0x39, 0x20 }, + { 0x3B, 0x20 }, + { 0x41, 0xA2 }, + { 0x4D, 0x03 }, + { 0x4E, 0x13 }, + { 0x4F, 0xB1 }, + { 0x50, 0x3B }, + { 0x51, 0x54 }, + { 0x52, 0x12 }, + { 0x53, 0x13 }, + { 0x55, 0xE5 }, + { 0x5E, 0x80 }, + { 0x69, 0x64 }, + { 0x7D, 0x62 }, + { 0x04, 0x00 }, + { 0x06, 0x69 }, + + /* + NOTE: The following five repeated sentences are used here to wait memory initial complete, please don't remove...(you could refer to Appendix A of programming guide document (CH7025(26)B Programming Guide Rev2.03.pdf) for detailed information about memory initialization! + */ + { 0x03, 0x00 }, + { 0x03, 0x00 }, + { 0x03, 0x00 }, + { 0x03, 0x00 }, + { 0x03, 0x00 }, + + { 0x06, 0x68 }, + { 0x02, 0x02 }, + { 0x02, 0x03 }, +}; + +#define REGMAP_LENGTH (sizeof(reg_init) / (2*sizeof(u8))) + +/* + * Send init commands to L4F00242T03 + * + */ +static int lcd_init(void) +{ + int i; + int dat; + + dev_dbg(&ch7026_client->dev, "initializing CH7026\n"); + + /* read device ID */ + msleep(100); + dat = i2c_smbus_read_byte_data(ch7026_client, 0x00); + dev_dbg(&ch7026_client->dev, "read id = 0x%02X\n", dat); + if (dat != 0x54) + return -ENODEV; + + for (i = 0; i < REGMAP_LENGTH; ++i) { + if (i2c_smbus_write_byte_data + (ch7026_client, reg_init[i][0], reg_init[i][1]) < 0) + return -EIO; + } + + return 0; +} + +static int lcd_on; +/* + * Send Power On commands to L4F00242T03 + * + */ +static void lcd_poweron(struct fb_info *info) +{ + u16 data[4]; + u32 refresh; + + if (lcd_on) + return; + + dev_dbg(&ch7026_client->dev, "turning on LCD\n"); + + data[0] = PICOS2KHZ(info->var.pixclock) / 10; + data[2] = info->var.hsync_len + info->var.left_margin + + info->var.xres + info->var.right_margin; + data[3] = info->var.vsync_len + info->var.upper_margin + + info->var.yres + info->var.lower_margin; + + refresh = data[2] * data[3]; + refresh = (PICOS2KHZ(info->var.pixclock) * 1000) / refresh; + data[1] = refresh * 100; + + lcd_on = 1; +} + +/* + * Send Power Off commands to L4F00242T03 + * + */ +static void lcd_poweroff(void) +{ + if (!lcd_on) + return; + + dev_dbg(&ch7026_client->dev, "turning off LCD\n"); + + lcd_on = 0; +} + +static const struct i2c_device_id ch7026_id[] = { + {"ch7026", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, ch7026_id); + +static struct i2c_driver ch7026_driver = { + .driver = { + .name = "ch7026", + }, + .probe = ch7026_probe, + .remove = ch7026_remove, + .suspend = ch7026_suspend, + .resume = ch7026_resume, + .id_table = ch7026_id, +}; + +static int __init ch7026_init(void) +{ + return i2c_add_driver(&ch7026_driver); +} + +static void __exit ch7026_exit(void) +{ + i2c_del_driver(&ch7026_driver); +} + +module_init(ch7026_init); +module_exit(ch7026_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CH7026 VGA driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb_epson.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb_epson.c @@ -0,0 +1,1158 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxcfb_epson.c + * + * @brief MXC Frame buffer driver for ADC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PARTIAL_REFRESH +#define MXCFB_REFRESH_DEFAULT MXCFB_REFRESH_PARTIAL +/* + * Driver name + */ +#define MXCFB_NAME "MXCFB_EPSON" + +#define MXCFB_SCREEN_TOP_OFFSET 0 +#define MXCFB_SCREEN_LEFT_OFFSET 2 +#define MXCFB_SCREEN_WIDTH 176 +#define MXCFB_SCREEN_HEIGHT 220 + +/*! + * Enum defining Epson panel commands. + */ +enum { + DISON = 0xAF, + DISOFF = 0xAE, + DISCTL = 0xCA, + SD_CSET = 0x15, + SD_PSET = 0x75, + DATCTL = 0xBC, + SLPIN = 0x95, + SLPOUT = 0x94, + DISNOR = 0xA6, + RAMWR = 0x5C, + VOLCTR = 0xC6, + GCP16 = 0xCC, + GCP64 = 0xCB, +}; + +struct mxcfb_info { + int open_count; + int blank; + uint32_t disp_num; + + u32 pseudo_palette[16]; + + int32_t cur_update_mode; + dma_addr_t alloc_start_paddr; + void *alloc_start_vaddr; + u32 alloc_size; + uint32_t snoop_window_size; +}; + +struct mxcfb_data { + struct fb_info *fbi; + volatile int32_t vsync_flag; + wait_queue_head_t vsync_wq; + wait_queue_head_t suspend_wq; + bool suspended; +}; + +static struct mxcfb_data mxcfb_drv_data; +static unsigned long default_bpp = 16; + +void slcd_gpio_config(void); +extern void gpio_lcd_active(void); +static int mxcfb_blank(int blank, struct fb_info *fbi); + +static uint32_t bpp_to_pixfmt(int bpp) +{ + uint32_t pixfmt = 0; + switch (bpp) { + case 24: + pixfmt = IPU_PIX_FMT_BGR24; + break; + case 32: + pixfmt = IPU_PIX_FMT_BGR32; + break; + case 16: + pixfmt = IPU_PIX_FMT_RGB565; + break; + } + return pixfmt; +} + +/*! + * This function sets display region in the Epson panel + * + * @param disp display panel to config + * @param x1 x-coordinate of one vertex. + * @param x2 x-coordinate of second vertex. + * @param y1 y-coordinate of one vertex. + * @param y2 y-coordinate of second vertex. + */ +void set_panel_region(int disp, uint32_t x1, uint32_t x2, + uint32_t y1, uint32_t y2) +{ + uint32_t param[8]; + + memset(param, 0, sizeof(uint32_t) * 8); + param[0] = x1; + param[2] = x2; + param[4] = y1; + param[6] = y2; + + // SD_CSET + ipu_adc_write_cmd(disp, CMD, SD_CSET, param, 4); + // SD_PSET + + ipu_adc_write_cmd(disp, CMD, SD_PSET, &(param[4]), 4); +} + +/*! + * Function to create and initiate template command buffer for ADC. This + * template will be written to Panel memory. + */ +static void init_channel_template(int disp) +{ + /* template command buffer for ADC is 32 */ + uint32_t tempCmd[TEMPLATE_BUF_SIZE]; + uint32_t i = 0; + + memset(tempCmd, 0, sizeof(uint32_t) * TEMPLATE_BUF_SIZE); + /* setup update display region */ + /* whole the screen during init */ + /*WRITE Y COORDINATE CMND */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 0, SINGLE_STEP, SD_PSET); + /*WRITE Y START ADDRESS CMND LSB[22:8] */ + tempCmd[i++] = ipu_adc_template_gen(WR_YADDR, 1, SINGLE_STEP, 0x01); + /*WRITE Y START ADDRESS CMND MSB[22:16] */ + tempCmd[i++] = ipu_adc_template_gen(WR_YADDR, 1, SINGLE_STEP, 0x09); + /*WRITE Y STOP ADDRESS CMND LSB */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 1, SINGLE_STEP, + MXCFB_SCREEN_HEIGHT - 1); + /*WRITE Y STOP ADDRESS CMND MSB */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 1, SINGLE_STEP, 0); + /*WRITE X COORDINATE CMND */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 0, SINGLE_STEP, SD_CSET); + /*WRITE X ADDRESS CMND LSB[7:0] */ + tempCmd[i++] = ipu_adc_template_gen(WR_XADDR, 1, SINGLE_STEP, 0x01); + /*WRITE X ADDRESS CMND MSB[22:8] */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 1, SINGLE_STEP, 0); + /*WRITE X STOP ADDRESS CMND LSB */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 1, SINGLE_STEP, + MXCFB_SCREEN_WIDTH + 1); + /*WRITE X STOP ADDRESS CMND MSB */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 1, SINGLE_STEP, 0); + /*WRITE MEMORY CMND MSB */ + tempCmd[i++] = ipu_adc_template_gen(WR_CMND, 0, SINGLE_STEP, RAMWR); + /*WRITE DATA CMND and STP */ + tempCmd[i++] = ipu_adc_template_gen(WR_DATA, 1, STOP, 0); + + ipu_adc_write_template(disp, tempCmd, true); +} + +/*! + * Function to initialize the panel. First it resets the panel and then + * initilizes panel. + */ +static void _init_panel(int disp) +{ + uint32_t cmd_param; + uint32_t i; + + gpio_lcd_active(); + slcd_gpio_config(); + + // DATCTL +#ifdef CONFIG_FB_MXC_ASYNC_PANEL_IFC_16_BIT + // 16-bit 565 mode + cmd_param = 0x28; +#else + // 8-bit 666 mode + cmd_param = 0x08; +#endif + ipu_adc_write_cmd(disp, CMD, DATCTL, &cmd_param, 1); + + // Sleep OUT + ipu_adc_write_cmd(disp, CMD, SLPOUT, 0, 0); + + // Set display to white + // Setup page and column addresses + set_panel_region(disp, MXCFB_SCREEN_LEFT_OFFSET, + MXCFB_SCREEN_WIDTH + MXCFB_SCREEN_LEFT_OFFSET - 1, + 0, MXCFB_SCREEN_HEIGHT - 1); + // Do RAM write cmd + ipu_adc_write_cmd(disp, CMD, RAMWR, 0, 0); +#ifdef CONFIG_FB_MXC_ASYNC_PANEL_IFC_16_BIT + for (i = 0; i < (MXCFB_SCREEN_WIDTH * MXCFB_SCREEN_HEIGHT); i++) +#else + for (i = 0; i < (MXCFB_SCREEN_WIDTH * MXCFB_SCREEN_HEIGHT * 3); i++) +#endif + ipu_adc_write_cmd(disp, DAT, 0xFFFF, 0, 0); + + // Pause 80 ms + mdelay(80); + + // Display ON + ipu_adc_write_cmd(disp, CMD, DISON, 0, 0); + // Pause 200 ms + mdelay(200); + + pr_debug("initialized panel\n"); +} + +#ifdef PARTIAL_REFRESH +static irqreturn_t mxcfb_sys2_eof_irq_handler(int irq, void *dev_id) +{ + ipu_channel_params_t params; + struct fb_info *fbi = dev_id; + struct mxcfb_info *mxc_fbi = fbi->par; + uint32_t stat[2], seg_size; + uint32_t lsb, msb; + uint32_t update_height, start_line, start_addr, end_line, end_addr; + uint32_t stride_pixels = (fbi->fix.line_length * 8) / + fbi->var.bits_per_pixel; + + ipu_adc_get_snooping_status(&stat[0], &stat[1]); + //DPRINTK("snoop status = 0x%08X%08X\n", stat[1], stat[0]); + + if (!stat[0] && !stat[1]) { + dev_err(fbi->device, "error no bus snooping bits set\n"); + return IRQ_HANDLED; + } + ipu_disable_irq(IPU_IRQ_ADC_SYS2_EOF); + + lsb = ffs(stat[0]); + if (lsb) { + lsb--; + } else { + lsb = ffs(stat[1]); + lsb += 32 - 1; + } + msb = fls(stat[1]); + if (msb) { + msb += 32; + } else { + msb = fls(stat[0]); + } + + seg_size = mxc_fbi->snoop_window_size / 64; + + start_addr = lsb * seg_size; // starting address offset + start_line = start_addr / fbi->fix.line_length; + start_addr = start_line * fbi->fix.line_length; // Addr aligned to line + start_addr += fbi->fix.smem_start; + + end_addr = msb * seg_size; // ending address offset + end_line = end_addr / fbi->fix.line_length; + end_line++; + + if (end_line > fbi->var.yres) { + end_line = fbi->var.yres; + } + + update_height = end_line - start_line; + dev_dbg(fbi->device, "updating rows %d to %d, start addr = 0x%08X\n", + start_line, end_line, start_addr); + + ipu_uninit_channel(ADC_SYS1); + params.adc_sys1.disp = mxc_fbi->disp_num; + params.adc_sys1.ch_mode = WriteTemplateNonSeq; + params.adc_sys1.out_left = MXCFB_SCREEN_LEFT_OFFSET; + params.adc_sys1.out_top = start_line; + ipu_init_channel(ADC_SYS1, ¶ms); + + ipu_init_channel_buffer(ADC_SYS1, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + MXCFB_SCREEN_WIDTH, + update_height, + stride_pixels, + IPU_ROTATE_NONE, (dma_addr_t) start_addr, 0, + 0, 0); + ipu_enable_channel(ADC_SYS1); + ipu_select_buffer(ADC_SYS1, IPU_INPUT_BUFFER, 0); + ipu_enable_irq(IPU_IRQ_ADC_SYS1_EOF); + + return IRQ_HANDLED; +} + +static irqreturn_t mxcfb_sys1_eof_irq_handler(int irq, void *dev_id) +{ + ipu_disable_irq(IPU_IRQ_ADC_SYS1_EOF); + ipu_disable_channel(ADC_SYS1, false); + + ipu_enable_channel(ADC_SYS2); + ipu_enable_irq(IPU_IRQ_ADC_SYS2_EOF); + + return IRQ_HANDLED; +} +#endif + +/*! + * Function to initialize Asynchronous Display Controller. It also initilizes + * the ADC System 1 channel. Configure ADC display 0 parallel interface for + * the panel. + * + * @param fbi framebuffer information pointer + */ +static void mxcfb_init_panel(struct fb_info *fbi) +{ + int msb; + int panel_stride; + ipu_channel_params_t params; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + +#ifdef CONFIG_FB_MXC_ASYNC_PANEL_IFC_16_BIT + uint32_t pix_fmt = IPU_PIX_FMT_RGB565; + ipu_adc_sig_cfg_t sig = { 0, 0, 0, 0, 0, 0, 0, 0, + IPU_ADC_BURST_WCS, + IPU_ADC_IFC_MODE_SYS80_TYPE2, + 16, 0, 0, IPU_ADC_SER_NO_RW + }; + mxc_fbi->disp_num = DISP0; +#elif defined(CONFIG_FB_MXC_ASYNC_PANEL_IFC_8_BIT) + uint32_t pix_fmt = IPU_PIX_FMT_RGB666; + ipu_adc_sig_cfg_t sig = { 0, 0, 0, 0, 0, 0, 0, 0, + IPU_ADC_BURST_WCS, + IPU_ADC_IFC_MODE_SYS80_TYPE2, + 8, 0, 0, IPU_ADC_SER_NO_RW + }; + mxc_fbi->disp_num = DISP0; +#else + uint32_t pix_fmt = IPU_PIX_FMT_RGB565; + ipu_adc_sig_cfg_t sig = { 0, 1, 0, 0, 0, 0, 0, 0, + IPU_ADC_BURST_SERIAL, + IPU_ADC_IFC_MODE_5WIRE_SERIAL_CLK, + 16, 0, 0, IPU_ADC_SER_NO_RW + }; + fbi->disp_num = DISP1; +#endif + +#ifdef PARTIAL_REFRESH + if (ipu_request_irq(IPU_IRQ_ADC_SYS2_EOF, mxcfb_sys2_eof_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(fbi->device, "Error registering SYS2 irq handler.\n"); + return; + } + + if (ipu_request_irq(IPU_IRQ_ADC_SYS1_EOF, mxcfb_sys1_eof_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(fbi->device, "Error registering SYS1 irq handler.\n"); + return; + } + ipu_disable_irq(IPU_IRQ_ADC_SYS1_EOF); + ipu_disable_irq(IPU_IRQ_ADC_SYS2_EOF); +#endif + // Init DI interface + msb = fls(MXCFB_SCREEN_WIDTH); + if (!(MXCFB_SCREEN_WIDTH & ((1UL << msb) - 1))) + msb--; // Already aligned to power 2 + panel_stride = 1UL << msb; + ipu_adc_init_panel(mxc_fbi->disp_num, + MXCFB_SCREEN_WIDTH + MXCFB_SCREEN_LEFT_OFFSET, + MXCFB_SCREEN_HEIGHT, + pix_fmt, panel_stride, sig, XY, 0, VsyncInternal); + + ipu_adc_init_ifc_timing(mxc_fbi->disp_num, true, + 190, 17, 104, 190, 5000000); + ipu_adc_init_ifc_timing(mxc_fbi->disp_num, false, 123, 17, 68, 0, 0); + + // Needed to turn on ADC clock for panel init + memset(¶ms, 0, sizeof(params)); + params.adc_sys1.disp = mxc_fbi->disp_num; + params.adc_sys1.ch_mode = WriteTemplateNonSeq; + params.adc_sys1.out_left = MXCFB_SCREEN_LEFT_OFFSET; + params.adc_sys1.out_top = MXCFB_SCREEN_TOP_OFFSET; + ipu_init_channel(ADC_SYS1, ¶ms); + + _init_panel(mxc_fbi->disp_num); + init_channel_template(mxc_fbi->disp_num); +} + +int mxcfb_set_refresh_mode(struct fb_info *fbi, int mode, + struct mxcfb_rect *update_region) +{ + unsigned long start_addr; + int ret_mode; + uint32_t dummy; + ipu_channel_params_t params; + struct mxcfb_rect rect; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + uint32_t stride_pixels = (fbi->fix.line_length * 8) / + fbi->var.bits_per_pixel; + uint32_t memsize = fbi->fix.smem_len; + + if (mxc_fbi->cur_update_mode == mode) + return mode; + + ret_mode = mxc_fbi->cur_update_mode; + + ipu_disable_irq(IPU_IRQ_ADC_SYS1_EOF); + ipu_adc_set_update_mode(ADC_SYS1, IPU_ADC_REFRESH_NONE, 0, 0, 0); +#ifdef PARTIAL_REFRESH + ipu_disable_irq(IPU_IRQ_ADC_SYS2_EOF); + ipu_adc_set_update_mode(ADC_SYS2, IPU_ADC_REFRESH_NONE, 0, 0, 0); +#endif + + ipu_disable_channel(ADC_SYS1, true); + ipu_clear_irq(IPU_IRQ_ADC_SYS1_EOF); +#ifdef PARTIAL_REFRESH + ipu_disable_channel(ADC_SYS2, true); + ipu_clear_irq(IPU_IRQ_ADC_SYS2_EOF); +#endif + ipu_adc_get_snooping_status(&dummy, &dummy); + + mxc_fbi->cur_update_mode = mode; + + switch (mode) { + case MXCFB_REFRESH_OFF: + if (ipu_adc_set_update_mode(ADC_SYS1, IPU_ADC_REFRESH_NONE, + 0, 0, 0) < 0) + dev_err(fbi->device, "Error enabling auto refesh.\n"); + if (ipu_adc_set_update_mode(ADC_SYS2, IPU_ADC_REFRESH_NONE, + 0, 0, 0) < 0) + dev_err(fbi->device, "Error enabling auto refesh.\n"); +#if 0 + ipu_init_channel_buffer(ADC_SYS2, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + 1, 1, 4, + IPU_ROTATE_NONE, + fbi->fix.smem_start, + fbi->fix.smem_start, 0, 0); + ipu_enable_channel(ADC_SYS2); + ipu_select_buffer(ADC_SYS2, IPU_INPUT_BUFFER, 0); + ipu_select_buffer(ADC_SYS2, IPU_INPUT_BUFFER, 1); + msleep(10); +#endif + ipu_uninit_channel(ADC_SYS1); +#ifdef PARTIAL_REFRESH + ipu_uninit_channel(ADC_SYS2); +#endif + break; + case MXCFB_REFRESH_PARTIAL: +#ifdef PARTIAL_REFRESH + ipu_adc_get_snooping_status(&dummy, &dummy); + + params.adc_sys2.disp = DISP0; + params.adc_sys2.ch_mode = WriteTemplateNonSeq; + params.adc_sys2.out_left = 0; + params.adc_sys2.out_top = 0; + ipu_init_channel(ADC_SYS2, ¶ms); + + if (ipu_adc_set_update_mode(ADC_SYS1, IPU_ADC_REFRESH_NONE, + 0, 0, 0) < 0) { + dev_err(fbi->device, "Error enabling auto refesh.\n"); + } + if (ipu_adc_set_update_mode + (ADC_SYS2, IPU_ADC_AUTO_REFRESH_SNOOP, 30, + fbi->fix.smem_start, &memsize) < 0) { + dev_err(fbi->device, "Error enabling auto refesh.\n"); + } + mxc_fbi->snoop_window_size = memsize; + + ipu_init_channel_buffer(ADC_SYS2, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + 1, 1, 4, + IPU_ROTATE_NONE, + fbi->fix.smem_start, 0, 0, 0); + + params.adc_sys1.disp = mxc_fbi->disp_num; + params.adc_sys1.ch_mode = WriteTemplateNonSeq; + params.adc_sys1.out_left = MXCFB_SCREEN_LEFT_OFFSET; + params.adc_sys1.out_top = MXCFB_SCREEN_TOP_OFFSET; + ipu_init_channel(ADC_SYS1, ¶ms); + + ipu_init_channel_buffer(ADC_SYS1, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + MXCFB_SCREEN_WIDTH, MXCFB_SCREEN_HEIGHT, + stride_pixels, IPU_ROTATE_NONE, + fbi->fix.smem_start, 0, 0, 0); + ipu_enable_channel(ADC_SYS1); + ipu_select_buffer(ADC_SYS1, IPU_INPUT_BUFFER, 0); + ipu_enable_irq(IPU_IRQ_ADC_SYS1_EOF); + break; +#endif + case MXCFB_REFRESH_AUTO: + if (update_region == NULL) { + update_region = ▭ + rect.top = 0; + rect.left = 0; + rect.height = MXCFB_SCREEN_HEIGHT; + rect.width = MXCFB_SCREEN_WIDTH; + } + params.adc_sys1.disp = mxc_fbi->disp_num; + params.adc_sys1.ch_mode = WriteTemplateNonSeq; + params.adc_sys1.out_left = MXCFB_SCREEN_LEFT_OFFSET + + update_region->left; + params.adc_sys1.out_top = MXCFB_SCREEN_TOP_OFFSET + + update_region->top; + ipu_init_channel(ADC_SYS1, ¶ms); + + // Address aligned to line + start_addr = update_region->top * fbi->fix.line_length; + start_addr += fbi->fix.smem_start; + start_addr += update_region->left * fbi->var.bits_per_pixel / 8; + + ipu_init_channel_buffer(ADC_SYS1, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi->var.bits_per_pixel), + update_region->width, + update_region->height, stride_pixels, + IPU_ROTATE_NONE, start_addr, 0, 0, 0); + ipu_enable_channel(ADC_SYS1); + ipu_select_buffer(ADC_SYS1, IPU_INPUT_BUFFER, 0); + + if (ipu_adc_set_update_mode + (ADC_SYS1, IPU_ADC_AUTO_REFRESH_SNOOP, 30, + fbi->fix.smem_start, &memsize) < 0) + dev_err(fbi->device, "Error enabling auto refesh.\n"); + + mxc_fbi->snoop_window_size = memsize; + + break; + } + return ret_mode; +} + +/* + * Open the main framebuffer. + * + * @param fbi framebuffer information pointer + * + * @param user Set if opened by user or clear if opened by kernel + */ +static int mxcfb_open(struct fb_info *fbi, int user) +{ + int retval = 0; + struct mxcfb_info *mxc_fbi = fbi->par; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + mxc_fbi->open_count++; + + retval = mxcfb_blank(FB_BLANK_UNBLANK, fbi); + return retval; +} + +/* + * Close the main framebuffer. + * + * @param fbi framebuffer information pointer + * + * @param user Set if opened by user or clear if opened by kernel + */ +static int mxcfb_release(struct fb_info *fbi, int user) +{ + int retval = 0; + struct mxcfb_info *mxc_fbi = fbi->par; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + --mxc_fbi->open_count; + if (mxc_fbi->open_count == 0) { + retval = mxcfb_blank(FB_BLANK_POWERDOWN, fbi); + } + return retval; +} + +/* + * Set fixed framebuffer parameters based on variable settings. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_fix(struct fb_info *info) +{ + struct fb_fix_screeninfo *fix = &info->fix; + struct fb_var_screeninfo *var = &info->var; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + + // Set framebuffer id to IPU display number. + strcpy(fix->id, "DISP0 FB"); + fix->id[4] = '0' + mxc_fbi->disp_num; + + // Init settings based on the panel size + fix->line_length = MXCFB_SCREEN_WIDTH * var->bits_per_pixel / 8; + + fix->type = FB_TYPE_PACKED_PIXELS; + fix->accel = FB_ACCEL_NONE; + fix->visual = FB_VISUAL_TRUECOLOR; + fix->xpanstep = 0; + fix->ypanstep = 0; + + return 0; +} + +/* + * Set framebuffer parameters and change the operating mode. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_par(struct fb_info *fbi) +{ + int retval = 0; + int mode; + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + mode = mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_OFF, NULL); + + mxcfb_set_fix(fbi); + + if (mode != MXCFB_REFRESH_OFF) { +#ifdef PARTIAL_REFRESH + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_PARTIAL, NULL); +#else + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_AUTO, NULL); +#endif + } + return 0; +} + +/* + * Check framebuffer variable parameters and adjust to valid values. + * + * @param var framebuffer variable parameters + * + * @param info framebuffer information pointer + */ +static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi) +{ + if (var->xres > MXCFB_SCREEN_WIDTH) + var->xres = MXCFB_SCREEN_WIDTH; + if (var->yres > MXCFB_SCREEN_HEIGHT) + var->yres = MXCFB_SCREEN_HEIGHT; + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; + + if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && + (var->bits_per_pixel != 16)) { + var->bits_per_pixel = default_bpp; + } + + switch (var->bits_per_pixel) { + case 16: + var->red.length = 5; + var->red.offset = 11; + var->red.msb_right = 0; + + var->green.length = 6; + var->green.offset = 5; + var->green.msb_right = 0; + + var->blue.length = 5; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 24: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 32: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 8; + var->transp.offset = 24; + var->transp.msb_right = 0; + break; + } + + var->height = -1; + var->width = -1; + var->grayscale = 0; + var->nonstd = 0; + + var->pixclock = -1; + var->left_margin = -1; + var->right_margin = -1; + var->upper_margin = -1; + var->lower_margin = -1; + var->hsync_len = -1; + var->vsync_len = -1; + + var->vmode = FB_VMODE_NONINTERLACED; + var->sync = 0; + + return 0; +} + +static inline u_int _chan_to_field(u_int chan, struct fb_bitfield *bf) +{ + chan &= 0xffff; + chan >>= 16 - bf->length; + return chan << bf->offset; +} + +static int +mxcfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int trans, struct fb_info *fbi) +{ + unsigned int val; + int ret = 1; + + /* + * If greyscale is true, then we convert the RGB value + * to greyscale no matter what visual we are using. + */ + if (fbi->var.grayscale) + red = green = blue = (19595 * red + 38470 * green + + 7471 * blue) >> 16; + switch (fbi->fix.visual) { + case FB_VISUAL_TRUECOLOR: + /* + * 16-bit True Colour. We encode the RGB value + * according to the RGB bitfield information. + */ + if (regno < 16) { + u32 *pal = fbi->pseudo_palette; + + val = _chan_to_field(red, &fbi->var.red); + val |= _chan_to_field(green, &fbi->var.green); + val |= _chan_to_field(blue, &fbi->var.blue); + + pal[regno] = val; + ret = 0; + } + break; + + case FB_VISUAL_STATIC_PSEUDOCOLOR: + case FB_VISUAL_PSEUDOCOLOR: + break; + } + + return ret; +} + +/* + * mxcfb_blank(): + * Blank the display. + */ +static int mxcfb_blank(int blank, struct fb_info *fbi) +{ + int retval = 0; + struct mxcfb_info *mxc_fbi = fbi->par; + + dev_dbg(fbi->device, "blank = %d\n", blank); + + if ((retval = wait_event_interruptible(mxcfb_drv_data.suspend_wq, + (mxcfb_drv_data.suspended == + false))) < 0) { + return retval; + } + + mxc_fbi->blank = blank; + + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_OFF, NULL); + break; + case FB_BLANK_UNBLANK: + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_DEFAULT, NULL); + break; + } + return 0; +} + +/*! + * This structure contains the pointers to the control functions that are + * invoked by the core framebuffer driver to perform operations like + * blitting, rectangle filling, copy regions and cursor definition. + */ +static struct fb_ops mxcfb_ops = { + .owner = THIS_MODULE, + .fb_open = mxcfb_open, + .fb_release = mxcfb_release, + .fb_set_par = mxcfb_set_par, + .fb_check_var = mxcfb_check_var, + .fb_setcolreg = mxcfb_setcolreg, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_blank = mxcfb_blank, +}; + +/*! + * Allocates the DRAM memory for the frame buffer. This buffer is remapped + * into a non-cached, non-buffered, memory region to allow palette and pixel + * writes to occur without flushing the cache. Once this area is remapped, + * all virtual memory access to the video memory should occur at the new region. + * + * @param fbi framebuffer information pointer + * + * @return Error code indicating success or failure + */ +static int mxcfb_map_video_memory(struct fb_info *fbi) +{ + u32 msb; + u32 offset; + struct mxcfb_info *mxcfbi = fbi->par; + + fbi->fix.smem_len = fbi->var.xres_virtual * fbi->var.yres_virtual * 4; + + // Set size to power of 2. + msb = fls(fbi->fix.smem_len); + if (!(fbi->fix.smem_len & ((1UL << msb) - 1))) + msb--; // Already aligned to power 2 + if (msb < 11) + msb = 11; + mxcfbi->alloc_size = (1UL << msb) * 2; + + mxcfbi->alloc_start_vaddr = dma_alloc_coherent(fbi->device, + mxcfbi->alloc_size, + &mxcfbi-> + alloc_start_paddr, + GFP_KERNEL | GFP_DMA); + + if (mxcfbi->alloc_start_vaddr == 0) { + dev_err(fbi->device, "Unable to allocate framebuffer memory\n"); + return -ENOMEM; + } + dev_dbg(fbi->device, "allocated fb memory @ paddr=0x%08X, size=%d.\n", + (uint32_t) mxcfbi->alloc_start_paddr, mxcfbi->alloc_size); + + offset = + ((mxcfbi->alloc_size / 2) - 1) & ~((mxcfbi->alloc_size / 2) - 1); + fbi->fix.smem_start = mxcfbi->alloc_start_paddr + offset; + dev_dbg(fbi->device, "aligned fb start @ paddr=0x%08lX, size=%u.\n", + fbi->fix.smem_start, fbi->fix.smem_len); + + fbi->screen_base = mxcfbi->alloc_start_vaddr + offset; + + /* Clear the screen */ + memset(fbi->screen_base, 0, fbi->fix.smem_len); + return 0; +} + +/*! + * De-allocates the DRAM memory for the frame buffer. + * + * @param fbi framebuffer information pointer + * + * @return Error code indicating success or failure + */ +static int mxcfb_unmap_video_memory(struct fb_info *fbi) +{ + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + dma_free_coherent(fbi->device, mxc_fbi->alloc_size, + mxc_fbi->alloc_start_vaddr, + mxc_fbi->alloc_start_paddr); + return 0; +} + +/*! + * Initializes the framebuffer information pointer. After allocating + * sufficient memory for the framebuffer structure, the fields are + * filled with custom information passed in from the configurable + * structures. This includes information such as bits per pixel, + * color maps, screen width/height and RGBA offsets. + * + * @return Framebuffer structure initialized with our information + */ +static struct fb_info *mxcfb_init_fbinfo(struct device *dev, struct fb_ops *ops) +{ + struct fb_info *fbi; + struct mxcfb_info *mxcfbi; + + /* + * Allocate sufficient memory for the fb structure + */ + fbi = framebuffer_alloc(sizeof(struct mxcfb_info), dev); + if (!fbi) + return NULL; + + mxcfbi = (struct mxcfb_info *)fbi->par; + + /* + * Fill in fb_info structure information + */ + fbi->var.xres = fbi->var.xres_virtual = MXCFB_SCREEN_WIDTH; + fbi->var.yres = fbi->var.yres_virtual = MXCFB_SCREEN_HEIGHT; + fbi->var.activate = FB_ACTIVATE_NOW; + mxcfb_check_var(&fbi->var, fbi); + + mxcfb_set_fix(fbi); + + fbi->fbops = ops; + fbi->flags = FBINFO_FLAG_DEFAULT; + fbi->pseudo_palette = mxcfbi->pseudo_palette; + + /* + * Allocate colormap + */ + fb_alloc_cmap(&fbi->cmap, 16, 0); + + return fbi; +} + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxcfb_probe(struct platform_device *pdev) +{ + struct fb_info *fbi; + struct mxcfb_info *mxc_fbi; + int ret; + + platform_set_drvdata(pdev, &mxcfb_drv_data); + + /* + * Initialize FB structures + */ + fbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops); + if (!fbi) { + ret = -ENOMEM; + goto err0; + } + mxcfb_drv_data.fbi = fbi; + mxc_fbi = fbi->par; + + mxcfb_drv_data.suspended = false; + init_waitqueue_head(&mxcfb_drv_data.suspend_wq); + + /* + * Allocate memory + */ + ret = mxcfb_map_video_memory(fbi); + if (ret < 0) { + goto err1; + } + + mxcfb_init_panel(fbi); + + /* + * Register framebuffer + */ + ret = register_framebuffer(fbi); + if (ret < 0) { + goto err2; + } + + dev_info(&pdev->dev, "%s registered\n", MXCFB_NAME); + + return 0; + + err2: + mxcfb_unmap_video_memory(fbi); + err1: + if (&fbi->cmap) + fb_dealloc_cmap(&fbi->cmap); + framebuffer_release(fbi); + err0: + return ret; +} + +#ifdef CONFIG_PM +/*! + * Power management hooks. Note that we won't be called from IRQ context, + * unlike the blank functions above, so we may sleep. + */ + +/*! + * Suspends the framebuffer and blanks the screen. Power management support + * + * @param pdev pointer to device structure. + * @param state state of the device. + * + * @return success + */ +static int mxcfb_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct mxcfb_data *drv_data = platform_get_drvdata(pdev); + struct fb_info *fbi = drv_data->fbi; + struct mxcfb_info *mxc_fbi = fbi->par; + + drv_data->suspended = true; + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_OFF, NULL); + /* Display OFF */ + ipu_adc_write_cmd(mxc_fbi->disp_num, CMD, DISOFF, 0, 0); + + return 0; +} + +/*! + * Resumes the framebuffer and unblanks the screen. Power management support + * + * @param pdev pointer to device structure. + * + * @return success + */ +static int mxcfb_resume(struct platform_device *pdev) +{ + struct mxcfb_data *drv_data = platform_get_drvdata(pdev); + struct fb_info *fbi = drv_data->fbi; + struct mxcfb_info *mxc_fbi = fbi->par; + + // Display ON + ipu_adc_write_cmd(mxc_fbi->disp_num, CMD, DISON, 0, 0); + drv_data->suspended = false; + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_DEFAULT, NULL); + wake_up_interruptible(&drv_data->suspend_wq); + + return 0; +} +#else +#define mxcfb_suspend NULL +#define mxcfb_resume NULL +#endif + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcfb_driver = { + .driver = { + .name = MXCFB_NAME, + }, + .probe = mxcfb_probe, + .suspend = mxcfb_suspend, + .resume = mxcfb_resume, +}; + +/*! + * Device definition for the Framebuffer + */ +static struct platform_device mxcfb_device = { + .name = MXCFB_NAME, + .id = 0, + .dev = { + .coherent_dma_mask = 0xFFFFFFFF, + } +}; + +/*! + * Main entry function for the framebuffer. The function registers the power + * management callback functions with the kernel and also registers the MXCFB + * callback functions with the core Linux framebuffer driver \b fbmem.c + * + * @return Error code indicating success or failure + */ +static int mxcfb_init(void) +{ + int ret = 0; + + ret = platform_driver_register(&mxcfb_driver); + if (ret == 0) { + ret = platform_device_register(&mxcfb_device); + if (ret != 0) { + platform_driver_unregister(&mxcfb_driver); + } + } + return ret; +} + +static void mxcfb_exit(void) +{ + struct fb_info *fbi = dev_get_drvdata(&mxcfb_device.dev); + + if (fbi) { + mxcfb_unmap_video_memory(fbi); + + if (&fbi->cmap) + fb_dealloc_cmap(&fbi->cmap); + + unregister_framebuffer(fbi); + framebuffer_release(fbi); + } + + platform_device_unregister(&mxcfb_device); + platform_driver_unregister(&mxcfb_driver); +} + +module_init(mxcfb_init); +module_exit(mxcfb_exit); + +EXPORT_SYMBOL(mxcfb_set_refresh_mode); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Epson framebuffer driver"); +MODULE_SUPPORTED_DEVICE("fb"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/tve.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/tve.c @@ -0,0 +1,849 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file tve.c + * @brief Driver for i.MX TV encoder + * + * @ingroup Framebuffer + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TVE_ENABLE (1UL) +#define TVE_DAC_FULL_RATE (0UL<<1) +#define TVE_DAC_DIV2_RATE (1UL<<1) +#define TVE_DAC_DIV4_RATE (2UL<<1) +#define TVE_IPU_CLK_ENABLE (1UL<<3) + +#define CD_LM_INT 0x00000001 +#define CD_SM_INT 0x00000002 +#define CD_MON_END_INT 0x00000004 +#define CD_CH_0_LM_ST 0x00000001 +#define CD_CH_0_SM_ST 0x00000010 +#define CD_CH_1_LM_ST 0x00000002 +#define CD_CH_1_SM_ST 0x00000020 +#define CD_CH_2_LM_ST 0x00000004 +#define CD_CH_2_SM_ST 0x00000040 +#define CD_MAN_TRIG 0x00000100 + +#define TVE_STAND_MASK (0x0F<<8) +#define TVE_NTSC_STAND (0UL<<8) +#define TVE_PAL_STAND (3UL<<8) +#define TVE_HD720P60_STAND (4UL<<8) + +#define TVOUT_FMT_OFF 0 +#define TVOUT_FMT_NTSC 1 +#define TVOUT_FMT_PAL 2 +#define TVOUT_FMT_720P60 3 + +static int enabled; /* enable power on or not */ +DEFINE_SPINLOCK(tve_lock); + +static struct fb_info *tve_fbi; + +struct tve_data { + struct platform_device *pdev; + int revision; + int cur_mode; + int output_mode; + int detect; + void *base; + int irq; + struct clk *clk; + struct regulator *dac_reg; + struct regulator *dig_reg; + struct delayed_work cd_work; +} tve; + +struct tve_reg_mapping { + u32 tve_com_conf_reg; + u32 tve_cd_cont_reg; + u32 tve_int_cont_reg; + u32 tve_stat_reg; + u32 tve_mv_cont_reg; +}; + +struct tve_reg_fields_mapping { + u32 cd_en; + u32 cd_trig_mode; + u32 cd_lm_int; + u32 cd_sm_int; + u32 cd_mon_end_int; + u32 cd_man_trig; + u32 sync_ch_mask; + u32 tvout_mode_mask; + u32 sync_ch_offset; + u32 tvout_mode_offset; + u32 cd_ch_stat_offset; +}; + +static struct tve_reg_mapping tve_regs_v1 = { + 0, 0x14, 0x28, 0x2C, 0x48 +}; + +static struct tve_reg_fields_mapping tve_reg_fields_v1 = { + 1, 2, 1, 2, 4, 0x00010000, 0x7000, 0x70, 12, 4, 8 +}; + +static struct tve_reg_mapping tve_regs_v2 = { + 0, 0x34, 0x64, 0x68, 0xDC +}; + +static struct tve_reg_fields_mapping tve_reg_fields_v2 = { + 1, 2, 1, 2, 4, 0x01000000, 0x700000, 0x7000, 20, 12, 16 +}; + + +struct tve_reg_mapping *tve_regs; +struct tve_reg_fields_mapping *tve_reg_fields; + +/* For MX37 need modify some fields in tve_probe */ +static struct fb_videomode video_modes[] = { + { + /* NTSC TV output */ + "TV-NTSC", 60, 720, 480, 74074, + 122, 15, + 18, 26, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_EXT, + FB_VMODE_INTERLACED, + 0,}, + { + /* PAL TV output */ + "TV-PAL", 50, 720, 576, 74074, + 132, 11, + 22, 26, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_EXT, + FB_VMODE_INTERLACED | FB_VMODE_ODD_FLD_FIRST, + 0,}, + { + /* 720p60 TV output */ + "720P60", 60, 1280, 720, 13468, + 260, 109, + 25, 4, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | + FB_SYNC_EXT, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +enum tvout_mode { + TV_OFF, + CVBS0, + CVBS2, + CVBS02, + SVIDEO, + SVIDEO_CVBS, + YPBPR, + RGB +}; + +static unsigned short tvout_mode_to_channel_map[8] = { + 0, /* TV_OFF */ + 1, /* CVBS0 */ + 4, /* CVBS2 */ + 5, /* CVBS02 */ + 1, /* SVIDEO */ + 5, /* SVIDEO_CVBS */ + 1, /* YPBPR */ + 7 /* RGB */ +}; + + +static void tve_set_tvout_mode(int mode) +{ + u32 conf_reg; + + conf_reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + conf_reg &= ~(tve_reg_fields->sync_ch_mask | + tve_reg_fields->tvout_mode_mask); + /* clear sync_ch and tvout_mode fields */ + conf_reg |= + mode << tve_reg_fields-> + tvout_mode_offset | tvout_mode_to_channel_map[mode] << + tve_reg_fields->sync_ch_offset; + __raw_writel(conf_reg, tve.base + tve_regs->tve_com_conf_reg); +} + +static int _is_tvout_mode_hd_compatible(void) +{ + u32 conf_reg, mode; + + conf_reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + mode = (conf_reg >> tve_reg_fields->tvout_mode_offset) & 7; + if (mode == YPBPR || mode == RGB) { + return 1; + } else { + return 0; + } +} + + +/** + * tve_setup + * initial the CH7024 chipset by setting register + * @param: + * vos: output video format + * @return: + * 0 successful + * otherwise failed + */ +static int tve_setup(int mode) +{ + u32 reg; + struct clk *pll3_clk; + unsigned long pll3_clock_rate = 216000000, di1_clock_rate = 27000000; + struct clk *ipu_di1_clk; + unsigned long lock_flags; + + if (tve.cur_mode == mode) + return 0; + + spin_lock_irqsave(&tve_lock, lock_flags); + + tve.cur_mode = mode; + + switch (mode) { + case TVOUT_FMT_PAL: + case TVOUT_FMT_NTSC: + pll3_clock_rate = 216000000; + di1_clock_rate = 27000000; + break; + case TVOUT_FMT_720P60: + pll3_clock_rate = 297000000; + di1_clock_rate = 74250000; + break; + } + if (enabled) + clk_disable(tve.clk); + + pll3_clk = clk_get(NULL, "pll3"); + ipu_di1_clk = clk_get(NULL, "ipu_di1_clk"); + + clk_disable(pll3_clk); + clk_set_rate(pll3_clk, pll3_clock_rate); + clk_enable(pll3_clk); + clk_set_rate(ipu_di1_clk, di1_clock_rate); + + clk_enable(tve.clk); + + /* select output video format */ + if (mode == TVOUT_FMT_PAL) { + reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + reg = (reg & ~TVE_STAND_MASK) | TVE_PAL_STAND; + __raw_writel(reg, tve.base + tve_regs->tve_com_conf_reg); + pr_debug("TVE: change to PAL video\n"); + } else if (mode == TVOUT_FMT_NTSC) { + reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + reg = (reg & ~TVE_STAND_MASK) | TVE_NTSC_STAND; + __raw_writel(reg, tve.base + tve_regs->tve_com_conf_reg); + pr_debug("TVE: change to NTSC video\n"); + } else if (mode == TVOUT_FMT_720P60) { + if (!_is_tvout_mode_hd_compatible()) { + tve_set_tvout_mode(YPBPR); + pr_debug("The TV out mode is HD incompatible. Setting to YPBPR."); + } + reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + reg = (reg & ~TVE_STAND_MASK) | TVE_HD720P60_STAND; + __raw_writel(reg, tve.base + tve_regs->tve_com_conf_reg); + pr_debug("TVE: change to 720P60 video\n"); + } else if (mode == TVOUT_FMT_OFF) { + __raw_writel(0x0, tve.base + tve_regs->tve_com_conf_reg); + pr_debug("TVE: change to OFF video\n"); + } else { + pr_debug("TVE: no such video format.\n"); + if (!enabled) + clk_disable(tve.clk); + spin_unlock_irqrestore(&tve_lock, lock_flags); + return -EINVAL; + } + + if (!enabled) + clk_disable(tve.clk); + + spin_unlock_irqrestore(&tve_lock, lock_flags); + return 0; +} + +/** + * tve_enable + * Enable the tve Power to begin TV encoder + */ +static void tve_enable(void) +{ + u32 reg; + unsigned long lock_flags; + + spin_lock_irqsave(&tve_lock, lock_flags); + if (!enabled) { + enabled = 1; + clk_enable(tve.clk); + reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + __raw_writel(reg | TVE_IPU_CLK_ENABLE | TVE_ENABLE, + tve.base + tve_regs->tve_com_conf_reg); + pr_debug("TVE power on.\n"); + } + + /* enable interrupt */ + __raw_writel(CD_SM_INT | CD_LM_INT | CD_MON_END_INT, + tve.base + tve_regs->tve_stat_reg); + __raw_writel(CD_SM_INT | CD_LM_INT | CD_MON_END_INT, + tve.base + tve_regs->tve_int_cont_reg); + spin_unlock_irqrestore(&tve_lock, lock_flags); +} + +/** + * tve_disable + * Disable the tve Power to stop TV encoder + */ +static void tve_disable(void) +{ + u32 reg; + unsigned long lock_flags; + + spin_lock_irqsave(&tve_lock, lock_flags); + if (enabled) { + enabled = 0; + reg = __raw_readl(tve.base + tve_regs->tve_com_conf_reg); + __raw_writel(reg & ~TVE_ENABLE & ~TVE_IPU_CLK_ENABLE, + tve.base + tve_regs->tve_com_conf_reg); + clk_disable(tve.clk); + pr_debug("TVE power off.\n"); + } + spin_unlock_irqrestore(&tve_lock, lock_flags); +} + +static int tve_update_detect_status(void) +{ + int old_detect = tve.detect; + u32 stat_lm, stat_sm, stat; + u32 int_ctl; + u32 cd_cont_reg; + u32 timeout = 40; + unsigned long lock_flags; + + spin_lock_irqsave(&tve_lock, lock_flags); + + if (!enabled) { + pr_warning("Warning: update tve status while it disabled!\n"); + tve.detect = 0; + goto done; + } + + int_ctl = __raw_readl(tve.base + tve_regs->tve_int_cont_reg); + cd_cont_reg = __raw_readl(tve.base + tve_regs->tve_cd_cont_reg); + + if ((cd_cont_reg & 0x1) == 0) { + pr_warning("Warning: pls enable TVE CD first!\n"); + goto done; + } + + stat = __raw_readl(tve.base + tve_regs->tve_stat_reg); + while (((stat & CD_MON_END_INT) == 0) && (timeout > 0)) { + spin_unlock_irqrestore(&tve_lock, lock_flags); + msleep(2); + spin_lock_irqsave(&tve_lock, lock_flags); + timeout -= 2; + if (!enabled) { + pr_warning("Warning: update tve status while it disabled!\n"); + tve.detect = 0; + goto done; + } else + stat = __raw_readl(tve.base + tve_regs->tve_stat_reg); + } + if (((stat & CD_MON_END_INT) == 0) && (timeout <= 0)) { + pr_warning("Warning: get detect resultwithout CD_MON_END_INT!\n"); + goto done; + } + + stat = stat >> tve_reg_fields->cd_ch_stat_offset; + stat_lm = stat & (CD_CH_0_LM_ST | CD_CH_1_LM_ST | CD_CH_2_LM_ST); + if ((stat_lm == (CD_CH_0_LM_ST | CD_CH_1_LM_ST | CD_CH_2_LM_ST)) && + ((stat & (CD_CH_0_SM_ST | CD_CH_1_SM_ST | CD_CH_2_SM_ST)) == 0) + ) { + tve.detect = 3; + tve.output_mode = YPBPR; + } else if ((stat_lm == (CD_CH_0_LM_ST | CD_CH_1_LM_ST)) && + ((stat & (CD_CH_0_SM_ST | CD_CH_1_SM_ST)) == 0)) { + tve.detect = 4; + tve.output_mode = SVIDEO; + } else if (stat_lm == CD_CH_0_LM_ST) { + stat_sm = stat & CD_CH_0_SM_ST; + if (stat_sm != 0) { + /* headset */ + tve.detect = 2; + tve.output_mode = TV_OFF; + } else { + tve.detect = 1; + tve.output_mode = CVBS0; + } + } else if (stat_lm == CD_CH_2_LM_ST) { + stat_sm = stat & CD_CH_2_SM_ST; + if (stat_sm != 0) { + /* headset */ + tve.detect = 2; + tve.output_mode = TV_OFF; + } else { + tve.detect = 1; + tve.output_mode = CVBS2; + } + } else { + /* none */ + tve.detect = 0; + tve.output_mode = TV_OFF; + } + + tve_set_tvout_mode(tve.output_mode); + + /* clear interrupt */ + __raw_writel(CD_MON_END_INT | CD_LM_INT | CD_SM_INT, + tve.base + tve_regs->tve_stat_reg); + + __raw_writel(int_ctl | CD_SM_INT | CD_LM_INT, + tve.base + tve_regs->tve_int_cont_reg); + + if (old_detect != tve.detect) + sysfs_notify(&tve.pdev->dev.kobj, NULL, "headphone"); + + dev_dbg(&tve.pdev->dev, "detect = %d mode = %d\n", + tve.detect, tve.output_mode); +done: + spin_unlock_irqrestore(&tve_lock, lock_flags); + return tve.detect; +} + +static void cd_work_func(struct work_struct *work) +{ + tve_update_detect_status(); +} +#if 0 +static int tve_man_detect(void) +{ + u32 cd_cont; + u32 int_cont; + + if (!enabled) + return -1; + + int_cont = __raw_readl(tve.base + tve_regs->tve_int_cont_reg); + __raw_writel(int_cont & + ~(tve_reg_fields->cd_sm_int | tve_reg_fields->cd_lm_int), + tve.base + tve_regs->tve_int_cont_reg); + + cd_cont = __raw_readl(tve.base + tve_regs->tve_cd_cont_reg); + __raw_writel(cd_cont | tve_reg_fields->cd_trig_mode, + tve.base + tve_regs->tve_cd_cont_reg); + + __raw_writel(tve_reg_fields->cd_sm_int | tve_reg_fields-> + cd_lm_int | tve_reg_fields-> + cd_mon_end_int | tve_reg_fields->cd_man_trig, + tve.base + tve_regs->tve_stat_reg); + + while ((__raw_readl(tve.base + tve_regs->tve_stat_reg) + & tve_reg_fields->cd_mon_end_int) == 0) + msleep(5); + + tve_update_detect_status(); + + __raw_writel(cd_cont, tve.base + tve_regs->tve_cd_cont_reg); + __raw_writel(int_cont, tve.base + tve_regs->tve_int_cont_reg); + + return tve.detect; +} +#endif + +static irqreturn_t tve_detect_handler(int irq, void *data) +{ + u32 int_ctl = __raw_readl(tve.base + tve_regs->tve_int_cont_reg); + + /* disable INT first */ + int_ctl &= ~(CD_SM_INT | CD_LM_INT | CD_MON_END_INT); + __raw_writel(int_ctl, tve.base + tve_regs->tve_int_cont_reg); + + __raw_writel(CD_MON_END_INT | CD_LM_INT | CD_SM_INT, + tve.base + tve_regs->tve_stat_reg); + + schedule_delayed_work(&tve.cd_work, msecs_to_jiffies(1000)); + + return IRQ_HANDLED; +} + +int tve_fb_event(struct notifier_block *nb, unsigned long val, void *v) +{ + struct fb_event *event = v; + struct fb_info *fbi = event->info; + + switch (val) { + case FB_EVENT_FB_REGISTERED: + pr_debug("fb registered event\n"); + if ((tve_fbi != NULL) || strcmp(fbi->fix.id, "DISP3 BG - DI1")) + break; + + tve_fbi = fbi; + fb_add_videomode(&video_modes[0], &tve_fbi->modelist); + fb_add_videomode(&video_modes[1], &tve_fbi->modelist); + fb_add_videomode(&video_modes[2], &tve_fbi->modelist); + break; + case FB_EVENT_MODE_CHANGE: + { + struct fb_videomode cur_mode; + struct fb_videomode *mode; + struct list_head *pos; + struct fb_modelist *modelist; + + if (tve_fbi != fbi) + break; + + fb_var_to_videomode(&cur_mode, &fbi->var); + + list_for_each(pos, &tve_fbi->modelist) { + modelist = list_entry(pos, struct fb_modelist, list); + mode = &modelist->mode; + if (fb_mode_is_equal(&cur_mode, mode)) { + fbi->mode = mode; + break; + } + } + + if (!fbi->mode) { + tve_disable(); + tve.cur_mode = TVOUT_FMT_OFF; + return 0; + } + + pr_debug("fb mode change event: xres=%d, yres=%d\n", + fbi->mode->xres, fbi->mode->yres); + + tve_disable(); + + if (fb_mode_is_equal(fbi->mode, &video_modes[0])) { + tve_setup(TVOUT_FMT_NTSC); + tve_enable(); + } else if (fb_mode_is_equal(fbi->mode, &video_modes[1])) { + tve_setup(TVOUT_FMT_PAL); + tve_enable(); + } else if (fb_mode_is_equal(fbi->mode, &video_modes[2])) { + tve_setup(TVOUT_FMT_720P60); + tve_enable(); + } else { + tve_setup(TVOUT_FMT_OFF); + } + break; + } + case FB_EVENT_BLANK: + if ((tve_fbi != fbi) || (fbi->mode == NULL)) + return 0; + + if (*((int *)event->data) == FB_BLANK_UNBLANK) { + if (fb_mode_is_equal(fbi->mode, &video_modes[0])) { + if (tve.cur_mode != TVOUT_FMT_NTSC) { + tve_disable(); + tve_setup(TVOUT_FMT_NTSC); + } + tve_enable(); + } else if (fb_mode_is_equal(fbi->mode, + &video_modes[1])) { + if (tve.cur_mode != TVOUT_FMT_PAL) { + tve_disable(); + tve_setup(TVOUT_FMT_PAL); + } + tve_enable(); + } else if (fb_mode_is_equal(fbi->mode, + &video_modes[2])) { + if (tve.cur_mode != TVOUT_FMT_720P60) { + tve_disable(); + tve_setup(TVOUT_FMT_720P60); + } + tve_enable(); + } else { + tve_setup(TVOUT_FMT_OFF); + } + } else + tve_disable(); + break; + } + return 0; +} + +static struct notifier_block nb = { + .notifier_call = tve_fb_event, +}; + +static ssize_t show_headphone(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int detect; + + if (!enabled) { + strcpy(buf, "tve power off\n"); + return strlen(buf); + } + + detect = tve_update_detect_status(); + + if (detect == 0) + strcpy(buf, "none\n"); + else if (detect == 1) + strcpy(buf, "cvbs\n"); + else if (detect == 2) + strcpy(buf, "headset\n"); + else if (detect == 3) + strcpy(buf, "component\n"); + else + strcpy(buf, "svideo\n"); + + return strlen(buf); +} + +static DEVICE_ATTR(headphone, S_IRUGO | S_IWUSR, show_headphone, NULL); + +static int _tve_get_revision(void) +{ + u32 conf_reg; + u32 rev = 0; + + /* find out TVE rev based on the base addr default value + * can be used at the init/probe ONLY */ + conf_reg = __raw_readl(tve.base); + switch (conf_reg) { + case 0x00842000: + rev = 1; + break; + case 0x00100000: + rev = 2; + break; + } + return rev; +} + +extern int g_di1_tvout; +static int tve_probe(struct platform_device *pdev) +{ + int ret, i; + struct resource *res; + struct tve_platform_data *plat_data = pdev->dev.platform_data; + u32 conf_reg; + + if (!g_di1_tvout) { + pr_debug("TVE: DI1 was occupied by other device,TVE will not enable\n"); + return -EBUSY; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) + return -ENOMEM; + + tve.pdev = pdev; + tve.base = ioremap(res->start, res->end - res->start); + + tve.irq = platform_get_irq(pdev, 0); + if (tve.irq < 0) { + ret = tve.irq; + goto err0; + } + + ret = request_irq(tve.irq, tve_detect_handler, 0, pdev->name, pdev); + if (ret < 0) + goto err0; + + ret = device_create_file(&pdev->dev, &dev_attr_headphone); + if (ret < 0) + goto err1; + + for (i = 0; i < num_registered_fb; i++) { + if (strcmp(registered_fb[i]->fix.id, "DISP3 BG - DI1") == 0) { + tve_fbi = registered_fb[i]; + break; + } + } + + /* adjust video mode for mx37 */ + if (cpu_is_mx37()) { + video_modes[0].left_margin = 121; + video_modes[0].right_margin = 16; + video_modes[0].upper_margin = 17; + video_modes[0].lower_margin = 5; + video_modes[1].left_margin = 131; + video_modes[1].right_margin = 12; + video_modes[1].upper_margin = 21; + video_modes[1].lower_margin = 3; + } + + if (tve_fbi != NULL) { + fb_add_videomode(&video_modes[0], &tve_fbi->modelist); + fb_add_videomode(&video_modes[1], &tve_fbi->modelist); + fb_add_videomode(&video_modes[2], &tve_fbi->modelist); + } + + tve.dac_reg = regulator_get(&pdev->dev, plat_data->dac_reg); + if (!IS_ERR(tve.dac_reg)) { + regulator_set_voltage(tve.dac_reg, 2500000, 2500000); + regulator_enable(tve.dac_reg); + } + + tve.dig_reg = regulator_get(&pdev->dev, plat_data->dig_reg); + if (!IS_ERR(tve.dig_reg)) { + regulator_set_voltage(tve.dig_reg, 1250000, 1250000); + regulator_enable(tve.dig_reg); + } + + tve.clk = clk_get(&pdev->dev, "tve_clk"); + clk_set_rate(tve.clk, 216000000); + clk_enable(tve.clk); + + tve.revision = _tve_get_revision(); + if (tve.revision == 1) { + tve_regs = &tve_regs_v1; + tve_reg_fields = &tve_reg_fields_v1; + } else { + tve_regs = &tve_regs_v2; + tve_reg_fields = &tve_reg_fields_v2; + } + + /* Setup cable detect, for YPrPb mode, default use channel#0 for Y */ + INIT_DELAYED_WORK(&tve.cd_work, cd_work_func); + if (tve.revision == 1) + __raw_writel(0x01067701, tve.base + tve_regs->tve_cd_cont_reg); + else + __raw_writel(0x00770601, tve.base + tve_regs->tve_cd_cont_reg); + + conf_reg = 0; + __raw_writel(conf_reg, tve.base + tve_regs->tve_com_conf_reg); + + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 5); + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 4); + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 3); + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4 * 2); + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg - 4); + __raw_writel(0x00000000, tve.base + tve_regs->tve_mv_cont_reg); + + clk_disable(tve.clk); + + ret = fb_register_client(&nb); + if (ret < 0) + goto err2; + + return 0; +err2: + device_remove_file(&pdev->dev, &dev_attr_headphone); +err1: + free_irq(tve.irq, pdev); +err0: + iounmap(tve.base); + return ret; +} + +static int tve_remove(struct platform_device *pdev) +{ + if (enabled) { + clk_disable(tve.clk); + enabled = 0; + } + free_irq(tve.irq, pdev); + device_remove_file(&pdev->dev, &dev_attr_headphone); + fb_unregister_client(&nb); + return 0; +} + +/*! + * PM suspend/resume routing + */ +static int tve_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (enabled) { + __raw_writel(0, tve.base + tve_regs->tve_int_cont_reg); + __raw_writel(0, tve.base + tve_regs->tve_cd_cont_reg); + __raw_writel(0, tve.base + tve_regs->tve_com_conf_reg); + clk_disable(tve.clk); + } + return 0; +} + +static int tve_resume(struct platform_device *pdev) +{ + if (enabled) { + clk_enable(tve.clk); + + /* Setup cable detect */ + if (tve.revision == 1) + __raw_writel(0x01067701, + tve.base + tve_regs->tve_cd_cont_reg); + else + __raw_writel(0x00770601, + tve.base + tve_regs->tve_cd_cont_reg); + + if (tve.cur_mode == TVOUT_FMT_NTSC) { + tve_disable(); + tve.cur_mode = TVOUT_FMT_OFF; + tve_setup(TVOUT_FMT_NTSC); + } else if (tve.cur_mode == TVOUT_FMT_PAL) { + tve_disable(); + tve.cur_mode = TVOUT_FMT_OFF; + tve_setup(TVOUT_FMT_PAL); + } else if (tve.cur_mode == TVOUT_FMT_720P60) { + tve_disable(); + tve.cur_mode = TVOUT_FMT_OFF; + tve_setup(TVOUT_FMT_720P60); + } + tve_enable(); + } + + return 0; +} + +static struct platform_driver tve_driver = { + .driver = { + .name = "tve", + }, + .probe = tve_probe, + .remove = tve_remove, + .suspend = tve_suspend, + .resume = tve_resume, +}; + +static int __init tve_init(void) +{ + return platform_driver_register(&tve_driver); +} + +static void __exit tve_exit(void) +{ + platform_driver_unregister(&tve_driver); +} + +module_init(tve_init); +module_exit(tve_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("i.MX TV encoder driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/Makefile @@ -0,0 +1,21 @@ +ifeq ($(CONFIG_ARCH_MX21)$(CONFIG_ARCH_MX27)$(CONFIG_ARCH_MX25),y) + obj-$(CONFIG_FB_MXC_TVOUT) += fs453.o + obj-$(CONFIG_FB_MXC_SYNC_PANEL) += mx2fb.o mxcfb_modedb.o + obj-$(CONFIG_FB_MXC_EPSON_PANEL) += mx2fb_epson.o +else +ifeq ($(CONFIG_MXC_IPU_V1),y) + obj-$(CONFIG_FB_MXC_SYNC_PANEL) += mxcfb.o mxcfb_modedb.o +else + obj-$(CONFIG_FB_MXC_SYNC_PANEL) += mxc_ipuv3_fb.o +endif + obj-$(CONFIG_FB_MXC_EPSON_PANEL) += mxcfb_epson.o + obj-$(CONFIG_FB_MXC_EPSON_QVGA_PANEL) += mxcfb_epson_qvga.o + obj-$(CONFIG_FB_MXC_TOSHIBA_QVGA_PANEL) += mxcfb_toshiba_qvga.o + obj-$(CONFIG_FB_MXC_SHARP_128_PANEL) += mxcfb_sharp_128x128.o +endif +obj-$(CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL) += mxcfb_epson_vga.o +obj-$(CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL) += mxcfb_claa_wvga.o +obj-$(CONFIG_FB_MXC_TVOUT_CH7024) += ch7024.o +obj-$(CONFIG_FB_MXC_TVOUT_TVE) += tve.o +obj-$(CONFIG_FB_MXC_CH7026) += mxcfb_ch7026.o +obj-$(CONFIG_FB_MODE_HELPERS) += mxc_edid.o --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb_epson_vga.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb_epson_vga.c @@ -0,0 +1,361 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxcfb_epson_vga.c + * + * @brief MXC Frame buffer driver for SDC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct spi_device *lcd_spi; +static struct device *lcd_dev; + +static void lcd_init(void); +static void lcd_poweron(void); +static void lcd_poweroff(void); + +static void (*lcd_reset) (void); +static struct regulator *io_reg; +static struct regulator *core_reg; + +static struct fb_videomode video_modes[] = { + { + /* 480x640 @ 60 Hz */ + "Epson-VGA", 60, 480, 640, 41701, 60, 41, 10, 5, 20, 10, + 0, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +static void lcd_init_fb(struct fb_info *info) +{ + struct fb_var_screeninfo var; + + memset(&var, 0, sizeof(var)); + + fb_videomode_to_var(&var, &video_modes[0]); + + if (machine_is_mx31_3ds()) { + var.upper_margin = 0; + var.left_margin = 0; + } + + var.activate = FB_ACTIVATE_ALL; + var.yres_virtual = var.yres * 2; + + acquire_console_sem(); + info->flags |= FBINFO_MISC_USEREVENT; + fb_set_var(info, &var); + info->flags &= ~FBINFO_MISC_USEREVENT; + release_console_sem(); +} + +static int lcd_fb_event(struct notifier_block *nb, unsigned long val, void *v) +{ + struct fb_event *event = v; + + if (strcmp(event->info->fix.id, "DISP3 BG")) { + return 0; + } + + switch (val) { + case FB_EVENT_FB_REGISTERED: + lcd_init_fb(event->info); + lcd_poweron(); + break; + case FB_EVENT_BLANK: + if ((event->info->var.xres != 480) || + (event->info->var.yres != 640)) { + break; + } + if (*((int *)event->data) == FB_BLANK_UNBLANK) { + lcd_poweron(); + } else { + lcd_poweroff(); + } + break; + } + return 0; +} + +static struct notifier_block nb = { + .notifier_call = lcd_fb_event, +}; + +/*! + * This function is called whenever the SPI slave device is detected. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devinit lcd_probe(struct device *dev) +{ + int i; + struct mxc_lcd_platform_data *plat = dev->platform_data; + + lcd_dev = dev; + + if (plat) { + io_reg = regulator_get(dev, plat->io_reg); + if (!IS_ERR(io_reg)) { + regulator_set_voltage(io_reg, 1800000, 1800000); + regulator_enable(io_reg); + } + core_reg = regulator_get(dev, plat->core_reg); + if (!IS_ERR(core_reg)) { + regulator_set_voltage(core_reg, 2800000, 2800000); + regulator_enable(core_reg); + } + + lcd_reset = plat->reset; + if (lcd_reset) + lcd_reset(); + } + + lcd_init(); + + for (i = 0; i < num_registered_fb; i++) { + if (strcmp(registered_fb[i]->fix.id, "DISP3 BG") == 0) { + lcd_init_fb(registered_fb[i]); + fb_show_logo(registered_fb[i], 0); + lcd_poweron(); + } + } + + fb_register_client(&nb); + + return 0; +} + +static int __devinit lcd_plat_probe(struct platform_device *pdev) +{ + ipu_adc_sig_cfg_t sig; + ipu_channel_params_t param; + + memset(&sig, 0, sizeof(sig)); + sig.ifc_width = 9; + sig.clk_pol = 1; + ipu_init_async_panel(0, IPU_PANEL_SERIAL, 90, IPU_PIX_FMT_GENERIC, sig); + + memset(¶m, 0, sizeof(param)); + ipu_init_channel(DIRECT_ASYNC1, ¶m); + + return lcd_probe(&pdev->dev); +} + +static int __devinit lcd_spi_probe(struct spi_device *spi) +{ + lcd_spi = spi; + + spi->bits_per_word = 9; + spi_setup(spi); + + return lcd_probe(&spi->dev); +} + +static int __devexit lcd_remove(struct device *dev) +{ + fb_unregister_client(&nb); + lcd_poweroff(); + regulator_put(io_reg); + regulator_put(core_reg); + + return 0; +} + +static int __devexit lcd_spi_remove(struct spi_device *spi) +{ + int ret = lcd_remove(&spi->dev); + lcd_spi = NULL; + return ret; +} + +static int __devexit lcd_plat_remove(struct platform_device *pdev) +{ + return lcd_remove(&pdev->dev); +} + +static int lcd_suspend(struct spi_device *spi, pm_message_t message) +{ + lcd_poweroff(); + return 0; +} + +static int lcd_resume(struct spi_device *spi) +{ + if (lcd_reset) + lcd_reset(); + + lcd_init(); + lcd_poweron(); + return 0; +} + +/*! + * spi driver structure for LTV350QV + */ +static struct spi_driver lcd_spi_dev_driver = { + + .driver = { + .name = "lcd_spi", + .owner = THIS_MODULE, + }, + .probe = lcd_spi_probe, + .remove = __devexit_p(lcd_spi_remove), + .suspend = lcd_suspend, + .resume = lcd_resume, +}; + +static struct platform_driver lcd_plat_driver = { + .driver = { + .name = "lcd_spi", + .owner = THIS_MODULE, + }, + .probe = lcd_plat_probe, + .remove = __devexit_p(lcd_plat_remove), +}; + +#define param(x) ((x) | 0x100) + +/* + * Send init commands to L4F00242T03 + * + */ +static void lcd_init(void) +{ + const u16 cmd[] = { 0x36, param(0), 0x3A, param(0x60) }; + + dev_dbg(lcd_dev, "initializing LCD\n"); + if (lcd_spi) { + spi_write(lcd_spi, (const u8 *)cmd, ARRAY_SIZE(cmd)); + } else { + ipu_disp_direct_write(DIRECT_ASYNC1, 0x36, 0); + ipu_disp_direct_write(DIRECT_ASYNC1, 0x100, 0); + ipu_disp_direct_write(DIRECT_ASYNC1, 0x3A, 0); + ipu_disp_direct_write(DIRECT_ASYNC1, 0x160, 0); + msleep(1); + ipu_uninit_channel(DIRECT_ASYNC1); + } +} + +static int lcd_on; +/* + * Send Power On commands to L4F00242T03 + * + */ +static void lcd_poweron(void) +{ + const u16 slpout = 0x11; + const u16 dison = 0x29; + ipu_channel_params_t param; + if (lcd_on) + return; + + dev_dbg(lcd_dev, "turning on LCD\n"); + + if (lcd_spi) { + msleep(60); + spi_write(lcd_spi, (const u8 *)&slpout, 1); + msleep(60); + spi_write(lcd_spi, (const u8 *)&dison, 1); + } else { + memset(¶m, 0, sizeof(param)); + ipu_init_channel(DIRECT_ASYNC1, ¶m); + ipu_disp_direct_write(DIRECT_ASYNC1, slpout, 0); + msleep(60); + ipu_disp_direct_write(DIRECT_ASYNC1, dison, 0); + msleep(1); + ipu_uninit_channel(DIRECT_ASYNC1); + } + lcd_on = 1; +} + +/* + * Send Power Off commands to L4F00242T03 + * + */ +static void lcd_poweroff(void) +{ + const u16 slpin = 0x10; + const u16 disoff = 0x28; + ipu_channel_params_t param; + if (!lcd_on) + return; + + dev_dbg(lcd_dev, "turning off LCD\n"); + + if (lcd_spi) { + msleep(60); + spi_write(lcd_spi, (const u8 *)&disoff, 1); + msleep(60); + spi_write(lcd_spi, (const u8 *)&slpin, 1); + } else { + memset(¶m, 0, sizeof(param)); + ipu_init_channel(DIRECT_ASYNC1, ¶m); + ipu_disp_direct_write(DIRECT_ASYNC1, disoff, 0); + msleep(60); + ipu_disp_direct_write(DIRECT_ASYNC1, slpin, 0); + msleep(1); + ipu_uninit_channel(DIRECT_ASYNC1); + } + lcd_on = 0; +} + +static int __init epson_lcd_init(void) +{ + int ret; + + ret = platform_driver_register(&lcd_plat_driver); + if (ret) + return ret; + + return spi_register_driver(&lcd_spi_dev_driver); + +} + +static void __exit epson_lcd_exit(void) +{ + spi_unregister_driver(&lcd_spi_dev_driver); +} + +module_init(epson_lcd_init); +module_exit(epson_lcd_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Epson VGA LCD init driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mx2fb.h +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mx2fb.h @@ -0,0 +1,141 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx2fb.h + * + * @brief Header file for the MX27 Frame buffer + * + * @ingroup Framebuffer + */ +#ifndef __MX2FB_H__ +#define __MX2FB_H__ + +/*! @brief MX27 LCDC graphic window information */ +struct fb_gwinfo { + /*! Non-zero if graphic window is enabled */ + __u32 enabled; + + /* The fields below are valid only when graphic window is enabled */ + + /*! Graphic window alpha value from 0 to 255 */ + __u32 alpha_value; + + /*! Non-zero if graphic window color keying is enabled. */ + __u32 ck_enabled; + + /* + * The fields ck_red, ck_green and ck_blue are valid only when + * graphic window and the color keying are enabled. They are the + * color component of graphic window color keying. + */ + + /*! Color keying red component */ + __u32 ck_red; + + /*! Color keying green component */ + __u32 ck_green; + + /*! Color keying blue component */ + __u32 ck_blue; + + /*! Graphic window x position */ + __u32 xpos; + + /*! Graphic window y position */ + __u32 ypos; + + /*! Non-zero if graphic window vertical scan in reverse direction. */ + __u32 vs_reversed; + + /* + * The following fields are valid for FBIOGET_GWINFO and + * mx2_gw_set(). FBIOPUT_GWINFO ignores these fields. + */ + __u32 base; /* Graphic window start address */ + __u32 xres; /* Visible x resolution */ + __u32 yres; /* Visible y resolution */ + __u32 xres_virtual; /* Virtual x resolution */ +}; + +/* 0x46E0-0x46FF are reserved for MX27 */ +#define FBIOGET_GWINFO 0x46E0 /*!< Get graphic window information */ +#define FBIOPUT_GWINFO 0x46E1 /*!< Set graphic window information */ + +struct mx2fb_gbl_alpha { + int enable; + int alpha; +}; + +struct mx2fb_color_key { + int enable; + __u32 color_key; +}; + +#define MX2FB_SET_GBL_ALPHA _IOW('M', 0, struct mx2fb_gbl_alpha) +#define MX2FB_SET_CLR_KEY _IOW('M', 1, struct mx2fb_color_key) +#define MX2FB_WAIT_FOR_VSYNC _IOW('F', 0x20, u_int32_t) + +#ifdef __KERNEL__ + +/* + * LCDC register definitions + */ +#define LCDC_LSSAR 0x00 +#define LCDC_LSR 0x04 +#define LCDC_LVPWR 0x08 +#define LCDC_LCPR 0x0C +#define LCDC_LCWHBR 0x10 +#define LCDC_LCCMR 0x14 +#define LCDC_LPCR 0x18 +#define LCDC_LHCR 0x1C +#define LCDC_LVCR 0x20 +#define LCDC_LPOR 0x24 +#define LCDC_LSCR 0x28 +#define LCDC_LPCCR 0x2C +#define LCDC_LDCR 0x30 +#define LCDC_LRMCR 0x34 +#define LCDC_LICR 0x38 +#define LCDC_LIER 0x3C +#define LCDC_LISR 0x40 +#define LCDC_LGWSAR 0x50 +#define LCDC_LGWSR 0x54 +#define LCDC_LGWVPWR 0x58 +#define LCDC_LGWPOR 0x5C +#define LCDC_LGWPR 0x60 +#define LCDC_LGWCR 0x64 +#define LCDC_LGWDCR 0x68 +#define LCDC_LAUSCR 0x80 +#define LCDC_LAUSCCR 0x84 + +#define LCDC_REG(reg) (IO_ADDRESS(LCDC_BASE_ADDR) + reg) + +#define MX2FB_INT_BOF 0x0001 /* Beginning of Frame */ +#define MX2FB_INT_EOF 0x0002 /* End of Frame */ +#define MX2FB_INT_ERR_RES 0x0004 /* Error Response */ +#define MX2FB_INT_UDR_ERR 0x0008 /* Under Run Error */ +#define MX2FB_INT_GW_BOF 0x0010 /* Graphic Window BOF */ +#define MX2FB_INT_GW_EOF 0x0020 /* Graphic Window EOF */ +#define MX2FB_INT_GW_ERR_RES 0x0040 /* Graphic Window ERR_RES */ +#define MX2FB_INT_GW_UDR_ERR 0x0080 /* Graphic Window UDR_ERR */ + +#define FB_EVENT_MXC_EOF 0x8001 /* End of Frame event */ + +int mx2fb_register_client(struct notifier_block *nb); +int mx2fb_unregister_client(struct notifier_block *nb); + +void mx2_gw_set(struct fb_gwinfo *gwinfo); + +#endif /* __KERNEL__ */ + +#endif /* __MX2FB_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxcfb_modedb.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxcfb_modedb.c @@ -0,0 +1,69 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include + +struct fb_videomode mxcfb_modedb[] = { + { + /* 240x320 @ 60 Hz */ + "Sharp-QVGA", 60, 240, 320, 185925, 9, 16, 7, 9, 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | + FB_SYNC_DATA_INVERT | FB_SYNC_CLK_IDLE_EN, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 240x33 @ 60 Hz */ + "Sharp-CLI", 60, 240, 33, 185925, 9, 16, 7, 9 + 287, 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | + FB_SYNC_DATA_INVERT | FB_SYNC_CLK_IDLE_EN, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 640x480 @ 60 Hz */ + "NEC-VGA", 60, 640, 480, 38255, 144, 0, 34, 40, 1, 1, + FB_SYNC_VERT_HIGH_ACT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* 640x480 @ 60 Hz */ + "CPT-VGA", 60, 640, 480, 39683, 45, 114, 33, 11, 1, 1, + FB_SYNC_CLK_LAT_FALL, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* NTSC TV output */ + "TV-NTSC", 60, 640, 480, 37538, + 38, 858 - 640 - 38 - 3, + 36, 518 - 480 - 36 - 1, + 3, 1, + 0, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* PAL TV output */ + "TV-PAL", 50, 640, 480, 37538, + 38, 960 - 640 - 38 - 32, + 32, 555 - 480 - 32 - 3, + 32, 3, + 0, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* TV output VGA mode, 640x480 @ 65 Hz */ + "TV-VGA", 60, 640, 480, 40574, 35, 45, 9, 1, 46, 5, + 0, FB_VMODE_NONINTERLACED, 0, + }, +}; + +int mxcfb_modedb_sz = ARRAY_SIZE(mxcfb_modedb); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mxc_ipuv3_fb.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mxc_ipuv3_fb.c @@ -0,0 +1,1694 @@ +/* + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxcfb.c + * + * @brief MXC Frame buffer driver for SDC + * + * @ingroup Framebuffer + */ + +/*! + * Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Driver name + */ +#define MXCFB_NAME "mxc_sdc_fb" +/*! + * Structure containing the MXC specific framebuffer information. + */ +struct mxcfb_info { + int blank; + ipu_channel_t ipu_ch; + int ipu_di; + u32 ipu_di_pix_fmt; + bool overlay; + bool alpha_chan_en; + dma_addr_t alpha_phy_addr0; + dma_addr_t alpha_phy_addr1; + void *alpha_virt_addr0; + void *alpha_virt_addr1; + uint32_t alpha_mem_len; + uint32_t ipu_ch_irq; + uint32_t cur_ipu_buf; + uint32_t cur_ipu_alpha_buf; + + u32 pseudo_palette[16]; + + struct semaphore flip_sem; + struct semaphore alpha_flip_sem; + struct completion vsync_complete; +}; + +struct mxcfb_alloc_list { + struct list_head list; + dma_addr_t phy_addr; + void *cpu_addr; + u32 size; +}; + +enum { + BOTH_ON, + SRC_ON, + TGT_ON, + BOTH_OFF +}; + +static char *fb_mode; +static unsigned long default_bpp = 16; +static bool g_dp_in_use; +LIST_HEAD(fb_alloc_list); +static struct fb_info *mxcfb_info[3]; +static int ext_clk_used; + +static uint32_t bpp_to_pixfmt(struct fb_info *fbi) +{ + uint32_t pixfmt = 0; + + if (fbi->var.nonstd) + return fbi->var.nonstd; + + switch (fbi->var.bits_per_pixel) { + case 24: + pixfmt = IPU_PIX_FMT_BGR24; + break; + case 32: + pixfmt = IPU_PIX_FMT_BGR32; + break; + case 16: + pixfmt = IPU_PIX_FMT_RGB565; + break; + } + return pixfmt; +} + +static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id); +static int mxcfb_blank(int blank, struct fb_info *info); +static int mxcfb_map_video_memory(struct fb_info *fbi); +static int mxcfb_unmap_video_memory(struct fb_info *fbi); + +/* + * Set fixed framebuffer parameters based on variable settings. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_fix(struct fb_info *info) +{ + struct fb_fix_screeninfo *fix = &info->fix; + struct fb_var_screeninfo *var = &info->var; + + fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; + + fix->type = FB_TYPE_PACKED_PIXELS; + fix->accel = FB_ACCEL_NONE; + fix->visual = FB_VISUAL_TRUECOLOR; + fix->xpanstep = 1; + fix->ypanstep = 1; + + return 0; +} + +static int _setup_disp_channel1(struct fb_info *fbi) +{ + ipu_channel_params_t params; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + memset(¶ms, 0, sizeof(params)); + params.mem_dp_bg_sync.di = mxc_fbi->ipu_di; + + /* + * Assuming interlaced means yuv output, below setting also + * valid for mem_dc_sync. FG should have the same vmode as BG. + */ + if (mxc_fbi->ipu_ch == MEM_FG_SYNC) { + struct mxcfb_info *mxc_fbi_tmp; + int i; + + for (i = 0; i < num_registered_fb; i++) { + mxc_fbi_tmp = (struct mxcfb_info *) + (registered_fb[i]->par); + if (mxc_fbi_tmp->ipu_ch == MEM_BG_SYNC) { + fbi->var.vmode = + registered_fb[i]->var.vmode; + mxc_fbi->ipu_di_pix_fmt = + mxc_fbi_tmp->ipu_di_pix_fmt; + break; + } + } + } + if (fbi->var.vmode & FB_VMODE_INTERLACED) { + params.mem_dp_bg_sync.interlaced = true; + params.mem_dp_bg_sync.out_pixel_fmt = + IPU_PIX_FMT_YUV444; + } else { + if (mxc_fbi->ipu_di_pix_fmt) + params.mem_dp_bg_sync.out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt; + else + params.mem_dp_bg_sync.out_pixel_fmt = IPU_PIX_FMT_RGB666; + } + params.mem_dp_bg_sync.in_pixel_fmt = bpp_to_pixfmt(fbi); + if (mxc_fbi->alpha_chan_en) + params.mem_dp_bg_sync.alpha_chan_en = true; + + ipu_init_channel(mxc_fbi->ipu_ch, ¶ms); + + return 0; +} + +static int _setup_disp_channel2(struct fb_info *fbi) +{ + int retval = 0; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + mxc_fbi->cur_ipu_buf = 1; + sema_init(&mxc_fbi->flip_sem, 1); + if (mxc_fbi->alpha_chan_en) { + mxc_fbi->cur_ipu_alpha_buf = 1; + sema_init(&mxc_fbi->alpha_flip_sem, 1); + } + fbi->var.xoffset = fbi->var.yoffset = 0; + + retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + bpp_to_pixfmt(fbi), + fbi->var.xres, fbi->var.yres, + fbi->fix.line_length, + IPU_ROTATE_NONE, + fbi->fix.smem_start + + (fbi->fix.line_length * fbi->var.yres), + fbi->fix.smem_start, + 0, 0); + if (retval) { + dev_err(fbi->device, + "ipu_init_channel_buffer error %d\n", retval); + } + + if (mxc_fbi->alpha_chan_en) { + retval = ipu_init_channel_buffer(mxc_fbi->ipu_ch, + IPU_ALPHA_IN_BUFFER, + IPU_PIX_FMT_GENERIC, + fbi->var.xres, fbi->var.yres, + fbi->var.xres, + IPU_ROTATE_NONE, + mxc_fbi->alpha_phy_addr1, + mxc_fbi->alpha_phy_addr0, + 0, 0); + if (retval) { + dev_err(fbi->device, + "ipu_init_channel_buffer error %d\n", retval); + return retval; + } + } + + return retval; +} + +/* + * Set framebuffer parameters and change the operating mode. + * + * @param info framebuffer information pointer + */ +static int mxcfb_set_par(struct fb_info *fbi) +{ + int retval = 0; + u32 mem_len, alpha_mem_len; + ipu_di_signal_cfg_t sig_cfg; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + dev_dbg(fbi->device, "Reconfiguring framebuffer\n"); + + ipu_disable_irq(mxc_fbi->ipu_ch_irq); + ipu_disable_channel(mxc_fbi->ipu_ch, true); + ipu_uninit_channel(mxc_fbi->ipu_ch); + ipu_clear_irq(mxc_fbi->ipu_ch_irq); + mxcfb_set_fix(fbi); + + mem_len = fbi->var.yres_virtual * fbi->fix.line_length; + if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) { + if (fbi->fix.smem_start) + mxcfb_unmap_video_memory(fbi); + + if (mxcfb_map_video_memory(fbi) < 0) + return -ENOMEM; + } + if (mxc_fbi->alpha_chan_en) { + alpha_mem_len = fbi->var.xres * fbi->var.yres; + if ((!mxc_fbi->alpha_phy_addr0 && !mxc_fbi->alpha_phy_addr1) || + (alpha_mem_len > mxc_fbi->alpha_mem_len)) { + if (mxc_fbi->alpha_phy_addr0) + dma_free_coherent(fbi->device, + mxc_fbi->alpha_mem_len, + mxc_fbi->alpha_virt_addr0, + mxc_fbi->alpha_phy_addr0); + if (mxc_fbi->alpha_phy_addr1) + dma_free_coherent(fbi->device, + mxc_fbi->alpha_mem_len, + mxc_fbi->alpha_virt_addr1, + mxc_fbi->alpha_phy_addr1); + + mxc_fbi->alpha_virt_addr0 = + dma_alloc_coherent(fbi->device, + alpha_mem_len, + &mxc_fbi->alpha_phy_addr0, + GFP_DMA | GFP_KERNEL); + + mxc_fbi->alpha_virt_addr1 = + dma_alloc_coherent(fbi->device, + alpha_mem_len, + &mxc_fbi->alpha_phy_addr1, + GFP_DMA | GFP_KERNEL); + if (mxc_fbi->alpha_virt_addr0 == NULL || + mxc_fbi->alpha_virt_addr1 == NULL) { + dev_err(fbi->device, "mxcfb: dma alloc for" + " alpha buffer failed.\n"); + if (mxc_fbi->alpha_virt_addr0) + dma_free_coherent(fbi->device, + mxc_fbi->alpha_mem_len, + mxc_fbi->alpha_virt_addr0, + mxc_fbi->alpha_phy_addr0); + if (mxc_fbi->alpha_virt_addr1) + dma_free_coherent(fbi->device, + mxc_fbi->alpha_mem_len, + mxc_fbi->alpha_virt_addr1, + mxc_fbi->alpha_phy_addr1); + return -ENOMEM; + } + mxc_fbi->alpha_mem_len = alpha_mem_len; + } + } + + _setup_disp_channel1(fbi); + + if (!mxc_fbi->overlay) { + uint32_t out_pixel_fmt; + + memset(&sig_cfg, 0, sizeof(sig_cfg)); + if (fbi->var.vmode & FB_VMODE_INTERLACED) { + sig_cfg.interlaced = true; + out_pixel_fmt = IPU_PIX_FMT_YUV444; + } else { + if (mxc_fbi->ipu_di_pix_fmt) + out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt; + else + out_pixel_fmt = IPU_PIX_FMT_RGB666; + } + if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */ + sig_cfg.odd_field_first = true; + if ((fbi->var.sync & FB_SYNC_EXT) || ext_clk_used) + sig_cfg.ext_clk = true; + if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT) + sig_cfg.Hsync_pol = true; + if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) + sig_cfg.Vsync_pol = true; + if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL)) + sig_cfg.clk_pol = true; + if (fbi->var.sync & FB_SYNC_DATA_INVERT) + sig_cfg.data_pol = true; + if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT)) + sig_cfg.enable_pol = true; + if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN) + sig_cfg.clkidle_en = true; + + dev_dbg(fbi->device, "pixclock = %ul Hz\n", + (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL)); + + if (ipu_init_sync_panel(mxc_fbi->ipu_di, + (PICOS2KHZ(fbi->var.pixclock)) * 1000UL, + fbi->var.xres, fbi->var.yres, + out_pixel_fmt, + fbi->var.left_margin, + fbi->var.hsync_len, + fbi->var.right_margin, + fbi->var.upper_margin, + fbi->var.vsync_len, + fbi->var.lower_margin, + 0, sig_cfg) != 0) { + dev_err(fbi->device, + "mxcfb: Error initializing panel.\n"); + return -EINVAL; + } + + fbi->mode = + (struct fb_videomode *)fb_match_mode(&fbi->var, + &fbi->modelist); + ipu_disp_set_window_pos(mxc_fbi->ipu_ch, 0, 0); + } + + retval = _setup_disp_channel2(fbi); + if (retval) + return retval; + + if (mxc_fbi->blank == FB_BLANK_UNBLANK) { + ipu_enable_channel(mxc_fbi->ipu_ch); + } + + return retval; +} + +static int _swap_channels(struct fb_info *fbi, + struct fb_info *fbi_to, bool both_on) +{ + int retval, tmp; + ipu_channel_t old_ch; + struct mxcfb_info *mxc_fbi_from = (struct mxcfb_info *)fbi->par; + struct mxcfb_info *mxc_fbi_to = (struct mxcfb_info *)fbi_to->par; + + if (both_on) { + ipu_disable_channel(mxc_fbi_to->ipu_ch, true); + ipu_uninit_channel(mxc_fbi_to->ipu_ch); + } + + /* switch the mxc fbi parameters */ + old_ch = mxc_fbi_from->ipu_ch; + mxc_fbi_from->ipu_ch = mxc_fbi_to->ipu_ch; + mxc_fbi_to->ipu_ch = old_ch; + tmp = mxc_fbi_from->ipu_ch_irq; + mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq; + mxc_fbi_to->ipu_ch_irq = tmp; + + _setup_disp_channel1(fbi); + retval = _setup_disp_channel2(fbi); + if (retval) + return retval; + + /* switch between dp and dc, disable old idmac, enable new idmac */ + retval = ipu_swap_channel(old_ch, mxc_fbi_from->ipu_ch); + ipu_uninit_channel(old_ch); + + if (both_on) { + _setup_disp_channel1(fbi_to); + retval = _setup_disp_channel2(fbi_to); + if (retval) + return retval; + ipu_enable_channel(mxc_fbi_to->ipu_ch); + } + + return retval; +} + +static int swap_channels(struct fb_info *fbi) +{ + int i; + int swap_mode; + ipu_channel_t ch_to; + struct mxcfb_info *mxc_fbi_from = (struct mxcfb_info *)fbi->par; + struct fb_info *fbi_to = NULL; + struct mxcfb_info *mxc_fbi_to; + + /* what's the target channel? */ + if (mxc_fbi_from->ipu_ch == MEM_BG_SYNC) + ch_to = MEM_DC_SYNC; + else + ch_to = MEM_BG_SYNC; + + for (i = 0; i < num_registered_fb; i++) { + mxc_fbi_to = + (struct mxcfb_info *)mxcfb_info[i]->par; + if (mxc_fbi_to->ipu_ch == ch_to) { + fbi_to = mxcfb_info[i]; + break; + } + } + if (fbi_to == NULL) + return -1; + + ipu_clear_irq(mxc_fbi_from->ipu_ch_irq); + ipu_clear_irq(mxc_fbi_to->ipu_ch_irq); + ipu_free_irq(mxc_fbi_from->ipu_ch_irq, fbi); + ipu_free_irq(mxc_fbi_to->ipu_ch_irq, fbi_to); + + if (mxc_fbi_from->blank == FB_BLANK_UNBLANK) { + if (mxc_fbi_to->blank == FB_BLANK_UNBLANK) + swap_mode = BOTH_ON; + else + swap_mode = SRC_ON; + } else { + if (mxc_fbi_to->blank == FB_BLANK_UNBLANK) + swap_mode = TGT_ON; + else + swap_mode = BOTH_OFF; + } + + /* tvout di-1: for DC use UYVY, for DP use RGB */ + if (mxc_fbi_from->ipu_di == 1 && ch_to == MEM_DC_SYNC) { + fbi->var.bits_per_pixel = 16; + fbi->var.nonstd = IPU_PIX_FMT_UYVY; + } else if (mxc_fbi_from->ipu_di == 1 && ch_to == MEM_BG_SYNC) { + fbi->var.nonstd = 0; + } else if (mxc_fbi_from->ipu_di == 0 && ch_to == MEM_DC_SYNC) { + fbi_to->var.nonstd = 0; + } else if (mxc_fbi_from->ipu_di == 0 && ch_to == MEM_BG_SYNC) { + fbi->var.bits_per_pixel = 16; + fbi->var.nonstd = IPU_PIX_FMT_UYVY; + } + + switch (swap_mode) { + case BOTH_ON: + /* disable target->switch src->enable target */ + _swap_channels(fbi, fbi_to, true); + break; + case SRC_ON: + /* just switch src */ + _swap_channels(fbi, fbi_to, false); + break; + case TGT_ON: + /* just switch target */ + _swap_channels(fbi_to, fbi, false); + break; + case BOTH_OFF: + /* switch directly, no more need to do */ + mxc_fbi_to->ipu_ch = mxc_fbi_from->ipu_ch; + mxc_fbi_from->ipu_ch = ch_to; + i = mxc_fbi_from->ipu_ch_irq; + mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq; + mxc_fbi_to->ipu_ch_irq = i; + break; + default: + break; + } + + if (ipu_request_irq(mxc_fbi_from->ipu_ch_irq, mxcfb_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(fbi->device, "Error registering irq %d\n", + mxc_fbi_from->ipu_ch_irq); + return -EBUSY; + } + if (ipu_request_irq(mxc_fbi_to->ipu_ch_irq, mxcfb_irq_handler, 0, + MXCFB_NAME, fbi_to) != 0) { + dev_err(fbi_to->device, "Error registering irq %d\n", + mxc_fbi_to->ipu_ch_irq); + return -EBUSY; + } + + return 0; +} + +/* + * Check framebuffer variable parameters and adjust to valid values. + * + * @param var framebuffer variable parameters + * + * @param info framebuffer information pointer + */ +static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + u32 vtotal; + u32 htotal; + + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; + + if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && + (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8)) + var->bits_per_pixel = default_bpp; + + switch (var->bits_per_pixel) { + case 8: + var->red.length = 3; + var->red.offset = 5; + var->red.msb_right = 0; + + var->green.length = 3; + var->green.offset = 2; + var->green.msb_right = 0; + + var->blue.length = 2; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 16: + var->red.length = 5; + var->red.offset = 11; + var->red.msb_right = 0; + + var->green.length = 6; + var->green.offset = 5; + var->green.msb_right = 0; + + var->blue.length = 5; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 24: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 32: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 8; + var->transp.offset = 24; + var->transp.msb_right = 0; + break; + } + + if (var->pixclock < 1000) { + htotal = var->xres + var->right_margin + var->hsync_len + + var->left_margin; + vtotal = var->yres + var->lower_margin + var->vsync_len + + var->upper_margin; + var->pixclock = (vtotal * htotal * 6UL) / 100UL; + var->pixclock = KHZ2PICOS(var->pixclock); + dev_dbg(info->device, + "pixclock set for 60Hz refresh = %u ps\n", + var->pixclock); + } + + var->height = -1; + var->width = -1; + var->grayscale = 0; + + return 0; +} + +static inline u_int _chan_to_field(u_int chan, struct fb_bitfield *bf) +{ + chan &= 0xffff; + chan >>= 16 - bf->length; + return chan << bf->offset; +} + +static int mxcfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int trans, struct fb_info *fbi) +{ + unsigned int val; + int ret = 1; + + /* + * If greyscale is true, then we convert the RGB value + * to greyscale no matter what visual we are using. + */ + if (fbi->var.grayscale) + red = green = blue = (19595 * red + 38470 * green + + 7471 * blue) >> 16; + switch (fbi->fix.visual) { + case FB_VISUAL_TRUECOLOR: + /* + * 16-bit True Colour. We encode the RGB value + * according to the RGB bitfield information. + */ + if (regno < 16) { + u32 *pal = fbi->pseudo_palette; + + val = _chan_to_field(red, &fbi->var.red); + val |= _chan_to_field(green, &fbi->var.green); + val |= _chan_to_field(blue, &fbi->var.blue); + + pal[regno] = val; + ret = 0; + } + break; + + case FB_VISUAL_STATIC_PSEUDOCOLOR: + case FB_VISUAL_PSEUDOCOLOR: + break; + } + + return ret; +} + +/* + * Function to handle custom ioctls for MXC framebuffer. + * + * @param inode inode struct + * + * @param file file struct + * + * @param cmd Ioctl command to handle + * + * @param arg User pointer to command arguments + * + * @param fbi framebuffer information pointer + */ +static int mxcfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg) +{ + int retval = 0; + int __user *argp = (void __user *)arg; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + switch (cmd) { + case MXCFB_SET_GBL_ALPHA: + { + struct mxcfb_gbl_alpha ga; + + if (copy_from_user(&ga, (void *)arg, sizeof(ga))) { + retval = -EFAULT; + break; + } + + if (ipu_disp_set_global_alpha(mxc_fbi->ipu_ch, + (bool)ga.enable, + ga.alpha)) { + retval = -EINVAL; + break; + } + + if (ga.enable) + mxc_fbi->alpha_chan_en = false; + + if (ga.enable) + dev_dbg(fbi->device, + "Set global alpha of %s to %d\n", + fbi->fix.id, ga.alpha); + break; + } + case MXCFB_SET_LOC_ALPHA: + { + struct mxcfb_loc_alpha la; + int i; + char *video_plane_idstr = ""; + + if (copy_from_user(&la, (void *)arg, sizeof(la))) { + retval = -EFAULT; + break; + } + + if (ipu_disp_set_global_alpha(mxc_fbi->ipu_ch, + !(bool)la.enable, 0)) { + retval = -EINVAL; + break; + } + + if (la.enable && !la.alpha_in_pixel) { + mxc_fbi->alpha_chan_en = true; + + if (mxc_fbi->ipu_ch == MEM_FG_SYNC) + video_plane_idstr = "DISP3 BG"; + else if (mxc_fbi->ipu_ch == MEM_BG_SYNC) + video_plane_idstr = "DISP3 FG"; + + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strcmp(idstr, video_plane_idstr) == 0) { + ((struct mxcfb_info *)(registered_fb[i]->par))->alpha_chan_en = false; + break; + } + } + } else + mxc_fbi->alpha_chan_en = false; + + mxcfb_set_par(fbi); + + la.alpha_phy_addr0 = mxc_fbi->alpha_phy_addr0; + la.alpha_phy_addr1 = mxc_fbi->alpha_phy_addr1; + if (copy_to_user((void *)arg, &la, sizeof(la))) { + retval = -EFAULT; + break; + } + + if (la.enable) + dev_dbg(fbi->device, + "Enable DP local alpha for %s\n", + fbi->fix.id); + break; + } + case MXCFB_SET_LOC_ALP_BUF: + { + unsigned long base; + uint32_t ipu_alp_ch_irq; + + if (!(((mxc_fbi->ipu_ch == MEM_FG_SYNC) || + (mxc_fbi->ipu_ch == MEM_BG_SYNC)) && + (mxc_fbi->alpha_chan_en))) { + dev_err(fbi->device, + "Should use background or overlay " + "framebuffer to set the alpha buffer " + "number\n"); + return -EINVAL; + } + + if (get_user(base, argp)) + return -EFAULT; + + if (base != mxc_fbi->alpha_phy_addr0 && + base != mxc_fbi->alpha_phy_addr1) { + dev_err(fbi->device, + "Wrong alpha buffer physical address " + "%lu\n", base); + return -EINVAL; + } + + if (mxc_fbi->ipu_ch == MEM_FG_SYNC) + ipu_alp_ch_irq = IPU_IRQ_FG_ALPHA_SYNC_EOF; + else + ipu_alp_ch_irq = IPU_IRQ_BG_ALPHA_SYNC_EOF; + + down(&mxc_fbi->alpha_flip_sem); + + mxc_fbi->cur_ipu_alpha_buf = + !mxc_fbi->cur_ipu_alpha_buf; + if (ipu_update_channel_buffer(mxc_fbi->ipu_ch, + IPU_ALPHA_IN_BUFFER, + mxc_fbi-> + cur_ipu_alpha_buf, + base) == 0) { + ipu_select_buffer(mxc_fbi->ipu_ch, + IPU_ALPHA_IN_BUFFER, + mxc_fbi->cur_ipu_alpha_buf); + ipu_clear_irq(ipu_alp_ch_irq); + ipu_enable_irq(ipu_alp_ch_irq); + } else { + dev_err(fbi->device, + "Error updating %s SDC alpha buf %d " + "to address=0x%08lX\n", + fbi->fix.id, + mxc_fbi->cur_ipu_alpha_buf, base); + } + break; + } + case MXCFB_SET_CLR_KEY: + { + struct mxcfb_color_key key; + if (copy_from_user(&key, (void *)arg, sizeof(key))) { + retval = -EFAULT; + break; + } + retval = ipu_disp_set_color_key(mxc_fbi->ipu_ch, + key.enable, + key.color_key); + dev_dbg(fbi->device, "Set color key to 0x%08X\n", + key.color_key); + break; + } + case MXCFB_SET_GAMMA: + { + struct mxcfb_gamma gamma; + if (copy_from_user(&gamma, (void *)arg, sizeof(gamma))) { + retval = -EFAULT; + break; + } + retval = ipu_disp_set_gamma_correction(mxc_fbi->ipu_ch, + gamma.enable, + gamma.constk, + gamma.slopek); + break; + } + case MXCFB_WAIT_FOR_VSYNC: + { + if (mxc_fbi->ipu_ch == MEM_FG_SYNC) { + struct mxcfb_info *bg_mxcfbi = NULL; + int i; + for (i = 0; i < num_registered_fb; i++) { + bg_mxcfbi = + ((struct mxcfb_info *)(registered_fb[i]->par)); + + if (bg_mxcfbi->ipu_ch == MEM_BG_SYNC) + break; + } + if (bg_mxcfbi->blank != FB_BLANK_UNBLANK) { + retval = -EINVAL; + break; + } + } + if (mxc_fbi->blank != FB_BLANK_UNBLANK) { + retval = -EINVAL; + break; + } + + down(&mxc_fbi->flip_sem); + init_completion(&mxc_fbi->vsync_complete); + + ipu_clear_irq(mxc_fbi->ipu_ch_irq); + ipu_enable_irq(mxc_fbi->ipu_ch_irq); + retval = wait_for_completion_interruptible_timeout( + &mxc_fbi->vsync_complete, 1 * HZ); + if (retval == 0) { + dev_err(fbi->device, + "MXCFB_WAIT_FOR_VSYNC: timeout %d\n", + retval); + retval = -ETIME; + } else if (retval > 0) { + retval = 0; + } + break; + } + case FBIO_ALLOC: + { + int size; + struct mxcfb_alloc_list *mem; + + mem = kzalloc(sizeof(*mem), GFP_KERNEL); + if (mem == NULL) + return -ENOMEM; + + if (get_user(size, argp)) + return -EFAULT; + + mem->size = PAGE_ALIGN(size); + + mem->cpu_addr = dma_alloc_coherent(fbi->device, size, + &mem->phy_addr, + GFP_DMA); + if (mem->cpu_addr == NULL) { + kfree(mem); + return -ENOMEM; + } + + list_add(&mem->list, &fb_alloc_list); + + dev_dbg(fbi->device, "allocated %d bytes @ 0x%08X\n", + mem->size, mem->phy_addr); + + if (put_user(mem->phy_addr, argp)) + return -EFAULT; + + break; + } + case FBIO_FREE: + { + unsigned long offset; + struct mxcfb_alloc_list *mem; + + if (get_user(offset, argp)) + return -EFAULT; + + retval = -EINVAL; + list_for_each_entry(mem, &fb_alloc_list, list) { + if (mem->phy_addr == offset) { + list_del(&mem->list); + dma_free_coherent(fbi->device, + mem->size, + mem->cpu_addr, + mem->phy_addr); + kfree(mem); + retval = 0; + break; + } + } + + break; + } + case MXCFB_SET_OVERLAY_POS: + { + struct mxcfb_pos pos; + struct fb_info *bg_fbi = NULL; + struct mxcfb_info *bg_mxcfbi = NULL; + int i; + + if (mxc_fbi->ipu_ch != MEM_FG_SYNC) { + dev_err(fbi->device, "Should use the overlay " + "framebuffer to set the position of " + "the overlay window\n"); + retval = -EINVAL; + break; + } + + if (copy_from_user(&pos, (void *)arg, sizeof(pos))) { + retval = -EFAULT; + break; + } + + for (i = 0; i < num_registered_fb; i++) { + bg_mxcfbi = + ((struct mxcfb_info *)(registered_fb[i]->par)); + + if (bg_mxcfbi->ipu_ch == MEM_BG_SYNC) { + bg_fbi = registered_fb[i]; + break; + } + } + + if (bg_fbi == NULL) { + dev_err(fbi->device, "Cannot find the " + "background framebuffer\n"); + retval = -ENOENT; + break; + } + + if (fbi->var.xres + pos.x > bg_fbi->var.xres) { + if (bg_fbi->var.xres < fbi->var.xres) + pos.x = 0; + else + pos.x = bg_fbi->var.xres - fbi->var.xres; + } + if (fbi->var.yres + pos.y > bg_fbi->var.yres) { + if (bg_fbi->var.yres < fbi->var.yres) + pos.y = 0; + else + pos.y = bg_fbi->var.yres - fbi->var.yres; + } + + retval = ipu_disp_set_window_pos(mxc_fbi->ipu_ch, + pos.x, pos.y); + + if (copy_to_user((void *)arg, &pos, sizeof(pos))) { + retval = -EFAULT; + break; + } + break; + } + case MXCFB_GET_FB_IPU_CHAN: + { + struct mxcfb_info *mxc_fbi = + (struct mxcfb_info *)fbi->par; + + if (put_user(mxc_fbi->ipu_ch, argp)) + return -EFAULT; + break; + } + default: + retval = -EINVAL; + } + return retval; +} + +/* + * mxcfb_blank(): + * Blank the display. + */ +static int mxcfb_blank(int blank, struct fb_info *info) +{ + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par; + + dev_dbg(info->device, "blank = %d\n", blank); + + if (mxc_fbi->blank == blank) + return 0; + + mxc_fbi->blank = blank; + + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + ipu_disable_channel(mxc_fbi->ipu_ch, true); + ipu_uninit_channel(mxc_fbi->ipu_ch); + break; + case FB_BLANK_UNBLANK: + mxcfb_set_par(info); + break; + } + return 0; +} + +/* + * Pan or Wrap the Display + * + * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag + * + * @param var Variable screen buffer information + * @param info Framebuffer information pointer + */ +static int +mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) +{ + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par, + *mxc_graphic_fbi = NULL; + u_int y_bottom; + unsigned long base, active_alpha_phy_addr = 0; + bool loc_alpha_en = false; + int i = 0; + + if (var->xoffset > 0) { + dev_dbg(info->device, "x panning not supported\n"); + return -EINVAL; + } + + if ((info->var.xoffset == var->xoffset) && + (info->var.yoffset == var->yoffset)) + return 0; /* No change, do nothing */ + + y_bottom = var->yoffset; + + if (!(var->vmode & FB_VMODE_YWRAP)) + y_bottom += var->yres; + + if (y_bottom > info->var.yres_virtual) + return -EINVAL; + + base = (var->yoffset * var->xres_virtual + var->xoffset); + base *= (var->bits_per_pixel) / 8; + base += info->fix.smem_start; + + dev_dbg(info->device, "Updating SDC %s buf %d address=0x%08lX\n", + info->fix.id, mxc_fbi->cur_ipu_buf, base); + + /* Check if DP local alpha is enabled and find the graphic fb */ + if (mxc_fbi->ipu_ch == MEM_BG_SYNC || mxc_fbi->ipu_ch == MEM_FG_SYNC) { + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if ((strcmp(idstr, "DISP3 BG") == 0 || + strcmp(idstr, "DISP3 FG") == 0) && + ((struct mxcfb_info *) + (registered_fb[i]->par))->alpha_chan_en) { + loc_alpha_en = true; + mxc_graphic_fbi = (struct mxcfb_info *) + (registered_fb[i]->par); + active_alpha_phy_addr = mxc_fbi->cur_ipu_buf ? + mxc_graphic_fbi->alpha_phy_addr1 : + mxc_graphic_fbi->alpha_phy_addr0; + dev_dbg(info->device, "Updating SDC graphic " + "buf %d address=0x%08lX\n", + mxc_fbi->cur_ipu_buf, + active_alpha_phy_addr); + break; + } + } + } + + down(&mxc_fbi->flip_sem); + init_completion(&mxc_fbi->vsync_complete); + + mxc_fbi->cur_ipu_buf = !mxc_fbi->cur_ipu_buf; + if (ipu_update_channel_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf, base) == 0) { + /* Update the DP local alpha buffer only for graphic plane */ + if (loc_alpha_en && mxc_graphic_fbi == mxc_fbi && + ipu_update_channel_buffer(mxc_graphic_fbi->ipu_ch, + IPU_ALPHA_IN_BUFFER, + mxc_fbi->cur_ipu_buf, + active_alpha_phy_addr) == 0) { + ipu_select_buffer(mxc_graphic_fbi->ipu_ch, + IPU_ALPHA_IN_BUFFER, + mxc_fbi->cur_ipu_buf); + } + + ipu_select_buffer(mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, + mxc_fbi->cur_ipu_buf); + ipu_clear_irq(mxc_fbi->ipu_ch_irq); + ipu_enable_irq(mxc_fbi->ipu_ch_irq); + } else { + dev_err(info->device, + "Error updating SDC buf %d to address=0x%08lX\n", + mxc_fbi->cur_ipu_buf, base); + } + + dev_dbg(info->device, "Update complete\n"); + + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; + + if (var->vmode & FB_VMODE_YWRAP) + info->var.vmode |= FB_VMODE_YWRAP; + else + info->var.vmode &= ~FB_VMODE_YWRAP; + + return 0; +} + +/* + * Function to handle custom mmap for MXC framebuffer. + * + * @param fbi framebuffer information pointer + * + * @param vma Pointer to vm_area_struct + */ +static int mxcfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) +{ + bool found = false; + u32 len; + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + struct mxcfb_alloc_list *mem; + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + + if (offset < fbi->fix.smem_len) { + /* mapping framebuffer memory */ + len = fbi->fix.smem_len - offset; + vma->vm_pgoff = (fbi->fix.smem_start + offset) >> PAGE_SHIFT; + } else if ((vma->vm_pgoff == + (mxc_fbi->alpha_phy_addr0 >> PAGE_SHIFT)) || + (vma->vm_pgoff == + (mxc_fbi->alpha_phy_addr1 >> PAGE_SHIFT))) { + len = mxc_fbi->alpha_mem_len; + } else { + list_for_each_entry(mem, &fb_alloc_list, list) { + if (offset == mem->phy_addr) { + found = true; + len = mem->size; + break; + } + } + if (!found) + return -EINVAL; + } + + len = PAGE_ALIGN(len); + if (vma->vm_end - vma->vm_start > len) + return -EINVAL; + + /* make buffers bufferable */ + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); + + vma->vm_flags |= VM_IO | VM_RESERVED; + + if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + vma->vm_end - vma->vm_start, vma->vm_page_prot)) { + dev_dbg(fbi->device, "mmap remap_pfn_range failed\n"); + return -ENOBUFS; + } + + return 0; +} + +/*! + * This structure contains the pointers to the control functions that are + * invoked by the core framebuffer driver to perform operations like + * blitting, rectangle filling, copy regions and cursor definition. + */ +static struct fb_ops mxcfb_ops = { + .owner = THIS_MODULE, + .fb_set_par = mxcfb_set_par, + .fb_check_var = mxcfb_check_var, + .fb_setcolreg = mxcfb_setcolreg, + .fb_pan_display = mxcfb_pan_display, + .fb_ioctl = mxcfb_ioctl, + .fb_mmap = mxcfb_mmap, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_blank = mxcfb_blank, +}; + +static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id) +{ + struct fb_info *fbi = dev_id; + struct mxcfb_info *mxc_fbi = fbi->par; + + complete(&mxc_fbi->vsync_complete); + up(&mxc_fbi->flip_sem); + ipu_disable_irq(irq); + return IRQ_HANDLED; +} + +static irqreturn_t mxcfb_alpha_irq_handler(int irq, void *dev_id) +{ + struct fb_info *fbi = dev_id; + struct mxcfb_info *mxc_fbi = fbi->par; + + up(&mxc_fbi->alpha_flip_sem); + ipu_disable_irq(irq); + return IRQ_HANDLED; +} + +/* + * Suspends the framebuffer and blanks the screen. Power management support + */ +static int mxcfb_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct fb_info *fbi = platform_get_drvdata(pdev); + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + int saved_blank; +#ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY + void *fbmem; +#endif + + acquire_console_sem(); + fb_set_suspend(fbi, 1); + saved_blank = mxc_fbi->blank; + mxcfb_blank(FB_BLANK_POWERDOWN, fbi); + mxc_fbi->blank = saved_blank; + release_console_sem(); + + return 0; +} + +/* + * Resumes the framebuffer and unblanks the screen. Power management support + */ +static int mxcfb_resume(struct platform_device *pdev) +{ + struct fb_info *fbi = platform_get_drvdata(pdev); + struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par; + int saved_blank; + + acquire_console_sem(); + saved_blank = mxc_fbi->blank; + mxc_fbi->blank = FB_BLANK_POWERDOWN; + mxcfb_blank(saved_blank, fbi); + fb_set_suspend(fbi, 0); + release_console_sem(); + + return 0; +} + +/* + * Main framebuffer functions + */ + +/*! + * Allocates the DRAM memory for the frame buffer. This buffer is remapped + * into a non-cached, non-buffered, memory region to allow palette and pixel + * writes to occur without flushing the cache. Once this area is remapped, + * all virtual memory access to the video memory should occur at the new region. + * + * @param fbi framebuffer information pointer + * + * @return Error code indicating success or failure + */ +static int mxcfb_map_video_memory(struct fb_info *fbi) +{ + if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) + fbi->fix.smem_len = fbi->var.yres_virtual * + fbi->fix.line_length; + + fbi->screen_base = dma_alloc_writecombine(fbi->device, + fbi->fix.smem_len, + (dma_addr_t *)&fbi->fix.smem_start, + GFP_DMA); + if (fbi->screen_base == 0) { + dev_err(fbi->device, "Unable to allocate framebuffer memory\n"); + fbi->fix.smem_len = 0; + fbi->fix.smem_start = 0; + return -EBUSY; + } + + dev_dbg(fbi->device, "allocated fb @ paddr=0x%08X, size=%d.\n", + (uint32_t) fbi->fix.smem_start, fbi->fix.smem_len); + + fbi->screen_size = fbi->fix.smem_len; + + /* Clear the screen */ + memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); + + return 0; +} + +/*! + * De-allocates the DRAM memory for the frame buffer. + * + * @param fbi framebuffer information pointer + * + * @return Error code indicating success or failure + */ +static int mxcfb_unmap_video_memory(struct fb_info *fbi) +{ + dma_free_writecombine(fbi->device, fbi->fix.smem_len, + fbi->screen_base, fbi->fix.smem_start); + fbi->screen_base = 0; + fbi->fix.smem_start = 0; + fbi->fix.smem_len = 0; + return 0; +} + +/*! + * Initializes the framebuffer information pointer. After allocating + * sufficient memory for the framebuffer structure, the fields are + * filled with custom information passed in from the configurable + * structures. This includes information such as bits per pixel, + * color maps, screen width/height and RGBA offsets. + * + * @return Framebuffer structure initialized with our information + */ +static struct fb_info *mxcfb_init_fbinfo(struct device *dev, struct fb_ops *ops) +{ + struct fb_info *fbi; + struct mxcfb_info *mxcfbi; + + /* + * Allocate sufficient memory for the fb structure + */ + fbi = framebuffer_alloc(sizeof(struct mxcfb_info), dev); + if (!fbi) + return NULL; + + mxcfbi = (struct mxcfb_info *)fbi->par; + + fbi->var.activate = FB_ACTIVATE_NOW; + + fbi->fbops = ops; + fbi->flags = FBINFO_FLAG_DEFAULT; + fbi->pseudo_palette = mxcfbi->pseudo_palette; + + /* + * Allocate colormap + */ + fb_alloc_cmap(&fbi->cmap, 16, 0); + + return fbi; +} + +static ssize_t show_disp_chan(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fb_info *info = dev_get_drvdata(dev); + struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par; + + if (mxcfbi->ipu_ch == MEM_BG_SYNC) + return sprintf(buf, "2-layer-fb-bg\n"); + else if (mxcfbi->ipu_ch == MEM_FG_SYNC) + return sprintf(buf, "2-layer-fb-fg\n"); + else if (mxcfbi->ipu_ch == MEM_DC_SYNC) + return sprintf(buf, "1-layer-fb\n"); + else + return sprintf(buf, "err: no display chan\n"); +} + +static ssize_t swap_disp_chan(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct fb_info *info = dev_get_drvdata(dev); + struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par; + struct mxcfb_info *fg_mxcfbi = NULL; + + /* swap only happen between DP-BG and DC, while DP-FG disable */ + if (((mxcfbi->ipu_ch == MEM_BG_SYNC) && + (strstr(buf, "1-layer-fb") != NULL)) || + ((mxcfbi->ipu_ch == MEM_DC_SYNC) && + (strstr(buf, "2-layer-fb-bg") != NULL))) { + int i; + + for (i = 0; i < num_registered_fb; i++) { + fg_mxcfbi = + (struct mxcfb_info *)mxcfb_info[i]->par; + if (fg_mxcfbi->ipu_ch == MEM_FG_SYNC) + break; + else + fg_mxcfbi = NULL; + } + if (!fg_mxcfbi || + fg_mxcfbi->blank == FB_BLANK_UNBLANK) { + dev_err(dev, + "Can not switch while fb2(fb-fg) is on.\n"); + return count; + } + + if (swap_channels(info) < 0) + dev_err(dev, "Swap display channel failed.\n"); + } + + return count; +} +DEVICE_ATTR(fsl_disp_property, 644, show_disp_chan, swap_disp_chan); + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxcfb_probe(struct platform_device *pdev) +{ + struct fb_info *fbi; + struct mxcfb_info *mxcfbi; + struct mxc_fb_platform_data *plat_data = pdev->dev.platform_data; + struct resource *res; + int ret = 0; + + /* + * Initialize FB structures + */ + fbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops); + if (!fbi) { + ret = -ENOMEM; + goto err0; + } + mxcfbi = (struct mxcfb_info *)fbi->par; + + if (!g_dp_in_use) { + mxcfbi->ipu_ch_irq = IPU_IRQ_BG_SYNC_EOF; + mxcfbi->ipu_ch = MEM_BG_SYNC; + mxcfbi->blank = FB_BLANK_UNBLANK; + } else { + mxcfbi->ipu_ch_irq = IPU_IRQ_DC_SYNC_EOF; + mxcfbi->ipu_ch = MEM_DC_SYNC; + mxcfbi->blank = FB_BLANK_POWERDOWN; + } + + mxcfbi->ipu_di = pdev->id; + + if (pdev->id == 0) { + ipu_disp_set_global_alpha(mxcfbi->ipu_ch, true, 0x80); + ipu_disp_set_color_key(mxcfbi->ipu_ch, false, 0); + strcpy(fbi->fix.id, "DISP3 BG"); + + if (!g_dp_in_use) + if (ipu_request_irq(IPU_IRQ_BG_ALPHA_SYNC_EOF, + mxcfb_alpha_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(&pdev->dev, "Error registering BG " + "alpha irq handler.\n"); + ret = -EBUSY; + goto err1; + } + g_dp_in_use = true; + } else if (pdev->id == 1) { + strcpy(fbi->fix.id, "DISP3 BG - DI1"); + + if (!g_dp_in_use) + if (ipu_request_irq(IPU_IRQ_BG_ALPHA_SYNC_EOF, + mxcfb_alpha_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(&pdev->dev, "Error registering BG " + "alpha irq handler.\n"); + ret = -EBUSY; + goto err1; + } + g_dp_in_use = true; + } else if (pdev->id == 2) { /* Overlay */ + mxcfbi->ipu_ch_irq = IPU_IRQ_FG_SYNC_EOF; + mxcfbi->ipu_ch = MEM_FG_SYNC; + mxcfbi->ipu_di = -1; + mxcfbi->overlay = true; + mxcfbi->blank = FB_BLANK_POWERDOWN; + + strcpy(fbi->fix.id, "DISP3 FG"); + + if (ipu_request_irq(IPU_IRQ_FG_ALPHA_SYNC_EOF, + mxcfb_alpha_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(&pdev->dev, "Error registering FG alpha irq " + "handler.\n"); + ret = -EBUSY; + goto err1; + } + } + + mxcfb_info[pdev->id] = fbi; + + if (ipu_request_irq(mxcfbi->ipu_ch_irq, mxcfb_irq_handler, 0, + MXCFB_NAME, fbi) != 0) { + dev_err(&pdev->dev, "Error registering BG irq handler.\n"); + ret = -EBUSY; + goto err1; + } + ipu_disable_irq(mxcfbi->ipu_ch_irq); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res) { + fbi->fix.smem_len = res->end - res->start + 1; + fbi->fix.smem_start = res->start; + fbi->screen_base = ioremap(fbi->fix.smem_start, fbi->fix.smem_len); + } + + /* Need dummy values until real panel is configured */ + fbi->var.xres = 240; + fbi->var.yres = 320; + + if (!fb_mode && plat_data && plat_data->mode_str) + fb_find_mode(&fbi->var, fbi, plat_data->mode_str, NULL, 0, NULL, + default_bpp); + + if (fb_mode) + fb_find_mode(&fbi->var, fbi, fb_mode, NULL, 0, NULL, + default_bpp); + + if (plat_data) { + mxcfbi->ipu_di_pix_fmt = plat_data->interface_pix_fmt; + if (!fb_mode && plat_data->mode) + fb_videomode_to_var(&fbi->var, plat_data->mode); + } + + mxcfb_check_var(&fbi->var, fbi); + + /* Default Y virtual size is 2x panel size */ + fbi->var.yres_virtual = fbi->var.yres * 2; + + mxcfb_set_fix(fbi); + + /* alocate fb first */ + if (!res) + if (mxcfb_map_video_memory(fbi) < 0) + return -ENOMEM; + + ret = register_framebuffer(fbi); + if (ret < 0) + goto err2; + + platform_set_drvdata(pdev, fbi); + + ret = device_create_file(fbi->dev, &dev_attr_fsl_disp_property); + if (ret) + dev_err(&pdev->dev, "Error %d on creating file\n", ret); + + return 0; + +err2: + ipu_free_irq(mxcfbi->ipu_ch_irq, fbi); +err1: + fb_dealloc_cmap(&fbi->cmap); + framebuffer_release(fbi); +err0: + return ret; +} + +static int mxcfb_remove(struct platform_device *pdev) +{ + struct fb_info *fbi = platform_get_drvdata(pdev); + struct mxcfb_info *mxc_fbi = fbi->par; + + if (!fbi) + return 0; + + mxcfb_blank(FB_BLANK_POWERDOWN, fbi); + ipu_free_irq(mxc_fbi->ipu_ch_irq, fbi); + mxcfb_unmap_video_memory(fbi); + + if (&fbi->cmap) + fb_dealloc_cmap(&fbi->cmap); + + unregister_framebuffer(fbi); + framebuffer_release(fbi); + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcfb_driver = { + .driver = { + .name = MXCFB_NAME, + }, + .probe = mxcfb_probe, + .remove = mxcfb_remove, + .suspend = mxcfb_suspend, + .resume = mxcfb_resume, +}; + +/* + * Parse user specified options (`video=trident:') + * example: + * video=trident:800x600,bpp=16,noaccel + */ +int mxcfb_setup(char *options) +{ + char *opt; + if (!options || !*options) + return 0; + while ((opt = strsep(&options, ",")) != NULL) { + if (!*opt) + continue; + if (!strncmp(opt, "ext_clk", 7)) { + ext_clk_used = true; + continue; + } else + ext_clk_used = false; + + if (!strncmp(opt, "bpp=", 4)) + default_bpp = simple_strtoul(opt + 4, NULL, 0); + else + fb_mode = opt; + + } + return 0; +} + +/*! + * Main entry function for the framebuffer. The function registers the power + * management callback functions with the kernel and also registers the MXCFB + * callback functions with the core Linux framebuffer driver \b fbmem.c + * + * @return Error code indicating success or failure + */ +int __init mxcfb_init(void) +{ + int ret = 0; +#ifndef MODULE + char *option = NULL; +#endif + +#ifndef MODULE + if (fb_get_options("mxcfb", &option)) + return -ENODEV; + mxcfb_setup(option); +#endif + + ret = platform_driver_register(&mxcfb_driver); + return ret; +} + +void mxcfb_exit(void) +{ + platform_driver_unregister(&mxcfb_driver); +} + +module_init(mxcfb_init); +module_exit(mxcfb_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC framebuffer driver"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("fb"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/mxc/mx2fb.c +++ linux-fsl-imx51-2.6.31/drivers/video/mxc/mx2fb.c @@ -0,0 +1,1347 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer_MX27 Framebuffer Driver for MX27. + */ + +/*! + * @file mx2fb.c + * + * @brief Frame buffer driver for MX27 ADS. + * + * @ingroup Framebuffer_MX27 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mx2fb.h" + +#define MX2FB_TYPE_BG 0 +#define MX2FB_TYPE_GW 1 + +extern void gpio_lcdc_active(void); +extern void gpio_lcdc_inactive(void); +extern void board_power_lcd(int on); + +static char *fb_mode = 0; +static int fb_enabled = 0; +static unsigned long default_bpp = 16; +static ATOMIC_NOTIFIER_HEAD(mx2fb_notifier_list); +static struct clk *lcdc_clk; +/*! + * @brief Structure containing the MX2 specific framebuffer information. + */ +struct mx2fb_info { + int type; + char *id; + int registered; + int blank; + unsigned long pseudo_palette[16]; +}; + +/* Framebuffer APIs */ +static int mx2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); +static int mx2fb_set_par(struct fb_info *info); +static int mx2fb_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *info); +static int mx2fb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info); +static int mx2fb_blank(int blank_mode, struct fb_info *info); +static int mx2fb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg); + +/* Driver entries */ +int __init mx2fb_init(void); +void __exit mx2fb_exit(void); +#ifndef MODULE +static int __init mx2fb_setup(char *); +#endif + +/* Internal functions */ +static int __init _init_fbinfo(struct fb_info *info, + struct platform_device *pdev); +static int __init _install_fb(struct fb_info *info, + struct platform_device *pdev); +static void __exit _uninstall_fb(struct fb_info *info); +static int _map_video_memory(struct fb_info *info); +static void _unmap_video_memory(struct fb_info *info); +static void _set_fix(struct fb_info *info); +static void _enable_lcdc(struct fb_info *info); +static void _disable_lcdc(struct fb_info *info); +static void _enable_graphic_window(struct fb_info *info); +static void _disable_graphic_window(struct fb_info *info); +static void _update_lcdc(struct fb_info *info); +static void _request_irq(void); +static void _free_irq(void); + +#ifdef CONFIG_PM +static int mx2fb_suspend(struct platform_device *pdev, pm_message_t state); +static int mx2fb_resume(struct platform_device *pdev); +#else +#define mx2fb_suspend 0 +#define mx2fb_resume 0 +#endif + +static int mx2fb_probe(struct platform_device *pdev); + +#ifdef CONFIG_FB_MXC_TVOUT +#include +/* + * FIXME: VGA mode is not defined by video_encoder.h + * while FS453 supports VGA output. + */ +#ifndef VIDEO_ENCODER_VGA +#define VIDEO_ENCODER_VGA 32 +#endif + +#define MODE_PAL "TV-PAL" +#define MODE_NTSC "TV-NTSC" +#define MODE_VGA "TV-VGA" + +extern int fs453_ioctl(unsigned int cmd, void *arg); +#endif + +struct mx2fb_info mx2fbi_bg = { + .type = MX2FB_TYPE_BG, + .id = "DISP0 BG", + .registered = 0, +}; + +static struct mx2fb_info mx2fbi_gw = { + .type = MX2FB_TYPE_GW, + .id = "DISP0 FG", + .registered = 0, +}; + +/*! Current graphic window information */ +static struct fb_gwinfo g_gwinfo = { + .enabled = 0, + .alpha_value = 255, + .ck_enabled = 0, + .ck_red = 0, + .ck_green = 0, + .ck_blue = 0, + .xpos = 0, + .ypos = 0, +}; + +/*! + * @brief Framebuffer information structures. + * There are up to 3 framebuffers: background, TVout, and graphic window. + * If graphic window is configured, it must be the last framebuffer. + */ +static struct fb_info mx2fb_info[] = { + {.par = &mx2fbi_bg}, + {.par = &mx2fbi_gw}, +}; + +/*! + * @brief This structure contains pointers to the power management + * callback functions. + */ +static struct platform_driver mx2fb_driver = { + .driver = { + .name = "mxc_sdc_fb", + .owner = THIS_MODULE, + .bus = &platform_bus_type, + }, + .probe = mx2fb_probe, + .suspend = mx2fb_suspend, + .resume = mx2fb_resume, +}; + +/*! + * @brief Framebuffer file operations + */ +static struct fb_ops mx2fb_ops = { + .owner = THIS_MODULE, + .fb_check_var = mx2fb_check_var, + .fb_set_par = mx2fb_set_par, + .fb_setcolreg = mx2fb_setcolreg, + .fb_blank = mx2fb_blank, + .fb_pan_display = mx2fb_pan_display, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + //.fb_cursor = soft_cursor, + .fb_ioctl = mx2fb_ioctl, +}; + +/*! + * @brief Validates a var passed in. + * + * @param var Frame buffer variable screen structure + * @param info Frame buffer structure that represents a single frame buffer + * + * @return Negative errno on error, or zero on success. + * + * Checks to see if the hardware supports the state requested by var passed + * in. This function does not alter the hardware state! If the var passed in + * is slightly off by what the hardware can support then we alter the var + * PASSED in to what we can do. If the hardware doesn't support mode change + * a -EINVAL will be returned by the upper layers. + * + */ +static int mx2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + unsigned long htotal, vtotal; + + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; + + if (var->xoffset < 0) + var->xoffset = 0; + + if (var->yoffset < 0) + var->yoffset = 0; + + if (var->xoffset + info->var.xres > info->var.xres_virtual) + var->xoffset = info->var.xres_virtual - info->var.xres; + + if (var->yoffset + info->var.yres > info->var.yres_virtual) + var->yoffset = info->var.yres_virtual - info->var.yres; + + if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && + (var->bits_per_pixel != 16)) { + var->bits_per_pixel = default_bpp; + } + + switch (var->bits_per_pixel) { + case 16: + var->red.length = 5; + var->red.offset = 11; + var->red.msb_right = 0; + + var->green.length = 6; + var->green.offset = 5; + var->green.msb_right = 0; + + var->blue.length = 5; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 24: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 0; + var->transp.offset = 0; + var->transp.msb_right = 0; + break; + case 32: + var->red.length = 8; + var->red.offset = 16; + var->red.msb_right = 0; + + var->green.length = 8; + var->green.offset = 8; + var->green.msb_right = 0; + + var->blue.length = 8; + var->blue.offset = 0; + var->blue.msb_right = 0; + + var->transp.length = 8; + var->transp.offset = 24; + var->transp.msb_right = 0; + break; + } + + if (var->pixclock < 1000) { + htotal = var->xres + var->right_margin + var->hsync_len + + var->left_margin; + vtotal = var->yres + var->lower_margin + var->vsync_len + + var->upper_margin; + var->pixclock = (vtotal * htotal * 6UL) / 100UL; + var->pixclock = KHZ2PICOS(var->pixclock); + dev_dbg(info->device, + "pixclock set for 60Hz refresh = %u ps\n", + var->pixclock); + } + + var->height = -1; + var->width = -1; + var->grayscale = 0; + + /* Copy nonstd field to/from sync for fbset usage */ + var->sync |= var->nonstd; + var->nonstd |= var->sync; + + return 0; +} + +/*! + * @brief Alters the hardware state. + * + * @param info Frame buffer structure that represents a single frame buffer + * + * @return Zero on success others on failure + * + * Using the fb_var_screeninfo in fb_info we set the resolution of this + * particular framebuffer. This function alters the fb_fix_screeninfo stored + * in fb_info. It doesn't not alter var in fb_info since we are using that + * data. This means we depend on the data in var inside fb_info to be + * supported by the hardware. mx2fb_check_var is always called before + * mx2fb_set_par to ensure this. + */ +static int mx2fb_set_par(struct fb_info *info) +{ + unsigned long len; + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + _set_fix(info); + + len = info->var.yres_virtual * info->fix.line_length; + if (len > info->fix.smem_len) { + if (info->fix.smem_start) + _unmap_video_memory(info); + + /* Memory allocation for framebuffer */ + if (_map_video_memory(info)) { + dev_err(info->device, "Unable to allocate fb memory\n"); + return -ENOMEM; + } + } + + _update_lcdc(info); + if (info->fbops->fb_blank) + info->fbops->fb_blank(mx2fbi->blank, info); + + return 0; +} + +/*! + * @brief Sets a color register. + * + * @param regno Which register in the CLUT we are programming + * @param red The red value which can be up to 16 bits wide + * @param green The green value which can be up to 16 bits wide + * @param blue The blue value which can be up to 16 bits wide. + * @param transp If supported the alpha value which can be up to + * 16 bits wide. + * @param info Frame buffer info structure + * + * @return Negative errno on error, or zero on success. + * + * Set a single color register. The values supplied have a 16 bit magnitude + * which needs to be scaled in this function for the hardware. Things to take + * into consideration are how many color registers, if any, are supported with + * the current color visual. With truecolor mode no color palettes are + * supported. Here a psuedo palette is created which we store the value in + * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited + * color palette. + */ +static int mx2fb_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, struct fb_info *info) +{ + int ret = 1; + + /* + * If greyscale is true, then we convert the RGB value + * to greyscale no matter what visual we are using. + */ + if (info->var.grayscale) + red = green = blue = (19595 * red + 38470 * green + + 7471 * blue) >> 16; + switch (info->fix.visual) { + case FB_VISUAL_TRUECOLOR: + /* + * 16-bit True Colour. We encode the RGB value + * according to the RGB bitfield information. + */ + if (regno < 16) { + u32 *pal = info->pseudo_palette; + u32 v; + +#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) + red = CNVT_TOHW(red, info->var.red.length); + green = CNVT_TOHW(green, info->var.green.length); + blue = CNVT_TOHW(blue, info->var.blue.length); + transp = CNVT_TOHW(transp, info->var.transp.length); +#undef CNVT_TOHW + + v = (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset) | + (transp << info->var.transp.offset); + + pal[regno] = v; + ret = 0; + } + break; + case FB_VISUAL_STATIC_PSEUDOCOLOR: + case FB_VISUAL_PSEUDOCOLOR: + break; + } + + return ret; +} + +/*! + * @brief Pans the display. + * + * @param var Frame buffer variable screen structure + * @param info Frame buffer structure that represents a single frame buffer + * + * @return Negative errno on error, or zero on success. + * + * Pan (or wrap, depending on the `vmode' field) the display using the + * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values + * don't fit, return -EINVAL. + */ +static int mx2fb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + if ((info->var.xoffset == var->xoffset) && + (info->var.yoffset == var->yoffset)) { + return 0; /* No change, do nothing */ + } + + if (var->xoffset < 0 || var->yoffset < 0 + || var->xoffset + info->var.xres > info->var.xres_virtual + || var->yoffset + info->var.yres > info->var.yres_virtual) + return -EINVAL; + + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; + + _update_lcdc(info); + + if (var->vmode & FB_VMODE_YWRAP) { + info->var.vmode |= FB_VMODE_YWRAP; + } else { + info->var.vmode &= ~FB_VMODE_YWRAP; + } + + return 0; +} + +/*! + * @brief Blanks the display. + * + * @param blank_mode The blank mode we want. + * @param info Frame buffer structure that represents a single frame buffer + * + * @return Negative errno on error, or zero on success. + * + * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking + * succeeded, != 0 if un-/blanking failed. + * blank_mode == 2: suspend vsync + * blank_mode == 3: suspend hsync + * blank_mode == 4: powerdown + */ +static int mx2fb_blank(int blank_mode, struct fb_info *info) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + dev_dbg(info->device, "blank mode = %d\n", blank_mode); + + mx2fbi->blank = blank_mode; + + switch (blank_mode) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + _disable_lcdc(info); + break; + case FB_BLANK_UNBLANK: + _enable_lcdc(info); + break; + } + + return 0; +} + +/*! + * @brief Ioctl function to support customized ioctl operations. + * + * @param info Framebuffer structure that represents a single frame buffer + * @param cmd The command number + * @param arg Argument which depends on cmd + * + * @return Negative errno on error, or zero on success. + */ +static int mx2fb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + struct mx2fb_gbl_alpha ga; + struct mx2fb_color_key ck; + + switch (cmd) { + case MX2FB_SET_GBL_ALPHA: + if (mx2fbi->type != MX2FB_TYPE_GW) + return -ENODEV; + + if (!arg) + return -EINVAL; + + /* set graphic window information */ + if (copy_from_user((void *)&ga, (void *)arg, sizeof(ga))) + return -EFAULT; + + g_gwinfo.alpha_value = ga.alpha; + + if (g_gwinfo.enabled) + _enable_graphic_window(info); + else + _disable_graphic_window(info); + break; + case MX2FB_SET_CLR_KEY: + if (mx2fbi->type != MX2FB_TYPE_GW) + return -ENODEV; + + if (!arg) + return -EINVAL; + + /* set graphic window information */ + if (copy_from_user((void *)&ck, (void *)arg, sizeof(ck))) + return -EFAULT; + + g_gwinfo.ck_enabled = ck.enable; + g_gwinfo.ck_red = (ck.color_key & 0x003F0000) >> 16; + g_gwinfo.ck_green = (ck.color_key & 0x00003F00) >> 8; + g_gwinfo.ck_blue = ck.color_key & 0x0000003F; + + if (g_gwinfo.enabled) + _enable_graphic_window(info); + else + _disable_graphic_window(info); + break; + case FBIOGET_GWINFO: + if (mx2fbi->type != MX2FB_TYPE_GW) + return -ENODEV; + + if (!arg) + return -EINVAL; + + /* get graphic window information */ + if (copy_to_user((void *)arg, (void *)&g_gwinfo, + sizeof(g_gwinfo))) + return -EFAULT; + break; + case FBIOPUT_GWINFO: + if (mx2fbi->type != MX2FB_TYPE_GW) + return -ENODEV; + + if (!arg) + return -EINVAL; + + /* set graphic window information */ + if (copy_from_user((void *)&g_gwinfo, (void *)arg, + sizeof(g_gwinfo))) + return -EFAULT; + + if (g_gwinfo.enabled) + _enable_graphic_window(info); + else + _disable_graphic_window(info); + break; +#ifdef CONFIG_FB_MXC_TVOUT + case ENCODER_GET_CAPABILITIES:{ + int ret; + struct video_encoder_capability cap; + + if (mx2fbi->type != MX2FB_TYPE_BG) + return -ENODEV; + + ret = fs453_ioctl(cmd, &cap); + if (ret) + return ret; + + if (copy_to_user((void *)arg, &cap, sizeof(cap))) + return -EFAULT; + break; + } + case ENCODER_SET_NORM:{ + int ret; + unsigned long mode; + char *smode; + struct fb_var_screeninfo var; + + if (mx2fbi->type != MX2FB_TYPE_BG) + return -ENODEV; + + if (copy_from_user(&mode, (void *)arg, sizeof(mode))) + return -EFAULT; + if ((ret = fs453_ioctl(cmd, &mode))) + return ret; + + if (mode == VIDEO_ENCODER_PAL) + smode = MODE_PAL; + else if (mode == VIDEO_ENCODER_NTSC) + smode = MODE_NTSC; + else + smode = MODE_VGA; + + var = info->var; + var.nonstd = 0; + ret = fb_find_mode(&var, info, smode, mxcfb_modedb, + mxcfb_modedb_sz, NULL, default_bpp); + if ((ret != 1) && (ret != 2)) /* specified mode not found */ + return -ENODEV; + + info->var = var; + fb_mode = smode; + return mx2fb_set_par(info); + } + case ENCODER_SET_INPUT: + case ENCODER_SET_OUTPUT: + case ENCODER_ENABLE_OUTPUT:{ + unsigned long varg; + + if (mx2fbi->type != MX2FB_TYPE_BG) + return -ENODEV; + + if (copy_from_user(&varg, (void *)arg, sizeof(varg))) + return -EFAULT; + return fs453_ioctl(cmd, &varg); + } +#endif + default: + dev_dbg(info->device, "Unknown ioctl command (0x%08X)\n", cmd); + return -EINVAL; + } + + return 0; +} + +/*! + * @brief Set fixed framebuffer parameters based on variable settings. + * + * @param info framebuffer information pointer + * @return Negative errno on error, or zero on success. + */ +static void _set_fix(struct fb_info *info) +{ + struct fb_fix_screeninfo *fix = &info->fix; + struct fb_var_screeninfo *var = &info->var; + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + strncpy(fix->id, mx2fbi->id, strlen(mx2fbi->id)); + fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; + fix->type = FB_TYPE_PACKED_PIXELS; + fix->accel = FB_ACCEL_NONE; + fix->visual = FB_VISUAL_TRUECOLOR; + fix->xpanstep = 1; + fix->ypanstep = 1; +} + +/*! + * @brief Initialize framebuffer information structure. + * + * @param info framebuffer information pointer + * @param pdev pointer to struct device + * @return Negative errno on error, or zero on success. + */ +static int __init _init_fbinfo(struct fb_info *info, + struct platform_device *pdev) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + info->device = &pdev->dev; + info->var.activate = FB_ACTIVATE_NOW; + info->fbops = &mx2fb_ops; + info->flags = FBINFO_FLAG_DEFAULT; + info->pseudo_palette = &mx2fbi->pseudo_palette; + + /* Allocate colormap */ + fb_alloc_cmap(&info->cmap, 16, 0); + + return 0; +} + +/*! + * @brief Install framebuffer into the system. + * + * @param info framebuffer information pointer + * @param pdev pointer to struct device + * @return Negative errno on error, or zero on success. + */ +static int __init _install_fb(struct fb_info *info, + struct platform_device *pdev) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + if (_init_fbinfo(info, pdev)) + return -EINVAL; + + if (fb_mode == 0) + fb_mode = pdev->dev.platform_data; + + if (!fb_find_mode(&info->var, info, fb_mode, mxcfb_modedb, + mxcfb_modedb_sz, NULL, default_bpp)) { + fb_dealloc_cmap(&info->cmap); + return -EBUSY; + } + + /* Default Y virtual size is 2x panel size */ + /* info->var.yres_virtual = info->var.yres << 1; */ + + if (mx2fbi->type == MX2FB_TYPE_GW) + mx2fbi->blank = FB_BLANK_NORMAL; + else + mx2fbi->blank = FB_BLANK_UNBLANK; + + if (mx2fb_set_par(info)) { + fb_dealloc_cmap(&info->cmap); + return -EINVAL; + } + + if (register_framebuffer(info) < 0) { + _unmap_video_memory(info); + fb_dealloc_cmap(&info->cmap); + return -EINVAL; + } + + mx2fbi->registered = 1; + dev_info(info->device, "fb%d: %s fb device registered successfully.\n", + info->node, info->fix.id); + + return 0; +} + +/*! + * @brief Uninstall framebuffer from the system. + * + * @param info framebuffer information pointer + */ +static void __exit _uninstall_fb(struct fb_info *info) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + if (!mx2fbi->registered) + return; + + unregister_framebuffer(info); + _unmap_video_memory(info); + if (&info->cmap) + fb_dealloc_cmap(&info->cmap); + + mx2fbi->registered = 0; +} + +/*! + * @brief Allocate memory for framebuffer. + * + * @param info framebuffer information pointer + * @return Negative errno on error, or zero on success. + */ +static int _map_video_memory(struct fb_info *info) +{ + info->fix.smem_len = info->fix.line_length * info->var.yres_virtual; + info->screen_base = dma_alloc_coherent(0, + info->fix.smem_len, + (dma_addr_t *) & info->fix. + smem_start, + GFP_DMA | GFP_KERNEL); + + if (info->screen_base == 0) { + dev_err(info->device, "Unable to allocate fb memory\n"); + return -EBUSY; + } + dev_dbg(info->device, "Allocated fb @ paddr=0x%08lX, size=%d.\n", + info->fix.smem_start, info->fix.smem_len); + + info->screen_size = info->fix.smem_len; + + /* Clear the screen */ + memset((char *)info->screen_base, 0, info->fix.smem_len); + + return 0; +} + +/*! + * @brief Release memory for framebuffer. + * @param info framebuffer information pointer + */ +static void _unmap_video_memory(struct fb_info *info) +{ + dma_free_coherent(0, info->fix.smem_len, info->screen_base, + (dma_addr_t) info->fix.smem_start); + + info->screen_base = 0; + info->fix.smem_start = 0; + info->fix.smem_len = 0; +} + +/*! + * @brief Enable LCD controller. + * @param info framebuffer information pointer + */ +static void _enable_lcdc(struct fb_info *info) +{ + static int first_enable = 1; + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + /* + * Graphic window can only be enabled while the HCLK to the LCDC + * is disabled. Once enabled it can subsequently be disabled and + * enabled without turning off the HCLK. + * The graphic window is enabled and then disabled here. So next + * time to enable graphic window the HCLK to LCDC does not need + * to be disabled, and the flicker (due to disabling of HCLK to + * LCDC) is avoided. + */ + if (first_enable) { + _enable_graphic_window(info); + _disable_graphic_window(info); + first_enable = 0; + } + + if (mx2fbi->type == MX2FB_TYPE_GW) + _enable_graphic_window(info); + else if (!fb_enabled) { + clk_enable(lcdc_clk); + gpio_lcdc_active(); + board_power_lcd(1); + fb_enabled++; +#ifdef CONFIG_FB_MXC_TVOUT + if (fb_mode) { + unsigned long mode = 0; + + if (strcmp(fb_mode, MODE_VGA) == 0) + mode = VIDEO_ENCODER_VGA; + else if (strcmp(fb_mode, MODE_NTSC) == 0) + mode = VIDEO_ENCODER_NTSC; + else if (strcmp(fb_mode, MODE_PAL) == 0) + mode = VIDEO_ENCODER_PAL; + if (mode) + fs453_ioctl(ENCODER_SET_NORM, &mode); + } +#endif + } +} + +/*! + * @brief Disable LCD controller. + * @param info framebuffer information pointer + */ +static void _disable_lcdc(struct fb_info *info) +{ + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + if (mx2fbi->type == MX2FB_TYPE_GW) + _disable_graphic_window(info); + else { + if (fb_enabled) { + gpio_lcdc_inactive(); + board_power_lcd(0); + clk_disable(lcdc_clk); + fb_enabled = 0; + } +#ifdef CONFIG_FB_MXC_TVOUT + if (fb_mode) { + int enable = 0; + + if ((strcmp(fb_mode, MODE_VGA) == 0) + || (strcmp(fb_mode, MODE_NTSC) == 0) + || (strcmp(fb_mode, MODE_PAL) == 0)) + fs453_ioctl(ENCODER_ENABLE_OUTPUT, &enable); + } +#endif + } +} + +/*! + * @brief Enable graphic window. + * @param info framebuffer information pointer + */ +static void _enable_graphic_window(struct fb_info *info) +{ + struct fb_var_screeninfo *var = &info->var; + + g_gwinfo.enabled = 1; + + g_gwinfo.base = (var->yoffset * var->xres_virtual + var->xoffset); + g_gwinfo.base *= (var->bits_per_pixel) / 8; + g_gwinfo.base += info->fix.smem_start; + + g_gwinfo.xres = var->xres; + g_gwinfo.yres = var->yres; + g_gwinfo.xres_virtual = var->xres_virtual; + + mx2_gw_set(&g_gwinfo); +} + +/*! + * @brief Disable graphic window. + * @param info framebuffer information pointer + */ +static void _disable_graphic_window(struct fb_info *info) +{ + unsigned long i = 0; + + g_gwinfo.enabled = 0; + + /* + * Set alpha value to zero and reduce gw size, otherwise the graphic + * window will not be able to be enabled again. + */ + __raw_writel(__raw_readl(LCDC_REG(LCDC_LGWCR)) & 0x00FFFFFF, + LCDC_REG(LCDC_LGWCR)); + __raw_writel(((16 >> 4) << 20) + 16, LCDC_REG(LCDC_LGWSR)); + while (i < 1000) + i++; + + /* Now disable graphic window */ + __raw_writel(__raw_readl(LCDC_REG(LCDC_LGWCR)) & ~0x00400000, + LCDC_REG(LCDC_LGWCR)); + + dev_dbg(info->device, "Graphic window disabled.\n"); +} + +/*! + * @brief Setup graphic window properties. + * @param gwinfo graphic window information pointer + */ +void mx2_gw_set(struct fb_gwinfo *gwinfo) +{ + int width, height, xpos, ypos; + int width_bg, height_bg; + unsigned long lgwcr = 0x00400000; /* Graphic window control register */ + + if (!gwinfo->enabled) { + _disable_graphic_window(0); + return; + } + + /* Graphic window start address register */ + __raw_writel(gwinfo->base, LCDC_REG(LCDC_LGWSAR)); + + /* + * The graphic window width, height, x position and y position + * must be synced up width the background window, otherwise there + * may be flickering. + */ + width_bg = (__raw_readl(LCDC_REG(LCDC_LSR)) & 0x03F00000) >> 16; + height_bg = __raw_readl(LCDC_REG(LCDC_LSR)) & 0x000003FF; + + width = (gwinfo->xres > width_bg) ? width_bg : gwinfo->xres; + height = (gwinfo->yres > height_bg) ? height_bg : gwinfo->yres; + + xpos = gwinfo->xpos; + ypos = gwinfo->ypos; + + if (xpos + width > width_bg) + xpos = width_bg - width; + if (ypos + height > height_bg) + ypos = height_bg - height; + + /* Graphic window size register */ + __raw_writel(((width >> 4) << 20) + height, LCDC_REG(LCDC_LGWSR)); + + /* Graphic window virtual page width register */ + __raw_writel(gwinfo->xres_virtual >> 1, LCDC_REG(LCDC_LGWVPWR)); + + /* Graphic window position register */ + __raw_writel(((xpos & 0x000003FF) << 16) | (ypos & 0x000003FF), + LCDC_REG(LCDC_LGWPR)); + + /* Graphic window panning offset register */ + __raw_writel(0, LCDC_REG(LCDC_LGWPOR)); + + /* Graphic window DMA control register */ + if (cpu_is_mx27_rev(CHIP_REV_2_0) > 0) + __raw_writel(0x00040060, LCDC_REG(LCDC_LGWDCR)); + else + __raw_writel(0x00020010, LCDC_REG(LCDC_LGWDCR)); + + /* Graphic window control register */ + lgwcr |= (gwinfo->alpha_value & 0x000000FF) << 24; + lgwcr |= gwinfo->ck_enabled ? 0x00800000 : 0; + lgwcr |= gwinfo->vs_reversed ? 0x00200000 : 0; + + /* + * Color keying value + * Todo: assume always use RGB565 + */ + lgwcr |= (gwinfo->ck_red & 0x0000003F) << 12; + lgwcr |= (gwinfo->ck_green & 0x0000003F) << 6; + lgwcr |= gwinfo->ck_blue & 0x0000003F; + + __raw_writel(lgwcr, LCDC_REG(LCDC_LGWCR)); + + pr_debug("Graphic window enabled.\n"); +} + +/*! + * @brief Update LCDC registers + * @param info framebuffer information pointer + */ +static void _update_lcdc(struct fb_info *info) +{ + unsigned long base; + unsigned long perclk, pcd, pcr; + struct fb_var_screeninfo *var = &info->var; + struct mx2fb_info *mx2fbi = (struct mx2fb_info *)info->par; + + if (mx2fbi->type == MX2FB_TYPE_GW) { + _enable_graphic_window(info); + return; + } + + base = (var->yoffset * var->xres_virtual + var->xoffset); + base *= (var->bits_per_pixel) / 8; + base += info->fix.smem_start; + + /* Screen start address register */ + __raw_writel(base, LCDC_REG(LCDC_LSSAR)); + + /* Size register */ + dev_dbg(info->device, "xres = %d, yres = %d\n", + info->var.xres, info->var.yres); + __raw_writel(((info->var.xres >> 4) << 20) + info->var.yres, + LCDC_REG(LCDC_LSR)); + + /* Virtual page width register */ + __raw_writel(info->var.xres_virtual >> 1, LCDC_REG(LCDC_LVPWR)); + + /* To setup LCDC pixel clock */ + perclk = clk_round_rate(lcdc_clk, 134000000); + if (clk_set_rate(lcdc_clk, perclk)) { + printk(KERN_INFO "mx2fb: Unable to set clock to %lu\n", perclk); + perclk = clk_get_rate(lcdc_clk); + } + + /* Calculate pixel clock divider, and round to the nearest integer */ + pcd = (perclk * 8 / (PICOS2KHZ(var->pixclock) * 1000UL) + 4) / 8; + if (--pcd > 0x3F) + pcd = 0x3F; + + /* Panel configuration register */ + pcr = 0xFA008B80 | pcd; + pcr |= (var->sync & FB_SYNC_CLK_LAT_FALL) ? 0x00200000 : 0; + pcr |= (var->sync & FB_SYNC_DATA_INVERT) ? 0x01000000 : 0; + pcr |= (var->sync & FB_SYNC_SHARP_MODE) ? 0x00000040 : 0; + pcr |= (var->sync & FB_SYNC_OE_LOW_ACT) ? 0x00100000 : 0; + __raw_writel(pcr, LCDC_REG(LCDC_LPCR)); + + /* Horizontal and vertical configuration register */ + __raw_writel(((var->hsync_len - 1) << 26) + + ((var->right_margin - 1) << 8) + + (var->left_margin - 3), LCDC_REG(LCDC_LHCR)); + __raw_writel((var->vsync_len << 26) + + (var->lower_margin << 8) + + var->upper_margin, LCDC_REG(LCDC_LVCR)); + + /* Sharp configuration register */ + __raw_writel(0x00120300, LCDC_REG(LCDC_LSCR)); + + /* Refresh mode control reigster */ + __raw_writel(0x00000000, LCDC_REG(LCDC_LRMCR)); + + /* DMA control register */ + if (cpu_is_mx27_rev(CHIP_REV_2_0) > 0) + __raw_writel(0x00040060, LCDC_REG(LCDC_LDCR)); + else + __raw_writel(0x00020010, LCDC_REG(LCDC_LDCR)); +} + +/*! + * @brief Set LCD brightness + * @param level brightness level + */ +void mx2fb_set_brightness(uint8_t level) +{ + /* Set LCDC PWM contract control register */ + __raw_writel(0x00A90300 | level, LCDC_REG(LCDC_LPCCR)); +} + +EXPORT_SYMBOL(mx2fb_set_brightness); + +/* + * @brief LCDC interrupt handler + */ +static irqreturn_t mx2fb_isr(int irq, void *dev_id) +{ + struct fb_event event; + unsigned long status = __raw_readl(LCDC_REG(LCDC_LISR)); + + if (status & MX2FB_INT_EOF) { + event.info = &mx2fb_info[0]; + atomic_notifier_call_chain(&mx2fb_notifier_list, + FB_EVENT_MXC_EOF, &event); + } + + if (status & MX2FB_INT_GW_EOF) { + event.info = &mx2fb_info[1]; + atomic_notifier_call_chain(&mx2fb_notifier_list, + FB_EVENT_MXC_EOF, &event); + } + + return IRQ_HANDLED; +} + +/*! + * @brief Config and request LCDC interrupt + */ +static void _request_irq(void) +{ + unsigned long status; + unsigned long flags; + + /* Read to clear the status */ + status = __raw_readl(LCDC_REG(LCDC_LISR)); + + if (request_irq(MXC_INT_LCDC, mx2fb_isr, 0, "LCDC", 0)) + pr_info("Request LCDC IRQ failed.\n"); + else { + spin_lock_irqsave(&mx2fb_notifier_list.lock, flags); + + /* Enable interrupt in case client has registered */ + if (mx2fb_notifier_list.head != NULL) { + unsigned long status; + unsigned long ints = MX2FB_INT_EOF; + + ints |= MX2FB_INT_GW_EOF; + + /* Read to clear the status */ + status = __raw_readl(LCDC_REG(LCDC_LISR)); + + /* Configure interrupt condition for EOF */ + __raw_writel(0x0, LCDC_REG(LCDC_LICR)); + + /* Enable EOF and graphic window EOF interrupt */ + __raw_writel(ints, LCDC_REG(LCDC_LIER)); + } + + spin_unlock_irqrestore(&mx2fb_notifier_list.lock, flags); + } +} + +/*! + * @brief Free LCDC interrupt handler + */ +static void _free_irq(void) +{ + /* Disable all LCDC interrupt */ + __raw_writel(0x0, LCDC_REG(LCDC_LIER)); + + free_irq(MXC_INT_LCDC, 0); +} + +/*! + * @brief Register a client notifier + * @param nb notifier block to callback on events + */ +int mx2fb_register_client(struct notifier_block *nb) +{ + unsigned long flags; + int ret; + + ret = atomic_notifier_chain_register(&mx2fb_notifier_list, nb); + + spin_lock_irqsave(&mx2fb_notifier_list.lock, flags); + + /* Enable interrupt in case client has registered */ + if (mx2fb_notifier_list.head != NULL) { + unsigned long status; + unsigned long ints = MX2FB_INT_EOF; + + ints |= MX2FB_INT_GW_EOF; + + /* Read to clear the status */ + status = __raw_readl(LCDC_REG(LCDC_LISR)); + + /* Configure interrupt condition for EOF */ + __raw_writel(0x0, LCDC_REG(LCDC_LICR)); + + /* Enable EOF and graphic window EOF interrupt */ + __raw_writel(ints, LCDC_REG(LCDC_LIER)); + } + + spin_unlock_irqrestore(&mx2fb_notifier_list.lock, flags); + + return ret; +} + +/*! + * @brief Unregister a client notifier + * @param nb notifier block to callback on events + */ +int mx2fb_unregister_client(struct notifier_block *nb) +{ + unsigned long flags; + int ret; + + ret = atomic_notifier_chain_unregister(&mx2fb_notifier_list, nb); + + spin_lock_irqsave(&mx2fb_notifier_list.lock, flags); + + /* Mask interrupt in case no client registered */ + if (mx2fb_notifier_list.head == NULL) + __raw_writel(0x0, LCDC_REG(LCDC_LIER)); + + spin_unlock_irqrestore(&mx2fb_notifier_list.lock, flags); + + return ret; +} + +#ifdef CONFIG_PM +/* + * Power management hooks. Note that we won't be called from IRQ context, + * unlike the blank functions above, so we may sleep. + */ + +/*! + * @brief Suspends the framebuffer and blanks the screen. + * Power management support + */ +static int mx2fb_suspend(struct platform_device *pdev, pm_message_t state) +{ + _disable_lcdc(&mx2fb_info[0]); + + return 0; +} + +/*! + * @brief Resumes the framebuffer and unblanks the screen. + * Power management support + */ +static int mx2fb_resume(struct platform_device *pdev) +{ + _enable_lcdc(&mx2fb_info[0]); + + return 0; +} + +#endif /* CONFIG_PM */ + +/*! + * @brief Probe routine for the framebuffer driver. It is called during the + * driver binding process. + * + * @return Appropriate error code to the kernel common code + */ +static int mx2fb_probe(struct platform_device *pdev) +{ + int ret, i; + + lcdc_clk = clk_get(&pdev->dev, "lcdc_clk"); + + for (i = 0; i < sizeof(mx2fb_info) / sizeof(struct fb_info); i++) { + if ((ret = _install_fb(&mx2fb_info[i], pdev))) { + dev_err(&pdev->dev, + "Failed to register framebuffer %d\n", i); + return ret; + } + } + _request_irq(); + + return 0; +} + +/*! + * @brief Initialization + */ +int __init mx2fb_init(void) +{ + /* + * For kernel boot options (in 'video=xxxfb:' format) + */ +#ifndef MODULE + { + char *option; + + if (fb_get_options("mxcfb", &option)) + return -ENODEV; + mx2fb_setup(option); + } +#endif + return platform_driver_register(&mx2fb_driver); +} + +/*! + * @brief Cleanup + */ +void __exit mx2fb_exit(void) +{ + int i; + + _free_irq(); + for (i = sizeof(mx2fb_info) / sizeof(struct fb_info); i > 0; i--) + _uninstall_fb(&mx2fb_info[i - 1]); + + platform_driver_unregister(&mx2fb_driver); +} + +#ifndef MODULE +/*! + * @brief Setup + * Parse user specified options + * Example: video=mxcfb:240x320,bpp=16,Sharp-QVGA + */ +static int __init mx2fb_setup(char *options) +{ + char *opt; + + if (!options || !*options) + return 0; + + while ((opt = strsep(&options, ",")) != NULL) { + if (!*opt) + continue; + + if (!strncmp(opt, "bpp=", 4)) + default_bpp = simple_strtoul(opt + 4, NULL, 0); + else + fb_mode = opt; + } + + return 0; +} +#endif + +/* Modularization */ +module_init(mx2fb_init); +module_exit(mx2fb_exit); + +EXPORT_SYMBOL(mx2_gw_set); +EXPORT_SYMBOL(mx2fb_register_client); +EXPORT_SYMBOL(mx2fb_unregister_client); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MX2 framebuffer driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/via/ioctl.c +++ linux-fsl-imx51-2.6.31/drivers/video/via/ioctl.c @@ -25,6 +25,8 @@ { struct viafb_ioctl_info viainfo; + memset(&viainfo, 0, sizeof(struct viafb_ioctl_info)); + viainfo.viafb_id = VIAID; viainfo.vendor_id = PCI_VIA_VENDOR_ID; --- linux-fsl-imx51-2.6.31.orig/drivers/video/console/fbcon.c +++ linux-fsl-imx51-2.6.31/drivers/video/console/fbcon.c @@ -114,6 +114,7 @@ static int fbcon_is_default = 1; static int fbcon_has_exited; static int primary_device = -1; +static int fbcon_has_console_bind; #ifdef CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY static int map_override; @@ -544,6 +545,8 @@ con2fb_map[i] = -1; } info_idx = -1; + } else { + fbcon_has_console_bind = 1; } return err; @@ -2923,6 +2926,10 @@ ret = unbind_con_driver(&fb_con, first_fb_vc, last_fb_vc, fbcon_is_default); + + if (!ret) + fbcon_has_console_bind = 0; + return ret; } #else @@ -2936,6 +2943,9 @@ { int i, new_idx = -1, ret = 0; + if (!fbcon_has_console_bind) + return 0; + for (i = first_fb_vc; i <= last_fb_vc; i++) { if (con2fb_map[i] != idx && con2fb_map[i] != -1) { --- linux-fsl-imx51-2.6.31.orig/drivers/video/matrox/g450_pll.c +++ linux-fsl-imx51-2.6.31/drivers/video/matrox/g450_pll.c @@ -341,7 +341,8 @@ M1064_XDVICLKCTRL_C1DVICLKEN | M1064_XDVICLKCTRL_DVILOOPCTL | M1064_XDVICLKCTRL_P1LOOPBWDTCTL; - matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp); + /* Setting this breaks PC systems so don't do it */ + /* matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp); */ matroxfb_DAC_out(PMINFO M1064_XPWRCTRL, xpwrctrl); --- linux-fsl-imx51-2.6.31.orig/drivers/video/sis/vstruct.h +++ linux-fsl-imx51-2.6.31/drivers/video/sis/vstruct.h @@ -342,7 +342,7 @@ unsigned short SiS_RY4COE; unsigned short SiS_LCDHDES; unsigned short SiS_LCDVDES; - unsigned short SiS_DDC_Port; + SISIOADDRESS SiS_DDC_Port; unsigned short SiS_DDC_Index; unsigned short SiS_DDC_Data; unsigned short SiS_DDC_NData; --- linux-fsl-imx51-2.6.31.orig/drivers/video/sis/sis_main.c +++ linux-fsl-imx51-2.6.31/drivers/video/sis/sis_main.c @@ -1701,6 +1701,9 @@ break; case FBIOGET_VBLANK: + + memset(&sisvbblank, 0, sizeof(struct fb_vblank)); + sisvbblank.count = 0; sisvbblank.flags = sisfb_setupvbblankflags(ivideo, &sisvbblank.vcount, &sisvbblank.hcount); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/Kconfig @@ -229,3 +229,44 @@ help If you have a Tabletkiosk Sahara Touch-iT, say y to enable the backlight driver. + +menuconfig BACKLIGHT_MXC + bool "Freescale MXC/i.MX Backlight Drivers" + depends on BACKLIGHT_CLASS_DEVICE && ARCH_MXC + default y + help + If you have a Freescale MC13783 PMIC, say y to enable the + backlight driver. + +config BACKLIGHT_MXC_IPU + tristate "IPU PWM Backlight Driver" + depends on BACKLIGHT_MXC && MXC_IPU_V1 + default y + +config BACKLIGHT_MXC_LCDC + tristate "LCDC PWM Backlight Driver" + depends on BACKLIGHT_MXC && (ARCH_MX21 || ARCH_MX27 || ARCH_MX25) + default y + +config BACKLIGHT_MXC_PMIC + tristate "PMIC Backlight Driver" + depends on BACKLIGHT_MXC && MXC_MC13783_LIGHT && MXC_MC13783_POWER + default y + +config BACKLIGHT_MXC_MC13892 + tristate "Mc13892 Backlight Driver" + depends on BACKLIGHT_MXC && MXC_MC13892_LIGHT + default y + +config BACKLIGHT_STMP37XX + tristate "SigmaTel STMP37xx Backlight Driver" + depends on BACKLIGHT_CLASS_DEVICE && (ARCH_STMP37XX || ARCH_STMP378X) + default y + help + If you have a STMP37xx, say y to enable the + backlight driver. + +config BACKLIGHT_WM8350 + tristate "WM8350 Backlight Driver" + depends on BACKLIGHT_MXC && REGULATOR_WM8350 + default y --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/stmp37xx_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/stmp37xx_bl.c @@ -0,0 +1,378 @@ +/* + * Backlight Driver for Freescale STMP37XX/STMP378X + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +struct stmp3xxx_bl_data { + struct notifier_block nb; + struct notifier_block reg_nb; + struct notifier_block reg_init_nb; + struct backlight_device *bd; + struct stmp3xxx_platform_bl_data *pdata; + int current_intensity; + int saved_intensity; + int stmp3xxxbl_suspended; + int stmp3xxxbl_constrained; +}; + +static int stmp3xxxbl_do_probe(struct stmp3xxx_bl_data *data, + struct stmp3xxx_platform_bl_data *pdata); +static int stmp3xxxbl_set_intensity(struct backlight_device *bd); +static inline void bl_register_reg(struct stmp3xxx_platform_bl_data *pdata, + struct stmp3xxx_bl_data *data); + + +/* + * If we got here init is done + */ +static int bl_init_reg_callback(struct notifier_block *self, + unsigned long event, void *data) +{ + struct stmp3xxx_bl_data *bdata; + struct stmp3xxx_platform_bl_data *pdata; + struct regulator *r = regulator_get(NULL, "stmp3xxx-bl-1"); + + bdata = container_of(self, struct stmp3xxx_bl_data, reg_init_nb); + pdata = bdata->pdata; + + if (r && !IS_ERR(r)) + regulator_put(r); + else + goto out; + + bl_register_reg(pdata, bdata); + + if (pdata->regulator) { + + printk(KERN_NOTICE"%s: setting intensity\n", __func__); + + bus_unregister_notifier(&platform_bus_type, + &bdata->reg_init_nb); + mutex_lock(&bdata->bd->ops_lock); + stmp3xxxbl_set_intensity(bdata->bd); + mutex_unlock(&bdata->bd->ops_lock); + } + +out: + return 0; +} + +static int bl_reg_callback(struct notifier_block *self, + unsigned long event, void *data) +{ + struct stmp3xxx_bl_data *bdata; + struct stmp3xxx_platform_bl_data *pdata; + bdata = container_of(self, struct stmp3xxx_bl_data, reg_nb); + pdata = bdata->pdata; + + mutex_lock(&bdata->bd->ops_lock); + + switch (event) { + case STMP3XXX_REG5V_IS_USB: + bdata->bd->props.max_brightness = pdata->bl_cons_intensity; + bdata->bd->props.brightness = pdata->bl_cons_intensity; + bdata->saved_intensity = bdata->current_intensity; + bdata->stmp3xxxbl_constrained = 1; + break; + case STMP3XXX_REG5V_NOT_USB: + bdata->bd->props.max_brightness = pdata->bl_max_intensity; + bdata->bd->props.brightness = bdata->saved_intensity; + bdata->stmp3xxxbl_constrained = 0; + break; + } + + stmp3xxxbl_set_intensity(bdata->bd); + mutex_unlock(&bdata->bd->ops_lock); + return 0; +} + +static inline void bl_unregister_reg(struct stmp3xxx_platform_bl_data *pdata, + struct stmp3xxx_bl_data *data) +{ + if (!pdata) + return; + if (pdata->regulator) + regulator_unregister_notifier(pdata->regulator, + &data->reg_nb); + if (pdata->regulator) + regulator_put(pdata->regulator); + pdata->regulator = NULL; +} + +static inline void bl_register_reg(struct stmp3xxx_platform_bl_data *pdata, + struct stmp3xxx_bl_data *data) +{ + pdata->regulator = regulator_get(NULL, "stmp3xxx-bl-1"); + if (pdata->regulator && !IS_ERR(pdata->regulator)) { + regulator_set_mode(pdata->regulator, REGULATOR_MODE_FAST); + if (pdata->regulator) { + data->reg_nb.notifier_call = bl_reg_callback; + regulator_register_notifier(pdata->regulator, + &data->reg_nb); + } + } else{ + printk(KERN_ERR "%s: failed to get regulator\n", __func__); + pdata->regulator = NULL; + } + +} + +static int bl_callback(struct notifier_block *self, + unsigned long event, void *data) +{ + struct stmp3xxx_platform_fb_entry *pentry = data; + struct stmp3xxx_bl_data *bdata; + struct stmp3xxx_platform_bl_data *pdata; + + switch (event) { + case STMP3XXX_LCDIF_PANEL_INIT: + bdata = container_of(self, struct stmp3xxx_bl_data, nb); + pdata = pentry->bl_data; + bdata->pdata = pdata; + if (pdata) { + bl_register_reg(pdata, bdata); + if (!pdata->regulator) { + /* wait for regulator to appear */ + bdata->reg_init_nb.notifier_call = + bl_init_reg_callback; + bus_register_notifier(&platform_bus_type, + &bdata->reg_init_nb); + } + return stmp3xxxbl_do_probe(bdata, pdata); + } + break; + + case STMP3XXX_LCDIF_PANEL_RELEASE: + bdata = container_of(self, struct stmp3xxx_bl_data, nb); + pdata = pentry->bl_data; + if (pdata) { + bus_unregister_notifier(&platform_bus_type, + &bdata->reg_init_nb); + bl_unregister_reg(pdata, bdata); + pdata->free_bl(pdata); + } + bdata->pdata = NULL; + break; + } + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxxbl_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct stmp3xxx_bl_data *data = platform_get_drvdata(pdev); + struct stmp3xxx_platform_bl_data *pdata = data->pdata; + + data->stmp3xxxbl_suspended = 1; + if (pdata) { + dev_dbg(&pdev->dev, "real suspend\n"); + stmp3xxxbl_set_intensity(data->bd); + } + return 0; +} + +static int stmp3xxxbl_resume(struct platform_device *pdev) +{ + struct stmp3xxx_bl_data *data = platform_get_drvdata(pdev); + struct stmp3xxx_platform_bl_data *pdata = data->pdata; + int ret = 0; + + data->stmp3xxxbl_suspended = 0; + if (pdata) { + dev_dbg(&pdev->dev, "real resume\n"); + pdata->free_bl(pdata); + ret = pdata->init_bl(pdata); + if (ret) + goto out; + stmp3xxxbl_set_intensity(data->bd); + } +out: + return ret; +} +#else +#define stmp3xxxbl_suspend NULL +#define stmp3xxxbl_resume NULL +#endif +/* + * This function should be called with bd->ops_lock held + * Suspend/resume ? + */ +static int stmp3xxxbl_set_intensity(struct backlight_device *bd) +{ + struct platform_device *pdev = dev_get_drvdata(&bd->dev); + struct stmp3xxx_bl_data *data = platform_get_drvdata(pdev); + struct stmp3xxx_platform_bl_data *pdata = data->pdata; + + if (pdata) { + int ret; + + ret = pdata->set_bl_intensity(pdata, bd, + data->stmp3xxxbl_suspended); + if (ret) + bd->props.brightness = data->current_intensity; + else + data->current_intensity = bd->props.brightness; + return ret; + } else + return -ENODEV; +} + +static int stmp3xxxbl_get_intensity(struct backlight_device *bd) +{ + struct platform_device *pdev = dev_get_drvdata(&bd->dev); + struct stmp3xxx_bl_data *data = platform_get_drvdata(pdev); + + return data->current_intensity; +} + +static struct backlight_ops stmp3xxxbl_ops = { + .get_brightness = stmp3xxxbl_get_intensity, + .update_status = stmp3xxxbl_set_intensity, +}; + +static int stmp3xxxbl_do_probe(struct stmp3xxx_bl_data *data, + struct stmp3xxx_platform_bl_data *pdata) +{ + int ret = pdata->init_bl(pdata); + + if (ret) + goto out; + + data->bd->props.power = FB_BLANK_UNBLANK; + data->bd->props.fb_blank = FB_BLANK_UNBLANK; + if (data->stmp3xxxbl_constrained) { + data->bd->props.max_brightness = pdata->bl_cons_intensity; + data->bd->props.brightness = pdata->bl_cons_intensity; + } else { + data->bd->props.max_brightness = pdata->bl_max_intensity; + data->bd->props.brightness = pdata->bl_default_intensity; + } + + data->pdata = pdata; + stmp3xxxbl_set_intensity(data->bd); + +out: + return ret; +} + +static int __init stmp3xxxbl_probe(struct platform_device *pdev) +{ + struct stmp3xxx_bl_data *data; + struct stmp3xxx_platform_bl_data *pdata = pdev->dev.platform_data; + int ret = 0; + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto out; + } + data->bd = backlight_device_register(pdev->name, &pdev->dev, pdev, + &stmp3xxxbl_ops); + if (IS_ERR(data->bd)) { + ret = PTR_ERR(data->bd); + goto out_1; + } + + get_device(&pdev->dev); + + data->nb.notifier_call = bl_callback; + stmp3xxx_lcdif_register_client(&data->nb); + platform_set_drvdata(pdev, data); + + if (pdata) { + ret = stmp3xxxbl_do_probe(data, pdata); + if (ret) + goto out_2; + } + + goto out; + +out_2: + put_device(&pdev->dev); +out_1: + kfree(data); +out: + return ret; +} + +static int stmp3xxxbl_remove(struct platform_device *pdev) +{ + struct stmp3xxx_platform_bl_data *pdata = pdev->dev.platform_data; + struct stmp3xxx_bl_data *data = platform_get_drvdata(pdev); + struct backlight_device *bd = data->bd; + + bd->props.power = FB_BLANK_POWERDOWN; + bd->props.fb_blank = FB_BLANK_POWERDOWN; + bd->props.brightness = 0; + data->current_intensity = bd->props.brightness; + + if (pdata) { + pdata->set_bl_intensity(pdata, bd, data->stmp3xxxbl_suspended); + if (pdata->free_bl) + pdata->free_bl(pdata); + } + backlight_device_unregister(bd); + if (pdata->regulator) + regulator_put(pdata->regulator); + put_device(&pdev->dev); + platform_set_drvdata(pdev, NULL); + stmp3xxx_lcdif_unregister_client(&data->nb); + kfree(data); + + return 0; +} + +static struct platform_driver stmp3xxxbl_driver = { + .probe = stmp3xxxbl_probe, + .remove = __devexit_p(stmp3xxxbl_remove), + .suspend = stmp3xxxbl_suspend, + .resume = stmp3xxxbl_resume, + .driver = { + .name = "stmp3xxx-bl", + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxx_init(void) +{ + return platform_driver_register(&stmp3xxxbl_driver); +} + +static void __exit stmp3xxx_exit(void) +{ + platform_driver_unregister(&stmp3xxxbl_driver); +} + +module_init(stmp3xxx_init); +module_exit(stmp3xxx_exit); + +MODULE_AUTHOR("Embedded Alley Solutions, Inc "); +MODULE_DESCRIPTION("STMP3xxx Backlight Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/Makefile +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/Makefile @@ -25,3 +25,9 @@ obj-$(CONFIG_BACKLIGHT_TOSA) += tosa_bl.o obj-$(CONFIG_BACKLIGHT_SAHARA) += kb3886_bl.o +obj-$(CONFIG_BACKLIGHT_MXC_LCDC) += mxc_lcdc_bl.o +obj-$(CONFIG_BACKLIGHT_MXC_IPU) += mxc_ipu_bl.o +obj-$(CONFIG_BACKLIGHT_MXC_PMIC) += mxc_pmic_bl.o +obj-$(CONFIG_BACKLIGHT_WM8350) += wm8350_bl.o +obj-$(CONFIG_BACKLIGHT_MXC_MC13892) += mxc_mc13892_bl.o +obj-$(CONFIG_BACKLIGHT_STMP37XX) += stmp37xx_bl.o --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/wm8350_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/wm8350_bl.c @@ -0,0 +1,298 @@ +/* + * Backlight driver for DCDC2 on i.MX32ADS board + * + * Copyright(C) 2007 Wolfson Microelectronics PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct wm8350_backlight { + struct backlight_properties props; + struct backlight_device *device; + struct regulator *dcdc; + struct regulator *isink; + struct notifier_block notifier; + struct work_struct work; + struct mutex mutex; + int intensity; + int suspend; + int retries; +}; + +/* hundredths of uA, 405 = 4.05 uA */ +static const int intensity_huA[] = { + 405, 482, 573, 681, 810, 963, 1146, 1362, 1620, 1927, 2291, 2725, + 3240, 3853, 4582, 5449, 6480, 7706, 9164, 10898, 12960, 15412, 18328, + 21796, 25920, 30824, 36656, 43592, 51840, 61648, 73313, 87184, + 103680, 123297, 146626, 174368, 207360, 246594, 293251, 348737, + 414720, 493188, 586503, 697473, 829440, 986376, 1173005, 1394946, + 1658880, 1972752, 2346011, 2789892, 3317760, 3945504, 4692021, + 5579785, 6635520, 7891008, 9384042, 11159570, 13271040, 15782015, + 18768085, 22319140, +}; + +static void bl_work(struct work_struct *work) +{ + struct wm8350_backlight *bl = + container_of(work, struct wm8350_backlight, work); + struct regulator *isink = bl->isink; + + mutex_lock(&bl->mutex); + if (bl->intensity >= 0 && + bl->intensity < ARRAY_SIZE(intensity_huA)) { + bl->retries = 0; + regulator_set_current_limit(isink, + 0, intensity_huA[bl->intensity] / 100); + } else + printk(KERN_ERR "wm8350: Backlight intensity error\n"); + mutex_unlock(&bl->mutex); +} + +static int wm8350_bl_notifier(struct notifier_block *self, + unsigned long event, void *data) +{ + struct wm8350_backlight *bl = + container_of(self, struct wm8350_backlight, notifier); + struct regulator *isink = bl->isink; + + if (event & REGULATOR_EVENT_UNDER_VOLTAGE) + printk(KERN_ERR "wm8350: BL DCDC undervoltage\n"); + if (event & REGULATOR_EVENT_REGULATION_OUT) + printk(KERN_ERR "wm8350: BL ISINK out of regulation\n"); + + mutex_lock(&bl->mutex); + if (bl->retries) { + bl->retries--; + regulator_disable(isink); + regulator_set_current_limit(isink, 0, bl->intensity); + regulator_enable(isink); + } else { + printk(KERN_ERR + "wm8350: BL regulation retry failure - disable\n"); + bl->intensity = 0; + regulator_disable(isink); + } + mutex_unlock(&bl->mutex); + return 0; +} + +static int wm8350_bl_send_intensity(struct backlight_device *bd) +{ + struct wm8350_backlight *bl = + (struct wm8350_backlight *)dev_get_drvdata(&bd->dev); + int intensity = bd->props.brightness; + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + if (bl->suspend) + intensity = 0; + + mutex_lock(&bl->mutex); + bl->intensity = intensity; + mutex_unlock(&bl->mutex); + schedule_work(&bl->work); + + return 0; +} + +#ifdef CONFIG_PM +static int wm8350_bl_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct wm8350_backlight *bl = + (struct wm8350_backlight *)platform_get_drvdata(pdev); + + bl->suspend = 1; + backlight_update_status(bl->device); + return 0; +} + +static int wm8350_bl_resume(struct platform_device *pdev) +{ + struct wm8350_backlight *bl = + (struct wm8350_backlight *)platform_get_drvdata(pdev); + + bl->suspend = 0; + backlight_update_status(bl->device); + return 0; +} +#else +#define wm8350_bl_suspend NULL +#define wm8350_bl_resume NULL +#endif + +static int wm8350_bl_get_intensity(struct backlight_device *bd) +{ + struct wm8350_backlight *bl = + (struct wm8350_backlight *)dev_get_drvdata(&bd->dev); + return bl->intensity; +} + +static struct backlight_ops wm8350_bl_ops = { + .get_brightness = wm8350_bl_get_intensity, + .update_status = wm8350_bl_send_intensity, +}; + +static int wm8350_bl_probe(struct platform_device *pdev) +{ + struct regulator *isink, *dcdc; + struct wm8350_backlight *bl; + struct wm8350_bl_platform_data *pdata = pdev->dev.platform_data; + struct wm8350 *pmic; + int ret; + + if (pdata == NULL) { + printk(KERN_ERR "%s: no platform data\n", __func__); + return -ENODEV; + } + + if (pdata->isink != WM8350_ISINK_A && pdata->isink != WM8350_ISINK_B) { + printk(KERN_ERR "%s: invalid ISINK\n", __func__); + return -EINVAL; + } + if (pdata->dcdc != WM8350_DCDC_2 && pdata->dcdc != WM8350_DCDC_5) { + printk(KERN_ERR "%s: invalid DCDC\n", __func__); + return -EINVAL; + } + + printk(KERN_INFO "wm8350: backlight using %s and %s\n", + pdata->isink == WM8350_ISINK_A ? "ISINKA" : "ISINKB", + pdata->dcdc == WM8350_DCDC_2 ? "DCDC2" : "DCDC5"); + + isink = regulator_get(&pdev->dev, + pdata->isink == WM8350_ISINK_A ? "ISINKA" : "ISINKB"); + if (IS_ERR(isink) || isink == NULL) { + printk(KERN_ERR "%s: cant get ISINK\n", __func__); + return PTR_ERR(isink); + } + + dcdc = regulator_get(&pdev->dev, + pdata->dcdc == WM8350_DCDC_2 ? "DCDC2" : "DCDC5"); + if (IS_ERR(dcdc) || dcdc == NULL) { + printk(KERN_ERR "%s: cant get DCDC\n", __func__); + regulator_put(isink); + return PTR_ERR(dcdc); + } + + bl = kzalloc(sizeof(*bl), GFP_KERNEL); + if (bl == NULL) { + regulator_put(isink); + regulator_put(dcdc); + return -ENOMEM; + } + + mutex_init(&bl->mutex); + INIT_WORK(&bl->work, bl_work); + bl->props.max_brightness = pdata->max_brightness; + bl->props.power = pdata->power; + bl->props.brightness = pdata->brightness; + bl->retries = pdata->retries; + bl->dcdc = dcdc; + bl->isink = isink; + platform_set_drvdata(pdev, bl); + pmic = regulator_get_drvdata(bl->isink); + + wm8350_bl_ops.check_fb = pdata->check_fb; + + bl->device = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, + bl, &wm8350_bl_ops); + if (IS_ERR(bl->device)) { + ret = PTR_ERR(bl->device); + regulator_put(dcdc); + regulator_put(isink); + kfree(bl); + return ret; + } + + bl->notifier.notifier_call = wm8350_bl_notifier; + regulator_register_notifier(dcdc, &bl->notifier); + regulator_register_notifier(isink, &bl->notifier); + bl->device->props = bl->props; + + regulator_set_current_limit(isink, 0, 20000); + + wm8350_isink_set_flash(pmic, pdata->isink, + WM8350_ISINK_FLASH_DISABLE, + WM8350_ISINK_FLASH_TRIG_BIT, + WM8350_ISINK_FLASH_DUR_32MS, + WM8350_ISINK_FLASH_ON_1_00S, + WM8350_ISINK_FLASH_OFF_1_00S, + WM8350_ISINK_FLASH_MODE_EN); + + wm8350_dcdc25_set_mode(pmic, pdata->dcdc, + WM8350_ISINK_MODE_BOOST, WM8350_ISINK_ILIM_NORMAL, + pdata->voltage_ramp, pdata->isink == WM8350_ISINK_A ? + WM8350_DC5_FBSRC_ISINKA : WM8350_DC5_FBSRC_ISINKB); + + wm8350_dcdc_set_slot(pmic, pdata->dcdc, 15, 0, + pdata->dcdc == WM8350_DCDC_2 ? + WM8350_DC2_ERRACT_SHUTDOWN_CONV : WM8350_DC5_ERRACT_NONE); + + regulator_enable(isink); + backlight_update_status(bl->device); + return 0; +} + +static int wm8350_bl_remove(struct platform_device *pdev) +{ + struct wm8350_backlight *bl = + (struct wm8350_backlight *)platform_get_drvdata(pdev); + struct regulator *isink = bl->isink, *dcdc = bl->dcdc; + + bl->intensity = 0; + backlight_update_status(bl->device); + schedule_work(&bl->work); + flush_scheduled_work(); + backlight_device_unregister(bl->device); + + regulator_set_current_limit(isink, 0, 0); + regulator_disable(isink); + regulator_unregister_notifier(isink, &bl->notifier); + regulator_unregister_notifier(dcdc, &bl->notifier); + regulator_put(isink); + regulator_put(dcdc); + return 0; +} + +struct platform_driver imx32ads_backlight_driver = { + .driver = { + .name = "wm8350-bl", + .owner = THIS_MODULE, + }, + .probe = wm8350_bl_probe, + .remove = wm8350_bl_remove, + .suspend = wm8350_bl_suspend, + .resume = wm8350_bl_resume, +}; + +static int __devinit imx32ads_backlight_init(void) +{ + return platform_driver_register(&imx32ads_backlight_driver); +} + +static void imx32ads_backlight_exit(void) +{ + platform_driver_unregister(&imx32ads_backlight_driver); +} + +device_initcall_sync(imx32ads_backlight_init); +module_exit(imx32ads_backlight_exit); + +MODULE_AUTHOR("Liam Girdwood "); +MODULE_DESCRIPTION("WM8350 Backlight driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/lcd.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/lcd.c @@ -56,7 +56,7 @@ static int lcd_register_fb(struct lcd_device *ld) { - memset(&ld->fb_notif, 0, sizeof(&ld->fb_notif)); + memset(&ld->fb_notif, 0, sizeof(ld->fb_notif)); ld->fb_notif.notifier_call = fb_notifier_callback; return fb_register_client(&ld->fb_notif); } --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/mxc_mc13892_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/mxc_mc13892_bl.c @@ -0,0 +1,177 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* +#define MXC_MAX_INTENSITY 255 +#define MXC_DEFAULT_INTENSITY 127 +*/ +/* workaround for atlas hot issue */ +#define MXC_MAX_INTENSITY 128 +#define MXC_DEFAULT_INTENSITY 64 + +#define MXC_INTENSITY_OFF 0 + +struct mxcbl_dev_data { + int intensity; + int suspend; +}; + +static int mxcbl_set_intensity(struct backlight_device *bd) +{ + int brightness = bd->props.brightness; + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + if (bd->props.power != FB_BLANK_UNBLANK) + brightness = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + brightness = 0; + if (devdata->suspend) + brightness = 0; + + brightness = brightness / 4; + mc13892_bklit_set_dutycycle(LIT_MAIN, brightness); + devdata->intensity = brightness; + + return 0; +} + +static int mxcbl_get_intensity(struct backlight_device *bd) +{ + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + return devdata->intensity; +} + +static int mxcbl_check_fb(struct fb_info *info) +{ + char *id = info->fix.id; + + if (!strcmp(id, "DISP3 BG")) + return 1; + else + return 0; +} + +static struct backlight_ops bl_ops; + +static int __init mxcbl_probe(struct platform_device *pdev) +{ + int ret = 0; + struct backlight_device *bd; + struct mxcbl_dev_data *devdata; + pmic_version_t pmic_version; + + pr_debug("mc13892 backlight start probe\n"); + + devdata = kzalloc(sizeof(struct mxcbl_dev_data), GFP_KERNEL); + if (!devdata) + return -ENOMEM; + + bl_ops.check_fb = mxcbl_check_fb; + bl_ops.get_brightness = mxcbl_get_intensity; + bl_ops.update_status = mxcbl_set_intensity; + bd = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, devdata, + &bl_ops); + if (IS_ERR(bd)) { + ret = PTR_ERR(bd); + goto err0; + } + + platform_set_drvdata(pdev, bd); + + /* according to LCD spec, current should be 18mA */ + /* workaround for MC13892 TO1.1 crash issue, set current 6mA */ + pmic_version = pmic_get_version(); + if (pmic_version.revision < 20) + mc13892_bklit_set_current(LIT_MAIN, LIT_CURR_6); + else + mc13892_bklit_set_current(LIT_MAIN, LIT_CURR_18); + bd->props.brightness = MXC_DEFAULT_INTENSITY; + bd->props.max_brightness = MXC_MAX_INTENSITY; + bd->props.power = FB_BLANK_UNBLANK; + bd->props.fb_blank = FB_BLANK_UNBLANK; + backlight_update_status(bd); + pr_debug("mc13892 backlight probed successfully\n"); + return 0; + + err0: + kfree(devdata); + return ret; +} + +static int mxcbl_remove(struct platform_device *pdev) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + kfree(devdata); + backlight_device_unregister(bd); + return 0; +} + +static int mxcbl_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + devdata->suspend = 1; + backlight_update_status(bd); + return 0; +} + +static int mxcbl_resume(struct platform_device *pdev) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + devdata->suspend = 0; + backlight_update_status(bd); + return 0; +} + +static struct platform_driver mxcbl_driver = { + .probe = mxcbl_probe, + .remove = mxcbl_remove, + .suspend = mxcbl_suspend, + .resume = mxcbl_resume, + .driver = { + .name = "mxc_mc13892_bl", + }, +}; + +static int __init mxcbl_init(void) +{ + return platform_driver_register(&mxcbl_driver); +} + +static void __exit mxcbl_exit(void) +{ + platform_driver_unregister(&mxcbl_driver); +} + +module_init(mxcbl_init); +module_exit(mxcbl_exit); + +MODULE_DESCRIPTION("Freescale MXC/i.MX PMIC Backlight Driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/mxc_pmic_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/mxc_pmic_bl.c @@ -0,0 +1,197 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @defgroup PMIC_BL MXC PMIC Backlight Driver + */ +/*! + * @file mxc_pmic_bl.c + * + * @brief PMIC Backlight Driver for Freescale MXC/i.MX platforms. + * + * This file contains API defined in include/linux/clk.h for setting up and + * retrieving clocks. + * + * Based on Sharp's Corgi Backlight Driver + * + * @ingroup PMIC_BL + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define MXC_MAX_INTENSITY 255 +#define MXC_DEFAULT_INTENSITY 127 +#define MXC_INTENSITY_OFF 0 + +struct mxcbl_dev_data { + int bl_id; + int intensity; + struct backlight_ops bl_ops; +}; + +static int pmic_bl_use_count; +static int main_fb_id; +static int sec_fb_id; + +static int mxcbl_send_intensity(struct backlight_device *bd) +{ + int intensity = bd->props.brightness; + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + + intensity = intensity / 16; + pmic_bklit_set_dutycycle(devdata->bl_id, intensity); + + devdata->intensity = intensity; + return 0; +} + +static int mxcbl_get_intensity(struct backlight_device *bd) +{ + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + return devdata->intensity; +} + +static int mxcbl_check_main_fb(struct fb_info *info) +{ + int id = info->fix.id[4] - '0'; + + if (id == main_fb_id) { + return 1; + } else { + return 0; + } +} + +static int mxcbl_check_sec_fb(struct fb_info *info) +{ + int id = info->fix.id[4] - '0'; + + if (id == sec_fb_id) { + return 1; + } else { + return 0; + } +} + +static int __init mxcbl_probe(struct platform_device *pdev) +{ + int ret = 0; + struct backlight_device *bd; + struct mxcbl_dev_data *devdata; + + devdata = kzalloc(sizeof(struct mxcbl_dev_data), GFP_KERNEL); + if (!devdata) + return -ENOMEM; + devdata->bl_id = pdev->id; + + if (pdev->id == 0) { + devdata->bl_ops.check_fb = mxcbl_check_main_fb; + main_fb_id = (int)pdev->dev.platform_data; + } else { + devdata->bl_ops.check_fb = mxcbl_check_sec_fb; + sec_fb_id = (int)pdev->dev.platform_data; + } + + devdata->bl_ops.get_brightness = mxcbl_get_intensity; + devdata->bl_ops.update_status = mxcbl_send_intensity, + bd = + backlight_device_register(dev_name(&pdev->dev), &pdev->dev, devdata, + &devdata->bl_ops); + if (IS_ERR(bd)) { + ret = PTR_ERR(bd); + goto err0; + } + + platform_set_drvdata(pdev, bd); + + if (pmic_bl_use_count++ == 0) { + pmic_power_regulator_on(SW_SW3); + pmic_power_regulator_set_lp_mode(SW_SW3, LOW_POWER_CTRL_BY_PIN); + + pmic_bklit_tcled_master_enable(); + pmic_bklit_enable_edge_slow(); + pmic_bklit_set_cycle_time(0); + } + + pmic_bklit_set_current(devdata->bl_id, 7); + bd->props.brightness = MXC_DEFAULT_INTENSITY; + bd->props.max_brightness = MXC_MAX_INTENSITY; + bd->props.power = FB_BLANK_UNBLANK; + bd->props.fb_blank = FB_BLANK_UNBLANK; + backlight_update_status(bd); + + printk("MXC Backlight Device %s Initialized.\n", dev_name(&pdev->dev)); + return 0; + err0: + kfree(devdata); + return ret; +} + +static int mxcbl_remove(struct platform_device *pdev) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + + bd->props.brightness = MXC_INTENSITY_OFF; + backlight_update_status(bd); + + if (--pmic_bl_use_count == 0) { + pmic_bklit_tcled_master_disable(); + + pmic_power_regulator_off(SW_SW3); + pmic_power_regulator_set_lp_mode(SW_SW3, LOW_POWER_CTRL_BY_PIN); + } + + backlight_device_unregister(bd); + + printk("MXC Backlight Driver Unloaded\n"); + + return 0; +} + +static struct platform_driver mxcbl_driver = { + .probe = mxcbl_probe, + .remove = mxcbl_remove, + .driver = { + .name = "mxc_pmic_bl", + }, +}; + +static int __init mxcbl_init(void) +{ + return platform_driver_register(&mxcbl_driver); +} + +static void __exit mxcbl_exit(void) +{ + platform_driver_unregister(&mxcbl_driver); +} + +module_init(mxcbl_init); +module_exit(mxcbl_exit); + +MODULE_DESCRIPTION("Freescale MXC/i.MX PMIC Backlight Driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/mxc_ipu_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/mxc_ipu_bl.c @@ -0,0 +1,155 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @defgroup IPU_BL MXC IPU Backlight Driver + */ +/*! + * @file mxc_ipu_bl.c + * + * @brief Backlight Driver for IPU PWM on Freescale MXC/i.MX platforms. + * + * This file contains API defined in include/linux/clk.h for setting up and + * retrieving clocks. + * + * Based on Sharp's Corgi Backlight Driver + * + * @ingroup IPU_BL + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_MAX_INTENSITY 255 +#define MXC_DEFAULT_INTENSITY 127 +#define MXC_INTENSITY_OFF 0 + +struct mxcbl_dev_data { + int intensity; +}; + +static int fb_id; + +static int mxcbl_send_intensity(struct backlight_device *bd) +{ + int intensity = bd->props.brightness; + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + + ipu_sdc_set_brightness(intensity); + + devdata->intensity = intensity; + return 0; +} + +static int mxcbl_get_intensity(struct backlight_device *bd) +{ + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + return devdata->intensity; +} + +static int mxcbl_check_fb(struct fb_info *info) +{ + int id = info->fix.id[4] - '0'; + if (id == fb_id) { + if ((id == 3) && !strcmp(info->fix.id, "DISP3 FG")) { + return 0; + } + return 1; + } + return 0; +} + +static struct backlight_ops mxcbl_ops = { + .get_brightness = mxcbl_get_intensity, + .update_status = mxcbl_send_intensity, + .check_fb = mxcbl_check_fb, +}; + +static int __init mxcbl_probe(struct platform_device *pdev) +{ + struct backlight_device *bd; + struct mxcbl_dev_data *devdata; + int ret = 0; + + devdata = kzalloc(sizeof(struct mxcbl_dev_data), GFP_KERNEL); + if (!devdata) + return -ENOMEM; + fb_id = (int)pdev->dev.platform_data; + + bd = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, devdata, + &mxcbl_ops); + if (IS_ERR(bd)) { + ret = PTR_ERR(bd); + goto err0; + } + platform_set_drvdata(pdev, bd); + + bd->props.brightness = MXC_DEFAULT_INTENSITY; + bd->props.max_brightness = MXC_MAX_INTENSITY; + bd->props.power = FB_BLANK_UNBLANK; + bd->props.fb_blank = FB_BLANK_UNBLANK; + backlight_update_status(bd); + + printk("MXC Backlight Device %s Initialized.\n", dev_name(&pdev->dev)); + return 0; + err0: + kfree(devdata); + return ret; +} + +static int mxcbl_remove(struct platform_device *pdev) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + + bd->props.brightness = MXC_INTENSITY_OFF; + backlight_update_status(bd); + + backlight_device_unregister(bd); + + return 0; +} + +static struct platform_driver mxcbl_driver = { + .probe = mxcbl_probe, + .remove = mxcbl_remove, + .driver = { + .name = "mxc_ipu_bl", + }, +}; + +static int __init mxcbl_init(void) +{ + return platform_driver_register(&mxcbl_driver); +} + +static void __exit mxcbl_exit(void) +{ + platform_driver_unregister(&mxcbl_driver); +} + +late_initcall(mxcbl_init); +module_exit(mxcbl_exit); + +MODULE_DESCRIPTION("Freescale MXC/i.MX IPU PWM Backlight Driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/video/backlight/mxc_lcdc_bl.c +++ linux-fsl-imx51-2.6.31/drivers/video/backlight/mxc_lcdc_bl.c @@ -0,0 +1,160 @@ +/* + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @defgroup LCDC_BL MXC LCDC Backlight Driver + */ +/*! + * @file mxc_lcdc_bl.c + * + * @brief Backlight Driver for LCDC PWM on Freescale MXC/i.MX platforms. + * + * This file contains API defined in include/linux/clk.h for setting up and + * retrieving clocks. + * + * Based on Sharp's Corgi Backlight Driver + * + * @ingroup LCDC_BL + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_MAX_INTENSITY 255 +#define MXC_DEFAULT_INTENSITY 127 +#define MXC_INTENSITY_OFF 0 + +extern void mx2fb_set_brightness(uint8_t); + +struct mxcbl_dev_data { + struct clk *clk; + int intensity; +}; + +static int mxcbl_send_intensity(struct backlight_device *bd) +{ + int intensity = bd->props.brightness; + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + + if ((devdata->intensity == 0) && (intensity != 0)) + clk_enable(devdata->clk); + + /* PWM contrast control register */ + mx2fb_set_brightness(intensity); + + if ((devdata->intensity != 0) && (intensity == 0)) + clk_disable(devdata->clk); + + devdata->intensity = intensity; + return 0; +} + +static int mxcbl_get_intensity(struct backlight_device *bd) +{ + struct mxcbl_dev_data *devdata = dev_get_drvdata(&bd->dev); + return devdata->intensity; +} + +static int mxcbl_check_fb(struct fb_info *info) +{ + if (strcmp(info->fix.id, "DISP0 BG") == 0) { + return 1; + } + return 0; +} + +static struct backlight_ops mxcbl_ops = { + .get_brightness = mxcbl_get_intensity, + .update_status = mxcbl_send_intensity, + .check_fb = mxcbl_check_fb, +}; + +static int __init mxcbl_probe(struct platform_device *pdev) +{ + struct backlight_device *bd; + struct mxcbl_dev_data *devdata; + int ret = 0; + + devdata = kzalloc(sizeof(struct mxcbl_dev_data), GFP_KERNEL); + if (!devdata) + return -ENOMEM; + + devdata->clk = clk_get(NULL, "lcdc_clk"); + + bd = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, devdata, + &mxcbl_ops); + if (IS_ERR(bd)) { + ret = PTR_ERR(bd); + goto err0; + } + platform_set_drvdata(pdev, bd); + + bd->props.brightness = MXC_DEFAULT_INTENSITY; + bd->props.max_brightness = MXC_MAX_INTENSITY; + bd->props.power = FB_BLANK_UNBLANK; + bd->props.fb_blank = FB_BLANK_UNBLANK; + mx2fb_set_brightness(MXC_DEFAULT_INTENSITY); + + printk("MXC Backlight Device %s Initialized.\n", dev_name(&pdev->dev)); + return 0; + err0: + kfree(devdata); + return ret; +} + +static int mxcbl_remove(struct platform_device *pdev) +{ + struct backlight_device *bd = platform_get_drvdata(pdev); + + bd->props.brightness = MXC_INTENSITY_OFF; + backlight_update_status(bd); + + backlight_device_unregister(bd); + + return 0; +} + +static struct platform_driver mxcbl_driver = { + .probe = mxcbl_probe, + .remove = mxcbl_remove, + .driver = { + .name = "mxc_lcdc_bl", + }, +}; + +static int __init mxcbl_init(void) +{ + return platform_driver_register(&mxcbl_driver); +} + +static void __exit mxcbl_exit(void) +{ + platform_driver_unregister(&mxcbl_driver); +} + +module_init(mxcbl_init); +module_exit(mxcbl_exit); + +MODULE_DESCRIPTION("Freescale MXC/i.MX LCDC PWM Backlight Driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/crypto/padlock-aes.c +++ linux-fsl-imx51-2.6.31/drivers/crypto/padlock-aes.c @@ -236,7 +236,7 @@ /* Padlock in ECB mode fetches at least ecb_fetch_bytes of data. * We could avoid some copying here but it's probably not worth it. */ - if (unlikely(((unsigned long)in & PAGE_SIZE) + ecb_fetch_bytes > PAGE_SIZE)) { + if (unlikely(((unsigned long)in & ~PAGE_MASK) + ecb_fetch_bytes > PAGE_SIZE)) { ecb_crypt_copy(in, out, key, cword, count); return; } @@ -248,7 +248,7 @@ u8 *iv, struct cword *cword, int count) { /* Padlock in CBC mode fetches at least cbc_fetch_bytes of data. */ - if (unlikely(((unsigned long)in & PAGE_SIZE) + cbc_fetch_bytes > PAGE_SIZE)) + if (unlikely(((unsigned long)in & ~PAGE_MASK) + cbc_fetch_bytes > PAGE_SIZE)) return cbc_crypt_copy(in, out, key, iv, cword, count); return rep_xcrypt_cbc(in, out, key, iv, cword, count); --- linux-fsl-imx51-2.6.31.orig/drivers/crypto/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/crypto/Kconfig @@ -209,4 +209,16 @@ help This option allows you to have support for AMCC crypto acceleration. +config CRYPTO_DEV_STMP3XXX_DCP + tristate "Support for the STMP3xxx DCP engine" + depends on ARCH_STMP3XXX + select CRYPTO_ALGAPI + select CRYPTO_BLKCIPHER + help + Say 'Y' here to use the STMP3XXX DCP AES + engine for the CryptoAPI AES algorithm. + + To compile this driver as a module, choose M here: the module + will be called geode-aes. + endif # CRYPTO_HW --- linux-fsl-imx51-2.6.31.orig/drivers/crypto/stmp3xxx_dcp.h +++ linux-fsl-imx51-2.6.31/drivers/crypto/stmp3xxx_dcp.h @@ -0,0 +1,68 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _STMP3XXX_DCP_H_ +#define _STMP3XXX_DCP_H_ + +#include +#include +#include + +#define CIPHER_CHAN 1 +#define CIPHER_MASK (1 << CIPHER_CHAN) + +#define HASH_CHAN 0 +#define HASH_MASK (1 << HASH_CHAN) + +#define ALL_MASK (CIPHER_MASK | HASH_MASK) + +/* Defines the initialization value for the dcp control register */ +#define STMP3XXX_DCP_CTRL_INIT \ + (BM_DCP_CTRL_GATHER_RESIDUAL_WRITES | \ + BM_DCP_CTRL_ENABLE_CONTEXT_CACHING | \ + BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH0 | \ + BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH1 | \ + BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH2 | \ + BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH3) + +/* Defines the initialization value for the dcp channel control register */ +#define STMP3XXX_DCP_CHANNELCTRL_INIT \ + BF(ALL_MASK, DCP_CHANNELCTRL_ENABLE_CHANNEL) + +/* DCP work packet 1 value for encryption */ +#define STMP3XXX_DCP_PKT1_ENCRYPT \ + (BM_DCP_PACKET1_DECR_SEMAPHORE | \ + BM_DCP_PACKET1_ENABLE_CIPHER | \ + BM_DCP_PACKET1_CIPHER_ENCRYPT | \ + BM_DCP_PACKET1_CIPHER_INIT) + +/* DCP work packet 1 value for decryption */ +#define DCP_PKT1_DECRYPT \ + (BM_DCP_PACKET1_DECR_SEMAPHORE | \ + BM_DCP_PACKET1_ENABLE_CIPHER | \ + BM_DCP_PACKET1_CIPHER_INIT) + +/* DCP (decryption) work packet definition */ +struct stmp3xxx_dcp_hw_packet { + uint32_t pNext; /* next dcp work packet address */ + uint32_t pkt1; /* dcp work packet 1 (control 0) */ + uint32_t pkt2; /* dcp work packet 2 (control 1) */ + uint32_t pSrc; /* source buffer address */ + uint32_t pDst; /* destination buffer address */ + uint32_t size; /* buffer size in bytes */ + uint32_t pPayload; /* payload buffer address */ + uint32_t stat; /* dcp status (written by dcp) */ +}; + +#define STMP3XXX_DCP_NUM_CHANNELS 4 + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/crypto/Makefile +++ linux-fsl-imx51-2.6.31/drivers/crypto/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o obj-$(CONFIG_CRYPTO_DEV_PPC4XX) += amcc/ +obj-$(CONFIG_CRYPTO_DEV_STMP3XXX_DCP) += stmp3xxx_dcp.o --- linux-fsl-imx51-2.6.31.orig/drivers/crypto/stmp3xxx_dcp.c +++ linux-fsl-imx51-2.6.31/drivers/crypto/stmp3xxx_dcp.c @@ -0,0 +1,1402 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* + * Based on geode-aes.c + * Copyright (C) 2004-2006, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "stmp3xxx_dcp.h" + +/* SHA1 is busted */ +#define DISABLE_SHA1 + +struct stmp3xxx_dcp { + struct device *dev; + spinlock_t lock; + struct mutex op_mutex[STMP3XXX_DCP_NUM_CHANNELS]; + struct completion op_wait[STMP3XXX_DCP_NUM_CHANNELS]; + int wait[STMP3XXX_DCP_NUM_CHANNELS]; + int dcp_vmi_irq; + int dcp_irq; +}; + +/* cipher flags */ +#define STMP3XXX_DCP_ENC 0x0001 +#define STMP3XXX_DCP_DEC 0x0002 +#define STMP3XXX_DCP_ECB 0x0004 +#define STMP3XXX_DCP_CBC 0x0008 +#define STMP3XXX_DCP_CBC_INIT 0x0010 +#define STMP3XXX_DCP_OTPKEY 0x0020 + +/* hash flags */ +#define STMP3XXX_DCP_INIT 0x0001 +#define STMP3XXX_DCP_UPDATE 0x0002 +#define STMP3XXX_DCP_FINAL 0x0004 + +#define STMP3XXX_DCP_AES 0x1000 +#define STMP3XXX_DCP_SHA1 0x2000 +#define STMP3XXX_DCP_CRC32 0x3000 +#define STMP3XXX_DCP_COPY 0x4000 +#define STMP3XXX_DCP_FILL 0x5000 +#define STMP3XXX_DCP_MODE_MASK 0xf000 + +struct stmp3xxx_dcp_op { + + unsigned int flags; + + void *src; + dma_addr_t src_phys; + + void *dst; + dma_addr_t dst_phys; + + int len; + + /* the key contains the IV for block modes */ + union { + struct { + u8 key[2 * AES_KEYSIZE_128] + __attribute__ ((__aligned__(32))); + dma_addr_t key_phys; + int keylen; + } cipher; + struct { + u8 digest[SHA1_DIGEST_SIZE] + __attribute__ ((__aligned__(32))); + dma_addr_t digest_phys; + int digestlen; + int init; + } hash; + }; + + union { + struct crypto_blkcipher *blk; + struct crypto_cipher *cip; + struct crypto_hash *hash; + } fallback; + + struct stmp3xxx_dcp_hw_packet pkt + __attribute__ ((__aligned__(32))); +}; + +struct stmp3xxx_dcp_hash_coherent_block { + struct stmp3xxx_dcp_hw_packet pkt[2] + __attribute__ ((__aligned__(32))); + u8 digest[SHA1_DIGEST_SIZE] + __attribute__ ((__aligned__(32))); + u8 rembuf[32]; +}; + +struct stmp3xxx_dcp_hash_op { + + unsigned int flags; + + void *src; + dma_addr_t src_phys; + + void *dst; + dma_addr_t dst_phys; + + int len; + + /* the key contains the IV for block modes */ + union { + struct { + u8 key[2 * AES_KEYSIZE_128] + __attribute__ ((__aligned__(32))); + dma_addr_t key_phys; + int keylen; + } cipher; + struct { + u8 digest[SHA1_DIGEST_SIZE] + __attribute__ ((__aligned__(32))); + dma_addr_t digest_phys; + int digestlen; + int init; + } hash; + }; + + union { + struct crypto_blkcipher *blk; + struct crypto_cipher *cip; + struct crypto_hash *hash; + } fallback; + + struct stmp3xxx_dcp_hash_coherent_block *hw; + dma_addr_t hw_phys; +}; + +/* only one */ +static struct stmp3xxx_dcp *global_sdcp; + +static void dcp_perform_op(struct stmp3xxx_dcp_op *op) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct mutex *mutex; + struct stmp3xxx_dcp_hw_packet *pkt; + int chan; + u32 pkt1, pkt2; + unsigned long timeout; + dma_addr_t pkt_phys; + u32 stat; + + pkt1 = BM_DCP_PACKET1_DECR_SEMAPHORE | BM_DCP_PACKET1_INTERRUPT; + + switch (op->flags & STMP3XXX_DCP_MODE_MASK) { + + case STMP3XXX_DCP_AES: + + chan = CIPHER_CHAN; + + /* key is at the payload */ + pkt1 |= BM_DCP_PACKET1_ENABLE_CIPHER; + if ((op->flags & STMP3XXX_DCP_OTPKEY) == 0) + pkt1 |= BM_DCP_PACKET1_PAYLOAD_KEY; + if (op->flags & STMP3XXX_DCP_ENC) + pkt1 |= BM_DCP_PACKET1_CIPHER_ENCRYPT; + if (op->flags & STMP3XXX_DCP_CBC_INIT) + pkt1 |= BM_DCP_PACKET1_CIPHER_INIT; + + pkt2 = BF(0, DCP_PACKET2_CIPHER_CFG) | + BF(0, DCP_PACKET2_KEY_SELECT) | + BF(BV_DCP_PACKET2_CIPHER_SELECT__AES128, + DCP_PACKET2_CIPHER_SELECT); + + if (op->flags & STMP3XXX_DCP_ECB) + pkt2 |= BF(BV_DCP_PACKET2_CIPHER_MODE__ECB, + DCP_PACKET2_CIPHER_MODE); + else if (op->flags & STMP3XXX_DCP_CBC) + pkt2 |= BF(BV_DCP_PACKET2_CIPHER_MODE__CBC, + DCP_PACKET2_CIPHER_MODE); + + break; + + case STMP3XXX_DCP_SHA1: + + chan = HASH_CHAN; + + pkt1 |= BM_DCP_PACKET1_ENABLE_HASH; + if (op->flags & STMP3XXX_DCP_INIT) + pkt1 |= BM_DCP_PACKET1_HASH_INIT; + if (op->flags & STMP3XXX_DCP_FINAL) { + pkt1 |= BM_DCP_PACKET1_HASH_TERM; + BUG_ON(op->hash.digest == NULL); + } + + pkt2 = BF(BV_DCP_PACKET2_HASH_SELECT__SHA1, + DCP_PACKET2_HASH_SELECT); + break; + + default: + dev_err(sdcp->dev, "Unsupported mode\n"); + return; + } + + mutex = &sdcp->op_mutex[chan]; + pkt = &op->pkt; + + pkt->pNext = 0; + pkt->pkt1 = pkt1; + pkt->pkt2 = pkt2; + pkt->pSrc = (u32)op->src_phys; + pkt->pDst = (u32)op->dst_phys; + pkt->size = op->len; + pkt->pPayload = chan == CIPHER_CHAN ? + (u32)op->cipher.key_phys : (u32)op->hash.digest_phys; + pkt->stat = 0; + + pkt_phys = dma_map_single(sdcp->dev, pkt, sizeof(*pkt), + DMA_BIDIRECTIONAL); + if (dma_mapping_error(sdcp->dev, pkt_phys)) { + dev_err(sdcp->dev, "Unable to map packet descriptor\n"); + return; + } + + /* submit the work */ + mutex_lock(mutex); + + __raw_writel(-1, REGS_DCP_BASE + HW_DCP_CHnSTAT_CLR(chan)); + + /* Load the work packet pointer and bump the channel semaphore */ + __raw_writel((u32)pkt_phys, REGS_DCP_BASE + HW_DCP_CHnCMDPTR(chan)); + + /* XXX wake from interrupt instead of looping */ + timeout = jiffies + msecs_to_jiffies(1000); + + sdcp->wait[chan] = 0; + __raw_writel(BF(1, DCP_CHnSEMA_INCREMENT), REGS_DCP_BASE + HW_DCP_CHnSEMA(chan)); + while (time_before(jiffies, timeout) && sdcp->wait[chan] == 0) + cpu_relax(); + + if (!time_before(jiffies, timeout)) { + dev_err(sdcp->dev, "Timeout while waiting STAT 0x%08x\n", + __raw_readl(REGS_DCP_BASE + HW_DCP_STAT)); + goto out; + } + + stat = __raw_readl(REGS_DCP_BASE + HW_DCP_CHnSTAT(chan)); + if ((stat & 0xff) != 0) + dev_err(sdcp->dev, "Channel stat error 0x%02x\n", + __raw_readl(REGS_DCP_BASE + HW_DCP_CHnSTAT(chan)) & 0xff); +out: + mutex_unlock(mutex); + + dma_unmap_single(sdcp->dev, pkt_phys, sizeof(*pkt), DMA_TO_DEVICE); +} + +static int dcp_aes_setkey_cip(struct crypto_tfm *tfm, const u8 *key, + unsigned int len) +{ + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + unsigned int ret; + + op->cipher.keylen = len; + + if (len == AES_KEYSIZE_128) { + memcpy(op->cipher.key, key, len); + return 0; + } + + if (len != AES_KEYSIZE_192 && len != AES_KEYSIZE_256) { + /* not supported at all */ + tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; + return -EINVAL; + } + + /* + * The requested key size is not supported by HW, do a fallback + */ + op->fallback.blk->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; + op->fallback.blk->base.crt_flags |= (tfm->crt_flags & + CRYPTO_TFM_REQ_MASK); + + ret = crypto_cipher_setkey(op->fallback.cip, key, len); + if (ret) { + tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; + tfm->crt_flags |= (op->fallback.blk->base.crt_flags & + CRYPTO_TFM_RES_MASK); + } + return ret; +} + +static void dcp_aes_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) { + crypto_cipher_encrypt_one(op->fallback.cip, out, in); + return; + } + + op->src = (void *) in; + op->dst = (void *) out; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_ENC | STMP3XXX_DCP_ECB; + op->len = AES_KEYSIZE_128; + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, (void *)in, AES_KEYSIZE_128, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dev_err(sdcp->dev, "Unable to map source\n"); + return; + } + + op->dst_phys = dma_map_single(sdcp->dev, out, AES_KEYSIZE_128, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dev_err(sdcp->dev, "Unable to map dest\n"); + goto err_unmap_src; + } + + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128, DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + goto err_unmap_dst; + } + + /* perform the operation */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, AES_KEYSIZE_128, + DMA_TO_DEVICE); +err_unmap_dst: + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, DMA_FROM_DEVICE); +err_unmap_src: + dma_unmap_single(sdcp->dev, op->src_phys, op->len, DMA_TO_DEVICE); +} + +static void dcp_aes_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) { + crypto_cipher_decrypt_one(op->fallback.cip, out, in); + return; + } + + op->src = (void *) in; + op->dst = (void *) out; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_DEC | STMP3XXX_DCP_ECB; + op->len = AES_KEYSIZE_128; + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, (void *)in, AES_KEYSIZE_128, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dev_err(sdcp->dev, "Unable to map source\n"); + return; + } + + op->dst_phys = dma_map_single(sdcp->dev, out, AES_KEYSIZE_128, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dev_err(sdcp->dev, "Unable to map dest\n"); + goto err_unmap_src; + } + + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128, DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + goto err_unmap_dst; + } + + /* perform the operation */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, AES_KEYSIZE_128, + DMA_TO_DEVICE); +err_unmap_dst: + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, DMA_FROM_DEVICE); +err_unmap_src: + dma_unmap_single(sdcp->dev, op->src_phys, op->len, DMA_TO_DEVICE); +} + +static int fallback_init_cip(struct crypto_tfm *tfm) +{ + const char *name = tfm->__crt_alg->cra_name; + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + op->fallback.cip = crypto_alloc_cipher(name, 0, + CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK); + + if (IS_ERR(op->fallback.cip)) { + printk(KERN_ERR "Error allocating fallback algo %s\n", name); + return PTR_ERR(op->fallback.cip); + } + + return 0; +} + +static void fallback_exit_cip(struct crypto_tfm *tfm) +{ + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + crypto_free_cipher(op->fallback.cip); + op->fallback.cip = NULL; +} + +static struct crypto_alg dcp_aes_alg = { + .cra_name = "aes", + .cra_driver_name = "dcp-aes", + .cra_priority = 300, + .cra_alignmask = 15, + .cra_flags = CRYPTO_ALG_TYPE_CIPHER | + CRYPTO_ALG_NEED_FALLBACK, + .cra_init = fallback_init_cip, + .cra_exit = fallback_exit_cip, + .cra_blocksize = AES_KEYSIZE_128, + .cra_ctxsize = sizeof(struct stmp3xxx_dcp_op), + .cra_module = THIS_MODULE, + .cra_list = LIST_HEAD_INIT(dcp_aes_alg.cra_list), + .cra_u = { + .cipher = { + .cia_min_keysize = AES_MIN_KEY_SIZE, + .cia_max_keysize = AES_MAX_KEY_SIZE, + .cia_setkey = dcp_aes_setkey_cip, + .cia_encrypt = dcp_aes_encrypt, + .cia_decrypt = dcp_aes_decrypt + } + } +}; + +static int dcp_aes_setkey_blk(struct crypto_tfm *tfm, const u8 *key, + unsigned int len) +{ + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + unsigned int ret; + + op->cipher.keylen = len; + + if (len == AES_KEYSIZE_128) { + memcpy(op->cipher.key, key, len); + return 0; + } + + if (len != AES_KEYSIZE_192 && len != AES_KEYSIZE_256) { + /* not supported at all */ + tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; + return -EINVAL; + } + + /* + * The requested key size is not supported by HW, do a fallback + */ + op->fallback.blk->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; + op->fallback.blk->base.crt_flags |= (tfm->crt_flags & + CRYPTO_TFM_REQ_MASK); + + ret = crypto_blkcipher_setkey(op->fallback.blk, key, len); + if (ret) { + tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK; + tfm->crt_flags |= (op->fallback.blk->base.crt_flags & + CRYPTO_TFM_RES_MASK); + } + return ret; +} + +static int fallback_blk_dec(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + unsigned int ret; + struct crypto_blkcipher *tfm; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + + tfm = desc->tfm; + desc->tfm = op->fallback.blk; + + ret = crypto_blkcipher_decrypt_iv(desc, dst, src, nbytes); + + desc->tfm = tfm; + return ret; +} + +static int fallback_blk_enc(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + unsigned int ret; + struct crypto_blkcipher *tfm; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + + tfm = desc->tfm; + desc->tfm = op->fallback.blk; + + ret = crypto_blkcipher_encrypt_iv(desc, dst, src, nbytes); + + desc->tfm = tfm; + return ret; +} + +static int fallback_init_blk(struct crypto_tfm *tfm) +{ + const char *name = tfm->__crt_alg->cra_name; + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + op->fallback.blk = crypto_alloc_blkcipher(name, 0, + CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK); + + if (IS_ERR(op->fallback.blk)) { + printk(KERN_ERR "Error allocating fallback algo %s\n", name); + return PTR_ERR(op->fallback.blk); + } + + return 0; +} + +static void fallback_exit_blk(struct crypto_tfm *tfm) +{ + struct stmp3xxx_dcp_op *op = crypto_tfm_ctx(tfm); + + crypto_free_blkcipher(op->fallback.blk); + op->fallback.blk = NULL; +} + +static int +dcp_aes_ecb_decrypt(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + struct blkcipher_walk walk; + int err; + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) + return fallback_blk_dec(desc, dst, src, nbytes); + + blkcipher_walk_init(&walk, dst, src, nbytes); + + /* key needs to be mapped only once */ + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128, DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + return -ENOMEM; + } + + err = blkcipher_walk_virt(desc, &walk); + while (err == 0 && (nbytes = walk.nbytes) > 0) { + op->src = walk.src.virt.addr, + op->dst = walk.dst.virt.addr; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_DEC | + STMP3XXX_DCP_ECB; + op->len = nbytes - (nbytes % AES_KEYSIZE_128); + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, op->src, op->len, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dev_err(sdcp->dev, "Unable to map source\n"); + err = -ENOMEM; + break; + } + + op->dst_phys = dma_map_single(sdcp->dev, op->dst, op->len, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + dev_err(sdcp->dev, "Unable to map dest\n"); + err = -ENOMEM; + break; + } + + /* perform! */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, + DMA_FROM_DEVICE); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + + nbytes -= op->len; + err = blkcipher_walk_done(desc, &walk, nbytes); + } + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, AES_KEYSIZE_128, + DMA_TO_DEVICE); + + return err; +} + +static int +dcp_aes_ecb_encrypt(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + struct blkcipher_walk walk; + int err, ret; + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) + return fallback_blk_enc(desc, dst, src, nbytes); + + blkcipher_walk_init(&walk, dst, src, nbytes); + + /* key needs to be mapped only once */ + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128, DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + return -ENOMEM; + } + + err = blkcipher_walk_virt(desc, &walk); + + err = 0; + while (err == 0 && (nbytes = walk.nbytes) > 0) { + op->src = walk.src.virt.addr, + op->dst = walk.dst.virt.addr; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_ENC | + STMP3XXX_DCP_ECB; + op->len = nbytes - (nbytes % AES_KEYSIZE_128); + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, op->src, op->len, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dev_err(sdcp->dev, "Unable to map source\n"); + err = -ENOMEM; + break; + } + + op->dst_phys = dma_map_single(sdcp->dev, op->dst, op->len, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + dev_err(sdcp->dev, "Unable to map dest\n"); + err = -ENOMEM; + break; + } + + /* perform! */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, + DMA_FROM_DEVICE); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + + nbytes -= op->len; + ret = blkcipher_walk_done(desc, &walk, nbytes); + } + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, AES_KEYSIZE_128, + DMA_TO_DEVICE); + + return err; +} + + +static struct crypto_alg dcp_aes_ecb_alg = { + .cra_name = "ecb(aes)", + .cra_driver_name = "dcp-ecb-aes", + .cra_priority = 400, + .cra_alignmask = 15, + .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER | + CRYPTO_ALG_NEED_FALLBACK, + .cra_init = fallback_init_blk, + .cra_exit = fallback_exit_blk, + .cra_blocksize = AES_KEYSIZE_128, + .cra_ctxsize = sizeof(struct stmp3xxx_dcp_op), + .cra_type = &crypto_blkcipher_type, + .cra_module = THIS_MODULE, + .cra_list = LIST_HEAD_INIT(dcp_aes_ecb_alg.cra_list), + .cra_u = { + .blkcipher = { + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = dcp_aes_setkey_blk, + .encrypt = dcp_aes_ecb_encrypt, + .decrypt = dcp_aes_ecb_decrypt + } + } +}; + +static int +dcp_aes_cbc_decrypt(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + struct blkcipher_walk walk; + int err, blockno; + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) + return fallback_blk_dec(desc, dst, src, nbytes); + + blkcipher_walk_init(&walk, dst, src, nbytes); + + blockno = 0; + err = blkcipher_walk_virt(desc, &walk); + while (err == 0 && (nbytes = walk.nbytes) > 0) { + op->src = walk.src.virt.addr, + op->dst = walk.dst.virt.addr; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_DEC | + STMP3XXX_DCP_CBC; + if (blockno == 0) { + op->flags |= STMP3XXX_DCP_CBC_INIT; + memcpy(op->cipher.key + AES_KEYSIZE_128, walk.iv, + AES_KEYSIZE_128); + } + op->len = nbytes - (nbytes % AES_KEYSIZE_128); + + /* key (+iv) needs to be mapped only once */ + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + err = -ENOMEM; + break; + } + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, op->src, op->len, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dev_err(sdcp->dev, "Unable to map source\n"); + err = -ENOMEM; + break; + } + + op->dst_phys = dma_map_single(sdcp->dev, op->dst, op->len, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + dev_err(sdcp->dev, "Unable to map dest\n"); + err = -ENOMEM; + break; + } + + /* perform! */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, + DMA_FROM_DEVICE); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + + nbytes -= op->len; + err = blkcipher_walk_done(desc, &walk, nbytes); + + blockno++; + } + + return err; +} + +static int +dcp_aes_cbc_encrypt(struct blkcipher_desc *desc, + struct scatterlist *dst, struct scatterlist *src, + unsigned int nbytes) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_op *op = crypto_blkcipher_ctx(desc->tfm); + struct blkcipher_walk walk; + int err, ret, blockno; + + if (unlikely(op->cipher.keylen != AES_KEYSIZE_128)) + return fallback_blk_enc(desc, dst, src, nbytes); + + blkcipher_walk_init(&walk, dst, src, nbytes); + + blockno = 0; + + err = blkcipher_walk_virt(desc, &walk); + while (err == 0 && (nbytes = walk.nbytes) > 0) { + op->src = walk.src.virt.addr, + op->dst = walk.dst.virt.addr; + op->flags = STMP3XXX_DCP_AES | STMP3XXX_DCP_ENC | + STMP3XXX_DCP_CBC; + if (blockno == 0) { + op->flags |= STMP3XXX_DCP_CBC_INIT; + memcpy(op->cipher.key + AES_KEYSIZE_128, walk.iv, + AES_KEYSIZE_128); + } + op->len = nbytes - (nbytes % AES_KEYSIZE_128); + + /* key needs to be mapped only once */ + op->cipher.key_phys = dma_map_single(sdcp->dev, op->cipher.key, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + if (dma_mapping_error(sdcp->dev, op->cipher.key_phys)) { + dev_err(sdcp->dev, "Unable to map key\n"); + return -ENOMEM; + } + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, op->src, op->len, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dev_err(sdcp->dev, "Unable to map source\n"); + err = -ENOMEM; + break; + } + + op->dst_phys = dma_map_single(sdcp->dev, op->dst, op->len, + DMA_FROM_DEVICE); + if (dma_mapping_error(sdcp->dev, op->dst_phys)) { + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + dev_err(sdcp->dev, "Unable to map dest\n"); + err = -ENOMEM; + break; + } + + /* perform! */ + dcp_perform_op(op); + + dma_unmap_single(sdcp->dev, op->cipher.key_phys, + AES_KEYSIZE_128 * 2, DMA_BIDIRECTIONAL); + dma_unmap_single(sdcp->dev, op->dst_phys, op->len, + DMA_FROM_DEVICE); + dma_unmap_single(sdcp->dev, op->src_phys, op->len, + DMA_TO_DEVICE); + + nbytes -= op->len; + ret = blkcipher_walk_done(desc, &walk, nbytes); + + blockno++; + } + + return err; +} + +static struct crypto_alg dcp_aes_cbc_alg = { + .cra_name = "cbc(aes)", + .cra_driver_name = "dcp-cbc-aes", + .cra_priority = 400, + .cra_alignmask = 15, + .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER | + CRYPTO_ALG_NEED_FALLBACK, + .cra_init = fallback_init_blk, + .cra_exit = fallback_exit_blk, + .cra_blocksize = AES_KEYSIZE_128, + .cra_ctxsize = sizeof(struct stmp3xxx_dcp_op), + .cra_type = &crypto_blkcipher_type, + .cra_module = THIS_MODULE, + .cra_list = LIST_HEAD_INIT(dcp_aes_cbc_alg.cra_list), + .cra_u = { + .blkcipher = { + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = dcp_aes_setkey_blk, + .encrypt = dcp_aes_cbc_encrypt, + .decrypt = dcp_aes_cbc_decrypt, + .ivsize = AES_KEYSIZE_128, + } + } +}; + +#ifndef DISABLE_SHA1 + +static void dcp_perform_hash_op(struct stmp3xxx_dcp_hash_op *op) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct mutex *mutex; + int chan; + struct stmp3xxx_dcp_hw_packet *pkt; + unsigned long timeout; + u32 stat; + int size1, descno; + + BUG_ON((op->flags & STMP3XXX_DCP_MODE_MASK) != STMP3XXX_DCP_SHA1); + + chan = HASH_CHAN; + + switch (op->flags & (STMP3XXX_DCP_INIT | STMP3XXX_DCP_UPDATE | + STMP3XXX_DCP_FINAL)) { + + case STMP3XXX_DCP_INIT | STMP3XXX_DCP_UPDATE: + + BUG_ON(op->len <= 1); + + pkt = &op->hw->pkt[0]; + pkt->pNext = 0; + pkt->pkt1 = BM_DCP_PACKET1_HASH_INIT | + BM_DCP_PACKET1_DECR_SEMAPHORE | + BM_DCP_PACKET1_INTERRUPT | + BM_DCP_PACKET1_ENABLE_HASH; + pkt->pkt2 = BF(BV_DCP_PACKET2_HASH_SELECT__SHA1, + DCP_PACKET2_HASH_SELECT); + pkt->pSrc = (u32)op->src_phys; + pkt->pDst = 0; + pkt->size = op->len - 1; + pkt->pPayload = 0; + pkt->stat = 0; + + /* save last byte */ + op->hw->rembuf[1] = ((u8 *)op->src)[op->len - 1]; + + descno = 1; + break; + + case STMP3XXX_DCP_UPDATE: + + BUG_ON(op->len <= 1); + + op->hw->rembuf[0] = op->hw->rembuf[1]; + + pkt = &op->hw->pkt[0]; + pkt->pNext = 0; + pkt->pkt1 = BM_DCP_PACKET1_CHAIN_CONTIGUOUS | + BM_DCP_PACKET1_ENABLE_HASH; + pkt->pkt2 = BF(BV_DCP_PACKET2_HASH_SELECT__SHA1, + DCP_PACKET2_HASH_SELECT); + pkt->pSrc = (u32)op->hw_phys + offsetof( + struct stmp3xxx_dcp_hash_coherent_block, rembuf); + pkt->pDst = 0; + pkt->size = 1; + pkt->pPayload = 0; + pkt->stat = 0; + + pkt = &op->hw->pkt[1]; + pkt->pNext = 0; + pkt->pkt1 = BM_DCP_PACKET1_DECR_SEMAPHORE | + BM_DCP_PACKET1_INTERRUPT | + BM_DCP_PACKET1_ENABLE_HASH; + pkt->pkt2 = BF(BV_DCP_PACKET2_HASH_SELECT__SHA1, + DCP_PACKET2_HASH_SELECT); + pkt->pSrc = (u32)op->src_phys; + pkt->pDst = 0; + pkt->size = op->len - 1; + pkt->pPayload = 0; + pkt->stat = 0; + + /* save last byte */ + op->hw->rembuf[1] = ((u8 *)op->src)[op->len - 1]; + + descno = 2; + + break; + + case STMP3XXX_DCP_FINAL: + + op->hw->rembuf[0] = op->hw->rembuf[1]; + + pkt = &op->hw->pkt[0]; + pkt->pNext = 0; + pkt->pkt1 = BM_DCP_PACKET1_HASH_TERM | + BM_DCP_PACKET1_DECR_SEMAPHORE | + BM_DCP_PACKET1_INTERRUPT | + BM_DCP_PACKET1_ENABLE_HASH; + pkt->pkt2 = BF(BV_DCP_PACKET2_HASH_SELECT__SHA1, + DCP_PACKET2_HASH_SELECT); + pkt->pSrc = (u32)op->hw_phys + offsetof( + struct stmp3xxx_dcp_hash_coherent_block, rembuf); + pkt->pDst = 0; + pkt->size = 1; + pkt->pPayload = (u32)op->hw_phys + offsetof( + struct stmp3xxx_dcp_hash_coherent_block, digest); + pkt->stat = 0; + + descno = 1; + + break; + + /* all others BUG */ + default: + BUG(); + return; + } + + mutex = &sdcp->op_mutex[chan]; + + /* submit the work */ + mutex_lock(mutex); + + __raw_writel(-1, REGS_DCP_BASE + HW_DCP_CHnSTAT_CLR(chan)); + + mb(); + /* Load the work packet pointer and bump the channel semaphore */ + __raw_writel(chan, (u32)op->hw_phys + + offsetof(struct stmp3xxx_dcp_hash_coherent_block, pkt[0]), REGS_DCP_BASE + HW_DCP_CHnCMDPTR); + + /* XXX wake from interrupt instead of looping */ + timeout = jiffies + msecs_to_jiffies(1000); + + __raw_writel(chan, BF(descno, DCP_CHnSEMA_INCREMENT), REGS_DCP_BASE + HW_DCP_CHnSEMA); + + while (time_before(jiffies, timeout) && + ((__raw_readl(chanREGS_DCP_BASE + HW_DCP_CHnSEMA) >> 16) & 0xff) != 0) + cpu_relax(); + + if (!time_before(jiffies, timeout)) { + dev_err(sdcp->dev, "Timeout while waiting STAT 0x%08x\n", + __raw_readl(REGS_DCP_BASE + HW_DCP_STAT)); + goto out; + } + + stat = __raw_readl(REGS_DCP_BASE + HW_DCP_CHnSTAT(chan)); + if ((stat & 0xff) != 0) + dev_err(sdcp->dev, "Channel stat error 0x%02x\n", + __raw_readl(REGS_DCP_BASE + HW_DCP_CHnSTAT(chan)) & 0xff); + +out: + mutex_unlock(mutex); + + mdelay(500); +} + +static int fallback_init_hash(struct crypto_tfm *tfm) +{ + const char *name = tfm->__crt_alg->cra_name; + struct stmp3xxx_dcp_hash_op *op = crypto_tfm_ctx(tfm); + struct stmp3xxx_dcp *sdcp = global_sdcp; + + op->fallback.hash = crypto_alloc_hash(name, 0, + CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK); + if (IS_ERR(op->fallback.hash)) { + printk(KERN_ERR "Error allocating fallback algo %s\n", name); + return PTR_ERR(op->fallback.hash); + } + + op->hw = dma_alloc_coherent(sdcp->dev, sizeof(*op->hw), &op->hw_phys, + GFP_KERNEL); + if (op->hw == NULL) { + printk(KERN_ERR "Error allocating coherent block for %s\n", + name); + crypto_free_hash(op->fallback.hash); + op->fallback.hash = NULL; + return -ENOMEM; + } + memset(op->hw, 0, sizeof(*op->hw)); + + return 0; +} + +static void fallback_exit_hash(struct crypto_tfm *tfm) +{ + struct stmp3xxx_dcp_hash_op *op = crypto_tfm_ctx(tfm); + struct stmp3xxx_dcp *sdcp = global_sdcp; + + dma_free_coherent(sdcp->dev, sizeof(*op->hw), op->hw, op->hw_phys); + crypto_free_hash(op->fallback.hash); + op->fallback.hash = NULL; +} + +static void dcp_sha1_init(struct crypto_tfm *tfm) +{ + struct stmp3xxx_dcp_hash_op *op = crypto_tfm_ctx(tfm); + + op->hash.init = 1; + memset(op->hw->rembuf, 0, sizeof(op->hw->rembuf)); + memset(op->hw->digest, 0, sizeof(op->hw->digest)); +} + +static void dcp_sha1_update(struct crypto_tfm *tfm, + const uint8_t *data, unsigned int length) +{ + struct stmp3xxx_dcp *sdcp = global_sdcp; + struct stmp3xxx_dcp_hash_op *op = crypto_tfm_ctx(tfm); + + op->src = (void *)data; + op->dst = NULL; + op->flags = STMP3XXX_DCP_SHA1 | STMP3XXX_DCP_UPDATE; + if (op->hash.init) { + op->hash.init = 0; + op->flags |= STMP3XXX_DCP_INIT; + } + op->len = length; + + /* map the data */ + op->src_phys = dma_map_single(sdcp->dev, op->src, op->len, + DMA_TO_DEVICE); + if (dma_mapping_error(sdcp->dev, op->src_phys)) { + dev_err(sdcp->dev, "Unable to map source\n"); + return; + } + op->dst_phys = 0; + + /* perform! */ + dcp_perform_hash_op(op); + + dma_unmap_single(sdcp->dev, op->src_phys, op->len, DMA_TO_DEVICE); +} + +static void dcp_sha1_final(struct crypto_tfm *tfm, uint8_t *out) +{ + struct stmp3xxx_dcp_hash_op *op = crypto_tfm_ctx(tfm); + int i; + const uint8_t *digest; + + op->src = NULL; + op->dst = NULL; + op->flags = STMP3XXX_DCP_SHA1 | STMP3XXX_DCP_FINAL; + op->len = 0; + + /* perform! */ + dcp_perform_hash_op(op); + + /* hardware reverses the digest (for some unexplicable reason) */ + digest = op->hw->digest + SHA1_DIGEST_SIZE; + for (i = 0; i < SHA1_DIGEST_SIZE; i++) + *out++ = *--digest; + memcpy(out, op->hw->digest, SHA1_DIGEST_SIZE); +} + +static struct crypto_alg dcp_sha1_alg = { + .cra_name = "sha1", + .cra_driver_name = "dcp-sha1", + .cra_priority = 300, + .cra_flags = CRYPTO_ALG_TYPE_DIGEST | + CRYPTO_ALG_NEED_FALLBACK, + .cra_blocksize = SHA1_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stmp3xxx_dcp_hash_op), + .cra_module = THIS_MODULE, + .cra_list = LIST_HEAD_INIT(dcp_sha1_alg.cra_list), + .cra_init = fallback_init_hash, + .cra_exit = fallback_exit_hash, + .cra_u = { + .digest = { + .dia_digestsize = SHA1_DIGEST_SIZE, + .dia_init = dcp_sha1_init, + .dia_update = dcp_sha1_update, + .dia_final = dcp_sha1_final, + } + } +}; +#endif + +static irqreturn_t dcp_common_irq(int irq, void *context) +{ + struct stmp3xxx_dcp *sdcp = context; + u32 msk; + + /* check */ + msk = __raw_readl(REGS_DCP_BASE + HW_DCP_STAT) & BF(0x0f, DCP_STAT_IRQ); + if (msk == 0) + return IRQ_NONE; + + /* clear this channel */ + __raw_writel(msk, REGS_DCP_BASE + HW_DCP_STAT_CLR); + if (msk & BF(0x01, DCP_STAT_IRQ)) + sdcp->wait[0]++; + if (msk & BF(0x02, DCP_STAT_IRQ)) + sdcp->wait[1]++; + if (msk & BF(0x04, DCP_STAT_IRQ)) + sdcp->wait[2]++; + if (msk & BF(0x08, DCP_STAT_IRQ)) + sdcp->wait[3]++; + return IRQ_HANDLED; +} + +static irqreturn_t dcp_vmi_irq(int irq, void *context) +{ + return dcp_common_irq(irq, context); +} + +static irqreturn_t dcp_irq(int irq, void *context) +{ + return dcp_common_irq(irq, context); +} + +static int stmp3xxx_dcp_probe(struct platform_device *pdev) +{ + struct stmp3xxx_dcp *sdcp = NULL; + struct resource *r; + int i, ret; + + if (global_sdcp != NULL) { + dev_err(&pdev->dev, "Only one instance allowed\n"); + ret = -ENODEV; + goto err; + } + + /* allocate memory */ + sdcp = kzalloc(sizeof(*sdcp), GFP_KERNEL); + if (sdcp == NULL) { + dev_err(&pdev->dev, "Failed to allocate structure\n"); + ret = -ENOMEM; + goto err; + } + + sdcp->dev = &pdev->dev; + spin_lock_init(&sdcp->lock); + + for (i = 0; i < STMP3XXX_DCP_NUM_CHANNELS; i++) { + mutex_init(&sdcp->op_mutex[i]); + init_completion(&sdcp->op_wait[i]); + } + + platform_set_drvdata(pdev, sdcp); + + /* Soft reset and remove the clock gate */ + __raw_writel(BM_DCP_CTRL_SFTRST, REGS_DCP_BASE + HW_DCP_CTRL_SET); + + /* At 24Mhz, it takes no more than 4 clocks (160 ns) Maximum for + * the part to reset, reading the register twice should + * be sufficient to get 4 clks delay. + */ + __raw_readl(REGS_DCP_BASE + HW_DCP_CTRL); + __raw_readl(REGS_DCP_BASE + HW_DCP_CTRL); + + __raw_writel(BM_DCP_CTRL_SFTRST | BM_DCP_CTRL_CLKGATE, + REGS_DCP_BASE + HW_DCP_CTRL_CLR); + + /* Initialize control registers */ + __raw_writel(STMP3XXX_DCP_CTRL_INIT, REGS_DCP_BASE + HW_DCP_CTRL); + __raw_writel(STMP3XXX_DCP_CHANNELCTRL_INIT, REGS_DCP_BASE + HW_DCP_CHANNELCTRL); + + /* We do not enable context switching. Give the context + * buffer pointer an illegal address so if context switching is + * inadvertantly enabled, the dcp will return an error instead of + * trashing good memory. The dcp dma cannot access rom, so any rom + * address will do. + */ + __raw_writel(0xFFFF0000, REGS_DCP_BASE + HW_DCP_CONTEXT); + + for (i = 0; i < STMP3XXX_DCP_NUM_CHANNELS; i++) + __raw_writel(-1, REGS_DCP_BASE + HW_DCP_CHnSTAT_CLR(i)); + __raw_writel(-1, REGS_DCP_BASE + HW_DCP_STAT_CLR); + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!r) { + dev_err(&pdev->dev, "can't get IRQ resource (0)\n"); + ret = -EIO; + goto err_unregister_sha1; + } + sdcp->dcp_vmi_irq = r->start; + ret = request_irq(sdcp->dcp_vmi_irq, dcp_vmi_irq, 0, "stmp3xxx-dcp", + sdcp); + if (ret != 0) { + dev_err(&pdev->dev, "can't request_irq (0)\n"); + goto err_unregister_sha1; + } + + r = platform_get_resource(pdev, IORESOURCE_IRQ, 1); + if (!r) { + dev_err(&pdev->dev, "can't get IRQ resource (1)\n"); + ret = -EIO; + goto err_free_irq0; + } + sdcp->dcp_irq = r->start; + ret = request_irq(sdcp->dcp_irq, dcp_irq, 0, "stmp3xxx-dcp", sdcp); + if (ret != 0) { + dev_err(&pdev->dev, "can't request_irq (1)\n"); + goto err_free_irq0; + } + + global_sdcp = sdcp; + + ret = crypto_register_alg(&dcp_aes_alg); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to register aes crypto\n"); + goto err_kfree; + } + + ret = crypto_register_alg(&dcp_aes_ecb_alg); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to register aes ecb crypto\n"); + goto err_unregister_aes; + } + + ret = crypto_register_alg(&dcp_aes_cbc_alg); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to register aes cbc crypto\n"); + goto err_unregister_aes_ecb; + } + +#ifndef DISABLE_SHA1 + ret = crypto_register_alg(&dcp_sha1_alg); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to register aes cbc crypto\n"); + goto err_unregister_aes_cbc; + } +#endif + + dev_notice(&pdev->dev, "DCP crypto enabled.!\n"); + return 0; + +err_free_irq0: + free_irq(sdcp->dcp_vmi_irq, sdcp); +err_unregister_sha1: +#ifndef DISABLE_SHA1 + crypto_unregister_alg(&dcp_sha1_alg); +err_unregister_aes_cbc: +#endif + crypto_unregister_alg(&dcp_aes_cbc_alg); +err_unregister_aes_ecb: + crypto_unregister_alg(&dcp_aes_ecb_alg); +err_unregister_aes: + crypto_unregister_alg(&dcp_aes_alg); +err_kfree: + kfree(sdcp); +err: + + return ret; +} + +static int stmp3xxx_dcp_remove(struct platform_device *pdev) +{ + struct stmp3xxx_dcp *sdcp; + + sdcp = platform_get_drvdata(pdev); + platform_set_drvdata(pdev, NULL); + + free_irq(sdcp->dcp_irq, sdcp); + free_irq(sdcp->dcp_vmi_irq, sdcp); +#ifndef DISABLE_SHA1 + crypto_unregister_alg(&dcp_sha1_alg); +#endif + crypto_unregister_alg(&dcp_aes_cbc_alg); + crypto_unregister_alg(&dcp_aes_ecb_alg); + crypto_unregister_alg(&dcp_aes_alg); + kfree(sdcp); + global_sdcp = NULL; + + return 0; +} + + +#ifdef CONFIG_PM +static int stmp3xxx_dcp_suspend(struct platform_device *pdev, + pm_message_t state) +{ + return 0; +} + +static int stmp3xxx_dcp_resume(struct platform_device *pdev) +{ + return 0; +} +#else +#define stmp3xxx_dcp_suspend NULL +#define stmp3xxx_dcp_resume NULL +#endif + +static struct platform_driver stmp3xxx_dcp_driver = { + .probe = stmp3xxx_dcp_probe, + .remove = stmp3xxx_dcp_remove, + .suspend = stmp3xxx_dcp_suspend, + .resume = stmp3xxx_dcp_resume, + .driver = { + .name = "stmp3xxx-dcp", + .owner = THIS_MODULE, + }, +}; + +static int __init +stmp3xxx_dcp_init(void) +{ + return platform_driver_register(&stmp3xxx_dcp_driver); +} + +static void __exit +stmp3xxx_dcp_exit(void) +{ + platform_driver_unregister(&stmp3xxx_dcp_driver); +} + +MODULE_AUTHOR("Pantelis Antoniou "); +MODULE_DESCRIPTION("STMP3XXX DCP Crypto Driver"); +MODULE_LICENSE("GPL"); + +module_init(stmp3xxx_dcp_init); +module_exit(stmp3xxx_dcp_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/drm_irq.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/drm_irq.c @@ -402,15 +402,21 @@ spin_lock_irqsave(&dev->vbl_lock, irqflags); /* Going from 0->1 means we have to enable interrupts again */ - if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1 && - !dev->vblank_enabled[crtc]) { - ret = dev->driver->enable_vblank(dev, crtc); - DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n", crtc, ret); - if (ret) + if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1) { + if (!dev->vblank_enabled[crtc]) { + ret = dev->driver->enable_vblank(dev, crtc); + DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n", crtc, ret); + if (ret) + atomic_dec(&dev->vblank_refcount[crtc]); + else { + dev->vblank_enabled[crtc] = 1; + drm_update_vblank_count(dev, crtc); + } + } + } else { + if (!dev->vblank_enabled[crtc]) { atomic_dec(&dev->vblank_refcount[crtc]); - else { - dev->vblank_enabled[crtc] = 1; - drm_update_vblank_count(dev, crtc); + ret = -EINVAL; } } spin_unlock_irqrestore(&dev->vbl_lock, irqflags); @@ -437,6 +443,18 @@ } EXPORT_SYMBOL(drm_vblank_put); +void drm_vblank_off(struct drm_device *dev, int crtc) +{ + unsigned long irqflags; + + spin_lock_irqsave(&dev->vbl_lock, irqflags); + DRM_WAKEUP(&dev->vbl_queue[crtc]); + dev->vblank_enabled[crtc] = 0; + dev->last_vblank[crtc] = dev->driver->get_vblank_counter(dev, crtc); + spin_unlock_irqrestore(&dev->vbl_lock, irqflags); +} +EXPORT_SYMBOL(drm_vblank_off); + /** * drm_vblank_pre_modeset - account for vblanks across mode sets * @dev: DRM device @@ -495,7 +513,8 @@ struct drm_file *file_priv) { struct drm_modeset_ctl *modeset = data; - int crtc, ret = 0; + int ret = 0; + unsigned int crtc; /* If drm_vblank_init() hasn't been called yet, just no-op */ if (!dev->num_crtcs) --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/drm_drv.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/drm_drv.c @@ -470,7 +470,9 @@ retcode = -EFAULT; goto err_i1; } - } + } else + memset(kdata, 0, _IOC_SIZE(cmd)); + retcode = func(dev, kdata, file_priv); if (cmd & IOC_OUT) { --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/drm_edid.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/drm_edid.c @@ -333,6 +333,12 @@ mode->vsync_end = mode->vsync_start + vsync_pulse_width; mode->vtotal = mode->vdisplay + vblank; + /* Some EDIDs have bogus h/vtotal values */ + if (mode->hsync_end > mode->htotal) + mode->htotal = mode->hsync_end + 1; + if (mode->vsync_end > mode->vtotal) + mode->vtotal = mode->vsync_end + 1; + drm_mode_set_name(mode); if (pt->misc & DRM_EDID_PT_INTERLACED) --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/Kconfig @@ -82,6 +82,7 @@ config DRM_I915 tristate "i915 driver" depends on AGP_INTEL + select SHMEM select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_gem_tiling.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -234,7 +234,13 @@ uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; bool need_disable; - if (!IS_I9XX(dev)) { + if (IS_IGDNG(dev)) { + /* On IGDNG whatever DRAM config, GPU always do + * same swizzling setup. + */ + swizzle_x = I915_BIT_6_SWIZZLE_9_10; + swizzle_y = I915_BIT_6_SWIZZLE_9; + } else if (!IS_I9XX(dev)) { /* As far as we know, the 865 doesn't have these bit 6 * swizzling issues. */ @@ -317,13 +323,6 @@ } } - /* FIXME: check with memory config on IGDNG */ - if (IS_IGDNG(dev)) { - DRM_ERROR("disable tiling on IGDNG...\n"); - swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; - swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; - } - dev_priv->mm.bit_6_swizzle_x = swizzle_x; dev_priv->mm.bit_6_swizzle_y = swizzle_y; } --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_irq.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_irq.c @@ -156,6 +156,20 @@ } /** + * intel_enable_asle - enable ASLE interrupt for OpRegion + */ +void intel_enable_asle (struct drm_device *dev) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + + if (IS_IGDNG(dev)) + igdng_enable_display_irq(dev_priv, DE_GSE); + else + i915_enable_pipestat(dev_priv, 1, + I915_LEGACY_BLC_EVENT_ENABLE); +} + +/** * i915_pipe_enabled - check if a pipe is enabled * @dev: DRM device * @pipe: pipe to check @@ -253,40 +267,54 @@ { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; int ret = IRQ_NONE; - u32 de_iir, gt_iir; - u32 new_de_iir, new_gt_iir; + u32 de_iir, gt_iir, de_ier, pch_iir; struct drm_i915_master_private *master_priv; + /* disable master interrupt before clearing iir */ + de_ier = I915_READ(DEIER); + I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL); + (void)I915_READ(DEIER); + de_iir = I915_READ(DEIIR); gt_iir = I915_READ(GTIIR); + pch_iir = I915_READ(SDEIIR); - for (;;) { - if (de_iir == 0 && gt_iir == 0) - break; + if (de_iir == 0 && gt_iir == 0 && pch_iir == 0) + goto done; - ret = IRQ_HANDLED; + ret = IRQ_HANDLED; - I915_WRITE(DEIIR, de_iir); - new_de_iir = I915_READ(DEIIR); - I915_WRITE(GTIIR, gt_iir); - new_gt_iir = I915_READ(GTIIR); + if (dev->primary->master) { + master_priv = dev->primary->master->driver_priv; + if (master_priv->sarea_priv) + master_priv->sarea_priv->last_dispatch = + READ_BREADCRUMB(dev_priv); + } - if (dev->primary->master) { - master_priv = dev->primary->master->driver_priv; - if (master_priv->sarea_priv) - master_priv->sarea_priv->last_dispatch = - READ_BREADCRUMB(dev_priv); - } + if (gt_iir & GT_USER_INTERRUPT) { + u32 seqno = i915_get_gem_seqno(dev); + dev_priv->mm.irq_gem_seqno = seqno; + DRM_WAKEUP(&dev_priv->irq_queue); + } - if (gt_iir & GT_USER_INTERRUPT) { - dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev); - DRM_WAKEUP(&dev_priv->irq_queue); - } + if (de_iir & DE_GSE) + ironlake_opregion_gse_intr(dev); - de_iir = new_de_iir; - gt_iir = new_gt_iir; + /* check event from PCH */ + if ((de_iir & DE_PCH_EVENT) && + (pch_iir & SDE_HOTPLUG_MASK)) { + queue_work(dev_priv->wq, &dev_priv->hotplug_work); } + /* should clear PCH hotplug event before clear CPU irq */ + I915_WRITE(SDEIIR, pch_iir); + I915_WRITE(GTIIR, gt_iir); + I915_WRITE(DEIIR, de_iir); + +done: + I915_WRITE(DEIER, de_ier); + (void)I915_READ(DEIER); + return ret; } @@ -877,14 +905,21 @@ I915_WRITE(GTIMR, 0xffffffff); I915_WRITE(GTIER, 0x0); (void) I915_READ(GTIER); + + /* south display irq */ + I915_WRITE(SDEIMR, 0xffffffff); + I915_WRITE(SDEIER, 0x0); + (void) I915_READ(SDEIER); } static int igdng_irq_postinstall(struct drm_device *dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; /* enable kind of interrupts always enabled */ - u32 display_mask = DE_MASTER_IRQ_CONTROL /*| DE_PCH_EVENT */; + u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT; u32 render_mask = GT_USER_INTERRUPT; + u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | + SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; dev_priv->irq_mask_reg = ~display_mask; dev_priv->de_irq_enable_reg = display_mask; @@ -904,6 +939,14 @@ I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg); (void) I915_READ(GTIER); + dev_priv->pch_irq_mask_reg = ~hotplug_mask; + dev_priv->pch_irq_enable_reg = hotplug_mask; + + I915_WRITE(SDEIIR, I915_READ(SDEIIR)); + I915_WRITE(SDEIMR, dev_priv->pch_irq_mask_reg); + I915_WRITE(SDEIER, dev_priv->pch_irq_enable_reg); + (void) I915_READ(SDEIER); + return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_fb.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_fb.c @@ -114,7 +114,7 @@ struct drm_framebuffer *fb = &intel_fb->base; int depth; - if (var->pixclock == -1 || !var->pixclock) + if (var->pixclock != 0) return -EINVAL; /* Need to resize the fb object !!! */ @@ -205,7 +205,7 @@ DRM_DEBUG("%d %d\n", var->xres, var->pixclock); - if (var->pixclock != -1) { + if (var->pixclock != 0) { DRM_ERROR("PIXEL CLOCK SET\n"); return -EINVAL; @@ -461,7 +461,7 @@ mutex_lock(&dev->struct_mutex); - ret = i915_gem_object_pin(fbo, PAGE_SIZE); + ret = i915_gem_object_pin(fbo, 64*1024); if (ret) { DRM_ERROR("failed to pin fb: %d\n", ret); goto out_unref; @@ -692,7 +692,7 @@ par->crtc_count = 1; if (new_fb) { - info->var.pixclock = -1; + info->var.pixclock = 0; if (register_framebuffer(info) < 0) return -EINVAL; } else @@ -846,7 +846,7 @@ par->crtc_count = crtc_count; if (new_fb) { - info->var.pixclock = -1; + info->var.pixclock = 0; if (register_framebuffer(info) < 0) return -EINVAL; } else --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_bios.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_bios.c @@ -217,6 +217,9 @@ if (IS_I85X(dev_priv->dev)) dev_priv->lvds_ssc_freq = general->ssc_freq ? 66 : 48; + else if (IS_IGDNG(dev_priv->dev)) + dev_priv->lvds_ssc_freq = + general->ssc_freq ? 100 : 120; else dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 96; --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_drv.h +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_drv.h @@ -188,6 +188,8 @@ u32 gt_irq_mask_reg; u32 gt_irq_enable_reg; u32 de_irq_enable_reg; + u32 pch_irq_mask_reg; + u32 pch_irq_enable_reg; u32 hotplug_supported_mask; struct work_struct hotplug_work; @@ -256,6 +258,13 @@ u32 saveVBLANK_A; u32 saveVSYNC_A; u32 saveBCLRPAT_A; + u32 saveTRANSACONF; + u32 saveTRANS_HTOTAL_A; + u32 saveTRANS_HBLANK_A; + u32 saveTRANS_HSYNC_A; + u32 saveTRANS_VTOTAL_A; + u32 saveTRANS_VBLANK_A; + u32 saveTRANS_VSYNC_A; u32 savePIPEASTAT; u32 saveDSPASTRIDE; u32 saveDSPASIZE; @@ -264,8 +273,11 @@ u32 saveDSPASURF; u32 saveDSPATILEOFF; u32 savePFIT_PGM_RATIOS; + u32 saveBLC_HIST_CTL; u32 saveBLC_PWM_CTL; u32 saveBLC_PWM_CTL2; + u32 saveBLC_CPU_PWM_CTL; + u32 saveBLC_CPU_PWM_CTL2; u32 saveFPB0; u32 saveFPB1; u32 saveDPLL_B; @@ -277,6 +289,13 @@ u32 saveVBLANK_B; u32 saveVSYNC_B; u32 saveBCLRPAT_B; + u32 saveTRANSBCONF; + u32 saveTRANS_HTOTAL_B; + u32 saveTRANS_HBLANK_B; + u32 saveTRANS_HSYNC_B; + u32 saveTRANS_VTOTAL_B; + u32 saveTRANS_VBLANK_B; + u32 saveTRANS_VSYNC_B; u32 savePIPEBSTAT; u32 saveDSPBSTRIDE; u32 saveDSPBSIZE; @@ -309,6 +328,12 @@ u32 saveIER; u32 saveIIR; u32 saveIMR; + u32 saveDEIER; + u32 saveDEIMR; + u32 saveGTIER; + u32 saveGTIMR; + u32 saveFDI_RXA_IMR; + u32 saveFDI_RXB_IMR; u32 saveCACHE_MODE_0; u32 saveD_STATE; u32 saveCG_2D_DIS; @@ -342,6 +367,26 @@ u32 savePIPEB_DP_LINK_M; u32 savePIPEA_DP_LINK_N; u32 savePIPEB_DP_LINK_N; + u32 saveFDI_RXA_CTL; + u32 saveFDI_TXA_CTL; + u32 saveFDI_RXB_CTL; + u32 saveFDI_TXB_CTL; + u32 savePFA_CTL_1; + u32 savePFB_CTL_1; + u32 savePFA_WIN_SZ; + u32 savePFB_WIN_SZ; + u32 savePFA_WIN_POS; + u32 savePFB_WIN_POS; + u32 savePCH_DREF_CONTROL; + u32 saveDISP_ARB_CTL; + u32 savePIPEA_DATA_M1; + u32 savePIPEA_DATA_N1; + u32 savePIPEA_LINK_M1; + u32 savePIPEA_LINK_N1; + u32 savePIPEB_DATA_M1; + u32 savePIPEB_DATA_N1; + u32 savePIPEB_LINK_M1; + u32 savePIPEB_LINK_N1; struct { struct drm_mm gtt_space; @@ -576,6 +621,8 @@ extern int i915_max_ioctl; extern unsigned int i915_fbpercrtc; +extern void i915_save_display(struct drm_device *dev); +extern void i915_restore_display(struct drm_device *dev); extern int i915_master_create(struct drm_device *dev, struct drm_master *master); extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master); @@ -627,6 +674,8 @@ void i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask); +void intel_enable_asle (struct drm_device *dev); + /* i915_mem.c */ extern int i915_mem_alloc(struct drm_device *dev, void *data, @@ -746,11 +795,13 @@ extern int intel_opregion_init(struct drm_device *dev, int resume); extern void intel_opregion_free(struct drm_device *dev, int suspend); extern void opregion_asle_intr(struct drm_device *dev); +extern void ironlake_opregion_gse_intr(struct drm_device *dev); extern void opregion_enable_asle(struct drm_device *dev); #else static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; } static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; } static inline void opregion_asle_intr(struct drm_device *dev) { return; } +static inline void ironlake_opregion_gse_intr(struct drm_device *dev) { return; } static inline void opregion_enable_asle(struct drm_device *dev) { return; } #endif @@ -837,6 +888,7 @@ #define IS_I85X(dev) ((dev)->pci_device == 0x3582) #define IS_I855(dev) ((dev)->pci_device == 0x3582) #define IS_I865G(dev) ((dev)->pci_device == 0x2572) +#define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev)) #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) #define IS_I915GM(dev) ((dev)->pci_device == 0x2592) @@ -854,6 +906,8 @@ (dev)->pci_device == 0x2E12 || \ (dev)->pci_device == 0x2E22 || \ (dev)->pci_device == 0x2E32 || \ + (dev)->pci_device == 0x2E42 || \ + (dev)->pci_device == 0x2E92 || \ (dev)->pci_device == 0x0042 || \ (dev)->pci_device == 0x0046) @@ -866,6 +920,8 @@ (dev)->pci_device == 0x2E12 || \ (dev)->pci_device == 0x2E22 || \ (dev)->pci_device == 0x2E32 || \ + (dev)->pci_device == 0x2E42 || \ + (dev)->pci_device == 0x2E92 || \ IS_GM45(dev)) #define IS_IGDG(dev) ((dev)->pci_device == 0xa001) @@ -896,9 +952,12 @@ */ #define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \ IS_I915GM(dev))) +#define SUPPORTS_DIGITAL_OUTPUTS(dev) (IS_I9XX(dev) && !IS_IGD(dev)) #define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev)) #define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev)) #define SUPPORTS_EDP(dev) (IS_IGDNG_M(dev)) +#define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \ + !IS_IGDNG(dev) && !IS_IGD(dev)) #define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) /* dsparb controlled by hw only */ #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev)) --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_drv.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_drv.c @@ -94,8 +94,6 @@ struct drm_i915_private *dev_priv = dev->dev_private; int ret = 0; - pci_set_power_state(dev->pdev, PCI_D0); - pci_restore_state(dev->pdev); if (pci_enable_device(dev->pdev)) return -1; pci_set_master(dev->pdev); @@ -263,6 +261,7 @@ module_init(i915_init); module_exit(i915_exit); +MODULE_IMPORT(intel_agp); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); MODULE_LICENSE("GPL and additional rights"); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_hdmi.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_hdmi.c @@ -77,14 +77,32 @@ struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; u32 temp; - if (mode != DRM_MODE_DPMS_ON) { - temp = I915_READ(hdmi_priv->sdvox_reg); + temp = I915_READ(hdmi_priv->sdvox_reg); + + /* HW workaround, need to toggle enable bit off and on for 12bpc, but + * we do this anyway which shows more stable in testing. + */ + if (IS_IGDNG(dev)) { I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE); + POSTING_READ(hdmi_priv->sdvox_reg); + } + + if (mode != DRM_MODE_DPMS_ON) { + temp &= ~SDVO_ENABLE; } else { - temp = I915_READ(hdmi_priv->sdvox_reg); - I915_WRITE(hdmi_priv->sdvox_reg, temp | SDVO_ENABLE); + temp |= SDVO_ENABLE; } + + I915_WRITE(hdmi_priv->sdvox_reg, temp); POSTING_READ(hdmi_priv->sdvox_reg); + + /* HW workaround, need to write this twice for issue that may result + * in first write getting masked. + */ + if (IS_IGDNG(dev)) { + I915_WRITE(hdmi_priv->sdvox_reg, temp); + POSTING_READ(hdmi_priv->sdvox_reg); + } } static void intel_hdmi_save(struct drm_connector *connector) @@ -223,7 +241,7 @@ connector = &intel_output->base; drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, - DRM_MODE_CONNECTOR_DVID); + DRM_MODE_CONNECTOR_HDMIA); drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); intel_output->type = INTEL_OUTPUT_HDMI; --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_gem.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_gem.c @@ -452,14 +452,17 @@ return -EBADF; obj_priv = obj->driver_private; - /* Bounds check source. - * - * XXX: This could use review for overflow issues... - */ - if (args->offset > obj->size || args->size > obj->size || - args->offset + args->size > obj->size) { - drm_gem_object_unreference(obj); - return -EINVAL; + /* Bounds check source. */ + if (args->offset > obj->size || args->size > obj->size - args->offset) { + ret = -EINVAL; + goto err; + } + + if (!access_ok(VERIFY_WRITE, + (char __user *)(uintptr_t)args->data_ptr, + args->size)) { + ret = -EFAULT; + goto err; } if (i915_gem_object_needs_bit17_swizzle(obj)) { @@ -471,8 +474,8 @@ file_priv); } +err: drm_gem_object_unreference(obj); - return ret; } @@ -562,8 +565,6 @@ user_data = (char __user *) (uintptr_t) args->data_ptr; remain = args->size; - if (!access_ok(VERIFY_READ, user_data, remain)) - return -EFAULT; mutex_lock(&dev->struct_mutex); @@ -925,14 +926,17 @@ return -EBADF; obj_priv = obj->driver_private; - /* Bounds check destination. - * - * XXX: This could use review for overflow issues... - */ - if (args->offset > obj->size || args->size > obj->size || - args->offset + args->size > obj->size) { - drm_gem_object_unreference(obj); - return -EINVAL; + /* Bounds check destination. */ + if (args->offset > obj->size || args->size > obj->size - args->offset) { + ret = -EINVAL; + goto err; + } + + if (!access_ok(VERIFY_READ, + (char __user *)(uintptr_t)args->data_ptr, + args->size)) { + ret = -EFAULT; + goto err; } /* We can only do the GTT pwrite on untiled buffers, as otherwise @@ -965,8 +969,8 @@ DRM_INFO("pwrite failed %d\n", ret); #endif +err: drm_gem_object_unreference(obj); - return ret; } @@ -1151,27 +1155,21 @@ mutex_lock(&dev->struct_mutex); if (!obj_priv->gtt_space) { ret = i915_gem_object_bind_to_gtt(obj, obj_priv->gtt_alignment); - if (ret) { - mutex_unlock(&dev->struct_mutex); - return VM_FAULT_SIGBUS; - } - - ret = i915_gem_object_set_to_gtt_domain(obj, write); - if (ret) { - mutex_unlock(&dev->struct_mutex); - return VM_FAULT_SIGBUS; - } + if (ret) + goto unlock; list_add_tail(&obj_priv->list, &dev_priv->mm.inactive_list); + + ret = i915_gem_object_set_to_gtt_domain(obj, write); + if (ret) + goto unlock; } /* Need a new fence register? */ if (obj_priv->tiling_mode != I915_TILING_NONE) { ret = i915_gem_object_get_fence_reg(obj); - if (ret) { - mutex_unlock(&dev->struct_mutex); - return VM_FAULT_SIGBUS; - } + if (ret) + goto unlock; } pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) + @@ -1179,18 +1177,18 @@ /* Finally, remap it using the new GTT offset */ ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn); - +unlock: mutex_unlock(&dev->struct_mutex); switch (ret) { + case 0: + case -ERESTARTSYS: + return VM_FAULT_NOPAGE; case -ENOMEM: case -EAGAIN: return VM_FAULT_OOM; - case -EFAULT: - case -EINVAL: - return VM_FAULT_SIGBUS; default: - return VM_FAULT_NOPAGE; + return VM_FAULT_SIGBUS; } } @@ -2506,16 +2504,6 @@ if (obj_priv->pages == NULL) return; - /* XXX: The 865 in particular appears to be weird in how it handles - * cache flushing. We haven't figured it out, but the - * clflush+agp_chipset_flush doesn't appear to successfully get the - * data visible to the PGU, while wbinvd + agp_chipset_flush does. - */ - if (IS_I865G(obj->dev)) { - wbinvd(); - return; - } - drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE); } @@ -3007,6 +2995,16 @@ return -EINVAL; } + if (reloc->delta >= target_obj->size) { + DRM_ERROR("Relocation beyond target object bounds: " + "obj %p target %d delta %d size %d.\n", + obj, reloc->target_handle, + (int) reloc->delta, (int) target_obj->size); + drm_gem_object_unreference(target_obj); + i915_gem_object_unpin(obj); + return -EINVAL; + } + if (reloc->write_domain & I915_GEM_DOMAIN_CPU || reloc->read_domains & I915_GEM_DOMAIN_CPU) { DRM_ERROR("reloc with read/write CPU domains: " @@ -3837,7 +3835,8 @@ i915_gem_object_unbind(obj); - i915_gem_free_mmap_offset(obj); + if (obj_priv->mmap_offset) + i915_gem_free_mmap_offset(obj); kfree(obj_priv->page_cpu_valid); kfree(obj_priv->bit_17); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_suspend.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_suspend.c @@ -32,11 +32,15 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) { struct drm_i915_private *dev_priv = dev->dev_private; + u32 dpll_reg; - if (pipe == PIPE_A) - return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); - else - return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); + if (IS_IGDNG(dev)) { + dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B; + } else { + dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B; + } + + return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE); } static void i915_save_palette(struct drm_device *dev, enum pipe pipe) @@ -49,6 +53,9 @@ if (!i915_pipe_enabled(dev, pipe)) return; + if (IS_IGDNG(dev)) + reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B; + if (pipe == PIPE_A) array = dev_priv->save_palette_a; else @@ -68,6 +75,9 @@ if (!i915_pipe_enabled(dev, pipe)) return; + if (IS_IGDNG(dev)) + reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B; + if (pipe == PIPE_A) array = dev_priv->save_palette_a; else @@ -228,13 +238,25 @@ if (drm_core_check_feature(dev, DRIVER_MODESET)) return; + + if (IS_IGDNG(dev)) { + dev_priv->savePCH_DREF_CONTROL = I915_READ(PCH_DREF_CONTROL); + dev_priv->saveDISP_ARB_CTL = I915_READ(DISP_ARB_CTL); + } + /* Pipe & plane A info */ dev_priv->savePIPEACONF = I915_READ(PIPEACONF); dev_priv->savePIPEASRC = I915_READ(PIPEASRC); - dev_priv->saveFPA0 = I915_READ(FPA0); - dev_priv->saveFPA1 = I915_READ(FPA1); - dev_priv->saveDPLL_A = I915_READ(DPLL_A); - if (IS_I965G(dev)) + if (IS_IGDNG(dev)) { + dev_priv->saveFPA0 = I915_READ(PCH_FPA0); + dev_priv->saveFPA1 = I915_READ(PCH_FPA1); + dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A); + } else { + dev_priv->saveFPA0 = I915_READ(FPA0); + dev_priv->saveFPA1 = I915_READ(FPA1); + dev_priv->saveDPLL_A = I915_READ(DPLL_A); + } + if (IS_I965G(dev) && !IS_IGDNG(dev)) dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); @@ -242,7 +264,30 @@ dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); - dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); + if (!IS_IGDNG(dev)) + dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); + + if (IS_IGDNG(dev)) { + dev_priv->savePIPEA_DATA_M1 = I915_READ(PIPEA_DATA_M1); + dev_priv->savePIPEA_DATA_N1 = I915_READ(PIPEA_DATA_N1); + dev_priv->savePIPEA_LINK_M1 = I915_READ(PIPEA_LINK_M1); + dev_priv->savePIPEA_LINK_N1 = I915_READ(PIPEA_LINK_N1); + + dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL); + dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL); + + dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1); + dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ); + dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS); + + dev_priv->saveTRANSACONF = I915_READ(TRANSACONF); + dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A); + dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A); + dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A); + dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A); + dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A); + dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A); + } dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); @@ -259,10 +304,16 @@ /* Pipe & plane B info */ dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); - dev_priv->saveFPB0 = I915_READ(FPB0); - dev_priv->saveFPB1 = I915_READ(FPB1); - dev_priv->saveDPLL_B = I915_READ(DPLL_B); - if (IS_I965G(dev)) + if (IS_IGDNG(dev)) { + dev_priv->saveFPB0 = I915_READ(PCH_FPB0); + dev_priv->saveFPB1 = I915_READ(PCH_FPB1); + dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B); + } else { + dev_priv->saveFPB0 = I915_READ(FPB0); + dev_priv->saveFPB1 = I915_READ(FPB1); + dev_priv->saveDPLL_B = I915_READ(DPLL_B); + } + if (IS_I965G(dev) && !IS_IGDNG(dev)) dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); @@ -270,7 +321,30 @@ dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); - dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); + if (!IS_IGDNG(dev)) + dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B); + + if (IS_IGDNG(dev)) { + dev_priv->savePIPEB_DATA_M1 = I915_READ(PIPEB_DATA_M1); + dev_priv->savePIPEB_DATA_N1 = I915_READ(PIPEB_DATA_N1); + dev_priv->savePIPEB_LINK_M1 = I915_READ(PIPEB_LINK_M1); + dev_priv->savePIPEB_LINK_N1 = I915_READ(PIPEB_LINK_N1); + + dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL); + dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL); + + dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1); + dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ); + dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS); + + dev_priv->saveTRANSBCONF = I915_READ(TRANSBCONF); + dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B); + dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B); + dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B); + dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B); + dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B); + dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B); + } dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); @@ -285,26 +359,50 @@ dev_priv->savePIPEBSTAT = I915_READ(PIPEBSTAT); return; } + static void i915_restore_modeset_reg(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + int dpll_a_reg, fpa0_reg, fpa1_reg; + int dpll_b_reg, fpb0_reg, fpb1_reg; if (drm_core_check_feature(dev, DRIVER_MODESET)) return; + if (IS_IGDNG(dev)) { + dpll_a_reg = PCH_DPLL_A; + dpll_b_reg = PCH_DPLL_B; + fpa0_reg = PCH_FPA0; + fpb0_reg = PCH_FPB0; + fpa1_reg = PCH_FPA1; + fpb1_reg = PCH_FPB1; + } else { + dpll_a_reg = DPLL_A; + dpll_b_reg = DPLL_B; + fpa0_reg = FPA0; + fpb0_reg = FPB0; + fpa1_reg = FPA1; + fpb1_reg = FPB1; + } + + if (IS_IGDNG(dev)) { + I915_WRITE(PCH_DREF_CONTROL, dev_priv->savePCH_DREF_CONTROL); + I915_WRITE(DISP_ARB_CTL, dev_priv->saveDISP_ARB_CTL); + } + /* Pipe & plane A info */ /* Prime the clock */ if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { - I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & + I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A & ~DPLL_VCO_ENABLE); DRM_UDELAY(150); } - I915_WRITE(FPA0, dev_priv->saveFPA0); - I915_WRITE(FPA1, dev_priv->saveFPA1); + I915_WRITE(fpa0_reg, dev_priv->saveFPA0); + I915_WRITE(fpa1_reg, dev_priv->saveFPA1); /* Actually enable it */ - I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); + I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A); DRM_UDELAY(150); - if (IS_I965G(dev)) + if (IS_I965G(dev) && !IS_IGDNG(dev)) I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); DRM_UDELAY(150); @@ -315,7 +413,30 @@ I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); - I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); + if (!IS_IGDNG(dev)) + I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); + + if (IS_IGDNG(dev)) { + I915_WRITE(PIPEA_DATA_M1, dev_priv->savePIPEA_DATA_M1); + I915_WRITE(PIPEA_DATA_N1, dev_priv->savePIPEA_DATA_N1); + I915_WRITE(PIPEA_LINK_M1, dev_priv->savePIPEA_LINK_M1); + I915_WRITE(PIPEA_LINK_N1, dev_priv->savePIPEA_LINK_N1); + + I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL); + I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL); + + I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1); + I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ); + I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS); + + I915_WRITE(TRANSACONF, dev_priv->saveTRANSACONF); + I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A); + I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A); + I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A); + I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A); + I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A); + I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A); + } /* Restore plane info */ I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); @@ -337,16 +458,16 @@ /* Pipe & plane B info */ if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { - I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & + I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B & ~DPLL_VCO_ENABLE); DRM_UDELAY(150); } - I915_WRITE(FPB0, dev_priv->saveFPB0); - I915_WRITE(FPB1, dev_priv->saveFPB1); + I915_WRITE(fpb0_reg, dev_priv->saveFPB0); + I915_WRITE(fpb1_reg, dev_priv->saveFPB1); /* Actually enable it */ - I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); + I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B); DRM_UDELAY(150); - if (IS_I965G(dev)) + if (IS_I965G(dev) && !IS_IGDNG(dev)) I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); DRM_UDELAY(150); @@ -357,7 +478,30 @@ I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); - I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); + if (!IS_IGDNG(dev)) + I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); + + if (IS_IGDNG(dev)) { + I915_WRITE(PIPEB_DATA_M1, dev_priv->savePIPEB_DATA_M1); + I915_WRITE(PIPEB_DATA_N1, dev_priv->savePIPEB_DATA_N1); + I915_WRITE(PIPEB_LINK_M1, dev_priv->savePIPEB_LINK_M1); + I915_WRITE(PIPEB_LINK_N1, dev_priv->savePIPEB_LINK_N1); + + I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL); + I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL); + + I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1); + I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ); + I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS); + + I915_WRITE(TRANSBCONF, dev_priv->saveTRANSBCONF); + I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B); + I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B); + I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B); + I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B); + I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B); + I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B); + } /* Restore plane info */ I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); @@ -379,19 +523,10 @@ return; } -int i915_save_state(struct drm_device *dev) + +void i915_save_display(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - int i; - - pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); - - /* Render Standby */ - if (IS_I965G(dev) && IS_MOBILE(dev)) - dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY); - - /* Hardware status page */ - dev_priv->saveHWS = I915_READ(HWS_PGA); /* Display arbitration control */ dev_priv->saveDSPARB = I915_READ(DSPARB); @@ -399,6 +534,7 @@ /* This is only meaningful in non-KMS mode */ /* Don't save them in KMS mode */ i915_save_modeset_reg(dev); + /* Cursor state */ dev_priv->saveCURACNTR = I915_READ(CURACNTR); dev_priv->saveCURAPOS = I915_READ(CURAPOS); @@ -410,21 +546,43 @@ dev_priv->saveCURSIZE = I915_READ(CURSIZE); /* CRT state */ - dev_priv->saveADPA = I915_READ(ADPA); + if (IS_IGDNG(dev)) { + dev_priv->saveADPA = I915_READ(PCH_ADPA); + } else { + dev_priv->saveADPA = I915_READ(ADPA); + } /* LVDS state */ - dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); - dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); - dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); - if (IS_I965G(dev)) - dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); - if (IS_MOBILE(dev) && !IS_I830(dev)) - dev_priv->saveLVDS = I915_READ(LVDS); - if (!IS_I830(dev) && !IS_845G(dev)) + if (IS_IGDNG(dev)) { + dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL); + dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1); + dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2); + dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL); + dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2); + dev_priv->saveLVDS = I915_READ(PCH_LVDS); + } else { + dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); + dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); + dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); + dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL); + if (IS_I965G(dev)) + dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); + if (IS_MOBILE(dev) && !IS_I830(dev)) + dev_priv->saveLVDS = I915_READ(LVDS); + } + + if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev)) dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); - dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); - dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); - dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); + + if (IS_IGDNG(dev)) { + dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS); + dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS); + dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR); + } else { + dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); + dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); + dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); + } /* Display Port state */ if (SUPPORTS_INTEGRATED_DP(dev)) { @@ -448,16 +606,143 @@ dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); - /* Interrupt state */ - dev_priv->saveIIR = I915_READ(IIR); - dev_priv->saveIER = I915_READ(IER); - dev_priv->saveIMR = I915_READ(IMR); - /* VGA state */ dev_priv->saveVGA0 = I915_READ(VGA0); dev_priv->saveVGA1 = I915_READ(VGA1); dev_priv->saveVGA_PD = I915_READ(VGA_PD); - dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); + if (IS_IGDNG(dev)) + dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL); + else + dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); + + i915_save_vga(dev); +} + +void i915_restore_display(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + /* Display arbitration */ + I915_WRITE(DSPARB, dev_priv->saveDSPARB); + + /* Display port ratios (must be done before clock is set) */ + if (SUPPORTS_INTEGRATED_DP(dev)) { + I915_WRITE(PIPEA_GMCH_DATA_M, dev_priv->savePIPEA_GMCH_DATA_M); + I915_WRITE(PIPEB_GMCH_DATA_M, dev_priv->savePIPEB_GMCH_DATA_M); + I915_WRITE(PIPEA_GMCH_DATA_N, dev_priv->savePIPEA_GMCH_DATA_N); + I915_WRITE(PIPEB_GMCH_DATA_N, dev_priv->savePIPEB_GMCH_DATA_N); + I915_WRITE(PIPEA_DP_LINK_M, dev_priv->savePIPEA_DP_LINK_M); + I915_WRITE(PIPEB_DP_LINK_M, dev_priv->savePIPEB_DP_LINK_M); + I915_WRITE(PIPEA_DP_LINK_N, dev_priv->savePIPEA_DP_LINK_N); + I915_WRITE(PIPEB_DP_LINK_N, dev_priv->savePIPEB_DP_LINK_N); + } + + /* This is only meaningful in non-KMS mode */ + /* Don't restore them in KMS mode */ + i915_restore_modeset_reg(dev); + + /* Cursor state */ + I915_WRITE(CURAPOS, dev_priv->saveCURAPOS); + I915_WRITE(CURACNTR, dev_priv->saveCURACNTR); + I915_WRITE(CURABASE, dev_priv->saveCURABASE); + I915_WRITE(CURBPOS, dev_priv->saveCURBPOS); + I915_WRITE(CURBCNTR, dev_priv->saveCURBCNTR); + I915_WRITE(CURBBASE, dev_priv->saveCURBBASE); + if (!IS_I9XX(dev)) + I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); + + /* CRT state */ + if (IS_IGDNG(dev)) + I915_WRITE(PCH_ADPA, dev_priv->saveADPA); + else + I915_WRITE(ADPA, dev_priv->saveADPA); + + /* LVDS state */ + if (IS_I965G(dev) && !IS_IGDNG(dev)) + I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); + + if (IS_IGDNG(dev)) { + I915_WRITE(PCH_LVDS, dev_priv->saveLVDS); + } else if (IS_MOBILE(dev) && !IS_I830(dev)) + I915_WRITE(LVDS, dev_priv->saveLVDS); + + if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev)) + I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); + + if (IS_IGDNG(dev)) { + I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL); + I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2); + I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); + I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2); + I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); + I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); + I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); + I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL); + } else { + I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); + I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); + I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL); + I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); + I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); + I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); + I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); + } + + /* Display Port state */ + if (SUPPORTS_INTEGRATED_DP(dev)) { + I915_WRITE(DP_B, dev_priv->saveDP_B); + I915_WRITE(DP_C, dev_priv->saveDP_C); + I915_WRITE(DP_D, dev_priv->saveDP_D); + } + /* FIXME: restore TV & SDVO state */ + + /* FBC info */ + I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); + I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); + I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); + I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); + + /* VGA state */ + if (IS_IGDNG(dev)) + I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); + else + I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); + I915_WRITE(VGA0, dev_priv->saveVGA0); + I915_WRITE(VGA1, dev_priv->saveVGA1); + I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); + DRM_UDELAY(150); + + i915_restore_vga(dev); +} + +int i915_save_state(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + int i; + + pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); + + /* Render Standby */ + if (IS_I965G(dev) && IS_MOBILE(dev)) + dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY); + + /* Hardware status page */ + dev_priv->saveHWS = I915_READ(HWS_PGA); + + i915_save_display(dev); + + /* Interrupt state */ + if (IS_IGDNG(dev)) { + dev_priv->saveDEIER = I915_READ(DEIER); + dev_priv->saveDEIMR = I915_READ(DEIMR); + dev_priv->saveGTIER = I915_READ(GTIER); + dev_priv->saveGTIMR = I915_READ(GTIMR); + dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR); + dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR); + } else { + dev_priv->saveIER = I915_READ(IER); + dev_priv->saveIMR = I915_READ(IMR); + } /* Clock gating state */ dev_priv->saveD_STATE = I915_READ(D_STATE); @@ -489,7 +774,6 @@ for (i = 0; i < 8; i++) dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); } - i915_save_vga(dev); return 0; } @@ -508,9 +792,6 @@ /* Hardware status page */ I915_WRITE(HWS_PGA, dev_priv->saveHWS); - /* Display arbitration */ - I915_WRITE(DSPARB, dev_priv->saveDSPARB); - /* Fences */ if (IS_I965G(dev)) { for (i = 0; i < 16; i++) @@ -522,69 +803,21 @@ for (i = 0; i < 8; i++) I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); } - - /* Display port ratios (must be done before clock is set) */ - if (SUPPORTS_INTEGRATED_DP(dev)) { - I915_WRITE(PIPEA_GMCH_DATA_M, dev_priv->savePIPEA_GMCH_DATA_M); - I915_WRITE(PIPEB_GMCH_DATA_M, dev_priv->savePIPEB_GMCH_DATA_M); - I915_WRITE(PIPEA_GMCH_DATA_N, dev_priv->savePIPEA_GMCH_DATA_N); - I915_WRITE(PIPEB_GMCH_DATA_N, dev_priv->savePIPEB_GMCH_DATA_N); - I915_WRITE(PIPEA_DP_LINK_M, dev_priv->savePIPEA_DP_LINK_M); - I915_WRITE(PIPEB_DP_LINK_M, dev_priv->savePIPEB_DP_LINK_M); - I915_WRITE(PIPEA_DP_LINK_N, dev_priv->savePIPEA_DP_LINK_N); - I915_WRITE(PIPEB_DP_LINK_N, dev_priv->savePIPEB_DP_LINK_N); - } - /* This is only meaningful in non-KMS mode */ - /* Don't restore them in KMS mode */ - i915_restore_modeset_reg(dev); - /* Cursor state */ - I915_WRITE(CURAPOS, dev_priv->saveCURAPOS); - I915_WRITE(CURACNTR, dev_priv->saveCURACNTR); - I915_WRITE(CURABASE, dev_priv->saveCURABASE); - I915_WRITE(CURBPOS, dev_priv->saveCURBPOS); - I915_WRITE(CURBCNTR, dev_priv->saveCURBCNTR); - I915_WRITE(CURBBASE, dev_priv->saveCURBBASE); - if (!IS_I9XX(dev)) - I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); - /* CRT state */ - I915_WRITE(ADPA, dev_priv->saveADPA); + i915_restore_display(dev); - /* LVDS state */ - if (IS_I965G(dev)) - I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); - if (IS_MOBILE(dev) && !IS_I830(dev)) - I915_WRITE(LVDS, dev_priv->saveLVDS); - if (!IS_I830(dev) && !IS_845G(dev)) - I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); - - I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); - I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); - I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); - I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); - I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); - I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); - - /* Display Port state */ - if (SUPPORTS_INTEGRATED_DP(dev)) { - I915_WRITE(DP_B, dev_priv->saveDP_B); - I915_WRITE(DP_C, dev_priv->saveDP_C); - I915_WRITE(DP_D, dev_priv->saveDP_D); + /* Interrupt state */ + if (IS_IGDNG(dev)) { + I915_WRITE(DEIER, dev_priv->saveDEIER); + I915_WRITE(DEIMR, dev_priv->saveDEIMR); + I915_WRITE(GTIER, dev_priv->saveGTIER); + I915_WRITE(GTIMR, dev_priv->saveGTIMR); + I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR); + I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR); + } else { + I915_WRITE (IER, dev_priv->saveIER); + I915_WRITE (IMR, dev_priv->saveIMR); } - /* FIXME: restore TV & SDVO state */ - - /* FBC info */ - I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); - I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); - I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); - I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); - - /* VGA state */ - I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); - I915_WRITE(VGA0, dev_priv->saveVGA0); - I915_WRITE(VGA1, dev_priv->saveVGA1); - I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); - DRM_UDELAY(150); /* Clock gating state */ I915_WRITE (D_STATE, dev_priv->saveD_STATE); @@ -603,8 +836,6 @@ for (i = 0; i < 3; i++) I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]); - i915_restore_vga(dev); - return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_crt.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_crt.c @@ -151,13 +151,10 @@ { struct drm_device *dev = connector->dev; struct drm_i915_private *dev_priv = dev->dev_private; - u32 adpa, temp; + u32 adpa; bool ret; - temp = adpa = I915_READ(PCH_ADPA); - - adpa &= ~ADPA_DAC_ENABLE; - I915_WRITE(PCH_ADPA, adpa); + adpa = I915_READ(PCH_ADPA); adpa &= ~ADPA_CRT_HOTPLUG_MASK; @@ -184,8 +181,6 @@ else ret = false; - /* restore origin register */ - I915_WRITE(PCH_ADPA, temp); return ret; } @@ -239,8 +234,8 @@ } while (time_after(timeout, jiffies)); } - if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) == - CRT_HOTPLUG_MONITOR_COLOR) + if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) != + CRT_HOTPLUG_MONITOR_NONE) return true; return false; --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_dma.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_dma.c @@ -1257,9 +1257,7 @@ } /* Must be done after probing outputs */ - /* FIXME: verify on IGDNG */ - if (!IS_IGDNG(dev)) - intel_opregion_init(dev, 0); + intel_opregion_init(dev, 0); return 0; @@ -1297,8 +1295,7 @@ if (dev_priv->regs != NULL) iounmap(dev_priv->regs); - if (!IS_IGDNG(dev)) - intel_opregion_free(dev, 0); + intel_opregion_free(dev, 0); if (drm_core_check_feature(dev, DRIVER_MODESET)) { intel_modeset_cleanup(dev); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_display.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_display.c @@ -804,10 +804,8 @@ struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; intel_clock_t clock; - int max_n; - bool found; int err_most = 47; - found = false; + int err_min = 10000; /* eDP has only 2 clock choice, no n/m/p setting */ if (HAS_eDP) @@ -818,7 +816,7 @@ refclk, best_clock); if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { - if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == + if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) clock.p2 = limit->p2.p2_fast; else @@ -831,16 +829,14 @@ } memset(best_clock, 0, sizeof(*best_clock)); - max_n = limit->n.max; - /* based on hardware requriment prefer smaller n to precision */ - for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { - /* based on hardware requirment prefere larger m1,m2, p1 */ - for (clock.m1 = limit->m1.max; - clock.m1 >= limit->m1.min; clock.m1--) { - for (clock.m2 = limit->m2.max; - clock.m2 >= limit->m2.min; clock.m2--) { - for (clock.p1 = limit->p1.max; - clock.p1 >= limit->p1.min; clock.p1--) { + for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { + /* based on hardware requriment prefer smaller n to precision */ + for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) { + /* based on hardware requirment prefere larger m1,m2 */ + for (clock.m1 = limit->m1.max; + clock.m1 >= limit->m1.min; clock.m1--) { + for (clock.m2 = limit->m2.max; + clock.m2 >= limit->m2.min; clock.m2--) { int this_err; intel_clock(dev, refclk, &clock); @@ -849,18 +845,18 @@ this_err = abs((10000 - (target*10000/clock.dot))); if (this_err < err_most) { *best_clock = clock; - err_most = this_err; - max_n = clock.n; - found = true; /* found on first matching */ goto out; + } else if (this_err < err_min) { + *best_clock = clock; + err_min = this_err; } } } } } out: - return found; + return true; } /* DisplayPort has only two frequencies, 162MHz and 270MHz */ @@ -1008,6 +1004,10 @@ dspcntr &= ~DISPPLANE_TILED; } + if (IS_IGDNG(dev)) + /* must disable */ + dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE; + I915_WRITE(dspcntr_reg, dspcntr); Start = obj_priv->gtt_offset; @@ -1154,6 +1154,7 @@ int transconf_reg = (pipe == 0) ? TRANSACONF : TRANSBCONF; int pf_ctl_reg = (pipe == 0) ? PFA_CTL_1 : PFB_CTL_1; int pf_win_size = (pipe == 0) ? PFA_WIN_SZ : PFB_WIN_SZ; + int pf_win_pos = (pipe == 0) ? PFA_WIN_POS : PFB_WIN_POS; int cpu_htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B; int cpu_hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B; int cpu_hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B; @@ -1177,6 +1178,15 @@ case DRM_MODE_DPMS_STANDBY: case DRM_MODE_DPMS_SUSPEND: DRM_DEBUG("crtc %d dpms on\n", pipe); + + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { + temp = I915_READ(PCH_LVDS); + if ((temp & LVDS_PORT_EN) == 0) { + I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); + POSTING_READ(PCH_LVDS); + } + } + if (HAS_eDP) { /* enable eDP PLL */ igdng_enable_pll_edp(crtc); @@ -1205,6 +1215,19 @@ } } + /* Enable panel fitting for LVDS */ + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { + temp = I915_READ(pf_ctl_reg); + I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3); + + /* currently full aspect */ + I915_WRITE(pf_win_pos, 0); + + I915_WRITE(pf_win_size, + (dev_priv->panel_fixed_mode->hdisplay << 16) | + (dev_priv->panel_fixed_mode->vdisplay)); + } + /* Enable CPU pipe */ temp = I915_READ(pipeconf_reg); if ((temp & PIPEACONF_ENABLE) == 0) { @@ -1348,8 +1371,6 @@ case DRM_MODE_DPMS_OFF: DRM_DEBUG("crtc %d dpms off\n", pipe); - i915_disable_vga(dev); - /* Disable display plane */ temp = I915_READ(dspcntr_reg); if ((temp & DISPLAY_PLANE_ENABLE) != 0) { @@ -1359,6 +1380,8 @@ I915_READ(dspbase_reg); } + i915_disable_vga(dev); + /* disable cpu pipe, disable after all planes disabled */ temp = I915_READ(pipeconf_reg); if ((temp & PIPEACONF_ENABLE) != 0) { @@ -1379,9 +1402,15 @@ } else DRM_DEBUG("crtc %d is disabled\n", pipe); - if (HAS_eDP) { - igdng_disable_pll_edp(crtc); + udelay(100); + + /* Disable PF */ + temp = I915_READ(pf_ctl_reg); + if ((temp & PF_ENABLE) != 0) { + I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE); + I915_READ(pf_ctl_reg); } + I915_WRITE(pf_win_size, 0); /* disable CPU FDI tx and PCH FDI rx */ temp = I915_READ(fdi_tx_reg); @@ -1407,6 +1436,13 @@ udelay(100); + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { + temp = I915_READ(PCH_LVDS); + I915_WRITE(PCH_LVDS, temp & ~LVDS_PORT_EN); + I915_READ(PCH_LVDS); + udelay(100); + } + /* disable PCH transcoder */ temp = I915_READ(transconf_reg); if ((temp & TRANS_ENABLE) != 0) { @@ -1426,6 +1462,8 @@ } } + udelay(100); + /* disable PCH DPLL */ temp = I915_READ(pch_dpll_reg); if ((temp & DPLL_VCO_ENABLE) != 0) { @@ -1433,14 +1471,20 @@ I915_READ(pch_dpll_reg); } - temp = I915_READ(fdi_rx_reg); - if ((temp & FDI_RX_PLL_ENABLE) != 0) { - temp &= ~FDI_SEL_PCDCLK; - temp &= ~FDI_RX_PLL_ENABLE; - I915_WRITE(fdi_rx_reg, temp); - I915_READ(fdi_rx_reg); + if (HAS_eDP) { + igdng_disable_pll_edp(crtc); } + temp = I915_READ(fdi_rx_reg); + temp &= ~FDI_SEL_PCDCLK; + I915_WRITE(fdi_rx_reg, temp); + I915_READ(fdi_rx_reg); + + temp = I915_READ(fdi_rx_reg); + temp &= ~FDI_RX_PLL_ENABLE; + I915_WRITE(fdi_rx_reg, temp); + I915_READ(fdi_rx_reg); + /* Disable CPU FDI TX PLL */ temp = I915_READ(fdi_tx_reg); if ((temp & FDI_TX_PLL_ENABLE) != 0) { @@ -1449,16 +1493,8 @@ udelay(100); } - /* Disable PF */ - temp = I915_READ(pf_ctl_reg); - if ((temp & PF_ENABLE) != 0) { - I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE); - I915_READ(pf_ctl_reg); - } - I915_WRITE(pf_win_size, 0); - /* Wait for the clocks to turn off. */ - udelay(150); + udelay(100); break; } } @@ -1522,6 +1558,7 @@ intel_update_watermarks(dev); /* Give the overlay scaler a chance to disable if it's on this pipe */ //intel_crtc_dpms_video(crtc, FALSE); TODO + drm_vblank_off(dev, pipe); /* Disable the VGA plane that we never use */ i915_disable_vga(dev); @@ -1746,7 +1783,7 @@ #define LINK_N 0x80000 static void -igdng_compute_m_n(int bytes_per_pixel, int nlanes, +igdng_compute_m_n(int bits_per_pixel, int nlanes, int pixel_clock, int link_clock, struct fdi_m_n *m_n) { @@ -1756,7 +1793,8 @@ temp = (u64) DATA_N * pixel_clock; temp = div_u64(temp, link_clock); - m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); + m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes); + m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */ m_n->gmch_n = DATA_N; fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); @@ -1858,7 +1896,14 @@ { long entries_required, wm_size; - entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000; + /* + * Note: we need to make sure we don't overflow for various clock & + * latency values. + * clocks go from a few thousand to several hundred thousand. + * latency is usually a few thousand + */ + entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) / + 1000; entries_required /= wm->cacheline_size; DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required); @@ -2371,7 +2416,7 @@ /* FDI link */ if (IS_IGDNG(dev)) { - int lane, link_bw; + int lane, link_bw, bpp; /* eDP doesn't require FDI link, so just set DP M/N according to current link config */ if (is_edp) { @@ -2390,10 +2435,72 @@ lane = 4; link_bw = 270000; } - igdng_compute_m_n(3, lane, target_clock, + + /* determine panel color depth */ + temp = I915_READ(pipeconf_reg); + + switch (temp & PIPE_BPC_MASK) { + case PIPE_8BPC: + bpp = 24; + break; + case PIPE_10BPC: + bpp = 30; + break; + case PIPE_6BPC: + bpp = 18; + break; + case PIPE_12BPC: + bpp = 36; + break; + default: + DRM_ERROR("unknown pipe bpc value\n"); + bpp = 24; + } + + igdng_compute_m_n(bpp, lane, target_clock, link_bw, &m_n); } + /* Ironlake: try to setup display ref clock before DPLL + * enabling. This is only under driver's control after + * PCH B stepping, previous chipset stepping should be + * ignoring this setting. + */ + if (IS_IGDNG(dev)) { + temp = I915_READ(PCH_DREF_CONTROL); + /* Always enable nonspread source */ + temp &= ~DREF_NONSPREAD_SOURCE_MASK; + temp |= DREF_NONSPREAD_SOURCE_ENABLE; + I915_WRITE(PCH_DREF_CONTROL, temp); + POSTING_READ(PCH_DREF_CONTROL); + + temp &= ~DREF_SSC_SOURCE_MASK; + temp |= DREF_SSC_SOURCE_ENABLE; + I915_WRITE(PCH_DREF_CONTROL, temp); + POSTING_READ(PCH_DREF_CONTROL); + + udelay(200); + + if (is_edp) { + if (dev_priv->lvds_use_ssc) { + temp |= DREF_SSC1_ENABLE; + I915_WRITE(PCH_DREF_CONTROL, temp); + POSTING_READ(PCH_DREF_CONTROL); + + udelay(200); + + temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK; + temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD; + I915_WRITE(PCH_DREF_CONTROL, temp); + POSTING_READ(PCH_DREF_CONTROL); + } else { + temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD; + I915_WRITE(PCH_DREF_CONTROL, temp); + POSTING_READ(PCH_DREF_CONTROL); + } + } + } + if (IS_IGD(dev)) fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; else @@ -2616,6 +2723,12 @@ intel_wait_for_vblank(dev); + if (IS_IGDNG(dev)) { + /* enable address swizzle for tiling buffer */ + temp = I915_READ(DISP_ARB_CTL); + I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING); + } + I915_WRITE(dspcntr_reg, dspcntr); /* Flush the plane changes */ @@ -3231,7 +3344,7 @@ if (I915_READ(PCH_DP_D) & DP_DETECTED) intel_dp_init(dev, PCH_DP_D); - } else if (IS_I9XX(dev)) { + } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) { bool found = false; if (I915_READ(SDVOB) & SDVO_DETECTED) { @@ -3258,10 +3371,10 @@ if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED)) intel_dp_init(dev, DP_D); - } else + } else if (IS_I8XX(dev)) intel_dvo_init(dev); - if (IS_I9XX(dev) && IS_MOBILE(dev) && !IS_IGDNG(dev)) + if (SUPPORTS_TV(dev)) intel_tv_init(dev); list_for_each_entry(connector, &dev->mode_config.connector_list, head) { --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_opregion.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_opregion.c @@ -32,6 +32,8 @@ #include "i915_drm.h" #include "i915_drv.h" +#define I915_DRV "i915_drv" + #define PCI_ASLE 0xe4 #define PCI_LBPC 0xf4 #define PCI_ASLS 0xfc @@ -118,6 +120,10 @@ #define ASLE_BACKLIGHT_FAIL (2<<12) #define ASLE_PFIT_FAIL (2<<14) #define ASLE_PWM_FREQ_FAIL (2<<16) +#define ASLE_ALS_ILLUM_FAILED (1<<10) +#define ASLE_BACKLIGHT_FAILED (1<<12) +#define ASLE_PFIT_FAILED (1<<14) +#define ASLE_PWM_FREQ_FAILED (1<<16) /* ASLE backlight brightness to set */ #define ASLE_BCLP_VALID (1<<31) @@ -231,6 +237,73 @@ asle->aslc = asle_stat; } +static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct opregion_asle *asle = dev_priv->opregion.asle; + u32 cpu_pwm_ctl, pch_pwm_ctl2; + u32 max_backlight, level; + + if (!(bclp & ASLE_BCLP_VALID)) + return ASLE_BACKLIGHT_FAILED; + + bclp &= ASLE_BCLP_MSK; + if (bclp < 0 || bclp > 255) + return ASLE_BACKLIGHT_FAILED; + + cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL); + pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); + /* get the max PWM frequency */ + max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK; + /* calculate the expected PMW frequency */ + level = (bclp * max_backlight) / 255; + /* reserve the high 16 bits */ + cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK); + /* write the updated PWM frequency */ + I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level); + + asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; + + return 0; +} + +void ironlake_opregion_gse_intr(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct opregion_asle *asle = dev_priv->opregion.asle; + u32 asle_stat = 0; + u32 asle_req; + + if (!asle) + return; + + asle_req = asle->aslc & ASLE_REQ_MSK; + + if (!asle_req) { + DRM_DEBUG_DRIVER(I915_DRV, "non asle set request??\n"); + return; + } + + if (asle_req & ASLE_SET_ALS_ILLUM) { + DRM_DEBUG_DRIVER(I915_DRV, "Illum is not supported\n"); + asle_stat |= ASLE_ALS_ILLUM_FAILED; + } + + if (asle_req & ASLE_SET_BACKLIGHT) + asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp); + + if (asle_req & ASLE_SET_PFIT) { + DRM_DEBUG_DRIVER(I915_DRV, "Pfit is not supported\n"); + asle_stat |= ASLE_PFIT_FAILED; + } + + if (asle_req & ASLE_SET_PWM_FREQ) { + DRM_DEBUG_DRIVER(I915_DRV, "PWM freq is not supported\n"); + asle_stat |= ASLE_PWM_FREQ_FAILED; + } + + asle->aslc = asle_stat; +} #define ASLE_ALS_EN (1<<0) #define ASLE_BLC_EN (1<<1) #define ASLE_PFIT_EN (1<<2) @@ -246,8 +319,7 @@ unsigned long irqflags; spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); - i915_enable_pipestat(dev_priv, 1, - I915_LEGACY_BLC_EVENT_ENABLE); + intel_enable_asle(dev); spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); } --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_tv.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_tv.c @@ -1212,20 +1212,17 @@ tv_ctl |= TV_TRILEVEL_SYNC; if (tv_mode->pal_burst) tv_ctl |= TV_PAL_BURST; + scctl1 = 0; - /* dda1 implies valid video levels */ - if (tv_mode->dda1_inc) { + if (tv_mode->dda1_inc) scctl1 |= TV_SC_DDA1_EN; - } - if (tv_mode->dda2_inc) scctl1 |= TV_SC_DDA2_EN; - if (tv_mode->dda3_inc) scctl1 |= TV_SC_DDA3_EN; - scctl1 |= tv_mode->sc_reset; - scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT; + if (video_levels) + scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT; scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT; scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT | --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_dp.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_dp.c @@ -400,7 +400,7 @@ { struct intel_dp_priv *dp_priv = intel_output->dev_priv; - DRM_ERROR("i2c_init %s\n", name); + DRM_INFO("i2c_init %s\n", name); dp_priv->algo.running = false; dp_priv->algo.address = 0; dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_sdvo.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_sdvo.c @@ -114,6 +114,9 @@ /* DDC bus used by this SDVO output */ uint8_t ddc_bus; + /* Mac mini hack -- use the same DDC as the analog connector */ + struct i2c_adapter *analog_ddc_bus; + int save_sdvo_mult; u16 save_active_outputs; struct intel_sdvo_dtd save_input_dtd_1, save_input_dtd_2; @@ -1478,6 +1481,36 @@ return (caps > 1); } +static struct drm_connector * +intel_find_analog_connector(struct drm_device *dev) +{ + struct drm_connector *connector; + struct intel_output *intel_output; + + list_for_each_entry(connector, &dev->mode_config.connector_list, head) { + intel_output = to_intel_output(connector); + if (intel_output->type == INTEL_OUTPUT_ANALOG) + return connector; + } + return NULL; +} + +static int +intel_analog_is_connected(struct drm_device *dev) +{ + struct drm_connector *analog_connector; + analog_connector = intel_find_analog_connector(dev); + + if (!analog_connector) + return false; + + if (analog_connector->funcs->detect(analog_connector) == + connector_status_disconnected) + return false; + + return true; +} + enum drm_connector_status intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) { @@ -1488,6 +1521,15 @@ edid = drm_get_edid(&intel_output->base, intel_output->ddc_bus); + + /* when there is no edid and no monitor is connected with VGA + * port, try to use the CRT ddc to read the EDID for DVI-connector + */ + if (edid == NULL && + sdvo_priv->analog_ddc_bus && + !intel_analog_is_connected(intel_output->base.dev)) + edid = drm_get_edid(&intel_output->base, + sdvo_priv->analog_ddc_bus); if (edid != NULL) { /* Don't report the output as connected if it's a DVI-I * connector with a non-digital EDID coming out. @@ -1540,31 +1582,32 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) { struct intel_output *intel_output = to_intel_output(connector); + struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; + int num_modes; /* set the bus switch and get the modes */ - intel_ddc_get_modes(intel_output); + num_modes = intel_ddc_get_modes(intel_output); -#if 0 - struct drm_device *dev = encoder->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - /* Mac mini hack. On this device, I get DDC through the analog, which - * load-detects as disconnected. I fail to DDC through the SDVO DDC, - * but it does load-detect as connected. So, just steal the DDC bits - * from analog when we fail at finding it the right way. + /* + * Mac mini hack. On this device, the DVI-I connector shares one DDC + * link between analog and digital outputs. So, if the regular SDVO + * DDC fails, check to see if the analog output is disconnected, in + * which case we'll look there for the digital DDC data. */ - crt = xf86_config->output[0]; - intel_output = crt->driver_private; - if (intel_output->type == I830_OUTPUT_ANALOG && - crt->funcs->detect(crt) == XF86OutputStatusDisconnected) { - I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOA, "CRTDDC_A"); - edid_mon = xf86OutputGetEDID(crt, intel_output->pDDCBus); - xf86DestroyI2CBusRec(intel_output->pDDCBus, true, true); - } - if (edid_mon) { - xf86OutputSetEDID(output, edid_mon); - modes = xf86OutputGetEDIDModes(output); + if (num_modes == 0 && + sdvo_priv->analog_ddc_bus && + !intel_analog_is_connected(intel_output->base.dev)) { + struct i2c_adapter *digital_ddc_bus; + + /* Switch to the analog ddc bus and try that + */ + digital_ddc_bus = intel_output->ddc_bus; + intel_output->ddc_bus = sdvo_priv->analog_ddc_bus; + + (void) intel_ddc_get_modes(intel_output); + + intel_output->ddc_bus = digital_ddc_bus; } -#endif } /** @@ -1748,6 +1791,8 @@ intel_i2c_destroy(intel_output->i2c_bus); if (intel_output->ddc_bus) intel_i2c_destroy(intel_output->ddc_bus); + if (sdvo_priv->analog_ddc_bus) + intel_i2c_destroy(sdvo_priv->analog_ddc_bus); if (sdvo_priv->sdvo_lvds_fixed_mode != NULL) drm_mode_destroy(connector->dev, @@ -2074,10 +2119,15 @@ } /* setup the DDC bus. */ - if (output_device == SDVOB) + if (output_device == SDVOB) { intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); - else + sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, + "SDVOB/VGA DDC BUS"); + } else { intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); + sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, + "SDVOC/VGA DDC BUS"); + } if (intel_output->ddc_bus == NULL) goto err_i2c; @@ -2143,6 +2193,8 @@ return true; err_i2c: + if (sdvo_priv->analog_ddc_bus != NULL) + intel_i2c_destroy(sdvo_priv->analog_ddc_bus); if (intel_output->ddc_bus != NULL) intel_i2c_destroy(intel_output->ddc_bus); if (intel_output->i2c_bus != NULL) --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/intel_lvds.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/intel_lvds.c @@ -305,6 +305,10 @@ goto out; } + /* full screen scale for now */ + if (IS_IGDNG(dev)) + goto out; + /* 965+ wants fuzzy fitting */ if (IS_I965G(dev)) pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) | @@ -332,8 +336,10 @@ * to register description and PRM. * Change the value here to see the borders for debugging */ - I915_WRITE(BCLRPAT_A, 0); - I915_WRITE(BCLRPAT_B, 0); + if (!IS_IGDNG(dev)) { + I915_WRITE(BCLRPAT_A, 0); + I915_WRITE(BCLRPAT_B, 0); + } switch (lvds_priv->fitting_mode) { case DRM_MODE_SCALE_NO_SCALE: @@ -582,7 +588,6 @@ * settings. */ - /* No panel fitting yet, fixme */ if (IS_IGDNG(dev)) return; --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/i915/i915_reg.h +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/i915/i915_reg.h @@ -915,6 +915,8 @@ #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) +#define BLC_HIST_CTL 0x61260 + /* TV port control */ #define TV_CTL 0x68000 /** Enables the TV encoder */ @@ -1616,6 +1618,11 @@ #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) #define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) +#define PIPE_BPC_MASK (7 << 5) /* Ironlake */ +#define PIPE_8BPC (0 << 5) +#define PIPE_10BPC (1 << 5) +#define PIPE_6BPC (2 << 5) +#define PIPE_12BPC (3 << 5) #define DSPARB 0x70030 #define DSPARB_CSTART_MASK (0x7f << 7) @@ -1733,6 +1740,7 @@ #define DISPPLANE_NO_LINE_DOUBLE 0 #define DISPPLANE_STEREO_POLARITY_FIRST 0 #define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) +#define DISPPLANE_TRICKLE_FEED_DISABLE (1<<14) /* IGDNG */ #define DISPPLANE_TILED (1<<10) #define DSPAADDR 0x70184 #define DSPASTRIDE 0x70188 @@ -1865,8 +1873,15 @@ #define PFA_CTL_1 0x68080 #define PFB_CTL_1 0x68880 #define PF_ENABLE (1<<31) +#define PF_FILTER_MASK (3<<23) +#define PF_FILTER_PROGRAMMED (0<<23) +#define PF_FILTER_MED_3x3 (1<<23) +#define PF_FILTER_EDGE_ENHANCE (2<<23) +#define PF_FILTER_EDGE_SOFTEN (3<<23) #define PFA_WIN_SZ 0x68074 #define PFB_WIN_SZ 0x68874 +#define PFA_WIN_POS 0x68070 +#define PFB_WIN_POS 0x68870 /* legacy palette */ #define LGC_PALETTE_A 0x4a000 @@ -1913,6 +1928,9 @@ #define GTIIR 0x44018 #define GTIER 0x4401c +#define DISP_ARB_CTL 0x45000 +#define DISP_TILE_SURFACE_SWIZZLING (1<<13) + /* PCH */ /* south display engine interrupt */ @@ -1921,6 +1939,7 @@ #define SDE_PORTC_HOTPLUG (1 << 9) #define SDE_PORTB_HOTPLUG (1 << 8) #define SDE_SDVOB_HOTPLUG (1 << 6) +#define SDE_HOTPLUG_MASK (0xf << 8) #define SDEISR 0xc4000 #define SDEIMR 0xc4004 @@ -1979,11 +1998,11 @@ #define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) #define DREF_SSC_SOURCE_DISABLE (0<<11) #define DREF_SSC_SOURCE_ENABLE (2<<11) -#define DREF_SSC_SOURCE_MASK (2<<11) +#define DREF_SSC_SOURCE_MASK (3<<11) #define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) #define DREF_NONSPREAD_CK505_ENABLE (1<<9) #define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) -#define DREF_NONSPREAD_SOURCE_MASK (2<<9) +#define DREF_NONSPREAD_SOURCE_MASK (3<<9) #define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) #define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) #define DREF_SSC4_DOWNSPREAD (0<<6) --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/r128/r128_cce.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/r128/r128_cce.c @@ -353,6 +353,11 @@ DRM_DEBUG("\n"); + if (dev->dev_private) { + DRM_DEBUG("called when already initialized\n"); + return -EINVAL; + } + dev_priv = kzalloc(sizeof(drm_r128_private_t), GFP_KERNEL); if (dev_priv == NULL) return -ENOMEM; @@ -649,6 +654,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) { DRM_DEBUG("while CCE running\n"); return 0; @@ -671,6 +678,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + /* Flush any pending CCE commands. This ensures any outstanding * commands are exectuted by the engine before we turn it off. */ @@ -708,10 +717,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - if (!dev_priv) { - DRM_DEBUG("called before init done\n"); - return -EINVAL; - } + DEV_INIT_TEST_WITH_RETURN(dev_priv); r128_do_cce_reset(dev_priv); @@ -728,6 +734,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + if (dev_priv->cce_running) { r128_do_cce_flush(dev_priv); } @@ -741,6 +749,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev->dev_private); + return r128_do_engine_reset(dev); } --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/r128/r128_state.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/r128/r128_state.c @@ -1244,14 +1244,18 @@ static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_r128_private_t *dev_priv = dev->dev_private; - drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_r128_sarea_t *sarea_priv; drm_r128_clear_t *clear = data; DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + RING_SPACE_TEST_WITH_RETURN(dev_priv); + sarea_priv = dev_priv->sarea_priv; + if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; @@ -1312,6 +1316,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + RING_SPACE_TEST_WITH_RETURN(dev_priv); if (!dev_priv->page_flipping) @@ -1331,6 +1337,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + RING_SPACE_TEST_WITH_RETURN(dev_priv); if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) @@ -1354,10 +1362,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } + DEV_INIT_TEST_WITH_RETURN(dev_priv); DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n", DRM_CURRENTPID, vertex->idx, vertex->count, vertex->discard); @@ -1410,10 +1415,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } + DEV_INIT_TEST_WITH_RETURN(dev_priv); DRM_DEBUG("pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID, elts->idx, elts->start, elts->end, elts->discard); @@ -1476,6 +1478,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + DRM_DEBUG("pid=%d index=%d\n", DRM_CURRENTPID, blit->idx); if (blit->idx < 0 || blit->idx >= dma->buf_count) { @@ -1501,6 +1505,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + RING_SPACE_TEST_WITH_RETURN(dev_priv); ret = -EINVAL; @@ -1531,6 +1537,8 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); + DEV_INIT_TEST_WITH_RETURN(dev_priv); + if (DRM_COPY_FROM_USER(&mask, stipple->mask, 32 * sizeof(u32))) return -EFAULT; @@ -1555,10 +1563,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } + DEV_INIT_TEST_WITH_RETURN(dev_priv); DRM_DEBUG("idx=%d s=%d e=%d d=%d\n", indirect->idx, indirect->start, indirect->end, @@ -1620,10 +1625,7 @@ drm_r128_getparam_t *param = data; int value; - if (!dev_priv) { - DRM_ERROR("called with no initialization\n"); - return -EINVAL; - } + DEV_INIT_TEST_WITH_RETURN(dev_priv); DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/r128/r128_drv.h +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/r128/r128_drv.h @@ -422,6 +422,14 @@ * Misc helper macros */ +#define DEV_INIT_TEST_WITH_RETURN(_dev_priv) \ +do { \ + if (!_dev_priv) { \ + DRM_ERROR("called with no initialization\n"); \ + return -EINVAL; \ + } \ +} while (0) + #define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ do { \ drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/radeon/radeon_drv.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/radeon/radeon_drv.c @@ -328,8 +328,8 @@ #endif /* if enabled by default */ if (radeon_modeset == -1) { - DRM_INFO("radeon default to kernel modesetting.\n"); - radeon_modeset = 1; + DRM_INFO("radeon default to kernel modesetting DISABLED.\n"); + radeon_modeset = 0; } if (radeon_modeset == 1) { DRM_INFO("radeon kernel modesetting enabled.\n"); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/radeon/radeon_legacy_crtc.c @@ -291,8 +291,7 @@ uint32_t mask; if (radeon_crtc->crtc_id) - mask = (RADEON_CRTC2_EN | - RADEON_CRTC2_DISP_DIS | + mask = (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B); @@ -304,7 +303,7 @@ switch (mode) { case DRM_MODE_DPMS_ON: if (radeon_crtc->crtc_id) - WREG32_P(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask); + WREG32_P(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~(RADEON_CRTC2_EN | mask)); else { WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B)); @@ -318,7 +317,7 @@ case DRM_MODE_DPMS_OFF: drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id); if (radeon_crtc->crtc_id) - WREG32_P(RADEON_CRTC2_GEN_CNTL, mask, ~mask); + WREG32_P(RADEON_CRTC2_GEN_CNTL, mask, ~(RADEON_CRTC2_EN | mask)); else { WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B)); --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/radeon/radeon_fb.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/radeon/radeon_fb.c @@ -120,7 +120,7 @@ struct drm_framebuffer *fb = &rfb->base; int depth; - if (var->pixclock == -1 || !var->pixclock) { + if (var->pixclock != 0) { return -EINVAL; } /* Need to resize the fb object !!! */ @@ -234,7 +234,7 @@ int ret; int i; - if (var->pixclock != -1) { + if (var->pixclock != 0) { DRM_ERROR("PIXEL CLCOK SET\n"); return -EINVAL; } @@ -828,7 +828,7 @@ rfbdev->crtc_count = crtc_count; if (new_fb) { - info->var.pixclock = -1; + info->var.pixclock = 0; if (register_framebuffer(info) < 0) return -EINVAL; } else { --- linux-fsl-imx51-2.6.31.orig/drivers/gpu/drm/radeon/radeon_atombios.c +++ linux-fsl-imx51-2.6.31/drivers/gpu/drm/radeon/radeon_atombios.c @@ -134,6 +134,14 @@ } } + /* HIS X1300 is DVI+VGA, not DVI+DVI */ + if ((dev->pdev->device == 0x7146) && + (dev->pdev->subsystem_vendor == 0x17af) && + (dev->pdev->subsystem_device == 0x2058)) { + if (supported_device == ATOM_DEVICE_DFP1_SUPPORT) + return false; + } + /* Funky macbooks */ if ((dev->pdev->device == 0x71C5) && (dev->pdev->subsystem_vendor == 0x106b) && --- linux-fsl-imx51-2.6.31.orig/drivers/media/common/tuners/tda18271-fe.c +++ linux-fsl-imx51-2.6.31/drivers/media/common/tuners/tda18271-fe.c @@ -595,13 +595,13 @@ case RF2: map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - prog_cal[RF1] + prog_tab[RF1]) / - ((rf_freq[RF2] - rf_freq[RF1]) / 1000); + (s32)((rf_freq[RF2] - rf_freq[RF1]) / 1000); map[i].rf2 = rf_freq[RF2] / 1000; break; case RF3: map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - prog_cal[RF2] + prog_tab[RF2]) / - ((rf_freq[RF3] - rf_freq[RF2]) / 1000); + (s32)((rf_freq[RF3] - rf_freq[RF2]) / 1000); map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; map[i].rf3 = rf_freq[RF3] / 1000; break; @@ -963,12 +963,12 @@ struct tda18271_std_map_item *map; char *mode; int ret; - u32 freq = params->frequency * 62500; + u32 freq = params->frequency * 125 * + ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2; priv->mode = TDA18271_ANALOG; if (params->mode == V4L2_TUNER_RADIO) { - freq = freq / 1000; map = &std_map->fm_radio; mode = "fm"; } else if (params->std & V4L2_STD_MN) { --- linux-fsl-imx51-2.6.31.orig/drivers/media/common/tuners/mxl5007t.c +++ linux-fsl-imx51-2.6.31/drivers/media/common/tuners/mxl5007t.c @@ -196,7 +196,7 @@ i = j = 0; while (reg_pair1[i].reg || reg_pair1[i].val) { - while (reg_pair2[j].reg || reg_pair2[j].reg) { + while (reg_pair2[j].reg || reg_pair2[j].val) { if (reg_pair1[i].reg != reg_pair2[j].reg) { j++; continue; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/v4l1-compat.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/v4l1-compat.c @@ -565,10 +565,9 @@ break; } chan->norm = 0; - err = drv(file, VIDIOC_G_STD, &sid); - if (err < 0) - dprintk("VIDIOCGCHAN / VIDIOC_G_STD: %ld\n", err); - if (err == 0) { + /* Note: G_STD might not be present for radio receivers, + * so we should ignore any errors. */ + if (drv(file, VIDIOC_G_STD, &sid) == 0) { if (sid & V4L2_STD_PAL) chan->norm = VIDEO_MODE_PAL; if (sid & V4L2_STD_NTSC) @@ -777,10 +776,9 @@ tun->flags |= VIDEO_TUNER_SECAM; } - err = drv(file, VIDIOC_G_STD, &sid); - if (err < 0) - dprintk("VIDIOCGTUNER / VIDIOC_G_STD: %ld\n", err); - if (err == 0) { + /* Note: G_STD might not be present for radio receivers, + * so we should ignore any errors. */ + if (drv(file, VIDIOC_G_STD, &sid) == 0) { if (sid & V4L2_STD_PAL) tun->mode = VIDEO_MODE_PAL; if (sid & V4L2_STD_NTSC) --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/pxp.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/pxp.h @@ -0,0 +1,127 @@ +/* + * Freescale STMP378X PxP driver + * + * Author: Matt Porter + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +struct pxp_overlay_registers { + u32 ol; + u32 olsize; + u32 olparam; + u32 olparam2; +}; + +/* Registers feed for PXP_NEXT */ +struct pxp_registers { + u32 ctrl; + u32 rgbbuf; + u32 rgbbuf2; + u32 rgbsize; + u32 s0buf; + u32 s0ubuf; + u32 s0vbuf; + u32 s0param; + u32 s0background; + u32 s0crop; + u32 s0scale; + u32 s0offset; + u32 s0colorkeylow; + u32 s0colorkeyhigh; + u32 olcolorkeylow; + u32 olcolorkeyhigh; + + struct pxp_overlay_registers ol0; + struct pxp_overlay_registers ol1; + struct pxp_overlay_registers ol2; + struct pxp_overlay_registers ol3; + struct pxp_overlay_registers ol4; + struct pxp_overlay_registers ol5; + struct pxp_overlay_registers ol6; + struct pxp_overlay_registers ol7; +}; + +struct pxp_buffer { + /* Must be first! */ + struct videobuf_buffer vb; + struct list_head queue; +}; + +struct pxps { + struct platform_device *pdev; + struct resource *res; + int irq; + void __iomem *regs; + + struct work_struct work; + struct workqueue_struct *workqueue; + spinlock_t lock; + struct mutex mutex; + int users; + + struct video_device *vdev; + + struct videobuf_queue s0_vbq; + struct videobuf_buffer *active; + struct list_head outq; + struct list_head nextq; + + int output; + u32 *outb; + dma_addr_t outb_phys; + + /* Current S0 configuration */ + struct pxp_data_format *s0_fmt; + u32 s0_width; + u32 s0_height; + u32 s0_bgcolor; + u32 s0_chromakey; + + struct v4l2_framebuffer fb; + struct v4l2_rect drect; + struct v4l2_rect srect; + + /* Transformation support */ + int scaling; + int hflip; + int vflip; + int rotate; + int yuv; + + /* Output overlay support */ + int overlay_state; + int global_alpha_state; + u8 global_alpha; + int local_alpha_state; + int s1_chromakey_state; + u32 s1_chromakey; + + /* PXP_NEXT */ + u32 regs_phys; + struct pxp_registers *regs_virt; + wait_queue_head_t done; + int next_queue_ended; +}; + +struct pxp_data_format { + char *name; + unsigned int bpp; + u32 fourcc; + enum v4l2_colorspace colorspace; + u32 ctrl_s0_fmt; +}; + +extern int stmp3xxxfb_get_info(struct fb_var_screeninfo *var, + struct fb_fix_screeninfo *fix); +extern void stmp3xxxfb_cfg_pxp(int enable, dma_addr_t pxp_phys); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/s2255drv.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/s2255drv.c @@ -598,11 +598,6 @@ buf = list_entry(dma_q->active.next, struct s2255_buffer, vb.queue); - if (!waitqueue_active(&buf->vb.done)) { - /* no one active */ - rc = -1; - goto unlock; - } list_del(&buf->vb.queue); do_gettimeofday(&buf->vb.ts); dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/media/video/Kconfig @@ -550,6 +550,45 @@ Check out for more information. +config VIDEO_MXC_CAMERA + tristate "MXC Video For Linux Camera" + depends on VIDEO_DEV && ARCH_MXC + default y + ---help--- + This is the video4linux2 capture driver based on MXC IPU/eMMA module. + +source "drivers/media/video/mxc/capture/Kconfig" + +config VIDEO_MXC_OUTPUT + tristate "MXC Video For Linux Video Output" + depends on VIDEO_DEV && ARCH_MXC + default y + ---help--- + This is the video4linux2 output driver based on MXC IPU/eMMA module. + +source "drivers/media/video/mxc/output/Kconfig" + +config VIDEO_PXP + tristate "STMP3xxx PxP" + depends on VIDEO_DEV && VIDEO_V4L2 && ARCH_STMP3XXX + select VIDEOBUF_DMA_CONTIG + ---help--- + This is a video4linux driver for the Freescale PxP + (Pixel Pipeline). This module supports output overlay of + the STMP3xxx framebuffer on a video stream. + + To compile this driver as a module, choose M here: the + module will be called pxp. + +config VIDEO_MXC_OPL + tristate + depends on VIDEO_DEV && ARCH_MXC + default n + ---help--- + This is the ARM9-optimized OPL (Open Primitives Library) software + rotation/mirroring implementation. It may be used by eMMA video + capture or output device. + config VIDEO_CPIA tristate "CPiA Video For Linux" depends on VIDEO_V4L1 --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/pxp.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/pxp.c @@ -0,0 +1,1389 @@ +/* + * Freescale STMP378X PxP driver + * + * Author: Matt Porter + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "pxp.h" + +#define PXP_DRIVER_NAME "stmp3xxx-pxp" +#define PXP_DRIVER_MAJOR 1 +#define PXP_DRIVER_MINOR 0 + +#define PXP_DEF_BUFS 2 +#define PXP_MIN_PIX 8 + +#define V4L2_OUTPUT_TYPE_INTERNAL 4 + +#define PXP_WAITCON ((__raw_readl(HW_PXP_NEXT_ADDR) & BM_PXP_NEXT_ENABLED) \ + != BM_PXP_NEXT_ENABLED) + +#define REG_OFFSET 0x10 +#define REGS1_NUMS 16 +#define REGS2_NUMS 5 +#define REGS3_NUMS 32 +static u32 regs1[REGS1_NUMS]; +static u32 regs2[REGS2_NUMS]; +static u32 regs3[REGS3_NUMS]; + +static struct pxp_data_format pxp_s0_formats[] = { + { + .name = "24-bit RGB", + .bpp = 4, + .fourcc = V4L2_PIX_FMT_RGB24, + .colorspace = V4L2_COLORSPACE_SRGB, + .ctrl_s0_fmt = BV_PXP_CTRL_S0_FORMAT__RGB888, + }, { + .name = "16-bit RGB 5:6:5", + .bpp = 2, + .fourcc = V4L2_PIX_FMT_RGB565, + .colorspace = V4L2_COLORSPACE_SRGB, + .ctrl_s0_fmt = BV_PXP_CTRL_S0_FORMAT__RGB565, + }, { + .name = "16-bit RGB 5:5:5", + .bpp = 2, + .fourcc = V4L2_PIX_FMT_RGB555, + .colorspace = V4L2_COLORSPACE_SRGB, + .ctrl_s0_fmt = BV_PXP_CTRL_S0_FORMAT__RGB555, + }, { + .name = "YUV 4:2:0 Planar", + .bpp = 2, + .fourcc = V4L2_PIX_FMT_YUV420, + .colorspace = V4L2_COLORSPACE_JPEG, + .ctrl_s0_fmt = BV_PXP_CTRL_S0_FORMAT__YUV420, + }, { + .name = "YUV 4:2:2 Planar", + .bpp = 2, + .fourcc = V4L2_PIX_FMT_YUV422P, + .colorspace = V4L2_COLORSPACE_JPEG, + .ctrl_s0_fmt = BV_PXP_CTRL_S0_FORMAT__YUV422, + }, +}; + +struct v4l2_queryctrl pxp_controls[] = { + { + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Horizontal Flip", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + .flags = 0, + }, { + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Vertical Flip", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + .flags = 0, + }, { + .id = V4L2_CID_PRIVATE_BASE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Rotation", + .minimum = 0, + .maximum = 270, + .step = 90, + .default_value = 0, + .flags = 0, + }, { + .id = V4L2_CID_PRIVATE_BASE + 1, + .name = "Background Color", + .minimum = 0, + .maximum = 0xFFFFFF, + .step = 1, + .default_value = 0, + .flags = 0, + .type = V4L2_CTRL_TYPE_INTEGER, + }, { + .id = V4L2_CID_PRIVATE_BASE + 2, + .name = "Set S0 Chromakey", + .minimum = -1, + .maximum = 0xFFFFFF, + .step = 1, + .default_value = -1, + .flags = 0, + .type = V4L2_CTRL_TYPE_INTEGER, + }, { + .id = V4L2_CID_PRIVATE_BASE + 3, + .name = "YUV Colorspace", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + .flags = 0, + .type = V4L2_CTRL_TYPE_BOOLEAN, + }, +}; + +static void pxp_set_ctrl(struct pxps *pxp) +{ + u32 ctrl; + + ctrl = BF(pxp->s0_fmt->ctrl_s0_fmt, PXP_CTRL_S0_FORMAT); + ctrl |= + BF(BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB888, PXP_CTRL_OUTPUT_RGB_FORMAT); + ctrl |= BM_PXP_CTRL_CROP; + + if (pxp->scaling) + ctrl |= BM_PXP_CTRL_SCALE; + if (pxp->vflip) + ctrl |= BM_PXP_CTRL_VFLIP; + if (pxp->hflip) + ctrl |= BM_PXP_CTRL_HFLIP; + if (pxp->rotate) + ctrl |= BF(pxp->rotate/90, PXP_CTRL_ROTATE); + + ctrl |= BM_PXP_CTRL_IRQ_ENABLE; + if (pxp->active) + ctrl |= BM_PXP_CTRL_ENABLE; + + __raw_writel(ctrl, HW_PXP_CTRL_ADDR); + pxp->regs_virt->ctrl = ctrl; +} + +static void pxp_set_rgbbuf(struct pxps *pxp) +{ + pxp->regs_virt->rgbbuf = pxp->outb_phys; + /* Always equal to the FB size */ + pxp->regs_virt->rgbsize = BF(pxp->fb.fmt.width, PXP_RGBSIZE_WIDTH) | + BF(pxp->fb.fmt.height, PXP_RGBSIZE_HEIGHT); +} + +static void pxp_set_s0colorkey(struct pxps *pxp) +{ + /* Low and high are set equal. V4L does not allow a chromakey range */ + if (pxp->s0_chromakey == -1) { + /* disable color key */ + pxp->regs_virt->s0colorkeylow = 0xFFFFFF; + pxp->regs_virt->s0colorkeyhigh = 0; + } else { + pxp->regs_virt->s0colorkeylow = pxp->s0_chromakey; + pxp->regs_virt->s0colorkeyhigh = pxp->s0_chromakey; + } +} + +static void pxp_set_s1colorkey(struct pxps *pxp) +{ + /* Low and high are set equal. V4L does not allow a chromakey range */ + if (pxp->s1_chromakey_state != 0 && pxp->s1_chromakey != -1) { + pxp->regs_virt->olcolorkeylow = pxp->s1_chromakey; + pxp->regs_virt->olcolorkeyhigh = pxp->s1_chromakey; + } else { + /* disable color key */ + pxp->regs_virt->olcolorkeylow = 0xFFFFFF; + pxp->regs_virt->olcolorkeyhigh = 0; + } +} + +static void pxp_set_oln(struct pxps *pxp) +{ + pxp->regs_virt->ol0.ol = (u32)pxp->fb.base; + pxp->regs_virt->ol0.olsize = + BF(pxp->fb.fmt.width >> 3, PXP_OLnSIZE_WIDTH) | + BF(pxp->fb.fmt.height >> 3, PXP_OLnSIZE_HEIGHT); +} + +static void pxp_set_olparam(struct pxps *pxp) +{ + u32 olparam; + struct v4l2_pix_format *fmt = &pxp->fb.fmt; + + olparam = BF(pxp->global_alpha, PXP_OLnPARAM_ALPHA); + if (fmt->pixelformat == V4L2_PIX_FMT_RGB24) + olparam |= + BF(BV_PXP_OLnPARAM_FORMAT__RGB888, PXP_OLnPARAM_FORMAT); + else + olparam |= + BF(BV_PXP_OLnPARAM_FORMAT__RGB565, PXP_OLnPARAM_FORMAT); + if (pxp->global_alpha_state) + olparam |= BF(BV_PXP_OLnPARAM_ALPHA_CNTL__Override, + PXP_OLnPARAM_ALPHA_CNTL); + if (pxp->s1_chromakey_state) + olparam |= BM_PXP_OLnPARAM_ENABLE_COLORKEY; + if (pxp->overlay_state) + olparam |= BM_PXP_OLnPARAM_ENABLE; + + pxp->regs_virt->ol0.olparam = olparam; +} + +static void pxp_set_s0param(struct pxps *pxp) +{ + u32 s0param; + + s0param = BF(pxp->drect.left >> 3, PXP_S0PARAM_XBASE); + s0param |= BF(pxp->drect.top >> 3, PXP_S0PARAM_YBASE); + s0param |= BF(pxp->s0_width >> 3, PXP_S0PARAM_WIDTH); + s0param |= BF(pxp->s0_height >> 3, PXP_S0PARAM_HEIGHT); + pxp->regs_virt->s0param = s0param; +} + +static void pxp_set_s0crop(struct pxps *pxp) +{ + u32 s0crop; + + s0crop = BF(pxp->srect.left >> 3, PXP_S0CROP_XBASE); + s0crop |= BF(pxp->srect.top >> 3, PXP_S0CROP_YBASE); + s0crop |= BF(pxp->drect.width >> 3, PXP_S0CROP_WIDTH); + s0crop |= BF(pxp->drect.height >> 3, PXP_S0CROP_HEIGHT); + pxp->regs_virt->s0crop = s0crop; +} + +static int pxp_set_scaling(struct pxps *pxp) +{ + int ret = 0; + u32 xscale, yscale, s0scale; + + if ((pxp->s0_fmt->fourcc != V4L2_PIX_FMT_YUV420) && + (pxp->s0_fmt->fourcc != V4L2_PIX_FMT_YUV422P)) { + pxp->scaling = 0; + ret = -EINVAL; + goto out; + } + + if ((pxp->srect.width == pxp->drect.width) && + (pxp->srect.height == pxp->drect.height)) { + pxp->scaling = 0; + goto out; + } + + pxp->scaling = 1; + xscale = pxp->srect.width * 0x1000 / pxp->drect.width; + yscale = pxp->srect.height * 0x1000 / pxp->drect.height; + s0scale = BF(yscale, PXP_S0SCALE_YSCALE) | + BF(xscale, PXP_S0SCALE_XSCALE); + pxp->regs_virt->s0scale = s0scale; + +out: + pxp_set_ctrl(pxp); + + return ret; +} + +static int pxp_set_fbinfo(struct pxps *pxp) +{ + struct fb_var_screeninfo var; + struct fb_fix_screeninfo fix; + struct v4l2_framebuffer *fb = &pxp->fb; + int err; + + err = stmp3xxxfb_get_info(&var, &fix); + + fb->fmt.width = var.xres; + fb->fmt.height = var.yres; + if (var.bits_per_pixel == 16) + fb->fmt.pixelformat = V4L2_PIX_FMT_RGB565; + else + fb->fmt.pixelformat = V4L2_PIX_FMT_RGB24; + fb->base = (void *)fix.smem_start; + return err; +} + +static void pxp_set_s0bg(struct pxps *pxp) +{ + pxp->regs_virt->s0background = pxp->s0_bgcolor; +} + +static void pxp_set_csc(struct pxps *pxp) +{ + if (pxp->yuv) { + /* YUV colorspace */ + __raw_writel(0x04030000, HW_PXP_CSCCOEFF0_ADDR); + __raw_writel(0x01230208, HW_PXP_CSCCOEFF1_ADDR); + __raw_writel(0x076b079c, HW_PXP_CSCCOEFF2_ADDR); + } else { + /* YCrCb colorspace */ + __raw_writel(0x84ab01f0, HW_PXP_CSCCOEFF0_ADDR); + __raw_writel(0x01230204, HW_PXP_CSCCOEFF1_ADDR); + __raw_writel(0x0730079c, HW_PXP_CSCCOEFF2_ADDR); + } +} + +static int pxp_set_cstate(struct pxps *pxp, struct v4l2_control *vc) +{ + + if (vc->id == V4L2_CID_HFLIP) + pxp->hflip = vc->value; + else if (vc->id == V4L2_CID_VFLIP) + pxp->vflip = vc->value; + else if (vc->id == V4L2_CID_PRIVATE_BASE) { + if (vc->value % 90) + return -ERANGE; + pxp->rotate = vc->value; + } else if (vc->id == V4L2_CID_PRIVATE_BASE + 1) { + pxp->s0_bgcolor = vc->value; + pxp_set_s0bg(pxp); + } else if (vc->id == V4L2_CID_PRIVATE_BASE + 2) { + pxp->s0_chromakey = vc->value; + pxp_set_s0colorkey(pxp); + } else if (vc->id == V4L2_CID_PRIVATE_BASE + 3) { + pxp->yuv = vc->value; + pxp_set_csc(pxp); + } + + pxp_set_ctrl(pxp); + + return 0; +} + +static int pxp_get_cstate(struct pxps *pxp, struct v4l2_control *vc) +{ + if (vc->id == V4L2_CID_HFLIP) + vc->value = pxp->hflip; + else if (vc->id == V4L2_CID_VFLIP) + vc->value = pxp->vflip; + else if (vc->id == V4L2_CID_PRIVATE_BASE) + vc->value = pxp->rotate; + else if (vc->id == V4L2_CID_PRIVATE_BASE + 1) + vc->value = pxp->s0_bgcolor; + else if (vc->id == V4L2_CID_PRIVATE_BASE + 2) + vc->value = pxp->s0_chromakey; + else if (vc->id == V4L2_CID_PRIVATE_BASE + 3) + vc->value = pxp->yuv; + + return 0; +} + +static int pxp_enumoutput(struct file *file, void *fh, + struct v4l2_output *o) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + if ((o->index < 0) || (o->index > 1)) + return -EINVAL; + + memset(o, 0, sizeof(struct v4l2_output)); + if (o->index == 0) { + strcpy(o->name, "PxP Display Output"); + pxp->output = 0; + } else { + strcpy(o->name, "PxP Virtual Output"); + pxp->output = 1; + } + o->type = V4L2_OUTPUT_TYPE_INTERNAL; + o->std = 0; + o->reserved[0] = pxp->outb_phys; + + return 0; +} + +static int pxp_g_output(struct file *file, void *fh, + unsigned int *i) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + *i = pxp->output; + + return 0; +} + +static int pxp_s_output(struct file *file, void *fh, + unsigned int i) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct v4l2_pix_format *fmt = &pxp->fb.fmt; + int bpp; + + if ((i < 0) || (i > 1)) + return -EINVAL; + + if (pxp->outb) + goto out; + + /* Output buffer is same format as fbdev */ + if (fmt->pixelformat == V4L2_PIX_FMT_RGB24) + bpp = 4; + else + bpp = 2; + + pxp->outb = kmalloc(fmt->width * fmt->height * bpp, GFP_KERNEL); + pxp->outb_phys = virt_to_phys(pxp->outb); + dma_map_single(NULL, pxp->outb, + fmt->width * fmt->height * bpp, DMA_TO_DEVICE); + +out: + pxp_set_rgbbuf(pxp); + + return 0; +} + +static int pxp_enum_fmt_video_output(struct file *file, void *fh, + struct v4l2_fmtdesc *fmt) +{ + enum v4l2_buf_type type = fmt->type; + int index = fmt->index; + + if ((fmt->index < 0) || (fmt->index >= ARRAY_SIZE(pxp_s0_formats))) + return -EINVAL; + + memset(fmt, 0, sizeof(struct v4l2_fmtdesc)); + fmt->index = index; + fmt->type = type; + fmt->pixelformat = pxp_s0_formats[index].fourcc; + strcpy(fmt->description, pxp_s0_formats[index].name); + + return 0; +} + +static int pxp_g_fmt_video_output(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct v4l2_pix_format *pf = &f->fmt.pix; + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct pxp_data_format *fmt = pxp->s0_fmt; + + pf->width = pxp->s0_width; + pf->height = pxp->s0_height; + pf->pixelformat = fmt->fourcc; + pf->field = V4L2_FIELD_NONE; + pf->bytesperline = fmt->bpp * pf->width; + pf->sizeimage = pf->bytesperline * pf->height; + pf->colorspace = fmt->colorspace; + pf->priv = 0; + + return 0; +} + +static struct pxp_data_format *pxp_get_format(struct v4l2_format *f) +{ + struct pxp_data_format *fmt; + int i; + + for (i = 0; i < ARRAY_SIZE(pxp_s0_formats); i++) { + fmt = &pxp_s0_formats[i]; + if (fmt->fourcc == f->fmt.pix.pixelformat) + break; + } + + if (i == ARRAY_SIZE(pxp_s0_formats)) + return NULL; + + return &pxp_s0_formats[i]; +} + +static int pxp_try_fmt_video_output(struct file *file, void *fh, + struct v4l2_format *f) +{ + int w = f->fmt.pix.width; + int h = f->fmt.pix.height; + struct pxp_data_format *fmt = pxp_get_format(f); + + if (!fmt) + return -EINVAL; + + w = min(w, 2040); + w = max(w, 8); + h = min(h, 2040); + h = max(h, 8); + f->fmt.pix.field = V4L2_FIELD_NONE; + f->fmt.pix.width = w; + f->fmt.pix.height = h; + f->fmt.pix.pixelformat = fmt->fourcc; + + return 0; +} + +static int pxp_s_fmt_video_output(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct v4l2_pix_format *pf = &f->fmt.pix; + int ret = pxp_try_fmt_video_output(file, fh, f); + + if (ret == 0) { + pxp->s0_fmt = pxp_get_format(f); + pxp->s0_width = pf->width; + pxp->s0_height = pf->height; + pxp_set_ctrl(pxp); + pxp_set_s0param(pxp); + } + + return ret; +} + +static int pxp_g_fmt_output_overlay(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct v4l2_window *wf = &f->fmt.win; + + memset(wf, 0, sizeof(struct v4l2_window)); + wf->chromakey = pxp->s1_chromakey; + wf->global_alpha = pxp->global_alpha; + wf->field = V4L2_FIELD_NONE; + wf->clips = NULL; + wf->clipcount = 0; + wf->bitmap = NULL; + wf->w.left = pxp->srect.left; + wf->w.top = pxp->srect.top; + wf->w.width = pxp->srect.width; + wf->w.height = pxp->srect.height; + + return 0; +} + +static int pxp_try_fmt_output_overlay(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct v4l2_window *wf = &f->fmt.win; + struct v4l2_rect srect; + u32 s1_chromakey = wf->chromakey; + u8 global_alpha = wf->global_alpha; + + memcpy(&srect, &(wf->w), sizeof(struct v4l2_rect)); + + pxp_g_fmt_output_overlay(file, fh, f); + + wf->chromakey = s1_chromakey; + wf->global_alpha = global_alpha; + + /* Constrain parameters to the input buffer */ + wf->w.left = srect.left; + wf->w.top = srect.top; + wf->w.width = min(srect.width, ((__s32)pxp->s0_width - wf->w.left)); + wf->w.height = min(srect.height, ((__s32)pxp->s0_height - wf->w.top)); + + return 0; +} + +static int pxp_s_fmt_output_overlay(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + struct v4l2_window *wf = &f->fmt.win; + int ret = pxp_try_fmt_output_overlay(file, fh, f); + + if (ret == 0) { + pxp->srect.left = wf->w.left; + pxp->srect.top = wf->w.top; + pxp->srect.width = wf->w.width; + pxp->srect.height = wf->w.height; + pxp->global_alpha = wf->global_alpha; + pxp->s1_chromakey = wf->chromakey; + pxp_set_s0param(pxp); + pxp_set_s0crop(pxp); + pxp_set_scaling(pxp); + pxp_set_olparam(pxp); + pxp_set_s1colorkey(pxp); + } + + return ret; +} + +static int pxp_reqbufs(struct file *file, void *priv, + struct v4l2_requestbuffers *r) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + return videobuf_reqbufs(&pxp->s0_vbq, r); +} + +static int pxp_querybuf(struct file *file, void *priv, + struct v4l2_buffer *b) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + return videobuf_querybuf(&pxp->s0_vbq, b); +} + +static int pxp_qbuf(struct file *file, void *priv, + struct v4l2_buffer *b) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + return videobuf_qbuf(&pxp->s0_vbq, b); +} + +static int pxp_dqbuf(struct file *file, void *priv, + struct v4l2_buffer *b) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + return videobuf_dqbuf(&pxp->s0_vbq, b, file->f_flags & O_NONBLOCK); +} + +static int pxp_streamon(struct file *file, void *priv, + enum v4l2_buf_type t) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + int ret = 0; + + if ((t != V4L2_BUF_TYPE_VIDEO_OUTPUT)) + return -EINVAL; + + ret = videobuf_streamon(&pxp->s0_vbq); + + if (!ret && (pxp->output == 0)) + stmp3xxxfb_cfg_pxp(1, pxp->outb_phys); + + return ret; +} + +static int pxp_streamoff(struct file *file, void *priv, + enum v4l2_buf_type t) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + int ret = 0; + + if ((t != V4L2_BUF_TYPE_VIDEO_OUTPUT)) + return -EINVAL; + + ret = videobuf_streamoff(&pxp->s0_vbq); + + if (!ret) + stmp3xxxfb_cfg_pxp(0, 0); + + return ret; +} + +static int pxp_buf_setup(struct videobuf_queue *q, + unsigned int *count, unsigned *size) +{ + struct pxps *pxp = q->priv_data; + + *size = pxp->s0_width * pxp->s0_height * pxp->s0_fmt->bpp; + + if (0 == *count) + *count = PXP_DEF_BUFS; + + return 0; +} + +static void pxp_buf_free(struct videobuf_queue *q, struct videobuf_buffer *vb) +{ + if (in_interrupt()) + BUG(); + + videobuf_dma_contig_free(q, vb); + + vb->state = VIDEOBUF_NEEDS_INIT; +} + +static int pxp_buf_prepare(struct videobuf_queue *q, + struct videobuf_buffer *vb, + enum v4l2_field field) +{ + struct pxps *pxp = q->priv_data; + int ret = 0; + + vb->width = pxp->s0_width; + vb->height = pxp->s0_height; + vb->size = vb->width * vb->height * pxp->s0_fmt->bpp; + vb->field = V4L2_FIELD_NONE; + vb->state = VIDEOBUF_NEEDS_INIT; + + ret = videobuf_iolock(q, vb, NULL); + if (ret) + goto fail; + vb->state = VIDEOBUF_PREPARED; + + return 0; + +fail: + pxp_buf_free(q, vb); + return ret; +} + +static void pxp_buf_next(struct pxps *pxp) +{ + dma_addr_t Y, U, V; + + if (pxp->active) { + pxp->active->state = VIDEOBUF_ACTIVE; + Y = videobuf_to_dma_contig(pxp->active); + pxp->regs_virt->s0buf = Y; + if ((pxp->s0_fmt->fourcc == V4L2_PIX_FMT_YUV420) || + (pxp->s0_fmt->fourcc == V4L2_PIX_FMT_YUV422P)) { + int s = 1; /* default to YUV 4:2:2 */ + if (pxp->s0_fmt->fourcc == V4L2_PIX_FMT_YUV420) + s = 2; + U = Y + (pxp->s0_width * pxp->s0_height); + V = U + ((pxp->s0_width * pxp->s0_height) >> s); + pxp->regs_virt->s0ubuf = U; + pxp->regs_virt->s0vbuf = V; + } + pxp->regs_virt->ctrl = + __raw_readl(HW_PXP_CTRL_ADDR) | BM_PXP_CTRL_ENABLE; + } + + __raw_writel(pxp->regs_phys, HW_PXP_NEXT_ADDR); +} + +static void pxp_next_handle(struct work_struct *w) +{ + struct pxps *pxp = container_of(w, struct pxps, work); + struct pxp_buffer *buf, *next; + unsigned long flags; + + if (pxp->next_queue_ended == 1) + return; + + spin_lock_irqsave(&pxp->lock, flags); + + while (!list_empty(&pxp->nextq)) { + spin_unlock_irqrestore(&pxp->lock, flags); + + if (!wait_event_interruptible_timeout(pxp->done, PXP_WAITCON, + 5 * HZ) || signal_pending(current)) { + spin_lock_irqsave(&pxp->lock, flags); + list_for_each_entry_safe(buf, next, &pxp->nextq, queue) + list_del(&buf->queue); + spin_unlock_irqrestore(&pxp->lock, flags); + pxp->next_queue_ended = 1; + return; + } + + spin_lock_irqsave(&pxp->lock, flags); + buf = list_entry(pxp->nextq.next, + struct pxp_buffer, + queue); + list_del_init(&buf->queue); + pxp->active = &buf->vb; + pxp->active->state = VIDEOBUF_QUEUED; + pxp_buf_next(pxp); + } + + spin_unlock_irqrestore(&pxp->lock, flags); +} + +static void pxp_buf_queue(struct videobuf_queue *q, + struct videobuf_buffer *vb) +{ + struct pxps *pxp = q->priv_data; + struct pxp_buffer *buf; + unsigned long flags; + + spin_lock_irqsave(&pxp->lock, flags); + + if (list_empty(&pxp->outq)) { + list_add_tail(&vb->queue, &pxp->outq); + vb->state = VIDEOBUF_QUEUED; + + pxp->active = vb; + pxp_buf_next(pxp); + } else { + list_add_tail(&vb->queue, &pxp->outq); + + buf = container_of(vb, struct pxp_buffer, vb); + list_add_tail(&buf->queue, &pxp->nextq); + queue_work(pxp->workqueue, &pxp->work); + } + + spin_unlock_irqrestore(&pxp->lock, flags); +} + +static void pxp_buf_release(struct videobuf_queue *q, + struct videobuf_buffer *vb) +{ + pxp_buf_free(q, vb); +} + +static struct videobuf_queue_ops pxp_vbq_ops = { + .buf_setup = pxp_buf_setup, + .buf_prepare = pxp_buf_prepare, + .buf_queue = pxp_buf_queue, + .buf_release = pxp_buf_release, +}; + +static int pxp_querycap(struct file *file, void *fh, + struct v4l2_capability *cap) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + memset(cap, 0, sizeof(*cap)); + strcpy(cap->driver, "pxp"); + strcpy(cap->card, "pxp"); + strlcpy(cap->bus_info, dev_name(&pxp->pdev->dev), sizeof(cap->bus_info)); + + cap->version = (PXP_DRIVER_MAJOR << 8) + PXP_DRIVER_MINOR; + + cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | + V4L2_CAP_VIDEO_OUTPUT_OVERLAY | + V4L2_CAP_STREAMING; + + return 0; +} + +static int pxp_g_fbuf(struct file *file, void *priv, + struct v4l2_framebuffer *fb) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + memset(fb, 0, sizeof(*fb)); + + fb->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | + V4L2_FBUF_CAP_CHROMAKEY | + V4L2_FBUF_CAP_LOCAL_ALPHA | + V4L2_FBUF_CAP_GLOBAL_ALPHA; + + if (pxp->global_alpha_state) + fb->flags |= V4L2_FBUF_FLAG_GLOBAL_ALPHA; + if (pxp->local_alpha_state) + fb->flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA; + if (pxp->s1_chromakey_state) + fb->flags |= V4L2_FBUF_FLAG_CHROMAKEY; + + return 0; +} + +static int pxp_s_fbuf(struct file *file, void *priv, + struct v4l2_framebuffer *fb) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + pxp->overlay_state = + (fb->flags & V4L2_FBUF_FLAG_OVERLAY) != 0; + pxp->global_alpha_state = + (fb->flags & V4L2_FBUF_FLAG_GLOBAL_ALPHA) != 0; + pxp->local_alpha_state = + (fb->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) != 0; + /* Global alpha overrides local alpha if both are requested */ + if (pxp->global_alpha_state && pxp->local_alpha_state) + pxp->local_alpha_state = 0; + pxp->s1_chromakey_state = + (fb->flags & V4L2_FBUF_FLAG_CHROMAKEY) != 0; + + pxp_set_olparam(pxp); + pxp_set_s0crop(pxp); + pxp_set_scaling(pxp); + + return 0; +} + +static int pxp_g_crop(struct file *file, void *fh, + struct v4l2_crop *c) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + if (c->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY) + return -EINVAL; + + c->c.left = pxp->drect.left; + c->c.top = pxp->drect.top; + c->c.width = pxp->drect.width; + c->c.height = pxp->drect.height; + + return 0; +} + +static int pxp_s_crop(struct file *file, void *fh, + struct v4l2_crop *c) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + int l = c->c.left; + int t = c->c.top; + int w = c->c.width; + int h = c->c.height; + int fbw = pxp->fb.fmt.width; + int fbh = pxp->fb.fmt.height; + + if (c->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY) + return -EINVAL; + + /* Constrain parameters to FB limits */ + w = min(w, fbw); + w = max(w, PXP_MIN_PIX); + h = min(h, fbh); + h = max(h, PXP_MIN_PIX); + if ((l + w) > fbw) + l = 0; + if ((t + h) > fbh) + t = 0; + + /* Round up values to PxP pixel block */ + l = roundup(l, PXP_MIN_PIX); + t = roundup(t, PXP_MIN_PIX); + w = roundup(w, PXP_MIN_PIX); + h = roundup(h, PXP_MIN_PIX); + + pxp->drect.left = l; + pxp->drect.top = t; + pxp->drect.width = w; + pxp->drect.height = h; + + pxp_set_s0param(pxp); + pxp_set_s0crop(pxp); + pxp_set_scaling(pxp); + + return 0; +} + +static int pxp_queryctrl(struct file *file, void *priv, + struct v4l2_queryctrl *qc) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(pxp_controls); i++) + if (qc->id && qc->id == pxp_controls[i].id) { + memcpy(qc, &(pxp_controls[i]), sizeof(*qc)); + return 0; + } + + return -EINVAL; +} + +static int pxp_g_ctrl(struct file *file, void *priv, + struct v4l2_control *vc) +{ + int i; + + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + for (i = 0; i < ARRAY_SIZE(pxp_controls); i++) + if (vc->id == pxp_controls[i].id) + return pxp_get_cstate(pxp, vc); + + return -EINVAL; +} + +static int pxp_s_ctrl(struct file *file, void *priv, + struct v4l2_control *vc) +{ + int i; + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + for (i = 0; i < ARRAY_SIZE(pxp_controls); i++) + if (vc->id == pxp_controls[i].id) { + if (vc->value < pxp_controls[i].minimum || + vc->value > pxp_controls[i].maximum) + return -ERANGE; + return pxp_set_cstate(pxp, vc); + } + + return -EINVAL; +} + +void pxp_release(struct video_device *vfd) +{ + struct pxps *pxp = video_get_drvdata(vfd); + + spin_lock(&pxp->lock); + video_device_release(vfd); + spin_unlock(&pxp->lock); +} + +static int pxp_hw_init(struct pxps *pxp) +{ + struct fb_var_screeninfo var; + struct fb_fix_screeninfo fix; + int err; + + err = stmp3xxxfb_get_info(&var, &fix); + if (err) + return err; + + /* Pull PxP out of reset */ + __raw_writel(0, HW_PXP_CTRL_ADDR); + + /* Config defaults */ + pxp->active = NULL; + + pxp->s0_fmt = &pxp_s0_formats[0]; + pxp->drect.left = pxp->srect.left = 0; + pxp->drect.top = pxp->srect.top = 0; + pxp->drect.width = pxp->srect.width = pxp->s0_width = var.xres; + pxp->drect.height = pxp->srect.height = pxp->s0_height = var.yres; + pxp->s0_bgcolor = 0; + + pxp->output = 0; + err = pxp_set_fbinfo(pxp); + if (err) + return err; + + pxp->scaling = 0; + pxp->hflip = 0; + pxp->vflip = 0; + pxp->rotate = 0; + pxp->yuv = 0; + + pxp->overlay_state = 0; + pxp->global_alpha_state = 0; + pxp->global_alpha = 0; + pxp->local_alpha_state = 0; + pxp->s1_chromakey_state = 0; + pxp->s1_chromakey = -1; + pxp->s0_chromakey = -1; + + /* Write default h/w config */ + pxp_set_ctrl(pxp); + pxp_set_s0param(pxp); + pxp_set_s0crop(pxp); + pxp_set_oln(pxp); + pxp_set_olparam(pxp); + pxp_set_s0colorkey(pxp); + pxp_set_s1colorkey(pxp); + pxp_set_csc(pxp); + + return 0; +} + +static int pxp_open(struct file *file) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + int ret = 0; + + mutex_lock(&pxp->mutex); + pxp->users++; + + if (pxp->users > 1) { + pxp->users--; + ret = -EBUSY; + goto out; + } +out: + mutex_unlock(&pxp->mutex); + if (ret) + return ret; + + pxp->next_queue_ended = 0; + pxp->workqueue = create_singlethread_workqueue("pxp"); + + videobuf_queue_dma_contig_init(&pxp->s0_vbq, + &pxp_vbq_ops, + &pxp->pdev->dev, + &pxp->lock, + V4L2_BUF_TYPE_VIDEO_OUTPUT, + V4L2_FIELD_NONE, + sizeof(struct pxp_buffer), + pxp); + + return 0; +} + +static int pxp_close(struct file *file) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + + if (pxp->workqueue) + destroy_workqueue(pxp->workqueue); + + videobuf_stop(&pxp->s0_vbq); + videobuf_mmap_free(&pxp->s0_vbq); + pxp->active = NULL; + + mutex_lock(&pxp->mutex); + pxp->users--; + mutex_unlock(&pxp->mutex); + + return 0; +} + +static int pxp_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct pxps *pxp = video_get_drvdata(video_devdata(file)); + int ret; + + ret = videobuf_mmap_mapper(&pxp->s0_vbq, vma); + + return ret; +} + +static const struct v4l2_file_operations pxp_fops = { + .owner = THIS_MODULE, + .open = pxp_open, + .release = pxp_close, + .ioctl = video_ioctl2, + .mmap = pxp_mmap, +}; + +static const struct v4l2_ioctl_ops pxp_ioctl_ops = { + .vidioc_querycap = pxp_querycap, + + .vidioc_reqbufs = pxp_reqbufs, + .vidioc_querybuf = pxp_querybuf, + .vidioc_qbuf = pxp_qbuf, + .vidioc_dqbuf = pxp_dqbuf, + + .vidioc_streamon = pxp_streamon, + .vidioc_streamoff = pxp_streamoff, + + .vidioc_enum_output = pxp_enumoutput, + .vidioc_g_output = pxp_g_output, + .vidioc_s_output = pxp_s_output, + + .vidioc_enum_fmt_vid_out = pxp_enum_fmt_video_output, + .vidioc_try_fmt_vid_out = pxp_try_fmt_video_output, + .vidioc_g_fmt_vid_out = pxp_g_fmt_video_output, + .vidioc_s_fmt_vid_out = pxp_s_fmt_video_output, + + .vidioc_try_fmt_vid_out_overlay = pxp_try_fmt_output_overlay, + .vidioc_g_fmt_vid_out_overlay = pxp_g_fmt_output_overlay, + .vidioc_s_fmt_vid_out_overlay = pxp_s_fmt_output_overlay, + + .vidioc_g_fbuf = pxp_g_fbuf, + .vidioc_s_fbuf = pxp_s_fbuf, + + .vidioc_g_crop = pxp_g_crop, + .vidioc_s_crop = pxp_s_crop, + + .vidioc_queryctrl = pxp_queryctrl, + .vidioc_g_ctrl = pxp_g_ctrl, + .vidioc_s_ctrl = pxp_s_ctrl, +}; + +static const struct video_device pxp_template = { + .name = "PxP", + .vfl_type = VID_TYPE_OVERLAY | + VID_TYPE_CLIPPING | + VID_TYPE_SCALES, + .fops = &pxp_fops, + .release = pxp_release, + .minor = -1, + .ioctl_ops = &pxp_ioctl_ops, +}; + +static irqreturn_t pxp_irq(int irq, void *dev_id) +{ + struct pxps *pxp = (struct pxps *)dev_id; + struct videobuf_buffer *vb; + unsigned long flags; + + spin_lock_irqsave(&pxp->lock, flags); + + __raw_writel(BM_PXP_STAT_IRQ, HW_PXP_STAT_CLR_ADDR); + + if (list_empty(&pxp->outq)) { + pr_warning("irq: outq empty!!!\n"); + goto out; + } + + vb = list_entry(pxp->outq.next, + struct videobuf_buffer, + queue); + list_del_init(&vb->queue); + + vb->state = VIDEOBUF_DONE; + do_gettimeofday(&vb->ts); + vb->field_count++; + + wake_up(&vb->done); + wake_up(&pxp->done); +out: + spin_unlock_irqrestore(&pxp->lock, flags); + + return IRQ_HANDLED; +} + +static int pxp_probe(struct platform_device *pdev) +{ + struct pxps *pxp; + struct resource *res; + int irq; + int err = 0; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq = platform_get_irq(pdev, 0); + if (!res || irq < 0) { + err = -ENODEV; + goto exit; + } + + pxp = kzalloc(sizeof(*pxp), GFP_KERNEL); + if (!pxp) { + dev_err(&pdev->dev, "failed to allocate control object\n"); + err = -ENOMEM; + goto exit; + } + + dev_set_drvdata(&pdev->dev, pxp); + pxp->res = res; + pxp->irq = irq; + + pxp->regs_virt = dma_alloc_coherent(NULL, + PAGE_ALIGN(sizeof(struct pxp_registers)), + &pxp->regs_phys, GFP_KERNEL); + if (pxp->regs_virt == NULL) { + dev_err(&pdev->dev, "failed to allocate pxp_register object\n"); + err = -ENOMEM; + goto exit; + } + + init_waitqueue_head(&pxp->done); + + INIT_WORK(&pxp->work, pxp_next_handle); + INIT_LIST_HEAD(&pxp->outq); + INIT_LIST_HEAD(&pxp->nextq); + spin_lock_init(&pxp->lock); + mutex_init(&pxp->mutex); + + if (!request_mem_region(res->start, res->end - res->start + 1, + PXP_DRIVER_NAME)) { + err = -EBUSY; + goto freepxp; + } + + pxp->regs = (void __iomem *)res->start; /* it is already ioremapped */ + pxp->pdev = pdev; + + err = request_irq(pxp->irq, pxp_irq, 0, PXP_DRIVER_NAME, pxp); + + if (err) { + dev_err(&pdev->dev, "interrupt register failed\n"); + goto release; + } + + pxp->vdev = video_device_alloc(); + if (!pxp->vdev) { + dev_err(&pdev->dev, "video_device_alloc() failed\n"); + err = -ENOMEM; + goto freeirq; + } + + memcpy(pxp->vdev, &pxp_template, sizeof(pxp_template)); + video_set_drvdata(pxp->vdev, pxp); + + err = video_register_device(pxp->vdev, VFL_TYPE_GRABBER, 0); + if (err) { + dev_err(&pdev->dev, "failed to register video device\n"); + goto freevdev; + } + + err = pxp_hw_init(pxp); + if (err) { + dev_err(&pdev->dev, "failed to initialize hardware\n"); + goto freevdev; + } + + dev_info(&pdev->dev, "initialized\n"); + +exit: + return err; + +freevdev: + video_device_release(pxp->vdev); + +freeirq: + free_irq(pxp->irq, pxp); + +release: + release_mem_region(res->start, res->end - res->start + 1); + +freepxp: + kfree(pxp); + + return err; +} + +static int __devexit pxp_remove(struct platform_device *pdev) +{ + struct pxps *pxp = platform_get_drvdata(pdev); + + video_unregister_device(pxp->vdev); + video_device_release(pxp->vdev); + + if (pxp->regs_virt) + dma_free_coherent(0, PAGE_ALIGN(sizeof(struct pxp_registers)), + pxp->regs_virt, pxp->regs_phys); + kfree(pxp->outb); + kfree(pxp); + + return 0; +} + +#ifdef CONFIG_PM +static int pxp_suspend(struct platform_device *pdev, pm_message_t state) +{ + int i; + + while (__raw_readl(HW_PXP_CTRL_ADDR) & BM_PXP_CTRL_ENABLE) + ; + + for (i = 0; i < REGS1_NUMS; i++) + regs1[i] = __raw_readl(HW_PXP_CTRL_ADDR + REG_OFFSET * i); + + for (i = 0; i < REGS2_NUMS; i++) + regs2[i] = __raw_readl(HW_PXP_PAGETABLE_ADDR + REG_OFFSET * i); + + for (i = 0; i < REGS3_NUMS; i++) + regs3[i] = __raw_readl(HW_PXP_OLn_ADDR(0) + REG_OFFSET * i); + + __raw_writel(BM_PXP_CTRL_SFTRST, HW_PXP_CTRL_ADDR); + + return 0; +} + +static int pxp_resume(struct platform_device *pdev) +{ + int i; + + /* Pull PxP out of reset */ + __raw_writel(0, HW_PXP_CTRL_ADDR); + + for (i = 0; i < REGS1_NUMS; i++) + __raw_writel(regs1[i], HW_PXP_CTRL_ADDR + REG_OFFSET * i); + + for (i = 0; i < REGS2_NUMS; i++) + __raw_writel(regs2[i], HW_PXP_PAGETABLE_ADDR + REG_OFFSET * i); + + for (i = 0; i < REGS3_NUMS; i++) + __raw_writel(regs3[i], HW_PXP_OLn_ADDR(0) + REG_OFFSET * i); + + return 0; +} +#else +#define pxp_suspend NULL +#define pxp_resume NULL +#endif + +static struct platform_driver pxp_driver = { + .driver = { + .name = PXP_DRIVER_NAME, + }, + .probe = pxp_probe, + .remove = __exit_p(pxp_remove), + .suspend = pxp_suspend, + .resume = pxp_resume, +}; + + +static int __devinit pxp_init(void) +{ + return platform_driver_register(&pxp_driver); +} + +static void __exit pxp_exit(void) +{ + platform_driver_unregister(&pxp_driver); +} + +module_init(pxp_init); +module_exit(pxp_exit); + +MODULE_DESCRIPTION("STMP37xx PxP driver"); +MODULE_AUTHOR("Matt Porter "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/video/Makefile @@ -88,6 +88,14 @@ obj-$(CONFIG_VIDEO_PMS) += pms.o obj-$(CONFIG_VIDEO_VINO) += vino.o obj-$(CONFIG_VIDEO_STRADIS) += stradis.o +obj-$(CONFIG_VIDEO_MXC_IPU_CAMERA) += mxc/capture/ +obj-$(CONFIG_VIDEO_MXC_EMMA_CAMERA) += mxc/capture/ +obj-$(CONFIG_VIDEO_MXC_CSI_CAMERA) += mxc/capture/ +obj-$(CONFIG_VIDEO_MXC_IPU_OUTPUT) += mxc/output/ +obj-$(CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT) += mxc/output/ +obj-$(CONFIG_VIDEO_MXC_EMMA_OUTPUT) += mxc/output/ +obj-$(CONFIG_VIDEO_MXC_OPL) += mxc/opl/ +obj-$(CONFIG_VIDEO_PXP) += pxp.o obj-$(CONFIG_VIDEO_CPIA) += cpia.o obj-$(CONFIG_VIDEO_CPIA_PP) += cpia_pp.o obj-$(CONFIG_VIDEO_CPIA_USB) += cpia_usb.o --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/videobuf-dma-contig.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/videobuf-dma-contig.c @@ -333,7 +333,7 @@ size = vma->vm_end - vma->vm_start; size = (size < mem->size) ? size : mem->size; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + vma->vm_page_prot = pgprot_writethru(vma->vm_page_prot); retval = remap_pfn_range(vma, vma->vm_start, mem->dma_handle >> PAGE_SHIFT, size, vma->vm_page_prot); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/ov511.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/ov511.c @@ -5878,7 +5878,7 @@ goto error; } - mutex_lock(&ov->lock); + mutex_unlock(&ov->lock); return 0; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/v4l2-compat-ioctl32.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/v4l2-compat-ioctl32.c @@ -198,6 +198,7 @@ static int get_microcode32(struct video_code *kp, struct video_code32 __user *up) { + return -EFAULT; if (!access_ok(VERIFY_READ, up, sizeof(struct video_code32)) || copy_from_user(kp->loadwhat, up->loadwhat, sizeof(up->loadwhat)) || get_user(kp->datasize, &up->datasize) || --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/ivtv/ivtvfb.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/ivtv/ivtvfb.c @@ -457,6 +457,8 @@ struct fb_vblank vblank; u32 trace; + memset(&vblank, 0, sizeof(struct fb_vblank)); + vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC; trace = read_reg(0x028c0) >> 16; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/em28xx/em28xx-audio.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/em28xx/em28xx-audio.c @@ -383,6 +383,11 @@ static int snd_em28xx_prepare(struct snd_pcm_substream *substream) { + struct em28xx *dev = snd_pcm_substream_chip(substream); + + dev->adev.hwptr_done_capture = 0; + dev->adev.capture_transfer_done = 0; + return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/em28xx/em28xx.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/em28xx/em28xx.h @@ -595,6 +595,10 @@ struct delayed_work sbutton_query_work; struct em28xx_dvb *dvb; + + /* I2C keyboard data */ + struct i2c_board_info info; + struct IR_i2c_init_data init_data; }; struct em28xx_ops { --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/em28xx/em28xx-cards.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/em28xx/em28xx-cards.c @@ -2170,8 +2170,6 @@ /* ----------------------------------------------------------------------- */ void em28xx_register_i2c_ir(struct em28xx *dev) { - struct i2c_board_info info; - struct IR_i2c_init_data init_data; const unsigned short addr_list[] = { 0x30, 0x47, I2C_CLIENT_END }; @@ -2179,9 +2177,9 @@ if (disable_ir) return; - memset(&info, 0, sizeof(struct i2c_board_info)); - memset(&init_data, 0, sizeof(struct IR_i2c_init_data)); - strlcpy(info.type, "ir_video", I2C_NAME_SIZE); + memset(&dev->info, 0, sizeof(&dev->info)); + memset(&dev->init_data, 0, sizeof(dev->init_data)); + strlcpy(dev->info.type, "ir_video", I2C_NAME_SIZE); /* detect & configure */ switch (dev->model) { @@ -2191,19 +2189,19 @@ break; case (EM2800_BOARD_TERRATEC_CINERGY_200): case (EM2820_BOARD_TERRATEC_CINERGY_250): - init_data.ir_codes = ir_codes_em_terratec; - init_data.get_key = em28xx_get_key_terratec; - init_data.name = "i2c IR (EM28XX Terratec)"; + dev->init_data.ir_codes = ir_codes_em_terratec; + dev->init_data.get_key = em28xx_get_key_terratec; + dev->init_data.name = "i2c IR (EM28XX Terratec)"; break; case (EM2820_BOARD_PINNACLE_USB_2): - init_data.ir_codes = ir_codes_pinnacle_grey; - init_data.get_key = em28xx_get_key_pinnacle_usb_grey; - init_data.name = "i2c IR (EM28XX Pinnacle PCTV)"; + dev->init_data.ir_codes = ir_codes_pinnacle_grey; + dev->init_data.get_key = em28xx_get_key_pinnacle_usb_grey; + dev->init_data.name = "i2c IR (EM28XX Pinnacle PCTV)"; break; case (EM2820_BOARD_HAUPPAUGE_WINTV_USB_2): - init_data.ir_codes = ir_codes_hauppauge_new; - init_data.get_key = em28xx_get_key_em_haup; - init_data.name = "i2c IR (EM2840 Hauppauge)"; + dev->init_data.ir_codes = ir_codes_hauppauge_new; + dev->init_data.get_key = em28xx_get_key_em_haup; + dev->init_data.name = "i2c IR (EM2840 Hauppauge)"; break; case (EM2820_BOARD_MSI_VOX_USB_2): break; @@ -2215,9 +2213,9 @@ break; } - if (init_data.name) - info.platform_data = &init_data; - i2c_new_probed_device(&dev->i2c_adap, &info, addr_list); + if (dev->init_data.name) + dev->info.platform_data = &dev->init_data; + i2c_new_probed_device(&dev->i2c_adap, &dev->info, addr_list); } void em28xx_card_setup(struct em28xx *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/uvc/uvc_driver.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/uvc/uvc_driver.c @@ -1983,6 +1983,15 @@ .bInterfaceProtocol = 0, .driver_info = UVC_QUIRK_PROBE_MINMAX | UVC_QUIRK_IGNORE_SELECTOR_UNIT }, + /* COMPAL JHL90 */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, + .idVendor = 0x064e, + .idProduct = 0xa115, + .bInterfaceClass = USB_CLASS_VIDEO, + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .driver_info = UVC_QUIRK_PROBE_MINMAX }, /* Generic USB Video Class */ { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, 0) }, {} --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mx31_v4l2_wvga_output.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mx31_v4l2_wvga_output.c @@ -0,0 +1,1926 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/media/video/mxc/output/mxc_v4l2_output.c + * + * @brief MXC V4L2 Video Output Driver + * + * Video4Linux2 Output Device using MXC IPU Post-processing functionality. + * + * @ingroup MXC_V4L2_OUTPUT + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "mxc_v4l2_output.h" + +vout_data *g_vout; +#define SDC_FG_FB_FORMAT IPU_PIX_FMT_RGB565 + +struct v4l2_output mxc_outputs[2] = { + { + .index = MXC_V4L2_OUT_2_SDC, + .name = "DISP3 Video Out", + .type = V4L2_OUTPUT_TYPE_ANALOG, /* not really correct, + but no other choice */ + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN}, + { + .index = MXC_V4L2_OUT_2_ADC, + .name = "DISPx Video Out", + .type = V4L2_OUTPUT_TYPE_ANALOG, /* not really correct, + but no other choice */ + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN} +}; + +static int video_nr = 16; +static DEFINE_SPINLOCK(g_lock); +static unsigned int g_pp_out_number; +static unsigned int g_pp_in_number; + +/* debug counters */ +uint32_t g_irq_cnt; +uint32_t g_buf_output_cnt; +uint32_t g_buf_q_cnt; +uint32_t g_buf_dq_cnt; + +static inline uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type) +{ + return ((type == IPU_INPUT_BUFFER) ? ((uint32_t) ch & 0xFF) : + ((type == IPU_OUTPUT_BUFFER) ? (((uint32_t) ch >> 8) & 0xFF) + : (((uint32_t) ch >> 16) & 0xFF))); +}; + +static inline uint32_t DMAParamAddr(uint32_t dma_ch) +{ + return (0x10000 | (dma_ch << 4)); +}; + +#define QUEUE_SIZE (MAX_FRAME_NUM + 1) +static inline int queue_size(v4l_queue * q) +{ + if (q->tail >= q->head) + return (q->tail - q->head); + else + return ((q->tail + QUEUE_SIZE) - q->head); +} + +static inline int queue_buf(v4l_queue * q, int idx) +{ + if (((q->tail + 1) % QUEUE_SIZE) == q->head) + return -1; /* queue full */ + q->list[q->tail] = idx; + q->tail = (q->tail + 1) % QUEUE_SIZE; + return 0; +} + +static inline int dequeue_buf(v4l_queue * q) +{ + int ret; + if (q->tail == q->head) + return -1; /* queue empty */ + ret = q->list[q->head]; + q->head = (q->head + 1) % QUEUE_SIZE; + return ret; +} + +static inline int peek_next_buf(v4l_queue * q) +{ + if (q->tail == q->head) + return -1; /* queue empty */ + return q->list[q->head]; +} + +static inline unsigned long get_jiffies(struct timeval *t) +{ + struct timeval cur; + + if (t->tv_usec >= 1000000) { + t->tv_sec += t->tv_usec / 1000000; + t->tv_usec = t->tv_usec % 1000000; + } + + do_gettimeofday(&cur); + if ((t->tv_sec < cur.tv_sec) + || ((t->tv_sec == cur.tv_sec) && (t->tv_usec < cur.tv_usec))) + return jiffies; + + if (t->tv_usec < cur.tv_usec) { + cur.tv_sec = t->tv_sec - cur.tv_sec - 1; + cur.tv_usec = t->tv_usec + 1000000 - cur.tv_usec; + } else { + cur.tv_sec = t->tv_sec - cur.tv_sec; + cur.tv_usec = t->tv_usec - cur.tv_usec; + } + + return jiffies + timeval_to_jiffies(&cur); +} + +/*! + * Private function to free buffers + * + * @param bufs_paddr Array of physical address of buffers to be freed + * + * @param bufs_vaddr Array of virtual address of buffers to be freed + * + * @param num_buf Number of buffers to be freed + * + * @param size Size for each buffer to be free + * + * @return status 0 success. + */ +static int mxc_free_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + if (bufs_vaddr[i] != 0) { + dma_free_coherent(0, size, bufs_vaddr[i], + bufs_paddr[i]); + pr_debug("freed @ paddr=0x%08X\n", (u32) bufs_paddr[i]); + bufs_paddr[i] = 0; + bufs_vaddr[i] = NULL; + } + } + return 0; +} + +/*! + * Private function to allocate buffers + * + * @param bufs_paddr Output array of physical address of buffers allocated + * + * @param bufs_vaddr Output array of virtual address of buffers allocated + * + * @param num_buf Input number of buffers to allocate + * + * @param size Input size for each buffer to allocate + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int mxc_allocate_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + bufs_vaddr[i] = dma_alloc_coherent(0, size, + &bufs_paddr[i], + GFP_DMA | GFP_KERNEL); + + if (bufs_vaddr[i] == 0) { + mxc_free_buffers(bufs_paddr, bufs_vaddr, i, size); + printk(KERN_ERR "dma_alloc_coherent failed.\n"); + return -ENOBUFS; + } + pr_debug("allocated @ paddr=0x%08X, size=%d.\n", + (u32) bufs_paddr[i], size); + } + + return 0; +} + +/* + * Returns bits per pixel for given pixel format + * + * @param pixelformat V4L2_PIX_FMT_RGB565, + * V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return bits per pixel of pixelformat + */ +static u32 fmt_to_bpp(u32 pixelformat) +{ + u32 bpp; + + switch (pixelformat) { + case V4L2_PIX_FMT_RGB565: + bpp = 16; + break; + case V4L2_PIX_FMT_BGR24: + case V4L2_PIX_FMT_RGB24: + bpp = 24; + break; + case V4L2_PIX_FMT_BGR32: + case V4L2_PIX_FMT_RGB32: + bpp = 32; + break; + default: + bpp = 8; + break; + } + return bpp; +} + +static u32 bpp_to_fmt(struct fb_info *fbi) +{ + if (fbi->var.nonstd) + return fbi->var.nonstd; + + if (fbi->var.bits_per_pixel == 24) + return V4L2_PIX_FMT_BGR24; + else if (fbi->var.bits_per_pixel == 32) + return V4L2_PIX_FMT_BGR32; + else if (fbi->var.bits_per_pixel == 16) + return V4L2_PIX_FMT_RGB565; + + return 0; +} + +static void mxc_v4l2out_timer_handler(unsigned long arg) +{ + int index; + unsigned long timeout; + unsigned long lock_flags = 0; + vout_data *vout = (vout_data *) arg; + + dev_dbg(vout->video_dev->dev, "timer handler: %lu\n", jiffies); + + spin_lock_irqsave(&g_lock, lock_flags); + + if ((vout->state == STATE_STREAM_STOPPING) + || (vout->state == STATE_STREAM_OFF)) + goto exit0; + /* + * If timer occurs before IPU h/w is ready, then set the state to + * paused and the timer will be set again when next buffer is queued + * or PP comletes + */ + if (vout->ipu_buf[0] != -1) { + dev_dbg(vout->video_dev->dev, "IPU buffer busy\n"); + vout->state = STATE_STREAM_PAUSED; + goto exit0; + } + + /* One frame buffer should be ready here */ + if (vout->frame_count % 2 == 1) { + /* set BUF0 rdy */ + if (ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, 0) < + 0) + pr_debug("error selecting display buf 0"); + } else { + if (ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, 1) < + 0) + pr_debug("error selecting display buf 1"); + } + + /* Dequeue buffer and pass to IPU */ + index = dequeue_buf(&vout->ready_q); + if (index == -1) { /* no buffers ready, should never occur */ + dev_err(vout->video_dev->dev, + "mxc_v4l2out: timer - no queued buffers ready\n"); + goto exit0; + } + + g_buf_dq_cnt++; + vout->frame_count++; + vout->ipu_buf[1] = vout->ipu_buf[0] = index; + + if (ipu_update_channel_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, + 0, + vout->v4l2_bufs[vout->ipu_buf[0]].m. + offset) < 0) + goto exit0; + + if (ipu_update_channel_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, + 1, + vout->v4l2_bufs[vout->ipu_buf[0]].m. + offset + vout->v2f.fmt.pix.width / 2) < 0) + goto exit0; + + /* All buffer should now ready in IPU out, tranfer to display buf */ + if (ipu_update_channel_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, + 0, + vout-> + display_bufs[(vout->frame_count - + 1) % 2]) < 0) { + dev_err(vout->video_dev->dev, + "unable to update buffer %d address\n", + vout->next_rdy_ipu_buf); + goto exit0; + } + if (ipu_update_channel_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, + 1, + vout-> + display_bufs[(vout->frame_count - + 1) % 2] + + vout->crop_current.width / 2 * + bytes_per_pixel(SDC_FG_FB_FORMAT)) < 0) { + dev_err(vout->video_dev->dev, + "unable to update buffer %d address\n", + vout->next_rdy_ipu_buf); + goto exit0; + } + + if (ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 0) < 0) { + dev_err(vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + goto exit0; + } + + if (ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, 0) < 0) { + dev_err(vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + goto exit0; + } + + /* Setup timer for next buffer */ + index = peek_next_buf(&vout->ready_q); + if (index != -1) { + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0)) + timeout = + vout->start_jiffies + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index].timestamp); + + if (jiffies >= timeout) { + dev_dbg(vout->video_dev->dev, + "warning: timer timeout already expired.\n"); + } + if (mod_timer(&vout->output_timer, timeout)) + dev_dbg(vout->video_dev->dev, + "warning: timer was already set\n"); + + dev_dbg(vout->video_dev->dev, + "timer handler next schedule: %lu\n", timeout); + } else { + vout->state = STATE_STREAM_PAUSED; + } + +exit0: + spin_unlock_irqrestore(&g_lock, lock_flags); +} + +extern void _ipu_write_param_mem(uint32_t addr, uint32_t *data, + uint32_t numWords); + +static irqreturn_t mxc_v4l2out_pp_in_irq_handler(int irq, void *dev_id) +{ + unsigned long lock_flags = 0; + vout_data *vout = dev_id; + uint32_t u_offset; + uint32_t v_offset; + uint32_t local_params[4]; + uint32_t width, height; + uint32_t dma_chan; + + spin_lock_irqsave(&g_lock, lock_flags); + g_irq_cnt++; + + dma_chan = channel_2_dma(vout->post_proc_ch, IPU_INPUT_BUFFER); + memset(&local_params, 0, sizeof(local_params)); + + if (g_pp_in_number % 2 == 1) { + u_offset = vout->offset.u_offset - vout->v2f.fmt.pix.width / 4; + v_offset = vout->offset.v_offset - vout->v2f.fmt.pix.width / 4; + width = vout->v2f.fmt.pix.width / 2; + height = vout->v2f.fmt.pix.height; + local_params[3] = + (uint32_t) ((width - 1) << 12) | ((uint32_t) (height - + 1) << 24); + local_params[1] = (1UL << (46 - 32)) | (u_offset << (53 - 32)); + local_params[2] = u_offset >> (64 - 53); + local_params[2] |= v_offset << (79 - 64); + local_params[3] |= v_offset >> (96 - 79); + _ipu_write_param_mem(DMAParamAddr(dma_chan), local_params, 4); + + if (ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 1) < + 0) { + dev_err(vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + } + } else { + u_offset = vout->offset.u_offset; + v_offset = vout->offset.v_offset; + width = vout->v2f.fmt.pix.width / 2; + height = vout->v2f.fmt.pix.height; + local_params[3] = + (uint32_t) ((width - 1) << 12) | ((uint32_t) (height - + 1) << 24); + local_params[1] = (1UL << (46 - 32)) | (u_offset << (53 - 32)); + local_params[2] = u_offset >> (64 - 53); + local_params[2] |= v_offset << (79 - 64); + local_params[3] |= v_offset >> (96 - 79); + _ipu_write_param_mem(DMAParamAddr(dma_chan), local_params, 4); + } + g_pp_in_number++; + + spin_unlock_irqrestore(&g_lock, lock_flags); + + return IRQ_HANDLED; +} + +static irqreturn_t mxc_v4l2out_pp_out_irq_handler(int irq, void *dev_id) +{ + vout_data *vout = dev_id; + int index; + unsigned long timeout; + u32 lock_flags = 0; + + spin_lock_irqsave(&g_lock, lock_flags); + + if (g_pp_out_number % 2 == 1) { + if (ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, 1) + < 0) { + dev_err(vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + } + } else { + if (vout->ipu_buf[0] != -1) { + vout->v4l2_bufs[vout->ipu_buf[0]].flags = + V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, vout->ipu_buf[0]); + wake_up_interruptible(&vout->v4l_bufq); + vout->ipu_buf[0] = -1; + } + if (vout->state == STATE_STREAM_STOPPING) { + if ((vout->ipu_buf[0] == -1) + && (vout->ipu_buf[1] == -1)) + vout->state = STATE_STREAM_OFF; + } else if ((vout->state == STATE_STREAM_PAUSED) + && ((index = peek_next_buf(&vout->ready_q)) != -1)) { + /*! + * Setup timer for next buffer, + * when stream has been paused + */ + pr_debug("next index %d\n", index); + + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0)) + timeout = + vout->start_jiffies + + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index]. + timestamp); + + if (jiffies >= timeout) { + pr_debug + ("warning: timer timeout" + "already expired.\n"); + } + + vout->state = STATE_STREAM_ON; + + if (mod_timer(&vout->output_timer, timeout)) + pr_debug("warning: timer was already set\n"); + + pr_debug("timer handler next schedule: %lu\n", timeout); + } + } + g_pp_out_number++; + + spin_unlock_irqrestore(&g_lock, lock_flags); + return IRQ_HANDLED; +} + +/*! + * Start the output stream + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamon(vout_data *vout) +{ + struct device *dev = vout->video_dev->dev; + ipu_channel_params_t params; + struct mxcfb_pos fb_pos; + struct fb_var_screeninfo fbvar; + struct fb_info *fbi = + registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + int pp_in_buf[2]; + u16 out_width; + u16 out_height; + ipu_channel_t display_input_ch = MEM_PP_MEM; + bool use_direct_adc = false; + mm_segment_t old_fs; + + if (!vout) + return -EINVAL; + + if (vout->state != STATE_STREAM_OFF) + return -EBUSY; + + if (queue_size(&vout->ready_q) < 2) { + dev_err(dev, "2 buffers not been queued yet!\n"); + return -EINVAL; + } + + out_width = vout->crop_current.width; + out_height = vout->crop_current.height; + + vout->next_done_ipu_buf = vout->next_rdy_ipu_buf = 0; + vout->ipu_buf[0] = pp_in_buf[0] = dequeue_buf(&vout->ready_q); + vout->ipu_buf[1] = pp_in_buf[1] = vout->ipu_buf[0]; + vout->frame_count = 1; + g_pp_out_number = 1; + g_pp_in_number = 1; + + ipu_enable_irq(IPU_IRQ_PP_IN_EOF); + ipu_enable_irq(IPU_IRQ_PP_OUT_EOF); + + /* Init Display Channel */ +#ifdef CONFIG_FB_MXC_ASYNC_PANEL + if (vout->cur_disp_output < DISP3) { + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_OFF, 0); + fbi = NULL; + if (ipu_can_rotate_in_place(vout->rotate)) { + dev_dbg(dev, "Using PP direct to ADC channel\n"); + use_direct_adc = true; + vout->display_ch = MEM_PP_ADC; + vout->post_proc_ch = MEM_PP_ADC; + + memset(¶ms, 0, sizeof(params)); + params.mem_pp_adc.in_width = vout->v2f.fmt.pix.width; + params.mem_pp_adc.in_height = vout->v2f.fmt.pix.height; + params.mem_pp_adc.in_pixel_fmt = + vout->v2f.fmt.pix.pixelformat; + params.mem_pp_adc.out_width = out_width; + params.mem_pp_adc.out_height = out_height; + params.mem_pp_adc.out_pixel_fmt = SDC_FG_FB_FORMAT; +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.mem_pp_adc.out_left = + 2 + vout->crop_current.left; +#else + params.mem_pp_adc.out_left = + 12 + vout->crop_current.left; +#endif + params.mem_pp_adc.out_top = vout->crop_current.top; + if (ipu_init_channel( + vout->post_proc_ch, ¶ms) != 0) { + dev_err(dev, "Error initializing PP chan\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + params.mem_pp_adc. + in_pixel_fmt, + params.mem_pp_adc.in_width, + params.mem_pp_adc.in_height, + vout->v2f.fmt.pix. + bytesperline / + bytes_per_pixel(params. + mem_pp_adc. + in_pixel_fmt), + vout->rotate, + vout-> + v4l2_bufs[pp_in_buf[0]].m. + offset, + vout-> + v4l2_bufs[pp_in_buf[1]].m. + offset, + vout->offset.u_offset, + vout->offset.v_offset) != + 0) { + dev_err(dev, "Error initializing PP in buf\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_pp_adc. + out_pixel_fmt, out_width, + out_height, out_width, + vout->rotate, 0, 0, 0, + 0) != 0) { + dev_err(dev, + "Error initializing PP" + "output buffer\n"); + return -EINVAL; + } + + } else { + dev_dbg(dev, "Using ADC SYS2 channel\n"); + vout->display_ch = ADC_SYS2; + vout->post_proc_ch = MEM_PP_MEM; + + if (vout->display_bufs[0]) { + mxc_free_buffers(vout->display_bufs, + vout->display_bufs_vaddr, + 2, vout->display_buf_size); + } + + vout->display_buf_size = vout->crop_current.width * + vout->crop_current.height * + fmt_to_bpp(SDC_FG_FB_FORMAT) / 8; + mxc_allocate_buffers(vout->display_bufs, + vout->display_bufs_vaddr, + 2, vout->display_buf_size); + + memset(¶ms, 0, sizeof(params)); + params.adc_sys2.disp = vout->cur_disp_output; + params.adc_sys2.ch_mode = WriteTemplateNonSeq; +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.adc_sys2.out_left = 2 + vout->crop_current.left; +#else + params.adc_sys2.out_left = 12 + vout->crop_current.left; +#endif + params.adc_sys2.out_top = vout->crop_current.top; + if (ipu_init_channel(ADC_SYS2, ¶ms) < 0) + return -EINVAL; + + if (ipu_init_channel_buffer(vout->display_ch, + IPU_INPUT_BUFFER, + SDC_FG_FB_FORMAT, + out_width, out_height, + out_width, IPU_ROTATE_NONE, + vout->display_bufs[0], + vout->display_bufs[1], 0, + 0) != 0) { + dev_err(dev, + "Error initializing SDC FG buffer\n"); + return -EINVAL; + } + } + } else +#endif + { /* Use SDC */ + dev_dbg(dev, "Using SDC channel\n"); + + fbvar = fbi->var; + if (vout->cur_disp_output == 3) { + vout->display_ch = MEM_FG_SYNC; + fbvar.bits_per_pixel = 16; + fbvar.nonstd = IPU_PIX_FMT_UYVY; + + fbvar.xres = fbvar.xres_virtual = out_width; + fbvar.yres = out_height; + fbvar.yres_virtual = out_height * 2; + } else if (vout->cur_disp_output == 5) { + vout->display_ch = MEM_DC_SYNC; + fbvar.bits_per_pixel = 16; + fbvar.nonstd = IPU_PIX_FMT_UYVY; + + fbvar.xres = fbvar.xres_virtual = out_width; + fbvar.yres = out_height; + fbvar.yres_virtual = out_height * 2; + } else { + vout->display_ch = MEM_BG_SYNC; + } + + fbvar.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbvar); + + fb_pos.x = vout->crop_current.left; + fb_pos.y = vout->crop_current.top; + if (fbi->fbops->fb_ioctl) { + old_fs = get_fs(); + set_fs(KERNEL_DS); + fbi->fbops->fb_ioctl(fbi, MXCFB_SET_OVERLAY_POS, + (unsigned long)&fb_pos); + set_fs(old_fs); + } + + vout->display_bufs[1] = fbi->fix.smem_start; + vout->display_bufs[0] = fbi->fix.smem_start + + (fbi->fix.line_length * fbi->var.yres); + vout->display_buf_size = vout->crop_current.width * + vout->crop_current.height * fbi->var.bits_per_pixel / 8; + + vout->post_proc_ch = MEM_PP_MEM; + } + + /* Init PP */ + if (use_direct_adc == false) { + if (vout->rotate >= IPU_ROTATE_90_RIGHT) { + out_width = vout->crop_current.height; + out_height = vout->crop_current.width; + } + memset(¶ms, 0, sizeof(params)); + params.mem_pp_mem.in_width = vout->v2f.fmt.pix.width / 2; + params.mem_pp_mem.in_height = vout->v2f.fmt.pix.height; + params.mem_pp_mem.in_pixel_fmt = vout->v2f.fmt.pix.pixelformat; + params.mem_pp_mem.out_width = out_width / 2; + params.mem_pp_mem.out_height = out_height; + if (vout->display_ch == ADC_SYS2) + params.mem_pp_mem.out_pixel_fmt = SDC_FG_FB_FORMAT; + else + params.mem_pp_mem.out_pixel_fmt = bpp_to_fmt(fbi); + if (ipu_init_channel(vout->post_proc_ch, ¶ms) != 0) { + dev_err(dev, "Error initializing PP channel\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + params.mem_pp_mem.in_pixel_fmt, + params.mem_pp_mem.in_width, + params.mem_pp_mem.in_height, + vout->v2f.fmt.pix.bytesperline / + bytes_per_pixel(params.mem_pp_mem. + in_pixel_fmt), + IPU_ROTATE_NONE, + vout->v4l2_bufs[pp_in_buf[0]].m. + offset, + vout->v4l2_bufs[pp_in_buf[0]].m. + offset + params.mem_pp_mem.in_width, + vout->offset.u_offset, + vout->offset.v_offset) != 0) { + dev_err(dev, "Error initializing PP input buffer\n"); + return -EINVAL; + } + + if (!ipu_can_rotate_in_place(vout->rotate)) { + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + if (mxc_allocate_buffers + (vout->rot_pp_bufs, vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size) < 0) + return -ENOBUFS; + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_width, + IPU_ROTATE_NONE, + vout->rot_pp_bufs[0], + vout->rot_pp_bufs[1], 0, + 0) != 0) { + dev_err(dev, + "Error initializing" + "PP output buffer\n"); + return -EINVAL; + } + + if (ipu_init_channel(MEM_ROT_PP_MEM, NULL) != 0) { + dev_err(dev, + "Error initializing PP ROT channel\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(MEM_ROT_PP_MEM, + IPU_INPUT_BUFFER, + params.mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_width, + vout->rotate, + vout->rot_pp_bufs[0], + vout->rot_pp_bufs[1], 0, + 0) != 0) { + dev_err(dev, + "Error initializing PP ROT" + "input buffer\n"); + return -EINVAL; + } + + /* swap width and height */ + if (vout->rotate >= IPU_ROTATE_90_RIGHT) { + out_width = vout->crop_current.width; + out_height = vout->crop_current.height; + } + + if (ipu_init_channel_buffer(MEM_ROT_PP_MEM, + IPU_OUTPUT_BUFFER, + params.mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_width, + IPU_ROTATE_NONE, + vout->display_bufs[0], + vout->display_bufs[1], 0, + 0) != 0) { + dev_err(dev, + "Error initializing PP" + "output buffer\n"); + return -EINVAL; + } + + if (ipu_link_channels(vout->post_proc_ch, + MEM_ROT_PP_MEM) < 0) + return -EINVAL; + + ipu_select_buffer(MEM_ROT_PP_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_ROT_PP_MEM, IPU_OUTPUT_BUFFER, 1); + + ipu_enable_channel(MEM_ROT_PP_MEM); + + display_input_ch = MEM_ROT_PP_MEM; + } else { + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_pp_mem. + out_pixel_fmt, + out_width / 2, + out_height, + out_width, + vout->rotate, + vout->display_bufs[0], + vout->display_bufs[0] + + + out_width / 2 * + bytes_per_pixel + (SDC_FG_FB_FORMAT), 0, + 0) != 0) { + dev_err(dev, + "Error initializing PP" + "output buffer\n"); + return -EINVAL; + } + } + if (ipu_unlink_channels( + display_input_ch, vout->display_ch) < 0) { + dev_err(dev, "Error linking ipu channels\n"); + return -EINVAL; + } + } + + vout->state = STATE_STREAM_PAUSED; + + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 0); + + if (use_direct_adc == false) { + ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, 0); + ipu_enable_channel(vout->post_proc_ch); + + if (fbi) { + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_UNBLANK); + release_console_sem(); + } else { + ipu_enable_channel(vout->display_ch); + } + } else { + ipu_enable_channel(vout->post_proc_ch); + } + + vout->start_jiffies = jiffies; + dev_dbg(dev, + "streamon: start time = %lu jiffies\n", vout->start_jiffies); + + return 0; +} + +/*! + * Shut down the voutera + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamoff(vout_data *vout) +{ + struct fb_info *fbi = + registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + int i, retval = 0; + unsigned long lockflag = 0; + + if (!vout) + return -EINVAL; + + if (vout->state == STATE_STREAM_OFF) + return 0; + + spin_lock_irqsave(&g_lock, lockflag); + + del_timer(&vout->output_timer); + + if (vout->state == STATE_STREAM_ON) + vout->state = STATE_STREAM_STOPPING; + + ipu_disable_irq(IPU_IRQ_PP_IN_EOF); + ipu_disable_irq(IPU_IRQ_PP_OUT_EOF); + + spin_unlock_irqrestore(&g_lock, lockflag); + + if (vout->post_proc_ch == MEM_PP_MEM) { /* SDC or ADC with Rotation */ + if (!ipu_can_rotate_in_place(vout->rotate)) { + ipu_unlink_channels(MEM_PP_MEM, MEM_ROT_PP_MEM); + ipu_unlink_channels(MEM_ROT_PP_MEM, vout->display_ch); + ipu_disable_channel(MEM_ROT_PP_MEM, true); + + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + } else { + ipu_unlink_channels(MEM_PP_MEM, vout->display_ch); + } + ipu_disable_channel(MEM_PP_MEM, true); + + if (vout->display_ch == ADC_SYS2) { + ipu_disable_channel(vout->display_ch, true); + ipu_uninit_channel(vout->display_ch); + } else { + fbi->var.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbi->var); + + if (vout->display_ch == MEM_FG_SYNC) { + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_POWERDOWN); + release_console_sem(); + } + + vout->display_bufs[0] = 0; + vout->display_bufs[1] = 0; + } + + ipu_uninit_channel(MEM_PP_MEM); + if (!ipu_can_rotate_in_place(vout->rotate)) + ipu_uninit_channel(MEM_ROT_PP_MEM); + } else { /* ADC Direct */ + ipu_disable_channel(MEM_PP_ADC, true); + ipu_uninit_channel(MEM_PP_ADC); + } + vout->ready_q.head = vout->ready_q.tail = 0; + vout->done_q.head = vout->done_q.tail = 0; + for (i = 0; i < vout->buffer_cnt; i++) { + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + + vout->state = STATE_STREAM_OFF; + +#ifdef CONFIG_FB_MXC_ASYNC_PANEL + if (vout->cur_disp_output < DISP3) { + if (vout->display_bufs[0] != 0) { + mxc_free_buffers(vout->display_bufs, + vout->display_bufs_vaddr, 2, + vout->display_buf_size); + } + + mxcfb_set_refresh_mode(registered_fb + [vout-> + output_fb_num[vout->cur_disp_output]], + MXCFB_REFRESH_PARTIAL, 0); + } +#endif + + return retval; +} + +/* + * Valid whether the palette is supported + * + * @param palette V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return 1 if supported, 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + return ((palette == V4L2_PIX_FMT_RGB565) || + (palette == V4L2_PIX_FMT_BGR24) || + (palette == V4L2_PIX_FMT_RGB24) || + (palette == V4L2_PIX_FMT_BGR32) || + (palette == V4L2_PIX_FMT_RGB32) || + (palette == V4L2_PIX_FMT_NV12) || + (palette == V4L2_PIX_FMT_YUV422P) || + (palette == V4L2_PIX_FMT_YUV420)); +} + +/* + * V4L2 - Handles VIDIOC_G_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_g_fmt(vout_data *vout, struct v4l2_format *f) +{ + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) + return -EINVAL; + *f = vout->v2f; + return 0; +} + +/* + * V4L2 - Handles VIDIOC_S_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_s_fmt(vout_data *vout, struct v4l2_format *f) +{ + int retval = 0; + u32 size = 0; + u32 bytesperline; + + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + goto err0; + } + if (!valid_mode(f->fmt.pix.pixelformat)) { + dev_err(vout->video_dev->dev, "pixel format not supported\n"); + retval = -EINVAL; + goto err0; + } + + bytesperline = (f->fmt.pix.width * fmt_to_bpp(f->fmt.pix.pixelformat)) / + 8; + if (f->fmt.pix.bytesperline < bytesperline) { + f->fmt.pix.bytesperline = bytesperline; + } else { + bytesperline = f->fmt.pix.bytesperline; + } + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_YUV422P: + /* byteperline for YUV planar formats is for + Y plane only */ + size = bytesperline * f->fmt.pix.height * 2; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_NV12: + size = (bytesperline * f->fmt.pix.height * 3) / 2; + break; + default: + size = bytesperline * f->fmt.pix.height; + break; + } + + /* Return the actual size of the image to the app */ + if (f->fmt.pix.sizeimage < size) + f->fmt.pix.sizeimage = size; + else + size = f->fmt.pix.sizeimage; + + vout->v2f.fmt.pix = f->fmt.pix; + if (vout->v2f.fmt.pix.priv != 0) { + if (copy_from_user(&vout->offset, + (void *)vout->v2f.fmt.pix.priv, + sizeof(vout->offset))) { + retval = -EFAULT; + goto err0; + } + } else { + vout->offset.u_offset = 0; + vout->offset.v_offset = 0; + } + + retval = 0; +err0: + return retval; +} + +/* + * V4L2 - Handles VIDIOC_G_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_get_v42lout_control(vout_data *vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + return (vout->rotate & IPU_ROTATE_HORIZ_FLIP) ? 1 : 0; + case V4L2_CID_VFLIP: + return (vout->rotate & IPU_ROTATE_VERT_FLIP) ? 1 : 0; + case (V4L2_CID_PRIVATE_BASE + 1): + return vout->rotate; + default: + return -EINVAL; + } +} + +/* + * V4L2 - Handles VIDIOC_S_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_set_v42lout_control(vout_data *vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + vout->rotate |= c->value ? IPU_ROTATE_HORIZ_FLIP : + IPU_ROTATE_NONE; + break; + case V4L2_CID_VFLIP: + vout->rotate |= c->value ? IPU_ROTATE_VERT_FLIP : + IPU_ROTATE_NONE; + break; + case V4L2_CID_MXC_ROT: + vout->rotate = c->value; + break; + default: + return -EINVAL; + } + return 0; +} + +/*! + * V4L2 interface - open function + * + * @param inode structure inode * + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l2out_open(struct inode *inode, struct file *file) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + int err; + + if (!vout) + return -ENODEV; + + down(&vout->busy_lock); + + err = -EINTR; + if (signal_pending(current)) + goto oops; + + if (vout->open_count++ == 0) { + ipu_request_irq(IPU_IRQ_PP_IN_EOF, + mxc_v4l2out_pp_in_irq_handler, + 0, dev->name, vout); + ipu_request_irq(IPU_IRQ_PP_OUT_EOF, + mxc_v4l2out_pp_out_irq_handler, + 0, dev->name, vout); + + init_waitqueue_head(&vout->v4l_bufq); + + init_timer(&vout->output_timer); + vout->output_timer.function = mxc_v4l2out_timer_handler; + vout->output_timer.data = (unsigned long)vout; + + vout->state = STATE_STREAM_OFF; + vout->rotate = IPU_ROTATE_NONE; + g_irq_cnt = g_buf_output_cnt = g_buf_q_cnt = g_buf_dq_cnt = 0; + + } + + file->private_data = dev; + + up(&vout->busy_lock); + + return 0; + +oops: + up(&vout->busy_lock); + return err; +} + +/*! + * V4L2 interface - close function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @return 0 success + */ +static int mxc_v4l2out_close(struct inode *inode, struct file *file) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + + if (--vout->open_count == 0) { + if (vout->state != STATE_STREAM_OFF) + mxc_v4l2out_streamoff(vout); + + ipu_free_irq(IPU_IRQ_PP_IN_EOF, vout); + ipu_free_irq(IPU_IRQ_PP_OUT_EOF, vout); + + file->private_data = NULL; + + mxc_free_buffers(vout->queue_buf_paddr, vout->queue_buf_vaddr, + vout->buffer_cnt, vout->queue_buf_size); + vout->buffer_cnt = 0; + mxc_free_buffers(vout->rot_pp_bufs, vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + + /* capture off */ + wake_up_interruptible(&vout->v4l_bufq); + } + + return 0; +} + +/*! + * V4L2 interface - ioctl function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @param ioctlnr unsigned int + * + * @param arg void * + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static int +mxc_v4l2out_do_ioctl(struct inode *inode, struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *vdev = file->private_data; + vout_data *vout = video_get_drvdata(vdev); + int retval = 0; + int i = 0; + + if (!vout) + return -EBADF; + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + case VIDIOC_QUERYCAP: + { + struct v4l2_capability *cap = arg; + strcpy(cap->driver, "mxc_v4l2_output"); + cap->version = 0; + cap->capabilities = + V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + retval = 0; + break; + } + case VIDIOC_G_FMT: + { + struct v4l2_format *gf = arg; + retval = mxc_v4l2out_g_fmt(vout, gf); + break; + } + case VIDIOC_S_FMT: + { + struct v4l2_format *sf = arg; + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + retval = mxc_v4l2out_s_fmt(vout, sf); + break; + } + case VIDIOC_REQBUFS: + { + struct v4l2_requestbuffers *req = arg; + if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (req->memory != V4L2_MEMORY_MMAP)) { + dev_dbg(vdev->dev, + "VIDIOC_REQBUFS: incorrect" + "buffer type\n"); + retval = -EINVAL; + break; + } + + if (req->count == 0) + mxc_v4l2out_streamoff(vout); + + if (vout->state == STATE_STREAM_OFF) { + if (vout->queue_buf_paddr[0] != 0) { + mxc_free_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + dev_dbg(vdev->dev, + "VIDIOC_REQBUFS:" + "freed buffers\n"); + } + vout->buffer_cnt = 0; + } else { + dev_dbg(vdev->dev, + "VIDIOC_REQBUFS: Buffer is in use\n"); + retval = -EBUSY; + break; + } + + if (req->count == 0) + break; + + if (req->count < MIN_FRAME_NUM) + req->count = MIN_FRAME_NUM; + else if (req->count > MAX_FRAME_NUM) + req->count = MAX_FRAME_NUM; + vout->buffer_cnt = req->count; + vout->queue_buf_size = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + + retval = mxc_allocate_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + if (retval < 0) + break; + + /* Init buffer queues */ + vout->done_q.head = 0; + vout->done_q.tail = 0; + vout->ready_q.head = 0; + vout->ready_q.tail = 0; + + for (i = 0; i < vout->buffer_cnt; i++) { + memset(&(vout->v4l2_bufs[i]), 0, + sizeof(vout->v4l2_bufs[i])); + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].memory = V4L2_MEMORY_MMAP; + vout->v4l2_bufs[i].index = i; + vout->v4l2_bufs[i].type = + V4L2_BUF_TYPE_VIDEO_OUTPUT; + vout->v4l2_bufs[i].length = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + vout->v4l2_bufs[i].m.offset = + (unsigned long)vout->queue_buf_paddr[i]; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + break; + } + case VIDIOC_QUERYBUF: + { + struct v4l2_buffer *buf = arg; + u32 type = buf->type; + int index = buf->index; + + if ((type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt)) { + dev_dbg(vdev->dev, + "VIDIOC_QUERYBUFS: incorrect" + "buffer type\n"); + retval = -EINVAL; + break; + } + down(&vout->param_lock); + memcpy(buf, &(vout->v4l2_bufs[index]), sizeof(*buf)); + up(&vout->param_lock); + break; + } + case VIDIOC_QBUF: + { + struct v4l2_buffer *buf = arg; + int index = buf->index; + unsigned long lock_flags; + + if ((buf->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt)) { + retval = -EINVAL; + break; + } + + dev_dbg(vdev->dev, "VIDIOC_QBUF: %d\n", buf->index); + + /* mmapped buffers are L1 WB cached, + * so we need to clean them */ + if (buf->flags & V4L2_BUF_FLAG_MAPPED) + flush_cache_all(); + + spin_lock_irqsave(&g_lock, lock_flags); + + memcpy(&(vout->v4l2_bufs[index]), buf, sizeof(*buf)); + vout->v4l2_bufs[index].flags |= V4L2_BUF_FLAG_QUEUED; + + g_buf_q_cnt++; + queue_buf(&vout->ready_q, index); + if (vout->state == STATE_STREAM_PAUSED) { + unsigned long timeout; + + index = peek_next_buf(&vout->ready_q); + + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == + 0) + && (vout->v4l2_bufs[index].timestamp. + tv_usec == 0)) + timeout = + vout->start_jiffies + + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index]. + timestamp); + + if (jiffies >= timeout) { + dev_dbg(vout->video_dev->dev, + "warning: timer timeout" + "already expired.\n"); + } + vout->output_timer.expires = timeout; + dev_dbg(vdev->dev, + "QBUF: frame #%u timeout @" + " %lu jiffies, current = %lu\n", + vout->frame_count, timeout, jiffies); + add_timer(&vout->output_timer); + vout->state = STATE_STREAM_ON; + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + break; + } + case VIDIOC_DQBUF: + { + struct v4l2_buffer *buf = arg; + int idx; + + if ((queue_size(&vout->done_q) == 0) && + (file->f_flags & O_NONBLOCK)) { + retval = -EAGAIN; + break; + } + + if (!wait_event_interruptible_timeout(vout->v4l_bufq, + queue_size(&vout-> + done_q) + != 0, 10 * HZ)) { + dev_dbg(vdev->dev, "VIDIOC_DQBUF: timeout\n"); + retval = -ETIME; + break; + } else if (signal_pending(current)) { + dev_dbg(vdev->dev, + "VIDIOC_DQBUF: interrupt received\n"); + retval = -ERESTARTSYS; + break; + } + idx = dequeue_buf(&vout->done_q); + if (idx == -1) { /* No frame free */ + dev_dbg(vdev->dev, + "VIDIOC_DQBUF: no free buffers\n"); + retval = -EAGAIN; + break; + } + if ((vout->v4l2_bufs[idx].flags & V4L2_BUF_FLAG_DONE) == + 0) + dev_dbg(vdev->dev, + "VIDIOC_DQBUF: buffer in done q, " + "but not flagged as done\n"); + + vout->v4l2_bufs[idx].flags = 0; + memcpy(buf, &(vout->v4l2_bufs[idx]), sizeof(*buf)); + dev_dbg(vdev->dev, "VIDIOC_DQBUF: %d\n", buf->index); + break; + } + case VIDIOC_STREAMON: + { + retval = mxc_v4l2out_streamon(vout); + break; + } + case VIDIOC_STREAMOFF: + { + retval = mxc_v4l2out_streamoff(vout); + break; + } + case VIDIOC_G_CTRL: + { + retval = mxc_get_v42lout_control(vout, arg); + break; + } + case VIDIOC_S_CTRL: + { + retval = mxc_set_v42lout_control(vout, arg); + break; + } + case VIDIOC_CROPCAP: + { + struct v4l2_cropcap *cap = arg; + + if (cap->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + + cap->bounds = vout->crop_bounds[vout->cur_disp_output]; + cap->defrect = vout->crop_bounds[vout->cur_disp_output]; + retval = 0; + break; + } + case VIDIOC_G_CROP: + { + struct v4l2_crop *crop = arg; + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + crop->c = vout->crop_current; + break; + } + case VIDIOC_S_CROP: + { + struct v4l2_crop *crop = arg; + struct v4l2_rect *b = + &(vout->crop_bounds[vout->cur_disp_output]); + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + if (crop->c.height < 0) { + retval = -EINVAL; + break; + } + if (crop->c.width < 0) { + retval = -EINVAL; + break; + } + + /* only full screen supported for SDC BG */ + if (vout->cur_disp_output == 4) { + crop->c = vout->crop_current; + break; + } + + if (crop->c.top < b->top) + crop->c.top = b->top; + if (crop->c.top >= b->top + b->height) + crop->c.top = b->top + b->height - 1; + if (crop->c.height > b->top - crop->c.top + b->height) + crop->c.height = + b->top - crop->c.top + b->height; + + if (crop->c.left < b->left) + crop->c.left = b->left; + if (crop->c.left >= b->left + b->width) + crop->c.left = b->left + b->width - 1; + if (crop->c.width > b->left - crop->c.left + b->width) + crop->c.width = + b->left - crop->c.left + b->width; + + /* stride line limitation */ + crop->c.height -= crop->c.height % 8; + crop->c.width -= crop->c.width % 8; + + vout->crop_current = crop->c; + break; + } + case VIDIOC_ENUMOUTPUT: + { + struct v4l2_output *output = arg; + + if ((output->index >= 5) || + (vout->output_enabled[output->index] == false)) { + retval = -EINVAL; + break; + } + + if (output->index < 3) { + *output = mxc_outputs[MXC_V4L2_OUT_2_ADC]; + output->name[4] = '0' + output->index; + } else { + *output = mxc_outputs[MXC_V4L2_OUT_2_SDC]; + } + break; + } + case VIDIOC_G_OUTPUT: + { + int *p_output_num = arg; + + *p_output_num = vout->cur_disp_output; + break; + } + case VIDIOC_S_OUTPUT: + { + int *p_output_num = arg; + int fbnum; + struct v4l2_rect *b; + + if ((*p_output_num >= MXC_V4L2_OUT_NUM_OUTPUTS) || + (vout->output_enabled[*p_output_num] == false)) { + retval = -EINVAL; + break; + } + + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + + vout->cur_disp_output = *p_output_num; + + /* Update bounds in case they have changed */ + b = &vout->crop_bounds[vout->cur_disp_output]; + + fbnum = vout->output_fb_num[vout->cur_disp_output]; + if (vout->cur_disp_output == 3) + fbnum = vout->output_fb_num[4]; + + b->width = registered_fb[fbnum]->var.xres; + b->height = registered_fb[fbnum]->var.yres; + + vout->crop_current = *b; + break; + } + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_G_PARM: + case VIDIOC_ENUMSTD: + case VIDIOC_G_STD: + case VIDIOC_S_STD: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + default: + retval = -EINVAL; + break; + } + + up(&vout->busy_lock); + return retval; +} + +/* + * V4L2 interface - ioctl function + * + * @return None + */ +static int +mxc_v4l2out_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + return video_usercopy(inode, file, cmd, arg, mxc_v4l2out_do_ioctl); +} + +/*! + * V4L2 interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, + * ENOBUFS remap_page error + */ +static int mxc_v4l2out_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *vdev = video_devdata(file); + unsigned long size = vma->vm_end - vma->vm_start; + int res = 0; + int i; + vout_data *vout = video_get_drvdata(vdev); + + dev_dbg(vdev->dev, "pgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + for (i = 0; i < vout->buffer_cnt; i++) { + if ((vout->v4l2_bufs[i].m.offset == + (vma->vm_pgoff << PAGE_SHIFT)) && + (vout->v4l2_bufs[i].length >= size)) { + vout->v4l2_bufs[i].flags |= V4L2_BUF_FLAG_MAPPED; + break; + } + } + if (i == vout->buffer_cnt) { + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + /* make buffers inner write-back, outer write-thru cacheable */ + vma->vm_page_prot = pgprot_outer_wrthru(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + dev_dbg(vdev->dev, "mmap remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + +mxc_mmap_exit: + up(&vout->busy_lock); + return res; +} + +/*! + * V4L2 interface - poll function + * + * @param file structure file * + * + * @param wait structure poll_table * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_v4l2out_poll(struct file *file, poll_table * wait) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + queue = &vout->v4l_bufq; + poll_wait(file, queue, wait); + + up(&vout->busy_lock); + return res; +} + +static struct +file_operations mxc_v4l2out_fops = { + .owner = THIS_MODULE, + .open = mxc_v4l2out_open, + .release = mxc_v4l2out_close, + .ioctl = mxc_v4l2out_ioctl, + .mmap = mxc_v4l2out_mmap, + .poll = mxc_v4l2out_poll, +}; + +static struct video_device mxc_v4l2out_template = { + .owner = THIS_MODULE, + .name = "MXC Video Output", + .type = 0, + .type2 = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING, + .fops = &mxc_v4l2out_fops, + .release = video_device_release, +}; + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxc_v4l2out_probe(struct platform_device *pdev) +{ + int i; + vout_data *vout; + + /* + * Allocate sufficient memory for the fb structure + */ + g_vout = vout = kmalloc(sizeof(vout_data), GFP_KERNEL); + + if (!vout) + return 0; + + memset(vout, 0, sizeof(vout_data)); + + vout->video_dev = video_device_alloc(); + if (vout->video_dev == NULL) + return -1; + vout->video_dev->dev = &pdev->dev; + vout->video_dev->minor = -1; + + *(vout->video_dev) = mxc_v4l2out_template; + + /* register v4l device */ + if (video_register_device(vout->video_dev, + VFL_TYPE_GRABBER, video_nr) == -1) { + dev_dbg(&pdev->dev, "video_register_device failed\n"); + return 0; + } + dev_info(&pdev->dev, "Registered device video%d\n", + vout->video_dev->minor & 0x1f); + vout->video_dev->dev = &pdev->dev; + + video_set_drvdata(vout->video_dev, vout); + + init_MUTEX(&vout->param_lock); + init_MUTEX(&vout->busy_lock); + + /* setup outputs and cropping */ + vout->cur_disp_output = -1; + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strncmp(idstr, "DISP", 4) == 0) { + int disp_num = idstr[4] - '0'; + if (disp_num == 3) { + if (strcmp(idstr, "DISP3 BG - DI1") == 0) + disp_num = 5; + else if (strncmp(idstr, "DISP3 BG", 8) == 0) + disp_num = 4; + } + vout->crop_bounds[disp_num].left = 0; + vout->crop_bounds[disp_num].top = 0; + vout->crop_bounds[disp_num].width = + registered_fb[i]->var.xres; + vout->crop_bounds[disp_num].height = + registered_fb[i]->var.yres; + vout->output_enabled[disp_num] = true; + vout->output_fb_num[disp_num] = i; + if (vout->cur_disp_output == -1) + vout->cur_disp_output = disp_num; + } + + } + vout->crop_current = vout->crop_bounds[vout->cur_disp_output]; + + platform_set_drvdata(pdev, vout); + + return 0; +} + +static int mxc_v4l2out_remove(struct platform_device *pdev) +{ + vout_data *vout = platform_get_drvdata(pdev); + + if (vout->video_dev) { + if (-1 != vout->video_dev->minor) + video_unregister_device(vout->video_dev); + else + video_device_release(vout->video_dev); + vout->video_dev = NULL; + } + + platform_set_drvdata(pdev, NULL); + + kfree(vout); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_v4l2out_driver = { + .driver = { + .name = "MXC Video Output", + }, + .probe = mxc_v4l2out_probe, + .remove = mxc_v4l2out_remove, +}; + +static struct platform_device mxc_v4l2out_device = { + .name = "MXC Video Output", + .id = 0, +}; + +/*! + * mxc v4l2 init function + * + */ +static int mxc_v4l2out_init(void) +{ + u8 err = 0; + + err = platform_driver_register(&mxc_v4l2out_driver); + if (err == 0) + platform_device_register(&mxc_v4l2out_device); + return err; +} + +/*! + * mxc v4l2 cleanup function + * + */ +static void mxc_v4l2out_clean(void) +{ + video_unregister_device(g_vout->video_dev); + + platform_driver_unregister(&mxc_v4l2out_driver); + platform_device_unregister(&mxc_v4l2out_device); + kfree(g_vout); + g_vout = NULL; +} + +module_init(mxc_v4l2out_init); +module_exit(mxc_v4l2out_clean); + +module_param(video_nr, int, 0444); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2-driver for MXC video output"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mx27_pp.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mx27_pp.h @@ -0,0 +1,180 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_pp.h + * + * @brief Header file for MX27 V4L2 Video Output Driver + * + * @ingroup MXC_V4L2_OUTPUT + */ +#ifndef __MX27_PP_H__ +#define __MX27_PP_H__ + +#include "mxc_v4l2_output.h" + +/* PP register definitions */ +#define PP_REG(ofs) (IO_ADDRESS(EMMA_BASE_ADDR) - 0x400 + ofs) + +/* Register offsets */ +#define PP_CNTL PP_REG(0x00) +#define PP_INTRCNTL PP_REG(0x04) +#define PP_INTRSTATUS PP_REG(0x08) +#define PP_SOURCE_Y_PTR PP_REG(0x0C) +#define PP_SOURCE_CB_PTR PP_REG(0x10) +#define PP_SOURCE_CR_PTR PP_REG(0x14) +#define PP_DEST_RGB_PTR PP_REG(0x18) +#define PP_QUANTIZER_PTR PP_REG(0x1C) +#define PP_PROCESS_FRAME_PARA PP_REG(0x20) +#define PP_SOURCE_FRAME_WIDTH PP_REG(0x24) +#define PP_DEST_DISPLAY_WIDTH PP_REG(0x28) +#define PP_DEST_IMAGE_SIZE PP_REG(0x2C) +#define PP_DEST_FRAME_FMT_CNTL PP_REG(0x30) +#define PP_RESIZE_INDEX PP_REG(0x34) +#define PP_CSC_COEF_0123 PP_REG(0x38) +#define PP_CSC_COEF_4 PP_REG(0x3C) +#define PP_RESIZE_COEF_TBL PP_REG(0x100) + +/* resize table dimensions + dest pixel index left/32 right/32 #src pixels to read + 0 [BC_COEF] [BC_COEF] [BC_NXT] + : + pp_tbl_max-1 +*/ +#define BC_NXT 2 +#define BC_COEF 5 +#define SZ_COEF (1 << BC_COEF) +#define SZ_NXT (1 << BC_NXT) + +/* PP operations */ +#define EN_DEBLOCK 0x02 +#define EN_DERING 0x04 +#define EN_CSC 0x10 +#define EN_MACROBLOCK 0x20 +#define EN_DEF 0x16 +#define EN_MASK 0x36 +#define EN_BIGDATA 0x1000 +#define EN_BIGQP 0x2000 + +/* PP CSC tables */ +#define CSC_TBL_NONE 0x80 +#define CSC_TBL_REUSE 0x81 +#define CSC_TBL_A1 0x00 +#define CSC_TBL_A0 0x20 +#define CSC_TBL_B1 0x40 +#define CSC_TBL_B0 0x60 +/* converts from 4 decimal fixed point to hw setting & vice versa */ +#define PP_CSC_FP4_2_HW(coeff) ((((coeff) << 7) + 5000) / 10000) +#define PP_CSC_HW_2_FP4(coeff) ((((coeff) * 10000) + 64) >> 7) + +#define PP_PIX_YUYV 0 +#define PP_PIX_YVYU 8 +#define PP_PIX_UYVY 16 +#define PP_PIX_VYUY 24 + +/* PP size & width calculation macros */ +#define PP_CALC_QP_WIDTH(cfg) \ + (!((cfg)->operation & (EN_DEBLOCK | EN_DERING)) ? 0 : \ + (((((cfg)->dim.in.width + 15) >> 4) + 3) & ~3)) +#define PP_CALC_Y_SIZE(cfg) \ + ((cfg)->in_y_stride * (cfg)->dim.in.height) +#define PP_CALC_CH_SIZE(cfg) (PP_CALC_Y_SIZE(cfg) >> 2) +#define PP_CALC_BPP(cfg) \ + ((cfg)->rgb_resolution > 16 ? 4 : ((cfg)->rgb_resolution >> 3)) +#define PP_CALC_YUV_SIZE(cfg) \ + ((PP_CALC_Y_SIZE(cfg) * 3) >> 1) +#define PP_CALC_QP_SIZE(cfg) \ + (PP_CALC_QP_WIDTH(cfg) * (((cfg)->dim.in.height + 15) >> 4)) +#define PP_CALC_DEST_WIDTH(cfg) \ + (((cfg)->out_stride & ~1) * PP_CALC_BPP(cfg)) +#define PP_CALC_DEST_SIZE(cfg) \ + ((cfg)->dim.out.height * PP_CALC_DEST_WIDTH(cfg)) + +/* + * physical addresses for bus mastering + * v=0 -> yuv packed + * v=0 & qp=0 -> yuv packed with qp appended + */ +typedef struct _emma_pp_ptr { + unsigned int y; /* Y data (line align8) */ + unsigned int u; /* U data (line align4) */ + unsigned int v; /* V data (line align4) */ + unsigned int qp; /* Quantization (line align4) */ +} emma_pp_ptr; + +typedef struct _emma_pp_size { + int width; + int height; +} emma_pp_size; + +/* + * if num.width != 0 + * resize ratio = num.width : den.width + * else + * resize ratio = in.width : out.width + * same for height + */ +typedef struct _emma_pp_scale { + emma_pp_size num; + emma_pp_size den; + emma_pp_size in; /* clip */ + emma_pp_size out; /* 0 -> same as in */ +} emma_pp_scale; + +typedef struct _emma_pp_cfg { + unsigned char operation; /* OR of EN_xx defines */ + + /* + * input color coeff + * fixed pt 8 bits, steps of 1/128 + * csc[5] is 1 or 0 to indicate Y + 16 + * csc[0] is matrix id 0-3 while csc[1-5]=0 + */ + unsigned short csc_table[6]; + + /* + * Output color (shade width, shade offset, pixel resolution) + * Eg. 16bpp RGB565 resolution, the values could be: + * red_width = 5, green_width = 6, blue_width = 6 + * red_offset = 11, green_offset = 5, blue_offset = 0 (defaults) + * rgb_resolution = 16 (default) + * For YUV422: xxx_width=0, blue_offset=PP_PIX_xxx + */ + unsigned short red_width; + unsigned short green_width; + unsigned short blue_width; + /* if offsets are 0, the offsets are by width LSb to MSb B:G:R */ + unsigned short red_offset; + unsigned short blue_offset; + unsigned short green_offset; + /* if resolution is 0, the minimum for the sum of widths is chosen */ + short rgb_resolution; /* 8,16,24 bpp only */ + + emma_pp_ptr ptr; /* dma buffer pointers */ + unsigned int outptr; /* RGB/YUV output */ + emma_pp_scale dim; /* in/out dimensions */ + + /* pixels between two adjacent input Y rows */ + unsigned short in_y_stride; /* 0 = in_width */ + /* PIXELS between two adjacent output rows */ + unsigned short out_stride; /* 0 = out_width */ +} emma_pp_cfg; + +int pp_ptr(unsigned long ptr); +int pp_enable(int flag); +int pp_cfg(vout_data * vout); +int pp_init(vout_data * vout); +int pp_num_last(void); +void pp_exit(vout_data * vout); + +#endif /* __MX27_PP_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/Kconfig @@ -0,0 +1,28 @@ +config VIDEO_MXC_IPU_OUTPUT + bool "IPU v4l2 support" + depends on VIDEO_MXC_OUTPUT && MXC_IPU + default y + ---help--- + This is the video4linux2 driver for IPU post processing video output. + +config VIDEO_MXC_IPUV1_WVGA_OUTPUT + bool "IPUv1 WVGA v4l2 display support" + depends on VIDEO_MXC_OUTPUT && MXC_IPU + default n + ---help--- + This is the video4linux2 driver for IPUv1 WVGA post processing video output. + +config VIDEO_MXC_EMMA_OUTPUT + bool + depends on VIDEO_MXC_OUTPUT && MXC_EMMA && FB_MXC_SYNC_PANEL + default y + ---help--- + This is the video4linux2 driver for EMMA post processing video output. + +config VIDEO_MXC_OUTPUT_FBSYNC + bool "Synchronize the output with LCDC refresh" + depends on VIDEO_MXC_EMMA_OUTPUT + default y + ---help--- + Synchronize the post-processing with LCDC EOF (End of Frame) to + prevent tearing issue. If unsure, say Y. --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mxc_v4l2_output.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mxc_v4l2_output.c @@ -0,0 +1,2573 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/media/video/mxc/output/mxc_v4l2_output.c + * + * @brief MXC V4L2 Video Output Driver + * + * Video4Linux2 Output Device using MXC IPU Post-processing functionality. + * + * @ingroup MXC_V4L2_OUTPUT + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_output.h" + +vout_data *g_vout; +#define INTERLACED_CONTENT(vout) ((cpu_is_mx51_rev(CHIP_REV_2_0) >= 1) && \ + (((vout)->field_fmt == V4L2_FIELD_INTERLACED_TB) || \ + ((vout)->field_fmt == V4L2_FIELD_INTERLACED_BT))) +#define LOAD_3FIELDS(vout) ((INTERLACED_CONTENT(vout)) && \ + ((vout)->motion_sel != HIGH_MOTION)) + +#define SDC_FG_FB_FORMAT IPU_PIX_FMT_RGB565 + +struct v4l2_output mxc_outputs[2] = { + { + .index = MXC_V4L2_OUT_2_SDC, + .name = "DISP3 Video Out", + .type = V4L2_OUTPUT_TYPE_ANALOG, /* not really correct, + but no other choice */ + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN}, + { + .index = MXC_V4L2_OUT_2_ADC, + .name = "DISPx Video Out", + .type = V4L2_OUTPUT_TYPE_ANALOG, /* not really correct, + but no other choice */ + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN} +}; + +static int video_nr = 16; +static spinlock_t g_lock = SPIN_LOCK_UNLOCKED; +static int last_index_n; +static int last_index_c; +static unsigned int ipu_ic_out_max_width_size; + +/* debug counters */ +uint32_t g_irq_cnt; +uint32_t g_buf_output_cnt; +uint32_t g_buf_q_cnt; +uint32_t g_buf_dq_cnt; + +#define QUEUE_SIZE (MAX_FRAME_NUM + 1) +static __inline int queue_size(v4l_queue * q) +{ + if (q->tail >= q->head) + return (q->tail - q->head); + else + return ((q->tail + QUEUE_SIZE) - q->head); +} + +static __inline int queue_buf(v4l_queue * q, int idx) +{ + if (((q->tail + 1) % QUEUE_SIZE) == q->head) + return -1; /* queue full */ + q->list[q->tail] = idx; + q->tail = (q->tail + 1) % QUEUE_SIZE; + return 0; +} + +static __inline int dequeue_buf(v4l_queue * q) +{ + int ret; + if (q->tail == q->head) + return -1; /* queue empty */ + ret = q->list[q->head]; + q->head = (q->head + 1) % QUEUE_SIZE; + return ret; +} + +static __inline int peek_next_buf(v4l_queue * q) +{ + if (q->tail == q->head) + return -1; /* queue empty */ + return q->list[q->head]; +} + +static __inline unsigned long get_jiffies(struct timeval *t) +{ + struct timeval cur; + + if (t->tv_usec >= 1000000) { + t->tv_sec += t->tv_usec / 1000000; + t->tv_usec = t->tv_usec % 1000000; + } + + do_gettimeofday(&cur); + if ((t->tv_sec < cur.tv_sec) + || ((t->tv_sec == cur.tv_sec) && (t->tv_usec < cur.tv_usec))) + return jiffies; + + if (t->tv_usec < cur.tv_usec) { + cur.tv_sec = t->tv_sec - cur.tv_sec - 1; + cur.tv_usec = t->tv_usec + 1000000 - cur.tv_usec; + } else { + cur.tv_sec = t->tv_sec - cur.tv_sec; + cur.tv_usec = t->tv_usec - cur.tv_usec; + } + + return jiffies + timeval_to_jiffies(&cur); +} + +/*! + * Private function to free buffers + * + * @param bufs_paddr Array of physical address of buffers to be freed + * + * @param bufs_vaddr Array of virtual address of buffers to be freed + * + * @param num_buf Number of buffers to be freed + * + * @param size Size for each buffer to be free + * + * @return status 0 success. + */ +static int mxc_free_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + if (bufs_vaddr[i] != 0) { + dma_free_coherent(0, size, bufs_vaddr[i], + bufs_paddr[i]); + pr_debug("freed @ paddr=0x%08X\n", (u32) bufs_paddr[i]); + bufs_paddr[i] = 0; + bufs_vaddr[i] = NULL; + } + } + return 0; +} + +/*! + * Private function to allocate buffers + * + * @param bufs_paddr Output array of physical address of buffers allocated + * + * @param bufs_vaddr Output array of virtual address of buffers allocated + * + * @param num_buf Input number of buffers to allocate + * + * @param size Input size for each buffer to allocate + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int mxc_allocate_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + bufs_vaddr[i] = dma_alloc_coherent(0, size, + &bufs_paddr[i], + GFP_DMA | GFP_KERNEL); + + if (bufs_vaddr[i] == 0) { + mxc_free_buffers(bufs_paddr, bufs_vaddr, i, size); + printk(KERN_ERR "dma_alloc_coherent failed.\n"); + return -ENOBUFS; + } + pr_debug("allocated @ paddr=0x%08X, size=%d.\n", + (u32) bufs_paddr[i], size); + } + + return 0; +} + +/* + * Returns bits per pixel for given pixel format + * + * @param pixelformat V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return bits per pixel of pixelformat + */ +static u32 fmt_to_bpp(u32 pixelformat) +{ + u32 bpp; + + bpp = 8 * bytes_per_pixel(pixelformat); + return bpp; +} + +static bool format_is_yuv(u32 pixelformat) +{ + switch (pixelformat) { + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YUV422P: + case V4L2_PIX_FMT_YVU420: + case V4L2_PIX_FMT_NV12: + return true; + break; + } + return false; +} + +static u32 bpp_to_fmt(struct fb_info *fbi) +{ + if (fbi->var.nonstd) + return fbi->var.nonstd; + + if (fbi->var.bits_per_pixel == 24) + return V4L2_PIX_FMT_BGR24; + else if (fbi->var.bits_per_pixel == 32) + return V4L2_PIX_FMT_BGR32; + else if (fbi->var.bits_per_pixel == 16) + return V4L2_PIX_FMT_RGB565; + + return 0; +} + +static void setup_next_buf_timer(vout_data *vout, int index) +{ + unsigned long timeout; + + /* Setup timer for next buffer */ + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0) + && vout->start_jiffies) + timeout = + vout->start_jiffies + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index].timestamp); + + if (jiffies >= timeout) { + dev_dbg(&vout->video_dev->dev, + "warning: timer timeout already expired.\n"); + } + if (mod_timer(&vout->output_timer, timeout)) + dev_dbg(&vout->video_dev->dev, + "warning: timer was already set\n"); + + dev_dbg(&vout->video_dev->dev, + "timer handler next schedule: %lu\n", timeout); +} + +static int wait_for_disp_vsync(vout_data *vout) +{ + struct fb_info *fbi = + registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + mm_segment_t old_fs; + int ret = 0; + + /* wait for display frame finish */ + if (fbi->fbops->fb_ioctl) { + old_fs = get_fs(); + set_fs(KERNEL_DS); + ret = fbi->fbops->fb_ioctl(fbi, MXCFB_WAIT_FOR_VSYNC, + (unsigned int)NULL); + set_fs(old_fs); + } + return ret; +} + +static void timer_work_func(struct work_struct *work) +{ + vout_data *vout = + container_of(work, vout_data, timer_work); + int index, ret; + int last_buf; + unsigned long lock_flags = 0; + + /* wait 2 first frame finish for ic bypass mode*/ + if ((g_buf_output_cnt == 0) && vout->ic_bypass) { + wait_for_disp_vsync(vout); + wait_for_disp_vsync(vout); + spin_lock_irqsave(&g_lock, lock_flags); + last_buf = vout->ipu_buf[0]; + vout->v4l2_bufs[last_buf].flags = V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, last_buf); + vout->ipu_buf[0] = -1; + last_buf = vout->ipu_buf[1]; + vout->v4l2_bufs[last_buf].flags = V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, last_buf); + vout->ipu_buf[1] = -1; + g_buf_output_cnt = 2; + if (vout->state == STATE_STREAM_PAUSED) { + index = peek_next_buf(&vout->ready_q); + if (index != -1) { + /* Setup timer for next buffer, when stream has been paused */ + pr_debug("next index %d\n", index); + setup_next_buf_timer(vout, index); + vout->state = STATE_STREAM_ON; + } + } + spin_unlock_irqrestore(&g_lock, lock_flags); + return; + } + + if (wait_for_disp_vsync(vout) < 0) { + /* ic_bypass need clear display buffer ready for next update*/ + ipu_clear_buffer_ready(vout->display_ch, IPU_INPUT_BUFFER, + !vout->next_done_ipu_buf); + } + + spin_lock_irqsave(&g_lock, lock_flags); + + if (vout->ic_bypass) { + last_buf = vout->ipu_buf[vout->next_done_ipu_buf]; + if (last_buf != -1) { + g_buf_output_cnt++; + vout->v4l2_bufs[last_buf].flags = V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, last_buf); + wake_up_interruptible(&vout->v4l_bufq); + vout->ipu_buf[vout->next_done_ipu_buf] = -1; + vout->next_done_ipu_buf = !vout->next_done_ipu_buf; + } + } + + if (vout->ic_bypass) + ret = ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf); + else if (LOAD_3FIELDS(vout)) + ret = ipu_select_multi_vdi_buffer(vout->next_rdy_ipu_buf); + else + ret = ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf); + if (ret < 0) { + dev_err(&vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + } + + /* Non IC split action */ + if (!vout->pp_split) + vout->next_rdy_ipu_buf = !vout->next_rdy_ipu_buf; + + /* Setup timer for next buffer */ + index = peek_next_buf(&vout->ready_q); + if (index != -1) + setup_next_buf_timer(vout, index); + else + vout->state = STATE_STREAM_PAUSED; + + spin_unlock_irqrestore(&g_lock, lock_flags); + + if (vout->state == STATE_STREAM_STOPPING) { + if ((vout->ipu_buf[0] == -1) && (vout->ipu_buf[1] == -1)) { + vout->state = STATE_STREAM_OFF; + } + } +} + +static void mxc_v4l2out_timer_handler(unsigned long arg) +{ + int index, ret; + unsigned long lock_flags = 0; + vout_data *vout = (vout_data *) arg; + unsigned int aid_field_offset = 0, current_field_offset = 0; + + spin_lock_irqsave(&g_lock, lock_flags); + + if ((vout->state == STATE_STREAM_STOPPING) + || (vout->state == STATE_STREAM_OFF)) + goto exit0; + /* + * If timer occurs before IPU h/w is ready, then set the state to + * paused and the timer will be set again when next buffer is queued + * or PP comletes + */ + if (vout->ipu_buf[vout->next_rdy_ipu_buf] != -1) { + dev_dbg(&vout->video_dev->dev, "IPU buffer busy\n"); + vout->state = STATE_STREAM_PAUSED; + goto exit0; + } + + /* Dequeue buffer and pass to IPU */ + if (INTERLACED_CONTENT(vout)) { + if (((LOAD_3FIELDS(vout)) && (vout->next_rdy_ipu_buf)) || + ((!LOAD_3FIELDS(vout)) && !(vout->next_rdy_ipu_buf))) { + aid_field_offset = vout->bytesperline; + current_field_offset = 0; + index = last_index_n; + } else { + aid_field_offset = 0; + current_field_offset = vout->bytesperline; + index = dequeue_buf(&vout->ready_q); + if (index == -1) { /* no buffers ready, should never occur */ + dev_err(&vout->video_dev->dev, + "mxc_v4l2out: timer - no queued buffers ready\n"); + goto exit0; + } + g_buf_dq_cnt++; + vout->frame_count++; + last_index_n = index; + } + } else { + current_field_offset = 0; + index = dequeue_buf(&vout->ready_q); + if (index == -1) { /* no buffers ready, should never occur */ + dev_err(&vout->video_dev->dev, + "mxc_v4l2out: timer - no queued buffers ready\n"); + goto exit0; + } + g_buf_dq_cnt++; + vout->frame_count++; + } + + /* update next buffer */ + if (vout->ic_bypass) { + vout->ipu_buf[vout->next_rdy_ipu_buf] = index; + ret = ipu_update_channel_buffer(vout->display_ch, IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf, + vout->v4l2_bufs[index].m.offset); + } else { + if (LOAD_3FIELDS(vout)) { + int index_n = index; + int index_p = last_index_c; + index = last_index_n; + vout->ipu_buf_p[vout->next_rdy_ipu_buf] = index_p; + vout->ipu_buf[vout->next_rdy_ipu_buf] = last_index_c = index; + vout->ipu_buf_n[vout->next_rdy_ipu_buf] = last_index_n = index_n; + last_index_n = vout->ipu_buf_n[vout->next_rdy_ipu_buf]; + last_index_c = vout->ipu_buf[vout->next_rdy_ipu_buf]; + ret = ipu_update_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf, + vout->v4l2_bufs[index].m.offset+current_field_offset); + ret += ipu_update_channel_buffer(MEM_VDI_PRP_VF_MEM_P, + IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf, + vout->v4l2_bufs[index_p].m.offset+aid_field_offset); + ret += ipu_update_channel_buffer(MEM_VDI_PRP_VF_MEM_N, + IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf, + vout->v4l2_bufs[index_n].m.offset+aid_field_offset); + } else { + vout->ipu_buf[vout->next_rdy_ipu_buf] = index; + if (vout->pp_split) { + vout->ipu_buf[!vout->next_rdy_ipu_buf] = index; + /* always left stripe */ + ret = ipu_update_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + 0,/* vout->next_rdy_ipu_buf,*/ + (vout->v4l2_bufs[index].m.offset) + + vout->pp_left_stripe.input_column + + current_field_offset); + + /* the U/V offset has to be updated inside of IDMAC */ + /* according to stripe offset */ + ret += ipu_update_channel_offset(vout->post_proc_ch, + IPU_INPUT_BUFFER, + vout->v2f.fmt.pix.pixelformat, + vout->v2f.fmt.pix.width, + vout->v2f.fmt.pix.height, + vout->bytesperline, + vout->offset.u_offset, + vout->offset.v_offset, + 0, + vout->pp_left_stripe.input_column + current_field_offset); + + } else + ret = ipu_update_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + vout->next_rdy_ipu_buf, + vout->v4l2_bufs[index].m.offset + + current_field_offset); + } + } + + if (ret < 0) { + dev_err(&vout->video_dev->dev, + "unable to update buffer %d address rc=%d\n", + vout->next_rdy_ipu_buf, ret); + goto exit0; + } + + /* set next buffer ready */ + if (schedule_work(&vout->timer_work) == 0) { + dev_err(&vout->video_dev->dev, + "timer work already in queue\n"); + vout->state = STATE_STREAM_PAUSED; + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + + return; + +exit0: + spin_unlock_irqrestore(&g_lock, lock_flags); +} + +static irqreturn_t mxc_v4l2out_work_irq_handler(int irq, void *dev_id) +{ + int last_buf; + int index; + unsigned long lock_flags = 0; + vout_data *vout = dev_id; + int pp_out_buf_num = 0; + int disp_buf_num = 0; + int disp_buf_num_next = 1; + int pp_out_buf_offset = 0; + int release_buffer = 0; + u32 eba_offset; + u16 x_pos; + u16 y_pos; + int ret = -1; + + spin_lock_irqsave(&g_lock, lock_flags); + + g_irq_cnt++; + + /* Process previous buffer */ + if (LOAD_3FIELDS(vout)) + last_buf = vout->ipu_buf_p[vout->next_done_ipu_buf]; + else + last_buf = vout->ipu_buf[vout->next_done_ipu_buf]; + + if (last_buf != -1) { + /* If IC split mode on, update output buffer number */ + if (vout->pp_split) { + pp_out_buf_num = vout->pp_split_buf_num & 1;/* left/right stripe */ + disp_buf_num = vout->pp_split_buf_num >> 1; + disp_buf_num_next = ((vout->pp_split_buf_num+2) & 3) >> 1; + if (!pp_out_buf_num) {/* next buffer is right stripe*/ + eba_offset = vout->pp_right_stripe.input_column;/*always right stripe*/ + ret = ipu_update_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + 1, /* right stripe */ + (vout->v4l2_bufs[vout->ipu_buf[disp_buf_num]].m.offset) + + eba_offset); + + ret += ipu_update_channel_offset(vout->post_proc_ch, + IPU_INPUT_BUFFER, + vout->v2f.fmt.pix.pixelformat, + vout->v2f.fmt.pix.width, + vout->v2f.fmt.pix.height, + vout->bytesperline, + vout->offset.u_offset, + vout->offset.v_offset, + 0, + vout->pp_right_stripe.input_column); + + /* select right stripe */ + ret += ipu_select_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, 1); + if (ret < 0) + dev_err(&vout->video_dev->dev, + "unable to set IPU buffer ready\n"); + + vout->ipu_buf[vout->next_done_ipu_buf] = -1; + vout->next_done_ipu_buf = !vout->next_done_ipu_buf; + + } else /* right stripe is done, run display refresh */ + ret = ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, + disp_buf_num); + + vout->next_rdy_ipu_buf = !vout->next_rdy_ipu_buf; + + /* offset for next buffer's EBA */ + pp_out_buf_offset = pp_out_buf_num ? vout->pp_right_stripe.output_column : + vout->pp_left_stripe.output_column; + eba_offset = 0; + if (vout->cur_disp_output == 5) { + x_pos = (vout->crop_current.left / 8) * 8; + y_pos = vout->crop_current.top; + eba_offset = (vout->xres * y_pos + x_pos) * vout->bpp / 8; + } + + /* next buffer update */ + eba_offset = vout->display_bufs[disp_buf_num_next] + + pp_out_buf_offset + eba_offset; + + ipu_update_channel_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, + pp_out_buf_num, eba_offset); + + /* next buffer ready */ + ret = ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, pp_out_buf_num); + + /* next stripe_buffer index 0..3 */ + vout->pp_split_buf_num = (vout->pp_split_buf_num + 1) & 3; + } else { + /* show to display */ + ret = ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, + vout->next_done_ipu_buf); + ret += ipu_select_buffer(vout->display_input_ch, IPU_OUTPUT_BUFFER, + vout->next_done_ipu_buf); + } + + /* release buffer. For split mode: if second stripe is done */ + release_buffer = vout->pp_split ? pp_out_buf_num : 1; + if (release_buffer) { + if ((!INTERLACED_CONTENT(vout)) || (vout->next_done_ipu_buf)) { + g_buf_output_cnt++; + vout->v4l2_bufs[last_buf].flags = V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, last_buf); + wake_up_interruptible(&vout->v4l_bufq); + } + vout->ipu_buf[vout->next_done_ipu_buf] = -1; + if (LOAD_3FIELDS(vout)) { + vout->ipu_buf_p[vout->next_done_ipu_buf] = -1; + vout->ipu_buf_n[vout->next_done_ipu_buf] = -1; + } + vout->next_done_ipu_buf = !vout->next_done_ipu_buf; + } + } /* end of last_buf != -1 */ + + if (vout->state == STATE_STREAM_STOPPING) { + if ((vout->ipu_buf[0] == -1) && (vout->ipu_buf[1] == -1)) { + vout->state = STATE_STREAM_OFF; + } + } else if ((vout->state == STATE_STREAM_PAUSED) + && ((index = peek_next_buf(&vout->ready_q)) != -1)) { + /* Setup timer for next buffer, when stream has been paused */ + pr_debug("next index %d\n", index); + setup_next_buf_timer(vout, index); + vout->state = STATE_STREAM_ON; + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + + return IRQ_HANDLED; +} + +/*! + * Initialize VDI channels + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int init_VDI_channel(vout_data *vout, ipu_channel_params_t params) +{ + struct device *dev = &vout->video_dev->dev; + + if (ipu_init_channel(MEM_VDI_PRP_VF_MEM, ¶ms) != 0) { + dev_dbg(dev, "Error initializing VDI current channel\n"); + return -EINVAL; + } + if (LOAD_3FIELDS(vout)) { + if (ipu_init_channel(MEM_VDI_PRP_VF_MEM_P, ¶ms) != 0) { + dev_err(dev, "Error initializing VDI previous channel\n"); + return -EINVAL; + } + if (ipu_init_channel(MEM_VDI_PRP_VF_MEM_N, ¶ms) != 0) { + dev_err(dev, "Error initializing VDI next channel\n"); + return -EINVAL; + } + } + return 0; +} + +/*! + * Initialize VDI channel buffers + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int init_VDI_in_channel_buffer(vout_data *vout, uint32_t in_pixel_fmt, + uint16_t in_width, uint16_t in_height, + uint32_t stride, + dma_addr_t phyaddr_0, dma_addr_t phyaddr_1, + uint32_t u_offset, uint32_t v_offset) +{ + struct device *dev = &vout->video_dev->dev; + + if (ipu_init_channel_buffer(MEM_VDI_PRP_VF_MEM, IPU_INPUT_BUFFER, + in_pixel_fmt, in_width, in_height, stride, + IPU_ROTATE_NONE, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset+vout->bytesperline, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset, + u_offset, v_offset) != 0) { + dev_err(dev, "Error initializing VDI current input buffer\n"); + return -EINVAL; + } + if (LOAD_3FIELDS(vout)) { + if (ipu_init_channel_buffer(MEM_VDI_PRP_VF_MEM_P, + IPU_INPUT_BUFFER, + in_pixel_fmt, in_width, in_height, + stride, IPU_ROTATE_NONE, + vout->v4l2_bufs[vout->ipu_buf_p[0]].m.offset, + vout->v4l2_bufs[vout->ipu_buf_p[0]].m.offset+vout->bytesperline, + u_offset, v_offset) != 0) { + dev_err(dev, "Error initializing VDI previous input buffer\n"); + return -EINVAL; + } + if (ipu_init_channel_buffer(MEM_VDI_PRP_VF_MEM_N, + IPU_INPUT_BUFFER, + in_pixel_fmt, in_width, in_height, + stride, IPU_ROTATE_NONE, + vout->v4l2_bufs[vout->ipu_buf_n[0]].m.offset, + vout->v4l2_bufs[vout->ipu_buf_n[0]].m.offset+vout->bytesperline, + u_offset, v_offset) != 0) { + dev_err(dev, "Error initializing VDI next input buffer\n"); + return -EINVAL; + } + } + return 0; +} + +/*! + * Initialize VDI path + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int init_VDI(ipu_channel_params_t params, vout_data *vout, + struct device *dev, struct fb_info *fbi, + u16 out_width, u16 out_height) +{ + params.mem_prp_vf_mem.in_width = vout->v2f.fmt.pix.width; + params.mem_prp_vf_mem.in_height = vout->v2f.fmt.pix.height; + params.mem_prp_vf_mem.motion_sel = vout->motion_sel; + params.mem_prp_vf_mem.field_fmt = vout->field_fmt; + params.mem_prp_vf_mem.in_pixel_fmt = vout->v2f.fmt.pix.pixelformat; + params.mem_prp_vf_mem.out_width = out_width; + params.mem_prp_vf_mem.out_height = out_height; + if (vout->display_ch == ADC_SYS2) + params.mem_prp_vf_mem.out_pixel_fmt = SDC_FG_FB_FORMAT; + else + params.mem_prp_vf_mem.out_pixel_fmt = bpp_to_fmt(fbi); + + if (init_VDI_channel(vout, params) != 0) { + dev_err(dev, "Error init_VDI_channel channel\n"); + return -EINVAL; + } + + if (init_VDI_in_channel_buffer(vout, + params.mem_prp_vf_mem.in_pixel_fmt, + params.mem_prp_vf_mem.in_width, + params.mem_prp_vf_mem.in_height, + bytes_per_pixel(params.mem_prp_vf_mem. + in_pixel_fmt), + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset, + vout->v4l2_bufs[vout->ipu_buf[1]].m.offset, + vout->offset.u_offset, + vout->offset.v_offset) != 0) { + return -EINVAL; + } + + if (!ipu_can_rotate_in_place(vout->rotate)) { + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + if (mxc_allocate_buffers + (vout->rot_pp_bufs, vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size) < 0) { + return -ENOBUFS; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_prp_vf_mem. + out_pixel_fmt, out_width, + out_height, out_width, + IPU_ROTATE_NONE, + vout->rot_pp_bufs[0], + vout->rot_pp_bufs[1], 0, 0) != 0) { + dev_err(dev, "Error initializing PRP output buffer\n"); + return -EINVAL; + } + + if (ipu_init_channel(MEM_ROT_VF_MEM, NULL) != 0) { + dev_err(dev, "Error initializing PP ROT channel\n"); + return -EINVAL; + } + if (ipu_init_channel_buffer(MEM_ROT_VF_MEM, + IPU_INPUT_BUFFER, + params.mem_prp_vf_mem. + out_pixel_fmt, out_width, + out_height, out_width, + vout->rotate, + vout->rot_pp_bufs[0], + vout->rot_pp_bufs[1], 0, 0) != 0) { + dev_err(dev, + "Error initializing PP ROT input buffer\n"); + return -EINVAL; + } + + /* swap width and height */ + if (vout->rotate >= IPU_ROTATE_90_RIGHT) { + out_width = vout->crop_current.width; + out_height = vout->crop_current.height; + } + + if (ipu_init_channel_buffer(MEM_ROT_VF_MEM, + IPU_OUTPUT_BUFFER, + params.mem_prp_vf_mem. + out_pixel_fmt, out_width, + out_height, out_width, + IPU_ROTATE_NONE, + vout->display_bufs[0], + vout->display_bufs[1], 0, 0) != 0) { + dev_err(dev, + "Error initializing PP-VDI output buffer\n"); + return -EINVAL; + } + + if (ipu_link_channels(vout->post_proc_ch, MEM_ROT_VF_MEM) < 0) + return -EINVAL; + + vout->display_input_ch = MEM_ROT_VF_MEM; + ipu_enable_channel(MEM_ROT_VF_MEM); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 1); + } else { + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_prp_vf_mem. + out_pixel_fmt, out_width, + out_height, out_width, + vout->rotate, + vout->display_bufs[0], + vout->display_bufs[1], 0, 0) != 0) { + dev_err(dev, + "Error initializing PP-VDI output buffer\n"); + return -EINVAL; + } + } + return 0; +} + +/*! + * Initialize PP path + * + * @param params structure ipu_channel_params_t + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int init_PP(ipu_channel_params_t *params, vout_data *vout, + struct device *dev, struct fb_info *fbi, + u16 out_width, u16 out_height) +{ + u16 in_width, out_stride; /* stride of output channel */ + u32 eba_offset; + u16 x_pos; + u16 y_pos; + eba_offset = 0; + x_pos = 0; + y_pos = 0; + + if (vout->display_ch == ADC_SYS2) + params->mem_pp_mem.out_pixel_fmt = SDC_FG_FB_FORMAT; + else + params->mem_pp_mem.out_pixel_fmt = bpp_to_fmt(fbi); + + if (vout->cur_disp_output == 5) { + x_pos = (vout->crop_current.left / 8) * 8; + y_pos = vout->crop_current.top; + eba_offset = (vout->xres*y_pos + x_pos) * + bytes_per_pixel(params->mem_pp_mem.out_pixel_fmt); + } + + vout->bpp = fmt_to_bpp(params->mem_pp_mem.out_pixel_fmt); + out_stride = vout->xres * + bytes_per_pixel(params->mem_pp_mem.out_pixel_fmt); + in_width = params->mem_pp_mem.in_width = vout->v2f.fmt.pix.width; + params->mem_pp_mem.in_height = vout->v2f.fmt.pix.height; + params->mem_pp_mem.in_pixel_fmt = vout->v2f.fmt.pix.pixelformat; + params->mem_pp_mem.out_width = out_width; + params->mem_pp_mem.out_height = out_height; + params->mem_pp_mem.out_resize_ratio = 0; /* 0 means unused */ + + /* split IC by two stripes, the by pass is impossible*/ + if (vout->pp_split) { + ipu_calc_stripes_sizes( + params->mem_pp_mem.in_width, /* input frame width;>1 */ + params->mem_pp_mem.out_width, /* output frame width; >1 */ + ipu_ic_out_max_width_size, + (((unsigned long long)1) << 32), /* 32bit for fractional*/ + 1, /* equal stripes */ + params->mem_pp_mem.in_pixel_fmt, + params->mem_pp_mem.out_pixel_fmt, + &(vout->pp_left_stripe), + &(vout->pp_right_stripe)); + + vout->pp_left_stripe.input_column = vout->pp_left_stripe.input_column * + fmt_to_bpp(vout->v2f.fmt.pix.pixelformat) / 8; + vout->pp_left_stripe.output_column = vout->pp_left_stripe.output_column * + fmt_to_bpp(params->mem_pp_mem.out_pixel_fmt) / 8; + vout->pp_right_stripe.input_column = vout->pp_right_stripe.input_column * + fmt_to_bpp(vout->v2f.fmt.pix.pixelformat) / 8; + vout->pp_right_stripe.output_column = vout->pp_right_stripe.output_column * + fmt_to_bpp(params->mem_pp_mem.out_pixel_fmt) / 8; + + /* updare parameters */ + params->mem_pp_mem.in_width = vout->pp_left_stripe.input_width; + params->mem_pp_mem.out_width = vout->pp_left_stripe.output_width; + out_width = vout->pp_left_stripe.output_width; + /* for using in ic_init*/ + params->mem_pp_mem.out_resize_ratio = vout->pp_left_stripe.irr; + + vout->pp_split_buf_num = 0; + } + + if (ipu_init_channel(vout->post_proc_ch, params) != 0) { + dev_err(dev, "Error initializing PP channel\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + params->mem_pp_mem.in_pixel_fmt, + params->mem_pp_mem.in_width, + params->mem_pp_mem.in_height, + vout->v2f.fmt.pix.bytesperline / + bytes_per_pixel(params->mem_pp_mem. + in_pixel_fmt), + IPU_ROTATE_NONE, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset, + vout->v4l2_bufs[vout->ipu_buf[1]].m.offset, + vout->offset.u_offset, + vout->offset.v_offset) != 0) { + dev_err(dev, "Error initializing PP input buffer\n"); + return -EINVAL; + } + + if (!ipu_can_rotate_in_place(vout->rotate)) { + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + if (mxc_allocate_buffers + (vout->rot_pp_bufs, vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size) < 0) { + return -ENOBUFS; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params->mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_stride, + IPU_ROTATE_NONE, + vout->rot_pp_bufs[0] + eba_offset, + vout->rot_pp_bufs[1] + eba_offset, 0, 0) != 0) { + dev_err(dev, "Error initializing PP output buffer\n"); + return -EINVAL; + } + + if (ipu_init_channel(MEM_ROT_PP_MEM, NULL) != 0) { + dev_err(dev, "Error initializing PP ROT channel\n"); + return -EINVAL; + } + if (ipu_init_channel_buffer(MEM_ROT_PP_MEM, + IPU_INPUT_BUFFER, + params->mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_stride, + vout->rotate, + vout->rot_pp_bufs[0], + vout->rot_pp_bufs[1], 0, 0) != 0) { + dev_err(dev, + "Error initializing PP ROT input buffer\n"); + return -EINVAL; + } + + /* swap width and height */ + if (vout->rotate >= IPU_ROTATE_90_RIGHT) { + out_width = vout->crop_current.width; + out_height = vout->crop_current.height; + } + + if (ipu_init_channel_buffer(MEM_ROT_PP_MEM, + IPU_OUTPUT_BUFFER, + params->mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_stride, + IPU_ROTATE_NONE, + vout->display_bufs[0] + eba_offset, + vout->display_bufs[1] + eba_offset, 0, 0) != 0) { + dev_err(dev, "Error initializing PP output buffer\n"); + return -EINVAL; + } + + if (ipu_link_channels(vout->post_proc_ch, MEM_ROT_PP_MEM) < 0) + return -EINVAL; + + vout->display_input_ch = MEM_ROT_PP_MEM; + ipu_enable_channel(MEM_ROT_PP_MEM); + ipu_select_buffer(MEM_ROT_PP_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_ROT_PP_MEM, IPU_OUTPUT_BUFFER, 1); + } else { + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params->mem_pp_mem. + out_pixel_fmt, out_width, + out_height, out_stride, + vout->rotate, + vout->display_bufs[0] + eba_offset, + vout->display_bufs[1] + eba_offset, 0, 0) != 0) { + dev_err(dev, "Error initializing PP output buffer\n"); + return -EINVAL; + } + } + + /* fix EBAs for IDMAC channels */ + if (vout->pp_split) { + ipu_update_channel_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, + 0, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset + + vout->pp_left_stripe.input_column); + ipu_update_channel_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, + 1, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset + + vout->pp_right_stripe.input_column); + ipu_update_channel_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, + 0, + vout->display_bufs[0] + eba_offset + + vout->pp_left_stripe.output_column); + + ipu_update_channel_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, + 1, + vout->display_bufs[0] + eba_offset + + vout->pp_right_stripe.output_column); + } + + return 0; +} + +/*! + * Start the output stream + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamon(vout_data * vout) +{ + struct device *dev = &vout->video_dev->dev; + ipu_channel_params_t params; + struct mxcfb_pos fb_pos; + struct fb_var_screeninfo fbvar; + struct fb_info *fbi = + registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + u16 out_width; + u16 out_height; + bool use_direct_adc = false; + mm_segment_t old_fs; + int rc = 0; + + dev_dbg(dev, "mxc_v4l2out_streamon: field format=%d\n", + vout->field_fmt); + + if (!vout) + return -EINVAL; + + if (vout->state != STATE_STREAM_OFF) + return -EBUSY; + + if (queue_size(&vout->ready_q) < 2) { + dev_err(dev, "2 buffers not been queued yet!\n"); + return -EINVAL; + } + + if ((vout->field_fmt == V4L2_FIELD_BOTTOM) || (vout->field_fmt == V4L2_FIELD_TOP)) { + dev_err(dev, "4 queued buffers need, not supported yet!\n"); + return -EINVAL; + } + + g_irq_cnt = g_buf_output_cnt = g_buf_q_cnt = g_buf_dq_cnt = 0; + out_width = vout->crop_current.width; + out_height = vout->crop_current.height; + vout->next_done_ipu_buf = 0; + vout->next_rdy_ipu_buf = 1; + vout->pp_split = 0; + + if (!INTERLACED_CONTENT(vout)) { + vout->next_done_ipu_buf = vout->next_rdy_ipu_buf = 0; + vout->ipu_buf[0] = dequeue_buf(&vout->ready_q); +#ifdef CONFIG_MXC_IPU_V1 + ipu_ic_out_max_width_size = 800; +#else + ipu_ic_out_max_width_size = 1024; +#endif + /* split IC by two stripes, the by pass is impossible*/ + if ((out_width != vout->v2f.fmt.pix.width || + out_height != vout->v2f.fmt.pix.height) && + out_width > ipu_ic_out_max_width_size) { + vout->pp_split = 1; + vout->ipu_buf[1] = vout->ipu_buf[0]; + vout->frame_count = 1; + } else { + vout->ipu_buf[1] = dequeue_buf(&vout->ready_q); + vout->frame_count = 2; + } + } else if (!LOAD_3FIELDS(vout)) { + vout->ipu_buf[0] = dequeue_buf(&vout->ready_q); + vout->ipu_buf[1] = -1; + vout->frame_count = 1; + last_index_n = vout->ipu_buf[0]; + } else { + vout->ipu_buf_p[0] = dequeue_buf(&vout->ready_q); + vout->ipu_buf[0] = vout->ipu_buf_p[0]; + vout->ipu_buf_n[0] = dequeue_buf(&vout->ready_q); + vout->ipu_buf_p[1] = -1; + vout->ipu_buf[1] = -1; + vout->ipu_buf_n[1] = -1; + last_index_c = vout->ipu_buf[0]; + last_index_n = vout->ipu_buf_n[0]; + vout->frame_count = 2; + } + + /* Init Display Channel */ +#ifdef CONFIG_FB_MXC_ASYNC_PANEL + if (vout->cur_disp_output < DISP3) { + vout->work_irq = IPU_IRQ_PP_IN_EOF; + ipu_clear_irq(vout->work_irq); + ipu_request_irq(vout->work_irq, + mxc_v4l2out_work_irq_handler, + 0, vout->video_dev->name, vout); + mxcfb_set_refresh_mode(fbi, MXCFB_REFRESH_OFF, 0); + fbi = NULL; + if (ipu_can_rotate_in_place(vout->rotate)) { + dev_dbg(dev, "Using PP direct to ADC channel\n"); + use_direct_adc = true; + vout->display_ch = MEM_PP_ADC; + vout->post_proc_ch = MEM_PP_ADC; + + memset(¶ms, 0, sizeof(params)); + params.mem_pp_adc.in_width = vout->v2f.fmt.pix.width; + params.mem_pp_adc.in_height = vout->v2f.fmt.pix.height; + params.mem_pp_adc.in_pixel_fmt = + vout->v2f.fmt.pix.pixelformat; + params.mem_pp_adc.out_width = out_width; + params.mem_pp_adc.out_height = out_height; + params.mem_pp_adc.out_pixel_fmt = SDC_FG_FB_FORMAT; +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.mem_pp_adc.out_left = + 2 + vout->crop_current.left; +#else + params.mem_pp_adc.out_left = + 12 + vout->crop_current.left; +#endif + params.mem_pp_adc.out_top = vout->crop_current.top; + if (ipu_init_channel(vout->post_proc_ch, ¶ms) != 0) { + dev_err(dev, "Error initializing PP chan\n"); + return -EINVAL; + } + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_INPUT_BUFFER, + params.mem_pp_adc. + in_pixel_fmt, + params.mem_pp_adc.in_width, + params.mem_pp_adc.in_height, + vout->v2f.fmt.pix. + bytesperline / + bytes_per_pixel(params. + mem_pp_adc. + in_pixel_fmt), + vout->rotate, + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset, + vout->v4l2_bufs[vout->ipu_buf[1]].m.offset, + vout->offset.u_offset, + vout->offset.v_offset) != + 0) { + dev_err(dev, "Error initializing PP in buf\n"); + return -EINVAL; + } + + if (ipu_init_channel_buffer(vout->post_proc_ch, + IPU_OUTPUT_BUFFER, + params.mem_pp_adc. + out_pixel_fmt, out_width, + out_height, out_width, + vout->rotate, 0, 0, 0, + 0) != 0) { + dev_err(dev, + "Error initializing PP output buffer\n"); + return -EINVAL; + } + + } else { + dev_dbg(dev, "Using ADC SYS2 channel\n"); + vout->display_ch = ADC_SYS2; + vout->post_proc_ch = MEM_PP_MEM; + + if (vout->display_bufs[0]) { + mxc_free_buffers(vout->display_bufs, + vout->display_bufs_vaddr, + 2, vout->display_buf_size); + } + + vout->display_buf_size = vout->crop_current.width * + vout->crop_current.height * + fmt_to_bpp(SDC_FG_FB_FORMAT) / 8; + mxc_allocate_buffers(vout->display_bufs, + vout->display_bufs_vaddr, + 2, vout->display_buf_size); + + memset(¶ms, 0, sizeof(params)); + params.adc_sys2.disp = vout->cur_disp_output; + params.adc_sys2.ch_mode = WriteTemplateNonSeq; +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.adc_sys2.out_left = 2 + vout->crop_current.left; +#else + params.adc_sys2.out_left = 12 + vout->crop_current.left; +#endif + params.adc_sys2.out_top = vout->crop_current.top; + if (ipu_init_channel(ADC_SYS2, ¶ms) < 0) + return -EINVAL; + + if (ipu_init_channel_buffer(vout->display_ch, + IPU_INPUT_BUFFER, + SDC_FG_FB_FORMAT, + out_width, out_height, + out_width, IPU_ROTATE_NONE, + vout->display_bufs[0], + vout->display_bufs[1], 0, + 0) != 0) { + dev_err(dev, + "Error initializing SDC FG buffer\n"); + return -EINVAL; + } + } + } else +#endif + { /* Use SDC */ + unsigned int ipu_ch = CHAN_NONE; + + dev_dbg(dev, "Using SDC channel\n"); + + if (INTERLACED_CONTENT(vout)) + vout->work_irq = IPU_IRQ_PRP_VF_OUT_EOF; + else + vout->work_irq = IPU_IRQ_PP_IN_EOF; + + /* + * Bypass IC if resizing and rotation are not needed + * Meanwhile, apply IC bypass to SDC only + */ + fbvar = fbi->var; + vout->xres = fbvar.xres; + vout->yres = fbvar.yres; + + if (vout->cur_disp_output == 3 || vout->cur_disp_output == 5) { + fbvar.bits_per_pixel = 16; + if (format_is_yuv(vout->v2f.fmt.pix.pixelformat)) + fbvar.nonstd = IPU_PIX_FMT_UYVY; + else + fbvar.nonstd = 0; + if (vout->cur_disp_output == 3) { + fbvar.xres = out_width; + fbvar.yres = out_height; + vout->xres = fbvar.xres; + vout->yres = fbvar.yres; + } + + fbvar.xres_virtual = fbvar.xres; + fbvar.yres_virtual = fbvar.yres * 2; + } + + if (out_width == vout->v2f.fmt.pix.width && + out_height == vout->v2f.fmt.pix.height && + vout->xres == out_width && + vout->yres == out_height && + ipu_can_rotate_in_place(vout->rotate)) { + vout->ic_bypass = 1; + } else { + vout->ic_bypass = 0; + } + +#ifdef CONFIG_MXC_IPU_V1 + /* IPUv1 needs IC to do CSC */ + if (format_is_yuv(vout->v2f.fmt.pix.pixelformat) != + format_is_yuv(bpp_to_fmt(fbi))) + vout->ic_bypass = 0; +#endif + + /* We are using IC to do input cropping */ + if (vout->queue_buf_paddr[vout->ipu_buf[0]] != + vout->v4l2_bufs[vout->ipu_buf[0]].m.offset || + vout->queue_buf_paddr[vout->ipu_buf[1]] != + vout->v4l2_bufs[vout->ipu_buf[1]].m.offset) + vout->ic_bypass = 0; + + if (fbi->fbops->fb_ioctl) { + old_fs = get_fs(); + set_fs(KERNEL_DS); + fbi->fbops->fb_ioctl(fbi, MXCFB_GET_FB_IPU_CHAN, + (unsigned long)&ipu_ch); + set_fs(old_fs); + } + + if (ipu_ch == CHAN_NONE) { + dev_err(dev, "Can not get display ipu channel\n"); + return -EINVAL; + } + + vout->display_ch = ipu_ch; + + if (vout->ic_bypass) { + pr_debug("Bypassing IC\n"); + vout->work_irq = -1; + fbvar.bits_per_pixel = 8* + bytes_per_pixel(vout->v2f.fmt.pix.pixelformat); + fbvar.nonstd = vout->v2f.fmt.pix.pixelformat; + } + + fbvar.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbvar); + + if (fbi->fbops->fb_ioctl && vout->display_ch == MEM_FG_SYNC) { + fb_pos.x = vout->crop_current.left; + fb_pos.y = vout->crop_current.top; + old_fs = get_fs(); + set_fs(KERNEL_DS); + fbi->fbops->fb_ioctl(fbi, MXCFB_SET_OVERLAY_POS, + (unsigned long)&fb_pos); + set_fs(old_fs); + } + + vout->display_bufs[1] = fbi->fix.smem_start; + vout->display_bufs[0] = fbi->fix.smem_start + + (fbi->fix.line_length * vout->yres); + vout->display_buf_size = vout->xres * + vout->yres * fbi->var.bits_per_pixel / 8; + + if (format_is_yuv(vout->v2f.fmt.pix.pixelformat)) { + int i; + short * tmp = (short *) fbi->screen_base; + for (i = 0; i < (fbi->fix.line_length * fbi->var.yres_virtual)/2; i++, tmp++) + *tmp = 0x80; + } else + memset(fbi->screen_base, 0x10, + fbi->fix.line_length * fbi->var.yres_virtual); + + if (INTERLACED_CONTENT(vout)) + vout->post_proc_ch = MEM_VDI_PRP_VF_MEM; + else + vout->post_proc_ch = MEM_PP_MEM; + + if (!vout->ic_bypass) { + ipu_clear_irq(vout->work_irq); + ipu_request_irq(vout->work_irq, + mxc_v4l2out_work_irq_handler, + 0, vout->video_dev->name, vout); + } + } + + /* Init PP */ + if (use_direct_adc == false && !vout->ic_bypass) { + if (vout->rotate >= IPU_ROTATE_90_RIGHT) { + out_width = vout->crop_current.height; + out_height = vout->crop_current.width; + } + vout->display_input_ch = vout->post_proc_ch; + memset(¶ms, 0, sizeof(params)); + if (INTERLACED_CONTENT(vout)) { + rc = init_VDI(params, vout, dev, fbi, out_width, out_height); + } else { + rc = init_PP(¶ms, vout, dev, fbi, out_width, out_height); + } + if (rc < 0) + return rc; + } + + vout->state = STATE_STREAM_PAUSED; + + if (use_direct_adc == false) { + if (!vout->ic_bypass) { +#ifndef CONFIG_MXC_IPU_V1 + ipu_enable_channel(vout->post_proc_ch); +#endif + if (LOAD_3FIELDS(vout)) { + ipu_enable_channel(MEM_VDI_PRP_VF_MEM_P); + ipu_enable_channel(MEM_VDI_PRP_VF_MEM_N); + ipu_select_multi_vdi_buffer(0); + } else if (INTERLACED_CONTENT(vout)) { + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 0); + } else { + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 0); + if (!vout->pp_split) + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 1); + } + ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(vout->post_proc_ch, IPU_OUTPUT_BUFFER, 1); +#ifdef CONFIG_MXC_IPU_V1 + ipu_enable_channel(vout->post_proc_ch); +#endif + } else { + ipu_update_channel_buffer(vout->display_ch, + IPU_INPUT_BUFFER, + 0, vout->v4l2_bufs[vout->ipu_buf[0]].m.offset); + ipu_update_channel_buffer(vout->display_ch, + IPU_INPUT_BUFFER, + 1, vout->v4l2_bufs[vout->ipu_buf[1]].m.offset); + ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, 0); + ipu_select_buffer(vout->display_ch, IPU_INPUT_BUFFER, 1); + schedule_work(&vout->timer_work); + } + + if (fbi) { + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_UNBLANK); + release_console_sem(); + } else { + ipu_enable_channel(vout->display_ch); + } + } else { + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 0); + ipu_select_buffer(vout->post_proc_ch, IPU_INPUT_BUFFER, 1); + ipu_enable_channel(vout->post_proc_ch); + } + vout->start_jiffies = jiffies; + + msleep(1); + + dev_dbg(dev, + "streamon: start time = %lu jiffies\n", vout->start_jiffies); + + return 0; +} + +/*! + * Shut down the voutera + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamoff(vout_data * vout) +{ + struct fb_info *fbi = + registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + int i, retval = 0; + unsigned long lockflag = 0; + + if (!vout) + return -EINVAL; + + if (vout->state == STATE_STREAM_OFF) { + return 0; + } + + if (!vout->ic_bypass) + ipu_free_irq(vout->work_irq, vout); + + cancel_work_sync(&vout->timer_work); + + spin_lock_irqsave(&g_lock, lockflag); + + del_timer(&vout->output_timer); + + if (vout->state == STATE_STREAM_ON) { + vout->state = STATE_STREAM_STOPPING; + } + + spin_unlock_irqrestore(&g_lock, lockflag); + + if (vout->display_ch == MEM_FG_SYNC) { + struct mxcfb_pos fb_pos; + mm_segment_t old_fs; + + fb_pos.x = 0; + fb_pos.y = 0; + if (fbi->fbops->fb_ioctl) { + old_fs = get_fs(); + set_fs(KERNEL_DS); + fbi->fbops->fb_ioctl(fbi, MXCFB_SET_OVERLAY_POS, + (unsigned long)&fb_pos); + set_fs(old_fs); + } + } + + if (vout->post_proc_ch == MEM_PP_MEM || + vout->post_proc_ch == MEM_PRP_VF_MEM) { + /* SDC or ADC with Rotation */ + if (!ipu_can_rotate_in_place(vout->rotate)) { + ipu_unlink_channels(MEM_PP_MEM, MEM_ROT_PP_MEM); + ipu_disable_channel(MEM_ROT_PP_MEM, true); + + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + } + ipu_disable_channel(MEM_PP_MEM, true); + + if (vout->display_ch == ADC_SYS2 || + vout->display_ch == MEM_FG_SYNC) { + ipu_disable_channel(vout->display_ch, true); + ipu_uninit_channel(vout->display_ch); + } else { + fbi->var.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbi->var); + + if (vout->display_ch == MEM_FG_SYNC) { + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_POWERDOWN); + release_console_sem(); + } + + vout->display_bufs[0] = 0; + vout->display_bufs[1] = 0; + } + + ipu_uninit_channel(MEM_PP_MEM); + if (!ipu_can_rotate_in_place(vout->rotate)) + ipu_uninit_channel(MEM_ROT_PP_MEM); + } else if (INTERLACED_CONTENT(vout) && (vout->post_proc_ch == MEM_VDI_PRP_VF_MEM)) { + if (!ipu_can_rotate_in_place(vout->rotate)) { + ipu_unlink_channels(MEM_VDI_PRP_VF_MEM, + MEM_ROT_VF_MEM); + ipu_disable_channel(MEM_ROT_VF_MEM, true); + + if (vout->rot_pp_bufs[0]) { + mxc_free_buffers(vout->rot_pp_bufs, + vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + } + } + + ipu_disable_channel(MEM_VDI_PRP_VF_MEM, true); + + if (vout->display_ch == ADC_SYS2 || + vout->display_ch == MEM_FG_SYNC) { + ipu_disable_channel(vout->display_ch, true); + ipu_uninit_channel(vout->display_ch); + } else { + fbi->var.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbi->var); + + if (vout->display_ch == MEM_FG_SYNC) { + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_POWERDOWN); + release_console_sem(); + } + + vout->display_bufs[0] = 0; + vout->display_bufs[1] = 0; + } + + ipu_uninit_channel(MEM_VDI_PRP_VF_MEM); + if (!ipu_can_rotate_in_place(vout->rotate)) + ipu_uninit_channel(MEM_ROT_VF_MEM); + } else { /* ADC Direct */ + ipu_disable_channel(MEM_PP_ADC, true); + ipu_uninit_channel(MEM_PP_ADC); + } + vout->ready_q.head = vout->ready_q.tail = 0; + vout->done_q.head = vout->done_q.tail = 0; + for (i = 0; i < vout->buffer_cnt; i++) { + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + + vout->state = STATE_STREAM_OFF; + +#ifdef CONFIG_FB_MXC_ASYNC_PANEL + if (vout->cur_disp_output < DISP3) { + if (vout->display_bufs[0] != 0) { + mxc_free_buffers(vout->display_bufs, + vout->display_bufs_vaddr, 2, + vout->display_buf_size); + } + + mxcfb_set_refresh_mode(registered_fb + [vout-> + output_fb_num[vout->cur_disp_output]], + MXCFB_REFRESH_PARTIAL, 0); + } +#endif + + return retval; +} + +/* + * Valid whether the palette is supported + * + * @param palette V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return 1 if supported, 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + return ((palette == V4L2_PIX_FMT_RGB565) || + (palette == V4L2_PIX_FMT_BGR24) || + (palette == V4L2_PIX_FMT_RGB24) || + (palette == V4L2_PIX_FMT_BGR32) || + (palette == V4L2_PIX_FMT_RGB32) || + (palette == V4L2_PIX_FMT_NV12) || + (palette == V4L2_PIX_FMT_UYVY) || + (palette == V4L2_PIX_FMT_YUYV) || + (palette == V4L2_PIX_FMT_YUV422P) || + (palette == V4L2_PIX_FMT_YUV420)); +} + +/* + * V4L2 - Handles VIDIOC_G_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_g_fmt(vout_data * vout, struct v4l2_format *f) +{ + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + return -EINVAL; + } + *f = vout->v2f; + return 0; +} + +/* + * V4L2 - Handles VIDIOC_S_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_s_fmt(vout_data * vout, struct v4l2_format *f) +{ + int retval = 0; + u32 size = 0; + u32 bytesperline; + + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + goto err0; + } + if (!valid_mode(f->fmt.pix.pixelformat)) { + dev_err(&vout->video_dev->dev, "pixel format not supported\n"); + retval = -EINVAL; + goto err0; + } + + bytesperline = (f->fmt.pix.width * fmt_to_bpp(f->fmt.pix.pixelformat)) / + 8; + if (f->fmt.pix.bytesperline < bytesperline) { + f->fmt.pix.bytesperline = bytesperline; + } else { + bytesperline = f->fmt.pix.bytesperline; + } + vout->bytesperline = bytesperline; + + /* Based on http://v4l2spec.bytesex.org/spec/x6386.htm#V4L2-FIELD */ + vout->field_fmt = f->fmt.pix.field; + switch (vout->field_fmt) { + /* Images are in progressive format, not interlaced */ + case V4L2_FIELD_NONE: + break; + /* The two fields of a frame are passed in separate buffers, + in temporal order, i. e. the older one first. */ + case V4L2_FIELD_ALTERNATE: + dev_err(&vout->video_dev->dev, + "V4L2_FIELD_ALTERNATE field format not supported yet!\n"); + break; + case V4L2_FIELD_INTERLACED_TB: + if (cpu_is_mx51()) + break; + case V4L2_FIELD_INTERLACED_BT: + dev_err(&vout->video_dev->dev, + "V4L2_FIELD_INTERLACED_BT field format not supported yet!\n"); + default: + vout->field_fmt = V4L2_FIELD_NONE; + break; + } + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_YUV422P: + /* byteperline for YUV planar formats is for + Y plane only */ + size = bytesperline * f->fmt.pix.height * 2; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_NV12: + size = (bytesperline * f->fmt.pix.height * 3) / 2; + break; + default: + size = bytesperline * f->fmt.pix.height; + break; + } + + /* Return the actual size of the image to the app */ + if (f->fmt.pix.sizeimage < size) { + f->fmt.pix.sizeimage = size; + } else { + size = f->fmt.pix.sizeimage; + } + + vout->v2f.fmt.pix = f->fmt.pix; + if (vout->v2f.fmt.pix.priv != 0) { + if (copy_from_user(&vout->offset, + (void *)vout->v2f.fmt.pix.priv, + sizeof(vout->offset))) { + retval = -EFAULT; + goto err0; + } + } else { + vout->offset.u_offset = 0; + vout->offset.v_offset = 0; + } + + retval = 0; + err0: + return retval; +} + +/* + * V4L2 - Handles VIDIOC_G_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_get_v42lout_control(vout_data * vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + return (vout->rotate & IPU_ROTATE_HORIZ_FLIP) ? 1 : 0; + case V4L2_CID_VFLIP: + return (vout->rotate & IPU_ROTATE_VERT_FLIP) ? 1 : 0; + case (V4L2_CID_PRIVATE_BASE + 1): + return vout->rotate; + default: + return -EINVAL; + } +} + +/* + * V4L2 - Handles VIDIOC_S_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_set_v42lout_control(vout_data * vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + vout->rotate |= c->value ? IPU_ROTATE_HORIZ_FLIP : + IPU_ROTATE_NONE; + break; + case V4L2_CID_VFLIP: + vout->rotate |= c->value ? IPU_ROTATE_VERT_FLIP : + IPU_ROTATE_NONE; + break; + case V4L2_CID_MXC_ROT: + vout->rotate = c->value; + break; + case V4L2_CID_MXC_MOTION: + vout->motion_sel = c->value; + break; + default: + return -EINVAL; + } + return 0; +} + +/*! + * V4L2 interface - open function + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l2out_open(struct file *file) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + int err; + + if (!vout) { + return -ENODEV; + } + + down(&vout->busy_lock); + + err = -EINTR; + if (signal_pending(current)) + goto oops; + + + if (vout->open_count++ == 0) { + init_waitqueue_head(&vout->v4l_bufq); + + init_timer(&vout->output_timer); + vout->output_timer.function = mxc_v4l2out_timer_handler; + vout->output_timer.data = (unsigned long)vout; + + vout->state = STATE_STREAM_OFF; + vout->rotate = IPU_ROTATE_NONE; + + INIT_WORK(&vout->timer_work, timer_work_func); + } + + file->private_data = dev; + + up(&vout->busy_lock); + + return 0; + + oops: + up(&vout->busy_lock); + return err; +} + +/*! + * V4L2 interface - close function + * + * @param file struct file * + * + * @return 0 success + */ +static int mxc_v4l2out_close(struct file *file) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + + if (--vout->open_count == 0) { + if (vout->state != STATE_STREAM_OFF) + mxc_v4l2out_streamoff(vout); + + file->private_data = NULL; + + mxc_free_buffers(vout->queue_buf_paddr, vout->queue_buf_vaddr, + vout->buffer_cnt, vout->queue_buf_size); + vout->buffer_cnt = 0; + mxc_free_buffers(vout->rot_pp_bufs, vout->rot_pp_bufs_vaddr, 2, + vout->display_buf_size); + + /* capture off */ + wake_up_interruptible(&vout->v4l_bufq); + } + + return 0; +} + +/*! + * V4L2 interface - ioctl function + * + * @param file struct file * + * + * @param ioctlnr unsigned int + * + * @param arg void * + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static long +mxc_v4l2out_do_ioctl(struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *vdev = file->private_data; + vout_data *vout = video_get_drvdata(vdev); + int retval = 0; + int i = 0; + + if (!vout) + return -EBADF; + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + case VIDIOC_QUERYCAP: + { + struct v4l2_capability *cap = arg; + strcpy(cap->driver, "mxc_v4l2_output"); + cap->version = 0; + cap->capabilities = + V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + retval = 0; + break; + } + case VIDIOC_G_FMT: + { + struct v4l2_format *gf = arg; + retval = mxc_v4l2out_g_fmt(vout, gf); + break; + } + case VIDIOC_S_FMT: + { + struct v4l2_format *sf = arg; + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + retval = mxc_v4l2out_s_fmt(vout, sf); + break; + } + case VIDIOC_REQBUFS: + { + struct v4l2_requestbuffers *req = arg; + if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (req->memory != V4L2_MEMORY_MMAP)) { + dev_dbg(&vdev->dev, + "VIDIOC_REQBUFS: incorrect buffer type\n"); + retval = -EINVAL; + break; + } + + if (req->count == 0) + mxc_v4l2out_streamoff(vout); + + if (vout->state == STATE_STREAM_OFF) { + if (vout->queue_buf_paddr[0] != 0) { + mxc_free_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + dev_dbg(&vdev->dev, + "VIDIOC_REQBUFS: freed buffers\n"); + } + vout->buffer_cnt = 0; + } else { + dev_dbg(&vdev->dev, + "VIDIOC_REQBUFS: Buffer is in use\n"); + retval = -EBUSY; + break; + } + + if (req->count == 0) + break; + + if (req->count < MIN_FRAME_NUM) { + req->count = MIN_FRAME_NUM; + } else if (req->count > MAX_FRAME_NUM) { + req->count = MAX_FRAME_NUM; + } + vout->buffer_cnt = req->count; + vout->queue_buf_size = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + + retval = mxc_allocate_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + if (retval < 0) + break; + + /* Init buffer queues */ + vout->done_q.head = 0; + vout->done_q.tail = 0; + vout->ready_q.head = 0; + vout->ready_q.tail = 0; + + for (i = 0; i < vout->buffer_cnt; i++) { + memset(&(vout->v4l2_bufs[i]), 0, + sizeof(vout->v4l2_bufs[i])); + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].memory = V4L2_MEMORY_MMAP; + vout->v4l2_bufs[i].index = i; + vout->v4l2_bufs[i].type = + V4L2_BUF_TYPE_VIDEO_OUTPUT; + vout->v4l2_bufs[i].length = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + vout->v4l2_bufs[i].m.offset = + (unsigned long)vout->queue_buf_paddr[i]; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + break; + } + case VIDIOC_QUERYBUF: + { + struct v4l2_buffer *buf = arg; + u32 type = buf->type; + int index = buf->index; + + if ((type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt)) { + dev_dbg(&vdev->dev, + "VIDIOC_QUERYBUFS: incorrect buffer type\n"); + retval = -EINVAL; + break; + } + down(&vout->param_lock); + memcpy(buf, &(vout->v4l2_bufs[index]), sizeof(*buf)); + up(&vout->param_lock); + break; + } + case VIDIOC_QBUF: + { + struct v4l2_buffer *buf = arg; + int index = buf->index; + unsigned long lock_flags; + int param[5][3]; + + if ((buf->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt)) { + retval = -EINVAL; + break; + } + + dev_dbg(&vdev->dev, "VIDIOC_QBUF: %d field = %d\n", buf->index, buf->field); + + /* mmapped buffers are L1 WB cached, + * so we need to clean them */ + if (buf->memory & V4L2_MEMORY_MMAP) { + flush_cache_all(); + } + + spin_lock_irqsave(&g_lock, lock_flags); + + memcpy(&(vout->v4l2_bufs[index]), buf, sizeof(*buf)); + vout->v4l2_bufs[index].flags |= V4L2_BUF_FLAG_QUEUED; + + g_buf_q_cnt++; + if (vout->v4l2_bufs[index].reserved) + if (!copy_from_user(¶m[0][0], + (void *)vout-> + v4l2_bufs[index] + .reserved, sizeof(param))) + ipu_set_csc_coefficients(vout-> + display_ch, + param); + queue_buf(&vout->ready_q, index); + if (vout->state == STATE_STREAM_PAUSED) { + index = peek_next_buf(&vout->ready_q); + setup_next_buf_timer(vout, index); + vout->state = STATE_STREAM_ON; + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + break; + } + case VIDIOC_DQBUF: + { + struct v4l2_buffer *buf = arg; + int idx; + + if ((queue_size(&vout->done_q) == 0) && + (file->f_flags & O_NONBLOCK)) { + retval = -EAGAIN; + break; + } + + if (!wait_event_interruptible_timeout(vout->v4l_bufq, + queue_size(&vout-> + done_q) + != 0, 10 * HZ)) { + dev_dbg(&vdev->dev, "VIDIOC_DQBUF: timeout\n"); + retval = -ETIME; + break; + } else if (signal_pending(current)) { + dev_dbg(&vdev->dev, + "VIDIOC_DQBUF: interrupt received\n"); + retval = -ERESTARTSYS; + break; + } + idx = dequeue_buf(&vout->done_q); + if (idx == -1) { /* No frame free */ + dev_dbg(&vdev->dev, + "VIDIOC_DQBUF: no free buffers, returning\n"); + retval = -EAGAIN; + break; + } + if ((vout->v4l2_bufs[idx].flags & V4L2_BUF_FLAG_DONE) == + 0) + dev_dbg(&vdev->dev, + "VIDIOC_DQBUF: buffer in done q, but not " + "flagged as done\n"); + + vout->v4l2_bufs[idx].flags = 0; + memcpy(buf, &(vout->v4l2_bufs[idx]), sizeof(*buf)); + dev_dbg(&vdev->dev, "VIDIOC_DQBUF: %d\n", buf->index); + break; + } + case VIDIOC_STREAMON: + { + retval = mxc_v4l2out_streamon(vout); + break; + } + case VIDIOC_STREAMOFF: + { + retval = mxc_v4l2out_streamoff(vout); + break; + } + case VIDIOC_G_CTRL: + { + retval = mxc_get_v42lout_control(vout, arg); + break; + } + case VIDIOC_S_CTRL: + { + retval = mxc_set_v42lout_control(vout, arg); + break; + } + case VIDIOC_CROPCAP: + { + struct v4l2_cropcap *cap = arg; + + if (cap->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + + cap->bounds = vout->crop_bounds[vout->cur_disp_output]; + cap->defrect = vout->crop_bounds[vout->cur_disp_output]; + retval = 0; + break; + } + case VIDIOC_G_CROP: + { + struct v4l2_crop *crop = arg; + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + crop->c = vout->crop_current; + break; + } + case VIDIOC_S_CROP: + { + struct v4l2_crop *crop = arg; + struct v4l2_rect *b = + &(vout->crop_bounds[vout->cur_disp_output]); + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + if (crop->c.height < 0) { + retval = -EINVAL; + break; + } + if (crop->c.width < 0) { + retval = -EINVAL; + break; + } + + /* only full screen supported for SDC BG and SDC DC */ + if (vout->cur_disp_output == 4) { + crop->c = vout->crop_current; + break; + } + + if (crop->c.top < b->top) + crop->c.top = b->top; + if (crop->c.top >= b->top + b->height) + crop->c.top = b->top + b->height - 1; + if (crop->c.height > b->top - crop->c.top + b->height) + crop->c.height = + b->top - crop->c.top + b->height; + + if (crop->c.left < b->left) + crop->c.left = b->left; + if (crop->c.left >= b->left + b->width) + crop->c.left = b->left + b->width - 1; + if (crop->c.width > b->left - crop->c.left + b->width) + crop->c.width = + b->left - crop->c.left + b->width; + + /* stride line limitation */ + crop->c.height -= crop->c.height % 8; + crop->c.width -= crop->c.width % 8; + + vout->crop_current = crop->c; + break; + } + case VIDIOC_ENUMOUTPUT: + { + struct v4l2_output *output = arg; + + if ((output->index >= 5) || + (vout->output_enabled[output->index] == false)) { + retval = -EINVAL; + break; + } + + if (output->index < 3) { + *output = mxc_outputs[MXC_V4L2_OUT_2_ADC]; + output->name[4] = '0' + output->index; + } else { + *output = mxc_outputs[MXC_V4L2_OUT_2_SDC]; + } + break; + } + case VIDIOC_G_OUTPUT: + { + int *p_output_num = arg; + + *p_output_num = vout->cur_disp_output; + break; + } + case VIDIOC_S_OUTPUT: + { + int *p_output_num = arg; + int fbnum; + struct v4l2_rect *b; + + if ((*p_output_num >= MXC_V4L2_OUT_NUM_OUTPUTS) || + (vout->output_enabled[*p_output_num] == false)) { + retval = -EINVAL; + break; + } + + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + + vout->cur_disp_output = *p_output_num; + + /* Update bounds in case they have changed */ + b = &vout->crop_bounds[vout->cur_disp_output]; + + fbnum = vout->output_fb_num[vout->cur_disp_output]; + + /* + * For FG overlay, it uses BG window parameter as + * limitation reference; and BG must be enabled to + * support FG. + */ + if (vout->cur_disp_output == 3) { + unsigned int i, ipu_ch = CHAN_NONE; + struct fb_info *fbi; + mm_segment_t old_fs; + + for (i = 0; i < num_registered_fb; i++) { + fbi = registered_fb[i]; + if (fbi->fbops->fb_ioctl) { + old_fs = get_fs(); + set_fs(KERNEL_DS); + fbi->fbops->fb_ioctl(fbi, + MXCFB_GET_FB_IPU_CHAN, + (unsigned long)&ipu_ch); + set_fs(old_fs); + } + if (ipu_ch == CHAN_NONE) { + dev_err(&vdev->dev, + "Can't get disp ipu channel\n"); + retval = -EINVAL; + break; + } + + if (ipu_ch == MEM_BG_SYNC) { + fbnum = i; + break; + } + } + } + + b->width = registered_fb[fbnum]->var.xres; + b->height = registered_fb[fbnum]->var.yres; + + vout->crop_current = *b; + break; + } + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_G_PARM: + case VIDIOC_ENUMSTD: + case VIDIOC_G_STD: + case VIDIOC_S_STD: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + default: + retval = -EINVAL; + break; + } + + up(&vout->busy_lock); + return retval; +} + +/* + * V4L2 interface - ioctl function + * + * @return None + */ +static long +mxc_v4l2out_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + return video_usercopy(file, cmd, arg, mxc_v4l2out_do_ioctl); +} + +/*! + * V4L2 interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, + * ENOBUFS remap_page error + */ +static int mxc_v4l2out_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *vdev = video_devdata(file); + unsigned long size = vma->vm_end - vma->vm_start; + int res = 0; + int i; + vout_data *vout = video_get_drvdata(vdev); + + dev_dbg(&vdev->dev, "pgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + for (i = 0; i < vout->buffer_cnt; i++) { + if ((vout->v4l2_bufs[i].m.offset == + (vma->vm_pgoff << PAGE_SHIFT)) && + (vout->v4l2_bufs[i].length >= size)) { + vout->v4l2_bufs[i].flags |= V4L2_BUF_FLAG_MAPPED; + break; + } + } + if (i == vout->buffer_cnt) { + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + /* make buffers inner write-back, outer write-thru cacheable */ + /* vma->vm_page_prot = pgprot_outer_wrthru(vma->vm_page_prot);*/ + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + dev_dbg(&vdev->dev, "mmap remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + + mxc_mmap_exit: + up(&vout->busy_lock); + return res; +} + +/*! + * V4L2 interface - poll function + * + * @param file structure file * + * + * @param wait structure poll_table_struct * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_v4l2out_poll(struct file *file, struct poll_table_struct * wait) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + queue = &vout->v4l_bufq; + poll_wait(file, queue, wait); + + up(&vout->busy_lock); + return res; +} + +static struct +v4l2_file_operations mxc_v4l2out_fops = { + .owner = THIS_MODULE, + .open = mxc_v4l2out_open, + .release = mxc_v4l2out_close, + .ioctl = mxc_v4l2out_ioctl, + .mmap = mxc_v4l2out_mmap, + .poll = mxc_v4l2out_poll, +}; + +static struct video_device mxc_v4l2out_template = { + .name = "MXC Video Output", + .vfl_type = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING, + .fops = &mxc_v4l2out_fops, + .release = video_device_release, +}; + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxc_v4l2out_probe(struct platform_device *pdev) +{ + int i; + vout_data *vout; + + /* + * Allocate sufficient memory for the fb structure + */ + g_vout = vout = kmalloc(sizeof(vout_data), GFP_KERNEL); + + if (!vout) + return 0; + + memset(vout, 0, sizeof(vout_data)); + + vout->video_dev = video_device_alloc(); + if (vout->video_dev == NULL) + return -1; + vout->video_dev->minor = -1; + + *(vout->video_dev) = mxc_v4l2out_template; + + /* register v4l device */ + if (video_register_device(vout->video_dev, + VFL_TYPE_GRABBER, video_nr) == -1) { + dev_dbg(&pdev->dev, "video_register_device failed\n"); + return 0; + } + dev_info(&pdev->dev, "Registered device video%d\n", + vout->video_dev->minor & 0x1f); + /*vout->video_dev->dev = &pdev->dev;*/ + + video_set_drvdata(vout->video_dev, vout); + + init_MUTEX(&vout->param_lock); + init_MUTEX(&vout->busy_lock); + + /* setup outputs and cropping */ + vout->cur_disp_output = -1; + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strncmp(idstr, "DISP", 4) == 0) { + int disp_num = idstr[4] - '0'; + if (disp_num == 3) { + if (strcmp(idstr, "DISP3 BG - DI1") == 0) + disp_num = 5; + else if (strncmp(idstr, "DISP3 BG", 8) == 0) + disp_num = 4; + } + vout->crop_bounds[disp_num].left = 0; + vout->crop_bounds[disp_num].top = 0; + vout->crop_bounds[disp_num].width = + registered_fb[i]->var.xres; + vout->crop_bounds[disp_num].height = + registered_fb[i]->var.yres; + vout->output_enabled[disp_num] = true; + vout->output_fb_num[disp_num] = i; + if (vout->cur_disp_output == -1) { + vout->cur_disp_output = disp_num; + } + } + + } + vout->crop_current = vout->crop_bounds[vout->cur_disp_output]; + + platform_set_drvdata(pdev, vout); + + return 0; +} + +static int mxc_v4l2out_remove(struct platform_device *pdev) +{ + vout_data *vout = platform_get_drvdata(pdev); + + if (vout->video_dev) { + if (-1 != vout->video_dev->minor) + video_unregister_device(vout->video_dev); + else + video_device_release(vout->video_dev); + vout->video_dev = NULL; + } + + platform_set_drvdata(pdev, NULL); + + kfree(vout); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_v4l2out_driver = { + .driver = { + .name = "MXC Video Output", + }, + .probe = mxc_v4l2out_probe, + .remove = mxc_v4l2out_remove, +}; + +static struct platform_device mxc_v4l2out_device = { + .name = "MXC Video Output", + .id = 0, +}; + +/*! + * mxc v4l2 init function + * + */ +static int mxc_v4l2out_init(void) +{ + u8 err = 0; + + err = platform_driver_register(&mxc_v4l2out_driver); + if (err == 0) { + platform_device_register(&mxc_v4l2out_device); + } + return err; +} + +/*! + * mxc v4l2 cleanup function + * + */ +static void mxc_v4l2out_clean(void) +{ + video_unregister_device(g_vout->video_dev); + + platform_driver_unregister(&mxc_v4l2out_driver); + platform_device_unregister(&mxc_v4l2out_device); + kfree(g_vout); + g_vout = NULL; +} + +module_init(mxc_v4l2out_init); +module_exit(mxc_v4l2out_clean); + +module_param(video_nr, int, 0444); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2-driver for MXC video output"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/Makefile @@ -0,0 +1,11 @@ +ifeq ($(CONFIG_VIDEO_MXC_EMMA_OUTPUT),y) + mx27_output-objs := mx27_v4l2_output.o mx27_pp.o + obj-$(CONFIG_VIDEO_MXC_OUTPUT) += mx27_output.o +endif + +ifeq ($(CONFIG_VIDEO_MXC_IPU_OUTPUT),y) + obj-$(CONFIG_VIDEO_MXC_OUTPUT) += mxc_v4l2_output.o +endif +ifeq ($(CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT),y) + obj-$(CONFIG_VIDEO_MXC_OUTPUT) += mx31_v4l2_wvga_output.o +endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mx27_pp.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mx27_pp.c @@ -0,0 +1,904 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_pp.c + * + * @brief MX27 V4L2 Video Output Driver + * + * Video4Linux2 Output Device using MX27 eMMA Post-processing functionality. + * + * @ingroup MXC_V4L2_OUTPUT + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mx27_pp.h" +#include "mxc_v4l2_output.h" + +#define SCALE_RETRY 32 /* to be more relax, less precise */ +#define PP_SKIP 1 +#define PP_TBL_MAX 40 + +static unsigned short scale_tbl[PP_TBL_MAX]; +static int g_hlen, g_vlen; + +static emma_pp_cfg g_pp_cfg; +static int g_disp_num = 0; +static char pp_dev[] = "emma_pp"; + +/*! + * @brief PP resizing routines + */ +static int gcd(int x, int y); +static int ratio(int x, int y, int *den); +static int scale_0d(int k, int coeff, int base, int nxt); +static int scale_1d(int inv, int outv, int k); +static int scale_1d_smart(int *inv, int *outv, int index); +static int scale_2d(emma_pp_scale * sz); + +static irqreturn_t pp_isr(int irq, void *dev_id); +static int set_output_addr(emma_pp_cfg * cfg, vout_data * vout); +static int pphw_reset(void); +static int pphw_enable(int flag); +static int pphw_ptr(emma_pp_cfg * cfg); +static int pphw_outptr(emma_pp_cfg * cfg); +static int pphw_cfg(emma_pp_cfg * cfg); +static int pphw_isr(void); +static void pphw_init(void); +static void pphw_exit(void); + +#define PP_DUMP(reg) pr_debug("%s\t = 0x%08X\n", #reg, __raw_readl(reg)) +void pp_dump(void) +{ + PP_DUMP(PP_CNTL); + PP_DUMP(PP_INTRCNTL); + PP_DUMP(PP_INTRSTATUS); + PP_DUMP(PP_SOURCE_Y_PTR); + PP_DUMP(PP_SOURCE_CB_PTR); + PP_DUMP(PP_SOURCE_CR_PTR); + PP_DUMP(PP_DEST_RGB_PTR); + PP_DUMP(PP_QUANTIZER_PTR); + PP_DUMP(PP_PROCESS_FRAME_PARA); + PP_DUMP(PP_SOURCE_FRAME_WIDTH); + PP_DUMP(PP_DEST_DISPLAY_WIDTH); + PP_DUMP(PP_DEST_IMAGE_SIZE); + PP_DUMP(PP_DEST_FRAME_FMT_CNTL); + PP_DUMP(PP_RESIZE_INDEX); + PP_DUMP(PP_CSC_COEF_0123); + PP_DUMP(PP_CSC_COEF_4); +} + +/*! + * @brief Set PP input address. + * @param ptr The pointer to the Y value of input + * @return Zero on success, others on failure + */ +int pp_ptr(unsigned long ptr) +{ + g_pp_cfg.ptr.y = ptr; + g_pp_cfg.ptr.u = g_pp_cfg.ptr.v = g_pp_cfg.ptr.qp = 0; + + return pphw_ptr(&g_pp_cfg); +} + +/*! + * @brief Enable or disable PP. + * @param flag Zero to disable PP, others to enable PP + * @return Zero on success, others on failure + */ +int pp_enable(int flag) +{ + return pphw_enable(flag); +} + +/*! + * @brief Get the display No. of last completed PP frame. + * @return The display No. of last completed PP frame. + */ +int pp_num_last(void) +{ + return (g_disp_num ? 0 : 1); +} + +/*! + * @brief Initialize PP. + * @param vout Pointer to _vout_data structure + * @return Zero on success, others on failure + */ +int pp_init(vout_data * vout) +{ + pphw_init(); + pphw_enable(0); + enable_irq(MXC_INT_EMMAPP); + return request_irq(MXC_INT_EMMAPP, pp_isr, 0, pp_dev, vout); +} + +/*! + * @brief Deinitialize PP. + * @param vout Pointer to _vout_data structure + */ +void pp_exit(vout_data * vout) +{ + disable_irq(MXC_INT_EMMAPP); + free_irq(MXC_INT_EMMAPP, vout); + pphw_enable(0); + pphw_exit(); +} + +/*! + * @brief Configure PP. + * @param vout Pointer to _vout_data structure + * @return Zero on success, others on failure + */ +int pp_cfg(vout_data * vout) +{ + if (!vout) + return -1; + + /* PP accepts YUV420 input only */ + if (vout->v2f.fmt.pix.pixelformat != V4L2_PIX_FMT_YUV420) { + pr_debug("unsupported pixel format.\n"); + return -1; + } + + g_pp_cfg.operation = 0; + + memset(g_pp_cfg.csc_table, 0, sizeof(g_pp_cfg.csc_table)); + + /* Convert output pixel format to PP required format */ + switch (vout->v4l2_fb.fmt.pixelformat) { + case V4L2_PIX_FMT_BGR32: + g_pp_cfg.red_width = 8; + g_pp_cfg.green_width = 8; + g_pp_cfg.blue_width = 8; + g_pp_cfg.red_offset = 8; + g_pp_cfg.green_offset = 16; + g_pp_cfg.blue_offset = 24; + g_pp_cfg.rgb_resolution = 32; + break; + case V4L2_PIX_FMT_RGB32: + g_pp_cfg.red_width = 8; + g_pp_cfg.green_width = 8; + g_pp_cfg.blue_width = 8; + g_pp_cfg.red_offset = 24; + g_pp_cfg.green_offset = 16; + g_pp_cfg.blue_offset = 8; + g_pp_cfg.rgb_resolution = 32; + break; + case V4L2_PIX_FMT_YUYV: + g_pp_cfg.red_width = 0; + g_pp_cfg.green_width = 0; + g_pp_cfg.blue_width = 0; + g_pp_cfg.red_offset = 0; + g_pp_cfg.green_offset = 0; + g_pp_cfg.blue_offset = PP_PIX_YUYV; + g_pp_cfg.rgb_resolution = 16; + break; + case V4L2_PIX_FMT_UYVY: + g_pp_cfg.red_width = 0; + g_pp_cfg.green_width = 0; + g_pp_cfg.blue_width = 0; + g_pp_cfg.red_offset = 0; + g_pp_cfg.green_offset = 0; + g_pp_cfg.blue_offset = PP_PIX_UYVY; + g_pp_cfg.rgb_resolution = 16; + break; + case V4L2_PIX_FMT_RGB565: + default: + g_pp_cfg.red_width = 5; + g_pp_cfg.green_width = 6; + g_pp_cfg.blue_width = 5; + g_pp_cfg.red_offset = 11; + g_pp_cfg.green_offset = 5; + g_pp_cfg.blue_offset = 0; + g_pp_cfg.rgb_resolution = 16; + break; + } + + if (vout->ipu_buf[0] != -1) + g_pp_cfg.ptr.y = + (unsigned int)vout->queue_buf_paddr[vout->ipu_buf[0]]; + else + g_pp_cfg.ptr.y = 0; + + g_pp_cfg.ptr.u = g_pp_cfg.ptr.v = g_pp_cfg.ptr.qp = 0; + + g_pp_cfg.dim.in.width = vout->v2f.fmt.pix.width; + g_pp_cfg.dim.in.height = vout->v2f.fmt.pix.height; + g_pp_cfg.dim.out.width = vout->crop_current.width; + g_pp_cfg.dim.out.height = vout->crop_current.height; + g_pp_cfg.dim.num.width = 0; + g_pp_cfg.dim.num.height = 0; + g_pp_cfg.dim.den.width = 0; + g_pp_cfg.dim.den.height = 0; + + if (scale_2d(&g_pp_cfg.dim)) { + pr_debug("unsupported resize ratio.\n"); + return -1; + } + + g_pp_cfg.dim.out.width = vout->crop_current.width; + g_pp_cfg.dim.out.height = vout->crop_current.height; + + g_pp_cfg.in_y_stride = 0; + if (set_output_addr(&g_pp_cfg, vout)) { + pr_debug("failed to set pp output address.\n"); + return -1; + } + + return pphw_cfg(&g_pp_cfg); +} + +irqreturn_t mxc_v4l2out_pp_in_irq_handler(int irq, void *dev_id); + +/*! + * @brief PP IRQ handler. + */ +static irqreturn_t pp_isr(int irq, void *dev_id) +{ + int status; + vout_data *vout = dev_id; + + status = pphw_isr(); + if ((status & 0x1) == 0) { /* Not frame complete interrupt */ + pr_debug("not pp frame complete interrupt\n"); + return IRQ_HANDLED; + } + + if (vout->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + g_disp_num = g_disp_num ? 0 : 1; + g_pp_cfg.outptr = (unsigned int)vout->display_bufs[g_disp_num]; + pphw_outptr(&g_pp_cfg); + } + + return mxc_v4l2out_pp_in_irq_handler(irq, dev_id); +} + +/*! + * @brief Set PP output address. + * @param cfg Pointer to emma_pp_cfg structure + * @param vout Pointer to _vout_data structure + * @return Zero on success, others on failure + */ +static int set_output_addr(emma_pp_cfg * cfg, vout_data * vout) +{ + if (vout->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + g_disp_num = 0; + cfg->outptr = (unsigned int)vout->display_bufs[g_disp_num]; + cfg->out_stride = vout->crop_current.width; + return 0; + } else { + struct fb_info *fb; + + fb = registered_fb[vout->output_fb_num[vout->cur_disp_output]]; + if (!fb) + return -1; + + cfg->outptr = fb->fix.smem_start; + cfg->outptr += vout->crop_current.top * fb->var.xres_virtual + * (fb->var.bits_per_pixel >> 3) + + vout->crop_current.left * (fb->var.bits_per_pixel >> 3); + cfg->out_stride = fb->var.xres_virtual; + + return 0; + } +} + +/*! + * @brief Get maximum common divisor. + * @param x First input value + * @param y Second input value + * @return Maximum common divisor of x and y + */ +static int gcd(int x, int y) +{ + int k; + + if (x < y) { + k = x; + x = y; + y = k; + } + + while ((k = x % y)) { + x = y; + y = k; + } + + return y; +} + +/*! + * @brief Get ratio. + * @param x First input value + * @param y Second input value + * @param den Denominator of the ratio (corresponding to y) + * @return Numerator of the ratio (corresponding to x) + */ +static int ratio(int x, int y, int *den) +{ + int g; + + if (!x || !y) + return 0; + + g = gcd(x, y); + *den = y / g; + + return x / g; +} + +/*! + * @brief Build PP coefficient entry + * Build one or more coefficient entries for PP coefficient table based + * on given coefficient. + * + * @param k The index of the coefficient in coefficient table + * @param coeff The weighting coefficient + * @param base The base of the coefficient + * @param nxt Number of pixels to be read + * + * @return The index of the next coefficient entry on success + * -1 on failure + */ +static int scale_0d(int k, int coeff, int base, int nxt) +{ + if (k >= PP_TBL_MAX) { + /* no more space in table */ + pr_debug("no space in scale table, k = %d\n", k); + return -1; + } + + coeff = ((coeff << BC_COEF) + (base >> 1)) / base; + + /* + * Valid values for weighting coefficient are 0, 2 to 30, and 31. + * A value of 31 is treated as 32 and therefore 31 is an + * invalid co-efficient. + */ + if (coeff >= SZ_COEF - 1) + coeff--; + else if (coeff == 1) + coeff++; + coeff = coeff << BC_NXT; + + if (nxt < SZ_NXT) { + coeff |= nxt; + coeff <<= 1; + coeff |= 1; + } else { + /* + * src inc field is 2 bit wide, for 4+, use special + * code 0:0:1 to prevent dest inc + */ + coeff |= PP_SKIP; + coeff <<= 1; + coeff |= 1; + nxt -= PP_SKIP; + do { + pr_debug("tbl = %03X\n", coeff); + scale_tbl[k++] = coeff; + coeff = (nxt > PP_SKIP) ? PP_SKIP : nxt; + coeff <<= 1; + } while ((nxt -= PP_SKIP) > 0); + } + pr_debug("tbl = %03X\n", coeff); + scale_tbl[k++] = coeff; + + return k; +} + +/* + * @brief Build PP coefficient table + * Build PP coefficient table for one dimension (width or height) + * based on given input and output resolution + * + * @param inv input resolution + * @param outv output resolution + * @param k index of free table entry + * + * @return The index of the next free coefficient entry on success + * -1 on failure + */ +static int scale_1d(int inv, int outv, int k) +{ + int v; /* overflow counter */ + int coeff, nxt; /* table output */ + + if (inv == outv) + return scale_0d(k, 1, 1, 1); /* force scaling */ + + if (inv * 4 < outv) { + pr_debug("upscale err: ratio should be in range 1:1 to 1:4\n"); + return -1; + } + + v = 0; + if (inv < outv) { + /* upscale: mix <= 2 input pixels per output pixel */ + do { + coeff = outv - v; + v += inv; + if (v >= outv) { + v -= outv; + nxt = 1; + } else + nxt = 0; + pr_debug("upscale: coeff = %d/%d nxt = %d\n", coeff, + outv, nxt); + k = scale_0d(k, coeff, outv, nxt); + if (k < 0) + return -1; + } while (v); + } else if (inv >= 2 * outv) { + /* PP doesn't support resize ratio > 2:1 except 4:1. */ + if ((inv != 2 * outv) && (inv != 4 * outv)) + return -1; + /* downscale: >=2:1 bilinear approximation */ + coeff = inv - 2 * outv; + v = 0; + nxt = 0; + do { + v += coeff; + nxt = 2; + while (v >= outv) { + v -= outv; + nxt++; + } + pr_debug("downscale: coeff = 1/2 nxt = %d\n", nxt); + k = scale_0d(k, 1, 2, nxt); + if (k < 0) + return -1; + } while (v); + } else { + /* downscale: bilinear */ + int in_pos_inc = 2 * outv; + int out_pos = inv; + int out_pos_inc = 2 * inv; + int init_carry = inv - outv; + int carry = init_carry; + + v = outv + in_pos_inc; + do { + coeff = v - out_pos; + out_pos += out_pos_inc; + carry += out_pos_inc; + for (nxt = 0; v < out_pos; nxt++) { + v += in_pos_inc; + carry -= in_pos_inc; + } + pr_debug("downscale: coeff = %d/%d nxt = %d\n", coeff, + in_pos_inc, nxt); + k = scale_0d(k, coeff, in_pos_inc, nxt); + if (k < 0) + return -1; + } while (carry != init_carry); + } + return k; +} + +/* + * @brief Build PP coefficient table + * Build PP coefficient table for one dimension (width or height) + * based on given input and output resolution. The given input + * and output resolution might be not supported due to hardware + * limits. In this case this functin rounds the input and output + * to closest possible values and return them to caller. + * + * @param inv input resolution, might be modified after the call + * @param outv output resolution, might be modified after the call + * @param k index of free table entry + * + * @return The index of the next free coefficient entry on success + * -1 on failure + */ +static int scale_1d_smart(int *inv, int *outv, int index) +{ + int len, num, den, retry; + static int num1, den1; + + if (!inv || !outv) + return -1; + + /* Both should be non-zero */ + if (!(*inv) || !(*outv)) + return -1; + + retry = SCALE_RETRY; + + do { + num = ratio(*inv, *outv, &den); + pr_debug("num = %d, den = %d\n", num, den); + if (!num) + continue; + + if (index != 0) { + /* + * We are now resizing height. Check to see if the + * resize ratio for width can be reused by height + */ + if ((num == num1) && (den == den1)) + return index; + } + + if ((len = scale_1d(num, den, index)) < 0) + /* increase output dimension to try another ratio */ + (*outv)++; + else { + if (index == 0) { + /* + * We are now resizing width. The same resize + * ratio may be reused by height, so save the + * ratio. + */ + num1 = num; + den1 = den; + } + return len; + } + } while (retry--); + + pr_debug("pp scale err\n"); + return -1; +} + +/* + * @brief Build PP coefficient table for both width and height + * Build PP coefficient table for both width and height based on + * given resizing ratios. + * + * @param sz Structure contains resizing ratio informations + * + * @return 0 on success, others on failure + */ +static int scale_2d(emma_pp_scale * sz) +{ + int inv, outv; + + /* horizontal resizing. parameter check - must provide in size */ + if (!sz->in.width) + return -1; + + /* Resizing based on num:den */ + inv = sz->num.width; + outv = sz->den.width; + + if ((g_hlen = scale_1d_smart(&inv, &outv, 0)) > 0) { + /* Resizing succeeded */ + sz->den.width = outv; + sz->out.width = (sz->in.width * outv) / inv; + } else { + /* Resizing based on in:out */ + inv = sz->in.width; + outv = sz->out.width; + + if ((g_hlen = scale_1d_smart(&inv, &outv, 0)) > 0) { + /* Resizing succeeded */ + sz->out.width = outv; + sz->num.width = ratio(sz->in.width, sz->out.width, + &sz->den.width); + } else + return -1; + } + + sz->out.width &= ~1; + + /* vertical resizing. parameter check - must provide in size */ + if (!sz->in.height) + return -1; + + /* Resizing based on num:den */ + inv = sz->num.height; + outv = sz->den.height; + + if ((g_vlen = scale_1d_smart(&inv, &outv, g_hlen)) > 0) { + /* Resizing succeeded */ + sz->den.height = outv; + sz->out.height = (sz->in.height * outv) / inv; + } else { + /* Resizing based on in:out */ + inv = sz->in.height; + outv = sz->out.height; + + if ((g_vlen = scale_1d_smart(&inv, &outv, g_hlen)) > 0) { + /* Resizing succeeded */ + sz->out.height = outv; + sz->num.height = ratio(sz->in.height, sz->out.height, + &sz->den.height); + } else + return -1; + } + + return 0; +} + +/*! + * @brief Set PP resizing registers. + * @param sz Pointer to pp scaling structure + * @return Zero on success, others on failure + */ +static int pphw_scale(emma_pp_scale * sz) +{ + __raw_writel((sz->out.width << 16) | sz->out.height, + PP_DEST_IMAGE_SIZE); + __raw_writel(((g_hlen - 1) << 16) | (g_vlen == + g_hlen ? 0 : (g_hlen << 8)) | + (g_vlen - 1), PP_RESIZE_INDEX); + for (g_hlen = 0; g_hlen < g_vlen; g_hlen++) + __raw_writel(scale_tbl[g_hlen], + PP_RESIZE_COEF_TBL + g_hlen * 4); + + return 0; +} + +/*! + * @brief Reset PP. + * @return Zero on success, others on failure + */ +static int pphw_reset(void) +{ + int i; + + __raw_writel(0x100, PP_CNTL); + + /* timeout */ + for (i = 0; i < 1000; i++) { + if (!(__raw_readl(PP_CNTL) & 0x100)) { + pr_debug("pp reset over\n"); + break; + } + } + + /* check reset value */ + if (__raw_readl(PP_CNTL) != 0x876) { + pr_debug("pp reset value err = 0x%08X\n", __raw_readl(PP_CNTL)); + return -1; + } + + return 0; +} + +/*! + * @brief Enable or disable PP. + * @param flag Zero to disable PP, others to enable PP + * @return Zero on success, others on failure + */ +static int pphw_enable(int flag) +{ + int ret = 0; + + if (flag) + __raw_writel(__raw_readl(PP_CNTL) | 1, PP_CNTL); + else + ret = pphw_reset(); + + return ret; +} + +/*! + * @brief Set PP input address. + * @param cfg The pointer to PP configuration parameter + * @return Zero on success, others on failure + */ +static int pphw_ptr(emma_pp_cfg * cfg) +{ + if (!cfg->ptr.u) { + int size; + + /* yuv - packed */ + size = PP_CALC_Y_SIZE(cfg); + cfg->ptr.u = cfg->ptr.y + size; + cfg->ptr.v = cfg->ptr.u + (size >> 2); + + /* yuv packed with qp appended */ + if (!cfg->ptr.qp) + cfg->ptr.qp = cfg->ptr.v + (size >> 2); + } + __raw_writel(cfg->ptr.y, PP_SOURCE_Y_PTR); + __raw_writel(cfg->ptr.u, PP_SOURCE_CB_PTR); + __raw_writel(cfg->ptr.v, PP_SOURCE_CR_PTR); + __raw_writel(cfg->ptr.qp, PP_QUANTIZER_PTR); + + return 0; +} + +/*! + * @brief Set PP output address. + * @param cfg The pointer to PP configuration parameter + * @return Zero on success, others on failure + */ +static int pphw_outptr(emma_pp_cfg * cfg) +{ + __raw_writel(cfg->outptr, PP_DEST_RGB_PTR); + return 0; +} + +/*! + * @brief Configuration PP. + * @param cfg The pointer to PP configuration parameter + * @return Zero on success, others on failure + */ +static int pphw_cfg(emma_pp_cfg * cfg) +{ + int rt; + register int r; + + pphw_scale(&cfg->dim); + + if (!cfg->in_y_stride) + cfg->in_y_stride = cfg->dim.in.width; + + if (!cfg->out_stride) + cfg->out_stride = cfg->dim.out.width; + + r = __raw_readl(PP_CNTL) & ~EN_MASK; + + /* config parms */ + r |= cfg->operation & EN_MASK; + if (cfg->operation & EN_MACROBLOCK) { + /* Macroblock Mode */ + r |= 0x0200; + __raw_writel(0x06, PP_INTRCNTL); + } else { + /* Frame mode */ + __raw_writel(0x05, PP_INTRCNTL); + } + + if (cfg->red_width | cfg->green_width | cfg->blue_width) { + /* color conversion to be performed */ + r |= EN_CSC; + if (!(cfg->red_offset | cfg->green_offset)) { + /* auto offset B:G:R LSb to Msb */ + cfg->green_offset = cfg->blue_offset + cfg->blue_width; + cfg->red_offset = cfg->green_offset + cfg->green_width; + } + if (!cfg->rgb_resolution) { + /* derive minimum resolution required */ + int w, w2; + + w = cfg->red_offset + cfg->red_width; + w2 = cfg->blue_offset + cfg->blue_width; + if (w < w2) + w = w2; + w2 = cfg->green_offset + cfg->green_width; + if (w < w2) + w = w2; + if (w > 16) + w = 24; + else if (w > 8) + w = 16; + else + w = 8; + cfg->rgb_resolution = w; + } + /* 00,11 - 32 bpp, 10 - 16 bpp, 01 - 8 bpp */ + r &= ~0xC00; + if (cfg->rgb_resolution < 32) + r |= (cfg->rgb_resolution << 7); + __raw_writel((cfg->red_offset << 26) | + (cfg->green_offset << 21) | + (cfg->blue_offset << 16) | + (cfg->red_width << 8) | + (cfg->green_width << 4) | + cfg->blue_width, PP_DEST_FRAME_FMT_CNTL); + } else { + /* add YUV422 formatting */ + static const unsigned int _422[] = { + 0x62000888, + 0x60100888, + 0x43080888, + 0x41180888 + }; + + __raw_writel(_422[(cfg->blue_offset >> 3) & 3], + PP_DEST_FRAME_FMT_CNTL); + cfg->rgb_resolution = 16; + r &= ~0xC00; + r |= (cfg->rgb_resolution << 7); + } + + /* add csc formatting */ + if (!cfg->csc_table[1]) { + static const unsigned short _csc[][6] = { + {0x80, 0xb4, 0x2c, 0x5b, 0x0e4, 0}, + {0x95, 0xcc, 0x32, 0x68, 0x104, 1}, + {0x80, 0xca, 0x18, 0x3c, 0x0ec, 0}, + {0x95, 0xe5, 0x1b, 0x44, 0x10e, 1}, + }; + memcpy(cfg->csc_table, _csc[cfg->csc_table[0]], + sizeof(_csc[0])); + } + __raw_writel((cfg->csc_table[0] << 24) | + (cfg->csc_table[1] << 16) | + (cfg->csc_table[2] << 8) | + cfg->csc_table[3], PP_CSC_COEF_0123); + __raw_writel((cfg->csc_table[5] ? (1 << 9) : 0) | cfg->csc_table[4], + PP_CSC_COEF_4); + + __raw_writel(r, PP_CNTL); + + pphw_ptr(cfg); + pphw_outptr(cfg); + + /* + * #MB in a row = input_width / 16pix + * 1 byte per QP per MB + * QP must be formatted to be 4-byte aligned + * YUV lines are to be 4-byte aligned as well + * So Y is 8 byte aligned, as U = V = Y/2 for 420 + * MPEG MBs are 16x16 anyway + */ + __raw_writel((cfg->dim.in.width << 16) | cfg->dim.in.height, + PP_PROCESS_FRAME_PARA); + __raw_writel(cfg->in_y_stride | (PP_CALC_QP_WIDTH(cfg) << 16), + PP_SOURCE_FRAME_WIDTH); + + /* in bytes */ + rt = cfg->rgb_resolution >> 3; + if (rt == 3) + rt = 4; + __raw_writel(cfg->out_stride * rt, PP_DEST_DISPLAY_WIDTH); + + pp_dump(); + return 0; +} + +/*! + * @brief Check PP interrupt status. + * @return PP interrupt status + */ +static int pphw_isr(void) +{ + unsigned long status; + + pr_debug("pp: in isr.\n"); + status = __raw_readl(PP_INTRSTATUS) & 7; + if (!status) { + pr_debug("pp: not my isr err.\n"); + return status; + } + + if (status & 4) + pr_debug("pp: isr state error.\n"); + + /* clear interrupt status */ + __raw_writel(status, PP_INTRSTATUS); + + return status; +} + +static struct clk *emma_clk; + +/*! + * @brief PP module clock enable + */ +static void pphw_init(void) +{ + emma_clk = clk_get(NULL, "emma_clk"); + clk_enable(emma_clk); +} + +/*! + * @brief PP module clock disable + */ +static void pphw_exit(void) +{ + clk_disable(emma_clk); + clk_put(emma_clk); +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mx27_v4l2_output.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mx27_v4l2_output.c @@ -0,0 +1,1442 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_v4l2_output.c + * + * @brief MX27 V4L2 Video Output Driver + * + * Video4Linux2 Output Device using MX27 eMMA Post-processing functionality. + * + * @ingroup MXC_V4L2_OUTPUT + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_output.h" +#include "mx27_pp.h" +#include "../drivers/video/mxc/mx2fb.h" + +#define SDC_FG_FB_FORMAT V4L2_PIX_FMT_RGB565 + +struct v4l2_output mxc_outputs[1] = { + { + .index = 0, + .name = "DISP0 Video Out", + .type = V4L2_OUTPUT_TYPE_ANALOG, /* not really correct, + but no other choice */ + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN}, +}; + +static int video_nr = 16; +static spinlock_t g_lock = SPIN_LOCK_UNLOCKED; +vout_data *g_vout; + +/* debug counters */ +uint32_t g_irq_cnt; +uint32_t g_buf_output_cnt; +uint32_t g_buf_q_cnt; +uint32_t g_buf_dq_cnt; + +#ifdef CONFIG_VIDEO_MXC_OUTPUT_FBSYNC +static uint32_t g_output_fb = -1; +static uint32_t g_fb_enabled = 0; +static uint32_t g_pp_ready = 0; + +static int fb_event_notify(struct notifier_block *self, + unsigned long action, void *data) +{ + struct fb_event *event = data; + struct fb_info *info = event->info; + unsigned long lock_flags; + int blank, i; + + for (i = 0; i < num_registered_fb; i++) + if (registered_fb[i] == info) + break; + + /* + * Check if the event is sent by the framebuffer in which + * the video is displayed. + */ + if (i != g_output_fb) + return 0; + + switch (action) { + case FB_EVENT_BLANK: + blank = *(int *)event->data; + spin_lock_irqsave(&g_lock, lock_flags); + g_fb_enabled = !blank; + if (blank && g_pp_ready) { + if (pp_enable(1)) + pr_debug("unable to enable PP\n"); + g_pp_ready = 0; + } + spin_unlock_irqrestore(&g_lock, lock_flags); + break; + case FB_EVENT_MXC_EOF: + spin_lock_irqsave(&g_lock, lock_flags); + g_fb_enabled = 1; + if (g_pp_ready) { + if (pp_enable(1)) + pr_debug("unable to enable PP\n"); + g_pp_ready = 0; + } + spin_unlock_irqrestore(&g_lock, lock_flags); + break; + } + + return 0; +} + +static struct notifier_block fb_event_notifier = { + .notifier_call = fb_event_notify, +}; + +static struct notifier_block mx2fb_event_notifier = { + .notifier_call = fb_event_notify, +}; +#endif + +#define QUEUE_SIZE (MAX_FRAME_NUM + 1) +static __inline int queue_size(v4l_queue * q) +{ + if (q->tail >= q->head) + return (q->tail - q->head); + else + return ((q->tail + QUEUE_SIZE) - q->head); +} + +static __inline int queue_buf(v4l_queue * q, int idx) +{ + if (((q->tail + 1) % QUEUE_SIZE) == q->head) + return -1; /* queue full */ + q->list[q->tail] = idx; + q->tail = (q->tail + 1) % QUEUE_SIZE; + return 0; +} + +static __inline int dequeue_buf(v4l_queue * q) +{ + int ret; + if (q->tail == q->head) + return -1; /* queue empty */ + ret = q->list[q->head]; + q->head = (q->head + 1) % QUEUE_SIZE; + return ret; +} + +static __inline int peek_next_buf(v4l_queue * q) +{ + if (q->tail == q->head) + return -1; /* queue empty */ + return q->list[q->head]; +} + +static __inline unsigned long get_jiffies(struct timeval *t) +{ + struct timeval cur; + + if (t->tv_usec >= 1000000) { + t->tv_sec += t->tv_usec / 1000000; + t->tv_usec = t->tv_usec % 1000000; + } + + do_gettimeofday(&cur); + if ((t->tv_sec < cur.tv_sec) + || ((t->tv_sec == cur.tv_sec) && (t->tv_usec < cur.tv_usec))) + return jiffies; + + if (t->tv_usec < cur.tv_usec) { + cur.tv_sec = t->tv_sec - cur.tv_sec - 1; + cur.tv_usec = t->tv_usec + 1000000 - cur.tv_usec; + } else { + cur.tv_sec = t->tv_sec - cur.tv_sec; + cur.tv_usec = t->tv_usec - cur.tv_usec; + } + + return jiffies + timeval_to_jiffies(&cur); +} + +/*! + * Private function to free buffers + * + * @param bufs_paddr Array of physical address of buffers to be freed + * + * @param bufs_vaddr Array of virtual address of buffers to be freed + * + * @param num_buf Number of buffers to be freed + * + * @param size Size for each buffer to be free + * + * @return status 0 success. + */ +static int mxc_free_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + if (bufs_vaddr[i] != 0) { + dma_free_coherent(0, size, bufs_vaddr[i], + bufs_paddr[i]); + pr_debug("freed @ paddr=0x%08X\n", (u32) bufs_paddr[i]); + bufs_paddr[i] = 0; + bufs_vaddr[i] = NULL; + } + } + return 0; +} + +/*! + * Private function to allocate buffers + * + * @param bufs_paddr Output array of physical address of buffers allocated + * + * @param bufs_vaddr Output array of virtual address of buffers allocated + * + * @param num_buf Input number of buffers to allocate + * + * @param size Input size for each buffer to allocate + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int mxc_allocate_buffers(dma_addr_t bufs_paddr[], void *bufs_vaddr[], + int num_buf, int size) +{ + int i; + + for (i = 0; i < num_buf; i++) { + bufs_vaddr[i] = dma_alloc_coherent(0, size, + &bufs_paddr[i], + GFP_DMA | GFP_KERNEL); + + if (bufs_vaddr[i] == 0) { + mxc_free_buffers(bufs_paddr, bufs_vaddr, i, size); + pr_debug("dma_alloc_coherent failed.\n"); + return -ENOBUFS; + } + pr_debug("allocated @ paddr=0x%08X, size=%d.\n", + (u32) bufs_paddr[i], size); + } + + return 0; +} + +static void mxc_v4l2out_timer_handler(unsigned long arg) +{ + int index; + unsigned long timeout; + unsigned long lock_flags; + vout_data *vout = (vout_data *) arg; + + pr_debug("timer handler: %lu\n", jiffies); + + spin_lock_irqsave(&g_lock, lock_flags); + + if ((vout->state == STATE_STREAM_OFF) + || (vout->state == STATE_STREAM_STOPPING)) { + pr_debug("stream has stopped\n"); + goto exit0; + } + + /* + * If timer occurs before PP h/w is ready, then set the state to + * paused and the timer will be set again when next buffer is queued + * or PP completes. + */ + if (vout->ipu_buf[0] != -1) { + pr_debug("buffer is busy\n"); + vout->state = STATE_STREAM_PAUSED; + goto exit0; + } + + /* Dequeue buffer and pass to PP */ + index = dequeue_buf(&vout->ready_q); + if (index == -1) { /* no buffers ready, should never occur */ + pr_debug("mxc_v4l2out: timer - no queued buffers ready\n"); + goto exit0; + } + + g_buf_dq_cnt++; + vout->frame_count++; + vout->ipu_buf[0] = index; + + if (pp_ptr((unsigned int)vout->queue_buf_paddr[index])) { + pr_debug("unable to update buffer\n"); + goto exit0; + } +#ifdef CONFIG_VIDEO_MXC_OUTPUT_FBSYNC + if (g_fb_enabled && (vout->v4l2_fb.flags != V4L2_FBUF_FLAG_OVERLAY)) + g_pp_ready = 1; + else if (pp_enable(1)) { + pr_debug("unable to enable PP\n"); + goto exit0; + } +#else + if (pp_enable(1)) { + pr_debug("unable to enable PP\n"); + goto exit0; + } +#endif + pr_debug("enabled index %d\n", index); + + /* Setup timer for next buffer */ + index = peek_next_buf(&vout->ready_q); + pr_debug("next index %d\n", index); + if (index != -1) { + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0)) + timeout = + vout->start_jiffies + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index].timestamp); + + if (jiffies >= timeout) { + pr_debug("warning: timer timeout already expired.\n"); + } + + if (mod_timer(&vout->output_timer, timeout)) + pr_debug("warning: timer was already set\n"); + + pr_debug("timer handler next schedule: %lu\n", timeout); + } else { + vout->state = STATE_STREAM_PAUSED; + pr_debug("timer handler paused\n"); + } + + exit0: + spin_unlock_irqrestore(&g_lock, lock_flags); +} + +irqreturn_t mxc_v4l2out_pp_in_irq_handler(int irq, void *dev_id) +{ + int last_buf; + int index; + unsigned long timeout; + unsigned long lock_flags; + vout_data *vout = dev_id; + + spin_lock_irqsave(&g_lock, lock_flags); + + g_irq_cnt++; + + if ((vout->state == STATE_STREAM_OFF) + || (vout->state == STATE_STREAM_STOPPING)) { + spin_unlock_irqrestore(&g_lock, lock_flags); + return IRQ_HANDLED; + } + + if (vout->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + struct fb_gwinfo gwinfo; + + gwinfo.enabled = 1; + gwinfo.alpha_value = 255; + gwinfo.ck_enabled = 0; + gwinfo.xpos = vout->crop_current.left; + gwinfo.ypos = vout->crop_current.top; + gwinfo.base = (unsigned long)vout->display_bufs[pp_num_last()]; + gwinfo.xres = vout->crop_current.width; + gwinfo.yres = vout->crop_current.height; + gwinfo.xres_virtual = vout->crop_current.width; + gwinfo.vs_reversed = 0; + + mx2_gw_set(&gwinfo); + } + + /* Process previous buffer */ + last_buf = vout->ipu_buf[0]; + pr_debug("last_buf %d g_irq_cnt %d\n", last_buf, g_irq_cnt); + if (last_buf != -1) { + g_buf_output_cnt++; + vout->v4l2_bufs[last_buf].flags = V4L2_BUF_FLAG_DONE; + queue_buf(&vout->done_q, last_buf); + vout->ipu_buf[0] = -1; + wake_up_interruptible(&vout->v4l_bufq); + } + + /* Setup timer for next buffer, when stream has been paused */ + if ((vout->state == STATE_STREAM_PAUSED) + && ((index = peek_next_buf(&vout->ready_q)) != -1)) { + pr_debug("next index %d\n", index); + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0)) + timeout = + vout->start_jiffies + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index].timestamp); + + if (jiffies >= timeout) { + pr_debug("warning: timer timeout already expired.\n"); + } + + vout->state = STATE_STREAM_ON; + + if (mod_timer(&vout->output_timer, timeout)) + pr_debug("warning: timer was already set\n"); + + pr_debug("timer handler next schedule: %lu\n", timeout); + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + + return IRQ_HANDLED; +} + +/*! + * Start the output stream + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamon(vout_data * vout) +{ + unsigned long timeout; + int index; + + if (!vout) + return -EINVAL; + + if (vout->state != STATE_STREAM_OFF) + return -EBUSY; + + if (queue_size(&vout->ready_q) < 1) { + pr_debug("no buffers queued yet!\n"); + return -EINVAL; + } + + vout->ipu_buf[0] = -1; + + if (vout->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + /* Free previously allocated buffer */ + mxc_free_buffers(vout->display_bufs, vout->display_bufs_vaddr, + 2, vout->display_buf_size); + /* Allocate buffers for foreground */ + if (mxc_allocate_buffers(vout->display_bufs, + vout->display_bufs_vaddr, 2, + vout->display_buf_size) < 0) { + pr_debug("unable to allocate SDC FG buffers\n"); + return -ENOMEM; + } + } + + /* Configure PP */ + if (pp_cfg(vout)) { + /* Free previously allocated buffer */ + mxc_free_buffers(vout->display_bufs, vout->display_bufs_vaddr, + 2, vout->display_buf_size); + pr_debug("failed to config PP.\n"); + return -EINVAL; + } +#ifdef CONFIG_VIDEO_MXC_OUTPUT_FBSYNC + g_output_fb = vout->output_fb_num[vout->cur_disp_output]; + g_fb_enabled = 0; + g_pp_ready = 0; + fb_register_client(&fb_event_notifier); + mx2fb_register_client(&mx2fb_event_notifier); +#endif + vout->frame_count = 0; + vout->state = STATE_STREAM_ON; + index = peek_next_buf(&vout->ready_q); + + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == 0) + && (vout->v4l2_bufs[index].timestamp.tv_usec == 0)) + timeout = jiffies; + else + timeout = get_jiffies(&vout->v4l2_bufs[index].timestamp); + + if (jiffies >= timeout) { + pr_debug("warning: timer timeout already expired.\n"); + } + + vout->start_jiffies = vout->output_timer.expires = timeout; + pr_debug("STREAMON:Add timer %d timeout @ %lu jiffies, current = %lu\n", + index, timeout, jiffies); + add_timer(&vout->output_timer); + + return 0; +} + +/*! + * Shut down the voutera + * + * @param vout structure vout_data * + * + * @return status 0 Success + */ +static int mxc_v4l2out_streamoff(vout_data * vout) +{ + int i, retval = 0; + unsigned long lock_flag = 0; + + if (!vout) + return -EINVAL; + + if (vout->state == STATE_STREAM_OFF) { + return 0; + } + + spin_lock_irqsave(&g_lock, lock_flag); + + del_timer(&vout->output_timer); + pp_enable(0); /* Disable PP */ + + if (vout->state == STATE_STREAM_ON) { + vout->state = STATE_STREAM_STOPPING; + } + + spin_unlock_irqrestore(&g_lock, lock_flag); + + vout->ready_q.head = vout->ready_q.tail = 0; + vout->done_q.head = vout->done_q.tail = 0; + for (i = 0; i < vout->buffer_cnt; i++) { + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + + vout->state = STATE_STREAM_OFF; + + if (vout->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + struct fb_gwinfo gwinfo; + + /* Disable graphic window */ + gwinfo.enabled = 0; + mx2_gw_set(&gwinfo); + } +#ifdef CONFIG_VIDEO_MXC_OUTPUT_FBSYNC + g_output_fb = -1; + g_fb_enabled = 0; + g_pp_ready = 0; + fb_unregister_client(&fb_event_notifier); + mx2fb_unregister_client(&mx2fb_event_notifier); +#endif + + mxc_free_buffers(vout->display_bufs, vout->display_bufs_vaddr, + 2, vout->display_buf_size); + + return retval; +} + +/* + * Valid whether the palette is supported + * + * @param palette V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return 1 if supported, 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + return (palette == V4L2_PIX_FMT_YUV420); +} + +/* + * Returns bits per pixel for given pixel format + * + * @param pixelformat V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return bits per pixel of pixelformat + */ +static u32 fmt_to_bpp(u32 pixelformat) +{ + u32 bpp; + + switch (pixelformat) { + case V4L2_PIX_FMT_RGB565: + bpp = 16; + break; + case V4L2_PIX_FMT_BGR24: + case V4L2_PIX_FMT_RGB24: + bpp = 24; + break; + case V4L2_PIX_FMT_BGR32: + case V4L2_PIX_FMT_RGB32: + bpp = 32; + break; + default: + bpp = 8; + break; + } + return bpp; +} + +/* + * V4L2 - Handles VIDIOC_G_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_g_fmt(vout_data * vout, struct v4l2_format *f) +{ + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + return -EINVAL; + } + *f = vout->v2f; + return 0; +} + +/* + * V4L2 - Handles VIDIOC_S_FMT Ioctl + * + * @param vout structure vout_data * + * + * @param v4l2_format structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2out_s_fmt(vout_data * vout, struct v4l2_format *f) +{ + int retval = 0; + u32 size = 0; + u32 bytesperline; + + if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + goto err0; + } + if (!valid_mode(f->fmt.pix.pixelformat)) { + pr_debug("pixel format not supported\n"); + retval = -EINVAL; + goto err0; + } + + bytesperline = (f->fmt.pix.width * fmt_to_bpp(f->fmt.pix.pixelformat)) / + 8; + if (f->fmt.pix.bytesperline < bytesperline) { + f->fmt.pix.bytesperline = bytesperline; + } else { + bytesperline = f->fmt.pix.bytesperline; + } + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_YUV422P: + /* byteperline for YUV planar formats is for + Y plane only */ + size = bytesperline * f->fmt.pix.height * 2; + break; + case V4L2_PIX_FMT_YUV420: + size = (bytesperline * f->fmt.pix.height * 3) / 2; + break; + default: + size = bytesperline * f->fmt.pix.height; + break; + } + + /* Return the actual size of the image to the app */ + f->fmt.pix.sizeimage = size; + + vout->v2f.fmt.pix.sizeimage = size; + vout->v2f.fmt.pix.width = f->fmt.pix.width; + vout->v2f.fmt.pix.height = f->fmt.pix.height; + vout->v2f.fmt.pix.pixelformat = f->fmt.pix.pixelformat; + vout->v2f.fmt.pix.bytesperline = f->fmt.pix.bytesperline; + + retval = 0; + err0: + return retval; +} + +/* + * V4L2 - Handles VIDIOC_G_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_get_v42lout_control(vout_data * vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + return (vout->rotate & IPU_ROTATE_HORIZ_FLIP) ? 1 : 0; + case V4L2_CID_VFLIP: + return (vout->rotate & IPU_ROTATE_VERT_FLIP) ? 1 : 0; + case (V4L2_CID_PRIVATE_BASE + 1): + return vout->rotate; + default: + return -EINVAL; + } +} + +/* + * V4L2 - Handles VIDIOC_S_CTRL Ioctl + * + * @param vout structure vout_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_set_v42lout_control(vout_data * vout, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + case V4L2_CID_VFLIP: + case V4L2_CID_MXC_ROT: + return 0; + default: + return -EINVAL; + } + return 0; +} + +/*! + * V4L2 interface - open function + * + * @param inode structure inode * + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l2out_open(struct inode *inode, struct file *file) +{ + struct video_device *dev = video_devdata(file); + vout_data *vout = video_get_drvdata(dev); + int err; + + if (!vout) { + pr_info("Internal error, vout_data not found!\n"); + return -ENODEV; + } + + down(&vout->busy_lock); + + err = -EINTR; + if (signal_pending(current)) + goto oops; + + if (vout->open_count++ == 0) { + pp_init(vout); + + init_waitqueue_head(&vout->v4l_bufq); + + init_timer(&vout->output_timer); + vout->output_timer.function = mxc_v4l2out_timer_handler; + vout->output_timer.data = (unsigned long)vout; + + vout->state = STATE_STREAM_OFF; + g_irq_cnt = g_buf_output_cnt = g_buf_q_cnt = g_buf_dq_cnt = 0; + + } + + file->private_data = dev; + up(&vout->busy_lock); + return 0; + + oops: + up(&vout->busy_lock); + return err; +} + +/*! + * V4L2 interface - close function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @return 0 success + */ +static int mxc_v4l2out_close(struct inode *inode, struct file *file) +{ + struct video_device *dev = file->private_data; + vout_data *vout = video_get_drvdata(dev); + + if (--vout->open_count == 0) { + pr_debug("release resource\n"); + + pp_exit(vout); + if (vout->state != STATE_STREAM_OFF) + mxc_v4l2out_streamoff(vout); + + file->private_data = NULL; + + mxc_free_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, vout->queue_buf_size); + vout->buffer_cnt = 0; + mxc_free_buffers(vout->display_bufs, + vout->display_bufs_vaddr, + 2, vout->display_buf_size); + + /* capture off */ + wake_up_interruptible(&vout->v4l_bufq); + } + + return 0; +} + +/*! + * V4L2 interface - ioctl function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @param ioctlnr unsigned int + * + * @param arg void * + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static int +mxc_v4l2out_do_ioctl(struct inode *inode, struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *dev = file->private_data; + vout_data *vout = video_get_drvdata(dev); + int retval = 0; + int i = 0; + + if (!vout) + return -EBADF; + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + case VIDIOC_QUERYCAP: + { + struct v4l2_capability *cap = arg; + strcpy(cap->driver, "mxc_v4l2_output"); + cap->version = 0; + cap->capabilities = + V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + retval = 0; + break; + } + case VIDIOC_G_FMT: + { + struct v4l2_format *gf = arg; + retval = mxc_v4l2out_g_fmt(vout, gf); + break; + } + case VIDIOC_S_FMT: + { + struct v4l2_format *sf = arg; + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + retval = mxc_v4l2out_s_fmt(vout, sf); + break; + } + case VIDIOC_REQBUFS: + { + struct v4l2_requestbuffers *req = arg; + if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (req->memory != V4L2_MEMORY_MMAP)) { + pr_debug + ("VIDIOC_REQBUFS: incorrect buffer type\n"); + retval = -EINVAL; + break; + } + + if (req->count == 0) + mxc_v4l2out_streamoff(vout); + + if (vout->state == STATE_STREAM_OFF) { + if (vout->queue_buf_paddr[0] != 0) { + mxc_free_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + pr_debug + ("VIDIOC_REQBUFS: freed buffers\n"); + } + vout->buffer_cnt = 0; + } else { + pr_debug("VIDIOC_REQBUFS: Buffer is in use\n"); + retval = -EBUSY; + break; + } + + if (req->count == 0) + break; + + if (req->count < MIN_FRAME_NUM) { + req->count = MIN_FRAME_NUM; + } else if (req->count > MAX_FRAME_NUM) { + req->count = MAX_FRAME_NUM; + } + vout->buffer_cnt = req->count; + vout->queue_buf_size = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + + retval = mxc_allocate_buffers(vout->queue_buf_paddr, + vout->queue_buf_vaddr, + vout->buffer_cnt, + vout->queue_buf_size); + if (retval < 0) + break; + + /* Init buffer queues */ + vout->done_q.head = 0; + vout->done_q.tail = 0; + vout->ready_q.head = 0; + vout->ready_q.tail = 0; + + for (i = 0; i < vout->buffer_cnt; i++) { + memset(&(vout->v4l2_bufs[i]), 0, + sizeof(vout->v4l2_bufs[i])); + vout->v4l2_bufs[i].flags = 0; + vout->v4l2_bufs[i].memory = V4L2_MEMORY_MMAP; + vout->v4l2_bufs[i].index = i; + vout->v4l2_bufs[i].type = + V4L2_BUF_TYPE_VIDEO_OUTPUT; + vout->v4l2_bufs[i].length = + PAGE_ALIGN(vout->v2f.fmt.pix.sizeimage); + vout->v4l2_bufs[i].m.offset = + (unsigned long)vout->queue_buf_paddr[i]; + vout->v4l2_bufs[i].timestamp.tv_sec = 0; + vout->v4l2_bufs[i].timestamp.tv_usec = 0; + } + break; + } + case VIDIOC_QUERYBUF: + { + struct v4l2_buffer *buf = arg; + u32 type = buf->type; + int index = buf->index; + + if ((type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt)) { + pr_debug + ("VIDIOC_QUERYBUFS: incorrect buffer type\n"); + retval = -EINVAL; + break; + } + down(&vout->param_lock); + memcpy(buf, &(vout->v4l2_bufs[index]), sizeof(*buf)); + up(&vout->param_lock); + break; + } + case VIDIOC_QBUF: + { + struct v4l2_buffer *buf = arg; + int index = buf->index; + unsigned long lock_flags; + unsigned long timeout; + + if ((buf->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || + (index >= vout->buffer_cnt) || (buf->flags != 0)) { + retval = -EINVAL; + break; + } + + pr_debug("VIDIOC_QBUF: %d\n", buf->index); + + spin_lock_irqsave(&g_lock, lock_flags); + + memcpy(&(vout->v4l2_bufs[index]), buf, sizeof(*buf)); + vout->v4l2_bufs[index].flags |= V4L2_BUF_FLAG_QUEUED; + + g_buf_q_cnt++; + queue_buf(&vout->ready_q, index); + + if (vout->state == STATE_STREAM_PAUSED) { + index = peek_next_buf(&vout->ready_q); + + /* if timestamp is 0, then default to 30fps */ + if ((vout->v4l2_bufs[index].timestamp.tv_sec == + 0) + && (vout->v4l2_bufs[index].timestamp. + tv_usec == 0)) + timeout = + vout->start_jiffies + + vout->frame_count * HZ / 30; + else + timeout = + get_jiffies(&vout->v4l2_bufs[index]. + timestamp); + + if (jiffies >= timeout) { + pr_debug + ("warning: timer timeout already expired.\n"); + } + + vout->output_timer.expires = timeout; + pr_debug + ("QBUF:Add timer %d timeout @ %lu jiffies, " + "current = %lu\n", index, timeout, + jiffies); + add_timer(&vout->output_timer); + vout->state = STATE_STREAM_ON; + } + + spin_unlock_irqrestore(&g_lock, lock_flags); + break; + } + case VIDIOC_DQBUF: + { + struct v4l2_buffer *buf = arg; + int idx; + + pr_debug("VIDIOC_DQBUF: q size = %d\n", + queue_size(&vout->done_q)); + + if ((queue_size(&vout->done_q) == 0) && + (file->f_flags & O_NONBLOCK)) { + retval = -EAGAIN; + break; + } + + if (!wait_event_interruptible_timeout(vout->v4l_bufq, + queue_size(&vout-> + done_q) + != 0, 10 * HZ)) { + pr_debug("VIDIOC_DQBUF: timeout\n"); + retval = -ETIME; + break; + } else if (signal_pending(current)) { + pr_debug("VIDIOC_DQBUF: interrupt received\n"); + retval = -ERESTARTSYS; + break; + } + idx = dequeue_buf(&vout->done_q); + if (idx == -1) { /* No frame free */ + pr_debug + ("VIDIOC_DQBUF: no free buffers, returning\n"); + retval = -EAGAIN; + break; + } + if ((vout->v4l2_bufs[idx].flags & V4L2_BUF_FLAG_DONE) == + 0) + pr_debug + ("VIDIOC_DQBUF: buffer in done q, but not " + "flagged as done\n"); + + vout->v4l2_bufs[idx].flags = 0; + memcpy(buf, &(vout->v4l2_bufs[idx]), sizeof(*buf)); + pr_debug("VIDIOC_DQBUF: %d\n", buf->index); + break; + } + case VIDIOC_STREAMON: + { + retval = mxc_v4l2out_streamon(vout); + break; + } + case VIDIOC_STREAMOFF: + { + retval = mxc_v4l2out_streamoff(vout); + break; + } + case VIDIOC_G_CTRL: + { + retval = mxc_get_v42lout_control(vout, arg); + break; + } + case VIDIOC_S_CTRL: + { + retval = mxc_set_v42lout_control(vout, arg); + break; + } + case VIDIOC_CROPCAP: + { + struct v4l2_cropcap *cap = arg; + + if (cap->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + cap->bounds = vout->crop_bounds[vout->cur_disp_output]; + cap->defrect = vout->crop_bounds[vout->cur_disp_output]; + retval = 0; + break; + } + case VIDIOC_G_CROP: + { + struct v4l2_crop *crop = arg; + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + crop->c = vout->crop_current; + break; + } + case VIDIOC_S_CROP: + { + struct v4l2_crop *crop = arg; + struct v4l2_rect *b = + &(vout->crop_bounds[vout->cur_disp_output]); + + if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + retval = -EINVAL; + break; + } + if (crop->c.height < 0) { + retval = -EINVAL; + break; + } + if (crop->c.width < 0) { + retval = -EINVAL; + break; + } + + if (crop->c.top < b->top) + crop->c.top = b->top; + if (crop->c.top > b->top + b->height) + crop->c.top = b->top + b->height; + if (crop->c.height > b->top - crop->c.top + b->height) + crop->c.height = + b->top - crop->c.top + b->height; + + if (crop->c.left < b->left) + crop->c.top = b->left; + if (crop->c.left > b->left + b->width) + crop->c.top = b->left + b->width; + if (crop->c.width > b->left - crop->c.left + b->width) + crop->c.width = + b->left - crop->c.left + b->width; + + /* stride line limitation */ + crop->c.height -= crop->c.height % 8; + crop->c.width -= crop->c.width % 8; + + vout->crop_current = crop->c; + + vout->display_buf_size = vout->crop_current.width * + vout->crop_current.height; + vout->display_buf_size *= + fmt_to_bpp(SDC_FG_FB_FORMAT) / 8; + break; + } + case VIDIOC_ENUMOUTPUT: + { + struct v4l2_output *output = arg; + + if ((output->index >= 2) || + (vout->output_enabled[output->index] == false)) { + retval = -EINVAL; + break; + } + + *output = mxc_outputs[0]; + output->name[4] = '0' + output->index; + break; + } + case VIDIOC_G_OUTPUT: + { + int *p_output_num = arg; + + *p_output_num = vout->cur_disp_output; + break; + } + case VIDIOC_S_OUTPUT: + { + int *p_output_num = arg; + + if ((*p_output_num >= 2) || + (vout->output_enabled[*p_output_num] == false)) { + retval = -EINVAL; + break; + } + + if (vout->state != STATE_STREAM_OFF) { + retval = -EBUSY; + break; + } + + vout->cur_disp_output = *p_output_num; + break; + } + case VIDIOC_G_FBUF: + { + struct v4l2_framebuffer *fb = arg; + *fb = vout->v4l2_fb; + break; + } + case VIDIOC_S_FBUF: + { + struct v4l2_framebuffer *fb = arg; + vout->v4l2_fb = *fb; + vout->v4l2_fb.capability = V4L2_FBUF_CAP_EXTERNOVERLAY; + break; + } + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_G_PARM: + case VIDIOC_ENUMSTD: + case VIDIOC_G_STD: + case VIDIOC_S_STD: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + default: + retval = -EINVAL; + break; + } + + up(&vout->busy_lock); + return retval; +} + +/* + * V4L2 interface - ioctl function + * + * @return None + */ +static int +mxc_v4l2out_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + return video_usercopy(inode, file, cmd, arg, mxc_v4l2out_do_ioctl); +} + +/*! + * V4L2 interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, + * ENOBUFS remap_page error + */ +static int mxc_v4l2out_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *dev = file->private_data; + unsigned long start = vma->vm_start; + unsigned long size = vma->vm_end - vma->vm_start; + int res = 0; + vout_data *vout = video_get_drvdata(dev); + + /* make this _really_ smp-safe */ + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + /* make buffers write-thru cacheable */ + vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) & + ~L_PTE_BUFFERABLE); + + if (remap_pfn_range(vma, start, vma->vm_pgoff, size, vma->vm_page_prot)) { + pr_debug("mxc_mmap(V4L)i - remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + mxc_mmap_exit: + up(&vout->busy_lock); + return res; +} + +/*! + * V4L2 interface - poll function + * + * @param file structure file * + * + * @param wait structure poll_table * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_v4l2out_poll(struct file *file, poll_table * wait) +{ + struct video_device *dev = file->private_data; + vout_data *vout = video_get_drvdata(dev); + + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + if (down_interruptible(&vout->busy_lock)) + return -EINTR; + + queue = &vout->v4l_bufq; + poll_wait(file, queue, wait); + + up(&vout->busy_lock); + return res; +} + +static struct file_operations mxc_v4l2out_fops = { + .owner = THIS_MODULE, + .open = mxc_v4l2out_open, + .release = mxc_v4l2out_close, + .ioctl = mxc_v4l2out_ioctl, + .mmap = mxc_v4l2out_mmap, + .poll = mxc_v4l2out_poll, +}; + +static struct video_device mxc_v4l2out_template = { + .name = "MXC Video Output", + .vfl_type = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING, + .fops = &mxc_v4l2out_fops, + .release = video_device_release, +}; + +/*! + * Probe routine for the framebuffer driver. It is called during the + * driver binding process. The following functions are performed in + * this routine: Framebuffer initialization, Memory allocation and + * mapping, Framebuffer registration, IPU initialization. + * + * @return Appropriate error code to the kernel common code + */ +static int mxc_v4l2out_probe(struct platform_device *pdev) +{ + int i; + vout_data *vout; + + /* + * Allocate sufficient memory for the fb structure + */ + g_vout = vout = kmalloc(sizeof(vout_data), GFP_KERNEL); + + if (!vout) + return 0; + + memset(vout, 0, sizeof(vout_data)); + + vout->video_dev = video_device_alloc(); + if (vout->video_dev == NULL) + return -1; + vout->video_dev->minor = -1; + + *(vout->video_dev) = mxc_v4l2out_template; + + /* register v4l device */ + if (video_register_device(vout->video_dev, + VFL_TYPE_GRABBER, video_nr) == -1) { + pr_debug("video_register_device failed\n"); + return 0; + } + pr_debug("mxc_v4l2out: registered device video%d\n", + vout->video_dev->minor & 0x1f); + + video_set_drvdata(vout->video_dev, vout); + + init_MUTEX(&vout->param_lock); + init_MUTEX(&vout->busy_lock); + + /* setup outputs and cropping */ + vout->cur_disp_output = -1; + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strncmp(idstr, "DISP", 4) == 0) { + int disp_num = i; + vout->crop_bounds[disp_num].left = 0; + vout->crop_bounds[disp_num].top = 0; + vout->crop_bounds[disp_num].width = + registered_fb[i]->var.xres; + vout->crop_bounds[disp_num].height = + registered_fb[i]->var.yres; + vout->output_enabled[disp_num] = true; + vout->output_fb_num[disp_num] = i; + if (vout->cur_disp_output == -1) + vout->cur_disp_output = disp_num; + } + + } + vout->crop_current = vout->crop_bounds[vout->cur_disp_output]; + + /* Setup framebuffer parameters */ + vout->v4l2_fb.capability = V4L2_FBUF_CAP_EXTERNOVERLAY; + vout->v4l2_fb.flags = V4L2_FBUF_FLAG_PRIMARY; + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_v4l2out_driver = { + .driver = { + .name = "MXC Video Output", + .owner = THIS_MODULE, + .bus = &platform_bus_type, + }, + .probe = mxc_v4l2out_probe, + .remove = NULL, +}; + +static void camera_platform_release(struct device *device) +{ +} + +static struct platform_device mxc_v4l2out_device = { + .name = "MXC Video Output", + .dev = { + .release = camera_platform_release, + }, + .id = 0, +}; + +/*! + * mxc v4l2 init function + * + */ +static int mxc_v4l2out_init(void) +{ + u8 err = 0; + + err = platform_driver_register(&mxc_v4l2out_driver); + if (err == 0) { + platform_device_register(&mxc_v4l2out_device); + } + return err; +} + +/*! + * mxc v4l2 cleanup function + * + */ +static void mxc_v4l2out_clean(void) +{ + pr_debug("unregistering video\n"); + + video_unregister_device(g_vout->video_dev); + + platform_driver_unregister(&mxc_v4l2out_driver); + platform_device_unregister(&mxc_v4l2out_device); + kfree(g_vout); + g_vout = NULL; +} + +module_init(mxc_v4l2out_init); +module_exit(mxc_v4l2out_clean); + +module_param(video_nr, int, 0444); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2-driver for MXC video output"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/output/mxc_v4l2_output.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/output/mxc_v4l2_output.h @@ -0,0 +1,152 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup MXC_V4L2_OUTPUT MXC V4L2 Video Output Driver + */ +/*! + * @file mxc_v4l2_output.h + * + * @brief MXC V4L2 Video Output Driver Header file + * + * Video4Linux2 Output Device using MXC IPU Post-processing functionality. + * + * @ingroup MXC_V4L2_OUTPUT + */ +#ifndef __MXC_V4L2_OUTPUT_H__ +#define __MXC_V4L2_OUTPUT_H__ + +#include + +#ifdef __KERNEL__ + +#include +#include +#include + +#define MIN_FRAME_NUM 2 +#define MAX_FRAME_NUM 30 + +#define MXC_V4L2_OUT_NUM_OUTPUTS 6 +#define MXC_V4L2_OUT_2_SDC 0 +#define MXC_V4L2_OUT_2_ADC 1 + + +typedef struct { + int list[MAX_FRAME_NUM + 1]; + int head; + int tail; +} v4l_queue; + +/*! + * States for the video stream + */ +typedef enum { + STATE_STREAM_OFF, + STATE_STREAM_ON, + STATE_STREAM_PAUSED, + STATE_STREAM_STOPPING, +} v4lout_state; + +/*! + * common v4l2 driver structure. + */ +typedef struct _vout_data { + struct video_device *video_dev; + /*! + * semaphore guard against SMP multithreading + */ + struct semaphore busy_lock; + + /*! + * number of process that have device open + */ + int open_count; + + /*! + * params lock for this camera + */ + struct semaphore param_lock; + + struct timer_list output_timer; + struct work_struct timer_work; + unsigned long start_jiffies; + u32 frame_count; + + v4l_queue ready_q; + v4l_queue done_q; + + s8 next_rdy_ipu_buf; + s8 next_done_ipu_buf; + s8 ipu_buf[2]; + s8 ipu_buf_p[2]; + s8 ipu_buf_n[2]; + volatile v4lout_state state; + + int cur_disp_output; + int output_fb_num[MXC_V4L2_OUT_NUM_OUTPUTS]; + int output_enabled[MXC_V4L2_OUT_NUM_OUTPUTS]; + struct v4l2_framebuffer v4l2_fb; + int ic_bypass; + u32 work_irq; + ipu_channel_t display_ch; + ipu_channel_t post_proc_ch; + ipu_channel_t display_input_ch; + + /*! + * FRAME_NUM-buffering, so we need a array + */ + int buffer_cnt; + dma_addr_t queue_buf_paddr[MAX_FRAME_NUM]; + void *queue_buf_vaddr[MAX_FRAME_NUM]; + u32 queue_buf_size; + struct v4l2_buffer v4l2_bufs[MAX_FRAME_NUM]; + u32 display_buf_size; + dma_addr_t display_bufs[2]; + void *display_bufs_vaddr[2]; + dma_addr_t rot_pp_bufs[2]; + void *rot_pp_bufs_vaddr[2]; + + /*! + * Poll wait queue + */ + wait_queue_head_t v4l_bufq; + + /*! + * v4l2 format + */ + struct v4l2_format v2f; + struct v4l2_mxc_offset offset; + ipu_rotate_mode_t rotate; + + /* crop */ + struct v4l2_rect crop_bounds[MXC_V4L2_OUT_NUM_OUTPUTS]; + struct v4l2_rect crop_current; + u32 bytesperline; + enum v4l2_field field_fmt; + ipu_motion_sel motion_sel; + + /* PP split fot two stripes*/ + int pp_split; /* 0,1 */ + struct stripe_param pp_left_stripe; + struct stripe_param pp_right_stripe; /* struct for split parameters */ + /* IC ouput buffer number. Counting from 0 to 3 */ + int pp_split_buf_num; /* 0..3 */ + u16 bpp ; /* bit per pixel */ + u16 xres; /* width of physical frame (BGs) */ + u16 yres; /* heigth of physical frame (BGs)*/ + +} vout_data; + +#endif +#endif /* __MXC_V4L2_OUTPUT_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/rotate270_u16_qcif.S +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/rotate270_u16_qcif.S @@ -0,0 +1,70 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include + + .text + .align 2 +ENTRY(opl_rotate270_u16_qcif) + STMFD sp!,{r4-r10} + MOV r12,#0x160 + MOV r10,#0x90 + MOV r3,r10,LSR #4 +.L1.16: + RSB r2,r3,r10,LSR #4 + MOV r5,r2,LSL #5 + MOV r4,r12,LSR #1 + SMULBB r4,r5,r4 + ADD r2,r1,r2,LSL #5 + ADD r5,r2,#0xc000 + ADD r5,r5,#0x4e0 + MOV r2,r12,LSR #1 + ADD r4,r0,r4 +.L1.52: + LDRH r6,[r4],r12 + LDRH r7,[r4],r12 + LDRH r8,[r4],r12 + LDRH r9,[r4],r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + SUBS r2,r2,#1 + LDRH r6,[r4],r12 + LDRH r7,[r4],r12 + LDRH r8,[r4],r12 + LDRH r9,[r4],r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + LDRH r6,[r4],r12 + LDRH r7,[r4],r12 + LDRH r8,[r4],r12 + LDRH r9,[r4],r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + LDRH r6,[r4],r12 + LDRH r7,[r4],r12 + LDRH r8,[r4],r12 + LDRH r9,[r4],r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + SUB r4,r4,#0x1500 + STMIA r5,{r6,r7} + SUB r5,r5,#0x138 + SUB r4,r4,#0xfe + BGT .L1.52 + SUBS r3,r3,#1 + BGT .L1.16 + LDMFD sp!,{r4-r10} + BX lr + .size opl_rotate270_u16_qcif, . - opl_rotate270_u16_qcif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/rotate90_u16.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/rotate90_u16.c @@ -0,0 +1,220 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include "opl.h" + +static int opl_rotate90_u16_by16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_rotate90_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_rotate90_vmirror_u16_both(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror); +int opl_rotate90_u16_qcif(const u8 * src, u8 * dst); + +int opl_rotate90_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride) +{ + return opl_rotate90_vmirror_u16_both(src, src_line_stride, width, + height, dst, dst_line_stride, 0); +} + +int opl_rotate90_vmirror_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride) +{ + return opl_rotate90_vmirror_u16_both(src, src_line_stride, width, + height, dst, dst_line_stride, 1); +} + +static int opl_rotate90_vmirror_u16_both(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL; + const int BLOCK_SIZE_PIXELS_BY4 = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL / 4; + + if (!src || !dst) + return OPLERR_NULL_PTR; + + if (width == 0 || height == 0 || src_line_stride == 0 + || dst_line_stride == 0) + return OPLERR_BAD_ARG; + + /* The QCIF algorithm doesn't support vertical mirroring */ + if (vmirror == 0 && width == QCIF_Y_WIDTH && height == QCIF_Y_HEIGHT + && src_line_stride == QCIF_Y_WIDTH * 2 + && src_line_stride == QCIF_Y_HEIGHT * 2) + return opl_rotate90_u16_qcif(src, dst); + else if (width % BLOCK_SIZE_PIXELS == 0 + && height % BLOCK_SIZE_PIXELS == 0) + return opl_rotate90_u16_by16(src, src_line_stride, width, + height, dst, dst_line_stride, + vmirror); + else if (width % BLOCK_SIZE_PIXELS_BY4 == 0 + && height % BLOCK_SIZE_PIXELS_BY4 == 0) + return opl_rotate90_u16_by4(src, src_line_stride, width, height, + dst, dst_line_stride, vmirror); + else + return OPLERR_BAD_ARG; +} + +/* + * Performs clockwise rotation (and possibly vertical mirroring depending + * on the vmirror flag) using block sizes of 16x16 + * The algorithm is similar to 270 degree clockwise rotation algorithm + */ +static int opl_rotate90_u16_by16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL; + const int BLOCK_SIZE_BYTES = BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS; + const int IN_INDEX = src_line_stride * BLOCK_SIZE_PIXELS + + BYTES_PER_PIXEL; + const int OUT_INDEX = vmirror ? + -dst_line_stride - BLOCK_SIZE_BYTES + : dst_line_stride - BLOCK_SIZE_BYTES; + const u8 *in_block_ptr; + u8 *out_block_ptr; + int i, k; + + for (k = height / BLOCK_SIZE_PIXELS; k > 0; k--) { + in_block_ptr = src + src_line_stride * (height - 1) + - (src_line_stride * BLOCK_SIZE_PIXELS * + (height / BLOCK_SIZE_PIXELS - k)); + out_block_ptr = dst + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS * + ((height / BLOCK_SIZE_PIXELS) - k); + + /* + * For vertical mirroring the writing starts from the + * bottom line + */ + if (vmirror) + out_block_ptr += dst_line_stride * (width - 1); + + for (i = width; i > 0; i--) { + __asm__ volatile ( + "ldrh r2, [%0], -%4\n\t" + "ldrh r3, [%0], -%4\n\t" + "ldrh r4, [%0], -%4\n\t" + "ldrh r5, [%0], -%4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], -%4\n\t" + "ldrh r3, [%0], -%4\n\t" + "ldrh r4, [%0], -%4\n\t" + "ldrh r5, [%0], -%4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], -%4\n\t" + "ldrh r3, [%0], -%4\n\t" + "ldrh r4, [%0], -%4\n\t" + "ldrh r5, [%0], -%4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], -%4\n\t" + "ldrh r3, [%0], -%4\n\t" + "ldrh r4, [%0], -%4\n\t" + "ldrh r5, [%0], -%4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + :"+r" (in_block_ptr), "+r"(out_block_ptr) /* output */ + :"0"(in_block_ptr), "1"(out_block_ptr), "r"(src_line_stride) /* input */ + :"r2", "r3", "r4", "r5", "memory" /* modify */ + ); + in_block_ptr += IN_INDEX; + out_block_ptr += OUT_INDEX; + } + } + + return OPLERR_SUCCESS; +} + +/* + * Performs clockwise rotation (and possibly vertical mirroring depending + * on the vmirror flag) using block sizes of 4x4 + * The algorithm is similar to 270 degree clockwise rotation algorithm + */ +static int opl_rotate90_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL / 4; + const int BLOCK_SIZE_BYTES = BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS; + const int IN_INDEX = src_line_stride * BLOCK_SIZE_PIXELS + + BYTES_PER_PIXEL; + const int OUT_INDEX = vmirror ? + -dst_line_stride - BLOCK_SIZE_BYTES + : dst_line_stride - BLOCK_SIZE_BYTES; + const u8 *in_block_ptr; + u8 *out_block_ptr; + int i, k; + + for (k = height / BLOCK_SIZE_PIXELS; k > 0; k--) { + in_block_ptr = src + src_line_stride * (height - 1) + - (src_line_stride * BLOCK_SIZE_PIXELS * + (height / BLOCK_SIZE_PIXELS - k)); + out_block_ptr = dst + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS + * ((height / BLOCK_SIZE_PIXELS) - k); + + /* + * For horizontal mirroring the writing starts from the + * bottom line + */ + if (vmirror) + out_block_ptr += dst_line_stride * (width - 1); + + for (i = width; i > 0; i--) { + __asm__ volatile ( + "ldrh r2, [%0], -%4\n\t" + "ldrh r3, [%0], -%4\n\t" + "ldrh r4, [%0], -%4\n\t" + "ldrh r5, [%0], -%4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + :"+r" (in_block_ptr), "+r"(out_block_ptr) /* output */ + :"0"(in_block_ptr), "1"(out_block_ptr), "r"(src_line_stride) /* input */ + :"r2", "r3", "r4", "r5", "memory" /* modify */ + ); + in_block_ptr += IN_INDEX; + out_block_ptr += OUT_INDEX; + } + } + + return OPLERR_SUCCESS; +} + +EXPORT_SYMBOL(opl_rotate90_u16); +EXPORT_SYMBOL(opl_rotate90_vmirror_u16); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/rotate90_u16_qcif.S +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/rotate90_u16_qcif.S @@ -0,0 +1,71 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include + + .text + .align 2 +ENTRY(opl_rotate90_u16_qcif) + STMFD sp!,{r4-r10} + MOV r12,#0x160 + MOV r10,#0x90 + MOV r3,r10,LSR #4 +.L1.216: + RSB r2,r3,r10,LSR #4 + MOV r4,#0x20 + SMULBB r5,r4,r2 + MOV r4,#0x1600 + SMULBB r2,r4,r2 + ADD r4,r0,#0xc000 + ADD r4,r4,#0x4a0 + SUB r4,r4,r2 + MOV r2,r12,LSR #1 + ADD r5,r1,r5 +.L1.256: + LDRH r6,[r4],-r12 + LDRH r7,[r4],-r12 + LDRH r8,[r4],-r12 + LDRH r9,[r4],-r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + SUBS r2,r2,#1 + LDRH r6,[r4],-r12 + LDRH r7,[r4],-r12 + LDRH r8,[r4],-r12 + LDRH r9,[r4],-r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + LDRH r6,[r4],-r12 + LDRH r7,[r4],-r12 + LDRH r8,[r4],-r12 + LDRH r9,[r4],-r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + STMIA r5!,{r6,r7} + LDRH r6,[r4],-r12 + LDRH r7,[r4],-r12 + LDRH r8,[r4],-r12 + LDRH r9,[r4],-r12 + ORR r6,r6,r7,LSL #16 + ORR r7,r8,r9,LSL #16 + ADD r4,r4,#0x1600 + STMIA r5!,{r6,r7} + ADD r5,r5,#0x100 + ADD r4,r4,#2 + BGT .L1.256 + SUBS r3,r3,#1 + BGT .L1.216 + LDMFD sp!,{r4-r10} + BX lr + .size opl_rotate90_u16_qcif, . - opl_rotate90_u16_qcif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/opl.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/opl.h @@ -0,0 +1,162 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup OPLIP OPL Image Processing + */ +/*! + * @file opl.h + * + * @brief The OPL (Open Primitives Library) Image Processing library defines + * efficient functions for rotation and mirroring. + * + * It includes ARM9-optimized rotation and mirroring functions. It is derived + * from the original OPL project which is found at sourceforge.freescale.net. + * + * @ingroup OPLIP + */ +#ifndef __OPL_H__ +#define __OPL_H__ + +#include + +#define BYTES_PER_PIXEL 2 +#define CACHE_LINE_WORDS 8 +#define BYTES_PER_WORD 4 + +#define BYTES_PER_2PIXEL (BYTES_PER_PIXEL * 2) +#define BYTES_PER_4PIXEL (BYTES_PER_PIXEL * 4) +#define BYTES_PER_8PIXEL (BYTES_PER_PIXEL * 8) + +#define QCIF_Y_WIDTH 176 +#define QCIF_Y_HEIGHT 144 + +/*! Enumerations of opl error code */ +enum opl_error { + OPLERR_SUCCESS = 0, + OPLERR_NULL_PTR, + OPLERR_BAD_ARG, + OPLERR_DIV_BY_ZERO, + OPLERR_OVER_FLOW, + OPLERR_UNDER_FLOW, + OPLERR_MISALIGNED, +}; + +/*! + * @brief Rotate a 16bbp buffer 90 degrees clockwise. + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_rotate90_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride); + +/*! + * @brief Rotate a 16bbp buffer 180 degrees clockwise. + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_rotate180_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride); + +/*! + * @brief Rotate a 16bbp buffer 270 degrees clockwise + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_rotate270_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride); + +/*! + * @brief Mirror a 16bpp buffer horizontally + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_hmirror_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride); + +/*! + * @brief Mirror a 16bpp buffer vertically + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_vmirror_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride); + +/*! + * @brief Rotate a 16bbp buffer 90 degrees clockwise and mirror vertically + * It is equivalent to rotate 270 degree and mirror horizontally + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_rotate90_vmirror_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride); + +/*! + * @brief Rotate a 16bbp buffer 270 degrees clockwise and mirror vertically + * It is equivalent to rotate 90 degree and mirror horizontally + * + * @param src Pointer to the input buffer + * @param src_line_stride Length in bytes of a raster line of the input buffer + * @param width Width in pixels of the region in the input buffer + * @param height Height in pixels of the region in the input buffer + * @param dst Pointer to the output buffer + * @param dst_line_stride Length in bytes of a raster line of the output buffer + * + * @return Standard OPL error code. See enumeration for possible result codes. + */ +int opl_rotate270_vmirror_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride); + +#endif /* __OPL_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/rotate270_u16.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/rotate270_u16.c @@ -0,0 +1,285 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include "opl.h" + +static int opl_rotate270_u16_by16(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror); +static int opl_rotate270_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_rotate270_vmirror_u16_both(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror); +int opl_rotate270_u16_qcif(const u8 * src, u8 * dst); + +int opl_rotate270_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride) +{ + return opl_rotate270_vmirror_u16_both(src, src_line_stride, width, + height, dst, dst_line_stride, 0); +} + +int opl_rotate270_vmirror_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride) +{ + return opl_rotate270_vmirror_u16_both(src, src_line_stride, width, + height, dst, dst_line_stride, 1); +} + +static int opl_rotate270_vmirror_u16_both(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL; + const int BLOCK_SIZE_PIXELS_BY4 = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL / 4; + + if (!src || !dst) + return OPLERR_NULL_PTR; + + if (width == 0 || height == 0 || src_line_stride == 0 + || dst_line_stride == 0) + return OPLERR_BAD_ARG; + + /* The QCIF algorithm doesn't support vertical mirroring */ + if (vmirror == 0 && width == QCIF_Y_WIDTH && height == QCIF_Y_HEIGHT + && src_line_stride == QCIF_Y_WIDTH * 2 + && src_line_stride == QCIF_Y_HEIGHT * 2) + return opl_rotate270_u16_qcif(src, dst); + else if (width % BLOCK_SIZE_PIXELS == 0 + && height % BLOCK_SIZE_PIXELS == 0) + return opl_rotate270_u16_by16(src, src_line_stride, width, + height, dst, dst_line_stride, + vmirror); + else if (width % BLOCK_SIZE_PIXELS_BY4 == 0 + && height % BLOCK_SIZE_PIXELS_BY4 == 0) + return opl_rotate270_u16_by4(src, src_line_stride, width, + height, dst, dst_line_stride, + vmirror); + else + return OPLERR_BAD_ARG; +} + +/* + * Rotate Counter Clockwise, divide RGB component into 16 row strips, read + * non sequentially and write sequentially. This is done in 16 line strips + * so that the cache is used better. Cachelines are 8 words = 32 bytes. Pixels + * are 2 bytes. The 16 reads will be cache misses, but the next 240 should + * be from cache. The writes to the output buffer will be sequential for 16 + * writes. + * + * Example: + * Input data matrix: output matrix + * + * 0 | 1 | 2 | 3 | 4 | 4 | 0 | 0 | 3 | + * 4 | 3 | 2 | 1 | 0 | 3 | 1 | 9 | 6 | + * 6 | 7 | 8 | 9 | 0 | 2 | 2 | 8 | 2 | + * 5 | 3 | 2 | 6 | 3 | 1 | 3 | 7 | 3 | + * ^ 0 | 4 | 6 | 5 | < Write the input data sequentially + * Read first column + * Start at the bottom + * Move to next column and repeat + * + * Loop over k decreasing (blocks) + * in_block_ptr = src + (((RGB_HEIGHT_PIXELS / BLOCK_SIZE_PIXELS) - k) + * * BLOCK_SIZE_PIXELS) * (RGB_WIDTH_BYTES) + * out_block_ptr = dst + (((RGB_HEIGHT_PIXELS / BLOCK_SIZE_PIXELS) - k) + * * BLOCK_SIZE_BYTES) + (RGB_WIDTH_PIXELS - 1) + * * RGB_HEIGHT_PIXELS * BYTES_PER_PIXEL + * + * Loop over i decreasing (width) + * Each pix: + * in_block_ptr += RGB_WIDTH_BYTES + * out_block_ptr += 4 + * + * Each row of block: + * in_block_ptr -= RGB_WIDTH_BYTES * BLOCK_SIZE_PIXELS - 2 + * out_block_ptr -= RGB_HEIGHT_PIXELS * BYTES_PER_PIXEL + 2 * BLOCK_SIZE_PIXELS; + * + * It may perform vertical mirroring too depending on the vmirror flag. + */ +static int opl_rotate270_u16_by16(const u8 * src, int src_line_stride, + int width, int height, u8 * dst, + int dst_line_stride, int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL; + const int IN_INDEX = src_line_stride * BLOCK_SIZE_PIXELS + - BYTES_PER_PIXEL; + const int OUT_INDEX = vmirror ? + -dst_line_stride + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS + : dst_line_stride + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS; + const u8 *in_block_ptr; + u8 *out_block_ptr; + int i, k; + + for (k = height / BLOCK_SIZE_PIXELS; k > 0; k--) { + in_block_ptr = src + (((height / BLOCK_SIZE_PIXELS) - k) + * BLOCK_SIZE_PIXELS) * src_line_stride; + out_block_ptr = dst + (((height / BLOCK_SIZE_PIXELS) - k) + * BLOCK_SIZE_PIXELS * BYTES_PER_PIXEL) + + (width - 1) * dst_line_stride; + + /* + * For vertical mirroring the writing starts from the + * first line + */ + if (vmirror) + out_block_ptr -= dst_line_stride * (width - 1); + + for (i = width; i > 0; i--) { + __asm__ volatile ( + "ldrh r2, [%0], %4\n\t" + "ldrh r3, [%0], %4\n\t" + "ldrh r4, [%0], %4\n\t" + "ldrh r5, [%0], %4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], %4\n\t" + "ldrh r3, [%0], %4\n\t" + "ldrh r4, [%0], %4\n\t" + "ldrh r5, [%0], %4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], %4\n\t" + "ldrh r3, [%0], %4\n\t" + "ldrh r4, [%0], %4\n\t" + "ldrh r5, [%0], %4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + "ldrh r2, [%0], %4\n\t" + "ldrh r3, [%0], %4\n\t" + "ldrh r4, [%0], %4\n\t" + "ldrh r5, [%0], %4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + :"+r" (in_block_ptr), "+r"(out_block_ptr) /* output */ + :"0"(in_block_ptr), "1"(out_block_ptr), "r"(src_line_stride) /* input */ + :"r2", "r3", "r4", "r5", "memory" /* modify */ + ); + in_block_ptr -= IN_INDEX; + out_block_ptr -= OUT_INDEX; + } + } + + return OPLERR_SUCCESS; +} + +/* + * Rotate Counter Clockwise, divide RGB component into 4 row strips, read + * non sequentially and write sequentially. This is done in 4 line strips + * so that the cache is used better. Cachelines are 8 words = 32 bytes. Pixels + * are 2 bytes. The 4 reads will be cache misses, but the next 60 should + * be from cache. The writes to the output buffer will be sequential for 4 + * writes. + * + * Example: + * Input data matrix: output matrix + * + * 0 | 1 | 2 | 3 | 4 | 4 | 0 | 0 | 3 | + * 4 | 3 | 2 | 1 | 0 | 3 | 1 | 9 | 6 | + * 6 | 7 | 8 | 9 | 0 | 2 | 2 | 8 | 2 | + * 5 | 3 | 2 | 6 | 3 | 1 | 3 | 7 | 3 | + * ^ 0 | 4 | 6 | 5 | < Write the input data sequentially + * Read first column + * Start at the bottom + * Move to next column and repeat + * + * Loop over k decreasing (blocks) + * in_block_ptr = src + (((RGB_HEIGHT_PIXELS / BLOCK_SIZE_PIXELS) - k) + * * BLOCK_SIZE_PIXELS) * (RGB_WIDTH_BYTES) + * out_block_ptr = dst + (((RGB_HEIGHT_PIXELS / BLOCK_SIZE_PIXELS) - k) + * * BLOCK_SIZE_BYTES) + (RGB_WIDTH_PIXELS - 1) + * * RGB_HEIGHT_PIXELS * BYTES_PER_PIXEL + * + * Loop over i decreasing (width) + * Each pix: + * in_block_ptr += RGB_WIDTH_BYTES + * out_block_ptr += 4 + * + * Each row of block: + * in_block_ptr -= RGB_WIDTH_BYTES * BLOCK_SIZE_PIXELS - 2 + * out_block_ptr -= RGB_HEIGHT_PIXELS * BYTES_PER_PIXEL + 2 * BLOCK_SIZE_PIXELS; + * + * It may perform vertical mirroring too depending on the vmirror flag. + */ +static int opl_rotate270_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const int BLOCK_SIZE_PIXELS = CACHE_LINE_WORDS * BYTES_PER_WORD + / BYTES_PER_PIXEL / 4; + const int IN_INDEX = src_line_stride * BLOCK_SIZE_PIXELS + - BYTES_PER_PIXEL; + const int OUT_INDEX = vmirror ? + -dst_line_stride + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS + : dst_line_stride + BYTES_PER_PIXEL * BLOCK_SIZE_PIXELS; + const u8 *in_block_ptr; + u8 *out_block_ptr; + int i, k; + + for (k = height / BLOCK_SIZE_PIXELS; k > 0; k--) { + in_block_ptr = src + (((height / BLOCK_SIZE_PIXELS) - k) + * BLOCK_SIZE_PIXELS) * src_line_stride; + out_block_ptr = dst + (((height / BLOCK_SIZE_PIXELS) - k) + * BLOCK_SIZE_PIXELS * BYTES_PER_PIXEL) + + (width - 1) * dst_line_stride; + + /* + * For vertical mirroring the writing starts from the + * first line + */ + if (vmirror) + out_block_ptr -= dst_line_stride * (width - 1); + + for (i = width; i > 0; i--) { + __asm__ volatile ( + "ldrh r2, [%0], %4\n\t" + "ldrh r3, [%0], %4\n\t" + "ldrh r4, [%0], %4\n\t" + "ldrh r5, [%0], %4\n\t" + "orr r2, r2, r3, lsl #16\n\t" + "orr r4, r4, r5, lsl #16\n\t" + "str r2, [%1], #4\n\t" + "str r4, [%1], #4\n\t" + + :"+r" (in_block_ptr), "+r"(out_block_ptr) /* output */ + :"0"(in_block_ptr), "1"(out_block_ptr), "r"(src_line_stride) /* input */ + :"r2", "r3", "r4", "r5", "memory" /* modify */ + ); + in_block_ptr -= IN_INDEX; + out_block_ptr -= OUT_INDEX; + } + } + + return OPLERR_SUCCESS; +} + +EXPORT_SYMBOL(opl_rotate270_u16); +EXPORT_SYMBOL(opl_rotate270_vmirror_u16); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/opl_mod.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/opl_mod.c @@ -0,0 +1,30 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +static __init int opl_init(void) +{ + return 0; +} + +static void __exit opl_exit(void) +{ +} + +module_init(opl_init); +module_exit(opl_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("OPL Software Rotation/Mirroring"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/hmirror_rotate180_u16.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/hmirror_rotate180_u16.c @@ -0,0 +1,259 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include "opl.h" + +static inline u32 rot_left_u16(u16 x, unsigned int n) +{ + return (x << n) | (x >> (16 - n)); +} + +static inline u32 rot_left_u32(u32 x, unsigned int n) +{ + return (x << n) | (x >> (32 - n)); +} + +static inline u32 byte_swap_u32(u32 x) +{ + u32 t1, t2, t3; + + t1 = x ^ ((x << 16) | x >> 16); + t2 = t1 & 0xff00ffff; + t3 = (x >> 8) | (x << 24); + return t3 ^ (t2 >> 8); +} + +static int opl_hmirror_u16_by1(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_hmirror_u16_by2(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_hmirror_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); +static int opl_hmirror_u16_by8(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror); + +int opl_hmirror_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride) +{ + if (!src || !dst) + return OPLERR_NULL_PTR; + + if (width == 0 || height == 0 || src_line_stride == 0 + || dst_line_stride == 0) + return OPLERR_BAD_ARG; + + if (width % 8 == 0) + return opl_hmirror_u16_by8(src, src_line_stride, width, height, + dst, dst_line_stride, 0); + else if (width % 4 == 0) + return opl_hmirror_u16_by4(src, src_line_stride, width, height, + dst, dst_line_stride, 0); + else if (width % 2 == 0) + return opl_hmirror_u16_by2(src, src_line_stride, width, height, + dst, dst_line_stride, 0); + else /* (width % 1) */ + return opl_hmirror_u16_by1(src, src_line_stride, width, height, + dst, dst_line_stride, 0); +} + +int opl_rotate180_u16(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride) +{ + if (!src || !dst) + return OPLERR_NULL_PTR; + + if (width == 0 || height == 0 || src_line_stride == 0 + || dst_line_stride == 0) + return OPLERR_BAD_ARG; + + if (width % 8 == 0) + return opl_hmirror_u16_by8(src, src_line_stride, width, height, + dst, dst_line_stride, 1); + else if (width % 4 == 0) + return opl_hmirror_u16_by4(src, src_line_stride, width, height, + dst, dst_line_stride, 1); + else if (width % 2 == 0) + return opl_hmirror_u16_by2(src, src_line_stride, width, height, + dst, dst_line_stride, 1); + else /* (width % 1) */ + return opl_hmirror_u16_by1(src, src_line_stride, width, height, + dst, dst_line_stride, 1); +} + +static int opl_hmirror_u16_by1(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const u8 *src_row_addr; + const u8 *psrc; + u8 *dst_row_addr, *pdst; + int i, j; + u16 pixel; + + src_row_addr = src; + if (vmirror) { + dst_row_addr = dst + dst_line_stride * (height - 1); + dst_line_stride = -dst_line_stride; + } else + dst_row_addr = dst; + + /* Loop over all rows */ + for (i = 0; i < height; i++) { + /* Loop over each pixel */ + psrc = src_row_addr; + pdst = dst_row_addr + (width - 1) * BYTES_PER_PIXEL + - (BYTES_PER_PIXEL - BYTES_PER_PIXEL); + for (j = 0; j < width; j++) { + pixel = *(u16 *) psrc; + *(u16 *) pdst = pixel; + psrc += BYTES_PER_PIXEL; + pdst -= BYTES_PER_PIXEL; + } + src_row_addr += src_line_stride; + dst_row_addr += dst_line_stride; + } + + return OPLERR_SUCCESS; +} + +static int opl_hmirror_u16_by2(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const u8 *src_row_addr; + const u8 *psrc; + u8 *dst_row_addr, *pdst; + int i, j; + u32 pixelsin, pixelsout; + + src_row_addr = src; + if (vmirror) { + dst_row_addr = dst + dst_line_stride * (height - 1); + dst_line_stride = -dst_line_stride; + } else + dst_row_addr = dst; + + /* Loop over all rows */ + for (i = 0; i < height; i++) { + /* Loop over each pixel */ + psrc = src_row_addr; + pdst = dst_row_addr + (width - 2) * BYTES_PER_PIXEL; + for (j = 0; j < (width >> 1); j++) { + pixelsin = *(u32 *) psrc; + pixelsout = rot_left_u32(pixelsin, 16); + *(u32 *) pdst = pixelsout; + psrc += BYTES_PER_2PIXEL; + pdst -= BYTES_PER_2PIXEL; + } + src_row_addr += src_line_stride; + dst_row_addr += dst_line_stride; + } + + return OPLERR_SUCCESS; +} + +static int opl_hmirror_u16_by4(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const u8 *src_row_addr; + const u8 *psrc; + u8 *dst_row_addr, *pdst; + int i, j; + + union doubleword { + u64 dw; + u32 w[2]; + }; + + union doubleword inbuf; + union doubleword outbuf; + + src_row_addr = src; + if (vmirror) { + dst_row_addr = dst + dst_line_stride * (height - 1); + dst_line_stride = -dst_line_stride; + } else + dst_row_addr = dst; + + /* Loop over all rows */ + for (i = 0; i < height; i++) { + /* Loop over each pixel */ + psrc = src_row_addr; + pdst = dst_row_addr + (width - 4) * BYTES_PER_PIXEL; + for (j = 0; j < (width >> 2); j++) { + inbuf.dw = *(u64 *) psrc; + outbuf.w[0] = rot_left_u32(inbuf.w[1], 16); + outbuf.w[1] = rot_left_u32(inbuf.w[0], 16); + *(u64 *) pdst = outbuf.dw; + psrc += BYTES_PER_4PIXEL; + pdst -= BYTES_PER_4PIXEL; + } + src_row_addr += src_line_stride; + dst_row_addr += dst_line_stride; + } + return OPLERR_SUCCESS; +} + +static int opl_hmirror_u16_by8(const u8 * src, int src_line_stride, int width, + int height, u8 * dst, int dst_line_stride, + int vmirror) +{ + const u8 *src_row_addr; + const u8 *psrc; + u8 *dst_row_addr, *pdst; + int i, j; + + src_row_addr = src; + if (vmirror) { + dst_row_addr = dst + dst_line_stride * (height - 1); + dst_line_stride = -dst_line_stride; + } else + dst_row_addr = dst; + + /* Loop over all rows */ + for (i = 0; i < height; i++) { + /* Loop over each pixel */ + psrc = src_row_addr; + pdst = dst_row_addr + (width - 1) * BYTES_PER_PIXEL - 2; + for (j = (width >> 3); j > 0; j--) { + __asm__ volatile ( + "ldmia %0!,{r2-r5}\n\t" + "mov r6, r2\n\t" + "mov r7, r3\n\t" + "mov r2, r5, ROR #16\n\t" + "mov r3, r4, ROR #16\n\t" + "mov r4, r7, ROR #16\n\t" + "mov r5, r6, ROR #16\n\t" + "stmda %1!,{r2-r5}\n\t" + + :"+r"(psrc), "+r"(pdst) + :"0"(psrc), "1"(pdst) + :"r2", "r3", "r4", "r5", "r6", "r7", + "memory" + ); + } + src_row_addr += src_line_stride; + dst_row_addr += dst_line_stride; + } + + return OPLERR_SUCCESS; +} + +EXPORT_SYMBOL(opl_hmirror_u16); +EXPORT_SYMBOL(opl_rotate180_u16); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/Makefile @@ -0,0 +1,5 @@ +opl-objs := opl_mod.o rotate90_u16.o rotate270_u16.o \ + rotate90_u16_qcif.o rotate270_u16_qcif.o \ + vmirror_u16.o hmirror_rotate180_u16.o + +obj-$(CONFIG_VIDEO_MXC_OPL) += opl.o --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/opl/vmirror_u16.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/opl/vmirror_u16.c @@ -0,0 +1,46 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include "opl.h" + +int opl_vmirror_u16(const u8 * src, int src_line_stride, int width, int height, + u8 * dst, int dst_line_stride) +{ + const u8 *src_row_addr; + u8 *dst_row_addr; + int i; + + if (!src || !dst) + return OPLERR_NULL_PTR; + + if (width == 0 || height == 0 || src_line_stride == 0 + || dst_line_stride == 0) + return OPLERR_BAD_ARG; + + src_row_addr = src; + dst_row_addr = dst + (height - 1) * dst_line_stride; + + /* Loop over all rows */ + for (i = 0; i < height; i++) { + /* memcpy each row */ + memcpy(dst_row_addr, src_row_addr, BYTES_PER_PIXEL * width); + src_row_addr += src_line_stride; + dst_row_addr -= dst_line_stride; + } + + return OPLERR_SUCCESS; +} + +EXPORT_SYMBOL(opl_vmirror_u16); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/emma_mt9v111.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/emma_mt9v111.c @@ -0,0 +1,679 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mt9v111.c + * + * @brief mt9v111 camera driver functions + * + * @ingroup Camera + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "mt9v111.h" + +#ifdef MT9V111_DEBUG +static u16 testpattern; +#endif + +static sensor_interface *interface_param; +static mt9v111_conf mt9v111_device; +static int reset_frame_rate = 30; + +#define MT9V111_FRAME_RATE_NUM 20 + +static mt9v111_image_format format[2] = { + { + .index = 0, + .width = 640, + .height = 480, + }, + { + .index = 1, + .width = 352, + .height = 288, + }, +}; + +static int mt9v111_attach(struct i2c_adapter *adapter); +static int mt9v111_detach(struct i2c_client *client); + +static struct i2c_driver mt9v111_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "MT9V111 Client", + }, + .attach_adapter = mt9v111_attach, + .detach_client = mt9v111_detach, +}; + +static struct i2c_client mt9v111_i2c_client = { + .name = "mt9v111 I2C dev", + .addr = MT9V111_I2C_ADDRESS, + .driver = &mt9v111_i2c_driver, +}; + +/* + * Function definitions + */ + +#ifdef MT9V111_DEBUG +static inline int mt9v111_read_reg(u8 reg) +{ + int val = i2c_smbus_read_word_data(&mt9v111_i2c_client, reg); + if (val != -1) + val = cpu_to_be16(val); + return val; +} +#endif + +static inline int mt9v111_write_reg(u8 reg, u16 val) +{ + pr_debug("write reg %x val %x.\n", reg, val); + return i2c_smbus_write_word_data(&mt9v111_i2c_client, reg, + cpu_to_be16(val)); +} + +/*! + * Initialize mt9v111_sensor_lib + * Libarary for Sensor configuration through I2C + * + * @param coreReg Core Registers + * @param ifpReg IFP Register + * + * @return status + */ +static u8 mt9v111_sensor_lib(mt9v111_coreReg * coreReg, mt9v111_IFPReg * ifpReg) +{ + u8 reg; + u16 data; + u8 error = 0; + + /* + * setup to IFP registers + */ + reg = MT9V111I_ADDR_SPACE_SEL; + data = ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + /* Operation Mode Control */ + reg = MT9V111I_MODE_CONTROL; + data = ifpReg->modeControl; + mt9v111_write_reg(reg, data); + + /* Output format */ + reg = MT9V111I_FORMAT_CONTROL; + data = ifpReg->formatControl; /* Set bit 12 */ + mt9v111_write_reg(reg, data); + + /* AE limit 4 */ + reg = MT9V111I_SHUTTER_WIDTH_LIMIT_AE; + data = ifpReg->gainLimitAE; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_OUTPUT_FORMAT_CTRL2; + data = ifpReg->outputFormatCtrl2; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_AE_SPEED; + data = ifpReg->AESpeed; + mt9v111_write_reg(reg, data); + + /* output image size */ + reg = MT9V111i_H_PAN; + data = 0x8000 | ifpReg->HPan; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_ZOOM; + data = 0x8000 | ifpReg->HZoom; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_SIZE; + data = 0x8000 | ifpReg->HSize; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_PAN; + data = 0x8000 | ifpReg->VPan; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_ZOOM; + data = 0x8000 | ifpReg->VZoom; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_SIZE; + data = 0x8000 | ifpReg->VSize; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_PAN; + data = ~0x8000 & ifpReg->HPan; + mt9v111_write_reg(reg, data); +#if 0 + reg = MT9V111I_UPPER_SHUTTER_DELAY_LIM; + data = ifpReg->upperShutterDelayLi; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_SHUTTER_60; + data = ifpReg->shutter_width_60; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_SEARCH_FLICK_60; + data = ifpReg->search_flicker_60; + mt9v111_write_reg(reg, data); +#endif + + /* + * setup to sensor core registers + */ + reg = MT9V111I_ADDR_SPACE_SEL; + data = coreReg->addressSelect; + mt9v111_write_reg(reg, data); + + /* enable changes and put the Sync bit on */ + reg = MT9V111S_OUTPUT_CTRL; + data = MT9V111S_OUTCTRL_SYNC | MT9V111S_OUTCTRL_CHIP_ENABLE | 0x3000; + mt9v111_write_reg(reg, data); + + /* min PIXCLK - Default */ + reg = MT9V111S_PIXEL_CLOCK_SPEED; + data = coreReg->pixelClockSpeed; + mt9v111_write_reg(reg, data); + + /* Setup image flipping / Dark rows / row/column skip */ + reg = MT9V111S_READ_MODE; + data = coreReg->readMode; + mt9v111_write_reg(reg, data); + + /*zoom 0 */ + reg = MT9V111S_DIGITAL_ZOOM; + data = coreReg->digitalZoom; + mt9v111_write_reg(reg, data); + + /* min H-blank */ + reg = MT9V111S_HOR_BLANKING; + data = coreReg->horizontalBlanking; + mt9v111_write_reg(reg, data); + + /* min V-blank */ + reg = MT9V111S_VER_BLANKING; + data = coreReg->verticalBlanking; + mt9v111_write_reg(reg, data); + + reg = MT9V111S_SHUTTER_WIDTH; + data = coreReg->shutterWidth; + mt9v111_write_reg(reg, data); + + reg = MT9V111S_SHUTTER_DELAY; + data = ifpReg->upperShutterDelayLi; + mt9v111_write_reg(reg, data); + + /* changes become effective */ + reg = MT9V111S_OUTPUT_CTRL; + data = MT9V111S_OUTCTRL_CHIP_ENABLE | 0x3000; + mt9v111_write_reg(reg, data); + + return error; +} + +/*! + * mt9v111 sensor interface Initialization + * @param param sensor_interface * + * @param width u32 + * @param height u32 + * @return None + */ +static void mt9v111_interface(sensor_interface *param, u32 width, u32 height) +{ + param->Vsync_pol = 0x0; + param->clk_mode = 0x0; /*gated */ + param->pixclk_pol = 0x0; + param->data_width = 0x1; + param->data_pol = 0x0; + param->ext_vsync = 0x0; + param->Vsync_pol = 0x0; + param->Hsync_pol = 0x0; + param->width = width - 1; + param->height = height - 1; + param->active_width = width; + param->active_height = height; + param->pixel_fmt = IPU_PIX_FMT_UYVY; + param->mclk = 27000000; +} + +/*! + * MT9V111 frame rate calculate + * + * @param frame_rate int * + * @param mclk int + * @return None + */ +static void mt9v111_rate_cal(int *frame_rate, int mclk) +{ + int num_clock_per_row; + int max_rate = 0; + + mt9v111_device.coreReg->horizontalBlanking = MT9V111_HORZBLANK_MIN; + + num_clock_per_row = (format[0].width + 114 + MT9V111_HORZBLANK_MIN) * 2; + max_rate = mclk / (num_clock_per_row * + (format[0].height + MT9V111_VERTBLANK_DEFAULT)); + + if ((*frame_rate > max_rate) || (*frame_rate == 0)) { + *frame_rate = max_rate; + } + + mt9v111_device.coreReg->verticalBlanking + = mclk / (*frame_rate * num_clock_per_row) - format[0].height; + + reset_frame_rate = *frame_rate; +} + +/*! + * MT9V111 sensor configuration + * + * @param frame_rate int * + * @param high_quality int + * @return sensor_interface * + */ +sensor_interface *mt9v111_config(int *frame_rate, int high_quality) +{ + u32 out_width, out_height; + + if (interface_param == NULL) + return NULL; + + mt9v111_device.coreReg->addressSelect = MT9V111I_SEL_SCA; + mt9v111_device.ifpReg->addrSpaceSel = MT9V111I_SEL_IFP; + + mt9v111_device.coreReg->windowHeight = MT9V111_WINHEIGHT; + mt9v111_device.coreReg->windowWidth = MT9V111_WINWIDTH; + mt9v111_device.coreReg->zoomColStart = 0; + mt9v111_device.coreReg->zomRowStart = 0; + mt9v111_device.coreReg->digitalZoom = 0x0; + + mt9v111_device.coreReg->verticalBlanking = MT9V111_VERTBLANK_DEFAULT; + mt9v111_device.coreReg->horizontalBlanking = MT9V111_HORZBLANK_MIN; + mt9v111_device.coreReg->pixelClockSpeed = 0; + mt9v111_device.coreReg->readMode = 0xd0a1; + + mt9v111_device.ifpReg->outputFormatCtrl2 = 0; + mt9v111_device.ifpReg->gainLimitAE = 0x300; + mt9v111_device.ifpReg->AESpeed = 0x80; + + /* here is the default value */ + mt9v111_device.ifpReg->formatControl = 0xc800; + mt9v111_device.ifpReg->modeControl = 0x708e; + mt9v111_device.ifpReg->awbSpeed = 0x4514; + mt9v111_device.coreReg->shutterWidth = 0xf8; + + out_width = 640; + out_height = 480; + + /*output size */ + mt9v111_device.ifpReg->HPan = 0; + mt9v111_device.ifpReg->HZoom = 640; + mt9v111_device.ifpReg->HSize = out_width; + mt9v111_device.ifpReg->VPan = 0; + mt9v111_device.ifpReg->VZoom = 480; + mt9v111_device.ifpReg->VSize = out_height; + + mt9v111_interface(interface_param, out_width, out_height); + set_mclk_rate(&interface_param->mclk); + mt9v111_rate_cal(frame_rate, interface_param->mclk); + mt9v111_sensor_lib(mt9v111_device.coreReg, mt9v111_device.ifpReg); + + return interface_param; +} + +/*! + * mt9v111 sensor set color configuration + * + * @param bright int + * @param saturation int + * @param red int + * @param green int + * @param blue int + * @return None + */ +static void +mt9v111_set_color(int bright, int saturation, int red, int green, int blue) +{ + u8 reg; + u16 data; + + switch (saturation) { + case 100: + mt9v111_device.ifpReg->awbSpeed = 0x4514; + break; + case 150: + mt9v111_device.ifpReg->awbSpeed = 0x6D14; + break; + case 75: + mt9v111_device.ifpReg->awbSpeed = 0x4D14; + break; + case 50: + mt9v111_device.ifpReg->awbSpeed = 0x5514; + break; + case 37: + mt9v111_device.ifpReg->awbSpeed = 0x5D14; + break; + case 25: + mt9v111_device.ifpReg->awbSpeed = 0x6514; + break; + default: + mt9v111_device.ifpReg->awbSpeed = 0x4514; + break; + } + + reg = MT9V111I_ADDR_SPACE_SEL; + data = mt9v111_device.ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + /* Operation Mode Control */ + reg = MT9V111I_AWB_SPEED; + data = mt9v111_device.ifpReg->awbSpeed; + mt9v111_write_reg(reg, data); +} + +/*! + * mt9v111 sensor get color configuration + * + * @param bright int * + * @param saturation int * + * @param red int * + * @param green int * + * @param blue int * + * @return None + */ +static void +mt9v111_get_color(int *bright, int *saturation, int *red, int *green, int *blue) +{ + *saturation = (mt9v111_device.ifpReg->awbSpeed & 0x3800) >> 11; + switch (*saturation) { + case 0: + *saturation = 100; + break; + case 1: + *saturation = 75; + break; + case 2: + *saturation = 50; + break; + case 3: + *saturation = 37; + break; + case 4: + *saturation = 25; + break; + case 5: + *saturation = 150; + break; + case 6: + *saturation = 0; + break; + default: + *saturation = 0; + break; + } +} + +/*! + * mt9v111 sensor set AE measurement window mode configuration + * + * @param ae_mode int + * @return None + */ +static void mt9v111_set_ae_mode(int ae_mode) +{ + u8 reg; + u16 data; + + mt9v111_device.ifpReg->modeControl &= 0xfff3; + mt9v111_device.ifpReg->modeControl |= (ae_mode & 0x03) << 2; + + reg = MT9V111I_ADDR_SPACE_SEL; + data = mt9v111_device.ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_MODE_CONTROL; + data = mt9v111_device.ifpReg->modeControl; + mt9v111_write_reg(reg, data); +} + +/*! + * mt9v111 sensor get AE measurement window mode configuration + * + * @param ae_mode int * + * @return None + */ +static void mt9v111_get_ae_mode(int *ae_mode) +{ + if (ae_mode != NULL) { + *ae_mode = (mt9v111_device.ifpReg->modeControl & 0xc) >> 2; + } +} + +/*! + * mt9v111 Reset function + * + * @return None + */ +static sensor_interface *mt9v111_reset(void) +{ + return mt9v111_config(&reset_frame_rate, 0); +} + +struct camera_sensor camera_sensor_if = { + .set_color = mt9v111_set_color, + .get_color = mt9v111_get_color, + .set_ae_mode = mt9v111_set_ae_mode, + .get_ae_mode = mt9v111_get_ae_mode, + .config = mt9v111_config, + .reset = mt9v111_reset, +}; + +#ifdef MT9V111_DEBUG +/*! + * Set sensor to test mode, which will generate test pattern. + * + * @return none + */ +static void mt9v111_test_pattern(bool flag) +{ + u16 data; + + /* switch to sensor registers */ + mt9v111_write_reg(MT9V111I_ADDR_SPACE_SEL, MT9V111I_SEL_SCA); + + if (flag == true) { + testpattern = MT9V111S_OUTCTRL_TEST_MODE; + + data = mt9v111_read_reg(MT9V111S_ROW_NOISE_CTRL) & 0xBF; + mt9v111_write_reg(MT9V111S_ROW_NOISE_CTRL, data); + + mt9v111_write_reg(MT9V111S_TEST_DATA, 0); + + /* changes take effect */ + data = MT9V111S_OUTCTRL_CHIP_ENABLE | testpattern | 0x3000; + mt9v111_write_reg(MT9V111S_OUTPUT_CTRL, data); + } else { + testpattern = 0; + + data = mt9v111_read_reg(MT9V111S_ROW_NOISE_CTRL) | 0x40; + mt9v111_write_reg(MT9V111S_ROW_NOISE_CTRL, data); + + /* changes take effect */ + data = MT9V111S_OUTCTRL_CHIP_ENABLE | testpattern | 0x3000; + mt9v111_write_reg(MT9V111S_OUTPUT_CTRL, data); + } +} +#endif + +/*! + * mt9v111 I2C detect_client function + * + * @param adapter struct i2c_adapter * + * @param address int + * @param kind int + * + * @return Error code indicating success or failure + */ +static int mt9v111_detect_client(struct i2c_adapter *adapter, int address, + int kind) +{ + mt9v111_i2c_client.adapter = adapter; + if (i2c_attach_client(&mt9v111_i2c_client)) { + mt9v111_i2c_client.adapter = NULL; + printk(KERN_ERR "mt9v111_attach: i2c_attach_client failed\n"); + return -1; + } + + interface_param = (sensor_interface *) + kmalloc(sizeof(sensor_interface), GFP_KERNEL); + if (!interface_param) { + printk(KERN_ERR "mt9v111_attach: kmalloc failed \n"); + return -1; + } + + printk(KERN_INFO "MT9V111 Detected\n"); + + return 0; +} + +static unsigned short normal_i2c[] = { MT9V111_I2C_ADDRESS, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +/*! + * mt9v111 I2C attach function + * + * @param adapter struct i2c_adapter * + * @return Error code indicating success or failure + */ +static int mt9v111_attach(struct i2c_adapter *adap) +{ + uint32_t mclk = 27000000; + struct clk *clk; + int err; + + clk = clk_get(NULL, "csi_clk"); + clk_enable(clk); + set_mclk_rate(&mclk); + + err = i2c_probe(adap, &addr_data, &mt9v111_detect_client); + + clk_disable(clk); + clk_put(clk); + + return err; +} + +/*! + * mt9v111 I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int mt9v111_detach(struct i2c_client *client) +{ + int err; + + if (!mt9v111_i2c_client.adapter) + return -1; + + err = i2c_detach_client(&mt9v111_i2c_client); + mt9v111_i2c_client.adapter = NULL; + + if (interface_param) + kfree(interface_param); + interface_param = NULL; + + return err; +} + +extern void gpio_sensor_active(void); + +/*! + * MT9V111 init function + * + * @return Error code indicating success or failure + */ +static __init int mt9v111_init(void) +{ + u8 err; + + gpio_sensor_active(); + + mt9v111_device.coreReg = (mt9v111_coreReg *) + kmalloc(sizeof(mt9v111_coreReg), GFP_KERNEL); + if (!mt9v111_device.coreReg) + return -1; + + memset(mt9v111_device.coreReg, 0, sizeof(mt9v111_coreReg)); + + mt9v111_device.ifpReg = (mt9v111_IFPReg *) + kmalloc(sizeof(mt9v111_IFPReg), GFP_KERNEL); + if (!mt9v111_device.ifpReg) { + kfree(mt9v111_device.coreReg); + mt9v111_device.coreReg = NULL; + return -1; + } + + memset(mt9v111_device.ifpReg, 0, sizeof(mt9v111_IFPReg)); + + err = i2c_add_driver(&mt9v111_i2c_driver); + + return err; +} + +extern void gpio_sensor_inactive(void); +/*! + * MT9V111 cleanup function + * + * @return Error code indicating success or failure + */ +static void __exit mt9v111_clean(void) +{ + if (mt9v111_device.coreReg) { + kfree(mt9v111_device.coreReg); + mt9v111_device.coreReg = NULL; + } + + if (mt9v111_device.ifpReg) { + kfree(mt9v111_device.ifpReg); + mt9v111_device.ifpReg = NULL; + } + + i2c_del_driver(&mt9v111_i2c_driver); + + gpio_sensor_inactive(); +} + +module_init(mt9v111_init); +module_exit(mt9v111_clean); + +/* Exported symbols for modules. */ +EXPORT_SYMBOL(camera_sensor_if); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Mt9v111 Camera Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_prp_vf_adc.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_prp_vf_adc.c @@ -0,0 +1,601 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_prp_vf_adc.c + * + * @brief IPU Use case for PRP-VF + * + * @ingroup IPU + */ + +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" +#include +#include +#include + +/* + * Function definitions + */ + +/*! + * prpvf_start - start the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_start(void *private) +{ + cam_data *cam = (cam_data *) private; + ipu_channel_params_t vf; + ipu_channel_params_t params; + u32 format = IPU_PIX_FMT_RGB565; + u32 size = 2; + int err = 0; + + if (!cam) { + printk(KERN_ERR "prpvf_start private is NULL\n"); + return -ENXIO; + } + + if (cam->overlay_active == true) { + printk(KERN_ERR "prpvf_start already start.\n"); + return 0; + } + + mxcfb_set_refresh_mode(cam->overlay_fb, MXCFB_REFRESH_OFF, 0); + + memset(&vf, 0, sizeof(ipu_channel_params_t)); + ipu_csi_get_window_size(&vf.csi_prp_vf_adc.in_width, + &vf.csi_prp_vf_adc.in_height); + vf.csi_prp_vf_adc.in_pixel_fmt = IPU_PIX_FMT_UYVY; + vf.csi_prp_vf_adc.out_width = cam->win.w.width; + vf.csi_prp_vf_adc.out_height = cam->win.w.height; + vf.csi_prp_vf_adc.graphics_combine_en = 0; + vf.csi_prp_vf_adc.out_left = cam->win.w.left; + + /* hope to be removed when those offset taken cared by adc driver. */ +#ifdef CONFIG_FB_MXC_EPSON_QVGA_PANEL + vf.csi_prp_vf_adc.out_left += 12; +#endif +#ifdef CONFIG_FB_MXC_EPSON_PANEL + vf.csi_prp_vf_adc.out_left += 2; +#endif + + vf.csi_prp_vf_adc.out_top = cam->win.w.top; + + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + vf.csi_prp_vf_adc.out_width = cam->win.w.height; + vf.csi_prp_vf_adc.out_height = cam->win.w.width; + + size = cam->win.w.width * cam->win.w.height * size; + vf.csi_prp_vf_adc.out_pixel_fmt = format; + err = ipu_init_channel(CSI_PRP_VF_MEM, &vf); + if (err != 0) + return err; + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, true, true); + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], + cam->vf_bufs[0]); + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], + cam->vf_bufs[1]); + } + cam->vf_bufs_size[0] = size; + cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0, + cam-> + vf_bufs_size + [0], + &cam-> + vf_bufs[0], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[0] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_3; + } + cam->vf_bufs_size[1] = size; + cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0, + cam-> + vf_bufs_size + [1], + &cam-> + vf_bufs[1], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[1] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_3; + } + + err = ipu_init_channel_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + IPU_ROTATE_NONE, + cam->vf_bufs[0], cam->vf_bufs[1], + 0, 0); + if (err != 0) + goto out_3; + + if (cam->rot_vf_bufs[0]) { + dma_free_coherent(0, cam->rot_vf_buf_size[0], + cam->rot_vf_bufs_vaddr[0], + cam->rot_vf_bufs[0]); + } + if (cam->rot_vf_bufs[1]) { + dma_free_coherent(0, cam->rot_vf_buf_size[1], + cam->rot_vf_bufs_vaddr[1], + cam->rot_vf_bufs[1]); + } + cam->rot_vf_buf_size[0] = PAGE_ALIGN(size); + cam->rot_vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0, + cam-> + rot_vf_buf_size + [0], + &cam-> + rot_vf_bufs + [0], + GFP_DMA | + GFP_KERNEL); + if (cam->rot_vf_bufs_vaddr[0] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate rot_vf_bufs\n"); + err = -ENOMEM; + goto out_3; + } + cam->rot_vf_buf_size[1] = PAGE_ALIGN(size); + cam->rot_vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0, + cam-> + rot_vf_buf_size + [1], + &cam-> + rot_vf_bufs + [1], + GFP_DMA | + GFP_KERNEL); + if (cam->rot_vf_bufs_vaddr[1] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate rot_vf_bufs\n"); + err = -ENOMEM; + goto out_3; + } + err = ipu_init_channel(MEM_ROT_VF_MEM, NULL); + if (err != 0) { + printk(KERN_ERR "prpvf_start :Error " + "MEM_ROT_VF_MEM channel\n"); + goto out_3; + } + + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_INPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + cam->vf_rotation, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "MEM_ROT_VF_MEM input buffer\n"); + goto out_2; + } + + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + IPU_ROTATE_NONE, + cam->rot_vf_bufs[0], + cam->rot_vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "MEM_ROT_VF_MEM output buffer\n"); + goto out_2; + } + + err = ipu_link_channels(CSI_PRP_VF_MEM, MEM_ROT_VF_MEM); + if (err < 0) { + printk(KERN_ERR "prpvf_start: Error " + "linking CSI_PRP_VF_MEM-MEM_ROT_VF_MEM\n"); + goto out_2; + } + + ipu_disable_channel(ADC_SYS2, false); + ipu_uninit_channel(ADC_SYS2); + + params.adc_sys2.disp = DISP0; + params.adc_sys2.ch_mode = WriteTemplateNonSeq; + params.adc_sys2.out_left = cam->win.w.left; + /* going to be removed when those offset taken cared by adc driver. */ +#ifdef CONFIG_FB_MXC_EPSON_QVGA_PANEL + params.adc_sys2.out_left += 12; +#endif +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.adc_sys2.out_left += 2; +#endif + params.adc_sys2.out_top = cam->win.w.top; + err = ipu_init_channel(ADC_SYS2, ¶ms); + if (err != 0) { + printk(KERN_ERR + "prpvf_start: Error initializing ADC SYS1\n"); + goto out_2; + } + + err = ipu_init_channel_buffer(ADC_SYS2, IPU_INPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + IPU_ROTATE_NONE, + cam->rot_vf_bufs[0], + cam->rot_vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "Error initializing ADC SYS1 buffer\n"); + goto out_1; + } + + err = ipu_link_channels(MEM_ROT_VF_MEM, ADC_SYS2); + if (err < 0) { + printk(KERN_ERR + "Error linking MEM_ROT_VF_MEM-ADC_SYS2\n"); + goto out_1; + } + + ipu_enable_channel(CSI_PRP_VF_MEM); + ipu_enable_channel(MEM_ROT_VF_MEM); + ipu_enable_channel(ADC_SYS2); + + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 1); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 1); + } +#ifndef CONFIG_MXC_IPU_PRP_VF_SDC + else if (cam->vf_rotation == IPU_ROTATE_NONE) { + vf.csi_prp_vf_adc.out_pixel_fmt = IPU_PIX_FMT_BGR32; + err = ipu_init_channel(CSI_PRP_VF_ADC, &vf); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing CSI_PRP_VF_ADC\n"); + return err; + } + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, true, true); + err = ipu_init_channel_buffer(CSI_PRP_VF_ADC, IPU_OUTPUT_BUFFER, + format, cam->win.w.width, + cam->win.w.height, + cam->win.w.width, IPU_ROTATE_NONE, + 0, 0, 0, 0); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing CSI_PRP_VF_MEM\n"); + return err; + } + ipu_enable_channel(CSI_PRP_VF_ADC); + } +#endif + else { + size = cam->win.w.width * cam->win.w.height * size; + vf.csi_prp_vf_adc.out_pixel_fmt = format; + err = ipu_init_channel(CSI_PRP_VF_MEM, &vf); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing CSI_PRP_VF_MEM\n"); + return err; + } + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, true, true); + + if (cam->vf_bufs[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], + cam->vf_bufs[0]); + } + if (cam->vf_bufs[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], + cam->vf_bufs[1]); + } + cam->vf_bufs_size[0] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0, + cam-> + vf_bufs_size + [0], + &cam-> + vf_bufs[0], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[0] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate vf_bufs\n"); + err = -ENOMEM; + goto out_3; + } + cam->vf_bufs_size[1] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0, + cam-> + vf_bufs_size + [1], + &cam-> + vf_bufs[1], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[1] == NULL) { + printk(KERN_ERR + "prpvf_start: Error to allocate vf_bufs\n"); + err = -ENOMEM; + goto out_3; + } + err = ipu_init_channel_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + cam->vf_rotation, + cam->vf_bufs[0], cam->vf_bufs[1], + 0, 0); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing CSI_PRP_VF_MEM\n"); + goto out_3; + } + + ipu_disable_channel(ADC_SYS2, false); + ipu_uninit_channel(ADC_SYS2); + + params.adc_sys2.disp = DISP0; + params.adc_sys2.ch_mode = WriteTemplateNonSeq; + params.adc_sys2.out_left = cam->win.w.left; + // going to be removed when those offset taken cared by adc driver. +#ifdef CONFIG_FB_MXC_EPSON_QVGA_PANEL + params.adc_sys2.out_left += 12; +#endif +#ifdef CONFIG_FB_MXC_EPSON_PANEL + params.adc_sys2.out_left += 2; +#endif + params.adc_sys2.out_top = cam->win.w.top; + err = ipu_init_channel(ADC_SYS2, ¶ms); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing ADC_SYS2\n"); + goto out_3; + } + + err = ipu_init_channel_buffer(ADC_SYS2, IPU_INPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + IPU_ROTATE_NONE, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "prpvf_start: Error " + "initializing ADC SYS1 buffer\n"); + goto out_1; + } + + err = ipu_link_channels(CSI_PRP_VF_MEM, ADC_SYS2); + if (err < 0) { + printk(KERN_ERR "prpvf_start: Error " + "linking MEM_ROT_VF_MEM-ADC_SYS2\n"); + goto out_1; + } + + ipu_enable_channel(CSI_PRP_VF_MEM); + ipu_enable_channel(ADC_SYS2); + + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 1); + } + + cam->overlay_active = true; + return err; + + out_1: + ipu_uninit_channel(ADC_SYS2); + out_2: + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + ipu_uninit_channel(MEM_ROT_VF_MEM); + } + out_3: + ipu_uninit_channel(CSI_PRP_VF_MEM); + if (cam->rot_vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_vf_buf_size[0], + cam->rot_vf_bufs_vaddr[0], + cam->rot_vf_bufs[0]); + cam->rot_vf_bufs_vaddr[0] = NULL; + cam->rot_vf_bufs[0] = 0; + } + if (cam->rot_vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_vf_buf_size[1], + cam->rot_vf_bufs_vaddr[1], + cam->rot_vf_bufs[1]); + cam->rot_vf_bufs_vaddr[1] = NULL; + cam->rot_vf_bufs[1] = 0; + } + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } + return err; +} + +/*! + * prpvf_stop - stop the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_stop(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + if (cam->overlay_active == false) + return 0; + + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + ipu_unlink_channels(CSI_PRP_VF_MEM, MEM_ROT_VF_MEM); + ipu_unlink_channels(MEM_ROT_VF_MEM, ADC_SYS2); + + ipu_disable_channel(CSI_PRP_VF_MEM, true); + ipu_disable_channel(MEM_ROT_VF_MEM, true); + ipu_disable_channel(ADC_SYS2, true); + + ipu_uninit_channel(CSI_PRP_VF_MEM); + ipu_uninit_channel(MEM_ROT_VF_MEM); + ipu_uninit_channel(ADC_SYS2); + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, false, false); + } +#ifndef CONFIG_MXC_IPU_PRP_VF_SDC + else if (cam->vf_rotation == IPU_ROTATE_NONE) { + ipu_disable_channel(CSI_PRP_VF_ADC, false); + ipu_uninit_channel(CSI_PRP_VF_ADC); + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, false, false); + } +#endif + else { + ipu_unlink_channels(CSI_PRP_VF_MEM, ADC_SYS2); + + ipu_disable_channel(CSI_PRP_VF_MEM, true); + ipu_disable_channel(ADC_SYS2, true); + + ipu_uninit_channel(CSI_PRP_VF_MEM); + ipu_uninit_channel(ADC_SYS2); + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, false, false); + } + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } + if (cam->rot_vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_vf_buf_size[0], + cam->rot_vf_bufs_vaddr[0], + cam->rot_vf_bufs[0]); + cam->rot_vf_bufs_vaddr[0] = NULL; + cam->rot_vf_bufs[0] = 0; + } + if (cam->rot_vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_vf_buf_size[1], + cam->rot_vf_bufs_vaddr[1], + cam->rot_vf_bufs[1]); + cam->rot_vf_bufs_vaddr[1] = NULL; + cam->rot_vf_bufs[1] = 0; + } + + cam->overlay_active = false; + + mxcfb_set_refresh_mode(cam->overlay_fb, MXCFB_REFRESH_PARTIAL, 0); + return err; +} + +/*! + * function to select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return status + */ +int prp_vf_adc_select(void *private) +{ + cam_data *cam; + if (private) { + cam = (cam_data *) private; + cam->vf_start_adc = prpvf_start; + cam->vf_stop_adc = prpvf_stop; + cam->overlay_active = false; + } else { + return -EIO; + } + return 0; +} + +/*! + * function to de-select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return status + */ +int prp_vf_adc_deselect(void *private) +{ + cam_data *cam; + int err = 0; + err = prpvf_stop(private); + + if (private) { + cam = (cam_data *) private; + cam->vf_start_adc = NULL; + cam->vf_stop_adc = NULL; + } + return err; +} + +/*! + * Init viewfinder task. + * + * @return Error code indicating success or failure + */ +__init int prp_vf_adc_init(void) +{ + return 0; +} + +/*! + * Deinit viewfinder task. + * + * @return Error code indicating success or failure + */ +void __exit prp_vf_adc_exit(void) +{ +} + +module_init(prp_vf_adc_init); +module_exit(prp_vf_adc_exit); + +EXPORT_SYMBOL(prp_vf_adc_select); +EXPORT_SYMBOL(prp_vf_adc_deselect); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IPU PRP VF ADC Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mx27_prpsw.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mx27_prpsw.c @@ -0,0 +1,1042 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_prpsw.c + * + * @brief MX27 Video For Linux 2 capture driver + * + * @ingroup MXC_V4L2_CAPTURE + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_capture.h" +#include "mx27_prp.h" +#include "mx27_csi.h" +#include "../drivers/video/mxc/mx2fb.h" +#include "../opl/opl.h" + +#define MEAN_COEF (SZ_COEF >> 1) + +static char prp_dev[] = "emma_prp"; +static int g_still_on = 0; +static emma_prp_cfg g_prp_cfg; +static int g_vfbuf, g_rotbuf; +static struct tasklet_struct prp_vf_tasklet; + +/* + * The following variables represents the virtual address for the cacheable + * buffers accessed by SW rotation/mirroring. The rotation/mirroring in + * cacheable buffers has significant performance improvement than it in + * non-cacheable buffers. + */ +static char *g_vaddr_vfbuf[2] = { 0, 0 }; +static char *g_vaddr_rotbuf[2] = { 0, 0 }; +static char *g_vaddr_fb = 0; + +static int set_ch1_addr(emma_prp_cfg * cfg, cam_data * cam); +static int prp_v4l2_cfg(emma_prp_cfg * cfg, cam_data * cam); +static int prp_vf_mem_alloc(cam_data * cam); +static void prp_vf_mem_free(cam_data * cam); +static int prp_rot_mem_alloc(cam_data * cam); +static void prp_rot_mem_free(cam_data * cam); +static int prp_enc_update_eba(u32 eba, int *buffer_num); +static int prp_enc_enable(void *private); +static int prp_enc_disable(void *private); +static int prp_vf_start(void *private); +static int prp_vf_stop(void *private); +static int prp_still_start(void *private); +static int prp_still_stop(void *private); +static irqreturn_t prp_isr(int irq, void *dev_id); +static void rotation(unsigned long private); +static int prp_resize_check_ch1(emma_prp_cfg * cfg); +static int prp_resize_check_ch2(emma_prp_cfg * cfg); + +#define PRP_DUMP(val) pr_debug("%s\t = 0x%08X\t%d\n", #val, val, val) + +/*! + * @brief Dump PrP configuration parameters. + * @param cfg The pointer to PrP configuration parameter + */ +static void prp_cfg_dump(emma_prp_cfg * cfg) +{ + PRP_DUMP(cfg->in_pix); + PRP_DUMP(cfg->in_width); + PRP_DUMP(cfg->in_height); + PRP_DUMP(cfg->in_csi); + PRP_DUMP(cfg->in_line_stride); + PRP_DUMP(cfg->in_line_skip); + PRP_DUMP(cfg->in_ptr); + + PRP_DUMP(cfg->ch1_pix); + PRP_DUMP(cfg->ch1_width); + PRP_DUMP(cfg->ch1_height); + PRP_DUMP(cfg->ch1_scale.algo); + PRP_DUMP(cfg->ch1_scale.width.num); + PRP_DUMP(cfg->ch1_scale.width.den); + PRP_DUMP(cfg->ch1_scale.height.num); + PRP_DUMP(cfg->ch1_scale.height.den); + PRP_DUMP(cfg->ch1_stride); + PRP_DUMP(cfg->ch1_ptr); + PRP_DUMP(cfg->ch1_ptr2); + PRP_DUMP(cfg->ch1_csi); + + PRP_DUMP(cfg->ch2_pix); + PRP_DUMP(cfg->ch2_width); + PRP_DUMP(cfg->ch2_height); + PRP_DUMP(cfg->ch2_scale.algo); + PRP_DUMP(cfg->ch2_scale.width.num); + PRP_DUMP(cfg->ch2_scale.width.den); + PRP_DUMP(cfg->ch2_scale.height.num); + PRP_DUMP(cfg->ch2_scale.height.den); + PRP_DUMP(cfg->ch2_ptr); + PRP_DUMP(cfg->ch2_ptr2); + PRP_DUMP(cfg->ch2_csi); +} + +/*! + * @brief Set PrP channel 1 output address. + * @param cfg Pointer to emma_prp_cfg structure + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int set_ch1_addr(emma_prp_cfg * cfg, cam_data * cam) +{ + if (cam->rotation != V4L2_MXC_ROTATE_NONE) { + cfg->ch1_ptr = (unsigned int)cam->rot_vf_bufs[0]; + cfg->ch1_ptr2 = (unsigned int)cam->rot_vf_bufs[1]; + if ((cam->rotation == V4L2_MXC_ROTATE_90_RIGHT) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_VFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_HFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_LEFT)) + cfg->ch1_stride = cam->win.w.height; + else + cfg->ch1_stride = cam->win.w.width; + + if (cam->v4l2_fb.flags != V4L2_FBUF_FLAG_OVERLAY) { + struct fb_info *fb = cam->overlay_fb; + if (!fb) + return -1; + if (g_vaddr_fb) + iounmap(g_vaddr_fb); + g_vaddr_fb = ioremap_cached(fb->fix.smem_start, + fb->fix.smem_len); + if (!g_vaddr_fb) + return -1; + } + } else if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + cfg->ch1_ptr = (unsigned int)cam->vf_bufs[0]; + cfg->ch1_ptr2 = (unsigned int)cam->vf_bufs[1]; + cfg->ch1_stride = cam->win.w.width; + } else { + struct fb_info *fb = cam->overlay_fb; + + if (!fb) + return -1; + + cfg->ch1_ptr = fb->fix.smem_start; + cfg->ch1_ptr += cam->win.w.top * fb->var.xres_virtual + * (fb->var.bits_per_pixel >> 3) + + cam->win.w.left * (fb->var.bits_per_pixel >> 3); + cfg->ch1_ptr2 = cfg->ch1_ptr; + cfg->ch1_stride = fb->var.xres_virtual; + } + + return 0; +} + +/*! + * @brief Setup PrP configuration parameters. + * @param cfg Pointer to emma_prp_cfg structure + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_v4l2_cfg(emma_prp_cfg * cfg, cam_data * cam) +{ + cfg->in_pix = PRP_PIXIN_YUYV; + cfg->in_width = cam->crop_current.width; + cfg->in_height = cam->crop_current.height; + cfg->in_line_stride = cam->crop_current.left; + cfg->in_line_skip = cam->crop_current.top; + cfg->in_ptr = 0; + cfg->in_csi = PRP_CSI_LOOP; + memset(cfg->in_csc, 0, sizeof(cfg->in_csc)); + + if (cam->overlay_on) { + /* Convert V4L2 pixel format to PrP pixel format */ + switch (cam->v4l2_fb.fmt.pixelformat) { + case V4L2_PIX_FMT_RGB332: + cfg->ch1_pix = PRP_PIX1_RGB332; + break; + case V4L2_PIX_FMT_RGB32: + case V4L2_PIX_FMT_BGR32: + cfg->ch1_pix = PRP_PIX1_RGB888; + break; + case V4L2_PIX_FMT_YUYV: + cfg->ch1_pix = PRP_PIX1_YUYV; + break; + case V4L2_PIX_FMT_UYVY: + cfg->ch1_pix = PRP_PIX1_UYVY; + break; + case V4L2_PIX_FMT_RGB565: + default: + cfg->ch1_pix = PRP_PIX1_RGB565; + break; + } + if ((cam->rotation == V4L2_MXC_ROTATE_90_RIGHT) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_VFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_HFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_LEFT)) { + cfg->ch1_width = cam->win.w.height; + cfg->ch1_height = cam->win.w.width; + } else { + cfg->ch1_width = cam->win.w.width; + cfg->ch1_height = cam->win.w.height; + } + + if (set_ch1_addr(cfg, cam)) + return -1; + } else { + cfg->ch1_pix = PRP_PIX1_UNUSED; + cfg->ch1_width = cfg->in_width; + cfg->ch1_height = cfg->in_height; + } + cfg->ch1_scale.algo = 0; + cfg->ch1_scale.width.num = cfg->in_width; + cfg->ch1_scale.width.den = cfg->ch1_width; + cfg->ch1_scale.height.num = cfg->in_height; + cfg->ch1_scale.height.den = cfg->ch1_height; + cfg->ch1_csi = PRP_CSI_EN; + + if (cam->capture_on || g_still_on) { + switch (cam->v2f.fmt.pix.pixelformat) { + case V4L2_PIX_FMT_YUYV: + cfg->ch2_pix = PRP_PIX2_YUV422; + break; + case V4L2_PIX_FMT_YUV420: + cfg->ch2_pix = PRP_PIX2_YUV420; + break; + /* + * YUV444 is not defined by V4L2. + * We support it in default case. + */ + default: + cfg->ch2_pix = PRP_PIX2_YUV444; + break; + } + cfg->ch2_width = cam->v2f.fmt.pix.width; + cfg->ch2_height = cam->v2f.fmt.pix.height; + } else { + cfg->ch2_pix = PRP_PIX2_UNUSED; + cfg->ch2_width = cfg->in_width; + cfg->ch2_height = cfg->in_height; + } + cfg->ch2_scale.algo = 0; + cfg->ch2_scale.width.num = cfg->in_width; + cfg->ch2_scale.width.den = cfg->ch2_width; + cfg->ch2_scale.height.num = cfg->in_height; + cfg->ch2_scale.height.den = cfg->ch2_height; + cfg->ch2_csi = PRP_CSI_EN; + + memset(cfg->scale, 0, sizeof(cfg->scale)); + cfg->scale[0].algo = cfg->ch1_scale.algo & 3; + cfg->scale[1].algo = (cfg->ch1_scale.algo >> 2) & 3; + cfg->scale[2].algo = cfg->ch2_scale.algo & 3; + cfg->scale[3].algo = (cfg->ch2_scale.algo >> 2) & 3; + + prp_cfg_dump(cfg); + + if (prp_resize_check_ch2(cfg)) + return -1; + + if (prp_resize_check_ch1(cfg)) + return -1; + + return 0; +} + +/*! + * @brief PrP interrupt handler + */ +static irqreturn_t prp_isr(int irq, void *dev_id) +{ + int status; + cam_data *cam = (cam_data *) dev_id; + + status = prphw_isr(); + + if (g_still_on && (status & PRP_INTRSTAT_CH2BUF1)) { + prp_still_stop(cam); + cam->still_counter++; + wake_up_interruptible(&cam->still_queue); + /* + * Still & video capture use the same PrP channel 2. + * They are execlusive. + */ + } else if (cam->capture_on) { + if (status & (PRP_INTRSTAT_CH2BUF1 | PRP_INTRSTAT_CH2BUF2)) { + cam->enc_callback(0, cam); + } + } + if (cam->overlay_on + && (status & (PRP_INTRSTAT_CH1BUF1 | PRP_INTRSTAT_CH1BUF2))) { + if (cam->rotation != V4L2_MXC_ROTATE_NONE) { + g_rotbuf = (status & PRP_INTRSTAT_CH1BUF1) ? 0 : 1; + tasklet_schedule(&prp_vf_tasklet); + } else if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + struct fb_gwinfo gwinfo; + + gwinfo.enabled = 1; + gwinfo.alpha_value = 255; + gwinfo.ck_enabled = 0; + gwinfo.xpos = cam->win.w.left; + gwinfo.ypos = cam->win.w.top; + gwinfo.xres = cam->win.w.width; + gwinfo.yres = cam->win.w.height; + gwinfo.xres_virtual = cam->win.w.width; + gwinfo.vs_reversed = 0; + if (status & PRP_INTRSTAT_CH1BUF1) + gwinfo.base = (unsigned long)cam->vf_bufs[0]; + else + gwinfo.base = (unsigned long)cam->vf_bufs[1]; + + mx2_gw_set(&gwinfo); + } + } + + return IRQ_HANDLED; +} + +/*! + * @brief PrP initialization. + * @param dev_id Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_init(void *dev_id) +{ + enable_irq(MXC_INT_EMMAPRP); + if (request_irq(MXC_INT_EMMAPRP, prp_isr, 0, prp_dev, dev_id)) + return -1; + prphw_init(); + + return 0; +} + +/*! + * @brief PrP initialization. + * @param dev_id Pointer to cam_data structure + */ +void prp_exit(void *dev_id) +{ + prphw_exit(); + disable_irq(MXC_INT_EMMAPRP); + free_irq(MXC_INT_EMMAPRP, dev_id); +} + +/*! + * @brief Update PrP channel 2 output buffer address. + * @param eba Physical address for PrP output buffer + * @param buffer_num The PrP channel 2 buffer number to be updated + * @return Zero on success, others on failure + */ +static int prp_enc_update_eba(u32 eba, int *buffer_num) +{ + if (*buffer_num) { + g_prp_cfg.ch2_ptr2 = eba; + prphw_ch2ptr2(&g_prp_cfg); + *buffer_num = 0; + } else { + g_prp_cfg.ch2_ptr = eba; + prphw_ch2ptr(&g_prp_cfg); + *buffer_num = 1; + } + + return 0; +} + +/*! + * @brief Enable PrP for encoding. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_enc_enable(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (prp_v4l2_cfg(&g_prp_cfg, cam)) + return -1; + + csi_enable_mclk(CSI_MCLK_ENC, true, true); + prphw_reset(); + + if (prphw_cfg(&g_prp_cfg)) + return -1; + + prphw_enable(cam->overlay_on ? (PRP_CHANNEL_1 | PRP_CHANNEL_2) + : PRP_CHANNEL_2); + + return 0; +} + +/*! + * @brief Disable PrP for encoding. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_enc_disable(void *private) +{ + prphw_disable(PRP_CHANNEL_2); + csi_enable_mclk(CSI_MCLK_ENC, false, false); + + return 0; +} + +/*! + * @brief Setup encoding functions. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_enc_select(void *private) +{ + int ret = 0; + cam_data *cam = (cam_data *) private; + + if (cam) { + cam->enc_update_eba = prp_enc_update_eba; + cam->enc_enable = prp_enc_enable; + cam->enc_disable = prp_enc_disable; + } else + ret = -EIO; + + return ret; +} + +/*! + * @brief Uninstall encoding functions. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_enc_deselect(void *private) +{ + int ret = 0; + cam_data *cam = (cam_data *) private; + + ret = prp_enc_disable(private); + + if (cam) { + cam->enc_update_eba = NULL; + cam->enc_enable = NULL; + cam->enc_disable = NULL; + } + + return ret; +} + +/*! + * @brief Allocate memory for overlay. + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_vf_mem_alloc(cam_data * cam) +{ + int i; + + for (i = 0; i < 2; i++) { + cam->vf_bufs_size[i] = cam->win.w.width * cam->win.w.height * 2; + cam->vf_bufs_vaddr[i] = dma_alloc_coherent(0, + cam->vf_bufs_size[i], + &cam->vf_bufs[i], + GFP_DMA | + GFP_KERNEL); + if (!cam->vf_bufs_vaddr[i]) { + pr_debug("Failed to alloc memory for vf.\n"); + prp_vf_mem_free(cam); + return -1; + } + + g_vaddr_vfbuf[i] = + ioremap_cached(cam->vf_bufs[i], cam->vf_bufs_size[i]); + if (!g_vaddr_vfbuf[i]) { + pr_debug("Failed to ioremap_cached() for vf.\n"); + prp_vf_mem_free(cam); + return -1; + } + } + + return 0; +} + +/*! + * @brief Free memory for overlay. + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static void prp_vf_mem_free(cam_data * cam) +{ + int i; + + for (i = 0; i < 2; i++) { + if (cam->vf_bufs_vaddr[i]) { + dma_free_coherent(0, + cam->vf_bufs_size[i], + cam->vf_bufs_vaddr[i], + cam->vf_bufs[i]); + } + cam->vf_bufs[i] = 0; + cam->vf_bufs_vaddr[i] = 0; + cam->vf_bufs_size[i] = 0; + if (g_vaddr_vfbuf[i]) { + iounmap(g_vaddr_vfbuf[i]); + g_vaddr_vfbuf[i] = 0; + } + } +} + +/*! + * @brief Allocate intermediate memory for overlay rotation/mirroring. + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_rot_mem_alloc(cam_data * cam) +{ + int i; + + for (i = 0; i < 2; i++) { + cam->rot_vf_buf_size[i] = + cam->win.w.width * cam->win.w.height * 2; + cam->rot_vf_bufs_vaddr[i] = + dma_alloc_coherent(0, cam->rot_vf_buf_size[i], + &cam->rot_vf_bufs[i], + GFP_DMA | GFP_KERNEL); + if (!cam->rot_vf_bufs_vaddr[i]) { + pr_debug("Failed to alloc memory for vf rotation.\n"); + prp_rot_mem_free(cam); + return -1; + } + + g_vaddr_rotbuf[i] = + ioremap_cached(cam->rot_vf_bufs[i], + cam->rot_vf_buf_size[i]); + if (!g_vaddr_rotbuf[i]) { + pr_debug + ("Failed to ioremap_cached() for rotation buffer.\n"); + prp_rot_mem_free(cam); + return -1; + } + } + + return 0; +} + +/*! + * @brief Free intermedaite memory for overlay rotation/mirroring. + * @param cam Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static void prp_rot_mem_free(cam_data * cam) +{ + int i; + + for (i = 0; i < 2; i++) { + if (cam->rot_vf_bufs_vaddr[i]) { + dma_free_coherent(0, + cam->rot_vf_buf_size[i], + cam->rot_vf_bufs_vaddr[i], + cam->rot_vf_bufs[i]); + } + cam->rot_vf_bufs[i] = 0; + cam->rot_vf_bufs_vaddr[i] = 0; + cam->rot_vf_buf_size[i] = 0; + if (g_vaddr_rotbuf[i]) { + iounmap(g_vaddr_rotbuf[i]); + g_vaddr_rotbuf[i] = 0; + } + } +} + +/*! + * @brief Start overlay (view finder). + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_vf_start(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + prp_vf_mem_free(cam); + if (prp_vf_mem_alloc(cam)) { + pr_info("Error to allocate vf buffer\n"); + return -ENOMEM; + } + } + + if (cam->rotation != V4L2_MXC_ROTATE_NONE) { + prp_rot_mem_free(cam); + if (prp_rot_mem_alloc(cam)) { + pr_info("Error to allocate rotation buffer\n"); + prp_vf_mem_free(cam); + return -ENOMEM; + } + } + + if (prp_v4l2_cfg(&g_prp_cfg, cam)) { + prp_vf_mem_free(cam); + prp_rot_mem_free(cam); + return -1; + } + + csi_enable_mclk(CSI_MCLK_VF, true, true); + prphw_reset(); + + if (prphw_cfg(&g_prp_cfg)) { + prp_vf_mem_free(cam); + prp_rot_mem_free(cam); + return -1; + } + g_vfbuf = g_rotbuf = 0; + tasklet_init(&prp_vf_tasklet, rotation, (unsigned long)private); + + prphw_enable(cam->capture_on ? (PRP_CHANNEL_1 | PRP_CHANNEL_2) + : PRP_CHANNEL_1); + + return 0; +} + +/*! + * @brief Stop overlay (view finder). + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_vf_stop(void *private) +{ + cam_data *cam = (cam_data *) private; + + prphw_disable(PRP_CHANNEL_1); + + csi_enable_mclk(CSI_MCLK_VF, false, false); + tasklet_kill(&prp_vf_tasklet); + + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + struct fb_gwinfo gwinfo; + + /* Disable graphic window */ + gwinfo.enabled = 0; + mx2_gw_set(&gwinfo); + + prp_vf_mem_free(cam); + } + prp_rot_mem_free(cam); + if (g_vaddr_fb) { + iounmap(g_vaddr_fb); + g_vaddr_fb = 0; + } + + return 0; +} + +/*! + * @brief Setup overlay functions. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_vf_select(void *private) +{ + int ret = 0; + cam_data *cam = (cam_data *) private; + + if (cam) { + cam->vf_start_sdc = prp_vf_start; + cam->vf_stop_sdc = prp_vf_stop; + cam->overlay_active = false; + } else + ret = -EIO; + + return ret; +} + +/*! + * @brief Uninstall overlay functions. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_vf_deselect(void *private) +{ + int ret = 0; + cam_data *cam = (cam_data *) private; + + ret = prp_vf_stop(private); + + if (cam) { + cam->vf_start_sdc = NULL; + cam->vf_stop_sdc = NULL; + } + + return ret; +} + +/*! + * @brief Start still picture capture. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_still_start(void *private) +{ + cam_data *cam = (cam_data *) private; + + g_still_on = 1; + g_prp_cfg.ch2_ptr = (unsigned int)cam->still_buf; + g_prp_cfg.ch2_ptr2 = 0; + + if (prp_v4l2_cfg(&g_prp_cfg, cam)) + return -1; + + csi_enable_mclk(CSI_MCLK_RAW, true, true); + prphw_reset(); + + if (prphw_cfg(&g_prp_cfg)) { + g_still_on = 0; + return -1; + } + + prphw_enable(cam->overlay_on ? (PRP_CHANNEL_1 | PRP_CHANNEL_2) + : PRP_CHANNEL_2); + + return 0; +} + +/*! + * @brief Stop still picture capture. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +static int prp_still_stop(void *private) +{ + prphw_disable(PRP_CHANNEL_2); + + csi_enable_mclk(CSI_MCLK_RAW, false, false); + + g_still_on = 0; + + return 0; +} + +/*! + * @brief Setup functions for still picture capture. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_still_select(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (cam) { + cam->csi_start = prp_still_start; + cam->csi_stop = prp_still_stop; + } + + return 0; +} + +/*! + * @brief Uninstall functions for still picture capture. + * @param private Pointer to cam_data structure + * @return Zero on success, others on failure + */ +int prp_still_deselect(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + err = prp_still_stop(cam); + + if (cam) { + cam->csi_start = NULL; + cam->csi_stop = NULL; + } + + return err; +} + +/*! + * @brief Perform software rotation or mirroring + * @param private Argument passed to the tasklet + */ +static void rotation(unsigned long private) +{ + char *src, *dst; + int width, height, s_stride, d_stride; + int size; + cam_data *cam = (cam_data *) private; + + src = g_vaddr_rotbuf[g_rotbuf]; + size = cam->rot_vf_buf_size[g_rotbuf]; + + if ((cam->rotation == V4L2_MXC_ROTATE_90_RIGHT) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_VFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_HFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_LEFT)) { + width = cam->win.w.height; + height = cam->win.w.width; + s_stride = cam->win.w.height << 1; + } else { + width = cam->win.w.width; + height = cam->win.w.height; + s_stride = cam->win.w.width << 1; + } + + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + dst = g_vaddr_vfbuf[g_vfbuf]; + d_stride = cam->win.w.width << 1; + } else { /* The destination is the framebuffer */ + struct fb_info *fb = cam->overlay_fb; + if (!fb) + return; + dst = g_vaddr_fb; + dst += cam->win.w.top * fb->var.xres_virtual + * (fb->var.bits_per_pixel >> 3) + + cam->win.w.left * (fb->var.bits_per_pixel >> 3); + d_stride = fb->var.xres_virtual << 1; + } + + /* + * Invalidate the data in cache before performing the SW rotaion + * or mirroring in case the image size is less than QVGA. For image + * larger than QVGA it is not invalidated becase the invalidation + * will consume much time while we don't see any artifacts on the + * output if we don't perform invalidation for them. + * Similarly we don't flush the data after SW rotation/mirroring. + */ + if (size < 320 * 240 * 2) + dmac_inv_range(src, src + size); + switch (cam->rotation) { + case V4L2_MXC_ROTATE_VERT_FLIP: + opl_vmirror_u16(src, s_stride, width, height, dst, d_stride); + break; + case V4L2_MXC_ROTATE_HORIZ_FLIP: + opl_hmirror_u16(src, s_stride, width, height, dst, d_stride); + break; + case V4L2_MXC_ROTATE_180: + opl_rotate180_u16(src, s_stride, width, height, dst, d_stride); + break; + case V4L2_MXC_ROTATE_90_RIGHT: + opl_rotate90_u16(src, s_stride, width, height, dst, d_stride); + break; + case V4L2_MXC_ROTATE_90_RIGHT_VFLIP: + opl_rotate90_vmirror_u16(src, s_stride, width, height, dst, + d_stride); + break; + case V4L2_MXC_ROTATE_90_RIGHT_HFLIP: + /* ROTATE_90_RIGHT_HFLIP = ROTATE_270_RIGHT_VFLIP */ + opl_rotate270_vmirror_u16(src, s_stride, width, height, dst, + d_stride); + break; + case V4L2_MXC_ROTATE_90_LEFT: + opl_rotate270_u16(src, s_stride, width, height, dst, d_stride); + break; + default: + return; + } + + /* Config and display the graphic window */ + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) { + struct fb_gwinfo gwinfo; + + gwinfo.enabled = 1; + gwinfo.alpha_value = 255; + gwinfo.ck_enabled = 0; + gwinfo.xpos = cam->win.w.left; + gwinfo.ypos = cam->win.w.top; + gwinfo.xres = cam->win.w.width; + gwinfo.yres = cam->win.w.height; + gwinfo.xres_virtual = cam->win.w.width; + gwinfo.vs_reversed = 0; + gwinfo.base = (unsigned long)cam->vf_bufs[g_vfbuf]; + mx2_gw_set(&gwinfo); + + g_vfbuf = g_vfbuf ? 0 : 1; + } +} + +/* + * @brief Check if the resize ratio is supported based on the input and output + * dimension + * @param input input dimension + * @param output output dimension + * @return output dimension (should equal the parameter *output*) + * -1 on failure + */ +static int check_simple(scale_t * scale, int input, int output) +{ + unsigned short int_out; /* PrP internel width or height */ + unsigned short orig_out = output; + + if (prp_scale(scale, input, output, input, &orig_out, &int_out, 0)) + return -1; /* resize failed */ + else + return int_out; +} + +/* + * @brief Check if the resize ratio is supported based on the input and output + * dimension + * @param input input dimension + * @param output output dimension + * @return output dimension, may be rounded. + * -1 on failure + */ +static int check_simple_retry(scale_t * scale, int input, int output) +{ + unsigned short int_out; /* PrP internel width or height */ + unsigned short orig_out = output; + + if (prp_scale(scale, input, output, input, &orig_out, &int_out, + SCALE_RETRY)) + return -1; /* resize failed */ + else + return int_out; +} + +/*! + * @brief Check if the resize ratio is supported by PrP channel 1 + * @param cfg Pointer to emma_prp_cfg structure + * @return Zero on success, others on failure + */ +static int prp_resize_check_ch1(emma_prp_cfg * cfg) +{ + int in_w, in_h, ch1_w, ch1_h, ch2_w, ch2_h, w, h; + scale_t *pscale = &cfg->scale[0]; /* Ch1 width resize coeff */ + + if (cfg->ch1_pix == PRP_PIX1_UNUSED) + return 0; + + in_w = cfg->in_width; + in_h = cfg->in_height; + ch1_w = cfg->ch1_width; + ch1_h = cfg->ch1_height; + ch2_w = cfg->ch2_width; + ch2_h = cfg->ch2_height; + + /* + * For channel 1, try parallel resize first. If the resize + * ratio is not exactly supported, try cascade resize. If it + * still fails, use parallel resize but with rounded value. + */ + w = check_simple(pscale, in_w, ch1_w); + h = check_simple(pscale + 1, in_h, ch1_h); + if ((w == ch1_w) && (h == ch1_h)) + goto exit_parallel; + + if (cfg->ch2_pix != PRP_PIX2_UNUSED) { + /* + * Channel 2 is already used. The pscale is still pointing + * to ch1 resize coeff for temporary use. + */ + w = check_simple(pscale, in_w, ch2_w); + h = check_simple(pscale + 1, in_h, ch2_h); + if ((w == ch2_w) && (h == ch2_h)) { + /* Try cascade resize now */ + w = check_simple(pscale, ch2_w, ch1_w); + h = check_simple(pscale + 1, ch2_h, ch1_h); + if ((w == ch1_w) && (h == ch1_h)) + goto exit_cascade; + } + } else { + /* + * Try cascade resize for width, width is multiple of 2. + * Channel 2 is not used. So we have more values to pick + * for channel 2 resize. + */ + for (w = in_w - 2; w > ch1_w; w -= 2) { + /* Ch2 width resize */ + if (check_simple(pscale + 2, in_w, w) != w) + continue; + /* Ch1 width resize */ + if (check_simple(pscale, w, ch1_w) != ch1_w) + continue; + break; + } + if ((ch2_w = w) > ch1_w) { + /* try cascade resize for height */ + for (h = in_h - 1; h > ch1_h; h--) { + /* Ch2 height resize */ + if (check_simple(pscale + 3, in_h, h) != h) + continue; + /* Ch1 height resize */ + if (check_simple(pscale + 1, h, ch1_h) != ch1_h) + continue; + break; + } + if ((ch2_h = h) > ch1_h) + goto exit_cascade; + } + } + + /* Have to try parallel resize again and round the dimensions */ + w = check_simple_retry(pscale, in_w, ch1_w); + h = check_simple_retry(pscale + 1, in_h, ch1_h); + if ((w != -1) && (h != -1)) + goto exit_parallel; + + pr_debug("Ch1 resize error.\n"); + return -1; + + exit_parallel: + cfg->ch1_scale.algo |= PRP_ALGO_BYPASS; + pr_debug("ch1 parallel resize.\n"); + pr_debug("original width = %d internel width = %d\n", ch1_w, w); + pr_debug("original height = %d internel height = %d\n", ch1_h, h); + return 0; + + exit_cascade: + cfg->ch1_scale.algo &= ~PRP_ALGO_BYPASS; + pr_debug("ch1 cascade resize.\n"); + pr_debug("[width] in : ch2 : ch1=%d : %d : %d\n", in_w, ch2_w, ch1_w); + pr_debug("[height] in : ch2 : ch1=%d : %d : %d\n", in_h, ch2_h, ch1_h); + return 0; +} + +/*! + * @brief Check if the resize ratio is supported by PrP channel 2 + * @param cfg Pointer to emma_prp_cfg structure + * @return Zero on success, others on failure + */ +static int prp_resize_check_ch2(emma_prp_cfg * cfg) +{ + int w, h; + scale_t *pscale = &cfg->scale[2]; /* Ch2 width resize coeff */ + + if (cfg->ch2_pix == PRP_PIX2_UNUSED) + return 0; + + w = check_simple_retry(pscale, cfg->in_width, cfg->ch2_width); + h = check_simple_retry(pscale + 1, cfg->in_height, cfg->ch2_height); + if ((w != -1) && (h != -1)) { + pr_debug("Ch2 resize.\n"); + pr_debug("Original width = %d internel width = %d\n", + cfg->ch2_width, w); + pr_debug("Original height = %d internel height = %d\n", + cfg->ch2_height, h); + return 0; + } else { + pr_debug("Ch2 resize error.\n"); + return -1; + } +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mx27_csi.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mx27_csi.c @@ -0,0 +1,333 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_csi.c + * + * @brief CMOS Sensor interface functions + * + * @ingroup CSI + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mx27_csi.h" + +static csi_config_t g_csi_cfg; /* csi hardware configuration */ +static bool gcsi_mclk_on = false; +static csi_irq_callback_t g_callback = 0; +static void *g_callback_data = 0; +static struct clk csi_mclk; + +static irqreturn_t csi_irq_handler(int irq, void *data) +{ + unsigned long status = __raw_readl(CSI_CSISR); + + __raw_writel(status, CSI_CSISR); + if (g_callback) + g_callback(g_callback_data, status); + + pr_debug("CSI status = 0x%08lX\n", status); + + return IRQ_HANDLED; +} + +static void csihw_set_config(csi_config_t * cfg) +{ + unsigned val = 0; + + /* control reg 1 */ + val |= cfg->swap16_en ? BIT_SWAP16_EN : 0; + val |= cfg->ext_vsync ? BIT_EXT_VSYNC : 0; + val |= cfg->eof_int_en ? BIT_EOF_INT_EN : 0; + val |= cfg->prp_if_en ? BIT_PRP_IF_EN : 0; + val |= cfg->ccir_mode ? BIT_CCIR_MODE : 0; + val |= cfg->cof_int_en ? BIT_COF_INT_EN : 0; + val |= cfg->sf_or_inten ? BIT_SF_OR_INTEN : 0; + val |= cfg->rf_or_inten ? BIT_RF_OR_INTEN : 0; + val |= cfg->statff_level << SHIFT_STATFF_LEVEL; + val |= cfg->staff_inten ? BIT_STATFF_INTEN : 0; + val |= cfg->rxff_level << SHIFT_RXFF_LEVEL; + val |= cfg->rxff_inten ? BIT_RXFF_INTEN : 0; + val |= cfg->sof_pol ? BIT_SOF_POL : 0; + val |= cfg->sof_inten ? BIT_SOF_INTEN : 0; + val |= cfg->mclkdiv << SHIFT_MCLKDIV; + val |= cfg->hsync_pol ? BIT_HSYNC_POL : 0; + val |= cfg->ccir_en ? BIT_CCIR_EN : 0; + val |= cfg->mclken ? BIT_MCLKEN : 0; + val |= cfg->fcc ? BIT_FCC : 0; + val |= cfg->pack_dir ? BIT_PACK_DIR : 0; + val |= cfg->gclk_mode ? BIT_GCLK_MODE : 0; + val |= cfg->inv_data ? BIT_INV_DATA : 0; + val |= cfg->inv_pclk ? BIT_INV_PCLK : 0; + val |= cfg->redge ? BIT_REDGE : 0; + + __raw_writel(val, CSI_CSICR1); + + /* control reg 3 */ + val = 0x0; + val |= cfg->csi_sup ? BIT_CSI_SUP : 0; + val |= cfg->zero_pack_en ? BIT_ZERO_PACK_EN : 0; + val |= cfg->ecc_int_en ? BIT_ECC_INT_EN : 0; + val |= cfg->ecc_auto_en ? BIT_ECC_AUTO_EN : 0; + + __raw_writel(val, CSI_CSICR3); + + /* rxfifo counter */ + __raw_writel(cfg->rxcnt, CSI_CSIRXCNT); + + /* update global config */ + memcpy(&g_csi_cfg, cfg, sizeof(csi_config_t)); +} + +static void csihw_reset_frame_count(void) +{ + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_FRMCNT_RST, CSI_CSICR3); +} + +static void csihw_reset(void) +{ + csihw_reset_frame_count(); + __raw_writel(CSICR1_RESET_VAL, CSI_CSICR1); + __raw_writel(CSICR2_RESET_VAL, CSI_CSICR2); + __raw_writel(CSICR3_RESET_VAL, CSI_CSICR3); +} + +/*! + * csi_init_interface + * Sets initial values for the CSI registers. + * The width and height of the sensor and the actual frame size will be + * set to the same values. + * @param width Sensor width + * @param height Sensor height + * @param pixel_fmt pixel format + * @param sig csi_signal_cfg_t + * + * @return 0 for success, -EINVAL for error + */ +int32_t csi_init_interface(uint16_t width, uint16_t height, + uint32_t pixel_fmt, csi_signal_cfg_t sig) +{ + csi_config_t cfg; + + /* Set the CSI_SENS_CONF register remaining fields */ + cfg.swap16_en = 1; + cfg.ext_vsync = sig.ext_vsync; + cfg.eof_int_en = 0; + cfg.prp_if_en = 1; + cfg.ccir_mode = 0; + cfg.cof_int_en = 0; + cfg.sf_or_inten = 0; + cfg.rf_or_inten = 0; + cfg.statff_level = 0; + cfg.staff_inten = 0; + cfg.rxff_level = 2; + cfg.rxff_inten = 0; + cfg.sof_pol = 1; + cfg.sof_inten = 0; + cfg.mclkdiv = 0; + cfg.hsync_pol = 1; + cfg.ccir_en = 0; + cfg.mclken = gcsi_mclk_on ? 1 : 0; + cfg.fcc = 1; + cfg.pack_dir = 0; + cfg.gclk_mode = 1; + cfg.inv_data = sig.data_pol; + cfg.inv_pclk = sig.pixclk_pol; + cfg.redge = 1; + cfg.csicnt1_rsv = 0; + + /* control reg 3 */ + cfg.frmcnt = 0; + cfg.frame_reset = 0; + cfg.csi_sup = 0; + cfg.zero_pack_en = 0; + cfg.ecc_int_en = 0; + cfg.ecc_auto_en = 0; + + csihw_set_config(&cfg); + + return 0; +} + +/*! + * csi_enable_prpif + * Enable or disable CSI-PrP interface + * @param enable Non-zero to enable, zero to disable + */ +void csi_enable_prpif(uint32_t enable) +{ + if (enable) { + g_csi_cfg.prp_if_en = 1; + g_csi_cfg.sof_inten = 0; + g_csi_cfg.pack_dir = 0; + } else { + g_csi_cfg.prp_if_en = 0; + g_csi_cfg.sof_inten = 1; + g_csi_cfg.pack_dir = 1; + } + + csihw_set_config(&g_csi_cfg); +} + +/*! + * csi_enable_mclk + * + * @param src enum define which source to control the clk + * CSI_MCLK_VF CSI_MCLK_ENC CSI_MCLK_RAW CSI_MCLK_I2C + * @param flag true to enable mclk, false to disable mclk + * @param wait true to wait 100ms make clock stable, false not wait + * + * @return 0 for success + */ +int32_t csi_enable_mclk(int src, bool flag, bool wait) +{ + if (flag == true) { + clk_enable(&csi_mclk); + if (wait == true) + msleep(10); + pr_debug("Enable csi clock from source %d\n", src); + gcsi_mclk_on = true; + } else { + clk_disable(&csi_mclk); + pr_debug("Disable csi clock from source %d\n", src); + gcsi_mclk_on = false; + } + + return 0; +} + +/*! + * csi_read_mclk_flag + * + * @return gcsi_mclk_source + */ +int csi_read_mclk_flag(void) +{ + return 0; +} + +void csi_set_callback(csi_irq_callback_t callback, void *data) +{ + g_callback = callback; + g_callback_data = data; +} + +static void _mclk_recalc(struct clk *clk) +{ + u32 div; + + div = (__raw_readl(CSI_CSICR1) & BIT_MCLKDIV) >> SHIFT_MCLKDIV; + div = (div + 1) * 2; + + clk->rate = clk->parent->rate / div; +} + +static unsigned long _mclk_round_rate(struct clk *clk, unsigned long rate) +{ + /* Keep CSI divider and change parent clock */ + if (clk->parent->round_rate) { + return clk->parent->round_rate(clk->parent, rate * 2); + } + return 0; +} + +static int _mclk_set_rate(struct clk *clk, unsigned long rate) +{ + int ret = -EINVAL; + + /* Keep CSI divider and change parent clock */ + if (clk->parent->set_rate) { + ret = clk->parent->set_rate(clk->parent, rate * 2); + if (ret == 0) { + clk->rate = clk->parent->rate / 2; + } + } + + return ret; +} + +static int _mclk_enable(struct clk *clk) +{ + __raw_writel(__raw_readl(CSI_CSICR1) | BIT_MCLKEN, CSI_CSICR1); + return 0; +} + +static void _mclk_disable(struct clk *clk) +{ + __raw_writel(__raw_readl(CSI_CSICR1) & ~BIT_MCLKEN, CSI_CSICR1); +} + +static struct clk csi_mclk = { + .name = "csi_clk", + .recalc = _mclk_recalc, + .round_rate = _mclk_round_rate, + .set_rate = _mclk_set_rate, + .enable = _mclk_enable, + .disable = _mclk_disable, +}; + +int32_t __init csi_init_module(void) +{ + int ret = 0; + struct clk *per_clk; + + per_clk = clk_get(NULL, "csi_perclk"); + if (IS_ERR(per_clk)) + return PTR_ERR(per_clk); + clk_put(per_clk); + csi_mclk.parent = per_clk; + clk_register(&csi_mclk); + clk_enable(per_clk); + csi_mclk.recalc(&csi_mclk); + + csihw_reset(); + + /* interrupt enable */ + ret = request_irq(MXC_INT_CSI, csi_irq_handler, 0, "csi", 0); + if (ret) + pr_debug("CSI error: irq request fail\n"); + + return ret; +} + +void __exit csi_cleanup_module(void) +{ + /* free irq */ + free_irq(MXC_INT_CSI, 0); + + clk_disable(&csi_mclk); +} + +module_init(csi_init_module); +module_exit(csi_cleanup_module); + +EXPORT_SYMBOL(csi_init_interface); +EXPORT_SYMBOL(csi_enable_mclk); +EXPORT_SYMBOL(csi_read_mclk_flag); +EXPORT_SYMBOL(csi_set_callback); +EXPORT_SYMBOL(csi_enable_prpif); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MX27 CSI driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/fsl_csi.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/fsl_csi.h @@ -0,0 +1,198 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_csi.h + * + * @brief mx25 CMOS Sensor interface functions + * + * @ingroup CSI + */ + +#ifndef MX25_CSI_H +#define MX25_CSI_H + +#include +#include + +/* reset values */ +#define CSICR1_RESET_VAL 0x40000800 +#define CSICR2_RESET_VAL 0x0 +#define CSICR3_RESET_VAL 0x0 + +/* csi control reg 1 */ +#define BIT_SWAP16_EN (0x1 << 31) +#define BIT_EXT_VSYNC (0x1 << 30) +#define BIT_EOF_INT_EN (0x1 << 29) +#define BIT_PRP_IF_EN (0x1 << 28) +#define BIT_CCIR_MODE (0x1 << 27) +#define BIT_COF_INT_EN (0x1 << 26) +#define BIT_SF_OR_INTEN (0x1 << 25) +#define BIT_RF_OR_INTEN (0x1 << 24) +#define BIT_SFF_DMA_DONE_INTEN (0x1 << 22) +#define BIT_STATFF_INTEN (0x1 << 21) +#define BIT_FB2_DMA_DONE_INTEN (0x1 << 20) +#define BIT_FB1_DMA_DONE_INTEN (0x1 << 19) +#define BIT_RXFF_INTEN (0x1 << 18) +#define BIT_SOF_POL (0x1 << 17) +#define BIT_SOF_INTEN (0x1 << 16) +#define BIT_MCLKDIV (0xF << 12) +#define BIT_HSYNC_POL (0x1 << 11) +#define BIT_CCIR_EN (0x1 << 10) +#define BIT_MCLKEN (0x1 << 9) +#define BIT_FCC (0x1 << 8) +#define BIT_PACK_DIR (0x1 << 7) +#define BIT_CLR_STATFIFO (0x1 << 6) +#define BIT_CLR_RXFIFO (0x1 << 5) +#define BIT_GCLK_MODE (0x1 << 4) +#define BIT_INV_DATA (0x1 << 3) +#define BIT_INV_PCLK (0x1 << 2) +#define BIT_REDGE (0x1 << 1) +#define BIT_PIXEL_BIT (0x1 << 0) + +#define SHIFT_MCLKDIV 12 + +/* control reg 3 */ +#define BIT_FRMCNT (0xFFFF << 16) +#define BIT_FRMCNT_RST (0x1 << 15) +#define BIT_DMA_REFLASH_RFF (0x1 << 14) +#define BIT_DMA_REFLASH_SFF (0x1 << 13) +#define BIT_DMA_REQ_EN_RFF (0x1 << 12) +#define BIT_DMA_REQ_EN_SFF (0x1 << 11) +#define BIT_STATFF_LEVEL (0x7 << 8) +#define BIT_HRESP_ERR_EN (0x1 << 7) +#define BIT_RXFF_LEVEL (0x7 << 4) +#define BIT_TWO_8BIT_SENSOR (0x1 << 3) +#define BIT_ZERO_PACK_EN (0x1 << 2) +#define BIT_ECC_INT_EN (0x1 << 1) +#define BIT_ECC_AUTO_EN (0x1 << 0) + +#define SHIFT_FRMCNT 16 + +/* csi status reg */ +#define BIT_SFF_OR_INT (0x1 << 25) +#define BIT_RFF_OR_INT (0x1 << 24) +#define BIT_DMA_TSF_DONE_SFF (0x1 << 22) +#define BIT_STATFF_INT (0x1 << 21) +#define BIT_DMA_TSF_DONE_FB2 (0x1 << 20) +#define BIT_DMA_TSF_DONE_FB1 (0x1 << 19) +#define BIT_RXFF_INT (0x1 << 18) +#define BIT_EOF_INT (0x1 << 17) +#define BIT_SOF_INT (0x1 << 16) +#define BIT_F2_INT (0x1 << 15) +#define BIT_F1_INT (0x1 << 14) +#define BIT_COF_INT (0x1 << 13) +#define BIT_HRESP_ERR_INT (0x1 << 7) +#define BIT_ECC_INT (0x1 << 1) +#define BIT_DRDY (0x1 << 0) + +#define CSI_MCLK_VF 1 +#define CSI_MCLK_ENC 2 +#define CSI_MCLK_RAW 4 +#define CSI_MCLK_I2C 8 +#endif + +#define CSI_CSICR1 (IO_ADDRESS(CSI_BASE_ADDR)) +#define CSI_CSICR2 (IO_ADDRESS(CSI_BASE_ADDR + 0x4)) +#define CSI_CSICR3 (IO_ADDRESS(CSI_BASE_ADDR + 0x8)) +#define CSI_STATFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0xC)) +#define CSI_CSIRXFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0x10)) +#define CSI_CSIRXCNT (IO_ADDRESS(CSI_BASE_ADDR + 0x14)) +#define CSI_CSISR (IO_ADDRESS(CSI_BASE_ADDR + 0x18)) + +#define CSI_CSIDBG (IO_ADDRESS(CSI_BASE_ADDR + 0x1C)) +#define CSI_CSIDMASA_STATFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0x20)) +#define CSI_CSIDMATS_STATFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0x24)) +#define CSI_CSIDMASA_FB1 (IO_ADDRESS(CSI_BASE_ADDR + 0x28)) +#define CSI_CSIDMASA_FB2 (IO_ADDRESS(CSI_BASE_ADDR + 0x2C)) +#define CSI_CSIFBUF_PARA (IO_ADDRESS(CSI_BASE_ADDR + 0x30)) +#define CSI_CSIIMAG_PARA (IO_ADDRESS(CSI_BASE_ADDR + 0x34)) + +#define CSI_CSIRXFIFO_PHYADDR (CSI_BASE_ADDR + 0x10) + +static inline void csi_clear_status(unsigned long status) +{ + __raw_writel(status, CSI_CSISR); +} + +struct csi_signal_cfg_t { + unsigned data_width:3; + unsigned clk_mode:2; + unsigned ext_vsync:1; + unsigned Vsync_pol:1; + unsigned Hsync_pol:1; + unsigned pixclk_pol:1; + unsigned data_pol:1; + unsigned sens_clksrc:1; +}; + +struct csi_config_t { + /* control reg 1 */ + unsigned int swap16_en:1; + unsigned int ext_vsync:1; + unsigned int eof_int_en:1; + unsigned int prp_if_en:1; + unsigned int ccir_mode:1; + unsigned int cof_int_en:1; + unsigned int sf_or_inten:1; + unsigned int rf_or_inten:1; + unsigned int sff_dma_done_inten:1; + unsigned int statff_inten:1; + unsigned int fb2_dma_done_inten:1; + unsigned int fb1_dma_done_inten:1; + unsigned int rxff_inten:1; + unsigned int sof_pol:1; + unsigned int sof_inten:1; + unsigned int mclkdiv:4; + unsigned int hsync_pol:1; + unsigned int ccir_en:1; + unsigned int mclken:1; + unsigned int fcc:1; + unsigned int pack_dir:1; + unsigned int gclk_mode:1; + unsigned int inv_data:1; + unsigned int inv_pclk:1; + unsigned int redge:1; + unsigned int pixel_bit:1; + + /* control reg 3 */ + unsigned int frmcnt:16; + unsigned int frame_reset:1; + unsigned int dma_reflash_rff:1; + unsigned int dma_reflash_sff:1; + unsigned int dma_req_en_rff:1; + unsigned int dma_req_en_sff:1; + unsigned int statff_level:3; + unsigned int hresp_err_en:1; + unsigned int rxff_level:3; + unsigned int two_8bit_sensor:1; + unsigned int zero_pack_en:1; + unsigned int ecc_int_en:1; + unsigned int ecc_auto_en:1; + /* fifo counter */ + unsigned int rxcnt; +}; + +typedef void (*csi_irq_callback_t) (void *data, unsigned long status); + +int32_t csi_enable_mclk(int src, bool flag, bool wait); +void csi_init_interface(void); +void csi_set_16bit_imagpara(int width, int height); +void csi_set_12bit_imagpara(int width, int height); +int csi_read_mclk_flag(void); +void csi_start_callback(void *data); +void csi_stop_callback(void *data); +void csi_enable_int(int arg); +void csi_disable_int(void); +void csi_mclk_enable(void); +void csi_mclk_disable(void); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/adv7180.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/adv7180.c @@ -0,0 +1,982 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file adv7180.c + * + * @brief Analog Device ADV7180 video decoder functions + * + * @ingroup Camera + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" + +static struct regulator *dvddio_regulator; +static struct regulator *dvdd_regulator; +static struct regulator *avdd_regulator; +static struct regulator *pvdd_regulator; + +extern void gpio_sensor_active(void); +extern void gpio_sensor_inactive(void); + +static int adv7180_probe(struct i2c_client *adapter, + const struct i2c_device_id *id); +static int adv7180_detach(struct i2c_client *client); + +static const struct i2c_device_id adv7180_id[] = { + {"adv7180", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, adv7180_id); + +static struct i2c_driver adv7180_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "adv7180", + }, + .probe = adv7180_probe, + .remove = adv7180_detach, + .id_table = adv7180_id, +}; + +/*! + * Maintains the information on the current state of the sesor. + */ +struct sensor { + struct v4l2_int_device *v4l2_int_device; + struct i2c_client *i2c_client; + struct v4l2_pix_format pix; + struct v4l2_captureparm streamcap; + bool on; + + /* control settings */ + int brightness; + int hue; + int contrast; + int saturation; + int red; + int green; + int blue; + int ae_mode; + + v4l2_std_id std_id; +} adv7180_data; + +/*! List of input video formats supported. The video formats is corresponding + * with v4l2 id in video_fmt_t + */ +typedef enum { + ADV7180_NTSC = 0, /*!< Locked on (M) NTSC video signal. */ + ADV7180_PAL, /*!< (B, G, H, I, N)PAL video signal. */ + ADV7180_NOT_LOCKED, /*!< Not locked on a signal. */ +} video_fmt_idx; + +/*! Number of video standards supported (including 'not locked' signal). */ +#define ADV7180_STD_MAX (ADV7180_PAL + 1) + +/*! Video format structure. */ +typedef struct { + int v4l2_id; /*!< Video for linux ID. */ + char name[16]; /*!< Name (e.g., "NTSC", "PAL", etc.) */ + u16 raw_width; /*!< Raw width. */ + u16 raw_height; /*!< Raw height. */ + u16 active_width; /*!< Active width. */ + u16 active_height; /*!< Active height. */ +} video_fmt_t; + +/*! Description of video formats supported. + * + * PAL: raw=720x625, active=720x576. + * NTSC: raw=720x525, active=720x480. + */ +static video_fmt_t video_fmts[] = { + { /*! NTSC */ + .v4l2_id = V4L2_STD_NTSC, + .name = "NTSC", + .raw_width = 720 - 1, /* SENS_FRM_WIDTH */ + .raw_height = 288 - 1, /* SENS_FRM_HEIGHT */ + .active_width = 720, /* ACT_FRM_WIDTH plus 1 */ + .active_height = (480 / 2), /* ACT_FRM_WIDTH plus 1 */ + }, + { /*! (B, G, H, I, N) PAL */ + .v4l2_id = V4L2_STD_PAL, + .name = "PAL", + .raw_width = 720 - 1, + .raw_height = (576 / 2) + 24 * 2 - 1, + .active_width = 720, + .active_height = (576 / 2), + }, + { /*! Unlocked standard */ + .v4l2_id = V4L2_STD_ALL, + .name = "Autodetect", + .raw_width = 720 - 1, + .raw_height = (576 / 2) + 24 * 2 - 1, + .active_width = 720, + .active_height = (576 / 2), + }, +}; + +/*!* Standard index of ADV7180. */ +static video_fmt_idx video_idx = ADV7180_PAL; + +/*! @brief This mutex is used to provide mutual exclusion. + * + * Create a mutex that can be used to provide mutually exclusive + * read/write access to the globally accessible data structures + * and variables that were defined above. + */ +static DECLARE_MUTEX(mutex); + +#define IF_NAME "adv7180" +#define ADV7180_INPUT_CTL 0x00 /* Input Control */ +#define ADV7180_STATUS_1 0x10 /* Status #1 */ +#define ADV7180_BRIGHTNESS 0x0a /* Brightness */ +#define ADV7180_IDENT 0x11 /* IDENT */ +#define ADV7180_VSYNC_FIELD_CTL_1 0x31 /* VSYNC Field Control #1 */ +#define ADV7180_MANUAL_WIN_CTL 0x3d /* Manual Window Control */ +#define ADV7180_SD_SATURATION_CB 0xe3 /* SD Saturation Cb */ +#define ADV7180_SD_SATURATION_CR 0xe4 /* SD Saturation Cr */ +#define ADV7180_PWR_MNG 0x0f /* Power Management */ + +/* supported controls */ +/* This hasn't been fully implemented yet. + * This is how it should work, though. */ +static struct v4l2_queryctrl adv7180_qctrl[] = { + { + .id = V4L2_CID_BRIGHTNESS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Brightness", + .minimum = 0, /* check this value */ + .maximum = 255, /* check this value */ + .step = 1, /* check this value */ + .default_value = 127, /* check this value */ + .flags = 0, + }, { + .id = V4L2_CID_SATURATION, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Saturation", + .minimum = 0, /* check this value */ + .maximum = 255, /* check this value */ + .step = 0x1, /* check this value */ + .default_value = 127, /* check this value */ + .flags = 0, + } +}; + +/*********************************************************************** + * I2C transfert. + ***********************************************************************/ + +/*! Read one register from a ADV7180 i2c slave device. + * + * @param *reg register in the device we wish to access. + * + * @return 0 if success, an error code otherwise. + */ +static inline int adv7180_read(u8 reg) +{ + int val; + val = i2c_smbus_read_byte_data(adv7180_data.i2c_client, reg); + if (val < 0) { + dev_dbg(&adv7180_data.i2c_client->dev, + "%s:read reg error: reg=%2x \n", __func__, reg); + return -1; + } + return val; +} + +/*! Write one register of a ADV7180 i2c slave device. + * + * @param *reg register in the device we wish to access. + * + * @return 0 if success, an error code otherwise. + */ +static int adv7180_write_reg(u8 reg, u8 val) +{ + if (i2c_smbus_write_byte_data(adv7180_data.i2c_client, reg, val) < 0) { + dev_dbg(&adv7180_data.i2c_client->dev, + "%s:write reg error:reg=%2x,val=%2x\n", __func__, + reg, val); + return -1; + } + return 0; +} + +/*********************************************************************** + * mxc_v4l2_capture interface. + ***********************************************************************/ + +/*! + * Return attributes of current video standard. + * Since this device autodetects the current standard, this function also + * sets the values that need to be changed if the standard changes. + * There is no set std equivalent function. + * + * @return None. + */ +static void adv7180_get_std(v4l2_std_id *std) +{ + int tmp; + int idx; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_get_std\n"); + + /* Read the AD_RESULT to get the detect output video standard */ + tmp = adv7180_read(ADV7180_STATUS_1) & 0x70; + + down(&mutex); + if (tmp == 0x40) { + /* PAL */ + *std = V4L2_STD_PAL; + idx = ADV7180_PAL; + } else if (tmp == 0) { + /*NTSC*/ + *std = V4L2_STD_NTSC; + idx = ADV7180_NTSC; + } else { + *std = V4L2_STD_ALL; + idx = ADV7180_NOT_LOCKED; + dev_dbg(&adv7180_data.i2c_client->dev, + "Got invalid video standard! \n"); + } + up(&mutex); + + /* This assumes autodetect which this device uses. */ + if (*std != adv7180_data.std_id) { + video_idx = idx; + adv7180_data.std_id = *std; + adv7180_data.pix.width = video_fmts[video_idx].raw_width; + adv7180_data.pix.height = video_fmts[video_idx].raw_height; + } +} + +/*********************************************************************** + * IOCTL Functions from v4l2_int_ioctl_desc. + ***********************************************************************/ + +/*! + * ioctl_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_ifparm_num + * s: pointer to standard V4L2 device structure + * p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure + * + * Gets slave interface parameters. + * Calculates the required xclk value to support the requested + * clock parameters in p. This value is returned in the p + * parameter. + * + * vidioc_int_g_ifparm returns platform-specific information about the + * interface settings used by the sensor. + * + * Called on open. + */ +static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) +{ + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_g_ifparm\n"); + + if (s == NULL) { + pr_err(" ERROR!! no slave device set!\n"); + return -1; + } + + /* Initialize structure to 0s then set any non-0 values. */ + memset(p, 0, sizeof(*p)); + p->if_type = V4L2_IF_TYPE_BT656; /* This is the only possibility. */ + p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT; + p->u.bt656.nobt_hs_inv = 1; + + /* ADV7180 has a dedicated clock so no clock settings needed. */ + + return 0; +} + +/*! + * Sets the camera power. + * + * s pointer to the camera device + * on if 1, power is to be turned on. 0 means power is to be turned off + * + * ioctl_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num + * @s: pointer to standard V4L2 device structure + * @on: power state to which device is to be set + * + * Sets devices power state to requrested state, if possible. + * This is called on open, close, suspend and resume. + */ +static int ioctl_s_power(struct v4l2_int_device *s, int on) +{ + struct sensor *sensor = s->priv; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_s_power\n"); + + if (on && !sensor->on) { + gpio_sensor_active(); + if (adv7180_write_reg(ADV7180_PWR_MNG, 0) != 0) + return -EIO; + } else if (!on && sensor->on) { + if (adv7180_write_reg(ADV7180_PWR_MNG, 0x24) != 0) + return -EIO; + gpio_sensor_inactive(); + } + + sensor->on = on; + + return 0; +} + +/*! + * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure + * + * Returns the sensor's video CAPTURE parameters. + */ +static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + struct sensor *sensor = s->priv; + struct v4l2_captureparm *cparm = &a->parm.capture; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_g_parm\n"); + + switch (a->type) { + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + memset(a, 0, sizeof(*a)); + a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cparm->capability = sensor->streamcap.capability; + cparm->timeperframe = sensor->streamcap.timeperframe; + cparm->capturemode = sensor->streamcap.capturemode; + break; + + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + break; + + default: + pr_debug("ioctl_g_parm:type is unknown %d\n", a->type); + break; + } + + return 0; +} + +/*! + * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure + * + * Configures the sensor to use the input parameters, if possible. If + * not possible, reverts to the old parameters and returns the + * appropriate error code. + * + * This driver cannot change these settings. + */ +static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_s_parm\n"); + + switch (a->type) { + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + break; + + default: + pr_debug(" type is unknown - %d\n", a->type); + break; + } + + return 0; +} + +/*! + * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap + * @s: pointer to standard V4L2 device structure + * @f: pointer to standard V4L2 v4l2_format structure + * + * Returns the sensor's current pixel format in the v4l2_format + * parameter. + */ +static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) +{ + struct sensor *sensor = s->priv; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_g_fmt_cap\n"); + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" Returning size of %dx%d\n", + sensor->pix.width, sensor->pix.height); + f->fmt.pix = sensor->pix; + break; + + case V4L2_BUF_TYPE_PRIVATE: { + v4l2_std_id std; + adv7180_get_std(&std); + f->fmt.pix.pixelformat = (u32)std; + } + break; + + default: + f->fmt.pix = sensor->pix; + break; + } + + return 0; +} + +/*! + * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl + * @s: pointer to standard V4L2 device structure + * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure + * + * If the requested control is supported, returns the control information + * from the video_control[] array. Otherwise, returns -EINVAL if the + * control is not supported. + */ +static int ioctl_queryctrl(struct v4l2_int_device *s, + struct v4l2_queryctrl *qc) +{ + int i; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_queryctrl\n"); + + for (i = 0; i < ARRAY_SIZE(adv7180_qctrl); i++) + if (qc->id && qc->id == adv7180_qctrl[i].id) { + memcpy(qc, &(adv7180_qctrl[i]), + sizeof(*qc)); + return (0); + } + + return -EINVAL; +} + +/*! + * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure + * + * If the requested control is supported, returns the control's current + * value from the video_control[] array. Otherwise, returns -EINVAL + * if the control is not supported. + */ +static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int ret = 0; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_g_ctrl\n"); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_BRIGHTNESS\n"); + adv7180_data.brightness = adv7180_read(ADV7180_BRIGHTNESS); + vc->value = adv7180_data.brightness; + break; + case V4L2_CID_CONTRAST: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_CONTRAST\n"); + vc->value = adv7180_data.contrast; + break; + case V4L2_CID_SATURATION: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_SATURATION\n"); + adv7180_data.saturation = adv7180_read(ADV7180_SD_SATURATION_CB); + vc->value = adv7180_data.saturation; + break; + case V4L2_CID_HUE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_HUE\n"); + vc->value = adv7180_data.hue; + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_AUTO_WHITE_BALANCE\n"); + break; + case V4L2_CID_DO_WHITE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_DO_WHITE_BALANCE\n"); + break; + case V4L2_CID_RED_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_RED_BALANCE\n"); + vc->value = adv7180_data.red; + break; + case V4L2_CID_BLUE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_BLUE_BALANCE\n"); + vc->value = adv7180_data.blue; + break; + case V4L2_CID_GAMMA: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_GAMMA\n"); + break; + case V4L2_CID_EXPOSURE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_EXPOSURE\n"); + vc->value = adv7180_data.ae_mode; + break; + case V4L2_CID_AUTOGAIN: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_AUTOGAIN\n"); + break; + case V4L2_CID_GAIN: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_GAIN\n"); + break; + case V4L2_CID_HFLIP: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_HFLIP\n"); + break; + case V4L2_CID_VFLIP: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_VFLIP\n"); + break; + default: + dev_dbg(&adv7180_data.i2c_client->dev, + " Default case\n"); + vc->value = 0; + ret = -EPERM; + break; + } + + return ret; +} + +/*! + * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure + * + * If the requested control is supported, sets the control's current + * value in HW (and updates the video_control[] array). Otherwise, + * returns -EINVAL if the control is not supported. + */ +static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int retval = 0; + u8 tmp; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_s_ctrl\n"); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_BRIGHTNESS\n"); + tmp = vc->value; + adv7180_write_reg(ADV7180_BRIGHTNESS, tmp); + adv7180_data.brightness = vc->value; + break; + case V4L2_CID_CONTRAST: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_CONTRAST\n"); + break; + case V4L2_CID_SATURATION: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_SATURATION\n"); + tmp = vc->value; + adv7180_write_reg(ADV7180_SD_SATURATION_CB, tmp); + adv7180_write_reg(ADV7180_SD_SATURATION_CR, tmp); + adv7180_data.saturation = vc->value; + break; + case V4L2_CID_HUE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_HUE\n"); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_AUTO_WHITE_BALANCE\n"); + break; + case V4L2_CID_DO_WHITE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_DO_WHITE_BALANCE\n"); + break; + case V4L2_CID_RED_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_RED_BALANCE\n"); + break; + case V4L2_CID_BLUE_BALANCE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_BLUE_BALANCE\n"); + break; + case V4L2_CID_GAMMA: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_GAMMA\n"); + break; + case V4L2_CID_EXPOSURE: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_EXPOSURE\n"); + break; + case V4L2_CID_AUTOGAIN: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_AUTOGAIN\n"); + break; + case V4L2_CID_GAIN: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_GAIN\n"); + break; + case V4L2_CID_HFLIP: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_HFLIP\n"); + break; + case V4L2_CID_VFLIP: + dev_dbg(&adv7180_data.i2c_client->dev, + " V4L2_CID_VFLIP\n"); + break; + default: + dev_dbg(&adv7180_data.i2c_client->dev, + " Default case\n"); + retval = -EPERM; + break; + } + + return retval; +} + +/*! + * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT + * @s: pointer to standard V4L2 device structure + */ +static int ioctl_init(struct v4l2_int_device *s) +{ + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_init\n"); + return 0; +} + +/*! + * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num + * @s: pointer to standard V4L2 device structure + * + * Initialise the device when slave attaches to the master. + */ +static int ioctl_dev_init(struct v4l2_int_device *s) +{ + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180:ioctl_dev_init\n"); + return 0; +} + +/*! + * This structure defines all the ioctls for this module. + */ +static struct v4l2_int_ioctl_desc adv7180_ioctl_desc[] = { + + {vidioc_int_dev_init_num, (v4l2_int_ioctl_func *)ioctl_dev_init}, + + /*! + * Delinitialise the dev. at slave detach. + * The complement of ioctl_dev_init. + */ +/* {vidioc_int_dev_exit_num, (v4l2_int_ioctl_func *)ioctl_dev_exit}, */ + + {vidioc_int_s_power_num, (v4l2_int_ioctl_func *)ioctl_s_power}, + {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *)ioctl_g_ifparm}, +/* {vidioc_int_g_needs_reset_num, + (v4l2_int_ioctl_func *)ioctl_g_needs_reset}, */ +/* {vidioc_int_reset_num, (v4l2_int_ioctl_func *)ioctl_reset}, */ + {vidioc_int_init_num, (v4l2_int_ioctl_func *)ioctl_init}, + + /*! + * VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type. + */ +/* {vidioc_int_enum_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap}, */ + + /*! + * VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. + * This ioctl is used to negotiate the image capture size and + * pixel format without actually making it take effect. + */ +/* {vidioc_int_try_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_try_fmt_cap}, */ + + {vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_g_fmt_cap}, + + /*! + * If the requested format is supported, configures the HW to use that + * format, returns error code if format not supported or HW can't be + * correctly configured. + */ +/* {vidioc_int_s_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_s_fmt_cap}, */ + + {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *)ioctl_g_parm}, + {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *)ioctl_s_parm}, + {vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *)ioctl_queryctrl}, + {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *)ioctl_g_ctrl}, + {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *)ioctl_s_ctrl}, +}; + +static struct v4l2_int_slave adv7180_slave = { + .ioctls = adv7180_ioctl_desc, + .num_ioctls = ARRAY_SIZE(adv7180_ioctl_desc), +}; + +static struct v4l2_int_device adv7180_int_device = { + .module = THIS_MODULE, + .name = "adv7180", + .type = v4l2_int_type_slave, + .u = { + .slave = &adv7180_slave, + }, +}; + + +/*********************************************************************** + * I2C client and driver. + ***********************************************************************/ + +/*! ADV7180 Reset function. + * + * @return None. + */ +static void adv7180_hard_reset(void) +{ + dev_dbg(&adv7180_data.i2c_client->dev, + "In adv7180:adv7180_hard_reset\n"); + + /*! Driver works fine without explicit register + * initialization. Furthermore, initializations takes about 2 seconds + * at startup... + */ + + /*! Set YPbPr input on AIN1,4,5 and normal + * operations(autodection of all stds). + */ + adv7180_write_reg(ADV7180_INPUT_CTL, 0x09); + + /*! Datasheet recommends: */ + adv7180_write_reg(ADV7180_VSYNC_FIELD_CTL_1, 0x02); + adv7180_write_reg(ADV7180_MANUAL_WIN_CTL, 0xa2); +} + +/*! ADV7180 I2C attach function. + * + * @param *adapter struct i2c_adapter *. + * + * @return Error code indicating success or failure. + */ + +/*! + * ADV7180 I2C probe function. + * Function set in i2c_driver struct. + * Called by insmod. + * + * @param *adapter I2C adapter descriptor. + * + * @return Error code indicating success or failure. + */ +static int adv7180_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int rev_id; + int ret = 0; + struct mxc_tvin_platform_data *plat_data = client->dev.platform_data; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_probe\n"); + + if (plat_data->dvddio_reg) { + dvddio_regulator = + regulator_get(&client->dev, plat_data->dvddio_reg); + if (!IS_ERR_VALUE((unsigned long)dvddio_regulator)) { + regulator_set_voltage(dvddio_regulator, 3300000, 3300000); + if (regulator_enable(dvddio_regulator) != 0) + return -ENODEV; + } + } + + if (plat_data->dvdd_reg) { + dvdd_regulator = + regulator_get(&client->dev, plat_data->dvdd_reg); + if (!IS_ERR_VALUE((unsigned long)dvdd_regulator)) { + regulator_set_voltage(dvdd_regulator, 1800000, 1800000); + if (regulator_enable(dvdd_regulator) != 0) + return -ENODEV; + } + } + + if (plat_data->avdd_reg) { + avdd_regulator = + regulator_get(&client->dev, plat_data->avdd_reg); + if (!IS_ERR_VALUE((unsigned long)avdd_regulator)) { + regulator_set_voltage(avdd_regulator, 1800000, 1800000); + if (regulator_enable(avdd_regulator) != 0) + return -ENODEV; + } + } + + if (plat_data->pvdd_reg) { + pvdd_regulator = + regulator_get(&client->dev, plat_data->pvdd_reg); + if (!IS_ERR_VALUE((unsigned long)pvdd_regulator)) { + regulator_set_voltage(pvdd_regulator, 1800000, 1800000); + if (regulator_enable(pvdd_regulator) != 0) + return -ENODEV; + } + } + + if (plat_data->reset) + plat_data->reset(); + + if (plat_data->pwdn) + plat_data->pwdn(1); + + msleep(1); + + /* Set initial values for the sensor struct. */ + memset(&adv7180_data, 0, sizeof(adv7180_data)); + adv7180_data.i2c_client = client; + adv7180_data.streamcap.timeperframe.denominator = 30; + adv7180_data.streamcap.timeperframe.numerator = 1; + adv7180_data.std_id = V4L2_STD_ALL; + video_idx = ADV7180_NOT_LOCKED; + adv7180_data.pix.width = video_fmts[video_idx].raw_width; + adv7180_data.pix.height = video_fmts[video_idx].raw_height; + adv7180_data.pix.pixelformat = V4L2_PIX_FMT_UYVY; /* YUV422 */ + adv7180_data.pix.priv = 1; /* 1 is used to indicate TV in */ + adv7180_data.on = true; + + gpio_sensor_active(); + + dev_dbg(&adv7180_data.i2c_client->dev, + "%s:adv7180 probe i2c address is 0x%02X \n", + __func__, adv7180_data.i2c_client->addr); + + /*! Read the revision ID of the tvin chip */ + rev_id = adv7180_read(ADV7180_IDENT); + dev_dbg(&adv7180_data.i2c_client->dev, + "%s:Analog Device adv7%2X0 detected! \n", __func__, + rev_id); + + /*! ADV7180 initialization. */ + adv7180_hard_reset(); + + pr_debug(" type is %d (expect %d)\n", + adv7180_int_device.type, v4l2_int_type_slave); + pr_debug(" num ioctls is %d\n", + adv7180_int_device.u.slave->num_ioctls); + + /* This function attaches this structure to the /dev/video0 device. + * The pointer in priv points to the mt9v111_data structure here.*/ + adv7180_int_device.priv = &adv7180_data; + ret = v4l2_int_device_register(&adv7180_int_device); + + return ret; +} + +/*! + * ADV7180 I2C detach function. + * Called on rmmod. + * + * @param *client struct i2c_client*. + * + * @return Error code indicating success or failure. + */ +static int adv7180_detach(struct i2c_client *client) +{ + struct mxc_tvin_platform_data *plat_data = client->dev.platform_data; + + dev_dbg(&adv7180_data.i2c_client->dev, + "%s:Removing %s video decoder @ 0x%02X from adapter %s \n", + __func__, IF_NAME, client->addr << 1, client->adapter->name); + + if (plat_data->pwdn) + plat_data->pwdn(0); + + if (dvddio_regulator) { + regulator_disable(dvddio_regulator); + regulator_put(dvddio_regulator); + } + + if (dvdd_regulator) { + regulator_disable(dvdd_regulator); + regulator_put(dvdd_regulator); + } + + if (avdd_regulator) { + regulator_disable(avdd_regulator); + regulator_put(avdd_regulator); + } + + if (pvdd_regulator) { + regulator_disable(pvdd_regulator); + regulator_put(pvdd_regulator); + } + + v4l2_int_device_unregister(&adv7180_int_device); + + return 0; +} + +/*! + * ADV7180 init function. + * Called on insmod. + * + * @return Error code indicating success or failure. + */ +static __init int adv7180_init(void) +{ + u8 err = 0; + + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_init\n"); + + /* Tells the i2c driver what functions to call for this driver. */ + err = i2c_add_driver(&adv7180_i2c_driver); + if (err != 0) + pr_err("%s:driver registration failed, error=%d \n", + __func__, err); + + return err; +} + +/*! + * ADV7180 cleanup function. + * Called on rmmod. + * + * @return Error code indicating success or failure. + */ +static void __exit adv7180_clean(void) +{ + dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_clean\n"); + i2c_del_driver(&adv7180_i2c_driver); + gpio_sensor_inactive(); +} + +module_init(adv7180_init); +module_exit(adv7180_clean); + +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_DESCRIPTION("Anolog Device ADV7180 video decoder driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_prp_vf_sdc.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_prp_vf_sdc.c @@ -0,0 +1,437 @@ +/* + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_prp_vf_sdc.c + * + * @brief IPU Use case for PRP-VF + * + * @ingroup IPU + */ + +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +#define OVERLAY_FB_SUPPORT_NONSTD (cpu_is_mx51_rev(CHIP_REV_2_0) >= 1) + +/* + * Function definitions + */ + +/*! + * prpvf_start - start the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_start(void *private) +{ + struct fb_var_screeninfo fbvar; + struct fb_info *fbi = NULL; + cam_data *cam = (cam_data *) private; + ipu_channel_params_t vf; + u32 vf_out_format = 0; + u32 size = 2, temp = 0; + int err = 0, i = 0; + + if (!cam) { + printk(KERN_ERR "private is NULL\n"); + return -EIO; + } + + if (cam->overlay_active == true) { + pr_debug("already started.\n"); + return 0; + } + + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strcmp(idstr, "DISP3 FG") == 0) { + fbi = registered_fb[i]; + break; + } + } + + if (fbi == NULL) { + printk(KERN_ERR "DISP3 FG fb not found\n"); + return -EPERM; + } + + fbvar = fbi->var; + + /* Store the overlay frame buffer's original std */ + cam->fb_origin_std = fbvar.nonstd; + + if (OVERLAY_FB_SUPPORT_NONSTD) { + /* Use DP to do CSC so that we can get better performance */ + vf_out_format = IPU_PIX_FMT_UYVY; + fbvar.nonstd = vf_out_format; + } else { + vf_out_format = IPU_PIX_FMT_RGB565; + fbvar.nonstd = 0; + } + + fbvar.bits_per_pixel = 16; + fbvar.xres = fbvar.xres_virtual = cam->win.w.width; + fbvar.yres = cam->win.w.height; + fbvar.yres_virtual = cam->win.w.height * 2; + fbvar.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbvar); + + ipu_disp_set_window_pos(MEM_FG_SYNC, cam->win.w.left, + cam->win.w.top); + + memset(&vf, 0, sizeof(ipu_channel_params_t)); + ipu_csi_get_window_size(&vf.csi_prp_vf_mem.in_width, + &vf.csi_prp_vf_mem.in_height, cam->csi); + vf.csi_prp_vf_mem.in_pixel_fmt = IPU_PIX_FMT_UYVY; + vf.csi_prp_vf_mem.out_width = cam->win.w.width; + vf.csi_prp_vf_mem.out_height = cam->win.w.height; + vf.csi_prp_vf_mem.csi = cam->csi; + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + vf.csi_prp_vf_mem.out_width = cam->win.w.height; + vf.csi_prp_vf_mem.out_height = cam->win.w.width; + } + vf.csi_prp_vf_mem.out_pixel_fmt = vf_out_format; + size = cam->win.w.width * cam->win.w.height * size; + + err = ipu_init_channel(CSI_PRP_VF_MEM, &vf); + if (err != 0) + goto out_5; + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, true, true); + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], + (dma_addr_t) cam->vf_bufs[0]); + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], + (dma_addr_t) cam->vf_bufs[1]); + } + cam->vf_bufs_size[0] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0, + cam->vf_bufs_size[0], + (dma_addr_t *) & + cam->vf_bufs[0], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[0] == NULL) { + printk(KERN_ERR "Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_4; + } + cam->vf_bufs_size[1] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0, + cam->vf_bufs_size[1], + (dma_addr_t *) & + cam->vf_bufs[1], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[1] == NULL) { + printk(KERN_ERR "Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_3; + } + pr_debug("vf_bufs %x %x\n", cam->vf_bufs[0], cam->vf_bufs[1]); + + if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) { + err = ipu_init_channel_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, + vf_out_format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + IPU_ROTATE_NONE, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + goto out_3; + } + + err = ipu_init_channel(MEM_ROT_VF_MEM, NULL); + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n"); + goto out_3; + } + + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_INPUT_BUFFER, + vf_out_format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + cam->vf_rotation, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n"); + goto out_2; + } + + if (cam->vf_rotation < IPU_ROTATE_90_RIGHT) { + temp = vf.csi_prp_vf_mem.out_width; + vf.csi_prp_vf_mem.out_width = + vf.csi_prp_vf_mem.out_height; + vf.csi_prp_vf_mem.out_height = temp; + } + + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, + vf_out_format, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + IPU_ROTATE_NONE, + fbi->fix.smem_start + + (fbi->fix.line_length * + fbi->var.yres), + fbi->fix.smem_start, 0, 0); + + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n"); + goto out_2; + } + + err = ipu_link_channels(CSI_PRP_VF_MEM, MEM_ROT_VF_MEM); + if (err < 0) { + printk(KERN_ERR + "Error link CSI_PRP_VF_MEM-MEM_ROT_VF_MEM\n"); + goto out_2; + } + + err = ipu_link_channels(MEM_ROT_VF_MEM, MEM_FG_SYNC); + if (err < 0) { + printk(KERN_ERR + "Error link MEM_ROT_VF_MEM-MEM_FG_SYNC\n"); + goto out_1; + } + + ipu_enable_channel(CSI_PRP_VF_MEM); + ipu_enable_channel(MEM_ROT_VF_MEM); + + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 1); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 1); + } else { + err = ipu_init_channel_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, + vf_out_format, cam->win.w.width, + cam->win.w.height, + cam->win.w.width, + cam->vf_rotation, + fbi->fix.smem_start + + (fbi->fix.line_length * + fbi->var.yres), + fbi->fix.smem_start, 0, 0); + if (err != 0) { + printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n"); + goto out_4; + } + + err = ipu_link_channels(CSI_PRP_VF_MEM, MEM_FG_SYNC); + if (err < 0) { + printk(KERN_ERR "Error linking ipu channels\n"); + goto out_4; + } + + ipu_enable_channel(CSI_PRP_VF_MEM); + + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 1); + } + + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_UNBLANK); + release_console_sem(); + + cam->overlay_active = true; + return err; + +out_1: + ipu_unlink_channels(CSI_PRP_VF_MEM, MEM_ROT_VF_MEM); +out_2: + if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) { + ipu_uninit_channel(MEM_ROT_VF_MEM); + } +out_3: + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], + (dma_addr_t) cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], + (dma_addr_t) cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } +out_4: + ipu_uninit_channel(CSI_PRP_VF_MEM); +out_5: + return err; +} + +/*! + * prpvf_stop - stop the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_stop(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0, i = 0; + struct fb_info *fbi = NULL; + struct fb_var_screeninfo fbvar; + + if (cam->overlay_active == false) + return 0; + + for (i = 0; i < num_registered_fb; i++) { + char *idstr = registered_fb[i]->fix.id; + if (strcmp(idstr, "DISP3 FG") == 0) { + fbi = registered_fb[i]; + break; + } + } + + if (fbi == NULL) { + printk(KERN_ERR "DISP3 FG fb not found\n"); + return -EPERM; + } + + ipu_disp_set_window_pos(MEM_FG_SYNC, 0, 0); + + if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) { + ipu_unlink_channels(CSI_PRP_VF_MEM, MEM_ROT_VF_MEM); + ipu_unlink_channels(MEM_ROT_VF_MEM, MEM_FG_SYNC); + } else { + ipu_unlink_channels(CSI_PRP_VF_MEM, MEM_FG_SYNC); + } + + ipu_disable_channel(CSI_PRP_VF_MEM, true); + + if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) { + ipu_disable_channel(MEM_ROT_VF_MEM, true); + ipu_uninit_channel(MEM_ROT_VF_MEM); + } + ipu_uninit_channel(CSI_PRP_VF_MEM); + + acquire_console_sem(); + fb_blank(fbi, FB_BLANK_POWERDOWN); + release_console_sem(); + + /* Set the overlay frame buffer std to what it is used to be */ + fbvar = fbi->var; + fbvar.nonstd = cam->fb_origin_std; + fbvar.activate |= FB_ACTIVATE_FORCE; + fb_set_var(fbi, &fbvar); + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, false, false); + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], + (dma_addr_t) cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], + (dma_addr_t) cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } + + cam->overlay_active = false; + return err; +} + +/*! + * function to select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return status + */ +int prp_vf_sdc_select(void *private) +{ + cam_data *cam; + int err = 0; + if (private) { + cam = (cam_data *) private; + cam->vf_start_sdc = prpvf_start; + cam->vf_stop_sdc = prpvf_stop; + cam->overlay_active = false; + } else + err = -EIO; + + return err; +} + +/*! + * function to de-select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return int + */ +int prp_vf_sdc_deselect(void *private) +{ + cam_data *cam; + int err = 0; + err = prpvf_stop(private); + + if (private) { + cam = (cam_data *) private; + cam->vf_start_sdc = NULL; + cam->vf_stop_sdc = NULL; + } + return err; +} + +/*! + * Init viewfinder task. + * + * @return Error code indicating success or failure + */ +__init int prp_vf_sdc_init(void) +{ + return 0; +} + +/*! + * Deinit viewfinder task. + * + * @return Error code indicating success or failure + */ +void __exit prp_vf_sdc_exit(void) +{ +} + +module_init(prp_vf_sdc_init); +module_exit(prp_vf_sdc_exit); + +EXPORT_SYMBOL(prp_vf_sdc_select); +EXPORT_SYMBOL(prp_vf_sdc_deselect); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IPU PRP VF SDC Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/Kconfig @@ -0,0 +1,123 @@ +if VIDEO_MXC_CAMERA + +menu "MXC Camera/V4L2 PRP Features support" +config VIDEO_MXC_IPU_CAMERA + bool + depends on VIDEO_MXC_CAMERA && MXC_IPU + default y + +config VIDEO_MXC_EMMA_CAMERA + tristate "MX27 eMMA support" + depends on VIDEO_MXC_CAMERA && MXC_EMMA && FB_MXC_SYNC_PANEL + select VIDEO_MXC_OPL + default y + +config VIDEO_MXC_CSI_CAMERA + tristate "MX25 CSI camera support" + depends on !VIDEO_MXC_EMMA_CAMERA + +config VIDEO_MXC_CSI_DMA + bool "CSI-DMA Still Image Capture support" + depends on VIDEO_MXC_EMMA_CAMERA + default n + ---help--- + Use CSI-DMA method instead of CSI-PrP link to capture still image. This allows + to use less physical contiguous memory to capture big resolution still image. But + with this method the CSC (Color Space Conversion) and resize are not supported. + If unsure, say N. + +choice + prompt "Select Camera/TV Decoder" + default MXC_CAMERA_OV3640 + depends on VIDEO_MXC_CAMERA + +config MXC_CAMERA_MC521DA + tristate "Magnachip mc521da camera support" + select I2C_MXC + depends on VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the mc521da Camera with your MXC system, say Y here. + +config MXC_EMMA_CAMERA_MICRON111 + tristate "Micron mt9v111 camera support with eMMA" + select I2C_MXC + depends on VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the mt9v111 Camera with your MXC system, say Y here. + +config MXC_CAMERA_OV2640_EMMA + tristate "OmniVision ov2640 camera support with eMMA" + depends on VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the ov2640 Camera with your MXC system, say Y here. + +config MXC_CAMERA_MICRON111 + tristate "Micron mt9v111 camera support" + select I2C_MXC + depends on ! VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the mt9v111 Camera with your MXC system, say Y here. + +config MXC_CAMERA_OV2640 + tristate "OmniVision ov2640 camera support" + depends on !VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the ov2640 Camera with your MXC system, say Y here. + +config MXC_CAMERA_OV3640 + tristate "OmniVision ov3640 camera support" + depends on !VIDEO_MXC_EMMA_CAMERA + ---help--- + If you plan to use the ov3640 Camera with your MXC system, say Y here. + +config MXC_TVIN_ADV7180 + tristate "Analog Device adv7180 TV Decoder Input support" + depends on MACH_MX35_3DS + ---help--- + If you plan to use the adv7180 video decoder with your MXC system, say Y here. + +endchoice + +config MXC_IPU_PRP_VF_SDC + tristate "Pre-Processor VF SDC library" + depends on VIDEO_MXC_IPU_CAMERA && FB_MXC_SYNC_PANEL + default y + ---help--- + Use case PRP_VF_SDC: + Preprocessing image from smart sensor for viewfinder and + displaying it on synchronous display with SDC use case. + If SDC BG is selected, Rotation will not be supported. + CSI -> IC (PRP VF) -> MEM + MEM -> IC (ROT) -> MEM + MEM -> SDC (FG/BG) + +config MXC_IPU_PRP_VF_ADC + tristate "Pre-Processor VF ADC library" + depends on VIDEO_MXC_IPU_CAMERA && FB_MXC_ASYNC_PANEL + default y + ---help--- + Use case PRP_VF_ADC: + Preprocessing image from smart sensor for viewfinder and + displaying it on asynchronous display. + CSI -> IC (PRP VF) -> ADC2 + +config MXC_IPU_PRP_ENC + tristate "Pre-processor Encoder library" + depends on VIDEO_MXC_IPU_CAMERA + default y + ---help--- + Use case PRP_ENC: + Preprocessing image from smart sensor for encoder. + CSI -> IC (PRP ENC) -> MEM + +config MXC_IPU_CSI_ENC + tristate "IPU CSI Encoder library" + depends on VIDEO_MXC_IPU_CAMERA + default y + ---help--- + Use case IPU_CSI_ENC: + Get raw image with CSI from smart sensor for encoder. + CSI -> MEM +endmenu + +endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_prp_sw.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_prp_sw.h @@ -0,0 +1,38 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_prp_sw.h + * + * @brief This file contains the IPU PRP use case driver header. + * + * @ingroup IPU + */ + +#ifndef _INCLUDE_IPU__PRP_SW_H_ +#define _INCLUDE_IPU__PRP_SW_H_ + +int csi_enc_select(void *private); +int csi_enc_deselect(void *private); +int prp_enc_select(void *private); +int prp_enc_deselect(void *private); +int prp_vf_adc_select(void *private); +int prp_vf_sdc_select(void *private); +int prp_vf_sdc_select_bg(void *private); +int prp_vf_adc_deselect(void *private); +int prp_vf_sdc_deselect(void *private); +int prp_vf_sdc_deselect_bg(void *private); +int prp_still_select(void *private); +int prp_still_deselect(void *private); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/csi_v4l2_capture.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/csi_v4l2_capture.c @@ -0,0 +1,1466 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/media/video/mxc/capture/csi_v4l2_capture.c + * This file is derived from mxc_v4l2_capture.c + * + * @brief MX25 Video For Linux 2 driver + * + * @ingroup MXC_V4L2_CAPTURE + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "fsl_csi.h" + +static int video_nr = -1; +static cam_data *g_cam; + +static int csi_v4l2_master_attach(struct v4l2_int_device *slave); +static void csi_v4l2_master_detach(struct v4l2_int_device *slave); +static u8 camera_power(cam_data *cam, bool cameraOn); + +/*! Information about this driver. */ +static struct v4l2_int_master csi_v4l2_master = { + .attach = csi_v4l2_master_attach, + .detach = csi_v4l2_master_detach, +}; + +static struct v4l2_int_device csi_v4l2_int_device = { + .module = THIS_MODULE, + .name = "csi_v4l2_cap", + .type = v4l2_int_type_master, + .u = { + .master = &csi_v4l2_master, + }, +}; + +/*! + * Camera V4l2 callback function. + * + * @param mask u32 + * @param dev void device structure + * + * @return none + */ +static void camera_callback(u32 mask, void *dev) +{ + struct mxc_v4l_frame *done_frame; + struct mxc_v4l_frame *ready_frame; + cam_data *cam; + + cam = (cam_data *) dev; + if (cam == NULL) + return; + + if (list_empty(&cam->working_q)) { + pr_err("ERROR: v4l2 capture: %s: " + "working queue empty\n", __func__); + return; + } + + done_frame = + list_entry(cam->working_q.next, struct mxc_v4l_frame, queue); + if (done_frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + done_frame->buffer.flags |= V4L2_BUF_FLAG_DONE; + done_frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + if (list_empty(&cam->ready_q)) { + cam->skip_frame++; + } else { + ready_frame = list_entry(cam->ready_q.next, + struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&ready_frame->queue, &cam->working_q); + + if (cam->ping_pong_csi == 1) { + __raw_writel(cam->frame[ready_frame->index]. + paddress, CSI_CSIDMASA_FB1); + } else { + __raw_writel(cam->frame[ready_frame->index]. + paddress, CSI_CSIDMASA_FB2); + } + } + + /* Added to the done queue */ + list_del(cam->working_q.next); + list_add_tail(&done_frame->queue, &cam->done_q); + cam->enc_counter++; + wake_up_interruptible(&cam->enc_queue); + } else { + pr_err("ERROR: v4l2 capture: %s: " + "buffer not queued\n", __func__); + } + + return; +} + +/*! + * Make csi ready for capture image. + * + * @param cam structure cam_data * + * + * @return status 0 success + */ +static int csi_cap_image(cam_data *cam) +{ + unsigned int value; + + value = __raw_readl(CSI_CSICR3); + __raw_writel(value | BIT_DMA_REFLASH_RFF | BIT_FRMCNT_RST, CSI_CSICR3); + value = __raw_readl(CSI_CSISR); + __raw_writel(value, CSI_CSISR); + + return 0; +} + +/*************************************************************************** + * Functions for handling Frame buffers. + **************************************************************************/ + +/*! + * Free frame buffers + * + * @param cam Structure cam_data * + * + * @return status 0 success. + */ +static int csi_free_frame_buf(cam_data *cam) +{ + int i; + + pr_debug("MVC: In %s\n", __func__); + + for (i = 0; i < FRAME_NUM; i++) { + if (cam->frame[i].vaddress != 0) { + dma_free_coherent(0, cam->frame[i].buffer.length, + cam->frame[i].vaddress, + cam->frame[i].paddress); + cam->frame[i].vaddress = 0; + } + } + + return 0; +} + +/*! + * Allocate frame buffers + * + * @param cam Structure cam_data * + * @param count int number of buffer need to allocated + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int csi_allocate_frame_buf(cam_data *cam, int count) +{ + int i; + + pr_debug("In MVC:%s- size=%d\n", + __func__, cam->v2f.fmt.pix.sizeimage); + for (i = 0; i < count; i++) { + cam->frame[i].vaddress = dma_alloc_coherent(0, PAGE_ALIGN + (cam->v2f.fmt. + pix.sizeimage), + &cam->frame[i]. + paddress, + GFP_DMA | + GFP_KERNEL); + if (cam->frame[i].vaddress == 0) { + pr_err("ERROR: v4l2 capture: " + "%s failed.\n", __func__); + csi_free_frame_buf(cam); + return -ENOBUFS; + } + cam->frame[i].buffer.index = i; + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + cam->frame[i].buffer.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->frame[i].buffer.length = PAGE_ALIGN(cam->v2f.fmt. + pix.sizeimage); + cam->frame[i].buffer.memory = V4L2_MEMORY_MMAP; + cam->frame[i].buffer.m.offset = cam->frame[i].paddress; + cam->frame[i].index = i; + } + + return 0; +} + +/*! + * Free frame buffers status + * + * @param cam Structure cam_data * + * + * @return none + */ +static void csi_free_frames(cam_data *cam) +{ + int i; + + pr_debug("In MVC: %s\n", __func__); + + for (i = 0; i < FRAME_NUM; i++) + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + + return; +} + +/*! + * Return the buffer status + * + * @param cam Structure cam_data * + * @param buf Structure v4l2_buffer * + * + * @return status 0 success, EINVAL failed. + */ +static int csi_v4l2_buffer_status(cam_data *cam, struct v4l2_buffer *buf) +{ + pr_debug("In MVC: %s\n", __func__); + + if (buf->index < 0 || buf->index >= FRAME_NUM) { + pr_err("ERROR: v4l2 capture: %s buffers " + "not allocated\n", __func__); + return -EINVAL; + } + + memcpy(buf, &(cam->frame[buf->index].buffer), sizeof(*buf)); + + return 0; +} + +/*! + * Indicates whether the palette is supported. + * + * @param palette V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_UYVY or V4L2_PIX_FMT_YUV420 + * + * @return 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + return (palette == V4L2_PIX_FMT_RGB565) || + (palette == V4L2_PIX_FMT_UYVY) || (palette == V4L2_PIX_FMT_YUV420); +} + +/*! + * Start stream I/O + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int csi_streamon(cam_data *cam) +{ + struct mxc_v4l_frame *frame; + + pr_debug("In MVC: %s\n", __func__); + + if (NULL == cam) { + pr_err("ERROR: v4l2 capture: %s cam parameter is NULL\n", + __func__); + return -1; + } + + /* move the frame from readyq to workingq */ + if (list_empty(&cam->ready_q)) { + pr_err("ERROR: v4l2 capture: %s: " + "ready_q queue empty\n", __func__); + return -1; + } + frame = list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + __raw_writel(cam->frame[frame->index].paddress, CSI_CSIDMASA_FB1); + + if (list_empty(&cam->ready_q)) { + pr_err("ERROR: v4l2 capture: %s: " + "ready_q queue empty\n", __func__); + return -1; + } + frame = list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + __raw_writel(cam->frame[frame->index].paddress, CSI_CSIDMASA_FB2); + + cam->capture_pid = current->pid; + cam->capture_on = true; + csi_cap_image(cam); + csi_enable_int(1); + + return 0; +} + +/*! + * Stop stream I/O + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int csi_streamoff(cam_data *cam) +{ + unsigned int cr3; + + pr_debug("In MVC: %s\n", __func__); + + if (cam->capture_on == false) + return 0; + + csi_disable_int(); + cam->capture_on = false; + + /* set CSI_CSIDMASA_FB1 and CSI_CSIDMASA_FB2 to default value */ + __raw_writel(0, CSI_CSIDMASA_FB1); + __raw_writel(0, CSI_CSIDMASA_FB2); + cr3 = __raw_readl(CSI_CSICR3); + __raw_writel(cr3 | BIT_DMA_REFLASH_RFF, CSI_CSICR3); + + csi_free_frames(cam); + csi_free_frame_buf(cam); + + return 0; +} + +/*! + * start the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int start_preview(cam_data *cam) +{ + unsigned long fb_addr = (unsigned long)cam->v4l2_fb.base; + + __raw_writel(fb_addr, CSI_CSIDMASA_FB1); + __raw_writel(fb_addr, CSI_CSIDMASA_FB2); + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_DMA_REFLASH_RFF, CSI_CSICR3); + + csi_enable_int(0); + + return 0; +} + +/*! + * shut down the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int stop_preview(cam_data *cam) +{ + csi_disable_int(); + + /* set CSI_CSIDMASA_FB1 and CSI_CSIDMASA_FB2 to default value */ + __raw_writel(0, CSI_CSIDMASA_FB1); + __raw_writel(0, CSI_CSIDMASA_FB2); + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_DMA_REFLASH_RFF, CSI_CSICR3); + + return 0; +} + +/*************************************************************************** + * VIDIOC Functions. + **************************************************************************/ + +/*! + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int csi_v4l2_g_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + f->fmt.pix = cam->v2f.fmt.pix; + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_OVERLAY\n"); + f->fmt.win = cam->win; + break; + default: + pr_debug(" type is invalid\n"); + retval = -EINVAL; + } + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + + return retval; +} + +/*! + * V4L2 - csi_v4l2_s_fmt function + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int csi_v4l2_s_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + int size = 0; + int bytesperline = 0; + int *width, *height; + + pr_debug("In MVC: %s\n", __func__); + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type=V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + if (!valid_mode(f->fmt.pix.pixelformat)) { + pr_err("ERROR: v4l2 capture: %s: format " + "not supported\n", __func__); + return -EINVAL; + } + + /* Handle case where size requested is larger than cuurent + * camera setting. */ + if ((f->fmt.pix.width > cam->crop_bounds.width) + || (f->fmt.pix.height > cam->crop_bounds.height)) { + /* Need the logic here, calling vidioc_s_param if + * camera can change. */ + pr_debug("csi_v4l2_s_fmt size changed\n"); + } + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + height = &f->fmt.pix.width; + width = &f->fmt.pix.height; + } else { + width = &f->fmt.pix.width; + height = &f->fmt.pix.height; + } + + if ((cam->crop_bounds.width / *width > 8) || + ((cam->crop_bounds.width / *width == 8) && + (cam->crop_bounds.width % *width))) { + *width = cam->crop_bounds.width / 8; + if (*width % 8) + *width += 8 - *width % 8; + pr_err("ERROR: v4l2 capture: width exceeds limit " + "resize to %d.\n", *width); + } + + if ((cam->crop_bounds.height / *height > 8) || + ((cam->crop_bounds.height / *height == 8) && + (cam->crop_bounds.height % *height))) { + *height = cam->crop_bounds.height / 8; + if (*height % 8) + *height += 8 - *height % 8; + pr_err("ERROR: v4l2 capture: height exceeds limit " + "resize to %d.\n", *height); + } + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_RGB565: + size = f->fmt.pix.width * f->fmt.pix.height * 2; + csi_set_16bit_imagpara(f->fmt.pix.width, + f->fmt.pix.height); + bytesperline = f->fmt.pix.width * 2; + break; + case V4L2_PIX_FMT_UYVY: + size = f->fmt.pix.width * f->fmt.pix.height * 2; + csi_set_16bit_imagpara(f->fmt.pix.width, + f->fmt.pix.height); + bytesperline = f->fmt.pix.width * 2; + break; + case V4L2_PIX_FMT_YUV420: + size = f->fmt.pix.width * f->fmt.pix.height * 3 / 2; + csi_set_12bit_imagpara(f->fmt.pix.width, + f->fmt.pix.height); + bytesperline = f->fmt.pix.width; + break; + case V4L2_PIX_FMT_YUV422P: + case V4L2_PIX_FMT_RGB24: + case V4L2_PIX_FMT_BGR24: + case V4L2_PIX_FMT_BGR32: + case V4L2_PIX_FMT_RGB32: + case V4L2_PIX_FMT_NV12: + default: + pr_debug(" case not supported\n"); + break; + } + + if (f->fmt.pix.bytesperline < bytesperline) + f->fmt.pix.bytesperline = bytesperline; + else + bytesperline = f->fmt.pix.bytesperline; + + if (f->fmt.pix.sizeimage < size) + f->fmt.pix.sizeimage = size; + else + size = f->fmt.pix.sizeimage; + + cam->v2f.fmt.pix = f->fmt.pix; + + if (cam->v2f.fmt.pix.priv != 0) { + if (copy_from_user(&cam->offset, + (void *)cam->v2f.fmt.pix.priv, + sizeof(cam->offset))) { + retval = -EFAULT; + break; + } + } + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + pr_debug(" type=V4L2_BUF_TYPE_VIDEO_OVERLAY\n"); + cam->win = f->fmt.win; + break; + default: + retval = -EINVAL; + } + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + + return retval; +} + +/*! + * V4L2 - csi_v4l2_s_param function + * Allows setting of capturemode and frame rate. + * + * @param cam structure cam_data * + * @param parm structure v4l2_streamparm * + * + * @return status 0 success, EINVAL failed + */ +static int csi_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm) +{ + struct v4l2_ifparm ifparm; + struct v4l2_format cam_fmt; + struct v4l2_streamparm currentparm; + int err = 0; + + pr_debug("In %s\n", __func__); + + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_err(KERN_ERR "%s invalid type\n", __func__); + return -EINVAL; + } + + /* Stop the viewfinder */ + if (cam->overlay_on == true) + stop_preview(cam); + + currentparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + + /* First check that this device can support the changes requested. */ + err = vidioc_int_g_parm(cam->sensor, ¤tparm); + if (err) { + pr_err("%s: vidioc_int_g_parm returned an error %d\n", + __func__, err); + goto exit; + } + + pr_debug(" Current capabilities are %x\n", + currentparm.parm.capture.capability); + pr_debug(" Current capturemode is %d change to %d\n", + currentparm.parm.capture.capturemode, + parm->parm.capture.capturemode); + pr_debug(" Current framerate is %d change to %d\n", + currentparm.parm.capture.timeperframe.denominator, + parm->parm.capture.timeperframe.denominator); + + err = vidioc_int_s_parm(cam->sensor, parm); + if (err) { + pr_err("%s: vidioc_int_s_parm returned an error %d\n", + __func__, err); + goto exit; + } + + vidioc_int_g_ifparm(cam->sensor, &ifparm); + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + pr_debug(" g_fmt_cap returns widthxheight of input as %d x %d\n", + cam_fmt.fmt.pix.width, cam_fmt.fmt.pix.height); + +exit: + return err; +} + +/*! + * Dequeue one V4L capture buffer + * + * @param cam structure cam_data * + * @param buf structure v4l2_buffer * + * + * @return status 0 success, EINVAL invalid frame number + * ETIME timeout, ERESTARTSYS interrupted by user + */ +static int csi_v4l_dqueue(cam_data *cam, struct v4l2_buffer *buf) +{ + int retval = 0; + struct mxc_v4l_frame *frame; + unsigned long lock_flags; + + if (!wait_event_interruptible_timeout(cam->enc_queue, + cam->enc_counter != 0, 10 * HZ)) { + pr_err("ERROR: v4l2 capture: mxc_v4l_dqueue timeout " + "enc_counter %x\n", cam->enc_counter); + return -ETIME; + } else if (signal_pending(current)) { + pr_err("ERROR: v4l2 capture: mxc_v4l_dqueue() " + "interrupt received\n"); + return -ERESTARTSYS; + } + + spin_lock_irqsave(&cam->dqueue_int_lock, lock_flags); + + cam->enc_counter--; + + frame = list_entry(cam->done_q.next, struct mxc_v4l_frame, queue); + list_del(cam->done_q.next); + + if (frame->buffer.flags & V4L2_BUF_FLAG_DONE) { + frame->buffer.flags &= ~V4L2_BUF_FLAG_DONE; + } else if (frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + pr_err("ERROR: v4l2 capture: VIDIOC_DQBUF: " + "Buffer not filled.\n"); + frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + retval = -EINVAL; + } else if ((frame->buffer.flags & 0x7) == V4L2_BUF_FLAG_MAPPED) { + pr_err("ERROR: v4l2 capture: VIDIOC_DQBUF: " + "Buffer not queued.\n"); + retval = -EINVAL; + } + + spin_unlock_irqrestore(&cam->dqueue_int_lock, lock_flags); + + buf->bytesused = cam->v2f.fmt.pix.sizeimage; + buf->index = frame->index; + buf->flags = frame->buffer.flags; + buf->m = cam->frame[frame->index].buffer.m; + + return retval; +} + +/*! + * V4L interface - open function + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int csi_v4l_open(struct file *file) +{ + struct v4l2_ifparm ifparm; + struct v4l2_format cam_fmt; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int err = 0; + + pr_debug(" device name is %s\n", dev->name); + + if (!cam) { + pr_err("ERROR: v4l2 capture: Internal error, " + "cam_data not found!\n"); + return -EBADF; + } + + down(&cam->busy_lock); + err = 0; + if (signal_pending(current)) + goto oops; + + if (cam->open_count++ == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + + vidioc_int_g_ifparm(cam->sensor, &ifparm); + + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + csi_enable_mclk(CSI_MCLK_I2C, true, true); + vidioc_int_init(cam->sensor); + } + + file->private_data = dev; + +oops: + up(&cam->busy_lock); + return err; +} + +/*! + * V4L interface - close function + * + * @param file struct file * + * + * @return 0 success + */ +static int csi_v4l_close(struct file *file) +{ + struct video_device *dev = video_devdata(file); + int err = 0; + cam_data *cam = video_get_drvdata(dev); + + pr_debug("In MVC:%s\n", __func__); + + if (!cam) { + pr_err("ERROR: v4l2 capture: Internal error, " + "cam_data not found!\n"); + return -EBADF; + } + + /* for the case somebody hit the ctrl C */ + if (cam->overlay_pid == current->pid) { + err = stop_preview(cam); + cam->overlay_on = false; + } + + if (--cam->open_count == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + file->private_data = NULL; + csi_enable_mclk(CSI_MCLK_I2C, false, false); + } + + return err; +} + +/* + * V4L interface - read function + * + * @param file struct file * + * @param read buf char * + * @param count size_t + * @param ppos structure loff_t * + * + * @return bytes read + */ +static ssize_t csi_v4l_read(struct file *file, char *buf, size_t count, + loff_t *ppos) +{ + int err = 0; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + /* Stop the viewfinder */ + if (cam->overlay_on == true) + stop_preview(cam); + + if (cam->still_buf_vaddr == NULL) { + cam->still_buf_vaddr = dma_alloc_coherent(0, + PAGE_ALIGN + (cam->v2f.fmt. + pix.sizeimage), + &cam-> + still_buf, + GFP_DMA | GFP_KERNEL); + if (cam->still_buf_vaddr == NULL) { + pr_err("alloc dma memory failed\n"); + return -ENOMEM; + } + cam->still_counter = 0; + __raw_writel(cam->still_buf, CSI_CSIDMASA_FB2); + __raw_writel(cam->still_buf, CSI_CSIDMASA_FB1); + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_DMA_REFLASH_RFF, + CSI_CSICR3); + __raw_writel(__raw_readl(CSI_CSISR), CSI_CSISR); + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_FRMCNT_RST, + CSI_CSICR3); + csi_enable_int(1); + } + + wait_event_interruptible(cam->still_queue, cam->still_counter); + csi_disable_int(); + err = copy_to_user(buf, cam->still_buf_vaddr, + cam->v2f.fmt.pix.sizeimage); + + if (cam->still_buf_vaddr != NULL) { + dma_free_coherent(0, PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage), + cam->still_buf_vaddr, cam->still_buf); + cam->still_buf = 0; + cam->still_buf_vaddr = NULL; + } + + if (cam->overlay_on == true) + start_preview(cam); + + up(&cam->busy_lock); + if (err < 0) + return err; + + return cam->v2f.fmt.pix.sizeimage - err; +} + +/*! + * V4L interface - ioctl function + * + * @param file struct file* + * + * @param ioctlnr unsigned int + * + * @param arg void* + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static long csi_v4l_do_ioctl(struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int retval = 0; + unsigned long lock_flags; + + pr_debug("In MVC: %s, %x\n", __func__, ioctlnr); + wait_event_interruptible(cam->power_queue, cam->low_power == false); + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + /*! + * V4l2 VIDIOC_G_FMT ioctl + */ + case VIDIOC_G_FMT:{ + struct v4l2_format *gf = arg; + pr_debug(" case VIDIOC_G_FMT\n"); + retval = csi_v4l2_g_fmt(cam, gf); + break; + } + + /*! + * V4l2 VIDIOC_S_FMT ioctl + */ + case VIDIOC_S_FMT:{ + struct v4l2_format *sf = arg; + pr_debug(" case VIDIOC_S_FMT\n"); + retval = csi_v4l2_s_fmt(cam, sf); + vidioc_int_s_fmt_cap(cam->sensor, sf); + break; + } + + /*! + * V4l2 VIDIOC_OVERLAY ioctl + */ + case VIDIOC_OVERLAY:{ + int *on = arg; + pr_debug(" case VIDIOC_OVERLAY\n"); + if (*on) { + cam->overlay_on = true; + cam->overlay_pid = current->pid; + start_preview(cam); + } + if (!*on) { + stop_preview(cam); + cam->overlay_on = false; + } + break; + } + + /*! + * V4l2 VIDIOC_G_FBUF ioctl + */ + case VIDIOC_G_FBUF:{ + struct v4l2_framebuffer *fb = arg; + *fb = cam->v4l2_fb; + fb->capability = V4L2_FBUF_CAP_EXTERNOVERLAY; + break; + } + + /*! + * V4l2 VIDIOC_S_FBUF ioctl + */ + case VIDIOC_S_FBUF:{ + struct v4l2_framebuffer *fb = arg; + cam->v4l2_fb = *fb; + break; + } + + case VIDIOC_G_PARM:{ + struct v4l2_streamparm *parm = arg; + pr_debug(" case VIDIOC_G_PARM\n"); + vidioc_int_g_parm(cam->sensor, parm); + break; + } + + case VIDIOC_S_PARM:{ + struct v4l2_streamparm *parm = arg; + pr_debug(" case VIDIOC_S_PARM\n"); + retval = csi_v4l2_s_param(cam, parm); + break; + } + + case VIDIOC_QUERYCAP:{ + struct v4l2_capability *cap = arg; + pr_debug(" case VIDIOC_QUERYCAP\n"); + strcpy(cap->driver, "csi_v4l2"); + cap->version = KERNEL_VERSION(0, 1, 11); + cap->capabilities = V4L2_CAP_VIDEO_OVERLAY | + V4L2_CAP_VIDEO_OUTPUT_OVERLAY | V4L2_CAP_READWRITE; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + break; + } + + case VIDIOC_S_CROP: + pr_debug(" case not supported\n"); + break; + + case VIDIOC_REQBUFS: { + struct v4l2_requestbuffers *req = arg; + pr_debug(" case VIDIOC_REQBUFS\n"); + + if (req->count > FRAME_NUM) { + pr_err("ERROR: v4l2 capture: VIDIOC_REQBUFS: " + "not enough buffers\n"); + req->count = FRAME_NUM; + } + + if ((req->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) || + (req->memory != V4L2_MEMORY_MMAP)) { + pr_err("ERROR: v4l2 capture: VIDIOC_REQBUFS: " + "wrong buffer type\n"); + retval = -EINVAL; + break; + } + + csi_streamoff(cam); + csi_free_frame_buf(cam); + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + retval = csi_allocate_frame_buf(cam, req->count); + break; + } + + case VIDIOC_QUERYBUF: { + struct v4l2_buffer *buf = arg; + int index = buf->index; + pr_debug(" case VIDIOC_QUERYBUF\n"); + + if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + retval = -EINVAL; + break; + } + + memset(buf, 0, sizeof(buf)); + buf->index = index; + retval = csi_v4l2_buffer_status(cam, buf); + break; + } + + case VIDIOC_QBUF: { + struct v4l2_buffer *buf = arg; + int index = buf->index; + pr_debug(" case VIDIOC_QBUF\n"); + + spin_lock_irqsave(&cam->queue_int_lock, lock_flags); + cam->frame[index].buffer.m.offset = buf->m.offset; + if ((cam->frame[index].buffer.flags & 0x7) == + V4L2_BUF_FLAG_MAPPED) { + cam->frame[index].buffer.flags |= V4L2_BUF_FLAG_QUEUED; + if (cam->skip_frame > 0) { + list_add_tail(&cam->frame[index].queue, + &cam->working_q); + cam->skip_frame = 0; + + if (cam->ping_pong_csi == 1) { + __raw_writel(cam->frame[index].paddress, + CSI_CSIDMASA_FB1); + } else { + __raw_writel(cam->frame[index].paddress, + CSI_CSIDMASA_FB2); + } + } else { + list_add_tail(&cam->frame[index].queue, + &cam->ready_q); + } + } else if (cam->frame[index].buffer.flags & + V4L2_BUF_FLAG_QUEUED) { + pr_err("ERROR: v4l2 capture: VIDIOC_QBUF: " + "buffer already queued\n"); + retval = -EINVAL; + } else if (cam->frame[index].buffer. + flags & V4L2_BUF_FLAG_DONE) { + pr_err("ERROR: v4l2 capture: VIDIOC_QBUF: " + "overwrite done buffer.\n"); + cam->frame[index].buffer.flags &= + ~V4L2_BUF_FLAG_DONE; + cam->frame[index].buffer.flags |= + V4L2_BUF_FLAG_QUEUED; + retval = -EINVAL; + } + buf->flags = cam->frame[index].buffer.flags; + spin_unlock_irqrestore(&cam->queue_int_lock, lock_flags); + + break; + } + + case VIDIOC_DQBUF: { + struct v4l2_buffer *buf = arg; + pr_debug(" case VIDIOC_DQBUF\n"); + + retval = csi_v4l_dqueue(cam, buf); + + break; + } + + case VIDIOC_STREAMON: { + pr_debug(" case VIDIOC_STREAMON\n"); + retval = csi_streamon(cam); + break; + } + + case VIDIOC_STREAMOFF: { + pr_debug(" case VIDIOC_STREAMOFF\n"); + retval = csi_streamoff(cam); + break; + } + + case VIDIOC_S_CTRL: + case VIDIOC_G_STD: + case VIDIOC_G_OUTPUT: + case VIDIOC_S_OUTPUT: + case VIDIOC_ENUMSTD: + case VIDIOC_G_CROP: + case VIDIOC_CROPCAP: + case VIDIOC_S_STD: + case VIDIOC_G_CTRL: + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_ENUMINPUT: + case VIDIOC_G_INPUT: + case VIDIOC_S_INPUT: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + case VIDIOC_ENUMOUTPUT: + default: + pr_debug(" case not supported\n"); + retval = -EINVAL; + break; + } + + up(&cam->busy_lock); + return retval; +} + +/* + * V4L interface - ioctl function + * + * @return None + */ +static long csi_v4l_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + return video_usercopy(file, cmd, arg, csi_v4l_do_ioctl); +} + +/*! + * V4L interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, ENOBUFS remap_page error + */ +static int csi_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *dev = video_devdata(file); + unsigned long size; + int res = 0; + cam_data *cam = video_get_drvdata(dev); + + pr_debug("%s\n", __func__); + pr_debug("\npgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + size = vma->vm_end - vma->vm_start; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + pr_err("ERROR: v4l2 capture: %s : " + "remap_pfn_range failed\n", __func__); + res = -ENOBUFS; + goto csi_mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + +csi_mmap_exit: + up(&cam->busy_lock); + return res; +} + +/*! + * This structure defines the functions to be called in this driver. + */ +static struct v4l2_file_operations csi_v4l_fops = { + .owner = THIS_MODULE, + .open = csi_v4l_open, + .release = csi_v4l_close, + .read = csi_v4l_read, + .ioctl = csi_v4l_ioctl, + .mmap = csi_mmap, +}; + +static struct video_device csi_v4l_template = { + .name = "Mx25 Camera", + .fops = &csi_v4l_fops, + .release = video_device_release, +}; + +/*! + * This function can be used to release any platform data on closing. + */ +static void camera_platform_release(struct device *device) +{ +} + +/*! Device Definition for csi v4l2 device */ +static struct platform_device csi_v4l2_devices = { + .name = "csi_v4l2", + .dev = { + .release = camera_platform_release, + }, + .id = 0, +}; + +/*! + * initialize cam_data structure + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static void init_camera_struct(cam_data *cam) +{ + pr_debug("In MVC: %s\n", __func__); + + /* Default everything to 0 */ + memset(cam, 0, sizeof(cam_data)); + + init_MUTEX(&cam->param_lock); + init_MUTEX(&cam->busy_lock); + + cam->video_dev = video_device_alloc(); + if (cam->video_dev == NULL) + return; + + *(cam->video_dev) = csi_v4l_template; + + video_set_drvdata(cam->video_dev, cam); + dev_set_drvdata(&csi_v4l2_devices.dev, (void *)cam); + cam->video_dev->minor = -1; + + init_waitqueue_head(&cam->enc_queue); + init_waitqueue_head(&cam->still_queue); + + cam->streamparm.parm.capture.capturemode = 0; + + cam->standard.index = 0; + cam->standard.id = V4L2_STD_UNKNOWN; + cam->standard.frameperiod.denominator = 30; + cam->standard.frameperiod.numerator = 1; + cam->standard.framelines = 480; + cam->standard_autodetect = true; + cam->streamparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->streamparm.parm.capture.timeperframe = cam->standard.frameperiod; + cam->streamparm.parm.capture.capability = V4L2_CAP_TIMEPERFRAME; + cam->overlay_on = false; + cam->capture_on = false; + cam->skip_frame = 0; + cam->v4l2_fb.flags = V4L2_FBUF_FLAG_OVERLAY; + + cam->v2f.fmt.pix.sizeimage = 480 * 640 * 2; + cam->v2f.fmt.pix.bytesperline = 640 * 2; + cam->v2f.fmt.pix.width = 640; + cam->v2f.fmt.pix.height = 480; + cam->v2f.fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY; + cam->win.w.width = 160; + cam->win.w.height = 160; + cam->win.w.left = 0; + cam->win.w.top = 0; + cam->still_counter = 0; + + cam->enc_callback = camera_callback; + csi_start_callback(cam); + init_waitqueue_head(&cam->power_queue); + spin_lock_init(&cam->queue_int_lock); + spin_lock_init(&cam->dqueue_int_lock); +} + +/*! + * camera_power function + * Turns Sensor power On/Off + * + * @param cam cam data struct + * @param cameraOn true to turn camera on, false to turn off power. + * + * @return status + */ +static u8 camera_power(cam_data *cam, bool cameraOn) +{ + pr_debug("In MVC: %s on=%d\n", __func__, cameraOn); + + if (cameraOn == true) { + csi_enable_mclk(CSI_MCLK_I2C, true, true); + vidioc_int_s_power(cam->sensor, 1); + } else { + csi_enable_mclk(CSI_MCLK_I2C, false, false); + vidioc_int_s_power(cam->sensor, 0); + } + return 0; +} + +/*! + * This function is called to put the sensor in a low power state. + * Refer to the document driver-model/driver.txt in the kernel source tree + * for more information. + * + * @param pdev the device structure used to give information on which I2C + * to suspend + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure. + */ +static int csi_v4l2_suspend(struct platform_device *pdev, pm_message_t state) +{ + cam_data *cam = platform_get_drvdata(pdev); + + pr_debug("In MVC: %s\n", __func__); + + if (cam == NULL) + return -1; + + cam->low_power = true; + + if (cam->overlay_on == true) + stop_preview(cam); + + camera_power(cam, false); + + return 0; +} + +/*! + * This function is called to bring the sensor back from a low power state. + * Refer to the document driver-model/driver.txt in the kernel source tree + * for more information. + * + * @param pdev the device structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int csi_v4l2_resume(struct platform_device *pdev) +{ + cam_data *cam = platform_get_drvdata(pdev); + + pr_debug("In MVC: %s\n", __func__); + + if (cam == NULL) + return -1; + + cam->low_power = false; + wake_up_interruptible(&cam->power_queue); + camera_power(cam, true); + + if (cam->overlay_on == true) + start_preview(cam); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver csi_v4l2_driver = { + .driver = { + .name = "csi_v4l2", + }, + .probe = NULL, + .remove = NULL, +#ifdef CONFIG_PM + .suspend = csi_v4l2_suspend, + .resume = csi_v4l2_resume, +#endif + .shutdown = NULL, +}; + +/*! + * Initializes the camera driver. + */ +static int csi_v4l2_master_attach(struct v4l2_int_device *slave) +{ + cam_data *cam = slave->u.slave->master->priv; + struct v4l2_format cam_fmt; + + pr_debug("In MVC: %s\n", __func__); + pr_debug(" slave.name = %s\n", slave->name); + pr_debug(" master.name = %s\n", slave->u.slave->master->name); + + cam->sensor = slave; + if (slave == NULL) { + pr_err("ERROR: v4l2 capture: slave parameter not valid.\n"); + return -1; + } + + csi_enable_mclk(CSI_MCLK_I2C, true, true); + vidioc_int_dev_init(slave); + csi_enable_mclk(CSI_MCLK_I2C, false, false); + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + + /* Used to detect TV in (type 1) vs. camera (type 0) */ + cam->device_type = cam_fmt.fmt.pix.priv; + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + + return 0; +} + +/*! + * Disconnects the camera driver. + */ +static void csi_v4l2_master_detach(struct v4l2_int_device *slave) +{ + pr_debug("In MVC: %s\n", __func__); + + vidioc_int_dev_exit(slave); +} + +/*! + * Entry point for the V4L2 + * + * @return Error code indicating success or failure + */ +static __init int camera_init(void) +{ + u8 err = 0; + + /* Register the device driver structure. */ + err = platform_driver_register(&csi_v4l2_driver); + if (err != 0) { + pr_err("ERROR: v4l2 capture:camera_init: " + "platform_driver_register failed.\n"); + return err; + } + + /* Create g_cam and initialize it. */ + g_cam = kmalloc(sizeof(cam_data), GFP_KERNEL); + if (g_cam == NULL) { + pr_err("ERROR: v4l2 capture: failed to register camera\n"); + platform_driver_unregister(&csi_v4l2_driver); + return -1; + } + init_camera_struct(g_cam); + + /* Set up the v4l2 device and register it */ + csi_v4l2_int_device.priv = g_cam; + /* This function contains a bug that won't let this be rmmod'd. */ + v4l2_int_device_register(&csi_v4l2_int_device); + + /* Register the platform device */ + err = platform_device_register(&csi_v4l2_devices); + if (err != 0) { + pr_err("ERROR: v4l2 capture: camera_init: " + "platform_device_register failed.\n"); + platform_driver_unregister(&csi_v4l2_driver); + kfree(g_cam); + g_cam = NULL; + return err; + } + + /* register v4l video device */ + if (video_register_device(g_cam->video_dev, VFL_TYPE_GRABBER, video_nr) + == -1) { + platform_device_unregister(&csi_v4l2_devices); + platform_driver_unregister(&csi_v4l2_driver); + kfree(g_cam); + g_cam = NULL; + pr_err("ERROR: v4l2 capture: video_register_device failed\n"); + return -1; + } + pr_debug(" Video device registered: %s #%d\n", + g_cam->video_dev->name, g_cam->video_dev->minor); + + return err; +} + +/*! + * Exit and cleanup for the V4L2 + */ +static void __exit camera_exit(void) +{ + pr_debug("In MVC: %s\n", __func__); + + if (g_cam->open_count) { + pr_err("ERROR: v4l2 capture:camera open " + "-- setting ops to NULL\n"); + } else { + pr_info("V4L2 freeing image input device\n"); + v4l2_int_device_unregister(&csi_v4l2_int_device); + csi_stop_callback(g_cam); + video_unregister_device(g_cam->video_dev); + platform_driver_unregister(&csi_v4l2_driver); + platform_device_unregister(&csi_v4l2_devices); + + kfree(g_cam); + g_cam = NULL; + } +} + +module_init(camera_init); +module_exit(camera_exit); + +module_param(video_nr, int, 0444); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2 capture driver for Mx25 based cameras"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ov3640.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ov3640.c @@ -0,0 +1,1393 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" + +#define OV3640_VOLTAGE_ANALOG 2800000 +#define OV3640_VOLTAGE_DIGITAL_CORE 1500000 +#define OV3640_VOLTAGE_DIGITAL_IO 1800000 + + +/* Check these values! */ +#define MIN_FPS 15 +#define MAX_FPS 30 +#define DEFAULT_FPS 30 + +#define OV3640_XCLK_MIN 6000000 +#define OV3640_XCLK_MAX 24000000 + +enum ov3640_mode { + ov3640_mode_MIN = 0, + ov3640_mode_VGA_640_480 = 0, + ov3640_mode_QVGA_320_240 = 1, + ov3640_mode_QXGA_2048_1536 = 2, + ov3640_mode_XGA_1024_768 = 3, + ov3640_mode_NTSC_720_480 = 4, + ov3640_mode_PAL_720_576 = 5, + ov3640_mode_MAX = 5 +}; + +enum ov3640_frame_rate { + ov3640_15_fps, + ov3640_30_fps +}; + +struct reg_value { + u16 u16RegAddr; + u8 u8Val; + u8 u8Mask; + u32 u32Delay_ms; +}; + +struct ov3640_mode_info { + enum ov3640_mode mode; + u32 width; + u32 height; + struct reg_value *init_data_ptr; + u32 init_data_size; +}; + +/*! + * Maintains the information on the current state of the sesor. + */ +struct sensor { + const struct ov3640_platform_data *platform_data; + struct v4l2_int_device *v4l2_int_device; + struct i2c_client *i2c_client; + struct v4l2_pix_format pix; + struct v4l2_captureparm streamcap; + bool on; + + /* control settings */ + int brightness; + int hue; + int contrast; + int saturation; + int red; + int green; + int blue; + int ae_mode; + + u32 mclk; + int csi; +} ov3640_data; + +static struct reg_value ov3640_setting_15fps_QXGA_2048_1536[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x00, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x30d7, 0x10, 0, 0}, {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x04, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, + {0x30bb, 0x08, 0, 0}, {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, + {0x3100, 0x02, 0, 0}, {0x3301, 0xde, 0, 0}, {0x3304, 0x00, 0, 0}, + {0x3400, 0x00, 0, 0}, {0x3404, 0x02, 0, 0}, {0x3600, 0xc4, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x3020, 0x01, 0, 0}, {0x3021, 0x1d, 0, 0}, + {0x3022, 0x00, 0, 0}, {0x3023, 0x0a, 0, 0}, {0x3024, 0x08, 0, 0}, + {0x3025, 0x00, 0, 0}, {0x3026, 0x06, 0, 0}, {0x3027, 0x00, 0, 0}, + {0x335f, 0x68, 0, 0}, {0x3360, 0x00, 0, 0}, {0x3361, 0x00, 0, 0}, + {0x3362, 0x68, 0, 0}, {0x3363, 0x00, 0, 0}, {0x3364, 0x00, 0, 0}, + {0x3403, 0x00, 0, 0}, {0x3088, 0x08, 0, 0}, {0x3089, 0x00, 0, 0}, + {0x308a, 0x06, 0, 0}, {0x308b, 0x00, 0, 0}, {0x307c, 0x10, 0, 0}, + {0x3090, 0xc0, 0, 0}, {0x304c, 0x84, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3012, 0x00, 0, 0}, + {0x3020, 0x01, 0, 0}, {0x3021, 0x1d, 0, 0}, {0x3022, 0x00, 0, 0}, + {0x3023, 0x0a, 0, 0}, {0x3024, 0x08, 0, 0}, {0x3025, 0x18, 0, 0}, + {0x3026, 0x06, 0, 0}, {0x3027, 0x0c, 0, 0}, {0x302a, 0x06, 0, 0}, + {0x302b, 0x20, 0, 0}, {0x3075, 0x44, 0, 0}, {0x300d, 0x00, 0, 0}, + {0x30d7, 0x00, 0, 0}, {0x3069, 0x40, 0, 0}, {0x303e, 0x01, 0, 0}, + {0x303f, 0x80, 0, 0}, {0x3302, 0x20, 0, 0}, {0x335f, 0x68, 0, 0}, + {0x3360, 0x18, 0, 0}, {0x3361, 0x0c, 0, 0}, {0x3362, 0x68, 0, 0}, + {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x08, 0, 0}, {0x3089, 0x00, 0, 0}, {0x308a, 0x06, 0, 0}, + {0x308b, 0x00, 0, 0}, +}; + +static struct reg_value ov3640_setting_15fps_XGA_1024_768[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x00, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x04, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, + {0x30bb, 0x08, 0, 0}, {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, + {0x3100, 0x02, 0, 0}, {0x3301, 0xde, 0, 0}, {0x3304, 0x00, 0, 0}, + {0x3400, 0x01, 0, 0}, {0x3404, 0x1d, 0, 0}, {0x3600, 0xc4, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x3020, 0x01, 0, 0}, {0x3021, 0x1d, 0, 0}, + {0x3022, 0x00, 0, 0}, {0x3023, 0x0a, 0, 0}, {0x3024, 0x08, 0, 0}, + {0x3025, 0x00, 0, 0}, {0x3026, 0x06, 0, 0}, {0x3027, 0x00, 0, 0}, + {0x335f, 0x68, 0, 0}, {0x3360, 0x00, 0, 0}, {0x3361, 0x00, 0, 0}, + {0x3362, 0x34, 0, 0}, {0x3363, 0x00, 0, 0}, {0x3364, 0x00, 0, 0}, + {0x3403, 0x00, 0, 0}, {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, + {0x308a, 0x03, 0, 0}, {0x308b, 0x00, 0, 0}, {0x307c, 0x10, 0, 0}, + {0x3090, 0xc0, 0, 0}, {0x304c, 0x84, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3011, 0x01, 0, 0}, +}; + +static struct reg_value ov3640_setting_30fps_XGA_1024_768[] = { + {0x0, 0x0, 0} +}; + +static struct reg_value ov3640_setting_15fps_VGA_640_480[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x00, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x30d7, 0x10, 0, 0}, {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x04, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, + {0x30bb, 0x08, 0, 0}, {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, + {0x3100, 0x02, 0, 0}, {0x3301, 0xde, 0, 0}, {0x3304, 0x00, 0, 0}, + {0x3400, 0x00, 0, 0}, {0x3404, 0x42, 0, 0}, {0x3600, 0xc4, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x3020, 0x01, 0, 0}, {0x3021, 0x1d, 0, 0}, + {0x3022, 0x00, 0, 0}, {0x3023, 0x0a, 0, 0}, {0x3024, 0x08, 0, 0}, + {0x3025, 0x00, 0, 0}, {0x3026, 0x06, 0, 0}, {0x3027, 0x00, 0, 0}, + {0x335f, 0x68, 0, 0}, {0x3360, 0x00, 0, 0}, {0x3361, 0x00, 0, 0}, + {0x3362, 0x12, 0, 0}, {0x3363, 0x80, 0, 0}, {0x3364, 0xe0, 0, 0}, + {0x3403, 0x00, 0, 0}, {0x3088, 0x02, 0, 0}, {0x3089, 0x80, 0, 0}, + {0x308a, 0x01, 0, 0}, {0x308b, 0xe0, 0, 0}, {0x307c, 0x10, 0, 0}, + {0x3090, 0xc0, 0, 0}, {0x304c, 0x84, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3011, 0x00, 0, 0}, +}; + +static struct reg_value ov3640_setting_30fps_VGA_640_480[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x30d7, 0x10, 0, 0}, {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x0c, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, + {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0x10, 0x30, 0}, {0x3304, 0x00, 0x03, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x02, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3012, 0x10, 0, 0}, + {0x3023, 0x06, 0, 0}, {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, + {0x302a, 0x03, 0, 0}, {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, + {0x300d, 0x01, 0, 0}, {0x30d7, 0x80, 0x80, 0}, {0x3069, 0x00, 0x40, 0}, + {0x303e, 0x00, 0, 0}, {0x303f, 0xc0, 0, 0}, {0x3302, 0x20, 0x20, 0}, + {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, + {0x3362, 0x12, 0, 0}, {0x3363, 0x88, 0, 0}, {0x3364, 0xe4, 0, 0}, + {0x3403, 0x42, 0, 0}, {0x3088, 0x02, 0, 0}, {0x3089, 0x80, 0, 0}, + {0x308a, 0x01, 0, 0}, {0x308b, 0xe0, 0, 0}, {0x3362, 0x12, 0, 0}, + {0x3363, 0x88, 0, 0}, {0x3364, 0xe4, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x02, 0, 0}, {0x3089, 0x80, 0, 0}, {0x308a, 0x01, 0, 0}, + {0x308b, 0xe0, 0, 0}, {0x300e, 0x37, 0, 0}, {0x300f, 0xe1, 0, 0}, + {0x3010, 0x22, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x84, 0, 0}, + {0x3014, 0x04, 0, 0}, {0x3015, 0x02, 0, 0}, {0x302e, 0x00, 0, 0}, + {0x302d, 0x00, 0, 0}, +}; + +static struct reg_value ov3640_setting_15fps_QVGA_320_240[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x00, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x30d7, 0x10, 0, 0}, {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x04, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, + {0x30bb, 0x08, 0, 0}, {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, + {0x3100, 0x02, 0, 0}, {0x3301, 0xde, 0, 0}, {0x3304, 0x00, 0, 0}, + {0x3400, 0x00, 0, 0}, {0x3404, 0x42, 0, 0}, {0x3600, 0xc4, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x3020, 0x01, 0, 0}, {0x3021, 0x1d, 0, 0}, + {0x3022, 0x00, 0, 0}, {0x3023, 0x0a, 0, 0}, {0x3024, 0x08, 0, 0}, + {0x3025, 0x00, 0, 0}, {0x3026, 0x06, 0, 0}, {0x3027, 0x00, 0, 0}, + {0x335f, 0x68, 0, 0}, {0x3360, 0x00, 0, 0}, {0x3361, 0x00, 0, 0}, + {0x3362, 0x01, 0, 0}, {0x3363, 0x40, 0, 0}, {0x3364, 0xf0, 0, 0}, + {0x3403, 0x00, 0, 0}, {0x3088, 0x01, 0, 0}, {0x3089, 0x40, 0, 0}, + {0x308a, 0x00, 0, 0}, {0x308b, 0xf0, 0, 0}, {0x307c, 0x10, 0, 0}, + {0x3090, 0xc0, 0, 0}, {0x304c, 0x84, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3011, 0x01, 0, 0}, +}; + +static struct reg_value ov3640_setting_30fps_QVGA_320_240[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309c, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x30d7, 0x10, 0, 0}, {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, + {0x3016, 0x82, 0, 0}, {0x3018, 0x38, 0, 0}, {0x3019, 0x30, 0, 0}, + {0x301a, 0x61, 0, 0}, {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, + {0x3082, 0x20, 0, 0}, {0x3015, 0x12, 0, 0}, {0x3014, 0x0c, 0, 0}, + {0x3013, 0xf7, 0, 0}, {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, + {0x303e, 0x06, 0, 0}, {0x303f, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, + {0x3031, 0x26, 0, 0}, {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, + {0x3034, 0xea, 0, 0}, {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, + {0x3037, 0x6a, 0, 0}, {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, + {0x3106, 0x00, 0, 0}, {0x3107, 0xff, 0, 0}, {0x3300, 0x12, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, + {0x3314, 0x42, 0, 0}, {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, + {0x3310, 0xd0, 0, 0}, {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, + {0x330d, 0x18, 0, 0}, {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, + {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, + {0x336a, 0x52, 0, 0}, {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x30b8, 0x20, 0, 0}, {0x30b9, 0x17, 0, 0}, + {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0x10, 0x30, 0}, {0x3304, 0x00, 0x03, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x02, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x308d, 0x04, 0, 0}, + {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, {0x3012, 0x10, 0, 0}, + {0x3023, 0x06, 0, 0}, {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, + {0x302a, 0x03, 0, 0}, {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, + {0x300d, 0x01, 0, 0}, {0x30d7, 0x80, 0x80, 0}, {0x3069, 0x00, 0x40, 0}, + {0x303e, 0x00, 0, 0}, {0x303f, 0xc0, 0, 0}, {0x3302, 0x20, 0x20, 0}, + {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, + {0x3362, 0x34, 0, 0}, {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, + {0x3403, 0x42, 0, 0}, {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, + {0x308a, 0x03, 0, 0}, {0x308b, 0x00, 0, 0}, {0x3362, 0x12, 0, 0}, + {0x3363, 0x88, 0, 0}, {0x3364, 0xe4, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x02, 0, 0}, {0x3089, 0x80, 0, 0}, {0x308a, 0x01, 0, 0}, + {0x308b, 0xe0, 0, 0}, {0x300e, 0x37, 0, 0}, {0x300f, 0xe1, 0, 0}, + {0x3010, 0x22, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x84, 0, 0}, +}; + +static struct reg_value ov3640_setting_15fps_NTSC_720_480[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309C, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x304c, 0x81, 0, 0}, {0x30d7, 0x10, 0, 0}, + {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, {0x3016, 0x82, 0, 0}, + {0x3018, 0x48, 0, 0}, {0x3019, 0x40, 0, 0}, {0x301a, 0x82, 0, 0}, + {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, {0x3082, 0x20, 0, 0}, + {0x3015, 0x12, 0, 0}, {0x3014, 0x84, 0, 0}, {0x3013, 0xf7, 0, 0}, + {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, {0x303e, 0x06, 0, 0}, + {0x303F, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, {0x3031, 0x26, 0, 0}, + {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, {0x3034, 0xea, 0, 0}, + {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, {0x3037, 0x6a, 0, 0}, + {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, {0x3106, 0x00, 0, 0}, + {0x3107, 0xff, 0, 0}, {0x3300, 0x13, 0, 0}, {0x3301, 0xde, 0, 0}, + {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, {0x3314, 0x42, 0, 0}, + {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, {0x3310, 0xd0, 0, 0}, + {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, + {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, {0x330b, 0x1c, 0, 0}, + {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, {0x336a, 0x52, 0, 0}, + {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, {0x30b8, 0x20, 0, 0}, + {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, + {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x3088, 0x08, 0, 0}, + {0x3089, 0x00, 0, 0}, {0x308a, 0x06, 0, 0}, {0x308b, 0x00, 0, 0}, + {0x308d, 0x04, 0, 0}, {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, + {0x30a9, 0xb5, 0, 0}, {0x3317, 0x04, 0, 0}, {0x3316, 0xf8, 0, 0}, + {0x3312, 0x17, 0, 0}, {0x3314, 0x30, 0, 0}, {0x3313, 0x23, 0, 0}, + {0x3315, 0x3e, 0, 0}, {0x3311, 0x9e, 0, 0}, {0x3310, 0xc0, 0, 0}, + {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, {0x330e, 0x5e, 0, 0}, + {0x330f, 0x6c, 0, 0}, {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, + {0x3307, 0x11, 0, 0}, {0x3308, 0x25, 0, 0}, {0x3340, 0x20, 0, 0}, + {0x3341, 0x50, 0, 0}, {0x3342, 0x18, 0, 0}, {0x3343, 0x23, 0, 0}, + {0x3344, 0xad, 0, 0}, {0x3345, 0xd0, 0, 0}, {0x3346, 0xb8, 0, 0}, + {0x3347, 0xb4, 0, 0}, {0x3348, 0x04, 0, 0}, {0x3349, 0x98, 0, 0}, + {0x3355, 0x02, 0, 0}, {0x3358, 0x44, 0, 0}, {0x3359, 0x44, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x3367, 0x23, 0, 0}, {0x3368, 0xBB, 0, 0}, + {0x3369, 0xD6, 0, 0}, {0x336A, 0x2A, 0, 0}, {0x336B, 0x07, 0, 0}, + {0x336C, 0x00, 0, 0}, {0x336D, 0x23, 0, 0}, {0x336E, 0xC3, 0, 0}, + {0x336F, 0xDE, 0, 0}, {0x3370, 0x2b, 0, 0}, {0x3371, 0x07, 0, 0}, + {0x3372, 0x00, 0, 0}, {0x3373, 0x23, 0, 0}, {0x3374, 0x9e, 0, 0}, + {0x3375, 0xD6, 0, 0}, {0x3376, 0x29, 0, 0}, {0x3377, 0x07, 0, 0}, + {0x3378, 0x00, 0, 0}, {0x332a, 0x1d, 0, 0}, {0x331b, 0x08, 0, 0}, + {0x331c, 0x16, 0, 0}, {0x331d, 0x2d, 0, 0}, {0x331e, 0x54, 0, 0}, + {0x331f, 0x66, 0, 0}, {0x3320, 0x73, 0, 0}, {0x3321, 0x80, 0, 0}, + {0x3322, 0x8c, 0, 0}, {0x3323, 0x95, 0, 0}, {0x3324, 0x9d, 0, 0}, + {0x3325, 0xac, 0, 0}, {0x3326, 0xb8, 0, 0}, {0x3327, 0xcc, 0, 0}, + {0x3328, 0xdd, 0, 0}, {0x3329, 0xee, 0, 0}, {0x332e, 0x04, 0, 0}, + {0x332f, 0x04, 0, 0}, {0x3331, 0x02, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3610, 0x40, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x307C, 0x10, 0, 0}, {0x3012, 0x10, 0, 0}, {0x3023, 0x06, 0, 0}, + {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, {0x302a, 0x03, 0, 0}, + {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, {0x300d, 0x01, 0, 0}, + {0x30d7, 0x90, 0, 0}, {0x3069, 0x04, 0, 0}, {0x303e, 0x00, 0, 0}, + {0x303f, 0xc0, 0, 0}, {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, + {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, {0x3362, 0x34, 0, 0}, + {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, {0x308a, 0x03, 0, 0}, + {0x308b, 0x00, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, + {0x3361, 0x04, 0, 0}, {0x3362, 0x23, 0, 0}, {0x3363, 0x28, 0, 0}, + {0x3364, 0x5c, 0, 0}, {0x3403, 0x42, 0, 0}, {0x3088, 0x02, 0, 0}, + {0x3089, 0xD0, 0, 0}, {0x308a, 0x01, 0, 0}, {0x308b, 0xe0, 0, 0}, + {0x304c, 0x83, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3011, 0x00, 0, 0}, {0x3010, 0x81, 0, 0}, {0x302e, 0x00, 0, 0}, + {0x302d, 0x00, 0, 0}, {0x3071, 0xeb, 0, 0}, {0x301C, 0x02, 0, 0}, + {0x3404, 0x02, 0, 0}, +}; + +static struct reg_value ov3640_setting_15fps_PAL_720_576[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309C, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x304c, 0x81, 0, 0}, {0x30d7, 0x10, 0, 0}, + {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, {0x3016, 0x82, 0, 0}, + {0x3018, 0x48, 0, 0}, {0x3019, 0x40, 0, 0}, {0x301a, 0x82, 0, 0}, + {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, {0x3082, 0x20, 0, 0}, + {0x3015, 0x12, 0, 0}, {0x3014, 0x84, 0, 0}, {0x3013, 0xf7, 0, 0}, + {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, {0x303e, 0x06, 0, 0}, + {0x303F, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, {0x3031, 0x26, 0, 0}, + {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, {0x3034, 0xea, 0, 0}, + {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, {0x3037, 0x6a, 0, 0}, + {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, {0x3106, 0x00, 0, 0}, + {0x3107, 0xff, 0, 0}, {0x3300, 0x13, 0, 0}, {0x3301, 0xde, 0, 0}, + {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, {0x3314, 0x42, 0, 0}, + {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, {0x3310, 0xd0, 0, 0}, + {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, + {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, {0x330b, 0x1c, 0, 0}, + {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, {0x336a, 0x52, 0, 0}, + {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, {0x30b8, 0x20, 0, 0}, + {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, + {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x3088, 0x08, 0, 0}, + {0x3089, 0x00, 0, 0}, {0x308a, 0x06, 0, 0}, {0x308b, 0x00, 0, 0}, + {0x308d, 0x04, 0, 0}, {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, + {0x30a9, 0xb5, 0, 0}, {0x3317, 0x04, 0, 0}, {0x3316, 0xf8, 0, 0}, + {0x3312, 0x17, 0, 0}, {0x3314, 0x30, 0, 0}, {0x3313, 0x23, 0, 0}, + {0x3315, 0x3e, 0, 0}, {0x3311, 0x9e, 0, 0}, {0x3310, 0xc0, 0, 0}, + {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, {0x330e, 0x5e, 0, 0}, + {0x330f, 0x6c, 0, 0}, {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, + {0x3307, 0x11, 0, 0}, {0x3308, 0x25, 0, 0}, {0x3340, 0x20, 0, 0}, + {0x3341, 0x50, 0, 0}, {0x3342, 0x18, 0, 0}, {0x3343, 0x23, 0, 0}, + {0x3344, 0xad, 0, 0}, {0x3345, 0xd0, 0, 0}, {0x3346, 0xb8, 0, 0}, + {0x3347, 0xb4, 0, 0}, {0x3348, 0x04, 0, 0}, {0x3349, 0x98, 0, 0}, + {0x3355, 0x02, 0, 0}, {0x3358, 0x44, 0, 0}, {0x3359, 0x44, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x3367, 0x23, 0, 0}, {0x3368, 0xBB, 0, 0}, + {0x3369, 0xD6, 0, 0}, {0x336A, 0x2A, 0, 0}, {0x336B, 0x07, 0, 0}, + {0x336C, 0x00, 0, 0}, {0x336D, 0x23, 0, 0}, {0x336E, 0xC3, 0, 0}, + {0x336F, 0xDE, 0, 0}, {0x3370, 0x2b, 0, 0}, {0x3371, 0x07, 0, 0}, + {0x3372, 0x00, 0, 0}, {0x3373, 0x23, 0, 0}, {0x3374, 0x9e, 0, 0}, + {0x3375, 0xD6, 0, 0}, {0x3376, 0x29, 0, 0}, {0x3377, 0x07, 0, 0}, + {0x3378, 0x00, 0, 0}, {0x332a, 0x1d, 0, 0}, {0x331b, 0x08, 0, 0}, + {0x331c, 0x16, 0, 0}, {0x331d, 0x2d, 0, 0}, {0x331e, 0x54, 0, 0}, + {0x331f, 0x66, 0, 0}, {0x3320, 0x73, 0, 0}, {0x3321, 0x80, 0, 0}, + {0x3322, 0x8c, 0, 0}, {0x3323, 0x95, 0, 0}, {0x3324, 0x9d, 0, 0}, + {0x3325, 0xac, 0, 0}, {0x3326, 0xb8, 0, 0}, {0x3327, 0xcc, 0, 0}, + {0x3328, 0xdd, 0, 0}, {0x3329, 0xee, 0, 0}, {0x332e, 0x04, 0, 0}, + {0x332f, 0x04, 0, 0}, {0x3331, 0x02, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3610, 0x40, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x307C, 0x10, 0, 0}, {0x3012, 0x10, 0, 0}, {0x3023, 0x06, 0, 0}, + {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, {0x302a, 0x03, 0, 0}, + {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, {0x300d, 0x01, 0, 0}, + {0x30d7, 0x90, 0, 0}, {0x3069, 0x04, 0, 0}, {0x303e, 0x00, 0, 0}, + {0x303f, 0xc0, 0, 0}, {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, + {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, {0x3362, 0x34, 0, 0}, + {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, {0x308a, 0x03, 0, 0}, + {0x308b, 0x00, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, + {0x3361, 0x04, 0, 0}, {0x3362, 0x23, 0, 0}, {0x3363, 0x28, 0, 0}, + {0x3364, 0x5c, 0, 0}, {0x3403, 0x42, 0, 0}, {0x3088, 0x02, 0, 0}, + {0x3089, 0xD0, 0, 0}, {0x308a, 0x02, 0, 0}, {0x308b, 0x40, 0, 0}, + {0x304c, 0x83, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3011, 0x00, 0, 0}, {0x3010, 0x81, 0, 0}, {0x302e, 0x00, 0, 0}, + {0x302d, 0x00, 0, 0}, {0x3071, 0xeb, 0, 0}, {0x301C, 0x02, 0, 0}, + {0x3404, 0x02, 0, 0}, +}; + +static struct reg_value ov3640_setting_30fps_NTSC_720_480[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3087, 0x16, 0, 0}, {0x309C, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x304c, 0x81, 0, 0}, {0x30d7, 0x10, 0, 0}, + {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, {0x3016, 0x82, 0, 0}, + {0x3018, 0x48, 0, 0}, {0x3019, 0x40, 0, 0}, {0x301a, 0x82, 0, 0}, + {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, {0x3082, 0x20, 0, 0}, + {0x3015, 0x12, 0, 0}, {0x3014, 0x84, 0, 0}, {0x3013, 0xf7, 0, 0}, + {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, {0x303e, 0x06, 0, 0}, + {0x303F, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, {0x3031, 0x26, 0, 0}, + {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, {0x3034, 0xea, 0, 0}, + {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, {0x3037, 0x6a, 0, 0}, + {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, {0x3106, 0x00, 0, 0}, + {0x3107, 0xff, 0, 0}, {0x3300, 0x13, 0, 0}, {0x3301, 0xde, 0, 0}, + {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, {0x3314, 0x42, 0, 0}, + {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, {0x3310, 0xd0, 0, 0}, + {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, + {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, {0x330b, 0x1c, 0, 0}, + {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, {0x336a, 0x52, 0, 0}, + {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, {0x30b8, 0x20, 0, 0}, + {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, + {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x3088, 0x08, 0, 0}, + {0x3089, 0x00, 0, 0}, {0x308a, 0x06, 0, 0}, {0x308b, 0x00, 0, 0}, + {0x308d, 0x04, 0, 0}, {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, + {0x30a9, 0xb5, 0, 0}, {0x3317, 0x04, 0, 0}, {0x3316, 0xf8, 0, 0}, + {0x3312, 0x17, 0, 0}, {0x3314, 0x30, 0, 0}, {0x3313, 0x23, 0, 0}, + {0x3315, 0x3e, 0, 0}, {0x3311, 0x9e, 0, 0}, {0x3310, 0xc0, 0, 0}, + {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, {0x330e, 0x5e, 0, 0}, + {0x330f, 0x6c, 0, 0}, {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, + {0x3307, 0x11, 0, 0}, {0x3308, 0x25, 0, 0}, {0x3340, 0x20, 0, 0}, + {0x3341, 0x50, 0, 0}, {0x3342, 0x18, 0, 0}, {0x3343, 0x23, 0, 0}, + {0x3344, 0xad, 0, 0}, {0x3345, 0xd0, 0, 0}, {0x3346, 0xb8, 0, 0}, + {0x3347, 0xb4, 0, 0}, {0x3348, 0x04, 0, 0}, {0x3349, 0x98, 0, 0}, + {0x3355, 0x02, 0, 0}, {0x3358, 0x44, 0, 0}, {0x3359, 0x44, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x3367, 0x23, 0, 0}, {0x3368, 0xBB, 0, 0}, + {0x3369, 0xD6, 0, 0}, {0x336A, 0x2A, 0, 0}, {0x336B, 0x07, 0, 0}, + {0x336C, 0x00, 0, 0}, {0x336D, 0x23, 0, 0}, {0x336E, 0xC3, 0, 0}, + {0x336F, 0xDE, 0, 0}, {0x3370, 0x2b, 0, 0}, {0x3371, 0x07, 0, 0}, + {0x3372, 0x00, 0, 0}, {0x3373, 0x23, 0, 0}, {0x3374, 0x9e, 0, 0}, + {0x3375, 0xD6, 0, 0}, {0x3376, 0x29, 0, 0}, {0x3377, 0x07, 0, 0}, + {0x3378, 0x00, 0, 0}, {0x332a, 0x1d, 0, 0}, {0x331b, 0x08, 0, 0}, + {0x331c, 0x16, 0, 0}, {0x331d, 0x2d, 0, 0}, {0x331e, 0x54, 0, 0}, + {0x331f, 0x66, 0, 0}, {0x3320, 0x73, 0, 0}, {0x3321, 0x80, 0, 0}, + {0x3322, 0x8c, 0, 0}, {0x3323, 0x95, 0, 0}, {0x3324, 0x9d, 0, 0}, + {0x3325, 0xac, 0, 0}, {0x3326, 0xb8, 0, 0}, {0x3327, 0xcc, 0, 0}, + {0x3328, 0xdd, 0, 0}, {0x3329, 0xee, 0, 0}, {0x332e, 0x04, 0, 0}, + {0x332f, 0x04, 0, 0}, {0x3331, 0x02, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3610, 0x40, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x307C, 0x10, 0, 0}, {0x3012, 0x10, 0, 0}, {0x3023, 0x06, 0, 0}, + {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, {0x302a, 0x03, 0, 0}, + {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, {0x300d, 0x01, 0, 0}, + {0x30d7, 0x90, 0, 0}, {0x3069, 0x04, 0, 0}, {0x303e, 0x00, 0, 0}, + {0x303f, 0xc0, 0, 0}, {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, + {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, {0x3362, 0x34, 0, 0}, + {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, {0x308a, 0x03, 0, 0}, + {0x308b, 0x00, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, + {0x3361, 0x04, 0, 0}, {0x3362, 0x23, 0, 0}, {0x3363, 0x28, 0, 0}, + {0x3364, 0x5c, 0, 0}, {0x3403, 0x42, 0, 0}, {0x3088, 0x02, 0, 0}, + {0x3089, 0xD0, 0, 0}, {0x308a, 0x01, 0, 0}, {0x308b, 0xe0, 0, 0}, + {0x304c, 0x83, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0xA1, 0, 0}, + {0x3011, 0x00, 0, 0}, {0x3010, 0x81, 0, 0}, {0x3014, 0x84, 0, 0}, + {0x302e, 0x00, 0, 0}, {0x302d, 0x00, 0, 0}, {0x3071, 0xeb, 0, 0}, + {0x301C, 0x02, 0, 0}, {0x3404, 0x02, 0, 0}, +}; + +static struct reg_value ov3640_setting_30fps_PAL_720_576[] = { + {0x3012, 0x80, 0, 0}, {0x304d, 0x45, 0, 0}, {0x30a7, 0x5e, 0, 0}, + {0x3086, 0x16, 0, 0}, {0x309C, 0x1a, 0, 0}, {0x30a2, 0xe4, 0, 0}, + {0x30aa, 0x42, 0, 0}, {0x30b0, 0xff, 0, 0}, {0x30b1, 0xff, 0, 0}, + {0x30b2, 0x10, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x304c, 0x81, 0, 0}, {0x30d7, 0x10, 0, 0}, + {0x30d9, 0x0d, 0, 0}, {0x30db, 0x08, 0, 0}, {0x3016, 0x82, 0, 0}, + {0x3018, 0x48, 0, 0}, {0x3019, 0x40, 0, 0}, {0x301a, 0x82, 0, 0}, + {0x307d, 0x00, 0, 0}, {0x3087, 0x02, 0, 0}, {0x3082, 0x20, 0, 0}, + {0x3015, 0x12, 0, 0}, {0x3014, 0x84, 0, 0}, {0x3013, 0xf7, 0, 0}, + {0x303c, 0x08, 0, 0}, {0x303d, 0x18, 0, 0}, {0x303e, 0x06, 0, 0}, + {0x303F, 0x0c, 0, 0}, {0x3030, 0x62, 0, 0}, {0x3031, 0x26, 0, 0}, + {0x3032, 0xe6, 0, 0}, {0x3033, 0x6e, 0, 0}, {0x3034, 0xea, 0, 0}, + {0x3035, 0xae, 0, 0}, {0x3036, 0xa6, 0, 0}, {0x3037, 0x6a, 0, 0}, + {0x3104, 0x02, 0, 0}, {0x3105, 0xfd, 0, 0}, {0x3106, 0x00, 0, 0}, + {0x3107, 0xff, 0, 0}, {0x3300, 0x13, 0, 0}, {0x3301, 0xde, 0, 0}, + {0x3302, 0xcf, 0, 0}, {0x3312, 0x26, 0, 0}, {0x3314, 0x42, 0, 0}, + {0x3313, 0x2b, 0, 0}, {0x3315, 0x42, 0, 0}, {0x3310, 0xd0, 0, 0}, + {0x3311, 0xbd, 0, 0}, {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, + {0x330e, 0x56, 0, 0}, {0x330f, 0x5c, 0, 0}, {0x330b, 0x1c, 0, 0}, + {0x3306, 0x5c, 0, 0}, {0x3307, 0x11, 0, 0}, {0x336a, 0x52, 0, 0}, + {0x3370, 0x46, 0, 0}, {0x3376, 0x38, 0, 0}, {0x30b8, 0x20, 0, 0}, + {0x30b9, 0x17, 0, 0}, {0x30ba, 0x04, 0, 0}, {0x30bb, 0x08, 0, 0}, + {0x3507, 0x06, 0, 0}, {0x350a, 0x4f, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3600, 0xc0, 0, 0}, {0x3088, 0x08, 0, 0}, + {0x3089, 0x00, 0, 0}, {0x308a, 0x06, 0, 0}, {0x308b, 0x00, 0, 0}, + {0x308d, 0x04, 0, 0}, {0x3086, 0x03, 0, 0}, {0x3086, 0x00, 0, 0}, + {0x30a9, 0xb5, 0, 0}, {0x3317, 0x04, 0, 0}, {0x3316, 0xf8, 0, 0}, + {0x3312, 0x17, 0, 0}, {0x3314, 0x30, 0, 0}, {0x3313, 0x23, 0, 0}, + {0x3315, 0x3e, 0, 0}, {0x3311, 0x9e, 0, 0}, {0x3310, 0xc0, 0, 0}, + {0x330c, 0x18, 0, 0}, {0x330d, 0x18, 0, 0}, {0x330e, 0x5e, 0, 0}, + {0x330f, 0x6c, 0, 0}, {0x330b, 0x1c, 0, 0}, {0x3306, 0x5c, 0, 0}, + {0x3307, 0x11, 0, 0}, {0x3308, 0x25, 0, 0}, {0x3340, 0x20, 0, 0}, + {0x3341, 0x50, 0, 0}, {0x3342, 0x18, 0, 0}, {0x3343, 0x23, 0, 0}, + {0x3344, 0xad, 0, 0}, {0x3345, 0xd0, 0, 0}, {0x3346, 0xb8, 0, 0}, + {0x3347, 0xb4, 0, 0}, {0x3348, 0x04, 0, 0}, {0x3349, 0x98, 0, 0}, + {0x3355, 0x02, 0, 0}, {0x3358, 0x44, 0, 0}, {0x3359, 0x44, 0, 0}, + {0x3300, 0x13, 0, 0}, {0x3367, 0x23, 0, 0}, {0x3368, 0xBB, 0, 0}, + {0x3369, 0xD6, 0, 0}, {0x336A, 0x2A, 0, 0}, {0x336B, 0x07, 0, 0}, + {0x336C, 0x00, 0, 0}, {0x336D, 0x23, 0, 0}, {0x336E, 0xC3, 0, 0}, + {0x336F, 0xDE, 0, 0}, {0x3370, 0x2b, 0, 0}, {0x3371, 0x07, 0, 0}, + {0x3372, 0x00, 0, 0}, {0x3373, 0x23, 0, 0}, {0x3374, 0x9e, 0, 0}, + {0x3375, 0xD6, 0, 0}, {0x3376, 0x29, 0, 0}, {0x3377, 0x07, 0, 0}, + {0x3378, 0x00, 0, 0}, {0x332a, 0x1d, 0, 0}, {0x331b, 0x08, 0, 0}, + {0x331c, 0x16, 0, 0}, {0x331d, 0x2d, 0, 0}, {0x331e, 0x54, 0, 0}, + {0x331f, 0x66, 0, 0}, {0x3320, 0x73, 0, 0}, {0x3321, 0x80, 0, 0}, + {0x3322, 0x8c, 0, 0}, {0x3323, 0x95, 0, 0}, {0x3324, 0x9d, 0, 0}, + {0x3325, 0xac, 0, 0}, {0x3326, 0xb8, 0, 0}, {0x3327, 0xcc, 0, 0}, + {0x3328, 0xdd, 0, 0}, {0x3329, 0xee, 0, 0}, {0x332e, 0x04, 0, 0}, + {0x332f, 0x04, 0, 0}, {0x3331, 0x02, 0, 0}, {0x3100, 0x02, 0, 0}, + {0x3301, 0xde, 0, 0}, {0x3304, 0xfc, 0, 0}, {0x3400, 0x00, 0, 0}, + {0x3404, 0x00, 0, 0}, {0x3610, 0x40, 0, 0}, {0x304c, 0x81, 0, 0}, + {0x307C, 0x10, 0, 0}, {0x3012, 0x10, 0, 0}, {0x3023, 0x06, 0, 0}, + {0x3026, 0x03, 0, 0}, {0x3027, 0x04, 0, 0}, {0x302a, 0x03, 0, 0}, + {0x302b, 0x10, 0, 0}, {0x3075, 0x24, 0, 0}, {0x300d, 0x01, 0, 0}, + {0x30d7, 0x90, 0, 0}, {0x3069, 0x04, 0, 0}, {0x303e, 0x00, 0, 0}, + {0x303f, 0xc0, 0, 0}, {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, + {0x3360, 0x0c, 0, 0}, {0x3361, 0x04, 0, 0}, {0x3362, 0x34, 0, 0}, + {0x3363, 0x08, 0, 0}, {0x3364, 0x04, 0, 0}, {0x3403, 0x42, 0, 0}, + {0x3088, 0x04, 0, 0}, {0x3089, 0x00, 0, 0}, {0x308a, 0x03, 0, 0}, + {0x308b, 0x00, 0, 0}, {0x300e, 0x32, 0, 0}, {0x300f, 0x21, 0, 0}, + {0x3010, 0x20, 0, 0}, {0x3011, 0x01, 0, 0}, {0x304c, 0x82, 0, 0}, + {0x3302, 0xef, 0, 0}, {0x335f, 0x34, 0, 0}, {0x3360, 0x0c, 0, 0}, + {0x3361, 0x04, 0, 0}, {0x3362, 0x23, 0, 0}, {0x3363, 0x28, 0, 0}, + {0x3364, 0x5c, 0, 0}, {0x3403, 0x42, 0, 0}, {0x3088, 0x02, 0, 0}, + {0x3089, 0xD0, 0, 0}, {0x308a, 0x02, 0, 0}, {0x308b, 0x40, 0, 0}, + {0x304c, 0x83, 0, 0}, {0x300e, 0x39, 0, 0}, {0x300f, 0xA1, 0, 0}, + {0x3011, 0x00, 0, 0}, {0x3010, 0x81, 0, 0}, {0x3014, 0x84, 0, 0}, + {0x302e, 0x00, 0, 0}, {0x302d, 0x00, 0, 0}, {0x3071, 0xeb, 0, 0}, + {0x301C, 0x02, 0, 0}, {0x3404, 0x02, 0, 0}, +}; + +static struct ov3640_mode_info ov3640_mode_info_data[2][ov3640_mode_MAX + 1] = { + { + {ov3640_mode_VGA_640_480, 640, 480, + ov3640_setting_15fps_VGA_640_480, + ARRAY_SIZE(ov3640_setting_15fps_VGA_640_480)}, + {ov3640_mode_QVGA_320_240, 320, 240, + ov3640_setting_15fps_QVGA_320_240, + ARRAY_SIZE(ov3640_setting_15fps_QVGA_320_240)}, + {ov3640_mode_XGA_1024_768, 1024, 768, + ov3640_setting_15fps_XGA_1024_768, + ARRAY_SIZE(ov3640_setting_15fps_XGA_1024_768)}, + {ov3640_mode_QXGA_2048_1536, 2048, 1536, + ov3640_setting_15fps_QXGA_2048_1536, + ARRAY_SIZE(ov3640_setting_15fps_QXGA_2048_1536)}, + {ov3640_mode_NTSC_720_480, 720, 480, + ov3640_setting_15fps_NTSC_720_480, + ARRAY_SIZE(ov3640_setting_15fps_NTSC_720_480)}, + {ov3640_mode_PAL_720_576, 720, 576, + ov3640_setting_15fps_PAL_720_576, + ARRAY_SIZE(ov3640_setting_15fps_PAL_720_576)}, + }, + { + {ov3640_mode_VGA_640_480, 640, 480, + ov3640_setting_30fps_VGA_640_480, + ARRAY_SIZE(ov3640_setting_30fps_VGA_640_480)}, + {ov3640_mode_QVGA_320_240, 320, 240, + ov3640_setting_30fps_QVGA_320_240, + ARRAY_SIZE(ov3640_setting_30fps_QVGA_320_240)}, + {ov3640_mode_XGA_1024_768, 1024, 768, + ov3640_setting_30fps_XGA_1024_768, + ARRAY_SIZE(ov3640_setting_30fps_XGA_1024_768)}, + {ov3640_mode_QXGA_2048_1536, 0, 0, NULL, 0}, + {ov3640_mode_NTSC_720_480, 720, 480, + ov3640_setting_30fps_NTSC_720_480, + ARRAY_SIZE(ov3640_setting_30fps_NTSC_720_480)}, + {ov3640_mode_PAL_720_576, 720, 576, + ov3640_setting_30fps_PAL_720_576, + ARRAY_SIZE(ov3640_setting_30fps_PAL_720_576)}, + }, +}; + +static struct regulator *io_regulator; +static struct regulator *core_regulator; +static struct regulator *analog_regulator; +static struct regulator *gpo_regulator; + +static int ov3640_probe(struct i2c_client *adapter, + const struct i2c_device_id *device_id); +static int ov3640_remove(struct i2c_client *client); + +static s32 ov3640_read_reg(u16 reg, u8 *val); +static s32 ov3640_write_reg(u16 reg, u8 val); + +static const struct i2c_device_id ov3640_id[] = { + {"ov3640", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, ov3640_id); + +static struct i2c_driver ov3640_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "ov3640", + }, + .probe = ov3640_probe, + .remove = ov3640_remove, + .id_table = ov3640_id, +}; + +extern void gpio_sensor_active(unsigned int csi_index); +extern void gpio_sensor_inactive(unsigned int csi); + +static s32 ov3640_write_reg(u16 reg, u8 val) +{ + u8 au8Buf[3] = {0}; + + au8Buf[0] = reg >> 8; + au8Buf[1] = reg & 0xff; + au8Buf[2] = val; + + if (i2c_master_send(ov3640_data.i2c_client, au8Buf, 3) < 0) { + pr_err("%s:write reg error:reg=%x,val=%x\n", + __func__, reg, val); + return -1; + } + + return 0; +} + +static s32 ov3640_read_reg(u16 reg, u8 *val) +{ + u8 au8RegBuf[2] = {0}; + u8 u8RdVal = 0; + + au8RegBuf[0] = reg >> 8; + au8RegBuf[1] = reg & 0xff; + + if (2 != i2c_master_send(ov3640_data.i2c_client, au8RegBuf, 2)) { + pr_err("%s:write reg error:reg=%x\n", + __func__, reg); + return -1; + } + + if (1 != i2c_master_recv(ov3640_data.i2c_client, &u8RdVal, 1)) { + pr_err("%s:read reg error:reg=%x,val=%x\n", + __func__, reg, u8RdVal); + return -1; + } + + *val = u8RdVal; + + return u8RdVal; +} + +static int ov3640_init_mode(enum ov3640_frame_rate frame_rate, + enum ov3640_mode mode) +{ + struct reg_value *pModeSetting = NULL; + s32 i = 0; + s32 iModeSettingArySize = 0; + register u32 Delay_ms = 0; + register u16 RegAddr = 0; + register u8 Mask = 0; + register u8 Val = 0; + u8 RegVal = 0; + int retval = 0; + + if (mode > ov3640_mode_MAX || mode < ov3640_mode_MIN) { + pr_err("Wrong ov3640 mode detected!\n"); + return -1; + } + + pModeSetting = ov3640_mode_info_data[frame_rate][mode].init_data_ptr; + iModeSettingArySize = + ov3640_mode_info_data[frame_rate][mode].init_data_size; + + ov3640_data.pix.width = ov3640_mode_info_data[frame_rate][mode].width; + ov3640_data.pix.height = ov3640_mode_info_data[frame_rate][mode].height; + + for (i = 0; i < iModeSettingArySize; ++i, ++pModeSetting) { + Delay_ms = pModeSetting->u32Delay_ms; + RegAddr = pModeSetting->u16RegAddr; + Val = pModeSetting->u8Val; + Mask = pModeSetting->u8Mask; + + if (Mask) { + retval = ov3640_read_reg(RegAddr, &RegVal); + if (retval < 0) + goto err; + + RegVal &= ~(u8)Mask; + Val &= Mask; + Val |= RegVal; + } + + retval = ov3640_write_reg(RegAddr, Val); + if (retval < 0) + goto err; + + if (Delay_ms) + msleep(Delay_ms); + } +err: + return retval; +} + +/* --------------- IOCTL functions from v4l2_int_ioctl_desc --------------- */ + +static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) +{ + if (s == NULL) { + pr_err(" ERROR!! no slave device set!\n"); + return -1; + } + + memset(p, 0, sizeof(*p)); + p->u.bt656.clock_curr = ov3640_data.mclk; + pr_debug(" clock_curr=mclk=%d\n", ov3640_data.mclk); + p->if_type = V4L2_IF_TYPE_BT656; + p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT; + p->u.bt656.clock_min = OV3640_XCLK_MIN; + p->u.bt656.clock_max = OV3640_XCLK_MAX; + p->u.bt656.bt_sync_correct = 1; /* Indicate external vsync */ + + return 0; +} + +/*! + * ioctl_s_power - V4L2 sensor interface handler for VIDIOC_S_POWER ioctl + * @s: pointer to standard V4L2 device structure + * @on: indicates power mode (on or off) + * + * Turns the power on or off, depending on the value of on and returns the + * appropriate error code. + */ +static int ioctl_s_power(struct v4l2_int_device *s, int on) +{ + struct sensor *sensor = s->priv; + + if (on && !sensor->on) { + gpio_sensor_active(ov3640_data.csi); + if (io_regulator) + if (regulator_enable(io_regulator) != 0) + return -EIO; + if (core_regulator) + if (regulator_enable(core_regulator) != 0) + return -EIO; + if (gpo_regulator) + if (regulator_enable(gpo_regulator) != 0) + return -EIO; + if (analog_regulator) + if (regulator_enable(analog_regulator) != 0) + return -EIO; + } else if (!on && sensor->on) { + if (analog_regulator) + regulator_disable(analog_regulator); + if (core_regulator) + regulator_disable(core_regulator); + if (io_regulator) + regulator_disable(io_regulator); + if (gpo_regulator) + regulator_disable(gpo_regulator); + gpio_sensor_inactive(ov3640_data.csi); + } + + sensor->on = on; + + return 0; +} + +/*! + * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure + * + * Returns the sensor's video CAPTURE parameters. + */ +static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + struct sensor *sensor = s->priv; + struct v4l2_captureparm *cparm = &a->parm.capture; + int ret = 0; + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + memset(a, 0, sizeof(*a)); + a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cparm->capability = sensor->streamcap.capability; + cparm->timeperframe = sensor->streamcap.timeperframe; + cparm->capturemode = sensor->streamcap.capturemode; + ret = 0; + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + ret = -EINVAL; + break; + + default: + pr_debug(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure + * + * Configures the sensor to use the input parameters, if possible. If + * not possible, reverts to the old parameters and returns the + * appropriate error code. + */ +static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + struct sensor *sensor = s->priv; + struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe; + u32 tgt_fps; /* target frames per secound */ + enum ov3640_frame_rate frame_rate; + int ret = 0; + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + /* Check that the new frame rate is allowed. */ + if ((timeperframe->numerator == 0) || + (timeperframe->denominator == 0)) { + timeperframe->denominator = DEFAULT_FPS; + timeperframe->numerator = 1; + } + + tgt_fps = timeperframe->denominator / + timeperframe->numerator; + + if (tgt_fps > MAX_FPS) { + timeperframe->denominator = MAX_FPS; + timeperframe->numerator = 1; + } else if (tgt_fps < MIN_FPS) { + timeperframe->denominator = MIN_FPS; + timeperframe->numerator = 1; + } + + /* Actual frame rate we use */ + tgt_fps = timeperframe->denominator / + timeperframe->numerator; + + if (tgt_fps == 15) + frame_rate = ov3640_15_fps; + else if (tgt_fps == 30) + frame_rate = ov3640_30_fps; + else { + pr_err(" The camera frame rate is not supported!\n"); + return -EINVAL; + } + + sensor->streamcap.timeperframe = *timeperframe; + sensor->streamcap.capturemode = + (u32)a->parm.capture.capturemode; + + ret = ov3640_init_mode(frame_rate, + sensor->streamcap.capturemode); + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + pr_debug(" type is not " \ + "V4L2_BUF_TYPE_VIDEO_CAPTURE but %d\n", + a->type); + ret = -EINVAL; + break; + + default: + pr_debug(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap + * @s: pointer to standard V4L2 device structure + * @f: pointer to standard V4L2 v4l2_format structure + * + * Returns the sensor's current pixel format in the v4l2_format + * parameter. + */ +static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) +{ + struct sensor *sensor = s->priv; + + f->fmt.pix = sensor->pix; + + return 0; +} + +/*! + * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure + * + * If the requested control is supported, returns the control's current + * value from the video_control[] array. Otherwise, returns -EINVAL + * if the control is not supported. + */ +static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int ret = 0; + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + vc->value = ov3640_data.brightness; + break; + case V4L2_CID_HUE: + vc->value = ov3640_data.hue; + break; + case V4L2_CID_CONTRAST: + vc->value = ov3640_data.contrast; + break; + case V4L2_CID_SATURATION: + vc->value = ov3640_data.saturation; + break; + case V4L2_CID_RED_BALANCE: + vc->value = ov3640_data.red; + break; + case V4L2_CID_BLUE_BALANCE: + vc->value = ov3640_data.blue; + break; + case V4L2_CID_EXPOSURE: + vc->value = ov3640_data.ae_mode; + break; + default: + ret = -EINVAL; + } + + return ret; +} + +/*! + * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure + * + * If the requested control is supported, sets the control's current + * value in HW (and updates the video_control[] array). Otherwise, + * returns -EINVAL if the control is not supported. + */ +static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int retval = 0; + + pr_debug("In ov3640:ioctl_s_ctrl %d\n", + vc->id); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + break; + case V4L2_CID_CONTRAST: + break; + case V4L2_CID_SATURATION: + break; + case V4L2_CID_HUE: + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + break; + case V4L2_CID_DO_WHITE_BALANCE: + break; + case V4L2_CID_RED_BALANCE: + break; + case V4L2_CID_BLUE_BALANCE: + break; + case V4L2_CID_GAMMA: + break; + case V4L2_CID_EXPOSURE: + break; + case V4L2_CID_AUTOGAIN: + break; + case V4L2_CID_GAIN: + break; + case V4L2_CID_HFLIP: + break; + case V4L2_CID_VFLIP: + break; + default: + retval = -EPERM; + break; + } + + return retval; +} + +/*! + * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT + * @s: pointer to standard V4L2 device structure + */ +static int ioctl_init(struct v4l2_int_device *s) +{ + + return 0; +} + +/*! + * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num + * @s: pointer to standard V4L2 device structure + * + * Initialise the device when slave attaches to the master. + */ +static int ioctl_dev_init(struct v4l2_int_device *s) +{ + struct sensor *sensor = s->priv; + u32 tgt_xclk; /* target xclk */ + u32 tgt_fps; /* target frames per secound */ + enum ov3640_frame_rate frame_rate; + + gpio_sensor_active(ov3640_data.csi); + ov3640_data.on = true; + + /* mclk */ + tgt_xclk = ov3640_data.mclk; + tgt_xclk = min(tgt_xclk, (u32)OV3640_XCLK_MAX); + tgt_xclk = max(tgt_xclk, (u32)OV3640_XCLK_MIN); + ov3640_data.mclk = tgt_xclk; + + pr_debug(" Setting mclk to %d MHz\n", tgt_xclk / 1000000); + set_mclk_rate(&ov3640_data.mclk, ov3640_data.csi); + + /* Default camera frame rate is set in probe */ + tgt_fps = sensor->streamcap.timeperframe.denominator / + sensor->streamcap.timeperframe.numerator; + + if (tgt_fps == 15) + frame_rate = ov3640_15_fps; + else if (tgt_fps == 30) + frame_rate = ov3640_30_fps; + else + return -EINVAL; /* Only support 15fps or 30fps now. */ + + return ov3640_init_mode(frame_rate, + sensor->streamcap.capturemode); +} + +/*! + * ioctl_dev_exit - V4L2 sensor interface handler for vidioc_int_dev_exit_num + * @s: pointer to standard V4L2 device structure + * + * Delinitialise the device when slave detaches to the master. + */ +static int ioctl_dev_exit(struct v4l2_int_device *s) +{ + gpio_sensor_inactive(ov3640_data.csi); + + return 0; +} + +/*! + * This structure defines all the ioctls for this module and links them to the + * enumeration. + */ +static struct v4l2_int_ioctl_desc ov3640_ioctl_desc[] = { + {vidioc_int_dev_init_num, (v4l2_int_ioctl_func *)ioctl_dev_init}, + {vidioc_int_dev_exit_num, ioctl_dev_exit}, + {vidioc_int_s_power_num, (v4l2_int_ioctl_func *)ioctl_s_power}, + {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *)ioctl_g_ifparm}, +/* {vidioc_int_g_needs_reset_num, + (v4l2_int_ioctl_func *)ioctl_g_needs_reset}, */ +/* {vidioc_int_reset_num, (v4l2_int_ioctl_func *)ioctl_reset}, */ + {vidioc_int_init_num, (v4l2_int_ioctl_func *)ioctl_init}, +/* {vidioc_int_enum_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap}, */ +/* {vidioc_int_try_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_try_fmt_cap}, */ + {vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_g_fmt_cap}, +/* {vidioc_int_s_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_s_fmt_cap}, */ + {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *)ioctl_g_parm}, + {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *)ioctl_s_parm}, +/* {vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *)ioctl_queryctrl}, */ + {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *)ioctl_g_ctrl}, + {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *)ioctl_s_ctrl}, +}; + +static struct v4l2_int_slave ov3640_slave = { + .ioctls = ov3640_ioctl_desc, + .num_ioctls = ARRAY_SIZE(ov3640_ioctl_desc), +}; + +static struct v4l2_int_device ov3640_int_device = { + .module = THIS_MODULE, + .name = "ov3640", + .type = v4l2_int_type_slave, + .u = { + .slave = &ov3640_slave, + }, +}; + +/*! + * ov3640 I2C probe function + * + * @param adapter struct i2c_adapter * + * @return Error code indicating success or failure + */ +static int ov3640_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int retval; + struct mxc_camera_platform_data *plat_data = client->dev.platform_data; + + /* Set initial values for the sensor struct. */ + memset(&ov3640_data, 0, sizeof(ov3640_data)); + ov3640_data.mclk = 24000000; /* 6 - 54 MHz, typical 24MHz */ + ov3640_data.mclk = plat_data->mclk; + ov3640_data.csi = plat_data->csi; + + ov3640_data.i2c_client = client; + ov3640_data.pix.pixelformat = V4L2_PIX_FMT_UYVY; + ov3640_data.pix.width = 640; + ov3640_data.pix.height = 480; + ov3640_data.streamcap.capability = V4L2_MODE_HIGHQUALITY | + V4L2_CAP_TIMEPERFRAME; + ov3640_data.streamcap.capturemode = 0; + ov3640_data.streamcap.timeperframe.denominator = DEFAULT_FPS; + ov3640_data.streamcap.timeperframe.numerator = 1; + + if (plat_data->io_regulator) { + io_regulator = regulator_get(&client->dev, + plat_data->io_regulator); + if (!IS_ERR(io_regulator)) { + regulator_set_voltage(io_regulator, + OV3640_VOLTAGE_DIGITAL_IO, + OV3640_VOLTAGE_DIGITAL_IO); + if (regulator_enable(io_regulator) != 0) { + pr_err("%s:io set voltage error\n", __func__); + goto err1; + } else { + dev_dbg(&client->dev, + "%s:io set voltage ok\n", __func__); + } + } else + io_regulator = NULL; + } + + if (plat_data->core_regulator) { + core_regulator = regulator_get(&client->dev, + plat_data->core_regulator); + if (!IS_ERR(core_regulator)) { + regulator_set_voltage(core_regulator, + OV3640_VOLTAGE_DIGITAL_CORE, + OV3640_VOLTAGE_DIGITAL_CORE); + if (regulator_enable(core_regulator) != 0) { + pr_err("%s:core set voltage error\n", __func__); + goto err2; + } else { + dev_dbg(&client->dev, + "%s:core set voltage ok\n", __func__); + } + } else + core_regulator = NULL; + } + + if (plat_data->analog_regulator) { + analog_regulator = regulator_get(&client->dev, + plat_data->analog_regulator); + if (!IS_ERR(analog_regulator)) { + regulator_set_voltage(analog_regulator, + OV3640_VOLTAGE_ANALOG, + OV3640_VOLTAGE_ANALOG); + if (regulator_enable(analog_regulator) != 0) { + pr_err("%s:analog set voltage error\n", + __func__); + goto err3; + } else { + dev_dbg(&client->dev, + "%s:analog set voltage ok\n", __func__); + } + } else + analog_regulator = NULL; + } + + if (plat_data->gpo_regulator) { + gpo_regulator = regulator_get(&client->dev, + plat_data->gpo_regulator); + if (!IS_ERR(gpo_regulator)) { + if (regulator_enable(gpo_regulator) != 0) { + pr_err("%s:gpo3 enable error\n", __func__); + goto err4; + } else { + dev_dbg(&client->dev, + "%s:gpo3 enable ok\n", __func__); + } + } else + gpo_regulator = NULL; + } + + ov3640_int_device.priv = &ov3640_data; + retval = v4l2_int_device_register(&ov3640_int_device); + + return retval; + +err4: + if (analog_regulator) { + regulator_disable(analog_regulator); + regulator_put(analog_regulator); + } +err3: + if (core_regulator) { + regulator_disable(core_regulator); + regulator_put(core_regulator); + } +err2: + if (io_regulator) { + regulator_disable(io_regulator); + regulator_put(io_regulator); + } +err1: + return -1; +} + +/*! + * ov3640 I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int ov3640_remove(struct i2c_client *client) +{ + v4l2_int_device_unregister(&ov3640_int_device); + + if (gpo_regulator) { + regulator_disable(gpo_regulator); + regulator_put(gpo_regulator); + } + + if (analog_regulator) { + regulator_disable(analog_regulator); + regulator_put(analog_regulator); + } + + if (core_regulator) { + regulator_disable(core_regulator); + regulator_put(core_regulator); + } + + if (io_regulator) { + regulator_disable(io_regulator); + regulator_put(io_regulator); + } + + return 0; +} + +/*! + * ov3640 init function + * Called by insmod ov3640_camera.ko. + * + * @return Error code indicating success or failure + */ +static __init int ov3640_init(void) +{ + u8 err; + + err = i2c_add_driver(&ov3640_i2c_driver); + if (err != 0) + pr_err("%s:driver registration failed, error=%d \n", + __func__, err); + + return err; +} + +/*! + * OV3640 cleanup function + * Called on rmmod ov3640_camera.ko + * + * @return Error code indicating success or failure + */ +static void __exit ov3640_clean(void) +{ + i2c_del_driver(&ov3640_i2c_driver); +} + +module_init(ov3640_init); +module_exit(ov3640_clean); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("OV3640 Camera Driver"); +MODULE_LICENSE("GPL"); +MODULE_VERSION("1.0"); +MODULE_ALIAS("CSI"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_prp_enc.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_prp_enc.c @@ -0,0 +1,455 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_prp_enc.c + * + * @brief IPU Use case for PRP-ENC + * + * @ingroup IPU + */ + +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +#ifdef CAMERA_DBG + #define CAMERA_TRACE(x) (printk)x +#else + #define CAMERA_TRACE(x) +#endif + +static ipu_rotate_mode_t grotation = IPU_ROTATE_NONE; + +/* + * Function definitions + */ + +/*! + * IPU ENC callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t prp_enc_callback(int irq, void *dev_id) +{ + cam_data *cam = (cam_data *) dev_id; + + if (cam->enc_callback == NULL) + return IRQ_HANDLED; + + cam->enc_callback(irq, dev_id); + + return IRQ_HANDLED; +} + +/*! + * PrpENC enable channel setup function + * + * @param cam struct cam_data * mxc capture instance + * + * @return status + */ +static int prp_enc_setup(cam_data * cam) +{ + ipu_channel_params_t enc; + int err = 0; + dma_addr_t dummy = 0xdeadbeaf; + + CAMERA_TRACE("In prp_enc_setup\n"); + if (!cam) { + printk(KERN_ERR "cam private is NULL\n"); + return -ENXIO; + } + memset(&enc, 0, sizeof(ipu_channel_params_t)); + + ipu_csi_get_window_size(&enc.csi_prp_enc_mem.in_width, + &enc.csi_prp_enc_mem.in_height, cam->csi); + + enc.csi_prp_enc_mem.in_pixel_fmt = IPU_PIX_FMT_UYVY; + enc.csi_prp_enc_mem.out_width = cam->v2f.fmt.pix.width; + enc.csi_prp_enc_mem.out_height = cam->v2f.fmt.pix.height; + enc.csi_prp_enc_mem.csi = cam->csi; + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + enc.csi_prp_enc_mem.out_width = cam->v2f.fmt.pix.height; + enc.csi_prp_enc_mem.out_height = cam->v2f.fmt.pix.width; + } + + if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_YUV420P; + pr_info("YUV420\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_YUV422P; + pr_info("YUV422P\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_NV12) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_NV12; + pr_info("NV12\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR24) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_BGR24; + pr_info("BGR24\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_RGB24; + pr_info("RGB24\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_RGB565; + pr_info("RGB565\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR32) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_BGR32; + pr_info("BGR32\n"); + } else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB32) { + enc.csi_prp_enc_mem.out_pixel_fmt = IPU_PIX_FMT_RGB32; + pr_info("RGB32\n"); + } else { + printk(KERN_ERR "format not supported\n"); + return -EINVAL; + } + + err = ipu_init_channel(CSI_PRP_ENC_MEM, &enc); + if (err != 0) { + printk(KERN_ERR "ipu_init_channel %d\n", err); + return err; + } + + ipu_csi_enable_mclk_if(CSI_MCLK_ENC, cam->csi, true, true); + + grotation = cam->rotation; + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + if (cam->rot_enc_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_enc_buf_size[0], + cam->rot_enc_bufs_vaddr[0], + cam->rot_enc_bufs[0]); + } + if (cam->rot_enc_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_enc_buf_size[1], + cam->rot_enc_bufs_vaddr[1], + cam->rot_enc_bufs[1]); + } + cam->rot_enc_buf_size[0] = + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage); + cam->rot_enc_bufs_vaddr[0] = + (void *)dma_alloc_coherent(0, cam->rot_enc_buf_size[0], + &cam->rot_enc_bufs[0], + GFP_DMA | GFP_KERNEL); + if (!cam->rot_enc_bufs_vaddr[0]) { + printk(KERN_ERR "alloc enc_bufs0\n"); + return -ENOMEM; + } + cam->rot_enc_buf_size[1] = + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage); + cam->rot_enc_bufs_vaddr[1] = + (void *)dma_alloc_coherent(0, cam->rot_enc_buf_size[1], + &cam->rot_enc_bufs[1], + GFP_DMA | GFP_KERNEL); + if (!cam->rot_enc_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_enc_buf_size[0], + cam->rot_enc_bufs_vaddr[0], + cam->rot_enc_bufs[0]); + cam->rot_enc_bufs_vaddr[0] = NULL; + cam->rot_enc_bufs[0] = 0; + printk(KERN_ERR "alloc enc_bufs1\n"); + return -ENOMEM; + } + + err = ipu_init_channel_buffer(CSI_PRP_ENC_MEM, + IPU_OUTPUT_BUFFER, + enc.csi_prp_enc_mem.out_pixel_fmt, + enc.csi_prp_enc_mem.out_width, + enc.csi_prp_enc_mem.out_height, + enc.csi_prp_enc_mem.out_width, + IPU_ROTATE_NONE, + cam->rot_enc_bufs[0], + cam->rot_enc_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "CSI_PRP_ENC_MEM err\n"); + return err; + } + + err = ipu_init_channel(MEM_ROT_ENC_MEM, NULL); + if (err != 0) { + printk(KERN_ERR "MEM_ROT_ENC_MEM channel err\n"); + return err; + } + + err = ipu_init_channel_buffer(MEM_ROT_ENC_MEM, IPU_INPUT_BUFFER, + enc.csi_prp_enc_mem.out_pixel_fmt, + enc.csi_prp_enc_mem.out_width, + enc.csi_prp_enc_mem.out_height, + enc.csi_prp_enc_mem.out_width, + cam->rotation, + cam->rot_enc_bufs[0], + cam->rot_enc_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "MEM_ROT_ENC_MEM input buffer\n"); + return err; + } + + err = + ipu_init_channel_buffer(MEM_ROT_ENC_MEM, IPU_OUTPUT_BUFFER, + enc.csi_prp_enc_mem.out_pixel_fmt, + enc.csi_prp_enc_mem.out_height, + enc.csi_prp_enc_mem.out_width, + cam->v2f.fmt.pix.bytesperline / + bytes_per_pixel(enc.csi_prp_enc_mem. + out_pixel_fmt), + IPU_ROTATE_NONE, dummy, dummy, + cam->offset.u_offset, + cam->offset.v_offset); + if (err != 0) { + printk(KERN_ERR "MEM_ROT_ENC_MEM output buffer\n"); + return err; + } + + err = ipu_link_channels(CSI_PRP_ENC_MEM, MEM_ROT_ENC_MEM); + if (err < 0) { + printk(KERN_ERR + "link CSI_PRP_ENC_MEM-MEM_ROT_ENC_MEM\n"); + return err; + } + + err = ipu_enable_channel(CSI_PRP_ENC_MEM); + if (err < 0) { + printk(KERN_ERR "ipu_enable_channel CSI_PRP_ENC_MEM\n"); + return err; + } + err = ipu_enable_channel(MEM_ROT_ENC_MEM); + if (err < 0) { + printk(KERN_ERR "ipu_enable_channel MEM_ROT_ENC_MEM\n"); + return err; + } + + ipu_select_buffer(CSI_PRP_ENC_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(CSI_PRP_ENC_MEM, IPU_OUTPUT_BUFFER, 1); + } else { + err = + ipu_init_channel_buffer(CSI_PRP_ENC_MEM, IPU_OUTPUT_BUFFER, + enc.csi_prp_enc_mem.out_pixel_fmt, + enc.csi_prp_enc_mem.out_width, + enc.csi_prp_enc_mem.out_height, + cam->v2f.fmt.pix.bytesperline / + bytes_per_pixel(enc.csi_prp_enc_mem. + out_pixel_fmt), + cam->rotation, dummy, dummy, + cam->offset.u_offset, + cam->offset.v_offset); + if (err != 0) { + printk(KERN_ERR "CSI_PRP_ENC_MEM output buffer\n"); + return err; + } + err = ipu_enable_channel(CSI_PRP_ENC_MEM); + if (err < 0) { + printk(KERN_ERR "ipu_enable_channel CSI_PRP_ENC_MEM\n"); + return err; + } + } + + return err; +} + +/*! + * function to update physical buffer address for encorder IDMA channel + * + * @param eba physical buffer address for encorder IDMA channel + * @param buffer_num int buffer 0 or buffer 1 + * + * @return status + */ +static int prp_enc_eba_update(dma_addr_t eba, int *buffer_num) +{ + int err = 0; + + pr_debug("eba %x\n", eba); + if (grotation >= IPU_ROTATE_90_RIGHT) { + err = ipu_update_channel_buffer(MEM_ROT_ENC_MEM, + IPU_OUTPUT_BUFFER, *buffer_num, + eba); + } else { + err = ipu_update_channel_buffer(CSI_PRP_ENC_MEM, + IPU_OUTPUT_BUFFER, *buffer_num, + eba); + } + if (err != 0) { + printk(KERN_ERR "err %d buffer_num %d\n", err, *buffer_num); + return err; + } + + if (grotation >= IPU_ROTATE_90_RIGHT) { + ipu_select_buffer(MEM_ROT_ENC_MEM, IPU_OUTPUT_BUFFER, + *buffer_num); + } else { + ipu_select_buffer(CSI_PRP_ENC_MEM, IPU_OUTPUT_BUFFER, + *buffer_num); + } + + *buffer_num = (*buffer_num == 0) ? 1 : 0; + return 0; +} + +/*! + * Enable encoder task + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +static int prp_enc_enabling_tasks(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + CAMERA_TRACE("IPU:In prp_enc_enabling_tasks\n"); + + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + err = ipu_request_irq(IPU_IRQ_PRP_ENC_ROT_OUT_EOF, + prp_enc_callback, 0, "Mxc Camera", cam); + } else { + err = ipu_request_irq(IPU_IRQ_PRP_ENC_OUT_EOF, + prp_enc_callback, 0, "Mxc Camera", cam); + } + if (err != 0) { + printk(KERN_ERR "Error registering rot irq\n"); + return err; + } + + err = prp_enc_setup(cam); + if (err != 0) { + printk(KERN_ERR "prp_enc_setup %d\n", err); + return err; + } + + return err; +} + +/*! + * Disable encoder task + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +static int prp_enc_disabling_tasks(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + ipu_free_irq(IPU_IRQ_PRP_ENC_ROT_OUT_EOF, cam); + } else { + ipu_free_irq(IPU_IRQ_PRP_ENC_OUT_EOF, cam); + } + + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + ipu_unlink_channels(CSI_PRP_ENC_MEM, MEM_ROT_ENC_MEM); + } + + err = ipu_disable_channel(CSI_PRP_ENC_MEM, true); + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + err |= ipu_disable_channel(MEM_ROT_ENC_MEM, true); + } + + ipu_uninit_channel(CSI_PRP_ENC_MEM); + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + ipu_uninit_channel(MEM_ROT_ENC_MEM); + } + + ipu_csi_enable_mclk_if(CSI_MCLK_ENC, cam->csi, false, false); + + return err; +} + +/*! + * function to select PRP-ENC as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +int prp_enc_select(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + if (cam) { + cam->enc_update_eba = prp_enc_eba_update; + cam->enc_enable = prp_enc_enabling_tasks; + cam->enc_disable = prp_enc_disabling_tasks; + } else { + err = -EIO; + } + + return err; +} + +/*! + * function to de-select PRP-ENC as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +int prp_enc_deselect(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + //err = prp_enc_disabling_tasks(cam); + + if (cam) { + cam->enc_update_eba = NULL; + cam->enc_enable = NULL; + cam->enc_disable = NULL; + if (cam->rot_enc_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_enc_buf_size[0], + cam->rot_enc_bufs_vaddr[0], + cam->rot_enc_bufs[0]); + cam->rot_enc_bufs_vaddr[0] = NULL; + cam->rot_enc_bufs[0] = 0; + } + if (cam->rot_enc_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_enc_buf_size[1], + cam->rot_enc_bufs_vaddr[1], + cam->rot_enc_bufs[1]); + cam->rot_enc_bufs_vaddr[1] = NULL; + cam->rot_enc_bufs[1] = 0; + } + } + + return err; +} + +/*! + * Init the Encorder channels + * + * @return Error code indicating success or failure + */ +__init int prp_enc_init(void) +{ + return 0; +} + +/*! + * Deinit the Encorder channels + * + */ +void __exit prp_enc_exit(void) +{ +} + +module_init(prp_enc_init); +module_exit(prp_enc_exit); + +EXPORT_SYMBOL(prp_enc_select); +EXPORT_SYMBOL(prp_enc_deselect); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IPU PRP ENC Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/fsl_csi.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/fsl_csi.c @@ -0,0 +1,289 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_csi.c, this file is derived from mx27_csi.c + * + * @brief mx25 CMOS Sensor interface functions + * + * @ingroup CSI + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_capture.h" +#include "fsl_csi.h" + +static bool g_csi_mclk_on; +static csi_irq_callback_t g_callback; +static void *g_callback_data; +static struct clk csi_mclk; + +static irqreturn_t csi_irq_handler(int irq, void *data) +{ + cam_data *cam = (cam_data *) data; + unsigned long status = __raw_readl(CSI_CSISR); + unsigned long cr3 = __raw_readl(CSI_CSICR3); + unsigned int frame_count = (cr3 >> 16) & 0xFFFF; + + __raw_writel(status, CSI_CSISR); + + if (status & BIT_SOF_INT) { + /* reflash the embeded DMA controller */ + if (frame_count % 2 == 1) + __raw_writel(cr3 | BIT_DMA_REFLASH_RFF, CSI_CSICR3); + } + + if (status & BIT_DMA_TSF_DONE_FB1) { + if (cam->capture_on) { + cam->ping_pong_csi = 1; + cam->enc_callback(0, cam); + } else { + cam->still_counter++; + wake_up_interruptible(&cam->still_queue); + } + } + + if (status & BIT_DMA_TSF_DONE_FB2) { + if (cam->capture_on) { + cam->ping_pong_csi = 2; + cam->enc_callback(0, cam); + } else { + cam->still_counter++; + wake_up_interruptible(&cam->still_queue); + } + } + + if (g_callback) + g_callback(g_callback_data, status); + + pr_debug("CSI status = 0x%08lX\n", status); + + return IRQ_HANDLED; +} + +static void csihw_reset_frame_count(void) +{ + __raw_writel(__raw_readl(CSI_CSICR3) | BIT_FRMCNT_RST, CSI_CSICR3); +} + +static void csihw_reset(void) +{ + csihw_reset_frame_count(); + __raw_writel(CSICR1_RESET_VAL, CSI_CSICR1); + __raw_writel(CSICR2_RESET_VAL, CSI_CSICR2); + __raw_writel(CSICR3_RESET_VAL, CSI_CSICR3); +} + +/*! + * csi_init_interface + * Init csi interface + */ +void csi_init_interface(void) +{ + unsigned int val = 0; + unsigned int imag_para; + + val |= BIT_SOF_POL; + val |= BIT_REDGE; + val |= BIT_GCLK_MODE; + val |= BIT_HSYNC_POL; + val |= BIT_PACK_DIR; + val |= BIT_FCC; + val |= BIT_SWAP16_EN; + val |= 1 << SHIFT_MCLKDIV; + __raw_writel(val, CSI_CSICR1); + + imag_para = (640 << 16) | 960; + __raw_writel(imag_para, CSI_CSIIMAG_PARA); + + val = 0x1010; + val |= BIT_DMA_REFLASH_RFF; + __raw_writel(val, CSI_CSICR3); +} +EXPORT_SYMBOL(csi_init_interface); + +/*! + * csi_enable_mclk + * + * @param src enum define which source to control the clk + * CSI_MCLK_VF CSI_MCLK_ENC CSI_MCLK_RAW CSI_MCLK_I2C + * @param flag true to enable mclk, false to disable mclk + * @param wait true to wait 100ms make clock stable, false not wait + * + * @return 0 for success + */ +int32_t csi_enable_mclk(int src, bool flag, bool wait) +{ + if (flag == true) { + csi_mclk_enable(); + if (wait == true) + msleep(10); + pr_debug("Enable csi clock from source %d\n", src); + g_csi_mclk_on = true; + } else { + csi_mclk_disable(); + pr_debug("Disable csi clock from source %d\n", src); + g_csi_mclk_on = false; + } + + return 0; +} +EXPORT_SYMBOL(csi_enable_mclk); + +/*! + * csi_read_mclk_flag + * + * @return gcsi_mclk_source + */ +int csi_read_mclk_flag(void) +{ + return 0; +} +EXPORT_SYMBOL(csi_read_mclk_flag); + +void csi_start_callback(void *data) +{ + cam_data *cam = (cam_data *) data; + + if (request_irq(MXC_INT_CSI, csi_irq_handler, 0, "csi", cam) < 0) + pr_debug("CSI error: irq request fail\n"); + +} +EXPORT_SYMBOL(csi_start_callback); + +void csi_stop_callback(void *data) +{ + cam_data *cam = (cam_data *) data; + + free_irq(MXC_INT_CSI, cam); +} +EXPORT_SYMBOL(csi_stop_callback); + +void csi_enable_int(int arg) +{ + unsigned long cr1 = __raw_readl(CSI_CSICR1); + + cr1 |= BIT_SOF_INTEN; + if (arg == 1) { + /* still capture needs DMA intterrupt */ + cr1 |= BIT_FB1_DMA_DONE_INTEN; + cr1 |= BIT_FB2_DMA_DONE_INTEN; + } + __raw_writel(cr1, CSI_CSICR1); +} +EXPORT_SYMBOL(csi_enable_int); + +void csi_disable_int(void) +{ + unsigned long cr1 = __raw_readl(CSI_CSICR1); + + cr1 &= ~BIT_SOF_INTEN; + cr1 &= ~BIT_FB1_DMA_DONE_INTEN; + cr1 &= ~BIT_FB2_DMA_DONE_INTEN; + __raw_writel(cr1, CSI_CSICR1); +} +EXPORT_SYMBOL(csi_disable_int); + +void csi_set_16bit_imagpara(int width, int height) +{ + int imag_para = 0; + unsigned long cr3 = __raw_readl(CSI_CSICR3); + + imag_para = (width << 16) | (height * 2); + __raw_writel(imag_para, CSI_CSIIMAG_PARA); + + /* reflash the embeded DMA controller */ + __raw_writel(cr3 | BIT_DMA_REFLASH_RFF, CSI_CSICR3); +} +EXPORT_SYMBOL(csi_set_16bit_imagpara); + +void csi_set_12bit_imagpara(int width, int height) +{ + int imag_para = 0; + unsigned long cr3 = __raw_readl(CSI_CSICR3); + + imag_para = (width << 16) | (height * 3 / 2); + __raw_writel(imag_para, CSI_CSIIMAG_PARA); + + /* reflash the embeded DMA controller */ + __raw_writel(cr3 | BIT_DMA_REFLASH_RFF, CSI_CSICR3); +} +EXPORT_SYMBOL(csi_set_12bit_imagpara); + +static void csi_mclk_recalc(struct clk *clk) +{ + u32 div; + + div = (__raw_readl(CSI_CSICR1) & BIT_MCLKDIV) >> SHIFT_MCLKDIV; + if (div == 0) + div = 1; + else + div = div * 2; + + clk->rate = clk->parent->rate / div; +} + +void csi_mclk_enable(void) +{ + __raw_writel(__raw_readl(CSI_CSICR1) | BIT_MCLKEN, CSI_CSICR1); +} + +void csi_mclk_disable(void) +{ + __raw_writel(__raw_readl(CSI_CSICR1) & ~BIT_MCLKEN, CSI_CSICR1); +} + +int32_t __init csi_init_module(void) +{ + int ret = 0; + struct clk *per_clk; + + csihw_reset(); + csi_init_interface(); + + per_clk = clk_get(NULL, "csi_clk"); + if (IS_ERR(per_clk)) + return PTR_ERR(per_clk); + + clk_put(per_clk); + csi_mclk.name = "csi_mclk"; + csi_mclk.parent = per_clk; + clk_register(&csi_mclk); + clk_enable(per_clk); + csi_mclk_recalc(&csi_mclk); + + return ret; +} + +void __exit csi_cleanup_module(void) +{ + clk_disable(&csi_mclk); + clk_unregister(&csi_mclk); +} + +module_init(csi_init_module); +module_exit(csi_cleanup_module); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("fsl CSI driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mxc_v4l2_capture.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mxc_v4l2_capture.c @@ -0,0 +1,2593 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/media/video/mxc/capture/mxc_v4l2_capture.c + * + * @brief Mxc Video For Linux 2 driver + * + * @ingroup MXC_V4L2_CAPTURE + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +static int video_nr = -1; +static cam_data *g_cam; + +/*! This data is used for the output to the display. */ +#define MXC_V4L2_CAPTURE_NUM_OUTPUTS 3 +#define MXC_V4L2_CAPTURE_NUM_INPUTS 2 +static struct v4l2_output mxc_capture_outputs[MXC_V4L2_CAPTURE_NUM_OUTPUTS] = { + { + .index = 0, + .name = "DISP3 BG", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN, + }, + { + .index = 1, + .name = "DISP0", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN, + }, + { + .index = 2, + .name = "DISP3 FG", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .audioset = 0, + .modulator = 0, + .std = V4L2_STD_UNKNOWN, + }, +}; + +static struct v4l2_input mxc_capture_inputs[MXC_V4L2_CAPTURE_NUM_INPUTS] = { + { + .index = 0, + .name = "CSI IC MEM", + .type = V4L2_INPUT_TYPE_CAMERA, + .audioset = 0, + .tuner = 0, + .std = V4L2_STD_UNKNOWN, + .status = 0, + }, + { + .index = 1, + .name = "CSI MEM", + .type = V4L2_INPUT_TYPE_CAMERA, + .audioset = 0, + .tuner = 0, + .std = V4L2_STD_UNKNOWN, + .status = V4L2_IN_ST_NO_POWER, + }, +}; + +/*! List of TV input video formats supported. The video formats is corresponding + * to the v4l2_id in video_fmt_t. + * Currently, only PAL and NTSC is supported. Needs to be expanded in the + * future. + */ +typedef enum { + TV_NTSC = 0, /*!< Locked on (M) NTSC video signal. */ + TV_PAL, /*!< (B, G, H, I, N)PAL video signal. */ + TV_NOT_LOCKED, /*!< Not locked on a signal. */ +} video_fmt_idx; + +/*! Number of video standards supported (including 'not locked' signal). */ +#define TV_STD_MAX (TV_NOT_LOCKED + 1) + +/*! Video format structure. */ +typedef struct { + int v4l2_id; /*!< Video for linux ID. */ + char name[16]; /*!< Name (e.g., "NTSC", "PAL", etc.) */ + u16 raw_width; /*!< Raw width. */ + u16 raw_height; /*!< Raw height. */ + u16 active_width; /*!< Active width. */ + u16 active_height; /*!< Active height. */ + u16 active_top; /*!< Active top. */ + u16 active_left; /*!< Active left. */ +} video_fmt_t; + +/*! + * Description of video formats supported. + * + * PAL: raw=720x625, active=720x576. + * NTSC: raw=720x525, active=720x480. + */ +static video_fmt_t video_fmts[] = { + { /*! NTSC */ + .v4l2_id = V4L2_STD_NTSC, + .name = "NTSC", + .raw_width = 720 - 1, /* SENS_FRM_WIDTH */ + .raw_height = 288 - 1, /* SENS_FRM_HEIGHT */ + .active_width = 720, /* ACT_FRM_WIDTH plus 1 */ + .active_height = (480 / 2), /* ACT_FRM_HEIGHT plus 1 */ + .active_top = 12, + .active_left = 0, + }, + { /*! (B, G, H, I, N) PAL */ + .v4l2_id = V4L2_STD_PAL, + .name = "PAL", + .raw_width = 720 - 1, + .raw_height = (576 / 2) + 24 * 2 - 1, + .active_width = 720, + .active_height = (576 / 2), + .active_top = 0, + .active_left = 0, + }, + { /*! Unlocked standard */ + .v4l2_id = V4L2_STD_ALL, + .name = "Autodetect", + .raw_width = 720 - 1, + .raw_height = (576 / 2) + 24 * 2 - 1, + .active_width = 720, + .active_height = (576 / 2), + .active_top = 0, + .active_left = 0, + }, +}; + +/*!* Standard index of TV. */ +static video_fmt_idx video_index = TV_NOT_LOCKED; + +static int mxc_v4l2_master_attach(struct v4l2_int_device *slave); +static void mxc_v4l2_master_detach(struct v4l2_int_device *slave); +static u8 camera_power(cam_data *cam, bool cameraOn); + +/*! Information about this driver. */ +static struct v4l2_int_master mxc_v4l2_master = { + .attach = mxc_v4l2_master_attach, + .detach = mxc_v4l2_master_detach, +}; + +static struct v4l2_int_device mxc_v4l2_int_device = { + .module = THIS_MODULE, + .name = "mxc_v4l2_cap", + .type = v4l2_int_type_master, + .u = { + .master = &mxc_v4l2_master, + }, +}; + +/*************************************************************************** + * Functions for handling Frame buffers. + **************************************************************************/ + +/*! + * Free frame buffers + * + * @param cam Structure cam_data * + * + * @return status 0 success. + */ +static int mxc_free_frame_buf(cam_data *cam) +{ + int i; + + pr_debug("MVC: In mxc_free_frame_buf\n"); + + for (i = 0; i < FRAME_NUM; i++) { + if (cam->frame[i].vaddress != 0) { + dma_free_coherent(0, cam->frame[i].buffer.length, + cam->frame[i].vaddress, + cam->frame[i].paddress); + cam->frame[i].vaddress = 0; + } + } + + return 0; +} + +/*! + * Allocate frame buffers + * + * @param cam Structure cam_data* + * @param count int number of buffer need to allocated + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int mxc_allocate_frame_buf(cam_data *cam, int count) +{ + int i; + + pr_debug("In MVC:mxc_allocate_frame_buf - size=%d\n", + cam->v2f.fmt.pix.sizeimage); + + for (i = 0; i < count; i++) { + cam->frame[i].vaddress = + dma_alloc_coherent(0, + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage), + &cam->frame[i].paddress, + GFP_DMA | GFP_KERNEL); + if (cam->frame[i].vaddress == 0) { + pr_err("ERROR: v4l2 capture: " + "mxc_allocate_frame_buf failed.\n"); + mxc_free_frame_buf(cam); + return -ENOBUFS; + } + cam->frame[i].buffer.index = i; + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + cam->frame[i].buffer.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->frame[i].buffer.length = + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage); + cam->frame[i].buffer.memory = V4L2_MEMORY_MMAP; + cam->frame[i].buffer.m.offset = cam->frame[i].paddress; + cam->frame[i].index = i; + } + + return 0; +} + +/*! + * Free frame buffers status + * + * @param cam Structure cam_data * + * + * @return none + */ +static void mxc_free_frames(cam_data *cam) +{ + int i; + + pr_debug("In MVC:mxc_free_frames\n"); + + for (i = 0; i < FRAME_NUM; i++) { + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + } + + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); +} + +/*! + * Return the buffer status + * + * @param cam Structure cam_data * + * @param buf Structure v4l2_buffer * + * + * @return status 0 success, EINVAL failed. + */ +static int mxc_v4l2_buffer_status(cam_data *cam, struct v4l2_buffer *buf) +{ + pr_debug("In MVC:mxc_v4l2_buffer_status\n"); + + if (buf->index < 0 || buf->index >= FRAME_NUM) { + pr_err("ERROR: v4l2 capture: mxc_v4l2_buffer_status buffers " + "not allocated\n"); + return -EINVAL; + } + + memcpy(buf, &(cam->frame[buf->index].buffer), sizeof(*buf)); + return 0; +} + +/*************************************************************************** + * Functions for handling the video stream. + **************************************************************************/ + +/*! + * Indicates whether the palette is supported. + * + * @param palette V4L2_PIX_FMT_RGB565, V4L2_PIX_FMT_BGR24 or V4L2_PIX_FMT_BGR32 + * + * @return 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + return ((palette == V4L2_PIX_FMT_RGB565) || + (palette == V4L2_PIX_FMT_BGR24) || + (palette == V4L2_PIX_FMT_RGB24) || + (palette == V4L2_PIX_FMT_BGR32) || + (palette == V4L2_PIX_FMT_RGB32) || + (palette == V4L2_PIX_FMT_YUV422P) || + (palette == V4L2_PIX_FMT_UYVY) || + (palette == V4L2_PIX_FMT_YUV420) || + (palette == V4L2_PIX_FMT_NV12)); +} + +/*! + * Start the encoder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int mxc_streamon(cam_data *cam) +{ + struct mxc_v4l_frame *frame; + int err = 0; + + pr_debug("In MVC:mxc_streamon\n"); + + if (NULL == cam) { + pr_err("ERROR! cam parameter is NULL\n"); + return -1; + } + + if (list_empty(&cam->ready_q)) { + pr_err("ERROR: v4l2 capture: mxc_streamon buffer has not been " + "queued yet\n"); + return -EINVAL; + } + + cam->capture_pid = current->pid; + + if (cam->enc_enable) { + err = cam->enc_enable(cam); + if (err != 0) { + return err; + } + } + + cam->ping_pong_csi = 0; + if (cam->enc_update_eba) { + frame = + list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + err = cam->enc_update_eba(frame->buffer.m.offset, + &cam->ping_pong_csi); + + frame = + list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + err |= cam->enc_update_eba(frame->buffer.m.offset, + &cam->ping_pong_csi); + } else { + return -EINVAL; + } + + cam->capture_on = true; + + return err; +} + +/*! + * Shut down the encoder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int mxc_streamoff(cam_data *cam) +{ + int err = 0; + + pr_debug("In MVC:mxc_streamoff\n"); + + if (cam->capture_on == false) + return 0; + + if (cam->enc_disable) { + err = cam->enc_disable(cam); + } + mxc_free_frames(cam); + mxc_capture_inputs[cam->current_input].status |= V4L2_IN_ST_NO_POWER; + cam->capture_on = false; + return err; +} + +/*! + * Valid and adjust the overlay window size, position + * + * @param cam structure cam_data * + * @param win struct v4l2_window * + * + * @return 0 + */ +static int verify_preview(cam_data *cam, struct v4l2_window *win) +{ + int i = 0, width_bound = 0, height_bound = 0; + int *width, *height; + struct fb_info *bg_fbi = NULL; + bool foregound_fb; + + pr_debug("In MVC: verify_preview\n"); + + do { + cam->overlay_fb = (struct fb_info *)registered_fb[i]; + if (cam->overlay_fb == NULL) { + pr_err("ERROR: verify_preview frame buffer NULL.\n"); + return -1; + } + if (strcmp(cam->overlay_fb->fix.id, "DISP3 BG") == 0) + bg_fbi = cam->overlay_fb; + if (strcmp(cam->overlay_fb->fix.id, + mxc_capture_outputs[cam->output].name) == 0) { + if (strcmp(cam->overlay_fb->fix.id, "DISP3 FG") == 0) + foregound_fb = true; + break; + } + } while (++i < FB_MAX); + + if (foregound_fb) { + width_bound = bg_fbi->var.xres; + height_bound = bg_fbi->var.yres; + + if (win->w.width + win->w.left > bg_fbi->var.xres || + win->w.height + win->w.top > bg_fbi->var.yres) { + pr_err("ERROR: FG window position exceeds.\n"); + return -1; + } + } else { + /* 4 bytes alignment for BG */ + width_bound = cam->overlay_fb->var.xres; + height_bound = cam->overlay_fb->var.yres; + + if (cam->overlay_fb->var.bits_per_pixel == 24) { + win->w.left -= win->w.left % 4; + } else if (cam->overlay_fb->var.bits_per_pixel == 16) { + win->w.left -= win->w.left % 2; + } + + if (win->w.width + win->w.left > cam->overlay_fb->var.xres) + win->w.width = cam->overlay_fb->var.xres - win->w.left; + if (win->w.height + win->w.top > cam->overlay_fb->var.yres) + win->w.height = cam->overlay_fb->var.yres - win->w.top; + } + + /* stride line limitation */ + win->w.height -= win->w.height % 8; + win->w.width -= win->w.width % 8; + + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + height = &win->w.width; + width = &win->w.height; + } else { + width = &win->w.width; + height = &win->w.height; + } + + if ((cam->crop_bounds.width / *width > 8) || + ((cam->crop_bounds.width / *width == 8) && + (cam->crop_bounds.width % *width))) { + *width = cam->crop_bounds.width / 8; + if (*width % 8) + *width += 8 - *width % 8; + if (*width + win->w.left > width_bound) { + pr_err("ERROR: v4l2 capture: width exceeds " + "resize limit.\n"); + return -1; + } + pr_err("ERROR: v4l2 capture: width exceeds limit. " + "Resize to %d.\n", + *width); + } + + if ((cam->crop_bounds.height / *height > 8) || + ((cam->crop_bounds.height / *height == 8) && + (cam->crop_bounds.height % *height))) { + *height = cam->crop_bounds.height / 8; + if (*height % 8) + *height += 8 - *height % 8; + if (*height + win->w.top > height_bound) { + pr_err("ERROR: v4l2 capture: height exceeds " + "resize limit.\n"); + return -1; + } + pr_err("ERROR: v4l2 capture: height exceeds limit " + "resize to %d.\n", + *height); + } + + return 0; +} + +/*! + * start the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int start_preview(cam_data *cam) +{ + int err = 0; + + pr_debug("MVC: start_preview\n"); + +#if defined(CONFIG_MXC_IPU_PRP_VF_SDC) || defined(CONFIG_MXC_IPU_PRP_VF_SDC_MODULE) + pr_debug(" This is an SDC display\n"); + if (cam->output == 0 || cam->output == 2) { + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) + err = prp_vf_sdc_select(cam); + else if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_PRIMARY) + err = prp_vf_sdc_select_bg(cam); + if (err != 0) + return err; + + err = cam->vf_start_sdc(cam); + } +#endif + +#if defined(CONFIG_MXC_IPU_PRP_VF_ADC) || defined(CONFIG_MXC_IPU_PRP_VF_ADC_MODULE) + pr_debug(" This is an ADC display\n"); + if (cam->output == 1) { + err = prp_vf_adc_select(cam); + if (err != 0) + return err; + + err = cam->vf_start_adc(cam); + } +#endif + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, + cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + pr_debug("End of %s: crop_bounds widthxheight %d x %d\n", + __func__, + cam->crop_bounds.width, cam->crop_bounds.height); + pr_debug("End of %s: crop_defrect widthxheight %d x %d\n", + __func__, + cam->crop_defrect.width, cam->crop_defrect.height); + pr_debug("End of %s: crop_current widthxheight %d x %d\n", + __func__, + cam->crop_current.width, cam->crop_current.height); + + return err; +} + +/*! + * shut down the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int stop_preview(cam_data *cam) +{ + int err = 0; + + pr_debug("MVC: stop preview\n"); + +#if defined(CONFIG_MXC_IPU_PRP_VF_ADC) || defined(CONFIG_MXC_IPU_PRP_VF_ADC_MODULE) + if (cam->output == 1) { + err = prp_vf_adc_deselect(cam); + } +#endif + +#if defined(CONFIG_MXC_IPU_PRP_VF_SDC) || defined(CONFIG_MXC_IPU_PRP_VF_SDC_MODULE) + if (cam->output == 0 || cam->output == 2) { + if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_OVERLAY) + err = prp_vf_sdc_deselect(cam); + else if (cam->v4l2_fb.flags == V4L2_FBUF_FLAG_PRIMARY) + err = prp_vf_sdc_deselect_bg(cam); + } +#endif + + return err; +} + +/*************************************************************************** + * VIDIOC Functions. + **************************************************************************/ + +/*! + * V4L2 - mxc_v4l2_g_fmt function + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_g_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + + pr_debug("In MVC: mxc_v4l2_g_fmt type=%d\n", f->type); + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + f->fmt.pix = cam->v2f.fmt.pix; + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_OVERLAY\n"); + f->fmt.win = cam->win; + break; + default: + pr_debug(" type is invalid\n"); + retval = -EINVAL; + } + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, + cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + pr_debug("End of %s: crop_bounds widthxheight %d x %d\n", + __func__, + cam->crop_bounds.width, cam->crop_bounds.height); + pr_debug("End of %s: crop_defrect widthxheight %d x %d\n", + __func__, + cam->crop_defrect.width, cam->crop_defrect.height); + pr_debug("End of %s: crop_current widthxheight %d x %d\n", + __func__, + cam->crop_current.width, cam->crop_current.height); + + return retval; +} + +/*! + * V4L2 - mxc_v4l2_s_fmt function + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + int size = 0; + int bytesperline = 0; + int *width, *height; + + pr_debug("In MVC: mxc_v4l2_s_fmt\n"); + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type=V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + if (!valid_mode(f->fmt.pix.pixelformat)) { + pr_err("ERROR: v4l2 capture: mxc_v4l2_s_fmt: format " + "not supported\n"); + return -EINVAL; + } + + /* + * Force the capture window resolution to be crop bounds + * for CSI MEM input mode. + */ + if (strcmp(mxc_capture_inputs[cam->current_input].name, + "CSI MEM") == 0) { + f->fmt.pix.width = cam->crop_current.width; + f->fmt.pix.height = cam->crop_current.height; + } + + if (cam->rotation >= IPU_ROTATE_90_RIGHT) { + height = &f->fmt.pix.width; + width = &f->fmt.pix.height; + } else { + width = &f->fmt.pix.width; + height = &f->fmt.pix.height; + } + + /* stride line limitation */ + *width -= *width % 8; + *height -= *height % 8; + + if ((cam->crop_current.width / *width > 8) || + ((cam->crop_current.width / *width == 8) && + (cam->crop_current.width % *width))) { + *width = cam->crop_current.width / 8; + if (*width % 8) + *width += 8 - *width % 8; + pr_err("ERROR: v4l2 capture: width exceeds limit " + "resize to %d.\n", + *width); + } + + if ((cam->crop_current.height / *height > 8) || + ((cam->crop_current.height / *height == 8) && + (cam->crop_current.height % *height))) { + *height = cam->crop_current.height / 8; + if (*height % 8) + *height += 8 - *height % 8; + pr_err("ERROR: v4l2 capture: height exceeds limit " + "resize to %d.\n", + *height); + } + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_RGB565: + size = f->fmt.pix.width * f->fmt.pix.height * 2; + bytesperline = f->fmt.pix.width * 2; + break; + case V4L2_PIX_FMT_BGR24: + size = f->fmt.pix.width * f->fmt.pix.height * 3; + bytesperline = f->fmt.pix.width * 3; + break; + case V4L2_PIX_FMT_RGB24: + size = f->fmt.pix.width * f->fmt.pix.height * 3; + bytesperline = f->fmt.pix.width * 3; + break; + case V4L2_PIX_FMT_BGR32: + size = f->fmt.pix.width * f->fmt.pix.height * 4; + bytesperline = f->fmt.pix.width * 4; + break; + case V4L2_PIX_FMT_RGB32: + size = f->fmt.pix.width * f->fmt.pix.height * 4; + bytesperline = f->fmt.pix.width * 4; + break; + case V4L2_PIX_FMT_YUV422P: + size = f->fmt.pix.width * f->fmt.pix.height * 2; + bytesperline = f->fmt.pix.width; + break; + case V4L2_PIX_FMT_UYVY: + size = f->fmt.pix.width * f->fmt.pix.height * 2; + bytesperline = f->fmt.pix.width * 2; + break; + case V4L2_PIX_FMT_YUV420: + size = f->fmt.pix.width * f->fmt.pix.height * 3 / 2; + bytesperline = f->fmt.pix.width; + break; + case V4L2_PIX_FMT_NV12: + size = f->fmt.pix.width * f->fmt.pix.height * 3 / 2; + bytesperline = f->fmt.pix.width; + break; + default: + break; + } + + if (f->fmt.pix.bytesperline < bytesperline) { + f->fmt.pix.bytesperline = bytesperline; + } else { + bytesperline = f->fmt.pix.bytesperline; + } + + if (f->fmt.pix.sizeimage < size) { + f->fmt.pix.sizeimage = size; + } else { + size = f->fmt.pix.sizeimage; + } + + cam->v2f.fmt.pix = f->fmt.pix; + + if (cam->v2f.fmt.pix.priv != 0) { + if (copy_from_user(&cam->offset, + (void *)cam->v2f.fmt.pix.priv, + sizeof(cam->offset))) { + retval = -EFAULT; + break; + } + } + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + pr_debug(" type=V4L2_BUF_TYPE_VIDEO_OVERLAY\n"); + retval = verify_preview(cam, &f->fmt.win); + cam->win = f->fmt.win; + break; + default: + retval = -EINVAL; + } + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, + cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + pr_debug("End of %s: crop_bounds widthxheight %d x %d\n", + __func__, + cam->crop_bounds.width, cam->crop_bounds.height); + pr_debug("End of %s: crop_defrect widthxheight %d x %d\n", + __func__, + cam->crop_defrect.width, cam->crop_defrect.height); + pr_debug("End of %s: crop_current widthxheight %d x %d\n", + __func__, + cam->crop_current.width, cam->crop_current.height); + + return retval; +} + +/*! + * get control param + * + * @param cam structure cam_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_g_ctrl(cam_data *cam, struct v4l2_control *c) +{ + int status = 0; + + pr_debug("In MVC:mxc_v4l2_g_ctrl\n"); + + /* probably don't need to store the values that can be retrieved, + * locally, but they are for now. */ + switch (c->id) { + case V4L2_CID_HFLIP: + /* This is handled in the ipu. */ + if (cam->rotation == IPU_ROTATE_HORIZ_FLIP) + c->value = 1; + break; + case V4L2_CID_VFLIP: + /* This is handled in the ipu. */ + if (cam->rotation == IPU_ROTATE_VERT_FLIP) + c->value = 1; + break; + case V4L2_CID_MXC_ROT: + /* This is handled in the ipu. */ + c->value = cam->rotation; + break; + case V4L2_CID_BRIGHTNESS: + c->value = cam->bright; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->bright = c->value; + break; + case V4L2_CID_HUE: + c->value = cam->hue; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->hue = c->value; + break; + case V4L2_CID_CONTRAST: + c->value = cam->contrast; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->contrast = c->value; + break; + case V4L2_CID_SATURATION: + c->value = cam->saturation; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->saturation = c->value; + break; + case V4L2_CID_RED_BALANCE: + c->value = cam->red; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->red = c->value; + break; + case V4L2_CID_BLUE_BALANCE: + c->value = cam->blue; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->blue = c->value; + break; + case V4L2_CID_BLACK_LEVEL: + c->value = cam->ae_mode; + status = vidioc_int_g_ctrl(cam->sensor, c); + cam->ae_mode = c->value; + break; + default: + status = vidioc_int_g_ctrl(cam->sensor, c); + } + + return status; +} + +/*! + * V4L2 - set_control function + * V4L2_CID_PRIVATE_BASE is the extention for IPU preprocessing. + * 0 for normal operation + * 1 for vertical flip + * 2 for horizontal flip + * 3 for horizontal and vertical flip + * 4 for 90 degree rotation + * @param cam structure cam_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_ctrl(cam_data *cam, struct v4l2_control *c) +{ + int ret = 0; + int tmp_rotation = IPU_ROTATE_NONE; + + pr_debug("In MVC:mxc_v4l2_s_ctrl\n"); + + switch (c->id) { + case V4L2_CID_HFLIP: + /* This is done by the IPU */ + if (c->value == 1) { + if ((cam->rotation != IPU_ROTATE_VERT_FLIP) && + (cam->rotation != IPU_ROTATE_180)) + cam->rotation = IPU_ROTATE_HORIZ_FLIP; + else + cam->rotation = IPU_ROTATE_180; + } else { + if (cam->rotation == IPU_ROTATE_HORIZ_FLIP) + cam->rotation = IPU_ROTATE_NONE; + if (cam->rotation == IPU_ROTATE_180) + cam->rotation = IPU_ROTATE_VERT_FLIP; + } + break; + case V4L2_CID_VFLIP: + /* This is done by the IPU */ + if (c->value == 1) { + if ((cam->rotation != IPU_ROTATE_HORIZ_FLIP) && + (cam->rotation != IPU_ROTATE_180)) + cam->rotation = IPU_ROTATE_VERT_FLIP; + else + cam->rotation = IPU_ROTATE_180; + } else { + if (cam->rotation == IPU_ROTATE_VERT_FLIP) + cam->rotation = IPU_ROTATE_NONE; + if (cam->rotation == IPU_ROTATE_180) + cam->rotation = IPU_ROTATE_HORIZ_FLIP; + } + break; + case V4L2_CID_MXC_ROT: + case V4L2_CID_MXC_VF_ROT: + /* This is done by the IPU */ + switch (c->value) { + case V4L2_MXC_ROTATE_NONE: + tmp_rotation = IPU_ROTATE_NONE; + break; + case V4L2_MXC_ROTATE_VERT_FLIP: + tmp_rotation = IPU_ROTATE_VERT_FLIP; + break; + case V4L2_MXC_ROTATE_HORIZ_FLIP: + tmp_rotation = IPU_ROTATE_HORIZ_FLIP; + break; + case V4L2_MXC_ROTATE_180: + tmp_rotation = IPU_ROTATE_180; + break; + case V4L2_MXC_ROTATE_90_RIGHT: + tmp_rotation = IPU_ROTATE_90_RIGHT; + break; + case V4L2_MXC_ROTATE_90_RIGHT_VFLIP: + tmp_rotation = IPU_ROTATE_90_RIGHT_VFLIP; + break; + case V4L2_MXC_ROTATE_90_RIGHT_HFLIP: + tmp_rotation = IPU_ROTATE_90_RIGHT_HFLIP; + break; + case V4L2_MXC_ROTATE_90_LEFT: + tmp_rotation = IPU_ROTATE_90_LEFT; + break; + default: + ret = -EINVAL; + } + + if (c->id == V4L2_CID_MXC_VF_ROT) + cam->vf_rotation = tmp_rotation; + else + cam->rotation = tmp_rotation; + + break; + case V4L2_CID_HUE: + cam->hue = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_CONTRAST: + cam->contrast = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_BRIGHTNESS: + cam->bright = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_SATURATION: + cam->saturation = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_RED_BALANCE: + cam->red = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_BLUE_BALANCE: + cam->blue = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_EXPOSURE: + cam->ae_mode = c->value; + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + ret = vidioc_int_s_ctrl(cam->sensor, c); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + break; + case V4L2_CID_MXC_FLASH: +#ifdef CONFIG_MXC_IPU_V1 + ipu_csi_flash_strobe(true); +#endif + break; + default: + pr_debug(" default case\n"); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * V4L2 - mxc_v4l2_s_param function + * Allows setting of capturemode and frame rate. + * + * @param cam structure cam_data * + * @param parm structure v4l2_streamparm * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm) +{ + struct v4l2_ifparm ifparm; + struct v4l2_format cam_fmt; + struct v4l2_streamparm currentparm; + ipu_csi_signal_cfg_t csi_param; + int err = 0; + + pr_debug("In mxc_v4l2_s_param\n"); + + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_err(KERN_ERR "mxc_v4l2_s_param invalid type\n"); + return -EINVAL; + } + + /* Stop the viewfinder */ + if (cam->overlay_on == true) { + stop_preview(cam); + } + + currentparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + + /* First check that this device can support the changes requested. */ + err = vidioc_int_g_parm(cam->sensor, ¤tparm); + if (err) { + pr_err("%s: vidioc_int_g_parm returned an error %d\n", + __func__, err); + goto exit; + } + + pr_debug(" Current capabilities are %x\n", + currentparm.parm.capture.capability); + pr_debug(" Current capturemode is %d change to %d\n", + currentparm.parm.capture.capturemode, + parm->parm.capture.capturemode); + pr_debug(" Current framerate is %d change to %d\n", + currentparm.parm.capture.timeperframe.denominator, + parm->parm.capture.timeperframe.denominator); + + /* This will change any camera settings needed. */ + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + err = vidioc_int_s_parm(cam->sensor, parm); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + if (err) { + pr_err("%s: vidioc_int_s_parm returned an error %d\n", + __func__, err); + goto exit; + } + + /* If resolution changed, need to re-program the CSI */ + /* Get new values. */ + vidioc_int_g_ifparm(cam->sensor, &ifparm); + + csi_param.data_width = 0; + csi_param.clk_mode = 0; + csi_param.ext_vsync = 0; + csi_param.Vsync_pol = 0; + csi_param.Hsync_pol = 0; + csi_param.pixclk_pol = 0; + csi_param.data_pol = 0; + csi_param.sens_clksrc = 0; + csi_param.pack_tight = 0; + csi_param.force_eof = 0; + csi_param.data_en_pol = 0; + csi_param.data_fmt = 0; + csi_param.csi = 0; + csi_param.mclk = 0; + + /* This may not work on other platforms. Check when adding a new one.*/ + pr_debug(" clock_curr=mclk=%d\n", ifparm.u.bt656.clock_curr); + if (ifparm.u.bt656.clock_curr == 0) { + csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE; + } else { + csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK; + } + + csi_param.pixclk_pol = ifparm.u.bt656.latch_clk_inv; + + if (ifparm.u.bt656.mode == V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT) { + csi_param.data_width = IPU_CSI_DATA_WIDTH_8; + } else if (ifparm.u.bt656.mode + == V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT) { + csi_param.data_width = IPU_CSI_DATA_WIDTH_10; + } else { + csi_param.data_width = IPU_CSI_DATA_WIDTH_8; + } + + csi_param.Vsync_pol = ifparm.u.bt656.nobt_vs_inv; + csi_param.Hsync_pol = ifparm.u.bt656.nobt_hs_inv; + csi_param.ext_vsync = ifparm.u.bt656.bt_sync_correct; + + /* if the capturemode changed, the size bounds will have changed. */ + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + vidioc_int_g_fmt_cap(cam->sensor, &cam_fmt); + pr_debug(" g_fmt_cap returns widthxheight of input as %d x %d\n", + cam_fmt.fmt.pix.width, cam_fmt.fmt.pix.height); + + csi_param.data_fmt = cam_fmt.fmt.pix.pixelformat; + + cam->crop_bounds.top = cam->crop_bounds.left = 0; + cam->crop_bounds.width = cam_fmt.fmt.pix.width; + cam->crop_bounds.height = cam_fmt.fmt.pix.height; + + /* + * Set the default current cropped resolution to be the same with + * the cropping boundary(except for tvin module). + */ + if (cam->device_type != 1) { + cam->crop_current.width = cam->crop_bounds.width; + cam->crop_current.height = cam->crop_bounds.height; + } + + /* This essentially loses the data at the left and bottom of the image + * giving a digital zoom image, if crop_current is less than the full + * size of the image. */ + ipu_csi_set_window_size(cam->crop_current.width, + cam->crop_current.height, cam->csi); + ipu_csi_set_window_pos(cam->crop_current.left, + cam->crop_current.top, + cam->csi); + ipu_csi_init_interface(cam->crop_bounds.width, + cam->crop_bounds.height, + cam_fmt.fmt.pix.pixelformat, csi_param); + + +exit: + if (cam->overlay_on == true) + start_preview(cam); + + return err; +} + +/*! + * V4L2 - mxc_v4l2_s_std function + * + * Sets the TV standard to be used. + * + * @param cam structure cam_data * + * @param parm structure v4l2_streamparm * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_std(cam_data *cam, v4l2_std_id e) +{ + bool change = false; + + if (e != cam->standard.id) { + change = true; + } + + pr_debug("In mxc_v4l2_s_std %Lx\n", e); + if (e == V4L2_STD_PAL) { + pr_debug(" Setting standard to PAL %Lx\n", V4L2_STD_PAL); + cam->standard.id = V4L2_STD_PAL; + video_index = TV_PAL; + cam->crop_current.top = 0; + } else if (e == V4L2_STD_NTSC) { + pr_debug(" Setting standard to NTSC %Lx\n", + V4L2_STD_NTSC); + /* Get rid of the white dot line in NTSC signal input */ + cam->standard.id = V4L2_STD_NTSC; + video_index = TV_NTSC; + cam->crop_current.top = 12; + } else { + cam->standard.id = V4L2_STD_ALL; + video_index = TV_NOT_LOCKED; + cam->crop_current.top = 0; + pr_err("ERROR: unrecognized std! %Lx (PAL=%Lx, NTSC=%Lx\n", + e, V4L2_STD_PAL, V4L2_STD_NTSC); + } + + cam->standard.index = video_index; + strcpy(cam->standard.name, video_fmts[video_index].name); + cam->crop_bounds.width = video_fmts[video_index].raw_width; + cam->crop_bounds.height = video_fmts[video_index].raw_height; + cam->crop_current.width = video_fmts[video_index].active_width; + cam->crop_current.height = video_fmts[video_index].active_height; + cam->crop_current.left = 0; + + return 0; +} + +/*! + * V4L2 - mxc_v4l2_g_std function + * + * Gets the TV standard from the TV input device. + * + * @param cam structure cam_data * + * + * @param e structure v4l2_streamparm * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_g_std(cam_data *cam, v4l2_std_id *e) +{ + struct v4l2_format tv_fmt; + + pr_debug("In mxc_v4l2_g_std\n"); + + if (cam->device_type == 1) { + /* Use this function to get what the TV-In device detects the + * format to be. pixelformat is used to return the std value + * since the interface has no vidioc_g_std.*/ + tv_fmt.type = V4L2_BUF_TYPE_PRIVATE; + vidioc_int_g_fmt_cap(cam->sensor, &tv_fmt); + + /* If the TV-in automatically detects the standard, then if it + * changes, the settings need to change. */ + if (cam->standard_autodetect) { + if (cam->standard.id != tv_fmt.fmt.pix.pixelformat) { + pr_debug("MVC: mxc_v4l2_g_std: " + "Changing standard\n"); + mxc_v4l2_s_std(cam, tv_fmt.fmt.pix.pixelformat); + } + } + + *e = tv_fmt.fmt.pix.pixelformat; + } + + return 0; +} + +/*! + * Dequeue one V4L capture buffer + * + * @param cam structure cam_data * + * @param buf structure v4l2_buffer * + * + * @return status 0 success, EINVAL invalid frame number, + * ETIME timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l_dqueue(cam_data *cam, struct v4l2_buffer *buf) +{ + int retval = 0; + struct mxc_v4l_frame *frame; + unsigned long lock_flags; + + pr_debug("In MVC:mxc_v4l_dqueue\n"); + + if (!wait_event_interruptible_timeout(cam->enc_queue, + cam->enc_counter != 0, 10 * HZ)) { + pr_err("ERROR: v4l2 capture: mxc_v4l_dqueue timeout " + "enc_counter %x\n", + cam->enc_counter); + return -ETIME; + } else if (signal_pending(current)) { + pr_err("ERROR: v4l2 capture: mxc_v4l_dqueue() " + "interrupt received\n"); + return -ERESTARTSYS; + } + + spin_lock_irqsave(&cam->dqueue_int_lock, lock_flags); + + cam->enc_counter--; + + frame = list_entry(cam->done_q.next, struct mxc_v4l_frame, queue); + list_del(cam->done_q.next); + if (frame->buffer.flags & V4L2_BUF_FLAG_DONE) { + frame->buffer.flags &= ~V4L2_BUF_FLAG_DONE; + } else if (frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + pr_err("ERROR: v4l2 capture: VIDIOC_DQBUF: " + "Buffer not filled.\n"); + frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + retval = -EINVAL; + } else if ((frame->buffer.flags & 0x7) == V4L2_BUF_FLAG_MAPPED) { + pr_err("ERROR: v4l2 capture: VIDIOC_DQBUF: " + "Buffer not queued.\n"); + retval = -EINVAL; + } + + spin_unlock_irqrestore(&cam->dqueue_int_lock, lock_flags); + + buf->bytesused = cam->v2f.fmt.pix.sizeimage; + buf->index = frame->index; + buf->flags = frame->buffer.flags; + buf->m = cam->frame[frame->index].buffer.m; + + return retval; +} + +/*! + * V4L interface - open function + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l_open(struct file *file) +{ + struct v4l2_ifparm ifparm; + struct v4l2_format cam_fmt; + ipu_csi_signal_cfg_t csi_param; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int err = 0; + + pr_debug("\nIn MVC: mxc_v4l_open\n"); + pr_debug(" device name is %s\n", dev->name); + + if (!cam) { + pr_err("ERROR: v4l2 capture: Internal error, " + "cam_data not found!\n"); + return -EBADF; + } + + down(&cam->busy_lock); + err = 0; + if (signal_pending(current)) + goto oops; + + if (cam->open_count++ == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + + if (strcmp(mxc_capture_inputs[cam->current_input].name, + "CSI MEM") == 0) { +#if defined(CONFIG_MXC_IPU_CSI_ENC) || defined(CONFIG_MXC_IPU_CSI_ENC_MODULE) + err = csi_enc_select(cam); +#endif + } else if (strcmp(mxc_capture_inputs[cam->current_input].name, + "CSI IC MEM") == 0) { +#if defined(CONFIG_MXC_IPU_PRP_ENC) || defined(CONFIG_MXC_IPU_PRP_ENC_MODULE) + err = prp_enc_select(cam); +#endif + } + + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + + vidioc_int_g_ifparm(cam->sensor, &ifparm); + + csi_param.sens_clksrc = 0; + + csi_param.clk_mode = 0; + csi_param.data_pol = 0; + csi_param.ext_vsync = 0; + + csi_param.pack_tight = 0; + csi_param.force_eof = 0; + csi_param.data_en_pol = 0; + csi_param.mclk = ifparm.u.bt656.clock_curr; + + csi_param.pixclk_pol = ifparm.u.bt656.latch_clk_inv; + + /* Once we handle multiple inputs this will need to change. */ + csi_param.csi = 0; + + if (ifparm.u.bt656.mode + == V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT) + csi_param.data_width = IPU_CSI_DATA_WIDTH_8; + else if (ifparm.u.bt656.mode + == V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT) + csi_param.data_width = IPU_CSI_DATA_WIDTH_10; + else + csi_param.data_width = IPU_CSI_DATA_WIDTH_8; + + + csi_param.Vsync_pol = ifparm.u.bt656.nobt_vs_inv; + csi_param.Hsync_pol = ifparm.u.bt656.nobt_hs_inv; + + csi_param.csi = cam->csi; + + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + vidioc_int_g_fmt_cap(cam->sensor, &cam_fmt); + + /* Reset the sizes. Needed to prevent carryover of last + * operation.*/ + cam->crop_bounds.top = cam->crop_bounds.left = 0; + cam->crop_bounds.width = cam_fmt.fmt.pix.width; + cam->crop_bounds.height = cam_fmt.fmt.pix.height; + + /* This also is the max crop size for this device. */ + cam->crop_defrect.top = cam->crop_defrect.left = 0; + cam->crop_defrect.width = cam_fmt.fmt.pix.width; + cam->crop_defrect.height = cam_fmt.fmt.pix.height; + + /* At this point, this is also the current image size. */ + cam->crop_current.top = cam->crop_current.left = 0; + cam->crop_current.width = cam_fmt.fmt.pix.width; + cam->crop_current.height = cam_fmt.fmt.pix.height; + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, + cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + pr_debug("End of %s: crop_bounds widthxheight %d x %d\n", + __func__, + cam->crop_bounds.width, cam->crop_bounds.height); + pr_debug("End of %s: crop_defrect widthxheight %d x %d\n", + __func__, + cam->crop_defrect.width, cam->crop_defrect.height); + pr_debug("End of %s: crop_current widthxheight %d x %d\n", + __func__, + cam->crop_current.width, cam->crop_current.height); + + csi_param.data_fmt = cam_fmt.fmt.pix.pixelformat; + pr_debug("On Open: Input to ipu size is %d x %d\n", + cam_fmt.fmt.pix.width, cam_fmt.fmt.pix.height); + ipu_csi_set_window_size(cam->crop_current.width, + cam->crop_current.width, + cam->csi); + ipu_csi_set_window_pos(cam->crop_current.left, + cam->crop_current.top, + cam->csi); + ipu_csi_init_interface(cam->crop_bounds.width, + cam->crop_bounds.height, + cam_fmt.fmt.pix.pixelformat, + csi_param); + + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, + true, true); + vidioc_int_init(cam->sensor); + + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, + false, false); +} + + file->private_data = dev; + + oops: + up(&cam->busy_lock); + return err; +} + +/*! + * V4L interface - close function + * + * @param file struct file * + * + * @return 0 success + */ +static int mxc_v4l_close(struct file *file) +{ + struct video_device *dev = video_devdata(file); + int err = 0; + cam_data *cam = video_get_drvdata(dev); + + pr_debug("In MVC:mxc_v4l_close\n"); + + if (!cam) { + pr_err("ERROR: v4l2 capture: Internal error, " + "cam_data not found!\n"); + return -EBADF; + } + + /* for the case somebody hit the ctrl C */ + if (cam->overlay_pid == current->pid) { + err = stop_preview(cam); + cam->overlay_on = false; + } + if (cam->capture_pid == current->pid) { + err |= mxc_streamoff(cam); + wake_up_interruptible(&cam->enc_queue); + } + + if (--cam->open_count == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + pr_info("mxc_v4l_close: release resource\n"); + + if (strcmp(mxc_capture_inputs[cam->current_input].name, + "CSI MEM") == 0) { +#if defined(CONFIG_MXC_IPU_CSI_ENC) || defined(CONFIG_MXC_IPU_CSI_ENC_MODULE) + err |= csi_enc_deselect(cam); +#endif + } else if (strcmp(mxc_capture_inputs[cam->current_input].name, + "CSI IC MEM") == 0) { +#if defined(CONFIG_MXC_IPU_PRP_ENC) || defined(CONFIG_MXC_IPU_PRP_ENC_MODULE) + err |= prp_enc_deselect(cam); +#endif + } + + mxc_free_frame_buf(cam); + file->private_data = NULL; + + /* capture off */ + wake_up_interruptible(&cam->enc_queue); + mxc_free_frames(cam); + cam->enc_counter++; + } + + return err; +} + +#if defined(CONFIG_MXC_IPU_PRP_ENC) || defined(CONFIG_MXC_IPU_CSI_ENC) || \ + defined(CONFIG_MXC_IPU_PRP_ENC_MODULE) || \ + defined(CONFIG_MXC_IPU_CSI_ENC_MODULE) +/* + * V4L interface - read function + * + * @param file struct file * + * @param read buf char * + * @param count size_t + * @param ppos structure loff_t * + * + * @return bytes read + */ +static ssize_t mxc_v4l_read(struct file *file, char *buf, size_t count, + loff_t *ppos) +{ + int err = 0; + u8 *v_address; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + /* Stop the viewfinder */ + if (cam->overlay_on == true) + stop_preview(cam); + + v_address = dma_alloc_coherent(0, + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage), + &cam->still_buf, GFP_DMA | GFP_KERNEL); + + if (!v_address) { + err = -ENOBUFS; + goto exit0; + } + + err = prp_still_select(cam); + if (err != 0) { + err = -EIO; + goto exit1; + } + + cam->still_counter = 0; + err = cam->csi_start(cam); + if (err != 0) { + err = -EIO; + goto exit2; + } + + if (!wait_event_interruptible_timeout(cam->still_queue, + cam->still_counter != 0, + 10 * HZ)) { + pr_err("ERROR: v4l2 capture: mxc_v4l_read timeout counter %x\n", + cam->still_counter); + err = -ETIME; + goto exit2; + } + err = copy_to_user(buf, v_address, cam->v2f.fmt.pix.sizeimage); + + exit2: + prp_still_deselect(cam); + + exit1: + dma_free_coherent(0, cam->v2f.fmt.pix.sizeimage, v_address, + cam->still_buf); + cam->still_buf = 0; + + exit0: + if (cam->overlay_on == true) { + start_preview(cam); + } + + up(&cam->busy_lock); + if (err < 0) + return err; + + return (cam->v2f.fmt.pix.sizeimage - err); +} +#endif + +/*! + * V4L interface - ioctl function + * + * @param file struct file* + * + * @param ioctlnr unsigned int + * + * @param arg void* + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static long mxc_v4l_do_ioctl(struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int retval = 0; + unsigned long lock_flags; + + pr_debug("In MVC: mxc_v4l_do_ioctl %x\n", ioctlnr); + wait_event_interruptible(cam->power_queue, cam->low_power == false); + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + /*! + * V4l2 VIDIOC_QUERYCAP ioctl + */ + case VIDIOC_QUERYCAP: { + struct v4l2_capability *cap = arg; + pr_debug(" case VIDIOC_QUERYCAP\n"); + strcpy(cap->driver, "mxc_v4l2"); + cap->version = KERNEL_VERSION(0, 1, 11); + cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | + V4L2_CAP_VIDEO_OVERLAY | + V4L2_CAP_STREAMING | + V4L2_CAP_READWRITE; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + break; + } + + /*! + * V4l2 VIDIOC_G_FMT ioctl + */ + case VIDIOC_G_FMT: { + struct v4l2_format *gf = arg; + pr_debug(" case VIDIOC_G_FMT\n"); + retval = mxc_v4l2_g_fmt(cam, gf); + break; + } + + /*! + * V4l2 VIDIOC_S_FMT ioctl + */ + case VIDIOC_S_FMT: { + struct v4l2_format *sf = arg; + pr_debug(" case VIDIOC_S_FMT\n"); + retval = mxc_v4l2_s_fmt(cam, sf); + break; + } + + /*! + * V4l2 VIDIOC_REQBUFS ioctl + */ + case VIDIOC_REQBUFS: { + struct v4l2_requestbuffers *req = arg; + pr_debug(" case VIDIOC_REQBUFS\n"); + + if (req->count > FRAME_NUM) { + pr_err("ERROR: v4l2 capture: VIDIOC_REQBUFS: " + "not enough buffers\n"); + req->count = FRAME_NUM; + } + + if ((req->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) || + (req->memory != V4L2_MEMORY_MMAP)) { + pr_err("ERROR: v4l2 capture: VIDIOC_REQBUFS: " + "wrong buffer type\n"); + retval = -EINVAL; + break; + } + + mxc_streamoff(cam); + mxc_free_frame_buf(cam); + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + + retval = mxc_allocate_frame_buf(cam, req->count); + break; + } + + /*! + * V4l2 VIDIOC_QUERYBUF ioctl + */ + case VIDIOC_QUERYBUF: { + struct v4l2_buffer *buf = arg; + int index = buf->index; + pr_debug(" case VIDIOC_QUERYBUF\n"); + + if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_err("ERROR: v4l2 capture: " + "VIDIOC_QUERYBUFS: " + "wrong buffer type\n"); + retval = -EINVAL; + break; + } + + memset(buf, 0, sizeof(buf)); + buf->index = index; + + down(&cam->param_lock); + retval = mxc_v4l2_buffer_status(cam, buf); + up(&cam->param_lock); + break; + } + + /*! + * V4l2 VIDIOC_QBUF ioctl + */ + case VIDIOC_QBUF: { + struct v4l2_buffer *buf = arg; + int index = buf->index; + pr_debug(" case VIDIOC_QBUF\n"); + + spin_lock_irqsave(&cam->queue_int_lock, lock_flags); + cam->frame[index].buffer.m.offset = buf->m.offset; + if ((cam->frame[index].buffer.flags & 0x7) == + V4L2_BUF_FLAG_MAPPED) { + cam->frame[index].buffer.flags |= + V4L2_BUF_FLAG_QUEUED; + if (cam->skip_frame > 0) { + list_add_tail(&cam->frame[index].queue, + &cam->working_q); + retval = + cam->enc_update_eba(cam-> + frame[index]. + buffer.m.offset, + &cam-> + ping_pong_csi); + cam->skip_frame = 0; + } else { + list_add_tail(&cam->frame[index].queue, + &cam->ready_q); + } + } else if (cam->frame[index].buffer. + flags & V4L2_BUF_FLAG_QUEUED) { + pr_err("ERROR: v4l2 capture: VIDIOC_QBUF: " + "buffer already queued\n"); + retval = -EINVAL; + } else if (cam->frame[index].buffer. + flags & V4L2_BUF_FLAG_DONE) { + pr_err("ERROR: v4l2 capture: VIDIOC_QBUF: " + "overwrite done buffer.\n"); + cam->frame[index].buffer.flags &= + ~V4L2_BUF_FLAG_DONE; + cam->frame[index].buffer.flags |= + V4L2_BUF_FLAG_QUEUED; + retval = -EINVAL; + } + + buf->flags = cam->frame[index].buffer.flags; + spin_unlock_irqrestore(&cam->queue_int_lock, lock_flags); + break; + } + + /*! + * V4l2 VIDIOC_DQBUF ioctl + */ + case VIDIOC_DQBUF: { + struct v4l2_buffer *buf = arg; + pr_debug(" case VIDIOC_DQBUF\n"); + + if ((cam->enc_counter == 0) && + (file->f_flags & O_NONBLOCK)) { + retval = -EAGAIN; + break; + } + + retval = mxc_v4l_dqueue(cam, buf); + + break; + } + + /*! + * V4l2 VIDIOC_STREAMON ioctl + */ + case VIDIOC_STREAMON: { + pr_debug(" case VIDIOC_STREAMON\n"); + retval = mxc_streamon(cam); + break; + } + + /*! + * V4l2 VIDIOC_STREAMOFF ioctl + */ + case VIDIOC_STREAMOFF: { + pr_debug(" case VIDIOC_STREAMOFF\n"); + retval = mxc_streamoff(cam); + break; + } + + /*! + * V4l2 VIDIOC_G_CTRL ioctl + */ + case VIDIOC_G_CTRL: { + pr_debug(" case VIDIOC_G_CTRL\n"); + retval = mxc_v4l2_g_ctrl(cam, arg); + break; + } + + /*! + * V4l2 VIDIOC_S_CTRL ioctl + */ + case VIDIOC_S_CTRL: { + pr_debug(" case VIDIOC_S_CTRL\n"); + retval = mxc_v4l2_s_ctrl(cam, arg); + break; + } + + /*! + * V4l2 VIDIOC_CROPCAP ioctl + */ + case VIDIOC_CROPCAP: { + struct v4l2_cropcap *cap = arg; + pr_debug(" case VIDIOC_CROPCAP\n"); + if (cap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + cap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + cap->bounds = cam->crop_bounds; + cap->defrect = cam->crop_defrect; + break; + } + + /*! + * V4l2 VIDIOC_G_CROP ioctl + */ + case VIDIOC_G_CROP: { + struct v4l2_crop *crop = arg; + pr_debug(" case VIDIOC_G_CROP\n"); + + if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + crop->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + crop->c = cam->crop_current; + break; + } + + /*! + * V4l2 VIDIOC_S_CROP ioctl + */ + case VIDIOC_S_CROP: { + struct v4l2_crop *crop = arg; + struct v4l2_rect *b = &cam->crop_bounds; + pr_debug(" case VIDIOC_S_CROP\n"); + + if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + crop->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + + crop->c.top = (crop->c.top < b->top) ? b->top + : crop->c.top; + if (crop->c.top > b->top + b->height) + crop->c.top = b->top + b->height - 1; + if (crop->c.height > b->top + b->height - crop->c.top) + crop->c.height = + b->top + b->height - crop->c.top; + + crop->c.left = (crop->c.left < b->left) ? b->left + : crop->c.left; + if (crop->c.left > b->left + b->width) + crop->c.left = b->left + b->width - 1; + if (crop->c.width > b->left - crop->c.left + b->width) + crop->c.width = + b->left - crop->c.left + b->width; + + crop->c.width -= crop->c.width % 8; + crop->c.left -= crop->c.left % 4; + cam->crop_current = crop->c; + + pr_debug(" Cropping Input to ipu size %d x %d\n", + cam->crop_current.width, + cam->crop_current.height); + ipu_csi_set_window_size(cam->crop_current.width, + cam->crop_current.height, + cam->csi); + ipu_csi_set_window_pos(cam->crop_current.left, + cam->crop_current.top, + cam->csi); + break; + } + + /*! + * V4l2 VIDIOC_OVERLAY ioctl + */ + case VIDIOC_OVERLAY: { + int *on = arg; + pr_debug(" VIDIOC_OVERLAY on=%d\n", *on); + if (*on) { + cam->overlay_on = true; + cam->overlay_pid = current->pid; + retval = start_preview(cam); + } + if (!*on) { + retval = stop_preview(cam); + cam->overlay_on = false; + } + break; + } + + /*! + * V4l2 VIDIOC_G_FBUF ioctl + */ + case VIDIOC_G_FBUF: { + struct v4l2_framebuffer *fb = arg; + pr_debug(" case VIDIOC_G_FBUF\n"); + *fb = cam->v4l2_fb; + fb->capability = V4L2_FBUF_CAP_EXTERNOVERLAY; + break; + } + + /*! + * V4l2 VIDIOC_S_FBUF ioctl + */ + case VIDIOC_S_FBUF: { + struct v4l2_framebuffer *fb = arg; + pr_debug(" case VIDIOC_S_FBUF\n"); + cam->v4l2_fb = *fb; + break; + } + + case VIDIOC_G_PARM: { + struct v4l2_streamparm *parm = arg; + pr_debug(" case VIDIOC_G_PARM\n"); + vidioc_int_g_parm(cam->sensor, parm); + break; + } + + case VIDIOC_S_PARM: { + struct v4l2_streamparm *parm = arg; + pr_debug(" case VIDIOC_S_PARM\n"); + retval = mxc_v4l2_s_param(cam, parm); + break; + } + + /* linux v4l2 bug, kernel c0485619 user c0405619 */ + case VIDIOC_ENUMSTD: { + struct v4l2_standard *e = arg; + pr_debug(" case VIDIOC_ENUMSTD\n"); + *e = cam->standard; + break; + } + + case VIDIOC_G_STD: { + v4l2_std_id *e = arg; + pr_debug(" case VIDIOC_G_STD\n"); + retval = mxc_v4l2_g_std(cam, e); + break; + } + + case VIDIOC_S_STD: { + v4l2_std_id *e = arg; + pr_debug(" case VIDIOC_S_STD\n"); + retval = mxc_v4l2_s_std(cam, *e); + + break; + } + + case VIDIOC_ENUMOUTPUT: { + struct v4l2_output *output = arg; + pr_debug(" case VIDIOC_ENUMOUTPUT\n"); + if (output->index >= MXC_V4L2_CAPTURE_NUM_OUTPUTS) { + retval = -EINVAL; + break; + } + *output = mxc_capture_outputs[output->index]; + + break; + } + case VIDIOC_G_OUTPUT: { + int *p_output_num = arg; + pr_debug(" case VIDIOC_G_OUTPUT\n"); + *p_output_num = cam->output; + break; + } + + case VIDIOC_S_OUTPUT: { + int *p_output_num = arg; + pr_debug(" case VIDIOC_S_OUTPUT\n"); + if (*p_output_num >= MXC_V4L2_CAPTURE_NUM_OUTPUTS) { + retval = -EINVAL; + break; + } + cam->output = *p_output_num; + break; + } + + case VIDIOC_ENUMINPUT: { + struct v4l2_input *input = arg; + pr_debug(" case VIDIOC_ENUMINPUT\n"); + if (input->index >= MXC_V4L2_CAPTURE_NUM_INPUTS) { + retval = -EINVAL; + break; + } + *input = mxc_capture_inputs[input->index]; + break; + } + + case VIDIOC_G_INPUT: { + int *index = arg; + pr_debug(" case VIDIOC_G_INPUT\n"); + *index = cam->current_input; + break; + } + + case VIDIOC_S_INPUT: { + int *index = arg; + pr_debug(" case VIDIOC_S_INPUT\n"); + if (*index >= MXC_V4L2_CAPTURE_NUM_INPUTS) { + retval = -EINVAL; + break; + } + + if (*index == cam->current_input) + break; + + if ((mxc_capture_inputs[cam->current_input].status & + V4L2_IN_ST_NO_POWER) == 0) { + retval = mxc_streamoff(cam); + if (retval) + break; + mxc_capture_inputs[cam->current_input].status |= + V4L2_IN_ST_NO_POWER; + } + + if (strcmp(mxc_capture_inputs[*index].name, "CSI MEM") == 0) { +#if defined(CONFIG_MXC_IPU_CSI_ENC) || defined(CONFIG_MXC_IPU_CSI_ENC_MODULE) + retval = csi_enc_select(cam); + if (retval) + break; +#endif + } else if (strcmp(mxc_capture_inputs[*index].name, + "CSI IC MEM") == 0) { +#if defined(CONFIG_MXC_IPU_PRP_ENC) || defined(CONFIG_MXC_IPU_PRP_ENC_MODULE) + retval = prp_enc_select(cam); + if (retval) + break; +#endif + } + + mxc_capture_inputs[*index].status &= ~V4L2_IN_ST_NO_POWER; + cam->current_input = *index; + break; + } + + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + default: + pr_debug(" case default or not supported\n"); + retval = -EINVAL; + break; + } + + up(&cam->busy_lock); + return retval; +} + +/* + * V4L interface - ioctl function + * + * @return None + */ +static long mxc_v4l_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + pr_debug("In MVC:mxc_v4l_ioctl\n"); + return video_usercopy(file, cmd, arg, mxc_v4l_do_ioctl); +} + +/*! + * V4L interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, ENOBUFS remap_page error + */ +static int mxc_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *dev = video_devdata(file); + unsigned long size; + int res = 0; + cam_data *cam = video_get_drvdata(dev); + + pr_debug("In MVC:mxc_mmap\n"); + pr_debug(" pgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + size = vma->vm_end - vma->vm_start; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + pr_err("ERROR: v4l2 capture: mxc_mmap: " + "remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + + mxc_mmap_exit: + up(&cam->busy_lock); + return res; +} + +/*! + * V4L interface - poll function + * + * @param file structure file * + * + * @param wait structure poll_table_struct * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_poll(struct file *file, struct poll_table_struct *wait) +{ + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + pr_debug("In MVC:mxc_poll\n"); + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + queue = &cam->enc_queue; + poll_wait(file, queue, wait); + + up(&cam->busy_lock); + + return res; +} + +/*! + * This structure defines the functions to be called in this driver. + */ +static struct v4l2_file_operations mxc_v4l_fops = { + .owner = THIS_MODULE, + .open = mxc_v4l_open, + .release = mxc_v4l_close, + .read = mxc_v4l_read, + .ioctl = mxc_v4l_ioctl, + .mmap = mxc_mmap, + .poll = mxc_poll, +}; + +static struct video_device mxc_v4l_template = { + .name = "Mxc Camera", + .fops = &mxc_v4l_fops, + .release = video_device_release, +}; + +/*! + * This function can be used to release any platform data on closing. + */ +static void camera_platform_release(struct device *device) +{ +} + +/*! Device Definition for Mt9v111 devices */ +static struct platform_device mxc_v4l2_devices = { + .name = "mxc_v4l2", + .dev = { + .release = camera_platform_release, + }, + .id = 0, +}; + +/*! + * Camera V4l2 callback function. + * + * @param mask u32 + * + * @param dev void device structure + * + * @return status + */ +static void camera_callback(u32 mask, void *dev) +{ + struct mxc_v4l_frame *done_frame; + struct mxc_v4l_frame *ready_frame; + + cam_data *cam = (cam_data *) dev; + if (cam == NULL) + return; + + pr_debug("In MVC:camera_callback\n"); + + if (list_empty(&cam->working_q)) { + pr_err("ERROR: v4l2 capture: camera_callback: " + "working queue empty\n"); + return; + } + + done_frame = + list_entry(cam->working_q.next, struct mxc_v4l_frame, queue); + if (done_frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + done_frame->buffer.flags |= V4L2_BUF_FLAG_DONE; + done_frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + + if (list_empty(&cam->ready_q)) { + cam->skip_frame++; + } else { + ready_frame = list_entry(cam->ready_q.next, + struct mxc_v4l_frame, + queue); + list_del(cam->ready_q.next); + list_add_tail(&ready_frame->queue, &cam->working_q); + cam->enc_update_eba(ready_frame->buffer.m.offset, + &cam->ping_pong_csi); + } + + /* Added to the done queue */ + list_del(cam->working_q.next); + list_add_tail(&done_frame->queue, &cam->done_q); + + /* Wake up the queue */ + cam->enc_counter++; + wake_up_interruptible(&cam->enc_queue); + } else { + pr_err("ERROR: v4l2 capture: camera_callback: " + "buffer not queued\n"); + } +} + +/*! + * initialize cam_data structure + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static void init_camera_struct(cam_data *cam) +{ + pr_debug("In MVC: init_camera_struct\n"); + + /* Default everything to 0 */ + memset(cam, 0, sizeof(cam_data)); + + init_MUTEX(&cam->param_lock); + init_MUTEX(&cam->busy_lock); + + cam->video_dev = video_device_alloc(); + if (cam->video_dev == NULL) + return; + + *(cam->video_dev) = mxc_v4l_template; + + video_set_drvdata(cam->video_dev, cam); + dev_set_drvdata(&mxc_v4l2_devices.dev, (void *)cam); + cam->video_dev->minor = -1; + + init_waitqueue_head(&cam->enc_queue); + init_waitqueue_head(&cam->still_queue); + + /* setup cropping */ + cam->crop_bounds.left = 0; + cam->crop_bounds.width = 640; + cam->crop_bounds.top = 0; + cam->crop_bounds.height = 480; + cam->crop_current = cam->crop_defrect = cam->crop_bounds; + ipu_csi_set_window_size(cam->crop_current.width, + cam->crop_current.height, cam->csi); + ipu_csi_set_window_pos(cam->crop_current.left, + cam->crop_current.top, cam->csi); + cam->streamparm.parm.capture.capturemode = 0; + + cam->standard.index = 0; + cam->standard.id = V4L2_STD_UNKNOWN; + cam->standard.frameperiod.denominator = 30; + cam->standard.frameperiod.numerator = 1; + cam->standard.framelines = 480; + cam->standard_autodetect = true; + cam->streamparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->streamparm.parm.capture.timeperframe = cam->standard.frameperiod; + cam->streamparm.parm.capture.capability = V4L2_CAP_TIMEPERFRAME; + cam->overlay_on = false; + cam->capture_on = false; + cam->skip_frame = 0; + cam->v4l2_fb.flags = V4L2_FBUF_FLAG_OVERLAY; + + cam->v2f.fmt.pix.sizeimage = 352 * 288 * 3 / 2; + cam->v2f.fmt.pix.bytesperline = 288 * 3 / 2; + cam->v2f.fmt.pix.width = 288; + cam->v2f.fmt.pix.height = 352; + cam->v2f.fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + cam->win.w.width = 160; + cam->win.w.height = 160; + cam->win.w.left = 0; + cam->win.w.top = 0; + + cam->csi = 0; /* Need to determine how to set this correctly with + * multiple video input devices. */ + + cam->enc_callback = camera_callback; + init_waitqueue_head(&cam->power_queue); + spin_lock_init(&cam->queue_int_lock); + spin_lock_init(&cam->dqueue_int_lock); +} + +/*! + * camera_power function + * Turns Sensor power On/Off + * + * @param cam cam data struct + * @param cameraOn true to turn camera on, false to turn off power. + * + * @return status + */ +static u8 camera_power(cam_data *cam, bool cameraOn) +{ + pr_debug("In MVC:camera_power on=%d\n", cameraOn); + + if (cameraOn == true) { + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + vidioc_int_s_power(cam->sensor, 1); + } else { + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + vidioc_int_s_power(cam->sensor, 0); + } + return 0; +} + +/*! + * This function is called to put the sensor in a low power state. + * Refer to the document driver-model/driver.txt in the kernel source tree + * for more information. + * + * @param pdev the device structure used to give information on which I2C + * to suspend + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure. + */ +static int mxc_v4l2_suspend(struct platform_device *pdev, pm_message_t state) +{ + cam_data *cam = platform_get_drvdata(pdev); + + pr_debug("In MVC:mxc_v4l2_suspend\n"); + + if (cam == NULL) { + return -1; + } + + cam->low_power = true; + + if (cam->overlay_on == true) + stop_preview(cam); + if ((cam->capture_on == true) && cam->enc_disable) { + cam->enc_disable(cam); + } + camera_power(cam, false); + + return 0; +} + +/*! + * This function is called to bring the sensor back from a low power state. + * Refer to the document driver-model/driver.txt in the kernel source tree + * for more information. + * + * @param pdev the device structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxc_v4l2_resume(struct platform_device *pdev) +{ + cam_data *cam = platform_get_drvdata(pdev); + + pr_debug("In MVC:mxc_v4l2_resume\n"); + + if (cam == NULL) { + return -1; + } + + cam->low_power = false; + wake_up_interruptible(&cam->power_queue); + camera_power(cam, true); + + if (cam->overlay_on == true) + start_preview(cam); + if (cam->capture_on == true) + mxc_streamon(cam); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_v4l2_driver = { + .driver = { + .name = "mxc_v4l2", + }, + .probe = NULL, + .remove = NULL, + .suspend = mxc_v4l2_suspend, + .resume = mxc_v4l2_resume, + .shutdown = NULL, +}; + +/*! + * Initializes the camera driver. + */ +static int mxc_v4l2_master_attach(struct v4l2_int_device *slave) +{ + cam_data *cam = slave->u.slave->master->priv; + struct v4l2_format cam_fmt; + + pr_debug("In MVC: mxc_v4l2_master_attach\n"); + pr_debug(" slave.name = %s\n", slave->name); + pr_debug(" master.name = %s\n", slave->u.slave->master->name); + + cam->sensor = slave; + if (slave == NULL) { + pr_err("ERROR: v4l2 capture: slave parameter not valid.\n"); + return -1; + } + + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, true, true); + vidioc_int_dev_init(slave); + ipu_csi_enable_mclk_if(CSI_MCLK_I2C, cam->csi, false, false); + cam_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + vidioc_int_g_fmt_cap(cam->sensor, &cam_fmt); + + /* Used to detect TV in (type 1) vs. camera (type 0)*/ + cam->device_type = cam_fmt.fmt.pix.priv; + + /* Set the input size to the ipu for this device */ + cam->crop_bounds.top = cam->crop_bounds.left = 0; + cam->crop_bounds.width = cam_fmt.fmt.pix.width; + cam->crop_bounds.height = cam_fmt.fmt.pix.height; + + /* This also is the max crop size for this device. */ + cam->crop_defrect.top = cam->crop_defrect.left = 0; + cam->crop_defrect.width = cam_fmt.fmt.pix.width; + cam->crop_defrect.height = cam_fmt.fmt.pix.height; + + /* At this point, this is also the current image size. */ + cam->crop_current.top = cam->crop_current.left = 0; + cam->crop_current.width = cam_fmt.fmt.pix.width; + cam->crop_current.height = cam_fmt.fmt.pix.height; + + pr_debug("End of %s: v2f pix widthxheight %d x %d\n", + __func__, + cam->v2f.fmt.pix.width, cam->v2f.fmt.pix.height); + pr_debug("End of %s: crop_bounds widthxheight %d x %d\n", + __func__, + cam->crop_bounds.width, cam->crop_bounds.height); + pr_debug("End of %s: crop_defrect widthxheight %d x %d\n", + __func__, + cam->crop_defrect.width, cam->crop_defrect.height); + pr_debug("End of %s: crop_current widthxheight %d x %d\n", + __func__, + cam->crop_current.width, cam->crop_current.height); + + return 0; +} + +/*! + * Disconnects the camera driver. + */ +static void mxc_v4l2_master_detach(struct v4l2_int_device *slave) +{ + pr_debug("In MVC:mxc_v4l2_master_detach\n"); + vidioc_int_dev_exit(slave); +} + +/*! + * Entry point for the V4L2 + * + * @return Error code indicating success or failure + */ +static __init int camera_init(void) +{ + u8 err = 0; + + pr_debug("In MVC:camera_init\n"); + + /* Register the device driver structure. */ + err = platform_driver_register(&mxc_v4l2_driver); + if (err != 0) { + pr_err("ERROR: v4l2 capture:camera_init: " + "platform_driver_register failed.\n"); + return err; + } + + /* Create g_cam and initialize it. */ + if ((g_cam = kmalloc(sizeof(cam_data), GFP_KERNEL)) == NULL) { + pr_err("ERROR: v4l2 capture: failed to register camera\n"); + platform_driver_unregister(&mxc_v4l2_driver); + return -1; + } + init_camera_struct(g_cam); + + /* Set up the v4l2 device and register it*/ + mxc_v4l2_int_device.priv = g_cam; + /* This function contains a bug that won't let this be rmmod'd. */ + v4l2_int_device_register(&mxc_v4l2_int_device); + + /* Register the I2C device */ + err = platform_device_register(&mxc_v4l2_devices); + if (err != 0) { + pr_err("ERROR: v4l2 capture: camera_init: " + "platform_device_register failed.\n"); + platform_driver_unregister(&mxc_v4l2_driver); + kfree(g_cam); + g_cam = NULL; + return err; + } + + /* register v4l video device */ + if (video_register_device(g_cam->video_dev, VFL_TYPE_GRABBER, video_nr) + == -1) { + platform_device_unregister(&mxc_v4l2_devices); + platform_driver_unregister(&mxc_v4l2_driver); + kfree(g_cam); + g_cam = NULL; + pr_err("ERROR: v4l2 capture: video_register_device failed\n"); + return -1; + } + pr_debug(" Video device registered: %s #%d\n", + g_cam->video_dev->name, g_cam->video_dev->minor); + + return err; +} + +/*! + * Exit and cleanup for the V4L2 + */ +static void __exit camera_exit(void) +{ + pr_debug("In MVC: camera_exit\n"); + + pr_info("V4L2 unregistering video\n"); + + if (g_cam->open_count) { + pr_err("ERROR: v4l2 capture:camera open " + "-- setting ops to NULL\n"); + } else { + pr_info("V4L2 freeing image input device\n"); + v4l2_int_device_unregister(&mxc_v4l2_int_device); + video_unregister_device(g_cam->video_dev); + platform_driver_unregister(&mxc_v4l2_driver); + platform_device_unregister(&mxc_v4l2_devices); + + mxc_free_frame_buf(g_cam); + kfree(g_cam); + g_cam = NULL; + } +} + +module_init(camera_init); +module_exit(camera_exit); + +module_param(video_nr, int, 0444); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2 capture driver for Mxc based cameras"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mx27_prp.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mx27_prp.h @@ -0,0 +1,310 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_prp.h + * + * @brief Header file for MX27 V4L2 capture driver + * + * @ingroup MXC_V4L2_CAPTURE + */ +#ifndef __MX27_PRP_H__ +#define __MX27_PRP_H__ + +#define PRP_REG(ofs) (IO_ADDRESS(EMMA_BASE_ADDR) + ofs) + +/* Register definitions of PrP */ +#define PRP_CNTL PRP_REG(0x00) +#define PRP_INTRCNTL PRP_REG(0x04) +#define PRP_INTRSTATUS PRP_REG(0x08) +#define PRP_SOURCE_Y_PTR PRP_REG(0x0C) +#define PRP_SOURCE_CB_PTR PRP_REG(0x10) +#define PRP_SOURCE_CR_PTR PRP_REG(0x14) +#define PRP_DEST_RGB1_PTR PRP_REG(0x18) +#define PRP_DEST_RGB2_PTR PRP_REG(0x1C) +#define PRP_DEST_Y_PTR PRP_REG(0x20) +#define PRP_DEST_CB_PTR PRP_REG(0x24) +#define PRP_DEST_CR_PTR PRP_REG(0x28) +#define PRP_SOURCE_FRAME_SIZE PRP_REG(0x2C) +#define PRP_CH1_LINE_STRIDE PRP_REG(0x30) +#define PRP_SRC_PIXEL_FORMAT_CNTL PRP_REG(0x34) +#define PRP_CH1_PIXEL_FORMAT_CNTL PRP_REG(0x38) +#define PRP_CH1_OUT_IMAGE_SIZE PRP_REG(0x3C) +#define PRP_CH2_OUT_IMAGE_SIZE PRP_REG(0x40) +#define PRP_SOURCE_LINE_STRIDE PRP_REG(0x44) +#define PRP_CSC_COEF_012 PRP_REG(0x48) +#define PRP_CSC_COEF_345 PRP_REG(0x4C) +#define PRP_CSC_COEF_678 PRP_REG(0x50) +#define PRP_CH1_RZ_HORI_COEF1 PRP_REG(0x54) +#define PRP_CH1_RZ_HORI_COEF2 PRP_REG(0x58) +#define PRP_CH1_RZ_HORI_VALID PRP_REG(0x5C) +#define PRP_CH1_RZ_VERT_COEF1 PRP_REG(0x60) +#define PRP_CH1_RZ_VERT_COEF2 PRP_REG(0x64) +#define PRP_CH1_RZ_VERT_VALID PRP_REG(0x68) +#define PRP_CH2_RZ_HORI_COEF1 PRP_REG(0x6C) +#define PRP_CH2_RZ_HORI_COEF2 PRP_REG(0x70) +#define PRP_CH2_RZ_HORI_VALID PRP_REG(0x74) +#define PRP_CH2_RZ_VERT_COEF1 PRP_REG(0x78) +#define PRP_CH2_RZ_VERT_COEF2 PRP_REG(0x7C) +#define PRP_CH2_RZ_VERT_VALID PRP_REG(0x80) + +#define B_SET(b) (1 << (b)) + +/* Bit definitions for PrP control register */ +#define PRP_CNTL_RSTVAL 0x28 +#define PRP_CNTL_CH1EN B_SET(0) +#define PRP_CNTL_CH2EN B_SET(1) +#define PRP_CNTL_CSI B_SET(2) +#define PRP_CNTL_IN_32 B_SET(3) +#define PRP_CNTL_IN_RGB B_SET(4) +#define PRP_CNTL_IN_YUV420 0 +#define PRP_CNTL_IN_YUV422 PRP_CNTL_IN_32 +#define PRP_CNTL_IN_RGB16 PRP_CNTL_IN_RGB +#define PRP_CNTL_IN_RGB32 (PRP_CNTL_IN_RGB | PRP_CNTL_IN_32) +#define PRP_CNTL_CH1_RGB8 0 +#define PRP_CNTL_CH1_RGB16 B_SET(5) +#define PRP_CNTL_CH1_RGB32 B_SET(6) +#define PRP_CNTL_CH1_YUV422 (B_SET(5) | B_SET(6)) +#define PRP_CNTL_CH2_YUV420 0 +#define PRP_CNTL_CH2_YUV422 B_SET(7) +#define PRP_CNTL_CH2_YUV444 B_SET(8) +#define PRP_CNTL_CH1_LOOP B_SET(9) +#define PRP_CNTL_CH2_LOOP B_SET(10) +#define PRP_CNTL_AUTODROP B_SET(11) +#define PRP_CNTL_RST B_SET(12) +#define PRP_CNTL_CNTREN B_SET(13) +#define PRP_CNTL_WINEN B_SET(14) +#define PRP_CNTL_UNCHAIN B_SET(15) +#define PRP_CNTL_IN_SKIP_NONE 0 +#define PRP_CNTL_IN_SKIP_1_2 B_SET(16) +#define PRP_CNTL_IN_SKIP_1_3 B_SET(17) +#define PRP_CNTL_IN_SKIP_2_3 (B_SET(16) | B_SET(17)) +#define PRP_CNTL_IN_SKIP_1_4 B_SET(18) +#define PRP_CNTL_IN_SKIP_3_4 (B_SET(16) | B_SET(18)) +#define PRP_CNTL_IN_SKIP_2_5 (B_SET(17) | B_SET(18)) +#define PRP_CNTL_IN_SKIP_3_5 (B_SET(16) | B_SET(17) | B_SET(18)) +#define PRP_CNTL_CH1_SKIP_NONE 0 +#define PRP_CNTL_CH1_SKIP_1_2 B_SET(19) +#define PRP_CNTL_CH1_SKIP_1_3 B_SET(20) +#define PRP_CNTL_CH1_SKIP_2_3 (B_SET(19) | B_SET(20)) +#define PRP_CNTL_CH1_SKIP_1_4 B_SET(21) +#define PRP_CNTL_CH1_SKIP_3_4 (B_SET(19) | B_SET(21)) +#define PRP_CNTL_CH1_SKIP_2_5 (B_SET(20) | B_SET(21)) +#define PRP_CNTL_CH1_SKIP_3_5 (B_SET(19) | B_SET(20) | B_SET(21)) +#define PRP_CNTL_CH2_SKIP_NONE 0 +#define PRP_CNTL_CH2_SKIP_1_2 B_SET(22) +#define PRP_CNTL_CH2_SKIP_1_3 B_SET(23) +#define PRP_CNTL_CH2_SKIP_2_3 (B_SET(22) | B_SET(23)) +#define PRP_CNTL_CH2_SKIP_1_4 B_SET(24) +#define PRP_CNTL_CH2_SKIP_3_4 (B_SET(22) | B_SET(24)) +#define PRP_CNTL_CH2_SKIP_2_5 (B_SET(23) | B_SET(24)) +#define PRP_CNTL_CH2_SKIP_3_5 (B_SET(22) | B_SET(23) | B_SET(24)) +#define PRP_CNTL_FIFO_I128 0 +#define PRP_CNTL_FIFO_I96 B_SET(25) +#define PRP_CNTL_FIFO_I64 B_SET(26) +#define PRP_CNTL_FIFO_I32 (B_SET(25) | B_SET(26)) +#define PRP_CNTL_FIFO_O64 0 +#define PRP_CNTL_FIFO_O48 B_SET(27) +#define PRP_CNTL_FIFO_O32 B_SET(28) +#define PRP_CNTL_FIFO_O16 (B_SET(27) | B_SET(28)) +#define PRP_CNTL_CH2B1 B_SET(29) +#define PRP_CNTL_CH2B2 B_SET(30) +#define PRP_CNTL_CH2_FLOWEN B_SET(31) + +/* Bit definitions for PrP interrupt control register */ +#define PRP_INTRCNTL_RDERR B_SET(0) +#define PRP_INTRCNTL_CH1WERR B_SET(1) +#define PRP_INTRCNTL_CH2WERR B_SET(2) +#define PRP_INTRCNTL_CH1FC B_SET(3) +#define PRP_INTRCNTL_CH2FC B_SET(5) +#define PRP_INTRCNTL_LBOVF B_SET(7) +#define PRP_INTRCNTL_CH2OVF B_SET(8) + +/* Bit definitions for PrP interrupt status register */ +#define PRP_INTRSTAT_RDERR B_SET(0) +#define PRP_INTRSTAT_CH1WERR B_SET(1) +#define PRP_INTRSTAT_CH2WERR B_SET(2) +#define PRP_INTRSTAT_CH2BUF2 B_SET(3) +#define PRP_INTRSTAT_CH2BUF1 B_SET(4) +#define PRP_INTRSTAT_CH1BUF2 B_SET(5) +#define PRP_INTRSTAT_CH1BUF1 B_SET(6) +#define PRP_INTRSTAT_LBOVF B_SET(7) +#define PRP_INTRSTAT_CH2OVF B_SET(8) + +#define PRP_CHANNEL_1 0x1 +#define PRP_CHANNEL_2 0x2 + +/* PRP-CSI config */ +#define PRP_CSI_EN 0x80 +#define PRP_CSI_LOOP (0x40 | PRP_CSI_EN) +#define PRP_CSI_IRQ_FRM (0x08 | PRP_CSI_LOOP) +#define PRP_CSI_IRQ_CH1ERR (0x10 | PRP_CSI_LOOP) +#define PRP_CSI_IRQ_CH2ERR (0x20 | PRP_CSI_LOOP) +#define PRP_CSI_IRQ_ALL (0x38 | PRP_CSI_LOOP) +#define PRP_CSI_SKIP_NONE 0 +#define PRP_CSI_SKIP_1OF2 1 +#define PRP_CSI_SKIP_1OF3 2 +#define PRP_CSI_SKIP_2OF3 3 +#define PRP_CSI_SKIP_1OF4 4 +#define PRP_CSI_SKIP_3OF4 5 +#define PRP_CSI_SKIP_2OF5 6 +#define PRP_CSI_SKIP_4OF5 7 + +#define PRP_PIXIN_RGB565 0x2CA00565 +#define PRP_PIXIN_RGB888 0x41000888 +#define PRP_PIXIN_YUV420 0 +#define PRP_PIXIN_YUYV 0x22000888 +#define PRP_PIXIN_YVYU 0x20100888 +#define PRP_PIXIN_UYVY 0x03080888 +#define PRP_PIXIN_VYUY 0x01180888 +#define PRP_PIXIN_YUV422 0x62080888 + +#define PRP_PIX1_RGB332 0x14400322 +#define PRP_PIX1_RGB565 0x2CA00565 +#define PRP_PIX1_RGB888 0x41000888 +#define PRP_PIX1_YUYV 0x62000888 +#define PRP_PIX1_YVYU 0x60100888 +#define PRP_PIX1_UYVY 0x43080888 +#define PRP_PIX1_VYUY 0x41180888 +#define PRP_PIX1_UNUSED 0 + +#define PRP_PIX2_YUV420 0 +#define PRP_PIX2_YUV422 1 +#define PRP_PIX2_YUV444 4 +#define PRP_PIX2_UNUSED 8 + +#define PRP_ALGO_WIDTH_ANY 0 +#define PRP_ALGO_HEIGHT_ANY 0 +#define PRP_ALGO_WIDTH_BIL 1 +#define PRP_ALGO_WIDTH_AVG 2 +#define PRP_ALGO_HEIGHT_BIL 4 +#define PRP_ALGO_HEIGHT_AVG 8 +#define PRP_ALGO_BYPASS 0x10 + +typedef struct _emma_prp_ratio { + unsigned short num; + unsigned short den; +} emma_prp_ratio; + +/* + * The following definitions are for resizing. Definition values must not + * be changed otherwise decision logic will be wrong. + */ +#define SCALE_RETRY 16 /* retry times if ratio is not supported */ + +#define BC_COEF 3 +#define MAX_TBL 20 +#define SZ_COEF (1 << BC_COEF) + +#define ALGO_AUTO 0 +#define ALGO_BIL 1 +#define ALGO_AVG 2 + +typedef struct { + char tbl[20]; /* table entries */ + char len; /* table length used */ + char algo; /* ALGO_xxx */ + char ratio[20]; /* ratios used */ +} scale_t; + +/* + * structure for prp scaling. + * algorithm - bilinear or averaging for each axis + * PRP_ALGO_WIDTH_x | PRP_ALGO_HEIGHT_x | PRP_ALGO_BYPASS + * PRP_ALGO_BYPASS - Ch1 will not use Ch2 scaling with this flag + */ +typedef struct _emma_prp_scale { + unsigned char algo; + emma_prp_ratio width; + emma_prp_ratio height; +} emma_prp_scale; + +typedef struct emma_prp_cfg { + unsigned int in_pix; /* PRP_PIXIN_xxx */ + unsigned short in_width; /* image width, 32 - 2044 */ + unsigned short in_height; /* image height, 32 - 2044 */ + unsigned char in_csi; /* PRP_CSI_SKIP_x | PRP_CSI_LOOP */ + unsigned short in_line_stride; /* in_line_stride and in_line_skip */ + unsigned short in_line_skip; /* allow cropping from CSI */ + unsigned int in_ptr; /* bus address */ + /* + * in_csc[9] = 1 -> Y-16 + * if in_csc[1..9] == 0 + * in_csc[0] represents YUV range 0-3 = A0,A1,B0,B1; + * else + * in_csc[0..9] represents either format + */ + unsigned short in_csc[10]; + + unsigned char ch2_pix; /* PRP_PIX2_xxx */ + emma_prp_scale ch2_scale; /* resizing paramters */ + unsigned short ch2_width; /* 4-2044, 0 = scaled */ + unsigned short ch2_height; /* 4-2044, 0 = scaled */ + unsigned int ch2_ptr; /* bus addr */ + unsigned int ch2_ptr2; /* bus addr for 2nd buf (loop mode) */ + unsigned char ch2_csi; /* PRP_CSI_SKIP_x | PRP_CSI_LOOP */ + + unsigned int ch1_pix; /* PRP_PIX1_xxx */ + emma_prp_scale ch1_scale; /* resizing parameters */ + unsigned short ch1_width; /* 4-2044, 0 = scaled */ + unsigned short ch1_height; /* 4-2044, 0 = scaled */ + unsigned short ch1_stride; /* 4-4088, 0 = ch1_width */ + unsigned int ch1_ptr; /* bus addr */ + unsigned int ch1_ptr2; /* bus addr for 2nd buf (loop mode) */ + unsigned char ch1_csi; /* PRP_CSI_SKIP_x | PRP_CSI_LOOP */ + + /* + * channel resizing coefficients + * scale[0] for channel 1 width + * scale[1] for channel 1 height + * scale[2] for channel 2 width + * scale[3] for channel 2 height + */ + scale_t scale[4]; +} emma_prp_cfg; + +int prphw_reset(void); +int prphw_enable(int channel); +int prphw_disable(int channel); +int prphw_inptr(emma_prp_cfg *); +int prphw_ch1ptr(emma_prp_cfg *); +int prphw_ch1ptr2(emma_prp_cfg *); +int prphw_ch2ptr(emma_prp_cfg *); +int prphw_ch2ptr2(emma_prp_cfg *); +int prphw_cfg(emma_prp_cfg *); +int prphw_isr(void); +void prphw_init(void); +void prphw_exit(void); + +/* + * scale out coefficient table + * din in scale numerator + * dout in scale denominator + * inv in pre-scale dimension + * vout in/out post-scale output dimension + * pout out post-scale internal dimension [opt] + * retry in retry times (round the output length) when need + */ +int prp_scale(scale_t * pscale, int din, int dout, int inv, + unsigned short *vout, unsigned short *pout, int retry); + +int prp_init(void *dev_id); +void prp_exit(void *dev_id); +int prp_enc_select(void *data); +int prp_enc_deselect(void *data); +int prp_vf_select(void *data); +int prp_vf_deselect(void *data); +int prp_still_select(void *data); +int prp_still_deselect(void *data); + +#endif /* __MX27_PRP_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/emma_v4l2_capture.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/emma_v4l2_capture.c @@ -0,0 +1,2074 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_v4l2_capture.c + * + * @brief MX27 Video For Linux 2 driver + * + * @ingroup MXC_V4L2_CAPTURE + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_capture.h" +#include "mx27_prp.h" +#include "mx27_csi.h" + +static int csi_mclk_flag_backup; +static int video_nr = -1; +static cam_data *g_cam; + +/*! + * Free frame buffers + * + * @param cam Structure cam_data * + * + * @return status 0 success. + */ +static int mxc_free_frame_buf(cam_data *cam) +{ + int i; + + for (i = 0; i < FRAME_NUM; i++) { + if (cam->frame[i].vaddress != 0) { + dma_free_coherent(0, + cam->frame[i].buffer.length, + cam->frame[i].vaddress, + cam->frame[i].paddress); + cam->frame[i].vaddress = 0; + } + } + + return 0; +} + +/*! + * Allocate frame buffers + * + * @param cam Structure cam_data * + * + * @param count int number of buffer need to allocated + * + * @return status -0 Successfully allocated a buffer, -ENOBUFS failed. + */ +static int mxc_allocate_frame_buf(cam_data *cam, int count) +{ + int i; + + for (i = 0; i < count; i++) { + cam->frame[i].vaddress = + dma_alloc_coherent(0, + PAGE_ALIGN(cam->v2f. fmt.pix.sizeimage), + &cam->frame[i].paddress, + GFP_DMA | GFP_KERNEL); + if (cam->frame[i].vaddress == 0) { + pr_debug("mxc_allocate_frame_buf failed.\n"); + mxc_free_frame_buf(cam); + return -ENOBUFS; + } + cam->frame[i].buffer.index = i; + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + cam->frame[i].buffer.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->frame[i].buffer.length = + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage); + cam->frame[i].buffer.memory = V4L2_MEMORY_MMAP; + cam->frame[i].buffer.m.offset = cam->frame[i].paddress; + cam->frame[i].index = i; + } + + return 0; +} + +/*! + * Free frame buffers status + * + * @param cam Structure cam_data * + * + * @return none + */ +static void mxc_free_frames(cam_data *cam) +{ + int i; + + for (i = 0; i < FRAME_NUM; i++) { + cam->frame[i].buffer.flags = V4L2_BUF_FLAG_MAPPED; + } + + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); +} + +/*! + * Return the buffer status + * + * @param cam Structure cam_data * + * @param buf Structure v4l2_buffer * + * + * @return status 0 success, EINVAL failed. + */ +static int mxc_v4l2_buffer_status(cam_data *cam, struct v4l2_buffer *buf) +{ + /* check range */ + if (buf->index < 0 || buf->index >= FRAME_NUM) { + pr_debug("mxc_v4l2_buffer_status buffers not allocated\n"); + return -EINVAL; + } + + memcpy(buf, &(cam->frame[buf->index].buffer), sizeof(*buf)); + return 0; +} + +/*! + * start the encoder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int mxc_streamon(cam_data *cam) +{ + struct mxc_v4l_frame *frame; + int err = 0; + + if (!cam) + return -EIO; + + if (list_empty(&cam->ready_q)) { + printk(KERN_ERR "mxc_streamon buffer not been queued yet\n"); + return -EINVAL; + } + + cam->capture_pid = current->pid; + + if (cam->enc_enable) { + err = cam->enc_enable(cam); + if (err != 0) { + return err; + } + } + + cam->ping_pong_csi = 0; + if (cam->enc_update_eba) { + frame = + list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + err = cam->enc_update_eba(frame->paddress, &cam->ping_pong_csi); + + frame = + list_entry(cam->ready_q.next, struct mxc_v4l_frame, queue); + list_del(cam->ready_q.next); + list_add_tail(&frame->queue, &cam->working_q); + err |= + cam->enc_update_eba(frame->paddress, &cam->ping_pong_csi); + } else { + return -EINVAL; + } + + return err; +} + +/*! + * Shut down the encoder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int mxc_streamoff(cam_data *cam) +{ + int err = 0; + + if (!cam) + return -EIO; + + if (cam->enc_disable) { + err = cam->enc_disable(cam); + } + mxc_free_frames(cam); + return err; +} + +/*! + * Valid whether the palette is supported + * + * @param palette pixel format + * + * @return 0 if failed + */ +static inline int valid_mode(u32 palette) +{ + /* + * MX27 PrP channel 2 supports YUV444, but YUV444 is not + * defined by V4L2 :( + */ + return ((palette == V4L2_PIX_FMT_YUYV) || + (palette == V4L2_PIX_FMT_YUV420)); +} + +/*! + * Valid and adjust the overlay window size, position + * + * @param cam structure cam_data * + * @param win struct v4l2_window * + * + * @return 0 + */ +static int verify_preview(cam_data *cam, struct v4l2_window *win) +{ + if (cam->output >= num_registered_fb) { + pr_debug("verify_preview No matched.\n"); + return -1; + } + cam->overlay_fb = (struct fb_info *)registered_fb[cam->output]; + + /* TODO: suppose 16bpp, 4 bytes alignment */ + win->w.left &= ~0x1; + + if (win->w.width + win->w.left > cam->overlay_fb->var.xres) + win->w.width = cam->overlay_fb->var.xres - win->w.left; + if (win->w.height + win->w.top > cam->overlay_fb->var.yres) + win->w.height = cam->overlay_fb->var.yres - win->w.top; + + /* + * TODO: suppose 16bpp. Rounded down to a multiple of 2 pixels for + * width according to PrP limitations. + */ + if ((cam->rotation == V4L2_MXC_ROTATE_90_RIGHT) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_VFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_RIGHT_HFLIP) + || (cam->rotation == V4L2_MXC_ROTATE_90_LEFT)) + win->w.height &= ~0x1; + else + win->w.width &= ~0x1; + + return 0; +} + +/*! + * start the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int start_preview(cam_data *cam) +{ + int err = 0; + + err = prp_vf_select(cam); + if (err != 0) + return err; + + cam->overlay_pid = current->pid; + err = cam->vf_start_sdc(cam); + + return err; +} + +/*! + * shut down the viewfinder job + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static int stop_preview(cam_data *cam) +{ + int err = 0; + + err = prp_vf_deselect(cam); + return err; +} + +/*! + * V4L2 - mxc_v4l2_g_fmt function + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_g_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + f->fmt.pix.width = cam->v2f.fmt.pix.width; + f->fmt.pix.height = cam->v2f.fmt.pix.height; + f->fmt.pix.sizeimage = cam->v2f.fmt.pix.sizeimage; + f->fmt.pix.pixelformat = cam->v2f.fmt.pix.pixelformat; + f->fmt.pix.bytesperline = cam->v2f.fmt.pix.bytesperline; + f->fmt.pix.colorspace = V4L2_COLORSPACE_JPEG; + retval = 0; + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + f->fmt.win = cam->win; + break; + default: + retval = -EINVAL; + } + return retval; +} + +/*! + * V4L2 - mxc_v4l2_s_fmt function + * + * @param cam structure cam_data * + * + * @param f structure v4l2_format * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_fmt(cam_data *cam, struct v4l2_format *f) +{ + int retval = 0; + int size = 0; + int bytesperline = 0; + + switch (f->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + if (!valid_mode(f->fmt.pix.pixelformat)) { + pr_debug("mxc_v4l2_s_fmt: format not supported\n"); + retval = -EINVAL; + } + + if (cam->rotation != V4L2_MXC_ROTATE_NONE) + pr_debug("mxc_v4l2_s_fmt: capture rotation ignored\n"); + + switch (f->fmt.pix.pixelformat) { + case V4L2_PIX_FMT_YUYV: + f->fmt.pix.width &= ~0x1; /* Multiple of 2 */ + size = f->fmt.pix.width * f->fmt.pix.height * 2; + bytesperline = f->fmt.pix.width * 2; + break; + case V4L2_PIX_FMT_YUV420: + f->fmt.pix.width &= ~0x7; /* Multiple of 8 */ + f->fmt.pix.height &= ~0x1; /* Multiple of 2 */ + size = f->fmt.pix.width * f->fmt.pix.height * 3 / 2; + bytesperline = f->fmt.pix.width * 3 / 2; + break; + default: + /* Suppose it's YUV444 or 32bpp */ + size = f->fmt.pix.width * f->fmt.pix.height * 4; + bytesperline = f->fmt.pix.width * 4; + pr_info("mxc_v4l2_s_fmt: default assume" + " to be YUV444 interleaved.\n"); + break; + } + + if (f->fmt.pix.bytesperline < bytesperline) { + f->fmt.pix.bytesperline = bytesperline; + } else { + bytesperline = f->fmt.pix.bytesperline; + } + + if (f->fmt.pix.sizeimage > size) { + pr_debug("mxc_v4l2_s_fmt: sizeimage bigger than" + " needed.\n"); + size = f->fmt.pix.sizeimage; + } + f->fmt.pix.sizeimage = size; + + cam->v2f.fmt.pix.sizeimage = size; + cam->v2f.fmt.pix.bytesperline = bytesperline; + cam->v2f.fmt.pix.width = f->fmt.pix.width; + cam->v2f.fmt.pix.height = f->fmt.pix.height; + cam->v2f.fmt.pix.pixelformat = f->fmt.pix.pixelformat; + retval = 0; + break; + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + retval = verify_preview(cam, &f->fmt.win); + cam->win = f->fmt.win; + break; + default: + retval = -EINVAL; + } + return retval; +} + +/*! + * get control param + * + * @param cam structure cam_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_get_v42l_control(cam_data *cam, struct v4l2_control *c) +{ + int status = 0; + + switch (c->id) { + case V4L2_CID_HFLIP: + c->value = cam->rotation; + break; + case V4L2_CID_VFLIP: + c->value = cam->rotation; + break; + case V4L2_CID_MXC_ROT: + c->value = cam->rotation; + break; + case V4L2_CID_BRIGHTNESS: + c->value = cam->bright; + break; + case V4L2_CID_HUE: + c->value = cam->hue; + break; + case V4L2_CID_CONTRAST: + c->value = cam->contrast; + break; + case V4L2_CID_SATURATION: + c->value = cam->saturation; + break; + case V4L2_CID_RED_BALANCE: + c->value = cam->red; + break; + case V4L2_CID_BLUE_BALANCE: + c->value = cam->blue; + break; + case V4L2_CID_BLACK_LEVEL: + c->value = cam->ae_mode; + break; + default: + status = -EINVAL; + } + return status; +} + +/*! + * V4L2 - set_control function + * V4L2_CID_MXC_ROT is the extention for rotation/mirroring. + * + * @param cam structure cam_data * + * + * @param c structure v4l2_control * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_set_v42l_control(cam_data *cam, struct v4l2_control *c) +{ + switch (c->id) { + case V4L2_CID_HFLIP: + if (c->value == 1) { + if ((cam->rotation != V4L2_MXC_ROTATE_VERT_FLIP) && + (cam->rotation != V4L2_MXC_ROTATE_180)) + cam->rotation = V4L2_MXC_ROTATE_HORIZ_FLIP; + else + cam->rotation = V4L2_MXC_ROTATE_180; + } else { + if (cam->rotation == V4L2_MXC_ROTATE_HORIZ_FLIP) + cam->rotation = V4L2_MXC_ROTATE_NONE; + else if (cam->rotation == V4L2_MXC_ROTATE_180) + cam->rotation = V4L2_MXC_ROTATE_VERT_FLIP; + } + break; + case V4L2_CID_VFLIP: + if (c->value == 1) { + if ((cam->rotation != V4L2_MXC_ROTATE_HORIZ_FLIP) && + (cam->rotation != V4L2_MXC_ROTATE_180)) + cam->rotation = V4L2_MXC_ROTATE_VERT_FLIP; + else + cam->rotation = V4L2_MXC_ROTATE_180; + } else { + if (cam->rotation == V4L2_MXC_ROTATE_VERT_FLIP) + cam->rotation = V4L2_MXC_ROTATE_NONE; + if (cam->rotation == V4L2_MXC_ROTATE_180) + cam->rotation = V4L2_MXC_ROTATE_HORIZ_FLIP; + } + break; + case V4L2_CID_MXC_ROT: + switch (c->value) { + case V4L2_MXC_ROTATE_NONE: + case V4L2_MXC_ROTATE_VERT_FLIP: + case V4L2_MXC_ROTATE_HORIZ_FLIP: + case V4L2_MXC_ROTATE_180: + case V4L2_MXC_ROTATE_90_RIGHT: + case V4L2_MXC_ROTATE_90_RIGHT_VFLIP: + case V4L2_MXC_ROTATE_90_RIGHT_HFLIP: + case V4L2_MXC_ROTATE_90_LEFT: + cam->rotation = c->value; + break; + default: + return -EINVAL; + } + break; + case V4L2_CID_HUE: + cam->hue = c->value; + break; + case V4L2_CID_CONTRAST: + cam->contrast = c->value; + break; + case V4L2_CID_BRIGHTNESS: + cam->bright = c->value; + case V4L2_CID_SATURATION: + cam->saturation = c->value; + case V4L2_CID_RED_BALANCE: + cam->red = c->value; + case V4L2_CID_BLUE_BALANCE: + cam->blue = c->value; + csi_enable_mclk(CSI_MCLK_I2C, true, true); + cam->cam_sensor->set_color(cam->bright, cam->saturation, + cam->red, cam->green, cam->blue); + csi_enable_mclk(CSI_MCLK_I2C, false, false); + break; + case V4L2_CID_BLACK_LEVEL: + cam->ae_mode = c->value & 0x03; + csi_enable_mclk(CSI_MCLK_I2C, true, true); + if (cam->cam_sensor->set_ae_mode) + cam->cam_sensor->set_ae_mode(cam->ae_mode); + csi_enable_mclk(CSI_MCLK_I2C, false, false); + break; + case V4L2_CID_MXC_FLASH: + break; + default: + return -EINVAL; + } + return 0; +} + +/*! + * V4L2 - mxc_v4l2_s_param function + * + * @param cam structure cam_data * + * + * @param parm structure v4l2_streamparm * + * + * @return status 0 success, EINVAL failed + */ +static int mxc_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm) +{ + sensor_interface *param; + csi_signal_cfg_t csi_param; + + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_debug("mxc_v4l2_s_param invalid type\n"); + return -EINVAL; + } + + if (parm->parm.capture.timeperframe.denominator > + cam->standard.frameperiod.denominator) { + pr_debug("mxc_v4l2_s_param frame rate %d larger " + "than standard supported %d\n", + parm->parm.capture.timeperframe.denominator, + cam->standard.frameperiod.denominator); + return -EINVAL; + } + + cam->streamparm.parm.capture.capability = V4L2_CAP_TIMEPERFRAME; + + csi_enable_mclk(CSI_MCLK_I2C, true, true); + param = cam->cam_sensor->config + (&parm->parm.capture.timeperframe.denominator, + parm->parm.capture.capturemode); + csi_enable_mclk(CSI_MCLK_I2C, false, false); + + cam->streamparm.parm.capture.timeperframe = + parm->parm.capture.timeperframe; + + if ((parm->parm.capture.capturemode != 0) && + (parm->parm.capture.capturemode != V4L2_MODE_HIGHQUALITY)) { + pr_debug("mxc_v4l2_s_param frame un-supported capture mode\n"); + return -EINVAL; + } + + if (parm->parm.capture.capturemode == + cam->streamparm.parm.capture.capturemode) { + return 0; + } + + /* resolution changed, so need to re-program the CSI */ + csi_param.sens_clksrc = 0; + csi_param.clk_mode = param->clk_mode; + csi_param.pixclk_pol = param->pixclk_pol; + csi_param.data_width = param->data_width; + csi_param.data_pol = param->data_pol; + csi_param.ext_vsync = param->ext_vsync; + csi_param.Vsync_pol = param->Vsync_pol; + csi_param.Hsync_pol = param->Hsync_pol; + csi_init_interface(param->width, param->height, param->pixel_fmt, + csi_param); + + if (parm->parm.capture.capturemode != V4L2_MODE_HIGHQUALITY) { + cam->streamparm.parm.capture.capturemode = 0; + } else { + cam->streamparm.parm.capture.capturemode = + V4L2_MODE_HIGHQUALITY; + cam->streamparm.parm.capture.extendedmode = + parm->parm.capture.extendedmode; + cam->streamparm.parm.capture.readbuffers = 1; + } + return 0; +} + +/*! + * Dequeue one V4L capture buffer + * + * @param cam structure cam_data * + * @param buf structure v4l2_buffer * + * + * @return status 0 success, EINVAL invalid frame number, + * ETIME timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l_dqueue(cam_data *cam, struct v4l2_buffer *buf) +{ + int retval = 0; + struct mxc_v4l_frame *frame; + + if (!wait_event_interruptible_timeout(cam->enc_queue, + cam->enc_counter != 0, 10 * HZ)) { + printk(KERN_ERR "mxc_v4l_dqueue timeout enc_counter %x\n", + cam->enc_counter); + return -ETIME; + } else if (signal_pending(current)) { + printk(KERN_ERR "mxc_v4l_dqueue() interrupt received\n"); + return -ERESTARTSYS; + } + + cam->enc_counter--; + + frame = list_entry(cam->done_q.next, struct mxc_v4l_frame, queue); + list_del(cam->done_q.next); + if (frame->buffer.flags & V4L2_BUF_FLAG_DONE) { + frame->buffer.flags &= ~V4L2_BUF_FLAG_DONE; + } else if (frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + printk(KERN_ERR "VIDIOC_DQBUF: Buffer not filled.\n"); + frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + retval = -EINVAL; + } else if ((frame->buffer.flags & 0x7) == V4L2_BUF_FLAG_MAPPED) { + printk(KERN_ERR "VIDIOC_DQBUF: Buffer not queued.\n"); + retval = -EINVAL; + } + + buf->bytesused = cam->v2f.fmt.pix.sizeimage; + buf->index = frame->index; + buf->flags = frame->buffer.flags; + + return retval; +} + +/*! + * V4L interface - open function + * + * @param inode structure inode * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENODEV timeout, ERESTARTSYS interrupted by user + */ +static int mxc_v4l_open(struct inode *inode, struct file *file) +{ + sensor_interface *param; + csi_signal_cfg_t csi_param; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int err = 0; + + if (!cam) { + pr_info("Internal error, cam_data not found!\n"); + return -ENODEV; + } + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + if (signal_pending(current)) + goto oops; + + if (cam->open_count++ == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + + err = prp_enc_select(cam); + + cam->enc_counter = 0; + cam->skip_frame = 0; + INIT_LIST_HEAD(&cam->ready_q); + INIT_LIST_HEAD(&cam->working_q); + INIT_LIST_HEAD(&cam->done_q); + + csi_enable_mclk(CSI_MCLK_I2C, true, true); + param = cam->cam_sensor->reset(); + if (param == NULL) { + cam->open_count--; + csi_enable_mclk(CSI_MCLK_I2C, false, false); + err = -ENODEV; + goto oops; + } + csi_param.sens_clksrc = 0; + csi_param.clk_mode = param->clk_mode; + csi_param.pixclk_pol = param->pixclk_pol; + csi_param.data_width = param->data_width; + csi_param.data_pol = param->data_pol; + csi_param.ext_vsync = param->ext_vsync; + csi_param.Vsync_pol = param->Vsync_pol; + csi_param.Hsync_pol = param->Hsync_pol; + csi_init_interface(param->width, param->height, + param->pixel_fmt, csi_param); + cam->cam_sensor->get_color(&cam->bright, &cam->saturation, + &cam->red, &cam->green, &cam->blue); + if (cam->cam_sensor->get_ae_mode) + cam->cam_sensor->get_ae_mode(&cam->ae_mode); + csi_enable_mclk(CSI_MCLK_I2C, false, false); + prp_init(cam); + + } + + file->private_data = dev; + oops: + up(&cam->busy_lock); + return err; +} + +/*! + * V4L interface - close function + * + * @param inode struct inode * + * @param file struct file * + * + * @return 0 success + */ +static int mxc_v4l_close(struct inode *inode, struct file *file) +{ + struct video_device *dev = video_devdata(file); + int err = 0; + cam_data *cam = video_get_drvdata(dev); + + /* for the case somebody hit the ctrl C */ + if (cam->overlay_pid == current->pid) { + err = stop_preview(cam); + cam->overlay_on = false; + } + if (cam->capture_pid == current->pid) { + err |= mxc_streamoff(cam); + cam->capture_on = false; + wake_up_interruptible(&cam->enc_queue); + } + + if (--cam->open_count == 0) { + wait_event_interruptible(cam->power_queue, + cam->low_power == false); + pr_debug("mxc_v4l_close: release resource\n"); + + err |= prp_enc_deselect(cam); + + mxc_free_frame_buf(cam); + file->private_data = NULL; + + /* capture off */ + wake_up_interruptible(&cam->enc_queue); + mxc_free_frames(cam); + cam->enc_counter++; + prp_exit(cam); + } + + return err; +} + +#ifdef CONFIG_VIDEO_MXC_CSI_DMA +#include + +#define CSI_DMA_STATUS_IDLE 0 /* DMA is not started */ +#define CSI_DMA_STATUS_WORKING 1 /* DMA is transfering the data */ +#define CSI_DMA_STATUS_DONE 2 /* One frame completes successfully */ +#define CSI_DMA_STATUS_ERROR 3 /* Error occurs during the DMA */ + +/* + * Sometimes the start of the DMA is not synchronized with the CSI + * SOF (Start of Frame) interrupt which will lead to incorrect + * captured image. In this case the driver will re-try capturing + * another frame. The following macro defines the maximum re-try + * times. + */ +#define CSI_DMA_RETRY 8 + +/* + * Size of the physical contiguous memory area used to hold image data + * transfered by DMA. It can be less than the size of the image data. + */ +#define CSI_MEM_SIZE (1024 * 600) + +/* Number of bytes for one DMA transfer */ +#define CSI_DMA_LENGTH (1024 * 200) + +static int g_dma_channel; +static int g_dma_status = CSI_DMA_STATUS_DONE; +static volatile int g_dma_completed; /* number of completed DMA transfers */ +static volatile int g_dma_copied; /* number of copied DMA transfers */ +static struct tasklet_struct g_dma_tasklet; +static char *g_user_buf; /* represents the buf passed by read() */ +static int g_user_count; /* represents the count passed by read() */ + +/*! + * @brief setup the DMA to transfer data + * There may be more than one DMA to transfer the whole image. Those + * DMAs work like chain. This function is used to setup the DMA in + * case there is enough space to hold the data. + * @param data pointer to the cam structure + */ +static void mxc_csi_dma_chaining(void *data) +{ + cam_data *cam = (cam_data *) data; + int count, chained = 0; + int max_dma = CSI_MEM_SIZE / CSI_DMA_LENGTH; + mxc_dma_requestbuf_t dma_request; + + while (chained * CSI_DMA_LENGTH < g_user_count) { + /* + * Calculate how many bytes the DMA should transfer. It may + * be less than CSI_DMA_LENGTH if the DMA is the last one. + */ + if ((chained + 1) * CSI_DMA_LENGTH > g_user_count) + count = g_user_count - chained * CSI_DMA_LENGTH; + else + count = CSI_DMA_LENGTH; + pr_debug("%s() DMA chained count = %d\n", __FUNCTION__, count); + + /* Config DMA */ + memset(&dma_request, 0, sizeof(mxc_dma_requestbuf_t)); + dma_request.dst_addr = cam->still_buf + + (chained % max_dma) * CSI_DMA_LENGTH; + dma_request.src_addr = (dma_addr_t) CSI_CSIRXFIFO_PHYADDR; + dma_request.num_of_bytes = count; + mxc_dma_config(g_dma_channel, &dma_request, 1, + MXC_DMA_MODE_READ); + + chained++; + } +} + +/*! + * @brief Copy image data from physical contiguous memory to user space buffer + * Once the data are copied, there will be more spare space in the + * physical contiguous memory to receive data from DMA. + * @param data pointer to the cam structure + */ +static void mxc_csi_dma_task(unsigned long data) +{ + cam_data *cam = (cam_data *) data; + int count; + int max_dma = CSI_MEM_SIZE / CSI_DMA_LENGTH; + + while (g_dma_copied < g_dma_completed) { + /* + * Calculate how many bytes the DMA has transfered. It may + * be less than CSI_DMA_LENGTH if the DMA is the last one. + */ + if ((g_dma_copied + 1) * CSI_DMA_LENGTH > g_user_count) + count = g_user_count - g_dma_copied * CSI_DMA_LENGTH; + else + count = CSI_DMA_LENGTH; + if (copy_to_user(g_user_buf + g_dma_copied * CSI_DMA_LENGTH, + cam->still_buf_vaddr + (g_dma_copied % max_dma) + * CSI_DMA_LENGTH, count)) + pr_debug("Warning: some bytes not copied\n"); + + g_dma_copied++; + } + + /* If the whole image has been captured */ + if (g_dma_copied * CSI_DMA_LENGTH >= g_user_count) { + cam->still_counter++; + wake_up_interruptible(&cam->still_queue); + } + + pr_debug("%s() DMA completed = %d copied = %d\n", + __FUNCTION__, g_dma_completed, g_dma_copied); +} + +/*! + * @brief DMA interrupt callback function + * @param data pointer to the cam structure + * @param error DMA error flag + * @param count number of bytes transfered by the DMA + */ +static void mxc_csi_dma_callback(void *data, int error, unsigned int count) +{ + cam_data *cam = (cam_data *) data; + int max_dma = CSI_MEM_SIZE / CSI_DMA_LENGTH; + unsigned long lock_flags; + + spin_lock_irqsave(&cam->int_lock, lock_flags); + + g_dma_completed++; + + if (error != MXC_DMA_DONE) { + g_dma_status = CSI_DMA_STATUS_ERROR; + pr_debug("%s() DMA error\n", __FUNCTION__); + } + + /* If the whole image has been captured */ + if ((g_dma_status != CSI_DMA_STATUS_ERROR) + && (g_dma_completed * CSI_DMA_LENGTH >= g_user_count)) + g_dma_status = CSI_DMA_STATUS_DONE; + + if ((g_dma_status == CSI_DMA_STATUS_WORKING) && + (g_dma_completed >= g_dma_copied + max_dma)) { + g_dma_status = CSI_DMA_STATUS_ERROR; + pr_debug("%s() Previous buffer over written\n", __FUNCTION__); + } + + /* Schedule the tasklet */ + tasklet_schedule(&g_dma_tasklet); + + spin_unlock_irqrestore(&cam->int_lock, lock_flags); + + pr_debug("%s() count = %d bytes\n", __FUNCTION__, count); +} + +/*! + * @brief CSI interrupt callback function + * @param data pointer to the cam structure + * @param status CSI interrupt status + */ +static void mxc_csi_irq_callback(void *data, unsigned long status) +{ + cam_data *cam = (cam_data *) data; + unsigned long lock_flags; + + spin_lock_irqsave(&cam->int_lock, lock_flags); + + /* Wait for SOF (Start of Frame) interrupt to sync the image */ + if (status & BIT_SOF_INT) { + if (g_dma_status == CSI_DMA_STATUS_IDLE) { + /* Start DMA transfer to capture image */ + mxc_dma_enable(g_dma_channel); + g_dma_status = CSI_DMA_STATUS_WORKING; + pr_debug("%s() DMA started.\n", __FUNCTION__); + } else if (g_dma_status == CSI_DMA_STATUS_WORKING) { + /* + * Another SOF occurs during DMA transfer. In this + * case the image is not synchronized so need to + * report error and probably try again. + */ + g_dma_status = CSI_DMA_STATUS_ERROR; + pr_debug("%s() Image is not synchronized with DMA - " + "SOF before DMA completes\n", __FUNCTION__); + } + } + + spin_unlock_irqrestore(&cam->int_lock, lock_flags); + + pr_debug("%s() g_dma_status = %d\n", __FUNCTION__, g_dma_status); +} + +/*! + * V4L interface - read function + * + * @param file struct file * + * @param read buf char * + * @param count size_t + * @param ppos structure loff_t * + * + * @return bytes read + */ +static ssize_t +mxc_v4l_read(struct file *file, char *buf, size_t count, loff_t *ppos) +{ + int err = 0; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int retry = CSI_DMA_RETRY; + + g_user_buf = buf; + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + /* Video capture and still image capture are exclusive */ + if (cam->capture_on == true) { + err = -EBUSY; + goto exit0; + } + + /* The CSI-DMA can not do CSC */ + if (cam->v2f.fmt.pix.pixelformat != V4L2_PIX_FMT_YUYV) { + pr_info("mxc_v4l_read support YUYV pixel format only\n"); + err = -EINVAL; + goto exit0; + } + + /* The CSI-DMA can not do resize or crop */ + if ((cam->v2f.fmt.pix.width != cam->crop_bounds.width) + || (cam->v2f.fmt.pix.height != cam->crop_bounds.height)) { + pr_info("mxc_v4l_read resize is not supported\n"); + pr_info("supported image size width = %d height = %d\n", + cam->crop_bounds.width, cam->crop_bounds.height); + err = -EINVAL; + goto exit0; + } + if ((cam->crop_current.left != cam->crop_bounds.left) + || (cam->crop_current.width != cam->crop_bounds.width) + || (cam->crop_current.top != cam->crop_bounds.top) + || (cam->crop_current.height != cam->crop_bounds.height)) { + pr_info("mxc_v4l_read cropping is not supported\n"); + err = -EINVAL; + goto exit0; + } + + cam->still_buf_vaddr = dma_alloc_coherent(0, + PAGE_ALIGN(CSI_MEM_SIZE), + &cam->still_buf, + GFP_DMA | GFP_KERNEL); + + if (!cam->still_buf_vaddr) { + pr_info("mxc_v4l_read failed at allocate still_buf\n"); + err = -ENOBUFS; + goto exit0; + } + + /* Initialize DMA */ + g_dma_channel = mxc_dma_request(MXC_DMA_CSI_RX, "CSI RX DMA"); + if (g_dma_channel < 0) { + pr_debug("mxc_v4l_read failed to request DMA channel\n"); + err = -EIO; + goto exit1; + } + + err = mxc_dma_callback_set(g_dma_channel, + (mxc_dma_callback_t) mxc_csi_dma_callback, + (void *)cam); + if (err != 0) { + pr_debug("mxc_v4l_read failed to set DMA callback\n"); + err = -EIO; + goto exit2; + } + + g_user_buf = buf; + if (cam->v2f.fmt.pix.sizeimage < count) + g_user_count = cam->v2f.fmt.pix.sizeimage; + else + g_user_count = count & ~0x3; + + tasklet_init(&g_dma_tasklet, mxc_csi_dma_task, (unsigned long)cam); + g_dma_status = CSI_DMA_STATUS_DONE; + csi_set_callback(mxc_csi_irq_callback, cam); + csi_enable_prpif(0); + + /* clear current SOF first */ + csi_clear_status(BIT_SOF_INT); + csi_enable_mclk(CSI_MCLK_RAW, true, true); + + do { + g_dma_completed = g_dma_copied = 0; + mxc_csi_dma_chaining(cam); + cam->still_counter = 0; + g_dma_status = CSI_DMA_STATUS_IDLE; + + if (!wait_event_interruptible_timeout(cam->still_queue, + cam->still_counter != 0, + 10 * HZ)) { + pr_info("mxc_v4l_read timeout counter %x\n", + cam->still_counter); + err = -ETIME; + goto exit3; + } + + if (g_dma_status == CSI_DMA_STATUS_DONE) + break; + + if (retry-- == 0) + break; + + pr_debug("Now retry image capture\n"); + } while (1); + + if (g_dma_status != CSI_DMA_STATUS_DONE) + err = -EIO; + + exit3: + csi_enable_prpif(1); + g_dma_status = CSI_DMA_STATUS_DONE; + csi_set_callback(0, 0); + csi_enable_mclk(CSI_MCLK_RAW, false, false); + tasklet_kill(&g_dma_tasklet); + + exit2: + mxc_dma_free(g_dma_channel); + + exit1: + dma_free_coherent(0, PAGE_ALIGN(CSI_MEM_SIZE), + cam->still_buf_vaddr, cam->still_buf); + cam->still_buf = 0; + + exit0: + up(&cam->busy_lock); + if (err < 0) + return err; + else + return g_user_count; +} +#else +/*! + * V4L interface - read function + * + * @param file struct file * + * @param read buf char * + * @param count size_t + * @param ppos structure loff_t * + * + * @return bytes read + */ +static ssize_t +mxc_v4l_read(struct file *file, char *buf, size_t count, loff_t *ppos) +{ + int err = 0; + u8 *v_address; + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + /* Video capture and still image capture are exclusive */ + if (cam->capture_on == true) { + err = -EBUSY; + goto exit0; + } + + v_address = dma_alloc_coherent(0, + PAGE_ALIGN(cam->v2f.fmt.pix.sizeimage), + &cam->still_buf, GFP_DMA | GFP_KERNEL); + + if (!v_address) { + pr_info("mxc_v4l_read failed at allocate still_buf\n"); + err = -ENOBUFS; + goto exit0; + } + + if (prp_still_select(cam)) { + err = -EIO; + goto exit1; + } + + cam->still_counter = 0; + if (cam->csi_start(cam)) { + err = -EIO; + goto exit2; + } + + if (!wait_event_interruptible_timeout(cam->still_queue, + cam->still_counter != 0, + 10 * HZ)) { + pr_info("mxc_v4l_read timeout counter %x\n", + cam->still_counter); + err = -ETIME; + goto exit2; + } + err = copy_to_user(buf, v_address, cam->v2f.fmt.pix.sizeimage); + + exit2: + prp_still_deselect(cam); + + exit1: + dma_free_coherent(0, cam->v2f.fmt.pix.sizeimage, v_address, + cam->still_buf); + cam->still_buf = 0; + + exit0: + up(&cam->busy_lock); + if (err < 0) + return err; + else + return (cam->v2f.fmt.pix.sizeimage - err); +} +#endif /* CONFIG_VIDEO_MXC_CSI_DMA */ + +/*! + * V4L interface - ioctl function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @param ioctlnr unsigned int + * + * @param arg void * + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static int +mxc_v4l_do_ioctl(struct inode *inode, struct file *file, + unsigned int ioctlnr, void *arg) +{ + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + int retval = 0; + unsigned long lock_flags; + + if (!cam) + return -EBADF; + + wait_event_interruptible(cam->power_queue, cam->low_power == false); + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EBUSY; + + switch (ioctlnr) { + /*! + * V4l2 VIDIOC_QUERYCAP ioctl + */ + case VIDIOC_QUERYCAP:{ + struct v4l2_capability *cap = arg; + strcpy(cap->driver, "mxc_v4l2"); + cap->version = KERNEL_VERSION(0, 1, 11); + cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | + V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_STREAMING + | V4L2_CAP_READWRITE; + cap->card[0] = '\0'; + cap->bus_info[0] = '\0'; + retval = 0; + break; + } + + /*! + * V4l2 VIDIOC_G_FMT ioctl + */ + case VIDIOC_G_FMT:{ + struct v4l2_format *gf = arg; + retval = mxc_v4l2_g_fmt(cam, gf); + break; + } + + /*! + * V4l2 VIDIOC_S_FMT ioctl + */ + case VIDIOC_S_FMT:{ + struct v4l2_format *sf = arg; + retval = mxc_v4l2_s_fmt(cam, sf); + break; + } + + /*! + * V4l2 VIDIOC_REQBUFS ioctl + */ + case VIDIOC_REQBUFS:{ + struct v4l2_requestbuffers *req = arg; + if (req->count > FRAME_NUM) { + pr_info("VIDIOC_REQBUFS: not enough buffer\n"); + req->count = FRAME_NUM; + } + + if ((req->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) || + (req->memory != V4L2_MEMORY_MMAP)) { + pr_debug("VIDIOC_REQBUFS: wrong buffer type\n"); + retval = -EINVAL; + break; + } + + mxc_streamoff(cam); + mxc_free_frame_buf(cam); + + retval = mxc_allocate_frame_buf(cam, req->count); + break; + } + + /*! + * V4l2 VIDIOC_QUERYBUF ioctl + */ + case VIDIOC_QUERYBUF:{ + struct v4l2_buffer *buf = arg; + int index = buf->index; + + if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_debug + ("VIDIOC_QUERYBUFS: wrong buffer type\n"); + retval = -EINVAL; + break; + } + + memset(buf, 0, sizeof(buf)); + buf->index = index; + + down(&cam->param_lock); + retval = mxc_v4l2_buffer_status(cam, buf); + up(&cam->param_lock); + break; + } + + /*! + * V4l2 VIDIOC_QBUF ioctl + */ + case VIDIOC_QBUF:{ + struct v4l2_buffer *buf = arg; + int index = buf->index; + + pr_debug("VIDIOC_QBUF: %d\n", buf->index); + + spin_lock_irqsave(&cam->int_lock, lock_flags); + if ((cam->frame[index].buffer.flags & 0x7) == + V4L2_BUF_FLAG_MAPPED) { + cam->frame[index].buffer.flags |= + V4L2_BUF_FLAG_QUEUED; + if (cam->skip_frame > 0) { + list_add_tail(&cam->frame[index].queue, + &cam->working_q); + retval = + cam->enc_update_eba(cam-> + frame[index]. + paddress, + &cam-> + ping_pong_csi); + cam->skip_frame = 0; + } else { + list_add_tail(&cam->frame[index].queue, + &cam->ready_q); + } + } else if (cam->frame[index].buffer.flags & + V4L2_BUF_FLAG_QUEUED) { + pr_debug + ("VIDIOC_QBUF: buffer already queued\n"); + } else if (cam->frame[index].buffer. + flags & V4L2_BUF_FLAG_DONE) { + pr_debug + ("VIDIOC_QBUF: overwrite done buffer.\n"); + cam->frame[index].buffer.flags &= + ~V4L2_BUF_FLAG_DONE; + cam->frame[index].buffer.flags |= + V4L2_BUF_FLAG_QUEUED; + } + buf->flags = cam->frame[index].buffer.flags; + spin_unlock_irqrestore(&cam->int_lock, lock_flags); + break; + } + + /*! + * V4l2 VIDIOC_DQBUF ioctl + */ + case VIDIOC_DQBUF:{ + struct v4l2_buffer *buf = arg; + + retval = mxc_v4l_dqueue(cam, buf); + + break; + } + + /*! + * V4l2 VIDIOC_STREAMON ioctl + */ + case VIDIOC_STREAMON:{ + cam->capture_on = true; + retval = mxc_streamon(cam); + break; + } + + /*! + * V4l2 VIDIOC_STREAMOFF ioctl + */ + case VIDIOC_STREAMOFF:{ + retval = mxc_streamoff(cam); + cam->capture_on = false; + break; + } + + /*! + * V4l2 VIDIOC_G_CTRL ioctl + */ + case VIDIOC_G_CTRL:{ + retval = mxc_get_v42l_control(cam, arg); + break; + } + + /*! + * V4l2 VIDIOC_S_CTRL ioctl + */ + case VIDIOC_S_CTRL:{ + retval = mxc_set_v42l_control(cam, arg); + break; + } + + /*! + * V4l2 VIDIOC_CROPCAP ioctl + */ + case VIDIOC_CROPCAP:{ + struct v4l2_cropcap *cap = arg; + + if (cap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + cap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + cap->bounds = cam->crop_bounds; + cap->defrect = cam->crop_defrect; + break; + } + + /*! + * V4l2 VIDIOC_G_CROP ioctl + */ + case VIDIOC_G_CROP:{ + struct v4l2_crop *crop = arg; + + if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + crop->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + crop->c = cam->crop_current; + break; + } + + /*! + * V4l2 VIDIOC_S_CROP ioctl + */ + case VIDIOC_S_CROP:{ + struct v4l2_crop *crop = arg; + struct v4l2_rect *b = &cam->crop_bounds; + int i; + + if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && + crop->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) { + retval = -EINVAL; + break; + } + + crop->c.top = (crop->c.top < b->top) ? b->top + : crop->c.top; + if (crop->c.top > b->top + b->height) + crop->c.top = b->top + b->height - 1; + if (crop->c.height > b->top + b->height - crop->c.top) + crop->c.height = + b->top + b->height - crop->c.top; + + crop->c.left = (crop->c.left < b->left) ? b->left + : crop->c.left; + if (crop->c.left > b->left + b->width) + crop->c.left = b->left + b->width - 1; + if (crop->c.width > b->left - crop->c.left + b->width) + crop->c.width = + b->left - crop->c.left + b->width; + + crop->c.width &= ~0x1; + + /* + * MX27 PrP limitation: + * The right spare space (CSI_FRAME_X_SIZE + * - SOURCE_LINE_STRIDE - PICTURE_X_SIZE)) must be + * multiple of 32. + * So we tune the crop->c.left value to the closest + * desired cropping value and meet the PrP requirement. + */ + i = ((b->left + b->width) + - (crop->c.left + crop->c.width)) % 32; + if (i <= 16) { + if (crop->c.left + crop->c.width + i + <= b->left + b->width) + crop->c.left += i; + else if (crop->c.left - (32 - i) >= b->left) + crop->c.left -= 32 - i; + else { + retval = -EINVAL; + break; + } + } else { + if (crop->c.left - (32 - i) >= b->left) + crop->c.left -= 32 - i; + else if (crop->c.left + crop->c.width + i + <= b->left + b->width) + crop->c.left += i; + else { + retval = -EINVAL; + break; + } + } + + cam->crop_current = crop->c; + + break; + } + + /*! + * V4l2 VIDIOC_OVERLAY ioctl + */ + case VIDIOC_OVERLAY:{ + int *on = arg; + if (*on) { + cam->overlay_on = true; + retval = start_preview(cam); + } + if (!*on) { + retval = stop_preview(cam); + cam->overlay_on = false; + } + break; + } + + /*! + * V4l2 VIDIOC_G_FBUF ioctl + */ + case VIDIOC_G_FBUF:{ + struct v4l2_framebuffer *fb = arg; + struct fb_var_screeninfo *var; + + if (cam->output >= num_registered_fb) { + retval = -EINVAL; + break; + } + + var = ®istered_fb[cam->output]->var; + cam->v4l2_fb.fmt.width = var->xres; + cam->v4l2_fb.fmt.height = var->yres; + cam->v4l2_fb.fmt.bytesperline = + var->xres_virtual * var->bits_per_pixel; + cam->v4l2_fb.fmt.colorspace = V4L2_COLORSPACE_SRGB; + *fb = cam->v4l2_fb; + break; + } + + /*! + * V4l2 VIDIOC_S_FBUF ioctl + */ + case VIDIOC_S_FBUF:{ + struct v4l2_framebuffer *fb = arg; + cam->v4l2_fb.flags = fb->flags; + cam->v4l2_fb.fmt.pixelformat = fb->fmt.pixelformat; + break; + } + + case VIDIOC_G_PARM:{ + struct v4l2_streamparm *parm = arg; + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + pr_debug("VIDIOC_G_PARM invalid type\n"); + retval = -EINVAL; + break; + } + parm->parm.capture = cam->streamparm.parm.capture; + break; + } + case VIDIOC_S_PARM:{ + struct v4l2_streamparm *parm = arg; + retval = mxc_v4l2_s_param(cam, parm); + break; + } + + /* linux v4l2 bug, kernel c0485619 user c0405619 */ + case VIDIOC_ENUMSTD:{ + struct v4l2_standard *e = arg; + *e = cam->standard; + pr_debug("VIDIOC_ENUMSTD call\n"); + retval = 0; + break; + } + + case VIDIOC_G_STD:{ + v4l2_std_id *e = arg; + *e = cam->standard.id; + break; + } + + case VIDIOC_S_STD:{ + break; + } + + case VIDIOC_ENUMOUTPUT: + { + struct v4l2_output *output = arg; + + if (output->index >= num_registered_fb) { + retval = -EINVAL; + break; + } + + strncpy(output->name, + registered_fb[output->index]->fix.id, 31); + output->type = V4L2_OUTPUT_TYPE_ANALOG; + output->audioset = 0; + output->modulator = 0; + output->std = V4L2_STD_UNKNOWN; + + break; + } + case VIDIOC_G_OUTPUT: + { + int *p_output_num = arg; + + *p_output_num = cam->output; + break; + } + case VIDIOC_S_OUTPUT: + { + int *p_output_num = arg; + + if (*p_output_num >= num_registered_fb) { + retval = -EINVAL; + break; + } + + cam->output = *p_output_num; + break; + } + + case VIDIOC_ENUM_FMT: + case VIDIOC_TRY_FMT: + case VIDIOC_QUERYCTRL: + case VIDIOC_ENUMINPUT: + case VIDIOC_G_INPUT: + case VIDIOC_S_INPUT: + case VIDIOC_G_TUNER: + case VIDIOC_S_TUNER: + case VIDIOC_G_FREQUENCY: + case VIDIOC_S_FREQUENCY: + default: + retval = -EINVAL; + break; + } + + up(&cam->busy_lock); + return retval; +} + +/* + * V4L interface - ioctl function + * + * @return None + */ +static int +mxc_v4l_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + return video_usercopy(inode, file, cmd, arg, mxc_v4l_do_ioctl); +} + +/*! + * V4L interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, ENOBUFS remap_page error + */ +static int mxc_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *dev = video_devdata(file); + unsigned long size; + int res = 0; + cam_data *cam = video_get_drvdata(dev); + + pr_debug("pgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + size = vma->vm_end - vma->vm_start; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + pr_debug("mxc_mmap: remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mxc_mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + + mxc_mmap_exit: + up(&cam->busy_lock); + return res; +} + +/*! + * V4L interface - poll function + * + * @param file structure file * + * + * @param wait structure poll_table * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_poll(struct file *file, poll_table * wait) +{ + struct video_device *dev = video_devdata(file); + cam_data *cam = video_get_drvdata(dev); + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + if (down_interruptible(&cam->busy_lock)) + return -EINTR; + + queue = &cam->enc_queue; + poll_wait(file, queue, wait); + + up(&cam->busy_lock); + return res; +} + +static struct +file_operations mxc_v4l_fops = { + .owner = THIS_MODULE, + .open = mxc_v4l_open, + .release = mxc_v4l_close, + .read = mxc_v4l_read, + .ioctl = mxc_v4l_ioctl, + .mmap = mxc_mmap, + .poll = mxc_poll, +}; + +static struct video_device mxc_v4l_template = { + .name = "Mxc Camera", + .vfl_type = VID_TYPE_CAPTURE, + .fops = &mxc_v4l_fops, + .release = video_device_release, +}; + +static void camera_platform_release(struct device *device) +{ +} + +/*! Device Definition for Mt9v111 devices */ +static struct platform_device mxc_v4l2_devices = { + .name = "mxc_v4l2", + .dev = { + .release = camera_platform_release, + }, + .id = 0, +}; + +extern struct camera_sensor camera_sensor_if; + +/*! +* Camera V4l2 callback function. +* +* @return status +*/ +static void camera_callback(u32 mask, void *dev) +{ + struct mxc_v4l_frame *done_frame; + struct mxc_v4l_frame *ready_frame; + + cam_data *cam = (cam_data *) dev; + if (cam == NULL) + return; + + if (list_empty(&cam->working_q)) { + printk(KERN_ERR "camera_callback: working queue empty\n"); + return; + } + + done_frame = + list_entry(cam->working_q.next, struct mxc_v4l_frame, queue); + if (done_frame->buffer.flags & V4L2_BUF_FLAG_QUEUED) { + done_frame->buffer.flags |= V4L2_BUF_FLAG_DONE; + done_frame->buffer.flags &= ~V4L2_BUF_FLAG_QUEUED; + + if (list_empty(&cam->ready_q)) { + cam->skip_frame++; + } else { + ready_frame = + list_entry(cam->ready_q.next, struct mxc_v4l_frame, + queue); + list_del(cam->ready_q.next); + list_add_tail(&ready_frame->queue, &cam->working_q); + cam->enc_update_eba(ready_frame->paddress, + &cam->ping_pong_csi); + } + + /* Added to the done queue */ + list_del(cam->working_q.next); + list_add_tail(&done_frame->queue, &cam->done_q); + + /* Wake up the queue */ + cam->enc_counter++; + wake_up_interruptible(&cam->enc_queue); + } else { + printk(KERN_ERR "camera_callback :buffer not queued\n"); + } +} + +/*! + * initialize cam_data structure + * + * @param cam structure cam_data * + * + * @return status 0 Success + */ +static void init_camera_struct(cam_data *cam) +{ + int i; + + /* Default everything to 0 */ + memset(cam, 0, sizeof(cam_data)); + + init_MUTEX(&cam->param_lock); + init_MUTEX(&cam->busy_lock); + + cam->video_dev = video_device_alloc(); + if (cam->video_dev == NULL) + return; + + *(cam->video_dev) = mxc_v4l_template; + + video_set_drvdata(cam->video_dev, cam); + dev_set_drvdata(&mxc_v4l2_devices.dev, (void *)cam); + cam->video_dev->minor = -1; + + for (i = 0; i < FRAME_NUM; i++) { + cam->frame[i].width = 0; + cam->frame[i].height = 0; + cam->frame[i].paddress = 0; + } + + init_waitqueue_head(&cam->enc_queue); + init_waitqueue_head(&cam->still_queue); + + /* setup cropping */ + cam->crop_bounds.left = 0; + cam->crop_bounds.width = 640; + cam->crop_bounds.top = 0; + cam->crop_bounds.height = 480; + cam->crop_current = cam->crop_defrect = cam->crop_bounds; + cam->streamparm.parm.capture.capturemode = 0; + + cam->standard.index = 0; + cam->standard.id = V4L2_STD_UNKNOWN; + cam->standard.frameperiod.denominator = 30; + cam->standard.frameperiod.numerator = 1; + cam->standard.framelines = 480; + cam->streamparm.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cam->streamparm.parm.capture.timeperframe = cam->standard.frameperiod; + cam->streamparm.parm.capture.capability = V4L2_CAP_TIMEPERFRAME; + cam->overlay_on = false; + cam->capture_on = false; + cam->skip_frame = 0; + cam->v4l2_fb.capability = V4L2_FBUF_CAP_EXTERNOVERLAY; + cam->v4l2_fb.flags = V4L2_FBUF_FLAG_PRIMARY; + + cam->v2f.fmt.pix.sizeimage = 352 * 288 * 3 / 2; + cam->v2f.fmt.pix.bytesperline = 288 * 3 / 2; + cam->v2f.fmt.pix.width = 288; + cam->v2f.fmt.pix.height = 352; + cam->v2f.fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420; + cam->win.w.width = 160; + cam->win.w.height = 160; + cam->win.w.left = 0; + cam->win.w.top = 0; + + cam->cam_sensor = &camera_sensor_if; + cam->enc_callback = camera_callback; + + init_waitqueue_head(&cam->power_queue); + cam->int_lock = __SPIN_LOCK_UNLOCKED(cam->int_lock); + spin_lock_init(&cam->int_lock); +} + +extern void gpio_sensor_active(void); +extern void gpio_sensor_inactive(void); + +/*! + * camera_power function + * Turn Sensor power On/Off + * + * @param cameraOn true to turn camera on, otherwise shut down + * + * @return status + */ +static u8 camera_power(bool cameraOn) +{ + if (cameraOn == true) { + gpio_sensor_active(); + csi_enable_mclk(csi_mclk_flag_backup, true, true); + } else { + csi_mclk_flag_backup = csi_read_mclk_flag(); + csi_enable_mclk(csi_mclk_flag_backup, false, false); + gpio_sensor_inactive(); + } + return 0; +} + +/*! + * This function is called to put the sensor in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which I2C + * to suspend + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure. + */ +static int mxc_v4l2_suspend(struct platform_device *pdev, pm_message_t state) +{ + cam_data *cam = platform_get_drvdata(pdev); + + if (cam == NULL) { + return -1; + } + + cam->low_power = true; + + if (cam->overlay_on == true) + stop_preview(cam); + if ((cam->capture_on == true) && cam->enc_disable) { + cam->enc_disable(cam); + } + camera_power(false); + + return 0; +} + +/*! + * This function is called to bring the sensor back from a low power state.Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxc_v4l2_resume(struct platform_device *pdev) +{ + cam_data *cam = platform_get_drvdata(pdev); + + if (cam == NULL) { + return -1; + } + + cam->low_power = false; + wake_up_interruptible(&cam->power_queue); + + if (cam->overlay_on == true) + start_preview(cam); + if (cam->capture_on == true) + mxc_streamon(cam); + camera_power(true); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_v4l2_driver = { + .driver = { + .name = "mxc_v4l2", + .owner = THIS_MODULE, + .bus = &platform_bus_type, + }, + .probe = NULL, + .remove = NULL, + .suspend = mxc_v4l2_suspend, + .resume = mxc_v4l2_resume, + .shutdown = NULL, +}; + +/*! + * Entry point for the V4L2 + * + * @return Error code indicating success or failure + */ +static __init int camera_init(void) +{ + u8 err = 0; + cam_data *cam; + + g_cam = kmalloc(sizeof(cam_data), GFP_KERNEL); + if (g_cam == NULL) { + pr_debug("failed to mxc_v4l_register_camera\n"); + return -1; + } + + cam = g_cam; + init_camera_struct(cam); + + /* Register the I2C device */ + err = platform_device_register(&mxc_v4l2_devices); + if (err != 0) { + pr_debug("camera_init: platform_device_register failed.\n"); + video_device_release(cam->video_dev); + kfree(cam); + g_cam = NULL; + } + + /* Register the device driver structure. */ + err = platform_driver_register(&mxc_v4l2_driver); + if (err != 0) { + platform_device_unregister(&mxc_v4l2_devices); + pr_debug("camera_init: driver_register failed.\n"); + video_device_release(cam->video_dev); + kfree(cam); + g_cam = NULL; + return err; + } + + /* register v4l device */ + if (video_register_device(cam->video_dev, VFL_TYPE_GRABBER, video_nr) + == -1) { + platform_driver_unregister(&mxc_v4l2_driver); + platform_device_unregister(&mxc_v4l2_devices); + video_device_release(cam->video_dev); + kfree(cam); + g_cam = NULL; + pr_debug("video_register_device failed\n"); + return -1; + } + + return err; +} + +/*! + * Exit and cleanup for the V4L2 + * + */ +static void __exit camera_exit(void) +{ + pr_debug("unregistering video\n"); + + video_unregister_device(g_cam->video_dev); + + platform_driver_unregister(&mxc_v4l2_driver); + platform_device_unregister(&mxc_v4l2_devices); + + if (g_cam->open_count) { + pr_debug("camera open -- setting ops to NULL\n"); + } else { + pr_debug("freeing camera\n"); + mxc_free_frame_buf(g_cam); + kfree(g_cam); + g_cam = NULL; + } +} + +module_init(camera_init); +module_exit(camera_exit); + +module_param(video_nr, int, 0444); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("V4L2 capture driver for Mxc based cameras"); +MODULE_LICENSE("GPL"); +MODULE_SUPPORTED_DEVICE("video"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/Makefile @@ -0,0 +1,39 @@ +ifeq ($(CONFIG_VIDEO_MXC_IPU_CAMERA),y) + obj-$(CONFIG_VIDEO_MXC_CAMERA) += mxc_v4l2_capture.o + obj-$(CONFIG_MXC_IPU_PRP_VF_ADC) += ipu_prp_vf_adc.o + obj-$(CONFIG_MXC_IPU_PRP_VF_SDC) += ipu_prp_vf_sdc.o ipu_prp_vf_sdc_bg.o + obj-$(CONFIG_MXC_IPU_PRP_ENC) += ipu_prp_enc.o ipu_still.o + obj-$(CONFIG_MXC_IPU_CSI_ENC) += ipu_csi_enc.o ipu_still.o +endif + +obj-$(CONFIG_VIDEO_MXC_CSI_CAMERA) += fsl_csi.o csi_v4l2_capture.o + +mx27_capture-objs := mx27_prphw.o mx27_prpsw.o emma_v4l2_capture.o +obj-$(CONFIG_VIDEO_MXC_EMMA_CAMERA) += mx27_csi.o mx27_capture.o + +mc521da_camera-objs := mc521da.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_MC521DA) += mc521da_camera.o + +emma_mt9v111_camera-objs := emma_mt9v111.o sensor_clock.o +obj-$(CONFIG_MXC_EMMA_CAMERA_MICRON111) += emma_mt9v111_camera.o + +mt9v111_camera-objs := mt9v111.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_MICRON111) += mt9v111_camera.o + +hv7161_camera-objs := hv7161.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_HV7161) += hv7161_camera.o + +s5k3aaex_camera-objs := s5k3aaex.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_S5K3AAEX) += s5k3aaex_camera.o + +emma_ov2640_camera-objs := emma_ov2640.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_OV2640_EMMA) += emma_ov2640_camera.o + +ov2640_camera-objs := ov2640.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_OV2640) += ov2640_camera.o + +ov3640_camera-objs := ov3640.o sensor_clock.o +obj-$(CONFIG_MXC_CAMERA_OV3640) += ov3640_camera.o + +adv7180_tvin-objs := adv7180.o sensor_clock.o +obj-$(CONFIG_MXC_TVIN_ADV7180) += adv7180_tvin.o --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/emma_ov2640.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/emma_ov2640.c @@ -0,0 +1,444 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_v4l2_capture.h" + +enum ov2640_mode { + ov2640_mode_1600_1120, + ov2640_mode_800_600 +}; + +struct reg_value { + u8 reg; + u8 value; + int delay_ms; +}; + +static struct reg_value ov2640_setting_1600_1120[] = { + {0xff, 0x1, 0}, {0x12, 0x80, 1}, {0xff, 0, 0}, {0x2c, 0xff, 0}, + {0x2e, 0xdf, 0}, {0xff, 0x1, 0}, {0x3c, 0x32, 0}, {0x11, 0x01, 0}, + {0x09, 0x00, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, {0x14, 0x48, 0}, + {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, {0x3b, 0xfb, 0}, + {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, {0x39, 0x82, 0}, + {0x35, 0x88, 0}, {0x22, 0x0a, 0}, {0x37, 0x40, 0}, {0x23, 0x00, 0}, + {0x34, 0xa0, 0}, {0x36, 0x1a, 0}, {0x06, 0x02, 0}, {0x07, 0xc0, 0}, + {0x0d, 0xb7, 0}, {0x0e, 0x01, 0}, {0x4c, 0x00, 0}, {0x4a, 0x81, 0}, + {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, {0x26, 0x82, 0}, + {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x3f, 0}, {0x0c, 0x3c, 0}, + {0x5d, 0x55, 0}, {0x5e, 0x7d, 0}, {0x5f, 0x7d, 0}, {0x60, 0x55, 0}, + {0x61, 0x70, 0}, {0x62, 0x80, 0}, {0x7c, 0x05, 0}, {0x20, 0x80, 0}, + {0x28, 0x30, 0}, {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, {0x6e, 00, 0}, + {0x70, 0x02, 0}, {0x71, 0x94, 0}, {0x73, 0xc1, 0}, {0x3d, 0x34, 0}, + {0x5a, 0x57, 0}, {0x4f, 0xbb, 0}, {0x50, 0x9c, 0}, {0xff, 0x00, 0}, + {0xe5, 0x7f, 0}, {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0x44, 0x06, 0}, + {0xe0, 0x14, 0}, {0x76, 0xff, 0}, {0x33, 0xa0, 0}, {0x42, 0x20, 0}, + {0x43, 0x18, 0}, {0x4c, 0x00, 0}, {0x87, 0xd0, 0}, {0xd7, 0x03, 0}, + {0xd9, 0x10, 0}, {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, {0xc9, 0x80, 0}, + {0x7c, 0x00, 0}, {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, {0x7d, 0x48, 0}, + {0x7d, 0x48, 0}, {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, {0x7d, 0x10, 0}, + {0x7d, 0x0e, 0}, {0x90, 0x00, 0}, {0x91, 0x0e, 0}, {0x91, 0x1a, 0}, + {0x91, 0x31, 0}, {0x91, 0x5a, 0}, {0x91, 0x69, 0}, {0x91, 0x75, 0}, + {0x91, 0x7e, 0}, {0x91, 0x88, 0}, {0x91, 0x8f, 0}, {0x91, 0x96, 0}, + {0x91, 0xa3, 0}, {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, {0x91, 0xd7, 0}, + {0x91, 0xe8, 0}, {0x91, 0x20, 0}, {0x92, 0x00, 0}, {0x93, 0x06, 0}, + {0x93, 0xe3, 0}, {0x93, 0x03, 0}, {0x93, 0x03, 0}, {0x93, 0x00, 0}, + {0x93, 0x02, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x96, 0x00, 0}, {0x97, 0x08, 0}, {0x97, 0x19, 0}, {0x97, 0x02, 0}, + {0x97, 0x0c, 0}, {0x97, 0x24, 0}, {0x97, 0x30, 0}, {0x97, 0x28, 0}, + {0x97, 0x26, 0}, {0x97, 0x02, 0}, {0x97, 0x98, 0}, {0x97, 0x80, 0}, + {0x97, 0x00, 0}, {0x97, 0x00, 0}, {0xa4, 0x00, 0}, {0xa8, 0x00, 0}, + {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, {0xc7, 0x10, 0}, + {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, {0xb9, 0x7c, 0}, + {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, {0xb0, 0xc5, 0}, + {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, {0xa6, 0x00, 0}, + {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x1b, 0}, {0xa7, 0x31, 0}, + {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, + {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, + {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, + {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xc0, 0xc8, 0}, {0xc1, 0x96, 0}, + {0x86, 0x3d, 0}, {0x50, 0x00, 0}, {0x51, 0x90, 0}, {0x52, 0x18, 0}, + {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x88, 0}, {0x57, 0x00, 0}, + {0x5a, 0x90, 0}, {0x5b, 0x18, 0}, {0x5c, 0x05, 0}, {0xc3, 0xef, 0}, + {0x7f, 0x00, 0}, {0xda, 0x01, 0}, {0xe5, 0x1f, 0}, {0xe1, 0x67, 0}, + {0xe0, 0x00, 0}, {0xdd, 0x7f, 0}, {0x05, 0x00, 0} +}; + +static struct reg_value ov2640_setting_800_600[] = { + {0xff, 0, 0}, {0xff, 1, 0}, {0x12, 0x80, 1}, {0xff, 00, 0}, + {0x2c, 0xff, 0}, {0x2e, 0xdf, 0}, {0xff, 0x1, 0}, {0x3c, 0x32, 0}, + {0x11, 0x01, 0}, {0x09, 0x00, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, + {0x14, 0x48, 0}, {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, + {0x3b, 0xfb, 0}, {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, + {0x39, 0x92, 0}, {0x35, 0xda, 0}, {0x22, 0x1a, 0}, {0x37, 0xc3, 0}, + {0x23, 0x00, 0}, {0x34, 0xc0, 0}, {0x36, 0x1a, 0}, {0x06, 0x88, 0}, + {0x07, 0xc0, 0}, {0x0d, 0x87, 0}, {0x0e, 0x41, 0}, {0x4c, 0x00, 0}, + {0x4a, 0x81, 0}, {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, + {0x26, 0x82, 0}, {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x22, 0}, + {0x0c, 0x3c, 0}, {0x5d, 0x55, 0}, {0x5e, 0x7d, 0}, {0x5f, 0x7d, 0}, + {0x60, 0x55, 0}, {0x61, 0x70, 0}, {0x62, 0x80, 0}, {0x7c, 0x05, 0}, + {0x20, 0x80, 0}, {0x28, 0x30, 0}, {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, + {0x6e, 00, 0}, {0x70, 0x02, 0}, {0x71, 0x94, 0}, {0x73, 0xc1, 0}, + {0x12, 0x40, 0}, {0x17, 0x11, 0}, {0x18, 0x43, 0}, {0x19, 0x00, 0}, + {0x1a, 0x4b, 0}, {0x32, 0x09, 0}, {0x37, 0xc0, 0}, {0x4f, 0xca, 0}, + {0x50, 0xa8, 0}, {0x6d, 0x00, 0}, {0x3d, 0x38, 0}, {0xff, 0x00, 0}, + {0xe5, 0x7f, 0}, {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0x44, 0x06, 0}, + {0xe0, 0x14, 0}, {0x76, 0xff, 0}, {0x33, 0xa0, 0}, {0x42, 0x20, 0}, + {0x43, 0x18, 0}, {0x4c, 0x00, 0}, {0x87, 0xd0, 0}, {0x88, 0x3f, 0}, + {0xd7, 0x03, 0}, {0xd9, 0x10, 0}, {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, + {0xc9, 0x80, 0}, {0x7c, 0x00, 0}, {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, + {0x7d, 0x48, 0}, {0x7d, 0x48, 0}, {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, + {0x7d, 0x10, 0}, {0x7d, 0x0e, 0}, {0x90, 0x00, 0}, {0x91, 0x0e, 0}, + {0x91, 0x1a, 0}, {0x91, 0x31, 0}, {0x91, 0x5a, 0}, {0x91, 0x69, 0}, + {0x91, 0x75, 0}, {0x91, 0x7e, 0}, {0x91, 0x88, 0}, {0x91, 0x8f, 0}, + {0x91, 0x96, 0}, {0x91, 0xa3, 0}, {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, + {0x91, 0xd7, 0}, {0x91, 0xe8, 0}, {0x91, 0x20, 0}, {0x92, 0x00, 0}, + {0x93, 0x06, 0}, {0x93, 0xe3, 0}, {0x93, 0x03, 0}, {0x93, 0x03, 0}, + {0x93, 0x00, 0}, {0x93, 0x02, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x96, 0x00, 0}, {0x97, 0x08, 0}, {0x97, 0x19, 0}, + {0x97, 0x02, 0}, {0x97, 0x0c, 0}, {0x97, 0x24, 0}, {0x97, 0x30, 0}, + {0x97, 0x28, 0}, {0x97, 0x26, 0}, {0x97, 0x02, 0}, {0x97, 0x98, 0}, + {0x97, 0x80, 0}, {0x97, 0x00, 0}, {0x97, 0x00, 0}, {0xa4, 0x00, 0}, + {0xa8, 0x00, 0}, {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, + {0xc7, 0x10, 0}, {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, + {0xb9, 0x7c, 0}, {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, + {0xb0, 0xc5, 0}, {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, + {0xa6, 0x00, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x1b, 0}, + {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, + {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, + {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, + {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xc0, 0x64, 0}, + {0xc1, 0x4b, 0}, {0x86, 0x1d, 0}, {0x50, 0x00, 0}, {0x51, 0xc8, 0}, + {0x52, 0x96, 0}, {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x00, 0}, + {0x57, 0x00, 0}, {0x5a, 0xc8, 0}, {0x5b, 0x96, 0}, {0x5c, 0x00, 0}, + {0xc3, 0xef, 0}, {0x7f, 0x00, 0}, {0xda, 0x01, 0}, {0xe5, 0x1f, 0}, + {0xe1, 0x67, 0}, {0xe0, 0x00, 0}, {0xdd, 0x7f, 0}, {0x05, 0x00, 0} +}; + +static struct regulator *io_regulator; +static struct regulator *core_regulator; +static struct regulator *analog_regulator; +static struct regulator *gpo_regulator; +u32 mclk = 24000000; + +struct i2c_client *ov2640_i2c_client; + +static sensor_interface *interface_param; +static int reset_frame_rate = 30; +static int ov2640_probe(struct i2c_client *adapter, + const struct i2c_device_id *id); +static int ov2640_remove(struct i2c_client *client); + +static const struct i2c_device_id ov2640_id[] = { + {"ov2640", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, ov2640_id); + +static struct i2c_driver ov2640_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "ov2640", + }, + .probe = ov2640_probe, + .remove = ov2640_remove, + .id_table = ov2640_id, +}; + +/*! + * ov2640 I2C attach function + * + * @param adapter struct i2c_adapter * + * @return Error code indicating success or failure + */ +static int ov2640_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct mxc_camera_platform_data *plat_data = client->dev.platform_data; + + ov2640_i2c_client = client; + mclk = plat_data->mclk; + + io_regulator = regulator_get(&client->dev, plat_data->io_regulator); + core_regulator = regulator_get(&client->dev, plat_data->core_regulator); + analog_regulator = + regulator_get(&client->dev, plat_data->analog_regulator); + gpo_regulator = regulator_get(&client->dev, plat_data->gpo_regulator); + + interface_param = (sensor_interface *) + kmalloc(sizeof(sensor_interface), GFP_KERNEL); + if (!interface_param) { + dev_dbg(&ov2640_i2c_client->dev, + "ov2640_probe: kmalloc failed \n"); + return -1; + } + + return 0; +} + +/*! + * ov2640 I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int ov2640_remove(struct i2c_client *client) +{ + kfree(interface_param); + interface_param = NULL; + + if (!IS_ERR_VALUE((unsigned long)io_regulator)) { + regulator_disable(io_regulator); + regulator_put(io_regulator); + } + + if (!IS_ERR_VALUE((unsigned long)core_regulator)) { + regulator_disable(core_regulator); + regulator_put(core_regulator); + } + + if (!IS_ERR_VALUE((unsigned long)gpo_regulator)) { + regulator_disable(gpo_regulator); + regulator_put(gpo_regulator); + } + + if (!IS_ERR_VALUE((unsigned long)analog_regulator)) { + regulator_disable(analog_regulator); + regulator_put(analog_regulator); + } + + return 0; +} + +static int ov2640_write_reg(u8 reg, u8 val) +{ + if (i2c_smbus_write_byte_data(ov2640_i2c_client, reg, val) < 0) { + dev_dbg(&ov2640_i2c_client->dev, + "%s:write reg errorr:reg=%x,val=%x\n", __func__, reg, + val); + return -1; + } + return 0; +} + +static int ov2640_init_mode(enum ov2640_mode mode) +{ + struct reg_value *setting; + int i, num; + + switch (mode) { + case ov2640_mode_1600_1120: + setting = ov2640_setting_1600_1120; + num = ARRAY_SIZE(ov2640_setting_1600_1120); + break; + case ov2640_mode_800_600: + setting = ov2640_setting_800_600; + num = ARRAY_SIZE(ov2640_setting_800_600); + break; + default: + return 0; + } + + for (i = 0; i < num; i++) { + ov2640_write_reg(setting[i].reg, setting[i].value); + if (setting[i].delay_ms > 0) + msleep(setting[i].delay_ms); + } + + return 0; +} + +/*! + * ov2640 sensor interface Initialization + * @param param sensor_interface * + * @param width u32 + * @param height u32 + * @return None + */ +static void ov2640_interface(sensor_interface *param, u32 width, u32 height) +{ + param->Vsync_pol = 0x0; + param->clk_mode = 0x0; /*gated */ + param->pixclk_pol = 0x0; + param->data_width = 0x1; + param->data_pol = 0x0; + param->ext_vsync = 0x0; + param->Vsync_pol = 0x0; + param->Hsync_pol = 0x0; + param->width = width - 1; + param->height = height - 1; + param->active_width = width; + param->active_height = height; + param->pixel_fmt = IPU_PIX_FMT_UYVY; + param->mclk = mclk; +} + +static void ov2640_set_color(int bright, int saturation, int red, int green, + int blue) +{ + +} + +static void ov2640_get_color(int *bright, int *saturation, int *red, int *green, + int *blue) +{ + +} +static void ov2640_set_ae_mode(int ae_mode) +{ + +} +static void ov2640_get_ae_mode(int *ae_mode) +{ + +} + +extern void gpio_sensor_active(void); + +static sensor_interface *ov2640_config(int *frame_rate, int high_quality) +{ + + u32 out_width, out_height; + + /*set io votage */ + if (!IS_ERR_VALUE((unsigned long)io_regulator)) { + regulator_set_voltage(io_regulator, 2800000, 2800000); + if (regulator_enable(io_regulator) != 0) { + dev_dbg(&ov2640_i2c_client->dev, + "%s:io set voltage error\n", __func__); + return NULL; + } else { + dev_dbg(&ov2640_i2c_client->dev, + "%s:io set voltage ok\n", __func__); + } + } + + /*core votage */ + if (!IS_ERR_VALUE((unsigned long)core_regulator)) { + regulator_set_voltage(core_regulator, 1300000, 1300000); + if (regulator_enable(core_regulator) != 0) { + dev_dbg(&ov2640_i2c_client->dev, + "%s:core set voltage error\n", __func__); + return NULL; + } else { + dev_dbg(&ov2640_i2c_client->dev, + "%s:core set voltage ok\n", __func__); + } + } + + /*GPO 3 */ + if (!IS_ERR_VALUE((unsigned long)gpo_regulator)) { + if (regulator_enable(gpo_regulator) != 0) { + dev_dbg(&ov2640_i2c_client->dev, + "%s:gpo3 enable error\n", __func__); + return NULL; + } else { + dev_dbg(&ov2640_i2c_client->dev, "%s:gpo3 enable ok\n", + __func__); + } + } + + if (!IS_ERR_VALUE((unsigned long)analog_regulator)) { + regulator_set_voltage(analog_regulator, 2000000, 2000000); + if (regulator_enable(analog_regulator) != 0) { + dev_dbg(&ov2640_i2c_client->dev, + "%s:analog set voltage error\n", __func__); + return NULL; + } else { + dev_dbg(&ov2640_i2c_client->dev, + "%s:analog set voltage ok\n", __func__); + } + } + + gpio_sensor_active(); + + if (high_quality) { + out_width = 1600; + out_height = 1120; + } else { + out_width = 800; + out_height = 600; + } + ov2640_interface(interface_param, out_width, out_height); + set_mclk_rate(&interface_param->mclk); + + if (high_quality) + ov2640_init_mode(ov2640_mode_1600_1120); + else + ov2640_init_mode(ov2640_mode_800_600); + + msleep(300); + + return interface_param; +} + +static sensor_interface *ov2640_reset(void) +{ + return ov2640_config(&reset_frame_rate, 0); +} + +struct camera_sensor camera_sensor_if = { + .set_color = ov2640_set_color, + .get_color = ov2640_get_color, + .set_ae_mode = ov2640_set_ae_mode, + .get_ae_mode = ov2640_get_ae_mode, + .config = ov2640_config, + .reset = ov2640_reset, +}; + +EXPORT_SYMBOL(camera_sensor_if); + +/*! + * ov2640 init function + * + * @return Error code indicating success or failure + */ +static __init int ov2640_init(void) +{ + u8 err; + + err = i2c_add_driver(&ov2640_i2c_driver); + + return err; +} + +extern void gpio_sensor_inactive(void); +/*! + * OV2640 cleanup function + * + * @return Error code indicating success or failure + */ +static void __exit ov2640_clean(void) +{ + i2c_del_driver(&ov2640_i2c_driver); + + gpio_sensor_inactive(); +} + +module_init(ov2640_init); +module_exit(ov2640_clean); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("OV2640 Camera Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mxc_v4l2_capture.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mxc_v4l2_capture.h @@ -0,0 +1,201 @@ +/* + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup MXC_V4L2_CAPTURE MXC V4L2 Video Capture Driver + */ +/*! + * @file mxc_v4l2_capture.h + * + * @brief mxc V4L2 capture device API Header file + * + * It include all the defines for frame operations, also three structure defines + * use case ops structure, common v4l2 driver structure and frame structure. + * + * @ingroup MXC_V4L2_CAPTURE + */ +#ifndef __MXC_V4L2_CAPTURE_H__ +#define __MXC_V4L2_CAPTURE_H__ + +#include +#include +#include +#include +#include + +#include + +#define FRAME_NUM 3 + +/*! + * v4l2 frame structure. + */ +struct mxc_v4l_frame { + u32 paddress; + void *vaddress; + int count; + int width; + int height; + + struct v4l2_buffer buffer; + struct list_head queue; + int index; +}; + +/* Only for old version. Will go away soon. */ +typedef struct { + u8 clk_mode; + u8 ext_vsync; + u8 Vsync_pol; + u8 Hsync_pol; + u8 pixclk_pol; + u8 data_pol; + u8 data_width; + u8 pack_tight; + u8 force_eof; + u8 data_en_pol; + u16 width; + u16 height; + u32 pixel_fmt; + u32 mclk; + u16 active_width; + u16 active_height; +} sensor_interface; + +/* Sensor control function */ +/* Only for old version. Will go away soon. */ +struct camera_sensor { + void (*set_color) (int bright, int saturation, int red, int green, + int blue); + void (*get_color) (int *bright, int *saturation, int *red, int *green, + int *blue); + void (*set_ae_mode) (int ae_mode); + void (*get_ae_mode) (int *ae_mode); + sensor_interface *(*config) (int *frame_rate, int high_quality); + sensor_interface *(*reset) (void); + void (*get_std) (v4l2_std_id *std); + void (*set_std) (v4l2_std_id std); + unsigned int csi; +}; + +/*! + * common v4l2 driver structure. + */ +typedef struct _cam_data { + struct video_device *video_dev; + int device_type; + + /* semaphore guard against SMP multithreading */ + struct semaphore busy_lock; + + int open_count; + + /* params lock for this camera */ + struct semaphore param_lock; + + /* Encoder */ + struct list_head ready_q; + struct list_head done_q; + struct list_head working_q; + int ping_pong_csi; + spinlock_t queue_int_lock; + spinlock_t dqueue_int_lock; + struct mxc_v4l_frame frame[FRAME_NUM]; + int skip_frame; + wait_queue_head_t enc_queue; + int enc_counter; + dma_addr_t rot_enc_bufs[2]; + void *rot_enc_bufs_vaddr[2]; + int rot_enc_buf_size[2]; + enum v4l2_buf_type type; + + /* still image capture */ + wait_queue_head_t still_queue; + int still_counter; + dma_addr_t still_buf; + void *still_buf_vaddr; + + /* overlay */ + struct v4l2_window win; + struct v4l2_framebuffer v4l2_fb; + dma_addr_t vf_bufs[2]; + void *vf_bufs_vaddr[2]; + int vf_bufs_size[2]; + dma_addr_t rot_vf_bufs[2]; + void *rot_vf_bufs_vaddr[2]; + int rot_vf_buf_size[2]; + bool overlay_active; + int output; + struct fb_info *overlay_fb; + int fb_origin_std; + + /* v4l2 format */ + struct v4l2_format v2f; + int rotation; /* for IPUv1 and IPUv3, this means encoder rotation */ + int vf_rotation; /* viewfinder rotation only for IPUv1 and IPUv3 */ + struct v4l2_mxc_offset offset; + + /* V4l2 control bit */ + int bright; + int hue; + int contrast; + int saturation; + int red; + int green; + int blue; + int ae_mode; + + /* standard */ + struct v4l2_streamparm streamparm; + struct v4l2_standard standard; + bool standard_autodetect; + + /* crop */ + struct v4l2_rect crop_bounds; + struct v4l2_rect crop_defrect; + struct v4l2_rect crop_current; + + int (*enc_update_eba) (dma_addr_t eba, int *bufferNum); + int (*enc_enable) (void *private); + int (*enc_disable) (void *private); + void (*enc_callback) (u32 mask, void *dev); + int (*vf_start_adc) (void *private); + int (*vf_stop_adc) (void *private); + int (*vf_start_sdc) (void *private); + int (*vf_stop_sdc) (void *private); + int (*csi_start) (void *private); + int (*csi_stop) (void *private); + + /* misc status flag */ + bool overlay_on; + bool capture_on; + int overlay_pid; + int capture_pid; + bool low_power; + wait_queue_head_t power_queue; + unsigned int csi; + int current_input; + + /* camera sensor interface */ + struct camera_sensor *cam_sensor; /* old version */ + struct v4l2_int_device *sensor; +} cam_data; + +#if defined(CONFIG_MXC_IPU_V1) || defined(CONFIG_VIDEO_MXC_EMMA_CAMERA) \ + || defined(CONFIG_VIDEO_MXC_CSI_CAMERA_MODULE) \ + || defined(CONFIG_VIDEO_MXC_CSI_CAMERA) +void set_mclk_rate(uint32_t *p_mclk_freq); +#else +void set_mclk_rate(uint32_t *p_mclk_freq, uint32_t csi); +#endif +#endif /* __MXC_V4L2_CAPTURE_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/sensor_clock.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/sensor_clock.c @@ -0,0 +1,87 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file sensor_clock.c + * + * @brief camera clock function + * + * @ingroup Camera + */ +#include +#include +#include +#include +#include + +#if defined(CONFIG_MXC_IPU_V1) || defined(CONFIG_VIDEO_MXC_EMMA_CAMERA) \ + || defined(CONFIG_VIDEO_MXC_CSI_CAMERA_MODULE) \ + || defined(CONFIG_VIDEO_MXC_CSI_CAMERA) +/* + * set_mclk_rate + * + * @param p_mclk_freq mclk frequence + * + */ +void set_mclk_rate(uint32_t * p_mclk_freq) +{ + struct clk *clk; + uint32_t freq = 0; + + clk = clk_get(NULL, "csi_clk"); + + freq = clk_round_rate(clk, *p_mclk_freq); + clk_set_rate(clk, freq); + + *p_mclk_freq = freq; + + clk_put(clk); + pr_debug("mclk frequency = %d\n", *p_mclk_freq); +} +#else +/* + * set_mclk_rate + * + * @param p_mclk_freq mclk frequence + * @param csi csi 0 or csi 1 + * + */ +void set_mclk_rate(uint32_t *p_mclk_freq, uint32_t csi) +{ + struct clk *clk; + uint32_t freq = 0; + char *mclk; + + if (csi == 0) { + mclk = "csi_mclk1"; + } else if (csi == 1) { + mclk = "csi_mclk2"; + } else { + pr_debug("invalid csi num %d\n", csi); + return; + } + + clk = clk_get(NULL, mclk); + + freq = clk_round_rate(clk, *p_mclk_freq); + clk_set_rate(clk, freq); + + *p_mclk_freq = freq; + + clk_put(clk); + pr_debug("%s frequency = %d\n", mclk, *p_mclk_freq); +} +#endif + +/* Exported symbols for modules. */ +EXPORT_SYMBOL(set_mclk_rate); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mt9v111.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mt9v111.h @@ -0,0 +1,431 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Camera Sensor Drivers + */ + +/*! + * @file mt9v111.h + * + * @brief MT9V111 Camera Header file + * + * This header file contains defines and structures for the iMagic mi8012 + * aka the Micron mt9v111 camera. + * + * @ingroup Camera + */ + +#ifndef MT9V111_H_ +#define MT9V111_H_ + +/*! + * Basic camera values + */ +#define MT9V111_FRAME_RATE 30 +#define MT9V111_MCLK 27000000 /* Desired clock rate */ +#define MT9V111_CLK_MIN 12000000 /* This clock rate yields 15 fps */ +#define MT9V111_CLK_MAX 27000000 +#define MT9V111_MAX_WIDTH 640 /* Max width for this camera */ +#define MT9V111_MAX_HEIGHT 480 /* Max height for this camera */ + +/*! + * mt9v111 IFP REGISTER BANK MAP + */ +#define MT9V111I_ADDR_SPACE_SEL 0x1 +#define MT9V111I_BASE_MAXTRIX_SIGN 0x2 +#define MT9V111I_BASE_MAXTRIX_SCALE15 0x3 +#define MT9V111I_BASE_MAXTRIX_SCALE69 0x4 +#define MT9V111I_APERTURE_GAIN 0x5 +#define MT9V111I_MODE_CONTROL 0x6 +#define MT9V111I_SOFT_RESET 0x7 +#define MT9V111I_FORMAT_CONTROL 0x8 +#define MT9V111I_BASE_MATRIX_CFK1 0x9 +#define MT9V111I_BASE_MATRIX_CFK2 0xa +#define MT9V111I_BASE_MATRIX_CFK3 0xb +#define MT9V111I_BASE_MATRIX_CFK4 0xc +#define MT9V111I_BASE_MATRIX_CFK5 0xd +#define MT9V111I_BASE_MATRIX_CFK6 0xe +#define MT9V111I_BASE_MATRIX_CFK7 0xf +#define MT9V111I_BASE_MATRIX_CFK8 0x10 +#define MT9V111I_BASE_MATRIX_CFK9 0x11 +#define MT9V111I_AWB_POSITION 0x12 +#define MT9V111I_AWB_RED_GAIN 0x13 +#define MT9V111I_AWB_BLUE_GAIN 0x14 +#define MT9V111I_DELTA_MATRIX_CF_SIGN 0x15 +#define MT9V111I_DELTA_MATRIX_CF_D1 0x16 +#define MT9V111I_DELTA_MATRIX_CF_D2 0x17 +#define MT9V111I_DELTA_MATRIX_CF_D3 0x18 +#define MT9V111I_DELTA_MATRIX_CF_D4 0x19 +#define MT9V111I_DELTA_MATRIX_CF_D5 0x1a +#define MT9V111I_DELTA_MATRIX_CF_D6 0x1b +#define MT9V111I_DELTA_MATRIX_CF_D7 0x1c +#define MT9V111I_DELTA_MATRIX_CF_D8 0x1d +#define MT9V111I_DELTA_MATRIX_CF_D9 0x1e +#define MT9V111I_LUMINANCE_LIMIT_WB 0x20 +#define MT9V111I_RBG_MANUUAL_WB 0x21 +#define MT9V111I_AWB_RED_LIMIT 0x22 +#define MT9V111I_AWB_BLUE_LIMIT 0x23 +#define MT9V111I_MATRIX_ADJUST_LIMIT 0x24 +#define MT9V111I_AWB_SPEED 0x25 +#define MT9V111I_H_BOUND_AE 0x26 +#define MT9V111I_V_BOUND_AE 0x27 +#define MT9V111I_H_BOUND_AE_CEN_WIN 0x2b +#define MT9V111I_V_BOUND_AE_CEN_WIN 0x2c +#define MT9V111I_BOUND_AWB_WIN 0x2d +#define MT9V111I_AE_PRECISION_TARGET 0x2e +#define MT9V111I_AE_SPEED 0x2f +#define MT9V111I_RED_AWB_MEASURE 0x30 +#define MT9V111I_LUMA_AWB_MEASURE 0x31 +#define MT9V111I_BLUE_AWB_MEASURE 0x32 +#define MT9V111I_LIMIT_SHARP_SATU_CTRL 0x33 +#define MT9V111I_LUMA_OFFSET 0x34 +#define MT9V111I_CLIP_LIMIT_OUTPUT_LUMI 0x35 +#define MT9V111I_GAIN_LIMIT_AE 0x36 +#define MT9V111I_SHUTTER_WIDTH_LIMIT_AE 0x37 +#define MT9V111I_UPPER_SHUTTER_DELAY_LIM 0x39 +#define MT9V111I_OUTPUT_FORMAT_CTRL2 0x3a +#define MT9V111I_IPF_BLACK_LEVEL_SUB 0x3b +#define MT9V111I_IPF_BLACK_LEVEL_ADD 0x3c +#define MT9V111I_ADC_LIMIT_AE_ADJ 0x3d +#define MT9V111I_GAIN_THRE_CCAM_ADJ 0x3e +#define MT9V111I_LINEAR_AE 0x3f +#define MT9V111I_THRESHOLD_EDGE_DEFECT 0x47 +#define MT9V111I_LUMA_SUM_MEASURE 0x4c +#define MT9V111I_TIME_ADV_SUM_LUMA 0x4d +#define MT9V111I_MOTION 0x52 +#define MT9V111I_GAMMA_KNEE_Y12 0x53 +#define MT9V111I_GAMMA_KNEE_Y34 0x54 +#define MT9V111I_GAMMA_KNEE_Y56 0x55 +#define MT9V111I_GAMMA_KNEE_Y78 0x56 +#define MT9V111I_GAMMA_KNEE_Y90 0x57 +#define MT9V111I_GAMMA_VALUE_Y0 0x58 +#define MT9V111I_SHUTTER_60 0x59 +#define MT9V111I_SEARCH_FLICK_60 0x5c +#define MT9V111I_RATIO_IMAGE_GAIN_BASE 0x5e +#define MT9V111I_RATIO_IMAGE_GAIN_DELTA 0x5f +#define MT9V111I_SIGN_VALUE_REG5F 0x60 +#define MT9V111I_AE_GAIN 0x62 +#define MT9V111I_MAX_GAIN_AE 0x67 +#define MT9V111I_LENS_CORRECT_CTRL 0x80 +#define MT9V111I_SHADING_PARAMETER1 0x81 +#define MT9V111I_SHADING_PARAMETER2 0x82 +#define MT9V111I_SHADING_PARAMETER3 0x83 +#define MT9V111I_SHADING_PARAMETER4 0x84 +#define MT9V111I_SHADING_PARAMETER5 0x85 +#define MT9V111I_SHADING_PARAMETER6 0x86 +#define MT9V111I_SHADING_PARAMETER7 0x87 +#define MT9V111I_SHADING_PARAMETER8 0x88 +#define MT9V111I_SHADING_PARAMETER9 0x89 +#define MT9V111I_SHADING_PARAMETER10 0x8A +#define MT9V111I_SHADING_PARAMETER11 0x8B +#define MT9V111I_SHADING_PARAMETER12 0x8C +#define MT9V111I_SHADING_PARAMETER13 0x8D +#define MT9V111I_SHADING_PARAMETER14 0x8E +#define MT9V111I_SHADING_PARAMETER15 0x8F +#define MT9V111I_SHADING_PARAMETER16 0x90 +#define MT9V111I_SHADING_PARAMETER17 0x91 +#define MT9V111I_SHADING_PARAMETER18 0x92 +#define MT9V111I_SHADING_PARAMETER19 0x93 +#define MT9V111I_SHADING_PARAMETER20 0x94 +#define MT9V111I_SHADING_PARAMETER21 0x95 +#define MT9V111i_FLASH_CTRL 0x98 +#define MT9V111i_LINE_COUNTER 0x99 +#define MT9V111i_FRAME_COUNTER 0x9A +#define MT9V111i_H_PAN 0xA5 +#define MT9V111i_H_ZOOM 0xA6 +#define MT9V111i_H_SIZE 0xA7 +#define MT9V111i_V_PAN 0xA8 +#define MT9V111i_V_ZOOM 0xA9 +#define MT9V111i_V_SIZE 0xAA + +#define MT9V111I_SEL_IFP 0x1 +#define MT9V111I_SEL_SCA 0x4 +#define MT9V111I_FC_RGB_OR_YUV 0x1000 + +/*! + * Mt9v111 SENSOR CORE REGISTER BANK MAP + */ +#define MT9V111S_ADDR_SPACE_SEL 0x1 +#define MT9V111S_COLUMN_START 0x2 +#define MT9V111S_WIN_HEIGHT 0x3 +#define MT9V111S_WIN_WIDTH 0x4 +#define MT9V111S_HOR_BLANKING 0x5 +#define MT9V111S_VER_BLANKING 0x6 +#define MT9V111S_OUTPUT_CTRL 0x7 +#define MT9V111S_ROW_START 0x8 +#define MT9V111S_SHUTTER_WIDTH 0x9 +#define MT9V111S_PIXEL_CLOCK_SPEED 0xa +#define MT9V111S_RESTART 0xb +#define MT9V111S_SHUTTER_DELAY 0xc +#define MT9V111S_RESET 0xd +#define MT9V111S_COLUMN_START_IN_ZOOM 0x12 +#define MT9V111S_ROW_START_IN_ZOOM 0x13 +#define MT9V111S_DIGITAL_ZOOM 0x1e +#define MT9V111S_READ_MODE 0x20 +#define MT9V111S_DAC_CTRL 0x27 +#define MT9V111S_GREEN1_GAIN 0x2b +#define MT9V111S_BLUE_GAIN 0x2c +#define MT9V111S_READ_GAIN 0x2d +#define MT9V111S_GREEN2_GAIN 0x2e +#define MT9V111S_ROW_NOISE_CTRL 0x30 +#define MT9V111S_DARK_TARGET_W 0x31 +#define MT9V111S_TEST_DATA 0x32 +#define MT9V111S_GLOBAL_GAIN 0x35 +#define MT9V111S_SENSOR_CORE_VERSION 0x36 +#define MT9V111S_DARK_TARGET_WO 0x37 +#define MT9V111S_VERF_DAC 0x41 +#define MT9V111S_VCM_VCL 0x42 +#define MT9V111S_DISABLE_BYPASS 0x58 +#define MT9V111S_CALIB_MEAN_TEST 0x59 +#define MT9V111S_DARK_G1_AVE 0x5B +#define MT9V111S_DARK_G2_AVE 0x5C +#define MT9V111S_DARK_R_AVE 0x5D +#define MT9V111S_DARK_B_AVE 0x5E +#define MT9V111S_CAL_THRESHOLD 0x5f +#define MT9V111S_CAL_G1 0x60 +#define MT9V111S_CAL_G2 0x61 +#define MT9V111S_CAL_CTRL 0x62 +#define MT9V111S_CAL_R 0x63 +#define MT9V111S_CAL_B 0x64 +#define MT9V111S_CHIP_ENABLE 0xF1 +#define MT9V111S_CHIP_VERSION 0xFF + +/* OUTPUT_CTRL */ +#define MT9V111S_OUTCTRL_SYNC 0x1 +#define MT9V111S_OUTCTRL_CHIP_ENABLE 0x2 +#define MT9V111S_OUTCTRL_TEST_MODE 0x40 + +/* READ_MODE */ +#define MT9V111S_RM_NOBADFRAME 0x1 +#define MT9V111S_RM_NODESTRUCT 0x2 +#define MT9V111S_RM_COLUMNSKIP 0x4 +#define MT9V111S_RM_ROWSKIP 0x8 +#define MT9V111S_RM_BOOSTEDRESET 0x1000 +#define MT9V111S_RM_COLUMN_LATE 0x10 +#define MT9V111S_RM_ROW_LATE 0x80 +#define MT9V111S_RM_RIGTH_TO_LEFT 0x4000 +#define MT9V111S_RM_BOTTOM_TO_TOP 0x8000 + +/*! I2C Slave Address */ +#define MT9V111_I2C_ADDRESS 0x48 + +/*! + * The image resolution enum for the mt9v111 sensor + */ +typedef enum { + MT9V111_OutputResolution_VGA = 0, /*!< VGA size */ + MT9V111_OutputResolution_QVGA, /*!< QVGA size */ + MT9V111_OutputResolution_CIF, /*!< CIF size */ + MT9V111_OutputResolution_QCIF, /*!< QCIF size */ + MT9V111_OutputResolution_QQVGA, /*!< QQVGA size */ + MT9V111_OutputResolution_SXGA /*!< SXGA size */ +} MT9V111_OutputResolution; + +enum { + MT9V111_WINWIDTH = 0x287, + MT9V111_WINWIDTH_DEFAULT = 0x287, + MT9V111_WINWIDTH_MIN = 0x9, + + MT9V111_WINHEIGHT = 0x1E7, + MT9V111_WINHEIGHT_DEFAULT = 0x1E7, + + MT9V111_HORZBLANK_DEFAULT = 0x26, + MT9V111_HORZBLANK_MIN = 0x9, + MT9V111_HORZBLANK_MAX = 0x3FF, + + MT9V111_VERTBLANK_DEFAULT = 0x4, + MT9V111_VERTBLANK_MIN = 0x3, + MT9V111_VERTBLANK_MAX = 0xFFF, +}; + +/*! + * Mt9v111 Core Register structure. + */ +typedef struct { + u32 addressSelect; /*!< select address bank for Core Register 0x4 */ + u32 columnStart; /*!< Starting Column */ + u32 windowHeight; /*!< Window Height */ + u32 windowWidth; /*!< Window Width */ + u32 horizontalBlanking; /*!< Horizontal Blank time, in pixels */ + u32 verticalBlanking; /*!< Vertical Blank time, in pixels */ + u32 outputControl; /*!< Register to control sensor output */ + u32 rowStart; /*!< Starting Row */ + u32 shutterWidth; + u32 pixelClockSpeed; /*!< pixel date rate */ + u32 restart; /*!< Abandon the readout of current frame */ + u32 shutterDelay; + u32 reset; /*!< reset the sensor to the default mode */ + u32 zoomColStart; /*!< Column start in the Zoom mode */ + u32 zomRowStart; /*!< Row start in the Zoom mode */ + u32 digitalZoom; /*!< 1 means zoom by 2 */ + u32 readMode; /*!< Readmode: aspects of the readout of the sensor */ + u32 dACStandbyControl; + u32 green1Gain; /*!< Gain Settings */ + u32 blueGain; + u32 redGain; + u32 green2Gain; + u32 rowNoiseControl; + u32 darkTargetwNC; + u32 testData; /*!< test mode */ + u32 globalGain; + u32 chipVersion; + u32 darkTargetwoNC; + u32 vREFDACs; + u32 vCMandVCL; + u32 disableBypass; + u32 calibMeanTest; + u32 darkG1average; + u32 darkG2average; + u32 darkRaverage; + u32 darkBaverage; + u32 calibThreshold; + u32 calibGreen1; + u32 calibGreen2; + u32 calibControl; + u32 calibRed; + u32 calibBlue; + u32 chipEnable; /*!< Image core Registers written by image flow processor */ +} mt9v111_coreReg; + +/*! + * Mt9v111 IFP Register structure. + */ +typedef struct { + u32 addrSpaceSel; /*!< select address bank for Core Register 0x1 */ + u32 baseMaxtrixSign; /*!< sign of coefficient for base color correction matrix */ + u32 baseMaxtrixScale15; /*!< scaling of color correction coefficient K1-5 */ + u32 baseMaxtrixScale69; /*!< scaling of color correction coefficient K6-9 */ + u32 apertureGain; /*!< sharpening */ + u32 modeControl; /*!< bit 7 CCIR656 sync codes are embedded in the image */ + u32 softReset; /*!< Image processing mode: 1 reset mode, 0 operational mode */ + u32 formatControl; /*!< bit12 1 for RGB565, 0 for YcrCb */ + u32 baseMatrixCfk1; /*!< K1 Color correction coefficient */ + u32 baseMatrixCfk2; /*!< K2 Color correction coefficient */ + u32 baseMatrixCfk3; /*!< K3 Color correction coefficient */ + u32 baseMatrixCfk4; /*!< K4 Color correction coefficient */ + u32 baseMatrixCfk5; /*!< K5 Color correction coefficient */ + u32 baseMatrixCfk6; /*!< K6 Color correction coefficient */ + u32 baseMatrixCfk7; /*!< K7 Color correction coefficient */ + u32 baseMatrixCfk8; /*!< K8 Color correction coefficient */ + u32 baseMatrixCfk9; /*!< K9 Color correction coefficient */ + u32 awbPosition; /*!< Current position of AWB color correction matrix */ + u32 awbRedGain; /*!< Current value of AWB red channel gain */ + u32 awbBlueGain; /*!< Current value of AWB blue channel gain */ + u32 deltaMatrixCFSign; /*!< Sign of coefficients of delta color correction matrix register */ + u32 deltaMatrixCFD1; /*!< D1 Delta coefficient */ + u32 deltaMatrixCFD2; /*!< D2 Delta coefficient */ + u32 deltaMatrixCFD3; /*!< D3 Delta coefficient */ + u32 deltaMatrixCFD4; /*!< D4 Delta coefficient */ + u32 deltaMatrixCFD5; /*!< D5 Delta coefficient */ + u32 deltaMatrixCFD6; /*!< D6 Delta coefficient */ + u32 deltaMatrixCFD7; /*!< D7 Delta coefficient */ + u32 deltaMatrixCFD8; /*!< D8 Delta coefficient */ + u32 deltaMatrixCFD9; /*!< D9 Delta coefficient */ + u32 lumLimitWB; /*!< Luminance range of pixels considered in WB statistics */ + u32 RBGManualWB; /*!< Red and Blue color channel gains for manual white balance */ + u32 awbRedLimit; /*!< Limits on Red channel gain adjustment through AWB */ + u32 awbBlueLimit; /*!< Limits on Blue channel gain adjustment through AWB */ + u32 matrixAdjLimit; /*!< Limits on color correction matrix adjustment through AWB */ + u32 awbSpeed; /*!< AWB speed and color saturation control */ + u32 HBoundAE; /*!< Horizontal boundaries of AWB measurement window */ + u32 VBoundAE; /*!< Vertical boundaries of AWB measurement window */ + u32 HBoundAECenWin; /*!< Horizontal boundaries of AE measurement window for backlight compensation */ + u32 VBoundAECenWin; /*!< Vertical boundaries of AE measurement window for backlight compensation */ + u32 boundAwbWin; /*!< Boundaries of AWB measurement window */ + u32 AEPrecisionTarget; /*!< Auto exposure target and precision control */ + u32 AESpeed; /*!< AE speed and sensitivity control register */ + u32 redAWBMeasure; /*!< Measure of the red channel value used by AWB */ + u32 lumaAWBMeasure; /*!< Measure of the luminance channel value used by AWB */ + u32 blueAWBMeasure; /*!< Measure of the blue channel value used by AWB */ + u32 limitSharpSatuCtrl; /*!< Automatic control of sharpness and color saturation */ + u32 lumaOffset; /*!< Luminance offset control (brightness control) */ + u32 clipLimitOutputLumi; /*!< Clipping limits for output luminance */ + u32 gainLimitAE; /*!< Imager gain limits for AE adjustment */ + u32 shutterWidthLimitAE; /*!< Shutter width (exposure time) limits for AE adjustment */ + u32 upperShutterDelayLi; /*!< Upper Shutter Delay Limit */ + u32 outputFormatCtrl2; /*!< Output Format Control 2 + 00 = 16-bit RGB565. + 01 = 15-bit RGB555. + 10 = 12-bit RGB444x. + 11 = 12-bit RGBx444. */ + u32 ipfBlackLevelSub; /*!< IFP black level subtraction */ + u32 ipfBlackLevelAdd; /*!< IFP black level addition */ + u32 adcLimitAEAdj; /*!< ADC limits for AE adjustment */ + u32 agimnThreCamAdj; /*!< Gain threshold for CCM adjustment */ + u32 linearAE; + u32 thresholdEdgeDefect; /*!< Edge threshold for interpolation and defect correction */ + u32 lumaSumMeasure; /*!< Luma measured by AE engine */ + u32 timeAdvSumLuma; /*!< Time-averaged luminance value tracked by auto exposure */ + u32 motion; /*!< 1 when motion is detected */ + u32 gammaKneeY12; /*!< Gamma knee points Y1 and Y2 */ + u32 gammaKneeY34; /*!< Gamma knee points Y3 and Y4 */ + u32 gammaKneeY56; /*!< Gamma knee points Y5 and Y6 */ + u32 gammaKneeY78; /*!< Gamma knee points Y7 and Y8 */ + u32 gammaKneeY90; /*!< Gamma knee points Y9 and Y10 */ + u32 gammaKneeY0; /*!< Gamma knee point Y0 */ + u32 shutter_width_60; + u32 search_flicker_60; + u32 ratioImageGainBase; + u32 ratioImageGainDelta; + u32 signValueReg5F; + u32 aeGain; + u32 maxGainAE; + u32 lensCorrectCtrl; + u32 shadingParameter1; /*!< Shade Parameters */ + u32 shadingParameter2; + u32 shadingParameter3; + u32 shadingParameter4; + u32 shadingParameter5; + u32 shadingParameter6; + u32 shadingParameter7; + u32 shadingParameter8; + u32 shadingParameter9; + u32 shadingParameter10; + u32 shadingParameter11; + u32 shadingParameter12; + u32 shadingParameter13; + u32 shadingParameter14; + u32 shadingParameter15; + u32 shadingParameter16; + u32 shadingParameter17; + u32 shadingParameter18; + u32 shadingParameter19; + u32 shadingParameter20; + u32 shadingParameter21; + u32 flashCtrl; /*!< Flash control */ + u32 lineCounter; /*!< Line counter */ + u32 frameCounter; /*!< Frame counter */ + u32 HPan; /*!< Horizontal pan in decimation */ + u32 HZoom; /*!< Horizontal zoom in decimation */ + u32 HSize; /*!< Horizontal output size iIn decimation */ + u32 VPan; /*!< Vertical pan in decimation */ + u32 VZoom; /*!< Vertical zoom in decimation */ + u32 VSize; /*!< Vertical output size in decimation */ +} mt9v111_IFPReg; + +/*! + * mt9v111 Config structure + */ +typedef struct { + mt9v111_coreReg *coreReg; /*!< Sensor Core Register Bank */ + mt9v111_IFPReg *ifpReg; /*!< IFP Register Bank */ +} mt9v111_conf; + +typedef struct { + u8 index; + u16 width; + u16 height; +} mt9v111_image_format; + +#endif /* MT9V111_H_ */ --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mx27_csi.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mx27_csi.h @@ -0,0 +1,167 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_csi.h + * + * @brief CMOS Sensor interface functions + * + * @ingroup CSI + */ + +#ifndef MX27_CSI_H +#define MX27_CSI_H + +#include + +/* reset values */ +#define CSICR1_RESET_VAL 0x40000800 +#define CSICR2_RESET_VAL 0x0 +#define CSICR3_RESET_VAL 0x0 + +/* csi control reg 1 */ +#define BIT_SWAP16_EN (0x1 << 31) +#define BIT_EXT_VSYNC (0x1 << 30) +#define BIT_EOF_INT_EN (0x1 << 29) +#define BIT_PRP_IF_EN (0x1 << 28) +#define BIT_CCIR_MODE (0x1 << 27) +#define BIT_COF_INT_EN (0x1 << 26) +#define BIT_SF_OR_INTEN (0x1 << 25) +#define BIT_RF_OR_INTEN (0x1 << 24) +#define BIT_STATFF_LEVEL (0x3 << 22) +#define BIT_STATFF_INTEN (0x1 << 21) +#define BIT_RXFF_LEVEL (0x3 << 19) +#define BIT_RXFF_INTEN (0x1 << 18) +#define BIT_SOF_POL (0x1 << 17) +#define BIT_SOF_INTEN (0x1 << 16) +#define BIT_MCLKDIV (0xF << 12) +#define BIT_HSYNC_POL (0x1 << 11) +#define BIT_CCIR_EN (0x1 << 10) +#define BIT_MCLKEN (0x1 << 9) +#define BIT_FCC (0x1 << 8) +#define BIT_PACK_DIR (0x1 << 7) +#define BIT_CLR_STATFIFO (0x1 << 6) +#define BIT_CLR_RXFIFO (0x1 << 5) +#define BIT_GCLK_MODE (0x1 << 4) +#define BIT_INV_DATA (0x1 << 3) +#define BIT_INV_PCLK (0x1 << 2) +#define BIT_REDGE (0x1 << 1) + +#define SHIFT_STATFF_LEVEL 22 +#define SHIFT_RXFF_LEVEL 19 +#define SHIFT_MCLKDIV 12 + +/* control reg 3 */ +#define BIT_FRMCNT (0xFFFF << 16) +#define BIT_FRMCNT_RST (0x1 << 15) +#define BIT_CSI_SUP (0x1 << 3) +#define BIT_ZERO_PACK_EN (0x1 << 2) +#define BIT_ECC_INT_EN (0x1 << 1) +#define BIT_ECC_AUTO_EN (0x1) + +#define SHIFT_FRMCNT 16 + +/* csi status reg */ +#define BIT_SFF_OR_INT (0x1 << 25) +#define BIT_RFF_OR_INT (0x1 << 24) +#define BIT_STATFF_INT (0x1 << 21) +#define BIT_RXFF_INT (0x1 << 18) +#define BIT_EOF_INT (0x1 << 17) +#define BIT_SOF_INT (0x1 << 16) +#define BIT_F2_INT (0x1 << 15) +#define BIT_F1_INT (0x1 << 14) +#define BIT_COF_INT (0x1 << 13) +#define BIT_ECC_INT (0x1 << 1) +#define BIT_DRDY (0x1 << 0) + +#define CSI_MCLK_VF 1 +#define CSI_MCLK_ENC 2 +#define CSI_MCLK_RAW 4 +#define CSI_MCLK_I2C 8 + +#define CSI_CSICR1 (IO_ADDRESS(CSI_BASE_ADDR)) +#define CSI_CSICR2 (IO_ADDRESS(CSI_BASE_ADDR + 0x4)) +#define CSI_CSISR (IO_ADDRESS(CSI_BASE_ADDR + 0x8)) +#define CSI_STATFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0xC)) +#define CSI_CSIRXFIFO (IO_ADDRESS(CSI_BASE_ADDR + 0x10)) +#define CSI_CSIRXCNT (IO_ADDRESS(CSI_BASE_ADDR + 0x14)) +#define CSI_CSICR3 (IO_ADDRESS(CSI_BASE_ADDR + 0x1C)) + +#define CSI_CSIRXFIFO_PHYADDR (CSI_BASE_ADDR + 0x10) + +static __inline void csi_clear_status(unsigned long status) +{ + __raw_writel(status, CSI_CSISR); +} + +typedef struct { + unsigned data_width:3; + unsigned clk_mode:2; + unsigned ext_vsync:1; + unsigned Vsync_pol:1; + unsigned Hsync_pol:1; + unsigned pixclk_pol:1; + unsigned data_pol:1; + unsigned sens_clksrc:1; +} csi_signal_cfg_t; + +typedef struct { + /* control reg 1 */ + unsigned int swap16_en:1; + unsigned int ext_vsync:1; + unsigned int eof_int_en:1; + unsigned int prp_if_en:1; + unsigned int ccir_mode:1; + unsigned int cof_int_en:1; + unsigned int sf_or_inten:1; + unsigned int rf_or_inten:1; + unsigned int statff_level:2; + unsigned int staff_inten:1; + unsigned int rxff_level:2; + unsigned int rxff_inten:1; + unsigned int sof_pol:1; + unsigned int sof_inten:1; + unsigned int mclkdiv:4; + unsigned int hsync_pol:1; + unsigned int ccir_en:1; + unsigned int mclken:1; + unsigned int fcc:1; + unsigned int pack_dir:1; + unsigned int gclk_mode:1; + unsigned int inv_data:1; + unsigned int inv_pclk:1; + unsigned int redge:1; + unsigned int csicnt1_rsv:1; + + /* control reg 3 */ + unsigned int frmcnt:16; + unsigned int frame_reset:1; + unsigned int csi_sup:1; + unsigned int zero_pack_en:1; + unsigned int ecc_int_en:1; + unsigned int ecc_auto_en:1; + + /* fifo counter */ + unsigned int rxcnt; +} csi_config_t; + +typedef void (*csi_irq_callback_t) (void *data, unsigned long status); + +int32_t csi_enable_mclk(int src, bool flag, bool wait); +int32_t csi_init_interface(uint16_t width, uint16_t height, + uint32_t pixel_fmt, csi_signal_cfg_t sig); +int csi_read_mclk_flag(void); +void csi_set_callback(csi_irq_callback_t callback, void *data); +void csi_enable_prpif(uint32_t enable); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg.c @@ -0,0 +1,413 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_prp_vf_sdc_bg.c + * + * @brief IPU Use case for PRP-VF back-ground + * + * @ingroup IPU + */ +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +static int buffer_num = 0; +static int buffer_ready = 0; + +/* + * Function definitions + */ + +/*! + * SDC V-Sync callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t prpvf_sdc_vsync_callback(int irq, void *dev_id) +{ + pr_debug("buffer_ready %d buffer_num %d\n", buffer_ready, buffer_num); + if (buffer_ready > 0) { + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, 0); + buffer_ready--; + } + + return IRQ_HANDLED; +} + +/*! + * VF EOF callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t prpvf_vf_eof_callback(int irq, void *dev_id) +{ + pr_debug("buffer_ready %d buffer_num %d\n", buffer_ready, buffer_num); + + ipu_select_buffer(MEM_ROT_VF_MEM, IPU_INPUT_BUFFER, buffer_num); + + buffer_num = (buffer_num == 0) ? 1 : 0; + + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, buffer_num); + buffer_ready++; + return IRQ_HANDLED; +} + +/*! + * prpvf_start - start the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_start(void *private) +{ + cam_data *cam = (cam_data *) private; + ipu_channel_params_t vf; + u32 format; + u32 offset; + u32 bpp, size = 3; + int err = 0; + + if (!cam) { + printk(KERN_ERR "private is NULL\n"); + return -EIO; + } + + if (cam->overlay_active == true) { + pr_debug("already start.\n"); + return 0; + } + + format = cam->v4l2_fb.fmt.pixelformat; + if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR24) { + bpp = 3, size = 3; + pr_info("BGR24\n"); + } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_RGB565) { + bpp = 2, size = 2; + pr_info("RGB565\n"); + } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR32) { + bpp = 4, size = 4; + pr_info("BGR32\n"); + } else { + printk(KERN_ERR + "unsupported fix format from the framebuffer.\n"); + return -EINVAL; + } + + offset = cam->v4l2_fb.fmt.bytesperline * cam->win.w.top + + size * cam->win.w.left; + + if (cam->v4l2_fb.base == 0) { + printk(KERN_ERR "invalid frame buffer address.\n"); + } else { + offset += (u32) cam->v4l2_fb.base; + } + + memset(&vf, 0, sizeof(ipu_channel_params_t)); + ipu_csi_get_window_size(&vf.csi_prp_vf_mem.in_width, + &vf.csi_prp_vf_mem.in_height, cam->csi); + vf.csi_prp_vf_mem.in_pixel_fmt = IPU_PIX_FMT_UYVY; + vf.csi_prp_vf_mem.out_width = cam->win.w.width; + vf.csi_prp_vf_mem.out_height = cam->win.w.height; + vf.csi_prp_vf_mem.csi = cam->csi; + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + vf.csi_prp_vf_mem.out_width = cam->win.w.height; + vf.csi_prp_vf_mem.out_height = cam->win.w.width; + } + vf.csi_prp_vf_mem.out_pixel_fmt = format; + size = cam->win.w.width * cam->win.w.height * size; + + err = ipu_init_channel(CSI_PRP_VF_MEM, &vf); + if (err != 0) + goto out_4; + + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, true, true); + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], cam->vf_bufs[0]); + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], cam->vf_bufs[1]); + } + cam->vf_bufs_size[0] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0, + cam->vf_bufs_size[0], + &cam->vf_bufs[0], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[0] == NULL) { + printk(KERN_ERR "Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_3; + } + cam->vf_bufs_size[1] = PAGE_ALIGN(size); + cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0, + cam->vf_bufs_size[1], + &cam->vf_bufs[1], + GFP_DMA | + GFP_KERNEL); + if (cam->vf_bufs_vaddr[1] == NULL) { + printk(KERN_ERR "Error to allocate vf buffer\n"); + err = -ENOMEM; + goto out_3; + } + + err = ipu_init_channel_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, + format, vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + IPU_ROTATE_NONE, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n"); + goto out_3; + } + err = ipu_init_channel(MEM_ROT_VF_MEM, NULL); + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n"); + goto out_3; + } + + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_INPUT_BUFFER, + format, vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + cam->vf_rotation, cam->vf_bufs[0], + cam->vf_bufs[1], 0, 0); + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n"); + goto out_2; + } + + if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) { + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_height, + vf.csi_prp_vf_mem.out_width, + cam->overlay_fb->var.xres * bpp, + IPU_ROTATE_NONE, offset, 0, 0, 0); + + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n"); + goto out_2; + } + } else { + err = ipu_init_channel_buffer(MEM_ROT_VF_MEM, IPU_OUTPUT_BUFFER, + format, + vf.csi_prp_vf_mem.out_width, + vf.csi_prp_vf_mem.out_height, + cam->overlay_fb->var.xres * bpp, + IPU_ROTATE_NONE, offset, 0, 0, 0); + if (err != 0) { + printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n"); + goto out_2; + } + } + + ipu_clear_irq(IPU_IRQ_PRP_VF_OUT_EOF); + err = ipu_request_irq(IPU_IRQ_PRP_VF_OUT_EOF, prpvf_vf_eof_callback, + 0, "Mxc Camera", cam); + if (err != 0) { + printk(KERN_ERR + "Error registering IPU_IRQ_PRP_VF_OUT_EOF irq.\n"); + goto out_2; + } + + ipu_clear_irq(IPU_IRQ_BG_SF_END); + err = ipu_request_irq(IPU_IRQ_BG_SF_END, prpvf_sdc_vsync_callback, + 0, "Mxc Camera", NULL); + if (err != 0) { + printk(KERN_ERR "Error registering IPU_IRQ_BG_SF_END irq.\n"); + goto out_1; + } + + ipu_enable_channel(CSI_PRP_VF_MEM); + ipu_enable_channel(MEM_ROT_VF_MEM); + + buffer_num = 0; + buffer_ready = 0; + ipu_select_buffer(CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0); + + cam->overlay_active = true; + return err; + + out_1: + ipu_free_irq(IPU_IRQ_PRP_VF_OUT_EOF, NULL); + out_2: + ipu_uninit_channel(MEM_ROT_VF_MEM); + out_3: + ipu_uninit_channel(CSI_PRP_VF_MEM); + out_4: + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } + if (cam->rot_vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_vf_buf_size[0], + cam->rot_vf_bufs_vaddr[0], + cam->rot_vf_bufs[0]); + cam->rot_vf_bufs_vaddr[0] = NULL; + cam->rot_vf_bufs[0] = 0; + } + if (cam->rot_vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_vf_buf_size[1], + cam->rot_vf_bufs_vaddr[1], + cam->rot_vf_bufs[1]); + cam->rot_vf_bufs_vaddr[1] = NULL; + cam->rot_vf_bufs[1] = 0; + } + return err; +} + +/*! + * prpvf_stop - stop the vf task + * + * @param private cam_data * mxc v4l2 main structure + * + */ +static int prpvf_stop(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (cam->overlay_active == false) + return 0; + + ipu_free_irq(IPU_IRQ_BG_SF_END, NULL); + + ipu_free_irq(IPU_IRQ_PRP_VF_OUT_EOF, cam); + + ipu_disable_channel(CSI_PRP_VF_MEM, true); + ipu_disable_channel(MEM_ROT_VF_MEM, true); + ipu_uninit_channel(CSI_PRP_VF_MEM); + ipu_uninit_channel(MEM_ROT_VF_MEM); + ipu_csi_enable_mclk_if(CSI_MCLK_VF, cam->csi, false, false); + + if (cam->vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->vf_bufs_size[0], + cam->vf_bufs_vaddr[0], cam->vf_bufs[0]); + cam->vf_bufs_vaddr[0] = NULL; + cam->vf_bufs[0] = 0; + } + if (cam->vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->vf_bufs_size[1], + cam->vf_bufs_vaddr[1], cam->vf_bufs[1]); + cam->vf_bufs_vaddr[1] = NULL; + cam->vf_bufs[1] = 0; + } + if (cam->rot_vf_bufs_vaddr[0]) { + dma_free_coherent(0, cam->rot_vf_buf_size[0], + cam->rot_vf_bufs_vaddr[0], + cam->rot_vf_bufs[0]); + cam->rot_vf_bufs_vaddr[0] = NULL; + cam->rot_vf_bufs[0] = 0; + } + if (cam->rot_vf_bufs_vaddr[1]) { + dma_free_coherent(0, cam->rot_vf_buf_size[1], + cam->rot_vf_bufs_vaddr[1], + cam->rot_vf_bufs[1]); + cam->rot_vf_bufs_vaddr[1] = NULL; + cam->rot_vf_bufs[1] = 0; + } + + buffer_num = 0; + buffer_ready = 0; + cam->overlay_active = false; + return 0; +} + +/*! + * function to select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return status + */ +int prp_vf_sdc_select_bg(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (cam) { + cam->vf_start_sdc = prpvf_start; + cam->vf_stop_sdc = prpvf_stop; + cam->overlay_active = false; + } + + return 0; +} + +/*! + * function to de-select PRP-VF as the working path + * + * @param private cam_data * mxc v4l2 main structure + * + * @return status + */ +int prp_vf_sdc_deselect_bg(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + err = prpvf_stop(private); + + if (cam) { + cam->vf_start_sdc = NULL; + cam->vf_stop_sdc = NULL; + } + return err; +} + +/*! + * Init viewfinder task. + * + * @return Error code indicating success or failure + */ +__init int prp_vf_sdc_init_bg(void) +{ + return 0; +} + +/*! + * Deinit viewfinder task. + * + * @return Error code indicating success or failure + */ +void __exit prp_vf_sdc_exit_bg(void) +{ +} + +module_init(prp_vf_sdc_init_bg); +module_exit(prp_vf_sdc_exit_bg); + +EXPORT_SYMBOL(prp_vf_sdc_select_bg); +EXPORT_SYMBOL(prp_vf_sdc_deselect_bg); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IPU PRP VF SDC Backgroud Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mx27_prphw.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mx27_prphw.c @@ -0,0 +1,1099 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx27_prphw.c + * + * @brief MX27 Video For Linux 2 capture driver + * + * @ingroup MXC_V4L2_CAPTURE + */ +#include +#include +#include +#include +#include +#include + +#include "mx27_prp.h" + +#define PRP_MIN_IN_WIDTH 32 +#define PRP_MAX_IN_WIDTH 2044 +#define PRP_MIN_IN_HEIGHT 32 +#define PRP_MAX_IN_HEIGHT 2044 + +typedef struct _coeff_t { + unsigned long coeff[2]; + unsigned long cntl; +} coeff_t[2][2]; + +static coeff_t *PRP_RSZ_COEFF = (coeff_t *) PRP_CH1_RZ_HORI_COEF1; + +static unsigned char scale_get(scale_t * t, + unsigned char *i, unsigned char *out); +static int gcd(int x, int y); +static int ratio(int x, int y, int *den); +static int prp_scale_bilinear(scale_t * t, int coeff, int base, int nxt); +static int prp_scale_ave(scale_t * t, unsigned char base); +static int ave_scale(scale_t * t, int inv, int outv); +static int scale(scale_t * t, int inv, int outv); + +/*! + * @param t table + * @param i table index + * @param out bilinear # input pixels to advance + * average whether result is ready for output + * @return coefficient +*/ +static unsigned char scale_get(scale_t * t, unsigned char *i, + unsigned char *out) +{ + unsigned char c; + + c = t->tbl[*i]; + (*i)++; + *i %= t->len; + + if (out) { + if (t->algo == ALGO_BIL) { + for ((*out) = 1; + (*i) && ((*i) < t->len) && !t->tbl[(*i)]; (*i)++) { + (*out)++; + } + if ((*i) == t->len) + (*i) = 0; + } else + *out = c >> BC_COEF; + } + + c &= SZ_COEF - 1; + + if (c == SZ_COEF - 1) + c = SZ_COEF; + + return c; +} + +/*! + * @brief Get maximum common divisor. + * @param x First input value + * @param y Second input value + * @return Maximum common divisor of x and y + */ +static int gcd(int x, int y) +{ + int k; + + if (x < y) { + k = x; + x = y; + y = k; + } + + while ((k = x % y)) { + x = y; + y = k; + } + + return y; +} + +/*! + * @brief Get ratio. + * @param x First input value + * @param y Second input value + * @param den Denominator of the ratio (corresponding to y) + * @return Numerator of the ratio (corresponding to x) + */ +static int ratio(int x, int y, int *den) +{ + int g; + + if (!x || !y) + return 0; + + g = gcd(x, y); + *den = y / g; + + return x / g; +} + +/*! + * @brief Build PrP coefficient entry based on bilinear algorithm + * + * @param t The pointer to scale_t structure + * @param coeff The weighting coefficient + * @param base The base of the coefficient + * @param nxt Number of pixels to be read + * + * @return The length of current coefficient table on success + * -1 on failure + */ +static int prp_scale_bilinear(scale_t * t, int coeff, int base, int nxt) +{ + int i; + + if (t->len >= sizeof(t->tbl)) + return -1; + + coeff = ((coeff << BC_COEF) + (base >> 1)) / base; + if (coeff >= SZ_COEF - 1) + coeff--; + + coeff |= SZ_COEF; + t->tbl[(int)t->len++] = (unsigned char)coeff; + + for (i = 1; i < nxt; i++) { + if (t->len >= MAX_TBL) + return -1; + + t->tbl[(int)t->len++] = 0; + } + + return t->len; +} + +#define _bary(name) static const unsigned char name[] + +_bary(c1) = { +7}; + +_bary(c2) = { +4, 4}; + +_bary(c3) = { +2, 4, 2}; + +_bary(c4) = { +2, 2, 2, 2}; + +_bary(c5) = { +1, 2, 2, 2, 1}; + +_bary(c6) = { +1, 1, 2, 2, 1, 1}; + +_bary(c7) = { +1, 1, 1, 2, 1, 1, 1}; + +_bary(c8) = { +1, 1, 1, 1, 1, 1, 1, 1}; + +_bary(c9) = { +1, 1, 1, 1, 1, 1, 1, 1, 0}; + +_bary(c10) = { +0, 1, 1, 1, 1, 1, 1, 1, 1, 0}; + +_bary(c11) = { +0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0}; + +_bary(c12) = { +0, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 0}; + +_bary(c13) = { +0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0}; + +_bary(c14) = { +0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 0, 1, 0}; + +_bary(c15) = { +0, 1, 0, 1, 0, 1, 1, 0, 1, 1, 0, 1, 0, 1, 0}; + +_bary(c16) = { +1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}; + +_bary(c17) = { +0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0}; + +_bary(c18) = { +0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0}; + +_bary(c19) = { +0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0}; + +_bary(c20) = { +0, 1, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0}; + +static const unsigned char *ave_coeff[] = { + c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, + c11, c12, c13, c14, c15, c16, c17, c18, c19, c20 +}; + +/*! + * @brief Build PrP coefficient table based on average algorithm + * + * @param t The pointer to scale_t structure + * @param base The base of the coefficient + * + * @return The length of current coefficient table on success + * -1 on failure + */ +static int prp_scale_ave(scale_t * t, unsigned char base) +{ + if (t->len + base > sizeof(t->tbl)) + return -1; + + memcpy(&t->tbl[(int)t->len], ave_coeff[(int)base - 1], base); + t->len = (unsigned char)(t->len + base); + t->tbl[t->len - 1] |= SZ_COEF; + + return t->len; +} + +/*! + * @brief Build PrP coefficient table based on average algorithm + * + * @param t The pointer to scale_t structure + * @param inv Input resolution + * @param outv Output resolution + * + * @return The length of current coefficient table on success + * -1 on failure + */ +static int ave_scale(scale_t * t, int inv, int outv) +{ + int ratio_count; + + ratio_count = 0; + if (outv != 1) { + unsigned char a[20]; + int v; + + /* split n:m into multiple n[i]:1 */ + for (v = 0; v < outv; v++) + a[v] = (unsigned char)(inv / outv); + + inv %= outv; + if (inv) { + /* find start of next layer */ + v = (outv - inv) >> 1; + inv += v; + for (; v < inv; v++) + a[v]++; + } + + for (v = 0; v < outv; v++) { + if (prp_scale_ave(t, a[v]) < 0) + return -1; + + t->ratio[ratio_count] = a[v]; + ratio_count++; + } + } else if (prp_scale_ave(t, inv) < 0) { + return -1; + } else { + t->ratio[ratio_count++] = (char)inv; + ratio_count++; + } + + return t->len; +} + +/*! + * @brief Build PrP coefficient table + * + * @param t The pointer to scale_t structure + * @param inv input resolution reduced ratio + * @param outv output resolution reduced ratio + * + * @return The length of current coefficient table on success + * -1 on failure + */ +static int scale(scale_t * t, int inv, int outv) +{ + int v; /* overflow counter */ + int coeff, nxt; /* table output */ + + t->len = 0; + if (t->algo == ALGO_AUTO) { + /* automatic choice - bilinear for shrinking less than 2:1 */ + t->algo = ((outv != inv) && ((2 * outv) > inv)) ? + ALGO_BIL : ALGO_AVG; + } + + /* 1:1 resize must use averaging, bilinear will hang */ + if ((inv == outv) && (t->algo == ALGO_BIL)) { + pr_debug("Warning: 1:1 resize must use averaging algo\n"); + t->algo = ALGO_AVG; + } + + memset(t->tbl, 0, sizeof(t->tbl)); + if (t->algo == ALGO_BIL) { + t->ratio[0] = (char)inv; + t->ratio[1] = (char)outv; + } else + memset(t->ratio, 0, sizeof(t->ratio)); + + if (inv == outv) { + /* force scaling */ + t->ratio[0] = 1; + if (t->algo == ALGO_BIL) + t->ratio[1] = 1; + + return prp_scale_ave(t, 1); + } + + if (inv < outv) { + pr_debug("Upscaling not supported %d:%d\n", inv, outv); + return -1; + } + + if (t->algo != ALGO_BIL) + return ave_scale(t, inv, outv); + + v = 0; + if (inv >= 2 * outv) { + /* downscale: >=2:1 bilinear approximation */ + coeff = inv - 2 * outv; + v = 0; + nxt = 0; + do { + v += coeff; + nxt = 2; + while (v >= outv) { + v -= outv; + nxt++; + } + + if (prp_scale_bilinear(t, 1, 2, nxt) < 0) + return -1; + } while (v); + } else { + /* downscale: bilinear */ + int in_pos_inc = 2 * outv; + int out_pos = inv; + int out_pos_inc = 2 * inv; + int init_carry = inv - outv; + int carry = init_carry; + + v = outv + in_pos_inc; + do { + coeff = v - out_pos; + out_pos += out_pos_inc; + carry += out_pos_inc; + for (nxt = 0; v < out_pos; nxt++) { + v += in_pos_inc; + carry -= in_pos_inc; + } + if (prp_scale_bilinear(t, coeff, in_pos_inc, nxt) < 0) + return -1; + } while (carry != init_carry); + } + return t->len; +} + +/*! + * @brief Build PrP coefficient table + * + * @param pscale The pointer to scale_t structure which holdes + * coefficient tables + * @param din Scale ratio numerator + * @param dout Scale ratio denominator + * @param inv Input resolution + * @param vout Output resolution + * @param pout Internal output resolution + * @param retry Retry times (round the output length) when need + * + * @return Zero on success, others on failure + */ +int prp_scale(scale_t * pscale, int din, int dout, int inv, + unsigned short *vout, unsigned short *pout, int retry) +{ + int num; + int den; + unsigned short outv; + + /* auto-generation of values */ + if (!(dout && din)) { + if (!*vout) + dout = din = 1; + else { + din = inv; + dout = *vout; + } + } + + if (din < dout) { + pr_debug("Scale err, unsupported ratio %d : %d\n", din, dout); + return -1; + } + + lp_retry: + num = ratio(din, dout, &den); + if (!num) { + pr_debug("Scale err, unsupported ratio %d : %d\n", din, dout); + return -1; + } + + if (num > MAX_TBL || scale(pscale, num, den) < 0) { + dout++; + if (retry--) + goto lp_retry; + + pr_debug("Scale err, unsupported ratio %d : %d\n", num, den); + return -1; + } + + if (pscale->algo == ALGO_BIL) { + unsigned char i, j, k; + + outv = + (unsigned short)(inv / pscale->ratio[0] * pscale->ratio[1]); + inv %= pscale->ratio[0]; + for (i = j = 0; inv > 0; j++) { + unsigned char nxt; + + k = scale_get(pscale, &i, &nxt); + if (inv == 1 && k < SZ_COEF) { + /* needs 2 pixels for this output */ + break; + } + inv -= nxt; + } + outv = outv + j; + } else { + unsigned char i, tot; + + for (tot = i = 0; pscale->ratio[i]; i++) + tot = tot + pscale->ratio[i]; + + outv = (unsigned short)(inv / tot) * i; + inv %= tot; + for (i = 0; inv > 0; i++, outv++) + inv -= pscale->ratio[i]; + } + + if (!(*vout) || ((*vout) > outv)) + *vout = outv; + + if (pout) + *pout = outv; + + return 0; +} + +/*! + * @brief Reset PrP block + */ +int prphw_reset(void) +{ + unsigned long val; + unsigned long flag; + int i; + + flag = PRP_CNTL_RST; + val = PRP_CNTL_RSTVAL; + + __raw_writel(flag, PRP_CNTL); + + /* timeout */ + for (i = 0; i < 1000; i++) { + if (!(__raw_readl(PRP_CNTL) & flag)) { + pr_debug("PrP reset over\n"); + break; + } + msleep(1); + } + + /* verify reset value */ + if (__raw_readl(PRP_CNTL) != val) { + pr_info("PrP reset err, val = 0x%08X\n", __raw_readl(PRP_CNTL)); + return -1; + } + + return 0; +} + +/*! + * @brief Enable PrP channel. + * @param channel Channel number to be enabled + * @return Zero on success, others on failure + */ +int prphw_enable(int channel) +{ + unsigned long val; + + val = __raw_readl(PRP_CNTL); + if (channel & PRP_CHANNEL_1) + val |= PRP_CNTL_CH1EN; + if (channel & PRP_CHANNEL_2) + val |= (PRP_CNTL_CH2EN | PRP_CNTL_CH2_FLOWEN); + + __raw_writel(val, PRP_CNTL); + + return 0; +} + +/*! + * @brief Disable PrP channel. + * @param channel Channel number to be disable + * @return Zero on success, others on failure + */ +int prphw_disable(int channel) +{ + unsigned long val; + + val = __raw_readl(PRP_CNTL); + if (channel & PRP_CHANNEL_1) + val &= ~PRP_CNTL_CH1EN; + if (channel & PRP_CHANNEL_2) + val &= ~(PRP_CNTL_CH2EN | PRP_CNTL_CH2_FLOWEN); + + __raw_writel(val, PRP_CNTL); + + return 0; +} + +/*! + * @brief Set PrP input buffer address. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_inptr(emma_prp_cfg * cfg) +{ + if (cfg->in_csi & PRP_CSI_EN) + return -1; + + __raw_writel(cfg->in_ptr, PRP_SOURCE_Y_PTR); + if (cfg->in_pix == PRP_PIXIN_YUV420) { + u32 size; + + size = cfg->in_line_stride * cfg->in_height; + __raw_writel(cfg->in_ptr + size, PRP_SOURCE_CB_PTR); + __raw_writel(cfg->in_ptr + size + (size >> 2), + PRP_SOURCE_CR_PTR); + } + return 0; +} + +/*! + * @brief Set PrP channel 1 output buffer 1 address. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_ch1ptr(emma_prp_cfg * cfg) +{ + if (cfg->ch1_pix == PRP_PIX1_UNUSED) + return -1; + + __raw_writel(cfg->ch1_ptr, PRP_DEST_RGB1_PTR); + + /* support double buffer in loop mode only */ + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) { + if (cfg->ch1_ptr2) + __raw_writel(cfg->ch1_ptr2, PRP_DEST_RGB2_PTR); + else + __raw_writel(cfg->ch1_ptr, PRP_DEST_RGB2_PTR); + } + + return 0; +} + +/*! + * @brief Set PrP channel 1 output buffer 2 address. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_ch1ptr2(emma_prp_cfg * cfg) +{ + if (cfg->ch1_pix == PRP_PIX1_UNUSED || + (cfg->in_csi & PRP_CSI_LOOP) != PRP_CSI_LOOP) + return -1; + + if (cfg->ch1_ptr2) + __raw_writel(cfg->ch1_ptr2, PRP_DEST_RGB2_PTR); + else + return -1; + + return 0; +} + +/*! + * @brief Set PrP channel 2 output buffer 1 address. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_ch2ptr(emma_prp_cfg * cfg) +{ + u32 size; + + if (cfg->ch2_pix == PRP_PIX2_UNUSED) + return -1; + + __raw_writel(cfg->ch2_ptr, PRP_DEST_Y_PTR); + + if (cfg->ch2_pix == PRP_PIX2_YUV420) { + size = cfg->ch2_width * cfg->ch2_height; + __raw_writel(cfg->ch2_ptr + size, PRP_DEST_CB_PTR); + __raw_writel(cfg->ch2_ptr + size + (size >> 2), + PRP_DEST_CR_PTR); + } + + __raw_writel(__raw_readl(PRP_CNTL) | PRP_CNTL_CH2B1, PRP_CNTL); + return 0; +} + +/*! + * @brief Set PrP channel 2 output buffer 2 address. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_ch2ptr2(emma_prp_cfg * cfg) +{ + u32 size; + + if (cfg->ch2_pix == PRP_PIX2_UNUSED || + (cfg->in_csi & PRP_CSI_LOOP) != PRP_CSI_LOOP) + return -1; + + __raw_writel(cfg->ch2_ptr2, PRP_SOURCE_Y_PTR); + if (cfg->ch2_pix == PRP_PIX2_YUV420) { + size = cfg->ch2_width * cfg->ch2_height; + __raw_writel(cfg->ch2_ptr2 + size, PRP_SOURCE_CB_PTR); + __raw_writel(cfg->ch2_ptr2 + size + (size >> 2), + PRP_SOURCE_CR_PTR); + } + + __raw_writel(__raw_readl(PRP_CNTL) | PRP_CNTL_CH2B2, PRP_CNTL); + return 0; +} + +/*! + * @brief Build CSC table + * @param csc CSC table + * in csc[0]=index 0..3 : A.1 A.0 B.1 B.0 + * csc[1]=direction 0 : YUV2RGB 1 : RGB2YUV + * out csc[0..4] are coefficients c[9] is offset + * csc[0..8] are coefficients c[9] is offset + */ +void csc_tbl(short csc[10]) +{ + static const unsigned short _r2y[][9] = { + {0x4D, 0x4B, 0x3A, 0x57, 0x55, 0x40, 0x40, 0x6B, 0x29}, + {0x42, 0x41, 0x32, 0x4C, 0x4A, 0x38, 0x38, 0x5E, 0x24}, + {0x36, 0x5C, 0x25, 0x3B, 0x63, 0x40, 0x40, 0x74, 0x18}, + {0x2F, 0x4F, 0x20, 0x34, 0x57, 0x38, 0x38, 0x66, 0x15}, + }; + static const unsigned short _y2r[][5] = { + {0x80, 0xb4, 0x2c, 0x5b, 0x0e4}, + {0x95, 0xcc, 0x32, 0x68, 0x104}, + {0x80, 0xca, 0x18, 0x3c, 0x0ec}, + {0x95, 0xe5, 0x1b, 0x44, 0x1e0}, + }; + unsigned short *_csc; + int _csclen; + + csc[9] = csc[0] & 1; + _csclen = csc[0] & 3; + + if (csc[1]) { + _csc = (unsigned short *)_r2y[_csclen]; + _csclen = sizeof(_r2y[0]); + } else { + _csc = (unsigned short *)_y2r[_csclen]; + _csclen = sizeof(_y2r[0]); + memset(csc + 5, 0, sizeof(short) * 4); + } + memcpy(csc, _csc, _csclen); +} + +/*! + * @brief Setup PrP resize coefficient registers + * + * @param ch PrP channel number + * @param dir Direction, 0 - horizontal, 1 - vertical + * @param scale The pointer to scale_t structure + */ +static void prp_set_scaler(int ch, int dir, scale_t * scale) +{ + int i; + unsigned int coeff[2]; + unsigned int valid; + + for (coeff[0] = coeff[1] = valid = 0, i = 19; i >= 0; i--) { + int j; + + j = i > 9 ? 1 : 0; + coeff[j] = (coeff[j] << BC_COEF) | + (scale->tbl[i] & (SZ_COEF - 1)); + + if (i == 5 || i == 15) + coeff[j] <<= 1; + + valid = (valid << 1) | (scale->tbl[i] >> BC_COEF); + } + + valid |= (scale->len << 24) | ((2 - scale->algo) << 31); + + for (i = 0; i < 2; i++) + (*PRP_RSZ_COEFF)[1 - ch][dir].coeff[i] = coeff[i]; + + (*PRP_RSZ_COEFF)[1 - ch][dir].cntl = valid; +} + +/*! + * @brief Setup PrP registers relevant to input. + * @param cfg Pointer to PrP configuration parameter + * @param prp_cntl Holds the value for PrP control register + * @return Zero on success, others on failure + */ +static int prphw_input_cfg(emma_prp_cfg * cfg, unsigned long *prp_cntl) +{ + unsigned long mask; + + switch (cfg->in_pix) { + case PRP_PIXIN_YUV420: + *prp_cntl |= PRP_CNTL_IN_YUV420; + mask = 0x7; + break; + case PRP_PIXIN_YUYV: + case PRP_PIXIN_YVYU: + case PRP_PIXIN_UYVY: + case PRP_PIXIN_VYUY: + *prp_cntl |= PRP_CNTL_IN_YUV422; + mask = 0x1; + break; + case PRP_PIXIN_RGB565: + *prp_cntl |= PRP_CNTL_IN_RGB16; + mask = 0x1; + break; + case PRP_PIXIN_RGB888: + *prp_cntl |= PRP_CNTL_IN_RGB32; + mask = 0; + break; + default: + pr_debug("Unsupported input pix format 0x%08X\n", cfg->in_pix); + return -1; + } + + /* align the input image width */ + if (cfg->in_width & mask) { + pr_debug("in_width misaligned. in_width=%d\n", cfg->in_width); + return -1; + } + + if ((cfg->in_width < PRP_MIN_IN_WIDTH) + || (cfg->in_width > PRP_MAX_IN_WIDTH)) { + pr_debug("Unsupported input width %d\n", cfg->in_width); + return -1; + } + + cfg->in_height &= ~1; /* truncate to make even */ + + if ((cfg->in_height < PRP_MIN_IN_HEIGHT) + || (cfg->in_height > PRP_MAX_IN_HEIGHT)) { + pr_debug("Unsupported input height %d\n", cfg->in_height); + return -1; + } + + if (!(cfg->in_csi & PRP_CSI_EN)) + if (!cfg->in_line_stride) + cfg->in_line_stride = cfg->in_width; + + __raw_writel(cfg->in_pix, PRP_SRC_PIXEL_FORMAT_CNTL); + __raw_writel((cfg->in_width << 16) | cfg->in_height, + PRP_SOURCE_FRAME_SIZE); + __raw_writel((cfg->in_line_skip << 16) | cfg->in_line_stride, + PRP_SOURCE_LINE_STRIDE); + + if (!(cfg->in_csi & PRP_CSI_EN)) { + __raw_writel(cfg->in_ptr, PRP_SOURCE_Y_PTR); + if (cfg->in_pix == PRP_PIXIN_YUV420) { + unsigned int size; + + size = cfg->in_line_stride * cfg->in_height; + __raw_writel(cfg->in_ptr + size, PRP_SOURCE_CB_PTR); + __raw_writel(cfg->in_ptr + size + (size >> 2), + PRP_SOURCE_CR_PTR); + } + } + + /* always cropping */ + *prp_cntl |= PRP_CNTL_WINEN; + + /* color space conversion */ + if (!cfg->in_csc[1]) { + if (cfg->in_csc[0] > 3) { + pr_debug("in_csc invalid 0x%X\n", cfg->in_csc[0]); + return -1; + } + if ((cfg->in_pix == PRP_PIXIN_RGB565) + || (cfg->in_pix == PRP_PIXIN_RGB888)) + cfg->in_csc[1] = 1; + else + cfg->in_csc[0] = 0; + csc_tbl(cfg->in_csc); + } + + __raw_writel((cfg->in_csc[0] << 21) | (cfg->in_csc[1] << 11) + | cfg->in_csc[2], PRP_CSC_COEF_012); + __raw_writel((cfg->in_csc[3] << 21) | (cfg->in_csc[4] << 11) + | cfg->in_csc[5], PRP_CSC_COEF_345); + __raw_writel((cfg->in_csc[6] << 21) | (cfg->in_csc[7] << 11) + | cfg->in_csc[8] | (cfg->in_csc[9] << 31), + PRP_CSC_COEF_678); + + if (cfg->in_csi & PRP_CSI_EN) { + *prp_cntl |= PRP_CNTL_CSI; + + /* loop mode enable, ch1 ch2 together */ + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) + *prp_cntl |= (PRP_CNTL_CH1_LOOP | PRP_CNTL_CH2_LOOP); + } + + return 0; +} + +/*! + * @brief Setup PrP registers relevant to channel 2. + * @param cfg Pointer to PrP configuration parameter + * @param prp_cntl Holds the value for PrP control register + * @return Zero on success, others on failure + */ +static int prphw_ch2_cfg(emma_prp_cfg * cfg, unsigned long *prp_cntl) +{ + switch (cfg->ch2_pix) { + case PRP_PIX2_YUV420: + *prp_cntl |= PRP_CNTL_CH2_YUV420; + break; + case PRP_PIX2_YUV422: + *prp_cntl |= PRP_CNTL_CH2_YUV422; + break; + case PRP_PIX2_YUV444: + *prp_cntl |= PRP_CNTL_CH2_YUV444; + break; + case PRP_PIX2_UNUSED: + return 0; + default: + pr_debug("Unsupported channel 2 pix format 0x%08X\n", + cfg->ch2_pix); + return -1; + } + + if (cfg->ch2_pix == PRP_PIX2_YUV420) { + cfg->ch2_height &= ~1; /* ensure U/V presence */ + cfg->ch2_width &= ~7; /* ensure U/V word aligned */ + } else if (cfg->ch2_pix == PRP_PIX2_YUV422) { + cfg->ch2_width &= ~1; /* word aligned */ + } + + __raw_writel((cfg->ch2_width << 16) | cfg->ch2_height, + PRP_CH2_OUT_IMAGE_SIZE); + + if (cfg->ch2_pix == PRP_PIX2_YUV420) { + u32 size; + + /* Luminanance band start address */ + __raw_writel(cfg->ch2_ptr, PRP_DEST_Y_PTR); + + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) { + if (!cfg->ch2_ptr2) + __raw_writel(cfg->ch2_ptr, PRP_SOURCE_Y_PTR); + else + __raw_writel(cfg->ch2_ptr2, PRP_SOURCE_Y_PTR); + } + + /* Cb and Cr band start address */ + size = cfg->ch2_width * cfg->ch2_height; + __raw_writel(cfg->ch2_ptr + size, PRP_DEST_CB_PTR); + __raw_writel(cfg->ch2_ptr + size + (size >> 2), + PRP_DEST_CR_PTR); + + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) { + if (!cfg->ch2_ptr2) { + __raw_writel(cfg->ch2_ptr + size, + PRP_SOURCE_CB_PTR); + __raw_writel(cfg->ch2_ptr + size + (size >> 2), + PRP_SOURCE_CR_PTR); + } else { + __raw_writel(cfg->ch2_ptr2 + size, + PRP_SOURCE_CB_PTR); + __raw_writel(cfg->ch2_ptr2 + size + (size >> 2), + PRP_SOURCE_CR_PTR); + } + } + } else { /* Pixel interleaved YUV422 or YUV444 */ + __raw_writel(cfg->ch2_ptr, PRP_DEST_Y_PTR); + + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) { + if (!cfg->ch2_ptr2) + __raw_writel(cfg->ch2_ptr, PRP_SOURCE_Y_PTR); + else + __raw_writel(cfg->ch2_ptr2, PRP_SOURCE_Y_PTR); + } + } + *prp_cntl |= PRP_CNTL_CH2B1 | PRP_CNTL_CH2B2; + + return 0; +} + +/*! + * @brief Setup PrP registers relevant to channel 1. + * @param cfg Pointer to PrP configuration parameter + * @param prp_cntl Holds the value for PrP control register + * @return Zero on success, others on failure + */ +static int prphw_ch1_cfg(emma_prp_cfg * cfg, unsigned long *prp_cntl) +{ + int ch1_bpp = 0; + + switch (cfg->ch1_pix) { + case PRP_PIX1_RGB332: + *prp_cntl |= PRP_CNTL_CH1_RGB8; + ch1_bpp = 1; + break; + case PRP_PIX1_RGB565: + *prp_cntl |= PRP_CNTL_CH1_RGB16; + ch1_bpp = 2; + break; + case PRP_PIX1_RGB888: + *prp_cntl |= PRP_CNTL_CH1_RGB32; + ch1_bpp = 4; + break; + case PRP_PIX1_YUYV: + case PRP_PIX1_YVYU: + case PRP_PIX1_UYVY: + case PRP_PIX1_VYUY: + *prp_cntl |= PRP_CNTL_CH1_YUV422; + ch1_bpp = 2; + break; + case PRP_PIX1_UNUSED: + return 0; + default: + pr_debug("Unsupported channel 1 pix format 0x%08X\n", + cfg->ch1_pix); + return -1; + } + + /* parallel or cascade resize */ + if (cfg->ch1_scale.algo & PRP_ALGO_BYPASS) + *prp_cntl |= PRP_CNTL_UNCHAIN; + + /* word align */ + if (ch1_bpp == 2) + cfg->ch1_width &= ~1; + else if (ch1_bpp == 1) + cfg->ch1_width &= ~3; + + if (!cfg->ch1_stride) + cfg->ch1_stride = cfg->ch1_width; + + __raw_writel(cfg->ch1_pix, PRP_CH1_PIXEL_FORMAT_CNTL); + __raw_writel((cfg->ch1_width << 16) | cfg->ch1_height, + PRP_CH1_OUT_IMAGE_SIZE); + __raw_writel(cfg->ch1_stride * ch1_bpp, PRP_CH1_LINE_STRIDE); + __raw_writel(cfg->ch1_ptr, PRP_DEST_RGB1_PTR); + + /* double buffer for loop mode */ + if ((cfg->in_csi & PRP_CSI_LOOP) == PRP_CSI_LOOP) { + if (cfg->ch1_ptr2) + __raw_writel(cfg->ch1_ptr2, PRP_DEST_RGB2_PTR); + else + __raw_writel(cfg->ch1_ptr, PRP_DEST_RGB2_PTR); + } + + return 0; +} + +/*! + * @brief Setup PrP registers. + * @param cfg Pointer to PrP configuration parameter + * @return Zero on success, others on failure + */ +int prphw_cfg(emma_prp_cfg * cfg) +{ + unsigned long prp_cntl = 0; + unsigned long val; + + /* input pixel format checking */ + if (prphw_input_cfg(cfg, &prp_cntl)) + return -1; + + if (prphw_ch2_cfg(cfg, &prp_cntl)) + return -1; + + if (prphw_ch1_cfg(cfg, &prp_cntl)) + return -1; + + /* register setting */ + __raw_writel(prp_cntl, PRP_CNTL); + + /* interrupt configuration */ + val = PRP_INTRCNTL_RDERR | PRP_INTRCNTL_LBOVF; + if (cfg->ch1_pix != PRP_PIX1_UNUSED) + val |= PRP_INTRCNTL_CH1FC | PRP_INTRCNTL_CH1WERR; + if (cfg->ch2_pix != PRP_PIX2_UNUSED) + val |= + PRP_INTRCNTL_CH2FC | PRP_INTRCNTL_CH2WERR | + PRP_INTRCNTL_CH2OVF; + __raw_writel(val, PRP_INTRCNTL); + + prp_set_scaler(1, 0, &cfg->scale[0]); /* Channel 1 width */ + prp_set_scaler(1, 1, &cfg->scale[1]); /* Channel 1 height */ + prp_set_scaler(0, 0, &cfg->scale[2]); /* Channel 2 width */ + prp_set_scaler(0, 1, &cfg->scale[3]); /* Channel 2 height */ + + return 0; +} + +/*! + * @brief Check PrP interrupt status. + * @return PrP interrupt status + */ +int prphw_isr(void) +{ + int status; + + status = __raw_readl(PRP_INTRSTATUS) & 0x1FF; + + if (status & (PRP_INTRSTAT_RDERR | PRP_INTRSTAT_CH1WERR | + PRP_INTRSTAT_CH2WERR)) + pr_debug("isr bus error. status= 0x%08X\n", status); + else if (status & PRP_INTRSTAT_CH2OVF) + pr_debug("isr ch 2 buffer overflow. status= 0x%08X\n", status); + else if (status & PRP_INTRSTAT_LBOVF) + pr_debug("isr line buffer overflow. status= 0x%08X\n", status); + + /* silicon bug?? enable bit does not self clear? */ + if (!(__raw_readl(PRP_CNTL) & PRP_CNTL_CH1_LOOP)) + __raw_writel(__raw_readl(PRP_CNTL) & (~PRP_CNTL_CH1EN), + PRP_CNTL); + if (!(__raw_readl(PRP_CNTL) & PRP_CNTL_CH2_LOOP)) + __raw_writel(__raw_readl(PRP_CNTL) & (~PRP_CNTL_CH2EN), + PRP_CNTL); + + __raw_writel(status, PRP_INTRSTATUS); /* clr irq */ + + return status; +} + +static struct clk *emma_clk; + +/*! + * @brief PrP module clock enable + */ +void prphw_init(void) +{ + emma_clk = clk_get(NULL, "emma_clk"); + clk_enable(emma_clk); +} + +/*! + * @brief PrP module clock disable + */ +void prphw_exit(void) +{ + clk_disable(emma_clk); + clk_put(emma_clk); +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mc521da.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mc521da.c @@ -0,0 +1,648 @@ +/* + * Copyright 2006-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc521da.c + * + * @brief MC521DA camera driver functions + * + * @ingroup Camera + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" + +#define MC521DA_I2C_ADDRESS 0x22 +#define MC521DA_TERM 0xFF + +typedef struct { + u16 width; + u16 height; +} mc521da_image_format; + +struct mc521da_reg { + u8 reg; + u8 val; +}; + +static sensor_interface *interface_param = NULL; + +static mc521da_image_format format[2] = { + { + .width = 1600, + .height = 1200, + }, + { + .width = 640, + .height = 480, + }, +}; + +const static struct mc521da_reg mc521da_initial[] = { + /*---------------------------------------------------------- + * Sensor Setting Start + *---------------------------------------------------------- + */ + {0xff, 0x01}, /* Sensor setting start */ + {0x01, 0x10}, /* Wavetable script, generated by waveman */ + {0x10, 0x64}, + {0x03, 0x00}, {0x04, 0x06}, {0x05, 0x30}, {0x06, 0x02}, {0x08, 0x00}, + {0x03, 0x01}, {0x04, 0x41}, {0x05, 0x70}, {0x06, 0x03}, {0x08, 0x00}, + {0x03, 0x02}, {0x04, 0x55}, {0x05, 0x30}, {0x06, 0x03}, {0x08, 0x00}, + {0x03, 0x03}, {0x04, 0x5A}, {0x05, 0x30}, {0x06, 0x02}, {0x08, 0x00}, + {0x03, 0x04}, {0x04, 0x7A}, {0x05, 0x30}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x05}, {0x04, 0x9C}, {0x05, 0x30}, {0x06, 0x0F}, {0x08, 0x00}, + {0x03, 0x06}, {0x04, 0x73}, {0x05, 0x31}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x07}, {0x04, 0x2D}, {0x05, 0x3B}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x08}, {0x04, 0x32}, {0x05, 0x33}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x09}, {0x04, 0x67}, {0x05, 0x63}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x0a}, {0x04, 0x6C}, {0x05, 0x23}, {0x06, 0x0E}, {0x08, 0x00}, + {0x03, 0x0b}, {0x04, 0x71}, {0x05, 0x23}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x0c}, {0x04, 0x30}, {0x05, 0x2F}, {0x06, 0x06}, {0x08, 0x00}, + {0x03, 0x0d}, {0x04, 0x00}, {0x05, 0x00}, {0x06, 0x06}, {0x08, 0x00}, + {0x07, 0x0e}, + + /* Start Address */ + {0x10, 0x64}, {0x14, 0x10}, {0x15, 0x00}, + + /* SYNC */ + {0x18, 0x40}, {0x19, 0x00}, {0x1A, 0x03}, {0x1B, 0x00}, + + /* X-Y Mirror */ + {0x11, 0x00}, {0xda, 0x00}, /* X mirror OFF, Y Mirror OFF */ + + /* Frame height */ + {0x1c, 0x13}, {0x1d, 0x04}, {0x0e, 0x4b}, {0x0f, 0x05}, + {0x9e, 0x04}, {0x9d, 0xc6}, {0xcc, 0x14}, {0xcd, 0x05}, + + /* Frame width */ + {0x0c, 0x35}, {0x0d, 0x07}, {0x9b, 0x10}, {0x9c, 0x07}, + {0x93, 0x21}, + + {0x01, 0x01}, {0x40, 0x00}, {0x41, 0x00}, {0x42, 0xf0}, + {0x43, 0x03}, {0x44, 0x0a}, {0x45, 0x00}, {0x3b, 0x40}, + {0x38, 0x18}, {0x3c, 0x00}, {0x20, 0x00}, {0x21, 0x01}, + {0x22, 0x00}, {0x23, 0x01}, {0x24, 0x00}, {0x25, 0x01}, + {0x26, 0x00}, {0x27, 0x01}, {0xb9, 0x04}, {0xb8, 0xc3}, + {0xbb, 0x04}, {0xba, 0xc3}, {0xbf, 0x04}, {0xbe, 0xc3}, + + /* Ramp */ + {0x57, 0x07}, {0x56, 0xd6}, {0x55, 0x03}, {0x54, 0x74}, + {0x9f, 0x99}, {0x94, 0x80}, {0x91, 0x78}, {0x92, 0x8b}, + + /* Output Mode */ + {0x52, 0x10}, {0x51, 0x00}, + + /* Analog Gain and Output driver */ + {0x28, 0x00}, {0xdd, 0x82}, {0xdb, 0x00}, {0xdc, 0x00}, + + /* Update */ + {0x00, 0x84}, + + /* PLL ADC clock = 75 MHz */ + {0xb5, 0x60}, {0xb4, 0x02}, {0xb5, 0x20}, + + /*----------------------------------------------*/ + /* ISP Setting Start */ + /*----------------------------------------------*/ + {0xff, 0x02}, + {0x01, 0xbd}, {0x02, 0xf8}, {0x03, 0x3a}, {0x04, 0x00}, {0x0e, 0x00}, + + /* Output mode */ + {0x88, 0x00}, {0x87, 0x11}, + + /* Threshold */ + {0xb6, 0x1b}, {0x0d, 0xc0}, {0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, + + /* Image Effect */ + {0x3f, 0x80}, {0x40, 0x00}, {0x41, 0x00}, {0x42, 0x80}, {0x43, 0x00}, + {0x44, 0x00}, {0x45, 0x00}, {0x46, 0x00}, {0x56, 0x80}, {0x57, 0x20}, + {0x58, 0x20}, {0x59, 0x02}, {0x5a, 0x00}, {0x5b, 0x78}, {0x5c, 0x7c}, + {0x5d, 0x84}, {0x5e, 0x85}, {0x5f, 0x78}, {0x60, 0x7e}, {0x61, 0x82}, + {0x62, 0x85}, {0x63, 0x00}, {0x64, 0x80}, {0x65, 0x00}, {0x66, 0x80}, + {0x67, 0x80}, {0x68, 0x80}, + + /* Auto Focus */ + {0x6e, 0x02}, {0x6f, 0xe5}, {0x70, 0x08}, {0x71, 0x01}, {0x72, 0x00}, + + /* Decimator */ + {0x78, 0xff}, {0x79, 0xff}, {0x7a, 0x70}, {0x7b, 0x00}, {0x7c, 0x00}, + {0x7d, 0x00}, {0x7e, 0xc8}, {0x7f, 0xc8}, {0x80, 0x96}, {0x81, 0x96}, + {0x82, 0x00}, {0x83, 0x00}, {0x84, 0x00}, {0x85, 0x00}, {0x86, 0x00}, + + /* Luminance Info */ + {0xf9, 0x20}, {0xb7, 0x7f}, {0xb8, 0x28}, {0xb9, 0x08}, + {0xf9, 0xa0}, {0xb7, 0x10}, {0xb9, 0x00}, + {0xf9, 0x40}, {0xb7, 0x7f}, {0xb8, 0x28}, {0xb9, 0x08}, + {0xf9, 0xc0}, {0xb7, 0x08}, {0xb9, 0x00}, + {0xf9, 0x60}, {0xb7, 0x7f}, {0xb8, 0x28}, {0xb9, 0x08}, + {0xf9, 0xe0}, {0xb7, 0x05}, {0xb9, 0x00}, + {0xf9, 0x00}, {0xb7, 0x03}, {0xb8, 0x2d}, {0xb9, 0xcd}, + {0xf9, 0x80}, {0xb7, 0x02}, {0xb9, 0x00}, + + /* AE */ + {0x8a, 0x00}, {0x89, 0xc0}, {0x8c, 0x32}, {0x8d, 0x96}, {0x8e, 0x25}, + {0x8f, 0x70}, {0x90, 0x12}, {0x91, 0x41}, {0x9e, 0x2e}, {0x9f, 0x2e}, + {0xa0, 0x0b}, {0xa1, 0x71}, {0xa2, 0xb0}, {0xa3, 0x09}, {0xa4, 0x89}, + {0xa5, 0x68}, {0xa6, 0x1a}, {0xa7, 0xb3}, {0xa8, 0xf0}, {0xa9, 0x19}, + {0xaa, 0x6a}, {0xab, 0x6b}, {0xac, 0x01}, {0xad, 0xe8}, {0xae, 0x48}, + {0xaf, 0x01}, {0xb0, 0x96}, {0xb1, 0xe6}, {0xb2, 0x03}, {0xb3, 0x00}, + {0xb4, 0x10}, {0xb5, 0x00}, {0xb6, 0x04}, {0xba, 0x44}, {0xbb, 0x3a}, + {0xbc, 0x01}, {0xbd, 0x08}, {0xbe, 0xa0}, {0xbf, 0x01}, {0xc0, 0x82}, + {0x8a, 0xe1}, {0x8b, 0x8c}, + + /* AWB */ + {0xc8, 0x00}, {0xc9, 0x00}, {0xca, 0x40}, {0xcb, 0xB0}, {0xcc, 0x40}, + {0xcd, 0xff}, {0xce, 0x19}, {0xcf, 0x40}, {0xd0, 0x01}, {0xd1, 0x43}, + {0xd2, 0x80}, {0xd3, 0x80}, {0xd4, 0xf1}, {0xdf, 0x00}, {0xe0, 0x8f}, + {0xe1, 0x8f}, {0xe2, 0x53}, {0xe3, 0x97}, {0xe4, 0x1f}, {0xe5, 0x3b}, + {0xe6, 0x9c}, {0xe7, 0x2e}, {0xe8, 0x03}, {0xe9, 0x02}, + + /* Neutral CCM */ + {0xfa, 0x00}, {0xd5, 0x3f}, {0xd6, 0x8c}, {0xd7, 0x43}, {0xd8, 0x08}, + {0xd9, 0x27}, {0xda, 0x7e}, {0xdb, 0x17}, {0xdc, 0x1a}, {0xdd, 0x47}, + {0xde, 0xa1}, + + /* Blue CCM */ + {0xfa, 0x01}, {0xd5, 0x3f}, {0xd6, 0x77}, {0xd7, 0x34}, {0xd8, 0x03}, + {0xd9, 0x18}, {0xda, 0x6e}, {0xdb, 0x16}, {0xdc, 0x0f}, {0xdd, 0x29}, + {0xde, 0x77}, + + /* Red CCM */ + {0xfa, 0x02}, {0xd5, 0x3f}, {0xd6, 0x7d}, {0xd7, 0x2f}, {0xd8, 0x0e}, + {0xd9, 0x1e}, {0xda, 0x76}, {0xdb, 0x18}, {0xdc, 0x29}, {0xdd, 0x51}, + {0xde, 0xba}, + + /* AWB */ + {0xea, 0x00}, {0xeb, 0x1a}, {0xc8, 0x33}, {0xc9, 0xc2}, + + {0xed, 0x02}, {0xee, 0x02}, + + /* AFD */ + {0xf0, 0x11}, {0xf1, 0x03}, {0xf2, 0x05}, {0xf5, 0x05}, {0xf6, 0x32}, + {0xf7, 0x32}, + + /* Lens Shading */ + {0xf9, 0x00}, {0x05, 0x04}, {0x06, 0xff}, {0x07, 0xf2}, {0x08, 0x00}, + {0x09, 0x00}, {0x0a, 0xf2}, {0x0b, 0xff}, {0x0c, 0xff}, + {0xf9, 0x01}, {0x05, 0x04}, {0x06, 0xff}, {0x07, 0x8b}, {0x08, 0x16}, + {0x09, 0x16}, {0x0a, 0x8b}, {0x0b, 0xff}, {0x0c, 0xe0}, + {0xf9, 0x02}, {0x05, 0x04}, {0x06, 0xff}, {0x07, 0x8b}, {0x08, 0x16}, + {0x09, 0x16}, {0x0a, 0x8b}, {0x0b, 0xff}, {0x0c, 0xe0}, + {0xf9, 0x03}, {0x05, 0x04}, {0x06, 0xff}, {0x07, 0x7c}, {0x08, 0x26}, + {0x09, 0x26}, {0x0a, 0x7c}, {0x0b, 0xd0}, {0x0c, 0xe0}, + {0xf9, 0x04}, {0x05, 0x0d}, {0x06, 0x40}, {0x07, 0xa0}, {0x08, 0x00}, + {0x09, 0x00}, {0x0a, 0xa0}, {0x0b, 0x40}, {0x0c, 0xe0}, + {0xf9, 0x05}, {0x05, 0x0d}, {0x06, 0x40}, {0x07, 0xa0}, {0x08, 0x00}, + {0x09, 0x00}, {0x0a, 0xa0}, {0x0b, 0x40}, {0x0c, 0xa0}, + {0xf9, 0x06}, {0x05, 0x0d}, {0x06, 0x40}, {0x07, 0xa0}, {0x08, 0x00}, + {0x09, 0x00}, {0x0a, 0xa0}, {0x0b, 0x40}, {0x0c, 0xa0}, + {0xf9, 0x07}, {0x05, 0x0d}, {0x06, 0x40}, {0x07, 0xa0}, {0x08, 0x00}, + {0x09, 0x00}, {0x0a, 0xa0}, {0x0b, 0x40}, {0x0c, 0xa0}, + + /* Edge setting */ + {0x73, 0x68}, {0x74, 0x40}, {0x75, 0x00}, {0x76, 0xff}, {0x77, 0x80}, + {0x4f, 0x80}, {0x50, 0x82}, {0x51, 0x82}, {0x52, 0x08}, + + /* Interpolation Setting */ + {0x23, 0x7f}, {0x22, 0x08}, {0x18, 0xff}, {0x19, 0x00}, + {0x40, 0x00}, {0x53, 0xff}, {0x54, 0x0a}, {0x55, 0xc2}, + {0x1b, 0x18}, + + {0xfa, 0x00}, {0x15, 0x0c}, {0x22, 0x00}, {0x0e, 0xef}, {0x1f, 0x1d}, + {0x20, 0x2d}, {0x1c, 0x01}, {0x1d, 0x02}, {0x1e, 0x03}, {0x0e, 0xee}, + {0x12, 0x10}, {0x16, 0x10}, {0x17, 0x02}, {0x1a, 0x01}, + {0xfa, 0x04}, {0x0e, 0xef}, {0x1c, 0x01}, {0x1d, 0x02}, {0x1e, 0x03}, + {0x1f, 0x11}, {0x20, 0x11}, {0x0e, 0xee}, {0x12, 0x03}, {0x16, 0x10}, + {0x17, 0x02}, {0x1a, 0xee}, + {0xfa, 0x08}, {0x0e, 0xef}, {0x1c, 0x01}, {0x1d, 0x02}, {0x1e, 0x03}, + {0x1f, 0x00}, {0x20, 0x00}, {0x0e, 0xee}, {0x12, 0x03}, {0x16, 0x10}, + {0x17, 0x02}, {0x1a, 0x22}, + + /* Gamma Correction */ + {0x27, 0x62}, {0x28, 0x00}, {0x27, 0x62}, {0x28, 0x00}, {0x29, 0x00}, + {0x2a, 0x00}, {0x2f, 0x03}, {0x30, 0x10}, {0x31, 0x2b}, {0x32, 0x50}, + {0x33, 0x70}, {0x34, 0x90}, {0x35, 0xB0}, {0x36, 0xD0}, {0x37, 0x00}, + {0x38, 0x18}, {0x39, 0x57}, {0x3a, 0x89}, {0x3b, 0xac}, {0x3c, 0xc9}, + {0x3d, 0xde}, {0x3e, 0xef}, {0x2b, 0x00}, {0x2c, 0x00}, {0x2d, 0x40}, + {0x2e, 0xab}, + + /* Contrast */ + {0x47, 0x10}, {0x48, 0x1f}, {0x49, 0xe3}, {0x4a, 0xf0}, {0x4b, 0x08}, + {0x4c, 0x14}, {0x4d, 0xe9}, {0x4e, 0xf5}, {0x98, 0x8a}, + + {0xfa, 0x00}, + {MC521DA_TERM, MC521DA_TERM} +}; + +static int mc521da_attach(struct i2c_adapter *adapter); +static int mc521da_detach(struct i2c_client *client); + +static struct i2c_driver mc521da_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "MC521DA Client", + }, + .attach_adapter = mc521da_attach, + .detach_client = mc521da_detach, +}; + +static struct i2c_client mc521da_i2c_client = { + .name = "MC521DA I2C dev", + .addr = MC521DA_I2C_ADDRESS, + .driver = &mc521da_i2c_driver, +}; + +static inline int mc521da_read_reg(u8 reg) +{ + return i2c_smbus_read_byte_data(&mc521da_i2c_client, reg); +} + +static inline int mc521da_write_reg(u8 reg, u8 val) +{ + return i2c_smbus_write_byte_data(&mc521da_i2c_client, reg, val); +} + +static int mc521da_write_regs(const struct mc521da_reg reglist[]) +{ + int err; + const struct mc521da_reg *next = reglist; + + while (!((next->reg == MC521DA_TERM) && (next->val == MC521DA_TERM))) { + err = mc521da_write_reg(next->reg, next->val); + if (err) { + return err; + } + next++; + } + return 0; +} + +/*! + * mc521da sensor downscale function + * @param downscale bool + * @return Error code indicating success or failure + */ +static u8 mc521da_sensor_downscale(bool downscale) +{ + u8 data; + u32 i = 0; + + if (downscale == true) { + // VGA + mc521da_write_reg(0xff, 0x01); + + mc521da_write_reg(0x52, 0x30); + mc521da_write_reg(0x51, 0x00); + + mc521da_write_reg(0xda, 0x01); + mc521da_write_reg(0x00, 0x8C); + + /* Wait for changes to take effect */ + while (i < 256) { + i++; + data = mc521da_read_reg(0x00); + if ((data & 0x80) == 0) + break; + msleep(5); + } + + /* ISP */ + mc521da_write_reg(0xff, 0x02); + + mc521da_write_reg(0x03, 0x3b); /* Enable Decimator */ + + mc521da_write_reg(0x7a, 0x74); + mc521da_write_reg(0x7b, 0x01); + mc521da_write_reg(0x7e, 0x50); + mc521da_write_reg(0x7f, 0x50); + mc521da_write_reg(0x80, 0x3c); + mc521da_write_reg(0x81, 0x3c); + } else { + //UXGA + mc521da_write_reg(0xff, 0x01); + mc521da_write_reg(0x52, 0x10); + mc521da_write_reg(0x51, 0x00); + mc521da_write_reg(0xda, 0x00); + + /* update */ + mc521da_write_reg(0x00, 0x84); + + /* Wait for changes to take effect */ + while (i < 256) { + i++; + data = mc521da_read_reg(0x00); + if ((data & 0x80) == 0) + break; + msleep(5); + } + + /* ISP */ + mc521da_write_reg(0xff, 0x02); + + mc521da_write_reg(0x03, 0x3a); + + mc521da_write_reg(0x7a, 0x70); + mc521da_write_reg(0x7b, 0x00); + mc521da_write_reg(0x7e, 0xc8); + mc521da_write_reg(0x7f, 0xc8); + mc521da_write_reg(0x80, 0x96); + mc521da_write_reg(0x81, 0x96); + } + + return 0; +} + +/*! + * mc521da sensor interface Initialization + * @param param sensor_interface * + * @param width u32 + * @param height u32 + * @return None + */ +static void mc521da_interface(sensor_interface * param, u32 width, u32 height) +{ + param->clk_mode = 0x0; //gated + param->pixclk_pol = 0x0; + param->data_width = 0x1; + param->data_pol = 0x0; + param->ext_vsync = 0x0; + param->Vsync_pol = 0x0; + param->Hsync_pol = 0x0; + param->width = width - 1; + param->height = height - 1; + param->active_width = width; + param->active_height = height; + param->pixel_fmt = IPU_PIX_FMT_UYVY; +} + +extern void gpio_sensor_reset(bool flag); + +/*! + * mc521da Reset function + * + * @return None + */ +static sensor_interface *mc521da_reset(void) +{ + if (interface_param == NULL) + return NULL; + + mc521da_interface(interface_param, format[1].width, format[1].height); + set_mclk_rate(&interface_param->mclk); + + gpio_sensor_reset(true); + msleep(10); + gpio_sensor_reset(false); + msleep(50); + + return interface_param; +} + +/*! + * mc521da sensor configuration + * + * @param frame_rate int * + * @param high_quality int + * @return sensor_interface * + */ +static sensor_interface *mc521da_config(int *frame_rate, int high_quality) +{ + int num_clock_per_row, err; + int max_rate = 0; + int index = 1; + u16 frame_height; + + if (high_quality == 1) + index = 0; + + err = mc521da_write_regs(mc521da_initial); + if (err) { + /* Reduce the MCLK */ + interface_param->mclk = 20000000; + mc521da_reset(); + + printk(KERN_INFO "mc521da: mclk reduced\n"); + mc521da_write_regs(mc521da_initial); + } + + mc521da_interface(interface_param, format[index].width, + format[index].height); + + if (index == 0) { + mc521da_sensor_downscale(false); + } else { + mc521da_sensor_downscale(true); + } + + num_clock_per_row = 1845; + max_rate = interface_param->mclk * 3 * (index + 1) + / (2 * num_clock_per_row * 1300); + + if ((*frame_rate > max_rate) || (*frame_rate == 0)) { + *frame_rate = max_rate; + } + + frame_height = 1300 * max_rate / (*frame_rate); + + *frame_rate = interface_param->mclk * 3 * (index + 1) + / (2 * num_clock_per_row * frame_height); + + mc521da_write_reg(0xff, 0x01); + mc521da_write_reg(0xE, frame_height & 0xFF); + mc521da_write_reg(0xF, (frame_height & 0xFF00) >> 8); + mc521da_write_reg(0xCC, frame_height & 0xFF); + mc521da_write_reg(0xCD, (frame_height & 0xFF00) >> 8); + + return interface_param; +} + +/*! + * mc521da sensor set color configuration + * + * @param bright int + * @param saturation int + * @param red int + * @param green int + * @param blue int + * @return None + */ +static void +mc521da_set_color(int bright, int saturation, int red, int green, int blue) +{ + /* Select ISP */ + mc521da_write_reg(0xff, 0x02); + + mc521da_write_reg(0x41, bright); + mc521da_write_reg(0xca, red); + mc521da_write_reg(0xcb, green); + mc521da_write_reg(0xcc, blue); +} + +/*! + * mc521da sensor get color configuration + * + * @param bright int * + * @param saturation int * + * @param red int * + * @param green int * + * @param blue int * + * @return None + */ +static void +mc521da_get_color(int *bright, int *saturation, int *red, int *green, int *blue) +{ + *saturation = 0; + + /* Select ISP */ + mc521da_write_reg(0xff, 0x02); + + *bright = mc521da_read_reg(0x41); + *red = mc521da_read_reg(0xCA); + *green = mc521da_read_reg(0xCB); + *blue = mc521da_read_reg(0xCC); +} + +struct camera_sensor camera_sensor_if = { + set_color:mc521da_set_color, + get_color:mc521da_get_color, + config:mc521da_config, + reset:mc521da_reset, +}; + +/*! + * mc521da I2C detect_client function + * + * @param adapter struct i2c_adapter * + * @param address int + * @param kind int + * + * @return Error code indicating success or failure + */ +static int mc521da_detect_client(struct i2c_adapter *adapter, int address, + int kind) +{ + mc521da_i2c_client.adapter = adapter; + if (i2c_attach_client(&mc521da_i2c_client)) { + mc521da_i2c_client.adapter = NULL; + printk(KERN_ERR "mc521da_attach: i2c_attach_client failed\n"); + return -1; + } + + interface_param = (sensor_interface *) + kmalloc(sizeof(sensor_interface), GFP_KERNEL); + if (!interface_param) { + printk(KERN_ERR "mc521da_attach: kmalloc failed \n"); + return -1; + } + + interface_param->mclk = 25000000; + + printk(KERN_INFO "mc521da Detected\n"); + + return 0; +} + +static unsigned short normal_i2c[] = { MC521DA_I2C_ADDRESS, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static int mc521da_attach(struct i2c_adapter *adap) +{ + uint32_t mclk = 25000000; + struct clk *clk; + int err; + + clk = clk_get(NULL, "csi_clk"); + clk_enable(clk); + set_mclk_rate(&mclk); + + gpio_sensor_reset(true); + msleep(10); + gpio_sensor_reset(false); + msleep(100); + + err = i2c_probe(adap, &addr_data, &mc521da_detect_client); + + clk_disable(clk); + clk_put(clk); + + return err; +} + +/*! + * mc521da I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int mc521da_detach(struct i2c_client *client) +{ + int err; + + if (!mc521da_i2c_client.adapter) + return -1; + + err = i2c_detach_client(&mc521da_i2c_client); + mc521da_i2c_client.adapter = NULL; + + if (interface_param) + kfree(interface_param); + interface_param = NULL; + + return err; +} + +extern void gpio_sensor_active(void); +extern void gpio_sensor_inactive(void); + +/*! + * mc521da init function + * + * @return Error code indicating success or failure + */ +static __init int mc521da_init(void) +{ + gpio_sensor_active(); + return i2c_add_driver(&mc521da_i2c_driver); +} + +/*! + * mc521da cleanup function + * + * @return Error code indicating success or failure + */ +static void __exit mc521da_clean(void) +{ + i2c_del_driver(&mc521da_i2c_driver); + gpio_sensor_inactive(); +} + +module_init(mc521da_init); +module_exit(mc521da_clean); + +/* Exported symbols for modules. */ +EXPORT_SYMBOL(camera_sensor_if); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC521DA Camera Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ov2640.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ov2640.c @@ -0,0 +1,1081 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ov2640.c + * + * @brief ov2640 camera driver functions + * + * @ingroup Camera + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "mxc_v4l2_capture.h" + +#define MIN_FPS 5 +#define MAX_FPS 30 +#define DEFAULT_FPS 30 + +#define OV2640_XCLK_MIN 6000000 +#define OV2640_XCLK_MAX 27000000 + +/* +enum ov2640_mode { + ov2640_mode_1600_1120, + ov2640_mode_800_600 +}; +*/ + +struct reg_value { + u8 reg; + u8 value; + int delay_ms; +}; + +static struct reg_value ov2640_setting_1600_1120[] = { +#ifdef CONFIG_MACH_MX25_3DS + {0xff, 0x01, 0}, {0x12, 0x80, 5}, {0xff, 0x00, 0}, {0x2c, 0xff, 0}, + {0x2e, 0xdf, 0}, {0xff, 0x01, 0}, {0x3c, 0x32, 0}, {0x11, 0x00, 0}, + {0x09, 0x02, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, {0x14, 0x48, 0}, + {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, {0x3b, 0xfb, 0}, + {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, {0x39, 0x02, 0}, + {0x35, 0x58, 0}, {0x22, 0x0a, 0}, {0x37, 0x40, 0}, {0x23, 0x00, 0}, + {0x34, 0xa0, 0}, {0x36, 0x1a, 0}, {0x06, 0x02, 0}, {0x07, 0xc0, 0}, + {0x0d, 0xb7, 0}, {0x0e, 0x01, 0}, {0x4c, 0x00, 0}, {0x4a, 0x81, 0}, + {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, {0x26, 0x82, 0}, + {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x3f, 0}, {0x61, 0x70, 0}, + {0x62, 0x80, 0}, {0x7c, 0x05, 0}, {0x20, 0x80, 0}, {0x28, 0x30, 0}, + {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, {0x6e, 0x00, 0}, {0x70, 0x02, 0}, + {0x71, 0x94, 0}, {0x73, 0xc1, 0}, {0x3d, 0x34, 0}, {0x5a, 0x57, 0}, + {0x4f, 0xbb, 0}, {0x50, 0x9c, 0}, {0xff, 0x00, 0}, {0xe5, 0x7f, 0}, + {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0xe0, 0x14, 0}, {0x76, 0xff, 0}, + {0x33, 0xa0, 0}, {0x42, 0x20, 0}, {0x43, 0x18, 0}, {0x4c, 0x00, 0}, + {0x87, 0xd0, 0}, {0x88, 0x3f, 0}, {0xd7, 0x01, 0}, {0xd9, 0x10, 0}, + {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, {0xc9, 0x80, 0}, {0x7c, 0x00, 0}, + {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, {0x7d, 0x48, 0}, {0x7d, 0x48, 0}, + {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, {0x7d, 0x10, 0}, {0x7d, 0x0e, 0}, + {0x90, 0x00, 0}, {0x91, 0x0e, 0}, {0x91, 0x1a, 0}, {0x91, 0x31, 0}, + {0x91, 0x5a, 0}, {0x91, 0x69, 0}, {0x91, 0x75, 0}, {0x91, 0x7e, 0}, + {0x91, 0x88, 0}, {0x91, 0x8f, 0}, {0x91, 0x96, 0}, {0x91, 0xa3, 0}, + {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, {0x91, 0xd7, 0}, {0x91, 0xe8, 0}, + {0x91, 0x20, 0}, {0x92, 0x00, 0}, {0x93, 0x06, 0}, {0x93, 0xe3, 0}, + {0x93, 0x05, 0}, {0x93, 0x05, 0}, {0x93, 0x00, 0}, {0x93, 0x04, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x96, 0x00, 0}, + {0x97, 0x08, 0}, {0x97, 0x19, 0}, {0x97, 0x02, 0}, {0x97, 0x0c, 0}, + {0x97, 0x24, 0}, {0x97, 0x30, 0}, {0x97, 0x28, 0}, {0x97, 0x26, 0}, + {0x97, 0x02, 0}, {0x97, 0x98, 0}, {0x97, 0x80, 0}, {0x97, 0x00, 0}, + {0x97, 0x00, 0}, {0xc3, 0xed, 0}, {0xa4, 0x00, 0}, {0xa8, 0x00, 0}, + {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, {0xc7, 0x10, 0}, + {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, {0xb9, 0x7c, 0}, + {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, {0xb0, 0xc5, 0}, + {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, {0xc0, 0xc8, 0}, + {0xc1, 0x96, 0}, {0x86, 0x1d, 0}, {0x50, 0x00, 0}, {0x51, 0x90, 0}, + {0x52, 0x2c, 0}, {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x88, 0}, + {0x57, 0x00, 0}, {0x5a, 0x90, 0}, {0x5b, 0x2c, 0}, {0x5c, 0x05, 0}, + {0xc3, 0xed, 0}, {0x7f, 0x00, 0}, {0xda, 0x00, 0}, {0xe5, 0x1f, 0}, + {0xe1, 0x77, 0}, {0xe0, 0x00, 0}, {0xdd, 0x7f, 0}, {0x05, 0x00, 0}, + {0xff, 0x00, 0}, {0xe0, 0x04, 0}, {0xc0, 0xc8, 0}, {0xc1, 0x96, 0}, + {0x86, 0x3d, 0}, {0x50, 0x00, 0}, {0x51, 0x90, 0}, {0x52, 0x2c, 0}, + {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x88, 0}, {0x57, 0x00, 0}, + {0x5a, 0x40, 0}, {0x5b, 0xf0, 0}, {0x5c, 0x01, 0}, {0xd3, 0x82, 0}, + {0xe0, 0x00, 1000} +#else + {0xff, 0x1, 0}, {0x12, 0x80, 1}, {0xff, 0, 0}, {0x2c, 0xff, 0}, + {0x2e, 0xdf, 0}, {0xff, 0x1, 0}, {0x3c, 0x32, 0}, {0x11, 0x01, 0}, + {0x09, 0x00, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, {0x14, 0x48, 0}, + {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, {0x3b, 0xfb, 0}, + {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, {0x39, 0x82, 0}, + {0x35, 0x88, 0}, {0x22, 0x0a, 0}, {0x37, 0x40, 0}, {0x23, 0x00, 0}, + {0x34, 0xa0, 0}, {0x36, 0x1a, 0}, {0x06, 0x02, 0}, {0x07, 0xc0, 0}, + {0x0d, 0xb7, 0}, {0x0e, 0x01, 0}, {0x4c, 0x00, 0}, {0x4a, 0x81, 0}, + {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, {0x26, 0x82, 0}, + {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x3f, 0}, {0x0c, 0x3c, 0}, + {0x5d, 0x55, 0}, {0x5e, 0x7d, 0}, {0x5f, 0x7d, 0}, {0x60, 0x55, 0}, + {0x61, 0x70, 0}, {0x62, 0x80, 0}, {0x7c, 0x05, 0}, {0x20, 0x80, 0}, + {0x28, 0x30, 0}, {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, {0x6e, 00, 0}, + {0x70, 0x02, 0}, {0x71, 0x94, 0}, {0x73, 0xc1, 0}, {0x3d, 0x34, 0}, + {0x5a, 0x57, 0}, {0x4f, 0xbb, 0}, {0x50, 0x9c, 0}, {0xff, 0x00, 0}, + {0xe5, 0x7f, 0}, {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0x44, 0x06, 0}, + {0xe0, 0x14, 0}, {0x76, 0xff, 0}, {0x33, 0xa0, 0}, {0x42, 0x20, 0}, + {0x43, 0x18, 0}, {0x4c, 0x00, 0}, {0x87, 0xd0, 0}, {0xd7, 0x03, 0}, + {0xd9, 0x10, 0}, {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, {0xc9, 0x80, 0}, + {0x7c, 0x00, 0}, {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, {0x7d, 0x48, 0}, + {0x7d, 0x48, 0}, {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, {0x7d, 0x10, 0}, + {0x7d, 0x0e, 0}, {0x90, 0x00, 0}, {0x91, 0x0e, 0}, {0x91, 0x1a, 0}, + {0x91, 0x31, 0}, {0x91, 0x5a, 0}, {0x91, 0x69, 0}, {0x91, 0x75, 0}, + {0x91, 0x7e, 0}, {0x91, 0x88, 0}, {0x91, 0x8f, 0}, {0x91, 0x96, 0}, + {0x91, 0xa3, 0}, {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, {0x91, 0xd7, 0}, + {0x91, 0xe8, 0}, {0x91, 0x20, 0}, {0x92, 0x00, 0}, {0x93, 0x06, 0}, + {0x93, 0xe3, 0}, {0x93, 0x03, 0}, {0x93, 0x03, 0}, {0x93, 0x00, 0}, + {0x93, 0x02, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x96, 0x00, 0}, {0x97, 0x08, 0}, {0x97, 0x19, 0}, {0x97, 0x02, 0}, + {0x97, 0x0c, 0}, {0x97, 0x24, 0}, {0x97, 0x30, 0}, {0x97, 0x28, 0}, + {0x97, 0x26, 0}, {0x97, 0x02, 0}, {0x97, 0x98, 0}, {0x97, 0x80, 0}, + {0x97, 0x00, 0}, {0x97, 0x00, 0}, {0xa4, 0x00, 0}, {0xa8, 0x00, 0}, + {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, {0xc7, 0x10, 0}, + {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, {0xb9, 0x7c, 0}, + {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, {0xb0, 0xc5, 0}, + {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, {0xa6, 0x00, 0}, + {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x1b, 0}, {0xa7, 0x31, 0}, + {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, + {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, + {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, + {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xc0, 0xc8, 0}, {0xc1, 0x96, 0}, + {0x86, 0x3d, 0}, {0x50, 0x00, 0}, {0x51, 0x90, 0}, {0x52, 0x18, 0}, + {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x88, 0}, {0x57, 0x00, 0}, + {0x5a, 0x90, 0}, {0x5b, 0x18, 0}, {0x5c, 0x05, 0}, {0xc3, 0xef, 0}, + {0x7f, 0x00, 0}, {0xda, 0x01, 0}, {0xe5, 0x1f, 0}, {0xe1, 0x67, 0}, + {0xe0, 0x00, 0}, {0xdd, 0x7f, 0}, {0x05, 0x00, 0} +#endif +}; + +static struct reg_value ov2640_setting_800_600[] = { +#ifdef CONFIG_MACH_MX25_3DS + {0xff, 0x01, 0}, {0x12, 0x80, 5}, {0xff, 0x00, 0}, {0x2c, 0xff, 0}, + {0x2e, 0xdf, 0}, {0xff, 0x01, 0}, {0x3c, 0x32, 0}, {0x11, 0x00, 0}, + {0x09, 0x02, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, {0x14, 0x48, 0}, + {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, {0x3b, 0xfb, 0}, + {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, {0x39, 0x92, 0}, + {0x35, 0xda, 0}, {0x22, 0x1a, 0}, {0x37, 0xc3, 0}, {0x23, 0x00, 0}, + {0x34, 0xc0, 0}, {0x36, 0x1a, 0}, {0x06, 0x88, 0}, {0x07, 0xc0, 0}, + {0x0d, 0x87, 0}, {0x0e, 0x41, 0}, {0x4c, 0x00, 0}, + {0x48, 0x00, 0}, {0x5b, 0x00, 0}, {0x42, 0x03, 0}, {0x4a, 0x81, 0}, + {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, {0x26, 0x82, 0}, + {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x22, 0}, {0x0c, 0x3c, 0}, + {0x61, 0x70, 0}, {0x62, 0x80, 0}, {0x7c, 0x05, 0}, {0x20, 0x80, 0}, + {0x28, 0x30, 0}, {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, {0x6e, 0x00, 0}, + {0x70, 0x02, 0}, {0x71, 0x94, 0}, {0x73, 0xc1, 0}, {0x12, 0x40, 0}, + {0x17, 0x11, 0}, {0x18, 0x43, 0}, {0x19, 0x00, 0}, {0x1a, 0x4b, 0}, + {0x32, 0x09, 0}, {0x37, 0xc0, 0}, {0x4f, 0xca, 0}, {0x50, 0xa8, 0}, + {0x5a, 0x23, 0}, {0x6d, 0x00, 0}, {0x3d, 0x38, 0}, {0xff, 0x00, 0}, + {0xe5, 0x7f, 0}, {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0xe0, 0x14, 0}, + {0x76, 0xff, 0}, {0x33, 0xa0, 0}, {0x42, 0x20, 0}, {0x43, 0x18, 0}, + {0x4c, 0x00, 0}, {0x87, 0xd5, 0}, {0x88, 0x3f, 0}, {0xd7, 0x01, 0}, + {0xd9, 0x10, 0}, {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, {0xc9, 0x80, 0}, + {0x7c, 0x00, 0}, {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, {0x7d, 0x48, 0}, + {0x7d, 0x48, 0}, {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, {0x7d, 0x10, 0}, + {0x7d, 0x0e, 0}, {0x90, 0x00, 0}, {0x91, 0x0e, 0}, {0x91, 0x1a, 0}, + {0x91, 0x31, 0}, {0x91, 0x5a, 0}, {0x91, 0x69, 0}, {0x91, 0x75, 0}, + {0x91, 0x7e, 0}, {0x91, 0x88, 0}, {0x91, 0x8f, 0}, {0x91, 0x96, 0}, + {0x91, 0xa3, 0}, {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, {0x91, 0xd7, 0}, + {0x91, 0xe8, 0}, {0x91, 0x20, 0}, {0x92, 0x00, 0}, {0x93, 0x06, 0}, + {0x93, 0xe3, 0}, {0x93, 0x05, 0}, {0x93, 0x05, 0}, {0x93, 0x00, 0}, + {0x93, 0x04, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x96, 0x00, 0}, {0x97, 0x08, 0}, {0x97, 0x19, 0}, {0x97, 0x02, 0}, + {0x97, 0x0c, 0}, {0x97, 0x24, 0}, {0x97, 0x30, 0}, {0x97, 0x28, 0}, + {0x97, 0x26, 0}, {0x97, 0x02, 0}, {0x97, 0x98, 0}, {0x97, 0x80, 0}, + {0x97, 0x00, 0}, {0x97, 0x00, 0}, {0xc3, 0xed, 0}, {0xa4, 0x00, 0}, + {0xa8, 0x00, 0}, {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, + {0xc7, 0x10, 0}, {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, + {0xb9, 0x7c, 0}, {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, + {0xb0, 0xc5, 0}, {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, + {0xc0, 0x64, 0}, {0xc1, 0x4b, 0}, {0x8c, 0x00, 0}, {0x86, 0x3d, 0}, + {0x50, 0x00, 0}, {0x51, 0xc8, 0}, {0x52, 0x96, 0}, {0x53, 0x00, 0}, + {0x54, 0x00, 0}, {0x55, 0x00, 0}, {0x5a, 0xc8, 0}, {0x5b, 0x96, 0}, + {0x5c, 0x00, 0}, {0xd3, 0x82, 0}, {0xc3, 0xed, 0}, {0x7f, 0x00, 0}, + {0xda, 0x00, 0}, {0xe5, 0x1f, 0}, {0xe1, 0x67, 0}, {0xe0, 0x00, 0}, + {0xdd, 0x7f, 0}, {0x05, 0x00, 0}, {0xff, 0x00, 0}, {0xe0, 0x04, 0}, + {0xc0, 0x64, 0}, {0xc1, 0x4b, 0}, {0x8c, 0x00, 0}, {0x86, 0x3d, 0}, + {0x50, 0x00, 0}, {0x51, 0xc8, 0}, {0x52, 0x96, 0}, {0x53, 0x00, 0}, + {0x54, 0x00, 0}, {0x55, 0x00, 0}, {0x5a, 0xa0, 0}, {0x5b, 0x78, 0}, + {0x5c, 0x00, 0}, {0xd3, 0x82, 0}, {0xe0, 0x00, 1000} +#else + {0xff, 0, 0}, {0xff, 1, 0}, {0x12, 0x80, 1}, {0xff, 00, 0}, + {0x2c, 0xff, 0}, {0x2e, 0xdf, 0}, {0xff, 0x1, 0}, {0x3c, 0x32, 0}, + {0x11, 0x01, 0}, {0x09, 0x00, 0}, {0x04, 0x28, 0}, {0x13, 0xe5, 0}, + {0x14, 0x48, 0}, {0x2c, 0x0c, 0}, {0x33, 0x78, 0}, {0x3a, 0x33, 0}, + {0x3b, 0xfb, 0}, {0x3e, 0x00, 0}, {0x43, 0x11, 0}, {0x16, 0x10, 0}, + {0x39, 0x92, 0}, {0x35, 0xda, 0}, {0x22, 0x1a, 0}, {0x37, 0xc3, 0}, + {0x23, 0x00, 0}, {0x34, 0xc0, 0}, {0x36, 0x1a, 0}, {0x06, 0x88, 0}, + {0x07, 0xc0, 0}, {0x0d, 0x87, 0}, {0x0e, 0x41, 0}, {0x4c, 0x00, 0}, + {0x4a, 0x81, 0}, {0x21, 0x99, 0}, {0x24, 0x40, 0}, {0x25, 0x38, 0}, + {0x26, 0x82, 0}, {0x5c, 0x00, 0}, {0x63, 0x00, 0}, {0x46, 0x22, 0}, + {0x0c, 0x3c, 0}, {0x5d, 0x55, 0}, {0x5e, 0x7d, 0}, {0x5f, 0x7d, 0}, + {0x60, 0x55, 0}, {0x61, 0x70, 0}, {0x62, 0x80, 0}, {0x7c, 0x05, 0}, + {0x20, 0x80, 0}, {0x28, 0x30, 0}, {0x6c, 0x00, 0}, {0x6d, 0x80, 0}, + {0x6e, 00, 0}, {0x70, 0x02, 0}, {0x71, 0x94, 0}, {0x73, 0xc1, 0}, + {0x12, 0x40, 0}, {0x17, 0x11, 0}, {0x18, 0x43, 0}, {0x19, 0x00, 0}, + {0x1a, 0x4b, 0}, {0x32, 0x09, 0}, {0x37, 0xc0, 0}, {0x4f, 0xca, 0}, + {0x50, 0xa8, 0}, {0x6d, 0x00, 0}, {0x3d, 0x38, 0}, {0xff, 0x00, 0}, + {0xe5, 0x7f, 0}, {0xf9, 0xc0, 0}, {0x41, 0x24, 0}, {0x44, 0x06, 0}, + {0xe0, 0x14, 0}, {0x76, 0xff, 0}, {0x33, 0xa0, 0}, {0x42, 0x20, 0}, + {0x43, 0x18, 0}, {0x4c, 0x00, 0}, {0x87, 0xd0, 0}, {0x88, 0x3f, 0}, + {0xd7, 0x03, 0}, {0xd9, 0x10, 0}, {0xd3, 0x82, 0}, {0xc8, 0x08, 0}, + {0xc9, 0x80, 0}, {0x7c, 0x00, 0}, {0x7d, 0x00, 0}, {0x7c, 0x03, 0}, + {0x7d, 0x48, 0}, {0x7d, 0x48, 0}, {0x7c, 0x08, 0}, {0x7d, 0x20, 0}, + {0x7d, 0x10, 0}, {0x7d, 0x0e, 0}, {0x90, 0x00, 0}, {0x91, 0x0e, 0}, + {0x91, 0x1a, 0}, {0x91, 0x31, 0}, {0x91, 0x5a, 0}, {0x91, 0x69, 0}, + {0x91, 0x75, 0}, {0x91, 0x7e, 0}, {0x91, 0x88, 0}, {0x91, 0x8f, 0}, + {0x91, 0x96, 0}, {0x91, 0xa3, 0}, {0x91, 0xaf, 0}, {0x91, 0xc4, 0}, + {0x91, 0xd7, 0}, {0x91, 0xe8, 0}, {0x91, 0x20, 0}, {0x92, 0x00, 0}, + {0x93, 0x06, 0}, {0x93, 0xe3, 0}, {0x93, 0x03, 0}, {0x93, 0x03, 0}, + {0x93, 0x00, 0}, {0x93, 0x02, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, {0x93, 0x00, 0}, + {0x93, 0x00, 0}, {0x96, 0x00, 0}, {0x97, 0x08, 0}, {0x97, 0x19, 0}, + {0x97, 0x02, 0}, {0x97, 0x0c, 0}, {0x97, 0x24, 0}, {0x97, 0x30, 0}, + {0x97, 0x28, 0}, {0x97, 0x26, 0}, {0x97, 0x02, 0}, {0x97, 0x98, 0}, + {0x97, 0x80, 0}, {0x97, 0x00, 0}, {0x97, 0x00, 0}, {0xa4, 0x00, 0}, + {0xa8, 0x00, 0}, {0xc5, 0x11, 0}, {0xc6, 0x51, 0}, {0xbf, 0x80, 0}, + {0xc7, 0x10, 0}, {0xb6, 0x66, 0}, {0xb8, 0xa5, 0}, {0xb7, 0x64, 0}, + {0xb9, 0x7c, 0}, {0xb3, 0xaf, 0}, {0xb4, 0x97, 0}, {0xb5, 0xff, 0}, + {0xb0, 0xc5, 0}, {0xb1, 0x94, 0}, {0xb2, 0x0f, 0}, {0xc4, 0x5c, 0}, + {0xa6, 0x00, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x1b, 0}, + {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, + {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, + {0xa7, 0x18, 0}, {0xa7, 0x20, 0}, {0xa7, 0xd8, 0}, {0xa7, 0x19, 0}, + {0xa7, 0x31, 0}, {0xa7, 0x00, 0}, {0xa7, 0x18, 0}, {0xc0, 0x64, 0}, + {0xc1, 0x4b, 0}, {0x86, 0x1d, 0}, {0x50, 0x00, 0}, {0x51, 0xc8, 0}, + {0x52, 0x96, 0}, {0x53, 0x00, 0}, {0x54, 0x00, 0}, {0x55, 0x00, 0}, + {0x57, 0x00, 0}, {0x5a, 0xc8, 0}, {0x5b, 0x96, 0}, {0x5c, 0x00, 0}, + {0xc3, 0xef, 0}, {0x7f, 0x00, 0}, {0xda, 0x01, 0}, {0xe5, 0x1f, 0}, + {0xe1, 0x67, 0}, {0xe0, 0x00, 0}, {0xdd, 0x7f, 0}, {0x05, 0x00, 0} +#endif +}; + +/*! + * Maintains the information on the current state of the sesor. + */ +struct sensor { + const struct ov2640_platform_data *platform_data; + struct v4l2_int_device *v4l2_int_device; + struct i2c_client *i2c_client; + struct v4l2_pix_format pix; + struct v4l2_captureparm streamcap; + bool on; + + /* control settings */ + int brightness; + int hue; + int contrast; + int saturation; + int red; + int green; + int blue; + int ae_mode; + + u32 csi; + u32 mclk; + +} ov2640_data; + +static struct regulator *io_regulator; +static struct regulator *core_regulator; +static struct regulator *analog_regulator; +static struct regulator *gpo_regulator; + +extern void gpio_sensor_active(void); +extern void gpio_sensor_inactive(void); + +/* list of image formats supported by this sensor */ +/* +const static struct v4l2_fmtdesc ov2640_formats[] = { + { + .description = "YUYV (YUV 4:2:2), packed", + .pixelformat = V4L2_PIX_FMT_UYVY, + }, +}; + */ + +static int ov2640_init_mode(struct sensor *s) +{ + int ret = -1; + struct reg_value *setting; + int i, num; + + pr_debug("In ov2640:ov2640_init_mode capturemode is %d\n", + s->streamcap.capturemode); + + if (s->streamcap.capturemode & V4L2_MODE_HIGHQUALITY) { + s->pix.width = 1600; + s->pix.height = 1120; + setting = ov2640_setting_1600_1120; + num = ARRAY_SIZE(ov2640_setting_1600_1120); + } else { + s->pix.width = 800; + s->pix.height = 600; + setting = ov2640_setting_800_600; + num = ARRAY_SIZE(ov2640_setting_800_600); + } + + for (i = 0; i < num; i++) { + ret = i2c_smbus_write_byte_data(s->i2c_client, + setting[i].reg, + setting[i].value); + if (ret < 0) { + pr_err("write reg error: reg=%x, val=%x\n", + setting[i].reg, setting[i].value); + return ret; + } + if (setting[i].delay_ms > 0) + msleep(setting[i].delay_ms); + } + + return ret; +} + +/* At present only support change to 15fps(only for SVGA mode) */ +static int ov2640_set_fps(struct sensor *s, int fps) +{ + int ret = 0; + + if (i2c_smbus_write_byte_data(s->i2c_client, 0xff, 0x01) < 0) { + pr_err("in %s,change to sensor addr failed\n", __func__); + ret = -EPERM; + } + + /* change the camera framerate to 15fps(only for SVGA mode) */ + if (i2c_smbus_write_byte_data(s->i2c_client, 0x11, 0x01) < 0) { + pr_err("change camera to 15fps failed\n"); + ret = -EPERM; + } + + return ret; +} + +static int ov2640_set_format(struct sensor *s, int format) +{ + int ret = 0; + + if (i2c_smbus_write_byte_data(s->i2c_client, 0xff, 0x00) < 0) + ret = -EPERM; + + if (format == V4L2_PIX_FMT_RGB565) { + /* set RGB565 format */ + if (i2c_smbus_write_byte_data(s->i2c_client, 0xda, 0x08) < 0) + ret = -EPERM; + + if (i2c_smbus_write_byte_data(s->i2c_client, 0xd7, 0x03) < 0) + ret = -EPERM; + } else if (format == V4L2_PIX_FMT_YUV420) { + /* set YUV420 format */ + if (i2c_smbus_write_byte_data(s->i2c_client, 0xda, 0x00) < 0) + ret = -EPERM; + + if (i2c_smbus_write_byte_data(s->i2c_client, 0xd7, 0x1b) < 0) + ret = -EPERM; + } else { + pr_debug("format not supported\n"); + } + + return ret; +} + +/* --------------- IOCTL functions from v4l2_int_ioctl_desc --------------- */ + +/*! + * ioctl_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_ifparm_num + * s: pointer to standard V4L2 device structure + * p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure + * + * Gets slave interface parameters. + * Calculates the required xclk value to support the requested + * clock parameters in p. This value is returned in the p + * parameter. + * + * vidioc_int_g_ifparm returns platform-specific information about the + * interface settings used by the sensor. + * + * Given the image capture format in pix, the nominal frame period in + * timeperframe, calculate the required xclk frequency. + * + * Called on open. + */ +static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) +{ + pr_debug("In ov2640:ioctl_g_ifparm\n"); + + if (s == NULL) { + pr_err(" ERROR!! no slave device set!\n"); + return -1; + } + + memset(p, 0, sizeof(*p)); + p->u.bt656.clock_curr = ov2640_data.mclk; + p->if_type = V4L2_IF_TYPE_BT656; + p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT; + p->u.bt656.clock_min = OV2640_XCLK_MIN; + p->u.bt656.clock_max = OV2640_XCLK_MAX; + + return 0; +} + +/*! + * Sets the camera power. + * + * s pointer to the camera device + * on if 1, power is to be turned on. 0 means power is to be turned off + * + * ioctl_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num + * @s: pointer to standard V4L2 device structure + * @on: power state to which device is to be set + * + * Sets devices power state to requrested state, if possible. + * This is called on open, close, suspend and resume. + */ +static int ioctl_s_power(struct v4l2_int_device *s, int on) +{ + struct sensor *sensor = s->priv; + + pr_debug("In ov2640:ioctl_s_power\n"); + + if (on && !sensor->on) { + gpio_sensor_active(); + if (io_regulator) + if (regulator_enable(io_regulator) != 0) + return -EIO; + if (core_regulator) + if (regulator_enable(core_regulator) != 0) + return -EIO; + if (gpo_regulator) + if (regulator_enable(gpo_regulator) != 0) + return -EIO; + if (analog_regulator) + if (regulator_enable(analog_regulator) != 0) + return -EIO; + } else if (!on && sensor->on) { + if (analog_regulator) + regulator_disable(analog_regulator); + if (core_regulator) + regulator_disable(core_regulator); + if (io_regulator) + regulator_disable(io_regulator); + if (gpo_regulator) + regulator_disable(gpo_regulator); + gpio_sensor_inactive(); + } + + sensor->on = on; + + return 0; +} + +/*! + * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure + * + * Returns the sensor's video CAPTURE parameters. + */ +static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + struct sensor *sensor = s->priv; + struct v4l2_captureparm *cparm = &a->parm.capture; + int ret = 0; + + pr_debug("In ov2640:ioctl_g_parm\n"); + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + memset(a, 0, sizeof(*a)); + a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cparm->capability = sensor->streamcap.capability; + cparm->timeperframe = sensor->streamcap.timeperframe; + cparm->capturemode = sensor->streamcap.capturemode; + ret = 0; + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + pr_err(" type is not V4L2_BUF_TYPE_VIDEO_CAPTURE " \ + "but %d\n", a->type); + ret = -EINVAL; + break; + + default: + pr_err(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure + * + * Configures the sensor to use the input parameters, if possible. If + * not possible, reverts to the old parameters and returns the + * appropriate error code. + */ +static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + struct sensor *sensor = s->priv; + struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe; + u32 tgt_fps; /* target frames per secound */ + int ret = 0; + + pr_debug("In ov2640:ioctl_s_parm\n"); + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + + /* Check that the new frame rate is allowed. */ + if ((timeperframe->numerator == 0) + || (timeperframe->denominator == 0)) { + timeperframe->denominator = DEFAULT_FPS; + timeperframe->numerator = 1; + } + tgt_fps = timeperframe->denominator + / timeperframe->numerator; + + if (tgt_fps > MAX_FPS) { + timeperframe->denominator = MAX_FPS; + timeperframe->numerator = 1; + } else if (tgt_fps < MIN_FPS) { + timeperframe->denominator = MIN_FPS; + timeperframe->numerator = 1; + } + sensor->streamcap.timeperframe = *timeperframe; + sensor->streamcap.capturemode = + (u32)a->parm.capture.capturemode; + + ret = ov2640_init_mode(sensor); + if (tgt_fps == 15) + ov2640_set_fps(sensor, tgt_fps); + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + pr_err(" type is not V4L2_BUF_TYPE_VIDEO_CAPTURE " \ + "but %d\n", a->type); + ret = -EINVAL; + break; + + default: + pr_err(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * ioctl_s_fmt_cap - V4L2 sensor interface handler for ioctl_s_fmt_cap + * set camera output format and resolution format + * + * @s: pointer to standard V4L2 device structure + * @arg: pointer to parameter, according this to set camera + * + * Returns 0 if set succeed, else return -1 + */ +static int ioctl_s_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) +{ + struct sensor *sensor = s->priv; + u32 format = f->fmt.pix.pixelformat; + int size = 0, ret = 0; + + size = f->fmt.pix.width * f->fmt.pix.height; + switch (format) { + case V4L2_PIX_FMT_RGB565: + if (size > 640 * 480) + sensor->streamcap.capturemode = V4L2_MODE_HIGHQUALITY; + else + sensor->streamcap.capturemode = 0; + ret = ov2640_init_mode(sensor); + + ret = ov2640_set_format(sensor, V4L2_PIX_FMT_RGB565); + break; + case V4L2_PIX_FMT_UYVY: + if (size > 640 * 480) + sensor->streamcap.capturemode = V4L2_MODE_HIGHQUALITY; + else + sensor->streamcap.capturemode = 0; + ret = ov2640_init_mode(sensor); + break; + case V4L2_PIX_FMT_YUV420: + if (size > 640 * 480) + sensor->streamcap.capturemode = V4L2_MODE_HIGHQUALITY; + else + sensor->streamcap.capturemode = 0; + ret = ov2640_init_mode(sensor); + + /* YUYV: width * 2, YY: width */ + ret = ov2640_set_format(sensor, V4L2_PIX_FMT_YUV420); + break; + default: + pr_debug("case not supported\n"); + break; + } + + return ret; +} + +/*! + * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap + * @s: pointer to standard V4L2 device structure + * @f: pointer to standard V4L2 v4l2_format structure + * + * Returns the sensor's current pixel format in the v4l2_format + * parameter. + */ +static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) +{ + struct sensor *sensor = s->priv; + + pr_debug("In ov2640:ioctl_g_fmt_cap.\n"); + + f->fmt.pix = sensor->pix; + + return 0; +} + +/*! + * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure + * + * If the requested control is supported, returns the control's current + * value from the video_control[] array. Otherwise, returns -EINVAL + * if the control is not supported. + */ +static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int ret = 0; + + pr_debug("In ov2640:ioctl_g_ctrl\n"); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + vc->value = ov2640_data.brightness; + break; + case V4L2_CID_HUE: + vc->value = ov2640_data.hue; + break; + case V4L2_CID_CONTRAST: + vc->value = ov2640_data.contrast; + break; + case V4L2_CID_SATURATION: + vc->value = ov2640_data.saturation; + break; + case V4L2_CID_RED_BALANCE: + vc->value = ov2640_data.red; + break; + case V4L2_CID_BLUE_BALANCE: + vc->value = ov2640_data.blue; + break; + case V4L2_CID_EXPOSURE: + vc->value = ov2640_data.ae_mode; + break; + default: + ret = -EINVAL; + } + + return ret; +} + +/*! + * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure + * + * If the requested control is supported, sets the control's current + * value in HW (and updates the video_control[] array). Otherwise, + * returns -EINVAL if the control is not supported. + */ +static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int retval = 0; + + pr_debug("In ov2640:ioctl_s_ctrl %d\n", vc->id); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + pr_debug(" V4L2_CID_BRIGHTNESS\n"); + break; + case V4L2_CID_CONTRAST: + pr_debug(" V4L2_CID_CONTRAST\n"); + break; + case V4L2_CID_SATURATION: + pr_debug(" V4L2_CID_SATURATION\n"); + break; + case V4L2_CID_HUE: + pr_debug(" V4L2_CID_HUE\n"); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_AUTO_WHITE_BALANCE\n"); + break; + case V4L2_CID_DO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_DO_WHITE_BALANCE\n"); + break; + case V4L2_CID_RED_BALANCE: + pr_debug(" V4L2_CID_RED_BALANCE\n"); + break; + case V4L2_CID_BLUE_BALANCE: + pr_debug(" V4L2_CID_BLUE_BALANCE\n"); + break; + case V4L2_CID_GAMMA: + pr_debug(" V4L2_CID_GAMMA\n"); + break; + case V4L2_CID_EXPOSURE: + pr_debug(" V4L2_CID_EXPOSURE\n"); + break; + case V4L2_CID_AUTOGAIN: + pr_debug(" V4L2_CID_AUTOGAIN\n"); + break; + case V4L2_CID_GAIN: + pr_debug(" V4L2_CID_GAIN\n"); + break; + case V4L2_CID_HFLIP: + pr_debug(" V4L2_CID_HFLIP\n"); + break; + case V4L2_CID_VFLIP: + pr_debug(" V4L2_CID_VFLIP\n"); + break; + default: + pr_debug(" Default case\n"); + retval = -EPERM; + break; + } + + return retval; +} + +/*! + * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT + * @s: pointer to standard V4L2 device structure + */ +static int ioctl_init(struct v4l2_int_device *s) +{ + pr_debug("In ov2640:ioctl_init\n"); + + return 0; +} + +/*! + * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num + * @s: pointer to standard V4L2 device structure + * + * Initialise the device when slave attaches to the master. + */ +static int ioctl_dev_init(struct v4l2_int_device *s) +{ + struct sensor *sensor = s->priv; + u32 tgt_xclk; /* target xclk */ + + pr_debug("In ov2640:ioctl_dev_init\n"); + + gpio_sensor_active(); + ov2640_data.on = true; + + tgt_xclk = ov2640_data.mclk; + tgt_xclk = min(tgt_xclk, (u32)OV2640_XCLK_MAX); + tgt_xclk = max(tgt_xclk, (u32)OV2640_XCLK_MIN); + ov2640_data.mclk = tgt_xclk; + + pr_debug(" Setting mclk to %d MHz\n", + tgt_xclk / 1000000); + set_mclk_rate(&ov2640_data.mclk); + + return ov2640_init_mode(sensor); +} + +/*! + * ioctl_dev_exit - V4L2 sensor interface handler for vidioc_int_dev_exit_num + * @s: pointer to standard V4L2 device structure + * + * Delinitialise the device when slave detaches to the master. + */ +static int ioctl_dev_exit(struct v4l2_int_device *s) +{ + pr_debug("In ov2640:ioctl_dev_exit\n"); + + gpio_sensor_inactive(); + + return 0; +} + +/*! + * This structure defines all the ioctls for this module and links them to the + * enumeration. + */ +static struct v4l2_int_ioctl_desc ov2640_ioctl_desc[] = { + {vidioc_int_dev_init_num, (v4l2_int_ioctl_func *)ioctl_dev_init}, + {vidioc_int_dev_exit_num, (v4l2_int_ioctl_func*)ioctl_dev_exit}, + {vidioc_int_s_power_num, (v4l2_int_ioctl_func *)ioctl_s_power}, + {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *)ioctl_g_ifparm}, +/* {vidioc_int_g_needs_reset_num, + (v4l2_int_ioctl_func *)ioctl_g_needs_reset}, */ +/* {vidioc_int_reset_num, (v4l2_int_ioctl_func *)ioctl_reset}, */ + {vidioc_int_init_num, (v4l2_int_ioctl_func *)ioctl_init}, +/* {vidioc_int_enum_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap}, */ +/* {vidioc_int_try_fmt_cap_num, + (v4l2_int_ioctl_func *)ioctl_try_fmt_cap}, */ + {vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_g_fmt_cap}, + {vidioc_int_s_fmt_cap_num, (v4l2_int_ioctl_func*)ioctl_s_fmt_cap}, + {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *)ioctl_g_parm}, + {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *)ioctl_s_parm}, +/* {vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *)ioctl_queryctrl}, */ + {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *)ioctl_g_ctrl}, + {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *)ioctl_s_ctrl}, +}; + +static struct v4l2_int_slave ov2640_slave = { + .ioctls = ov2640_ioctl_desc, + .num_ioctls = ARRAY_SIZE(ov2640_ioctl_desc), +}; + +static struct v4l2_int_device ov2640_int_device = { + .module = THIS_MODULE, + .name = "ov2640", + .type = v4l2_int_type_slave, + .u = { + .slave = &ov2640_slave, + }, +}; + +/*! + * ov2640 I2C attach function + * Function set in i2c_driver struct. + * Called by insmod ov2640_camera.ko. + * + * @param client struct i2c_client* + * @return Error code indicating success or failure + */ +static int ov2640_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int retval; + struct mxc_camera_platform_data *plat_data = client->dev.platform_data; + + pr_debug("In ov2640_probe (RH_BT565)\n"); + + /* Set initial values for the sensor struct. */ + memset(&ov2640_data, 0, sizeof(ov2640_data)); + ov2640_data.i2c_client = client; + ov2640_data.mclk = 24000000; + ov2640_data.mclk = plat_data->mclk; + ov2640_data.pix.pixelformat = V4L2_PIX_FMT_UYVY; + ov2640_data.pix.width = 800; + ov2640_data.pix.height = 600; + ov2640_data.streamcap.capability = V4L2_MODE_HIGHQUALITY + | V4L2_CAP_TIMEPERFRAME; + ov2640_data.streamcap.capturemode = 0; + ov2640_data.streamcap.timeperframe.denominator = DEFAULT_FPS; + ov2640_data.streamcap.timeperframe.numerator = 1; + + if (plat_data->io_regulator) { + io_regulator = + regulator_get(&client->dev, plat_data->io_regulator); + if (!IS_ERR(io_regulator)) { + regulator_set_voltage(io_regulator, 2800000, 2800000); + if (regulator_enable(io_regulator) != 0) { + pr_err("%s:io set voltage error\n", __func__); + goto err1; + } else { + dev_dbg(&client->dev, + "%s:io set voltage ok\n", __func__); + } + } else + io_regulator = NULL; + } + + if (plat_data->core_regulator) { + core_regulator = + regulator_get(&client->dev, plat_data->core_regulator); + if (!IS_ERR(core_regulator)) { + regulator_set_voltage(core_regulator, + 1300000, 1300000); + if (regulator_enable(core_regulator) != 0) { + pr_err("%s:core set voltage error\n", __func__); + goto err2; + } else { + dev_dbg(&client->dev, + "%s:core set voltage ok\n", __func__); + } + } else + core_regulator = NULL; + } + + if (plat_data->analog_regulator) { + analog_regulator = + regulator_get(&client->dev, plat_data->analog_regulator); + if (!IS_ERR(analog_regulator)) { + regulator_set_voltage(analog_regulator, 2000000, 2000000); + if (regulator_enable(analog_regulator) != 0) { + pr_err("%s:analog set voltage error\n", + __func__); + goto err3; + } else { + dev_dbg(&client->dev, + "%s:analog set voltage ok\n", __func__); + } + } else + analog_regulator = NULL; + } + + if (plat_data->gpo_regulator) { + gpo_regulator = + regulator_get(&client->dev, plat_data->gpo_regulator); + if (!IS_ERR(gpo_regulator)) { + if (regulator_enable(gpo_regulator) != 0) { + pr_err("%s:gpo3 set voltage error\n", __func__); + goto err4; + } else { + dev_dbg(&client->dev, + "%s:gpo3 set voltage ok\n", __func__); + } + } else + gpo_regulator = NULL; + } + + /* This function attaches this structure to the /dev/video0 device. + * The pointer in priv points to the ov2640_data structure here.*/ + ov2640_int_device.priv = &ov2640_data; + retval = v4l2_int_device_register(&ov2640_int_device); + + return retval; + +err4: + if (analog_regulator) { + regulator_disable(analog_regulator); + regulator_put(analog_regulator); + } +err3: + if (core_regulator) { + regulator_disable(core_regulator); + regulator_put(core_regulator); + } +err2: + if (io_regulator) { + regulator_disable(io_regulator); + regulator_put(io_regulator); + } +err1: + return -1; +} + +/*! + * ov2640 I2C detach function + * Called on rmmod ov2640_camera.ko + * + * @param client struct i2c_client* + * @return Error code indicating success or failure + */ +static int ov2640_remove(struct i2c_client *client) +{ + pr_debug("In ov2640_remove\n"); + + v4l2_int_device_unregister(&ov2640_int_device); + + if (gpo_regulator) { + regulator_disable(gpo_regulator); + regulator_put(gpo_regulator); + } + + if (analog_regulator) { + regulator_disable(analog_regulator); + regulator_put(analog_regulator); + } + + if (core_regulator) { + regulator_disable(core_regulator); + regulator_put(core_regulator); + } + + if (io_regulator) { + regulator_disable(io_regulator); + regulator_put(io_regulator); + } + + return 0; +} + +static const struct i2c_device_id ov2640_id[] = { + {"ov2640", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, ov2640_id); + +static struct i2c_driver ov2640_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "ov2640", + }, + .probe = ov2640_probe, + .remove = ov2640_remove, + .id_table = ov2640_id, +/* To add power management add .suspend and .resume functions */ +}; + +/*! + * ov2640 init function + * Called by insmod ov2640_camera.ko. + * + * @return Error code indicating success or failure + */ +static __init int ov2640_init(void) +{ + u8 err; + + pr_debug("In ov2640_init\n"); + + err = i2c_add_driver(&ov2640_i2c_driver); + if (err != 0) + pr_err("%s:driver registration failed, error=%d \n", + __func__, err); + + return err; +} + +/*! + * OV2640 cleanup function + * Called on rmmod ov2640_camera.ko + * + * @return Error code indicating success or failure + */ +static void __exit ov2640_clean(void) +{ + pr_debug("In ov2640_clean\n"); + i2c_del_driver(&ov2640_i2c_driver); +} + +module_init(ov2640_init); +module_exit(ov2640_clean); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("OV2640 Camera Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_still.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_still.c @@ -0,0 +1,254 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_still.c + * + * @brief IPU Use case for still image capture + * + * @ingroup IPU + */ + +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +static int callback_eof_flag; + +#ifdef CONFIG_MXC_IPU_V1 +static int callback_flag; +/* + * Function definitions + */ +/*! + * CSI EOF callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t prp_csi_eof_callback(int irq, void *dev_id) +{ + if (callback_flag == 2) { + ipu_select_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_enable_channel(CSI_MEM); + } + + callback_flag++; + return IRQ_HANDLED; +} +#endif + +/*! + * CSI callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t prp_still_callback(int irq, void *dev_id) +{ + cam_data *cam = (cam_data *) dev_id; + + callback_eof_flag++; + if (callback_eof_flag < 5) + ipu_select_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, 0); + else { + cam->still_counter++; + wake_up_interruptible(&cam->still_queue); + } + + return IRQ_HANDLED; +} + +/*! + * start csi->mem task + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +static int prp_still_start(void *private) +{ + cam_data *cam = (cam_data *) private; + u32 pixel_fmt; + int err; + ipu_channel_params_t params; + + if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) + pixel_fmt = IPU_PIX_FMT_YUV420P; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_NV12) + pixel_fmt = IPU_PIX_FMT_NV12; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P) + pixel_fmt = IPU_PIX_FMT_YUV422P; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_UYVY) + pixel_fmt = IPU_PIX_FMT_UYVY; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR24) + pixel_fmt = IPU_PIX_FMT_BGR24; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) + pixel_fmt = IPU_PIX_FMT_RGB24; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) + pixel_fmt = IPU_PIX_FMT_RGB565; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR32) + pixel_fmt = IPU_PIX_FMT_BGR32; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB32) + pixel_fmt = IPU_PIX_FMT_RGB32; + else { + printk(KERN_ERR "format not supported\n"); + return -EINVAL; + } + + ipu_csi_enable_mclk_if(CSI_MCLK_RAW, cam->csi, true, true); + + memset(¶ms, 0, sizeof(params)); + err = ipu_init_channel(CSI_MEM, ¶ms); + if (err != 0) + return err; + + err = ipu_init_channel_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, + pixel_fmt, cam->v2f.fmt.pix.width, + cam->v2f.fmt.pix.height, + cam->v2f.fmt.pix.width, IPU_ROTATE_NONE, + cam->still_buf, 0, 0, 0); + if (err != 0) + return err; + +#ifdef CONFIG_MXC_IPU_V1 + err = ipu_request_irq(IPU_IRQ_SENSOR_OUT_EOF, prp_still_callback, + 0, "Mxc Camera", cam); + if (err != 0) { + printk(KERN_ERR "Error registering irq.\n"); + return err; + } + callback_flag = 0; + callback_eof_flag = 0; + err = ipu_request_irq(IPU_IRQ_SENSOR_EOF, prp_csi_eof_callback, + 0, "Mxc Camera", NULL); + if (err != 0) { + printk(KERN_ERR "Error IPU_IRQ_SENSOR_EOF \n"); + return err; + } +#else + ipu_clear_irq(IPU_IRQ_CSI0_OUT_EOF); + err = ipu_request_irq(IPU_IRQ_CSI0_OUT_EOF, prp_still_callback, + 0, "Mxc Camera", cam); + if (err != 0) { + printk(KERN_ERR "Error registering irq.\n"); + return err; + } + + callback_eof_flag = 0; + + ipu_select_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_enable_channel(CSI_MEM); +#endif + + return err; +} + +/*! + * stop csi->mem encoder task + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +static int prp_still_stop(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + +#ifdef CONFIG_MXC_IPU_V1 + ipu_free_irq(IPU_IRQ_SENSOR_EOF, NULL); + ipu_free_irq(IPU_IRQ_SENSOR_OUT_EOF, cam); +#else + ipu_free_irq(IPU_IRQ_CSI0_OUT_EOF, cam); +#endif + + ipu_disable_channel(CSI_MEM, true); + ipu_uninit_channel(CSI_MEM); + ipu_csi_enable_mclk_if(CSI_MCLK_RAW, cam->csi, false, false); + + return err; +} + +/*! + * function to select CSI_MEM as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +int prp_still_select(void *private) +{ + cam_data *cam = (cam_data *) private; + + if (cam) { + cam->csi_start = prp_still_start; + cam->csi_stop = prp_still_stop; + } + + return 0; +} + +/*! + * function to de-select CSI_MEM as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +int prp_still_deselect(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + err = prp_still_stop(cam); + + if (cam) { + cam->csi_start = NULL; + cam->csi_stop = NULL; + } + + return err; +} + +/*! + * Init the Encorder channels + * + * @return Error code indicating success or failure + */ +__init int prp_still_init(void) +{ + return 0; +} + +/*! + * Deinit the Encorder channels + * + */ +void __exit prp_still_exit(void) +{ +} + +module_init(prp_still_init); +module_exit(prp_still_exit); + +EXPORT_SYMBOL(prp_still_select); +EXPORT_SYMBOL(prp_still_deselect); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IPU PRP STILL IMAGE Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/mt9v111.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/mt9v111.c @@ -0,0 +1,1076 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mt9v111.c + * + * @brief mt9v111 camera driver functions + * + * @ingroup Camera + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_v4l2_capture.h" +#include "mt9v111.h" + +#ifdef MT9V111_DEBUG +static u16 testpattern = 0; +#endif + +static mt9v111_conf mt9v111_device; + +/*! + * Holds the current frame rate. + */ +static int reset_frame_rate = MT9V111_FRAME_RATE; + +struct sensor { + const struct mt9v111_platform_data *platform_data; + struct v4l2_int_device *v4l2_int_device; + struct i2c_client *i2c_client; + struct v4l2_pix_format pix; + struct v4l2_captureparm streamcap; + bool on; + + /* control settings */ + int brightness; + int hue; + int contrast; + int saturation; + int red; + int green; + int blue; + int ae_mode; + +} mt9v111_data; + +extern void gpio_sensor_active(void); +extern void gpio_sensor_inactive(void); + +static int mt9v111_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int mt9v111_remove(struct i2c_client *client); + +static const struct i2c_device_id mt9v111_id[] = { + {"mt9v111", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, mt9v111_id); + +static struct i2c_driver mt9v111_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "mt9v111", + }, + .probe = mt9v111_probe, + .remove = mt9v111_remove, + .id_table = mt9v111_id, +/* To add power management add .suspend and .resume functions */ +}; + +/* + * Function definitions + */ + +#ifdef MT9V111_DEBUG +static inline int mt9v111_read_reg(u8 reg) +{ + int val = i2c_smbus_read_word_data(mt9v111_data.i2c_client, reg); + if (val != -1) + val = cpu_to_be16(val); + return val; +} +#endif + +/*! + * Writes to the register via I2C. + */ +static inline int mt9v111_write_reg(u8 reg, u16 val) +{ + pr_debug("In mt9v111_write_reg (0x%x, 0x%x)\n", reg, val); + pr_debug(" write reg %x val %x.\n", reg, val); + + return i2c_smbus_write_word_data(mt9v111_data.i2c_client, + reg, cpu_to_be16(val)); +} + +/*! + * Initialize mt9v111_sensor_lib + * Libarary for Sensor configuration through I2C + * + * @param coreReg Core Registers + * @param ifpReg IFP Register + * + * @return status + */ +static u8 mt9v111_sensor_lib(mt9v111_coreReg * coreReg, mt9v111_IFPReg * ifpReg) +{ + u8 reg; + u16 data; + u8 error = 0; + + pr_debug("In mt9v111_sensor_lib\n"); + + /* + * setup to IFP registers + */ + reg = MT9V111I_ADDR_SPACE_SEL; + data = ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + /* Operation Mode Control */ + reg = MT9V111I_MODE_CONTROL; + data = ifpReg->modeControl; + mt9v111_write_reg(reg, data); + + /* Output format */ + reg = MT9V111I_FORMAT_CONTROL; + data = ifpReg->formatControl; /* Set bit 12 */ + mt9v111_write_reg(reg, data); + + /* AE limit 4 */ + reg = MT9V111I_SHUTTER_WIDTH_LIMIT_AE; + data = ifpReg->gainLimitAE; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_OUTPUT_FORMAT_CTRL2; + data = ifpReg->outputFormatCtrl2; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_AE_SPEED; + data = ifpReg->AESpeed; + mt9v111_write_reg(reg, data); + + /* output image size */ + reg = MT9V111i_H_PAN; + data = 0x8000 | ifpReg->HPan; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_ZOOM; + data = 0x8000 | ifpReg->HZoom; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_SIZE; + data = 0x8000 | ifpReg->HSize; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_PAN; + data = 0x8000 | ifpReg->VPan; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_ZOOM; + data = 0x8000 | ifpReg->VZoom; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_V_SIZE; + data = 0x8000 | ifpReg->VSize; + mt9v111_write_reg(reg, data); + + reg = MT9V111i_H_PAN; + data = ~0x8000 & ifpReg->HPan; + mt9v111_write_reg(reg, data); +#if 0 + reg = MT9V111I_UPPER_SHUTTER_DELAY_LIM; + data = ifpReg->upperShutterDelayLi; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_SHUTTER_60; + data = ifpReg->shutter_width_60; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_SEARCH_FLICK_60; + data = ifpReg->search_flicker_60; + mt9v111_write_reg(reg, data); +#endif + + /* + * setup to sensor core registers + */ + reg = MT9V111I_ADDR_SPACE_SEL; + data = coreReg->addressSelect; + mt9v111_write_reg(reg, data); + + /* enable changes and put the Sync bit on */ + reg = MT9V111S_OUTPUT_CTRL; + data = MT9V111S_OUTCTRL_SYNC | MT9V111S_OUTCTRL_CHIP_ENABLE | 0x3000; + mt9v111_write_reg(reg, data); + + /* min PIXCLK - Default */ + reg = MT9V111S_PIXEL_CLOCK_SPEED; + data = coreReg->pixelClockSpeed; + mt9v111_write_reg(reg, data); + + /* Setup image flipping / Dark rows / row/column skip */ + reg = MT9V111S_READ_MODE; + data = coreReg->readMode; + mt9v111_write_reg(reg, data); + + /* zoom 0 */ + reg = MT9V111S_DIGITAL_ZOOM; + data = coreReg->digitalZoom; + mt9v111_write_reg(reg, data); + + /* min H-blank */ + reg = MT9V111S_HOR_BLANKING; + data = coreReg->horizontalBlanking; + mt9v111_write_reg(reg, data); + + /* min V-blank */ + reg = MT9V111S_VER_BLANKING; + data = coreReg->verticalBlanking; + mt9v111_write_reg(reg, data); + + reg = MT9V111S_SHUTTER_WIDTH; + data = coreReg->shutterWidth; + mt9v111_write_reg(reg, data); + + reg = MT9V111S_SHUTTER_DELAY; + data = ifpReg->upperShutterDelayLi; + mt9v111_write_reg(reg, data); + + /* changes become effective */ + reg = MT9V111S_OUTPUT_CTRL; + data = MT9V111S_OUTCTRL_CHIP_ENABLE | 0x3000; + mt9v111_write_reg(reg, data); + + return error; +} + +/*! + * MT9V111 frame rate calculate + * + * @param frame_rate int * + * @param mclk int + * @return None + */ +static void mt9v111_rate_cal(int *frame_rate, int mclk) +{ + int num_clock_per_row; + int max_rate = 0; + + pr_debug("In mt9v111_rate_cal\n"); + + num_clock_per_row = (MT9V111_MAX_WIDTH + 114 + MT9V111_HORZBLANK_MIN) + * 2; + max_rate = mclk / (num_clock_per_row * + (MT9V111_MAX_HEIGHT + MT9V111_VERTBLANK_DEFAULT)); + + if ((*frame_rate > max_rate) || (*frame_rate == 0)) { + *frame_rate = max_rate; + } + + mt9v111_device.coreReg->verticalBlanking + = mclk / (*frame_rate * num_clock_per_row) - MT9V111_MAX_HEIGHT; + + reset_frame_rate = *frame_rate; +} + +/*! + * MT9V111 sensor configuration + */ +void mt9v111_config(void) +{ + pr_debug("In mt9v111_config\n"); + + mt9v111_device.coreReg->addressSelect = MT9V111I_SEL_SCA; + mt9v111_device.ifpReg->addrSpaceSel = MT9V111I_SEL_IFP; + + mt9v111_device.coreReg->windowHeight = MT9V111_WINHEIGHT; + mt9v111_device.coreReg->windowWidth = MT9V111_WINWIDTH; + mt9v111_device.coreReg->zoomColStart = 0; + mt9v111_device.coreReg->zomRowStart = 0; + mt9v111_device.coreReg->digitalZoom = 0x0; + + mt9v111_device.coreReg->verticalBlanking = MT9V111_VERTBLANK_DEFAULT; + mt9v111_device.coreReg->horizontalBlanking = MT9V111_HORZBLANK_MIN; + mt9v111_device.coreReg->pixelClockSpeed = 0; + mt9v111_device.coreReg->readMode = 0xd0a1; + + mt9v111_device.ifpReg->outputFormatCtrl2 = 0; + mt9v111_device.ifpReg->gainLimitAE = 0x300; + mt9v111_device.ifpReg->AESpeed = 0x80; + + /* here is the default value */ + mt9v111_device.ifpReg->formatControl = 0xc800; + mt9v111_device.ifpReg->modeControl = 0x708e; + mt9v111_device.ifpReg->awbSpeed = 0x4514; + mt9v111_device.coreReg->shutterWidth = 0xf8; + + /* output size */ + mt9v111_device.ifpReg->HPan = 0; + mt9v111_device.ifpReg->HZoom = MT9V111_MAX_WIDTH; + mt9v111_device.ifpReg->HSize = MT9V111_MAX_WIDTH; + mt9v111_device.ifpReg->VPan = 0; + mt9v111_device.ifpReg->VZoom = MT9V111_MAX_HEIGHT; + mt9v111_device.ifpReg->VSize = MT9V111_MAX_HEIGHT; +} + +/*! + * mt9v111 sensor set saturtionn + * + * @param saturation int + + * @return Error code of 0. + */ +static int mt9v111_set_saturation(int saturation) +{ + u8 reg; + u16 data; + pr_debug("In mt9v111_set_saturation(%d)\n", + saturation); + + switch (saturation) { + case 150: + mt9v111_device.ifpReg->awbSpeed = 0x6D14; + break; + case 100: + mt9v111_device.ifpReg->awbSpeed = 0x4514; + break; + case 75: + mt9v111_device.ifpReg->awbSpeed = 0x4D14; + break; + case 50: + mt9v111_device.ifpReg->awbSpeed = 0x5514; + break; + case 37: + mt9v111_device.ifpReg->awbSpeed = 0x5D14; + break; + case 25: + mt9v111_device.ifpReg->awbSpeed = 0x6514; + break; + default: + mt9v111_device.ifpReg->awbSpeed = 0x4514; + break; + } + + reg = MT9V111I_ADDR_SPACE_SEL; + data = mt9v111_device.ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + /* Operation Mode Control */ + reg = MT9V111I_AWB_SPEED; + data = mt9v111_device.ifpReg->awbSpeed; + mt9v111_write_reg(reg, data); + + return 0; +} + +/*! + * mt9v111 sensor set Auto Exposure measurement window mode configuration + * + * @param ae_mode int + * @return Error code of 0 (no Error) + */ +static int mt9v111_set_ae_mode(int ae_mode) +{ + u8 reg; + u16 data; + + pr_debug("In mt9v111_set_ae_mode(%d)\n", + ae_mode); + + /* Currently this driver only supports auto and manual exposure + * modes. */ + if ((ae_mode > 1) || (ae_mode << 0)) + return -EPERM; + + /* + * The auto exposure is set in bit 14. + * Other values are set for: + * -on the fly defect correction is on (bit 13). + * -aperature correction knee enabled (bit 12). + * -ITU_R BT656 synchronization codes are embedded in the image (bit 7) + * -AE measurement window is weighted sum of large and center windows + * (bits 2-3). + * -auto white balance is on (bit 1). + * -normal color processing (bit 4 = 0). + */ + /* V4L2_EXPOSURE_AUTO = 0; needs register setting of 0x708E */ + /* V4L2_EXPOSURE_MANUAL = 1 needs register setting of 0x308E */ + mt9v111_device.ifpReg->modeControl &= 0x3fff; + mt9v111_device.ifpReg->modeControl |= (ae_mode & 0x03) << 14; + mt9v111_data.ae_mode = ae_mode; + + reg = MT9V111I_ADDR_SPACE_SEL; + data = mt9v111_device.ifpReg->addrSpaceSel; + mt9v111_write_reg(reg, data); + + reg = MT9V111I_MODE_CONTROL; + data = mt9v111_device.ifpReg->modeControl; + mt9v111_write_reg(reg, data); + + return 0; +} + +/*! + * mt9v111 sensor get AE measurement window mode configuration + * + * @param ae_mode int * + * @return None + */ +static void mt9v111_get_ae_mode(int *ae_mode) +{ + pr_debug("In mt9v111_get_ae_mode(%d)\n", *ae_mode); + + if (ae_mode != NULL) { + *ae_mode = (mt9v111_device.ifpReg->modeControl & 0xc) >> 2; + } +} + +#ifdef MT9V111_DEBUG +/*! + * Set sensor to test mode, which will generate test pattern. + * + * @return none + */ +static void mt9v111_test_pattern(bool flag) +{ + u16 data; + + /* switch to sensor registers */ + mt9v111_write_reg(MT9V111I_ADDR_SPACE_SEL, MT9V111I_SEL_SCA); + + if (flag == true) { + testpattern = MT9V111S_OUTCTRL_TEST_MODE; + + data = mt9v111_read_reg(MT9V111S_ROW_NOISE_CTRL) & 0xBF; + mt9v111_write_reg(MT9V111S_ROW_NOISE_CTRL, data); + + mt9v111_write_reg(MT9V111S_TEST_DATA, 0); + + /* changes take effect */ + data = MT9V111S_OUTCTRL_CHIP_ENABLE | testpattern | 0x3000; + mt9v111_write_reg(MT9V111S_OUTPUT_CTRL, data); + } else { + testpattern = 0; + + data = mt9v111_read_reg(MT9V111S_ROW_NOISE_CTRL) | 0x40; + mt9v111_write_reg(MT9V111S_ROW_NOISE_CTRL, data); + + /* changes take effect */ + data = MT9V111S_OUTCTRL_CHIP_ENABLE | testpattern | 0x3000; + mt9v111_write_reg(MT9V111S_OUTPUT_CTRL, data); + } +} +#endif + + +/* --------------- IOCTL functions from v4l2_int_ioctl_desc --------------- */ + +/*! + * ioctl_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_ifparm_num + * s: pointer to standard V4L2 device structure + * p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure + * + * Gets slave interface parameters. + * Calculates the required xclk value to support the requested + * clock parameters in p. This value is returned in the p + * parameter. + * + * vidioc_int_g_ifparm returns platform-specific information about the + * interface settings used by the sensor. + * + * Given the image capture format in pix, the nominal frame period in + * timeperframe, calculate the required xclk frequency. + * + * Called on open. + */ +static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p) +{ + pr_debug("In mt9v111:ioctl_g_ifparm\n"); + + if (s == NULL) { + pr_err(" ERROR!! no slave device set!\n"); + return -1; + } + + memset(p, 0, sizeof(*p)); + p->u.bt656.clock_curr = MT9V111_MCLK; + p->if_type = V4L2_IF_TYPE_BT656; + p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT; + p->u.bt656.clock_min = MT9V111_CLK_MIN; + p->u.bt656.clock_max = MT9V111_CLK_MAX; + + return 0; +} + +/*! + * Sets the camera power. + * + * s pointer to the camera device + * on if 1, power is to be turned on. 0 means power is to be turned off + * + * ioctl_s_power - V4L2 sensor interface handler for vidioc_int_s_power_num + * @s: pointer to standard V4L2 device structure + * @on: power state to which device is to be set + * + * Sets devices power state to requrested state, if possible. + * This is called on suspend and resume. + */ +static int ioctl_s_power(struct v4l2_int_device *s, int on) +{ + struct sensor *sensor = s->priv; + + pr_debug("In mt9v111:ioctl_s_power\n"); + + sensor->on = on; + + if (on) + gpio_sensor_active(); + else + gpio_sensor_inactive(); + + return 0; +} + +/*! + * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure + * + * Returns the sensor's video CAPTURE parameters. + */ +static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + int ret = 0; + struct v4l2_captureparm *cparm = &a->parm.capture; + /* s->priv points to mt9v111_data */ + + pr_debug("In mt9v111:ioctl_g_parm\n"); + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + memset(a, 0, sizeof(*a)); + a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + cparm->capability = mt9v111_data.streamcap.capability; + cparm->timeperframe = + mt9v111_data.streamcap.timeperframe; + cparm->capturemode = mt9v111_data.streamcap.capturemode; + ret = 0; + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + pr_err(" type is not V4L2_BUF_TYPE_VIDEO_CAPTURE " \ + "but %d\n", a->type); + ret = -EINVAL; + break; + + default: + pr_err(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return ret; +} + +/*! + * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl + * @s: pointer to standard V4L2 device structure + * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure + * + * Configures the sensor to use the input parameters, if possible. If + * not possible, reverts to the old parameters and returns the + * appropriate error code. + */ +static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a) +{ + int ret = 0; + struct v4l2_captureparm *cparm = &a->parm.capture; + /* s->priv points to mt9v111_data */ + + pr_debug("In mt9v111:ioctl_s_parm\n"); + + switch (a->type) { + /* This is the only case currently handled. */ + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + pr_debug(" type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n"); + + /* Check that the new frame rate is allowed. + * Changing the frame rate is not allowed on this + *camera. */ + if (cparm->timeperframe.denominator != + mt9v111_data.streamcap.timeperframe.denominator) { + pr_err("ERROR: mt9v111: ioctl_s_parm: " \ + "This camera does not allow frame rate " + "changes.\n"); + ret = -EINVAL; + } else { + mt9v111_data.streamcap.timeperframe = + cparm->timeperframe; + /* Call any camera functions to match settings. */ + } + + /* Check that new capture mode is supported. */ + if ((cparm->capturemode != 0) && + !(cparm->capturemode & V4L2_MODE_HIGHQUALITY)) { + pr_err("ERROR: mt9v111: ioctl_s_parm: " \ + "unsupported capture mode\n"); + ret = -EINVAL; + } else { + mt9v111_data.streamcap.capturemode = + cparm->capturemode; + /* Call any camera functions to match settings. */ + /* Right now this camera only supports 1 mode. */ + } + break; + + /* These are all the possible cases. */ + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + case V4L2_BUF_TYPE_VIDEO_OVERLAY: + case V4L2_BUF_TYPE_VBI_CAPTURE: + case V4L2_BUF_TYPE_VBI_OUTPUT: + case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: + case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT: + pr_err(" type is not V4L2_BUF_TYPE_VIDEO_CAPTURE " \ + "but %d\n", a->type); + ret = -EINVAL; + break; + + default: + pr_err(" type is unknown - %d\n", a->type); + ret = -EINVAL; + break; + } + + return 0; +} + +/*! + * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap + * @s: pointer to standard V4L2 device structure + * @f: pointer to standard V4L2 v4l2_format structure + * + * Returns the sensor's current pixel format in the v4l2_format + * parameter. + */ +static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f) +{ + struct sensor *sensor = s->priv; + /* s->priv points to mt9v111_data */ + + pr_debug("In mt9v111:ioctl_g_fmt_cap.\n"); + pr_debug(" Returning size of %dx%d\n", + sensor->pix.width, sensor->pix.height); + + f->fmt.pix = sensor->pix; + + return 0; +} + +/*! + * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl + * @s: pointer to standard V4L2 device structure + * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure + * + * If the requested control is supported, returns the control information + * from the video_control[] array. Otherwise, returns -EINVAL if the + * control is not supported. + */ +static int ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qc) +{ + pr_debug("In mt9v111:ioctl_queryctrl\n"); + + return 0; +} + +/*! + * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure + * + * If the requested control is supported, returns the control's current + * value from the video_control[] array. Otherwise, returns -EINVAL + * if the control is not supported. + */ +static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + pr_debug("In mt9v111:ioctl_g_ctrl\n"); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + pr_debug(" V4L2_CID_BRIGHTNESS\n"); + vc->value = mt9v111_data.brightness; + break; + case V4L2_CID_CONTRAST: + pr_debug(" V4L2_CID_CONTRAST\n"); + vc->value = mt9v111_data.contrast; + break; + case V4L2_CID_SATURATION: + pr_debug(" V4L2_CID_SATURATION\n"); + vc->value = mt9v111_data.saturation; + break; + case V4L2_CID_HUE: + pr_debug(" V4L2_CID_HUE\n"); + vc->value = mt9v111_data.hue; + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_AUTO_WHITE_BALANCE\n"); + vc->value = 0; + break; + case V4L2_CID_DO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_DO_WHITE_BALANCE\n"); + vc->value = 0; + break; + case V4L2_CID_RED_BALANCE: + pr_debug(" V4L2_CID_RED_BALANCE\n"); + vc->value = mt9v111_data.red; + break; + case V4L2_CID_BLUE_BALANCE: + pr_debug(" V4L2_CID_BLUE_BALANCE\n"); + vc->value = mt9v111_data.blue; + break; + case V4L2_CID_GAMMA: + pr_debug(" V4L2_CID_GAMMA\n"); + vc->value = 0; + break; + case V4L2_CID_EXPOSURE: + pr_debug(" V4L2_CID_EXPOSURE\n"); + vc->value = mt9v111_data.ae_mode; + break; + case V4L2_CID_AUTOGAIN: + pr_debug(" V4L2_CID_AUTOGAIN\n"); + vc->value = 0; + break; + case V4L2_CID_GAIN: + pr_debug(" V4L2_CID_GAIN\n"); + vc->value = 0; + break; + case V4L2_CID_HFLIP: + pr_debug(" V4L2_CID_HFLIP\n"); + vc->value = 0; + break; + case V4L2_CID_VFLIP: + pr_debug(" V4L2_CID_VFLIP\n"); + vc->value = 0; + break; + default: + pr_debug(" Default case\n"); + return -EPERM; + break; + } + + return 0; +} + +/*! + * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl + * @s: pointer to standard V4L2 device structure + * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure + * + * If the requested control is supported, sets the control's current + * value in HW (and updates the video_control[] array). Otherwise, + * returns -EINVAL if the control is not supported. + */ +static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc) +{ + int retval = 0; + + pr_debug("In mt9v111:ioctl_s_ctrl %d\n", + vc->id); + + switch (vc->id) { + case V4L2_CID_BRIGHTNESS: + pr_debug(" V4L2_CID_BRIGHTNESS\n"); + break; + case V4L2_CID_CONTRAST: + pr_debug(" V4L2_CID_CONTRAST\n"); + break; + case V4L2_CID_SATURATION: + pr_debug(" V4L2_CID_SATURATION\n"); + retval = mt9v111_set_saturation(vc->value); + break; + case V4L2_CID_HUE: + pr_debug(" V4L2_CID_HUE\n"); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_AUTO_WHITE_BALANCE\n"); + break; + case V4L2_CID_DO_WHITE_BALANCE: + pr_debug( + " V4L2_CID_DO_WHITE_BALANCE\n"); + break; + case V4L2_CID_RED_BALANCE: + pr_debug(" V4L2_CID_RED_BALANCE\n"); + break; + case V4L2_CID_BLUE_BALANCE: + pr_debug(" V4L2_CID_BLUE_BALANCE\n"); + break; + case V4L2_CID_GAMMA: + pr_debug(" V4L2_CID_GAMMA\n"); + break; + case V4L2_CID_EXPOSURE: + pr_debug(" V4L2_CID_EXPOSURE\n"); + retval = mt9v111_set_ae_mode(vc->value); + break; + case V4L2_CID_AUTOGAIN: + pr_debug(" V4L2_CID_AUTOGAIN\n"); + break; + case V4L2_CID_GAIN: + pr_debug(" V4L2_CID_GAIN\n"); + break; + case V4L2_CID_HFLIP: + pr_debug(" V4L2_CID_HFLIP\n"); + break; + case V4L2_CID_VFLIP: + pr_debug(" V4L2_CID_VFLIP\n"); + break; + default: + pr_debug(" Default case\n"); + retval = -EPERM; + break; + } + + return retval; +} + +/*! + * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT + * @s: pointer to standard V4L2 device structure + */ +static int ioctl_init(struct v4l2_int_device *s) +{ + pr_debug("In mt9v111:ioctl_init\n"); + + return 0; +} + +/*! + * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num + * @s: pointer to standard V4L2 device structure + * + * Initialise the device when slave attaches to the master. + */ +static int ioctl_dev_init(struct v4l2_int_device *s) +{ + uint32_t clock_rate = MT9V111_MCLK; + + pr_debug("In mt9v111:ioctl_dev_init\n"); + + gpio_sensor_active(); + + set_mclk_rate(&clock_rate); + mt9v111_rate_cal(&reset_frame_rate, clock_rate); + mt9v111_sensor_lib(mt9v111_device.coreReg, mt9v111_device.ifpReg); + + return 0; +} + +/*! + * This structure defines all the ioctls for this module and links them to the + * enumeration. + */ +static struct v4l2_int_ioctl_desc mt9v111_ioctl_desc[] = { + + {vidioc_int_dev_init_num, (v4l2_int_ioctl_func *)ioctl_dev_init}, + + /*! + * Delinitialise the dev. at slave detach. + * The complement of ioctl_dev_init. + */ +/* {vidioc_int_dev_exit_num, (v4l2_int_ioctl_func *) ioctl_dev_exit}, */ + + {vidioc_int_s_power_num, (v4l2_int_ioctl_func *) ioctl_s_power}, + {vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *) ioctl_g_ifparm}, +/* {vidioc_int_g_needs_reset_num, + (v4l2_int_ioctl_func *) ioctl_g_needs_reset}, */ +/* {vidioc_int_reset_num, (v4l2_int_ioctl_func *) ioctl_reset}, */ + {vidioc_int_init_num, (v4l2_int_ioctl_func *) ioctl_init}, + + /*! + * VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type. + */ +/* {vidioc_int_enum_fmt_cap_num, + (v4l2_int_ioctl_func *) ioctl_enum_fmt_cap}, */ + + /*! + * VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. + * This ioctl is used to negotiate the image capture size and + * pixel format without actually making it take effect. + */ +/* {vidioc_int_try_fmt_cap_num, + (v4l2_int_ioctl_func *) ioctl_try_fmt_cap}, */ + + {vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *) ioctl_g_fmt_cap}, + + /*! + * If the requested format is supported, configures the HW to use that + * format, returns error code if format not supported or HW can't be + * correctly configured. + */ +/* {vidioc_int_s_fmt_cap_num, (v4l2_int_ioctl_func *)ioctl_s_fmt_cap}, */ + + {vidioc_int_g_parm_num, (v4l2_int_ioctl_func *) ioctl_g_parm}, + {vidioc_int_s_parm_num, (v4l2_int_ioctl_func *) ioctl_s_parm}, +/* {vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *) ioctl_queryctrl}, */ + {vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *) ioctl_g_ctrl}, + {vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *) ioctl_s_ctrl}, +}; + +static struct v4l2_int_slave mt9v111_slave = { + .ioctls = mt9v111_ioctl_desc, + .num_ioctls = ARRAY_SIZE(mt9v111_ioctl_desc), +}; + +static struct v4l2_int_device mt9v111_int_device = { + .module = THIS_MODULE, + .name = "mt9v111", + .type = v4l2_int_type_slave, + .u = { + .slave = &mt9v111_slave, + }, +}; + +/*! + * mt9v111 I2C probe function + * Function set in i2c_driver struct. + * Called by insmod mt9v111_camera.ko. + * + * @return Error code indicating success or failure + */ +static int mt9v111_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int retval; + + pr_debug("In mt9v111_probe device id is %s\n", id->name); + + /* Set initial values for the sensor struct. */ + memset(&mt9v111_data, 0, sizeof(mt9v111_data)); + mt9v111_data.i2c_client = client; + pr_debug(" client name is %s\n", client->name); + mt9v111_data.pix.pixelformat = V4L2_PIX_FMT_UYVY; + mt9v111_data.pix.width = MT9V111_MAX_WIDTH; + mt9v111_data.pix.height = MT9V111_MAX_HEIGHT; + mt9v111_data.streamcap.capability = 0; /* No higher resolution or frame + * frame rate changes supported. + */ + mt9v111_data.streamcap.timeperframe.denominator = MT9V111_FRAME_RATE; + mt9v111_data.streamcap.timeperframe.numerator = 1; + + mt9v111_int_device.priv = &mt9v111_data; + + pr_debug(" type is %d (expect %d)\n", + mt9v111_int_device.type, v4l2_int_type_slave); + pr_debug(" num ioctls is %d\n", + mt9v111_int_device.u.slave->num_ioctls); + + /* This function attaches this structure to the /dev/video0 device. + * The pointer in priv points to the mt9v111_data structure here.*/ + retval = v4l2_int_device_register(&mt9v111_int_device); + + return retval; +} + +/*! + * Function set in i2c_driver struct. + * Called on rmmod mt9v111_camera.ko + */ +static int mt9v111_remove(struct i2c_client *client) +{ + pr_debug("In mt9v111_remove\n"); + + v4l2_int_device_unregister(&mt9v111_int_device); + return 0; +} + +/*! + * MT9V111 init function. + * Called by insmod mt9v111_camera.ko. + * + * @return Error code indicating success or failure + */ +static __init int mt9v111_init(void) +{ + u8 err; + + pr_debug("In mt9v111_init\n"); + + /* Allocate memory for state structures. */ + mt9v111_device.coreReg = (mt9v111_coreReg *) + kmalloc(sizeof(mt9v111_coreReg), GFP_KERNEL); + if (!mt9v111_device.coreReg) + return -1; + memset(mt9v111_device.coreReg, 0, sizeof(mt9v111_coreReg)); + + mt9v111_device.ifpReg = (mt9v111_IFPReg *) + kmalloc(sizeof(mt9v111_IFPReg), GFP_KERNEL); + if (!mt9v111_device.ifpReg) { + kfree(mt9v111_device.coreReg); + mt9v111_device.coreReg = NULL; + return -1; + } + memset(mt9v111_device.ifpReg, 0, sizeof(mt9v111_IFPReg)); + + /* Set contents of the just created structures. */ + mt9v111_config(); + + /* Tells the i2c driver what functions to call for this driver. */ + err = i2c_add_driver(&mt9v111_i2c_driver); + if (err != 0) + pr_err("%s:driver registration failed, error=%d \n", + __func__, err); + + return err; +} + +/*! + * MT9V111 cleanup function. + * Called on rmmod mt9v111_camera.ko + * + * @return Error code indicating success or failure + */ +static void __exit mt9v111_clean(void) +{ + pr_debug("In mt9v111_clean()\n"); + + i2c_del_driver(&mt9v111_i2c_driver); + gpio_sensor_inactive(); + + if (mt9v111_device.coreReg) { + kfree(mt9v111_device.coreReg); + mt9v111_device.coreReg = NULL; + } + + if (mt9v111_device.ifpReg) { + kfree(mt9v111_device.ifpReg); + mt9v111_device.ifpReg = NULL; + } +} + +module_init(mt9v111_init); +module_exit(mt9v111_clean); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Mt9v111 Camera Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/mxc/capture/ipu_csi_enc.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/mxc/capture/ipu_csi_enc.c @@ -0,0 +1,277 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file csi_enc.c + * + * @brief CSI Use case for video capture + * + * @ingroup IPU + */ + +#include +#include +#include "mxc_v4l2_capture.h" +#include "ipu_prp_sw.h" + +#ifdef CAMERA_DBG + #define CAMERA_TRACE(x) (printk)x +#else + #define CAMERA_TRACE(x) +#endif + +/* + * Function definitions + */ + +/*! + * csi ENC callback function. + * + * @param irq int irq line + * @param dev_id void * device id + * + * @return status IRQ_HANDLED for handled + */ +static irqreturn_t csi_enc_callback(int irq, void *dev_id) +{ + cam_data *cam = (cam_data *) dev_id; + + if (cam->enc_callback == NULL) + return IRQ_HANDLED; + + cam->enc_callback(irq, dev_id); + return IRQ_HANDLED; +} + +/*! + * CSI ENC enable channel setup function + * + * @param cam struct cam_data * mxc capture instance + * + * @return status + */ +static int csi_enc_setup(cam_data *cam) +{ + ipu_channel_params_t params; + u32 pixel_fmt; + int err = 0; + dma_addr_t dummy = 0xdeadbeaf; + + CAMERA_TRACE("In csi_enc_setup\n"); + if (!cam) { + printk(KERN_ERR "cam private is NULL\n"); + return -ENXIO; + } + + memset(¶ms, 0, sizeof(ipu_channel_params_t)); + params.csi_mem.csi = cam->csi; + + if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) + pixel_fmt = IPU_PIX_FMT_YUV420P; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P) + pixel_fmt = IPU_PIX_FMT_YUV422P; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_UYVY) + pixel_fmt = IPU_PIX_FMT_UYVY; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_NV12) + pixel_fmt = IPU_PIX_FMT_NV12; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR24) + pixel_fmt = IPU_PIX_FMT_BGR24; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) + pixel_fmt = IPU_PIX_FMT_RGB24; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) + pixel_fmt = IPU_PIX_FMT_RGB565; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_BGR32) + pixel_fmt = IPU_PIX_FMT_BGR32; + else if (cam->v2f.fmt.pix.pixelformat == V4L2_PIX_FMT_RGB32) + pixel_fmt = IPU_PIX_FMT_RGB32; + else { + printk(KERN_ERR "format not supported\n"); + return -EINVAL; + } + + ipu_csi_enable_mclk_if(CSI_MCLK_ENC, cam->csi, true, true); + + err = ipu_init_channel(CSI_MEM, ¶ms); + if (err != 0) { + printk(KERN_ERR "ipu_init_channel %d\n", err); + return err; + } + + err = ipu_init_channel_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, + pixel_fmt, cam->v2f.fmt.pix.width, + cam->v2f.fmt.pix.height, + cam->v2f.fmt.pix.width, IPU_ROTATE_NONE, + dummy, dummy, + cam->offset.u_offset, + cam->offset.v_offset); + if (err != 0) { + printk(KERN_ERR "CSI_MEM output buffer\n"); + return err; + } + err = ipu_enable_channel(CSI_MEM); + if (err < 0) { + printk(KERN_ERR "ipu_enable_channel CSI_MEM\n"); + return err; + } + + return err; +} + +/*! + * function to update physical buffer address for encorder IDMA channel + * + * @param eba physical buffer address for encorder IDMA channel + * @param buffer_num int buffer 0 or buffer 1 + * + * @return status + */ +static int csi_enc_eba_update(dma_addr_t eba, int *buffer_num) +{ + int err = 0; + + pr_debug("eba %x\n", eba); + err = ipu_update_channel_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, + *buffer_num, eba); + if (err != 0) { + printk(KERN_ERR "err %d buffer_num %d\n", err, *buffer_num); + return err; + } + + ipu_select_buffer(CSI_MEM, IPU_OUTPUT_BUFFER, *buffer_num); + + *buffer_num = (*buffer_num == 0) ? 1 : 0; + + return 0; +} + +/*! + * Enable encoder task + * @param private struct cam_data * mxc capture instance + * + * @return status + */ +static int csi_enc_enabling_tasks(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + CAMERA_TRACE("IPU:In csi_enc_enabling_tasks\n"); + + err = ipu_request_irq(IPU_IRQ_CSI0_OUT_EOF, + csi_enc_callback, 0, "Mxc Camera", cam); + if (err != 0) { + printk(KERN_ERR "Error registering rot irq\n"); + return err; + } + + err = csi_enc_setup(cam); + if (err != 0) { + printk(KERN_ERR "csi_enc_setup %d\n", err); + return err; + } + + return err; +} + +/*! + * Disable encoder task + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +static int csi_enc_disabling_tasks(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + ipu_free_irq(IPU_IRQ_CSI0_OUT_EOF, cam); + + err = ipu_disable_channel(CSI_MEM, true); + + ipu_uninit_channel(CSI_MEM); + + ipu_csi_enable_mclk_if(CSI_MCLK_ENC, cam->csi, false, false); + + return err; +} + +/*! + * function to select CSI ENC as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +int csi_enc_select(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + if (cam) { + cam->enc_update_eba = csi_enc_eba_update; + cam->enc_enable = csi_enc_enabling_tasks; + cam->enc_disable = csi_enc_disabling_tasks; + } else { + err = -EIO; + } + + return err; +} + +/*! + * function to de-select CSI ENC as the working path + * + * @param private struct cam_data * mxc capture instance + * + * @return int + */ +int csi_enc_deselect(void *private) +{ + cam_data *cam = (cam_data *) private; + int err = 0; + + if (cam) { + cam->enc_update_eba = NULL; + cam->enc_enable = NULL; + cam->enc_disable = NULL; + } + + return err; +} + +/*! + * Init the Encorder channels + * + * @return Error code indicating success or failure + */ +__init int csi_enc_init(void) +{ + return 0; +} + +/*! + * Deinit the Encorder channels + * + */ +void __exit csi_enc_exit(void) +{ +} + +module_init(csi_enc_init); +module_exit(csi_enc_exit); + +EXPORT_SYMBOL(csi_enc_select); +EXPORT_SYMBOL(csi_enc_deselect); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CSI ENC Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/saa7134/saa7134-cards.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/saa7134/saa7134-cards.c @@ -3373,6 +3373,7 @@ .tuner_config = 3, .mpeg = SAA7134_MPEG_DVB, .ts_type = SAA7134_MPEG_TS_SERIAL, + .ts_force_val = 1, .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ .inputs = {{ .name = name_tv, --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/saa7134/saa7134-ts.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/saa7134/saa7134-ts.c @@ -262,11 +262,13 @@ switch (saa7134_boards[dev->board].ts_type) { case SAA7134_MPEG_TS_PARALLEL: saa_writeb(SAA7134_TS_SERIAL0, 0x40); - saa_writeb(SAA7134_TS_PARALLEL, 0xec); + saa_writeb(SAA7134_TS_PARALLEL, 0xec | + (saa7134_boards[dev->board].ts_force_val << 4)); break; case SAA7134_MPEG_TS_SERIAL: saa_writeb(SAA7134_TS_SERIAL0, 0xd8); - saa_writeb(SAA7134_TS_PARALLEL, 0x6c); + saa_writeb(SAA7134_TS_PARALLEL, 0x6c | + (saa7134_boards[dev->board].ts_force_val << 4)); saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); saa_writeb(SAA7134_TS_SERIAL1, 0x02); break; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/saa7134/saa7134.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/saa7134/saa7134.h @@ -355,6 +355,7 @@ enum saa7134_mpeg_type mpeg; enum saa7134_mpeg_ts_type ts_type; unsigned int vid_port_opts; + unsigned int ts_force_val:1; }; #define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) @@ -584,6 +585,10 @@ int nosignal; unsigned int insuspend; + /* I2C keyboard data */ + struct i2c_board_info info; + struct IR_i2c_init_data init_data; + /* SAA7134_MPEG_* */ struct saa7134_ts ts; struct saa7134_dmaqueue ts_q; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/saa7134/saa7134-input.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/saa7134/saa7134-input.c @@ -684,8 +684,6 @@ void saa7134_probe_i2c_ir(struct saa7134_dev *dev) { - struct i2c_board_info info; - struct IR_i2c_init_data init_data; const unsigned short addr_list[] = { 0x7a, 0x47, 0x71, 0x2d, I2C_CLIENT_END @@ -705,32 +703,32 @@ return; } - memset(&info, 0, sizeof(struct i2c_board_info)); - memset(&init_data, 0, sizeof(struct IR_i2c_init_data)); - strlcpy(info.type, "ir_video", I2C_NAME_SIZE); + memset(&dev->info, 0, sizeof(dev->info)); + memset(&dev->init_data, 0, sizeof(dev->init_data)); + strlcpy(dev->info.type, "ir_video", I2C_NAME_SIZE); switch (dev->board) { case SAA7134_BOARD_PINNACLE_PCTV_110i: case SAA7134_BOARD_PINNACLE_PCTV_310i: - init_data.name = "Pinnacle PCTV"; + dev->init_data.name = "Pinnacle PCTV"; if (pinnacle_remote == 0) { - init_data.get_key = get_key_pinnacle_color; - init_data.ir_codes = ir_codes_pinnacle_color; + dev->init_data.get_key = get_key_pinnacle_color; + dev->init_data.ir_codes = ir_codes_pinnacle_color; } else { - init_data.get_key = get_key_pinnacle_grey; - init_data.ir_codes = ir_codes_pinnacle_grey; + dev->init_data.get_key = get_key_pinnacle_grey; + dev->init_data.ir_codes = ir_codes_pinnacle_grey; } break; case SAA7134_BOARD_UPMOST_PURPLE_TV: - init_data.name = "Purple TV"; - init_data.get_key = get_key_purpletv; - init_data.ir_codes = ir_codes_purpletv; + dev->init_data.name = "Purple TV"; + dev->init_data.get_key = get_key_purpletv; + dev->init_data.ir_codes = ir_codes_purpletv; break; case SAA7134_BOARD_MSI_TVATANYWHERE_PLUS: - init_data.name = "MSI TV@nywhere Plus"; - init_data.get_key = get_key_msi_tvanywhere_plus; - init_data.ir_codes = ir_codes_msi_tvanywhere_plus; - info.addr = 0x30; + dev->init_data.name = "MSI TV@nywhere Plus"; + dev->init_data.get_key = get_key_msi_tvanywhere_plus; + dev->init_data.ir_codes = ir_codes_msi_tvanywhere_plus; + dev->info.addr = 0x30; /* MSI TV@nywhere Plus controller doesn't seem to respond to probes unless we read something from an existing device. Weird... @@ -741,9 +739,9 @@ (1 == rc) ? "yes" : "no"); break; case SAA7134_BOARD_HAUPPAUGE_HVR1110: - init_data.name = "HVR 1110"; - init_data.get_key = get_key_hvr1110; - init_data.ir_codes = ir_codes_hauppauge_new; + dev->init_data.name = "HVR 1110"; + dev->init_data.get_key = get_key_hvr1110; + dev->init_data.ir_codes = ir_codes_hauppauge_new; break; case SAA7134_BOARD_BEHOLD_607FM_MK3: case SAA7134_BOARD_BEHOLD_607FM_MK5: @@ -757,26 +755,26 @@ case SAA7134_BOARD_BEHOLD_M63: case SAA7134_BOARD_BEHOLD_M6_EXTRA: case SAA7134_BOARD_BEHOLD_H6: - init_data.name = "BeholdTV"; - init_data.get_key = get_key_beholdm6xx; - init_data.ir_codes = ir_codes_behold; + dev->init_data.name = "BeholdTV"; + dev->init_data.get_key = get_key_beholdm6xx; + dev->init_data.ir_codes = ir_codes_behold; break; case SAA7134_BOARD_AVERMEDIA_CARDBUS_501: case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: - info.addr = 0x40; + dev->info.addr = 0x40; break; } - if (init_data.name) - info.platform_data = &init_data; + if (dev->init_data.name) + dev->info.platform_data = &dev->init_data; /* No need to probe if address is known */ - if (info.addr) { - i2c_new_device(&dev->i2c_adap, &info); + if (dev->info.addr) { + i2c_new_device(&dev->i2c_adap, &dev->info); return; } /* Address not known, fallback to probing */ - i2c_new_probed_device(&dev->i2c_adap, &info, addr_list); + i2c_new_probed_device(&dev->i2c_adap, &dev->info, addr_list); } static int saa7134_rc5_irq(struct saa7134_dev *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/cx88/cx88-dvb.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/cx88/cx88-dvb.c @@ -696,6 +696,7 @@ } break; case CX88_BOARD_WINFAST_DTV2000H: + case CX88_BOARD_WINFAST_DTV2000H_J: case CX88_BOARD_HAUPPAUGE_HVR1100: case CX88_BOARD_HAUPPAUGE_HVR1100LP: case CX88_BOARD_HAUPPAUGE_HVR1300: --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/cx88/cx88-cards.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/cx88/cx88-cards.c @@ -1283,6 +1283,51 @@ }, .mpeg = CX88_MPEG_DVB, }, + [CX88_BOARD_WINFAST_DTV2000H_J] = { + .name = "WinFast DTV2000 H rev. J", + .tuner_type = TUNER_PHILIPS_FMD1216ME_MK3, + .radio_type = UNSET, + .tuner_addr = ADDR_UNSET, + .radio_addr = ADDR_UNSET, + .tda9887_conf = TDA9887_PRESENT, + .input = {{ + .type = CX88_VMUX_TELEVISION, + .vmux = 0, + .gpio0 = 0x00017300, + .gpio1 = 0x00008207, + .gpio2 = 0x00000000, + .gpio3 = 0x02000000, + },{ + .type = CX88_VMUX_TELEVISION, + .vmux = 0, + .gpio0 = 0x00018300, + .gpio1 = 0x0000f207, + .gpio2 = 0x00017304, + .gpio3 = 0x02000000, + },{ + .type = CX88_VMUX_COMPOSITE1, + .vmux = 1, + .gpio0 = 0x00018301, + .gpio1 = 0x0000f207, + .gpio2 = 0x00017304, + .gpio3 = 0x02000000, + },{ + .type = CX88_VMUX_SVIDEO, + .vmux = 2, + .gpio0 = 0x00018301, + .gpio1 = 0x0000f207, + .gpio2 = 0x00017304, + .gpio3 = 0x02000000, + }}, + .radio = { + .type = CX88_RADIO, + .gpio0 = 0x00015702, + .gpio1 = 0x0000f207, + .gpio2 = 0x00015702, + .gpio3 = 0x02000000, + }, + .mpeg = CX88_MPEG_DVB, + }, [CX88_BOARD_GENIATECH_DVBS] = { .name = "Geniatech DVB-S", .tuner_type = TUNER_ABSENT, @@ -2282,6 +2327,10 @@ .subdevice = 0x665e, .card = CX88_BOARD_WINFAST_DTV2000H, },{ + .subvendor = 0x107d, + .subdevice = 0x6f2b, + .card = CX88_BOARD_WINFAST_DTV2000H_J, + },{ .subvendor = 0x18ac, .subdevice = 0xd800, /* FusionHDTV 3 Gold (original revision) */ .card = CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q, --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/cx88/cx88-input.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/cx88/cx88-input.c @@ -225,6 +225,7 @@ ir->sampling = 1; break; case CX88_BOARD_WINFAST_DTV2000H: + case CX88_BOARD_WINFAST_DTV2000H_J: case CX88_BOARD_WINFAST_DTV1800H: ir_codes = ir_codes_winfast; ir->gpio_addr = MO_GP0_IO; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/cx88/cx88.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/cx88/cx88.h @@ -237,6 +237,7 @@ #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79 #define CX88_BOARD_HAUPPAUGE_IRONLY 80 #define CX88_BOARD_WINFAST_DTV1800H 81 +#define CX88_BOARD_WINFAST_DTV2000H_J 82 enum cx88_itype { CX88_VMUX_COMPOSITE1 = 1, --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/bt8xx/bttv-driver.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/bt8xx/bttv-driver.c @@ -1299,7 +1299,7 @@ tvnorm = &bttv_tvnorms[norm]; - if (!memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, + if (memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, sizeof (tvnorm->cropcap))) { bttv_crop_reset(&btv->crop[0], norm); btv->crop[1] = btv->crop[0]; /* current = default */ @@ -3798,11 +3798,34 @@ if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && (item->vb.queue.next != &btv->capture)) { item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); + /* Mike Isely - Only check + * and set up the bottom field in the logic + * below. Don't ever do the top field. This + * of course means that if we set up the + * bottom field in the above code that we'll + * actually skip a field. But that's OK. + * Having processed only a single buffer this + * time, then the next time around the first + * available buffer should be for a top field. + * That will then cause us here to set up a + * top then a bottom field in the normal way. + * The alternative to this understanding is + * that we set up the second available buffer + * as a top field, but that's out of order + * since this driver always processes the top + * field first - the effect will be the two + * buffers being returned in the wrong order, + * with the second buffer also being delayed + * by one field time (owing to the fifo nature + * of videobuf). Worse still, we'll be stuck + * doing fields out of order now every time + * until something else causes a field to be + * dropped. By effectively forcing a field to + * drop this way then we always get back into + * sync within a single frame time. (Out of + * order fields can screw up deinterlacing + * algorithms.) */ if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { - if (NULL == set->top && - V4L2_FIELD_TOP == item->vb.field) { - set->top = item; - } if (NULL == set->bottom && V4L2_FIELD_BOTTOM == item->vb.field) { set->bottom = item; --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/gspca/sonixj.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/gspca/sonixj.c @@ -727,7 +727,7 @@ {0xa1, 0x21, 0x12, 0x05, 0x00, 0x00, 0x00, 0x10}, /* Outformat = rawRGB */ {0xa1, 0x21, 0x13, 0xb8, 0x00, 0x00, 0x00, 0x10}, /* init COM8 */ - {0xd1, 0x21, 0x00, 0x01, 0x74, 0x74, 0x00, 0x10}, + {0xd1, 0x21, 0x00, 0x01, 0x74, 0x92, 0x00, 0x10}, /* GAIN BLUE RED VREF */ {0xd1, 0x21, 0x04, 0x00, 0x7d, 0x62, 0x00, 0x10}, /* COM 1 BAVE GEAVE AECHH */ @@ -783,7 +783,7 @@ {0xc1, 0x21, 0x88, 0xaf, 0xc7, 0xdf, 0x00, 0x10}, /* gamma curve */ {0xc1, 0x21, 0x8b, 0x99, 0x99, 0xcf, 0x00, 0x10}, /* reserved */ {0xb1, 0x21, 0x92, 0x00, 0x00, 0x00, 0x00, 0x10}, /* DM_LNL/H */ - {0xb1, 0x21, 0xa1, 0x00, 0x00, 0x00, 0x00, 0x10}, + {0xa1, 0x21, 0xa1, 0x00, 0x00, 0x00, 0x00, 0x10}, /****** (some exchanges in the win trace) ******/ {0xa1, 0x21, 0x1e, 0x01, 0x00, 0x00, 0x00, 0x10}, /* MVFP */ /* bits[3..0]reserved */ @@ -1145,17 +1145,12 @@ reg_w1(gspca_dev, 0x01, 0x42); break; case SENSOR_OV7660: - reg_w1(gspca_dev, 0x01, 0x61); - reg_w1(gspca_dev, 0x17, 0x20); - reg_w1(gspca_dev, 0x01, 0x60); - reg_w1(gspca_dev, 0x01, 0x40); - break; case SENSOR_SP80708: reg_w1(gspca_dev, 0x01, 0x63); reg_w1(gspca_dev, 0x17, 0x20); reg_w1(gspca_dev, 0x01, 0x62); reg_w1(gspca_dev, 0x01, 0x42); - mdelay(100); + msleep(100); reg_w1(gspca_dev, 0x02, 0x62); break; /* case SENSOR_HV7131R: */ @@ -1624,6 +1619,8 @@ static void setinfrared(struct sd *sd) { + if (sd->gspca_dev.ctrl_dis & (1 << INFRARED_IDX)) + return; /*fixme: different sequence for StarCam Clip and StarCam 370i */ /* Clip */ i2c_w1(&sd->gspca_dev, 0x02, /* gpio */ @@ -1637,16 +1634,19 @@ if (gspca_dev->ctrl_dis & (1 << FREQ_IDX)) return; if (sd->sensor == SENSOR_OV7660) { + u8 com8; + + com8 = 0xdf; /* auto gain/wb/expo */ switch (sd->freq) { case 0: /* Banding filter disabled */ - i2c_w1(gspca_dev, 0x13, 0xdf); + i2c_w1(gspca_dev, 0x13, com8 | 0x20); break; case 1: /* 50 hz */ - i2c_w1(gspca_dev, 0x13, 0xff); + i2c_w1(gspca_dev, 0x13, com8); i2c_w1(gspca_dev, 0x3b, 0x0a); break; case 2: /* 60 hz */ - i2c_w1(gspca_dev, 0x13, 0xff); + i2c_w1(gspca_dev, 0x13, com8); i2c_w1(gspca_dev, 0x3b, 0x02); break; } @@ -1796,12 +1796,6 @@ reg_w1(gspca_dev, 0x99, 0x60); break; case SENSOR_OV7660: - reg_w1(gspca_dev, 0x9a, 0x05); - if (sd->bridge == BRIDGE_SN9C105) - reg_w1(gspca_dev, 0x99, 0xff); - else - reg_w1(gspca_dev, 0x99, 0x5b); - break; case SENSOR_SP80708: reg_w1(gspca_dev, 0x9a, 0x05); reg_w1(gspca_dev, 0x99, 0x59); @@ -2325,18 +2319,19 @@ {USB_DEVICE(0x0c45, 0x607c), BSI(SN9C102P, HV7131R, 0x11)}, /* {USB_DEVICE(0x0c45, 0x607e), BSI(SN9C102P, OV7630, 0x??)}, */ {USB_DEVICE(0x0c45, 0x60c0), BSI(SN9C105, MI0360, 0x5d)}, -/* {USB_DEVICE(0x0c45, 0x60c8), BSI(SN9C105, OM6801, 0x??)}, */ +/* {USB_DEVICE(0x0c45, 0x60c8), BSI(SN9C105, OM6802, 0x??)}, */ /* {USB_DEVICE(0x0c45, 0x60cc), BSI(SN9C105, HV7131GP, 0x??)}, */ {USB_DEVICE(0x0c45, 0x60ec), BSI(SN9C105, MO4000, 0x21)}, /* {USB_DEVICE(0x0c45, 0x60ef), BSI(SN9C105, ICM105C, 0x??)}, */ /* {USB_DEVICE(0x0c45, 0x60fa), BSI(SN9C105, OV7648, 0x??)}, */ {USB_DEVICE(0x0c45, 0x60fb), BSI(SN9C105, OV7660, 0x21)}, - {USB_DEVICE(0x0c45, 0x60fc), BSI(SN9C105, HV7131R, 0x11)}, #if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE + {USB_DEVICE(0x0c45, 0x60fc), BSI(SN9C105, HV7131R, 0x11)}, {USB_DEVICE(0x0c45, 0x60fe), BSI(SN9C105, OV7630, 0x21)}, #endif {USB_DEVICE(0x0c45, 0x6100), BSI(SN9C120, MI0360, 0x5d)}, /*sn9c128*/ -/* {USB_DEVICE(0x0c45, 0x6108), BSI(SN9C120, OM6801, 0x??)}, */ +/* {USB_DEVICE(0x0c45, 0x6102), BSI(SN9C120, PO2030N, ??)}, */ +/* {USB_DEVICE(0x0c45, 0x6108), BSI(SN9C120, OM6802, 0x21)}, */ {USB_DEVICE(0x0c45, 0x610a), BSI(SN9C120, OV7648, 0x21)}, /*sn9c128*/ {USB_DEVICE(0x0c45, 0x610b), BSI(SN9C120, OV7660, 0x21)}, /*sn9c128*/ {USB_DEVICE(0x0c45, 0x610c), BSI(SN9C120, HV7131R, 0x11)}, /*sn9c128*/ @@ -2352,6 +2347,7 @@ #if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE {USB_DEVICE(0x0c45, 0x6130), BSI(SN9C120, MI0360, 0x5d)}, #endif +/* {USB_DEVICE(0x0c45, 0x6132), BSI(SN9C120, OV7670, 0x21)}, */ {USB_DEVICE(0x0c45, 0x6138), BSI(SN9C120, MO4000, 0x21)}, {USB_DEVICE(0x0c45, 0x613a), BSI(SN9C120, OV7648, 0x21)}, #if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE @@ -2359,7 +2355,9 @@ #endif {USB_DEVICE(0x0c45, 0x613c), BSI(SN9C120, HV7131R, 0x11)}, {USB_DEVICE(0x0c45, 0x613e), BSI(SN9C120, OV7630, 0x21)}, - {USB_DEVICE(0x0c45, 0x6143), BSI(SN9C120, SP80708, 0x18)}, +/* {USB_DEVICE(0x0c45, 0x6142), BSI(SN9C120, PO2030N, ??)}, *sn9c120b*/ + {USB_DEVICE(0x0c45, 0x6143), BSI(SN9C120, SP80708, 0x18)}, /*sn9c120b*/ + {USB_DEVICE(0x0c45, 0x6148), BSI(SN9C120, OM6802, 0x21)}, /*sn9c120b*/ {} }; MODULE_DEVICE_TABLE(usb, device_table); --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/gspca/vc032x.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/gspca/vc032x.c @@ -424,208 +424,92 @@ static const __u8 mi1310_socinitVGA_JPG[][4] = { {0xb0, 0x03, 0x19, 0xcc}, {0xb0, 0x04, 0x02, 0xcc}, - {0xb3, 0x00, 0x24, 0xcc}, - {0xb3, 0x00, 0x25, 0xcc}, - {0xb3, 0x05, 0x01, 0xcc}, - {0xb3, 0x06, 0x03, 0xcc}, - {0xb3, 0x5c, 0x01, 0xcc}, + {0xb3, 0x00, 0x64, 0xcc}, + {0xb3, 0x00, 0x65, 0xcc}, + {0xb3, 0x05, 0x00, 0xcc}, + {0xb3, 0x06, 0x00, 0xcc}, {0xb3, 0x08, 0x01, 0xcc}, {0xb3, 0x09, 0x0c, 0xcc}, {0xb3, 0x34, 0x02, 0xcc}, {0xb3, 0x35, 0xdd, 0xcc}, + {0xb3, 0x02, 0x00, 0xcc}, {0xb3, 0x03, 0x0a, 0xcc}, - {0xb3, 0x04, 0x0d, 0xcc}, + {0xb3, 0x04, 0x05, 0xcc}, {0xb3, 0x20, 0x00, 0xcc}, {0xb3, 0x21, 0x00, 0xcc}, - {0xb3, 0x22, 0x01, 0xcc}, - {0xb3, 0x23, 0xe0, 0xcc}, + {0xb3, 0x22, 0x03, 0xcc}, + {0xb3, 0x23, 0xc0, 0xcc}, {0xb3, 0x14, 0x00, 0xcc}, {0xb3, 0x15, 0x00, 0xcc}, - {0xb3, 0x16, 0x02, 0xcc}, - {0xb3, 0x17, 0x7f, 0xcc}, - {0xb8, 0x01, 0x7d, 0xcc}, - {0xb8, 0x81, 0x09, 0xcc}, - {0xb8, 0x27, 0x20, 0xcc}, - {0xb8, 0x26, 0x80, 0xcc}, - {0xb3, 0x00, 0x25, 0xcc}, - {0xb8, 0x00, 0x13, 0xcc}, - {0xbc, 0x00, 0x71, 0xcc}, - {0xb8, 0x81, 0x01, 0xcc}, - {0xb8, 0x2c, 0x5a, 0xcc}, - {0xb8, 0x2d, 0xff, 0xcc}, - {0xb8, 0x2e, 0xee, 0xcc}, - {0xb8, 0x2f, 0xfb, 0xcc}, - {0xb8, 0x30, 0x52, 0xcc}, - {0xb8, 0x31, 0xf8, 0xcc}, - {0xb8, 0x32, 0xf1, 0xcc}, - {0xb8, 0x33, 0xff, 0xcc}, - {0xb8, 0x34, 0x54, 0xcc}, - {0xb8, 0x35, 0x00, 0xcc}, - {0xb8, 0x36, 0x00, 0xcc}, - {0xb8, 0x37, 0x00, 0xcc}, + {0xb3, 0x16, 0x04, 0xcc}, + {0xb3, 0x17, 0xff, 0xcc}, + {0xb3, 0x00, 0x65, 0xcc}, + {0xb8, 0x00, 0x00, 0xcc}, + {0xbc, 0x00, 0xd0, 0xcc}, + {0xbc, 0x01, 0x01, 0xcc}, + {0xf0, 0x00, 0x02, 0xbb}, + {0xc8, 0x9f, 0x0b, 0xbb}, + {0x5b, 0x00, 0x01, 0xbb}, + {0x2f, 0xde, 0x20, 0xbb}, {0xf0, 0x00, 0x00, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x0d, 0x00, 0x09, 0xbb}, - {0x0d, 0x00, 0x08, 0xbb}, + {0x20, 0x03, 0x02, 0xbb}, {0xf0, 0x00, 0x01, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x06, 0x00, 0x14, 0xbb}, - {0x3a, 0x10, 0x00, 0xbb}, - {0x00, 0x00, 0x10, 0xdd}, - {0x9b, 0x10, 0x00, 0xbb}, - {0x00, 0x00, 0x10, 0xdd}, + {0x05, 0x00, 0x07, 0xbb}, + {0x34, 0x00, 0x00, 0xbb}, + {0x35, 0xff, 0x00, 0xbb}, + {0xdc, 0x07, 0x02, 0xbb}, + {0xdd, 0x3c, 0x18, 0xbb}, + {0xde, 0x92, 0x6d, 0xbb}, + {0xdf, 0xcd, 0xb1, 0xbb}, + {0xe0, 0xff, 0xe7, 0xbb}, + {0x06, 0xf0, 0x0d, 0xbb}, + {0x06, 0x70, 0x0e, 0xbb}, + {0x4c, 0x00, 0x01, 0xbb}, + {0x4d, 0x00, 0x01, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, + {0x2e, 0x0c, 0x55, 0xbb}, + {0x21, 0xb6, 0x6e, 0xbb}, + {0x36, 0x30, 0x10, 0xbb}, + {0x37, 0x00, 0xc1, 0xbb}, {0xf0, 0x00, 0x00, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x2b, 0x00, 0x28, 0xbb}, - {0x2c, 0x00, 0x30, 0xbb}, - {0x2d, 0x00, 0x30, 0xbb}, - {0x2e, 0x00, 0x28, 0xbb}, - {0x41, 0x00, 0xd7, 0xbb}, - {0x09, 0x02, 0x3a, 0xbb}, - {0x0c, 0x00, 0x00, 0xbb}, - {0x20, 0x00, 0x00, 0xbb}, - {0x05, 0x00, 0x8c, 0xbb}, - {0x06, 0x00, 0x32, 0xbb}, - {0x07, 0x00, 0xc6, 0xbb}, - {0x08, 0x00, 0x19, 0xbb}, - {0x24, 0x80, 0x6f, 0xbb}, - {0xc8, 0x00, 0x0f, 0xbb}, - {0x20, 0x00, 0x0f, 0xbb}, + {0x07, 0x00, 0x84, 0xbb}, + {0x08, 0x02, 0x4a, 0xbb}, + {0x05, 0x01, 0x10, 0xbb}, + {0x06, 0x00, 0x39, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, + {0x58, 0x02, 0x67, 0xbb}, + {0x57, 0x02, 0x00, 0xbb}, + {0x5a, 0x02, 0x67, 0xbb}, + {0x59, 0x02, 0x00, 0xbb}, + {0x5c, 0x12, 0x0d, 0xbb}, + {0x5d, 0x16, 0x11, 0xbb}, + {0x39, 0x06, 0x18, 0xbb}, + {0x3a, 0x06, 0x18, 0xbb}, + {0x3b, 0x06, 0x18, 0xbb}, + {0x3c, 0x06, 0x18, 0xbb}, + {0x64, 0x7b, 0x5b, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, + {0x36, 0x30, 0x10, 0xbb}, + {0x37, 0x00, 0xc0, 0xbb}, + {0xbc, 0x0e, 0x00, 0xcc}, + {0xbc, 0x0f, 0x05, 0xcc}, + {0xbc, 0x10, 0xc0, 0xcc}, + {0xbc, 0x11, 0x03, 0xcc}, {0xb6, 0x00, 0x00, 0xcc}, {0xb6, 0x03, 0x02, 0xcc}, {0xb6, 0x02, 0x80, 0xcc}, {0xb6, 0x05, 0x01, 0xcc}, {0xb6, 0x04, 0xe0, 0xcc}, - {0xb6, 0x12, 0x78, 0xcc}, + {0xb6, 0x12, 0xf8, 0xcc}, + {0xb6, 0x13, 0x25, 0xcc}, {0xb6, 0x18, 0x02, 0xcc}, {0xb6, 0x17, 0x58, 0xcc}, {0xb6, 0x16, 0x00, 0xcc}, {0xb6, 0x22, 0x12, 0xcc}, {0xb6, 0x23, 0x0b, 0xcc}, - {0xb3, 0x02, 0x02, 0xcc}, {0xbf, 0xc0, 0x39, 0xcc}, {0xbf, 0xc1, 0x04, 0xcc}, - {0xbf, 0xcc, 0x10, 0xcc}, - {0xb9, 0x12, 0x00, 0xcc}, - {0xb9, 0x13, 0x0a, 0xcc}, - {0xb9, 0x14, 0x0a, 0xcc}, - {0xb9, 0x15, 0x0a, 0xcc}, - {0xb9, 0x16, 0x0a, 0xcc}, - {0xb9, 0x18, 0x00, 0xcc}, - {0xb9, 0x19, 0x0f, 0xcc}, - {0xb9, 0x1a, 0x0f, 0xcc}, - {0xb9, 0x1b, 0x0f, 0xcc}, - {0xb9, 0x1c, 0x0f, 0xcc}, - {0xb8, 0x8e, 0x00, 0xcc}, - {0xb8, 0x8f, 0xff, 0xcc}, - {0xb3, 0x01, 0x41, 0xcc}, - {0x03, 0x03, 0xc0, 0xbb}, - {0x06, 0x00, 0x10, 0xbb}, - {0xb6, 0x12, 0xf8, 0xcc}, - {0xb8, 0x0c, 0x20, 0xcc}, - {0xb8, 0x0d, 0x70, 0xcc}, - {0xb6, 0x13, 0x13, 0xcc}, - {0x2f, 0x00, 0xC0, 0xbb}, - {0xb8, 0xa0, 0x12, 0xcc}, - {}, -}; -static const __u8 mi1310_socinitQVGA_JPG[][4] = { - {0xb0, 0x03, 0x19, 0xcc}, - {0xb0, 0x04, 0x02, 0xcc}, - {0xb3, 0x00, 0x24, 0xcc}, - {0xb3, 0x00, 0x25, 0xcc}, - {0xb3, 0x05, 0x01, 0xcc}, - {0xb3, 0x06, 0x03, 0xcc}, - {0xb3, 0x5c, 0x01, 0xcc}, - {0xb3, 0x08, 0x01, 0xcc}, - {0xb3, 0x09, 0x0c, 0xcc}, - {0xb3, 0x34, 0x02, 0xcc}, - {0xb3, 0x35, 0xdd, 0xcc}, - {0xb3, 0x03, 0x0a, 0xcc}, - {0xb3, 0x04, 0x0d, 0xcc}, - {0xb3, 0x20, 0x00, 0xcc}, - {0xb3, 0x21, 0x00, 0xcc}, - {0xb3, 0x22, 0x01, 0xcc}, - {0xb3, 0x23, 0xe0, 0xcc}, - {0xb3, 0x14, 0x00, 0xcc}, - {0xb3, 0x15, 0x00, 0xcc}, - {0xb3, 0x16, 0x02, 0xcc}, - {0xb3, 0x17, 0x7f, 0xcc}, - {0xb8, 0x01, 0x7d, 0xcc}, - {0xb8, 0x81, 0x09, 0xcc}, - {0xb8, 0x27, 0x20, 0xcc}, - {0xb8, 0x26, 0x80, 0xcc}, - {0xb3, 0x00, 0x25, 0xcc}, - {0xb8, 0x00, 0x13, 0xcc}, - {0xbc, 0x00, 0xd1, 0xcc}, - {0xb8, 0x81, 0x01, 0xcc}, - {0xb8, 0x2c, 0x5a, 0xcc}, - {0xb8, 0x2d, 0xff, 0xcc}, - {0xb8, 0x2e, 0xee, 0xcc}, - {0xb8, 0x2f, 0xfb, 0xcc}, - {0xb8, 0x30, 0x52, 0xcc}, - {0xb8, 0x31, 0xf8, 0xcc}, - {0xb8, 0x32, 0xf1, 0xcc}, - {0xb8, 0x33, 0xff, 0xcc}, - {0xb8, 0x34, 0x54, 0xcc}, - {0xb8, 0x35, 0x00, 0xcc}, - {0xb8, 0x36, 0x00, 0xcc}, - {0xb8, 0x37, 0x00, 0xcc}, - {0xf0, 0x00, 0x00, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x0d, 0x00, 0x09, 0xbb}, - {0x0d, 0x00, 0x08, 0xbb}, - {0xf0, 0x00, 0x01, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x06, 0x00, 0x14, 0xbb}, - {0x3a, 0x10, 0x00, 0xbb}, - {0x00, 0x00, 0x10, 0xdd}, - {0x9b, 0x10, 0x00, 0xbb}, - {0x00, 0x00, 0x10, 0xdd}, - {0xf0, 0x00, 0x00, 0xbb}, - {0x00, 0x01, 0x00, 0xdd}, - {0x2b, 0x00, 0x28, 0xbb}, - {0x2c, 0x00, 0x30, 0xbb}, - {0x2d, 0x00, 0x30, 0xbb}, - {0x2e, 0x00, 0x28, 0xbb}, - {0x41, 0x00, 0xd7, 0xbb}, - {0x09, 0x02, 0x3a, 0xbb}, - {0x0c, 0x00, 0x00, 0xbb}, - {0x20, 0x00, 0x00, 0xbb}, - {0x05, 0x00, 0x8c, 0xbb}, - {0x06, 0x00, 0x32, 0xbb}, - {0x07, 0x00, 0xc6, 0xbb}, - {0x08, 0x00, 0x19, 0xbb}, - {0x24, 0x80, 0x6f, 0xbb}, - {0xc8, 0x00, 0x0f, 0xbb}, - {0x20, 0x00, 0x0f, 0xbb}, - {0xb6, 0x00, 0x00, 0xcc}, - {0xb6, 0x03, 0x01, 0xcc}, - {0xb6, 0x02, 0x40, 0xcc}, - {0xb6, 0x05, 0x00, 0xcc}, - {0xb6, 0x04, 0xf0, 0xcc}, - {0xb6, 0x12, 0x78, 0xcc}, - {0xb6, 0x18, 0x00, 0xcc}, - {0xb6, 0x17, 0x96, 0xcc}, - {0xb6, 0x16, 0x00, 0xcc}, - {0xb6, 0x22, 0x12, 0xcc}, - {0xb6, 0x23, 0x0b, 0xcc}, - {0xb3, 0x02, 0x02, 0xcc}, - {0xbf, 0xc0, 0x39, 0xcc}, - {0xbf, 0xc1, 0x04, 0xcc}, - {0xbf, 0xcc, 0x10, 0xcc}, - {0xb9, 0x12, 0x00, 0xcc}, - {0xb9, 0x13, 0x0a, 0xcc}, - {0xb9, 0x14, 0x0a, 0xcc}, - {0xb9, 0x15, 0x0a, 0xcc}, - {0xb9, 0x16, 0x0a, 0xcc}, - {0xb9, 0x18, 0x00, 0xcc}, - {0xb9, 0x19, 0x0f, 0xcc}, - {0xb9, 0x1a, 0x0f, 0xcc}, - {0xb9, 0x1b, 0x0f, 0xcc}, - {0xb9, 0x1c, 0x0f, 0xcc}, - {0xb8, 0x8e, 0x00, 0xcc}, - {0xb8, 0x8f, 0xff, 0xcc}, + {0xbf, 0xcc, 0x00, 0xcc}, {0xbc, 0x02, 0x18, 0xcc}, {0xbc, 0x03, 0x50, 0xcc}, {0xbc, 0x04, 0x18, 0xcc}, @@ -636,15 +520,130 @@ {0xbc, 0x0a, 0x10, 0xcc}, {0xbc, 0x0b, 0x00, 0xcc}, {0xbc, 0x0c, 0x00, 0xcc}, + {0xb3, 0x5c, 0x01, 0xcc}, + {0xf0, 0x00, 0x01, 0xbb}, + {0x80, 0x00, 0x03, 0xbb}, + {0x81, 0xc7, 0x14, 0xbb}, + {0x82, 0xeb, 0xe8, 0xbb}, + {0x83, 0xfe, 0xf4, 0xbb}, + {0x84, 0xcd, 0x10, 0xbb}, + {0x85, 0xf3, 0xee, 0xbb}, + {0x86, 0xff, 0xf1, 0xbb}, + {0x87, 0xcd, 0x10, 0xbb}, + {0x88, 0xf3, 0xee, 0xbb}, + {0x89, 0x01, 0xf1, 0xbb}, + {0x8a, 0xe5, 0x17, 0xbb}, + {0x8b, 0xe8, 0xe2, 0xbb}, + {0x8c, 0xf7, 0xed, 0xbb}, + {0x8d, 0x00, 0xff, 0xbb}, + {0x8e, 0xec, 0x10, 0xbb}, + {0x8f, 0xf0, 0xed, 0xbb}, + {0x90, 0xf9, 0xf2, 0xbb}, + {0x91, 0x00, 0x00, 0xbb}, + {0x92, 0xe9, 0x0d, 0xbb}, + {0x93, 0xf4, 0xf2, 0xbb}, + {0x94, 0xfb, 0xf5, 0xbb}, + {0x95, 0x00, 0xff, 0xbb}, + {0xb6, 0x0f, 0x08, 0xbb}, + {0xb7, 0x3d, 0x16, 0xbb}, + {0xb8, 0x0c, 0x04, 0xbb}, + {0xb9, 0x1c, 0x07, 0xbb}, + {0xba, 0x0a, 0x03, 0xbb}, + {0xbb, 0x1b, 0x09, 0xbb}, + {0xbc, 0x17, 0x0d, 0xbb}, + {0xbd, 0x23, 0x1d, 0xbb}, + {0xbe, 0x00, 0x28, 0xbb}, + {0xbf, 0x11, 0x09, 0xbb}, + {0xc0, 0x16, 0x15, 0xbb}, + {0xc1, 0x00, 0x1b, 0xbb}, + {0xc2, 0x0e, 0x07, 0xbb}, + {0xc3, 0x14, 0x10, 0xbb}, + {0xc4, 0x00, 0x17, 0xbb}, + {0x06, 0x74, 0x8e, 0xbb}, + {0xf0, 0x00, 0x01, 0xbb}, + {0x06, 0xf4, 0x8e, 0xbb}, + {0x00, 0x00, 0x50, 0xdd}, + {0x06, 0x74, 0x8e, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, + {0x24, 0x50, 0x20, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, + {0x34, 0x0c, 0x50, 0xbb}, {0xb3, 0x01, 0x41, 0xcc}, + {0xf0, 0x00, 0x00, 0xbb}, + {0x03, 0x03, 0xc0, 0xbb}, + {}, +}; +static const __u8 mi1310_socinitQVGA_JPG[][4] = { + {0xb0, 0x03, 0x19, 0xcc}, {0xb0, 0x04, 0x02, 0xcc}, + {0xb3, 0x00, 0x64, 0xcc}, {0xb3, 0x00, 0x65, 0xcc}, + {0xb3, 0x05, 0x00, 0xcc}, {0xb3, 0x06, 0x00, 0xcc}, + {0xb3, 0x08, 0x01, 0xcc}, {0xb3, 0x09, 0x0c, 0xcc}, + {0xb3, 0x34, 0x02, 0xcc}, {0xb3, 0x35, 0xdd, 0xcc}, + {0xb3, 0x02, 0x00, 0xcc}, {0xb3, 0x03, 0x0a, 0xcc}, + {0xb3, 0x04, 0x05, 0xcc}, {0xb3, 0x20, 0x00, 0xcc}, + {0xb3, 0x21, 0x00, 0xcc}, {0xb3, 0x22, 0x03, 0xcc}, + {0xb3, 0x23, 0xc0, 0xcc}, {0xb3, 0x14, 0x00, 0xcc}, + {0xb3, 0x15, 0x00, 0xcc}, {0xb3, 0x16, 0x04, 0xcc}, + {0xb3, 0x17, 0xff, 0xcc}, {0xb3, 0x00, 0x65, 0xcc}, + {0xb8, 0x00, 0x00, 0xcc}, {0xbc, 0x00, 0xf0, 0xcc}, + {0xbc, 0x01, 0x01, 0xcc}, {0xf0, 0x00, 0x02, 0xbb}, + {0xc8, 0x9f, 0x0b, 0xbb}, {0x5b, 0x00, 0x01, 0xbb}, + {0x2f, 0xde, 0x20, 0xbb}, {0xf0, 0x00, 0x00, 0xbb}, + {0x20, 0x03, 0x02, 0xbb}, {0xf0, 0x00, 0x01, 0xbb}, + {0x05, 0x00, 0x07, 0xbb}, {0x34, 0x00, 0x00, 0xbb}, + {0x35, 0xff, 0x00, 0xbb}, {0xdc, 0x07, 0x02, 0xbb}, + {0xdd, 0x3c, 0x18, 0xbb}, {0xde, 0x92, 0x6d, 0xbb}, + {0xdf, 0xcd, 0xb1, 0xbb}, {0xe0, 0xff, 0xe7, 0xbb}, + {0x06, 0xf0, 0x0d, 0xbb}, {0x06, 0x70, 0x0e, 0xbb}, + {0x4c, 0x00, 0x01, 0xbb}, {0x4d, 0x00, 0x01, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, {0x2e, 0x0c, 0x55, 0xbb}, + {0x21, 0xb6, 0x6e, 0xbb}, {0x36, 0x30, 0x10, 0xbb}, + {0x37, 0x00, 0xc1, 0xbb}, {0xf0, 0x00, 0x00, 0xbb}, + {0x07, 0x00, 0x84, 0xbb}, {0x08, 0x02, 0x4a, 0xbb}, + {0x05, 0x01, 0x10, 0xbb}, {0x06, 0x00, 0x39, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, {0x58, 0x02, 0x67, 0xbb}, + {0x57, 0x02, 0x00, 0xbb}, {0x5a, 0x02, 0x67, 0xbb}, + {0x59, 0x02, 0x00, 0xbb}, {0x5c, 0x12, 0x0d, 0xbb}, + {0x5d, 0x16, 0x11, 0xbb}, {0x39, 0x06, 0x18, 0xbb}, + {0x3a, 0x06, 0x18, 0xbb}, {0x3b, 0x06, 0x18, 0xbb}, + {0x3c, 0x06, 0x18, 0xbb}, {0x64, 0x7b, 0x5b, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, {0x36, 0x30, 0x10, 0xbb}, + {0x37, 0x00, 0xc0, 0xbb}, {0xbc, 0x0e, 0x00, 0xcc}, + {0xbc, 0x0f, 0x05, 0xcc}, {0xbc, 0x10, 0xc0, 0xcc}, + {0xbc, 0x11, 0x03, 0xcc}, {0xb6, 0x00, 0x00, 0xcc}, + {0xb6, 0x03, 0x01, 0xcc}, {0xb6, 0x02, 0x40, 0xcc}, + {0xb6, 0x05, 0x00, 0xcc}, {0xb6, 0x04, 0xf0, 0xcc}, + {0xb6, 0x12, 0xf8, 0xcc}, {0xb6, 0x13, 0x25, 0xcc}, + {0xb6, 0x18, 0x00, 0xcc}, {0xb6, 0x17, 0x96, 0xcc}, + {0xb6, 0x16, 0x00, 0xcc}, {0xb6, 0x22, 0x12, 0xcc}, + {0xb6, 0x23, 0x0b, 0xcc}, {0xbf, 0xc0, 0x39, 0xcc}, + {0xbf, 0xc1, 0x04, 0xcc}, {0xbf, 0xcc, 0x00, 0xcc}, + {0xb3, 0x5c, 0x01, 0xcc}, {0xf0, 0x00, 0x01, 0xbb}, + {0x80, 0x00, 0x03, 0xbb}, {0x81, 0xc7, 0x14, 0xbb}, + {0x82, 0xeb, 0xe8, 0xbb}, {0x83, 0xfe, 0xf4, 0xbb}, + {0x84, 0xcd, 0x10, 0xbb}, {0x85, 0xf3, 0xee, 0xbb}, + {0x86, 0xff, 0xf1, 0xbb}, {0x87, 0xcd, 0x10, 0xbb}, + {0x88, 0xf3, 0xee, 0xbb}, {0x89, 0x01, 0xf1, 0xbb}, + {0x8a, 0xe5, 0x17, 0xbb}, {0x8b, 0xe8, 0xe2, 0xbb}, + {0x8c, 0xf7, 0xed, 0xbb}, {0x8d, 0x00, 0xff, 0xbb}, + {0x8e, 0xec, 0x10, 0xbb}, {0x8f, 0xf0, 0xed, 0xbb}, + {0x90, 0xf9, 0xf2, 0xbb}, {0x91, 0x00, 0x00, 0xbb}, + {0x92, 0xe9, 0x0d, 0xbb}, {0x93, 0xf4, 0xf2, 0xbb}, + {0x94, 0xfb, 0xf5, 0xbb}, {0x95, 0x00, 0xff, 0xbb}, + {0xb6, 0x0f, 0x08, 0xbb}, {0xb7, 0x3d, 0x16, 0xbb}, + {0xb8, 0x0c, 0x04, 0xbb}, {0xb9, 0x1c, 0x07, 0xbb}, + {0xba, 0x0a, 0x03, 0xbb}, {0xbb, 0x1b, 0x09, 0xbb}, + {0xbc, 0x17, 0x0d, 0xbb}, {0xbd, 0x23, 0x1d, 0xbb}, + {0xbe, 0x00, 0x28, 0xbb}, {0xbf, 0x11, 0x09, 0xbb}, + {0xc0, 0x16, 0x15, 0xbb}, {0xc1, 0x00, 0x1b, 0xbb}, + {0xc2, 0x0e, 0x07, 0xbb}, {0xc3, 0x14, 0x10, 0xbb}, + {0xc4, 0x00, 0x17, 0xbb}, {0x06, 0x74, 0x8e, 0xbb}, + {0xf0, 0x00, 0x01, 0xbb}, {0x06, 0xf4, 0x8e, 0xbb}, + {0x00, 0x00, 0x50, 0xdd}, {0x06, 0x74, 0x8e, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, {0x24, 0x50, 0x20, 0xbb}, + {0xf0, 0x00, 0x02, 0xbb}, {0x34, 0x0c, 0x50, 0xbb}, + {0xb3, 0x01, 0x41, 0xcc}, {0xf0, 0x00, 0x00, 0xbb}, {0x03, 0x03, 0xc0, 0xbb}, - {0x06, 0x00, 0x10, 0xbb}, - {0xb6, 0x12, 0xf8, 0xcc}, - {0xb8, 0x0c, 0x20, 0xcc}, - {0xb8, 0x0d, 0x70, 0xcc}, - {0xb6, 0x13, 0x13, 0xcc}, - {0x2f, 0x00, 0xC0, 0xbb}, - {0xb8, 0xa0, 0x12, 0xcc}, {}, }; static const u8 mi1310_soc_InitSXGA_JPG[][4] = { @@ -2514,7 +2513,8 @@ break; case SENSOR_MI1310_SOC: cam->cam_mode = vc0323_mode; - cam->nmodes = ARRAY_SIZE(vc0323_mode); + /* TODO: 1280x1024 resolution setting is incorrect, so don't export it now*/ + cam->nmodes = ARRAY_SIZE(vc0323_mode) - 1; break; case SENSOR_MI1320_SOC: cam->cam_mode = bi_mode; @@ -2737,15 +2737,20 @@ put_tab_to_reg(gspca_dev, MatrixT, 9, 0xb82c); /* set the led on 0x0892 0x0896 */ - if (sd->sensor != SENSOR_PO1200) { - reg_w(gspca_dev->dev, 0x89, 0xffff, 0xfdff); + if (sd->sensor == SENSOR_PO1200) { + setsharpness(gspca_dev); + sethvflip(gspca_dev); + reg_w(gspca_dev->dev, 0x89, 0x0400, 0x1415); + } else if (sd->sensor == SENSOR_MI1310_SOC) { + reg_w(gspca_dev->dev, 0x89, 0x058c, 0x0000); msleep(100); sethvflip(gspca_dev); setlightfreq(gspca_dev); } else { - setsharpness(gspca_dev); + reg_w(gspca_dev->dev, 0x89, 0xffff, 0xfdff); + msleep(100); sethvflip(gspca_dev); - reg_w(gspca_dev->dev, 0x89, 0x0400, 0x1415); + setlightfreq(gspca_dev); } } return 0; @@ -2754,8 +2759,12 @@ static void sd_stopN(struct gspca_dev *gspca_dev) { struct usb_device *dev = gspca_dev->dev; + struct sd *sd = (struct sd *) gspca_dev; - reg_w(dev, 0x89, 0xffff, 0xffff); + if( sd->sensor == SENSOR_MI1310_SOC) + reg_w(dev, 0x89, 0x058c, 0x00ff); + else + reg_w(dev, 0x89, 0xffff, 0xffff); reg_w(dev, 0xa0, 0x01, 0xb301); reg_w(dev, 0xa0, 0x09, 0xb003); } @@ -2764,10 +2773,14 @@ static void sd_stop0(struct gspca_dev *gspca_dev) { struct usb_device *dev = gspca_dev->dev; + struct sd *sd = (struct sd *) gspca_dev; if (!gspca_dev->present) return; - reg_w(dev, 0x89, 0xffff, 0xffff); + if( sd->sensor == SENSOR_MI1310_SOC) + reg_w(dev, 0x89, 0x058c, 0x00ff); + else + reg_w(dev, 0x89, 0xffff, 0xffff); } static void sd_pkt_scan(struct gspca_dev *gspca_dev, --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/gspca/ov519.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/gspca/ov519.c @@ -3364,6 +3364,7 @@ {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, + {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/gspca/m5602/m5602_s5k4aa.c +++ linux-fsl-imx51-2.6.31/drivers/media/video/gspca/m5602/m5602_s5k4aa.c @@ -35,12 +35,25 @@ const struct dmi_system_id s5k4aa_vflip_dmi_table[] = { { + .ident = "BRUNEINIT", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "BRUNENIT"), + DMI_MATCH(DMI_PRODUCT_NAME, "BRUNENIT"), + DMI_MATCH(DMI_BOARD_VERSION, "00030D0000000001") + } + }, { .ident = "Fujitsu-Siemens Amilo Xa 2528", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") } }, { + .ident = "Fujitsu-Siemens Amilo Xi 2528", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), + DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2528") + } + }, { .ident = "Fujitsu-Siemens Amilo Xi 2550", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), @@ -48,6 +61,13 @@ } }, { .ident = "MSI GX700", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), + DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), + DMI_MATCH(DMI_BIOS_DATE, "12/02/2008") + } + }, { + .ident = "MSI GX700", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/zc0301/zc0301_sensor.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/zc0301/zc0301_sensor.h @@ -62,7 +62,6 @@ #define ZC0301_ID_TABLE \ static const struct usb_device_id zc0301_id_table[] = { \ { ZC0301_USB_DEVICE(0x046d, 0x08ae, 0xff), }, /* PAS202 */ \ - { ZC0301_USB_DEVICE(0x0ac8, 0x303b, 0xff), }, /* PB-0330 */ \ { } \ }; #else --- linux-fsl-imx51-2.6.31.orig/drivers/media/video/sn9c102/sn9c102_devtable.h +++ linux-fsl-imx51-2.6.31/drivers/media/video/sn9c102/sn9c102_devtable.h @@ -123,8 +123,8 @@ { SN9C102_USB_DEVICE(0x0c45, 0x613b, BRIDGE_SN9C120), }, #if !defined CONFIG_USB_GSPCA && !defined CONFIG_USB_GSPCA_MODULE { SN9C102_USB_DEVICE(0x0c45, 0x613c, BRIDGE_SN9C120), }, -#endif { SN9C102_USB_DEVICE(0x0c45, 0x613e, BRIDGE_SN9C120), }, +#endif { } }; --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/ttpci/av7110_ca.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/ttpci/av7110_ca.c @@ -277,7 +277,7 @@ { ca_slot_info_t *info=(ca_slot_info_t *)parg; - if (info->num > 1) + if (info->num < 0 || info->num > 1) return -EINVAL; av7110->ci_slot[info->num].num = info->num; av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ? --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/siano/smsusb.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/siano/smsusb.c @@ -529,6 +529,12 @@ .driver_info = SMS1XXX_BOARD_SIANO_NICE }, { USB_DEVICE(0x187f, 0x0301), .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, + { USB_DEVICE(0x2040, 0xb900), + .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, + { USB_DEVICE(0x2040, 0xb910), + .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, + { USB_DEVICE(0x2040, 0xc000), + .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, { } /* Terminating entry */ }; --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/dvb-core/dvb_net.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/dvb-core/dvb_net.c @@ -503,6 +503,7 @@ "bytes left in TS. Resyncing.\n", ts_remain); priv->ule_sndu_len = 0; priv->need_pusi = 1; + ts += TS_SZ; continue; } --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/dvb-usb/cxusb.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/dvb-usb/cxusb.c @@ -663,6 +663,14 @@ .parallel_ts = 1, }; +static struct zl10353_config cxusb_zl10353_xc3028_config_no_i2c_gate = { + .demod_address = 0x0f, + .if2 = 45600, + .no_tuner = 1, + .parallel_ts = 1, + .disable_i2c_gate_ctrl = 1, +}; + static struct mt352_config cxusb_mt352_xc3028_config = { .demod_address = 0x0f, .if2 = 4560, @@ -894,7 +902,7 @@ cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); if ((adap->fe = dvb_attach(zl10353_attach, - &cxusb_zl10353_xc3028_config, + &cxusb_zl10353_xc3028_config_no_i2c_gate, &adap->dev->i2c_adap)) == NULL) return -EIO; --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/dvb-usb/cinergyT2-fe.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/dvb-usb/cinergyT2-fe.c @@ -275,6 +275,7 @@ param.tps = cpu_to_le16(compute_tps(fep)); param.freq = cpu_to_le32(fep->frequency / 1000); param.bandwidth = 8 - fep->u.ofdm.bandwidth - BANDWIDTH_8_MHZ; + param.flags = 0; err = dvb_usb_generic_rw(state->d, (char *)¶m, sizeof(param), --- linux-fsl-imx51-2.6.31.orig/drivers/media/dvb/frontends/dib7000p.c +++ linux-fsl-imx51-2.6.31/drivers/media/dvb/frontends/dib7000p.c @@ -1344,6 +1344,11 @@ if (dib7000p_identify(st) != 0) goto error; + /* FIXME: make sure the dev.parent field is initialized, or else + request_firmware() will hit an OOPS (this should be moved somewhere + more common) */ + st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent; + dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); dib7000p_demod_reset(st); --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/media/radio/Kconfig @@ -406,4 +406,6 @@ Say Y here if TEA5764 have a 32768 Hz crystal in circuit, say N here if TEA5764 reference frequency is connected in FREQIN. +source "drivers/media/radio/stfm1000/Kconfig" + endif # RADIO_ADAPTERS --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/radio/Makefile @@ -21,4 +21,6 @@ obj-$(CONFIG_USB_MR800) += radio-mr800.o obj-$(CONFIG_RADIO_TEA5764) += radio-tea5764.o +obj-$(CONFIG_RADIO_STFM1000) += stfm1000/ + EXTRA_CFLAGS += -Isound --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/radio-gemtek-pci.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/radio-gemtek-pci.c @@ -181,12 +181,10 @@ static void gemtek_pci_unmute(struct gemtek_pci *card) { - mutex_lock(&card->lock); if (card->mute) { gemtek_pci_setfrequency(card, card->current_frequency); card->mute = false; } - mutex_unlock(&card->lock); } static int gemtek_pci_getsignal(struct gemtek_pci *card) --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-regs.h +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-regs.h @@ -0,0 +1,165 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef STFM1000_REGS_H +#define STFM1000_REGS_H + +/* registers */ +#define STFM1000_TUNE1 0x00 +#define STFM1000_SDNOMINAL 0x04 +#define STFM1000_PILOTTRACKING 0x08 +#define STFM1000_INITIALIZATION1 0x10 +#define STFM1000_INITIALIZATION2 0x14 +#define STFM1000_INITIALIZATION3 0x18 +#define STFM1000_INITIALIZATION4 0x1C +#define STFM1000_INITIALIZATION5 0x20 +#define STFM1000_INITIALIZATION6 0x24 +#define STFM1000_REF 0x28 +#define STFM1000_LNA 0x2C +#define STFM1000_MIXFILT 0x30 +#define STFM1000_CLK1 0x34 +#define STFM1000_CLK2 0x38 +#define STFM1000_ADC 0x3C +#define STFM1000_AGC_CONTROL1 0x44 +#define STFM1000_AGC_CONTROL2 0x48 +#define STFM1000_DATAPATH 0x5C +#define STFM1000_RMS 0x60 +#define STFM1000_AGC_STAT 0x64 +#define STFM1000_SIGNALQUALITY 0x68 +#define STFM1000_DCEST 0x6C +#define STFM1000_RSSI_TONE 0x70 +#define STFM1000_PILOTCORRECTION 0x74 +#define STFM1000_ATTENTION 0x78 +#define STFM1000_CLK3 0x7C +#define STFM1000_CHIPID 0x80 + +/* number of registers */ +#define STFM1000_NUM_REGS ((0x80 + 4) / 4) + +#define STFM1000_FREQUENCY_100KHZ_MIN 758 +#define STFM1000_FREQUENCY_100KHZ_RANGE 325 +#define STFM1000_FREQUENCY_100KHZ_MAX (STFM1000_FREQUENCY_100KHZ_MIN + \ + STFM1000_FREQUENCY_100KHZ_RANGE) + +#define STFM1000_TUNE1_B2_MIX 0x001C0000 +#define STFM1000_TUNE1_CICOSR 0x00007E00 +#define STFM1000_TUNE1_PLL_DIV 0x000001FF + +#define STFM1000_CHIP_REV_TA1 0x00000001 +#define STFM1000_CHIP_REV_TA2 0x00000002 +#define STFM1000_CHIP_REV_TB1 0x00000011 +#define STFM1000_CHIP_REV_TB2 0x00000012 + +/* DATAPATH bits we use */ +#define STFM1000_DP_EN 0x01000000 +#define STFM1000_DB_ACCEPT 0x00010000 +#define STFM1000_SAI_CLK_DIV_MASK 0x7c +#define STFM1000_SAI_CLK_DIV_SHIFT 2 +#define STFM1000_SAI_CLK_DIV(x) \ + (((x) << STFM1000_SAI_CLK_DIV_SHIFT) & STFM1000_SAI_CLK_DIV_MASK) +#define STFM1000_SAI_EN 0x00000001 + +/* AGC_CONTROL1 bits we use */ +#define STFM1000_B2_BYPASS_AGC_CTL 0x00004000 +#define STFM1000_B2_BYPASS_FILT_MASK 0x0000000C +#define STFM1000_B2_BYPASS_FILT_SHIFT 2 +#define STFM1000_B2_BYPASS_FILT(x) \ + (((x) << STFM1000_B2_BYPASS_FILT_SHIFT) & STFM1000_B2_BYPASS_FILT_MASK) +#define STFM1000_B2_LNATH_MASK 0x001F0000 +#define STFM1000_B2_LNATH_SHIFT 16 +#define STFM1000_B2_LNATH(x) \ + (((x) << STFM1000_B2_LNATH_SHIFT) & STFM1000_B2_LNATH_MASK) + +/* AGC_STAT bits we use */ +#define STFM1000_AGCOUT_STAT_MASK 0x1F000000 +#define STFM1000_AGCOUT_STAT_SHIFT 24 +#define STFM1000_LNA_RMS_MASK 0x00001F00 +#define STFM1000_LNA_RMS_SHIFT 8 + +/* PILOTTRACKING bits we use */ +#define STFM1000_B2_PILOTTRACKING_EN 0x00008000 +#define STFM1000_B2_PILOTLPF_TIMECONSTANT_MASK 0x00000f00 +#define STFM1000_B2_PILOTLPF_TIMECONSTANT_SHIFT 8 +#define STFM1000_B2_PILOTLPF_TIMECONSTANT(x) \ + (((x) << STFM1000_B2_PILOTLPF_TIMECONSTANT_SHIFT) & \ + STFM1000_B2_PILOTLPF_TIMECONSTANT_MASK) +#define STFM1000_B2_PFDSCALE_MASK 0x000000f0 +#define STFM1000_B2_PFDSCALE_SHIFT 4 +#define STFM1000_B2_PFDSCALE(x) \ + (((x) << STFM1000_B2_PFDSCALE_SHIFT) & STFM1000_B2_PFDSCALE_MASK) +#define STFM1000_B2_PFDFILTER_SPEEDUP_MASK 0x0000000f +#define STFM1000_B2_PFDFILTER_SPEEDUP_SHIFT 0 +#define STFM1000_B2_PFDFILTER_SPEEDUP(x) \ + (((x) << STFM1000_B2_PFDFILTER_SPEEDUP_SHIFT) & \ + STFM1000_B2_PFDFILTER_SPEEDUP_MASK) + +/* PILOTCORRECTION bits we use */ +#define STFM1000_PILOTEST_TA2_MASK 0xff000000 +#define STFM1000_PILOTEST_TA2_SHIFT 24 +#define STFM1000_PILOTEST_TB2_MASK 0xfe000000 +#define STFM1000_PILOTEST_TB2_SHIFT 25 + +/* INITIALIZATION1 bits we use */ +#define STFM1000_B2_BYPASS_FILT_MASK 0x0000000C +#define STFM1000_B2_BYPASS_FILT_SHIFT 2 +#define STFM1000_B2_BYPASS_FILT(x) \ + (((x) << STFM1000_B2_BYPASS_FILT_SHIFT) & STFM1000_B2_BYPASS_FILT_MASK) + +/* INITIALIZATION2 bits we use */ +#define STFM1000_DRI_CLK_EN 0x80000000 +#define STFM1000_DEEMPH_50_75B 0x00000100 +#define STFM1000_RDS_ENABLE 0x00100000 +#define STFM1000_RDS_MIXOFFSET 0x00200000 + +/* INITIALIZATION3 bits we use */ +#define STFM1000_B2_NEAR_CHAN_MIX_MASK 0x1c000000 +#define STFM1000_B2_NEAR_CHAN_MIX_SHIFT 26 +#define STFM1000_B2_NEAR_CHAN_MIX(x) \ + (((x) << STFM1000_B2_NEAR_CHAN_MIX_SHIFT) & \ + STFM1000_B2_NEAR_CHAN_MIX_MASK) + +/* CLK1 bits we use */ +#define STFM1000_ENABLE_TAPDELAYFIX 0x00000020 + +/* REF bits we use */ +#define STFM1000_LNA_AMP1_IMPROVE_DISTORTION 0x08000000 + +/* LNA bits we use */ +#define STFM1000_AMP2_IMPROVE_DISTORTION 0x08000000 +#define STFM1000_ANTENNA_TUNECAP_MASK 0x001F0000 +#define STFM1000_ANTENNA_TUNECAP_SHIFT 16 +#define STFM1000_ANTENNA_TUNECAP(x) \ + (((x) << STFM1000_ANTENNA_TUNECAP_SHIFT) & \ + STFM1000_ANTENNA_TUNECAP_MASK) +#define STFM1000_IBIAS2_UP 0x00000008 +#define STFM1000_IBIAS2_DN 0x00000004 +#define STFM1000_IBIAS1_UP 0x00000002 +#define STFM1000_IBIAS1_DN 0x00000001 +#define STFM1000_USEATTEN_MASK 0x00600000 +#define STFM1000_USEATTEN_SHIFT 21 +#define STFM1000_USEATTEN(x) \ + (((x) << STFM1000_USEATTEN_SHIFT) & STFM1000_USEATTEN_MASK) + +/* SIGNALQUALITY bits we use */ +#define STFM1000_NEAR_CHAN_AMPLITUDE_MASK 0x0000007F +#define STFM1000_NEAR_CHAN_AMPLITUDE_SHIFT 0 +#define STFM1000_NEAR_CHAN_AMPLITUDE(x) \ + (((x) << STFM1000_NEAR_CHAN_AMPLITUDE_SHIFT) & \ + STFM1000_NEAR_CHAN_AMPLITUDE_MASK) + +/* precalc tables elements */ +struct stfm1000_tune1 { + unsigned int tune1; /* at least 32 bit */ + unsigned int sdnom; +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-core.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-core.c @@ -0,0 +1,2459 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include /* for KERNEL_VERSION MACRO */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stfm1000.h" + +static DEFINE_MUTEX(devlist_lock); +static unsigned int stfm1000_devcount; + +LIST_HEAD(stfm1000_devlist); +EXPORT_SYMBOL(stfm1000_devlist); + +/* alsa interface */ +struct stfm1000_alsa_ops *stfm1000_alsa_ops; +EXPORT_SYMBOL(stfm1000_alsa_ops); + +/* region, 0=US, 1=europe */ +static int georegion = 1; /* default is europe */ +static int rds_enable = 1; /* default is enabled */ + +static int sw_tune(struct stfm1000 *stfm1000, u32 freq); + +static const const char *stfm1000_get_rev_txt(u32 id) +{ + switch (id) { + case 0x01: return "TA1"; + case 0x02: return "TA2"; + case 0x11: return "TB1"; + case 0x12: return "TB2"; + } + return NULL; +} + +static const struct stfm1000_reg stfm1000_tb2_powerup[] = { + STFM1000_REG(REF, 0x00200000), + STFM1000_DELAY(20), + STFM1000_REG(DATAPATH, 0x00010210), + STFM1000_REG(TUNE1, 0x0004CF01), + STFM1000_REG(SDNOMINAL, 0x1C5EBCF0), + STFM1000_REG(PILOTTRACKING, 0x000001B6), + STFM1000_REG(INITIALIZATION1, 0x9fb80008), + STFM1000_REG(INITIALIZATION2, 0x8516e444 | STFM1000_DEEMPH_50_75B), + STFM1000_REG(INITIALIZATION3, 0x1402190b), + STFM1000_REG(INITIALIZATION4, 0x525bf052), + STFM1000_REG(INITIALIZATION5, 0x1000d106), + STFM1000_REG(INITIALIZATION6, 0x000062cb), + STFM1000_REG(AGC_CONTROL1, 0x1BCB2202), + STFM1000_REG(AGC_CONTROL2, 0x000020F0), + STFM1000_REG(CLK1, 0x10000000), + STFM1000_REG(CLK1, 0x20000000), + STFM1000_REG(CLK1, 0x00000000), + STFM1000_REG(CLK2, 0x7f000000), + STFM1000_REG(REF, 0x00B8222D), + STFM1000_REG(CLK1, 0x30000000), + STFM1000_REG(CLK1, 0x30002000), + STFM1000_REG(CLK1, 0x10002000), + STFM1000_REG(LNA, 0x0D080009), + STFM1000_DELAY(10), + STFM1000_REG(MIXFILT, 0x00008000), + STFM1000_REG(MIXFILT, 0x00000000), + STFM1000_REG(MIXFILT, 0x00007205), + STFM1000_REG(ADC, 0x001B3282), + STFM1000_REG(ATTENTION, 0x0000003F), + STFM1000_END, +}; + +static const struct stfm1000_reg stfm1000_ta2_powerup[] = { + STFM1000_REG(REF, 0x00200000), + STFM1000_DELAY(20), + STFM1000_REG(DATAPATH, 0x00010210), + STFM1000_REG(TUNE1, 0x00044F01), + STFM1000_REG(SDNOMINAL, 0x1C5EBCF0), + STFM1000_REG(PILOTTRACKING, 0x000001B6), + STFM1000_REG(INITIALIZATION1, 0x9fb80008), + STFM1000_REG(INITIALIZATION2, 0x8506e444), + STFM1000_REG(INITIALIZATION3, 0x1402190b), + STFM1000_REG(INITIALIZATION4, 0x525bf052), + STFM1000_REG(INITIALIZATION5, 0x7000d106), + STFM1000_REG(INITIALIZATION6, 0x0000c2cb), + STFM1000_REG(AGC_CONTROL1, 0x002c8402), + STFM1000_REG(AGC_CONTROL2, 0x00140050), + STFM1000_REG(CLK1, 0x10000000), + STFM1000_REG(CLK1, 0x20000000), + STFM1000_REG(CLK1, 0x00000000), + STFM1000_REG(CLK2, 0x7f000000), + STFM1000_REG(REF, 0x0030222D), + STFM1000_REG(CLK1, 0x30000000), + STFM1000_REG(CLK1, 0x30002000), + STFM1000_REG(CLK1, 0x10002000), + STFM1000_REG(LNA, 0x05080009), + STFM1000_REG(MIXFILT, 0x00008000), + STFM1000_REG(MIXFILT, 0x00000000), + STFM1000_REG(MIXFILT, 0x00007200), + STFM1000_REG(ADC, 0x00033000), + STFM1000_REG(ATTENTION, 0x0000003F), + STFM1000_END, +}; + +static const struct stfm1000_reg stfm1000_powerdown[] = { + STFM1000_REG(DATAPATH, 0x00010210), + STFM1000_REG(REF, 0), + STFM1000_REG(LNA, 0), + STFM1000_REG(MIXFILT, 0), + STFM1000_REG(CLK1, 0x20000000), + STFM1000_REG(CLK1, 0), + STFM1000_REG(CLK2, 0), + STFM1000_REG(ADC, 0), + STFM1000_REG(TUNE1, 0), + STFM1000_REG(SDNOMINAL, 0), + STFM1000_REG(PILOTTRACKING, 0), + STFM1000_REG(INITIALIZATION1, 0), + STFM1000_REG(INITIALIZATION2, 0), + STFM1000_REG(INITIALIZATION3, 0), + STFM1000_REG(INITIALIZATION4, 0), + STFM1000_REG(INITIALIZATION5, 0), + STFM1000_REG(INITIALIZATION6, 0x00007E00), + STFM1000_REG(AGC_CONTROL1, 0), + STFM1000_REG(AGC_CONTROL2, 0), + STFM1000_REG(DATAPATH, 0x00000200), +}; + +struct stfm1000_tuner_pmi { + u32 min; + u32 max; + u32 freq; + u32 pll_xtal; /* 1 = pll, 0 = xtal */ +}; + +#define PLL 1 +#define XTAL 0 + +static const struct stfm1000_tuner_pmi stfm1000_pmi_lookup[] = { + { .min = 76100, .max = 76500, .freq = 19200, .pll_xtal = PLL }, + { .min = 79700, .max = 79900, .freq = 19200, .pll_xtal = PLL }, + { .min = 80800, .max = 81200, .freq = 19200, .pll_xtal = PLL }, + { .min = 82100, .max = 82600, .freq = 19200, .pll_xtal = PLL }, + { .min = 86800, .max = 87200, .freq = 19200, .pll_xtal = PLL }, + { .min = 88100, .max = 88600, .freq = 19200, .pll_xtal = PLL }, + { .min = 89800, .max = 90500, .freq = 19200, .pll_xtal = PLL }, + { .min = 91400, .max = 91900, .freq = 19200, .pll_xtal = PLL }, + { .min = 92800, .max = 93300, .freq = 19200, .pll_xtal = PLL }, + { .min = 97400, .max = 97900, .freq = 19200, .pll_xtal = PLL }, + { .min = 98800, .max = 99200, .freq = 19200, .pll_xtal = PLL }, + { .min = 100200, .max = 100400, .freq = 19200, .pll_xtal = PLL }, + { .min = 103500, .max = 103900, .freq = 19200, .pll_xtal = PLL }, + { .min = 104800, .max = 105200, .freq = 19200, .pll_xtal = PLL }, + { .min = 106100, .max = 106500, .freq = 19200, .pll_xtal = PLL }, + + { .min = 76600, .max = 77000, .freq = 20000, .pll_xtal = PLL }, + { .min = 77800, .max = 78300, .freq = 20000, .pll_xtal = PLL }, + { .min = 79200, .max = 79600, .freq = 20000, .pll_xtal = PLL }, + { .min = 80600, .max = 80700, .freq = 20000, .pll_xtal = PLL }, + { .min = 83900, .max = 84400, .freq = 20000, .pll_xtal = PLL }, + { .min = 85300, .max = 85800, .freq = 20000, .pll_xtal = PLL }, + { .min = 94200, .max = 94700, .freq = 20000, .pll_xtal = PLL }, + { .min = 95600, .max = 96100, .freq = 20000, .pll_xtal = PLL }, + { .min = 100500, .max = 100800, .freq = 20000, .pll_xtal = PLL }, + { .min = 101800, .max = 102200, .freq = 20000, .pll_xtal = PLL }, + { .min = 103100, .max = 103400, .freq = 20000, .pll_xtal = PLL }, + { .min = 106600, .max = 106900, .freq = 20000, .pll_xtal = PLL }, + { .min = 107800, .max = 108000, .freq = 20000, .pll_xtal = PLL }, + + { .min = 0, .max = 0, .freq = 24000, .pll_xtal = XTAL } +}; + +int stfm1000_power_up(struct stfm1000 *stfm1000) +{ + struct stfm1000_reg *reg, *pwrup_reg; + const struct stfm1000_reg *orig_reg, *treg; + int ret, size; + + mutex_lock(&stfm1000->state_lock); + + /* Enable DRI clock for 24Mhz. */ + HW_CLKCTRL_XTAL_CLR(BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); + + orig_reg = stfm1000->revid == STFM1000_CHIP_REV_TA2 ? + stfm1000_ta2_powerup : stfm1000_tb2_powerup; + + /* find size of the set */ + for (treg = orig_reg; treg->regno != STFM1000_REG_END; treg++) + ; + size = (treg + 1 - orig_reg) * sizeof(*treg); + + /* allocate copy */ + pwrup_reg = kmalloc(size, GFP_KERNEL); + if (pwrup_reg == NULL) { + printk(KERN_ERR "%s: out of memory\n", __func__); + ret = -ENOMEM; + goto out; + } + + /* copy it */ + memcpy(pwrup_reg, orig_reg, size); + + /* fixup region of INITILIZATION2 */ + for (reg = pwrup_reg; reg->regno != STFM1000_REG_END; reg++) { + + /* we only care for INITIALIZATION2 register */ + if (reg->regno != STFM1000_INITIALIZATION2) + continue; + + /* geographic region select */ + if (stfm1000->georegion == 0) /* USA */ + reg->value &= ~STFM1000_DEEMPH_50_75B; + else /* Europe */ + reg->value |= STFM1000_DEEMPH_50_75B; + + /* RDS enabled */ + if (stfm1000->revid == STFM1000_CHIP_REV_TB2) { + if (stfm1000->rds_enable) + reg->value |= STFM1000_RDS_ENABLE; + else + reg->value &= ~STFM1000_RDS_ENABLE; + } + } + + ret = stfm1000_write_regs(stfm1000, pwrup_reg); + + kfree(pwrup_reg); +out: + mutex_unlock(&stfm1000->state_lock); + + return ret; +} + +int stfm1000_power_down(struct stfm1000 *stfm1000) +{ + int ret; + + mutex_lock(&stfm1000->state_lock); + + /* Disable DRI clock for 24Mhz. */ + HW_CLKCTRL_XTAL_CLR(BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); + + ret = stfm1000_write_regs(stfm1000, stfm1000_powerdown); + + /* Disable DRI clock for 24Mhz. */ + /* XXX bug warning, disabling the DRI clock is bad news */ + /* doing so causes noise to be received from the DRI */ + /* interface. Leave it on for now */ + /* HW_CLKCTRL_XTAL_CLR(BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); */ + + mutex_unlock(&stfm1000->state_lock); + + return ret; +} + +int stfm1000_dcdc_update(struct stfm1000 *stfm1000, u32 freq) +{ + const struct stfm1000_tuner_pmi *pmi; + int i; + + /* search for DCDC frequency */ + pmi = stfm1000_pmi_lookup; + for (i = 0; i < ARRAY_SIZE(stfm1000_pmi_lookup); i++, pmi++) { + if (freq >= pmi->min && freq <= pmi->max) + break; + } + if (i >= ARRAY_SIZE(stfm1000_pmi_lookup)) + return -1; + + /* adjust DCDC frequency so that it is out of Tuner PLL range */ + /* XXX there is no adjustment API (os_pmi_SetDcdcFreq)*/ + return 0; +} + +static void Mute_Audio(struct stfm1000 *stfm1000) +{ + stfm1000->mute = 1; +} + +static void Unmute_Audio(struct stfm1000 *stfm1000) +{ + stfm1000->mute = 0; +} + +static const struct stfm1000_reg sd_dp_on_regs[] = { + STFM1000_REG_SETBITS(DATAPATH, STFM1000_DP_EN), + STFM1000_DELAY(3), + STFM1000_REG_SETBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_REG_CLRBITS(AGC_CONTROL1, STFM1000_B2_BYPASS_AGC_CTL), + STFM1000_REG_CLRBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_END, +}; + +static int SD_DP_On(struct stfm1000 *stfm1000) +{ + int ret; + + ret = stfm1000_write_regs(stfm1000, sd_dp_on_regs); + if (ret != 0) + return ret; + + return 0; +} + +static const struct stfm1000_reg sd_dp_off_regs[] = { + STFM1000_REG_SETBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_REG_CLRBITS(DATAPATH, STFM1000_DP_EN), + STFM1000_REG_SETBITS(AGC_CONTROL1, STFM1000_B2_BYPASS_AGC_CTL), + STFM1000_REG_CLRBITS(PILOTTRACKING, STFM1000_B2_PILOTTRACKING_EN), + STFM1000_REG_CLRBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_END, +}; + +static int SD_DP_Off(struct stfm1000 *stfm1000) +{ + int ret; + + ret = stfm1000_write_regs(stfm1000, sd_dp_off_regs); + if (ret != 0) + return ret; + + return 0; +} + +static int DRI_Start_Stream(struct stfm1000 *stfm1000) +{ + dma_addr_t dma_buffer_phys; + int i, next; + u32 cmd; + + /* we must not be gated */ + BUG_ON(HW_CLKCTRL_XTAL_RD() & BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); + + /* hw_dri_SetReset */ + HW_DRI_CTRL_CLR(BM_DRI_CTRL_SFTRST | BM_DRI_CTRL_CLKGATE); + HW_DRI_CTRL_SET(BM_DRI_CTRL_SFTRST); + while ((HW_DRI_CTRL_RD() & BM_DRI_CTRL_CLKGATE) == 0) + cpu_relax(); + HW_DRI_CTRL_CLR(BM_DRI_CTRL_SFTRST | BM_DRI_CTRL_CLKGATE); + + /* DRI enable/config */ + HW_DRI_TIMING_WR(BF_DRI_TIMING_GAP_DETECTION_INTERVAL(0x10) | + BF_DRI_TIMING_PILOT_REP_RATE(0x08)); + + /* XXX SDK bug */ + /* While the SDK enables the gate here, everytime the stream */ + /* is started, doing so, causes the DRI to input audio noise */ + /* at any subsequent starts */ + /* Enable DRI clock for 24Mhz. */ + /* HW_CLKCTRL_XTAL_CLR(BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); */ + + stmp3xxx_arch_dma_reset_channel(stfm1000->dma_ch); + + dma_buffer_phys = stfm1000->dri_phys; + + for (i = 0; i < stfm1000->blocks; i++) { + next = (i + 1) % stfm1000->blocks; + + /* link */ + stfm1000->dma[i].command->next = stfm1000->dma[next].handle; + stfm1000->dma[i].next_descr = &stfm1000->dma[next]; + + /* receive DRI is 8 bytes per 4 samples */ + cmd = BF_APBX_CHn_CMD_XFER_COUNT(stfm1000->blksize * 2) | + BM_APBX_CHn_CMD_IRQONCMPLT | + BM_APBX_CHn_CMD_CHAIN | + BF_APBX_CHn_CMD_COMMAND( + BV_APBX_CHn_CMD_COMMAND__DMA_WRITE); + + stfm1000->dma[i].command->cmd = cmd; + stfm1000->dma[i].command->buf_ptr = dma_buffer_phys; + stfm1000->dma[i].command->pio_words[0] = + BM_DRI_CTRL_OVERFLOW_IRQ_EN | + BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN | + BM_DRI_CTRL_ATTENTION_IRQ_EN | + /* BM_DRI_CTRL_STOP_ON_OFLOW_ERROR | */ + /* BM_DRI_CTRL_STOP_ON_PILOT_ERROR | */ + BM_DRI_CTRL_ENABLE_INPUTS; + + dma_buffer_phys += stfm1000->blksize * 2; + + } + + /* Enable completion interrupt */ + stmp3xxx_dma_clear_interrupt(stfm1000->dma_ch); + stmp3xxx_dma_enable_interrupt(stfm1000->dma_ch); + + /* clear DRI interrupts pending */ + HW_DRI_CTRL_CLR(BM_DRI_CTRL_OVERFLOW_IRQ | + BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ | + BM_DRI_CTRL_ATTENTION_IRQ); + + /* Stop DRI on error */ + HW_DRI_CTRL_CLR(BM_DRI_CTRL_STOP_ON_OFLOW_ERROR | + BM_DRI_CTRL_STOP_ON_PILOT_ERROR); + + /* Reacquire data stream */ + HW_DRI_CTRL_SET(BM_DRI_CTRL_REACQUIRE_PHASE | + BM_DRI_CTRL_OVERFLOW_IRQ_EN | + BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN | + BM_DRI_CTRL_ATTENTION_IRQ_EN | + BM_DRI_CTRL_ENABLE_INPUTS); + + stmp3xxx_dma_go(stfm1000->dma_ch, stfm1000->dma, 1); + + /* Turn on DRI hardware (don't forget to leave RUN bit ON) */ + HW_DRI_CTRL_SET(BM_DRI_CTRL_RUN); + + return 0; +} + +static int DRI_Stop_Stream(struct stfm1000 *stfm1000) +{ + int desc; + + /* disable interrupts */ + HW_DRI_CTRL_CLR(BM_DRI_CTRL_OVERFLOW_IRQ_EN | + BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN | + BM_DRI_CTRL_ATTENTION_IRQ_EN); + + /* Freeze DMA channel for a moment */ + stmp3xxx_dma_freeze(stfm1000->dma_ch); + + /* all descriptors, set sema bit */ + for (desc = 0; desc < stfm1000->blocks; desc++) + stfm1000->dma[desc].command->cmd |= BM_APBX_CHn_CMD_SEMAPHORE; + + /* Let the current DMA transaction finish */ + stmp3xxx_dma_unfreeze(stfm1000->dma_ch); + msleep(5); + + /* dma shutdown */ + stmp3xxx_arch_dma_reset_channel(stfm1000->dma_ch); + + /* Turn OFF data lines and stop controller */ + HW_DRI_CTRL_CLR(BM_DRI_CTRL_ENABLE_INPUTS | BM_DRI_CTRL_RUN); + + /* hw_dri_SetReset */ + HW_DRI_CTRL_SET(BM_DRI_CTRL_SFTRST | BM_DRI_CTRL_CLKGATE); + + /* XXX SDK bug */ + /* While the SDK enables the gate here, everytime the stream */ + /* is started, doing so, causes the DRI to input audio noise */ + /* at any subsequent starts */ + /* Enable DRI clock for 24Mhz. */ + /* Disable DRI clock for 24Mhz. */ + /* HW_CLKCTRL_XTAL_SET(BM_CLKCTRL_XTAL_DRI_CLK24M_GATE); */ + + return 0; +} + +static int DRI_On(struct stfm1000 *stfm1000) +{ + int ret; + + if (stfm1000->active) + DRI_Start_Stream(stfm1000); + + ret = stfm1000_set_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_SAI_EN); + return ret; +} + +static int DRI_Off(struct stfm1000 *stfm1000) +{ + int ret; + + if (stfm1000->active) + DRI_Stop_Stream(stfm1000); + + ret = stfm1000_clear_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_SAI_EN); + + return 0; +} + +static int SD_Set_Channel_Filter(struct stfm1000 *stfm1000) +{ + int bypass_setting; + int sig_qual; + u32 tmp; + int ret; + + /* + * set channel filter + * + * B2_NEAR_CHAN_MIX_REG_MASK values from T-Spec + * 000 : 0 kHz mix. + * 001 : +100 kHz mix. + * 010 : +200 kHz mix. + * 011 : +300 kHz mix. + * 100 : -400 kHz mix. + * 101 : -300 kHz mix. + * 110 : -200 kHz mix. + * 111 : -100 kHz mix. + */ + + /* get near channel amplitude */ + ret = stfm1000_write_masked(stfm1000, STFM1000_INITIALIZATION3, + STFM1000_B2_NEAR_CHAN_MIX(0x01), + STFM1000_B2_NEAR_CHAN_MIX_MASK); + if (ret != 0) + return ret; + + msleep(10); /* wait for the signal quality to settle */ + + ret = stfm1000_read(stfm1000, STFM1000_SIGNALQUALITY, &tmp); + if (ret != 0) + return ret; + + sig_qual = (tmp & STFM1000_NEAR_CHAN_AMPLITUDE_MASK) >> + STFM1000_NEAR_CHAN_AMPLITUDE_SHIFT; + + bypass_setting = 0; + + /* check near channel amplitude vs threshold */ + if (sig_qual < stfm1000->adj_chan_th) { + /* get near channel amplitude again */ + ret = stfm1000_write_masked(stfm1000, STFM1000_INITIALIZATION3, + STFM1000_B2_NEAR_CHAN_MIX(0x05), + STFM1000_B2_NEAR_CHAN_MIX_MASK); + if (ret != 0) + return ret; + + msleep(10); /* wait for the signal quality to settle */ + + ret = stfm1000_read(stfm1000, STFM1000_SIGNALQUALITY, &tmp); + if (ret != 0) + return ret; + + sig_qual = (tmp & STFM1000_NEAR_CHAN_AMPLITUDE_MASK) >> + STFM1000_NEAR_CHAN_AMPLITUDE_SHIFT; + + if (sig_qual < stfm1000->adj_chan_th) + bypass_setting = 2; + } + + /* set filter settings */ + ret = stfm1000_write_masked(stfm1000, STFM1000_INITIALIZATION1, + STFM1000_B2_BYPASS_FILT(bypass_setting), + STFM1000_B2_BYPASS_FILT_MASK); + if (ret != 0) + return ret; + + return 0; +} + +static int SD_Look_For_Pilot_TA2(struct stfm1000 *stfm1000) +{ + int i; + u32 pilot; + int ret; + + /* assume pilot */ + stfm1000->pilot_present = 1; + + for (i = 0; i < 3; i++) { + + ret = stfm1000_read(stfm1000, STFM1000_PILOTCORRECTION, + &pilot); + if (ret != 0) + return ret; + + pilot &= STFM1000_PILOTEST_TA2_MASK; + pilot >>= STFM1000_PILOTEST_TA2_SHIFT; + + /* out of range? */ + if (pilot < 0xe2 || pilot >= 0xb5) { + stfm1000->pilot_present = 0; + break; + } + } + + return 0; +} + + +static int SD_Look_For_Pilot_TB2(struct stfm1000 *stfm1000) +{ + int i; + u32 pilot; + int ret; + + /* assume pilot */ + stfm1000->pilot_present = 1; + + for (i = 0; i < 3; i++) { + + ret = stfm1000_read(stfm1000, STFM1000_PILOTCORRECTION, + &pilot); + if (ret != 0) + return ret; + + pilot &= STFM1000_PILOTEST_TB2_MASK; + pilot >>= STFM1000_PILOTEST_TB2_SHIFT; + + /* out of range? */ + if (pilot < 0x1e || pilot >= 0x7f) { + stfm1000->pilot_present = 0; + break; + } + } + + return 0; +} + +static int SD_Look_For_Pilot(struct stfm1000 *stfm1000) +{ + int ret; + + if (stfm1000->revid == STFM1000_CHIP_REV_TA2) + ret = SD_Look_For_Pilot_TA2(stfm1000); + else + ret = SD_Look_For_Pilot_TB2(stfm1000); + + if (ret != 0) + return ret; + + if (!stfm1000->pilot_present) { + ret = stfm1000_clear_bits(stfm1000, STFM1000_PILOTTRACKING, + STFM1000_B2_PILOTTRACKING_EN); + if (ret != 0) + return ret; + + /* set force mono parameters for the filter */ + stfm1000->filter_parms.pCoefForcedMono = 1; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod.pCoefForcedMono = + stfm1000->filter_parms.pCoefForcedMono; + } + + return 0; +} + +static int SD_Gear_Shift_Pilot_Tracking(struct stfm1000 *stfm1000) +{ + static const struct { + int delay; + u32 value; + } track_table[] = { + { .delay = 10, .value = 0x81b6 }, + { .delay = 6, .value = 0x82a5 }, + { .delay = 6, .value = 0x8395 }, + { .delay = 8, .value = 0x8474 }, + { .delay = 20, .value = 0x8535 }, + { .delay = 50, .value = 0x8632 }, + { .delay = 0, .value = 0x8810 }, + }; + int i; + int ret; + + for (i = 0; i < ARRAY_SIZE(track_table); i++) { + ret = stfm1000_write(stfm1000, STFM1000_PILOTTRACKING, + track_table[i].value); + if (ret != 0) + return ret; + + if (i < ARRAY_SIZE(track_table) - 1) /* last one no delay */ + msleep(track_table[i].delay); + } + + return 0; +} + +static int SD_Optimize_Channel(struct stfm1000 *stfm1000) +{ + int ret; + + ret = stfm1000_set_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + return ret; + + ret = stfm1000_write(stfm1000, STFM1000_PILOTTRACKING, + STFM1000_B2_PILOTTRACKING_EN | + STFM1000_B2_PILOTLPF_TIMECONSTANT(0x01) | + STFM1000_B2_PFDSCALE(0x0B) | + STFM1000_B2_PFDFILTER_SPEEDUP(0x06)); /* 0x000081B6 */ + if (ret != 0) + return ret; + + ret = SD_Set_Channel_Filter(stfm1000); + if (ret != 0) + return ret; + + ret = SD_Look_For_Pilot(stfm1000); + if (ret != 0) + return ret; + + if (stfm1000->pilot_present) { + ret = SD_Gear_Shift_Pilot_Tracking(stfm1000); + if (ret != 0) + return ret; + } + + ret = stfm1000_clear_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + return ret; + + return 0; +} + +static int Monitor_STFM_Quality(struct stfm1000 *stfm1000) +{ + u32 tmp, rssi_dc_est, tone_data; + u32 lna_rms, bias, agc_out, lna_th, lna, ref; + u16 rssi_mantissa, rssi_exponent, rssi_decoded; + u16 prssi; + s16 mpx_dc; + int rssi_log; + int bypass_filter; + int ret; + + ret = stfm1000_set_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + return ret; + + /* Get Rssi register readings from STFM1000 */ + stfm1000_read(stfm1000, STFM1000_RSSI_TONE, &tmp); + rssi_dc_est = tmp & 0xffff; + tone_data = (tmp >> 16) & 0x0fff; + + rssi_mantissa = (rssi_dc_est & 0xffe0) >> 5; /* 11Msb */ + rssi_exponent = rssi_dc_est & 0x001f; /* 5 lsb */ + rssi_decoded = (u32)rssi_mantissa << rssi_exponent; + + /* Convert Rsst to 10log(Rssi) */ + for (prssi = 20; prssi > 0; prssi--) + if (rssi_decoded >= (1 << prssi)) + break; + + rssi_log = (3 * rssi_decoded >> prssi) + (3 * prssi - 3); + /* clamp to positive */ + if (rssi_log < 0) + rssi_log = 0; + /* Compensate for errors in truncation/approximation by adding 1 */ + rssi_log++; + + stfm1000->rssi_dc_est_log = rssi_log; + stfm1000->signal_strength = stfm1000->rssi_dc_est_log; + + /* determine absolute value */ + if (tmp & 0x0800) + mpx_dc = ((tmp >> 16) & 0x0fff) | 0xf000; + else + mpx_dc = (tmp >> 16) & 0x0fff; + stfm1000->mpx_dc = mpx_dc; + mpx_dc = mpx_dc < 0 ? -mpx_dc : mpx_dc; + + if (stfm1000->tuning_grid_50KHz) + stfm1000->is_station = rssi_log > stfm1000->tune_rssi_th; + else + stfm1000->is_station = rssi_log > stfm1000->tune_rssi_th && + mpx_dc > stfm1000->tune_mpx_dc_th; + + /* weak signal? */ + if (stfm1000->rssi_dc_est_log < + (stfm1000->filter_parms.pCoefLmrGaTh - 20)) { + + if (stfm1000->pilot_present) + bypass_filter = 1; /* Filter settings #2 */ + else + bypass_filter = 0; + + /* configure filter for narrow band */ + ret = stfm1000_write_masked(stfm1000, STFM1000_AGC_CONTROL1, + STFM1000_B2_BYPASS_FILT(bypass_filter), + STFM1000_B2_BYPASS_FILT_MASK); + if (ret != 0) + return ret; + + /* Turn off pilot tracking */ + ret = stfm1000_clear_bits(stfm1000, STFM1000_PILOTTRACKING, + STFM1000_B2_PILOTTRACKING_EN); + if (ret != 0) + return ret; + + /* enable "forced mono" in black box */ + stfm1000->filter_parms.pCoefForcedMono = 1; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod.pCoefForcedMono = + stfm1000->filter_parms.pCoefForcedMono; + + /* Set weak signal flag */ + stfm1000->weak_signal = 1; + + if (stfm1000->revid == STFM1000_CHIP_REV_TA2) { + + /* read AGC_STAT register */ + ret = stfm1000_read(stfm1000, STFM1000_AGC_STAT, &tmp); + if (ret != 0) + return ret; + + lna_rms = (tmp & STFM1000_LNA_RMS_MASK) >> + STFM1000_LNA_RMS_SHIFT; + + /* Check the energy level from LNA Power Meter A/D */ + if (lna_rms == 0) + bias = STFM1000_IBIAS2_DN | STFM1000_IBIAS1_UP; + else + bias = STFM1000_IBIAS2_UP | STFM1000_IBIAS1_DN; + + if (lna_rms == 0 || lna_rms > 2) { + ret = stfm1000_write_masked(stfm1000, + STFM1000_LNA, bias, + STFM1000_IBIAS2_UP | + STFM1000_IBIAS2_DN | + STFM1000_IBIAS1_UP | + STFM1000_IBIAS1_DN); + if (ret != 0) + return ret; + } + + } else { + + /* Set LNA bias */ + + /* read AGC_STAT register */ + ret = stfm1000_read(stfm1000, STFM1000_AGC_STAT, &tmp); + if (ret != 0) + return ret; + + agc_out = (tmp & STFM1000_AGCOUT_STAT_MASK) >> + STFM1000_AGCOUT_STAT_SHIFT; + + /* read LNA register (this is a cached register) */ + ret = stfm1000_read(stfm1000, STFM1000_LNA, &lna); + if (ret != 0) + return ret; + + /* read REF register (this is a cached register) */ + ret = stfm1000_read(stfm1000, STFM1000_REF, &ref); + if (ret != 0) + return ret; + +/* work around the 80 line width problem */ +#undef LNADEF +#define LNADEF STFM1000_LNA_AMP1_IMPROVE_DISTORTION + if (agc_out == 31) { + if (rssi_log <= 16) { + if (lna & STFM1000_IBIAS1_DN) + lna &= ~STFM1000_IBIAS1_DN; + else { + lna |= STFM1000_IBIAS1_UP; + ref &= ~LNADEF; + } + } + if (rssi_log >= 26) { + if (lna & STFM1000_IBIAS1_UP) { + lna &= ~STFM1000_IBIAS1_UP; + ref |= LNADEF; + } else + lna |= STFM1000_IBIAS1_DN; + } + } else { + lna &= ~STFM1000_IBIAS1_UP; + lna |= STFM1000_IBIAS1_DN; + ref |= LNADEF; + } +#undef LNADEF + + ret = stfm1000_write_masked(stfm1000, STFM1000_LNA, + lna, STFM1000_IBIAS1_UP | STFM1000_IBIAS1_DN); + if (ret != 0) + return ret; + + ret = stfm1000_write_masked(stfm1000, STFM1000_REF, + ref, STFM1000_LNA_AMP1_IMPROVE_DISTORTION); + if (ret != 0) + return ret; + } + + } else if (stfm1000->rssi_dc_est_log > + (stfm1000->filter_parms.pCoefLmrGaTh - 17)) { + + bias = STFM1000_IBIAS2_UP | STFM1000_IBIAS1_DN; + + ret = stfm1000_write_masked(stfm1000, STFM1000_LNA, + bias, STFM1000_IBIAS2_UP | STFM1000_IBIAS2_DN | + STFM1000_IBIAS1_UP | STFM1000_IBIAS1_DN); + if (ret != 0) + return ret; + + ret = SD_Set_Channel_Filter(stfm1000); + if (ret != 0) + return ret; + + ret = SD_Look_For_Pilot(stfm1000); + if (ret != 0) + return ret; + + if (stfm1000->pilot_present) { + if (stfm1000->prev_pilot_present || + stfm1000->weak_signal) { + + /* gear shift pilot tracking */ + ret = SD_Gear_Shift_Pilot_Tracking( + stfm1000); + if (ret != 0) + return ret; + + /* set force mono parameters for the + * filter */ + stfm1000->filter_parms. + pCoefForcedMono = stfm1000-> + force_mono; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod. + pCoefForcedMono = stfm1000-> + filter_parms. + pCoefForcedMono; + } + } else { + ret = stfm1000_clear_bits(stfm1000, + STFM1000_PILOTTRACKING, + STFM1000_B2_PILOTTRACKING_EN); + if (ret != 0) + return ret; + + /* set force mono parameters for the filter */ + stfm1000->filter_parms.pCoefForcedMono = 1; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod.pCoefForcedMono = + stfm1000->filter_parms.pCoefForcedMono; + } + + /* Reset weak signal flag */ + stfm1000->weak_signal = 0; + stfm1000->prev_pilot_present = stfm1000->pilot_present; + + } else { + + ret = SD_Look_For_Pilot(stfm1000); + if (ret != 0) + return ret; + + if (!stfm1000->pilot_present) { + ret = stfm1000_clear_bits(stfm1000, + STFM1000_PILOTTRACKING, + STFM1000_B2_PILOTTRACKING_EN); + if (ret != 0) + return ret; + + /* set force mono parameters for the filter */ + stfm1000->filter_parms.pCoefForcedMono = 1; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod.pCoefForcedMono = + stfm1000->filter_parms.pCoefForcedMono; + + /* Reset weak signal flag */ + stfm1000->weak_signal = 0; + stfm1000->prev_pilot_present = stfm1000->pilot_present; + } + + } + + if (stfm1000->revid == STFM1000_CHIP_REV_TA2) { + + /* read AGC_STAT register */ + ret = stfm1000_read(stfm1000, STFM1000_AGC_STAT, &tmp); + if (ret != 0) + return ret; + + agc_out = (tmp & STFM1000_AGCOUT_STAT_MASK) >> + STFM1000_AGCOUT_STAT_SHIFT; + lna_rms = (tmp & STFM1000_LNA_RMS_MASK) >> + STFM1000_LNA_RMS_SHIFT; + + ret = stfm1000_read(stfm1000, STFM1000_AGC_CONTROL1, &tmp); + if (ret != 0) + return ret; + + /* extract LNATH */ + lna_th = (tmp & STFM1000_B2_LNATH_MASK) >> + STFM1000_B2_LNATH_SHIFT; + + if (lna_rms > lna_th && agc_out <= 1) { + + ret = stfm1000_write_masked(stfm1000, STFM1000_LNA, + STFM1000_USEATTEN(1), STFM1000_USEATTEN_MASK); + if (ret != 0) + return ret; + + } else if (agc_out > 15) { + + ret = stfm1000_write_masked(stfm1000, STFM1000_LNA, + STFM1000_USEATTEN(0), STFM1000_USEATTEN_MASK); + if (ret != 0) + return ret; + } + } + + /* disable buffered writes */ + ret = stfm1000_clear_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + return ret; + + return ret; +} + +static int Is_Station(struct stfm1000 *stfm1000) +{ + u32 tmp, rssi_dc_est, tone_data; + u16 rssi_mantissa, rssi_exponent, rssi_decoded; + u16 prssi; + s16 mpx_dc; + int rssi_log; + + /* Get Rssi register readings from STFM1000 */ + stfm1000_read(stfm1000, STFM1000_RSSI_TONE, &tmp); + rssi_dc_est = tmp & 0xffff; + tone_data = (tmp >> 16) & 0x0fff; + + rssi_mantissa = (rssi_dc_est & 0xffe0) >> 5; /* 11Msb */ + rssi_exponent = rssi_dc_est & 0x001f; /* 5 lsb */ + rssi_decoded = (u32)rssi_mantissa << rssi_exponent; + + /* Convert Rsst to 10log(Rssi) */ + for (prssi = 20; prssi > 0; prssi--) + if (rssi_decoded >= (1 << prssi)) + break; + + rssi_log = (3 * rssi_decoded >> prssi) + (3 * prssi - 3); + /* clamp to positive */ + if (rssi_log < 0) + rssi_log = 0; + /* Compensate for errors in truncation/approximation by adding 1 */ + rssi_log++; + + stfm1000->rssi_dc_est_log = rssi_log; + stfm1000->signal_strength = stfm1000->rssi_dc_est_log; + + /* determine absolute value */ + if (tmp & 0x0800) + mpx_dc = ((tmp >> 16) & 0x0fff) | 0xf000; + else + mpx_dc = (tmp >> 16) & 0x0fff; + stfm1000->mpx_dc = mpx_dc; + mpx_dc = mpx_dc < 0 ? -mpx_dc : mpx_dc; + + if (stfm1000->tuning_grid_50KHz) + stfm1000->is_station = rssi_log > stfm1000->tune_rssi_th; + else + stfm1000->is_station = rssi_log > stfm1000->tune_rssi_th && + mpx_dc > stfm1000->tune_mpx_dc_th; + + return 0; +} + +int Monitor_STFM_AGC(struct stfm1000 *stfm1000) +{ + /* we don't do any AGC for now */ + return 0; +} + +static int Take_Down(struct stfm1000 *stfm1000) +{ + Mute_Audio(stfm1000); + + DRI_Off(stfm1000); + + SD_DP_Off(stfm1000); + + return 0; +} + +static int Bring_Up(struct stfm1000 *stfm1000) +{ + SD_DP_On(stfm1000); + + SD_Optimize_Channel(stfm1000); + + DRI_On(stfm1000); + + Unmute_Audio(stfm1000); + + if (stfm1000->rds_enable) + stfm1000_rds_reset(&stfm1000->rds_state); + + stfm1000->rds_sync = stfm1000->rds_enable; /* force sync (if RDS) */ + stfm1000->rds_demod_running = 0; + stfm1000->rssi_dc_est_log = 0; + stfm1000->signal_strength = 0; + + stfm1000->next_quality_monitor = jiffies + msecs_to_jiffies( + stfm1000->quality_monitor_period); + stfm1000->next_agc_monitor = jiffies + msecs_to_jiffies( + stfm1000->agc_monitor_period); + stfm1000->rds_pkt_bad = 0; + stfm1000->rds_pkt_good = 0; + stfm1000->rds_pkt_recovered = 0; + stfm1000->rds_pkt_lost_sync = 0; + stfm1000->rds_bit_overruns = 0; + + return 0; +} + +/* These are not used yet */ + +static int Lock_Station(struct stfm1000 *stfm1000) +{ + int ret; + + ret = SD_Optimize_Channel(stfm1000); + if (ret != 0) + return ret; + + /* AGC monitor start? */ + + return ret; +} + +static const struct stfm1000_reg sd_unlock_regs[] = { + STFM1000_REG_SETBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_REG_CLRBITS(PILOTTRACKING, STFM1000_B2_PILOTTRACKING_EN), + STFM1000_REG_CLRBITS(DATAPATH, STFM1000_DB_ACCEPT), + STFM1000_END, +}; + +static int Unlock_Station(struct stfm1000 *stfm1000) +{ + int ret; + + ret = stfm1000_write_regs(stfm1000, sd_unlock_regs); + return ret; +} + +irqreturn_t stfm1000_dri_dma_irq(int irq, void *dev_id) +{ + struct stfm1000 *stfm1000 = dev_id; + u32 err_mask, irq_mask; + u32 ctrl; + int handled = 0; + +#ifdef CONFIG_ARCH_STMP37XX + err_mask = 1 << (16 + stfm1000->dma_ch); +#endif +#ifdef CONFIG_ARCH_STMP378X + err_mask = 1 << stfm1000->dma_ch; +#endif + irq_mask = 1 << stfm1000->dma_ch; + +#ifdef CONFIG_ARCH_STMP37XX + ctrl = HW_APBX_CTRL1_RD(); +#endif +#ifdef CONFIG_ARCH_STMP378X + ctrl = HW_APBX_CTRL2_RD(); +#endif + + if (ctrl & err_mask) { + handled = 1; + printk(KERN_WARNING "%s: DMA audio channel %d error\n", + __func__, stfm1000->dma_ch); +#ifdef CONFIG_ARCH_STMP37XX + HW_APBX_CTRL1_CLR(err_mask); +#endif +#ifdef CONFIG_ARCH_STMP378X + HW_APBX_CTRL2_CLR(err_mask); +#endif + } + + if (HW_APBX_CTRL1_RD() & irq_mask) { + handled = 1; + stmp3xxx_dma_clear_interrupt(stfm1000->dma_ch); + + if (stfm1000->alsa_initialized) { + BUG_ON(stfm1000_alsa_ops->dma_irq == NULL); + (*stfm1000_alsa_ops->dma_irq)(stfm1000); + } + } + + return handled ? IRQ_HANDLED : IRQ_NONE; +} +EXPORT_SYMBOL(stfm1000_dri_dma_irq); + +irqreturn_t stfm1000_dri_attn_irq(int irq, void *dev_id) +{ + struct stfm1000 *stfm1000 = dev_id; + int handled = 1; + u32 mask; + + (void)stfm1000; + mask = HW_DRI_CTRL_RD(); + mask &= BM_DRI_CTRL_OVERFLOW_IRQ | BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ | + BM_DRI_CTRL_ATTENTION_IRQ; + + HW_DRI_CTRL_CLR(mask); + + printk(KERN_INFO "DRI_ATTN:%s%s%s\n", + (mask & BM_DRI_CTRL_OVERFLOW_IRQ) ? " OV" : "", + (mask & BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ) ? " SL" : "", + (mask & BM_DRI_CTRL_ATTENTION_IRQ) ? " AT" : ""); + + if (stfm1000->alsa_initialized) { + BUG_ON(stfm1000_alsa_ops->attn_irq == NULL); + (*stfm1000_alsa_ops->attn_irq)(stfm1000); + } + + return handled ? IRQ_HANDLED : IRQ_NONE; +} +EXPORT_SYMBOL(stfm1000_dri_attn_irq); + +void stfm1000_decode_block(struct stfm1000 *stfm1000, const s16 *src, s16 *dst, + int count) +{ + int i; + + if (stfm1000->mute) { + memset(dst, 0, count * sizeof(s16) * 2); + return; + + } + + for (i = 0; i < count; i++, dst += 2, src += 4) { + + stfm1000_filter_decode(&stfm1000->filter_parms, + src[0], src[1], src[2]); + + dst[0] = stfm1000_filter_value_left(&stfm1000->filter_parms); + dst[1] = stfm1000_filter_value_right(&stfm1000->filter_parms); + } + + stfm1000->rssi = stfm1000->filter_parms.RssiDecoded; + stfm1000->stereo = stfm1000->pilot_present && + !stfm1000->filter_parms.pCoefForcedMono; + + /* RDS processing */ + if (stfm1000->rds_demod_running) { + /* rewind */ + src -= count * 4; + stfm1000_rds_demod(&stfm1000->rds_state, src, count); + } + +} +EXPORT_SYMBOL(stfm1000_decode_block); + +void stfm1000_take_down(struct stfm1000 *stfm1000) +{ + mutex_lock(&stfm1000->state_lock); + stfm1000->active = 0; + Take_Down(stfm1000); + mutex_unlock(&stfm1000->state_lock); +} +EXPORT_SYMBOL(stfm1000_take_down); + +void stfm1000_bring_up(struct stfm1000 *stfm1000) +{ + mutex_lock(&stfm1000->state_lock); + + stfm1000->active = 1; + + stfm1000_filter_reset(&stfm1000->filter_parms); + + Bring_Up(stfm1000); + + mutex_unlock(&stfm1000->state_lock); +} +EXPORT_SYMBOL(stfm1000_bring_up); + +void stfm1000_tune_current(struct stfm1000 *stfm1000) +{ + mutex_lock(&stfm1000->state_lock); + sw_tune(stfm1000, stfm1000->freq); + mutex_unlock(&stfm1000->state_lock); +} +EXPORT_SYMBOL(stfm1000_tune_current); + +/* Alternate ZIF Tunings to avoid EMI */ +const struct stfm1000_tune1 +stfm1000_board_emi_tuneups[STFM1000_FREQUENCY_100KHZ_RANGE] = { +#undef TUNE_ENTRY +#define TUNE_ENTRY(f, t1, sd) \ + [(f) - STFM1000_FREQUENCY_100KHZ_MIN] = \ + { .tune1 = (t1), .sdnom = (sd) } + TUNE_ENTRY(765, 0x84030, 0x1BF5E50D), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(780, 0x84240, 0x1BA5162F), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(795, 0x84250, 0x1C2D2F39), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(810, 0x84460, 0x1BDD207E), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(825, 0x84470, 0x1C6138CD), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(839, 0xC4680, 0x1C11F704), /* 061215 Jon, IF +100kHz */ + TUNE_ENTRY(840, 0x84680, 0x1c11f704), + TUNE_ENTRY(855, 0x84890, 0x1BC71C71), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(870, 0x848A0, 0x1C43DE10), /* 061215 Jon, IF +0kHz */ + TUNE_ENTRY(885, 0x84AB0, 0x1BF9B021), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(899, 0xC4CC0, 0x1BB369A9), /* 061025 Arthur, IF +100kHz */ + TUNE_ENTRY(900, 0x84CC0, 0x1BB369A9), /* 061025 Arthur, IF 0kHz */ + TUNE_ENTRY(915, 0x84CD0, 0x1C299A5B), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(930, 0x84ee0, 0x1be3e6aa), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(945, 0x84ef0, 0x1c570f8b), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(959, 0xC5100, 0x1c11f704), + TUNE_ENTRY(960, 0x85100, 0x1c11f704), + TUNE_ENTRY(975, 0x85310, 0x1bd03d57), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(990, 0x85320, 0x1c3dc822), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(1005, 0x85530, 0x1bfc93ff), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(1019, 0xC5740, 0x1BBE683C), /* 061025 Arthur, IF +100kHz */ + TUNE_ENTRY(1020, 0x85740, 0x1bbe683c), /* 061025 Arthur, IF +0kHz */ + TUNE_ENTRY(1035, 0x85750, 0x1c26dab6), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(1050, 0x85960, 0x1be922b4), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(1065, 0x85970, 0x1c4f357c), /* 061101 Arthur, IF +0kHz */ + TUNE_ENTRY(1079, 0xC5B80, 0x1c11f704), + TUNE_ENTRY(1080, 0x85B80, 0x1c11f704), +#undef TUNE_ENTRY +}; + +static const struct stfm1000_tune1 *stfm1000_board_emi_tune(int freq100) +{ + const struct stfm1000_tune1 *tune1; + + if ((unsigned int)(freq100 - STFM1000_FREQUENCY_100KHZ_MIN) >= + STFM1000_FREQUENCY_100KHZ_RANGE) + return NULL; + + tune1 = &stfm1000_board_emi_tuneups[freq100 - + STFM1000_FREQUENCY_100KHZ_MIN]; + if (tune1->tune1 == 0 && tune1->sdnom == 0) + return NULL; + return tune1; +} + +/* freq in kHz */ +static int sw_tune(struct stfm1000 *stfm1000, u32 freq) +{ + u32 freq100 = freq / 100; + int tune_cap; + int i2s_clock; + int mix_reg; + int if_freq, fe_freq; + u32 tune1, sdnom, agc1; + const struct stfm1000_tune1 *tp; + int ret; + + if_freq = 0; + mix_reg = 1; + switch (mix_reg) { + case 0: if_freq = -2; break; + case 1: if_freq = -1; break; + case 2: if_freq = 0; break; + case 3: if_freq = 1; break; + case 4: if_freq = 2; break; + } + + /* handle board specific EMI tuning */ + tp = stfm1000_board_emi_tune(freq100); + if (tp != NULL) { + tune1 = tp->tune1; + sdnom = tp->sdnom; + } else { + fe_freq = freq100 + if_freq; + + /* clamp into range */ + if (fe_freq < STFM1000_FREQUENCY_100KHZ_MIN) + fe_freq = STFM1000_FREQUENCY_100KHZ_MIN; + else if (fe_freq > STFM1000_FREQUENCY_100KHZ_MAX) + fe_freq = STFM1000_FREQUENCY_100KHZ_MAX; + + tp = &stfm1000_tune1_table[fe_freq - + STFM1000_FREQUENCY_100KHZ_MIN]; + + /* bits [14:0], [20:18] */ + tune1 = (tp->tune1 & 0x7fff) | (mix_reg << 18); + sdnom = tp->sdnom; + } + + agc1 = stfm1000->revid == STFM1000_CHIP_REV_TA2 ? 0x0400 : 0x2200; + + ret = stfm1000_write_masked(stfm1000, STFM1000_AGC_CONTROL1, + agc1, 0x3f00); + if (ret != 0) + goto err; + + ret = stfm1000_write_masked(stfm1000, STFM1000_TUNE1, tune1, + 0xFFFF7FFF); /* do not set bit-15 */ + if (ret != 0) + goto err; + + /* keep this around */ + stfm1000->sdnominal_pivot = sdnom; + + ret = stfm1000_write(stfm1000, STFM1000_SDNOMINAL, sdnom); + if (ret != 0) + goto err; + + /* fix for seek-not-stopping on alternate tunings */ + ret = stfm1000_set_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + goto err; + + ret = stfm1000_clear_bits(stfm1000, STFM1000_DATAPATH, + STFM1000_DB_ACCEPT); + if (ret != 0) + goto err; + + ret = stfm1000_set_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_DRI_CLK_EN); + if (ret != 0) + goto err; + + /* 6MHz spur fix */ + if ((freq100 >= 778 && freq100 <= 782) || + (freq100 >= 838 && freq100 <= 842) || + (freq100 >= 898 && freq100 <= 902) || + (freq100 >= 958 && freq100 <= 962) || + (freq100 >= 1018 && freq100 <= 1022) || + (freq100 >= 1078 && freq100 <= 1080)) + i2s_clock = 5; /* 4.8MHz */ + else + i2s_clock = 4; + + ret = stfm1000_write_masked(stfm1000, STFM1000_DATAPATH, + STFM1000_SAI_CLK_DIV(i2s_clock), STFM1000_SAI_CLK_DIV_MASK); + if (ret != 0) + goto err; + + ret = stfm1000_set_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_DRI_CLK_EN); + if (ret != 0) + goto err; + + if (tune1 & 0xf) + ret = stfm1000_set_bits(stfm1000, STFM1000_CLK1, + STFM1000_ENABLE_TAPDELAYFIX); + else + ret = stfm1000_clear_bits(stfm1000, STFM1000_CLK1, + STFM1000_ENABLE_TAPDELAYFIX); + + if (ret != 0) + goto err; + + tune_cap = (int)(stfm1000->tune_cap_a_f - + stfm1000->tune_cap_b_f * freq100); + if (tune_cap < 4) + tune_cap = 4; + ret = stfm1000_write_masked(stfm1000, STFM1000_LNA, + STFM1000_ANTENNA_TUNECAP(tune_cap), + STFM1000_ANTENNA_TUNECAP_MASK); + if (ret != 0) + goto err; + + /* set signal strenth to 0 */ + /* stfm1000_dcdc_update(); */ + + /* cmp_rds_setRdsStatus(0) */ + /* cmp_rds_ResetGroupCallbacks(); */ + stfm1000->freq = freq; + + return 0; +err: + return -1; +} + +static const struct v4l2_queryctrl radio_qctrl[] = { + { + .id = V4L2_CID_AUDIO_MUTE, + .name = "Mute", + .minimum = 0, + .maximum = 1, + .default_value = 1, + .type = V4L2_CTRL_TYPE_BOOLEAN, + }, +}; + +static int vidioc_querycap(struct file *file, void *priv, + struct v4l2_capability *v) +{ + strlcpy(v->driver, "radio-stfm1000", sizeof(v->driver)); + strlcpy(v->card, "STFM1000 Radio", sizeof(v->card)); + sprintf(v->bus_info, "i2c"); + v->version = KERNEL_VERSION(0, 0, 1); + v->capabilities = V4L2_CAP_TUNER; + return 0; +} + +static int vidioc_g_tuner(struct file *file, void *priv, + struct v4l2_tuner *v) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + u32 tmp, rssi_dc_est, tone_data; + u16 rssi_mantissa, rssi_exponent, rssi_decoded; + u16 prssi; + s16 mpx_dc; + int rssi_log; + int ret; + + if (v->index > 0) + return -EINVAL; + + mutex_lock(&stfm1000->state_lock); + + strcpy(v->name, "FM"); + v->type = V4L2_TUNER_RADIO; + v->rangelow = (u32)(87.5 * 16000); + v->rangehigh = (u32)(108 * 16000); + v->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; + v->capability = V4L2_TUNER_CAP_LOW; + v->audmode = V4L2_TUNER_MODE_STEREO; + v->signal = 0; /* tr_getsigstr(); */ + + msleep(50); + + ret = stfm1000_read(stfm1000, STFM1000_RSSI_TONE, &tmp); + if (ret != 0) + goto out; + + rssi_dc_est = tmp & 0xffff; + tone_data = (tmp >> 16) & 0x0fff; + + rssi_mantissa = (rssi_dc_est & 0xffe0) >> 5; /* 11Msb */ + rssi_exponent = rssi_dc_est & 0x001f; /* 5 lsb */ + rssi_decoded = (u32)rssi_mantissa << rssi_exponent; + + /* Convert Rsst to 10log(Rssi) */ + for (prssi = 20; prssi > 0; prssi--) + if (rssi_decoded >= (1 << prssi)) + break; + + rssi_log = (3 * rssi_decoded >> prssi) + (3 * prssi - 3); + /* clamp to positive */ + if (rssi_log < 0) + rssi_log = 0; + /* Compensate for errors in truncation/approximation by adding 1 */ + rssi_log++; + + stfm1000->rssi_dc_est_log = rssi_log; + stfm1000->signal_strength = stfm1000->rssi_dc_est_log; + + /* determine absolute value */ + if (tmp & 0x0800) + mpx_dc = ((tmp >> 16) & 0x0fff) | 0xf000; + else + mpx_dc = (tmp >> 16) & 0x0fff; + stfm1000->mpx_dc = mpx_dc; + mpx_dc = mpx_dc < 0 ? -mpx_dc : mpx_dc; + + v->signal = rssi_decoded & 0xffff; + +out: + mutex_unlock(&stfm1000->state_lock); + + return ret; +} + +static int vidioc_s_tuner(struct file *file, void *priv, + struct v4l2_tuner *v) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + (void)stfm1000; + + if (v->index > 0) + return -EINVAL; + + return 0; +} + +static int vidioc_s_frequency(struct file *file, void *priv, + struct v4l2_frequency *f) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + mutex_lock(&stfm1000->state_lock); + + /* convert from the crazy linux value to our decimal based values */ + stfm1000->freq = (u32)div_u64((u64)(125 * (u64)f->frequency), 2000); + + if (stfm1000->active) + Take_Down(stfm1000); + + sw_tune(stfm1000, stfm1000->freq); + + if (stfm1000->active) + Bring_Up(stfm1000); + + mutex_unlock(&stfm1000->state_lock); + + return 0; +} + +static int vidioc_g_frequency(struct file *file, void *priv, + struct v4l2_frequency *f) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + f->type = V4L2_TUNER_RADIO; + f->frequency = stfm1000->freq * 16; + + return 0; +} + +static int vidioc_queryctrl(struct file *file, void *priv, + struct v4l2_queryctrl *qc) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + int i; + + (void)stfm1000; + + for (i = 0; i < ARRAY_SIZE(radio_qctrl); i++) { + if (qc->id && qc->id == radio_qctrl[i].id) { + memcpy(qc, &radio_qctrl[i], sizeof(*qc)); + return 0; + } + } + return -EINVAL; +} + +static int vidioc_g_ctrl(struct file *file, void *priv, + struct v4l2_control *ctrl) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + switch (ctrl->id) { + + case V4L2_CID_AUDIO_MUTE: + ctrl->value = stfm1000->mute; + return 0; + + } + return -EINVAL; +} + +static int vidioc_s_ctrl(struct file *file, void *priv, + struct v4l2_control *ctrl) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + int ret; + + mutex_lock(&stfm1000->state_lock); + + ret = -EINVAL; + + switch (ctrl->id) { + + case V4L2_CID_AUDIO_MUTE: + stfm1000->mute = ctrl->value; + ret = 0; + break; + } + + mutex_unlock(&stfm1000->state_lock); + + return ret; +} + +static int vidioc_g_audio(struct file *file, void *priv, + struct v4l2_audio *a) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + (void)stfm1000; + + if (a->index > 1) + return -EINVAL; + + strcpy(a->name, "Radio"); + a->capability = V4L2_AUDCAP_STEREO; + return 0; +} + +static int vidioc_s_audio(struct file *file, void *priv, + struct v4l2_audio *a) +{ + if (a->index > 1) + return -EINVAL; + return 0; +} + +static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + (void)stfm1000; + + *i = 0; + + return 0; +} + +static int vidioc_s_input(struct file *file, void *priv, unsigned int i) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + (void)stfm1000; + + if (i != 0) + return -EINVAL; + + return 0; +} + +const struct v4l2_ioctl_ops stfm_ioctl_ops = { + .vidioc_querycap = vidioc_querycap, + .vidioc_g_tuner = vidioc_g_tuner, + .vidioc_s_tuner = vidioc_s_tuner, + .vidioc_g_frequency = vidioc_g_frequency, + .vidioc_s_frequency = vidioc_s_frequency, + .vidioc_queryctrl = vidioc_queryctrl, + .vidioc_g_ctrl = vidioc_g_ctrl, + .vidioc_s_ctrl = vidioc_s_ctrl, + .vidioc_g_audio = vidioc_g_audio, + .vidioc_s_audio = vidioc_s_audio, + .vidioc_g_input = vidioc_g_input, + .vidioc_s_input = vidioc_s_input, +}; + +static int stfm1000_open(struct inode *inode, struct file *file) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + mutex_lock(&stfm1000->state_lock); + stfm1000->users = 1; + mutex_unlock(&stfm1000->state_lock); + + return 0; +} +static int stfm1000_close(struct inode *inode, struct file *file) +{ + struct stfm1000 *stfm1000 = stfm1000_from_file(file); + + if (!stfm1000) + return -ENODEV; + + stfm1000->users = 0; + if (stfm1000->removed) + kfree(stfm1000); + return 0; +} + +static const struct file_operations stfm1000_fops = { + .owner = THIS_MODULE, + .open = stfm1000_open, + .release = stfm1000_close, + .ioctl = video_ioctl2, +#ifdef CONFIG_COMPAT + .compat_ioctl = v4l_compat_ioctl32, +#endif + .llseek = no_llseek, +}; + +/* sysfs */ + +#define STFM1000_RO_ATTR(var) \ +static ssize_t stfm1000_show_ ## var(struct device *d, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct i2c_client *client = to_i2c_client(d); \ + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); \ + return sprintf(buf, "%d\n", stfm1000->var); \ +} \ +static DEVICE_ATTR(var, 0444, stfm1000_show_ ##var, NULL) + +#define STFM1000_RW_ATTR(var) \ +static ssize_t stfm1000_show_ ## var(struct device *d, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct i2c_client *client = to_i2c_client(d); \ + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); \ + return sprintf(buf, "%u\n", stfm1000->var); \ +} \ +static ssize_t stfm1000_store_ ## var(struct device *d, \ + struct device_attribute *attr, const char *buf, size_t size) \ +{ \ + struct i2c_client *client = to_i2c_client(d); \ + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); \ + unsigned long v; \ + \ + strict_strtoul(buf, 0, &v); \ + stfm1000_commit_ ## var(stfm1000, v); \ + return size; \ +} \ +static DEVICE_ATTR(var, 0644, stfm1000_show_ ##var, stfm1000_store_ ##var) + +#define STFM1000_RW_ATTR_SIMPLE(var) \ +static void stfm1000_commit_ ## var(struct stfm1000 *stfm1000, \ + unsigned long value) \ +{ \ + stfm1000->var = value; \ +} \ +STFM1000_RW_ATTR(var) + +STFM1000_RO_ATTR(weak_signal); +STFM1000_RO_ATTR(pilot_present); +STFM1000_RO_ATTR(stereo); +STFM1000_RO_ATTR(rssi); +STFM1000_RO_ATTR(mpx_dc); +STFM1000_RO_ATTR(signal_strength); +STFM1000_RW_ATTR_SIMPLE(rds_signal_th); +STFM1000_RO_ATTR(rds_present); +STFM1000_RO_ATTR(is_station); + +static void stfm1000_commit_georegion(struct stfm1000 *stfm1000, + unsigned long value) +{ + /* don't do anything for illegal region */ + if (value != 0 && value != 1) + return; + + mutex_lock(&stfm1000->state_lock); + + stfm1000->georegion = value; + if (stfm1000->georegion == 0) + stfm1000_clear_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_DEEMPH_50_75B); + else + stfm1000_set_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_DEEMPH_50_75B); + + mutex_unlock(&stfm1000->state_lock); +} +STFM1000_RW_ATTR(georegion); + +static void stfm1000_commit_freq(struct stfm1000 *stfm1000, + unsigned long value) +{ + mutex_lock(&stfm1000->state_lock); + + /* clamp */ + if (value < STFM1000_FREQUENCY_100KHZ_MIN * 100) + value = STFM1000_FREQUENCY_100KHZ_MIN * 100; + else if (value > STFM1000_FREQUENCY_100KHZ_MAX * 100) + value = STFM1000_FREQUENCY_100KHZ_MAX * 100; + + stfm1000->freq = value; + + if (stfm1000->active) + Take_Down(stfm1000); + + sw_tune(stfm1000, stfm1000->freq); + + if (stfm1000->active) + Bring_Up(stfm1000); + + mutex_unlock(&stfm1000->state_lock); +} +STFM1000_RW_ATTR(freq); + +static void stfm1000_commit_mute(struct stfm1000 *stfm1000, + unsigned long value) +{ + stfm1000->mute = !!value; +} +STFM1000_RW_ATTR(mute); + +static void stfm1000_commit_force_mono(struct stfm1000 *stfm1000, + unsigned long value) +{ + stfm1000->force_mono = !!value; + /* set force mono parameters for the filter */ + stfm1000->filter_parms.pCoefForcedMono = stfm1000->force_mono; + + /* yeah, I know, it's stupid */ + stfm1000->rds_state.demod.pCoefForcedMono = + stfm1000->filter_parms.pCoefForcedMono; +} +STFM1000_RW_ATTR(force_mono); + +STFM1000_RW_ATTR_SIMPLE(monitor_period); +STFM1000_RW_ATTR_SIMPLE(quality_monitor); +STFM1000_RW_ATTR_SIMPLE(quality_monitor_period); +STFM1000_RW_ATTR_SIMPLE(agc_monitor_period); +STFM1000_RW_ATTR_SIMPLE(tune_rssi_th); +STFM1000_RW_ATTR_SIMPLE(tune_mpx_dc_th); + +static void stfm1000_commit_rds_enable(struct stfm1000 *stfm1000, + unsigned long value) +{ + /* don't do anything for illegal values (or for not TB2) */ + if ((value != 0 && value != 1) || + stfm1000->revid == STFM1000_CHIP_REV_TA2) + return; + + mutex_lock(&stfm1000->state_lock); + + stfm1000->rds_enable = value; + if (stfm1000->rds_enable == 0) + stfm1000_clear_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_RDS_ENABLE); + else + stfm1000_set_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_RDS_ENABLE); + + mutex_unlock(&stfm1000->state_lock); +} +STFM1000_RW_ATTR(rds_enable); + +static void stfm1000_commit_rds_sync(struct stfm1000 *stfm1000, + unsigned long value) +{ + stfm1000->rds_sync = stfm1000->rds_enable && !!value; +} +STFM1000_RW_ATTR(rds_sync); + +STFM1000_RW_ATTR_SIMPLE(rds_pkt_good); +STFM1000_RW_ATTR_SIMPLE(rds_pkt_bad); +STFM1000_RW_ATTR_SIMPLE(rds_pkt_recovered); +STFM1000_RW_ATTR_SIMPLE(rds_pkt_lost_sync); +STFM1000_RW_ATTR_SIMPLE(rds_bit_overruns); +STFM1000_RW_ATTR_SIMPLE(rds_info); + +static void stfm1000_commit_rds_sdnominal_adapt(struct stfm1000 *stfm1000, + unsigned long value) +{ + stfm1000->rds_sdnominal_adapt = !!value; + stfm1000->rds_state.demod.sdnom_adapt = stfm1000->rds_sdnominal_adapt; +} +STFM1000_RW_ATTR(rds_sdnominal_adapt); + +static void stfm1000_commit_rds_phase_pop(struct stfm1000 *stfm1000, + unsigned long value) +{ + stfm1000->rds_phase_pop = !!value; + stfm1000->rds_state.demod.PhasePoppingEnabled = + stfm1000->rds_phase_pop; +} +STFM1000_RW_ATTR(rds_phase_pop); + +STFM1000_RW_ATTR_SIMPLE(tuning_grid_50KHz); + +static ssize_t stfm1000_show_rds_ps(struct device *d, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(d); + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); + char ps[9]; + + if (stfm1000_rds_get_ps(&stfm1000->rds_state, ps, sizeof(ps)) <= 0) + ps[0] = '\0'; + + return sprintf(buf, "%s\n", ps); +} +static DEVICE_ATTR(rds_ps, 0444, stfm1000_show_rds_ps, NULL); + +static ssize_t stfm1000_show_rds_text(struct device *d, + struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(d); + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); + char text[65]; + + if (stfm1000_rds_get_text(&stfm1000->rds_state, text, + sizeof(text)) <= 0) + text[0] = '\0'; + + return sprintf(buf, "%s\n", text); +} +static DEVICE_ATTR(rds_text, 0444, stfm1000_show_rds_text, NULL); + +static struct device_attribute *stfm1000_attrs[] = { + &dev_attr_agc_monitor_period, + &dev_attr_force_mono, + &dev_attr_freq, + &dev_attr_georegion, + &dev_attr_is_station, + &dev_attr_monitor_period, + &dev_attr_mpx_dc, + &dev_attr_mute, + &dev_attr_pilot_present, + &dev_attr_quality_monitor, + &dev_attr_quality_monitor_period, + &dev_attr_rds_bit_overruns, + &dev_attr_rds_enable, + &dev_attr_rds_info, + &dev_attr_rds_phase_pop, + &dev_attr_rds_pkt_bad, + &dev_attr_rds_pkt_good, + &dev_attr_rds_pkt_lost_sync, + &dev_attr_rds_pkt_recovered, + &dev_attr_rds_present, + &dev_attr_rds_ps, + &dev_attr_rds_sdnominal_adapt, + &dev_attr_rds_signal_th, + &dev_attr_rds_sync, + &dev_attr_rds_text, + &dev_attr_rssi, + &dev_attr_signal_strength, + &dev_attr_stereo, + &dev_attr_tune_mpx_dc_th, + &dev_attr_tune_rssi_th, + &dev_attr_tuning_grid_50KHz, + &dev_attr_weak_signal, + NULL, +}; + +/* monitor thread */ + +static void rds_process(struct stfm1000 *stfm1000) +{ + int count, bit; + int mix_reg, sdnominal_reg; + u32 sdnom, sdnom_new, limit; + u8 buf[8]; + + if (!stfm1000->rds_enable) + return; + + if (stfm1000->rds_sync && + stfm1000->rssi_dc_est_log > stfm1000->rds_signal_th) { + if (stfm1000->rds_info) + printk(KERN_INFO "RDS: sync\n"); + stfm1000_rds_reset(&stfm1000->rds_state); + stfm1000->rds_demod_running = 1; + stfm1000->rds_sync = 0; + } + + if (!stfm1000->rds_demod_running) + return; + + /* process mix reg requests */ + spin_lock_irq(&stfm1000->rds_lock); + mix_reg = stfm1000_rds_mix_msg_get(&stfm1000->rds_state); + spin_unlock_irq(&stfm1000->rds_lock); + + if (mix_reg != -1) { + + if (stfm1000->rds_info) + printk(KERN_INFO "RDS: new RDS_MIXOFFSET %d\n", + mix_reg & 1); + + /* update register */ + if (mix_reg & 1) + stfm1000_set_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_RDS_MIXOFFSET); + else + stfm1000_clear_bits(stfm1000, STFM1000_INITIALIZATION2, + STFM1000_RDS_MIXOFFSET); + + /* signal it's processed */ + spin_lock_irq(&stfm1000->rds_lock); + stfm1000_rds_mix_msg_processed(&stfm1000->rds_state, mix_reg); + spin_unlock_irq(&stfm1000->rds_lock); + } + + /* process sdnominal reg requests */ + spin_lock_irq(&stfm1000->rds_lock); + sdnominal_reg = stfm1000_rds_sdnominal_msg_get(&stfm1000->rds_state); + spin_unlock_irq(&stfm1000->rds_lock); + + /* any change? */ + if (sdnominal_reg != 0) { + + stfm1000_read(stfm1000, STFM1000_SDNOMINAL, &sdnom); + + sdnom_new = sdnom + sdnominal_reg; + + /* Limit SDNOMINAL to within 244 ppm of its ideal value */ + limit = stfm1000->sdnominal_pivot + + (stfm1000->sdnominal_pivot >> 12); + if (sdnom_new > limit) + sdnom_new = limit; + + limit = stfm1000->sdnominal_pivot - + (stfm1000->sdnominal_pivot >> 12); + if (sdnom_new < limit) + sdnom_new = limit; + + /* write the register */ + stfm1000_write(stfm1000, STFM1000_SDNOMINAL, sdnom_new); + + /* signal it's processed */ + spin_lock_irq(&stfm1000->rds_lock); + stfm1000_rds_sdnominal_msg_processed(&stfm1000->rds_state, + sdnominal_reg); + spin_unlock_irq(&stfm1000->rds_lock); + } + + /* pump bits out & pass them to the process function */ + spin_lock_irq(&stfm1000->rds_lock); + while (stfm1000_rds_bits_available(&stfm1000->rds_state) > 128) { + count = 0; + while (count++ < 128 && + (bit = stmf1000_rds_get_bit( + &stfm1000->rds_state)) >= 0) { + spin_unlock_irq(&stfm1000->rds_lock); + + /* push bit for packet processing */ + stfm1000_rds_packet_bit(&stfm1000->rds_state, bit); + + spin_lock_irq(&stfm1000->rds_lock); + } + } + spin_unlock_irq(&stfm1000->rds_lock); + + /* now we're free to process non-interrupt related work */ + while (stfm1000_rds_packet_dequeue(&stfm1000->rds_state, buf) == 0) { + + if (stfm1000->rds_info) + printk(KERN_INFO "RDS-PKT: %02x %02x %02x %02x " + "%02x %02x %02x %02x\n", + buf[0], buf[1], buf[2], buf[3], + buf[4], buf[5], buf[6], buf[7]); + + stfm1000_rds_process_packet(&stfm1000->rds_state, buf); + } + + /* update our own counters */ + stfm1000->rds_pkt_good += stfm1000->rds_state.pkt.good_packets; + stfm1000->rds_pkt_bad += stfm1000->rds_state.pkt.bad_packets; + stfm1000->rds_pkt_recovered += + stfm1000->rds_state.pkt.recovered_packets; + stfm1000->rds_pkt_lost_sync += + stfm1000->rds_state.pkt.sync_lost_packets; + stfm1000->rds_bit_overruns += + stfm1000->rds_state.demod.RdsDemodSkippedBitCnt; + + /* zero them now */ + stfm1000->rds_state.pkt.good_packets = 0; + stfm1000->rds_state.pkt.bad_packets = 0; + stfm1000->rds_state.pkt.recovered_packets = 0; + stfm1000->rds_state.pkt.sync_lost_packets = 0; + stfm1000->rds_state.demod.RdsDemodSkippedBitCnt = 0; + + /* reset requested from RDS handler? */ + if (stfm1000_rds_get_reset_req(&stfm1000->rds_state)) { + if (stfm1000->rds_info) + printk(KERN_INFO "RDS: reset requested\n"); + stfm1000_rds_reset(&stfm1000->rds_state); + + stfm1000->rds_sync = stfm1000->rds_enable; /* force sync (if RDS) */ + stfm1000->rds_demod_running = 0; + stfm1000->rssi_dc_est_log = 0; + stfm1000->signal_strength = 0; + } +} + +void stfm1000_monitor_signal(struct stfm1000 *stfm1000, int bit) +{ + set_bit(bit, &stfm1000->thread_events); + return wake_up_interruptible(&stfm1000->thread_wait); +} + +static int stfm1000_monitor_thread(void *data) +{ + struct stfm1000 *stfm1000 = data; + int ret; + + printk(KERN_INFO "stfm1000: monitor thread started\n"); + + set_freezable(); + + /* Hmm, linux becomes *very* unhappy without this ... */ + while (!kthread_should_stop()) { + + ret = wait_event_interruptible_timeout(stfm1000->thread_wait, + stfm1000->thread_events == 0, + msecs_to_jiffies(stfm1000->monitor_period)); + + stfm1000->thread_events = 0; + + if (kthread_should_stop()) + break; + + try_to_freeze(); + + mutex_lock(&stfm1000->state_lock); + + /* we must be active */ + if (!stfm1000->active) + goto next; + + if (stfm1000->rds_enable) + rds_process(stfm1000); + + /* perform quality monitor */ + if (time_after_eq(jiffies, stfm1000->next_quality_monitor)) { + + /* full quality monitor? */ + if (stfm1000->quality_monitor) + Monitor_STFM_Quality(stfm1000); + else /* simple */ + Is_Station(stfm1000); + + while (time_after_eq(jiffies, + stfm1000->next_quality_monitor)) + stfm1000->next_quality_monitor += + msecs_to_jiffies( + stfm1000->quality_monitor_period); + } + + /* perform AGC monitor (if enabled) */ + if (stfm1000->agc_monitor && time_after_eq(jiffies, + stfm1000->next_agc_monitor)) { + Monitor_STFM_AGC(stfm1000); + while (time_after_eq(jiffies, + stfm1000->next_agc_monitor)) + stfm1000->next_agc_monitor += + msecs_to_jiffies( + stfm1000->agc_monitor_period); + } +next: + mutex_unlock(&stfm1000->state_lock); + } + + printk(KERN_INFO "stfm1000: monitor thread stopped\n"); + + return 0; +} + +static u64 stfm1000_dma_mask = DMA_32BIT_MASK; + +static int stfm1000_probe(struct i2c_client *client, + const struct i2c_device_id *did) +{ + struct device *dev; + struct stfm1000 *stfm1000; + struct video_device *vd; + struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); + int ret; + u32 id; + const char *idtxt; + int i; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_warn(&adapter->dev, + "I2C doesn't support I2C_FUNC_SMBUS_BYTE_DATA\n"); + return -EIO; + } + + /* make sure the dma masks are set correctly */ + dev = &client->dev; + if (!dev->dma_mask) + dev->dma_mask = &stfm1000_dma_mask; + if (!dev->coherent_dma_mask) + dev->coherent_dma_mask = DMA_32BIT_MASK; + + stfm1000 = kzalloc(sizeof(*stfm1000), GFP_KERNEL); + if (!stfm1000) + return -ENOMEM; + + stfm1000->client = client; + i2c_set_clientdata(client, stfm1000); + + mutex_init(&stfm1000->xfer_lock); + mutex_init(&stfm1000->state_lock); + + vd = &stfm1000->radio; + + strcpy(vd->name, "stfm1000"); + vd->vfl_type = VID_TYPE_TUNER; + vd->fops = &stfm1000_fops; + vd->ioctl_ops = &stfm_ioctl_ops; + + /* vd->debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG; */ + + vd->parent = &client->dev; + + ret = video_register_device(vd, VFL_TYPE_RADIO, -1); + if (ret != 0) { + dev_warn(&adapter->dev, + "Cannot register radio device\n"); + goto out; + } + + spin_lock_init(&stfm1000->rds_lock); + + stfm1000_setup_reg_set(stfm1000); + + /* stfm1000->dbgflg |= STFM1000_DBGFLG_I2C; */ + + ret = stfm1000_read(stfm1000, STFM1000_CHIPID, &id); + if (ret < 0) { + dev_warn(&adapter->dev, + "Cannot read ID register\n"); + goto out; + } + stfm1000->revid = id & 0xff; + + /* NOTE: the tables are precalculated */ + stfm1000->tune_rssi_th = 28; + stfm1000->tune_mpx_dc_th = 300; + stfm1000->adj_chan_th = 100; + stfm1000->pilot_est_th = 25; + stfm1000->agc_monitor = 0; /* AGC monitor disabled */ + stfm1000->quality_monitor = 1; + stfm1000->weak_signal = 0; + stfm1000->prev_pilot_present = 0; + stfm1000->tune_cap_a_f = (u32)(72.4 * 65536); + stfm1000->tune_cap_b_f = (u32)(0.07 * 65536); + + /* only TB2 supports RDS */ + stfm1000->rds_enable = stfm1000->revid == STFM1000_CHIP_REV_TB2 && + rds_enable; + stfm1000->rds_present = 0; + stfm1000->rds_signal_th = 33; + + stfm1000->freq = 92600; + + stfm1000->georegion = georegion; + stfm1000->rssi = 0; + stfm1000->stereo = 0; + stfm1000->force_mono = 0; + stfm1000->monitor_period = 100; + stfm1000->quality_monitor_period = 1000; + stfm1000->agc_monitor_period = 200; + + stfm1000->rds_sdnominal_adapt = 0; + stfm1000->rds_phase_pop = 1; + + /* enable info about RDS */ + stfm1000->rds_info = 0; + + ret = stfm1000_power_up(stfm1000); + if (ret != 0) { + printk(KERN_ERR "%s: stfm1000_power_up failed\n", + __func__); + goto out; + } + + if (stfm1000_alsa_ops && stfm1000_alsa_ops->init) { + ret = (*stfm1000_alsa_ops->init)(stfm1000); + if (ret != 0) + goto out; + stfm1000->alsa_initialized = 1; + } + + ret = 0; + for (i = 0; stfm1000_attrs[i]; i++) { + ret = device_create_file(dev, stfm1000_attrs[i]); + if (ret) + break; + } + if (ret) { + while (--i >= 0) + device_remove_file(dev, stfm1000_attrs[i]); + goto out; + } + + /* add it to the list */ + mutex_lock(&devlist_lock); + stfm1000->idx = stfm1000_devcount++; + list_add_tail(&stfm1000->devlist, &stfm1000_devlist); + mutex_unlock(&devlist_lock); + + init_waitqueue_head(&stfm1000->thread_wait); + stfm1000->thread = kthread_run(stfm1000_monitor_thread, stfm1000, + "stfm1000-%d", stfm1000->idx); + if (stfm1000->thread == NULL) { + printk(KERN_ERR "stfm1000: kthread_run failed\n"); + goto out; + } + + idtxt = stfm1000_get_rev_txt(stfm1000->revid); + if (idtxt == NULL) + printk(KERN_INFO "STFM1000: Loaded for unknown revision id " + "0x%02x\n", stfm1000->revid); + else + printk(KERN_INFO "STFM1000: Loaded for revision %s\n", idtxt); + + return 0; + +out: + kfree(stfm1000); + return ret; +} + +static int stfm1000_remove(struct i2c_client *client) +{ + struct stfm1000 *stfm1000 = i2c_get_clientdata(client); + struct device *dev = &client->dev; + int i; + + kthread_stop(stfm1000->thread); + + for (i = 0; stfm1000_attrs[i]; i++) + device_remove_file(dev, stfm1000_attrs[i]); + + if (stfm1000->alsa_initialized) { + BUG_ON(stfm1000_alsa_ops->release == NULL); + (*stfm1000_alsa_ops->release)(stfm1000); + stfm1000->alsa_initialized = 0; + } + + stfm1000_power_down(stfm1000); + + video_unregister_device(&stfm1000->radio); + + mutex_lock(&devlist_lock); + list_del(&stfm1000->devlist); + mutex_unlock(&devlist_lock); + + kfree(stfm1000); + return 0; +} + +static const struct i2c_device_id stfm1000_id[] = { + { "stfm1000", 0xC0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, stfm1000_id); + +static struct i2c_driver stfm1000_i2c_driver = { + .driver = { + .name = "stfm1000", + }, + .probe = stfm1000_probe, + .remove = stfm1000_remove, + .id_table = stfm1000_id, +}; + +static int __init +stfm1000_init(void) +{ + /* pull those in */ + (void)Lock_Station; + (void)Unlock_Station; + return i2c_add_driver(&stfm1000_i2c_driver); +} + +static void __exit +stfm1000_exit(void) +{ + i2c_del_driver(&stfm1000_i2c_driver); + + stfm1000_alsa_ops = NULL; +} + +module_init(stfm1000_init); +module_exit(stfm1000_exit); + +MODULE_AUTHOR("Pantelis Antoniou"); +MODULE_DESCRIPTION("A driver for the STFM1000 chip."); +MODULE_LICENSE("GPL"); + +module_param(georegion, int, 0400); +module_param(rds_enable, int, 0400); --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/Kconfig @@ -0,0 +1,26 @@ +config RADIO_STFM1000 + tristate "STFM1000 support" + depends on I2C && VIDEO_V4L2 && ARCH_STMP3XXX + select I2C_ALGOBIT + ---help--- + Choose Y here if you have this FM radio card, and then fill in the + port address below. + + In order to control your radio card, you will need to use programs + that are compatible with the Video For Linux API. Information on + this API and pointers to "v4l" programs may be found at + . + + To compile this driver as a module, choose M here: the + module will be called stfm1000. + +config RADIO_STFM1000_ALSA + tristate "STFM1000 audio support" + depends on RADIO_STFM1000 && SND + select SND_PCM + ---help--- + This is a video4linux driver for direct (DMA) audio in + STFM1000 using ALSA + + To compile this driver as a module, choose M here: the + module will be called stfm1000-alsa. --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-alsa.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-alsa.c @@ -0,0 +1,660 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include /* for KERNEL_VERSION MACRO */ +#include +#include +#include +#include +#include + +#include "stfm1000.h" + +#define STFM1000_PERIODS 16 + +static int stfm1000_snd_volume_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 2; /* two channels */ + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 20; + return 0; +} + +static int stfm1000_snd_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct stfm1000 *stfm1000 = snd_kcontrol_chip(kcontrol); + + (void)stfm1000; + ucontrol->value.integer.value[0] = 0; /* left */ + ucontrol->value.integer.value[1] = 0; /* right */ + return 0; +} + +static int stfm1000_snd_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct stfm1000 *stfm1000 = snd_kcontrol_chip(kcontrol); + int change; + int left, right; + + (void)stfm1000; + + left = ucontrol->value.integer.value[0]; + if (left < 0) + left = 0; + if (left > 20) + left = 20; + right = ucontrol->value.integer.value[1]; + if (right < 0) + right = 0; + if (right > 20) + right = 20; + + change = 1; + return change; +} + +static struct snd_kcontrol_new stfm1000_snd_controls[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Radio Volume", + .index = 0, + .info = stfm1000_snd_volume_info, + .get = stfm1000_snd_volume_get, + .put = stfm1000_snd_volume_put, + .private_value = 0, + }, +}; + +static struct snd_pcm_hardware stfm1000_snd_capture = { + + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .rate_min = 44100, + .rate_max = 48000, + .channels_min = 2, + .channels_max = 2, + .buffer_bytes_max = SZ_256K, + .period_bytes_min = SZ_4K, + .period_bytes_max = SZ_4K, + .periods_min = STFM1000_PERIODS, + .periods_max = STFM1000_PERIODS, +}; + +static int stfm1000_snd_capture_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stfm1000 *stfm1000 = snd_pcm_substream_chip(substream); + int err; + + /* should never happen, just a sanity check */ + BUG_ON(stfm1000 == NULL); + + mutex_lock(&stfm1000->deffered_work_lock); + stfm1000->read_count = 0; + stfm1000->read_offset = 0; + + stfm1000->substream = substream; + runtime->private_data = stfm1000; + runtime->hw = stfm1000_snd_capture; + + mutex_unlock(&stfm1000->deffered_work_lock); + + err = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (err < 0) { + printk(KERN_ERR "%s: snd_pcm_hw_constraint_integer " + "SNDRV_PCM_HW_PARAM_PERIODS failed\n", __func__); + return err; + } + + err = snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_PERIODS, 2); + if (err < 0) { + printk(KERN_ERR "%s: snd_pcm_hw_constraint_integer " + "SNDRV_PCM_HW_PARAM_PERIODS failed\n", __func__); + return err; + } + + return 0; +} + +static int stfm1000_snd_capture_close(struct snd_pcm_substream *substream) +{ + struct stfm1000 *stfm1000 = snd_pcm_substream_chip(substream); + + (void)stfm1000; /* nothing */ + return 0; +} + +static int stfm1000_snd_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *hw_params) +{ + struct stfm1000 *stfm1000 = snd_pcm_substream_chip(substream); + unsigned int period_size, periods; + int ret; + + periods = params_periods(hw_params); + period_size = params_period_bytes(hw_params); + + if (period_size < 0x100 || period_size > 0x10000) + return -EINVAL; + if (periods < STFM1000_PERIODS) + return -EINVAL; + if (period_size * periods > 1024 * 1024) + return -EINVAL; + + stfm1000->blocks = periods; + stfm1000->blksize = period_size; + stfm1000->bufsize = params_buffer_bytes(hw_params); + + ret = snd_pcm_lib_malloc_pages(substream, stfm1000->bufsize); + if (ret < 0) { /* 0 & 1 are valid returns */ + printk(KERN_ERR "%s: snd_pcm_lib_malloc_pages() failed\n", + __func__); + return ret; + } + + /* the dri buffer is twice as large as the audio buffer */ + stfm1000->dri_bufsz = (stfm1000->bufsize / 4) * + sizeof(struct stfm1000_dri_sample); + stfm1000->dri_buf = dma_alloc_coherent(&stfm1000->radio.dev, + stfm1000->dri_bufsz, &stfm1000->dri_phys, GFP_KERNEL); + if (stfm1000->dri_buf == NULL) { + printk(KERN_ERR "%s: dma_alloc_coherent() failed\n", __func__); + snd_pcm_lib_free_pages(substream); + return -ENOMEM; + } + + return ret; +} + +static int stfm1000_snd_hw_free(struct snd_pcm_substream *substream) +{ + struct stfm1000 *stfm1000 = snd_pcm_substream_chip(substream); + + if (stfm1000->dri_buf) { + dma_free_coherent(&stfm1000->radio.dev, + (stfm1000->bufsize / 4) * + sizeof(struct stfm1000_dri_sample), + stfm1000->dri_buf, stfm1000->dri_phys); + stfm1000->dri_buf = NULL; + stfm1000->dri_phys = 0; + } + snd_pcm_lib_free_pages(substream); + return 0; +} + + +static int stfm1000_snd_capture_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stfm1000 *stfm1000 = snd_pcm_substream_chip(substream); + + stfm1000->substream = substream; + + if (snd_pcm_format_width(runtime->format) != 16 || + !snd_pcm_format_signed(runtime->format) || + snd_pcm_format_big_endian(runtime->format)) { + printk(KERN_INFO "STFM1000: ALSA capture_prepare illegal format\n"); + return -EINVAL; + } + + /* really shouldn't happen */ + BUG_ON(stfm1000->blocks > stfm1000->desc_num); + + mutex_lock(&stfm1000->deffered_work_lock); + + if (stfm1000->now_recording != 0) { + printk(KERN_INFO "STFM1000: ALSA capture_prepare still running\n"); + mutex_unlock(&stfm1000->deffered_work_lock); + return -EBUSY; + } + stfm1000->now_recording = 1; + + mutex_unlock(&stfm1000->deffered_work_lock); + + return 0; + +} + +static void stfm1000_snd_capture_trigger_start(struct work_struct *work) +{ + struct stfm1000 *stfm1000; + + stfm1000 = container_of(work, struct stfm1000, + snd_capture_start_work.work); + + mutex_lock(&stfm1000->deffered_work_lock); + + BUG_ON(stfm1000->now_recording != 1); + + stfm1000_bring_up(stfm1000); + + mutex_unlock(&stfm1000->deffered_work_lock); +} + +static void stfm1000_snd_capture_trigger_stop(struct work_struct *work) +{ + struct stfm1000 *stfm1000; + + stfm1000 = container_of(work, struct stfm1000, + snd_capture_stop_work.work); + + mutex_lock(&stfm1000->deffered_work_lock); + + stfm1000->stopping_recording = 1; + + stfm1000_take_down(stfm1000); + + BUG_ON(stfm1000->now_recording != 1); + stfm1000->now_recording = 0; + + stfm1000->stopping_recording = 0; + + mutex_unlock(&stfm1000->deffered_work_lock); +} + +static int execute_non_atomic(work_func_t fn, struct execute_work *ew) +{ + if (!in_atomic() && !in_interrupt()) { + fn(&ew->work); + return 0; + } + + INIT_WORK(&ew->work, fn); + schedule_work(&ew->work); + + return 1; +} + +static int stfm1000_snd_capture_trigger(struct snd_pcm_substream *substream, + int cmd) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stfm1000 *stfm1000 = runtime->private_data; + int err = 0; + + (void)stfm1000; + + switch (cmd) { + + case SNDRV_PCM_TRIGGER_START: + execute_non_atomic(stfm1000_snd_capture_trigger_start, + &stfm1000->snd_capture_start_work); + break; + + case SNDRV_PCM_TRIGGER_STOP: + execute_non_atomic(stfm1000_snd_capture_trigger_stop, + &stfm1000->snd_capture_stop_work); + break; + + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + stmp3xxx_dma_unfreeze(stfm1000->dma_ch); + break; + + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + stmp3xxx_dma_freeze(stfm1000->dma_ch); + break; + + default: + err = -EINVAL; + break; + } + + return err; +} + +static snd_pcm_uframes_t +stfm1000_snd_capture_pointer(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct stfm1000 *stfm1000 = runtime->private_data; + + if (stfm1000->read_count) { + stfm1000->read_count -= snd_pcm_lib_period_bytes(substream); + stfm1000->read_offset += snd_pcm_lib_period_bytes(substream); + if (stfm1000->read_offset == substream->runtime->dma_bytes) + stfm1000->read_offset = 0; + } + + return bytes_to_frames(runtime, stfm1000->read_offset); +} + +static struct snd_pcm_ops stfm1000_snd_capture_ops = { + .open = stfm1000_snd_capture_open, + .close = stfm1000_snd_capture_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = stfm1000_snd_hw_params, + .hw_free = stfm1000_snd_hw_free, + .prepare = stfm1000_snd_capture_prepare, + .trigger = stfm1000_snd_capture_trigger, + .pointer = stfm1000_snd_capture_pointer, +}; + +static void stfm1000_snd_free(struct snd_card *card) +{ + struct stfm1000 *stfm1000 = card->private_data; + + free_irq(IRQ_DRI_ATTENTION, stfm1000); + free_irq(IRQ_DRI_DMA, stfm1000); +} + +static int stfm1000_alsa_instance_init(struct stfm1000 *stfm1000) +{ + int ret, i; + struct snd_card *card; + struct snd_pcm *pcm; + struct snd_kcontrol *ctl; + + mutex_init(&stfm1000->deffered_work_lock); + + /* request dma channel */ + stfm1000->desc_num = STFM1000_PERIODS; + stfm1000->dma_ch = STMP3xxx_DMA(5, STMP3XXX_BUS_APBX); + ret = stmp3xxx_dma_request(stfm1000->dma_ch, &stfm1000->radio.dev, + "stmp3xxx dri"); + if (ret != 0) { + printk(KERN_ERR "%s: stmp3xxx_dma_request failed\n", __func__); + goto err; + } + + stfm1000->dma = kzalloc(sizeof(*stfm1000->dma) * stfm1000->desc_num, + GFP_KERNEL); + if (stfm1000->dma == NULL) { + printk(KERN_ERR "%s: stmp3xxx_dma_request failed\n", __func__); + ret = -ENOMEM; + goto err_rel_dma; + } + + for (i = 0; i < stfm1000->desc_num; i++) { + ret = stmp3xxx_dma_allocate_command(stfm1000->dma_ch, + &stfm1000->dma[i]); + if (ret != 0) { + printk(KERN_ERR "%s: stmp3xxx_dma_allocate_command " + "failed\n", __func__); + goto err_free_dma; + } + } + + /* allocate ALSA card structure (we only need an extra pointer + * back to stfm1000) */ + card = snd_card_new(-1, NULL, THIS_MODULE, 0); + if (card == NULL) { + ret = -ENOMEM; + printk(KERN_ERR "%s: snd_card_new failed\n", __func__); + goto err_free_dma; + } + stfm1000->card = card; + card->private_data = stfm1000; /* point back */ + + /* mixer controls */ + strcpy(card->driver, "stfm1000"); + card->private_free = stfm1000_snd_free; + + strcpy(card->mixername, "stfm1000 mixer"); + for (i = 0; i < ARRAY_SIZE(stfm1000_snd_controls); i++) { + ctl = snd_ctl_new1(&stfm1000_snd_controls[i], stfm1000); + if (ctl == NULL) { + printk(KERN_ERR "%s: snd_ctl_new1 failed\n", __func__); + goto err_free_controls; + } + ret = snd_ctl_add(card, ctl); + if (ret != 0) { + printk(KERN_ERR "%s: snd_ctl_add failed\n", __func__); + goto err_free_controls; + } + } + + /* PCM */ + ret = snd_pcm_new(card, "STFM1000 PCM", 0, 0, 1, &pcm); + if (ret != 0) { + printk(KERN_ERR "%s: snd_ctl_add failed\n", __func__); + goto err_free_controls; + } + stfm1000->pcm = pcm; + pcm->private_data = stfm1000; /* point back */ + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, + &stfm1000_snd_capture_ops); + pcm->info_flags = 0; + strcpy(pcm->name, "STFM1000 PCM"); + + snd_card_set_dev(card, &stfm1000->radio.dev); + strcpy(card->shortname, "STFM1000"); + + ret = snd_pcm_lib_preallocate_pages_for_all(stfm1000->pcm, + SNDRV_DMA_TYPE_CONTINUOUS, card->dev, SZ_256K, SZ_256K); + if (ret != 0) { + printk(KERN_ERR "%s: snd_pcm_lib_preallocate_pages_for_all " + "failed\n", __func__); + goto err_free_pcm; + } + + ret = request_irq(IRQ_DRI_DMA, stfm1000_dri_dma_irq, 0, "stfm1000", + stfm1000); + if (ret != 0) { + printk(KERN_ERR "%s: request_irq failed\n", __func__); + goto err_free_prealloc; + } + + ret = request_irq(IRQ_DRI_ATTENTION, stfm1000_dri_attn_irq, 0, + "stfm1000", stfm1000); + if (ret != 0) { + printk(KERN_ERR "%s: request_irq failed\n", __func__); + goto err_rel_irq; + } + + ret = snd_card_register(stfm1000->card); + if (ret != 0) { + printk(KERN_ERR "%s: snd_card_register failed\n", __func__); + goto err_rel_irq2; + } + + /* Enable completion interrupt */ + stmp3xxx_dma_clear_interrupt(stfm1000->dma_ch); + stmp3xxx_dma_enable_interrupt(stfm1000->dma_ch); + + printk(KERN_INFO "%s/alsa: %s registered\n", "STFM1000", + card->longname); + + return 0; + +err_rel_irq2: + free_irq(IRQ_DRI_ATTENTION, stfm1000); + +err_rel_irq: + free_irq(IRQ_DRI_DMA, stfm1000); + +err_free_prealloc: + snd_pcm_lib_preallocate_free_for_all(stfm1000->pcm); + +err_free_pcm: + /* XXX TODO */ + +err_free_controls: + /* XXX TODO */ + +/* err_free_card: */ + snd_card_free(stfm1000->card); + +err_free_dma: + for (i = stfm1000->desc_num - 1; i >= 0; i--) { + if (stfm1000->dma[i].command != NULL) + stmp3xxx_dma_free_command(stfm1000->dma_ch, + &stfm1000->dma[i]); + } + +err_rel_dma: + stmp3xxx_dma_release(stfm1000->dma_ch); +err: + return ret; +} + +static void stfm1000_alsa_instance_release(struct stfm1000 *stfm1000) +{ + int i; + + stmp3xxx_dma_clear_interrupt(stfm1000->dma_ch); + stmp3xxx_arch_dma_reset_channel(stfm1000->dma_ch); + + snd_card_free(stfm1000->card); + + for (i = stfm1000->desc_num - 1; i >= 0; i--) + stmp3xxx_dma_free_command(stfm1000->dma_ch, &stfm1000->dma[i]); + + kfree(stfm1000->dma); + + stmp3xxx_dma_release(stfm1000->dma_ch); +} + +static void stfm1000_alsa_dma_irq(struct stfm1000 *stfm1000) +{ + struct snd_pcm_runtime *runtime; + int desc; + s16 *src, *dst; + + if (stfm1000->stopping_recording) + return; + + if (stfm1000->read_count >= stfm1000->blksize * + (stfm1000->blocks - 2)) { + printk(KERN_ERR "irq: overrun %d - Blocks in %d\n", + stfm1000->read_count, stfm1000->blocks); + return; + } + + /* someone has brutally killed user-space */ + if (stfm1000->substream == NULL || + stfm1000->substream->runtime == NULL) + return; + + BUG_ON(stfm1000->substream == NULL); + BUG_ON(stfm1000->substream->runtime == NULL); + + desc = stfm1000->read_offset / stfm1000->blksize; + runtime = stfm1000->substream->runtime; + + if (runtime->dma_area == NULL) + printk(KERN_INFO "runtime->dma_area = NULL\n"); + BUG_ON(runtime->dma_area == NULL); + if (stfm1000->dri_buf == NULL) + printk(KERN_INFO "stfm1000->dri_buf = NULL\n"); + BUG_ON(stfm1000->dri_buf == NULL); + + if (desc >= stfm1000->blocks) { + printk(KERN_INFO "desc=%d ->blocks=%d\n", + desc, stfm1000->blocks); + printk(KERN_INFO "->read_offset=%x ->blksize=%x\n", + stfm1000->read_offset, stfm1000->blksize); + } + BUG_ON(desc >= stfm1000->blocks); + + src = stfm1000->dri_buf + desc * (stfm1000->blksize * 2); + dst = (void *)runtime->dma_area + desc * stfm1000->blksize; + + /* perform filtering */ + stfm1000_decode_block(stfm1000, src, dst, stfm1000->blksize / 4); + + stfm1000->read_count += stfm1000->blksize; + + if (stfm1000->read_count >= + snd_pcm_lib_period_bytes(stfm1000->substream)) + snd_pcm_period_elapsed(stfm1000->substream); +} + +static void stfm1000_alsa_attn_irq(struct stfm1000 *stfm1000) +{ + /* nothing */ +} + +struct stfm1000_alsa_ops stfm1000_default_alsa_ops = { + .init = stfm1000_alsa_instance_init, + .release = stfm1000_alsa_instance_release, + .dma_irq = stfm1000_alsa_dma_irq, + .attn_irq = stfm1000_alsa_attn_irq, +}; + +static int stfm1000_alsa_init(void) +{ + struct stfm1000 *stfm1000 = NULL; + struct list_head *list; + int ret; + + stfm1000_alsa_ops = &stfm1000_default_alsa_ops; + + list_for_each(list, &stfm1000_devlist) { + stfm1000 = list_entry(list, struct stfm1000, devlist); + ret = (*stfm1000_alsa_ops->init)(stfm1000); + if (ret != 0) { + printk(KERN_ERR "stfm1000 ALSA driver for DMA sound " + "failed init.\n"); + return ret; + } + stfm1000->alsa_initialized = 1; + } + + printk(KERN_INFO "stfm1000 ALSA driver for DMA sound loaded\n"); + + return 0; +} + +static void stfm1000_alsa_exit(void) +{ + struct stfm1000 *stfm1000 = NULL; + struct list_head *list; + + list_for_each(list, &stfm1000_devlist) { + stfm1000 = list_entry(list, struct stfm1000, devlist); + + if (!stfm1000->alsa_initialized) + continue; + + stfm1000_take_down(stfm1000); + (*stfm1000_alsa_ops->release)(stfm1000); + stfm1000->alsa_initialized = 0; + } + + printk(KERN_INFO "stfm1000 ALSA driver for DMA sound unloaded\n"); +} + +/* We initialize this late, to make sure the sound system is up and running */ +late_initcall(stfm1000_alsa_init); +module_exit(stfm1000_alsa_exit); + +MODULE_AUTHOR("Pantelis Antoniou"); +MODULE_DESCRIPTION("An ALSA PCM driver for the STFM1000 chip."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-rds.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-rds.c @@ -0,0 +1,1529 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include + +#include "stfm1000.h" + +#include "stfm1000-rds.h" + +#define bitstream_to_rds_state(b) \ + container_of(b, struct stfm1000_rds_state, bitstream) +#define demod_to_rds_state(d) \ + container_of(d, struct stfm1000_rds_state, demod) +#define pkt_to_rds_state(p) \ + container_of(p, struct stfm1000_rds_state, pkt) +#define text_to_rds_state(t) \ + container_of(t, struct stfm1000_rds_state, text) +#define rds_state_to_stfm1000(r) \ + container_of(r, struct stfm1000, rds_state) + +#define TADJSH 8 /*Shifts used in bitslice loop filter */ + +/* Reverse of Matlab's Fquant (see MatchedFilterDecomposition.m), so that */ +/* mixandsum code is easy; Used by rds_bitstream_stfmdemod.arm */ +const s16 u16_rds_basis[2*RDS_BASISLENGTH+8] = { + 14, 24, 34, 43, 50, 56, 60, 62, 62, + 60, 55, 49, 41, 32, 22, 11, 14, 24, + 34, 43, 50, 56, 60, 62, 62, 60, 55, + 49, 41, 32, 22, 11, 14, 24, 34, 43, + 50, 56, 60, 62 +}; + +static int bits_free(struct stfm1000_rds_bitstream *rdsb) +{ + /* Do not show the last one word free. */ + int FreeSpace = rdsb->TailBitCount - rdsb->HeadBitCount - 32; + + if (FreeSpace < 0) + FreeSpace = (RDS_BITBUFSIZE * 32) + FreeSpace; + return FreeSpace; +} + +static void put1bit(struct stfm1000_rds_bitstream *rdsb, int bit) +{ + int index = (rdsb->HeadBitCount >> 5); + u32 CurBit = (rdsb->HeadBitCount & 0x1f); + u32 CurWord = rdsb->buf[index]; + + if (CurBit == 0) + CurWord = 0; + + CurWord = CurWord | (((u32)bit & 1) << CurBit); + rdsb->buf[index] = CurWord; + rdsb->HeadBitCount++; + if (rdsb->HeadBitCount >= RDS_BITBUFSIZE * 32) + rdsb->HeadBitCount = 0; +} + +static int get1bit(struct stfm1000_rds_bitstream *rdsb) +{ + int Bit = 0; + int index = (rdsb->TailBitCount >> 5); + int CurBit = (rdsb->TailBitCount & 0x1f); + u32 CurWord = rdsb->buf[index]; + + Bit = (CurWord >> CurBit) & 1; + rdsb->TailBitCount++; + if (rdsb->TailBitCount == RDS_BITBUFSIZE*32) + rdsb->TailBitCount = 0; + + return Bit; +} + +static int bits_filled(struct stfm1000_rds_bitstream *rdsb) +{ + int FilledSpace = rdsb->HeadBitCount - rdsb->TailBitCount; + + if (FilledSpace < 0) + FilledSpace = (RDS_BITBUFSIZE * 32) + FilledSpace; + return FilledSpace; +} + +static void rds_mix_msg(struct stfm1000_rds_demod *rdsd, u8 MixSetting) +{ + if (rdsd->mix_msg_pending) + rdsd->mix_msg_overrun++; + rdsd->mix_msg = MixSetting; + rdsd->mix_msg_pending = 1; + + /* signal monitor thread */ + stfm1000_monitor_signal( + rds_state_to_stfm1000(demod_to_rds_state(rdsd)), + EVENT_RDS_MIXFILT); +} + +/* call with interrupts disabled please */ +int stfm1000_rds_mix_msg_get(struct stfm1000_rds_state *rds) +{ + struct stfm1000_rds_demod *rdsd = &rds->demod; + + if (!rdsd->mix_msg_pending) + return -1; + + return rdsd->mix_msg; +} + +/* call with interrupts disabled please */ +int stfm1000_rds_mix_msg_processed(struct stfm1000_rds_state *rds, int mix_msg) +{ + struct stfm1000_rds_demod *rdsd = &rds->demod; + + if (!rdsd->mix_msg_pending) + return -1; + + rdsd->mix_msg_pending = 0; + + /* update the completion indication bit */ + if ((mix_msg & 0x8) == 0) + rdsd->MixPopDone = 1; + + /* this is reflected off the hardware register */ + rdsd->rds_mix_offset = mix_msg & 1; + + if (rdsd->mix_msg != mix_msg) { + rdsd->mix_msg_processed_changed++; + return -1; + } + return 0; +} + +static void rds_sdnominal_msg(struct stfm1000_rds_demod *rdsd, int sdnominal) +{ + if (rdsd->sdnominal_msg_pending) + rdsd->sdnominal_msg_overrun++; + rdsd->sdnominal_msg = sdnominal; + rdsd->sdnominal_msg_pending = 1; + + /* signal monitor thread */ + stfm1000_monitor_signal( + rds_state_to_stfm1000(demod_to_rds_state(rdsd)), + EVENT_RDS_SDNOMINAL); +} + +/* call with interrupts disabled please */ +int stfm1000_rds_sdnominal_msg_get(struct stfm1000_rds_state *rds) +{ + struct stfm1000_rds_demod *rdsd = &rds->demod; + + if (!rdsd->sdnominal_msg_pending) + return 0; + + return rdsd->sdnominal_msg; +} + +/* call with interrupts disabled please */ +int stfm1000_rds_sdnominal_msg_processed(struct stfm1000_rds_state *rds, + int sdnominal_msg) +{ + struct stfm1000_rds_demod *rdsd = &rds->demod; + + if (!rdsd->sdnominal_msg_pending) + return -1; + + rdsd->sdnominal_msg_pending = 0; + return 0; +} + +void demod_loop(struct stfm1000_rds_bitstream *rdsb, + struct stfm1000_rds_demod *rdsd) +{ + s32 filter_out; + u32 freeSpace; + s32 decomp_hist_pp; + u8 phase; + + /* Check if we're at a half-basis point */ + if ((rdsd->i & (RDS_BASISLENGTH/2 - 1)) != 0) + return; /* Nope, return */ + + /* Yes, time to do our work */ + /* Rotate the length 3 history buffer */ + decomp_hist_pp = rdsd->decomp_hist_p; + rdsd->decomp_hist_p = rdsd->decomp_hist; + if ((rdsd->i & (RDS_BASISLENGTH-1)) == 0) { + rdsd->decomp_hist = rdsd->mixandsum1>>9; /* Grab output of + * mixandsum1/512 */ + rdsd->mixandsum1 = 0; /* Reset mixandsum #1 */ + } else { + rdsd->decomp_hist = rdsd->mixandsum2>>9; /*Grab output of + * mixandsum2/512 */ + rdsd->mixandsum2 = 0; /* Reset mixandsum #2 */ + } + + /* Form correlator/decimator output by convolving with the + * decomposition coefficients, DecompQuant from Matlab work. */ + filter_out = (-58*rdsd->decomp_hist + 59*decomp_hist_pp)>>7; + + /*Figure out which half-basis we are in (out of a bit-length cycle) */ + phase = rdsd->i*2/RDS_BASISLENGTH; + /*Now what we do depends on the phase variable */ + /*Phase 0: Bitslice and do timing alignment */ + /*others (1-3): Keep value for timing alignment */ + + if (phase == 0) { /*Main processing (bitslice) */ + u32 Ph; + u8 OldBit = rdsd->sliced_data; /* Save the previous value */ + + rdsd->return_num = 1; + if (filter_out >= 0) { /*This bit is "1" */ + /*return value is XOR of previous bit (still in + * sliced_data) w/ this */ + /* bit (1), which equals (NOT of the previous bit) */ + rdsd->return_rdsdemod = !OldBit; + rdsd->sliced_data = 1; /*Newest bit value is 1 */ + } else { /*This bit is "0" */ + /*return value is XOR of previous bit (still in + * sliced_data) w/ this */ + /* bit (0), which equals the previous bit */ + rdsd->return_rdsdemod = OldBit; + rdsd->sliced_data = 0; /*Newest bit value is 0 */ + } + + freeSpace = bits_free(rdsb); + + if (freeSpace > 0) + put1bit(rdsb, rdsd->return_rdsdemod); + else + rdsd->RdsDemodSkippedBitCnt++; + + /*Increment bits received counter */ + rdsd->BitAlignmentCounter++; + /*If mixer phase determination hasn't been done, start it */ + if ((rdsd->MixPhaseState == 0) && (!rdsd->MixPhaseDetInProg)) { + rdsd->MixPhaseDetInProg = 1; + /*Go to first mixer setting (0) */ + rds_mix_msg(rdsd, 0); + } + + /* Do bit-slicing time adaption after the mixer phase + * determination */ + if (!(rdsd->MixPhaseDetInProg) && !(rdsd->Synchronous)) { + + /* Bitslice Timing Adjust Code (runs after + * MixPhaseDetInProg and if RDS is not synchronous to + * the FM pilot. */ + + u8 BigPh2; /* Expecting a large value in + * PhaseValue[2] */ + u32 MaxRMS = 0; /*Largest phase RMS */ + s8 MaxPh = 0; /*Index of largest phase RMS */ + s32 zerocross; + + /* Locate the largest phase RMS + * (should be at phase zero) */ + for (Ph = 0; Ph < 4; Ph++) + if (rdsd->Ph_RMS[Ph] > MaxRMS) { + MaxRMS = rdsd->Ph_RMS[Ph]; + MaxPh = Ph; + } + + /* During each bit time we expect the four phases to + * take one of the following patterns, where 1 + * corresponds to maximum modulation: + * 1, 0, -1, 0 Case I + * -1, 0, 1, 0 Case II + * 1, 1/2, 0, -1/2 Case III + * -1, -1/2, 0, 1/2 Case IV + * We need to distinguish between cases in order to do + * the timing adjustment. Below we compare the + * correlation of the samples with Case I and Case III + * to see which has a bigger abs(correlation). Thus + * BigPh2, if set, means that we decided on Case I or + * Case II; if BigPh2 clear, we decided Case III or IV. + */ + BigPh2 = abs(rdsd->PhaseValue[0]-rdsd->PhaseValue[2]) > + abs(rdsd->PhaseValue[0] + + ((rdsd->PhaseValue[1]- + rdsd->PhaseValue[3])>>1)); + /* If BigPh2, use the difference between phase 1 value + * (downgoing for Case I, upgoing for Case II) and + * phase 3 value (upgoing for Case I, downgoing for + * Case II, thus the subtraction) to indicate timing + * error. If not BigPh2, use the sum of the phase 1 + * value (downgoing for Case III, upgoing for Case IV) + * and phase 3 value (downgoing for Case III, upgoing + * for Case IV, thus the addition) to indicate timing + * error. If BigPh2, the slopes at phase 1 & phase 3 + * are approximately double that if not BigPh2. + * Since we are trying to measure timing, scale + * by 1/2 in the BigPh2 case. */ + if (BigPh2) + zerocross = (rdsd->PhaseValue[1]- + rdsd->PhaseValue[3])>>1; + else + zerocross = rdsd->PhaseValue[1]+ + rdsd->PhaseValue[3]; + /* Now if the prev bit was a "1", then the first zero + * crossing (phase 1 if BigPh2, phase 2 if !BigPh2) + * was a falling one, and if we were late then + * zerocross should be negative. If the prev bit was a + * "0", then the first zero crossing was a rising one, + * and if we were late then zerocross would be + * positive. If we are "late" it means that we need to + * do a shorter cycle of, say, 15 samples instead of + * 16, to "catch up" so that in the future we will be + * sampling earlier. We shorten the cycle by adding + * to i, so "late" is going to mean "increment i". + * Therefore "late" should be positive, which is done + * here by inverting zerocross if the previous bit was + * 1. You could say that this step reflects cases I + * and III into II and IV, respectively. */ + if (OldBit) + zerocross = -zerocross; + if (!rdsd->DisablePushing) { + /*The algorithm so far has a stable operating + * point 17 phases away from the correct one. + * The following code is experimental and may + * be deleterious in low SNR conditions, but is + * an attempt to move off of the incorrect + * operating point. */ + + if (MaxPh != 0) { + /* If it isn't the same MaxPh as the + * last non-zero one, clear the counter + */ + if (MaxPh != rdsd->PushLastMaxPh) { + /*Reset the counter */ + rdsd->PushCounter = 0; + /*Record which phase we're now + * counting */ + rdsd->PushLastMaxPh = MaxPh; + } + /* If the Max RMS is on the same + * non-zero phase, count up */ + rdsd->PushCounter++; + } + /* Once every 128 bits, check and then reset + * PushCounter */ + if (!(rdsd->BitAlignmentCounter & 0x0FF)) { + /*If 90% of the time the max phase has + * been from the same non-zero phase, + * decide that we are latched onto a 0 + * lock point. Do a large push of the + * timing. */ + if (rdsd->PushCounter > 230) { + s32 pshiph; + /*Convert from phase number to + * the number of filter + * output samples that we need + * to shift */ + if (rdsd->PushLastMaxPh >= 2) + pshiph = + 4 - (s8)rdsd-> + PushLastMaxPh; + else + pshiph = + -(s8)rdsd-> + PushLastMaxPh; + /* Scale by the number of i- + * phases per output sample */ + pshiph <<= + RDS_BASISSHIFTS-1; + /* Perform big pop to get near + * correct timing */ + rdsd->i += (RDS_BASISLENGTH<<1) + + pshiph; + /* Set status indicating big + * pop was needed. Reset all + * leaky-bucket and summation + * variables because the big + * timing shift has invalidated + * them. Ph_RMS values don't + * need to be reset because + * they will shift over to + * reasonable values again + * before their erroneous + * values could have effect. */ + rdsd->rds_big_timeshift = 1; + /*rdsd->Ph_RMS[0] = 0; */ + /*rdsd->Ph_RMS[1] = 0; */ + /*rdsd->Ph_RMS[2] = 0; */ + /*rdsd->Ph_RMS[3] = 0; */ + rdsd->mixandsum1 = 0; + rdsd->mixandsum2 = 0; + rdsd->SkipsAccum += + pshiph; + + /* Make adjustments in other + * values because of the push + * (they wouldn't otherwise be + * able to use the information + * that a push was needed in + * their future control + * decisions). */ + if (rdsd->PushLastMaxPh != 2) { + /* If we weren't + * pushing from phase + * two, accumulate (for + * use in adapting + * SDNOMINAL) the + * phases moved by + * pushing. Phase two + * pushes are not used; + * the push direction + * is arbitrary since + * Phase 2 is 180 + * degrees out. Also, + * phase 2 pushes don't + * result from + * reasonable slippage. + * */ + + if (rdsd->sdnom_adapt) + rdsd->SdnomSk + += pshiph; + + /* Modify timing_adj to + * account for half of + * the DC response that + * would have occurred + * in timing_adj if + * that control loop + * had seen the push + * happen. (Why half? + * Because the loop has + * already seen a + * history of zerocross + * values that heads it + * in the same + * direction as this + * adjustment, but may + * have seen as few as + * half of what it + * should have.) */ + rdsd->timing_adj += + pshiph << + (TADJSH+1); + } + /*Set countdown timer that will + * prevent any mixer popping + * until the Ph_RMS variables + * have had enough time to + * stabilize */ + + /* 2.5 time constants */ + rdsd->PushSafetyZone = 5; + } + /*Reset the push counter */ + rdsd->PushCounter = 0; + } /*end once every 128 bits */ + } /*end if !DisablePushing */ + + /* Further possible additions: + * + * 1. Pushes modify timing_adj to decrease convergence + * time. + * 2. Separate timing_adj into pilottracking and non-pt + * cases (avoids convergence time after stereo/mono + * transitions) + * + * Old loop filter was a leaky bucket integrator, and + * it always lagged behind if the FM station had RDS + * asynchronous to the pilot, because the control loop + * needs another integrator to converge on a frequency + * error. + * New loop filter = 1/(1-1/z) * (a-1/z) * k, + * where a = 1+1/256 and k = 1/1024. + * You can narrow the loop bandwidth by making "a" + * twice as close to 1 and halving k, e.g. a = 1+1/512 + * and k = 1/2048. + * (The way implemented, that narrowing loop BW by + * a factor of 2 can be done by incrementing TADJSH.) + * + * TGR 8/31/2007 */ + + /*Integrator, 1/(1-1/z) */ + rdsd->timing_adj += zerocross; + /*Limit to 1 phase every 8 samples */ + if (rdsd->SkipSafetyZone) { + rdsd->SkipSafetyZone--; + rdsd->sampskip = 0; + } else { + /*sampskip of non-zero is allowed, + * calculate what it really is */ + + /*Saturate timing_adj to 2's comp + * (2*TADJSH+4)-bit range. */ + if (rdsd->timing_adj > (1<<(2*TADJSH+3))-1) + rdsd->timing_adj = (1<<(2*TADJSH+3))-1; + if (rdsd->timing_adj < -(1<<(2*TADJSH+3))) + rdsd->timing_adj = -(1<<(2*TADJSH+3)); + + /* Zero, implemented after the integrator + * output. + * (a-1/z) = (1+1/256) - 1/z = (1-1/z) + 1/256. + * But (1 - 1/z) is timing_adj- + * prev_timing_adj = zerocross. */ + rdsd->sampskip = zerocross /* 1 - 1/z */ + /* 1/256 (with rounding) */ + + ((rdsd->timing_adj + + (1<<(TADJSH-1)))>>TADJSH); + /*Round and apply k */ + rdsd->sampskip += (1<<(TADJSH+1)); + rdsd->sampskip >>= (TADJSH+2); + /*Limit to [-1,+1] inclusive */ + if (rdsd->sampskip > 1) + rdsd->sampskip = 1; + if (rdsd->sampskip < -1) + rdsd->sampskip = -1; + /* If non-zero, start the skip safety zone, + * which excludes more sample skipping for a + * while. Note that the safety zone only + * applies to the skips -- pushes can still + * happen inside a SkipSafetyZone. */ + if (rdsd->sampskip) + rdsd->SkipSafetyZone = 8-1; + } + /********************************************** + * End Timing Adjust Code + **********************************************/ + + /********************************************** + * Begin Phase Popper Code + **********************************************/ + /* If Phase Popping is enabled and 1/2 of a + * time constant has gone by... */ + if (rdsd->PhasePoppingEnabled && + !(rdsd->BitAlignmentCounter & + ((1<<(RMSALPHASHIFTS-1))-1))) { + + u8 ForcePop = 0; /* Used to force a pop */ + + /*Record the maximum of the envelope */ + if (MaxRMS > rdsd->PhasePopMaxRMS) + rdsd->PhasePopMaxRMS = MaxRMS; + /* Also track MaxRMS into MixPhase0/1Mag, so + * that we can see what the largest RMS on each + * of those phases is. On synchronous stations + * (meaning the RDS carrier and bit rate are + * synchronized with the pilot), the right mix + * phase will always be big and the wrong phase + * small. On asynchronous stations (and + * stations without RDS), both phases will at + * some time or other have about the + * same amplitude on each of the phases. */ + if (rdsd->rds_mix_offset) { + if (MaxRMS > rdsd->MixPhase1Mag) + rdsd->MixPhase1Mag = MaxRMS; + } else { + if (MaxRMS > rdsd->MixPhase0Mag) + rdsd->MixPhase0Mag = MaxRMS; + } + /* Update PopSafetyZone and PushSafetyZone + * counters. With RMSALPHASHIFTS = 5, each + * tick is 16/1187.5 =~ 13.5 ms. */ + if (rdsd->PopSafetyZone) { + rdsd->PopSafetyZone--; + /* If safety zone just ended and this + * mix phase is giving smaller RMS than + * before the pop, then the pop was a + * mistake. Go back to previous mixer + * phase */ + if (!(rdsd->PopSafetyZone) + && (rdsd->PhasePopMaxRMS < + rdsd->PrePopRMS)) + ForcePop = 1; + } + /* If there is no recent push, and Phase 0 has + * the maximum RMS, and at least 1/7th of a + * second has passed since the last phase pop, + * and ((the RMS is less than 1/2 of + * PhasePopMaxRMS) or (the RMS is less than + * 100)), then try a phase pop. */ + if (/* (rdsd->Ph_RMS[0] == MaxRMS) && + * Phase 0 has maximum RMS */ + !(rdsd->PopSafetyZone)) { + /* and Long enough since last + * phase pop */ + + /* Eligible for a pop, see if one of + * the pop conditions is met */ + if ((MaxRMS<<1) < + rdsd->PhasePopMaxRMS) { + /*RMS decline from its peak */ + ForcePop = 1; + } else if ((MaxRMS>>RMSALPHASHIFTS) + < 50) { + /*RMS too small to receive, + * either there's no RDS or + * this is the wrong phase */ + ForcePop = 1; + } + } + if (ForcePop) { + + /*Pop to opposite setting */ + rds_mix_msg(rdsd, 0x8 | + !rdsd->rds_mix_offset); + + /*Save the pre-pop RMS so that later we + * can see if the pop was actually + * effective */ + rdsd->PrePopRMS = MaxRMS; + /*Reset the PhasePopMaxRMS. We rely on + * the PopSafetyZone to give time to + * get a new valid max RMS before we're + * eligible for the next phase pop. If + * there were no reset we'd be forever + * incrementing PhasePopMaxRMS due + * to just happenstance large-noise + * samples and it might eventually get + * some freakish large value causing + * frequent erroneous pops. */ + rdsd->PhasePopMaxRMS = 0; + /* Pop Safety zone length is decided by + * how much of an asynchronous + * frequency can be supported. Allowing + * 50 ppm of transmitter error (error + * between their own pilot, that we + * should be locked to, and their RDS + * carrier (which by RDS spec should be + * locked to their pilot, but we've + * recently found frequently isn't). + * 50ppm * 57kHz = 2.85Hz. + * (2.85 cycles/sec)(4 pops/cycle) + * = 11.4 pops/second. + * Safety zone = (1/11.4) seconds =~ 104 + * bits, round down to 96 bits which + * yields 6 ticks if RMSALPHASHIFTS = 5. + * */ + rdsd->PopSafetyZone = 96>> + (RMSALPHASHIFTS-1); + } + } + /****************************************************** + * End Phase Popper Code + ******************************************************/ + + /* SDNOMINAL adaption */ + if (rdsd->sdnom_adapt) { + rdsd->SdnomSk += rdsd->sampskip; + if (rdsd->pCoefForcedMono && + (rdsd->BitAlignmentCounter & 0xFFF) == + 0x800) { + + rds_sdnominal_msg(rdsd, + -(rdsd->SdnomSk<<9)); + + /*Reset skips counter */ + rdsd->SdnomSk = 0; + } + } + + rdsd->SkipsAccum += rdsd->sampskip; + /* Once per 3.45 seconds, print out signal strength, + * skips and pops. Then reset the variables totalling + * those occurrences */ + if (!(rdsd->BitAlignmentCounter & 0xFFF)) { + /* During very noisy input (or if no RDS, or no + * station present), timing_adj can go crazy, + * since it is the integral of noise. Although + * it is a saturated value (earlier, in the + * timing adjust code), the level at which we + * can saturate still leaves room for + * timing_adj to get too big. A large value of + * timing_adj is a persistent pathology because + * the phase is shifting so quickly that the + * push detector (which relies on stable + * phase-RMS values) never triggers, thus there + * is no implemented rescue besides this + * clearing that restores proper function. */ + if (abs(rdsd->SkipsAccum) > 300) + rdsd->timing_adj = 0; + /*Reset the accumulations. */ + rdsd->SkipsAccum = 0; + } + } /*End of bit timing adaption */ + + /* If mixer phase determination in progress, + * perform actions at certain times */ + if (rdsd->MixPhaseDetInProg) { + /*~10ms settling time after mixer phase change */ + #define MIXPHASE_STARTMEAS 12 + /*~20ms measurement window */ + #define MIXPHASE_ENDMEAS (MIXPHASE_STARTMEAS+24) + if (rdsd->BitAlignmentCounter == MIXPHASE_STARTMEAS) { + /*Reset the RMS variables */ + rdsd->Ph_RMS[0] = 0; + rdsd->Ph_RMS[1] = 0; + rdsd->Ph_RMS[2] = 0; + rdsd->Ph_RMS[3] = 0; + /* Don't reset mixandsum values because at + * least they have filtered continuously. All + * we really need for the mixer phase decision + * is a constant measurement window. */ + } else if (rdsd->BitAlignmentCounter == + MIXPHASE_ENDMEAS) { + /*Measurement = mean of RMS values */ + u32 Ndx, MeasVal = 0; + for (Ndx = 0; Ndx < 4; + MeasVal += rdsd->Ph_RMS[Ndx++]>>2); + /*Store measurement in correct place */ + if (rdsd->MixPhaseState == 1) { + rdsd->MixPhase0Mag = MeasVal; + /*Go to next mixer setting */ + rds_mix_msg(rdsd, 1); + } else if (rdsd->MixPhaseState == 2) { + u8 NextMixSetting; + rdsd->MixPhase1Mag = MeasVal; + /* Both measurements done now, see what + * mixer setting we need to use. + * 0 if MixPhase0Mag > MixPhase1Mag, + * 1 otherwise. */ + NextMixSetting = (rdsd->MixPhase0Mag + <= rdsd->MixPhase1Mag); + /* If the mixer setting needed is 1, + * that is already the current setting. + * Terminate mixer phase determination. + * Otherwise send message to switch the + * mixer phase setting. */ + if (NextMixSetting) { + rdsd->MixPhaseState = 3; + rdsd->MixPhaseDetInProg = 0; + } else + rds_mix_msg(rdsd, 0); + } + } + /* Reset BitAlignmentCounter if the Mixer just popped + * Change state, if required. States are: + * 0: Initial state, send msg causing RDS_MIXOFFSET=>0 + * 1: Measure with RDS_MIXOFFSET = 0. + * Lasts just over 30 ms. + * 2: Measure with RDS_MIXOFFSET = 1. + * Lasts just over 30 ms. + * 3: At final RDS_MIXOFFSET value. + * Lasts as long as RDS continues. */ + if (rdsd->MixPopDone) { + rdsd->MixPopDone = 0; + rdsd->BitAlignmentCounter = 0; + rdsd->MixPhaseState++; /*Go to next state */ + /* If we got to state 3, turn off mixer phase + * determination code */ + if (rdsd->MixPhaseState == 3) + rdsd->MixPhaseDetInProg = 0; + } + } + + /* Update status variables */ + rdsd->RDS_BIT_AMP_STAT_REG9 = rdsd->Ph_RMS[0]>>RMSALPHASHIFTS; + /*Saturate */ + if (rdsd->RDS_BIT_AMP_STAT_REG9 > 511) + rdsd->RDS_BIT_AMP_STAT_REG9 = 511; + } /*End phase 0 code */ + + /*************************************************** + * Actions common to all phases + ***************************************************/ + + /* Save the output of each phase for possible + * calculations during phase 0 */ + rdsd->PhaseValue[phase] = filter_out; + + /*So that we can measure signal amplitude and/or determine what (if */ + /* any) big jump is needed, maintain the RMS of each phase. Phase */ + /* 0 RMS is already in Ph_RMS[0] (see bitslicing code, earlier). */ + rdsd->Ph_RMS[phase] += abs(filter_out) - + (rdsd->Ph_RMS[phase]>>RMSALPHASHIFTS); +} + +#if defined(CONFIG_ARM) + +/* assembly version for ARM */ +#define RDS_MAC(_acc, _x, _y) \ + __asm__ __volatile__ ( \ + "smlabb %0, %1, %2, %0\n" \ + : "=&r" (_acc) \ + : "r" (_x), "r" (_y) \ + : "cc") + +#else + +/* all others, use standard C */ +#define RDS_MAC(_acc, _x, _y) \ + do { \ + (_acc) += (s16)(_x) * (s16)(_y); \ + } while (0) + +#endif + +static void rds_demod(const u16 *data, struct stfm1000_rds_demod *rdsd, + struct stfm1000_rds_bitstream *rbit, int total) +{ + register const s16 *basis0; + register const s16 *basis1; + register s16 val; + register int i; + register int sampskip; + register s32 acc1; + register s32 acc2; + + /* point to the table */ + basis0 = u16_rds_basis; + basis1 = basis0 + 8; + + rdsd->return_num = 0; + + /* restore state */ + i = rdsd->i; + acc1 = rdsd->mixandsum1; + acc2 = rdsd->mixandsum2; /* 64 bit */ + sampskip = rdsd->sampskip; + + while (total-- > 0) { + + val = data[3]; /* load RDS data */ + data += 4; + if (val == 0x7fff) /* illegal RDS sample */ + continue; + + RDS_MAC(acc1, val, basis0[i]); + RDS_MAC(acc2, val, basis1[i]); + + if (i == 4) { + i += sampskip; + sampskip = 0; + } + + if ((i & (RDS_BASISLENGTH / 2 - 1)) == 0) { + + /* save state */ + rdsd->mixandsum1 = acc1; + rdsd->mixandsum2 = acc2; + rdsd->i = i; + rdsd->sampskip = sampskip; + + demod_loop(rbit, rdsd); + + /* restore state */ + acc1 = rdsd->mixandsum1; + acc2 = rdsd->mixandsum2; + i = rdsd->i; + sampskip = rdsd->sampskip; + } + i = (i + 1) & 31; + } + + /* save state */ + rdsd->mixandsum1 = acc1; + rdsd->mixandsum2 = acc2; + rdsd->i = i; + rdsd->sampskip = sampskip; +} + +void stfm1000_rds_demod(struct stfm1000_rds_state *rds, const u16 *dri_data, + int total) +{ + rds_demod(dri_data, &rds->demod, &rds->bitstream, total); + + /* signal only when we have enough */ + if (bits_filled(&rds->bitstream) > 128) + stfm1000_monitor_signal(rds_state_to_stfm1000(rds), + EVENT_RDS_BITS); +} + +static void bitstream_reset(struct stfm1000_rds_bitstream *rdsb) +{ + memset(rdsb, 0, sizeof(*rdsb)); +} + +static void demod_reset(struct stfm1000_rds_demod *rdsd) +{ + memset(rdsd, 0, sizeof(*rdsd)); + rdsd->sdnom_adapt = 0; /* XXX this doesn't really work right */ + /* it causes underruns at ALSA */ + rdsd->PhasePoppingEnabled = 1; /* does this? */ +} + +static void packet_reset(struct stfm1000_rds_pkt *rdsp) +{ + memset(rdsp, 0, sizeof(*rdsp)); + rdsp->state = SYNC_OFFSET_A; +} + +static void text_reset(struct stfm1000_rds_text *rdst) +{ + memset(rdst, 0, sizeof(*rdst)); +} + +void stfm1000_rds_reset(struct stfm1000_rds_state *rds) +{ + bitstream_reset(&rds->bitstream); + demod_reset(&rds->demod); + packet_reset(&rds->pkt); + text_reset(&rds->text); + rds->reset_req = 0; +} + +int stfm1000_rds_bits_available(struct stfm1000_rds_state *rds) +{ + return bits_filled(&rds->bitstream); +} + +int stmf1000_rds_get_bit(struct stfm1000_rds_state *rds) +{ + if (bits_filled(&rds->bitstream) == 0) + return -1; + return get1bit(&rds->bitstream); +} + +int stmf1000_rds_avail_bits(struct stfm1000_rds_state *rds) +{ + return bits_filled(&rds->bitstream); +} + +static const u32 rds_ParityCheck[] = { + 0x31B, 0x38F, 0x2A7, 0x0F7, 0x1EE, + 0x3DC, 0x201, 0x1BB, 0x376, 0x355, + 0x313, 0x39F, 0x287, 0x0B7, 0x16E, + 0x2DC, 0x001, 0x002, 0x004, 0x008, + 0x010, 0x020, 0x040, 0x080, 0x100, + 0x200 +}; + +static int calc_syndrome(u32 rdscrc) +{ + int i; + u32 syndrome = 0; + int word = 0x1; + + for (i = 0; i < 26; i++) { + if (rdscrc & word) + syndrome ^= rds_ParityCheck[i]; + word <<= 1; + } + return syndrome; +} + +static u32 ecc_table[1024]; +static int ecc_table_generated; + +static void generate_ecc_table(void) +{ + int i, j, size; + u32 syndrome, word; + + for (i = 0; i < ECC_TBL_SIZE; i++) + ecc_table[i] = 0xFFFFFFFF; + ecc_table[0] = 0x0; + + for (j = 0; j < 5; j++) { + word = (1 << (j + 1)) - 1; /* 0x01 0x03 0x07 0x0f 0x1f */ + size = 26 - j; /* 26, 25, 24, 23, 22 */ + syndrome = 0; + for (i = 0; i < size; i++) { + syndrome = calc_syndrome(word); + ecc_table[syndrome] = word; + word <<= 1; + } + } +} + +static u32 ecc_correct(u32 rdsBits, int *recovered) +{ + u32 syndrome; + u32 errorBits; + + if (recovered) + *recovered = 0; + + /* Calculate Syndrome on Received Packet */ + syndrome = calc_syndrome(rdsBits); + + if (syndrome == 0) + return rdsBits; /* block is clean */ + + /* generate table first time we get here */ + if (!ecc_table_generated) { + generate_ecc_table(); + ecc_table_generated = 1; + } + + /* Attempt to recover block */ + errorBits = ecc_table[syndrome]; + if (errorBits == UNRECOVERABLE_RDS_BLOCK) + return UNRECOVERABLE_RDS_BLOCK; /* Block can not be recovered. + * it is bad packet */ + + rdsBits = rdsBits ^ errorBits; + if (recovered) + (*recovered)++; + return rdsBits; /* ECC correct */ +} + +/* The following table lists the RDS and RBDS Program Type codes + * and their meanings: + * PTY code RDS Program type RBDS Program type */ +static const struct stfm1000_rds_pty stc_tss_pty_tab[] = { + { 0, "No program type", "No program type"}, + { 1, "News", "News"}, + { 2, "Current affairs", "Information"}, + { 3, "Information", "Sports"}, + { 4, "Sports", "Talk"}, + { 5, "Education", "Rock"}, + { 6, "Drama", "Classic Rock"}, + { 7, "Culture", "Adult Hits"}, + { 8, "Science", "Soft Rock"}, + { 9, "Varied", "Top 40"}, + { 10, "Pop", "Music Country"}, + { 11, "Rock", "Music Oldies"}, + { 12, "M.O.R.", "Music Soft"}, + { 13, "Light classical", "Nostalgia"}, + { 14, "Serious", "Classical Jazz"}, + { 15, "Other Music", "Classical"}, + { 16, "Weather", "Rhythm and Blues"}, + { 17, "Finance", "Soft Rhythm and Blues"}, + { 18, "Children's programs", "Language"}, + { 19, "Social Affairs", "Religious Music"}, + { 20, "Religion", "Religious Talk"}, + { 21, "Phone In", "Personality"}, + { 22, "Travel", "Public"}, + { 23, "Leisure", "College"}, + { 24, "Jazz Music", "Unassigned"}, + { 25, "Country Music", "Unassigned"}, + { 26, "National Music", "Unassigned"}, + { 27, "Oldies Music", "Unassigned"}, + { 28, "Folk Music", "Unassigned"}, + { 29, "Documentary", "Weather"}, + { 30, "Alarm Test", "Emergency Test"}, + { 31, "Alarm", "Emergency"}, +}; + +#if 0 +static const char *rds_group_txt[] = { + [RDS_GROUP_TYPE_0A] = "Basic tuning and switching information (0A)", + [RDS_GROUP_TYPE_0B] = "Basic tuning and switching information (0B)", + [RDS_GROUP_TYPE_1A] = "Program item number and slow labeling codes", + [RDS_GROUP_TYPE_1B] = "Program item number", + [RDS_GROUP_TYPE_2A] = "Radio Text (2A)", + [RDS_GROUP_TYPE_2B] = "Radio Text (2B)", + [RDS_GROUP_TYPE_3A] = "Application identification for ODA only", + [RDS_GROUP_TYPE_3B] = "Open data applications", + [RDS_GROUP_TYPE_4A] = "Clock-time and date", + [RDS_GROUP_TYPE_4B] = "Open data applications", + [RDS_GROUP_TYPE_5A] = "Transparent Data Channels (32 ch.) or ODA (5A)", + [RDS_GROUP_TYPE_5B] = "Transparent Data Channels (32 ch.) or ODA (5B)", + [RDS_GROUP_TYPE_6A] = "In House Applications or ODA (6A)", + [RDS_GROUP_TYPE_6B] = "In House Applications or ODA (6B)", + [RDS_GROUP_TYPE_7A] = "Radio Paging or ODA", + [RDS_GROUP_TYPE_7B] = "Open Data Applications", + [RDS_GROUP_TYPE_8A] = "Traffic Message Channel or ODA", + [RDS_GROUP_TYPE_8B] = "Open Data Applications", + [RDS_GROUP_TYPE_9A] = "Emergency warning system or ODA", + [RDS_GROUP_TYPE_9B] = "Open Data Applications", + [RDS_GROUP_TYPE_10A] = "Program Type Name", + [RDS_GROUP_TYPE_10B] = "Open Data Applications (10B)", + [RDS_GROUP_TYPE_11A] = "Open Data Applications (11A)", + [RDS_GROUP_TYPE_11B] = "Open Data Applications (11B)", + [RDS_GROUP_TYPE_12A] = "Open Data Applications (12A)", + [RDS_GROUP_TYPE_12B] = "Open Data Applications (12B)", + [RDS_GROUP_TYPE_13A] = "Enhanced Radio Paging or ODA", + [RDS_GROUP_TYPE_13B] = "Open Data Applications", + [RDS_GROUP_TYPE_14A] = "Enhanced Other Networks information (14A)", + [RDS_GROUP_TYPE_14B] = "Enhanced Other Networks information (14B)", + [RDS_GROUP_TYPE_15A] = "Defined in RBDS", + [RDS_GROUP_TYPE_15B] = "Fast switching information", +}; +#endif + +static void dump_rds_packet(u8 *buf) +{ + u16 pi, offb; + + pi = (u16)(buf[0] << 8) | buf[1]; + offb = (u16)(buf[1] << 8) | buf[2]; + + printk(KERN_INFO "GRP: " + "PI=0x%04x " + "GT=%2d VER=%d TP=%d PTY=%2d " + "PS_SEG=%2d RT_AB=%2d RT_SEG=%2d\n", pi, + RDS_GROUP_TYPE(offb), RDS_VERSION(offb), RDS_TP(offb), + RDS_PTY(offb), + RDS_PS_SEG(offb), RDS_RT_AB(offb), RDS_RT_SEG(offb)); +} + +void stfm1000_rds_process_packet(struct stfm1000_rds_state *rds, u8 *buffer) +{ + struct stfm1000_rds_text *rdst = &rds->text; + /* char tempCallLetters[5] = {0}; */ + struct rds_group_data grp; + int grpno; + u32 offset; + char tps[9]; + int i, seg, idx; + + grp.piCode = ((u16)buffer[0] << 8) | buffer[1]; + grp.offsetB = ((u16)buffer[2] << 8) | buffer[3]; + grp.offsetC = ((u16)buffer[4] << 8) | buffer[5]; + grp.offsetD = ((u16)buffer[6] << 8) | buffer[7]; + + grpno = (grp.offsetB >> (8 + 3)) & 0x1f; + + if (rds_state_to_stfm1000(rds)->rds_info) + dump_rds_packet(buffer); + + /* Is this the first time through? */ + if (!rdst->bRds_detected) { + rdst->pi = grp.piCode; + rdst->tp = RDS_TP(grp.offsetB); + rdst->version = RDS_VERSION(grp.offsetB); + rdst->pty.id = RDS_PTY(grp.offsetB); + rdst->pty.pRds = stc_tss_pty_tab[rdst->pty.id].pRds; + rdst->pty.pRdbs = stc_tss_pty_tab[rdst->pty.id].pRdbs; + rdst->bRds_detected = 1; + } + + /* Have we process too many PI errors? */ + if (grp.piCode != rdst->pi) { + if (rdst->mismatch++ > 10) { + + /* requested reset of RDS */ + rds->reset_req = 1; + + /* signal monitor thread */ + stfm1000_monitor_signal(rds_state_to_stfm1000(rds), + EVENT_RDS_RESET); + + if (rds_state_to_stfm1000(rds)->rds_info) + printk(KERN_INFO "RDS: RESET!!!\n"); + + text_reset(rdst); + } + rdst->consecutiveGood = 0; + return; + } + + if (rdst->consecutiveGood++ > 10) + rdst->mismatch = 0; /* reset bad count */ + + if (rdst->consecutiveGood > rdst->consecutiveGoodMax) + rdst->consecutiveGoodMax = rdst->consecutiveGood; + + switch (grpno) { + case RDS_GROUP_TYPE_0A: + case RDS_GROUP_TYPE_0B: + /* Extract Service Name information */ + offset = RDS_PS_SEG(grp.offsetB) * 2; + rdst->wk_ps[offset] = buffer[6]; /* better */ + rdst->wk_ps[offset + 1] = buffer[7]; + rdst->wk_ps_mask |= 1 << RDS_PS_SEG(grp.offsetB); + + if (rds_state_to_stfm1000(rds)->rds_info) { + for (i = 0; i < 8; i++) { + if (rdst->wk_ps_mask & (1 << i)) { + tps[i * 2] = + rdst->wk_ps[i * 2]; + tps[i * 2 + 1] = + rdst->wk_ps[i * 2 + 1]; + } else { + tps[i * 2] = '_'; + tps[i * 2 + 1] = '_'; + } + } + tps[ARRAY_SIZE(tps) - 1] = '\0'; + if (rds_state_to_stfm1000(rds)->rds_info) + printk(KERN_INFO "RDS-PS (curr): %s\n", tps); + } + + if (rdst->wk_ps_mask != ALL_SEGMENT_BITS) + break; + + if (rdst->ps_valid) { + if (memcmp(rdst->ps, rdst->wk_ps, 8) != 0) { + memset(rdst->cp_ps, 0, 8); + memset(rdst->wk_ps, 0, 8); + rdst->wk_ps_mask = 0; + } + + memset(rdst->ps, 0, 8); + rdst->ps_valid = 0; + break; + } + + /* does working buffer == compare buffer */ + if (memcmp(rdst->cp_ps, rdst->wk_ps, 8) != 0) { + /* just copy from working to compare buffer */ + memcpy(rdst->cp_ps, rdst->wk_ps, 8); + rdst->wk_ps_mask = 0; + break; + } + + /* working buffer matches compare buffer, send to UI */ + memcpy(rdst->ps, rdst->cp_ps, 8); + rdst->ps_valid = 1; + + if (rds_state_to_stfm1000(rds)->rds_info) + printk(KERN_INFO "RDS: PS '%s'\n", rdst->ps); + + /* clear working mask-only */ + rdst->wk_ps_mask = 0; + break; + + case RDS_GROUP_TYPE_2A: + + /* Clear buffer */ + if (rdst->textAB_flag != RDS_RT_AB(grp.offsetB)) { + memset(rdst->wk_text, 0, 64); + rdst->wk_text_mask = 0; + rdst->textAB_flag = RDS_RT_AB(grp.offsetB); + } + + /* Extract Text */ + seg = RDS_RT_SEG(grp.offsetB); + idx = seg * 4; + + #define CNVT_EOT(x) ((x) != RDS_EOT ? (x) : 0) + rdst->wk_text[idx++] = CNVT_EOT(buffer[4]); + rdst->wk_text[idx++] = CNVT_EOT(buffer[5]); + rdst->wk_text[idx++] = CNVT_EOT(buffer[6]); + rdst->wk_text[idx++] = CNVT_EOT(buffer[7]); + + rdst->wk_text_mask |= 1 << seg; + /* scan msg data for EOT. If found set all higher + * mask bits */ + for (idx = 0; idx < 4; idx++) { + if (rdst->text[idx] == RDS_EOT) + break; + } + if (idx < 4) { + /* set current and all higher bits */ + for (idx = RDS_RT_SEG(grp.offsetB); idx < 16; + idx++) + rdst->wk_text_mask |= 1 << idx; + } + + /* Process buffer when filled */ + if (rdst->wk_text_mask != ALL_TEXT_BITS) + break; + + if (!rdst->text_valid) + rdst->text_valid = 1; + else if (memcmp(rdst->text, rdst->wk_text, 64) == 0) + break; + + memcpy(rdst->text, rdst->wk_text, 64); + + if (rds_state_to_stfm1000(rds)->rds_info) + printk(KERN_INFO "RDS: TEXT '%s'\n", rdst->text); + + memset(rdst->wk_text, 0, 64); + rdst->wk_text_mask = 0; + break; + + default: + break; + } +} + +int stfm1000_rds_packet_dequeue(struct stfm1000_rds_state *rds, u8 *buf) +{ + struct stfm1000_rds_pkt *pkt = &rds->pkt; + + if (pkt->buf_cnt == 0) + return -1; + + memcpy(buf, &pkt->buf_queue[pkt->buf_tail][0], 8); + if (++pkt->buf_tail >= RDS_PKT_QUEUE) + pkt->buf_tail = 0; + pkt->buf_cnt--; + + return 0; +} + +void stfm1000_rds_packet_bit(struct stfm1000_rds_state *rds, int bit) +{ + struct stfm1000_rds_pkt *pkt = &rds->pkt; + u32 rdsdata, rdscrc, rdscrc_c, rdscrc_cp; + int correct, correct2, recovered, recovered2; + int RetVal; + + /* Stick into shift register */ + pkt->rdsstream = ((pkt->rdsstream << 1) | bit) & 0x03ffffff; + pkt->bitsinfifo++; + pkt->bitcount++; + + /* wait for 26 bits of block */ + if (pkt->bitsinfifo < 26) + return; + + rdsdata = pkt->rdsstream & 0x03fffc00; /* 16 bits of Info. word */ + rdscrc = pkt->rdsstream & 0x3ff; /* 10 bits of Checkword */ + + switch (pkt->state) { + case SYNC_OFFSET_A: + + RetVal = calc_syndrome(pkt->rdsstream); + + switch (RetVal) { + case RDS_SYNDROME_OFFSETA: + pkt->state = OFFSET_B; + break; + case RDS_SYNDROME_OFFSETB: + pkt->state = OFFSET_C_CP; + break; + case RDS_SYNDROME_OFFSETC: + pkt->state = OFFSET_D; + break; + case RDS_SYNDROME_OFFSETCP: + pkt->state = OFFSET_D; + break; + case RDS_SYNDROME_OFFSETD: + pkt->state = OFFSET_A; + break; + default: + pkt->state = SYNC_OFFSET_A; + break; + } + if (pkt->state == SYNC_OFFSET_A) { + pkt->sync_lost_packets++; + /* XXX send info? */ + break; + } + + pkt->good_packets++; + + rdsdata = pkt->rdsstream & 0x03fffc00; + + /* Save type A packet in buffer */ + rdsdata >>= 10; + pkt->buffer[0] = (rdsdata >> 8); + pkt->buffer[1] = (rdsdata & 0xff); + pkt->bitsinfifo = 0; + + /* We found a block with zero errors, but it is not at the + * start of the group. */ + if (pkt->state == OFFSET_B) + pkt->discardpacket = 0; + else + pkt->discardpacket = 1; + break; + + case OFFSET_A: /* Type A: we are in sync now */ + rdscrc ^= RDS_OFFSETA; + correct = ecc_correct(rdsdata | rdscrc, &recovered); + if (correct == UNRECOVERABLE_RDS_BLOCK) { + pkt->bad_packets++; + pkt->discardpacket++; + pkt->state++; + pkt->bitsinfifo = 0; + break; + } + + if (recovered) + pkt->recovered_packets++; + pkt->good_packets++; + + /* Attempt to see, if we can get the entire group. + * Don't discard. */ + pkt->discardpacket = 0; + rdsdata = correct & 0x03fffc00; + + /* Save type A packet in buffer */ + rdsdata >>= 10; + pkt->buffer[0] = (rdsdata >> 8); + pkt->buffer[1] = (rdsdata & 0xff); + pkt->bitsinfifo = 0; + pkt->state++; + break; + + case OFFSET_B: /* Waiting for type B */ + rdscrc ^= RDS_OFFSETB; + correct = ecc_correct(rdsdata | rdscrc, &recovered); + if (correct == UNRECOVERABLE_RDS_BLOCK) { + pkt->bad_packets++; + pkt->discardpacket++; + pkt->state++; + pkt->bitsinfifo = 0; + break; + } + if (recovered) + pkt->recovered_packets++; + pkt->good_packets++; + + rdsdata = correct & 0x03fffc00; + + /* Save type B packet in buffer */ + rdsdata >>= 10; + pkt->buffer[2] = (rdsdata >> 8); + pkt->buffer[3] = (rdsdata & 0xff); + pkt->bitsinfifo = 0; + pkt->state++; + break; + + case OFFSET_C_CP: /* Waiting for type C or C' */ + rdscrc_c = rdscrc ^ RDS_OFFSETC; + rdscrc_cp = rdscrc ^ RDS_OFFSETCP; + correct = ecc_correct(rdsdata | rdscrc_c, &recovered); + correct2 = ecc_correct(rdsdata | rdscrc_cp, &recovered2); + if (correct == UNRECOVERABLE_RDS_BLOCK + && correct2 == UNRECOVERABLE_RDS_BLOCK) { + pkt->bad_packets++; + pkt->discardpacket++; + pkt->state++; + pkt->bitsinfifo = 0; + break; + } + + if (recovered || recovered2) + pkt->recovered_packets++; + pkt->good_packets++; + + if (correct == UNRECOVERABLE_RDS_BLOCK) + correct = correct2; + + rdsdata = correct & 0x03fffc00; + + /* Save type C packet in buffer */ + rdsdata >>= 10; + pkt->buffer[4] = (rdsdata >> 8); + pkt->buffer[5] = (rdsdata & 0xff); + pkt->bitsinfifo = 0; + pkt->state++; + break; + + case OFFSET_D: /* Waiting for type D */ + rdscrc ^= RDS_OFFSETD; + correct = ecc_correct(rdsdata | rdscrc, &recovered); + if (correct == UNRECOVERABLE_RDS_BLOCK) { + pkt->bad_packets++; + pkt->discardpacket++; + pkt->state = OFFSET_A; + pkt->bitsinfifo = 0; + break; + } + + if (recovered) + pkt->recovered_packets++; + pkt->good_packets++; + + rdsdata = correct & 0x03fffc00; + + /* Save type D packet in buffer */ + rdsdata >>= 10; + pkt->buffer[6] = (rdsdata >> 8); + pkt->buffer[7] = (rdsdata & 0xff); + + /* buffer it if all segments were ok */ + if (pkt->discardpacket) { + /* We're still in sync, so back to state 1 */ + pkt->state = OFFSET_A; + pkt->bitsinfifo = 0; + pkt->discardpacket = 0; + break; + } + + pkt->state++; + /* fall-through */ + + case PACKET_OUT: + pkt->GroupDropOnce = 1; + + /* queue packet */ + if (pkt->buf_cnt < RDS_PKT_QUEUE) { + memcpy(&pkt->buf_queue[pkt->buf_head][0], + pkt->buffer, 8); + if (++pkt->buf_head >= RDS_PKT_QUEUE) + pkt->buf_head = 0; + pkt->buf_cnt++; + } else + pkt->buf_overruns++; + + /* We're still in sync, so back to state 1 */ + pkt->state = OFFSET_A; + pkt->bitsinfifo = 0; + pkt->discardpacket = 0; + break; + + } + + /* Lots of errors? If so, go back to resync mode */ + if (pkt->discardpacket >= 10) { + pkt->state = SYNC_OFFSET_A; /* reset sync state */ + pkt->bitsinfifo = 26; /* resync a bit faster */ + } +} + +/* GROUP_TYPE 0A-0B (buffer must have enough space for 9 bytes) */ +int stfm1000_rds_get_ps(struct stfm1000_rds_state *rds, u8 *buffer, + int bufsize) +{ + struct stfm1000_rds_text *rdst = &rds->text; + + if (bufsize < 9) + return -1; + + if (!rdst->ps_valid) + return -1; + + memcpy(buffer, rdst->ps, 8); + buffer[8] = '\0'; + + return 8; +} + +/* GROUP_TYPE 2A (buffer must have enough space for 65 bytes) */ +int stfm1000_rds_get_text(struct stfm1000_rds_state *rds, u8 *buffer, + int bufsize) +{ + struct stfm1000_rds_text *rdst = &rds->text; + + if (bufsize < 9) + return -1; + + if (!rdst->text_valid) + return -1; + + memcpy(buffer, rdst->text, 64); + buffer[64] = '\0'; + + return 64; +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000.h +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000.h @@ -0,0 +1,254 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef STFM1000_H +#define STFM1000_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stfm1000-regs.h" + +#include "stfm1000-filter.h" +#include "stfm1000-rds.h" + +struct stfm1000 { + struct list_head devlist; + int idx; + + struct i2c_client *client; + struct video_device radio; + + /* alsa */ + struct snd_card *card; + struct snd_pcm *pcm; + struct snd_pcm_substream *substream; + struct stmp3xxx_dma_descriptor *dma; + int desc_num; + int dma_ch; + int dma_irq; + int attn_irq; + + struct mutex state_lock; + int read_count; + int read_offset; + int blocks; + int blksize; + int bufsize; + + struct mutex deffered_work_lock; + struct execute_work snd_capture_start_work; + struct execute_work snd_capture_stop_work; + + int now_recording; + int alsa_initialized; + int stopping_recording; + + /* actual DRI buffer */ + dma_addr_t dri_phys; + void *dri_buf; + int dri_bufsz; + + /* various */ + u16 curvol; + int users; + int removed; + struct mutex xfer_lock; + u8 revid; + + unsigned int dbgflg; + + /* shadow registers */ + u32 shadow_regs[STFM1000_NUM_REGS]; + u32 reg_rw_set[(STFM1000_NUM_REGS + 31) / 32]; + u32 reg_ra_set[(STFM1000_NUM_REGS + 31) / 32]; + u32 reg_dirty_set[(STFM1000_NUM_REGS + 31) / 32]; + + /* tuning parameters (not everything is used for now) */ + u16 tune_rssi_th; /* sd_ctl_TuneRssiTh_u16 */ + u16 tune_mpx_dc_th; /* sd_ctl_TuneMpxDcTh_u16 */ + u16 adj_chan_th; /* sd_ctl_AdjChanTh_u16 */ + u16 pilot_est_th; /* sd_ctl_PilotEstTh_u16 */ + u16 coef_lna_turn_off_th; /* sd_ctl_pCoefLnaTurnOffTh_u16 */ + u16 coef_lna_turn_on_th; /* sd_ctl_pCoefLnaTurnOnTh_u16 */ + u16 reg_agc_ref_lna_off; /* sd_ctl_pRegAgcRefLnaOff_u16 */ + u16 reg_agc_ref_lna_on; /* sd_ctl_pRegAgcRefLnaOn_u16 */ + + u32 sdnominal_pivot; /* sd_ctl_SdnominalData_u32 */ + + /* jiffies of the next monitor cycle */ + unsigned long next_quality_monitor; + unsigned long next_agc_monitor; + + unsigned int mute : 1; /* XXX */ + unsigned int lna_driving : 1; /* sd_ctl_LnaDriving_u1 */ + unsigned int weak_signal : 1; /* sd_ctl_WeakSignal_u1 */ + unsigned int is_station : 1; /* XXX */ + unsigned int force_mono : 1; /* XXX */ + unsigned int signal_indicator : 1; /* XXX */ + unsigned int stereo_indicator : 1; /* XXX */ + unsigned int agc_monitor : 1; /* XXX */ + unsigned int quality_monitor : 1; /* XXX */ + unsigned int pilot_present : 1; /* sd_ctl_PilotPresent_u1 */ + unsigned int prev_pilot_present : 1; /* XXX */ + unsigned int stereo : 1; + unsigned int active : 1; /* set when audio enabled */ + unsigned int rds_enable : 1; /* set when rds is enabled */ + unsigned int rds_present : 1; /* RDS info present */ + unsigned int rds_sync : 1; /* RDS force sync */ + unsigned int rds_demod_running : 1; /* RDS demod is running ATM */ + unsigned int rds_sdnominal_adapt : 1; /* adapt for better recept. */ + unsigned int rds_phase_pop : 1; /* enable phase pop */ + unsigned int rds_info : 1; /* print debugging info RDS */ + unsigned int tuning_grid_50KHz : 1; /* tuning grid of 50Khz */ + u32 rssi; /* rssi last decoded frame */ + u16 rssi_dc_est_log; + u16 signal_strength; /* is rssi_dc_est_log */ + u16 rds_signal_th; /* RDS threshold */ + s16 mpx_dc; /* sd_ctl_ShadowToneData_i16 */ + + u32 tune_cap_a_f; /* float! sd_ctl_TuneCapA_f */ + u32 tune_cap_b_f; /* float! sd_ctl_TuneCapB_f */ + + int monitor_period; /* period of the monitor */ + int quality_monitor_period; /* update period in ms */ + int agc_monitor_period; /* update period in ms */ + + int georegion; /* current graphical region */ + + /* last tuned frequency */ + int freq; /* 88.0 = 8800 */ + + /* weak signal processing filter state */ + struct stfm1000_filter_parms filter_parms; + + /* state of rds */ + spinlock_t rds_lock; + struct stfm1000_rds_state rds_state; + unsigned int rds_pkt_bad; + unsigned int rds_pkt_good; + unsigned int rds_pkt_recovered; + unsigned int rds_pkt_lost_sync; + unsigned int rds_bit_overruns; + + /* monitor thread */ + wait_queue_head_t thread_wait; + unsigned long thread_events; + struct task_struct *thread; +}; + +#define EVENT_RDS_BITS 0 +#define EVENT_RDS_MIXFILT 1 +#define EVENT_RDS_SDNOMINAL 2 +#define EVENT_RDS_RESET 3 + +#define STFM1000_DBGFLG_I2C (1 << 0) + +static inline struct stfm1000 *stfm1000_from_file(struct file *file) +{ + return container_of(video_devdata(file), struct stfm1000, radio); +} + +/* in stfm1000-i2c.c */ + +/* setup reg set */ +void stfm1000_setup_reg_set(struct stfm1000 *stfm1000); + +/* direct access to registers bypassing the shadow register set */ +int stfm1000_raw_read(struct stfm1000 *stfm1000, int reg, u32 *value); +int stfm1000_raw_write(struct stfm1000 *stfm1000, int reg, u32 value); + +/* access using the shadow register set */ +int stfm1000_write(struct stfm1000 *stfm1000, int reg, u32 value); +int stfm1000_read(struct stfm1000 *stfm1000, int reg, u32 *value); +int stfm1000_write_masked(struct stfm1000 *stfm1000, int reg, u32 value, + u32 mask); +int stfm1000_set_bits(struct stfm1000 *stfm1000, int reg, u32 value); +int stfm1000_clear_bits(struct stfm1000 *stfm1000, int reg, u32 value); + +struct stfm1000_reg { + unsigned int regno; + u32 value; +}; + +#define STFM1000_REG_END -1 +#define STFM1000_REG_DELAY -2 + +#define STFM1000_REG_SET_BITS_MASK 0x1000 +#define STFM1000_REG_CLEAR_BITS_MASK 0x2000 + +#define STFM1000_REG(r, v) \ + { .regno = STFM1000_ ## r , .value = (v) } + +#define STFM1000_END \ + { .regno = STFM1000_REG_END } + +#define STFM1000_DELAY(x) \ + { .regno = STFM1000_REG_DELAY, .value = (x) } + +#define STFM1000_REG_SETBITS(r, v) \ + { .regno = STFM1000_ ## r | STFM1000_REG_SET_BITS_MASK, \ + .value = (v) } + +#define STFM1000_REG_CLRBITS(r, v) \ + { .regno = STFM1000_ ## r | STFM1000_REG_CLEAR_BITS_MASK, \ + .value = (v) } + +int stfm1000_write_regs(struct stfm1000 *stfm1000, + const struct stfm1000_reg *reg); + +/* in stfm1000-precalc.c */ +extern const struct stfm1000_tune1 +stfm1000_tune1_table[STFM1000_FREQUENCY_100KHZ_RANGE]; + +/* exported for use by alsa driver */ + +struct stfm1000_dri_sample { + /* L+R */ + u16 l_plus_r; + /* L-R */ + u16 l_minus_r; + /* Rx signal strength channel */ + u16 rssi; + /* Radio data service channel */ + u16 rds; +}; + +struct stfm1000_alsa_ops { + int (*init)(struct stfm1000 *stfm1000); + void (*release)(struct stfm1000 *stfm1000); + void (*dma_irq)(struct stfm1000 *stfm1000); + void (*attn_irq)(struct stfm1000 *stfm1000); +}; + +extern struct list_head stfm1000_devlist; +extern struct stfm1000_alsa_ops *stfm1000_alsa_ops; + +/* needed for setting the interrupt handlers from alsa */ +irqreturn_t stfm1000_dri_attn_irq(int irq, void *dev_id); +irqreturn_t stfm1000_dri_dma_irq(int irq, void *dev_id); +void stfm1000_decode_block(struct stfm1000 *stfm1000, const s16 *src, s16 *dst, int count); +void stfm1000_take_down(struct stfm1000 *stfm1000); +void stfm1000_bring_up(struct stfm1000 *stfm1000); +void stfm1000_tune_current(struct stfm1000 *stfm1000); + +void stfm1000_monitor_signal(struct stfm1000 *stfm1000, int bit); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/Makefile +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/Makefile @@ -0,0 +1,14 @@ +stfm1000-objs := stfm1000-core.o stfm1000-i2c.o stfm1000-precalc.o stfm1000-filter.o stfm1000-rds.o + +clean-files += stfm1000-precalc.o + +obj-$(CONFIG_RADIO_STFM1000) += stfm1000.o +obj-$(CONFIG_RADIO_STFM1000_ALSA) += stfm1000-alsa.o + +stfm1000-core.o: $(obj)/stfm1000-precalc.h + +hostprogs-$(CONFIG_RADIO_STFM1000) := gen-precalc +$(obj)/stfm1000-precalc.c: $(obj)/gen-precalc $(src)/stfm1000-regs.h + $(obj)/gen-precalc >$@ + +EXTRA_CFLAGS += -Idrivers/media/radio --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-rds.h +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-rds.h @@ -0,0 +1,364 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef STFM1000_RDS_H +#define STFM1000_RDS_H + +#include + +/* log2(number of samples in a filter basis) */ +#define RDS_BASISSHIFTS 4 + +/* number of samples in a filter basis */ +#define RDS_BASISLENGTH (1 << RDS_BASISSHIFTS) + +#define TIME_ADAPT_OVER 100 + +/* 2^(-this) is the RMS leaky bucket time constant */ +#define RMSALPHASHIFTS 5 + +#define PROCESS_RDS_BITS 128 + +#define RDS_BITBUFSIZE 1024 /* was 128 */ +struct stfm1000_rds_bitstream { + u32 buf[RDS_BITBUFSIZE]; /* bit buffer */ + int HeadBitCount; /* bit buffer head counter */ + int TailBitCount; /* bit buffer tail counter */ +}; + +struct stfm1000_rds_demod { + u32 mixandsum1; /* Accumulator for first + * basis filter */ + u32 mixandsum2; /* Accumulator for 2nd + * basis filter */ + u32 i; /* Phase Index, 32 phases per + * RDS bit */ + u32 return_num; /* Set if there is a new RDS bit */ + u32 BitAlignmentCounter; /* Counts bits for timing purposes */ + int sampskip; /* Requested timing shift (on i) */ + + int DisablePushing; /* Disables phase push algorithm + * (phase push happens when Ph_RMS[x], + * x != 0, is consistently the maximum + * Ph_RMS) */ + int MixPopDone; /* Last mixer phase set request is + * done */ + u8 rds_big_timeshift; /* If set, indicates a push or large + * timing shift occurred */ + int return_rdsdemod; /* Output, (most recent bit) XOR + * (prev bit) */ + u32 RDS_BIT_AMP_STAT_REG9; /* Size of bit (RMS of RDS signal at + * bitslicing instant, typically 220 + * to 270) */ + s32 decomp_hist; /* Most recent basis filter output */ + s32 decomp_hist_p; /* Previous basis filter output */ + s32 PhaseValue[4]; /* Half-basis phase samples over the + * most recent bit */ + u32 Ph_RMS[4]; /* RMS of the four half-basis phases */ + s32 timing_adj; /* Timing loop leaky-bucket + * accumulator */ + u32 MixPhase0Mag; /* Magnitude of RDS signal with RDS + * mixer phase 0 (from mixer phase + * determination) */ + u32 MixPhase1Mag; /* Magnitude of RDS signal with RDS + * mixer phase 1 (from mixer phase + * determination) */ + u32 PhasePopMaxRMS; /* Maximum RMS observed since last + * phase pop */ + u32 PrePopRMS; /* Max of Ph_RMS array right before the + * most recent phase pop */ + u8 MixPhaseState; /* State of RDS mixer phase + * determination state machine */ + int MixPhaseDetInProg; /* Set if RDS mix phase determination + * is in progress */ + int sliced_data; /* The most recent bit decision */ + u8 PopSafetyZone; /* Countdown timer, holds off next + * phase pop after a recent one */ + u8 PushSafetyZone; /* Countdown timer, holds off next + * phase pop after a timing push (b/c + * timing push resets Ph_RMS vars) */ + u8 SkipSafetyZone; /* Countdown timer, holds off next + * phase skip (small timing adj) */ + int Synchronous; /* RDS has been determined to be + * synchronous to pilot */ + u8 PushLastMaxPh; /* The index at which Ph_RMS is + * maximum ("x" in the above two + * comments) */ + s32 PushCounter; /* Counts instances of Ph_RMS[x], x!=0, + * being the maximum Ph_RMS */ + s32 SkipsAccum; /* Accumulation of all timing skips + * since RDS demod started */ + s32 SdnomSk; /* Skips counter used for SDNOMINAL + * adaption */ + + /* update this everytime it's changed & put it here */ + unsigned int rds_mix_offset : 1; + + unsigned int sdnom_adapt : 1; + unsigned int pCoefForcedMono : 1; /* copy of filter parameter */ + unsigned int PhasePoppingEnabled : 1; + + unsigned int mix_msg_pending : 1; + u8 mix_msg; + unsigned int mix_msg_overrun; + unsigned int mix_msg_processed_changed; + + unsigned int sdnominal_msg_pending : 1; + int sdnominal_msg; + unsigned int sdnominal_msg_overrun; + + u32 RdsDemodSkippedBitCnt; /* bit skipped by RDS demodulator due + * to unavailable space in buf[] + * (bit buffer) */ +}; + +#define RDS_OFFSETA 0x0fc +#define RDS_OFFSETB 0x198 +#define RDS_OFFSETC 0x168 +#define RDS_OFFSETCP 0x350 +#define RDS_OFFSETD 0x1b4 + +#define RDS_SYNDROME_OFFSETA 0x3d8 +#define RDS_SYNDROME_OFFSETB 0x3d4 +#define RDS_SYNDROME_OFFSETC 0x25c +#define RDS_SYNDROME_OFFSETCP 0x3cc +#define RDS_SYNDROME_OFFSETD 0x258 + +#define SYNC_OFFSET_A 0 /* default state */ +#define OFFSET_A 1 +#define OFFSET_B 2 +#define OFFSET_C_CP 3 +#define OFFSET_D 4 +#define PACKET_OUT 5 + +#define ECC_TBL_SIZE 1024 +#define UNRECOVERABLE_RDS_BLOCK 0xffffffff + +#define RDS_PKT_QUEUE 16 + +struct stfm1000_rds_pkt { + int state; /* Current state */ + u32 rdsstream; /* Current RDS data */ + u8 buffer[8]; /* temporary storage of RDS data */ + int discardpacket; /* discard packet count */ + int sync_lost_packets; /* sync lost */ + int good_packets; /* good packet */ + int bad_packets; /* bad packet */ + int recovered_packets; /* recovered packet */ + int bitsinfifo; /* bits count */ + int GroupDropOnce; /* Send Group Drop Message once */ + int bitcount; /* Counter for Number of Bits read */ + + /* queue the packets here */ + int buf_overruns; + int buf_head; + int buf_tail; + int buf_cnt; + int buf_queue[RDS_PKT_QUEUE][8]; +}; + +#define AUDIT 0 +#define ALL_SEGMENT_BITS 0xF +#define ALL_TEXT_BITS 0xFFFF + +struct stfm1000_rds_pty { + u8 id; /* Program Type ID */ + u8 *pRds; /* RDS description */ + u8 *pRdbs; /* RDBS description */ +}; + +struct stfm1000_rds_text { + u8 bRds_detected; /* Has the first packet come in yet? */ + u16 pi; /* Program Identification Code (PI) */ + struct stfm1000_rds_pty pty; /* Program Type (PTY)) */ + u8 tp; /* Traffic Program (TP) identification + * code */ + u8 ps[9]; /* Program Service Name Sent to UI */ + u8 altFreq[2]; /* Alternate frequency (AF) */ + u8 callLetters[5]; /* For US, stations call letters */ + + u8 text[65]; /* Radio Text A */ + + unsigned int version : 1; /* Is station broadcasting version + * A or B (B0) */ + unsigned int ps_valid : 1; /* station name is valid */ + unsigned int text_valid : 1; /* Text is valid */ + unsigned int textAB_flag : 1; /* Current flag setting, reset if flag + * changes */ + + /*------------------Working area--------------------------- */ + u8 cp_ps[8]; /* Compare buffer for PS */ + u8 wk_ps[8]; /* Program Service buffer */ + u8 wk_ps_mask; /* lower 4 bits must be set + * before copy */ + u8 wk_text[64]; /* Radio Text buffer */ + u16 wk_text_mask; /* all bits must be set before copy */ + + /*-------------------Counters------------------------------ */ + u32 messages; /* total number of messages recieved */ + u32 unsupported; /* call to unsupported group type */ + u32 mismatch; /* Mismatched values */ + u32 consecutiveGood; /* Consecutive good will clear bad */ + u32 consecutiveGoodMax; /* Max counter for paramaters */ +}; + +/* Maximum number of RDS groups described in the U.S. RBDS Standard. */ +#define MAX_RDS_GROUPS_SUPPORTED 32 + +/* Common Constants */ +#define RDS_LINE_FEED 0xA +#define RDS_EOT 0xD + +/* Offsets into OFFSETB */ +#define RDS_GROUP_TYPE(x) (((x) >> 12) & 0xF) +#define RDS_VERSION(x) (((x) >> 11) & 0x1) +#define RDS_TP(x) (((x) >> 10) & 0x1) +#define RDS_PTY(x) (((x) >> 5) & 0x1F) +#define RDS_PS_SEG(x) ((x) & 0x3) +#define RDS_RT_AB(x) (((x) >> 4) & 0x1) +#define RDS_RT_SEG(x) ((x) & 0xF) + +/* This values corresond to the Group Types defined */ +/* In the U.S. RBDS standard. */ +#define RDS_GROUP_TYPE_0A 0 /* Basic tuning and switching information */ +#define RDS_GROUP_TYPE_0B 1 /* Basic tuning and switching information */ +#define RDS_GROUP_TYPE_1A 2 /* Program item number and slow labeling + * codes */ +#define RDS_GROUP_TYPE_1B 3 /* Program item number */ +#define RDS_GROUP_TYPE_2A 4 /* Radio Text */ +#define RDS_GROUP_TYPE_2B 5 /* Radio Text */ +#define RDS_GROUP_TYPE_3A 6 /* Application identification for ODA + * only */ +#define RDS_GROUP_TYPE_3B 7 /* Open data applications */ +#define RDS_GROUP_TYPE_4A 8 /* Clock-time and date */ +#define RDS_GROUP_TYPE_4B 9 /* Open data applications */ +#define RDS_GROUP_TYPE_5A 10 /* Transparent Data Channels (32 channels) + * or ODA */ +#define RDS_GROUP_TYPE_5B 11 /* Transparent Data Channels (32 channels) + * or ODA */ +#define RDS_GROUP_TYPE_6A 12 /* In House Applications or ODA */ +#define RDS_GROUP_TYPE_6B 13 /* In House Applications or ODA */ +#define RDS_GROUP_TYPE_7A 14 /* Radio Paging or ODA */ +#define RDS_GROUP_TYPE_7B 15 /* Open Data Applications */ +#define RDS_GROUP_TYPE_8A 16 /* Traffic Message Channel or ODA */ +#define RDS_GROUP_TYPE_8B 17 /* Open Data Applications */ +#define RDS_GROUP_TYPE_9A 18 /* Emergency warning system or ODA */ +#define RDS_GROUP_TYPE_9B 19 /* Open Data Applications */ +#define RDS_GROUP_TYPE_10A 20 /* Program Type Name */ +#define RDS_GROUP_TYPE_10B 21 /* Open Data Applications */ +#define RDS_GROUP_TYPE_11A 22 /* Open Data Applications */ +#define RDS_GROUP_TYPE_11B 23 /* Open Data Applications */ +#define RDS_GROUP_TYPE_12A 24 /* Open Data Applications */ +#define RDS_GROUP_TYPE_12B 25 /* Open Data Applications */ +#define RDS_GROUP_TYPE_13A 26 /* Enhanced Radio Paging or ODA */ +#define RDS_GROUP_TYPE_13B 27 /* Open Data Applications */ +#define RDS_GROUP_TYPE_14A 28 /* Enhanced Other Networks information */ +#define RDS_GROUP_TYPE_14B 29 /* Enhanced Other Networks information */ +#define RDS_GROUP_TYPE_15A 30 /* Defined in RBDS */ +#define RDS_GROUP_TYPE_15B 31 /* Fast switching information */ +#define NUM_DEFINED_RDS_GROUPS 32 /* Number of groups defined in RBDS + * standard */ + +/* Structure representing Generic packet of 64 bits. */ +struct rds_group_data { + u16 piCode; /* * Program ID */ + u16 offsetB; /* subject to group type */ + u16 offsetC; /* subject to group type */ + u16 offsetD; /* subject to group type */ +}; + +/* Structure representing Group 0A (Service Name) */ +struct rds_group0A { + u16 piCode; /* * Program ID */ + u16 offsetB; /* subject to group type */ + u8 freq[2]; /* alt frequency 0=1 */ + u8 text[2]; /* Name segment */ +}; + +/* Structure representing Group 0B (Service Name) */ +struct rds_group0B { + u16 piCode; /* * Program ID */ + u16 offsetB; /* subject to group type */ + u16 piCode_dup; /* Duplicate PI Code */ + u8 text[2]; /* station text */ +}; + +/* Structure representing Group 2A (Radio Text) (64 char) */ +struct rds_group2A { + u16 piCode; /* * Program ID */ + u16 offsetB; /* subject to group type */ + u8 text[4]; +}; + +/* Structure representing Group 2B (Radio Text) (32 char) */ +struct rds_group2B { + u16 piCode; /* * Program ID */ + u16 offsetB; /* subject to group type */ + u16 piCode_dup; /* Duplicate PI Code */ + u8 text[2]; +}; + +/* Structure representing all groups */ +union rds_msg { + struct rds_group2B gt2B; + struct rds_group2A gt2A; + struct rds_group0B gt0B; + struct rds_group0A gt0A; + struct rds_group_data gt00; +}; + +struct stfm1000_rds_state { + struct stfm1000_rds_bitstream bitstream; + struct stfm1000_rds_demod demod; + struct stfm1000_rds_pkt pkt; + struct stfm1000_rds_text text; + unsigned int reset_req : 1; +}; + +/* callback from rds etc. */ +void stfm1000_rds_reset(struct stfm1000_rds_state *rds); +void stfm1000_rds_start(struct stfm1000_rds_state *rds); +void stfm1000_rds_stop(struct stfm1000_rds_state *rds); + +/* call these from the monitor thread, but with interrupts disabled */ +int stfm1000_rds_mix_msg_get(struct stfm1000_rds_state *rds); +int stfm1000_rds_mix_msg_processed(struct stfm1000_rds_state *rds, + int mix_msg); +int stfm1000_rds_sdnominal_msg_get(struct stfm1000_rds_state *rds); +int stfm1000_rds_sdnominal_msg_processed(struct stfm1000_rds_state *rds, + int sdnominal_msg); +int stfm1000_rds_bits_available(struct stfm1000_rds_state *rds); +int stmf1000_rds_get_bit(struct stfm1000_rds_state *rds); + +/* called from audio handler (interrupt) */ +void stfm1000_rds_demod(struct stfm1000_rds_state *rds, const u16 *dri_data, + int total); + +/* call these from monitor thread, interrupts enabled */ +void stfm1000_rds_packet_bit(struct stfm1000_rds_state *rds, int bit); +int stfm1000_rds_packet_dequeue(struct stfm1000_rds_state *rds, u8 *buf); +void stfm1000_rds_process_packet(struct stfm1000_rds_state *rds, u8 *buffer); + +static inline int stfm1000_rds_get_reset_req(struct stfm1000_rds_state *rds) +{ + return rds->reset_req; +} + +/* GROUP_TYPE 0A-0B */ +int stfm1000_rds_get_ps(struct stfm1000_rds_state *rds, u8 *buffer, + int bufsize); + +/* GROUP_TYPE 2A */ +int stfm1000_rds_get_text(struct stfm1000_rds_state *rds, u8 *buffer, + int bufsize); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-i2c.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-i2c.c @@ -0,0 +1,452 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include + +#include /* for KERNEL_VERSION MACRO */ + +#include "stfm1000.h" + +#define stfm1000_i2c_debug(p, fmt, arg...) \ + do { \ + if ((p)->dbgflg & STFM1000_DBGFLG_I2C) \ + printk(KERN_INFO "stfm1000: " fmt, ##arg); \ + } while (0) + +static const char *reg_names[STFM1000_NUM_REGS] = { +#undef REGNAME +#define REGNAME(x) \ + [STFM1000_ ## x / 4] = #x "" + + REGNAME(TUNE1), + REGNAME(SDNOMINAL), + REGNAME(PILOTTRACKING), + REGNAME(INITIALIZATION1), + REGNAME(INITIALIZATION2), + REGNAME(INITIALIZATION3), + REGNAME(INITIALIZATION4), + REGNAME(INITIALIZATION5), + REGNAME(INITIALIZATION6), + REGNAME(REF), + REGNAME(LNA), + REGNAME(MIXFILT), + REGNAME(CLK1), + REGNAME(CLK2), + REGNAME(ADC), + REGNAME(AGC_CONTROL1), + REGNAME(AGC_CONTROL2), + REGNAME(DATAPATH), + REGNAME(RMS), + REGNAME(AGC_STAT), + REGNAME(SIGNALQUALITY), + REGNAME(DCEST), + REGNAME(RSSI_TONE), + REGNAME(PILOTCORRECTION), + REGNAME(ATTENTION), + REGNAME(CLK3), + REGNAME(CHIPID), +#undef REGNAME +}; + +static const int stfm1000_rw_regs[] = { + STFM1000_TUNE1, + STFM1000_SDNOMINAL, + STFM1000_PILOTTRACKING, + STFM1000_INITIALIZATION1, + STFM1000_INITIALIZATION2, + STFM1000_INITIALIZATION3, + STFM1000_INITIALIZATION4, + STFM1000_INITIALIZATION5, + STFM1000_INITIALIZATION6, + STFM1000_REF, + STFM1000_LNA, + STFM1000_MIXFILT, + STFM1000_CLK1, + STFM1000_CLK2, + STFM1000_ADC, + STFM1000_AGC_CONTROL1, + STFM1000_AGC_CONTROL2, + STFM1000_DATAPATH, + STFM1000_ATTENTION, /* it's both WR/RD */ +}; + +static const int stfm1000_ra_regs[] = { + STFM1000_RMS, + STFM1000_AGC_STAT, + STFM1000_SIGNALQUALITY, + STFM1000_DCEST, + STFM1000_RSSI_TONE, + STFM1000_PILOTCORRECTION, + STFM1000_ATTENTION, /* it's both WR/RD - always read */ + STFM1000_CLK3, + STFM1000_CHIPID +}; + +static int verify_writes; + +void stfm1000_setup_reg_set(struct stfm1000 *stfm1000) +{ + int i, reg; + + /* set up register sets (read/write) */ + for (i = 0; i < ARRAY_SIZE(stfm1000_rw_regs); i++) { + reg = stfm1000_rw_regs[i] / 4; + stfm1000->reg_rw_set[reg / 32] |= 1U << (reg & 31); + /* printk(KERN_INFO "STFM1000: rw <= %d\n", reg); */ + } + + /* for (i = 0; i < ARRAY_SIZE(stfm1000->reg_rw_set); i++) + printk("RW[%d] = 0x%08x\n", i, stfm1000->reg_rw_set[i]); */ + + /* set up register sets (read only) */ + for (i = 0; i < ARRAY_SIZE(stfm1000_ra_regs); i++) { + reg = stfm1000_ra_regs[i] / 4; + stfm1000->reg_ra_set[reg / 32] |= 1U << (reg & 31); + /* printk(KERN_INFO "STFM1000: rw <= %d\n", reg); */ + } + /* for (i = 0; i < ARRAY_SIZE(stfm1000->reg_ra_set); i++) + printk("RO[%d] = 0x%08x\n", i, stfm1000->reg_ra_set[i]); */ + + /* clear dirty */ + memset(stfm1000->reg_dirty_set, 0, sizeof(stfm1000->reg_dirty_set)); +} + +static int stfm1000_reg_is_rw(struct stfm1000 *stfm1000, int reg) +{ + reg >>= 2; + return !!(stfm1000->reg_rw_set[reg / 32] & (1 << (reg & 31))); +} + +static int stfm1000_reg_is_ra(struct stfm1000 *stfm1000, int reg) +{ + reg >>= 2; + return !!(stfm1000->reg_ra_set[reg / 32] & (1 << (reg & 31))); +} + +static int stfm1000_reg_is_dirty(struct stfm1000 *stfm1000, int reg) +{ + reg >>= 2; + return !!(stfm1000->reg_dirty_set[reg / 32] & (1 << (reg & 31))); +} + +static void stfm1000_reg_set_dirty(struct stfm1000 *stfm1000, int reg) +{ + reg >>= 2; + stfm1000->reg_dirty_set[reg / 32] |= 1 << (reg & 31); +} + +static inline int stfm1000_reg_is_writeable(struct stfm1000 *stfm1000, int reg) +{ + return stfm1000_reg_is_rw(stfm1000, reg); +} + +static inline int stfm1000_reg_is_readable(struct stfm1000 *stfm1000, int reg) +{ + return stfm1000_reg_is_rw(stfm1000, reg) || + stfm1000_reg_is_ra(stfm1000, reg); +} + +/********************************************************/ + +static int write_reg_internal(struct stfm1000 *stfm1000, int reg, u32 value) +{ + u8 values[5]; + int ret; + + stfm1000_i2c_debug(stfm1000, "%s(%s - 0x%02x, 0x%08x)\n", __func__, + reg_names[reg / 4], reg, value); + + values[0] = (u8)reg; + values[1] = (u8)value; + values[2] = (u8)(value >> 8); + values[3] = (u8)(value >> 16); + values[4] = (u8)(value >> 24); + ret = i2c_master_send(stfm1000->client, values, 5); + if (ret < 0) + return ret; + return 0; +} + +static int read_reg_internal(struct stfm1000 *stfm1000, int reg, u32 *value) +{ + u8 regb = reg; + u8 values[4]; + int ret; + + ret = i2c_master_send(stfm1000->client, ®b, 1); + if (ret < 0) + goto out; + ret = i2c_master_recv(stfm1000->client, values, 4); + if (ret < 0) + goto out; + *value = (u32)values[0] | ((u32)values[1] << 8) | + ((u32)values[2] << 16) | ((u32)values[3] << 24); + ret = 0; + + stfm1000_i2c_debug(stfm1000, "%s(%s - 0x%02x, 0x%08x)\n", __func__, + reg_names[reg / 4], reg, *value); +out: + return ret; +} + +int stfm1000_raw_write(struct stfm1000 *stfm1000, int reg, u32 value) +{ + int ret; + + mutex_lock(&stfm1000->xfer_lock); + ret = write_reg_internal(stfm1000, reg, value); + mutex_unlock(&stfm1000->xfer_lock); + + if (ret < 0) + dev_err(&stfm1000->client->dev, "%s: failed", __func__); + + return ret; +} + +int stfm1000_raw_read(struct stfm1000 *stfm1000, int reg, u32 *value) +{ + int ret; + + mutex_lock(&stfm1000->xfer_lock); + ret = read_reg_internal(stfm1000, reg, value); + mutex_unlock(&stfm1000->xfer_lock); + + if (ret < 0) + dev_err(&stfm1000->client->dev, "%s: failed", __func__); + + return ret; +} + +static inline void stfm1000_set_shadow_reg(struct stfm1000 *stfm1000, + int reg, u32 val) +{ + stfm1000->shadow_regs[reg / 4] = val; +} + +static inline u32 stfm1000_get_shadow_reg(struct stfm1000 *stfm1000, int reg) +{ + return stfm1000->shadow_regs[reg / 4]; +} + +int stfm1000_write(struct stfm1000 *stfm1000, int reg, u32 value) +{ + int ret; + + if (!stfm1000_reg_is_writeable(stfm1000, reg)) { + ret = -EINVAL; + goto out; + } + + mutex_lock(&stfm1000->xfer_lock); + + /* same value as last one written? */ + if (stfm1000_reg_is_dirty(stfm1000, reg) && + stfm1000_get_shadow_reg(stfm1000, reg) == value) { + ret = 0; + + stfm1000_i2c_debug(stfm1000, "%s - HIT " + "(%s - 0x%02x, 0x%08x)\n", __func__, + reg_names[reg / 4], reg, value); + + goto out_unlock; + } + + /* actually write the register */ + ret = write_reg_internal(stfm1000, reg, value); + if (ret < 0) + goto out_unlock; + + /* update shadow register & mark it as dirty */ + /* only if register is not read always */ + if (!stfm1000_reg_is_ra(stfm1000, reg)) { + stfm1000_set_shadow_reg(stfm1000, reg, value); + stfm1000_reg_set_dirty(stfm1000, reg); + } + +out_unlock: + mutex_unlock(&stfm1000->xfer_lock); + +out: + if (ret < 0) + dev_err(&stfm1000->client->dev, "%s: failed", __func__); + + if (verify_writes) { + u32 value2 = ~0; + + stfm1000_raw_read(stfm1000, reg, &value2); + + stfm1000_i2c_debug(stfm1000, "%s - VER " + "(%s - 0x%02x, W=0x%08x V=0x%08x) %s\n", __func__, + reg_names[reg / 4], reg, value, value2, + value == value2 ? "OK" : "** differs **"); + } + + return ret; +} + +int stfm1000_read(struct stfm1000 *stfm1000, int reg, u32 *value) +{ + int ret = 0; + + if (!stfm1000_reg_is_readable(stfm1000, reg)) { + ret = -EINVAL; + printk(KERN_INFO "%s: !readable(%d)\n", __func__, reg); + goto out; + } + + mutex_lock(&stfm1000->xfer_lock); + + /* if the register can be written & is dirty, use the shadow */ + if (stfm1000_reg_is_writeable(stfm1000, reg) && + stfm1000_reg_is_dirty(stfm1000, reg)) { + + *value = stfm1000_get_shadow_reg(stfm1000, reg); + ret = 0; + + stfm1000_i2c_debug(stfm1000, "%s - HIT " + "(%s - 0x%02x, 0x%08x)\n", __func__, + reg_names[reg / 4], reg, *value); + + goto out_unlock; + } + + /* register must be read */ + ret = read_reg_internal(stfm1000, reg, value); + if (ret < 0) + goto out; + + /* if the register is writeable, update shadow */ + if (stfm1000_reg_is_writeable(stfm1000, reg)) { + stfm1000_set_shadow_reg(stfm1000, reg, *value); + stfm1000_reg_set_dirty(stfm1000, reg); + } + +out_unlock: + mutex_unlock(&stfm1000->xfer_lock); + +out: + if (ret < 0) + dev_err(&stfm1000->client->dev, "%s: failed", __func__); + + return ret; +} + +int stfm1000_write_masked(struct stfm1000 *stfm1000, int reg, u32 value, + u32 mask) +{ + int ret = 0; + u32 old_value; + + if (!stfm1000_reg_is_writeable(stfm1000, reg)) { + ret = -EINVAL; + printk(KERN_ERR "%s: !writeable(%d)\n", __func__, reg); + goto out; + } + + mutex_lock(&stfm1000->xfer_lock); + + /* if the register wasn't written before, read it */ + if (!stfm1000_reg_is_dirty(stfm1000, reg)) { + ret = read_reg_internal(stfm1000, reg, &old_value); + if (ret != 0) + goto out_unlock; + } else /* register was written, use the last value */ + old_value = stfm1000_get_shadow_reg(stfm1000, reg); + + /* perform masking */ + value = (old_value & ~mask) | (value & mask); + + /* if we write the same value, don't bother */ + if (stfm1000_reg_is_dirty(stfm1000, reg) && value == old_value) { + ret = 0; + + stfm1000_i2c_debug(stfm1000, "%s - HIT " + "(%s - 0x%02x, 0x%08x)\n", __func__, + reg_names[reg / 4], reg, value); + + goto out_unlock; + } + + /* actually write the register to the chip */ + ret = write_reg_internal(stfm1000, reg, value); + if (ret < 0) + goto out_unlock; + + /* if no error, update the shadow register and mark it as dirty */ + stfm1000_set_shadow_reg(stfm1000, reg, value); + stfm1000_reg_set_dirty(stfm1000, reg); + +out_unlock: + mutex_unlock(&stfm1000->xfer_lock); + +out: + if (ret < 0) + dev_err(&stfm1000->client->dev, "%s: failed", __func__); + + if (verify_writes) { + u32 value2 = ~0; + + stfm1000_raw_read(stfm1000, reg, &value2); + + stfm1000_i2c_debug(stfm1000, "%s - VER " + "(%s - 0x%02x, W=0x%08x V=0x%08x) %s\n", __func__, + reg_names[reg / 4], reg, value, value2, + value == value2 ? "OK" : "** differs **"); + } + + return ret; +} + +int stfm1000_set_bits(struct stfm1000 *stfm1000, int reg, u32 value) +{ + return stfm1000_write_masked(stfm1000, reg, value, value); +} + +int stfm1000_clear_bits(struct stfm1000 *stfm1000, int reg, u32 value) +{ + return stfm1000_write_masked(stfm1000, reg, ~value, value); +} + +int stfm1000_write_regs(struct stfm1000 *stfm1000, + const struct stfm1000_reg *reg) +{ + int ret; + + for (; reg && reg->regno != STFM1000_REG_END; reg++) { + + if (reg->regno == STFM1000_REG_DELAY) { + msleep(reg->value); + continue; + } + + if (reg->regno & STFM1000_REG_SET_BITS_MASK) + ret = stfm1000_set_bits(stfm1000, reg->regno & 0xff, + reg->value); + else if (reg->regno & STFM1000_REG_CLEAR_BITS_MASK) + ret = stfm1000_clear_bits(stfm1000, reg->regno & 0xff, + reg->value); + else + ret = stfm1000_write(stfm1000, reg->regno, reg->value); + + if (ret != 0) { + printk(KERN_ERR "%s: failed to write reg 0x%x " + "with 0x%08x\n", + __func__, reg->regno, reg->value); + return ret; + } + } + return 0; +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/gen-precalc.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/gen-precalc.c @@ -0,0 +1,62 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* generate precalculated tables */ +#include +#include +#include + +#include "stfm1000-regs.h" + +static void generate_tune1(void) +{ + int start, end; + int ndiv; // N Divider in PLL + int incr; // Increment in PLL + int cicosr; // CIC oversampling ratio + int sdnominal; // value to serve pilot/interpolator loop in SD + int i, temp; // used in tuning table construction + + start = STFM1000_FREQUENCY_100KHZ_MIN; + end = start + STFM1000_FREQUENCY_100KHZ_RANGE; + + printf("const struct stfm1000_tune1\n" + "stfm1000_tune1_table[STFM1000_FREQUENCY_100KHZ_RANGE] = {\n"); + + for (i = start; i < end; i++) { + + ndiv = (int)((i+14)/15) - 48; + incr = i - (int)(i/15)*15; + cicosr = (int)(i*2/3.0/16.0 + 0.5); + sdnominal = (int)(i*100.0e3/1.5/(double)cicosr/2.0/2.0*2.0*8.0*256.0/228.0e3*65536); + + temp = 0x00000000; // clear + temp = temp | ((cicosr<<9) & STFM1000_TUNE1_CICOSR); // bits[14:9] 0x00007E00 + temp = temp | ((ndiv<<4) & STFM1000_TUNE1_PLL_DIV); // bits[8:4] 0x000001F0 + temp = temp | ((incr) & STFM1000_TUNE1_PLL_DIV); // bits[3:0] 0x0000000F + + printf("\t[%d - STFM1000_FREQUENCY_100KHZ_MIN] = " + "{ .tune1 = 0x%08x, .sdnom = 0x%08x },\n", + i, temp, sdnominal); + } + printf("};\n"); + +} + +int main(int argc, char *argv[]) +{ + printf("#include \"stfm1000-regs.h\"\n\n"); + + generate_tune1(); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-filter.c +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-filter.c @@ -0,0 +1,860 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include + +#include "stfm1000.h" + +void stfm1000_filter_reset(struct stfm1000_filter_parms *sdf) +{ + sdf->Left = 0; + sdf->Right = 0; + sdf->RssiDecoded = 0; + sdf->RssiMant = 0; + sdf->RssiExp = 0; + sdf->RssiLb = 0; + sdf->TrueRssi = 0; + sdf->Prssi = 0; + sdf->RssiLog = 0; + sdf->ScaledTrueRssi = 0; + sdf->FilteredRssi = 0; + sdf->PrevFilteredRssi = 0; + sdf->DecRssi = 0; + sdf->ScaledRssiDecoded = 0; + sdf->ScaledRssiDecodedZ = 0; + sdf->ScaledRssiDecodedZz = 0; + sdf->Echo = 0; + sdf->EchoLb = 0; + sdf->TrueEcho = 0; + sdf->FilteredEchoLpr = 0; + sdf->PrevFilteredEchoLpr = 0; + sdf->FilteredEchoLmr = 0; + sdf->PrevFilteredEchoLmr = 0; + sdf->GatedEcho = 0; + sdf->ControlLpr = 0; + sdf->ControlLmr = 0; + sdf->LprBw = 0; + sdf->LmrBw = 0; + + sdf->LprXz = 0; + sdf->LprXzz = 0; + sdf->LprYz = 0; + sdf->LprYzz = 0; + sdf->LmrXz = 0; + sdf->LmrXzz = 0; + sdf->LmrYz = 0; + sdf->LmrYzz = 0; + sdf->FilteredLpr = 0; + sdf->FilteredLmr = 0; + + sdf->B0B = 0; + sdf->B0S = 0; + sdf->B0M = 0; + sdf->B1over2B = 0; + sdf->B1over2S = 0; + sdf->B1over2M = 0; + sdf->A1over2B = 0; + sdf->A1over2S = 0; + sdf->A1over2M = 0; + sdf->A2B = 0; + sdf->A2S = 0; + sdf->A2M = 0; + + sdf->AdjBw = 0; + + sdf->pCoefLprBwThLo = 20 << 8; + sdf->pCoefLprBwThHi = 30 << 8; + sdf->pCoefLmrBwThLo = 40 << 8; + sdf->pCoefLmrBwThHi = 50 << 8; + sdf->pCoefLprBwSlSc = 4800; /* SDK-2287 */ + sdf->pCoefLprBwSlSh = 10; /* SDK-2287 */ + sdf->pCoefLmrBwSlSc = 4800; /* SDK-2287 */ + sdf->pCoefLmrBwSlSh = 10; /* SDK-2287 */ + sdf->pCoefLprGaSlSc = 0; + sdf->pCoefLprGaSlSh = 0; + + sdf->ScaledControlLmr = 0; + + sdf->LprGa = 32767; + sdf->LmrGa = 32767; + + sdf->pCoefLprGaTh = 20; /* 25 */ + sdf->pCoefLmrGaTh = 55; /* 60 50 */ + + sdf->MuteAudio = 0; + sdf->PrevMuteAudio = 0; + sdf->MuteActionFlag = 0; + sdf->ScaleAudio = 0; + + /* *** Programmable initial setup for stereo path filters */ + sdf->LprB0 = 18806; /* -3dB cutoff = 17 kHz */ + sdf->LprB1over2 = 18812; /* -3dB cutoff = 17 kHz */ + sdf->LprA1over2 = -16079; /* -3dB cutoff = 17 kHz */ + sdf->LprA2 = -11125; /* -3dB cutoff = 17 kHz */ + sdf->LmrB0 = 18806; /* -3dB cutoff = 17 kHz */ + sdf->LmrB1over2 = 18812; /* -3dB cutoff = 17 kHz */ + sdf->LmrA1over2 = -16079; /* -3dB cutoff = 17 kHz */ + sdf->LmrA2 = -11125; /* -3dB cutoff = 17 kHz */ + + sdf->pCoefForceLockLmrBw = 0; /* Force Lock LMR BW = LPR BW + * XXX BUG WARNING - + * This control doesn't work! */ + + sdf->pCoefForcedMono = 0; /* Do not set this = + * Quality Monitor will overwrite it */ + sdf->pCoefBypassBlend = 0; /* BUG WARNING - + * This control doesn't work! */ + sdf->pCoefBypassSoftmute = 0; /* BUG WARNING - + * This control doesn't work! */ + sdf->pCoefBypassBwCtl = 0; /* BUG WARNING - + * This control doesn't work! */ + + /* There's a bug or something in the attack/decay section b/c + * setting these coef's to anything */ + /* higher than 100ms or so causes the RSSI to be artificially low - + * Needs investigation! 15DEC06 */ + sdf->pCoefRssiAttack = 65386; /* changed to 100ms to avoid + * stereo crackling + * 60764 corresponds to 3 */ + sdf->pCoefRssiDecay = 65386; /* changed to 100ms to avoid + * stereo crackling + * 65530 corresponds to 10 */ + sdf->pCoefEchoLprAttack = 52239; /* corresponds to 1 */ + sdf->pCoefEchoLprDecay = 64796; /* corresponds to 20 */ + sdf->pCoefEchoLmrAttack = 52239; /* corresponds to 1 */ + sdf->pCoefEchoLmrDecay = 65520; /* corresponds to 20 */ + sdf->pCoefEchoTh = 100; + sdf->pCoefEchoScLpr = (u16) (0.9999 * 32767.0); + sdf->pCoefEchoScLmr = (u16) (0.9999 * 32767.0); +} + +void stfm1000_filter_decode(struct stfm1000_filter_parms *sdf, s16 Lpr, + s16 Lmr, u16 Rssi) +{ + s16 temp1_reg; /* mimics 16 bit register */ + s16 temp2_reg; /* mimics 16 bit register */ + s16 temp3_reg; /* mimics 16 bit register */ + s16 temp4_reg; /* mimics 16 bit register */ +#ifndef _TUNER_STFM_MUTE + s16 temp5_reg; /* mimics 16 bit register */ +#endif + s32 temp2_reg_32; /*eI 108 27th Feb 06 temp variables. */ + + /* **************************************************************** */ + /* *** Stereo Processing ****************************************** */ + /* **************************************************************** */ + /* *** This block operates at Fs = 44.1kHz */ + /* ******** */ + /* *** LPR path filter (2nd order IIR) */ + + sdf->Acc_signed = sdf->LprB0 * Lpr + 2 * (sdf->LprB1over2 * sdf->LprXz) + + sdf->LprB0 * sdf->LprXzz + 2 * (sdf->LprA1over2 * sdf->LprYz) + + sdf->LprA2 * sdf->LprYzz; + + sdf->FilteredLpr = sdf->Acc_signed >> 15; + + sdf->LprXzz = sdf->LprXz; /* update taps */ + sdf->LprXz = Lpr; + sdf->LprYzz = sdf->LprYz; + sdf->LprYz = sdf->FilteredLpr; + + /* *** LMR path filter (2nd order IIR) */ + sdf->Acc_signed = sdf->LmrB0 * Lmr + 2 * (sdf->LmrB1over2 * sdf->LmrXz) + + sdf->LmrB0 * sdf->LmrXzz + 2 * (sdf->LmrA1over2 * sdf->LmrYz) + + sdf->LmrA2 * sdf->LmrYzz; + + sdf->FilteredLmr = sdf->Acc_signed >> 15; + + sdf->LmrXzz = sdf->LmrXz; /* update taps */ + sdf->LmrXz = Lmr; + sdf->LmrYzz = sdf->LmrYz; + sdf->LmrYz = sdf->FilteredLmr; + + /* *** Stereo Matrix */ + if (0 == sdf->pCoefBypassBlend) + temp1_reg = sdf->LmrGa * sdf->FilteredLmr >> 15; /* Blend */ + else + temp1_reg = sdf->FilteredLmr; + + if (sdf->pCoefForcedMono) /* Forced Mono */ + temp1_reg = 0; + + if (0 == sdf->pCoefBypassSoftmute) { + temp2_reg = sdf->LprGa * sdf->FilteredLpr >> 15; /* LPR */ + temp3_reg = sdf->LprGa * temp1_reg >> 15; /* LMR */ + } else { + temp2_reg = sdf->FilteredLpr; + temp3_reg = temp1_reg; + } + + temp4_reg = (temp2_reg + temp3_reg) / 2; /* Matrix */ + +#ifndef _TUNER_STFM_MUTE + temp5_reg = (temp2_reg - temp3_reg) / 2; +#endif + +#if 0 + /* *** DC Cut Filter (leaky bucket estimate) */ + if (0 == sdf->pCoefBypassDcCut) { + sdf->LeftLb_i32 = + sdf->LeftLb_i32 + temp4_reg - (sdf->LeftLb_i32 >> 8); + temp2_reg = temp4_reg - (sdf->LeftLb_i32 >> 8); /* signal - + dc_estimate */ + + sdf->RightLb_i32 = + sdf->RightLb_i32 + temp5_reg - (sdf->RightLb_i32 >> 8); + temp3_reg = temp5_reg - (sdf->RightLb_i32 >> 8); /* signal - + dc_estimate */ + } else { + temp2_reg = temp4_reg; + temp3_reg = temp5_reg; + } +#endif +#ifdef _TUNER_STFM_MUTE + /* *** Mute Audio */ + if (sdf->MuteAudio != sdf->PrevMuteAudio) /* Mute transition */ + sdf->MuteActionFlag = 1; /* set flag */ + sdf->PrevMuteAudio = sdf->MuteAudio; /* update history */ + + if (sdf->MuteActionFlag) { + if (0 == sdf->MuteAudio) { /* Mute to zero */ + /* gradual mute down */ + sdf->ScaleAudio = sdf->ScaleAudio - sdf->pCoefMuteStep; + + /* eI-117:Oct28:as per C++ code */ + /* if (0 < sdf->ScaleAudio) */ + if (0 > sdf->ScaleAudio) { + sdf->ScaleAudio = 0; /* Minimum scale + * factor */ + sdf->MuteActionFlag = 0; /* End Mute Action */ + } + } else { /* Un-Mute to one */ + /* gradual mute up */ + sdf->ScaleAudio = sdf->ScaleAudio + sdf->pCoefMuteStep; + if (0 > sdf->ScaleAudio) { /* look for rollover + * beyong 32767 */ + sdf->ScaleAudio = 32767; /* Maximum scale + * factor */ + sdf->MuteActionFlag = 0; /* End Mute Action */ + } + } /* end else */ + } /* end if (sdf->MuteActionFlag) */ + +/*! Output Processed Sample */ + + sdf->Left = (temp2_reg * sdf->ScaleAudio) >> 15; /* Scale */ + sdf->Right = (temp3_reg * sdf->ScaleAudio) >> 15; /* Scale */ + +#else /* !_TUNER_STFM_MUTE */ + + sdf->Left = temp4_reg; + sdf->Right = temp5_reg; + +#endif /* !_TUNER_STFM_MUTE */ + + /* *** End Stereo Processing ************************************** */ + /* **************************************************************** */ + + /* **************************************************************** */ + /* *** Signal Quality Indicators ********************************** */ + /* **************************************************************** */ + /* *** This block operates at Fs = 44.1kHz */ + /* ******** */ + /* *** RSSI */ + /* ******** */ + /* Decode Floating Point RSSI data */ + /*! Input RSSI sample */ + sdf->RssiMant = (Rssi & 0xFFE0) >> 5; /* 11 msb's */ + sdf->RssiExp = Rssi & 0x001F; /* 5 lsb's */ + sdf->RssiDecoded = sdf->RssiMant << sdf->RssiExp; + + /* *** Convert RSSI to 10*Log10(RSSI) */ + /* This is easily accomplished in DSP code using the CLZ instruction */ + /* rather than using all these comparisons. */ + /* The basic idea is this: */ + /* if x >= 2^P */ + /* f(x) = 3*x>>P + (3*P-3) */ + /* Approx. is valid over the range of sdf->RssiDecoded in [0, 2^21] */ + /* *** */ + if (sdf->RssiDecoded >= 1048576) + sdf->Prssi = 20; + else if (sdf->RssiDecoded >= 524288) + sdf->Prssi = 19; + else if (sdf->RssiDecoded >= 262144) + sdf->Prssi = 18; + else if (sdf->RssiDecoded >= 131072) + sdf->Prssi = 17; + else if (sdf->RssiDecoded >= 65536) + sdf->Prssi = 16; + else if (sdf->RssiDecoded >= 32768) + sdf->Prssi = 15; + else if (sdf->RssiDecoded >= 16384) + sdf->Prssi = 14; + else if (sdf->RssiDecoded >= 8192) + sdf->Prssi = 13; + else if (sdf->RssiDecoded >= 4096) + sdf->Prssi = 12; + else if (sdf->RssiDecoded >= 2048) + sdf->Prssi = 11; + else if (sdf->RssiDecoded >= 1024) + sdf->Prssi = 10; + else if (sdf->RssiDecoded >= 512) + sdf->Prssi = 9; + else if (sdf->RssiDecoded >= 256) + sdf->Prssi = 8; + else if (sdf->RssiDecoded >= 128) + sdf->Prssi = 7; + else if (sdf->RssiDecoded >= 64) + sdf->Prssi = 6; + else if (sdf->RssiDecoded >= 32) + sdf->Prssi = 5; + else if (sdf->RssiDecoded >= 16) + sdf->Prssi = 4; + else if (sdf->RssiDecoded >= 8) + sdf->Prssi = 3; + else if (sdf->RssiDecoded >= 4) + sdf->Prssi = 2; + else if (sdf->RssiDecoded >= 2) + sdf->Prssi = 1; + else + sdf->Prssi = 0; + sdf->RssiLog = + (3 * sdf->RssiDecoded >> sdf->Prssi) + (3 * sdf->Prssi - 3); + + if (0 > sdf->RssiLog) /* Clamp to positive */ + sdf->RssiLog = 0; + + /* Compensate for errors in truncation/approximation by adding 1 */ + sdf->RssiLog = sdf->RssiLog + 1; + + /* Leaky Bucket Filter DC estimate of RSSI */ + sdf->RssiLb = sdf->RssiLb + sdf->RssiLog - (sdf->RssiLb >> 3); + sdf->TrueRssi = sdf->RssiLb >> 3; + + /* Scale up so we have some room for precision */ + sdf->ScaledTrueRssi = sdf->TrueRssi << 8; + /* ************ */ + /* *** end RSSI */ + /* ************ */ + + /* ******** */ + /* *** Echo */ + /* ******** */ + /* *** Isolate Echo information as higher frequency info */ + /* using [1 -2 1] highpass FIR */ + sdf->ScaledRssiDecoded = sdf->RssiDecoded >> 4; + sdf->Echo = + (s16) ((sdf->ScaledRssiDecoded - + 2 * sdf->ScaledRssiDecodedZ + sdf->ScaledRssiDecodedZz)); + sdf->ScaledRssiDecodedZz = sdf->ScaledRssiDecodedZ; + sdf->ScaledRssiDecodedZ = sdf->ScaledRssiDecoded; + /* ************ */ + /* *** end Echo */ + /* ************ */ + /* *** End Signal Quality Indicators ******************************* */ + /* ***************************************************************** */ + + /* ***************************************************************** */ + /* *** Weak Signal Processing ************************************** */ + /* ***************************************************************** */ + /* *** This block operates at Fs = 44.1/16 = 2.75 Khz + * *eI 108 28th Feb 06 WSP and SM executes at 2.75Khz */ + /* decimate by 16 STFM_FILTER_BLOCK_MULTIPLE is 16 */ + if (0 == sdf->DecRssi) { + /* *** Filter RSSI via attack/decay structure */ + if (sdf->ScaledTrueRssi > sdf->PrevFilteredRssi) + sdf->Acc = + sdf->pCoefRssiAttack * + sdf->PrevFilteredRssi + (65535 - + sdf->pCoefRssiAttack) + * sdf->ScaledTrueRssi; + else + sdf->Acc = + sdf->pCoefRssiDecay * + sdf->PrevFilteredRssi + (65535 - + sdf->pCoefRssiDecay) + * sdf->ScaledTrueRssi; + + sdf->FilteredRssi = sdf->Acc >> 16; + sdf->PrevFilteredRssi = sdf->FilteredRssi; + + /* *** Form Echo "energy" representation */ + if (0 > sdf->Echo) + sdf->Echo = -sdf->Echo; /* ABS() */ + + /* Threshold compare */ + sdf->GatedEcho = (s16) (sdf->Echo - sdf->pCoefEchoTh); + if (0 > sdf->GatedEcho) /* Clamp to (+)ve */ + sdf->GatedEcho = 0; + + /* *** Leaky bucket DC estimate of Echo energy */ + sdf->EchoLb = sdf->EchoLb + sdf->GatedEcho - + (sdf->EchoLb >> 3); + sdf->TrueEcho = sdf->EchoLb >> 3; + + /* *** Filter Echo via attack/decay structure for LPR */ + if (sdf->TrueEcho > sdf->PrevFilteredEchoLpr) + sdf->Acc = + sdf->pCoefEchoLprAttack * + sdf->PrevFilteredEchoLpr + + (65535 - sdf->pCoefEchoLprAttack) * + sdf->TrueEcho; + else + sdf->Acc = + sdf->pCoefEchoLprDecay * + sdf->PrevFilteredEchoLpr + + (65535 - sdf->pCoefEchoLprDecay) * + sdf->TrueEcho; + + sdf->FilteredEchoLpr = sdf->Acc >> 16; + sdf->PrevFilteredEchoLpr = sdf->FilteredEchoLpr; + + /* *** Filter Echo via attack/decay structure for LMR */ + if (sdf->TrueEcho > sdf->PrevFilteredEchoLmr) + sdf->Acc = sdf->pCoefEchoLmrAttack * + sdf->PrevFilteredEchoLmr + + (65535 - sdf->pCoefEchoLmrAttack) + * sdf->TrueEcho; + else + sdf->Acc = + sdf->pCoefEchoLmrDecay * + sdf->PrevFilteredEchoLmr + (65535 - + sdf->pCoefEchoLmrDecay) + * sdf->TrueEcho; + + sdf->FilteredEchoLmr = sdf->Acc >> 16; + sdf->PrevFilteredEchoLmr = sdf->FilteredEchoLmr; + + /* *** Form control variables */ + /* Generically speaking, ctl = f(RSSI, Echo) = + * RSSI - (a*Echo)<ControlLpr = sdf->FilteredRssi - + ((sdf->pCoefEchoScLpr * + sdf->FilteredEchoLpr << sdf->pCoefEchoShLpr) >> 15); + if (0 > sdf->ControlLpr) + sdf->ControlLpr = 0; /* Clamp to positive */ + + sdf->ControlLmr = sdf->FilteredRssi - + ((sdf->pCoefEchoScLmr * + sdf->FilteredEchoLmr << sdf->pCoefEchoShLmr) >> 15); + if (0 > sdf->ControlLmr) + sdf->ControlLmr = 0; /* Clamp to positive */ + + /* *** Define LPR_BW = f(control LPR) */ + /* Assume that 5 kHz and 17 kHz are limits of LPR_BW control */ + if (sdf->ControlLpr <= sdf->pCoefLprBwThLo) + sdf->LprBw = 5000; /* lower limit is 5 kHz */ + else if (sdf->ControlLpr >= sdf->pCoefLprBwThHi) + sdf->LprBw = 17000; /* upper limit is 17 kHz */ + else + sdf->LprBw = 17000 - + ((sdf->pCoefLprBwSlSc * + (sdf->pCoefLprBwThHi - + sdf->ControlLpr)) >> sdf->pCoefLprBwSlSh); + + /* *** Define LMR_BW = f(control LMR) */ + /* Assume that 5 kHz and 17 kHz are limits of LPR_BW control */ + if (0 == sdf->pCoefForceLockLmrBw) { /* only do these calc's + * if LMR BW not + * ForceLocked */ + if (sdf->ControlLmr <= sdf->pCoefLmrBwThLo) + sdf->LmrBw = 5000; /* lower limit is + * 5 kHz */ + else if (sdf->ControlLmr >= sdf->pCoefLmrBwThHi) + sdf->LmrBw = 17000; /* upper limit is + * 17 kHz */ + else + sdf->LmrBw = 17000 - + ((sdf->pCoefLmrBwSlSc * + (sdf->pCoefLmrBwThHi - + sdf->ControlLmr)) >> + sdf->pCoefLmrBwSlSh); + } + /* *** Define LMR_Gain = f(control LMR) + * Assume that Blending occurs across 20 dB range of + * control LMR. For sake of listenability, approximate + * antilog blending curve + * To simplify antilog approx, scale control LMR back into + * "RSSI in dB range" [0,60] */ + sdf->ScaledControlLmr = sdf->ControlLmr >> 8; + + /* how far below blend threshold are we? */ + temp1_reg = sdf->pCoefLmrGaTh - sdf->ScaledControlLmr; + if (0 > temp1_reg) /* We're not below threshold, + * so no blending needed */ + temp1_reg = 0; + temp2_reg = 20 - temp1_reg; /* Blend range = 20 dB */ + if (0 > temp2_reg) + temp2_reg = 0; /* if beyond that range, + * then clamp to 0 */ + + /* We want stereo separation (n dB) to rolloff linearly over + * the 20 dB wide blend region. + * this necessitates a particular rolloff for the blend + * parameter, which is not obvious. + * See sw_audio/log_approx.m for calculation of this rolloff, + * implemented below... + * Note that stereo_separation (in dB) = 20*log10((1+a)/(1-a)), + * where a = blend scaler + * appropriately scaled for 2^15. This relationship sits at + * the heart of why this curve is needed. */ + if (15 <= temp2_reg) + temp3_reg = 264 * temp2_reg + 27487; + else if (10 <= temp2_reg) + temp3_reg = 650 * temp2_reg + 21692; + else if (5 <= temp2_reg) + temp3_reg = 1903 * temp2_reg + 9166; + else + temp3_reg = 3736 * temp2_reg; + + sdf->LmrGa = temp3_reg; + + if (32767 < sdf->LmrGa) + sdf->LmrGa = 32767; /* Clamp to '1' */ + + /* *** Define LPR_Gain = f(control LPR) + * Assume that SoftMuting occurs across 20 dB range of + * control LPR + * For sake of listenability, approximate antilog softmute + * curve To simplify antilog approx, scale control LPR back + * into "RSSI in dB range" [0,60] */ + sdf->ScaledControlLpr = sdf->ControlLpr >> 8; + /* how far below softmute threshold are we? */ + temp1_reg = sdf->pCoefLprGaTh - sdf->ScaledControlLpr; + if (0 > temp1_reg) /* We're not below threshold, + * so no softmute needed */ + temp1_reg = 0; + temp2_reg = 20 - temp1_reg; /* SoftmMute range = 20 dB */ + if (0 > temp2_reg) + temp2_reg = 0; /* if beyond that range, + * then clamp to 0 */ + /* Form 100*10^((temp2_reg-20)/20) approximation (antilog) + * over range [0,20] dB + * approximation in range [0,100], but we only want to + * softmute down to -20 dB, no further */ + if (16 < temp2_reg) + temp3_reg = 9 * temp2_reg - 80; + else if (12 < temp2_reg) + temp3_reg = 6 * temp2_reg - 33; + else if (8 < temp2_reg) + temp3_reg = 4 * temp2_reg - 8; + else + temp3_reg = 2 * temp2_reg + 9; + + sdf->LprGa = 328 * temp3_reg; /* close to 32767*(1/100) */ + + if (32767 < sdf->LprGa) + sdf->LprGa = 32767; /* Clamp to '1' */ + + if (3277 > sdf->LprGa) + sdf->LprGa = 3277; /* Clamp to 0.1*32767 = + * -20 dB min gain */ + + /* *************** Bandwidth Sweep Algorithm ************ */ + /* *** Calculate 2nd order filter coefficients as function + * of desired BW. We do this by constructing piece-wise + * linear filter coef's as f(BW), which is why we break the + * calc's into different BW regions below. + * coef(BW) = S*(M*BW + B) + * For more info, see sw_audio/ws_filter.m checked into CVS */ + if (0 == sdf->pCoefBypassBwCtl) { /* if ==1, then we just go + * with default coef set */ + /* determine if we run thru loop once or twice... */ + if (1 == sdf->pCoefForceLockLmrBw) + temp4_reg = 1; /* run thru once only to calc. + * LPR coef's */ + else + temp4_reg = 2; /* run thru twice to calc. + * LPR and LMR coef's */ + + /* Here's the big coef. calc. loop */ + for (temp1_reg = 0; temp1_reg < temp4_reg; + temp1_reg++) { + + if (0 == temp1_reg) + temp2_reg = (s16) sdf->LprBw; + else + temp2_reg = (s16) sdf->LmrBw; + + + if (6000 > temp2_reg) { + /* interval = [4.4kHz, 6.0kHz) */ + sdf->B0M = 22102; + sdf->B0B = -2209; + sdf->B0S = 1; + + sdf->B1over2M = 22089; + sdf->B1over2B = -2205; + sdf->B1over2S = 1; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = -24664; + sdf->A2B = 11698; + sdf->A2S = 2; + } else if (8000 > temp2_reg) { + /* interval = [6.0kHz, 8.0kHz) */ + sdf->B0M = 22102; + sdf->B0B = -2209; + sdf->B0S = 1; + + sdf->B1over2M = 22089; + sdf->B1over2B = -2205; + sdf->B1over2S = 1; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = -31231; + sdf->A2B = 18468; + sdf->A2S = 1; + } else if (10000 > temp2_reg) { + /* interval = [8.0kHz, 10.0kHz) */ + sdf->B0M = 28433; + sdf->B0B = -4506; + sdf->B0S = 1; + + sdf->B1over2M = 28462; + sdf->B1over2B = -4584; + sdf->B1over2S = 1; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = -14811; + sdf->A2B = 12511; + sdf->A2S = 1; + } else if (12000 > temp2_reg) { + /* interval = [10.0kHz, 12.0kHz) */ + sdf->B0M = 28433; + sdf->B0B = -4506; + sdf->B0S = 1; + + sdf->B1over2M = 28462; + sdf->B1over2B = -4584; + sdf->B1over2S = 1; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = -181; + sdf->A2B = 5875; + sdf->A2S = 1; + } else if (14000 > temp2_reg) { + /* interval = [12.0kHz, 14.0kHz) */ + sdf->B0M = 18291; + sdf->B0B = -4470; + sdf->B0S = 2; + + sdf->B1over2M = 18461; + sdf->B1over2B = -4597; + sdf->B1over2S = 2; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = 14379; + sdf->A2B = -2068; + sdf->A2S = 1; + } else if (16000 > temp2_reg) { + /* interval = [14.0kHz, 16.0kHz) */ + sdf->B0M = 18291; + sdf->B0B = -4470; + sdf->B0S = 2; + + sdf->B1over2M = 18461; + sdf->B1over2B = -4597; + sdf->B1over2S = 2; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = 30815; + sdf->A2B = -12481; + sdf->A2S = 1; + } else if (18000 > temp2_reg) { + /* interval = [16.0kHz, 18.0kHz) */ + sdf->B0M = 24740; + sdf->B0B = -9152; + sdf->B0S = 2; + + sdf->B1over2M = 24730; + sdf->B1over2B = -9142; + sdf->B1over2S = 2; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = 25631; + sdf->A2B = -13661; + sdf->A2S = 2; + } else { + /* interval = [18.0kHz, 19.845kHz) */ + sdf->B0M = 24740; + sdf->B0B = -9152; + sdf->B0S = 2; + + sdf->B1over2M = 24730; + sdf->B1over2B = -9142; + sdf->B1over2S = 2; + + sdf->A1over2M = 31646; + sdf->A1over2B = -15695; + sdf->A1over2S = 2; + + sdf->A2M = 19382; + sdf->A2B = -12183; + sdf->A2S = 4; + } + + if (0 == temp1_reg) { + /* The piece-wise linear eq's are + * based on a scaled version + * (32768/22050) of BW */ + + /* Note 32768/22050 <-> 2*(16384/22050) + * <-> 2*((16384/22050)*32768)>>15 */ + sdf->AdjBw = ((temp2_reg << 1) * + 24348) >> 15; + + /* temp = mx */ + temp3_reg = (sdf->B0M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LprB0 = sdf->B0S * + (temp3_reg + sdf->B0B); + + /* temp = mx */ + temp3_reg = (sdf->B1over2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LprB1over2 = sdf->B1over2S * + (temp3_reg + sdf->B1over2B); + + /* temp = mx */ + temp3_reg = (sdf->A1over2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LprA1over2 = -sdf->A1over2S * + (temp3_reg + sdf->A1over2B); + + /* temp = mx */ + temp3_reg = (sdf->A2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LprA2 = -sdf->A2S * + (temp3_reg + sdf->A2B); + /* *** end LPR channel -- + * LPR coefficients now ready for + * Stereo Path next time */ + } else { + /* The piece-wise linear eq's are + * based on a scaled version + * (32768/22050) of BW */ + + /* Note 32768/22050 <-> 2*(16384/22050) + * <-> 2*((16384/22050)*32768)>>15 */ + sdf->AdjBw = ((temp2_reg << 1) * + 24348) >> 15; + + /* temp = mx */ + temp3_reg = (sdf->B0M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LmrB0 = sdf->B0S * + (temp3_reg + sdf->B0B); + + /* temp = mx */ + temp3_reg = (sdf->B1over2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LmrB1over2 = sdf->B1over2S * + (temp3_reg + sdf->B1over2B); + + /* temp = mx */ + temp3_reg = (sdf->A1over2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LmrA1over2 = -sdf->A1over2S * + (temp3_reg + sdf->A1over2B); + + /* temp = mx */ + temp3_reg = (sdf->A2M * + sdf->AdjBw) >> 15; + + /* y = S*(mx + b) */ + sdf->LmrA2 = -sdf->A2S * + (temp3_reg + sdf->A2B); + /* *** end LMR channel -- LMR + * coefficients now ready for Stereo + * Path next time */ + } + } /* end for (temp1_reg=0... */ + if (1 == sdf->pCoefForceLockLmrBw) { + /* if Force Lock LMR BW = LPR BW */ + /* then set LMR coef's = LPR coef's */ + sdf->LmrB0 = sdf->LprB0; + sdf->LmrB1over2 = sdf->LprB1over2; + sdf->LmrA1over2 = sdf->LprA1over2; + sdf->LmrA2 = sdf->LprA2; + } + + } /* end if (0 == sdf->pCoef_BypassBwCtl) */ + /* eI 108 24th Feb 06 Streo Matrix part moved after + * weak signal processing. */ + if (0 == sdf->pCoefBypassBlend) + temp1_reg = sdf->LmrGa; /* Blend */ + else + temp1_reg = 1; + + if (sdf->pCoefForcedMono) /* Forced Mono */ + temp1_reg = 0; + + if (0 == sdf->pCoefBypassSoftmute) { + + /* SoftMute applied to LPR */ + sdf->temp2_reg_sm = sdf->LprGa; + + temp2_reg_32 = sdf->LprGa * temp1_reg; + + /* SoftMute applied to LMR */ + sdf->temp3_reg_sm = (temp2_reg_32) >> 15; + } else { + sdf->temp2_reg_sm = 1; /* eI 108 24th Feb 06 update + * global variable for IIR + * filter. */ + sdf->temp3_reg_sm = temp1_reg; + } + + } /* end if (0 == sdf->DecRssi) */ + + sdf->DecRssi = ((sdf->DecRssi + 1) % 16); /* end decimation + * by 16 */ + + /* *** End Weak Signal Processing ********************************** */ + /* ***************************************************************** */ +} --- linux-fsl-imx51-2.6.31.orig/drivers/media/radio/stfm1000/stfm1000-filter.h +++ linux-fsl-imx51-2.6.31/drivers/media/radio/stfm1000/stfm1000-filter.h @@ -0,0 +1,185 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef STFM1000_FILTER_H +#define STFM1000_FILTER_H + +/* STFM1000 Black Box Filter parameters */ +struct stfm1000_filter_parms { + s16 LprXzz; /* LPR x(n-2) stereo filter */ + s16 LmrXzz; /* LMR x(n-2) stereo filter */ + s16 LprYzz; /* LPR y(n-2) stereo filter */ + s16 LmrYzz; /* LMR y(n-2) stereo filter */ + + s16 LprXz; /* LPR x(n-1) stereo filter */ + s16 LmrXz; /* LMR x(n-1) stereo filter */ + s16 FilteredLpr; /* LPR filter output */ + s16 FilteredLmr; /* LMR filter output */ + + s16 LprB0; /* LPR stereo filter coef */ + s16 LprB1over2; /* LPR stereo filter coef */ + s16 LprA1over2; /* LPR stereo filter coef */ + s16 LprA2; /* LPR stereo filter coef */ + + s16 LmrB0; /* LMR stereo filter coef */ + s16 LmrB1over2; /* LMR stereo filter coef */ + s16 LmrA1over2; /* LMR stereo filter coef */ + s16 LmrA2; /* LMR stereo filter coef */ + + s16 LprYz; /* LPR y(n-1) stereo filter */ + s16 LmrYz; /* LMR y(n-1) stereo filter */ + + s16 Left; /* left channel audio out */ + s16 Right; /* right channel audio out */ + s32 LeftLb; /* left channel dc estimate */ + s32 RightLb; /* right channel dc estimate */ + + u32 RssiDecoded; /* integer decoded RSSI */ + + u16 RssiMant; /* mantissa of float-coded RSSI */ + s16 RssiLog; /* 10log10(decoded RSSI) */ + + u16 RssiExp; /* exponent of float-coded RSSI */ + u16 RssiLb; /* leaky bucket dc of rssi */ + + u16 Prssi; /* power of 2 for RSSI */ + u16 TrueRssi; /* DC estimate of log RSSI */ + + u16 ScaledRssiDecoded; /* scaled log RSSI */ + s16 Echo; /* Echo info from HiPass(RSSI) */ + u16 ScaledRssiDecodedZ; /* history buffer for above */ + u16 ScaledRssiDecodedZz;/* ditto */ + + u16 ScaledTrueRssi; /* scaled version for precision */ + u16 FilteredRssi; /* Attack/Decay filtered RSSI */ + u16 PrevFilteredRssi; /* previous version of above */ + + u16 EchoLb; /* DC estimate of Echo energy */ + u16 TrueEcho; /* scaled version of above */ + u16 FilteredEchoLpr; /* Attack/Decay filt. Echo */ + u16 PrevFilteredEchoLpr;/* previous version of above */ + u16 FilteredEchoLmr; /* Attack/Decay filt. Echo */ + u16 PrevFilteredEchoLmr;/* previous version of above */ + s16 GatedEcho; /* Echo gated by threshold */ + + s16 ControlLpr; /* master control for LPR */ + s16 ControlLmr; /* master control for LMR */ + u16 LprBw; /* LPR Bandwidth desired */ + u16 LmrBw; /* LMR Bandwidth desired */ + u16 LprGa; /* LPR Gain (SoftMute) desired */ + u16 LmrGa; /* LMR Gain (Blend) desired */ + u16 ScaledControlLmr; /* Scaled down version Ctl LMR */ + u16 ScaledControlLpr; /* Scaled down version Ctl LPR */ + + s16 B0M; /* BW ctl B0 coef slope */ + s16 B0B; /* BW ctl B0 coef y-intercept */ + + u16 B0S; /* BW ctl B0 coef scale */ + s16 B1over2M; /* BW ctl B1/2 coef slope */ + + s16 B1over2B; /* BW ctl B1/2 coef y-intercept */ + s16 A1over2B; /* BW ctl A1/2 coef y-intercept */ + + u16 B1over2S; /* BW ctl B1/2 coef scale */ + u16 A1over2S; /* BW ctl A1/2 coef scale */ + + s16 A1over2M; /* BW ctl A1/2 coef slope */ + u16 A2S; /* BW ctl A2 coef scale */ + + s16 A2M; /* BW ctl A2 coef slope */ + s16 A2B; /* BW ctl A2 coef y-intercept */ + + u16 AdjBw; /* Desired Filter BW scaled into range */ + + u16 DecRssi; /*! Decimation modulo counter */ + + s16 ScaleAudio; /*! Scale factor for Audio Mute */ + u8 MuteAudio; /*! Control for muting audio */ + u8 PrevMuteAudio; /*! History of control for muting audio */ + u8 MuteActionFlag; /*! Indicator of when mute ramping occurs */ + + u32 Acc; /* mimics H/W accumulator */ + s32 Acc_signed; + s16 temp1_reg; /* mimics 16 bit register */ + s16 temp2_reg; /* mimics 16 bit register */ + s16 temp3_reg; /* mimics 16 bit register */ + s16 temp4_reg; /* mimics 16 bit register */ + s16 temp5_reg; /* mimics 16 bit register */ + + /* *** Programmable Coefficients */ + u16 pCoefRssiAttack; /* prog coef RSSI attack */ + u16 pCoefRssiDecay; /* prog coef RSSI decay */ + u16 pCoefEchoLprAttack; /* prog coef Echo LPR attack */ + u16 pCoefEchoLprDecay; /* prog coef Echo LPR decay */ + u16 pCoefEchoLmrAttack; /* prog coef Echo LMR attack */ + u16 pCoefEchoLmrDecay; /* prog coef Echo LMR decay */ + + u16 pCoefEchoTh; /* prog coef Echo threshold */ + + u16 pCoefEchoScLpr; /* prog coef scale Echo LPR infl. */ + u16 pCoefEchoScLmr; /* prog coef scale Echo LMR infl. */ + u16 pCoefEchoShLpr; /* prog coef shift Echo LPR infl. */ + u16 pCoefEchoShLmr; /* prog coef shift Echo LMR infl. */ + + u16 pCoefLprBwThLo; /* prog coef Low Th LPR BW */ + u16 pCoefLprBwThHi; /* prog coef High Th LPR BW */ + u16 pCoefLmrBwThLo; /* prog coef Low Th LMR BW */ + u16 pCoefLmrBwThHi; /* prog coef High Th LMR BW */ + + u16 pCoefLprGaTh; /* prog coef Th LPR Gain (SoftMute) */ + u16 pCoefLmrGaTh; /* prog coef Th LMR Gain (Blend) */ + + u16 pCoefLprBwSlSc; /* prog coef Slope scale LPR BW */ + u16 pCoefLprBwSlSh; /* prog coef Slope shift LPR BW */ + u16 pCoefLmrBwSlSc; /* prog coef Slope scale LMR BW */ + u16 pCoefLmrBwSlSh; /* prog coef Slope shift LMR BW */ + u16 pCoefLprGaSlSc; /* prog coef Slope scale LPR Gain */ + u16 pCoefLprGaSlSh; /* prog coef Slope shift LPR Gain */ + + u8 pCoefForcedMono; /* Forced Mono control bit */ + u8 pCoefBypassBlend; /* Forced bypass of stereo blend */ + u8 pCoefBypassSoftmute; /* Forced bypass of softmute */ + u8 pCoefBypassDcCut; /* Forced bypass of audio DC Cut filter */ + + u8 pCoefBypassBwCtl; /* Forced bypass of bandwidth control */ + u8 pCoefForceLockLmrBw; /* prog flag to force LMR BW=LPR BW */ + + /* XXX added here, they were global */ + s16 temp2_reg_sm; + s16 temp3_reg_sm; + +}; + +/* STFM1000 Black Box Filter Function prototypes */ +void stfm1000_filter_reset(struct stfm1000_filter_parms *sdf); +void stfm1000_filter_decode(struct stfm1000_filter_parms *sdf, s16 Lpr, + s16 Lmr, u16 Rssi); + +static inline s16 +stfm1000_filter_value_left(struct stfm1000_filter_parms *sdf) +{ + return sdf->Left; +} + +static inline s16 +stfm1000_filter_value_right(struct stfm1000_filter_parms *sdf) +{ + return sdf->Right; +} + +static inline u32 +stfm1000_filter_value_rssi(struct stfm1000_filter_parms *sdf) +{ + return sdf->RssiDecoded; +} + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/spi/mxc_spi.c +++ linux-fsl-imx51-2.6.31/drivers/spi/mxc_spi.c @@ -0,0 +1,1309 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-licensisr_locke.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup SPI Configurable Serial Peripheral Interface (CSPI) Driver + */ + +/*! + * @file mxc_spi.c + * @brief This file contains the implementation of the SPI master controller services + * + * + * @ingroup SPI + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_CSPIRXDATA 0x00 +#define MXC_CSPITXDATA 0x04 +#define MXC_CSPICTRL 0x08 +#define MXC_CSPICONFIG 0x08 +#define MXC_CSPIINT 0x0C + +#define MXC_CSPICTRL_DISABLE 0x0 +#define MXC_CSPICTRL_SLAVE 0x0 +#define MXC_CSPICTRL_CSMASK 0x3 +#define MXC_CSPICTRL_SMC (1 << 3) + +#define MXC_CSPIINT_TEEN_SHIFT 0 +#define MXC_CSPIINT_THEN_SHIFT 1 +#define MXC_CSPIINT_TFEN_SHIFT 2 +#define MXC_CSPIINT_RREN_SHIFT 3 +#define MXC_CSPIINT_RHEN_SHIFT 4 +#define MXC_CSPIINT_RFEN_SHIFT 5 +#define MXC_CSPIINT_ROEN_SHIFT 6 + +#define MXC_HIGHPOL 0x0 +#define MXC_NOPHA 0x0 +#define MXC_LOWSSPOL 0x0 + +#define MXC_CSPISTAT_TE 0 +#define MXC_CSPISTAT_TH 1 +#define MXC_CSPISTAT_TF 2 +#define MXC_CSPISTAT_RR 3 +#define MXC_CSPISTAT_RH 4 +#define MXC_CSPISTAT_RF 5 +#define MXC_CSPISTAT_RO 6 + +#define MXC_CSPIPERIOD_32KHZ (1 << 15) + +/*! + * @struct mxc_spi_unique_def + * @brief This structure contains information that differs with + * SPI master controller hardware version + */ +struct mxc_spi_unique_def { + /* Width of valid bits in MXC_CSPIINT */ + unsigned int intr_bit_shift; + /* Chip Select shift */ + unsigned int cs_shift; + /* Bit count shift */ + unsigned int bc_shift; + /* Bit count mask */ + unsigned int bc_mask; + /* Data Control shift */ + unsigned int drctrl_shift; + /* Transfer Complete shift */ + unsigned int xfer_complete; + /* Bit counnter overflow shift */ + unsigned int bc_overflow; + /* FIFO Size */ + unsigned int fifo_size; + /* Control reg address */ + unsigned int ctrl_reg_addr; + /* Status reg address */ + unsigned int stat_reg_addr; + /* Period reg address */ + unsigned int period_reg_addr; + /* Test reg address */ + unsigned int test_reg_addr; + /* Reset reg address */ + unsigned int reset_reg_addr; + /* SPI mode mask */ + unsigned int mode_mask; + /* SPI enable */ + unsigned int spi_enable; + /* XCH bit */ + unsigned int xch; + /* Spi mode shift */ + unsigned int mode_shift; + /* Spi master mode enable */ + unsigned int master_enable; + /* TX interrupt enable diff */ + unsigned int tx_inten_dif; + /* RX interrupt enable bit diff */ + unsigned int rx_inten_dif; + /* Interrupt status diff */ + unsigned int int_status_dif; + /* Low pol shift */ + unsigned int low_pol_shift; + /* Phase shift */ + unsigned int pha_shift; + /* SS control shift */ + unsigned int ss_ctrl_shift; + /* SS pol shift */ + unsigned int ss_pol_shift; + /* Maximum data rate */ + unsigned int max_data_rate; + /* Data mask */ + unsigned int data_mask; + /* Data shift */ + unsigned int data_shift; + /* Loopback control */ + unsigned int lbc; + /* RX count off */ + unsigned int rx_cnt_off; + /* RX count mask */ + unsigned int rx_cnt_mask; + /* Reset start */ + unsigned int reset_start; + /* SCLK control inactive state shift */ + unsigned int sclk_ctl_shift; +}; + +struct mxc_spi; + +/*! + * Structure to group together all the data buffers and functions + * used in data transfers. + */ +struct mxc_spi_xfer { + /* Transmit buffer */ + const void *tx_buf; + /* Receive buffer */ + void *rx_buf; + /* Data transfered count */ + unsigned int count; + /* Data received count, descending sequence, zero means no more data to + be received */ + unsigned int rx_count; + /* Function to read the FIFO data to rx_buf */ + void (*rx_get) (struct mxc_spi *, u32 val); + /* Function to get the data to be written to FIFO */ + u32(*tx_get) (struct mxc_spi *); +}; + +/*! + * This structure is a way for the low level driver to define their own + * \b spi_master structure. This structure includes the core \b spi_master + * structure that is provided by Linux SPI Framework/driver as an + * element and has other elements that are specifically required by this + * low-level driver. + */ +struct mxc_spi { + /* SPI Master and a simple I/O queue runner */ + struct spi_bitbang mxc_bitbang; + /* Completion flags used in data transfers */ + struct completion xfer_done; + /* Data transfer structure */ + struct mxc_spi_xfer transfer; + /* Resource structure, which will maintain base addresses and IRQs */ + struct resource *res; + /* Base address of CSPI, used in readl and writel */ + void *base; + /* CSPI IRQ number */ + int irq; + /* CSPI Clock id */ + struct clk *clk; + /* CSPI input clock SCLK */ + unsigned long spi_ipg_clk; + /* CSPI registers' bit pattern */ + struct mxc_spi_unique_def *spi_ver_def; + /* Control reg address */ + void *ctrl_addr; + /* Status reg address */ + void *stat_addr; + /* Period reg address */ + void *period_addr; + /* Test reg address */ + void *test_addr; + /* Reset reg address */ + void *reset_addr; + /* Chipselect active function */ + void (*chipselect_active) (int cspi_mode, int status, int chipselect); + /* Chipselect inactive function */ + void (*chipselect_inactive) (int cspi_mode, int status, int chipselect); +}; + +#ifdef CONFIG_SPI_MXC_TEST_LOOPBACK +struct spi_chip_info { + int lb_enable; +}; + +static struct spi_chip_info lb_chip_info = { + .lb_enable = 1, +}; + +static struct spi_board_info loopback_info[] = { +#ifdef CONFIG_SPI_MXC_SELECT1 + { + .modalias = "spidev", + .controller_data = &lb_chip_info, + .irq = 0, + .max_speed_hz = 4000000, + .bus_num = 1, + .chip_select = 4, + }, +#endif +#ifdef CONFIG_SPI_MXC_SELECT2 + { + .modalias = "spidev", + .controller_data = &lb_chip_info, + .irq = 0, + .max_speed_hz = 4000000, + .bus_num = 2, + .chip_select = 4, + }, +#endif +#ifdef CONFIG_SPI_MXC_SELECT3 + { + .modalias = "spidev", + .controller_data = &lb_chip_info, + .irq = 0, + .max_speed_hz = 4000000, + .bus_num = 3, + .chip_select = 4, + }, +#endif +}; +#endif + +static struct mxc_spi_unique_def spi_ver_2_3 = { + .intr_bit_shift = 8, + .cs_shift = 18, + .bc_shift = 20, + .bc_mask = 0xFFF, + .drctrl_shift = 16, + .xfer_complete = (1 << 7), + .bc_overflow = 0, + .fifo_size = 64, + .ctrl_reg_addr = 4, + .stat_reg_addr = 0x18, + .period_reg_addr = 0x1C, + .test_reg_addr = 0x20, + .reset_reg_addr = 0x8, + .mode_mask = 0xF, + .spi_enable = 0x1, + .xch = (1 << 2), + .mode_shift = 4, + .master_enable = 0, + .tx_inten_dif = 0, + .rx_inten_dif = 0, + .int_status_dif = 0, + .low_pol_shift = 4, + .pha_shift = 0, + .ss_ctrl_shift = 8, + .ss_pol_shift = 12, + .max_data_rate = 0xF, + .data_mask = 0xFF, + .data_shift = 8, + .lbc = (1 << 31), + .rx_cnt_off = 8, + .rx_cnt_mask = (0x7F << 8), + .reset_start = 0, + .sclk_ctl_shift = 20, +}; + +static struct mxc_spi_unique_def spi_ver_0_7 = { + .intr_bit_shift = 8, + .cs_shift = 12, + .bc_shift = 20, + .bc_mask = 0xFFF, + .drctrl_shift = 8, + .xfer_complete = (1 << 7), + .bc_overflow = 0, + .fifo_size = 8, + .ctrl_reg_addr = 0, + .stat_reg_addr = 0x14, + .period_reg_addr = 0x18, + .test_reg_addr = 0x1C, + .reset_reg_addr = 0x0, + .mode_mask = 0x1, + .spi_enable = 0x1, + .xch = (1 << 2), + .mode_shift = 1, + .master_enable = 1 << 1, + .tx_inten_dif = 0, + .rx_inten_dif = 0, + .int_status_dif = 0, + .low_pol_shift = 4, + .pha_shift = 5, + .ss_ctrl_shift = 6, + .ss_pol_shift = 7, + .max_data_rate = 0x7, + .data_mask = 0x7, + .data_shift = 16, + .lbc = (1 << 14), + .rx_cnt_off = 4, + .rx_cnt_mask = (0xF << 4), + .reset_start = 1, +}; + +static struct mxc_spi_unique_def spi_ver_0_5 = { + .intr_bit_shift = 9, + .cs_shift = 12, + .bc_shift = 20, + .bc_mask = 0xFFF, + .drctrl_shift = 8, + .xfer_complete = (1 << 8), + .bc_overflow = (1 << 7), + .fifo_size = 8, + .ctrl_reg_addr = 0, + .stat_reg_addr = 0x14, + .period_reg_addr = 0x18, + .test_reg_addr = 0x1C, + .reset_reg_addr = 0x0, + .mode_mask = 0x1, + .spi_enable = 0x1, + .xch = (1 << 2), + .mode_shift = 1, + .master_enable = 1 << 1, + .tx_inten_dif = 0, + .rx_inten_dif = 0, + .int_status_dif = 0, + .low_pol_shift = 4, + .pha_shift = 5, + .ss_ctrl_shift = 6, + .ss_pol_shift = 7, + .max_data_rate = 0x7, + .data_mask = 0x7, + .data_shift = 16, + .lbc = (1 << 14), + .rx_cnt_off = 4, + .rx_cnt_mask = (0xF << 4), + .reset_start = 1, +}; + +static struct mxc_spi_unique_def spi_ver_0_4 = { + .intr_bit_shift = 9, + .cs_shift = 24, + .bc_shift = 8, + .bc_mask = 0x1F, + .drctrl_shift = 20, + .xfer_complete = (1 << 8), + .bc_overflow = (1 << 7), + .fifo_size = 8, + .ctrl_reg_addr = 0, + .stat_reg_addr = 0x14, + .period_reg_addr = 0x18, + .test_reg_addr = 0x1C, + .reset_reg_addr = 0x0, + .mode_mask = 0x1, + .spi_enable = 0x1, + .xch = (1 << 2), + .mode_shift = 1, + .master_enable = 1 << 1, + .tx_inten_dif = 0, + .rx_inten_dif = 0, + .int_status_dif = 0, + .low_pol_shift = 4, + .pha_shift = 5, + .ss_ctrl_shift = 6, + .ss_pol_shift = 7, + .max_data_rate = 0x7, + .data_mask = 0x7, + .data_shift = 16, + .lbc = (1 << 14), + .rx_cnt_off = 4, + .rx_cnt_mask = (0xF << 4), + .reset_start = 1, +}; + +static struct mxc_spi_unique_def spi_ver_0_0 = { + .intr_bit_shift = 18, + .cs_shift = 19, + .bc_shift = 0, + .bc_mask = 0x1F, + .drctrl_shift = 12, + .xfer_complete = (1 << 3), + .bc_overflow = (1 << 8), + .fifo_size = 8, + .ctrl_reg_addr = 0, + .stat_reg_addr = 0x0C, + .period_reg_addr = 0x14, + .test_reg_addr = 0x10, + .reset_reg_addr = 0x1C, + .mode_mask = 0x1, + .spi_enable = (1 << 10), + .xch = (1 << 9), + .mode_shift = 11, + .master_enable = 1 << 11, + .tx_inten_dif = 9, + .rx_inten_dif = 10, + .int_status_dif = 1, + .low_pol_shift = 5, + .pha_shift = 6, + .ss_ctrl_shift = 7, + .ss_pol_shift = 8, + .max_data_rate = 0x10, + .data_mask = 0x1F, + .data_shift = 14, + .lbc = (1 << 14), + .rx_cnt_off = 4, + .rx_cnt_mask = (0xF << 4), + .reset_start = 1, +}; + +extern void gpio_spi_active(int cspi_mod); +extern void gpio_spi_inactive(int cspi_mod); + +#define MXC_SPI_BUF_RX(type) \ +void mxc_spi_buf_rx_##type(struct mxc_spi *master_drv_data, u32 val)\ +{\ + type *rx = master_drv_data->transfer.rx_buf;\ + *rx++ = (type)val;\ + master_drv_data->transfer.rx_buf = rx;\ +} + +#define MXC_SPI_BUF_TX(type) \ +u32 mxc_spi_buf_tx_##type(struct mxc_spi *master_drv_data)\ +{\ + u32 val;\ + const type *tx = master_drv_data->transfer.tx_buf;\ + val = *tx++;\ + master_drv_data->transfer.tx_buf = tx;\ + return val;\ +} + +MXC_SPI_BUF_RX(u8) + MXC_SPI_BUF_TX(u8) + MXC_SPI_BUF_RX(u16) + MXC_SPI_BUF_TX(u16) + MXC_SPI_BUF_RX(u32) + MXC_SPI_BUF_TX(u32) + +/*! + * This function enables CSPI interrupt(s) + * + * @param master_data the pointer to mxc_spi structure + * @param irqs the irq(s) to set (can be a combination) + * + * @return This function returns 0 if successful, -1 otherwise. + */ +static int spi_enable_interrupt(struct mxc_spi *master_data, unsigned int irqs) +{ + if (irqs & ~((1 << master_data->spi_ver_def->intr_bit_shift) - 1)) { + return -1; + } + + __raw_writel((irqs | __raw_readl(MXC_CSPIINT + master_data->ctrl_addr)), + MXC_CSPIINT + master_data->ctrl_addr); + return 0; +} + +/*! + * This function disables CSPI interrupt(s) + * + * @param master_data the pointer to mxc_spi structure + * @param irqs the irq(s) to reset (can be a combination) + * + * @return This function returns 0 if successful, -1 otherwise. + */ +static int spi_disable_interrupt(struct mxc_spi *master_data, unsigned int irqs) +{ + if (irqs & ~((1 << master_data->spi_ver_def->intr_bit_shift) - 1)) { + return -1; + } + + __raw_writel((~irqs & + __raw_readl(MXC_CSPIINT + master_data->ctrl_addr)), + MXC_CSPIINT + master_data->ctrl_addr); + return 0; +} + +/*! + * This function sets the baud rate for the SPI module. + * + * @param master_data the pointer to mxc_spi structure + * @param baud the baud rate + * + * @return This function returns the baud rate divisor. + */ +static unsigned int spi_find_baudrate(struct mxc_spi *master_data, + unsigned int baud) +{ + unsigned int divisor; + unsigned int shift = 0; + + /* Calculate required divisor (rounded) */ + divisor = (master_data->spi_ipg_clk + baud / 2) / baud; + while (divisor >>= 1) + shift++; + + if (master_data->spi_ver_def == &spi_ver_0_0) { + shift = (shift - 1) * 2; + } else if (master_data->spi_ver_def == &spi_ver_2_3) { + shift = shift; + } else { + shift -= 2; + } + + if (shift > master_data->spi_ver_def->max_data_rate) + shift = master_data->spi_ver_def->max_data_rate; + + return (shift << master_data->spi_ver_def->data_shift); +} + +/*! + * This function loads the transmit fifo. + * + * @param base the CSPI base address + * @param count number of words to put in the TxFIFO + * @param master_drv_data spi master structure + */ +static void spi_put_tx_data(void *base, unsigned int count, + struct mxc_spi *master_drv_data) +{ + unsigned int ctrl_reg; + unsigned int data; + int i = 0; + + /* Perform Tx transaction */ + for (i = 0; i < count; i++) { + data = master_drv_data->transfer.tx_get(master_drv_data); + __raw_writel(data, base + MXC_CSPITXDATA); + } + + ctrl_reg = __raw_readl(base + MXC_CSPICTRL); + + ctrl_reg |= master_drv_data->spi_ver_def->xch; + + __raw_writel(ctrl_reg, base + MXC_CSPICTRL); + + return; +} + +/*! + * This function configures the hardware CSPI for the current SPI device. + * It sets the word size, transfer mode, data rate for this device. + * + * @param spi the current SPI device + * @param is_active indicates whether to active/deactivate the current device + */ +void mxc_spi_chipselect(struct spi_device *spi, int is_active) +{ + struct mxc_spi *master_drv_data; + struct mxc_spi_xfer *ptransfer; + struct mxc_spi_unique_def *spi_ver_def; + unsigned int ctrl_reg = 0; + unsigned int config_reg = 0; + unsigned int xfer_len; + unsigned int cs_value; + + if (is_active == BITBANG_CS_INACTIVE) { + /*Need to deselect the slave */ + return; + } + + /* Get the master controller driver data from spi device's master */ + + master_drv_data = spi_master_get_devdata(spi->master); + clk_enable(master_drv_data->clk); + spi_ver_def = master_drv_data->spi_ver_def; + + xfer_len = spi->bits_per_word; + + if (spi_ver_def == &spi_ver_2_3) { + /* Control Register Settings for transfer to this slave */ + ctrl_reg = master_drv_data->spi_ver_def->spi_enable; + ctrl_reg |= + ((spi->chip_select & MXC_CSPICTRL_CSMASK) << spi_ver_def-> + cs_shift); + ctrl_reg |= + (((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) << spi_ver_def->mode_shift); + ctrl_reg |= + spi_find_baudrate(master_drv_data, spi->max_speed_hz); + ctrl_reg |= + (((xfer_len - + 1) & spi_ver_def->bc_mask) << spi_ver_def->bc_shift); + + if (spi->mode & SPI_CPHA) + config_reg |= + (((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) << + spi_ver_def->pha_shift); + + if ((spi->mode & SPI_CPOL)) { + config_reg |= + (((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) << + spi_ver_def->low_pol_shift); + config_reg |= + (((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) << + spi_ver_def->sclk_ctl_shift); + } + cs_value = (__raw_readl(MXC_CSPICONFIG + + master_drv_data->ctrl_addr) >> + spi_ver_def->ss_pol_shift) & spi_ver_def->mode_mask; + if (spi->mode & SPI_CS_HIGH) { + config_reg |= + ((((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) | cs_value) << + spi_ver_def->ss_pol_shift); + } else + config_reg |= + ((~((1 << (spi->chip_select & + MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) & cs_value) << + spi_ver_def->ss_pol_shift); + config_reg |= + (((1 << (spi->chip_select & MXC_CSPICTRL_CSMASK)) & + spi_ver_def->mode_mask) << spi_ver_def->ss_ctrl_shift); + __raw_writel(0, master_drv_data->base + MXC_CSPICTRL); + __raw_writel(ctrl_reg, master_drv_data->base + MXC_CSPICTRL); + __raw_writel(config_reg, + MXC_CSPICONFIG + master_drv_data->ctrl_addr); + } else { + /* Control Register Settings for transfer to this slave */ + ctrl_reg = master_drv_data->spi_ver_def->spi_enable; + ctrl_reg |= + (((spi->chip_select & MXC_CSPICTRL_CSMASK) << spi_ver_def-> + cs_shift) | spi_ver_def->mode_mask << + spi_ver_def->mode_shift); + ctrl_reg |= + spi_find_baudrate(master_drv_data, spi->max_speed_hz); + ctrl_reg |= + (((xfer_len - + 1) & spi_ver_def->bc_mask) << spi_ver_def->bc_shift); + if (spi->mode & SPI_CPHA) + ctrl_reg |= + spi_ver_def->mode_mask << spi_ver_def->pha_shift; + if (!(spi->mode & SPI_CPOL)) + ctrl_reg |= + spi_ver_def->mode_mask << spi_ver_def-> + low_pol_shift; + if (spi->mode & SPI_CS_HIGH) + ctrl_reg |= + spi_ver_def->mode_mask << spi_ver_def->ss_pol_shift; + if (spi_ver_def == &spi_ver_0_7) + ctrl_reg |= + spi_ver_def->mode_mask << spi_ver_def-> + ss_ctrl_shift; + + __raw_writel(ctrl_reg, master_drv_data->base + MXC_CSPICTRL); + } + + /* Initialize the functions for transfer */ + ptransfer = &master_drv_data->transfer; + if (xfer_len <= 8) { + ptransfer->rx_get = mxc_spi_buf_rx_u8; + ptransfer->tx_get = mxc_spi_buf_tx_u8; + } else if (xfer_len <= 16) { + ptransfer->rx_get = mxc_spi_buf_rx_u16; + ptransfer->tx_get = mxc_spi_buf_tx_u16; + } else { + ptransfer->rx_get = mxc_spi_buf_rx_u32; + ptransfer->tx_get = mxc_spi_buf_tx_u32; + } +#ifdef CONFIG_SPI_MXC_TEST_LOOPBACK + { + struct spi_chip_info *lb_chip = + (struct spi_chip_info *)spi->controller_data; + if (!lb_chip) + __raw_writel(0, master_drv_data->test_addr); + else if (lb_chip->lb_enable) + __raw_writel(spi_ver_def->lbc, + master_drv_data->test_addr); + } +#endif + clk_disable(master_drv_data->clk); + return; +} + +/*! + * This function is called when an interrupt occurs on the SPI modules. + * It is the interrupt handler for the SPI modules. + * + * @param irq the irq number + * @param dev_id the pointer on the device + * + * @return The function returns IRQ_HANDLED when handled. + */ +static irqreturn_t mxc_spi_isr(int irq, void *dev_id) +{ + struct mxc_spi *master_drv_data = dev_id; + irqreturn_t ret = IRQ_NONE; + unsigned int status; + int fifo_size; + unsigned int pass_counter; + + fifo_size = master_drv_data->spi_ver_def->fifo_size; + pass_counter = fifo_size; + + /* Read the interrupt status register to determine the source */ + status = __raw_readl(master_drv_data->stat_addr); + do { + u32 rx_tmp = + __raw_readl(master_drv_data->base + MXC_CSPIRXDATA); + + if (master_drv_data->transfer.rx_buf) + master_drv_data->transfer.rx_get(master_drv_data, + rx_tmp); + (master_drv_data->transfer.count)--; + (master_drv_data->transfer.rx_count)--; + ret = IRQ_HANDLED; + if (pass_counter-- == 0) { + break; + } + status = __raw_readl(master_drv_data->stat_addr); + } while (status & + (1 << + (MXC_CSPISTAT_RR + + master_drv_data->spi_ver_def->int_status_dif))); + + if (master_drv_data->transfer.rx_count) + return ret; + + if (master_drv_data->transfer.count) { + if (master_drv_data->transfer.tx_buf) { + u32 count = (master_drv_data->transfer.count > + fifo_size) ? fifo_size : + master_drv_data->transfer.count; + master_drv_data->transfer.rx_count = count; + spi_put_tx_data(master_drv_data->base, count, + master_drv_data); + } + } else { + complete(&master_drv_data->xfer_done); + } + + return ret; +} + +/*! + * This function initialize the current SPI device. + * + * @param spi the current SPI device. + * + */ +int mxc_spi_setup(struct spi_device *spi) +{ + if (spi->max_speed_hz < 0) { + return -EINVAL; + } + + if (!spi->bits_per_word) + spi->bits_per_word = 8; + + pr_debug("%s: mode %d, %u bpw, %d hz\n", __FUNCTION__, + spi->mode, spi->bits_per_word, spi->max_speed_hz); + + return 0; +} + +static int mxc_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) +{ + return 0; +} + +/*! + * This function is called when the data has to transfer from/to the + * current SPI device in poll mode + * + * @param spi the current spi device + * @param t the transfer request - read/write buffer pairs + * + * @return Returns 0 on success. + */ +int mxc_spi_poll_transfer(struct spi_device *spi, struct spi_transfer *t) +{ + struct mxc_spi *master_drv_data = NULL; + int count, i; + volatile unsigned int status; + u32 rx_tmp; + u32 fifo_size; + int chipselect_status; + + mxc_spi_chipselect(spi, BITBANG_CS_ACTIVE); + + /* Get the master controller driver data from spi device's master */ + master_drv_data = spi_master_get_devdata(spi->master); + + chipselect_status = __raw_readl(MXC_CSPICONFIG + + master_drv_data->ctrl_addr); + chipselect_status >>= master_drv_data->spi_ver_def->ss_pol_shift & + master_drv_data->spi_ver_def->mode_mask; + if (master_drv_data->chipselect_active) + master_drv_data->chipselect_active(spi->master->bus_num, + chipselect_status, + (spi->chip_select & + MXC_CSPICTRL_CSMASK) + 1); + + clk_enable(master_drv_data->clk); + + /* Modify the Tx, Rx, Count */ + master_drv_data->transfer.tx_buf = t->tx_buf; + master_drv_data->transfer.rx_buf = t->rx_buf; + master_drv_data->transfer.count = t->len; + fifo_size = master_drv_data->spi_ver_def->fifo_size; + + count = (t->len > fifo_size) ? fifo_size : t->len; + spi_put_tx_data(master_drv_data->base, count, master_drv_data); + + while ((((status = __raw_readl(master_drv_data->test_addr)) & + master_drv_data->spi_ver_def->rx_cnt_mask) >> master_drv_data-> + spi_ver_def->rx_cnt_off) != count) ; + + for (i = 0; i < count; i++) { + rx_tmp = __raw_readl(master_drv_data->base + MXC_CSPIRXDATA); + master_drv_data->transfer.rx_get(master_drv_data, rx_tmp); + } + + clk_disable(master_drv_data->clk); + if (master_drv_data->chipselect_inactive) + master_drv_data->chipselect_inactive(spi->master->bus_num, + chipselect_status, + (spi->chip_select & + MXC_CSPICTRL_CSMASK) + 1); + return 0; +} + +/*! + * This function is called when the data has to transfer from/to the + * current SPI device. It enables the Rx interrupt, initiates the transfer. + * When Rx interrupt occurs, the completion flag is set. It then disables + * the Rx interrupt. + * + * @param spi the current spi device + * @param t the transfer request - read/write buffer pairs + * + * @return Returns 0 on success -1 on failure. + */ +int mxc_spi_transfer(struct spi_device *spi, struct spi_transfer *t) +{ + struct mxc_spi *master_drv_data = NULL; + int count; + int chipselect_status; + u32 fifo_size; + + /* Get the master controller driver data from spi device's master */ + + master_drv_data = spi_master_get_devdata(spi->master); + + chipselect_status = __raw_readl(MXC_CSPICONFIG + + master_drv_data->ctrl_addr); + chipselect_status >>= master_drv_data->spi_ver_def->ss_pol_shift & + master_drv_data->spi_ver_def->mode_mask; + if (master_drv_data->chipselect_active) + master_drv_data->chipselect_active(spi->master->bus_num, + chipselect_status, + (spi->chip_select & + MXC_CSPICTRL_CSMASK) + 1); + + clk_enable(master_drv_data->clk); + /* Modify the Tx, Rx, Count */ + master_drv_data->transfer.tx_buf = t->tx_buf; + master_drv_data->transfer.rx_buf = t->rx_buf; + master_drv_data->transfer.count = t->len; + fifo_size = master_drv_data->spi_ver_def->fifo_size; + INIT_COMPLETION(master_drv_data->xfer_done); + + /* Enable the Rx Interrupts */ + + spi_enable_interrupt(master_drv_data, + 1 << (MXC_CSPIINT_RREN_SHIFT + + master_drv_data->spi_ver_def->rx_inten_dif)); + count = (t->len > fifo_size) ? fifo_size : t->len; + + /* Perform Tx transaction */ + master_drv_data->transfer.rx_count = count; + spi_put_tx_data(master_drv_data->base, count, master_drv_data); + + /* Wait for transfer completion */ + wait_for_completion(&master_drv_data->xfer_done); + + /* Disable the Rx Interrupts */ + + spi_disable_interrupt(master_drv_data, + 1 << (MXC_CSPIINT_RREN_SHIFT + + master_drv_data->spi_ver_def-> + rx_inten_dif)); + + clk_disable(master_drv_data->clk); + if (master_drv_data->chipselect_inactive) + master_drv_data->chipselect_inactive(spi->master->bus_num, + chipselect_status, + (spi->chip_select & + MXC_CSPICTRL_CSMASK) + 1); + return (t->len - master_drv_data->transfer.count); +} + +/*! + * This function releases the current SPI device's resources. + * + * @param spi the current SPI device. + * + */ +void mxc_spi_cleanup(struct spi_device *spi) +{ +} + +/*! + * This function is called during the driver binding process. Based on the CSPI + * hardware module that is being probed this function adds the appropriate SPI module + * structure in the SPI core driver. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions. + * + * @return The function returns 0 on successful registration and initialization + * of CSPI module. Otherwise returns specific error code. + */ +static int mxc_spi_probe(struct platform_device *pdev) +{ + struct mxc_spi_master *mxc_platform_info; + struct spi_master *master; + struct mxc_spi *master_drv_data = NULL; + unsigned int spi_ver; + int ret = -ENODEV; + + /* Get the platform specific data for this master device */ + + mxc_platform_info = (struct mxc_spi_master *)pdev->dev.platform_data; + if (!mxc_platform_info) { + dev_err(&pdev->dev, "can't get the platform data for CSPI\n"); + return -EINVAL; + } + + /* Allocate SPI master controller */ + + master = spi_alloc_master(&pdev->dev, sizeof(struct mxc_spi)); + if (!master) { + dev_err(&pdev->dev, "can't alloc for spi_master\n"); + return -ENOMEM; + } + + /* Set this device's driver data to master */ + + platform_set_drvdata(pdev, master); + + /* Set this master's data from platform_info */ + + master->bus_num = pdev->id + 1; + master->num_chipselect = mxc_platform_info->maxchipselect; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; +#ifdef CONFIG_SPI_MXC_TEST_LOOPBACK + master->num_chipselect += 1; +#endif + /* Set the master controller driver data for this master */ + + master_drv_data = spi_master_get_devdata(master); + master_drv_data->mxc_bitbang.master = spi_master_get(master); + if (mxc_platform_info->chipselect_active) + master_drv_data->chipselect_active = + mxc_platform_info->chipselect_active; + if (mxc_platform_info->chipselect_inactive) + master_drv_data->chipselect_inactive = + mxc_platform_info->chipselect_inactive; + + /* Identify SPI version */ + + spi_ver = mxc_platform_info->spi_version; + if (spi_ver == 7) { + master_drv_data->spi_ver_def = &spi_ver_0_7; + } else if (spi_ver == 5) { + master_drv_data->spi_ver_def = &spi_ver_0_5; + } else if (spi_ver == 4) { + master_drv_data->spi_ver_def = &spi_ver_0_4; + } else if (spi_ver == 0) { + master_drv_data->spi_ver_def = &spi_ver_0_0; + } else if (spi_ver == 23) { + master_drv_data->spi_ver_def = &spi_ver_2_3; + } + + dev_dbg(&pdev->dev, "SPI_REV 0.%d\n", spi_ver); + + /* Set the master bitbang data */ + + master_drv_data->mxc_bitbang.chipselect = mxc_spi_chipselect; + master_drv_data->mxc_bitbang.txrx_bufs = mxc_spi_transfer; + master_drv_data->mxc_bitbang.master->setup = mxc_spi_setup; + master_drv_data->mxc_bitbang.master->cleanup = mxc_spi_cleanup; + master_drv_data->mxc_bitbang.setup_transfer = mxc_spi_setup_transfer; + + /* Initialize the completion object */ + + init_completion(&master_drv_data->xfer_done); + + /* Set the master controller register addresses and irqs */ + + master_drv_data->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!master_drv_data->res) { + dev_err(&pdev->dev, "can't get platform resource for CSPI%d\n", + master->bus_num); + ret = -ENOMEM; + goto err; + } + + if (!request_mem_region(master_drv_data->res->start, + master_drv_data->res->end - + master_drv_data->res->start + 1, pdev->name)) { + dev_err(&pdev->dev, "request_mem_region failed for CSPI%d\n", + master->bus_num); + ret = -ENOMEM; + goto err; + } + + master_drv_data->base = (void *)IO_ADDRESS(master_drv_data->res->start); + if (!master_drv_data->base) { + dev_err(&pdev->dev, "invalid base address for CSPI%d\n", + master->bus_num); + ret = -EINVAL; + goto err1; + } + + master_drv_data->irq = platform_get_irq(pdev, 0); + if (master_drv_data->irq < 0) { + dev_err(&pdev->dev, "can't get IRQ for CSPI%d\n", + master->bus_num); + ret = -EINVAL; + goto err1; + } + + /* Register for SPI Interrupt */ + + ret = request_irq(master_drv_data->irq, mxc_spi_isr, + 0, "CSPI_IRQ", master_drv_data); + if (ret != 0) { + dev_err(&pdev->dev, "request_irq failed for CSPI%d\n", + master->bus_num); + goto err1; + } + + /* Setup any GPIO active */ + + gpio_spi_active(master->bus_num - 1); + + /* Enable the CSPI Clock, CSPI Module, set as a master */ + + master_drv_data->ctrl_addr = + master_drv_data->base + master_drv_data->spi_ver_def->ctrl_reg_addr; + master_drv_data->stat_addr = + master_drv_data->base + master_drv_data->spi_ver_def->stat_reg_addr; + master_drv_data->period_addr = + master_drv_data->base + + master_drv_data->spi_ver_def->period_reg_addr; + master_drv_data->test_addr = + master_drv_data->base + master_drv_data->spi_ver_def->test_reg_addr; + master_drv_data->reset_addr = + master_drv_data->base + + master_drv_data->spi_ver_def->reset_reg_addr; + + master_drv_data->clk = clk_get(&pdev->dev, "cspi_clk"); + clk_enable(master_drv_data->clk); + master_drv_data->spi_ipg_clk = clk_get_rate(master_drv_data->clk); + + __raw_writel(master_drv_data->spi_ver_def->reset_start, + master_drv_data->reset_addr); + udelay(1); + __raw_writel((master_drv_data->spi_ver_def->spi_enable + + master_drv_data->spi_ver_def->master_enable), + master_drv_data->base + MXC_CSPICTRL); + __raw_writel(MXC_CSPIPERIOD_32KHZ, master_drv_data->period_addr); + __raw_writel(0, MXC_CSPIINT + master_drv_data->ctrl_addr); + + /* Start the SPI Master Controller driver */ + + ret = spi_bitbang_start(&master_drv_data->mxc_bitbang); + + if (ret != 0) + goto err2; + + printk(KERN_INFO "CSPI: %s-%d probed\n", pdev->name, pdev->id); + +#ifdef CONFIG_SPI_MXC_TEST_LOOPBACK + { + int i; + struct spi_board_info *bi = &loopback_info[0]; + for (i = 0; i < ARRAY_SIZE(loopback_info); i++, bi++) { + if (bi->bus_num != master->bus_num) + continue; + + dev_info(&pdev->dev, + "registering loopback device '%s'\n", + bi->modalias); + + spi_new_device(master, bi); + } + } +#endif + clk_disable(master_drv_data->clk); + return ret; + + err2: + gpio_spi_inactive(master->bus_num - 1); + clk_disable(master_drv_data->clk); + clk_put(master_drv_data->clk); + free_irq(master_drv_data->irq, master_drv_data); + err1: + release_mem_region(pdev->resource[0].start, + pdev->resource[0].end - pdev->resource[0].start + 1); + err: + spi_master_put(master); + kfree(master); + platform_set_drvdata(pdev, NULL); + return ret; +} + +/*! + * Dissociates the driver from the SPI master controller. Disables the CSPI module. + * It handles the release of SPI resources like IRQ, memory,..etc. + * + * @param pdev the device structure used to give information on which SPI + * to remove + * + * @return The function always returns 0. + */ +static int mxc_spi_remove(struct platform_device *pdev) +{ + struct spi_master *master = platform_get_drvdata(pdev); + + if (master) { + struct mxc_spi *master_drv_data = + spi_master_get_devdata(master); + + gpio_spi_inactive(master->bus_num - 1); + + /* Disable the CSPI module */ + clk_enable(master_drv_data->clk); + __raw_writel(MXC_CSPICTRL_DISABLE, + master_drv_data->base + MXC_CSPICTRL); + clk_disable(master_drv_data->clk); + /* Unregister for SPI Interrupt */ + + free_irq(master_drv_data->irq, master_drv_data); + + release_mem_region(master_drv_data->res->start, + master_drv_data->res->end - + master_drv_data->res->start + 1); + + /* Stop the SPI Master Controller driver */ + + spi_bitbang_stop(&master_drv_data->mxc_bitbang); + + spi_master_put(master); + } + + printk(KERN_INFO "CSPI: %s-%d removed\n", pdev->name, pdev->id); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +#ifdef CONFIG_PM +static int spi_bitbang_suspend(struct spi_bitbang *bitbang) +{ + unsigned long flags; + unsigned limit = 500; + + spin_lock_irqsave(&bitbang->lock, flags); + while (!list_empty(&bitbang->queue) && limit--) { + spin_unlock_irqrestore(&bitbang->lock, flags); + + dev_dbg(&bitbang->master->dev, "wait for queue\n"); + msleep(10); + + spin_lock_irqsave(&bitbang->lock, flags); + } + if (!list_empty(&bitbang->queue)) { + dev_err(&bitbang->master->dev, "queue didn't empty\n"); + return -EBUSY; + } + spin_unlock_irqrestore(&bitbang->lock, flags); + + return 0; +} + +static void spi_bitbang_resume(struct spi_bitbang *bitbang) +{ + spin_lock_init(&bitbang->lock); + INIT_LIST_HEAD(&bitbang->queue); + + bitbang->busy = 0; +} + +/*! + * This function puts the SPI master controller in low-power mode/state. + * + * @param pdev the device structure used to give information on which SDHC + * to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_spi_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct spi_master *master = platform_get_drvdata(pdev); + struct mxc_spi *master_drv_data = spi_master_get_devdata(master); + int ret = 0; + + spi_bitbang_suspend(&master_drv_data->mxc_bitbang); + clk_enable(master_drv_data->clk); + __raw_writel(MXC_CSPICTRL_DISABLE, + master_drv_data->base + MXC_CSPICTRL); + clk_disable(master_drv_data->clk); + gpio_spi_inactive(master->bus_num - 1); + + return ret; +} + +/*! + * This function brings the SPI master controller back from low-power state. + * + * @param pdev the device structure used to give information on which SDHC + * to resume + * + * @return The function always returns 0. + */ +static int mxc_spi_resume(struct platform_device *pdev) +{ + struct spi_master *master = platform_get_drvdata(pdev); + struct mxc_spi *master_drv_data = spi_master_get_devdata(master); + + gpio_spi_active(master->bus_num - 1); + + spi_bitbang_resume(&master_drv_data->mxc_bitbang); + clk_enable(master_drv_data->clk); + __raw_writel(master_drv_data->spi_ver_def->spi_enable, + master_drv_data->base + MXC_CSPICTRL); + clk_disable(master_drv_data->clk); + return 0; +} +#else +#define mxc_spi_suspend NULL +#define mxc_spi_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_spi_driver = { + .driver = { + .name = "mxc_spi", + .bus = &platform_bus_type, + .owner = THIS_MODULE, + }, + .probe = mxc_spi_probe, + .remove = mxc_spi_remove, + .suspend_late = mxc_spi_suspend, + .resume_early = mxc_spi_resume, +}; + +/*! + * This function implements the init function of the SPI device. + * It is called when the module is loaded. It enables the required + * clocks to CSPI module(if any) and activates necessary GPIO pins. + * + * @return This function returns 0. + */ +static int __init mxc_spi_init(void) +{ + pr_debug("Registering the SPI Controller Driver\n"); + return platform_driver_register(&mxc_spi_driver); +} + +/*! + * This function implements the exit function of the SPI device. + * It is called when the module is unloaded. It deactivates the + * the GPIO pin associated with CSPI hardware modules. + * + */ +static void __exit mxc_spi_exit(void) +{ + pr_debug("Unregistering the SPI Controller Driver\n"); + platform_driver_unregister(&mxc_spi_driver); +} + +subsys_initcall(mxc_spi_init); +module_exit(mxc_spi_exit); + +MODULE_DESCRIPTION("SPI Master Controller driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/spi/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/spi/Kconfig @@ -227,6 +227,40 @@ See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" Product Specification document (DS464) for hardware details. +config SPI_MXC + tristate "MXC CSPI controller as SPI Master" + depends on ARCH_MXC && SPI_MASTER + select SPI_BITBANG + help + This implements the SPI master mode using MXC CSPI. + +config SPI_MXC_TEST_LOOPBACK + bool "LOOPBACK Testing of CSPIs" + depends on SPI_MXC + select SPI_SPIDEV + default n + +config SPI_MXC_SELECT1 + bool "CSPI1" + depends on SPI_MXC + default y + +config SPI_MXC_SELECT2 + bool "CSPI2" + depends on SPI_MXC && (!ARCH_MXC91221) + default n + +config SPI_MXC_SELECT3 + bool "CSPI3" + depends on SPI_MXC && (ARCH_MX3 || ARCH_MX27 || ARCH_MX25 || ARCH_MX37 || ARCH_MX51) + default n + +config SPI_STMP3XXX + tristate "Freescale STMP37xx/378x SPI/SSP controller" + depends on ARCH_STMP3XXX && SPI_MASTER + help + SPI driver for Freescale STMP37xx/378x SoC SSP interface + # # Add new SPI master controllers in alphabetical order above this line # --- linux-fsl-imx51-2.6.31.orig/drivers/spi/spi_stmp.c +++ linux-fsl-imx51-2.6.31/drivers/spi/spi_stmp.c @@ -0,0 +1,696 @@ +/* + * Freescale STMP378X SPI master driver + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include "spi_stmp.h" + +/* 0 means DMA modei(recommended, default), !0 - PIO mode */ +static int pio /* = 0 */; +static int debug; + +/** + * stmp_spi_init_hw + * + * Initialize the SSP port + */ +static int stmp_spi_init_hw(struct stmp_spi *ss) +{ + int err; + + err = stmp37xx_spi_pins_request((char *)dev_name(ss->master_dev), ss->id); + if (err) + goto out; + + ss->clk = clk_get(NULL, "ssp"); + if (IS_ERR(ss->clk)) { + err = PTR_ERR(ss->clk); + goto out_free_pins; + } + clk_enable(ss->clk); + + stmp3xxx_reset_block((void *)ss->regs, 0); + stmp3xxx_dma_reset_channel(ss->dma); + + return 0; + +out_free_pins: + stmp37xx_spi_pins_release((char *)dev_name(ss->master_dev), ss->id); +out: + return err; +} + +static void stmp_spi_release_hw(struct stmp_spi *ss) +{ + if (ss->clk && !IS_ERR(ss->clk)) { + clk_disable(ss->clk); + clk_put(ss->clk); + } + stmp37xx_spi_pins_release((char *)dev_name(ss->master_dev), ss->id); +} + +static int stmp_spi_setup_transfer(struct spi_device *spi, + struct spi_transfer *t) +{ + u8 bits_per_word; + u32 hz; + struct stmp_spi *ss /* = spi_master_get_devdata(spi->master) */; + u16 rate; + + ss = spi_master_get_devdata(spi->master); + + bits_per_word = spi->bits_per_word; + if (t && t->bits_per_word) + bits_per_word = t->bits_per_word; + + /* + Calculate speed: + - by default, use maximum speed from ssp clk + - if device overrides it, use it + - if transfer specifies other speed, use transfer's one + */ + hz = 1000 * ss->speed_khz / ss->divider; + if (spi->max_speed_hz) + hz = min(hz, spi->max_speed_hz); + if (t && t->speed_hz) + hz = min(hz, t->speed_hz); + + if (hz == 0) { + dev_err(&spi->dev, "Cannot continue with zero clock\n"); + return -EINVAL; + } + + if (bits_per_word != 8) { + dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", + __func__, bits_per_word); + return -EINVAL; + } + + dev_dbg(&spi->dev, "Requested clk rate = %uHz, max = %uHz/%d = %uHz\n", + hz, ss->speed_khz, ss->divider, + ss->speed_khz * 1000 / ss->divider); + + if (ss->speed_khz * 1000 / ss->divider < hz) { + dev_err(&spi->dev, "%s, unsupported clock rate %uHz\n", + __func__, hz); + return -EINVAL; + } + + rate = 1000 * ss->speed_khz/ss->divider/hz; + + __raw_writel(BF(ss->divider, SSP_TIMING_CLOCK_DIVIDE) | + BF(rate - 1, SSP_TIMING_CLOCK_RATE), ss->regs + HW_SSP_TIMING); + + __raw_writel(BF(BV_SSP_CTRL1_SSP_MODE__SPI, SSP_CTRL1_SSP_MODE) | + BF(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS, SSP_CTRL1_WORD_LENGTH) | + ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) | + ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0) | + (pio ? 0 : BM_SSP_CTRL1_DMA_ENABLE), ss->regs + HW_SSP_CTRL1); + + __raw_writel(0x00, ss->regs + HW_SSP_CMD0_SET); + + return 0; +} + + +static void stmp_spi_cleanup(struct spi_device *spi) +{ + struct stmp37xx_spi_platform_data *pdata = spi->dev.platform_data; + + if (pdata && pdata->hw_release) + pdata->hw_release(spi); +} + +/* the spi->mode bits understood by this driver: */ +#define MODEBITS (SPI_CPOL | SPI_CPHA) +static int stmp_spi_setup(struct spi_device *spi) +{ + struct stmp37xx_spi_platform_data *pdata; + struct stmp_spi *ss; + int err = 0; + + ss = spi_master_get_devdata(spi->master); + + if (!spi->bits_per_word) + spi->bits_per_word = 8; + + if (spi->mode & ~MODEBITS) { + dev_err(&spi->dev, "%s: unsupported mode bits %x\n", + __func__, spi->mode & ~MODEBITS); + err = -EINVAL; + goto out; + } + + dev_dbg(&spi->dev, "%s, mode %d, %u bits/w\n", + __func__, spi->mode & MODEBITS, spi->bits_per_word); + + pdata = spi->dev.platform_data; + + if (pdata && pdata->hw_init) { + err = pdata->hw_init(spi); + if (err) + goto out; + } + + err = stmp_spi_setup_transfer(spi, NULL); + if (err) + goto out2; + return 0; + +out2: + if (pdata) + pdata->hw_release(spi); +out: + dev_err(&spi->dev, "Failed to setup transfer, error = %d\n", err); + return err; +} + +static inline u32 stmp_spi_cs(unsigned cs) +{ + return ((cs & 1) ? BM_SSP_CTRL0_WAIT_FOR_CMD : 0) | + ((cs & 2) ? BM_SSP_CTRL0_WAIT_FOR_IRQ : 0); +} + +static int stmp_spi_txrx_dma(struct stmp_spi *ss, int cs, + unsigned char *buf, dma_addr_t dma_buf, int len, + int *first, int *last, int write) +{ + u32 c0 = 0; + dma_addr_t spi_buf_dma = dma_buf; + int count, status = 0; + enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE; + + c0 |= (*first ? BM_SSP_CTRL0_LOCK_CS : 0); + c0 |= (*last ? BM_SSP_CTRL0_IGNORE_CRC : 0); + c0 |= (write ? 0 : BM_SSP_CTRL0_READ); + c0 |= BM_SSP_CTRL0_DATA_XFER; + + c0 |= stmp_spi_cs(cs); + + c0 |= BF(len, SSP_CTRL0_XFER_COUNT); + + if (!dma_buf) + spi_buf_dma = dma_map_single(ss->master_dev, buf, len, dir); + + ss->d.command->cmd = + BF(len, APBH_CHn_CMD_XFER_COUNT) | + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(write ? BV_APBH_CHn_CMD_COMMAND__DMA_READ : + BV_APBH_CHn_CMD_COMMAND__DMA_WRITE, + APBH_CHn_CMD_COMMAND); + ss->d.command->pio_words[0] = c0; + ss->d.command->buf_ptr = spi_buf_dma; + + stmp3xxx_dma_reset_channel(ss->dma); + stmp3xxx_dma_clear_interrupt(ss->dma); + stmp3xxx_dma_enable_interrupt(ss->dma); + init_completion(&ss->done); + stmp3xxx_dma_go(ss->dma, &ss->d, 1); + wait_for_completion(&ss->done); + count = 10000; + while ((__raw_readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN) && count--) + continue; + if (count <= 0) { + printk(KERN_ERR"%c: timeout on line %s:%d\n", + write ? 'W':'C', __func__, __LINE__); + status = -ETIMEDOUT; + } + + if (!dma_buf) + dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir); + + return status; +} + +static inline void stmp_spi_enable(struct stmp_spi *ss) +{ + __raw_writel(BM_SSP_CTRL0_LOCK_CS, ss->regs + HW_SSP_CTRL0_SET); + __raw_writel(BM_SSP_CTRL0_IGNORE_CRC, ss->regs + HW_SSP_CTRL0_CLR); +} + +static inline void stmp_spi_disable(struct stmp_spi *ss) +{ + __raw_writel(BM_SSP_CTRL0_LOCK_CS, ss->regs + HW_SSP_CTRL0_CLR); + __raw_writel(BM_SSP_CTRL0_IGNORE_CRC, ss->regs + HW_SSP_CTRL0_SET); +} + +static int stmp_spi_txrx_pio(struct stmp_spi *ss, int cs, + unsigned char *buf, int len, + int *first, int *last, int write) +{ + int count; + + if (*first) { + stmp_spi_enable(ss); + *first = 0; + } + + __raw_writel(stmp_spi_cs(cs), ss->regs + HW_SSP_CTRL0_SET); + + while (len--) { + if (*last && len == 0) { + stmp_spi_disable(ss); + *last = 0; + } + __raw_writel(BM_SSP_CTRL0_XFER_COUNT, + ss->regs + HW_SSP_CTRL0_CLR); + __raw_writel(1, ss->regs + HW_SSP_CTRL0_SET); /* byte-by-byte */ + + if (write) + __raw_writel(BM_SSP_CTRL0_READ, + ss->regs + HW_SSP_CTRL0_CLR); + else + __raw_writel(BM_SSP_CTRL0_READ, + ss->regs + HW_SSP_CTRL0_SET); + + /* Run! */ + __raw_writel(BM_SSP_CTRL0_RUN, ss->regs + HW_SSP_CTRL0_SET); + count = 10000; + while (((__raw_readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN) == 0) && count--) + continue; + if (count <= 0) { + printk(KERN_ERR"%c: timeout on line %s:%d\n", + write ? 'W':'C', __func__, __LINE__); + break; + } + + if (write) + __raw_writel(*buf, ss->regs + HW_SSP_DATA); + + /* Set TRANSFER */ + __raw_writel(BM_SSP_CTRL0_DATA_XFER, + ss->regs + HW_SSP_CTRL0_SET); + + if (!write) { + count = 10000; + while (count-- && + (__raw_readl(ss->regs + HW_SSP_STATUS) & + BM_SSP_STATUS_FIFO_EMPTY)) + continue; + if (count <= 0) { + printk(KERN_ERR"%c: timeout on line %s:%d\n", + write ? 'W':'C', __func__, __LINE__); + break; + } + *buf = (__raw_readl(ss->regs + HW_SSP_DATA) & 0xFF); + } + + count = 10000; + while ((__raw_readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN) && count--) + continue; + if (count <= 0) { + printk(KERN_ERR"%c: timeout on line %s:%d\n", + write ? 'W':'C', __func__, __LINE__); + break; + } + + /* advance to the next byte */ + buf++; + } + return len < 0 ? 0 : -ETIMEDOUT; +} + +static int stmp_spi_handle_message(struct stmp_spi *ss, struct spi_message *m) +{ + int first, last; + struct spi_transfer *t, *tmp_t; + int status = 0; + int cs; + + first = last = 0; + + cs = m->spi->chip_select; + + list_for_each_entry_safe(t, tmp_t, &m->transfers, transfer_list) { + + stmp_spi_setup_transfer(m->spi, t); + + if (&t->transfer_list == m->transfers.next) + first = !0; + if (&t->transfer_list == m->transfers.prev) + last = !0; + if (t->rx_buf && t->tx_buf) { + pr_debug("%s: cannot send and receive simultaneously\n", + __func__); + return -EINVAL; + } + + /* + REVISIT: + here driver completely ignores setting of t->cs_change + */ + if (t->tx_buf) { + status = pio ? + stmp_spi_txrx_pio(ss, cs, (void *)t->tx_buf, + t->len, &first, &last, 1) : + stmp_spi_txrx_dma(ss, cs, (void *)t->tx_buf, + t->tx_dma, t->len, &first, &last, 1); + if (debug) { + if (t->len < 0x10) + print_hex_dump_bytes("Tx ", + DUMP_PREFIX_OFFSET, + t->tx_buf, t->len); + else + pr_debug("Tx: %d bytes\n", t->len); + } + } + if (t->rx_buf) { + status = pio ? + stmp_spi_txrx_pio(ss, cs, t->rx_buf, + t->len, &first, &last, 0): + stmp_spi_txrx_dma(ss, cs, t->rx_buf, + t->rx_dma, t->len, &first, &last, 0); + if (debug) { + if (t->len < 0x10) + print_hex_dump_bytes("Rx ", + DUMP_PREFIX_OFFSET, + t->rx_buf, t->len); + else + pr_debug("Rx: %d bytes\n", t->len); + } + } + + if (status) + break; + + first = last = 0; + + } + return status; +} + +/** + * stmp_spi_handle + * + * The workhorse of the driver - it handles messages from the list + * + **/ +static void stmp_spi_handle(struct work_struct *w) +{ + struct stmp_spi *ss = container_of(w, struct stmp_spi, work); + unsigned long flags; + struct spi_message *m; + + BUG_ON(w == NULL); + + spin_lock_irqsave(&ss->lock, flags); + while (!list_empty(&ss->queue)) { + m = list_entry(ss->queue.next, struct spi_message, queue); + list_del_init(&m->queue); + spin_unlock_irqrestore(&ss->lock, flags); + + m->status = stmp_spi_handle_message(ss, m); + if (m->complete) + m->complete(m->context); + + spin_lock_irqsave(&ss->lock, flags); + } + spin_unlock_irqrestore(&ss->lock, flags); + + return; +} + +/** + * stmp_spi_transfer + * + * Called indirectly from spi_async, queues all the messages to + * spi_handle_message + * + * @spi: spi device + * @m: message to be queued +**/ +static int stmp_spi_transfer(struct spi_device *spi, struct spi_message *m) +{ + struct stmp_spi *ss = spi_master_get_devdata(spi->master); + unsigned long flags; + + m->status = -EINPROGRESS; + spin_lock_irqsave(&ss->lock, flags); + list_add_tail(&m->queue, &ss->queue); + queue_work(ss->workqueue, &ss->work); + spin_unlock_irqrestore(&ss->lock, flags); + return 0; +} + +static irqreturn_t stmp_spi_irq(int irq, void *dev_id) +{ + struct stmp_spi *ss = dev_id; + + stmp3xxx_dma_clear_interrupt(ss->dma); + complete(&ss->done); + return IRQ_HANDLED; +} + +static irqreturn_t stmp_spi_irq_err(int irq, void *dev_id) +{ + struct stmp_spi *ss = dev_id; + u32 c1, st; + + c1 = __raw_readl(ss->regs + HW_SSP_CTRL1); + st = __raw_readl(ss->regs + HW_SSP_STATUS); + printk(KERN_ERR"IRQ - ERROR!, status = 0x%08X, c1 = 0x%08X\n", st, c1); + __raw_writel(c1 & 0xCCCC0000, ss->regs + HW_SSP_CTRL1_CLR); + + return IRQ_HANDLED; +} + +static int __init stmp_spi_probe(struct platform_device *dev) +{ + int err = 0; + struct spi_master *master; + struct stmp_spi *ss; + struct resource *r; + u32 mem; + + /* Get resources(memory, IRQ) associated with the device */ + master = spi_alloc_master(&dev->dev, sizeof(struct stmp_spi)); + + if (master == NULL) { + err = -ENOMEM; + goto out0; + } + + platform_set_drvdata(dev, master); + + r = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (r == NULL) { + err = -ENODEV; + goto out_put_master; + } + + ss = spi_master_get_devdata(master); + ss->master_dev = &dev->dev; + ss->id = dev->id; + + INIT_WORK(&ss->work, stmp_spi_handle); + INIT_LIST_HEAD(&ss->queue); + spin_lock_init(&ss->lock); + ss->workqueue = create_singlethread_workqueue(dev_name(&dev->dev)); + master->transfer = stmp_spi_transfer; + master->setup = stmp_spi_setup; + master->cleanup = stmp_spi_cleanup; + + if (!request_mem_region(r->start, + r->end - r->start + 1, dev_name(&dev->dev))) { + err = -ENXIO; + goto out_put_master; + } + mem = r->start; + + ss->regs = r->start - STMP3XXX_REGS_PHBASE + STMP3XXX_REGS_BASE; + + ss->irq = platform_get_irq(dev, 0); + if (ss->irq < 0) { + err = -ENXIO; + goto out_put_master; + } + + r = platform_get_resource(dev, IORESOURCE_DMA, 0); + if (r == NULL) { + err = -ENODEV; + goto out_put_master; + } + + ss->dma = r->start; + err = stmp3xxx_dma_request(ss->dma, &dev->dev, (char *)dev_name(&dev->dev)); + if (err) + goto out_put_master; + + err = stmp3xxx_dma_allocate_command(ss->dma, &ss->d); + if (err) + goto out_free_dma; + + master->bus_num = dev->id; + master->num_chipselect = 1; + + /* SPI controller initializations */ + err = stmp_spi_init_hw(ss); + if (err) { + dev_dbg(&dev->dev, "cannot initialize hardware\n"); + goto out_free_dma_desc; + } + + clk_set_rate(ss->clk, 120000); + ss->speed_khz = clk_get_rate(ss->clk); + ss->divider = 2; + dev_info(&dev->dev, "Max possible speed %d = %ld/%d kHz\n", + ss->speed_khz, clk_get_rate(ss->clk), ss->divider); + + /* Register for SPI Interrupt */ + err = request_irq(ss->irq, stmp_spi_irq, 0, + dev_name(&dev->dev), ss); + if (err) { + dev_dbg(&dev->dev, "request_irq failed, %d\n", err); + goto out_release_hw; + } + err = request_irq(IRQ_SSP_ERROR, stmp_spi_irq_err, IRQF_SHARED, + dev_name(&dev->dev), ss); + if (err) { + dev_dbg(&dev->dev, "request_irq(error) failed, %d\n", err); + goto out_free_irq; + } + + err = spi_register_master(master); + if (err) { + dev_dbg(&dev->dev, "cannot register spi master, %d\n", err); + goto out_free_irq_2; + } + dev_info(&dev->dev, "at 0x%08X mapped to 0x%08X, irq=%d, bus %d, %s\n", + mem, (u32)ss->regs, ss->irq, + master->bus_num, pio ? "PIO" : "DMA"); + return 0; + +out_free_irq_2: + free_irq(IRQ_SSP_ERROR, ss); +out_free_irq: + free_irq(ss->irq, ss); +out_free_dma_desc: + stmp3xxx_dma_free_command(ss->dma, &ss->d); +out_free_dma: + stmp3xxx_dma_release(ss->dma); +out_release_hw: + stmp_spi_release_hw(ss); +out_put_master: + spi_master_put(master); +out0: + return err; +} + +static int __devexit stmp_spi_remove(struct platform_device *dev) +{ + struct stmp_spi *ss; + struct spi_master *master; + + master = platform_get_drvdata(dev); + if (master == NULL) + goto out0; + ss = spi_master_get_devdata(master); + if (ss == NULL) + goto out1; + free_irq(ss->irq, ss); + if (ss->workqueue) + destroy_workqueue(ss->workqueue); + stmp3xxx_dma_free_command(ss->dma, &ss->d); + stmp3xxx_dma_release(ss->dma); + stmp_spi_release_hw(ss); + platform_set_drvdata(dev, 0); +out1: + spi_master_put(master); +out0: + return 0; +} + +#ifdef CONFIG_PM +static int stmp_spi_suspend(struct platform_device *pdev, pm_message_t pmsg) +{ + struct stmp_spi *ss; + struct spi_master *master; + + master = platform_get_drvdata(pdev); + ss = spi_master_get_devdata(master); + + ss->saved_timings = __raw_readl(ss->regs + HW_SSP_TIMING); + clk_disable(ss->clk); + + return 0; +} + +static int stmp_spi_resume(struct platform_device *pdev) +{ + struct stmp_spi *ss; + struct spi_master *master; + + master = platform_get_drvdata(pdev); + ss = spi_master_get_devdata(master); + + clk_enable(ss->clk); + __raw_writel(BM_SSP_CTRL0_SFTRST | BM_SSP_CTRL0_CLKGATE, + ss->regs + HW_SSP_CTRL0_CLR); + __raw_writel(ss->saved_timings, ss->regs + HW_SSP_TIMING); + + return 0; +} + +#else +#define stmp_spi_suspend NULL +#define stmp_spi_resume NULL +#endif + +static struct platform_driver stmp_spi_driver = { + .probe = stmp_spi_probe, + .remove = __devexit_p(stmp_spi_remove), + .driver = { + .name = "stmp3xxx_ssp", + .owner = THIS_MODULE, + }, + .suspend = stmp_spi_suspend, + .resume = stmp_spi_resume, +}; + +static int __init stmp_spi_init(void) +{ + return platform_driver_register(&stmp_spi_driver); +} + +static void __exit stmp_spi_exit(void) +{ + platform_driver_unregister(&stmp_spi_driver); +} + +module_init(stmp_spi_init); +module_exit(stmp_spi_exit); +module_param(pio, int, S_IRUGO); +module_param(debug, int, S_IRUGO); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_DESCRIPTION("STMP37xx SPI/SSP"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/spi/Makefile +++ linux-fsl-imx51-2.6.31/drivers/spi/Makefile @@ -29,8 +29,10 @@ obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o obj-$(CONFIG_SPI_TXX9) += spi_txx9.o +obj-$(CONFIG_SPI_MXC) += mxc_spi.o obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o +obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o # ... add above this line ... # SPI protocol drivers (device/link on bus) --- linux-fsl-imx51-2.6.31.orig/drivers/spi/spi_stmp.h +++ linux-fsl-imx51-2.6.31/drivers/spi/spi_stmp.h @@ -0,0 +1,51 @@ +/* + * Freescale STMP378X SPI master driver + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __SPI_STMP_H +#define __SPI_STMP_H + +#include + +/* These two come from arch/arm/mach-xxxxx/spi.c */ +int stmp37xx_spi_pins_request(char *id, int ssp); +void stmp37xx_spi_pins_release(char *id, int ssp); + +struct stmp_spi { + int id; + + void __iomem *regs; /* vaddr of the control registers */ + + u32 irq; + u32 dma; + struct stmp3xxx_dma_descriptor d; + + u32 speed_khz; + u32 saved_timings; + u32 divider; + + struct clk *clk; + struct device *master_dev; + + struct work_struct work; + struct workqueue_struct *workqueue; + spinlock_t lock; + struct list_head queue; + + struct completion done; +}; + +#endif /* __SPI_STMP_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/base/base.h +++ linux-fsl-imx51-2.6.31/drivers/base/base.h @@ -104,7 +104,7 @@ extern int cpu_dev_init(void); extern int bus_add_device(struct device *dev); -extern void bus_attach_device(struct device *dev); +extern void bus_probe_device(struct device *dev); extern void bus_remove_device(struct device *dev); extern int bus_add_driver(struct device_driver *drv); @@ -134,3 +134,9 @@ struct device_driver *drv) { } static inline void module_remove_driver(struct device_driver *drv) { } #endif + +#ifdef CONFIG_DEVTMPFS +extern int devtmpfs_init(void); +#else +static inline int devtmpfs_init(void) { return 0; } +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/base/core.c +++ linux-fsl-imx51-2.6.31/drivers/base/core.c @@ -921,6 +921,8 @@ error = device_create_sys_dev_entry(dev); if (error) goto devtattrError; + + devtmpfs_create_node(dev); } error = device_add_class_symlinks(dev); @@ -945,7 +947,7 @@ BUS_NOTIFY_ADD_DEVICE, dev); kobject_uevent(&dev->kobj, KOBJ_ADD); - bus_attach_device(dev); + bus_probe_device(dev); if (parent) klist_add_tail(&dev->p->knode_parent, &parent->p->klist_children); @@ -1067,6 +1069,7 @@ if (parent) klist_del(&dev->p->knode_parent); if (MAJOR(dev->devt)) { + devtmpfs_delete_node(dev); device_remove_sys_dev_entry(dev); device_remove_file(dev, &devt_attr); } --- linux-fsl-imx51-2.6.31.orig/drivers/base/driver.c +++ linux-fsl-imx51-2.6.31/drivers/base/driver.c @@ -236,7 +236,7 @@ put_driver(other); printk(KERN_ERR "Error: Driver '%s' is already registered, " "aborting...\n", drv->name); - return -EEXIST; + return -EBUSY; } ret = bus_add_driver(drv); --- linux-fsl-imx51-2.6.31.orig/drivers/base/init.c +++ linux-fsl-imx51-2.6.31/drivers/base/init.c @@ -20,6 +20,7 @@ void __init driver_init(void) { /* These are the core pieces */ + devtmpfs_init(); devices_init(); buses_init(); classes_init(); --- linux-fsl-imx51-2.6.31.orig/drivers/base/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/base/Kconfig @@ -8,6 +8,31 @@ Path to uevent helper program forked by the kernel for every uevent. +config DEVTMPFS + bool "Create a kernel maintained /dev tmpfs (EXPERIMENTAL)" + depends on HOTPLUG && SHMEM && TMPFS + help + This creates a tmpfs filesystem, and mounts it at bootup + and mounts it at /dev. The kernel driver core creates device + nodes for all registered devices in that filesystem. All device + nodes are owned by root and have the default mode of 0600. + Userspace can add and delete the nodes as needed. This is + intended to simplify bootup, and make it possible to delay + the initial coldplug at bootup done by udev in userspace. + It should also provide a simpler way for rescue systems + to bring up a kernel with dynamic major/minor numbers. + Meaningful symlinks, permissions and device ownership must + still be handled by userspace. + If unsure, say N here. + +config DEVTMPFS_MOUNT + bool "Automount devtmpfs at /dev" + depends on DEVTMPFS + help + This will mount devtmpfs at /dev if the kernel mounts the root + filesystem. It will not affect initramfs based mounting. + If unsure, say N here. + config STANDALONE bool "Select only drivers that don't need compile-time external firmware" if EXPERIMENTAL default y --- linux-fsl-imx51-2.6.31.orig/drivers/base/Makefile +++ linux-fsl-imx51-2.6.31/drivers/base/Makefile @@ -4,6 +4,7 @@ driver.o class.o platform.o \ cpu.o firmware.o init.o map.o devres.o \ attribute_container.o transport_class.o +obj-$(CONFIG_DEVTMPFS) += devtmpfs.o obj-y += power/ obj-$(CONFIG_HAS_DMA) += dma-mapping.o obj-$(CONFIG_ISA) += isa.o --- linux-fsl-imx51-2.6.31.orig/drivers/base/devtmpfs.c +++ linux-fsl-imx51-2.6.31/drivers/base/devtmpfs.c @@ -0,0 +1,368 @@ +/* + * devtmpfs - kernel-maintained tmpfs-based /dev + * + * Copyright (C) 2009, Kay Sievers + * + * During bootup, before any driver core device is registered, + * devtmpfs, a tmpfs-based filesystem is created. Every driver-core + * device which requests a device node, will add a node in this + * filesystem. The node is named after the the name of the device, + * or the susbsytem can provide a custom name. All devices are + * owned by root and have a mode of 0600. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct vfsmount *dev_mnt; + +#if defined CONFIG_DEVTMPFS_MOUNT +static int dev_mount = 1; +#else +static int dev_mount; +#endif + +static int __init mount_param(char *str) +{ + dev_mount = simple_strtoul(str, NULL, 0); + return 1; +} +__setup("devtmpfs.mount=", mount_param); + +static int dev_get_sb(struct file_system_type *fs_type, int flags, + const char *dev_name, void *data, struct vfsmount *mnt) +{ + return get_sb_single(fs_type, flags, data, shmem_fill_super, mnt); +} + +static struct file_system_type dev_fs_type = { + .name = "devtmpfs", + .get_sb = dev_get_sb, + .kill_sb = kill_litter_super, +}; + +#ifdef CONFIG_BLOCK +static inline int is_blockdev(struct device *dev) +{ + return dev->class == &block_class; +} +#else +static inline int is_blockdev(struct device *dev) { return 0; } +#endif + +static int dev_mkdir(const char *name, mode_t mode) +{ + struct nameidata nd; + struct dentry *dentry; + int err; + + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + name, LOOKUP_PARENT, &nd); + if (err) + return err; + + dentry = lookup_create(&nd, 1); + if (!IS_ERR(dentry)) { + err = vfs_mkdir(nd.path.dentry->d_inode, dentry, mode); + dput(dentry); + } else { + err = PTR_ERR(dentry); + } + mutex_unlock(&nd.path.dentry->d_inode->i_mutex); + + path_put(&nd.path); + return err; +} + +static int create_path(const char *nodepath) +{ + char *path; + struct nameidata nd; + int err = 0; + + path = kstrdup(nodepath, GFP_KERNEL); + if (!path) + return -ENOMEM; + + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + path, LOOKUP_PARENT, &nd); + if (err == 0) { + struct dentry *dentry; + + /* create directory right away */ + dentry = lookup_create(&nd, 1); + if (!IS_ERR(dentry)) { + err = vfs_mkdir(nd.path.dentry->d_inode, + dentry, 0755); + dput(dentry); + } + mutex_unlock(&nd.path.dentry->d_inode->i_mutex); + + path_put(&nd.path); + } else if (err == -ENOENT) { + char *s; + + /* parent directories do not exist, create them */ + s = path; + while (1) { + s = strchr(s, '/'); + if (!s) + break; + s[0] = '\0'; + err = dev_mkdir(path, 0755); + if (err && err != -EEXIST) + break; + s[0] = '/'; + s++; + } + } + + kfree(path); + return err; +} + +int devtmpfs_create_node(struct device *dev) +{ + const char *tmp = NULL; + const char *nodename; + const struct cred *curr_cred; + mode_t mode; + struct nameidata nd; + struct dentry *dentry; + int err; + + if (!dev_mnt) + return 0; + + nodename = device_get_nodename(dev, &tmp); + if (!nodename) + return -ENOMEM; + + if (is_blockdev(dev)) + mode = S_IFBLK|0600; + else + mode = S_IFCHR|0600; + + curr_cred = override_creds(&init_cred); + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + nodename, LOOKUP_PARENT, &nd); + if (err == -ENOENT) { + /* create missing parent directories */ + create_path(nodename); + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + nodename, LOOKUP_PARENT, &nd); + if (err) + goto out; + } + + dentry = lookup_create(&nd, 0); + if (!IS_ERR(dentry)) { + err = vfs_mknod(nd.path.dentry->d_inode, + dentry, mode, dev->devt); + /* mark as kernel created inode */ + if (!err) + dentry->d_inode->i_private = &dev_mnt; + dput(dentry); + } else { + err = PTR_ERR(dentry); + } + mutex_unlock(&nd.path.dentry->d_inode->i_mutex); + + path_put(&nd.path); +out: + kfree(tmp); + revert_creds(curr_cred); + return err; +} + +static int dev_rmdir(const char *name) +{ + struct nameidata nd; + struct dentry *dentry; + int err; + + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + name, LOOKUP_PARENT, &nd); + if (err) + return err; + + mutex_lock_nested(&nd.path.dentry->d_inode->i_mutex, I_MUTEX_PARENT); + dentry = lookup_one_len(nd.last.name, nd.path.dentry, nd.last.len); + if (!IS_ERR(dentry)) { + if (dentry->d_inode) + err = vfs_rmdir(nd.path.dentry->d_inode, dentry); + else + err = -ENOENT; + dput(dentry); + } else { + err = PTR_ERR(dentry); + } + mutex_unlock(&nd.path.dentry->d_inode->i_mutex); + + path_put(&nd.path); + return err; +} + +static int delete_path(const char *nodepath) +{ + const char *path; + int err = 0; + + path = kstrdup(nodepath, GFP_KERNEL); + if (!path) + return -ENOMEM; + + while (1) { + char *base; + + base = strrchr(path, '/'); + if (!base) + break; + base[0] = '\0'; + err = dev_rmdir(path); + if (err) + break; + } + + kfree(path); + return err; +} + +static int dev_mynode(struct device *dev, struct inode *inode, struct kstat *stat) +{ + /* did we create it */ + if (inode->i_private != &dev_mnt) + return 0; + + /* does the dev_t match */ + if (is_blockdev(dev)) { + if (!S_ISBLK(stat->mode)) + return 0; + } else { + if (!S_ISCHR(stat->mode)) + return 0; + } + if (stat->rdev != dev->devt) + return 0; + + /* ours */ + return 1; +} + +int devtmpfs_delete_node(struct device *dev) +{ + const char *tmp = NULL; + const char *nodename; + const struct cred *curr_cred; + struct nameidata nd; + struct dentry *dentry; + struct kstat stat; + int deleted = 1; + int err; + + if (!dev_mnt) + return 0; + + nodename = device_get_nodename(dev, &tmp); + if (!nodename) + return -ENOMEM; + + curr_cred = override_creds(&init_cred); + err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, + nodename, LOOKUP_PARENT, &nd); + if (err) + goto out; + + mutex_lock_nested(&nd.path.dentry->d_inode->i_mutex, I_MUTEX_PARENT); + dentry = lookup_one_len(nd.last.name, nd.path.dentry, nd.last.len); + if (!IS_ERR(dentry)) { + if (dentry->d_inode) { + err = vfs_getattr(nd.path.mnt, dentry, &stat); + if (!err && dev_mynode(dev, dentry->d_inode, &stat)) { + err = vfs_unlink(nd.path.dentry->d_inode, + dentry); + if (!err || err == -ENOENT) + deleted = 1; + } + } else { + err = -ENOENT; + } + dput(dentry); + } else { + err = PTR_ERR(dentry); + } + mutex_unlock(&nd.path.dentry->d_inode->i_mutex); + + path_put(&nd.path); + if (deleted && strchr(nodename, '/')) + delete_path(nodename); +out: + kfree(tmp); + revert_creds(curr_cred); + return err; +} + +/* + * If configured, or requested by the commandline, devtmpfs will be + * auto-mounted after the kernel mounted the root filesystem. + */ +int devtmpfs_mount(const char *mountpoint) +{ + struct path path; + int err; + + if (!dev_mount) + return 0; + + if (!dev_mnt) + return 0; + + err = kern_path(mountpoint, LOOKUP_FOLLOW, &path); + if (err) + return err; + err = do_add_mount(dev_mnt, &path, 0, NULL); + if (err) + printk(KERN_INFO "devtmpfs: error mounting %i\n", err); + else + printk(KERN_INFO "devtmpfs: mounted\n"); + path_put(&path); + return err; +} + +/* + * Create devtmpfs instance, driver-core devices will add their device + * nodes here. + */ +int __init devtmpfs_init(void) +{ + int err; + struct vfsmount *mnt; + char options[] = "mode=0755"; + + err = register_filesystem(&dev_fs_type); + if (err) { + printk(KERN_ERR "devtmpfs: unable to register devtmpfs " + "type %i\n", err); + return err; + } + + mnt = kern_mount_data(&dev_fs_type, options); + if (IS_ERR(mnt)) { + err = PTR_ERR(mnt); + printk(KERN_ERR "devtmpfs: unable to create devtmpfs %i\n", err); + unregister_filesystem(&dev_fs_type); + return err; + } + dev_mnt = mnt; + + printk(KERN_INFO "devtmpfs: initialized\n"); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/drivers/base/bus.c +++ linux-fsl-imx51-2.6.31/drivers/base/bus.c @@ -459,8 +459,9 @@ * bus_add_device - add device to bus * @dev: device being added * + * - Add device's bus attributes. + * - Create links to device's bus. * - Add the device to its bus's list of devices. - * - Create link to device's bus. */ int bus_add_device(struct device *dev) { @@ -483,6 +484,7 @@ error = make_deprecated_bus_links(dev); if (error) goto out_deprecated; + klist_add_tail(&dev->p->knode_bus, &bus->p->klist_devices); } return 0; @@ -498,24 +500,19 @@ } /** - * bus_attach_device - add device to bus - * @dev: device tried to attach to a driver + * bus_probe_device - probe drivers for a new device + * @dev: device to probe * - * - Add device to bus's list of devices. - * - Try to attach to driver. + * - Automatically probe for a driver if the bus allows it. */ -void bus_attach_device(struct device *dev) +void bus_probe_device(struct device *dev) { struct bus_type *bus = dev->bus; - int ret = 0; + int ret; - if (bus) { - if (bus->p->drivers_autoprobe) - ret = device_attach(dev); + if (bus && bus->p->drivers_autoprobe) { + ret = device_attach(dev); WARN_ON(ret < 0); - if (ret >= 0) - klist_add_tail(&dev->p->knode_bus, - &bus->p->klist_devices); } } --- linux-fsl-imx51-2.6.31.orig/drivers/isdn/hisax/hfc_usb.c +++ linux-fsl-imx51-2.6.31/drivers/isdn/hisax/hfc_usb.c @@ -817,8 +817,8 @@ } /* we have a complete hdlc packet */ if (finish) { - if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) - && (fifo->skbuff->len > 3)) { + if (fifo->skbuff->len > 3 && + !fifo->skbuff->data[fifo->skbuff->len - 1]) { if (fifon == HFCUSB_D_RX) { DBG(HFCUSB_DBG_DCHANNEL, --- linux-fsl-imx51-2.6.31.orig/drivers/isdn/i4l/isdn_ppp.c +++ linux-fsl-imx51-2.6.31/drivers/isdn/i4l/isdn_ppp.c @@ -1535,10 +1535,8 @@ int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle); if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL ) return -ENOMEM; - for (i = 0; i < ISDN_MAX_CHANNELS; i++) { + for( i = 0; i < ISDN_MAX_CHANNELS; i++ ) spin_lock_init(&isdn_ppp_bundle_arr[i].lock); - skb_queue_head_init(&isdn_ppp_bundle_arr[i].frags); - } return 0; } @@ -1571,7 +1569,7 @@ if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL) return -ENOMEM; lp->next = lp->last = lp; /* nobody else in a queue */ - skb_queue_head_init(&lp->netdev->pb->frags); + lp->netdev->pb->frags = NULL; lp->netdev->pb->frames = 0; lp->netdev->pb->seq = UINT_MAX; } @@ -1583,29 +1581,28 @@ static u32 isdn_ppp_mp_get_seq( int short_seq, struct sk_buff * skb, u32 last_seq ); -static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, - struct sk_buff *to); -static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, - struct sk_buff *from, struct sk_buff *to, - u32 lastseq); -static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb); +static struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp, + struct sk_buff * from, struct sk_buff * to ); +static void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp, + struct sk_buff * from, struct sk_buff * to ); +static void isdn_ppp_mp_free_skb( ippp_bundle * mp, struct sk_buff * skb ); static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb ); static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, - struct sk_buff *skb) + struct sk_buff *skb) { - struct sk_buff *newfrag, *frag, *start, *nextf; - u32 newseq, minseq, thisseq; - isdn_mppp_stats *stats; struct ippp_struct *is; + isdn_net_local * lpq; + ippp_bundle * mp; + isdn_mppp_stats * stats; + struct sk_buff * newfrag, * frag, * start, *nextf; + u32 newseq, minseq, thisseq; unsigned long flags; - isdn_net_local *lpq; - ippp_bundle *mp; int slot; spin_lock_irqsave(&net_dev->pb->lock, flags); - mp = net_dev->pb; - stats = &mp->stats; + mp = net_dev->pb; + stats = &mp->stats; slot = lp->ppp_slot; if (slot < 0 || slot >= ISDN_MAX_CHANNELS) { printk(KERN_ERR "%s: lp->ppp_slot(%d)\n", @@ -1616,19 +1613,20 @@ return; } is = ippp_table[slot]; - if (++mp->frames > stats->max_queue_len) + if( ++mp->frames > stats->max_queue_len ) stats->max_queue_len = mp->frames; if (is->debug & 0x8) isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb); newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ, - skb, is->last_link_seqno); + skb, is->last_link_seqno); + /* if this packet seq # is less than last already processed one, * toss it right away, but check for sequence start case first */ - if (mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT)) { + if( mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT) ) { mp->seq = newseq; /* the first packet: required for * rfc1990 non-compliant clients -- * prevents constant packet toss */ @@ -1659,31 +1657,22 @@ * packets */ newfrag = skb; - /* Insert new fragment into the proper sequence slot. */ - skb_queue_walk(&mp->frags, frag) { - if (MP_SEQ(frag) == newseq) { - isdn_ppp_mp_free_skb(mp, newfrag); - newfrag = NULL; - break; - } - if (MP_LT(newseq, MP_SEQ(frag))) { - __skb_queue_before(&mp->frags, frag, newfrag); - newfrag = NULL; - break; - } - } - if (newfrag) - __skb_queue_tail(&mp->frags, newfrag); + /* if this new fragment is before the first one, then enqueue it now. */ + if ((frag = mp->frags) == NULL || MP_LT(newseq, MP_SEQ(frag))) { + newfrag->next = frag; + mp->frags = frag = newfrag; + newfrag = NULL; + } - frag = skb_peek(&mp->frags); - start = ((MP_FLAGS(frag) & MP_BEGIN_FRAG) && - (MP_SEQ(frag) == mp->seq)) ? frag : NULL; - if (!start) - goto check_overflow; + start = MP_FLAGS(frag) & MP_BEGIN_FRAG && + MP_SEQ(frag) == mp->seq ? frag : NULL; - /* main fragment traversing loop + /* + * main fragment traversing loop * * try to accomplish several tasks: + * - insert new fragment into the proper sequence slot (once that's done + * newfrag will be set to NULL) * - reassemble any complete fragment sequence (non-null 'start' * indicates there is a continguous sequence present) * - discard any incomplete sequences that are below minseq -- due @@ -1692,46 +1681,71 @@ * come to complete such sequence and it should be discarded * * loop completes when we accomplished the following tasks: + * - new fragment is inserted in the proper sequence ('newfrag' is + * set to NULL) * - we hit a gap in the sequence, so no reassembly/processing is * possible ('start' would be set to NULL) * * algorithm for this code is derived from code in the book * 'PPP Design And Debugging' by James Carlson (Addison-Wesley) */ - skb_queue_walk_safe(&mp->frags, frag, nextf) { - thisseq = MP_SEQ(frag); + while (start != NULL || newfrag != NULL) { + + thisseq = MP_SEQ(frag); + nextf = frag->next; - /* check for misplaced start */ - if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { - printk(KERN_WARNING"isdn_mppp(seq %d): new " - "BEGIN flag with no prior END", thisseq); - stats->seqerrs++; - stats->frame_drops++; - isdn_ppp_mp_discard(mp, start, frag); - start = frag; - } else if (MP_LE(thisseq, minseq)) { - if (MP_FLAGS(frag) & MP_BEGIN_FRAG) + /* drop any duplicate fragments */ + if (newfrag != NULL && thisseq == newseq) { + isdn_ppp_mp_free_skb(mp, newfrag); + newfrag = NULL; + } + + /* insert new fragment before next element if possible. */ + if (newfrag != NULL && (nextf == NULL || + MP_LT(newseq, MP_SEQ(nextf)))) { + newfrag->next = nextf; + frag->next = nextf = newfrag; + newfrag = NULL; + } + + if (start != NULL) { + /* check for misplaced start */ + if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { + printk(KERN_WARNING"isdn_mppp(seq %d): new " + "BEGIN flag with no prior END", thisseq); + stats->seqerrs++; + stats->frame_drops++; + start = isdn_ppp_mp_discard(mp, start,frag); + nextf = frag->next; + } + } else if (MP_LE(thisseq, minseq)) { + if (MP_FLAGS(frag) & MP_BEGIN_FRAG) start = frag; - else { + else { if (MP_FLAGS(frag) & MP_END_FRAG) - stats->frame_drops++; - __skb_unlink(skb, &mp->frags); + stats->frame_drops++; + if( mp->frags == frag ) + mp->frags = nextf; isdn_ppp_mp_free_skb(mp, frag); + frag = nextf; continue; - } + } } - /* if we have end fragment, then we have full reassembly - * sequence -- reassemble and process packet now + /* if start is non-null and we have end fragment, then + * we have full reassembly sequence -- reassemble + * and process packet now */ - if (MP_FLAGS(frag) & MP_END_FRAG) { - minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; - /* Reassemble the packet then dispatch it */ - isdn_ppp_mp_reassembly(net_dev, lp, start, frag, thisseq); + if (start != NULL && (MP_FLAGS(frag) & MP_END_FRAG)) { + minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; + /* Reassemble the packet then dispatch it */ + isdn_ppp_mp_reassembly(net_dev, lp, start, nextf); - start = NULL; - frag = NULL; - } + start = NULL; + frag = NULL; + + mp->frags = nextf; + } /* check if need to update start pointer: if we just * reassembled the packet and sequence is contiguous @@ -1742,25 +1756,26 @@ * below low watermark and set start to the next frag or * clear start ptr. */ - if (nextf != (struct sk_buff *)&mp->frags && + if (nextf != NULL && ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) { - /* if we just reassembled and the next one is here, - * then start another reassembly. - */ - if (frag == NULL) { + /* if we just reassembled and the next one is here, + * then start another reassembly. */ + + if (frag == NULL) { if (MP_FLAGS(nextf) & MP_BEGIN_FRAG) - start = nextf; - else { - printk(KERN_WARNING"isdn_mppp(seq %d):" - " END flag with no following " - "BEGIN", thisseq); + start = nextf; + else + { + printk(KERN_WARNING"isdn_mppp(seq %d):" + " END flag with no following " + "BEGIN", thisseq); stats->seqerrs++; } } - } else { - if (nextf != (struct sk_buff *)&mp->frags && - frag != NULL && - MP_LT(thisseq, minseq)) { + + } else { + if ( nextf != NULL && frag != NULL && + MP_LT(thisseq, minseq)) { /* we've got a break in the sequence * and we not at the end yet * and we did not just reassembled @@ -1769,39 +1784,41 @@ * discard all the frames below low watermark * and start over */ stats->frame_drops++; - isdn_ppp_mp_discard(mp, start, nextf); + mp->frags = isdn_ppp_mp_discard(mp,start,nextf); } /* break in the sequence, no reassembly */ - start = NULL; - } - if (!start) - break; - } + start = NULL; + } + + frag = nextf; + } /* while -- main loop */ + + if (mp->frags == NULL) + mp->frags = frag; -check_overflow: /* rather straighforward way to deal with (not very) possible - * queue overflow - */ + * queue overflow */ if (mp->frames > MP_MAX_QUEUE_LEN) { stats->overflows++; - skb_queue_walk_safe(&mp->frags, frag, nextf) { - if (mp->frames <= MP_MAX_QUEUE_LEN) - break; - __skb_unlink(frag, &mp->frags); - isdn_ppp_mp_free_skb(mp, frag); + while (mp->frames > MP_MAX_QUEUE_LEN) { + frag = mp->frags->next; + isdn_ppp_mp_free_skb(mp, mp->frags); + mp->frags = frag; } } spin_unlock_irqrestore(&mp->lock, flags); } -static void isdn_ppp_mp_cleanup(isdn_net_local *lp) +static void isdn_ppp_mp_cleanup( isdn_net_local * lp ) { - struct sk_buff *skb, *tmp; - - skb_queue_walk_safe(&lp->netdev->pb->frags, skb, tmp) { - __skb_unlink(skb, &lp->netdev->pb->frags); - isdn_ppp_mp_free_skb(lp->netdev->pb, skb); + struct sk_buff * frag = lp->netdev->pb->frags; + struct sk_buff * nextfrag; + while( frag ) { + nextfrag = frag->next; + isdn_ppp_mp_free_skb(lp->netdev->pb, frag); + frag = nextfrag; } + lp->netdev->pb->frags = NULL; } static u32 isdn_ppp_mp_get_seq( int short_seq, @@ -1838,115 +1855,72 @@ return seq; } -static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, - struct sk_buff *to) +struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp, + struct sk_buff * from, struct sk_buff * to ) { - if (from) { - struct sk_buff *skb, *tmp; - int freeing = 0; - - skb_queue_walk_safe(&mp->frags, skb, tmp) { - if (skb == to) - break; - if (skb == from) - freeing = 1; - if (!freeing) - continue; - __skb_unlink(skb, &mp->frags); - isdn_ppp_mp_free_skb(mp, skb); + if( from ) + while (from != to) { + struct sk_buff * next = from->next; + isdn_ppp_mp_free_skb(mp, from); + from = next; } - } + return from; } -static unsigned int calc_tot_len(struct sk_buff_head *queue, - struct sk_buff *from, struct sk_buff *to) +void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp, + struct sk_buff * from, struct sk_buff * to ) { - unsigned int tot_len = 0; - struct sk_buff *skb; - int found_start = 0; - - skb_queue_walk(queue, skb) { - if (skb == from) - found_start = 1; - if (!found_start) - continue; - tot_len += skb->len - MP_HEADER_LEN; - if (skb == to) - break; - } - return tot_len; -} - -/* Reassemble packet using fragments in the reassembly queue from - * 'from' until 'to', inclusive. - */ -static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, - struct sk_buff *from, struct sk_buff *to, - u32 lastseq) -{ - ippp_bundle *mp = net_dev->pb; - unsigned int tot_len; - struct sk_buff *skb; + ippp_bundle * mp = net_dev->pb; int proto; + struct sk_buff * skb; + unsigned int tot_len; if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) { printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n", __func__, lp->ppp_slot); return; } - - tot_len = calc_tot_len(&mp->frags, from, to); - - if (MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG)) { - if (ippp_table[lp->ppp_slot]->debug & 0x40) + if( MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG) ) { + if( ippp_table[lp->ppp_slot]->debug & 0x40 ) printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, " - "len %d\n", MP_SEQ(from), from->len); + "len %d\n", MP_SEQ(from), from->len ); skb = from; skb_pull(skb, MP_HEADER_LEN); - __skb_unlink(skb, &mp->frags); mp->frames--; } else { - struct sk_buff *walk, *tmp; - int found_start = 0; + struct sk_buff * frag; + int n; - if (ippp_table[lp->ppp_slot]->debug & 0x40) - printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " - "to %d, len %d\n", MP_SEQ(from), lastseq, - tot_len); + for(tot_len=n=0, frag=from; frag != to; frag=frag->next, n++) + tot_len += frag->len - MP_HEADER_LEN; - skb = dev_alloc_skb(tot_len); - if (!skb) + if( ippp_table[lp->ppp_slot]->debug & 0x40 ) + printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " + "to %d, len %d\n", MP_SEQ(from), + (MP_SEQ(from)+n-1) & MP_LONGSEQ_MASK, tot_len ); + if( (skb = dev_alloc_skb(tot_len)) == NULL ) { printk(KERN_ERR "isdn_mppp: cannot allocate sk buff " - "of size %d\n", tot_len); - - found_start = 0; - skb_queue_walk_safe(&mp->frags, walk, tmp) { - if (walk == from) - found_start = 1; - if (!found_start) - continue; + "of size %d\n", tot_len); + isdn_ppp_mp_discard(mp, from, to); + return; + } - if (skb) { - unsigned int len = walk->len - MP_HEADER_LEN; - skb_copy_from_linear_data_offset(walk, MP_HEADER_LEN, - skb_put(skb, len), - len); - } - __skb_unlink(walk, &mp->frags); - isdn_ppp_mp_free_skb(mp, walk); + while( from != to ) { + unsigned int len = from->len - MP_HEADER_LEN; - if (walk == to) - break; + skb_copy_from_linear_data_offset(from, MP_HEADER_LEN, + skb_put(skb,len), + len); + frag = from->next; + isdn_ppp_mp_free_skb(mp, from); + from = frag; } } - if (!skb) - return; - proto = isdn_ppp_strip_proto(skb); isdn_ppp_push_higher(net_dev, lp, skb, proto); } -static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb) +static void isdn_ppp_mp_free_skb(ippp_bundle * mp, struct sk_buff * skb) { dev_kfree_skb(skb); mp->frames--; --- linux-fsl-imx51-2.6.31.orig/drivers/isdn/gigaset/interface.c +++ linux-fsl-imx51-2.6.31/drivers/isdn/gigaset/interface.c @@ -408,33 +408,28 @@ return retval; } -/* FIXME: This function does not have error returns */ - static int if_chars_in_buffer(struct tty_struct *tty) { struct cardstate *cs; - int retval = -ENODEV; + int retval = 0; cs = (struct cardstate *) tty->driver_data; if (!cs) { pr_err("%s: no cardstate\n", __func__); - return -ENODEV; + return 0; } gig_dbg(DEBUG_IF, "%u: %s()", cs->minor_index, __func__); - if (mutex_lock_interruptible(&cs->mutex)) - return -ERESTARTSYS; // FIXME -EINTR? + mutex_lock(&cs->mutex); - if (!cs->connected) { + if (!cs->connected) gig_dbg(DEBUG_IF, "not connected"); - retval = -ENODEV; - } else if (!cs->open_count) + else if (!cs->open_count) dev_warn(cs->dev, "%s: device not opened\n", __func__); - else if (cs->mstate != MS_LOCKED) { + else if (cs->mstate != MS_LOCKED) dev_warn(cs->dev, "can't write to unlocked device\n"); - retval = -EBUSY; - } else + else retval = cs->ops->chars_in_buffer(cs); mutex_unlock(&cs->mutex); --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-exception-store.h +++ linux-fsl-imx51-2.6.31/drivers/md/dm-exception-store.h @@ -101,9 +101,9 @@ struct dm_dev *cow; /* Size of data blocks saved - must be a power of 2 */ - chunk_t chunk_size; - chunk_t chunk_mask; - chunk_t chunk_shift; + unsigned chunk_size; + unsigned chunk_mask; + unsigned chunk_shift; void *context; }; @@ -169,7 +169,7 @@ int dm_exception_store_type_unregister(struct dm_exception_store_type *type); int dm_exception_store_set_chunk_size(struct dm_exception_store *store, - unsigned long chunk_size_ulong, + unsigned chunk_size, char **error); int dm_exception_store_create(struct dm_target *ti, int argc, char **argv, --- linux-fsl-imx51-2.6.31.orig/drivers/md/bitmap.c +++ linux-fsl-imx51-2.6.31/drivers/md/bitmap.c @@ -1077,23 +1077,31 @@ * out to disk */ -void bitmap_daemon_work(struct bitmap *bitmap) +void bitmap_daemon_work(mddev_t *mddev) { + struct bitmap *bitmap; unsigned long j; unsigned long flags; struct page *page = NULL, *lastpage = NULL; int blocks; void *paddr; - if (bitmap == NULL) + /* Use a mutex to guard daemon_work against + * bitmap_destroy. + */ + mutex_lock(&mddev->bitmap_mutex); + bitmap = mddev->bitmap; + if (bitmap == NULL) { + mutex_unlock(&mddev->bitmap_mutex); return; + } if (time_before(jiffies, bitmap->daemon_lastrun + bitmap->daemon_sleep*HZ)) goto done; bitmap->daemon_lastrun = jiffies; if (bitmap->allclean) { bitmap->mddev->thread->timeout = MAX_SCHEDULE_TIMEOUT; - return; + goto done; } bitmap->allclean = 1; @@ -1202,6 +1210,7 @@ done: if (bitmap->allclean == 0) bitmap->mddev->thread->timeout = bitmap->daemon_sleep * HZ; + mutex_unlock(&mddev->bitmap_mutex); } static bitmap_counter_t *bitmap_get_counter(struct bitmap *bitmap, @@ -1538,9 +1547,9 @@ */ sleep = bitmap->daemon_sleep; bitmap->daemon_sleep = 0; - bitmap_daemon_work(bitmap); - bitmap_daemon_work(bitmap); - bitmap_daemon_work(bitmap); + bitmap_daemon_work(mddev); + bitmap_daemon_work(mddev); + bitmap_daemon_work(mddev); bitmap->daemon_sleep = sleep; bitmap_update_sb(bitmap); } @@ -1571,6 +1580,7 @@ kfree(bp); kfree(bitmap); } + void bitmap_destroy(mddev_t *mddev) { struct bitmap *bitmap = mddev->bitmap; @@ -1578,7 +1588,9 @@ if (!bitmap) /* there was no bitmap */ return; + mutex_lock(&mddev->bitmap_mutex); mddev->bitmap = NULL; /* disconnect from the md device */ + mutex_unlock(&mddev->bitmap_mutex); if (mddev->thread) mddev->thread->timeout = MAX_SCHEDULE_TIMEOUT; --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-snap-persistent.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm-snap-persistent.c @@ -284,12 +284,13 @@ { int r; struct disk_header *dh; - chunk_t chunk_size; + unsigned chunk_size; int chunk_size_supplied = 1; char *chunk_err; /* - * Use default chunk size (or hardsect_size, if larger) if none supplied + * Use default chunk size (or logical_block_size, if larger) + * if none supplied */ if (!ps->store->chunk_size) { ps->store->chunk_size = max(DM_CHUNK_SIZE_DEFAULT_SECTORS, @@ -334,10 +335,9 @@ return 0; if (chunk_size_supplied) - DMWARN("chunk size %llu in device metadata overrides " - "table chunk size of %llu.", - (unsigned long long)chunk_size, - (unsigned long long)ps->store->chunk_size); + DMWARN("chunk size %u in device metadata overrides " + "table chunk size of %u.", + chunk_size, ps->store->chunk_size); /* We had a bogus chunk_size. Fix stuff up. */ free_area(ps); @@ -345,8 +345,8 @@ r = dm_exception_store_set_chunk_size(ps->store, chunk_size, &chunk_err); if (r) { - DMERR("invalid on-disk chunk size %llu: %s.", - (unsigned long long)chunk_size, chunk_err); + DMERR("invalid on-disk chunk size %u: %s.", + chunk_size, chunk_err); return r; } --- linux-fsl-imx51-2.6.31.orig/drivers/md/md.h +++ linux-fsl-imx51-2.6.31/drivers/md/md.h @@ -289,6 +289,7 @@ * hot-adding a bitmap. It should * eventually be settable by sysfs. */ + struct mutex bitmap_mutex; struct list_head all_mddevs; }; --- linux-fsl-imx51-2.6.31.orig/drivers/md/raid1.c +++ linux-fsl-imx51-2.6.31/drivers/md/raid1.c @@ -1643,11 +1643,12 @@ r1_bio->sector, r1_bio->sectors); unfreeze_array(conf); - } + } else + md_error(mddev, + conf->mirrors[r1_bio->read_disk].rdev); bio = r1_bio->bios[r1_bio->read_disk]; - if ((disk=read_balance(conf, r1_bio)) == -1 || - disk == r1_bio->read_disk) { + if ((disk=read_balance(conf, r1_bio)) == -1) { printk(KERN_ALERT "raid1: %s: unrecoverable I/O" " read error for block %llu\n", bdevname(bio->bi_bdev,b), @@ -1676,6 +1677,7 @@ generic_make_request(bio); } } + cond_resched(); } if (unplug) unplug_slaves(mddev); --- linux-fsl-imx51-2.6.31.orig/drivers/md/raid5.c +++ linux-fsl-imx51-2.6.31/drivers/md/raid5.c @@ -3790,6 +3790,8 @@ sector_nr = conf->reshape_progress; sector_div(sector_nr, new_data_disks); if (sector_nr) { + mddev->curr_resync_completed = sector_nr; + sysfs_notify(&mddev->kobj, NULL, "sync_completed"); *skipped = 1; return sector_nr; } --- linux-fsl-imx51-2.6.31.orig/drivers/md/bitmap.h +++ linux-fsl-imx51-2.6.31/drivers/md/bitmap.h @@ -282,7 +282,7 @@ void bitmap_cond_end_sync(struct bitmap *bitmap, sector_t sector); void bitmap_unplug(struct bitmap *bitmap); -void bitmap_daemon_work(struct bitmap *bitmap); +void bitmap_daemon_work(mddev_t *mddev); #endif #endif --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-log-userspace-base.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm-log-userspace-base.c @@ -156,7 +156,7 @@ } /* The ptr value is sufficient for local unique id */ - lc->luid = (uint64_t)lc; + lc->luid = (unsigned long)lc; lc->ti = ti; @@ -582,7 +582,7 @@ break; case STATUSTYPE_TABLE: sz = 0; - table_args = strstr(lc->usr_argv_str, " "); + table_args = strchr(lc->usr_argv_str, ' '); BUG_ON(!table_args); /* There will always be a ' ' */ table_args++; --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-log-userspace-transfer.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm-log-userspace-transfer.c @@ -129,11 +129,13 @@ * This is the connector callback that delivers data * that was sent from userspace. */ -static void cn_ulog_callback(void *data) +static void cn_ulog_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { - struct cn_msg *msg = (struct cn_msg *)data; struct dm_ulog_request *tfr = (struct dm_ulog_request *)(msg + 1); + if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) + return; + spin_lock(&receiving_list_lock); if (msg->len == 0) fill_pkg(msg, NULL); --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm.c @@ -47,6 +47,7 @@ atomic_t io_count; struct bio *bio; unsigned long start_time; + spinlock_t endio_lock; }; /* @@ -576,8 +577,12 @@ struct mapped_device *md = io->md; /* Push-back supersedes any I/O errors */ - if (error && !(io->error > 0 && __noflush_suspending(md))) - io->error = error; + if (unlikely(error)) { + spin_lock_irqsave(&io->endio_lock, flags); + if (!(io->error > 0 && __noflush_suspending(md))) + io->error = error; + spin_unlock_irqrestore(&io->endio_lock, flags); + } if (atomic_dec_and_test(&io->io_count)) { if (io->error == DM_ENDIO_REQUEUE) { @@ -1224,6 +1229,7 @@ atomic_set(&ci.io->io_count, 1); ci.io->bio = bio; ci.io->md = md; + spin_lock_init(&ci.io->endio_lock); ci.sector = bio->bi_sector; ci.sector_count = bio_sectors(bio); if (unlikely(bio_empty_barrier(bio))) @@ -1819,6 +1825,7 @@ bad_bdev: destroy_workqueue(md->wq); bad_thread: + del_gendisk(md->disk); put_disk(md->disk); bad_disk: blk_cleanup_queue(md->queue); @@ -2562,6 +2569,7 @@ { return md->disk; } +EXPORT_SYMBOL_GPL(dm_disk); struct kobject *dm_kobject(struct mapped_device *md) { --- linux-fsl-imx51-2.6.31.orig/drivers/md/raid10.c +++ linux-fsl-imx51-2.6.31/drivers/md/raid10.c @@ -1630,6 +1630,7 @@ generic_make_request(bio); } } + cond_resched(); } if (unplug) unplug_slaves(mddev); --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-snap.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm-snap.c @@ -296,6 +296,7 @@ */ static int register_snapshot(struct dm_snapshot *snap) { + struct dm_snapshot *l; struct origin *o, *new_o; struct block_device *bdev = snap->origin->bdev; @@ -319,7 +320,11 @@ __insert_origin(o); } - list_add_tail(&snap->list, &o->snapshots); + /* Sort the list according to chunk size, largest-first smallest-last */ + list_for_each_entry(l, &o->snapshots, list) + if (l->store->chunk_size < snap->store->chunk_size) + break; + list_add_tail(&snap->list, &l->list); up_write(&_origins_lock); return 0; @@ -668,6 +673,11 @@ bio_list_init(&s->queued_bios); INIT_WORK(&s->queued_bios_work, flush_queued_bios); + if (!s->store->chunk_size) { + ti->error = "Chunk size not set"; + goto bad_load_and_register; + } + /* Add snapshot to the list of snapshots for this origin */ /* Exceptions aren't triggered till snapshot_resume() is called */ if (register_snapshot(s)) { @@ -951,7 +961,7 @@ src.bdev = bdev; src.sector = chunk_to_sector(s->store, pe->e.old_chunk); - src.count = min(s->store->chunk_size, dev_size - src.sector); + src.count = min((sector_t)s->store->chunk_size, dev_size - src.sector); dest.bdev = s->store->cow->bdev; dest.sector = chunk_to_sector(s->store, pe->e.new_chunk); @@ -1142,6 +1152,8 @@ unsigned sz = 0; struct dm_snapshot *snap = ti->private; + down_write(&snap->lock); + switch (type) { case STATUSTYPE_INFO: if (!snap->valid) @@ -1173,6 +1185,8 @@ break; } + up_write(&snap->lock); + return 0; } @@ -1388,7 +1402,7 @@ struct dm_dev *dev = ti->private; struct dm_snapshot *snap; struct origin *o; - chunk_t chunk_size = 0; + unsigned chunk_size = 0; down_read(&_origins_lock); o = __lookup_origin(dev->bdev); @@ -1465,7 +1479,7 @@ r = dm_register_target(&snapshot_target); if (r) { DMERR("snapshot target register failed %d", r); - return r; + goto bad_register_snapshot_target; } r = dm_register_target(&origin_target); @@ -1522,6 +1536,9 @@ dm_unregister_target(&origin_target); bad1: dm_unregister_target(&snapshot_target); + +bad_register_snapshot_target: + dm_exception_store_exit(); return r; } --- linux-fsl-imx51-2.6.31.orig/drivers/md/dm-exception-store.c +++ linux-fsl-imx51-2.6.31/drivers/md/dm-exception-store.c @@ -155,7 +155,8 @@ char *value; chunk_size_ulong = simple_strtoul(chunk_size_arg, &value, 10); - if (*chunk_size_arg == '\0' || *value != '\0') { + if (*chunk_size_arg == '\0' || *value != '\0' || + chunk_size_ulong > UINT_MAX) { *error = "Invalid chunk size"; return -EINVAL; } @@ -171,34 +172,35 @@ */ chunk_size_ulong = round_up(chunk_size_ulong, PAGE_SIZE >> 9); - return dm_exception_store_set_chunk_size(store, chunk_size_ulong, + return dm_exception_store_set_chunk_size(store, + (unsigned) chunk_size_ulong, error); } int dm_exception_store_set_chunk_size(struct dm_exception_store *store, - unsigned long chunk_size_ulong, + unsigned chunk_size, char **error) { /* Check chunk_size is a power of 2 */ - if (!is_power_of_2(chunk_size_ulong)) { + if (!is_power_of_2(chunk_size)) { *error = "Chunk size is not a power of 2"; return -EINVAL; } /* Validate the chunk size against the device block size */ - if (chunk_size_ulong % (bdev_logical_block_size(store->cow->bdev) >> 9)) { + if (chunk_size % (bdev_logical_block_size(store->cow->bdev) >> 9)) { *error = "Chunk size is not a multiple of device blocksize"; return -EINVAL; } - if (chunk_size_ulong > INT_MAX >> SECTOR_SHIFT) { + if (chunk_size > INT_MAX >> SECTOR_SHIFT) { *error = "Chunk size is too high"; return -EINVAL; } - store->chunk_size = chunk_size_ulong; - store->chunk_mask = chunk_size_ulong - 1; - store->chunk_shift = ffs(chunk_size_ulong) - 1; + store->chunk_size = chunk_size; + store->chunk_mask = chunk_size - 1; + store->chunk_shift = ffs(chunk_size) - 1; return 0; } @@ -251,7 +253,7 @@ r = set_chunk_size(tmp_store, argv[2], &ti->error); if (r) - goto bad_cow; + goto bad_ctr; r = type->ctr(tmp_store, 0, NULL); if (r) { --- linux-fsl-imx51-2.6.31.orig/drivers/md/md.c +++ linux-fsl-imx51-2.6.31/drivers/md/md.c @@ -276,7 +276,9 @@ if (!atomic_dec_and_lock(&mddev->active, &all_mddevs_lock)) return; if (!mddev->raid_disks && list_empty(&mddev->disks) && - !mddev->hold_active) { + mddev->ctime == 0 && !mddev->hold_active) { + /* Array is not configured at all, and not held active, + * so destroy it */ list_del(&mddev->all_mddevs); if (mddev->gendisk) { /* we did a probe so need to clean up. @@ -361,6 +363,7 @@ mutex_init(&new->open_mutex); mutex_init(&new->reconfig_mutex); + mutex_init(&new->bitmap_mutex); INIT_LIST_HEAD(&new->disks); INIT_LIST_HEAD(&new->all_mddevs); init_timer(&new->safemode_timer); @@ -5039,6 +5042,10 @@ mddev->minor_version = info->minor_version; mddev->patch_version = info->patch_version; mddev->persistent = !info->not_persistent; + /* ensure mddev_put doesn't delete this now that there + * is some minimal configuration. + */ + mddev->ctime = get_seconds(); return 0; } mddev->major_version = MD_MAJOR_VERSION; @@ -6495,8 +6502,9 @@ skip: mddev->curr_resync = 0; mddev->curr_resync_completed = 0; - mddev->resync_min = 0; - mddev->resync_max = MaxSector; + if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) + /* We completed so max setting can be forgotten. */ + mddev->resync_max = MaxSector; sysfs_notify(&mddev->kobj, NULL, "sync_completed"); wake_up(&resync_wait); set_bit(MD_RECOVERY_DONE, &mddev->recovery); @@ -6594,7 +6602,7 @@ if (mddev->bitmap) - bitmap_daemon_work(mddev->bitmap); + bitmap_daemon_work(mddev); if (mddev->ro) return; --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/Kconfig @@ -0,0 +1,39 @@ +# drivers/video/mxc/Kconfig + +if ARCH_MXC + +menu "MXC support drivers" + +config MXC_IPU + bool "Image Processing Unit Driver" + depends on !ARCH_MX21 + depends on !ARCH_MX27 + depends on !ARCH_MX25 + select MXC_IPU_V1 if !ARCH_MX37 && !ARCH_MX51 + select MXC_IPU_V3 if ARCH_MX37 || ARCH_MX51 + select MXC_IPU_V3D if ARCH_MX37 + select MXC_IPU_V3EX if ARCH_MX51 + help + If you plan to use the Image Processing unit, say + Y here. IPU is needed by Framebuffer and V4L2 drivers. + +source "drivers/mxc/ipu/Kconfig" +source "drivers/mxc/ipu3/Kconfig" + +source "drivers/mxc/ssi/Kconfig" +source "drivers/mxc/dam/Kconfig" +source "drivers/mxc/pmic/Kconfig" +source "drivers/mxc/mcu_pmic/Kconfig" +source "drivers/mxc/security/Kconfig" +source "drivers/mxc/hmp4e/Kconfig" +source "drivers/mxc/hw_event/Kconfig" +source "drivers/mxc/vpu/Kconfig" +source "drivers/mxc/asrc/Kconfig" +source "drivers/mxc/bt/Kconfig" +source "drivers/mxc/gps_ioctrl/Kconfig" +source "drivers/mxc/mlb/Kconfig" +source "drivers/mxc/adc/Kconfig" + +endmenu + +endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/Makefile @@ -0,0 +1,17 @@ +obj-$(CONFIG_MXC_IPU_V1) += ipu/ +obj-$(CONFIG_MXC_IPU_V3) += ipu3/ +obj-$(CONFIG_MXC_SSI) += ssi/ +obj-$(CONFIG_MXC_DAM) += dam/ + +obj-$(CONFIG_MXC_PMIC_MC9SDZ60) += mcu_pmic/ +obj-$(CONFIG_MXC_PMIC) += pmic/ + +obj-$(CONFIG_MXC_HMP4E) += hmp4e/ +obj-y += security/ +obj-$(CONFIG_MXC_VPU) += vpu/ +obj-$(CONFIG_MXC_HWEVENT) += hw_event/ +obj-$(CONFIG_MXC_ASRC) += asrc/ +obj-$(CONFIG_MXC_BLUETOOTH) += bt/ +obj-$(CONFIG_GPS_IOCTRL) += gps_ioctrl/ +obj-$(CONFIG_MXC_MLB) += mlb/ +obj-$(CONFIG_IMX_ADC) += adc/ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_capture.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_capture.c @@ -0,0 +1,711 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_capture.c + * + * @brief IPU capture dase functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" + +/*! + * ipu_csi_init_interface + * Sets initial values for the CSI registers. + * The width and height of the sensor and the actual frame size will be + * set to the same values. + * @param width Sensor width + * @param height Sensor height + * @param pixel_fmt pixel format + * @param cfg_param ipu_csi_signal_cfg_t structure + * @param csi csi 0 or csi 1 + * + * @return 0 for success, -EINVAL for error + */ +int32_t +ipu_csi_init_interface(uint16_t width, uint16_t height, uint32_t pixel_fmt, + ipu_csi_signal_cfg_t cfg_param) +{ + uint32_t data = 0; + uint32_t csi = cfg_param.csi; + unsigned long lock_flags; + + /* Set SENS_DATA_FORMAT bits (8, 9 and 10) + RGB or YUV444 is 0 which is current value in data so not set + explicitly + This is also the default value if attempts are made to set it to + something invalid. */ + switch (pixel_fmt) { + case IPU_PIX_FMT_YUYV: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV; + break; + case IPU_PIX_FMT_UYVY: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY; + break; + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_BGR24: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB_YUV444; + break; + case IPU_PIX_FMT_GENERIC: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; + break; + case IPU_PIX_FMT_RGB565: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565; + break; + case IPU_PIX_FMT_RGB555: + cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB555; + break; + default: + return -EINVAL; + } + + /* Set the CSI_SENS_CONF register remaining fields */ + data |= cfg_param.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT | + cfg_param.data_fmt << CSI_SENS_CONF_DATA_FMT_SHIFT | + cfg_param.data_pol << CSI_SENS_CONF_DATA_POL_SHIFT | + cfg_param.Vsync_pol << CSI_SENS_CONF_VSYNC_POL_SHIFT | + cfg_param.Hsync_pol << CSI_SENS_CONF_HSYNC_POL_SHIFT | + cfg_param.pixclk_pol << CSI_SENS_CONF_PIX_CLK_POL_SHIFT | + cfg_param.ext_vsync << CSI_SENS_CONF_EXT_VSYNC_SHIFT | + cfg_param.clk_mode << CSI_SENS_CONF_SENS_PRTCL_SHIFT | + cfg_param.pack_tight << CSI_SENS_CONF_PACK_TIGHT_SHIFT | + cfg_param.force_eof << CSI_SENS_CONF_FORCE_EOF_SHIFT | + cfg_param.data_en_pol << CSI_SENS_CONF_DATA_EN_POL_SHIFT; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + __raw_writel(data, CSI_SENS_CONF(csi)); + + /* Setup sensor frame size */ + __raw_writel((width - 1) | (height - 1) << 16, CSI_SENS_FRM_SIZE(csi)); + + /* Set CCIR registers */ + if ((cfg_param.clk_mode == IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE) || + (cfg_param.clk_mode == IPU_CSI_CLK_MODE_CCIR656_INTERLACED)) { + _ipu_csi_ccir_err_detection_enable(csi); + __raw_writel(0x40030, CSI_CCIR_CODE_1(csi)); + __raw_writel(0xFF0000, CSI_CCIR_CODE_3(csi)); + } else if ((cfg_param.clk_mode == + IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR) || + (cfg_param.clk_mode == + IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR) || + (cfg_param.clk_mode == + IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_DDR) || + (cfg_param.clk_mode == + IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_SDR)) { + _ipu_csi_ccir_err_detection_enable(csi); + __raw_writel(0x40030, CSI_CCIR_CODE_1(csi)); + __raw_writel(0xFF0000, CSI_CCIR_CODE_3(csi)); + } else if ((cfg_param.clk_mode == IPU_CSI_CLK_MODE_GATED_CLK) || + (cfg_param.clk_mode == IPU_CSI_CLK_MODE_NONGATED_CLK)) { + _ipu_csi_ccir_err_detection_disable(csi); + } + + dev_dbg(g_ipu_dev, "CSI_SENS_CONF = 0x%08X\n", + __raw_readl(CSI_SENS_CONF(csi))); + dev_dbg(g_ipu_dev, "CSI_ACT_FRM_SIZE = 0x%08X\n", + __raw_readl(CSI_ACT_FRM_SIZE(csi))); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} +EXPORT_SYMBOL(ipu_csi_init_interface); + +/*! _ipu_csi_mclk_set + * + * @param pixel_clk desired pixel clock frequency in Hz + * @param csi csi 0 or csi 1 + * + * @return Returns 0 on success or negative error code on fail + */ +int _ipu_csi_mclk_set(uint32_t pixel_clk, uint32_t csi) +{ + uint32_t temp; + uint32_t div_ratio; + + div_ratio = (clk_get_rate(g_ipu_clk) / pixel_clk) - 1; + + if (div_ratio > 0xFF || div_ratio < 0) { + dev_dbg(g_ipu_dev, "The value of pixel_clk extends normal range\n"); + return -EINVAL; + } + + temp = __raw_readl(CSI_SENS_CONF(csi)); + temp &= ~CSI_SENS_CONF_DIVRATIO_MASK; + __raw_writel(temp | (div_ratio << CSI_SENS_CONF_DIVRATIO_SHIFT), + CSI_SENS_CONF(csi)); + + return 0; +} + +/*! + * ipu_csi_enable_mclk + * + * @param csi csi 0 or csi 1 + * @param flag true to enable mclk, false to disable mclk + * @param wait true to wait 100ms make clock stable, false not wait + * + * @return Returns 0 on success + */ +int ipu_csi_enable_mclk(int csi, bool flag, bool wait) +{ + if (flag) { + clk_enable(g_csi_clk[csi]); + if (wait == true) + msleep(10); + } else + clk_disable(g_csi_clk[csi]); + + return 0; +} +EXPORT_SYMBOL(ipu_csi_enable_mclk); + +/*! + * ipu_csi_get_window_size + * + * @param width pointer to window width + * @param height pointer to window height + * @param csi csi 0 or csi 1 + */ +void ipu_csi_get_window_size(uint32_t *width, uint32_t *height, uint32_t csi) +{ + uint32_t reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(CSI_ACT_FRM_SIZE(csi)); + *width = (reg & 0xFFFF) + 1; + *height = (reg >> 16 & 0xFFFF) + 1; + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} +EXPORT_SYMBOL(ipu_csi_get_window_size); + +/*! + * ipu_csi_set_window_size + * + * @param width window width + * @param height window height + * @param csi csi 0 or csi 1 + */ +void ipu_csi_set_window_size(uint32_t width, uint32_t height, uint32_t csi) +{ + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + __raw_writel((width - 1) | (height - 1) << 16, CSI_ACT_FRM_SIZE(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} +EXPORT_SYMBOL(ipu_csi_set_window_size); + +/*! + * ipu_csi_set_window_pos + * + * @param left uint32 window x start + * @param top uint32 window y start + * @param csi csi 0 or csi 1 + */ +void ipu_csi_set_window_pos(uint32_t left, uint32_t top, uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_OUT_FRM_CTRL(csi)); + temp &= ~(CSI_HSC_MASK | CSI_VSC_MASK); + temp |= ((top << CSI_VSC_SHIFT) | (left << CSI_HSC_SHIFT)); + __raw_writel(temp, CSI_OUT_FRM_CTRL(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} +EXPORT_SYMBOL(ipu_csi_set_window_pos); + +/*! + * _ipu_csi_horizontal_downsize_enable + * Enable horizontal downsizing(decimation) by 2. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_horizontal_downsize_enable(uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_OUT_FRM_CTRL(csi)); + temp |= CSI_HORI_DOWNSIZE_EN; + __raw_writel(temp, CSI_OUT_FRM_CTRL(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * _ipu_csi_horizontal_downsize_disable + * Disable horizontal downsizing(decimation) by 2. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_horizontal_downsize_disable(uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_OUT_FRM_CTRL(csi)); + temp &= ~CSI_HORI_DOWNSIZE_EN; + __raw_writel(temp, CSI_OUT_FRM_CTRL(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * _ipu_csi_vertical_downsize_enable + * Enable vertical downsizing(decimation) by 2. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_vertical_downsize_enable(uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_OUT_FRM_CTRL(csi)); + temp |= CSI_VERT_DOWNSIZE_EN; + __raw_writel(temp, CSI_OUT_FRM_CTRL(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * _ipu_csi_vertical_downsize_disable + * Disable vertical downsizing(decimation) by 2. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_vertical_downsize_disable(uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_OUT_FRM_CTRL(csi)); + temp &= ~CSI_VERT_DOWNSIZE_EN; + __raw_writel(temp, CSI_OUT_FRM_CTRL(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * ipu_csi_set_test_generator + * + * @param active 1 for active and 0 for inactive + * @param r_value red value for the generated pattern of even pixel + * @param g_value green value for the generated pattern of even + * pixel + * @param b_value blue value for the generated pattern of even pixel + * @param pixel_clk desired pixel clock frequency in Hz + * @param csi csi 0 or csi 1 + */ +void ipu_csi_set_test_generator(bool active, uint32_t r_value, + uint32_t g_value, uint32_t b_value, uint32_t pix_clk, uint32_t csi) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_TST_CTRL(csi)); + + if (active == false) { + temp &= ~CSI_TEST_GEN_MODE_EN; + __raw_writel(temp, CSI_TST_CTRL(csi)); + } else { + /* Set sensb_mclk div_ratio*/ + _ipu_csi_mclk_set(pix_clk, csi); + + temp &= ~(CSI_TEST_GEN_R_MASK | CSI_TEST_GEN_G_MASK | + CSI_TEST_GEN_B_MASK); + temp |= CSI_TEST_GEN_MODE_EN; + temp |= (r_value << CSI_TEST_GEN_R_SHIFT) | + (g_value << CSI_TEST_GEN_G_SHIFT) | + (b_value << CSI_TEST_GEN_B_SHIFT); + __raw_writel(temp, CSI_TST_CTRL(csi)); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} +EXPORT_SYMBOL(ipu_csi_set_test_generator); + +/*! + * _ipu_csi_ccir_err_detection_en + * Enable error detection and correction for + * CCIR interlaced mode with protection bit. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_ccir_err_detection_enable(uint32_t csi) +{ + uint32_t temp; + + temp = __raw_readl(CSI_CCIR_CODE_1(csi)); + temp |= CSI_CCIR_ERR_DET_EN; + __raw_writel(temp, CSI_CCIR_CODE_1(csi)); +} + +/*! + * _ipu_csi_ccir_err_detection_disable + * Disable error detection and correction for + * CCIR interlaced mode with protection bit. + * + * @param csi csi 0 or csi 1 + */ +void _ipu_csi_ccir_err_detection_disable(uint32_t csi) +{ + uint32_t temp; + + temp = __raw_readl(CSI_CCIR_CODE_1(csi)); + temp &= ~CSI_CCIR_ERR_DET_EN; + __raw_writel(temp, CSI_CCIR_CODE_1(csi)); +} + +/*! + * _ipu_csi_set_mipi_di + * + * @param num MIPI data identifier 0-3 handled by CSI + * @param di_val data identifier value + * @param csi csi 0 or csi 1 + * + * @return Returns 0 on success or negative error code on fail + */ +int _ipu_csi_set_mipi_di(uint32_t num, uint32_t di_val, uint32_t csi) +{ + uint32_t temp; + int retval = 0; + unsigned long lock_flags; + + if (di_val > 0xFFL) { + retval = -EINVAL; + goto err; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_MIPI_DI(csi)); + + switch (num) { + case IPU_CSI_MIPI_DI0: + temp &= ~CSI_MIPI_DI0_MASK; + temp |= (di_val << CSI_MIPI_DI0_SHIFT); + __raw_writel(temp, CSI_MIPI_DI(csi)); + break; + case IPU_CSI_MIPI_DI1: + temp &= ~CSI_MIPI_DI1_MASK; + temp |= (di_val << CSI_MIPI_DI1_SHIFT); + __raw_writel(temp, CSI_MIPI_DI(csi)); + break; + case IPU_CSI_MIPI_DI2: + temp &= ~CSI_MIPI_DI2_MASK; + temp |= (di_val << CSI_MIPI_DI2_SHIFT); + __raw_writel(temp, CSI_MIPI_DI(csi)); + break; + case IPU_CSI_MIPI_DI3: + temp &= ~CSI_MIPI_DI3_MASK; + temp |= (di_val << CSI_MIPI_DI3_SHIFT); + __raw_writel(temp, CSI_MIPI_DI(csi)); + break; + default: + retval = -EINVAL; + goto err; + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +err: + return retval; +} + +/*! + * _ipu_csi_set_skip_isp + * + * @param skip select frames to be skipped and set the + * correspond bits to 1 + * @param max_ratio number of frames in a skipping set and the + * maximum value of max_ratio is 5 + * @param csi csi 0 or csi 1 + * + * @return Returns 0 on success or negative error code on fail + */ +int _ipu_csi_set_skip_isp(uint32_t skip, uint32_t max_ratio, uint32_t csi) +{ + uint32_t temp; + int retval = 0; + unsigned long lock_flags; + + if (max_ratio > 5) { + retval = -EINVAL; + goto err; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_SKIP(csi)); + temp &= ~(CSI_MAX_RATIO_SKIP_ISP_MASK | CSI_SKIP_ISP_MASK); + temp |= (max_ratio << CSI_MAX_RATIO_SKIP_ISP_SHIFT) | + (skip << CSI_SKIP_ISP_SHIFT); + __raw_writel(temp, CSI_SKIP(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +err: + return retval; +} + +/*! + * _ipu_csi_set_skip_smfc + * + * @param skip select frames to be skipped and set the + * correspond bits to 1 + * @param max_ratio number of frames in a skipping set and the + * maximum value of max_ratio is 5 + * @param id csi to smfc skipping id + * @param csi csi 0 or csi 1 + * + * @return Returns 0 on success or negative error code on fail + */ +int _ipu_csi_set_skip_smfc(uint32_t skip, uint32_t max_ratio, + uint32_t id, uint32_t csi) +{ + uint32_t temp; + int retval = 0; + unsigned long lock_flags; + + if (max_ratio > 5 || id > 3) { + retval = -EINVAL; + goto err; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(CSI_SKIP(csi)); + temp &= ~(CSI_MAX_RATIO_SKIP_SMFC_MASK | CSI_ID_2_SKIP_MASK | + CSI_SKIP_SMFC_MASK); + temp |= (max_ratio << CSI_MAX_RATIO_SKIP_SMFC_SHIFT) | + (id << CSI_ID_2_SKIP_SHIFT) | + (skip << CSI_SKIP_SMFC_SHIFT); + __raw_writel(temp, CSI_SKIP(csi)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +err: + return retval; +} + +/*! + * _ipu_smfc_init + * Map CSI frames to IDMAC channels. + * + * @param channel IDMAC channel 0-3 + * @param mipi_id mipi id number 0-3 + * @param csi csi0 or csi1 + */ +void _ipu_smfc_init(ipu_channel_t channel, uint32_t mipi_id, uint32_t csi) +{ + uint32_t temp; + + temp = __raw_readl(SMFC_MAP); + + switch (channel) { + case CSI_MEM0: + temp &= ~SMFC_MAP_CH0_MASK; + temp |= ((csi << 2) | mipi_id) << SMFC_MAP_CH0_SHIFT; + break; + case CSI_MEM1: + temp &= ~SMFC_MAP_CH1_MASK; + temp |= ((csi << 2) | mipi_id) << SMFC_MAP_CH1_SHIFT; + break; + case CSI_MEM2: + temp &= ~SMFC_MAP_CH2_MASK; + temp |= ((csi << 2) | mipi_id) << SMFC_MAP_CH2_SHIFT; + break; + case CSI_MEM3: + temp &= ~SMFC_MAP_CH3_MASK; + temp |= ((csi << 2) | mipi_id) << SMFC_MAP_CH3_SHIFT; + break; + default: + return; + } + + __raw_writel(temp, SMFC_MAP); +} + +/*! + * _ipu_smfc_set_wmc + * Caution: The number of required channels, the enabled channels + * and the FIFO size per channel are configured restrictedly. + * + * @param channel IDMAC channel 0-3 + * @param set set 1 or clear 0 + * @param level water mark level when FIFO is on the + * relative size + */ +void _ipu_smfc_set_wmc(ipu_channel_t channel, bool set, uint32_t level) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(SMFC_WMC); + + switch (channel) { + case CSI_MEM0: + if (set == true) { + temp &= ~SMFC_WM0_SET_MASK; + temp |= level << SMFC_WM0_SET_SHIFT; + } else { + temp &= ~SMFC_WM0_CLR_MASK; + temp |= level << SMFC_WM0_CLR_SHIFT; + } + break; + case CSI_MEM1: + if (set == true) { + temp &= ~SMFC_WM1_SET_MASK; + temp |= level << SMFC_WM1_SET_SHIFT; + } else { + temp &= ~SMFC_WM1_CLR_MASK; + temp |= level << SMFC_WM1_CLR_SHIFT; + } + break; + case CSI_MEM2: + if (set == true) { + temp &= ~SMFC_WM2_SET_MASK; + temp |= level << SMFC_WM2_SET_SHIFT; + } else { + temp &= ~SMFC_WM2_CLR_MASK; + temp |= level << SMFC_WM2_CLR_SHIFT; + } + break; + case CSI_MEM3: + if (set == true) { + temp &= ~SMFC_WM3_SET_MASK; + temp |= level << SMFC_WM3_SET_SHIFT; + } else { + temp &= ~SMFC_WM3_CLR_MASK; + temp |= level << SMFC_WM3_CLR_SHIFT; + } + break; + default: + return; + } + + __raw_writel(temp, SMFC_WMC); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * _ipu_smfc_set_burst_size + * + * @param channel IDMAC channel 0-3 + * @param bs burst size of IDMAC channel, + * the value programmed here shoud be BURST_SIZE-1 + */ +void _ipu_smfc_set_burst_size(ipu_channel_t channel, uint32_t bs) +{ + uint32_t temp; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + temp = __raw_readl(SMFC_BS); + + switch (channel) { + case CSI_MEM0: + temp &= ~SMFC_BS0_MASK; + temp |= bs << SMFC_BS0_SHIFT; + break; + case CSI_MEM1: + temp &= ~SMFC_BS1_MASK; + temp |= bs << SMFC_BS1_SHIFT; + break; + case CSI_MEM2: + temp &= ~SMFC_BS2_MASK; + temp |= bs << SMFC_BS2_SHIFT; + break; + case CSI_MEM3: + temp &= ~SMFC_BS3_MASK; + temp |= bs << SMFC_BS3_SHIFT; + break; + default: + return; + } + + __raw_writel(temp, SMFC_BS); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * _ipu_csi_init + * + * @param channel IDMAC channel + * @param csi csi 0 or csi 1 + * + * @return Returns 0 on success or negative error code on fail + */ +int _ipu_csi_init(ipu_channel_t channel, uint32_t csi) +{ + uint32_t csi_sens_conf, csi_dest; + int retval = 0; + + switch (channel) { + case CSI_MEM0: + case CSI_MEM1: + case CSI_MEM2: + case CSI_MEM3: + csi_dest = CSI_DATA_DEST_IDMAC; + break; + case CSI_PRP_ENC_MEM: + case CSI_PRP_VF_MEM: + csi_dest = CSI_DATA_DEST_IC; + break; + default: + retval = -EINVAL; + goto err; + } + + csi_sens_conf = __raw_readl(CSI_SENS_CONF(csi)); + csi_sens_conf &= ~CSI_SENS_CONF_DATA_DEST_MASK; + __raw_writel(csi_sens_conf | (csi_dest << + CSI_SENS_CONF_DATA_DEST_SHIFT), CSI_SENS_CONF(csi)); +err: + return retval; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_common.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_common.c @@ -0,0 +1,2464 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_common.c + * + * @brief This file contains the IPU driver common API functions. + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +struct ipu_irq_node { + irqreturn_t(*handler) (int, void *); /*!< the ISR */ + const char *name; /*!< device associated with the interrupt */ + void *dev_id; /*!< some unique information for the ISR */ + __u32 flags; /*!< not used */ +}; + +/* Globals */ +struct clk *g_ipu_clk; +bool g_ipu_clk_enabled; +struct clk *g_di_clk[2]; +struct clk *g_pixel_clk[2]; +struct clk *g_csi_clk[2]; +unsigned char g_dc_di_assignment[10]; +ipu_channel_t g_ipu_csi_channel[2]; +int g_ipu_irq[2]; +int g_ipu_hw_rev; +bool g_sec_chan_en[22]; +bool g_thrd_chan_en[21]; +uint32_t g_channel_init_mask; +uint32_t g_channel_enable_mask; +DEFINE_SPINLOCK(ipu_lock); +struct device *g_ipu_dev; + +static struct ipu_irq_node ipu_irq_list[IPU_IRQ_COUNT]; +static const char driver_name[] = "mxc_ipu"; + +static int ipu_dc_use_count; +static int ipu_dp_use_count; +static int ipu_dmfc_use_count; +static int ipu_smfc_use_count; +static int ipu_ic_use_count; +static int ipu_rot_use_count; +static int ipu_vdi_use_count; +static int ipu_di_use_count[2]; +static int ipu_csi_use_count[2]; +/* Set to the follow using IC direct channel, default non */ +static ipu_channel_t using_ic_dirct_ch; + +/* for power gating */ +static uint32_t ipu_conf_reg; +static uint32_t ic_conf_reg; +static uint32_t ipu_cha_db_mode_reg[4]; +static uint32_t ipu_cha_cur_buf_reg[4]; +static uint32_t idma_enable_reg[2]; +static uint32_t buf_ready_reg[8]; + +u32 *ipu_cm_reg; +u32 *ipu_idmac_reg; +u32 *ipu_dp_reg; +u32 *ipu_ic_reg; +u32 *ipu_dc_reg; +u32 *ipu_dc_tmpl_reg; +u32 *ipu_dmfc_reg; +u32 *ipu_di_reg[2]; +u32 *ipu_smfc_reg; +u32 *ipu_csi_reg[2]; +u32 *ipu_cpmem_base; +u32 *ipu_tpmem_base; +u32 *ipu_disp_base[2]; +u32 *ipu_vdi_reg; + +/* Static functions */ +static irqreturn_t ipu_irq_handler(int irq, void *desc); + +static inline uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type) +{ + return ((uint32_t) ch >> (6 * type)) & 0x3F; +}; + +static inline int _ipu_is_ic_chan(uint32_t dma_chan) +{ + return ((dma_chan >= 11) && (dma_chan <= 22) && (dma_chan != 17) && (dma_chan != 18)); +} + +static inline int _ipu_is_ic_graphic_chan(uint32_t dma_chan) +{ + return (dma_chan == 14 || dma_chan == 15); +} + +/* Either DP BG or DP FG can be graphic window */ +static inline int _ipu_is_dp_graphic_chan(uint32_t dma_chan) +{ + return (dma_chan == 23 || dma_chan == 27); +} + +static inline int _ipu_is_irt_chan(uint32_t dma_chan) +{ + return ((dma_chan >= 45) && (dma_chan <= 50)); +} + +static inline int _ipu_is_dmfc_chan(uint32_t dma_chan) +{ + return ((dma_chan >= 23) && (dma_chan <= 29)); +} + +static inline int _ipu_is_smfc_chan(uint32_t dma_chan) +{ + return ((dma_chan >= 0) && (dma_chan <= 3)); +} + +#define idma_is_valid(ch) (ch != NO_DMA) +#define idma_mask(ch) (idma_is_valid(ch) ? (1UL << (ch & 0x1F)) : 0) +#define idma_is_set(reg, dma) (__raw_readl(reg(dma)) & idma_mask(dma)) + +static void _ipu_pixel_clk_recalc(struct clk *clk) +{ + u32 div = __raw_readl(DI_BS_CLKGEN0(clk->id)); + if (div == 0) + clk->rate = 0; + else + clk->rate = (clk->parent->rate * 16) / div; +} + +static unsigned long _ipu_pixel_clk_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div, div1; + u32 tmp; + /* + * Calculate divider + * Fractional part is 4 bits, + * so simply multiply by 2^4 to get fractional part. + */ + tmp = (clk->parent->rate * 16); + div = tmp / rate; + + if (div < 0x10) /* Min DI disp clock divider is 1 */ + div = 0x10; + if (div & ~0xFEF) + div &= 0xFF8; + else { + div1 = div & 0xFE0; + if ((tmp/div1 - tmp/div) < rate / 4) + div = div1; + else + div &= 0xFF8; + } + return (clk->parent->rate * 16) / div; +} + +static int _ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate) +{ + u32 div = (clk->parent->rate * 16) / rate; + + __raw_writel(div, DI_BS_CLKGEN0(clk->id)); + + /* Setup pixel clock timing */ + /* FIXME: needs to be more flexible */ + /* Down time is half of period */ + __raw_writel((div / 16) << 16, DI_BS_CLKGEN1(clk->id)); + + clk->rate = (clk->parent->rate * 16) / div; + return 0; +} + +static int _ipu_pixel_clk_enable(struct clk *clk) +{ + u32 disp_gen = __raw_readl(IPU_DISP_GEN); + disp_gen |= clk->id ? DI1_COUNTER_RELEASE : DI0_COUNTER_RELEASE; + __raw_writel(disp_gen, IPU_DISP_GEN); + + start_dvfs_per(); + + return 0; +} + +static void _ipu_pixel_clk_disable(struct clk *clk) +{ + u32 disp_gen = __raw_readl(IPU_DISP_GEN); + disp_gen &= clk->id ? ~DI1_COUNTER_RELEASE : ~DI0_COUNTER_RELEASE; + __raw_writel(disp_gen, IPU_DISP_GEN); + + start_dvfs_per(); +} + +static int _ipu_pixel_clk_set_parent(struct clk *clk, struct clk *parent) +{ + u32 di_gen = __raw_readl(DI_GENERAL(clk->id)); + + if (parent == g_ipu_clk) + di_gen &= ~DI_GEN_DI_CLK_EXT; + else if (!IS_ERR(g_di_clk[clk->id]) && parent == g_di_clk[clk->id]) + di_gen |= DI_GEN_DI_CLK_EXT; + else + return -EINVAL; + + __raw_writel(di_gen, DI_GENERAL(clk->id)); + _ipu_pixel_clk_recalc(clk); + return 0; +} + +static struct clk pixel_clk[] = { + { + .name = "pixel_clk", + .id = 0, + .recalc = _ipu_pixel_clk_recalc, + .set_rate = _ipu_pixel_clk_set_rate, + .round_rate = _ipu_pixel_clk_round_rate, + .set_parent = _ipu_pixel_clk_set_parent, + .enable = _ipu_pixel_clk_enable, + .disable = _ipu_pixel_clk_disable, + }, + { + .name = "pixel_clk", + .id = 1, + .recalc = _ipu_pixel_clk_recalc, + .set_rate = _ipu_pixel_clk_set_rate, + .round_rate = _ipu_pixel_clk_round_rate, + .set_parent = _ipu_pixel_clk_set_parent, + .enable = _ipu_pixel_clk_enable, + .disable = _ipu_pixel_clk_disable, + }, +}; + +/*! + * This function resets IPU + */ +void ipu_reset(void) +{ + u32 *reg; + u32 value; + reg = ioremap(SRC_BASE_ADDR, PAGE_SIZE); + value = __raw_readl(reg); + value = value | SW_IPU_RST; + __raw_writel(value, reg); + iounmap(reg); +} +EXPORT_SYMBOL(ipu_reset); + +/*! + * This function is called by the driver framework to initialize the IPU + * hardware. + * + * @param dev The device structure for the IPU passed in by the + * driver framework. + * + * @return Returns 0 on success or negative error code on error + */ +static int ipu_probe(struct platform_device *pdev) +{ + struct resource *res; + struct mxc_ipu_config *plat_data = pdev->dev.platform_data; + unsigned long ipu_base; + + spin_lock_init(&ipu_lock); + + g_ipu_hw_rev = plat_data->rev; + + g_ipu_dev = &pdev->dev; + + /* Register IPU interrupts */ + g_ipu_irq[0] = platform_get_irq(pdev, 0); + if (g_ipu_irq[0] < 0) + return -EINVAL; + + if (request_irq(g_ipu_irq[0], ipu_irq_handler, 0, pdev->name, 0) != 0) { + dev_err(g_ipu_dev, "request SYNC interrupt failed\n"); + return -EBUSY; + } + /* Some platforms have 2 IPU interrupts */ + g_ipu_irq[1] = platform_get_irq(pdev, 1); + if (g_ipu_irq[1] >= 0) { + if (request_irq + (g_ipu_irq[1], ipu_irq_handler, 0, pdev->name, 0) != 0) { + dev_err(g_ipu_dev, "request ERR interrupt failed\n"); + return -EBUSY; + } + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) + return -ENODEV; + + ipu_base = res->start; + ipu_cm_reg = ioremap(ipu_base + IPU_CM_REG_BASE, PAGE_SIZE); + ipu_ic_reg = ioremap(ipu_base + IPU_IC_REG_BASE, PAGE_SIZE); + ipu_idmac_reg = ioremap(ipu_base + IPU_IDMAC_REG_BASE, PAGE_SIZE); + /* DP Registers are accessed thru the SRM */ + ipu_dp_reg = ioremap(ipu_base + IPU_SRM_REG_BASE, PAGE_SIZE); + ipu_dc_reg = ioremap(ipu_base + IPU_DC_REG_BASE, PAGE_SIZE); + ipu_dmfc_reg = ioremap(ipu_base + IPU_DMFC_REG_BASE, PAGE_SIZE); + ipu_di_reg[0] = ioremap(ipu_base + IPU_DI0_REG_BASE, PAGE_SIZE); + ipu_di_reg[1] = ioremap(ipu_base + IPU_DI1_REG_BASE, PAGE_SIZE); + ipu_smfc_reg = ioremap(ipu_base + IPU_SMFC_REG_BASE, PAGE_SIZE); + ipu_csi_reg[0] = ioremap(ipu_base + IPU_CSI0_REG_BASE, PAGE_SIZE); + ipu_csi_reg[1] = ioremap(ipu_base + IPU_CSI1_REG_BASE, PAGE_SIZE); + ipu_cpmem_base = ioremap(ipu_base + IPU_CPMEM_REG_BASE, PAGE_SIZE); + ipu_tpmem_base = ioremap(ipu_base + IPU_TPM_REG_BASE, SZ_64K); + ipu_dc_tmpl_reg = ioremap(ipu_base + IPU_DC_TMPL_REG_BASE, SZ_128K); + ipu_disp_base[1] = ioremap(ipu_base + IPU_DISP1_BASE, SZ_4K); + ipu_vdi_reg = ioremap(ipu_base + IPU_VDI_REG_BASE, PAGE_SIZE); + + dev_dbg(g_ipu_dev, "IPU VDI Regs = %p\n", ipu_vdi_reg); + dev_dbg(g_ipu_dev, "IPU CM Regs = %p\n", ipu_cm_reg); + dev_dbg(g_ipu_dev, "IPU IC Regs = %p\n", ipu_ic_reg); + dev_dbg(g_ipu_dev, "IPU IDMAC Regs = %p\n", ipu_idmac_reg); + dev_dbg(g_ipu_dev, "IPU DP Regs = %p\n", ipu_dp_reg); + dev_dbg(g_ipu_dev, "IPU DC Regs = %p\n", ipu_dc_reg); + dev_dbg(g_ipu_dev, "IPU DMFC Regs = %p\n", ipu_dmfc_reg); + dev_dbg(g_ipu_dev, "IPU DI0 Regs = %p\n", ipu_di_reg[0]); + dev_dbg(g_ipu_dev, "IPU DI1 Regs = %p\n", ipu_di_reg[1]); + dev_dbg(g_ipu_dev, "IPU SMFC Regs = %p\n", ipu_smfc_reg); + dev_dbg(g_ipu_dev, "IPU CSI0 Regs = %p\n", ipu_csi_reg[0]); + dev_dbg(g_ipu_dev, "IPU CSI1 Regs = %p\n", ipu_csi_reg[1]); + dev_dbg(g_ipu_dev, "IPU CPMem = %p\n", ipu_cpmem_base); + dev_dbg(g_ipu_dev, "IPU TPMem = %p\n", ipu_tpmem_base); + dev_dbg(g_ipu_dev, "IPU DC Template Mem = %p\n", ipu_dc_tmpl_reg); + dev_dbg(g_ipu_dev, "IPU Display Region 1 Mem = %p\n", ipu_disp_base[1]); + + g_pixel_clk[0] = &pixel_clk[0]; + clk_register(g_pixel_clk[0]); + g_pixel_clk[1] = &pixel_clk[1]; + clk_register(g_pixel_clk[1]); + + /* Enable IPU and CSI clocks */ + /* Get IPU clock freq */ + g_ipu_clk = clk_get(&pdev->dev, "ipu_clk"); + dev_dbg(g_ipu_dev, "ipu_clk = %lu\n", clk_get_rate(g_ipu_clk)); + + ipu_reset(); + + clk_set_parent(g_pixel_clk[0], g_ipu_clk); + clk_set_parent(g_pixel_clk[1], g_ipu_clk); + clk_enable(g_ipu_clk); + + g_di_clk[0] = plat_data->di_clk[0]; + g_di_clk[1] = plat_data->di_clk[1]; + + g_csi_clk[0] = clk_get(&pdev->dev, "csi_mclk1"); + g_csi_clk[1] = clk_get(&pdev->dev, "csi_mclk2"); + + __raw_writel(0x807FFFFF, IPU_MEM_RST); + while (__raw_readl(IPU_MEM_RST) & 0x80000000) ; + + _ipu_init_dc_mappings(); + + /* Enable error interrupts by default */ + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(5)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(6)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(9)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(10)); + + /* DMFC Init */ + _ipu_dmfc_init(DMFC_NORMAL, 1); + + /* Set sync refresh channels as high priority */ + __raw_writel(0x18800000L, IDMAC_CHA_PRI(0)); + + /* Set MCU_T to divide MCU access window into 2 */ + __raw_writel(0x00400000L | (IPU_MCU_T_DEFAULT << 18), IPU_DISP_GEN); + + clk_disable(g_ipu_clk); + + register_ipu_device(); + + return 0; +} + +int ipu_remove(struct platform_device *pdev) +{ + if (g_ipu_irq[0]) + free_irq(g_ipu_irq[0], 0); + if (g_ipu_irq[1]) + free_irq(g_ipu_irq[1], 0); + + clk_put(g_ipu_clk); + + iounmap(ipu_cm_reg); + iounmap(ipu_ic_reg); + iounmap(ipu_idmac_reg); + iounmap(ipu_dc_reg); + iounmap(ipu_dp_reg); + iounmap(ipu_dmfc_reg); + iounmap(ipu_di_reg[0]); + iounmap(ipu_di_reg[1]); + iounmap(ipu_smfc_reg); + iounmap(ipu_csi_reg[0]); + iounmap(ipu_csi_reg[1]); + iounmap(ipu_cpmem_base); + iounmap(ipu_tpmem_base); + iounmap(ipu_dc_tmpl_reg); + iounmap(ipu_disp_base[1]); + iounmap(ipu_vdi_reg); + + return 0; +} + +void ipu_dump_registers(void) +{ + printk(KERN_DEBUG "IPU_CONF = \t0x%08X\n", __raw_readl(IPU_CONF)); + printk(KERN_DEBUG "IDMAC_CONF = \t0x%08X\n", __raw_readl(IDMAC_CONF)); + printk(KERN_DEBUG "IDMAC_CHA_EN1 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_EN(0))); + printk(KERN_DEBUG "IDMAC_CHA_EN2 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_EN(32))); + printk(KERN_DEBUG "IDMAC_CHA_PRI1 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_PRI(0))); + printk(KERN_DEBUG "IDMAC_CHA_PRI2 = \t0x%08X\n", + __raw_readl(IDMAC_CHA_PRI(32))); + printk(KERN_DEBUG "IDMAC_BAND_EN1 = \t0x%08X\n", + __raw_readl(IDMAC_BAND_EN(0))); + printk(KERN_DEBUG "IDMAC_BAND_EN2 = \t0x%08X\n", + __raw_readl(IDMAC_BAND_EN(32))); + printk(KERN_DEBUG "IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n", + __raw_readl(IPU_CHA_DB_MODE_SEL(0))); + printk(KERN_DEBUG "IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n", + __raw_readl(IPU_CHA_DB_MODE_SEL(32))); + printk(KERN_DEBUG "DMFC_WR_CHAN = \t0x%08X\n", + __raw_readl(DMFC_WR_CHAN)); + printk(KERN_DEBUG "DMFC_WR_CHAN_DEF = \t0x%08X\n", + __raw_readl(DMFC_WR_CHAN_DEF)); + printk(KERN_DEBUG "DMFC_DP_CHAN = \t0x%08X\n", + __raw_readl(DMFC_DP_CHAN)); + printk(KERN_DEBUG "DMFC_DP_CHAN_DEF = \t0x%08X\n", + __raw_readl(DMFC_DP_CHAN_DEF)); + printk(KERN_DEBUG "DMFC_IC_CTRL = \t0x%08X\n", + __raw_readl(DMFC_IC_CTRL)); + printk(KERN_DEBUG "IPU_FS_PROC_FLOW1 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW1)); + printk(KERN_DEBUG "IPU_FS_PROC_FLOW2 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW2)); + printk(KERN_DEBUG "IPU_FS_PROC_FLOW3 = \t0x%08X\n", + __raw_readl(IPU_FS_PROC_FLOW3)); + printk(KERN_DEBUG "IPU_FS_DISP_FLOW1 = \t0x%08X\n", + __raw_readl(IPU_FS_DISP_FLOW1)); +} + +/*! + * This function is called to initialize a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID to init. + * + * @param params Input parameter containing union of channel + * initialization parameters. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params) +{ + int ret = 0; + uint32_t ipu_conf; + uint32_t reg; + unsigned long lock_flags; + + dev_dbg(g_ipu_dev, "init channel = %d\n", IPU_CHAN_ID(channel)); + + /* re-enable error interrupts every time a channel is initialized */ + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(5)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(6)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(9)); + __raw_writel(0xFFFFFFFF, IPU_INT_CTRL(10)); + + if (g_ipu_clk_enabled == false) { + stop_dvfs_per(); + g_ipu_clk_enabled = true; + clk_enable(g_ipu_clk); + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) { + dev_err(g_ipu_dev, "Warning: channel already initialized %d\n", + IPU_CHAN_ID(channel)); + } + + ipu_conf = __raw_readl(IPU_CONF); + + switch (channel) { + case CSI_MEM0: + case CSI_MEM1: + case CSI_MEM2: + case CSI_MEM3: + if (params->csi_mem.csi > 1) { + ret = -EINVAL; + goto err; + } + + ipu_smfc_use_count++; + ipu_csi_use_count[params->csi_mem.csi]++; + g_ipu_csi_channel[params->csi_mem.csi] = channel; + + /*SMFC setting*/ + if (params->csi_mem.mipi_en) { + ipu_conf |= (1 << (IPU_CONF_CSI0_DATA_SOURCE_OFFSET + + params->csi_mem.csi)); + _ipu_smfc_init(channel, params->csi_mem.mipi_id, + params->csi_mem.csi); + } else { + ipu_conf &= ~(1 << (IPU_CONF_CSI0_DATA_SOURCE_OFFSET + + params->csi_mem.csi)); + _ipu_smfc_init(channel, 0, params->csi_mem.csi); + } + + /*CSI data (include compander) dest*/ + _ipu_csi_init(channel, params->csi_mem.csi); + break; + case CSI_PRP_ENC_MEM: + if (params->csi_prp_enc_mem.csi > 1) { + ret = -EINVAL; + goto err; + } + if (using_ic_dirct_ch == MEM_VDI_PRP_VF_MEM) { + ret = -EINVAL; + goto err; + } + using_ic_dirct_ch = CSI_PRP_ENC_MEM; + + ipu_ic_use_count++; + ipu_csi_use_count[params->csi_prp_enc_mem.csi]++; + g_ipu_csi_channel[params->csi_prp_enc_mem.csi] = channel; + + /*Without SMFC, CSI only support parallel data source*/ + ipu_conf &= ~(1 << (IPU_CONF_CSI0_DATA_SOURCE_OFFSET + + params->csi_prp_enc_mem.csi)); + + /*CSI0/1 feed into IC*/ + ipu_conf &= ~IPU_CONF_IC_INPUT; + if (params->csi_prp_enc_mem.csi) + ipu_conf |= IPU_CONF_CSI_SEL; + else + ipu_conf &= ~IPU_CONF_CSI_SEL; + + /*PRP skip buffer in memory, only valid when RWS_EN is true*/ + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg & ~FS_ENC_IN_VALID, IPU_FS_PROC_FLOW1); + + /*CSI data (include compander) dest*/ + _ipu_csi_init(channel, params->csi_prp_enc_mem.csi); + _ipu_ic_init_prpenc(params, true); + break; + case CSI_PRP_VF_MEM: + if (params->csi_prp_vf_mem.csi > 1) { + ret = -EINVAL; + goto err; + } + if (using_ic_dirct_ch == MEM_VDI_PRP_VF_MEM) { + ret = -EINVAL; + goto err; + } + using_ic_dirct_ch = CSI_PRP_VF_MEM; + + ipu_ic_use_count++; + ipu_csi_use_count[params->csi_prp_vf_mem.csi]++; + g_ipu_csi_channel[params->csi_prp_vf_mem.csi] = channel; + + /*Without SMFC, CSI only support parallel data source*/ + ipu_conf &= ~(1 << (IPU_CONF_CSI0_DATA_SOURCE_OFFSET + + params->csi_prp_vf_mem.csi)); + + /*CSI0/1 feed into IC*/ + ipu_conf &= ~IPU_CONF_IC_INPUT; + if (params->csi_prp_vf_mem.csi) + ipu_conf |= IPU_CONF_CSI_SEL; + else + ipu_conf &= ~IPU_CONF_CSI_SEL; + + /*PRP skip buffer in memory, only valid when RWS_EN is true*/ + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg & ~FS_VF_IN_VALID, IPU_FS_PROC_FLOW1); + + /*CSI data (include compander) dest*/ + _ipu_csi_init(channel, params->csi_prp_vf_mem.csi); + _ipu_ic_init_prpvf(params, true); + break; + case MEM_PRP_VF_MEM: + ipu_ic_use_count++; + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg | FS_VF_IN_VALID, IPU_FS_PROC_FLOW1); + + if (params->mem_prp_vf_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + if (params->mem_prp_vf_mem.alpha_chan_en) + g_thrd_chan_en[IPU_CHAN_ID(channel)] = true; + + _ipu_ic_init_prpvf(params, false); + break; + case MEM_VDI_PRP_VF_MEM: + if ((using_ic_dirct_ch == CSI_PRP_VF_MEM) || + (using_ic_dirct_ch == CSI_PRP_ENC_MEM)) { + ret = -EINVAL; + goto err; + } + using_ic_dirct_ch = MEM_VDI_PRP_VF_MEM; + ipu_ic_use_count++; + ipu_vdi_use_count++; + reg = __raw_readl(IPU_FS_PROC_FLOW1); + reg &= ~FS_VDI_SRC_SEL_MASK; + __raw_writel(reg , IPU_FS_PROC_FLOW1); + + if (params->mem_prp_vf_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + _ipu_ic_init_prpvf(params, false); + _ipu_vdi_init(channel, params); + break; + case MEM_VDI_PRP_VF_MEM_P: + _ipu_vdi_init(channel, params); + break; + case MEM_VDI_PRP_VF_MEM_N: + _ipu_vdi_init(channel, params); + break; + case MEM_ROT_VF_MEM: + ipu_ic_use_count++; + ipu_rot_use_count++; + _ipu_ic_init_rotate_vf(params); + break; + case MEM_PRP_ENC_MEM: + ipu_ic_use_count++; + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg | FS_ENC_IN_VALID, IPU_FS_PROC_FLOW1); + _ipu_ic_init_prpenc(params, false); + break; + case MEM_ROT_ENC_MEM: + ipu_ic_use_count++; + ipu_rot_use_count++; + _ipu_ic_init_rotate_enc(params); + break; + case MEM_PP_MEM: + if (params->mem_pp_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + if (params->mem_pp_mem.alpha_chan_en) + g_thrd_chan_en[IPU_CHAN_ID(channel)] = true; + _ipu_ic_init_pp(params); + ipu_ic_use_count++; + break; + case MEM_ROT_PP_MEM: + _ipu_ic_init_rotate_pp(params); + ipu_ic_use_count++; + ipu_rot_use_count++; + break; + case MEM_DC_SYNC: + if (params->mem_dc_sync.di > 1) { + ret = -EINVAL; + goto err; + } + + g_dc_di_assignment[1] = params->mem_dc_sync.di; + _ipu_dc_init(1, params->mem_dc_sync.di, + params->mem_dc_sync.interlaced); + ipu_di_use_count[params->mem_dc_sync.di]++; + ipu_dc_use_count++; + ipu_dmfc_use_count++; + break; + case MEM_BG_SYNC: + if (params->mem_dp_bg_sync.di > 1) { + ret = -EINVAL; + goto err; + } + + if (params->mem_dp_bg_sync.alpha_chan_en) + g_thrd_chan_en[IPU_CHAN_ID(channel)] = true; + + g_dc_di_assignment[5] = params->mem_dp_bg_sync.di; + _ipu_dp_init(channel, params->mem_dp_bg_sync.in_pixel_fmt, + params->mem_dp_bg_sync.out_pixel_fmt); + _ipu_dc_init(5, params->mem_dp_bg_sync.di, + params->mem_dp_bg_sync.interlaced); + ipu_di_use_count[params->mem_dp_bg_sync.di]++; + ipu_dc_use_count++; + ipu_dp_use_count++; + ipu_dmfc_use_count++; + break; + case MEM_FG_SYNC: + _ipu_dp_init(channel, params->mem_dp_fg_sync.in_pixel_fmt, + params->mem_dp_fg_sync.out_pixel_fmt); + + if (params->mem_dp_fg_sync.alpha_chan_en) + g_thrd_chan_en[IPU_CHAN_ID(channel)] = true; + + ipu_dc_use_count++; + ipu_dp_use_count++; + ipu_dmfc_use_count++; + break; + case DIRECT_ASYNC0: + if (params->direct_async.di > 1) { + ret = -EINVAL; + goto err; + } + + g_dc_di_assignment[8] = params->direct_async.di; + _ipu_dc_init(8, params->direct_async.di, false); + ipu_di_use_count[params->direct_async.di]++; + ipu_dc_use_count++; + break; + case DIRECT_ASYNC1: + if (params->direct_async.di > 1) { + ret = -EINVAL; + goto err; + } + + g_dc_di_assignment[9] = params->direct_async.di; + _ipu_dc_init(9, params->direct_async.di, false); + ipu_di_use_count[params->direct_async.di]++; + ipu_dc_use_count++; + break; + default: + dev_err(g_ipu_dev, "Missing channel initialization\n"); + break; + } + + /* Enable IPU sub module */ + g_channel_init_mask |= 1L << IPU_CHAN_ID(channel); + if (ipu_ic_use_count == 1) + ipu_conf |= IPU_CONF_IC_EN; + if (ipu_vdi_use_count == 1) { + ipu_conf |= IPU_CONF_VDI_EN; + ipu_conf |= IPU_CONF_IC_INPUT; + } + if (ipu_rot_use_count == 1) + ipu_conf |= IPU_CONF_ROT_EN; + if (ipu_dc_use_count == 1) + ipu_conf |= IPU_CONF_DC_EN; + if (ipu_dp_use_count == 1) + ipu_conf |= IPU_CONF_DP_EN; + if (ipu_dmfc_use_count == 1) + ipu_conf |= IPU_CONF_DMFC_EN; + if (ipu_di_use_count[0] == 1) { + ipu_conf |= IPU_CONF_DI0_EN; + } + if (ipu_di_use_count[1] == 1) { + ipu_conf |= IPU_CONF_DI1_EN; + } + if (ipu_smfc_use_count == 1) + ipu_conf |= IPU_CONF_SMFC_EN; + if (ipu_csi_use_count[0] == 1) + ipu_conf |= IPU_CONF_CSI0_EN; + if (ipu_csi_use_count[1] == 1) + ipu_conf |= IPU_CONF_CSI1_EN; + + __raw_writel(ipu_conf, IPU_CONF); + +err: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return ret; +} +EXPORT_SYMBOL(ipu_init_channel); + +/*! + * This function is called to uninitialize a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID to uninit. + */ +void ipu_uninit_channel(ipu_channel_t channel) +{ + unsigned long lock_flags; + uint32_t reg; + uint32_t in_dma, out_dma = 0; + uint32_t ipu_conf; + + if ((g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) == 0) { + dev_err(g_ipu_dev, "Channel already uninitialized %d\n", + IPU_CHAN_ID(channel)); + return; + } + + /* Make sure channel is disabled */ + /* Get input and output dma channels */ + in_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + out_dma = channel_2_dma(channel, IPU_VIDEO_IN_BUFFER); + + if (idma_is_set(IDMAC_CHA_EN, in_dma) || + idma_is_set(IDMAC_CHA_EN, out_dma)) { + dev_err(g_ipu_dev, + "Channel %d is not disabled, disable first\n", + IPU_CHAN_ID(channel)); + return; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + ipu_conf = __raw_readl(IPU_CONF); + + /* Reset the double buffer */ + reg = __raw_readl(IPU_CHA_DB_MODE_SEL(in_dma)); + __raw_writel(reg & ~idma_mask(in_dma), IPU_CHA_DB_MODE_SEL(in_dma)); + reg = __raw_readl(IPU_CHA_DB_MODE_SEL(out_dma)); + __raw_writel(reg & ~idma_mask(out_dma), IPU_CHA_DB_MODE_SEL(out_dma)); + + g_sec_chan_en[IPU_CHAN_ID(channel)] = false; + g_thrd_chan_en[IPU_CHAN_ID(channel)] = false; + + switch (channel) { + case CSI_MEM0: + case CSI_MEM1: + case CSI_MEM2: + case CSI_MEM3: + ipu_smfc_use_count--; + if (g_ipu_csi_channel[0] == channel) { + g_ipu_csi_channel[0] = CHAN_NONE; + ipu_csi_use_count[0]--; + } else if (g_ipu_csi_channel[1] == channel) { + g_ipu_csi_channel[1] = CHAN_NONE; + ipu_csi_use_count[1]--; + } + break; + case CSI_PRP_ENC_MEM: + ipu_ic_use_count--; + if (using_ic_dirct_ch == CSI_PRP_ENC_MEM) + using_ic_dirct_ch = 0; + _ipu_ic_uninit_prpenc(); + if (g_ipu_csi_channel[0] == channel) { + g_ipu_csi_channel[0] = CHAN_NONE; + ipu_csi_use_count[0]--; + } else if (g_ipu_csi_channel[1] == channel) { + g_ipu_csi_channel[1] = CHAN_NONE; + ipu_csi_use_count[1]--; + } + break; + case CSI_PRP_VF_MEM: + ipu_ic_use_count--; + if (using_ic_dirct_ch == CSI_PRP_VF_MEM) + using_ic_dirct_ch = 0; + _ipu_ic_uninit_prpvf(); + if (g_ipu_csi_channel[0] == channel) { + g_ipu_csi_channel[0] = CHAN_NONE; + ipu_csi_use_count[0]--; + } else if (g_ipu_csi_channel[1] == channel) { + g_ipu_csi_channel[1] = CHAN_NONE; + ipu_csi_use_count[1]--; + } + break; + case MEM_PRP_VF_MEM: + ipu_ic_use_count--; + _ipu_ic_uninit_prpvf(); + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg & ~FS_VF_IN_VALID, IPU_FS_PROC_FLOW1); + break; + case MEM_VDI_PRP_VF_MEM: + ipu_ic_use_count--; + ipu_vdi_use_count--; + if (using_ic_dirct_ch == MEM_VDI_PRP_VF_MEM) + using_ic_dirct_ch = 0; + _ipu_ic_uninit_prpvf(); + _ipu_vdi_uninit(); + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg & ~FS_VF_IN_VALID, IPU_FS_PROC_FLOW1); + break; + case MEM_ROT_VF_MEM: + ipu_rot_use_count--; + ipu_ic_use_count--; + _ipu_ic_uninit_rotate_vf(); + break; + case MEM_PRP_ENC_MEM: + ipu_ic_use_count--; + _ipu_ic_uninit_prpenc(); + reg = __raw_readl(IPU_FS_PROC_FLOW1); + __raw_writel(reg & ~FS_ENC_IN_VALID, IPU_FS_PROC_FLOW1); + break; + case MEM_ROT_ENC_MEM: + ipu_rot_use_count--; + ipu_ic_use_count--; + _ipu_ic_uninit_rotate_enc(); + break; + case MEM_PP_MEM: + ipu_ic_use_count--; + _ipu_ic_uninit_pp(); + break; + case MEM_ROT_PP_MEM: + ipu_rot_use_count--; + ipu_ic_use_count--; + _ipu_ic_uninit_rotate_pp(); + break; + case MEM_DC_SYNC: + _ipu_dc_uninit(1); + ipu_di_use_count[g_dc_di_assignment[1]]--; + ipu_dc_use_count--; + ipu_dmfc_use_count--; + break; + case MEM_BG_SYNC: + _ipu_dp_uninit(channel); + _ipu_dc_uninit(5); + ipu_di_use_count[g_dc_di_assignment[5]]--; + ipu_dc_use_count--; + ipu_dp_use_count--; + ipu_dmfc_use_count--; + break; + case MEM_FG_SYNC: + _ipu_dp_uninit(channel); + ipu_dc_use_count--; + ipu_dp_use_count--; + ipu_dmfc_use_count--; + break; + case DIRECT_ASYNC0: + _ipu_dc_uninit(8); + ipu_di_use_count[g_dc_di_assignment[8]]--; + ipu_dc_use_count--; + break; + case DIRECT_ASYNC1: + _ipu_dc_uninit(9); + ipu_di_use_count[g_dc_di_assignment[9]]--; + ipu_dc_use_count--; + break; + default: + break; + } + + g_channel_init_mask &= ~(1L << IPU_CHAN_ID(channel)); + + if (ipu_ic_use_count == 0) + ipu_conf &= ~IPU_CONF_IC_EN; + if (ipu_vdi_use_count == 0) { + ipu_conf &= ~IPU_CONF_VDI_EN; + ipu_conf &= ~IPU_CONF_IC_INPUT; + } + if (ipu_rot_use_count == 0) + ipu_conf &= ~IPU_CONF_ROT_EN; + if (ipu_dc_use_count == 0) + ipu_conf &= ~IPU_CONF_DC_EN; + if (ipu_dp_use_count == 0) + ipu_conf &= ~IPU_CONF_DP_EN; + if (ipu_dmfc_use_count == 0) + ipu_conf &= ~IPU_CONF_DMFC_EN; + if (ipu_di_use_count[0] == 0) { + ipu_conf &= ~IPU_CONF_DI0_EN; + } + if (ipu_di_use_count[1] == 0) { + ipu_conf &= ~IPU_CONF_DI1_EN; + } + if (ipu_smfc_use_count == 0) + ipu_conf &= ~IPU_CONF_SMFC_EN; + if (ipu_csi_use_count[0] == 0) + ipu_conf &= ~IPU_CONF_CSI0_EN; + if (ipu_csi_use_count[1] == 0) + ipu_conf &= ~IPU_CONF_CSI1_EN; + + __raw_writel(ipu_conf, IPU_CONF); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + if (ipu_conf == 0) { + clk_disable(g_ipu_clk); + g_ipu_clk_enabled = false; + } + + WARN_ON(ipu_ic_use_count < 0); + WARN_ON(ipu_vdi_use_count < 0); + WARN_ON(ipu_rot_use_count < 0); + WARN_ON(ipu_dc_use_count < 0); + WARN_ON(ipu_dp_use_count < 0); + WARN_ON(ipu_dmfc_use_count < 0); + WARN_ON(ipu_smfc_use_count < 0); +} +EXPORT_SYMBOL(ipu_uninit_channel); + +/*! + * This function is called to initialize a buffer for logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param pixel_fmt Input parameter for pixel format of buffer. + * Pixel format is a FOURCC ASCII code. + * + * @param width Input parameter for width of buffer in pixels. + * + * @param height Input parameter for height of buffer in pixels. + * + * @param stride Input parameter for stride length of buffer + * in pixels. + * + * @param rot_mode Input parameter for rotation setting of buffer. + * A rotation setting other than + * IPU_ROTATE_VERT_FLIP + * should only be used for input buffers of + * rotation channels. + * + * @param phyaddr_0 Input parameter buffer 0 physical address. + * + * @param phyaddr_1 Input parameter buffer 1 physical address. + * Setting this to a value other than NULL enables + * double buffering mode. + * + * @param u private u offset for additional cropping, + * zero if not used. + * + * @param v private v offset for additional cropping, + * zero if not used. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + ipu_rotate_mode_t rot_mode, + dma_addr_t phyaddr_0, dma_addr_t phyaddr_1, + uint32_t u, uint32_t v) +{ + unsigned long lock_flags; + uint32_t reg; + uint32_t dma_chan; + uint32_t burst_size; + + dma_chan = channel_2_dma(channel, type); + if (!idma_is_valid(dma_chan)) + return -EINVAL; + + if (stride < width * bytes_per_pixel(pixel_fmt)) + stride = width * bytes_per_pixel(pixel_fmt); + + if (stride % 4) { + dev_err(g_ipu_dev, + "Stride not 32-bit aligned, stride = %d\n", stride); + return -EINVAL; + } + /* IC & IRT channels' width must be multiple of 8 pixels */ + if ((_ipu_is_ic_chan(dma_chan) || _ipu_is_irt_chan(dma_chan)) + && (width % 8)) { + dev_err(g_ipu_dev, "Width must be 8 pixel multiple\n"); + return -EINVAL; + } + + /* Build parameter memory data for DMA channel */ + _ipu_ch_param_init(dma_chan, pixel_fmt, width, height, stride, u, v, 0, + phyaddr_0, phyaddr_1); + + /* Set correlative channel parameter of local alpha channel */ + if ((_ipu_is_ic_graphic_chan(dma_chan) || + _ipu_is_dp_graphic_chan(dma_chan)) && + (g_thrd_chan_en[IPU_CHAN_ID(channel)] == true)) { + _ipu_ch_param_set_alpha_use_separate_channel(dma_chan, true); + _ipu_ch_param_set_alpha_buffer_memory(dma_chan); + _ipu_ch_param_set_alpha_condition_read(dma_chan); + /* fix alpha width as 8 and burst size as 16*/ + _ipu_ch_params_set_alpha_width(dma_chan, 8); + _ipu_ch_param_set_burst_size(dma_chan, 16); + } else if (_ipu_is_ic_graphic_chan(dma_chan) && + ipu_pixel_format_has_alpha(pixel_fmt)) + _ipu_ch_param_set_alpha_use_separate_channel(dma_chan, false); + + if (rot_mode) + _ipu_ch_param_set_rotation(dma_chan, rot_mode); + + /* IC and ROT channels have restriction of 8 or 16 pix burst length */ + if (_ipu_is_ic_chan(dma_chan)) { + if ((width % 16) == 0) + _ipu_ch_param_set_burst_size(dma_chan, 16); + else + _ipu_ch_param_set_burst_size(dma_chan, 8); + } else if (_ipu_is_irt_chan(dma_chan)) { + _ipu_ch_param_set_burst_size(dma_chan, 8); + _ipu_ch_param_set_block_mode(dma_chan); + } else if (_ipu_is_dmfc_chan(dma_chan)) { + spin_lock_irqsave(&ipu_lock, lock_flags); + _ipu_dmfc_set_wait4eot(dma_chan, width); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + } + + if (_ipu_chan_is_interlaced(channel)) { + _ipu_ch_param_set_interlaced_scan(dma_chan); + } + + if (_ipu_is_ic_chan(dma_chan) || _ipu_is_irt_chan(dma_chan)) { + burst_size = _ipu_ch_param_get_burst_size(dma_chan); + _ipu_ic_idma_init(dma_chan, width, height, burst_size, + rot_mode); + } else if (_ipu_is_smfc_chan(dma_chan)) { + burst_size = _ipu_ch_param_get_burst_size(dma_chan); + if ((pixel_fmt == IPU_PIX_FMT_GENERIC) && + ((_ipu_ch_param_get_bpp(dma_chan) == 5) || + (_ipu_ch_param_get_bpp(dma_chan) == 3))) + burst_size = burst_size >> 4; + else + burst_size = burst_size >> 2; + _ipu_smfc_set_burst_size(channel, burst_size-1); + } + + if (idma_is_set(IDMAC_CHA_PRI, dma_chan)) + _ipu_ch_param_set_high_priority(dma_chan); + + _ipu_ch_param_dump(dma_chan); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPU_CHA_DB_MODE_SEL(dma_chan)); + if (phyaddr_1) + reg |= idma_mask(dma_chan); + else + reg &= ~idma_mask(dma_chan); + __raw_writel(reg, IPU_CHA_DB_MODE_SEL(dma_chan)); + + /* Reset to buffer 0 */ + __raw_writel(idma_mask(dma_chan), IPU_CHA_CUR_BUF(dma_chan)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} +EXPORT_SYMBOL(ipu_init_channel_buffer); + +/*! + * This function is called to update the physical address of a buffer for + * a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param bufNum Input parameter for buffer number to update. + * 0 or 1 are the only valid values. + * + * @param phyaddr Input parameter buffer physical address. + * + * @return This function returns 0 on success or negative error code on + * fail. This function will fail if the buffer is set to ready. + */ +int32_t ipu_update_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum, dma_addr_t phyaddr) +{ + uint32_t reg; + int ret = 0; + unsigned long lock_flags; + uint32_t dma_chan = channel_2_dma(channel, type); + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (bufNum == 0) + reg = __raw_readl(IPU_CHA_BUF0_RDY(dma_chan)); + else + reg = __raw_readl(IPU_CHA_BUF1_RDY(dma_chan)); + + if ((reg & idma_mask(dma_chan)) == 0) + _ipu_ch_param_set_buffer(dma_chan, bufNum, phyaddr); + else + ret = -EACCES; + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return ret; +} +EXPORT_SYMBOL(ipu_update_channel_buffer); + + +/*! + * This function is called to initialize a buffer for logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param pixel_fmt Input parameter for pixel format of buffer. + * Pixel format is a FOURCC ASCII code. + * + * @param width Input parameter for width of buffer in pixels. + * + * @param height Input parameter for height of buffer in pixels. + * + * @param stride Input parameter for stride length of buffer + * in pixels. + * + * @param u predefined private u offset for additional cropping, + * zero if not used. + * + * @param v predefined private v offset for additional cropping, + * zero if not used. + * + * @param vertical_offset vertical offset for Y coordinate + * in the existed frame + * + * + * @param horizontal_offset horizontal offset for X coordinate + * in the existed frame + * + * + * @return Returns 0 on success or negative error code on fail + * This function will fail if any buffer is set to ready. + */ + +int32_t ipu_update_channel_offset(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + uint32_t u, uint32_t v, + uint32_t vertical_offset, uint32_t horizontal_offset) +{ + int ret = 0; + unsigned long lock_flags; + uint32_t dma_chan = channel_2_dma(channel, type); + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if ((__raw_readl(IPU_CHA_BUF0_RDY(dma_chan)) & idma_mask(dma_chan)) || + (__raw_readl(IPU_CHA_BUF0_RDY(dma_chan)) & idma_mask(dma_chan))) + ret = -EACCES; + else + _ipu_ch_offset_update(dma_chan, pixel_fmt, width, height, stride, + u, v, 0, vertical_offset, horizontal_offset); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return ret; +} +EXPORT_SYMBOL(ipu_update_channel_offset); + + +/*! + * This function is called to set a channel's buffer as ready. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param bufNum Input parameter for which buffer number set to + * ready state. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_select_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum) +{ + uint32_t dma_chan = channel_2_dma(channel, type); + uint32_t reg; + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + if (bufNum == 0) { + /*Mark buffer 0 as ready. */ + reg = __raw_readl(IPU_CHA_BUF0_RDY(dma_chan)); + __raw_writel(idma_mask(dma_chan) | reg, + IPU_CHA_BUF0_RDY(dma_chan)); + } else { + /*Mark buffer 1 as ready. */ + reg = __raw_readl(IPU_CHA_BUF1_RDY(dma_chan)); + __raw_writel(idma_mask(dma_chan) | reg, + IPU_CHA_BUF1_RDY(dma_chan)); + } + if (channel == MEM_VDI_PRP_VF_MEM) + _ipu_vdi_toggle_top_field_man(); + return 0; +} +EXPORT_SYMBOL(ipu_select_buffer); + +/*! + * This function is called to set a channel's buffer as ready. + * + * @param bufNum Input parameter for which buffer number set to + * ready state. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_select_multi_vdi_buffer(uint32_t bufNum) +{ + + uint32_t dma_chan = channel_2_dma(MEM_VDI_PRP_VF_MEM, IPU_INPUT_BUFFER); + uint32_t mask_bit = + idma_mask(channel_2_dma(MEM_VDI_PRP_VF_MEM_P, IPU_INPUT_BUFFER))| + idma_mask(dma_chan)| + idma_mask(channel_2_dma(MEM_VDI_PRP_VF_MEM_N, IPU_INPUT_BUFFER)); + uint32_t reg; + + if (bufNum == 0) { + /*Mark buffer 0 as ready. */ + reg = __raw_readl(IPU_CHA_BUF0_RDY(dma_chan)); + __raw_writel(mask_bit | reg, IPU_CHA_BUF0_RDY(dma_chan)); + } else { + /*Mark buffer 1 as ready. */ + reg = __raw_readl(IPU_CHA_BUF0_RDY(dma_chan)); + __raw_writel(mask_bit | reg, IPU_CHA_BUF1_RDY(dma_chan)); + } + _ipu_vdi_toggle_top_field_man(); + return 0; +} +EXPORT_SYMBOL(ipu_select_multi_vdi_buffer); + +#define NA -1 +static int proc_dest_sel[] = + { 0, 1, 1, 3, 5, 5, 4, 7, 8, 9, 10, 11, 12, 14, 15, 16, + 0, 1, 1, 5, 5, 5, 5, 5, 7, 8, 9, 10, 11, 12, 14, 31 }; +static int proc_src_sel[] = { 0, 6, 7, 6, 7, 8, 5, NA, NA, NA, + NA, NA, NA, NA, NA, 1, 2, 3, 4, 7, 8, NA, NA, NA }; +static int disp_src_sel[] = { 0, 6, 7, 8, 3, 4, 5, NA, NA, NA, + NA, NA, NA, NA, NA, 1, NA, 2, NA, 3, 4, 4, 4, 4 }; + + +/*! + * This function links 2 channels together for automatic frame + * synchronization. The output of the source channel is linked to the input of + * the destination channel. + * + * @param src_ch Input parameter for the logical channel ID of + * the source channel. + * + * @param dest_ch Input parameter for the logical channel ID of + * the destination channel. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_link_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch) +{ + int retval = 0; + unsigned long lock_flags; + uint32_t fs_proc_flow1; + uint32_t fs_proc_flow2; + uint32_t fs_proc_flow3; + uint32_t fs_disp_flow1; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + fs_proc_flow1 = __raw_readl(IPU_FS_PROC_FLOW1); + fs_proc_flow2 = __raw_readl(IPU_FS_PROC_FLOW2); + fs_proc_flow3 = __raw_readl(IPU_FS_PROC_FLOW3); + fs_disp_flow1 = __raw_readl(IPU_FS_DISP_FLOW1); + + switch (src_ch) { + case CSI_MEM0: + fs_proc_flow3 &= ~FS_SMFC0_DEST_SEL_MASK; + fs_proc_flow3 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_SMFC0_DEST_SEL_OFFSET; + break; + case CSI_MEM1: + fs_proc_flow3 &= ~FS_SMFC1_DEST_SEL_MASK; + fs_proc_flow3 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_SMFC1_DEST_SEL_OFFSET; + break; + case CSI_MEM2: + fs_proc_flow3 &= ~FS_SMFC2_DEST_SEL_MASK; + fs_proc_flow3 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_SMFC2_DEST_SEL_OFFSET; + break; + case CSI_MEM3: + fs_proc_flow3 &= ~FS_SMFC3_DEST_SEL_MASK; + fs_proc_flow3 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_SMFC3_DEST_SEL_OFFSET; + break; + case CSI_PRP_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPENC_DEST_SEL_OFFSET; + break; + case CSI_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPVF_DEST_SEL_OFFSET; + break; + case MEM_PP_MEM: + fs_proc_flow2 &= ~FS_PP_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PP_DEST_SEL_OFFSET; + break; + case MEM_ROT_PP_MEM: + fs_proc_flow2 &= ~FS_PP_ROT_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PP_ROT_DEST_SEL_OFFSET; + break; + case MEM_PRP_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPENC_DEST_SEL_OFFSET; + break; + case MEM_ROT_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_ROT_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPENC_ROT_DEST_SEL_OFFSET; + break; + case MEM_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPVF_DEST_SEL_OFFSET; + break; + case MEM_VDI_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPVF_DEST_SEL_OFFSET; + break; + case MEM_ROT_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_ROT_DEST_SEL_MASK; + fs_proc_flow2 |= + proc_dest_sel[IPU_CHAN_ID(dest_ch)] << + FS_PRPVF_ROT_DEST_SEL_OFFSET; + break; + default: + retval = -EINVAL; + goto err; + } + + switch (dest_ch) { + case MEM_PP_MEM: + fs_proc_flow1 &= ~FS_PP_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << FS_PP_SRC_SEL_OFFSET; + break; + case MEM_ROT_PP_MEM: + fs_proc_flow1 &= ~FS_PP_ROT_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << + FS_PP_ROT_SRC_SEL_OFFSET; + break; + case MEM_PRP_ENC_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << FS_PRP_SRC_SEL_OFFSET; + break; + case MEM_ROT_ENC_MEM: + fs_proc_flow1 &= ~FS_PRPENC_ROT_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << + FS_PRPENC_ROT_SRC_SEL_OFFSET; + break; + case MEM_PRP_VF_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << FS_PRP_SRC_SEL_OFFSET; + break; + case MEM_VDI_PRP_VF_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << FS_PRP_SRC_SEL_OFFSET; + break; + case MEM_ROT_VF_MEM: + fs_proc_flow1 &= ~FS_PRPVF_ROT_SRC_SEL_MASK; + fs_proc_flow1 |= + proc_src_sel[IPU_CHAN_ID(src_ch)] << + FS_PRPVF_ROT_SRC_SEL_OFFSET; + break; + case MEM_DC_SYNC: + fs_disp_flow1 &= ~FS_DC1_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << FS_DC1_SRC_SEL_OFFSET; + break; + case MEM_BG_SYNC: + fs_disp_flow1 &= ~FS_DP_SYNC0_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << + FS_DP_SYNC0_SRC_SEL_OFFSET; + break; + case MEM_FG_SYNC: + fs_disp_flow1 &= ~FS_DP_SYNC1_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << + FS_DP_SYNC1_SRC_SEL_OFFSET; + break; + case MEM_DC_ASYNC: + fs_disp_flow1 &= ~FS_DC2_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << FS_DC2_SRC_SEL_OFFSET; + break; + case MEM_BG_ASYNC0: + fs_disp_flow1 &= ~FS_DP_ASYNC0_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << + FS_DP_ASYNC0_SRC_SEL_OFFSET; + break; + case MEM_FG_ASYNC0: + fs_disp_flow1 &= ~FS_DP_ASYNC1_SRC_SEL_MASK; + fs_disp_flow1 |= + disp_src_sel[IPU_CHAN_ID(src_ch)] << + FS_DP_ASYNC1_SRC_SEL_OFFSET; + break; + default: + retval = -EINVAL; + goto err; + } + + __raw_writel(fs_proc_flow1, IPU_FS_PROC_FLOW1); + __raw_writel(fs_proc_flow2, IPU_FS_PROC_FLOW2); + __raw_writel(fs_proc_flow3, IPU_FS_PROC_FLOW3); + __raw_writel(fs_disp_flow1, IPU_FS_DISP_FLOW1); + +err: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return retval; +} +EXPORT_SYMBOL(ipu_link_channels); + +/*! + * This function unlinks 2 channels and disables automatic frame + * synchronization. + * + * @param src_ch Input parameter for the logical channel ID of + * the source channel. + * + * @param dest_ch Input parameter for the logical channel ID of + * the destination channel. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_unlink_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch) +{ + int retval = 0; + unsigned long lock_flags; + uint32_t fs_proc_flow1; + uint32_t fs_proc_flow2; + uint32_t fs_proc_flow3; + uint32_t fs_disp_flow1; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + fs_proc_flow1 = __raw_readl(IPU_FS_PROC_FLOW1); + fs_proc_flow2 = __raw_readl(IPU_FS_PROC_FLOW2); + fs_proc_flow3 = __raw_readl(IPU_FS_PROC_FLOW3); + fs_disp_flow1 = __raw_readl(IPU_FS_DISP_FLOW1); + + switch (src_ch) { + case CSI_MEM0: + fs_proc_flow3 &= ~FS_SMFC0_DEST_SEL_MASK; + break; + case CSI_MEM1: + fs_proc_flow3 &= ~FS_SMFC1_DEST_SEL_MASK; + break; + case CSI_MEM2: + fs_proc_flow3 &= ~FS_SMFC2_DEST_SEL_MASK; + break; + case CSI_MEM3: + fs_proc_flow3 &= ~FS_SMFC3_DEST_SEL_MASK; + break; + case CSI_PRP_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_DEST_SEL_MASK; + break; + case CSI_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + break; + case MEM_PP_MEM: + fs_proc_flow2 &= ~FS_PP_DEST_SEL_MASK; + break; + case MEM_ROT_PP_MEM: + fs_proc_flow2 &= ~FS_PP_ROT_DEST_SEL_MASK; + break; + case MEM_PRP_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_DEST_SEL_MASK; + break; + case MEM_ROT_ENC_MEM: + fs_proc_flow2 &= ~FS_PRPENC_ROT_DEST_SEL_MASK; + break; + case MEM_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + break; + case MEM_VDI_PRP_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_DEST_SEL_MASK; + break; + case MEM_ROT_VF_MEM: + fs_proc_flow2 &= ~FS_PRPVF_ROT_DEST_SEL_MASK; + break; + default: + retval = -EINVAL; + goto err; + } + + switch (dest_ch) { + case MEM_PP_MEM: + fs_proc_flow1 &= ~FS_PP_SRC_SEL_MASK; + break; + case MEM_ROT_PP_MEM: + fs_proc_flow1 &= ~FS_PP_ROT_SRC_SEL_MASK; + break; + case MEM_PRP_ENC_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + break; + case MEM_ROT_ENC_MEM: + fs_proc_flow1 &= ~FS_PRPENC_ROT_SRC_SEL_MASK; + break; + case MEM_PRP_VF_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + break; + case MEM_VDI_PRP_VF_MEM: + fs_proc_flow1 &= ~FS_PRP_SRC_SEL_MASK; + break; + case MEM_ROT_VF_MEM: + fs_proc_flow1 &= ~FS_PRPVF_ROT_SRC_SEL_MASK; + break; + case MEM_DC_SYNC: + fs_disp_flow1 &= ~FS_DC1_SRC_SEL_MASK; + break; + case MEM_BG_SYNC: + fs_disp_flow1 &= ~FS_DP_SYNC0_SRC_SEL_MASK; + break; + case MEM_FG_SYNC: + fs_disp_flow1 &= ~FS_DP_SYNC1_SRC_SEL_MASK; + break; + case MEM_DC_ASYNC: + fs_disp_flow1 &= ~FS_DC2_SRC_SEL_MASK; + break; + case MEM_BG_ASYNC0: + fs_disp_flow1 &= ~FS_DP_ASYNC0_SRC_SEL_MASK; + break; + case MEM_FG_ASYNC0: + fs_disp_flow1 &= ~FS_DP_ASYNC1_SRC_SEL_MASK; + break; + default: + retval = -EINVAL; + goto err; + } + + __raw_writel(fs_proc_flow1, IPU_FS_PROC_FLOW1); + __raw_writel(fs_proc_flow2, IPU_FS_PROC_FLOW2); + __raw_writel(fs_proc_flow3, IPU_FS_PROC_FLOW3); + __raw_writel(fs_disp_flow1, IPU_FS_DISP_FLOW1); + +err: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return retval; +} +EXPORT_SYMBOL(ipu_unlink_channels); + +/*! + * This function check whether a logical channel was enabled. + * + * @param channel Input parameter for the logical channel ID. + * + * @return This function returns 1 while request channel is enabled or + * 0 for not enabled. + */ +int32_t ipu_is_channel_busy(ipu_channel_t channel) +{ + uint32_t reg; + uint32_t in_dma; + uint32_t out_dma; + + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + in_dma = channel_2_dma(channel, IPU_VIDEO_IN_BUFFER); + + reg = __raw_readl(IDMAC_CHA_EN(in_dma)); + if (reg & idma_mask(in_dma)) + return 1; + reg = __raw_readl(IDMAC_CHA_EN(out_dma)); + if (reg & idma_mask(out_dma)) + return 1; + return 0; +} +EXPORT_SYMBOL(ipu_is_channel_busy); + +/*! + * This function enables a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_enable_channel(ipu_channel_t channel) +{ + uint32_t reg; + unsigned long lock_flags; + uint32_t in_dma; + uint32_t out_dma; + uint32_t sec_dma; + uint32_t thrd_dma; + + if (g_channel_enable_mask & (1L << IPU_CHAN_ID(channel))) { + dev_err(g_ipu_dev, "Warning: channel already enabled %d\n", + IPU_CHAN_ID(channel)); + } + + /* Get input and output dma channels */ + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + in_dma = channel_2_dma(channel, IPU_VIDEO_IN_BUFFER); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (idma_is_valid(in_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(in_dma)); + __raw_writel(reg | idma_mask(in_dma), IDMAC_CHA_EN(in_dma)); + } + if (idma_is_valid(out_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(out_dma)); + __raw_writel(reg | idma_mask(out_dma), IDMAC_CHA_EN(out_dma)); + } + + if ((g_sec_chan_en[IPU_CHAN_ID(channel)]) && + ((channel == MEM_PP_MEM) || (channel == MEM_PRP_VF_MEM) || + (channel == MEM_VDI_PRP_VF_MEM))) { + sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER); + reg = __raw_readl(IDMAC_CHA_EN(sec_dma)); + __raw_writel(reg | idma_mask(sec_dma), IDMAC_CHA_EN(sec_dma)); + } + if ((g_thrd_chan_en[IPU_CHAN_ID(channel)]) && + ((channel == MEM_PP_MEM) || (channel == MEM_PRP_VF_MEM))) { + thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER); + reg = __raw_readl(IDMAC_CHA_EN(thrd_dma)); + __raw_writel(reg | idma_mask(thrd_dma), IDMAC_CHA_EN(thrd_dma)); + + sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER); + reg = __raw_readl(IDMAC_SEP_ALPHA); + __raw_writel(reg | idma_mask(sec_dma), IDMAC_SEP_ALPHA); + } else if ((g_thrd_chan_en[IPU_CHAN_ID(channel)]) && + ((channel == MEM_BG_SYNC) || (channel == MEM_FG_SYNC))) { + thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER); + reg = __raw_readl(IDMAC_CHA_EN(thrd_dma)); + __raw_writel(reg | idma_mask(thrd_dma), IDMAC_CHA_EN(thrd_dma)); + reg = __raw_readl(IDMAC_SEP_ALPHA); + __raw_writel(reg | idma_mask(in_dma), IDMAC_SEP_ALPHA); + } + + if ((channel == MEM_DC_SYNC) || (channel == MEM_BG_SYNC) || + (channel == MEM_FG_SYNC)) + _ipu_dp_dc_enable(channel); + + if (_ipu_is_ic_chan(in_dma) || _ipu_is_ic_chan(out_dma) || + _ipu_is_irt_chan(in_dma) || _ipu_is_irt_chan(out_dma)) + _ipu_ic_enable_task(channel); + + g_channel_enable_mask |= 1L << IPU_CHAN_ID(channel); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} +EXPORT_SYMBOL(ipu_enable_channel); + +/*! + * This function clear buffer ready for a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to clear. + * + * @param bufNum Input parameter for which buffer number clear + * ready state. + * + */ +void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum) +{ + unsigned long lock_flags; + uint32_t dma_ch = channel_2_dma(channel, type); + + if (!idma_is_valid(dma_ch)) + return; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + __raw_writel(0xF0000000, IPU_GPR); /* write one to clear */ + if (bufNum == 0) { + if (idma_is_set(IPU_CHA_BUF0_RDY, dma_ch)) { + __raw_writel(idma_mask(dma_ch), + IPU_CHA_BUF0_RDY(dma_ch)); + } + } else { + if (idma_is_set(IPU_CHA_BUF1_RDY, dma_ch)) { + __raw_writel(idma_mask(dma_ch), + IPU_CHA_BUF1_RDY(dma_ch)); + } + } + __raw_writel(0x0, IPU_GPR); /* write one to set */ + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} +EXPORT_SYMBOL(ipu_clear_buffer_ready); + +static irqreturn_t disable_chan_irq_handler(int irq, void *dev_id) +{ + struct completion *comp = dev_id; + + complete(comp); + return IRQ_HANDLED; +} + +/*! + * This function disables a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param wait_for_stop Flag to set whether to wait for channel end + * of frame or return immediately. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_disable_channel(ipu_channel_t channel, bool wait_for_stop) +{ + uint32_t reg; + unsigned long lock_flags; + uint32_t in_dma; + uint32_t out_dma; + uint32_t sec_dma = NO_DMA; + uint32_t thrd_dma = NO_DMA; + + if ((g_channel_enable_mask & (1L << IPU_CHAN_ID(channel))) == 0) { + dev_err(g_ipu_dev, "Channel already disabled %d\n", + IPU_CHAN_ID(channel)); + return 0; + } + + /* Get input and output dma channels */ + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + in_dma = channel_2_dma(channel, IPU_VIDEO_IN_BUFFER); + + if ((idma_is_valid(in_dma) && + !idma_is_set(IDMAC_CHA_EN, in_dma)) + && (idma_is_valid(out_dma) && + !idma_is_set(IDMAC_CHA_EN, out_dma))) + return -EINVAL; + + if (g_sec_chan_en[IPU_CHAN_ID(channel)]) + sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER); + if (g_thrd_chan_en[IPU_CHAN_ID(channel)]) { + sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER); + thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER); + } + + if ((channel == MEM_BG_SYNC) || (channel == MEM_FG_SYNC) || + (channel == MEM_DC_SYNC)) { + _ipu_dp_dc_disable(channel, false); + } else if (wait_for_stop) { + while (idma_is_set(IDMAC_CHA_BUSY, in_dma) || + idma_is_set(IDMAC_CHA_BUSY, out_dma) || + (g_sec_chan_en[IPU_CHAN_ID(channel)] && + idma_is_set(IDMAC_CHA_BUSY, sec_dma)) || + (g_thrd_chan_en[IPU_CHAN_ID(channel)] && + idma_is_set(IDMAC_CHA_BUSY, thrd_dma))) { + uint32_t ret, irq = 0xffffffff; + DECLARE_COMPLETION_ONSTACK(disable_comp); + + if (idma_is_set(IDMAC_CHA_BUSY, out_dma)) + irq = out_dma; + if (g_sec_chan_en[IPU_CHAN_ID(channel)] && + idma_is_set(IDMAC_CHA_BUSY, sec_dma)) + irq = sec_dma; + if (g_thrd_chan_en[IPU_CHAN_ID(channel)] && + idma_is_set(IDMAC_CHA_BUSY, thrd_dma)) + irq = thrd_dma; + if (idma_is_set(IDMAC_CHA_BUSY, in_dma)) + irq = in_dma; + + if (irq == 0xffffffff) { + dev_err(g_ipu_dev, "warning: no channel busy, break\n"); + break; + } + ret = ipu_request_irq(irq, disable_chan_irq_handler, 0, NULL, &disable_comp); + if (ret < 0) { + dev_err(g_ipu_dev, "irq %d in use\n", irq); + break; + } else { + ret = wait_for_completion_timeout(&disable_comp, msecs_to_jiffies(200)); + ipu_free_irq(irq, &disable_comp); + if (ret == 0) { + ipu_dump_registers(); + dev_err(g_ipu_dev, "warning: disable ipu dma channel %d during its busy state\n", irq); + break; + } + } + } + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + /* Disable IC task */ + if (_ipu_is_ic_chan(in_dma) || _ipu_is_ic_chan(out_dma) || + _ipu_is_irt_chan(in_dma) || _ipu_is_irt_chan(out_dma)) + _ipu_ic_disable_task(channel); + + /* Disable DMA channel(s) */ + if (idma_is_valid(in_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(in_dma)); + __raw_writel(reg & ~idma_mask(in_dma), IDMAC_CHA_EN(in_dma)); + __raw_writel(idma_mask(in_dma), IPU_CHA_CUR_BUF(in_dma)); + } + if (idma_is_valid(out_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(out_dma)); + __raw_writel(reg & ~idma_mask(out_dma), IDMAC_CHA_EN(out_dma)); + __raw_writel(idma_mask(out_dma), IPU_CHA_CUR_BUF(out_dma)); + } + if (g_sec_chan_en[IPU_CHAN_ID(channel)] && idma_is_valid(sec_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(sec_dma)); + __raw_writel(reg & ~idma_mask(sec_dma), IDMAC_CHA_EN(sec_dma)); + __raw_writel(idma_mask(sec_dma), IPU_CHA_CUR_BUF(sec_dma)); + } + if (g_thrd_chan_en[IPU_CHAN_ID(channel)] && idma_is_valid(thrd_dma)) { + reg = __raw_readl(IDMAC_CHA_EN(thrd_dma)); + __raw_writel(reg & ~idma_mask(thrd_dma), IDMAC_CHA_EN(thrd_dma)); + if (channel == MEM_BG_SYNC || channel == MEM_FG_SYNC) { + reg = __raw_readl(IDMAC_SEP_ALPHA); + __raw_writel(reg & ~idma_mask(in_dma), IDMAC_SEP_ALPHA); + } else { + reg = __raw_readl(IDMAC_SEP_ALPHA); + __raw_writel(reg & ~idma_mask(sec_dma), IDMAC_SEP_ALPHA); + } + __raw_writel(idma_mask(thrd_dma), IPU_CHA_CUR_BUF(thrd_dma)); + } + + g_channel_enable_mask &= ~(1L << IPU_CHAN_ID(channel)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + /* Set channel buffers NOT to be ready */ + if (idma_is_valid(in_dma)) { + ipu_clear_buffer_ready(channel, IPU_VIDEO_IN_BUFFER, 0); + ipu_clear_buffer_ready(channel, IPU_VIDEO_IN_BUFFER, 1); + } + if (idma_is_valid(out_dma)) { + ipu_clear_buffer_ready(channel, IPU_OUTPUT_BUFFER, 0); + ipu_clear_buffer_ready(channel, IPU_OUTPUT_BUFFER, 1); + } + if (g_sec_chan_en[IPU_CHAN_ID(channel)] && idma_is_valid(sec_dma)) { + ipu_clear_buffer_ready(channel, IPU_GRAPH_IN_BUFFER, 0); + ipu_clear_buffer_ready(channel, IPU_GRAPH_IN_BUFFER, 1); + } + if (g_thrd_chan_en[IPU_CHAN_ID(channel)] && idma_is_valid(thrd_dma)) { + ipu_clear_buffer_ready(channel, IPU_ALPHA_IN_BUFFER, 0); + ipu_clear_buffer_ready(channel, IPU_ALPHA_IN_BUFFER, 1); + } + + return 0; +} +EXPORT_SYMBOL(ipu_disable_channel); + +static irqreturn_t ipu_irq_handler(int irq, void *desc) +{ + int i; + uint32_t line; + irqreturn_t result = IRQ_NONE; + uint32_t int_stat; + const int err_reg[] = { 5, 6, 9, 10, 0 }; + const int int_reg[] = { 1, 2, 3, 4, 11, 12, 13, 14, 15, 0 }; + + for (i = 0;; i++) { + if (err_reg[i] == 0) + break; + int_stat = __raw_readl(IPU_INT_STAT(err_reg[i])); + int_stat &= __raw_readl(IPU_INT_CTRL(err_reg[i])); + if (int_stat) { + __raw_writel(int_stat, IPU_INT_STAT(err_reg[i])); + dev_err(g_ipu_dev, + "IPU Error - IPU_INT_STAT_%d = 0x%08X\n", + err_reg[i], int_stat); + /* Disable interrupts so we only get error once */ + int_stat = + __raw_readl(IPU_INT_CTRL(err_reg[i])) & ~int_stat; + __raw_writel(int_stat, IPU_INT_CTRL(err_reg[i])); + } + } + + for (i = 0;; i++) { + if (int_reg[i] == 0) + break; + int_stat = __raw_readl(IPU_INT_STAT(int_reg[i])); + int_stat &= __raw_readl(IPU_INT_CTRL(int_reg[i])); + __raw_writel(int_stat, IPU_INT_STAT(int_reg[i])); + while ((line = ffs(int_stat)) != 0) { + line--; + int_stat &= ~(1UL << line); + line += (int_reg[i] - 1) * 32; + result |= + ipu_irq_list[line].handler(line, + ipu_irq_list[line]. + dev_id); + } + } + + return result; +} + +/*! + * This function enables the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to enable interrupt for. + * + */ +void ipu_enable_irq(uint32_t irq) +{ + uint32_t reg; + unsigned long lock_flags; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPUIRQ_2_CTRLREG(irq)); + reg |= IPUIRQ_2_MASK(irq); + __raw_writel(reg, IPUIRQ_2_CTRLREG(irq)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); +} +EXPORT_SYMBOL(ipu_enable_irq); + +/*! + * This function disables the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to disable interrupt for. + * + */ +void ipu_disable_irq(uint32_t irq) +{ + uint32_t reg; + unsigned long lock_flags; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPUIRQ_2_CTRLREG(irq)); + reg &= ~IPUIRQ_2_MASK(irq); + __raw_writel(reg, IPUIRQ_2_CTRLREG(irq)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); +} +EXPORT_SYMBOL(ipu_disable_irq); + +/*! + * This function clears the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to clear interrupt for. + * + */ +void ipu_clear_irq(uint32_t irq) +{ + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + + __raw_writel(IPUIRQ_2_MASK(irq), IPUIRQ_2_STATREG(irq)); + + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); +} +EXPORT_SYMBOL(ipu_clear_irq); + +/*! + * This function returns the current interrupt status for the specified + * interrupt line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @return Returns true if the interrupt is pending/asserted or false if + * the interrupt is not pending. + */ +bool ipu_get_irq_status(uint32_t irq) +{ + uint32_t reg; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + + reg = __raw_readl(IPUIRQ_2_STATREG(irq)); + + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); + + if (reg & IPUIRQ_2_MASK(irq)) + return true; + else + return false; +} +EXPORT_SYMBOL(ipu_get_irq_status); + +/*! + * This function registers an interrupt handler function for the specified + * interrupt line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @param handler Input parameter for address of the handler + * function. + * + * @param irq_flags Flags for interrupt mode. Currently not used. + * + * @param devname Input parameter for string name of driver + * registering the handler. + * + * @param dev_id Input parameter for pointer of data to be + * passed to the handler. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int ipu_request_irq(uint32_t irq, + irqreturn_t(*handler) (int, void *), + uint32_t irq_flags, const char *devname, void *dev_id) +{ + unsigned long lock_flags; + + BUG_ON(irq >= IPU_IRQ_COUNT); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (ipu_irq_list[irq].handler != NULL) { + dev_err(g_ipu_dev, + "handler already installed on irq %d\n", irq); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EINVAL; + } + + ipu_irq_list[irq].handler = handler; + ipu_irq_list[irq].flags = irq_flags; + ipu_irq_list[irq].dev_id = dev_id; + ipu_irq_list[irq].name = devname; + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + ipu_enable_irq(irq); /* enable the interrupt */ + + return 0; +} +EXPORT_SYMBOL(ipu_request_irq); + +/*! + * This function unregisters an interrupt handler for the specified interrupt + * line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @param dev_id Input parameter for pointer of data to be passed + * to the handler. This must match value passed to + * ipu_request_irq(). + * + */ +void ipu_free_irq(uint32_t irq, void *dev_id) +{ + ipu_disable_irq(irq); /* disable the interrupt */ + + if (ipu_irq_list[irq].dev_id == dev_id) + ipu_irq_list[irq].handler = NULL; +} +EXPORT_SYMBOL(ipu_free_irq); + +uint32_t _ipu_channel_status(ipu_channel_t channel) +{ + uint32_t stat = 0; + uint32_t task_stat_reg = __raw_readl(IPU_PROC_TASK_STAT); + + switch (channel) { + case MEM_PRP_VF_MEM: + stat = (task_stat_reg & TSTAT_VF_MASK) >> TSTAT_VF_OFFSET; + break; + case MEM_VDI_PRP_VF_MEM: + stat = (task_stat_reg & TSTAT_VF_MASK) >> TSTAT_VF_OFFSET; + break; + case MEM_ROT_VF_MEM: + stat = + (task_stat_reg & TSTAT_VF_ROT_MASK) >> TSTAT_VF_ROT_OFFSET; + break; + case MEM_PRP_ENC_MEM: + stat = (task_stat_reg & TSTAT_ENC_MASK) >> TSTAT_ENC_OFFSET; + break; + case MEM_ROT_ENC_MEM: + stat = + (task_stat_reg & TSTAT_ENC_ROT_MASK) >> + TSTAT_ENC_ROT_OFFSET; + break; + case MEM_PP_MEM: + stat = (task_stat_reg & TSTAT_PP_MASK) >> TSTAT_PP_OFFSET; + break; + case MEM_ROT_PP_MEM: + stat = + (task_stat_reg & TSTAT_PP_ROT_MASK) >> TSTAT_PP_ROT_OFFSET; + break; + + default: + stat = TASK_STAT_IDLE; + break; + } + return stat; +} + +int32_t ipu_swap_channel(ipu_channel_t from_ch, ipu_channel_t to_ch) +{ + uint32_t reg; + unsigned long lock_flags; + + int from_dma = channel_2_dma(from_ch, IPU_INPUT_BUFFER); + int to_dma = channel_2_dma(to_ch, IPU_INPUT_BUFFER); + + /* enable target channel */ + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IDMAC_CHA_EN(to_dma)); + __raw_writel(reg | idma_mask(to_dma), IDMAC_CHA_EN(to_dma)); + + g_channel_enable_mask |= 1L << IPU_CHAN_ID(to_ch); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + /* switch dp dc */ + _ipu_dp_dc_disable(from_ch, true); + + /* disable source channel */ + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IDMAC_CHA_EN(from_dma)); + __raw_writel(reg & ~idma_mask(from_dma), IDMAC_CHA_EN(from_dma)); + __raw_writel(idma_mask(from_dma), IPU_CHA_CUR_BUF(from_dma)); + + g_channel_enable_mask &= ~(1L << IPU_CHAN_ID(from_ch)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} +EXPORT_SYMBOL(ipu_swap_channel); + +uint32_t bytes_per_pixel(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_GENERIC: /*generic data */ + case IPU_PIX_FMT_RGB332: + case IPU_PIX_FMT_YUV420P: + case IPU_PIX_FMT_YUV422P: + return 1; + break; + case IPU_PIX_FMT_RGB565: + case IPU_PIX_FMT_YUYV: + case IPU_PIX_FMT_UYVY: + return 2; + break; + case IPU_PIX_FMT_BGR24: + case IPU_PIX_FMT_RGB24: + return 3; + break; + case IPU_PIX_FMT_GENERIC_32: /*generic data */ + case IPU_PIX_FMT_BGR32: + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_RGB32: + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_ABGR32: + return 4; + break; + default: + return 1; + break; + } + return 0; +} +EXPORT_SYMBOL(bytes_per_pixel); + +ipu_color_space_t format_to_colorspace(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_RGB666: + case IPU_PIX_FMT_RGB565: + case IPU_PIX_FMT_BGR24: + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_BGR32: + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_RGB32: + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_ABGR32: + case IPU_PIX_FMT_LVDS666: + case IPU_PIX_FMT_LVDS888: + return RGB; + break; + + default: + return YCbCr; + break; + } + return RGB; +} + +bool ipu_pixel_format_has_alpha(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_ABGR32: + return true; + break; + default: + return false; + break; + } + return false; +} + +void ipu_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]) +{ + _ipu_dp_set_csc_coefficients(channel, param); +} +EXPORT_SYMBOL(ipu_set_csc_coefficients); + +static int ipu_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (g_ipu_clk_enabled) { + /* save and disable enabled channels*/ + idma_enable_reg[0] = __raw_readl(IDMAC_CHA_EN(0)); + idma_enable_reg[1] = __raw_readl(IDMAC_CHA_EN(32)); + while ((__raw_readl(IDMAC_CHA_BUSY(0)) & idma_enable_reg[0]) + || (__raw_readl(IDMAC_CHA_BUSY(32)) & + idma_enable_reg[1])) { + /* disable channel not busy already */ + uint32_t chan_should_disable, timeout = 1000, time = 0; + + chan_should_disable = + __raw_readl(IDMAC_CHA_BUSY(0)) + ^ idma_enable_reg[0]; + __raw_writel((~chan_should_disable) & + idma_enable_reg[0], IDMAC_CHA_EN(0)); + chan_should_disable = + __raw_readl(IDMAC_CHA_BUSY(1)) + ^ idma_enable_reg[1]; + __raw_writel((~chan_should_disable) & + idma_enable_reg[1], IDMAC_CHA_EN(32)); + msleep(2); + time += 2; + if (time >= timeout) + return -1; + } + __raw_writel(0, IDMAC_CHA_EN(0)); + __raw_writel(0, IDMAC_CHA_EN(32)); + + /* save double buffer select regs */ + ipu_cha_db_mode_reg[0] = __raw_readl(IPU_CHA_DB_MODE_SEL(0)); + ipu_cha_db_mode_reg[1] = __raw_readl(IPU_CHA_DB_MODE_SEL(32)); + ipu_cha_db_mode_reg[2] = + __raw_readl(IPU_ALT_CHA_DB_MODE_SEL(0)); + ipu_cha_db_mode_reg[3] = + __raw_readl(IPU_ALT_CHA_DB_MODE_SEL(32)); + + /* save current buffer regs */ + ipu_cha_cur_buf_reg[0] = __raw_readl(IPU_CHA_CUR_BUF(0)); + ipu_cha_cur_buf_reg[1] = __raw_readl(IPU_CHA_CUR_BUF(32)); + ipu_cha_cur_buf_reg[2] = __raw_readl(IPU_ALT_CUR_BUF0); + ipu_cha_cur_buf_reg[3] = __raw_readl(IPU_ALT_CUR_BUF1); + + /* save sub-modules status and disable all */ + ic_conf_reg = __raw_readl(IC_CONF); + __raw_writel(0, IC_CONF); + ipu_conf_reg = __raw_readl(IPU_CONF); + __raw_writel(0, IPU_CONF); + + /* save buf ready regs */ + buf_ready_reg[0] = __raw_readl(IPU_CHA_BUF0_RDY(0)); + buf_ready_reg[1] = __raw_readl(IPU_CHA_BUF0_RDY(32)); + buf_ready_reg[2] = __raw_readl(IPU_CHA_BUF1_RDY(0)); + buf_ready_reg[3] = __raw_readl(IPU_CHA_BUF1_RDY(32)); + buf_ready_reg[4] = __raw_readl(IPU_ALT_CHA_BUF0_RDY(0)); + buf_ready_reg[5] = __raw_readl(IPU_ALT_CHA_BUF0_RDY(32)); + buf_ready_reg[6] = __raw_readl(IPU_ALT_CHA_BUF1_RDY(0)); + buf_ready_reg[7] = __raw_readl(IPU_ALT_CHA_BUF1_RDY(32)); + } + + mxc_pg_enable(pdev); + + return 0; +} + +static int ipu_resume(struct platform_device *pdev) +{ + mxc_pg_disable(pdev); + + if (g_ipu_clk_enabled) { + + /* restore buf ready regs */ + __raw_writel(buf_ready_reg[0], IPU_CHA_BUF0_RDY(0)); + __raw_writel(buf_ready_reg[1], IPU_CHA_BUF0_RDY(32)); + __raw_writel(buf_ready_reg[2], IPU_CHA_BUF1_RDY(0)); + __raw_writel(buf_ready_reg[3], IPU_CHA_BUF1_RDY(32)); + __raw_writel(buf_ready_reg[4], IPU_ALT_CHA_BUF0_RDY(0)); + __raw_writel(buf_ready_reg[5], IPU_ALT_CHA_BUF0_RDY(32)); + __raw_writel(buf_ready_reg[6], IPU_ALT_CHA_BUF1_RDY(0)); + __raw_writel(buf_ready_reg[7], IPU_ALT_CHA_BUF1_RDY(32)); + + /* re-enable sub-modules*/ + __raw_writel(ipu_conf_reg, IPU_CONF); + __raw_writel(ic_conf_reg, IC_CONF); + + /* restore double buffer select regs */ + __raw_writel(ipu_cha_db_mode_reg[0], IPU_CHA_DB_MODE_SEL(0)); + __raw_writel(ipu_cha_db_mode_reg[1], IPU_CHA_DB_MODE_SEL(32)); + __raw_writel(ipu_cha_db_mode_reg[2], + IPU_ALT_CHA_DB_MODE_SEL(0)); + __raw_writel(ipu_cha_db_mode_reg[3], + IPU_ALT_CHA_DB_MODE_SEL(32)); + + /* restore current buffer select regs */ + __raw_writel(~(ipu_cha_cur_buf_reg[0]), IPU_CHA_CUR_BUF(0)); + __raw_writel(~(ipu_cha_cur_buf_reg[1]), IPU_CHA_CUR_BUF(32)); + __raw_writel(~(ipu_cha_cur_buf_reg[2]), IPU_ALT_CUR_BUF0); + __raw_writel(~(ipu_cha_cur_buf_reg[3]), IPU_ALT_CUR_BUF1); + + /* restart idma channel*/ + __raw_writel(idma_enable_reg[0], IDMAC_CHA_EN(0)); + __raw_writel(idma_enable_reg[1], IDMAC_CHA_EN(32)); + } else { + clk_enable(g_ipu_clk); + _ipu_dmfc_init(dmfc_type_setup, 1); + _ipu_init_dc_mappings(); + + /* Set sync refresh channels as high priority */ + __raw_writel(0x18800000L, IDMAC_CHA_PRI(0)); + clk_disable(g_ipu_clk); + } + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcipu_driver = { + .driver = { + .name = "mxc_ipu", + }, + .probe = ipu_probe, + .remove = ipu_remove, + .suspend_late = ipu_suspend, + .resume_early = ipu_resume, +}; + +int32_t __init ipu_gen_init(void) +{ + int32_t ret; + + ret = platform_driver_register(&mxcipu_driver); + return 0; +} + +subsys_initcall(ipu_gen_init); + +static void __exit ipu_gen_uninit(void) +{ + platform_driver_unregister(&mxcipu_driver); +} + +module_exit(ipu_gen_uninit); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_regs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_regs.h @@ -0,0 +1,658 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_regs.h + * + * @brief IPU Register definitions + * + * @ingroup IPU + */ +#ifndef __IPU_REGS_INCLUDED__ +#define __IPU_REGS_INCLUDED__ + +#define IPU_DISP0_BASE 0x00000000 +#define IPU_MCU_T_DEFAULT 8 +#define IPU_DISP1_BASE (IPU_MCU_T_DEFAULT << 25) +#define IPU_CM_REG_BASE 0x1E000000 +#define IPU_IDMAC_REG_BASE 0x1E008000 +#define IPU_ISP_REG_BASE 0x1E010000 +#define IPU_DP_REG_BASE 0x1E018000 +#define IPU_IC_REG_BASE 0x1E020000 +#define IPU_IRT_REG_BASE 0x1E028000 +#define IPU_CSI0_REG_BASE 0x1E030000 +#define IPU_CSI1_REG_BASE 0x1E038000 +#define IPU_DI0_REG_BASE 0x1E040000 +#define IPU_DI1_REG_BASE 0x1E048000 +#define IPU_SMFC_REG_BASE 0x1E050000 +#define IPU_DC_REG_BASE 0x1E058000 +#define IPU_DMFC_REG_BASE 0x1E060000 +#define IPU_CPMEM_REG_BASE 0x1F000000 +#define IPU_LUT_REG_BASE 0x1F020000 +#define IPU_SRM_REG_BASE 0x1F040000 +#define IPU_TPM_REG_BASE 0x1F060000 +#define IPU_DC_TMPL_REG_BASE 0x1F080000 +#define IPU_ISP_TBPR_REG_BASE 0x1F0C0000 +#define IPU_VDI_REG_BASE 0x1E068000 + + +extern u32 *ipu_cm_reg; +extern u32 *ipu_idmac_reg; +extern u32 *ipu_dp_reg; +extern u32 *ipu_ic_reg; +extern u32 *ipu_dc_reg; +extern u32 *ipu_dc_tmpl_reg; +extern u32 *ipu_dmfc_reg; +extern u32 *ipu_di_reg[]; +extern u32 *ipu_smfc_reg; +extern u32 *ipu_csi_reg[]; +extern u32 *ipu_tpmem_base; +extern u32 *ipu_disp_base[]; +extern u32 *ipu_vdi_reg; + +/* Register addresses */ +/* IPU Common registers */ +#define IPU_CONF (ipu_cm_reg) + +#define IPU_SRM_PRI1 (ipu_cm_reg + 0x00A0/4) +#define IPU_SRM_PRI2 (ipu_cm_reg + 0x00A4/4) +#define IPU_FS_PROC_FLOW1 (ipu_cm_reg + 0x00A8/4) +#define IPU_FS_PROC_FLOW2 (ipu_cm_reg + 0x00AC/4) +#define IPU_FS_PROC_FLOW3 (ipu_cm_reg + 0x00B0/4) +#define IPU_FS_DISP_FLOW1 (ipu_cm_reg + 0x00B4/4) +#define IPU_FS_DISP_FLOW2 (ipu_cm_reg + 0x00B8/4) +#define IPU_SKIP (ipu_cm_reg + 0x00BC/4) +#define IPU_DISP_ALT_CONF (ipu_cm_reg + 0x00C0/4) +#define IPU_DISP_GEN (ipu_cm_reg + 0x00C4/4) +#define IPU_DISP_ALT1 (ipu_cm_reg + 0x00C8/4) +#define IPU_DISP_ALT2 (ipu_cm_reg + 0x00CC/4) +#define IPU_DISP_ALT3 (ipu_cm_reg + 0x00D0/4) +#define IPU_DISP_ALT4 (ipu_cm_reg + 0x00D4/4) +#define IPU_SNOOP (ipu_cm_reg + 0x00D8/4) +#define IPU_MEM_RST (ipu_cm_reg + 0x00DC/4) +#define IPU_PM (ipu_cm_reg + 0x00E0/4) +#define IPU_GPR (ipu_cm_reg + 0x00E4/4) +#define IPU_CHA_DB_MODE_SEL(ch) (ipu_cm_reg + 0x0150/4 + (ch / 32)) +#define IPU_ALT_CHA_DB_MODE_SEL(ch) (ipu_cm_reg + 0x0168/4 + (ch / 32)) +#define IPU_CHA_CUR_BUF(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x023C/4 + (ch / 32)) : \ + (ipu_cm_reg + 0x0124/4 + (ch / 32)); }) +#define IPU_ALT_CUR_BUF0 ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0244/4) : \ + (ipu_cm_reg + 0x012C/4); }) +#define IPU_ALT_CUR_BUF1 ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0248/4) : \ + (ipu_cm_reg + 0x0130/4); }) +#define IPU_SRM_STAT ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x024C/4) : \ + (ipu_cm_reg + 0x0134/4); }) +#define IPU_PROC_TASK_STAT ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0250/4) : \ + (ipu_cm_reg + 0x0138/4); }) +#define IPU_DISP_TASK_STAT ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0254/4) : \ + (ipu_cm_reg + 0x013C/4); }) +#define IPU_CHA_BUF0_RDY(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0268/4 + (ch / 32)) : \ + (ipu_cm_reg + 0x0140/4 + (ch / 32)); }) +#define IPU_CHA_BUF1_RDY(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0270/4 + (ch / 32)) : \ + (ipu_cm_reg + 0x0148/4 + (ch / 32)); }) +#define IPU_ALT_CHA_BUF0_RDY(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0278/4 + (ch / 32)) : \ + (ipu_cm_reg + 0x0158/4 + (ch / 32)); }) +#define IPU_ALT_CHA_BUF1_RDY(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0280/4 + (ch / 32)) : \ + (ipu_cm_reg + 0x0160/4 + (ch / 32)); }) + +#define IPU_INT_CTRL(n) (ipu_cm_reg + 0x003C/4 + ((n) - 1)) +#define IPU_INT_CTRL_IRQ(irq) IPU_INT_CTRL(((irq) / 32)) +#define IPU_INT_STAT_IRQ(irq) IPU_INT_STAT(((irq) / 32)) +#define IPU_INT_STAT(n) ({g_ipu_hw_rev == 2 ? \ + (ipu_cm_reg + 0x0200/4 + ((n) - 1)) : \ + (ipu_cm_reg + 0x00E8/4 + ((n) - 1)); }) + +#define IPUIRQ_2_STATREG(irq) (IPU_INT_STAT(1) + ((irq) / 32)) +#define IPUIRQ_2_CTRLREG(irq) (IPU_INT_CTRL(1) + ((irq) / 32)) +#define IPUIRQ_2_MASK(irq) (1UL << ((irq) & 0x1F)) + +#define VDI_FSIZE (ipu_vdi_reg) +#define VDI_C (ipu_vdi_reg + 0x0004/4) + +/* CMOS Sensor Interface Registers */ +#define CSI_SENS_CONF(csi) (ipu_csi_reg[csi]) +#define CSI_SENS_FRM_SIZE(csi) (ipu_csi_reg[csi] + 0x0004/4) +#define CSI_ACT_FRM_SIZE(csi) (ipu_csi_reg[csi] + 0x0008/4) +#define CSI_OUT_FRM_CTRL(csi) (ipu_csi_reg[csi] + 0x000C/4) +#define CSI_TST_CTRL(csi) (ipu_csi_reg[csi] + 0x0010/4) +#define CSI_CCIR_CODE_1(csi) (ipu_csi_reg[csi] + 0x0014/4) +#define CSI_CCIR_CODE_2(csi) (ipu_csi_reg[csi] + 0x0018/4) +#define CSI_CCIR_CODE_3(csi) (ipu_csi_reg[csi] + 0x001C/4) +#define CSI_MIPI_DI(csi) (ipu_csi_reg[csi] + 0x0020/4) +#define CSI_SKIP(csi) (ipu_csi_reg[csi] + 0x0024/4) +#define CSI_CPD_CTRL(csi) (ipu_csi_reg[csi] + 0x0028/4) +#define CSI_CPD_RC(csi, n) (ipu_csi_reg[csi] + 0x002C/4 + n) +#define CSI_CPD_RS(csi, n) (ipu_csi_reg[csi] + 0x004C/4 + n) +#define CSI_CPD_GRC(csi, n) (ipu_csi_reg[csi] + 0x005C/4 + n) +#define CSI_CPD_GRS(csi, n) (ipu_csi_reg[csi] + 0x007C/4 + n) +#define CSI_CPD_GBC(csi, n) (ipu_csi_reg[csi] + 0x008C/4 + n) +#define CSI_CPD_GBS(csi, n) (ipu_csi_reg[csi] + 0x00AC/4 + n) +#define CSI_CPD_BC(csi, n) (ipu_csi_reg[csi] + 0x00BC/4 + n) +#define CSI_CPD_BS(csi, n) (ipu_csi_reg[csi] + 0x00DC/4 + n) +#define CSI_CPD_OFFSET1(csi) (ipu_csi_reg[csi] + 0x00EC/4) +#define CSI_CPD_OFFSET2(csi) (ipu_csi_reg[csi] + 0x00F0/4) + +/*SMFC Registers */ +#define SMFC_MAP (ipu_smfc_reg) +#define SMFC_WMC (ipu_smfc_reg + 0x0004/4) +#define SMFC_BS (ipu_smfc_reg + 0x0008/4) + +/* Image Converter Registers */ +#define IC_CONF (ipu_ic_reg) +#define IC_PRP_ENC_RSC (ipu_ic_reg + 0x0004/4) +#define IC_PRP_VF_RSC (ipu_ic_reg + 0x0008/4) +#define IC_PP_RSC (ipu_ic_reg + 0x000C/4) +#define IC_CMBP_1 (ipu_ic_reg + 0x0010/4) +#define IC_CMBP_2 (ipu_ic_reg + 0x0014/4) +#define IC_IDMAC_1 (ipu_ic_reg + 0x0018/4) +#define IC_IDMAC_2 (ipu_ic_reg + 0x001C/4) +#define IC_IDMAC_3 (ipu_ic_reg + 0x0020/4) +#define IC_IDMAC_4 (ipu_ic_reg + 0x0024/4) + +#define IDMAC_CONF (ipu_idmac_reg + 0x0000) +#define IDMAC_CHA_EN(ch) (ipu_idmac_reg + 0x0004/4 + (ch/32)) +#define IDMAC_SEP_ALPHA (ipu_idmac_reg + 0x000C/4) +#define IDMAC_ALT_SEP_ALPHA (ipu_idmac_reg + 0x0010/4) +#define IDMAC_CHA_PRI(ch) (ipu_idmac_reg + 0x0014/4 + (ch/32)) +#define IDMAC_WM_EN(ch) (ipu_idmac_reg + 0x001C/4 + (ch/32)) +#define IDMAC_CH_LOCK_EN_1 ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0024/4) : 0; }) +#define IDMAC_CH_LOCK_EN_2 ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0028/4) : \ + (ipu_idmac_reg + 0x0024/4); }) +#define IDMAC_SUB_ADDR_0 ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x002C/4) : \ + (ipu_idmac_reg + 0x0028/4); }) +#define IDMAC_SUB_ADDR_1 ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0030/4) : \ + (ipu_idmac_reg + 0x002C/4); }) +#define IDMAC_SUB_ADDR_2 ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0034/4) : \ + (ipu_idmac_reg + 0x0030/4); }) +#define IDMAC_BAND_EN(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0040/4 + (ch/32)) : \ + (ipu_idmac_reg + 0x0034/4 + (ch/32)); }) +#define IDMAC_CHA_BUSY(ch) ({g_ipu_hw_rev == 2 ? \ + (ipu_idmac_reg + 0x0100/4 + (ch/32)) : \ + (ipu_idmac_reg + 0x0040/4 + (ch/32)); }) + +#define DI_GENERAL(di) (ipu_di_reg[di]) +#define DI_BS_CLKGEN0(di) (ipu_di_reg[di] + 0x0004/4) +#define DI_BS_CLKGEN1(di) (ipu_di_reg[di] + 0x0008/4) + +#define DI_SW_GEN0(di, gen) (ipu_di_reg[di] + 0x000C/4 + (gen - 1)) +#define DI_SW_GEN1(di, gen) (ipu_di_reg[di] + 0x0030/4 + (gen - 1)) +#define DI_STP_REP(di, gen) (ipu_di_reg[di] + 0x0148/4 + (gen - 1)/2) +#define DI_SYNC_AS_GEN(di) (ipu_di_reg[di] + 0x0054/4) +#define DI_DW_GEN(di, gen) (ipu_di_reg[di] + 0x0058/4 + gen) +#define DI_DW_SET(di, gen, set) (ipu_di_reg[di] + 0x0088/4 + gen + 0xC*set) +#define DI_SER_CONF(di) (ipu_di_reg[di] + 0x015C/4) +#define DI_SSC(di) (ipu_di_reg[di] + 0x0160/4) +#define DI_POL(di) (ipu_di_reg[di] + 0x0164/4) +#define DI_AW0(di) (ipu_di_reg[di] + 0x0168/4) +#define DI_AW1(di) (ipu_di_reg[di] + 0x016C/4) +#define DI_SCR_CONF(di) (ipu_di_reg[di] + 0x0170/4) +#define DI_STAT(di) (ipu_di_reg[di] + 0x0174/4) + +#define DMFC_RD_CHAN (ipu_dmfc_reg) +#define DMFC_WR_CHAN (ipu_dmfc_reg + 0x0004/4) +#define DMFC_WR_CHAN_DEF (ipu_dmfc_reg + 0x0008/4) +#define DMFC_DP_CHAN (ipu_dmfc_reg + 0x000C/4) +#define DMFC_DP_CHAN_DEF (ipu_dmfc_reg + 0x0010/4) +#define DMFC_GENERAL1 (ipu_dmfc_reg + 0x0014/4) +#define DMFC_GENERAL2 (ipu_dmfc_reg + 0x0018/4) +#define DMFC_IC_CTRL (ipu_dmfc_reg + 0x001C/4) +#define DMFC_STAT (ipu_dmfc_reg + 0x0020/4) + +#define DC_MAP_CONF_PTR(n) (ipu_dc_reg + 0x0108/4 + n/2) +#define DC_MAP_CONF_VAL(n) (ipu_dc_reg + 0x0144/4 + n/2) + +#define _RL_CH_2_OFFSET(ch) ((ch == 0) ? 8 : ( \ + (ch == 1) ? 0x24 : ( \ + (ch == 2) ? 0x40 : ( \ + (ch == 5) ? 0x64 : ( \ + (ch == 6) ? 0x80 : ( \ + (ch == 8) ? 0x9C : ( \ + (ch == 9) ? 0xBC : (-1)))))))) +#define DC_RL_CH(ch, evt) (ipu_dc_reg + _RL_CH_2_OFFSET(ch)/4 + evt/2) + +#define DC_EVT_NF 0 +#define DC_EVT_NL 1 +#define DC_EVT_EOF 2 +#define DC_EVT_NFIELD 3 +#define DC_EVT_EOL 4 +#define DC_EVT_EOFIELD 5 +#define DC_EVT_NEW_ADDR 6 +#define DC_EVT_NEW_CHAN 7 +#define DC_EVT_NEW_DATA 8 + +#define DC_EVT_NEW_ADDR_W_0 0 +#define DC_EVT_NEW_ADDR_W_1 1 +#define DC_EVT_NEW_CHAN_W_0 2 +#define DC_EVT_NEW_CHAN_W_1 3 +#define DC_EVT_NEW_DATA_W_0 4 +#define DC_EVT_NEW_DATA_W_1 5 +#define DC_EVT_NEW_ADDR_R_0 6 +#define DC_EVT_NEW_ADDR_R_1 7 +#define DC_EVT_NEW_CHAN_R_0 8 +#define DC_EVT_NEW_CHAN_R_1 9 +#define DC_EVT_NEW_DATA_R_0 10 +#define DC_EVT_NEW_DATA_R_1 11 + +#define dc_ch_offset(ch) \ +({ \ + const u8 _offset[] = { \ + 0, 0x1C, 0x38, 0x54, 0x58, 0x5C, 0x78, 0, 0x94, 0xB4}; \ + _offset[ch]; \ +}) +#define DC_WR_CH_CONF(ch) (ipu_dc_reg + dc_ch_offset(ch)/4) +#define DC_WR_CH_ADDR(ch) (ipu_dc_reg + dc_ch_offset(ch)/4 + 4/4) + +#define DC_WR_CH_CONF_1 (ipu_dc_reg + 0x001C/4) +#define DC_WR_CH_ADDR_1 (ipu_dc_reg + 0x0020/4) +#define DC_WR_CH_CONF_5 (ipu_dc_reg + 0x005C/4) +#define DC_WR_CH_ADDR_5 (ipu_dc_reg + 0x0060/4) +#define DC_GEN (ipu_dc_reg + 0x00D4/4) +#define DC_DISP_CONF1(disp) (ipu_dc_reg + 0x00D8/4 + disp) +#define DC_DISP_CONF2(disp) (ipu_dc_reg + 0x00E8/4 + disp) +#define DC_STAT (ipu_dc_reg + 0x01C8/4) +#define DC_UGDE_0(evt) (ipu_dc_reg + 0x0174/4 + evt*4) +#define DC_UGDE_1(evt) (ipu_dc_reg + 0x0178/4 + evt*4) +#define DC_UGDE_2(evt) (ipu_dc_reg + 0x017C/4 + evt*4) +#define DC_UGDE_3(evt) (ipu_dc_reg + 0x0180/4 + evt*4) + +#define DP_SYNC 0 +#define DP_ASYNC0 0x60 +#define DP_ASYNC1 0xBC +#define DP_COM_CONF(flow) (ipu_dp_reg + flow/4) +#define DP_GRAPH_WIND_CTRL(flow) (ipu_dp_reg + 0x0004/4 + flow/4) +#define DP_FG_POS(flow) (ipu_dp_reg + 0x0008/4 + flow/4) +#define DP_GAMMA_C(flow, i) (ipu_dp_reg + 0x0014/4 + flow/4 + i) +#define DP_GAMMA_S(flow, i) (ipu_dp_reg + 0x0034/4 + flow/4 + i) +#define DP_CSC_A_0(flow) (ipu_dp_reg + 0x0044/4 + flow/4) +#define DP_CSC_A_1(flow) (ipu_dp_reg + 0x0048/4 + flow/4) +#define DP_CSC_A_2(flow) (ipu_dp_reg + 0x004C/4 + flow/4) +#define DP_CSC_A_3(flow) (ipu_dp_reg + 0x0050/4 + flow/4) +#define DP_CSC_0(flow) (ipu_dp_reg + 0x0054/4 + flow/4) +#define DP_CSC_1(flow) (ipu_dp_reg + 0x0058/4 + flow/4) + +/* Software reset for ipu */ +#define SW_IPU_RST 8 + +enum { + IPU_CONF_CSI0_EN = 0x00000001, + IPU_CONF_CSI1_EN = 0x00000002, + IPU_CONF_IC_EN = 0x00000004, + IPU_CONF_ROT_EN = 0x00000008, + IPU_CONF_ISP_EN = 0x00000010, + IPU_CONF_DP_EN = 0x00000020, + IPU_CONF_DI0_EN = 0x00000040, + IPU_CONF_DI1_EN = 0x00000080, + IPU_CONF_DMFC_EN = 0x00000400, + IPU_CONF_SMFC_EN = 0x00000100, + IPU_CONF_DC_EN = 0x00000200, + IPU_CONF_VDI_EN = 0x00001000, + IPU_CONF_IDMAC_DIS = 0x00400000, + IPU_CONF_IC_DMFC_SEL = 0x02000000, + IPU_CONF_IC_DMFC_SYNC = 0x04000000, + IPU_CONF_VDI_DMFC_SYNC = 0x08000000, + IPU_CONF_CSI0_DATA_SOURCE = 0x10000000, + IPU_CONF_CSI0_DATA_SOURCE_OFFSET = 28, + IPU_CONF_CSI1_DATA_SOURCE = 0x20000000, + IPU_CONF_IC_INPUT = 0x40000000, + IPU_CONF_CSI_SEL = 0x80000000, + + DI0_COUNTER_RELEASE = 0x01000000, + DI1_COUNTER_RELEASE = 0x02000000, + + FS_PRPVF_ROT_SRC_SEL_MASK = 0x00000F00, + FS_PRPVF_ROT_SRC_SEL_OFFSET = 8, + FS_PRPENC_ROT_SRC_SEL_MASK = 0x0000000F, + FS_PRPENC_ROT_SRC_SEL_OFFSET = 0, + FS_PP_ROT_SRC_SEL_MASK = 0x000F0000, + FS_PP_ROT_SRC_SEL_OFFSET = 16, + FS_PP_SRC_SEL_MASK = 0x0000F000, + FS_PP_SRC_SEL_OFFSET = 12, + FS_PRP_SRC_SEL_MASK = 0x0F000000, + FS_PRP_SRC_SEL_OFFSET = 24, + FS_VF_IN_VALID = 0x80000000, + FS_ENC_IN_VALID = 0x40000000, + FS_VDI_SRC_SEL_MASK = 0x30000000, + FS_VDI_SRC_SEL_OFFSET = 28, + + + FS_PRPENC_DEST_SEL_MASK = 0x0000000F, + FS_PRPENC_DEST_SEL_OFFSET = 0, + FS_PRPVF_DEST_SEL_MASK = 0x000000F0, + FS_PRPVF_DEST_SEL_OFFSET = 4, + FS_PRPVF_ROT_DEST_SEL_MASK = 0x00000F00, + FS_PRPVF_ROT_DEST_SEL_OFFSET = 8, + FS_PP_DEST_SEL_MASK = 0x0000F000, + FS_PP_DEST_SEL_OFFSET = 12, + FS_PP_ROT_DEST_SEL_MASK = 0x000F0000, + FS_PP_ROT_DEST_SEL_OFFSET = 16, + FS_PRPENC_ROT_DEST_SEL_MASK = 0x00F00000, + FS_PRPENC_ROT_DEST_SEL_OFFSET = 20, + + FS_SMFC0_DEST_SEL_MASK = 0x0000000F, + FS_SMFC0_DEST_SEL_OFFSET = 0, + FS_SMFC1_DEST_SEL_MASK = 0x00000070, + FS_SMFC1_DEST_SEL_OFFSET = 4, + FS_SMFC2_DEST_SEL_MASK = 0x00000780, + FS_SMFC2_DEST_SEL_OFFSET = 7, + FS_SMFC3_DEST_SEL_MASK = 0x00003800, + FS_SMFC3_DEST_SEL_OFFSET = 11, + + FS_DC1_SRC_SEL_MASK = 0x00F00000, + FS_DC1_SRC_SEL_OFFSET = 20, + FS_DC2_SRC_SEL_MASK = 0x000F0000, + FS_DC2_SRC_SEL_OFFSET = 16, + FS_DP_SYNC0_SRC_SEL_MASK = 0x0000000F, + FS_DP_SYNC0_SRC_SEL_OFFSET = 0, + FS_DP_SYNC1_SRC_SEL_MASK = 0x000000F0, + FS_DP_SYNC1_SRC_SEL_OFFSET = 4, + FS_DP_ASYNC0_SRC_SEL_MASK = 0x00000F00, + FS_DP_ASYNC0_SRC_SEL_OFFSET = 8, + FS_DP_ASYNC1_SRC_SEL_MASK = 0x0000F000, + FS_DP_ASYNC1_SRC_SEL_OFFSET = 12, + + FS_AUTO_REF_PER_MASK = 0, + FS_AUTO_REF_PER_OFFSET = 16, + + TSTAT_VF_MASK = 0x0000000C, + TSTAT_VF_OFFSET = 2, + TSTAT_VF_ROT_MASK = 0x00000300, + TSTAT_VF_ROT_OFFSET = 8, + TSTAT_ENC_MASK = 0x00000003, + TSTAT_ENC_OFFSET = 0, + TSTAT_ENC_ROT_MASK = 0x000000C0, + TSTAT_ENC_ROT_OFFSET = 6, + TSTAT_PP_MASK = 0x00000030, + TSTAT_PP_OFFSET = 4, + TSTAT_PP_ROT_MASK = 0x00000C00, + TSTAT_PP_ROT_OFFSET = 10, + + TASK_STAT_IDLE = 0, + TASK_STAT_ACTIVE = 1, + TASK_STAT_WAIT4READY = 2, + + /* Image Converter Register bits */ + IC_CONF_PRPENC_EN = 0x00000001, + IC_CONF_PRPENC_CSC1 = 0x00000002, + IC_CONF_PRPENC_ROT_EN = 0x00000004, + IC_CONF_PRPVF_EN = 0x00000100, + IC_CONF_PRPVF_CSC1 = 0x00000200, + IC_CONF_PRPVF_CSC2 = 0x00000400, + IC_CONF_PRPVF_CMB = 0x00000800, + IC_CONF_PRPVF_ROT_EN = 0x00001000, + IC_CONF_PP_EN = 0x00010000, + IC_CONF_PP_CSC1 = 0x00020000, + IC_CONF_PP_CSC2 = 0x00040000, + IC_CONF_PP_CMB = 0x00080000, + IC_CONF_PP_ROT_EN = 0x00100000, + IC_CONF_IC_GLB_LOC_A = 0x10000000, + IC_CONF_KEY_COLOR_EN = 0x20000000, + IC_CONF_RWS_EN = 0x40000000, + IC_CONF_CSI_MEM_WR_EN = 0x80000000, + + IC_IDMAC_1_CB0_BURST_16 = 0x00000001, + IC_IDMAC_1_CB1_BURST_16 = 0x00000002, + IC_IDMAC_1_CB2_BURST_16 = 0x00000004, + IC_IDMAC_1_CB3_BURST_16 = 0x00000008, + IC_IDMAC_1_CB4_BURST_16 = 0x00000010, + IC_IDMAC_1_CB5_BURST_16 = 0x00000020, + IC_IDMAC_1_CB6_BURST_16 = 0x00000040, + IC_IDMAC_1_CB7_BURST_16 = 0x00000080, + IC_IDMAC_1_PRPENC_ROT_MASK = 0x00003800, + IC_IDMAC_1_PRPENC_ROT_OFFSET = 11, + IC_IDMAC_1_PRPVF_ROT_MASK = 0x0001C000, + IC_IDMAC_1_PRPVF_ROT_OFFSET = 14, + IC_IDMAC_1_PP_ROT_MASK = 0x000E0000, + IC_IDMAC_1_PP_ROT_OFFSET = 17, + IC_IDMAC_1_PP_FLIP_RS = 0x00400000, + IC_IDMAC_1_PRPVF_FLIP_RS = 0x00200000, + IC_IDMAC_1_PRPENC_FLIP_RS = 0x00100000, + + IC_IDMAC_2_PRPENC_HEIGHT_MASK = 0x000003FF, + IC_IDMAC_2_PRPENC_HEIGHT_OFFSET = 0, + IC_IDMAC_2_PRPVF_HEIGHT_MASK = 0x000FFC00, + IC_IDMAC_2_PRPVF_HEIGHT_OFFSET = 10, + IC_IDMAC_2_PP_HEIGHT_MASK = 0x3FF00000, + IC_IDMAC_2_PP_HEIGHT_OFFSET = 20, + + IC_IDMAC_3_PRPENC_WIDTH_MASK = 0x000003FF, + IC_IDMAC_3_PRPENC_WIDTH_OFFSET = 0, + IC_IDMAC_3_PRPVF_WIDTH_MASK = 0x000FFC00, + IC_IDMAC_3_PRPVF_WIDTH_OFFSET = 10, + IC_IDMAC_3_PP_WIDTH_MASK = 0x3FF00000, + IC_IDMAC_3_PP_WIDTH_OFFSET = 20, + + CSI_SENS_CONF_DATA_FMT_SHIFT = 8, + CSI_SENS_CONF_DATA_FMT_MASK = 0x00000700, + CSI_SENS_CONF_DATA_FMT_RGB_YUV444 = 0L, + CSI_SENS_CONF_DATA_FMT_YUV422_YUYV = 1L, + CSI_SENS_CONF_DATA_FMT_YUV422_UYVY = 2L, + CSI_SENS_CONF_DATA_FMT_BAYER = 3L, + CSI_SENS_CONF_DATA_FMT_RGB565 = 4L, + CSI_SENS_CONF_DATA_FMT_RGB555 = 5L, + CSI_SENS_CONF_DATA_FMT_RGB444 = 6L, + CSI_SENS_CONF_DATA_FMT_JPEG = 7L, + + CSI_SENS_CONF_VSYNC_POL_SHIFT = 0, + CSI_SENS_CONF_HSYNC_POL_SHIFT = 1, + CSI_SENS_CONF_DATA_POL_SHIFT = 2, + CSI_SENS_CONF_PIX_CLK_POL_SHIFT = 3, + CSI_SENS_CONF_SENS_PRTCL_SHIFT = 4, + CSI_SENS_CONF_PACK_TIGHT_SHIFT = 7, + CSI_SENS_CONF_DATA_WIDTH_SHIFT = 11, + CSI_SENS_CONF_EXT_VSYNC_SHIFT = 15, + CSI_SENS_CONF_DIVRATIO_SHIFT = 16, + + CSI_SENS_CONF_DIVRATIO_MASK = 0x00FF0000L, + CSI_SENS_CONF_DATA_DEST_SHIFT = 24, + CSI_SENS_CONF_DATA_DEST_MASK = 0x07000000L, + CSI_SENS_CONF_JPEG8_EN_SHIFT = 27, + CSI_SENS_CONF_JPEG_EN_SHIFT = 28, + CSI_SENS_CONF_FORCE_EOF_SHIFT = 29, + CSI_SENS_CONF_DATA_EN_POL_SHIFT = 31, + + CSI_DATA_DEST_ISP = 1L, + CSI_DATA_DEST_IC = 2L, + CSI_DATA_DEST_IDMAC = 4L, + + CSI_CCIR_ERR_DET_EN = 0x01000000L, + CSI_HORI_DOWNSIZE_EN = 0x80000000L, + CSI_VERT_DOWNSIZE_EN = 0x40000000L, + CSI_TEST_GEN_MODE_EN = 0x01000000L, + + CSI_HSC_MASK = 0x1FFF0000, + CSI_HSC_SHIFT = 16, + CSI_VSC_MASK = 0x00000FFF, + CSI_VSC_SHIFT = 0, + + CSI_TEST_GEN_R_MASK = 0x000000FFL, + CSI_TEST_GEN_R_SHIFT = 0, + CSI_TEST_GEN_G_MASK = 0x0000FF00L, + CSI_TEST_GEN_G_SHIFT = 8, + CSI_TEST_GEN_B_MASK = 0x00FF0000L, + CSI_TEST_GEN_B_SHIFT = 16, + + CSI_MIPI_DI0_MASK = 0x000000FFL, + CSI_MIPI_DI0_SHIFT = 0, + CSI_MIPI_DI1_MASK = 0x0000FF00L, + CSI_MIPI_DI1_SHIFT = 8, + CSI_MIPI_DI2_MASK = 0x00FF0000L, + CSI_MIPI_DI2_SHIFT = 16, + CSI_MIPI_DI3_MASK = 0xFF000000L, + CSI_MIPI_DI3_SHIFT = 24, + + CSI_MAX_RATIO_SKIP_ISP_MASK = 0x00070000L, + CSI_MAX_RATIO_SKIP_ISP_SHIFT = 16, + CSI_SKIP_ISP_MASK = 0x00F80000L, + CSI_SKIP_ISP_SHIFT = 19, + CSI_MAX_RATIO_SKIP_SMFC_MASK = 0x00000007L, + CSI_MAX_RATIO_SKIP_SMFC_SHIFT = 0, + CSI_SKIP_SMFC_MASK = 0x000000F8L, + CSI_SKIP_SMFC_SHIFT = 3, + CSI_ID_2_SKIP_MASK = 0x00000300L, + CSI_ID_2_SKIP_SHIFT = 8, + + CSI_COLOR_FIRST_ROW_MASK = 0x00000002L, + CSI_COLOR_FIRST_COMP_MASK = 0x00000001L, + + SMFC_MAP_CH0_MASK = 0x00000007L, + SMFC_MAP_CH0_SHIFT = 0, + SMFC_MAP_CH1_MASK = 0x00000038L, + SMFC_MAP_CH1_SHIFT = 3, + SMFC_MAP_CH2_MASK = 0x000001C0L, + SMFC_MAP_CH2_SHIFT = 6, + SMFC_MAP_CH3_MASK = 0x00000E00L, + SMFC_MAP_CH3_SHIFT = 9, + + SMFC_WM0_SET_MASK = 0x00000007L, + SMFC_WM0_SET_SHIFT = 0, + SMFC_WM1_SET_MASK = 0x000001C0L, + SMFC_WM1_SET_SHIFT = 6, + SMFC_WM2_SET_MASK = 0x00070000L, + SMFC_WM2_SET_SHIFT = 16, + SMFC_WM3_SET_MASK = 0x01C00000L, + SMFC_WM3_SET_SHIFT = 22, + + SMFC_WM0_CLR_MASK = 0x00000038L, + SMFC_WM0_CLR_SHIFT = 3, + SMFC_WM1_CLR_MASK = 0x00000E00L, + SMFC_WM1_CLR_SHIFT = 9, + SMFC_WM2_CLR_MASK = 0x00380000L, + SMFC_WM2_CLR_SHIFT = 19, + SMFC_WM3_CLR_MASK = 0x0E000000L, + SMFC_WM3_CLR_SHIFT = 25, + + SMFC_BS0_MASK = 0x0000000FL, + SMFC_BS0_SHIFT = 0, + SMFC_BS1_MASK = 0x000000F0L, + SMFC_BS1_SHIFT = 4, + SMFC_BS2_MASK = 0x00000F00L, + SMFC_BS2_SHIFT = 8, + SMFC_BS3_MASK = 0x0000F000L, + SMFC_BS3_SHIFT = 12, + + PF_CONF_TYPE_MASK = 0x00000007, + PF_CONF_TYPE_SHIFT = 0, + PF_CONF_PAUSE_EN = 0x00000010, + PF_CONF_RESET = 0x00008000, + PF_CONF_PAUSE_ROW_MASK = 0x00FF0000, + PF_CONF_PAUSE_ROW_SHIFT = 16, + + DI_DW_GEN_ACCESS_SIZE_OFFSET = 24, + DI_DW_GEN_COMPONENT_SIZE_OFFSET = 16, + + DI_GEN_DI_CLK_EXT = 0x100000, + DI_GEN_POLARITY_1 = 0x00000001, + DI_GEN_POLARITY_2 = 0x00000002, + DI_GEN_POLARITY_3 = 0x00000004, + DI_GEN_POLARITY_4 = 0x00000008, + DI_GEN_POLARITY_5 = 0x00000010, + DI_GEN_POLARITY_6 = 0x00000020, + DI_GEN_POLARITY_7 = 0x00000040, + DI_GEN_POLARITY_8 = 0x00000080, + + DI_POL_DRDY_DATA_POLARITY = 0x00000080, + DI_POL_DRDY_POLARITY_15 = 0x00000010, + + DI_VSYNC_SEL_OFFSET = 13, + + DC_WR_CH_CONF_FIELD_MODE = 0x00000200, + DC_WR_CH_CONF_PROG_TYPE_OFFSET = 5, + DC_WR_CH_CONF_PROG_TYPE_MASK = 0x000000E0, + DC_WR_CH_CONF_PROG_DI_ID = 0x00000004, + DC_WR_CH_CONF_PROG_DISP_ID_OFFSET = 3, + DC_WR_CH_CONF_PROG_DISP_ID_MASK = 0x00000018, + + DC_UGDE_0_ODD_EN = 0x02000000, + DC_UGDE_0_ID_CODED_MASK = 0x00000007, + DC_UGDE_0_ID_CODED_OFFSET = 0, + DC_UGDE_0_EV_PRIORITY_MASK = 0x00000078, + DC_UGDE_0_EV_PRIORITY_OFFSET = 3, + + DP_COM_CONF_FG_EN = 0x00000001, + DP_COM_CONF_GWSEL = 0x00000002, + DP_COM_CONF_GWAM = 0x00000004, + DP_COM_CONF_GWCKE = 0x00000008, + DP_COM_CONF_CSC_DEF_MASK = 0x00000300, + DP_COM_CONF_CSC_DEF_OFFSET = 8, + DP_COM_CONF_CSC_DEF_FG = 0x00000300, + DP_COM_CONF_CSC_DEF_BG = 0x00000200, + DP_COM_CONF_CSC_DEF_BOTH = 0x00000100, + DP_COM_CONF_GAMMA_EN = 0x00001000, + DP_COM_CONF_GAMMA_YUV_EN = 0x00002000, + + DI_SER_CONF_LLA_SER_ACCESS = 0x00000020, + DI_SER_CONF_SERIAL_CLK_POL = 0x00000010, + DI_SER_CONF_SERIAL_DATA_POL = 0x00000008, + DI_SER_CONF_SERIAL_RS_POL = 0x00000004, + DI_SER_CONF_SERIAL_CS_POL = 0x00000002, + DI_SER_CONF_WAIT4SERIAL = 0x00000001, + + VDI_C_CH_420 = 0x00000000, + VDI_C_CH_422 = 0x00000002, + VDI_C_MOT_SEL_FULL = 0x00000008, + VDI_C_MOT_SEL_LOW = 0x00000004, + VDI_C_MOT_SEL_MED = 0x00000000, + VDI_C_BURST_SIZE1_4 = 0x00000030, + VDI_C_BURST_SIZE2_4 = 0x00000300, + VDI_C_BURST_SIZE3_4 = 0x00003000, + VDI_C_VWM1_SET_1 = 0x00000000, + VDI_C_VWM1_CLR_2 = 0x00080000, + VDI_C_VWM3_SET_1 = 0x00000000, + VDI_C_VWM3_CLR_2 = 0x02000000, + VDI_C_TOP_FIELD_MAN_1 = 0x40000000, + VDI_C_TOP_FIELD_AUTO_1 = 0x80000000, +}; + +enum di_pins { + DI_PIN11 = 0, + DI_PIN12 = 1, + DI_PIN13 = 2, + DI_PIN14 = 3, + DI_PIN15 = 4, + DI_PIN16 = 5, + DI_PIN17 = 6, + DI_PIN_CS = 7, + + DI_PIN_SER_CLK = 0, + DI_PIN_SER_RS = 1, +}; + +enum di_sync_wave { + DI_SYNC_NONE = -1, + DI_SYNC_CLK = 0, + DI_SYNC_INT_HSYNC = 1, + DI_SYNC_HSYNC = 2, + DI_SYNC_VSYNC = 3, + DI_SYNC_DE = 5, +}; + +/* DC template opcodes */ +#define WROD(lf) (0x18 | (lf << 1)) + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_ic.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_ic.c @@ -0,0 +1,835 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_ic.c + * + * @brief IPU IC functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +enum { + IC_TASK_VIEWFINDER, + IC_TASK_ENCODER, + IC_TASK_POST_PROCESSOR +}; + +static void _init_csc(uint8_t ic_task, ipu_color_space_t in_format, + ipu_color_space_t out_format, int csc_index); +static bool _calc_resize_coeffs(uint32_t inSize, uint32_t outSize, + uint32_t *resizeCoeff, + uint32_t *downsizeCoeff); + +void _ipu_vdi_set_top_field_man(bool top_field_0) +{ + uint32_t reg; + + reg = __raw_readl(VDI_C); + if (top_field_0) + reg &= ~VDI_C_TOP_FIELD_MAN_1; + else + reg |= VDI_C_TOP_FIELD_MAN_1; + __raw_writel(reg, VDI_C); +} + +void _ipu_vdi_set_motion(ipu_motion_sel motion_sel) +{ + uint32_t reg; + + reg = __raw_readl(VDI_C); + reg &= ~(VDI_C_MOT_SEL_FULL | VDI_C_MOT_SEL_MED | VDI_C_MOT_SEL_LOW); + if (motion_sel == HIGH_MOTION) + reg |= VDI_C_MOT_SEL_FULL; + else if (motion_sel == MED_MOTION) + reg |= VDI_C_MOT_SEL_MED; + else + reg |= VDI_C_MOT_SEL_LOW; + + __raw_writel(reg, VDI_C); +} + +void ic_dump_register(void) +{ + printk(KERN_DEBUG "IC_CONF = \t0x%08X\n", __raw_readl(IC_CONF)); + printk(KERN_DEBUG "IC_PRP_ENC_RSC = \t0x%08X\n", + __raw_readl(IC_PRP_ENC_RSC)); + printk(KERN_DEBUG "IC_PRP_VF_RSC = \t0x%08X\n", + __raw_readl(IC_PRP_VF_RSC)); + printk(KERN_DEBUG "IC_PP_RSC = \t0x%08X\n", __raw_readl(IC_PP_RSC)); + printk(KERN_DEBUG "IC_IDMAC_1 = \t0x%08X\n", __raw_readl(IC_IDMAC_1)); + printk(KERN_DEBUG "IC_IDMAC_2 = \t0x%08X\n", __raw_readl(IC_IDMAC_2)); + printk(KERN_DEBUG "IC_IDMAC_3 = \t0x%08X\n", __raw_readl(IC_IDMAC_3)); +} + +void _ipu_ic_enable_task(ipu_channel_t channel) +{ + uint32_t ic_conf; + + ic_conf = __raw_readl(IC_CONF); + switch (channel) { + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_MEM: + ic_conf |= IC_CONF_PRPVF_EN; + break; + case MEM_VDI_PRP_VF_MEM: + ic_conf |= IC_CONF_PRPVF_EN; + break; + case MEM_ROT_VF_MEM: + ic_conf |= IC_CONF_PRPVF_ROT_EN; + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + ic_conf |= IC_CONF_PRPENC_EN; + break; + case MEM_ROT_ENC_MEM: + ic_conf |= IC_CONF_PRPENC_ROT_EN; + break; + case MEM_PP_MEM: + ic_conf |= IC_CONF_PP_EN; + break; + case MEM_ROT_PP_MEM: + ic_conf |= IC_CONF_PP_ROT_EN; + break; + default: + break; + } + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_disable_task(ipu_channel_t channel) +{ + uint32_t ic_conf; + + ic_conf = __raw_readl(IC_CONF); + switch (channel) { + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_MEM: + ic_conf &= ~IC_CONF_PRPVF_EN; + break; + case MEM_VDI_PRP_VF_MEM: + ic_conf &= ~IC_CONF_PRPVF_EN; + break; + case MEM_ROT_VF_MEM: + ic_conf &= ~IC_CONF_PRPVF_ROT_EN; + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + ic_conf &= ~IC_CONF_PRPENC_EN; + break; + case MEM_ROT_ENC_MEM: + ic_conf &= ~IC_CONF_PRPENC_ROT_EN; + break; + case MEM_PP_MEM: + ic_conf &= ~IC_CONF_PP_EN; + break; + case MEM_ROT_PP_MEM: + ic_conf &= ~IC_CONF_PP_ROT_EN; + break; + default: + break; + } + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_vdi_init(ipu_channel_t channel, ipu_channel_params_t *params) +{ + uint32_t reg; + uint32_t pixel_fmt; + bool top_field_0; + + reg = ((params->mem_prp_vf_mem.in_height-1) << 16) | + (params->mem_prp_vf_mem.in_width-1); + __raw_writel(reg, VDI_FSIZE); + + /* Full motion, only vertical filter is used + Burst size is 4 accesses */ + pixel_fmt = + (params->mem_prp_vf_mem.in_pixel_fmt == + V4L2_PIX_FMT_YUV422P) ? VDI_C_CH_422 : VDI_C_CH_420; + + reg = __raw_readl(VDI_C); + reg |= pixel_fmt; + switch (channel) { + case MEM_VDI_PRP_VF_MEM: + reg |= VDI_C_BURST_SIZE2_4; + break; + case MEM_VDI_PRP_VF_MEM_P: + reg |= VDI_C_BURST_SIZE1_4 | VDI_C_VWM1_SET_1 | VDI_C_VWM1_CLR_2; + break; + case MEM_VDI_PRP_VF_MEM_N: + reg |= VDI_C_BURST_SIZE3_4 | VDI_C_VWM3_SET_1 | VDI_C_VWM3_CLR_2; + break; + default: + break; + } + __raw_writel(reg, VDI_C); + + /* MED_MOTION and LOW_MOTION algorithm that are using 3 fields + * should start presenting using the 2nd field. + */ + if (((params->mem_prp_vf_mem.field_fmt == V4L2_FIELD_INTERLACED_TB) && + (params->mem_prp_vf_mem.motion_sel != HIGH_MOTION)) || + ((params->mem_prp_vf_mem.field_fmt == V4L2_FIELD_INTERLACED_BT) && + (params->mem_prp_vf_mem.motion_sel == HIGH_MOTION))) + top_field_0 = false; + else + top_field_0 = true; + + /* Buffer selection toggle the value therefore init val is inverted. */ + _ipu_vdi_set_top_field_man(!top_field_0); + + _ipu_vdi_set_motion(params->mem_prp_vf_mem.motion_sel); + + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_RWS_EN; + __raw_writel(reg, IC_CONF); +} + +void _ipu_vdi_uninit(void) +{ + __raw_writel(0, VDI_FSIZE); + __raw_writel(0, VDI_C); +} + +void _ipu_ic_init_prpvf(ipu_channel_params_t *params, bool src_is_csi) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_prp_vf_mem.in_height, + params->mem_prp_vf_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + /* Upadeted for IC split case */ + if (!(params->mem_prp_vf_mem.out_resize_ratio)) { + _calc_resize_coeffs(params->mem_prp_vf_mem.in_width, + params->mem_prp_vf_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + } else + reg |= params->mem_prp_vf_mem.out_resize_ratio; + + __raw_writel(reg, IC_PRP_VF_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_prp_vf_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_prp_vf_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* Enable RGB->YCBCR CSC1 */ + _init_csc(IC_TASK_VIEWFINDER, RGB, out_fmt, 1); + ic_conf |= IC_CONF_PRPVF_CSC1; + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + /* Enable YCBCR->RGB CSC1 */ + _init_csc(IC_TASK_VIEWFINDER, YCbCr, RGB, 1); + ic_conf |= IC_CONF_PRPVF_CSC1; + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_prp_vf_mem.graphics_combine_en) { + ic_conf |= IC_CONF_PRPVF_CMB; + + if (!(ic_conf & IC_CONF_PRPVF_CSC1)) { + /* need transparent CSC1 conversion */ + _init_csc(IC_TASK_VIEWFINDER, RGB, RGB, 1); + ic_conf |= IC_CONF_PRPVF_CSC1; /* Enable RGB->RGB CSC */ + } + in_fmt = format_to_colorspace(params->mem_prp_vf_mem.in_g_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_prp_vf_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* Enable RGB->YCBCR CSC2 */ + _init_csc(IC_TASK_VIEWFINDER, RGB, out_fmt, 2); + ic_conf |= IC_CONF_PRPVF_CSC2; + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + /* Enable YCBCR->RGB CSC2 */ + _init_csc(IC_TASK_VIEWFINDER, YCbCr, RGB, 2); + ic_conf |= IC_CONF_PRPVF_CSC2; + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_prp_vf_mem.global_alpha_en) { + ic_conf |= IC_CONF_IC_GLB_LOC_A; + reg = __raw_readl(IC_CMBP_1); + reg &= ~(0xff); + reg |= params->mem_prp_vf_mem.alpha; + __raw_writel(reg, IC_CMBP_1); + } else + ic_conf &= ~IC_CONF_IC_GLB_LOC_A; + + if (params->mem_prp_vf_mem.key_color_en) { + ic_conf |= IC_CONF_KEY_COLOR_EN; + __raw_writel(params->mem_prp_vf_mem.key_color, + IC_CMBP_2); + } else + ic_conf &= ~IC_CONF_KEY_COLOR_EN; + } else { + ic_conf &= ~IC_CONF_PRPVF_CMB; + } + + if (src_is_csi) + ic_conf &= ~IC_CONF_RWS_EN; + else + ic_conf |= IC_CONF_RWS_EN; + + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_prpvf(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPVF_EN | IC_CONF_PRPVF_CMB | + IC_CONF_PRPVF_CSC2 | IC_CONF_PRPVF_CSC1); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_vf(ipu_channel_params_t *params) +{ +} + +void _ipu_ic_uninit_rotate_vf(void) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_PRPVF_ROT_EN; + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_prpenc(ipu_channel_params_t *params, bool src_is_csi) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_prp_enc_mem.in_height, + params->mem_prp_enc_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + /* Upadeted for IC split case */ + if (!(params->mem_prp_enc_mem.out_resize_ratio)) { + _calc_resize_coeffs(params->mem_prp_enc_mem.in_width, + params->mem_prp_enc_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + } else + reg |= params->mem_prp_enc_mem.out_resize_ratio; + + __raw_writel(reg, IC_PRP_ENC_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_prp_enc_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_prp_enc_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* Enable RGB->YCBCR CSC1 */ + _init_csc(IC_TASK_ENCODER, RGB, out_fmt, 1); + ic_conf |= IC_CONF_PRPENC_CSC1; + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + /* Enable YCBCR->RGB CSC1 */ + _init_csc(IC_TASK_ENCODER, YCbCr, RGB, 1); + ic_conf |= IC_CONF_PRPENC_CSC1; + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (src_is_csi) + ic_conf &= ~IC_CONF_RWS_EN; + else + ic_conf |= IC_CONF_RWS_EN; + + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_prpenc(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPENC_EN | IC_CONF_PRPENC_CSC1); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_enc(ipu_channel_params_t *params) +{ +} + +void _ipu_ic_uninit_rotate_enc(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPENC_ROT_EN); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_pp(ipu_channel_params_t *params) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_pp_mem.in_height, + params->mem_pp_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + /* Upadeted for IC split case */ + if (!(params->mem_pp_mem.out_resize_ratio)) { + _calc_resize_coeffs(params->mem_pp_mem.in_width, + params->mem_pp_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + } else { + reg |= params->mem_pp_mem.out_resize_ratio; + } + + __raw_writel(reg, IC_PP_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_pp_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_pp_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* Enable RGB->YCBCR CSC1 */ + _init_csc(IC_TASK_POST_PROCESSOR, RGB, out_fmt, 1); + ic_conf |= IC_CONF_PP_CSC1; + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + /* Enable YCBCR->RGB CSC1 */ + _init_csc(IC_TASK_POST_PROCESSOR, YCbCr, RGB, 1); + ic_conf |= IC_CONF_PP_CSC1; + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_pp_mem.graphics_combine_en) { + ic_conf |= IC_CONF_PP_CMB; + + if (!(ic_conf & IC_CONF_PP_CSC1)) { + /* need transparent CSC1 conversion */ + _init_csc(IC_TASK_POST_PROCESSOR, RGB, RGB, 1); + ic_conf |= IC_CONF_PP_CSC1; /* Enable RGB->RGB CSC */ + } + + in_fmt = format_to_colorspace(params->mem_pp_mem.in_g_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_pp_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* Enable RGB->YCBCR CSC2 */ + _init_csc(IC_TASK_POST_PROCESSOR, RGB, out_fmt, 2); + ic_conf |= IC_CONF_PP_CSC2; + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + /* Enable YCBCR->RGB CSC2 */ + _init_csc(IC_TASK_POST_PROCESSOR, YCbCr, RGB, 2); + ic_conf |= IC_CONF_PP_CSC2; + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_pp_mem.global_alpha_en) { + ic_conf |= IC_CONF_IC_GLB_LOC_A; + reg = __raw_readl(IC_CMBP_1); + reg &= ~(0xff00); + reg |= (params->mem_pp_mem.alpha << 8); + __raw_writel(reg, IC_CMBP_1); + } else + ic_conf &= ~IC_CONF_IC_GLB_LOC_A; + + if (params->mem_pp_mem.key_color_en) { + ic_conf |= IC_CONF_KEY_COLOR_EN; + __raw_writel(params->mem_pp_mem.key_color, + IC_CMBP_2); + } else + ic_conf &= ~IC_CONF_KEY_COLOR_EN; + } else { + ic_conf &= ~IC_CONF_PP_CMB; + } + + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_pp(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PP_EN | IC_CONF_PP_CSC1 | IC_CONF_PP_CSC2 | + IC_CONF_PP_CMB); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_pp(ipu_channel_params_t *params) +{ +} + +void _ipu_ic_uninit_rotate_pp(void) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_PP_ROT_EN; + __raw_writel(reg, IC_CONF); +} + +int _ipu_ic_idma_init(int dma_chan, uint16_t width, uint16_t height, + int burst_size, ipu_rotate_mode_t rot) +{ + u32 ic_idmac_1, ic_idmac_2, ic_idmac_3; + u32 temp_rot = bitrev8(rot) >> 5; + bool need_hor_flip = false; + + if ((burst_size != 8) && (burst_size != 16)) { + dev_dbg(g_ipu_dev, "Illegal burst length for IC\n"); + return -EINVAL; + } + + width--; + height--; + + if (temp_rot & 0x2) /* Need horizontal flip */ + need_hor_flip = true; + + ic_idmac_1 = __raw_readl(IC_IDMAC_1); + ic_idmac_2 = __raw_readl(IC_IDMAC_2); + ic_idmac_3 = __raw_readl(IC_IDMAC_3); + if (dma_chan == 22) { /* PP output - CB2 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB2_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB2_BURST_16; + + if (need_hor_flip) + ic_idmac_1 |= IC_IDMAC_1_PP_FLIP_RS; + else + ic_idmac_1 &= ~IC_IDMAC_1_PP_FLIP_RS; + + ic_idmac_2 &= ~IC_IDMAC_2_PP_HEIGHT_MASK; + ic_idmac_2 |= height << IC_IDMAC_2_PP_HEIGHT_OFFSET; + + ic_idmac_3 &= ~IC_IDMAC_3_PP_WIDTH_MASK; + ic_idmac_3 |= width << IC_IDMAC_3_PP_WIDTH_OFFSET; + + } else if (dma_chan == 11) { /* PP Input - CB5 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB5_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB5_BURST_16; + } else if (dma_chan == 47) { /* PP Rot input */ + ic_idmac_1 &= ~IC_IDMAC_1_PP_ROT_MASK; + ic_idmac_1 |= temp_rot << IC_IDMAC_1_PP_ROT_OFFSET; + } + + if (dma_chan == 12) { /* PRP Input - CB6 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB6_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB6_BURST_16; + } + + if (dma_chan == 20) { /* PRP ENC output - CB0 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB0_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB0_BURST_16; + + if (need_hor_flip) + ic_idmac_1 |= IC_IDMAC_1_PRPENC_FLIP_RS; + else + ic_idmac_1 &= ~IC_IDMAC_1_PRPENC_FLIP_RS; + + ic_idmac_2 &= ~IC_IDMAC_2_PRPENC_HEIGHT_MASK; + ic_idmac_2 |= height << IC_IDMAC_2_PRPENC_HEIGHT_OFFSET; + + ic_idmac_3 &= ~IC_IDMAC_3_PRPENC_WIDTH_MASK; + ic_idmac_3 |= width << IC_IDMAC_3_PRPENC_WIDTH_OFFSET; + + } else if (dma_chan == 45) { /* PRP ENC Rot input */ + ic_idmac_1 &= ~IC_IDMAC_1_PRPENC_ROT_MASK; + ic_idmac_1 |= temp_rot << IC_IDMAC_1_PRPENC_ROT_OFFSET; + } + + if (dma_chan == 21) { /* PRP VF output - CB1 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB1_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB1_BURST_16; + + if (need_hor_flip) + ic_idmac_1 |= IC_IDMAC_1_PRPVF_FLIP_RS; + else + ic_idmac_1 &= ~IC_IDMAC_1_PRPVF_FLIP_RS; + + ic_idmac_2 &= ~IC_IDMAC_2_PRPVF_HEIGHT_MASK; + ic_idmac_2 |= height << IC_IDMAC_2_PRPVF_HEIGHT_OFFSET; + + ic_idmac_3 &= ~IC_IDMAC_3_PRPVF_WIDTH_MASK; + ic_idmac_3 |= width << IC_IDMAC_3_PRPVF_WIDTH_OFFSET; + + } else if (dma_chan == 46) { /* PRP VF Rot input */ + ic_idmac_1 &= ~IC_IDMAC_1_PRPVF_ROT_MASK; + ic_idmac_1 |= temp_rot << IC_IDMAC_1_PRPVF_ROT_OFFSET; + } + + if (dma_chan == 14) { /* PRP VF graphics combining input - CB3 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB3_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB3_BURST_16; + } else if (dma_chan == 15) { /* PP graphics combining input - CB4 */ + if (burst_size == 16) + ic_idmac_1 |= IC_IDMAC_1_CB4_BURST_16; + else + ic_idmac_1 &= ~IC_IDMAC_1_CB4_BURST_16; + } + + __raw_writel(ic_idmac_1, IC_IDMAC_1); + __raw_writel(ic_idmac_2, IC_IDMAC_2); + __raw_writel(ic_idmac_3, IC_IDMAC_3); + + return 0; +} + +static void _init_csc(uint8_t ic_task, ipu_color_space_t in_format, + ipu_color_space_t out_format, int csc_index) +{ + +/* Y = R * .299 + G * .587 + B * .114; + U = R * -.169 + G * -.332 + B * .500 + 128.; + V = R * .500 + G * -.419 + B * -.0813 + 128.;*/ + static const uint32_t rgb2ycbcr_coeff[4][3] = { + {0x004D, 0x0096, 0x001D}, + {0x01D5, 0x01AB, 0x0080}, + {0x0080, 0x0195, 0x01EB}, + {0x0000, 0x0200, 0x0200}, /* A0, A1, A2 */ + }; + + /* transparent RGB->RGB matrix for combining + */ + static const uint32_t rgb2rgb_coeff[4][3] = { + {0x0080, 0x0000, 0x0000}, + {0x0000, 0x0080, 0x0000}, + {0x0000, 0x0000, 0x0080}, + {0x0000, 0x0000, 0x0000}, /* A0, A1, A2 */ + }; + +/* R = (1.164 * (Y - 16)) + (1.596 * (Cr - 128)); + G = (1.164 * (Y - 16)) - (0.392 * (Cb - 128)) - (0.813 * (Cr - 128)); + B = (1.164 * (Y - 16)) + (2.017 * (Cb - 128); */ + static const uint32_t ycbcr2rgb_coeff[4][3] = { + {149, 0, 204}, + {149, 462, 408}, + {149, 255, 0}, + {8192 - 446, 266, 8192 - 554}, /* A0, A1, A2 */ + }; + + uint32_t param; + uint32_t *base = NULL; + + if (ic_task == IC_TASK_ENCODER) { + base = ipu_tpmem_base + 0x2008 / 4; + } else if (ic_task == IC_TASK_VIEWFINDER) { + if (csc_index == 1) + base = ipu_tpmem_base + 0x4028 / 4; + else + base = ipu_tpmem_base + 0x4040 / 4; + } else if (ic_task == IC_TASK_POST_PROCESSOR) { + if (csc_index == 1) + base = ipu_tpmem_base + 0x6060 / 4; + else + base = ipu_tpmem_base + 0x6078 / 4; + } else { + BUG(); + } + + if ((in_format == YCbCr) && (out_format == RGB)) { + /* Init CSC (YCbCr->RGB) */ + param = (ycbcr2rgb_coeff[3][0] << 27) | + (ycbcr2rgb_coeff[0][0] << 18) | + (ycbcr2rgb_coeff[1][1] << 9) | ycbcr2rgb_coeff[2][2]; + __raw_writel(param, base++); + /* scale = 2, sat = 0 */ + param = (ycbcr2rgb_coeff[3][0] >> 5) | (2L << (40 - 32)); + __raw_writel(param, base++); + + param = (ycbcr2rgb_coeff[3][1] << 27) | + (ycbcr2rgb_coeff[0][1] << 18) | + (ycbcr2rgb_coeff[1][0] << 9) | ycbcr2rgb_coeff[2][0]; + __raw_writel(param, base++); + param = (ycbcr2rgb_coeff[3][1] >> 5); + __raw_writel(param, base++); + + param = (ycbcr2rgb_coeff[3][2] << 27) | + (ycbcr2rgb_coeff[0][2] << 18) | + (ycbcr2rgb_coeff[1][2] << 9) | ycbcr2rgb_coeff[2][1]; + __raw_writel(param, base++); + param = (ycbcr2rgb_coeff[3][2] >> 5); + __raw_writel(param, base++); + } else if ((in_format == RGB) && (out_format == YCbCr)) { + /* Init CSC (RGB->YCbCr) */ + param = (rgb2ycbcr_coeff[3][0] << 27) | + (rgb2ycbcr_coeff[0][0] << 18) | + (rgb2ycbcr_coeff[1][1] << 9) | rgb2ycbcr_coeff[2][2]; + __raw_writel(param, base++); + /* scale = 1, sat = 0 */ + param = (rgb2ycbcr_coeff[3][0] >> 5) | (1UL << 8); + __raw_writel(param, base++); + + param = (rgb2ycbcr_coeff[3][1] << 27) | + (rgb2ycbcr_coeff[0][1] << 18) | + (rgb2ycbcr_coeff[1][0] << 9) | rgb2ycbcr_coeff[2][0]; + __raw_writel(param, base++); + param = (rgb2ycbcr_coeff[3][1] >> 5); + __raw_writel(param, base++); + + param = (rgb2ycbcr_coeff[3][2] << 27) | + (rgb2ycbcr_coeff[0][2] << 18) | + (rgb2ycbcr_coeff[1][2] << 9) | rgb2ycbcr_coeff[2][1]; + __raw_writel(param, base++); + param = (rgb2ycbcr_coeff[3][2] >> 5); + __raw_writel(param, base++); + } else if ((in_format == RGB) && (out_format == RGB)) { + /* Init CSC */ + param = + (rgb2rgb_coeff[3][0] << 27) | (rgb2rgb_coeff[0][0] << 18) | + (rgb2rgb_coeff[1][1] << 9) | rgb2rgb_coeff[2][2]; + __raw_writel(param, base++); + /* scale = 2, sat = 0 */ + param = (rgb2rgb_coeff[3][0] >> 5) | (2UL << 8); + __raw_writel(param, base++); + + param = + (rgb2rgb_coeff[3][1] << 27) | (rgb2rgb_coeff[0][1] << 18) | + (rgb2rgb_coeff[1][0] << 9) | rgb2rgb_coeff[2][0]; + __raw_writel(param, base++); + param = (rgb2rgb_coeff[3][1] >> 5); + __raw_writel(param, base++); + + param = + (rgb2rgb_coeff[3][2] << 27) | (rgb2rgb_coeff[0][2] << 18) | + (rgb2rgb_coeff[1][2] << 9) | rgb2rgb_coeff[2][1]; + __raw_writel(param, base++); + param = (rgb2rgb_coeff[3][2] >> 5); + __raw_writel(param, base++); + } else { + dev_err(g_ipu_dev, "Unsupported color space conversion\n"); + } +} + +static bool _calc_resize_coeffs(uint32_t inSize, uint32_t outSize, + uint32_t *resizeCoeff, + uint32_t *downsizeCoeff) +{ + uint32_t tempSize; + uint32_t tempDownsize; + + /* Input size cannot be more than 4096 */ + /* Output size cannot be more than 1024 */ + if ((inSize > 4096) || (outSize > 1024)) + return false; + + /* Cannot downsize more than 8:1 */ + if ((outSize << 3) < inSize) + return false; + + /* Compute downsizing coefficient */ + /* Output of downsizing unit cannot be more than 1024 */ + tempDownsize = 0; + tempSize = inSize; + while (((tempSize > 1024) || (tempSize >= outSize * 2)) && + (tempDownsize < 2)) { + tempSize >>= 1; + tempDownsize++; + } + *downsizeCoeff = tempDownsize; + + /* compute resizing coefficient using the following equation: + resizeCoeff = M*(SI -1)/(SO - 1) + where M = 2^13, SI - input size, SO - output size */ + *resizeCoeff = (8192L * (tempSize - 1)) / (outSize - 1); + if (*resizeCoeff >= 16384L) { + dev_err(g_ipu_dev, "Warning! Overflow on resize coeff.\n"); + *resizeCoeff = 0x3FFF; + } + + dev_dbg(g_ipu_dev, "resizing from %u -> %u pixels, " + "downsize=%u, resize=%u.%lu (reg=%u)\n", inSize, outSize, + *downsizeCoeff, (*resizeCoeff >= 8192L) ? 1 : 0, + ((*resizeCoeff & 0x1FFF) * 10000L) / 8192L, *resizeCoeff); + + return true; +} + +void _ipu_vdi_toggle_top_field_man() +{ + uint32_t reg; + uint32_t mask_reg; + + reg = __raw_readl(VDI_C); + mask_reg = reg & VDI_C_TOP_FIELD_MAN_1; + if (mask_reg == VDI_C_TOP_FIELD_MAN_1) + reg &= ~VDI_C_TOP_FIELD_MAN_1; + else + reg |= VDI_C_TOP_FIELD_MAN_1; + + __raw_writel(reg, VDI_C); +} + --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/Kconfig @@ -0,0 +1,5 @@ +config MXC_IPU_V3 + bool + +config MXC_IPU_V3D + bool --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_param_mem.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_param_mem.h @@ -0,0 +1,530 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __INCLUDE_IPU_PARAM_MEM_H__ +#define __INCLUDE_IPU_PARAM_MEM_H__ + +#include +#include + +extern u32 *ipu_cpmem_base; + +struct ipu_ch_param_word { + uint32_t data[5]; + uint32_t res[3]; +}; + +struct ipu_ch_param { + struct ipu_ch_param_word word[2]; +}; + +#define ipu_ch_param_addr(ch) (((struct ipu_ch_param *)ipu_cpmem_base) + (ch)) + +#define _param_word(base, w) \ + (((struct ipu_ch_param *)(base))->word[(w)].data) + +#define ipu_ch_param_set_field(base, w, bit, size, v) { \ + int i = (bit) / 32; \ + int off = (bit) % 32; \ + _param_word(base, w)[i] |= (v) << off; \ + if (((bit)+(size)-1)/32 > i) { \ + _param_word(base, w)[i + 1] |= (v) >> (off ? (32 - off) : 0); \ + } \ +} + +#define ipu_ch_param_mod_field(base, w, bit, size, v) { \ + int i = (bit) / 32; \ + int off = (bit) % 32; \ + u32 mask = (1UL << size) - 1; \ + u32 temp = _param_word(base, w)[i]; \ + temp &= ~(mask << off); \ + _param_word(base, w)[i] = temp | (v) << off; \ + if (((bit)+(size)-1)/32 > i) { \ + temp = _param_word(base, w)[i + 1]; \ + temp &= ~(mask >> (32 - off)); \ + _param_word(base, w)[i + 1] = \ + temp | ((v) >> (off ? (32 - off) : 0)); \ + } \ +} + +#define ipu_ch_param_read_field(base, w, bit, size) ({ \ + u32 temp2; \ + int i = (bit) / 32; \ + int off = (bit) % 32; \ + u32 mask = (1UL << size) - 1; \ + u32 temp1 = _param_word(base, w)[i]; \ + temp1 = mask & (temp1 >> off); \ + if (((bit)+(size)-1)/32 > i) { \ + temp2 = _param_word(base, w)[i + 1]; \ + temp2 &= mask >> (off ? (32 - off) : 0); \ + temp1 |= temp2 << (off ? (32 - off) : 0); \ + } \ + temp1; \ +}) + +static inline void _ipu_ch_params_set_packing(struct ipu_ch_param *p, + int red_width, int red_offset, + int green_width, int green_offset, + int blue_width, int blue_offset, + int alpha_width, int alpha_offset) +{ + /* Setup red width and offset */ + ipu_ch_param_set_field(p, 1, 116, 3, red_width - 1); + ipu_ch_param_set_field(p, 1, 128, 5, red_offset); + /* Setup green width and offset */ + ipu_ch_param_set_field(p, 1, 119, 3, green_width - 1); + ipu_ch_param_set_field(p, 1, 133, 5, green_offset); + /* Setup blue width and offset */ + ipu_ch_param_set_field(p, 1, 122, 3, blue_width - 1); + ipu_ch_param_set_field(p, 1, 138, 5, blue_offset); + /* Setup alpha width and offset */ + ipu_ch_param_set_field(p, 1, 125, 3, alpha_width - 1); + ipu_ch_param_set_field(p, 1, 143, 5, alpha_offset); +} + +static inline void _ipu_ch_param_dump(int ch) +{ + struct ipu_ch_param *p = ipu_ch_param_addr(ch); + pr_debug("ch %d word 0 - %08X %08X %08X %08X %08X\n", ch, + p->word[0].data[0], p->word[0].data[1], p->word[0].data[2], + p->word[0].data[3], p->word[0].data[4]); + pr_debug("ch %d word 1 - %08X %08X %08X %08X %08X\n", ch, + p->word[1].data[0], p->word[1].data[1], p->word[1].data[2], + p->word[1].data[3], p->word[1].data[4]); + pr_debug("PFS 0x%x, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 85, 4)); + pr_debug("BPP 0x%x, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 107, 3)); + pr_debug("NPB 0x%x\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 78, 7)); + + pr_debug("FW %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 125, 13)); + pr_debug("FH %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 138, 12)); + pr_debug("Stride %d\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 102, 14)); + + pr_debug("Width0 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 116, 3)); + pr_debug("Width1 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 119, 3)); + pr_debug("Width2 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 122, 3)); + pr_debug("Width3 %d+1, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 125, 3)); + pr_debug("Offset0 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 128, 5)); + pr_debug("Offset1 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 133, 5)); + pr_debug("Offset2 %d, ", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 138, 5)); + pr_debug("Offset3 %d\n", + ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 143, 5)); +} + +static inline void _ipu_ch_param_init(int ch, + uint32_t pixel_fmt, uint32_t width, + uint32_t height, uint32_t stride, + uint32_t u, uint32_t v, + uint32_t uv_stride, dma_addr_t addr0, + dma_addr_t addr1) +{ + uint32_t u_offset = 0; + uint32_t v_offset = 0; + struct ipu_ch_param params; + + memset(¶ms, 0, sizeof(params)); + + ipu_ch_param_set_field(¶ms, 0, 125, 13, width - 1); + + if ((ch == 8) || (ch == 9) || (ch == 10)) { + ipu_ch_param_set_field(¶ms, 0, 138, 12, (height / 2) - 1); + ipu_ch_param_set_field(¶ms, 1, 102, 14, (stride * 2) - 1); + } else { + ipu_ch_param_set_field(¶ms, 0, 138, 12, height - 1); + ipu_ch_param_set_field(¶ms, 1, 102, 14, stride - 1); + } + + ipu_ch_param_set_field(¶ms, 1, 0, 29, addr0 >> 3); + ipu_ch_param_set_field(¶ms, 1, 29, 29, addr1 >> 3); + + switch (pixel_fmt) { + case IPU_PIX_FMT_GENERIC: + /*Represents 8-bit Generic data */ + ipu_ch_param_set_field(¶ms, 0, 107, 3, 5); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 6); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 63); /* burst size */ + + break; + case IPU_PIX_FMT_GENERIC_32: + /*Represents 32-bit Generic data */ + break; + case IPU_PIX_FMT_RGB565: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 3); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 15); /* burst size */ + + _ipu_ch_params_set_packing(¶ms, 5, 0, 6, 5, 5, 11, 8, 16); + break; + case IPU_PIX_FMT_BGR24: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 1); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 19); /* burst size */ + + _ipu_ch_params_set_packing(¶ms, 8, 0, 8, 8, 8, 16, 8, 24); + break; + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_YUV444: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 1); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 19); /* burst size */ + + _ipu_ch_params_set_packing(¶ms, 8, 16, 8, 8, 8, 0, 8, 24); + break; + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_BGR32: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 0); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 15); /* burst size */ + + _ipu_ch_params_set_packing(¶ms, 8, 8, 8, 16, 8, 24, 8, 0); + break; + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_RGB32: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 0); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 15); /* burst size */ + + _ipu_ch_params_set_packing(¶ms, 8, 24, 8, 16, 8, 8, 8, 0); + break; + case IPU_PIX_FMT_ABGR32: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 0); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 7); /* pix format */ + + _ipu_ch_params_set_packing(¶ms, 8, 0, 8, 8, 8, 16, 8, 24); + break; + case IPU_PIX_FMT_UYVY: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 3); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 0xA); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 15); /* burst size */ + break; + case IPU_PIX_FMT_YUYV: + ipu_ch_param_set_field(¶ms, 0, 107, 3, 3); /* bits/pixel */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 0x8); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 31); /* burst size */ + break; + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + ipu_ch_param_set_field(¶ms, 1, 85, 4, 2); /* pix format */ + + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + u_offset = stride * height; + v_offset = u_offset + (uv_stride * height / 2); + if ((ch == 8) || (ch == 9) || (ch == 10)) { + ipu_ch_param_set_field(¶ms, 1, 78, 7, 15); /* burst size */ + uv_stride = uv_stride*2; + } else { + ipu_ch_param_set_field(¶ms, 1, 78, 7, 31); /* burst size */ + } + break; + case IPU_PIX_FMT_YVU422P: + /* BPP & pixel format */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 1); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 31); /* burst size */ + + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + v_offset = (v == 0) ? stride * height : v; + u_offset = (u == 0) ? v_offset + v_offset / 2 : u; + break; + case IPU_PIX_FMT_YUV422P: + /* BPP & pixel format */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 1); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 31); /* burst size */ + + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + u_offset = (u == 0) ? stride * height : u; + v_offset = (v == 0) ? u_offset + u_offset / 2 : v; + break; + case IPU_PIX_FMT_NV12: + /* BPP & pixel format */ + ipu_ch_param_set_field(¶ms, 1, 85, 4, 4); /* pix format */ + ipu_ch_param_set_field(¶ms, 1, 78, 7, 31); /* burst size */ + uv_stride = stride; + u_offset = (u == 0) ? stride * height : u; + break; + default: + dev_err(g_ipu_dev, "mxc ipu: unimplemented pixel format\n"); + break; + } + /*set burst size to 16*/ + + + if (uv_stride) + ipu_ch_param_set_field(¶ms, 1, 128, 14, uv_stride - 1); + + /* Get the uv offset from user when need cropping */ + if (u || v) { + u_offset = u; + v_offset = v; + } + + /* UBO and VBO are 22-bit */ + if (u_offset/8 > 0x3fffff) + dev_err(g_ipu_dev, + "The value of U offset exceeds IPU limitation\n"); + if (v_offset/8 > 0x3fffff) + dev_err(g_ipu_dev, + "The value of V offset exceeds IPU limitation\n"); + + ipu_ch_param_set_field(¶ms, 0, 46, 22, u_offset / 8); + ipu_ch_param_set_field(¶ms, 0, 68, 22, v_offset / 8); + + pr_debug("initializing idma ch %d @ %p\n", ch, ipu_ch_param_addr(ch)); + memcpy(ipu_ch_param_addr(ch), ¶ms, sizeof(params)); +}; + +static inline void _ipu_ch_param_set_burst_size(uint32_t ch, + uint16_t burst_pixels) +{ + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 78, 7, + burst_pixels - 1); +}; + +static inline int _ipu_ch_param_get_burst_size(uint32_t ch) +{ + return ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 78, 7) + 1; +}; + +static inline int _ipu_ch_param_get_bpp(uint32_t ch) +{ + return ipu_ch_param_read_field(ipu_ch_param_addr(ch), 0, 107, 3); +}; + +static inline void _ipu_ch_param_set_buffer(uint32_t ch, int bufNum, + dma_addr_t phyaddr) +{ + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 29 * bufNum, 29, + phyaddr / 8); +}; + +static inline void _ipu_ch_param_set_rotation(uint32_t ch, + ipu_rotate_mode_t rot) +{ + u32 temp_rot = bitrev8(rot) >> 5; + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 0, 119, 3, temp_rot); +}; + +static inline void _ipu_ch_param_set_block_mode(uint32_t ch) +{ + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 0, 117, 2, 1); +}; + +static inline void _ipu_ch_param_set_alpha_use_separate_channel(uint32_t ch, + bool option) +{ + if (option) { + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 89, 1, 1); + } else { + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 89, 1, 0); + } +}; + +static inline void _ipu_ch_param_set_alpha_condition_read(uint32_t ch) +{ + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 149, 1, 1); +}; + +static inline void _ipu_ch_param_set_alpha_buffer_memory(uint32_t ch) +{ + int alp_mem_idx; + + switch (ch) { + case 14: /* PRP graphic */ + alp_mem_idx = 0; + break; + case 15: /* PP graphic */ + alp_mem_idx = 1; + break; + case 23: /* DP BG SYNC graphic */ + alp_mem_idx = 4; + break; + case 27: /* DP FG SYNC graphic */ + alp_mem_idx = 2; + break; + default: + dev_err(g_ipu_dev, "unsupported correlative channel of local " + "alpha channel\n"); + return; + } + + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 90, 3, alp_mem_idx); +}; + +static inline void _ipu_ch_param_set_interlaced_scan(uint32_t ch) +{ + u32 stride; + ipu_ch_param_set_field(ipu_ch_param_addr(ch), 0, 113, 1, 1); + stride = ipu_ch_param_read_field(ipu_ch_param_addr(ch), 1, 102, 14) + 1; + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 58, 20, stride / 8); + stride *= 2; + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 102, 14, stride - 1); +}; + +static inline void _ipu_ch_param_set_high_priority(uint32_t ch) +{ + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 93, 2, 1); +}; + +/* IDMAC U/V offset changing support */ +/* U and V input is not affected, */ +/* the update is done by new calculation according to */ +/* vertical_offset and horizontal_offset */ +static inline void _ipu_ch_offset_update(int ch, + uint32_t pixel_fmt, + uint32_t width, + uint32_t height, + uint32_t stride, + uint32_t u, + uint32_t v, + uint32_t uv_stride, + uint32_t vertical_offset, + uint32_t horizontal_offset) +{ + uint32_t u_offset = 0; + uint32_t v_offset = 0; + uint32_t u_fix = 0; + uint32_t v_fix = 0; + + switch (pixel_fmt) { + case IPU_PIX_FMT_GENERIC: + case IPU_PIX_FMT_GENERIC_32: + case IPU_PIX_FMT_RGB565: + case IPU_PIX_FMT_BGR24: + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_YUV444: + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_BGR32: + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_RGB32: + case IPU_PIX_FMT_ABGR32: + case IPU_PIX_FMT_UYVY: + case IPU_PIX_FMT_YUYV: + break; + + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + u_offset = stride * (height - vertical_offset - 1) + + (stride - horizontal_offset) + + (uv_stride * vertical_offset / 2) + + horizontal_offset / 2; + v_offset = u_offset + (uv_stride * height / 2); + u_fix = u ? (u + (uv_stride * vertical_offset) + + (horizontal_offset / 2) - + (stride * vertical_offset) - (horizontal_offset)) : + u_offset; + v_fix = v ? (v + (uv_stride * vertical_offset / 2) + + (horizontal_offset / 2) - + (stride * vertical_offset) - (horizontal_offset)) : + v_offset; + + break; + case IPU_PIX_FMT_YVU422P: + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + v_offset = stride * (height - vertical_offset - 1) + + (stride - horizontal_offset) + + (uv_stride * vertical_offset) + + horizontal_offset / 2; + u_offset = v_offset + uv_stride * height; + u_fix = u ? (u + (uv_stride * vertical_offset) + + horizontal_offset / 2 - + (stride * vertical_offset) - (horizontal_offset)) : + u_offset; + v_fix = v ? (v + (uv_stride * vertical_offset) + + horizontal_offset / 2 - + (stride * vertical_offset) - (horizontal_offset)) : + v_offset; + break; + case IPU_PIX_FMT_YUV422P: + if (uv_stride < stride / 2) + uv_stride = stride / 2; + + u_offset = stride * (height - vertical_offset - 1) + + (stride - horizontal_offset) + + (uv_stride * vertical_offset) + + horizontal_offset / 2; + v_offset = u_offset + uv_stride * height; + u_fix = u ? (u + (uv_stride * vertical_offset) + + horizontal_offset / 2 - + (stride * vertical_offset) - (horizontal_offset)) : + u_offset; + v_fix = v ? (v + (uv_stride * vertical_offset) + + horizontal_offset / 2 - + (stride * vertical_offset) - (horizontal_offset)) : + v_offset; + break; + + case IPU_PIX_FMT_NV12: + uv_stride = stride; + u_offset = stride * (height - vertical_offset - 1) + + (stride - horizontal_offset) + + (uv_stride * vertical_offset) + + horizontal_offset; + u_fix = u ? (u + (uv_stride * vertical_offset) + + horizontal_offset - + (stride * vertical_offset) - (horizontal_offset)) : + u_offset; + + break; + default: + dev_err(g_ipu_dev, "mxc ipu: unimplemented pixel format\n"); + break; + } + + + + if (u_fix > u_offset) + u_offset = u_fix; + + if (v_fix > v_offset) + v_offset = v_fix; + + /* UBO and VBO are 22-bit */ + if (u_offset/8 > 0x3fffff) + dev_err(g_ipu_dev, + "The value of U offset exceeds IPU limitation\n"); + if (v_offset/8 > 0x3fffff) + dev_err(g_ipu_dev, + "The value of V offset exceeds IPU limitation\n"); + + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 0, 46, 22, u_offset / 8); + ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 0, 68, 22, v_offset / 8); + +}; + +static inline void _ipu_ch_params_set_alpha_width(uint32_t ch, int alpha_width) +{ + ipu_ch_param_set_field(ipu_ch_param_addr(ch), 1, 125, 3, alpha_width - 1); +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_prv.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_prv.h @@ -0,0 +1,102 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __INCLUDE_IPU_PRV_H__ +#define __INCLUDE_IPU_PRV_H__ + +#include +#include +#include +#include +#include + +/* Globals */ +extern struct device *g_ipu_dev; +extern spinlock_t ipu_lock; +extern bool g_ipu_clk_enabled; +extern struct clk *g_ipu_clk; +extern struct clk *g_di_clk[2]; +extern struct clk *g_pixel_clk[2]; +extern struct clk *g_csi_clk[2]; +extern unsigned char g_dc_di_assignment[]; +extern int g_ipu_hw_rev; +extern int dmfc_type_setup; + +#define IDMA_CHAN_INVALID 0xFF +#define HIGH_RESOLUTION_WIDTH 1024 + +struct ipu_channel { + u8 video_in_dma; + u8 alpha_in_dma; + u8 graph_in_dma; + u8 out_dma; +}; + +enum ipu_dmfc_type { + DMFC_NORMAL = 0, + DMFC_HIGH_RESOLUTION_DC, + DMFC_HIGH_RESOLUTION_DP, + DMFC_HIGH_RESOLUTION_ONLY_DP, +}; + +int register_ipu_device(void); +ipu_color_space_t format_to_colorspace(uint32_t fmt); +bool ipu_pixel_format_has_alpha(uint32_t fmt); + +void ipu_dump_registers(void); + +uint32_t _ipu_channel_status(ipu_channel_t channel); + +void _ipu_init_dc_mappings(void); +int _ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt, + uint32_t out_pixel_fmt); +void _ipu_dp_uninit(ipu_channel_t channel); +void _ipu_dc_init(int dc_chan, int di, bool interlaced); +void _ipu_dc_uninit(int dc_chan); +void _ipu_dp_dc_enable(ipu_channel_t channel); +void _ipu_dp_dc_disable(ipu_channel_t channel, bool swap); +void _ipu_dmfc_init(int dmfc_type, int first); +void _ipu_dmfc_set_wait4eot(int dma_chan, int width); +int _ipu_chan_is_interlaced(ipu_channel_t channel); + +void _ipu_ic_enable_task(ipu_channel_t channel); +void _ipu_ic_disable_task(ipu_channel_t channel); +void _ipu_ic_init_prpvf(ipu_channel_params_t *params, bool src_is_csi); +void _ipu_vdi_init(ipu_channel_t channel, ipu_channel_params_t *params); +void _ipu_vdi_uninit(void); +void _ipu_ic_uninit_prpvf(void); +void _ipu_ic_init_rotate_vf(ipu_channel_params_t *params); +void _ipu_ic_uninit_rotate_vf(void); +void _ipu_ic_init_csi(ipu_channel_params_t *params); +void _ipu_ic_uninit_csi(void); +void _ipu_ic_init_prpenc(ipu_channel_params_t *params, bool src_is_csi); +void _ipu_ic_uninit_prpenc(void); +void _ipu_ic_init_rotate_enc(ipu_channel_params_t *params); +void _ipu_ic_uninit_rotate_enc(void); +void _ipu_ic_init_pp(ipu_channel_params_t *params); +void _ipu_ic_uninit_pp(void); +void _ipu_ic_init_rotate_pp(ipu_channel_params_t *params); +void _ipu_ic_uninit_rotate_pp(void); +int _ipu_ic_idma_init(int dma_chan, uint16_t width, uint16_t height, + int burst_size, ipu_rotate_mode_t rot); +void _ipu_vdi_toggle_top_field_man(void); +int _ipu_csi_init(ipu_channel_t channel, uint32_t csi); +void ipu_csi_set_test_generator(bool active, uint32_t r_value, + uint32_t g_value, uint32_t b_value, + uint32_t pix_clk, uint32_t csi); +void _ipu_csi_ccir_err_detection_enable(uint32_t csi); +void _ipu_csi_ccir_err_detection_disable(uint32_t csi); +void _ipu_smfc_init(ipu_channel_t channel, uint32_t mipi_id, uint32_t csi); +void _ipu_smfc_set_burst_size(ipu_channel_t channel, uint32_t bs); +void _ipu_dp_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]); + +#endif /* __INCLUDE_IPU_PRV_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_disp.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_disp.c @@ -0,0 +1,1706 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_disp.c + * + * @brief IPU display submodule API functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +enum csc_type_t { + RGB2YUV = 0, + YUV2RGB, + RGB2RGB, + YUV2YUV, + CSC_NONE, + CSC_NUM +}; + +struct dp_csc_param_t { + int mode; + void *coeff; +}; + +#define SYNC_WAVE 0 +#define ASYNC_SER_WAVE 6 + +/* DC display ID assignments */ +#define DC_DISP_ID_SYNC(di) (di) +#define DC_DISP_ID_SERIAL 2 +#define DC_DISP_ID_ASYNC 3 + +int dmfc_type_setup; +static int dmfc_size_28, dmfc_size_29, dmfc_size_24, dmfc_size_27, dmfc_size_23; +int g_di1_tvout; + +void _ipu_dmfc_init(int dmfc_type, int first) +{ + u32 dmfc_wr_chan, dmfc_dp_chan; + + if (first) { + if (dmfc_type_setup > dmfc_type) + dmfc_type = dmfc_type_setup; + else + dmfc_type_setup = dmfc_type; + + /* disable DMFC-IC channel*/ + __raw_writel(0x2, DMFC_IC_CTRL); + } else if (dmfc_type_setup >= DMFC_HIGH_RESOLUTION_DC) { + printk(KERN_DEBUG "DMFC high resolution has set, will not change\n"); + return; + } else + dmfc_type_setup = dmfc_type; + + if (dmfc_type == DMFC_HIGH_RESOLUTION_DC) { + /* 1 - segment 0~3; + * 5B - segement 4, 5; + * 5F - segement 6, 7; + * 1C, 2C and 6B, 6F unused; + */ + printk(KERN_INFO "IPU DMFC DC HIGH RESOLUTION: 1(0~3), 5B(4,5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000088; + dmfc_dp_chan = 0x00009694; + dmfc_size_28 = 256*4; + dmfc_size_29 = 0; + dmfc_size_24 = 0; + dmfc_size_27 = 128*4; + dmfc_size_23 = 128*4; + } else if (dmfc_type == DMFC_HIGH_RESOLUTION_DP) { + /* 1 - segment 0, 1; + * 5B - segement 2~5; + * 5F - segement 6,7; + * 1C, 2C and 6B, 6F unused; + */ + printk(KERN_INFO "IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000090; + dmfc_dp_chan = 0x0000968a; + dmfc_size_28 = 128*4; + dmfc_size_29 = 0; + dmfc_size_24 = 0; + dmfc_size_27 = 128*4; + dmfc_size_23 = 256*4; + } else if (dmfc_type == DMFC_HIGH_RESOLUTION_ONLY_DP) { + /* 5B - segement 0~3; + * 5F - segement 4~7; + * 1, 1C, 2C and 6B, 6F unused; + */ + printk(KERN_INFO "IPU DMFC ONLY-DP HIGH RESOLUTION: 5B(0~3), 5F(4~7)\n"); + dmfc_wr_chan = 0x00000000; + dmfc_dp_chan = 0x00008c88; + dmfc_size_28 = 0; + dmfc_size_29 = 0; + dmfc_size_24 = 0; + dmfc_size_27 = 256*4; + dmfc_size_23 = 256*4; + } else { + /* 1 - segment 0, 1; + * 5B - segement 4, 5; + * 5F - segement 6, 7; + * 1C, 2C and 6B, 6F unused; + */ + printk(KERN_INFO "IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)\n"); + dmfc_wr_chan = 0x00000090; + dmfc_dp_chan = 0x00009694; + dmfc_size_28 = 128*4; + dmfc_size_29 = 0; + dmfc_size_24 = 0; + dmfc_size_27 = 128*4; + dmfc_size_23 = 128*4; + } + __raw_writel(dmfc_wr_chan, DMFC_WR_CHAN); + __raw_writel(0x202020F6, DMFC_WR_CHAN_DEF); + __raw_writel(dmfc_dp_chan, DMFC_DP_CHAN); + /* Enable chan 5 watermark set at 5 bursts and clear at 7 bursts */ + __raw_writel(0x2020F6F6, DMFC_DP_CHAN_DEF); +} + +static int __init dmfc_setup(char *options) +{ + get_option(&options, &dmfc_type_setup); + if (dmfc_type_setup > DMFC_HIGH_RESOLUTION_ONLY_DP) + dmfc_type_setup = DMFC_HIGH_RESOLUTION_ONLY_DP; + return 1; +} +__setup("dmfc=", dmfc_setup); + +void _ipu_dmfc_set_wait4eot(int dma_chan, int width) +{ + u32 dmfc_gen1 = __raw_readl(DMFC_GENERAL1); + + if (width >= HIGH_RESOLUTION_WIDTH) { + if (dma_chan == 23) + _ipu_dmfc_init(DMFC_HIGH_RESOLUTION_DP, 0); + else if (dma_chan == 28) + _ipu_dmfc_init(DMFC_HIGH_RESOLUTION_DC, 0); + } + + if (dma_chan == 23) { /*5B*/ + if (dmfc_size_23/width > 3) + dmfc_gen1 |= 1UL << 20; + else + dmfc_gen1 &= ~(1UL << 20); + } else if (dma_chan == 24) { /*6B*/ + if (dmfc_size_24/width > 1) + dmfc_gen1 |= 1UL << 22; + else + dmfc_gen1 &= ~(1UL << 22); + } else if (dma_chan == 27) { /*5F*/ + if (dmfc_size_27/width > 2) + dmfc_gen1 |= 1UL << 21; + else + dmfc_gen1 &= ~(1UL << 21); + } else if (dma_chan == 28) { /*1*/ + if (dmfc_size_28/width > 2) + dmfc_gen1 |= 1UL << 16; + else + dmfc_gen1 &= ~(1UL << 16); + } else if (dma_chan == 29) { /*6F*/ + if (dmfc_size_29/width > 1) + dmfc_gen1 |= 1UL << 23; + else + dmfc_gen1 &= ~(1UL << 23); + } + + __raw_writel(dmfc_gen1, DMFC_GENERAL1); +} + +static void _ipu_di_data_wave_config(int di, + int wave_gen, + int access_size, int component_size) +{ + u32 reg; + reg = (access_size << DI_DW_GEN_ACCESS_SIZE_OFFSET) | + (component_size << DI_DW_GEN_COMPONENT_SIZE_OFFSET); + __raw_writel(reg, DI_DW_GEN(di, wave_gen)); +} + +static void _ipu_di_data_pin_config(int di, int wave_gen, int di_pin, int set, + int up, int down) +{ + u32 reg; + + reg = __raw_readl(DI_DW_GEN(di, wave_gen)); + reg &= ~(0x3 << (di_pin * 2)); + reg |= set << (di_pin * 2); + __raw_writel(reg, DI_DW_GEN(di, wave_gen)); + + __raw_writel((down << 16) | up, DI_DW_SET(di, wave_gen, set)); +} + +static void _ipu_di_sync_config(int di, int wave_gen, + int run_count, int run_src, + int offset_count, int offset_src, + int repeat_count, int cnt_clr_src, + int cnt_polarity_gen_en, + int cnt_polarity_clr_src, + int cnt_polarity_trigger_src, + int cnt_up, int cnt_down) +{ + u32 reg; + + if ((run_count >= 0x1000) || (offset_count >= 0x1000) || (repeat_count >= 0x1000) || + (cnt_up >= 0x400) || (cnt_down >= 0x400)) { + dev_err(g_ipu_dev, "DI%d counters out of range.\n", di); + return; + } + + reg = (run_count << 19) | (++run_src << 16) | + (offset_count << 3) | ++offset_src; + __raw_writel(reg, DI_SW_GEN0(di, wave_gen)); + reg = (cnt_polarity_gen_en << 29) | (++cnt_clr_src << 25) | + (++cnt_polarity_trigger_src << 12) | (++cnt_polarity_clr_src << 9); + reg |= (cnt_down << 16) | cnt_up; + if (repeat_count == 0) { + /* Enable auto reload */ + reg |= 0x10000000; + } + __raw_writel(reg, DI_SW_GEN1(di, wave_gen)); + reg = __raw_readl(DI_STP_REP(di, wave_gen)); + reg &= ~(0xFFFF << (16 * ((wave_gen - 1) & 0x1))); + reg |= repeat_count << (16 * ((wave_gen - 1) & 0x1)); + __raw_writel(reg, DI_STP_REP(di, wave_gen)); +} + +static void _ipu_dc_map_config(int map, int byte_num, int offset, int mask) +{ + int ptr = map * 3 + byte_num; + u32 reg; + + reg = __raw_readl(DC_MAP_CONF_VAL(ptr)); + reg &= ~(0xFFFF << (16 * (ptr & 0x1))); + reg |= ((offset << 8) | mask) << (16 * (ptr & 0x1)); + __raw_writel(reg, DC_MAP_CONF_VAL(ptr)); + + reg = __raw_readl(DC_MAP_CONF_PTR(map)); + reg &= ~(0x1F << ((16 * (map & 0x1)) + (5 * byte_num))); + reg |= ptr << ((16 * (map & 0x1)) + (5 * byte_num)); + __raw_writel(reg, DC_MAP_CONF_PTR(map)); +} + +static void _ipu_dc_map_clear(int map) +{ + u32 reg = __raw_readl(DC_MAP_CONF_PTR(map)); + __raw_writel(reg & ~(0xFFFF << (16 * (map & 0x1))), + DC_MAP_CONF_PTR(map)); +} + +static void _ipu_dc_write_tmpl(int word, u32 opcode, u32 operand, int map, + int wave, int glue, int sync) +{ + u32 reg; + int stop = 1; + + reg = sync; + reg |= (glue << 4); + reg |= (++wave << 11); + reg |= (++map << 15); + reg |= (operand << 20) & 0xFFF00000; + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2); + + reg = (operand >> 12); + reg |= opcode << 4; + reg |= (stop << 9); + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2 + 1); +} + +static void _ipu_dc_link_event(int chan, int event, int addr, int priority) +{ + u32 reg; + + reg = __raw_readl(DC_RL_CH(chan, event)); + reg &= ~(0xFFFF << (16 * (event & 0x1))); + reg |= ((addr << 8) | priority) << (16 * (event & 0x1)); + __raw_writel(reg, DC_RL_CH(chan, event)); +} + +/* Y = R * 1.200 + G * 2.343 + B * .453 + 0.250; + U = R * -.672 + G * -1.328 + B * 2.000 + 512.250.; + V = R * 2.000 + G * -1.672 + B * -.328 + 512.250.;*/ +static const int rgb2ycbcr_coeff[5][3] = { + {0x4D, 0x96, 0x1D}, + {0x3D5, 0x3AB, 0x80}, + {0x80, 0x395, 0x3EB}, + {0x0000, 0x0200, 0x0200}, /* B0, B1, B2 */ + {0x2, 0x2, 0x2}, /* S0, S1, S2 */ +}; + +/* R = (1.164 * (Y - 16)) + (1.596 * (Cr - 128)); + G = (1.164 * (Y - 16)) - (0.392 * (Cb - 128)) - (0.813 * (Cr - 128)); + B = (1.164 * (Y - 16)) + (2.017 * (Cb - 128); */ +static const int ycbcr2rgb_coeff[5][3] = { + {0x095, 0x000, 0x0CC}, + {0x095, 0x3CE, 0x398}, + {0x095, 0x0FF, 0x000}, + {0x3E42, 0x010A, 0x3DD6}, /*B0,B1,B2 */ + {0x1, 0x1, 0x1}, /*S0,S1,S2 */ +}; + +#define mask_a(a) ((u32)(a) & 0x3FF) +#define mask_b(b) ((u32)(b) & 0x3FFF) + +/* Pls keep S0, S1 and S2 as 0x2 by using this convertion */ +static int _rgb_to_yuv(int n, int red, int green, int blue) +{ + int c; + c = red * rgb2ycbcr_coeff[n][0]; + c += green * rgb2ycbcr_coeff[n][1]; + c += blue * rgb2ycbcr_coeff[n][2]; + c /= 16; + c += rgb2ycbcr_coeff[3][n] * 4; + c += 8; + c /= 16; + if (c < 0) + c = 0; + if (c > 255) + c = 255; + return c; +} + +/* + * Row is for BG: RGB2YUV YUV2RGB RGB2RGB YUV2YUV CSC_NONE + * Column is for FG: RGB2YUV YUV2RGB RGB2RGB YUV2YUV CSC_NONE + */ +static struct dp_csc_param_t dp_csc_array[CSC_NUM][CSC_NUM] = { +{{DP_COM_CONF_CSC_DEF_BOTH, &rgb2ycbcr_coeff}, {0, 0}, {0, 0}, {DP_COM_CONF_CSC_DEF_BG, &rgb2ycbcr_coeff}, {DP_COM_CONF_CSC_DEF_BG, &rgb2ycbcr_coeff} }, +{{0, 0}, {DP_COM_CONF_CSC_DEF_BOTH, &ycbcr2rgb_coeff}, {DP_COM_CONF_CSC_DEF_BG, &ycbcr2rgb_coeff}, {0, 0}, {DP_COM_CONF_CSC_DEF_BG, &ycbcr2rgb_coeff} }, +{{0, 0}, {DP_COM_CONF_CSC_DEF_FG, &ycbcr2rgb_coeff}, {0, 0}, {0, 0}, {0, 0} }, +{{DP_COM_CONF_CSC_DEF_FG, &rgb2ycbcr_coeff}, {0, 0}, {0, 0}, {0, 0}, {0, 0} }, +{{DP_COM_CONF_CSC_DEF_FG, &rgb2ycbcr_coeff}, {DP_COM_CONF_CSC_DEF_FG, &ycbcr2rgb_coeff}, {0, 0}, {0, 0}, {0, 0} } +}; + +static enum csc_type_t fg_csc_type = CSC_NONE, bg_csc_type = CSC_NONE; +static int color_key_4rgb = 1; + +void __ipu_dp_csc_setup(int dp, struct dp_csc_param_t dp_csc_param, + bool srm_mode_update) +{ + u32 reg; + const int (*coeff)[5][3]; + + if (dp_csc_param.mode >= 0) { + reg = __raw_readl(DP_COM_CONF(dp)); + reg &= ~DP_COM_CONF_CSC_DEF_MASK; + reg |= dp_csc_param.mode; + __raw_writel(reg, DP_COM_CONF(dp)); + } + + coeff = dp_csc_param.coeff; + + if (coeff) { + __raw_writel(mask_a((*coeff)[0][0]) | + (mask_a((*coeff)[0][1]) << 16), DP_CSC_A_0(dp)); + __raw_writel(mask_a((*coeff)[0][2]) | + (mask_a((*coeff)[1][0]) << 16), DP_CSC_A_1(dp)); + __raw_writel(mask_a((*coeff)[1][1]) | + (mask_a((*coeff)[1][2]) << 16), DP_CSC_A_2(dp)); + __raw_writel(mask_a((*coeff)[2][0]) | + (mask_a((*coeff)[2][1]) << 16), DP_CSC_A_3(dp)); + __raw_writel(mask_a((*coeff)[2][2]) | + (mask_b((*coeff)[3][0]) << 16) | + ((*coeff)[4][0] << 30), DP_CSC_0(dp)); + __raw_writel(mask_b((*coeff)[3][1]) | ((*coeff)[4][1] << 14) | + (mask_b((*coeff)[3][2]) << 16) | + ((*coeff)[4][2] << 30), DP_CSC_1(dp)); + } + + if (srm_mode_update) { + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + } +} + +int _ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt, + uint32_t out_pixel_fmt) +{ + int in_fmt, out_fmt; + int dp; + int partial = false; + uint32_t reg; + + if (channel == MEM_FG_SYNC) { + dp = DP_SYNC; + partial = true; + } else if (channel == MEM_BG_SYNC) { + dp = DP_SYNC; + partial = false; + } else if (channel == MEM_BG_ASYNC0) { + dp = DP_ASYNC0; + partial = false; + } else { + return -EINVAL; + } + + in_fmt = format_to_colorspace(in_pixel_fmt); + out_fmt = format_to_colorspace(out_pixel_fmt); + + if (partial) { + if (in_fmt == RGB) { + if (out_fmt == RGB) + fg_csc_type = RGB2RGB; + else + fg_csc_type = RGB2YUV; + } else { + if (out_fmt == RGB) + fg_csc_type = YUV2RGB; + else + fg_csc_type = YUV2YUV; + } + } else { + if (in_fmt == RGB) { + if (out_fmt == RGB) + bg_csc_type = RGB2RGB; + else + bg_csc_type = RGB2YUV; + } else { + if (out_fmt == RGB) + bg_csc_type = YUV2RGB; + else + bg_csc_type = YUV2YUV; + } + } + + /* Transform color key from rgb to yuv if CSC is enabled */ + reg = __raw_readl(DP_COM_CONF(dp)); + if (color_key_4rgb && (reg & DP_COM_CONF_GWCKE) && + (((fg_csc_type == RGB2YUV) && (bg_csc_type == YUV2YUV)) || + ((fg_csc_type == YUV2YUV) && (bg_csc_type == RGB2YUV)) || + ((fg_csc_type == YUV2YUV) && (bg_csc_type == YUV2YUV)) || + ((fg_csc_type == YUV2RGB) && (bg_csc_type == YUV2RGB)))) { + int red, green, blue; + int y, u, v; + uint32_t color_key = __raw_readl(DP_GRAPH_WIND_CTRL(dp)) & 0xFFFFFFL; + + dev_dbg(g_ipu_dev, "_ipu_dp_init color key 0x%x need change to yuv fmt!\n", color_key); + + red = (color_key >> 16) & 0xFF; + green = (color_key >> 8) & 0xFF; + blue = color_key & 0xFF; + + y = _rgb_to_yuv(0, red, green, blue); + u = _rgb_to_yuv(1, red, green, blue); + v = _rgb_to_yuv(2, red, green, blue); + color_key = (y << 16) | (u << 8) | v; + + reg = __raw_readl(DP_GRAPH_WIND_CTRL(dp)) & 0xFF000000L; + __raw_writel(reg | color_key, DP_GRAPH_WIND_CTRL(dp)); + color_key_4rgb = 0; + + dev_dbg(g_ipu_dev, "_ipu_dp_init color key change to yuv fmt 0x%x!\n", color_key); + } + + __ipu_dp_csc_setup(dp, dp_csc_array[bg_csc_type][fg_csc_type], true); + + return 0; +} + +void _ipu_dp_uninit(ipu_channel_t channel) +{ + int dp; + int partial = false; + + if (channel == MEM_FG_SYNC) { + dp = DP_SYNC; + partial = true; + } else if (channel == MEM_BG_SYNC) { + dp = DP_SYNC; + partial = false; + } else if (channel == MEM_BG_ASYNC0) { + dp = DP_ASYNC0; + partial = false; + } else { + return; + } + + if (partial) + fg_csc_type = CSC_NONE; + else + bg_csc_type = CSC_NONE; + + __ipu_dp_csc_setup(dp, dp_csc_array[bg_csc_type][fg_csc_type], false); +} + +void _ipu_dc_init(int dc_chan, int di, bool interlaced) +{ + u32 reg = 0; + + if ((dc_chan == 1) || (dc_chan == 5)) { + if (interlaced) { + _ipu_dc_link_event(dc_chan, DC_EVT_NL, 0, 3); + _ipu_dc_link_event(dc_chan, DC_EVT_EOL, 0, 2); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA, 0, 1); + } else { + if (di) { + _ipu_dc_link_event(dc_chan, DC_EVT_NL, 2, 3); + _ipu_dc_link_event(dc_chan, DC_EVT_EOL, 3, 2); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA, 4, 1); + } else { + _ipu_dc_link_event(dc_chan, DC_EVT_NL, 5, 3); + _ipu_dc_link_event(dc_chan, DC_EVT_EOL, 6, 2); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA, 7, 1); + } + } + _ipu_dc_link_event(dc_chan, DC_EVT_NF, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NFIELD, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_EOF, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_EOFIELD, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR, 0, 0); + + reg = 0x2; + reg |= DC_DISP_ID_SYNC(di) << DC_WR_CH_CONF_PROG_DISP_ID_OFFSET; + reg |= di << 2; + if (interlaced) + reg |= DC_WR_CH_CONF_FIELD_MODE; + } else if ((dc_chan == 8) || (dc_chan == 9)) { + /* async channels */ + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_W_0, 0x64, 1); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_W_1, 0x64, 1); + + reg = 0x3; + reg |= DC_DISP_ID_SERIAL << DC_WR_CH_CONF_PROG_DISP_ID_OFFSET; + } + __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); + + __raw_writel(0x00000000, DC_WR_CH_ADDR(dc_chan)); + + __raw_writel(0x00000084, DC_GEN); +} + +void _ipu_dc_uninit(int dc_chan) +{ + if ((dc_chan == 1) || (dc_chan == 5)) { + _ipu_dc_link_event(dc_chan, DC_EVT_NL, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_EOL, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NF, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NFIELD, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_EOF, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_EOFIELD, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR, 0, 0); + } else if ((dc_chan == 8) || (dc_chan == 9)) { + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR_W_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR_W_1, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN_W_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN_W_1, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_W_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_W_1, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR_R_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_ADDR_R_1, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN_R_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_CHAN_R_1, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_R_0, 0, 0); + _ipu_dc_link_event(dc_chan, DC_EVT_NEW_DATA_R_1, 0, 0); + } +} + +int _ipu_chan_is_interlaced(ipu_channel_t channel) +{ + if (channel == MEM_DC_SYNC) + return !!(__raw_readl(DC_WR_CH_CONF_1) & + DC_WR_CH_CONF_FIELD_MODE); + else if ((channel == MEM_BG_SYNC) || (channel == MEM_FG_SYNC)) + return !!(__raw_readl(DC_WR_CH_CONF_5) & + DC_WR_CH_CONF_FIELD_MODE); + return 0; +} + +void _ipu_dp_dc_enable(ipu_channel_t channel) +{ + int di; + uint32_t reg; + uint32_t dc_chan; + int irq = 0; + + if (channel == MEM_FG_SYNC) + irq = IPU_IRQ_DP_SF_END; + else if (channel == MEM_DC_SYNC) + dc_chan = 1; + else if (channel == MEM_BG_SYNC) + dc_chan = 5; + else + return; + + if (channel == MEM_FG_SYNC) { + /* Enable FG channel */ + reg = __raw_readl(DP_COM_CONF(DP_SYNC)); + __raw_writel(reg | DP_COM_CONF_FG_EN, DP_COM_CONF(DP_SYNC)); + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + return; + } + + di = g_dc_di_assignment[dc_chan]; + + /* Make sure other DC sync channel is not assigned same DI */ + reg = __raw_readl(DC_WR_CH_CONF(6 - dc_chan)); + if ((di << 2) == (reg & DC_WR_CH_CONF_PROG_DI_ID)) { + reg &= ~DC_WR_CH_CONF_PROG_DI_ID; + reg |= di ? 0 : DC_WR_CH_CONF_PROG_DI_ID; + __raw_writel(reg, DC_WR_CH_CONF(6 - dc_chan)); + } + + reg = __raw_readl(DC_WR_CH_CONF(dc_chan)); + reg |= 4 << DC_WR_CH_CONF_PROG_TYPE_OFFSET; + __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); + + clk_enable(g_pixel_clk[di]); +} + +static bool dc_swap; + +static irqreturn_t dc_irq_handler(int irq, void *dev_id) +{ + struct completion *comp = dev_id; + + complete(comp); + return IRQ_HANDLED; +} + +void _ipu_dp_dc_disable(ipu_channel_t channel, bool swap) +{ + int ret; + unsigned long lock_flags; + uint32_t reg; + uint32_t csc; + uint32_t dc_chan; + int irq = 0; + int timeout = 50; + DECLARE_COMPLETION_ONSTACK(dc_comp); + + dc_swap = swap; + + if (channel == MEM_DC_SYNC) { + dc_chan = 1; + irq = IPU_IRQ_DC_FC_1; + } else if (channel == MEM_BG_SYNC) { + dc_chan = 5; + irq = IPU_IRQ_DP_SF_END; + } else if (channel == MEM_FG_SYNC) { + /* Disable FG channel */ + dc_chan = 5; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(DP_COM_CONF(DP_SYNC)); + csc = reg & DP_COM_CONF_CSC_DEF_MASK; + if (csc == DP_COM_CONF_CSC_DEF_FG) + reg &= ~DP_COM_CONF_CSC_DEF_MASK; + + reg &= ~DP_COM_CONF_FG_EN; + __raw_writel(reg, DP_COM_CONF(DP_SYNC)); + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + __raw_writel(IPUIRQ_2_MASK(IPU_IRQ_DP_SF_END), + IPUIRQ_2_STATREG(IPU_IRQ_DP_SF_END)); + while ((__raw_readl(IPUIRQ_2_STATREG(IPU_IRQ_DP_SF_END)) & + IPUIRQ_2_MASK(IPU_IRQ_DP_SF_END)) == 0) { + msleep(2); + timeout -= 2; + if (timeout <= 0) + break; + } + + timeout = 50; + + /* + * Wait for DC triple buffer to empty, + * this check is useful for tv overlay. + */ + if (g_dc_di_assignment[dc_chan] == 0) + while ((__raw_readl(DC_STAT) & 0x00000002) + != 0x00000002) { + msleep(2); + timeout -= 2; + if (timeout <= 0) + break; + } + else if (g_dc_di_assignment[dc_chan] == 1) + while ((__raw_readl(DC_STAT) & 0x00000020) + != 0x00000020) { + msleep(2); + timeout -= 2; + if (timeout <= 0) + break; + } + return; + } else { + return; + } + + if (!dc_swap) + __raw_writel(IPUIRQ_2_MASK(IPU_IRQ_VSYNC_PRE_0 + + g_dc_di_assignment[dc_chan]), + IPUIRQ_2_STATREG(IPU_IRQ_VSYNC_PRE_0 + + g_dc_di_assignment[dc_chan])); + ipu_clear_irq(irq); + ret = ipu_request_irq(irq, dc_irq_handler, 0, NULL, &dc_comp); + if (ret < 0) { + dev_err(g_ipu_dev, "DC irq %d in use\n", irq); + return; + } + ret = wait_for_completion_timeout(&dc_comp, msecs_to_jiffies(50)); + + dev_dbg(g_ipu_dev, "DC stop timeout - %d * 10ms\n", 5 - ret); + ipu_free_irq(irq, &dc_comp); + + if (dc_swap) { + spin_lock_irqsave(&ipu_lock, lock_flags); + /* Swap DC channel 1 and 5 settings, and disable old dc chan */ + reg = __raw_readl(DC_WR_CH_CONF(dc_chan)); + __raw_writel(reg, DC_WR_CH_CONF(6 - dc_chan)); + reg &= ~DC_WR_CH_CONF_PROG_TYPE_MASK; + reg ^= DC_WR_CH_CONF_PROG_DI_ID; + __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + } else { + timeout = 50; + + /* Wait for DC triple buffer to empty */ + if (g_dc_di_assignment[dc_chan] == 0) + while ((__raw_readl(DC_STAT) & 0x00000002) + != 0x00000002) { + msleep(2); + timeout -= 2; + if (timeout <= 0) + break; + } + else if (g_dc_di_assignment[dc_chan] == 1) + while ((__raw_readl(DC_STAT) & 0x00000020) + != 0x00000020) { + msleep(2); + timeout -= 2; + if (timeout <= 0) + break; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + reg = __raw_readl(DC_WR_CH_CONF(dc_chan)); + reg &= ~DC_WR_CH_CONF_PROG_TYPE_MASK; + __raw_writel(reg, DC_WR_CH_CONF(dc_chan)); + + reg = __raw_readl(IPU_DISP_GEN); + if (g_dc_di_assignment[dc_chan]) + reg &= ~DI1_COUNTER_RELEASE; + else + reg &= ~DI0_COUNTER_RELEASE; + __raw_writel(reg, IPU_DISP_GEN); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + /* Clock is already off because it must be done quickly, but + we need to fix the ref count */ + clk_disable(g_pixel_clk[g_dc_di_assignment[dc_chan]]); + + if (__raw_readl(IPUIRQ_2_STATREG(IPU_IRQ_VSYNC_PRE_0 + + g_dc_di_assignment[dc_chan])) & + IPUIRQ_2_MASK(IPU_IRQ_VSYNC_PRE_0 + + g_dc_di_assignment[dc_chan])) + dev_dbg(g_ipu_dev, + "VSyncPre occurred before DI%d disable\n", + g_dc_di_assignment[dc_chan]); + } +} + +void _ipu_init_dc_mappings(void) +{ + /* IPU_PIX_FMT_RGB24 */ + _ipu_dc_map_clear(0); + _ipu_dc_map_config(0, 0, 7, 0xFF); + _ipu_dc_map_config(0, 1, 15, 0xFF); + _ipu_dc_map_config(0, 2, 23, 0xFF); + + /* IPU_PIX_FMT_RGB666 */ + _ipu_dc_map_clear(1); + _ipu_dc_map_config(1, 0, 5, 0xFC); + _ipu_dc_map_config(1, 1, 11, 0xFC); + _ipu_dc_map_config(1, 2, 17, 0xFC); + + /* IPU_PIX_FMT_YUV444 */ + _ipu_dc_map_clear(2); + _ipu_dc_map_config(2, 0, 15, 0xFF); + _ipu_dc_map_config(2, 1, 23, 0xFF); + _ipu_dc_map_config(2, 2, 7, 0xFF); + + /* IPU_PIX_FMT_RGB565 */ + _ipu_dc_map_clear(3); + _ipu_dc_map_config(3, 0, 4, 0xF8); + _ipu_dc_map_config(3, 1, 10, 0xFC); + _ipu_dc_map_config(3, 2, 15, 0xF8); + + /* IPU_PIX_FMT_LVDS666 */ + _ipu_dc_map_clear(4); + _ipu_dc_map_config(4, 0, 5, 0xFC); + _ipu_dc_map_config(4, 1, 13, 0xFC); + _ipu_dc_map_config(4, 2, 21, 0xFC); +} + +int _ipu_pixfmt_to_map(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_GENERIC: + case IPU_PIX_FMT_RGB24: + return 0; + case IPU_PIX_FMT_RGB666: + return 1; + case IPU_PIX_FMT_YUV444: + return 2; + case IPU_PIX_FMT_RGB565: + return 3; + case IPU_PIX_FMT_LVDS666: + return 4; + } + + return -1; +} + +/*! + * This function sets the colorspace for of dp. + * modes. + * + * @param channel Input parameter for the logical channel ID. + * + * @param param If it's not NULL, update the csc table + * with this parameter. + * + * @return N/A + */ +void _ipu_dp_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]) +{ + int dp; + struct dp_csc_param_t dp_csc_param; + + if (channel == MEM_FG_SYNC) + dp = DP_SYNC; + else if (channel == MEM_BG_SYNC) + dp = DP_SYNC; + else if (channel == MEM_BG_ASYNC0) + dp = DP_ASYNC0; + else + return; + + dp_csc_param.mode = -1; + dp_csc_param.coeff = param; + __ipu_dp_csc_setup(dp, dp_csc_param, true); +} + +/*! + * This function is called to adapt synchronous LCD panel to IPU restriction. + * + */ +void adapt_panel_to_ipu_restricitions(uint16_t *pixel_clk, + uint16_t width, uint16_t height, + uint16_t h_start_width, + uint16_t h_end_width, + uint16_t v_start_width, + uint16_t *v_end_width) +{ + if (*v_end_width < 2) { + uint16_t total_width = width + h_start_width + h_end_width; + uint16_t total_height_old = height + v_start_width + (*v_end_width); + uint16_t total_height_new = height + v_start_width + 2; + *v_end_width = 2; + *pixel_clk = (*pixel_clk) * total_width * total_height_new / + (total_width * total_height_old); + dev_err(g_ipu_dev, "WARNING: adapt panel end blank lines\n"); + } +} + +/*! + * This function is called to initialize a synchronous LCD panel. + * + * @param disp The DI the panel is attached to. + * + * @param pixel_clk Desired pixel clock frequency in Hz. + * + * @param pixel_fmt Input parameter for pixel format of buffer. + * Pixel format is a FOURCC ASCII code. + * + * @param width The width of panel in pixels. + * + * @param height The height of panel in pixels. + * + * @param hStartWidth The number of pixel clocks between the HSYNC + * signal pulse and the start of valid data. + * + * @param hSyncWidth The width of the HSYNC signal in units of pixel + * clocks. + * + * @param hEndWidth The number of pixel clocks between the end of + * valid data and the HSYNC signal for next line. + * + * @param vStartWidth The number of lines between the VSYNC + * signal pulse and the start of valid data. + * + * @param vSyncWidth The width of the VSYNC signal in units of lines + * + * @param vEndWidth The number of lines between the end of valid + * data and the VSYNC signal for next frame. + * + * @param sig Bitfield of signal polarities for LCD interface. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ + +int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint16_t h_start_width, uint16_t h_sync_width, + uint16_t h_end_width, uint16_t v_start_width, + uint16_t v_sync_width, uint16_t v_end_width, + uint32_t v_to_h_sync, ipu_di_signal_cfg_t sig) +{ + unsigned long lock_flags; + uint32_t field0_offset = 0; + uint32_t field1_offset; + uint32_t reg; + uint32_t di_gen, vsync_cnt; + uint32_t div, rounded_pixel_clk; + uint32_t h_total, v_total; + int map; + int ipu_freq_scaling_enabled = 0; + struct clk *di_parent; + + dev_dbg(g_ipu_dev, "panel size = %d x %d\n", width, height); + + if ((v_sync_width == 0) || (h_sync_width == 0)) + return EINVAL; + + adapt_panel_to_ipu_restricitions(&pixel_clk, width, height, + h_start_width, h_end_width, + v_start_width, &v_end_width); + h_total = width + h_sync_width + h_start_width + h_end_width; + v_total = height + v_sync_width + v_start_width + v_end_width; + + /* Init clocking */ + dev_dbg(g_ipu_dev, "pixel clk = %d\n", pixel_clk); + + if (sig.ext_clk) { + if (!(g_di1_tvout && (disp == 1))) { /* not round div for tvout*/ + /* Set the PLL to be an even multiple of the pixel clock. */ + if ((clk_get_usecount(g_pixel_clk[0]) == 0) && + (clk_get_usecount(g_pixel_clk[1]) == 0)) { + di_parent = clk_get_parent(g_di_clk[disp]); + rounded_pixel_clk = + clk_round_rate(g_pixel_clk[disp], pixel_clk); + div = clk_get_rate(di_parent) / rounded_pixel_clk; + if (div % 2) + div++; + + if (clk_get_rate(di_parent) != div * rounded_pixel_clk) + clk_set_rate(di_parent, div * rounded_pixel_clk); + msleep(10); + clk_set_rate(g_di_clk[disp], 2 * rounded_pixel_clk); + msleep(10); + } + } + clk_set_parent(g_pixel_clk[disp], g_di_clk[disp]); + } else { + if (clk_get_usecount(g_pixel_clk[disp]) != 0) + clk_set_parent(g_pixel_clk[disp], g_ipu_clk); + } + rounded_pixel_clk = clk_round_rate(g_pixel_clk[disp], pixel_clk); + clk_set_rate(g_pixel_clk[disp], rounded_pixel_clk); + msleep(5); + /* Get integer portion of divider */ + div = clk_get_rate(clk_get_parent(g_pixel_clk[disp])) / rounded_pixel_clk; + + ipu_freq_scaling_enabled = dvfs_per_pixel_clk_limit(); + + if (ipu_freq_scaling_enabled) { + /* Enable for a divide by 2 clock change. */ + reg = __raw_readl(IPU_PM); + reg &= ~(0x7f << 7); + reg |= 0x20 << 7; + reg &= ~(0x7f << 23); + reg |= 0x20 << 23; + __raw_writel(reg, IPU_PM); + } + spin_lock_irqsave(&ipu_lock, lock_flags); + + _ipu_di_data_wave_config(disp, SYNC_WAVE, div - 1, div - 1); + _ipu_di_data_pin_config(disp, SYNC_WAVE, DI_PIN15, 3, 0, div * 2); + + map = _ipu_pixfmt_to_map(pixel_fmt); + if (map < 0) { + dev_dbg(g_ipu_dev, "IPU_DISP: No MAP\n"); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EINVAL; + } + + di_gen = __raw_readl(DI_GENERAL(disp)); + + if (sig.interlaced) { + if (cpu_is_mx51_rev(CHIP_REV_2_0)) { + /* Setup internal HSYNC waveform */ + _ipu_di_sync_config( + disp, /* display */ + 1, /* counter */ + h_total/2 - 1, /* run count */ + DI_SYNC_CLK, /* run_resolution */ + 0, /* offset */ + DI_SYNC_NONE, /* offset resolution */ + 0, /* repeat count */ + DI_SYNC_NONE, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* Field 1 VSYNC waveform */ + _ipu_di_sync_config( + disp, /* display */ + 2, /* counter */ + h_total - 1, /* run count */ + DI_SYNC_CLK, /* run_resolution */ + 0, /* offset */ + DI_SYNC_NONE, /* offset resolution */ + 0, /* repeat count */ + DI_SYNC_NONE, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 4 /* COUNT DOWN */ + ); + + /* Setup internal HSYNC waveform */ + _ipu_di_sync_config( + disp, /* display */ + 3, /* counter */ + v_total*2 - 1, /* run count */ + DI_SYNC_INT_HSYNC, /* run_resolution */ + 1, /* offset */ + DI_SYNC_INT_HSYNC, /* offset resolution */ + 0, /* repeat count */ + DI_SYNC_NONE, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 4 /* COUNT DOWN */ + ); + + /* Active Field ? */ + _ipu_di_sync_config( + disp, /* display */ + 4, /* counter */ + v_total/2 - 1, /* run count */ + DI_SYNC_HSYNC, /* run_resolution */ + v_start_width, /* offset */ + DI_SYNC_HSYNC, /* offset resolution */ + 2, /* repeat count */ + DI_SYNC_VSYNC, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* Active Line */ + _ipu_di_sync_config( + disp, /* display */ + 5, /* counter */ + 0, /* run count */ + DI_SYNC_HSYNC, /* run_resolution */ + 0, /* offset */ + DI_SYNC_NONE, /* offset resolution */ + height/2, /* repeat count */ + 4, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* Field 0 VSYNC waveform */ + _ipu_di_sync_config( + disp, /* display */ + 6, /* counter */ + v_total - 1, /* run count */ + DI_SYNC_HSYNC, /* run_resolution */ + 0, /* offset */ + DI_SYNC_NONE, /* offset resolution */ + 0, /* repeat count */ + DI_SYNC_NONE, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* DC VSYNC waveform */ + vsync_cnt = 7; + _ipu_di_sync_config( + disp, /* display */ + 7, /* counter */ + v_total/2 - 1, /* run count */ + DI_SYNC_HSYNC, /* run_resolution */ + 9, /* offset */ + DI_SYNC_HSYNC, /* offset resolution */ + 2, /* repeat count */ + DI_SYNC_VSYNC, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* active pixel waveform */ + _ipu_di_sync_config( + disp, /* display */ + 8, /* counter */ + 0, /* run count */ + DI_SYNC_CLK, /* run_resolution */ + h_start_width, /* offset */ + DI_SYNC_CLK, /* offset resolution */ + width, /* repeat count */ + 5, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 0 /* COUNT DOWN */ + ); + + /* ??? */ + _ipu_di_sync_config( + disp, /* display */ + 9, /* counter */ + v_total - 1, /* run count */ + DI_SYNC_INT_HSYNC, /* run_resolution */ + v_total/2, /* offset */ + DI_SYNC_INT_HSYNC, /* offset resolution */ + 0, /* repeat count */ + DI_SYNC_HSYNC, /* CNT_CLR_SEL */ + 0, /* CNT_POLARITY_GEN_EN */ + DI_SYNC_NONE, /* CNT_POLARITY_CLR_SEL */ + DI_SYNC_NONE, /* CNT_POLARITY_TRIGGER_SEL */ + 0, /* COUNT UP */ + 4 /* COUNT DOWN */ + ); + + /* set gentime select and tag sel */ + reg = __raw_readl(DI_SW_GEN1(disp, 9)); + reg &= 0x1FFFFFFF; + reg |= (3-1)<<29 | 0x00008000; + __raw_writel(reg, DI_SW_GEN1(disp, 9)); + + __raw_writel(v_total / 2 - 1, DI_SCR_CONF(disp)); + + /* set y_sel = 1 */ + di_gen |= 0x10000000; + di_gen |= DI_GEN_POLARITY_5; + di_gen |= DI_GEN_POLARITY_8; + } else { + /* Setup internal HSYNC waveform */ + _ipu_di_sync_config(disp, 1, h_total - 1, DI_SYNC_CLK, + 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + + field1_offset = v_sync_width + v_start_width + height / 2 + + v_end_width; + if (sig.odd_field_first) { + field0_offset = field1_offset - 1; + field1_offset = 0; + } + v_total += v_start_width + v_end_width; + + /* Field 1 VSYNC waveform */ + _ipu_di_sync_config(disp, 2, v_total - 1, 1, + field0_offset, + field0_offset ? 1 : DI_SYNC_NONE, + 0, DI_SYNC_NONE, 0, + DI_SYNC_NONE, DI_SYNC_NONE, 0, 4); + + /* Setup internal HSYNC waveform */ + _ipu_di_sync_config(disp, 3, h_total - 1, DI_SYNC_CLK, + 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, 0, + DI_SYNC_NONE, DI_SYNC_NONE, 0, 4); + + /* Active Field ? */ + _ipu_di_sync_config(disp, 4, + field0_offset ? + field0_offset : field1_offset - 2, + 1, v_start_width + v_sync_width, 1, 2, 2, + 0, DI_SYNC_NONE, DI_SYNC_NONE, 0, 0); + + /* Active Line */ + _ipu_di_sync_config(disp, 5, 0, 1, + 0, DI_SYNC_NONE, + height / 2, 4, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + + /* Field 0 VSYNC waveform */ + _ipu_di_sync_config(disp, 6, v_total - 1, 1, + 0, DI_SYNC_NONE, + 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + + /* DC VSYNC waveform */ + vsync_cnt = 7; + _ipu_di_sync_config(disp, 7, 0, 1, + field1_offset, + field1_offset ? 1 : DI_SYNC_NONE, + 1, 2, 0, DI_SYNC_NONE, DI_SYNC_NONE, 0, 0); + + /* active pixel waveform */ + _ipu_di_sync_config(disp, 8, 0, DI_SYNC_CLK, + h_sync_width + h_start_width, DI_SYNC_CLK, + width, 5, 0, DI_SYNC_NONE, DI_SYNC_NONE, + 0, 0); + + /* ??? */ + _ipu_di_sync_config(disp, 9, v_total - 1, 2, + 0, DI_SYNC_NONE, + 0, DI_SYNC_NONE, 6, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + + reg = __raw_readl(DI_SW_GEN1(disp, 9)); + reg |= 0x8000; + __raw_writel(reg, DI_SW_GEN1(disp, 9)); + + __raw_writel(v_sync_width + v_start_width + + v_end_width + height / 2 - 1, DI_SCR_CONF(disp)); + } + + /* Init template microcode */ + _ipu_dc_write_tmpl(0, WROD(0), 0, map, SYNC_WAVE, 0, 8); + + if (sig.Hsync_pol) + di_gen |= DI_GEN_POLARITY_3; + if (sig.Vsync_pol) + di_gen |= DI_GEN_POLARITY_2; + } else { + /* Setup internal HSYNC waveform */ + _ipu_di_sync_config(disp, 1, h_total - 1, DI_SYNC_CLK, + 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + + /* Setup external (delayed) HSYNC waveform */ + _ipu_di_sync_config(disp, DI_SYNC_HSYNC, h_total - 1, + DI_SYNC_CLK, div * v_to_h_sync, DI_SYNC_CLK, + 0, DI_SYNC_NONE, 1, DI_SYNC_NONE, + DI_SYNC_CLK, 0, h_sync_width * 2); + /* Setup VSYNC waveform */ + vsync_cnt = DI_SYNC_VSYNC; + _ipu_di_sync_config(disp, DI_SYNC_VSYNC, v_total - 1, + DI_SYNC_INT_HSYNC, 0, DI_SYNC_NONE, 0, + DI_SYNC_NONE, 1, DI_SYNC_NONE, + DI_SYNC_INT_HSYNC, 0, v_sync_width * 2); + __raw_writel(v_total - 1, DI_SCR_CONF(disp)); + + /* Setup active data waveform to sync with DC */ + _ipu_di_sync_config(disp, 4, 0, DI_SYNC_HSYNC, + v_sync_width + v_start_width, DI_SYNC_HSYNC, height, + DI_SYNC_VSYNC, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + _ipu_di_sync_config(disp, 5, 0, DI_SYNC_CLK, + h_sync_width + h_start_width, DI_SYNC_CLK, + width, 4, 0, DI_SYNC_NONE, DI_SYNC_NONE, 0, + 0); + + /* reset all unused counters */ + __raw_writel(0, DI_SW_GEN0(disp, 6)); + __raw_writel(0, DI_SW_GEN1(disp, 6)); + __raw_writel(0, DI_SW_GEN0(disp, 7)); + __raw_writel(0, DI_SW_GEN1(disp, 7)); + __raw_writel(0, DI_SW_GEN0(disp, 8)); + __raw_writel(0, DI_SW_GEN1(disp, 8)); + __raw_writel(0, DI_SW_GEN0(disp, 9)); + __raw_writel(0, DI_SW_GEN1(disp, 9)); + + reg = __raw_readl(DI_STP_REP(disp, 6)); + reg &= 0x0000FFFF; + __raw_writel(reg, DI_STP_REP(disp, 6)); + __raw_writel(0, DI_STP_REP(disp, 7)); + __raw_writel(0, DI_STP_REP(disp, 9)); + + if (ipu_freq_scaling_enabled) { + h_total = ((width + h_start_width + + h_sync_width) / 2) - 2; + _ipu_di_sync_config(disp, 6, 1, 0, + 2, DI_SYNC_CLK, + h_total, + DI_SYNC_INT_HSYNC, 0, DI_SYNC_NONE, + DI_SYNC_NONE, 0, 0); + } + + /* Init template microcode */ + if (disp) { + _ipu_dc_write_tmpl(2, WROD(0), 0, map, SYNC_WAVE, 8, 5); + _ipu_dc_write_tmpl(3, WROD(0), 0, map, SYNC_WAVE, 4, 5); + _ipu_dc_write_tmpl(4, WROD(0), 0, map, SYNC_WAVE, 0, 5); + } else { + _ipu_dc_write_tmpl(5, WROD(0), 0, map, SYNC_WAVE, 8, 5); + _ipu_dc_write_tmpl(6, WROD(0), 0, map, SYNC_WAVE, 4, 5); + _ipu_dc_write_tmpl(7, WROD(0), 0, map, SYNC_WAVE, 0, 5); + } + + if (sig.Hsync_pol) + di_gen |= DI_GEN_POLARITY_2; + if (sig.Vsync_pol) + di_gen |= DI_GEN_POLARITY_3; + + if (ipu_freq_scaling_enabled) + /* Set the clock to stop at counter 6. */ + di_gen |= 0x6000000; + } + + __raw_writel(di_gen, DI_GENERAL(disp)); + + if (!ipu_freq_scaling_enabled) + __raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET) | + 0x00000002, DI_SYNC_AS_GEN(disp)); + else { + if (sig.interlaced) + __raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET) | + 0x00000002, DI_SYNC_AS_GEN(disp)); + else + __raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET), + DI_SYNC_AS_GEN(disp)); + } + + reg = __raw_readl(DI_POL(disp)); + reg &= ~(DI_POL_DRDY_DATA_POLARITY | DI_POL_DRDY_POLARITY_15); + if (sig.enable_pol) + reg |= DI_POL_DRDY_POLARITY_15; + if (sig.data_pol) + reg |= DI_POL_DRDY_DATA_POLARITY; + __raw_writel(reg, DI_POL(disp)); + + __raw_writel(width, DC_DISP_CONF2(DC_DISP_ID_SYNC(disp))); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} +EXPORT_SYMBOL(ipu_init_sync_panel); + + +int ipu_init_async_panel(int disp, int type, uint32_t cycle_time, + uint32_t pixel_fmt, ipu_adc_sig_cfg_t sig) +{ + unsigned long lock_flags; + int map; + u32 ser_conf = 0; + u32 div; + u32 di_clk = clk_get_rate(g_ipu_clk); + + /* round up cycle_time, then calcalate the divider using scaled math */ + cycle_time += (1000000000UL / di_clk) - 1; + div = (cycle_time * (di_clk / 256UL)) / (1000000000UL / 256UL); + + map = _ipu_pixfmt_to_map(pixel_fmt); + if (map < 0) + return -EINVAL; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (type == IPU_PANEL_SERIAL) { + __raw_writel((div << 24) | ((sig.ifc_width - 1) << 4), + DI_DW_GEN(disp, ASYNC_SER_WAVE)); + + _ipu_di_data_pin_config(disp, ASYNC_SER_WAVE, DI_PIN_CS, + 0, 0, (div * 2) + 1); + _ipu_di_data_pin_config(disp, ASYNC_SER_WAVE, DI_PIN_SER_CLK, + 1, div, div * 2); + _ipu_di_data_pin_config(disp, ASYNC_SER_WAVE, DI_PIN_SER_RS, + 2, 0, 0); + + _ipu_dc_write_tmpl(0x64, WROD(0), 0, map, ASYNC_SER_WAVE, 0, 0); + + /* Configure DC for serial panel */ + __raw_writel(0x14, DC_DISP_CONF1(DC_DISP_ID_SERIAL)); + + if (sig.clk_pol) + ser_conf |= DI_SER_CONF_SERIAL_CLK_POL; + if (sig.data_pol) + ser_conf |= DI_SER_CONF_SERIAL_DATA_POL; + if (sig.rs_pol) + ser_conf |= DI_SER_CONF_SERIAL_RS_POL; + if (sig.cs_pol) + ser_conf |= DI_SER_CONF_SERIAL_CS_POL; + __raw_writel(ser_conf, DI_SER_CONF(disp)); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} +EXPORT_SYMBOL(ipu_init_async_panel); + +/*! + * This function sets the foreground and background plane global alpha blending + * modes. This function also sets the DP graphic plane according to the + * parameter of IPUv3 DP channel. + * + * @param channel IPUv3 DP channel + * + * @param enable Boolean to enable or disable global alpha + * blending. If disabled, local blending is used. + * + * @param alpha Global alpha value. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, bool enable, + uint8_t alpha) +{ + uint32_t reg; + uint32_t flow; + unsigned long lock_flags; + bool bg_chan; + + if (channel == MEM_BG_SYNC || channel == MEM_FG_SYNC) + flow = DP_SYNC; + else if (channel == MEM_BG_ASYNC0 || channel == MEM_FG_ASYNC0) + flow = DP_ASYNC0; + else if (channel == MEM_BG_ASYNC1 || channel == MEM_FG_ASYNC1) + flow = DP_ASYNC1; + else + return -EINVAL; + + if (channel == MEM_BG_SYNC || channel == MEM_BG_ASYNC0 || + channel == MEM_BG_ASYNC1) + bg_chan = true; + else + bg_chan = false; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (bg_chan) { + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg & ~DP_COM_CONF_GWSEL, DP_COM_CONF(flow)); + } else { + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg | DP_COM_CONF_GWSEL, DP_COM_CONF(flow)); + } + + if (enable) { + reg = __raw_readl(DP_GRAPH_WIND_CTRL(flow)) & 0x00FFFFFFL; + __raw_writel(reg | ((uint32_t) alpha << 24), + DP_GRAPH_WIND_CTRL(flow)); + + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg | DP_COM_CONF_GWAM, DP_COM_CONF(flow)); + } else { + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg & ~DP_COM_CONF_GWAM, DP_COM_CONF(flow)); + } + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); + + return 0; +} +EXPORT_SYMBOL(ipu_disp_set_global_alpha); + +/*! + * This function sets the transparent color key for SDC graphic plane. + * + * @param channel Input parameter for the logical channel ID. + * + * @param enable Boolean to enable or disable color key + * + * @param colorKey 24-bit RGB color for transparent color key. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_disp_set_color_key(ipu_channel_t channel, bool enable, + uint32_t color_key) +{ + uint32_t reg, flow; + int y, u, v; + int red, green, blue; + unsigned long lock_flags; + + if (channel == MEM_BG_SYNC || channel == MEM_FG_SYNC) + flow = DP_SYNC; + else if (channel == MEM_BG_ASYNC0 || channel == MEM_FG_ASYNC0) + flow = DP_ASYNC0; + else if (channel == MEM_BG_ASYNC1 || channel == MEM_FG_ASYNC1) + flow = DP_ASYNC1; + else + return -EINVAL; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + color_key_4rgb = 1; + /* Transform color key from rgb to yuv if CSC is enabled */ + if (((fg_csc_type == RGB2YUV) && (bg_csc_type == YUV2YUV)) || + ((fg_csc_type == YUV2YUV) && (bg_csc_type == RGB2YUV)) || + ((fg_csc_type == YUV2YUV) && (bg_csc_type == YUV2YUV)) || + ((fg_csc_type == YUV2RGB) && (bg_csc_type == YUV2RGB))) { + + dev_dbg(g_ipu_dev, "color key 0x%x need change to yuv fmt\n", color_key); + + red = (color_key >> 16) & 0xFF; + green = (color_key >> 8) & 0xFF; + blue = color_key & 0xFF; + + y = _rgb_to_yuv(0, red, green, blue); + u = _rgb_to_yuv(1, red, green, blue); + v = _rgb_to_yuv(2, red, green, blue); + color_key = (y << 16) | (u << 8) | v; + + color_key_4rgb = 0; + + dev_dbg(g_ipu_dev, "color key change to yuv fmt 0x%x\n", color_key); + } + + if (enable) { + reg = __raw_readl(DP_GRAPH_WIND_CTRL(flow)) & 0xFF000000L; + __raw_writel(reg | color_key, DP_GRAPH_WIND_CTRL(flow)); + + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg | DP_COM_CONF_GWCKE, DP_COM_CONF(flow)); + } else { + reg = __raw_readl(DP_COM_CONF(flow)); + __raw_writel(reg & ~DP_COM_CONF_GWCKE, DP_COM_CONF(flow)); + } + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); + + return 0; +} +EXPORT_SYMBOL(ipu_disp_set_color_key); + +/*! + * This function sets the gamma correction for DP output. + * + * @param channel Input parameter for the logical channel ID. + * + * @param enable Boolean to enable or disable gamma correction. + * + * @param constk Gamma piecewise linear approximation constk coeff. + * + * @param slopek Gamma piecewise linear approximation slopek coeff. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_disp_set_gamma_correction(ipu_channel_t channel, bool enable, int constk[], int slopek[]) +{ + uint32_t reg, flow, i; + unsigned long lock_flags; + + if (channel == MEM_BG_SYNC || channel == MEM_FG_SYNC) + flow = DP_SYNC; + else if (channel == MEM_BG_ASYNC0 || channel == MEM_FG_ASYNC0) + flow = DP_ASYNC0; + else if (channel == MEM_BG_ASYNC1 || channel == MEM_FG_ASYNC1) + flow = DP_ASYNC1; + else + return -EINVAL; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + spin_lock_irqsave(&ipu_lock, lock_flags); + + for (i = 0; i < 8; i++) + __raw_writel((constk[2*i] & 0x1ff) | ((constk[2*i+1] & 0x1ff) << 16), DP_GAMMA_C(flow, i)); + for (i = 0; i < 4; i++) + __raw_writel((slopek[4*i] & 0xff) | ((slopek[4*i+1] & 0xff) << 8) | + ((slopek[4*i+2] & 0xff) << 16) | ((slopek[4*i+3] & 0xff) << 24), DP_GAMMA_S(flow, i)); + + reg = __raw_readl(DP_COM_CONF(flow)); + if (enable) { + if ((bg_csc_type == RGB2YUV) || (bg_csc_type == YUV2YUV)) + reg |= DP_COM_CONF_GAMMA_YUV_EN; + else + reg &= ~DP_COM_CONF_GAMMA_YUV_EN; + __raw_writel(reg | DP_COM_CONF_GAMMA_EN, DP_COM_CONF(flow)); + } else + __raw_writel(reg & ~DP_COM_CONF_GAMMA_EN, DP_COM_CONF(flow)); + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); + + return 0; +} +EXPORT_SYMBOL(ipu_disp_set_gamma_correction); + +/*! + * This function sets the window position of the foreground or background plane. + * modes. + * + * @param channel Input parameter for the logical channel ID. + * + * @param x_pos The X coordinate position to place window at. + * The position is relative to the top left corner. + * + * @param y_pos The Y coordinate position to place window at. + * The position is relative to the top left corner. + * + * @return Returns 0 on success or negative error code on fail + */ +int32_t ipu_disp_set_window_pos(ipu_channel_t channel, int16_t x_pos, + int16_t y_pos) +{ + u32 reg; + unsigned long lock_flags; + uint32_t flow = 0; + + if (channel == MEM_FG_SYNC) + flow = DP_SYNC; + else if (channel == MEM_FG_ASYNC0) + flow = DP_ASYNC0; + else if (channel == MEM_FG_ASYNC1) + flow = DP_ASYNC1; + else + return -EINVAL; + + if (!g_ipu_clk_enabled) + clk_enable(g_ipu_clk); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + __raw_writel((x_pos << 16) | y_pos, DP_FG_POS(flow)); + + reg = __raw_readl(IPU_SRM_PRI2) | 0x8; + __raw_writel(reg, IPU_SRM_PRI2); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + if (!g_ipu_clk_enabled) + clk_disable(g_ipu_clk); + + return 0; +} +EXPORT_SYMBOL(ipu_disp_set_window_pos); + +void ipu_disp_direct_write(ipu_channel_t channel, u32 value, u32 offset) +{ + if (channel == DIRECT_ASYNC0) + __raw_writel(value, ipu_disp_base[0] + offset); + else if (channel == DIRECT_ASYNC1) + __raw_writel(value, ipu_disp_base[1] + offset); +} +EXPORT_SYMBOL(ipu_disp_direct_write); + +void ipu_reset_disp_panel(void) +{ + uint32_t tmp; + + tmp = __raw_readl(DI_GENERAL(1)); + __raw_writel(tmp | 0x08, DI_GENERAL(1)); + msleep(10); /* tRES >= 100us */ + tmp = __raw_readl(DI_GENERAL(1)); + __raw_writel(tmp & ~0x08, DI_GENERAL(1)); + msleep(60); + + return; +} +EXPORT_SYMBOL(ipu_reset_disp_panel); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_MXC_IPU_V3) = mxc_ipu.o + +mxc_ipu-objs := ipu_common.o ipu_ic.o ipu_disp.o ipu_capture.o ipu_device.o ipu_calc_stripes_sizes.o + --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c @@ -0,0 +1,374 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_calc_stripes_sizes.c + * + * @brief IPU IC functions + * + * @ingroup IPU + */ + +#include +#include +#include + +#define BPP_32 0 +#define BPP_16 3 +#define BPP_8 5 +#define BPP_24 1 +#define BPP_12 4 +#define BPP_18 2 + +static u64 _do_div(u64 a, u32 b) +{ + u64 div; + div = a; + do_div(div, b); + return div; +} + +static u32 truncate(u32 up, /* 0: down; else: up */ + u64 a, /* must be non-negative */ + u32 b) +{ + u32 d; + u64 div; + div = _do_div(a, b); + d = b * (div >> 32); + if (up && (a > (((u64)d) << 32))) + return d+b; + else + return d; +} + +static unsigned int f_calc(unsigned int pfs, unsigned int bpp, unsigned int *write) +{/* return input_f */ + unsigned int f_calculated = 0; + switch (pfs) { + case IPU_PIX_FMT_YVU422P: + case IPU_PIX_FMT_YUV422P: + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + f_calculated = 16; + break; + + case IPU_PIX_FMT_NV12: + f_calculated = 8; + break; + + default: + f_calculated = 0; + break; + + } + if (!f_calculated) { + switch (bpp) { + case BPP_32: + f_calculated = 2; + break; + + case BPP_16: + f_calculated = 4; + break; + + case BPP_8: + case BPP_24: + f_calculated = 8; + break; + + case BPP_12: + f_calculated = 16; + break; + + case BPP_18: + f_calculated = 32; + break; + + default: + f_calculated = 0; + break; + } + } + return f_calculated; +} + + +static unsigned int m_calc(unsigned int pfs) +{ + unsigned int m_calculated = 0; + switch (pfs) { + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + case IPU_PIX_FMT_YVU422P: + case IPU_PIX_FMT_YUV422P: + case IPU_PIX_FMT_YVU420P: + case IPU_PIX_FMT_NV12: + m_calculated = 8; + break; + + case IPU_PIX_FMT_YUYV: + case IPU_PIX_FMT_UYVY: + m_calculated = 2; + break; + + default: + m_calculated = 1; + break; + + } + return m_calculated; +} + + +/* Stripe parameters calculator */ +/************************************************************************** +Notes: +MSW = the maximal width allowed for a stripe + i.MX31: 720, i.MX35: 800, i.MX37/51/53: 1024 +cirr = the maximal inverse resizing ratio for which overlap in the input + is requested; typically cirr~2 +equal_stripes: + 0: each stripe is allowed to have independent parameters + for maximal image quality + 1: the stripes are requested to have identical parameters + (except the base address), for maximal performance +If performance is the top priority (above image quality) + Avoid overlap, by setting CIRR = 0 + This will also force effectively identical_stripes = 1 + Choose IF & OF that corresponds to the same IOX/SX for both stripes + Choose IFW & OFW such that + IFW/IM, IFW/IF, OFW/OM, OFW/OF are even integers + The function returns an error status: + 0: no error + 1: invalid input parameters -> aborted without result + Valid parameters should satisfy the following conditions + IFW <= OFW, otherwise downsizing is required + - which is not supported yet + 4 <= IFW,OFW, so some interpolation may be needed even without overlap + IM, OM, IF, OF should not vanish + 2*IF <= IFW + so the frame can be split to two equal stripes, even without overlap + 2*(OF+IF/irr_opt) <= OFW + so a valid positive INW exists even for equal stripes + OF <= MSW, otherwise, the left stripe cannot be sufficiently large + MSW < OFW, so splitting to stripes is required + OFW <= 2*MSW, so two stripes are sufficient + (this also implies that 2<=MSW) + 2: OF is not a multiple of OM - not fully-supported yet + Output is produced but OW is not guaranited to be a multiple of OM + 4: OFW reduced to be a multiple of OM + 8: CIRR > 1: truncated to 1 + Overlap is not supported (and not needed) y for upsizing) +**************************************************************************/ +int ipu_calc_stripes_sizes(const unsigned int input_frame_width, + /* input frame width;>1 */ + unsigned int output_frame_width, /* output frame width; >1 */ + const unsigned int maximal_stripe_width, + /* the maximal width allowed for a stripe */ + const unsigned long long cirr, /* see above */ + const unsigned int equal_stripes, /* see above */ + u32 input_pixelformat,/* pixel format after of read channel*/ + u32 output_pixelformat,/* pixel format after of write channel*/ + struct stripe_param *left, + struct stripe_param *right) +{ + const unsigned int irr_frac_bits = 13; + const unsigned long irr_steps = 1 << irr_frac_bits; + const u64 dirr = ((u64)1) << (32 - 2); + /* The maximum relative difference allowed between the irrs */ + const u64 cr = ((u64)4) << 32; + /* The importance ratio between the two terms in the cost function below */ + + unsigned int status; + unsigned int temp; + unsigned int onw_min; + unsigned int inw, onw, inw_best = 0; + /* number of pixels in the left stripe NOT hidden by the right stripe */ + u64 irr_opt; /* the optimal inverse resizing ratio */ + u64 rr_opt; /* the optimal resizing ratio = 1/irr_opt*/ + u64 dinw; /* the misalignment between the stripes */ + /* (measured in units of input columns) */ + u64 difwl, difwr; + /* The number of input columns not reflected in the output */ + /* the resizing ratio used for the right stripe is */ + /* left->irr and right->irr respectively */ + u64 cost, cost_min; + u64 div; /* result of division */ + + unsigned int input_m, input_f, output_m, output_f; /* parameters for upsizing by stripes */ + + status = 0; + + /* M, F calculations */ + /* read back pfs from params */ + + input_f = f_calc(input_pixelformat, 0, NULL); + input_m = 16; + /* BPP should be used in the out_F calc */ + /* Temporarily not used */ + /* out_F = F_calc(idmac->pfs, idmac->bpp, NULL); */ + + output_f = 16; + output_m = m_calc(output_pixelformat); + + + if ((output_frame_width < input_frame_width) || (input_frame_width < 4) + || (output_frame_width < 4)) + return 1; + + irr_opt = _do_div((((u64)(input_frame_width - 1)) << 32), + (output_frame_width - 1)); + rr_opt = _do_div((((u64)(output_frame_width - 1)) << 32), + (input_frame_width - 1)); + + if ((input_m == 0) || (output_m == 0) || (input_f == 0) || (output_f == 0) + || (input_frame_width < (2 * input_f)) + || ((((u64)output_frame_width) << 32) < + (2 * ((((u64)output_f) << 32) + (input_f * rr_opt)))) + || (maximal_stripe_width < output_f) + || (output_frame_width <= maximal_stripe_width) + || ((2 * maximal_stripe_width) < output_frame_width)) + return 1; + + if (output_f % output_m) + status += 2; + + temp = truncate(0, (((u64)output_frame_width) << 32), output_m); + if (temp < output_frame_width) { + output_frame_width = temp; + status += 4; + } + + if (equal_stripes) { + if ((irr_opt > cirr) /* overlap in the input is not requested */ + && ((input_frame_width % (input_m << 1)) == 0) + && ((input_frame_width % (input_f << 1)) == 0) + && ((output_frame_width % (output_m << 1)) == 0) + && ((output_frame_width % (output_f << 1)) == 0)) { + /* without overlap */ + left->input_width = right->input_width = right->input_column = + input_frame_width >> 1; + left->output_width = right->output_width = right->output_column = + output_frame_width >> 1; + left->input_column = right->input_column = 0; + div = _do_div(((((u64)irr_steps) << 32) * + (right->input_width - 1)), (right->output_width - 1)); + left->irr = right->irr = truncate(0, div, 1); + } else { /* with overlap */ + onw = truncate(0, (((u64)output_frame_width) << 32) >> 1, + output_f); + inw = truncate(0, onw * irr_opt, input_f); + /* this is the maximal inw which allows the same resizing ratio */ + /* in both stripes */ + onw = truncate(1, (inw * rr_opt), output_f); + div = _do_div((((u64)(irr_steps * inw)) << + 32), onw); + left->irr = right->irr = truncate(0, div, 1); + left->output_width = right->output_width = + output_frame_width - onw; + /* These are valid assignments for output_width, */ + /* assuming output_f is a multiple of output_m */ + div = (((u64)(left->output_width-1) * (left->irr)) << 32); + div = (((u64)1) << 32) + _do_div(div, irr_steps); + + left->input_width = right->input_width = truncate(1, div, input_m); + + div = _do_div((((u64)((right->output_width - 1) * right->irr)) << + 32), irr_steps); + difwr = (((u64)(input_frame_width - 1 - inw)) << 32) - div; + div = _do_div((difwr + (((u64)input_f) << 32)), 2); + left->input_column = truncate(0, div, input_f); + + + /* This splits the truncated input columns evenly */ + /* between the left and right margins */ + right->input_column = left->input_column + inw; + left->output_column = 0; + right->output_column = onw; + } + } else { /* independent stripes */ + onw_min = output_frame_width - maximal_stripe_width; + /* onw is a multiple of output_f, in the range */ + /* [max(output_f,output_frame_width-maximal_stripe_width),*/ + /*min(output_frame_width-2,maximal_stripe_width)] */ + /* definitely beyond the cost of any valid setting */ + cost_min = (((u64)input_frame_width) << 32) + cr; + onw = truncate(0, ((u64)maximal_stripe_width), output_f); + if (output_frame_width - onw == 1) + onw -= output_f; /* => onw and output_frame_width-1-onw are positive */ + inw = truncate(0, onw * irr_opt, input_f); + /* this is the maximal inw which allows the same resizing ratio */ + /* in both stripes */ + onw = truncate(1, inw * rr_opt, output_f); + do { + div = _do_div((((u64)(irr_steps * inw)) << 32), onw); + left->irr = truncate(0, div, 1); + div = _do_div((((u64)(onw * left->irr)) << 32), + irr_steps); + dinw = (((u64)inw) << 32) - div; + + div = _do_div((((u64)((output_frame_width - 1 - onw) * left->irr)) << + 32), irr_steps); + + difwl = (((u64)(input_frame_width - 1 - inw)) << 32) - div; + + cost = difwl + (((u64)(cr * dinw)) >> 32); + + if (cost < cost_min) { + inw_best = inw; + cost_min = cost; + } + + inw -= input_f; + onw = truncate(1, inw * rr_opt, output_f); + /* This is the minimal onw which allows the same resizing ratio */ + /* in both stripes */ + } while (onw >= onw_min); + + inw = inw_best; + onw = truncate(1, inw * rr_opt, output_f); + div = _do_div((((u64)(irr_steps * inw)) << 32), onw); + left->irr = truncate(0, div, 1); + + left->output_width = onw; + right->output_width = output_frame_width - onw; + /* These are valid assignments for output_width, */ + /* assuming output_f is a multiple of output_m */ + left->input_width = truncate(1, ((u64)(inw + 1)) << 32, input_m); + right->input_width = truncate(1, ((u64)(input_frame_width - inw)) << + 32, input_m); + + div = _do_div((((u64)(irr_steps * (input_frame_width - 1 - inw))) << + 32), (right->output_width - 1)); + right->irr = truncate(0, div, 1); + temp = truncate(0, ((u64)left->irr) * ((((u64)1) << 32) + dirr), 1); + if (temp < right->irr) + right->irr = temp; + div = _do_div(((u64)((right->output_width - 1) * right->irr) << + 32), irr_steps); + difwr = (u64)(input_frame_width - 1 - inw) - div; + + + div = _do_div((difwr + (((u64)input_f) << 32)), 2); + left->input_column = truncate(0, div, input_f); + + /* This splits the truncated input columns evenly */ + /* between the left and right margins */ + right->input_column = left->input_column + inw; + left->output_column = 0; + right->output_column = onw; + } + return status; +} +EXPORT_SYMBOL(ipu_calc_stripes_sizes); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu3/ipu_device.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu3/ipu_device.c @@ -0,0 +1,486 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_device.c + * + * @brief This file contains the IPUv3 driver device interface and fops functions. + * + * @ingroup IPU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +/* Strucutures and variables for exporting MXC IPU as device*/ + +static int mxc_ipu_major; +static struct class *mxc_ipu_class; + +DEFINE_SPINLOCK(event_lock); + +struct ipu_dev_irq_info { + wait_queue_head_t waitq; + int irq_pending; +} irq_info[480]; + +int register_ipu_device(void); + +/* Static functions */ + +int get_events(ipu_event_info *p) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&event_lock, flags); + if (irq_info[p->irq].irq_pending > 0) + irq_info[p->irq].irq_pending--; + else + ret = -1; + spin_unlock_irqrestore(&event_lock, flags); + + return ret; +} + +static irqreturn_t mxc_ipu_generic_handler(int irq, void *dev_id) +{ + irq_info[irq].irq_pending++; + + /* Wakeup any blocking user context */ + wake_up_interruptible(&(irq_info[irq].waitq)); + return IRQ_HANDLED; +} + +static int mxc_ipu_open(struct inode *inode, struct file *file) +{ + int ret = 0; + return ret; +} +static int mxc_ipu_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int ret = 0; + + switch (cmd) { + case IPU_INIT_CHANNEL: + { + ipu_channel_parm parm; + + if (copy_from_user + (&parm, (ipu_channel_parm *) arg, + sizeof(ipu_channel_parm))) + return -EFAULT; + + if (!parm.flag) { + ret = + ipu_init_channel(parm.channel, + &parm.params); + } else { + ret = ipu_init_channel(parm.channel, NULL); + } + } + break; + case IPU_UNINIT_CHANNEL: + { + ipu_channel_t ch; + int __user *argp = (void __user *)arg; + if (get_user(ch, argp)) + return -EFAULT; + ipu_uninit_channel(ch); + } + break; + case IPU_INIT_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) + return -EFAULT; + + ret = + ipu_init_channel_buffer( + parm.channel, parm.type, + parm.pixel_fmt, + parm.width, parm.height, + parm.stride, + parm.rot_mode, + parm.phyaddr_0, + parm.phyaddr_1, + parm.u_offset, + parm.v_offset); + + } + break; + case IPU_UPDATE_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) + return -EFAULT; + + if ((parm.phyaddr_0 != (dma_addr_t) NULL) + && (parm.phyaddr_1 == (dma_addr_t) NULL)) { + ret = + ipu_update_channel_buffer( + parm.channel, + parm.type, + parm.bufNum, + parm.phyaddr_0); + } else if ((parm.phyaddr_0 == (dma_addr_t) NULL) + && (parm.phyaddr_1 != (dma_addr_t) NULL)) { + ret = + ipu_update_channel_buffer( + parm.channel, + parm.type, + parm.bufNum, + parm.phyaddr_1); + } else { + ret = -1; + } + + } + break; + case IPU_SELECT_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) + return -EFAULT; + + ret = + ipu_select_buffer(parm.channel, + parm.type, parm.bufNum); + + } + break; + case IPU_LINK_CHANNELS: + { + ipu_channel_link link; + if (copy_from_user + (&link, (ipu_channel_link *) arg, + sizeof(ipu_channel_link))) + return -EFAULT; + + ret = ipu_link_channels(link.src_ch, + link.dest_ch); + + } + break; + case IPU_UNLINK_CHANNELS: + { + ipu_channel_link link; + if (copy_from_user + (&link, (ipu_channel_link *) arg, + sizeof(ipu_channel_link))) + return -EFAULT; + + ret = ipu_unlink_channels(link.src_ch, + link.dest_ch); + + } + break; + case IPU_ENABLE_CHANNEL: + { + ipu_channel_t ch; + int __user *argp = (void __user *)arg; + if (get_user(ch, argp)) + return -EFAULT; + ipu_enable_channel(ch); + } + break; + case IPU_DISABLE_CHANNEL: + { + ipu_channel_info info; + if (copy_from_user + (&info, (ipu_channel_info *) arg, + sizeof(ipu_channel_info))) + return -EFAULT; + + ret = ipu_disable_channel(info.channel, + info.stop); + } + break; + case IPU_ENABLE_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_enable_irq(irq); + } + break; + case IPU_DISABLE_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_disable_irq(irq); + } + break; + case IPU_CLEAR_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_clear_irq(irq); + } + break; + case IPU_FREE_IRQ: + { + ipu_irq_info info; + + if (copy_from_user + (&info, (ipu_irq_info *) arg, + sizeof(ipu_irq_info))) + return -EFAULT; + + ipu_free_irq(info.irq, info.dev_id); + irq_info[info.irq].irq_pending = 0; + } + break; + case IPU_REQUEST_IRQ_STATUS: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ret = ipu_get_irq_status(irq); + } + break; + case IPU_REGISTER_GENERIC_ISR: + { + ipu_event_info info; + if (copy_from_user + (&info, (ipu_event_info *) arg, + sizeof(ipu_event_info))) + return -EFAULT; + + ret = + ipu_request_irq(info.irq, + mxc_ipu_generic_handler, + 0, "video_sink", info.dev); + if (ret == 0) + init_waitqueue_head(&(irq_info[info.irq].waitq)); + } + break; + case IPU_GET_EVENT: + /* User will have to allocate event_type + structure and pass the pointer in arg */ + { + ipu_event_info info; + int r = -1; + + if (copy_from_user + (&info, (ipu_event_info *) arg, + sizeof(ipu_event_info))) + return -EFAULT; + + r = get_events(&info); + if (r == -1) { + if ((file->f_flags & O_NONBLOCK) && + (irq_info[info.irq].irq_pending == 0)) + return -EAGAIN; + wait_event_interruptible_timeout(irq_info[info.irq].waitq, + (irq_info[info.irq].irq_pending != 0), 2 * HZ); + r = get_events(&info); + } + ret = -1; + if (r == 0) { + if (!copy_to_user((ipu_event_info *) arg, + &info, sizeof(ipu_event_info))) + ret = 0; + } + } + break; + case IPU_ALOC_MEM: + { + ipu_mem_info info; + if (copy_from_user + (&info, (ipu_mem_info *) arg, + sizeof(ipu_mem_info))) + return -EFAULT; + + info.vaddr = dma_alloc_coherent(0, + PAGE_ALIGN(info.size), + &info.paddr, + GFP_DMA | GFP_KERNEL); + if (info.vaddr == 0) { + printk(KERN_ERR "dma alloc failed!\n"); + return -ENOBUFS; + } + if (copy_to_user((ipu_mem_info *) arg, &info, + sizeof(ipu_mem_info)) > 0) + return -EFAULT; + } + break; + case IPU_FREE_MEM: + { + ipu_mem_info info; + if (copy_from_user + (&info, (ipu_mem_info *) arg, + sizeof(ipu_mem_info))) + return -EFAULT; + + if (info.vaddr) + dma_free_coherent(0, PAGE_ALIGN(info.size), + info.vaddr, info.paddr); + else + return -EFAULT; + } + break; + case IPU_IS_CHAN_BUSY: + { + ipu_channel_t chan; + if (copy_from_user + (&chan, (ipu_channel_t *)arg, + sizeof(ipu_channel_t))) + return -EFAULT; + + if (ipu_is_channel_busy(chan)) + ret = 1; + else + ret = 0; + } + break; + case IPU_CALC_STRIPES_SIZE: + { + ipu_stripe_parm stripe_parm; + + if (copy_from_user (&stripe_parm, (ipu_stripe_parm *)arg, + sizeof(ipu_stripe_parm))) + return -EFAULT; + ipu_calc_stripes_sizes(stripe_parm.input_width, + stripe_parm.output_width, + stripe_parm.maximal_stripe_width, + stripe_parm.cirr, + stripe_parm.equal_stripes, + stripe_parm.input_pixelformat, + stripe_parm.output_pixelformat, + &stripe_parm.left, + &stripe_parm.right); + if (copy_to_user((ipu_stripe_parm *) arg, &stripe_parm, + sizeof(ipu_stripe_parm)) > 0) + return -EFAULT; + } + break; + case IPU_UPDATE_BUF_OFFSET: + { + ipu_buf_offset_parm offset_parm; + + if (copy_from_user (&offset_parm, (ipu_buf_offset_parm *)arg, + sizeof(ipu_buf_offset_parm))) + return -EFAULT; + ret = ipu_update_channel_offset(offset_parm.channel, + offset_parm.type, + offset_parm.pixel_fmt, + offset_parm.width, + offset_parm.height, + offset_parm.stride, + offset_parm.u_offset, + offset_parm.v_offset, + offset_parm.vertical_offset, + offset_parm.horizontal_offset); + } + break; + default: + break; + } + return ret; +} + +static int mxc_ipu_mmap(struct file *file, struct vm_area_struct *vma) +{ +// vma->vm_page_prot = pgprot_writethru(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) { + printk(KERN_ERR + "mmap failed!\n"); + return -ENOBUFS; + } + return 0; +} + +static int mxc_ipu_release(struct inode *inode, struct file *file) +{ + return 0; +} + +static struct file_operations mxc_ipu_fops = { + .owner = THIS_MODULE, + .open = mxc_ipu_open, + .mmap = mxc_ipu_mmap, + .release = mxc_ipu_release, + .ioctl = mxc_ipu_ioctl +}; + +int register_ipu_device() +{ + int ret = 0; + struct device *temp; + mxc_ipu_major = register_chrdev(0, "mxc_ipu", &mxc_ipu_fops); + if (mxc_ipu_major < 0) { + printk(KERN_ERR + "Unable to register Mxc Ipu as a char device\n"); + return mxc_ipu_major; + } + + mxc_ipu_class = class_create(THIS_MODULE, "mxc_ipu"); + if (IS_ERR(mxc_ipu_class)) { + printk(KERN_ERR "Unable to create class for Mxc Ipu\n"); + ret = PTR_ERR(mxc_ipu_class); + goto err1; + } + + temp = device_create(mxc_ipu_class, NULL, MKDEV(mxc_ipu_major, 0), + NULL, "mxc_ipu"); + + if (IS_ERR(temp)) { + printk(KERN_ERR "Unable to create class device for Mxc Ipu\n"); + ret = PTR_ERR(temp); + goto err2; + } + spin_lock_init(&event_lock); + + return ret; + +err2: + class_destroy(mxc_ipu_class); +err1: + unregister_chrdev(mxc_ipu_major, "mxc_ipu"); + return ret; + +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/bt/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/bt/Kconfig @@ -0,0 +1,13 @@ +# +# Bluetooth configuration +# + +menu "MXC Bluetooth support" + +config MXC_BLUETOOTH + tristate "MXC Bluetooth support" + depends on MACH_MX31_3DS || MACH_MX35_3DS || MACH_MX37_3DS || MACH_MX51_3DS + ---help--- + Say Y to get the third party Bluetooth service. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/bt/mxc_bt.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/bt/mxc_bt.c @@ -0,0 +1,128 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_bt.c + * + * @brief MXC Thirty party Bluetooth + * + */ + +#include +#include +#include +#include +#include +#include + +static struct regulator *bt_vdd; +static struct regulator *bt_vdd_parent; +static struct regulator *bt_vusb; +static struct regulator *bt_vusb_parent; + +/*! + * This function poweron the bluetooth hardware module + * + * @param pdev Pointer to the platform device + * @return 0 on success, -1 otherwise. + */ +static int mxc_bt_probe(struct platform_device *pdev) +{ + struct mxc_bt_platform_data *platform_data; + platform_data = (struct mxc_bt_platform_data *)pdev->dev.platform_data; + if (platform_data->bt_vdd) { + bt_vdd = regulator_get(&pdev->dev, platform_data->bt_vdd); + regulator_enable(bt_vdd); + } + if (platform_data->bt_vdd_parent) { + bt_vdd_parent = + regulator_get(&pdev->dev, platform_data->bt_vdd_parent); + regulator_enable(bt_vdd_parent); + } + if (platform_data->bt_vusb) { + bt_vusb = regulator_get(&pdev->dev, platform_data->bt_vusb); + regulator_enable(bt_vusb); + } + if (platform_data->bt_vusb_parent) { + bt_vusb_parent = + regulator_get(&pdev->dev, platform_data->bt_vusb_parent); + regulator_enable(bt_vusb_parent); + } + + if (platform_data->bt_reset != NULL) + platform_data->bt_reset(); + return 0; + +} + +/*! + * This function poweroff the bluetooth hardware module + * + * @param pdev Pointer to the platform device + * @return 0 on success, -1 otherwise. + */ +static int mxc_bt_remove(struct platform_device *pdev) +{ + struct mxc_bt_platform_data *platform_data; + platform_data = (struct mxc_bt_platform_data *)pdev->dev.platform_data; + if (bt_vdd) { + regulator_disable(bt_vdd); + regulator_put(bt_vdd); + } + if (bt_vdd_parent) { + regulator_disable(bt_vdd_parent); + regulator_put(bt_vdd_parent); + } + if (bt_vusb) { + regulator_disable(bt_vusb); + regulator_put(bt_vusb); + } + if (bt_vusb_parent) { + regulator_disable(bt_vusb_parent); + regulator_put(bt_vusb_parent); + } + return 0; + +} + +static struct platform_driver bluetooth_driver = { + .driver = { + .name = "mxc_bt", + }, + .probe = mxc_bt_probe, + .remove = mxc_bt_remove, +}; + +/*! + * Register bluetooth driver module + * + */ +static __init int bluetooth_init(void) +{ + return platform_driver_register(&bluetooth_driver); +} + +/*! + * Exit and free the bluetooth module + * + */ +static void __exit bluetooth_exit(void) +{ + platform_driver_unregister(&bluetooth_driver); +} + +module_init(bluetooth_init); +module_exit(bluetooth_exit); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Thirty party Bluetooth"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/bt/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/bt/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for the kernel Bluetooth power-on/reset +# +obj-$(CONFIG_MXC_BLUETOOTH) += mxc_bt.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/gps_ioctrl/agpsgpiodev.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/gps_ioctrl/agpsgpiodev.h @@ -0,0 +1,46 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file agpsgpiodev.h + * + * @brief head file of Simple character device interface for AGPS kernel module. + * + * @ingroup + */ + +#ifndef AGPSGPIODEV_H +#define AGPSGPIODEV_H + +#include + +#define USE_BLOCKING /* Test driver with blocking calls */ +#undef USE_FASYNC /* Test driver with async notification */ + +/* The major device number. We can't rely on dynamic registration any more + because ioctls need to know it */ +#define MAJOR_NUM 100 + +#define IOCTL_WRITEGPIO _IOWR(MAJOR_NUM, 1, char *) +#define IOCTL_READGPIO _IOR(MAJOR_NUM, 2, char *) +#define IOCTL_MAXNUMBER 2 + +/* The name of the device file */ +#define AGPSGPIO_DEVICE_FILE_NAME "agpsgpio" + +/* Exported prototypes */ +int init_chrdev(struct device *dev); +void cleanup_chrdev(void); +void wakeup(void); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/gps_ioctrl/agpsgpiodev.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/gps_ioctrl/agpsgpiodev.c @@ -0,0 +1,331 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file agpsgpiodev.c + * + * @brief Main file for GPIO kernel module. Contains driver entry/exit + * + */ + +#include +#include /* Async notification */ +#include /* for get_user, put_user, access_ok */ +#include /* jiffies */ +#include +#include +#include +#include +#include +#include +#include +#include "agpsgpiodev.h" + +extern void gpio_gps_active(void); +extern void gpio_gps_inactive(void); +extern int gpio_gps_access(int para); + +struct mxc_gps_platform_data *mxc_gps_ioctrl_data; +static int Device_Open; /* Only allow a single user of this device */ +static struct cdev mxc_gps_cdev; +static dev_t agps_gpio_dev; +static struct class *gps_class; +static struct device *gps_class_dev; + +/* Write GPIO from user space */ +static int ioctl_writegpio(int arg) +{ + + /* Bit 0 of arg identifies the GPIO pin to write: + 0 = GPS_RESET_GPIO, 1 = GPS_POWER_GPIO. + Bit 1 of arg identifies the value to write (0 or 1). */ + + /* Bit 2 should be 0 to show this access is write */ + return gpio_gps_access(arg & (~0x4)); +} + +/* Read GPIO from user space */ +static int ioctl_readgpio(int arg) +{ + /* Bit 0 of arg identifies the GPIO pin to read: + 0 = GPS_RESET_GPIO. 1 = GPS_POWER_GPIO + Bit 2 should be 1 to show this access is read */ + return gpio_gps_access(arg | 0x4); +} + +static int device_open(struct inode *inode, struct file *fp) +{ + /* We don't want to talk to two processes at the same time. */ + if (Device_Open) { + printk(KERN_DEBUG "device_open() - Returning EBUSY. \ + Device already open... \n"); + return -EBUSY; + } + Device_Open++; /* BUGBUG : Not protected! */ + try_module_get(THIS_MODULE); + + return 0; +} + +static int device_release(struct inode *inode, struct file *fp) +{ + /* We're now ready for our next caller */ + Device_Open--; + module_put(THIS_MODULE); + + return 0; +} + +static int device_ioctl(struct inode *inode, struct file *fp, + unsigned int cmd, unsigned long arg) +{ + int err = 0; + + /* Extract the type and number bitfields, and don't decode wrong cmds. + Return ENOTTY (inappropriate ioctl) before access_ok() */ + if (_IOC_TYPE(cmd) != MAJOR_NUM) { + printk(KERN_ERR + "device_ioctl() - Error! IOC_TYPE = %d. Expected %d\n", + _IOC_TYPE(cmd), MAJOR_NUM); + return -ENOTTY; + } + if (_IOC_NR(cmd) > IOCTL_MAXNUMBER) { + printk(KERN_ERR + "device_ioctl() - Error!" + "IOC_NR = %d greater than max supported(%d)\n", + _IOC_NR(cmd), IOCTL_MAXNUMBER); + return -ENOTTY; + } + + /* The direction is a bitmask, and VERIFY_WRITE catches R/W transfers. + `Type' is user-oriented, while access_ok is kernel-oriented, so the + concept of "read" and "write" is reversed. I think this is primarily + for good coding practice. You can easily do any kind of R/W access + without these checks and IOCTL code can be implemented "randomly"! */ + if (_IOC_DIR(cmd) & _IOC_READ) + err = + !access_ok(VERIFY_WRITE, (void __user *)arg, + _IOC_SIZE(cmd)); + + else if (_IOC_DIR(cmd) & _IOC_WRITE) + err = + !access_ok(VERIFY_READ, (void __user *)arg, _IOC_SIZE(cmd)); + if (err) { + printk(KERN_ERR + "device_ioctl() - Error! User arg not valid" + "for selected access (R/W/RW). Cmd %d\n", + _IOC_TYPE(cmd)); + return -EFAULT; + } + + /* Note: Read and writing data to user buffer can be done using regular + pointer stuff but we may also use get_user() or put_user() */ + + /* Cmd and arg has been verified... */ + switch (cmd) { + case IOCTL_WRITEGPIO: + return ioctl_writegpio((int)arg); + case IOCTL_READGPIO: + return ioctl_readgpio((int)arg); + default: + printk(KERN_ERR "device_ioctl() - Invalid IOCTL (0x%x)\n", cmd); + return EINVAL; + } + return 0; +} + +struct file_operations Fops = { + .ioctl = device_ioctl, + .open = device_open, + .release = device_release, +}; + +/* Initialize the module - Register the character device */ +int init_chrdev(struct device *dev) +{ + int ret, gps_major; + + ret = alloc_chrdev_region(&agps_gpio_dev, 1, 1, "agps_gpio"); + gps_major = MAJOR(agps_gpio_dev); + if (ret < 0) { + dev_err(dev, "can't get major %d\n", gps_major); + goto err3; + } + + cdev_init(&mxc_gps_cdev, &Fops); + mxc_gps_cdev.owner = THIS_MODULE; + + ret = cdev_add(&mxc_gps_cdev, agps_gpio_dev, 1); + if (ret) { + dev_err(dev, "can't add cdev\n"); + goto err2; + } + + /* create class and device for udev information */ + gps_class = class_create(THIS_MODULE, "gps"); + if (IS_ERR(gps_class)) { + dev_err(dev, "failed to create gps class\n"); + ret = -ENOMEM; + goto err1; + } + + gps_class_dev = device_create(gps_class, NULL, MKDEV(gps_major, 1), NULL, + AGPSGPIO_DEVICE_FILE_NAME); + if (IS_ERR(gps_class_dev)) { + dev_err(dev, "failed to create gps gpio class device\n"); + ret = -ENOMEM; + goto err0; + } + + return 0; +err0: + class_destroy(gps_class); +err1: + cdev_del(&mxc_gps_cdev); +err2: + unregister_chrdev_region(agps_gpio_dev, 1); +err3: + return ret; +} + +/* Cleanup - unregister the appropriate file from /proc. */ +void cleanup_chrdev(void) +{ + /* destroy gps device class */ + device_destroy(gps_class, MKDEV(MAJOR(agps_gpio_dev), 1)); + class_destroy(gps_class); + + /* Unregister the device */ + cdev_del(&mxc_gps_cdev); + unregister_chrdev_region(agps_gpio_dev, 1); +} + +/*! + * This function initializes the driver in terms of memory of the soundcard + * and some basic HW clock settings. + * + * @return 0 on success, -1 otherwise. + */ +static int __init gps_ioctrl_probe(struct platform_device *pdev) +{ + struct regulator *gps_regu; + + mxc_gps_ioctrl_data = + (struct mxc_gps_platform_data *)pdev->dev.platform_data; + + /* open GPS GPO3 1v8 for GL gps support */ + if (mxc_gps_ioctrl_data->core_reg != NULL) { + mxc_gps_ioctrl_data->gps_regu_core = + regulator_get(&(pdev->dev), mxc_gps_ioctrl_data->core_reg); + gps_regu = mxc_gps_ioctrl_data->gps_regu_core; + if (!IS_ERR_VALUE((u32)gps_regu)) { + regulator_set_voltage(gps_regu, 1800000, 1800000); + regulator_enable(gps_regu); + } else { + return -1; + } + } + /* open GPS GPO1 2v8 for GL gps support */ + if (mxc_gps_ioctrl_data->analog_reg != NULL) { + mxc_gps_ioctrl_data->gps_regu_analog = + regulator_get(&(pdev->dev), + mxc_gps_ioctrl_data->analog_reg); + gps_regu = mxc_gps_ioctrl_data->gps_regu_analog; + if (!IS_ERR_VALUE((u32)gps_regu)) { + regulator_set_voltage(gps_regu, 2800000, 2800000); + regulator_enable(gps_regu); + } else { + return -1; + } + } + gpio_gps_active(); + + /* Register character device */ + init_chrdev(&(pdev->dev)); + return 0; +} + +static int gps_ioctrl_remove(struct platform_device *pdev) +{ + struct regulator *gps_regu; + + mxc_gps_ioctrl_data = + (struct mxc_gps_platform_data *)pdev->dev.platform_data; + + /* Character device cleanup.. */ + cleanup_chrdev(); + gpio_gps_inactive(); + + /* close GPS GPO3 1v8 for GL gps */ + gps_regu = mxc_gps_ioctrl_data->gps_regu_core; + if (mxc_gps_ioctrl_data->core_reg != NULL) { + regulator_disable(gps_regu); + regulator_put(gps_regu); + } + /* close GPS GPO1 2v8 for GL gps */ + gps_regu = mxc_gps_ioctrl_data->gps_regu_analog; + if (mxc_gps_ioctrl_data->analog_reg != NULL) { + regulator_disable(gps_regu); + regulator_put(gps_regu); + } + + return 0; +} + +static int gps_ioctrl_suspend(struct platform_device *pdev, pm_message_t state) +{ + /* PowerEn toggle off */ + ioctl_writegpio(0x1); + return 0; +} + +static int gps_ioctrl_resume(struct platform_device *pdev) +{ + /* PowerEn pull up */ + ioctl_writegpio(0x3); + return 0; +} + +static struct platform_driver gps_ioctrl_driver = { + .probe = gps_ioctrl_probe, + .remove = gps_ioctrl_remove, + .suspend = gps_ioctrl_suspend, + .resume = gps_ioctrl_resume, + .driver = { + .name = "gps_ioctrl", + }, +}; + +/*! + * Entry point for GPS ioctrl module. + * + */ +static int __init gps_ioctrl_init(void) +{ + return platform_driver_register(&gps_ioctrl_driver); +} + +/*! + * unloading module. + * + */ +static void __exit gps_ioctrl_exit(void) +{ + platform_driver_unregister(&gps_ioctrl_driver); +} + +module_init(gps_ioctrl_init); +module_exit(gps_ioctrl_exit); +MODULE_DESCRIPTION("GPIO DEVICE DRIVER"); +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/gps_ioctrl/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/gps_ioctrl/Kconfig @@ -0,0 +1,13 @@ +# +# BROADCOM GPS configuration +# + +menu "Broadcom GPS ioctrl support" + +config GPS_IOCTRL + tristate "GPS ioctrl support" + depends on MACH_MX31_3DS || MACH_MX35_3DS || MACH_MX37_3DS || MACH_MX51_3DS + ---help--- + Say Y to enable Broadcom GPS ioctrl on MXC platform. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/gps_ioctrl/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/gps_ioctrl/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the GPIO device driver module. +# +obj-$(CONFIG_GPS_IOCTRL) += gps_gpiodrv.o +gps_gpiodrv-objs := agpsgpiodev.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/ssi.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/ssi.c @@ -0,0 +1,1221 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ssi.c + * @brief This file contains the implementation of the SSI driver main services + * + * + * @ingroup SSI + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "registers.h" +#include "ssi.h" + +static spinlock_t ssi_lock; +struct mxc_audio_platform_data *ssi_platform_data; + +EXPORT_SYMBOL(ssi_ac97_frame_rate_divider); +EXPORT_SYMBOL(ssi_ac97_get_command_address_register); +EXPORT_SYMBOL(ssi_ac97_get_command_data_register); +EXPORT_SYMBOL(ssi_ac97_get_tag_register); +EXPORT_SYMBOL(ssi_ac97_mode_enable); +EXPORT_SYMBOL(ssi_ac97_tag_in_fifo); +EXPORT_SYMBOL(ssi_ac97_read_command); +EXPORT_SYMBOL(ssi_ac97_set_command_address_register); +EXPORT_SYMBOL(ssi_ac97_set_command_data_register); +EXPORT_SYMBOL(ssi_ac97_set_tag_register); +EXPORT_SYMBOL(ssi_ac97_variable_mode); +EXPORT_SYMBOL(ssi_ac97_write_command); +EXPORT_SYMBOL(ssi_clock_idle_state); +EXPORT_SYMBOL(ssi_clock_off); +EXPORT_SYMBOL(ssi_enable); +EXPORT_SYMBOL(ssi_get_data); +EXPORT_SYMBOL(ssi_get_status); +EXPORT_SYMBOL(ssi_i2s_mode); +EXPORT_SYMBOL(ssi_interrupt_disable); +EXPORT_SYMBOL(ssi_interrupt_enable); +EXPORT_SYMBOL(ssi_network_mode); +EXPORT_SYMBOL(ssi_receive_enable); +EXPORT_SYMBOL(ssi_rx_bit0); +EXPORT_SYMBOL(ssi_rx_clock_direction); +EXPORT_SYMBOL(ssi_rx_clock_divide_by_two); +EXPORT_SYMBOL(ssi_rx_clock_polarity); +EXPORT_SYMBOL(ssi_rx_clock_prescaler); +EXPORT_SYMBOL(ssi_rx_early_frame_sync); +EXPORT_SYMBOL(ssi_rx_fifo_counter); +EXPORT_SYMBOL(ssi_rx_fifo_enable); +EXPORT_SYMBOL(ssi_rx_fifo_full_watermark); +EXPORT_SYMBOL(ssi_rx_flush_fifo); +EXPORT_SYMBOL(ssi_rx_frame_direction); +EXPORT_SYMBOL(ssi_rx_frame_rate); +EXPORT_SYMBOL(ssi_rx_frame_sync_active); +EXPORT_SYMBOL(ssi_rx_frame_sync_length); +EXPORT_SYMBOL(ssi_rx_mask_time_slot); +EXPORT_SYMBOL(ssi_rx_prescaler_modulus); +EXPORT_SYMBOL(ssi_rx_shift_direction); +EXPORT_SYMBOL(ssi_rx_word_length); +EXPORT_SYMBOL(ssi_set_data); +EXPORT_SYMBOL(ssi_set_wait_states); +EXPORT_SYMBOL(ssi_synchronous_mode); +EXPORT_SYMBOL(ssi_system_clock); +EXPORT_SYMBOL(ssi_transmit_enable); +EXPORT_SYMBOL(ssi_two_channel_mode); +EXPORT_SYMBOL(ssi_tx_bit0); +EXPORT_SYMBOL(ssi_tx_clock_direction); +EXPORT_SYMBOL(ssi_tx_clock_divide_by_two); +EXPORT_SYMBOL(ssi_tx_clock_polarity); +EXPORT_SYMBOL(ssi_tx_clock_prescaler); +EXPORT_SYMBOL(ssi_tx_early_frame_sync); +EXPORT_SYMBOL(ssi_tx_fifo_counter); +EXPORT_SYMBOL(ssi_tx_fifo_empty_watermark); +EXPORT_SYMBOL(ssi_tx_fifo_enable); +EXPORT_SYMBOL(ssi_tx_flush_fifo); +EXPORT_SYMBOL(ssi_tx_frame_direction); +EXPORT_SYMBOL(ssi_tx_frame_rate); +EXPORT_SYMBOL(ssi_tx_frame_sync_active); +EXPORT_SYMBOL(ssi_tx_frame_sync_length); +EXPORT_SYMBOL(ssi_tx_mask_time_slot); +EXPORT_SYMBOL(ssi_tx_prescaler_modulus); +EXPORT_SYMBOL(ssi_tx_shift_direction); +EXPORT_SYMBOL(ssi_tx_word_length); +EXPORT_SYMBOL(get_ssi_fifo_addr); + +struct resource *res; +unsigned long base_addr_1; +unsigned long base_addr_2; + +unsigned int get_ssi_fifo_addr(unsigned int ssi, int direction) +{ + unsigned int fifo_addr; + if (direction == 1) { + if (ssi_platform_data->ssi_num == 2) { + fifo_addr = + (ssi == + SSI1) ? (int)(base_addr_1 + + MXC_SSI1STX0) : (int)(base_addr_2 + + MXC_SSI2STX0); + } else { + fifo_addr = (int)(base_addr_1 + MXC_SSI1STX0); + } + } else { + fifo_addr = (int)(base_addr_1 + MXC_SSI1SRX0); + } + return fifo_addr; +} + +void * get_ssi_base_addr(unsigned int ssi) +{ + if (ssi_platform_data->ssi_num == 2) { + if (ssi == SSI1) + return IO_ADDRESS(base_addr_1); + else + return IO_ADDRESS(base_addr_2); + } + return IO_ADDRESS(base_addr_1); +} + +void set_register_bits(unsigned int mask, unsigned int data, + unsigned int offset, unsigned int ssi) +{ + volatile unsigned long reg = 0; + void *base_addr = get_ssi_base_addr(ssi); + unsigned long flags = 0; + + spin_lock_irqsave(&ssi_lock, flags); + reg = __raw_readl(base_addr + offset); + reg = (reg & (~mask)) | data; + __raw_writel(reg, base_addr + offset); + spin_unlock_irqrestore(&ssi_lock, flags); +} + +unsigned long getreg_value(unsigned int offset, unsigned int ssi) +{ + void *base_addr = get_ssi_base_addr(ssi); + return __raw_readl(base_addr + offset); +} + +void set_register(unsigned int data, unsigned int offset, unsigned int ssi) +{ + void *base_addr = get_ssi_base_addr(ssi); + __raw_writel(data, base_addr + offset); +} + +/*! + * This function controls the AC97 frame rate divider. + * + * @param module the module number + * @param frame_rate_divider the AC97 frame rate divider + */ +void ssi_ac97_frame_rate_divider(ssi_mod module, + unsigned char frame_rate_divider) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + reg |= ((frame_rate_divider & AC97_FRAME_RATE_MASK) + << AC97_FRAME_RATE_DIVIDER_SHIFT); + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function gets the AC97 command address register. + * + * @param module the module number + * @return This function returns the command address slot information. + */ +unsigned int ssi_ac97_get_command_address_register(ssi_mod module) +{ + return getreg_value(MXC_SSISACADD, module); +} + +/*! + * This function gets the AC97 command data register. + * + * @param module the module number + * @return This function returns the command data slot information. + */ +unsigned int ssi_ac97_get_command_data_register(ssi_mod module) +{ + return getreg_value(MXC_SSISACDAT, module); +} + +/*! + * This function gets the AC97 tag register. + * + * @param module the module number + * @return This function returns the tag information. + */ +unsigned int ssi_ac97_get_tag_register(ssi_mod module) +{ + return getreg_value(MXC_SSISATAG, module); +} + +/*! + * This function controls the AC97 mode. + * + * @param module the module number + * @param state the AC97 mode state (enabled or disabled) + */ +void ssi_ac97_mode_enable(ssi_mod module, bool state) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + if (state == true) { + reg |= (1 << AC97_MODE_ENABLE_SHIFT); + } else { + reg &= ~(1 << AC97_MODE_ENABLE_SHIFT); + } + + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function controls the AC97 tag in FIFO behavior. + * + * @param module the module number + * @param state the tag in fifo behavior (Tag info stored in Rx FIFO 0 if true, + * Tag info stored in SATAG register otherwise) + */ +void ssi_ac97_tag_in_fifo(ssi_mod module, bool state) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + if (state == true) { + reg |= (1 << AC97_TAG_IN_FIFO_SHIFT); + } else { + reg &= ~(1 << AC97_TAG_IN_FIFO_SHIFT); + } + + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function controls the AC97 read command. + * + * @param module the module number + * @param state the next AC97 command is a read command or not + */ +void ssi_ac97_read_command(ssi_mod module, bool state) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + if (state == true) { + reg |= (1 << AC97_READ_COMMAND_SHIFT); + } else { + reg &= ~(1 << AC97_READ_COMMAND_SHIFT); + } + + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function sets the AC97 command address register. + * + * @param module the module number + * @param address the command address slot information + */ +void ssi_ac97_set_command_address_register(ssi_mod module, unsigned int address) +{ + set_register(address, MXC_SSISACADD, module); +} + +/*! + * This function sets the AC97 command data register. + * + * @param module the module number + * @param data the command data slot information + */ +void ssi_ac97_set_command_data_register(ssi_mod module, unsigned int data) +{ + set_register(data, MXC_SSISACDAT, module); +} + +/*! + * This function sets the AC97 tag register. + * + * @param module the module number + * @param tag the tag information + */ +void ssi_ac97_set_tag_register(ssi_mod module, unsigned int tag) +{ + set_register(tag, MXC_SSISATAG, module); +} + +/*! + * This function controls the AC97 variable mode. + * + * @param module the module number + * @param state the AC97 variable mode state (enabled or disabled) + */ void ssi_ac97_variable_mode(ssi_mod module, bool state) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + if (state == true) { + reg |= (1 << AC97_VARIABLE_OPERATION_SHIFT); + } else { + reg &= ~(1 << AC97_VARIABLE_OPERATION_SHIFT); + } + + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function controls the AC97 write command. + * + * @param module the module number + * @param state the next AC97 command is a write command or not + */ +void ssi_ac97_write_command(ssi_mod module, bool state) +{ + unsigned int reg = 0; + + reg = getreg_value(MXC_SSISACNT, module); + if (state == true) { + reg |= (1 << AC97_WRITE_COMMAND_SHIFT); + } else { + reg &= ~(1 << AC97_WRITE_COMMAND_SHIFT); + } + + set_register(reg, MXC_SSISACNT, module); +} + +/*! + * This function controls the idle state of the transmit clock port during SSI internal gated mode. + * + * @param module the module number + * @param state the clock idle state + */ +void ssi_clock_idle_state(ssi_mod module, idle_state state) +{ + set_register_bits(1 << SSI_CLOCK_IDLE_SHIFT, + state << SSI_CLOCK_IDLE_SHIFT, MXC_SSISCR, module); +} + +/*! + * This function turns off/on the ccm_ssi_clk to reduce power consumption. + * + * @param module the module number + * @param state the state for ccm_ssi_clk (true: turn off, else:turn on) + */ +void ssi_clock_off(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_CLOCK_OFF_SHIFT, + state << SSI_CLOCK_OFF_SHIFT, MXC_SSISOR, module); +} + +/*! + * This function enables/disables the SSI module. + * + * @param module the module number + * @param state the state for SSI module + */ +void ssi_enable(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_ENABLE_SHIFT, state << SSI_ENABLE_SHIFT, + MXC_SSISCR, module); +} + +/*! + * This function gets the data word in the Receive FIFO of the SSI module. + * + * @param module the module number + * @param fifo the Receive FIFO to read + * @return This function returns the read data. + */ +unsigned int ssi_get_data(ssi_mod module, fifo_nb fifo) +{ + unsigned int result = 0; + + if (ssi_fifo_0 == fifo) { + result = getreg_value(MXC_SSISRX0, module); + } else { + result = getreg_value(MXC_SSISRX1, module); + } + + return result; +} + +/*! + * This function returns the status of the SSI module (SISR register) as a combination of status. + * + * @param module the module number + * @return This function returns the status of the SSI module + */ +ssi_status_enable_mask ssi_get_status(ssi_mod module) +{ + unsigned int result; + + result = getreg_value(MXC_SSISISR, module); + result &= ((1 << SSI_IRQ_STATUS_NUMBER) - 1); + + return (ssi_status_enable_mask) result; +} + +/*! + * This function selects the I2S mode of the SSI module. + * + * @param module the module number + * @param mode the I2S mode + */ +void ssi_i2s_mode(ssi_mod module, mode_i2s mode) +{ + set_register_bits(3 << SSI_I2S_MODE_SHIFT, mode << SSI_I2S_MODE_SHIFT, + MXC_SSISCR, module); +} + +/*! + * This function disables the interrupts of the SSI module. + * + * @param module the module number + * @param mask the mask of the interrupts to disable + */ +void ssi_interrupt_disable(ssi_mod module, ssi_status_enable_mask mask) +{ + set_register_bits(mask, 0, MXC_SSISIER, module); +} + +/*! + * This function enables the interrupts of the SSI module. + * + * @param module the module number + * @param mask the mask of the interrupts to enable + */ +void ssi_interrupt_enable(ssi_mod module, ssi_status_enable_mask mask) +{ + set_register_bits(0, mask, MXC_SSISIER, module); +} + +/*! + * This function enables/disables the network mode of the SSI module. + * + * @param module the module number + * @param state the network mode state + */ +void ssi_network_mode(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_NETWORK_MODE_SHIFT, + state << SSI_NETWORK_MODE_SHIFT, MXC_SSISCR, module); +} + +/*! + * This function enables/disables the receive section of the SSI module. + * + * @param module the module number + * @param state the receive section state + */ +void ssi_receive_enable(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_RECEIVE_ENABLE_SHIFT, + state << SSI_RECEIVE_ENABLE_SHIFT, MXC_SSISCR, + module); +} + +/*! + * This function configures the SSI module to receive data word at bit position 0 or 23 in the Receive shift register. + * + * @param module the module number + * @param state the state to receive at bit 0 + */ +void ssi_rx_bit0(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_BIT_0_SHIFT, state << SSI_BIT_0_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function controls the source of the clock signal used to clock the Receive shift register. + * + * @param module the module number + * @param direction the clock signal direction + */ +void ssi_rx_clock_direction(ssi_mod module, ssi_tx_rx_direction direction) +{ + set_register_bits(1 << SSI_CLOCK_DIRECTION_SHIFT, + direction << SSI_CLOCK_DIRECTION_SHIFT, MXC_SSISRCR, + module); +} + +/*! + * This function configures the divide-by-two divider of the SSI module for the receive section. + * + * @param module the module number + * @param state the divider state + */ +void ssi_rx_clock_divide_by_two(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_DIVIDE_BY_TWO_SHIFT, + state << SSI_DIVIDE_BY_TWO_SHIFT, MXC_SSISRCCR, + module); +} + +/*! + * This function controls which bit clock edge is used to clock in data. + * + * @param module the module number + * @param polarity the clock polarity + */ +void ssi_rx_clock_polarity(ssi_mod module, ssi_tx_rx_clock_polarity polarity) +{ + set_register_bits(1 << SSI_CLOCK_POLARITY_SHIFT, + polarity << SSI_CLOCK_POLARITY_SHIFT, MXC_SSISRCR, + module); +} + +/*! + * This function configures a fixed divide-by-eight clock prescaler divider of the SSI module in series with the variable prescaler for the receive section. + * + * @param module the module number + * @param state the prescaler state + */ +void ssi_rx_clock_prescaler(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_PRESCALER_RANGE_SHIFT, + state << SSI_PRESCALER_RANGE_SHIFT, + MXC_SSISRCCR, module); +} + +/*! + * This function controls the early frame sync configuration. + * + * @param module the module number + * @param early the early frame sync configuration + */ +void ssi_rx_early_frame_sync(ssi_mod module, ssi_tx_rx_early_frame_sync early) +{ + set_register_bits(1 << SSI_EARLY_FRAME_SYNC_SHIFT, + early << SSI_EARLY_FRAME_SYNC_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function gets the number of data words in the Receive FIFO. + * + * @param module the module number + * @param fifo the fifo + * @return This function returns the number of words in the Rx FIFO. + */ +unsigned char ssi_rx_fifo_counter(ssi_mod module, fifo_nb fifo) +{ + unsigned char result; + result = 0; + + if (ssi_fifo_0 == fifo) { + result = getreg_value(MXC_SSISFCSR, module); + result &= (0xF << SSI_RX_FIFO_0_COUNT_SHIFT); + result = result >> SSI_RX_FIFO_0_COUNT_SHIFT; + } else { + result = getreg_value(MXC_SSISFCSR, module); + result &= (0xF << SSI_RX_FIFO_1_COUNT_SHIFT); + result = result >> SSI_RX_FIFO_1_COUNT_SHIFT; + } + + return result; +} + +/*! + * This function enables the Receive FIFO. + * + * @param module the module number + * @param fifo the fifo to enable + * @param enable the state of the fifo, enabled or disabled + */ + +void ssi_rx_fifo_enable(ssi_mod module, fifo_nb fifo, bool enable) +{ + volatile unsigned int reg; + + reg = getreg_value(MXC_SSISRCR, module); + if (enable == true) { + reg |= ((1 + fifo) << SSI_FIFO_ENABLE_0_SHIFT); + } else { + reg &= ~((1 + fifo) << SSI_FIFO_ENABLE_0_SHIFT); + } + + set_register(reg, MXC_SSISRCR, module); +} + +/*! + * This function controls the threshold at which the RFFx flag will be set. + * + * @param module the module number + * @param fifo the fifo to enable + * @param watermark the watermark + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_fifo_full_watermark(ssi_mod module, + fifo_nb fifo, unsigned char watermark) +{ + int result = -1; + result = -1; + + if ((watermark > SSI_MIN_FIFO_WATERMARK) && + (watermark <= SSI_MAX_FIFO_WATERMARK)) { + if (ssi_fifo_0 == fifo) { + set_register_bits(0xf << SSI_RX_FIFO_0_WATERMARK_SHIFT, + watermark << + SSI_RX_FIFO_0_WATERMARK_SHIFT, + MXC_SSISFCSR, module); + } else { + set_register_bits(0xf << SSI_RX_FIFO_1_WATERMARK_SHIFT, + watermark << + SSI_RX_FIFO_1_WATERMARK_SHIFT, + MXC_SSISFCSR, module); + } + + result = 0; + } + + return result; +} + +/*! + * This function flushes the Receive FIFOs. + * + * @param module the module number + */ +void ssi_rx_flush_fifo(ssi_mod module) +{ + set_register_bits(0, 1 << SSI_RECEIVER_CLEAR_SHIFT, MXC_SSISOR, module); +} + +/*! + * This function controls the direction of the Frame Sync signal for the receive section. + * + * @param module the module number + * @param direction the Frame Sync signal direction + */ +void ssi_rx_frame_direction(ssi_mod module, ssi_tx_rx_direction direction) +{ + set_register_bits(1 << SSI_FRAME_DIRECTION_SHIFT, + direction << SSI_FRAME_DIRECTION_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function configures the Receive frame rate divider for the receive section. + * + * @param module the module number + * @param ratio the divide ratio from 1 to 32 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_frame_rate(ssi_mod module, unsigned char ratio) +{ + int result = -1; + + if ((ratio >= SSI_MIN_FRAME_DIVIDER_RATIO) && + (ratio <= SSI_MAX_FRAME_DIVIDER_RATIO)) { + set_register_bits(SSI_FRAME_DIVIDER_MASK << + SSI_FRAME_RATE_DIVIDER_SHIFT, + (ratio - 1) << SSI_FRAME_RATE_DIVIDER_SHIFT, + MXC_SSISRCCR, module); + result = 0; + } + + return result; +} + +/*! + * This function controls the Frame Sync active polarity for the receive section. + * + * @param module the module number + * @param active the Frame Sync active polarity + */ +void ssi_rx_frame_sync_active(ssi_mod module, + ssi_tx_rx_frame_sync_active active) +{ + set_register_bits(1 << SSI_FRAME_SYNC_INVERT_SHIFT, + active << SSI_FRAME_SYNC_INVERT_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function controls the Frame Sync length (one word or one bit long) for the receive section. + * + * @param module the module number + * @param length the Frame Sync length + */ +void ssi_rx_frame_sync_length(ssi_mod module, + ssi_tx_rx_frame_sync_length length) +{ + set_register_bits(1 << SSI_FRAME_SYNC_LENGTH_SHIFT, + length << SSI_FRAME_SYNC_LENGTH_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function configures the time slot(s) to mask for the receive section. + * + * @param module the module number + * @param mask the mask to indicate the time slot(s) masked + */ +void ssi_rx_mask_time_slot(ssi_mod module, unsigned int mask) +{ + set_register_bits(0xFFFFFFFF, mask, MXC_SSISRMSK, module); +} + +/*! + * This function configures the Prescale divider for the receive section. + * + * @param module the module number + * @param divider the divide ratio from 1 to 256 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_prescaler_modulus(ssi_mod module, unsigned int divider) +{ + int result = -1; + + if ((divider >= SSI_MIN_PRESCALER_MODULUS_RATIO) && + (divider <= SSI_MAX_PRESCALER_MODULUS_RATIO)) { + + set_register_bits(SSI_PRESCALER_MODULUS_MASK << + SSI_PRESCALER_MODULUS_SHIFT, + (divider - 1) << SSI_PRESCALER_MODULUS_SHIFT, + MXC_SSISRCCR, module); + result = 0; + } + + return result; +} + +/*! + * This function controls whether the MSB or LSB will be received first in a sample. + * + * @param module the module number + * @param direction the shift direction + */ +void ssi_rx_shift_direction(ssi_mod module, ssi_tx_rx_shift_direction direction) +{ + set_register_bits(1 << SSI_SHIFT_DIRECTION_SHIFT, + direction << SSI_SHIFT_DIRECTION_SHIFT, + MXC_SSISRCR, module); +} + +/*! + * This function configures the Receive word length. + * + * @param module the module number + * @param length the word length + */ +void ssi_rx_word_length(ssi_mod module, ssi_word_length length) +{ + set_register_bits(SSI_WORD_LENGTH_MASK << SSI_WORD_LENGTH_SHIFT, + length << SSI_WORD_LENGTH_SHIFT, + MXC_SSISRCCR, module); +} + +/*! + * This function sets the data word in the Transmit FIFO of the SSI module. + * + * @param module the module number + * @param fifo the FIFO number + * @param data the data to load in the FIFO + */ + +void ssi_set_data(ssi_mod module, fifo_nb fifo, unsigned int data) +{ + if (ssi_fifo_0 == fifo) { + set_register(data, MXC_SSISTX0, module); + } else { + set_register(data, MXC_SSISTX1, module); + } +} + +/*! + * This function controls the number of wait states between the core and SSI. + * + * @param module the module number + * @param wait the number of wait state(s) + */ +void ssi_set_wait_states(ssi_mod module, ssi_wait_states wait) +{ + set_register_bits(SSI_WAIT_STATE_MASK << SSI_WAIT_SHIFT, + wait << SSI_WAIT_SHIFT, MXC_SSISOR, module); +} + +/*! + * This function enables/disables the synchronous mode of the SSI module. + * + * @param module the module number + * @param state the synchronous mode state + */ +void ssi_synchronous_mode(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_SYNCHRONOUS_MODE_SHIFT, + state << SSI_SYNCHRONOUS_MODE_SHIFT, + MXC_SSISCR, module); +} + +/*! + * This function allows the SSI module to output the SYS_CLK at the SRCK port. + * + * @param module the module number + * @param state the system clock state + */ +void ssi_system_clock(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_SYSTEM_CLOCK_SHIFT, + state << SSI_SYSTEM_CLOCK_SHIFT, MXC_SSISCR, module); +} + +/*! + * This function enables/disables the transmit section of the SSI module. + * + * @param module the module number + * @param state the transmit section state + */ +void ssi_transmit_enable(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_TRANSMIT_ENABLE_SHIFT, + state << SSI_TRANSMIT_ENABLE_SHIFT, + MXC_SSISCR, module); +} + +/*! + * This function allows the SSI module to operate in the two channel mode. + * + * @param module the module number + * @param state the two channel mode state + */ +void ssi_two_channel_mode(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_TWO_CHANNEL_SHIFT, + state << SSI_TWO_CHANNEL_SHIFT, MXC_SSISCR, module); +} + +/*! + * This function configures the SSI module to transmit data word from bit position 0 or 23 in the Transmit shift register. + * + * @param module the module number + * @param state the transmit from bit 0 state + */ +void ssi_tx_bit0(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_BIT_0_SHIFT, + state << SSI_BIT_0_SHIFT, MXC_SSISTCR, module); +} + +/*! + * This function controls the direction of the clock signal used to clock the Transmit shift register. + * + * @param module the module number + * @param direction the clock signal direction + */ +void ssi_tx_clock_direction(ssi_mod module, ssi_tx_rx_direction direction) +{ + set_register_bits(1 << SSI_CLOCK_DIRECTION_SHIFT, + direction << SSI_CLOCK_DIRECTION_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function configures the divide-by-two divider of the SSI module for the transmit section. + * + * @param module the module number + * @param state the divider state + */ +void ssi_tx_clock_divide_by_two(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_DIVIDE_BY_TWO_SHIFT, + state << SSI_DIVIDE_BY_TWO_SHIFT, + MXC_SSISTCCR, module); +} + +/*! + * This function controls which bit clock edge is used to clock out data. + * + * @param module the module number + * @param polarity the clock polarity + */ +void ssi_tx_clock_polarity(ssi_mod module, ssi_tx_rx_clock_polarity polarity) +{ + set_register_bits(1 << SSI_CLOCK_POLARITY_SHIFT, + polarity << SSI_CLOCK_POLARITY_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function configures a fixed divide-by-eight clock prescaler divider of the SSI module in series with the variable prescaler for the transmit section. + * + * @param module the module number + * @param state the prescaler state + */ +void ssi_tx_clock_prescaler(ssi_mod module, bool state) +{ + set_register_bits(1 << SSI_PRESCALER_RANGE_SHIFT, + state << SSI_PRESCALER_RANGE_SHIFT, + MXC_SSISTCCR, module); +} + +/*! + * This function controls the early frame sync configuration for the transmit section. + * + * @param module the module number + * @param early the early frame sync configuration + */ +void ssi_tx_early_frame_sync(ssi_mod module, ssi_tx_rx_early_frame_sync early) +{ + set_register_bits(1 << SSI_EARLY_FRAME_SYNC_SHIFT, + early << SSI_EARLY_FRAME_SYNC_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function gets the number of data words in the Transmit FIFO. + * + * @param module the module number + * @param fifo the fifo + * @return This function returns the number of words in the Tx FIFO. + */ +unsigned char ssi_tx_fifo_counter(ssi_mod module, fifo_nb fifo) +{ + unsigned char result = 0; + + if (ssi_fifo_0 == fifo) { + result = getreg_value(MXC_SSISFCSR, module); + result &= (0xF << SSI_TX_FIFO_0_COUNT_SHIFT); + result >>= SSI_TX_FIFO_0_COUNT_SHIFT; + } else { + result = getreg_value(MXC_SSISFCSR, module); + result &= (0xF << SSI_TX_FIFO_1_COUNT_SHIFT); + result >>= SSI_TX_FIFO_1_COUNT_SHIFT; + } + + return result; +} + +/*! + * This function controls the threshold at which the TFEx flag will be set. + * + * @param module the module number + * @param fifo the fifo to enable + * @param watermark the watermark + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_fifo_empty_watermark(ssi_mod module, + fifo_nb fifo, unsigned char watermark) +{ + int result = -1; + + if ((watermark > SSI_MIN_FIFO_WATERMARK) && + (watermark <= SSI_MAX_FIFO_WATERMARK)) { + if (ssi_fifo_0 == fifo) { + set_register_bits(0xf << SSI_TX_FIFO_0_WATERMARK_SHIFT, + watermark << + SSI_TX_FIFO_0_WATERMARK_SHIFT, + MXC_SSISFCSR, module); + } else { + set_register_bits(0xf << SSI_TX_FIFO_1_WATERMARK_SHIFT, + watermark << + SSI_TX_FIFO_1_WATERMARK_SHIFT, + MXC_SSISFCSR, module); + } + + result = 0; + } + + return result; +} + +/*! + * This function enables the Transmit FIFO. + * + * @param module the module number + * @param fifo the fifo to enable + * @param enable the state of the fifo, enabled or disabled + */ + +void ssi_tx_fifo_enable(ssi_mod module, fifo_nb fifo, bool enable) +{ + unsigned int reg; + + reg = getreg_value(MXC_SSISTCR, module); + if (enable == true) { + reg |= ((1 + fifo) << SSI_FIFO_ENABLE_0_SHIFT); + } else { + reg &= ~((1 + fifo) << SSI_FIFO_ENABLE_0_SHIFT); + } + + set_register(reg, MXC_SSISTCR, module); +} + +/*! + * This function flushes the Transmit FIFOs. + * + * @param module the module number + */ +void ssi_tx_flush_fifo(ssi_mod module) +{ + set_register_bits(0, 1 << SSI_TRANSMITTER_CLEAR_SHIFT, + MXC_SSISOR, module); +} + +/*! + * This function controls the direction of the Frame Sync signal for the transmit section. + * + * @param module the module number + * @param direction the Frame Sync signal direction + */ +void ssi_tx_frame_direction(ssi_mod module, ssi_tx_rx_direction direction) +{ + set_register_bits(1 << SSI_FRAME_DIRECTION_SHIFT, + direction << SSI_FRAME_DIRECTION_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function configures the Transmit frame rate divider. + * + * @param module the module number + * @param ratio the divide ratio from 1 to 32 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_frame_rate(ssi_mod module, unsigned char ratio) +{ + int result = -1; + + if ((ratio >= SSI_MIN_FRAME_DIVIDER_RATIO) && + (ratio <= SSI_MAX_FRAME_DIVIDER_RATIO)) { + + set_register_bits(SSI_FRAME_DIVIDER_MASK << + SSI_FRAME_RATE_DIVIDER_SHIFT, + (ratio - 1) << SSI_FRAME_RATE_DIVIDER_SHIFT, + MXC_SSISTCCR, module); + result = 0; + } + + return result; +} + +/*! + * This function controls the Frame Sync active polarity for the transmit section. + * + * @param module the module number + * @param active the Frame Sync active polarity + */ +void ssi_tx_frame_sync_active(ssi_mod module, + ssi_tx_rx_frame_sync_active active) +{ + set_register_bits(1 << SSI_FRAME_SYNC_INVERT_SHIFT, + active << SSI_FRAME_SYNC_INVERT_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function controls the Frame Sync length (one word or one bit long) for the transmit section. + * + * @param module the module number + * @param length the Frame Sync length + */ +void ssi_tx_frame_sync_length(ssi_mod module, + ssi_tx_rx_frame_sync_length length) +{ + set_register_bits(1 << SSI_FRAME_SYNC_LENGTH_SHIFT, + length << SSI_FRAME_SYNC_LENGTH_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function configures the time slot(s) to mask for the transmit section. + * + * @param module the module number + * @param mask the mask to indicate the time slot(s) masked + */ +void ssi_tx_mask_time_slot(ssi_mod module, unsigned int mask) +{ + set_register_bits(0xFFFFFFFF, mask, MXC_SSISTMSK, module); +} + +/*! + * This function configures the Prescale divider for the transmit section. + * + * @param module the module number + * @param divider the divide ratio from 1 to 256 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_prescaler_modulus(ssi_mod module, unsigned int divider) +{ + int result = -1; + + if ((divider >= SSI_MIN_PRESCALER_MODULUS_RATIO) && + (divider <= SSI_MAX_PRESCALER_MODULUS_RATIO)) { + + set_register_bits(SSI_PRESCALER_MODULUS_MASK << + SSI_PRESCALER_MODULUS_SHIFT, + (divider - 1) << SSI_PRESCALER_MODULUS_SHIFT, + MXC_SSISTCCR, module); + result = 0; + } + + return result; +} + +/*! + * This function controls whether the MSB or LSB will be transmitted first in a sample. + * + * @param module the module number + * @param direction the shift direction + */ +void ssi_tx_shift_direction(ssi_mod module, ssi_tx_rx_shift_direction direction) +{ + set_register_bits(1 << SSI_SHIFT_DIRECTION_SHIFT, + direction << SSI_SHIFT_DIRECTION_SHIFT, + MXC_SSISTCR, module); +} + +/*! + * This function configures the Transmit word length. + * + * @param module the module number + * @param length the word length + */ +void ssi_tx_word_length(ssi_mod module, ssi_word_length length) +{ + set_register_bits(SSI_WORD_LENGTH_MASK << SSI_WORD_LENGTH_SHIFT, + length << SSI_WORD_LENGTH_SHIFT, + MXC_SSISTCCR, module); +} + +/*! + * This function initializes the driver in terms of memory of the soundcard + * and some basic HW clock settings. + * + * @return 0 on success, -1 otherwise. + */ +static int __init ssi_probe(struct platform_device *pdev) +{ + int ret = -1; + ssi_platform_data = + (struct mxc_audio_platform_data *)pdev->dev.platform_data; + if (!ssi_platform_data) { + dev_err(&pdev->dev, "can't get the platform data for SSI\n"); + return -EINVAL; + } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (!res) { + dev_err(&pdev->dev, "can't get platform resource - SSI\n"); + ret = -ENOMEM; + goto err; + } + + if (pdev->id == 0) { + base_addr_1 = res->start; + } else if (pdev->id == 1) { + base_addr_2 = res->start; + } + + printk(KERN_INFO "SSI %d module loaded successfully \n", pdev->id + 1); + + return 0; + err: + return -1; + +} + +static int ssi_remove(struct platform_device *dev) +{ + return 0; +} + +static struct platform_driver mxc_ssi_driver = { + .probe = ssi_probe, + .remove = ssi_remove, + .driver = { + .name = "mxc_ssi", + }, +}; + +/*! + * This function implements the init function of the SSI device. + * This function is called when the module is loaded. + * + * @return This function returns 0. + */ +static int __init ssi_init(void) +{ + spin_lock_init(&ssi_lock); + return platform_driver_register(&mxc_ssi_driver); + +} + +/*! + * This function implements the exit function of the SPI device. + * This function is called when the module is unloaded. + * + */ +static void __exit ssi_exit(void) +{ + platform_driver_unregister(&mxc_ssi_driver); + printk(KERN_INFO "SSI module unloaded successfully\n"); +} + +module_init(ssi_init); +module_exit(ssi_exit); + +MODULE_DESCRIPTION("SSI char device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/ssi.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/ssi.h @@ -0,0 +1,574 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @defgroup SSI Synchronous Serial Interface (SSI) Driver + */ + + /*! + * @file ssi.h + * @brief This header file contains SSI driver functions prototypes. + * + * @ingroup SSI + */ + +#ifndef __MXC_SSI_H__ +#define __MXC_SSI_H__ + +#include "ssi_types.h" + +/*! + * This function gets the SSI fifo address. + * + * @param ssi ssi number + * @param direction To indicate playback / recording + * @return This function returns the SSI fifo address. + */ +unsigned int get_ssi_fifo_addr(unsigned int ssi, int direction); + +/*! + * This function controls the AC97 frame rate divider. + * + * @param module the module number + * @param frame_rate_divider the AC97 frame rate divider + */ +void ssi_ac97_frame_rate_divider(ssi_mod module, + unsigned char frame_rate_divider); + +/*! + * This function gets the AC97 command address register. + * + * @param module the module number + * @return This function returns the command address slot information. + */ +unsigned int ssi_ac97_get_command_address_register(ssi_mod module); + +/*! + * This function gets the AC97 command data register. + * + * @param module the module number + * @return This function returns the command data slot information. + */ +unsigned int ssi_ac97_get_command_data_register(ssi_mod module); + +/*! + * This function gets the AC97 tag register. + * + * @param module the module number + * @return This function returns the tag information. + */ +unsigned int ssi_ac97_get_tag_register(ssi_mod module); + +/*! + * This function controls the AC97 mode. + * + * @param module the module number + * @param state the AC97 mode state (enabled or disabled) + */ +void ssi_ac97_mode_enable(ssi_mod module, bool state); + +/*! + * This function controls the AC97 tag in FIFO behavior. + * + * @param module the module number + * @param state the tag in fifo behavior (Tag info stored in Rx FIFO 0 if TRUE, + * Tag info stored in SATAG register otherwise) + */ +void ssi_ac97_tag_in_fifo(ssi_mod module, bool state); + +/*! + * This function controls the AC97 read command. + * + * @param module the module number + * @param state the next AC97 command is a read command or not + */ +void ssi_ac97_read_command(ssi_mod module, bool state); + +/*! + * This function sets the AC97 command address register. + * + * @param module the module number + * @param address the command address slot information + */ +void ssi_ac97_set_command_address_register(ssi_mod module, + unsigned int address); + +/*! + * This function sets the AC97 command data register. + * + * @param module the module number + * @param data the command data slot information + */ +void ssi_ac97_set_command_data_register(ssi_mod module, unsigned int data); + +/*! + * This function sets the AC97 tag register. + * + * @param module the module number + * @param tag the tag information + */ +void ssi_ac97_set_tag_register(ssi_mod module, unsigned int tag); + +/*! + * This function controls the AC97 variable mode. + * + * @param module the module number + * @param state the AC97 variable mode state (enabled or disabled) + */ +void ssi_ac97_variable_mode(ssi_mod module, bool state); + +/*! + * This function controls the AC97 write command. + * + * @param module the module number + * @param state the next AC97 command is a write command or not + */ +void ssi_ac97_write_command(ssi_mod module, bool state); + +/*! + * This function controls the idle state of the transmit clock port during SSI internal gated mode. + * + * @param module the module number + * @param state the clock idle state + */ +void ssi_clock_idle_state(ssi_mod module, idle_state state); + +/*! + * This function turns off/on the ccm_ssi_clk to reduce power consumption. + * + * @param module the module number + * @param state the state for ccm_ssi_clk (true: turn off, else:turn on) + */ +void ssi_clock_off(ssi_mod module, bool state); + +/*! + * This function enables/disables the SSI module. + * + * @param module the module number + * @param state the state for SSI module + */ +void ssi_enable(ssi_mod module, bool state); + +/*! + * This function gets the data word in the Receive FIFO of the SSI module. + * + * @param module the module number + * @param fifo the Receive FIFO to read + * @return This function returns the read data. + */ +unsigned int ssi_get_data(ssi_mod module, fifo_nb fifo); + +/*! + * This function returns the status of the SSI module (SISR register) as a combination of status. + * + * @param module the module number + * @return This function returns the status of the SSI module. + */ +ssi_status_enable_mask ssi_get_status(ssi_mod module); + +/*! + * This function selects the I2S mode of the SSI module. + * + * @param module the module number + * @param mode the I2S mode + */ +void ssi_i2s_mode(ssi_mod module, mode_i2s mode); + +/*! + * This function disables the interrupts of the SSI module. + * + * @param module the module number + * @param mask the mask of the interrupts to disable + */ +void ssi_interrupt_disable(ssi_mod module, ssi_status_enable_mask mask); + +/*! + * This function enables the interrupts of the SSI module. + * + * @param module the module number + * @param mask the mask of the interrupts to enable + */ +void ssi_interrupt_enable(ssi_mod module, ssi_status_enable_mask mask); + +/*! + * This function enables/disables the network mode of the SSI module. + * + * @param module the module number + * @param state the network mode state + */ +void ssi_network_mode(ssi_mod module, bool state); + +/*! + * This function enables/disables the receive section of the SSI module. + * + * @param module the module number + * @param state the receive section state + */ +void ssi_receive_enable(ssi_mod module, bool state); + +/*! + * This function configures the SSI module to receive data word at bit position 0 or 23 in the Receive shift register. + * + * @param module the module number + * @param state the state to receive at bit 0 + */ +void ssi_rx_bit0(ssi_mod module, bool state); + +/*! + * This function controls the source of the clock signal used to clock the Receive shift register. + * + * @param module the module number + * @param direction the clock signal direction + */ +void ssi_rx_clock_direction(ssi_mod module, ssi_tx_rx_direction direction); + +/*! + * This function configures the divide-by-two divider of the SSI module for the receive section. + * + * @param module the module number + * @param state the divider state + */ +void ssi_rx_clock_divide_by_two(ssi_mod module, bool state); + +/*! + * This function controls which bit clock edge is used to clock in data. + * + * @param module the module number + * @param polarity the clock polarity + */ +void ssi_rx_clock_polarity(ssi_mod module, ssi_tx_rx_clock_polarity polarity); + +/*! + * This function configures a fixed divide-by-eight clock prescaler divider of the SSI module in series with the variable prescaler for the receive section. + * + * @param module the module number + * @param state the prescaler state + */ +void ssi_rx_clock_prescaler(ssi_mod module, bool state); + +/*! + * This function controls the early frame sync configuration. + * + * @param module the module number + * @param early the early frame sync configuration + */ +void ssi_rx_early_frame_sync(ssi_mod module, ssi_tx_rx_early_frame_sync early); + +/*! + * This function gets the number of data words in the Receive FIFO. + * + * @param module the module number + * @param fifo the fifo + * @return This function returns the number of words in the Rx FIFO. + */ +unsigned char ssi_rx_fifo_counter(ssi_mod module, fifo_nb fifo); + +/*! + * This function enables the Receive FIFO. + * + * @param module the module number + * @param fifo the fifo to enable + * @param enabled the state of the fifo, enabled or disabled + */ +void ssi_rx_fifo_enable(ssi_mod module, fifo_nb fifo, bool enabled); + +/*! + * This function controls the threshold at which the RFFx flag will be set. + * + * @param module the module number + * @param fifo the fifo to enable + * @param watermark the watermark + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_fifo_full_watermark(ssi_mod module, + fifo_nb fifo, unsigned char watermark); + +/*! + * This function flushes the Receive FIFOs. + * + * @param module the module number + */ +void ssi_rx_flush_fifo(ssi_mod module); + +/*! + * This function controls the direction of the Frame Sync signal for the receive section. + * + * @param module the module number + * @param direction the Frame Sync signal direction + */ +void ssi_rx_frame_direction(ssi_mod module, ssi_tx_rx_direction direction); + +/*! + * This function configures the Receive frame rate divider for the receive section. + * + * @param module the module number + * @param ratio the divide ratio from 1 to 32 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_frame_rate(ssi_mod module, unsigned char ratio); + +/*! + * This function controls the Frame Sync active polarity for the receive section. + * + * @param module the module number + * @param active the Frame Sync active polarity + */ +void ssi_rx_frame_sync_active(ssi_mod module, + ssi_tx_rx_frame_sync_active active); + +/*! + * This function controls the Frame Sync length (one word or one bit long) for the receive section. + * + * @param module the module number + * @param length the Frame Sync length + */ +void ssi_rx_frame_sync_length(ssi_mod module, + ssi_tx_rx_frame_sync_length length); + +/*! + * This function configures the time slot(s) to mask for the receive section. + * + * @param module the module number + * @param mask the mask to indicate the time slot(s) masked + */ +void ssi_rx_mask_time_slot(ssi_mod module, unsigned int mask); + +/*! + * This function configures the Prescale divider for the receive section. + * + * @param module the module number + * @param divider the divide ratio from 1 to 256 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_rx_prescaler_modulus(ssi_mod module, unsigned int divider); + +/*! + * This function controls whether the MSB or LSB will be received first in a sample. + * + * @param module the module number + * @param direction the shift direction + */ +void ssi_rx_shift_direction(ssi_mod module, + ssi_tx_rx_shift_direction direction); + +/*! + * This function configures the Receive word length. + * + * @param module the module number + * @param length the word length + */ +void ssi_rx_word_length(ssi_mod module, ssi_word_length length); + +/*! + * This function sets the data word in the Transmit FIFO of the SSI module. + * + * @param module the module number + * @param fifo the FIFO number + * @param data the data to load in the FIFO + */ +void ssi_set_data(ssi_mod module, fifo_nb fifo, unsigned int data); + +/*! + * This function controls the number of wait states between the core and SSI. + * + * @param module the module number + * @param wait the number of wait state(s) + */ +void ssi_set_wait_states(ssi_mod module, ssi_wait_states wait); + +/*! + * This function enables/disables the synchronous mode of the SSI module. + * + * @param module the module number + * @param state the synchronous mode state + */ +void ssi_synchronous_mode(ssi_mod module, bool state); + +/*! + * This function allows the SSI module to output the SYS_CLK at the SRCK port. + * + * @param module the module number + * @param state the system clock state + */ +void ssi_system_clock(ssi_mod module, bool state); + +/*! + * This function enables/disables the transmit section of the SSI module. + * + * @param module the module number + * @param state the transmit section state + */ +void ssi_transmit_enable(ssi_mod module, bool state); + +/*! + * This function allows the SSI module to operate in the two channel mode. + * + * @param module the module number + * @param state the two channel mode state + */ +void ssi_two_channel_mode(ssi_mod module, bool state); + +/*! + * This function configures the SSI module to transmit data word from bit position 0 or 23 in the Transmit shift register. + * + * @param module the module number + * @param state the transmit from bit 0 state + */ +void ssi_tx_bit0(ssi_mod module, bool state); + +/*! + * This function controls the direction of the clock signal used to clock the Transmit shift register. + * + * @param module the module number + * @param direction the clock signal direction + */ +void ssi_tx_clock_direction(ssi_mod module, ssi_tx_rx_direction direction); + +/*! + * This function configures the divide-by-two divider of the SSI module for the transmit section. + * + * @param module the module number + * @param state the divider state + */ +void ssi_tx_clock_divide_by_two(ssi_mod module, bool state); + +/*! + * This function controls which bit clock edge is used to clock out data. + * + * @param module the module number + * @param polarity the clock polarity + */ +void ssi_tx_clock_polarity(ssi_mod module, ssi_tx_rx_clock_polarity polarity); + +/*! + * This function configures a fixed divide-by-eight clock prescaler divider of the SSI module in series with the variable prescaler for the transmit section. + * + * @param module the module number + * @param state the prescaler state + */ +void ssi_tx_clock_prescaler(ssi_mod module, bool state); + +/*! + * This function controls the early frame sync configuration for the transmit section. + * + * @param module the module number + * @param early the early frame sync configuration + */ +void ssi_tx_early_frame_sync(ssi_mod module, ssi_tx_rx_early_frame_sync early); + +/*! + * This function gets the number of data words in the Transmit FIFO. + * + * @param module the module number + * @param fifo the fifo + * @return This function returns the number of words in the Tx FIFO. + */ +unsigned char ssi_tx_fifo_counter(ssi_mod module, fifo_nb fifo); + +/*! + * This function controls the threshold at which the TFEx flag will be set. + * + * @param module the module number + * @param fifo the fifo to enable + * @param watermark the watermark + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_fifo_empty_watermark(ssi_mod module, fifo_nb fifo, + unsigned char watermark); + +/*! + * This function enables the Transmit FIFO. + * + * @param module the module number + * @param fifo the fifo to enable + * @param enable the state of the FIFO, enabled or disabled + */ +void ssi_tx_fifo_enable(ssi_mod module, fifo_nb fifo, bool enable); + +/*! + * This function flushes the Transmit FIFOs. + * + * @param module the module number + */ +void ssi_tx_flush_fifo(ssi_mod module); + +/*! + * This function controls the direction of the Frame Sync signal for the transmit section. + * + * @param module the module number + * @param direction the Frame Sync signal direction + */ +void ssi_tx_frame_direction(ssi_mod module, ssi_tx_rx_direction direction); + +/*! + * This function configures the Transmit frame rate divider. + * + * @param module the module number + * @param ratio the divide ratio from 1 to 32 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_frame_rate(ssi_mod module, unsigned char ratio); + +/*! + * This function controls the Frame Sync active polarity for the transmit section. + * + * @param module the module number + * @param active the Frame Sync active polarity + */ +void ssi_tx_frame_sync_active(ssi_mod module, + ssi_tx_rx_frame_sync_active active); + +/*! + * This function controls the Frame Sync length (one word or one bit long) for the transmit section. + * + * @param module the module number + * @param length the Frame Sync length + */ +void ssi_tx_frame_sync_length(ssi_mod module, + ssi_tx_rx_frame_sync_length length); + +/*! + * This function configures the time slot(s) to mask for the transmit section. + * + * @param module the module number + * @param mask the mask to indicate the time slot(s) masked + */ +void ssi_tx_mask_time_slot(ssi_mod module, unsigned int mask); + +/*! + * This function configures the Prescale divider for the transmit section. + * + * @param module the module number + * @param divider the divide ratio from 1 to 256 + * @return This function returns the result of the operation (0 if successful, -1 otherwise). + */ +int ssi_tx_prescaler_modulus(ssi_mod module, unsigned int divider); + +/*! + * This function controls whether the MSB or LSB will be transmited first in a sample. + * + * @param module the module number + * @param direction the shift direction + */ +void ssi_tx_shift_direction(ssi_mod module, + ssi_tx_rx_shift_direction direction); + +/*! + * This function configures the Transmit word length. + * + * @param module the module number + * @param length the word length + */ +void ssi_tx_word_length(ssi_mod module, ssi_word_length length); + +#endif /* __MXC_SSI_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/Kconfig @@ -0,0 +1,12 @@ +# +# SPI device configuration +# + +menu "MXC SSI support" + +config MXC_SSI + tristate "SSI support" + ---help--- + Say Y to get the SSI services API available on MXC platform. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the kernel SSI device drivers. +# + +obj-$(CONFIG_MXC_SSI) += ssimod.o + +ssimod-objs := ssi.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/ssi_types.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/ssi_types.h @@ -0,0 +1,367 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file ssi_types.h + * @brief This header file contains SSI types. + * + * @ingroup SSI + */ + +#ifndef __MXC_SSI_TYPES_H__ +#define __MXC_SSI_TYPES_H__ + +/*! + * This enumeration describes the FIFO number. + */ +typedef enum { + /*! + * FIFO 0 + */ + ssi_fifo_0 = 0, + /*! + * FIFO 1 + */ + ssi_fifo_1 = 1 +} fifo_nb; + +/*! + * This enumeration describes the clock idle state. + */ +typedef enum { + /*! + * Clock idle state is 1 + */ + clock_idle_state_1 = 0, + /*! + * Clock idle state is 0 + */ + clock_idle_state_0 = 1 +} idle_state; + +/*! + * This enumeration describes I2S mode. + */ +typedef enum { + /*! + * Normal mode + */ + i2s_normal = 0, + /*! + * Master mode + */ + i2s_master = 1, + /*! + * Slave mode + */ + i2s_slave = 2 +} mode_i2s; + +/*! + * This enumeration describes index for both SSI1 and SSI2 modules. + */ +typedef enum { + /*! + * SSI1 index + */ + SSI1 = 0, + /*! + * SSI2 index not present on MXC 91221 and MXC91311 + */ + SSI2 = 1 +} ssi_mod; + +/*! + * This enumeration describes the status/enable bits for interrupt source of the SSI module. + */ +typedef enum { + /*! + * SSI Transmit FIFO 0 empty bit + */ + ssi_tx_fifo_0_empty = 0x00000001, + /*! + * SSI Transmit FIFO 1 empty bit + */ + ssi_tx_fifo_1_empty = 0x00000002, + /*! + * SSI Receive FIFO 0 full bit + */ + ssi_rx_fifo_0_full = 0x00000004, + /*! + * SSI Receive FIFO 1 full bit + */ + ssi_rx_fifo_1_full = 0x00000008, + /*! + * SSI Receive Last Time Slot bit + */ + ssi_rls = 0x00000010, + /*! + * SSI Transmit Last Time Slot bit + */ + ssi_tls = 0x00000020, + /*! + * SSI Receive Frame Sync bit + */ + ssi_rfs = 0x00000040, + /*! + * SSI Transmit Frame Sync bit + */ + ssi_tfs = 0x00000080, + /*! + * SSI Transmitter underrun 0 bit + */ + ssi_transmitter_underrun_0 = 0x00000100, + /*! + * SSI Transmitter underrun 1 bit + */ + ssi_transmitter_underrun_1 = 0x00000200, + /*! + * SSI Receiver overrun 0 bit + */ + ssi_receiver_overrun_0 = 0x00000400, + /*! + * SSI Receiver overrun 1 bit + */ + ssi_receiver_overrun_1 = 0x00000800, + /*! + * SSI Transmit Data register empty 0 bit + */ + ssi_tx_data_reg_empty_0 = 0x00001000, + /*! + * SSI Transmit Data register empty 1 bit + */ + ssi_tx_data_reg_empty_1 = 0x00002000, + + /*! + * SSI Receive Data Ready 0 bit + */ + ssi_rx_data_ready_0 = 0x00004000, + /*! + * SSI Receive Data Ready 1 bit + */ + ssi_rx_data_ready_1 = 0x00008000, + /*! + * SSI Receive tag updated bit + */ + ssi_rx_tag_updated = 0x00010000, + /*! + * SSI Command data register updated bit + */ + ssi_cmd_data_reg_updated = 0x00020000, + /*! + * SSI Command address register updated bit + */ + ssi_cmd_address_reg_updated = 0x00040000, + /*! + * SSI Transmit interrupt enable bit + */ + ssi_tx_interrupt_enable = 0x00080000, + /*! + * SSI Transmit DMA enable bit + */ + ssi_tx_dma_interrupt_enable = 0x00100000, + /*! + * SSI Receive interrupt enable bit + */ + ssi_rx_interrupt_enable = 0x00200000, + /*! + * SSI Receive DMA enable bit + */ + ssi_rx_dma_interrupt_enable = 0x00400000, + /*! + * SSI Tx frame complete enable bit on MXC91221 & MXC91311 only + */ + ssi_tx_frame_complete = 0x00800000, + /*! + * SSI Rx frame complete on MXC91221 & MXC91311 only + */ + ssi_rx_frame_complete = 0x001000000 +} ssi_status_enable_mask; + +/*! + * This enumeration describes the clock edge to clock in or clock out data. + */ +typedef enum { + /*! + * Clock on rising edge + */ + ssi_clock_on_rising_edge = 0, + /*! + * Clock on falling edge + */ + ssi_clock_on_falling_edge = 1 +} ssi_tx_rx_clock_polarity; + +/*! + * This enumeration describes the clock direction. + */ +typedef enum { + /*! + * Clock is external + */ + ssi_tx_rx_externally = 0, + /*! + * Clock is generated internally + */ + ssi_tx_rx_internally = 1 +} ssi_tx_rx_direction; + +/*! + * This enumeration describes the early frame sync behavior. + */ +typedef enum { + /*! + * Frame Sync starts on the first data bit + */ + ssi_frame_sync_first_bit = 0, + /*! + * Frame Sync starts one bit before the first data bit + */ + ssi_frame_sync_one_bit_before = 1 +} ssi_tx_rx_early_frame_sync; + +/*! + * This enumeration describes the Frame Sync active value. + */ +typedef enum { + /*! + * Frame Sync is active when high + */ + ssi_frame_sync_active_high = 0, + /*! + * Frame Sync is active when low + */ + ssi_frame_sync_active_low = 1 +} ssi_tx_rx_frame_sync_active; + +/*! + * This enumeration describes the Frame Sync active length. + */ +typedef enum { + /*! + * Frame Sync is active when high + */ + ssi_frame_sync_one_word = 0, + /*! + * Frame Sync is active when low + */ + ssi_frame_sync_one_bit = 1 +} ssi_tx_rx_frame_sync_length; + +/*! + * This enumeration describes the Tx/Rx frame shift direction. + */ +typedef enum { + /*! + * MSB first + */ + ssi_msb_first = 0, + /*! + * LSB first + */ + ssi_lsb_first = 1 +} ssi_tx_rx_shift_direction; + +/*! + * This enumeration describes the wait state number. + */ +typedef enum { + /*! + * 0 wait state + */ + ssi_waitstates0 = 0x0, + /*! + * 1 wait state + */ + ssi_waitstates1 = 0x1, + /*! + * 2 wait states + */ + ssi_waitstates2 = 0x2, + /*! + * 3 wait states + */ + ssi_waitstates3 = 0x3 +} ssi_wait_states; + +/*! + * This enumeration describes the word length. + */ +typedef enum { + /*! + * 2 bits long + */ + ssi_2_bits = 0x0, + /*! + * 4 bits long + */ + ssi_4_bits = 0x1, + /*! + * 6 bits long + */ + ssi_6_bits = 0x2, + /*! + * 8 bits long + */ + ssi_8_bits = 0x3, + /*! + * 10 bits long + */ + ssi_10_bits = 0x4, + /*! + * 12 bits long + */ + ssi_12_bits = 0x5, + /*! + * 14 bits long + */ + ssi_14_bits = 0x6, + /*! + * 16 bits long + */ + ssi_16_bits = 0x7, + /*! + * 18 bits long + */ + ssi_18_bits = 0x8, + /*! + * 20 bits long + */ + ssi_20_bits = 0x9, + /*! + * 22 bits long + */ + ssi_22_bits = 0xA, + /*! + * 24 bits long + */ + ssi_24_bits = 0xB, + /*! + * 26 bits long + */ + ssi_26_bits = 0xC, + /*! + * 28 bits long + */ + ssi_28_bits = 0xD, + /*! + * 30 bits long + */ + ssi_30_bits = 0xE, + /*! + * 32 bits long + */ + ssi_32_bits = 0xF +} ssi_word_length; + +#endif /* __MXC_SSI_TYPES_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ssi/registers.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ssi/registers.h @@ -0,0 +1,208 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file ../ssi/registers.h + * @brief This header file contains SSI driver low level definition to access module registers. + * + * @ingroup SSI + */ + +#ifndef __MXC_SSI_REGISTERS_H__ +#define __MXC_SSI_REGISTERS_H__ + +/*! + * This include to define bool type, false and true definitions. + */ +#include + +#define SPBA_CPU_SSI 0x07 + +#define MXC_SSISTX0 0x00 +#define MXC_SSISTX1 0x04 +#define MXC_SSISRX0 0x08 +#define MXC_SSISRX1 0x0C +#define MXC_SSISCR 0x10 +#define MXC_SSISISR 0x14 +#define MXC_SSISIER 0x18 +#define MXC_SSISTCR 0x1C +#define MXC_SSISRCR 0x20 +#define MXC_SSISTCCR 0x24 +#define MXC_SSISRCCR 0x28 +#define MXC_SSISFCSR 0x2C +#define MXC_SSISTR 0x30 +#define MXC_SSISOR 0x34 +#define MXC_SSISACNT 0x38 +#define MXC_SSISACADD 0x3C +#define MXC_SSISACDAT 0x40 +#define MXC_SSISATAG 0x44 +#define MXC_SSISTMSK 0x48 +#define MXC_SSISRMSK 0x4C + +/* MXC 91221 only */ +#define MXC_SSISACCST 0x50 +#define MXC_SSISACCEN 0x54 +#define MXC_SSISACCDIS 0x58 + +/*! SSI1 registers offset*/ +#define MXC_SSI1STX0 0x00 +#define MXC_SSI1STX1 0x04 +#define MXC_SSI1SRX0 0x08 +#define MXC_SSI1SRX1 0x0C +#define MXC_SSI1SCR 0x10 +#define MXC_SSI1SISR 0x14 +#define MXC_SSI1SIER 0x18 +#define MXC_SSI1STCR 0x1C +#define MXC_SSI1SRCR 0x20 +#define MXC_SSI1STCCR 0x24 +#define MXC_SSI1SRCCR 0x28 +#define MXC_SSI1SFCSR 0x2C +#define MXC_SSI1STR 0x30 +#define MXC_SSI1SOR 0x34 +#define MXC_SSI1SACNT 0x38 +#define MXC_SSI1SACADD 0x3C +#define MXC_SSI1SACDAT 0x40 +#define MXC_SSI1SATAG 0x44 +#define MXC_SSI1STMSK 0x48 +#define MXC_SSI1SRMSK 0x4C + +/* MXC91221 only */ + +#define MXC_SSISACCST 0x50 +#define MXC_SSISACCEN 0x54 +#define MXC_SSISACCDIS 0x58 + +/* Not on MXC91221 */ +/*! SSI2 registers offset*/ +#define MXC_SSI2STX0 0x00 +#define MXC_SSI2STX1 0x04 +#define MXC_SSI2SRX0 0x08 +#define MXC_SSI2SRX1 0x0C +#define MXC_SSI2SCR 0x10 +#define MXC_SSI2SISR 0x14 +#define MXC_SSI2SIER 0x18 +#define MXC_SSI2STCR 0x1C +#define MXC_SSI2SRCR 0x20 +#define MXC_SSI2STCCR 0x24 +#define MXC_SSI2SRCCR 0x28 +#define MXC_SSI2SFCSR 0x2C +#define MXC_SSI2STR 0x30 +#define MXC_SSI2SOR 0x34 +#define MXC_SSI2SACNT 0x38 +#define MXC_SSI2SACADD 0x3C +#define MXC_SSI2SACDAT 0x40 +#define MXC_SSI2SATAG 0x44 +#define MXC_SSI2STMSK 0x48 +#define MXC_SSI2SRMSK 0x4C + +/*! + * SCR Register bit shift definitions + */ +#define SSI_ENABLE_SHIFT 0 +#define SSI_TRANSMIT_ENABLE_SHIFT 1 +#define SSI_RECEIVE_ENABLE_SHIFT 2 +#define SSI_NETWORK_MODE_SHIFT 3 +#define SSI_SYNCHRONOUS_MODE_SHIFT 4 +#define SSI_I2S_MODE_SHIFT 5 +#define SSI_SYSTEM_CLOCK_SHIFT 7 +#define SSI_TWO_CHANNEL_SHIFT 8 +#define SSI_CLOCK_IDLE_SHIFT 9 + +/* MXC91221 only*/ +#define SSI_TX_FRAME_CLOCK_DISABLE_SHIFT 10 +#define SSI_RX_FRAME_CLOCK_DISABLE_SHIFT 11 + +/*! + * STCR & SRCR Registers bit shift definitions + */ +#define SSI_EARLY_FRAME_SYNC_SHIFT 0 +#define SSI_FRAME_SYNC_LENGTH_SHIFT 1 +#define SSI_FRAME_SYNC_INVERT_SHIFT 2 +#define SSI_CLOCK_POLARITY_SHIFT 3 +#define SSI_SHIFT_DIRECTION_SHIFT 4 +#define SSI_CLOCK_DIRECTION_SHIFT 5 +#define SSI_FRAME_DIRECTION_SHIFT 6 +#define SSI_FIFO_ENABLE_0_SHIFT 7 +#define SSI_FIFO_ENABLE_1_SHIFT 8 +#define SSI_BIT_0_SHIFT 9 + +/* MXC91221 only*/ +#define SSI_TX_FRAME_CLOCK_DISABLE_SHIFT 10 +#define SSI_RX_DATA_EXTENSION_SHIFT 10 /*SRCR only */ +/*! + * STCCR & SRCCR Registers bit shift definitions + */ +#define SSI_PRESCALER_MODULUS_SHIFT 0 +#define SSI_FRAME_RATE_DIVIDER_SHIFT 8 +#define SSI_WORD_LENGTH_SHIFT 13 +#define SSI_PRESCALER_RANGE_SHIFT 17 +#define SSI_DIVIDE_BY_TWO_SHIFT 18 +#define SSI_FRAME_DIVIDER_MASK 31 +#define SSI_MIN_FRAME_DIVIDER_RATIO 1 +#define SSI_MAX_FRAME_DIVIDER_RATIO 32 +#define SSI_PRESCALER_MODULUS_MASK 255 +#define SSI_MIN_PRESCALER_MODULUS_RATIO 1 +#define SSI_MAX_PRESCALER_MODULUS_RATIO 256 +#define SSI_WORD_LENGTH_MASK 15 + +#define SSI_IRQ_STATUS_NUMBER 25 + +/*! + * SFCSR Register bit shift definitions + */ +#define SSI_RX_FIFO_1_COUNT_SHIFT 28 +#define SSI_TX_FIFO_1_COUNT_SHIFT 24 +#define SSI_RX_FIFO_1_WATERMARK_SHIFT 20 +#define SSI_TX_FIFO_1_WATERMARK_SHIFT 16 +#define SSI_RX_FIFO_0_COUNT_SHIFT 12 +#define SSI_TX_FIFO_0_COUNT_SHIFT 8 +#define SSI_RX_FIFO_0_WATERMARK_SHIFT 4 +#define SSI_TX_FIFO_0_WATERMARK_SHIFT 0 +#define SSI_MIN_FIFO_WATERMARK 0 +#define SSI_MAX_FIFO_WATERMARK 8 + +/*! + * SSI Option Register (SOR) bit shift definitions + */ +#define SSI_FRAME_SYN_RESET_SHIFT 0 +#define SSI_WAIT_SHIFT 1 +#define SSI_INIT_SHIFT 3 +#define SSI_TRANSMITTER_CLEAR_SHIFT 4 +#define SSI_RECEIVER_CLEAR_SHIFT 5 +#define SSI_CLOCK_OFF_SHIFT 6 +#define SSI_WAIT_STATE_MASK 0x3 + +/*! + * SSI AC97 Control Register (SACNT) bit shift definitions + */ +#define AC97_MODE_ENABLE_SHIFT 0 +#define AC97_VARIABLE_OPERATION_SHIFT 1 +#define AC97_TAG_IN_FIFO_SHIFT 2 +#define AC97_READ_COMMAND_SHIFT 3 +#define AC97_WRITE_COMMAND_SHIFT 4 +#define AC97_FRAME_RATE_DIVIDER_SHIFT 5 +#define AC97_FRAME_RATE_MASK 0x3F + +/*! + * SSI Test Register (STR) bit shift definitions + */ +#define SSI_TEST_MODE_SHIFT 15 +#define SSI_RCK2TCK_SHIFT 14 +#define SSI_RFS2TFS_SHIFT 13 +#define SSI_RXSTATE_SHIFT 8 +#define SSI_TXD2RXD_SHIFT 7 +#define SSI_TCK2RCK_SHIFT 6 +#define SSI_TFS2RFS_SHIFT 5 +#define SSI_TXSTATE_SHIFT 0 + +#endif /* __MXC_SSI_REGISTERS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hmp4e/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/hmp4e/Kconfig @@ -0,0 +1,24 @@ +# +# MPEG4 Encoder kernel module configuration +# + +menu "MXC MPEG4 Encoder Kernel module support" + +config MXC_HMP4E + tristate "MPEG4 Encoder support" + depends on ARCH_MXC + depends on !ARCH_MX27 + default y + ---help--- + Say Y to get the MPEG4 Encoder kernel module available on + MXC platform. + +config MXC_HMP4E_DEBUG + bool "MXC MPEG4 Debug messages" + depends on MXC_HMP4E != n + default n + ---help--- + Say Y here if you need the Encoder driver to print debug messages. + This is an option for developers, most people should say N here. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hmp4e/mxc_hmp4e.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/hmp4e/mxc_hmp4e.c @@ -0,0 +1,812 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * Encoder device driver (kernel module) + * + * Copyright (C) 2005 Hantro Products Oy. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include /* __init,__exit directives */ +#include /* remap_page_range / remap_pfn_range */ +#include /* for struct file_operations */ +#include /* standard error codes */ +#include /* for device registeration for PM */ +#include /* for msleep_interruptible */ +#include +#include /* for dma_alloc_consistent */ +#include +#include /* for ioctl __get_user, __put_user */ +#include +#include "mxc_hmp4e.h" /* MPEG4 encoder specific */ + +/* here's all the must remember stuff */ +typedef struct { + ulong buffaddr; + u32 buffsize; + ulong iobaseaddr; + u32 iosize; + volatile u32 *hwregs; + u32 irq; + u16 hwid_offset; + u16 intr_offset; + u16 busy_offset; + u16 type; /* Encoder type, CIF = 0, VGA = 1 */ + u16 clk_gate; + u16 busy_val; + struct fasync_struct *async_queue; +#ifdef CONFIG_PM + s32 suspend_state; + wait_queue_head_t power_queue; +#endif +} hmp4e_t; + +/* and this is our MAJOR; use 0 for dynamic allocation (recommended)*/ +static s32 hmp4e_major; + +static u32 hmp4e_phys; +static struct class *hmp4e_class; +static hmp4e_t hmp4e_data; + +/*! MPEG4 enc clock handle. */ +static struct clk *hmp4e_clk; + +/* + * avoid "enable_irq(x) unbalanced from ..." + * error messages from the kernel, since {ena,dis}able_irq() + * calls are stacked in kernel. + */ +static bool irq_enable = false; + +ulong base_port = MPEG4_ENC_BASE_ADDR; +u32 irq = MXC_INT_MPEG4_ENCODER; + +module_param(base_port, long, 000); +module_param(irq, int, 000); + +/*! + * These variables store the register values when HMP4E is in suspend mode. + */ +#ifdef CONFIG_PM +u32 io_regs[64]; +#endif + +static s32 hmp4e_map_buffer(struct file *filp, struct vm_area_struct *vma); +static s32 hmp4e_map_hwregs(struct file *filp, struct vm_area_struct *vma); +static void hmp4e_reset(hmp4e_t * dev); +irqreturn_t hmp4e_isr(s32 irq, void *dev_id); + +/*! + * This funtion is called to write h/w register. + * + * @param val value to be written into the register + * @param offset register offset + * + */ +static inline void hmp4e_write(u32 val, u32 offset) +{ + hmp4e_t *dev = &hmp4e_data; + __raw_writel(val, (dev->hwregs + offset)); +} + +/*! + * This funtion is called to read h/w register. + * + * @param offset register offset + * + * @return This function returns the value read from the register. + * + */ +static inline u32 hmp4e_read(u32 offset) +{ + hmp4e_t *dev = &hmp4e_data; + u32 val; + + val = __raw_readl(dev->hwregs + offset); + + return val; +} + +/*! + * The device's mmap method. The VFS has kindly prepared the process's + * vm_area_struct for us, so we examine this to see what was requested. + * + * @param filp pointer to struct file + * @param vma pointer to struct vma_area_struct + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_mmap(struct file *filp, struct vm_area_struct *vma) +{ + s32 result; + ulong offset = vma->vm_pgoff << PAGE_SHIFT; + + pr_debug("hmp4e_mmap: size = %lu off = 0x%08lx\n", + (unsigned long)(vma->vm_end - vma->vm_start), offset); + + if (offset == 0) { + result = hmp4e_map_buffer(filp, vma); + } else if (offset == hmp4e_data.iobaseaddr) { + result = hmp4e_map_hwregs(filp, vma); + } else { + pr_debug("hmp4e: mmap invalid value\n"); + result = -EINVAL; + } + + return result; +} + +/*! + * This funtion is called to handle ioctls. + * + * @param inode pointer to struct inode + * @param filp pointer to struct file + * @param cmd ioctl command + * @param arg user data + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_ioctl(struct inode *inode, struct file *filp, + u32 cmd, ulong arg) +{ + s32 err = 0, retval = 0; + ulong offset = 0; + hmp4e_t *dev = &hmp4e_data; + write_t bwrite; + +#ifdef CONFIG_PM + wait_event_interruptible(hmp4e_data.power_queue, + hmp4e_data.suspend_state == 0); +#endif + + /* + * extract the type and number bitfields, and don't decode + * wrong cmds: return ENOTTY (inappropriate ioctl) before access_ok() + */ + if (_IOC_TYPE(cmd) != HMP4E_IOC_MAGIC) { + pr_debug("hmp4e: ioctl invalid magic\n"); + return -ENOTTY; + } + + if (_IOC_NR(cmd) > HMP4E_IOC_MAXNR) { + pr_debug("hmp4e: ioctl exceeds max ioctl\n"); + return -ENOTTY; + } + + /* + * the direction is a bitmask, and VERIFY_WRITE catches R/W + * transfers. `Type' is user-oriented, while + * access_ok is kernel-oriented, so the concept of "read" and + * "write" is reversed + */ + if (_IOC_DIR(cmd) & _IOC_READ) { + err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd)); + } else if (_IOC_DIR(cmd) & _IOC_WRITE) { + err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd)); + } + + if (err) { + pr_debug("hmp4e: ioctl invalid direction\n"); + return -EFAULT; + } + + switch (cmd) { + case HMP4E_IOCHARDRESET: + break; + + case HMP4E_IOCGBUFBUSADDRESS: + retval = __put_user((ulong) hmp4e_phys, (u32 *) arg); + break; + + case HMP4E_IOCGBUFSIZE: + retval = __put_user(hmp4e_data.buffsize, (u32 *) arg); + break; + + case HMP4E_IOCSREGWRITE: + if (dev->type != 1) { /* This ioctl only for VGA */ + pr_debug("hmp4e: HMP4E_IOCSREGWRITE invalid\n"); + retval = -EINVAL; + break; + } + + retval = __copy_from_user(&bwrite, (u32 *) arg, + sizeof(write_t)); + + if (bwrite.offset <= hmp4e_data.iosize - 4) { + hmp4e_write(bwrite.data, (bwrite.offset / 4)); + } else { + pr_debug("hmp4e: HMP4E_IOCSREGWRITE failed\n"); + retval = -EFAULT; + } + break; + + case HMP4E_IOCXREGREAD: + if (dev->type != 1) { /* This ioctl only for VGA */ + pr_debug("hmp4e: HMP4E_IOCSREGWRITE invalid\n"); + retval = -EINVAL; + break; + } + + retval = __get_user(offset, (ulong *) arg); + if (offset <= hmp4e_data.iosize - 4) { + __put_user(hmp4e_read((offset / 4)), (ulong *) arg); + } else { + pr_debug("hmp4e: HMP4E_IOCXREGREAD failed\n"); + retval = -EFAULT; + } + break; + + case HMP4E_IOCGHWOFFSET: + __put_user(hmp4e_data.iobaseaddr, (ulong *) arg); + break; + + case HMP4E_IOCGHWIOSIZE: + __put_user(hmp4e_data.iosize, (u32 *) arg); + break; + + case HMP4E_IOC_CLI: + if (irq_enable == true) { + disable_irq(hmp4e_data.irq); + irq_enable = false; + } + break; + + case HMP4E_IOC_STI: + if (irq_enable == false) { + enable_irq(hmp4e_data.irq); + irq_enable = true; + } + break; + + default: + pr_debug("unknown case %x\n", cmd); + } + + return retval; +} + +/*! + * This funtion is called when the device is opened. + * + * @param inode pointer to struct inode + * @param filp pointer to struct file + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_open(struct inode *inode, struct file *filp) +{ + hmp4e_t *dev = &hmp4e_data; + + filp->private_data = (void *)dev; + + if (request_irq(dev->irq, hmp4e_isr, 0, "mxc_hmp4e", dev) != 0) { + pr_debug("hmp4e: request irq failed\n"); + return -EBUSY; + } + + if (irq_enable == false) { + irq_enable = true; + } + clk_enable(hmp4e_clk); + return 0; +} + +static s32 hmp4e_fasync(s32 fd, struct file *filp, s32 mode) +{ + hmp4e_t *dev = (hmp4e_t *) filp->private_data; + return fasync_helper(fd, filp, mode, &dev->async_queue); +} + +/*! + * This funtion is called when the device is closed. + * + * @param inode pointer to struct inode + * @param filp pointer to struct file + * + * @return This function returns 0. + * + */ +static s32 hmp4e_release(struct inode *inode, struct file *filp) +{ + hmp4e_t *dev = (hmp4e_t *) filp->private_data; + + /* this is necessary if user process exited asynchronously */ + if (irq_enable == true) { + disable_irq(dev->irq); + irq_enable = false; + } + + /* reset hardware */ + hmp4e_reset(&hmp4e_data); + + /* free the encoder IRQ */ + free_irq(dev->irq, (void *)dev); + + /* remove this filp from the asynchronusly notified filp's */ + hmp4e_fasync(-1, filp, 0); + clk_disable(hmp4e_clk); + return 0; +} + +/* VFS methods */ +static struct file_operations hmp4e_fops = { + .owner = THIS_MODULE, + .open = hmp4e_open, + .release = hmp4e_release, + .ioctl = hmp4e_ioctl, + .mmap = hmp4e_mmap, + .fasync = hmp4e_fasync, +}; + +/*! + * This funtion allocates physical contigous memory. + * + * @param size size of memory to be allocated + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_alloc(u32 size) +{ + hmp4e_data.buffsize = PAGE_ALIGN(size); + hmp4e_data.buffaddr = + (ulong) dma_alloc_coherent(NULL, hmp4e_data.buffsize, + (dma_addr_t *) & hmp4e_phys, + GFP_DMA | GFP_KERNEL); + + if (hmp4e_data.buffaddr == 0) { + printk(KERN_ERR "hmp4e: couldn't allocate data buffer\n"); + return -ENOMEM; + } + + memset((s8 *) hmp4e_data.buffaddr, 0, hmp4e_data.buffsize); + return 0; +} + +/*! + * This funtion frees the DMAed memory. + */ +static void hmp4e_free(void) +{ + if (hmp4e_data.buffaddr != 0) { + dma_free_coherent(NULL, hmp4e_data.buffsize, + (void *)hmp4e_data.buffaddr, hmp4e_phys); + hmp4e_data.buffaddr = 0; + } +} + +/*! + * This funtion maps the shared buffer in memory. + * + * @param filp pointer to struct file + * @param vma pointer to struct vm_area_struct + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_map_buffer(struct file *filp, struct vm_area_struct *vma) +{ + ulong phys; + ulong start = (u32) vma->vm_start; + ulong size = (u32) (vma->vm_end - vma->vm_start); + + /* if userspace tries to mmap beyond end of our buffer, fail */ + if (size > hmp4e_data.buffsize) { + pr_debug("hmp4e: hmp4e_map_buffer, invalid size\n"); + return -EINVAL; + } + + vma->vm_flags |= VM_RESERVED | VM_IO; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + phys = hmp4e_phys; + + if (remap_pfn_range(vma, start, phys >> PAGE_SHIFT, size, + vma->vm_page_prot)) { + pr_debug("hmp4e: failed mmapping shared buffer\n"); + return -EAGAIN; + } + + return 0; +} + +/*! + * This funtion maps the h/w register space in memory. + * + * @param filp pointer to struct file + * @param vma pointer to struct vm_area_struct + * + * @return This function returns 0 if successful or -ve value on error. + * + */ +static s32 hmp4e_map_hwregs(struct file *filp, struct vm_area_struct *vma) +{ + ulong phys; + ulong start = (unsigned long)vma->vm_start; + ulong size = (unsigned long)(vma->vm_end - vma->vm_start); + + /* if userspace tries to mmap beyond end of our buffer, fail */ + if (size > PAGE_SIZE) { + pr_debug("hmp4e: hmp4e_map_hwregs, invalid size\n"); + return -EINVAL; + } + + vma->vm_flags |= VM_RESERVED | VM_IO; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Remember this won't work for vmalloc()d memory ! */ + phys = hmp4e_data.iobaseaddr; + + if (remap_pfn_range(vma, start, phys >> PAGE_SHIFT, hmp4e_data.iosize, + vma->vm_page_prot)) { + pr_debug("hmp4e: failed mmapping HW registers\n"); + return -EAGAIN; + } + + return 0; +} + +/*! + * This function is the interrupt service routine. + * + * @param irq the irq number + * @param dev_id driver data when ISR was regiatered + * + * @return The return value is IRQ_HANDLED. + * + */ +irqreturn_t hmp4e_isr(s32 irq, void *dev_id) +{ + hmp4e_t *dev = (hmp4e_t *) dev_id; + u32 offset = dev->intr_offset; + + u32 irq_status = hmp4e_read(offset); + + /* clear enc IRQ */ + hmp4e_write(irq_status & (~0x01), offset); + + if (dev->async_queue) + kill_fasync(&dev->async_queue, SIGIO, POLL_IN); + + return IRQ_HANDLED; +} + +/*! + * This function is called to reset the encoder. + * + * @param dev pointer to struct hmp4e_data + * + */ +static void hmp4e_reset(hmp4e_t * dev) +{ + s32 i; + + /* enable HCLK for register reset */ + hmp4e_write(dev->clk_gate, 0); + + /* Reset registers, except ECR0 (0x00) and ID (read-only) */ + for (i = 1; i < (dev->iosize / 4); i += 1) { + if (i == dev->hwid_offset) /* ID is read only */ + continue; + + /* Only for CIF, not used */ + if ((dev->type == 0) && (i == 14)) + continue; + + hmp4e_write(0, i); + } + + /* disable HCLK */ + hmp4e_write(0, 0); + return; +} + +/*! + * This function is called during the driver binding process. This function + * does the hardware initialization. + * + * @param dev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions + * + * @return The function returns 0 if successful. + */ +static s32 hmp4e_probe(struct platform_device *pdev) +{ + s32 result; + u32 hwid; + struct device *temp_class; + + hmp4e_data.iobaseaddr = base_port; + hmp4e_data.irq = irq; + hmp4e_data.buffaddr = 0; + + /* map hw i/o registers into kernel space */ + hmp4e_data.hwregs = (volatile void *)IO_ADDRESS(hmp4e_data.iobaseaddr); + + hmp4e_clk = clk_get(&pdev->dev, "mpeg4_clk"); + if (IS_ERR(hmp4e_clk)) { + printk(KERN_INFO "hmp4e: Unable to get clock\n"); + return -EIO; + } + + clk_enable(hmp4e_clk); + + /* check hw id for encoder signature */ + hwid = hmp4e_read(7); + if ((hwid & 0xffff) == 0x1882) { /* CIF first */ + hmp4e_data.type = 0; + hmp4e_data.iosize = (16 * 4); + hmp4e_data.hwid_offset = 7; + hmp4e_data.intr_offset = 5; + hmp4e_data.clk_gate = (1 << 1); + hmp4e_data.buffsize = 512000; + hmp4e_data.busy_offset = 0; + hmp4e_data.busy_val = 1; + } else { + hwid = hmp4e_read((0x88 / 4)); + if ((hwid & 0xffff0000) == 0x52510000) { /* VGA */ + hmp4e_data.type = 1; + hmp4e_data.iosize = (35 * 4); + hmp4e_data.hwid_offset = (0x88 / 4); + hmp4e_data.intr_offset = (0x10 / 4); + hmp4e_data.clk_gate = (1 << 12); + hmp4e_data.buffsize = 1048576; + hmp4e_data.busy_offset = (0x10 / 4); + hmp4e_data.busy_val = (1 << 1); + } else { + printk(KERN_INFO "hmp4e: HW ID not found\n"); + goto error1; + } + } + + /* Reset hardware */ + hmp4e_reset(&hmp4e_data); + + /* allocate memory shared with ewl */ + result = hmp4e_alloc(hmp4e_data.buffsize); + if (result < 0) + goto error1; + + result = register_chrdev(hmp4e_major, "hmp4e", &hmp4e_fops); + if (result <= 0) { + pr_debug("hmp4e: unable to get major %d\n", hmp4e_major); + goto error2; + } + + hmp4e_major = result; + + hmp4e_class = class_create(THIS_MODULE, "hmp4e"); + if (IS_ERR(hmp4e_class)) { + pr_debug("Error creating hmp4e class.\n"); + goto error3; + } + + temp_class = device_create(hmp4e_class, NULL, MKDEV(hmp4e_major, 0), NULL, + "hmp4e"); + if (IS_ERR(temp_class)) { + pr_debug("Error creating hmp4e class device.\n"); + goto error4; + } + + platform_set_drvdata(pdev, &hmp4e_data); + +#ifdef CONFIG_PM + hmp4e_data.async_queue = NULL; + hmp4e_data.suspend_state = 0; + init_waitqueue_head(&hmp4e_data.power_queue); +#endif + + printk(KERN_INFO "hmp4e: %s encoder initialized\n", + hmp4e_data.type ? "VGA" : "CIF"); + clk_disable(hmp4e_clk); + return 0; + + error4: + class_destroy(hmp4e_class); + error3: + unregister_chrdev(hmp4e_major, "hmp4e"); + error2: + hmp4e_free(); + error1: + clk_disable(hmp4e_clk); + clk_put(hmp4e_clk); + printk(KERN_INFO "hmp4e: module not inserted\n"); + return -EIO; +} + +/*! + * Dissociates the driver. + * + * @param dev the device structure + * + * @return The function always returns 0. + */ +static s32 hmp4e_remove(struct platform_device *pdev) +{ + device_destroy(hmp4e_class, MKDEV(hmp4e_major, 0)); + class_destroy(hmp4e_class); + unregister_chrdev(hmp4e_major, "hmp4e"); + hmp4e_free(); + clk_disable(hmp4e_clk); + clk_put(hmp4e_clk); + platform_set_drvdata(pdev, NULL); + return 0; +} + +#ifdef CONFIG_PM +/*! + * This is the suspend of power management for the Hantro MPEG4 module + * + * @param dev the device + * @param state the state + * + * @return This function always returns 0. + */ +static s32 hmp4e_suspend(struct platform_device *pdev, pm_message_t state) +{ + s32 i; + hmp4e_t *pdata = &hmp4e_data; + + /* + * how many times msleep_interruptible will be called before + * giving up + */ + s32 timeout = 10; + + pr_debug("hmp4e: Suspend\n"); + hmp4e_data.suspend_state = 1; + + /* check if encoder is currently running */ + while ((hmp4e_read(pdata->busy_offset) & (pdata->busy_val)) && + --timeout) { + pr_debug("hmp4e: encoder is running, going to sleep\n"); + msleep_interruptible((unsigned int)30); + } + + if (!timeout) { + pr_debug("hmp4e: timeout suspending, resetting encoder\n"); + hmp4e_write(hmp4e_read(pdata->busy_offset) & + (~pdata->busy_val), pdata->busy_offset); + } + + /* first read register 0 */ + io_regs[0] = hmp4e_read(0); + + /* then override HCLK to make sure other registers can be read */ + hmp4e_write(pdata->clk_gate, 0); + + /* read other registers */ + for (i = 1; i < (pdata->iosize / 4); i += 1) { + + /* Only for CIF, not used */ + if ((pdata->type == 0) && (i == 14)) + continue; + + io_regs[i] = hmp4e_read(i); + } + + /* restore value of register 0 */ + hmp4e_write(io_regs[0], 0); + + /* stop HCLK */ + hmp4e_write(0, 0); + clk_disable(hmp4e_clk); + return 0; +}; + +/*! + * This is the resume of power management for the Hantro MPEG4 module + * It suports RESTORE state. + * + * @param pdev the platform device + * + * @return This function always returns 0 + */ +static s32 hmp4e_resume(struct platform_device *pdev) +{ + s32 i; + u32 status; + hmp4e_t *pdata = &hmp4e_data; + + pr_debug("hmp4e: Resume\n"); + clk_enable(hmp4e_clk); + + /* override HCLK to make sure registers can be written */ + hmp4e_write(pdata->clk_gate, 0x00); + + for (i = 1; i < (pdata->iosize / 4); i += 1) { + if (i == pdata->hwid_offset) /* Read only */ + continue; + + /* Only for CIF, not used */ + if ((pdata->type == 0) && (i == 14)) + continue; + + hmp4e_write(io_regs[i], i); + } + + /* write register 0 last */ + hmp4e_write(io_regs[0], 0x00); + + /* Clear the suspend flag */ + hmp4e_data.suspend_state = 0; + + /* Unblock the wait queue */ + wake_up_interruptible(&hmp4e_data.power_queue); + + /* Continue operations */ + status = hmp4e_read(pdata->intr_offset); + if (status & 0x1) { + hmp4e_write(status & (~0x01), pdata->intr_offset); + if (hmp4e_data.async_queue) + kill_fasync(&hmp4e_data.async_queue, SIGIO, POLL_IN); + } + + return 0; +}; + +#endif + +static struct platform_driver hmp4e_driver = { + .driver = { + .name = "mxc_hmp4e", + }, + .probe = hmp4e_probe, + .remove = hmp4e_remove, +#ifdef CONFIG_PM + .suspend = hmp4e_suspend, + .resume = hmp4e_resume, +#endif +}; + +static s32 __init hmp4e_init(void) +{ + printk(KERN_INFO "hmp4e: init\n"); + platform_driver_register(&hmp4e_driver); + return 0; +} + +static void __exit hmp4e_cleanup(void) +{ + platform_driver_unregister(&hmp4e_driver); + printk(KERN_INFO "hmp4e: module removed\n"); +} + +module_init(hmp4e_init); +module_exit(hmp4e_cleanup); + +/* module description */ +MODULE_AUTHOR("Hantro Products Oy"); +MODULE_DESCRIPTION("Device driver for Hantro's hardware based MPEG4 encoder"); +MODULE_SUPPORTED_DEVICE("5251/4251 MPEG4 Encoder"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hmp4e/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/hmp4e/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the MPEG4 Encoder kernel module. + +obj-$(CONFIG_MXC_HMP4E) += mxc_hmp4e.o + +ifeq ($(CONFIG_MXC_HMP4E_DEBUG),y) +EXTRA_CFLAGS += -DDEBUG +endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hmp4e/mxc_hmp4e.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/hmp4e/mxc_hmp4e.h @@ -0,0 +1,70 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * Encoder device driver (kernel module headers) + * + * Copyright (C) 2005 Hantro Products Oy. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ +#ifndef _HMP4ENC_H_ +#define _HMP4ENC_H_ +#include /* needed for the _IOW etc stuff used later */ + +/* this is for writing data through ioctl to registers*/ +typedef struct { + unsigned long data; + unsigned long offset; +} write_t; + +/* + * Ioctl definitions + */ + +/* Use 'k' as magic number */ +#define HMP4E_IOC_MAGIC 'k' +/* + * S means "Set" through a ptr, + * T means "Tell" directly with the argument value + * G means "Get": reply by setting through a pointer + * Q means "Query": response is on the return value + * X means "eXchange": G and S atomically + * H means "sHift": T and Q atomically + */ +#define HMP4E_IOCGBUFBUSADDRESS _IOR(HMP4E_IOC_MAGIC, 1, unsigned long *) +#define HMP4E_IOCGBUFSIZE _IOR(HMP4E_IOC_MAGIC, 2, unsigned int *) +#define HMP4E_IOCGHWOFFSET _IOR(HMP4E_IOC_MAGIC, 3, unsigned long *) +#define HMP4E_IOCGHWIOSIZE _IOR(HMP4E_IOC_MAGIC, 4, unsigned int *) +#define HMP4E_IOC_CLI _IO(HMP4E_IOC_MAGIC, 5) +#define HMP4E_IOC_STI _IO(HMP4E_IOC_MAGIC, 6) +#define HMP4E_IOCHARDRESET _IO(HMP4E_IOC_MAGIC, 7) +#define HMP4E_IOCSREGWRITE _IOW(HMP4E_IOC_MAGIC, 8, write_t) +#define HMP4E_IOCXREGREAD _IOWR(HMP4E_IOC_MAGIC, 9, unsigned long) + +#define HMP4E_IOC_MAXNR 9 + +#endif /* !_HMP4ENC_H_ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hw_event/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/hw_event/Kconfig @@ -0,0 +1,11 @@ +menu "MXC HARDWARE EVENT" + +config MXC_HWEVENT + bool "MXC Hardware Event Handler" + default y + depends on ARCH_MXC + help + If you plan to use the Hardware Event Handler in the MXC, say + Y here. If unsure, select Y. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hw_event/mxc_hw_event.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/hw_event/mxc_hw_event.c @@ -0,0 +1,265 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * mxc_hw_event.c + * Collect the hardware events, send to user by netlink + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define EVENT_POOL_SIZE 10 + +struct hw_event_elem { + struct mxc_hw_event event; + struct list_head list; +}; + +static struct sock *nl_event_sock; /* netlink socket */ +static struct list_head event_head; +static struct list_head free_head; +static struct hw_event_elem events_pool[EVENT_POOL_SIZE]; /* event pool */ +static DEFINE_SPINLOCK(list_lock); +static DECLARE_WAIT_QUEUE_HEAD(event_wq); +static unsigned int seq; /* send seq */ +static int initialized; +static struct task_struct *hwevent_kthread; + +/*! + * main HW event handler thread + */ +static int hw_event_thread(void *data) +{ + struct sk_buff *skb = NULL; + struct nlmsghdr *nlh = NULL; + unsigned int size; + struct hw_event_elem *event, *n; + LIST_HEAD(tmp_head); + DEFINE_WAIT(wait); + + while (1) { + + prepare_to_wait(&event_wq, &wait, TASK_INTERRUPTIBLE); + /* wait for event coming */ + if (!freezing(current) && !kthread_should_stop() && + list_empty(&event_head)) + schedule(); + finish_wait(&event_wq, &wait); + + try_to_freeze(); + + if (kthread_should_stop()) + break; + + /* fetch event from list */ + spin_lock_irq(&list_lock); + tmp_head = event_head; + tmp_head.prev->next = &tmp_head; + tmp_head.next->prev = &tmp_head; + /* clear the event list head */ + INIT_LIST_HEAD(&event_head); + spin_unlock_irq(&list_lock); + + list_for_each_entry_safe(event, n, &tmp_head, list) { + + size = NLMSG_SPACE(sizeof(struct mxc_hw_event)); + skb = alloc_skb(size, GFP_KERNEL); + if (!skb) { + /* if failed alloc skb, we drop this event */ + printk(KERN_WARNING + "mxc_hw_event: skb_alloc() failed\n"); + goto alloc_failure; + } + + /* put the netlink header struct to skb */ + nlh = + NLMSG_PUT(skb, 0, seq++, NLMSG_DONE, + size - sizeof(*nlh)); + + /* fill the netlink data */ + memcpy((struct mxc_hw_event *)NLMSG_DATA(nlh), + &event->event, sizeof(struct mxc_hw_event)); + + /* free the event node, set to unused */ + spin_lock_irq(&list_lock); + list_move(&event->list, &free_head); + spin_unlock_irq(&list_lock); + + /* send to all process that create this socket */ + NETLINK_CB(skb).pid = 0; /* sender pid */ + NETLINK_CB(skb).dst_group = HW_EVENT_GROUP; + /* broadcast the event */ + netlink_broadcast(nl_event_sock, skb, 0, HW_EVENT_GROUP, + GFP_KERNEL); + + continue; + nlmsg_failure: + printk(KERN_WARNING + "mxc_hw_event: No tailroom for NLMSG in skb\n"); + alloc_failure: + /* free the event node, set to unused */ + spin_lock_irq(&list_lock); + list_del(&event->list); + list_add_tail(&event->list, &free_head); + spin_unlock_irq(&list_lock); + } + } + + return 0; +} + +/*! + * + * @priority the event priority, REALTIME, EMERENCY, NORMAL + * @new_event event id to be send + */ +int hw_event_send(int priority, struct mxc_hw_event *new_event) +{ + unsigned int size; + struct sk_buff *skb = NULL; + struct nlmsghdr *nlh = NULL; + struct mxc_hw_event *event; + struct hw_event_elem *event_elem; + int ret; + unsigned long flag; + struct list_head *list_node; + + if (!initialized) { + pr_info("HW Event module has not been initialized\n"); + return -1; + } + + if (priority == HWE_HIGH_PRIORITY) { + /** + * the most high priority event, + * we send it immediatly. + */ + + size = NLMSG_SPACE(sizeof(struct mxc_hw_event)); + + /* alloc skb */ + if (in_interrupt()) { + skb = alloc_skb(size, GFP_ATOMIC); + } else { + skb = alloc_skb(size, GFP_KERNEL); + } + if (!skb) { + /* if failed alloc skb, we drop this event */ + printk(KERN_WARNING + "hw_event send: skb_alloc() failed\n"); + goto send_later; + } + + /* put the netlink header struct to skb */ + nlh = NLMSG_PUT(skb, 0, seq++, NLMSG_DONE, size - sizeof(*nlh)); + + /* fill the netlink data */ + event = (struct mxc_hw_event *)NLMSG_DATA(nlh); + memcpy(event, new_event, sizeof(struct mxc_hw_event)); + + /* send to all process that create this socket */ + NETLINK_CB(skb).pid = 0; /* sender pid */ + NETLINK_CB(skb).dst_group = HW_EVENT_GROUP; + /* broadcast the event */ + ret = netlink_broadcast(nl_event_sock, skb, 0, HW_EVENT_GROUP, + in_interrupt()? GFP_ATOMIC : + GFP_KERNEL); + if (ret) { + + nlmsg_failure: + /* send failed */ + kfree_skb(skb); + goto send_later; + } + + return 0; + } + + send_later: + spin_lock_irqsave(&list_lock, flag); + if (list_empty(&free_head)) { + spin_unlock_irqrestore(&list_lock, flag); + /* no more free event node */ + printk(KERN_WARNING "mxc_event send: no more free node\n"); + return -1; + } + + /* get a free node from free list, and added to event list */ + list_node = free_head.next; + /* fill event */ + event_elem = list_entry(list_node, struct hw_event_elem, list); + event_elem->event = *new_event; + list_move(list_node, &event_head); + spin_unlock_irqrestore(&list_lock, flag); + + wake_up(&event_wq); + + return 0; +} + +static int __init mxc_hw_event_init(void) +{ + int i; + + /* initial the list head for event and free */ + INIT_LIST_HEAD(&free_head); + INIT_LIST_HEAD(&event_head); + + /* initial the free list */ + for (i = 0; i < EVENT_POOL_SIZE; i++) + list_add_tail(&events_pool[i].list, &free_head); + + /* create netlink kernel sock */ + nl_event_sock = + netlink_kernel_create(&init_net, NETLINK_USERSOCK, 0, NULL, NULL, + THIS_MODULE); + if (!nl_event_sock) { + printk(KERN_WARNING + "mxc_hw_event: Fail to create netlink socket.\n"); + return 1; + } + + hwevent_kthread = kthread_run(hw_event_thread, NULL, "hwevent"); + if (IS_ERR(hwevent_kthread)) { + printk(KERN_WARNING + "mxc_hw_event: Fail to create hwevent thread.\n"); + return 1; + } + + initialized = 1; + + return 0; +} + +static void __exit mxc_hw_event_exit(void) +{ + kthread_stop(hwevent_kthread); + /* wait for thread completion */ + sock_release(nl_event_sock->sk_socket); +} + +module_init(mxc_hw_event_init); +module_exit(mxc_hw_event_exit); + +EXPORT_SYMBOL(hw_event_send); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/hw_event/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/hw_event/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_MXC_HWEVENT) += mxc_hw_event.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/adc/imx_adc_reg.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/adc/imx_adc_reg.h @@ -0,0 +1,242 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef __IMX_ADC_H__ +#define __IMX_ADC_H__ + +/* TSC General Config Register */ +#define TGCR 0x000 +#define TGCR_IPG_CLK_EN (1 << 0) +#define TGCR_TSC_RST (1 << 1) +#define TGCR_FUNC_RST (1 << 2) +#define TGCR_SLPC (1 << 4) +#define TGCR_STLC (1 << 5) +#define TGCR_HSYNC_EN (1 << 6) +#define TGCR_HSYNC_POL (1 << 7) +#define TGCR_POWERMODE_SHIFT 8 +#define TGCR_POWER_OFF (0x0 << TGCR_POWERMODE_SHIFT) +#define TGCR_POWER_SAVE (0x1 << TGCR_POWERMODE_SHIFT) +#define TGCR_POWER_ON (0x3 << TGCR_POWERMODE_SHIFT) +#define TGCR_POWER_MASK (0x3 << TGCR_POWERMODE_SHIFT) +#define TGCR_INTREFEN (1 << 10) +#define TGCR_ADCCLKCFG_SHIFT 16 +#define TGCR_PD_EN (1 << 23) +#define TGCR_PDB_EN (1 << 24) +#define TGCR_PDBTIME_SHIFT 25 +#define TGCR_PDBTIME128 (0x3f << TGCR_PDBTIME_SHIFT) +#define TGCR_PDBTIME_MASK (0x7f << TGCR_PDBTIME_SHIFT) + +/* TSC General Status Register */ +#define TGSR 0x004 +#define TCQ_INT (1 << 0) +#define GCQ_INT (1 << 1) +#define SLP_INT (1 << 2) +#define TCQ_DMA (1 << 16) +#define GCQ_DMA (1 << 17) + +/* TSC IDLE Config Register */ +#define TICR 0x008 + +/* TouchScreen Convert Queue FIFO Register */ +#define TCQFIFO 0x400 +/* TouchScreen Convert Queue Control Register */ +#define TCQCR 0x404 +#define CQCR_QSM_SHIFT 0 +#define CQCR_QSM_STOP (0x0 << CQCR_QSM_SHIFT) +#define CQCR_QSM_PEN (0x1 << CQCR_QSM_SHIFT) +#define CQCR_QSM_FQS (0x2 << CQCR_QSM_SHIFT) +#define CQCR_QSM_FQS_PEN (0x3 << CQCR_QSM_SHIFT) +#define CQCR_QSM_MASK (0x3 << CQCR_QSM_SHIFT) +#define CQCR_FQS (1 << 2) +#define CQCR_RPT (1 << 3) +#define CQCR_LAST_ITEM_ID_SHIFT 4 +#define CQCR_LAST_ITEM_ID_MASK (0xf << CQCR_LAST_ITEM_ID_SHIFT) +#define CQCR_FIFOWATERMARK_SHIFT 8 +#define CQCR_FIFOWATERMARK_MASK (0xf << CQCR_FIFOWATERMARK_SHIFT) +#define CQCR_REPEATWAIT_SHIFT 12 +#define CQCR_REPEATWAIT_MASK (0xf << CQCR_REPEATWAIT_SHIFT) +#define CQCR_QRST (1 << 16) +#define CQCR_FRST (1 << 17) +#define CQCR_PD_MSK (1 << 18) +#define CQCR_PD_CFG (1 << 19) + +/* TouchScreen Convert Queue Status Register */ +#define TCQSR 0x408 +#define CQSR_PD (1 << 0) +#define CQSR_EOQ (1 << 1) +#define CQSR_FOR (1 << 4) +#define CQSR_FUR (1 << 5) +#define CQSR_FER (1 << 6) +#define CQSR_EMPT (1 << 13) +#define CQSR_FULL (1 << 14) +#define CQSR_FDRY (1 << 15) + +/* TouchScreen Convert Queue Mask Register */ +#define TCQMR 0x40c +#define TCQMR_PD_IRQ_MSK (1 << 0) +#define TCQMR_EOQ_IRQ_MSK (1 << 1) +#define TCQMR_FOR_IRQ_MSK (1 << 4) +#define TCQMR_FUR_IRQ_MSK (1 << 5) +#define TCQMR_FER_IRQ_MSK (1 << 6) +#define TCQMR_PD_DMA_MSK (1 << 16) +#define TCQMR_EOQ_DMA_MSK (1 << 17) +#define TCQMR_FOR_DMA_MSK (1 << 20) +#define TCQMR_FUR_DMA_MSK (1 << 21) +#define TCQMR_FER_DMA_MSK (1 << 22) +#define TCQMR_FDRY_DMA_MSK (1 << 31) + +/* TouchScreen Convert Queue ITEM 7~0 */ +#define TCQ_ITEM_7_0 0x420 + +/* TouchScreen Convert Queue ITEM 15~8 */ +#define TCQ_ITEM_15_8 0x424 + +#define TCQ_ITEM7_SHIFT 28 +#define TCQ_ITEM6_SHIFT 24 +#define TCQ_ITEM5_SHIFT 20 +#define TCQ_ITEM4_SHIFT 16 +#define TCQ_ITEM3_SHIFT 12 +#define TCQ_ITEM2_SHIFT 8 +#define TCQ_ITEM1_SHIFT 4 +#define TCQ_ITEM0_SHIFT 0 + +#define TCQ_ITEM_TCC0 0x0 +#define TCQ_ITEM_TCC1 0x1 +#define TCQ_ITEM_TCC2 0x2 +#define TCQ_ITEM_TCC3 0x3 +#define TCQ_ITEM_TCC4 0x4 +#define TCQ_ITEM_TCC5 0x5 +#define TCQ_ITEM_TCC6 0x6 +#define TCQ_ITEM_TCC7 0x7 +#define TCQ_ITEM_GCC7 0x8 +#define TCQ_ITEM_GCC6 0x9 +#define TCQ_ITEM_GCC5 0xa +#define TCQ_ITEM_GCC4 0xb +#define TCQ_ITEM_GCC3 0xc +#define TCQ_ITEM_GCC2 0xd +#define TCQ_ITEM_GCC1 0xe +#define TCQ_ITEM_GCC0 0xf + +/* TouchScreen Convert Config 0-7 */ +#define TCC0 0x440 +#define TCC1 0x444 +#define TCC2 0x448 +#define TCC3 0x44c +#define TCC4 0x450 +#define TCC5 0x454 +#define TCC6 0x458 +#define TCC7 0x45c +#define CC_PEN_IACK (1 << 1) +#define CC_SEL_REFN_SHIFT 2 +#define CC_SEL_REFN_YNLR (0x1 << CC_SEL_REFN_SHIFT) +#define CC_SEL_REFN_AGND (0x2 << CC_SEL_REFN_SHIFT) +#define CC_SEL_REFN_MASK (0x3 << CC_SEL_REFN_SHIFT) +#define CC_SELIN_SHIFT 4 +#define CC_SELIN_XPUL (0x0 << CC_SELIN_SHIFT) +#define CC_SELIN_YPLL (0x1 << CC_SELIN_SHIFT) +#define CC_SELIN_XNUR (0x2 << CC_SELIN_SHIFT) +#define CC_SELIN_YNLR (0x3 << CC_SELIN_SHIFT) +#define CC_SELIN_WIPER (0x4 << CC_SELIN_SHIFT) +#define CC_SELIN_INAUX0 (0x5 << CC_SELIN_SHIFT) +#define CC_SELIN_INAUX1 (0x6 << CC_SELIN_SHIFT) +#define CC_SELIN_INAUX2 (0x7 << CC_SELIN_SHIFT) +#define CC_SELIN_MASK (0x7 << CC_SELIN_SHIFT) +#define CC_SELREFP_SHIFT 7 +#define CC_SELREFP_YPLL (0x0 << CC_SELREFP_SHIFT) +#define CC_SELREFP_XPUL (0x1 << CC_SELREFP_SHIFT) +#define CC_SELREFP_EXT (0x2 << CC_SELREFP_SHIFT) +#define CC_SELREFP_INT (0x3 << CC_SELREFP_SHIFT) +#define CC_SELREFP_MASK (0x3 << CC_SELREFP_SHIFT) +#define CC_XPULSW (1 << 9) +#define CC_XNURSW_SHIFT 10 +#define CC_XNURSW_HIGH (0x0 << CC_XNURSW_SHIFT) +#define CC_XNURSW_OFF (0x1 << CC_XNURSW_SHIFT) +#define CC_XNURSW_LOW (0x3 << CC_XNURSW_SHIFT) +#define CC_XNURSW_MASK (0x3 << CC_XNURSW_SHIFT) +#define CC_YPLLSW_SHIFT 12 +#define CC_YPLLSW_MASK (0x3 << CC_YPLLSW_SHIFT) +#define CC_YNLRSW (1 << 14) +#define CC_WIPERSW (1 << 15) +#define CC_NOS_SHIFT 16 +#define CC_YPLLSW_HIGH (0x0 << CC_NOS_SHIFT) +#define CC_YPLLSW_OFF (0x1 << CC_NOS_SHIFT) +#define CC_YPLLSW_LOW (0x3 << CC_NOS_SHIFT +#define CC_NOS_MASK (0xf << CC_NOS_SHIFT) +#define CC_IGS (1 << 20) +#define CC_SETTLING_TIME_SHIFT 24 +#define CC_SETTLING_TIME_MASK (0xff << CC_SETTLING_TIME_SHIFT) + +#define TSC_4WIRE_PRECHARGE 0x158c +#define TSC_4WIRE_TOUCH_DETECT 0x578e + +#define TSC_4WIRE_X_MEASUMENT 0x1c90 +#define TSC_4WIRE_Y_MEASUMENT 0x4604 + +#define TSC_GENERAL_ADC_GCC0 0x17dc +#define TSC_GENERAL_ADC_GCC1 0x17ec +#define TSC_GENERAL_ADC_GCC2 0x17fc + +/* GeneralADC Convert Queue FIFO Register */ +#define GCQFIFO 0x800 +#define GCQFIFO_ADCOUT_SHIFT 4 +#define GCQFIFO_ADCOUT_MASK (0xfff << GCQFIFO_ADCOUT_SHIFT) +/* GeneralADC Convert Queue Control Register */ +#define GCQCR 0x804 +/* GeneralADC Convert Queue Status Register */ +#define GCQSR 0x808 +/* GeneralADC Convert Queue Mask Register */ +#define GCQMR 0x80c + +/* GeneralADC Convert Queue ITEM 7~0 */ +#define GCQ_ITEM_7_0 0x820 +/* GeneralADC Convert Queue ITEM 15~8 */ +#define GCQ_ITEM_15_8 0x824 + +#define GCQ_ITEM7_SHIFT 28 +#define GCQ_ITEM6_SHIFT 24 +#define GCQ_ITEM5_SHIFT 20 +#define GCQ_ITEM4_SHIFT 16 +#define GCQ_ITEM3_SHIFT 12 +#define GCQ_ITEM2_SHIFT 8 +#define GCQ_ITEM1_SHIFT 4 +#define GCQ_ITEM0_SHIFT 0 + +#define GCQ_ITEM_GCC0 0x0 +#define GCQ_ITEM_GCC1 0x1 +#define GCQ_ITEM_GCC2 0x2 +#define GCQ_ITEM_GCC3 0x3 + +/* GeneralADC Convert Config 0-7 */ +#define GCC0 0x840 +#define GCC1 0x844 +#define GCC2 0x848 +#define GCC3 0x84c +#define GCC4 0x850 +#define GCC5 0x854 +#define GCC6 0x858 +#define GCC7 0x85c + +/* TSC Test Register R/W */ +#define TTR 0xc00 +/* TSC Monitor Register 1, 2 */ +#define MNT1 0xc04 +#define MNT2 0xc04 + +#define DETECT_ITEM_ID_1 1 +#define DETECT_ITEM_ID_2 5 +#define TS_X_ITEM_ID 2 +#define TS_Y_ITEM_ID 3 +#define TSI_DATA 1 +#define FQS_DATA 0 + +#endif /* __IMX_ADC_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/adc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/adc/Kconfig @@ -0,0 +1,14 @@ +# +# i.MX ADC devices +# + +menu "i.MX ADC support" + +config IMX_ADC + tristate "i.MX ADC" + depends on ARCH_MXC + default n + help + This selects the Freescale i.MX on-chip ADC driver. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/adc/imx_adc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/adc/imx_adc.c @@ -0,0 +1,1116 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file adc/imx_adc.c + * @brief This is the main file of i.MX ADC driver. + * + * @ingroup IMX_ADC + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "imx_adc_reg.h" + +static int imx_adc_major; + +/*! + * Number of users waiting in suspendq + */ +static int swait; + +/*! + * To indicate whether any of the adc devices are suspending + */ +static int suspend_flag; + +/*! + * The suspendq is used by blocking application calls + */ +static wait_queue_head_t suspendq; +static wait_queue_head_t tsq; + +static bool imx_adc_ready; +static bool ts_data_ready; +static int tsi_data = TSI_DATA; +static unsigned short ts_data_buf[16]; + +static struct class *imx_adc_class; +static struct imx_adc_data *adc_data; + +static DECLARE_MUTEX(general_convert_mutex); +static DECLARE_MUTEX(ts_convert_mutex); + +unsigned long tsc_base; + +int is_imx_adc_ready(void) +{ + return imx_adc_ready; +} +EXPORT_SYMBOL(is_imx_adc_ready); + +void tsc_clk_enable(void) +{ + unsigned long reg; + + clk_enable(adc_data->adc_clk); + + reg = __raw_readl(tsc_base + TGCR); + reg |= TGCR_IPG_CLK_EN; + __raw_writel(reg, tsc_base + TGCR); +} + +void tsc_clk_disable(void) +{ + unsigned long reg; + + clk_disable(adc_data->adc_clk); + + reg = __raw_readl(tsc_base + TGCR); + reg &= ~TGCR_IPG_CLK_EN; + __raw_writel(reg, tsc_base + TGCR); +} + +void tsc_self_reset(void) +{ + unsigned long reg; + + reg = __raw_readl(tsc_base + TGCR); + reg |= TGCR_TSC_RST; + __raw_writel(reg, tsc_base + TGCR); + + while (__raw_readl(tsc_base + TGCR) & TGCR_TSC_RST) + continue; +} + +/* Internal reference */ +void tsc_intref_enable(void) +{ + unsigned long reg; + + reg = __raw_readl(tsc_base + TGCR); + reg |= TGCR_INTREFEN; + __raw_writel(reg, tsc_base + TGCR); +} + +/* initialize touchscreen */ +void imx_tsc_init(void) +{ + unsigned long reg; + int lastitemid; + int dbtime; + + /* Level sense */ + reg = __raw_readl(tsc_base + TCQCR); + reg |= CQCR_PD_CFG; + reg |= (0xf << CQCR_FIFOWATERMARK_SHIFT); /* watermark */ + __raw_writel(reg, tsc_base + TCQCR); + + /* Configure 4-wire */ + reg = TSC_4WIRE_PRECHARGE; + reg |= CC_IGS; + __raw_writel(reg, tsc_base + TCC0); + + reg = TSC_4WIRE_TOUCH_DETECT; + reg |= 3 << CC_NOS_SHIFT; /* 4 samples */ + reg |= 32 << CC_SETTLING_TIME_SHIFT; /* it's important! */ + __raw_writel(reg, tsc_base + TCC1); + + reg = TSC_4WIRE_X_MEASUMENT; + reg |= 3 << CC_NOS_SHIFT; /* 4 samples */ + reg |= 16 << CC_SETTLING_TIME_SHIFT; /* settling time */ + __raw_writel(reg, tsc_base + TCC2); + + reg = TSC_4WIRE_Y_MEASUMENT; + reg |= 3 << CC_NOS_SHIFT; /* 4 samples */ + reg |= 16 << CC_SETTLING_TIME_SHIFT; /* settling time */ + __raw_writel(reg, tsc_base + TCC3); + + reg = (TCQ_ITEM_TCC0 << TCQ_ITEM7_SHIFT) | + (TCQ_ITEM_TCC0 << TCQ_ITEM6_SHIFT) | + (TCQ_ITEM_TCC1 << TCQ_ITEM5_SHIFT) | + (TCQ_ITEM_TCC0 << TCQ_ITEM4_SHIFT) | + (TCQ_ITEM_TCC3 << TCQ_ITEM3_SHIFT) | + (TCQ_ITEM_TCC2 << TCQ_ITEM2_SHIFT) | + (TCQ_ITEM_TCC1 << TCQ_ITEM1_SHIFT) | + (TCQ_ITEM_TCC0 << TCQ_ITEM0_SHIFT); + __raw_writel(reg, tsc_base + TCQ_ITEM_7_0); + + lastitemid = 5; + reg = __raw_readl(tsc_base + TCQCR); + reg = (reg & ~CQCR_LAST_ITEM_ID_MASK) | + (lastitemid << CQCR_LAST_ITEM_ID_SHIFT); + __raw_writel(reg, tsc_base + TCQCR); + + /* Config idle for 4-wire */ + reg = TSC_4WIRE_PRECHARGE; + __raw_writel(reg, tsc_base + TICR); + + reg = TSC_4WIRE_TOUCH_DETECT; + __raw_writel(reg, tsc_base + TICR); + + /* pen down enable */ + reg = __raw_readl(tsc_base + TGCR); + reg |= TGCR_PD_EN | TGCR_PDB_EN; + __raw_writel(reg, tsc_base + TGCR); + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_PD_MSK; + __raw_writel(reg, tsc_base + TCQCR); + reg = __raw_readl(tsc_base + TCQMR); + reg &= ~TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + + /* Debounce time = dbtime*8 adc clock cycles */ + reg = __raw_readl(tsc_base + TGCR); + dbtime = TGCR_PDBTIME128; + reg &= ~TGCR_PDBTIME_MASK; + reg |= dbtime << TGCR_PDBTIME_SHIFT; + reg |= TGCR_HSYNC_EN; + __raw_writel(reg, tsc_base + TGCR); + +} + +static irqreturn_t imx_adc_interrupt(int irq, void *dev_id) +{ + unsigned long reg; + + if (__raw_readl(tsc_base + TGSR) & 0x4) { + /* deep sleep wakeup interrupt */ + /* clear tgsr */ + __raw_writel(0, tsc_base + TGSR); + /* clear deep sleep wakeup irq */ + reg = __raw_readl(tsc_base + TGCR); + reg &= ~TGCR_SLPC; + __raw_writel(reg, tsc_base + TGCR); + /* un-mask pen down and pen down irq */ + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_PD_MSK; + __raw_writel(reg, tsc_base + TCQCR); + reg = __raw_readl(tsc_base + TCQMR); + reg &= ~TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + } else { + /* mask pen down detect irq */ + reg = __raw_readl(tsc_base + TCQMR); + reg |= TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + + ts_data_ready = 1; + wake_up_interruptible(&tsq); + } + return IRQ_HANDLED; +} + +enum IMX_ADC_STATUS imx_adc_read_general(unsigned short *result) +{ + unsigned long reg; + unsigned int data_num = 0; + + reg = __raw_readl(tsc_base + GCQCR); + reg |= CQCR_FQS; + __raw_writel(reg, tsc_base + GCQCR); + + while (!(__raw_readl(tsc_base + GCQSR) & CQSR_EOQ)) + continue; + reg = __raw_readl(tsc_base + GCQCR); + reg &= ~CQCR_FQS; + __raw_writel(reg, tsc_base + GCQCR); + reg = __raw_readl(tsc_base + GCQSR); + reg |= CQSR_EOQ; + __raw_writel(reg, tsc_base + GCQSR); + + while (!(__raw_readl(tsc_base + GCQSR) & CQSR_EMPT)) { + result[data_num] = __raw_readl(tsc_base + GCQFIFO) >> + GCQFIFO_ADCOUT_SHIFT; + data_num++; + } + return IMX_ADC_SUCCESS; +} + +/*! + * This function will get raw (X,Y) value by converting the voltage + * @param touch_sample Pointer to touch sample + * + * return This funciton returns 0 if successful. + * + * + */ +enum IMX_ADC_STATUS imx_adc_read_ts(struct t_touch_screen *touch_sample, + int wait_tsi) +{ + int reg; + int data_num = 0; + int detect_sample1, detect_sample2; + + memset(ts_data_buf, 0, sizeof ts_data_buf); + touch_sample->valid_flag = 1; + + if (wait_tsi) { + /* Config idle for 4-wire */ + reg = TSC_4WIRE_TOUCH_DETECT; + __raw_writel(reg, tsc_base + TICR); + + /* Pen interrupt starts new conversion queue */ + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + reg |= CQCR_QSM_PEN; + __raw_writel(reg, tsc_base + TCQCR); + + /* unmask pen down detect irq */ + reg = __raw_readl(tsc_base + TCQMR); + reg &= ~TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + + wait_event_interruptible(tsq, ts_data_ready); + while (!(__raw_readl(tsc_base + TCQSR) & CQSR_EOQ)) + continue; + /* stop the conversion */ + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + __raw_writel(reg, tsc_base + TCQCR); + reg = CQSR_PD | CQSR_EOQ; + __raw_writel(reg, tsc_base + TCQSR); + + /* change configuration for FQS mode */ + tsi_data = TSI_DATA; + reg = (0x1 << CC_YPLLSW_SHIFT) | (0x1 << CC_XNURSW_SHIFT) | + CC_XPULSW; + __raw_writel(reg, tsc_base + TICR); + } else { + /* FQS semaphore */ + down(&ts_convert_mutex); + + reg = (0x1 << CC_YPLLSW_SHIFT) | (0x1 << CC_XNURSW_SHIFT) | + CC_XPULSW; + __raw_writel(reg, tsc_base + TICR); + + /* FQS */ + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + reg |= CQCR_QSM_FQS; + __raw_writel(reg, tsc_base + TCQCR); + reg = __raw_readl(tsc_base + TCQCR); + reg |= CQCR_FQS; + __raw_writel(reg, tsc_base + TCQCR); + while (!(__raw_readl(tsc_base + TCQSR) & CQSR_EOQ)) + continue; + + /* stop FQS */ + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + __raw_writel(reg, tsc_base + TCQCR); + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_FQS; + __raw_writel(reg, tsc_base + TCQCR); + + /* clear status bit */ + reg = __raw_readl(tsc_base + TCQSR); + reg |= CQSR_EOQ; + __raw_writel(reg, tsc_base + TCQSR); + tsi_data = FQS_DATA; + + /* Config idle for 4-wire */ + reg = TSC_4WIRE_PRECHARGE; + __raw_writel(reg, tsc_base + TICR); + + reg = TSC_4WIRE_TOUCH_DETECT; + __raw_writel(reg, tsc_base + TICR); + + } + + while (!(__raw_readl(tsc_base + TCQSR) & CQSR_EMPT)) { + reg = __raw_readl(tsc_base + TCQFIFO); + ts_data_buf[data_num] = reg; + data_num++; + } + + touch_sample->x_position1 = ts_data_buf[4] >> 4; + touch_sample->x_position2 = ts_data_buf[5] >> 4; + touch_sample->x_position3 = ts_data_buf[6] >> 4; + touch_sample->y_position1 = ts_data_buf[9] >> 4; + touch_sample->y_position2 = ts_data_buf[10] >> 4; + touch_sample->y_position3 = ts_data_buf[11] >> 4; + + detect_sample1 = ts_data_buf[0]; + detect_sample2 = ts_data_buf[12]; + + if ((detect_sample1 > 0x6000) || (detect_sample2 > 0x6000)) + touch_sample->valid_flag = 0; + + ts_data_ready = 0; + + if (!(touch_sample->x_position1 || + touch_sample->x_position2 || touch_sample->x_position3)) + touch_sample->contact_resistance = 0; + else + touch_sample->contact_resistance = 1; + + if (tsi_data == FQS_DATA) + up(&ts_convert_mutex); + return IMX_ADC_SUCCESS; +} + +/*! + * This function performs filtering and rejection of excessive noise prone + * sampl. + * + * @param ts_curr Touch screen value + * + * @return This function returns 0 on success, -1 otherwise. + */ +static int imx_adc_filter(struct t_touch_screen *ts_curr) +{ + + unsigned int ydiff1, ydiff2, ydiff3, xdiff1, xdiff2, xdiff3; + unsigned int sample_sumx, sample_sumy; + static unsigned int prev_x[FILTLEN], prev_y[FILTLEN]; + int index = 0; + unsigned int y_curr, x_curr; + static int filt_count; + /* Added a variable filt_type to decide filtering at run-time */ + unsigned int filt_type = 0; + + /* ignore the data converted when pen down and up */ + if ((ts_curr->contact_resistance == 0) || tsi_data == TSI_DATA) { + ts_curr->x_position = 0; + ts_curr->y_position = 0; + filt_count = 0; + return 0; + } + /* ignore the data valid */ + if (ts_curr->valid_flag == 0) + return -1; + + ydiff1 = abs(ts_curr->y_position1 - ts_curr->y_position2); + ydiff2 = abs(ts_curr->y_position2 - ts_curr->y_position3); + ydiff3 = abs(ts_curr->y_position1 - ts_curr->y_position3); + if ((ydiff1 > DELTA_Y_MAX) || + (ydiff2 > DELTA_Y_MAX) || (ydiff3 > DELTA_Y_MAX)) { + pr_debug("imx_adc_filter: Ret pos 1\n"); + return -1; + } + + xdiff1 = abs(ts_curr->x_position1 - ts_curr->x_position2); + xdiff2 = abs(ts_curr->x_position2 - ts_curr->x_position3); + xdiff3 = abs(ts_curr->x_position1 - ts_curr->x_position3); + + if ((xdiff1 > DELTA_X_MAX) || + (xdiff2 > DELTA_X_MAX) || (xdiff3 > DELTA_X_MAX)) { + pr_debug("imx_adc_filter: Ret pos 2\n"); + return -1; + } + /* Compute two closer values among the three available Y readouts */ + + if (ydiff1 < ydiff2) { + if (ydiff1 < ydiff3) { + /* Sample 0 & 1 closest together */ + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position2; + } else { + /* Sample 0 & 2 closest together */ + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position3; + } + } else { + if (ydiff2 < ydiff3) { + /* Sample 1 & 2 closest together */ + sample_sumy = ts_curr->y_position2 + + ts_curr->y_position3; + } else { + /* Sample 0 & 2 closest together */ + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position3; + } + } + + /* + * Compute two closer values among the three available X + * readouts + */ + if (xdiff1 < xdiff2) { + if (xdiff1 < xdiff3) { + /* Sample 0 & 1 closest together */ + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position2; + } else { + /* Sample 0 & 2 closest together */ + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position3; + } + } else { + if (xdiff2 < xdiff3) { + /* Sample 1 & 2 closest together */ + sample_sumx = ts_curr->x_position2 + + ts_curr->x_position3; + } else { + /* Sample 0 & 2 closest together */ + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position3; + } + } + + /* + * Wait FILTER_MIN_DELAY number of samples to restart + * filtering + */ + if (filt_count < FILTER_MIN_DELAY) { + /* + * Current output is the average of the two closer + * values and no filtering is used + */ + y_curr = (sample_sumy / 2); + x_curr = (sample_sumx / 2); + ts_curr->y_position = y_curr; + ts_curr->x_position = x_curr; + filt_count++; + + } else { + if (abs(sample_sumx - (prev_x[0] + prev_x[1])) > + (DELTA_X_MAX * 16)) { + pr_debug("imx_adc_filter: : Ret pos 3\n"); + return -1; + } + if (abs(sample_sumy - (prev_y[0] + prev_y[1])) > + (DELTA_Y_MAX * 16)) { + pr_debug("imx_adc_filter: : Ret pos 4\n"); + return -1; + } + sample_sumy /= 2; + sample_sumx /= 2; + /* Use hard filtering if the sample difference < 10 */ + if ((abs(sample_sumy - prev_y[0]) > 10) || + (abs(sample_sumx - prev_x[0]) > 10)) + filt_type = 1; + + /* + * Current outputs are the average of three previous + * values and the present readout + */ + y_curr = sample_sumy; + for (index = 0; index < FILTLEN; index++) { + if (filt_type == 0) + y_curr = y_curr + (prev_y[index]); + else + y_curr = y_curr + (prev_y[index] / 3); + } + if (filt_type == 0) + y_curr = y_curr >> 2; + else + y_curr = y_curr >> 1; + ts_curr->y_position = y_curr; + + x_curr = sample_sumx; + for (index = 0; index < FILTLEN; index++) { + if (filt_type == 0) + x_curr = x_curr + (prev_x[index]); + else + x_curr = x_curr + (prev_x[index] / 3); + } + if (filt_type == 0) + x_curr = x_curr >> 2; + else + x_curr = x_curr >> 1; + ts_curr->x_position = x_curr; + + } + + /* Update previous X and Y values */ + for (index = (FILTLEN - 1); index > 0; index--) { + prev_x[index] = prev_x[index - 1]; + prev_y[index] = prev_y[index - 1]; + } + + /* + * Current output will be the most recent past for the + * next sample + */ + prev_y[0] = y_curr; + prev_x[0] = x_curr; + + return 0; + +} + +/*! + * This function retrieves the current touch screen (X,Y) coordinates. + * + * @param touch_sample Pointer to touch sample. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_get_touch_sample(struct t_touch_screen + *touch_sample, int wait_tsi) +{ + if (imx_adc_read_ts(touch_sample, wait_tsi)) + return IMX_ADC_ERROR; + if (!imx_adc_filter(touch_sample)) + return IMX_ADC_SUCCESS; + else + return IMX_ADC_ERROR; +} +EXPORT_SYMBOL(imx_adc_get_touch_sample); + +/*! + * This is the suspend of power management for the i.MX ADC API. + * It supports SAVE and POWER_DOWN state. + * + * @param pdev the device + * @param state the state + * + * @return This function returns 0 if successful. + */ +static int imx_adc_suspend(struct platform_device *pdev, pm_message_t state) +{ + unsigned long reg; + + /* Config idle for 4-wire */ + reg = TSC_4WIRE_PRECHARGE; + __raw_writel(reg, tsc_base + TICR); + + reg = TSC_4WIRE_TOUCH_DETECT; + __raw_writel(reg, tsc_base + TICR); + + /* enable deep sleep wake up */ + reg = __raw_readl(tsc_base + TGCR); + reg |= TGCR_SLPC; + __raw_writel(reg, tsc_base + TGCR); + + /* mask pen down and pen down irq */ + reg = __raw_readl(tsc_base + TCQCR); + reg |= CQCR_PD_MSK; + __raw_writel(reg, tsc_base + TCQCR); + reg = __raw_readl(tsc_base + TCQMR); + reg |= TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + + /* Set power mode to off */ + reg = __raw_readl(tsc_base + TGCR) & ~TGCR_POWER_MASK; + reg |= TGCR_POWER_OFF; + __raw_writel(reg, tsc_base + TGCR); + + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(adc_data->irq); + } else { + suspend_flag = 1; + tsc_clk_disable(); + } + return 0; +}; + +/*! + * This is the resume of power management for the i.MX adc API. + * It supports RESTORE state. + * + * @param pdev the device + * + * @return This function returns 0 if successful. + */ +static int imx_adc_resume(struct platform_device *pdev) +{ + unsigned long reg; + + if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(adc_data->irq); + } else { + suspend_flag = 0; + tsc_clk_enable(); + while (swait > 0) { + swait--; + wake_up_interruptible(&suspendq); + } + } + + /* recover power mode */ + reg = __raw_readl(tsc_base + TGCR) & ~TGCR_POWER_MASK; + reg |= TGCR_POWER_SAVE; + __raw_writel(reg, tsc_base + TGCR); + + return 0; +} + +/*! + * This function implements the open method on an i.MX ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int imx_adc_open(struct inode *inode, struct file *file) +{ + while (suspend_flag) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, !suspend_flag)) + return -ERESTARTSYS; + } + pr_debug("imx_adc : imx_adc_open()\n"); + return 0; +} + +/*! + * This function implements the release method on an i.MX ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int imx_adc_free(struct inode *inode, struct file *file) +{ + pr_debug("imx_adc : imx_adc_free()\n"); + return 0; +} + +/*! + * This function initializes all ADC registers with default values. This + * function also registers the interrupt events. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +int imx_adc_init(void) +{ + int reg; + + pr_debug("imx_adc_init()\n"); + + if (suspend_flag) + return -EBUSY; + + tsc_clk_enable(); + + /* Reset */ + tsc_self_reset(); + + /* Internal reference */ + tsc_intref_enable(); + + /* Set power mode */ + reg = __raw_readl(tsc_base + TGCR) & ~TGCR_POWER_MASK; + reg |= TGCR_POWER_SAVE; + __raw_writel(reg, tsc_base + TGCR); + + imx_tsc_init(); + + return IMX_ADC_SUCCESS; +} +EXPORT_SYMBOL(imx_adc_init); + +/*! + * This function disables the ADC, de-registers the interrupt events. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_deinit(void) +{ + pr_debug("imx_adc_deinit()\n"); + + return IMX_ADC_SUCCESS; +} +EXPORT_SYMBOL(imx_adc_deinit); + +/*! + * This function triggers a conversion and returns one sampling result of one + * channel. + * + * @param channel The channel to be sampled + * @param result The pointer to the conversion result. The memory + * should be allocated by the caller of this function. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_convert(enum t_channel channel, + unsigned short *result) +{ + int reg; + int lastitemid; + struct t_touch_screen touch_sample; + + switch (channel) { + + case TS_X_POS: + imx_adc_get_touch_sample(&touch_sample, 0); + result[0] = touch_sample.x_position; + + /* if no pen down ,recover the register configuration */ + if (touch_sample.contact_resistance == 0) { + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + reg |= CQCR_QSM_PEN; + __raw_writel(reg, tsc_base + TCQCR); + + reg = __raw_readl(tsc_base + TCQMR); + reg &= ~TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + } + break; + + case TS_Y_POS: + imx_adc_get_touch_sample(&touch_sample, 0); + result[1] = touch_sample.y_position; + + /* if no pen down ,recover the register configuration */ + if (touch_sample.contact_resistance == 0) { + reg = __raw_readl(tsc_base + TCQCR); + reg &= ~CQCR_QSM_MASK; + reg |= CQCR_QSM_PEN; + __raw_writel(reg, tsc_base + TCQCR); + + reg = __raw_readl(tsc_base + TCQMR); + reg &= ~TCQMR_PD_IRQ_MSK; + __raw_writel(reg, tsc_base + TCQMR); + } + break; + + case GER_PURPOSE_ADC0: + down(&general_convert_mutex); + + lastitemid = 0; + reg = (0xf << CQCR_FIFOWATERMARK_SHIFT) | + (lastitemid << CQCR_LAST_ITEM_ID_SHIFT) | CQCR_QSM_FQS; + __raw_writel(reg, tsc_base + GCQCR); + + reg = TSC_GENERAL_ADC_GCC0; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC0); + + imx_adc_read_general(result); + up(&general_convert_mutex); + break; + + case GER_PURPOSE_ADC1: + down(&general_convert_mutex); + + lastitemid = 0; + reg = (0xf << CQCR_FIFOWATERMARK_SHIFT) | + (lastitemid << CQCR_LAST_ITEM_ID_SHIFT) | CQCR_QSM_FQS; + __raw_writel(reg, tsc_base + GCQCR); + + reg = TSC_GENERAL_ADC_GCC1; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC0); + + imx_adc_read_general(result); + up(&general_convert_mutex); + break; + + case GER_PURPOSE_ADC2: + down(&general_convert_mutex); + + lastitemid = 0; + reg = (0xf << CQCR_FIFOWATERMARK_SHIFT) | + (lastitemid << CQCR_LAST_ITEM_ID_SHIFT) | CQCR_QSM_FQS; + __raw_writel(reg, tsc_base + GCQCR); + + reg = TSC_GENERAL_ADC_GCC2; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC0); + + imx_adc_read_general(result); + up(&general_convert_mutex); + break; + + case GER_PURPOSE_MULTICHNNEL: + down(&general_convert_mutex); + + reg = TSC_GENERAL_ADC_GCC0; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC0); + + reg = TSC_GENERAL_ADC_GCC1; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC1); + + reg = TSC_GENERAL_ADC_GCC2; + reg |= (3 << CC_NOS_SHIFT) | (16 << CC_SETTLING_TIME_SHIFT); + __raw_writel(reg, tsc_base + GCC2); + + reg = (GCQ_ITEM_GCC2 << GCQ_ITEM2_SHIFT) | + (GCQ_ITEM_GCC1 << GCQ_ITEM1_SHIFT) | + (GCQ_ITEM_GCC0 << GCQ_ITEM0_SHIFT); + __raw_writel(reg, tsc_base + GCQ_ITEM_7_0); + + lastitemid = 2; + reg = (0xf << CQCR_FIFOWATERMARK_SHIFT) | + (lastitemid << CQCR_LAST_ITEM_ID_SHIFT) | CQCR_QSM_FQS; + __raw_writel(reg, tsc_base + GCQCR); + + imx_adc_read_general(result); + up(&general_convert_mutex); + break; + default: + pr_debug("%s: bad channel number\n", __func__); + return IMX_ADC_ERROR; + } + + return IMX_ADC_SUCCESS; +} +EXPORT_SYMBOL(imx_adc_convert); + +/*! + * This function triggers a conversion and returns sampling results of each + * specified channel. + * + * @param channels This input parameter is bitmap to specify channels + * to be sampled. + * @param result The pointer to array to store sampling results. + * The memory should be allocated by the caller of this + * function. + * + * @return This function returns IMX_ADC_SUCCESS if successful. + */ +enum IMX_ADC_STATUS imx_adc_convert_multichnnel(enum t_channel channels, + unsigned short *result) +{ + imx_adc_convert(GER_PURPOSE_MULTICHNNEL, result); + return IMX_ADC_SUCCESS; +} +EXPORT_SYMBOL(imx_adc_convert_multichnnel); + +/*! + * This function implements IOCTL controls on an i.MX ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int imx_adc_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct t_adc_convert_param *convert_param; + + if ((_IOC_TYPE(cmd) != 'p') && (_IOC_TYPE(cmd) != 'D')) + return -ENOTTY; + + while (suspend_flag) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, !suspend_flag)) + return -ERESTARTSYS; + } + + switch (cmd) { + case IMX_ADC_INIT: + pr_debug("init adc\n"); + CHECK_ERROR(imx_adc_init()); + break; + + case IMX_ADC_DEINIT: + pr_debug("deinit adc\n"); + CHECK_ERROR(imx_adc_deinit()); + break; + + case IMX_ADC_CONVERT: + convert_param = kmalloc(sizeof(*convert_param), GFP_KERNEL); + if (convert_param == NULL) + return -ENOMEM; + if (copy_from_user(convert_param, + (struct t_adc_convert_param *)arg, + sizeof(*convert_param))) { + kfree(convert_param); + return -EFAULT; + } + CHECK_ERROR_KFREE(imx_adc_convert(convert_param->channel, + convert_param->result), + (kfree(convert_param))); + + if (copy_to_user((struct t_adc_convert_param *)arg, + convert_param, sizeof(*convert_param))) { + kfree(convert_param); + return -EFAULT; + } + kfree(convert_param); + break; + + case IMX_ADC_CONVERT_MULTICHANNEL: + convert_param = kmalloc(sizeof(*convert_param), GFP_KERNEL); + if (convert_param == NULL) + return -ENOMEM; + if (copy_from_user(convert_param, + (struct t_adc_convert_param *)arg, + sizeof(*convert_param))) { + kfree(convert_param); + return -EFAULT; + } + CHECK_ERROR_KFREE(imx_adc_convert_multichnnel + (convert_param->channel, + convert_param->result), + (kfree(convert_param))); + + if (copy_to_user((struct t_adc_convert_param *)arg, + convert_param, sizeof(*convert_param))) { + kfree(convert_param); + return -EFAULT; + } + kfree(convert_param); + break; + + default: + pr_debug("imx_adc_ioctl: unsupported ioctl command 0x%x\n", + cmd); + return -EINVAL; + } + return 0; +} + +static struct file_operations imx_adc_fops = { + .owner = THIS_MODULE, + .ioctl = imx_adc_ioctl, + .open = imx_adc_open, + .release = imx_adc_free, +}; + +static int imx_adc_module_probe(struct platform_device *pdev) +{ + int ret = 0; + int retval; + struct device *temp_class; + struct resource *res; + void __iomem *base; + + /* ioremap the base address */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No TSC base address provided\n"); + goto err_out0; + } + base = ioremap(res->start, res->end - res->start); + if (base == NULL) { + dev_err(&pdev->dev, "failed to rebase TSC base address\n"); + goto err_out0; + } + tsc_base = (unsigned long)base; + + /* create the chrdev */ + imx_adc_major = register_chrdev(0, "imx_adc", &imx_adc_fops); + + if (imx_adc_major < 0) { + dev_err(&pdev->dev, "Unable to get a major for imx_adc\n"); + return imx_adc_major; + } + init_waitqueue_head(&suspendq); + init_waitqueue_head(&tsq); + + imx_adc_class = class_create(THIS_MODULE, "imx_adc"); + if (IS_ERR(imx_adc_class)) { + dev_err(&pdev->dev, "Error creating imx_adc class.\n"); + ret = PTR_ERR(imx_adc_class); + goto err_out1; + } + + temp_class = device_create(imx_adc_class, NULL, + MKDEV(imx_adc_major, 0), NULL, "imx_adc"); + if (IS_ERR(temp_class)) { + dev_err(&pdev->dev, "Error creating imx_adc class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + adc_data = kmalloc(sizeof(struct imx_adc_data), GFP_KERNEL); + if (adc_data == NULL) + return -ENOMEM; + adc_data->irq = platform_get_irq(pdev, 0); + retval = request_irq(adc_data->irq, imx_adc_interrupt, + 0, MOD_NAME, MOD_NAME); + if (retval) { + return retval; + } + adc_data->adc_clk = clk_get(&pdev->dev, "tchscrn_clk"); + + ret = imx_adc_init(); + + if (ret != IMX_ADC_SUCCESS) { + dev_err(&pdev->dev, "Error in imx_adc_init.\n"); + goto err_out4; + } + imx_adc_ready = 1; + + /* By default, devices should wakeup if they can */ + /* So TouchScreen is set as "should wakeup" as it can */ + device_init_wakeup(&pdev->dev, 1); + + pr_info("i.MX ADC at 0x%x irq %d\n", (unsigned int)res->start, + adc_data->irq); + return ret; + +err_out4: + device_destroy(imx_adc_class, MKDEV(imx_adc_major, 0)); +err_out2: + class_destroy(imx_adc_class); +err_out1: + unregister_chrdev(imx_adc_major, "imx_adc"); +err_out0: + return ret; +} + +static int imx_adc_module_remove(struct platform_device *pdev) +{ + imx_adc_ready = 0; + imx_adc_deinit(); + device_destroy(imx_adc_class, MKDEV(imx_adc_major, 0)); + class_destroy(imx_adc_class); + unregister_chrdev(imx_adc_major, "imx_adc"); + free_irq(adc_data->irq, MOD_NAME); + kfree(adc_data); + pr_debug("i.MX ADC successfully removed\n"); + return 0; +} + +static struct platform_driver imx_adc_driver = { + .driver = { + .name = "imx_adc", + }, + .suspend = imx_adc_suspend, + .resume = imx_adc_resume, + .probe = imx_adc_module_probe, + .remove = imx_adc_module_remove, +}; + +/* + * Initialization and Exit + */ +static int __init imx_adc_module_init(void) +{ + pr_debug("i.MX ADC driver loading...\n"); + return platform_driver_register(&imx_adc_driver); +} + +static void __exit imx_adc_module_exit(void) +{ + platform_driver_unregister(&imx_adc_driver); + pr_debug("i.MX ADC driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +module_init(imx_adc_module_init); +module_exit(imx_adc_module_exit); + +MODULE_DESCRIPTION("i.MX ADC device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/adc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/adc/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for i.MX adc devices. +# +obj-$(CONFIG_IMX_ADC) += imx_adc.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mlb/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/mlb/Kconfig @@ -0,0 +1,13 @@ +# +# MLB configuration +# + +menu "MXC Media Local Bus Driver" + +config MXC_MLB + tristate "MLB support" + depends on ARCH_MX35 + ---help--- + Say Y to get the MLB support. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mlb/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/mlb/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the kernel MLB driver +# + +obj-$(CONFIG_MXC_MLB) += mxc_mlb.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mlb/mxc_mlb.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/mlb/mxc_mlb.c @@ -0,0 +1,1050 @@ +/* + * linux/drivers/mxc/mlb/mxc_mlb.c + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +//#include + +/*! + * MLB module memory map registers define + */ +#define MLB_REG_DCCR 0x0 +#define MLB_REG_SSCR 0x4 +#define MLB_REG_SDCR 0x8 +#define MLB_REG_SMCR 0xC +#define MLB_REG_VCCR 0x1C +#define MLB_REG_SBCR 0x20 +#define MLB_REG_ABCR 0x24 +#define MLB_REG_CBCR 0x28 +#define MLB_REG_IBCR 0x2C +#define MLB_REG_CICR 0x30 +#define MLB_REG_CECRn 0x40 +#define MLB_REG_CSCRn 0x44 +#define MLB_REG_CCBCRn 0x48 +#define MLB_REG_CNBCRn 0x4C +#define MLB_REG_LCBCRn 0x280 + +#define MLB_DCCR_FS_OFFSET 28 +#define MLB_DCCR_EN (1 << 31) +#define MLB_DCCR_LBM_OFFSET 30 +#define MLB_DCCR_RESET (1 << 23) +#define MLB_CECR_CE (1 << 31) +#define MLB_CECR_TR (1 << 30) +#define MLB_CECR_CT_OFFSET 28 +#define MLB_CECR_MBS (1 << 19) +#define MLB_CSCR_CBPE (1 << 0) +#define MLB_CSCR_CBDB (1 << 1) +#define MLB_CSCR_CBD (1 << 2) +#define MLB_CSCR_CBS (1 << 3) +#define MLB_CSCR_BE (1 << 4) +#define MLB_CSCR_ABE (1 << 5) +#define MLB_CSCR_LFS (1 << 6) +#define MLB_CSCR_PBPE (1 << 8) +#define MLB_CSCR_PBDB (1 << 9) +#define MLB_CSCR_PBD (1 << 10) +#define MLB_CSCR_PBS (1 << 11) +#define MLB_CSCR_RDY (1 << 16) +#define MLB_CSCR_BM (1 << 31) +#define MLB_CSCR_BF (1 << 30) +#define MLB_SSCR_SDML (1 << 5) + +#define MLB_CONTROL_TX_CHANN (0 << 4) +#define MLB_CONTROL_RX_CHANN (1 << 4) +#define MLB_ASYNC_TX_CHANN (2 << 4) +#define MLB_ASYNC_RX_CHANN (3 << 4) + +#define MLB_MINOR_DEVICES 2 +#define MLB_CONTROL_DEV_NAME "ctrl" +#define MLB_ASYNC_DEV_NAME "async" + +#define TX_CHANNEL 0 +#define RX_CHANNEL 1 +#define TX_CHANNEL_BUF_SIZE 1024 +#define RX_CHANNEL_BUF_SIZE 2*1024 +/* max package data size */ +#define ASYNC_PACKET_SIZE 1024 +#define CTRL_PACKET_SIZE 64 +#define RX_RING_NODES 10 + +#define _get_txchan(dev) mlb_devinfo[dev].channels[TX_CHANNEL] +#define _get_rxchan(dev) mlb_devinfo[dev].channels[RX_CHANNEL] + +enum { + MLB_CTYPE_SYNC, + MLB_CTYPE_ISOC, + MLB_CTYPE_ASYNC, + MLB_CTYPE_CTRL, +}; + +/*! + * Rx ring buffer + */ +struct mlb_rx_ringnode { + int size; + char *data; +}; + +struct mlb_channel_info { + + /* channel offset in memmap */ + const unsigned int reg_offset; + /* channel address */ + int address; + /*! + * channel buffer start address + * for Rx, buf_head pointer to a loop ring buffer + */ + unsigned long buf_head; + /* physical buffer head address */ + unsigned long phy_head; + /* channel buffer size */ + unsigned int buf_size; + /* channel buffer current ptr */ + unsigned long buf_ptr; + /* buffer spin lock */ + rwlock_t buf_lock; +}; + +struct mlb_dev_info { + + /* device node name */ + const char dev_name[20]; + /* channel type */ + const unsigned int channel_type; + /* channel info for tx/rx */ + struct mlb_channel_info channels[2]; + /* rx ring buffer */ + struct mlb_rx_ringnode rx_bufs[RX_RING_NODES]; + /* rx ring buffer read/write ptr */ + unsigned int rdpos, wtpos; + /* exception event */ + unsigned long ex_event; + /* channel started up or not */ + atomic_t on; + /* device open count */ + atomic_t opencnt; + /* wait queue head for channel */ + wait_queue_head_t rd_wq; + wait_queue_head_t wt_wq; + /* spinlock for event access */ + spinlock_t event_lock; +}; + +static struct mlb_dev_info mlb_devinfo[MLB_MINOR_DEVICES] = { + { + .dev_name = MLB_CONTROL_DEV_NAME, + .channel_type = MLB_CTYPE_CTRL, + .channels = { + [0] = { + .reg_offset = MLB_CONTROL_TX_CHANN, + .buf_size = TX_CHANNEL_BUF_SIZE, + .buf_lock = + __RW_LOCK_UNLOCKED(mlb_devinfo[0].channels[0]. + buf_lock), + }, + [1] = { + .reg_offset = MLB_CONTROL_RX_CHANN, + .buf_size = RX_CHANNEL_BUF_SIZE, + .buf_lock = + __RW_LOCK_UNLOCKED(mlb_devinfo[0].channels[1]. + buf_lock), + }, + }, + .on = ATOMIC_INIT(0), + .opencnt = ATOMIC_INIT(0), + .rd_wq = __WAIT_QUEUE_HEAD_INITIALIZER(mlb_devinfo[0].rd_wq), + .wt_wq = __WAIT_QUEUE_HEAD_INITIALIZER(mlb_devinfo[0].wt_wq), + .event_lock = __SPIN_LOCK_UNLOCKED(mlb_devinfo[0].event_lock), + }, + { + .dev_name = MLB_ASYNC_DEV_NAME, + .channel_type = MLB_CTYPE_ASYNC, + .channels = { + [0] = { + .reg_offset = MLB_ASYNC_TX_CHANN, + .buf_size = TX_CHANNEL_BUF_SIZE, + .buf_lock = + __RW_LOCK_UNLOCKED(mlb_devinfo[1].channels[0]. + buf_lock), + }, + [1] = { + .reg_offset = MLB_ASYNC_RX_CHANN, + .buf_size = RX_CHANNEL_BUF_SIZE, + .buf_lock = + __RW_LOCK_UNLOCKED(mlb_devinfo[1].channels[1]. + buf_lock), + }, + }, + .on = ATOMIC_INIT(0), + .opencnt = ATOMIC_INIT(0), + .rd_wq = __WAIT_QUEUE_HEAD_INITIALIZER(mlb_devinfo[1].rd_wq), + .wt_wq = __WAIT_QUEUE_HEAD_INITIALIZER(mlb_devinfo[1].wt_wq), + .event_lock = __SPIN_LOCK_UNLOCKED(mlb_devinfo[1].event_lock), + }, +}; + +static struct regulator *reg_nvcc; /* NVCC_MLB regulator */ +static struct clk *mlb_clk; +static struct cdev mxc_mlb_dev; /* chareset device */ +static dev_t dev; +static struct class *mlb_class; /* device class */ +static struct device *class_dev; +static unsigned long mlb_base; /* mlb module base address */ +static unsigned int irq; + +/*! + * Initial the MLB module device + */ +static void mlb_dev_init(void) +{ + unsigned long dccr_val; + unsigned long phyaddr; + + /* reset the MLB module */ + __raw_writel(MLB_DCCR_RESET, mlb_base + MLB_REG_DCCR); + while (__raw_readl(mlb_base + MLB_REG_DCCR) + & MLB_DCCR_RESET) ; + + /*! + * Enable MLB device, disable loopback mode, + * set default fps to 512, set mlb device address to 0 + */ + dccr_val = MLB_DCCR_EN; + __raw_writel(dccr_val, mlb_base + MLB_REG_DCCR); + + /* disable all the system interrupt */ + __raw_writel(0x5F, mlb_base + MLB_REG_SMCR); + + /* write async, control tx/rx base address */ + phyaddr = _get_txchan(0).phy_head >> 16; + __raw_writel(phyaddr << 16 | phyaddr, mlb_base + MLB_REG_CBCR); + phyaddr = _get_txchan(1).phy_head >> 16; + __raw_writel(phyaddr << 16 | phyaddr, mlb_base + MLB_REG_ABCR); + +} + +static void mlb_dev_exit(void) +{ + __raw_writel(0, mlb_base + MLB_REG_DCCR); +} + +/*! + * MLB receive start function + * + * load phy_head to next buf register to start next rx + * here use single-packet buffer, set start=end + */ +static void mlb_start_rx(int cdev_id) +{ + struct mlb_channel_info *chinfo = &_get_rxchan(cdev_id); + unsigned long next; + + next = chinfo->phy_head & 0xFFFC; + /* load next buf */ + __raw_writel((next << 16) | next, mlb_base + + MLB_REG_CNBCRn + chinfo->reg_offset); + /* set ready bit to start next rx */ + __raw_writel(MLB_CSCR_RDY, mlb_base + MLB_REG_CSCRn + + chinfo->reg_offset); +} + +/*! + * MLB transmit start function + * make sure aquiring the rw buf_lock, when calling this + */ +static void mlb_start_tx(int cdev_id) +{ + struct mlb_channel_info *chinfo = &_get_txchan(cdev_id); + unsigned long begin, end; + + begin = chinfo->phy_head; + end = (chinfo->phy_head + chinfo->buf_ptr - chinfo->buf_head) & 0xFFFC; + /* load next buf */ + __raw_writel((begin << 16) | end, mlb_base + + MLB_REG_CNBCRn + chinfo->reg_offset); + /* set ready bit to start next tx */ + __raw_writel(MLB_CSCR_RDY, mlb_base + MLB_REG_CSCRn + + chinfo->reg_offset); +} + +/*! + * Enable the MLB channel + */ +static void mlb_channel_enable(int chan_dev_id, int on) +{ + unsigned long tx_regval = 0, rx_regval = 0; + /*! + * setup the direction, enable, channel type, + * mode select, channel address and mask buf start + */ + if (on) { + unsigned int ctype = mlb_devinfo[chan_dev_id].channel_type; + tx_regval = MLB_CECR_CE | MLB_CECR_TR | MLB_CECR_MBS | + (ctype << MLB_CECR_CT_OFFSET) | + _get_txchan(chan_dev_id).address; + rx_regval = MLB_CECR_CE | MLB_CECR_MBS | + (ctype << MLB_CECR_CT_OFFSET) | + _get_rxchan(chan_dev_id).address; + + atomic_set(&mlb_devinfo[chan_dev_id].on, 1); + } else { + atomic_set(&mlb_devinfo[chan_dev_id].on, 0); + } + + /* update the rx/tx channel entry config */ + __raw_writel(tx_regval, mlb_base + MLB_REG_CECRn + + _get_txchan(chan_dev_id).reg_offset); + __raw_writel(rx_regval, mlb_base + MLB_REG_CECRn + + _get_rxchan(chan_dev_id).reg_offset); + + if (on) + mlb_start_rx(chan_dev_id); +} + +/*! + * MLB interrupt handler + */ +void mlb_tx_isr(int minor, unsigned int cis) +{ + struct mlb_channel_info *chinfo = &_get_txchan(minor); + + if (cis & MLB_CSCR_CBD) { + /* buffer done, reset the buf_ptr */ + write_lock(&chinfo->buf_lock); + chinfo->buf_ptr = chinfo->buf_head; + write_unlock(&chinfo->buf_lock); + /* wake up the writer */ + wake_up_interruptible(&mlb_devinfo[minor].wt_wq); + } +} + +void mlb_rx_isr(int minor, unsigned int cis) +{ + struct mlb_channel_info *chinfo = &_get_rxchan(minor); + unsigned long end; + unsigned int len; + + if (cis & MLB_CSCR_CBD) { + + int wpos, rpos; + + rpos = mlb_devinfo[minor].rdpos; + wpos = mlb_devinfo[minor].wtpos; + + /* buffer done, get current buffer ptr */ + end = + __raw_readl(mlb_base + MLB_REG_CCBCRn + chinfo->reg_offset); + end >>= 16; /* end here is phy */ + len = end - (chinfo->phy_head & 0xFFFC); + + /*! + * copy packet from IRAM buf to ring buf. + * if the wpos++ == rpos, drop this packet + */ + if (((wpos + 1) % RX_RING_NODES) != rpos) { + +#ifdef DEBUG + if (mlb_devinfo[minor].channel_type == MLB_CTYPE_CTRL) { + if (len > CTRL_PACKET_SIZE) + pr_debug + ("mxc_mlb: ctrl packet" + "overflow\n"); + } else { + if (len > ASYNC_PACKET_SIZE) + pr_debug + ("mxc_mlb: async packet" + "overflow\n"); + } +#endif + memcpy(mlb_devinfo[minor].rx_bufs[wpos].data, + (const void *)chinfo->buf_head, len); + mlb_devinfo[minor].rx_bufs[wpos].size = len; + + /* update the ring wpos */ + mlb_devinfo[minor].wtpos = (wpos + 1) % RX_RING_NODES; + + /* wake up the reader */ + wake_up_interruptible(&mlb_devinfo[minor].rd_wq); + + pr_debug("recv package, len:%d, rdpos: %d, wtpos: %d\n", + len, rpos, mlb_devinfo[minor].wtpos); + } else { + pr_debug + ("drop package, due to no space, (%d,%d)\n", + rpos, mlb_devinfo[minor].wtpos); + } + + /* start next rx */ + mlb_start_rx(minor); + } +} + +static irqreturn_t mlb_isr(int irq, void *dev_id) +{ + unsigned long int_status, sscr, tx_cis, rx_cis; + struct mlb_dev_info *pdev; + int minor; + + sscr = __raw_readl(mlb_base + MLB_REG_SSCR); + pr_debug("mxc_mlb: system interrupt:%lx\n", sscr); + __raw_writel(0x7F, mlb_base + MLB_REG_SSCR); + + int_status = __raw_readl(mlb_base + MLB_REG_CICR) & 0xFFFF; + pr_debug("mxc_mlb: channel interrupt ids: %lx\n", int_status); + + for (minor = 0; minor < MLB_MINOR_DEVICES; minor++) { + + pdev = &mlb_devinfo[minor]; + tx_cis = rx_cis = 0; + + /* get tx channel interrupt status */ + if (int_status & (1 << (_get_txchan(minor).reg_offset >> 4))) + tx_cis = __raw_readl(mlb_base + MLB_REG_CSCRn + + _get_txchan(minor).reg_offset); + /* get rx channel interrupt status */ + if (int_status & (1 << (_get_rxchan(minor).reg_offset >> 4))) + rx_cis = __raw_readl(mlb_base + MLB_REG_CSCRn + + _get_rxchan(minor).reg_offset); + + if (!tx_cis && !rx_cis) + continue; + + pr_debug("tx/rx int status: 0x%08lx/0x%08lx\n", tx_cis, rx_cis); + /* fill exception event */ + spin_lock(&pdev->event_lock); + pdev->ex_event |= tx_cis & 0x303; + pdev->ex_event |= (rx_cis & 0x303) << 16; + spin_unlock(&pdev->event_lock); + + /* clear the interrupt status */ + __raw_writel(tx_cis & 0xFFFF, mlb_base + MLB_REG_CSCRn + + _get_txchan(minor).reg_offset); + __raw_writel(rx_cis & 0xFFFF, mlb_base + MLB_REG_CSCRn + + _get_rxchan(minor).reg_offset); + + /* handel tx channel */ + if (tx_cis) + mlb_tx_isr(minor, tx_cis); + /* handle rx channel */ + if (rx_cis) + mlb_rx_isr(minor, rx_cis); + + } + + return IRQ_HANDLED; +} + +static int mxc_mlb_open(struct inode *inode, struct file *filp) +{ + int minor; + + minor = MINOR(inode->i_rdev); + + if (minor < 0 || minor >= MLB_MINOR_DEVICES) + return -ENODEV; + + /* open for each channel device */ + if (atomic_cmpxchg(&mlb_devinfo[minor].opencnt, 0, 1) != 0) + return -EBUSY; + + /* reset the buffer read/write ptr */ + _get_txchan(minor).buf_ptr = _get_txchan(minor).buf_head; + _get_rxchan(minor).buf_ptr = _get_rxchan(minor).buf_head; + mlb_devinfo[minor].rdpos = mlb_devinfo[minor].wtpos = 0; + mlb_devinfo[minor].ex_event = 0; + + return 0; +} + +static int mxc_mlb_release(struct inode *inode, struct file *filp) +{ + int minor; + + minor = MINOR(inode->i_rdev); + + /* clear channel settings and info */ + mlb_channel_enable(minor, 0); + + /* decrease the open count */ + atomic_set(&mlb_devinfo[minor].opencnt, 0); + + return 0; +} + +static int mxc_mlb_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + void __user *argp = (void __user *)arg; + unsigned long flags, event; + int minor; + + minor = MINOR(inode->i_rdev); + + switch (cmd) { + + case MLB_CHAN_SETADDR: + { + unsigned int caddr; + /* get channel address from user space */ + if (copy_from_user(&caddr, argp, sizeof(caddr))) { + pr_err("mxc_mlb: copy from user failed\n"); + return -EFAULT; + } + _get_txchan(minor).address = (caddr >> 16) & 0xFFFF; + _get_rxchan(minor).address = caddr & 0xFFFF; + break; + } + + case MLB_CHAN_STARTUP: + if (atomic_read(&mlb_devinfo[minor].on)) { + pr_debug("mxc_mlb: channel areadly startup\n"); + break; + } + mlb_channel_enable(minor, 1); + break; + case MLB_CHAN_SHUTDOWN: + if (atomic_read(&mlb_devinfo[minor].on) == 0) { + pr_debug("mxc_mlb: channel areadly shutdown\n"); + break; + } + mlb_channel_enable(minor, 0); + break; + case MLB_CHAN_GETEVENT: + /* get and clear the ex_event */ + spin_lock_irqsave(&mlb_devinfo[minor].event_lock, flags); + event = mlb_devinfo[minor].ex_event; + mlb_devinfo[minor].ex_event = 0; + spin_unlock_irqrestore(&mlb_devinfo[minor].event_lock, flags); + + if (event) { + if (copy_to_user(argp, &event, sizeof(event))) { + pr_err("mxc_mlb: copy to user failed\n"); + return -EFAULT; + } + } else { + pr_debug("mxc_mlb: no exception event now\n"); + return -EAGAIN; + } + break; + case MLB_SET_FPS: + { + unsigned int fps; + unsigned long dccr_val; + + /* get fps from user space */ + if (copy_from_user(&fps, argp, sizeof(fps))) { + pr_err("mxc_mlb: copy from user failed\n"); + return -EFAULT; + } + + /* check fps value */ + if (fps != 256 && fps != 512 && fps != 1024) { + pr_debug("mxc_mlb: invalid fps argument\n"); + return -EINVAL; + } + + dccr_val = __raw_readl(mlb_base + MLB_REG_DCCR); + dccr_val &= ~(0x3 << MLB_DCCR_FS_OFFSET); + dccr_val |= (fps >> 9) << MLB_DCCR_FS_OFFSET; + __raw_writel(dccr_val, mlb_base + MLB_REG_DCCR); + break; + } + + case MLB_GET_VER: + { + unsigned long version; + + /* get MLB device module version */ + version = __raw_readl(mlb_base + MLB_REG_VCCR); + + if (copy_to_user(argp, &version, sizeof(version))) { + pr_err("mxc_mlb: copy to user failed\n"); + return -EFAULT; + } + break; + } + + case MLB_SET_DEVADDR: + { + unsigned long dccr_val; + unsigned char devaddr; + + /* get MLB device address from user space */ + if (copy_from_user + (&devaddr, argp, sizeof(unsigned char))) { + pr_err("mxc_mlb: copy from user failed\n"); + return -EFAULT; + } + + dccr_val = __raw_readl(mlb_base + MLB_REG_DCCR); + dccr_val &= ~0xFF; + dccr_val |= devaddr; + __raw_writel(dccr_val, mlb_base + MLB_REG_DCCR); + + break; + } + default: + pr_info("mxc_mlb: Invalid ioctl command\n"); + return -EINVAL; + } + + return 0; +} + +/*! + * MLB read routine + * + * Read the current received data from queued buffer, + * and free this buffer for hw to fill ingress data. + */ +static ssize_t mxc_mlb_read(struct file *filp, char __user *buf, + size_t count, loff_t *f_pos) +{ + int minor, ret; + int size, rdpos; + struct mlb_rx_ringnode *rxbuf; + + minor = MINOR(filp->f_dentry->d_inode->i_rdev); + + rdpos = mlb_devinfo[minor].rdpos; + rxbuf = mlb_devinfo[minor].rx_bufs; + + /* check the current rx buffer is available or not */ + if (rdpos == mlb_devinfo[minor].wtpos) { + if (filp->f_flags & O_NONBLOCK) + return -EAGAIN; + /* if !O_NONBLOCK, we wait for recv packet */ + ret = wait_event_interruptible(mlb_devinfo[minor].rd_wq, + (mlb_devinfo[minor].wtpos != + rdpos)); + if (ret < 0) + return ret; + } + + size = rxbuf[rdpos].size; + if (size > count) { + /* the user buffer is too small */ + pr_warning + ("mxc_mlb: received data size is bigger than count\n"); + return -EINVAL; + } + + /* copy rx buffer data to user buffer */ + if (copy_to_user(buf, rxbuf[rdpos].data, size)) { + pr_err("mxc_mlb: copy from user failed\n"); + return -EFAULT; + } + + /* update the read ptr */ + mlb_devinfo[minor].rdpos = (rdpos + 1) % RX_RING_NODES; + + *f_pos = 0; + + return size; +} + +/*! + * MLB write routine + * + * Copy the user data to tx channel buffer, + * and prepare the channel current/next buffer ptr. + */ +static ssize_t mxc_mlb_write(struct file *filp, const char __user *buf, + size_t count, loff_t *f_pos) +{ + int minor; + unsigned long flags; + DEFINE_WAIT(__wait); + int ret; + + minor = MINOR(filp->f_dentry->d_inode->i_rdev); + + if (count > _get_txchan(minor).buf_size) { + /* too many data to write */ + pr_warning("mxc_mlb: overflow write data\n"); + return -EFBIG; + } + + *f_pos = 0; + + /* check the current tx buffer is used or not */ + write_lock_irqsave(&_get_txchan(minor).buf_lock, flags); + if (_get_txchan(minor).buf_ptr != _get_txchan(minor).buf_head) { + write_unlock_irqrestore(&_get_txchan(minor).buf_lock, flags); + + /* there's already some datas being transmit now */ + if (filp->f_flags & O_NONBLOCK) + return -EAGAIN; + + /* if !O_NONBLOCK, we wait for transmit finish */ + for (;;) { + prepare_to_wait(&mlb_devinfo[minor].wt_wq, + &__wait, TASK_INTERRUPTIBLE); + + write_lock_irqsave(&_get_txchan(minor).buf_lock, flags); + if (_get_txchan(minor).buf_ptr == + _get_txchan(minor).buf_head) + break; + + write_unlock_irqrestore(&_get_txchan(minor).buf_lock, + flags); + if (!signal_pending(current)) { + schedule(); + continue; + } + return -ERESTARTSYS; + } + finish_wait(&mlb_devinfo[minor].wt_wq, &__wait); + } + + /* copy user buffer to tx buffer */ + if (copy_from_user((void *)_get_txchan(minor).buf_ptr, buf, count)) { + pr_err("mxc_mlb: copy from user failed\n"); + ret = -EFAULT; + goto out; + } + _get_txchan(minor).buf_ptr += count; + + /* set current/next buffer start/end */ + mlb_start_tx(minor); + + ret = count; + +out: + write_unlock_irqrestore(&_get_txchan(minor).buf_lock, flags); + return ret; +} + +static unsigned int mxc_mlb_poll(struct file *filp, + struct poll_table_struct *wait) +{ + int minor; + unsigned int ret = 0; + unsigned long flags; + + minor = MINOR(filp->f_dentry->d_inode->i_rdev); + + poll_wait(filp, &mlb_devinfo[minor].rd_wq, wait); + poll_wait(filp, &mlb_devinfo[minor].wt_wq, wait); + + /* check the tx buffer is avaiable or not */ + read_lock_irqsave(&_get_txchan(minor).buf_lock, flags); + if (_get_txchan(minor).buf_ptr == _get_txchan(minor).buf_head) + ret |= POLLOUT | POLLWRNORM; + read_unlock_irqrestore(&_get_txchan(minor).buf_lock, flags); + + /* check the rx buffer filled or not */ + if (mlb_devinfo[minor].rdpos != mlb_devinfo[minor].wtpos) + ret |= POLLIN | POLLRDNORM; + + /* check the exception event */ + if (mlb_devinfo[minor].ex_event) + ret |= POLLIN | POLLRDNORM; + + return ret; +} + +/*! + * char dev file operations structure + */ +static struct file_operations mxc_mlb_fops = { + + .owner = THIS_MODULE, + .open = mxc_mlb_open, + .release = mxc_mlb_release, + .ioctl = mxc_mlb_ioctl, + .poll = mxc_mlb_poll, + .read = mxc_mlb_read, + .write = mxc_mlb_write, +}; + +/*! + * This function is called whenever the MLB device is detected. + */ +static int __devinit mxc_mlb_probe(struct platform_device *pdev) +{ + int ret, mlb_major, i, j; + struct mxc_mlb_platform_data *plat_data; + struct resource *res; + void __iomem *base; + unsigned long bufaddr, phyaddr; + + /* malloc the Rx ring buffer firstly */ + for (i = 0; i < MLB_MINOR_DEVICES; i++) { + char *buf; + int bufsize; + + if (mlb_devinfo[i].channel_type == MLB_CTYPE_ASYNC) + bufsize = ASYNC_PACKET_SIZE; + else + bufsize = CTRL_PACKET_SIZE; + + buf = kmalloc(bufsize * RX_RING_NODES, GFP_KERNEL); + if (buf == NULL) { + ret = -ENOMEM; + dev_err(&pdev->dev, "can not alloc rx buffers\n"); + goto err4; + } + for (j = 0; j < RX_RING_NODES; j++) { + mlb_devinfo[i].rx_bufs[j].data = buf; + buf += bufsize; + } + } + + /** + * Register MLB lld as two character devices + * One for Packet date channel, the other for control data channel + */ + ret = alloc_chrdev_region(&dev, 0, MLB_MINOR_DEVICES, "mxc_mlb"); + mlb_major = MAJOR(dev); + + if (ret < 0) { + dev_err(&pdev->dev, "can't get major %d\n", mlb_major); + goto err3; + } + + cdev_init(&mxc_mlb_dev, &mxc_mlb_fops); + mxc_mlb_dev.owner = THIS_MODULE; + + ret = cdev_add(&mxc_mlb_dev, dev, MLB_MINOR_DEVICES); + if (ret) { + dev_err(&pdev->dev, "can't add cdev\n"); + goto err2; + } + + /* create class and device for udev information */ + mlb_class = class_create(THIS_MODULE, "mlb"); + if (IS_ERR(mlb_class)) { + dev_err(&pdev->dev, "failed to create mlb class\n"); + ret = -ENOMEM; + goto err2; + } + + for (i = 0; i < MLB_MINOR_DEVICES; i++) { + + class_dev = device_create(mlb_class, NULL, MKDEV(mlb_major, i), + NULL, mlb_devinfo[i].dev_name); + if (IS_ERR(class_dev)) { + dev_err(&pdev->dev, "failed to create mlb %s" + " class device\n", mlb_devinfo[i].dev_name); + ret = -ENOMEM; + goto err1; + } + } + + /* get irq line */ + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No mlb irq line provided\n"); + goto err1; + } + + irq = res->start; + /* request irq */ + if (request_irq(irq, mlb_isr, 0, "mlb", NULL)) { + dev_err(&pdev->dev, "failed to request irq\n"); + ret = -EBUSY; + goto err1; + } + + /* ioremap from phy mlb to kernel space */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(&pdev->dev, "No mlb base address provided\n"); + goto err0; + } + + base = ioremap(res->start, res->end - res->start); + dev_dbg(&pdev->dev, "mapped mlb base address: 0x%08x\n", + (unsigned int)base); + + if (base == NULL) { + dev_err(&pdev->dev, "failed to do ioremap with mlb base\n"); + goto err0; + } + mlb_base = (unsigned long)base; + + /*! + * get rx/tx buffer address from platform data + * make sure the buf_address is 4bytes aligned + * + * ------------------- <-- plat_data->buf_address + * | minor 0 tx buf | + * ----------------- + * | minor 0 rx buf | + * ----------------- + * | .... | + * ----------------- + * | minor n tx buf | + * ----------------- + * | minor n rx buf | + * ------------------- + */ + + plat_data = (struct mxc_mlb_platform_data *)pdev->dev.platform_data; + + bufaddr = plat_data->buf_address & ~0x3; + phyaddr = plat_data->phy_address & ~0x3; + + for (i = 0; i < MLB_MINOR_DEVICES; i++) { + /* set the virtual and physical buf head address */ + _get_txchan(i).buf_head = bufaddr; + _get_txchan(i).phy_head = phyaddr; + + bufaddr += TX_CHANNEL_BUF_SIZE; + phyaddr += TX_CHANNEL_BUF_SIZE; + + _get_rxchan(i).buf_head = bufaddr; + _get_rxchan(i).phy_head = phyaddr; + + bufaddr += RX_CHANNEL_BUF_SIZE; + phyaddr += RX_CHANNEL_BUF_SIZE; + + dev_dbg(&pdev->dev, "phy_head: tx(%lx), rx(%lx)\n", + _get_txchan(i).phy_head, _get_rxchan(i).phy_head); + dev_dbg(&pdev->dev, "buf_head: tx(%lx), rx(%lx)\n", + _get_txchan(i).buf_head, _get_rxchan(i).buf_head); + } + + /* enable GPIO */ + gpio_mlb_active(); + + /* power on MLB */ + reg_nvcc = regulator_get(&pdev->dev, plat_data->reg_nvcc); + /* set MAX LDO6 for NVCC to 2.5V */ + regulator_set_voltage(reg_nvcc, 2500000, 2500000); + regulator_enable(reg_nvcc); + + /* enable clock */ + mlb_clk = clk_get(&pdev->dev, plat_data->mlb_clk); + clk_enable(mlb_clk); + + /* initial MLB module */ + mlb_dev_init(); + + return 0; + +err0: + free_irq(irq, NULL); +err1: + for (--i; i >= 0; i--) + device_destroy(mlb_class, MKDEV(mlb_major, i)); + + class_destroy(mlb_class); +err2: + cdev_del(&mxc_mlb_dev); +err3: + unregister_chrdev_region(dev, MLB_MINOR_DEVICES); +err4: + for (i = 0; i < MLB_MINOR_DEVICES; i++) + kfree(mlb_devinfo[i].rx_bufs[0].data); + + return ret; +} + +static int __devexit mxc_mlb_remove(struct platform_device *pdev) +{ + int i; + + mlb_dev_exit(); + + /* disable mlb clock */ + clk_disable(mlb_clk); + clk_put(mlb_clk); + + /* disable mlb power */ + regulator_disable(reg_nvcc); + regulator_put(reg_nvcc); + + /* inactive GPIO */ + gpio_mlb_inactive(); + + /* iounmap */ + iounmap((void *)mlb_base); + + free_irq(irq, NULL); + + /* destroy mlb device class */ + for (i = MLB_MINOR_DEVICES - 1; i >= 0; i--) + device_destroy(mlb_class, MKDEV(MAJOR(dev), i)); + class_destroy(mlb_class); + + /* Unregister the two MLB devices */ + cdev_del(&mxc_mlb_dev); + unregister_chrdev_region(dev, MLB_MINOR_DEVICES); + + for (i = 0; i < MLB_MINOR_DEVICES; i++) + kfree(mlb_devinfo[i].rx_bufs[0].data); + + return 0; +} + +#ifdef CONFIG_PM +static int mxc_mlb_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int mxc_mlb_resume(struct platform_device *pdev) +{ + return 0; +} +#else +#define mxc_mlb_suspend NULL +#define mxc_mlb_resume NULL +#endif + +/*! + * platform driver structure for MLB + */ +static struct platform_driver mxc_mlb_driver = { + .driver = { + .name = "mxc_mlb"}, + .probe = mxc_mlb_probe, + .remove = __devexit_p(mxc_mlb_remove), + .suspend = mxc_mlb_suspend, + .resume = mxc_mlb_resume, +}; + +static int __init mxc_mlb_init(void) +{ + return platform_driver_register(&mxc_mlb_driver); +} + +static void __exit mxc_mlb_exit(void) +{ + platform_driver_unregister(&mxc_mlb_driver); +} + +module_init(mxc_mlb_init); +module_exit(mxc_mlb_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MLB low level driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/asrc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/asrc/Kconfig @@ -0,0 +1,13 @@ +# +# ASRC configuration +# + +menu "MXC Asynchronous Sample Rate Converter support" + +config MXC_ASRC + tristate "ASRC support" + depends on ARCH_MX35 + ---help--- + Say Y to get the ASRC service. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/asrc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/asrc/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the kernel Asynchronous Sample Rate Converter driver +# + +ifeq ($(CONFIG_ARCH_MX35),y) + obj-$(CONFIG_MXC_ASRC) += mxc_asrc.o +endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/asrc/mxc_asrc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/asrc/mxc_asrc.c @@ -0,0 +1,1692 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_asrc.c + * + * @brief MXC Asynchronous Sample Rate Converter + * + * @ingroup SOUND + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int asrc_major; +static struct class *asrc_class; +#define ASRC_PROC_PATH "driver/asrc" + +#define ASRC_RATIO_DECIMAL_DEPTH 26 + +DEFINE_SPINLOCK(data_lock); +DEFINE_SPINLOCK(input_int_lock); +DEFINE_SPINLOCK(output_int_lock); + +#define AICPA 0 /* Input Clock Divider A Offset */ +#define AICDA 3 /* Input Clock Prescaler A Offset */ +#define AICPB 6 /* Input Clock Divider B Offset */ +#define AICDB 9 /* Input Clock Prescaler B Offset */ +#define AOCPA 12 /* Output Clock Divider A Offset */ +#define AOCDA 15 /* Output Clock Prescaler A Offset */ +#define AOCPB 18 /* Output Clock Divider B Offset */ +#define AOCDB 21 /* Output Clock Prescaler B Offset */ +#define AICPC 0 /* Input Clock Divider C Offset */ +#define AICDC 3 /* Input Clock Prescaler C Offset */ +#define AOCDC 6 /* Output Clock Prescaler C Offset */ +#define AOCPC 9 /* Output Clock Divider C Offset */ + +char *asrc_pair_id[] = { + [0] = "ASRC RX PAIR A", + [1] = "ASRC TX PAIR A", + [2] = "ASRC RX PAIR B", + [3] = "ASRC TX PAIR B", + [4] = "ASRC RX PAIR C", + [5] = "ASRC TX PAIR C", +}; + +enum asrc_status { + ASRC_ASRSTR_AIDEA = 0x01, + ASRC_ASRSTR_AIDEB = 0x02, + ASRC_ASRSTR_AIDEC = 0x04, + ASRC_ASRSTR_AODFA = 0x08, + ASRC_ASRSTR_AODFB = 0x10, + ASRC_ASRSTR_AODFC = 0x20, + ASRC_ASRSTR_AOLE = 0x40, + ASRC_ASRSTR_FPWT = 0x80, + ASRC_ASRSTR_AIDUA = 0x100, + ASRC_ASRSTR_AIDUB = 0x200, + ASRC_ASRSTR_AIDUC = 0x400, + ASRC_ASRSTR_AODOA = 0x800, + ASRC_ASRSTR_AODOB = 0x1000, + ASRC_ASRSTR_AODOC = 0x2000, + ASRC_ASRSTR_AIOLA = 0x4000, + ASRC_ASRSTR_AIOLB = 0x8000, + ASRC_ASRSTR_AIOLC = 0x10000, + ASRC_ASRSTR_AOOLA = 0x20000, + ASRC_ASRSTR_AOOLB = 0x40000, + ASRC_ASRSTR_AOOLC = 0x80000, + ASRC_ASRSTR_ATQOL = 0x100000, + ASRC_ASRSTR_DSLCNT = 0x200000, +}; + +/* Sample rates are aligned with that defined in pcm.h file */ +static const unsigned char asrc_process_table[][8][2] = { + /* 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176kHz 192kHz */ +/*5512Hz*/ + {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, +/*8kHz*/ + {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, +/*11025Hz*/ + {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, +/*16kHz*/ + {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, +/*22050Hz*/ + {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, +/*32kHz*/ + {{0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0},}, +/*44.1kHz*/ + {{0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, +/*48kHz*/ + {{0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, +/*64kHz*/ + {{1, 2}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0},}, +/*88.2kHz*/ + {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, +/*96kHz*/ + {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, +/*176kHz*/ + {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, +/*192kHz*/ + {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, +}; + +static const unsigned char asrc_divider_table[] = { +/*5500Hz 8kHz 11025Hz 16kHz 22050kHz 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176400Hz 192kHz*/ + 0x07, 0x15, 0x06, 0x14, 0x05, 0x13, 0x04, 0x04, 0x12, 0x03, 0x03, 0x02, + 0x02, +}; + +static struct asrc_data *g_asrc_data; +static struct proc_dir_entry *proc_asrc; +static unsigned long asrc_vrt_base_addr; +static struct mxc_asrc_platform_data *mxc_asrc_data; + +static int asrc_set_clock_ratio(enum asrc_pair_index index, + int input_sample_rate, int output_sample_rate) +{ + int i; + int integ = 0; + unsigned long reg_val = 0; + + if (output_sample_rate == 0) + return -1; + while (input_sample_rate >= output_sample_rate) { + input_sample_rate -= output_sample_rate; + integ++; + } + reg_val |= (integ << 26); + + for (i = 1; i <= ASRC_RATIO_DECIMAL_DEPTH; i++) { + if ((input_sample_rate * 2) >= output_sample_rate) { + reg_val |= (1 << (ASRC_RATIO_DECIMAL_DEPTH - i)); + input_sample_rate = + input_sample_rate * 2 - output_sample_rate; + } else + input_sample_rate = input_sample_rate << 1; + + if (input_sample_rate == 0) + break; + } + + __raw_writel(reg_val, + (asrc_vrt_base_addr + ASRC_ASRIDRLA_REG + (index << 3))); + __raw_writel((reg_val >> 24), + (asrc_vrt_base_addr + ASRC_ASRIDRHA_REG + (index << 3))); + return 0; +} + +static int asrc_set_process_configuration(enum asrc_pair_index index, + int input_sample_rate, + int output_sample_rate) +{ + int i = 0, j = 0; + unsigned long reg; + switch (input_sample_rate) { + case 5512: + i = 0; + case 8000: + i = 1; + break; + case 11025: + i = 2; + break; + case 16000: + i = 3; + break; + case 22050: + i = 4; + break; + case 32000: + i = 5; + break; + case 44100: + i = 6; + break; + case 48000: + i = 7; + break; + case 64000: + i = 8; + break; + case 88200: + i = 9; + break; + case 96000: + i = 10; + break; + case 176400: + i = 11; + break; + case 192000: + i = 12; + break; + default: + return -1; + } + + switch (output_sample_rate) { + case 32000: + j = 0; + break; + case 44100: + j = 1; + break; + case 48000: + j = 2; + break; + case 64000: + j = 3; + break; + case 88200: + j = 4; + break; + case 96000: + j = 5; + break; + case 176400: + j = 6; + break; + case 192000: + j = 7; + break; + default: + return -1; + } + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCFG_REG); + reg &= ~(0x0f << (6 + (index << 2))); + reg |= + ((asrc_process_table[i][j][0] << (6 + (index << 2))) | + (asrc_process_table[i][j][1] << (8 + (index << 2)))); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCFG_REG); + + return 0; +} + +static int asrc_get_asrck_clock_divider(int sample_rate) +{ + int i = 0; + switch (sample_rate) { + case 5500: + i = 0; + break; + case 8000: + i = 1; + break; + case 11025: + i = 2; + break; + case 16000: + i = 3; + break; + case 22050: + i = 4; + break; + case 32000: + i = 5; + break; + case 44100: + i = 6; + break; + case 48000: + i = 7; + break; + case 64000: + i = 8; + break; + case 88200: + i = 9; + break; + case 96000: + i = 10; + break; + case 176400: + i = 11; + break; + case 192000: + i = 12; + break; + default: + return -1; + } + + return asrc_divider_table[i]; +} + +int asrc_req_pair(int chn_num, enum asrc_pair_index *index) +{ + int err = 0; + unsigned long lock_flags; + spin_lock_irqsave(&data_lock, lock_flags); + + if (chn_num > 2) { + if (g_asrc_data->asrc_pair[ASRC_PAIR_C].active + || (chn_num > g_asrc_data->asrc_pair[ASRC_PAIR_C].chn_max)) + err = -EBUSY; + else { + *index = ASRC_PAIR_C; + g_asrc_data->asrc_pair[ASRC_PAIR_C].chn_num = chn_num; + g_asrc_data->asrc_pair[ASRC_PAIR_C].active = 1; + } + } else { + if (g_asrc_data->asrc_pair[ASRC_PAIR_A].active || + (g_asrc_data->asrc_pair[ASRC_PAIR_A].chn_max == 0)) { + if (g_asrc_data->asrc_pair[ASRC_PAIR_B]. + active + || (g_asrc_data->asrc_pair[ASRC_PAIR_B]. + chn_max == 0)) + err = -EBUSY; + else { + *index = ASRC_PAIR_B; + g_asrc_data->asrc_pair[ASRC_PAIR_B].chn_num = 2; + g_asrc_data->asrc_pair[ASRC_PAIR_B].active = 1; + } + } else { + *index = ASRC_PAIR_A; + g_asrc_data->asrc_pair[ASRC_PAIR_A].chn_num = 2; + g_asrc_data->asrc_pair[ASRC_PAIR_A].active = 1; + } + } + spin_unlock_irqrestore(&data_lock, lock_flags); + return err; +} + +EXPORT_SYMBOL(asrc_req_pair); + +void asrc_release_pair(enum asrc_pair_index index) +{ + unsigned long reg; + unsigned long lock_flags; + + spin_lock_irqsave(&data_lock, lock_flags); + g_asrc_data->asrc_pair[index].active = 0; + g_asrc_data->asrc_pair[index].overload_error = 0; + /********Disable PAIR*************/ + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + reg &= ~(1 << (index + 1)); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + spin_unlock_irqrestore(&data_lock, lock_flags); +} + +EXPORT_SYMBOL(asrc_release_pair); + +int asrc_config_pair(struct asrc_config *config) +{ + int err = 0; + int reg, tmp, channel_num; + unsigned long lock_flags; + /* Set the channel number */ + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + spin_lock_irqsave(&data_lock, lock_flags); + g_asrc_data->asrc_pair[config->pair].chn_num = config->channel_num; + spin_unlock_irqrestore(&data_lock, lock_flags); + reg &= + ~((0xFFFFFFFF >> (32 - mxc_asrc_data->channel_bits)) << + (mxc_asrc_data->channel_bits * config->pair)); + if (mxc_asrc_data->channel_bits > 3) + channel_num = config->channel_num; + else + channel_num = (config->channel_num + 1) / 2; + tmp = channel_num << (mxc_asrc_data->channel_bits * config->pair); + reg |= tmp; + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + + /* Set the clock source */ + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCSR_REG); + tmp = ~(0x0f << (config->pair << 2)); + reg &= tmp; + tmp = ~(0x0f << (12 + (config->pair << 2))); + reg &= tmp; + reg |= + ((config->inclk << (config->pair << 2)) | (config-> + outclk << (12 + + (config-> + pair << + 2)))); + + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCSR_REG); + + /* default setting */ + /* automatic selection for processing mode */ + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + reg |= (1 << (20 + config->pair)); + reg &= ~(1 << (14 + (config->pair << 1))); + + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRRA_REG); + reg &= 0xffbfffff; + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRRA_REG); + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + reg = reg & (~(1 << 23)); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + + /* Default Clock Divider Setting */ + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCDR1_REG); + if (config->pair == ASRC_PAIR_A) { + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCDR1_REG); + reg &= 0xfc0fc0; + /* Input Part */ + if ((config->inclk & 0x0f) == INCLK_SPDIF_RX) + reg |= 7 << AICPA; + else if ((config->inclk & 0x0f) == INCLK_SPDIF_TX) + reg |= 6 << AICPA; + else if ((config->inclk & 0x0f) == INCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + input_sample_rate); + reg |= tmp << AICPA; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AICPA; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AICPA; + else + err = -EFAULT; + } + /* Output Part */ + if ((config->outclk & 0x0f) == OUTCLK_SPDIF_RX) + reg |= 7 << AOCPA; + else if ((config->outclk & 0x0f) == OUTCLK_SPDIF_TX) + reg |= 6 << AOCPA; + else if ((config->outclk & 0x0f) == OUTCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + output_sample_rate); + reg |= tmp << AOCPA; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AOCPA; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AOCPA; + else + err = -EFAULT; + } + + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCDR1_REG); + + } else if (config->pair == ASRC_PAIR_B) { + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCDR1_REG); + reg &= 0x03f03f; + /* Input Part */ + if ((config->inclk & 0x0f) == INCLK_SPDIF_RX) + reg |= 7 << AICPB; + else if ((config->inclk & 0x0f) == INCLK_SPDIF_TX) + reg |= 6 << AICPB; + else if ((config->inclk & 0x0f) == INCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + input_sample_rate); + reg |= tmp << AICPB; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AICPB; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AICPB; + else + err = -EFAULT; + } + /* Output Part */ + if ((config->outclk & 0x0f) == OUTCLK_SPDIF_RX) + reg |= 7 << AOCPB; + else if ((config->outclk & 0x0f) == OUTCLK_SPDIF_TX) + reg |= 6 << AOCPB; + else if ((config->outclk & 0x0f) == OUTCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + output_sample_rate); + reg |= tmp << AOCPB; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AOCPB; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AOCPB; + else + err = -EFAULT; + } + + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCDR1_REG); + + } else { + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCDR2_REG); + reg &= 0; + /* Input Part */ + if ((config->inclk & 0x0f) == INCLK_SPDIF_RX) + reg |= 7 << AICPC; + else if ((config->inclk & 0x0f) == INCLK_SPDIF_TX) + reg |= 6 << AICPC; + else if ((config->inclk & 0x0f) == INCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + input_sample_rate); + reg |= tmp << AICPC; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AICPC; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AICPC; + else + err = -EFAULT; + } + /* Output Part */ + if ((config->outclk & 0x0f) == OUTCLK_SPDIF_RX) + reg |= 7 << AOCPC; + else if ((config->outclk & 0x0f) == OUTCLK_SPDIF_TX) + reg |= 6 << AOCPC; + else if ((config->outclk & 0x0f) == OUTCLK_ASRCK1_CLK) { + tmp = + asrc_get_asrck_clock_divider(config-> + output_sample_rate); + reg |= tmp << AOCPC; + } else { + if (config->word_width == 16 || config->word_width == 8) + reg |= 5 << AOCPC; + else if (config->word_width == 32 + || config->word_width == 24) + reg |= 6 << AOCPC; + else + err = -EFAULT; + } + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCDR2_REG); + + } + + /* check whether ideal ratio is a must */ + if ((config->inclk & 0x0f) == INCLK_NONE) { + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + reg &= ~(1 << (20 + config->pair)); + reg |= (0x03 << (13 + (config->pair << 1))); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + err = asrc_set_clock_ratio(config->pair, + config->input_sample_rate, + config->output_sample_rate); + if (err < 0) + return err; + + err = asrc_set_process_configuration(config->pair, + config->input_sample_rate, + config-> + output_sample_rate); + if (err < 0) + return err; + } else if ((config->inclk & 0x0f) == INCLK_ASRCK1_CLK) { + if (config->input_sample_rate == 44100 + || config->input_sample_rate == 88200) { + pr_info + ("ASRC core clock cann't support sample rate %d\n", + config->input_sample_rate); + err = -EFAULT; + } + } else if ((config->outclk & 0x0f) == OUTCLK_ASRCK1_CLK) { + if (config->output_sample_rate == 44100 + || config->output_sample_rate == 88200) { + pr_info + ("ASRC core clock cann't support sample rate %d\n", + config->input_sample_rate); + err = -EFAULT; + } + } + + return err; +} + +EXPORT_SYMBOL(asrc_config_pair); + +void asrc_start_conv(enum asrc_pair_index index) +{ + int reg, reg_1; + unsigned long lock_flags; + int i; + + spin_lock_irqsave(&data_lock, lock_flags); + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + if ((reg & 0x0E) == 0) + clk_enable(mxc_asrc_data->asrc_audio_clk); + reg |= (1 << (1 + index)); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCFG_REG); + while (!(reg & (1 << (index + 21)))) + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCFG_REG); + reg_1 = __raw_readl(asrc_vrt_base_addr + ASRC_ASRSTR_REG); + + reg = 0; + for (i = 0; i < 20; i++) { + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + __raw_writel(reg, + asrc_vrt_base_addr + ASRC_ASRDIA_REG + + (index << 3)); + } + + __raw_writel(0x40, asrc_vrt_base_addr + ASRC_ASRIER_REG); + spin_unlock_irqrestore(&data_lock, lock_flags); + return; +} + +EXPORT_SYMBOL(asrc_start_conv); + +void asrc_stop_conv(enum asrc_pair_index index) +{ + int reg; + unsigned long lock_flags; + spin_lock_irqsave(&data_lock, lock_flags); + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCTR_REG); + reg &= ~(1 << (1 + index)); + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + if ((reg & 0x0E) == 0) + clk_disable(mxc_asrc_data->asrc_audio_clk); + spin_unlock_irqrestore(&data_lock, lock_flags); + return; +} + +EXPORT_SYMBOL(asrc_stop_conv); + +/*! + * @brief asrc interrupt handler + */ +static irqreturn_t asrc_isr(int irq, void *dev_id) +{ + unsigned long status; + int reg = 0x40; + + status = __raw_readl(asrc_vrt_base_addr + ASRC_ASRSTR_REG); + if (g_asrc_data->asrc_pair[ASRC_PAIR_A].active == 1) { + if (status & ASRC_ASRSTR_ATQOL) + g_asrc_data->asrc_pair[ASRC_PAIR_A].overload_error |= + ASRC_TASK_Q_OVERLOAD; + if (status & ASRC_ASRSTR_AOOLA) + g_asrc_data->asrc_pair[ASRC_PAIR_A].overload_error |= + ASRC_OUTPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AIOLA) + g_asrc_data->asrc_pair[ASRC_PAIR_A].overload_error |= + ASRC_INPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AODOA) + g_asrc_data->asrc_pair[ASRC_PAIR_A].overload_error |= + ASRC_OUTPUT_BUFFER_OVERFLOW; + if (status & ASRC_ASRSTR_AIDUA) + g_asrc_data->asrc_pair[ASRC_PAIR_A].overload_error |= + ASRC_INPUT_BUFFER_UNDERRUN; + } else if (g_asrc_data->asrc_pair[ASRC_PAIR_B].active == 1) { + if (status & ASRC_ASRSTR_ATQOL) + g_asrc_data->asrc_pair[ASRC_PAIR_B].overload_error |= + ASRC_TASK_Q_OVERLOAD; + if (status & ASRC_ASRSTR_AOOLB) + g_asrc_data->asrc_pair[ASRC_PAIR_B].overload_error |= + ASRC_OUTPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AIOLB) + g_asrc_data->asrc_pair[ASRC_PAIR_B].overload_error |= + ASRC_INPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AODOB) + g_asrc_data->asrc_pair[ASRC_PAIR_B].overload_error |= + ASRC_OUTPUT_BUFFER_OVERFLOW; + if (status & ASRC_ASRSTR_AIDUB) + g_asrc_data->asrc_pair[ASRC_PAIR_B].overload_error |= + ASRC_INPUT_BUFFER_UNDERRUN; + } else if (g_asrc_data->asrc_pair[ASRC_PAIR_C].active == 1) { + if (status & ASRC_ASRSTR_ATQOL) + g_asrc_data->asrc_pair[ASRC_PAIR_C].overload_error |= + ASRC_TASK_Q_OVERLOAD; + if (status & ASRC_ASRSTR_AOOLC) + g_asrc_data->asrc_pair[ASRC_PAIR_C].overload_error |= + ASRC_OUTPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AIOLC) + g_asrc_data->asrc_pair[ASRC_PAIR_C].overload_error |= + ASRC_INPUT_TASK_OVERLOAD; + if (status & ASRC_ASRSTR_AODOC) + g_asrc_data->asrc_pair[ASRC_PAIR_C].overload_error |= + ASRC_OUTPUT_BUFFER_OVERFLOW; + if (status & ASRC_ASRSTR_AIDUC) + g_asrc_data->asrc_pair[ASRC_PAIR_C].overload_error |= + ASRC_INPUT_BUFFER_UNDERRUN; + } + + /* try to clean the overload error */ + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRSTR_REG); + + return IRQ_HANDLED; +} + +void asrc_get_status(struct asrc_status_flags *flags) +{ + unsigned long lock_flags; + enum asrc_pair_index index; + + spin_lock_irqsave(&data_lock, lock_flags); + index = flags->index; + flags->overload_error = g_asrc_data->asrc_pair[index].overload_error; + + spin_unlock_irqrestore(&data_lock, lock_flags); + return; +} + +EXPORT_SYMBOL(asrc_get_status); + +static int mxc_init_asrc(void) +{ + /* Halt ASRC internal FP when input FIFO needs data for pair A, B, C */ + __raw_writel(0x0001, asrc_vrt_base_addr + ASRC_ASRCTR_REG); + + /* Enable overflow interrupt */ + __raw_writel(0x00, asrc_vrt_base_addr + ASRC_ASRIER_REG); + + /* Default 6: 2: 2 channel assignment */ + __raw_writel((0x06 << mxc_asrc_data->channel_bits * + 2) | (0x02 << mxc_asrc_data->channel_bits) | 0x02, + asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + + /* Parameter Registers recommended settings */ + __raw_writel(0x7fffff, asrc_vrt_base_addr + ASRC_ASRPM1_REG); + __raw_writel(0x255555, asrc_vrt_base_addr + ASRC_ASRPM2_REG); + __raw_writel(0xff7280, asrc_vrt_base_addr + ASRC_ASRPM3_REG); + __raw_writel(0xff7280, asrc_vrt_base_addr + ASRC_ASRPM4_REG); + __raw_writel(0xff7280, asrc_vrt_base_addr + ASRC_ASRPM5_REG); + + __raw_writel(0x001f00, asrc_vrt_base_addr + ASRC_ASRTFR1); + + /* Set the processing clock for 76KHz, 133M */ + __raw_writel(0x06D6, asrc_vrt_base_addr + ASRC_ASR76K_REG); + + /* Set the processing clock for 56KHz, 133M */ + __raw_writel(0x0947, asrc_vrt_base_addr + ASRC_ASR56K_REG); + + if (request_irq(MXC_INT_ASRC, asrc_isr, 0, "asrc", NULL)) + return -1; + + return 0; +} + +static int asrc_get_output_buffer_size(int input_buffer_size, + int input_sample_rate, + int output_sample_rate) +{ + int i = 0; + int outbuffer_size = 0; + int outsample = output_sample_rate; + while (outsample >= input_sample_rate) { + ++i; + outsample -= input_sample_rate; + } + outbuffer_size = i * input_buffer_size; + i = 1; + while (((input_buffer_size >> i) > 2) && (outsample != 0)) { + if (((outsample << 1) - input_sample_rate) >= 0) { + outsample = (outsample << 1) - input_sample_rate; + outbuffer_size += (input_buffer_size >> i); + } else { + outsample = outsample << 1; + } + i++; + } + outbuffer_size = (outbuffer_size >> 3) << 3; + return outbuffer_size; +} + +static void asrc_input_dma_callback(void *data, int error, unsigned int count) +{ + struct asrc_pair_params *params; + struct dma_block *block; + mxc_dma_requestbuf_t dma_request; + unsigned long lock_flags; + + params = data; + + spin_lock_irqsave(&input_int_lock, lock_flags); + params->input_queue_empty--; + if (!list_empty(¶ms->input_queue)) { + block = + list_entry(params->input_queue.next, + struct dma_block, queue); + dma_request.src_addr = (dma_addr_t) block->dma_paddr; + dma_request.dst_addr = + (ASRC_BASE_ADDR + ASRC_ASRDIA_REG + (params->index << 3)); + dma_request.num_of_bytes = block->length; + mxc_dma_config(params->input_dma_channel, &dma_request, + 1, MXC_DMA_MODE_WRITE); + list_del(params->input_queue.next); + list_add_tail(&block->queue, ¶ms->input_done_queue); + params->input_queue_empty++; + } + params->input_counter++; + wake_up_interruptible(¶ms->input_wait_queue); + spin_unlock_irqrestore(&input_int_lock, lock_flags); + return; +} + +static void asrc_output_dma_callback(void *data, int error, unsigned int count) +{ + struct asrc_pair_params *params; + struct dma_block *block; + mxc_dma_requestbuf_t dma_request; + unsigned long lock_flags; + + params = data; + + spin_lock_irqsave(&output_int_lock, lock_flags); + params->output_queue_empty--; + + if (!list_empty(¶ms->output_queue)) { + block = + list_entry(params->output_queue.next, + struct dma_block, queue); + dma_request.src_addr = + (ASRC_BASE_ADDR + ASRC_ASRDOA_REG + (params->index << 3)); + dma_request.dst_addr = (dma_addr_t) block->dma_paddr; + dma_request.num_of_bytes = block->length; + mxc_dma_config(params->output_dma_channel, &dma_request, + 1, MXC_DMA_MODE_READ); + list_del(params->output_queue.next); + list_add_tail(&block->queue, ¶ms->output_done_queue); + params->output_queue_empty++; + } + params->output_counter++; + wake_up_interruptible(¶ms->output_wait_queue); + spin_unlock_irqrestore(&output_int_lock, lock_flags); + return; +} + +static void mxc_free_dma_buf(struct asrc_pair_params *params) +{ + int i; + for (i = 0; i < ASRC_DMA_BUFFER_NUM; i++) { + if (params->input_dma[i].dma_vaddr != NULL) { + dma_free_coherent(0, + params->input_buffer_size, + params->input_dma[i]. + dma_vaddr, + params->input_dma[i].dma_paddr); + params->input_dma[i].dma_vaddr = NULL; + } + if (params->output_dma[i].dma_vaddr != NULL) { + dma_free_coherent(0, + params->output_buffer_size, + params->output_dma[i]. + dma_vaddr, + params->output_dma[i].dma_paddr); + params->output_dma[i].dma_vaddr = NULL; + } + } + + return; +} + +static int mxc_allocate_dma_buf(struct asrc_pair_params *params) +{ + int i; + for (i = 0; i < ASRC_DMA_BUFFER_NUM; i++) { + params->input_dma[i].dma_vaddr = + dma_alloc_coherent(0, params->input_buffer_size, + ¶ms->input_dma[i].dma_paddr, + GFP_DMA | GFP_KERNEL); + if (params->input_dma[i].dma_vaddr == NULL) { + mxc_free_dma_buf(params); + pr_info("can't allocate buff\n"); + return -ENOBUFS; + } + } + for (i = 0; i < ASRC_DMA_BUFFER_NUM; i++) { + params->output_dma[i].dma_vaddr = + dma_alloc_coherent(0, + params->output_buffer_size, + ¶ms->output_dma[i].dma_paddr, + GFP_DMA | GFP_KERNEL); + if (params->output_dma[i].dma_vaddr == NULL) { + mxc_free_dma_buf(params); + return -ENOBUFS; + } + } + + return 0; +} + +/*! + * asrc interface - ioctl function + * + * @param inode struct inode * + * + * @param file struct file * + * + * @param cmd unsigned int + * + * @param arg unsigned long + * + * @return 0 success, ENODEV for invalid device instance, + * -1 for other errors. + */ +static int asrc_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int err = 0; + struct asrc_pair_params *params; + params = file->private_data; + + if (down_interruptible(¶ms->busy_lock)) + return -EBUSY; + switch (cmd) { + case ASRC_REQ_PAIR: + { + struct asrc_req req; + if (copy_from_user(&req, (void __user *)arg, + sizeof(struct asrc_req))) { + err = -EFAULT; + break; + } + err = asrc_req_pair(req.chn_num, &req.index); + if (err < 0) + break; + params->pair_hold = 1; + params->index = req.index; + if (copy_to_user + ((void __user *)arg, &req, sizeof(struct asrc_req))) + err = -EFAULT; + + break; + } + case ASRC_CONFIG_PAIR: + { + struct asrc_config config; + mxc_dma_device_t rx_id, tx_id; + char *rx_name, *tx_name; + int channel = -1; + if (copy_from_user + (&config, (void __user *)arg, + sizeof(struct asrc_config))) { + err = -EFAULT; + break; + } + err = asrc_config_pair(&config); + if (err < 0) + break; + params->output_buffer_size = + asrc_get_output_buffer_size(config. + dma_buffer_size, + config. + input_sample_rate, + config. + output_sample_rate); + params->input_buffer_size = config.dma_buffer_size; + if (config.buffer_num > ASRC_DMA_BUFFER_NUM) + params->buffer_num = ASRC_DMA_BUFFER_NUM; + else + params->buffer_num = config.buffer_num; + err = mxc_allocate_dma_buf(params); + if (err < 0) + break; + + /* TBD - need to update when new SDMA interface ready */ + if (config.pair == ASRC_PAIR_A) { + rx_id = MXC_DMA_ASRC_A_RX; + tx_id = MXC_DMA_ASRC_A_TX; + rx_name = asrc_pair_id[0]; + tx_name = asrc_pair_id[1]; + } else if (config.pair == ASRC_PAIR_B) { + rx_id = MXC_DMA_ASRC_B_RX; + tx_id = MXC_DMA_ASRC_B_TX; + rx_name = asrc_pair_id[2]; + tx_name = asrc_pair_id[3]; + } else { + rx_id = MXC_DMA_ASRC_C_RX; + tx_id = MXC_DMA_ASRC_C_TX; + rx_name = asrc_pair_id[4]; + tx_name = asrc_pair_id[5]; + } + channel = mxc_dma_request(rx_id, rx_name); + params->input_dma_channel = channel; + err = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + asrc_input_dma_callback, + (void *)params); + channel = mxc_dma_request(tx_id, tx_name); + params->output_dma_channel = channel; + err = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + asrc_output_dma_callback, + (void *)params); + /* TBD - need to update when new SDMA interface ready */ + params->input_queue_empty = 0; + params->output_queue_empty = 0; + INIT_LIST_HEAD(¶ms->input_queue); + INIT_LIST_HEAD(¶ms->input_done_queue); + INIT_LIST_HEAD(¶ms->output_queue); + INIT_LIST_HEAD(¶ms->output_done_queue); + init_waitqueue_head(¶ms->input_wait_queue); + init_waitqueue_head(¶ms->output_wait_queue); + + if (copy_to_user + ((void __user *)arg, &config, + sizeof(struct asrc_config))) + err = -EFAULT; + break; + } + case ASRC_QUERYBUF: + { + struct asrc_querybuf buffer; + if (copy_from_user + (&buffer, (void __user *)arg, + sizeof(struct asrc_querybuf))) { + err = -EFAULT; + break; + } + buffer.input_offset = + (unsigned long)params->input_dma[buffer. + buffer_index]. + dma_paddr; + buffer.input_length = params->input_buffer_size; + buffer.output_offset = + (unsigned long)params->output_dma[buffer. + buffer_index]. + dma_paddr; + buffer.output_length = params->output_buffer_size; + if (copy_to_user + ((void __user *)arg, &buffer, + sizeof(struct asrc_querybuf))) + err = -EFAULT; + break; + } + case ASRC_RELEASE_PAIR: + { + enum asrc_pair_index index; + if (copy_from_user + (&index, (void __user *)arg, + sizeof(enum asrc_pair_index))) { + err = -EFAULT; + break; + } + + mxc_dma_free(params->input_dma_channel); + mxc_dma_free(params->output_dma_channel); + mxc_free_dma_buf(params); + asrc_release_pair(index); + params->pair_hold = 0; + break; + } + case ASRC_Q_INBUF: + { + struct asrc_buffer buf; + struct dma_block *block; + mxc_dma_requestbuf_t dma_request; + unsigned long lock_flags; + if (copy_from_user + (&buf, (void __user *)arg, + sizeof(struct asrc_buffer))) { + err = -EFAULT; + break; + } + spin_lock_irqsave(&input_int_lock, lock_flags); + params->input_dma[buf.index].index = buf.index; + params->input_dma[buf.index].length = buf.length; + list_add_tail(¶ms->input_dma[buf.index]. + queue, ¶ms->input_queue); + if (params->asrc_active == 0 + || params->input_queue_empty == 0) { + block = + list_entry(params->input_queue.next, + struct dma_block, queue); + dma_request.src_addr = + (dma_addr_t) block->dma_paddr; + dma_request.dst_addr = + (ASRC_BASE_ADDR + ASRC_ASRDIA_REG + + (params->index << 3)); + dma_request.num_of_bytes = block->length; + mxc_dma_config(params-> + input_dma_channel, + &dma_request, 1, + MXC_DMA_MODE_WRITE); + params->input_queue_empty++; + list_del(params->input_queue.next); + list_add_tail(&block->queue, + ¶ms->input_done_queue); + } + + spin_unlock_irqrestore(&input_int_lock, lock_flags); + break; + } + case ASRC_DQ_INBUF:{ + struct asrc_buffer buf; + struct dma_block *block; + unsigned long lock_flags; + if (copy_from_user + (&buf, (void __user *)arg, + sizeof(struct asrc_buffer))) { + err = -EFAULT; + break; + } + /* if ASRC is inactive, nonsense to DQ buffer */ + if (params->asrc_active == 0) { + err = -EFAULT; + buf.buf_valid = ASRC_BUF_NA; + if (copy_to_user + ((void __user *)arg, &buf, + sizeof(struct asrc_buffer))) + err = -EFAULT; + break; + } + + if (!wait_event_interruptible_timeout + (params->input_wait_queue, + params->input_counter != 0, 10 * HZ)) { + pr_info + ("ASRC_DQ_INBUF timeout counter %x\n", + params->input_counter); + err = -ETIME; + break; + } else if (signal_pending(current)) { + pr_info("ASRC_DQ_INBUF interrupt received\n"); + err = -ERESTARTSYS; + break; + } + spin_lock_irqsave(&input_int_lock, lock_flags); + params->input_counter--; + block = + list_entry(params->input_done_queue.next, + struct dma_block, queue); + list_del(params->input_done_queue.next); + spin_unlock_irqrestore(&input_int_lock, lock_flags); + buf.index = block->index; + buf.length = block->length; + buf.buf_valid = ASRC_BUF_AV; + if (copy_to_user + ((void __user *)arg, &buf, + sizeof(struct asrc_buffer))) + err = -EFAULT; + + break; + } + case ASRC_Q_OUTBUF:{ + struct asrc_buffer buf; + struct dma_block *block; + mxc_dma_requestbuf_t dma_request; + unsigned long lock_flags; + if (copy_from_user + (&buf, (void __user *)arg, + sizeof(struct asrc_buffer))) { + err = -EFAULT; + break; + } + spin_lock_irqsave(&output_int_lock, lock_flags); + params->output_dma[buf.index].index = buf.index; + params->output_dma[buf.index].length = buf.length; + list_add_tail(¶ms->output_dma[buf.index]. + queue, ¶ms->output_queue); + if (params->asrc_active == 0 + || params->output_queue_empty == 0) { + block = + list_entry(params->output_queue. + next, struct dma_block, queue); + dma_request.src_addr = + (ASRC_BASE_ADDR + ASRC_ASRDOA_REG + + (params->index << 3)); + dma_request.dst_addr = + (dma_addr_t) block->dma_paddr; + dma_request.num_of_bytes = block->length; + mxc_dma_config(params-> + output_dma_channel, + &dma_request, 1, + MXC_DMA_MODE_READ); + list_del(params->output_queue.next); + list_add_tail(&block->queue, + ¶ms->output_done_queue); + params->output_queue_empty++; + } + + spin_unlock_irqrestore(&output_int_lock, lock_flags); + break; + } + case ASRC_DQ_OUTBUF:{ + struct asrc_buffer buf; + struct dma_block *block; + unsigned long lock_flags; + if (copy_from_user + (&buf, (void __user *)arg, + sizeof(struct asrc_buffer))) { + err = -EFAULT; + break; + } + /* if ASRC is inactive, nonsense to DQ buffer */ + if (params->asrc_active == 0) { + buf.buf_valid = ASRC_BUF_NA; + err = -EFAULT; + if (copy_to_user + ((void __user *)arg, &buf, + sizeof(struct asrc_buffer))) + err = -EFAULT; + break; + } + + if (!wait_event_interruptible_timeout + (params->output_wait_queue, + params->output_counter != 0, 10 * HZ)) { + pr_info + ("ASRC_DQ_OUTBUF timeout counter %x\n", + params->output_counter); + err = -ETIME; + break; + } else if (signal_pending(current)) { + pr_info("ASRC_DQ_INBUF interrupt received\n"); + err = -ERESTARTSYS; + break; + } + spin_lock_irqsave(&output_int_lock, lock_flags); + params->output_counter--; + block = + list_entry(params->output_done_queue.next, + struct dma_block, queue); + list_del(params->output_done_queue.next); + spin_unlock_irqrestore(&output_int_lock, lock_flags); + buf.index = block->index; + buf.length = block->length; + buf.buf_valid = ASRC_BUF_AV; + if (copy_to_user + ((void __user *)arg, &buf, + sizeof(struct asrc_buffer))) + err = -EFAULT; + + break; + } + case ASRC_START_CONV:{ + enum asrc_pair_index index; + unsigned long lock_flags; + if (copy_from_user + (&index, (void __user *)arg, + sizeof(enum asrc_pair_index))) { + err = -EFAULT; + break; + } + + spin_lock_irqsave(&input_int_lock, lock_flags); + if (params->input_queue_empty == 0) { + err = -EFAULT; + pr_info + ("ASRC_START_CONV - no block available\n"); + break; + } + spin_unlock_irqrestore(&input_int_lock, lock_flags); + params->asrc_active = 1; + + asrc_start_conv(index); + mxc_dma_enable(params->input_dma_channel); + mxc_dma_enable(params->output_dma_channel); + break; + } + case ASRC_STOP_CONV:{ + enum asrc_pair_index index; + if (copy_from_user + (&index, (void __user *)arg, + sizeof(enum asrc_pair_index))) { + err = -EFAULT; + break; + } + mxc_dma_disable(params->input_dma_channel); + mxc_dma_disable(params->output_dma_channel); + asrc_stop_conv(index); + params->asrc_active = 0; + break; + } + case ASRC_STATUS:{ + struct asrc_status_flags flags; + if (copy_from_user + (&flags, (void __user *)arg, + sizeof(struct asrc_status_flags))) { + err = -EFAULT; + break; + } + asrc_get_status(&flags); + if (copy_to_user + ((void __user *)arg, &flags, + sizeof(struct asrc_status_flags))) + err = -EFAULT; + break; + } + case ASRC_FLUSH:{ + /* flush input dma buffer */ + unsigned long lock_flags; + mxc_dma_device_t rx_id, tx_id; + char *rx_name, *tx_name; + int channel = -1; + spin_lock_irqsave(&input_int_lock, lock_flags); + while (!list_empty(¶ms->input_queue)) + list_del(params->input_queue.next); + while (!list_empty(¶ms->input_done_queue)) + list_del(params->input_done_queue.next); + params->input_counter = 0; + params->input_queue_empty = 0; + spin_unlock_irqrestore(&input_int_lock, lock_flags); + + /* flush output dma buffer */ + spin_lock_irqsave(&output_int_lock, lock_flags); + while (!list_empty(¶ms->output_queue)) + list_del(params->output_queue.next); + while (!list_empty(¶ms->output_done_queue)) + list_del(params->output_done_queue.next); + params->output_counter = 0; + params->output_queue_empty = 0; + spin_unlock_irqrestore(&output_int_lock, lock_flags); + + /* release DMA and request again */ + mxc_dma_free(params->input_dma_channel); + mxc_dma_free(params->output_dma_channel); + if (params->index == ASRC_PAIR_A) { + rx_id = MXC_DMA_ASRC_A_RX; + tx_id = MXC_DMA_ASRC_A_TX; + rx_name = asrc_pair_id[0]; + tx_name = asrc_pair_id[1]; + } else if (params->index == ASRC_PAIR_B) { + rx_id = MXC_DMA_ASRC_B_RX; + tx_id = MXC_DMA_ASRC_B_TX; + rx_name = asrc_pair_id[2]; + tx_name = asrc_pair_id[3]; + } else { + rx_id = MXC_DMA_ASRC_C_RX; + tx_id = MXC_DMA_ASRC_C_TX; + rx_name = asrc_pair_id[4]; + tx_name = asrc_pair_id[5]; + } + channel = mxc_dma_request(rx_id, rx_name); + params->input_dma_channel = channel; + err = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + asrc_input_dma_callback, + (void *)params); + channel = mxc_dma_request(tx_id, tx_name); + params->output_dma_channel = channel; + err = mxc_dma_callback_set(channel, (mxc_dma_callback_t) + asrc_output_dma_callback, + (void *)params); + + break; + } + default: + break; + } + + up(¶ms->busy_lock); + return err; +} + +/*! + * asrc interface - open function + * + * @param inode structure inode * + * + * @param file structure file * + * + * @return status 0 success, ENODEV invalid device instance, + * ENOBUFS failed to allocate buffer, ERESTARTSYS interrupted by user + */ +static int mxc_asrc_open(struct inode *inode, struct file *file) +{ + int err = 0; + struct asrc_pair_params *pair_params; + if (signal_pending(current)) + return -EINTR; + pair_params = kzalloc(sizeof(struct asrc_pair_params), GFP_KERNEL); + if (pair_params == NULL) { + pr_debug("Failed to allocate pair_params\n"); + err = -ENOBUFS; + } + + init_MUTEX(&pair_params->busy_lock); + file->private_data = pair_params; + return err; +} + +/*! + * asrc interface - close function + * + * @param inode struct inode * + * @param file structure file * + * + * @return status 0 Success, EINTR busy lock error, ENOBUFS remap_page error + */ +static int mxc_asrc_close(struct inode *inode, struct file *file) +{ + struct asrc_pair_params *pair_params; + pair_params = file->private_data; + if (pair_params->asrc_active == 1) { + mxc_dma_disable(pair_params->input_dma_channel); + mxc_dma_disable(pair_params->output_dma_channel); + asrc_stop_conv(pair_params->index); + wake_up_interruptible(&pair_params->input_wait_queue); + wake_up_interruptible(&pair_params->output_wait_queue); + } + if (pair_params->pair_hold == 1) { + mxc_dma_free(pair_params->input_dma_channel); + mxc_dma_free(pair_params->output_dma_channel); + mxc_free_dma_buf(pair_params); + asrc_release_pair(pair_params->index); + } + kfree(pair_params); + file->private_data = NULL; + return 0; +} + +/*! + * asrc interface - mmap function + * + * @param file structure file * + * + * @param vma structure vm_area_struct * + * + * @return status 0 Success, EINTR busy lock error, ENOBUFS remap_page error + */ +static int mxc_asrc_mmap(struct file *file, struct vm_area_struct *vma) +{ + unsigned long size; + int res = 0; + size = vma->vm_end - vma->vm_start; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) + return -ENOBUFS; + + vma->vm_flags &= ~VM_IO; + return res; +} + +static struct file_operations asrc_fops = { + .owner = THIS_MODULE, + .ioctl = asrc_ioctl, + .mmap = mxc_asrc_mmap, + .open = mxc_asrc_open, + .release = mxc_asrc_close, +}; + +static int asrc_read_proc_attr(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + unsigned long reg; + int len = 0; + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + + len += sprintf(page, "ANCA: %d\n", + (int)(reg & + (0xFFFFFFFF >> + (32 - mxc_asrc_data->channel_bits)))); + len += + sprintf(page + len, "ANCB: %d\n", + (int)((reg >> mxc_asrc_data-> + channel_bits) & (0xFFFFFFFF >> (32 - + mxc_asrc_data-> + channel_bits)))); + len += + sprintf(page + len, "ANCC: %d\n", + (int)((reg >> (mxc_asrc_data->channel_bits * 2)) & + (0xFFFFFFFF >> (32 - mxc_asrc_data->channel_bits)))); + + if (off > len) + return 0; + + *eof = (len <= count) ? 1 : 0; + *start = page + off; + + return min(count, len - (int)off); +} + +static int asrc_write_proc_attr(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + char buf[50]; + unsigned long reg; + int na, nb, nc; + int total; + if (count > 48) + return -EINVAL; + if (copy_from_user(buf, buffer, count)) { + pr_debug("Attr proc write, Failed to copy buffer from user\n"); + return -EFAULT; + } + + reg = __raw_readl(asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + sscanf(buf, "ANCA: %d\nANCB: %d\nANCC: %d", &na, &nb, &nc); + if (mxc_asrc_data->channel_bits > 3) + total = 10; + else + total = 5; + if ((na + nb + nc) != total) { + pr_info("Wrong ASRCNR settings\n"); + return -EFAULT; + } + reg = na | (nb << mxc_asrc_data-> + channel_bits) | (nc << (mxc_asrc_data->channel_bits * 2)); + + __raw_writel(reg, asrc_vrt_base_addr + ASRC_ASRCNCR_REG); + + return count; +} + +static void asrc_proc_create(void) +{ + struct proc_dir_entry *proc_attr; + proc_asrc = proc_mkdir(ASRC_PROC_PATH, NULL); + if (proc_asrc) { + proc_attr = create_proc_entry("ChSettings", + S_IFREG | S_IRUGO | + S_IWUSR, proc_asrc); + if (proc_attr) { + proc_attr->read_proc = asrc_read_proc_attr; + proc_attr->write_proc = asrc_write_proc_attr; + proc_attr->size = 48; + proc_attr->uid = proc_attr->gid = 0; + } else { + remove_proc_entry(ASRC_PROC_PATH, NULL); + pr_info("Failed to create proc attribute entry \n"); + } + } else { + pr_info("ASRC: Failed to create proc entry %s\n", + ASRC_PROC_PATH); + } +} + +/*! + * Entry point for the asrc device + * + * @param pdev Pionter to the registered platform device + * @return Error code indicating success or failure + */ +static int mxc_asrc_probe(struct platform_device *pdev) +{ + int err = 0; + struct resource *res; + struct device *temp_class; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENOENT; + + g_asrc_data = kzalloc(sizeof(struct asrc_data), GFP_KERNEL); + + if (g_asrc_data == NULL) { + pr_info("Failed to allocate g_asrc_data\n"); + return -ENOMEM; + } + + g_asrc_data->asrc_pair[0].chn_max = 2; + g_asrc_data->asrc_pair[1].chn_max = 2; + g_asrc_data->asrc_pair[2].chn_max = 6; + g_asrc_data->asrc_pair[0].overload_error = 0; + g_asrc_data->asrc_pair[1].overload_error = 0; + g_asrc_data->asrc_pair[2].overload_error = 0; + + asrc_major = register_chrdev(asrc_major, "mxc_asrc", &asrc_fops); + if (asrc_major < 0) { + pr_info("Unable to register asrc device\n"); + err = -EBUSY; + goto error; + } + + asrc_class = class_create(THIS_MODULE, "mxc_asrc"); + if (IS_ERR(asrc_class)) { + err = PTR_ERR(asrc_class); + goto err_out_chrdev; + } + + temp_class = device_create(asrc_class, NULL, MKDEV(asrc_major, 0), + NULL, "mxc_asrc"); + if (IS_ERR(temp_class)) { + err = PTR_ERR(temp_class); + goto err_out_class; + } + + asrc_vrt_base_addr = + (unsigned long)ioremap(res->start, res->end - res->start + 1); + + mxc_asrc_data = + (struct mxc_asrc_platform_data *)pdev->dev.platform_data; + clk_enable(mxc_asrc_data->asrc_core_clk); + + asrc_proc_create(); + err = mxc_init_asrc(); + if (err < 0) + goto err_out_class; + + goto out; + + err_out_class: + clk_disable(mxc_asrc_data->asrc_core_clk); + device_destroy(asrc_class, MKDEV(asrc_major, 0)); + class_destroy(asrc_class); + err_out_chrdev: + unregister_chrdev(asrc_major, "mxc_asrc"); + error: + kfree(g_asrc_data); + out: + pr_info("mxc_asrc registered\n"); + return err; +} + +/*! + * Exit asrc device + * + * @param pdev Pionter to the registered platform device + * @return Error code indicating success or failure + */ +static int mxc_asrc_remove(struct platform_device *pdev) +{ + free_irq(MXC_INT_ASRC, NULL); + kfree(g_asrc_data); + clk_disable(mxc_asrc_data->asrc_core_clk); + mxc_asrc_data = NULL; + iounmap((unsigned long __iomem *)asrc_vrt_base_addr); + remove_proc_entry("ChSettings", proc_asrc); + remove_proc_entry(ASRC_PROC_PATH, NULL); + device_destroy(asrc_class, MKDEV(asrc_major, 0)); + class_destroy(asrc_class); + unregister_chrdev(asrc_major, "mxc_asrc"); + return 0; +} + +/*! mxc asrc driver definition + * + */ +static struct platform_driver mxc_asrc_driver = { + .driver = { + .name = "mxc_asrc", + }, + .probe = mxc_asrc_probe, + .remove = mxc_asrc_remove, +}; + +/*! + * Register asrc driver + * + */ +static __init int asrc_init(void) +{ + int ret; + ret = platform_driver_register(&mxc_asrc_driver); + return ret; +} + +/*! + * Exit and free the asrc data + * + */ static void __exit asrc_exit(void) +{ + platform_driver_unregister(&mxc_asrc_driver); + return; +} + +module_init(asrc_init); +module_exit(asrc_exit); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Asynchronous Sample Rate Converter"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/dam/dam.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/dam/dam.c @@ -0,0 +1,427 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dam.c + * @brief This is the brief documentation for this dam.c file. + * + * This file contains the implementation of the DAM driver main services + * + * @ingroup DAM + */ + +#include +#include +#include +#include +#include +#include "dam.h" + +/*! + * This include to define bool type, false and true definitions. + */ +#include + +#define ModifyRegister32(a,b,c) (c = ( ( (c)&(~(a)) ) | (b) )) + +#define DAM_VIRT_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR) + +#ifndef _reg_DAM_PTCR1 +#define _reg_DAM_PTCR1 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x00))) +#endif + +#ifndef _reg_DAM_PDCR1 +#define _reg_DAM_PDCR1 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x04))) +#endif + +#ifndef _reg_DAM_PTCR2 +#define _reg_DAM_PTCR2 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x08))) +#endif + +#ifndef _reg_DAM_PDCR2 +#define _reg_DAM_PDCR2 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x0C))) +#endif + +#ifndef _reg_DAM_PTCR3 +#define _reg_DAM_PTCR3 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x10))) +#endif + +#ifndef _reg_DAM_PDCR3 +#define _reg_DAM_PDCR3 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x14))) +#endif + +#ifndef _reg_DAM_PTCR4 +#define _reg_DAM_PTCR4 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x18))) +#endif + +#ifndef _reg_DAM_PDCR4 +#define _reg_DAM_PDCR4 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x1C))) +#endif + +#ifndef _reg_DAM_PTCR5 +#define _reg_DAM_PTCR5 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x20))) +#endif + +#ifndef _reg_DAM_PDCR5 +#define _reg_DAM_PDCR5 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x24))) +#endif + +#ifndef _reg_DAM_PTCR6 +#define _reg_DAM_PTCR6 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x28))) +#endif + +#ifndef _reg_DAM_PDCR6 +#define _reg_DAM_PDCR6 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x2C))) +#endif + +#ifndef _reg_DAM_PTCR7 +#define _reg_DAM_PTCR7 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x30))) +#endif + +#ifndef _reg_DAM_PDCR7 +#define _reg_DAM_PDCR7 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x34))) +#endif + +#ifndef _reg_DAM_CNMCR +#define _reg_DAM_CNMCR (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x38))) +#endif + +#ifndef _reg_DAM_PTCR +#define _reg_DAM_PTCR(a) (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + a*8))) +#endif + +#ifndef _reg_DAM_PDCR +#define _reg_DAM_PDCR(a) (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 4 + a*8))) +#endif + +/*! + * PTCR Registers bit shift definitions + */ +#define dam_synchronous_mode_shift 11 +#define dam_receive_clock_select_shift 12 +#define dam_receive_clock_direction_shift 16 +#define dam_receive_frame_sync_select_shift 17 +#define dam_receive_frame_sync_direction_shift 21 +#define dam_transmit_clock_select_shift 22 +#define dam_transmit_clock_direction_shift 26 +#define dam_transmit_frame_sync_select_shift 27 +#define dam_transmit_frame_sync_direction_shift 31 +#define dam_selection_mask 0xF + +/*! + * HPDCR Register bit shift definitions + */ +#define dam_internal_network_mode_shift 0 +#define dam_mode_shift 8 +#define dam_transmit_receive_switch_shift 12 +#define dam_receive_data_select_shift 13 + +/*! + * HPDCR Register bit masq definitions + */ +#define dam_mode_masq 0x03 +#define dam_internal_network_mode_mask 0xFF + +/*! + * CNMCR Register bit shift definitions + */ +#define dam_ce_bus_port_cntlow_shift 0 +#define dam_ce_bus_port_cnthigh_shift 8 +#define dam_ce_bus_port_clkpol_shift 16 +#define dam_ce_bus_port_fspol_shift 17 +#define dam_ce_bus_port_enable_shift 18 + +#define DAM_NAME "dam" + +EXPORT_SYMBOL(dam_select_mode); +EXPORT_SYMBOL(dam_select_RxClk_direction); +EXPORT_SYMBOL(dam_select_RxClk_source); +EXPORT_SYMBOL(dam_select_RxD_source); +EXPORT_SYMBOL(dam_select_RxFS_direction); +EXPORT_SYMBOL(dam_select_RxFS_source); +EXPORT_SYMBOL(dam_select_TxClk_direction); +EXPORT_SYMBOL(dam_select_TxClk_source); +EXPORT_SYMBOL(dam_select_TxFS_direction); +EXPORT_SYMBOL(dam_select_TxFS_source); +EXPORT_SYMBOL(dam_set_internal_network_mode_mask); +EXPORT_SYMBOL(dam_set_synchronous); +EXPORT_SYMBOL(dam_switch_Tx_Rx); +EXPORT_SYMBOL(dam_reset_register); + +/*! + * This function selects the operation mode of the port. + * + * @param port the DAM port to configure + * @param the_mode the operation mode of the port + * + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_select_mode(dam_port port, dam_mode the_mode) +{ + int result; + result = 0; + + ModifyRegister32(dam_mode_masq << dam_mode_shift, + the_mode << dam_mode_shift, _reg_DAM_PDCR(port)); + + return result; +} + +/*! + * This function controls Receive clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx clock signal direction + */ +void dam_select_RxClk_direction(dam_port port, signal_direction direction) +{ + ModifyRegister32(1 << dam_receive_clock_direction_shift, + direction << dam_receive_clock_direction_shift, + _reg_DAM_PTCR(port)); +} + +/*! + * This function controls Receive clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_RxClk_source(dam_port p_config, + bool from_RxClk, dam_port p_source) +{ + ModifyRegister32(dam_selection_mask << dam_receive_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_receive_clock_select_shift, + _reg_DAM_PTCR(p_config)); +} + +/*! + * This function selects the source port for the RxD data. + * + * @param p_config the DAM port to configure + * @param p_source the source port + */ +void dam_select_RxD_source(dam_port p_config, dam_port p_source) +{ + ModifyRegister32(dam_selection_mask << dam_receive_data_select_shift, + p_source << dam_receive_data_select_shift, + _reg_DAM_PDCR(p_config)); +} + +/*! + * This function controls Receive Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx Frame Sync signal direction + */ +void dam_select_RxFS_direction(dam_port port, signal_direction direction) +{ + ModifyRegister32(1 << dam_receive_frame_sync_direction_shift, + direction << dam_receive_frame_sync_direction_shift, + _reg_DAM_PTCR(port)); +} + +/*! + * This function controls Receive Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_RxFS_source(dam_port p_config, + bool from_RxFS, dam_port p_source) +{ + ModifyRegister32(dam_selection_mask << + dam_receive_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_receive_frame_sync_select_shift, + _reg_DAM_PTCR(p_config)); +} + +/*! + * This function controls Transmit clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx clock signal direction + */ +void dam_select_TxClk_direction(dam_port port, signal_direction direction) +{ + ModifyRegister32(1 << dam_transmit_clock_direction_shift, + direction << dam_transmit_clock_direction_shift, + _reg_DAM_PTCR(port)); +} + +/*! + * This function controls Transmit clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_TxClk_source(dam_port p_config, + bool from_RxClk, dam_port p_source) +{ + ModifyRegister32(dam_selection_mask << dam_transmit_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_transmit_clock_select_shift, + _reg_DAM_PTCR(p_config)); +} + +/*! + * This function controls Transmit Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx Frame Sync signal direction + */ +void dam_select_TxFS_direction(dam_port port, signal_direction direction) +{ + ModifyRegister32(1 << dam_transmit_frame_sync_direction_shift, + direction << dam_transmit_frame_sync_direction_shift, + _reg_DAM_PTCR(port)); +} + +/*! + * This function controls Transmit Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_TxFS_source(dam_port p_config, + bool from_RxFS, dam_port p_source) +{ + ModifyRegister32(dam_selection_mask << + dam_transmit_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_transmit_frame_sync_select_shift, + _reg_DAM_PTCR(p_config)); +} + +/*! + * This function sets a bit mask that selects the port from which of the RxD + * signals are to be ANDed together for internal network mode. + * Bit 6 represents RxD from Port7 and bit0 represents RxD from Port1. + * 1 excludes RxDn from ANDing. 0 includes RxDn for ANDing. + * + * @param port the DAM port to configure + * @param bit_mask the bit mask + * + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_set_internal_network_mode_mask(dam_port port, unsigned char bit_mask) +{ + int result; + result = 0; + + ModifyRegister32(dam_internal_network_mode_mask << + dam_internal_network_mode_shift, + bit_mask << dam_internal_network_mode_shift, + _reg_DAM_PDCR(port)); + + return result; +} + +/*! + * This function controls whether or not the port is in synchronous mode. + * When the synchronous mode is selected, the receive and the transmit sections + * use common clock and frame sync signals. + * When the synchronous mode is not selected, separate clock and frame sync + * signals are used for the transmit and the receive sections. + * The defaut value is the synchronous mode selected. + * + * @param port the DAM port to configure + * @param synchronous the state to assign + */ +void dam_set_synchronous(dam_port port, bool synchronous) +{ + ModifyRegister32(1 << dam_synchronous_mode_shift, + synchronous << dam_synchronous_mode_shift, + _reg_DAM_PTCR(port)); +} + +/*! + * This function swaps the transmit and receive signals from (Da-TxD, Db-RxD) + * to (Da-RxD, Db-TxD). + * This default signal configuration is Da-TxD, Db-RxD. + * + * @param port the DAM port to configure + * @param value the switch state + */ +void dam_switch_Tx_Rx(dam_port port, bool value) +{ + ModifyRegister32(1 << dam_transmit_receive_switch_shift, + value << dam_transmit_receive_switch_shift, + _reg_DAM_PDCR(port)); +} + +/*! + * This function resets the two registers of the selected port. + * + * @param port the DAM port to reset + */ +void dam_reset_register(dam_port port) +{ + ModifyRegister32(0xFFFFFFFF, 0x00000000, _reg_DAM_PTCR(port)); + ModifyRegister32(0xFFFFFFFF, 0x00000000, _reg_DAM_PDCR(port)); +} + +/*! + * This function implements the init function of the DAM device. + * This function is called when the module is loaded. + * + * @return This function returns 0. + */ +static int __init dam_init(void) +{ + return 0; +} + +/*! + * This function implements the exit function of the SPI device. + * This function is called when the module is unloaded. + * + */ +static void __exit dam_exit(void) +{ +} + +module_init(dam_init); +module_exit(dam_exit); + +MODULE_DESCRIPTION("DAM char device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/dam/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/dam/Kconfig @@ -0,0 +1,13 @@ +# +# DAM API configuration +# + +menu "MXC Digital Audio Multiplexer support" + +config MXC_DAM + tristate "DAM support" + depends on ARCH_MXC + ---help--- + Say Y to get the Digital Audio Multiplexer services API available on MXC platform. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/dam/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/dam/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for the kernel Digital Audio MUX (DAM) device driver. +# + +ifeq ($(CONFIG_ARCH_MX27),y) + obj-$(CONFIG_MXC_DAM) += dam_v1.o +else + obj-$(CONFIG_MXC_DAM) += dam.o +endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/dam/dam.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/dam/dam.h @@ -0,0 +1,258 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @defgroup DAM Digital Audio Multiplexer (AUDMUX) Driver + */ + + /*! + * @file dam.h + * @brief This is the brief documentation for this dam.h file. + * + * This header file contains DAM driver functions prototypes. + * + * @ingroup DAM + */ + +#ifndef __MXC_DAM_H__ +#define __MXC_DAM_H__ + +/*! + * This enumeration describes the Digital Audio Multiplexer mode. + */ +typedef enum { + + /*! + * Normal mode + */ + normal_mode = 0, + + /*! + * Internal network mode + */ + internal_network_mode = 1, + + /*! + * CE bus network mode + */ + CE_bus_network_mode = 2 +} dam_mode; + +/*! + * This enumeration describes the port. + */ +typedef enum { + + /*! + * The port 1 + */ + port_1 = 0, + + /*! + * The port 2 + */ + port_2 = 1, + + /*! + * The port 3 + */ + port_3 = 2, + + /*! + * The port 4 + */ + port_4 = 3, + + /*! + * The port 5 + */ + port_5 = 4, + + /*! + * The port 6 + */ + port_6 = 5, + + /*! + * The port 7 + */ + port_7 = 6 +} dam_port; + +/*! + * This enumeration describes the signal direction. + */ +typedef enum { + + /*! + * Signal In + */ + signal_in = 0, + + /*! + * Signal Out + */ + signal_out = 1 +} signal_direction; + +/*! + * Test purpose definition + */ +#define TEST_DAM 1 + +#ifdef TEST_DAM + +#define DAM_IOCTL 0x55 +#define DAM_CONFIG_SSI1_MC13783 _IOWR(DAM_IOCTL, 1, int) +#define DAM_CONFIG_SSI2_MC13783 _IOWR(DAM_IOCTL, 2, int) +#define DAM_CONFIG_SSI_NETWORK_MODE_MC13783 _IOWR(DAM_IOCTL, 3, int) +#endif + +/*! + * This function selects the operation mode of the port. + * + * @param port the DAM port to configure + * @param the_mode the operation mode of the port + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_select_mode(dam_port port, dam_mode the_mode); + +/*! + * This function controls Receive clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx clock signal direction + */ +void dam_select_RxClk_direction(dam_port port, signal_direction direction); + +/*! + * This function controls Receive clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_RxClk_source(dam_port p_config, bool from_RxClk, + dam_port p_source); + +/*! + * This function selects the source port for the RxD data. + * + * @param p_config the DAM port to configure + * @param p_source the source port + */ +void dam_select_RxD_source(dam_port p_config, dam_port p_source); + +/*! + * This function controls Receive Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx Frame Sync signal direction + */ +void dam_select_RxFS_direction(dam_port port, signal_direction direction); + +/*! + * This function controls Receive Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_RxFS_source(dam_port p_config, bool from_RxFS, + dam_port p_source); + +/*! + * This function controls Transmit clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx clock signal direction + */ +void dam_select_TxClk_direction(dam_port port, signal_direction direction); + +/*! + * This function controls Transmit clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_TxClk_source(dam_port p_config, bool from_RxClk, + dam_port p_source); + +/*! + * This function controls Transmit Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx Frame Sync signal direction + */ +void dam_select_TxFS_direction(dam_port port, signal_direction direction); + +/*! + * This function controls Transmit Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_TxFS_source(dam_port p_config, bool from_RxFS, + dam_port p_source); + +/*! + * This function sets a bit mask that selects the port from which of + * the RxD signals are to be ANDed together for internal network mode. + * Bit 6 represents RxD from Port7 and bit0 represents RxD from Port1. + * 1 excludes RxDn from ANDing. 0 includes RxDn for ANDing. + * + * @param port the DAM port to configure + * @param bit_mask the bit mask + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_set_internal_network_mode_mask(dam_port port, unsigned char bit_mask); + +/*! + * This function controls whether or not the port is in synchronous mode. + * When the synchronous mode is selected, the receive and the transmit sections + * use common clock and frame sync signals. + * When the synchronous mode is not selected, separate clock and frame sync + * signals are used for the transmit and the receive sections. + * The defaut value is the synchronous mode selected. + * + * @param port the DAM port to configure + * @param synchronous the state to assign + */ +void dam_set_synchronous(dam_port port, bool synchronous); + +/*! + * This function swaps the transmit and receive signals from (Da-TxD, Db-RxD) to + * (Da-RxD, Db-TxD). + * This default signal configuration is Da-TxD, Db-RxD. + * + * @param port the DAM port to configure + * @param value the switch state + */ +void dam_switch_Tx_Rx(dam_port port, bool value); + +/*! + * This function resets the two registers of the selected port. + * + * @param port the DAM port to reset + */ +void dam_reset_register(dam_port port); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/dam/dam_v1.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/dam/dam_v1.c @@ -0,0 +1,617 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dam_v1.c + * @brief This is the brief documentation for this dam_v1.c file. + * + * This file contains the implementation of the DAM driver main services + * + * @ingroup DAM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "dam.h" + +/*! + * This include to define bool type, false and true definitions. + */ +#include + +#define DAM_VIRT_BASE_ADDR IO_ADDRESS(AUDMUX_BASE_ADDR) + +#define ModifyRegister32(a,b,c) do{\ + __raw_writel( ((__raw_readl(c)) & (~(a))) | (b),(c) );\ +}while(0) + +#ifndef _reg_DAM_HPCR1 +#define _reg_DAM_HPCR1 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x00))) +#endif + +#ifndef _reg_DAM_HPCR2 +#define _reg_DAM_HPCR2 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x04))) +#endif + +#ifndef _reg_DAM_HPCR3 +#define _reg_DAM_HPCR3 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x08))) +#endif + +#ifndef _reg_DAM_PPCR1 +#define _reg_DAM_PPCR1 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x10))) +#endif + +#ifndef _reg_DAM_PPCR2 +#define _reg_DAM_PPCR2 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x14))) +#endif + +#ifndef _reg_DAM_PPCR3 +#define _reg_DAM_PPCR3 (*((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x1c))) +#endif + +#ifndef _reg_DAM_HPCR +#define _reg_DAM_HPCR(a) ((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + (a)*4)) +#endif + +#ifndef _reg_DAM_PPCR +#define _reg_DAM_PPCR(a) ((volatile unsigned long *) \ + (DAM_VIRT_BASE_ADDR + 0x0c + (0x04 << (a-3)) )) +#endif + +/*! + * HPCR/PPCR Registers bit shift definitions + */ +#define dam_transmit_frame_sync_direction_shift 31 +#define dam_transmit_clock_direction_shift 30 +#define dam_transmit_frame_sync_select_shift 26 +#define dam_transmit_clock_select_shift 26 +#define dam_receive_frame_sync_direction_shift 25 +#define dam_receive_clock_direction_shift 24 +#define dam_receive_clock_select_shift 20 +#define dam_receive_frame_sync_select_shift 20 + +#define dam_receive_data_select_shift 13 +#define dam_synchronous_mode_shift 12 + +#define dam_transmit_receive_switch_shift 10 + +#define dam_mode_shift 8 +#define dam_internal_network_mode_shift 0 + +/*! + * HPCR/PPCR Register bit masq definitions + */ +//#define dam_selection_mask 0xF +#define dam_fs_selection_mask 0xF +#define dam_clk_selection_mask 0xF +#define dam_dat_selection_mask 0x7 +//#define dam_mode_masq 0x03 +#define dam_internal_network_mode_mask 0xFF + +/*! + * HPCR/PPCR Register reset value definitions + */ +#define dam_hpcr_default_value 0x00001000 +#define dam_ppcr_default_value 0x00001000 + +#define DAM_NAME "dam" +static struct class *mxc_dam_class; + +EXPORT_SYMBOL(dam_select_mode); +EXPORT_SYMBOL(dam_select_RxClk_direction); +EXPORT_SYMBOL(dam_select_RxClk_source); +EXPORT_SYMBOL(dam_select_RxD_source); +EXPORT_SYMBOL(dam_select_RxFS_direction); +EXPORT_SYMBOL(dam_select_RxFS_source); +EXPORT_SYMBOL(dam_select_TxClk_direction); +EXPORT_SYMBOL(dam_select_TxClk_source); +EXPORT_SYMBOL(dam_select_TxFS_direction); +EXPORT_SYMBOL(dam_select_TxFS_source); +EXPORT_SYMBOL(dam_set_internal_network_mode_mask); +EXPORT_SYMBOL(dam_set_synchronous); +EXPORT_SYMBOL(dam_switch_Tx_Rx); +EXPORT_SYMBOL(dam_reset_register); + +/*! + * DAM major + */ +#ifdef TEST_DAM +static int major_dam; + +typedef struct _mxc_cfg { + int reg; + int val; +} mxc_cfg; + +#endif + +/*! + * This function selects the operation mode of the port. + * + * @param port the DAM port to configure + * @param the_mode the operation mode of the port + * + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_select_mode(dam_port port, dam_mode the_mode) +{ + int result; + result = 0; + + if (port >= 3) + the_mode = normal_mode; + ModifyRegister32(1 << dam_mode_shift, + the_mode << dam_mode_shift, _reg_DAM_HPCR(port)); + + return result; +} + +/*! + * This function controls Receive clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx clock signal direction + */ +void dam_select_RxClk_direction(dam_port port, signal_direction direction) +{ + if (port < 3) { + ModifyRegister32(1 << dam_receive_clock_direction_shift, + direction << dam_receive_clock_direction_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_receive_clock_direction_shift, + direction << dam_receive_clock_direction_shift, + _reg_DAM_PPCR(port)); + } + return; +} + +/*! + * This function controls Receive clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_RxClk_source(dam_port p_config, + bool from_RxClk, dam_port p_source) +{ + if (p_config < 3) { + ModifyRegister32(dam_clk_selection_mask << + dam_receive_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_receive_clock_select_shift, + _reg_DAM_HPCR(p_config)); + } else { + ModifyRegister32(dam_clk_selection_mask << + dam_receive_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_receive_clock_select_shift, + _reg_DAM_PPCR(p_config)); + } + return; +} + +/*! + * This function selects the source port for the RxD data. + * + * @param p_config the DAM port to configure + * @param p_source the source port + */ +void dam_select_RxD_source(dam_port p_config, dam_port p_source) +{ + if (p_config < 3) { + ModifyRegister32(dam_dat_selection_mask << + dam_receive_data_select_shift, + p_source << dam_receive_data_select_shift, + _reg_DAM_HPCR(p_config)); + } else { + ModifyRegister32(dam_dat_selection_mask << + dam_receive_data_select_shift, + p_source << dam_receive_data_select_shift, + _reg_DAM_PPCR(p_config)); + } + return; +} + +/*! + * This function controls Receive Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Rx Frame Sync signal direction + */ +void dam_select_RxFS_direction(dam_port port, signal_direction direction) +{ + if (port < 3) { + ModifyRegister32(1 << dam_receive_frame_sync_direction_shift, + direction << + dam_receive_frame_sync_direction_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_receive_frame_sync_direction_shift, + direction << + dam_receive_frame_sync_direction_shift, + _reg_DAM_PPCR(port)); + } + return; +} + +/*! + * This function controls Receive Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_RxFS_source(dam_port p_config, + bool from_RxFS, dam_port p_source) +{ + if (p_config < 3) { + ModifyRegister32(dam_fs_selection_mask << + dam_receive_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_receive_frame_sync_select_shift, + _reg_DAM_HPCR(p_config)); + } else { + ModifyRegister32(dam_fs_selection_mask << + dam_receive_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_receive_frame_sync_select_shift, + _reg_DAM_PPCR(p_config)); + } + return; +} + +/*! + * This function controls Transmit clock signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx clock signal direction + */ +void dam_select_TxClk_direction(dam_port port, signal_direction direction) +{ + if (port < 3) { + ModifyRegister32(1 << dam_transmit_clock_direction_shift, + direction << + dam_transmit_clock_direction_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_transmit_clock_direction_shift, + direction << + dam_transmit_clock_direction_shift, + _reg_DAM_PPCR(port)); + } + return; +} + +/*! + * This function controls Transmit clock signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxClk the signal comes from RxClk or TxClk of + * the source port + * @param p_source the source port + */ +void dam_select_TxClk_source(dam_port p_config, + bool from_RxClk, dam_port p_source) +{ + if (p_config < 3) { + ModifyRegister32(dam_clk_selection_mask << + dam_transmit_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_transmit_clock_select_shift, + _reg_DAM_HPCR(p_config)); + } else { + ModifyRegister32(dam_clk_selection_mask << + dam_transmit_clock_select_shift, + ((from_RxClk << 3) | p_source) << + dam_transmit_clock_select_shift, + _reg_DAM_PPCR(p_config)); + } + return; +} + +/*! + * This function controls Transmit Frame Sync signal direction for the port. + * + * @param port the DAM port to configure + * @param direction the Tx Frame Sync signal direction + */ +void dam_select_TxFS_direction(dam_port port, signal_direction direction) +{ + if (port < 3) { + ModifyRegister32(1 << dam_transmit_frame_sync_direction_shift, + direction << + dam_transmit_frame_sync_direction_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_transmit_frame_sync_direction_shift, + direction << + dam_transmit_frame_sync_direction_shift, + _reg_DAM_HPCR(port)); + } + return; +} + +/*! + * This function controls Transmit Frame Sync signal source for the port. + * + * @param p_config the DAM port to configure + * @param from_RxFS the signal comes from RxFS or TxFS of + * the source port + * @param p_source the source port + */ +void dam_select_TxFS_source(dam_port p_config, + bool from_RxFS, dam_port p_source) +{ + if (p_config < 3) { + ModifyRegister32(dam_fs_selection_mask << + dam_transmit_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_transmit_frame_sync_select_shift, + _reg_DAM_HPCR(p_config)); + } else { + ModifyRegister32(dam_fs_selection_mask << + dam_transmit_frame_sync_select_shift, + ((from_RxFS << 3) | p_source) << + dam_transmit_frame_sync_select_shift, + _reg_DAM_PPCR(p_config)); + } + return; +} + +/*! + * This function sets a bit mask that selects the port from which of the RxD + * signals are to be ANDed together for internal network mode. + * Bit 6 represents RxD from Port7 and bit0 represents RxD from Port1. + * 1 excludes RxDn from ANDing. 0 includes RxDn for ANDing. + * + * @param port the DAM port to configure + * @param bit_mask the bit mask + * + * @return This function returns the result of the operation + * (0 if successful, -1 otherwise). + */ +int dam_set_internal_network_mode_mask(dam_port port, unsigned char bit_mask) +{ + int result; + result = 0; + + ModifyRegister32(dam_internal_network_mode_mask << + dam_internal_network_mode_shift, + bit_mask << dam_internal_network_mode_shift, + _reg_DAM_HPCR(port)); + return result; +} + +/*! + * This function controls whether or not the port is in synchronous mode. + * When the synchronous mode is selected, the receive and the transmit sections + * use common clock and frame sync signals. + * When the synchronous mode is not selected, separate clock and frame sync + * signals are used for the transmit and the receive sections. + * The defaut value is the synchronous mode selected. + * + * @param port the DAM port to configure + * @param synchronous the state to assign + */ +void dam_set_synchronous(dam_port port, bool synchronous) +{ + if (port < 3) { + ModifyRegister32(1 << dam_synchronous_mode_shift, + synchronous << dam_synchronous_mode_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_synchronous_mode_shift, + synchronous << dam_synchronous_mode_shift, + _reg_DAM_PPCR(port)); + } + return; +} + +/*! + * This function swaps the transmit and receive signals from (Da-TxD, Db-RxD) + * to (Da-RxD, Db-TxD). + * This default signal configuration is Da-TxD, Db-RxD. + * + * @param port the DAM port to configure + * @param value the switch state + */ +void dam_switch_Tx_Rx(dam_port port, bool value) +{ + if (port < 3) { + ModifyRegister32(1 << dam_transmit_receive_switch_shift, + value << dam_transmit_receive_switch_shift, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(1 << dam_transmit_receive_switch_shift, + value << dam_transmit_receive_switch_shift, + _reg_DAM_PPCR(port)); + } + return; +} + +/*! + * This function resets the two registers of the selected port. + * + * @param port the DAM port to reset + */ +void dam_reset_register(dam_port port) +{ + if (port < 3) { + ModifyRegister32(0xFFFFFFFF, dam_hpcr_default_value, + _reg_DAM_HPCR(port)); + } else { + ModifyRegister32(0xFFFFFFFF, dam_ppcr_default_value, + _reg_DAM_PPCR(port)); + } + return; +} + +#ifdef TEST_DAM + +/*! + * This function implements IOCTL controls on a DAM device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter :\n + * DAM_CONFIG_SSI1:\n + * data from port 1 to port 4, clock and FS from port 1 (SSI1)\n + * DAM_CONFIG_SSI2:\n + * data from port 2 to port 5, clock and FS from port 2 (SSI2)\n + * DAM_CONFIG_SSI_NETWORK_MODE:\n + * network mode for mix digital with data from port 1 to port4,\n + * data from port 2 to port 4, clock and FS from port 1 (SSI1) + * + * @return This function returns 0 if successful. + */ +static int dam_ioctl(struct inode *inode, + struct file *file, unsigned int cmd, unsigned long arg) +{ + return 0; +} + +/*! + * This function implements the open method on a DAM device. + * + * @param inode pointer on the node + * @param file pointer on the file + * + * @return This function returns 0. + */ +static int dam_open(struct inode *inode, struct file *file) +{ + /* DBG_PRINTK("ssi : dam_open()\n"); */ + return 0; +} + +/*! + * This function implements the release method on a DAM device. + * + * @param inode pointer on the node + * @param file pointer on the file + * + * @return This function returns 0. + */ +static int dam_free(struct inode *inode, struct file *file) +{ + /* DBG_PRINTK("ssi : dam_free()\n"); */ + return 0; +} + +/*! + * This structure defines file operations for a DAM device. + */ +static struct file_operations dam_fops = { + + /*! + * the owner + */ + .owner = THIS_MODULE, + + /*! + * the ioctl operation + */ + .ioctl = dam_ioctl, + + /*! + * the open operation + */ + .open = dam_open, + + /*! + * the release operation + */ + .release = dam_free, +}; + +#endif + +/*! + * This function implements the init function of the DAM device. + * This function is called when the module is loaded. + * + * @return This function returns 0. + */ +static int __init dam_init(void) +{ +#ifdef TEST_DAM + struct device *temp_class; + printk(KERN_DEBUG "dam : dam_init(void) \n"); + + major_dam = register_chrdev(0, DAM_NAME, &dam_fops); + if (major_dam < 0) { + printk(KERN_WARNING "Unable to get a major for dam"); + return major_dam; + } + + mxc_dam_class = class_create(THIS_MODULE, DAM_NAME); + if (IS_ERR(mxc_dam_class)) { + goto err_out; + } + + temp_class = device_create(mxc_dam_class, NULL, + MKDEV(major_dam, 0), NULL, DAM_NAME); + if (IS_ERR(temp_class)) { + goto err_out; + } +#endif + return 0; + + err_out: + printk(KERN_ERR "Error creating dam class device.\n"); + device_destroy(mxc_dam_class, MKDEV(major_dam, 0)); + class_destroy(mxc_dam_class); + unregister_chrdev(major_dam, DAM_NAME); + return -1; +} + +/*! + * This function implements the exit function of the SPI device. + * This function is called when the module is unloaded. + * + */ +static void __exit dam_exit(void) +{ +#ifdef TEST_DAM + device_destroy(mxc_dam_class, MKDEV(major_dam, 0)); + class_destroy(mxc_dam_class); + unregister_chrdev(major_dam, DAM_NAME); + printk(KERN_DEBUG "dam : successfully unloaded\n"); +#endif +} + +module_init(dam_init); +module_exit(dam_exit); + +MODULE_DESCRIPTION("DAM char device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_common.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_common.c @@ -0,0 +1,1910 @@ +/* + * Copyright 2005-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_common.c + * + * @brief This file contains the IPU driver common API functions. + * + * @ingroup IPU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +/* + * This type definition is used to define a node in the GPIO interrupt queue for + * registered interrupts for GPIO pins. Each node contains the GPIO signal number + * associated with the ISR and the actual ISR function pointer. + */ +struct ipu_irq_node { + irqreturn_t(*handler) (int, void *); /*!< the ISR */ + const char *name; /*!< device associated with the interrupt */ + void *dev_id; /*!< some unique information for the ISR */ + __u32 flags; /*!< not used */ +}; + +/* Globals */ +struct clk *g_ipu_clk; +struct clk *g_ipu_csi_clk; +static struct clk *dfm_clk; +int g_ipu_irq[2]; +int g_ipu_hw_rev; +bool g_sec_chan_en[21]; +uint32_t g_channel_init_mask; +DEFINE_SPINLOCK(ipu_lock); +struct device *g_ipu_dev; + +static struct ipu_irq_node ipu_irq_list[IPU_IRQ_COUNT]; +static const char driver_name[] = "mxc_ipu"; + +static uint32_t g_ipu_config = 0; +static uint32_t g_channel_init_mask_backup = 0; +static bool g_csi_used = false; + +/* Static functions */ +static irqreturn_t ipu_irq_handler(int irq, void *desc); +static void _ipu_pf_init(ipu_channel_params_t * params); +static void _ipu_pf_uninit(void); + +inline static uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type) +{ + return ((type == IPU_INPUT_BUFFER) ? ((uint32_t) ch & 0xFF) : + ((type == IPU_OUTPUT_BUFFER) ? (((uint32_t) ch >> 8) & 0xFF) + : (((uint32_t) ch >> 16) & 0xFF))); +}; + +inline static uint32_t DMAParamAddr(uint32_t dma_ch) +{ + return (0x10000 | (dma_ch << 4)); +}; + +/*! + * This function is called by the driver framework to initialize the IPU + * hardware. + * + * @param dev The device structure for the IPU passed in by the framework. + * + * @return This function returns 0 on success or negative error code on error + */ +static +int ipu_probe(struct platform_device *pdev) +{ +// struct platform_device *pdev = to_platform_device(dev); + struct mxc_ipu_config *ipu_conf = pdev->dev.platform_data; + + spin_lock_init(&ipu_lock); + + g_ipu_dev = &pdev->dev; + g_ipu_hw_rev = ipu_conf->rev; + + /* Register IPU interrupts */ + g_ipu_irq[0] = platform_get_irq(pdev, 0); + if (g_ipu_irq[0] < 0) + return -EINVAL; + + if (request_irq(g_ipu_irq[0], ipu_irq_handler, 0, driver_name, 0) != 0) { + dev_err(g_ipu_dev, "request SYNC interrupt failed\n"); + return -EBUSY; + } + /* Some platforms have 2 IPU interrupts */ + g_ipu_irq[1] = platform_get_irq(pdev, 1); + if (g_ipu_irq[1] >= 0) { + if (request_irq + (g_ipu_irq[1], ipu_irq_handler, 0, driver_name, 0) != 0) { + dev_err(g_ipu_dev, "request ERR interrupt failed\n"); + return -EBUSY; + } + } + + /* Enable IPU and CSI clocks */ + /* Get IPU clock freq */ + g_ipu_clk = clk_get(&pdev->dev, "ipu_clk"); + dev_dbg(g_ipu_dev, "ipu_clk = %lu\n", clk_get_rate(g_ipu_clk)); + + g_ipu_csi_clk = clk_get(&pdev->dev, "csi_clk"); + + dfm_clk = clk_get(NULL, "dfm_clk"); + + clk_enable(g_ipu_clk); + + /* resetting the CONF register of the IPU */ + __raw_writel(0x00000000, IPU_CONF); + + __raw_writel(0x00100010L, DI_HSP_CLK_PER); + + /* Set SDC refresh channels as high priority */ + __raw_writel(0x0000C000L, IDMAC_CHA_PRI); + + /* Set to max back to back burst requests */ + __raw_writel(0x00000000L, IDMAC_CONF); + + register_ipu_device(); + + return 0; +} + +/*! + * This function is called to initialize a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID to initalize. + * + * @param params Input parameter containing union of channel initialization + * parameters. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t * params) +{ + uint32_t ipu_conf; + uint32_t reg; + unsigned long lock_flags; + + dev_dbg(g_ipu_dev, "init channel = %d\n", IPU_CHAN_ID(channel)); + + if ((channel != MEM_SDC_BG) && (channel != MEM_SDC_FG) && + (channel != MEM_ROT_ENC_MEM) && (channel != MEM_ROT_VF_MEM) && + (channel != MEM_ROT_PP_MEM) && (channel != CSI_MEM) + && (params == NULL)) { + return -EINVAL; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + ipu_conf = __raw_readl(IPU_CONF); + if (ipu_conf == 0) { + clk_enable(g_ipu_clk); + } + + if (g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) { + dev_err(g_ipu_dev, "Warning: channel already initialized %d\n", + IPU_CHAN_ID(channel)); + } + + switch (channel) { + case CSI_PRP_VF_MEM: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg & ~FS_VF_IN_VALID, IPU_FS_PROC_FLOW); + + if (params->mem_prp_vf_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + + _ipu_ic_init_prpvf(params, true); + break; + case CSI_PRP_VF_ADC: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg | (FS_DEST_ADC << FS_PRPVF_DEST_SEL_OFFSET), + IPU_FS_PROC_FLOW); + + _ipu_adc_init_channel(CSI_PRP_VF_ADC, + params->csi_prp_vf_adc.disp, + WriteTemplateNonSeq, + params->csi_prp_vf_adc.out_left, + params->csi_prp_vf_adc.out_top); + + _ipu_ic_init_prpvf(params, true); + break; + case MEM_PRP_VF_MEM: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg | FS_VF_IN_VALID, IPU_FS_PROC_FLOW); + + if (params->mem_prp_vf_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + + _ipu_ic_init_prpvf(params, false); + break; + case MEM_ROT_VF_MEM: + _ipu_ic_init_rotate_vf(params); + break; + case CSI_PRP_ENC_MEM: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg & ~FS_ENC_IN_VALID, IPU_FS_PROC_FLOW); + _ipu_ic_init_prpenc(params, true); + break; + case MEM_PRP_ENC_MEM: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg | FS_ENC_IN_VALID, IPU_FS_PROC_FLOW); + _ipu_ic_init_prpenc(params, false); + break; + case MEM_ROT_ENC_MEM: + _ipu_ic_init_rotate_enc(params); + break; + case MEM_PP_ADC: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg | (FS_DEST_ADC << FS_PP_DEST_SEL_OFFSET), + IPU_FS_PROC_FLOW); + + _ipu_adc_init_channel(MEM_PP_ADC, params->mem_pp_adc.disp, + WriteTemplateNonSeq, + params->mem_pp_adc.out_left, + params->mem_pp_adc.out_top); + + if (params->mem_pp_adc.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + + _ipu_ic_init_pp(params); + break; + case MEM_PP_MEM: + if (params->mem_pp_mem.graphics_combine_en) + g_sec_chan_en[IPU_CHAN_ID(channel)] = true; + + _ipu_ic_init_pp(params); + break; + case MEM_ROT_PP_MEM: + _ipu_ic_init_rotate_pp(params); + break; + case CSI_MEM: + _ipu_ic_init_csi(params); + break; + + case MEM_PF_Y_MEM: + case MEM_PF_U_MEM: + case MEM_PF_V_MEM: + /* Enable PF block */ + _ipu_pf_init(params); + break; + + case MEM_SDC_BG: + break; + case MEM_SDC_FG: + break; + case ADC_SYS1: + _ipu_adc_init_channel(ADC_SYS1, params->adc_sys1.disp, + params->adc_sys1.ch_mode, + params->adc_sys1.out_left, + params->adc_sys1.out_top); + break; + case ADC_SYS2: + _ipu_adc_init_channel(ADC_SYS2, params->adc_sys2.disp, + params->adc_sys2.ch_mode, + params->adc_sys2.out_left, + params->adc_sys2.out_top); + break; + default: + dev_err(g_ipu_dev, "Missing channel initialization\n"); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EINVAL; + } + + /* Enable IPU sub module */ + g_channel_init_mask |= 1L << IPU_CHAN_ID(channel); + + if (g_channel_init_mask & 0x00000066L) { /*CSI */ + ipu_conf |= IPU_CONF_CSI_EN; + if (cpu_is_mx31() || cpu_is_mx32()) { + g_csi_used = true; + } + } + if (g_channel_init_mask & 0x00001FFFL) { /*IC */ + ipu_conf |= IPU_CONF_IC_EN; + } + if (g_channel_init_mask & 0x00000A10L) { /*ROT */ + ipu_conf |= IPU_CONF_ROT_EN; + } + if (g_channel_init_mask & 0x0001C000L) { /*SDC */ + ipu_conf |= IPU_CONF_SDC_EN | IPU_CONF_DI_EN; + } + if (g_channel_init_mask & 0x00061140L) { /*ADC */ + ipu_conf |= IPU_CONF_ADC_EN | IPU_CONF_DI_EN; + } + if (g_channel_init_mask & 0x00380000L) { /*PF */ + ipu_conf |= IPU_CONF_PF_EN; + } + __raw_writel(ipu_conf, IPU_CONF); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +/*! + * This function is called to uninitialize a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID to uninitalize. + */ +void ipu_uninit_channel(ipu_channel_t channel) +{ + unsigned long lock_flags; + uint32_t reg; + uint32_t dma, mask = 0; + uint32_t ipu_conf; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if ((g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) == 0) { + dev_err(g_ipu_dev, "Channel already uninitialized %d\n", + IPU_CHAN_ID(channel)); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return; + } + + /* Make sure channel is disabled */ + /* Get input and output dma channels */ + dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + if (dma != IDMA_CHAN_INVALID) + mask |= 1UL << dma; + dma = channel_2_dma(channel, IPU_INPUT_BUFFER); + if (dma != IDMA_CHAN_INVALID) + mask |= 1UL << dma; + /* Get secondary input dma channel */ + if (g_sec_chan_en[IPU_CHAN_ID(channel)]) { + dma = channel_2_dma(channel, IPU_SEC_INPUT_BUFFER); + if (dma != IDMA_CHAN_INVALID) { + mask |= 1UL << dma; + } + } + if (mask & __raw_readl(IDMAC_CHA_EN)) { + dev_err(g_ipu_dev, + "Channel %d is not disabled, disable first\n", + IPU_CHAN_ID(channel)); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return; + } + + /* Reset the double buffer */ + reg = __raw_readl(IPU_CHA_DB_MODE_SEL); + __raw_writel(reg & ~mask, IPU_CHA_DB_MODE_SEL); + + g_sec_chan_en[IPU_CHAN_ID(channel)] = false; + + switch (channel) { + case CSI_MEM: + _ipu_ic_uninit_csi(); + break; + case CSI_PRP_VF_ADC: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg & ~FS_PRPVF_DEST_SEL_MASK, IPU_FS_PROC_FLOW); + + _ipu_adc_uninit_channel(CSI_PRP_VF_ADC); + + /* Fall thru */ + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_MEM: + _ipu_ic_uninit_prpvf(); + break; + case MEM_PRP_VF_ADC: + break; + case MEM_ROT_VF_MEM: + _ipu_ic_uninit_rotate_vf(); + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + _ipu_ic_uninit_prpenc(); + break; + case MEM_ROT_ENC_MEM: + _ipu_ic_uninit_rotate_enc(); + break; + case MEM_PP_ADC: + reg = __raw_readl(IPU_FS_PROC_FLOW); + __raw_writel(reg & ~FS_PP_DEST_SEL_MASK, IPU_FS_PROC_FLOW); + + _ipu_adc_uninit_channel(MEM_PP_ADC); + + /* Fall thru */ + case MEM_PP_MEM: + _ipu_ic_uninit_pp(); + break; + case MEM_ROT_PP_MEM: + _ipu_ic_uninit_rotate_pp(); + break; + + case MEM_PF_Y_MEM: + _ipu_pf_uninit(); + break; + case MEM_PF_U_MEM: + case MEM_PF_V_MEM: + break; + + case MEM_SDC_BG: + break; + case MEM_SDC_FG: + break; + case ADC_SYS1: + _ipu_adc_uninit_channel(ADC_SYS1); + break; + case ADC_SYS2: + _ipu_adc_uninit_channel(ADC_SYS2); + break; + case MEM_SDC_MASK: + case CHAN_NONE: + break; + } + + g_channel_init_mask &= ~(1L << IPU_CHAN_ID(channel)); + + ipu_conf = __raw_readl(IPU_CONF); + if ((g_channel_init_mask & 0x00000066L) == 0) { /*CSI */ + ipu_conf &= ~IPU_CONF_CSI_EN; + } + if ((g_channel_init_mask & 0x00001FFFL) == 0) { /*IC */ + ipu_conf &= ~IPU_CONF_IC_EN; + } + if ((g_channel_init_mask & 0x00000A10L) == 0) { /*ROT */ + ipu_conf &= ~IPU_CONF_ROT_EN; + } + if ((g_channel_init_mask & 0x0001C000L) == 0) { /*SDC */ + ipu_conf &= ~IPU_CONF_SDC_EN; + } + if ((g_channel_init_mask & 0x00061140L) == 0) { /*ADC */ + ipu_conf &= ~IPU_CONF_ADC_EN; + } + if ((g_channel_init_mask & 0x0007D140L) == 0) { /*DI */ + ipu_conf &= ~IPU_CONF_DI_EN; + } + if ((g_channel_init_mask & 0x00380000L) == 0) { /*PF */ + ipu_conf &= ~IPU_CONF_PF_EN; + } + __raw_writel(ipu_conf, IPU_CONF); + if (ipu_conf == 0) { + clk_disable(g_ipu_clk); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * This function is called to initialize a buffer for logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param pixel_fmt Input parameter for pixel format of buffer. Pixel + * format is a FOURCC ASCII code. + * + * @param width Input parameter for width of buffer in pixels. + * + * @param height Input parameter for height of buffer in pixels. + * + * @param stride Input parameter for stride length of buffer + * in pixels. + * + * @param rot_mode Input parameter for rotation setting of buffer. + * A rotation setting other than \b IPU_ROTATE_VERT_FLIP + * should only be used for input buffers of rotation + * channels. + * + * @param phyaddr_0 Input parameter buffer 0 physical address. + * + * @param phyaddr_1 Input parameter buffer 1 physical address. + * Setting this to a value other than NULL enables + * double buffering mode. + * + * @param u private u offset for additional cropping, + * zero if not used. + * + * @param v private v offset for additional cropping, + * zero if not used. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + ipu_rotate_mode_t rot_mode, + dma_addr_t phyaddr_0, dma_addr_t phyaddr_1, + uint32_t u, uint32_t v) +{ + uint32_t params[10]; + unsigned long lock_flags; + uint32_t reg; + uint32_t dma_chan; + + dma_chan = channel_2_dma(channel, type); + + if (stride < width * bytes_per_pixel(pixel_fmt)) + stride = width * bytes_per_pixel(pixel_fmt); + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + if (stride % 4) { + dev_err(g_ipu_dev, + "Stride must be 32-bit aligned, stride = %d\n", stride); + return -EINVAL; + } + /* IC channels' width must be multiple of 8 pixels */ + if ((dma_chan <= 13) && (width % 8)) { + dev_err(g_ipu_dev, "width must be 8 pixel multiple\n"); + return -EINVAL; + } + /* Build parameter memory data for DMA channel */ + _ipu_ch_param_set_size(params, pixel_fmt, width, height, stride, u, v); + _ipu_ch_param_set_buffer(params, phyaddr_0, phyaddr_1); + _ipu_ch_param_set_rotation(params, rot_mode); + /* Some channels (rotation) have restriction on burst length */ + if ((dma_chan == 10) || (dma_chan == 11) || (dma_chan == 13)) { + _ipu_ch_param_set_burst_size(params, 8); + } else if (dma_chan == 24) { /* PF QP channel */ + _ipu_ch_param_set_burst_size(params, 4); + } else if (dma_chan == 25) { /* PF H264 BS channel */ + _ipu_ch_param_set_burst_size(params, 16); + } else if (((dma_chan == 14) || (dma_chan == 15)) && + pixel_fmt == IPU_PIX_FMT_RGB565) { + _ipu_ch_param_set_burst_size(params, 16); + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + _ipu_write_param_mem(DMAParamAddr(dma_chan), params, 10); + + reg = __raw_readl(IPU_CHA_DB_MODE_SEL); + if (phyaddr_1) { + reg |= 1UL << dma_chan; + } else { + reg &= ~(1UL << dma_chan); + } + __raw_writel(reg, IPU_CHA_DB_MODE_SEL); + + /* Reset to buffer 0 */ + __raw_writel(1UL << dma_chan, IPU_CHA_CUR_BUF); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +/*! + * This function is called to update the physical address of a buffer for + * a logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param bufNum Input parameter for which buffer number to update. + * 0 or 1 are the only valid values. + * + * @param phyaddr Input parameter buffer physical address. + * + * @return This function returns 0 on success or negative error code on + * fail. This function will fail if the buffer is set to ready. + */ +int32_t ipu_update_channel_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum, dma_addr_t phyaddr) +{ + uint32_t reg; + unsigned long lock_flags; + uint32_t dma_chan = channel_2_dma(channel, type); + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (bufNum == 0) { + reg = __raw_readl(IPU_CHA_BUF0_RDY); + if (reg & (1UL << dma_chan)) { + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EACCES; + } + __raw_writel(DMAParamAddr(dma_chan) + 0x0008UL, IPU_IMA_ADDR); + __raw_writel(phyaddr, IPU_IMA_DATA); + } else { + reg = __raw_readl(IPU_CHA_BUF1_RDY); + if (reg & (1UL << dma_chan)) { + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EACCES; + } + __raw_writel(DMAParamAddr(dma_chan) + 0x0009UL, IPU_IMA_ADDR); + __raw_writel(phyaddr, IPU_IMA_DATA); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + dev_dbg(g_ipu_dev, "IPU: update IDMA ch %d buf %d = 0x%08X\n", + dma_chan, bufNum, phyaddr); + return 0; +} + +/*! + * This function is called to initialize a buffer for logical IPU channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param pixel_fmt Input parameter for pixel format of buffer. + * Pixel format is a FOURCC ASCII code. + * + * @param width Input parameter for width of buffer in pixels. + * + * @param height Input parameter for height of buffer in pixels. + * + * @param stride Input parameter for stride length of buffer + * in pixels. + * + * @param u predefined private u offset for additional cropping, + * zero if not used. + * + * @param v predefined private v offset for additional cropping, + * zero if not used. + * + * @param vertical_offset vertical offset for Y coordinate + * in the existed frame + * + * + * @param horizontal_offset horizontal offset for X coordinate + * in the existed frame + * + * + * @return Returns 0 on success or negative error code on fail + * This function will fail if any buffer is set to ready. + */ + +int32_t ipu_update_channel_offset(ipu_channel_t channel, ipu_buffer_t type, + uint32_t pixel_fmt, + uint16_t width, uint16_t height, + uint32_t stride, + uint32_t u, uint32_t v, + uint32_t vertical_offset, uint32_t horizontal_offset) +{ + uint32_t reg; + int ret = 0; + unsigned long lock_flags; + uint32_t dma_chan = channel_2_dma(channel, type); + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + ret = -EACCES; + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return ret; +} +EXPORT_SYMBOL(ipu_update_channel_offset); + +/*! + * This function is called to set a channel's buffer as ready. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to initialize. + * + * @param bufNum Input parameter for which buffer number set to + * ready state. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_select_buffer(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum) +{ + uint32_t dma_chan = channel_2_dma(channel, type); + + if (dma_chan == IDMA_CHAN_INVALID) + return -EINVAL; + + if (bufNum == 0) { + /*Mark buffer 0 as ready. */ + __raw_writel(1UL << dma_chan, IPU_CHA_BUF0_RDY); + } else { + /*Mark buffer 1 as ready. */ + __raw_writel(1UL << dma_chan, IPU_CHA_BUF1_RDY); + } + return 0; +} + +/*! + * This function links 2 channels together for automatic frame + * synchronization. The output of the source channel is linked to the input of + * the destination channel. + * + * @param src_ch Input parameter for the logical channel ID of + * the source channel. + * + * @param dest_ch Input parameter for the logical channel ID of + * the destination channel. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_link_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch) +{ + unsigned long lock_flags; + uint32_t out_dma; + uint32_t in_dma; + bool isProc; + uint32_t value; + uint32_t mask; + uint32_t offset; + uint32_t fs_proc_flow; + uint32_t fs_disp_flow; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + fs_proc_flow = __raw_readl(IPU_FS_PROC_FLOW); + fs_disp_flow = __raw_readl(IPU_FS_DISP_FLOW); + + out_dma = (1UL << channel_2_dma(src_ch, IPU_OUTPUT_BUFFER)); + in_dma = (1UL << channel_2_dma(dest_ch, IPU_INPUT_BUFFER)); + + /* PROCESS THE OUTPUT DMA CH */ + switch (out_dma) { + /*VF-> */ + case IDMA_IC_1: + pr_debug("Link VF->"); + isProc = true; + mask = FS_PRPVF_DEST_SEL_MASK; + offset = FS_PRPVF_DEST_SEL_OFFSET; + value = (in_dma == IDMA_IC_11) ? FS_DEST_ROT : /*->VF_ROT */ + (in_dma == IDMA_ADC_SYS1_WR) ? FS_DEST_ADC1 : /* ->ADC1 */ + (in_dma == IDMA_ADC_SYS2_WR) ? FS_DEST_ADC2 : /* ->ADC2 */ + (in_dma == IDMA_SDC_BG) ? FS_DEST_SDC_BG : /*->SDC_BG */ + (in_dma == IDMA_SDC_FG) ? FS_DEST_SDC_FG : /*->SDC_FG */ + (in_dma == IDMA_ADC_SYS1_WR) ? FS_DEST_ADC1 : /*->ADC1 */ + /* ->ADCDirect */ + 0; + break; + + /*VF_ROT-> */ + case IDMA_IC_9: + pr_debug("Link VF_ROT->"); + isProc = true; + mask = FS_PRPVF_ROT_DEST_SEL_MASK; + offset = FS_PRPVF_ROT_DEST_SEL_OFFSET; + value = (in_dma == IDMA_ADC_SYS1_WR) ? FS_DEST_ADC1 : /*->ADC1 */ + (in_dma == IDMA_ADC_SYS2_WR) ? FS_DEST_ADC2 : /* ->ADC2 */ + (in_dma == IDMA_SDC_BG) ? FS_DEST_SDC_BG : /*->SDC_BG */ + (in_dma == IDMA_SDC_FG) ? FS_DEST_SDC_FG : /*->SDC_FG */ + 0; + break; + + /*ENC-> */ + case IDMA_IC_0: + pr_debug("Link ENC->"); + isProc = true; + mask = 0; + offset = 0; + value = (in_dma == IDMA_IC_10) ? FS_PRPENC_DEST_SEL : /*->ENC_ROT */ + 0; + break; + + /*PP-> */ + case IDMA_IC_2: + pr_debug("Link PP->"); + isProc = true; + mask = FS_PP_DEST_SEL_MASK; + offset = FS_PP_DEST_SEL_OFFSET; + value = (in_dma == IDMA_IC_13) ? FS_DEST_ROT : /*->PP_ROT */ + (in_dma == IDMA_ADC_SYS1_WR) ? FS_DEST_ADC1 : /* ->ADC1 */ + (in_dma == IDMA_ADC_SYS2_WR) ? FS_DEST_ADC2 : /* ->ADC2 */ + (in_dma == IDMA_SDC_BG) ? FS_DEST_SDC_BG : /*->SDC_BG */ + (in_dma == IDMA_SDC_FG) ? FS_DEST_SDC_FG : /*->SDC_FG */ + /* ->ADCDirect */ + 0; + break; + + /*PP_ROT-> */ + case IDMA_IC_12: + pr_debug("Link PP_ROT->"); + isProc = true; + mask = FS_PP_ROT_DEST_SEL_MASK; + offset = FS_PP_ROT_DEST_SEL_OFFSET; + value = (in_dma == IDMA_IC_5) ? FS_DEST_ROT : /*->PP */ + (in_dma == IDMA_ADC_SYS1_WR) ? FS_DEST_ADC1 : /* ->ADC1 */ + (in_dma == IDMA_ADC_SYS2_WR) ? FS_DEST_ADC2 : /* ->ADC2 */ + (in_dma == IDMA_SDC_BG) ? FS_DEST_SDC_BG : /*->SDC_BG */ + (in_dma == IDMA_SDC_FG) ? FS_DEST_SDC_FG : /*->SDC_FG */ + 0; + break; + + /*PF-> */ + case IDMA_PF_Y_OUT: + case IDMA_PF_U_OUT: + case IDMA_PF_V_OUT: + pr_debug("Link PF->"); + isProc = true; + mask = FS_PF_DEST_SEL_MASK; + offset = FS_PF_DEST_SEL_OFFSET; + value = (in_dma == IDMA_IC_5) ? FS_PF_DEST_PP : + (in_dma == IDMA_IC_13) ? FS_PF_DEST_ROT : 0; + break; + + /* Invalid Chainings: ENC_ROT-> */ + default: + pr_debug("Link Invalid->"); + value = 0; + break; + + } + + if (value) { + if (isProc) { + fs_proc_flow &= ~mask; + fs_proc_flow |= (value << offset); + } else { + fs_disp_flow &= ~mask; + fs_disp_flow |= (value << offset); + } + } else { + dev_err(g_ipu_dev, "Invalid channel chaining %d -> %d\n", + out_dma, in_dma); + return -EINVAL; + } + + /* PROCESS THE INPUT DMA CH */ + switch (in_dma) { + /* ->VF_ROT */ + case IDMA_IC_11: + pr_debug("VF_ROT\n"); + isProc = true; + mask = 0; + offset = 0; + value = (out_dma == IDMA_IC_1) ? FS_PRPVF_ROT_SRC_SEL : /*VF-> */ + 0; + break; + + /* ->ENC_ROT */ + case IDMA_IC_10: + pr_debug("ENC_ROT\n"); + isProc = true; + mask = 0; + offset = 0; + value = (out_dma == IDMA_IC_0) ? FS_PRPENC_ROT_SRC_SEL : /*ENC-> */ + 0; + break; + + /* ->PP */ + case IDMA_IC_5: + pr_debug("PP\n"); + isProc = true; + mask = FS_PP_SRC_SEL_MASK; + offset = FS_PP_SRC_SEL_OFFSET; + value = (out_dma == IDMA_PF_Y_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_PF_U_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_PF_V_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_IC_12) ? FS_PP_SRC_ROT : /*PP_ROT-> */ + 0; + break; + + /* ->PP_ROT */ + case IDMA_IC_13: + pr_debug("PP_ROT\n"); + isProc = true; + mask = FS_PP_ROT_SRC_SEL_MASK; + offset = FS_PP_ROT_SRC_SEL_OFFSET; + value = (out_dma == IDMA_PF_Y_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_PF_U_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_PF_V_OUT) ? FS_PP_SRC_PF : /*PF-> */ + (out_dma == IDMA_IC_2) ? FS_ROT_SRC_PP : /*PP-> */ + 0; + break; + + /* ->SDC_BG */ + case IDMA_SDC_BG: + pr_debug("SDC_BG\n"); + isProc = false; + mask = FS_SDC_BG_SRC_SEL_MASK; + offset = FS_SDC_BG_SRC_SEL_OFFSET; + value = (out_dma == IDMA_IC_9) ? FS_SRC_ROT_VF : /*VF_ROT-> */ + (out_dma == IDMA_IC_12) ? FS_SRC_ROT_PP : /*PP_ROT-> */ + (out_dma == IDMA_IC_1) ? FS_SRC_VF : /*VF-> */ + (out_dma == IDMA_IC_2) ? FS_SRC_PP : /*PP-> */ + 0; + break; + + /* ->SDC_FG */ + case IDMA_SDC_FG: + pr_debug("SDC_FG\n"); + isProc = false; + mask = FS_SDC_FG_SRC_SEL_MASK; + offset = FS_SDC_FG_SRC_SEL_OFFSET; + value = (out_dma == IDMA_IC_9) ? FS_SRC_ROT_VF : /*VF_ROT-> */ + (out_dma == IDMA_IC_12) ? FS_SRC_ROT_PP : /*PP_ROT-> */ + (out_dma == IDMA_IC_1) ? FS_SRC_VF : /*VF-> */ + (out_dma == IDMA_IC_2) ? FS_SRC_PP : /*PP-> */ + 0; + break; + + /* ->ADC1 */ + case IDMA_ADC_SYS1_WR: + pr_debug("ADC_SYS1\n"); + isProc = false; + mask = FS_ADC1_SRC_SEL_MASK; + offset = FS_ADC1_SRC_SEL_OFFSET; + value = (out_dma == IDMA_IC_9) ? FS_SRC_ROT_VF : /*VF_ROT-> */ + (out_dma == IDMA_IC_12) ? FS_SRC_ROT_PP : /*PP_ROT-> */ + (out_dma == IDMA_IC_1) ? FS_SRC_VF : /*VF-> */ + (out_dma == IDMA_IC_2) ? FS_SRC_PP : /*PP-> */ + 0; + break; + + /* ->ADC2 */ + case IDMA_ADC_SYS2_WR: + pr_debug("ADC_SYS2\n"); + isProc = false; + mask = FS_ADC2_SRC_SEL_MASK; + offset = FS_ADC2_SRC_SEL_OFFSET; + value = (out_dma == IDMA_IC_9) ? FS_SRC_ROT_VF : /*VF_ROT-> */ + (out_dma == IDMA_IC_12) ? FS_SRC_ROT_PP : /*PP_ROT-> */ + (out_dma == IDMA_IC_1) ? FS_SRC_VF : /*VF-> */ + (out_dma == IDMA_IC_2) ? FS_SRC_PP : /*PP-> */ + 0; + break; + + /*Invalid chains: */ + /* ->ENC, ->VF, ->PF, ->VF_COMBINE, ->PP_COMBINE */ + default: + pr_debug("Invalid\n"); + value = 0; + break; + + } + + if (value) { + if (isProc) { + fs_proc_flow &= ~mask; + fs_proc_flow |= (value << offset); + } else { + fs_disp_flow &= ~mask; + fs_disp_flow |= (value << offset); + } + } else { + dev_err(g_ipu_dev, "Invalid channel chaining %d -> %d\n", + out_dma, in_dma); + return -EINVAL; + } + + __raw_writel(fs_proc_flow, IPU_FS_PROC_FLOW); + __raw_writel(fs_disp_flow, IPU_FS_DISP_FLOW); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} + +/*! + * This function unlinks 2 channels and disables automatic frame + * synchronization. + * + * @param src_ch Input parameter for the logical channel ID of + * the source channel. + * + * @param dest_ch Input parameter for the logical channel ID of + * the destination channel. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_unlink_channels(ipu_channel_t src_ch, ipu_channel_t dest_ch) +{ + unsigned long lock_flags; + uint32_t out_dma; + uint32_t in_dma; + uint32_t fs_proc_flow; + uint32_t fs_disp_flow; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + fs_proc_flow = __raw_readl(IPU_FS_PROC_FLOW); + fs_disp_flow = __raw_readl(IPU_FS_DISP_FLOW); + + out_dma = (1UL << channel_2_dma(src_ch, IPU_OUTPUT_BUFFER)); + in_dma = (1UL << channel_2_dma(dest_ch, IPU_INPUT_BUFFER)); + + /*clear the src_ch's output destination */ + switch (out_dma) { + /*VF-> */ + case IDMA_IC_1: + pr_debug("Unlink VF->"); + fs_proc_flow &= ~FS_PRPVF_DEST_SEL_MASK; + break; + + /*VF_ROT-> */ + case IDMA_IC_9: + pr_debug("Unlink VF_Rot->"); + fs_proc_flow &= ~FS_PRPVF_ROT_DEST_SEL_MASK; + break; + + /*ENC-> */ + case IDMA_IC_0: + pr_debug("Unlink ENC->"); + fs_proc_flow &= ~FS_PRPENC_DEST_SEL; + break; + + /*PP-> */ + case IDMA_IC_2: + pr_debug("Unlink PP->"); + fs_proc_flow &= ~FS_PP_DEST_SEL_MASK; + break; + + /*PP_ROT-> */ + case IDMA_IC_12: + pr_debug("Unlink PP_ROT->"); + fs_proc_flow &= ~FS_PP_ROT_DEST_SEL_MASK; + break; + + /*PF-> */ + case IDMA_PF_Y_OUT: + case IDMA_PF_U_OUT: + case IDMA_PF_V_OUT: + pr_debug("Unlink PF->"); + fs_proc_flow &= ~FS_PF_DEST_SEL_MASK; + break; + + default: /*ENC_ROT-> */ + pr_debug("Unlink Invalid->"); + break; + } + + /*clear the dest_ch's input source */ + switch (in_dma) { + /*->VF_ROT*/ + case IDMA_IC_11: + pr_debug("VF_ROT\n"); + fs_proc_flow &= ~FS_PRPVF_ROT_SRC_SEL; + break; + + /*->Enc_ROT*/ + case IDMA_IC_10: + pr_debug("ENC_ROT\n"); + fs_proc_flow &= ~FS_PRPENC_ROT_SRC_SEL; + break; + + /*->PP*/ + case IDMA_IC_5: + pr_debug("PP\n"); + fs_proc_flow &= ~FS_PP_SRC_SEL_MASK; + break; + + /*->PP_ROT*/ + case IDMA_IC_13: + pr_debug("PP_ROT\n"); + fs_proc_flow &= ~FS_PP_ROT_SRC_SEL_MASK; + break; + + /*->SDC_FG*/ + case IDMA_SDC_FG: + pr_debug("SDC_FG\n"); + fs_disp_flow &= ~FS_SDC_FG_SRC_SEL_MASK; + break; + + /*->SDC_BG*/ + case IDMA_SDC_BG: + pr_debug("SDC_BG\n"); + fs_disp_flow &= ~FS_SDC_BG_SRC_SEL_MASK; + break; + + /*->ADC1*/ + case IDMA_ADC_SYS1_WR: + pr_debug("ADC_SYS1\n"); + fs_disp_flow &= ~FS_ADC1_SRC_SEL_MASK; + break; + + /*->ADC2*/ + case IDMA_ADC_SYS2_WR: + pr_debug("ADC_SYS2\n"); + fs_disp_flow &= ~FS_ADC2_SRC_SEL_MASK; + break; + + default: /*->VF, ->ENC, ->VF_COMBINE, ->PP_COMBINE, ->PF*/ + pr_debug("Invalid\n"); + break; + } + + __raw_writel(fs_proc_flow, IPU_FS_PROC_FLOW); + __raw_writel(fs_disp_flow, IPU_FS_DISP_FLOW); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} + +/*! + * This function check whether a logical channel was enabled. + * + * @param channel Input parameter for the logical channel ID. + * + * @return This function returns 1 while request channel is enabled or + * 0 for not enabled. + */ +int32_t ipu_is_channel_busy(ipu_channel_t channel) +{ + uint32_t reg; + uint32_t in_dma; + uint32_t out_dma; + + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + in_dma = channel_2_dma(channel, IPU_INPUT_BUFFER); + + reg = __raw_readl(IDMAC_CHA_EN); + + if (reg & ((1UL << out_dma) | (1UL << in_dma))) + return 1; + return 0; +} +EXPORT_SYMBOL(ipu_is_channel_busy); + +/*! + * This function enables a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_enable_channel(ipu_channel_t channel) +{ + uint32_t reg; + unsigned long lock_flags; + uint32_t in_dma; + uint32_t sec_dma; + uint32_t out_dma; + uint32_t chan_mask = 0; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IDMAC_CHA_EN); + + /* Get input and output dma channels */ + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + if (out_dma != IDMA_CHAN_INVALID) + reg |= 1UL << out_dma; + in_dma = channel_2_dma(channel, IPU_INPUT_BUFFER); + if (in_dma != IDMA_CHAN_INVALID) + reg |= 1UL << in_dma; + + /* Get secondary input dma channel */ + if (g_sec_chan_en[IPU_CHAN_ID(channel)]) { + sec_dma = channel_2_dma(channel, IPU_SEC_INPUT_BUFFER); + if (sec_dma != IDMA_CHAN_INVALID) { + reg |= 1UL << sec_dma; + } + } + + __raw_writel(reg | chan_mask, IDMAC_CHA_EN); + + if (IPU_CHAN_ID(channel) <= IPU_CHAN_ID(MEM_PP_ADC)) { + _ipu_ic_enable_task(channel); + } else if (channel == MEM_SDC_BG) { + dev_dbg(g_ipu_dev, "Initializing SDC BG\n"); + _ipu_sdc_bg_init(NULL); + } else if (channel == MEM_SDC_FG) { + dev_dbg(g_ipu_dev, "Initializing SDC FG\n"); + _ipu_sdc_fg_init(NULL); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} + +/*! + * This function clear buffer ready for a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param type Input parameter which buffer to clear. + * + * @param bufNum Input parameter for which buffer number clear + * ready state. + * + */ +void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type, + uint32_t bufNum) +{ + /*TODO*/ +} + +/*! + * This function disables a logical channel. + * + * @param channel Input parameter for the logical channel ID. + * + * @param wait_for_stop Flag to set whether to wait for channel end + * of frame or return immediately. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_disable_channel(ipu_channel_t channel, bool wait_for_stop) +{ + uint32_t reg; + unsigned long lock_flags; + uint32_t sec_dma; + uint32_t in_dma; + uint32_t out_dma; + uint32_t chan_mask = 0; + uint32_t timeout; + uint32_t eof_intr; + uint32_t enabled; + + /* Get input and output dma channels */ + out_dma = channel_2_dma(channel, IPU_OUTPUT_BUFFER); + if (out_dma != IDMA_CHAN_INVALID) + chan_mask = 1UL << out_dma; + in_dma = channel_2_dma(channel, IPU_INPUT_BUFFER); + if (in_dma != IDMA_CHAN_INVALID) + chan_mask |= 1UL << in_dma; + sec_dma = channel_2_dma(channel, IPU_SEC_INPUT_BUFFER); + if (sec_dma != IDMA_CHAN_INVALID) + chan_mask |= 1UL << sec_dma; + + if (wait_for_stop && channel != MEM_SDC_FG && channel != MEM_SDC_BG) { + timeout = 40; + while ((__raw_readl(IDMAC_CHA_BUSY) & chan_mask) || + (_ipu_channel_status(channel) == TASK_STAT_ACTIVE)) { + timeout--; + msleep(10); + if (timeout == 0) { + printk + (KERN_INFO + "MXC IPU: Warning - timeout waiting for channel to stop,\n" + "\tbuf0_rdy = 0x%08X, buf1_rdy = 0x%08X\n" + "\tbusy = 0x%08X, tstat = 0x%08X\n\tmask = 0x%08X\n", + __raw_readl(IPU_CHA_BUF0_RDY), + __raw_readl(IPU_CHA_BUF1_RDY), + __raw_readl(IDMAC_CHA_BUSY), + __raw_readl(IPU_TASKS_STAT), chan_mask); + break; + } + } + dev_dbg(g_ipu_dev, "timeout = %d * 10ms\n", 40 - timeout); + } + /* SDC BG and FG must be disabled before DMA is disabled */ + if ((channel == MEM_SDC_BG) || (channel == MEM_SDC_FG)) { + + if (channel == MEM_SDC_BG) + eof_intr = IPU_IRQ_SDC_BG_EOF; + else + eof_intr = IPU_IRQ_SDC_FG_EOF; + + /* Wait for any buffer flips to finsh */ + timeout = 4; + while (timeout && + ((__raw_readl(IPU_CHA_BUF0_RDY) & chan_mask) || + (__raw_readl(IPU_CHA_BUF1_RDY) & chan_mask))) { + msleep(10); + timeout--; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + ipu_clear_irq(eof_intr); + if (channel == MEM_SDC_BG) + enabled = _ipu_sdc_bg_uninit(); + else + enabled = _ipu_sdc_fg_uninit(); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + if (enabled && wait_for_stop) { + timeout = 5; + } else { + timeout = 0; + } + while (timeout && !ipu_get_irq_status(eof_intr)) { + msleep(5); + timeout--; + } + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + /* Disable IC task */ + if (IPU_CHAN_ID(channel) <= IPU_CHAN_ID(MEM_PP_ADC)) { + _ipu_ic_disable_task(channel); + } + + /* Disable DMA channel(s) */ + reg = __raw_readl(IDMAC_CHA_EN); + __raw_writel(reg & ~chan_mask, IDMAC_CHA_EN); + + /* Clear DMA related interrupts */ + __raw_writel(chan_mask, IPU_INT_STAT_1); + __raw_writel(chan_mask, IPU_INT_STAT_2); + __raw_writel(chan_mask, IPU_INT_STAT_4); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +static +irqreturn_t ipu_irq_handler(int irq, void *desc) +{ + uint32_t line_base = 0; + uint32_t line; + irqreturn_t result = IRQ_NONE; + uint32_t int_stat; + + int_stat = __raw_readl(IPU_INT_STAT_1); + int_stat &= __raw_readl(IPU_INT_CTRL_1); + __raw_writel(int_stat, IPU_INT_STAT_1); + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + line += line_base - 1; + result |= + ipu_irq_list[line].handler(line, ipu_irq_list[line].dev_id); + } + + line_base = 32; + int_stat = __raw_readl(IPU_INT_STAT_2); + int_stat &= __raw_readl(IPU_INT_CTRL_2); + __raw_writel(int_stat, IPU_INT_STAT_2); + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + line += line_base - 1; + result |= + ipu_irq_list[line].handler(line, ipu_irq_list[line].dev_id); + } + + line_base = 64; + int_stat = __raw_readl(IPU_INT_STAT_3); + int_stat &= __raw_readl(IPU_INT_CTRL_3); + __raw_writel(int_stat, IPU_INT_STAT_3); + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + line += line_base - 1; + result |= + ipu_irq_list[line].handler(line, ipu_irq_list[line].dev_id); + } + + line_base = 96; + int_stat = __raw_readl(IPU_INT_STAT_4); + int_stat &= __raw_readl(IPU_INT_CTRL_4); + __raw_writel(int_stat, IPU_INT_STAT_4); + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + line += line_base - 1; + result |= + ipu_irq_list[line].handler(line, ipu_irq_list[line].dev_id); + } + + line_base = 128; + int_stat = __raw_readl(IPU_INT_STAT_5); + int_stat &= __raw_readl(IPU_INT_CTRL_5); + __raw_writel(int_stat, IPU_INT_STAT_5); + while ((line = ffs(int_stat)) != 0) { + int_stat &= ~(1UL << (line - 1)); + line += line_base - 1; + result |= + ipu_irq_list[line].handler(line, ipu_irq_list[line].dev_id); + } + + return result; +} + +/*! + * This function enables the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to enable interrupt for. + * + */ +void ipu_enable_irq(uint32_t irq) +{ + uint32_t reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPUIRQ_2_CTRLREG(irq)); + reg |= IPUIRQ_2_MASK(irq); + __raw_writel(reg, IPUIRQ_2_CTRLREG(irq)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * This function disables the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to disable interrupt for. + * + */ +void ipu_disable_irq(uint32_t irq) +{ + uint32_t reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPUIRQ_2_CTRLREG(irq)); + reg &= ~IPUIRQ_2_MASK(irq); + __raw_writel(reg, IPUIRQ_2_CTRLREG(irq)); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); +} + +/*! + * This function clears the interrupt for the specified interrupt line. + * The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to clear interrupt for. + * + */ +void ipu_clear_irq(uint32_t irq) +{ + __raw_writel(IPUIRQ_2_MASK(irq), IPUIRQ_2_STATREG(irq)); +} + +/*! + * This function returns the current interrupt status for the specified interrupt + * line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @return Returns true if the interrupt is pending/asserted or false if + * the interrupt is not pending. + */ +bool ipu_get_irq_status(uint32_t irq) +{ + uint32_t reg = __raw_readl(IPUIRQ_2_STATREG(irq)); + + if (reg & IPUIRQ_2_MASK(irq)) + return true; + else + return false; +} + +/*! + * This function registers an interrupt handler function for the specified + * interrupt line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @param handler Input parameter for address of the handler + * function. + * + * @param irq_flags Flags for interrupt mode. Currently not used. + * + * @param devname Input parameter for string name of driver + * registering the handler. + * + * @param dev_id Input parameter for pointer of data to be passed + * to the handler. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int ipu_request_irq(uint32_t irq, + irqreturn_t(*handler) (int, void *), + uint32_t irq_flags, const char *devname, void *dev_id) +{ + unsigned long lock_flags; + + BUG_ON(irq >= IPU_IRQ_COUNT); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (ipu_irq_list[irq].handler != NULL) { + dev_err(g_ipu_dev, + "ipu_request_irq - handler already installed on irq %d\n", + irq); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EINVAL; + } + + ipu_irq_list[irq].handler = handler; + ipu_irq_list[irq].flags = irq_flags; + ipu_irq_list[irq].dev_id = dev_id; + ipu_irq_list[irq].name = devname; + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + ipu_enable_irq(irq); /* enable the interrupt */ + + return 0; +} + +/*! + * This function unregisters an interrupt handler for the specified interrupt + * line. The interrupt lines are defined in \b ipu_irq_line enum. + * + * @param irq Interrupt line to get status for. + * + * @param dev_id Input parameter for pointer of data to be passed + * to the handler. This must match value passed to + * ipu_request_irq(). + * + */ +void ipu_free_irq(uint32_t irq, void *dev_id) +{ + ipu_disable_irq(irq); /* disable the interrupt */ + + if (ipu_irq_list[irq].dev_id == dev_id) { + ipu_irq_list[irq].handler = NULL; + } +} + +/*! + * This function sets the post-filter pause row for h.264 mode. + * + * @param pause_row The last row to process before pausing. + * + * @return This function returns 0 on success or negative error code on + * fail. + * + */ +int32_t ipu_pf_set_pause_row(uint32_t pause_row) +{ + int32_t retval = 0; + uint32_t timeout = 5; + unsigned long lock_flags; + uint32_t reg; + + reg = __raw_readl(IPU_TASKS_STAT); + while ((reg & TSTAT_PF_MASK) && ((reg & TSTAT_PF_H264_PAUSE) == 0)) { + timeout--; + msleep(5); + if (timeout == 0) { + dev_err(g_ipu_dev, "PF Timeout - tstat = 0x%08X\n", + __raw_readl(IPU_TASKS_STAT)); + retval = -ETIMEDOUT; + goto err0; + } + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(PF_CONF); + + /* Set the pause row */ + if (pause_row) { + reg &= ~PF_CONF_PAUSE_ROW_MASK; + reg |= PF_CONF_PAUSE_EN | pause_row << PF_CONF_PAUSE_ROW_SHIFT; + } else { + reg &= ~(PF_CONF_PAUSE_EN | PF_CONF_PAUSE_ROW_MASK); + } + __raw_writel(reg, PF_CONF); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + err0: + return retval; +} + +/* Private functions */ +void _ipu_write_param_mem(uint32_t addr, uint32_t * data, uint32_t numWords) +{ + for (; numWords > 0; numWords--) { + dev_dbg(g_ipu_dev, + "write param mem - addr = 0x%08X, data = 0x%08X\n", + addr, *data); + __raw_writel(addr, IPU_IMA_ADDR); + __raw_writel(*data++, IPU_IMA_DATA); + addr++; + if ((addr & 0x7) == 5) { + addr &= ~0x7; /* set to word 0 */ + addr += 8; /* increment to next row */ + } + } +} + +static void _ipu_pf_init(ipu_channel_params_t * params) +{ + uint32_t reg; + + /*Setup the type of filtering required */ + switch (params->mem_pf_mem.operation) { + case PF_MPEG4_DEBLOCK: + case PF_MPEG4_DERING: + case PF_MPEG4_DEBLOCK_DERING: + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_Y_MEM)] = true; + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_U_MEM)] = false; + break; + case PF_H264_DEBLOCK: + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_Y_MEM)] = true; + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_U_MEM)] = true; + break; + default: + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_Y_MEM)] = false; + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_U_MEM)] = false; + return; + break; + } + reg = params->mem_pf_mem.operation; + __raw_writel(reg, PF_CONF); +} + +static void _ipu_pf_uninit(void) +{ + __raw_writel(0x0L, PF_CONF); + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_Y_MEM)] = false; + g_sec_chan_en[IPU_CHAN_ID(MEM_PF_U_MEM)] = false; +} + +uint32_t _ipu_channel_status(ipu_channel_t channel) +{ + uint32_t stat = 0; + uint32_t task_stat_reg = __raw_readl(IPU_TASKS_STAT); + + switch (channel) { + case CSI_MEM: + stat = + (task_stat_reg & TSTAT_CSI2MEM_MASK) >> + TSTAT_CSI2MEM_OFFSET; + break; + case CSI_PRP_VF_ADC: + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_ADC: + case MEM_PRP_VF_MEM: + stat = (task_stat_reg & TSTAT_VF_MASK) >> TSTAT_VF_OFFSET; + break; + case MEM_ROT_VF_MEM: + stat = + (task_stat_reg & TSTAT_VF_ROT_MASK) >> TSTAT_VF_ROT_OFFSET; + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + stat = (task_stat_reg & TSTAT_ENC_MASK) >> TSTAT_ENC_OFFSET; + break; + case MEM_ROT_ENC_MEM: + stat = + (task_stat_reg & TSTAT_ENC_ROT_MASK) >> + TSTAT_ENC_ROT_OFFSET; + break; + case MEM_PP_ADC: + case MEM_PP_MEM: + stat = (task_stat_reg & TSTAT_PP_MASK) >> TSTAT_PP_OFFSET; + break; + case MEM_ROT_PP_MEM: + stat = + (task_stat_reg & TSTAT_PP_ROT_MASK) >> TSTAT_PP_ROT_OFFSET; + break; + + case MEM_PF_Y_MEM: + case MEM_PF_U_MEM: + case MEM_PF_V_MEM: + stat = (task_stat_reg & TSTAT_PF_MASK) >> TSTAT_PF_OFFSET; + break; + case MEM_SDC_BG: + break; + case MEM_SDC_FG: + break; + case ADC_SYS1: + stat = + (task_stat_reg & TSTAT_ADCSYS1_MASK) >> + TSTAT_ADCSYS1_OFFSET; + break; + case ADC_SYS2: + stat = + (task_stat_reg & TSTAT_ADCSYS2_MASK) >> + TSTAT_ADCSYS2_OFFSET; + break; + case MEM_SDC_MASK: + default: + stat = TASK_STAT_IDLE; + break; + } + return stat; +} + +uint32_t bytes_per_pixel(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_GENERIC: /*generic data */ + case IPU_PIX_FMT_RGB332: + case IPU_PIX_FMT_YUV420P: + case IPU_PIX_FMT_YUV422P: + return 1; + break; + case IPU_PIX_FMT_RGB565: + case IPU_PIX_FMT_YUYV: + case IPU_PIX_FMT_UYVY: + return 2; + break; + case IPU_PIX_FMT_BGR24: + case IPU_PIX_FMT_RGB24: + return 3; + break; + case IPU_PIX_FMT_GENERIC_32: /*generic data */ + case IPU_PIX_FMT_BGR32: + case IPU_PIX_FMT_RGB32: + case IPU_PIX_FMT_ABGR32: + return 4; + break; + default: + return 1; + break; + } + return 0; +} + +void ipu_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]) +{ + /* TODO */ +} +EXPORT_SYMBOL(ipu_set_csc_coefficients); + +ipu_color_space_t format_to_colorspace(uint32_t fmt) +{ + switch (fmt) { + case IPU_PIX_FMT_RGB565: + case IPU_PIX_FMT_BGR24: + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_BGR32: + case IPU_PIX_FMT_RGB32: + return RGB; + break; + + default: + return YCbCr; + break; + } + return RGB; + +} + +static u32 saved_disp3_time_conf; +static bool in_lpdr_mode; +static struct clk *default_ipu_parent_clk; + +int ipu_lowpwr_display_enable(void) +{ + unsigned long rate, div; + struct clk *parent_clk = g_ipu_clk; + + if (in_lpdr_mode || IS_ERR(dfm_clk)) { + return -EINVAL; + } + + if (g_channel_init_mask != (1L << IPU_CHAN_ID(MEM_SDC_BG))) { + dev_err(g_ipu_dev, "LPDR mode requires only SDC BG active.\n"); + return -EINVAL; + } + + default_ipu_parent_clk = clk_get_parent(g_ipu_clk); + in_lpdr_mode = true; + + /* Calculate current pixel clock rate */ + rate = clk_get_rate(g_ipu_clk) * 16; + saved_disp3_time_conf = __raw_readl(DI_DISP3_TIME_CONF); + div = saved_disp3_time_conf & 0xFFF; + rate /= div; + rate *= 4; /* min hsp clk is 4x pixel clk */ + + /* Initialize DFM clock */ + rate = clk_round_rate(dfm_clk, rate); + clk_set_rate(dfm_clk, rate); + clk_enable(dfm_clk); + + /* Wait for next VSYNC */ + __raw_writel(IPUIRQ_2_MASK(IPU_IRQ_SDC_DISP3_VSYNC), + IPUIRQ_2_STATREG(IPU_IRQ_SDC_DISP3_VSYNC)); + while ((__raw_readl(IPUIRQ_2_STATREG(IPU_IRQ_SDC_DISP3_VSYNC)) & + IPUIRQ_2_MASK(IPU_IRQ_SDC_DISP3_VSYNC)) == 0) + msleep_interruptible(1); + + /* Set display clock divider to divide by 4 */ + __raw_writel(((0x8) << 22) | 0x40, DI_DISP3_TIME_CONF); + + clk_set_parent(parent_clk, dfm_clk); + + return 0; +} + +int ipu_lowpwr_display_disable(void) +{ + struct clk *parent_clk = g_ipu_clk; + + if (!in_lpdr_mode || IS_ERR(dfm_clk)) { + return -EINVAL; + } + + if (g_channel_init_mask != (1L << IPU_CHAN_ID(MEM_SDC_BG))) { + dev_err(g_ipu_dev, "LPDR mode requires only SDC BG active.\n"); + return -EINVAL; + } + + in_lpdr_mode = false; + + /* Wait for next VSYNC */ + __raw_writel(IPUIRQ_2_MASK(IPU_IRQ_SDC_DISP3_VSYNC), + IPUIRQ_2_STATREG(IPU_IRQ_SDC_DISP3_VSYNC)); + while ((__raw_readl(IPUIRQ_2_STATREG(IPU_IRQ_SDC_DISP3_VSYNC)) & + IPUIRQ_2_MASK(IPU_IRQ_SDC_DISP3_VSYNC)) == 0) + msleep_interruptible(1); + + __raw_writel(saved_disp3_time_conf, DI_DISP3_TIME_CONF); + clk_set_parent(parent_clk, default_ipu_parent_clk); + clk_disable(dfm_clk); + + return 0; +} + +static int ipu_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (cpu_is_mx31() || cpu_is_mx32()) { + /* work-around for i.Mx31 SR mode after camera related test */ + if (g_csi_used) { + g_ipu_config = __raw_readl(IPU_CONF); + clk_enable(g_ipu_csi_clk); + __raw_writel(0x51, IPU_CONF); + g_channel_init_mask_backup = g_channel_init_mask; + g_channel_init_mask |= 2; + } + } else if (cpu_is_mx35()) { + g_ipu_config = __raw_readl(IPU_CONF); + /* Disable the clock of display otherwise the backlight cannot + * be close after camera/tvin related test */ + __raw_writel(g_ipu_config & 0xfbf, IPU_CONF); + } + + return 0; +} + +static int ipu_resume(struct platform_device *pdev) +{ + if (cpu_is_mx31() || cpu_is_mx32()) { + /* work-around for i.Mx31 SR mode after camera related test */ + if (g_csi_used) { + __raw_writel(g_ipu_config, IPU_CONF); + clk_disable(g_ipu_csi_clk); + g_channel_init_mask = g_channel_init_mask_backup; + } + } else if (cpu_is_mx35()) { + __raw_writel(g_ipu_config, IPU_CONF); + } + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcipu_driver = { + .driver = { + .name = "mxc_ipu", + }, + .probe = ipu_probe, + .suspend = ipu_suspend, + .resume = ipu_resume, +}; + +int32_t __init ipu_gen_init(void) +{ + int32_t ret; + + ret = platform_driver_register(&mxcipu_driver); + return 0; +} + +subsys_initcall(ipu_gen_init); + +static void __exit ipu_gen_uninit(void) +{ + if (g_ipu_irq[0]) + free_irq(g_ipu_irq[0], 0); + if (g_ipu_irq[1]) + free_irq(g_ipu_irq[1], 0); + + platform_driver_unregister(&mxcipu_driver); +} + +module_exit(ipu_gen_uninit); + +EXPORT_SYMBOL(ipu_init_channel); +EXPORT_SYMBOL(ipu_uninit_channel); +EXPORT_SYMBOL(ipu_init_channel_buffer); +EXPORT_SYMBOL(ipu_unlink_channels); +EXPORT_SYMBOL(ipu_update_channel_buffer); +EXPORT_SYMBOL(ipu_select_buffer); +EXPORT_SYMBOL(ipu_link_channels); +EXPORT_SYMBOL(ipu_enable_channel); +EXPORT_SYMBOL(ipu_disable_channel); +EXPORT_SYMBOL(ipu_enable_irq); +EXPORT_SYMBOL(ipu_disable_irq); +EXPORT_SYMBOL(ipu_clear_irq); +EXPORT_SYMBOL(ipu_get_irq_status); +EXPORT_SYMBOL(ipu_request_irq); +EXPORT_SYMBOL(ipu_free_irq); +EXPORT_SYMBOL(ipu_pf_set_pause_row); +EXPORT_SYMBOL(bytes_per_pixel); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_regs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_regs.h @@ -0,0 +1,396 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_regs.h + * + * @brief IPU Register definitions + * + * @ingroup IPU + */ +#ifndef __IPU_REGS_INCLUDED__ +#define __IPU_REGS_INCLUDED__ + +#define IPU_REG_BASE IO_ADDRESS(IPU_CTRL_BASE_ADDR) + +/* Register addresses */ +/* IPU Common registers */ +#define IPU_CONF (IPU_REG_BASE + 0x0000) +#define IPU_CHA_BUF0_RDY (IPU_REG_BASE + 0x0004) +#define IPU_CHA_BUF1_RDY (IPU_REG_BASE + 0x0008) +#define IPU_CHA_DB_MODE_SEL (IPU_REG_BASE + 0x000C) +#define IPU_CHA_CUR_BUF (IPU_REG_BASE + 0x0010) +#define IPU_FS_PROC_FLOW (IPU_REG_BASE + 0x0014) +#define IPU_FS_DISP_FLOW (IPU_REG_BASE + 0x0018) +#define IPU_TASKS_STAT (IPU_REG_BASE + 0x001C) +#define IPU_IMA_ADDR (IPU_REG_BASE + 0x0020) +#define IPU_IMA_DATA (IPU_REG_BASE + 0x0024) +#define IPU_INT_CTRL_1 (IPU_REG_BASE + 0x0028) +#define IPU_INT_CTRL_2 (IPU_REG_BASE + 0x002C) +#define IPU_INT_CTRL_3 (IPU_REG_BASE + 0x0030) +#define IPU_INT_CTRL_4 (IPU_REG_BASE + 0x0034) +#define IPU_INT_CTRL_5 (IPU_REG_BASE + 0x0038) +#define IPU_INT_STAT_1 (IPU_REG_BASE + 0x003C) +#define IPU_INT_STAT_2 (IPU_REG_BASE + 0x0040) +#define IPU_INT_STAT_3 (IPU_REG_BASE + 0x0044) +#define IPU_INT_STAT_4 (IPU_REG_BASE + 0x0048) +#define IPU_INT_STAT_5 (IPU_REG_BASE + 0x004C) +#define IPU_BRK_CTRL_1 (IPU_REG_BASE + 0x0050) +#define IPU_BRK_CTRL_2 (IPU_REG_BASE + 0x0054) +#define IPU_BRK_STAT (IPU_REG_BASE + 0x0058) +#define IPU_DIAGB_CTRL (IPU_REG_BASE + 0x005C) +/* CMOS Sensor Interface Registers */ +#define CSI_SENS_CONF (IPU_REG_BASE + 0x0060) +#define CSI_SENS_FRM_SIZE (IPU_REG_BASE + 0x0064) +#define CSI_ACT_FRM_SIZE (IPU_REG_BASE + 0x0068) +#define CSI_OUT_FRM_CTRL (IPU_REG_BASE + 0x006C) +#define CSI_TST_CTRL (IPU_REG_BASE + 0x0070) +#define CSI_CCIR_CODE_1 (IPU_REG_BASE + 0x0074) +#define CSI_CCIR_CODE_2 (IPU_REG_BASE + 0x0078) +#define CSI_CCIR_CODE_3 (IPU_REG_BASE + 0x007C) +#define CSI_FLASH_STROBE_1 (IPU_REG_BASE + 0x0080) +#define CSI_FLASH_STROBE_2 (IPU_REG_BASE + 0x0084) +/* Image Converter Registers */ +#define IC_CONF (IPU_REG_BASE + 0x0088) +#define IC_PRP_ENC_RSC (IPU_REG_BASE + 0x008C) +#define IC_PRP_VF_RSC (IPU_REG_BASE + 0x0090) +#define IC_PP_RSC (IPU_REG_BASE + 0x0094) +#define IC_CMBP_1 (IPU_REG_BASE + 0x0098) +#define IC_CMBP_2 (IPU_REG_BASE + 0x009C) +#define PF_CONF (IPU_REG_BASE + 0x00A0) +#define IDMAC_CONF (IPU_REG_BASE + 0x00A4) +#define IDMAC_CHA_EN (IPU_REG_BASE + 0x00A8) +#define IDMAC_CHA_PRI (IPU_REG_BASE + 0x00AC) +#define IDMAC_CHA_BUSY (IPU_REG_BASE + 0x00B0) +/* SDC Registers */ +#define SDC_COM_CONF (IPU_REG_BASE + 0x00B4) +#define SDC_GW_CTRL (IPU_REG_BASE + 0x00B8) +#define SDC_FG_POS (IPU_REG_BASE + 0x00BC) +#define SDC_BG_POS (IPU_REG_BASE + 0x00C0) +#define SDC_CUR_POS (IPU_REG_BASE + 0x00C4) +#define SDC_PWM_CTRL (IPU_REG_BASE + 0x00C8) +#define SDC_CUR_MAP (IPU_REG_BASE + 0x00CC) +#define SDC_HOR_CONF (IPU_REG_BASE + 0x00D0) +#define SDC_VER_CONF (IPU_REG_BASE + 0x00D4) +#define SDC_SHARP_CONF_1 (IPU_REG_BASE + 0x00D8) +#define SDC_SHARP_CONF_2 (IPU_REG_BASE + 0x00DC) +/* ADC Registers */ +#define ADC_CONF (IPU_REG_BASE + 0x00E0) +#define ADC_SYSCHA1_SA (IPU_REG_BASE + 0x00E4) +#define ADC_SYSCHA2_SA (IPU_REG_BASE + 0x00E8) +#define ADC_PRPCHAN_SA (IPU_REG_BASE + 0x00EC) +#define ADC_PPCHAN_SA (IPU_REG_BASE + 0x00F0) +#define ADC_DISP0_CONF (IPU_REG_BASE + 0x00F4) +#define ADC_DISP0_RD_AP (IPU_REG_BASE + 0x00F8) +#define ADC_DISP0_RDM (IPU_REG_BASE + 0x00FC) +#define ADC_DISP0_SS (IPU_REG_BASE + 0x0100) +#define ADC_DISP1_CONF (IPU_REG_BASE + 0x0104) +#define ADC_DISP1_RD_AP (IPU_REG_BASE + 0x0108) +#define ADC_DISP1_RDM (IPU_REG_BASE + 0x010C) +#define ADC_DISP12_SS (IPU_REG_BASE + 0x0110) +#define ADC_DISP2_CONF (IPU_REG_BASE + 0x0114) +#define ADC_DISP2_RD_AP (IPU_REG_BASE + 0x0118) +#define ADC_DISP2_RDM (IPU_REG_BASE + 0x011C) +#define ADC_DISP_VSYNC (IPU_REG_BASE + 0x0120) +/* Display Interface re(sters */ +#define DI_DISP_IF_CONF (IPU_REG_BASE + 0x0124) +#define DI_DISP_SIG_POL (IPU_REG_BASE + 0x0128) +#define DI_SER_DISP1_CONF (IPU_REG_BASE + 0x012C) +#define DI_SER_DISP2_CONF (IPU_REG_BASE + 0x0130) +#define DI_HSP_CLK_PER (IPU_REG_BASE + 0x0134) +#define DI_DISP0_TIME_CONF_1 (IPU_REG_BASE + 0x0138) +#define DI_DISP0_TIME_CONF_2 (IPU_REG_BASE + 0x013C) +#define DI_DISP0_TIME_CONF_3 (IPU_REG_BASE + 0x0140) +#define DI_DISP1_TIME_CONF_1 (IPU_REG_BASE + 0x0144) +#define DI_DISP1_TIME_CONF_2 (IPU_REG_BASE + 0x0148) +#define DI_DISP1_TIME_CONF_3 (IPU_REG_BASE + 0x014C) +#define DI_DISP2_TIME_CONF_1 (IPU_REG_BASE + 0x0150) +#define DI_DISP2_TIME_CONF_2 (IPU_REG_BASE + 0x0154) +#define DI_DISP2_TIME_CONF_3 (IPU_REG_BASE + 0x0158) +#define DI_DISP3_TIME_CONF (IPU_REG_BASE + 0x015C) +#define DI_DISP0_DB0_MAP (IPU_REG_BASE + 0x0160) +#define DI_DISP0_DB1_MAP (IPU_REG_BASE + 0x0164) +#define DI_DISP0_DB2_MAP (IPU_REG_BASE + 0x0168) +#define DI_DISP0_CB0_MAP (IPU_REG_BASE + 0x016C) +#define DI_DISP0_CB1_MAP (IPU_REG_BASE + 0x0170) +#define DI_DISP0_CB2_MAP (IPU_REG_BASE + 0x0174) +#define DI_DISP1_DB0_MAP (IPU_REG_BASE + 0x0178) +#define DI_DISP1_DB1_MAP (IPU_REG_BASE + 0x017C) +#define DI_DISP1_DB2_MAP (IPU_REG_BASE + 0x0180) +#define DI_DISP1_CB0_MAP (IPU_REG_BASE + 0x0184) +#define DI_DISP1_CB1_MAP (IPU_REG_BASE + 0x0188) +#define DI_DISP1_CB2_MAP (IPU_REG_BASE + 0x018C) +#define DI_DISP2_DB0_MAP (IPU_REG_BASE + 0x0190) +#define DI_DISP2_DB1_MAP (IPU_REG_BASE + 0x0194) +#define DI_DISP2_DB2_MAP (IPU_REG_BASE + 0x0198) +#define DI_DISP2_CB0_MAP (IPU_REG_BASE + 0x019C) +#define DI_DISP2_CB1_MAP (IPU_REG_BASE + 0x01A0) +#define DI_DISP2_CB2_MAP (IPU_REG_BASE + 0x01A4) +#define DI_DISP3_B0_MAP (IPU_REG_BASE + 0x01A8) +#define DI_DISP3_B1_MAP (IPU_REG_BASE + 0x01AC) +#define DI_DISP3_B2_MAP (IPU_REG_BASE + 0x01B0) +#define DI_DISP_ACC_CC (IPU_REG_BASE + 0x01B4) +#define DI_DISP_LLA_CONF (IPU_REG_BASE + 0x01B8) +#define DI_DISP_LLA_DATA (IPU_REG_BASE + 0x01BC) + +#define IPUIRQ_2_STATREG(int) (IPU_INT_STAT_1 + 4*(int>>5)) +#define IPUIRQ_2_CTRLREG(int) (IPU_INT_CTRL_1 + 4*(int>>5)) +#define IPUIRQ_2_MASK(int) (1UL << (int & 0x1F)) + +enum { + IPU_CONF_CSI_EN = 0x00000001, + IPU_CONF_IC_EN = 0x00000002, + IPU_CONF_ROT_EN = 0x00000004, + IPU_CONF_PF_EN = 0x00000008, + IPU_CONF_SDC_EN = 0x00000010, + IPU_CONF_ADC_EN = 0x00000020, + IPU_CONF_DI_EN = 0x00000040, + IPU_CONF_DU_EN = 0x00000080, + IPU_CONF_PXL_ENDIAN = 0x00000100, + + FS_PRPVF_ROT_SRC_SEL = 0x00000040, + FS_PRPENC_ROT_SRC_SEL = 0x00000020, + FS_PRPENC_DEST_SEL = 0x00000010, + FS_PP_SRC_SEL_MASK = 0x00000300, + FS_PP_SRC_SEL_OFFSET = 8, + FS_PP_ROT_SRC_SEL_MASK = 0x00000C00, + FS_PP_ROT_SRC_SEL_OFFSET = 10, + FS_PF_DEST_SEL_MASK = 0x00003000, + FS_PF_DEST_SEL_OFFSET = 12, + FS_PRPVF_DEST_SEL_MASK = 0x00070000, + FS_PRPVF_DEST_SEL_OFFSET = 16, + FS_PRPVF_ROT_DEST_SEL_MASK = 0x00700000, + FS_PRPVF_ROT_DEST_SEL_OFFSET = 20, + FS_PP_DEST_SEL_MASK = 0x07000000, + FS_PP_DEST_SEL_OFFSET = 24, + FS_PP_ROT_DEST_SEL_MASK = 0x70000000, + FS_PP_ROT_DEST_SEL_OFFSET = 28, + FS_VF_IN_VALID = 0x00000002, + FS_ENC_IN_VALID = 0x00000001, + + FS_SDC_BG_SRC_SEL_MASK = 0x00000007, + FS_SDC_BG_SRC_SEL_OFFSET = 0, + FS_SDC_FG_SRC_SEL_MASK = 0x00000070, + FS_SDC_FG_SRC_SEL_OFFSET = 4, + FS_ADC1_SRC_SEL_MASK = 0x00000700, + FS_ADC1_SRC_SEL_OFFSET = 8, + FS_ADC2_SRC_SEL_MASK = 0x00007000, + FS_ADC2_SRC_SEL_OFFSET = 12, + FS_AUTO_REF_PER_MASK = 0x03FF0000, + FS_AUTO_REF_PER_OFFSET = 16, + + FS_DEST_ARM = 0, + FS_DEST_ROT = 1, + FS_DEST_PP = 1, + FS_DEST_ADC1 = 2, + FS_DEST_ADC2 = 3, + FS_DEST_SDC_BG = 4, + FS_DEST_SDC_FG = 5, + FS_DEST_ADC = 6, + + FS_SRC_ARM = 0, + FS_PP_SRC_PF = 1, + FS_PP_SRC_ROT = 2, + + FS_ROT_SRC_PP = 1, + FS_ROT_SRC_PF = 2, + + FS_PF_DEST_PP = 1, + FS_PF_DEST_ROT = 2, + + FS_SRC_ROT_VF = 1, + FS_SRC_ROT_PP = 2, + FS_SRC_VF = 3, + FS_SRC_PP = 4, + FS_SRC_SNOOP = 5, + FS_SRC_AUTOREF = 6, + FS_SRC_AUTOREF_SNOOP = 7, + + TSTAT_PF_H264_PAUSE = 0x00000001, + TSTAT_CSI2MEM_MASK = 0x0000000C, + TSTAT_CSI2MEM_OFFSET = 2, + TSTAT_VF_MASK = 0x00000600, + TSTAT_VF_OFFSET = 9, + TSTAT_VF_ROT_MASK = 0x000C0000, + TSTAT_VF_ROT_OFFSET = 18, + TSTAT_ENC_MASK = 0x00000180, + TSTAT_ENC_OFFSET = 7, + TSTAT_ENC_ROT_MASK = 0x00030000, + TSTAT_ENC_ROT_OFFSET = 16, + TSTAT_PP_MASK = 0x00001800, + TSTAT_PP_OFFSET = 11, + TSTAT_PP_ROT_MASK = 0x00300000, + TSTAT_PP_ROT_OFFSET = 20, + TSTAT_PF_MASK = 0x00C00000, + TSTAT_PF_OFFSET = 22, + TSTAT_ADCSYS1_MASK = 0x03000000, + TSTAT_ADCSYS1_OFFSET = 24, + TSTAT_ADCSYS2_MASK = 0x0C000000, + TSTAT_ADCSYS2_OFFSET = 26, + + TASK_STAT_IDLE = 0, + TASK_STAT_ACTIVE = 1, + TASK_STAT_WAIT4READY = 2, + + /* Register bits */ + SDC_COM_TFT_COLOR = 0x00000001UL, + SDC_COM_FG_EN = 0x00000010UL, + SDC_COM_GWSEL = 0x00000020UL, + SDC_COM_GLB_A = 0x00000040UL, + SDC_COM_KEY_COLOR_G = 0x00000080UL, + SDC_COM_BG_EN = 0x00000200UL, + SDC_COM_SHARP = 0x00001000UL, + + SDC_V_SYNC_WIDTH_L = 0x00000001UL, + + ADC_CONF_PRP_EN = 0x00000001L, + ADC_CONF_PP_EN = 0x00000002L, + ADC_CONF_MCU_EN = 0x00000004L, + + ADC_DISP_CONF_SL_MASK = 0x00000FFFL, + ADC_DISP_CONF_TYPE_MASK = 0x00003000L, + ADC_DISP_CONF_TYPE_XY = 0x00002000L, + + ADC_DISP_VSYNC_D0_MODE_MASK = 0x00000003L, + ADC_DISP_VSYNC_D0_WIDTH_MASK = 0x003F0000L, + ADC_DISP_VSYNC_D12_MODE_MASK = 0x0000000CL, + ADC_DISP_VSYNC_D12_WIDTH_MASK = 0x3F000000L, + + /* Image Converter Register bits */ + IC_CONF_PRPENC_EN = 0x00000001, + IC_CONF_PRPENC_CSC1 = 0x00000002, + IC_CONF_PRPENC_ROT_EN = 0x00000004, + IC_CONF_PRPVF_EN = 0x00000100, + IC_CONF_PRPVF_CSC1 = 0x00000200, + IC_CONF_PRPVF_CSC2 = 0x00000400, + IC_CONF_PRPVF_CMB = 0x00000800, + IC_CONF_PRPVF_ROT_EN = 0x00001000, + IC_CONF_PP_EN = 0x00010000, + IC_CONF_PP_CSC1 = 0x00020000, + IC_CONF_PP_CSC2 = 0x00040000, + IC_CONF_PP_CMB = 0x00080000, + IC_CONF_PP_ROT_EN = 0x00100000, + IC_CONF_IC_GLB_LOC_A = 0x10000000, + IC_CONF_KEY_COLOR_EN = 0x20000000, + IC_CONF_RWS_EN = 0x40000000, + IC_CONF_CSI_MEM_WR_EN = 0x80000000, + + IDMA_CHAN_INVALID = 0x000000FF, + IDMA_IC_0 = 0x00000001, + IDMA_IC_1 = 0x00000002, + IDMA_IC_2 = 0x00000004, + IDMA_IC_3 = 0x00000008, + IDMA_IC_4 = 0x00000010, + IDMA_IC_5 = 0x00000020, + IDMA_IC_6 = 0x00000040, + IDMA_IC_7 = 0x00000080, + IDMA_IC_8 = 0x00000100, + IDMA_IC_9 = 0x00000200, + IDMA_IC_10 = 0x00000400, + IDMA_IC_11 = 0x00000800, + IDMA_IC_12 = 0x00001000, + IDMA_IC_13 = 0x00002000, + IDMA_SDC_BG = 0x00004000, + IDMA_SDC_FG = 0x00008000, + IDMA_SDC_MASK = 0x00010000, + IDMA_SDC_PARTIAL = 0x00020000, + IDMA_ADC_SYS1_WR = 0x00040000, + IDMA_ADC_SYS2_WR = 0x00080000, + IDMA_ADC_SYS1_CMD = 0x00100000, + IDMA_ADC_SYS2_CMD = 0x00200000, + IDMA_ADC_SYS1_RD = 0x00400000, + IDMA_ADC_SYS2_RD = 0x00800000, + IDMA_PF_QP = 0x01000000, + IDMA_PF_BSP = 0x02000000, + IDMA_PF_Y_IN = 0x04000000, + IDMA_PF_U_IN = 0x08000000, + IDMA_PF_V_IN = 0x10000000, + IDMA_PF_Y_OUT = 0x20000000, + IDMA_PF_U_OUT = 0x40000000, + IDMA_PF_V_OUT = 0x80000000, + + CSI_SENS_CONF_DATA_FMT_SHIFT = 8, + CSI_SENS_CONF_DATA_FMT_RGB_YUV444 = 0x00000000L, + CSI_SENS_CONF_DATA_FMT_YUV422 = 0x00000200L, + CSI_SENS_CONF_DATA_FMT_BAYER = 0x00000300L, + + CSI_SENS_CONF_VSYNC_POL_SHIFT = 0, + CSI_SENS_CONF_HSYNC_POL_SHIFT = 1, + CSI_SENS_CONF_DATA_POL_SHIFT = 2, + CSI_SENS_CONF_PIX_CLK_POL_SHIFT = 3, + CSI_SENS_CONF_SENS_PRTCL_SHIFT = 4, + CSI_SENS_CONF_SENS_CLKSRC_SHIFT = 7, + CSI_SENS_CONF_DATA_WIDTH_SHIFT = 10, + CSI_SENS_CONF_EXT_VSYNC_SHIFT = 15, + CSI_SENS_CONF_DIVRATIO_SHIFT = 16, + + PF_CONF_TYPE_MASK = 0x00000007, + PF_CONF_TYPE_SHIFT = 0, + PF_CONF_PAUSE_EN = 0x00000010, + PF_CONF_RESET = 0x00008000, + PF_CONF_PAUSE_ROW_MASK = 0x00FF0000, + PF_CONF_PAUSE_ROW_SHIFT = 16, + + /* DI_DISP_SIG_POL bits */ + DI_D3_VSYNC_POL_SHIFT = 28, + DI_D3_HSYNC_POL_SHIFT = 27, + DI_D3_DRDY_SHARP_POL_SHIFT = 26, + DI_D3_CLK_POL_SHIFT = 25, + DI_D3_DATA_POL_SHIFT = 24, + + /* DI_DISP_IF_CONF bits */ + DI_D3_CLK_IDLE_SHIFT = 26, + DI_D3_CLK_SEL_SHIFT = 25, + DI_D3_DATAMSK_SHIFT = 24, + + DISPx_IF_CLK_DOWN_OFFSET = 22, + DISPx_IF_CLK_UP_OFFSET = 12, + DISPx_IF_CLK_PER_OFFSET = 0, + DISPx_IF_CLK_READ_EN_OFFSET = 16, + DISPx_PIX_CLK_PER_OFFSET = 0, + + DI_CONF_DISP0_EN = 0x00000001L, + DI_CONF_DISP0_IF_MODE_OFFSET = 1, + DI_CONF_DISP0_BURST_MODE_OFFSET = 3, + DI_CONF_DISP1_EN = 0x00000100L, + DI_CONF_DISP1_IF_MODE_OFFSET = 9, + DI_CONF_DISP1_BURST_MODE_OFFSET = 12, + DI_CONF_DISP2_EN = 0x00010000L, + DI_CONF_DISP2_IF_MODE_OFFSET = 17, + DI_CONF_DISP2_BURST_MODE_OFFSET = 20, + + DI_SER_DISPx_CONF_SER_BIT_NUM_OFFSET = 16, + DI_SER_DISPx_CONF_PREAMBLE_OFFSET = 8, + DI_SER_DISPx_CONF_PREAMBLE_LEN_OFFSET = 4, + DI_SER_DISPx_CONF_RW_CFG_OFFSET = 1, + DI_SER_DISPx_CONF_BURST_MODE_EN = 0x01000000L, + DI_SER_DISPx_CONF_PREAMBLE_EN = 0x00000001L, + + /* DI_DISP_ACC_CC */ + DISP0_IF_CLK_CNT_D_MASK = 0x00000003L, + DISP0_IF_CLK_CNT_D_OFFSET = 0, + DISP0_IF_CLK_CNT_C_MASK = 0x0000000CL, + DISP0_IF_CLK_CNT_C_OFFSET = 2, + DISP1_IF_CLK_CNT_D_MASK = 0x00000030L, + DISP1_IF_CLK_CNT_D_OFFSET = 4, + DISP1_IF_CLK_CNT_C_MASK = 0x000000C0L, + DISP1_IF_CLK_CNT_C_OFFSET = 6, + DISP2_IF_CLK_CNT_D_MASK = 0x00000300L, + DISP2_IF_CLK_CNT_D_OFFSET = 8, + DISP2_IF_CLK_CNT_C_MASK = 0x00000C00L, + DISP2_IF_CLK_CNT_C_OFFSET = 10, + DISP3_IF_CLK_CNT_MASK = 0x00003000L, + DISP3_IF_CLK_CNT_OFFSET = 12, +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_ic.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_ic.c @@ -0,0 +1,592 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_ic.c + * + * @brief IPU IC functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +enum { + IC_TASK_VIEWFINDER, + IC_TASK_ENCODER, + IC_TASK_POST_PROCESSOR +}; + +extern int g_ipu_hw_rev; +static void _init_csc(uint8_t ic_task, ipu_color_space_t in_format, + ipu_color_space_t out_format); +static bool _calc_resize_coeffs(uint32_t inSize, uint32_t outSize, + uint32_t * resizeCoeff, + uint32_t * downsizeCoeff); + +void _ipu_ic_enable_task(ipu_channel_t channel) +{ + uint32_t ic_conf; + + ic_conf = __raw_readl(IC_CONF); + switch (channel) { + case CSI_PRP_VF_ADC: + case MEM_PRP_VF_ADC: + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_MEM: + ic_conf |= IC_CONF_PRPVF_EN; + break; + case MEM_ROT_VF_MEM: + ic_conf |= IC_CONF_PRPVF_ROT_EN; + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + ic_conf |= IC_CONF_PRPENC_EN; + break; + case MEM_ROT_ENC_MEM: + ic_conf |= IC_CONF_PRPENC_ROT_EN; + break; + case MEM_PP_ADC: + case MEM_PP_MEM: + ic_conf |= IC_CONF_PP_EN; + break; + case MEM_ROT_PP_MEM: + ic_conf |= IC_CONF_PP_ROT_EN; + break; + case CSI_MEM: + // ??? + ic_conf |= IC_CONF_RWS_EN | IC_CONF_PRPENC_EN; + break; + default: + break; + } + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_disable_task(ipu_channel_t channel) +{ + uint32_t ic_conf; + + ic_conf = __raw_readl(IC_CONF); + switch (channel) { + case CSI_PRP_VF_ADC: + case MEM_PRP_VF_ADC: + case CSI_PRP_VF_MEM: + case MEM_PRP_VF_MEM: + ic_conf &= ~IC_CONF_PRPVF_EN; + break; + case MEM_ROT_VF_MEM: + ic_conf &= ~IC_CONF_PRPVF_ROT_EN; + break; + case CSI_PRP_ENC_MEM: + case MEM_PRP_ENC_MEM: + ic_conf &= ~IC_CONF_PRPENC_EN; + break; + case MEM_ROT_ENC_MEM: + ic_conf &= ~IC_CONF_PRPENC_ROT_EN; + break; + case MEM_PP_ADC: + case MEM_PP_MEM: + ic_conf &= ~IC_CONF_PP_EN; + break; + case MEM_ROT_PP_MEM: + ic_conf &= ~IC_CONF_PP_ROT_EN; + break; + case CSI_MEM: + // ??? + ic_conf &= ~(IC_CONF_RWS_EN | IC_CONF_PRPENC_EN); + break; + default: + break; + } + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_init_prpvf(ipu_channel_params_t * params, bool src_is_csi) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_prp_vf_mem.in_height, + params->mem_prp_vf_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + _calc_resize_coeffs(params->mem_prp_vf_mem.in_width, + params->mem_prp_vf_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + + __raw_writel(reg, IC_PRP_VF_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_prp_vf_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_prp_vf_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + _init_csc(IC_TASK_VIEWFINDER, RGB, out_fmt); + ic_conf |= IC_CONF_PRPVF_CSC1; /* Enable RGB->YCBCR CSC */ + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + _init_csc(IC_TASK_VIEWFINDER, YCbCr, RGB); + ic_conf |= IC_CONF_PRPVF_CSC1; /* Enable YCBCR->RGB CSC */ + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_prp_vf_mem.graphics_combine_en) { + ic_conf |= IC_CONF_PRPVF_CMB; + + /* need transparent CSC1 conversion */ + _init_csc(IC_TASK_POST_PROCESSOR, RGB, RGB); + ic_conf |= IC_CONF_PRPVF_CSC1; /* Enable RGB->RGB CSC */ + + if (params->mem_prp_vf_mem.global_alpha_en) { + ic_conf |= IC_CONF_IC_GLB_LOC_A; + } else { + ic_conf &= ~IC_CONF_IC_GLB_LOC_A; + } + + if (params->mem_prp_vf_mem.key_color_en) { + ic_conf |= IC_CONF_KEY_COLOR_EN; + } else { + ic_conf &= ~IC_CONF_KEY_COLOR_EN; + } + } else { + ic_conf &= ~IC_CONF_PP_CMB; + } + +#ifndef CONFIG_VIRTIO_SUPPORT /* Setting RWS_EN doesn't work in Virtio */ + if (src_is_csi) { + ic_conf &= ~IC_CONF_RWS_EN; + } else { + ic_conf |= IC_CONF_RWS_EN; + } +#endif + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_prpvf(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPVF_EN | IC_CONF_PRPVF_CMB | + IC_CONF_PRPVF_CSC2 | IC_CONF_PRPVF_CSC1); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_vf(ipu_channel_params_t * params) +{ +} + +void _ipu_ic_uninit_rotate_vf(void) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_PRPVF_ROT_EN; + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_csi(ipu_channel_params_t * params) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_CSI_MEM_WR_EN; + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_uninit_csi(void) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_RWS_EN | IC_CONF_PRPENC_EN); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_prpenc(ipu_channel_params_t * params, bool src_is_csi) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_prp_enc_mem.in_height, + params->mem_prp_enc_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + _calc_resize_coeffs(params->mem_prp_enc_mem.in_width, + params->mem_prp_enc_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + + __raw_writel(reg, IC_PRP_ENC_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_prp_enc_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_prp_enc_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + /* TODO: ERROR! */ + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + _init_csc(IC_TASK_ENCODER, YCbCr, RGB); + ic_conf |= IC_CONF_PRPENC_CSC1; /* Enable YCBCR->RGB CSC */ + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (src_is_csi) { + ic_conf &= ~IC_CONF_RWS_EN; + } else { + ic_conf |= IC_CONF_RWS_EN; + } + + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_prpenc(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPENC_EN | IC_CONF_PRPENC_CSC1); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_enc(ipu_channel_params_t * params) +{ +} + +void _ipu_ic_uninit_rotate_enc(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PRPENC_ROT_EN); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_pp(ipu_channel_params_t * params) +{ + uint32_t reg, ic_conf; + uint32_t downsizeCoeff, resizeCoeff; + ipu_color_space_t in_fmt, out_fmt; + + /* Setup vertical resizing */ + _calc_resize_coeffs(params->mem_pp_mem.in_height, + params->mem_pp_mem.out_height, + &resizeCoeff, &downsizeCoeff); + reg = (downsizeCoeff << 30) | (resizeCoeff << 16); + + /* Setup horizontal resizing */ + _calc_resize_coeffs(params->mem_pp_mem.in_width, + params->mem_pp_mem.out_width, + &resizeCoeff, &downsizeCoeff); + reg |= (downsizeCoeff << 14) | resizeCoeff; + + __raw_writel(reg, IC_PP_RSC); + + ic_conf = __raw_readl(IC_CONF); + + /* Setup color space conversion */ + in_fmt = format_to_colorspace(params->mem_pp_mem.in_pixel_fmt); + out_fmt = format_to_colorspace(params->mem_pp_mem.out_pixel_fmt); + if (in_fmt == RGB) { + if ((out_fmt == YCbCr) || (out_fmt == YUV)) { + _init_csc(IC_TASK_POST_PROCESSOR, RGB, out_fmt); + ic_conf |= IC_CONF_PP_CSC2; /* Enable RGB->YCBCR CSC */ + } + } + if ((in_fmt == YCbCr) || (in_fmt == YUV)) { + if (out_fmt == RGB) { + _init_csc(IC_TASK_POST_PROCESSOR, YCbCr, RGB); + ic_conf |= IC_CONF_PP_CSC1; /* Enable YCBCR->RGB CSC */ + } else { + /* TODO: Support YUV<->YCbCr conversion? */ + } + } + + if (params->mem_pp_mem.graphics_combine_en) { + ic_conf |= IC_CONF_PP_CMB; + + /* need transparent CSC1 conversion */ + _init_csc(IC_TASK_POST_PROCESSOR, RGB, RGB); + ic_conf |= IC_CONF_PP_CSC1; /* Enable RGB->RGB CSC */ + + if (params->mem_pp_mem.global_alpha_en) { + ic_conf |= IC_CONF_IC_GLB_LOC_A; + } else { + ic_conf &= ~IC_CONF_IC_GLB_LOC_A; + } + + if (params->mem_pp_mem.key_color_en) { + ic_conf |= IC_CONF_KEY_COLOR_EN; + } else { + ic_conf &= ~IC_CONF_KEY_COLOR_EN; + } + } else { + ic_conf &= ~IC_CONF_PP_CMB; + } + + __raw_writel(ic_conf, IC_CONF); +} + +void _ipu_ic_uninit_pp(void) +{ + uint32_t reg; + + reg = __raw_readl(IC_CONF); + reg &= ~(IC_CONF_PP_EN | IC_CONF_PP_CSC1 | IC_CONF_PP_CSC2 | + IC_CONF_PP_CMB); + __raw_writel(reg, IC_CONF); +} + +void _ipu_ic_init_rotate_pp(ipu_channel_params_t * params) +{ +} + +void _ipu_ic_uninit_rotate_pp(void) +{ + uint32_t reg; + reg = __raw_readl(IC_CONF); + reg &= ~IC_CONF_PP_ROT_EN; + __raw_writel(reg, IC_CONF); +} + +static void _init_csc(uint8_t ic_task, ipu_color_space_t in_format, + ipu_color_space_t out_format) +{ +/* Y = R * .299 + G * .587 + B * .114; + U = R * -.169 + G * -.332 + B * .500 + 128.; + V = R * .500 + G * -.419 + B * -.0813 + 128.;*/ + static const uint32_t rgb2ycbcr_coeff[4][3] = { + {0x004D, 0x0096, 0x001D}, + {0x01D5, 0x01AB, 0x0080}, + {0x0080, 0x0195, 0x01EB}, + {0x0000, 0x0200, 0x0200}, /* A0, A1, A2 */ + }; + + /* transparent RGB->RGB matrix for combining + */ + static const uint32_t rgb2rgb_coeff[4][3] = { + {0x0080, 0x0000, 0x0000}, + {0x0000, 0x0080, 0x0000}, + {0x0000, 0x0000, 0x0080}, + {0x0000, 0x0000, 0x0000}, /* A0, A1, A2 */ + }; + +/* R = (1.164 * (Y - 16)) + (1.596 * (Cr - 128)); + G = (1.164 * (Y - 16)) - (0.392 * (Cb - 128)) - (0.813 * (Cr - 128)); + B = (1.164 * (Y - 16)) + (2.017 * (Cb - 128); */ + static const uint32_t ycbcr2rgb_coeff[4][3] = { + {149, 0, 204}, + {149, 462, 408}, + {149, 255, 0}, + {8192 - 446, 266, 8192 - 554}, /* A0, A1, A2 */ + }; + + uint32_t param[2]; + uint32_t address = 0; + + if (g_ipu_hw_rev > 1) { + if (ic_task == IC_TASK_VIEWFINDER) { + address = 0x645 << 3; + } else if (ic_task == IC_TASK_ENCODER) { + address = 0x321 << 3; + } else if (ic_task == IC_TASK_POST_PROCESSOR) { + address = 0x96C << 3; + } else { + BUG(); + } + } else { + if (ic_task == IC_TASK_VIEWFINDER) { + address = 0x5a5 << 3; + } else if (ic_task == IC_TASK_ENCODER) { + address = 0x2d1 << 3; + } else if (ic_task == IC_TASK_POST_PROCESSOR) { + address = 0x87c << 3; + } else { + BUG(); + } + } + + if ((in_format == YCbCr) && (out_format == RGB)) { + /* Init CSC1 (YCbCr->RGB) */ + param[0] = + (ycbcr2rgb_coeff[3][0] << 27) | (ycbcr2rgb_coeff[0][0] << + 18) | + (ycbcr2rgb_coeff[1][1] << 9) | ycbcr2rgb_coeff[2][2]; + /* scale = 2, sat = 0 */ + param[1] = (ycbcr2rgb_coeff[3][0] >> 5) | (2L << (40 - 32)); + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (ycbcr2rgb_coeff[3][1] << 27) | (ycbcr2rgb_coeff[0][1] << + 18) | + (ycbcr2rgb_coeff[1][0] << 9) | ycbcr2rgb_coeff[2][0]; + param[1] = (ycbcr2rgb_coeff[3][1] >> 5); + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (ycbcr2rgb_coeff[3][2] << 27) | (ycbcr2rgb_coeff[0][2] << + 18) | + (ycbcr2rgb_coeff[1][2] << 9) | ycbcr2rgb_coeff[2][1]; + param[1] = (ycbcr2rgb_coeff[3][2] >> 5); + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + } else if ((in_format == RGB) && (out_format == YCbCr)) { + /* Init CSC1 (RGB->YCbCr) */ + param[0] = + (rgb2ycbcr_coeff[3][0] << 27) | (rgb2ycbcr_coeff[0][0] << + 18) | + (rgb2ycbcr_coeff[1][1] << 9) | rgb2ycbcr_coeff[2][2]; + /* scale = 1, sat = 0 */ + param[1] = (rgb2ycbcr_coeff[3][0] >> 5) | (1UL << 8); + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (rgb2ycbcr_coeff[3][1] << 27) | (rgb2ycbcr_coeff[0][1] << + 18) | + (rgb2ycbcr_coeff[1][0] << 9) | rgb2ycbcr_coeff[2][0]; + param[1] = (rgb2ycbcr_coeff[3][1] >> 5); + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (rgb2ycbcr_coeff[3][2] << 27) | (rgb2ycbcr_coeff[0][2] << + 18) | + (rgb2ycbcr_coeff[1][2] << 9) | rgb2ycbcr_coeff[2][1]; + param[1] = (rgb2ycbcr_coeff[3][2] >> 5); + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + } else if ((in_format == RGB) && (out_format == RGB)) { + /* Init CSC1 */ + param[0] = + (rgb2rgb_coeff[3][0] << 27) | (rgb2rgb_coeff[0][0] << 18) | + (rgb2rgb_coeff[1][1] << 9) | rgb2rgb_coeff[2][2]; + /* scale = 2, sat = 0 */ + param[1] = (rgb2rgb_coeff[3][0] >> 5) | (2UL << 8); + + _ipu_write_param_mem(address, param, 2); + + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (rgb2rgb_coeff[3][1] << 27) | (rgb2rgb_coeff[0][1] << 18) | + (rgb2rgb_coeff[1][0] << 9) | rgb2rgb_coeff[2][0]; + param[1] = (rgb2rgb_coeff[3][1] >> 5); + + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + + param[0] = + (rgb2rgb_coeff[3][2] << 27) | (rgb2rgb_coeff[0][2] << 18) | + (rgb2rgb_coeff[1][2] << 9) | rgb2rgb_coeff[2][1]; + param[1] = (rgb2rgb_coeff[3][2] >> 5); + + address += 1L << 3; + _ipu_write_param_mem(address, param, 2); + + dev_dbg(g_ipu_dev, + "addr 0x%04X: word0 = 0x%08X, word1 = 0x%08X\n", + address, param[0], param[1]); + } else { + dev_err(g_ipu_dev, "Unsupported color space conversion\n"); + } +} + +static bool _calc_resize_coeffs(uint32_t inSize, uint32_t outSize, + uint32_t * resizeCoeff, + uint32_t * downsizeCoeff) +{ + uint32_t tempSize; + uint32_t tempDownsize; + + /* Cannot downsize more than 8:1 */ + if ((outSize << 3) < inSize) { + return false; + } + /* compute downsizing coefficient */ + tempDownsize = 0; + tempSize = inSize; + while ((tempSize >= outSize * 2) && (tempDownsize < 2)) { + tempSize >>= 1; + tempDownsize++; + } + *downsizeCoeff = tempDownsize; + + /* compute resizing coefficient using the following equation: + resizeCoeff = M*(SI -1)/(SO - 1) + where M = 2^13, SI - input size, SO - output size */ + *resizeCoeff = (8192L * (tempSize - 1)) / (outSize - 1); + if (*resizeCoeff >= 16384L) { + dev_err(g_ipu_dev, "Warning! Overflow on resize coeff.\n"); + *resizeCoeff = 0x3FFF; + } + + dev_dbg(g_ipu_dev, "resizing from %u -> %u pixels, " + "downsize=%u, resize=%u.%lu (reg=%u)\n", inSize, outSize, + *downsizeCoeff, (*resizeCoeff >= 8192L) ? 1 : 0, + ((*resizeCoeff & 0x1FFF) * 10000L) / 8192L, *resizeCoeff); + + return true; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_adc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_adc.c @@ -0,0 +1,689 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_adc.c + * + * @brief IPU ADC functions + * + * @ingroup IPU + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +/*#define ADC_CHAN1_SA_MASK 0xFF800000 */ + +static void _ipu_set_cmd_data_mappings(display_port_t disp, + uint32_t pixel_fmt, int ifc_width); + +int32_t _ipu_adc_init_channel(ipu_channel_t chan, display_port_t disp, + mcu_mode_t cmd, int16_t x_pos, int16_t y_pos) +{ + uint32_t reg; + uint32_t start_addr, stride; + unsigned long lock_flags; + uint32_t size; + + size = 0; + + switch (disp) { + case DISP0: + reg = __raw_readl(ADC_DISP0_CONF); + stride = reg & ADC_DISP_CONF_SL_MASK; + break; + case DISP1: + reg = __raw_readl(ADC_DISP1_CONF); + stride = reg & ADC_DISP_CONF_SL_MASK; + break; + case DISP2: + reg = __raw_readl(ADC_DISP2_CONF); + stride = reg & ADC_DISP_CONF_SL_MASK; + break; + default: + return -EINVAL; + } + + if (stride == 0) + return -EINVAL; + + stride++; + start_addr = (y_pos * stride) + x_pos; + + spin_lock_irqsave(&ipu_lock, lock_flags); + reg = __raw_readl(ADC_CONF); + + switch (chan) { + case ADC_SYS1: + reg &= ~0x00FF4000; + reg |= + ((uint32_t) size << 21 | (uint32_t) disp << 19 | (uint32_t) + cmd << 16); + + __raw_writel(start_addr, ADC_SYSCHA1_SA); + break; + + case ADC_SYS2: + reg &= ~0xFF008000; + reg |= + ((uint32_t) size << 29 | (uint32_t) disp << 27 | (uint32_t) + cmd << 24); + + __raw_writel(start_addr, ADC_SYSCHA2_SA); + break; + + case CSI_PRP_VF_ADC: + case MEM_PRP_VF_ADC: + reg &= ~0x000000F9; + reg |= + ((uint32_t) size << 5 | (uint32_t) disp << 3 | + ADC_CONF_PRP_EN); + + __raw_writel(start_addr, ADC_PRPCHAN_SA); + break; + + case MEM_PP_ADC: + reg &= ~0x00003F02; + reg |= + ((uint32_t) size << 10 | (uint32_t) disp << 8 | + ADC_CONF_PP_EN); + + __raw_writel(start_addr, ADC_PPCHAN_SA); + break; + default: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -1; + break; + } + __raw_writel(reg, ADC_CONF); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} + +int32_t _ipu_adc_uninit_channel(ipu_channel_t chan) +{ + uint32_t reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + reg = __raw_readl(ADC_CONF); + + switch (chan) { + case ADC_SYS1: + reg &= ~0x00FF4000; + break; + case ADC_SYS2: + reg &= ~0xFF008000; + break; + case CSI_PRP_VF_ADC: + case MEM_PRP_VF_ADC: + reg &= ~0x000000F9; + break; + case MEM_PP_ADC: + reg &= ~0x00003F02; + break; + default: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -1; + break; + } + __raw_writel(reg, ADC_CONF); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return 0; +} + +int32_t ipu_adc_write_template(display_port_t disp, uint32_t * pCmd, bool write) +{ + uint32_t ima_addr = 0; + uint32_t row_nu; + int i; + + /* Set IPU_IMA_ADDR (IPU Internal Memory Access Address) */ + /* MEM_NU = 0x0001 (CPM) */ + /* ROW_NU = 2*N ( N is channel number) */ + /* WORD_NU = 0 */ + if (write) { + row_nu = (uint32_t) disp *2 * ATM_ADDR_RANGE; + } else { + row_nu = ((uint32_t) disp * 2 + 1) * ATM_ADDR_RANGE; + } + + /* form template addr for IPU_IMA_ADDR */ + ima_addr = (0x3 << 16 /*Template memory */ | row_nu << 3); + + __raw_writel(ima_addr, IPU_IMA_ADDR); + + /* write template data for IPU_IMA_DATA */ + for (i = 0; i < TEMPLATE_BUF_SIZE; i++) + /* only DATA field are needed */ + __raw_writel(pCmd[i], IPU_IMA_DATA); + + return 0; +} + +int32_t +ipu_adc_write_cmd(display_port_t disp, cmddata_t type, + uint32_t cmd, const uint32_t * params, uint16_t numParams) +{ + uint16_t i; + int disable_di = 0; + u32 reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + reg = __raw_readl(IPU_CONF); + if ((reg & IPU_CONF_DI_EN) == 0) { + disable_di = 1; + reg |= IPU_CONF_DI_EN; + __raw_writel(reg, IPU_CONF); + } + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + __raw_writel((uint32_t) ((type ? 0x0 : 0x1) | disp << 1 | 0x10), + DI_DISP_LLA_CONF); + __raw_writel(cmd, DI_DISP_LLA_DATA); + udelay(3); + + __raw_writel((uint32_t) (0x10 | disp << 1 | 0x11), DI_DISP_LLA_CONF); + for (i = 0; i < numParams; i++) { + __raw_writel(params[i], DI_DISP_LLA_DATA); + udelay(3); + } + + if (disable_di) { + spin_lock_irqsave(&ipu_lock, lock_flags); + reg = __raw_readl(IPU_CONF); + reg &= ~IPU_CONF_DI_EN; + __raw_writel(reg, IPU_CONF); + spin_unlock_irqrestore(&ipu_lock, lock_flags); + } + + return 0; +} + +int32_t ipu_adc_set_update_mode(ipu_channel_t channel, + ipu_adc_update_mode_t mode, + uint32_t refresh_rate, unsigned long addr, + uint32_t * size) +{ + int32_t err = 0; + uint32_t ref_per, reg, src = 0; + unsigned long lock_flags; + uint32_t ipu_freq; + + ipu_freq = clk_get_rate(g_ipu_clk); + + spin_lock_irqsave(&ipu_lock, lock_flags); + + reg = __raw_readl(IPU_FS_DISP_FLOW); + reg &= ~FS_AUTO_REF_PER_MASK; + switch (mode) { + case IPU_ADC_REFRESH_NONE: + src = 0; + break; + case IPU_ADC_AUTO_REFRESH: + if (refresh_rate == 0) { + err = -EINVAL; + goto err0; + } + ref_per = ipu_freq / ((1UL << 17) * refresh_rate); + ref_per--; + reg |= ref_per << FS_AUTO_REF_PER_OFFSET; + + src = FS_SRC_AUTOREF; + break; + case IPU_ADC_AUTO_REFRESH_SNOOP: + if (refresh_rate == 0) { + err = -EINVAL; + goto err0; + } + ref_per = ipu_freq / ((1UL << 17) * refresh_rate); + ref_per--; + reg |= ref_per << FS_AUTO_REF_PER_OFFSET; + + src = FS_SRC_AUTOREF_SNOOP; + break; + case IPU_ADC_SNOOPING: + src = FS_SRC_SNOOP; + break; + } + + switch (channel) { + case ADC_SYS1: + reg &= ~FS_ADC1_SRC_SEL_MASK; + reg |= src << FS_ADC1_SRC_SEL_OFFSET; + break; + case ADC_SYS2: + reg &= ~FS_ADC2_SRC_SEL_MASK; + reg |= src << FS_ADC2_SRC_SEL_OFFSET; + break; + default: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return -EINVAL; + } + __raw_writel(reg, IPU_FS_DISP_FLOW); + + /* Setup bus snooping */ + if ((mode == IPU_ADC_AUTO_REFRESH_SNOOP) || (mode == IPU_ADC_SNOOPING)) { + err = mxc_snoop_set_config(0, addr, *size); + if (err > 0) { + *size = err; + err = 0; + } + } else { + mxc_snoop_set_config(0, 0, 0); + } + + err0: + spin_unlock_irqrestore(&ipu_lock, lock_flags); + return err; +} + +int32_t ipu_adc_get_snooping_status(uint32_t * statl, uint32_t * stath) +{ + return mxc_snoop_get_status(0, statl, stath); +} + +int32_t ipu_adc_init_panel(display_port_t disp, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint32_t stride, + ipu_adc_sig_cfg_t sig, + display_addressing_t addr, + uint32_t vsync_width, vsync_t mode) +{ + uint32_t temp; + unsigned long lock_flags; + uint32_t ser_conf; + uint32_t disp_conf; + uint32_t adc_disp_conf; + uint32_t adc_disp_vsync; + uint32_t old_pol; + + if ((disp != DISP1) && (disp != DISP2) && + (sig.ifc_mode >= IPU_ADC_IFC_MODE_3WIRE_SERIAL)) { + return -EINVAL; + } +/* adc_disp_conf = ((uint32_t)((((size == 3)||(size == 2))?1:0)<<14) | */ +/* (uint32_t)addr<<12 | (stride-1)); */ + adc_disp_conf = (uint32_t) addr << 12 | (stride - 1); + + _ipu_set_cmd_data_mappings(disp, pixel_fmt, sig.ifc_width); + + spin_lock_irqsave(&ipu_lock, lock_flags); + disp_conf = __raw_readl(DI_DISP_IF_CONF); + old_pol = __raw_readl(DI_DISP_SIG_POL); + adc_disp_vsync = __raw_readl(ADC_DISP_VSYNC); + + switch (disp) { + case DISP0: + __raw_writel(adc_disp_conf, ADC_DISP0_CONF); + __raw_writel((((height - 1) << 16) | (width - 1)), + ADC_DISP0_SS); + + adc_disp_vsync &= ~(ADC_DISP_VSYNC_D0_MODE_MASK | + ADC_DISP_VSYNC_D0_WIDTH_MASK); + adc_disp_vsync |= (vsync_width << 16) | (uint32_t) mode; + + old_pol &= ~0x2000003FL; + old_pol |= sig.data_pol | sig.cs_pol << 1 | + sig.addr_pol << 2 | sig.read_pol << 3 | + sig.write_pol << 4 | sig.Vsync_pol << 5 | + sig.burst_pol << 29; + __raw_writel(old_pol, DI_DISP_SIG_POL); + + disp_conf &= ~0x0000001FL; + disp_conf |= (sig.burst_mode << 3) | (sig.ifc_mode << 1) | + DI_CONF_DISP0_EN; + __raw_writel(disp_conf, DI_DISP_IF_CONF); + break; + case DISP1: + __raw_writel(adc_disp_conf, ADC_DISP1_CONF); + __raw_writel((((height - 1) << 16) | (width - 1)), + ADC_DISP12_SS); + + adc_disp_vsync &= ~(ADC_DISP_VSYNC_D12_MODE_MASK | + ADC_DISP_VSYNC_D12_WIDTH_MASK); + adc_disp_vsync |= (vsync_width << 16) | (uint32_t) mode; + + old_pol &= ~0x4000FF00L; + old_pol |= (sig.Vsync_pol << 6 | sig.data_pol << 8 | + sig.cs_pol << 9 | sig.addr_pol << 10 | + sig.read_pol << 11 | sig.write_pol << 12 | + sig.clk_pol << 14 | sig.burst_pol << 30); + __raw_writel(old_pol, DI_DISP_SIG_POL); + + disp_conf &= ~0x00003F00L; + if (sig.ifc_mode >= IPU_ADC_IFC_MODE_3WIRE_SERIAL) { + ser_conf = (sig.ifc_width - 1) << + DI_SER_DISPx_CONF_SER_BIT_NUM_OFFSET; + if (sig.ser_preamble_len) { + ser_conf |= DI_SER_DISPx_CONF_PREAMBLE_EN; + ser_conf |= sig.ser_preamble << + DI_SER_DISPx_CONF_PREAMBLE_OFFSET; + ser_conf |= (sig.ser_preamble_len - 1) << + DI_SER_DISPx_CONF_PREAMBLE_LEN_OFFSET; + } + + ser_conf |= + sig.ser_rw_mode << DI_SER_DISPx_CONF_RW_CFG_OFFSET; + + if (sig.burst_mode == IPU_ADC_BURST_SERIAL) + ser_conf |= DI_SER_DISPx_CONF_BURST_MODE_EN; + __raw_writel(ser_conf, DI_SER_DISP1_CONF); + } else { /* parallel interface */ + disp_conf |= (uint32_t) (sig.burst_mode << 12); + } + disp_conf |= (sig.ifc_mode << 9) | DI_CONF_DISP1_EN; + __raw_writel(disp_conf, DI_DISP_IF_CONF); + break; + case DISP2: + __raw_writel(adc_disp_conf, ADC_DISP2_CONF); + __raw_writel((((height - 1) << 16) | (width - 1)), + ADC_DISP12_SS); + + adc_disp_vsync &= ~(ADC_DISP_VSYNC_D12_MODE_MASK | + ADC_DISP_VSYNC_D12_WIDTH_MASK); + adc_disp_vsync |= (vsync_width << 16) | (uint32_t) mode; + + old_pol &= ~0x80FF0000L; + temp = (uint32_t) (sig.data_pol << 16 | sig.cs_pol << 17 | + sig.addr_pol << 18 | sig.read_pol << 19 | + sig.write_pol << 20 | sig.Vsync_pol << 6 | + sig.burst_pol << 31 | sig.clk_pol << 22); + __raw_writel(temp | old_pol, DI_DISP_SIG_POL); + + disp_conf &= ~0x003F0000L; + if (sig.ifc_mode >= IPU_ADC_IFC_MODE_3WIRE_SERIAL) { + ser_conf = (sig.ifc_width - 1) << + DI_SER_DISPx_CONF_SER_BIT_NUM_OFFSET; + if (sig.ser_preamble_len) { + ser_conf |= DI_SER_DISPx_CONF_PREAMBLE_EN; + ser_conf |= sig.ser_preamble << + DI_SER_DISPx_CONF_PREAMBLE_OFFSET; + ser_conf |= (sig.ser_preamble_len - 1) << + DI_SER_DISPx_CONF_PREAMBLE_LEN_OFFSET; + + } + + ser_conf |= + sig.ser_rw_mode << DI_SER_DISPx_CONF_RW_CFG_OFFSET; + + if (sig.burst_mode == IPU_ADC_BURST_SERIAL) + ser_conf |= DI_SER_DISPx_CONF_BURST_MODE_EN; + __raw_writel(ser_conf, DI_SER_DISP2_CONF); + } else { /* parallel interface */ + disp_conf |= (uint32_t) (sig.burst_mode << 20); + } + disp_conf |= (sig.ifc_mode << 17) | DI_CONF_DISP2_EN; + __raw_writel(disp_conf, DI_DISP_IF_CONF); + break; + default: + break; + } + + __raw_writel(adc_disp_vsync, ADC_DISP_VSYNC); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +int32_t ipu_adc_init_ifc_timing(display_port_t disp, bool read, + uint32_t cycle_time, + uint32_t up_time, + uint32_t down_time, + uint32_t read_latch_time, uint32_t pixel_clk) +{ + uint32_t reg; + uint32_t time_conf3 = 0; + uint32_t clk_per; + uint32_t up_per; + uint32_t down_per; + uint32_t read_per; + uint32_t pixclk_per = 0; + uint32_t ipu_freq; + + ipu_freq = clk_get_rate(g_ipu_clk); + + clk_per = (cycle_time * (ipu_freq / 1000L) * 16L) / 1000000L; + up_per = (up_time * (ipu_freq / 1000L) * 4L) / 1000000L; + down_per = (down_time * (ipu_freq / 1000L) * 4L) / 1000000L; + + reg = (clk_per << DISPx_IF_CLK_PER_OFFSET) | + (up_per << DISPx_IF_CLK_UP_OFFSET) | + (down_per << DISPx_IF_CLK_DOWN_OFFSET); + + if (read) { + read_per = + (read_latch_time * (ipu_freq / 1000L) * 4L) / 1000000L; + if (pixel_clk) + pixclk_per = (ipu_freq * 16L) / pixel_clk; + time_conf3 = (read_per << DISPx_IF_CLK_READ_EN_OFFSET) | + (pixclk_per << DISPx_PIX_CLK_PER_OFFSET); + } + + dev_dbg(g_ipu_dev, "DI_DISPx_TIME_CONF_1/2 = 0x%08X\n", reg); + dev_dbg(g_ipu_dev, "DI_DISPx_TIME_CONF_3 = 0x%08X\n", time_conf3); + + switch (disp) { + case DISP0: + if (read) { + __raw_writel(reg, DI_DISP0_TIME_CONF_2); + __raw_writel(time_conf3, DI_DISP0_TIME_CONF_3); + } else { + __raw_writel(reg, DI_DISP0_TIME_CONF_1); + } + break; + case DISP1: + if (read) { + __raw_writel(reg, DI_DISP1_TIME_CONF_2); + __raw_writel(time_conf3, DI_DISP1_TIME_CONF_3); + } else { + __raw_writel(reg, DI_DISP1_TIME_CONF_1); + } + break; + case DISP2: + if (read) { + __raw_writel(reg, DI_DISP2_TIME_CONF_2); + __raw_writel(time_conf3, DI_DISP2_TIME_CONF_3); + } else { + __raw_writel(reg, DI_DISP2_TIME_CONF_1); + } + break; + default: + return -EINVAL; + break; + } + + return 0; +} + +struct ipu_adc_di_map { + uint32_t map_byte1; + uint32_t map_byte2; + uint32_t map_byte3; + uint32_t cycle_cnt; +}; + +static const struct ipu_adc_di_map di_mappings[] = { + [0] = { + /* RGB888, 8-bit bus */ + .map_byte1 = 0x1600AAAA, + .map_byte2 = 0x00E05555, + .map_byte2 = 0x00070000, + .cycle_cnt = 3, + }, + [1] = { + /* RGB666, 8-bit bus */ + .map_byte1 = 0x1C00AAAF, + .map_byte2 = 0x00E0555F, + .map_byte3 = 0x0007000F, + .cycle_cnt = 3, + }, + [2] = { + /* RGB565, 8-bit bus */ + .map_byte1 = 0x008055BF, + .map_byte2 = 0x0142015F, + .map_byte3 = 0x0007003F, + .cycle_cnt = 2, + }, + [3] = { + /* RGB888, 24-bit bus */ + .map_byte1 = 0x0007000F, + .map_byte2 = 0x000F000F, + .map_byte3 = 0x0017000F, + .cycle_cnt = 1, + }, + [4] = { + /* RGB666, 18-bit bus */ + .map_byte1 = 0x0005000F, + .map_byte2 = 0x000B000F, + .map_byte3 = 0x0011000F, + .cycle_cnt = 1, + }, + [5] = { + /* RGB565, 16-bit bus */ + .map_byte1 = 0x0004003F, + .map_byte2 = 0x000A000F, + .map_byte3 = 0x000F003F, + .cycle_cnt = 1, + }, +}; + +/* Private methods */ +static void _ipu_set_cmd_data_mappings(display_port_t disp, + uint32_t pixel_fmt, int ifc_width) +{ + uint32_t reg; + u32 map = 0; + + if (ifc_width == 8) { + switch (pixel_fmt) { + case IPU_PIX_FMT_BGR24: + map = 0; + break; + case IPU_PIX_FMT_RGB666: + map = 1; + break; + case IPU_PIX_FMT_RGB565: + map = 2; + break; + default: + break; + } + } else if (ifc_width >= 16) { + switch (pixel_fmt) { + case IPU_PIX_FMT_BGR24: + map = 3; + break; + case IPU_PIX_FMT_RGB666: + map = 4; + break; + case IPU_PIX_FMT_RGB565: + map = 5; + break; + default: + break; + } + } + + switch (disp) { + case DISP0: + if (ifc_width == 8) { + __raw_writel(0x00070000, DI_DISP0_CB0_MAP); + __raw_writel(0x0000FFFF, DI_DISP0_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP0_CB2_MAP); + } else { + __raw_writel(0x00070000, DI_DISP0_CB0_MAP); + __raw_writel(0x000F0000, DI_DISP0_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP0_CB2_MAP); + } + __raw_writel(di_mappings[map].map_byte1, DI_DISP0_DB0_MAP); + __raw_writel(di_mappings[map].map_byte2, DI_DISP0_DB1_MAP); + __raw_writel(di_mappings[map].map_byte3, DI_DISP0_DB2_MAP); + reg = __raw_readl(DI_DISP_ACC_CC); + reg &= ~DISP0_IF_CLK_CNT_D_MASK; + reg |= (di_mappings[map].cycle_cnt - 1) << + DISP0_IF_CLK_CNT_D_OFFSET; + __raw_writel(reg, DI_DISP_ACC_CC); + break; + case DISP1: + if (ifc_width == 8) { + __raw_writel(0x00070000, DI_DISP1_CB0_MAP); + __raw_writel(0x0000FFFF, DI_DISP1_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP1_CB2_MAP); + } else { + __raw_writel(0x00070000, DI_DISP1_CB0_MAP); + __raw_writel(0x000F0000, DI_DISP1_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP1_CB2_MAP); + } + __raw_writel(di_mappings[map].map_byte1, DI_DISP1_DB0_MAP); + __raw_writel(di_mappings[map].map_byte2, DI_DISP1_DB1_MAP); + __raw_writel(di_mappings[map].map_byte3, DI_DISP1_DB2_MAP); + reg = __raw_readl(DI_DISP_ACC_CC); + reg &= ~DISP1_IF_CLK_CNT_D_MASK; + reg |= (di_mappings[map].cycle_cnt - 1) << + DISP1_IF_CLK_CNT_D_OFFSET; + __raw_writel(reg, DI_DISP_ACC_CC); + break; + case DISP2: + if (ifc_width == 8) { + __raw_writel(0x00070000, DI_DISP2_CB0_MAP); + __raw_writel(0x0000FFFF, DI_DISP2_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP2_CB2_MAP); + } else { + __raw_writel(0x00070000, DI_DISP2_CB0_MAP); + __raw_writel(0x000F0000, DI_DISP2_CB1_MAP); + __raw_writel(0x0000FFFF, DI_DISP2_CB2_MAP); + } + __raw_writel(di_mappings[map].map_byte1, DI_DISP2_DB0_MAP); + __raw_writel(di_mappings[map].map_byte2, DI_DISP2_DB1_MAP); + __raw_writel(di_mappings[map].map_byte3, DI_DISP2_DB2_MAP); + reg = __raw_readl(DI_DISP_ACC_CC); + reg &= ~DISP2_IF_CLK_CNT_D_MASK; + reg |= (di_mappings[map].cycle_cnt - 1) << + DISP2_IF_CLK_CNT_D_OFFSET; + __raw_writel(reg, DI_DISP_ACC_CC); + break; + default: + break; + } +} + +void ipu_disp_direct_write(ipu_channel_t channel, u32 value, u32 offset) +{ + /*TODO*/ +} + +int ipu_init_async_panel(int disp, int type, uint32_t cycle_time, + uint32_t pixel_fmt, ipu_adc_sig_cfg_t sig) +{ + /*TODO:uniform interface for ipu async panel init*/ + return -1; +} + +EXPORT_SYMBOL(ipu_adc_write_template); +EXPORT_SYMBOL(ipu_adc_write_cmd); +EXPORT_SYMBOL(ipu_adc_set_update_mode); +EXPORT_SYMBOL(ipu_adc_init_panel); +EXPORT_SYMBOL(ipu_adc_init_ifc_timing); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/Kconfig @@ -0,0 +1,4 @@ +config MXC_IPU_V1 + bool + +source "drivers/mxc/ipu/pf/Kconfig" --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_param_mem.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_param_mem.h @@ -0,0 +1,176 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __INCLUDE_IPU_PARAM_MEM_H__ +#define __INCLUDE_IPU_PARAM_MEM_H__ + +#include + +static __inline void _ipu_ch_param_set_size(uint32_t * params, + uint32_t pixel_fmt, uint16_t width, + uint16_t height, uint16_t stride, + uint32_t u, uint32_t v) +{ + uint32_t u_offset = 0; + uint32_t v_offset = 0; + memset(params, 0, 40); + + params[3] = + (uint32_t) ((width - 1) << 12) | ((uint32_t) (height - 1) << 24); + params[4] = (uint32_t) (height - 1) >> 8; + params[7] = (uint32_t) (stride - 1) << 3; + + switch (pixel_fmt) { + case IPU_PIX_FMT_GENERIC: + /*Represents 8-bit Generic data */ + params[7] |= 3 | (7UL << (81 - 64)) | (31L << (89 - 64)); /* BPP & PFS */ + params[8] = 2; /* SAT = use 32-bit access */ + break; + case IPU_PIX_FMT_GENERIC_32: + /*Represents 32-bit Generic data */ + params[7] |= (7UL << (81 - 64)) | (7L << (89 - 64)); /* BPP & PFS */ + params[8] = 2; /* SAT = use 32-bit access */ + break; + case IPU_PIX_FMT_RGB565: + params[7] |= 2L | (4UL << (81 - 64)) | (7L << (89 - 64)); /* BPP & PFS */ + params[8] = 2 | /* SAT = 32-bit access */ + (0UL << (99 - 96)) | /* Red bit offset */ + (5UL << (104 - 96)) | /* Green bit offset */ + (11UL << (109 - 96)) | /* Blue bit offset */ + (16UL << (114 - 96)) | /* Alpha bit offset */ + (4UL << (119 - 96)) | /* Red bit width - 1 */ + (5UL << (122 - 96)) | /* Green bit width - 1 */ + (4UL << (125 - 96)); /* Blue bit width - 1 */ + break; + case IPU_PIX_FMT_BGR24: /* 24 BPP & RGB PFS */ + params[7] |= 1 | (4UL << (81 - 64)) | (7L << (89 - 64)); + params[8] = 2 | /* SAT = 32-bit access */ + (8UL << (104 - 96)) | /* Green bit offset */ + (16UL << (109 - 96)) | /* Blue bit offset */ + (24UL << (114 - 96)) | /* Alpha bit offset */ + (7UL << (119 - 96)) | /* Red bit width - 1 */ + (7UL << (122 - 96)) | /* Green bit width - 1 */ + (uint32_t) (7UL << (125 - 96)); /* Blue bit width - 1 */ + break; + case IPU_PIX_FMT_RGB24: /* 24 BPP & RGB PFS */ + params[7] |= 1 | (4UL << (81 - 64)) | (7L << (89 - 64)); + params[8] = 2 | /* SAT = 32-bit access */ + (16UL << (99 - 96)) | /* Red bit offset */ + (8UL << (104 - 96)) | /* Green bit offset */ + (0UL << (109 - 96)) | /* Blue bit offset */ + (24UL << (114 - 96)) | /* Alpha bit offset */ + (7UL << (119 - 96)) | /* Red bit width - 1 */ + (7UL << (122 - 96)) | /* Green bit width - 1 */ + (uint32_t) (7UL << (125 - 96)); /* Blue bit width - 1 */ + break; + case IPU_PIX_FMT_BGRA32: + case IPU_PIX_FMT_BGR32: + /* BPP & pixel fmt */ + params[7] |= 0 | (4UL << (81 - 64)) | (7 << (89 - 64)); + params[8] = 2 | /* SAT = 32-bit access */ + (8UL << (99 - 96)) | /* Red bit offset */ + (16UL << (104 - 96)) | /* Green bit offset */ + (24UL << (109 - 96)) | /* Blue bit offset */ + (0UL << (114 - 96)) | /* Alpha bit offset */ + (7UL << (119 - 96)) | /* Red bit width - 1 */ + (7UL << (122 - 96)) | /* Green bit width - 1 */ + (uint32_t) (7UL << (125 - 96)); /* Blue bit width - 1 */ + params[9] = 7; /* Alpha bit width - 1 */ + break; + case IPU_PIX_FMT_RGBA32: + case IPU_PIX_FMT_RGB32: + /* BPP & pixel fmt */ + params[7] |= 0 | (4UL << (81 - 64)) | (7 << (89 - 64)); + params[8] = 2 | /* SAT = 32-bit access */ + (24UL << (99 - 96)) | /* Red bit offset */ + (16UL << (104 - 96)) | /* Green bit offset */ + (8UL << (109 - 96)) | /* Blue bit offset */ + (0UL << (114 - 96)) | /* Alpha bit offset */ + (7UL << (119 - 96)) | /* Red bit width - 1 */ + (7UL << (122 - 96)) | /* Green bit width - 1 */ + (uint32_t) (7UL << (125 - 96)); /* Blue bit width - 1 */ + params[9] = 7; /* Alpha bit width - 1 */ + break; + case IPU_PIX_FMT_ABGR32: + /* BPP & pixel fmt */ + params[7] |= 0 | (4UL << (81 - 64)) | (7 << (89 - 64)); + params[8] = 2 | /* SAT = 32-bit access */ + (0UL << (99 - 96)) | /* Alpha bit offset */ + (8UL << (104 - 96)) | /* Blue bit offset */ + (16UL << (109 - 96)) | /* Green bit offset */ + (24UL << (114 - 96)) | /* Red bit offset */ + (7UL << (119 - 96)) | /* Alpha bit width - 1 */ + (7UL << (122 - 96)) | /* Blue bit width - 1 */ + (uint32_t) (7UL << (125 - 96)); /* Green bit width - 1 */ + params[9] = 7; /* Red bit width - 1 */ + break; + case IPU_PIX_FMT_UYVY: + /* BPP & pixel format */ + params[7] |= 2 | (6UL << 17) | (7 << (89 - 64)); + params[8] = 2; /* SAT = 32-bit access */ + break; + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + /* BPP & pixel format */ + params[7] |= 3 | (3UL << 17) | (7 << (89 - 64)); + params[8] = 2; /* SAT = 32-bit access */ + u_offset = (u == 0) ? stride * height : u; + v_offset = (v == 0) ? u_offset + u_offset / 4 : v; + break; + case IPU_PIX_FMT_YVU422P: + /* BPP & pixel format */ + params[7] |= 3 | (2UL << 17) | (7 << (89 - 64)); + params[8] = 2; /* SAT = 32-bit access */ + v_offset = (v == 0) ? stride * height : v; + u_offset = (u == 0) ? v_offset + v_offset / 2 : u; + break; + case IPU_PIX_FMT_YUV422P: + /* BPP & pixel format */ + params[7] |= 3 | (2UL << 17) | (7 << (89 - 64)); + params[8] = 2; /* SAT = 32-bit access */ + u_offset = (u == 0) ? stride * height : u; + v_offset = (v == 0) ? u_offset + u_offset / 2 : v; + break; + default: + dev_err(g_ipu_dev, "mxc ipu: unimplemented pixel format\n"); + break; + } + + params[1] = (1UL << (46 - 32)) | (u_offset << (53 - 32)); + params[2] = u_offset >> (64 - 53); + params[2] |= v_offset << (79 - 64); + params[3] |= v_offset >> (96 - 79); +} + +static __inline void _ipu_ch_param_set_burst_size(uint32_t * params, + uint16_t burst_pixels) +{ + params[7] &= ~(0x3FL << (89 - 64)); + params[7] |= (uint32_t) (burst_pixels - 1) << (89 - 64); +}; + +static __inline void _ipu_ch_param_set_buffer(uint32_t * params, + dma_addr_t buf0, dma_addr_t buf1) +{ + params[5] = buf0; + params[6] = buf1; +}; + +static __inline void _ipu_ch_param_set_rotation(uint32_t * params, + ipu_rotate_mode_t rot) +{ + params[7] |= (uint32_t) rot << (84 - 64); +}; + +void _ipu_write_param_mem(uint32_t addr, uint32_t * data, uint32_t numWords); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_prv.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_prv.h @@ -0,0 +1,59 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __INCLUDE_IPU_PRV_H__ +#define __INCLUDE_IPU_PRV_H__ + +#include +#include +#include +#include +#include + +/* Globals */ +extern struct device *g_ipu_dev; +extern spinlock_t ipu_lock; +extern struct clk *g_ipu_clk; +extern struct clk *g_ipu_csi_clk; + +int register_ipu_device(void); +ipu_color_space_t format_to_colorspace(uint32_t fmt); + +uint32_t _ipu_channel_status(ipu_channel_t channel); + +void _ipu_sdc_fg_init(ipu_channel_params_t * params); +uint32_t _ipu_sdc_fg_uninit(void); +void _ipu_sdc_bg_init(ipu_channel_params_t * params); +uint32_t _ipu_sdc_bg_uninit(void); + +void _ipu_ic_enable_task(ipu_channel_t channel); +void _ipu_ic_disable_task(ipu_channel_t channel); +void _ipu_ic_init_prpvf(ipu_channel_params_t * params, bool src_is_csi); +void _ipu_ic_uninit_prpvf(void); +void _ipu_ic_init_rotate_vf(ipu_channel_params_t * params); +void _ipu_ic_uninit_rotate_vf(void); +void _ipu_ic_init_csi(ipu_channel_params_t * params); +void _ipu_ic_uninit_csi(void); +void _ipu_ic_init_prpenc(ipu_channel_params_t * params, bool src_is_csi); +void _ipu_ic_uninit_prpenc(void); +void _ipu_ic_init_rotate_enc(ipu_channel_params_t * params); +void _ipu_ic_uninit_rotate_enc(void); +void _ipu_ic_init_pp(ipu_channel_params_t * params); +void _ipu_ic_uninit_pp(void); +void _ipu_ic_init_rotate_pp(ipu_channel_params_t * params); +void _ipu_ic_uninit_rotate_pp(void); + +int32_t _ipu_adc_init_channel(ipu_channel_t chan, display_port_t disp, + mcu_mode_t cmd, int16_t x_pos, int16_t y_pos); +int32_t _ipu_adc_uninit_channel(ipu_channel_t chan); + +#endif /* __INCLUDE_IPU_PRV_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_csi.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_csi.c @@ -0,0 +1,222 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_csi.c + * + * @brief IPU CMOS Sensor interface functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" + +static bool gipu_csi_get_mclk_flag = false; +static int csi_mclk_flag = 0; + +extern void gpio_sensor_suspend(bool flag); + +/*! + * ipu_csi_init_interface + * Sets initial values for the CSI registers. + * The width and height of the sensor and the actual frame size will be + * set to the same values. + * @param width Sensor width + * @param height Sensor height + * @param pixel_fmt pixel format + * @param sig ipu_csi_signal_cfg_t structure + * + * @return 0 for success, -EINVAL for error + */ +int32_t +ipu_csi_init_interface(uint16_t width, uint16_t height, uint32_t pixel_fmt, + ipu_csi_signal_cfg_t sig) +{ + uint32_t data = 0; + + /* Set SENS_DATA_FORMAT bits (8 and 9) + RGB or YUV444 is 0 which is current value in data so not set explicitly + This is also the default value if attempts are made to set it to + something invalid. */ + switch (pixel_fmt) { + case IPU_PIX_FMT_UYVY: + data = CSI_SENS_CONF_DATA_FMT_YUV422; + break; + case IPU_PIX_FMT_RGB24: + case IPU_PIX_FMT_BGR24: + data = CSI_SENS_CONF_DATA_FMT_RGB_YUV444; + break; + case IPU_PIX_FMT_GENERIC: + data = CSI_SENS_CONF_DATA_FMT_BAYER; + break; + default: + return -EINVAL; + } + + /* Set the CSI_SENS_CONF register remaining fields */ + data |= sig.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT | + sig.data_pol << CSI_SENS_CONF_DATA_POL_SHIFT | + sig.Vsync_pol << CSI_SENS_CONF_VSYNC_POL_SHIFT | + sig.Hsync_pol << CSI_SENS_CONF_HSYNC_POL_SHIFT | + sig.pixclk_pol << CSI_SENS_CONF_PIX_CLK_POL_SHIFT | + sig.ext_vsync << CSI_SENS_CONF_EXT_VSYNC_SHIFT | + sig.clk_mode << CSI_SENS_CONF_SENS_PRTCL_SHIFT | + sig.sens_clksrc << CSI_SENS_CONF_SENS_CLKSRC_SHIFT; + + __raw_writel(data, CSI_SENS_CONF); + + /* Setup frame size */ + __raw_writel(width | height << 16, CSI_SENS_FRM_SIZE); + + __raw_writel(width << 16, CSI_FLASH_STROBE_1); + __raw_writel(height << 16 | 0x22, CSI_FLASH_STROBE_2); + + /* Set CCIR registers */ + if ((sig.clk_mode == IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE) || + (sig.clk_mode == IPU_CSI_CLK_MODE_CCIR656_INTERLACED)) { + __raw_writel(0x40030, CSI_CCIR_CODE_1); + __raw_writel(0xFF0000, CSI_CCIR_CODE_3); + } + + dev_dbg(g_ipu_dev, "CSI_SENS_CONF = 0x%08X\n", + __raw_readl(CSI_SENS_CONF)); + dev_dbg(g_ipu_dev, "CSI_ACT_FRM_SIZE = 0x%08X\n", + __raw_readl(CSI_ACT_FRM_SIZE)); + + return 0; +} + +/*! + * ipu_csi_flash_strobe + * + * @param flag true to turn on flash strobe + * + * @return 0 for success + */ +void ipu_csi_flash_strobe(bool flag) +{ + if (flag == true) { + __raw_writel(__raw_readl(CSI_FLASH_STROBE_2) | 0x1, + CSI_FLASH_STROBE_2); + } +} + +/*! + * ipu_csi_enable_mclk + * + * @param src enum define which source to control the clk + * CSI_MCLK_VF CSI_MCLK_ENC CSI_MCLK_RAW CSI_MCLK_I2C + * @param flag true to enable mclk, false to disable mclk + * @param wait true to wait 100ms make clock stable, false not wait + * + * @return 0 for success + */ +int32_t ipu_csi_enable_mclk(int src, bool flag, bool wait) +{ + if (flag == true) { + csi_mclk_flag |= src; + } else { + csi_mclk_flag &= ~src; + } + + if (gipu_csi_get_mclk_flag == flag) + return 0; + + if (flag == true) { + clk_enable(g_ipu_csi_clk); + if (wait == true) + msleep(10); + /*printk("enable csi clock from source %d\n", src); */ + gipu_csi_get_mclk_flag = true; + } else if (csi_mclk_flag == 0) { + clk_disable(g_ipu_csi_clk); + /*printk("disable csi clock from source %d\n", src); */ + gipu_csi_get_mclk_flag = flag; + } + + return 0; +} + +/*! + * ipu_csi_read_mclk_flag + * + * @return csi_mclk_flag + */ +int ipu_csi_read_mclk_flag(void) +{ + return csi_mclk_flag; +} + +/*! + * ipu_csi_get_window_size + * + * @param width pointer to window width + * @param height pointer to window height + * @param dummy dummy for IPUv1 to keep the same interface with IPUv3 + * + */ +void ipu_csi_get_window_size(uint32_t *width, uint32_t *height, + uint32_t dummy) +{ + uint32_t reg; + + reg = __raw_readl(CSI_ACT_FRM_SIZE); + *width = (reg & 0xFFFF) + 1; + *height = (reg >> 16 & 0xFFFF) + 1; +} + +/*! + * ipu_csi_set_window_size + * + * @param width window width + * @param height window height + * @param dummy dummy for IPUv1 to keep the same interface with IPUv3 + * + */ +void ipu_csi_set_window_size(uint32_t width, uint32_t height, uint32_t dummy) +{ + __raw_writel((width - 1) | (height - 1) << 16, CSI_ACT_FRM_SIZE); +} + +/*! + * ipu_csi_set_window_pos + * + * @param left uint32 window x start + * @param top uint32 window y start + * @param dummy dummy for IPUv1 to keep the same interface with IPUv3 + * + */ +void ipu_csi_set_window_pos(uint32_t left, uint32_t top, uint32_t dummy) +{ + uint32_t temp = __raw_readl(CSI_OUT_FRM_CTRL); + temp &= 0xffff0000; + temp = top | (left << 8) | temp; + __raw_writel(temp, CSI_OUT_FRM_CTRL); +} + +/* Exported symbols for modules. */ +EXPORT_SYMBOL(ipu_csi_set_window_pos); +EXPORT_SYMBOL(ipu_csi_set_window_size); +EXPORT_SYMBOL(ipu_csi_get_window_size); +EXPORT_SYMBOL(ipu_csi_read_mclk_flag); +EXPORT_SYMBOL(ipu_csi_enable_mclk); +EXPORT_SYMBOL(ipu_csi_flash_strobe); +EXPORT_SYMBOL(ipu_csi_init_interface); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_sdc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_sdc.c @@ -0,0 +1,357 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_sdc.c + * + * @brief IPU SDC submodule API functions + * + * @ingroup IPU + */ +#include +#include +#include +#include +#include +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +static uint32_t g_h_start_width; +static uint32_t g_v_start_width; + +static const uint32_t di_mappings[] = { + 0x1600AAAA, 0x00E05555, 0x00070000, 3, /* RGB888 */ + 0x0005000F, 0x000B000F, 0x0011000F, 1, /* RGB666 */ + 0x0011000F, 0x000B000F, 0x0005000F, 1, /* BGR666 */ + 0x0004003F, 0x000A000F, 0x000F003F, 1 /* RGB565 */ +}; + +/*! + * This function is called to initialize a synchronous LCD panel. + * + * @param panel The type of panel. + * + * @param pixel_clk Desired pixel clock frequency in Hz. + * + * @param pixel_fmt Input parameter for pixel format of buffer. Pixel + * format is a FOURCC ASCII code. + * + * @param width The width of panel in pixels. + * + * @param height The height of panel in pixels. + * + * @param hStartWidth The number of pixel clocks between the HSYNC + * signal pulse and the start of valid data. + * + * @param hSyncWidth The width of the HSYNC signal in units of pixel + * clocks. + * + * @param hEndWidth The number of pixel clocks between the end of + * valid data and the HSYNC signal for next line. + * + * @param vStartWidth The number of lines between the VSYNC + * signal pulse and the start of valid data. + * + * @param vSyncWidth The width of the VSYNC signal in units of lines + * + * @param vEndWidth The number of lines between the end of valid + * data and the VSYNC signal for next frame. + * + * @param sig Bitfield of signal polarities for LCD interface. + * + * @return This function returns 0 on success or negative error code on + * fail. + */ +int32_t ipu_sdc_init_panel(ipu_panel_t panel, + uint32_t pixel_clk, + uint16_t width, uint16_t height, + uint32_t pixel_fmt, + uint16_t h_start_width, uint16_t h_sync_width, + uint16_t h_end_width, uint16_t v_start_width, + uint16_t v_sync_width, uint16_t v_end_width, + ipu_di_signal_cfg_t sig) +{ + unsigned long lock_flags; + uint32_t reg; + uint32_t old_conf; + uint32_t div; + + dev_dbg(g_ipu_dev, "panel size = %d x %d\n", width, height); + + if ((v_sync_width == 0) || (h_sync_width == 0)) + return EINVAL; + + /* Init panel size and blanking periods */ + reg = + ((uint32_t) (h_sync_width - 1) << 26) | + ((uint32_t) (width + h_sync_width + h_start_width + h_end_width - 1) + << 16); + __raw_writel(reg, SDC_HOR_CONF); + + reg = ((uint32_t) (v_sync_width - 1) << 26) | SDC_V_SYNC_WIDTH_L | + ((uint32_t) + (height + v_sync_width + v_start_width + v_end_width - 1) << 16); + __raw_writel(reg, SDC_VER_CONF); + + g_h_start_width = h_start_width + h_sync_width; + g_v_start_width = v_start_width + v_sync_width; + + switch (panel) { + case IPU_PANEL_SHARP_TFT: + __raw_writel(0x00FD0102L, SDC_SHARP_CONF_1); + __raw_writel(0x00F500F4L, SDC_SHARP_CONF_2); + __raw_writel(SDC_COM_SHARP | SDC_COM_TFT_COLOR, SDC_COM_CONF); + break; + case IPU_PANEL_TFT: + __raw_writel(SDC_COM_TFT_COLOR, SDC_COM_CONF); + break; + default: + return EINVAL; + } + + spin_lock_irqsave(&ipu_lock, lock_flags); + + /* Init clocking */ + + /* Calculate divider */ + /* fractional part is 4 bits so simply multiple by 2^4 to get fractional part */ + dev_dbg(g_ipu_dev, "pixel clk = %d\n", pixel_clk); + div = (clk_get_rate(g_ipu_clk) * 16) / pixel_clk; + if (div < 0x40) { /* Divider less than 4 */ + dev_dbg(g_ipu_dev, + "InitPanel() - Pixel clock divider less than 1\n"); + div = 0x40; + } + /* DISP3_IF_CLK_DOWN_WR is half the divider value and 2 less fraction bits */ + /* Subtract 1 extra from DISP3_IF_CLK_DOWN_WR based on timing debug */ + /* DISP3_IF_CLK_UP_WR is 0 */ + __raw_writel((((div / 8) - 1) << 22) | div, DI_DISP3_TIME_CONF); + + /* DI settings */ + old_conf = __raw_readl(DI_DISP_IF_CONF) & 0x78FFFFFF; + old_conf |= sig.datamask_en << DI_D3_DATAMSK_SHIFT | + sig.clksel_en << DI_D3_CLK_SEL_SHIFT | + sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT; + __raw_writel(old_conf, DI_DISP_IF_CONF); + + old_conf = __raw_readl(DI_DISP_SIG_POL) & 0xE0FFFFFF; + old_conf |= sig.data_pol << DI_D3_DATA_POL_SHIFT | + sig.clk_pol << DI_D3_CLK_POL_SHIFT | + sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT | + sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT | + sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT; + __raw_writel(old_conf, DI_DISP_SIG_POL); + + switch (pixel_fmt) { + case IPU_PIX_FMT_RGB24: + __raw_writel(di_mappings[0], DI_DISP3_B0_MAP); + __raw_writel(di_mappings[1], DI_DISP3_B1_MAP); + __raw_writel(di_mappings[2], DI_DISP3_B2_MAP); + __raw_writel(__raw_readl(DI_DISP_ACC_CC) | + ((di_mappings[3] - 1) << 12), DI_DISP_ACC_CC); + break; + case IPU_PIX_FMT_RGB666: + __raw_writel(di_mappings[4], DI_DISP3_B0_MAP); + __raw_writel(di_mappings[5], DI_DISP3_B1_MAP); + __raw_writel(di_mappings[6], DI_DISP3_B2_MAP); + __raw_writel(__raw_readl(DI_DISP_ACC_CC) | + ((di_mappings[7] - 1) << 12), DI_DISP_ACC_CC); + break; + case IPU_PIX_FMT_BGR666: + __raw_writel(di_mappings[8], DI_DISP3_B0_MAP); + __raw_writel(di_mappings[9], DI_DISP3_B1_MAP); + __raw_writel(di_mappings[10], DI_DISP3_B2_MAP); + __raw_writel(__raw_readl(DI_DISP_ACC_CC) | + ((di_mappings[11] - 1) << 12), DI_DISP_ACC_CC); + break; + default: + __raw_writel(di_mappings[12], DI_DISP3_B0_MAP); + __raw_writel(di_mappings[13], DI_DISP3_B1_MAP); + __raw_writel(di_mappings[14], DI_DISP3_B2_MAP); + __raw_writel(__raw_readl(DI_DISP_ACC_CC) | + ((di_mappings[15] - 1) << 12), DI_DISP_ACC_CC); + break; + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + dev_dbg(g_ipu_dev, "DI_DISP_IF_CONF = 0x%08X\n", + __raw_readl(DI_DISP_IF_CONF)); + dev_dbg(g_ipu_dev, "DI_DISP_SIG_POL = 0x%08X\n", + __raw_readl(DI_DISP_SIG_POL)); + dev_dbg(g_ipu_dev, "DI_DISP3_TIME_CONF = 0x%08X\n", + __raw_readl(DI_DISP3_TIME_CONF)); + + return 0; +} + +/*! + * This function sets the foreground and background plane global alpha blending + * modes. + * + * @param enable Boolean to enable or disable global alpha + * blending. If disabled, per pixel blending is used. + * + * @param alpha Global alpha value. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_sdc_set_global_alpha(bool enable, uint8_t alpha) +{ + uint32_t reg; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + if (enable) { + reg = __raw_readl(SDC_GW_CTRL) & 0x00FFFFFFL; + __raw_writel(reg | ((uint32_t) alpha << 24), SDC_GW_CTRL); + + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg | SDC_COM_GLB_A, SDC_COM_CONF); + } else { + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg & ~SDC_COM_GLB_A, SDC_COM_CONF); + } + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +/*! + * This function sets the transparent color key for SDC graphic plane. + * + * @param channel Input parameter for the logical channel ID. + * + * @param enable Boolean to enable or disable color key + * + * @param colorKey 24-bit RGB color to use as transparent color key. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_sdc_set_color_key(ipu_channel_t channel, bool enable, + uint32_t color_key) +{ + uint32_t reg, sdc_conf; + unsigned long lock_flags; + + spin_lock_irqsave(&ipu_lock, lock_flags); + + sdc_conf = __raw_readl(SDC_COM_CONF); + if (channel == MEM_SDC_BG) { + sdc_conf &= ~SDC_COM_GWSEL; + } else { + sdc_conf |= SDC_COM_GWSEL; + } + + if (enable) { + reg = __raw_readl(SDC_GW_CTRL) & 0xFF000000L; + __raw_writel(reg | (color_key & 0x00FFFFFFL), SDC_GW_CTRL); + + sdc_conf |= SDC_COM_KEY_COLOR_G; + } else { + sdc_conf &= ~SDC_COM_KEY_COLOR_G; + } + __raw_writel(sdc_conf, SDC_COM_CONF); + + spin_unlock_irqrestore(&ipu_lock, lock_flags); + + return 0; +} + +int32_t ipu_sdc_set_brightness(uint8_t value) +{ + __raw_writel(0x03000000UL | value << 16, SDC_PWM_CTRL); + return 0; +} + +/*! + * This function sets the window position of the foreground or background plane. + * modes. + * + * @param channel Input parameter for the logical channel ID. + * + * @param x_pos The X coordinate position to place window at. + * The position is relative to the top left corner. + * + * @param y_pos The Y coordinate position to place window at. + * The position is relative to the top left corner. + * + * @return This function returns 0 on success or negative error code on fail + */ +int32_t ipu_disp_set_window_pos(ipu_channel_t channel, int16_t x_pos, + int16_t y_pos) +{ + x_pos += g_h_start_width; + y_pos += g_v_start_width; + + if (channel == MEM_SDC_BG) { + __raw_writel((x_pos << 16) | y_pos, SDC_BG_POS); + } else if (channel == MEM_SDC_FG) { + __raw_writel((x_pos << 16) | y_pos, SDC_FG_POS); + } else { + return EINVAL; + } + return 0; +} + +void _ipu_sdc_fg_init(ipu_channel_params_t * params) +{ + uint32_t reg; + (void)params; + + /* Enable FG channel */ + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg | SDC_COM_FG_EN | SDC_COM_BG_EN, SDC_COM_CONF); +} + +uint32_t _ipu_sdc_fg_uninit(void) +{ + uint32_t reg; + + /* Disable FG channel */ + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg & ~SDC_COM_FG_EN, SDC_COM_CONF); + + return (reg & SDC_COM_FG_EN); +} + +void _ipu_sdc_bg_init(ipu_channel_params_t * params) +{ + uint32_t reg; + (void)params; + + /* Enable FG channel */ + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg | SDC_COM_BG_EN, SDC_COM_CONF); +} + +uint32_t _ipu_sdc_bg_uninit(void) +{ + uint32_t reg; + + /* Disable BG channel */ + reg = __raw_readl(SDC_COM_CONF); + __raw_writel(reg & ~SDC_COM_BG_EN, SDC_COM_CONF); + + return (reg & SDC_COM_BG_EN); +} + +/* Exported symbols for modules. */ +EXPORT_SYMBOL(ipu_sdc_init_panel); +EXPORT_SYMBOL(ipu_sdc_set_global_alpha); +EXPORT_SYMBOL(ipu_sdc_set_color_key); +EXPORT_SYMBOL(ipu_sdc_set_brightness); +EXPORT_SYMBOL(ipu_disp_set_window_pos); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/Makefile @@ -0,0 +1,5 @@ +obj-$(CONFIG_MXC_IPU_V1) = mxc_ipu.o + +mxc_ipu-objs := ipu_common.o ipu_sdc.o ipu_adc.o ipu_ic.o ipu_csi.o ipu_device.o ipu_calc_stripes_sizes.o + +obj-$(CONFIG_MXC_IPU_PF) += pf/ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_calc_stripes_sizes.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_calc_stripes_sizes.c @@ -0,0 +1,374 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file ipu_calc_stripes_sizes.c + * + * @brief IPU IC functions + * + * @ingroup IPU + */ + +#include +#include +#include + +#define BPP_32 0 +#define BPP_16 3 +#define BPP_8 5 +#define BPP_24 1 +#define BPP_12 4 +#define BPP_18 2 + +static u64 _do_div(u64 a, u32 b) +{ + u64 div; + div = a; + do_div(div, b); + return div; +} + +static u32 truncate(u32 up, /* 0: down; else: up */ + u64 a, /* must be non-negative */ + u32 b) +{ + u32 d; + u64 div; + div = _do_div(a, b); + d = b * (div >> 32); + if (up && (a > (((u64)d) << 32))) + return d+b; + else + return d; +} + +static unsigned int f_calc(unsigned int pfs, unsigned int bpp, unsigned int *write) +{/* return input_f */ + unsigned int f_calculated = 0; + switch (pfs) { + case IPU_PIX_FMT_YVU422P: + case IPU_PIX_FMT_YUV422P: + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + f_calculated = 16; + break; + + case IPU_PIX_FMT_NV12: + f_calculated = 8; + break; + + default: + f_calculated = 0; + break; + + } + if (!f_calculated) { + switch (bpp) { + case BPP_32: + f_calculated = 2; + break; + + case BPP_16: + f_calculated = 4; + break; + + case BPP_8: + case BPP_24: + f_calculated = 8; + break; + + case BPP_12: + f_calculated = 16; + break; + + case BPP_18: + f_calculated = 32; + break; + + default: + f_calculated = 0; + break; + } + } + return f_calculated; +} + + +static unsigned int m_calc(unsigned int pfs) +{ + unsigned int m_calculated = 0; + switch (pfs) { + case IPU_PIX_FMT_YUV420P2: + case IPU_PIX_FMT_YUV420P: + case IPU_PIX_FMT_YVU422P: + case IPU_PIX_FMT_YUV422P: + case IPU_PIX_FMT_YVU420P: + case IPU_PIX_FMT_NV12: + m_calculated = 8; + break; + + case IPU_PIX_FMT_YUYV: + case IPU_PIX_FMT_UYVY: + m_calculated = 2; + break; + + default: + m_calculated = 1; + break; + + } + return m_calculated; +} + + +/* Stripe parameters calculator */ +/************************************************************************** +Notes: +MSW = the maximal width allowed for a stripe + i.MX31: 720, i.MX35: 800, i.MX37/51/53: 1024 +cirr = the maximal inverse resizing ratio for which overlap in the input + is requested; typically cirr~2 +equal_stripes: + 0: each stripe is allowed to have independent parameters + for maximal image quality + 1: the stripes are requested to have identical parameters + (except the base address), for maximal performance +If performance is the top priority (above image quality) + Avoid overlap, by setting CIRR = 0 + This will also force effectively identical_stripes = 1 + Choose IF & OF that corresponds to the same IOX/SX for both stripes + Choose IFW & OFW such that + IFW/IM, IFW/IF, OFW/OM, OFW/OF are even integers + The function returns an error status: + 0: no error + 1: invalid input parameters -> aborted without result + Valid parameters should satisfy the following conditions + IFW <= OFW, otherwise downsizing is required + - which is not supported yet + 4 <= IFW,OFW, so some interpolation may be needed even without overlap + IM, OM, IF, OF should not vanish + 2*IF <= IFW + so the frame can be split to two equal stripes, even without overlap + 2*(OF+IF/irr_opt) <= OFW + so a valid positive INW exists even for equal stripes + OF <= MSW, otherwise, the left stripe cannot be sufficiently large + MSW < OFW, so splitting to stripes is required + OFW <= 2*MSW, so two stripes are sufficient + (this also implies that 2<=MSW) + 2: OF is not a multiple of OM - not fully-supported yet + Output is produced but OW is not guaranited to be a multiple of OM + 4: OFW reduced to be a multiple of OM + 8: CIRR > 1: truncated to 1 + Overlap is not supported (and not needed) y for upsizing) +**************************************************************************/ +int ipu_calc_stripes_sizes(const unsigned int input_frame_width, + /* input frame width;>1 */ + unsigned int output_frame_width, /* output frame width; >1 */ + const unsigned int maximal_stripe_width, + /* the maximal width allowed for a stripe */ + const unsigned long long cirr, /* see above */ + const unsigned int equal_stripes, /* see above */ + u32 input_pixelformat,/* pixel format after of read channel*/ + u32 output_pixelformat,/* pixel format after of write channel*/ + struct stripe_param *left, + struct stripe_param *right) +{ + const unsigned int irr_frac_bits = 13; + const unsigned long irr_steps = 1 << irr_frac_bits; + const u64 dirr = ((u64)1) << (32 - 2); + /* The maximum relative difference allowed between the irrs */ + const u64 cr = ((u64)4) << 32; + /* The importance ratio between the two terms in the cost function below */ + + unsigned int status; + unsigned int temp; + unsigned int onw_min; + unsigned int inw, onw, inw_best = 0; + /* number of pixels in the left stripe NOT hidden by the right stripe */ + u64 irr_opt; /* the optimal inverse resizing ratio */ + u64 rr_opt; /* the optimal resizing ratio = 1/irr_opt*/ + u64 dinw; /* the misalignment between the stripes */ + /* (measured in units of input columns) */ + u64 difwl, difwr; + /* The number of input columns not reflected in the output */ + /* the resizing ratio used for the right stripe is */ + /* left->irr and right->irr respectively */ + u64 cost, cost_min; + u64 div; /* result of division */ + + unsigned int input_m, input_f, output_m, output_f; /* parameters for upsizing by stripes */ + + status = 0; + + /* M, F calculations */ + /* read back pfs from params */ + + input_f = f_calc(input_pixelformat, 0, NULL); + input_m = 16; + /* BPP should be used in the out_F calc */ + /* Temporarily not used */ + /* out_F = F_calc(idmac->pfs, idmac->bpp, NULL); */ + + output_f = 16; + output_m = m_calc(output_pixelformat); + + + if ((output_frame_width < input_frame_width) || (input_frame_width < 4) + || (output_frame_width < 4)) + return 1; + + irr_opt = _do_div((((u64)(input_frame_width - 1)) << 32), + (output_frame_width - 1)); + rr_opt = _do_div((((u64)(output_frame_width - 1)) << 32), + (input_frame_width - 1)); + + if ((input_m == 0) || (output_m == 0) || (input_f == 0) || (output_f == 0) + || (input_frame_width < (2 * input_f)) + || ((((u64)output_frame_width) << 32) < + (2 * ((((u64)output_f) << 32) + (input_f * rr_opt)))) + || (maximal_stripe_width < output_f) + || (output_frame_width <= maximal_stripe_width) + || ((2 * maximal_stripe_width) < output_frame_width)) + return 1; + + if (output_f % output_m) + status += 2; + + temp = truncate(0, (((u64)output_frame_width) << 32), output_m); + if (temp < output_frame_width) { + output_frame_width = temp; + status += 4; + } + + if (equal_stripes) { + if ((irr_opt > cirr) /* overlap in the input is not requested */ + && ((input_frame_width % (input_m << 1)) == 0) + && ((input_frame_width % (input_f << 1)) == 0) + && ((output_frame_width % (output_m << 1)) == 0) + && ((output_frame_width % (output_f << 1)) == 0)) { + /* without overlap */ + left->input_width = right->input_width = right->input_column = + input_frame_width >> 1; + left->output_width = right->output_width = right->output_column = + output_frame_width >> 1; + left->input_column = right->input_column = 0; + div = _do_div(((((u64)irr_steps) << 32) * + (right->input_width - 1)), (right->output_width - 1)); + left->irr = right->irr = truncate(0, div, 1); + } else { /* with overlap */ + onw = truncate(0, (((u64)output_frame_width) << 32) >> 1, + output_f); + inw = truncate(0, onw * irr_opt, input_f); + /* this is the maximal inw which allows the same resizing ratio */ + /* in both stripes */ + onw = truncate(1, (inw * rr_opt), output_f); + div = _do_div((((u64)(irr_steps * inw)) << + 32), onw); + left->irr = right->irr = truncate(0, div, 1); + left->output_width = right->output_width = + output_frame_width - onw; + /* These are valid assignments for output_width, */ + /* assuming output_f is a multiple of output_m */ + div = (((u64)(left->output_width-1) * (left->irr)) << 32); + div = (((u64)1) << 32) + _do_div(div, irr_steps); + + left->input_width = right->input_width = truncate(1, div, input_m); + + div = _do_div((((u64)((right->output_width - 1) * right->irr)) << + 32), irr_steps); + difwr = (((u64)(input_frame_width - 1 - inw)) << 32) - div; + div = _do_div((difwr + (((u64)input_f) << 32)), 2); + left->input_column = truncate(0, div, input_f); + + + /* This splits the truncated input columns evenly */ + /* between the left and right margins */ + right->input_column = left->input_column + inw; + left->output_column = 0; + right->output_column = onw; + } + } else { /* independent stripes */ + onw_min = output_frame_width - maximal_stripe_width; + /* onw is a multiple of output_f, in the range */ + /* [max(output_f,output_frame_width-maximal_stripe_width),*/ + /*min(output_frame_width-2,maximal_stripe_width)] */ + /* definitely beyond the cost of any valid setting */ + cost_min = (((u64)input_frame_width) << 32) + cr; + onw = truncate(0, ((u64)maximal_stripe_width), output_f); + if (output_frame_width - onw == 1) + onw -= output_f; /* => onw and output_frame_width-1-onw are positive */ + inw = truncate(0, onw * irr_opt, input_f); + /* this is the maximal inw which allows the same resizing ratio */ + /* in both stripes */ + onw = truncate(1, inw * rr_opt, output_f); + do { + div = _do_div((((u64)(irr_steps * inw)) << 32), onw); + left->irr = truncate(0, div, 1); + div = _do_div((((u64)(onw * left->irr)) << 32), + irr_steps); + dinw = (((u64)inw) << 32) - div; + + div = _do_div((((u64)((output_frame_width - 1 - onw) * left->irr)) << + 32), irr_steps); + + difwl = (((u64)(input_frame_width - 1 - inw)) << 32) - div; + + cost = difwl + (((u64)(cr * dinw)) >> 32); + + if (cost < cost_min) { + inw_best = inw; + cost_min = cost; + } + + inw -= input_f; + onw = truncate(1, inw * rr_opt, output_f); + /* This is the minimal onw which allows the same resizing ratio */ + /* in both stripes */ + } while (onw >= onw_min); + + inw = inw_best; + onw = truncate(1, inw * rr_opt, output_f); + div = _do_div((((u64)(irr_steps * inw)) << 32), onw); + left->irr = truncate(0, div, 1); + + left->output_width = onw; + right->output_width = output_frame_width - onw; + /* These are valid assignments for output_width, */ + /* assuming output_f is a multiple of output_m */ + left->input_width = truncate(1, ((u64)(inw + 1)) << 32, input_m); + right->input_width = truncate(1, ((u64)(input_frame_width - inw)) << + 32, input_m); + + div = _do_div((((u64)(irr_steps * (input_frame_width - 1 - inw))) << + 32), (right->output_width - 1)); + right->irr = truncate(0, div, 1); + temp = truncate(0, ((u64)left->irr) * ((((u64)1) << 32) + dirr), 1); + if (temp < right->irr) + right->irr = temp; + div = _do_div(((u64)((right->output_width - 1) * right->irr) << + 32), irr_steps); + difwr = (u64)(input_frame_width - 1 - inw) - div; + + + div = _do_div((difwr + (((u64)input_f) << 32)), 2); + left->input_column = truncate(0, div, input_f); + + /* This splits the truncated input columns evenly */ + /* between the left and right margins */ + right->input_column = left->input_column + inw; + left->output_column = 0; + right->output_column = onw; + } + return status; +} +EXPORT_SYMBOL(ipu_calc_stripes_sizes); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/ipu_device.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/ipu_device.c @@ -0,0 +1,696 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file ipu_device.c + * + * @brief This file contains the IPU driver device interface and fops functions. + * + * @ingroup IPU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ipu_prv.h" +#include "ipu_regs.h" +#include "ipu_param_mem.h" + +/* Strucutures and variables for exporting MXC IPU as device*/ + +#define MAX_Q_SIZE 10 + +static int mxc_ipu_major; +static struct class *mxc_ipu_class; + +DEFINE_SPINLOCK(queue_lock); +static DECLARE_MUTEX(user_mutex); + +static wait_queue_head_t waitq; +static int pending_events = 0; +int read_ptr = 0; +int write_ptr = 0; + +ipu_event_info events[MAX_Q_SIZE]; + +int register_ipu_device(void); + +/* Static functions */ + +int get_events(ipu_event_info *p) +{ + unsigned long flags; + int ret = 0, i, cnt, found = 0; + spin_lock_irqsave(&queue_lock, flags); + if (pending_events != 0) { + if (write_ptr > read_ptr) + cnt = write_ptr - read_ptr; + else + cnt = MAX_Q_SIZE - read_ptr + write_ptr; + for (i = 0; i < cnt; i++) { + if (p->irq == events[read_ptr].irq) { + *p = events[read_ptr]; + events[read_ptr].irq = 0; + read_ptr++; + if (read_ptr >= MAX_Q_SIZE) + read_ptr = 0; + found = 1; + break; + } + + if (events[read_ptr].irq) { + events[write_ptr] = events[read_ptr]; + events[read_ptr].irq = 0; + write_ptr++; + if (write_ptr >= MAX_Q_SIZE) + write_ptr = 0; + } else + pending_events--; + + read_ptr++; + if (read_ptr >= MAX_Q_SIZE) + read_ptr = 0; + } + if (found) + pending_events--; + else + ret = -1; + } else { + ret = -1; + } + + spin_unlock_irqrestore(&queue_lock, flags); + return ret; +} + +static irqreturn_t mxc_ipu_generic_handler(int irq, void *dev_id) +{ + ipu_event_info e; + + e.irq = irq; + e.dev = dev_id; + events[write_ptr] = e; + write_ptr++; + if (write_ptr >= MAX_Q_SIZE) + write_ptr = 0; + pending_events++; + /* Wakeup any blocking user context */ + wake_up_interruptible(&waitq); + return IRQ_HANDLED; +} + +static int mxc_ipu_open(struct inode *inode, struct file *file) +{ + int ret = 0; + return ret; +} +static int mxc_ipu_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int ret = 0; + + switch (cmd) { + + case IPU_INIT_CHANNEL: + { + ipu_channel_parm parm; + if (copy_from_user + (&parm, (ipu_channel_parm *) arg, + sizeof(ipu_channel_parm))) { + return -EFAULT; + } + if (!parm.flag) { + ret = + ipu_init_channel(parm.channel, + &parm.params); + } else { + ret = ipu_init_channel(parm.channel, NULL); + } + } + break; + + case IPU_UNINIT_CHANNEL: + { + ipu_channel_t ch; + int __user *argp = (void __user *)arg; + if (get_user(ch, argp)) + return -EFAULT; + ipu_uninit_channel(ch); + } + break; + + case IPU_INIT_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) { + return -EFAULT; + } + ret = + ipu_init_channel_buffer(parm.channel, parm.type, + parm.pixel_fmt, + parm.width, parm.height, + parm.stride, + parm.rot_mode, + parm.phyaddr_0, + parm.phyaddr_1, + parm.u_offset, + parm.v_offset); + + } + break; + + case IPU_UPDATE_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) { + return -EFAULT; + } + if ((parm.phyaddr_0 != (dma_addr_t) NULL) + && (parm.phyaddr_1 == (dma_addr_t) NULL)) { + ret = + ipu_update_channel_buffer(parm.channel, + parm.type, + parm.bufNum, + parm.phyaddr_0); + } else if ((parm.phyaddr_0 == (dma_addr_t) NULL) + && (parm.phyaddr_1 != (dma_addr_t) NULL)) { + ret = + ipu_update_channel_buffer(parm.channel, + parm.type, + parm.bufNum, + parm.phyaddr_1); + } else { + ret = -1; + } + + } + break; + case IPU_SELECT_CHANNEL_BUFFER: + { + ipu_channel_buf_parm parm; + if (copy_from_user + (&parm, (ipu_channel_buf_parm *) arg, + sizeof(ipu_channel_buf_parm))) { + return -EFAULT; + } + ret = + ipu_select_buffer(parm.channel, parm.type, + parm.bufNum); + + } + break; + case IPU_LINK_CHANNELS: + { + ipu_channel_link link; + if (copy_from_user + (&link, (ipu_channel_link *) arg, + sizeof(ipu_channel_link))) { + return -EFAULT; + } + ret = ipu_link_channels(link.src_ch, link.dest_ch); + + } + break; + case IPU_UNLINK_CHANNELS: + { + ipu_channel_link link; + if (copy_from_user + (&link, (ipu_channel_link *) arg, + sizeof(ipu_channel_link))) { + return -EFAULT; + } + ret = ipu_unlink_channels(link.src_ch, link.dest_ch); + + } + break; + case IPU_ENABLE_CHANNEL: + { + ipu_channel_t ch; + int __user *argp = (void __user *)arg; + if (get_user(ch, argp)) + return -EFAULT; + ipu_enable_channel(ch); + } + break; + case IPU_DISABLE_CHANNEL: + { + ipu_channel_info info; + if (copy_from_user + (&info, (ipu_channel_info *) arg, + sizeof(ipu_channel_info))) { + return -EFAULT; + } + ret = ipu_disable_channel(info.channel, info.stop); + } + break; + case IPU_ENABLE_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_enable_irq(irq); + } + break; + case IPU_DISABLE_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_disable_irq(irq); + } + break; + case IPU_CLEAR_IRQ: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ipu_clear_irq(irq); + } + break; + case IPU_FREE_IRQ: + { + ipu_irq_info info; + if (copy_from_user + (&info, (ipu_irq_info *) arg, + sizeof(ipu_irq_info))) { + return -EFAULT; + } + ipu_free_irq(info.irq, info.dev_id); + } + break; + case IPU_REQUEST_IRQ_STATUS: + { + uint32_t irq; + int __user *argp = (void __user *)arg; + if (get_user(irq, argp)) + return -EFAULT; + ret = ipu_get_irq_status(irq); + } + break; + case IPU_SDC_INIT_PANEL: + { + ipu_sdc_panel_info sinfo; + if (copy_from_user + (&sinfo, (ipu_sdc_panel_info *) arg, + sizeof(ipu_sdc_panel_info))) { + return -EFAULT; + } + ret = + ipu_sdc_init_panel(sinfo.panel, sinfo.pixel_clk, + sinfo.width, sinfo.height, + sinfo.pixel_fmt, + sinfo.hStartWidth, + sinfo.hSyncWidth, + sinfo.hEndWidth, + sinfo.vStartWidth, + sinfo.vSyncWidth, + sinfo.vEndWidth, sinfo.signal); + } + break; + case IPU_SDC_SET_WIN_POS: + { + ipu_sdc_window_pos pos; + if (copy_from_user + (&pos, (ipu_sdc_window_pos *) arg, + sizeof(ipu_sdc_window_pos))) { + return -EFAULT; + } + ret = + ipu_disp_set_window_pos(pos.channel, pos.x_pos, + pos.y_pos); + + } + break; + case IPU_SDC_SET_GLOBAL_ALPHA: + { + ipu_sdc_global_alpha g; + if (copy_from_user + (&g, (ipu_sdc_global_alpha *) arg, + sizeof(ipu_sdc_global_alpha))) { + return -EFAULT; + } + ret = ipu_sdc_set_global_alpha(g.enable, g.alpha); + } + break; + case IPU_SDC_SET_COLOR_KEY: + { + ipu_sdc_color_key c; + if (copy_from_user + (&c, (ipu_sdc_color_key *) arg, + sizeof(ipu_sdc_color_key))) { + return -EFAULT; + } + ret = + ipu_sdc_set_color_key(c.channel, c.enable, + c.colorKey); + } + break; + case IPU_SDC_SET_BRIGHTNESS: + { + uint8_t b; + int __user *argp = (void __user *)arg; + if (get_user(b, argp)) + return -EFAULT; + ret = ipu_sdc_set_brightness(b); + + } + break; + case IPU_REGISTER_GENERIC_ISR: + { + ipu_event_info info; + if (copy_from_user + (&info, (ipu_event_info *) arg, + sizeof(ipu_event_info))) { + return -EFAULT; + } + ret = + ipu_request_irq(info.irq, mxc_ipu_generic_handler, + 0, "video_sink", info.dev); + } + break; + case IPU_GET_EVENT: + /* User will have to allocate event_type structure and pass the pointer in arg */ + { + ipu_event_info info; + int r = -1; + + if (copy_from_user + (&info, (ipu_event_info *) arg, + sizeof(ipu_event_info))) + return -EFAULT; + + r = get_events(&info); + if (r == -1) { + wait_event_interruptible_timeout(waitq, + (pending_events != 0), 2 * HZ); + r = get_events(&info); + } + ret = -1; + if (r == 0) { + if (!copy_to_user((ipu_event_info *) arg, + &info, sizeof(ipu_event_info))) + ret = 0; + } + } + break; + case IPU_ADC_WRITE_TEMPLATE: + { + ipu_adc_template temp; + if (copy_from_user + (&temp, (ipu_adc_template *) arg, sizeof(temp))) { + return -EFAULT; + } + ret = + ipu_adc_write_template(temp.disp, temp.pCmd, + temp.write); + } + break; + case IPU_ADC_UPDATE: + { + ipu_adc_update update; + if (copy_from_user + (&update, (ipu_adc_update *) arg, sizeof(update))) { + return -EFAULT; + } + ret = + ipu_adc_set_update_mode(update.channel, update.mode, + update.refresh_rate, + update.addr, update.size); + } + break; + case IPU_ADC_SNOOP: + { + ipu_adc_snoop snoop; + if (copy_from_user + (&snoop, (ipu_adc_snoop *) arg, sizeof(snoop))) { + return -EFAULT; + } + ret = + ipu_adc_get_snooping_status(snoop.statl, + snoop.stath); + } + break; + case IPU_ADC_CMD: + { + ipu_adc_cmd cmd; + if (copy_from_user + (&cmd, (ipu_adc_cmd *) arg, sizeof(cmd))) { + return -EFAULT; + } + ret = + ipu_adc_write_cmd(cmd.disp, cmd.type, cmd.cmd, + cmd.params, cmd.numParams); + } + break; + case IPU_ADC_INIT_PANEL: + { + ipu_adc_panel panel; + if (copy_from_user + (&panel, (ipu_adc_panel *) arg, sizeof(panel))) { + return -EFAULT; + } + ret = + ipu_adc_init_panel(panel.disp, panel.width, + panel.height, panel.pixel_fmt, + panel.stride, panel.signal, + panel.addr, panel.vsync_width, + panel.mode); + } + break; + case IPU_ADC_IFC_TIMING: + { + ipu_adc_ifc_timing t; + if (copy_from_user + (&t, (ipu_adc_ifc_timing *) arg, sizeof(t))) { + return -EFAULT; + } + ret = + ipu_adc_init_ifc_timing(t.disp, t.read, + t.cycle_time, t.up_time, + t.down_time, + t.read_latch_time, + t.pixel_clk); + } + break; + case IPU_CSI_INIT_INTERFACE: + { + ipu_csi_interface c; + if (copy_from_user + (&c, (ipu_csi_interface *) arg, sizeof(c))) + return -EFAULT; + ret = + ipu_csi_init_interface(c.width, c.height, + c.pixel_fmt, c.signal); + } + break; + case IPU_CSI_ENABLE_MCLK: + { + ipu_csi_mclk m; + if (copy_from_user(&m, (ipu_csi_mclk *) arg, sizeof(m))) + return -EFAULT; + ret = ipu_csi_enable_mclk(m.src, m.flag, m.wait); + } + break; + case IPU_CSI_READ_MCLK_FLAG: + { + ret = ipu_csi_read_mclk_flag(); + } + break; + case IPU_CSI_FLASH_STROBE: + { + bool strobe; + int __user *argp = (void __user *)arg; + if (get_user(strobe, argp)) + return -EFAULT; + ipu_csi_flash_strobe(strobe); + } + break; + case IPU_CSI_GET_WIN_SIZE: + { + ipu_csi_window_size w; + int dummy = 0; + ipu_csi_get_window_size(&w.width, &w.height, dummy); + if (copy_to_user + ((ipu_csi_window_size *) arg, &w, sizeof(w))) + return -EFAULT; + } + break; + case IPU_CSI_SET_WIN_SIZE: + { + ipu_csi_window_size w; + int dummy = 0; + if (copy_from_user + (&w, (ipu_csi_window_size *) arg, sizeof(w))) + return -EFAULT; + ipu_csi_set_window_size(w.width, w.height, dummy); + } + break; + case IPU_CSI_SET_WINDOW: + { + ipu_csi_window p; + int dummy = 0; + if (copy_from_user + (&p, (ipu_csi_window *) arg, sizeof(p))) + return -EFAULT; + ipu_csi_set_window_pos(p.left, p.top, dummy); + } + break; + case IPU_PF_SET_PAUSE_ROW: + { + uint32_t p; + int __user *argp = (void __user *)arg; + if (get_user(p, argp)) + return -EFAULT; + ret = ipu_pf_set_pause_row(p); + } + break; + case IPU_ALOC_MEM: + { + ipu_mem_info info; + if (copy_from_user + (&info, (ipu_mem_info *) arg, + sizeof(ipu_mem_info))) + return -EFAULT; + + info.vaddr = dma_alloc_coherent(0, + PAGE_ALIGN(info.size), + &info.paddr, + GFP_DMA | GFP_KERNEL); + if (info.vaddr == 0) { + printk(KERN_ERR "dma alloc failed!\n"); + return -ENOBUFS; + } + if (copy_to_user((ipu_mem_info *) arg, &info, + sizeof(ipu_mem_info)) > 0) + return -EFAULT; + } + break; + case IPU_FREE_MEM: + { + ipu_mem_info info; + if (copy_from_user + (&info, (ipu_mem_info *) arg, + sizeof(ipu_mem_info))) + return -EFAULT; + + if (info.vaddr != 0) + dma_free_coherent(0, PAGE_ALIGN(info.size), + info.vaddr, info.paddr); + else + return -EFAULT; + } + break; + case IPU_IS_CHAN_BUSY: + { + ipu_channel_t chan; + if (copy_from_user + (&chan, (ipu_channel_t *)arg, + sizeof(ipu_channel_t))) + return -EFAULT; + + if (ipu_is_channel_busy(chan)) + ret = 1; + else + ret = 0; + } + break; + default: + break; + + } + return ret; +} + +static int mxc_ipu_mmap(struct file *file, struct vm_area_struct *vma) +{ + vma->vm_page_prot = pgprot_writethru(vma->vm_page_prot); + + if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) { + printk(KERN_ERR + "mmap failed!\n"); + return -ENOBUFS; + } + return 0; +} + +static int mxc_ipu_release(struct inode *inode, struct file *file) +{ + return 0; +} + +static struct file_operations mxc_ipu_fops = { + .owner = THIS_MODULE, + .open = mxc_ipu_open, + .mmap = mxc_ipu_mmap, + .release = mxc_ipu_release, + .ioctl = mxc_ipu_ioctl +}; + +int register_ipu_device() +{ + int ret = 0; + struct device *temp; + mxc_ipu_major = register_chrdev(0, "mxc_ipu", &mxc_ipu_fops); + if (mxc_ipu_major < 0) { + printk(KERN_ERR + "Unable to register Mxc Ipu as a char device\n"); + return mxc_ipu_major; + } + + mxc_ipu_class = class_create(THIS_MODULE, "mxc_ipu"); + if (IS_ERR(mxc_ipu_class)) { + printk(KERN_ERR "Unable to create class for Mxc Ipu\n"); + ret = PTR_ERR(mxc_ipu_class); + goto err1; + } + + temp = device_create(mxc_ipu_class, NULL, MKDEV(mxc_ipu_major, 0), NULL, + "mxc_ipu"); + + if (IS_ERR(temp)) { + printk(KERN_ERR "Unable to create class device for Mxc Ipu\n"); + ret = PTR_ERR(temp); + goto err2; + } + spin_lock_init(&queue_lock); + init_waitqueue_head(&waitq); + return ret; + + err2: + class_destroy(mxc_ipu_class); + err1: + unregister_chrdev(mxc_ipu_major, "mxc_ipu"); + return ret; + +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/pf/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/pf/Kconfig @@ -0,0 +1,7 @@ +config MXC_IPU_PF + tristate "MXC MPEG4/H.264 Post Filter Driver" + depends on MXC_IPU_V1 + default y + help + Driver for MPEG4 dering and deblock and H.264 deblock + using MXC IPU h/w --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/pf/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/pf/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_MXC_IPU_PF) += mxc_pf.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/ipu/pf/mxc_pf.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/ipu/pf/mxc_pf.c @@ -0,0 +1,993 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_pf.c + * + * @brief MXC IPU MPEG4/H.264 Post-filtering driver + * + * User-level API for IPU Hardware MPEG4/H.264 Post-filtering. + * + * @ingroup MXC_PF + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct mxc_pf_data { + pf_operation_t mode; + u32 pf_enabled; + u32 width; + u32 height; + u32 stride; + uint32_t qp_size; + dma_addr_t qp_paddr; + void *qp_vaddr; + pf_buf buf[PF_MAX_BUFFER_CNT]; + void *buf_vaddr[PF_MAX_BUFFER_CNT]; + wait_queue_head_t pf_wait; + volatile int done_mask; + volatile int wait_mask; + volatile int busy_flag; + struct semaphore busy_lock; +}; + +static struct mxc_pf_data pf_data; +static u8 open_count = 0; +static struct class *mxc_pf_class; + +/* + * Function definitions + */ + +static irqreturn_t mxc_pf_irq_handler(int irq, void *dev_id) +{ + struct mxc_pf_data *pf = dev_id; + + if (irq == IPU_IRQ_PF_Y_OUT_EOF) { + pf->done_mask |= PF_WAIT_Y; + } else if (irq == IPU_IRQ_PF_U_OUT_EOF) { + pf->done_mask |= PF_WAIT_U; + } else if (irq == IPU_IRQ_PF_V_OUT_EOF) { + pf->done_mask |= PF_WAIT_V; + } else { + return IRQ_NONE; + } + + if (pf->wait_mask && ((pf->done_mask & pf->wait_mask) == pf->wait_mask)) { + wake_up_interruptible(&pf->pf_wait); + } + return IRQ_HANDLED; +} + +/*! + * This function handles PF_IOCTL_INIT calls. It initializes the PF channels, + * interrupt handlers, and channel buffers. + * + * @return This function returns 0 on success or negative error code on + * error. + */ +static int mxc_pf_init(pf_init_params * pf_init) +{ + int err; + ipu_channel_params_t params; + u32 w; + u32 stride; + u32 h; + u32 qp_size = 0; + u32 qp_stride; + + if ((pf_init->pf_mode > 4) || (pf_init->width > 1024) || + (pf_init->height > 1024) || (pf_init->stride < pf_init->width)) { + return -EINVAL; + } + + pf_data.mode = pf_init->pf_mode; + w = pf_data.width = pf_init->width; + h = pf_data.height = pf_init->height; + stride = pf_data.stride = pf_init->stride; + pf_data.qp_size = pf_init->qp_size; + + memset(¶ms, 0, sizeof(params)); + params.mem_pf_mem.operation = pf_data.mode; + err = ipu_init_channel(MEM_PF_Y_MEM, ¶ms); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error initializing channel\n"); + goto err0; + } + + err = ipu_init_channel_buffer(MEM_PF_Y_MEM, IPU_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error initializing Y input buffer\n"); + goto err0; + } + + err = ipu_init_channel_buffer(MEM_PF_Y_MEM, IPU_OUTPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error initializing Y output buffer\n"); + goto err0; + } + + w = w / 2; + h = h / 2; + stride = stride / 2; + + if (pf_data.mode != PF_MPEG4_DERING) { + err = ipu_init_channel_buffer(MEM_PF_U_MEM, IPU_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing U input buffer\n"); + goto err0; + } + + err = ipu_init_channel_buffer(MEM_PF_U_MEM, IPU_OUTPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing U output buffer\n"); + goto err0; + } + + err = ipu_init_channel_buffer(MEM_PF_V_MEM, IPU_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing V input buffer\n"); + goto err0; + } + + err = ipu_init_channel_buffer(MEM_PF_V_MEM, IPU_OUTPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, stride, + IPU_ROTATE_NONE, 0, 0, 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing V output buffer\n"); + goto err0; + } + } + + /*Setup Channel QF and BSC Params */ + if (pf_data.mode == PF_H264_DEBLOCK) { + w = ((pf_data.width + 15) / 16); + h = (pf_data.height + 15) / 16; + qp_stride = w; + qp_size = 4 * qp_stride * h; + pr_debug("H264 QP width = %d, height = %d\n", w, h); + err = ipu_init_channel_buffer(MEM_PF_Y_MEM, + IPU_SEC_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC_32, w, h, + qp_stride, IPU_ROTATE_NONE, 0, 0, + 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing H264 QP buffer\n"); + goto err0; + } +/* w = (pf_data.width + 3) / 4; */ + w *= 4; + h *= 4; + qp_stride = w; + err = ipu_init_channel_buffer(MEM_PF_U_MEM, + IPU_SEC_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, + qp_stride, IPU_ROTATE_NONE, 0, 0, + 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing H264 BSB buffer\n"); + goto err0; + } + qp_size += qp_stride * h; + } else { /* MPEG4 mode */ + + w = (pf_data.width + 15) / 16; + h = (pf_data.height + 15) / 16; + qp_stride = (w + 3) & ~0x3UL; + pr_debug("MPEG4 QP width = %d, height = %d, stride = %d\n", + w, h, qp_stride); + err = ipu_init_channel_buffer(MEM_PF_Y_MEM, + IPU_SEC_INPUT_BUFFER, + IPU_PIX_FMT_GENERIC, w, h, + qp_stride, IPU_ROTATE_NONE, 0, 0, + 0, 0); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error initializing MPEG4 QP buffer\n"); + goto err0; + } + qp_size = qp_stride * h; + } + + /* Support 2 QP buffers */ + qp_size *= 2; + + if (pf_data.qp_size > qp_size) + qp_size = pf_data.qp_size; + else + pf_data.qp_size = qp_size; + + pf_data.qp_vaddr = dma_alloc_coherent(NULL, pf_data.qp_size, + &pf_data.qp_paddr, + GFP_KERNEL | GFP_DMA); + if (!pf_data.qp_vaddr) + return -ENOMEM; + + pf_init->qp_paddr = pf_data.qp_paddr; + pf_init->qp_size = pf_data.qp_size; + + return 0; + + err0: + return err; +} + +/*! + * This function handles PF_IOCTL_UNINIT calls. It uninitializes the PF + * channels and interrupt handlers. + * + * @return This function returns 0 on success or negative error code + * on error. + */ +static int mxc_pf_uninit(void) +{ + pf_data.pf_enabled = 0; + ipu_disable_irq(IPU_IRQ_PF_Y_OUT_EOF); + ipu_disable_irq(IPU_IRQ_PF_U_OUT_EOF); + ipu_disable_irq(IPU_IRQ_PF_V_OUT_EOF); + + ipu_disable_channel(MEM_PF_Y_MEM, true); + ipu_disable_channel(MEM_PF_U_MEM, true); + ipu_disable_channel(MEM_PF_V_MEM, true); + ipu_uninit_channel(MEM_PF_Y_MEM); + ipu_uninit_channel(MEM_PF_U_MEM); + ipu_uninit_channel(MEM_PF_V_MEM); + + if (pf_data.qp_vaddr) { + dma_free_coherent(NULL, pf_data.qp_size, pf_data.qp_vaddr, + pf_data.qp_paddr); + pf_data.qp_vaddr = NULL; + } + + return 0; +} + +/*! + * This function handles PF_IOCTL_REQBUFS calls. It initializes the PF channels + * and channel buffers. + * + * @param reqbufs Input/Output Structure containing buffer mode, + * type, offset, and size. The offset and size of + * the buffer are returned for PF_MEMORY_MMAP mode. + * + * @return This function returns 0 on success or negative error code + * on error. + */ +static int mxc_pf_reqbufs(pf_reqbufs_params * reqbufs) +{ + int err; + uint32_t buf_size; + int i; + int alloc_cnt = 0; + pf_buf *buf = pf_data.buf; + if (reqbufs->count > PF_MAX_BUFFER_CNT) { + reqbufs->count = PF_MAX_BUFFER_CNT; + } + /* Deallocate mmapped buffers */ + if (reqbufs->count == 0) { + for (i = 0; i < PF_MAX_BUFFER_CNT; i++) { + if (buf[i].index != -1) { + dma_free_coherent(NULL, buf[i].size, + pf_data.buf_vaddr[i], + buf[i].offset); + pf_data.buf_vaddr[i] = NULL; + buf[i].index = -1; + buf[i].size = 0; + } + } + return 0; + } + + buf_size = (pf_data.stride * pf_data.height * 3) / 2; + if (reqbufs->req_size > buf_size) { + buf_size = reqbufs->req_size; + pr_debug("using requested buffer size of %d\n", buf_size); + } else { + reqbufs->req_size = buf_size; + pr_debug("using default buffer size of %d\n", buf_size); + } + + for (i = 0; alloc_cnt < reqbufs->count; i++) { + buf[i].index = i; + buf[i].size = buf_size; + pf_data.buf_vaddr[i] = dma_alloc_coherent(NULL, buf[i].size, + &buf[i].offset, + GFP_KERNEL | GFP_DMA); + if (!pf_data.buf_vaddr[i] || !buf[i].offset) { + printk(KERN_ERR + "mxc_pf: unable to allocate IPU buffers.\n"); + err = -ENOMEM; + goto err0; + } + pr_debug("Allocated buffer %d at paddr 0x%08X, vaddr %p\n", + i, buf[i].offset, pf_data.buf_vaddr[i]); + + alloc_cnt++; + } + + return 0; + err0: + for (i = 0; i < alloc_cnt; i++) { + dma_free_coherent(NULL, buf[i].size, pf_data.buf_vaddr[i], + buf[i].offset); + pf_data.buf_vaddr[i] = NULL; + buf[i].index = -1; + buf[i].size = 0; + } + return err; +} + +/*! + * This function handles PF_IOCTL_START calls. It sets the PF channel buffers + * addresses and starts the channels + * + * @return This function returns 0 on success or negative error code on + * error. + */ +static int mxc_pf_start(pf_buf * in, pf_buf * out, int qp_buf) +{ + int err; + dma_addr_t y_in_paddr; + dma_addr_t u_in_paddr; + dma_addr_t v_in_paddr; + dma_addr_t p1_in_paddr; + dma_addr_t p2_in_paddr; + dma_addr_t y_out_paddr; + dma_addr_t u_out_paddr; + dma_addr_t v_out_paddr; + + /* H.264 requires output buffer equal to input */ + if (pf_data.mode == PF_H264_DEBLOCK) + out = in; + + y_in_paddr = in->offset + in->y_offset; + if (in->u_offset) + u_in_paddr = in->offset + in->u_offset; + else + u_in_paddr = y_in_paddr + (pf_data.stride * pf_data.height); + if (in->v_offset) + v_in_paddr = in->offset + in->v_offset; + else + v_in_paddr = u_in_paddr + (pf_data.stride * pf_data.height) / 4; + p1_in_paddr = pf_data.qp_paddr; + if (qp_buf) + p1_in_paddr += pf_data.qp_size / 2; + + if (pf_data.mode == PF_H264_DEBLOCK) { + p2_in_paddr = p1_in_paddr + + ((pf_data.width + 15) / 16) * + ((pf_data.height + 15) / 16) * 4; + } else { + p2_in_paddr = 0; + } + + pr_debug("y_in_paddr = 0x%08X\nu_in_paddr = 0x%08X\n" + "v_in_paddr = 0x%08X\n" + "qp_paddr = 0x%08X\nbsb_paddr = 0x%08X\n", + y_in_paddr, u_in_paddr, v_in_paddr, p1_in_paddr, p2_in_paddr); + + y_out_paddr = out->offset + out->y_offset; + if (out->u_offset) + u_out_paddr = out->offset + out->u_offset; + else + u_out_paddr = y_out_paddr + (pf_data.stride * pf_data.height); + if (out->v_offset) + v_out_paddr = out->offset + out->v_offset; + else + v_out_paddr = + u_out_paddr + (pf_data.stride * pf_data.height) / 4; + + pr_debug("y_out_paddr = 0x%08X\nu_out_paddr = 0x%08X\n" + "v_out_paddr = 0x%08X\n", + y_out_paddr, u_out_paddr, v_out_paddr); + + pf_data.done_mask = 0; + + ipu_enable_irq(IPU_IRQ_PF_Y_OUT_EOF); + if (pf_data.mode != PF_MPEG4_DERING) { + ipu_enable_irq(IPU_IRQ_PF_U_OUT_EOF); + ipu_enable_irq(IPU_IRQ_PF_V_OUT_EOF); + } + + err = ipu_update_channel_buffer(MEM_PF_Y_MEM, IPU_INPUT_BUFFER, 0, + y_in_paddr); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error setting Y input buffer\n"); + goto err0; + } + + err = ipu_update_channel_buffer(MEM_PF_Y_MEM, IPU_OUTPUT_BUFFER, 0, + y_out_paddr); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error setting Y output buffer\n"); + goto err0; + } + + if (pf_data.mode != PF_MPEG4_DERING) { + err = + ipu_update_channel_buffer(MEM_PF_U_MEM, IPU_INPUT_BUFFER, 0, + u_in_paddr); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error setting U input buffer\n"); + goto err0; + } + + err = + ipu_update_channel_buffer(MEM_PF_U_MEM, IPU_OUTPUT_BUFFER, + 0, u_out_paddr); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error setting U output buffer\n"); + goto err0; + } + + err = + ipu_update_channel_buffer(MEM_PF_V_MEM, IPU_INPUT_BUFFER, 0, + v_in_paddr); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error setting V input buffer\n"); + goto err0; + } + + err = + ipu_update_channel_buffer(MEM_PF_V_MEM, IPU_OUTPUT_BUFFER, + 0, v_out_paddr); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error setting V output buffer\n"); + goto err0; + } + } + + err = ipu_update_channel_buffer(MEM_PF_Y_MEM, IPU_SEC_INPUT_BUFFER, 0, + p1_in_paddr); + if (err < 0) { + printk(KERN_ERR "mxc_pf: error setting QP buffer\n"); + goto err0; + } + + if (pf_data.mode == PF_H264_DEBLOCK) { + + err = ipu_update_channel_buffer(MEM_PF_U_MEM, + IPU_SEC_INPUT_BUFFER, 0, + p2_in_paddr); + if (err < 0) { + printk(KERN_ERR + "mxc_pf: error setting H264 BSB buffer\n"); + goto err0; + } + ipu_select_buffer(MEM_PF_U_MEM, IPU_SEC_INPUT_BUFFER, 0); + } + + ipu_select_buffer(MEM_PF_Y_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_PF_Y_MEM, IPU_SEC_INPUT_BUFFER, 0); + ipu_select_buffer(MEM_PF_Y_MEM, IPU_INPUT_BUFFER, 0); + if (pf_data.mode != PF_MPEG4_DERING) { + ipu_select_buffer(MEM_PF_U_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_PF_V_MEM, IPU_OUTPUT_BUFFER, 0); + ipu_select_buffer(MEM_PF_U_MEM, IPU_INPUT_BUFFER, 0); + ipu_select_buffer(MEM_PF_V_MEM, IPU_INPUT_BUFFER, 0); + } + + if (!pf_data.pf_enabled) { + pf_data.pf_enabled = 1; + if (pf_data.mode != PF_MPEG4_DERING) { + ipu_enable_channel(MEM_PF_V_MEM); + ipu_enable_channel(MEM_PF_U_MEM); + } + ipu_enable_channel(MEM_PF_Y_MEM); + } + + return 0; + err0: + return err; +} + +/*! + * Post Filter driver open function. This function implements the Linux + * file_operations.open() API function. + * + * @param inode struct inode * + * + * @param filp struct file * + * + * @return This function returns 0 on success or negative error code on + * error. + */ +static int mxc_pf_open(struct inode *inode, struct file *filp) +{ + int i; + + if (open_count) { + return -EBUSY; + } + + open_count++; + + memset(&pf_data, 0, sizeof(pf_data)); + for (i = 0; i < PF_MAX_BUFFER_CNT; i++) { + pf_data.buf[i].index = -1; + } + init_waitqueue_head(&pf_data.pf_wait); + init_MUTEX(&pf_data.busy_lock); + + pf_data.busy_flag = 1; + + ipu_request_irq(IPU_IRQ_PF_Y_OUT_EOF, mxc_pf_irq_handler, + 0, "mxc_ipu_pf", &pf_data); + + ipu_request_irq(IPU_IRQ_PF_U_OUT_EOF, mxc_pf_irq_handler, + 0, "mxc_ipu_pf", &pf_data); + + ipu_request_irq(IPU_IRQ_PF_V_OUT_EOF, mxc_pf_irq_handler, + 0, "mxc_ipu_pf", &pf_data); + + ipu_disable_irq(IPU_IRQ_PF_Y_OUT_EOF); + ipu_disable_irq(IPU_IRQ_PF_U_OUT_EOF); + ipu_disable_irq(IPU_IRQ_PF_V_OUT_EOF); + + return 0; +} + +/*! + * Post Filter driver release function. This function implements the Linux + * file_operations.release() API function. + * + * @param inode struct inode * + * + * @param filp struct file * + * + * @return This function returns 0 on success or negative error code on + * error. + */ +static int mxc_pf_release(struct inode *inode, struct file *filp) +{ + pf_reqbufs_params req_buf; + + if (open_count) { + mxc_pf_uninit(); + + /* Free any allocated buffers */ + req_buf.count = 0; + mxc_pf_reqbufs(&req_buf); + + ipu_free_irq(IPU_IRQ_PF_V_OUT_EOF, &pf_data); + ipu_free_irq(IPU_IRQ_PF_U_OUT_EOF, &pf_data); + ipu_free_irq(IPU_IRQ_PF_Y_OUT_EOF, &pf_data); + open_count--; + } + return 0; +} + +/*! + * Post Filter driver ioctl function. This function implements the Linux + * file_operations.ioctl() API function. + * + * @param inode struct inode * + * + * @param filp struct file * + * + * @param cmd IOCTL command to handle + * + * @param arg Pointer to arguments for IOCTL + * + * @return This function returns 0 on success or negative error code on + * error. + */ +static int mxc_pf_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + int retval = 0; + + switch (cmd) { + case PF_IOCTL_INIT: + { + pf_init_params pf_init; + + pr_debug("PF_IOCTL_INIT\n"); + if (copy_from_user(&pf_init, (void *)arg, + _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + retval = mxc_pf_init(&pf_init); + if (retval < 0) + break; + pf_init.qp_paddr = pf_data.qp_paddr; + pf_init.qp_size = pf_data.qp_size; + + /* Return size of memory allocated */ + if (copy_to_user((void *)arg, &pf_init, _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + pf_data.busy_flag = 0; + break; + } + case PF_IOCTL_UNINIT: + pr_debug("PF_IOCTL_UNINIT\n"); + retval = mxc_pf_uninit(); + break; + case PF_IOCTL_REQBUFS: + { + pf_reqbufs_params reqbufs; + pr_debug("PF_IOCTL_REQBUFS\n"); + + if (copy_from_user + (&reqbufs, (void *)arg, _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + retval = mxc_pf_reqbufs(&reqbufs); + + /* Return size of memory allocated */ + if (copy_to_user((void *)arg, &reqbufs, _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + break; + } + case PF_IOCTL_QUERYBUF: + { + pf_buf buf; + pr_debug("PF_IOCTL_QUERYBUF\n"); + + if (copy_from_user(&buf, (void *)arg, _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + if ((buf.index < 0) || + (buf.index >= PF_MAX_BUFFER_CNT) || + (pf_data.buf[buf.index].index != buf.index)) { + retval = -EINVAL; + break; + } + /* Return size of memory allocated */ + if (copy_to_user((void *)arg, &pf_data.buf[buf.index], + _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + break; + } + case PF_IOCTL_START: + { + int index; + pf_start_params start_params; + pr_debug("PF_IOCTL_START\n"); + + if (pf_data.busy_flag) { + retval = -EBUSY; + break; + } + + if (copy_from_user(&start_params, (void *)arg, + _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + if (start_params.h264_pause_row >= + ((pf_data.height + 15) / 16)) { + retval = -EINVAL; + break; + } + + pf_data.busy_flag = 1; + + index = start_params.in.index; + if ((index >= 0) && (index < PF_MAX_BUFFER_CNT)) { + if (pf_data.buf[index].offset != + start_params.in.offset) { + retval = -EINVAL; + break; + } + } + + index = start_params.out.index; + if ((index >= 0) && (index < PF_MAX_BUFFER_CNT)) { + if (pf_data.buf[index].offset != + start_params.out.offset) { + retval = -EINVAL; + break; + } + } + + ipu_pf_set_pause_row(start_params.h264_pause_row); + + /*Update y, u, v buffers in DMA Channels */ + if ((retval = + mxc_pf_start(&start_params.in, &start_params.out, + start_params.qp_buf)) + < 0) { + break; + } + + pr_debug("PF_IOCTL_START - processing started\n"); + + if (!start_params.wait) { + break; + } + + pr_debug("PF_IOCTL_START - waiting for completion\n"); + + pf_data.wait_mask = PF_WAIT_ALL; + /* Fall thru to wait */ + } + case PF_IOCTL_WAIT: + { + if (!pf_data.wait_mask) + pf_data.wait_mask = (u32) arg; + + if (pf_data.mode == PF_MPEG4_DERING) + pf_data.wait_mask &= PF_WAIT_Y; + + if (!pf_data.wait_mask) { + retval = -EINVAL; + break; + } + + if (!wait_event_interruptible_timeout(pf_data.pf_wait, + ((pf_data. + done_mask & + pf_data. + wait_mask) == + pf_data. + wait_mask), + 1 * HZ)) { + pr_debug + ("PF_IOCTL_WAIT: timeout, done_mask = %d\n", + pf_data.done_mask); + retval = -ETIME; + break; + } else if (signal_pending(current)) { + pr_debug("PF_IOCTL_WAIT: interrupt received\n"); + retval = -ERESTARTSYS; + break; + } + pf_data.busy_flag = 0; + pf_data.wait_mask = 0; + + pr_debug("PF_IOCTL_WAIT - finished\n"); + break; + } + case PF_IOCTL_RESUME: + { + int pause_row; + pr_debug("PF_IOCTL_RESUME\n"); + + if (pf_data.busy_flag == 0) { + retval = -EFAULT; + break; + } + + if (copy_from_user(&pause_row, (void *)arg, + _IOC_SIZE(cmd))) { + retval = -EFAULT; + break; + } + + if (pause_row >= ((pf_data.height + 15) / 16)) { + retval = -EINVAL; + break; + } + + ipu_pf_set_pause_row(pause_row); + break; + } + + default: + printk(KERN_ERR "ipu_pf_ioctl not supported ioctl\n"); + retval = -1; + } + + if (retval < 0) + pr_debug("return = %d\n", retval); + return retval; +} + +/*! + * Post Filter driver mmap function. This function implements the Linux + * file_operations.mmap() API function for mapping driver buffers to user space. + * + * @param file struct file * + * + * @param vma structure vm_area_struct * + * + * @return 0 Success, EINTR busy lock error, + * ENOBUFS remap_page error. + */ +static int mxc_pf_mmap(struct file *file, struct vm_area_struct *vma) +{ + unsigned long size = vma->vm_end - vma->vm_start; + int res = 0; + + pr_debug("pgoff=0x%lx, start=0x%lx, end=0x%lx\n", + vma->vm_pgoff, vma->vm_start, vma->vm_end); + + /* make this _really_ smp-safe */ + if (down_interruptible(&pf_data.busy_lock)) + return -EINTR; + + /* make buffers write-thru cacheable */ + vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) & + ~L_PTE_BUFFERABLE); + + if (remap_pfn_range(vma, vma->vm_start, + vma->vm_pgoff, size, vma->vm_page_prot)) { + printk(KERN_ERR "mxc_pf: remap_pfn_range failed\n"); + res = -ENOBUFS; + goto mmap_exit; + } + + vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */ + + mmap_exit: + up(&pf_data.busy_lock); + return res; +} + +/*! + * Post Filter driver fsync function. This function implements the Linux + * file_operations.fsync() API function. + * + * The user must call fsync() before reading an output buffer. This + * call flushes the L1 and L2 caches + * + * @param filp structure file * + * + * @param dentry struct dentry * + * + * @param datasync unused + * + * @return status POLLIN | POLLRDNORM + */ +int mxc_pf_fsync(struct file *filp, struct dentry *dentry, int datasync) +{ + flush_cache_all(); + outer_flush_all(); + return 0; +} + +/*! + * Post Filter driver poll function. This function implements the Linux + * file_operations.poll() API function. + * + * @param file structure file * + * + * @param wait structure poll_table * + * + * @return status POLLIN | POLLRDNORM + */ +static unsigned int mxc_pf_poll(struct file *file, poll_table * wait) +{ + wait_queue_head_t *queue = NULL; + int res = POLLIN | POLLRDNORM; + + if (down_interruptible(&pf_data.busy_lock)) + return -EINTR; + + queue = &pf_data.pf_wait; + poll_wait(file, queue, wait); + + up(&pf_data.busy_lock); + + return res; +} + +/*! + * File operation structure functions pointers. + */ +static struct file_operations mxc_pf_fops = { + .owner = THIS_MODULE, + .open = mxc_pf_open, + .release = mxc_pf_release, + .ioctl = mxc_pf_ioctl, + .poll = mxc_pf_poll, + .mmap = mxc_pf_mmap, + .fsync = mxc_pf_fsync, +}; + +static int mxc_pf_major = 0; + +/*! + * Post Filter driver module initialization function. + */ +int mxc_pf_dev_init(void) +{ + int ret = 0; + struct device *temp_class; + + mxc_pf_major = register_chrdev(0, "mxc_ipu_pf", &mxc_pf_fops); + + if (mxc_pf_major < 0) { + printk(KERN_INFO "Unable to get a major for mxc_ipu_pf"); + return mxc_pf_major; + } + + mxc_pf_class = class_create(THIS_MODULE, "mxc_ipu_pf"); + if (IS_ERR(mxc_pf_class)) { + printk(KERN_ERR "Error creating mxc_ipu_pf class.\n"); + ret = PTR_ERR(mxc_pf_class); + goto err_out1; + } + + temp_class = device_create(mxc_pf_class, NULL, MKDEV(mxc_pf_major, 0), NULL, + "mxc_ipu_pf"); + if (IS_ERR(temp_class)) { + printk(KERN_ERR "Error creating mxc_ipu_pf class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + printk(KERN_INFO "IPU Post-filter loading\n"); + + return 0; + + err_out2: + class_destroy(mxc_pf_class); + err_out1: + unregister_chrdev(mxc_pf_major, "mxc_ipu_pf"); + return ret; +} + +/*! + * Post Filter driver module exit function. + */ +static void mxc_pf_exit(void) +{ + if (mxc_pf_major > 0) { + device_destroy(mxc_pf_class, MKDEV(mxc_pf_major, 0)); + class_destroy(mxc_pf_class); + unregister_chrdev(mxc_pf_major, "mxc_ipu_pf"); + } +} + +module_init(mxc_pf_dev_init); +module_exit(mxc_pf_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC MPEG4/H.264 Postfilter Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/vpu/mxc_vl2cc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/vpu/mxc_vl2cc.c @@ -0,0 +1,123 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_vl2cc.c + * + * @brief VL2CC initialization and flush operation implementation + * + * @ingroup VL2CC + */ + +#include +#include +#include +#include +#include +#include +#include + +#define VL2CC_CTRL_OFFSET (0x100) +#define VL2CC_AUXCTRL_OFFSET (0x104) +#define VL2CC_INVWAY_OFFSET (0x77C) +#define VL2CC_CLEANWAY_OFFSET (0x7BC) + +/*! VL2CC clock handle. */ +static struct clk *vl2cc_clk; +static u32 *vl2cc_base; + +/*! + * Initialization function of VL2CC. Remap the VL2CC base address. + * + * @return status 0 success. + */ +int vl2cc_init(u32 vl2cc_hw_base) +{ + vl2cc_base = ioremap(vl2cc_hw_base, SZ_8K - 1); + if (vl2cc_base == NULL) { + printk(KERN_INFO "vl2cc: Unable to ioremap\n"); + return -ENOMEM; + } + + vl2cc_clk = clk_get(NULL, "vl2cc_clk"); + if (IS_ERR(vl2cc_clk)) { + printk(KERN_INFO "vl2cc: Unable to get clock\n"); + iounmap(vl2cc_base); + return -EIO; + } + + printk(KERN_INFO "VL2CC initialized\n"); + return 0; +} + +/*! + * Enable VL2CC hardware + */ +void vl2cc_enable(void) +{ + volatile u32 reg; + + clk_enable(vl2cc_clk); + + /* Disable VL2CC */ + reg = __raw_readl(vl2cc_base + VL2CC_CTRL_OFFSET); + reg &= 0xFFFFFFFE; + __raw_writel(reg, vl2cc_base + VL2CC_CTRL_OFFSET); + + /* Set the latency for data RAM reads, data RAM writes, tag RAM and + * dirty RAM to 1 cycle - write 0x0 to AUX CTRL [11:0] and also + * configure the number of ways to 8 - write 8 to AUX CTRL [16:13] + */ + reg = __raw_readl(vl2cc_base + VL2CC_AUXCTRL_OFFSET); + reg &= 0xFFFE1000; /* Clear [16:13] too */ + reg |= (0x8 << 13); /* [16:13] = 8; */ + __raw_writel(reg, vl2cc_base + VL2CC_AUXCTRL_OFFSET); + + /* Invalidate the VL2CC ways - write 0xff to INV BY WAY and poll the + * register until its value is 0x0 + */ + __raw_writel(0xff, vl2cc_base + VL2CC_INVWAY_OFFSET); + while (__raw_readl(vl2cc_base + VL2CC_INVWAY_OFFSET) != 0x0) ; + + /* Enable VL2CC */ + reg = __raw_readl(vl2cc_base + VL2CC_CTRL_OFFSET); + reg |= 0x1; + __raw_writel(reg, vl2cc_base + VL2CC_CTRL_OFFSET); +} + +/*! + * Flush VL2CC + */ +void vl2cc_flush(void) +{ + __raw_writel(0xff, vl2cc_base + VL2CC_CLEANWAY_OFFSET); + while (__raw_readl(vl2cc_base + VL2CC_CLEANWAY_OFFSET) != 0x0) ; +} + +/*! + * Disable VL2CC + */ +void vl2cc_disable(void) +{ + __raw_writel(0, vl2cc_base + VL2CC_CTRL_OFFSET); + clk_disable(vl2cc_clk); +} + +/*! + * Cleanup VL2CC + */ +void vl2cc_cleanup(void) +{ + clk_put(vl2cc_clk); + iounmap(vl2cc_base); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/vpu/mxc_vpu.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/vpu/mxc_vpu.c @@ -0,0 +1,858 @@ +/* + * Copyright 2006-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_vpu.c + * + * @brief VPU system initialization and file operation implementation + * + * @ingroup VPU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +struct vpu_priv { + struct fasync_struct *async_queue; +}; + +/* To track the allocated memory buffer */ +typedef struct memalloc_record { + struct list_head list; + struct vpu_mem_desc mem; +} memalloc_record; + +struct iram_setting { + u32 start; + u32 end; +}; + +static DEFINE_SPINLOCK(vpu_lock); +static LIST_HEAD(head); + +static int vpu_major = 0; +static int vpu_clk_usercount; +static struct class *vpu_class; +static struct vpu_priv vpu_data; +static u8 open_count = 0; +static struct clk *vpu_clk; +static struct vpu_mem_desc bitwork_mem = { 0 }; +static struct vpu_mem_desc pic_para_mem = { 0 }; +static struct vpu_mem_desc user_data_mem = { 0 }; +static struct vpu_mem_desc share_mem = { 0 }; + +/* IRAM setting */ +static struct iram_setting iram; +/* store SRC base addr */ +static u32 src_base_addr; + +/* implement the blocking ioctl */ +static int codec_done = 0; +static wait_queue_head_t vpu_queue; + +static u32 workctrl_regsave[6]; +static u32 rd_ptr_regsave[4]; +static u32 wr_ptr_regsave[4]; +static u32 dis_flag_regsave[4]; + +#define READ_REG(x) __raw_readl(IO_ADDRESS(VPU_BASE_ADDR+(x))) +#define WRITE_REG(val, x) \ + __raw_writel((val), IO_ADDRESS(VPU_BASE_ADDR+(x))) + +#define SAVE_WORK_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(workctrl_regsave)/2; i++) \ + workctrl_regsave[i] = READ_REG(BIT_WORK_CTRL_BUF_REG(i));\ +} while (0) +#define RESTORE_WORK_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(workctrl_regsave)/2; i++) \ + WRITE_REG(workctrl_regsave[i], BIT_WORK_CTRL_BUF_REG(i));\ +} while (0) +#define SAVE_CTRL_REGS do { \ + int i; \ + for (i = ARRAY_SIZE(workctrl_regsave)/2; \ + i < ARRAY_SIZE(workctrl_regsave); i++) \ + workctrl_regsave[i] = READ_REG(BIT_WORK_CTRL_BUF_REG(i));\ +} while (0) +#define RESTORE_CTRL_REGS do { \ + int i; \ + for (i = ARRAY_SIZE(workctrl_regsave)/2; \ + i < ARRAY_SIZE(workctrl_regsave); i++) \ + WRITE_REG(workctrl_regsave[i], BIT_WORK_CTRL_BUF_REG(i));\ +} while (0) +#define SAVE_RDWR_PTR_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(rd_ptr_regsave); i++) \ + rd_ptr_regsave[i] = READ_REG(BIT_RD_PTR_REG(i)); \ + for (i = 0; i < ARRAY_SIZE(wr_ptr_regsave); i++) \ + wr_ptr_regsave[i] = READ_REG(BIT_WR_PTR_REG(i)); \ +} while (0) +#define RESTORE_RDWR_PTR_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(rd_ptr_regsave); i++) \ + WRITE_REG(rd_ptr_regsave[i], BIT_RD_PTR_REG(i)); \ + for (i = 0; i < ARRAY_SIZE(wr_ptr_regsave); i++) \ + WRITE_REG(wr_ptr_regsave[i], BIT_WR_PTR_REG(i)); \ +} while (0) +#define SAVE_DIS_FLAG_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(dis_flag_regsave); i++) \ + dis_flag_regsave[i] = READ_REG(BIT_FRM_DIS_FLG_REG(i)); \ +} while (0) +#define RESTORE_DIS_FLAG_REGS do { \ + int i; \ + for (i = 0; i < ARRAY_SIZE(dis_flag_regsave); i++) \ + WRITE_REG(dis_flag_regsave[i], BIT_FRM_DIS_FLG_REG(i)); \ +} while (0) + +/*! + * Private function to alloc dma buffer + * @return status 0 success. + */ +static int vpu_alloc_dma_buffer(struct vpu_mem_desc *mem) +{ + mem->cpu_addr = (unsigned long) + dma_alloc_coherent(NULL, PAGE_ALIGN(mem->size), + (dma_addr_t *) (&mem->phy_addr), + GFP_DMA | GFP_KERNEL); + pr_debug("[ALLOC] mem alloc cpu_addr = 0x%x\n", mem->cpu_addr); + if ((void *)(mem->cpu_addr) == NULL) { + printk(KERN_ERR "Physical memory allocation error!\n"); + return -1; + } + return 0; +} + +/*! + * Private function to free dma buffer + */ +static void vpu_free_dma_buffer(struct vpu_mem_desc *mem) +{ + if (mem->cpu_addr != 0) { + dma_free_coherent(0, PAGE_ALIGN(mem->size), + (void *)mem->cpu_addr, mem->phy_addr); + } +} + +/*! + * Private function to free buffers + * @return status 0 success. + */ +static int vpu_free_buffers(void) +{ + struct memalloc_record *rec, *n; + struct vpu_mem_desc mem; + + list_for_each_entry_safe(rec, n, &head, list) { + mem = rec->mem; + if (mem.cpu_addr != 0) { + vpu_free_dma_buffer(&mem); + pr_debug("[FREE] freed paddr=0x%08X\n", mem.phy_addr); + /* delete from list */ + list_del(&rec->list); + kfree(rec); + } + } + + return 0; +} + +/*! + * @brief vpu interrupt handler + */ +static irqreturn_t vpu_irq_handler(int irq, void *dev_id) +{ + struct vpu_priv *dev = dev_id; + + READ_REG(BIT_INT_STATUS); + WRITE_REG(0x1, BIT_INT_CLEAR); + + if (dev->async_queue) + kill_fasync(&dev->async_queue, SIGIO, POLL_IN); + + /* + * Clock is gated on when dec/enc started, gate it off when + * interrupt is received. + */ + clk_disable(vpu_clk); + + codec_done = 1; + wake_up_interruptible(&vpu_queue); + + return IRQ_HANDLED; +} + +/*! + * @brief open function for vpu file operation + * + * @return 0 on success or negative error code on error + */ +static int vpu_open(struct inode *inode, struct file *filp) +{ + spin_lock(&vpu_lock); + if ((open_count++ == 0) && cpu_is_mx32()) + vl2cc_enable(); + filp->private_data = (void *)(&vpu_data); + spin_unlock(&vpu_lock); + return 0; +} + +/*! + * @brief IO ctrl function for vpu file operation + * @param cmd IO ctrl command + * @return 0 on success or negative error code on error + */ +static int vpu_ioctl(struct inode *inode, struct file *filp, u_int cmd, + u_long arg) +{ + int ret = 0; + + switch (cmd) { + case VPU_IOC_PHYMEM_ALLOC: + { + struct memalloc_record *rec; + + rec = kzalloc(sizeof(*rec), GFP_KERNEL); + if (!rec) + return -ENOMEM; + + ret = copy_from_user(&(rec->mem), + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc)); + if (ret) { + kfree(rec); + return -EFAULT; + } + + pr_debug("[ALLOC] mem alloc size = 0x%x\n", + rec->mem.size); + + ret = vpu_alloc_dma_buffer(&(rec->mem)); + if (ret == -1) { + kfree(rec); + printk(KERN_ERR + "Physical memory allocation error!\n"); + break; + } + ret = copy_to_user((void __user *)arg, &(rec->mem), + sizeof(struct vpu_mem_desc)); + if (ret) { + kfree(rec); + ret = -EFAULT; + break; + } + + spin_lock(&vpu_lock); + list_add(&rec->list, &head); + spin_unlock(&vpu_lock); + + break; + } + case VPU_IOC_PHYMEM_FREE: + { + struct memalloc_record *rec, *n; + struct vpu_mem_desc vpu_mem; + + ret = copy_from_user(&vpu_mem, + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc)); + if (ret) + return -EACCES; + + pr_debug("[FREE] mem freed cpu_addr = 0x%x\n", + vpu_mem.cpu_addr); + if ((void *)vpu_mem.cpu_addr != NULL) { + vpu_free_dma_buffer(&vpu_mem); + } + + spin_lock(&vpu_lock); + list_for_each_entry_safe(rec, n, &head, list) { + if (rec->mem.cpu_addr == vpu_mem.cpu_addr) { + /* delete from list */ + list_del(&rec->list); + kfree(rec); + break; + } + } + spin_unlock(&vpu_lock); + + break; + } + case VPU_IOC_WAIT4INT: + { + u_long timeout = (u_long) arg; + if (!wait_event_interruptible_timeout + (vpu_queue, codec_done != 0, + msecs_to_jiffies(timeout))) { + printk(KERN_WARNING "VPU blocking: timeout.\n"); + ret = -ETIME; + } else if (signal_pending(current)) { + printk(KERN_WARNING + "VPU interrupt received.\n"); + ret = -ERESTARTSYS; + } else + codec_done = 0; + break; + } + case VPU_IOC_VL2CC_FLUSH: + if (cpu_is_mx32()) { + vl2cc_flush(); + } + break; + case VPU_IOC_IRAM_SETTING: + { + ret = copy_to_user((void __user *)arg, &iram, + sizeof(struct iram_setting)); + if (ret) + ret = -EFAULT; + + break; + } + case VPU_IOC_CLKGATE_SETTING: + { + u32 clkgate_en; + + if (get_user(clkgate_en, (u32 __user *) arg)) + return -EFAULT; + + if (clkgate_en) { + clk_enable(vpu_clk); + } else { + clk_disable(vpu_clk); + } + + break; + } + case VPU_IOC_GET_SHARE_MEM: + { + spin_lock(&vpu_lock); + if (share_mem.cpu_addr != 0) { + ret = copy_to_user((void __user *)arg, + &share_mem, + sizeof(struct vpu_mem_desc)); + spin_unlock(&vpu_lock); + break; + } else { + if (copy_from_user(&share_mem, + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc))) { + spin_unlock(&vpu_lock); + return -EFAULT; + } + if (vpu_alloc_dma_buffer(&share_mem) == -1) + ret = -EFAULT; + else { + if (copy_to_user((void __user *)arg, + &share_mem, + sizeof(struct + vpu_mem_desc))) + ret = -EFAULT; + } + } + spin_unlock(&vpu_lock); + break; + } + case VPU_IOC_GET_WORK_ADDR: + { + if (bitwork_mem.cpu_addr != 0) { + ret = + copy_to_user((void __user *)arg, + &bitwork_mem, + sizeof(struct vpu_mem_desc)); + break; + } else { + if (copy_from_user(&bitwork_mem, + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc))) + return -EFAULT; + + if (vpu_alloc_dma_buffer(&bitwork_mem) == -1) + ret = -EFAULT; + else if (copy_to_user((void __user *)arg, + &bitwork_mem, + sizeof(struct + vpu_mem_desc))) + ret = -EFAULT; + } + break; + } + case VPU_IOC_GET_PIC_PARA_ADDR: + { + if (pic_para_mem.cpu_addr != 0) { + ret = + copy_to_user((void __user *)arg, + &pic_para_mem, + sizeof(struct vpu_mem_desc)); + break; + } else { + if (copy_from_user(&pic_para_mem, + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc))) + return -EFAULT; + + if (vpu_alloc_dma_buffer(&pic_para_mem) == -1) + ret = -EFAULT; + else if (copy_to_user((void __user *)arg, + &pic_para_mem, + sizeof(struct + vpu_mem_desc))) + ret = -EFAULT; + } + break; + } + case VPU_IOC_GET_USER_DATA_ADDR: + { + if (user_data_mem.cpu_addr != 0) { + ret = + copy_to_user((void __user *)arg, + &user_data_mem, + sizeof(struct vpu_mem_desc)); + break; + } else { + if (copy_from_user(&user_data_mem, + (struct vpu_mem_desc *)arg, + sizeof(struct vpu_mem_desc))) + return -EFAULT; + + if (vpu_alloc_dma_buffer(&user_data_mem) == -1) + ret = -EFAULT; + else if (copy_to_user((void __user *)arg, + &user_data_mem, + sizeof(struct + vpu_mem_desc))) + ret = -EFAULT; + } + break; + } + case VPU_IOC_SYS_SW_RESET: + { + u32 reg; + + if (cpu_is_mx37()) { + reg = __raw_readl(src_base_addr); + reg |= 0x02; /* SW_VPU_RST_BIT */ + __raw_writel(reg, src_base_addr); + while (__raw_readl(src_base_addr) & 0x02) + ; + } else if (cpu_is_mx51()) { + /* mask interrupt due to vpu passed reset */ + reg = __raw_readl(src_base_addr + 5); + reg |= 0x02; + __raw_writel(reg, src_base_addr + 5); + + reg = __raw_readl(src_base_addr); + reg |= 0x5; /* warm reset vpu */ + __raw_writel(reg, src_base_addr); + while (__raw_readl(src_base_addr) & 0x04) + ; + } + break; + } + case VPU_IOC_REG_DUMP: + break; + case VPU_IOC_PHYMEM_DUMP: + break; + default: + { + printk(KERN_ERR "No such IOCTL, cmd is %d\n", cmd); + break; + } + } + return ret; +} + +/*! + * @brief Release function for vpu file operation + * @return 0 on success or negative error code on error + */ +static int vpu_release(struct inode *inode, struct file *filp) +{ + spin_lock(&vpu_lock); + if (open_count > 0 && !(--open_count)) { + vpu_free_buffers(); + + if (cpu_is_mx32()) + vl2cc_disable(); + + /* Free shared memory when vpu device is idle */ + vpu_free_dma_buffer(&share_mem); + share_mem.cpu_addr = 0; + } + spin_unlock(&vpu_lock); + + return 0; +} + +/*! + * @brief fasync function for vpu file operation + * @return 0 on success or negative error code on error + */ +static int vpu_fasync(int fd, struct file *filp, int mode) +{ + struct vpu_priv *dev = (struct vpu_priv *)filp->private_data; + return fasync_helper(fd, filp, mode, &dev->async_queue); +} + +/*! + * @brief memory map function of harware registers for vpu file operation + * @return 0 on success or negative error code on error + */ +static int vpu_map_hwregs(struct file *fp, struct vm_area_struct *vm) +{ + unsigned long pfn; + + vm->vm_flags |= VM_IO | VM_RESERVED; + vm->vm_page_prot = pgprot_noncached(vm->vm_page_prot); + pfn = VPU_BASE_ADDR >> PAGE_SHIFT; + pr_debug("size=0x%x, page no.=0x%x\n", + (int)(vm->vm_end - vm->vm_start), (int)pfn); + return remap_pfn_range(vm, vm->vm_start, pfn, vm->vm_end - vm->vm_start, + vm->vm_page_prot) ? -EAGAIN : 0; +} + +/*! + * @brief memory map function of memory for vpu file operation + * @return 0 on success or negative error code on error + */ +static int vpu_map_mem(struct file *fp, struct vm_area_struct *vm) +{ + int request_size; + request_size = vm->vm_end - vm->vm_start; + + pr_debug(" start=0x%x, pgoff=0x%x, size=0x%x\n", + (unsigned int)(vm->vm_start), (unsigned int)(vm->vm_pgoff), + request_size); + + vm->vm_flags |= VM_IO | VM_RESERVED; + vm->vm_page_prot = pgprot_noncached(vm->vm_page_prot); + + return remap_pfn_range(vm, vm->vm_start, vm->vm_pgoff, + request_size, vm->vm_page_prot) ? -EAGAIN : 0; + +} + +/*! + * @brief memory map interface for vpu file operation + * @return 0 on success or negative error code on error + */ +static int vpu_mmap(struct file *fp, struct vm_area_struct *vm) +{ + if (vm->vm_pgoff) + return vpu_map_mem(fp, vm); + else + return vpu_map_hwregs(fp, vm); +} + +struct file_operations vpu_fops = { + .owner = THIS_MODULE, + .open = vpu_open, + .ioctl = vpu_ioctl, + .release = vpu_release, + .fasync = vpu_fasync, + .mmap = vpu_mmap, +}; + +/*! + * This function is called by the driver framework to initialize the vpu device. + * @param dev The device structure for the vpu passed in by the framework. + * @return 0 on success or negative error code on error + */ +static int vpu_dev_probe(struct platform_device *pdev) +{ + int err = 0; + struct device *temp_class; + struct resource *res; + + if (cpu_is_mx32()) { + /* Obtain VL2CC base address */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + printk(KERN_ERR "vpu: unable to get VL2CC base\n"); + return -ENODEV; + } + + err = vl2cc_init(res->start); + if (err != 0) + return err; + } + + if (cpu_is_mx37() || cpu_is_mx51()) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + printk(KERN_ERR "vpu: unable to get VPU IRAM base\n"); + return -ENODEV; + } + iram.start = res->start; + iram.end = res->end; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + printk(KERN_ERR "vpu: unable to get src base addr\n"); + return -ENODEV; + } + src_base_addr = res->start; + } + + vpu_major = register_chrdev(vpu_major, "mxc_vpu", &vpu_fops); + if (vpu_major < 0) { + printk(KERN_ERR "vpu: unable to get a major for VPU\n"); + err = -EBUSY; + goto error; + } + + vpu_class = class_create(THIS_MODULE, "mxc_vpu"); + if (IS_ERR(vpu_class)) { + err = PTR_ERR(vpu_class); + goto err_out_chrdev; + } + + temp_class = device_create(vpu_class, NULL, MKDEV(vpu_major, 0), + NULL, "mxc_vpu"); + if (IS_ERR(temp_class)) { + err = PTR_ERR(temp_class); + goto err_out_class; + } + + vpu_clk = clk_get(&pdev->dev, "vpu_clk"); + if (IS_ERR(vpu_clk)) { + err = -ENOENT; + goto err_out_class; + } + + err = request_irq(MXC_INT_VPU, vpu_irq_handler, 0, "VPU_CODEC_IRQ", + (void *)(&vpu_data)); + if (err) + goto err_out_class; + + printk(KERN_INFO "VPU initialized\n"); + goto out; + + err_out_class: + device_destroy(vpu_class, MKDEV(vpu_major, 0)); + class_destroy(vpu_class); + err_out_chrdev: + unregister_chrdev(vpu_major, "mxc_vpu"); + error: + if (cpu_is_mx32()) { + vl2cc_cleanup(); + } + out: + return err; +} + +#ifdef CONFIG_PM +static int vpu_suspend(struct platform_device *pdev, pm_message_t state) +{ + int i; + unsigned long timeout; + + /* Wait for vpu go to idle state, suspect vpu cannot be changed + to idle state after about 1 sec */ + if (open_count > 0) { + timeout = jiffies + HZ; + clk_enable(vpu_clk); + while (READ_REG(BIT_BUSY_FLAG)) { + msleep(1); + if (time_after(jiffies, timeout)) + goto out; + } + clk_disable(vpu_clk); + } + + /* Make sure clock is disabled before suspend */ + vpu_clk_usercount = clk_get_usecount(vpu_clk); + for (i = 0; i < vpu_clk_usercount; i++) + clk_disable(vpu_clk); + + clk_enable(vpu_clk); + if (bitwork_mem.cpu_addr != 0) { + SAVE_WORK_REGS; + SAVE_CTRL_REGS; + SAVE_RDWR_PTR_REGS; + SAVE_DIS_FLAG_REGS; + + WRITE_REG(0x1, BIT_BUSY_FLAG); + WRITE_REG(VPU_SLEEP_REG_VALUE, BIT_RUN_COMMAND); + while (READ_REG(BIT_BUSY_FLAG)) ; + } + + clk_disable(vpu_clk); + + if (cpu_is_mx37() || cpu_is_mx51()) + mxc_pg_enable(pdev); + + return 0; + +out: + clk_disable(vpu_clk); + return -EAGAIN; + +} + +static int vpu_resume(struct platform_device *pdev) +{ + int i; + + if (cpu_is_mx37() || cpu_is_mx51()) + mxc_pg_disable(pdev); + + clk_enable(vpu_clk); + + if (bitwork_mem.cpu_addr != 0) { + u32 *p = (u32 *) bitwork_mem.cpu_addr; + u32 data; + u16 data_hi; + u16 data_lo; + + RESTORE_WORK_REGS; + + WRITE_REG(0x0, BIT_RESET_CTRL); + WRITE_REG(0x0, BIT_CODE_RUN); + + /* + * Re-load boot code, from the codebuffer in external RAM. + * Thankfully, we only need 4096 bytes, same for all platforms. + */ + if (cpu_is_mx51()) { + for (i = 0; i < 2048; i += 4) { + data = p[(i / 2) + 1]; + data_hi = (data >> 16) & 0xFFFF; + data_lo = data & 0xFFFF; + WRITE_REG((i << 16) | data_hi, BIT_CODE_DOWN); + WRITE_REG(((i + 1) << 16) | data_lo, + BIT_CODE_DOWN); + + data = p[i / 2]; + data_hi = (data >> 16) & 0xFFFF; + data_lo = data & 0xFFFF; + WRITE_REG(((i + 2) << 16) | data_hi, + BIT_CODE_DOWN); + WRITE_REG(((i + 3) << 16) | data_lo, + BIT_CODE_DOWN); + } + } else { + for (i = 0; i < 2048; i += 2) { + if (cpu_is_mx37()) + data = swab32(p[i / 2]); + else + data = p[i / 2]; + data_hi = (data >> 16) & 0xFFFF; + data_lo = data & 0xFFFF; + + WRITE_REG((i << 16) | data_hi, BIT_CODE_DOWN); + WRITE_REG(((i + 1) << 16) | data_lo, + BIT_CODE_DOWN); + } + } + + RESTORE_CTRL_REGS; + + WRITE_REG(BITVAL_PIC_RUN, BIT_INT_ENABLE); + + WRITE_REG(0x1, BIT_BUSY_FLAG); + WRITE_REG(0x1, BIT_CODE_RUN); + while (READ_REG(BIT_BUSY_FLAG)) ; + + RESTORE_RDWR_PTR_REGS; + RESTORE_DIS_FLAG_REGS; + + WRITE_REG(0x1, BIT_BUSY_FLAG); + WRITE_REG(VPU_WAKE_REG_VALUE, BIT_RUN_COMMAND); + while (READ_REG(BIT_BUSY_FLAG)) ; + } + + clk_disable(vpu_clk); + + /* Recover vpu clock */ + for (i = 0; i < vpu_clk_usercount; i++) + clk_enable(vpu_clk); + + return 0; +} +#else +#define vpu_suspend NULL +#define vpu_resume NULL +#endif /* !CONFIG_PM */ + +/*! Driver definition + * + */ +static struct platform_driver mxcvpu_driver = { + .driver = { + .name = "mxc_vpu", + }, + .probe = vpu_dev_probe, + .suspend = vpu_suspend, + .resume = vpu_resume, +}; + +static int __init vpu_init(void) +{ + int ret = platform_driver_register(&mxcvpu_driver); + + init_waitqueue_head(&vpu_queue); + + return ret; +} + +static void __exit vpu_exit(void) +{ + free_irq(MXC_INT_VPU, (void *)(&vpu_data)); + if (vpu_major > 0) { + device_destroy(vpu_class, MKDEV(vpu_major, 0)); + class_destroy(vpu_class); + unregister_chrdev(vpu_major, "mxc_vpu"); + vpu_major = 0; + } + + if (cpu_is_mx32()) { + vl2cc_cleanup(); + } + + vpu_free_dma_buffer(&bitwork_mem); + vpu_free_dma_buffer(&pic_para_mem); + vpu_free_dma_buffer(&user_data_mem); + + clk_put(vpu_clk); + + platform_driver_unregister(&mxcvpu_driver); + return; +} + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Linux VPU driver for Freescale i.MX/MXC"); +MODULE_LICENSE("GPL"); + +module_init(vpu_init); +module_exit(vpu_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/vpu/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/vpu/Kconfig @@ -0,0 +1,30 @@ +# +# Codec configuration +# + +menu "MXC VPU(Video Processing Unit) support" + +config MXC_VPU + tristate "Support for MXC VPU(Video Processing Unit)" + depends on (ARCH_MX3 || ARCH_MX27 || ARCH_MXC92323 || ARCH_MX37 || ARCH_MX51) + default y + ---help--- + The VPU codec device provides codec function for H.264/MPEG4/H.263, + as well as MPEG2/VC-1/DivX on some platforms. + +config MXC_VPU_IRAM + tristate "Use IRAM as temporary buffer for VPU to enhance performace" + depends on (ARCH_MX37 || ARCH_MX51) + default y + ---help--- + The VPU can use internal RAM as temporary buffer to save external + memroy bandwith, thus to enhance video performance. + +config MXC_VPU_DEBUG + bool "MXC VPU debugging" + depends on MXC_VPU != n + help + This is an option for the developers; most people should + say N here. This enables MXC VPU driver debugging. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/vpu/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/vpu/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the VPU drivers. +# + +obj-$(CONFIG_MXC_VPU) += vpu.o +vpu-objs := mxc_vpu.o mxc_vl2cc.o + +ifeq ($(CONFIG_MXC_VPU_DEBUG),y) +EXTRA_CFLAGS += -DDEBUG +endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/dryice-regs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/dryice-regs.h @@ -0,0 +1,207 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +#ifndef __DRYICE_REGS_H__ +#define __DRYICE_REGS_H__ + +/*********************************************************************** + * DryIce Register Definitions + ***********************************************************************/ + +/* DryIce Time Counter MSB Reg */ +#define DTCMR 0x00 + +/* DryIce Time Counter LSB Reg */ +#define DTCLR 0x04 + +/* DryIce Clock Alarm MSB Reg */ +#define DCAMR 0x08 + +/* DryIce Clock Alarm LSB Reg */ +#define DCALR 0x0c + +/* DryIce Control Reg */ +#define DCR 0x10 +#define DCR_TDCHL (1 << 30) /* Tamper Detect Config Hard Lock */ +#define DCR_TDCSL (1 << 29) /* Tamper Detect COnfig Soft Lock */ +#define DCR_KSHL (1 << 28) /* Key Select Hard Lock */ +#define DCR_KSSL (1 << 27) /* Key Select Soft Lock */ +#define DCR_RKHL (1 << 26) /* Random Key Hard Lock */ +#define DCR_RKSL (1 << 25) /* Random Key Soft Lock */ +#define DCR_PKRHL (1 << 24) /* Programmed Key Read Hard Lock */ +#define DCR_PKRSL (1 << 23) /* Programmed Key Read Soft Lock */ +#define DCR_PKWHL (1 << 22) /* Programmed Key Write Hard Lock */ +#define DCR_PKWSL (1 << 21) /* Programmed Key Write Soft Lock */ +#define DCR_MCHL (1 << 20) /* Monotonic Counter Hard Lock */ +#define DCR_MCSL (1 << 19) /* Monotonic Counter Soft Lock */ +#define DCR_TCHL (1 << 18) /* Time Counter Hard Lock */ +#define DCR_TCSL (1 << 17) /* Time Counter Soft Lock */ +#define DCR_FSHL (1 << 16) /* Failure State Hard Lock */ +#define DCR_NSA (1 << 15) /* Non-Secure Access */ +#define DCR_OSCB (1 << 14) /* Oscillator Bypass */ +#define DCR_APE (1 << 4) /* Alarm Pin Enable */ +#define DCR_TCE (1 << 3) /* Time Counter Enable */ +#define DCR_MCE (1 << 2) /* Monotonic Counter Enable */ +#define DCR_SWR (1 << 0) /* Software Reset (w/o) */ + +/* DryIce Status Reg */ +#define DSR 0x14 +#define DSR_WTD (1 << 23) /* Wire-mesh Tampering Detected */ +#define DSR_ETBD (1 << 22) /* External Tampering B Detected */ +#define DSR_ETAD (1 << 21) /* External Tampering A Detected */ +#define DSR_EBD (1 << 20) /* External Boot Detected */ +#define DSR_SAD (1 << 19) /* Security Alarm Detected */ +#define DSR_TTD (1 << 18) /* Temperature Tampering Detected */ +#define DSR_CTD (1 << 17) /* Clock Tampering Detected */ +#define DSR_VTD (1 << 16) /* Voltage Tampering Detected */ +#define DSR_KBF (1 << 11) /* Key Busy Flag */ +#define DSR_WBF (1 << 10) /* Write Busy Flag */ +#define DSR_WNF (1 << 9) /* Write Next Flag */ +#define DSR_WCF (1 << 8) /* Write Complete Flag */ +#define DSR_WEF (1 << 7) /* Write Error Flag */ +#define DSR_RKE (1 << 6) /* Random Key Error */ +#define DSR_RKV (1 << 5) /* Random Key Valid */ +#define DSR_CAF (1 << 4) /* Clock Alarm Flag */ +#define DSR_MCO (1 << 3) /* Monotonic Counter Overflow */ +#define DSR_TCO (1 << 2) /* Time Counter Overflow */ +#define DSR_NVF (1 << 1) /* Non-Valid Flag */ +#define DSR_SVF (1 << 0) /* Security Violation Flag */ + +#define DSR_TAMPER_BITS (DSR_WTD | DSR_ETBD | DSR_ETAD | DSR_EBD | DSR_SAD | \ + DSR_TTD | DSR_CTD | DSR_VTD | DSR_MCO | DSR_TCO) + +/* ensure that external tamper defs match register bits */ +#if DSR_WTD != DI_TAMPER_EVENT_WTD +#error "Mismatch between DSR_WTD and DI_TAMPER_EVENT_WTD" +#endif +#if DSR_ETBD != DI_TAMPER_EVENT_ETBD +#error "Mismatch between DSR_ETBD and DI_TAMPER_EVENT_ETBD" +#endif +#if DSR_ETAD != DI_TAMPER_EVENT_ETAD +#error "Mismatch between DSR_ETAD and DI_TAMPER_EVENT_ETAD" +#endif +#if DSR_EBD != DI_TAMPER_EVENT_EBD +#error "Mismatch between DSR_EBD and DI_TAMPER_EVENT_EBD" +#endif +#if DSR_SAD != DI_TAMPER_EVENT_SAD +#error "Mismatch between DSR_SAD and DI_TAMPER_EVENT_SAD" +#endif +#if DSR_TTD != DI_TAMPER_EVENT_TTD +#error "Mismatch between DSR_TTD and DI_TAMPER_EVENT_TTD" +#endif +#if DSR_CTD != DI_TAMPER_EVENT_CTD +#error "Mismatch between DSR_CTD and DI_TAMPER_EVENT_CTD" +#endif +#if DSR_VTD != DI_TAMPER_EVENT_VTD +#error "Mismatch between DSR_VTD and DI_TAMPER_EVENT_VTD" +#endif +#if DSR_MCO != DI_TAMPER_EVENT_MCO +#error "Mismatch between DSR_MCO and DI_TAMPER_EVENT_MCO" +#endif +#if DSR_TCO != DI_TAMPER_EVENT_TCO +#error "Mismatch between DSR_TCO and DI_TAMPER_EVENT_TCO" +#endif + +/* DryIce Interrupt Enable Reg */ +#define DIER 0x18 +#define DIER_WNIE (1 << 9) /* Write Next Interrupt Enable */ +#define DIER_WCIE (1 << 8) /* Write Complete Interrupt Enable */ +#define DIER_WEIE (1 << 7) /* Write Error Interrupt Enable */ +#define DIER_RKIE (1 << 5) /* Random Key Interrupt Enable */ +#define DIER_CAIE (1 << 4) /* Clock Alarm Interrupt Enable */ +#define DIER_MOIE (1 << 3) /* Monotonic Overflow Interrupt En */ +#define DIER_TOIE (1 << 2) /* Time Overflow Interrupt Enable */ +#define DIER_SVIE (1 << 0) /* Security Violation Interrupt En */ + +/* DryIce Monotonic Counter Reg */ +#define DMCR 0x1c + +/* DryIce Key Select Reg */ +#define DKSR 0x20 +#define DKSR_IIM_KEY 0x0 +#define DKSR_PROG_KEY 0x4 +#define DKSR_RAND_KEY 0x5 +#define DKSR_PROG_XOR_IIM_KEY 0x6 +#define DKSR_RAND_XOR_IIM_KEY 0x7 + +/* DryIce Key Control Reg */ +#define DKCR 0x24 +#define DKCR_LRK (1 << 0) /* Load Random Key */ + +/* DryIce Tamper Configuration Reg */ +#define DTCR 0x28 +#define DTCR_ETGFB_SHIFT 27 /* Ext Tamper Glitch Filter B */ +#define DTCR_ETGFB_MASK 0xf8000000 +#define DTCR_ETGFA_SHIFT 22 /* Ext Tamper Glitch Filter A */ +#define DTCR_ETGFA_MASK 0x07c00000 +#define DTCR_WTGF_SHIFT 17 /* Wire-mesh Tamper Glitch Filter */ +#define DTCR_WTGF_MASK 0x003e0000 +#define DTCR_WGFE (1 << 16) /* Wire-mesh Glitch Filter Enable */ +#define DTCR_SAOE (1 << 15) /* Security Alarm Output Enable */ +#define DTCR_MOE (1 << 9) /* Monotonic Overflow Enable */ +#define DTCR_TOE (1 << 8) /* Time Overflow Enable */ +#define DTCR_WTE (1 << 7) /* Wire-mesh Tampering Enable */ +#define DTCR_ETBE (1 << 6) /* External Tampering B Enable */ +#define DTCR_ETAE (1 << 5) /* External Tampering A Enable */ +#define DTCR_EBE (1 << 4) /* External Boot Enable */ +#define DTCR_SAIE (1 << 3) /* Security Alarm Input Enable */ +#define DTCR_TTE (1 << 2) /* Temperature Tamper Enable */ +#define DTCR_CTE (1 << 1) /* Clock Tamper Enable */ +#define DTCR_VTE (1 << 0) /* Voltage Tamper Enable */ + +/* DryIce Analog Configuration Reg */ +#define DACR 0x2c +#define DACR_VRC_SHIFT 6 /* Voltage Reference Configuration */ +#define DACR_VRC_MASK 0x000001c0 +#define DACR_HTDC_SHIFT 3 /* High Temperature Detect Configuration */ +#define DACR_HTDC_MASK 0x00000038 +#define DACR_LTDC_SHIFT 0 /* Low Temperature Detect Configuration */ +#define DACR_LTDC_MASK 0x00000007 + +/* DryIce General Purpose Reg */ +#define DGPR 0x3c + +/* DryIce Programmed Key0-7 Regs */ +#define DPKR0 0x40 +#define DPKR1 0x44 +#define DPKR2 0x48 +#define DPKR3 0x4c +#define DPKR4 0x50 +#define DPKR5 0x54 +#define DPKR6 0x58 +#define DPKR7 0x5c + +/* DryIce Random Key0-7 Regs */ +#define DRKR0 0x60 +#define DRKR1 0x64 +#define DRKR2 0x68 +#define DRKR3 0x6c +#define DRKR4 0x70 +#define DRKR5 0x74 +#define DRKR6 0x78 +#define DRKR7 0x7c + +#define DI_ADDRESS_RANGE (DRKR7 + 4) + +/* + * this doesn't really belong here but the + * portability layer doesn't include it + */ +#ifdef LINUX_KERNEL +#define EXTERN_SYMBOL(symbol) EXPORT_SYMBOL(symbol) +#else +#define EXTERN_SYMBOL(symbol) do {} while (0) +#endif + +#endif /* __DRYICE_REGS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/scc2_internals.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/scc2_internals.h @@ -0,0 +1,527 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef SCC_INTERNALS_H +#define SCC_INTERNALS_H + +/** @file scc2_internals.h + * + * @brief This is intended to be the file which contains most or all of the + * code or changes need to port the driver. It also includes other definitions + * needed by the driver. + * + * This header file should only ever be included by scc2_driver.c + * + * Compile-time flags minimally needed: + * + * @li Some sort of platform flag. Currently TAHITI and MXC are understood. + * @li Some start-of-SCC consideration, such as SCC_BASE_ADDR + * + * Some changes which could be made when porting this driver: + * #SCC_SPIN_COUNT + * + */ + +#include /* Current version Linux kernel */ +#include /* Basic support for loadable modules, + printk */ +#include /* module_init, module_exit */ +#include /* General kernel system calls */ +#include /* for interrupt.h */ +#include + +#include /* ioremap() */ +#include /* IRQ / interrupt definitions */ + + +#include + +#if defined(MXC) + +#include +#include + + +/** + * This macro is used to determine whether the SCC is enabled/available + * on the platform. This macro may need to be ported. + */ +#define SCC_FUSE __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMHWV1)) +#define SCC_ENABLED() ((SCC_FUSE & MXC_IIMHWV1_SCC_DISABLE) == 0) + +#else /* neither TAHITI nor MXC */ + +#error Do not understand target architecture + +#endif /* TAHITI */ +/** + * Define the number of Stored Keys which the SCC driver will make available. + * Value shall be from 0 to 20. Default is zero (0). + */ +/*#define SCC_KEY_SLOTS 20*/ + + +/* Temporarily define compile-time flags to make Doxygen happy. */ +#ifdef DOXYGEN_HACK +/** @addtogroup scccompileflags */ +/** @{ */ + + +/** @def NO_SMN_INTERRUPT + * The SMN interrupt is not wired to the CPU at all. + */ +#define NO_SMN_INTERRUPT + + +/** + * Register an interrupt handler for the SMN as well as + * the SCM. In some implementations, the SMN is not connected at all (see + * #NO_SMN_INTERRUPT), and in others, it is on the same interrupt line as the + * SCM. When defining this flag, the SMN interrupt should be on a separate + * line from the SCM interrupt. + */ + +#define USE_SMN_INTERRUPT + + +/** + * Turn on generation of run-time operational, debug, and error messages + */ +#define SCC_DEBUG + + +/** + * Turn on generation of run-time logging of access to the SCM and SMN + * registers. + */ +#define SCC_REGISTER_DEBUG + + +/** + * Turn on generation of run-time logging of access to the SCM Red and + * Black memories. Will only work if #SCC_REGISTER_DEBUG is also defined. + */ +#define SCC_RAM_DEBUG + + +/** + * If the driver finds the SCC in HEALTH_CHECK state, go ahead and + * run a quick ASC to bring it to SECURE state. + */ +#define SCC_BRINGUP + + +/** + * Expected to come from platform header files or compile command line. + * This symbol must be the address of the SCC + */ +#define SCC_BASE + +/** + * This must be the interrupt line number of the SCM interrupt. + */ +#define INT_SCM + +/** + * if #USE_SMN_INTERRUPT is defined, this must be the interrupt line number of + * the SMN interrupt. + */ +#define INT_SMN + +/** + * Define the number of Stored Keys which the SCC driver will make available. + * Value shall be from 0 to 20. Default is zero (0). + */ +#define SCC_KEY_SLOTS + +/** + * Make sure that this flag is defined if compiling for a Little-Endian + * platform. Linux Kernel builds provide this flag. + */ +#define __LITTLE_ENDIAN + +/** + * Make sure that this flag is defined if compiling for a Big-Endian platform. + * Linux Kernel builds provide this flag. + */ +#define __BIG_ENDIAN + +/** + * Read a 32-bit register value from a 'peripheral'. Standard Linux/Unix + * macro. + * + * @param offset Bus address of register to be read + * + * @return The value of the register + */ +#define readl(offset) + + +/** + * Write a 32-bit value to a register in a 'peripheral'. Standard Linux/Unix + * macro. + * + * @param value The 32-bit value to store + * @param offset Bus address of register to be written + * + * return (none) + */ +#define writel(value,offset) + + +/** @} */ /* end group scccompileflags */ + +#endif /* DOXYGEN_HACK */ + + +#ifndef SCC_KEY_SLOTS +#define SCC_KEY_SLOTS 0 + +#else + +#if (SCC_KEY_SLOTS < 0) || (SCC_KEY_SLOTS > 20) +#error Bad value for SCC_KEY_SLOTS +#endif + +#endif + + +/** + * Maximum length of key/secret value which can be stored in SCC. + */ +#define SCC_MAX_KEY_SIZE 256 + + +/** + * This is the size, in bytes, of each key slot, and therefore the maximum size + * of the wrapped key. + */ +#define SCC_KEY_SLOT_SIZE 32 + + +/* These come for free with Linux, but may need to be set in a port. */ +#ifndef __BIG_ENDIAN +#ifndef __LITTLE_ENDIAN +#error One of __LITTLE_ENDIAN or __BIG_ENDIAN must be #defined +#endif +#else +#ifdef __LITTLE_ENDIAN +#error Exactly one of __LITTLE_ENDIAN or __BIG_ENDIAN must be #defined +#endif +#endif + + +#ifndef SCC_CALLBACK_SIZE +/** The number of function pointers which can be stored in #scc_callbacks. + * Defaults to 4, can be overridden with compile-line argument. + */ +#define SCC_CALLBACK_SIZE 4 +#endif + + +/** Initial CRC value for CCITT-CRC calculation. */ +#define CRC_CCITT_START 0xFFFF + + +#ifdef TAHITI + +/** + * The SCC_BASE has to be SMN_BASE_ADDR on TAHITI, as the banks of + * registers are swapped in place. + */ +#define SCC_BASE SMN_BASE_ADDR + + +/** The interrupt number for the SCC (SCM only!) on Tahiti */ +#define INT_SCC_SCM 62 + + +/** Tahiti does not have the SMN interrupt wired to the CPU. */ +#define NO_SMN_INTERRUPT + + +#endif /* TAHITI */ + + +/** Number of times to spin between polling of SCC while waiting for cipher + * or zeroizing function to complete. See also #SCC_CIPHER_MAX_POLL_COUNT. */ +#define SCC_SPIN_COUNT 1000 + + +/** Number of times to polling SCC while waiting for cipher + * or zeroizing function to complete. See also #SCC_SPIN_COUNT. */ +#define SCC_CIPHER_MAX_POLL_COUNT 100 + + +/** + * @def SCC_READ_REGISTER + * Read a 32-bit value from an SCC register. Macro which depends upon + * #scc_base. Linux readl()/writel() macros operate on 32-bit quantities, as + * do SCC register reads/writes. + * + * @param offset Register offset within SCC. + * + * @return The value from the SCC's register. + */ +#ifndef SCC_REGISTER_DEBUG +#define SCC_READ_REGISTER(offset) __raw_readl(scc_base+(offset)) +#else +#define SCC_READ_REGISTER(offset) dbg_scc_read_register(offset) +#endif + + +/** + * Write a 32-bit value to an SCC register. Macro depends upon #scc_base. + * Linux readl()/writel() macros operate on 32-bit quantities, as do SCC + * register reads/writes. + * + * @param offset Register offset within SCC. + * @param value 32-bit value to store into the register + * + * @return (void) + */ +#ifndef SCC_REGISTER_DEBUG +#define SCC_WRITE_REGISTER(offset,value) \ + (void)__raw_writel(value, scc_base+(offset)) +#else +#define SCC_WRITE_REGISTER(offset,value) \ + dbg_scc_write_register(offset, value) +#endif + +/** + * Calculate the physical address of a partition from the partition number. + */ +#define SCM_PART_PHYS_ADDRESS(part) \ + ((uint32_t)scm_ram_phys_base + (part*scc_configuration.partition_size_bytes)) + +/** + * Calculate the kernel virtual address of a partition from the partition number. + */ +#define SCM_PART_ADDRESS(part) \ + (scm_ram_base + (part*scc_configuration.partition_size_bytes)) + +/** + * Calculate the partition number from the kernel virtual address. + */ +#define SCM_PART_NUMBER(address) \ + ((address - (uint32_t)scm_ram_base)/scc_configuration.partition_size_bytes) + +/** + * Calculates the byte offset into a word + * @param bp The byte (char*) pointer + * @return The offset (0, 1, 2, or 3) + */ +#define SCC_BYTE_OFFSET(bp) ((uint32_t)(bp) % sizeof(uint32_t)) + + +/** + * Converts (by rounding down) a byte pointer into a word pointer + * @param bp The byte (char*) pointer + * @return The word (uint32_t) as though it were an aligned (uint32_t*) + */ +#define SCC_WORD_PTR(bp) (((uint32_t)(bp)) & ~(sizeof(uint32_t)-1)) + + +/** + * Determine number of bytes in an SCC block + * + * @return Bytes / block + */ +#define SCC_BLOCK_SIZE_BYTES() scc_configuration.block_size_bytes + + +/** + * Maximum number of additional bytes which may be added in CRC+padding mode. + */ +#define PADDING_BUFFER_MAX_BYTES (CRC_SIZE_BYTES + sizeof(scc_block_padding)) + +/** + * Shorthand (clearer, anyway) for number of bytes in a CRC. + */ +#define CRC_SIZE_BYTES (sizeof(crc_t)) + +/** + * The polynomial used in CCITT-CRC calculation + */ +#define CRC_POLYNOMIAL 0x1021 + +/** + * Calculate CRC on one byte of data + * + * @param[in,out] running_crc A value of type crc_t where CRC is kept. This + * must be an rvalue and an lvalue. + * @param[in] byte_value The byte (uint8_t, char) to be put in the CRC + * + * @return none + */ +#define CALC_CRC(byte_value,running_crc) { \ + uint8_t data; \ + data = (0xff&(byte_value)) ^ (running_crc >> 8); \ + running_crc = scc_crc_lookup_table[data] ^ (running_crc << 8); \ +} + +/** Value of 'beginning of padding' marker in driver-provided padding */ +#define SCC_DRIVER_PAD_CHAR 0x80 + + +/** Name of the driver. Used (on Linux, anyway) when registering interrupts */ +#define SCC_DRIVER_NAME "scc" + + +/* Port -- these symbols are defined in Linux 2.6 and later. They are defined + * here for backwards compatibility because this started life as a 2.4 + * driver, and as a guide to portation to other platforms. + */ + +#if !defined(LINUX_VERSION_CODE) || LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + +#define irqreturn_t void /* Return type of an interrupt handler */ + +#define IRQ_HANDLED /* Would be '1' for handled -- as in return IRQ_HANDLED; */ + +#define IRQ_NONE /* would be '0' for not handled -- as in return IRQ_NONE; */ + +#define IRQ_RETVAL(x) /* Return x==0 (not handled) or non-zero (handled) */ + +#endif /* LINUX earlier than 2.5 */ + + +/* These are nice to have around */ +#ifndef FALSE +#define FALSE 0 +#endif +#ifndef TRUE +#define TRUE 1 +#endif + + +/** Provide a typedef for the CRC which can be used in encrypt/decrypt */ +typedef uint16_t crc_t; + + +/** Gives high-level view of state of the SCC */ +enum scc_status { + SCC_STATUS_INITIAL, /**< State of driver before ever checking */ + SCC_STATUS_CHECKING, /**< Transient state while driver loading */ + SCC_STATUS_UNIMPLEMENTED, /**< SCC is non-existent or unuseable */ + SCC_STATUS_OK, /**< SCC is in Secure or Default state */ + SCC_STATUS_FAILED /**< In Failed state */ +}; + +/** + * Information about a key slot. + */ +struct scc_key_slot +{ + uint64_t owner_id; /**< Access control value. */ + uint32_t length; /**< Length of value in slot. */ + uint32_t offset; /**< Offset of value from start of RAM. */ + uint32_t status; /**< 0 = unassigned, 1 = assigned. */ + uint32_t part_ctl; /**< for the CCMD register */ +}; + +/* Forward-declare a number routines which are not part of user api */ +static int scc_init(void); +static void scc_cleanup(void); + +/* Forward defines of internal functions */ +OS_DEV_ISR(scc_irq); +/*static irqreturn_t scc_irq(int irq, void *dev_id);*/ +/** Perform callbacks registered by #scc_monitor_security_failure(). + * + * Make sure callbacks only happen once... Since there may be some reason why + * the interrupt isn't generated, this routine could be called from base(task) + * level. + * + * One at a time, go through #scc_callbacks[] and call any non-null pointers. + */ +static void scc_perform_callbacks(void); +/*static uint32_t copy_to_scc(const uint8_t* from, uint32_t to, unsigned long count_bytes, uint16_t* crc); +static uint32_t copy_from_scc(const uint32_t from, uint8_t* to,unsigned long count_bytes, uint16_t* crc); +static scc_return_t scc_strip_padding(uint8_t* from,unsigned* count_bytes_stripped);*/ +static uint32_t scc_update_state(void); +static void scc_init_ccitt_crc(void); +static uint32_t scc_grab_config_values(void); +static int setup_interrupt_handling(void); +/** + * Perform an encryption on the input. If @c verify_crc is true, a CRC must be + * calculated on the plaintext, and appended, with padding, before computing + * the ciphertext. + * + * @param[in] count_in_bytes Count of bytes of plaintext + * @param[in] data_in Pointer to the plaintext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing ciphertext + * @param[in] add_crc Flag for computing CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + */ +/*static scc_return_t scc_encrypt(uint32_t count_in_bytes, uint8_t* data_in, uint32_t scm_control, uint8_t* data_out,int add_crc, unsigned long* count_out_bytes);*/ +/** + * Perform a decryption on the input. If @c verify_crc is true, the last block + * (maybe the two last blocks) is special - it should contain a CRC and + * padding. These must be stripped and verified. + * + * @param[in] count_in_bytes Count of bytes of ciphertext + * @param[in] data_in Pointer to the ciphertext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing plaintext + * @param[in] verify_crc Flag for running CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + + */ +/*static scc_return_t scc_decrypt(uint32_t count_in_bytes, uint8_t* data_in, uint32_t scm_control, uint8_t* data_out, int verify_crc, unsigned long* count_out_bytes);*/ +static uint32_t host_owns_partition(uint32_t part_no); +static uint32_t partition_engaged(uint32_t part_no); + +static scc_return_t scc_wait_completion(uint32_t* scm_status); +static int is_cipher_done(uint32_t* scm_status); +static scc_return_t check_register_accessible (uint32_t offset, + uint32_t smn_status, + uint32_t scm_status); +static scc_return_t check_register_offset(uint32_t offset); +/*uint8_t make_vpu_partition(void);*/ + +#ifdef SCC_REGISTER_DEBUG +static uint32_t dbg_scc_read_register(uint32_t offset); +static void dbg_scc_write_register(uint32_t offset, uint32_t value); +#endif + + +/* For Linux kernel, export the API functions to other kernel modules */ +EXPORT_SYMBOL(scc_get_configuration); +EXPORT_SYMBOL(scc_zeroize_memories); +/*EXPORT_SYMBOL(scc_crypt);*/ +EXPORT_SYMBOL(scc_set_sw_alarm); +EXPORT_SYMBOL(scc_monitor_security_failure); +EXPORT_SYMBOL(scc_stop_monitoring_security_failure); +EXPORT_SYMBOL(scc_read_register); +EXPORT_SYMBOL(scc_write_register); +EXPORT_SYMBOL(scc_allocate_partition); +EXPORT_SYMBOL(scc_engage_partition); +EXPORT_SYMBOL(scc_release_partition); +EXPORT_SYMBOL(scc_diminish_permissions); +EXPORT_SYMBOL(scc_encrypt_region); +EXPORT_SYMBOL(scc_decrypt_region); +/*EXPORT_SYMBOL(make_vpu_partition);*/ +/* Tell Linux where to invoke driver at boot/module load time */ +module_init(scc_init); +/* Tell Linux where to invoke driver on module unload */ +module_exit(scc_cleanup); + + +/* Tell Linux this is not GPL code */ +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Device Driver for SCC (SMN/SCM)"); + + +#endif /* SCC_INTERNALS_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/Kconfig @@ -0,0 +1,64 @@ +menu "MXC Security Drivers" + +config MXC_SECURITY_SCC + tristate "MXC SCC Driver" + default n + ---help--- + This module contains the core API's for accessing the SCC module. + If you are unsure about this, say N here. + +config MXC_SECURITY_SCC2 + tristate "MXC SCC2 Driver" + depends on ARCH_MX37 || ARCH_MX51 + default n + ---help--- + This module contains the core API's for accessing the SCC2 module. + If you are unsure about this, say N here. + +config SCC_DEBUG + bool "MXC SCC Module debugging" + depends on MXC_SECURITY_SCC || MXC_SECURITY_SCC2 + ---help--- + This is an option for use by developers; most people should + say N here. This enables SCC module debugging. + +config MXC_SECURITY_RNG + tristate "MXC RNG Driver" + depends on ARCH_MXC + depends on !ARCH_MXC91321 + depends on !ARCH_MX27 + default n + select MXC_SECURITY_CORE + ---help--- + This module contains the core API's for accessing the RNG module. + If you are unsure about this, say N here. + +config MXC_RNG_TEST_DRIVER + bool "MXC RNG debug register" + depends on MXC_SECURITY_RNG + default n + ---help--- + This option enables the RNG kcore driver to provide peek-poke facility + into the RNG device registers. Enable this, only for development and + testing purposes. +config MXC_RNG_DEBUG + bool "MXC RNG Module Dubugging" + depends on MXC_SECURITY_RNG + default n + ---help--- + This is an option for use by developers; most people should + say N here. This enables RNG module debugging. + +config MXC_DRYICE + tristate "MXC DryIce Driver" + depends on ARCH_MX25 + default n + ---help--- + This module contains the core API's for accessing the DryIce module. + If you are unsure about this, say N here. + +if (ARCH_MX37 || ARCH_MX51 || ARCH_MX27) +source "drivers/mxc/security/sahara2/Kconfig" +endif + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/mxc_scc_internals.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/mxc_scc_internals.h @@ -0,0 +1,498 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MXC_SCC_INTERNALS_H__ +#define __MXC_SCC_INTERNALS_H__ + +/*! + * @file mxc_scc_internals.h + * + * @brief This is intended to be the file which contains most or all of the code or + * changes need to port the driver. It also includes other definitions needed + * by the driver. + * + * This header file should only ever be included by scc_driver.c + * + * Compile-time flags minimally needed: + * + * @li Some sort of platform flag. + * @li Some start-of-SCC consideration, such as SCC_BASE_ADDR + * + * Some changes which could be made when porting this driver: + * #SCC_SPIN_COUNT + * + * @ingroup MXCSCC + */ +#if 0 +#include /* Current version Linux kernel */ +#include /* Basic support for loadable modules, + printk */ +#include /* module_init, module_exit */ +#include /* General kernel system calls */ +#include /* for interrupt.h */ +#include +#include /* IRQ / interrupt definitions */ +#include /* ioremap() */ +#endif +#include + +/* Get handle on certain per-platform symbols */ +#ifdef TAHITI +#include + +/* + * Mark the SCC as always there... as Tahiti is not officially supported by + * driver. Porting opportunity. + */ +#define SCC_ENABLED() (1) + +#elif defined(MXC) + +#include +#include + +#ifdef SCC_FUSE + +/* + * This macro is used to determine whether the SCC is enabled/available + * on the platform. This macro may need to be ported. + */ +#define SCC_ENABLED() ((SCC_FUSE & MXC_IIMHWV1_SCC_DISABLE) == 0) + +#else + +#define SCC_ENABLED() (1) + +#endif + +#else /* neither TAHITI nor MXC */ + +#error Do not understand target architecture + +#endif /* TAHITI */ + +/* Temporarily define compile-time flags to make Doxygen happy. */ +#ifdef DOXYGEN_HACK +/*! @addtogroup scccompileflags */ +/*! @{ */ + +/*! @def NO_SMN_INTERRUPT + * The SMN interrupt is not wired to the CPU at all. + */ +#define NO_SMN_INTERRUPT + +/*! + * Register an interrupt handler for the SMN as well as + * the SCM. In some implementations, the SMN is not connected at all (see + * #NO_SMN_INTERRUPT), and in others, it is on the same interrupt line as the + * SCM. When defining this flag, the SMN interrupt should be on a separate + * line from the SCM interrupt. + */ + +#define USE_SMN_INTERRUPT + +/*! + * Turn on generation of run-time operational, debug, and error messages + */ +#define SCC_DEBUG + +/*! + * Turn on generation of run-time logging of access to the SCM and SMN + * registers. + */ +#define SCC_REGISTER_DEBUG + +/*! + * Turn on generation of run-time logging of access to the SCM Red and + * Black memories. Will only work if #SCC_REGISTER_DEBUG is also defined. + */ +#define SCC_RAM_DEBUG + +/*! + * If the driver finds the SCC in HEALTH_CHECK state, go ahead and + * run a quick ASC to bring it to SECURE state. + */ +#define SCC_BRINGUP + +/*! + * Expected to come from platform header files or compile command line. + * This symbol must be the address of the SCC + */ +#define SCC_BASE + +/*! + * This must be the interrupt line number of the SCM interrupt. + */ +#define INT_SCM + +/*! + * if #USE_SMN_INTERRUPT is defined, this must be the interrupt line number of + * the SMN interrupt. + */ +#define INT_SMN + +/*! + * Define the number of Stored Keys which the SCC driver will make available. + * Value shall be from 0 to 20. Default is zero (0). + */ +#define SCC_KEY_SLOTS + +/*! + * Make sure that this flag is defined if compiling for a Little-Endian + * platform. Linux Kernel builds provide this flag. + */ +#define __LITTLE_ENDIAN + +/*! + * Make sure that this flag is defined if compiling for a Big-Endian platform. + * Linux Kernel builds provide this flag. + */ +#define __BIG_ENDIAN + +/*! + * Read a 32-bit register value from a 'peripheral'. Standard Linux/Unix + * macro. + * + * @param offset Bus address of register to be read + * + * @return The value of the register + */ +#define readl(offset) + +/*! + * Write a 32-bit value to a register in a 'peripheral'. Standard Linux/Unix + * macro. + * + * @param value The 32-bit value to store + * @param offset Bus address of register to be written + * + * return (none) + */ +#define writel(value,offset) + + /*! @} *//* end group scccompileflags */ + +#endif /* DOXYGEN_HACK */ + +/*! + * Define the number of Stored Keys which the SCC driver will make available. + * Value shall be from 0 to 20. Default is zero (0). + */ +#define SCC_KEY_SLOTS 20 + +#ifndef SCC_KEY_SLOTS +#define SCC_KEY_SLOTS 0 + +#else + +#if (SCC_KEY_SLOTS < 0) || (SCC_KEY_SLOTS > 20) +#error Bad value for SCC_KEY_SLOTS +#endif + +/*! + * Maximum length of key/secret value which can be stored in SCC. + */ +#define SCC_MAX_KEY_SIZE 32 + +/*! + * This is the size, in bytes, of each key slot, and therefore the maximum size + * of the wrapped key. + */ +#define SCC_KEY_SLOT_SIZE 32 + +/*! + * This is the offset into each RAM of the base of the area which is + * not used for Stored Keys. + */ +#define SCM_NON_RESERVED_OFFSET (SCC_KEY_SLOTS * SCC_KEY_SLOT_SIZE) + +#endif + +/* These come for free with Linux, but may need to be set in a port. */ +#ifndef __BIG_ENDIAN +#ifndef __LITTLE_ENDIAN +#error One of __LITTLE_ENDIAN or __BIG_ENDIAN must be #defined +#endif +#else +#ifdef __LITTLE_ENDIAN +#error Exactly one of __LITTLE_ENDIAN or __BIG_ENDIAN must be #defined +#endif +#endif + +#ifndef SCC_CALLBACK_SIZE +/*! The number of function pointers which can be stored in #scc_callbacks. + * Defaults to 4, can be overridden with compile-line argument. + */ +#define SCC_CALLBACK_SIZE 4 +#endif + +/*! Initial CRC value for CCITT-CRC calculation. */ +#define CRC_CCITT_START 0xFFFF + +#ifdef TAHITI + +/*! + * The SCC_BASE has to be SMN_BASE_ADDR on TAHITI, as the banks of + * registers are swapped in place. + */ +#define SCC_BASE SMN_BASE_ADDR + +/*! The interrupt number for the SCC (SCM only!) on Tahiti */ +#define INT_SCC_SCM 62 + +/*! Tahiti does not have the SMN interrupt wired to the CPU. */ +#define NO_SMN_INTERRUPT + +#endif /* TAHITI */ + +/*! Number of times to spin between polling of SCC while waiting for cipher + * or zeroizing function to complete. See also #SCC_CIPHER_MAX_POLL_COUNT. */ +#define SCC_SPIN_COUNT 1000 + +/*! Number of times to polling SCC while waiting for cipher + * or zeroizing function to complete. See also #SCC_SPIN_COUNT. */ +#define SCC_CIPHER_MAX_POLL_COUNT 100 + +/*! + * @def SCC_READ_REGISTER + * Read a 32-bit value from an SCC register. Macro which depends upon + * #scc_base. Linux readl()/writel() macros operate on 32-bit quantities, as + * do SCC register reads/writes. + * + * @param offset Register offset within SCC. + * + * @return The value from the SCC's register. + */ +#ifndef SCC_REGISTER_DEBUG +#define SCC_READ_REGISTER(offset) __raw_readl(scc_base+(offset)) +#else +#define SCC_READ_REGISTER(offset) dbg_scc_read_register(offset) +#endif + +/*! + * Write a 32-bit value to an SCC register. Macro depends upon #scc_base. + * Linux readl()/writel() macros operate on 32-bit quantities, as do SCC + * register reads/writes. + * + * @param offset Register offset within SCC. + * @param value 32-bit value to store into the register + * + * @return (void) + */ +#ifndef SCC_REGISTER_DEBUG +#define SCC_WRITE_REGISTER(offset,value) (void)__raw_writel(value, scc_base+(offset)) +#else +#define SCC_WRITE_REGISTER(offset,value) dbg_scc_write_register(offset, value) +#endif + +/*! + * Calculates the byte offset into a word + * @param bp The byte (char*) pointer + * @return The offset (0, 1, 2, or 3) + */ +#define SCC_BYTE_OFFSET(bp) ((uint32_t)(bp) % sizeof(uint32_t)) + +/*! + * Converts (by rounding down) a byte pointer into a word pointer + * @param bp The byte (char*) pointer + * @return The word (uint32_t) as though it were an aligned (uint32_t*) + */ +#define SCC_WORD_PTR(bp) (((uint32_t)(bp)) & ~(sizeof(uint32_t)-1)) + +/*! + * Determine number of bytes in an SCC block + * + * @return Bytes / block + */ +#define SCC_BLOCK_SIZE_BYTES() scc_configuration.block_size_bytes + +/*! + * Maximum number of additional bytes which may be added in CRC+padding mode. + */ +#define PADDING_BUFFER_MAX_BYTES (CRC_SIZE_BYTES + sizeof(scc_block_padding)) + +/*! + * Shorthand (clearer, anyway) for number of bytes in a CRC. + */ +#define CRC_SIZE_BYTES (sizeof(crc_t)) + +/*! + * The polynomial used in CCITT-CRC calculation + */ +#define CRC_POLYNOMIAL 0x1021 + +/*! + * Calculate CRC on one byte of data + * + * @param[in,out] running_crc A value of type crc_t where CRC is kept. This + * must be an rvalue and an lvalue. + * @param[in] byte_value The byte (uint8_t, char) to be put in the CRC + * + * @return none + */ +#define CALC_CRC(byte_value,running_crc) { \ + uint8_t data; \ + data = (0xff&(byte_value)) ^ (running_crc >> 8); \ + running_crc = scc_crc_lookup_table[data] ^ (running_crc << 8); \ +} + +/*! Value of 'beginning of padding' marker in driver-provided padding */ +#define SCC_DRIVER_PAD_CHAR 0x80 + +/*! Name of the driver. Used (on Linux, anyway) when registering interrupts */ +#define SCC_DRIVER_NAME "scc" + +/* Port -- these symbols are defined in Linux 2.6 and later. They are defined + * here for backwards compatibility because this started life as a 2.4 + * driver, and as a guide to portation to other platforms. + */ + +#if !defined(LINUX_VERSION_CODE) || LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) + +#define irqreturn_t void /* Return type of an interrupt handler */ + +#define IRQ_HANDLED /* Would be '1' for handled -- as in return IRQ_HANDLED; */ + +#define IRQ_NONE /* would be '0' for not handled -- as in return IRQ_NONE; */ + +#define IRQ_RETVAL(x) /* Return x==0 (not handled) or non-zero (handled) */ + +#endif /* LINUX earlier than 2.5 */ + +/* These are nice to have around */ +#ifndef FALSE +#define FALSE 0 +#endif +#ifndef TRUE +#define TRUE 1 +#endif + +/*! Provide a typedef for the CRC which can be used in encrypt/decrypt */ +typedef uint16_t crc_t; + +/*! Gives high-level view of state of the SCC */ +enum scc_status { + SCC_STATUS_INITIAL, /*!< State of driver before ever checking */ + SCC_STATUS_CHECKING, /*!< Transient state while driver loading */ + SCC_STATUS_UNIMPLEMENTED, /*!< SCC is non-existent or unuseable */ + SCC_STATUS_OK, /*!< SCC is in Secure or Default state */ + SCC_STATUS_FAILED /*!< In Failed state */ +}; + +/*! + * Information about a key slot. + */ +struct scc_key_slot { + uint64_t owner_id; /*!< Access control value. */ + uint32_t length; /*!< Length of value in slot. */ + uint32_t offset; /*!< Offset of value from start of each RAM. */ + uint32_t status; /*!< 0 = unassigned, 1 = assigned. */ +}; + +/* Forward-declare a number routines which are not part of user api */ +static int scc_init(void); +static void scc_cleanup(void); + +/* Forward defines of internal functions */ +OS_DEV_ISR(scc_irq); +/*! Perform callbacks registered by #scc_monitor_security_failure(). + * + * Make sure callbacks only happen once... Since there may be some reason why + * the interrupt isn't generated, this routine could be called from base(task) + * level. + * + * One at a time, go through #scc_callbacks[] and call any non-null pointers. + */ +static void scc_perform_callbacks(void); +static uint32_t copy_to_scc(const uint8_t * from, uint32_t to, + unsigned long count_bytes, uint16_t * crc); +static uint32_t copy_from_scc(const uint32_t from, uint8_t * to, + unsigned long count_bytes, uint16_t * crc); +static scc_return_t scc_strip_padding(uint8_t * from, + unsigned *count_bytes_stripped); +static uint32_t scc_update_state(void); +static void scc_init_ccitt_crc(void); +static uint32_t scc_grab_config_values(void); +static int setup_interrupt_handling(void); +/*! + * Perform an encryption on the input. If @c verify_crc is true, a CRC must be + * calculated on the plaintext, and appended, with padding, before computing + * the ciphertext. + * + * @param[in] count_in_bytes Count of bytes of plaintext + * @param[in] data_in Pointer to the plaintext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing ciphertext + * @param[in] add_crc Flag for computing CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + */ +static scc_return_t scc_encrypt(uint32_t count_in_bytes, + const uint8_t * data_in, + uint32_t scm_control, uint8_t * data_out, + int add_crc, unsigned long *count_out_bytes); + +/*! + * Perform a decryption on the input. If @c verify_crc is true, the last block + * (maybe the two last blocks) is special - it should contain a CRC and + * padding. These must be stripped and verified. + * + * @param[in] count_in_bytes Count of bytes of ciphertext + * @param[in] data_in Pointer to the ciphertext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing plaintext + * @param[in] verify_crc Flag for running CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + + */ +static scc_return_t scc_decrypt(uint32_t count_in_bytes, + const uint8_t * data_in, + uint32_t scm_control, uint8_t * data_out, + int verify_crc, unsigned long *count_out_bytes); + +static void scc_wait_completion(void); +static int is_cipher_done(void); +static scc_return_t check_register_accessible(uint32_t offset, + uint32_t smn_status, + uint32_t scm_status); +static scc_return_t check_register_offset(uint32_t offset); + +#ifdef SCC_REGISTER_DEBUG +static uint32_t dbg_scc_read_register(uint32_t offset); +static void dbg_scc_write_register(uint32_t offset, uint32_t value); +#endif + +/* For Linux kernel, export the API functions to other kernel modules */ +EXPORT_SYMBOL(scc_get_configuration); +EXPORT_SYMBOL(scc_zeroize_memories); +EXPORT_SYMBOL(scc_crypt); +EXPORT_SYMBOL(scc_set_sw_alarm); +EXPORT_SYMBOL(scc_monitor_security_failure); +EXPORT_SYMBOL(scc_stop_monitoring_security_failure); +EXPORT_SYMBOL(scc_read_register); +EXPORT_SYMBOL(scc_write_register); +EXPORT_SYMBOL(scc_alloc_slot); +EXPORT_SYMBOL(scc_dealloc_slot); +EXPORT_SYMBOL(scc_load_slot); +EXPORT_SYMBOL(scc_encrypt_slot); +EXPORT_SYMBOL(scc_decrypt_slot); +EXPORT_SYMBOL(scc_get_slot_info); + +/* Tell Linux where to invoke driver at boot/module load time */ +module_init(scc_init); +/* Tell Linux where to invoke driver on module unload */ +module_exit(scc_cleanup); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Device Driver for SCC (SMN/SCM)"); + +#endif /* __MXC_SCC_INTERNALS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/mxc_scc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/mxc_scc.c @@ -0,0 +1,2386 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_scc.c + * + * This is the driver code for the Security Controller (SCC). It has no device + * driver interface, so no user programs may access it. Its interaction with + * the Linux kernel is from calls to #scc_init() when the driver is loaded, and + * #scc_cleanup() should the driver be unloaded. The driver uses locking and + * (task-sleep/task-wakeup) functions of the kernel. It also registers itself + * to handle the interrupt line(s) from the SCC. + * + * Other drivers in the kernel may use the remaining API functions to get at + * the services of the SCC. The main service provided is the Secure Memory, + * which allows encoding and decoding of secrets with a per-chip secret key. + * + * The SCC is single-threaded, and so is this module. When the scc_crypt() + * routine is called, it will lock out other accesses to the function. If + * another task is already in the module, the subsequent caller will spin on a + * lock waiting for the other access to finish. + * + * Note that long crypto operations could cause a task to spin for a while, + * preventing other kernel work (other than interrupt processing) to get done. + * + * The external (kernel module) interface is through the following functions: + * @li scc_get_configuration() + * @li scc_crypt() + * @li scc_zeroize_memories() + * @li scc_monitor_security_failure() + * @li scc_stop_monitoring_security_failure() + * @li scc_set_sw_alarm() + * @li scc_read_register() + * @li scc_write_register() + * + * All other functions are internal to the driver. + * + * @ingroup MXCSCC +*/ +#include "sahara2/include/fsl_platform.h" +#include "sahara2/include/portable_os.h" +#include "mxc_scc_internals.h" + +#include + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + +#include +#include +#include + +#else +#include +#include +#include + +#endif + +/*! + * This is the set of errors which signal that access to the SCM RAM has + * failed or will fail. + */ +#define SCM_ACCESS_ERRORS \ + (SCM_ERR_USER_ACCESS | SCM_ERR_ILLEGAL_ADDRESS | \ + SCM_ERR_ILLEGAL_MASTER | SCM_ERR_CACHEABLE_ACCESS | \ + SCM_ERR_UNALIGNED_ACCESS | SCM_ERR_BYTE_ACCESS | \ + SCM_ERR_INTERNAL_ERROR | SCM_ERR_SMN_BLOCKING_ACCESS | \ + SCM_ERR_CIPHERING | SCM_ERR_ZEROIZING | SCM_ERR_BUSY) +/****************************************************************************** + * + * Global / Static Variables + * + *****************************************************************************/ + +/*! + * This is type void* so that a) it cannot directly be dereferenced, + * and b) pointer arithmetic on it will function in a 'normal way' for + * the offsets in scc_defines.h + * + * scc_base is the location in the iomap where the SCC's registers + * (and memory) start. + * + * The referenced data is declared volatile so that the compiler will + * not make any assumptions about the value of registers in the SCC, + * and thus will always reload the register into CPU memory before + * using it (i.e. wherever it is referenced in the driver). + * + * This value should only be referenced by the #SCC_READ_REGISTER and + * #SCC_WRITE_REGISTER macros and their ilk. All dereferences must be + * 32 bits wide. + */ +static volatile void *scc_base; + +/*! Array to hold function pointers registered by + #scc_monitor_security_failure() and processed by + #scc_perform_callbacks() */ +static void (*scc_callbacks[SCC_CALLBACK_SIZE]) (void); + +/*! Structure returned by #scc_get_configuration() */ +static scc_config_t scc_configuration = { + .driver_major_version = SCC_DRIVER_MAJOR_VERSION_1, + .driver_minor_version = SCC_DRIVER_MINOR_VERSION_8, + .scm_version = -1, + .smn_version = -1, + .block_size_bytes = -1, + .black_ram_size_blocks = -1, + .red_ram_size_blocks = -1 +}; + +/*! Key Control Information. Integrity is controlled by use of + #scc_crypto_lock. */ +static struct scc_key_slot scc_key_info[SCC_KEY_SLOTS]; + +/*! Internal flag to know whether SCC is in Failed state (and thus many + * registers are unavailable). Once it goes failed, it never leaves it. */ +static volatile enum scc_status scc_availability = SCC_STATUS_INITIAL; + +/*! Flag to say whether interrupt handler has been registered for + * SMN interrupt */ +static int smn_irq_set = 0; + +/*! Flag to say whether interrupt handler has been registered for + * SCM interrupt */ +static int scm_irq_set = 0; + +/*! This lock protects the #scc_callbacks list as well as the @c + * callbacks_performed flag in #scc_perform_callbacks. Since the data this + * protects may be read or written from either interrupt or base level, all + * operations should use the irqsave/irqrestore or similar to make sure that + * interrupts are inhibited when locking from base level. + */ +static spinlock_t scc_callbacks_lock = SPIN_LOCK_UNLOCKED; + +/*! + * Ownership of this lock prevents conflicts on the crypto operation in the SCC + * and the integrity of the #scc_key_info. + */ +static spinlock_t scc_crypto_lock = SPIN_LOCK_UNLOCKED; + +/*! Calculated once for quick reference to size of the unreserved space in one + * RAM in SCM. + */ +static uint32_t scc_memory_size_bytes; + +/*! Calculated once for quick reference to size of SCM address space */ +static uint32_t scm_highest_memory_address; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)) +#ifndef SCC_CLOCK_NOT_GATED +/*! Pointer to SCC's clock information. Initialized during scc_init(). */ +static struct clk *scc_clk = NULL; +#endif +#endif + +/*! The lookup table for an 8-bit value. Calculated once + * by #scc_init_ccitt_crc(). + */ +static uint16_t scc_crc_lookup_table[256]; + +/*! Fixed padding for appending to plaintext to fill out a block */ +static uint8_t scc_block_padding[8] = + { SCC_DRIVER_PAD_CHAR, 0, 0, 0, 0, 0, 0, 0 }; + +/****************************************************************************** + * + * Function Implementations - Externally Accessible + * + *****************************************************************************/ + +/*****************************************************************************/ +/* fn scc_init() */ +/*****************************************************************************/ +/*! + * Initialize the driver at boot time or module load time. + * + * Register with the kernel as the interrupt handler for the SCC interrupt + * line(s). + * + * Map the SCC's register space into the driver's memory space. + * + * Query the SCC for its configuration and status. Save the configuration in + * #scc_configuration and save the status in #scc_availability. Called by the + * kernel. + * + * Do any locking/wait queue initialization which may be necessary. + * + * The availability fuse may be checked, depending on platform. + */ +static int scc_init(void) +{ + uint32_t smn_status; + int i; + int return_value = -EIO; /* assume error */ + if (scc_availability == SCC_STATUS_INITIAL) { + + /* Set this until we get an initial reading */ + scc_availability = SCC_STATUS_CHECKING; + + /* Initialize the constant for the CRC function */ + scc_init_ccitt_crc(); + + /* initialize the callback table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + scc_callbacks[i] = 0; + } + + /* Initialize key slots */ + for (i = 0; i < SCC_KEY_SLOTS; i++) { + scc_key_info[i].offset = i * SCC_KEY_SLOT_SIZE; + scc_key_info[i].status = 0; /* unassigned */ + } + + /* Enable the SCC clock on platforms where it is gated */ +#ifndef SCC_CLOCK_NOT_GATED + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + mxc_clks_enable(SCC_CLK); +#else + + scc_clk = clk_get(NULL, "scc_clk"); + if (scc_clk != ERR_PTR(ENOENT)) { + clk_enable(scc_clk); + } +#endif /* LINUX_VERSION_CODE */ + +#endif /* SCC_CLOCK_NOT_GATED */ + /* See whether there is an SCC available */ + if (0 && !SCC_ENABLED()) { + os_printk(KERN_ERR + "SCC: Fuse for SCC is set to disabled. Exiting.\n"); + } else { + /* Map the SCC (SCM and SMN) memory on the internal bus into + kernel address space */ + scc_base = (void *)IO_ADDRESS(SCC_BASE); + + /* If that worked, we can try to use the SCC */ + if (scc_base == NULL) { + os_printk(KERN_ERR + "SCC: Register mapping failed. Exiting.\n"); + } else { + /* Get SCM into 'clean' condition w/interrupts cleared & + disabled */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | + SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + + /* Clear error status register (any write will do it) */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, 0); + + /* + * There is an SCC. Determine its current state. Side effect + * is to populate scc_config and scc_availability + */ + smn_status = scc_grab_config_values(); + + /* Try to set up interrupt handler(s) */ + if (scc_availability == SCC_STATUS_OK) { + if (setup_interrupt_handling() != 0) { + unsigned condition; + /*! + * The error could be only that the SCM interrupt was + * not set up. This interrupt is always masked, so + * that is not an issue. + * + * The SMN's interrupt may be shared on that line, it + * may be separate, or it may not be wired. Do what + * is necessary to check its status. + * + * Although the driver is coded for possibility of not + * having SMN interrupt, the fact that there is one + * means it should be available and used. + */ +#ifdef USE_SMN_INTERRUPT + condition = !smn_irq_set; /* Separate. Check SMN binding */ +#elif !defined(NO_SMN_INTERRUPT) + condition = !scm_irq_set; /* Shared. Check SCM binding */ +#else + condition = FALSE; /* SMN not wired at all. Ignore. */ +#endif + /* setup was not able to set up SMN interrupt */ + scc_availability = + SCC_STATUS_UNIMPLEMENTED; + } /* interrupt handling returned non-zero */ + } /* availability is OK */ + if (scc_availability == SCC_STATUS_OK) { + /* Get SMN into 'clean' condition w/interrupts cleared & + enabled */ + SCC_WRITE_REGISTER(SMN_COMMAND, + SMN_COMMAND_CLEAR_INTERRUPT + | + SMN_COMMAND_ENABLE_INTERRUPT); + } + /* availability is still OK */ + } /* if scc_base != NULL */ + + } /* if SCC_ENABLED() */ + + /* + * If status is SCC_STATUS_UNIMPLEMENTED or is still + * SCC_STATUS_CHECKING, could be leaving here with the driver partially + * initialized. In either case, cleanup (which will mark the SCC as + * UNIMPLEMENTED). + */ + if (scc_availability == SCC_STATUS_CHECKING || + scc_availability == SCC_STATUS_UNIMPLEMENTED) { + scc_cleanup(); + } else { + return_value = 0; /* All is well */ + } + } + /* ! STATUS_INITIAL */ + pr_debug("SCC: Driver Status is %s\n", + (scc_availability == SCC_STATUS_INITIAL) ? "INITIAL" : + (scc_availability == SCC_STATUS_CHECKING) ? "CHECKING" : + (scc_availability == + SCC_STATUS_UNIMPLEMENTED) ? "UNIMPLEMENTED" + : (scc_availability == + SCC_STATUS_OK) ? "OK" : (scc_availability == + SCC_STATUS_FAILED) ? "FAILED" : + "UNKNOWN"); + + return return_value; +} /* scc_init */ + +/*****************************************************************************/ +/* fn scc_cleanup() */ +/*****************************************************************************/ +/*! + * Perform cleanup before driver/module is unloaded by setting the machine + * state close to what it was when the driver was loaded. This function is + * called when the kernel is shutting down or when this driver is being + * unloaded. + * + * A driver like this should probably never be unloaded, especially if there + * are other module relying upon the callback feature for monitoring the SCC + * status. + * + * In any case, cleanup the callback table (by clearing out all of the + * pointers). Deregister the interrupt handler(s). Unmap SCC registers. + * + */ +static void scc_cleanup(void) +{ + int i; + + /* Mark the driver / SCC as unusable. */ + scc_availability = SCC_STATUS_UNIMPLEMENTED; + + /* Clear out callback table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + scc_callbacks[i] = 0; + } + + /* If SCC has been mapped in, clean it up and unmap it */ + if (scc_base) { + /* For the SCM, disable interrupts, zeroize RAMs. Interrupt + * status will appear because zeroize will complete. */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_MASK_INTERRUPTS | + SCM_INTERRUPT_CTRL_ZEROIZE_MEMORY); + + /* For the SMN, clear and disable interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND, SMN_COMMAND_CLEAR_INTERRUPT); + + /* remove virtual mapping */ + iounmap((void *)scc_base); + } + + /* Now that interrupts cannot occur, disassociate driver from the interrupt + * lines. + */ + + /* Deregister SCM interrupt handler */ + if (scm_irq_set) { + os_deregister_interrupt(INT_SCC_SCM); + } + + /* Deregister SMN interrupt handler */ + if (smn_irq_set) { +#ifdef USE_SMN_INTERRUPT + os_deregister_interrupt(INT_SCC_SMN); +#endif + } + pr_debug("SCC driver cleaned up.\n"); + +} /* scc_cleanup */ + +/*****************************************************************************/ +/* fn scc_get_configuration() */ +/*****************************************************************************/ +scc_config_t *scc_get_configuration(void) +{ + /* + * If some other driver calls scc before the kernel does, make sure that + * this driver's initialization is performed. + */ + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /*! + * If there is no SCC, yet the driver exists, the value -1 will be in + * the #scc_config_t fields for other than the driver versions. + */ + return &scc_configuration; +} /* scc_get_configuration */ + +/*****************************************************************************/ +/* fn scc_zeroize_memories() */ +/*****************************************************************************/ +scc_return_t scc_zeroize_memories(void) +{ + scc_return_t return_status = SCC_RET_FAIL; + uint32_t status; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + if (scc_availability == SCC_STATUS_OK) { + unsigned long irq_flags; /* for IRQ save/restore */ + + /* Lock access to crypto memory of the SCC */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + /* Start the Zeroize by setting a bit in the SCM_INTERRUPT_CTRL + * register */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_MASK_INTERRUPTS + | SCM_INTERRUPT_CTRL_ZEROIZE_MEMORY); + + scc_wait_completion(); + + /* Get any error info */ + status = SCC_READ_REGISTER(SCM_ERROR_STATUS); + + /* unlock the SCC */ + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + if (!(status & SCM_ERR_ZEROIZE_FAILED)) { + return_status = SCC_RET_OK; + } else { + pr_debug + ("SCC: Zeroize failed. SCM Error Status is 0x%08x\n", + status); + } + + /* Clear out any status. */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + + /* and any error status */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, 0); + } + + return return_status; +} /* scc_zeroize_memories */ + +/*****************************************************************************/ +/* fn scc_crypt() */ +/*****************************************************************************/ +scc_return_t +scc_crypt(unsigned long count_in_bytes, const uint8_t * data_in, + const uint8_t * init_vector, + scc_enc_dec_t direction, scc_crypto_mode_t crypto_mode, + scc_verify_t check_mode, uint8_t * data_out, + unsigned long *count_out_bytes) + +{ + scc_return_t return_code = SCC_RET_FAIL; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + (void)scc_update_state(); /* in case no interrupt line from SMN */ + + /* make initial error checks */ + if (scc_availability != SCC_STATUS_OK + || count_in_bytes == 0 + || data_in == 0 + || data_out == 0 + || (crypto_mode != SCC_CBC_MODE && crypto_mode != SCC_ECB_MODE) + || (crypto_mode == SCC_CBC_MODE && init_vector == NULL) + || (direction != SCC_ENCRYPT && direction != SCC_DECRYPT) + || (check_mode == SCC_VERIFY_MODE_NONE && + count_in_bytes % SCC_BLOCK_SIZE_BYTES() != 0) + || (direction == SCC_DECRYPT && + count_in_bytes % SCC_BLOCK_SIZE_BYTES() != 0) + || (check_mode != SCC_VERIFY_MODE_NONE && + check_mode != SCC_VERIFY_MODE_CCITT_CRC)) { + pr_debug + ("SCC: scc_crypt() count_in_bytes_ok = %d; data_in_ok = %d;" + " data_out_ok = %d; iv_ok = %d\n", !(count_in_bytes == 0), + !(data_in == 0), !(data_out == 0), + !(crypto_mode == SCC_CBC_MODE && init_vector == NULL)); + pr_debug("SCC: scc_crypt() mode_ok=%d; direction_ok=%d;" + " size_ok=%d, check_mode_ok=%d\n", + !(crypto_mode != SCC_CBC_MODE + && crypto_mode != SCC_ECB_MODE), + !(direction != SCC_ENCRYPT + && direction != SCC_DECRYPT), + !((check_mode == SCC_VERIFY_MODE_NONE + && count_in_bytes % SCC_BLOCK_SIZE_BYTES() != 0) + || (direction == SCC_DECRYPT + && count_in_bytes % SCC_BLOCK_SIZE_BYTES() != + 0)), !(check_mode != SCC_VERIFY_MODE_NONE + && check_mode != + SCC_VERIFY_MODE_CCITT_CRC)); + pr_debug("SCC: scc_crypt() detected bad argument\n"); + } else { + /* Start settings for write to SCM_CONTROL register */ + uint32_t scc_control = SCM_CONTROL_START_CIPHER; + unsigned long irq_flags; /* for IRQ save/restore */ + + /* Lock access to crypto memory of the SCC */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + /* Special needs for CBC Mode */ + if (crypto_mode == SCC_CBC_MODE) { + scc_control |= SCM_CBC_MODE; /* change default of ECB */ + /* Put in Initial Context. Vector registers are contiguous */ + copy_to_scc(init_vector, SCM_INIT_VECTOR_0, + SCC_BLOCK_SIZE_BYTES(), NULL); + } + + /* Fill the RED_START register */ + SCC_WRITE_REGISTER(SCM_RED_START, + SCM_NON_RESERVED_OFFSET / + SCC_BLOCK_SIZE_BYTES()); + + /* Fill the BLACK_START register */ + SCC_WRITE_REGISTER(SCM_BLACK_START, + SCM_NON_RESERVED_OFFSET / + SCC_BLOCK_SIZE_BYTES()); + + if (direction == SCC_ENCRYPT) { + /* Check for sufficient space in data_out */ + if (check_mode == SCC_VERIFY_MODE_NONE) { + if (*count_out_bytes < count_in_bytes) { + return_code = + SCC_RET_INSUFFICIENT_SPACE; + } + } else { /* SCC_VERIFY_MODE_CCITT_CRC */ + /* Calculate extra bytes needed for crc (2) and block + padding */ + int padding_needed = + CRC_SIZE_BYTES + SCC_BLOCK_SIZE_BYTES() - + ((count_in_bytes + CRC_SIZE_BYTES) + % SCC_BLOCK_SIZE_BYTES()); + + /* Verify space is available */ + if (*count_out_bytes < + count_in_bytes + padding_needed) { + return_code = + SCC_RET_INSUFFICIENT_SPACE; + } + } + /* If did not detect space error, do the encryption */ + if (return_code != SCC_RET_INSUFFICIENT_SPACE) { + return_code = + scc_encrypt(count_in_bytes, data_in, + scc_control, data_out, + check_mode == + SCC_VERIFY_MODE_CCITT_CRC, + count_out_bytes); + } + + } + /* direction == SCC_ENCRYPT */ + else { /* SCC_DECRYPT */ + /* Check for sufficient space in data_out */ + if (check_mode == SCC_VERIFY_MODE_NONE) { + if (*count_out_bytes < count_in_bytes) { + return_code = + SCC_RET_INSUFFICIENT_SPACE; + } + } else { /* SCC_VERIFY_MODE_CCITT_CRC */ + /* Do initial check. Assume last block (of padding) and CRC + * will get stripped. After decipher is done and padding is + * removed, will know exact value. + */ + int possible_size = + (int)count_in_bytes - CRC_SIZE_BYTES - + SCC_BLOCK_SIZE_BYTES(); + if ((int)*count_out_bytes < possible_size) { + pr_debug + ("SCC: insufficient decrypt space %ld/%d.\n", + *count_out_bytes, possible_size); + return_code = + SCC_RET_INSUFFICIENT_SPACE; + } + } + + /* If did not detect space error, do the decryption */ + if (return_code != SCC_RET_INSUFFICIENT_SPACE) { + return_code = + scc_decrypt(count_in_bytes, data_in, + scc_control, data_out, + check_mode == + SCC_VERIFY_MODE_CCITT_CRC, + count_out_bytes); + } + + } /* SCC_DECRYPT */ + + /* unlock the SCC */ + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + } /* else no initial error */ + + return return_code; +} /* scc_crypt */ + +/*****************************************************************************/ +/* fn scc_set_sw_alarm() */ +/*****************************************************************************/ +void scc_set_sw_alarm(void) +{ + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Update scc_availability based on current SMN status. This might + * perform callbacks. + */ + (void)scc_update_state(); + + /* if everything is OK, make it fail */ + if (scc_availability == SCC_STATUS_OK) { + + /* sound the alarm (and disable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND, SMN_COMMAND_SET_SOFTWARE_ALARM); + + scc_availability = SCC_STATUS_FAILED; /* Remember what we've done */ + + /* In case SMN interrupt is not available, tell the world */ + scc_perform_callbacks(); + } + + return; +} /* scc_set_sw_alarm */ + +/*****************************************************************************/ +/* fn scc_monitor_security_failure() */ +/*****************************************************************************/ +scc_return_t scc_monitor_security_failure(void callback_func(void)) +{ + int i; + unsigned long irq_flags; /* for IRQ save/restore */ + scc_return_t return_status = SCC_RET_TOO_MANY_FUNCTIONS; + int function_stored = FALSE; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Acquire lock of callbacks table. Could be spin_lock_irq() if this + * routine were just called from base (not interrupt) level + */ + spin_lock_irqsave(&scc_callbacks_lock, irq_flags); + + /* Search through table looking for empty slot */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + if (scc_callbacks[i] == callback_func) { + if (function_stored) { + /* Saved duplicate earlier. Clear this later one. */ + scc_callbacks[i] = NULL; + } + /* Exactly one copy is now stored */ + return_status = SCC_RET_OK; + break; + } else if (scc_callbacks[i] == NULL && !function_stored) { + /* Found open slot. Save it and remember */ + scc_callbacks[i] = callback_func; + return_status = SCC_RET_OK; + function_stored = TRUE; + } + } + + /* Free the lock */ + spin_unlock_irqrestore(&scc_callbacks_lock, irq_flags); + + return return_status; +} /* scc_monitor_security_failure */ + +/*****************************************************************************/ +/* fn scc_stop_monitoring_security_failure() */ +/*****************************************************************************/ +void scc_stop_monitoring_security_failure(void callback_func(void)) +{ + unsigned long irq_flags; /* for IRQ save/restore */ + int i; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Acquire lock of callbacks table. Could be spin_lock_irq() if this + * routine were just called from base (not interrupt) level + */ + spin_lock_irqsave(&scc_callbacks_lock, irq_flags); + + /* Search every entry of the table for this function */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + if (scc_callbacks[i] == callback_func) { + scc_callbacks[i] = NULL; /* found instance - clear it out */ + break; + } + } + + /* Free the lock */ + spin_unlock_irqrestore(&scc_callbacks_lock, irq_flags); + + return; +} /* scc_stop_monitoring_security_failure */ + +/*****************************************************************************/ +/* fn scc_read_register() */ +/*****************************************************************************/ +scc_return_t scc_read_register(int register_offset, uint32_t * value) +{ + scc_return_t return_status = SCC_RET_FAIL; + uint32_t smn_status; + uint32_t scm_status; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* First layer of protection -- completely unaccessible SCC */ + if (scc_availability != SCC_STATUS_UNIMPLEMENTED) { + + /* Second layer -- that offset is valid */ + if (register_offset != SMN_BITBANK_DECREMENT && /* write only! */ + check_register_offset(register_offset) == SCC_RET_OK) { + + /* Get current status / update local state */ + smn_status = scc_update_state(); + scm_status = SCC_READ_REGISTER(SCM_STATUS); + + /* + * Third layer - verify that the register being requested is + * available in the current state of the SCC. + */ + if ((return_status = + check_register_accessible(register_offset, + smn_status, + scm_status)) == + SCC_RET_OK) { + *value = SCC_READ_REGISTER(register_offset); + } + } + } + + return return_status; +} /* scc_read_register */ + +/*****************************************************************************/ +/* fn scc_write_register() */ +/*****************************************************************************/ +scc_return_t scc_write_register(int register_offset, uint32_t value) +{ + scc_return_t return_status = SCC_RET_FAIL; + uint32_t smn_status; + uint32_t scm_status; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* First layer of protection -- completely unaccessible SCC */ + if (scc_availability != SCC_STATUS_UNIMPLEMENTED) { + + /* Second layer -- that offset is valid */ + if (!(register_offset == SCM_STATUS || /* These registers are */ + register_offset == SCM_CONFIGURATION || /* Read Only */ + register_offset == SMN_BIT_COUNT || + register_offset == SMN_TIMER) && + check_register_offset(register_offset) == SCC_RET_OK) { + + /* Get current status / update local state */ + smn_status = scc_update_state(); + scm_status = SCC_READ_REGISTER(SCM_STATUS); + + /* + * Third layer - verify that the register being requested is + * available in the current state of the SCC. + */ + if (check_register_accessible + (register_offset, smn_status, scm_status) == 0) { + SCC_WRITE_REGISTER(register_offset, value); + return_status = SCC_RET_OK; + } + } + } + + return return_status; +} /* scc_write_register() */ + +/****************************************************************************** + * + * Function Implementations - Internal + * + *****************************************************************************/ + +/*****************************************************************************/ +/* fn scc_irq() */ +/*****************************************************************************/ +/*! + * This is the interrupt handler for the SCC. + * + * This function checks the SMN Status register to see whether it + * generated the interrupt, then it checks the SCM Status register to + * see whether it needs attention. + * + * If an SMN Interrupt is active, then the SCC state set to failure, and + * #scc_perform_callbacks() is invoked to notify any interested parties. + * + * The SCM Interrupt should be masked, as this driver uses polling to determine + * when the SCM has completed a crypto or zeroing operation. Therefore, if the + * interrupt is active, the driver will just clear the interrupt and (re)mask. + * + */ +OS_DEV_ISR(scc_irq) +{ + uint32_t smn_status; + uint32_t scm_status; + int handled = 0; /* assume interrupt isn't from SMN */ +#if defined(USE_SMN_INTERRUPT) + int smn_irq = INT_SCC_SMN; /* SMN interrupt is on a line by itself */ +#elif defined (NO_SMN_INTERRUPT) + int smn_irq = -1; /* not wired to CPU at all */ +#else + int smn_irq = INT_SCC_SCM; /* SMN interrupt shares a line with SCM */ +#endif + + /* Update current state... This will perform callbacks... */ + smn_status = scc_update_state(); + + /* SMN is on its own interrupt line. Verify the IRQ was triggered + * before clearing the interrupt and marking it handled. */ + if ((os_dev_get_irq() == smn_irq) && + (smn_status & SMN_STATUS_SMN_STATUS_IRQ)) { + SCC_WRITE_REGISTER(SMN_COMMAND, SMN_COMMAND_CLEAR_INTERRUPT); + handled++; /* tell kernel that interrupt was handled */ + } + + /* Check on the health of the SCM */ + scm_status = SCC_READ_REGISTER(SCM_STATUS); + + /* The driver masks interrupts, so this should never happen. */ + if (os_dev_get_irq() == INT_SCC_SCM) { + /* but if it does, try to prevent it in the future */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + handled++; + } + + /* Any non-zero value of handled lets kernel know we got something */ + return IRQ_RETVAL(handled); +} + +/*****************************************************************************/ +/* fn scc_perform_callbacks() */ +/*****************************************************************************/ +/*! Perform callbacks registered by #scc_monitor_security_failure(). + * + * Make sure callbacks only happen once... Since there may be some reason why + * the interrupt isn't generated, this routine could be called from base(task) + * level. + * + * One at a time, go through #scc_callbacks[] and call any non-null pointers. + */ +static void scc_perform_callbacks(void) +{ + static int callbacks_performed = 0; + unsigned long irq_flags; /* for IRQ save/restore */ + int i; + + /* Acquire lock of callbacks table and callbacks_performed flag */ + spin_lock_irqsave(&scc_callbacks_lock, irq_flags); + + if (!callbacks_performed) { + callbacks_performed = 1; + + /* Loop over all of the entries in the table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + /* If not null, ... */ + if (scc_callbacks[i]) { + scc_callbacks[i] (); /* invoke the callback routine */ + } + } + } + + spin_unlock_irqrestore(&scc_callbacks_lock, irq_flags); + + return; +} + +/*****************************************************************************/ +/* fn copy_to_scc() */ +/*****************************************************************************/ +/*! + * Move data from possibly unaligned source and realign for SCC, possibly + * while calculating CRC. + * + * Multiple calls can be made to this routine (without intervening calls to + * #copy_from_scc(), as long as the sum total of bytes copied is a multiple of + * four (SCC native word size). + * + * @param[in] from Location in memory + * @param[out] to Location in SCC + * @param[in] count_bytes Number of bytes to copy + * @param[in,out] crc Pointer to CRC. Initial value must be + * #CRC_CCITT_START if this is the start of + * message. Output is the resulting (maybe + * partial) CRC. If NULL, no crc is calculated. + * + * @return Zero - success. Non-zero - SCM status bits defining failure. + */ +static uint32_t +copy_to_scc(const uint8_t * from, uint32_t to, unsigned long count_bytes, + uint16_t * crc) +{ + int i; + uint32_t scm_word; + uint16_t current_crc = 0; /* local copy for fast access */ + uint32_t status; + + pr_debug("SCC: copying %ld bytes to 0x%0x.\n", count_bytes, to); + + status = SCC_READ_REGISTER(SCM_ERROR_STATUS) & SCM_ACCESS_ERRORS; + if (status != 0) { + pr_debug + ("SCC copy_to_scc(): Error status detected (before copy):" + " %08x\n", status); + /* clear out errors left behind by somebody else */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, status); + } + + if (crc) { + current_crc = *crc; + } + + /* Initialize value being built for SCM. If we are starting 'clean', + * set it to zero. Otherwise pick up partial value which had been saved + * earlier. */ + if (SCC_BYTE_OFFSET(to) == 0) { + scm_word = 0; + } else { + scm_word = SCC_READ_REGISTER(SCC_WORD_PTR(to)); /* recover */ + } + + /* Now build up SCM words and write them out when each is full */ + for (i = 0; i < count_bytes; i++) { + uint8_t byte = *from++; /* value from plaintext */ + +#if defined(__BIG_ENDIAN) || defined(FSL_HAVE_DRYICE) + scm_word = (scm_word << 8) | byte; /* add byte to SCM word */ +#else + scm_word = (byte << 24) | (scm_word >> 8); +#endif + /* now calculate CCITT CRC */ + if (crc) { + CALC_CRC(byte, current_crc); + } + + to++; /* bump location in SCM */ + + /* check for full word */ + if (SCC_BYTE_OFFSET(to) == 0) { + SCC_WRITE_REGISTER((uint32_t) (to - 4), scm_word); /* write it out */ + } + } + + /* If at partial word after previous loop, save it in SCM memory for + next time. */ + if (SCC_BYTE_OFFSET(to) != 0) { + SCC_WRITE_REGISTER(SCC_WORD_PTR(to), scm_word); /* save */ + } + + /* Copy CRC back */ + if (crc) { + *crc = current_crc; + } + + status = SCC_READ_REGISTER(SCM_ERROR_STATUS) & SCM_ACCESS_ERRORS; + if (status != 0) { + pr_debug("SCC copy_to_scc(): Error status detected: %08x\n", + status); + /* Clear any/all bits. */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, status); + } + return status; +} + +/*****************************************************************************/ +/* fn copy_from_scc() */ +/*****************************************************************************/ +/*! + * Move data from aligned 32-bit source and place in (possibly unaligned) + * target, and maybe calculate CRC at the same time. + * + * Multiple calls can be made to this routine (without intervening calls to + * #copy_to_scc(), as long as the sum total of bytes copied is be a multiple + * of four. + * + * @param[in] from Location in SCC + * @param[out] to Location in memory + * @param[in] count_bytes Number of bytes to copy + * @param[in,out] crc Pointer to CRC. Initial value must be + * #CRC_CCITT_START if this is the start of + * message. Output is the resulting (maybe + * partial) CRC. If NULL, crc is not calculated. + * + * @return Zero - success. Non-zero - SCM status bits defining failure. + */ +static uint32_t +copy_from_scc(const uint32_t from, uint8_t * to, unsigned long count_bytes, + uint16_t * crc) +{ + uint32_t running_from = from; + uint32_t scm_word; + uint16_t current_crc = 0; /* local copy for fast access */ + uint32_t status; + pr_debug("SCC: copying %ld bytes from 0x%x.\n", count_bytes, from); + status = SCC_READ_REGISTER(SCM_ERROR_STATUS) & SCM_ACCESS_ERRORS; + if (status != 0) { + pr_debug + ("SCC copy_from_scc(): Error status detected (before copy):" + " %08x\n", status); + /* clear out errors left behind by somebody else */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, status); + } + + if (crc) { + current_crc = *crc; + } + + /* Read word which is sitting in SCM memory. Ignore byte offset */ + scm_word = SCC_READ_REGISTER(SCC_WORD_PTR(running_from)); + + /* If necessary, move the 'first' byte into place */ + if (SCC_BYTE_OFFSET(running_from) != 0) { +#if defined(__BIG_ENDIAN) || defined(FSL_HAVE_DRYICE) + scm_word <<= 8 * SCC_BYTE_OFFSET(running_from); +#else + scm_word >>= 8 * SCC_BYTE_OFFSET(running_from); +#endif + } + + /* Now build up SCM words and write them out when each is full */ + while (count_bytes--) { + uint8_t byte; /* value from plaintext */ + +#if defined(__BIG_ENDIAN) || defined(FSL_HAVE_DRYICE) + byte = (scm_word & 0xff000000) >> 24; /* pull byte out of SCM word */ + scm_word <<= 8; /* shift over to remove the just-pulled byte */ +#else + byte = (scm_word & 0xff); + scm_word >>= 8; /* shift over to remove the just-pulled byte */ +#endif + *to++ = byte; /* send byte to memory */ + + /* now calculate CRC */ + if (crc) { + CALC_CRC(byte, current_crc); + } + + running_from++; + /* check for empty word */ + if (count_bytes && SCC_BYTE_OFFSET(running_from) == 0) { + /* read one in */ + scm_word = SCC_READ_REGISTER((uint32_t) running_from); + } + } + + if (crc) { + *crc = current_crc; + } + + status = SCC_READ_REGISTER(SCM_ERROR_STATUS) & SCM_ACCESS_ERRORS; + if (status != 0) { + pr_debug("SCC copy_from_scc(): Error status detected: %08x\n", + status); + /* Clear any/all bits. */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, status); + } + + return status; +} + +/*****************************************************************************/ +/* fn scc_strip_padding() */ +/*****************************************************************************/ +/*! + * Remove padding from plaintext. Search backwards for #SCC_DRIVER_PAD_CHAR, + * verifying that each byte passed over is zero (0). Maximum number of bytes + * to examine is 8. + * + * @param[in] from Pointer to byte after end of message + * @param[out] count_bytes_stripped Number of padding bytes removed by this + * function. + * + * @return #SCC_RET_OK if all goes, well, #SCC_RET_FAIL if padding was + * not present. +*/ +static scc_return_t +scc_strip_padding(uint8_t * from, unsigned *count_bytes_stripped) +{ + int i = SCC_BLOCK_SIZE_BYTES(); + scc_return_t return_code = SCC_RET_VERIFICATION_FAILED; + + /* + * Search backwards looking for the magic marker. If it isn't found, + * make sure that a 0 byte is there in its place. Stop after the maximum + * amount of padding (8 bytes) has been searched); + */ + while (i-- > 0) { + if (*--from == SCC_DRIVER_PAD_CHAR) { + *count_bytes_stripped = SCC_BLOCK_SIZE_BYTES() - i; + return_code = SCC_RET_OK; + break; + } else if (*from != 0) { /* if not marker, check for 0 */ + pr_debug("SCC: Found non-zero interim pad: 0x%x\n", + *from); + break; + } + } + + return return_code; +} + +/*****************************************************************************/ +/* fn scc_update_state() */ +/*****************************************************************************/ +/*! + * Make certain SCC is still running. + * + * Side effect is to update #scc_availability and, if the state goes to failed, + * run #scc_perform_callbacks(). + * + * (If #SCC_BRINGUP is defined, bring SCC to secure state if it is found to be + * in health check state) + * + * @return Current value of #SMN_STATUS register. + */ +static uint32_t scc_update_state(void) +{ + uint32_t smn_status_register = SMN_STATE_FAIL; + int smn_state; + + /* if FAIL or UNIMPLEMENTED, don't bother */ + if (scc_availability == SCC_STATUS_CHECKING || + scc_availability == SCC_STATUS_OK) { + + smn_status_register = SCC_READ_REGISTER(SMN_STATUS); + smn_state = smn_status_register & SMN_STATUS_STATE_MASK; + +#ifdef SCC_BRINGUP + /* If in Health Check while booting, try to 'bringup' to Secure mode */ + if (scc_availability == SCC_STATUS_CHECKING && + smn_state == SMN_STATE_HEALTH_CHECK) { + /* Code up a simple algorithm for the ASC */ + SCC_WRITE_REGISTER(SMN_SEQUENCE_START, 0xaaaa); + SCC_WRITE_REGISTER(SMN_SEQUENCE_END, 0x5555); + SCC_WRITE_REGISTER(SMN_SEQUENCE_CHECK, 0x5555); + /* State should be SECURE now */ + smn_status_register = SCC_READ_REGISTER(SMN_STATUS); + smn_state = smn_status_register & SMN_STATUS_STATE_MASK; + } +#endif + + /* + * State should be SECURE or NON_SECURE for operation of the part. If + * FAIL, mark failed (i.e. limited access to registers). Any other + * state, mark unimplemented, as the SCC is unuseable. + */ + if (smn_state == SMN_STATE_SECURE + || smn_state == SMN_STATE_NON_SECURE) { + /* Healthy */ + scc_availability = SCC_STATUS_OK; + } else if (smn_state == SMN_STATE_FAIL) { + scc_availability = SCC_STATUS_FAILED; /* uh oh - unhealthy */ + scc_perform_callbacks(); + os_printk(KERN_ERR "SCC: SCC went into FAILED mode\n"); + } else { + /* START, ZEROIZE RAM, HEALTH CHECK, or unknown */ + scc_availability = SCC_STATUS_UNIMPLEMENTED; /* unuseable */ + os_printk(KERN_ERR "SCC: SCC declared UNIMPLEMENTED\n"); + } + } + /* if availability is initial or ok */ + return smn_status_register; +} + +/*****************************************************************************/ +/* fn scc_init_ccitt_crc() */ +/*****************************************************************************/ +/*! + * Populate the partial CRC lookup table. + * + * @return none + * + */ +static void scc_init_ccitt_crc(void) +{ + int dividend; /* index for lookup table */ + uint16_t remainder; /* partial value for a given dividend */ + int bit; /* index into bits of a byte */ + + /* + * Compute the remainder of each possible dividend. + */ + for (dividend = 0; dividend < 256; ++dividend) { + /* + * Start with the dividend followed by zeros. + */ + remainder = dividend << (8); + + /* + * Perform modulo-2 division, a bit at a time. + */ + for (bit = 8; bit > 0; --bit) { + /* + * Try to divide the current data bit. + */ + if (remainder & 0x8000) { + remainder = (remainder << 1) ^ CRC_POLYNOMIAL; + } else { + remainder = (remainder << 1); + } + } + + /* + * Store the result into the table. + */ + scc_crc_lookup_table[dividend] = remainder; + } + +} /* scc_init_ccitt_crc() */ + +/*****************************************************************************/ +/* fn grab_config_values() */ +/*****************************************************************************/ +/*! + * grab_config_values() will read the SCM Configuration and SMN Status + * registers and store away version and size information for later use. + * + * @return The current value of the SMN Status register. + */ +static uint32_t scc_grab_config_values(void) +{ + uint32_t config_register; + uint32_t smn_status_register = SMN_STATE_FAIL; + + if (scc_availability != SCC_STATUS_UNIMPLEMENTED) { + /* access the SCC - these are 'safe' registers */ + config_register = SCC_READ_REGISTER(SCM_CONFIGURATION); + pr_debug("SCC Driver: SCM config is 0x%08x\n", config_register); + + /* Get SMN status and update scc_availability */ + smn_status_register = scc_update_state(); + pr_debug("SCC Driver: SMN status is 0x%08x\n", + smn_status_register); + + /* save sizes and versions information for later use */ + scc_configuration.block_size_bytes = (config_register & + SCM_CFG_BLOCK_SIZE_MASK) + >> SCM_CFG_BLOCK_SIZE_SHIFT; + + scc_configuration.red_ram_size_blocks = (config_register & + SCM_CFG_RED_SIZE_MASK) + >> SCM_CFG_RED_SIZE_SHIFT; + + scc_configuration.black_ram_size_blocks = (config_register & + SCM_CFG_BLACK_SIZE_MASK) + >> SCM_CFG_BLACK_SIZE_SHIFT; + + scc_configuration.scm_version = (config_register + & SCM_CFG_VERSION_ID_MASK) + >> SCM_CFG_VERSION_ID_SHIFT; + + scc_configuration.smn_version = (smn_status_register & + SMN_STATUS_VERSION_ID_MASK) + >> SMN_STATUS_VERSION_ID_SHIFT; + + if (scc_configuration.scm_version != SCM_VERSION_1) { + scc_availability = SCC_STATUS_UNIMPLEMENTED; /* Unknown version */ + } + + scc_memory_size_bytes = (SCC_BLOCK_SIZE_BYTES() * + scc_configuration. + black_ram_size_blocks) + - SCM_NON_RESERVED_OFFSET; + + /* This last is for driver consumption only */ + scm_highest_memory_address = SCM_BLACK_MEMORY + + (SCC_BLOCK_SIZE_BYTES() * + scc_configuration.black_ram_size_blocks); + } + + return smn_status_register; +} /* grab_config_values */ + +/*****************************************************************************/ +/* fn setup_interrupt_handling() */ +/*****************************************************************************/ +/*! + * Register the SCM and SMN interrupt handlers. + * + * Called from #scc_init() + * + * @return 0 on success + */ +static int setup_interrupt_handling(void) +{ + int smn_error_code = -1; + int scm_error_code = -1; + + /* Disnable SCM interrupts */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + +#ifdef USE_SMN_INTERRUPT + /* Install interrupt service routine for SMN. */ + smn_error_code = os_register_interrupt(SCC_DRIVER_NAME, + INT_SCC_SMN, scc_irq); + if (smn_error_code != 0) { + os_printk + ("SCC Driver: Error installing SMN Interrupt Handler: %d\n", + smn_error_code); + } else { + smn_irq_set = 1; /* remember this for cleanup */ + /* Enable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND, + SMN_COMMAND_CLEAR_INTERRUPT | + SMN_COMMAND_ENABLE_INTERRUPT); + } +#else + smn_error_code = 0; /* no problems... will handle later */ +#endif + + /* + * Install interrupt service routine for SCM (or both together). + */ + scm_error_code = os_register_interrupt(SCC_DRIVER_NAME, + INT_SCC_SCM, scc_irq); + if (scm_error_code != 0) { +#ifndef MXC + os_printk + ("SCC Driver: Error installing SCM Interrupt Handler: %d\n", + scm_error_code); +#else + os_printk + ("SCC Driver: Error installing SCC Interrupt Handler: %d\n", + scm_error_code); +#endif + } else { + scm_irq_set = 1; /* remember this for cleanup */ +#if defined(USE_SMN_INTERRUPT) && !defined(NO_SMN_INTERRUPT) + /* Enable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND, + SMN_COMMAND_CLEAR_INTERRUPT | + SMN_COMMAND_ENABLE_INTERRUPT); +#endif + } + + /* Return an error if one was encountered */ + return scm_error_code ? scm_error_code : smn_error_code; +} /* setup_interrupt_handling */ + +/*****************************************************************************/ +/* fn scc_do_crypto() */ +/*****************************************************************************/ +/*! Have the SCM perform the crypto function. + * + * Set up length register, and the store @c scm_control into control register + * to kick off the operation. Wait for completion, gather status, clear + * interrupt / status. + * + * @param byte_count number of bytes to perform in this operation + * @param scm_control Bit values to be set in @c SCM_CONTROL register + * + * @return 0 on success, value of #SCM_ERROR_STATUS on failure + */ +static uint32_t scc_do_crypto(int byte_count, uint32_t scm_control) +{ + int block_count = byte_count / SCC_BLOCK_SIZE_BYTES(); + uint32_t crypto_status; + + /* clear any outstanding flags */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + + /* In length register, 0 means 1, etc. */ + SCC_WRITE_REGISTER(SCM_LENGTH, block_count - 1); + + /* set modes and kick off the operation */ + SCC_WRITE_REGISTER(SCM_CONTROL, scm_control); + + scc_wait_completion(); + + /* Mask for done and error bits */ + crypto_status = SCC_READ_REGISTER(SCM_STATUS) + & (SCM_STATUS_CIPHERING_DONE + | SCM_STATUS_LENGTH_ERROR | SCM_STATUS_INTERNAL_ERROR); + + /* Only done bit should be on */ + if (crypto_status != SCM_STATUS_CIPHERING_DONE) { + /* Replace with error status instead */ + crypto_status = SCC_READ_REGISTER(SCM_ERROR_STATUS); + pr_debug("SCM Failure: 0x%x\n", crypto_status); + if (crypto_status == 0) { + /* That came up 0. Turn on arbitrary bit to signal error. */ + crypto_status = SCM_ERR_INTERNAL_ERROR; + } + } else { + crypto_status = 0; + } + + pr_debug("SCC: Done waiting.\n"); + + /* Clear out any status. */ + SCC_WRITE_REGISTER(SCM_INTERRUPT_CTRL, + SCM_INTERRUPT_CTRL_CLEAR_INTERRUPT + | SCM_INTERRUPT_CTRL_MASK_INTERRUPTS); + + /* And clear any error status */ + SCC_WRITE_REGISTER(SCM_ERROR_STATUS, 0); + + return crypto_status; +} + +/*****************************************************************************/ +/* fn scc_encrypt() */ +/*****************************************************************************/ +/*! + * Perform an encryption on the input. If @c verify_crc is true, a CRC must be + * calculated on the plaintext, and appended, with padding, before computing + * the ciphertext. + * + * @param[in] count_in_bytes Count of bytes of plaintext + * @param[in] data_in Pointer to the plaintext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing ciphertext + * @param[in] add_crc Flag for computing CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + */ +static scc_return_t +scc_encrypt(uint32_t count_in_bytes, const uint8_t * data_in, + uint32_t scm_control, + uint8_t * data_out, int add_crc, unsigned long *count_out_bytes) + +{ + scc_return_t return_code = SCC_RET_FAIL; /* initialised for failure */ + uint32_t input_bytes_left = count_in_bytes; /* local copy */ + uint32_t output_bytes_copied = 0; /* running total */ + uint32_t bytes_to_process; /* multi-purpose byte counter */ + uint16_t crc = CRC_CCITT_START; /* running CRC value */ + crc_t *crc_ptr = NULL; /* Reset if CRC required */ + /* byte address into SCM RAM */ + uint32_t scm_location = SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET; + /* free RED RAM */ + uint32_t scm_bytes_remaining = scc_memory_size_bytes; + /* CRC+padding holder */ + uint8_t padding_buffer[PADDING_BUFFER_MAX_BYTES]; + unsigned padding_byte_count = 0; /* Reset if padding required */ + uint32_t scm_error_status = 0; /* No known SCM error initially */ + uint32_t i; /* Counter for clear data loop */ + uint32_t dirty_bytes; /* Number of bytes of memory used + temporarily during encryption, + which need to be wiped after + completion of the operation. */ + + /* Set location of CRC and prepare padding bytes if required */ + if (add_crc != 0) { + crc_ptr = &crc; + padding_byte_count = SCC_BLOCK_SIZE_BYTES() + - (count_in_bytes + + CRC_SIZE_BYTES) % SCC_BLOCK_SIZE_BYTES(); + memcpy(padding_buffer + CRC_SIZE_BYTES, scc_block_padding, + padding_byte_count); + } + + /* Process remaining input or padding data */ + while (input_bytes_left > 0) { + + /* Determine how much work to do this pass */ + bytes_to_process = (input_bytes_left > scm_bytes_remaining) ? + scm_bytes_remaining : input_bytes_left; + + /* Copy plaintext into SCM RAM, calculating CRC if required */ + copy_to_scc(data_in, scm_location, bytes_to_process, crc_ptr); + + /* Adjust pointers & counters */ + input_bytes_left -= bytes_to_process; + data_in += bytes_to_process; + scm_location += bytes_to_process; + scm_bytes_remaining -= bytes_to_process; + + /* Add CRC and padding after the last byte is copied if required */ + if ((input_bytes_left == 0) && (crc_ptr != NULL)) { + + /* Copy CRC into padding buffer MSB first */ + padding_buffer[0] = (crc >> 8) & 0xFF; + padding_buffer[1] = crc & 0xFF; + + /* Reset pointers and counter */ + data_in = padding_buffer; + input_bytes_left = CRC_SIZE_BYTES + padding_byte_count; + crc_ptr = NULL; /* CRC no longer required */ + + /* Go round loop again to copy CRC and padding to SCM */ + continue; + } + + /* if no input and crc_ptr */ + /* Now have block-sized plaintext in SCM to encrypt */ + /* Encrypt plaintext; exit loop on error */ + bytes_to_process = scm_location - + (SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET); + + if (output_bytes_copied + bytes_to_process > *count_out_bytes) { + return_code = SCC_RET_INSUFFICIENT_SPACE; + scm_error_status = -1; /* error signal */ + pr_debug + ("SCC: too many ciphertext bytes for space available\n"); + break; + } + pr_debug("SCC: Starting encryption. %x for %d bytes (%p/%p)\n", + scm_control, bytes_to_process, + (void *)SCC_READ_REGISTER(SCM_RED_START), + (void *)SCC_READ_REGISTER(SCM_BLACK_START)); + scm_error_status = scc_do_crypto(bytes_to_process, scm_control); + if (scm_error_status != 0) { + break; + } + + /* Copy out ciphertext */ + copy_from_scc(SCM_BLACK_MEMORY + SCM_NON_RESERVED_OFFSET, + data_out, bytes_to_process, NULL); + + /* Adjust pointers and counters for next loop */ + output_bytes_copied += bytes_to_process; + data_out += bytes_to_process; + scm_location = SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET; + scm_bytes_remaining = scc_memory_size_bytes; + + } /* input_bytes_left > 0 */ + /* Clear all red and black memory used during ephemeral encryption */ + dirty_bytes = (count_in_bytes > scc_memory_size_bytes) ? + scc_memory_size_bytes : count_in_bytes; + + for (i = 0; i < dirty_bytes; i += 4) { + SCC_WRITE_REGISTER(SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET + i, + 0); + SCC_WRITE_REGISTER(SCM_BLACK_MEMORY + SCM_NON_RESERVED_OFFSET + + i, 0); + } + + /* If no SCM error, set OK status and save ouput byte count */ + if (scm_error_status == 0) { + return_code = SCC_RET_OK; + *count_out_bytes = output_bytes_copied; + } + + return return_code; +} /* scc_encrypt */ + +/*****************************************************************************/ +/* fn scc_decrypt() */ +/*****************************************************************************/ +/*! + * Perform a decryption on the input. If @c verify_crc is true, the last block + * (maybe the two last blocks) is special - it should contain a CRC and + * padding. These must be stripped and verified. + * + * @param[in] count_in_bytes Count of bytes of ciphertext + * @param[in] data_in Pointer to the ciphertext + * @param[in] scm_control Bit values for the SCM_CONTROL register + * @param[in,out] data_out Pointer for storing plaintext + * @param[in] verify_crc Flag for running CRC - 0 no, else yes + * @param[in,out] count_out_bytes Number of bytes available at @c data_out + + */ +static scc_return_t +scc_decrypt(uint32_t count_in_bytes, const uint8_t * data_in, + uint32_t scm_control, + uint8_t * data_out, int verify_crc, unsigned long *count_out_bytes) +{ + scc_return_t return_code = SCC_RET_FAIL; + uint32_t bytes_left = count_in_bytes; /* local copy */ + uint32_t bytes_copied = 0; /* running total of bytes going to user */ + uint32_t bytes_to_copy = 0; /* Number in this encryption 'chunk' */ + uint16_t crc = CRC_CCITT_START; /* running CRC value */ + /* next target for ctext */ + uint32_t scm_location = SCM_BLACK_MEMORY + SCM_NON_RESERVED_OFFSET; + unsigned padding_byte_count; /* number of bytes of padding stripped */ + uint8_t last_two_blocks[2 * SCC_BLOCK_SIZE_BYTES()]; /* temp */ + uint32_t scm_error_status = 0; /* register value */ + uint32_t i; /* Counter for clear data loop */ + uint32_t dirty_bytes; /* Number of bytes of memory used + temporarily during decryption, + which need to be wiped after + completion of the operation. */ + + scm_control |= SCM_DECRYPT_MODE; + + if (verify_crc) { + /* Save last two blocks (if there are at least two) of ciphertext for + special treatment. */ + bytes_left -= SCC_BLOCK_SIZE_BYTES(); + if (bytes_left >= SCC_BLOCK_SIZE_BYTES()) { + bytes_left -= SCC_BLOCK_SIZE_BYTES(); + } + } + + /* Copy ciphertext into SCM BLACK memory */ + while (bytes_left && scm_error_status == 0) { + + /* Determine how much work to do this pass */ + if (bytes_left > (scc_memory_size_bytes)) { + bytes_to_copy = scc_memory_size_bytes; + } else { + bytes_to_copy = bytes_left; + } + + if (bytes_copied + bytes_to_copy > *count_out_bytes) { + scm_error_status = -1; + break; + } + copy_to_scc(data_in, scm_location, bytes_to_copy, NULL); + data_in += bytes_to_copy; /* move pointer */ + + pr_debug("SCC: Starting decryption of %d bytes.\n", + bytes_to_copy); + + /* Do the work, wait for completion */ + scm_error_status = scc_do_crypto(bytes_to_copy, scm_control); + + copy_from_scc(SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET, + data_out, bytes_to_copy, &crc); + bytes_copied += bytes_to_copy; + data_out += bytes_to_copy; + scm_location = SCM_BLACK_MEMORY + SCM_NON_RESERVED_OFFSET; + + /* Do housekeeping */ + bytes_left -= bytes_to_copy; + + } /* while bytes_left */ + + /* At this point, either the process is finished, or this is verify mode */ + + if (scm_error_status == 0) { + if (!verify_crc) { + *count_out_bytes = bytes_copied; + return_code = SCC_RET_OK; + } else { + /* Verify mode. There are one or two blocks of unprocessed + * ciphertext sitting at data_in. They need to be moved to the + * SCM, decrypted, searched to remove padding, then the plaintext + * copied back to the user (while calculating CRC, of course). + */ + + /* Calculate ciphertext still left */ + bytes_to_copy = count_in_bytes - bytes_copied; + + copy_to_scc(data_in, scm_location, bytes_to_copy, NULL); + data_in += bytes_to_copy; /* move pointer */ + + pr_debug("SCC: Finishing decryption (%d bytes).\n", + bytes_to_copy); + + /* Do the work, wait for completion */ + scm_error_status = + scc_do_crypto(bytes_to_copy, scm_control); + + if (scm_error_status == 0) { + /* Copy decrypted data back from SCM RED memory */ + copy_from_scc(SCM_RED_MEMORY + + SCM_NON_RESERVED_OFFSET, + last_two_blocks, bytes_to_copy, + NULL); + + /* (Plaintext) + crc + padding should be in temp buffer */ + if (scc_strip_padding + (last_two_blocks + bytes_to_copy, + &padding_byte_count) == SCC_RET_OK) { + bytes_to_copy -= + padding_byte_count + CRC_SIZE_BYTES; + + /* verify enough space in user buffer */ + if (bytes_copied + bytes_to_copy <= + *count_out_bytes) { + int i = 0; + + /* Move out last plaintext and calc CRC */ + while (i < bytes_to_copy) { + CALC_CRC(last_two_blocks + [i], crc); + *data_out++ = + last_two_blocks + [i++]; + bytes_copied++; + } + + /* Verify the CRC by running over itself */ + CALC_CRC(last_two_blocks + [bytes_to_copy], crc); + CALC_CRC(last_two_blocks + [bytes_to_copy + 1], + crc); + if (crc == 0) { + /* Just fine ! */ + *count_out_bytes = + bytes_copied; + return_code = + SCC_RET_OK; + } else { + return_code = + SCC_RET_VERIFICATION_FAILED; + pr_debug + ("SCC: CRC values are %04x, %02x%02x\n", + crc, + last_two_blocks + [bytes_to_copy], + last_two_blocks + [bytes_to_copy + + 1]); + } + } /* if space available */ + } /* if scc_strip_padding... */ + else { + /* bad padding means bad verification */ + return_code = + SCC_RET_VERIFICATION_FAILED; + } + } + /* scm_error_status == 0 */ + } /* verify_crc */ + } + + /* scm_error_status == 0 */ + /* Clear all red and black memory used during ephemeral decryption */ + dirty_bytes = (count_in_bytes > scc_memory_size_bytes) ? + scc_memory_size_bytes : count_in_bytes; + + for (i = 0; i < dirty_bytes; i += 4) { + SCC_WRITE_REGISTER(SCM_RED_MEMORY + SCM_NON_RESERVED_OFFSET + i, + 0); + SCC_WRITE_REGISTER(SCM_BLACK_MEMORY + SCM_NON_RESERVED_OFFSET + + i, 0); + } + return return_code; +} /* scc_decrypt */ + +/*****************************************************************************/ +/* fn scc_alloc_slot() */ +/*****************************************************************************/ +/*! + * Allocate a key slot to fit the requested size. + * + * @param value_size_bytes Size of the key or other secure data + * @param owner_id Value to tie owner to slot + * @param[out] slot Handle to access or deallocate slot + * + * @return SCC_RET_OK on success, SCC_RET_INSUFFICIENT_SPACE if not slots of + * requested size are available. + */ +scc_return_t +scc_alloc_slot(uint32_t value_size_bytes, uint64_t owner_id, uint32_t * slot) +{ + scc_return_t status = SCC_RET_FAIL; + unsigned long irq_flags; + + if (scc_availability != SCC_STATUS_OK) { + goto out; + } + /* ACQUIRE LOCK to prevent others from using SCC crypto */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + pr_debug("SCC: Allocating %d-byte slot for 0x%Lx\n", + value_size_bytes, owner_id); + + if ((value_size_bytes != 0) && (value_size_bytes <= SCC_MAX_KEY_SIZE)) { + int i; + + for (i = 0; i < SCC_KEY_SLOTS; i++) { + if (scc_key_info[i].status == 0) { + scc_key_info[i].owner_id = owner_id; + scc_key_info[i].length = value_size_bytes; + scc_key_info[i].status = 1; /* assigned! */ + *slot = i; + status = SCC_RET_OK; + break; /* exit 'for' loop */ + } + } + + if (status != SCC_RET_OK) { + status = SCC_RET_INSUFFICIENT_SPACE; + } else { + pr_debug("SCC: Allocated slot %d (0x%Lx)\n", i, + owner_id); + } + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + out: + return status; +} + +/*****************************************************************************/ +/* fn verify_slot_access() */ +/*****************************************************************************/ +inline static scc_return_t +verify_slot_access(uint64_t owner_id, uint32_t slot, uint32_t access_len) +{ + scc_return_t status = SCC_RET_FAIL; + if (scc_availability != SCC_STATUS_OK) { + goto out; + } + + if ((slot < SCC_KEY_SLOTS) && scc_key_info[slot].status + && (scc_key_info[slot].owner_id == owner_id) + && (access_len <= SCC_KEY_SLOT_SIZE)) { + status = SCC_RET_OK; + pr_debug("SCC: Verify on slot %d succeeded\n", slot); + } else { + if (slot >= SCC_KEY_SLOTS) { + pr_debug("SCC: Verify on bad slot (%d) failed\n", slot); + } else if (scc_key_info[slot].status) { + pr_debug("SCC: Verify on slot %d failed (%Lx) \n", slot, + owner_id); + } else { + pr_debug + ("SCC: Verify on slot %d failed: not allocated\n", + slot); + } + } + + out: + return status; +} + +scc_return_t +scc_verify_slot_access(uint64_t owner_id, uint32_t slot, uint32_t access_len) +{ + return verify_slot_access(owner_id, slot, access_len); +} + +/*****************************************************************************/ +/* fn scc_dealloc_slot() */ +/*****************************************************************************/ +scc_return_t scc_dealloc_slot(uint64_t owner_id, uint32_t slot) +{ + scc_return_t status; + unsigned long irq_flags; + int i; + + /* ACQUIRE LOCK to prevent others from using SCC crypto */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + status = verify_slot_access(owner_id, slot, 0); + + if (status == SCC_RET_OK) { + scc_key_info[slot].owner_id = 0; + scc_key_info[slot].status = 0; /* unassign */ + + /* clear old info */ + for (i = 0; i < SCC_KEY_SLOT_SIZE; i += 4) { + SCC_WRITE_REGISTER(SCM_RED_MEMORY + + scc_key_info[slot].offset + i, 0); + SCC_WRITE_REGISTER(SCM_BLACK_MEMORY + + scc_key_info[slot].offset + i, 0); + } + pr_debug("SCC: Deallocated slot %d\n", slot); + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + return status; +} + +/*****************************************************************************/ +/* fn scc_load_slot() */ +/*****************************************************************************/ +/*! + * Load a value into a slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param key_data Data to load into the slot + * @param key_length Length, in bytes, of @c key_data to copy to SCC. + * + * @return SCC_RET_OK on success. SCC_RET_FAIL will be returned if slot + * specified cannot be accessed for any reason, or SCC_RET_INSUFFICIENT_SPACE + * if @c key_length exceeds the size of the slot. + */ +scc_return_t +scc_load_slot(uint64_t owner_id, uint32_t slot, const uint8_t * key_data, + uint32_t key_length) +{ + scc_return_t status; + unsigned long irq_flags; + + /* ACQUIRE LOCK to prevent others from using SCC crypto */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + status = verify_slot_access(owner_id, slot, key_length); + if ((status == SCC_RET_OK) && (key_data != NULL)) { + status = SCC_RET_FAIL; /* reset expectations */ + + if (key_length > SCC_KEY_SLOT_SIZE) { + pr_debug + ("SCC: scc_load_slot() rejecting key of %d bytes.\n", + key_length); + status = SCC_RET_INSUFFICIENT_SPACE; + } else { + if (copy_to_scc(key_data, + SCM_RED_MEMORY + + scc_key_info[slot].offset, key_length, + NULL)) { + pr_debug("SCC: RED copy_to_scc() failed for" + " scc_load_slot()\n"); + } else { + if ((key_length % 4) != 0) { + uint32_t zeros = 0; + + /* zero-pad to get remainder bytes in correct place */ + copy_to_scc((uint8_t *) & zeros, + SCM_RED_MEMORY + + + scc_key_info[slot].offset + + key_length, + 4 - (key_length % 4), NULL); + } + status = SCC_RET_OK; + } + } + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + return status; +} /* scc_load_slot */ + +scc_return_t +scc_read_slot(uint64_t owner_id, uint32_t slot, uint32_t key_length, + uint8_t * key_data) +{ + scc_return_t status; + unsigned long irq_flags; + + /* ACQUIRE LOCK to prevent others from using SCC crypto */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + status = verify_slot_access(owner_id, slot, key_length); + if ((status == SCC_RET_OK) && (key_data != NULL)) { + status = SCC_RET_FAIL; /* reset expectations */ + + if (key_length > SCC_KEY_SLOT_SIZE) { + pr_debug + ("SCC: scc_read_slot() rejecting key of %d bytes.\n", + key_length); + status = SCC_RET_INSUFFICIENT_SPACE; + } else { + if (copy_from_scc + (SCM_RED_MEMORY + scc_key_info[slot].offset, + key_data, key_length, NULL)) { + pr_debug("SCC: RED copy_from_scc() failed for" + " scc_read_slot()\n"); + } else { + status = SCC_RET_OK; + } + } + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + return status; +} /* scc_read_slot */ + +/*****************************************************************************/ +/* fn scc_encrypt_slot() */ +/*****************************************************************************/ +/*! + * Encrypt the key data stored in a slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param length Length, in bytes, of @c black_data + * @param black_data Location to store result of encrypting RED data in slot + * + * @return SCC_RET_OK on success, SCC_RET_FAIL if slot specified cannot be + * accessed for any reason. + */ +scc_return_t scc_encrypt_slot(uint64_t owner_id, uint32_t slot, + uint32_t length, uint8_t * black_data) +{ + unsigned long irq_flags; + scc_return_t status; + uint32_t crypto_status; + uint32_t slot_offset = + scc_key_info[slot].offset / SCC_BLOCK_SIZE_BYTES(); + + /* ACQUIRE LOCK to prevent others from using crypto or releasing slot */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + status = verify_slot_access(owner_id, slot, length); + if (status == SCC_RET_OK) { + SCC_WRITE_REGISTER(SCM_BLACK_START, slot_offset); + SCC_WRITE_REGISTER(SCM_RED_START, slot_offset); + + /* Use OwnerID as CBC IV to tie Owner to data */ + SCC_WRITE_REGISTER(SCM_INIT_VECTOR_0, *(uint32_t *) & owner_id); + SCC_WRITE_REGISTER(SCM_INIT_VECTOR_1, + *(((uint32_t *) & owner_id) + 1)); + + /* Set modes and kick off the encryption */ + crypto_status = scc_do_crypto(length, + SCM_CONTROL_START_CIPHER | + SCM_CBC_MODE); + + if (crypto_status != 0) { + pr_debug("SCM encrypt red crypto failure: 0x%x\n", + crypto_status); + } else { + + /* Give blob back to caller */ + if (!copy_from_scc + (SCM_BLACK_MEMORY + scc_key_info[slot].offset, + black_data, length, NULL)) { + status = SCC_RET_OK; + pr_debug("SCC: Encrypted slot %d\n", slot); + } + } + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + return status; +} + +/*****************************************************************************/ +/* fn scc_decrypt_slot() */ +/*****************************************************************************/ +/*! + * Decrypt some black data and leave result in the slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param length Length, in bytes, of @c black_data + * @param black_data Location of data to dencrypt and store in slot + * + * @return SCC_RET_OK on success, SCC_RET_FAIL if slot specified cannot be + * accessed for any reason. + */ +scc_return_t scc_decrypt_slot(uint64_t owner_id, uint32_t slot, + uint32_t length, const uint8_t * black_data) +{ + unsigned long irq_flags; + scc_return_t status; + uint32_t crypto_status; + uint32_t slot_offset = + scc_key_info[slot].offset / SCC_BLOCK_SIZE_BYTES(); + + /* ACQUIRE LOCK to prevent others from using crypto or releasing slot */ + spin_lock_irqsave(&scc_crypto_lock, irq_flags); + + status = verify_slot_access(owner_id, slot, length); + if (status == SCC_RET_OK) { + status = SCC_RET_FAIL; /* reset expectations */ + + /* Place black key in to BLACK RAM and set up the SCC */ + copy_to_scc(black_data, + SCM_BLACK_MEMORY + scc_key_info[slot].offset, + length, NULL); + + SCC_WRITE_REGISTER(SCM_BLACK_START, slot_offset); + SCC_WRITE_REGISTER(SCM_RED_START, slot_offset); + + /* Use OwnerID as CBC IV to tie Owner to data */ + SCC_WRITE_REGISTER(SCM_INIT_VECTOR_0, *(uint32_t *) & owner_id); + SCC_WRITE_REGISTER(SCM_INIT_VECTOR_1, + *(((uint32_t *) & owner_id) + 1)); + + /* Set modes and kick off the decryption */ + crypto_status = scc_do_crypto(length, + SCM_CONTROL_START_CIPHER + | SCM_CBC_MODE | + SCM_DECRYPT_MODE); + + if (crypto_status != 0) { + pr_debug("SCM decrypt black crypto failure: 0x%x\n", + crypto_status); + } else { + status = SCC_RET_OK; + } + } + + spin_unlock_irqrestore(&scc_crypto_lock, irq_flags); + + return status; +} + +/*****************************************************************************/ +/* fn scc_get_slot_info() */ +/*****************************************************************************/ +/*! + * Determine address and value length for a give slot. + * + * @param owner_id Value of owner of slot + * @param slot Handle of slot + * @param address Location to store kernel address of slot data + * @param value_size_bytes Location to store allocated length of data in slot. + * May be NULL if value is not needed by caller. + * @param slot_size_bytes Location to store max length data in slot + * May be NULL if value is not needed by caller. + * + * @return SCC_RET_OK or error indication + */ +scc_return_t +scc_get_slot_info(uint64_t owner_id, uint32_t slot, uint32_t * address, + uint32_t * value_size_bytes, uint32_t * slot_size_bytes) +{ + scc_return_t status = verify_slot_access(owner_id, slot, 0); + + if (status == SCC_RET_OK) { + *address = + SCC_BASE + SCM_RED_MEMORY + scc_key_info[slot].offset; + if (value_size_bytes != NULL) { + *value_size_bytes = scc_key_info[slot].length; + } + if (slot_size_bytes != NULL) { + *slot_size_bytes = SCC_KEY_SLOT_SIZE; + } + } + + return status; +} + +/*****************************************************************************/ +/* fn scc_wait_completion() */ +/*****************************************************************************/ +/*! + * Poll looking for end-of-cipher indication. Only used + * if @c SCC_SCM_SLEEP is not defined. + * + * @internal + * + * On a Tahiti, crypto under 230 or so bytes is done after the first loop, all + * the way up to five sets of spins for 1024 bytes. (8- and 16-byte functions + * are done when we first look. Zeroizing takes one pass around. + */ +static void scc_wait_completion(void) +{ + int i = 0; + + /* check for completion by polling */ + while (!is_cipher_done() && (i++ < SCC_CIPHER_MAX_POLL_COUNT)) { + udelay(10); + } + pr_debug("SCC: Polled DONE %d times\n", i); +} /* scc_wait_completion() */ + +/*****************************************************************************/ +/* fn is_cipher_done() */ +/*****************************************************************************/ +/*! + * This function returns non-zero if SCM Status register indicates + * that a cipher has terminated or some other interrupt-generating + * condition has occurred. + */ +static int is_cipher_done(void) +{ + register uint32_t scm_status; + register int cipher_done; + + scm_status = SCC_READ_REGISTER(SCM_STATUS); + + /* + * Done when 'SCM is currently performing a function' bits are zero + */ + cipher_done = !(scm_status & (SCM_STATUS_ZEROIZING | + SCM_STATUS_CIPHERING)); + + return cipher_done; +} /* is_cipher_done() */ + +/*****************************************************************************/ +/* fn offset_within_smn() */ +/*****************************************************************************/ +/*! + * Check that the offset is with the bounds of the SMN register set. + * + * @param[in] register_offset register offset of SMN. + * + * @return 1 if true, 0 if false (not within SMN) + */ +static inline int offset_within_smn(uint32_t register_offset) +{ + return register_offset >= SMN_STATUS && register_offset <= SMN_TIMER; +} + +/*****************************************************************************/ +/* fn offset_within_scm() */ +/*****************************************************************************/ +/*! + * Check that the offset is with the bounds of the SCM register set. + * + * @param[in] register_offset Register offset of SCM + * + * @return 1 if true, 0 if false (not within SCM) + */ +static inline int offset_within_scm(uint32_t register_offset) +{ + return (register_offset >= SCM_RED_START) + && (register_offset < scm_highest_memory_address); + /* Although this would cause trouble for zeroize testing, this change would + * close a security whole which currently allows any kernel program to access + * any location in RED RAM. Perhaps enforce in non-SCC_DEBUG compiles? + && (register_offset <= SCM_INIT_VECTOR_1); */ +} + +/*****************************************************************************/ +/* fn check_register_accessible() */ +/*****************************************************************************/ +/*! + * Given the current SCM and SMN status, verify that access to the requested + * register should be OK. + * + * @param[in] register_offset register offset within SCC + * @param[in] smn_status recent value from #SMN_STATUS + * @param[in] scm_status recent value from #SCM_STATUS + * + * @return #SCC_RET_OK if ok, #SCC_RET_FAIL if not + */ +static scc_return_t +check_register_accessible(uint32_t register_offset, uint32_t smn_status, + uint32_t scm_status) +{ + int error_code = SCC_RET_FAIL; + + /* Verify that the register offset passed in is not among the verboten set + * if the SMN is in Fail mode. + */ + if (offset_within_smn(register_offset)) { + if ((smn_status & SMN_STATUS_STATE_MASK) == SMN_STATE_FAIL) { + if (!((register_offset == SMN_STATUS) || + (register_offset == SMN_COMMAND) || + (register_offset == SMN_DEBUG_DETECT_STAT))) { + pr_debug + ("SCC Driver: Note: Security State is in FAIL state.\n"); + } /* register not a safe one */ + else { + /* SMN is in FAIL, but register is a safe one */ + error_code = SCC_RET_OK; + } + } /* State is FAIL */ + else { + /* State is not fail. All registers accessible. */ + error_code = SCC_RET_OK; + } + } + /* offset within SMN */ + /* Not SCM register. Check for SCM busy. */ + else if (offset_within_scm(register_offset)) { + /* This is the 'cannot access' condition in the SCM */ + if ((scm_status & SCM_STATUS_BUSY) + /* these are always available - rest fail on busy */ + && !((register_offset == SCM_STATUS) || + (register_offset == SCM_ERROR_STATUS) || + (register_offset == SCM_INTERRUPT_CTRL) || + (register_offset == SCM_CONFIGURATION))) { + pr_debug + ("SCC Driver: Note: Secure Memory is in BUSY state.\n"); + } /* status is busy & register inaccessible */ + else { + error_code = SCC_RET_OK; + } + } + /* offset within SCM */ + return error_code; + +} /* check_register_accessible() */ + +/*****************************************************************************/ +/* fn check_register_offset() */ +/*****************************************************************************/ +/*! + * Check that the offset is with the bounds of the SCC register set. + * + * @param[in] register_offset register offset of SMN. + * + * #SCC_RET_OK if ok, #SCC_RET_FAIL if not + */ +static scc_return_t check_register_offset(uint32_t register_offset) +{ + int return_value = SCC_RET_FAIL; + + /* Is it valid word offset ? */ + if (SCC_BYTE_OFFSET(register_offset) == 0) { + /* Yes. Is register within SCM? */ + if (offset_within_scm(register_offset)) { + return_value = SCC_RET_OK; /* yes, all ok */ + } + /* Not in SCM. Now look within the SMN */ + else if (offset_within_smn(register_offset)) { + return_value = SCC_RET_OK; /* yes, all ok */ + } + } + + return return_value; +} + +#ifdef SCC_REGISTER_DEBUG + +/*****************************************************************************/ +/* fn dbg_scc_read_register() */ +/*****************************************************************************/ +/*! + * Noisily read a 32-bit value to an SCC register. + * @param offset The address of the register to read. + * + * @return The register value + * */ +static uint32_t dbg_scc_read_register(uint32_t offset) +{ + uint32_t value; + + value = readl(scc_base + offset); + +#ifndef SCC_RAM_DEBUG /* print no RAM references */ + if ((offset < SCM_RED_MEMORY) || (offset >= scm_highest_memory_address)) { +#endif + pr_debug("SCC RD: 0x%4x : 0x%08x\n", offset, value); +#ifndef SCC_RAM_DEBUG + } +#endif + + return value; +} + +/*****************************************************************************/ +/* fn dbg_scc_write_register() */ +/*****************************************************************************/ +/* + * Noisily read a 32-bit value to an SCC register. + * @param offset The address of the register to written. + * + * @param value The new register value + */ +static void dbg_scc_write_register(uint32_t offset, uint32_t value) +{ + +#ifndef SCC_RAM_DEBUG /* print no RAM references */ + if ((offset < SCM_RED_MEMORY) || (offset >= scm_highest_memory_address)) { +#endif + pr_debug("SCC WR: 0x%4x : 0x%08x\n", offset, value); +#ifndef SCC_RAM_DEBUG + } +#endif + + (void)writel(value, scc_base + offset); +} + +#endif /* SCC_REGISTER_DEBUG */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/scc2_driver.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/scc2_driver.c @@ -0,0 +1,2306 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! @file scc2_driver.c + * + * This is the driver code for the Security Controller version 2 (SCC2). It's + * interaction with the Linux kernel is from calls to #scc_init() when the + * driver is loaded, and #scc_cleanup() should the driver be unloaded. The + * driver uses locking and (task-sleep/task-wakeup) functions from the kernel. + * It also registers itself to handle the interrupt line(s) from the SCC. New + * to this version of the driver is an interface providing access to the secure + * partitions. This is in turn exposed to the API user through the + * fsl_shw_smalloc() series of functions. Other drivers in the kernel may use + * the remaining API functions to get at the services of the SCC. The main + * service provided is the Secure Memory, which allows encoding and decoding of + * secrets with a per-chip secret key. + * + * The SCC is single-threaded, and so is this module. When the scc_crypt() + * routine is called, it will lock out other accesses to the function. If + * another task is already in the module, the subsequent caller will spin on a + * lock waiting for the other access to finish. + * + * Note that long crypto operations could cause a task to spin for a while, + * preventing other kernel work (other than interrupt processing) to get done. + * + * The external (kernel module) interface is through the following functions: + * @li scc_get_configuration() @li scc_crypt() @li scc_zeroize_memories() @li + * scc_monitor_security_failure() @li scc_stop_monitoring_security_failure() + * @li scc_set_sw_alarm() @li scc_read_register() @li scc_write_register() @li + * scc_allocate_partition() @li scc_initialize_partition @li + * scc_release_partition() @li scc_diminish_permissions @li + * scc_encrypt_region() @li scc_decrypt_region() @li scc_virt_to_phys + * + * All other functions are internal to the driver. + */ + +#include "sahara2/include/portable_os.h" +#include "scc2_internals.h" +#include + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + +#include +#include +#include + +#else + +#include +#include +#include + +#endif + +#include + +/** + * This is the set of errors which signal that access to the SCM RAM has + * failed or will fail. + */ +#define SCM_ACCESS_ERRORS \ + (SCM_ERRSTAT_ILM | SCM_ERRSTAT_SUP | SCM_ERRSTAT_ERC_MASK) + +/****************************************************************************** + * + * Global / Static Variables + * + *****************************************************************************/ + +#ifdef SCC_REGISTER_DEBUG + +#define REG_PRINT_BUFFER_SIZE 200 + +static char reg_print_buffer[REG_PRINT_BUFFER_SIZE]; + +typedef char *(*reg_print_routine_t) (uint32_t value, char *print_buffer, + int buf_size); + +#endif + +/** + * This is type void* so that a) it cannot directly be dereferenced, + * and b) pointer arithmetic on it will function in a 'normal way' for + * the offsets in scc_defines.h + * + * scc_base is the location in the iomap where the SCC's registers + * (and memory) start. + * + * The referenced data is declared volatile so that the compiler will + * not make any assumptions about the value of registers in the SCC, + * and thus will always reload the register into CPU memory before + * using it (i.e. wherever it is referenced in the driver). + * + * This value should only be referenced by the #SCC_READ_REGISTER and + * #SCC_WRITE_REGISTER macros and their ilk. All dereferences must be + * 32 bits wide. + */ +static volatile void *scc_base; + +/** Array to hold function pointers registered by + #scc_monitor_security_failure() and processed by + #scc_perform_callbacks() */ +static void (*scc_callbacks[SCC_CALLBACK_SIZE]) (void); +/*SCC need IRAM's base address but use only the partitions allocated for it.*/ +uint32_t scm_ram_phys_base = IRAM_BASE_ADDR; + +void *scm_ram_base = NULL; + +/** Calculated once for quick reference to size of the unreserved space in + * RAM in SCM. + */ +uint32_t scm_memory_size_bytes; + +/** Structure returned by #scc_get_configuration() */ +static scc_config_t scc_configuration = { + .driver_major_version = SCC_DRIVER_MAJOR_VERSION, + .driver_minor_version = SCC_DRIVER_MINOR_VERSION_2, + .scm_version = -1, + .smn_version = -1, + .block_size_bytes = -1, + .partition_size_bytes = -1, + .partition_count = -1, +}; + +/** Internal flag to know whether SCC is in Failed state (and thus many + * registers are unavailable). Once it goes failed, it never leaves it. */ +static volatile enum scc_status scc_availability = SCC_STATUS_INITIAL; + +/** Flag to say whether interrupt handler has been registered for + * SMN interrupt */ +static int smn_irq_set = 0; + +/** Flag to say whether interrupt handler has been registered for + * SCM interrupt */ +static int scm_irq_set = 0; + +/** This lock protects the #scc_callbacks list as well as the @c + * callbacks_performed flag in #scc_perform_callbacks. Since the data this + * protects may be read or written from either interrupt or base level, all + * operations should use the irqsave/irqrestore or similar to make sure that + * interrupts are inhibited when locking from base level. + */ +static os_lock_t scc_callbacks_lock = NULL; + +/** + * Ownership of this lock prevents conflicts on the crypto operation in the + * SCC. + */ +static os_lock_t scc_crypto_lock = NULL; + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)) +/** Pointer to SCC's clock information. Initialized during scc_init(). */ +static struct clk *scc_clk = NULL; +#endif + +/** The lookup table for an 8-bit value. Calculated once + * by #scc_init_ccitt_crc(). + */ +static uint16_t scc_crc_lookup_table[256]; + +/****************************************************************************** + * + * Function Implementations - Externally Accessible + * + *****************************************************************************/ + +/** + * Allocate a partition of secure memory + * + * @param smid_value Value to use for the SMID register. Must be 0 for + * kernel mode access. + * @param[out] part_no (If successful) Assigned partition number. + * @param[out] part_base Kernel virtual address of the partition. + * @param[out] part_phys Physical address of the partition. + * + * @return + */ +scc_return_t scc_allocate_partition(uint32_t smid_value, + int *part_no, + void **part_base, uint32_t *part_phys) +{ + uint32_t i; + os_lock_context_t irq_flags = 0; /* for IRQ save/restore */ + int local_part; + scc_return_t retval = SCC_RET_FAIL; + void *base_addr = NULL; + uint32_t reg_value; + + local_part = -1; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + if (scc_availability == SCC_STATUS_UNIMPLEMENTED) { + goto out; + } + + /* ACQUIRE LOCK to prevent others from using crypto or acquiring a + * partition. Note that crypto operations could take a long time, so the + * calling process could potentially spin for some time. + */ + os_lock_save_context(scc_crypto_lock, irq_flags); + + do { + /* Find current state of partition ownership */ + reg_value = SCC_READ_REGISTER(SCM_PART_OWNERS_REG); + + /* Search for a free one */ + for (i = 0; i < scc_configuration.partition_count; i++) { + if (((reg_value >> (SCM_POWN_SHIFT * i)) + & SCM_POWN_MASK) == SCM_POWN_PART_FREE) { + break; /* found a free one */ + } + } + if (i == local_part) { + /* found this one last time, and failed to allocated it */ + pr_debug(KERN_ERR "Partition %d cannot be allocated\n", + i); + goto out; + } + if (i >= scc_configuration.partition_count) { + retval = SCC_RET_INSUFFICIENT_SPACE; /* all used up */ + goto out; + } + + pr_debug + ("SCC2: Attempting to allocate partition %i, owners:%08x\n", + i, SCC_READ_REGISTER(SCM_PART_OWNERS_REG)); + + local_part = i; + /* Store SMID to grab a partition */ + SCC_WRITE_REGISTER(SCM_SMID0_REG + + SCM_SMID_WIDTH * (local_part), smid_value); + mdelay(2); + + /* Now make sure it is ours... ? */ + reg_value = SCC_READ_REGISTER(SCM_PART_OWNERS_REG); + + if (((reg_value >> (SCM_POWN_SHIFT * (local_part))) + & SCM_POWN_MASK) != SCM_POWN_PART_OWNED) { + continue; /* try for another */ + } + base_addr = scm_ram_base + + (local_part * scc_configuration.partition_size_bytes); + break; + } while (1); + +out: + + /* Free the lock */ + os_unlock_restore_context(scc_callbacks_lock, irq_flags); + + /* If the base address was assigned, then a partition was successfully + * acquired. + */ + if (base_addr != NULL) { + pr_debug("SCC2 Part owners: %08x, engaged: %08x\n", + reg_value, SCC_READ_REGISTER(SCM_PART_ENGAGED_REG)); + pr_debug("SCC2 MAP for part %d: %08x\n", + local_part, + SCC_READ_REGISTER(SCM_ACC0_REG + 8 * local_part)); + + /* Copy the partition information to the data structures passed by the + * user. + */ + *part_no = local_part; + *part_base = base_addr; + *part_phys = (uint32_t) scm_ram_phys_base + + (local_part * scc_configuration.partition_size_bytes); + retval = SCC_RET_OK; + + pr_debug + ("SCC2 partition engaged. Kernel address: %p. Physical " + "address: %p, pfn: %08x\n", *part_base, (void *)*part_phys, + __phys_to_pfn(*part_phys)); + } + + return retval; +} /* allocate_partition() */ + +/** + * Release a partition of secure memory + * + * @param part_base Kernel virtual address of the partition to be released. + * + * @return SCC_RET_OK if successful. + */ +scc_return_t scc_release_partition(void *part_base) +{ + uint32_t partition_no; + + if (part_base == NULL) { + return SCC_RET_FAIL; + } + + /* Ensure that this is a proper partition location */ + partition_no = SCM_PART_NUMBER((uint32_t) part_base); + + pr_debug("SCC2: Attempting to release partition %i, owners:%08x\n", + partition_no, SCC_READ_REGISTER(SCM_PART_OWNERS_REG)); + + /* check that the partition is ours to de-establish */ + if (!host_owns_partition(partition_no)) { + return SCC_RET_FAIL; + } + + /* TODO: The state of the zeroize engine (SRS field in the Command Status + * Register) should be examined before issuing the zeroize command here. + * To make the driver thread-safe, a lock should be taken out before + * issuing the check and released after the zeroize command has been + * issued. + */ + + /* Zero the partition to release it */ + scc_write_register(SCM_ZCMD_REG, + (partition_no << SCM_ZCMD_PART_SHIFT) | + (ZCMD_DEALLOC_PART << SCM_ZCMD_CCMD_SHIFT)); + mdelay(2); + + pr_debug("SCC2: done releasing partition %i, owners:%08x\n", + partition_no, SCC_READ_REGISTER(SCM_PART_OWNERS_REG)); + + /* Check that the de-assignment went correctly */ + if (host_owns_partition(partition_no)) { + return SCC_RET_FAIL; + } + + return SCC_RET_OK; +} + +/** + * Diminish the permissions on a partition of secure memory + * + * @param part_base Kernel virtual address of the partition. + * @param permissions ORed values of the type SCM_PERM_* which will be used as + * initial partition permissions. SHW API users should use + * the FSL_PERM_* definitions instead. + * + * @return SCC_RET_OK if successful. + */ +scc_return_t scc_diminish_permissions(void *part_base, uint32_t permissions) +{ + uint32_t partition_no; + uint32_t permissions_requested; + permissions_requested = permissions; + + /* ensure that this is a proper partition location */ + partition_no = SCM_PART_NUMBER((uint32_t) part_base); + + /* invert the permissions, masking out unused bits */ + permissions = (~permissions) & SCM_PERM_MASK; + + /* attempt to diminish the permissions */ + scc_write_register(SCM_ACC0_REG + 8 * partition_no, permissions); + mdelay(2); + + /* Reading it back puts it into the original form */ + permissions = SCC_READ_REGISTER(SCM_ACC0_REG + 8 * partition_no); + if (permissions == permissions_requested) { + pr_debug("scc_partition_diminish_perms: successful\n"); + pr_debug("scc_partition_diminish_perms: successful\n"); + return SCC_RET_OK; + } + pr_debug("scc_partition_diminish_perms: not successful\n"); + + return SCC_RET_FAIL; +} + +extern scc_partition_status_t scc_partition_status(void *part_base) +{ + uint32_t part_no; + uint32_t part_owner; + + /* Determine the partition number from the address */ + part_no = SCM_PART_NUMBER((uint32_t) part_base); + + /* Check if the partition is implemented */ + if (part_no >= scc_configuration.partition_count) { + return SCC_PART_S_UNUSABLE; + } + + /* Determine the value of the partition owners register */ + part_owner = (SCC_READ_REGISTER(SCM_PART_OWNERS_REG) + >> (part_no * SCM_POWN_SHIFT)) & SCM_POWN_MASK; + + switch (part_owner) { + case SCM_POWN_PART_OTHER: + return SCC_PART_S_UNAVAILABLE; + break; + case SCM_POWN_PART_FREE: + return SCC_PART_S_AVAILABLE; + break; + case SCM_POWN_PART_OWNED: + /* could be allocated or engaged*/ + if (partition_engaged(part_no)) { + return SCC_PART_S_ENGAGED; + } else { + return SCC_PART_S_ALLOCATED; + } + break; + case SCM_POWN_PART_UNUSABLE: + default: + return SCC_PART_S_UNUSABLE; + break; + } +} + +/** + * Calculate the physical address from the kernel virtual address. + * + * @param address Kernel virtual address of data in an Secure Partition. + * @return Physical address of said data. + */ +uint32_t scc_virt_to_phys(void *address) +{ + return (uint32_t) address - (uint32_t) scm_ram_base + + (uint32_t) scm_ram_phys_base; +} + +/** + * Engage partition of secure memory + * + * @param part_base (kernel) Virtual + * @param UMID NULL, or 16-byte UMID for partition security + * @param permissions ORed values from fsl_shw_permission_t which + * will be used as initial partiition permissions. + * + * @return SCC_RET_OK if successful. + */ + +scc_return_t +scc_engage_partition(void *part_base, + const uint8_t *UMID, uint32_t permissions) +{ + uint32_t partition_no; + uint8_t *UMID_base = part_base + 0x10; + uint32_t *MAP_base = part_base; + uint8_t i; + + partition_no = SCM_PART_NUMBER((uint32_t) part_base); + + if (!host_owns_partition(partition_no) || + partition_engaged(partition_no) || + !(SCC_READ_REGISTER(SCM_SMID0_REG + (partition_no * 8)) == 0)) { + + return SCC_RET_FAIL; + } + + if (UMID != NULL) { + for (i = 0; i < 16; i++) { + UMID_base[i] = UMID[i]; + } + } + + MAP_base[0] = permissions; + + udelay(20); + + /* Check that the partition was engaged correctly, and that it has the + * proper permissions. + */ + + if ((!partition_engaged(partition_no)) || + (permissions != + SCC_READ_REGISTER(SCM_ACC0_REG + 8 * partition_no))) { + return SCC_RET_FAIL; + } + + return SCC_RET_OK; +} + +/*****************************************************************************/ +/* fn scc_init() */ +/*****************************************************************************/ +/** + * Initialize the driver at boot time or module load time. + * + * Register with the kernel as the interrupt handler for the SCC interrupt + * line(s). + * + * Map the SCC's register space into the driver's memory space. + * + * Query the SCC for its configuration and status. Save the configuration in + * #scc_configuration and save the status in #scc_availability. Called by the + * kernel. + * + * Do any locking/wait queue initialization which may be necessary. + * + * The availability fuse may be checked, depending on platform. + */ +static int scc_init(void) +{ + uint32_t smn_status; + int i; + int return_value = -EIO; /* assume error */ + + if (scc_availability == SCC_STATUS_INITIAL) { + + /* Set this until we get an initial reading */ + scc_availability = SCC_STATUS_CHECKING; + + /* Initialize the constant for the CRC function */ + scc_init_ccitt_crc(); + + /* initialize the callback table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + scc_callbacks[i] = 0; + } + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + mxc_clks_enable(SCC_CLK); +#else + scc_clk = clk_get(NULL, "scc_clk"); + if (scc_clk != ERR_PTR(ENOENT)) { + clk_enable(scc_clk); + } +#endif + + /* Set up the hardware access locks */ + scc_callbacks_lock = os_lock_alloc_init(); + scc_crypto_lock = os_lock_alloc_init(); + if (scc_callbacks_lock == NULL || scc_crypto_lock == NULL) { + os_printk(KERN_ERR + "SCC2: Failed to allocate context locks. Exiting.\n"); + goto out; + } + + /* See whether there is an SCC available */ + if (0 && !SCC_ENABLED()) { + os_printk(KERN_ERR + "SCC2: Fuse for SCC is set to disabled. Exiting.\n"); + goto out; + } + /* Map the SCC (SCM and SMN) memory on the internal bus into + kernel address space */ + scc_base = (void *)IO_ADDRESS(SCC_BASE); + if (scc_base == NULL) { + os_printk(KERN_ERR + "SCC2: Register mapping failed. Exiting.\n"); + goto out; + } + + /* If that worked, we can try to use the SCC */ + /* Get SCM into 'clean' condition w/interrupts cleared & + disabled */ + SCC_WRITE_REGISTER(SCM_INT_CTL_REG, 0); + + /* Clear error status register */ + (void)SCC_READ_REGISTER(SCM_ERR_STATUS_REG); + + /* + * There is an SCC. Determine its current state. Side effect + * is to populate scc_config and scc_availability + */ + smn_status = scc_grab_config_values(); + + /* Try to set up interrupt handler(s) */ + if (scc_availability != SCC_STATUS_OK) { + goto out; + } + + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) + scm_ram_phys_base += 0x8000; + + scm_ram_base = (void *)ioremap_nocache(scm_ram_phys_base, + scc_configuration. + partition_count * + scc_configuration. + partition_size_bytes); + if (scm_ram_base == NULL) { + os_printk(KERN_ERR + "SCC2: RAM failed to remap: %p for %d bytes\n", + (void *)scm_ram_phys_base, + scc_configuration.partition_count * + scc_configuration.partition_size_bytes); + goto out; + } + pr_debug("SCC2: RAM at Physical %p / Virtual %p\n", + (void *)scm_ram_phys_base, scm_ram_base); + + pr_debug("Secure Partition Table: Found %i partitions\n", + scc_configuration.partition_count); + + if (setup_interrupt_handling() != 0) { + unsigned err_cond; + /** + * The error could be only that the SCM interrupt was + * not set up. This interrupt is always masked, so + * that is not an issue. + * The SMN's interrupt may be shared on that line, it + * may be separate, or it may not be wired. Do what + * is necessary to check its status. + * Although the driver is coded for possibility of not + * having SMN interrupt, the fact that there is one + * means it should be available and used. + */ +#ifdef USE_SMN_INTERRUPT + err_cond = !smn_irq_set; /* Separate. Check SMN binding */ +#elif !defined(NO_SMN_INTERRUPT) + err_cond = !scm_irq_set; /* Shared. Check SCM binding */ +#else + err_cond = FALSE; /* SMN not wired at all. Ignore. */ +#endif + if (err_cond) { + /* setup was not able to set up SMN interrupt */ + scc_availability = SCC_STATUS_UNIMPLEMENTED; + goto out; + } + } + + /* interrupt handling returned non-zero */ + /* Get SMN into 'clean' condition w/interrupts cleared & + enabled */ + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_CLEAR_INTERRUPT + | SMN_COMMAND_ENABLE_INTERRUPT); + + out: + /* + * If status is SCC_STATUS_UNIMPLEMENTED or is still + * SCC_STATUS_CHECKING, could be leaving here with the driver partially + * initialized. In either case, cleanup (which will mark the SCC as + * UNIMPLEMENTED). + */ + if (scc_availability == SCC_STATUS_CHECKING || + scc_availability == SCC_STATUS_UNIMPLEMENTED) { + scc_cleanup(); + } else { + return_value = 0; /* All is well */ + } + } + /* ! STATUS_INITIAL */ + os_printk(KERN_ALERT "SCC2: Driver Status is %s\n", + (scc_availability == SCC_STATUS_INITIAL) ? "INITIAL" : + (scc_availability == SCC_STATUS_CHECKING) ? "CHECKING" : + (scc_availability == + SCC_STATUS_UNIMPLEMENTED) ? "UNIMPLEMENTED" + : (scc_availability == + SCC_STATUS_OK) ? "OK" : (scc_availability == + SCC_STATUS_FAILED) ? "FAILED" : + "UNKNOWN"); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_disable(scc_clk); +#endif + + return return_value; +} /* scc_init */ + +/*****************************************************************************/ +/* fn scc_cleanup() */ +/*****************************************************************************/ +/** + * Perform cleanup before driver/module is unloaded by setting the machine + * state close to what it was when the driver was loaded. This function is + * called when the kernel is shutting down or when this driver is being + * unloaded. + * + * A driver like this should probably never be unloaded, especially if there + * are other module relying upon the callback feature for monitoring the SCC + * status. + * + * In any case, cleanup the callback table (by clearing out all of the + * pointers). Deregister the interrupt handler(s). Unmap SCC registers. + * + * Note that this will not release any partitions that have been allocated. + * + */ +static void scc_cleanup(void) +{ + int i; + + /******************************************************/ + + /* Mark the driver / SCC as unusable. */ + scc_availability = SCC_STATUS_UNIMPLEMENTED; + + /* Clear out callback table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + scc_callbacks[i] = 0; + } + + /* If SCC has been mapped in, clean it up and unmap it */ + if (scc_base) { + /* For the SCM, disable interrupts. */ + SCC_WRITE_REGISTER(SCM_INT_CTL_REG, 0); + + /* For the SMN, clear and disable interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_CLEAR_INTERRUPT); + } + + /* Now that interrupts cannot occur, disassociate driver from the interrupt + * lines. + */ + + /* Deregister SCM interrupt handler */ + if (scm_irq_set) { + os_deregister_interrupt(INT_SCC_SCM); + } + + /* Deregister SMN interrupt handler */ + if (smn_irq_set) { +#ifdef USE_SMN_INTERRUPT + os_deregister_interrupt(INT_SCC_SMN); +#endif + } + + /* Finally, release the mapped memory */ + iounmap(scm_ram_base); + + if (scc_callbacks_lock != NULL) + os_lock_deallocate(scc_callbacks_lock); + + if (scc_crypto_lock != NULL) + os_lock_deallocate(scc_crypto_lock); + + /*Disabling SCC Clock*/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_disable(scc_clk); + clk_put(scc_clk); +#endif + pr_debug("SCC2 driver cleaned up.\n"); + +} /* scc_cleanup */ + +/*****************************************************************************/ +/* fn scc_get_configuration() */ +/*****************************************************************************/ +scc_config_t *scc_get_configuration(void) +{ + /* + * If some other driver calls scc before the kernel does, make sure that + * this driver's initialization is performed. + */ + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /** + * If there is no SCC, yet the driver exists, the value -1 will be in + * the #scc_config_t fields for other than the driver versions. + */ + return &scc_configuration; +} /* scc_get_configuration */ + +/*****************************************************************************/ +/* fn scc_zeroize_memories() */ +/*****************************************************************************/ +scc_return_t scc_zeroize_memories(void) +{ + scc_return_t return_status = SCC_RET_FAIL; + + return return_status; +} /* scc_zeroize_memories */ + +/*****************************************************************************/ +/* fn scc_set_sw_alarm() */ +/*****************************************************************************/ +void scc_set_sw_alarm(void) +{ + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Update scc_availability based on current SMN status. This might + * perform callbacks. + */ + (void)scc_update_state(); + + /* if everything is OK, make it fail */ + if (scc_availability == SCC_STATUS_OK) { + + /* sound the alarm (and disable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_SET_SOFTWARE_ALARM); + + scc_availability = SCC_STATUS_FAILED; /* Remember what we've done */ + + /* In case SMN interrupt is not available, tell the world */ + scc_perform_callbacks(); + } + + return; +} /* scc_set_sw_alarm */ + +/*****************************************************************************/ +/* fn scc_monitor_security_failure() */ +/*****************************************************************************/ +scc_return_t scc_monitor_security_failure(void callback_func(void)) +{ + int i; + os_lock_context_t irq_flags; /* for IRQ save/restore */ + scc_return_t return_status = SCC_RET_TOO_MANY_FUNCTIONS; + int function_stored = FALSE; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Acquire lock of callbacks table. Could be spin_lock_irq() if this + * routine were just called from base (not interrupt) level + */ + os_lock_save_context(scc_callbacks_lock, irq_flags); + + /* Search through table looking for empty slot */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + if (scc_callbacks[i] == callback_func) { + if (function_stored) { + /* Saved duplicate earlier. Clear this later one. */ + scc_callbacks[i] = NULL; + } + /* Exactly one copy is now stored */ + return_status = SCC_RET_OK; + break; + } else if (scc_callbacks[i] == NULL && !function_stored) { + /* Found open slot. Save it and remember */ + scc_callbacks[i] = callback_func; + return_status = SCC_RET_OK; + function_stored = TRUE; + } + } + + /* Free the lock */ + os_unlock_restore_context(scc_callbacks_lock, irq_flags); + + return return_status; +} /* scc_monitor_security_failure */ + +/*****************************************************************************/ +/* fn scc_stop_monitoring_security_failure() */ +/*****************************************************************************/ +void scc_stop_monitoring_security_failure(void callback_func(void)) +{ + os_lock_context_t irq_flags; /* for IRQ save/restore */ + int i; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* Acquire lock of callbacks table. Could be spin_lock_irq() if this + * routine were just called from base (not interrupt) level + */ + os_lock_save_context(scc_callbacks_lock, irq_flags); + + /* Search every entry of the table for this function */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + if (scc_callbacks[i] == callback_func) { + scc_callbacks[i] = NULL; /* found instance - clear it out */ + break; + } + } + + /* Free the lock */ + os_unlock_restore_context(scc_callbacks_lock, irq_flags); + + return; +} /* scc_stop_monitoring_security_failure */ + +/*****************************************************************************/ +/* fn scc_read_register() */ +/*****************************************************************************/ +scc_return_t scc_read_register(int register_offset, uint32_t * value) +{ + scc_return_t return_status = SCC_RET_FAIL; + uint32_t smn_status; + uint32_t scm_status; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* First layer of protection -- completely unaccessible SCC */ + if (scc_availability != SCC_STATUS_UNIMPLEMENTED) { + + /* Second layer -- that offset is valid */ + if (register_offset != SMN_BB_DEC_REG && /* write only! */ + check_register_offset(register_offset) == SCC_RET_OK) { + + /* Get current status / update local state */ + smn_status = scc_update_state(); + scm_status = SCC_READ_REGISTER(SCM_STATUS_REG); + + /* + * Third layer - verify that the register being requested is + * available in the current state of the SCC. + */ + if ((return_status = + check_register_accessible(register_offset, + smn_status, + scm_status)) == + SCC_RET_OK) { + *value = SCC_READ_REGISTER(register_offset); + } + } + } + + return return_status; +} /* scc_read_register */ + +/*****************************************************************************/ +/* fn scc_write_register() */ +/*****************************************************************************/ +scc_return_t scc_write_register(int register_offset, uint32_t value) +{ + scc_return_t return_status = SCC_RET_FAIL; + uint32_t smn_status; + uint32_t scm_status; + + if (scc_availability == SCC_STATUS_INITIAL) { + scc_init(); + } + + /* First layer of protection -- completely unaccessible SCC */ + if (scc_availability != SCC_STATUS_UNIMPLEMENTED) { + + /* Second layer -- that offset is valid */ + if (!((register_offset == SCM_STATUS_REG) || /* These registers are */ + (register_offset == SCM_VERSION_REG) || /* Read Only */ + (register_offset == SMN_BB_CNT_REG) || + (register_offset == SMN_TIMER_REG)) && + check_register_offset(register_offset) == SCC_RET_OK) { + + /* Get current status / update local state */ + smn_status = scc_update_state(); + scm_status = SCC_READ_REGISTER(SCM_STATUS_REG); + + /* + * Third layer - verify that the register being requested is + * available in the current state of the SCC. + */ + if (check_register_accessible + (register_offset, smn_status, scm_status) == 0) { + SCC_WRITE_REGISTER(register_offset, value); + return_status = SCC_RET_OK; + } + } + } + + return return_status; +} /* scc_write_register() */ + +/****************************************************************************** + * + * Function Implementations - Internal + * + *****************************************************************************/ + +/*****************************************************************************/ +/* fn scc_irq() */ +/*****************************************************************************/ +/** + * This is the interrupt handler for the SCC. + * + * This function checks the SMN Status register to see whether it + * generated the interrupt, then it checks the SCM Status register to + * see whether it needs attention. + * + * If an SMN Interrupt is active, then the SCC state set to failure, and + * #scc_perform_callbacks() is invoked to notify any interested parties. + * + * The SCM Interrupt should be masked, as this driver uses polling to determine + * when the SCM has completed a crypto or zeroing operation. Therefore, if the + * interrupt is active, the driver will just clear the interrupt and (re)mask. + */ +OS_DEV_ISR(scc_irq) +{ + uint32_t smn_status; + uint32_t scm_status; + int handled = 0; /* assume interrupt isn't from SMN */ +#if defined(USE_SMN_INTERRUPT) + int smn_irq = INT_SCC_SMN; /* SMN interrupt is on a line by itself */ +#elif defined (NO_SMN_INTERRUPT) + int smn_irq = -1; /* not wired to CPU at all */ +#else + int smn_irq = INT_SCC_SCM; /* SMN interrupt shares a line with SCM */ +#endif + + /* Update current state... This will perform callbacks... */ + smn_status = scc_update_state(); + + /* SMN is on its own interrupt line. Verify the IRQ was triggered + * before clearing the interrupt and marking it handled. */ + if ((os_dev_get_irq() == smn_irq) && + (smn_status & SMN_STATUS_SMN_STATUS_IRQ)) { + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_CLEAR_INTERRUPT); + handled++; /* tell kernel that interrupt was handled */ + } + + /* Check on the health of the SCM */ + scm_status = SCC_READ_REGISTER(SCM_STATUS_REG); + + /* The driver masks interrupts, so this should never happen. */ + if (os_dev_get_irq() == INT_SCC_SCM) { + /* but if it does, try to prevent it in the future */ + SCC_WRITE_REGISTER(SCM_INT_CTL_REG, 0); + handled++; + } + + /* Any non-zero value of handled lets kernel know we got something */ + os_dev_isr_return(handled); +} + +/*****************************************************************************/ +/* fn scc_perform_callbacks() */ +/*****************************************************************************/ +/** Perform callbacks registered by #scc_monitor_security_failure(). + * + * Make sure callbacks only happen once... Since there may be some reason why + * the interrupt isn't generated, this routine could be called from base(task) + * level. + * + * One at a time, go through #scc_callbacks[] and call any non-null pointers. + */ +static void scc_perform_callbacks(void) +{ + static int callbacks_performed = 0; + unsigned long irq_flags; /* for IRQ save/restore */ + int i; + + /* Acquire lock of callbacks table and callbacks_performed flag */ + os_lock_save_context(scc_callbacks_lock, irq_flags); + + if (!callbacks_performed) { + callbacks_performed = 1; + + /* Loop over all of the entries in the table */ + for (i = 0; i < SCC_CALLBACK_SIZE; i++) { + /* If not null, ... */ + if (scc_callbacks[i]) { + scc_callbacks[i] (); /* invoke the callback routine */ + } + } + } + + os_unlock_restore_context(scc_callbacks_lock, irq_flags); + + return; +} + +/*****************************************************************************/ +/* fn scc_update_state() */ +/*****************************************************************************/ +/** + * Make certain SCC is still running. + * + * Side effect is to update #scc_availability and, if the state goes to failed, + * run #scc_perform_callbacks(). + * + * (If #SCC_BRINGUP is defined, bring SCC to secure state if it is found to be + * in health check state) + * + * @return Current value of #SMN_STATUS_REG register. + */ +static uint32_t scc_update_state(void) +{ + uint32_t smn_status_register = SMN_STATE_FAIL; + int smn_state; + + /* if FAIL or UNIMPLEMENTED, don't bother */ + if (scc_availability == SCC_STATUS_CHECKING || + scc_availability == SCC_STATUS_OK) { + + smn_status_register = SCC_READ_REGISTER(SMN_STATUS_REG); + smn_state = smn_status_register & SMN_STATUS_STATE_MASK; + +#ifdef SCC_BRINGUP + /* If in Health Check while booting, try to 'bringup' to Secure mode */ + if (scc_availability == SCC_STATUS_CHECKING && + smn_state == SMN_STATE_HEALTH_CHECK) { + /* Code up a simple algorithm for the ASC */ + SCC_WRITE_REGISTER(SMN_SEQ_START_REG, 0xaaaa); + SCC_WRITE_REGISTER(SMN_SEQ_END_REG, 0x5555); + SCC_WRITE_REGISTER(SMN_SEQ_CHECK_REG, 0x5555); + /* State should be SECURE now */ + smn_status_register = SCC_READ_REGISTER(SMN_STATUS); + smn_state = smn_status_register & SMN_STATUS_STATE_MASK; + } +#endif + + /* + * State should be SECURE or NON_SECURE for operation of the part. If + * FAIL, mark failed (i.e. limited access to registers). Any other + * state, mark unimplemented, as the SCC is unuseable. + */ + if (smn_state == SMN_STATE_SECURE + || smn_state == SMN_STATE_NON_SECURE) { + /* Healthy */ + scc_availability = SCC_STATUS_OK; + } else if (smn_state == SMN_STATE_FAIL) { + scc_availability = SCC_STATUS_FAILED; /* uh oh - unhealthy */ + scc_perform_callbacks(); + os_printk(KERN_ERR "SCC2: SCC went into FAILED mode\n"); + } else { + /* START, ZEROIZE RAM, HEALTH CHECK, or unknown */ + scc_availability = SCC_STATUS_UNIMPLEMENTED; /* unuseable */ + os_printk(KERN_ERR + "SCC2: SCC declared UNIMPLEMENTED\n"); + } + } + /* if availability is initial or ok */ + return smn_status_register; +} + +/*****************************************************************************/ +/* fn scc_init_ccitt_crc() */ +/*****************************************************************************/ +/** + * Populate the partial CRC lookup table. + * + * @return none + * + */ +static void scc_init_ccitt_crc(void) +{ + int dividend; /* index for lookup table */ + uint16_t remainder; /* partial value for a given dividend */ + int bit; /* index into bits of a byte */ + + /* + * Compute the remainder of each possible dividend. + */ + for (dividend = 0; dividend < 256; ++dividend) { + /* + * Start with the dividend followed by zeros. + */ + remainder = dividend << (8); + + /* + * Perform modulo-2 division, a bit at a time. + */ + for (bit = 8; bit > 0; --bit) { + /* + * Try to divide the current data bit. + */ + if (remainder & 0x8000) { + remainder = (remainder << 1) ^ CRC_POLYNOMIAL; + } else { + remainder = (remainder << 1); + } + } + + /* + * Store the result into the table. + */ + scc_crc_lookup_table[dividend] = remainder; + } + +} /* scc_init_ccitt_crc() */ + +/*****************************************************************************/ +/* fn grab_config_values() */ +/*****************************************************************************/ +/** + * grab_config_values() will read the SCM Configuration and SMN Status + * registers and store away version and size information for later use. + * + * @return The current value of the SMN Status register. + */ +static uint32_t scc_grab_config_values(void) +{ + uint32_t scm_version_register; + uint32_t smn_status_register = SMN_STATE_FAIL; + + if (scc_availability != SCC_STATUS_CHECKING) { + goto out; + } + scm_version_register = SCC_READ_REGISTER(SCM_VERSION_REG); + pr_debug("SCC2 Driver: SCM version is 0x%08x\n", scm_version_register); + + /* Get SMN status and update scc_availability */ + smn_status_register = scc_update_state(); + pr_debug("SCC2 Driver: SMN status is 0x%08x\n", smn_status_register); + + /* save sizes and versions information for later use */ + scc_configuration.block_size_bytes = 16; /* BPCP ? */ + scc_configuration.partition_count = + 1 + ((scm_version_register & SCM_VER_NP_MASK) >> SCM_VER_NP_SHIFT); + scc_configuration.partition_size_bytes = + 1 << ((scm_version_register & SCM_VER_BPP_MASK) >> + SCM_VER_BPP_SHIFT); + scc_configuration.scm_version = + (scm_version_register & SCM_VER_MAJ_MASK) >> SCM_VER_MAJ_SHIFT; + scc_configuration.smn_version = + (smn_status_register & SMN_STATUS_VERSION_ID_MASK) + >> SMN_STATUS_VERSION_ID_SHIFT; + if (scc_configuration.scm_version != SCM_MAJOR_VERSION_2) { + scc_availability = SCC_STATUS_UNIMPLEMENTED; /* Unknown version */ + } + + out: + return smn_status_register; +} /* grab_config_values */ + +/*****************************************************************************/ +/* fn setup_interrupt_handling() */ +/*****************************************************************************/ +/** + * Register the SCM and SMN interrupt handlers. + * + * Called from #scc_init() + * + * @return 0 on success + */ +static int setup_interrupt_handling(void) +{ + int smn_error_code = -1; + int scm_error_code = -1; + + /* Disnable SCM interrupts */ + SCC_WRITE_REGISTER(SCM_INT_CTL_REG, 0); + +#ifdef USE_SMN_INTERRUPT + /* Install interrupt service routine for SMN. */ + smn_error_code = os_register_interrupt(SCC_DRIVER_NAME, + INT_SCC_SMN, scc_irq); + if (smn_error_code != 0) { + os_printk(KERN_ERR + "SCC2 Driver: Error installing SMN Interrupt Handler: %d\n", + smn_error_code); + } else { + smn_irq_set = 1; /* remember this for cleanup */ + /* Enable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_CLEAR_INTERRUPT | + SMN_COMMAND_ENABLE_INTERRUPT); + } +#else + smn_error_code = 0; /* no problems... will handle later */ +#endif + + /* + * Install interrupt service routine for SCM (or both together). + */ + scm_error_code = os_register_interrupt(SCC_DRIVER_NAME, + INT_SCC_SCM, scc_irq); + if (scm_error_code != 0) { +#ifndef MXC + os_printk(KERN_ERR + "SCC2 Driver: Error installing SCM Interrupt Handler: %d\n", + scm_error_code); +#else + os_printk(KERN_ERR + "SCC2 Driver: Error installing SCC Interrupt Handler: %d\n", + scm_error_code); +#endif + } else { + scm_irq_set = 1; /* remember this for cleanup */ +#if defined(USE_SMN_INTERRUPT) && !defined(NO_SMN_INTERRUPT) + /* Enable SMN interrupts */ + SCC_WRITE_REGISTER(SMN_COMMAND_REG, + SMN_COMMAND_CLEAR_INTERRUPT | + SMN_COMMAND_ENABLE_INTERRUPT); +#endif + } + + /* Return an error if one was encountered */ + return scm_error_code ? scm_error_code : smn_error_code; +} /* setup_interrupt_handling */ + +/*****************************************************************************/ +/* fn scc_do_crypto() */ +/*****************************************************************************/ +/** Have the SCM perform the crypto function. + * + * Set up length register, and the store @c scm_control into control register + * to kick off the operation. Wait for completion, gather status, clear + * interrupt / status. + * + * @param byte_count number of bytes to perform in this operation + * @param scm_command Bit values to be set in @c SCM_CCMD_REG register + * + * @return 0 on success, value of #SCM_ERR_STATUS_REG on failure + */ +static uint32_t scc_do_crypto(int byte_count, uint32_t scm_command) +{ + int block_count = byte_count / SCC_BLOCK_SIZE_BYTES(); + uint32_t crypto_status; + scc_return_t ret; + + /* This seems to be necessary in order to allow subsequent cipher + * operations to succeed when a partition is deallocated/reallocated! + */ + (void)SCC_READ_REGISTER(SCM_STATUS_REG); + + /* In length register, 0 means 1, etc. */ + scm_command |= (block_count - 1) << SCM_CCMD_LENGTH_SHIFT; + + /* set modes and kick off the operation */ + SCC_WRITE_REGISTER(SCM_CCMD_REG, scm_command); + + ret = scc_wait_completion(&crypto_status); + + /* Only done bit should be on */ + if (crypto_status & SCM_STATUS_ERR) { + /* Replace with error status instead */ + crypto_status = SCC_READ_REGISTER(SCM_ERR_STATUS_REG); + pr_debug("SCM Failure: 0x%x\n", crypto_status); + if (crypto_status == 0) { + /* That came up 0. Turn on arbitrary bit to signal error. */ + crypto_status = SCM_ERRSTAT_ILM; + } + } else { + crypto_status = 0; + } + pr_debug("SCC2: Done waiting.\n"); + + return crypto_status; +} + +/** + * Encrypt a region of secure memory. + * + * @param part_base Kernel virtual address of the partition. + * @param offset_bytes Offset from the start of the partition to the plaintext + * data. + * @param byte_count Length of the region (octets). + * @param black_data Physical location to store the encrypted data. + * @param IV Value to use for the IV. + * @param cypher_mode Cyphering mode to use, specified by type + * #scc_cypher_mode_t + * + * @return SCC_RET_OK if successful. + */ +scc_return_t +scc_encrypt_region(uint32_t part_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t *black_data, + uint32_t *IV, scc_cypher_mode_t cypher_mode) +{ + os_lock_context_t irq_flags; /* for IRQ save/restore */ + scc_return_t status = SCC_RET_OK; + uint32_t crypto_status; + uint32_t scm_command; + int offset_blocks = offset_bytes / SCC_BLOCK_SIZE_BYTES(); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_enable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_enable(scc_clk); +#endif + + scm_command = ((offset_blocks << SCM_CCMD_OFFSET_SHIFT) | + (SCM_PART_NUMBER(part_base) << SCM_CCMD_PART_SHIFT)); + + switch (cypher_mode) { + case SCC_CYPHER_MODE_CBC: + scm_command |= SCM_CCMD_AES_ENC_CBC; + break; + case SCC_CYPHER_MODE_ECB: + scm_command |= SCM_CCMD_AES_ENC_ECB; + break; + default: + status = SCC_RET_FAIL; + break; + } + + pr_debug("Received encrypt request. SCM_C_BLACK_ST_REG: %p, " + "scm_Command: %08x, length: %i (part_base: %08x, " + "offset: %i)\n", + black_data, scm_command, byte_count, part_base, offset_blocks); + + if (status != SCC_RET_OK) + goto out; + + /* ACQUIRE LOCK to prevent others from using crypto or releasing slot */ + os_lock_save_context(scc_crypto_lock, irq_flags); + + if (status == SCC_RET_OK) { + SCC_WRITE_REGISTER(SCM_C_BLACK_ST_REG, (uint32_t) black_data); + + /* Only write the IV if it will actually be used */ + if (cypher_mode == SCC_CYPHER_MODE_CBC) { + /* Write the IV register */ + SCC_WRITE_REGISTER(SCM_AES_CBC_IV0_REG, *(IV)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV1_REG, *(IV + 1)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV2_REG, *(IV + 2)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV3_REG, *(IV + 3)); + } + + /* Set modes and kick off the encryption */ + crypto_status = scc_do_crypto(byte_count, scm_command); + + if (crypto_status != 0) { + pr_debug("SCM encrypt red crypto failure: 0x%x\n", + crypto_status); + } else { + status = SCC_RET_OK; + pr_debug("SCC2: Encrypted %d bytes\n", byte_count); + } + } + + os_unlock_restore_context(scc_crypto_lock, irq_flags); + +out: +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_disable(scc_clk); +#endif + + return status; +} + +/* Decrypt a region into secure memory + * + * @param part_base Kernel virtual address of the partition. + * @param offset_bytes Offset from the start of the partition to store the + * plaintext data. + * @param byte_counts Length of the region (octets). + * @param black_data Physical location of the encrypted data. + * @param IV Value to use for the IV. + * @param cypher_mode Cyphering mode to use, specified by type + * #scc_cypher_mode_t + * + * @return SCC_RET_OK if successful. + */ +scc_return_t +scc_decrypt_region(uint32_t part_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t *black_data, + uint32_t *IV, scc_cypher_mode_t cypher_mode) +{ + os_lock_context_t irq_flags; /* for IRQ save/restore */ + scc_return_t status = SCC_RET_OK; + uint32_t crypto_status; + uint32_t scm_command; + int offset_blocks = offset_bytes / SCC_BLOCK_SIZE_BYTES(); + + /*Enabling SCC clock.*/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_enable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_enable(scc_clk); +#endif + scm_command = ((offset_blocks << SCM_CCMD_OFFSET_SHIFT) | + (SCM_PART_NUMBER(part_base) << SCM_CCMD_PART_SHIFT)); + + switch (cypher_mode) { + case SCC_CYPHER_MODE_CBC: + scm_command |= SCM_CCMD_AES_DEC_CBC; + break; + case SCC_CYPHER_MODE_ECB: + scm_command |= SCM_CCMD_AES_DEC_ECB; + break; + default: + status = SCC_RET_FAIL; + break; + } + + pr_debug("Received decrypt request. SCM_C_BLACK_ST_REG: %p, " + "scm_Command: %08x, length: %i (part_base: %08x, " + "offset: %i)\n", + black_data, scm_command, byte_count, part_base, offset_blocks); + + if (status != SCC_RET_OK) + goto out; + + /* ACQUIRE LOCK to prevent others from using crypto or releasing slot */ + os_lock_save_context(scc_crypto_lock, irq_flags); + + if (status == SCC_RET_OK) { + status = SCC_RET_FAIL; /* reset expectations */ + SCC_WRITE_REGISTER(SCM_C_BLACK_ST_REG, (uint32_t) black_data); + + /* Write the IV register */ + SCC_WRITE_REGISTER(SCM_AES_CBC_IV0_REG, *(IV)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV1_REG, *(IV + 1)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV2_REG, *(IV + 2)); + SCC_WRITE_REGISTER(SCM_AES_CBC_IV3_REG, *(IV + 3)); + + /* Set modes and kick off the decryption */ + crypto_status = scc_do_crypto(byte_count, scm_command); + + if (crypto_status != 0) { + pr_debug("SCM decrypt black crypto failure: 0x%x\n", + crypto_status); + } else { + status = SCC_RET_OK; + pr_debug("SCC2: Decrypted %d bytes\n", byte_count); + } + } + + os_unlock_restore_context(scc_crypto_lock, irq_flags); +out: + /*Disabling the Clock when the driver is not in use.*/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SCC_CLK); +#else + if (scc_clk != ERR_PTR(ENOENT)) + clk_disable(scc_clk); +#endif + return status; +} + +/*****************************************************************************/ +/* fn host_owns_partition() */ +/*****************************************************************************/ +/** + * Determine if the host owns a given partition. + * + * @internal + * + * @param part_no Partition number to query + * + * @return TRUE if the host owns the partition, FALSE otherwise. + */ + +static uint32_t host_owns_partition(uint32_t part_no) +{ + uint32_t value; + + if (part_no < scc_configuration.partition_count) { + + /* Check the partition owners register */ + value = SCC_READ_REGISTER(SCM_PART_OWNERS_REG); + if (((value >> (part_no * SCM_POWN_SHIFT)) & SCM_POWN_MASK) + == SCM_POWN_PART_OWNED) + return TRUE; + } + return FALSE; +} + +/*****************************************************************************/ +/* fn partition_engaged() */ +/*****************************************************************************/ +/** + * Determine if the given partition is engaged. + * + * @internal + * + * @param part_no Partition number to query + * + * @return TRUE if the partition is engaged, FALSE otherwise. + */ + +static uint32_t partition_engaged(uint32_t part_no) +{ + uint32_t value; + + if (part_no < scc_configuration.partition_count) { + + /* Check the partition engaged register */ + value = SCC_READ_REGISTER(SCM_PART_ENGAGED_REG); + if (((value >> (part_no * SCM_PENG_SHIFT)) & 0x1) + == SCM_PENG_ENGAGED) + return TRUE; + } + return FALSE; +} + +/*****************************************************************************/ +/* fn scc_wait_completion() */ +/*****************************************************************************/ +/** + * Poll looking for end-of-cipher indication. Only used + * if @c SCC_SCM_SLEEP is not defined. + * + * @internal + * + * On a Tahiti, crypto under 230 or so bytes is done after the first loop, all + * the way up to five sets of spins for 1024 bytes. (8- and 16-byte functions + * are done when we first look. Zeroizing takes one pass around. + * + * @param scm_status Address of the SCM_STATUS register + * + * @return A return code of type #scc_return_t + */ +static scc_return_t scc_wait_completion(uint32_t * scm_status) +{ + scc_return_t ret; + int done; + int i = 0; + + /* check for completion by polling */ + do { + done = is_cipher_done(scm_status); + if (done) + break; + /* TODO: shorten this delay */ + udelay(1000); + } while (i++ < SCC_CIPHER_MAX_POLL_COUNT); + + pr_debug("SCC2: Polled DONE %d times\n", i); + if (!done) { + ret = SCC_RET_FAIL; + } + + return ret; +} /* scc_wait_completion() */ + +/*****************************************************************************/ +/* fn is_cipher_done() */ +/*****************************************************************************/ +/** + * This function returns non-zero if SCM Status register indicates + * that a cipher has terminated or some other interrupt-generating + * condition has occurred. + * + * @param scm_status Address of the SCM STATUS register + * + * @return 0 if cipher operations are finished + */ +static int is_cipher_done(uint32_t * scm_status) +{ + register unsigned status; + register int cipher_done; + + *scm_status = SCC_READ_REGISTER(SCM_STATUS_REG); + status = (*scm_status & SCM_STATUS_SRS_MASK) >> SCM_STATUS_SRS_SHIFT; + + /* + * Done when SCM is not in 'currently performing a function' states. + */ + cipher_done = ((status != SCM_STATUS_SRS_ZBUSY) + && (status != SCM_STATUS_SRS_CBUSY) + && (status != SCM_STATUS_SRS_ABUSY)); + + return cipher_done; +} /* is_cipher_done() */ + +/*****************************************************************************/ +/* fn offset_within_smn() */ +/*****************************************************************************/ +/*! + * Check that the offset is with the bounds of the SMN register set. + * + * @param[in] register_offset register offset of SMN. + * + * @return 1 if true, 0 if false (not within SMN) + */ +static inline int offset_within_smn(uint32_t register_offset) +{ + return ((register_offset >= SMN_STATUS_REG) + && (register_offset <= SMN_HAC_REG)); +} + +/*****************************************************************************/ +/* fn offset_within_scm() */ +/*****************************************************************************/ +/*! + * Check that the offset is with the bounds of the SCM register set. + * + * @param[in] register_offset Register offset of SCM + * + * @return 1 if true, 0 if false (not within SCM) + */ +static inline int offset_within_scm(uint32_t register_offset) +{ + return 1; /* (register_offset >= SCM_RED_START) + && (register_offset < scm_highest_memory_address); */ +/* Although this would cause trouble for zeroize testing, this change would + * close a security hole which currently allows any kernel program to access + * any location in RED RAM. Perhaps enforce in non-SCC_DEBUG compiles? + && (register_offset <= SCM_INIT_VECTOR_1); */ +} + +/*****************************************************************************/ +/* fn check_register_accessible() */ +/*****************************************************************************/ +/** + * Given the current SCM and SMN status, verify that access to the requested + * register should be OK. + * + * @param[in] register_offset register offset within SCC + * @param[in] smn_status recent value from #SMN_STATUS_REG + * @param[in] scm_status recent value from #SCM_STATUS_REG + * + * @return #SCC_RET_OK if ok, #SCC_RET_FAIL if not + */ +static scc_return_t +check_register_accessible(uint32_t register_offset, uint32_t smn_status, + uint32_t scm_status) +{ + int error_code = SCC_RET_FAIL; + + /* Verify that the register offset passed in is not among the verboten set + * if the SMN is in Fail mode. + */ + if (offset_within_smn(register_offset)) { + if ((smn_status & SMN_STATUS_STATE_MASK) == SMN_STATE_FAIL) { + if (!((register_offset == SMN_STATUS_REG) || + (register_offset == SMN_COMMAND_REG) || + (register_offset == SMN_SEC_VIO_REG))) { + pr_debug + ("SCC2 Driver: Note: Security State is in FAIL state.\n"); + } /* register not a safe one */ + else { + /* SMN is in FAIL, but register is a safe one */ + error_code = SCC_RET_OK; + } + } /* State is FAIL */ + else { + /* State is not fail. All registers accessible. */ + error_code = SCC_RET_OK; + } + } + /* offset within SMN */ + /* Not SCM register. Check for SCM busy. */ + else if (offset_within_scm(register_offset)) { + /* This is the 'cannot access' condition in the SCM */ + if (0 /* (scm_status & SCM_STATUS_BUSY) */ + /* these are always available - rest fail on busy */ + && !((register_offset == SCM_STATUS_REG) || + (register_offset == SCM_ERR_STATUS_REG) || + (register_offset == SCM_INT_CTL_REG) || + (register_offset == SCM_VERSION_REG))) { + pr_debug + ("SCC2 Driver: Note: Secure Memory is in BUSY state.\n"); + } /* status is busy & register inaccessible */ + else { + error_code = SCC_RET_OK; + } + } + /* offset within SCM */ + return error_code; + +} /* check_register_accessible() */ + +/*****************************************************************************/ +/* fn check_register_offset() */ +/*****************************************************************************/ +/** + * Check that the offset is with the bounds of the SCC register set. + * + * @param[in] register_offset register offset of SMN. + * + * #SCC_RET_OK if ok, #SCC_RET_FAIL if not + */ +static scc_return_t check_register_offset(uint32_t register_offset) +{ + int return_value = SCC_RET_FAIL; + + /* Is it valid word offset ? */ + if (SCC_BYTE_OFFSET(register_offset) == 0) { + /* Yes. Is register within SCM? */ + if (offset_within_scm(register_offset)) { + return_value = SCC_RET_OK; /* yes, all ok */ + } + /* Not in SCM. Now look within the SMN */ + else if (offset_within_smn(register_offset)) { + return_value = SCC_RET_OK; /* yes, all ok */ + } + } + + return return_value; +} + +#ifdef SCC_REGISTER_DEBUG + +/** + * Names of the SCC Registers, indexed by register number + */ +static char *scc_regnames[] = { + "SCM_VERSION_REG", + "0x04", + "SCM_INT_CTL_REG", + "SCM_STATUS_REG", + "SCM_ERR_STATUS_REG", + "SCM_FAULT_ADR_REG", + "SCM_PART_OWNERS_REG", + "SCM_PART_ENGAGED_REG", + "SCM_UNIQUE_ID0_REG", + "SCM_UNIQUE_ID1_REG", + "SCM_UNIQUE_ID2_REG", + "SCM_UNIQUE_ID3_REG", + "0x30", + "0x34", + "0x38", + "0x3C", + "0x40", + "0x44", + "0x48", + "0x4C", + "SCM_ZCMD_REG", + "SCM_CCMD_REG", + "SCM_C_BLACK_ST_REG", + "SCM_DBG_STATUS_REG", + "SCM_AES_CBC_IV0_REG", + "SCM_AES_CBC_IV1_REG", + "SCM_AES_CBC_IV2_REG", + "SCM_AES_CBC_IV3_REG", + "0x70", + "0x74", + "0x78", + "0x7C", + "SCM_SMID0_REG", + "SCM_ACC0_REG", + "SCM_SMID1_REG", + "SCM_ACC1_REG", + "SCM_SMID2_REG", + "SCM_ACC2_REG", + "SCM_SMID3_REG", + "SCM_ACC3_REG", + "SCM_SMID4_REG", + "SCM_ACC4_REG", + "SCM_SMID5_REG", + "SCM_ACC5_REG", + "SCM_SMID6_REG", + "SCM_ACC6_REG", + "SCM_SMID7_REG", + "SCM_ACC7_REG", + "SCM_SMID8_REG", + "SCM_ACC8_REG", + "SCM_SMID9_REG", + "SCM_ACC9_REG", + "SCM_SMID10_REG", + "SCM_ACC10_REG", + "SCM_SMID11_REG", + "SCM_ACC11_REG", + "SCM_SMID12_REG", + "SCM_ACC12_REG", + "SCM_SMID13_REG", + "SCM_ACC13_REG", + "SCM_SMID14_REG", + "SCM_ACC14_REG", + "SCM_SMID15_REG", + "SCM_ACC15_REG", + "SMN_STATUS_REG", + "SMN_COMMAND_REG", + "SMN_SEQ_START_REG", + "SMN_SEQ_END_REG", + "SMN_SEQ_CHECK_REG", + "SMN_BB_CNT_REG", + "SMN_BB_INC_REG", + "SMN_BB_DEC_REG", + "SMN_COMPARE_REG", + "SMN_PT_CHK_REG", + "SMN_CT_CHK_REG", + "SMN_TIMER_IV_REG", + "SMN_TIMER_CTL_REG", + "SMN_SEC_VIO_REG", + "SMN_TIMER_REG", + "SMN_HAC_REG" +}; + +/** + * Names of the Secure RAM States + */ +static char *srs_names[] = { + "SRS_Reset", + "SRS_All_Ready", + "SRS_ZeroizeBusy", + "SRS_CipherBusy", + "SRS_AllBusy", + "SRS_ZeroizeDoneCipherReady", + "SRS_CipherDoneZeroizeReady", + "SRS_ZeroizeDoneCipherBusy", + "SRS_CipherDoneZeroizeBusy", + "SRS_UNKNOWN_STATE_9", + "SRS_TransitionalA", + "SRS_TransitionalB", + "SRS_TransitionalC", + "SRS_TransitionalD", + "SRS_AllDone", + "SRS_UNKNOWN_STATE_E", + "SRS_FAIL" +}; + +/** + * Create a text interpretation of the SCM Version Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_version_reg(uint32_t value, char *print_buffer, int buf_size) +{ + snprintf(print_buffer, buf_size, + "Bpp: %u, Bpcb: %u, np: %u, maj: %u, min: %u", + (value & SCM_VER_BPP_MASK) >> SCM_VER_BPP_SHIFT, + ((value & SCM_VER_BPCB_MASK) >> SCM_VER_BPCB_SHIFT) + 1, + ((value & SCM_VER_NP_MASK) >> SCM_VER_NP_SHIFT) + 1, + (value & SCM_VER_MAJ_MASK) >> SCM_VER_MAJ_SHIFT, + (value & SCM_VER_MIN_MASK) >> SCM_VER_MIN_SHIFT); + + return print_buffer; +} + +/** + * Create a text interpretation of the SCM Status Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_status_reg(uint32_t value, char *print_buffer, int buf_size) +{ + + snprintf(print_buffer, buf_size, "%s%s%s%s%s%s%s%s%s%s%s%s%s", + (value & SCM_STATUS_KST_DEFAULT_KEY) ? "KST_DefaultKey " : "", + /* reserved */ + (value & SCM_STATUS_KST_WRONG_KEY) ? "KST_WrongKey " : "", + (value & SCM_STATUS_KST_BAD_KEY) ? "KST_BadKey " : "", + (value & SCM_STATUS_ERR) ? "Error " : "", + (value & SCM_STATUS_MSS_FAIL) ? "MSS_FailState " : "", + (value & SCM_STATUS_MSS_SEC) ? "MSS_SecureState " : "", + (value & SCM_STATUS_RSS_FAIL) ? "RSS_FailState " : "", + (value & SCM_STATUS_RSS_SEC) ? "RSS_SecureState " : "", + (value & SCM_STATUS_RSS_INIT) ? "RSS_Initializing " : "", + (value & SCM_STATUS_UNV) ? "UID_Invalid " : "", + (value & SCM_STATUS_BIG) ? "BigEndian " : "", + (value & SCM_STATUS_USK) ? "SecretKey " : "", + srs_names[(value & SCM_STATUS_SRS_MASK) >> + SCM_STATUS_SRS_SHIFT]); + + return print_buffer; +} + +/** + * Names of the SCM Error Codes + */ +static +char *scm_err_code[] = { + "Unknown_0", + "UnknownAddress", + "UnknownCommand", + "ReadPermErr", + "WritePermErr", + "DMAErr", + "EncBlockLenOvfl", + "KeyNotEngaged", + "ZeroizeCmdQOvfl", + "CipherCmdQOvfl", + "ProcessIntr", + "WrongKey", + "DeviceBusy", + "DMAUnalignedAddr", + "Unknown_E", + "Unknown_F", +}; + +/** + * Names of the SMN States + */ +static char *smn_state_name[] = { + "Start", + "Invalid_01", + "Invalid_02", + "Invalid_03", + "Zeroizing_04", + "Zeroizing", + "HealthCheck", + "HealthCheck_07", + "Invalid_08", + "Fail", + "Secure", + "Invalid_0B", + "NonSecure", + "Invalid_0D", + "Invalid_0E", + "Invalid_0F", + "Invalid_10", + "Invalid_11", + "Invalid_12", + "Invalid_13", + "Invalid_14", + "Invalid_15", + "Invalid_16", + "Invalid_17", + "Invalid_18", + "FailHard", + "Invalid_1A", + "Invalid_1B", + "Invalid_1C", + "Invalid_1D", + "Invalid_1E", + "Invalid_1F" +}; + +/** + * Create a text interpretation of the SCM Error Status Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_err_status_reg(uint32_t value, char *print_buffer, int buf_size) +{ + snprintf(print_buffer, buf_size, + "MID: 0x%x, %s%s ErrorCode: %s, SMSState: %s, SCMState: %s", + (value & SCM_ERRSTAT_MID_MASK) >> SCM_ERRSTAT_MID_SHIFT, + (value & SCM_ERRSTAT_ILM) ? "ILM, " : "", + (value & SCM_ERRSTAT_SUP) ? "SUP, " : "", + scm_err_code[(value & SCM_ERRSTAT_ERC_MASK) >> + SCM_ERRSTAT_ERC_SHIFT], + smn_state_name[(value & SCM_ERRSTAT_SMS_MASK) >> + SCM_ERRSTAT_SMS_SHIFT], + srs_names[(value & SCM_ERRSTAT_SRS_MASK) >> + SCM_ERRSTAT_SRS_SHIFT]); + return print_buffer; +} + +/** + * Create a text interpretation of the SCM Zeroize Command Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_zcmd_reg(uint32_t value, char *print_buffer, int buf_size) +{ + unsigned cmd = (value & SCM_ZCMD_CCMD_MASK) >> SCM_CCMD_CCMD_SHIFT; + + snprintf(print_buffer, buf_size, "%s %u", + (cmd == + ZCMD_DEALLOC_PART) ? "DeallocPartition" : + "(unknown function)", + (value & SCM_ZCMD_PART_MASK) >> SCM_ZCMD_PART_SHIFT); + + return print_buffer; +} + +/** + * Create a text interpretation of the SCM Cipher Command Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_ccmd_reg(uint32_t value, char *print_buffer, int buf_size) +{ + unsigned cmd = (value & SCM_CCMD_CCMD_MASK) >> SCM_CCMD_CCMD_SHIFT; + + snprintf(print_buffer, buf_size, + "%s %u bytes, %s offset 0x%x, in partition %u", + (cmd == SCM_CCMD_AES_DEC_ECB) ? "ECB Decrypt" : (cmd == + SCM_CCMD_AES_ENC_ECB) + ? "ECB Encrypt" : (cmd == + SCM_CCMD_AES_DEC_CBC) ? "CBC Decrypt" : (cmd + == + SCM_CCMD_AES_ENC_CBC) + ? "CBC Encrypt" : "(unknown function)", + 16 + + 16 * ((value & SCM_CCMD_LENGTH_MASK) >> SCM_CCMD_LENGTH_SHIFT), + ((cmd == SCM_CCMD_AES_ENC_CBC) + || (cmd == SCM_CCMD_AES_ENC_ECB)) ? "at" : "to", + 16 * ((value & SCM_CCMD_OFFSET_MASK) >> SCM_CCMD_OFFSET_SHIFT), + (value & SCM_CCMD_PART_MASK) >> SCM_CCMD_PART_SHIFT); + + return print_buffer; +} + +/** + * Create a text interpretation of an SCM Access Permissions Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_acc_reg(uint32_t value, char *print_buffer, int buf_size) +{ + snprintf(print_buffer, buf_size, "%s%s%s%s%s%s%s%s%s%s", + (value & SCM_PERM_NO_ZEROIZE) ? "NO_ZERO " : "", + (value & SCM_PERM_HD_SUP_DISABLE) ? "SUP_DIS " : "", + (value & SCM_PERM_HD_READ) ? "HD_RD " : "", + (value & SCM_PERM_HD_WRITE) ? "HD_WR " : "", + (value & SCM_PERM_HD_EXECUTE) ? "HD_EX " : "", + (value & SCM_PERM_TH_READ) ? "TH_RD " : "", + (value & SCM_PERM_TH_WRITE) ? "TH_WR " : "", + (value & SCM_PERM_OT_READ) ? "OT_RD " : "", + (value & SCM_PERM_OT_WRITE) ? "OT_WR " : "", + (value & SCM_PERM_OT_EXECUTE) ? "OT_EX" : ""); + + return print_buffer; +} + +/** + * Create a text interpretation of the SCM Partitions Engaged Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *scm_print_part_eng_reg(uint32_t value, char *print_buffer, int buf_size) +{ + snprintf(print_buffer, buf_size, "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", + (value & 0x8000) ? "15 " : "", + (value & 0x4000) ? "14 " : "", + (value & 0x2000) ? "13 " : "", + (value & 0x1000) ? "12 " : "", + (value & 0x0800) ? "11 " : "", + (value & 0x0400) ? "10 " : "", + (value & 0x0200) ? "9 " : "", + (value & 0x0100) ? "8 " : "", + (value & 0x0080) ? "7 " : "", + (value & 0x0040) ? "6 " : "", + (value & 0x0020) ? "5 " : "", + (value & 0x0010) ? "4 " : "", + (value & 0x0008) ? "3 " : "", + (value & 0x0004) ? "2 " : "", + (value & 0x0002) ? "1 " : "", (value & 0x0001) ? "0" : ""); + + return print_buffer; +} + +/** + * Create a text interpretation of the SMN Status Register + * + * @param value The value of the register + * @param[out] print_buffer Place to store the interpretation + * @param buf_size Number of bytes available at print_buffer + * + * @return The print_buffer + */ +static +char *smn_print_status_reg(uint32_t value, char *print_buffer, int buf_size) +{ + snprintf(print_buffer, buf_size, + "Version %d %s%s%s%s%s%s%s%s%s%s%s%s%s", + (value & SMN_STATUS_VERSION_ID_MASK) >> + SMN_STATUS_VERSION_ID_SHIFT, + (value & SMN_STATUS_ILLEGAL_MASTER) ? "IllMaster " : "", + (value & SMN_STATUS_SCAN_EXIT) ? "ScanExit " : "", + (value & SMN_STATUS_PERIP_INIT) ? "PeripInit " : "", + (value & SMN_STATUS_SMN_ERROR) ? "SMNError " : "", + (value & SMN_STATUS_SOFTWARE_ALARM) ? "SWAlarm " : "", + (value & SMN_STATUS_TIMER_ERROR) ? "TimerErr " : "", + (value & SMN_STATUS_PC_ERROR) ? "PTCTErr " : "", + (value & SMN_STATUS_BITBANK_ERROR) ? "BitbankErr " : "", + (value & SMN_STATUS_ASC_ERROR) ? "ASCErr " : "", + (value & SMN_STATUS_SECURITY_POLICY_ERROR) ? "SecPlcyErr " : + "", + (value & SMN_STATUS_SEC_VIO_ACTIVE_ERROR) ? "SecVioAct " : "", + (value & SMN_STATUS_INTERNAL_BOOT) ? "IntBoot " : "", + smn_state_name[(value & SMN_STATUS_STATE_MASK) >> + SMN_STATUS_STATE_SHIFT]); + + return print_buffer; +} + +/** + * The array, indexed by register number (byte-offset / 4), of print routines + * for the SCC (SCM and SMN) registers. + */ +static reg_print_routine_t reg_printers[] = { + scm_print_version_reg, + NULL, /* 0x04 */ + NULL, /* SCM_INT_CTL_REG */ + scm_print_status_reg, + scm_print_err_status_reg, + NULL, /* SCM_FAULT_ADR_REG */ + NULL, /* SCM_PART_OWNERS_REG */ + scm_print_part_eng_reg, + NULL, /* SCM_UNIQUE_ID0_REG */ + NULL, /* SCM_UNIQUE_ID1_REG */ + NULL, /* SCM_UNIQUE_ID2_REG */ + NULL, /* SCM_UNIQUE_ID3_REG */ + NULL, /* 0x30 */ + NULL, /* 0x34 */ + NULL, /* 0x38 */ + NULL, /* 0x3C */ + NULL, /* 0x40 */ + NULL, /* 0x44 */ + NULL, /* 0x48 */ + NULL, /* 0x4C */ + scm_print_zcmd_reg, + scm_print_ccmd_reg, + NULL, /* SCM_C_BLACK_ST_REG */ + NULL, /* SCM_DBG_STATUS_REG */ + NULL, /* SCM_AES_CBC_IV0_REG */ + NULL, /* SCM_AES_CBC_IV1_REG */ + NULL, /* SCM_AES_CBC_IV2_REG */ + NULL, /* SCM_AES_CBC_IV3_REG */ + NULL, /* 0x70 */ + NULL, /* 0x74 */ + NULL, /* 0x78 */ + NULL, /* 0x7C */ + NULL, /* SCM_SMID0_REG */ + scm_print_acc_reg, /* ACC0 */ + NULL, /* SCM_SMID1_REG */ + scm_print_acc_reg, /* ACC1 */ + NULL, /* SCM_SMID2_REG */ + scm_print_acc_reg, /* ACC2 */ + NULL, /* SCM_SMID3_REG */ + scm_print_acc_reg, /* ACC3 */ + NULL, /* SCM_SMID4_REG */ + scm_print_acc_reg, /* ACC4 */ + NULL, /* SCM_SMID5_REG */ + scm_print_acc_reg, /* ACC5 */ + NULL, /* SCM_SMID6_REG */ + scm_print_acc_reg, /* ACC6 */ + NULL, /* SCM_SMID7_REG */ + scm_print_acc_reg, /* ACC7 */ + NULL, /* SCM_SMID8_REG */ + scm_print_acc_reg, /* ACC8 */ + NULL, /* SCM_SMID9_REG */ + scm_print_acc_reg, /* ACC9 */ + NULL, /* SCM_SMID10_REG */ + scm_print_acc_reg, /* ACC10 */ + NULL, /* SCM_SMID11_REG */ + scm_print_acc_reg, /* ACC11 */ + NULL, /* SCM_SMID12_REG */ + scm_print_acc_reg, /* ACC12 */ + NULL, /* SCM_SMID13_REG */ + scm_print_acc_reg, /* ACC13 */ + NULL, /* SCM_SMID14_REG */ + scm_print_acc_reg, /* ACC14 */ + NULL, /* SCM_SMID15_REG */ + scm_print_acc_reg, /* ACC15 */ + smn_print_status_reg, + NULL, /* SMN_COMMAND_REG */ + NULL, /* SMN_SEQ_START_REG */ + NULL, /* SMN_SEQ_END_REG */ + NULL, /* SMN_SEQ_CHECK_REG */ + NULL, /* SMN_BB_CNT_REG */ + NULL, /* SMN_BB_INC_REG */ + NULL, /* SMN_BB_DEC_REG */ + NULL, /* SMN_COMPARE_REG */ + NULL, /* SMN_PT_CHK_REG */ + NULL, /* SMN_CT_CHK_REG */ + NULL, /* SMN_TIMER_IV_REG */ + NULL, /* SMN_TIMER_CTL_REG */ + NULL, /* SMN_SEC_VIO_REG */ + NULL, /* SMN_TIMER_REG */ + NULL, /* SMN_HAC_REG */ +}; + +/*****************************************************************************/ +/* fn dbg_scc_read_register() */ +/*****************************************************************************/ +/** + * Noisily read a 32-bit value to an SCC register. + * @param offset The address of the register to read. + * + * @return The register value + * */ +uint32_t dbg_scc_read_register(uint32_t offset) +{ + uint32_t value; + char *regname = scc_regnames[offset / 4]; + + value = __raw_readl(scc_base + offset); + pr_debug("SCC2 RD: 0x%03x : 0x%08x (%s) %s\n", offset, value, regname, + reg_printers[offset / 4] + ? reg_printers[offset / 4] (value, reg_print_buffer, + REG_PRINT_BUFFER_SIZE) + : ""); + + return value; +} + +/*****************************************************************************/ +/* fn dbg_scc_write_register() */ +/*****************************************************************************/ +/* + * Noisily read a 32-bit value to an SCC register. + * @param offset The address of the register to written. + * + * @param value The new register value + */ +void dbg_scc_write_register(uint32_t offset, uint32_t value) +{ + char *regname = scc_regnames[offset / 4]; + + pr_debug("SCC2 WR: 0x%03x : 0x%08x (%s) %s\n", offset, value, regname, + reg_printers[offset / 4] + ? reg_printers[offset / 4] (value, reg_print_buffer, + REG_PRINT_BUFFER_SIZE) + : ""); + (void)__raw_writel(value, scc_base + offset); + +} + +#endif /* SCC_REGISTER_DEBUG */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/Makefile @@ -0,0 +1,11 @@ +# Makefile for the Linux MXC Security API +ifeq ($( SCC_DEBUG),y) +EXTRA_CFLAGS += -DDEBUG +endif +EXTRA_CFLAGS += -DMXC -DLINUX_KERNEL + +obj-$(CONFIG_MXC_SECURITY_SCC2) += scc2_driver.o +obj-$(CONFIG_MXC_SECURITY_SCC) += mxc_scc.o +obj-$(CONFIG_MXC_SECURITY_RNG) += rng/ +obj-$(CONFIG_MXC_SAHARA) += sahara2/ +obj-$(CONFIG_MXC_DRYICE) += dryice.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/dryice.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/dryice.h @@ -0,0 +1,287 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +#ifndef __DRYICE_H__ +#define __DRYICE_H__ + + +/*! + * @file dryice.h + * @brief Definition of DryIce API. + */ + +/*! @page dryice_api DryIce API + * + * Definition of the DryIce API. + * + * The DryIce API implements a software interface to the DryIce hardware + * block. Methods are provided to store, retrieve, generate, and manage + * cryptographic keys and to monitor security tamper events. + * + * See @ref dryice_api for the DryIce API. + */ + +/*! + * This defines the SCC key length (in bits) + */ +#define SCC_KEY_LEN 168 + +/*! + * This defines the maximum key length (in bits) + */ +#define MAX_KEY_LEN 256 +#define MAX_KEY_BYTES ((MAX_KEY_LEN) / 8) +#define MAX_KEY_WORDS ((MAX_KEY_LEN) / 32) + +/*! + * @name DryIce Function Flags + */ +/*@{*/ +#define DI_FUNC_FLAG_ASYNC 0x01 /*!< do not block */ +#define DI_FUNC_FLAG_READ_LOCK 0x02 /*!< set read lock for this resource */ +#define DI_FUNC_FLAG_WRITE_LOCK 0x04 /*!< set write lock for resource */ +#define DI_FUNC_FLAG_HARD_LOCK 0x08 /*!< locks will be hard (default soft) */ +#define DI_FUNC_FLAG_WORD_KEY 0x10 /*!< key provided as 32-bit words */ +/*@}*/ + +/*! + * @name DryIce Tamper Events + */ +/*@{*/ +#define DI_TAMPER_EVENT_WTD (1 << 23) /*!< wire-mesh tampering det */ +#define DI_TAMPER_EVENT_ETBD (1 << 22) /*!< ext tampering det: input B */ +#define DI_TAMPER_EVENT_ETAD (1 << 21) /*!< ext tampering det: input A */ +#define DI_TAMPER_EVENT_EBD (1 << 20) /*!< external boot detected */ +#define DI_TAMPER_EVENT_SAD (1 << 19) /*!< security alarm detected */ +#define DI_TAMPER_EVENT_TTD (1 << 18) /*!< temperature tampering det */ +#define DI_TAMPER_EVENT_CTD (1 << 17) /*!< clock tampering det */ +#define DI_TAMPER_EVENT_VTD (1 << 16) /*!< voltage tampering det */ +#define DI_TAMPER_EVENT_MCO (1 << 3) /*!< monotonic counter overflow */ +#define DI_TAMPER_EVENT_TCO (1 << 2) /*!< time counter overflow */ +/*@}*/ + +/*! + * DryIce Key Sources + */ +typedef enum di_key { + DI_KEY_FK, /*!< the fused (IIM) key */ + DI_KEY_PK, /*!< the programmed key */ + DI_KEY_RK, /*!< the random key */ + DI_KEY_FPK, /*!< the programmed key XORed with the fused key */ + DI_KEY_FRK, /*!< the random key XORed with the fused key */ +} di_key_t; + +/*! + * DryIce Error Codes + */ +typedef enum dryice_return { + DI_SUCCESS = 0, /*!< operation was successful */ + DI_ERR_BUSY, /*!< device or resource busy */ + DI_ERR_STATE, /*!< dryice is in incompatible state */ + DI_ERR_INUSE, /*!< resource is already in use */ + DI_ERR_UNSET, /*!< resource has not been initialized */ + DI_ERR_WRITE, /*!< error occurred during register write */ + DI_ERR_INVAL, /*!< invalid argument */ + DI_ERR_FAIL, /*!< operation failed */ + DI_ERR_HLOCK, /*!< resource is hard locked */ + DI_ERR_SLOCK, /*!< resource is soft locked */ + DI_ERR_NOMEM, /*!< out of memory */ +} di_return_t; + +/*! + * These functions define the DryIce API. + */ + +/*! + * Write a given key to the Programmed Key registers in DryIce, and + * optionally lock the Programmed Key against either reading or further + * writing. The value is held until a call to the release_programmed_key + * interface is made, or until the appropriate HW reset if the write-lock + * flags are used. Unused key bits will be zeroed. + * + * @param[in] key_data A pointer to the key data to be programmed, with + * the most significant byte or word first. This + * will be interpreted as a byte pointer unless the + * WORD_KEY flag is set, in which case it will be + * treated as a word pointer and the key data will be + * read a word at a time, starting with the MSW. + * When called asynchronously, the data pointed to by + * key_data must persist until the operation completes. + * + * @param[in] key_bits The number of bits in the key to be stored. + * This must be a multiple of 8 and within the + * range of 0 and MAX_KEY_LEN. + * + * @param[in] flags This is a bit-wise OR of the flags to be passed + * to the function. Flags can include: + * ASYNC, READ_LOCK, WRITE_LOCK, HARD_LOCK, and + * WORD_KEY. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, INVAL + * on invalid arguments, INUSE if key has already been + * programmed, STATE if DryIce is in the wrong state, + * HLOCK or SLOCK if the key registers are locked for + * writing, and WRITE if a write error occurs + * (See #di_return_t). + */ +extern di_return_t dryice_set_programmed_key(const void *key_data, int key_bits, + int flags); + +/*! + * Read the Programmed Key registers and write the contents into a buffer. + * + * @param[out] key_data A byte pointer to where the key data will be written, + * with the most significant byte being written first. + * + * @param[in] key_bits The number of bits of the key to be retrieved. + * This must be a multiple of 8 and within the + * range of 0 and MAX_KEY_LEN. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, INVAL + * on invalid arguments, UNSET if key has not been + * programmed, STATE if DryIce is in the wrong state, + * and HLOCK or SLOCK if the key registers are locked for + * reading (See #di_return_t). + */ +extern di_return_t dryice_get_programmed_key(uint8_t *key_data, int key_bits); + +/*! + * Allow the set_programmed_key interface to be used to write a new + * Programmed Key to DryIce. Note that this interface does not overwrite + * the value in the Programmed Key registers. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, + * UNSET if the key has not been previously set, and + * HLOCK or SLOCK if the key registers are locked for + * writing (See #di_return_t). + */ +extern di_return_t dryice_release_programmed_key(void); + +/*! + * Generate and load a new Random Key in DryIce, and optionally lock the + * Random Key against further change. + * + * @param[in] flags This is a bit-wise OR of the flags to be passed + * to the function. Flags can include: + * ASYNC, READ_LOCK, WRITE_LOCK, and HARD_LOCK. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, STATE + * if DryIce is in the wrong state, FAIL if the key gen + * failed, HLOCK or SLOCK if the key registers are + * locked, and WRITE if a write error occurs + * (See #di_return_t). + */ +extern di_return_t dryice_set_random_key(int flags); + +/*! + * Set the key selection in DryIce to determine the key used by an + * encryption module such as SCC. The selection is held until a call to the + * Release Selected Key interface is made, or until the appropriate HW + * reset if the LOCK flags are used. + * + * @param[in] key The source of the key to be used by the SCC + * (See #di_key_t). + * + * @param[in] flags This is a bit-wise OR of the flags to be passed + * to the function. Flags can include: + * ASYNC, WRITE_LOCK, and HARD_LOCK. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, INVAL + * on invalid arguments, INUSE if a selection has already + * been made, STATE if DryIce is in the wrong state, + * HLOCK or SLOCK if the selection register is locked, + * and WRITE if a write error occurs + */ +extern di_return_t dryice_select_key(di_key_t key, int flags); + +/*! + * Check which key will be used in the SCC. This is needed because in some + * DryIce states, the Key Select Register is overridden by a default value + * (the Fused/IIM key). + * + * @param[out] key The source of the key that is currently selected for + * use by the SCC. This may be different from the key + * specified by the dryice_select_key function + * (See #di_key_t). This value is set even if an error + * code (except for BUSY) is returned. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, STATE if + * DryIce is in the wrong state, INVAL on invalid + * arguments, or UNSET if no key has been selected + * (See #di_return_t). + */ +extern di_return_t dryice_check_key(di_key_t *key); + +/*! + * Allow the dryice_select_key interface to be used to set a new key selection + * in DryIce. Note that this interface does not overwrite the value in DryIce. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, UNSET + * if the no selection has been made previously, and + * HLOCK or SLOCK if the selection register is locked + * (See #di_return_t). + */ +extern di_return_t dryice_release_key_selection(void); + +/*! + * Returns tamper-detection status bits. Also an optional timestamp when + * DryIce is in the Non-valid state. If DryIce is not in Failure or Non-valid + * state, this interface returns a failure code. + * + * @param[out] events This is a bit-wise OR of the following events: + * WTD (Wire Mesh), ETBD (External Tamper B), + * ETAD (External Tamper A), EBD (External Boot), + * SAD (Security Alarm), TTD (Temperature Tamper), + * CTD (Clock Tamper), VTD (Voltage Tamper), + * MCO (Monolithic Counter Overflow), and + * TCO (Time Counter Overflow). + * + * @param[out] timestamp This is the value of the time counter in seconds + * when the tamper occurred. A timestamp will not be + * returned if a NULL pointer is specified. If DryIce + * is not in the Non-valid state the time cannot be + * read, so a timestamp of 0 will be returned. + * + * @param[in] flags This is a bit-wise OR of the flags to be passed + * to the function. Flags is ignored currently by + * this function. + * + * @return Returns SUCCESS (0), BUSY if DryIce is busy, and + * INVAL on invalid arguments (See #di_return_t). + */ +extern di_return_t +dryice_get_tamper_event(uint32_t *events, uint32_t *timestamp, int flags); + +/*! + * Provide a callback function to be called upon the completion of DryIce calls + * that are executed asynchronously. + * + * @param[in] func This is a pointer to a function of type: + * void callback(di_return_t rc, unsigned long cookie) + * The return code of the async function is passed + * back in "rc" along with the cookie provided when + * registering the callback. + * + * @param[in] cookie This is an "opaque" cookie of type unsigned long that + * is returned on subsequent callbacks. It may be of any + * value. + * + * @return Returns SUCCESS (0), or BUSY if DryIce is busy + * (See #di_return_t). + */ +extern di_return_t dryice_register_callback(void (*func)(di_return_t rc, + unsigned long cookie), + unsigned long cookie); + +#endif /* __DRYICE_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/dryice.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/dryice.c @@ -0,0 +1,1123 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +#undef DI_DEBUG /* enable debug messages */ +#undef DI_DEBUG_REGIO /* show register read/write */ +#undef DI_TESTING /* include test code */ + +#ifdef DI_DEBUG +#define di_debug(fmt, arg...) os_printk(KERN_INFO fmt, ##arg) +#else +#define di_debug(fmt, arg...) do {} while (0) +#endif + +#define di_info(fmt, arg...) os_printk(KERN_INFO fmt, ##arg) +#define di_warn(fmt, arg...) os_printk(KERN_WARNING fmt, ##arg) + +#include "sahara2/include/portable_os.h" +#include "dryice.h" +#include "dryice-regs.h" + +/* mask of the lock-related function flags */ +#define DI_FUNC_LOCK_FLAGS (DI_FUNC_FLAG_READ_LOCK | \ + DI_FUNC_FLAG_WRITE_LOCK | \ + DI_FUNC_FLAG_HARD_LOCK) + +/* + * dryice hardware states + */ +enum di_states { + DI_STATE_VALID = 0, + DI_STATE_NON_VALID, + DI_STATE_FAILURE, +}; + +/* + * todo list actions + */ +enum todo_actions { + TODO_ACT_WRITE_VAL, + TODO_ACT_WRITE_PTR, + TODO_ACT_WRITE_PTR32, + TODO_ACT_ASSIGN, + TODO_ACT_WAIT_RKG, +}; + +/* + * todo list status + */ +enum todo_status { + TODO_ST_LOADING, + TODO_ST_READY, + TODO_ST_PEND_WCF, + TODO_ST_PEND_RKG, + TODO_ST_DONE, +}; + +OS_DEV_INIT_DCL(dryice_init) +OS_DEV_SHUTDOWN_DCL(dryice_exit) +OS_DEV_ISR_DCL(dryice_norm_irq) +OS_WAIT_OBJECT(done_queue); +OS_WAIT_OBJECT(exit_queue); + +struct dryice_data { + int busy; /* enforce exclusive access */ + os_lock_t busy_lock; + int exit_flag; /* don't start new operations */ + + uint32_t baseaddr; /* physical base address */ + void *ioaddr; /* virtual base address */ + + /* interrupt handling */ + struct irq_struct { + os_interrupt_id_t irq; + int set; + } irq_norm, irq_sec; + + struct clk *clk; /* clock control */ + + int key_programmed; /* key has been programmed */ + int key_selected; /* key has been selected */ + + /* callback function and cookie */ + void (*cb_func)(di_return_t rc, unsigned long cookie); + unsigned long cb_cookie; +} *di = NULL; + +#define TODO_LIST_LEN 12 +static struct { + struct td { + enum todo_actions action; + uint32_t src; + uint32_t dst; + int num; + } list[TODO_LIST_LEN]; + int cur; /* current todo pointer */ + int num; /* number of todo's on the list */ + int async; /* non-zero if list is async */ + int status; /* current status of the list */ + di_return_t rc; /* return code generated by the list */ +} todo; + +/* + * dryice register read/write functions + */ +#ifdef DI_DEBUG_REGIO +static uint32_t di_read(int reg) +{ + uint32_t val = os_read32(di->ioaddr + (reg)); + di_info("di_read(0x%02x) = 0x%08x\n", reg, val); + + return val; +} + +static void di_write(uint32_t val, int reg) +{ + di_info("dryice_write_reg(0x%08x, 0x%02x)\n", val, reg); + os_write32(di->ioaddr + (reg), val); +} +#else +#define di_read(reg) os_read32(di->ioaddr + (reg)) +#define di_write(val, reg) os_write32(di->ioaddr + (reg), val); +#endif + +/* + * set the dryice busy flag atomically, allowing + * for case where the driver is trying to exit. + */ +static int di_busy_set(void) +{ + os_lock_context_t context; + int rc = 0; + + os_lock_save_context(di->busy_lock, context); + if (di->exit_flag || di->busy) + rc = 1; + else + di->busy = 1; + os_unlock_restore_context(di->busy_lock, context); + + return rc; +} + +/* + * clear the dryice busy flag + */ +static inline void di_busy_clear(void) +{ + /* don't acquire the lock because the race is benign */ + di->busy = 0; + + if (di->exit_flag) + os_wake_sleepers(exit_queue); +} + +/* + * return the current state of dryice + * (valid, non-valid, or failure) + */ +static enum di_states di_state(void) +{ + enum di_states state = DI_STATE_VALID; + uint32_t dsr = di_read(DSR); + + if (dsr & DSR_NVF) + state = DI_STATE_NON_VALID; + else if (dsr & DSR_SVF) + state = DI_STATE_FAILURE; + + return state; +} + +#define DI_WRITE_LOOP_CNT 0x1000 +/* + * the write-error flag is something that shouldn't get set + * during normal operation. if it's set something is terribly + * wrong. the best we can do is try to clear the bit and hope + * that dryice will recover. this situation is similar to an + * unexpected bus fault in terms of severity. + */ +static void try_to_clear_wef(void) +{ + int cnt; + + while (1) { + di_write(DSR_WEF, DSR); + for (cnt = 0; cnt < DI_WRITE_LOOP_CNT; cnt++) { + if ((di_read(DSR) & DSR_WEF) == 0) + break; + } + di_warn("WARNING: DryIce cannot clear DSR_WEF " + "(Write Error Flag)!\n"); + } +} + +/* + * write a dryice register and loop, waiting for it + * to complete. use only during driver initialization. + * returns 0 on success or 1 on write failure. + */ +static int di_write_loop(uint32_t val, int reg) +{ + int rc = 0; + int cnt; + + di_debug("FUNC: %s\n", __func__); + di_write(val, reg); + + for (cnt = 0; cnt < DI_WRITE_LOOP_CNT; cnt++) { + uint32_t dsr = di_read(DSR); + if (dsr & DSR_WEF) { + try_to_clear_wef(); + rc = 1; + } + if (dsr & DSR_WCF) + break; + } + di_debug("wait_write_loop looped %d times\n", cnt); + if (cnt == DI_WRITE_LOOP_CNT) + rc = 1; + + if (rc) + di_warn("DryIce wait_write_done: WRITE ERROR!\n"); + return rc; +} + +/* + * initialize the todo list. must be called + * before adding items to the list. + */ +static void todo_init(int async_flag) +{ + di_debug("FUNC: %s\n", __func__); + todo.cur = 0; + todo.num = 0; + todo.async = async_flag; + todo.rc = 0; + todo.status = TODO_ST_LOADING; +} + +/* + * perform the current action on the todo list + */ +#define TC todo.list[todo.cur] +void todo_cur(void) +{ + di_debug("FUNC: %s[%d]\n", __func__, todo.cur); + switch (TC.action) { + case TODO_ACT_WRITE_VAL: + di_debug(" TODO_ACT_WRITE_VAL\n"); + /* enable the write-completion interrupt */ + todo.status = TODO_ST_PEND_WCF; + di_write(di_read(DIER) | DIER_WCIE, DIER); + + di_write(TC.src, TC.dst); + break; + + case TODO_ACT_WRITE_PTR32: + di_debug(" TODO_ACT_WRITE_PTR32\n"); + /* enable the write-completion interrupt */ + todo.status = TODO_ST_PEND_WCF; + di_write(di_read(DIER) | DIER_WCIE, DIER); + + di_write(*(uint32_t *)TC.src, TC.dst); + break; + + case TODO_ACT_WRITE_PTR: + { + uint8_t *p = (uint8_t *)TC.src; + uint32_t val = 0; + int num = TC.num; + + di_debug(" TODO_ACT_WRITE_PTR\n"); + while (num--) + val = (val << 8) | *p++; + + /* enable the write-completion interrupt */ + todo.status = TODO_ST_PEND_WCF; + di_write(di_read(DIER) | DIER_WCIE, DIER); + + di_write(val, TC.dst); + } + break; + + case TODO_ACT_ASSIGN: + di_debug(" TODO_ACT_ASSIGN\n"); + switch (TC.num) { + case 1: + *(uint8_t *)TC.dst = TC.src; + break; + case 2: + *(uint16_t *)TC.dst = TC.src; + break; + case 4: + *(uint32_t *)TC.dst = TC.src; + break; + default: + di_warn("Unexpected size in TODO_ACT_ASSIGN\n"); + break; + } + break; + + case TODO_ACT_WAIT_RKG: + di_debug(" TODO_ACT_WAIT_RKG\n"); + /* enable the random-key interrupt */ + todo.status = TODO_ST_PEND_RKG; + di_write(di_read(DIER) | DIER_RKIE, DIER); + break; + + default: + di_debug(" TODO_ACT_NOOP\n"); + break; + } +} + +/* + * called when done with the todo list. + * if async, it does the callback. + * if blocking, it wakes up the caller. + */ +static void todo_done(di_return_t rc) +{ + todo.rc = rc; + todo.status = TODO_ST_DONE; + if (todo.async) { + di_busy_clear(); + if (di->cb_func) + di->cb_func(rc, di->cb_cookie); + } else + os_wake_sleepers(done_queue); +} + +/* + * performs the actions sequentially from the todo list + * until it encounters an item that isn't ready. + */ +static void todo_run(void) +{ + di_debug("FUNC: %s\n", __func__); + while (todo.status == TODO_ST_READY) { + if (todo.cur == todo.num) { + todo_done(0); + break; + } + todo_cur(); + if (todo.status != TODO_ST_READY) + break; + todo.cur++; + } +} + +/* + * kick off the todo list by making it ready + */ +static void todo_start(void) +{ + di_debug("FUNC: %s\n", __func__); + todo.status = TODO_ST_READY; + todo_run(); +} + +/* + * blocking callers sleep here until the todo list is done + */ +static int todo_wait_done(void) +{ + di_debug("FUNC: %s\n", __func__); + os_sleep(done_queue, todo.status == TODO_ST_DONE, 0); + + return todo.rc; +} + +/* + * add a dryice register write to the todo list. + * the value to be written is supplied. + */ +#define todo_write_val(val, reg) \ + todo_add(TODO_ACT_WRITE_VAL, val, reg, 0) + +/* + * add a dryice register write to the todo list. + * "size" bytes pointed to by addr will be written. + */ +#define todo_write_ptr(addr, reg, size) \ + todo_add(TODO_ACT_WRITE_PTR, (uint32_t)addr, reg, size) + +/* + * add a dryice register write to the todo list. + * the word pointed to by addr will be written. + */ +#define todo_write_ptr32(addr, reg) \ + todo_add(TODO_ACT_WRITE_PTR32, (uint32_t)addr, reg, 0) + +/* + * add a dryice memory write to the todo list. + * object can only have a size of 1, 2, or 4 bytes. + */ +#define todo_assign(var, val) \ + todo_add(TODO_ACT_ASSIGN, val, (uint32_t)&(var), sizeof(var)) + +#define todo_wait_rkg() \ + todo_add(TODO_ACT_WAIT_RKG, 0, 0, 0) + +static void todo_add(int action, uint32_t src, uint32_t dst, int num) +{ + struct td *p = &todo.list[todo.num]; + + di_debug("FUNC: %s\n", __func__); + if (todo.num == TODO_LIST_LEN) { + di_warn("WARNING: DryIce todo-list overflow!\n"); + return; + } + p->action = action; + p->src = src; + p->dst = dst; + p->num = num; + todo.num++; +} + +#if defined(DI_DEBUG) || defined(DI_TESTING) +/* + * print out the contents of the dryice status register + * with all the bits decoded + */ +static void show_dsr(const char *heading) +{ + uint32_t dsr = di_read(DSR); + + di_info("%s\n", heading); + if (dsr & DSR_TAMPER_BITS) { + if (dsr & DSR_WTD) + di_info("Wire-mesh Tampering Detected\n"); + if (dsr & DSR_ETBD) + di_info("External Tampering B Detected\n"); + if (dsr & DSR_ETAD) + di_info("External Tampering A Detected\n"); + if (dsr & DSR_EBD) + di_info("External Boot Detected\n"); + if (dsr & DSR_SAD) + di_info("Security Alarm Detected\n"); + if (dsr & DSR_TTD) + di_info("Temperature Tampering Detected\n"); + if (dsr & DSR_CTD) + di_info("Clock Tampering Detected\n"); + if (dsr & DSR_VTD) + di_info("Voltage Tampering Detected\n"); + if (dsr & DSR_MCO) + di_info("Monotonic Counter Overflow\n"); + if (dsr & DSR_TCO) + di_info("Time Counter Overflow\n"); + } else + di_info("No Tamper Events Detected\n"); + + di_info("%d Key Busy Flag\n", !!(dsr & DSR_KBF)); + di_info("%d Write Busy Flag\n", !!(dsr & DSR_WBF)); + di_info("%d Write Next Flag\n", !!(dsr & DSR_WNF)); + di_info("%d Write Complete Flag\n", !!(dsr & DSR_WCF)); + di_info("%d Write Error Flag\n", !!(dsr & DSR_WEF)); + di_info("%d Random Key Error\n", !!(dsr & DSR_RKE)); + di_info("%d Random Key Valid\n", !!(dsr & DSR_RKV)); + di_info("%d Clock Alarm Flag\n", !!(dsr & DSR_CAF)); + di_info("%d Non-Valid Flag\n", !!(dsr & DSR_NVF)); + di_info("%d Security Violation Flag\n", !!(dsr & DSR_SVF)); +} + +/* + * print out a key in hex + */ +static void print_key(const char *tag, uint8_t *key, int bits) +{ + int bytes = (bits + 7) / 8; + + di_info("%s", tag); + while (bytes--) + os_printk("%02x", *key++); + os_printk("\n"); +} +#endif /* defined(DI_DEBUG) || defined(DI_TESTING) */ + +/* + * dryice normal interrupt service routine + */ +OS_DEV_ISR(dryice_norm_irq) +{ + /* save dryice status register */ + uint32_t dsr = di_read(DSR); + + if (dsr & DSR_WCF) { + /* disable the write-completion interrupt */ + di_write(di_read(DIER) & ~DIER_WCIE, DIER); + + if (todo.status == TODO_ST_PEND_WCF) { + if (dsr & DSR_WEF) { + try_to_clear_wef(); + todo_done(DI_ERR_WRITE); + } else { + todo.cur++; + todo.status = TODO_ST_READY; + todo_run(); + } + } + } else if (dsr & (DSR_RKV | DSR_RKE)) { + /* disable the random-key-gen interrupt */ + di_write(di_read(DIER) & ~DIER_RKIE, DIER); + + if (todo.status == TODO_ST_PEND_RKG) { + if (dsr & DSR_RKE) + todo_done(DI_ERR_FAIL); + else { + todo.cur++; + todo.status = TODO_ST_READY; + todo_run(); + } + } + } + + os_dev_isr_return(1); +} + +/* write loop with error handling -- for init only */ +#define di_write_loop_goto(val, reg, rc, label) \ + do {if (di_write_loop(val, reg)) \ + {rc = OS_ERROR_FAIL_S; goto label; } } while (0) + +/* + * dryice driver initialization + */ +OS_DEV_INIT(dryice_init) +{ + di_return_t rc = 0; + + di_info("MXC DryIce driver\n"); + + /* allocate memory */ + di = os_alloc_memory(sizeof(*di), GFP_KERNEL); + if (di == NULL) { + rc = OS_ERROR_NO_MEMORY_S; + goto err_alloc; + } + memset(di, 0, sizeof(*di)); + di->baseaddr = DRYICE_BASE_ADDR; + di->irq_norm.irq = MXC_INT_DRYICE_NORM; + di->irq_sec.irq = MXC_INT_DRYICE_SEC; + + /* map i/o registers */ + di->ioaddr = os_map_device(di->baseaddr, DI_ADDRESS_RANGE); + if (di->ioaddr == NULL) { + rc = OS_ERROR_FAIL_S; + goto err_iomap; + } + + /* allocate locks */ + di->busy_lock = os_lock_alloc_init(); + if (di->busy_lock == NULL) { + rc = OS_ERROR_NO_MEMORY_S; + goto err_locks; + } + + /* enable clocks (is there a portable way to do this?) */ + di->clk = clk_get(NULL, "dryice_clk"); + clk_enable(di->clk); + + /* register for interrupts */ + /* os_register_interrupt() dosen't support an option to make the + interrupt as shared. Replaced it with request_irq().*/ + rc = request_irq(di->irq_norm.irq, dryice_norm_irq, IRQF_SHARED, + "dry_ice", di); + if (rc) + goto err_irqs; + else + di->irq_norm.set = 1; + + /* + * DRYICE HARDWARE INIT + */ + +#ifdef DI_DEBUG + show_dsr("DSR Pre-Initialization State"); +#endif + + if (di_state() == DI_STATE_NON_VALID) { + uint32_t dsr = di_read(DSR); + + di_debug("initializing from non-valid state\n"); + + /* clear security violation flag */ + if (dsr & DSR_SVF) + di_write_loop_goto(DSR_SVF, DSR, rc, err_write); + + /* clear tamper detect flags */ + if (dsr & DSR_TAMPER_BITS) + di_write_loop_goto(DSR_TAMPER_BITS, DSR, rc, err_write); + + /* initialize timers */ + di_write_loop_goto(0, DTCLR, rc, err_write); + di_write_loop_goto(0, DTCMR, rc, err_write); + di_write_loop_goto(0, DMCR, rc, err_write); + + /* clear non-valid flag */ + di_write_loop_goto(DSR_NVF, DSR, rc, err_write); + } + + /* set tamper events we are interested in watching */ + di_write_loop_goto(DTCR_WTE | DTCR_ETBE | DTCR_ETAE, DTCR, rc, + err_write); +#ifdef DI_DEBUG + show_dsr("DSR Post-Initialization State"); +#endif + os_dev_init_return(OS_ERROR_OK_S); + +err_write: + /* unregister interrupts */ + if (di->irq_norm.set) + os_deregister_interrupt(di->irq_norm.irq); + if (di->irq_sec.set) + os_deregister_interrupt(di->irq_sec.irq); + + /* turn off clocks (is there a portable way to do this?) */ + clk_disable(di->clk); + clk_put(di->clk); + +err_irqs: + /* unallocate locks */ + os_lock_deallocate(di->busy_lock); + +err_locks: + /* unmap i/o registers */ + os_unmap_device(di->ioaddr, DI_ADDRESS_RANGE); + +err_iomap: + /* free the dryice struct */ + os_free_memory(di); + +err_alloc: + os_dev_init_return(rc); +} + +/* + * dryice driver exit routine + */ +OS_DEV_SHUTDOWN(dryice_exit) +{ + /* don't allow new operations */ + di->exit_flag = 1; + + /* wait for the current operation to complete */ + os_sleep(exit_queue, di->busy == 0, 0); + + /* unregister interrupts */ + if (di->irq_norm.set) + os_deregister_interrupt(di->irq_norm.irq); + if (di->irq_sec.set) + os_deregister_interrupt(di->irq_sec.irq); + + /* turn off clocks (is there a portable way to do this?) */ + clk_disable(di->clk); + clk_put(di->clk); + + /* unallocate locks */ + os_lock_deallocate(di->busy_lock); + + /* unmap i/o registers */ + os_unmap_device(di->ioaddr, DI_ADDRESS_RANGE); + + /* free the dryice struct */ + os_free_memory(di); + + os_dev_shutdown_return(OS_ERROR_OK_S); +} + +di_return_t dryice_set_programmed_key(const void *key_data, int key_bits, + int flags) +{ + uint32_t dcr; + int key_bytes, reg; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (key_data == NULL) { + rc = DI_ERR_INVAL; + goto err; + } + if (key_bits < 0 || key_bits > MAX_KEY_LEN || key_bits % 8) { + rc = DI_ERR_INVAL; + goto err; + } + if (flags & DI_FUNC_FLAG_WORD_KEY) { + if (key_bits % 32 || (uint32_t)key_data & 0x3) { + rc = DI_ERR_INVAL; + goto err; + } + } + if (di->key_programmed) { + rc = DI_ERR_INUSE; + goto err; + } + if (di_state() == DI_STATE_FAILURE) { + rc = DI_ERR_STATE; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_PKWHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_PKWSL) { + rc = DI_ERR_SLOCK; + goto err; + } + key_bytes = key_bits / 8; + + todo_init((flags & DI_FUNC_FLAG_ASYNC) != 0); + + /* accomodate busses that can only do 32-bit transfers */ + if (flags & DI_FUNC_FLAG_WORD_KEY) { + uint32_t *keyp = (void *)key_data; + + for (reg = 0; reg < MAX_KEY_WORDS; reg++) { + if (reg < MAX_KEY_WORDS - key_bytes / 4) + todo_write_val(0, DPKR7 - reg * 4); + else { + todo_write_ptr32(keyp, DPKR7 - reg * 4); + keyp++; + } + } + } else { + uint8_t *keyp = (void *)key_data; + + for (reg = 0; reg < MAX_KEY_WORDS; reg++) { + int size = key_bytes - (MAX_KEY_WORDS - reg - 1) * 4; + if (size <= 0) + todo_write_val(0, DPKR7 - reg * 4); + else { + if (size > 4) + size = 4; + todo_write_ptr(keyp, DPKR7 - reg * 4, size); + keyp += size; + } + } + } + todo_assign(di->key_programmed, 1); + + if (flags & DI_FUNC_LOCK_FLAGS) { + dcr = di_read(DCR); + if (flags & DI_FUNC_FLAG_READ_LOCK) { + if (flags & DI_FUNC_FLAG_HARD_LOCK) + dcr |= DCR_PKRHL; + else + dcr |= DCR_PKRSL; + } + if (flags & DI_FUNC_FLAG_WRITE_LOCK) { + if (flags & DI_FUNC_FLAG_HARD_LOCK) + dcr |= DCR_PKWHL; + else + dcr |= DCR_PKWSL; + } + todo_write_val(dcr, DCR); + } + todo_start(); + + if (flags & DI_FUNC_FLAG_ASYNC) + return 0; + + rc = todo_wait_done(); +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_set_programmed_key); + +di_return_t dryice_get_programmed_key(uint8_t *key_data, int key_bits) +{ + int reg, byte, key_bytes; + uint32_t dcr, dpkr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (key_data == NULL) { + rc = DI_ERR_INVAL; + goto err; + } + if (key_bits < 0 || key_bits > MAX_KEY_LEN || key_bits % 8) { + rc = DI_ERR_INVAL; + goto err; + } + #if 0 + if (!di->key_programmed) { + rc = DI_ERR_UNSET; + goto err; + } + #endif + if (di_state() == DI_STATE_FAILURE) { + rc = DI_ERR_STATE; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_PKRHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_PKRSL) { + rc = DI_ERR_SLOCK; + goto err; + } + key_bytes = key_bits / 8; + + /* read key */ + for (reg = 0; reg < MAX_KEY_WORDS; reg++) { + if (reg < (MAX_KEY_BYTES - key_bytes) / 4) + continue; + dpkr = di_read(DPKR7 - reg * 4); + + for (byte = 0; byte < 4; byte++) { + if (reg * 4 + byte >= MAX_KEY_BYTES - key_bytes) { + int shift = 24 - byte * 8; + *key_data++ = (dpkr >> shift) & 0xff; + } + } + dpkr = 0; /* cleared for security */ + } +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_get_programmed_key); + +di_return_t dryice_release_programmed_key(void) +{ + uint32_t dcr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (!di->key_programmed) { + rc = DI_ERR_UNSET; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_PKWHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_PKWSL) { + rc = DI_ERR_SLOCK; + goto err; + } + di->key_programmed = 0; + +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_release_programmed_key); + +di_return_t dryice_set_random_key(int flags) +{ + uint32_t dcr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (di_state() == DI_STATE_FAILURE) { + rc = DI_ERR_STATE; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_RKHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_RKSL) { + rc = DI_ERR_SLOCK; + goto err; + } + todo_init((flags & DI_FUNC_FLAG_ASYNC) != 0); + + /* clear Random Key Error bit, if set */ + if (di_read(DSR) & DSR_RKE) + todo_write_val(DSR_RKE, DCR); + + /* load random key */ + todo_write_val(DKCR_LRK, DKCR); + + /* wait for RKV (valid) or RKE (error) */ + todo_wait_rkg(); + + if (flags & DI_FUNC_LOCK_FLAGS) { + dcr = di_read(DCR); + if (flags & DI_FUNC_FLAG_WRITE_LOCK) { + if (flags & DI_FUNC_FLAG_HARD_LOCK) + dcr |= DCR_RKHL; + else + dcr |= DCR_RKSL; + } + todo_write_val(dcr, DCR); + } + todo_start(); + + if (flags & DI_FUNC_FLAG_ASYNC) + return 0; + + rc = todo_wait_done(); +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_set_random_key); + +di_return_t dryice_select_key(di_key_t key, int flags) +{ + uint32_t dcr, dksr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + switch (key) { + case DI_KEY_FK: + dksr = DKSR_IIM_KEY; + break; + case DI_KEY_PK: + dksr = DKSR_PROG_KEY; + break; + case DI_KEY_RK: + dksr = DKSR_RAND_KEY; + break; + case DI_KEY_FPK: + dksr = DKSR_PROG_XOR_IIM_KEY; + break; + case DI_KEY_FRK: + dksr = DKSR_RAND_XOR_IIM_KEY; + break; + default: + rc = DI_ERR_INVAL; + goto err; + } + if (di->key_selected) { + rc = DI_ERR_INUSE; + goto err; + } + if (di_state() != DI_STATE_VALID) { + rc = DI_ERR_STATE; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_KSHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_KSSL) { + rc = DI_ERR_SLOCK; + goto err; + } + todo_init((flags & DI_FUNC_FLAG_ASYNC) != 0); + + /* select key */ + todo_write_val(dksr, DKSR); + + todo_assign(di->key_selected, 1); + + if (flags & DI_FUNC_LOCK_FLAGS) { + dcr = di_read(DCR); + if (flags & DI_FUNC_FLAG_WRITE_LOCK) { + if (flags & DI_FUNC_FLAG_HARD_LOCK) + dcr |= DCR_KSHL; + else + dcr |= DCR_KSSL; + } + todo_write_val(dcr, DCR); + } + todo_start(); + + if (flags & DI_FUNC_FLAG_ASYNC) + return 0; + + rc = todo_wait_done(); +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_select_key); + +di_return_t dryice_check_key(di_key_t *key) +{ + uint32_t dksr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (key == NULL) { + rc = DI_ERR_INVAL; + goto err; + } + + dksr = di_read(DKSR); + + if (di_state() != DI_STATE_VALID) { + dksr = DKSR_IIM_KEY; + rc = DI_ERR_STATE; + } else if (dksr == DI_KEY_RK || dksr == DI_KEY_FRK) { + if (!(di_read(DSR) & DSR_RKV)) { + dksr = DKSR_IIM_KEY; + rc = DI_ERR_UNSET; + } + } + switch (dksr) { + case DKSR_IIM_KEY: + *key = DI_KEY_FK; + break; + case DKSR_PROG_KEY: + *key = DI_KEY_PK; + break; + case DKSR_RAND_KEY: + *key = DI_KEY_RK; + break; + case DKSR_PROG_XOR_IIM_KEY: + *key = DI_KEY_FPK; + break; + case DKSR_RAND_XOR_IIM_KEY: + *key = DI_KEY_FRK; + break; + } +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_check_key); + +di_return_t dryice_release_key_selection(void) +{ + uint32_t dcr; + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (!di->key_selected) { + rc = DI_ERR_UNSET; + goto err; + } + dcr = di_read(DCR); + if (dcr & DCR_KSHL) { + rc = DI_ERR_HLOCK; + goto err; + } + if (dcr & DCR_KSSL) { + rc = DI_ERR_SLOCK; + goto err; + } + di->key_selected = 0; + +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_release_key_selection); + +di_return_t dryice_get_tamper_event(uint32_t *events, uint32_t *timestamp, + int flags) +{ + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + if (di_state() == DI_STATE_VALID) { + rc = DI_ERR_STATE; + goto err; + } + if (events == NULL) { + rc = DI_ERR_INVAL; + goto err; + } + *events = di_read(DSR) & DSR_TAMPER_BITS; + if (timestamp) { + if (di_state() == DI_STATE_NON_VALID) + *timestamp = di_read(DTCMR); + else + *timestamp = 0; + } +err: + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_get_tamper_event); + +di_return_t dryice_register_callback(void (*func)(di_return_t, + unsigned long cookie), + unsigned long cookie) +{ + di_return_t rc = 0; + + if (di_busy_set()) + return DI_ERR_BUSY; + + di->cb_func = func; + di->cb_cookie = cookie; + + di_busy_clear(); + return rc; +} +EXTERN_SYMBOL(dryice_register_callback); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("DryIce"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/shw_driver.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/shw_driver.c @@ -0,0 +1,2335 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! @file shw_driver.c + * + * This is the user-mode driver code for the FSL Security Hardware (SHW) API. + * as well as the 'common' FSL SHW API code for kernel API users. + * + * Its interaction with the Linux kernel is from calls to shw_init() when the + * driver is loaded, and shw_shutdown() should the driver be unloaded. + * + * The User API (driver interface) is handled by the following functions: + * @li shw_open() - handles open() system call on FSL SHW device + * @li shw_release() - handles close() system call on FSL SHW device + * @li shw_ioctl() - handles ioctl() system call on FSL SHW device + * + * The driver also provides the following functions for kernel users of the FSL + * SHW API: + * @li fsl_shw_register_user() + * @li fsl_shw_deregister_user() + * @li fsl_shw_get_capabilities() + * @li fsl_shw_get_results() + * + * All other functions are internal to the driver. + * + * The life of the driver starts at boot (or module load) time, with a call by + * the kernel to shw_init(). + * + * The life of the driver ends when the kernel is shutting down (or the driver + * is being unloaded). At this time, shw_shutdown() is called. No function + * will ever be called after that point. + * + * In the case that the driver is reloaded, a new copy of the driver, with + * fresh global values, etc., is loaded, and there will be a new call to + * shw_init(). + * + * In user mode, the user's fsl_shw_register_user() call causes an open() event + * on the driver followed by a ioctl() with the registration information. Any + * subsequent API calls by the user are handled through the ioctl() function + * and shuffled off to the appropriate routine (or driver) for service. The + * fsl_shw_deregister_user() call by the user results in a close() function + * call on the driver. + * + * In kernel mode, the driver provides the functions fsl_shw_register_user(), + * fsl_shw_deregister_user(), fsl_shw_get_capabilities(), and + * fsl_shw_get_results(). Other parts of the API are provided by other + * drivers, if available, to support the cryptographic functions. + */ + +#include "portable_os.h" +#include "fsl_shw.h" +#include "fsl_shw_keystore.h" + +#include "shw_internals.h" + +#ifdef FSL_HAVE_SCC2 +#include +#else +#include +#endif + +#ifdef SHW_DEBUG +#include +#endif + +/****************************************************************************** + * + * Function Declarations + * + *****************************************************************************/ + +/* kernel interface functions */ +OS_DEV_INIT_DCL(shw_init); +OS_DEV_SHUTDOWN_DCL(shw_shutdown); +OS_DEV_IOCTL_DCL(shw_ioctl); +OS_DEV_MMAP_DCL(shw_mmap); + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_smalloc); +EXPORT_SYMBOL(fsl_shw_sfree); +EXPORT_SYMBOL(fsl_shw_sstatus); +EXPORT_SYMBOL(fsl_shw_diminish_perms); +EXPORT_SYMBOL(do_scc_encrypt_region); +EXPORT_SYMBOL(do_scc_decrypt_region); + +EXPORT_SYMBOL(do_system_keystore_slot_alloc); +EXPORT_SYMBOL(do_system_keystore_slot_dealloc); +EXPORT_SYMBOL(do_system_keystore_slot_load); +EXPORT_SYMBOL(do_system_keystore_slot_encrypt); +EXPORT_SYMBOL(do_system_keystore_slot_decrypt); +#endif + +static os_error_code +shw_handle_scc_sfree(fsl_shw_uco_t * user_ctx, uint32_t info); + +static os_error_code +shw_handle_scc_sstatus(fsl_shw_uco_t * user_ctx, uint32_t info); + +static os_error_code +shw_handle_scc_drop_perms(fsl_shw_uco_t * user_ctx, uint32_t info); + +static os_error_code +shw_handle_scc_encrypt(fsl_shw_uco_t * user_ctx, uint32_t info); + +static os_error_code +shw_handle_scc_decrypt(fsl_shw_uco_t * user_ctx, uint32_t info); + +#ifdef FSL_HAVE_SCC2 +static fsl_shw_return_t register_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base, + void *kernel_base); +static fsl_shw_return_t deregister_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base); +void *lookup_user_partition(fsl_shw_uco_t * user_ctx, uint32_t user_base); + +#endif /* FSL_HAVE_SCC2 */ + +/****************************************************************************** + * + * Global / Static Variables + * + *****************************************************************************/ + +/*! + * Major node (user/device interaction value) of this driver. + */ +static int shw_major_node = SHW_MAJOR_NODE; + +/*! + * Flag to know whether the driver has been associated with its user device + * node (e.g. /dev/shw). + */ +static int shw_device_registered = 0; + +/*! + * OS-dependent handle used for registering user interface of a driver. + */ +static os_driver_reg_t reg_handle; + +/*! + * Linked List of registered users of the API + */ +fsl_shw_uco_t *user_list; + +/*! + * This is the lock for all user request pools. H/W component drivers may also + * use it for their own work queues. + */ +os_lock_t shw_queue_lock = NULL; + +/* This is the system keystore object */ +fsl_shw_kso_t system_keystore; + +#ifndef FSL_HAVE_SAHARA +/*! Empty list of supported symmetric algorithms. */ +static fsl_shw_key_alg_t pf_syms[] = { +}; + +/*! Empty list of supported symmetric modes. */ +static fsl_shw_sym_mode_t pf_modes[] = { +}; + +/*! Empty list of supported hash algorithms. */ +static fsl_shw_hash_alg_t pf_hashes[] = { +}; +#endif /* no Sahara */ + +/*! This matches SHW capabilities... */ +static fsl_shw_pco_t cap = { + 1, 3, /* api version number - major & minor */ + 2, 3, /* driver version number - major & minor */ + sizeof(pf_syms) / sizeof(fsl_shw_key_alg_t), /* key alg count */ + pf_syms, /* key alg list ptr */ + sizeof(pf_modes) / sizeof(fsl_shw_sym_mode_t), /* sym mode count */ + pf_modes, /* modes list ptr */ + sizeof(pf_hashes) / sizeof(fsl_shw_hash_alg_t), /* hash alg count */ + pf_hashes, /* hash list ptr */ + /* + * The following table must be set to handle all values of key algorithm + * and sym mode, and be in the correct order.. + */ + { /* Stream, ECB, CBC, CTR */ + {0, 0, 0, 0} + , /* HMAC */ + {0, 0, 0, 0} + , /* AES */ + {0, 0, 0, 0} + , /* DES */ +#ifdef FSL_HAVE_DRYICE + {0, 1, 1, 0} + , /* 3DES - ECB and CBC */ +#else + {0, 0, 0, 0} + , /* 3DES */ +#endif + {0, 0, 0, 0} /* ARC4 */ + } + , + 0, 0, /* SCC driver version */ + 0, 0, 0, /* SCC version/capabilities */ + {{0, 0} + } + , /* (filled in during OS_INIT) */ +}; + +/* These are often handy */ +#ifndef FALSE +/*! Not true. Guaranteed to be zero. */ +#define FALSE 0 +#endif +#ifndef TRUE +/*! True. Guaranteed to be non-zero. */ +#define TRUE 1 +#endif + +/****************************************************************************** + * + * Function Implementations - Externally Accessible + * + *****************************************************************************/ + +/*****************************************************************************/ +/* fn shw_init() */ +/*****************************************************************************/ +/*! + * Initialize the driver. + * + * This routine is called during kernel init or module load (insmod). + * + * @return OS_ERROR_OK_S on success, errno on failure + */ +OS_DEV_INIT(shw_init) +{ + os_error_code error_code = OS_ERROR_NO_MEMORY_S; /* assume failure */ + scc_config_t *shw_capabilities; + +#ifdef SHW_DEBUG + LOG_KDIAG("SHW Driver: Loading"); +#endif + + user_list = NULL; + shw_queue_lock = os_lock_alloc_init(); + + if (shw_queue_lock != NULL) { + error_code = shw_setup_user_driver_interaction(); + if (error_code != OS_ERROR_OK_S) { +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("SHW Driver: Failed to setup user i/f: %d", + error_code); +#endif + } + } + + /* queue_lock not NULL */ + /* Fill in the SCC portion of the capabilities object */ + shw_capabilities = scc_get_configuration(); + cap.scc_driver_major = shw_capabilities->driver_major_version; + cap.scc_driver_minor = shw_capabilities->driver_minor_version; + cap.scm_version = shw_capabilities->scm_version; + cap.smn_version = shw_capabilities->smn_version; + cap.block_size_bytes = shw_capabilities->block_size_bytes; + +#ifdef FSL_HAVE_SCC + cap.u.scc_info.black_ram_size_blocks = + shw_capabilities->black_ram_size_blocks; + cap.u.scc_info.red_ram_size_blocks = + shw_capabilities->red_ram_size_blocks; +#elif defined(FSL_HAVE_SCC2) + cap.u.scc2_info.partition_size_bytes = + shw_capabilities->partition_size_bytes; + cap.u.scc2_info.partition_count = shw_capabilities->partition_count; +#endif + +#if defined(FSL_HAVE_SCC2) || defined(FSL_HAVE_DRYICE) + if (error_code == OS_ERROR_OK_S) { + /* set up the system keystore, using the default keystore handler */ + fsl_shw_init_keystore_default(&system_keystore); + + if (fsl_shw_establish_keystore(NULL, &system_keystore) + == FSL_RETURN_OK_S) { + error_code = OS_ERROR_OK_S; + } else { + error_code = OS_ERROR_FAIL_S; + } + + if (error_code != OS_ERROR_OK_S) { +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("Registering the system keystore failed with error" + " code: %d\n", error_code); +#endif + } + } +#endif /* FSL_HAVE_SCC2 */ + + if (error_code != OS_ERROR_OK_S) { +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: Driver initialization failed. %d", + error_code); +#endif + shw_cleanup(); + } else { +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: Driver initialization complete."); +#endif + } + + os_dev_init_return(error_code); +} /* shw_init */ + +/*****************************************************************************/ +/* fn shw_shutdown() */ +/*****************************************************************************/ +/*! + * Prepare driver for exit. + * + * This is called during @c rmmod when the driver is unloading or when the + * kernel is shutting down. + * + * Calls shw_cleanup() to do all work to undo anything that happened during + * initialization or while driver was running. + */ +OS_DEV_SHUTDOWN(shw_shutdown) +{ + +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: shutdown called"); +#endif + shw_cleanup(); + + os_dev_shutdown_return(OS_ERROR_OK_S); +} /* shw_shutdown */ + +/*****************************************************************************/ +/* fn shw_cleanup() */ +/*****************************************************************************/ +/*! + * Prepare driver for shutdown. + * + * Remove the driver registration. + * + */ +static void shw_cleanup(void) +{ + if (shw_device_registered) { + + /* Turn off the all association with OS */ + os_driver_remove_registration(reg_handle); + shw_device_registered = 0; + } + + if (shw_queue_lock != NULL) { + os_lock_deallocate(shw_queue_lock); + } +#ifdef SHW_DEBUG + LOG_KDIAG("SHW Driver: Cleaned up"); +#endif +} /* shw_cleanup */ + +/*****************************************************************************/ +/* fn shw_open() */ +/*****************************************************************************/ +/*! + * Handle @c open() call from user. + * + * @return OS_ERROR_OK_S on success (always!) + */ +OS_DEV_OPEN(shw_open) +{ + os_error_code status = OS_ERROR_OK_S; + + os_dev_set_user_private(NULL); /* Make sure */ + + os_dev_open_return(status); +} /* shw_open */ + +/*****************************************************************************/ +/* fn shw_ioctl() */ +/*****************************************************************************/ +/*! + * Process an ioctl() request from user-mode API. + * + * This code determines which of the API requests the user has made and then + * sends the request off to the appropriate function. + * + * @return ioctl_return() + */ +OS_DEV_IOCTL(shw_ioctl) +{ + os_error_code code = OS_ERROR_FAIL_S; + + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: IOCTL %d received", os_dev_get_ioctl_op()); +#endif + switch (os_dev_get_ioctl_op()) { + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_REGISTER_USER: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: register_user ioctl received"); +#endif + { + fsl_shw_uco_t *user_ctx = + os_alloc_memory(sizeof(*user_ctx), 0); + + if (user_ctx == NULL) { + code = OS_ERROR_NO_MEMORY_S; + } else { + code = + init_uco(user_ctx, + (fsl_shw_uco_t *) + os_dev_get_ioctl_arg()); + if (code == OS_ERROR_OK_S) { + os_dev_set_user_private(user_ctx); + } else { + os_free_memory(user_ctx); + } + } + } + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_DEREGISTER_USER: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: deregister_user ioctl received"); +#endif + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + SHW_REMOVE_USER(user_ctx); + } + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_GET_RESULTS: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: get_results ioctl received"); +#endif + code = get_results(user_ctx, + (struct results_req *) + os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_GET_CAPABILITIES: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: get_capabilities ioctl received"); +#endif + code = get_capabilities(user_ctx, + (fsl_shw_pco_t *) + os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_GET_RANDOM: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: get_random ioctl received"); +#endif + code = get_random(user_ctx, + (struct get_random_req *) + os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_ADD_ENTROPY: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: add_entropy ioctl received"); +#endif + code = add_entropy(user_ctx, + (struct add_entropy_req *) + os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_DROP_PERMS: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: drop permissions ioctl received"); +#endif + code = + shw_handle_scc_drop_perms(user_ctx, os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_SSTATUS: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: sstatus ioctl received"); +#endif + code = shw_handle_scc_sstatus(user_ctx, os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_SFREE: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: sfree ioctl received"); +#endif + code = shw_handle_scc_sfree(user_ctx, os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_SCC_ENCRYPT: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: scc encrypt ioctl received"); +#endif + code = shw_handle_scc_encrypt(user_ctx, os_dev_get_ioctl_arg()); + break; + + case SHW_IOCTL_REQUEST + SHW_USER_REQ_SCC_DECRYPT: +#ifdef SHW_DEBUG + LOG_KDIAG("SHW: scc decrypt ioctl received"); +#endif + code = shw_handle_scc_decrypt(user_ctx, os_dev_get_ioctl_arg()); + break; + + default: +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: Unexpected ioctl %d", + os_dev_get_ioctl_op()); +#endif + break; + } + + os_dev_ioctl_return(code); +} + +#ifdef FSL_HAVE_SCC2 + +/*****************************************************************************/ +/* fn get_user_smid() */ +/*****************************************************************************/ +uint32_t get_user_smid(void *proc) +{ + /* + * A real implementation would have some way to handle signed applications + * which wouild be assigned distinct SMIDs. For the reference + * implementation, we show where this would be determined (here), but + * always provide a fixed answer, thus not separating users at all. + */ + + return 0x42eaae42; +} + +/* user_base: userspace base address of the partition + * kernel_base: kernel mode base address of the partition + */ +static fsl_shw_return_t register_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base, + void *kernel_base) +{ + fsl_shw_spo_t *partition_info; + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + if (user_ctx == NULL) { + goto out; + } + + partition_info = os_alloc_memory(sizeof(fsl_shw_spo_t), GFP_KERNEL); + + if (partition_info == NULL) { + goto out; + } + + /* stuff the partition info, then put it at the front of the chain */ + partition_info->user_base = user_base; + partition_info->kernel_base = kernel_base; + partition_info->next = user_ctx->partition; + + user_ctx->partition = (struct fsl_shw_spo_t *)partition_info; + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("partition with user_base=%p, kernel_base=%p registered.", + (void *)user_base, kernel_base); +#endif + + ret = FSL_RETURN_OK_S; + + out: + + return ret; +} + +/* if the partition is in the users list, remove it */ +static fsl_shw_return_t deregister_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base) +{ + fsl_shw_spo_t *curr = (fsl_shw_spo_t *) user_ctx->partition; + fsl_shw_spo_t *last = (fsl_shw_spo_t *) user_ctx->partition; + + while (curr != NULL) { + if (curr->user_base == user_base) { + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("deregister_user_partition: partition with " + "user_base=%p, kernel_base=%p deregistered.\n", + (void *)curr->user_base, curr->kernel_base); +#endif + + if (last == curr) { + user_ctx->partition = curr->next; + os_free_memory(curr); + return FSL_RETURN_OK_S; + } else { + last->next = curr->next; + os_free_memory(curr); + return FSL_RETURN_OK_S; + } + } + last = curr; + curr = (fsl_shw_spo_t *) curr->next; + } + + return FSL_RETURN_ERROR_S; +} + +/* Find the kernel-mode address of the partition. + * This can then be passed to the SCC functions. + */ +void *lookup_user_partition(fsl_shw_uco_t * user_ctx, uint32_t user_base) +{ + /* search through the partition chain to find one that matches the user base + * address. + */ + fsl_shw_spo_t *curr = (fsl_shw_spo_t *) user_ctx->partition; + + while (curr != NULL) { + if (curr->user_base == user_base) { + return curr->kernel_base; + } + curr = (fsl_shw_spo_t *) curr->next; + } + return NULL; +} + +#endif /* FSL_HAVE_SCC2 */ + +/*! +******************************************************************************* +* This function implements the smalloc() function for userspace programs, by +* making a call to the SCC2 mmap() function that acquires a region of secure +* memory on behalf of the user, and then maps it into the users memory space. +* Currently, the only memory size supported is that of a single SCC2 partition. +* Requests for other sized memory regions will fail. +*/ +OS_DEV_MMAP(shw_mmap) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; + +#ifdef FSL_HAVE_SCC2 + { + scc_return_t scc_ret; + fsl_shw_return_t fsl_ret; + uint32_t partition_registered = FALSE; + + uint32_t user_base; + void *partition_base; + uint32_t smid; + scc_config_t *scc_configuration; + + int part_no = -1; + uint32_t part_phys; + + fsl_shw_uco_t *user_ctx = + (fsl_shw_uco_t *) os_dev_get_user_private(); + + /* Make sure that the user context is valid */ + if (user_ctx == NULL) { + user_ctx = + os_alloc_memory(sizeof(*user_ctx), GFP_KERNEL); + + if (user_ctx == NULL) { + status = OS_ERROR_NO_MEMORY_S; + goto out; + } + fsl_shw_register_user(user_ctx); + os_dev_set_user_private(user_ctx); + } + + /* Determine the size of a secure partition */ + scc_configuration = scc_get_configuration(); + + /* Check that the memory size requested is equal to the partition + * size, and that the requested destination is on a page boundary. + */ + if (((os_mmap_user_base() % PAGE_SIZE) != 0) || + (os_mmap_memory_size() != + scc_configuration->partition_size_bytes)) { + status = OS_ERROR_BAD_ARG_S; + goto out; + } + + /* Retrieve the SMID associated with the user */ + smid = get_user_smid(user_ctx->process); + + /* Attempt to allocate a secure partition */ + scc_ret = + scc_allocate_partition(smid, &part_no, &partition_base, + &part_phys); + if (scc_ret != SCC_RET_OK) { + pr_debug + ("SCC mmap() request failed to allocate partition;" + " error %d\n", status); + status = OS_ERROR_FAIL_S; + goto out; + } + + pr_debug("scc_mmap() acquired partition %d at %08x\n", + part_no, part_phys); + + /* Record partition info in the user context */ + user_base = os_mmap_user_base(); + fsl_ret = + register_user_partition(user_ctx, user_base, + partition_base); + + if (fsl_ret != FSL_RETURN_OK_S) { + pr_debug + ("SCC mmap() request failed to register partition with user" + " context, error: %d\n", fsl_ret); + status = OS_ERROR_FAIL_S; + } + + partition_registered = TRUE; + + status = map_user_memory(os_mmap_memory_ctx(), part_phys, + os_mmap_memory_size()); + +#ifdef SHW_DEBUG + if (status == OS_ERROR_OK_S) { + LOG_KDIAG_ARGS + ("Partition allocated: user_base=%p, partition_base=%p.", + (void *)user_base, partition_base); + } +#endif + + out: + /* If there is an error it has to be handled here */ + if (status != OS_ERROR_OK_S) { + /* if the partition was registered with the user, unregister it. */ + if (partition_registered == TRUE) { + deregister_user_partition(user_ctx, user_base); + } + + /* if the partition was allocated, deallocate it */ + if (partition_base != NULL) { + scc_release_partition(partition_base); + } + } + } +#endif /* FSL_HAVE_SCC2 */ + + return status; +} + +/*****************************************************************************/ +/* fn shw_release() */ +/*****************************************************************************/ +/*! + * Handle @c close() call from user. + * This is a Linux device driver interface routine. + * + * @return OS_ERROR_OK_S on success (always!) + */ +OS_DEV_CLOSE(shw_release) +{ + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + os_error_code code = OS_ERROR_OK_S; + + if (user_ctx != NULL) { + + fsl_shw_deregister_user(user_ctx); + os_free_memory(user_ctx); + os_dev_set_user_private(NULL); + + } + + os_dev_close_return(code); +} /* shw_release */ + +/*****************************************************************************/ +/* fn shw_user_callback() */ +/*****************************************************************************/ +/*! + * FSL SHW User callback function. + * + * This function is set in the kernel version of the user context as the + * callback function when the user mode user wants a callback. Its job is to + * inform the user process that results (may) be available. It does this by + * sending a SIGUSR2 signal which is then caught by the user-mode FSL SHW + * library. + * + * @param user_ctx Kernel version of uco associated with the request. + * + * @return void + */ +static void shw_user_callback(fsl_shw_uco_t * user_ctx) +{ +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: Signalling callback user process for context %p\n", + user_ctx); +#endif + os_send_signal(user_ctx->process, SIGUSR2); +} + +/*****************************************************************************/ +/* fn setup_user_driver_interaction() */ +/*****************************************************************************/ +/*! + * Register the driver with the kernel as the driver for shw_major_node. Note + * that this value may be zero, in which case the major number will be assigned + * by the OS. shw_major_node is never modified. + * + * The open(), ioctl(), and close() handles for the driver ned to be registered + * with the kernel. Upon success, shw_device_registered will be true; + * + * @return OS_ERROR_OK_S on success, or an os err code + */ +static os_error_code shw_setup_user_driver_interaction(void) +{ + os_error_code error_code; + + os_driver_init_registration(reg_handle); + os_driver_add_registration(reg_handle, OS_FN_OPEN, + OS_DEV_OPEN_REF(shw_open)); + os_driver_add_registration(reg_handle, OS_FN_IOCTL, + OS_DEV_IOCTL_REF(shw_ioctl)); + os_driver_add_registration(reg_handle, OS_FN_CLOSE, + OS_DEV_CLOSE_REF(shw_release)); + os_driver_add_registration(reg_handle, OS_FN_MMAP, + OS_DEV_MMAP_REF(shw_mmap)); + error_code = os_driver_complete_registration(reg_handle, shw_major_node, + SHW_DRIVER_NAME); + + if (error_code != OS_ERROR_OK_S) { + /* failure ! */ +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW Driver: register device driver failed: %d", + error_code); +#endif + } else { /* success */ + shw_device_registered = TRUE; +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW Driver: Major node is %d\n", + os_driver_get_major(reg_handle)); +#endif + } + + return error_code; +} /* shw_setup_user_driver_interaction */ + +/******************************************************************/ +/* User Mode Support */ +/******************************************************************/ + +/*! + * Initialze kernel User Context Object from User-space version. + * + * Copy user UCO into kernel UCO, set flags and fields for operation + * within kernel space. Add user to driver's list of users. + * + * @param user_ctx Pointer to kernel space UCO + * @param user_mode_uco User pointer to user space version + * + * @return os_error_code + */ +static os_error_code init_uco(fsl_shw_uco_t * user_ctx, void *user_mode_uco) +{ + os_error_code code; + + code = os_copy_from_user(user_ctx, user_mode_uco, sizeof(*user_ctx)); + if (code == OS_ERROR_OK_S) { + user_ctx->flags |= FSL_UCO_USERMODE_USER; + user_ctx->result_pool.head = NULL; + user_ctx->result_pool.tail = NULL; + user_ctx->process = os_get_process_handle(); + user_ctx->callback = shw_user_callback; + SHW_ADD_USER(user_ctx); + } +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: init uco returning %d (flags %x)", + code, user_ctx->flags); +#endif + + return code; +} + +/*! + * Copy array from kernel to user space. + * + * This routine will check bounds before trying to copy, and return failure + * on bounds violation or error during the copy. + * + * @param userloc Location in userloc to place data. If NULL, the function + * will do nothing (except return NULL). + * @param userend Address beyond allowed copy region at @c userloc. + * @param data_start Location of data to be copied + * @param element_size sizeof() an element + * @param element_count Number of elements of size element_size to copy. + * @return New value of userloc, or NULL if there was an error. + */ +inline static void *copy_array(void *userloc, void *userend, void *data_start, + unsigned element_size, unsigned element_count) +{ + unsigned byte_count = element_size * element_count; + + if ((userloc == NULL) || (userend == NULL) + || ((userloc + byte_count) >= userend) || + (copy_to_user(userloc, data_start, byte_count) != OS_ERROR_OK_S)) { + userloc = NULL; + } else { + userloc += byte_count; + } + + return userloc; +} + +/*! + * Send an FSL SHW API return code up into the user-space request structure. + * + * @param user_header User address of request block / request header + * @param result_code The FSL SHW API code to be placed at header.code + * + * @return an os_error_code + * + * NOTE: This function assumes that the shw_req_header is at the beginning of + * each request structure. + */ +inline static os_error_code copy_fsl_code(void *user_header, + fsl_shw_return_t result_code) +{ + return os_copy_to_user(user_header + + offsetof(struct shw_req_header, code), + &result_code, sizeof(result_code)); +} + +static os_error_code shw_handle_scc_drop_perms(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + scc_return_t scc_ret; + scc_partition_info_t partition_info; + void *kernel_base; + + status = + os_copy_from_user(&partition_info, (void *)info, + sizeof(partition_info)); + + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef SHW_DEBUG + LOG_KDIAG("_scc_drop_perms(): failed to find partition\n"); +#endif + goto out; + } + + /* call scc driver to perform the drop */ + scc_ret = scc_diminish_permissions(kernel_base, + partition_info.permissions); + if (scc_ret == SCC_RET_OK) { + status = OS_ERROR_OK_S; + } else { + status = OS_ERROR_FAIL_S; + } + + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code shw_handle_scc_sstatus(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + scc_partition_info_t partition_info; + void *kernel_base; + + status = os_copy_from_user(&partition_info, + (void *)info, sizeof(partition_info)); + + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef SHW_DEBUG + LOG_KDIAG("Failed to find partition\n"); +#endif + goto out; + } + + /* Call the SCC driver to ask about the partition status */ + partition_info.status = scc_partition_status(kernel_base); + + /* and copy the structure out */ + status = os_copy_to_user((void *)info, + &partition_info, sizeof(partition_info)); + + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code shw_handle_scc_sfree(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + { + scc_partition_info_t partition_info; + void *kernel_base; + int ret; + + status = os_copy_from_user(&partition_info, + (void *)info, + sizeof(partition_info)); + + /* check that the copy was successful */ + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = + lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef SHW_DEBUG + LOG_KDIAG("failed to find partition\n"); +#endif /*SHW_DEBUG */ + goto out; + } + + /* Unmap the memory region (see sys_munmap in mmap.c) */ + ret = unmap_user_memory(partition_info.user_base, 8192); + + /* If the memory was successfully released */ + if (ret == OS_ERROR_OK_S) { + + /* release the partition */ + scc_release_partition(kernel_base); + + /* and remove it from the users context */ + deregister_user_partition(user_ctx, + partition_info.user_base); + + status = OS_ERROR_OK_S; + + } else { +#ifdef SHW_DEBUG + LOG_KDIAG("do_munmap not successful!"); +#endif + } + + } + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code shw_handle_scc_encrypt(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_FAIL_S; +#ifdef FSL_HAVE_SCC2 + { + fsl_shw_return_t retval; + scc_region_t region_info; + void *page_ctx = NULL; + void *black_addr = NULL; + void *partition_base = NULL; + scc_config_t *scc_configuration; + + status = + os_copy_from_user(®ion_info, (void *)info, + sizeof(region_info)); + + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + partition_base = lookup_user_partition(user_ctx, + region_info. + partition_base); + + if (partition_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef SHW_DEBUG + LOG_KDIAG("failed to find secure partition\n"); +#endif + goto out; + } + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (region_info.offset + region_info.length > + scc_configuration->partition_size_bytes) { + status = OS_ERROR_FAIL_S; + goto out; + } + + /* wire down black_data */ + black_addr = wire_user_memory(region_info.black_data, + region_info.length, &page_ctx); + + if (black_addr == NULL) { + status = OS_ERROR_FAIL_S; + goto out; + } + + retval = + do_scc_encrypt_region(NULL, partition_base, + region_info.offset, + region_info.length, black_addr, + region_info.IV, + region_info.cypher_mode); + + if (retval == FSL_RETURN_OK_S) { + status = OS_ERROR_OK_S; + } else { + status = OS_ERROR_FAIL_S; + } + + /* release black data */ + unwire_user_memory(&page_ctx); + } + out: + +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code shw_handle_scc_decrypt(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_FAIL_S; +#ifdef FSL_HAVE_SCC2 + { + fsl_shw_return_t retval; + scc_region_t region_info; + void *page_ctx = NULL; + void *black_addr; + void *partition_base; + scc_config_t *scc_configuration; + + status = + os_copy_from_user(®ion_info, (void *)info, + sizeof(region_info)); + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("partition_base: %p, offset: %i, length: %i, black data: %p", + (void *)region_info.partition_base, region_info.offset, + region_info.length, (void *)region_info.black_data); +#endif + + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + partition_base = lookup_user_partition(user_ctx, + region_info. + partition_base); + + if (partition_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef SHW_DEBUG + LOG_KDIAG("failed to find partition\n"); +#endif + goto out; + } + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (region_info.offset + region_info.length > + scc_configuration->partition_size_bytes) { + status = OS_ERROR_FAIL_S; + goto out; + } + + /* wire down black_data */ + black_addr = wire_user_memory(region_info.black_data, + region_info.length, &page_ctx); + + if (black_addr == NULL) { + status = OS_ERROR_FAIL_S; + goto out; + } + + retval = + do_scc_decrypt_region(NULL, partition_base, + region_info.offset, + region_info.length, black_addr, + region_info.IV, + region_info.cypher_mode); + + if (retval == FSL_RETURN_OK_S) { + status = OS_ERROR_OK_S; + } else { + status = OS_ERROR_FAIL_S; + } + + /* release black data */ + unwire_user_memory(&page_ctx); + } + out: + +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +fsl_shw_return_t do_system_keystore_slot_alloc(fsl_shw_uco_t * user_ctx, + uint32_t key_length, + uint64_t ownerid, + uint32_t * slot) +{ + (void)user_ctx; + return keystore_slot_alloc(&system_keystore, key_length, ownerid, slot); +} + +fsl_shw_return_t do_system_keystore_slot_dealloc(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot) +{ + (void)user_ctx; + return keystore_slot_dealloc(&system_keystore, ownerid, slot); +} + +fsl_shw_return_t do_system_keystore_slot_load(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + const uint8_t * key, + uint32_t key_length) +{ + (void)user_ctx; + return keystore_slot_load(&system_keystore, ownerid, slot, + (void *)key, key_length); +} + +fsl_shw_return_t do_system_keystore_slot_encrypt(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + uint8_t * black_data) +{ + (void)user_ctx; + return keystore_slot_encrypt(NULL, &system_keystore, ownerid, + slot, key_length, black_data); +} + +fsl_shw_return_t do_system_keystore_slot_decrypt(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t * black_data) +{ + (void)user_ctx; + return keystore_slot_decrypt(NULL, &system_keystore, ownerid, + slot, key_length, black_data); +} + +fsl_shw_return_t do_system_keystore_slot_read(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + uint8_t * key_data) +{ + (void)user_ctx; + + return keystore_slot_read(&system_keystore, ownerid, + slot, key_length, key_data); +} + +/*! + * Handle user-mode Get Capabilities request + * + * Right now, this function can only have a failure if the user has failed to + * provide a pointer to a location in user space with enough room to hold the + * fsl_shw_pco_t structure and any associated data. It will treat this failure + * as an ioctl failure and return an ioctl error code, instead of treating it + * as an API failure. + * + * @param user_ctx The kernel version of user's context + * @param user_mode_pco_request Pointer to user-space request + * + * @return an os_error_code + */ +static os_error_code get_capabilities(fsl_shw_uco_t * user_ctx, + void *user_mode_pco_request) +{ + os_error_code code; + struct capabilities_req req; + fsl_shw_pco_t local_cap; + + memcpy(&local_cap, &cap, sizeof(cap)); + /* Initialize pointers to out-of-struct arrays */ + local_cap.sym_algorithms = NULL; + local_cap.sym_modes = NULL; + local_cap.sym_modes = NULL; + + code = os_copy_from_user(&req, user_mode_pco_request, sizeof(req)); + if (code == OS_ERROR_OK_S) { + void *endcap; + void *user_bounds; +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHE: Received get_cap request: 0x%p/%u/0x%x", + req.capabilities, req.size, + sizeof(fsl_shw_pco_t)); +#endif + endcap = req.capabilities + 1; /* point to end of structure */ + user_bounds = (void *)req.capabilities + req.size; /* end of area */ + + /* First verify that request is big enough for the main structure */ + if (endcap >= user_bounds) { + endcap = NULL; /* No! */ + } + + /* Copy any Symmetric Algorithm suppport */ + if (cap.sym_algorithm_count != 0) { + local_cap.sym_algorithms = endcap; + endcap = + copy_array(endcap, user_bounds, cap.sym_algorithms, + sizeof(fsl_shw_key_alg_t), + cap.sym_algorithm_count); + } + + /* Copy any Symmetric Modes suppport */ + if (cap.sym_mode_count != 0) { + local_cap.sym_modes = endcap; + endcap = copy_array(endcap, user_bounds, cap.sym_modes, + sizeof(fsl_shw_sym_mode_t), + cap.sym_mode_count); + } + + /* Copy any Hash Algorithm suppport */ + if (cap.hash_algorithm_count != 0) { + local_cap.hash_algorithms = endcap; + endcap = + copy_array(endcap, user_bounds, cap.hash_algorithms, + sizeof(fsl_shw_hash_alg_t), + cap.hash_algorithm_count); + } + + /* Now copy up the (possibly modified) main structure */ + if (endcap != NULL) { + code = + os_copy_to_user(req.capabilities, &local_cap, + sizeof(cap)); + } + + if (endcap == NULL) { + code = OS_ERROR_BAD_ADDRESS_S; + } + + /* And return the FSL SHW code in the request structure. */ + if (code == OS_ERROR_OK_S) { + code = + copy_fsl_code(user_mode_pco_request, + FSL_RETURN_OK_S); + } + } + + /* code may already be set to an error. This is another error case. */ + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: get capabilities returning %d", code); +#endif + + return code; +} + +/*! + * Handle user-mode Get Results request + * + * Get arguments from user space into kernel space, then call + * fsl_shw_get_results, and then copy its return code and any results from + * kernel space back to user space. + * + * @param user_ctx The kernel version of user's context + * @param user_mode_results_req Pointer to user-space request + * + * @return an os_error_code + */ +static os_error_code get_results(fsl_shw_uco_t * user_ctx, + void *user_mode_results_req) +{ + os_error_code code; + struct results_req req; + fsl_shw_result_t *results = NULL; + int loop; + + code = os_copy_from_user(&req, user_mode_results_req, sizeof(req)); + loop = 0; + + if (code == OS_ERROR_OK_S) { + results = os_alloc_memory(req.requested * sizeof(*results), 0); + if (results == NULL) { + code = OS_ERROR_NO_MEMORY_S; + } + } + + if (code == OS_ERROR_OK_S) { + fsl_shw_return_t err = + fsl_shw_get_results(user_ctx, req.requested, + results, &req.actual); + + /* Send API return code up to user. */ + code = copy_fsl_code(user_mode_results_req, err); + + if ((code == OS_ERROR_OK_S) && (err == FSL_RETURN_OK_S)) { + /* Now copy up the result count */ + code = os_copy_to_user(user_mode_results_req + + offsetof(struct results_req, + actual), &req.actual, + sizeof(req.actual)); + if ((code == OS_ERROR_OK_S) && (req.actual != 0)) { + /* now copy up the results... */ + code = os_copy_to_user(req.results, results, + req.actual * + sizeof(*results)); + } + } + } + + if (results != NULL) { + os_free_memory(results); + } + + return code; +} + +/*! + * Process header of user-mode request. + * + * Mark header as User Mode request. Update UCO's flags and reference fields + * with current versions from the header. + * + * @param user_ctx Pointer to kernel version of UCO. + * @param hdr Pointer to common part of user request. + * + * @return void + */ +inline static void process_hdr(fsl_shw_uco_t * user_ctx, + struct shw_req_header *hdr) +{ + hdr->flags |= FSL_UCO_USERMODE_USER; + user_ctx->flags = hdr->flags; + user_ctx->user_ref = hdr->user_ref; + + return; +} + +/*! + * Handle user-mode Get Random request + * + * @param user_ctx The kernel version of user's context + * @param user_mode_get_random_req Pointer to user-space request + * + * @return an os_error_code + */ +static os_error_code get_random(fsl_shw_uco_t * user_ctx, + void *user_mode_get_random_req) +{ + os_error_code code; + struct get_random_req req; + + code = os_copy_from_user(&req, user_mode_get_random_req, sizeof(req)); + if (code == OS_ERROR_OK_S) { + process_hdr(user_ctx, &req.hdr); +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("SHW: get_random() for %d bytes in %sblocking mode", + req.size, + (req.hdr.flags & FSL_UCO_BLOCKING_MODE) ? "" : "non-"); +#endif + req.hdr.code = + fsl_shw_get_random(user_ctx, req.size, req.random); + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("SHW: get_random() returning %d", req.hdr.code); +#endif + + /* Copy FSL function status back to user */ + code = copy_fsl_code(user_mode_get_random_req, req.hdr.code); + } + + return code; +} + +/*! + * Handle user-mode Add Entropy request + * + * @param user_ctx Pointer to the kernel version of user's context + * @param user_mode_add_entropy_req Address of user-space request + * + * @return an os_error_code + */ +static os_error_code add_entropy(fsl_shw_uco_t * user_ctx, + void *user_mode_add_entropy_req) +{ + os_error_code code; + struct add_entropy_req req; + uint8_t *local_buffer = NULL; + + code = os_copy_from_user(&req, user_mode_add_entropy_req, sizeof(req)); + if (code == OS_ERROR_OK_S) { + local_buffer = os_alloc_memory(req.size, 0); /* for random */ + if (local_buffer != NULL) { + code = + os_copy_from_user(local_buffer, req.entropy, + req.size); + } + if (code == OS_ERROR_OK_S) { + req.hdr.code = fsl_shw_add_entropy(user_ctx, req.size, + local_buffer); + + code = + copy_fsl_code(user_mode_add_entropy_req, + req.hdr.code); + } + } + + if (local_buffer != NULL) { + os_free_memory(local_buffer); + } + + return code; +} + +/******************************************************************/ +/* End User Mode Support */ +/******************************************************************/ + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_register_user); +#endif +/* REQ-S2LRD-PINTFC-API-GEN-004 */ +/* + * Handle user registration. + * + * @param user_ctx The user context for the registration. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_register_user(fsl_shw_uco_t * user_ctx) +{ + fsl_shw_return_t code = FSL_RETURN_INTERNAL_ERROR_S; + + if ((user_ctx->flags & FSL_UCO_BLOCKING_MODE) && + (user_ctx->flags & FSL_UCO_CALLBACK_MODE)) { + code = FSL_RETURN_BAD_FLAG_S; + goto error_exit; + } else if (user_ctx->pool_size == 0) { + code = FSL_RETURN_NO_RESOURCE_S; + goto error_exit; + } else { + user_ctx->result_pool.head = NULL; + user_ctx->result_pool.tail = NULL; + SHW_ADD_USER(user_ctx); + code = FSL_RETURN_OK_S; + } + + error_exit: + return code; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_deregister_user); +#endif +/* REQ-S2LRD-PINTFC-API-GEN-005 */ +/*! + * Destroy the association between the the user and the provider of the API. + * + * @param user_ctx The user context which is no longer needed. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_deregister_user(fsl_shw_uco_t * user_ctx) +{ + shw_queue_entry_t *finished_request; + fsl_shw_return_t ret = FSL_RETURN_OK_S; + + /* Clean up what we find in result pool. */ + do { + os_lock_context_t lock_context; + os_lock_save_context(shw_queue_lock, lock_context); + finished_request = user_ctx->result_pool.head; + + if (finished_request != NULL) { + SHW_QUEUE_REMOVE_ENTRY(&user_ctx->result_pool, + finished_request); + os_unlock_restore_context(shw_queue_lock, lock_context); + os_free_memory(finished_request); + } else { + os_unlock_restore_context(shw_queue_lock, lock_context); + } + } while (finished_request != NULL); + +#ifdef FSL_HAVE_SCC2 + { + fsl_shw_spo_t *partition; + struct mm_struct *mm = current->mm; + + while ((user_ctx->partition != NULL) + && (ret == FSL_RETURN_OK_S)) { + + partition = user_ctx->partition; + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS + ("Found an abandoned secure partition at %p, releasing", + partition); +#endif + + /* It appears that current->mm is not valid if this is called from a + * close routine (perhaps only if the program raised an exception that + * caused it to close?) If that is the case, then still free the + * partition, but do not remove it from the memory space (dangerous?) + */ + + if (mm == NULL) { +#ifdef SHW_DEBUG + LOG_KDIAG + ("Warning: no mm structure found, not unmapping " + "partition from user memory\n"); +#endif + } else { + /* Unmap the memory region (see sys_munmap in mmap.c) */ + /* Note that this assumes a single memory partition */ + unmap_user_memory(partition->user_base, 8192); + } + + /* If the memory was successfully released */ + if (ret == OS_ERROR_OK_S) { + /* release the partition */ + scc_release_partition(partition->kernel_base); + + /* and remove it from the users context */ + deregister_user_partition(user_ctx, + partition->user_base); + + ret = FSL_RETURN_OK_S; + } else { + ret = FSL_RETURN_ERROR_S; + + goto out; + } + } + } + out: +#endif /* FSL_HAVE_SCC2 */ + + SHW_REMOVE_USER(user_ctx); + + return ret; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_get_results); +#endif +/* REQ-S2LRD-PINTFC-API-GEN-006 */ +fsl_shw_return_t fsl_shw_get_results(fsl_shw_uco_t * user_ctx, + unsigned result_size, + fsl_shw_result_t results[], + unsigned *result_count) +{ + shw_queue_entry_t *finished_request; + unsigned loop = 0; + + do { + os_lock_context_t lock_context; + + /* Protect state of user's result pool until we have retrieved and + * remove the first entry, or determined that the pool is empty. */ + os_lock_save_context(shw_queue_lock, lock_context); + finished_request = user_ctx->result_pool.head; + + if (finished_request != NULL) { + uint32_t code = 0; + + SHW_QUEUE_REMOVE_ENTRY(&user_ctx->result_pool, + finished_request); + os_unlock_restore_context(shw_queue_lock, lock_context); + + results[loop].user_ref = finished_request->user_ref; + results[loop].code = finished_request->code; + results[loop].detail1 = 0; + results[loop].detail2 = 0; + results[loop].user_req = + finished_request->user_mode_req; + if (finished_request->postprocess != NULL) { + code = + finished_request-> + postprocess(finished_request); + } + + results[loop].code = finished_request->code; + os_free_memory(finished_request); + if (code == 0) { + loop++; + } + } else { /* finished_request is NULL */ + /* pool is empty */ + os_unlock_restore_context(shw_queue_lock, lock_context); + } + + } while ((loop < result_size) && (finished_request != NULL)); + + *result_count = loop; + + return FSL_RETURN_OK_S; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_get_capabilities); +#endif +fsl_shw_pco_t *fsl_shw_get_capabilities(fsl_shw_uco_t * user_ctx) +{ + + /* Unused */ + (void)user_ctx; + + return ∩ +} + +#if !(defined(FSL_HAVE_SAHARA) || defined(FSL_HAVE_RNGA) \ + || defined(FSL_HAVE_RNGB) || defined(FSL_HAVE_RNGC)) + +#if defined(LINUX_VERSION_CODE) +EXPORT_SYMBOL(fsl_shw_get_random); +#endif +fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + + /* Unused */ + (void)user_ctx; + (void)length; + (void)data; + + return FSL_RETURN_ERROR_S; +} + +#if defined(LINUX_VERSION_CODE) +EXPORT_SYMBOL(fsl_shw_add_entropy); +#endif +fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + + /* Unused */ + (void)user_ctx; + (void)length; + (void)data; + + return FSL_RETURN_ERROR_S; +} +#endif + +#if !defined(FSL_HAVE_DRYICE) && !defined(FSL_HAVE_SAHARA2) +#if 0 +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_symmetric_decrypt); +#endif +fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, uint8_t * pt) +{ + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)sym_ctx; + (void)length; + (void)ct; + (void)pt; + + return FSL_RETURN_ERROR_S; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_symmetric_encrypt); +#endif +fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, uint8_t * ct) +{ + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)sym_ctx; + (void)length; + (void)pt; + (void)ct; + + return FSL_RETURN_ERROR_S; +} + +/* DryIce support provided in separate file */ + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_establish_key); +#endif +fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key) +{ + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)establish_type; + (void)key; + + return FSL_RETURN_ERROR_S; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_extract_key); +#endif +fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key) +{ + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)covered_key; + + return FSL_RETURN_ERROR_S; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_release_key); +#endif +fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + + /* Unused */ + (void)user_ctx; + (void)key_info; + + return FSL_RETURN_ERROR_S; +} +#endif +#endif /* SAHARA or DRYICE */ + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_hash); +#endif +#if !defined(FSL_HAVE_SAHARA) +fsl_shw_return_t fsl_shw_hash(fsl_shw_uco_t * user_ctx, + fsl_shw_hco_t * hash_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)hash_ctx; + (void)msg; + (void)length; + (void)result; + (void)result_len; + + return ret; +} +#endif + +#ifndef FSL_HAVE_SAHARA +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_hmac_precompute); +#endif + +fsl_shw_return_t fsl_shw_hmac_precompute(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx) +{ + fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)hmac_ctx; + + return status; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_hmac); +#endif + +fsl_shw_return_t fsl_shw_hmac(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)hmac_ctx; + (void)msg; + (void)length; + (void)result; + (void)result_len; + + return status; +} +#endif + +/*! + * Call the proper function to encrypt a region of encrypted secure memory + * + * @brief + * + * @param user_ctx User context of the partition owner (NULL in kernel) + * @param partition_base Base address (physical) of the partition + * @param offset_bytes Offset from base address of the data to be encrypted + * @param byte_count Length of the message (bytes) + * @param black_data Pointer to where the encrypted data is stored + * @param IV IV to use for encryption + * @param cypher_mode Cyphering mode to use, specified by type + * #fsl_shw_cypher_mode_t + * + * @return status + */ +fsl_shw_return_t +do_scc_encrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode) +{ + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; +#ifdef FSL_HAVE_SCC2 + + scc_return_t scc_ret; + +#ifdef SHW_DEBUG + uint32_t *owner_32 = (uint32_t *) & (owner_id); + + LOG_KDIAG_ARGS + ("partition base: %p, offset: %i, count: %i, black data: %p\n", + partition_base, offset_bytes, byte_count, (void *)black_data); + + LOG_KDIAG_ARGS("Owner ID: %08x%08x\n", owner_32[1], owner_32[0]); +#endif /* SHW_DEBUG */ + (void)user_ctx; + + os_cache_flush_range(black_data, byte_count); + + scc_ret = + scc_encrypt_region((uint32_t) partition_base, offset_bytes, + byte_count, __virt_to_phys(black_data), IV, + cypher_mode); + + if (scc_ret == SCC_RET_OK) { + retval = FSL_RETURN_OK_S; + } else { + retval = FSL_RETURN_ERROR_S; + } + + /* The SCC2 DMA engine should have written to the black ram, so we need to + * invalidate that region of memory. Note that the red ram is not an + * because it is mapped with the cache disabled. + */ + os_cache_inv_range(black_data, byte_count); + +#endif /* FSL_HAVE_SCC2 */ + return retval; +} + +/*! + * Call the proper function to decrypt a region of encrypted secure memory + * + * @brief + * + * @param user_ctx User context of the partition owner (NULL in kernel) + * @param partition_base Base address (physical) of the partition + * @param offset_bytes Offset from base address that the decrypted data + * shall be placed + * @param byte_count Length of the message (bytes) + * @param black_data Pointer to where the encrypted data is stored + * @param IV IV to use for decryption + * @param cypher_mode Cyphering mode to use, specified by type + * #fsl_shw_cypher_mode_t + * + * @return status + */ +fsl_shw_return_t +do_scc_decrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, const uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode) +{ + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + +#ifdef FSL_HAVE_SCC2 + + scc_return_t scc_ret; + +#ifdef SHW_DEBUG + uint32_t *owner_32 = (uint32_t *) & (owner_id); + + LOG_KDIAG_ARGS + ("partition base: %p, offset: %i, count: %i, black data: %p\n", + partition_base, offset_bytes, byte_count, (void *)black_data); + + LOG_KDIAG_ARGS("Owner ID: %08x%08x\n", owner_32[1], owner_32[0]); +#endif /* SHW_DEBUG */ + + (void)user_ctx; + + /* The SCC2 DMA engine will be reading from the black ram, so we need to + * make sure that the data is pushed out of the cache. Note that the red + * ram is not an issue because it is mapped with the cache disabled. + */ + os_cache_flush_range(black_data, byte_count); + + scc_ret = + scc_decrypt_region((uint32_t) partition_base, offset_bytes, + byte_count, + (uint8_t *) __virt_to_phys(black_data), IV, + cypher_mode); + + if (scc_ret == SCC_RET_OK) { + retval = FSL_RETURN_OK_S; + } else { + retval = FSL_RETURN_ERROR_S; + } + +#endif /* FSL_HAVE_SCC2 */ + + return retval; +} + +void *fsl_shw_smalloc(fsl_shw_uco_t * user_ctx, + uint32_t size, const uint8_t * UMID, uint32_t permissions) +{ +#ifdef FSL_HAVE_SCC2 + int part_no; + void *part_base; + uint32_t part_phys; + scc_config_t *scc_configuration; + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (size != scc_configuration->partition_size_bytes) { + return NULL; + } + + /* attempt to grab a partition. */ + if (scc_allocate_partition(0, &part_no, &part_base, &part_phys) + != SCC_RET_OK) { + return NULL; + } +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("Partition_base: %p, partition_base_phys: %p\n", + part_base, (void *)part_phys); +#endif + + if (scc_engage_partition(part_base, UMID, permissions) + != SCC_RET_OK) { + /* Engagement failed, so the partition needs to be de-allocated */ + +#ifdef SHW_DEBUG + LOG_KDIAG_ARGS("Failed to engage partition %p, de-allocating", + part_base); +#endif + scc_release_partition(part_base); + + return NULL; + } + + return part_base; + +#else /* FSL_HAVE_SCC2 */ + + (void)user_ctx; + (void)size; + (void)UMID; + (void)permissions; + return NULL; + +#endif /* FSL_HAVE_SCC2 */ +} + +/* Release a block of secure memory */ +fsl_shw_return_t fsl_shw_sfree(fsl_shw_uco_t * user_ctx, void *address) +{ + (void)user_ctx; + +#ifdef FSL_HAVE_SCC2 + if (scc_release_partition(address) == SCC_RET_OK) { + return FSL_RETURN_OK_S; + } +#endif + + return FSL_RETURN_ERROR_S; +} + +/* Check the status of a block of secure memory */ +fsl_shw_return_t fsl_shw_sstatus(fsl_shw_uco_t * user_ctx, + void *address, + fsl_shw_partition_status_t * part_status) +{ + (void)user_ctx; + +#ifdef FSL_HAVE_SCC2 + *part_status = scc_partition_status(address); + + return FSL_RETURN_OK_S; +#endif + + return FSL_RETURN_ERROR_S; +} + +/* Diminish permissions on some secure memory */ +fsl_shw_return_t fsl_shw_diminish_perms(fsl_shw_uco_t * user_ctx, + void *address, uint32_t permissions) +{ + + (void)user_ctx; /* unused parameter warning */ + +#ifdef FSL_HAVE_SCC2 + if (scc_diminish_permissions(address, permissions) == SCC_RET_OK) { + return FSL_RETURN_OK_S; + } +#endif + return FSL_RETURN_ERROR_S; +} + +#ifndef FSL_HAVE_SAHARA +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_gen_encrypt); +#endif + +fsl_shw_return_t fsl_shw_gen_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * payload, + uint8_t * ct, uint8_t * auth_value) +{ + volatile fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)auth_ctx; + (void)cipher_key_info; + (void)auth_key_info; /* save compilation warning */ + (void)auth_data_length; + (void)auth_data; + (void)payload_length; + (void)payload; + (void)ct; + (void)auth_value; + + return status; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_auth_decrypt); +#endif +/*! + * @brief Authenticate and decrypt a (CCM) stream. + * + * @param user_ctx The user's context + * @param auth_ctx Info on this Auth operation + * @param cipher_key_info Key to encrypt payload + * @param auth_key_info (unused - same key in CCM) + * @param auth_data_length Length in bytes of @a auth_data + * @param auth_data Any auth-only data + * @param payload_length Length in bytes of @a payload + * @param ct The encrypted data + * @param auth_value The authentication code to validate + * @param[out] payload The location to store decrypted data + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_auth_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * ct, + const uint8_t * auth_value, + uint8_t * payload) +{ + volatile fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)auth_ctx; + (void)cipher_key_info; + (void)auth_key_info; /* save compilation warning */ + (void)auth_data_length; + (void)auth_data; + (void)payload_length; + (void)ct; + (void)auth_value; + (void)payload; + + return status; +} + +#endif /* no SAHARA */ + +#ifndef FSL_HAVE_DRYICE + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_gen_random_pf_key); +#endif +/*! + * Cause the hardware to create a new random key for secure memory use. + * + * Have the hardware use the secure hardware random number generator to load a + * new secret key into the hardware random key register. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_gen_random_pf_key(fsl_shw_uco_t * user_ctx) +{ + volatile fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + return status; +} + +#endif /* not have DRYICE */ + +fsl_shw_return_t alloc_slot(fsl_shw_uco_t * user_ctx, fsl_shw_sko_t * key_info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_alloc(user_ctx, + key_info->key_length, + key_info->userid, + &(key_info->handle)); +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("key length: %i, handle: %i", + key_info->key_length, key_info->handle); +#endif + + } else { + /* Key goes in user keystore */ + ret = keystore_slot_alloc(key_info->keystore, + key_info->key_length, + key_info->userid, + &(key_info->handle)); + } + + return ret; +} /* end fn alloc_slot */ + +fsl_shw_return_t load_slot(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, const uint8_t * key) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_load(user_ctx, + key_info->userid, + key_info->handle, key, + key_info->key_length); + } else { + /* Key goes in user keystore */ + ret = keystore_slot_load(key_info->keystore, + key_info->userid, + key_info->handle, key, + key_info->key_length); + } + + return ret; +} /* end fn load_slot */ + +fsl_shw_return_t dealloc_slot(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, + key_info->handle); + } else { + /* Key goes in user keystore */ + keystore_slot_dealloc(key_info->keystore, + key_info->userid, key_info->handle); + } + + key_info->flags &= ~(FSL_SKO_KEY_ESTABLISHED | FSL_SKO_KEY_PRESENT); + + return ret; +} /* end fn slot_dealloc */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/des_key.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/des_key.c @@ -0,0 +1,385 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +/*! + * @file des_key.c + * + * This file implements the function #fsl_shw_permute1_bytes(). + * + * The code was lifted from crypto++ v5.5.2, which is public domain code. The + * code to handle words instead of bytes was extensively modified from the byte + * version and then converted to handle one to three keys at once. + * + */ + +#include "shw_driver.h" +#ifdef DIAG_SECURITY_FUNC +#include "apihelp.h" +#endif + +#ifndef __KERNEL__ +#include +#include /* or whichever is proper for target arch */ +#endif + +#ifdef DEBUG +#undef DEBUG /* TEMPORARY */ +#endif + +#if defined(DEBUG) || defined(SELF_TEST) +static void DUMP_BYTES(const char *label, const uint8_t * data, int len) +{ + int i; + + printf("%s: ", label); + for (i = 0; i < len; i++) { + printf("%02X", data[i]); + if ((i % 8 == 0) && (i != 0)) { + printf("_"); /* key separator */ + } + } + printf("\n"); +} + +static void DUMP_WORDS(const char *label, const uint32_t * data, int len) +{ + int i, j; + + printf("%s: ", label); + /* Dump the words in reverse order, so that they are intelligible */ + for (i = len - 1; i >= 0; i--) { + for (j = 3; j >= 0; j--) { + uint32_t word = data[i]; + printf("%02X", (word >> ((j * 8)) & 0xff)); + if ((i != 0) && ((((i) * 4 + 5 + j) % 7) == 5)) + printf("_"); /* key separator */ + } + printf("|"); /* word separator */ + } + printf("\n"); +} +#else +#define DUMP_BYTES(label, data,len) +#define DUMP_WORDS(label, data,len) +#endif + +/*! + * permuted choice table (key) + * + * Note that this table has had one subtracted from each element so that the + * code doesn't have to do it. + */ +static const uint8_t pc1[] = { + 56, 48, 40, 32, 24, 16, 8, + 0, 57, 49, 41, 33, 25, 17, + 9, 1, 58, 50, 42, 34, 26, + 18, 10, 2, 59, 51, 43, 35, + 62, 54, 46, 38, 30, 22, 14, + 6, 61, 53, 45, 37, 29, 21, + 13, 5, 60, 52, 44, 36, 28, + 20, 12, 4, 27, 19, 11, 3, +}; + +/*! bit 0 is left-most in byte */ +static const int bytebit[] = { + 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01 +}; + +/*! + * Convert a 3-key 3DES key into the first-permutation 168-bit version. + * + * This is the format of the input key: + * + * @verbatim + BIT: |191 128|127 64|63 0| + BYTE: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | + KEY: | 0 | 1 | 2 | + @endverbatim + * + * This is the format of the output key: + * + * @verbatim + BIT: |167 112|111 56|55 0| + BYTE: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | + KEY: | 1 | 2 | 3 | + @endverbatim + * + * @param[in] key bytes of 3DES key + * @param[out] permuted_key 21 bytes of permuted key + * @param[in] key_count How many DES keys (2 or 3) + */ +void fsl_shw_permute1_bytes(const uint8_t * key, uint8_t * permuted_key, + int key_count) +{ + int i; + int j; + int l; + int m; + + DUMP_BYTES("Input key", key, 8 * key_count); + + /* For each individual sub-key */ + for (i = 0; i < 3; i++) { + DUMP_BYTES("(key)", key, 8); + memset(permuted_key, 0, 7); + /* For each bit of key */ + for (j = 0; j < 56; j++) { /* convert pc1 to bits of key */ + l = pc1[j]; /* integer bit location */ + m = l & 07; /* find bit */ + permuted_key[j >> 3] |= (((key[l >> 3] & /* find which key byte l is in */ + bytebit[m]) /* and which bit of that byte */ + ? 0x80 : 0) >> (j % 8)); /* and store 1-bit result */ + } + switch (i) { + case 0: + if (key_count != 1) + key += 8; /* move on to second key */ + break; + case 1: + if (key_count == 2) + key -= 8; /* go back to first key */ + else if (key_count == 3) + key += 8; /* move on to third key */ + break; + default: + break; + } + permuted_key += 7; + } + DUMP_BYTES("Output key (bytes)", permuted_key - 21, 21); +} + +#ifdef SELF_TEST +const uint8_t key1_in[] = { + /* FE01FE01FE01FE01_01FE01FE01FE01FE_FEFE0101FEFE0101 */ + 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, + 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, + 0xFE, 0xFE, 0x01, 0x01, 0xFE, 0xFE, 0x01, 0x01 +}; + +const uint32_t key1_word_in[] = { + 0xFE01FE01, 0xFE01FE01, + 0x01FE01FE, 0x01FE01FE, + 0xFEFE0101, 0xFEFE0101 +}; + +uint8_t exp_key1_out[] = { + 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, + 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, + 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33 +}; + +uint32_t exp_word_key1_out[] = { + 0x33333333, 0xAA333333, 0xAAAAAAAA, 0x5555AAAA, + 0x55555555, 0x00000055, +}; + +const uint8_t key2_in[] = { + 0xEF, 0x10, 0xBB, 0xA4, 0x23, 0x49, 0x42, 0x58, + 0x01, 0x28, 0x01, 0x4A, 0x10, 0xE4, 0x03, 0x59, + 0xFE, 0x84, 0x30, 0x29, 0x8E, 0xF1, 0x10, 0x5A +}; + +const uint32_t key2_word_in[] = { + 0xEF10BBA4, 0x23494258, + 0x0128014A, 0x10E40359, + 0xFE843029, 0x8EF1105A +}; + +uint8_t exp_key2_out[] = { + 0x0D, 0xE1, 0x1D, 0x85, 0x50, 0x9A, 0x56, 0x20, + 0xA8, 0x22, 0x94, 0x82, 0x08, 0xA0, 0x33, 0xA1, + 0x2D, 0xE9, 0x11, 0x39, 0x95 +}; + +uint32_t exp_word_key2_out[] = { + 0xE9113995, 0xA033A12D, 0x22948208, 0x9A5620A8, + 0xE11D8550, 0x0000000D +}; + +const uint8_t key3_in[] = { + 0x3F, 0xE9, 0x49, 0x4B, 0x67, 0x57, 0x07, 0x3C, + 0x89, 0x77, 0x73, 0x0C, 0xA0, 0x05, 0x41, 0x69, + 0xB3, 0x7C, 0x98, 0xD8, 0xC9, 0x35, 0x57, 0x19 +}; + +const uint32_t key3_word_in[] = { + 0xEF10BBA4, 0x23494258, + 0x0128014A, 0x10E40359, + 0xFE843029, 0x8EF1105A +}; + +uint8_t exp_key3_out[] = { + 0x02, 0x3E, 0x93, 0xA7, 0x9F, 0x18, 0xF1, 0x11, + 0xC6, 0x96, 0x00, 0x62, 0xA8, 0x96, 0x02, 0x3E, + 0x93, 0xA7, 0x9F, 0x18, 0xF1 +}; + +uint32_t exp_word_key3_out[] = { + 0xE9113995, 0xA033A12D, 0x22948208, 0x9A5620A8, + 0xE11D8550, 0x0000000D +}; + +const uint8_t key4_in[] = { + 0x3F, 0xE9, 0x49, 0x4B, 0x67, 0x57, 0x07, 0x3C, + 0x89, 0x77, 0x73, 0x0C, 0xA0, 0x05, 0x41, 0x69, +}; + +const uint32_t key4_word_in[] = { + 0xEF10BBA4, 0x23494258, + 0x0128014A, 0x10E40359, + 0xFE843029, 0x8EF1105A +}; + +const uint8_t key5_in[] = { + 0x3F, 0xE9, 0x49, 0x4B, 0x67, 0x57, 0x07, 0x3C, + 0x89, 0x77, 0x73, 0x0C, 0xA0, 0x05, 0x41, 0x69, + 0x3F, 0xE9, 0x49, 0x4B, 0x67, 0x57, 0x07, 0x3C, +}; + +uint8_t exp_key4_out[] = { + 0x0D, 0xE1, 0x1D, 0x85, 0x50, 0x9A, 0x56, 0x20, + 0xA8, 0x22, 0x94, 0x82, 0x08, 0xA0, 0x33, 0xA1, + 0x2D, 0xE9, 0x11, 0x39, 0x95 +}; + +uint32_t exp_word_key4_out[] = { + 0xE9113995, 0xA033A12D, 0x22948208, 0x9A5620A8, + 0xE11D8550, 0x0000000D +}; + +const uint8_t key6_in[] = { + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 +}; + +uint8_t exp_key6_out[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +uint32_t exp_word_key6_out[] = { + 0x00000000, 0x0000000, 0x0000000, 0x00000000, + 0x00000000, 0x0000000 +}; + +const uint8_t key7_in[] = { + /* 01FE01FE01FE01FE_FE01FE01FE01FE01_0101FEFE0101FEFE */ + /* 0101FEFE0101FEFE_FE01FE01FE01FE01_01FE01FE01FE01FE */ + 0x01, 0x01, 0xFE, 0xFE, 0x01, 0x01, 0xFE, 0xFE, + 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, + 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0xFE, +}; + +uint8_t exp_key7_out[] = { + 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x55, + 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa +}; + +uint32_t exp_word_key7_out[] = { + 0xcccccccc, 0x55cccccc, 0x55555555, 0xaaaa5555, + 0xaaaaaaaa, 0x000000aa +}; + +int run_test(const uint8_t * key_in, + const int key_count, + const uint32_t * key_word_in, + const uint8_t * exp_bytes_key_out, + const uint32_t * exp_word_key_out) +{ + uint8_t key_out[22]; + uint32_t word_key_out[6]; + int failed = 0; + + memset(key_out, 0x42, 22); + fsl_shw_permute1_bytes(key_in, key_out, key_count); + if (memcmp(key_out, exp_bytes_key_out, 21) != 0) { + printf("bytes_to_bytes: ERROR: \n"); + DUMP_BYTES("key_in", key_in, 8 * key_count); + DUMP_BYTES("key_out", key_out, 21); + DUMP_BYTES("exp_out", exp_bytes_key_out, 21); + failed |= 1; + } else if (key_out[21] != 0x42) { + printf("bytes_to_bytes: ERROR: Buffer overflow 0x%02x\n", + (int)key_out[21]); + } else { + printf("bytes_to_bytes: OK\n"); + } +#if 0 + memset(word_key_out, 0x42, 21); + fsl_shw_permute1_bytes_to_words(key_in, word_key_out, key_count); + if (memcmp(word_key_out, exp_word_key_out, 21) != 0) { + printf("bytes_to_words: ERROR: \n"); + DUMP_BYTES("key_in", key_in, 8 * key_count); + DUMP_WORDS("key_out", word_key_out, 6); + DUMP_WORDS("exp_out", exp_word_key_out, 6); + failed |= 1; + } else { + printf("bytes_to_words: OK\n"); + } + + if (key_word_in != NULL) { + memset(word_key_out, 0x42, 21); + fsl_shw_permute1_words_to_words(key_word_in, word_key_out); + if (memcmp(word_key_out, exp_word_key_out, 21) != 0) { + printf("words_to_words: ERROR: \n"); + DUMP_BYTES("key_in", key_in, 24); + DUMP_WORDS("key_out", word_key_out, 6); + DUMP_WORDS("exp_out", exp_word_key_out, 6); + failed |= 1; + } else { + printf("words_to_words: OK\n"); + } + } +#endif + + return failed; +} /* end fn run_test */ + +int main() +{ + int failed = 0; + + printf("key1\n"); + failed |= + run_test(key1_in, 3, key1_word_in, exp_key1_out, exp_word_key1_out); + printf("\nkey2\n"); + failed |= + run_test(key2_in, 3, key2_word_in, exp_key2_out, exp_word_key2_out); + printf("\nkey3\n"); + failed |= run_test(key3_in, 3, NULL, exp_key3_out, exp_word_key3_out); + printf("\nkey4\n"); + failed |= run_test(key4_in, 2, NULL, exp_key4_out, exp_word_key4_out); + printf("\nkey5\n"); + failed |= run_test(key5_in, 3, NULL, exp_key4_out, exp_word_key4_out); + printf("\nkey6 - 3\n"); + failed |= run_test(key6_in, 3, NULL, exp_key6_out, exp_word_key6_out); + printf("\nkey6 - 2\n"); + failed |= run_test(key6_in, 2, NULL, exp_key6_out, exp_word_key6_out); + printf("\nkey6 - 1\n"); + failed |= run_test(key6_in, 1, NULL, exp_key6_out, exp_word_key6_out); + printf("\nkey7\n"); + failed |= run_test(key7_in, 3, NULL, exp_key7_out, exp_word_key7_out); + printf("\n"); + + if (failed != 0) { + printf("TEST FAILED\n"); + } + return failed; +} + +#endif /* SELF_TEST */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/shw_hash.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/shw_hash.c @@ -0,0 +1,328 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file shw_hash.c + * + * This file contains implementations for use of the (internal) SHW hash + * software computation. It defines the usual three steps: + * + * - #shw_hash_init() + * - #shw_hash_update() + * - #shw_hash_final() + * + * In support of the above functions, it also contains these functions: + * - #sha256_init() + * - #sha256_process_block() + * + * + * These functions depend upon the Linux Endian functions __be32_to_cpu(), + * __cpu_to_be32() to convert a 4-byte big-endian array to an integer and + * vice-versa. For those without Linux, it should be pretty obvious what they + * do. + * + * The #shw_hash_update() and #shw_hash_final() functions are generic enough to + * support SHA-1/SHA-224/SHA-256, as needed. Some extra tweaking would be + * necessary to get them to support SHA-384/SHA-512. + * + */ + +#include "shw_driver.h" +#include "shw_hash.h" + +#ifndef __KERNEL__ +#include +#include /* or whichever is proper for target arch */ +#define printk printf +#endif + +/*! + * Rotate a value right by a number of bits. + * + * @param x Word of data which needs rotating + * @param y Number of bits to rotate + * + * @return The new value + */ +inline uint32_t rotr32fixed(uint32_t x, unsigned int y) +{ + return (uint32_t) ((x >> y) | (x << (32 - y))); +} + +#define blk0(i) (W[i] = data[i]) +// Referencing parameters so many times is really poor practice. Do not imitate these macros +#define blk2(i) (W[i & 15] += s1(W[(i - 2) & 15]) + W[(i - 7) & 15] + s0(W[(i - 15) & 15])) + +#define Ch(x,y,z) (z ^ (x & (y ^ z))) +#define Maj(x,y,z) ((x & y) | (z & (x | y))) + +#define a(i) T[(0 - i) & 7] +#define b(i) T[(1 - i) & 7] +#define c(i) T[(2 - i) & 7] +#define d(i) T[(3 - i) & 7] +#define e(i) T[(4 - i) & 7] +#define f(i) T[(5 - i) & 7] +#define g(i) T[(6 - i) & 7] +#define h(i) T[(7 - i) & 7] + +// This is a bad way to write a multi-statement macro... and referencing 'i' so many +// times is really poor practice. Do not imitate. +#define R(i) h(i) += S1( e(i)) + Ch(e(i), f(i), g(i)) + K[i + j] +(j ? blk2(i) : blk0(i));\ + d(i) += h(i);h(i) += S0(a(i)) + Maj(a(i), b(i), c(i)) + +// for SHA256 +#define S0(x) (rotr32fixed(x, 2) ^ rotr32fixed(x, 13) ^ rotr32fixed(x, 22)) +#define S1(x) (rotr32fixed(x, 6) ^ rotr32fixed(x, 11) ^ rotr32fixed(x, 25)) +#define s0(x) (rotr32fixed(x, 7) ^ rotr32fixed(x, 18) ^ (x >> 3)) +#define s1(x) (rotr32fixed(x, 17) ^ rotr32fixed(x, 19) ^ (x >> 10)) + +/*! + * Initialize the Hash State + * + * Constructs the SHA256 hash engine. + * Specification: + * State Size = 32 bytes + * Block Size = 64 bytes + * Digest Size = 32 bytes + * + * @param state Address of hash state structure + * + */ +void sha256_init(shw_hash_state_t * state) +{ + state->bit_count = 0; + state->partial_count_bytes = 0; + + state->state[0] = 0x6a09e667; + state->state[1] = 0xbb67ae85; + state->state[2] = 0x3c6ef372; + state->state[3] = 0xa54ff53a; + state->state[4] = 0x510e527f; + state->state[5] = 0x9b05688c; + state->state[6] = 0x1f83d9ab; + state->state[7] = 0x5be0cd19; +} + +const uint32_t K[64] = { + 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, + 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, + 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, + 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, + 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, + 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, + 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, + 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, + 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, + 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, + 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, + 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, + 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, + 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, + 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, + 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 +}; + +/*! + * Hash a block of data into the SHA-256 hash state. + * + * This function hash the block of data in the @c partial_block + * element of the state structure into the state variables of the + * state structure. + * + * @param state Address of hash state structure + * + */ +static void sha256_process_block(shw_hash_state_t * state) +{ + uint32_t W[16]; + uint32_t T[8]; + uint32_t stack_buffer[SHW_HASH_BLOCK_WORD_SIZE]; + uint32_t *data = &stack_buffer[0]; + uint8_t *input = state->partial_block; + unsigned int i; + unsigned int j; + + /* Copy byte-oriented input block into word-oriented registers */ + for (i = 0; i < SHW_HASH_BLOCK_LEN / sizeof(uint32_t); + i++, input += sizeof(uint32_t)) { + stack_buffer[i] = __be32_to_cpu(*(uint32_t *) input); + } + + /* Copy context->state[] to working vars */ + memcpy(T, state->state, sizeof(T)); + + /* 64 operations, partially loop unrolled */ + for (j = 0; j < SHW_HASH_BLOCK_LEN; j += 16) { + R(0); + R(1); + R(2); + R(3); + R(4); + R(5); + R(6); + R(7); + R(8); + R(9); + R(10); + R(11); + R(12); + R(13); + R(14); + R(15); + } + /* Add the working vars back into context.state[] */ + state->state[0] += a(0); + state->state[1] += b(0); + state->state[2] += c(0); + state->state[3] += d(0); + state->state[4] += e(0); + state->state[5] += f(0); + state->state[6] += g(0); + state->state[7] += h(0); + + /* Wipe variables */ + memset(W, 0, sizeof(W)); + memset(T, 0, sizeof(T)); +} + +/*! + * Initialize the hash state structure + * + * @param state Address of hash state structure. + * @param alg Which hash algorithm to use (must be FSL_HASH_ALG_SHA1) + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hash_init(shw_hash_state_t * state, fsl_shw_hash_alg_t alg) +{ + if (alg != FSL_HASH_ALG_SHA256) { + return FSL_RETURN_BAD_ALGORITHM_S; + } + + sha256_init(state); + + return FSL_RETURN_OK_S; +} + +/*! + * Add input bytes to the hash + * + * The bytes are added to the partial_block element of the hash state, and as + * the partial block is filled, it is processed by sha1_process_block(). This + * function also updates the bit_count element of the hash state. + * + * @param state Address of hash state structure + * @param input Address of bytes to add to the hash + * @param input_len Numbef of bytes at @c input + * + */ +fsl_shw_return_t shw_hash_update(shw_hash_state_t * state, + const uint8_t * input, unsigned int input_len) +{ + unsigned int bytes_needed; /* Needed to fill a block */ + unsigned int bytes_to_copy; /* to copy into the block */ + + /* Account for new data */ + state->bit_count += 8 * input_len; + + /* + * Process input bytes into the ongoing block; process the block when it + * gets full. + */ + while (input_len > 0) { + bytes_needed = SHW_HASH_BLOCK_LEN - state->partial_count_bytes; + bytes_to_copy = ((input_len < bytes_needed) ? + input_len : bytes_needed); + + /* Add in the bytes and do the accounting */ + memcpy(state->partial_block + state->partial_count_bytes, + input, bytes_to_copy); + input += bytes_to_copy; + input_len -= bytes_to_copy; + state->partial_count_bytes += bytes_to_copy; + + /* Run a full block through the transform */ + if (state->partial_count_bytes == SHW_HASH_BLOCK_LEN) { + sha256_process_block(state); + state->partial_count_bytes = 0; + } + } + + return FSL_RETURN_OK_S; +} /* end fn shw_hash_update */ + +/*! + * Finalize the hash + * + * Performs the finalize operation on the previous input data & returns the + * resulting digest. The finalize operation performs the appropriate padding + * up to the block size. + * + * @param state Address of hash state structure + * @param result Location to store the hash result + * @param result_len Number of bytes of @c result to be stored. + * + * @return FSL_RETURN_OK_S if all went well, FSL_RETURN_BAD_DATA_LENGTH_S if + * hash_len is too long, otherwise an error code. + */ +fsl_shw_return_t shw_hash_final(shw_hash_state_t * state, uint8_t * result, + unsigned int result_len) +{ + static const uint8_t pad[SHW_HASH_BLOCK_LEN * 2] = { + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + }; + + uint8_t data[sizeof(state->bit_count)]; + uint32_t pad_length; + uint64_t bit_count = state->bit_count; + uint8_t hash[SHW_HASH_LEN]; + int i; + + if (result_len > SHW_HASH_LEN) { + return FSL_RETURN_BAD_DATA_LENGTH_S; + } + + /* Save the length before padding. */ + for (i = sizeof(state->bit_count) - 1; i >= 0; i--) { + data[i] = bit_count & 0xFF; + bit_count >>= 8; + } + pad_length = ((state->partial_count_bytes < 56) ? + (56 - state->partial_count_bytes) : + (120 - state->partial_count_bytes)); + + /* Pad to 56 bytes mod 64 (BLOCK_SIZE). */ + shw_hash_update(state, pad, pad_length); + + /* + * Append the length. This should trigger transform of the final block. + */ + shw_hash_update(state, data, sizeof(state->bit_count)); + + /* Copy the result into a byte array */ + for (i = 0; i < SHW_HASH_STATE_WORDS; i++) { + *(uint32_t *) (hash + 4 * i) = __cpu_to_be32(state->state[i]); + } + + /* And copy the result out to caller */ + memcpy(result, hash, result_len); + + return FSL_RETURN_OK_S; +} /* end fn shw_hash_final */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/shw_memory_mapper.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/shw_memory_mapper.c @@ -0,0 +1,213 @@ +/* + * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + + +/** + * Memory management functions, from Sahara Crypto API + * + * This is a subset of the memory management functions from the Sahara Crypto + * API, and is intended to support user secure partitions. + */ + +#include "portable_os.h" +#include "fsl_shw.h" + +#include +#include +#include + +#ifdef SHW_DEBUG +#include +#endif + +/* Page context structure. Used by wire_user_memory and unwire_user_memory */ +typedef struct page_ctx_t { + uint32_t count; + struct page **local_pages; +} page_ctx_t; + +/** +******************************************************************************* +* Map and wire down a region of user memory. +* +* +* @param address Userspace address of the memory to wire +* @param length Length of the memory region to wire +* @param page_ctx Page context, to be passed to unwire_user_memory +* +* @return (if successful) Kernel virtual address of the wired pages +*/ +void* wire_user_memory(void* address, uint32_t length, void **page_ctx) +{ + void* kernel_black_addr = NULL; + int result = -1; + int page_index = 0; + page_ctx_t *page_context; + int nr_pages = 0; + unsigned long start_page; + fsl_shw_return_t status; + + /* Determine the number of pages being used for this link */ + nr_pages = (((unsigned long)(address) & ~PAGE_MASK) + + length + ~PAGE_MASK) >> PAGE_SHIFT; + + start_page = (unsigned long)(address) & PAGE_MASK; + + /* Allocate some memory to keep track of the wired user pages, so that + * they can be deallocated later. The block of memory will contain both + * the structure and the array of pages. + */ + page_context = kmalloc(sizeof(page_ctx_t) + + nr_pages * sizeof(struct page *), GFP_KERNEL); + + if (page_context == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; /* no memory! */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("kmalloc() failed."); +#endif + return NULL; + } + + /* Set the page pointer to point to the allocated region of memory */ + page_context->local_pages = (void*)page_context + sizeof(page_ctx_t); + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS("page_context at: %p, local_pages at: %p", + (void *)page_context, + (void *)(page_context->local_pages)); +#endif + + /* Wire down the pages from user space */ + down_read(¤t->mm->mmap_sem); + result = get_user_pages(current, current->mm, + start_page, nr_pages, + WRITE, 0 /* noforce */, + (page_context->local_pages), NULL); + up_read(¤t->mm->mmap_sem); + + if (result < nr_pages) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("get_user_pages() failed."); +#endif + if (result > 0) { + for (page_index = 0; page_index < result; page_index++) + page_cache_release((page_context->local_pages[page_index])); + + kfree(page_context); + } + return NULL; + } + + kernel_black_addr = page_address(page_context->local_pages[0]) + + ((unsigned long)address & ~PAGE_MASK); + + page_context->count = nr_pages; + *page_ctx = page_context; + + return kernel_black_addr; +} + + +/** +******************************************************************************* +* Release and unmap a region of user memory. +* +* @param page_ctx Page context from wire_user_memory +*/ +void unwire_user_memory(void** page_ctx) +{ + int page_index = 0; + struct page_ctx_t *page_context = *page_ctx; + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS("page_context at: %p, first page at:%p, count: %i", + (void *)page_context, + (void *)(page_context->local_pages), + page_context->count); +#endif + + if ((page_context != NULL) && (page_context->local_pages != NULL)) { + for (page_index = 0; page_index < page_context->count; page_index++) + page_cache_release(page_context->local_pages[page_index]); + + kfree(page_context); + *page_ctx = NULL; + } +} + + +/** +******************************************************************************* +* Map some physical memory into a users memory space +* +* @param vma Memory structure to map to +* @param physical_addr Physical address of the memory to be mapped in +* @param size Size of the memory to map (bytes) +* +* @return +*/ +os_error_code +map_user_memory(struct vm_area_struct *vma, uint32_t physical_addr, uint32_t size) +{ + os_error_code retval; + + /* Map the acquired partition into the user's memory space */ + vma->vm_end = vma->vm_start + size; + + /* set cache policy to uncached so that each write of the UMID and + * permissions get directly to the SCC2 in order to engage it + * properly. Once the permissions have been written, it may be + * useful to provide a service for the user to request a different + * cache policy + */ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Make sure that the user cannot fork() a child which will inherit + * this mapping, as it creates a security hole. Likewise, do not + * allow the user to 'expand' his mapping beyond this partition. + */ + vma->vm_flags |= VM_IO | VM_RESERVED | VM_DONTCOPY | VM_DONTEXPAND; + + retval = remap_pfn_range(vma, + vma->vm_start, + __phys_to_pfn(physical_addr), + size, + vma->vm_page_prot); + + return retval; +} + + +/** +******************************************************************************* +* Remove some memory from a user's memory space +* +* @param user_addr Userspace address of the memory to be unmapped +* @param size Size of the memory to map (bytes) +* +* @return +*/ +os_error_code +unmap_user_memory(uint32_t user_addr, uint32_t size) +{ + os_error_code retval; + struct mm_struct *mm = current->mm; + + /* Unmap the memory region (see sys_munmap in mmap.c) */ + down_write(&mm->mmap_sem); + retval = do_munmap(mm, (unsigned long)user_addr, size); + up_write(&mm->mmap_sem); + + return retval; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/fsl_shw_rand.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/fsl_shw_rand.c @@ -0,0 +1,122 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +/*! + * @file fsl_shw_rand.c + * + * This file implements Random Number Generation functions of the FSL SHW API + * in USER MODE for talking to a standalone RNGA/RNGC device driver. + * + * It contains the fsl_shw_get_random() and fsl_shw_add_entropy() functions. + * + * These routines will build a request block and pass it to the SHW driver. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef FSL_DEBUG +#include +#include +#include +#endif /* FSL_DEBUG */ + +#include "shw_driver.h" + +extern fsl_shw_return_t validate_uco(fsl_shw_uco_t * uco); + +#if defined(FSL_HAVE_RNGA) || defined(FSL_HAVE_RNGB) || defined(FSL_HAVE_RNGC) + +/* REQ-S2LRD-PINTFC-API-BASIC-RNG-002 */ +fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* perform a sanity check / update uco */ + ret = validate_uco(user_ctx); + if (ret == FSL_RETURN_OK_S) { + struct get_random_req *req = malloc(sizeof(*req)); + + if (req == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + } else { + + init_req(&req->hdr, user_ctx); + req->size = length; + req->random = data; + + ret = + send_req(SHW_USER_REQ_GET_RANDOM, &req->hdr, + user_ctx); + } + } + + return ret; +} + +fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* perform a sanity check on the uco */ + ret = validate_uco(user_ctx); + if (ret == FSL_RETURN_OK_S) { + struct add_entropy_req *req = malloc(sizeof(*req)); + + if (req == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + } else { + init_req(&req->hdr, user_ctx); + req->size = length; + req->entropy = data; + + ret = + send_req(SHW_USER_REQ_ADD_ENTROPY, &req->hdr, + user_ctx); + } + } + + return ret; +} + +#else /* no H/W RNG block */ + +fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + + (void)user_ctx; + (void)length; + (void)data; + + return FSL_RETURN_ERROR_S; +} + +fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + + (void)user_ctx; + (void)length; + (void)data; + + return FSL_RETURN_ERROR_S; +} +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/rng_driver.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/rng_driver.c @@ -0,0 +1,1150 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! @file rng_driver.c + * + * This is the driver code for the hardware Random Number Generator (RNG). + * + * It provides the following functions to callers: + * fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t* user_ctx, + * uint32_t length, + * uint8_t* data); + * + * fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t* user_ctx, + * uint32_t length, + * uint8_t* data); + * + * The life of the driver starts at boot (or module load) time, with a call by + * the kernel to #rng_init(). As part of initialization, a background task + * running #rng_entropy_task() will be created. + * + * The life of the driver ends when the kernel is shutting down (or the driver + * is being unloaded). At this time, #rng_shutdown() is called. No function + * will ever be called after that point. In the case that the driver is + * reloaded, a new copy of the driver, with fresh global values, etc., is + * loaded, and there will be a new call to #rng_init(). + * + * A call to fsl_shw_get_random() gets converted into a work entry which is + * queued and handed off to a background task for fulfilment. This provides + * for a single thread of control for reading the RNG's FIFO register, which + * might otherwise underflow if not carefully managed. + * + * A call to fsl_shw_add_entropy() will cause the additional entropy to + * be passed directly into the hardware. + * + * In a debug configuration, it provides the following kernel functions: + * rng_return_t rng_read_register(uint32_t byte_offset, uint32_t* valuep); + * rng_return_t rng_write_register(uint32_t byte_offset, uint32_t value); + * @ingroup RNG + */ + +#include "portable_os.h" +#include "fsl_shw.h" +#include "rng_internals.h" + +#ifdef FSL_HAVE_SCC2 +#include +#else +#include +#endif + +#if defined(RNG_DEBUG) || defined(RNG_ENTROPY_DEBUG) || \ + defined(RNG_REGISTER_DEBUG) + +#include + +#else + +#define LOG_KDIAG_ARGS(fmt, ...) +#define LOG_KDIAG(diag) + +#endif + +/* These are often handy */ +#ifndef FALSE +/*! Non-true value for arguments, return values. */ +#define FALSE 0 +#endif +#ifndef TRUE +/*! True value for arguments, return values. */ +#define TRUE 1 +#endif + +/****************************************************************************** + * + * Global / Static Variables + * + *****************************************************************************/ + +/*! + * This is type void* so that a) it cannot directly be dereferenced, and b) + * pointer arithmetic on it will function for the byte offsets in rng_rnga.h + * and rng_rngc.h + * + * rng_base is the location in the iomap where the RNG's registers + * (and memory) start. + * + * The referenced data is declared volatile so that the compiler will + * not make any assumptions about the value of registers in the RNG, + * and thus will always reload the register into CPU memory before + * using it (i.e. wherever it is referenced in the driver). + * + * This value should only be referenced by the #RNG_READ_REGISTER and + * #RNG_WRITE_REGISTER macros and their ilk. All dereferences must be + * 32 bits wide. + */ +static volatile void *rng_base; + +/*! + * Flag to say whether interrupt handler has been registered for RNG + * interrupt */ +static int rng_irq_set = FALSE; + +/*! + * Size of the RNG's OUTPUT_FIFO, in words. Retrieved with + * #RNG_GET_FIFO_SIZE() during driver initialization. + */ +static int rng_output_fifo_size; + +/*! Major number for device driver. */ +static int rng_major; + +/*! Registration handle for registering driver with OS. */ +os_driver_reg_t rng_reg_handle; + +/*! + * Internal flag to know whether RNG is in Failed state (and thus many + * registers are unavailable). If the value ever goes to #RNG_STATUS_FAILED, + * it will never change. + */ +static volatile rng_status_t rng_availability = RNG_STATUS_INITIAL; + +/*! + * Global lock for the RNG driver. Mainly used for entries on the RNG work + * queue. + */ +static os_lock_t rng_queue_lock = NULL; + +/*! + * Queue for the RNG task to process. + */ +static shw_queue_t rng_work_queue; + +/*! + * Flag to say whether task initialization succeeded. + */ +static unsigned task_started = FALSE; +/*! + * Waiting queue for RNG SELF TESTING + */ +static DECLARE_COMPLETION(rng_self_testing); +static DECLARE_COMPLETION(rng_seed_done); +/*! + * Object for blocking-mode callers of RNG driver to sleep. + */ +OS_WAIT_OBJECT(rng_wait_queue); + +/****************************************************************************** + * + * Function Implementations - Externally Accessible + * + *****************************************************************************/ + +/*****************************************************************************/ +/* fn rng_init() */ +/*****************************************************************************/ +/*! + * Initialize the driver. + * + * Set up the driver to have access to RNG device registers and verify that + * it appears to be a proper working device. + * + * Set up interrupt handling. Assure RNG is ready to go and (possibly) set it + * into High Assurance mode. Create a background task to run + * #rng_entropy_task(). Set up up a callback with the SCC driver should the + * security alarm go off. Tell the kernel that the driver is here. + * + * This routine is called during kernel init or module load (insmod). + * + * The function will fail in one of two ways: Returning OK to the caller so + * that kernel startup / driver initialization completes, or returning an + * error. In the success case, the function could set the rng_avaailability to + * RNG_STATUS_FAILED so that only minimal support (e.g. register peek / poke) + * is available in the driver. + * + * @return a call to os_dev_init_return() + */ +OS_DEV_INIT(rng_init) +{ + struct clk *clk; + os_error_code return_code = OS_ERROR_FAIL_S; + rng_availability = RNG_STATUS_CHECKING; + +#if !defined(FSL_HAVE_RNGA) + INIT_COMPLETION(rng_self_testing); + INIT_COMPLETION(rng_seed_done); +#endif + rng_work_queue.head = NULL; + rng_work_queue.tail = NULL; + + clk = clk_get(NULL, "rng_clk"); + + // Check that the clock was found + if (IS_ERR(clk)) { + LOG_KDIAG("RNG: Failed to find rng_clock."); + return_code = OS_ERROR_FAIL_S; + goto check_err; + } + + clk_enable(clk); + + os_printk(KERN_INFO "RNG Driver: Loading\n"); + + return_code = rng_map_RNG_memory(); + if (return_code != OS_ERROR_OK_S) { + rng_availability = RNG_STATUS_UNIMPLEMENTED; + LOG_KDIAG_ARGS("RNG: Driver failed to map RNG registers. %d", + return_code); + goto check_err; + } + LOG_KDIAG_ARGS("RNG Driver: rng_base is 0x%08x", (uint32_t) rng_base); + /*Check SCC keys are fused */ + if (RNG_HAS_ERROR()) { + if (RNG_HAS_BAD_KEY()) { +#ifdef RNG_DEBUG +#if !defined(FSL_HAVE_RNGA) + LOG_KDIAG("ERROR: BAD KEYS SELECTED"); + { + uint32_t rngc_status = + RNG_READ_REGISTER(RNGC_STATUS); + uint32_t rngc_error = + RNG_READ_REGISTER(RNGC_ERROR); + LOG_KDIAG_ARGS + ("status register: %08x, error status: %08x", + rngc_status, rngc_error); + } +#endif +#endif + rng_availability = RNG_STATUS_FAILED; + return_code = OS_ERROR_FAIL_S; + goto check_err; + } + } + + /* Check RNG configuration and status */ + return_code = rng_grab_config_values(); + if (return_code != OS_ERROR_OK_S) { + rng_availability = RNG_STATUS_UNIMPLEMENTED; + goto check_err; + } + + /* Masking All Interrupts */ + /* They are unmasked later in rng_setup_interrupt_handling() */ + RNG_MASK_ALL_INTERRUPTS(); + + RNG_WAKE(); + + /* Determine status of RNG */ + if (RNG_OSCILLATOR_FAILED()) { + LOG_KDIAG("RNG Driver: RNG Oscillator is dead"); + rng_availability = RNG_STATUS_FAILED; + goto check_err; + } + + /* Oscillator not dead. Setup interrupt code and start the RNG. */ + if ((return_code = rng_setup_interrupt_handling()) == OS_ERROR_OK_S) { +#if defined(FSL_HAVE_RNGA) + scc_return_t scc_code; +#endif + + RNG_GO(); + + /* Self Testing For RNG */ + do { + RNG_CLEAR_ERR(); + + /* wait for Clearing Erring finished */ + msleep(1); + + RNG_UNMASK_ALL_INTERRUPTS(); + RNG_SELF_TEST(); +#if !defined(FSL_HAVE_RNGA) + wait_for_completion(&rng_self_testing); +#endif + } while (RNG_CHECK_SELF_ERR()); + + RNG_CLEAR_ALL_STATUS(); + /* checking for RNG SEED done */ + do { + RNG_CLEAR_ERR(); + RNG_SEED_GEN(); +#if !defined(FSL_HAVE_RNGA) + wait_for_completion(&rng_seed_done); +#endif + } while (RNG_CHECK_SEED_ERR()); +#ifndef RNG_NO_FORCE_HIGH_ASSURANCE + RNG_SET_HIGH_ASSURANCE(); +#endif + if (RNG_GET_HIGH_ASSURANCE()) { + LOG_KDIAG("RNG Driver: RNG is in High Assurance mode"); + } else { +#ifndef RNG_NO_FORCE_HIGH_ASSURANCE + LOG_KDIAG + ("RNG Driver: RNG could not be put in High Assurance mode"); + rng_availability = RNG_STATUS_FAILED; + goto check_err; +#endif /* RNG_NO_FORCE_HIGH_ASSURANCE */ + } + + /* Check that RNG is OK */ + if (!RNG_WORKING()) { + LOG_KDIAG_ARGS + ("RNG determined to be inoperable. Status %08x", + RNG_GET_STATUS()); + /* Couldn't wake it up or other problem */ + rng_availability = RNG_STATUS_FAILED; + goto check_err; + } + + rng_queue_lock = os_lock_alloc_init(); + if (rng_queue_lock == NULL) { + LOG_KDIAG("RNG: lock initialization failed"); + rng_availability = RNG_STATUS_FAILED; + goto check_err; + } + + return_code = os_create_task(rng_entropy_task); + if (return_code != OS_ERROR_OK_S) { + LOG_KDIAG("RNG: task initialization failed"); + rng_availability = RNG_STATUS_FAILED; + goto check_err; + } else { + task_started = TRUE; + } +#ifdef FSL_HAVE_RNGA + scc_code = scc_monitor_security_failure(rng_sec_failure); + if (scc_code != SCC_RET_OK) { + LOG_KDIAG_ARGS("Failed to register SCC callback: %d", + scc_code); +#ifndef RNG_NO_FORCE_HIGH_ASSURANCE + return_code = OS_ERROR_FAIL_S; + goto check_err; +#endif + } +#endif /* FSL_HAVE_RNGA */ + return_code = os_driver_init_registration(rng_reg_handle); + if (return_code != OS_ERROR_OK_S) { + goto check_err; + } + /* add power suspend here */ + /* add power resume here */ + return_code = + os_driver_complete_registration(rng_reg_handle, + rng_major, RNG_DRIVER_NAME); + } + /* RNG is working */ + + check_err: + + /* If FIFO underflow or other error occurred during drain, this will fail, + * as system will have been put into fail mode by SCC. */ + if ((return_code == OS_ERROR_OK_S) + && (rng_availability == RNG_STATUS_CHECKING)) { + RNG_PUT_RNG_TO_SLEEP(); + rng_availability = RNG_STATUS_OK; /* RNG & driver are ready */ + } else if (return_code != OS_ERROR_OK_S) { + os_printk(KERN_ALERT "Driver initialization failed. %d", + return_code); + rng_cleanup(); + } + + os_dev_init_return(return_code); + +} /* rng_init */ + +/*****************************************************************************/ +/* fn rng_shutdown() */ +/*****************************************************************************/ +/*! + * Prepare driver for exit. + * + * This is called during @c rmmod when the driver is unloading. + * Try to undo whatever was done during #rng_init(), to make the machine be + * in the same state, if possible. + * + * Calls rng_cleanup() to do all work, and then unmap device's register space. + */ +OS_DEV_SHUTDOWN(rng_shutdown) +{ + LOG_KDIAG("shutdown called"); + + rng_cleanup(); + + os_driver_remove_registration(rng_reg_handle); + if (rng_base != NULL) { + /* release the virtual memory map to the RNG */ + os_unmap_device((void *)rng_base, RNG_ADDRESS_RANGE); + rng_base = NULL; + } + + os_dev_shutdown_return(OS_ERROR_OK_S); +} /* rng_shutdown */ + +/*****************************************************************************/ +/* fn rng_cleanup() */ +/*****************************************************************************/ +/*! + * Undo everything done by rng_init() and place driver in fail mode. + * + * Deregister from SCC, stop tasklet, shutdown the RNG. Leave the register + * map in place in case other drivers call rng_read/write_register() + * + * @return void + */ +static void rng_cleanup(void) +{ + struct clk *clk; + +#ifdef FSL_HAVE_RNGA + scc_stop_monitoring_security_failure(rng_sec_failure); +#endif + + clk = clk_get(NULL, "rng_clk"); + clk_disable(clk); + if (task_started) { + os_dev_stop_task(rng_entropy_task); + } + + if (rng_base != NULL) { + /* mask off RNG interrupts */ + RNG_MASK_ALL_INTERRUPTS(); + RNG_SLEEP(); + + if (rng_irq_set) { + /* unmap the interrupts from the IRQ lines */ + os_deregister_interrupt(INT_RNG); + rng_irq_set = FALSE; + } + LOG_KDIAG("Leaving rng driver status as failed"); + rng_availability = RNG_STATUS_FAILED; + } else { + LOG_KDIAG("Leaving rng driver status as unimplemented"); + rng_availability = RNG_STATUS_UNIMPLEMENTED; + } + LOG_KDIAG("Cleaned up"); +} /* rng_cleanup */ + +/*! + * Post-process routine for fsl_shw_get_random(). + * + * This function will copy the random data generated by the background task + * into the user's buffer and then free the local buffer. + * + * @param gen_entry The work request. + * + * @return 0 = meaning work completed, pass back result. + */ +static uint32_t finish_random(shw_queue_entry_t * gen_entry) +{ + rng_work_entry_t *work = (rng_work_entry_t *) gen_entry; + + if (work->hdr.flags & FSL_UCO_USERMODE_USER) { + os_copy_to_user(work->data_user, work->data_local, + work->length); + } else { + memcpy(work->data_user, work->data_local, work->length); + } + + os_free_memory(work->data_local); + work->data_local = NULL; + + return 0; /* means completed. */ +} + +/* REQ-FSLSHW-PINTFC-API-BASIC-RNG-002 */ +/*****************************************************************************/ +/* fn fsl_shw_get_random() */ +/*****************************************************************************/ +/*! + * Get random data. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length The number of octets of @a data being requested. + * @param data A pointer to a location of @a length octets to where + * random data will be returned. + * + * @return FSL_RETURN_NO_RESOURCE_S A return code of type #fsl_shw_return_t. + * FSL_RETURN_OK_S + */ +fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, uint32_t length, + uint8_t * data) +{ + fsl_shw_return_t return_code = FSL_RETURN_NO_RESOURCE_S; + /* Boost up length to cover any 'missing' bytes at end of a word */ + uint32_t *buf = os_alloc_memory(length + 3, 0); + volatile rng_work_entry_t *work = os_alloc_memory(sizeof(*work), 0); + + if ((rng_availability != RNG_STATUS_OK) || (buf == NULL) + || (work == NULL)) { + if (rng_availability != RNG_STATUS_OK) { + LOG_KDIAG_ARGS("rng not available: %d\n", + rng_availability); + } else { + LOG_KDIAG_ARGS + ("Resource allocation failure: %d or %d bytes", + length, sizeof(*work)); + } + /* Cannot perform function. Clean up and clear out. */ + if (buf != NULL) { + os_free_memory(buf); + } + if (work != NULL) { + os_free_memory((void *)work); + } + } else { + unsigned blocking = user_ctx->flags & FSL_UCO_BLOCKING_MODE; + + work->hdr.user_ctx = user_ctx; + work->hdr.flags = user_ctx->flags; + work->hdr.callback = user_ctx->callback; + work->hdr.user_ref = user_ctx->user_ref; + work->hdr.postprocess = finish_random; + work->length = length; + work->data_local = buf; + work->data_user = data; + + RNG_ADD_WORK_ENTRY((rng_work_entry_t *) work); + + if (blocking) { + os_sleep(rng_wait_queue, work->completed != FALSE, + FALSE); + finish_random((shw_queue_entry_t *) work); + return_code = work->hdr.code; + os_free_memory((void *)work); + } else { + return_code = FSL_RETURN_OK_S; + } + } + + return return_code; +} /* fsl_shw_get_entropy */ + +/*****************************************************************************/ +/* fn fsl_shw_add_entropy() */ +/*****************************************************************************/ +/*! + * Add entropy to random number generator. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length Number of bytes at @a data. + * @param data Entropy to add to random number generator. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, uint32_t length, + uint8_t * data) +{ + fsl_shw_return_t return_code = FSL_RETURN_NO_RESOURCE_S; +#if defined(FSL_HAVE_RNGC) + /* No Entropy Register in RNGC */ + return_code = FSL_RETURN_OK_S; +#else + uint32_t *local_data = NULL; + if (rng_availability == RNG_STATUS_OK) { + /* make 32-bit aligned place to hold data */ + local_data = os_alloc_memory(length + 3, 0); + if (local_data == NULL) { + return_code = FSL_RETURN_NO_RESOURCE_S; + } else { + memcpy(local_data, data, length); + + /* Copy one word at a time to hardware */ + while (TRUE) { + register uint32_t *ptr = local_data; + + RNG_ADD_ENTROPY(*ptr++); + if (length <= 4) { + break; + } + length -= 4; + } + return_code = FSL_RETURN_OK_S; + os_free_memory(local_data); + } /* else local_data not NULL */ + + } +#endif + /* rng_availability is OK */ + return return_code; +} /* fsl_shw_add_entropy */ + +#ifdef RNG_REGISTER_PEEK_POKE +/*****************************************************************************/ +/* fn rng_read_register() */ +/*****************************************************************************/ +/* + * Debug routines to allow reading of RNG registers. + * + * This routine is only for accesses by other than this driver. + * + * @param register_offset The byte offset of the register to be read. + * @param value Pointer to store the value of the register. + * + * @return RNG_RET_OK or an error return. + */ +rng_return_t rng_read_register(uint32_t register_offset, uint32_t * value) +{ + rng_return_t return_code = RNG_RET_FAIL; + + if ((rng_availability == RNG_STATUS_OK) + || (rng_availability == RNG_STATUS_FAILED)) { + if ((rng_check_register_offset(register_offset) + && rng_check_register_accessible(register_offset, + RNG_CHECK_READ))) { + /* The guards let the check through */ + *value = RNG_READ_REGISTER(register_offset); + return_code = RNG_RET_OK; + } + } + + return return_code; +} /* rng_read_register */ + +/*****************************************************************************/ +/* fn rng_write_register() */ +/*****************************************************************************/ +/* + * Debug routines to allow writing of RNG registers. + * + * This routine is only for accesses by other than this driver. + * + * @param register_offset The byte offset of the register to be written. + * @param value Value to store in the register. + * + * @return RNG_RET_OK or an error return. + */ +rng_return_t rng_write_register(uint32_t register_offset, uint32_t value) +{ + rng_return_t return_code = RNG_RET_FAIL; + + if ((rng_availability == RNG_STATUS_OK) + || (rng_availability == RNG_STATUS_FAILED)) { + if ((rng_check_register_offset(register_offset) + && rng_check_register_accessible(register_offset, + RNG_CHECK_WRITE))) { + RNG_WRITE_REGISTER(register_offset, value); + return_code = RNG_RET_OK; + } + } + + return return_code; +} /* rng_write_register */ +#endif /* RNG_REGISTER_PEEK_POKE */ + +/****************************************************************************** + * + * Function Implementations - Internal + * + *****************************************************************************/ + +#ifdef RNG_REGISTER_PEEK_POKE +/*****************************************************************************/ +/* fn check_register_offset() */ +/*****************************************************************************/ +/*! + * Verify that the @c offset is appropriate for the RNG's register set. + * + * @param[in] offset The (byte) offset within the RNG block + * of the register to be accessed. See + * RNG(A, C) register definitions for meanings. + * + * This routine is only for checking accesses by other than this driver. + * + * @return 0 if register offset out of bounds, 1 if ok to use + */ +inline int rng_check_register_offset(uint32_t offset) +{ + int return_code = FALSE; /* invalid */ + + /* Make sure offset isn't too high and also that it is aligned to + * aa 32-bit offset (multiple of four). + */ + if ((offset < RNG_ADDRESS_RANGE) && (offset % sizeof(uint32_t) == 0)) { + return_code = TRUE; /* OK */ + } else { + pr_debug("RNG: Denied access to offset %8x\n", offset); + } + + return return_code; + +} /* rng_check_register */ + +/*****************************************************************************/ +/* fn check_register_accessible() */ +/*****************************************************************************/ +/*! + * Make sure that register access is legal. + * + * Verify that, if in secure mode, only safe registers are used. + * For any register access, make sure that read-only registers are not written + * and that write-only registers are not read. This check also disallows any + * access to the RNG's Output FIFO, to prevent other drivers from draining the + * FIFO and causing an underflow condition. + * + * This routine is only for checking accesses by other than this driver. + * + * @param offset The (byte) offset within the RNG block + * of the register to be accessed. See + * @ref rngregs for meanings. + * @param access_write 0 for read, anything else for write + * + * @return 0 if invalid, 1 if OK. + */ +static int rng_check_register_accessible(uint32_t offset, int access_write) +{ + int return_code = FALSE; /* invalid */ + uint32_t secure = RNG_GET_HIGH_ASSURANCE(); + + /* First check for RNG in Secure Mode -- most registers inaccessible. + * Also disallowing access to RNG_OUTPUT_FIFO except by the driver. + */ + if (! +#ifdef FSL_HAVE_RNGA + (secure && + ((offset == RNGA_OUTPUT_FIFO) || + (offset == RNGA_MODE) || + (offset == RNGA_VERIFICATION_CONTROL) || + (offset == RNGA_OSCILLATOR_CONTROL_COUNTER) || + (offset == RNGA_OSCILLATOR1_COUNTER) || + (offset == RNGA_OSCILLATOR2_COUNTER) || + (offset == RNGA_OSCILLATOR_COUNTER_STATUS))) +#else /* RNGB or RNGC */ + (secure && + ((offset == RNGC_FIFO) || + (offset == RNGC_VERIFICATION_CONTROL) || + (offset == RNGC_OSC_COUNTER_CONTROL) || + (offset == RNGC_OSC_COUNTER) || + (offset == RNGC_OSC_COUNTER_STATUS))) +#endif + ) { + + /* Passed that test. Either not in high assurance, and/or are + checking register that is always available. Now check + R/W permissions. */ + if (access_write == RNG_CHECK_READ) { /* read request */ + /* Only the entropy register is write-only */ +#ifdef FSL_HAVE_RNGC + /* No registers are write-only */ + return_code = TRUE; +#else /* else RNGA or RNGB */ +#ifdef FSL_HAVE_RNGA + if (1) { +#else + if (!(offset == RNGB_ENTROPY)) { +#endif + return_code = TRUE; /* Let all others be read */ + } else { + pr_debug + ("RNG: Offset %04x denied read access\n", + offset); + } +#endif /* RNGA or RNGB */ + } /* read */ + else { /* access_write means write */ + /* Check against list of non-writable registers */ + if (! +#ifdef FSL_HAVE_RNGA + ((offset == RNGA_STATUS) || + (offset == RNGA_OUTPUT_FIFO) || + (offset == RNGA_OSCILLATOR1_COUNTER) || + (offset == RNGA_OSCILLATOR2_COUNTER) || + (offset == RNGA_OSCILLATOR_COUNTER_STATUS)) +#else /* FSL_HAVE_RNGB or FSL_HAVE_RNGC */ + ((offset == RNGC_STATUS) || + (offset == RNGC_FIFO) || + (offset == RNGC_OSC_COUNTER) || + (offset == RNGC_OSC_COUNTER_STATUS)) +#endif + ) { + return_code = TRUE; /* can be written */ + } else { + LOG_KDIAG_ARGS + ("Offset %04x denied write access", offset); + } + } /* write */ + } /* not high assurance and inaccessible register... */ + else { + LOG_KDIAG_ARGS("Offset %04x denied high-assurance access", + offset); + } + + return return_code; +} /* rng_check_register_accessible */ +#endif /* RNG_REGISTER_PEEK_POKE */ + +/*****************************************************************************/ +/* fn rng_irq() */ +/*****************************************************************************/ +/*! + * This is the interrupt handler for the RNG. It is only ever invoked if the + * RNG detects a FIFO Underflow error. + * + * If the error is a Security Violation, this routine will + * set the #rng_availability to #RNG_STATUS_FAILED, as the entropy pool may + * have been corrupted. The RNG will also be placed into low power mode. The + * SCC will have noticed the problem as well. + * + * The other possibility, if the RNG is not in High Assurance mode, would be + * simply a FIFO Underflow. No special action, other than to + * clear the interrupt, is taken. + */ +OS_DEV_ISR(rng_irq) +{ + int handled = FALSE; /* assume interrupt isn't from RNG */ + + LOG_KDIAG("rng irq!"); + + if (RNG_SEED_DONE()) { + complete(&rng_seed_done); + RNG_CLEAR_ALL_STATUS(); + handled = TRUE; + } + + if (RNG_SELF_TEST_DONE()) { + complete(&rng_self_testing); + RNG_CLEAR_ALL_STATUS(); + handled = TRUE; + } + /* Look to see whether RNG needs attention */ + if (RNG_HAS_ERROR()) { + if (RNG_GET_HIGH_ASSURANCE()) { + RNG_SLEEP(); + rng_availability = RNG_STATUS_FAILED; + RNG_MASK_ALL_INTERRUPTS(); + } + handled = TRUE; + /* Clear the interrupt */ + RNG_CLEAR_ALL_STATUS(); + + } + os_dev_isr_return(handled); +} /* rng_irq */ + +/*****************************************************************************/ +/* fn map_RNG_memory() */ +/*****************************************************************************/ +/*! + * Place the RNG's memory into kernel virtual space. + * + * @return OS_ERROR_OK_S on success, os_error_code on failure + */ +static os_error_code rng_map_RNG_memory(void) +{ + os_error_code error_code = OS_ERROR_FAIL_S; + + rng_base = os_map_device(RNG_BASE_ADDR, RNG_ADDRESS_RANGE); + if (rng_base == NULL) { + /* failure ! */ + LOG_KDIAG("RNG Driver: ioremap failed."); + } else { + error_code = OS_ERROR_OK_S; + } + + return error_code; +} /* rng_map_RNG_memory */ + +/*****************************************************************************/ +/* fn rng_setup_interrupt_handling() */ +/*****************************************************************************/ +/*! + * Register #rng_irq() as the interrupt handler for #INT_RNG. + * + * @return OS_ERROR_OK_S on success, os_error_code on failure + */ +static os_error_code rng_setup_interrupt_handling(void) +{ + os_error_code error_code; + + /* + * Install interrupt service routine for the RNG. Ignore the + * assigned IRQ number. + */ + error_code = os_register_interrupt(RNG_DRIVER_NAME, INT_RNG, + OS_DEV_ISR_REF(rng_irq)); + if (error_code != OS_ERROR_OK_S) { + LOG_KDIAG("RNG Driver: Error installing Interrupt Handler"); + } else { + rng_irq_set = TRUE; + RNG_UNMASK_ALL_INTERRUPTS(); + } + + return error_code; +} /* rng_setup_interrupt_handling */ + +/*****************************************************************************/ +/* fn rng_grab_config_values() */ +/*****************************************************************************/ +/*! + * Read configuration information from the RNG. + * + * Sets #rng_output_fifo_size. + * + * @return A error code indicating whether the part is the expected one. + */ +static os_error_code rng_grab_config_values(void) +{ + enum rng_type type; + os_error_code ret = OS_ERROR_FAIL_S; + + /* Go for type, versions... */ + type = RNG_GET_RNG_TYPE(); + + /* Make sure type is the one this code has been compiled for. */ + if (RNG_VERIFY_TYPE(type)) { + rng_output_fifo_size = RNG_GET_FIFO_SIZE(); + if (rng_output_fifo_size != 0) { + ret = OS_ERROR_OK_S; + } + } + if (ret != OS_ERROR_OK_S) { + LOG_KDIAG_ARGS + ("Unknown or unexpected RNG type %d (FIFO size %d)." + " Failing driver initialization", type, + rng_output_fifo_size); + } + + return ret; +} + + /* rng_grab_config_values */ + +/*****************************************************************************/ +/* fn rng_drain_fifo() */ +/*****************************************************************************/ +/*! + * This function copies words from the RNG FIFO into the caller's buffer. + * + * + * @param random_p Location to copy random data + * @param count_words Number of words to copy + * + * @return An error code. + */ +static fsl_shw_return_t rng_drain_fifo(uint32_t * random_p, int count_words) +{ + + int words_in_rng; /* Number of words available now in RNG */ + fsl_shw_return_t code = FSL_RETURN_ERROR_S; + int sequential_count = 0; /* times through big while w/empty FIFO */ + int fifo_empty_count = 0; /* number of times FIFO was empty */ + int max_sequential = 0; /* max times 0 seen in a row */ +#if !defined(FSL_HAVE_RNGA) + int count_for_reseed = 0; + INIT_COMPLETION(rng_seed_done); +#endif +#if !defined(FSL_HAVE_RNGA) + if (RNG_RESEED()) { + do { + LOG_KDIAG("Reseeding RNG"); + + RNG_CLEAR_ERR(); + RNG_SEED_GEN(); + wait_for_completion(&rng_seed_done); + if (count_for_reseed == 3) { + os_printk(KERN_ALERT + "Device was not able to enter RESEED Mode\n"); + code = FSL_RETURN_INTERNAL_ERROR_S; + } + count_for_reseed++; + } while (RNG_CHECK_SEED_ERR()); + } +#endif + /* Copy all of them in. Stop if pool fills. */ + while ((rng_availability == RNG_STATUS_OK) && (count_words > 0)) { + /* Ask RNG how many words currently in FIFO */ + words_in_rng = RNG_GET_WORDS_IN_FIFO(); + if (words_in_rng == 0) { + ++sequential_count; + fifo_empty_count++; + if (sequential_count > max_sequential) { + max_sequential = sequential_count; + } + if (sequential_count >= RNG_MAX_TRIES) { + LOG_KDIAG_ARGS("FIFO staying empty (%d)", + words_in_rng); + code = FSL_RETURN_NO_RESOURCE_S; + break; + } + } else { + /* Found at least one word */ + sequential_count = 0; + /* Now adjust: words_in_rng = MAX(count_words, words_in_rng) */ + words_in_rng = (count_words < words_in_rng) + ? count_words : words_in_rng; + } /* else found words */ + +#ifdef RNG_FORCE_FIFO_UNDERFLOW + /* + * For unit test, force occasional extraction of more words than + * available. This should cause FIFO Underflow, and IRQ invocation. + */ + words_in_rng = count_words; +#endif + + /* Copy out all available & neeeded data */ + while (words_in_rng-- > 0) { + *random_p++ = RNG_READ_FIFO(); + count_words--; + } + } /* while words still needed */ + + if (count_words == 0) { + code = FSL_RETURN_OK_S; + } + if (fifo_empty_count != 0) { + LOG_KDIAG_ARGS("FIFO empty %d times, max loop count %d", + fifo_empty_count, max_sequential); + } + + return code; +} /* rng_drain_fifo */ + +/*****************************************************************************/ +/* fn rng_entropy_task() */ +/*****************************************************************************/ +/*! + * This is the background task of the driver. It is scheduled by + * RNG_ADD_WORK_ENTRY(). + * + * This will process each entry on the #rng_work_queue. Blocking requests will + * cause sleepers to be awoken. Non-blocking requests will be placed on the + * results queue, and if appropriate, the callback function will be invoked. + */ +OS_DEV_TASK(rng_entropy_task) +{ + rng_work_entry_t *work; + + os_dev_task_begin(); + +#ifdef RNG_ENTROPY_DEBUG + LOG_KDIAG("entropy task starting"); +#endif + + while ((work = RNG_GET_WORK_ENTRY()) != NULL) { +#ifdef RNG_ENTROPY_DEBUG + LOG_KDIAG_ARGS("found %d bytes of work at %p (%p)", + work->length, work, work->data_local); +#endif + work->hdr.code = rng_drain_fifo(work->data_local, + BYTES_TO_WORDS(work->length)); + work->completed = TRUE; + + if (work->hdr.flags & FSL_UCO_BLOCKING_MODE) { +#ifdef RNG_ENTROPY_DEBUG + LOG_KDIAG("Waking queued processes"); +#endif + os_wake_sleepers(rng_wait_queue); + } else { + os_lock_context_t lock_context; + + os_lock_save_context(rng_queue_lock, lock_context); + RNG_ADD_QUEUE_ENTRY(&work->hdr.user_ctx->result_pool, + work); + os_unlock_restore_context(rng_queue_lock, lock_context); + + if (work->hdr.flags & FSL_UCO_CALLBACK_MODE) { + if (work->hdr.callback != NULL) { + work->hdr.callback(work->hdr.user_ctx); + } else { +#ifdef RNG_ENTROPY_DEBUG + LOG_KDIAG_ARGS + ("Callback ptr for %p is NULL", + work); +#endif + } + } + } + } /* while */ + +#ifdef RNG_ENTROPY_DEBUG + LOG_KDIAG("entropy task ending"); +#endif + + os_dev_task_return(OS_ERROR_OK_S); +} /* rng_entropy_task */ + +#ifdef FSL_HAVE_RNGA +/*****************************************************************************/ +/* fn rng_sec_failure() */ +/*****************************************************************************/ +/*! + * Function to handle "Security Alarm" indication from SCC. + * + * This function is registered with the Security Monitor ans the callback + * function for the RNG driver. Upon alarm, it will shut down the driver so + * that no more random data can be retrieved. + * + * @return void + */ +static void rng_sec_failure(void) +{ + os_printk(KERN_ALERT "RNG Driver: Security Failure Alarm received.\n"); + + rng_cleanup(); + + return; +} +#endif + +#ifdef RNG_REGISTER_DEBUG +/*****************************************************************************/ +/* fn dbg_rng_read_register() */ +/*****************************************************************************/ +/*! + * Noisily read a 32-bit value to an RNG register. + * @param offset The address of the register to read. + * + * @return The register value + * */ +static uint32_t dbg_rng_read_register(uint32_t offset) +{ + uint32_t value; + + value = os_read32(rng_base + offset); +#ifndef RNG_ENTROPY_DEBUG + if (offset != RNG_OUTPUT_FIFO) { +#endif + pr_debug("RNG RD: 0x%4x : 0x%08x\n", offset, value); +#ifndef RNG_ENTROPY_DEBUG + } +#endif + return value; +} + +/*****************************************************************************/ +/* fn dbg_rng_write_register() */ +/*****************************************************************************/ +/*! + * Noisily write a 32-bit value to an RNG register. + * @param offset The address of the register to written. + * + * @param value The new register value + */ +static void dbg_rng_write_register(uint32_t offset, uint32_t value) +{ + LOG_KDIAG_ARGS("WR: 0x%4x : 0x%08x", offset, value); + os_write32(value, rng_base + offset); + return; +} + +#endif /* RNG_REGISTER_DEBUG */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/Makefile @@ -0,0 +1,35 @@ +# Makefile for the Linux RNG Driver +# +# This makefile works within a kernel driver tree + + # Makefile for rng_driver + + +# Possible configurable paramters +CFG_RNG += -DRNGA_MAX_REQUEST_SIZE=32 + +#DBG_RNGA = -DRNGA_DEBUG +#DBG_RNGA += -DRNGA_REGISTER_DEBUG +#DBG_RNGA += -DRNGA_ENTROPY_DEBUG + +EXTRA_CFLAGS = -DLINUX_KERNEL $(CFG_RNG) $(DBG_RNG) + + +ifeq ($(CONFIG_MXC_RNG_TEST_DRIVER),y) +EXTRA_CFLAGS += -DRNG_REGISTER_PEEK_POKE +endif +ifeq ($(CONFIG_RNG_DEBUG),y) +EXTRA_CFLAGS += -DDEBUG +endif + + +EXTRA_CFLAGS += -Idrivers/mxc/security/rng/include -Idrivers/mxc/security/sahara2/include + +obj-$(CONFIG_MXC_SECURITY_RNG) += shw.o +#shw-objs := shw_driver.o shw_memory_mapper.o ../sahara2/fsl_shw_keystore.o +shw-objs := shw_driver.o shw_memory_mapper.o ../sahara2/fsl_shw_keystore.o \ + fsl_shw_sym.o fsl_shw_wrap.o shw_dryice.o des_key.o \ + shw_hash.o shw_hmac.o + +obj-$(CONFIG_MXC_SECURITY_RNG) += rng.o +rng-objs := rng_driver.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/shw_dryice.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/shw_dryice.c @@ -0,0 +1,204 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "shw_driver.h" +#include "../dryice.h" + +#include + +#ifdef FSL_HAVE_DRYICE + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_gen_random_pf_key); +#endif +/*! + * Cause the hardware to create a new random key for secure memory use. + * + * Have the hardware use the secure hardware random number generator to load a + * new secret key into the hardware random key register. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_gen_random_pf_key(fsl_shw_uco_t * user_ctx) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + di_return_t di_ret; + + /* For now, only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + di_ret = dryice_set_random_key(0); + if (di_ret != DI_SUCCESS) { + printk("dryice_set_random_key returned %d\n", di_ret); + goto out; + } + + ret = FSL_RETURN_OK_S; + + out: + return ret; +} + +#ifdef LINUX_VERSION_CODE +EXPORT_SYMBOL(fsl_shw_read_tamper_event); +#endif +fsl_shw_return_t fsl_shw_read_tamper_event(fsl_shw_uco_t * user_ctx, + fsl_shw_tamper_t * tamperp, + uint64_t * timestampp) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + di_return_t di_ret; + uint32_t di_events = 0; + uint32_t di_time_stamp; + + /* Only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + di_ret = dryice_get_tamper_event(&di_events, &di_time_stamp, 0); + if ((di_ret != DI_SUCCESS) && (di_ret != DI_ERR_STATE)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("dryice_get_tamper_event returned %s\n", + di_error_string(di_ret)); +#endif + goto out; + } + + /* Pass time back to caller */ + *timestampp = (uint64_t) di_time_stamp; + + if (di_events & DI_TAMPER_EVENT_WTD) { + *tamperp = FSL_SHW_TAMPER_WTD; + } else if (di_events & DI_TAMPER_EVENT_ETBD) { + *tamperp = FSL_SHW_TAMPER_ETBD; + } else if (di_events & DI_TAMPER_EVENT_ETAD) { + *tamperp = FSL_SHW_TAMPER_ETAD; + } else if (di_events & DI_TAMPER_EVENT_EBD) { + *tamperp = FSL_SHW_TAMPER_EBD; + } else if (di_events & DI_TAMPER_EVENT_SAD) { + *tamperp = FSL_SHW_TAMPER_SAD; + } else if (di_events & DI_TAMPER_EVENT_TTD) { + *tamperp = FSL_SHW_TAMPER_TTD; + } else if (di_events & DI_TAMPER_EVENT_CTD) { + *tamperp = FSL_SHW_TAMPER_CTD; + } else if (di_events & DI_TAMPER_EVENT_VTD) { + *tamperp = FSL_SHW_TAMPER_VTD; + } else if (di_events & DI_TAMPER_EVENT_MCO) { + *tamperp = FSL_SHW_TAMPER_MCO; + } else if (di_events & DI_TAMPER_EVENT_TCO) { + *tamperp = FSL_SHW_TAMPER_TCO; + } else if (di_events != 0) { + /* Apparentliy a tamper type not known to this driver was detected */ + goto out; + } else { + *tamperp = FSL_SHW_TAMPER_NONE; + } + + ret = FSL_RETURN_OK_S; + + out: + return ret; +} /* end fn fsl_shw_read_tamper_event */ +#endif +/*! + * Convert an SHW HW key reference into a DI driver key reference + * + * @param shw_pf_key An SHW HW key value + * @param di_keyp Location to store the equivalent DI driver key + * + * @return FSL_RETURN_OK_S, or error if key is unknown or cannot translate. + */ +fsl_shw_return_t shw_convert_pf_key(fsl_shw_pf_key_t shw_pf_key, + di_key_t * di_keyp) +{ + fsl_shw_return_t ret = FSL_RETURN_BAD_FLAG_S; + + switch (shw_pf_key) { + case FSL_SHW_PF_KEY_IIM: + *di_keyp = DI_KEY_FK; + break; + case FSL_SHW_PF_KEY_RND: + *di_keyp = DI_KEY_RK; + break; + case FSL_SHW_PF_KEY_IIM_RND: + *di_keyp = DI_KEY_FRK; + break; + case FSL_SHW_PF_KEY_PRG: + *di_keyp = DI_KEY_PK; + break; + case FSL_SHW_PF_KEY_IIM_PRG: + *di_keyp = DI_KEY_FPK; + break; + default: + goto out; + } + + ret = FSL_RETURN_OK_S; + + out: + return ret; +} + +#ifdef DIAG_SECURITY_FUNC +const char *di_error_string(int code) +{ + char *str = "unknown"; + + switch (code) { + case DI_SUCCESS: + str = "operation was successful"; + break; + case DI_ERR_BUSY: + str = "device or resource busy"; + break; + case DI_ERR_STATE: + str = "dryice is in incompatible state"; + break; + case DI_ERR_INUSE: + str = "resource is already in use"; + break; + case DI_ERR_UNSET: + str = "resource has not been initialized"; + break; + case DI_ERR_WRITE: + str = "error occurred during register write"; + break; + case DI_ERR_INVAL: + str = "invalid argument"; + break; + case DI_ERR_FAIL: + str = "operation failed"; + break; + case DI_ERR_HLOCK: + str = "resource is hard locked"; + break; + case DI_ERR_SLOCK: + str = "resource is soft locked"; + break; + case DI_ERR_NOMEM: + str = "out of memory"; + break; + default: + break; + } + + return str; +} +#endif /* HAVE DRYICE */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/fsl_shw_sym.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/fsl_shw_sym.c @@ -0,0 +1,317 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +/*! + * @file fsl_shw_sym.c + * + * This file implements the Symmetric Cipher functions of the FSL SHW API. Its + * features are limited to what can be done with the combination of SCC and + * DryIce. + */ +#include "fsl_platform.h" +#include "shw_driver.h" + +#if defined(__KERNEL__) && defined(FSL_HAVE_DRYICE) + +#include "../dryice.h" +#include +#ifdef DIAG_SECURITY_FUNC +#include "apihelp.h" +#endif + +#include + +#define SYM_DECRYPT 0 +#define SYM_ENCRYPT 1 + +extern fsl_shw_return_t shw_convert_pf_key(fsl_shw_pf_key_t shw_pf_key, + di_key_t * di_keyp); + +/*! 'Initial' IV for presence of FSL_SYM_CTX_LOAD flag */ +static uint8_t zeros[8] = { + 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/*! + * Common function for encryption and decryption + * + * This is for a device with DryIce. + * + * A key must either refer to a 'pure' HW key, or, if PRG or PRG_IIM, + * established, then that key will be programmed. Then, the HW_key in the + * object will be selected. After this setup, the ciphering will be performed + * by calling the SCC driver.. + * + * The function 'releases' the reservations before it completes. + */ +fsl_shw_return_t do_symmetric(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + int encrypt, + uint32_t length, + const uint8_t * in, uint8_t * out) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + int key_selected = 0; + uint8_t *iv = NULL; + unsigned long count_out = length; + di_key_t di_key = DI_KEY_PK; /* default for user key */ + di_key_t di_key_orig; /* currently selected key */ + di_key_t selected_key = -1; + di_return_t di_code; + scc_return_t scc_code; + + /* For now, only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* No software keys allowed */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + ret = FSL_RETURN_BAD_FLAG_S; + } + + /* The only algorithm the SCC supports */ + if (key_info->algorithm != FSL_KEY_ALG_TDES) { + ret = FSL_RETURN_BAD_ALGORITHM_S; + goto out; + } + + /* Validate key length */ + if ((key_info->key_length != 16) + && (key_info->key_length != 21) + && (key_info->key_length != 24)) { + ret = FSL_RETURN_BAD_KEY_LENGTH_S; + goto out; + } + + /* Validate data is multiple of DES/TDES block */ + if ((length & 7) != 0) { + ret = FSL_RETURN_BAD_DATA_LENGTH_S; + goto out; + } + + /* Do some setup according to where the key lives */ + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + if ((key_info->pf_key != FSL_SHW_PF_KEY_PRG) + && (key_info->pf_key != FSL_SHW_PF_KEY_IIM_PRG)) { + ret = FSL_RETURN_ERROR_S; + } + } else if (key_info->flags & FSL_SKO_KEY_PRESENT) { + ret = FSL_RETURN_BAD_FLAG_S; + } else if (key_info->flags & FSL_SKO_KEY_SELECT_PF_KEY) { + /* + * No key present or established, just refer to HW + * as programmed. + */ + } else { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* Now make proper selection */ + ret = shw_convert_pf_key(key_info->pf_key, &di_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Determine the current DI key selection */ + di_code = dryice_check_key(&di_key_orig); + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not save current DI key state: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + + /* If the requested DI key is already selected, don't re-select it. */ + if (di_key != di_key_orig) { + di_code = dryice_select_key(di_key, 0); + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Error from select_key: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_INTERNAL_ERROR_S; + goto out; + } + } + key_selected = 1; + + /* Verify that we are using the key we want */ + di_code = dryice_check_key(&selected_key); + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Error from check_key: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_INTERNAL_ERROR_S; + goto out; + } + + if (di_key != selected_key) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Wrong key in use: %d instead of %d\n\n", + selected_key, di_key); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + + if (sym_ctx->mode == FSL_SYM_MODE_CBC) { + if ((sym_ctx->flags & FSL_SYM_CTX_LOAD) + && !(sym_ctx->flags & FSL_SYM_CTX_INIT)) { + iv = sym_ctx->context; + } else if ((sym_ctx->flags & FSL_SYM_CTX_INIT) + && !(sym_ctx->flags & FSL_SYM_CTX_LOAD)) { + iv = zeros; + } else { + /* Exactly one must be set! */ + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + } + + /* Now run the data through the SCC */ + scc_code = scc_crypt(length, in, iv, + encrypt ? SCC_ENCRYPT : SCC_DECRYPT, + (sym_ctx->mode == FSL_SYM_MODE_ECB) + ? SCC_ECB_MODE : SCC_CBC_MODE, + SCC_VERIFY_MODE_NONE, out, &count_out); + if (scc_code != SCC_RET_OK) { + ret = FSL_RETURN_INTERNAL_ERROR_S; +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("scc_code from scc_crypt() is %d\n", scc_code); +#endif + goto out; + } + + if ((sym_ctx->mode == FSL_SYM_MODE_CBC) + && (sym_ctx->flags & FSL_SYM_CTX_SAVE)) { + /* Save the context for the caller */ + if (encrypt) { + /* Last ciphertext block ... */ + memcpy(sym_ctx->context, out + length - 8, 8); + } else { + /* Last ciphertext block ... */ + memcpy(sym_ctx->context, in + length - 8, 8); + } + } + + ret = FSL_RETURN_OK_S; + + out: + if (key_selected) { + (void)dryice_release_key_selection(); + } + + return ret; +} + +EXPORT_SYMBOL(fsl_shw_symmetric_encrypt); +/*! + * Compute symmetric encryption + * + * + * @param user_ctx + * @param key_info + * @param sym_ctx + * @param length + * @param pt + * @param ct + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, uint8_t * ct) +{ + fsl_shw_return_t ret; + + ret = do_symmetric(user_ctx, key_info, sym_ctx, SYM_ENCRYPT, + length, pt, ct); + + return ret; +} + +EXPORT_SYMBOL(fsl_shw_symmetric_decrypt); +/*! + * Compute symmetric decryption + * + * + * @param user_ctx + * @param key_info + * @param sym_ctx + * @param length + * @param pt + * @param ct + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, uint8_t * pt) +{ + fsl_shw_return_t ret; + + ret = do_symmetric(user_ctx, key_info, sym_ctx, SYM_DECRYPT, + length, ct, pt); + + return ret; +} + +#else /* __KERNEL__ && DRYICE */ + +fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, uint8_t * ct) +{ + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)sym_ctx; + (void)length; + (void)pt; + (void)ct; + + return FSL_RETURN_ERROR_S; +} + +fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, uint8_t * pt) +{ + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)sym_ctx; + (void)length; + (void)ct; + (void)pt; + + return FSL_RETURN_ERROR_S; +} + +#endif /* __KERNEL__ and DRYICE */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/shw_hmac.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/shw_hmac.c @@ -0,0 +1,145 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file shw_hmac.c + * + * This file contains implementations for use of the (internal) SHW HMAC + * software computation. It defines the usual three steps: + * + * - #shw_hmac_init() + * - #shw_hmac_update() + * - #shw_hmac_final() + * + * + */ + +#include "shw_driver.h" +#include "shw_hmac.h" + +#ifndef __KERNEL__ +#include +#include /* or whichever is proper for target arch */ +#define printk printf +#endif + +/*! XOR value for HMAC inner key */ +#define INNER_HASH_CONSTANT 0x36 + +/*! XOR value for HMAC outer key */ +#define OUTER_HASH_CONSTANT 0x5C + +/*! + * Initialize the HMAC state structure with the HMAC key + * + * @param state Address of HMAC state structure + * @param key Address of the key to be used for the HMAC. + * @param key_len Number of bytes of @c key. + * + * Convert the key into its equivalent inner and outer hash state objects. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_init(shw_hmac_state_t * state, + const uint8_t * key, unsigned int key_len) +{ + fsl_shw_return_t code = FSL_RETURN_ERROR_S; + uint8_t first_block[SHW_HASH_BLOCK_LEN]; + unsigned int i; + + /* Don't bother handling the pre-hash. */ + if (key_len > SHW_HASH_BLOCK_LEN) { + code = FSL_RETURN_BAD_KEY_LENGTH_S; + goto out; + } + + /* Prepare inner hash */ + for (i = 0; i < SHW_HASH_BLOCK_LEN; i++) { + if (i < key_len) { + first_block[i] = key[i] ^ INNER_HASH_CONSTANT; + } else { + first_block[i] = INNER_HASH_CONSTANT; + } + } + code = shw_hash_init(&state->inner_hash, FSL_HASH_ALG_SHA256); + if (code != FSL_RETURN_OK_S) { + goto out; + } + shw_hash_update(&state->inner_hash, first_block, SHW_HASH_BLOCK_LEN); + + /* Prepare outer hash */ + for (i = 0; i < SHW_HASH_BLOCK_LEN; i++) { + if (i < key_len) { + first_block[i] = key[i] ^ OUTER_HASH_CONSTANT; + } else { + first_block[i] = OUTER_HASH_CONSTANT; + } + } + code = shw_hash_init(&state->outer_hash, FSL_HASH_ALG_SHA256); + if (code != FSL_RETURN_OK_S) { + goto out; + } + shw_hash_update(&state->outer_hash, first_block, SHW_HASH_BLOCK_LEN); + + /* Wipe evidence of key */ + memset(first_block, 0, SHW_HASH_BLOCK_LEN); + + out: + return code; +} + +/*! + * Put data into the HMAC calculation + * + * Send the msg data inner inner hash's update function. + * + * @param state Address of HMAC state structure. + * @param msg Address of the message data for the HMAC. + * @param msg_len Number of bytes of @c msg. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_update(shw_hmac_state_t * state, + const uint8_t * msg, unsigned int msg_len) +{ + shw_hash_update(&state->inner_hash, msg, msg_len); + + return FSL_RETURN_OK_S; +} + +/*! + * Calculate the final HMAC + * + * @param state Address of HMAC state structure. + * @param hmac Address of location to store the HMAC. + * @param hmac_len Number of bytes of @c mac to be stored. Probably best if + * this value is no greater than #SHW_HASH_LEN. + * + * This function finalizes the internal hash, and uses that result as + * data for the outer hash. As many bytes of that result are passed + * to the user as desired. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_final(shw_hmac_state_t * state, + uint8_t * hmac, unsigned int hmac_len) +{ + uint8_t hash_result[SHW_HASH_LEN]; + + shw_hash_final(&state->inner_hash, hash_result, sizeof(hash_result)); + shw_hash_update(&state->outer_hash, hash_result, SHW_HASH_LEN); + + shw_hash_final(&state->outer_hash, hmac, hmac_len); + + return FSL_RETURN_OK_S; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/fsl_shw_hash.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/fsl_shw_hash.c @@ -0,0 +1,84 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +/*! + * @file fsl_shw_hash.c + * + * This file implements Cryptographic Hashing functions of the FSL SHW API + * for Sahara. This does not include HMAC. + */ + +#include "shw_driver.h" + +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-005 */ +/*! + * Hash a stream of data with a cryptographic hash algorithm. + * + * The flags in the @a hash_ctx control the operation of this function. + * + * Hashing functions work on 64 octets of message at a time. Therefore, when + * any partial hashing of a long message is performed, the message @a length of + * each segment must be a multiple of 64. When ready to + * #FSL_HASH_FLAGS_FINALIZE the hash, the @a length may be any value. + * + * With the #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_FINALIZE flags on, a + * one-shot complete hash, including padding, will be performed. The @a length + * may be any value. + * + * The first octets of a data stream can be hashed by setting the + * #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_SAVE flags. The @a length must be + * a multiple of 64. + * + * The flag #FSL_HASH_FLAGS_LOAD is used to load a context previously saved by + * #FSL_HASH_FLAGS_SAVE. The two in combination will allow a (multiple-of-64 + * octets) 'middle sequence' of the data stream to be hashed with the + * beginning. The @a length must again be a multiple of 64. + * + * Since the flag #FSL_HASH_FLAGS_LOAD is used to load a context previously + * saved by #FSL_HASH_FLAGS_SAVE, the #FSL_HASH_FLAGS_LOAD and + * #FSL_HASH_FLAGS_FINALIZE flags, used together, can be used to finish the + * stream. The @a length may be any value. + * + * If the user program wants to do the padding for the hash, it can leave off + * the #FSL_HASH_FLAGS_FINALIZE flag. The @a length must then be a multiple of + * 64 octets. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] hash_ctx Hashing algorithm and state of the cipher. + * @param msg Pointer to the data to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result If not null, pointer to where to store the hash + * digest. + * @param result_len Number of octets to store in @a result. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hash(fsl_shw_uco_t * user_ctx, + fsl_shw_hco_t * hash_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)hash_ctx; + (void)msg; + (void)length; + (void)result; + (void)result_len; + + return ret; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/fsl_shw_hmac.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/fsl_shw_hmac.c @@ -0,0 +1,83 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +/*! + * @file fsl_shw_hmac.c + * + * This file implements Hashed Message Authentication Code functions of the FSL + * SHW API. + */ + +#include "shw_driver.h" + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-001 */ +/*! + * Get the precompute information + * + * + * @param user_ctx + * @param key_info + * @param hmac_ctx + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hmac_precompute(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx) +{ + fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)hmac_ctx; + + return status; +} + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-002 */ +/*! + * Get the hmac + * + * + * @param user_ctx Info for acquiring memory + * @param key_info + * @param hmac_ctx + * @param msg + * @param length + * @param result + * @param result_len + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hmac(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + fsl_shw_return_t status = FSL_RETURN_ERROR_S; + + /* Unused */ + (void)user_ctx; + (void)key_info; + (void)hmac_ctx; + (void)msg; + (void)length; + (void)result; + (void)result_len; + + return status; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/fsl_shw_wrap.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/fsl_shw_wrap.c @@ -0,0 +1,1301 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_wrap.c + * + * This file implements Key-Wrap (Black Key) and Key Establishment functions of + * the FSL SHW API for the SHW (non-SAHARA) driver. + * + * This is the Black Key information: + * + *
    + *
  • Ownerid is an 8-byte, user-supplied, value to keep KEY + * confidential.
    • + *
  • KEY is a 1-32 byte value which starts in SCC RED RAM before + * wrapping, and ends up there on unwrap. Length is limited because of + * size of SCC1 RAM.
    • + *
  • KEY' is the encrypted KEY
    • + *
  • LEN is a 1-byte (for now) byte-length of KEY
    • + *
  • ALG is a 1-byte value for the algorithm which which the key is + * associated. Values are defined by the FSL SHW API
    • + *
  • FLAGS is a 1-byte value contain information like "this key is for + * software" (TBD)
    • + *
  • Ownerid, LEN, and ALG come from the user's "key_info" object, as does + * the slot number where KEY already is/will be.
    • + *
  • T is a Nonce
    • + *
  • T' is the encrypted T
    • + *
  • KEK is a Key-Encryption Key for the user's Key
    • + *
  • ICV is the "Integrity Check Value" for the wrapped key
    • + *
  • Black Key is the string of bytes returned as the wrapped key
    • + *
  • Wrap Key is the user's choice for encrypting the nonce. One of + * the Fused Key, the Random Key, or the XOR of the two. + *
+ + + + + + + + + + + + + + + + + + +
BLACK_KEY =ICV | T' | LEN | ALG | + FLAGS | KEY'
 
To Wrap
T = RND()16 +
KEK=HASHsha256(T | + Ownerid)16
KEY'= + TDEScbc-enc(Key=KEK, Data=KEY, IV=Ownerid)
ICV=HMACsha256 + (Key=T, Data=Ownerid | LEN | ALG | FLAGS | KEY')16
T'=TDESecb-enc + (Key=Wrap_Key, IV=Ownerid, Data=T)
 
To Unwrap
T=TDESecb-dec + (Key=Wrap_Key, IV=Ownerid, Data=T')
ICV=HMACsha256 + (Key=T, Data=Ownerid | LEN | ALG | FLAGS | KEY')16
KEK=HASHsha256 + (T | Ownerid)16
KEY=TDEScbc-dec + (Key=KEK, Data=KEY', IV=Ownerid)
+ + * This code supports two types of keys: Software Keys and keys destined for + * (or residing in) the DryIce Programmed Key Register. + * + * Software Keys go to / from the keystore. + * + * PK keys go to / from the DryIce Programmed Key Register. + * + * This code only works on a platform with DryIce. "software" keys go into + * the keystore. "Program" keys go to the DryIce Programmed Key Register. + * As far as this code is concerned, the size of that register is 21 bytes, + * the size of a 3DES key with parity stripped. + * + * The maximum key size supported for wrapped/unwrapped keys depends upon + * LENGTH_LENGTH. Currently, it is one byte, so the maximum key size is + * 255 bytes. However, key objects cannot currently hold a key of this + * length, so a smaller key size is the max. + */ + +#include "fsl_platform.h" + +/* This code only works in kernel mode */ + +#include "shw_driver.h" +#ifdef DIAG_SECURITY_FUNC +#include "apihelp.h" +#endif + +#if defined(__KERNEL__) && defined(FSL_HAVE_DRYICE) + +#include "../dryice.h" +#include + +#include "portable_os.h" +#include "fsl_shw_keystore.h" + +#include + +#include "shw_hmac.h" +#include "shw_hash.h" + +#define ICV_LENGTH 16 +#define T_LENGTH 16 +#define KEK_LENGTH 21 +#define LENGTH_LENGTH 1 +#define ALGORITHM_LENGTH 1 +#define FLAGS_LENGTH 1 + +/* ICV | T' | LEN | ALG | FLAGS | KEY' */ +#define ICV_OFFSET 0 +#define T_PRIME_OFFSET (ICV_OFFSET + ICV_LENGTH) +#define LENGTH_OFFSET (T_PRIME_OFFSET + T_LENGTH) +#define ALGORITHM_OFFSET (LENGTH_OFFSET + LENGTH_LENGTH) +#define FLAGS_OFFSET (ALGORITHM_OFFSET + ALGORITHM_LENGTH) +#define KEY_PRIME_OFFSET (FLAGS_OFFSET + FLAGS_LENGTH) + +#define FLAGS_SW_KEY 0x01 + +#define LENGTH_PATCH 8 +#define LENGTH_PATCH_MASK (LENGTH_PATCH - 1) + +/*! rounded up from 168 bits to the next word size */ +#define HW_KEY_LEN_WORDS_BITS 192 + +/*! + * Round a key length up to the TDES block size + * + * @param len Length of key, in bytes + * + * @return Length rounded up, if necessary + */ +#define ROUND_LENGTH(len) \ +({ \ + uint32_t orig_len = len; \ + uint32_t new_len; \ + \ + if ((orig_len & LENGTH_PATCH_MASK) != 0) { \ + new_len = (orig_len + LENGTH_PATCH \ + - (orig_len & LENGTH_PATCH_MASK)); \ + } \ + else { \ + new_len = orig_len; \ + } \ + \ + new_len; \ +}) + +/* This is the system keystore object */ +extern fsl_shw_kso_t system_keystore; + +#ifdef DIAG_SECURITY_FUNC +static void dump(const char *name, const uint8_t * data, unsigned int len) +{ + os_printk("%s: ", name); + while (len > 0) { + os_printk("%02x ", (unsigned)*data++); + len--; + } + os_printk("\n"); +} +#endif + +/* + * For testing of the algorithm implementation,, the DO_REPEATABLE_WRAP flag + * causes the T_block to go into the T field during a wrap operation. This + * will make the black key value repeatable (for a given SCC secret key, or + * always if the default key is in use). + * + * Normally, a random sequence is used. + */ +#ifdef DO_REPEATABLE_WRAP +/*! + * Block of zeroes which is maximum Symmetric block size, used for + * initializing context register, etc. + */ +static uint8_t T_block[16] = { + 0x42, 0, 0, 0x42, 0x42, 0, 0, 0x42, + 0x42, 0, 0, 0x42, 0x42, 0, 0, 0x42 +}; +#endif + +EXPORT_SYMBOL(fsl_shw_establish_key); +EXPORT_SYMBOL(fsl_shw_read_key); +EXPORT_SYMBOL(fsl_shw_extract_key); +EXPORT_SYMBOL(fsl_shw_release_key); + +extern fsl_shw_return_t alloc_slot(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info); + +extern fsl_shw_return_t load_slot(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + const uint8_t * key); + +extern fsl_shw_return_t dealloc_slot(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info); + +/*! + * Initalialize SKO and SCCO used for T <==> T' cipher operation + * + * @param wrap_key Which wrapping key user wants + * @param key_info Key object for selecting wrap key + * @param wrap_ctx Sym Context object for doing the cipher op + */ +static inline void init_wrap_key(fsl_shw_pf_key_t wrap_key, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * wrap_ctx) +{ + fsl_shw_sko_init_pf_key(key_info, FSL_KEY_ALG_TDES, wrap_key); + fsl_shw_scco_init(wrap_ctx, FSL_KEY_ALG_TDES, FSL_SYM_MODE_ECB); +} + +/*! + * Insert descriptors to calculate ICV = HMAC(key=T, data=LEN|ALG|KEY') + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param T Location of nonce (length is T_LENGTH bytes) + * @param userid Location of userid/ownerid + * @param userid_len Length, in bytes of @c userid + * @param black_key Beginning of Black Key region + * @param key_length Number of bytes of key' there are in @c black_key + * @param[out] hmac Location to store ICV. Will be tagged "USES" so + * sf routines will not try to free it. + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t calc_icv(const uint8_t * T, + const uint8_t * userid, + unsigned int userid_len, + const uint8_t * black_key, + uint32_t key_length, uint8_t * hmac) +{ + fsl_shw_return_t code; + shw_hmac_state_t hmac_state; + + /* Load up T as key for the HMAC */ + code = shw_hmac_init(&hmac_state, T, T_LENGTH); + if (code != FSL_RETURN_OK_S) { + goto out; + } + + /* Previous step loaded key; Now set up to hash the data */ + + /* Input - start with ownerid */ + code = shw_hmac_update(&hmac_state, userid, userid_len); + if (code != FSL_RETURN_OK_S) { + goto out; + } + + /* Still input - Append black-key fields len, alg, key' */ + code = shw_hmac_update(&hmac_state, + (void *)black_key + LENGTH_OFFSET, + (LENGTH_LENGTH + + ALGORITHM_LENGTH + + FLAGS_LENGTH + key_length)); + if (code != FSL_RETURN_OK_S) { + goto out; + } + + /* Output - computed ICV/HMAC */ + code = shw_hmac_final(&hmac_state, hmac, ICV_LENGTH); + if (code != FSL_RETURN_OK_S) { + goto out; + } + + out: + + return code; +} /* calc_icv */ + +/*! + * Compute and return the KEK (Key Encryption Key) from the inputs + * + * @param userid The user's 'secret' for the key + * @param userid_len Length, in bytes of @c userid + * @param T The nonce + * @param[out] kek Location to store the computed KEK. It will + * be 21 bytes long. + * + * @return the usual error code + */ +static fsl_shw_return_t calc_kek(const uint8_t * userid, + unsigned int userid_len, + const uint8_t * T, uint8_t * kek) +{ + fsl_shw_return_t code = FSL_RETURN_INTERNAL_ERROR_S; + shw_hash_state_t hash_state; + + code = shw_hash_init(&hash_state, FSL_HASH_ALG_SHA256); + if (code != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Hash init failed: %s\n", fsl_error_string(code)); +#endif + goto out; + } + + code = shw_hash_update(&hash_state, T, T_LENGTH); + if (code != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Hash for T failed: %s\n", + fsl_error_string(code)); +#endif + goto out; + } + + code = shw_hash_update(&hash_state, userid, userid_len); + if (code != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Hash for userid failed: %s\n", + fsl_error_string(code)); +#endif + goto out; + } + + code = shw_hash_final(&hash_state, kek, KEK_LENGTH); + if (code != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not extract kek: %s\n", + fsl_error_string(code)); +#endif + goto out; + } + +#if KEK_LENGTH != 21 + { + uint8_t permuted_kek[21]; + + fsl_shw_permute1_bytes(kek, permuted_kek, KEK_LENGTH / 8); + memcpy(kek, permuted_kek, 21); + memset(permuted_kek, 0, sizeof(permuted_kek)); + } +#endif + +#ifdef DIAG_SECURITY_FUNC + dump("kek", kek, 21); +#endif + + out: + + return code; +} /* end fn calc_kek */ + +/*! + * Validate user's wrap key selection + * + * @param wrap_key The user's desired wrapping key + */ +static fsl_shw_return_t check_wrap_key(fsl_shw_pf_key_t wrap_key) +{ + /* unable to use desired key */ + fsl_shw_return_t ret = FSL_RETURN_NO_RESOURCE_S; + + if ((wrap_key != FSL_SHW_PF_KEY_IIM) && + (wrap_key != FSL_SHW_PF_KEY_RND) && + (wrap_key != FSL_SHW_PF_KEY_IIM_RND)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Invalid wrap_key in key wrap/unwrap attempt"); +#endif + goto out; + } + ret = FSL_RETURN_OK_S; + + out: + return ret; +} /* end fn check_wrap_key */ + +/*! + * Perform unwrapping of a black key into a RED slot + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be unwrapped... key length, slot info, etc. + * @param black_key Encrypted key + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t unwrap(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + const uint8_t * black_key) +{ + fsl_shw_return_t ret; + uint8_t hmac[ICV_LENGTH]; + uint8_t T[T_LENGTH]; + uint8_t kek[KEK_LENGTH + 20]; + int key_length = black_key[LENGTH_OFFSET]; + int rounded_key_length = ROUND_LENGTH(key_length); + uint8_t key[rounded_key_length]; + fsl_shw_sko_t t_key_info; + fsl_shw_scco_t t_key_ctx; + fsl_shw_sko_t kek_key_info; + fsl_shw_scco_t kek_ctx; + int unwrapping_sw_key = key_info->flags & FSL_SKO_KEY_SW_KEY; + int pk_needs_restoration = 0; /* bool */ + unsigned original_key_length = key_info->key_length; + int pk_was_held = 0; + uint8_t current_pk[21]; + di_return_t di_code; + + ret = check_wrap_key(user_ctx->wrap_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + if (black_key == NULL) { + ret = FSL_RETURN_ERROR_S; + goto out; + } +#ifdef DIAG_SECURITY_FUNC + dump("black", black_key, KEY_PRIME_OFFSET + key_length); +#endif + /* Validate SW flags to prevent misuse */ + if ((key_info->flags & FSL_SKO_KEY_SW_KEY) + && !(black_key[FLAGS_OFFSET] & FLAGS_SW_KEY)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* Compute T = 3des-dec-ecb(wrap_key, T') */ + init_wrap_key(user_ctx->wrap_key, &t_key_info, &t_key_ctx); + ret = fsl_shw_symmetric_decrypt(user_ctx, &t_key_info, &t_key_ctx, + T_LENGTH, + black_key + T_PRIME_OFFSET, T); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Recovery of nonce (T) failed"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } + + /* Compute ICV = HMAC(T, ownerid | len | alg | flags | key' */ + ret = calc_icv(T, (uint8_t *) & key_info->userid, + sizeof(key_info->userid), + black_key, original_key_length, hmac); + + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Calculation of ICV failed"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Validating MAC of wrapped key"); +#endif + + /* Check computed ICV against value in Black Key */ + if (memcmp(black_key + ICV_OFFSET, hmac, ICV_LENGTH) != 0) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Computed ICV fails validation\n"); +#endif + ret = FSL_RETURN_AUTH_FAILED_S; + goto out; + } + + /* Compute KEK = SHA256(T | ownerid). */ + ret = calc_kek((uint8_t *) & key_info->userid, sizeof(key_info->userid), + T, kek); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + if (unwrapping_sw_key) { + di_code = dryice_get_programmed_key(current_pk, 8 * 21); + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not save current PK: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + } + + /* + * "Establish" the KEK in the PK. If the PK was held and unwrapping a + * software key, then release it and try again, but remember that we need + * to leave it 'held' if we are unwrapping a software key. + * + * If the PK is held while we are unwrapping a key for the PK, then + * the user didn't call release, so gets an error. + */ + di_code = dryice_set_programmed_key(kek, 8 * 21, 0); + if ((di_code == DI_ERR_INUSE) && unwrapping_sw_key) { + /* Temporarily reprogram the PK out from under the user */ + pk_was_held = 1; + dryice_release_programmed_key(); + di_code = dryice_set_programmed_key(kek, 8 * 21, 0); + } + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not program KEK: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + + if (unwrapping_sw_key) { + pk_needs_restoration = 1; + } + dryice_release_programmed_key(); /* Because of previous 'set' */ + + /* Compute KEY = TDES-decrypt(KEK, KEY') */ + fsl_shw_sko_init_pf_key(&kek_key_info, FSL_KEY_ALG_TDES, + FSL_SHW_PF_KEY_PRG); + fsl_shw_sko_set_key_length(&kek_key_info, KEK_LENGTH); + + fsl_shw_scco_init(&kek_ctx, FSL_KEY_ALG_TDES, FSL_SYM_MODE_CBC); + fsl_shw_scco_set_flags(&kek_ctx, FSL_SYM_CTX_LOAD); + fsl_shw_scco_set_context(&kek_ctx, (uint8_t *) & key_info->userid); +#ifdef DIAG_SECURITY_FUNC + dump("KEY'", black_key + KEY_PRIME_OFFSET, rounded_key_length); +#endif + ret = fsl_shw_symmetric_decrypt(user_ctx, &kek_key_info, &kek_ctx, + rounded_key_length, + black_key + KEY_PRIME_OFFSET, key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } +#ifdef DIAG_SECURITY_FUNC + dump("KEY", key, original_key_length); +#endif + /* Now either put key into PK or into a slot */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + ret = load_slot(user_ctx, key_info, key); + } else { + /* + * Since we have just unwrapped a program key, it had + * to have been wrapped as a program key, so it must + * be 168 bytes long and permuted ... + */ + ret = dryice_set_programmed_key(key, 8 * key_length, 0); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + } + + out: + key_info->key_length = original_key_length; + + if (pk_needs_restoration) { + di_code = dryice_set_programmed_key(current_pk, 8 * 21, 0); + } + + if (!pk_was_held) { + dryice_release_programmed_key(); + } + + /* Erase tracks of confidential data */ + memset(T, 0, T_LENGTH); + memset(key, 0, rounded_key_length); + memset(current_pk, 0, sizeof(current_pk)); + memset(&t_key_info, 0, sizeof(t_key_info)); + memset(&t_key_ctx, 0, sizeof(t_key_ctx)); + memset(&kek_key_info, 0, sizeof(kek_key_info)); + memset(&kek_ctx, 0, sizeof(kek_ctx)); + memset(kek, 0, KEK_LENGTH); + + return ret; +} /* unwrap */ + +/*! + * Perform wrapping of a black key from a RED slot (or the PK register) + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be wrapped... key length, slot info, etc. + * @param black_key Place to store encrypted key + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t wrap(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, uint8_t * black_key) +{ + fsl_shw_return_t ret = FSL_RETURN_OK_S; + fsl_shw_sko_t t_key_info; /* for holding T */ + fsl_shw_scco_t t_key_ctx; + fsl_shw_sko_t kek_key_info; + fsl_shw_scco_t kek_ctx; + unsigned original_key_length = key_info->key_length; + unsigned rounded_key_length; + uint8_t T[T_LENGTH]; + uint8_t kek[KEK_LENGTH + 20]; + uint8_t *red_key = 0; + int red_key_malloced = 0; /* bool */ + int pk_was_held = 0; /* bool */ + uint8_t saved_pk[21]; + uint8_t pk_needs_restoration; /* bool */ + di_return_t di_code; + + ret = check_wrap_key(user_ctx->wrap_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + if (black_key == NULL) { + ret = FSL_RETURN_ERROR_S; + goto out; + } + + if (key_info->flags & FSL_SKO_KEY_SELECT_PF_KEY) { + if ((key_info->pf_key != FSL_SHW_PF_KEY_PRG) + && (key_info->pf_key != FSL_SHW_PF_KEY_IIM_PRG)) { + ret = FSL_RETURN_ERROR_S; + goto out; + } + } else { + if (!(key_info->flags & FSL_SKO_KEY_ESTABLISHED)) { + ret = FSL_RETURN_BAD_FLAG_S; /* not established! */ + goto out; + } + } + + black_key[ALGORITHM_OFFSET] = key_info->algorithm; + +#ifndef DO_REPEATABLE_WRAP + /* Compute T = RND() */ + ret = fsl_shw_get_random(user_ctx, T_LENGTH, T); + if (ret != FSL_RETURN_OK_S) { + goto out; + } +#else + memcpy(T, T_block, T_LENGTH); +#endif + + /* Compute KEK = SHA256(T | ownerid). */ + ret = calc_kek((uint8_t *) & key_info->userid, sizeof(key_info->userid), + T, kek); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Calculation of KEK failed\n"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } + + rounded_key_length = ROUND_LENGTH(original_key_length); + + di_code = dryice_get_programmed_key(saved_pk, 8 * 21); + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not save current PK: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + + /* + * Load KEK into DI PKR. Note that we are NOT permuting it before loading, + * so we are using it as though it is a 168-bit key ready for the SCC. + */ + di_code = dryice_set_programmed_key(kek, 8 * 21, 0); + if (di_code == DI_ERR_INUSE) { + /* Temporarily reprogram the PK out from under the user */ + pk_was_held = 1; + dryice_release_programmed_key(); + di_code = dryice_set_programmed_key(kek, 8 * 21, 0); + } + if (di_code != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("Could not program KEK: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + pk_needs_restoration = 1; + dryice_release_programmed_key(); + + /* Find red key */ + if (key_info->flags & FSL_SKO_KEY_SELECT_PF_KEY) { + black_key[LENGTH_OFFSET] = 21; + rounded_key_length = 24; + + red_key = saved_pk; + } else { + black_key[LENGTH_OFFSET] = key_info->key_length; + + red_key = os_alloc_memory(key_info->key_length, 0); + if (red_key == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + goto out; + } + red_key_malloced = 1; + + ret = fsl_shw_read_key(user_ctx, key_info, red_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + } + +#ifdef DIAG_SECURITY_FUNC + dump("KEY", red_key, black_key[LENGTH_OFFSET]); +#endif + /* Compute KEY' = TDES-encrypt(KEK, KEY) */ + fsl_shw_sko_init_pf_key(&kek_key_info, FSL_KEY_ALG_TDES, + FSL_SHW_PF_KEY_PRG); + fsl_shw_sko_set_key_length(&kek_key_info, KEK_LENGTH); + + fsl_shw_scco_init(&kek_ctx, FSL_KEY_ALG_TDES, FSL_SYM_MODE_CBC); + fsl_shw_scco_set_flags(&kek_ctx, FSL_SYM_CTX_LOAD); + fsl_shw_scco_set_context(&kek_ctx, (uint8_t *) & key_info->userid); + ret = fsl_shw_symmetric_encrypt(user_ctx, &kek_key_info, &kek_ctx, + rounded_key_length, + red_key, black_key + KEY_PRIME_OFFSET); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Encryption of KEY failed\n"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } + + /* Set up flags info */ + black_key[FLAGS_OFFSET] = 0; + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + black_key[FLAGS_OFFSET] |= FLAGS_SW_KEY; + } +#ifdef DIAG_SECURITY_FUNC + dump("KEY'", black_key + KEY_PRIME_OFFSET, rounded_key_length); +#endif + /* Compute and store ICV into Black Key */ + ret = calc_icv(T, + (uint8_t *) & key_info->userid, + sizeof(key_info->userid), + black_key, original_key_length, black_key + ICV_OFFSET); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Calculation of ICV failed\n"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } + + /* Compute T' = 3des-enc-ecb(wrap_key, T); Result goes to Black Key */ + init_wrap_key(user_ctx->wrap_key, &t_key_info, &t_key_ctx); + ret = fsl_shw_symmetric_encrypt(user_ctx, &t_key_info, &t_key_ctx, + T_LENGTH, + T, black_key + T_PRIME_OFFSET); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Encryption of nonce failed"); +#endif + goto out; + } +#ifdef DIAG_SECURITY_FUNC + dump("black", black_key, KEY_PRIME_OFFSET + black_key[LENGTH_OFFSET]); +#endif + + out: + if (pk_needs_restoration) { + dryice_set_programmed_key(saved_pk, 8 * 21, 0); + } + + if (!pk_was_held) { + dryice_release_programmed_key(); + } + + if (red_key_malloced) { + memset(red_key, 0, key_info->key_length); + os_free_memory(red_key); + } + + key_info->key_length = original_key_length; + + /* Erase tracks of confidential data */ + memset(T, 0, T_LENGTH); + memset(&t_key_info, 0, sizeof(t_key_info)); + memset(&t_key_ctx, 0, sizeof(t_key_ctx)); + memset(&kek_key_info, 0, sizeof(kek_key_info)); + memset(&kek_ctx, 0, sizeof(kek_ctx)); + memset(kek, 0, sizeof(kek)); + memset(saved_pk, 0, sizeof(saved_pk)); + + return ret; +} /* wrap */ + +static fsl_shw_return_t create(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + unsigned key_length = key_info->key_length; + di_return_t di_code; + + if (!(key_info->flags & FSL_SKO_KEY_SW_KEY)) { + /* Must be creating key for PK */ + if ((key_info->algorithm != FSL_KEY_ALG_TDES) || + ((key_info->key_length != 16) + && (key_info->key_length != 21) /* permuted 168-bit key */ + &&(key_info->key_length != 24))) { + ret = FSL_RETURN_ERROR_S; + goto out; + } + + key_length = 21; /* 168-bit PK */ + } + + /* operational block */ + { + uint8_t key_value[key_length]; + +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creating random key\n"); +#endif + ret = fsl_shw_get_random(user_ctx, key_length, key_value); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("get_random for CREATE KEY failed\n"); +#endif + goto out; + } + + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + ret = load_slot(user_ctx, key_info, key_value); + } else { + di_code = + dryice_set_programmed_key(key_value, 8 * key_length, + 0); + if (di_code != 0) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("di set_pk failed: %s\n", + di_error_string(di_code)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + ret = FSL_RETURN_OK_S; + } + memset(key_value, 0, key_length); + } /* end operational block */ + +#ifdef DIAG_SECURITY_FUNC + if (ret != FSL_RETURN_OK_S) { + LOG_DIAG("Loading random key failed"); + } +#endif + + out: + + return ret; +} /* end fn create */ + +static fsl_shw_return_t accept(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, const uint8_t * key) +{ + uint8_t permuted_key[21]; + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + if (key == NULL) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("ACCEPT: Red Key is NULL"); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } +#ifdef DIAG_SECURITY_FUNC + dump("red", key, key_info->key_length); +#endif + /* Only SW keys go into the keystore */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + + /* Copy in safe number of bytes of Red key */ + ret = load_slot(user_ctx, key_info, key); + } else { /* not SW key */ + di_return_t di_ret; + + /* Only 3DES PGM key types can be established */ + if (((key_info->pf_key != FSL_SHW_PF_KEY_PRG) + && (key_info->pf_key != FSL_SHW_PF_KEY_IIM_PRG)) + || (key_info->algorithm != FSL_KEY_ALG_TDES)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS + ("ACCEPT: Failed trying to establish non-PRG" + " or invalid 3DES Key: iim%d, iim_prg%d, alg%d\n", + (key_info->pf_key != FSL_SHW_PF_KEY_PRG), + (key_info->pf_key != FSL_SHW_PF_KEY_IIM_PRG), + (key_info->algorithm != FSL_KEY_ALG_TDES)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + if ((key_info->key_length != 16) + && (key_info->key_length != 21) + && (key_info->key_length != 24)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("ACCEPT: Failed trying to establish" + " invalid 3DES Key: len=%d (%d)\n", + key_info->key_length, + ((key_info->key_length != 16) + && (key_info->key_length != 21) + && (key_info->key_length != 24))); +#endif + ret = FSL_RETURN_BAD_KEY_LENGTH_S; + goto out; + } + + /* Convert key into 168-bit value and put it into PK */ + if (key_info->key_length != 21) { + fsl_shw_permute1_bytes(key, permuted_key, + key_info->key_length / 8); + di_ret = + dryice_set_programmed_key(permuted_key, 168, 0); + } else { + /* Already permuted ! */ + di_ret = dryice_set_programmed_key(key, 168, 0); + } + if (di_ret != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS + ("ACCEPT: DryIce error setting Program Key: %s", + di_error_string(di_ret)); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + } + + ret = FSL_RETURN_OK_S; + + out: + memset(permuted_key, 0, 21); + + return ret; +} /* end fn accept */ + +/*! + * Place a key into a protected location for use only by cryptographic + * algorithms. + * + * This only needs to be used to a) unwrap a key, or b) set up a key which + * could be wrapped by calling #fsl_shw_extract_key() at some later time). + * + * The protected key will not be available for use until this operation + * successfully completes. + * + * @bug This whole discussion needs review. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be established. In the create case, the key + * length must be set. + * @param establish_type How @a key will be interpreted to establish a + * key for use. + * @param key If @a establish_type is #FSL_KEY_WRAP_UNWRAP, + * this is the location of a wrapped key. If + * @a establish_type is #FSL_KEY_WRAP_CREATE, this + * parameter can be @a NULL. If @a establish_type + * is #FSL_KEY_WRAP_ACCEPT, this is the location + * of a plaintext key. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + unsigned original_key_length = key_info->key_length; + unsigned rounded_key_length; + unsigned slot_allocated = 0; + + /* For now, only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("%s: Non-blocking call not supported\n", + __FUNCTION__); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* + HW keys are always 'established', but otherwise do not allow user + * to establish over the top of an established key. + */ + if ((key_info->flags & FSL_SKO_KEY_ESTABLISHED) + && !(key_info->flags & FSL_SKO_KEY_SELECT_PF_KEY)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("%s: Key already established\n", __FUNCTION__); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* @bug VALIDATE KEY flags here -- SW or PRG/IIM_PRG */ + + /* Write operations into SCC memory require word-multiple number of + * bytes. For ACCEPT and CREATE functions, the key length may need + * to be rounded up. Calculate. */ + if (LENGTH_PATCH && (original_key_length & LENGTH_PATCH_MASK) != 0) { + rounded_key_length = original_key_length + LENGTH_PATCH + - (original_key_length & LENGTH_PATCH_MASK); + } else { + rounded_key_length = original_key_length; + } + + /* SW keys need a place to live */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + ret = alloc_slot(user_ctx, key_info); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Slot allocation failed\n"); +#endif + goto out; + } + slot_allocated = 1; + } + + switch (establish_type) { + case FSL_KEY_WRAP_CREATE: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creating random key\n"); +#endif + ret = create(user_ctx, key_info); + break; + + case FSL_KEY_WRAP_ACCEPT: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Accepting plaintext key\n"); +#endif + ret = accept(user_ctx, key_info, key); + break; + + case FSL_KEY_WRAP_UNWRAP: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Unwrapping wrapped key\n"); +#endif + ret = unwrap(user_ctx, key_info, key); + break; + + default: + ret = FSL_RETURN_BAD_FLAG_S; + break; + } /* switch */ + + out: + if (ret != FSL_RETURN_OK_S) { + if (slot_allocated) { + (void)dealloc_slot(user_ctx, key_info); + } + key_info->flags &= ~FSL_SKO_KEY_ESTABLISHED; + } else { + key_info->flags |= FSL_SKO_KEY_ESTABLISHED; + } + + return ret; +} /* end fn fsl_shw_establish_key */ + +/*! + * Wrap a key and retrieve the wrapped value. + * + * A wrapped key is a key that has been cryptographically obscured. It is + * only able to be used with #fsl_shw_establish_key(). + * + * This function will also release a software key (see #fsl_shw_release_key()) + * so it must be re-established before reuse. This is not true of PGM keys. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * @param[out] covered_key The location to store the 48-octet wrapped key. + * (This size is based upon the maximum key size + * of 32 octets). + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* For now, only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Wrapping a key\n"); +#endif + + if (!(key_info->flags & FSL_SKO_KEY_ESTABLISHED)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("%s: Key not established\n", __FUNCTION__); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + /* Verify that a SW key info really belongs to a SW key */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + /* ret = FSL_RETURN_BAD_FLAG_S; + goto out;*/ + } + + ret = wrap(user_ctx, key_info, covered_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + /* Need to deallocate on successful extraction */ + (void)dealloc_slot(user_ctx, key_info); + /* Mark key not available in the flags */ + key_info->flags &= + ~(FSL_SKO_KEY_ESTABLISHED | FSL_SKO_KEY_PRESENT); + memset(key_info->key, 0, sizeof(key_info->key)); + } + + out: + return ret; +} /* end fn fsl_shw_extract_key */ + +/*! + * De-establish a key so that it can no longer be accessed. + * + * The key will need to be re-established before it can again be used. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + /* For now, only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Not in blocking mode\n"); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Releasing a key\n"); +#endif + + if (!(key_info->flags & FSL_SKO_KEY_ESTABLISHED)) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Key not established\n"); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + (void)dealloc_slot(user_ctx, key_info); + /* Turn off 'established' flag */ +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("dealloc_slot() called\n"); +#endif + key_info->flags &= ~FSL_SKO_KEY_ESTABLISHED; + ret = FSL_RETURN_OK_S; + goto out; + } + + if ((key_info->pf_key == FSL_SHW_PF_KEY_PRG) + || (key_info->pf_key == FSL_SHW_PF_KEY_IIM_PRG)) { + di_return_t di_ret; + + di_ret = dryice_release_programmed_key(); + if (di_ret != DI_SUCCESS) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS + ("dryice_release_programmed_key() failed: %d\n", + di_ret); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + } else { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Neither SW nor HW key\n"); +#endif + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + ret = FSL_RETURN_OK_S; + + out: + return ret; +} /* end fn fsl_shw_release_key */ + +fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, uint8_t * key) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + + /* Only blocking mode calls are supported */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + printk("Reading a key\n"); +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Reading a key"); +#endif + if (key_info->flags & FSL_SKO_KEY_PRESENT) { + memcpy(key_info->key, key, key_info->key_length); + ret = FSL_RETURN_OK_S; + } else if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + printk("key established\n"); + if (key_info->keystore == NULL) { + printk("keystore is null\n"); + /* First verify that the key access is valid */ + ret = + system_keystore.slot_verify_access(system_keystore. + user_data, + key_info->userid, + key_info-> + handle); + + printk("key in system keystore\n"); + + /* Key is in system keystore */ + ret = keystore_slot_read(&system_keystore, + key_info->userid, + key_info->handle, + key_info->key_length, key); + } else { + printk("key goes in user keystore.\n"); + /* Key goes in user keystore */ + ret = keystore_slot_read(key_info->keystore, + key_info->userid, + key_info->handle, + key_info->key_length, key); + } + } + + out: + return ret; +} /* end fn fsl_shw_read_key */ + +#else /* __KERNEL__ && DRYICE */ + +/* User mode -- these functions are unsupported */ + +fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key) +{ + (void)user_ctx; + (void)key_info; + (void)establish_type; + (void)key; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key) +{ + (void)user_ctx; + (void)key_info; + (void)covered_key; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + (void)user_ctx; + (void)key_info; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, uint8_t * key) +{ + (void)user_ctx; + (void)key_info; + (void)key; + + return FSL_RETURN_NO_RESOURCE_S; +} + +#endif /* __KERNEL__ && DRYICE */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/rng_rnga.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/rng_rnga.h @@ -0,0 +1,181 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef RNG_RNGA_H +#define RNG_RNGA_H + +/*! @defgroup rngaregs RNGA Registers + * @ingroup RNG + * These are the definitions for the RNG registers and their offsets + * within the RNG. They are used in the @c register_offset parameter of + * #rng_read_register() and #rng_write_register(). + */ +/*! @addtogroup rngaregs */ +/*! @{ */ + +/*! Control Register. See @ref rngacontrolreg. */ +#define RNGA_CONTROL 0x00 +/*! Status Register. See @ref rngastatusreg. */ +#define RNGA_STATUS 0x04 +/*! Register for adding to the Entropy of the RNG */ +#define RNGA_ENTROPY 0x08 +/*! Register containing latest 32 bits of random value */ +#define RNGA_OUTPUT_FIFO 0x0c +/*! Mode Register. Non-secure mode access only. See @ref rngmodereg. */ +#define RNGA_MODE 0x10 +/*! Verification Control Register. Non-secure mode access only. See + * @ref rngvfctlreg. */ +#define RNGA_VERIFICATION_CONTROL 0x14 +/*! Oscillator Control Counter Register. Non-secure mode access only. + * See @ref rngosccntctlreg. */ +#define RNGA_OSCILLATOR_CONTROL_COUNTER 0x18 +/*! Oscillator 1 Counter Register. Non-secure mode access only. See + * @ref rngosccntreg. */ +#define RNGA_OSCILLATOR1_COUNTER 0x1c +/*! Oscillator 2 Counter Register. Non-secure mode access only. See + * @ref rngosccntreg. */ +#define RNGA_OSCILLATOR2_COUNTER 0x20 +/*! Oscillator Counter Status Register. Non-secure mode access only. See + * @ref rngosccntstatreg. */ +#define RNGA_OSCILLATOR_COUNTER_STATUS 0x24 +/*! @} */ + +/*! Total address space of the RNGA, in bytes */ +#define RNG_ADDRESS_RANGE 0x28 + +/*! @defgroup rngacontrolreg RNGA Control Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngacontrolreg */ +/*! @{ */ +/*! These bits are unimplemented or reserved */ +#define RNGA_CONTROL_ZEROS_MASK 0x0fffffe0 +/*! 'RNG type' - should be 0 for RNGA */ +#define RNGA_CONTROL_RNG_TYPE_MASK 0xf0000000 +/*! Number of bits to shift the type to get it to LSB */ +#define RNGA_CONTROL_RNG_TYPE_SHIFT 28 +/*! Put RNG to sleep */ +#define RNGA_CONTROL_SLEEP 0x00000010 +/*! Clear interrupt & status */ +#define RNGA_CONTROL_CLEAR_INTERRUPT 0x00000008 +/*! Mask interrupt generation */ +#define RNGA_CONTROL_MASK_INTERRUPTS 0x00000004 +/*! Enter into Secure Mode. Notify SCC of security violation should FIFO + * underflow occur. */ +#define RNGA_CONTROL_HIGH_ASSURANCE 0x00000002 +/*! Load data into FIFO */ +#define RNGA_CONTROL_GO 0x00000001 +/*! @} */ + +/*! @defgroup rngastatusreg RNGA Status Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngastatusreg */ +/*! @{ */ +/*! RNG Oscillator not working */ +#define RNGA_STATUS_OSCILLATOR_DEAD 0x80000000 +/*! These bits are undefined or reserved */ +#define RNGA_STATUS_ZEROS1_MASK 0x7f000000 +/*! How big FIFO is, in bytes */ +#define RNGA_STATUS_OUTPUT_FIFO_SIZE_MASK 0x00ff0000 +/*! How many bits right to shift fifo size to make it LSB */ +#define RNGA_STATUS_OUTPUT_FIFO_SIZE_SHIFT 16 +/*! How many bytes are currently in the FIFO */ +#define RNGA_STATUS_OUTPUT_FIFO_LEVEL_MASK 0x0000ff00 +/*! How many bits right to shift fifo level to make it LSB */ +#define RNGA_STATUS_OUTPUT_FIFO_LEVEL_SHIFT 8 +/*! These bits are undefined or reserved. */ +#define RNGA_STATUS_ZEROS2_MASK 0x000000e0 +/*! RNG is sleeping. */ +#define RNGA_STATUS_SLEEP 0x00000010 +/*! Error detected. */ +#define RNGA_STATUS_ERROR_INTERRUPT 0x00000008 +/*! FIFO was empty on some read since last status read. */ +#define RNGA_STATUS_FIFO_UNDERFLOW 0x00000004 +/*! FIFO was empty on most recent read. */ +#define RNGA_STATUS_LAST_READ_STATUS 0x00000002 +/*! Security violation occurred. Will only happen in High Assurance mode. */ +#define RNGA_STATUS_SECURITY_VIOLATION 0x00000001 +/*! @} */ + +/*! @defgroup rngmodereg RNG Mode Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngmodereg */ +/*! @{ */ +/*! These bits are undefined or reserved */ +#define RNGA_MODE_ZEROS_MASK 0xfffffffc +/*! RNG is in / put RNG in Oscillator Frequency Test Mode. */ +#define RNGA_MODE_OSCILLATOR_FREQ_TEST 0x00000002 +/*! Put RNG in verification mode / RNG is in verification mode. */ +#define RNGA_MODE_VERIFICATION 0x00000001 +/*! @} */ + +/*! @defgroup rngvfctlreg RNG Verification Control Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngvfctlreg */ +/*! @{ */ +/*! These bits are undefined or reserved. */ +#define RNGA_VFCTL_ZEROS_MASK 0xfffffff8 +/*! Reset the shift registers. */ +#define RNGA_VFCTL_RESET_SHIFT_REGISTERS 0x00000004 +/*! Drive shift registers from system clock. */ +#define RNGA_VFCTL_FORCE_SYSTEM_CLOCK 0x00000002 +/*! Turn off shift register clocks. */ +#define RNGA_VFCTL_SHIFT_CLOCK_OFF 0x00000001 +/*! @} */ + +/*! + * @defgroup rngosccntctlreg RNG Oscillator Counter Control Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngosccntctlreg */ +/*! @{ */ +/*! These bits are undefined or reserved. */ +#define RNGA_OSCCR_ZEROS_MASK 0xfffc0000 +/*! Bits containing clock cycle counter */ +#define RNGA_OSCCR_CLOCK_CYCLES_MASK 0x0003ffff +/*! Bits to shift right RNG_OSCCR_CLOCK_CYCLES_MASK */ +#define RNGA_OSCCR_CLOCK_CYCLES_SHIFT 0 +/*! @} */ + +/*! + * @defgroup rngosccntreg RNG Oscillator (1 and 2) Counter Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngosccntreg */ +/*! @{ */ +/*! These bits are undefined or reserved. */ +#define RNGA_COUNTER_ZEROS_MASK 0xfff00000 +/*! Bits containing number of clock pulses received from the oscillator. */ +#define RNGA_COUNTER_PULSES_MASK 0x000fffff +/*! Bits right to shift RNG_COUNTER_PULSES_MASK to make it LSB. */ +#define RNGA_COUNTER_PULSES_SHIFT 0 +/*! @} */ + +/*! + * @defgroup rngosccntstatreg RNG Oscillator Counter Status Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngosccntstatreg */ +/*! @{ */ +/*! These bits are undefined or reserved. */ +#define RNGA_COUNTER_STATUS_ZEROS_MASK 0xfffffffc +/*! Oscillator 2 has toggled 0x400 times */ +#define RNGA_COUNTER_STATUS_OSCILLATOR2 0x00000002 +/*! Oscillator 1 has toggled 0x400 times */ +#define RNGA_COUNTER_STATUS_OSCILLATOR1 0x00000001 +/*! @} */ + +#endif /* RNG_RNGA_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/shw_internals.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/shw_internals.h @@ -0,0 +1,162 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef SHW_INTERNALS_H +#define SHW_INTERNALS_H + +/*! @file shw_internals.h + * + * This file contains definitions which are internal to the SHW driver. + * + * This header file should only ever be included by shw_driver.c + * + * Compile-time flags minimally needed: + * + * @li Some sort of platform flag. + * + */ + +#include "portable_os.h" +#include "shw_driver.h" + +/*! @defgroup shwcompileflags SHW Compile Flags + * + * These are flags which are used to configure the SHW driver at compilation + * time. + * + * The terms 'defined' and 'undefined' refer to whether a @c \#define (or -D on + * a compile command) has defined a given preprocessor symbol. If a given + * symbol is defined, then @c \#ifdef \ will succeed. Some symbols + * described below default to not having a definition, i.e. they are undefined. + * + */ + +/*! @addtogroup shwcompileflags */ +/*! @{ */ +#ifndef SHW_MAJOR_NODE +/*! + * This should be configured in a Makefile/compile command line. It is the + * value the driver will use to register itself as a device driver for a + * /dev/node file. Zero means allow (Linux) to assign a value. Any positive + * number will be attempted as the registration value, to allow for + * coordination with the creation/existence of a /dev/fsl_shw (for instance) + * file in the filesystem. + */ +#define SHW_MAJOR_NODE 0 +#endif + +/* Temporarily define compile-time flags to make Doxygen happy and allow them + to get into the documentation. */ +#ifdef DOXYGEN_HACK + +/*! + * Turn on compilation of run-time operational, debug, and error messages. + * + * This flag is undefined by default. + */ +/* REQ-FSLSHW-DEBUG-001 */ +#define SHW_DEBUG +#undef SHW_DEBUG + +/*! @} */ +#endif /* end DOXYGEN_HACK */ + +#ifndef SHW_DRIVER_NAME +/*! @addtogroup shwcompileflags */ +/*! @{ */ +/*! Name the driver will use to register itself to the kernel as the driver for + * the #shw_major_node and interrupt handling. */ +#define SHW_DRIVER_NAME "fsl_shw" +/*! @} */ +#endif +/*#define SHW_DEBUG*/ + +/*! + * Add a user context onto the list of registered users. + * + * Place it at the head of the #user_list queue. + * + * @param ctx A pointer to a user context + * + * @return void + */ +inline static void SHW_ADD_USER(fsl_shw_uco_t * ctx) +{ + os_lock_context_t lock_context; + + os_lock_save_context(shw_queue_lock, lock_context); + ctx->next = user_list; + user_list = ctx; + os_unlock_restore_context(shw_queue_lock, lock_context); + +} + +/*! + * Remove a user context from the list of registered users. + * + * @param ctx A pointer to a user context + * + * @return void + * + */ +inline static void SHW_REMOVE_USER(fsl_shw_uco_t * ctx) +{ + fsl_shw_uco_t *prev_ctx = user_list; + os_lock_context_t lock_context; + + os_lock_save_context(shw_queue_lock, lock_context); + + if (prev_ctx == ctx) { + /* Found at head, so just set new head */ + user_list = ctx->next; + } else { + for (; (prev_ctx != NULL); prev_ctx = prev_ctx->next) { + if (prev_ctx->next == ctx) { + prev_ctx->next = ctx->next; + break; + } + } + } + os_unlock_restore_context(shw_queue_lock, lock_context); +} + +static void shw_user_callback(fsl_shw_uco_t * uco); + +/* internal functions */ +static os_error_code shw_setup_user_driver_interaction(void); +static void shw_cleanup(void); + +static os_error_code init_uco(fsl_shw_uco_t * user_ctx, void *user_mode_uco); +static os_error_code get_capabilities(fsl_shw_uco_t * user_ctx, + void *user_mode_pco_request); +static os_error_code get_results(fsl_shw_uco_t * user_ctx, + void *user_mode_result_req); +static os_error_code get_random(fsl_shw_uco_t * user_ctx, + void *user_mode_get_random_req); +static os_error_code add_entropy(fsl_shw_uco_t * user_ctx, + void *user_mode_add_entropy_req); + +void* wire_user_memory(void* address, uint32_t length, void** page_ctx); +void unwire_user_memory(void** page_ctx); +os_error_code map_user_memory(struct vm_area_struct* vma, + uint32_t physical_addr, uint32_t size); +os_error_code unmap_user_memory(uint32_t user_addr, uint32_t size); + +#if defined(LINUX_VERSION_CODE) + +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_DESCRIPTION("Device Driver for FSL SHW API"); + +#endif /* LINUX_VERSION_CODE */ + +#endif /* SHW_INTERNALS_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/shw_hmac.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/shw_hmac.h @@ -0,0 +1,82 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @file shw_hmac.h + * + * This file contains definitions for use of the (internal) SHW HMAC + * software computation. It defines the usual three steps: + * + * - #shw_hmac_init() + * - #shw_hmac_update() + * - #shw_hmac_final() + * + * The only other item of note to callers is #SHW_HASH_LEN, which is the number + * of bytes calculated for the HMAC. + */ + +#ifndef SHW_HMAC_H +#define SHW_HMAC_H + +#include "shw_hash.h" + +/*! + * State for an HMAC + * + * Note to callers: This structure contains key material and should be kept in + * a secure location, such as internal RAM. + */ +typedef struct shw_hmac_state { + shw_hash_state_t inner_hash; /*!< Current state of inner hash */ + shw_hash_state_t outer_hash; /*!< Current state of outer hash */ +} shw_hmac_state_t; + +/*! + * Initialize the HMAC state structure with the HMAC key + * + * @param state Address of HMAC state structure. + * @param key Address of the key to be used for the HMAC. + * @param key_len Number of bytes of @c key. This must not be greater than + * the block size of the underlying hash (#SHW_HASH_BLOCK_LEN). + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_init(shw_hmac_state_t * state, + const uint8_t * key, unsigned int key_len); + +/*! + * Put data into the HMAC calculation + * + * @param state Address of HMAC state structure. + * @param msg Address of the message data for the HMAC. + * @param msg_len Number of bytes of @c msg. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_update(shw_hmac_state_t * state, + const uint8_t * msg, unsigned int msg_len); + +/*! + * Calculate the final HMAC + * + * @param state Address of HMAC state structure. + * @param hmac Address of location to store the HMAC. + * @param hmac_len Number of bytes of @c mac to be stored. Probably best if + * this value is no greater than #SHW_HASH_LEN. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hmac_final(shw_hmac_state_t * state, + uint8_t * hmac, unsigned int hmac_len); + +#endif /* SHW_HMAC_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/shw_driver.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/shw_driver.h @@ -0,0 +1,2971 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef SHW_DRIVER_H +#define SHW_DRIVER_H + +/* This is a Linux flag meaning 'compiling kernel code'... */ +#ifndef __KERNEL__ +#include +#include +#include +#include +#include +#else +#include "../../sahara2/include/portable_os.h" +#endif /* __KERNEL__ */ + +#include "../../sahara2/include/fsl_platform.h" + +/*! @file shw_driver.h + * + * @brief Header file to use the SHW driver. + * + * The SHW driver is used in two modes: By a user, from the FSL SHW API in user + * space, which goes through /dev/fsl_shw to make open(), ioctl(), and close() + * calls; and by other kernel modules/drivers, which use the FSL SHW API, parts + * of which are supported directly by the SHW driver. + * + * Testing is performed by using the apitest and kernel api test routines + * developed for the Sahara2 driver. + */ +/*#define DIAG_SECURITY_FUNC*/ +/*! Perform a security function. */ +#define SHW_IOCTL_REQUEST 21 + +/* This definition may need a new name, and needs to go somewhere which + * can determine platform, kernel vs. user, os, etc. + */ +#define copy_bytes(out, in, len) memcpy(out, in, len) + + +/*! + * This is part of the IOCTL request type passed between kernel and user space. + * It is added to #SHW_IOCTL_REQUEST to generate the actual value. + */ +typedef enum shw_user_request_t { + SHW_USER_REQ_REGISTER_USER, /*!< Initialize user-kernel discussion. */ + SHW_USER_REQ_DEREGISTER_USER, /*!< Terminate user-kernel discussion. */ + SHW_USER_REQ_GET_RESULTS, /*!< Get information on outstanding + results. */ + SHW_USER_REQ_GET_CAPABILITIES, /*!< Get information on hardware support. */ + SHW_USER_REQ_GET_RANDOM, /*!< Get random data from RNG. */ + SHW_USER_REQ_ADD_ENTROPY, /*!< Add entropy to hardware RNG. */ + SHW_USER_REQ_DROP_PERMS, /*!< Diminish the permissions of a block of + secure memory */ + SHW_USER_REQ_SSTATUS, /*!< Check the status of a block of secure + memory */ + SHW_USER_REQ_SFREE, /*!< Free a block of secure memory */ + SHW_USER_REQ_SCC_ENCRYPT, /*!< Encrypt a region of user-owned secure + memory */ + SHW_USER_REQ_SCC_DECRYPT, /*!< Decrypt a region of user-owned secure + memory */ +} shw_user_request_t; + + +/*! + * @typedef scc_partition_status_t + */ +/** Partition status information. */ +typedef enum fsl_shw_partition_status_t { + FSL_PART_S_UNUSABLE, /*!< Partition not implemented */ + FSL_PART_S_UNAVAILABLE, /*!< Partition owned by other host */ + FSL_PART_S_AVAILABLE, /*!< Partition available */ + FSL_PART_S_ALLOCATED, /*!< Partition owned by host but not engaged + */ + FSL_PART_S_ENGAGED, /*!< Partition owned by host and engaged */ +} fsl_shw_partition_status_t; + + +/* + * Structure passed during user ioctl() calls to manage secure partitions. + */ +typedef struct scc_partition_info_t { + uint32_t user_base; /*!< Userspace pointer to base of partition */ + uint32_t permissions; /*!< Permissions to give the partition (only + used in call to _DROP_PERMS) */ + fsl_shw_partition_status_t status; /*!< Status of the partition */ +} scc_partition_info_t; + + +/****************************************************************************** + * Enumerations + *****************************************************************************/ +/*! + * Flags for the state of the User Context Object (#fsl_shw_uco_t). + */ +typedef enum fsl_shw_user_ctx_flags_t +{ + /*! + * API will block the caller until operation completes. The result will be + * available in the return code. If this is not set, user will have to get + * results using #fsl_shw_get_results(). + */ + FSL_UCO_BLOCKING_MODE = 0x01, + /*! + * User wants callback (at the function specified with + * #fsl_shw_uco_set_callback()) when the operation completes. This flag is + * valid only if #FSL_UCO_BLOCKING_MODE is not set. + */ + FSL_UCO_CALLBACK_MODE = 0x02, + /*! Do not free descriptor chain after driver (adaptor) finishes */ + FSL_UCO_SAVE_DESC_CHAIN = 0x04, + /*! + * User has made at least one request with callbacks requested, so API is + * ready to handle others. + */ + FSL_UCO_CALLBACK_SETUP_COMPLETE = 0x08, + /*! + * (virtual) pointer to descriptor chain is completely linked with physical + * (DMA) addresses, ready for the hardware. This flag should not be used + * by FSL SHW API programs. + */ + FSL_UCO_CHAIN_PREPHYSICALIZED = 0x10, + /*! + * The user has changed the context but the changes have not been copied to + * the kernel driver. + */ + FSL_UCO_CONTEXT_CHANGED = 0x20, + /*! Internal Use. This context belongs to a user-mode API user. */ + FSL_UCO_USERMODE_USER = 0x40, +} fsl_shw_user_ctx_flags_t; + + +/*! + * Return code for FSL_SHW library. + * + * These codes may be returned from a function call. In non-blocking mode, + * they will appear as the status in a Result Object. + */ +/* REQ-FSLSHW-ERR-001 */ +typedef enum fsl_shw_return_t +{ + /*! + * No error. As a function return code in Non-blocking mode, this may + * simply mean that the operation was accepted for eventual execution. + */ + FSL_RETURN_OK_S = 0, + /*! Failure for non-specific reason. */ + FSL_RETURN_ERROR_S, + /*! + * Operation failed because some resource was not able to be allocated. + */ + FSL_RETURN_NO_RESOURCE_S, + /*! Crypto algorithm unrecognized or improper. */ + FSL_RETURN_BAD_ALGORITHM_S, + /*! Crypto mode unrecognized or improper. */ + FSL_RETURN_BAD_MODE_S, + /*! Flag setting unrecognized or inconsistent. */ + FSL_RETURN_BAD_FLAG_S, + /*! Improper or unsupported key length for algorithm. */ + FSL_RETURN_BAD_KEY_LENGTH_S, + /*! Improper parity in a (DES, TDES) key. */ + FSL_RETURN_BAD_KEY_PARITY_S, + /*! + * Improper or unsupported data length for algorithm or internal buffer. + */ + FSL_RETURN_BAD_DATA_LENGTH_S, + /*! Authentication / Integrity Check code check failed. */ + FSL_RETURN_AUTH_FAILED_S, + /*! A memory error occurred. */ + FSL_RETURN_MEMORY_ERROR_S, + /*! An error internal to the hardware occurred. */ + FSL_RETURN_INTERNAL_ERROR_S, + /*! ECC detected Point at Infinity */ + FSL_RETURN_POINT_AT_INFINITY_S, + /*! ECC detected No Point at Infinity */ + FSL_RETURN_POINT_NOT_AT_INFINITY_S, + /*! GCD is One */ + FSL_RETURN_GCD_IS_ONE_S, + /*! GCD is not One */ + FSL_RETURN_GCD_IS_NOT_ONE_S, + /*! Candidate is Prime */ + FSL_RETURN_PRIME_S, + /*! Candidate is not Prime */ + FSL_RETURN_NOT_PRIME_S, + /*! N register loaded improperly with even value */ + FSL_RETURN_EVEN_MODULUS_ERROR_S, + /*! Divisor is zero. */ + FSL_RETURN_DIVIDE_BY_ZERO_ERROR_S, + /*! Bad Exponent or Scalar value for Point Multiply */ + FSL_RETURN_BAD_EXPONENT_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_OSCILLATOR_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_STATISTICS_ERROR_S, +} fsl_shw_return_t; + + +/*! + * Algorithm Identifier. + * + * Selection of algorithm will determine how large the block size of the + * algorithm is. Context size is the same length unless otherwise specified. + * Selection of algorithm also affects the allowable key length. + */ +typedef enum fsl_shw_key_alg_t +{ + /*! + * Key will be used to perform an HMAC. Key size is 1 to 64 octets. Block + * size is 64 octets. + */ + FSL_KEY_ALG_HMAC, + /*! + * Advanced Encryption Standard (Rijndael). Block size is 16 octets. Key + * size is 16 octets. (The single choice of key size is a Sahara platform + * limitation.) + */ + FSL_KEY_ALG_AES, + /*! + * Data Encryption Standard. Block size is 8 octets. Key size is 8 + * octets. + */ + FSL_KEY_ALG_DES, + /*! + * 2- or 3-key Triple DES. Block size is 8 octets. Key size is 16 octets + * for 2-key Triple DES, and 24 octets for 3-key. + */ + FSL_KEY_ALG_TDES, + /*! + * ARC4. No block size. Context size is 259 octets. Allowed key size is + * 1-16 octets. (The choices for key size are a Sahara platform + * limitation.) + */ + FSL_KEY_ALG_ARC4, +} fsl_shw_key_alg_t; + + +/*! + * Mode selector for Symmetric Ciphers. + * + * The selection of mode determines how a cryptographic algorithm will be + * used to process the plaintext or ciphertext. + * + * For all modes which are run block-by-block (that is, all but + * #FSL_SYM_MODE_STREAM), any partial operations must be performed on a text + * length which is multiple of the block size. Except for #FSL_SYM_MODE_CTR, + * these block-by-block algorithms must also be passed a total number of octets + * which is a multiple of the block size. + * + * In modes which require that the total number of octets of data be a multiple + * of the block size (#FSL_SYM_MODE_ECB and #FSL_SYM_MODE_CBC), and the user + * has a total number of octets which are not a multiple of the block size, the + * user must perform any necessary padding to get to the correct data length. + */ +typedef enum fsl_shw_sym_mode_t +{ + /*! + * Stream. There is no associated block size. Any request to process data + * may be of any length. This mode is only for ARC4 operations, and is + * also the only mode used for ARC4. + */ + FSL_SYM_MODE_STREAM, + + /*! + * Electronic Codebook. Each block of data is encrypted/decrypted. The + * length of the data stream must be a multiple of the block size. This + * mode may be used for DES, 3DES, and AES. The block size is determined + * by the algorithm. + */ + FSL_SYM_MODE_ECB, + /*! + * Cipher-Block Chaining. Each block of data is encrypted/decrypted and + * then "chained" with the previous block by an XOR function. Requires + * context to start the XOR (previous block). This mode may be used for + * DES, 3DES, and AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CBC, + /*! + * Counter. The counter is encrypted, then XORed with a block of data. + * The counter is then incremented (using modulus arithmetic) for the next + * block. The final operation may be non-multiple of block size. This mode + * may be used for AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CTR, +} fsl_shw_sym_mode_t; + + +/*! + * Algorithm selector for Cryptographic Hash functions. + * + * Selection of algorithm determines how large the context and digest will be. + * Context is the same size as the digest (resulting hash), unless otherwise + * specified. + */ +typedef enum fsl_shw_hash_alg_t +{ + FSL_HASH_ALG_MD5, /*!< MD5 algorithm. Digest is 16 octets. */ + FSL_HASH_ALG_SHA1, /*!< SHA-1 (aka SHA or SHA-160) algorithm. + Digest is 20 octets. */ + FSL_HASH_ALG_SHA224, /*!< SHA-224 algorithm. Digest is 28 octets, + though context is 32 octets. */ + FSL_HASH_ALG_SHA256 /*!< SHA-256 algorithm. Digest is 32 + octets. */ +} fsl_shw_hash_alg_t; + + +/*! + * The type of Authentication-Cipher function which will be performed. + */ +typedef enum fsl_shw_acc_mode_t +{ + /*! + * CBC-MAC for Counter. Requires context and modulus. Final operation may + * be non-multiple of block size. This mode may be used for AES. + */ + FSL_ACC_MODE_CCM, + /*! + * SSL mode. Not supported. Combines HMAC and encrypt (or decrypt). + * Needs one key object for encryption, another for the HMAC. The usual + * hashing and symmetric encryption algorithms are supported. + */ + FSL_ACC_MODE_SSL +} fsl_shw_acc_mode_t; + + +/* REQ-FSLSHW-PINTFC-COA-HCO-001 */ +/*! + * Flags which control a Hash operation. + */ +typedef enum fsl_shw_hash_ctx_flags_t +{ + FSL_HASH_FLAGS_INIT = 0x01, /*!< Context is empty. Hash is started + from scratch, with a message-processed + count of zero. */ + FSL_HASH_FLAGS_SAVE = 0x02, /*!< Retrieve context from hardware after + hashing. If used with the + #FSL_HASH_FLAGS_FINALIZE flag, the final + digest value will be saved in the + object. */ + FSL_HASH_FLAGS_LOAD = 0x04, /*!< Place context into hardware before + hashing. */ + FSL_HASH_FLAGS_FINALIZE = 0x08, /*!< PAD message and perform final digest + operation. If user message is + pre-padded, this flag should not be + used. */ +} fsl_shw_hash_ctx_flags_t; + + +/*! + * Flags which control an HMAC operation. + * + * These may be combined by ORing them together. See #fsl_shw_hmco_set_flags() + * and #fsl_shw_hmco_clear_flags(). + */ +typedef enum fsl_shw_hmac_ctx_flags_t +{ + FSL_HMAC_FLAGS_INIT = 1, /**< Message context is empty. HMAC is + started from scratch (with key) or from + precompute of inner hash, depending on + whether + #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT is + set. */ + FSL_HMAC_FLAGS_SAVE = 2, /**< Retrieve ongoing context from hardware + after hashing. If used with the + #FSL_HMAC_FLAGS_FINALIZE flag, the final + digest value (HMAC) will be saved in the + object. */ + FSL_HMAC_FLAGS_LOAD = 4, /**< Place ongoing context into hardware + before hashing. */ + FSL_HMAC_FLAGS_FINALIZE = 8, /**< PAD message and perform final HMAC + operations of inner and outer hashes. */ + FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT = 16 /**< This means that the context + contains precomputed inner and outer + hash values. */ +} fsl_shw_hmac_ctx_flags_t; + + +/** + * Flags to control use of the #fsl_shw_scco_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_scco_set_flags() and #fsl_shw_scco_clear_flags() + */ +typedef enum fsl_shw_sym_ctx_flags_t +{ + /** + * Context is empty. In ARC4, this means that the S-Box needs to be + * generated from the key. In #FSL_SYM_MODE_CBC mode, this allows an IV of + * zero to be specified. In #FSL_SYM_MODE_CTR mode, it means that an + * initial CTR value of zero is desired. + */ + FSL_SYM_CTX_INIT = 1, + /** + * Load context from object into hardware before running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_LOAD = 2, + /** + * Save context from hardware into object after running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_SAVE = 4, + /** + * Context (SBox) is to be unwrapped and wrapped on each use. + * This flag is unsupported. + * */ + FSL_SYM_CTX_PROTECT = 8, +} fsl_shw_sym_ctx_flags_t; + + +/** + * Flags which describe the state of the #fsl_shw_sko_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_sko_set_flags() and #fsl_shw_sko_clear_flags() + */ +typedef enum fsl_shw_key_flags_t +{ + FSL_SKO_KEY_IGNORE_PARITY = 1, /*!< If algorithm is DES or 3DES, do not + validate the key parity bits. */ + FSL_SKO_KEY_PRESENT = 2, /*!< Clear key is present in the object. */ + FSL_SKO_KEY_ESTABLISHED = 4, /*!< Key has been established for use. This + feature is not available for all + platforms, nor for all algorithms and + modes.*/ + FSL_SKO_USE_SECRET_KEY = 8, /*!< Use device-unique key. Not always + available. */ + FSL_SKO_KEY_SW_KEY = 16, /*!< Clear key can be provided to the user */ + FSL_SKO_KEY_SELECT_PF_KEY = 32, /*!< Internal flag to show that this key + references one of the hardware keys, and + its value is in pf_key. */ +} fsl_shw_key_flags_t; + + +/** + * Type of value which is associated with an established key. + */ +typedef uint64_t key_userid_t; + + +/** + * Flags which describe the state of the #fsl_shw_acco_t. + * + * The @a FSL_ACCO_CTX_INIT and @a FSL_ACCO_CTX_FINALIZE flags, when used + * together, provide for a one-shot operation. + */ +typedef enum fsl_shw_auth_ctx_flags_t +{ + FSL_ACCO_CTX_INIT = 1, /**< Initialize Context(s) */ + FSL_ACCO_CTX_LOAD = 2, /**< Load intermediate context(s). + This flag is unsupported. */ + FSL_ACCO_CTX_SAVE = 4, /**< Save intermediate context(s). + This flag is unsupported. */ + FSL_ACCO_CTX_FINALIZE = 8, /**< Create MAC during this operation. */ + FSL_ACCO_NIST_CCM = 0x10, /**< Formatting of CCM input data is + performed by calls to + #fsl_shw_ccm_nist_format_ctr_and_iv() and + #fsl_shw_ccm_nist_update_ctr_and_iv(). */ +} fsl_shw_auth_ctx_flags_t; + + +/** + * The operation which controls the behavior of #fsl_shw_establish_key(). + * + * These values are passed to #fsl_shw_establish_key(). + */ +typedef enum fsl_shw_key_wrap_t +{ + FSL_KEY_WRAP_CREATE, /**< Generate a key from random values. */ + FSL_KEY_WRAP_ACCEPT, /**< Use the provided clear key. */ + FSL_KEY_WRAP_UNWRAP /**< Unwrap a previously wrapped key. */ +} fsl_shw_key_wrap_t; + + +/** + * Modulus Selector for CTR modes. + * + * The incrementing of the Counter value may be modified by a modulus. If no + * modulus is needed or desired for AES, use #FSL_CTR_MOD_128. + */ +typedef enum fsl_shw_ctr_mod_t +{ + FSL_CTR_MOD_8, /**< Run counter with modulus of 2^8. */ + FSL_CTR_MOD_16, /**< Run counter with modulus of 2^16. */ + FSL_CTR_MOD_24, /**< Run counter with modulus of 2^24. */ + FSL_CTR_MOD_32, /**< Run counter with modulus of 2^32. */ + FSL_CTR_MOD_40, /**< Run counter with modulus of 2^40. */ + FSL_CTR_MOD_48, /**< Run counter with modulus of 2^48. */ + FSL_CTR_MOD_56, /**< Run counter with modulus of 2^56. */ + FSL_CTR_MOD_64, /**< Run counter with modulus of 2^64. */ + FSL_CTR_MOD_72, /**< Run counter with modulus of 2^72. */ + FSL_CTR_MOD_80, /**< Run counter with modulus of 2^80. */ + FSL_CTR_MOD_88, /**< Run counter with modulus of 2^88. */ + FSL_CTR_MOD_96, /**< Run counter with modulus of 2^96. */ + FSL_CTR_MOD_104, /**< Run counter with modulus of 2^104. */ + FSL_CTR_MOD_112, /**< Run counter with modulus of 2^112. */ + FSL_CTR_MOD_120, /**< Run counter with modulus of 2^120. */ + FSL_CTR_MOD_128 /**< Run counter with modulus of 2^128. */ +} fsl_shw_ctr_mod_t; + + +/** + * A work type associated with a work/result queue request. + */ +typedef enum shw_work_type_t +{ + SHW_WORK_GET_RANDOM = 1, /**< fsl_shw_get_random() request. */ + SHW_WORK_ADD_RANDOM, /**< fsl_shw_add_entropy() request. */ +} shw_work_type_t; + + +/** + * Permissions flags for Secure Partitions + */ +typedef enum fsl_shw_permission_t +{ +/** SCM Access Permission: Do not zeroize/deallocate partition on SMN Fail state */ + FSL_PERM_NO_ZEROIZE = 0x80000000, +/** SCM Access Permission: Enforce trusted key read in */ + FSL_PERM_TRUSTED_KEY_READ = 0x40000000, +/** SCM Access Permission: Ignore Supervisor/User mode in permission determination */ + FSL_PERM_HD_S = 0x00000800, +/** SCM Access Permission: Allow Read Access to Host Domain */ + FSL_PERM_HD_R = 0x00000400, +/** SCM Access Permission: Allow Write Access to Host Domain */ + FSL_PERM_HD_W = 0x00000200, +/** SCM Access Permission: Allow Execute Access to Host Domain */ + FSL_PERM_HD_X = 0x00000100, +/** SCM Access Permission: Allow Read Access to Trusted Host Domain */ + FSL_PERM_TH_R = 0x00000040, +/** SCM Access Permission: Allow Write Access to Trusted Host Domain */ + FSL_PERM_TH_W = 0x00000020, +/** SCM Access Permission: Allow Read Access to Other/World Domain */ + FSL_PERM_OT_R = 0x00000004, +/** SCM Access Permission: Allow Write Access to Other/World Domain */ + FSL_PERM_OT_W = 0x00000002, +/** SCM Access Permission: Allow Execute Access to Other/World Domain */ + FSL_PERM_OT_X = 0x00000001, +} fsl_shw_permission_t; + +/*! + * Select the cypher mode to use for partition cover/uncover operations. + * + * They currently map directly to the values used in the SCC2 driver, but this + * is not guarinteed behavior. + */ +typedef enum fsl_shw_cypher_mode_t +{ + FSL_SHW_CYPHER_MODE_ECB = 1, /*!< ECB mode */ + FSL_SHW_CYPHER_MODE_CBC = 2, /*!< CBC mode */ +} fsl_shw_cypher_mode_t; + +/*! + * Which platform key should be presented for cryptographic use. + */ +typedef enum fsl_shw_pf_key_t { + FSL_SHW_PF_KEY_IIM, /*!< Present fused IIM key */ + FSL_SHW_PF_KEY_PRG, /*!< Present Program key */ + FSL_SHW_PF_KEY_IIM_PRG, /*!< Present IIM ^ Program key */ + FSL_SHW_PF_KEY_IIM_RND, /*!< Present Random key */ + FSL_SHW_PF_KEY_RND, /*!< Present IIM ^ Random key */ +} fsl_shw_pf_key_t; + +/*! + * The various security tamper events + */ +typedef enum fsl_shw_tamper_t { + FSL_SHW_TAMPER_NONE, /*!< No error detected */ + FSL_SHW_TAMPER_WTD, /*!< wire-mesh tampering det */ + FSL_SHW_TAMPER_ETBD, /*!< ext tampering det: input B */ + FSL_SHW_TAMPER_ETAD, /*!< ext tampering det: input A */ + FSL_SHW_TAMPER_EBD, /*!< external boot detected */ + FSL_SHW_TAMPER_SAD, /*!< security alarm detected */ + FSL_SHW_TAMPER_TTD, /*!< temperature tampering det */ + FSL_SHW_TAMPER_CTD, /*!< clock tampering det */ + FSL_SHW_TAMPER_VTD, /*!< voltage tampering det */ + FSL_SHW_TAMPER_MCO, /*!< monotonic counter overflow */ + FSL_SHW_TAMPER_TCO, /*!< time counter overflow */ +} fsl_shw_tamper_t; + +/* + * Structure passed during user ioctl() calls to manage data stored in secure + * partitions. + */ + +typedef struct scc_region_t { + uint32_t partition_base; /*!< Base address of partition */ + uint32_t offset; /*!< Byte offset into partition */ + uint32_t length; /*!< Number of bytes in request */ + uint8_t *black_data; /*!< Address of cipher text */ + uint64_t owner_id; /*!< user's secret */ + fsl_shw_cypher_mode_t cypher_mode; /*!< ECB or CBC */ + uint32_t IV[4]; /*!< IV for CBC mode */ +} scc_region_t; + +/****************************************************************************** + * Data Structures + *****************************************************************************/ + +/** + * Initialization Object + */ +typedef struct fsl_sho_ibo +{ +} fsl_sho_ibo_t; + + +/** + * Common Entry structure for work queues, results queues. + */ +typedef struct shw_queue_entry_t { + struct shw_queue_entry_t* next; /**< Next entry in queue. */ + struct fsl_shw_uco_t* user_ctx; /**< Associated user context. */ + uint32_t flags; /**< User context flags at time of request. */ + void (*callback)(struct fsl_shw_uco_t* uco); /**< Any callback request. */ + uint32_t user_ref; /**< User's reference for this request. */ + fsl_shw_return_t code; /**< FSL SHW result of this operation. */ + uint32_t detail1; /**< Any extra error info. */ + uint32_t detail2; /**< More any extra error info. */ + void* user_mode_req; /**< Pointer into user space. */ + uint32_t (*postprocess)(struct shw_queue_entry_t* q); /**< (internal) + function to call + when this operation + completes. + */ +} shw_queue_entry_t; + + +/** + * A queue. Fields must be initialized to NULL before use. + */ +typedef struct shw_queue_t +{ + struct shw_queue_entry_t* head; /**< First entry in queue. */ + struct shw_queue_entry_t* tail; /**< Last entry. */ +} shw_queue_t; + + +/** + * Secure Partition information + */ +typedef struct fsl_shw_spo_t +{ + uint32_t user_base; + void* kernel_base; + struct fsl_shw_spo_t* next; +} fsl_shw_spo_t; + + +/* REQ-FSLSHW-PINTFC-COA-UCO-001 */ +/** + * User Context Object + */ +typedef struct fsl_shw_uco_t +{ + int openfd; /**< user-mode file descriptor */ + uint32_t user_ref; /**< User's reference */ + void (*callback)(struct fsl_shw_uco_t* uco); /**< User's callback fn */ + uint32_t flags; /**< from fsl_shw_user_ctx_flags_t */ + unsigned pool_size; /**< maximum size of user result pool */ +#ifdef __KERNEL__ + shw_queue_t result_pool; /**< where non-blocking results go */ + os_process_handle_t process; /**< remember for signalling User mode */ + fsl_shw_spo_t* partition; /**< chain of secure partitions owned by + the user */ +#endif + struct fsl_shw_uco_t* next; /**< To allow user-mode chaining of contexts, + for signalling and in kernel, to link user + contexts. */ + fsl_shw_pf_key_t wrap_key; /*!< What key for ciphering T */ +} fsl_shw_uco_t; + + +/* REQ-FSLSHW-PINTFC-API-GEN-006 ?? */ +/** + * Result object + */ +typedef struct fsl_shw_result_t +{ + uint32_t user_ref; /**< User's reference at time of request. */ + fsl_shw_return_t code; /**< Return code from request. */ + uint32_t detail1; /**< Extra error info. Unused in SHW driver. */ + uint32_t detail2; /**< Extra error info. Unused in SHW driver. */ + void* user_req; /**< Pointer to original user request. */ +} fsl_shw_result_t; + + +/** + * Keystore Object + */ +typedef struct fsl_shw_kso_t +{ +#ifdef __KERNEL__ + os_lock_t lock; /**< Pointer to lock that controls access to + the keystore. */ +#endif + void* user_data; /**< Pointer to user structure that handles + the internals of the keystore. */ + fsl_shw_return_t (*data_init) (fsl_shw_uco_t* user_ctx, + void** user_data); + void (*data_cleanup) (fsl_shw_uco_t* user_ctx, + void** user_data); + fsl_shw_return_t (*slot_verify_access)(void* user_data, uint64_t owner_id, + uint32_t slot); + fsl_shw_return_t (*slot_alloc) (void* user_data, uint32_t size_bytes, + uint64_t owner_id, uint32_t* slot); + fsl_shw_return_t (*slot_dealloc) (void* user_data, + uint64_t owner_id, uint32_t slot); + void* (*slot_get_address) (void* user_data, uint32_t slot); + uint32_t (*slot_get_base) (void* user_data, uint32_t slot); + uint32_t (*slot_get_offset) (void* user_data, uint32_t slot); + uint32_t (*slot_get_slot_size) (void* user_data, uint32_t slot); +} fsl_shw_kso_t; + + +/* REQ-FSLSHW-PINTFC-COA-SKO-001 */ +/** + * Secret Key Context Object + */ +typedef struct fsl_shw_sko_t +{ + uint32_t flags; /**< Flags from #fsl_shw_sym_ctx_flags_t. */ + fsl_shw_key_alg_t algorithm; /**< Algorithm for this key. */ + key_userid_t userid; /**< User's identifying value for Black key. */ + uint32_t handle; /**< Reference in SCC driver for Red key. */ + uint16_t key_length; /**< Length of stored key, in bytes. */ + uint8_t key[64]; /**< Bytes of stored key. */ + struct fsl_shw_kso_t* keystore; /**< If present, key is in keystore */ + fsl_shw_pf_key_t pf_key; /*!< What key to select for use when this key + is doing ciphering. If FSL_SHW_PF_KEY_PRG + or FSL_SHW_PF_KEY_PRG_IIM is the value, then + a 'present' or 'established' key will be + programed into the PK. */ +} fsl_shw_sko_t; + + +/* REQ-FSLSHW-PINTFC-COA-CO-001 */ +/** + * Platform Capability Object + * + * Pointer to this structure is returned by fsl_shw_get_capabilities() and + * queried with the various fsl_shw_pco_() functions. + */ +typedef struct fsl_shw_pco_t +{ + int api_major; /**< Major version number for API. */ + int api_minor; /**< Minor version number for API. */ + int driver_major; /**< Major version of some driver. */ + int driver_minor; /**< Minor version of some driver. */ + unsigned sym_algorithm_count; /**< Number of sym_algorithms. */ + fsl_shw_key_alg_t* sym_algorithms; /**< Pointer to array. */ + unsigned sym_mode_count; /**< Number of sym_modes. */ + fsl_shw_sym_mode_t* sym_modes; /**< Pointer to array. */ + unsigned hash_algorithm_count; /**< Number of hash_algorithms. */ + fsl_shw_hash_alg_t* hash_algorithms; /**< Pointer to array */ + uint8_t sym_support[5][4]; /**< indexed by key alg then mode */ + + int scc_driver_major; + int scc_driver_minor; + int scm_version; /**< Version from SCM Configuration register */ + int smn_version; /**< Version from SMN Status register */ + int block_size_bytes; /**< Number of bytes per block of RAM; also + block size of the crypto algorithm. */ + union { + struct scc_info { + int black_ram_size_blocks; /**< Number of blocks of Black RAM */ + int red_ram_size_blocks; /**< Number of blocks of Red RAM */ + } scc_info; + struct scc2_info { + int partition_size_bytes; /**< Number of bytes in each partition */ + int partition_count; /**< Number of partitions on this platform */ + } scc2_info; + } u; +} fsl_shw_pco_t; + + +/* REQ-FSLSHW-PINTFC-COA-HCO-001 */ +/** + * Hash Context Object + */ +typedef struct fsl_shw_hco_t /* fsl_shw_hash_context_object */ +{ + fsl_shw_hash_alg_t algorithm; /**< Algorithm for this context. */ + uint32_t flags; /**< Flags from + #fsl_shw_hash_ctx_flags_t. */ + uint8_t digest_length; /**< hash result length in bytes */ + uint8_t context_length; /**< Context length in bytes */ + uint8_t context_register_length; /**< in bytes */ + uint32_t context[9]; /**< largest digest + msg size */ +} fsl_shw_hco_t; + + +/* REQ-FSLSHW-PINTFC-COA-HCO-001 */ +/** + * HMAC Context Object + */ +typedef struct fsl_shw_hmco_t /* fsl_shw_hmac_context_object */ +{ + fsl_shw_hash_alg_t algorithm; /**< Hash algorithm for the HMAC. */ + uint32_t flags; /**< Flags from + #fsl_shw_hmac_ctx_flags_t. */ + uint8_t digest_length; /**< in bytes */ + uint8_t context_length; /**< in bytes */ + uint8_t context_register_length; /**< in bytes */ + uint32_t ongoing_context[9]; /**< largest digest + msg + size */ + uint32_t inner_precompute[9]; /**< largest digest + msg + size */ + uint32_t outer_precompute[9]; /**< largest digest + msg + size */ +} fsl_shw_hmco_t; + + +/* REQ-FSLSHW-PINTFC-COA-SCCO-001 */ +/** + * Symmetric Crypto Context Object Context Object + */ +typedef struct fsl_shw_scco_t +{ + uint32_t flags; /**< Flags from #fsl_shw_sym_ctx_flags_t. */ + unsigned block_size_bytes; /**< Both block and ctx size */ + fsl_shw_sym_mode_t mode; /**< Symmetric mode for this context. */ + /* Could put modulus plus 16-octet context in union with arc4 + sbox+ptrs... */ + fsl_shw_ctr_mod_t modulus_exp; /**< Exponent value for CTR modulus */ + uint8_t context[8]; /**< Stored context. Large enough + for 3DES. */ +} fsl_shw_scco_t; + + +/** + * Authenticate-Cipher Context Object + + * An object for controlling the function of, and holding information about, + * data for the authenticate-cipher functions, #fsl_shw_gen_encrypt() and + * #fsl_shw_auth_decrypt(). + */ +typedef struct fsl_shw_acco_t +{ + uint32_t flags; /**< See #fsl_shw_auth_ctx_flags_t for + meanings */ + fsl_shw_acc_mode_t mode; /**< CCM only */ + uint8_t mac_length; /**< User's value for length */ + unsigned q_length; /**< NIST parameter - */ + fsl_shw_scco_t cipher_ctx_info; /**< For running + encrypt/decrypt. */ + union { + fsl_shw_scco_t CCM_ctx_info; /**< For running the CBC in + AES-CCM. */ + fsl_shw_hco_t hash_ctx_info; /**< For running the hash */ + } auth_info; /**< "auth" info struct */ + uint8_t unencrypted_mac[16]; /**< max block size... */ +} fsl_shw_acco_t; + + +/** + * Common header in request structures between User-mode API and SHW driver. + */ +struct shw_req_header { + uint32_t flags; /**< Flags - from user-mode context. */ + uint32_t user_ref; /**< Reference - from user-mode context. */ + fsl_shw_return_t code; /**< Result code for operation. */ +}; + +/** + * Used by user-mode API to retrieve completed non-blocking results in + * SHW_USER_REQ_GET_RESULTS ioctl(). + */ +struct results_req { + struct shw_req_header hdr; /**< Boilerplate. */ + unsigned requested; /**< number of results requested, */ + unsigned actual; /**< number of results obtained. */ + fsl_shw_result_t *results; /**< pointer to memory to hold results. */ +}; + + +/** + * Used by user-mode API to retrieve hardware capabilities in + * SHW_USER_REQ_GET_CAPABILITIES ioctl(). + */ +struct capabilities_req { + struct shw_req_header hdr; /**< Boilerplate. */ + unsigned size; /**< Size, in bytes, capabilities. */ + fsl_shw_pco_t* capabilities; /**< Place to copy out the info. */ +}; + + +/** + * Used by user-mode API to get a random number + */ +struct get_random_req { + struct shw_req_header hdr; /**< Boilerplate. */ + unsigned size; /**< Size, in bytes, of random. */ + uint8_t* random; /**< Place to copy out the random number. */ +}; + + +/** + * Used by API to add entropy to a random number generator + */ +struct add_entropy_req { + struct shw_req_header hdr; /**< Boilerplate. */ + unsigned size; /**< Size, in bytes, of entropy. */ + uint8_t* entropy; /**< Location of the entropy to be added. */ +}; + + +/****************************************************************************** + * External variables + *****************************************************************************/ +#ifdef __KERNEL__ +extern os_lock_t shw_queue_lock; + +extern fsl_shw_uco_t* user_list; +#endif + + +/****************************************************************************** + * Access Macros for Objects + *****************************************************************************/ +/** + * Get FSL SHW API version + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the API is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the API is to be stored. + */ +#define fsl_shw_pco_get_version(pcobject, pcmajor, pcminor) \ +do { \ + *(pcmajor) = (pcobject)->api_major; \ + *(pcminor) = (pcobject)->api_minor; \ +} while (0) + + +/** + * Get underlying driver version. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the driver is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the driver is to be stored. + */ +#define fsl_shw_pco_get_driver_version(pcobject, pcmajor, pcminor) \ +do { \ + *(pcmajor) = (pcobject)->driver_major; \ + *(pcminor) = (pcobject)->driver_minor; \ +} while (0) + + +/** + * Get list of symmetric algorithms supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcalgorithms A pointer to where to store the location of + * the list of algorithms. + * @param[out] pcacount A pointer to where to store the number of + * algorithms in the list at @a algorithms. + */ +#define fsl_shw_pco_get_sym_algorithms(pcobject, pcalgorithms, pcacount) \ +do { \ + *(pcalgorithms) = (pcobject)->sym_algorithms; \ + *(pcacount) = (pcobject)->sym_algorithm_count; \ +} while (0) + + +/** + * Get list of symmetric modes supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] gsmodes A pointer to where to store the location of + * the list of modes. + * @param[out] gsacount A pointer to where to store the number of + * algorithms in the list at @a modes. + */ +#define fsl_shw_pco_get_sym_modes(pcobject, gsmodes, gsacount) \ +do { \ + *(gsmodes) = (pcobject)->sym_modes; \ + *(gsacount) = (pcobject)->sym_mode_count; \ +} while (0) + + +/** + * Get list of hash algorithms supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] gsalgorithms A pointer which will be set to the list of + * algorithms. + * @param[out] gsacount The number of algorithms in the list at @a + * algorithms. + */ +#define fsl_shw_pco_get_hash_algorithms(pcobject, gsalgorithms, gsacount) \ +do { \ + *(gsalgorithms) = (pcobject)->hash_algorithms; \ + *(gsacount) = (pcobject)->hash_algorithm_count; \ +} while (0) + + +/** + * Determine whether the combination of a given symmetric algorithm and a given + * mode is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param pcalg A Symmetric Cipher algorithm. + * @param pcmode A Symmetric Cipher mode. + * + * @return 0 if combination is not supported, non-zero if supported. + */ +#if defined(FSL_HAVE_DRYICE) && defined(__KERNEL__) +#define fsl_shw_pco_check_sym_supported(pcobject, pcalg, pcmode) \ + ((pcobject)->sym_support[pcalg][pcmode]) +#else +#define fsl_shw_pco_check_sym_supported(pcobject, pcalg, pcmode) \ + 0 +#endif + +/** + * Determine whether a given Encryption-Authentication mode is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param pcmode The Authentication mode. + * + * @return 0 if mode is not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_auth_supported(pcobject, pcmode) \ + 0 + + +/** + * Determine whether Black Keys (key establishment / wrapping) is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * + * @return 0 if wrapping is not supported, non-zero if supported. + */ +#if defined(FSL_HAVE_DRYICE) && defined(__KERNEL__) +#define fsl_shw_pco_check_black_key_supported(pcobject) \ + 1 +#else +#define fsl_shw_pco_check_black_key_supported(pcobject) \ + 0 + +#endif + +/*! + * Determine whether Programmed Key features are available + * + * @param pcobject The Platform Capabilities Object to query. + * + * @return 1 if Programmed Key features are available, otherwise zero. + */ +#if defined(FSL_HAVE_DRYICE) && defined(__KERNEL__) +#define fsl_shw_pco_check_pk_supported(pcobject) \ + 1 +#else +#define fsl_shw_pco_check_pk_supported(pcobject) \ + 0 +#endif + +/*! + * Determine whether Software Key features are available + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 1 if Software key features are available, otherwise zero. + */ +#if defined(FSL_HAVE_DRYICE) && defined(__KERNEL__) +#define fsl_shw_pco_check_sw_keys_supported(pcobject) \ + 1 +#else +#define fsl_shw_pco_check_sw_keys_supported(pcobject) \ + 0 +#endif + +/*! + * Get FSL SHW SCC driver version + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the SCC driver is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the SCC driver is to be stored. + */ +#define fsl_shw_pco_get_scc_driver_version(pcobject, pcmajor, pcminor) \ +{ \ + *(pcmajor) = (pcobject)->scc_driver_major; \ + *(pcminor) = (pcobject)->scc_driver_minor; \ +} + + +/** + * Get SCM hardware version + * + * @param pcobject The Platform Capababilities Object to query. + * @return The SCM hardware version + */ +#define fsl_shw_pco_get_scm_version(pcobject) \ + ((pcobject)->scm_version) + + +/** + * Get SMN hardware version + * + * @param pcobject The Platform Capababilities Object to query. + * @return The SMN hardware version + */ +#define fsl_shw_pco_get_smn_version(pcobject) \ + ((pcobject)->smn_version) + + +/** + * Get the size of an SCM block, in bytes + * + * @param pcobject The Platform Capababilities Object to query. + * @return The size of an SCM block, in bytes. + */ +#define fsl_shw_pco_get_scm_block_size(pcobject) \ + ((pcobject)->block_size_bytes) + + +/** + * Get size of Black and Red RAM memory + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] black_size A pointer to where the size of the Black RAM, in + * blocks, is to be placed. + * @param[out] red_size A pointer to where the size of the Red RAM, in + * blocks, is to be placed. + */ +#define fsl_shw_pco_get_smn_size(pcobject, black_size, red_size) \ +{ \ + if ((pcobject)->scm_version == 1) { \ + *(black_size) = (pcobject)->u.scc_info.black_ram_size_blocks; \ + *(red_size) = (pcobject)->u.scc_info.red_ram_size_blocks; \ + } else { \ + *(black_size) = 0; \ + *(red_size) = 0; \ + } \ +} + + +/** + * Determine whether Secure Partitions are supported + * + * @param pcobject The Platform Capababilities Object to query. + * + * @return 0 if secure partitions are not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_spo_supported(pcobject) \ + ((pcobject)->scm_version == 2) + + +/** + * Get the size of a Secure Partitions + * + * @param pcobject The Platform Capababilities Object to query. + * + * @return Partition size, in bytes. 0 if Secure Partitions not supported. + */ +#define fsl_shw_pco_get_spo_size_bytes(pcobject) \ + (((pcobject)->scm_version == 2) ? \ + ((pcobject)->u.scc2_info.partition_size_bytes) : 0 ) \ + + +/** + * Get the number of Secure Partitions on this platform + * + * @param pcobject The Platform Capababilities Object to query. + * + * @return Number of partitions. 0 if Secure Paritions not supported. Note + * that this returns the total number of partitions, not all may be + * available to the user. + */ +#define fsl_shw_pco_get_spo_count(pcobject) \ + (((pcobject)->scm_version == 2) ? \ + ((pcobject)->u.scc2_info.partition_count) : 0 ) \ + + +/*! + * Initialize a Secret Key Object. + * + * This function must be called before performing any other operation with + * the Object. + * + * @param skobject The Secret Key Object to be initialized. + * @param skalgorithm DES, AES, etc. + * + */ +#define fsl_shw_sko_init(skobject,skalgorithm) \ +{ \ + fsl_shw_sko_t* skop = skobject; \ + \ + skop->algorithm = skalgorithm; \ + skop->flags = 0; \ + skop->keystore = NULL; \ + skop->pf_key = FSL_SHW_PF_KEY_PRG; \ +} + +/*! + * Initialize a Secret Key Object to use a Platform Key register. + * + * This function must be called before performing any other operation with + * the Object. + * + * @param skobject The Secret Key Object to be initialized. + * @param skalgorithm DES, AES, etc. + * @param skhwkey one of the fsl_shw_pf_key_t values. + * + */ +#define fsl_shw_sko_init_pf_key(skobject,skalgorithm,skhwkey) \ +{ \ + fsl_shw_sko_t* skop = skobject; \ + fsl_shw_key_alg_t alg = skalgorithm; \ + fsl_shw_pf_key_t key = skhwkey; \ + \ + skop->algorithm = alg; \ + if (alg == FSL_KEY_ALG_TDES) { \ + skop->key_length = 21; \ + } \ + skop->keystore = NULL; \ + skop->flags = FSL_SKO_KEY_SELECT_PF_KEY; \ + skop->pf_key = key; \ + if ((key == FSL_SHW_PF_KEY_IIM) || (key == FSL_SHW_PF_KEY_PRG) \ + || (key == FSL_SHW_PF_KEY_IIM_PRG) \ + || (key == FSL_SHW_PF_KEY_IIM_RND) \ + || (key == FSL_SHW_PF_KEY_RND)) { \ + skop->flags |= FSL_SKO_KEY_ESTABLISHED; \ + } \ +} + +/*! + * Store a cleartext key in the key object. + * + * This has the side effect of setting the #FSL_SKO_KEY_PRESENT flag and + * resetting the #FSL_SKO_KEY_ESTABLISHED flag. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skkey A pointer to the beginning of the key. + * @param skkeylen The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +#define fsl_shw_sko_set_key(skobject, skkey, skkeylen) \ +{ \ + (skobject)->key_length = skkeylen; \ + copy_bytes((skobject)->key, skkey, skkeylen); \ + (skobject)->flags |= FSL_SKO_KEY_PRESENT; \ + (skobject)->flags &= ~FSL_SKO_KEY_ESTABLISHED; \ +} + +/** + * Set a size for the key. + * + * This function would normally be used when the user wants the key to be + * generated from a random source. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skkeylen The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +#define fsl_shw_sko_set_key_length(skobject, skkeylen) \ + (skobject)->key_length = skkeylen; + + +/** + * Set the User ID associated with the key. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skuserid The User ID to identify authorized users of the key. + */ +#define fsl_shw_sko_set_user_id(skobject, skuserid) \ + (skobject)->userid = (skuserid) + +/** + * Establish a user Keystore to hold the key. + */ +#define fsl_shw_sko_set_keystore(skobject, user_keystore) \ + (skobject)->keystore = (user_keystore) + + + +/** + * Set the establish key handle into a key object. + * + * The @a userid field will be used to validate the access to the unwrapped + * key. This feature is not available for all platforms, nor for all + * algorithms and modes. + * + * The #FSL_SKO_KEY_ESTABLISHED will be set (and the #FSL_SKO_KEY_PRESENT flag + * will be cleared). + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skuserid The User ID to verify this user is an authorized user of + * the key. + * @param skhandle A @a handle from #fsl_shw_sko_get_established_info. + */ +#define fsl_shw_sko_set_established_info(skobject, skuserid, skhandle) \ +{ \ + (skobject)->userid = (skuserid); \ + (skobject)->handle = (skhandle); \ + (skobject)->flags |= FSL_SKO_KEY_ESTABLISHED; \ + (skobject)->flags &= \ + ~(FSL_SKO_KEY_PRESENT); \ +} + + +/** + * Retrieve the established-key handle from a key object. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skhandle The location to store the @a handle of the unwrapped + * key. + */ +#define fsl_shw_sko_get_established_info(skobject, skhandle) \ + *(skhandle) = (skobject)->handle + + +/** + * Extract the algorithm from a key object. + * + * @param skobject The Key Object to be queried. + * @param[out] skalgorithm A pointer to the location to store the algorithm. + */ +#define fsl_shw_sko_get_algorithm(skobject, skalgorithm) \ + *(skalgorithm) = (skobject)->algorithm + + +/** + * Retrieve the cleartext key from a key object that is stored in a user + * keystore. + * + * @param skobject The Key Object to be queried. + * @param[out] skkey A pointer to the location to store the key. NULL + * if the key is not stored in a user keystore. + */ +#define fsl_shw_sko_get_key(skobject, skkey) \ +{ \ + fsl_shw_kso_t* keystore = (skobject)->keystore; \ + if (keystore != NULL) { \ + *(skkey) = keystore->slot_get_address(keystore->user_data, \ + (skobject)->handle); \ + } else { \ + *(skkey) = NULL; \ + } \ +} + + +/*! + * Determine the size of a wrapped key based upon the cleartext key's length. + * + * This function can be used to calculate the number of octets that + * #fsl_shw_extract_key() will write into the location at @a covered_key. + * + * If zero is returned at @a length, this means that the key length in + * @a key_info is not supported. + * + * @param wkeyinfo Information about a key to be wrapped. + * @param wkeylen Location to store the length of a wrapped + * version of the key in @a key_info. + */ +#define fsl_shw_sko_calculate_wrapped_size(wkeyinfo, wkeylen) \ +{ \ + register fsl_shw_sko_t* kp = wkeyinfo; \ + register uint32_t kl = kp->key_length; \ + int key_blocks; \ + int base_size = 35; /* ICV + T' + ALG + LEN + FLAGS */ \ + \ + if (kp->flags & FSL_SKO_KEY_SELECT_PF_KEY) { \ + kl = 21; /* 168-bit 3DES key */ \ + } \ + key_blocks = (kl + 7) / 8; \ + /* Round length up to 3DES block size for CBC mode */ \ + *(wkeylen) = base_size + 8 * key_blocks; \ +} + +/*! + * Set some flags in the key object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skflags (One or more) ORed members of #fsl_shw_key_flags_t which + * are to be set. + */ +#define fsl_shw_sko_set_flags(skobject, skflags) \ + (skobject)->flags |= (skflags) + + +/** + * Clear some flags in the key object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skflags (One or more) ORed members of #fsl_shw_key_flags_t + * which are to be reset. + */ +#define fsl_shw_sko_clear_flags(skobject, skflags) \ + (skobject)->flags &= ~(skflags) + +/** + * Initialize a User Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the User Context Object to initial values, and set the size + * of the results pool. The mode will be set to a default of + * #FSL_UCO_BLOCKING_MODE. + * + * When using non-blocking operations, this sets the maximum number of + * operations which can be outstanding. This number includes the counts of + * operations waiting to start, operation(s) being performed, and results which + * have not been retrieved. + * + * Changes to this value are ignored once user registration has completed. It + * should be set to 1 if only blocking operations will ever be performed. + * + * @param ucontext The User Context object to operate on. + * @param usize The maximum number of operations which can be + * outstanding. + */ +#ifdef __KERNEL__ + +#define fsl_shw_uco_init(ucontext, usize) \ +do { \ + fsl_shw_uco_t* uco = ucontext; \ + \ + (uco)->pool_size = usize; \ + (uco)->flags = FSL_UCO_BLOCKING_MODE | FSL_UCO_CONTEXT_CHANGED; \ + (uco)->openfd = -1; \ + (uco)->callback = NULL; \ + (uco)->partition = NULL; \ + (uco)->wrap_key = FSL_SHW_PF_KEY_IIM; \ +} while (0) + +#else /* __KERNEL__ */ + +#define fsl_shw_uco_init(ucontext, usize) \ +do { \ + fsl_shw_uco_t* uco = ucontext; \ + \ + (uco)->pool_size = usize; \ + (uco)->flags = FSL_UCO_BLOCKING_MODE | FSL_UCO_CONTEXT_CHANGED; \ + (uco)->openfd = -1; \ + (uco)->callback = NULL; \ + (uco)->wrap_key = FSL_SHW_PF_KEY_IIM; \ +} while (0) + +#endif /* __KERNEL__ */ + + +/** + * Set the User Reference for the User Context. + * + * @param ucontext The User Context object to operate on. + * @param uref A value which will be passed back with a result. + */ +#define fsl_shw_uco_set_reference(ucontext, uref) \ +do { \ + fsl_shw_uco_t* uco = ucontext; \ + \ + (uco)->user_ref = uref; \ + (uco)->flags |= FSL_UCO_CONTEXT_CHANGED; \ +} while (0) + + +/** + * Set the User Reference for the User Context. + * + * @param ucontext The User Context object to operate on. + * @param ucallback The function the API will invoke when an operation + * completes. + */ +#define fsl_shw_uco_set_callback(ucontext, ucallback) \ +do { \ + fsl_shw_uco_t* uco = ucontext; \ + \ + (uco)->callback = ucallback; \ + (uco)->flags |= FSL_UCO_CONTEXT_CHANGED; \ +} while (0) + +/** + * Set flags in the User Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param ucontext The User Context object to operate on. + * @param uflags ORed values from #fsl_shw_user_ctx_flags_t. + */ +#define fsl_shw_uco_set_flags(ucontext, uflags) \ + (ucontext)->flags |= (uflags) | FSL_UCO_CONTEXT_CHANGED + + +/** + * Clear flags in the User Context. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param ucontext The User Context object to operate on. + * @param uflags ORed values from #fsl_shw_user_ctx_flags_t. + */ +#define fsl_shw_uco_clear_flags(ucontext, uflags) \ +do { \ + fsl_shw_uco_t* uco = ucontext; \ + \ + (uco)->flags &= ~(uflags); \ + (uco)->flags |= FSL_UCO_CONTEXT_CHANGED; \ +} while (0) + + +/** + * Retrieve the reference value from a Result Object. + * + * @param robject The result object to query. + * + * @return The reference associated with the request. + */ +#define fsl_shw_ro_get_reference(robject) \ + (robject)->user_ref + + +/** + * Retrieve the status code from a Result Object. + * + * @param robject The result object to query. + * + * @return The status of the request. + */ +#define fsl_shw_ro_get_status(robject) \ + (robject)->code + + + +/* REQ-FSL-SHW-PINTFC-API-BASIC-HASH-004 */ +/** + * Initialize a Hash Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the hash + * context object. + * + * @param hcobject The hash context to operate upon. + * @param hcalgorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +#define fsl_shw_hco_init(hcobject, hcalgorithm) \ +do { \ + (hcobject)->algorithm = hcalgorithm; \ + (hcobject)->flags = 0; \ + switch (hcalgorithm) { \ + case FSL_HASH_ALG_MD5: \ + (hcobject)->digest_length = 16; \ + (hcobject)->context_length = 16; \ + (hcobject)->context_register_length = 24; \ + break; \ + case FSL_HASH_ALG_SHA1: \ + (hcobject)->digest_length = 20; \ + (hcobject)->context_length = 20; \ + (hcobject)->context_register_length = 24; \ + break; \ + case FSL_HASH_ALG_SHA224: \ + (hcobject)->digest_length = 28; \ + (hcobject)->context_length = 32; \ + (hcobject)->context_register_length = 36; \ + break; \ + case FSL_HASH_ALG_SHA256: \ + (hcobject)->digest_length = 32; \ + (hcobject)->context_length = 32; \ + (hcobject)->context_register_length = 36; \ + break; \ + default: \ + /* error ! */ \ + (hcobject)->digest_length = 1; \ + (hcobject)->context_length = 1; \ + (hcobject)->context_register_length = 1; \ + break; \ + } \ +} while (0) + + +/* REQ-FSL-SHW-PINTFC-API-BASIC-HASH-001 */ +/** + * Get the current hash value and message length from the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hcobject The hash context to query. + * @param[out] hccontext Pointer to the location of @a length octets where to + * store a copy of the current value of the digest. + * @param hcclength Number of octets of hash value to copy. + * @param[out] hcmsglen Pointer to the location to store the number of octets + * already hashed. + */ +#define fsl_shw_hco_get_digest(hcobject, hccontext, hcclength, hcmsglen) \ +do { \ + memcpy(hccontext, (hcobject)->context, hcclength); \ + if ((hcobject)->algorithm == FSL_HASH_ALG_SHA224 \ + || (hcobject)->algorithm == FSL_HASH_ALG_SHA256) { \ + *(hcmsglen) = (hcobject)->context[8]; \ + } else { \ + *(hcmsglen) = (hcobject)->context[5]; \ + } \ +} while (0) + + +/* REQ-FSL-SHW-PINTFC-API-BASIC-HASH-002 */ +/** + * Get the hash algorithm from the hash context object. + * + * @param hcobject The hash context to query. + * @param[out] hcalgorithm Pointer to where the algorithm is to be stored. + */ +#define fsl_shw_hco_get_info(hcobject, hcalgorithm) \ +do { \ + *(hcalgorithm) = (hcobject)->algorithm; \ +} while (0) + + +/* REQ-FSL-SHW-PINTFC-API-BASIC-HASH-003 */ +/* REQ-FSL-SHW-PINTFC-API-BASIC-HASH-004 */ +/** + * Set the current hash value and message length in the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hcobject The hash context to operate upon. + * @param hccontext Pointer to buffer of appropriate length to copy into + * the hash context object. + * @param hcmsglen The number of octets of the message which have + * already been hashed. + * + */ +#define fsl_shw_hco_set_digest(hcobject, hccontext, hcmsglen) \ +do { \ + memcpy((hcobject)->context, hccontext, (hcobject)->context_length); \ + if (((hcobject)->algorithm == FSL_HASH_ALG_SHA224) \ + || ((hcobject)->algorithm == FSL_HASH_ALG_SHA256)) { \ + (hcobject)->context[8] = hcmsglen; \ + } else { \ + (hcobject)->context[5] = hcmsglen; \ + } \ +} while (0) + + +/** + * Set flags in a Hash Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The hash context to be operated on. + * @param hcflags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +#define fsl_shw_hco_set_flags(hcobject, hcflags) \ + (hcobject)->flags |= (hcflags) + + +/** + * Clear flags in a Hash Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The hash context to be operated on. + * @param hcflags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +#define fsl_shw_hco_clear_flags(hcobject, hcflags) \ + (hcobject)->flags &= ~(hcflags) + + +/** + * Initialize an HMAC Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the HMAC + * context object. + * + * @param hcobject The HMAC context to operate upon. + * @param hcalgorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +#define fsl_shw_hmco_init(hcobject, hcalgorithm) \ + fsl_shw_hco_init(hcobject, hcalgorithm) + + +/** + * Set flags in an HMAC Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The HMAC context to be operated on. + * @param hcflags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +#define fsl_shw_hmco_set_flags(hcobject, hcflags) \ + (hcobject)->flags |= (hcflags) + + +/** + * Clear flags in an HMAC Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The HMAC context to be operated on. + * @param hcflags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +#define fsl_shw_hmco_clear_flags(hcobject, hcflags) \ + (hcobject)->flags &= ~(hcflags) + + +/** + * Initialize a Symmetric Cipher Context Object. + * + * This function must be called before performing any other operation with the + * Object. This will set the @a mode and @a algorithm and initialize the + * Object. + * + * @param scobject The context object to operate on. + * @param scalg The cipher algorithm this context will be used with. + * @param scmode #FSL_SYM_MODE_CBC, #FSL_SYM_MODE_ECB, etc. + * + */ +#define fsl_shw_scco_init(scobject, scalg, scmode) \ +do { \ + register uint32_t bsb; /* block-size bytes */ \ + \ + switch (scalg) { \ + case FSL_KEY_ALG_AES: \ + bsb = 16; \ + break; \ + case FSL_KEY_ALG_DES: \ + /* fall through */ \ + case FSL_KEY_ALG_TDES: \ + bsb = 8; \ + break; \ + case FSL_KEY_ALG_ARC4: \ + bsb = 259; \ + break; \ + case FSL_KEY_ALG_HMAC: \ + bsb = 1; /* meaningless */ \ + break; \ + default: \ + bsb = 00; \ + } \ + (scobject)->block_size_bytes = bsb; \ + (scobject)->mode = scmode; \ + (scobject)->flags = 0; \ +} while (0) + + +/** + * Set the flags for a Symmetric Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param scobject The context object to operate on. + * @param scflags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +#define fsl_shw_scco_set_flags(scobject, scflags) \ + (scobject)->flags |= (scflags) + + +/** + * Clear some flags in a Symmetric Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param scobject The context object to operate on. + * @param scflags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +#define fsl_shw_scco_clear_flags(scobject, scflags) \ + (scobject)->flags &= ~(scflags) + + +/** + * Set the Context (IV) for a Symmetric Cipher Context. + * + * This is to set the context/IV for #FSL_SYM_MODE_CBC mode, or to set the + * context (the S-Box and pointers) for ARC4. The full context size will + * be copied. + * + * @param scobject The context object to operate on. + * @param sccontext A pointer to the buffer which contains the context. + * + */ +#define fsl_shw_scco_set_context(scobject, sccontext) \ + memcpy((scobject)->context, sccontext, \ + (scobject)->block_size_bytes) + + +/** + * Get the Context for a Symmetric Cipher Context. + * + * This is to retrieve the context/IV for #FSL_SYM_MODE_CBC mode, or to + * retrieve context (the S-Box and pointers) for ARC4. The full context + * will be copied. + * + * @param scobject The context object to operate on. + * @param[out] sccontext Pointer to location where context will be stored. + */ +#define fsl_shw_scco_get_context(scobject, sccontext) \ + memcpy(sccontext, (scobject)->context, (scobject)->block_size_bytes) + + +/** + * Set the Counter Value for a Symmetric Cipher Context. + * + * This will set the Counter Value for CTR mode. + * + * @param scobject The context object to operate on. + * @param sccounter The starting counter value. The number of octets. + * copied will be the block size for the algorithm. + * @param scmodulus The modulus for controlling the incrementing of the + * counter. + * + */ +#define fsl_shw_scco_set_counter_info(scobject, sccounter, scmodulus) \ +do { \ + if ((sccounter) != NULL) { \ + memcpy((scobject)->context, sccounter, \ + (scobject)->block_size_bytes); \ + } \ + (scobject)->modulus_exp = scmodulus; \ +} while (0) + + +/** + * Get the Counter Value for a Symmetric Cipher Context. + * + * This will retrieve the Counter Value is for CTR mode. + * + * @param scobject The context object to query. + * @param[out] sccounter Pointer to location to store the current counter + * value. The number of octets copied will be the + * block size for the algorithm. + * @param[out] scmodulus Pointer to location to store the modulus. + * + */ +#define fsl_shw_scco_get_counter_info(scobject, sccounter, scmodulus) \ +do { \ + if ((sccounter) != NULL) { \ + memcpy(sccounter, (scobject)->context, \ + (scobject)->block_size_bytes); \ + } \ + if ((scmodulus) != NULL) { \ + *(scmodulus) = (scobject)->modulus_exp; \ + } \ +} while (0) + + +/** + * Initialize a Authentication-Cipher Context. + * + * @param acobject Pointer to object to operate on. + * @param acmode The mode for this object (only #FSL_ACC_MODE_CCM + * supported). + */ +#define fsl_shw_acco_init(acobject, acmode) \ +do { \ + (acobject)->flags = 0; \ + (acobject)->mode = (acmode); \ +} while (0) + + +/** + * Set the flags for a Authentication-Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param acobject Pointer to object to operate on. + * @param acflags The flags to set (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +#define fsl_shw_acco_set_flags(acobject, acflags) \ + (acobject)->flags |= (acflags) + + +/** + * Clear some flags in a Authentication-Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param acobject Pointer to object to operate on. + * @param acflags The flags to reset (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +#define fsl_shw_acco_clear_flags(acobject, acflags) \ + (acobject)->flags &= ~(acflags) + + +/** + * Set up the Authentication-Cipher Object for CCM mode. + * + * This will set the @a auth_object for CCM mode and save the @a ctr, + * and @a mac_length. This function can be called instead of + * #fsl_shw_acco_init(). + * + * The paramater @a ctr is Counter Block 0, (counter value 0), which is for the + * MAC. + * + * @param acobject Pointer to object to operate on. + * @param acalg Cipher algorithm. Only AES is supported. + * @param accounter The initial counter value. + * @param acmaclen The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + */ +/* Do we need to stash the +1 value of the CTR somewhere? */ +#define fsl_shw_acco_set_ccm(acobject, acalg, accounter, acmaclen) \ + do { \ + (acobject)->flags = 0; \ + (acobject)->mode = FSL_ACC_MODE_CCM; \ + (acobject)->auth_info.CCM_ctx_info.block_size_bytes = 16; \ + (acobject)->cipher_ctx_info.block_size_bytes = 16; \ + (acobject)->mac_length = acmaclen; \ + fsl_shw_scco_set_counter_info(&(acobject)->cipher_ctx_info, accounter, \ + FSL_CTR_MOD_128); \ +} while (0) + + +/** + * Format the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will also set the IV and CTR values per Appendix A of NIST + * Special Publication 800-38C (May 2004). It will also perform the + * #fsl_shw_acco_set_ccm() operation with information derived from this set of + * parameters. + * + * Note this function assumes the algorithm is AES. It initializes the + * @a auth_object by setting the mode to #FSL_ACC_MODE_CCM and setting the + * flags to be #FSL_ACCO_NIST_CCM. + * + * @param acobject Pointer to object to operate on. + * @param act The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + * @param acad Number of octets of Associated Data (may be zero). + * @param acq A value for the size of the length of @a q field. Valid + * values are 1-8. + * @param acN The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param acQ The value of Q (size of the payload in octets). + * + */ +#define fsl_shw_ccm_nist_format_ctr_and_iv(acobject, act, acad, acq, acN, acQ)\ + do { \ + uint64_t Q = acQ; \ + uint8_t bflag = ((acad)?0x40:0) | ((((act)-2)/2)<<3) | ((acq)-1); \ + unsigned i; \ + uint8_t* qptr = (acobject)->auth_info.CCM_ctx_info.context + 15; \ + (acobject)->auth_info.CCM_ctx_info.block_size_bytes = 16; \ + (acobject)->cipher_ctx_info.block_size_bytes = 16; \ + (acobject)->mode = FSL_ACC_MODE_CCM; \ + (acobject)->flags = FSL_ACCO_NIST_CCM; \ + \ + /* Store away the MAC length (after calculating actual value */ \ + (acobject)->mac_length = (act); \ + /* Set Flag field in Block 0 */ \ + *((acobject)->auth_info.CCM_ctx_info.context) = bflag; \ + /* Set Nonce field in Block 0 */ \ + memcpy((acobject)->auth_info.CCM_ctx_info.context+1, acN, \ + 15-(acq)); \ + /* Set Flag field in ctr */ \ + *((acobject)->cipher_ctx_info.context) = (acq)-1; \ + /* Update the Q (payload length) field of Block0 */ \ + (acobject)->q_length = acq; \ + for (i = 0; i < (acq); i++) { \ + *qptr-- = Q & 0xFF; \ + Q >>= 8; \ + } \ + /* Set the Nonce field of the ctr */ \ + memcpy((acobject)->cipher_ctx_info.context+1, acN, 15-(acq)); \ + /* Clear the block counter field of the ctr */ \ + memset((acobject)->cipher_ctx_info.context+16-(acq), 0, (acq)+1); \ + } while (0) + + +/** + * Update the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will set the IV and CTR values per Appendix A of NIST Special + * Publication 800-38C (May 2004). + * + * Note this function assumes that #fsl_shw_ccm_nist_format_ctr_and_iv() has + * previously been called on the @a auth_object. + * + * @param acobject Pointer to object to operate on. + * @param acN The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param acQ The value of Q (size of the payload in octets). + * + */ +/* Do we need to stash the +1 value of the CTR somewhere? */ +#define fsl_shw_ccm_nist_update_ctr_and_iv(acobject, acN, acQ) \ + do { \ + uint64_t Q = acQ; \ + unsigned i; \ + uint8_t* qptr = (acobject)->auth_info.CCM_ctx_info.context + 15; \ + \ + /* Update the Nonce field field of Block0 */ \ + memcpy((acobject)->auth_info.CCM_ctx_info.context+1, acN, \ + 15 - (acobject)->q_length); \ + /* Update the Q (payload length) field of Block0 */ \ + for (i = 0; i < (acobject)->q_length; i++) { \ + *qptr-- = Q & 0xFF; \ + Q >>= 8; \ + } \ + /* Update the Nonce field of the ctr */ \ + memcpy((acobject)->cipher_ctx_info.context+1, acN, \ + 15 - (acobject)->q_length); \ + } while (0) + + +/****************************************************************************** + * Library functions + *****************************************************************************/ +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-GEN-003 */ +/** + * Determine the hardware security capabilities of this platform. + * + * Though a user context object is passed into this function, it will always + * act in a non-blocking manner. + * + * @param user_ctx The user context which will be used for the query. + * + * @return A pointer to the capabilities object. + */ +extern fsl_shw_pco_t* fsl_shw_get_capabilities(fsl_shw_uco_t* user_ctx); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-GEN-004 */ +/** + * Create an association between the the user and the provider of the API. + * + * @param user_ctx The user context which will be used for this association. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_register_user(fsl_shw_uco_t* user_ctx); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-GEN-005 */ +/** + * Destroy the association between the the user and the provider of the API. + * + * @param user_ctx The user context which is no longer needed. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_deregister_user(fsl_shw_uco_t* user_ctx); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-GEN-006 */ +/** + * Retrieve results from earlier operations. + * + * @param user_ctx The user's context. + * @param result_size The number of array elements of @a results. + * @param[in,out] results Pointer to first of the (array of) locations to + * store results. + * @param[out] result_count Pointer to store the number of results which + * were returned. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_get_results(fsl_shw_uco_t* user_ctx, + unsigned result_size, + fsl_shw_result_t results[], + unsigned* result_count); + +/** + * Place a key into a protected location for use only by cryptographic + * algorithms. + * + * This only needs to be used to a) unwrap a key, or b) set up a key which + * could be wrapped with a later call to #fsl_shw_extract_key(). Normal + * cleartext keys can simply be placed into #fsl_shw_sko_t key objects with + * #fsl_shw_sko_set_key() and used directly. + * + * The maximum key size supported for wrapped/unwrapped keys is 32 octets. + * (This is the maximum reasonable key length on Sahara - 32 octets for an HMAC + * key based on SHA-256.) The key size is determined by the @a key_info. The + * expected length of @a key can be determined by + * #fsl_shw_sko_calculate_wrapped_size() + * + * The protected key will not be available for use until this operation + * successfully completes. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be established. In the create case, the key + * length must be set. + * @param establish_type How @a key will be interpreted to establish a + * key for use. + * @param key If @a establish_type is #FSL_KEY_WRAP_UNWRAP, + * this is the location of a wrapped key. If + * @a establish_type is #FSL_KEY_WRAP_CREATE, this + * parameter can be @a NULL. If @a establish_type + * is #FSL_KEY_WRAP_ACCEPT, this is the location + * of a plaintext key. + */ +extern fsl_shw_return_t fsl_shw_establish_key( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t* key); + + +/** + * Wrap a key and retrieve the wrapped value. + * + * A wrapped key is a key that has been cryptographically obscured. It is + * only able to be used with #fsl_shw_establish_key(). + * + * This function will also release the key (see #fsl_shw_release_key()) so + * that it must be re-established before reuse. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * @param[out] covered_key The location to store the wrapped key. + * (This size is based upon the maximum key size + * of 32 octets). + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + uint8_t* covered_key); + +/*! + * Read the key value from a key object. + * + * Only a key marked as a software key (#FSL_SKO_KEY_SW_KEY) can be read with + * this call. It has no effect on the status of the key store. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The referenced key. + * @param[out] key The location to store the key value. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * key); + +/** + * De-establish a key so that it can no longer be accessed. + * + * The key will need to be re-established before it can again be used. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_release_key( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info); + + +/* + * In userspace, partition assignments will be tracked using the user context. + * In kernel mode, partition assignments are based on address only. + */ + +/** + * Allocate a block of secure memory + * + * @param user_ctx User context + * @param size Memory size (octets). Note: currently only + * supports only single-partition sized blocks. + * @param UMID User Mode ID to use when registering the + * partition. + * @param permissions Permissions to initialize the partition with. + * Can be made by ORing flags from the + * #fsl_shw_permission_t. + * + * @return Address of the allocated memory. NULL if the + * call was not successful. + */ +extern void *fsl_shw_smalloc(fsl_shw_uco_t* user_ctx, + uint32_t size, + const uint8_t* UMID, + uint32_t permissions); + + +/** + * Free a block of secure memory that was allocated with #fsl_shw_smalloc + * + * @param user_ctx User context + * @param address Address of the block of secure memory to be + * released. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_sfree( + fsl_shw_uco_t* user_ctx, + void* address); + + +/** + * Check the status of a block of a secure memory that was allocated with + * #fsl_shw_smalloc + * + * @param user_ctx User context + * @param address Address of the block of secure memory to be + * released. + * @param status Status of the partition, of type + * #fsl_partition_status_t + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_sstatus(fsl_shw_uco_t* user_ctx, + void* address, + fsl_shw_partition_status_t* status); + + +/** + * Diminish the permissions of a block of secure memory. Note that permissions + * can only be revoked. + * + * @param user_ctx User context + * @param address Base address of the secure memory to work with + * @param permissions Permissions to initialize the partition with. + * Can be made by ORing flags from the + * #fsl_shw_permission_t. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_diminish_perms( + fsl_shw_uco_t* user_ctx, + void* address, + uint32_t permissions); + +extern fsl_shw_return_t do_scc_engage_partition( + fsl_shw_uco_t* user_ctx, + void* address, + const uint8_t* UMID, + uint32_t permissions); + +extern fsl_shw_return_t do_system_keystore_slot_alloc( + fsl_shw_uco_t* user_ctx, + uint32_t key_lenth, + uint64_t ownerid, + uint32_t *slot); + +extern fsl_shw_return_t do_system_keystore_slot_dealloc( + fsl_shw_uco_t* user_ctx, + uint64_t ownerid, + uint32_t slot); + +extern fsl_shw_return_t do_system_keystore_slot_load( + fsl_shw_uco_t* user_ctx, + uint64_t ownerid, + uint32_t slot, + const uint8_t *key, + uint32_t key_length); + +extern fsl_shw_return_t do_system_keystore_slot_encrypt( + fsl_shw_uco_t* user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + uint8_t* black_data); + +extern fsl_shw_return_t do_system_keystore_slot_decrypt( + fsl_shw_uco_t* user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t* black_data); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-COA-SKO */ +/* REQ-FSL-SHW-PINTFC-COA-SCCO */ +/* REQ-FSLSHW-PINTFC-API-BASIC-SYM-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +/** + * Encrypt a stream of data with a symmetric-key algorithm. + * + * In ARC4, and also in #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_CTR modes, the + * flags of the @a sym_ctx object will control part of the operation of this + * function. The #FSL_SYM_CTX_INIT flag means that there is no context info in + * the object. The #FSL_SYM_CTX_LOAD means to use information in the + * @a sym_ctx at the start of the operation, and the #FSL_SYM_CTX_SAVE flag + * means to update the object's context information after the operation has + * been performed. + * + * All of the data for an operation can be run through at once using the + * #FSL_SYM_CTX_INIT or #FSL_SYM_CTX_LOAD flags, as appropriate, and then using + * a @a length for the whole of the data. + * + * If a #FSL_SYM_CTX_SAVE flag were added, an additional call to the function + * would "pick up" where the previous call left off, allowing the user to + * perform the larger function in smaller steps. + * + * In #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_ECB modes, the @a length must always + * be a multiple of the block size for the algorithm being used. For proper + * operation in #FSL_SYM_MODE_CTR mode, the @a length must be a multiple of the + * block size until the last operation on the total octet stream. + * + * Some users of ARC4 may want to compute the context (S-Box and pointers) from + * the key before any data is available. This may be done by running this + * function with a @a length of zero, with the init & save flags flags on in + * the @a sym_ctx. Subsequent operations would then run as normal with the + * load and save flags. Note that they key object is still required. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info Key and algorithm being used for this operation. + * @param[in,out] sym_ctx Info on cipher mode, state of the cipher. + * @param length Length, in octets, of the pt (and ct). + * @param pt pointer to plaintext to be encrypted. + * @param[out] ct pointer to where to store the resulting ciphertext. + * + * @return A return code of type #fsl_shw_return_t. + * + */ +extern fsl_shw_return_t fsl_shw_symmetric_encrypt( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + fsl_shw_scco_t* sym_ctx, + uint32_t length, + const uint8_t* pt, + uint8_t* ct); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-COA-SKO */ +/* REQ-FSL-SHW-PINTFC-COA-SCCO */ +/* PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +/** + * Decrypt a stream of data with a symmetric-key algorithm. + * + * In ARC4, and also in #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_CTR modes, the + * flags of the @a sym_ctx object will control part of the operation of this + * function. The #FSL_SYM_CTX_INIT flag means that there is no context info in + * the object. The #FSL_SYM_CTX_LOAD means to use information in the + * @a sym_ctx at the start of the operation, and the #FSL_SYM_CTX_SAVE flag + * means to update the object's context information after the operation has + * been performed. + * + * All of the data for an operation can be run through at once using the + * #FSL_SYM_CTX_INIT or #FSL_SYM_CTX_LOAD flags, as appropriate, and then using + * a @a length for the whole of the data. + * + * If a #FSL_SYM_CTX_SAVE flag were added, an additional call to the function + * would "pick up" where the previous call left off, allowing the user to + * perform the larger function in smaller steps. + * + * In #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_ECB modes, the @a length must always + * be a multiple of the block size for the algorithm being used. For proper + * operation in #FSL_SYM_MODE_CTR mode, the @a length must be a multiple of the + * block size until the last operation on the total octet stream. + * + * Some users of ARC4 may want to compute the context (S-Box and pointers) from + * the key before any data is available. This may be done by running this + * function with a @a length of zero, with the #FSL_SYM_CTX_INIT & + * #FSL_SYM_CTX_SAVE flags on in the @a sym_ctx. Subsequent operations would + * then run as normal with the load & save flags. Note that they key object is + * still required. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The key and algorithm being used in this operation. + * @param[in,out] sym_ctx Info on cipher mode, state of the cipher. + * @param length Length, in octets, of the ct (and pt). + * @param ct pointer to ciphertext to be decrypted. + * @param[out] pt pointer to where to store the resulting plaintext. + * + * @return A return code of type #fsl_shw_return_t + * + */ +extern fsl_shw_return_t fsl_shw_symmetric_decrypt( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + fsl_shw_scco_t* sym_ctx, + uint32_t length, + const uint8_t* ct, + uint8_t* pt); + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-COA-HCO */ +/* REQ-FSLSHW-PINTFC-API-BASIC-HASH-005 */ +/** + * Hash a stream of data with a cryptographic hash algorithm. + * + * The flags in the @a hash_ctx control the operation of this function. + * + * Hashing functions work on 64 octets of message at a time. Therefore, when + * any partial hashing of a long message is performed, the message @a length of + * each segment must be a multiple of 64. When ready to + * #FSL_HASH_FLAGS_FINALIZE the hash, the @a length may be any value. + * + * With the #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_FINALIZE flags on, a + * one-shot complete hash, including padding, will be performed. The @a length + * may be any value. + * + * The first octets of a data stream can be hashed by setting the + * #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_SAVE flags. The @a length must be + * a multiple of 64. + * + * The flag #FSL_HASH_FLAGS_LOAD is used to load a context previously saved by + * #FSL_HASH_FLAGS_SAVE. The two in combination will allow a (multiple-of-64 + * octets) 'middle sequence' of the data stream to be hashed with the + * beginning. The @a length must again be a multiple of 64. + * + * Since the flag #FSL_HASH_FLAGS_LOAD is used to load a context previously + * saved by #FSL_HASH_FLAGS_SAVE, the #FSL_HASH_FLAGS_LOAD and + * #FSL_HASH_FLAGS_FINALIZE flags, used together, can be used to finish the + * stream. The @a length may be any value. + * + * If the user program wants to do the padding for the hash, it can leave off + * the #FSL_HASH_FLAGS_FINALIZE flag. The @a length must then be a multiple of + * 64 octets. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] hash_ctx Hashing algorithm and state of the cipher. + * @param msg Pointer to the data to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result If not null, pointer to where to store the hash + * digest. + * @param result_len Number of octets to store in @a result. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hash( + fsl_shw_uco_t* user_ctx, + fsl_shw_hco_t* hash_ctx, + const uint8_t* msg, + uint32_t length, + uint8_t* result, + uint32_t result_len); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-API-BASIC-HMAC-001 */ +/** + * Precompute the Key hashes for an HMAC operation. + * + * This function may be used to calculate the inner and outer precomputes, + * which are the hash contexts resulting from hashing the XORed key for the + * 'inner hash' and the 'outer hash', respectively, of the HMAC function. + * + * After execution of this function, the @a hmac_ctx will contain the + * precomputed inner and outer contexts, so that they may be used by + * #fsl_shw_hmac(). The flags of @a hmac_ctx will be updated with + * #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT to mark their presence. In addtion, the + * #FSL_HMAC_FLAGS_INIT flag will be set. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The key being used in this operation. Key must be + * 1 to 64 octets long. + * @param[in,out] hmac_ctx The context which controls, by its flags and + * algorithm, the operation of this function. + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hmac_precompute( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + fsl_shw_hmco_t* hmac_ctx); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-BASIC-HMAC-002 */ +/** + * Continue, finalize, or one-shot an HMAC operation. + * + * There are a number of ways to use this function. The flags in the + * @a hmac_ctx object will determine what operations occur. + * + * If #FSL_HMAC_FLAGS_INIT is set, then the hash will be started either from + * the @a key_info, or from the precomputed inner hash value in the + * @a hmac_ctx, depending on the value of #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT. + * + * If, instead, #FSL_HMAC_FLAGS_LOAD is set, then the hash will be continued + * from the ongoing inner hash computation in the @a hmac_ctx. + * + * If #FSL_HMAC_FLAGS_FINALIZE are set, then the @a msg will be padded, hashed, + * the outer hash will be performed, and the @a result will be generated. + * + * If the #FSL_HMAC_FLAGS_SAVE flag is set, then the (ongoing or final) digest + * value will be stored in the ongoing inner hash computation field of the @a + * hmac_ctx. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info If #FSL_HMAC_FLAGS_INIT is set in the @a hmac_ctx, + * this is the key being used in this operation, and the + * IPAD. If #FSL_HMAC_FLAGS_INIT is set in the @a + * hmac_ctx and @a key_info is NULL, then + * #fsl_shw_hmac_precompute() has been used to populate + * the @a inner_precompute and @a outer_precompute + * contexts. If #FSL_HMAC_FLAGS_INIT is not set, this + * parameter is ignored. + + * @param[in,out] hmac_ctx The context which controls, by its flags and + * algorithm, the operation of this function. + * @param msg Pointer to the message to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result Pointer, of @a result_len octets, to where to + * store the HMAC. + * @param result_len Length of @a result buffer. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hmac( + fsl_shw_uco_t* user_ctx, + fsl_shw_sko_t* key_info, + fsl_shw_hmco_t* hmac_ctx, + const uint8_t* msg, + uint32_t length, + uint8_t* result, + uint32_t result_len); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-BASIC-RNG-002 */ +/** + * Get random data. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length The number of octets of @a data being requested. + * @param[out] data A pointer to a location of @a length octets to where + * random data will be returned. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_get_random( + fsl_shw_uco_t* user_ctx, + uint32_t length, + uint8_t* data); + + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSLSHW-PINTFC-API-BASIC-RNG-003 */ +/** + * Add entropy to random number generator. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length Number of bytes at @a data. + * @param data Entropy to add to random number generator. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_add_entropy( + fsl_shw_uco_t* user_ctx, + uint32_t length, + uint8_t* data); + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-COA-SKO */ +/** + * Perform Generation-Encryption by doing a Cipher and a Hash. + * + * Generate the authentication value @a auth_value as well as encrypt the @a + * payload into @a ct (the ciphertext). This is a one-shot function, so all of + * the @a auth_data and the total message @a payload must passed in one call. + * This also means that the flags in the @a auth_ctx must be #FSL_ACCO_CTX_INIT + * and #FSL_ACCO_CTX_FINALIZE. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param auth_ctx Controlling object for Authenticate-decrypt. + * @param cipher_key_info The key being used for the cipher part of this + * operation. In CCM mode, this key is used for + * both parts. + * @param auth_key_info The key being used for the authentication part + * of this operation. In CCM mode, this key is + * ignored and may be NULL. + * @param auth_data_length Length, in octets, of @a auth_data. + * @param auth_data Data to be authenticated but not encrypted. + * @param payload_length Length, in octets, of @a payload. + * @param payload Pointer to the plaintext to be encrypted. + * @param[out] ct Pointer to the where the encrypted @a payload + * will be stored. Must be @a payload_length + * octets long. + * @param[out] auth_value Pointer to where the generated authentication + * field will be stored. Must be as many octets as + * indicated by MAC length in the @a function_ctx. + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_gen_encrypt( + fsl_shw_uco_t* user_ctx, + fsl_shw_acco_t* auth_ctx, + fsl_shw_sko_t* cipher_key_info, + fsl_shw_sko_t* auth_key_info, + uint32_t auth_data_length, + const uint8_t* auth_data, + uint32_t payload_length, + const uint8_t* payload, + uint8_t* ct, + uint8_t* auth_value); + +/* REQ-FSL-SHW-PINTFC-COA-UCO */ +/* REQ-FSL-SHW-PINTFC-COA-SKO */ +/** + * Perform Authentication-Decryption in Cipher + Hash. + * + * This function will perform a one-shot decryption of a data stream as well as + * authenticate the authentication value. This is a one-shot function, so all + * of the @a auth_data and the total message @a payload must passed in one + * call. This also means that the flags in the @a auth_ctx must be + * #FSL_ACCO_CTX_INIT and #FSL_ACCO_CTX_FINALIZE. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param auth_ctx Controlling object for Authenticate-decrypt. + * @param cipher_key_info The key being used for the cipher part of this + * operation. In CCM mode, this key is used for + * both parts. + * @param auth_key_info The key being used for the authentication part + * of this operation. In CCM mode, this key is + * ignored and may be NULL. + * @param auth_data_length Length, in octets, of @a auth_data. + * @param auth_data Data to be authenticated but not decrypted. + * @param payload_length Length, in octets, of @a ct and @a pt. + * @param ct Pointer to the encrypted input stream. + * @param auth_value The (encrypted) authentication value which will + * be authenticated. This is the same data as the + * (output) @a auth_value argument to + * #fsl_shw_gen_encrypt(). + * @param[out] payload Pointer to where the plaintext resulting from + * the decryption will be stored. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_auth_decrypt( + fsl_shw_uco_t* user_ctx, + fsl_shw_acco_t* auth_ctx, + fsl_shw_sko_t* cipher_key_info, + fsl_shw_sko_t* auth_key_info, + uint32_t auth_data_length, + const uint8_t* auth_data, + uint32_t payload_length, + const uint8_t* ct, + const uint8_t* auth_value, + uint8_t* payload); + +/*! + * Cause the hardware to create a new random key for secure memory use. + * + * Have the hardware use the secure hardware random number generator to load a + * new secret key into the hardware random key register. It will not be made + * active without a call to #fsl_shw_select_pf_key(). + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * + * @return A return code of type #fsl_shw_return_t. + */ +#ifdef __KERNEL__ + +extern fsl_shw_return_t fsl_shw_gen_random_pf_key(fsl_shw_uco_t * user_ctx); + +#else + +#define fsl_shw_gen_random_pf_key(user_ctx) FSL_RETURN_NO_RESOURCE_S + +#endif /* __KERNEL__ */ + +/*! + * Retrieve the detected tamper event. + * + * Note that if more than one event was detected, this routine will only ever + * return one of them. + * + * @param[in] user_ctx A user context from #fsl_shw_register_user(). + * @param[out] tamperp Location to store the tamper information. + * @param[out] timestampp Locate to store timestamp from hardwhare when + * an event was detected. + * + * + * @return A return code of type #fsl_shw_return_t (for instance, if the platform + * is not in a fail state. + */ +#ifdef __KERNEL__ + +extern fsl_shw_return_t fsl_shw_read_tamper_event(fsl_shw_uco_t * user_ctx, + fsl_shw_tamper_t * tamperp, + uint64_t * timestampp); +#else + +#define fsl_shw_read_tamper_event(user_ctx,tamperp,timestampp) \ + FSL_RETURN_NO_RESOURCE_S + +#endif /* __KERNEL__ */ + +/***************************************************************************** + * + * Functions internal to SHW driver. + * +*****************************************************************************/ + +fsl_shw_return_t +do_scc_encrypt_region(fsl_shw_uco_t* user_ctx, + void* partition_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t* black_data, + uint32_t* IV, fsl_shw_cypher_mode_t cypher_mode); + +fsl_shw_return_t +do_scc_decrypt_region(fsl_shw_uco_t* user_ctx, + void* partition_base, uint32_t offset_bytes, + uint32_t byte_count, const uint8_t* black_data, + uint32_t* IV, fsl_shw_cypher_mode_t cypher_mode); + + +/***************************************************************************** + * + * Functions available to other SHW-family drivers. + * +*****************************************************************************/ + +#ifdef __KERNEL__ +/** + * Add an entry to a work/result queue. + * + * @param pool Pointer to list structure + * @param entry Entry to place at tail of list + * + * @return void + */ +inline static void SHW_ADD_QUEUE_ENTRY(shw_queue_t* pool, + shw_queue_entry_t* entry) +{ + os_lock_context_t lock_context; + + entry->next = NULL; + os_lock_save_context(shw_queue_lock, lock_context); + + if (pool->tail != NULL) { + pool->tail->next = entry; + } else { + /* Queue was empty, so this is also the head. */ + pool->head = entry; + } + pool->tail = entry; + + os_unlock_restore_context(shw_queue_lock, lock_context); + + return; + + +} + + +/** + * Get first entry on the queue and remove it from the queue. + * + * @return Pointer to first entry, or NULL if none. + */ +inline static shw_queue_entry_t* SHW_POP_FIRST_ENTRY(shw_queue_t* queue) +{ + shw_queue_entry_t* entry; + os_lock_context_t lock_context; + + os_lock_save_context(shw_queue_lock, lock_context); + + entry = queue->head; + + if (entry != NULL) { + queue->head = entry->next; + entry->next = NULL; + /* If this was only entry, clear the tail. */ + if (queue->tail == entry) { + queue->tail = NULL; + } + } + + os_unlock_restore_context(shw_queue_lock, lock_context); + + return entry; +} + + + +/** + * Remove an entry from the list. + * + * If the entry not on the queue, no error will be returned. + * + * @param pool Pointer to work queue + * @param entry Entry to remove from queue + * + * @return void + * + */ +inline static void SHW_QUEUE_REMOVE_ENTRY(shw_queue_t* pool, + shw_queue_entry_t* entry) +{ + os_lock_context_t lock_context; + + os_lock_save_context(shw_queue_lock, lock_context); + + /* Check for quick case.*/ + if (pool->head == entry) { + pool->head = entry->next; + entry->next = NULL; + if (pool->tail == entry) { + pool->tail = NULL; + } + } else { + register shw_queue_entry_t* prev = pool->head; + + /* We know it is not the head, so start looking at entry after head. */ + while (prev->next) { + if (prev->next != entry) { + prev = prev->next; /* Try another */ + continue; + } else { + /* Unlink from chain. */ + prev->next = entry->next; + entry->next = NULL; + /* If last in chain, update tail. */ + if (pool->tail == entry) { + pool->tail = prev; + } + break; + } + } /* while */ + } + + os_unlock_restore_context(shw_queue_lock, lock_context); + + return; +} +#endif /* __KERNEL__ */ + + +/***************************************************************************** + * + * Functions available to User-Mode API functions + * + ****************************************************************************/ +#ifndef __KERNEL__ + + + /** + * Sanity checks the user context object fields to ensure that they make some + * sense before passing the uco as a parameter. + * + * @brief Verify the user context object + * + * @param uco user context object + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t validate_uco(fsl_shw_uco_t *uco); + + +/** + * Initialize a request block to go to the driver. + * + * @param hdr Pointer to request block header + * @param user_ctx Pointer to user's context + * + * @return void + */ +inline static void init_req(struct shw_req_header* hdr, + fsl_shw_uco_t* user_ctx) +{ + hdr->flags = user_ctx->flags; + hdr->user_ref = user_ctx->user_ref; + hdr->code = FSL_RETURN_ERROR_S; + + return; +} + + +/** + * Send a request block off to the driver. + * + * If this is a non-blocking request, then req will be freed. + * + * @param type The type of request being sent + * @param req Pointer to the request block + * @param ctx Pointer to user's context + * + * @return code from driver if ioctl() succeeded, otherwise + * FSL_RETURN_INTERNAL_ERROR_S. + */ +inline static fsl_shw_return_t send_req(shw_user_request_t type, + struct shw_req_header* req, + fsl_shw_uco_t* ctx) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + unsigned blocking = ctx->flags & FSL_UCO_BLOCKING_MODE; + int code; + + code = ioctl(ctx->openfd, SHW_IOCTL_REQUEST + type, req); + + if (code == 0) { + if (blocking) { + ret = req->code; + } else { + ret = FSL_RETURN_OK_S; + } + } else { +#ifdef FSL_DEBUG + fprintf(stderr, "SHW: send_req failed with (%d), %s\n", errno, + strerror(errno)); +#endif + } + + if (blocking) { + free(req); + } + + return ret; +} + + +#endif /* no __KERNEL__ */ + +#if defined(FSL_HAVE_DRYICE) +/* Some kernel functions */ +void fsl_shw_permute1_bytes(const uint8_t * key, uint8_t * permuted_key, + int key_count); +void fsl_shw_permute1_bytes_to_words(const uint8_t * key, + uint32_t * permuted_key, int key_count); + +#define PFKEY_TO_STR(key_in) \ +({ \ + di_key_t key = key_in; \ + \ + ((key == DI_KEY_FK) ? "IIM" : \ + ((key == DI_KEY_PK) ? "PRG" : \ + ((key == DI_KEY_RK) ? "RND" : \ + ((key == DI_KEY_FPK) ? "IIM_PRG" : \ + ((key == DI_KEY_FRK) ? "IIM_RND" : "unk"))))); \ +}) + +#ifdef DIAG_SECURITY_FUNC +extern const char *di_error_string(int code); +#endif + +#endif /* HAVE DRYICE */ + +#endif /* SHW_DRIVER_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/rng_driver.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/rng_driver.h @@ -0,0 +1,134 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +#ifndef RNG_DRIVER_H +#define RNG_DRIVER_H + +#include "shw_driver.h" + +/* This is a Linux flag meaning 'compiling kernel code'... */ +#ifndef __KERNEL__ +#include +#include +#include +#else +#include "../../sahara2/include/portable_os.h" +#endif + +#include "../../sahara2/include/fsl_platform.h" + +/*! @file rng_driver.h + * + * @brief Header file to use the RNG driver. + * + * @ingroup RNG + */ + +#if defined(FSL_HAVE_RNGA) + +#include "rng_rnga.h" + +#elif defined(FSL_HAVE_RNGB) || defined(FSL_HAVE_RNGC) + +#include "rng_rngc.h" + +#else /* neither RNGA, RNGB, nor RNGC */ + +#error NO_RNG_TYPE_IDENTIFIED + +#endif + +/***************************************************************************** + * Enumerations + *****************************************************************************/ + +/*! Values from Version ID register */ +enum rng_type { + /*! Type RNGA. */ + RNG_TYPE_RNGA = 0, + /*! Type RNGB. */ + RNG_TYPE_RNGB = 1, + /*! Type RNGC */ + RNG_TYPE_RNGC = 2 +}; + +/*! + * Return values (error codes) for kernel register interface functions + */ +typedef enum rng_return { + RNG_RET_OK = 0, /*!< Function succeeded */ + RNG_RET_FAIL /*!< Non-specific failure */ +} rng_return_t; + +/***************************************************************************** + * Data Structures + *****************************************************************************/ +/*! + * An entry in the RNG Work Queue. Based upon standard SHW queue entry. + * + * This entry also gets saved (for non-blocking requests) in the user's result + * pool. When the user picks up the request, the final processing (copy from + * data_local to data_user) will get made if status was good. + */ +typedef struct rng_work_entry { + struct shw_queue_entry_t hdr; /*!< Standards SHW queue info. */ + uint32_t length; /*!< Number of bytes still needed to satisfy request. */ + uint32_t *data_local; /*!< Where data from RNG FIFO gets placed. */ + uint8_t *data_user; /*!< Ultimate target of data. */ + unsigned completed; /*!< Non-zero if job is done. */ +} rng_work_entry_t; + +/***************************************************************************** + * Function Prototypes + *****************************************************************************/ + +#ifdef RNG_REGISTER_PEEK_POKE +/*! + * Read value from an RNG register. + * The offset will be checked for validity as well as whether it is + * accessible at the time of the call. + * + * This routine cannot be used to read the RNG's Output FIFO if the RNG is in + * High Assurance mode. + * + * @param[in] register_offset The (byte) offset within the RNG block + * of the register to be queried. See + * RNG(A, C) registers for meanings. + * @param[out] value Pointer to where value from the register + * should be placed. + * + * @return See #rng_return_t. + */ +/* REQ-FSLSHW-PINTFC-API-LLF-001 */ +extern rng_return_t rng_read_register(uint32_t register_offset, + uint32_t * value); + +/*! + * Write a new value into an RNG register. + * + * The offset will be checked for validity as well as whether it is + * accessible at the time of the call. + * + * @param[in] register_offset The (byte) offset within the RNG block + * of the register to be modified. See + * RNG(A, C) registers for meanings. + * @param[in] value The value to store into the register. + * + * @return See #rng_return_t. + */ +/* REQ-FSLSHW-PINTFC-API-LLF-002 */ +extern rng_return_t rng_write_register(uint32_t register_offset, + uint32_t value); +#endif /* RNG_REGISTER_PEEK_POKE */ + +#endif /* RNG_DRIVER_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/rng_internals.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/rng_internals.h @@ -0,0 +1,680 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef RNG_INTERNALS_H +#define RNG_INTERNALS_H + +/*! @file rng_internals.h + * + * This file contains definitions which are internal to the RNG driver. + * + * This header file should only ever be needed by rng_driver.c + * + * Compile-time flags minimally needed: + * + * @li Some sort of platform flag. (FSL_HAVE_RNGA or FSL_HAVE_RNGC) + * + * @ingroup RNG + */ + +#include "portable_os.h" +#include "shw_driver.h" +#include "rng_driver.h" + +/*! @defgroup rngcompileflags RNG Compile Flags + * + * These are flags which are used to configure the RNG driver at compilation + * time. + * + * Most of them default to good values for normal operation, but some + * (#INT_RNG and #RNG_BASE_ADDR) need to be provided. + * + * The terms 'defined' and 'undefined' refer to whether a @c \#define (or -D on + * a compile command) has defined a given preprocessor symbol. If a given + * symbol is defined, then @c \#ifdef \ will succeed. Some symbols + * described below default to not having a definition, i.e. they are undefined. + * + */ + +/*! @addtogroup rngcompileflags */ +/*! @{ */ + +/*! + * This is the maximum number of times the driver will loop waiting for the + * RNG hardware to say that it has generated random data. It prevents the + * driver from stalling forever should there be a hardware problem. + * + * Default value is 100. It should be revisited as CPU clocks speed up. + */ +#ifndef RNG_MAX_TRIES +#define RNG_MAX_TRIES 100 +#endif + +/* Temporarily define compile-time flags to make Doxygen happy and allow them + to get into the documentation. */ +#ifdef DOXYGEN_HACK + +/*! + * This symbol is the base address of the RNG in the CPU memory map. It may + * come from some included header file, or it may come from the compile command + * line. This symbol has no default, and the driver will not compile without + * it. + */ +#define RNG_BASE_ADDR +#undef RNG_BASE_ADDR + +/*! + * This symbol is the Interrupt Number of the RNG in the CPU. It may come + * from some included header file, or it may come from the compile command + * line. This symbol has no default, and the driver will not compile without + * it. + */ +#define INT_RNG +#undef INT_RNG + +/*! + * Defining this symbol will allow other kernel programs to call the + * #rng_read_register() and #rng_write_register() functions. If this symbol is + * not defined, those functions will not be present in the driver. + */ +#define RNG_REGISTER_PEEK_POKE +#undef RNG_REGISTER_PEEK_POKE + +/*! + * Turn on compilation of run-time operational, debug, and error messages. + * + * This flag is undefined by default. + */ +/* REQ-FSLSHW-DEBUG-001 */ + +/*! + * Turn on compilation of run-time logging of access to the RNG registers, + * except for the RNG's Output FIFO register. See #RNG_ENTROPY_DEBUG. + * + * This flag is undefined by default + */ +#define RNG_REGISTER_DEBUG +#undef RNG_REGISTER_DEBUG + +/*! + * Turn on compilation of run-time logging of reading of the RNG's Output FIFO + * register. This flag does nothing if #RNG_REGISTER_DEBUG is not defined. + * + * This flag is undefined by default + */ +#define RNG_ENTROPY_DEBUG +#undef RNG_ENTROPY_DEBUG + +/*! + * If this flag is defined, the driver will not attempt to put the RNG into + * High Assurance mode. + + * If it is undefined, the driver will attempt to put the RNG into High + * Assurance mode. If RNG fails to go into High Assurance mode, the driver + * will fail to initialize. + + * In either case, if the RNG is already in this mode, the driver will operate + * normally. + * + * This flag is undefined by default. + */ +#define RNG_NO_FORCE_HIGH_ASSURANCE +#undef RNG_NO_FORCE_HIGH_ASSURANCE + +/*! + * If this flag is defined, the driver will put the RNG into low power mode + * every opportunity. + * + * This flag is undefined by default. + */ +#define RNG_USE_LOW_POWER_MODE +#undef RNG_USE_LOW_POWER_MODE + +/*! @} */ +#endif /* end DOXYGEN_HACK */ + +/*! + * If this flag is defined, the driver will not attempt to put the RNG into + * High Assurance mode. + + * If it is undefined, the driver will attempt to put the RNG into High + * Assurance mode. If RNG fails to go into High Assurance mode, the driver + * will fail to initialize. + + * In either case, if the RNG is already in this mode, the driver will operate + * normally. + * + */ +#define RNG_NO_FORCE_HIGH_ASSURANCE + +/*! + * Read a 32-bit value from an RNG register. This macro depends upon + * #rng_base. The os_read32() macro operates on 32-bit quantities, as do + * all RNG register reads. + * + * @param offset Register byte offset within RNG. + * + * @return The value from the RNG's register. + */ +#ifndef RNG_REGISTER_DEBUG +#define RNG_READ_REGISTER(offset) os_read32(rng_base+(offset)) +#else +#define RNG_READ_REGISTER(offset) dbg_rng_read_register(offset) +#endif + +/*! + * Write a 32-bit value to an RNG register. This macro depends upon + * #rng_base. The os_write32() macro operates on 32-bit quantities, as do + * all RNG register writes. + * + * @param offset Register byte offset within RNG. + * @param value 32-bit value to store into the register + * + * @return (void) + */ +#ifndef RNG_REGISTER_DEBUG +#define RNG_WRITE_REGISTER(offset,value) \ + (void)os_write32(rng_base+(offset), value) +#else +#define RNG_WRITE_REGISTER(offset,value) dbg_rng_write_register(offset,value) +#endif + +#ifndef RNG_DRIVER_NAME +/*! @addtogroup rngcompileflags */ +/*! @{ */ +/*! Name the driver will use to register itself to the kernel as the driver. */ +#define RNG_DRIVER_NAME "rng" +/*! @} */ +#endif + +/*! + * Calculate number of words needed to hold the given number of bytes. + * + * @param byte_count Number of bytes + * + * @return Number of words + */ +#define BYTES_TO_WORDS(byte_count) \ + (((byte_count)+sizeof(uint32_t)-1)/sizeof(uint32_t)) + +/*! Gives high-level view of state of the RNG */ +typedef enum rng_status { + RNG_STATUS_INITIAL, /*!< Driver status before ever starting. */ + RNG_STATUS_CHECKING, /*!< During driver initialization. */ + RNG_STATUS_UNIMPLEMENTED, /*!< Hardware is non-existent / unreachable. */ + RNG_STATUS_OK, /*!< Hardware is In Secure or Default state. */ + RNG_STATUS_FAILED /*!< Hardware is In Failed state / other fatal + problem. Driver is still able to read/write + some registers, but cannot get Random + data. */ +} rng_status_t; + +static shw_queue_t rng_work_queue; + +/***************************************************************************** + * + * Function Declarations + * + *****************************************************************************/ + +/* kernel interface functions */ +OS_DEV_INIT_DCL(rng_init); +OS_DEV_TASK_DCL(rng_entropy_task); +OS_DEV_SHUTDOWN_DCL(rng_shutdown); +OS_DEV_ISR_DCL(rng_irq); + +#define RNG_ADD_QUEUE_ENTRY(pool, entry) \ + SHW_ADD_QUEUE_ENTRY(pool, (shw_queue_entry_t*)entry) + +#define RNG_REMOVE_QUEUE_ENTRY(pool, entry) \ + SHW_REMOVE_QUEUE_ENTRY(pool, (shw_queue_entry_t*)entry) +#define RNG_GET_WORK_ENTRY() \ + (rng_work_entry_t*)SHW_POP_FIRST_ENTRY(&rng_work_queue) + +/*! + * Add an work item to a work list. Item will be marked incomplete. + * + * @param work Work entry to place at tail of list. + * + * @return none + */ +inline static void RNG_ADD_WORK_ENTRY(rng_work_entry_t * work) +{ + work->completed = FALSE; + + SHW_ADD_QUEUE_ENTRY(&rng_work_queue, (shw_queue_entry_t *) work); + + os_dev_schedule_task(rng_entropy_task); +} + +/*! + * For #rng_check_register_accessible(), check read permission on given + * register. + */ +#define RNG_CHECK_READ 0 + +/*! + * For #rng_check_register_accessible(), check write permission on given + * register. + */ +#define RNG_CHECK_WRITE 1 + +/* Define different helper symbols based on RNG type */ +#ifdef FSL_HAVE_RNGA + +/****************************************************************************** + * + * RNGA support + * + *****************************************************************************/ + +/*! Interrupt number for driver. */ +#if defined(MXC_INT_RNG) +/* Most modern definition */ +#define INT_RNG MXC_INT_RNG +#elif defined(MXC_INT_RNGA) +#define INT_RNG MXC_INT_RNGA +#else +#define INT_RNG INT_RNGA +#endif + +/*! Base (bus?) address of RNG component. */ +#define RNG_BASE_ADDR RNGA_BASE_ADDR + +/*! Read and return the status register. */ +#define RNG_GET_STATUS() \ + RNG_READ_REGISTER(RNGA_STATUS) +/*! Configure RNG for Auto seeding */ +#define RNG_AUTO_SEED() +/* Put RNG for Seed Generation */ +#define RNG_SEED_GEN() +/*! + * Return RNG Type value. Should be RNG_TYPE_RNGA, RNG_TYPE_RNGB, + * or RNG_TYPE_RNGC. + */ +#define RNG_GET_RNG_TYPE() \ + ((RNG_READ_REGISTER(RNGA_CONTROL) & RNGA_CONTROL_RNG_TYPE_MASK) \ + >> RNGA_CONTROL_RNG_TYPE_SHIFT) + +/*! + * Verify Type value of RNG. + * + * Returns true of OK, false if not. + */ +#define RNG_VERIFY_TYPE(type) \ + ((type) == RNG_TYPE_RNGA) + +/*! Returns non-zero if RNG device is reporting an error. */ +#define RNG_HAS_ERROR() \ + (RNG_READ_REGISTER(RNGA_STATUS) & RNGA_STATUS_ERROR_INTERRUPT) +/*! Returns non-zero if Bad Key is selected */ +#define RNG_HAS_BAD_KEY() 0 +/*! Return non-zero if Self Test Done */ +#define RNG_SELF_TEST_DONE() 0 +/*! Returns non-zero if RNG ring oscillators have failed. */ +#define RNG_OSCILLATOR_FAILED() \ + (RNG_READ_REGISTER(RNGA_STATUS) & RNGA_STATUS_OSCILLATOR_DEAD) + +/*! Returns maximum number of 32-bit words in the RNG's output fifo. */ +#define RNG_GET_FIFO_SIZE() \ + ((RNG_READ_REGISTER(RNGA_STATUS) & RNGA_STATUS_OUTPUT_FIFO_SIZE_MASK) \ + >> RNGA_STATUS_OUTPUT_FIFO_SIZE_SHIFT) + +/*! Returns number of 32-bit words currently in the RNG's output fifo. */ +#define RNG_GET_WORDS_IN_FIFO() \ + ((RNG_READ_REGISTER(RNGA_STATUS) & RNGA_STATUS_OUTPUT_FIFO_LEVEL_MASK) \ + >> RNGA_STATUS_OUTPUT_FIFO_LEVEL_SHIFT) +/* Configuring RNG for Self Test */ +#define RNG_SELF_TEST() +/*! Get a random value from the RNG's output FIFO. */ +#define RNG_READ_FIFO() \ + RNG_READ_REGISTER(RNGA_OUTPUT_FIFO) + +/*! Put entropy into the RNG's algorithm. + * @param value 32-bit value to add to RNG's entropy. + **/ +#define RNG_ADD_ENTROPY(value) \ + RNG_WRITE_REGISTER(RNGA_ENTROPY, (value)) +/*! Return non-zero in case of Error during Self Test */ +#define RNG_CHECK_SELF_ERR() 0 +/*! Return non-zero in case of Error during Seed Generation */ +#define RNG_CHECK_SEED_ERR() 0 +/*! Get the RNG started at generating output. */ +#define RNG_GO() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control | RNGA_CONTROL_GO); \ +} +/*! To clear all Error Bits in Error Status Register */ +#define RNG_CLEAR_ERR() +/*! Put RNG into High Assurance mode */ +#define RNG_SET_HIGH_ASSURANCE() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control | RNGA_CONTROL_HIGH_ASSURANCE); \ +} + +/*! Return non-zero if the RNG is in High Assurance mode. */ +#define RNG_GET_HIGH_ASSURANCE() \ + (RNG_READ_REGISTER(RNGA_CONTROL) & RNGA_CONTROL_HIGH_ASSURANCE) + +/*! Clear all status, error and otherwise. */ +#define RNG_CLEAR_ALL_STATUS() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control | RNGA_CONTROL_CLEAR_INTERRUPT); \ +} +/* Return non-zero if RESEED Required */ +#define RNG_RESEED() 1 + +/*! Return non-zero if Seeding is done */ +#define RNG_SEED_DONE() 1 + +/*! Return non-zero if everything seems OK with the RNG. */ +#define RNG_WORKING() \ + ((RNG_READ_REGISTER(RNGA_STATUS) \ + & (RNGA_STATUS_SLEEP | RNGA_STATUS_SECURITY_VIOLATION \ + | RNGA_STATUS_ERROR_INTERRUPT | RNGA_STATUS_FIFO_UNDERFLOW \ + | RNGA_STATUS_LAST_READ_STATUS )) == 0) + +/*! Put the RNG into sleep (low-power) mode. */ +#define RNG_SLEEP() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control | RNGA_CONTROL_SLEEP); \ +} + +/*! Wake the RNG from sleep (low-power) mode. */ +#define RNG_WAKE() \ +{ \ + uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control & ~RNGA_CONTROL_SLEEP); \ +} + +/*! Mask interrupts so that the driver/OS will not see them. */ +#define RNG_MASK_ALL_INTERRUPTS() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control | RNGA_CONTROL_MASK_INTERRUPTS); \ +} + +/*! Unmask interrupts so that the driver/OS will see them. */ +#define RNG_UNMASK_ALL_INTERRUPTS() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGA_CONTROL); \ + RNG_WRITE_REGISTER(RNGA_CONTROL, control & ~RNGA_CONTROL_MASK_INTERRUPTS);\ +} + +/*! + * @def RNG_PUT_RNG_TO_SLEEP() + * + * If compiled with #RNG_USE_LOW_POWER_MODE, this routine will put the RNG + * to sleep (low power mode). + * + * @return none + */ +/*! + * @def RNG_WAKE_RNG_FROM_SLEEP() + * + * If compiled with #RNG_USE_LOW_POWER_MODE, this routine will wake the RNG + * from sleep (low power mode). + * + * @return none + */ +#ifdef RNG_USE_LOW_POWER_MODE + +#define RNG_PUT_RNG_TO_SLEEP() \ + RNG_SLEEP() + +#define RNG_WAKE_FROM_SLEEP() \ + RNG_WAKE() 1 + +#else /* not low power mode */ + +#define RNG_PUT_RNG_TO_SLEEP() + +#define RNG_WAKE_FROM_SLEEP() + +#endif /* Use low-power mode */ + +#else /* FSL_HAVE_RNGB or FSL_HAVE_RNGC */ + +/****************************************************************************** + * + * RNGB and RNGC support + * + *****************************************************************************/ +/* + * The operational interfaces for RNGB and RNGC are almost identical, so + * the defines for RNGC work fine for both. There are minor differences + * which will be treated within this conditional block. + */ + +/*! Interrupt number for driver. */ +#if defined(MXC_INT_RNG) +/* Most modern definition */ +#define INT_RNG MXC_INT_RNG +#elif defined(MXC_INT_RNGC) +#define INT_RNG MXC_INT_RNGC +#elif defined(MXC_INT_RNGB) +#define INT_RNG MXC_INT_RNGB +#elif defined(INT_RNGC) +#define INT_RNG INT_RNGC +#else +#error NO_INTERRUPT_DEFINED +#endif + +/*! Base address of RNG component. */ +#ifdef FSL_HAVE_RNGB +#define RNG_BASE_ADDR RNGB_BASE_ADDR +#else +#define RNG_BASE_ADDR RNGC_BASE_ADDR +#endif + +/*! Read and return the status register. */ +#define RNG_GET_STATUS() \ + RNG_READ_REGISTER(RNGC_ERROR) + +/*! + * Return RNG Type value. Should be RNG_TYPE_RNGA or RNG_TYPE_RNGC. + */ +#define RNG_GET_RNG_TYPE() \ + ((RNG_READ_REGISTER(RNGC_VERSION_ID) & RNGC_VERID_RNG_TYPE_MASK) \ + >> RNGC_VERID_RNG_TYPE_SHIFT) + +/*! + * Verify Type value of RNG. + * + * Returns true of OK, false if not. + */ +#ifdef FSL_HAVE_RNGB +#define RNG_VERIFY_TYPE(type) \ + ((type) == RNG_TYPE_RNGB) +#else /* RNGC */ +#define RNG_VERIFY_TYPE(type) \ + ((type) == RNG_TYPE_RNGC) +#endif + +/*! Returns non-zero if RNG device is reporting an error. */ +#define RNG_HAS_ERROR() \ + (RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_ERROR) +/*! Returns non-zero if Bad Key is selected */ +#define RNG_HAS_BAD_KEY() \ + (RNG_READ_REGISTER(RNGC_ERROR) & RNGC_ERROR_STATUS_BAD_KEY) +/*! Returns non-zero if RNG ring oscillators have failed. */ +#define RNG_OSCILLATOR_FAILED() \ + (RNG_READ_REGISTER(RNGC_ERROR) & RNGC_ERROR_STATUS_OSC_ERR) + +/*! Returns maximum number of 32-bit words in the RNG's output fifo. */ +#define RNG_GET_FIFO_SIZE() \ + ((RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_FIFO_SIZE_MASK) \ + >> RNGC_STATUS_FIFO_SIZE_SHIFT) + +/*! Returns number of 32-bit words currently in the RNG's output fifo. */ +#define RNG_GET_WORDS_IN_FIFO() \ + ((RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_FIFO_LEVEL_MASK) \ + >> RNGC_STATUS_FIFO_LEVEL_SHIFT) + +/*! Get a random value from the RNG's output FIFO. */ +#define RNG_READ_FIFO() \ + RNG_READ_REGISTER(RNGC_FIFO) + +/*! Put entropy into the RNG's algorithm. + * @param value 32-bit value to add to RNG's entropy. + **/ +#ifdef FSL_HAVE_RNGB +#define RNG_ADD_ENTROPY(value) \ + RNG_WRITE_REGISTER(RNGB_ENTROPY, value) +#else /* RNGC does not have Entropy register */ +#define RNG_ADD_ENTROPY(value) +#endif +/*! Wake the RNG from sleep (low-power) mode. */ +#define RNG_WAKE() 1 +/*! Get the RNG started at generating output. */ +#define RNG_GO() +/*! Put RNG into High Assurance mode. */ +#define RNG_SET_HIGH_ASSURANCE() +/*! Returns non-zero in case of Error during Self Test */ +#define RNG_CHECK_SELF_ERR() \ + (RNG_READ_REGISTER(RNGC_ERROR) & RNGC_ERROR_STATUS_ST_ERR) +/*! Return non-zero in case of Error during Seed Generation */ +#define RNG_CHECK_SEED_ERR() \ + (RNG_READ_REGISTER(RNGC_ERROR) & RNGC_ERROR_STATUS_STAT_ERR) + +/*! Configure RNG for Self Test */ +#define RNG_SELF_TEST() \ +{ \ + register uint32_t command = RNG_READ_REGISTER(RNGC_COMMAND); \ + RNG_WRITE_REGISTER(RNGC_COMMAND, command \ + | RNGC_COMMAND_SELF_TEST); \ +} +/*! Clearing the Error bits in Error Status Register */ +#define RNG_CLEAR_ERR() \ +{ \ + register uint32_t command = RNG_READ_REGISTER(RNGC_COMMAND); \ + RNG_WRITE_REGISTER(RNGC_COMMAND, command \ + | RNGC_COMMAND_CLEAR_ERROR); \ +} + +/*! Return non-zero if Self Test Done */ +#define RNG_SELF_TEST_DONE() \ + (RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_ST_DONE) +/* Put RNG for SEED Generation */ +#define RNG_SEED_GEN() \ +{ \ + register uint32_t command = RNG_READ_REGISTER(RNGC_COMMAND); \ + RNG_WRITE_REGISTER(RNGC_COMMAND, command \ + | RNGC_COMMAND_SEED); \ +} +/* Return non-zero if RESEED Required */ +#define RNG_RESEED() \ + (RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_RESEED) + +/*! Return non-zero if the RNG is in High Assurance mode. */ +#define RNG_GET_HIGH_ASSURANCE() (RNG_READ_REGISTER(RNGC_STATUS) & \ + RNGC_STATUS_SEC_STATE) + +/*! Clear all status, error and otherwise. */ +#define RNG_CLEAR_ALL_STATUS() \ + RNG_WRITE_REGISTER(RNGC_COMMAND, \ + RNGC_COMMAND_CLEAR_INTERRUPT \ + | RNGC_COMMAND_CLEAR_ERROR) + +/*! Return non-zero if everything seems OK with the RNG. */ +#define RNG_WORKING() \ + ((RNG_READ_REGISTER(RNGC_ERROR) \ + & (RNGC_ERROR_STATUS_STAT_ERR | RNGC_ERROR_STATUS_RAND_ERR \ + | RNGC_ERROR_STATUS_FIFO_ERR | RNGC_ERROR_STATUS_ST_ERR | \ + RNGC_ERROR_STATUS_OSC_ERR | RNGC_ERROR_STATUS_LFSR_ERR )) == 0) +/*! Return Non zero if SEEDING is DONE */ +#define RNG_SEED_DONE() \ + ((RNG_READ_REGISTER(RNGC_STATUS) & RNGC_STATUS_SEED_DONE) != 0) + +/*! Put the RNG into sleep (low-power) mode. */ +#define RNG_SLEEP() + +/*! Wake the RNG from sleep (low-power) mode. */ + +/*! Mask interrupts so that the driver/OS will not see them. */ +#define RNG_MASK_ALL_INTERRUPTS() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGC_CONTROL); \ + RNG_WRITE_REGISTER(RNGC_CONTROL, control \ + | RNGC_CONTROL_MASK_DONE \ + | RNGC_CONTROL_MASK_ERROR); \ +} +/*! Configuring RNGC for self Test. */ + +#define RNG_AUTO_SEED() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGC_CONTROL); \ + RNG_WRITE_REGISTER(RNGC_CONTROL, control \ + | RNGC_CONTROL_AUTO_SEED); \ +} + +/*! Unmask interrupts so that the driver/OS will see them. */ +#define RNG_UNMASK_ALL_INTERRUPTS() \ +{ \ + register uint32_t control = RNG_READ_REGISTER(RNGC_CONTROL); \ + RNG_WRITE_REGISTER(RNGC_CONTROL, \ + control & ~(RNGC_CONTROL_MASK_DONE|RNGC_CONTROL_MASK_ERROR)); \ +} + +/*! Put RNG to sleep if appropriate. */ +#define RNG_PUT_RNG_TO_SLEEP() + +/*! Wake RNG from sleep if necessary. */ +#define RNG_WAKE_FROM_SLEEP() + +#endif /* RNG TYPE */ + +/* internal functions */ +static os_error_code rng_map_RNG_memory(void); +static os_error_code rng_setup_interrupt_handling(void); +#ifdef RNG_REGISTER_PEEK_POKE +inline static int rng_check_register_offset(uint32_t offset); +inline static int rng_check_register_accessible(uint32_t offset, + int access_write); +#endif /* DEBUG_RNG_REGISTERS */ +static fsl_shw_return_t rng_drain_fifo(uint32_t * random_p, int count_words); +static os_error_code rng_grab_config_values(void); +static void rng_cleanup(void); + +#ifdef FSL_HAVE_RNGA +static void rng_sec_failure(void); +#endif + +#ifdef RNG_REGISTER_DEBUG +static uint32_t dbg_rng_read_register(uint32_t offset); +static void dbg_rng_write_register(uint32_t offset, uint32_t value); +#endif + +#if defined(LINUX_VERSION_CODE) + +EXPORT_SYMBOL(fsl_shw_add_entropy); +EXPORT_SYMBOL(fsl_shw_get_random); + +#ifdef RNG_REGISTER_PEEK_POKE +/* For Linux kernel, export the API functions to other kernel modules */ +EXPORT_SYMBOL(rng_read_register); +EXPORT_SYMBOL(rng_write_register); +#endif /* DEBUG_RNG_REGISTERS */ + + + +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_DESCRIPTION("Device Driver for RNG"); + +#endif /* LINUX_VERSION_CODE */ + +#endif /* RNG_INTERNALS_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/shw_hash.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/shw_hash.h @@ -0,0 +1,96 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @file shw_hash.h + * + * This file contains definitions for use of the (internal) SHW hash + * software computation. It defines the usual three steps: + * + * - #shw_hash_init() + * - #shw_hash_update() + * - #shw_hash_final() + * + * The only other item of note to callers is #SHW_HASH_LEN, which is the number + * of bytes calculated for the hash. + */ + +#ifndef SHW_HASH_H +#define SHW_HASH_H + +/*! Define which gives the number of bytes available in an hash result */ +#define SHW_HASH_LEN 32 + +/* Define which matches block length in bytes of the underlying hash */ +#define SHW_HASH_BLOCK_LEN 64 + +/* "Internal" define which matches SHA-256 state size (32-bit words) */ +#define SHW_HASH_STATE_WORDS 8 + +/* "Internal" define which matches word length in blocks of the underlying + hash. */ +#define SHW_HASH_BLOCK_WORD_SIZE 16 + +#define SHW_HASH_STATE_SIZE 32 + +/*! + * State for a SHA-1/SHA-2 Hash + * + * (Note to maintainers: state needs to be updated to uint64_t to handle + * SHA-384/SHA-512)... And bit_count to uint128_t (heh). + */ +typedef struct shw_hash_state { + unsigned int partial_count_bytes; /*!< Number of bytes of message sitting + * in @c partial_block */ + uint8_t partial_block[SHW_HASH_BLOCK_LEN]; /*!< Data waiting to be processed as a block */ + uint32_t state[SHW_HASH_STATE_WORDS]; /*!< Current hash state variables */ + uint64_t bit_count; /*!< Number of bits sent through the update function */ +} shw_hash_state_t; + +/*! + * Initialize the hash state structure + * + * @param state Address of hash state structure. + * @param algorithm Which hash algorithm to use (must be FSL_HASH_ALG_SHA256) + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hash_init(shw_hash_state_t * state, + fsl_shw_hash_alg_t algorithm); + +/*! + * Put data into the hash calculation + * + * @param state Address of hash state structure. + * @param msg Address of the message data for the hash. + * @param msg_len Number of bytes of @c msg. + * + * @return FSL_RETURN_OK_S if all went well, otherwise an error code. + */ +fsl_shw_return_t shw_hash_update(shw_hash_state_t * state, + const uint8_t * msg, unsigned int msg_len); + +/*! + * Calculate the final hash value + * + * @param state Address of hash state structure. + * @param hash Address of location to store the hash. + * @param hash_len Number of bytes of @c hash to be stored. + * + * @return FSL_RETURN_OK_S if all went well, FSL_RETURN_BAD_DATA_LENGTH_S if + * hash_len is too long, otherwise an error code. + */ +fsl_shw_return_t shw_hash_final(shw_hash_state_t * state, + uint8_t * hash, unsigned int hash_len); + +#endif /* SHW_HASH_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/rng/include/rng_rngc.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/rng/include/rng_rngc.h @@ -0,0 +1,235 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file rng_rngc.h + * + * Definition of the registers for the RNGB and RNGC. The names start with + * RNGC where they are in common or relate only to the RNGC; the RNGB-only + * definitions begin with RNGB. + * + */ + +#ifndef RNG_RNGC_H +#define RNG_RNGC_H + +#define RNGC_VERSION_MAJOR3 3 + +/*! @defgroup rngcregs RNGB/RNGC Registers + * These are the definitions for the RNG registers and their offsets + * within the RNG. They are used in the @c register_offset parameter of + * #rng_read_register() and #rng_write_register(). + * + * @ingroup RNG + */ +/*! @addtogroup rngcregs */ +/*! @{ */ + +/*! RNGC Version ID Register R/W */ +#define RNGC_VERSION_ID 0x0000 +/*! RNGC Command Register R/W */ +#define RNGC_COMMAND 0x0004 +/*! RNGC Control Register R/W */ +#define RNGC_CONTROL 0x0008 +/*! RNGC Status Register R */ +#define RNGC_STATUS 0x000C +/*! RNGC Error Status Register R */ +#define RNGC_ERROR 0x0010 +/*! RNGC FIFO Register W */ +#define RNGC_FIFO 0x0014 +/*! Undefined */ +#define RNGC_UNDEF_18 0x0018 +/*! RNGB Entropy Register W */ +#define RNGB_ENTROPY 0x0018 +/*! Undefined */ +#define RNGC_UNDEF_1C 0x001C +/*! RNGC Verification Control Register1 R/W */ +#define RNGC_VERIFICATION_CONTROL 0x0020 +/*! Undefined */ +#define RNGC_UNDEF_24 0x0024 +/*! RNGB XKEY Data Register R */ +#define RNGB_XKEY 0x0024 +/*! RNGC Oscillator Counter Control Register1 R/W */ +#define RNGC_OSC_COUNTER_CONTROL 0x0028 +/*! RNGC Oscillator Counter Register1 R */ +#define RNGC_OSC_COUNTER 0x002C +/*! RNGC Oscillator Counter Status Register1 R */ +#define RNGC_OSC_COUNTER_STATUS 0x0030 +/*! @} */ + +/*! @defgroup rngcveridreg RNGB/RNGC Version ID Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngcveridreg */ +/*! @{ */ +/*! These bits are unimplemented or reserved */ +#define RNGC_VERID_ZEROS_MASK 0x0f000000 +/*! Mask for RNG TYPE */ +#define RNGC_VERID_RNG_TYPE_MASK 0xf0000000 +/*! Shift to make RNG TYPE be LSB */ +#define RNGC_VERID_RNG_TYPE_SHIFT 28 +/*! Mask for RNG Chip Version */ +#define RNGC_VERID_CHIP_VERSION_MASK 0x00ff0000 +/*! Shift to make RNG Chip version be LSB */ +#define RNGC_VERID_CHIP_VERSION_SHIFT 16 +/*! Mask for RNG Major Version */ +#define RNGC_VERID_VERSION_MAJOR_MASK 0x0000ff00 +/*! Shift to make RNG Major version be LSB */ +#define RNGC_VERID_VERSION_MAJOR_SHIFT 8 +/*! Mask for RNG Minor Version */ +#define RNGC_VERID_VERSION_MINOR_MASK 0x000000ff +/*! Shift to make RNG Minor version be LSB */ +#define RNGC_VERID_VERSION_MINOR_SHIFT 0 +/*! @} */ + +/*! @defgroup rngccommandreg RNGB/RNGC Command Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngccommandreg */ +/*! @{ */ +/*! These bits are unimplemented or reserved. */ +#define RNGC_COMMAND_ZEROS_MASK 0xffffff8c +/*! Perform a software reset of the RNGC. */ +#define RNGC_COMMAND_SOFTWARE_RESET 0x00000040 +/*! Clear error from Error Status register (and interrupt). */ +#define RNGC_COMMAND_CLEAR_ERROR 0x00000020 +/*! Clear interrupt & status. */ +#define RNGC_COMMAND_CLEAR_INTERRUPT 0x00000010 +/*! Start RNGC seed generation. */ +#define RNGC_COMMAND_SEED 0x00000002 +/*! Perform a self test of (and reset) the RNGC. */ +#define RNGC_COMMAND_SELF_TEST 0x00000001 +/*! @} */ + +/*! @defgroup rngccontrolreg RNGB/RNGC Control Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngccontrolreg */ +/*! @{ */ +/*! These bits are unimplemented or reserved */ +#define RNGC_CONTROL_ZEROS_MASK 0xfffffc8c +/*! Allow access to verification registers. */ +#define RNGC_CONTROL_CTL_ACC 0x00000200 +/*! Put RNGC into deterministic verifcation mode. */ +#define RNGC_CONTROL_VERIF_MODE 0x00000100 +/*! Prevent RNGC from generating interrupts caused by errors. */ +#define RNGC_CONTROL_MASK_ERROR 0x00000040 + +/*! + * Prevent RNGB/RNGC from generating interrupts after Seed Done or Self Test + * Mode completion. + */ +#define RNGC_CONTROL_MASK_DONE 0x00000020 +/*! Allow RNGC to generate a new seed whenever it is needed. */ +#define RNGC_CONTROL_AUTO_SEED 0x00000010 +/*! Set FIFO Underflow Response.*/ +#define RNGC_CONTROL_FIFO_UFLOW_MASK 0x00000003 +/*! Shift value to make FIFO Underflow Response be LSB. */ +#define RNGC_CONTROL_FIFO_UFLOW_SHIFT 0 + +/*! @} */ + +/*! @{ */ +/*! FIFO Underflow should cause ... */ +#define RNGC_CONTROL_FIFO_UFLOW_ZEROS_ERROR 0 +/*! FIFO Underflow should cause ... */ +#define RNGC_CONTROL_FIFO_UFLOW_ZEROS_ERROR2 1 +/*! FIFO Underflow should cause ... */ +#define RNGC_CONTROL_FIFO_UFLOW_BUS_XFR 2 +/*! FIFO Underflow should cause ... */ +#define RNGC_CONTROL_FIFO_UFLOW_ZEROS_INTR 3 +/*! @} */ + +/*! @defgroup rngcstatusreg RNGB/RNGC Status Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngcstatusreg */ +/*! @{ */ +/*! Unused or MBZ. */ +#define RNGC_STATUS_ZEROS_MASK 0x003e0080 +/*! + * Statistical tests pass-fail. Individual bits on indicate failure of a + * particular test. + */ +#define RNGC_STATUS_STAT_TEST_PF_MASK 0xff000000 +/*! Mask to get Statistical PF to be LSB. */ +#define RNGC_STATUS_STAT_TEST_PF_SHIFT 24 +/*! + * Self tests pass-fail. Individual bits on indicate failure of a + * particular test. + */ +#define RNGC_STATUS_ST_PF_MASK 0x00c00000 +/*! Shift value to get Self Test PF field to be LSB. */ +#define RNGC_STATUS_ST_PF_SHIFT 22 +/* TRNG Self test pass-fail */ +#define RNGC_STATUS_ST_PF_TRNG 0x00800000 +/* PRNG Self test pass-fail */ +#define RNGC_STATUS_ST_PF_PRNG 0x00400000 +/*! Error detected in RNGC. See Error Status register. */ +#define RNGC_STATUS_ERROR 0x00010000 +/*! Size of the internal FIFO in 32-bit words. */ +#define RNGC_STATUS_FIFO_SIZE_MASK 0x0000f000 +/*! Shift value to get FIFO Size to be LSB. */ +#define RNGC_STATUS_FIFO_SIZE_SHIFT 12 +/*! The level (available data) of the internal FIFO in 32-bit words. */ +#define RNGC_STATUS_FIFO_LEVEL_MASK 0x00000f00 +/*! Shift value to get FIFO Level to be LSB. */ +#define RNGC_STATUS_FIFO_LEVEL_SHIFT 8 +/*! A new seed is ready for use. */ +#define RNGC_STATUS_NEXT_SEED_DONE 0x00000040 +/*! The first seed has been generated. */ +#define RNGC_STATUS_SEED_DONE 0x00000020 +/*! Self Test has been completed. */ +#define RNGC_STATUS_ST_DONE 0x00000010 +/*! Reseed is necessary. */ +#define RNGC_STATUS_RESEED 0x00000008 +/*! RNGC is sleeping. */ +#define RNGC_STATUS_SLEEP 0x00000004 +/*! RNGC is currently generating numbers, seeding, generating next seed, or + performing a self test. */ +#define RNGC_STATUS_BUSY 0x00000002 +/*! RNGC is in secure state. */ +#define RNGC_STATUS_SEC_STATE 0x00000001 + +/*! @} */ + +/*! @defgroup rngcerrstatusreg RNGB/RNGC Error Status Register Definitions + * @ingroup RNG + */ +/*! @addtogroup rngcerrstatusreg */ +/*! @{ */ +/*! Unused or MBZ. */ +#define RNGC_ERROR_STATUS_ZEROS_MASK 0xffffff80 +/*! Bad Key Error Status */ +#define RNGC_ERROR_STATUS_BAD_KEY 0x00000040 +/*! Random Compare Error. Previous number matched the current number. */ +#define RNGC_ERROR_STATUS_RAND_ERR 0x00000020 +/*! FIFO Underflow. FIFO was read while empty. */ +#define RNGC_ERROR_STATUS_FIFO_ERR 0x00000010 +/*! Statistic Error Statistic Test failed for the last seed. */ +#define RNGC_ERROR_STATUS_STAT_ERR 0x00000008 +/*! Self-test error. Some self test has failed. */ +#define RNGC_ERROR_STATUS_ST_ERR 0x00000004 +/*! + * Oscillator Error. The oscillator may be broken. Clear by hard or soft + * reset. + */ +#define RNGC_ERROR_STATUS_OSC_ERR 0x00000002 +/*! LFSR Error. Clear by hard or soft reset. */ +#define RNGC_ERROR_STATUS_LFSR_ERR 0x00000001 + +/*! @} */ + +/*! Total address space of the RNGB/RNGC registers, in bytes */ +#define RNG_ADDRESS_RANGE 0x34 + +#endif /* RNG_RNGC_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_auth.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_auth.c @@ -0,0 +1,706 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file fsl_shw_auth.c + * + * This file contains the routines which do the combined encrypt+authentication + * functions. For now, only AES-CCM is supported. + */ + +#include "sahara.h" +#include "adaptor.h" +#include "sf_util.h" + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_gen_encrypt); +EXPORT_SYMBOL(fsl_shw_auth_decrypt); +#endif + + +/*! Size of buffer to repetively sink useless CBC output */ +#define CBC_BUF_LEN 4096 + +/*! + * Compute the size, in bytes, of the encoded auth length + * + * @param l The actual associated data length + * + * @return The encoded length + */ +#define COMPUTE_NIST_AUTH_LEN_SIZE(l) \ +({ \ + unsigned val; \ + uint32_t len = l; \ + if (len == 0) { \ + val = 0; \ + } else if (len < 65280) { \ + val = 2; \ + } else { /* cannot handle >= 2^32 */ \ + val = 6; \ + } \ + val; \ +}) + +/*! + * Store the encoded Auth Length into the Auth Data + * + * @param l The actual Auth Length + * @param p Location to store encoding (must be uint8_t*) + * + * @return void + */ +#define STORE_NIST_AUTH_LEN(l, p) \ +{ \ + register uint32_t L = l; \ + if ((uint32_t)(l) < 65280) { \ + (p)[1] = L & 0xff; \ + L >>= 8; \ + (p)[0] = L & 0xff; \ + } else { /* cannot handle >= 2^32 */ \ + int i; \ + for (i = 5; i > 1; i--) { \ + (p)[i] = L & 0xff; \ + L >>= 8; \ + } \ + (p)[1] = 0xfe; /* Markers */ \ + (p)[0] = 0xff; \ + } \ +} + +#if defined (FSL_HAVE_SAHARA2) || defined (USE_S2_CCM_DECRYPT_CHAIN) \ + || defined (USE_S2_CCM_ENCRYPT_CHAIN) +/*! Buffer to repetively sink useless CBC output */ +static uint8_t cbc_buffer[CBC_BUF_LEN]; +#endif + +/*! + * Place to store useless output (while bumping CTR0 to CTR1, for instance. + * Must be maximum Symmetric block size + */ +static uint8_t garbage_output[16]; + +/*! + * Block of zeroes which is maximum Symmetric block size, used for + * initializing context register, etc. + */ +static uint8_t block_zeros[16] = { + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/*! + * Append a descriptor chain which will compute CBC over the + * formatted associated data blocks. + * + * @param[in,out] link1 Where to append the new link + * @param[in,out] data_len Location of current/updated auth-only data length + * @param user_ctx Info for acquiring memory + * @param auth_ctx Location of block0 value + * @param auth_data Unformatted associated data + * @param auth_data_length Length in octets of @a auth_data + * @param[in,out] temp_buf Location of in-process data. + * + * @return A return code of type #fsl_shw_return_t. + */ +static inline fsl_shw_return_t process_assoc_from_nist_params(sah_Link ** link1, + uint32_t * + data_len, + fsl_shw_uco_t * + user_ctx, + fsl_shw_acco_t * + auth_ctx, + const uint8_t * + auth_data, + uint32_t + auth_data_length, + uint8_t ** + temp_buf) +{ + fsl_shw_return_t status; + uint32_t auth_size_length = + COMPUTE_NIST_AUTH_LEN_SIZE(auth_data_length); + uint32_t auth_pad_length = + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes - + (auth_data_length + + auth_size_length) % + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes; + + if (auth_pad_length == + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes) { + auth_pad_length = 0; + } + + /* Put in Block0 */ + status = sah_Create_Link(user_ctx->mem_util, link1, + auth_ctx->auth_info.CCM_ctx_info.context, + auth_ctx->auth_info.CCM_ctx_info. + block_size_bytes, SAH_USES_LINK_DATA); + + if (auth_data_length != 0) { + if (status == FSL_RETURN_OK_S) { + /* Add on length preamble to auth data */ + STORE_NIST_AUTH_LEN(auth_data_length, *temp_buf); + status = sah_Append_Link(user_ctx->mem_util, *link1, + *temp_buf, auth_size_length, + SAH_OWNS_LINK_DATA); + *temp_buf += auth_size_length; /* 2, 6, or 10 bytes */ + } + + if (status == FSL_RETURN_OK_S) { + /* Add in auth data */ + status = sah_Append_Link(user_ctx->mem_util, *link1, + (uint8_t *) auth_data, + auth_data_length, + SAH_USES_LINK_DATA); + } + + if ((status == FSL_RETURN_OK_S) && (auth_pad_length > 0)) { + status = sah_Append_Link(user_ctx->mem_util, *link1, + block_zeros, auth_pad_length, + SAH_USES_LINK_DATA); + } + } + /* ... if auth_data_length != 0 */ + *data_len = auth_ctx->auth_info.CCM_ctx_info.block_size_bytes + + auth_data_length + auth_size_length + auth_pad_length; + + return status; +} /* end fn process_assoc_from_nist_params */ + +/*! + * Add a Descriptor which will process with CBC the NIST preamble data + * + * @param desc_chain Current chain + * @param user_ctx User's context + * @param auth_ctx Inf + * @pararm encrypt 0 => decrypt, non-zero => encrypt + * @param auth_data Additional auth data for this call + * @param auth_data_length Length in bytes of @a auth_data + * + * @return A return code of type #fsl_shw_return_t. + */ +static inline fsl_shw_return_t add_assoc_preamble(sah_Head_Desc ** desc_chain, + fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + int encrypt, + const uint8_t * auth_data, + uint32_t auth_data_length) +{ + uint8_t *temp_buf; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + fsl_shw_return_t status = FSL_RETURN_OK_S; + uint32_t cbc_data_length = 0; + /* Assume AES */ + uint32_t header = SAH_HDR_SKHA_ENC_DEC; + uint32_t temp_buf_flag; + unsigned chain_s2 = 1; + +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_DECRYPT_CHAIN) + if (!encrypt) { + chain_s2 = 0; + } +#endif +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_ENCRYPT_CHAIN) + if (encrypt) { + chain_s2 = 0; + } +#endif + /* Grab a block big enough for multiple uses so that only one allocate + * request needs to be made. + */ + temp_buf = + user_ctx->mem_util->mu_malloc(user_ctx->mem_util->mu_ref, + 3 * + auth_ctx->auth_info.CCM_ctx_info. + block_size_bytes); + + if (temp_buf == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; + goto out; + } + + if (auth_ctx->flags & FSL_ACCO_NIST_CCM) { + status = process_assoc_from_nist_params(&link1, + &cbc_data_length, + user_ctx, + auth_ctx, + auth_data, + auth_data_length, + &temp_buf); + if (status != FSL_RETURN_OK_S) { + goto out; + } + /* temp_buf has been referenced (and incremented). Only 'own' it + * once, at its first value. Since the nist routine called above + * bumps it... + */ + temp_buf_flag = SAH_USES_LINK_DATA; + } else { /* if NIST */ + status = sah_Create_Link(user_ctx->mem_util, &link1, + (uint8_t *) auth_data, + auth_data_length, SAH_USES_LINK_DATA); + if (status != FSL_RETURN_OK_S) { + goto out; + } + /* for next/first use of temp_buf */ + temp_buf_flag = SAH_OWNS_LINK_DATA; + cbc_data_length = auth_data_length; + } /* else not NIST */ + +#if defined (FSL_HAVE_SAHARA2) || defined (USE_S2_CCM_ENCRYPT_CHAIN) \ + || defined (USE_S2_CCM_DECRYPT_CHAIN) + + if (!chain_s2) { + header = SAH_HDR_SKHA_CBC_ICV + ^ sah_insert_skha_mode_cbc ^ sah_insert_skha_aux0 + ^ sah_insert_skha_encrypt; + } else { + /* + * Auth data links have been created. Now create link for the + * useless output of the CBC calculation. + */ + status = sah_Create_Link(user_ctx->mem_util, &link2, + temp_buf, + auth_ctx->auth_info.CCM_ctx_info. + block_size_bytes, + temp_buf_flag | SAH_OUTPUT_LINK); + if (status != FSL_RETURN_OK_S) { + goto out; + } + + temp_buf += auth_ctx->auth_info.CCM_ctx_info.block_size_bytes; + + cbc_data_length -= + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes; + if (cbc_data_length != 0) { + while ((status == FSL_RETURN_OK_S) + && (cbc_data_length != 0)) { + uint32_t linklen = + (cbc_data_length > + CBC_BUF_LEN) ? CBC_BUF_LEN : + cbc_data_length; + + status = + sah_Append_Link(user_ctx->mem_util, link2, + cbc_buffer, linklen, + SAH_USES_LINK_DATA | + SAH_OUTPUT_LINK); + if (status != FSL_RETURN_OK_S) { + goto out; + } + cbc_data_length -= linklen; + } + } + } +#else + header = SAH_HDR_SKHA_CBC_ICV + ^ sah_insert_skha_mode_cbc ^ sah_insert_skha_aux0 + ^ sah_insert_skha_encrypt; +#endif + /* Crank through auth data */ + status = sah_Append_Desc(user_ctx->mem_util, desc_chain, + header, link1, link2); + + out: + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(user_ctx->mem_util, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(user_ctx->mem_util, link2); + } + } + + (void)encrypt; + return status; +} /* add_assoc_preamble() */ + +#if SUPPORT_SSL +/*! + * Generate an SSL value + * + * @param user_ctx Info for acquiring memory + * @param auth_ctx Info for CTR0, size of MAC + * @param cipher_key_info + * @param auth_key_info + * @param auth_data_length + * @param auth_data + * @param payload_length + * @param payload + * @param ct + * @param auth_value + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t do_ssl_gen(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * payload, + uint8_t * ct, uint8_t * auth_value) +{ + SAH_SF_DCLS; + uint8_t *ptr1 = NULL; + + /* Assume one-shot init-finalize... no precomputes */ + header = SAH_HDR_MDHA_SET_MODE_MD_KEY ^ + sah_insert_mdha_algorithm[auth_ctx->auth_info.hash_ctx_info. + algorithm] ^ sah_insert_mdha_init ^ + sah_insert_mdha_ssl ^ sah_insert_mdha_pdata ^ + sah_insert_mdha_mac_full; + + /* set up hmac */ + DESC_IN_KEY(header, 0, NULL, auth_key_info); + + /* This is wrong -- need to find 16 extra bytes of data from + * somewhere */ + DESC_IN_OUT(SAH_HDR_MDHA_HASH, payload_length, payload, 1, auth_value); + + /* set up encrypt */ + header = SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_mode[auth_ctx->cipher_ctx_info.mode] + ^ sah_insert_skha_encrypt + ^ sah_insert_skha_algorithm[cipher_key_info->algorithm]; + + /* Honor 'no key parity checking' for DES and TDES */ + if ((cipher_key_info->flags & FSL_SKO_KEY_IGNORE_PARITY) && + ((cipher_key_info->algorithm == FSL_KEY_ALG_DES) || + (cipher_key_info->algorithm == FSL_KEY_ALG_TDES))) { + header ^= sah_insert_skha_no_key_parity; + } + + if (auth_ctx->cipher_ctx_info.mode == FSL_SYM_MODE_CTR) { + header ^= + sah_insert_skha_modulus[auth_ctx->cipher_ctx_info. + modulus_exp]; + } + + if ((auth_ctx->cipher_ctx_info.mode == FSL_SYM_MODE_ECB) + || (auth_ctx->cipher_ctx_info.flags & FSL_SYM_CTX_INIT)) { + ptr1 = block_zeros; + } else { + ptr1 = auth_ctx->cipher_ctx_info.context; + } + + DESC_IN_KEY(header, auth_ctx->cipher_ctx_info.block_size_bytes, ptr1, + cipher_key_info); + + /* This is wrong -- need to find 16 extra bytes of data from + * somewhere... + */ + if (payload_length != 0) { + DESC_IN_OUT(SAH_HDR_SKHA_ENC_DEC, + payload_length, payload, payload_length, ct); + } + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + /* Eliminate compiler warnings until full implementation... */ + (void)auth_data; + (void)auth_data_length; + + return ret; +} /* do_ssl_gen() */ +#endif + +/*! + * @brief Generate a (CCM) auth code and encrypt the payload. + * + * This is a very complicated function. Seven (or eight) descriptors are + * required to perform a CCM calculation. + * + * First: Load CTR0 and key. + * + * Second: Run an octet of data through to bump to CTR1. (This could be + * done in software, but software will have to bump and later decrement - + * or copy and bump. + * + * Third: (in Virtio) Load a descriptor with data of zeros for CBC IV. + * + * Fourth: Run any (optional) "additional data" through the CBC-mode + * portion of the algorithm. + * + * Fifth: Run the payload through in CCM mode. + * + * Sixth: Extract the unencrypted MAC. + * + * Seventh: Load CTR0. + * + * Eighth: Encrypt the MAC. + * + * @param user_ctx The user's context + * @param auth_ctx Info on this Auth operation + * @param cipher_key_info Key to encrypt payload + * @param auth_key_info (unused - same key in CCM) + * @param auth_data_length Length in bytes of @a auth_data + * @param auth_data Any auth-only data + * @param payload_length Length in bytes of @a payload + * @param payload The data to encrypt + * @param[out] ct The location to store encrypted data + * @param[out] auth_value The location to store authentication code + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_gen_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * payload, + uint8_t * ct, uint8_t * auth_value) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + if (auth_ctx->mode == FSL_ACC_MODE_SSL) { +#if SUPPORT_SSL + ret = do_ssl_gen(user_ctx, auth_ctx, cipher_key_info, + auth_key_info, auth_data_length, auth_data, + payload_length, payload, ct, auth_value); +#else + ret = FSL_RETURN_BAD_MODE_S; +#endif + goto out; + } + + if (auth_ctx->mode != FSL_ACC_MODE_CCM) { + ret = FSL_RETURN_BAD_MODE_S; + goto out; + } + + /* Only support INIT and FINALIZE flags right now. */ + if ((auth_ctx->flags & (FSL_ACCO_CTX_INIT | FSL_ACCO_CTX_LOAD | + FSL_ACCO_CTX_SAVE | FSL_ACCO_CTX_FINALIZE)) + != (FSL_ACCO_CTX_INIT | FSL_ACCO_CTX_FINALIZE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* Load CTR0 and Key */ + header = (SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_mode_ctr + ^ sah_insert_skha_modulus_128 ^ sah_insert_skha_encrypt); + DESC_IN_KEY(header, + auth_ctx->cipher_ctx_info.block_size_bytes, + auth_ctx->cipher_ctx_info.context, cipher_key_info); + + /* Encrypt dummy data to bump to CTR1 */ + header = SAH_HDR_SKHA_ENC_DEC; + DESC_IN_OUT(header, auth_ctx->mac_length, garbage_output, + auth_ctx->mac_length, garbage_output); + +#if defined(FSL_HAVE_SAHARA2) || defined(USE_S2_CCM_ENCRYPT_CHAIN) +#ifndef NO_ZERO_IV_LOAD + header = (SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_encrypt ^ sah_insert_skha_mode_cbc); + DESC_IN_IN(header, + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes, + block_zeros, 0, NULL); +#endif +#endif + + ret = add_assoc_preamble(&desc_chain, user_ctx, + auth_ctx, 1, auth_data, auth_data_length); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Process the payload */ + header = (SAH_HDR_SKHA_SET_MODE_ENC_DEC + ^ sah_insert_skha_mode_ccm + ^ sah_insert_skha_modulus_128 ^ sah_insert_skha_encrypt); +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_ENCRYPT_CHAIN) + header ^= sah_insert_skha_aux0; +#endif + if (payload_length != 0) { + DESC_IN_OUT(header, payload_length, payload, payload_length, + ct); + } else { + DESC_IN_OUT(header, 0, NULL, 0, NULL); + } /* if payload_length */ + +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_ENCRYPT_CHAIN) + /* Pull out the CBC-MAC value. */ + DESC_OUT_OUT(SAH_HDR_SKHA_READ_CONTEXT_IV, 0, NULL, + auth_ctx->mac_length, auth_value); +#else + /* Pull out the unencrypted CBC-MAC value. */ + DESC_OUT_OUT(SAH_HDR_SKHA_READ_CONTEXT_IV, + 0, NULL, auth_ctx->mac_length, auth_ctx->unencrypted_mac); + + /* Now load CTR0 in, and encrypt the MAC */ + header = SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_encrypt + ^ sah_insert_skha_mode_ctr ^ sah_insert_skha_modulus_128; + DESC_IN_IN(header, + auth_ctx->cipher_ctx_info.block_size_bytes, + auth_ctx->cipher_ctx_info.context, 0, NULL); + + header = SAH_HDR_SKHA_ENC_DEC; /* Desc. #4 SKHA Enc/Dec */ + DESC_IN_OUT(header, + auth_ctx->mac_length, auth_ctx->unencrypted_mac, + auth_ctx->mac_length, auth_value); +#endif + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + (void)auth_key_info; + return ret; +} /* fsl_shw_gen_encrypt() */ + +/*! + * @brief Authenticate and decrypt a (CCM) stream. + * + * @param user_ctx The user's context + * @param auth_ctx Info on this Auth operation + * @param cipher_key_info Key to encrypt payload + * @param auth_key_info (unused - same key in CCM) + * @param auth_data_length Length in bytes of @a auth_data + * @param auth_data Any auth-only data + * @param payload_length Length in bytes of @a payload + * @param ct The encrypted data + * @param auth_value The authentication code to validate + * @param[out] payload The location to store decrypted data + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_auth_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * ct, + const uint8_t * auth_value, + uint8_t * payload) +{ + SAH_SF_DCLS; +#if defined(FSL_HAVE_SAHARA2) || defined(USE_S2_CCM_DECRYPT_CHAIN) + uint8_t *calced_auth = NULL; + unsigned blocking = user_ctx->flags & FSL_UCO_BLOCKING_MODE; +#endif + + SAH_SF_USER_CHECK(); + + /* Only support CCM */ + if (auth_ctx->mode != FSL_ACC_MODE_CCM) { + ret = FSL_RETURN_BAD_MODE_S; + goto out; + } + /* Only support INIT and FINALIZE flags right now. */ + if ((auth_ctx->flags & (FSL_ACCO_CTX_INIT | FSL_ACCO_CTX_LOAD | + FSL_ACCO_CTX_SAVE | FSL_ACCO_CTX_FINALIZE)) + != (FSL_ACCO_CTX_INIT | FSL_ACCO_CTX_FINALIZE)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* Load CTR0 and Key */ + header = SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_mode_ctr ^ sah_insert_skha_modulus_128; +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_DECRYPT_CHAIN) + header ^= sah_insert_skha_aux0; +#endif + DESC_IN_KEY(header, + auth_ctx->cipher_ctx_info.block_size_bytes, + auth_ctx->cipher_ctx_info.context, cipher_key_info); + + /* Decrypt the MAC which the user passed in */ + header = SAH_HDR_SKHA_ENC_DEC; + DESC_IN_OUT(header, + auth_ctx->mac_length, auth_value, + auth_ctx->mac_length, auth_ctx->unencrypted_mac); + +#if defined(FSL_HAVE_SAHARA2) || defined(USE_S2_CCM_DECRYPT_CHAIN) +#ifndef NO_ZERO_IV_LOAD + header = (SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_encrypt ^ sah_insert_skha_mode_cbc); + DESC_IN_IN(header, + auth_ctx->auth_info.CCM_ctx_info.block_size_bytes, + block_zeros, 0, NULL); +#endif +#endif + + ret = add_assoc_preamble(&desc_chain, user_ctx, + auth_ctx, 0, auth_data, auth_data_length); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Process the payload */ + header = (SAH_HDR_SKHA_SET_MODE_ENC_DEC + ^ sah_insert_skha_mode_ccm ^ sah_insert_skha_modulus_128); +#if defined (FSL_HAVE_SAHARA4) && !defined (USE_S2_CCM_DECRYPT_CHAIN) + header ^= sah_insert_skha_aux0; +#endif + if (payload_length != 0) { + DESC_IN_OUT(header, payload_length, ct, payload_length, + payload); + } else { + DESC_IN_OUT(header, 0, NULL, 0, NULL); + } + +#if defined (FSL_HAVE_SAHARA2) || defined (USE_S2_CCM_DECRYPT_CHAIN) + /* Now pull CBC context (unencrypted MAC) out for comparison. */ + /* Need to allocate a place for it, to handle non-blocking mode + * when this stack frame will disappear! + */ + calced_auth = DESC_TEMP_ALLOC(auth_ctx->mac_length); + header = SAH_HDR_SKHA_READ_CONTEXT_IV; + DESC_OUT_OUT(header, 0, NULL, auth_ctx->mac_length, calced_auth); + if (!blocking) { + /* get_results will need this for comparison */ + desc_chain->out1_ptr = calced_auth; + desc_chain->out2_ptr = auth_ctx->unencrypted_mac; + desc_chain->out_len = auth_ctx->mac_length; + } +#endif + + SAH_SF_EXECUTE(); + +#if defined (FSL_HAVE_SAHARA2) || defined (USE_S2_CCM_DECRYPT_CHAIN) + if (blocking && (ret == FSL_RETURN_OK_S)) { + unsigned i; + /* Validate the auth code */ + for (i = 0; i < auth_ctx->mac_length; i++) { + if (calced_auth[i] != auth_ctx->unencrypted_mac[i]) { + ret = FSL_RETURN_AUTH_FAILED_S; + break; + } + } + } +#endif + + out: + SAH_SF_DESC_CLEAN(); +#if defined (FSL_HAVE_SAHARA2) || defined (USE_S2_CCM_DECRYPT_CHAIN) + DESC_TEMP_FREE(calced_auth); +#endif + + (void)auth_key_info; + return ret; +} /* fsl_shw_gen_decrypt() */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_queue.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_queue.c @@ -0,0 +1,249 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sah_queue.c +* +* @brief This file provides a FIFO Queue implementation. +* +*/ +/****************************************************************************** +* +* CAUTION: +******************************************************************* +*/ + +/* SAHARA Includes */ +#include +#ifdef DIAG_DRV_QUEUE +#include +#endif + +/****************************************************************************** +* Queue Functions +******************************************************************************/ + +/*! +******************************************************************************* +* This function constructs a new sah_Queue. +* +* @brief sah_Queue Constructor +* +* @return A pointer to a newly allocated sah_Queue. +* @return NULL if allocation of memory failed. +*/ +/****************************************************************************** +* +* CAUTION: This function may sleep in low-memory situations, as it uses +* kmalloc ( ..., GFP_KERNEL). +******************************************************************************/ +sah_Queue *sah_Queue_Construct(void) +{ + sah_Queue *q = (sah_Queue *) os_alloc_memory(sizeof(sah_Queue), + GFP_KERNEL); + + if (q != NULL) { + /* Initialise the queue to an empty state. */ + q->head = NULL; + q->tail = NULL; + q->count = 0; + } +#ifdef DIAG_DRV_QUEUE + else { + LOG_KDIAG("kmalloc() failed."); + } +#endif + + return q; +} + +/*! +******************************************************************************* +* This function destroys a sah_Queue. +* +* @brief sah_Queue Destructor +* +* @param q A pointer to a sah_Queue. +* +* @return void +*/ +/****************************************************************************** +* +* CAUTION: This function does not free any queue entries. +* +******************************************************************************/ +void sah_Queue_Destroy(sah_Queue * q) +{ +#ifdef DIAG_DRV_QUEUE + if (q == NULL) { + LOG_KDIAG("Trying to kfree() a NULL pointer."); + } else { + if (q->count != 0) { + LOG_KDIAG + ("Trying to destroy a queue that is not empty."); + } + } +#endif + + if (q != NULL) { + os_free_memory(q); + q = NULL; + } +} + +/*! +******************************************************************************* +* This function appends a sah_Head_Desc to the tail of a sah_Queue. +* +* @brief Appends a sah_Head_Desc to a sah_Queue. +* +* @param q A pointer to a sah_Queue to append to. +* @param entry A pointer to a sah_Head_Desc to append. +* +* @pre The #desc_queue_lock must be held before calling this function. +* +* @return void +*/ +/****************************************************************************** +* +* CAUTION: NONE +******************************************************************************/ +void sah_Queue_Append_Entry(sah_Queue * q, sah_Head_Desc * entry) +{ + sah_Head_Desc *tail_entry = NULL; + + if ((q == NULL) || (entry == NULL)) { +#ifdef DIAG_DRV_QUEUE + LOG_KDIAG("Null pointer input."); +#endif + return; + } + + if (q->count == 0) { + /* The queue is empty */ + q->head = entry; + q->tail = entry; + entry->next = NULL; + entry->prev = NULL; + } else { + /* The queue is not empty */ + tail_entry = q->tail; + tail_entry->next = entry; + entry->next = NULL; + entry->prev = tail_entry; + q->tail = entry; + } + q->count++; +} + +/*! +******************************************************************************* +* This function a removes a sah_Head_Desc from the head of a sah_Queue. +* +* @brief Removes a sah_Head_Desc from a the head of a sah_Queue. +* +* @param q A pointer to a sah_Queue to remove from. +* +* @pre The #desc_queue_lock must be held before calling this function. +* +* @return void +*/ +/****************************************************************************** +* +* CAUTION: This does not kfree() the entry. +******************************************************************************/ +void sah_Queue_Remove_Entry(sah_Queue * q) +{ + sah_Queue_Remove_Any_Entry(q, q->head); +} + +/*! +******************************************************************************* +* This function a removes a sah_Head_Desc from anywhere in a sah_Queue. +* +* @brief Removes a sah_Head_Desc from anywhere in a sah_Queue. +* +* @param qq A pointer to a sah_Queue to remove from. +* @param entry A pointer to a sah_Head_Desc to remove. +* +* @pre The #desc_queue_lock must be held before calling this function. +* +* @return void +*/ +/****************************************************************************** +* +* CAUTION: This does not kfree() the entry. Does not check to see if the entry +* actually belongs to the queue. +******************************************************************************/ +void sah_Queue_Remove_Any_Entry(sah_Queue * q, sah_Head_Desc * entry) +{ + sah_Head_Desc *prev_entry = NULL; + sah_Head_Desc *next_entry = NULL; + + if ((q == NULL) || (entry == NULL)) { +#if defined DIAG_DRV_QUEUE && defined DIAG_DURING_INTERRUPT + LOG_KDIAG("Null pointer input."); +#endif + return; + } + + if (q->count == 1) { + /* If q is the only entry in the queue. */ + q->tail = NULL; + q->head = NULL; + q->count = 0; + } else if (q->count > 1) { + /* There are 2 or more entries in the queue. */ + +#if defined DIAG_DRV_QUEUE && defined DIAG_DURING_INTERRUPT + if ((entry->next == NULL) && (entry->prev == NULL)) { + LOG_KDIAG + ("Queue is not empty yet both next and prev pointers" + " are NULL"); + } +#endif + + if (entry->next == NULL) { + /* If this is the end of the queue */ + prev_entry = entry->prev; + prev_entry->next = NULL; + q->tail = prev_entry; + } else if (entry->prev == NULL) { + /* If this is the head of the queue */ + next_entry = entry->next; + next_entry->prev = NULL; + q->head = next_entry; + } else { + /* If this is somewhere in the middle of the queue */ + prev_entry = entry->prev; + next_entry = entry->next; + prev_entry->next = next_entry; + next_entry->prev = prev_entry; + } + q->count--; + } + /* + * Otherwise we are removing an entry from an empty queue. + * Don't do anything in the product code + */ +#if defined DIAG_DRV_QUEUE && defined DIAG_DURING_INTERRUPT + else { + LOG_KDIAG("Trying to remove an entry from an empty queue."); + } +#endif + + entry->next = NULL; + entry->prev = NULL; +} + +/* End of sah_queue.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_user.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_user.c @@ -0,0 +1,137 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_user.c + * + * This file implements user and platform capabilities functions of the FSL SHW + * API for Sahara + */ +#include "sahara.h" +#include +#include + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_get_capabilities); +EXPORT_SYMBOL(fsl_shw_register_user); +EXPORT_SYMBOL(fsl_shw_deregister_user); +EXPORT_SYMBOL(fsl_shw_get_results); +#endif /* __KERNEL__ */ + +struct cap_t { + unsigned populated; + union { + uint32_t buffer[sizeof(fsl_shw_pco_t)]; + fsl_shw_pco_t pco; + }; +}; + +static struct cap_t cap = { + 0, + {} +}; + +/* REQ-S2LRD-PINTFC-API-GEN-003 */ +/*! + * Determine the hardware security capabilities of this platform. + * + * Though a user context object is passed into this function, it will always + * act in a non-blocking manner. + * + * @param user_ctx The user context which will be used for the query. + * + * @return A pointer to the capabilities object. + */ +fsl_shw_pco_t *fsl_shw_get_capabilities(fsl_shw_uco_t * user_ctx) +{ + fsl_shw_pco_t *retval = NULL; + + if (cap.populated) { + retval = &cap.pco; + } else { + if (get_capabilities(user_ctx, &cap.pco) == FSL_RETURN_OK_S) { + cap.populated = 1; + retval = &cap.pco; + } + } + return retval; +} + +/* REQ-S2LRD-PINTFC-API-GEN-004 */ + +/*! + * Create an association between the the user and the provider of the API. + * + * @param user_ctx The user context which will be used for this association. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_register_user(fsl_shw_uco_t * user_ctx) +{ + return sah_register(user_ctx); +} + +/* REQ-S2LRD-PINTFC-API-GEN-005 */ + +/*! + * Destroy the association between the the user and the provider of the API. + * + * @param user_ctx The user context which is no longer needed. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_deregister_user(fsl_shw_uco_t * user_ctx) +{ + return sah_deregister(user_ctx); +} + +/* REQ-S2LRD-PINTFC-API-GEN-006 */ + +/*! + * Retrieve results from earlier operations. + * + * @param user_ctx The user's context. + * @param result_size The number of array elements of @a results. + * @param[in,out] results Pointer to first of the (array of) locations to + * store results. + * @param[out] result_count Pointer to store the number of results which + * were returned. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_get_results(fsl_shw_uco_t * user_ctx, + unsigned result_size, + fsl_shw_result_t results[], + unsigned *result_count) +{ + fsl_shw_return_t status; + + /* perform a sanity check on the uco */ + status = sah_validate_uco(user_ctx); + + /* if uco appears ok, build structure and pass to get results */ + if (status == FSL_RETURN_OK_S) { + sah_results arg; + + /* if requested is zero, it's done before it started */ + if (result_size > 0) { + arg.requested = result_size; + arg.actual = result_count; + arg.results = results; + /* get the results */ + status = sah_get_results(&arg, user_ctx); + } + } + + return status; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/Kconfig @@ -0,0 +1,35 @@ +menu "SAHARA2 Security Hardware Support" + +config MXC_SAHARA + tristate "Security Hardware Support (FSL SHW)" + ---help--- + Provides driver and kernel mode API for using cryptographic + accelerators. + +config MXC_SAHARA_USER_MODE + tristate "User Mode API for FSL SHW" + depends on MXC_SAHARA + ---help--- + Provides kernel driver for User Mode API. + +config MXC_SAHARA_POLL_MODE + bool "Force driver to POLL for hardware completion." + depends on MXC_SAHARA + default n + ---help--- + When this flag is yes, the driver will not use interrupts to + determine when the hardware has completed a task, but instead + will hold onto the CPU and continually poll the hardware until + it completes. + +config MXC_SAHARA_POLL_MODE_TIMEOUT + hex "Poll loop timeout" + depends on MXC_SAHARA_POLL_MODE + default "0xFFFFFFFF" + help + To avoid infinite polling, a timeout is provided. Should the + timeout be reached, a fault is reported, indicating there must + be something wrong with SAHARA, and SAHARA is reset. The loop + will exit after the given number of iterations. + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_rand.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_rand.c @@ -0,0 +1,96 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_rand.c + * + * This file implements Random Number Generation functions of the FSL SHW API + * for Sahara. + */ + +#include "sahara.h" +#include "sf_util.h" + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_get_random); +#endif + +/* REQ-S2LRD-PINTFC-API-BASIC-RNG-002 */ +/*! + * Get a random number + * + * + * @param user_ctx + * @param length + * @param data + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + SAH_SF_DCLS; + + /* perform a sanity check on the uco */ + ret = sah_validate_uco(user_ctx); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + header = SAH_HDR_RNG_GENERATE; /* Desc. #18 */ + DESC_OUT_OUT(header, length, data, 0, NULL); + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_add_entropy); +#endif + +/*! + * Add entropy to a random number generator + + * @param user_ctx + * @param length + * @param data + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data) +{ + SAH_SF_DCLS; + + /* perform a sanity check on the uco */ + ret = sah_validate_uco(user_ctx); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + header = SAH_HDR_RNG_GENERATE; /* Desc. #18 */ + + /* create descriptor #18. Generate random data */ + DESC_IN_IN(header, 0, NULL, length, data) + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_driver_interface.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_driver_interface.c @@ -0,0 +1,2179 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sah_driver_interface.c +* +* @brief Provides a Linux Kernel Module interface to the SAHARA h/w device. +* +*/ + +/* SAHARA Includes */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef FSL_HAVE_SCC +#include +#else +#include +#endif + +#ifdef DIAG_DRV_IF +#include +#endif + +#if defined(CONFIG_DEVFS_FS) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) +#include +#else +#include +#endif + +#include + +#ifdef PERF_TEST +#define interruptible_sleep_on(x) sah_Handle_Interrupt() +#endif + +#define TEST_MODE_OFF 1 +#define TEST_MODE_ON 2 + +/*! Version register on first deployments */ +#define SAHARA_VERSION2 2 +/*! Version register on MX27 */ +#define SAHARA_VERSION3 3 +/*! Version register on MXC92323 */ +#define SAHARA_VERSION4 4 + +/****************************************************************************** +* Module function declarations +******************************************************************************/ + +OS_DEV_INIT_DCL(sah_init); +OS_DEV_SHUTDOWN_DCL(sah_cleanup); +OS_DEV_OPEN_DCL(sah_open); +OS_DEV_CLOSE_DCL(sah_release); +OS_DEV_IOCTL_DCL(sah_ioctl); +OS_DEV_MMAP_DCL(sah_mmap); + +static os_error_code sah_handle_get_capabilities(fsl_shw_uco_t* user_ctx, + uint32_t info); + +static void sah_user_callback(fsl_shw_uco_t * user_ctx); +static os_error_code sah_handle_scc_sfree(fsl_shw_uco_t* user_ctx, + uint32_t info); +static os_error_code sah_handle_scc_sstatus(fsl_shw_uco_t* user_ctx, + uint32_t info); +static os_error_code sah_handle_scc_drop_perms(fsl_shw_uco_t* user_ctx, + uint32_t info); +static os_error_code sah_handle_scc_encrypt(fsl_shw_uco_t* user_ctx, + uint32_t info); +static os_error_code sah_handle_scc_decrypt(fsl_shw_uco_t* user_ctx, + uint32_t info); + +#ifdef FSL_HAVE_SCC2 +static fsl_shw_return_t register_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base, + void *kernel_base); +static fsl_shw_return_t deregister_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base); +#endif + +static os_error_code sah_handle_sk_slot_alloc(uint32_t info); +static os_error_code sah_handle_sk_slot_dealloc(uint32_t info); +static os_error_code sah_handle_sk_slot_load(uint32_t info); +static os_error_code sah_handle_sk_slot_read(uint32_t info); +static os_error_code sah_handle_sk_slot_decrypt(uint32_t info); +static os_error_code sah_handle_sk_slot_encrypt(uint32_t info); + +/*! Boolean flag for whether interrupt handler needs to be released on exit */ +static unsigned interrupt_registered; + +static int handle_sah_ioctl_dar(fsl_shw_uco_t * filp, uint32_t user_space_desc); + +#if !defined(CONFIG_DEVFS_FS) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) +static int sah_read_procfs(char *buf, + char **start, + off_t offset, int count, int *eof, void *data); + +static int sah_write_procfs(struct file *file, const char __user * buffer, + unsigned long count, void *data); +#endif + +#if defined(CONFIG_DEVFS_FS) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + +/* This is a handle to the sahara DEVFS entry. */ +static devfs_handle_t Sahara_devfs_handle; + +#else + +/* Major number assigned to our device driver */ +static int Major; + +/* This is a handle to the sahara PROCFS entry */ +static struct proc_dir_entry *Sahara_procfs_handle; + +#endif + +uint32_t sah_hw_version; + +/* This is the wait queue to this driver. Linux declaration. */ +DECLARE_WAIT_QUEUE_HEAD(Wait_queue); + +/* This is a global variable that is used to track how many times the device + * has been opened simultaneously. */ +#ifdef DIAG_DRV_IF +static int Device_in_use = 0; +#endif + +/* This is the system keystore object */ +fsl_shw_kso_t system_keystore; + +/*! + * OS-dependent handle used for registering user interface of a driver. + */ +static os_driver_reg_t reg_handle; + +#ifdef DIAG_DRV_IF +/* This is for sprintf() to use when constructing output. */ +#define DIAG_MSG_SIZE 1024 +static char Diag_msg[DIAG_MSG_SIZE]; +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)) +/** Pointer to Sahara clock information. Initialized during os_dev_init(). */ +static struct clk *sah_clk; +#endif + +/*! +******************************************************************************* +* This function gets called when the module is inserted (insmod) into the +* running kernel. +* +* @brief SAHARA device initialisation function. +* +* @return 0 on success +* @return -EBUSY if the device or proc file entry cannot be created. +* @return OS_ERROR_NO_MEMORY_S if kernel memory could not be allocated. +* @return OS_ERROR_FAIL_S if initialisation of proc entry failed +*/ +OS_DEV_INIT(sah_init) +{ + /* Status variable */ + int os_error_code = 0; + + interrupt_registered = 0; + + /* Enable the SAHARA Clocks */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA : Enabling the IPG and AHB clocks\n") +#endif /*DIAG_DRV_IF */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + mxc_clks_enable(SAHARA2_CLK); +#else + { + sah_clk = clk_get(NULL, "sahara_clk"); + if (sah_clk != ERR_PTR(ENOENT)) + clk_enable(sah_clk); + } +#endif + + /* Check for SPBA need */ +#if defined(CONFIG_ARCH_MXC91231) || defined(CONFIG_ARCH_MXC91321) + /* This needs to be a PLATFORM abstraction */ + if (spba_take_ownership(SPBA_SAHARA, SPBA_MASTER_A)) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Sahara driver could not take ownership of Sahara\n"); +#endif + os_error_code = OS_ERROR_FAIL_S; + } +#endif /* SPBA */ + + if (os_error_code == OS_ERROR_OK_S) { + sah_hw_version = sah_HW_Read_Version(); + os_printk("Sahara HW Version is 0x%08x\n", sah_hw_version); + + /* verify code and hardware are version compatible */ + if ((sah_hw_version != SAHARA_VERSION2) + && (sah_hw_version != SAHARA_VERSION3)) { + if (((sah_hw_version >> 8) & 0xff) != SAHARA_VERSION4) { + os_printk + ("Sahara HW Version was not expected value.\n"); + os_error_code = OS_ERROR_FAIL_S; + } + } + } + + if (os_error_code == OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Calling sah_Init_Mem_Map to initialise " + "memory subsystem."); +#endif + /* Do any memory-routine initialization */ + os_error_code = sah_Init_Mem_Map(); + } + + if (os_error_code == OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Calling sah_HW_Reset() to Initialise the Hardware."); +#endif + /* Initialise the hardware */ + os_error_code = sah_HW_Reset(); + if (os_error_code != OS_ERROR_OK_S) { + os_printk + ("sah_HW_Reset() failed to Initialise the Hardware.\n"); + } + + } + + if (os_error_code == OS_ERROR_OK_S) { +#if defined(CONFIG_DEVFS_FS) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + /* Register the DEVFS entry */ + Sahara_devfs_handle = devfs_register(NULL, + SAHARA_DEVICE_SHORT, + DEVFS_FL_AUTO_DEVNUM, + 0, 0, + SAHARA_DEVICE_MODE, + &Fops, NULL); + if (Sahara_devfs_handle == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("Registering the DEVFS character device failed."); +#endif /* DIAG_DRV_IF */ + os_error_code = -EBUSY; + } +#else /* CONFIG_DEVFS_FS */ + /* Create the PROCFS entry. This is used to report the assigned device + * major number back to user-space. */ +#if 1 + Sahara_procfs_handle = create_proc_entry(SAHARA_DEVICE_SHORT, 0700, /* default mode */ + NULL); /* parent dir */ + if (Sahara_procfs_handle == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Registering the PROCFS interface failed."); +#endif /* DIAG_DRV_IF */ + os_error_code = OS_ERROR_FAIL_S; + } else { + Sahara_procfs_handle->nlink = 1; + Sahara_procfs_handle->data = 0; + Sahara_procfs_handle->read_proc = sah_read_procfs; + Sahara_procfs_handle->write_proc = sah_write_procfs; + } +#endif /* #if 1 */ + } + + if (os_error_code == OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("Calling sah_Queue_Manager_Init() to Initialise the Queue " + "Manager."); +#endif + /* Initialise the Queue Manager */ + if (sah_Queue_Manager_Init() != FSL_RETURN_OK_S) { + os_error_code = -ENOMEM; + } + } +#ifndef SAHARA_POLL_MODE + if (os_error_code == OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Calling sah_Intr_Init() to Initialise the Interrupt " + "Handler."); +#endif + /* Initialise the Interrupt Handler */ + os_error_code = sah_Intr_Init(&Wait_queue); + if (os_error_code == OS_ERROR_OK_S) { + interrupt_registered = 1; + } + } +#endif /* ifndef SAHARA_POLL_MODE */ + +#ifdef SAHARA_POWER_MANAGEMENT + if (os_error_code == OS_ERROR_OK_S) { + /* set up dynamic power management (dmp) */ + os_error_code = sah_dpm_init(); + } +#endif + + if (os_error_code == OS_ERROR_OK_S) { + os_driver_init_registration(reg_handle); + os_driver_add_registration(reg_handle, OS_FN_OPEN, + OS_DEV_OPEN_REF(sah_open)); + os_driver_add_registration(reg_handle, OS_FN_IOCTL, + OS_DEV_IOCTL_REF(sah_ioctl)); + os_driver_add_registration(reg_handle, OS_FN_CLOSE, + OS_DEV_CLOSE_REF(sah_release)); + os_driver_add_registration(reg_handle, OS_FN_MMAP, + OS_DEV_MMAP_REF(sah_mmap)); + + os_error_code = + os_driver_complete_registration(reg_handle, Major, + "sahara"); + + if (os_error_code < OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Registering the regular " + "character device failed with error code: %d\n", + os_error_code); + LOG_KDIAG(Diag_msg); +#endif + } + } +#endif /* CONFIG_DEVFS_FS */ + + if (os_error_code == OS_ERROR_OK_S) { + /* set up the system keystore, using the default keystore handler */ + fsl_shw_init_keystore_default(&system_keystore); + + if (fsl_shw_establish_keystore(NULL, &system_keystore) + == FSL_RETURN_OK_S) { + os_error_code = OS_ERROR_OK_S; + } else { + os_error_code = OS_ERROR_FAIL_S; + } + + if (os_error_code != OS_ERROR_OK_S) { +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Registering the system keystore " + "failed with error code: %d\n", os_error_code); + LOG_KDIAG(Diag_msg); +#endif + } + } + + if (os_error_code != OS_ERROR_OK_S) { +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + cleanup_module(); +#else + sah_cleanup(); +#endif + } +#ifdef DIAG_DRV_IF + else { + LOG_KDIAG_ARGS("Sahara major node is %d\n", Major); + } +#endif + +/* Disabling the Clock after the driver has been registered fine. + This is done to save power when Sahara is not in use.*/ +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA : Disabling the clocks\n") +#endif /* DIAG_DRV_IF */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SAHARA2_CLK); +#else + { + if (sah_clk != ERR_PTR(ENOENT)) + clk_disable(sah_clk); + } +#endif + + os_dev_init_return(os_error_code); +} + +/*! +******************************************************************************* +* This function gets called when the module is removed (rmmod) from the running +* kernel. +* +* @brief SAHARA device clean-up function. +* +* @return void +*/ +OS_DEV_SHUTDOWN(sah_cleanup) +{ + int ret_val = 0; + + printk(KERN_ALERT "Sahara going into cleanup\n"); + + /* clear out the system keystore */ + fsl_shw_release_keystore(NULL, &system_keystore); + + /* Unregister the device */ +#if defined(CONFIG_DEVFS_FS) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)) + devfs_unregister(Sahara_devfs_handle); +#else + + if (Sahara_procfs_handle != NULL) { + remove_proc_entry(SAHARA_DEVICE_SHORT, NULL); + } + + if (Major >= 0) { + ret_val = os_driver_remove_registration(reg_handle); + } +#ifdef DIAG_DRV_IF + if (ret_val < 0) { + snprintf(Diag_msg, DIAG_MSG_SIZE, "Error while attempting to " + "unregister the device: %d\n", ret_val); + LOG_KDIAG(Diag_msg); + } +#endif + +#endif /* CONFIG_DEVFS_FS */ + sah_Queue_Manager_Close(); + +#ifndef SAHARA_POLL_MODE + if (interrupt_registered) { + sah_Intr_Release(); + interrupt_registered = 0; + } +#endif + sah_Stop_Mem_Map(); +#ifdef SAHARA_POWER_MANAGEMENT + sah_dpm_close(); +#endif + +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA : Disabling the clocks\n") +#endif /* DIAG_DRV_IF */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) + mxc_clks_disable(SAHARA2_CLK); +#else + { + if (sah_clk != ERR_PTR(ENOENT)) + clk_disable(sah_clk); + clk_put(sah_clk); + } +#endif + + os_dev_shutdown_return(OS_ERROR_OK_S); +} + +/*! +******************************************************************************* +* This function simply increments the module usage count. +* +* @brief SAHARA device open function. +* +* @param inode Part of the kernel prototype. +* @param file Part of the kernel prototype. +* +* @return 0 - Always returns 0 since any number of calls to this function are +* allowed. +* +*/ +OS_DEV_OPEN(sah_open) +{ + +#if defined(LINUX_VERSION) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)) + MOD_INC_USE_COUNT; +#endif + +#ifdef DIAG_DRV_IF + Device_in_use++; + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Incrementing module use count to: %d ", Device_in_use); + LOG_KDIAG(Diag_msg); +#endif + + os_dev_set_user_private(NULL); + + /* Return 0 to indicate success */ + os_dev_open_return(0); +} + +/*! +******************************************************************************* +* This function simply decrements the module usage count. +* +* @brief SAHARA device release function. +* +* @param inode Part of the kernel prototype. +* @param file Part of the kernel prototype. +* +* @return 0 - Always returns 0 since this function does not fail. +*/ +OS_DEV_CLOSE(sah_release) +{ + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + +#if defined(LINUX_VERSION) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)) + MOD_DEC_USE_COUNT; +#endif + +#ifdef DIAG_DRV_IF + Device_in_use--; + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Decrementing module use count to: %d ", Device_in_use); + LOG_KDIAG(Diag_msg); +#endif + + if (user_ctx != NULL) { + sah_handle_deregistration(user_ctx); + os_free_memory(user_ctx); + os_dev_set_user_private(NULL); + } + + /* Return 0 to indicate success */ + os_dev_close_return(OS_ERROR_OK_S); +} + +/*! +******************************************************************************* +* This function provides the IO Controls for the SAHARA driver. Three IO +* Controls are supported: +* +* SAHARA_HWRESET and +* SAHARA_SET_HA +* SAHARA_CHK_TEST_MODE +* +* @brief SAHARA device IO Control function. +* +* @param inode Part of the kernel prototype. +* @param filp Part of the kernel prototype. +* @param cmd Part of the kernel prototype. +* @param arg Part of the kernel prototype. +* +* @return 0 on success +* @return -EBUSY if the HA bit could not be set due to busy hardware. +* @return -ENOTTY if an unsupported IOCTL was attempted on the device. +* @return -EFAULT if put_user() fails +*/ +OS_DEV_IOCTL(sah_ioctl) +{ + int status = 0; + int test_mode; + + switch (os_dev_get_ioctl_op()) { + case SAHARA_HWRESET: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_HWRESET IOCTL."); +#endif + /* We need to reset the hardware. */ + sah_HW_Reset(); + + /* Mark all the entries in the Queue Manager's queue with state + * SAH_STATE_RESET. + */ + sah_Queue_Manager_Reset_Entries(); + + /* Wake up all sleeping write() calls. */ + wake_up_interruptible(&Wait_queue); + break; +#ifdef SAHARA_HA_ENABLED + case SAHARA_SET_HA: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SET_HA IOCTL."); +#endif /* DIAG_DRV_IF */ + if (sah_HW_Set_HA() == ERR_INTERNAL) { + status = -EBUSY; + } + break; +#endif /* SAHARA_HA_ENABLED */ + + case SAHARA_CHK_TEST_MODE: + /* load test_mode */ + test_mode = TEST_MODE_OFF; +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_CHECK_TEST_MODE IOCTL."); + test_mode = TEST_MODE_ON; +#endif /* DIAG_DRV_IF */ +#if defined(KERNEL_TEST) || defined(PERF_TEST) + test_mode = TEST_MODE_ON; +#endif /* KERNEL_TEST || PERF_TEST */ + /* copy test_mode back to user space. put_user() is Linux fn */ + /* compiler warning `register': no problem found so ignored */ + status = put_user(test_mode, (int *)os_dev_get_ioctl_arg()); + break; + + case SAHARA_DAR: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_DAR IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + if (user_ctx != NULL) { + status = + handle_sah_ioctl_dar(user_ctx, + os_dev_get_ioctl_arg + ()); + } else { + status = OS_ERROR_FAIL_S; + } + + } + break; + + case SAHARA_GET_RESULTS: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_GET_RESULTS IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + if (user_ctx != NULL) { + status = + sah_get_results_pointers(user_ctx, + os_dev_get_ioctl_arg + ()); + } else { + status = OS_ERROR_FAIL_S; + } + } + break; + + case SAHARA_REGISTER: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_REGISTER IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + if (user_ctx != NULL) { + status = OS_ERROR_FAIL_S; /* already registered */ + } else { + user_ctx = + os_alloc_memory(sizeof(fsl_shw_uco_t), + GFP_KERNEL); + if (user_ctx == NULL) { + status = OS_ERROR_NO_MEMORY_S; + } else { + /* Copy UCO from user, but only as big as the common UCO */ + if (os_copy_from_user(user_ctx, + (void *) + os_dev_get_ioctl_arg + (), + offsetof + (fsl_shw_uco_t, + result_pool))) { + status = OS_ERROR_FAIL_S; + } else { + os_dev_set_user_private + (user_ctx); + status = + sah_handle_registration + (user_ctx); + } + } + } + } + break; + + /* This ioctl cmd should disappear in favor of a close() routine. */ + case SAHARA_DEREGISTER: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_DEREGISTER IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + if (user_ctx == NULL) { + status = OS_ERROR_FAIL_S; + } else { + status = sah_handle_deregistration(user_ctx); + os_free_memory(user_ctx); + os_dev_set_user_private(NULL); + } + } + break; + case SAHARA_SCC_DROP_PERMS: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SCC_DROP_PERMS IOCTL."); +#endif /* DIAG_DRV_IF */ + { + /* drop permissions on the specified partition */ + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_scc_drop_perms(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + case SAHARA_SCC_SFREE: + /* Unmap the specified partition from the users space, and then + * free it for use by someone else. + */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SCC_SFREE IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_scc_sfree(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + case SAHARA_SCC_SSTATUS: + /* Unmap the specified partition from the users space, and then + * free it for use by someone else. + */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SCC_SSTATUS IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_scc_sstatus(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + case SAHARA_SCC_ENCRYPT: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SCC_ENCRYPT IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_scc_encrypt(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + case SAHARA_SCC_DECRYPT: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SCC_DECRYPT IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_scc_decrypt(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + case SAHARA_SK_ALLOC: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_ALLOC IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_alloc(os_dev_get_ioctl_arg()); + break; + + case SAHARA_SK_DEALLOC: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_DEALLOC IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_dealloc(os_dev_get_ioctl_arg()); + break; + + case SAHARA_SK_LOAD: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_LOAD IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_load(os_dev_get_ioctl_arg()); + break; + case SAHARA_SK_READ: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_READ IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_read(os_dev_get_ioctl_arg()); + break; + + case SAHARA_SK_SLOT_DEC: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_SLOT_DECRYPT IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_decrypt(os_dev_get_ioctl_arg()); + break; + + case SAHARA_SK_SLOT_ENC: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_SK_SLOT_ENCRYPT IOCTL."); +#endif /* DIAG_DRV_IF */ + status = sah_handle_sk_slot_encrypt(os_dev_get_ioctl_arg()); + break; + case SAHARA_GET_CAPS: +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA_GET_CAPS IOCTL."); +#endif /* DIAG_DRV_IF */ + { + fsl_shw_uco_t *user_ctx = os_dev_get_user_private(); + + status = + sah_handle_get_capabilities(user_ctx, + os_dev_get_ioctl_arg()); + } + break; + + default: +#ifdef DIAG_DRV_IF + LOG_KDIAG("Unknown SAHARA IOCTL."); +#endif /* DIAG_DRV_IF */ + status = OS_ERROR_FAIL_S; + } + + os_dev_ioctl_return(status); +} + +/* Fill in the user's capabilities structure */ +static os_error_code sah_handle_get_capabilities(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_FAIL_S; + fsl_shw_pco_t capabilities; + + status = os_copy_from_user(&capabilities, (void *)info, + sizeof(fsl_shw_pco_t)); + + if (status != OS_ERROR_OK_S) { + goto out; + } + + if (get_capabilities(user_ctx, &capabilities) == FSL_RETURN_OK_S) { + status = os_copy_to_user((void *)info, &capabilities, + sizeof(fsl_shw_pco_t)); + } + + out: + return status; +} + +#ifdef FSL_HAVE_SCC2 + +/* Find the kernel-mode address of the partition. + * This can then be passed to the SCC functions. + */ +void *lookup_user_partition(fsl_shw_uco_t * user_ctx, uint32_t user_base) +{ + /* search through the partition chain to find one that matches the user base + * address. + */ + fsl_shw_spo_t *curr = (fsl_shw_spo_t *) user_ctx->partition; + + while (curr != NULL) { + if (curr->user_base == user_base) { + return curr->kernel_base; + } + curr = (fsl_shw_spo_t *) curr->next; + } + return NULL; +} + +/* user_base: userspace base address of the partition + * kernel_base: kernel mode base address of the partition + */ +static fsl_shw_return_t register_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base, + void *kernel_base) +{ + fsl_shw_spo_t *partition_info; + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + if (user_ctx == NULL) { + goto out; + } + + partition_info = os_alloc_memory(sizeof(fsl_shw_spo_t), GFP_KERNEL); + + if (partition_info == NULL) { + goto out; + } + + /* stuff the partition info, then put it at the front of the chain */ + partition_info->user_base = user_base; + partition_info->kernel_base = kernel_base; + partition_info->next = user_ctx->partition; + + user_ctx->partition = (struct fsl_shw_spo_t *)partition_info; + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("partition with user_base=%p, kernel_base=%p registered.", + (void *)user_base, kernel_base); +#endif + + ret = FSL_RETURN_OK_S; + + out: + + return ret; +} + +/* if the partition is in the users list, remove it */ +static fsl_shw_return_t deregister_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base) +{ + fsl_shw_spo_t *curr = (fsl_shw_spo_t *) user_ctx->partition; + fsl_shw_spo_t *last = (fsl_shw_spo_t *) user_ctx->partition; + + while (curr != NULL) { + if (curr->user_base == user_base) { + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("deregister_user_partition: partition with " + "user_base=%p, kernel_base=%p deregistered.\n", + (void *)curr->user_base, curr->kernel_base); +#endif + + if (last == curr) { + user_ctx->partition = curr->next; + os_free_memory(curr); + return FSL_RETURN_OK_S; + } else { + last->next = curr->next; + os_free_memory(curr); + return FSL_RETURN_OK_S; + } + } + last = curr; + curr = (fsl_shw_spo_t *) curr->next; + } + + return FSL_RETURN_ERROR_S; +} + +#endif /* FSL_HAVE_SCC2 */ + +static os_error_code sah_handle_scc_drop_perms(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + scc_return_t scc_ret; + scc_partition_info_t partition_info; + void *kernel_base; + + status = + os_copy_from_user(&partition_info, (void *)info, + sizeof(partition_info)); + + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("_scc_drop_perms(): failed to find partition\n"); +#endif + goto out; + } + + /* call scc driver to perform the drop */ + scc_ret = scc_diminish_permissions(kernel_base, + partition_info.permissions); + if (scc_ret == SCC_RET_OK) { + status = OS_ERROR_OK_S; + } else { + status = OS_ERROR_FAIL_S; + } + + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code sah_handle_scc_sfree(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + { + scc_partition_info_t partition_info; + void *kernel_base; + int ret; + + status = + os_copy_from_user(&partition_info, (void *)info, + sizeof(partition_info)); + + /* check that the copy was successful */ + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = + lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("failed to find partition\n"); +#endif /*DIAG_DRV_IF */ + goto out; + } + + /* Unmap the memory region (see sys_munmap in mmap.c) */ + ret = unmap_user_memory(partition_info.user_base, 8192); + + /* If the memory was successfully released */ + if (ret == OS_ERROR_OK_S) { + + /* release the partition */ + scc_release_partition(kernel_base); + + /* and remove it from the users context */ + deregister_user_partition(user_ctx, + partition_info.user_base); + + status = OS_ERROR_OK_S; + } + } + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code sah_handle_scc_sstatus(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; +#ifdef FSL_HAVE_SCC2 + { + scc_partition_info_t partition_info; + void *kernel_base; + + status = + os_copy_from_user(&partition_info, (void *)info, + sizeof(partition_info)); + + /* check that the copy was successful */ + if (status != OS_ERROR_OK_S) { + goto out; + } + + /* validate that the user owns this partition, and look up its handle */ + kernel_base = + lookup_user_partition(user_ctx, partition_info.user_base); + + if (kernel_base == NULL) { + status = OS_ERROR_FAIL_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("failed to find partition\n"); +#endif /*DIAG_DRV_IF */ + goto out; + } + + partition_info.status = scc_partition_status(kernel_base); + + status = + os_copy_to_user((void *)info, &partition_info, + sizeof(partition_info)); + } + out: +#endif /* FSL_HAVE_SCC2 */ + return status; +} + +static os_error_code sah_handle_scc_encrypt(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code os_err = OS_ERROR_FAIL_S; +#ifdef FSL_HAVE_SCC2 + { + fsl_shw_return_t retval; + scc_region_t region_info; + void *page_ctx = NULL; + void *black_addr = NULL; + void *partition_base = NULL; + scc_config_t *scc_configuration; + + os_err = + os_copy_from_user(®ion_info, (void *)info, + sizeof(region_info)); + + if (os_err != OS_ERROR_OK_S) { + goto out; + } +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("partition_base: %p, offset: %i, length: %i, black data: %p", + (void *)region_info.partition_base, region_info.offset, + region_info.length, (void *)region_info.black_data); +#endif + + /* validate that the user owns this partition, and look up its handle */ + partition_base = lookup_user_partition(user_ctx, + region_info. + partition_base); + + if (partition_base == NULL) { + retval = FSL_RETURN_ERROR_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("failed to find secure partition\n"); +#endif + goto out; + } + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (region_info.offset + region_info.length > + scc_configuration->partition_size_bytes) { + retval = FSL_RETURN_ERROR_S; + goto out; + } + + /* wire down black data */ + black_addr = wire_user_memory(region_info.black_data, + region_info.length, &page_ctx); + + if (black_addr == NULL) { + retval = FSL_RETURN_ERROR_S; + goto out; + } + + retval = + do_scc_encrypt_region(NULL, partition_base, + region_info.offset, + region_info.length, black_addr, + region_info.IV, + region_info.cypher_mode); + + /* release black data */ + unwire_user_memory(&page_ctx); + + out: + if (os_err == OS_ERROR_OK_S) { + /* Return error code */ + region_info.code = retval; + os_err = + os_copy_to_user((void *)info, ®ion_info, + sizeof(region_info)); + } + } + +#endif + return os_err; +} + +static os_error_code sah_handle_scc_decrypt(fsl_shw_uco_t * user_ctx, + uint32_t info) +{ + os_error_code os_err = OS_ERROR_FAIL_S; +#ifdef FSL_HAVE_SCC2 + { + fsl_shw_return_t retval; + scc_region_t region_info; + void *page_ctx = NULL; + void *black_addr; + void *partition_base; + scc_config_t *scc_configuration; + + os_err = + os_copy_from_user(®ion_info, (void *)info, + sizeof(region_info)); + + if (os_err != OS_ERROR_OK_S) { + goto out; + } +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("partition_base: %p, offset: %i, length: %i, black data: %p", + (void *)region_info.partition_base, region_info.offset, + region_info.length, (void *)region_info.black_data); +#endif + + /* validate that the user owns this partition, and look up its handle */ + partition_base = lookup_user_partition(user_ctx, + region_info. + partition_base); + + if (partition_base == NULL) { + retval = FSL_RETURN_ERROR_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("failed to find partition\n"); +#endif + goto out; + } + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (region_info.offset + region_info.length > + scc_configuration->partition_size_bytes) { + retval = FSL_RETURN_ERROR_S; + goto out; + } + + /* wire down black data */ + black_addr = wire_user_memory(region_info.black_data, + region_info.length, &page_ctx); + + if (black_addr == NULL) { + retval = FSL_RETURN_ERROR_S; + goto out; + } + + retval = + do_scc_decrypt_region(NULL, partition_base, + region_info.offset, + region_info.length, black_addr, + region_info.IV, + region_info.cypher_mode); + + /* release black data */ + unwire_user_memory(&page_ctx); + + out: + if (os_err == OS_ERROR_OK_S) { + /* Return error code */ + region_info.code = retval; + os_err = + os_copy_to_user((void *)info, ®ion_info, + sizeof(region_info)); + } + } + +#endif /* FSL_HAVE_SCC2 */ + return os_err; +} + +/*****************************************************************************/ +/* fn get_user_smid() */ +/*****************************************************************************/ +uint32_t get_user_smid(void *proc) +{ + /* + * A real implementation would have some way to handle signed applications + * which wouild be assigned distinct SMIDs. For the reference + * implementation, we show where this would be determined (here), but + * always provide a fixed answer, thus not separating users at all. + */ + + return 0x42eaae42; +} + +/*! +******************************************************************************* +* This function implements the smalloc() function for userspace programs, by +* making a call to the SCC2 mmap() function that acquires a region of secure +* memory on behalf of the user, and then maps it into the users memory space. +* Currently, the only memory size supported is that of a single SCC2 partition. +* Requests for other sized memory regions will fail. +*/ +OS_DEV_MMAP(sah_mmap) +{ + os_error_code status = OS_ERROR_NO_MEMORY_S; + +#ifdef FSL_HAVE_SCC2 + { + scc_return_t scc_ret; + fsl_shw_return_t fsl_ret; + uint32_t partition_registered = FALSE; + + uint32_t user_base; + void *partition_base; + uint32_t smid; + scc_config_t *scc_configuration; + + int part_no = -1; + uint32_t part_phys; + + fsl_shw_uco_t *user_ctx = + (fsl_shw_uco_t *) os_dev_get_user_private(); + + /* Make sure that the user context is valid */ + if (user_ctx == NULL) { + user_ctx = + os_alloc_memory(sizeof(*user_ctx), GFP_KERNEL); + + if (user_ctx == NULL) { + status = OS_ERROR_NO_MEMORY_S; + goto out; + } + + sah_handle_registration(user_ctx); + os_dev_set_user_private(user_ctx); + } + + /* Determine the size of a secure partition */ + scc_configuration = scc_get_configuration(); + + /* Check that the memory size requested is equal to the partition + * size, and that the requested destination is on a page boundary. + */ + if (((os_mmap_user_base() % PAGE_SIZE) != 0) || + (os_mmap_memory_size() != + scc_configuration->partition_size_bytes)) { + status = OS_ERROR_BAD_ARG_S; + goto out; + } + + /* Retrieve the SMID associated with the user */ + smid = get_user_smid(user_ctx->process); + + /* Attempt to allocate a secure partition */ + scc_ret = + scc_allocate_partition(smid, &part_no, &partition_base, + &part_phys); + if (scc_ret != SCC_RET_OK) { + pr_debug + ("SCC mmap() request failed to allocate partition;" + " error %d\n", status); + status = OS_ERROR_FAIL_S; + goto out; + } + + pr_debug("scc_mmap() acquired partition %d at %08x\n", + part_no, part_phys); + + /* Record partition info in the user context */ + user_base = os_mmap_user_base(); + fsl_ret = + register_user_partition(user_ctx, user_base, + partition_base); + + if (fsl_ret != FSL_RETURN_OK_S) { + pr_debug + ("SCC mmap() request failed to register partition with user" + " context, error: %d\n", fsl_ret); + status = OS_ERROR_FAIL_S; + } + + partition_registered = TRUE; + + status = map_user_memory(os_mmap_memory_ctx(), part_phys, + os_mmap_memory_size()); + +#ifdef SHW_DEBUG + if (status == OS_ERROR_OK_S) { + LOG_KDIAG_ARGS + ("Partition allocated: user_base=%p, partition_base=%p.", + (void *)user_base, partition_base); + } +#endif + + out: + /* If there is an error it has to be handled here */ + if (status != OS_ERROR_OK_S) { + /* if the partition was registered with the user, unregister it. */ + if (partition_registered == TRUE) { + deregister_user_partition(user_ctx, user_base); + } + + /* if the partition was allocated, deallocate it */ + if (partition_base != NULL) { + scc_release_partition(partition_base); + } + } + } +#endif /* FSL_HAVE_SCC2 */ + + return status; +} + +/* Find the physical address of a key stored in the system keystore */ +fsl_shw_return_t +system_keystore_get_slot_info(uint64_t owner_id, uint32_t slot, + uint32_t * address, uint32_t * slot_size_bytes) +{ + fsl_shw_return_t retval; + void *kernel_address; + + /* First verify that the key access is valid */ + retval = system_keystore.slot_verify_access(system_keystore.user_data, + owner_id, slot); + + if (retval != FSL_RETURN_OK_S) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("verification failed"); +#endif + return retval; + } + + if (address != NULL) { +#ifdef FSL_HAVE_SCC2 + kernel_address = + system_keystore.slot_get_address(system_keystore.user_data, + slot); + (*address) = scc_virt_to_phys(kernel_address); +#else + kernel_address = + system_keystore.slot_get_address((void *)&owner_id, slot); + (*address) = (uint32_t) kernel_address; +#endif + } + + if (slot_size_bytes != NULL) { +#ifdef FSL_HAVE_SCC2 + *slot_size_bytes = + system_keystore.slot_get_slot_size(system_keystore. + user_data, slot); +#else + *slot_size_bytes = + system_keystore.slot_get_slot_size((void *)&owner_id, slot); +#endif + } + + return retval; +} + +static os_error_code sah_handle_sk_slot_alloc(uint32_t info) +{ + scc_slot_t slot_info; + os_error_code os_err; + scc_return_t scc_ret; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + if (os_err == OS_ERROR_OK_S) { + scc_ret = keystore_slot_alloc(&system_keystore, + slot_info.key_length, + slot_info.ownerid, + &slot_info.slot); + if (scc_ret == SCC_RET_OK) { + slot_info.code = FSL_RETURN_OK_S; + } else if (scc_ret == SCC_RET_INSUFFICIENT_SPACE) { + slot_info.code = FSL_RETURN_NO_RESOURCE_S; + } else { + slot_info.code = FSL_RETURN_ERROR_S; + } + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS("key length: %i, handle: %i\n", + slot_info.key_length, slot_info.slot); +#endif + + /* Return error code and slot info */ + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + + if (os_err != OS_ERROR_OK_S) { + (void)keystore_slot_dealloc(&system_keystore, + slot_info.ownerid, + slot_info.slot); + } + } + + return os_err; +} + +static os_error_code sah_handle_sk_slot_dealloc(uint32_t info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + scc_slot_t slot_info; + os_error_code os_err; + scc_return_t scc_ret; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + + if (os_err == OS_ERROR_OK_S) { + scc_ret = keystore_slot_dealloc(&system_keystore, + slot_info.ownerid, + slot_info.slot); + + if (scc_ret == SCC_RET_OK) { + ret = FSL_RETURN_OK_S; + } else { + ret = FSL_RETURN_ERROR_S; + } + slot_info.code = ret; + + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + } + + return os_err; +} + +static os_error_code sah_handle_sk_slot_load(uint32_t info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + scc_slot_t slot_info; + os_error_code os_err; + uint8_t *key = NULL; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + + if (os_err == OS_ERROR_OK_S) { + /* Allow slop in alloc in case we are rounding up to word multiple */ + key = os_alloc_memory(slot_info.key_length + 3, GFP_KERNEL); + if (key == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + os_err = OS_ERROR_NO_MEMORY_S; + } else { + os_err = os_copy_from_user(key, slot_info.key, + slot_info.key_length); + } + } + + if (os_err == OS_ERROR_OK_S) { + unsigned key_length = slot_info.key_length; + + /* Round up if necessary, as SCC call wants a multiple of 32-bit + * values for the full object being loaded. */ + if ((key_length & 3) != 0) { + key_length += 4 - (key_length & 3); + } + ret = keystore_slot_load(&system_keystore, + slot_info.ownerid, slot_info.slot, key, + key_length); + + slot_info.code = ret; + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + } + + if (key != NULL) { + memset(key, 0, slot_info.key_length); + os_free_memory(key); + } + + return os_err; +} + +static os_error_code sah_handle_sk_slot_read(uint32_t info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + scc_slot_t slot_info; + os_error_code os_err; + uint8_t *key = NULL; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + + if (os_err == OS_ERROR_OK_S) { + + /* This operation is not allowed for user keys */ + slot_info.code = FSL_RETURN_NO_RESOURCE_S; + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + + return os_err; + } + + if (os_err == OS_ERROR_OK_S) { + /* Allow slop in alloc in case we are rounding up to word multiple */ + key = os_alloc_memory(slot_info.key_length + 3, GFP_KERNEL); + if (key == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + os_err = OS_ERROR_NO_MEMORY_S; + } + } + + if (os_err == OS_ERROR_OK_S) { + unsigned key_length = slot_info.key_length; + + /* @bug Do some PERMISSIONS checking - make sure this is SW key */ + + /* Round up if necessary, as SCC call wants a multiple of 32-bit + * values for the full object being loaded. */ + if ((key_length & 3) != 0) { + key_length += 4 - (key_length & 3); + } + ret = keystore_slot_read(&system_keystore, + slot_info.ownerid, slot_info.slot, + key_length, key); + + /* @bug do some error checking */ + + /* Send key back to user */ + os_err = os_copy_to_user(slot_info.key, key, + slot_info.key_length); + + slot_info.code = ret; + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + } + + if (key != NULL) { + memset(key, 0, slot_info.key_length); + os_free_memory(key); + } + + return os_err; +} + +static os_error_code sah_handle_sk_slot_encrypt(uint32_t info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + scc_slot_t slot_info; + os_error_code os_err; + scc_return_t scc_ret; + uint8_t *key = NULL; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + + if (os_err == OS_ERROR_OK_S) { + key = os_alloc_memory(slot_info.key_length, GFP_KERNEL); + if (key == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + } + } + + if (key != NULL) { + + scc_ret = keystore_slot_encrypt(NULL, &system_keystore, + slot_info.ownerid, + slot_info.slot, + slot_info.key_length, key); + + if (scc_ret != SCC_RET_OK) { + ret = FSL_RETURN_ERROR_S; + } else { + os_err = + os_copy_to_user(slot_info.key, key, + slot_info.key_length); + if (os_err != OS_ERROR_OK_S) { + ret = FSL_RETURN_INTERNAL_ERROR_S; + } else { + ret = FSL_RETURN_OK_S; + } + } + + slot_info.code = ret; + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + + memset(key, 0, slot_info.key_length); + os_free_memory(key); + } + + return os_err; +} + +static os_error_code sah_handle_sk_slot_decrypt(uint32_t info) +{ + fsl_shw_return_t ret = FSL_RETURN_INTERNAL_ERROR_S; + scc_slot_t slot_info; /*!< decrypt request fields */ + os_error_code os_err; + scc_return_t scc_ret; + uint8_t *key = NULL; + + os_err = os_copy_from_user(&slot_info, (void *)info, sizeof(slot_info)); + + if (os_err == OS_ERROR_OK_S) { + key = os_alloc_memory(slot_info.key_length, GFP_KERNEL); + if (key == NULL) { + ret = FSL_RETURN_NO_RESOURCE_S; + os_err = OS_ERROR_OK_S; + } else { + os_err = os_copy_from_user(key, slot_info.key, + slot_info.key_length); + } + } + + if (os_err == OS_ERROR_OK_S) { + scc_ret = keystore_slot_decrypt(NULL, &system_keystore, + slot_info.ownerid, + slot_info.slot, + slot_info.key_length, key); + if (scc_ret == SCC_RET_OK) { + ret = FSL_RETURN_OK_S; + } else { + ret = FSL_RETURN_ERROR_S; + } + + slot_info.code = ret; + os_err = + os_copy_to_user((void *)info, &slot_info, + sizeof(slot_info)); + } + + if (key != NULL) { + memset(key, 0, slot_info.key_length); + os_free_memory(key); + } + + return os_err; +} + +/*! + * Register a user + * + * @brief Register a user + * + * @param user_ctx information about this user + * + * @return status code + */ +fsl_shw_return_t sah_handle_registration(fsl_shw_uco_t * user_ctx) +{ + /* Initialize the user's result pool (like sah_Queue_Construct() */ + user_ctx->result_pool.head = NULL; + user_ctx->result_pool.tail = NULL; + user_ctx->result_pool.count = 0; + + /* initialize the user's partition chain */ + user_ctx->partition = NULL; + + return FSL_RETURN_OK_S; +} + +/*! + * Deregister a user + * + * @brief Deregister a user + * + * @param user_ctx information about this user + * + * @return status code + */ +fsl_shw_return_t sah_handle_deregistration(fsl_shw_uco_t * user_ctx) +{ + /* NOTE: + * This will release any secure partitions that are held by the user. + * Encryption keys that were placed in the system keystore by the user + * should not be removed here, because they might have been shared with + * another process. The user must be careful to release any that are no + * longer in use. + */ + fsl_shw_return_t ret = FSL_RETURN_OK_S; + +#ifdef FSL_HAVE_SCC2 + fsl_shw_spo_t *partition; + struct mm_struct *mm = current->mm; + + while ((user_ctx->partition != NULL) && (ret == FSL_RETURN_OK_S)) { + + partition = user_ctx->partition; + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("Found an abandoned secure partition at %p, releasing", + partition); +#endif + + /* It appears that current->mm is not valid if this is called from a + * close routine (perhaps only if the program raised an exception that + * caused it to close?) If that is the case, then still free the + * partition, but do not remove it from the memory space (dangerous?) + */ + + if (mm == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("Warning: no mm structure found, not unmapping " + "partition from user memory\n"); +#endif + } else { + /* Unmap the memory region (see sys_munmap in mmap.c) */ + /* Note that this assumes a single memory partition */ + unmap_user_memory(partition->user_base, 8192); + } + + /* If the memory was successfully released */ + if (ret == OS_ERROR_OK_S) { + /* release the partition */ + scc_release_partition(partition->kernel_base); + + /* and remove it from the users context */ + deregister_user_partition(user_ctx, + partition->user_base); + + ret = FSL_RETURN_OK_S; + } else { + ret = FSL_RETURN_ERROR_S; + + goto out; + } + } + out: +#endif /* FSL_HAVE_SCC2 */ + + return ret; +} + +/*! + * Sets up memory to extract results from results pool + * + * @brief Sets up memory to extract results from results pool + * + * @param user_ctx information about this user + * @param[in,out] arg contains input parameters and fields that the driver + * fills in + * + * @return os error code or 0 on success + */ +int sah_get_results_pointers(fsl_shw_uco_t * user_ctx, uint32_t arg) +{ + sah_results results_arg; /* kernel mode usable version of 'arg' */ + fsl_shw_result_t *user_results; /* user mode address of results */ + unsigned *user_actual; /* user mode address of actual number of results */ + unsigned actual; /* local memory of actual number of results */ + int ret_val = OS_ERROR_FAIL_S; + sah_Head_Desc *finished_request; + unsigned int loop; + + /* copy structure from user to kernel space */ + if (!os_copy_from_user(&results_arg, (void *)arg, sizeof(sah_results))) { + /* save user space pointers */ + user_actual = results_arg.actual; /* where count goes */ + user_results = results_arg.results; /* where results goe */ + + /* Set pointer for actual value to temporary kernel memory location */ + results_arg.actual = &actual; + + /* Allocate kernel memory to hold temporary copy of the results */ + results_arg.results = + os_alloc_memory(sizeof(fsl_shw_result_t) * + results_arg.requested, GFP_KERNEL); + + /* if memory allocated, continue */ + if (results_arg.results == NULL) { + ret_val = OS_ERROR_NO_MEMORY_S; + } else { + fsl_shw_return_t get_status; + + /* get the results */ + get_status = + sah_get_results_from_pool(user_ctx, &results_arg); + + /* free the copy of the user space descriptor chain */ + for (loop = 0; loop < actual; ++loop) { + /* get sah_Head_Desc from results and put user address into + * the return structure */ + finished_request = + results_arg.results[loop].user_desc; + results_arg.results[loop].user_desc = + finished_request->user_desc; + /* return the descriptor chain memory to the block free pool */ + sah_Free_Chained_Descriptors(finished_request); + } + + /* if no errors, copy results and then the actual number of results + * back to user space + */ + if (get_status == FSL_RETURN_OK_S) { + if (os_copy_to_user + (user_results, results_arg.results, + actual * sizeof(fsl_shw_result_t)) + || os_copy_to_user(user_actual, &actual, + sizeof(user_actual))) { + ret_val = OS_ERROR_FAIL_S; + } else { + ret_val = 0; /* no error */ + } + } + /* free the allocated memory */ + os_free_memory(results_arg.results); + } + } + + return ret_val; +} + +/*! + * Extracts results from results pool + * + * @brief Extract results from results pool + * + * @param user_ctx information about this user + * @param[in,out] arg contains input parameters and fields that the + * driver fills in + * + * @return status code + */ +fsl_shw_return_t sah_get_results_from_pool(volatile fsl_shw_uco_t * user_ctx, + sah_results * arg) +{ + sah_Head_Desc *finished_request; + unsigned int loop = 0; + os_lock_context_t int_flags; + + /* Get the number of results requested, up to total number of results + * available + */ + do { + /* Protect state of user's result pool until we have retrieved and + * remove the first entry, or determined that the pool is empty. */ + os_lock_save_context(desc_queue_lock, int_flags); + finished_request = user_ctx->result_pool.head; + + if (finished_request != NULL) { + sah_Queue_Remove_Entry((sah_Queue *) & user_ctx-> + result_pool); + os_unlock_restore_context(desc_queue_lock, int_flags); + + /* Prepare to free. */ + (void)sah_DePhysicalise_Descriptors(finished_request); + + arg->results[loop].user_ref = + finished_request->user_ref; + arg->results[loop].code = finished_request->result; + arg->results[loop].detail1 = + finished_request->fault_address; + arg->results[loop].detail2 = 0; + arg->results[loop].user_desc = finished_request; + + loop++; + } else { /* finished_request is NULL */ + /* pool is empty */ + os_unlock_restore_context(desc_queue_lock, int_flags); + } + + } while ((loop < arg->requested) && (finished_request != NULL)); + + /* record number of results actually obtained */ + *arg->actual = loop; + + return FSL_RETURN_OK_S; +} + +/*! + * Converts descriptor chain to kernel space (from user space) and submits + * chain to Sahara for processing + * + * @brief Submits converted descriptor chain to sahara + * + * @param user_ctx Pointer to Kernel version of user's ctx + * @param user_space_desc user space address of descriptor chain that is + * in user space + * + * @return OS status code + */ +static int handle_sah_ioctl_dar(fsl_shw_uco_t * user_ctx, + uint32_t user_space_desc) +{ + int os_error_code = OS_ERROR_FAIL_S; + sah_Head_Desc *desc_chain_head; /* chain in kernel - virtual address */ + + /* This will re-create the linked list so that the SAHARA hardware can + * DMA on it. + */ + desc_chain_head = sah_Copy_Descriptors(user_ctx, + (sah_Head_Desc *) + user_space_desc); + + if (desc_chain_head == NULL) { + /* We may have failed due to a -EFAULT as well, but we will return + * OS_ERROR_NO_MEMORY_S since either way it is a memory related + * failure. + */ + os_error_code = OS_ERROR_NO_MEMORY_S; + } else { + fsl_shw_return_t stat; + + desc_chain_head->user_info = user_ctx; + desc_chain_head->user_desc = (sah_Head_Desc *) user_space_desc; + + if (desc_chain_head->uco_flags & FSL_UCO_BLOCKING_MODE) { +#ifdef SAHARA_POLL_MODE + sah_Handle_Poll(desc_chain_head); +#else + sah_blocking_mode(desc_chain_head); +#endif + stat = desc_chain_head->result; + /* return the descriptor chain memory to the block free pool */ + sah_Free_Chained_Descriptors(desc_chain_head); + /* Tell user how the call turned out */ + + /* Copy 'result' back up to the result member. + * + * The dereference of the different member will cause correct the + * arithmetic to occur on the user-space address because of the + * missing dma/bus locations in the user mode version of the + * sah_Desc structure. */ + os_error_code = + os_copy_to_user((void *)(user_space_desc + + offsetof(sah_Head_Desc, + uco_flags)), + &stat, sizeof(fsl_shw_return_t)); + + } else { /* not blocking mode - queue and forget */ + + if (desc_chain_head->uco_flags & FSL_UCO_CALLBACK_MODE) { + user_ctx->process = os_get_process_handle(); + user_ctx->callback = sah_user_callback; + } +#ifdef SAHARA_POLL_MODE + /* will put results in result pool */ + sah_Handle_Poll(desc_chain_head); +#else + /* just put someting in the DAR */ + sah_Queue_Manager_Append_Entry(desc_chain_head); +#endif + /* assume all went well */ + os_error_code = OS_ERROR_OK_S; + } + } + + return os_error_code; +} + +static void sah_user_callback(fsl_shw_uco_t * user_ctx) +{ + os_send_signal(user_ctx->process, SIGUSR2); +} + +/*! + * This function is called when a thread attempts to read from the /proc/sahara + * file. Upon read, statistics and information about the state of the driver + * are returned in nthe supplied buffer. + * + * @brief SAHARA PROCFS read function. + * + * @param buf Anything written to this buffer will be returned to the + * user-space process that is reading from this proc entry. + * @param start Part of the kernel prototype. + * @param offset Part of the kernel prototype. + * @param count The size of the buf argument. + * @param eof An integer which is set to one to tell the user-space + * process that there is no more data to read. + * @param data Part of the kernel prototype. + * + * @return The number of bytes written to the proc entry. + */ +#if !defined(CONFIG_DEVFS_FS) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) +static int sah_read_procfs(char *buf, + char **start, + off_t offset, int count, int *eof, void *data) +{ + int output_bytes = 0; + int in_queue_count = 0; + os_lock_context_t lock_context; + + os_lock_save_context(desc_queue_lock, lock_context); + in_queue_count = sah_Queue_Manager_Count_Entries(TRUE, 0); + os_unlock_restore_context(desc_queue_lock, lock_context); + output_bytes += snprintf(buf, count - output_bytes, "queued: %d\n", + in_queue_count); + output_bytes += snprintf(buf + output_bytes, count - output_bytes, + "Descriptors: %d, " + "Interrupts %d (%d Done1Done2, %d Done1Busy2, " + " %d Done1)\n", + dar_count, interrupt_count, done1done2_count, + done1busy2_count, done1_count); + output_bytes += snprintf(buf + output_bytes, count - output_bytes, + "Control: %08x\n", sah_HW_Read_Control()); +#if !defined(FSL_HAVE_SAHARA4) || defined(SAHARA4_NO_USE_SQUIB) + output_bytes += snprintf(buf + output_bytes, count - output_bytes, + "IDAR: %08x; CDAR: %08x\n", + sah_HW_Read_IDAR(), sah_HW_Read_CDAR()); +#endif +#ifdef DIAG_DRV_STATUS + output_bytes += snprintf(buf + output_bytes, count - output_bytes, + "Status: %08x; Error Status: %08x; Op Status: %08x\n", + sah_HW_Read_Status(), + sah_HW_Read_Error_Status(), + sah_HW_Read_Op_Status()); +#endif +#ifdef FSL_HAVE_SAHARA4 + output_bytes += snprintf(buf + output_bytes, count - output_bytes, + "MMStat: %08x; Config: %08x\n", + sah_HW_Read_MM_Status(), sah_HW_Read_Config()); +#endif + + /* Signal the end of the file */ + *eof = 1; + + /* To get rid of the unused parameter warnings */ + (void)start; + (void)data; + (void)offset; + + return output_bytes; +} + +static int sah_write_procfs(struct file *file, const char __user * buffer, + unsigned long count, void *data) +{ + + /* Any write to this file will reset all counts. */ + dar_count = interrupt_count = done1done2_count = + done1busy2_count = done1_count = 0; + + (void)file; + (void)buffer; + (void)data; + + return count; +} + +#endif + +#ifndef SAHARA_POLL_MODE +/*! + * Block user call until processing is complete. + * + * @param entry The user's request. + * + * @return An OS error code, or 0 if no error + */ +int sah_blocking_mode(sah_Head_Desc * entry) +{ + int os_error_code = 0; + sah_Queue_Status status; + + /* queue entry, put something in the DAR, if nothing is there currently */ + sah_Queue_Manager_Append_Entry(entry); + + /* get this descriptor chain's current status */ + status = ((volatile sah_Head_Desc *)entry)->status; + + while (!SAH_DESC_PROCESSED(status)) { + extern sah_Queue *main_queue; + + DEFINE_WAIT(sahara_wait); /* create a wait queue entry. Linux */ + + /* enter the wait queue entry into the queue */ + prepare_to_wait(&Wait_queue, &sahara_wait, TASK_INTERRUPTIBLE); + + /* check if this entry has been processed */ + status = ((volatile sah_Head_Desc *)entry)->status; + + if (!SAH_DESC_PROCESSED(status)) { + /* go to sleep - Linux */ + schedule(); + } + + /* un-queue the 'prepare to wait' queue? - Linux */ + finish_wait(&Wait_queue, &sahara_wait); + + /* signal belongs to this thread? */ + if (signal_pending(current)) { /* Linux */ + os_lock_context_t lock_flags; + + /* don't allow access during this check and operation */ + os_lock_save_context(desc_queue_lock, lock_flags); + status = ((volatile sah_Head_Desc *)entry)->status; + if (status == SAH_STATE_PENDING) { + sah_Queue_Remove_Any_Entry(main_queue, entry); + entry->result = FSL_RETURN_INTERNAL_ERROR_S; + ((volatile sah_Head_Desc *)entry)->status = + SAH_STATE_FAILED; + } + os_unlock_restore_context(desc_queue_lock, lock_flags); + } + + status = ((volatile sah_Head_Desc *)entry)->status; + } /* while ... */ + + /* Do this so that caller can free */ + (void)sah_DePhysicalise_Descriptors(entry); + + return os_error_code; +} + +/*! + * If interrupt does not return in a reasonable time, time out, trigger + * interrupt, and continue with process + * + * @param data ignored + */ +void sahara_timeout_handler(unsigned long data) +{ + /* Sahara has not issuing an interrupt, so timed out */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("Sahara HW did not respond. Resetting.\n"); +#endif + /* assume hardware needs resetting */ + sah_Handle_Interrupt(SAH_EXEC_FAULT); + /* wake up sleeping thread to try again */ + wake_up_interruptible(&Wait_queue); +} + +#endif /* ifndef SAHARA_POLL_MODE */ + +/* End of sah_driver_interface.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_memory_mapper.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_memory_mapper.c @@ -0,0 +1,2349 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sah_memory_mapper.c +* +* @brief Re-creates SAHARA data structures in Kernel memory such that they are +* suitable for DMA. Provides support for kernel API. +* +* This file needs to be ported. +* +* The memory mapper gets a call at #sah_Init_Mem_Map() during driver +* initialization. +* +* The routine #sah_Copy_Descriptors() is used to bring descriptor chains from +* user memory down to kernel memory, relink using physical addresses, and make +* sure that all user data will be accessible by the Sahara DMA. +* #sah_Destroy_Descriptors() does the inverse. +* +* The #sah_Alloc_Block(), #sah_Free_Block(), and #sah_Block_Add_Page() routines +* implement a cache of free blocks used when allocating descriptors and links +* within the kernel. +* +* The memory mapper gets a call at #sah_Stop_Mem_Map() during driver shutdown. +* +*/ + +#include +#include +#include +#include +#ifdef FSL_HAVE_SCC2 +#include +#else +#include +#endif + +#if defined(DIAG_DRV_IF) || defined(DIAG_MEM) || defined(DO_DBG) +#include +#include +#endif + +#include /* get_user_pages() */ +#include +#include + +#include +#include + +#if defined(DIAG_MEM) || defined(DIAG_DRV_IF) +#define DIAG_MSG_SIZE 1024 +static char Diag_msg[DIAG_MSG_SIZE]; +#endif + +#ifdef LINUX_VERSION_CODE +#define FLUSH_SPECIFIC_DATA_ONLY +#else +#define SELF_MANAGED_POOL +#endif + +#if defined(LINUX_VERSION_CODE) +EXPORT_SYMBOL(sah_Alloc_Link); +EXPORT_SYMBOL(sah_Free_Link); +EXPORT_SYMBOL(sah_Alloc_Descriptor); +EXPORT_SYMBOL(sah_Free_Descriptor); +EXPORT_SYMBOL(sah_Alloc_Head_Descriptor); +EXPORT_SYMBOL(sah_Free_Head_Descriptor); +EXPORT_SYMBOL(sah_Physicalise_Descriptors); +EXPORT_SYMBOL(sah_DePhysicalise_Descriptors); +#endif + +/* Determine if L2 cache support should be built in. */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) +#ifdef CONFIG_OUTER_CACHE +#define HAS_L2_CACHE +#endif +#else +#ifdef CONFIG_CPU_CACHE_L210 +#define HAS_L2_CACHE +#endif +#endif + +/* Number of bytes the hardware uses out of sah_Link and sah_*Desc structs */ +#define SAH_HW_LINK_LEN 1 +#define SAH_HW_DESC_LEN 24 + +/* Macros for Descriptors */ +#define SAH_LLO_BIT 0x01000000 +#define sah_Desc_Get_LLO(desc) (desc->header & SAH_LLO_BIT) +#define sah_Desc_Set_Header(desc, h) (desc->header = (h)) + +#define sah_Desc_Get_Next(desc) (desc->next) +#define sah_Desc_Set_Next(desc, n) (desc->next = (n)) + +#define sah_Desc_Get_Ptr1(desc) (desc->ptr1) +#define sah_Desc_Get_Ptr2(desc) (desc->ptr2) +#define sah_Desc_Set_Ptr1(desc,p1) (desc->ptr1 = (p1)) +#define sah_Desc_Set_Ptr2(desc,p2) (desc->ptr2 = (p2)) + +#define sah_Desc_Get_Len1(desc) (desc->len1) +#define sah_Desc_Get_Len2(desc) (desc->len2) +#define sah_Desc_Set_Len1(desc,l1) (desc->len1 = (l1)) +#define sah_Desc_Set_Len2(desc,l2) (desc->len2 = (l2)) + +/* Macros for Links */ +#define sah_Link_Get_Next(link) (link->next) +#define sah_Link_Set_Next(link, n) (link->next = (n)) + +#define sah_Link_Get_Data(link) (link->data) +#define sah_Link_Set_Data(link,d) (link->data = (d)) + +#define sah_Link_Get_Len(link) (link->len) +#define sah_Link_Set_Len(link, l) (link->len = (l)) + +#define sah_Link_Get_Flags(link) (link->flags) + +/* Memory block defines */ +/* Warning! This assumes that kernel version of sah_Link + * is larger than kernel version of sah_Desc. + */ +#define MEM_BLOCK_SIZE sizeof(sah_Link) + +/*! Structure for link/descriptor memory blocks in internal pool */ +typedef struct mem_block { + uint8_t data[MEM_BLOCK_SIZE]; /*!< the actual buffer area */ + struct mem_block *next; /*!< next block when in free chain */ + dma_addr_t dma_addr; /*!< physical address of @a data */ +} Mem_Block; + +#define MEM_BLOCK_ENTRIES (PAGE_SIZE / sizeof(Mem_Block)) + +#define MEM_BIG_BLOCK_SIZE sizeof(sah_Head_Desc) + +/*! Structure for head descriptor memory blocks in internal pool */ +typedef struct mem_big_block { + uint8_t data[MEM_BIG_BLOCK_SIZE]; /*!< the actual buffer area */ + struct mem_big_block *next; /*!< next block when in free chain */ + uint32_t dma_addr; /*!< physical address of @a data */ +} Mem_Big_Block; + +#define MEM_BIG_BLOCK_ENTRIES (PAGE_SIZE / sizeof(Mem_Big_Block)) + +/* Shared variables */ + +/*! + * Lock to protect the memory chain composed of #block_free_head and + * #block_free_tail. + */ +static os_lock_t mem_lock; + +#ifndef SELF_MANAGED_POOL +static struct dma_pool *big_dma_pool = NULL; +static struct dma_pool *small_dma_pool = NULL; +#endif + +#ifdef SELF_MANAGED_POOL +/*! + * Memory block free pool - pointer to first block. Chain is protected by + * #mem_lock. + */ +static Mem_Block *block_free_head = NULL; +/*! + * Memory block free pool - pointer to last block. Chain is protected by + * #mem_lock. + */ +static Mem_Block *block_free_tail = NULL; +/*! + * Memory block free pool - pointer to first block. Chain is protected by + * #mem_lock. + */ +static Mem_Big_Block *big_block_free_head = NULL; +/*! + * Memory block free pool - pointer to last block. Chain is protected by + * #mem_lock. +a */ +static Mem_Big_Block *big_block_free_tail = NULL; +#endif /* SELF_MANAGED_POOL */ + +static Mem_Block *sah_Alloc_Block(void); +static void sah_Free_Block(Mem_Block * block); +static Mem_Big_Block *sah_Alloc_Big_Block(void); +static void sah_Free_Big_Block(Mem_Big_Block * block); +#ifdef SELF_MANAGED_POOL +static void sah_Append_Block(Mem_Block * block); +static void sah_Append_Big_Block(Mem_Big_Block * block); +#endif /* SELF_MANAGED_POOL */ + +/* Page context structure. Used by wire_user_memory and unwire_user_memory */ +typedef struct page_ctx_t { + uint32_t count; + struct page **local_pages; +} page_ctx_t; + +/*! +******************************************************************************* +* Map and wire down a region of user memory. +* +* +* @param address Userspace address of the memory to wire +* @param length Length of the memory region to wire +* @param page_ctx Page context, to be passed to unwire_user_memory +* +* @return (if successful) Kernel virtual address of the wired pages +*/ +void *wire_user_memory(void *address, uint32_t length, void **page_ctx) +{ + void *kernel_black_addr = NULL; + int result = -1; + int page_index = 0; + page_ctx_t *page_context; + int nr_pages = 0; + unsigned long start_page; + fsl_shw_return_t status; + + /* Determine the number of pages being used for this link */ + nr_pages = (((unsigned long)(address) & ~PAGE_MASK) + + length + ~PAGE_MASK) >> PAGE_SHIFT; + + start_page = (unsigned long)(address) & PAGE_MASK; + + /* Allocate some memory to keep track of the wired user pages, so that + * they can be deallocated later. The block of memory will contain both + * the structure and the array of pages. + */ + page_context = kmalloc(sizeof(page_ctx_t) + + nr_pages * sizeof(struct page *), GFP_KERNEL); + + if (page_context == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; /* no memory! */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("kmalloc() failed."); +#endif + return NULL; + } + + /* Set the page pointer to point to the allocated region of memory */ + page_context->local_pages = (void *)page_context + sizeof(page_ctx_t); + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS("page_context at: %p, local_pages at: %p", + (void *)page_context, + (void *)(page_context->local_pages)); +#endif + + /* Wire down the pages from user space */ + down_read(¤t->mm->mmap_sem); + result = get_user_pages(current, current->mm, + start_page, nr_pages, WRITE, 0 /* noforce */ , + (page_context->local_pages), NULL); + up_read(¤t->mm->mmap_sem); + + if (result < nr_pages) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("get_user_pages() failed."); +#endif + if (result > 0) { + for (page_index = 0; page_index < result; page_index++) { + page_cache_release((page_context-> + local_pages[page_index])); + } + + kfree(page_context); + } + return NULL; + } + + kernel_black_addr = page_address(page_context->local_pages[0]) + + ((unsigned long)address & ~PAGE_MASK); + + page_context->count = nr_pages; + *page_ctx = page_context; + + return kernel_black_addr; +} + +/*! +******************************************************************************* +* Release and unmap a region of user memory. +* +* @param page_ctx Page context from wire_user_memory +*/ +void unwire_user_memory(void **page_ctx) +{ + int page_index = 0; + struct page_ctx_t *page_context = *page_ctx; + +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS("page_context at: %p, first page at:%p, count: %i", + (void *)page_context, + (void *)(page_context->local_pages), + page_context->count); +#endif + + if ((page_context != NULL) && (page_context->local_pages != NULL)) { + for (page_index = 0; page_index < page_context->count; + page_index++) { + page_cache_release(page_context-> + local_pages[page_index]); + } + + kfree(page_context); + *page_ctx = NULL; + } +} + +/*! +******************************************************************************* +* Map some physical memory into a users memory space +* +* @param vma Memory structure to map to +* @param physical_addr Physical address of the memory to be mapped in +* @param size Size of the memory to map (bytes) +* +* @return +*/ +os_error_code +map_user_memory(struct vm_area_struct *vma, uint32_t physical_addr, + uint32_t size) +{ + os_error_code retval; + + /* Map the acquired partition into the user's memory space */ + vma->vm_end = vma->vm_start + size; + + /* set cache policy to uncached so that each write of the UMID and + * permissions get directly to the SCC2 in order to engage it + * properly. Once the permissions have been written, it may be + * useful to provide a service for the user to request a different + * cache policy + */ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Make sure that the user cannot fork() a child which will inherit + * this mapping, as it creates a security hole. Likewise, do not + * allow the user to 'expand' his mapping beyond this partition. + */ + vma->vm_flags |= VM_IO | VM_RESERVED | VM_DONTCOPY | VM_DONTEXPAND; + + retval = remap_pfn_range(vma, + vma->vm_start, + __phys_to_pfn(physical_addr), + size, vma->vm_page_prot); + + return retval; +} + +/*! +******************************************************************************* +* Remove some memory from a user's memory space +* +* @param user_addr Userspace address of the memory to be unmapped +* @param size Size of the memory to map (bytes) +* +* @return +*/ +os_error_code unmap_user_memory(uint32_t user_addr, uint32_t size) +{ + os_error_code retval; + struct mm_struct *mm = current->mm; + + /* Unmap the memory region (see sys_munmap in mmap.c) */ + down_write(&mm->mmap_sem); + retval = do_munmap(mm, (unsigned long)user_addr, size); + up_write(&mm->mmap_sem); + + return retval; +} + +/*! +******************************************************************************* +* Free descriptor back to free pool +* +* @brief Free descriptor +* +* @param desc A descriptor allocated with sah_Alloc_Descriptor(). +* +* @return none +* +*/ +void sah_Free_Descriptor(sah_Desc * desc) +{ + memset(desc, 0x45, sizeof(*desc)); + sah_Free_Block((Mem_Block *) desc); +} + +/*! +******************************************************************************* +* Free Head descriptor back to free pool +* +* @brief Free Head descriptor +* +* @param desc A Head descriptor allocated with sah_Alloc_Head_Descriptor(). +* +* @return none +* +*/ +void sah_Free_Head_Descriptor(sah_Head_Desc * desc) +{ + memset(desc, 0x43, sizeof(*desc)); + sah_Free_Big_Block((Mem_Big_Block *) desc); +} + +/*! +******************************************************************************* +* Free link back to free pool +* +* @brief Free link +* +* @param link A link allocated with sah_Alloc_Link(). +* +* @return none +* +*/ +void sah_Free_Link(sah_Link * link) +{ + memset(link, 0x41, sizeof(*link)); + sah_Free_Block((Mem_Block *) link); +} + +/*! +******************************************************************************* +* This function runs through a descriptor chain pointed to by a user-space +* address. It duplicates each descriptor in Kernel space memory and calls +* sah_Copy_Links() to handle any links attached to the descriptors. This +* function cleans-up everything that it created in the case of a failure. +* +* @brief Kernel Descriptor Chain Copier +* +* @param fsl_shw_uco_t The user context to act under +* @param user_head_desc A Head Descriptor pointer from user-space. +* +* @return sah_Head_Desc * - A virtual address of the first descriptor in the +* chain. +* @return NULL - If there was some error. +* +*/ +sah_Head_Desc *sah_Copy_Descriptors(fsl_shw_uco_t * user_ctx, + sah_Head_Desc * user_head_desc) +{ + sah_Desc *curr_desc = NULL; + sah_Desc *prev_desc = NULL; + sah_Desc *next_desc = NULL; + sah_Head_Desc *head_desc = NULL; + sah_Desc *user_desc = NULL; + unsigned long result; + + /* Internal status variable to be used in this function */ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Head_Desc *ret_val = NULL; + + /* This will be set to True when we have finished processing our + * descriptor chain. + */ + int drv_if_done = FALSE; + int is_this_the_head = TRUE; + + do { + /* Allocate memory for this descriptor */ + if (is_this_the_head) { + head_desc = + (sah_Head_Desc *) sah_Alloc_Head_Descriptor(); + +#ifdef DIAG_MEM + sprintf(Diag_msg, + "Alloc_Head_Descriptor returned %p\n", + head_desc); + LOG_KDIAG(Diag_msg); +#endif + if (head_desc == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("sah_Alloc_Head_Descriptor() failed."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_NO_RESOURCE_S; + } else { + void *virt_addr = head_desc->desc.virt_addr; + dma_addr_t dma_addr = head_desc->desc.dma_addr; + + /* Copy the head descriptor from user-space */ + /* Instead of copying the whole structure, + * unneeded bits at the end are left off. + * The user space version is missing virt/dma addrs, which + * means that the copy will be off for flags... */ + result = copy_from_user(head_desc, + user_head_desc, + (sizeof(*head_desc) - + sizeof(head_desc->desc. + dma_addr) - + sizeof(head_desc->desc. + virt_addr) - + sizeof(head_desc->desc. + original_ptr1) - +/* sizeof(head_desc->desc.original_ptr2) - + sizeof(head_desc->status) - + sizeof(head_desc->error_status) - + sizeof(head_desc->fault_address) - + sizeof(head_desc->current_dar) - + sizeof(head_desc->result) - + sizeof(head_desc->next) - + sizeof(head_desc->prev) - + sizeof(head_desc->user_desc) - +*/ sizeof(head_desc->out1_ptr) - + sizeof(head_desc-> + out2_ptr) - + sizeof(head_desc-> + out_len))); + /* there really isn't a 'next' descriptor at this point, so + * set that pointer to NULL, but remember it for if/when there + * is a next */ + next_desc = head_desc->desc.next; + head_desc->desc.next = NULL; + + if (result != 0) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("copy_from_user() failed."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_INTERNAL_ERROR_S; + /* when destroying the descriptor, skip these links. + * They've not been copied down, so don't exist */ + head_desc->desc.ptr1 = NULL; + head_desc->desc.ptr2 = NULL; + + } else { + /* The kernel DESC has five more words than user DESC, so + * the missing values are in the middle of the HEAD DESC, + * causing values after the missing ones to be at different + * offsets in kernel and user space. + * + * Patch up the problem by moving field two spots. + * This assumes sizeof(pointer) == sizeof(uint32_t). + * Note that 'user_info' is not needed, so not copied. + */ + head_desc->user_ref = + (uint32_t) head_desc->desc.dma_addr; + head_desc->uco_flags = + (uint32_t) head_desc->desc. + original_ptr1; +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS( + "User flags: %x; User Reference: %x", + head_desc->uco_flags, + head_desc->user_ref); +#endif + /* These values were destroyed by the copy. */ + head_desc->desc.virt_addr = virt_addr; + head_desc->desc.dma_addr = dma_addr; + + /* ensure that the save descriptor chain bit is not set. + * the copy of the user space descriptor chain should + * always be deleted */ + head_desc->uco_flags &= + ~FSL_UCO_SAVE_DESC_CHAIN; + + curr_desc = (sah_Desc *) head_desc; + is_this_the_head = FALSE; + } + } + } else { /* not head */ + curr_desc = sah_Alloc_Descriptor(); +#ifdef DIAG_MEM + LOG_KDIAG_ARGS("Alloc_Descriptor returned %p\n", + curr_desc); +#endif + if (curr_desc == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Alloc_Descriptor() failed."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_NO_RESOURCE_S; + } else { + /* need to update the previous descriptors' next field to + * pointer to the current descriptor. */ + prev_desc->original_next = curr_desc; + prev_desc->next = + (sah_Desc *) curr_desc->dma_addr; + + /* Copy the current descriptor from user-space */ + /* The virtual address and DMA address part of the sah_Desc + * struct are not copied to user space */ + result = copy_from_user(curr_desc, user_desc, (sizeof(sah_Desc) - sizeof(dma_addr_t) - /* dma_addr */ + sizeof(uint32_t) - /* virt_addr */ + sizeof(void *) - /* original_ptr1 */ + sizeof(void *) - /* original_ptr2 */ + sizeof(sah_Desc **))); /* original_next */ + /* there really isn't a 'next' descriptor at this point, so + * set that pointer to NULL, but remember it for if/when there + * is a next */ + next_desc = curr_desc->next; + curr_desc->next = NULL; + curr_desc->original_next = NULL; + + if (result != 0) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("copy_from_user() failed."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_INTERNAL_ERROR_S; + /* when destroying the descriptor chain, skip these links. + * They've not been copied down, so don't exist */ + curr_desc->ptr1 = NULL; + curr_desc->ptr2 = NULL; + } + } + } /* end if (is_this_the_head) */ + + if (status == FSL_RETURN_OK_S) { + if (!(curr_desc->header & SAH_LLO_BIT)) { + /* One or both pointer fields being NULL is a valid + * configuration. */ + if (curr_desc->ptr1 == NULL) { + curr_desc->original_ptr1 = NULL; + } else { + /* pointer fields point to sah_Link structures */ + curr_desc->original_ptr1 = + sah_Copy_Links(user_ctx, curr_desc->ptr1); + if (curr_desc->original_ptr1 == NULL) { + /* This descriptor and any links created successfully + * are cleaned-up at the bottom of this function. */ + drv_if_done = TRUE; + status = + FSL_RETURN_INTERNAL_ERROR_S; + /* mark that link 2 doesn't exist */ + curr_desc->ptr2 = NULL; +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("sah_Copy_Links() failed."); +#endif + } else { + curr_desc->ptr1 = (void *) + ((sah_Link *) curr_desc-> + original_ptr1)->dma_addr; + } + } + + if (status == FSL_RETURN_OK_S) { + if (curr_desc->ptr2 == NULL) { + curr_desc->original_ptr2 = NULL; + } else { + /* pointer fields point to sah_Link structures */ + curr_desc->original_ptr2 = + sah_Copy_Links(user_ctx, curr_desc->ptr2); + if (curr_desc->original_ptr2 == + NULL) { + /* This descriptor and any links created + * successfully are cleaned-up at the bottom of + * this function. */ + drv_if_done = TRUE; + status = + FSL_RETURN_INTERNAL_ERROR_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("sah_Copy_Links() failed."); +#endif + } else { + curr_desc->ptr2 = + (void + *)(((sah_Link *) + curr_desc-> + original_ptr2) + ->dma_addr); + } + } + } + } else { + /* Pointer fields point directly to user buffers. We don't + * support this mode. + */ +#ifdef DIAG_DRV_IF + LOG_KDIAG + ("The LLO bit in the Descriptor Header field was " + "set. This an invalid configuration."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_INTERNAL_ERROR_S; + } + } + + if (status == FSL_RETURN_OK_S) { + user_desc = next_desc; + prev_desc = curr_desc; + if (user_desc == NULL) { + /* We have reached the end our our descriptor chain */ + drv_if_done = TRUE; + } + } + + } while (drv_if_done == FALSE); + + if (status != FSL_RETURN_OK_S) { + /* Clean-up if failed */ + if (head_desc != NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Error! Calling destroy descriptors!\n"); +#endif + sah_Destroy_Descriptors(head_desc); + } + ret_val = NULL; + } else { + /* Flush the caches */ +#ifndef FLUSH_SPECIFIC_DATA_ONLY + os_flush_cache_all(); +#endif + + /* Success. Return the DMA'able head descriptor. */ + ret_val = head_desc; + + } + + return ret_val; +} /* sah_Copy_Descriptors() */ + +/*! +******************************************************************************* +* This function runs through a sah_Link chain pointed to by a kernel-space +* address. It computes the physical address for each pointer, and converts +* the chain to use these physical addresses. +* +****** +* This function needs to return some indication that the chain could not be +* converted. It also needs to back out any conversion already taken place on +* this chain of links. +* +* Then, of course, sah_Physicalise_Descriptors() will need to recognize that +* an error occured, and then be able to back out any physicalization of the +* chain which had taken place up to that point! +****** +* +* @brief Convert kernel Link chain +* +* @param first_link A sah_Link pointer from kernel space; must not be +* NULL, so error case can be distinguished. +* +* @return sah_Link * A dma'able address of the first descriptor in the +* chain. +* @return NULL If Link chain could not be physicalised, i.e. ERROR +* +*/ +sah_Link *sah_Physicalise_Links(sah_Link * first_link) +{ + sah_Link *link = first_link; + + while (link != NULL) { +#ifdef DO_DBG + sah_Dump_Words("Link", (unsigned *)link, link->dma_addr, 3); +#endif + link->vm_info = NULL; + + /* need to retrieve stored key? */ + if (link->flags & SAH_STORED_KEY_INFO) { + uint32_t max_len = 0; /* max slot length */ + fsl_shw_return_t ret_status; + + /* get length and physical address of stored key */ + ret_status = system_keystore_get_slot_info(link->ownerid, link->slot, (uint32_t *) & link->data, /* RED key address */ + &max_len); + if ((ret_status != FSL_RETURN_OK_S) || (link->len > max_len)) { + /* trying to illegally/incorrectly access a key. Cause the + * error status register to show a Link Length Error by + * putting a zero in the links length. */ + link->len = 0; /* Cause error. Somebody is up to no good. */ + } + } else if (link->flags & SAH_IN_USER_KEYSTORE) { + +#ifdef FSL_HAVE_SCC2 + /* The data field points to the virtual address of the key. Convert + * this to a physical address by modifying the address based + * on where the secure memory was mapped to the kernel. Note: In + * kernel mode, no attempt is made to track or control who owns what + * memory partition. + */ + link->data = (uint8_t *) scc_virt_to_phys(link->data); + + /* Do bounds checking to ensure that the user is not overstepping + * the bounds of their partition. This is a simple implementation + * that assumes the user only owns one partition. It only checks + * to see if the address of the last byte of data steps over a + * page boundary. + */ + +#ifdef DO_DBG + LOG_KDIAG_ARGS("start page: %08x, end page: %08x" + "first addr: %p, last addr: %p, len; %i", + ((uint32_t) (link->data) >> PAGE_SHIFT), + (((uint32_t) link->data + + link->len) >> PAGE_SHIFT), link->data, + link->data + link->len, link->len); +#endif + + if ((((uint32_t) link->data + + link->len) >> PAGE_SHIFT) != + ((uint32_t) link->data >> PAGE_SHIFT)) { + link->len = 0; /* Cause error. Somebody is up to no good. */ + } +#else /* FSL_HAVE_SCC2 */ + + /* User keystores are not valid on non-SCC2 platforms */ + link->len = 0; /* Cause error. Somebody is up to no good. */ + +#endif /* FSL_HAVE_SCC2 */ + + } else { + if (!(link->flags & SAH_PREPHYS_DATA)) { + link->original_data = link->data; + + /* All pointers are virtual right now */ + link->data = (void *)os_pa(link->data); +#ifdef DO_DBG + os_printk("%sput: %p (%d)\n", + (link-> + flags & SAH_OUTPUT_LINK) ? "out" : + "in", link->data, link->len); +#endif + + if (link->flags & SAH_OUTPUT_LINK) { + /* clean and invalidate */ + os_cache_flush_range(link-> + original_data, + link->len); + } else { + os_cache_clean_range(link->original_data, + link->len); + } + } /* not prephys */ + } /* else not key reference */ + +#if defined(NO_OUTPUT_1K_CROSSING) || defined(NO_1K_CROSSING) + if ( +#ifdef NO_OUTPUT_1K_CROSSING + /* Insert extra link if 1k boundary on output pointer + * crossed not at an 8-word boundary */ + (link->flags & SAH_OUTPUT_LINK) && + (((uint32_t) link->data % 32) != 0) && +#endif + ((((uint32_t) link->data & 1023) + link->len) > + 1024)) { + uint32_t full_length = link->len; + sah_Link *new_link = sah_Alloc_Link(); + link->len = 1024 - ((uint32_t) link->data % 1024); + new_link->len = full_length - link->len; + new_link->data = link->data + link->len; + new_link->original_data = + link->original_data + link->len; + new_link->flags = link->flags & ~(SAH_OWNS_LINK_DATA); + new_link->flags |= SAH_LINK_INSERTED_LINK; + new_link->next = link->next; + + link->next = (sah_Link *) new_link->dma_addr; + link->original_next = new_link; + link = new_link; + } +#endif /* ALLOW_OUTPUT_1K_CROSSING */ + + link->original_next = link->next; + if (link->next != NULL) { + link->next = (sah_Link *) link->next->dma_addr; + } +#ifdef DO_DBG + sah_Dump_Words("Link", link, link->dma_addr, 3); +#endif + + link = link->original_next; + } + + return (sah_Link *) first_link->dma_addr; +} /* sah_Physicalise_Links */ + +/*! + * Run through descriptors and links created by KM-API and set the + * dma addresses and 'do not free' flags. + * + * @param first_desc KERNEL VIRTUAL address of first descriptor in chain. + * + * Warning! This ONLY works without LLO flags in headers!!! + * + * @return Virtual address of @a first_desc. + * @return NULL if Descriptor Chain could not be physicalised + */ +sah_Head_Desc *sah_Physicalise_Descriptors(sah_Head_Desc * first_desc) +{ + sah_Desc *desc = &first_desc->desc; + + if (!(first_desc->uco_flags & FSL_UCO_CHAIN_PREPHYSICALIZED)) { + while (desc != NULL) { + sah_Desc *next_desc; + +#ifdef DO_DBG + + sah_Dump_Words("Desc", (unsigned *)desc, desc->dma_addr, 6); +#endif + + desc->original_ptr1 = desc->ptr1; + if (desc->ptr1 != NULL) { + if ((desc->ptr1 = + sah_Physicalise_Links(desc->ptr1)) == + NULL) { + /* Clean up ... */ + sah_DePhysicalise_Descriptors + (first_desc); + first_desc = NULL; + break; + } + } + desc->original_ptr2 = desc->ptr2; + if (desc->ptr2 != NULL) { + if ((desc->ptr2 = + sah_Physicalise_Links(desc->ptr2)) == + NULL) { + /* Clean up ... */ + sah_DePhysicalise_Descriptors + (first_desc); + first_desc = NULL; + break; + } + } + + desc->original_next = desc->next; + next_desc = desc->next; /* save for bottom of while loop */ + if (desc->next != NULL) { + desc->next = (sah_Desc *) desc->next->dma_addr; + } + + desc = next_desc; + } + } + /* not prephysicalized */ +#ifdef DO_DBG + os_printk("Physicalise finished\n"); +#endif + + return first_desc; +} /* sah_Physicalise_Descriptors() */ + +/*! +******************************************************************************* +* This function runs through a sah_Link chain pointed to by a physical address. +* It computes the virtual address for each pointer +* +* @brief Convert physical Link chain +* +* @param first_link A kernel address of a sah_Link +* +* @return sah_Link * A kernal address for the link chain of @c first_link +* @return NULL If there was some error. +* +* @post All links will be chained together by original virtual addresses, +* data pointers will point to virtual addresses. Appropriate cache +* lines will be flushed, memory unwired, etc. +*/ +sah_Link *sah_DePhysicalise_Links(sah_Link * first_link) +{ + sah_Link *link = first_link; + sah_Link *prev_link = NULL; + + /* Loop on virtual link pointer */ + while (link != NULL) { + +#ifdef DO_DBG + sah_Dump_Words("Link", (unsigned *)link, link->dma_addr, 3); +#endif + + /* if this references stored keys, don't want to dephysicalize them */ + if (!(link->flags & SAH_STORED_KEY_INFO) + && !(link->flags & SAH_PREPHYS_DATA) + && !(link->flags & SAH_IN_USER_KEYSTORE)) { + + /* */ + if (link->flags & SAH_OUTPUT_LINK) { + os_cache_inv_range(link->original_data, + link->len); + } + + /* determine if there is a page in user space associated with this + * link */ + if (link->vm_info != NULL) { + /* check that this isn't reserved and contains output */ + if (!PageReserved(link->vm_info) && + (link->flags & SAH_OUTPUT_LINK)) { + + /* Mark to force page eventually to backing store */ + SetPageDirty(link->vm_info); + } + + /* Untie this page from physical memory */ + page_cache_release(link->vm_info); + } else { + /* kernel-mode data */ +#ifdef DO_DBG + os_printk("%sput: %p (%d)\n", + (link-> + flags & SAH_OUTPUT_LINK) ? "out" : + "in", link->original_data, link->len); +#endif + } + link->data = link->original_data; + } +#ifndef ALLOW_OUTPUT_1K_CROSSING + if (link->flags & SAH_LINK_INSERTED_LINK) { + /* Reconsolidate data by merging this link with previous */ + prev_link->len += link->len; + prev_link->next = link->next; + prev_link->original_next = link->original_next; + sah_Free_Link(link); + link = prev_link; + + } +#endif + + if (link->next != NULL) { + link->next = link->original_next; + } + prev_link = link; + link = link->next; + } + + return first_link; +} /* sah_DePhysicalise_Links() */ + +/*! + * Run through descriptors and links that have been Physicalised + * (sah_Physicalise_Descriptors function) and set the dma addresses back + * to KM virtual addresses + * + * @param first_desc Kernel virtual address of first descriptor in chain. + * + * Warning! This ONLY works without LLO flags in headers!!! + */ +sah_Head_Desc *sah_DePhysicalise_Descriptors(sah_Head_Desc * first_desc) +{ + sah_Desc *desc = &first_desc->desc; + + if (!(first_desc->uco_flags & FSL_UCO_CHAIN_PREPHYSICALIZED)) { + while (desc != NULL) { +#ifdef DO_DBG + sah_Dump_Words("Desc", (unsigned *)desc, desc->dma_addr, 6); +#endif + + if (desc->ptr1 != NULL) { + desc->ptr1 = + sah_DePhysicalise_Links(desc-> + original_ptr1); + } + if (desc->ptr2 != NULL) { + desc->ptr2 = + sah_DePhysicalise_Links(desc-> + original_ptr2); + } + if (desc->next != NULL) { + desc->next = desc->original_next; + } + desc = desc->next; + } + } + /* not prephysicalized */ + return first_desc; +} /* sah_DePhysicalise_Descriptors() */ + +/*! +******************************************************************************* +* This walks through a SAHARA descriptor chain and free()'s everything +* that is not NULL. Finally it also unmaps all of the physical memory and +* frees the kiobuf_list Queue. +* +* @brief Kernel Descriptor Chain Destructor +* +* @param head_desc A Descriptor pointer from kernel-space. +* +* @return void +* +*/ +void sah_Free_Chained_Descriptors(sah_Head_Desc * head_desc) +{ + sah_Desc *desc = NULL; + sah_Desc *next_desc = NULL; + int this_is_head = 1; + + desc = &head_desc->desc; + + while (desc != NULL) { + + sah_Free_Chained_Links(desc->ptr1); + sah_Free_Chained_Links(desc->ptr2); + + /* Get a bus pointer to the next Descriptor */ + next_desc = desc->next; + + /* Zero the header and Length fields for security reasons. */ + desc->header = 0; + desc->len1 = 0; + desc->len2 = 0; + + if (this_is_head) { + sah_Free_Head_Descriptor(head_desc); + this_is_head = 0; +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Head_Descriptor: %p\n", + head_desc); + LOG_KDIAG(Diag_msg); +#endif + } else { + /* free this descriptor */ + sah_Free_Descriptor(desc); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Descriptor: %p\n", desc); + LOG_KDIAG(Diag_msg); +#endif + } + + /* Look at the next Descriptor */ + desc = next_desc; + } +} /* sah_Free_Chained_Descriptors() */ + +/*! +******************************************************************************* +* This walks through a SAHARA link chain and frees everything that is +* not NULL, excluding user-space buffers. +* +* @brief Kernel Link Chain Destructor +* +* @param link A Link pointer from kernel-space. This is in bus address +* space. +* +* @return void +* +*/ +void sah_Free_Chained_Links(sah_Link * link) +{ + sah_Link *next_link = NULL; + + while (link != NULL) { + /* Get a bus pointer to the next Link */ + next_link = link->next; + + /* Zero some fields for security reasons. */ + link->data = NULL; + link->len = 0; + link->ownerid = 0; + + /* Free this Link */ +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Link: %p(->%p)\n", link, link->next); + LOG_KDIAG(Diag_msg); +#endif + sah_Free_Link(link); + + /* Move on to the next Link */ + link = next_link; + } +} + +/*! +******************************************************************************* +* This function runs through a link chain pointed to by a user-space +* address. It makes a temporary kernel-space copy of each link in the +* chain and calls sah_Make_Links() to create a set of kernel-side links +* to replace it. +* +* @brief Kernel Link Chain Copier +* +* @param ptr A link pointer from user-space. +* +* @return sah_Link * - The virtual address of the first link in the +* chain. +* @return NULL - If there was some error. +*/ +sah_Link *sah_Copy_Links(fsl_shw_uco_t * user_ctx, sah_Link * ptr) +{ + sah_Link *head_link = NULL; + sah_Link *new_head_link = NULL; + sah_Link *new_tail_link = NULL; + sah_Link *prev_tail_link = NULL; + sah_Link *user_link = ptr; + sah_Link link_copy; + int link_data_length = 0; + + /* Internal status variable to be used in this function */ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *ret_val = NULL; + + /* This will be set to True when we have finished processing our + * link chain. */ + int drv_if_done = FALSE; + int is_this_the_head = TRUE; + int result; + + /* transfer all links, on this link chain, from user space */ + while (drv_if_done == FALSE) { + /* Copy the current link from user-space. The virtual address, DMA + * address, and vm_info fields of the sah_Link struct are not part + * of the user-space structure. They must be the last elements and + * should not be copied. */ + result = copy_from_user(&link_copy, + user_link, (sizeof(sah_Link) - +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + sizeof(struct page *) - /* vm_info */ +#endif + sizeof(dma_addr_t) - /* dma_addr */ + sizeof(uint32_t) - /* virt_addr */ + sizeof(uint8_t *) - /* original_data */ + sizeof(sah_Link *))); /* original_next */ + + if (result != 0) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("copy_from_user() failed."); +#endif + drv_if_done = TRUE; + status = FSL_RETURN_INTERNAL_ERROR_S; + } + + if (status == FSL_RETURN_OK_S) { + /* This will create new links which can be used to replace tmp_link + * in the chain. This will return a new head and tail link. */ + link_data_length = link_data_length + link_copy.len; + new_head_link = + sah_Make_Links(user_ctx, &link_copy, &new_tail_link); + + if (new_head_link == NULL) { + /* If we ran out of memory or a user pointer was invalid */ + drv_if_done = TRUE; + status = FSL_RETURN_INTERNAL_ERROR_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Make_Links() failed."); +#endif + } else { + if (is_this_the_head == TRUE) { + /* Keep a reference to the head link */ + head_link = new_head_link; + is_this_the_head = FALSE; + } else { + /* Need to update the previous links' next field to point + * to the current link. */ + prev_tail_link->next = + (void *)new_head_link->dma_addr; + prev_tail_link->original_next = + new_head_link; + } + } + } + + if (status == FSL_RETURN_OK_S) { + /* Get to the next link in the chain. */ + user_link = link_copy.next; + prev_tail_link = new_tail_link; + + /* Check if the end of the link chain was reached (TRUE) or if + * there is another linked to this one (FALSE) */ + drv_if_done = (user_link == NULL) ? TRUE : FALSE; + } + } /* end while */ + + if (status != FSL_RETURN_OK_S) { + ret_val = NULL; + /* There could be clean-up to do here because we may have made some + * successful iterations through the while loop and as a result, the + * links created by sah_Make_Links() need to be destroyed. + */ + if (head_link != NULL) { + /* Failed somewhere in the while loop and need to clean-up. */ + sah_Destroy_Links(head_link); + } + } else { + /* Success. Return the head link. */ + ret_val = head_link; + } + + return ret_val; +} /* sah_Copy_Links() */ + +/*! +******************************************************************************* +* This function takes an input link pointed to by a user-space address +* and returns a chain of links that span the physical pages pointed +* to by the input link. +* +* @brief Kernel Link Chain Constructor +* +* @param ptr A link pointer from user-space. +* @param tail The address of a link pointer. This is used to return +* the tail link created by this function. +* +* @return sah_Link * - A virtual address of the first link in the +* chain. +* @return NULL - If there was some error. +* +*/ +sah_Link *sah_Make_Links(fsl_shw_uco_t * user_ctx, + sah_Link * ptr, sah_Link ** tail) +{ + int result = -1; + int page_index = 0; + fsl_shw_return_t status = FSL_RETURN_OK_S; + int is_this_the_head = TRUE; + void *buffer_start = NULL; + sah_Link *link = NULL; + sah_Link *prev_link = NULL; + sah_Link *head_link = NULL; + sah_Link *ret_val = NULL; + int buffer_length = 0; + struct page **local_pages = NULL; + int nr_pages = 0; + int write = (sah_Link_Get_Flags(ptr) & SAH_OUTPUT_LINK) ? WRITE : READ; + + /* need to retrieve stored key? */ + if (ptr->flags & SAH_STORED_KEY_INFO) { + fsl_shw_return_t ret_status; + + /* allocate space for this link */ + link = sah_Alloc_Link(); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Alloc_Link returned %p/%p\n", link, + (void *)link->dma_addr); + LOG_KDIAG(Diag_msg); +#endif + + if (link == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Alloc_Link() failed!"); +#endif + return link; + } else { + uint32_t max_len = 0; /* max slot length */ + + /* get length and physical address of stored key */ + ret_status = system_keystore_get_slot_info(ptr->ownerid, ptr->slot, (uint32_t *) & link->data, /* RED key address */ + &max_len); +#ifdef DIAG_DRV_IF + LOG_KDIAG_ARGS + ("ret_status==SCC_RET_OK? %s. slot: %i. data: %p" + ". len: %i, key length: %i", + (ret_status == FSL_RETURN_OK_S ? "yes" : "no"), + ptr->slot, link->data, max_len, ptr->len); +#endif + + if ((ret_status == FSL_RETURN_OK_S) && (ptr->len <= max_len)) { + /* finish populating the link */ + link->len = ptr->len; + link->flags = ptr->flags & ~SAH_PREPHYS_DATA; + *tail = link; + } else { +#ifdef DIAG_DRV_IF + if (ret_status == FSL_RETURN_OK_S) { + LOG_KDIAG + ("SCC sah_Link key slot reference is too long"); + } else { + LOG_KDIAG + ("SCC sah_Link slot slot reference is invalid"); + } +#endif + sah_Free_Link(link); + status = FSL_RETURN_INTERNAL_ERROR_S; + return NULL; + } + return link; + } + } else if (ptr->flags & SAH_IN_USER_KEYSTORE) { + +#ifdef FSL_HAVE_SCC2 + + void *kernel_base; + + /* allocate space for this link */ + link = sah_Alloc_Link(); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Alloc_Link returned %p/%p\n", link, + (void *)link->dma_addr); + LOG_KDIAG(Diag_msg); +#endif /* DIAG_MEM */ + + if (link == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Alloc_Link() failed!"); +#endif + return link; + } else { + /* link->data points to the virtual address of the key data, however + * this memory does not need to be locked down. + */ + kernel_base = lookup_user_partition(user_ctx, + (uint32_t) ptr-> + data & PAGE_MASK); + + link->data = (uint8_t *) scc_virt_to_phys(kernel_base + + ((unsigned + long)ptr-> + data & + ~PAGE_MASK)); + + /* Do bounds checking to ensure that the user is not overstepping + * the bounds of their partition. This is a simple implementation + * that assumes the user only owns one partition. It only checks + * to see if the address of the last byte of data steps over a + * page boundary. + */ + if ((kernel_base != NULL) && + ((((uint32_t) link->data + + link->len) >> PAGE_SHIFT) == + ((uint32_t) link->data >> PAGE_SHIFT))) { + /* finish populating the link */ + link->len = ptr->len; + link->flags = ptr->flags & ~SAH_PREPHYS_DATA; + *tail = link; + } else { +#ifdef DIAG_DRV_IF + if (kernel_base != NULL) { + LOG_KDIAG + ("SCC sah_Link key slot reference is too long"); + } else { + LOG_KDIAG + ("SCC sah_Link slot slot reference is invalid"); + } +#endif + sah_Free_Link(link); + status = FSL_RETURN_INTERNAL_ERROR_S; + return NULL; + } + return link; + } + +#else /* FSL_HAVE_SCC2 */ + + return NULL; + +#endif /* FSL_HAVE_SCC2 */ + } + + if (ptr->data == NULL) { + /* The user buffer must not be NULL because map_user_kiobuf() cannot + * handle NULL pointer input. + */ + status = FSL_RETURN_BAD_DATA_LENGTH_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Link data pointer is NULL."); +#endif + } + + if (status == FSL_RETURN_OK_S) { + unsigned long start_page = (unsigned long)ptr->data & PAGE_MASK; + + /* determine number of pages being used for this link */ + nr_pages = (((unsigned long)(ptr->data) & ~PAGE_MASK) + + ptr->len + ~PAGE_MASK) >> PAGE_SHIFT; + + /* ptr contains all the 'user space' information, add the pages + * to it also just so everything is in one place */ + local_pages = + kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL); + + if (local_pages == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; /* no memory! */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("kmalloc() failed."); +#endif + } else { + /* get the actual pages being used in 'user space' */ + + down_read(¤t->mm->mmap_sem); + result = get_user_pages(current, current->mm, + start_page, nr_pages, + write, 0 /* noforce */ , + local_pages, NULL); + up_read(¤t->mm->mmap_sem); + + if (result < nr_pages) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("get_user_pages() failed."); +#endif + if (result > 0) { + for (page_index = 0; + page_index < result; + page_index++) { + page_cache_release(local_pages + [page_index]); + } + } + status = FSL_RETURN_INTERNAL_ERROR_S; + } + } + } + + /* Now we can walk through the list of pages in the buffer */ + if (status == FSL_RETURN_OK_S) { + +#if defined(FLUSH_SPECIFIC_DATA_ONLY) && !defined(HAS_L2_CACHE) + /* + * Now that pages are wired, clear user data from cache lines. When + * there is just an L1 cache, clean based on user virtual for ARM. + */ + if (write == WRITE) { + os_cache_flush_range(ptr->data, ptr->len); + } else { + os_cache_clean_range(ptr->data, ptr->len); + } +#endif + + for (page_index = 0; page_index < nr_pages; page_index++) { + /* Allocate a new link structure */ + link = sah_Alloc_Link(); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Alloc_Link returned %p/%p\n", link, + (void *)link->dma_addr); + LOG_KDIAG(Diag_msg); +#endif + if (link == NULL) { +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Alloc_Link() failed."); +#endif + status = FSL_RETURN_NO_RESOURCE_S; + + /* need to free the rest of the pages. Destroy_Links will take + * care of the ones already assigned to a link */ + for (; page_index < nr_pages; page_index++) { + page_cache_release(local_pages + [page_index]); + } + break; /* exit 'for page_index' loop */ + } + + if (status == FSL_RETURN_OK_S) { + if (is_this_the_head == TRUE) { + /* keep a reference to the head link */ + head_link = link; + /* remember that we have seen the head link */ + is_this_the_head = FALSE; + } else { + /* If this is not the head link then set the previous + * link's next pointer to point to this link */ + prev_link->original_next = link; + prev_link->next = + (sah_Link *) link->dma_addr; + } + + buffer_start = + page_address(local_pages[page_index]); + + if (page_index == 0) { + /* If this is the first page, there might be an + * offset. We need to increment the address by this offset + * so we don't just get the start of the page. + */ + buffer_start += + (unsigned long) + sah_Link_Get_Data(ptr) + & ~PAGE_MASK; + buffer_length = PAGE_SIZE + - + ((unsigned long) + sah_Link_Get_Data(ptr) + & ~PAGE_MASK); + } else { + buffer_length = PAGE_SIZE; + } + + if (page_index == nr_pages - 1) { + /* if this is the last page, we need to adjust + * the buffer_length to account for the last page being + * partially used. + */ + buffer_length -= + nr_pages * PAGE_SIZE - + sah_Link_Get_Len(ptr) - + ((unsigned long) + sah_Link_Get_Data(ptr) & + ~PAGE_MASK); + } +#if defined(FLUSH_SPECIFIC_DATA_ONLY) && defined(HAS_L2_CACHE) + /* + * When there is an L2 cache, clean based on kernel + * virtual.. + */ + if (write == WRITE) { + os_cache_flush_range(buffer_start, + buffer_length); + } else { + os_cache_clean_range(buffer_start, + buffer_length); + } +#endif + + /* Fill in link information */ + link->len = buffer_length; +#if !defined(HAS_L2_CACHE) + /* use original virtual */ + link->original_data = ptr->data; +#else + /* use kernel virtual */ + link->original_data = buffer_start; +#endif + link->data = (void *)os_pa(buffer_start); + link->flags = ptr->flags & ~SAH_PREPHYS_DATA; + link->vm_info = local_pages[page_index]; + prev_link = link; + +#if defined(NO_OUTPUT_1K_CROSSING) || defined(NO_1K_CROSSING) + if ( +#ifdef NO_OUTPUT_1K_CROSSING + /* Insert extra link if 1k boundary on output pointer + * crossed not at an 8-word boundary */ + (link->flags & SAH_OUTPUT_LINK) && + (((uint32_t) buffer_start % 32) != 0) + && +#endif + ((((uint32_t) buffer_start & 1023) + + buffer_length) > 1024)) { + + /* Shorten current link to 1k boundary */ + link->len = + 1024 - + ((uint32_t) buffer_start % 1024); + + /* Get new link to follow it */ + link = sah_Alloc_Link(); + prev_link->len = + 1024 - + ((uint32_t) buffer_start % 1024); + prev_link->original_next = link; + prev_link->next = + (sah_Link *) link->dma_addr; + buffer_length -= prev_link->len; + buffer_start += prev_link->len; + +#if !defined(HAS_L2_CACHE) + /* use original virtual */ + link->original_data = ptr->data; +#else + /* use kernel virtual */ + link->original_data = buffer_start; +#endif + link->data = + (void *)os_pa(buffer_start); + link->vm_info = prev_link->vm_info; + prev_link->vm_info = NULL; /* delay release */ + link->flags = ptr->flags; + link->len = buffer_length; + prev_link = link; + } /* while link would cross 1K boundary */ +#endif /* 1K_CROSSING */ + } + } /* for each page */ + } + + if (local_pages != NULL) { + kfree(local_pages); + } + + if (status != FSL_RETURN_OK_S) { + /* De-allocated any links created, this routine first looks if + * head_link is NULL */ + sah_Destroy_Links(head_link); + + /* Clean-up of the KIOBUF will occur in the * sah_Copy_Descriptors() + * function. + * Clean-up of the Queue entry must occur in the function called + * sah_Copy_Descriptors(). + */ + } else { + + /* Success. Return the head link. */ + ret_val = head_link; + link->original_next = NULL; + /* return the tail link as well */ + *tail = link; + } + + return ret_val; +} /* sah_Make_Links() */ + +/*! +******************************************************************************* +* This walks through a SAHARA descriptor chain and frees everything +* that is not NULL. Finally it also unmaps all of the physical memory and +* frees the kiobuf_list Queue. +* +* @brief Kernel Descriptor Chain Destructor +* +* @param desc A Descriptor pointer from kernel-space. This should be +* in bus address space. +* +* @return void +* +*/ +void sah_Destroy_Descriptors(sah_Head_Desc * head_desc) +{ + sah_Desc *this_desc = (sah_Desc *) head_desc; + sah_Desc *next_desc = NULL; + int this_is_head = 1; + + /* + * Flush the D-cache. This flush is here because the hardware has finished + * processing this descriptor and probably has changed the contents of + * some linked user buffers as a result. This flush will enable + * user-space applications to see the correct data rather than the + * out-of-date cached version. + */ +#ifndef FLUSH_SPECIFIC_DATA_ONLY + os_flush_cache_all(); +#endif + + head_desc = (sah_Head_Desc *) this_desc->virt_addr; + + while (this_desc != NULL) { + if (this_desc->ptr1 != NULL) { + sah_Destroy_Links(this_desc->original_ptr1 + ? this_desc-> + original_ptr1 : this_desc->ptr1); + } + if (this_desc->ptr2 != NULL) { + sah_Destroy_Links(this_desc->original_ptr2 + ? this_desc-> + original_ptr2 : this_desc->ptr2); + } + + /* Get a bus pointer to the next Descriptor */ + next_desc = (this_desc->original_next + ? this_desc->original_next : this_desc->next); + + /* Zero the header and Length fields for security reasons. */ + this_desc->header = 0; + this_desc->len1 = 0; + this_desc->len2 = 0; + + if (this_is_head) { + sah_Free_Head_Descriptor(head_desc); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Head_Descriptor: %p\n", + head_desc); + LOG_KDIAG(Diag_msg); +#endif + this_is_head = 0; + } else { + /* free this descriptor */ + sah_Free_Descriptor(this_desc); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Descriptor: %p\n", this_desc); + LOG_KDIAG(Diag_msg); +#endif + } + + /* Set up for next round. */ + this_desc = (sah_Desc *) next_desc; + } +} + +/*! +******************************************************************************* +* This walks through a SAHARA link chain and frees everything that is +* not NULL excluding user-space buffers. +* +* @brief Kernel Link Chain Destructor +* +* @param link A Link pointer from kernel-space. +* +* @return void +* +*/ +void sah_Destroy_Links(sah_Link * link) +{ + sah_Link *this_link = link; + sah_Link *next_link = NULL; + + while (this_link != NULL) { + + /* if this link indicates an associated page, process it */ + if (this_link->vm_info != NULL) { + /* since this function is only called from the routine that + * creates a kernel copy of the user space descriptor chain, + * there are no pages to dirty. All that is needed is to release + * the page from cache */ + page_cache_release(this_link->vm_info); + } + + /* Get a bus pointer to the next Link */ + next_link = (this_link->original_next + ? this_link->original_next : this_link->next); + + /* Zero the Pointer and Length fields for security reasons. */ + this_link->data = NULL; + this_link->len = 0; + + /* Free this Link */ + sah_Free_Link(this_link); +#ifdef DIAG_MEM + sprintf(Diag_msg, "Free_Link: %p\n", this_link); + LOG_KDIAG(Diag_msg); +#endif + + /* Look at the next Link */ + this_link = next_link; + } +} + +/*! +******************************************************************************* +* @brief Initialize memory manager/mapper. +* +* In 2.4, this function also allocates a kiovec to be used when mapping user +* data to kernel space +* +* @return 0 for success, OS error code on failure +* +*/ +int sah_Init_Mem_Map(void) +{ + int ret = OS_ERROR_FAIL_S; + + mem_lock = os_lock_alloc_init(); + + /* + * If one of these fails, change the calculation in the #define earlier in + * the file to be the other one. + */ + if (sizeof(sah_Link) > MEM_BLOCK_SIZE) { + os_printk("Sahara Driver: sah_Link structure is too large\n"); + } else if (sizeof(sah_Desc) > MEM_BLOCK_SIZE) { + os_printk("Sahara Driver: sah_Desc structure is too large\n"); + } else { + ret = OS_ERROR_OK_S; + } + +#ifndef SELF_MANAGED_POOL + + big_dma_pool = dma_pool_create("sah_big_blocks", NULL, + sizeof(Mem_Big_Block), sizeof(uint32_t), + PAGE_SIZE); + small_dma_pool = dma_pool_create("sah_small_blocks", NULL, + sizeof(Mem_Block), sizeof(uint32_t), + PAGE_SIZE); +#else + +#endif + return ret; +} + +/*! +******************************************************************************* +* @brief Clean up memory manager/mapper. +* +* In 2.4, this function also frees the kiovec used when mapping user data to +* kernel space. +* +* @return none +* +*/ +void sah_Stop_Mem_Map(void) +{ + os_lock_deallocate(mem_lock); + +#ifndef SELF_MANAGED_POOL + if (big_dma_pool != NULL) { + dma_pool_destroy(big_dma_pool); + } + if (small_dma_pool != NULL) { + dma_pool_destroy(small_dma_pool); + } +#endif +} + +/*! +******************************************************************************* +* Allocate Head descriptor from free pool. +* +* @brief Allocate Head descriptor +* +* @return sah_Head_Desc Free descriptor, NULL if no free descriptors available. +* +*/ +sah_Head_Desc *sah_Alloc_Head_Descriptor(void) +{ + Mem_Big_Block *block; + sah_Head_Desc *desc; + + block = sah_Alloc_Big_Block(); + if (block != NULL) { + /* initialize everything */ + desc = (sah_Head_Desc *) block->data; + + desc->desc.virt_addr = (sah_Desc *) desc; + desc->desc.dma_addr = block->dma_addr; + desc->desc.original_ptr1 = NULL; + desc->desc.original_ptr2 = NULL; + desc->desc.original_next = NULL; + + desc->desc.ptr1 = NULL; + desc->desc.ptr2 = NULL; + desc->desc.next = NULL; + } else { + desc = NULL; + } + + return desc; +} + +/*! +******************************************************************************* +* Allocate descriptor from free pool. +* +* @brief Allocate descriptor +* +* @return sah_Desc Free descriptor, NULL if no free descriptors available. +* +*/ +sah_Desc *sah_Alloc_Descriptor(void) +{ + Mem_Block *block; + sah_Desc *desc; + + block = sah_Alloc_Block(); + if (block != NULL) { + /* initialize everything */ + desc = (sah_Desc *) block->data; + + desc->virt_addr = desc; + desc->dma_addr = block->dma_addr; + desc->original_ptr1 = NULL; + desc->original_ptr2 = NULL; + desc->original_next = NULL; + + desc->ptr1 = NULL; + desc->ptr2 = NULL; + desc->next = NULL; + } else { + desc = NULL; + } + + return (desc); +} + +/*! +******************************************************************************* +* Allocate link from free pool. +* +* @brief Allocate link +* +* @return sah_Link Free link, NULL if no free links available. +* +*/ +sah_Link *sah_Alloc_Link(void) +{ + Mem_Block *block; + sah_Link *link; + + block = sah_Alloc_Block(); + if (block != NULL) { + /* initialize everything */ + link = (sah_Link *) block->data; + + link->virt_addr = link; + link->original_next = NULL; + link->original_data = NULL; + /* information found in allocated block */ + link->dma_addr = block->dma_addr; + + /* Sahara link fields */ + link->len = 0; + link->data = NULL; + link->next = NULL; + + /* driver required fields */ + link->flags = 0; + link->vm_info = NULL; + } else { + link = NULL; + } + + return link; +} + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Add a new page to end of block free pool. This will allocate one page and +* fill the pool with entries, appending to the end. +* +* @brief Add page of blocks to block free pool. +* +* @pre This function must be called with the #mem_lock held. +* +* @param big 0 - make blocks big enough for sah_Desc +* non-zero - make blocks big enough for sah_Head_Desc +* +* @return int TRUE if blocks added succeesfully, FALSE otherwise +* +*/ +int sah_Block_Add_Page(int big) +{ + void *page; + int success; + dma_addr_t dma_addr; + unsigned block_index; + uint32_t dma_offset; + unsigned block_entries = + big ? MEM_BIG_BLOCK_ENTRIES : MEM_BLOCK_ENTRIES; + unsigned block_size = big ? sizeof(Mem_Big_Block) : sizeof(Mem_Block); + void *block; + + /* Allocate page of memory */ +#ifndef USE_COHERENT_MEMORY + page = os_alloc_memory(PAGE_SIZE, GFP_ATOMIC | __GFP_DMA); + dma_addr = os_pa(page); +#else + page = os_alloc_coherent(PAGE_SIZE, &dma_addr, GFP_ATOMIC); +#endif + if (page != NULL) { + /* + * Find the difference between the virtual address and the DMA + * address of the page. This is used later to determine the DMA + * address of each individual block. + */ + dma_offset = page - (void *)dma_addr; + + /* Split page into blocks and add to free pool */ + block = page; + for (block_index = 0; block_index < block_entries; + block_index++) { + if (big) { + register Mem_Big_Block *blockp = block; + blockp->dma_addr = + (uint32_t) (block - dma_offset); + sah_Append_Big_Block(blockp); + } else { + register Mem_Block *blockp = block; + blockp->dma_addr = + (uint32_t) (block - dma_offset); + /* sah_Append_Block must be protected with spin locks. This is + * done in sah_Alloc_Block(), which calls + * sah_Block_Add_Page() */ + sah_Append_Block(blockp); + } + block += block_size; + } + success = TRUE; +#ifdef DIAG_MEM + LOG_KDIAG("Succeeded in allocating new page"); +#endif + } else { + success = FALSE; +#ifdef DIAG_MEM + LOG_KDIAG("Failed in allocating new page"); +#endif + } + + return success; +} +#endif /* SELF_MANAGED_POOL */ + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Allocate block from free pool. A block is large enough to fit either a link +* or descriptor. +* +* @brief Allocate memory block +* +* @return Mem_Block Free block, NULL if no free blocks available. +* +*/ +static Mem_Big_Block *sah_Alloc_Big_Block(void) +{ + Mem_Big_Block *block; + os_lock_context_t lock_flags; + + os_lock_save_context(mem_lock, lock_flags); + + /* If the pool is empty, try to allocate more entries */ + if (big_block_free_head == NULL) { + (void)sah_Block_Add_Page(1); + } + + /* Check that the pool now has some free entries */ + if (big_block_free_head != NULL) { + /* Return the head of the free pool */ + block = big_block_free_head; + + big_block_free_head = big_block_free_head->next; + if (big_block_free_head == NULL) { + /* Allocated last entry in pool */ + big_block_free_tail = NULL; + } + } else { + block = NULL; + } + os_unlock_restore_context(mem_lock, lock_flags); + + return block; +} +#else +/*! +******************************************************************************* +* Allocate block from free pool. A block is large enough to fit either a link +* or descriptor. +* +* @brief Allocate memory block +* +* @return Mem_Block Free block, NULL if no free blocks available. +* +*/ +static Mem_Big_Block *sah_Alloc_Big_Block(void) +{ + dma_addr_t dma_addr; + Mem_Big_Block *block = + dma_pool_alloc(big_dma_pool, GFP_ATOMIC, &dma_addr); + + if (block == NULL) { + } else { + block->dma_addr = dma_addr; + } + + return block; +} +#endif + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Allocate block from free pool. A block is large enough to fit either a link +* or descriptor. +* +* @brief Allocate memory block +* +* @return Mem_Block Free block, NULL if no free blocks available. +* +*/ +/****************************************************************************** +* +* MODIFICATION HISTORY: +* +* Date Person Change +* 31/10/2003 RWK PR52734 - Implement functions to allocate +* descriptors and links. Replace +* consistent_alloc() calls. Initial creation. +* +******************************************************************************/ +static Mem_Block *sah_Alloc_Block(void) +{ + Mem_Block *block; + os_lock_context_t lock_flags; + + os_lock_save_context(mem_lock, lock_flags); + + /* If the pool is empty, try to allocate more entries */ + if (block_free_head == NULL) { + (void)sah_Block_Add_Page(0); + } + + /* Check that the pool now has some free entries */ + if (block_free_head != NULL) { + /* Return the head of the free pool */ + block = block_free_head; + + block_free_head = block_free_head->next; + if (block_free_head == NULL) { + /* Allocated last entry in pool */ + block_free_tail = NULL; + } + } else { + block = NULL; + } + os_unlock_restore_context(mem_lock, lock_flags); + + return block; +} +#else +/*! +******************************************************************************* +* Allocate block from free pool. A block is large enough to fit either a link +* or descriptor. +* +* @brief Allocate memory block +* +* @return Mem_Block Free block, NULL if no free blocks available. +* +*/ +/****************************************************************************** +* +* MODIFICATION HISTORY: +* +* Date Person Change +* 31/10/2003 RWK PR52734 - Implement functions to allocate +* descriptors and links. Replace +* consistent_alloc() calls. Initial creation. +* +******************************************************************************/ +static Mem_Block *sah_Alloc_Block(void) +{ + + dma_addr_t dma_addr; + Mem_Block *block = + dma_pool_alloc(small_dma_pool, GFP_ATOMIC, &dma_addr); + + if (block == NULL) { + } else { + block->dma_addr = dma_addr; + } + + return block; +} +#endif + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Free memory block back to free pool +* +* @brief Free memory block +* +* @param block A block allocated with sah_Alloc_Block(). +* +* @return none +* +*/ +static void sah_Free_Block(Mem_Block * block) +{ + os_lock_context_t lock_flags; + + os_lock_save_context(mem_lock, lock_flags); + sah_Append_Block(block); + os_unlock_restore_context(mem_lock, lock_flags); +} +#else +/*! +******************************************************************************* +* Free memory block back to free pool +* +* @brief Free memory block +* +* @param block A block allocated with sah_Alloc_Block(). +* +* @return none +* +*/ +static void sah_Free_Block(Mem_Block * block) +{ + dma_pool_free(small_dma_pool, block, block->dma_addr); +} +#endif + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Free memory block back to free pool +* +* @brief Free memory block +* +* @param block A block allocated with sah_Alloc_Block(). +* +* @return none +* +*/ +static void sah_Free_Big_Block(Mem_Big_Block * block) +{ + os_lock_context_t lock_flags; + + os_lock_save_context(mem_lock, lock_flags); + sah_Append_Big_Block(block); + os_unlock_restore_context(mem_lock, lock_flags); +} +#else +/*! +******************************************************************************* +* Free memory block back to free pool +* +* @brief Free memory block +* +* @param block A block allocated with sah_Alloc_Block(). +* +* @return none +* +*/ +static void sah_Free_Big_Block(Mem_Big_Block * block) +{ + dma_pool_free(big_dma_pool, block, block->dma_addr); +} +#endif + +#ifdef SELF_MANAGED_POOL +/*! +******************************************************************************* +* Append memory block to end of free pool. +* +* @param block A block entry +* +* @return none +* +* @pre This function must be called with the #mem_lock held. +* +* @brief Append memory block to free pool +*/ +static void sah_Append_Big_Block(Mem_Big_Block * block) +{ + + /* Initialise block */ + block->next = NULL; + + /* Remember that block may be the first in the pool */ + if (big_block_free_tail != NULL) { + big_block_free_tail->next = block; + } else { + /* Pool is empty */ + big_block_free_head = block; + } + + big_block_free_tail = block; +} + +/*! +******************************************************************************* +* Append memory block to end of free pool. +* +* @brief Append memory block to free pool +* +* @param block A block entry +* +* @return none +* +* @pre #mem_lock must be held +* +*/ +static void sah_Append_Block(Mem_Block * block) +{ + + /* Initialise block */ + block->next = NULL; + + /* Remember that block may be the first in the pool */ + if (block_free_tail != NULL) { + block_free_tail->next = block; + } else { + /* Pool is empty */ + block_free_head = block; + } + + block_free_tail = block; +} +#endif /* SELF_MANAGED_POOL */ + +/* End of sah_memory_mapper.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/Makefile @@ -0,0 +1,47 @@ +# Makefile for the Linux Sahara2 driver +# +# This makefile works within a kernel driver tree + +# Need to augment this to support optionally building user-mode support +API_SOURCES = fsl_shw_sym.c fsl_shw_user.c fsl_shw_hash.c fsl_shw_auth.c \ + fsl_shw_hmac.c fsl_shw_rand.c sf_util.c km_adaptor.c fsl_shw_keystore.c \ + fsl_shw_wrap.c \ + + +SOURCES = sah_driver_interface.c sah_hardware_interface.c \ + sah_interrupt_handler.c sah_queue.c sah_queue_manager.c \ + sah_status_manager.c sah_memory_mapper.c + + +# Turn on for mostly full debugging +# DIAGS = -DDIAG_DRV_STATUS -DDIAG_DRV_QUEUE -DDIAG_DRV_INTERRUPT -DDIAG_DRV_IF +# DIAGS += -DDIAG_DURING_INTERRUPT + +# Turn on for lint-type checking +#EXTRA_CFLAGS = -Wall -W -Wstrict-prototypes -Wmissing-prototypes +EXTRA_CFLAGS += -DLINUX_KERNEL $(DIAGS) + + +ifeq ($(CONFIG_MXC_SAHARA_POLL_MODE),y) +EXTRA_CFLAGS += -DSAHARA_POLL_MODE +EXTRA_CFLAGS += -DSAHARA_POLL_MODE_TIMEOUT=$(CONFIG_SAHARA_POLL_MODE_TIMEOUT) +endif + +ifeq ($(CONFIG_MXC_SAHARA_USER_MODE),y) +EXTRA_CFLAGS += -DSAHARA_USER_MODE +SOURCES += +endif + +ifeq ($(CONFIG_PM),y) +EXTRA_CFLAGS += -DSAHARA_POWER_MANAGMENT +endif + +EXTRA_CFLAGS += -Idrivers/mxc/security/sahara2/include + +# handle buggy BSP -- uncomment if these are undefined during build +#EXTRA_CFLAGS += -DSAHARA_BASE_ADDR=HAC_BASE_ADDR -DINT_SAHARA=INT_HAC_RTIC + + +obj-$(CONFIG_MXC_SAHARA) += sahara.o + +sahara-objs := $(SOURCES:.c=.o) $(API_SOURCES:.c=.o) --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_queue_manager.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_queue_manager.c @@ -0,0 +1,1050 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file sah_queue_manager.c + * + * @brief This file provides a Queue Manager implementation. + * + * The Queue Manager manages additions and removal from the queue and updates + * the status of queue entries. It also calls sah_HW_* functions to interract + * with the hardware. +*/ + +#include "portable_os.h" + +/* SAHARA Includes */ +#include +#include +#include +#include +#if defined(DIAG_DRV_QUEUE) || defined(DIAG_DRV_STATUS) +#include +#endif +#include + +#ifdef DIAG_DRV_STATUS + +#define FSL_INVALID_RETURN 13 +#define MAX_RETURN_STRING_LEN 22 +#endif + +/* Defines for parsing value from Error Status register */ +#define SAH_STATUS_MASK 0x07 +#define SAH_ERROR_MASK 0x0F +#define SAH_CHA_ERR_SOURCE_MASK 0x07 +#define SAH_CHA_ERR_STATUS_MASK 0x0FFF +#define SAH_DMA_ERR_STATUS_MASK 0x0F +#define SAH_DMA_ERR_SIZE_MASK 0x03 +#define SAH_DMA_ERR_DIR_MASK 0x01 + +#define SHA_ERROR_STATUS_CONTINUE 0xFFFFFFFF +#define SHA_CHA_ERROR_STATUS_DONE 0xFFFFFFFF + +/* this maps the error status register's error source 4 bit field to the API + * return values. A 0xFFFFFFFF indicates additional fields must be checked to + * determine an appropriate return value */ +static sah_Execute_Error sah_Execute_Error_Array[] = { + FSL_RETURN_ERROR_S, /* SAH_ERR_NONE */ + FSL_RETURN_BAD_FLAG_S, /* SAH_ERR_HEADER */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_ERR_DESC_LENGTH */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_ERR_DESC_POINTER */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_ERR_LINK_LENGTH */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_ERR_LINK_POINTER */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_ERR_INPUT_BUFFER */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_ERR_OUTPUT_BUFFER */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_ERR_OUTPUT_BUFFER_STARVATION */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_ERR_INTERNAL_STATE */ + FSL_RETURN_ERROR_S, /* SAH_ERR_GENERAL_DESCRIPTOR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_ERR_RESERVED_FIELDS */ + FSL_RETURN_MEMORY_ERROR_S, /* SAH_ERR_DESCRIPTOR_ADDRESS */ + FSL_RETURN_MEMORY_ERROR_S, /* SAH_ERR_LINK_ADDRESS */ + SHA_ERROR_STATUS_CONTINUE, /* SAH_ERR_CHA */ + SHA_ERROR_STATUS_CONTINUE /* SAH_ERR_DMA */ +}; + +static sah_DMA_Error_Status sah_DMA_Error_Status_Array[] = { + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_NO_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_AHB_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_IP_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_PARITY_ERR */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_DMA_BOUNDRY_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_BUSY_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_DMA_RESERVED_ERR */ + FSL_RETURN_INTERNAL_ERROR_S /* SAH_DMA_INT_ERR */ +}; + +static sah_CHA_Error_Status sah_CHA_Error_Status_Array[] = { + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_CHA_NO_ERR */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_CHA_IP_BUF */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_CHA_ADD_ERR */ + FSL_RETURN_BAD_MODE_S, /* SAH_CHA_MODE_ERR */ + FSL_RETURN_BAD_DATA_LENGTH_S, /* SAH_CHA_DATA_SIZE_ERR */ + FSL_RETURN_BAD_KEY_LENGTH_S, /* SAH_CHA_KEY_SIZE_ERR */ + FSL_RETURN_BAD_MODE_S, /* SAH_CHA_PROC_ERR */ + FSL_RETURN_ERROR_S, /* SAH_CHA_CTX_READ_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_CHA_INTERNAL_HW_ERR */ + FSL_RETURN_MEMORY_ERROR_S, /* SAH_CHA_IP_BUFF_ERR */ + FSL_RETURN_MEMORY_ERROR_S, /* SAH_CHA_OP_BUFF_ERR */ + FSL_RETURN_BAD_KEY_PARITY_S, /* SAH_CHA_DES_KEY_ERR */ + FSL_RETURN_INTERNAL_ERROR_S, /* SAH_CHA_RES */ +}; + +#ifdef DIAG_DRV_STATUS + +char sah_return_text[FSL_INVALID_RETURN][MAX_RETURN_STRING_LEN] = { + "No error", /* FSL_RETURN_OK_S */ + "Error", /* FSL_RETURN_ERROR_S */ + "No resource", /* FSL_RETURN_NO_RESOURCE_S */ + "Bad algorithm", /* FSL_RETURN_BAD_ALGORITHM_S */ + "Bad mode", /* FSL_RETURN_BAD_MODE_S */ + "Bad flag", /* FSL_RETURN_BAD_FLAG_S */ + "Bad key length", /* FSL_RETURN_BAD_KEY_LENGTH_S */ + "Bad key parity", /* FSL_RETURN_BAD_KEY_PARITY_S */ + "Bad data length", /* FSL_RETURN_BAD_DATA_LENGTH_S */ + "Authentication failed", /* FSL_RETURN_AUTH_FAILED_S */ + "Memory error", /* FSL_RETURN_MEMORY_ERROR_S */ + "Internal error", /* FSL_RETURN_INTERNAL_ERROR_S */ + "unknown value", /* default */ +}; + +#endif /* DIAG_DRV_STATUS */ + +/*! + * This lock must be held while performing any queuing or unqueuing functions, + * including reading the first pointer on the queue. It also protects reading + * and writing the Sahara DAR register. It must be held during a read-write + * operation on the DAR so that the 'test-and-set' is atomic. + */ +os_lock_t desc_queue_lock; + +/*! This is the main queue for the driver. This is shared between all threads + * and is not protected by mutexes since the kernel is non-preemptable. */ +sah_Queue *main_queue = NULL; + +/* Internal Prototypes */ +sah_Head_Desc *sah_Find_With_State(sah_Queue_Status state); + +#ifdef DIAG_DRV_STATUS +void sah_Log_Error(uint32_t descriptor, uint32_t error, uint32_t fault_address); +#endif + +extern wait_queue_head_t *int_queue; + +/*! + * This function initialises the Queue Manager + * + * @brief Initialise the Queue Manager + * + * @return FSL_RETURN_OK_S on success; FSL_RETURN_MEMORY_ERROR_S if not + */ +fsl_shw_return_t sah_Queue_Manager_Init(void) +{ + fsl_shw_return_t ret_val = FSL_RETURN_OK_S; + + desc_queue_lock = os_lock_alloc_init(); + + if (main_queue == NULL) { + /* Construct the main queue. */ + main_queue = sah_Queue_Construct(); + + if (main_queue == NULL) { + ret_val = FSL_RETURN_MEMORY_ERROR_S; + } + } else { +#ifdef DIAG_DRV_QUEUE + LOG_KDIAG + ("Trying to initialise the queue manager more than once."); +#endif + } + + return ret_val; +} + +/*! + * This function closes the Queue Manager + * + * @brief Close the Queue Manager + * + * @return void + */ +void sah_Queue_Manager_Close(void) +{ +#ifdef DIAG_DRV_QUEUE + if (main_queue && main_queue->count != 0) { + LOG_KDIAG + ("Trying to close the main queue when it is not empty."); + } +#endif + + if (main_queue) { + /* There is no error checking here because there is no way to handle + it. */ + sah_Queue_Destroy(main_queue); + main_queue = NULL; + } +} + +/*! + * Count the number of entries on the Queue Manager's queue + * + * @param ignore_state If non-zero, the @a state parameter is ignored. + * If zero, only entries matching @a state are counted. + * @param state State of entry to match for counting. + * + * @return Number of entries which matched criteria + */ +int sah_Queue_Manager_Count_Entries(int ignore_state, sah_Queue_Status state) +{ + int count = 0; + sah_Head_Desc *current_entry; + + /* Start at the head */ + current_entry = main_queue->head; + while (current_entry != NULL) { + if (ignore_state || (current_entry->status == state)) { + count++; + } + /* Jump to the next entry. */ + current_entry = current_entry->next; + } + + return count; +} + +/*! + * This function removes an entry from the Queue Manager's queue. The entry to + * be removed can be anywhere in the queue. + * + * @brief Remove an entry from the Queue Manager's queue. + * + * @param entry A pointer to a sah_Head_Desc to remove from the Queue + * Manager's queue. + * + * @pre The #desc_queue_lock must be held before calling this function. + * + * @return void + */ +void sah_Queue_Manager_Remove_Entry(sah_Head_Desc * entry) +{ + if (entry == NULL) { +#ifdef DIAG_DRV_QUEUE + LOG_KDIAG("NULL pointer input."); +#endif + } else { + sah_Queue_Remove_Any_Entry(main_queue, entry); + } +} + +/*! + * This function appends an entry to the Queue Managers queue. It primes SAHARA + * if this entry is the first PENDING entry in the Queue Manager's Queue. + * + * @brief Appends an entry to the Queue Manager's queue. + * + * @param entry A pointer to a sah_Head_Desc to append to the Queue + * Manager's queue. + * + * @pre The #desc_queue_lock may not may be held when calling this function. + * + * @return void + */ +void sah_Queue_Manager_Append_Entry(sah_Head_Desc * entry) +{ + sah_Head_Desc *current_entry; + os_lock_context_t int_flags; + +#ifdef DIAG_DRV_QUEUE + if (entry == NULL) { + LOG_KDIAG("NULL pointer input."); + } +#endif + entry->status = SAH_STATE_PENDING; + os_lock_save_context(desc_queue_lock, int_flags); + sah_Queue_Append_Entry(main_queue, entry); + + /* Prime SAHARA if the operation that was just appended is the only PENDING + * operation in the queue. + */ + current_entry = sah_Find_With_State(SAH_STATE_PENDING); + if (current_entry != NULL) { + if (current_entry == entry) { + sah_Queue_Manager_Prime(entry); + } + } + + os_unlock_restore_context(desc_queue_lock, int_flags); +} + +/*! + * This function marks all entries in the Queue Manager's queue with state + * SAH_STATE_RESET. + * + * @brief Mark all entries with state SAH_STATE_RESET + * + * @return void + * + * @note This feature needs re-visiting + */ +void sah_Queue_Manager_Reset_Entries(void) +{ + sah_Head_Desc *current_entry = NULL; + + /* Start at the head */ + current_entry = main_queue->head; + + while (current_entry != NULL) { + /* Set the state. */ + current_entry->status = SAH_STATE_RESET; + /* Jump to the next entry. */ + current_entry = current_entry->next; + } +} + +/*! + * This function primes SAHARA for the first time or after the queue becomes + * empty. Queue lock must have been set by the caller of this routine. + * + * @brief Prime SAHARA. + * + * @param entry A pointer to a sah_Head_Desc to Prime SAHARA with. + * + * @return void + */ +void sah_Queue_Manager_Prime(sah_Head_Desc * entry) +{ +#ifdef DIAG_DRV_QUEUE + LOG_KDIAG("Priming SAHARA"); + if (entry == NULL) { + LOG_KDIAG("Trying to prime SAHARA with a NULL entry pointer."); + } +#endif + +#ifndef SUBMIT_MULTIPLE_DARS + /* BUG FIX: state machine can transition from Done1 Busy2 directly + * to Idle. To fix that problem, only one DAR is being allowed on + * SAHARA at a time */ + if (sah_Find_With_State(SAH_STATE_ON_SAHARA) != NULL) { + return; + } +#endif + +#ifdef SAHARA_POWER_MANAGEMENT + /* check that dynamic power management is not asserted */ + if (!sah_dpm_flag) { +#endif + + /* Enable the SAHARA Clocks */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA : Enabling the IPG and AHB clocks\n") +#endif /*DIAG_DRV_IF */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_enable(SAHARA2_CLK); +#else + { + struct clk *clk = clk_get(NULL, "sahara_clk"); + if (clk != ERR_PTR(ENOENT)) + clk_enable(clk); + clk_put(clk); + } +#endif + + /* Make sure nothing is in the DAR */ + if (sah_HW_Read_DAR() == 0) { +#if defined(DIAG_DRV_IF) + sah_Dump_Chain(&entry->desc, entry->desc.dma_addr); +#endif /* DIAG_DRV_IF */ + + sah_HW_Write_DAR((entry->desc.dma_addr)); + entry->status = SAH_STATE_ON_SAHARA; + } +#ifdef DIAG_DRV_QUEUE + else { + LOG_KDIAG("DAR should be empty when Priming SAHARA"); + } +#endif +#ifdef SAHARA_POWER_MANAGEMENT + } +#endif +} + +#ifndef SAHARA_POLL_MODE + +/*! + * Reset SAHARA, then load the next descriptor on it, if one exists + */ +void sah_reset_sahara_request(void) +{ + sah_Head_Desc *desc; + os_lock_context_t lock_flags; + +#ifdef DIAG_DRV_STATUS + LOG_KDIAG("Sahara required reset from tasklet, replace chip"); +#endif + sah_HW_Reset(); + + /* Now stick in a waiting request */ + os_lock_save_context(desc_queue_lock, lock_flags); + if ((desc = sah_Find_With_State(SAH_STATE_PENDING))) { + sah_Queue_Manager_Prime(desc); + } + os_unlock_restore_context(desc_queue_lock, lock_flags); +} + +/*! + * Post-process a descriptor chain after the hardware has finished with it. + * + * The status of the descriptor could also be checked. (for FATAL or IGNORED). + * + * @param desc_head The finished chain + * @param error A boolean to mark whether hardware reported error + * + * @pre The #desc_queue_lock may not be held when calling this function. + */ +void sah_process_finished_request(sah_Head_Desc * desc_head, unsigned error) +{ + os_lock_context_t lock_flags; + + if (!error) { + desc_head->result = FSL_RETURN_OK_S; + } else if (desc_head->error_status == -1) { + /* Disaster! Sahara has faulted */ + desc_head->result = FSL_RETURN_ERROR_S; + } else { + /* translate from SAHARA error status to fsl_shw return values */ + desc_head->result = + sah_convert_error_status(desc_head->error_status); +#ifdef DIAG_DRV_STATUS + sah_Log_Error(desc_head->current_dar, desc_head->error_status, + desc_head->fault_address); +#endif + } + + /* Show that the request has been processd */ + desc_head->status = error ? SAH_STATE_FAILED : SAH_STATE_COMPLETE; + + if (desc_head->uco_flags & FSL_UCO_BLOCKING_MODE) { + + /* Wake up all processes on Sahara queue */ + wake_up_interruptible(int_queue); + + } else { + os_lock_save_context(desc_queue_lock, lock_flags); + sah_Queue_Append_Entry(&desc_head->user_info->result_pool, + desc_head); + os_unlock_restore_context(desc_queue_lock, lock_flags); + + /* perform callback */ + if (desc_head->uco_flags & FSL_UCO_CALLBACK_MODE) { + desc_head->user_info->callback(desc_head->user_info); + } + } +} /* sah_process_finished_request */ + +/*! Called from bottom half. + * + * @pre The #desc_queue_lock may not be held when calling this function. + */ +void sah_postprocess_queue(unsigned long reset_flag) +{ + + /* if SAHARA needs to be reset, do it here. This starts a descriptor chain + * if one is ready also */ + if (reset_flag) { + sah_reset_sahara_request(); + } + + /* now handle the descriptor chain(s) that has/have completed */ + do { + sah_Head_Desc *first_entry; + os_lock_context_t lock_flags; + + os_lock_save_context(desc_queue_lock, lock_flags); + + first_entry = main_queue->head; + if ((first_entry != NULL) && + (first_entry->status == SAH_STATE_OFF_SAHARA)) { + sah_Queue_Remove_Entry(main_queue); + os_unlock_restore_context(desc_queue_lock, lock_flags); + + sah_process_finished_request(first_entry, + (first_entry-> + error_status != 0)); + } else { + os_unlock_restore_context(desc_queue_lock, lock_flags); + break; + } + } while (1); + + return; +} + +#endif /* ifndef SAHARA_POLL_MODE */ + +/*! + * This is a helper function for Queue Manager. This function finds the first + * entry in the Queue Manager's queue whose state matches the given input + * state. This function starts at the head of the queue and works towards the + * tail. If a matching entry was found, the address of the entry is returned. + * + * @brief Handle the IDLE state. + * + * @param state A sah_Queue_Status value. + * + * @pre The #desc_queue_lock must be held before calling this function. + * + * @return A pointer to a sah_Head_Desc that matches the given state. + * @return NULL otherwise. + */ +sah_Head_Desc *sah_Find_With_State(sah_Queue_Status state) +{ + sah_Head_Desc *current_entry = NULL; + sah_Head_Desc *ret_val = NULL; + int done_looping = FALSE; + + /* Start at the head */ + current_entry = main_queue->head; + + while ((current_entry != NULL) && (done_looping == FALSE)) { + if (current_entry->status == state) { + done_looping = TRUE; + ret_val = current_entry; + } + /* Jump to the next entry. */ + current_entry = current_entry->next; + } + + return ret_val; +} /* sah_postprocess_queue */ + +/*! + * Process the value from the Sahara error status register and convert it into + * an FSL SHW API error code. + * + * Warning, this routine must only be called if an error exists. + * + * @param error_status The value from the error status register. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_convert_error_status(uint32_t error_status) +{ + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; /* catchall */ + uint8_t error_source; + uint8_t DMA_error_status; + uint8_t DMA_error_size; + + /* get the error source from the error status register */ + error_source = error_status & SAH_ERROR_MASK; + + /* array size is maximum allowed by mask, so no boundary checking is + * needed here */ + ret = sah_Execute_Error_Array[error_source]; + + /* is this one that needs additional fields checked to determine the + * error condition? */ + if (ret == SHA_ERROR_STATUS_CONTINUE) { + /* check the DMA fields */ + if (error_source == SAH_ERR_DMA) { + /* get the DMA transfer error size. If this indicates that no + * error was detected, something is seriously wrong */ + DMA_error_size = + (error_status >> 9) & SAH_DMA_ERR_SIZE_MASK; + if (DMA_error_size == SAH_DMA_NO_ERR) { + ret = FSL_RETURN_INTERNAL_ERROR_S; + } else { + /* get DMA error status */ + DMA_error_status = (error_status >> 12) & + SAH_DMA_ERR_STATUS_MASK; + + /* the DMA error bits cover all the even numbers. By dividing + * by 2 it can be used as an index into the error array */ + ret = + sah_DMA_Error_Status_Array[DMA_error_status + >> 1]; + } + } else { /* not SAH_ERR_DMA, so must be SAH_ERR_CHA */ + uint16_t CHA_error_status; + uint8_t CHA_error_source; + + /* get CHA Error Source. If this indicates that no error was + * detected, something is seriously wrong */ + CHA_error_source = + (error_status >> 28) & SAH_CHA_ERR_SOURCE_MASK; + if (CHA_error_source == SAH_CHA_NO_ERROR) { + ret = FSL_RETURN_INTERNAL_ERROR_S; + } else { + uint32_t mask = 1; + uint32_t count = 0; + + /* get CHA Error Status */ + CHA_error_status = (error_status >> 16) & + SAH_CHA_ERR_STATUS_MASK; + + /* If more than one bit is set (which shouldn't happen), only + * the first will be captured */ + if (CHA_error_status != 0) { + count = 1; + while (CHA_error_status != mask) { + ++count; + mask <<= 1; + } + } + + ret = sah_CHA_Error_Status_Array[count]; + } + } + } + + return ret; +} + +fsl_shw_return_t sah_convert_op_status(uint32_t op_status) +{ + unsigned op_source = (op_status >> 28) & 0x7; + unsigned op_detail = op_status & 0x3f; + fsl_shw_return_t ret = FSL_RETURN_ERROR_S; + + switch (op_source) { + case 1: /* SKHA */ + /* Can't this have "ICV" error from CCM ?? */ + break; + case 2: /* MDHA */ + if (op_detail == 1) { + ret = FSL_RETURN_AUTH_FAILED_S; + } + break; + case 3: /* RNGA */ + /* Self-test and Compare errors... what to do? */ + break; + case 4: /* PKHA */ + switch (op_detail) { + case 0x01: + ret = FSL_RETURN_PRIME_S; + break; + case 0x02: + ret = FSL_RETURN_NOT_PRIME_S; + break; + case 0x04: + ret = FSL_RETURN_POINT_AT_INFINITY_S; + break; + case 0x08: + ret = FSL_RETURN_POINT_NOT_AT_INFINITY_S; + break; + case 0x10: + ret = FSL_RETURN_GCD_IS_ONE_S; + break; + case 0x20: + ret = FSL_RETURN_GCD_IS_NOT_ONE_S; + break; + default: + break; + } + break; + default: + break; + } + return ret; +} + +#ifdef DIAG_DRV_STATUS + +/*! + * This function logs the diagnostic information for the given error and + * descriptor address. Only used for diagnostic purposes. + * + * @brief (debug only) Log a description of hardware-detected error. + * + * @param descriptor The descriptor address that caused the error + * @param error The SAHARA error code + * @param fault_address Value from the Fault address register + * + * @return void + */ +void sah_Log_Error(uint32_t descriptor, uint32_t error, uint32_t fault_address) +{ + char *source_text; /* verbose error source from register */ + char *address; /* string buffer for descriptor address */ + char *error_log; /* the complete logging message */ + char *cha_log = NULL; /* string buffer for descriptor address */ + char *dma_log = NULL; /* string buffer for descriptor address */ + + uint16_t cha_error = 0; + uint16_t dma_error = 0; + + uint8_t error_source; + sah_Execute_Error return_code; + + /* log error code and descriptor address */ + error_source = error & SAH_ERROR_MASK; + return_code = sah_Execute_Error_Array[error_source]; + + source_text = os_alloc_memory(64, GFP_KERNEL); + + switch (error_source) { + case SAH_ERR_HEADER: + sprintf(source_text, "%s", "Header is not valid"); + break; + + case SAH_ERR_DESC_LENGTH: + sprintf(source_text, "%s", + "Descriptor length not equal to sum of link lengths"); + break; + + case SAH_ERR_DESC_POINTER: + sprintf(source_text, "%s", "Length or pointer " + "field is zero while the other is non-zero"); + break; + + case SAH_ERR_LINK_LENGTH: + /* note that the Sahara Block Guide 2.7 has an invalid explaination + * of this. It only happens when a link length is zero */ + sprintf(source_text, "%s", "A data length is a link is zero"); + break; + + case SAH_ERR_LINK_POINTER: + sprintf(source_text, "%s", + "The data pointer in a link is zero"); + break; + + case SAH_ERR_INPUT_BUFFER: + sprintf(source_text, "%s", "Input Buffer reported an overflow"); + break; + + case SAH_ERR_OUTPUT_BUFFER: + sprintf(source_text, "%s", + "Output Buffer reported an underflow"); + break; + + case SAH_ERR_OUTPUT_BUFFER_STARVATION: + sprintf(source_text, "%s", "Incorrect data in output " + "buffer after CHA has signalled 'done'"); + break; + + case SAH_ERR_INTERNAL_STATE: + sprintf(source_text, "%s", "Internal Hardware Failure"); + break; + + case SAH_ERR_GENERAL_DESCRIPTOR: + sprintf(source_text, "%s", + "Current Descriptor was not legal, but cause is unknown"); + break; + + case SAH_ERR_RESERVED_FIELDS: + sprintf(source_text, "%s", + "Reserved pointer field is non-zero"); + break; + + case SAH_ERR_DESCRIPTOR_ADDRESS: + sprintf(source_text, "%s", + "Descriptor address not word aligned"); + break; + + case SAH_ERR_LINK_ADDRESS: + sprintf(source_text, "%s", "Link address not word aligned"); + break; + + case SAH_ERR_CHA: + sprintf(source_text, "%s", "CHA Error"); + { + char *cha_module = os_alloc_memory(5, GFP_KERNEL); + char *cha_text = os_alloc_memory(45, GFP_KERNEL); + + cha_error = (error >> 28) & SAH_CHA_ERR_SOURCE_MASK; + + switch (cha_error) { + case SAH_CHA_SKHA_ERROR: + sprintf(cha_module, "%s", "SKHA"); + break; + + case SAH_CHA_MDHA_ERROR: + sprintf(cha_module, "%s", "MDHA"); + break; + + case SAH_CHA_RNG_ERROR: + sprintf(cha_module, "%s", "RNG "); + break; + + case SAH_CHA_PKHA_ERROR: + sprintf(cha_module, "%s", "PKHA"); + break; + + case SAH_CHA_NO_ERROR: + /* can't happen */ + /* no break */ + default: + sprintf(cha_module, "%s", "????"); + break; + } + + cha_error = (error >> 16) & SAH_CHA_ERR_STATUS_MASK; + + /* Log CHA Error Status */ + switch (cha_error) { + case SAH_CHA_IP_BUF: + sprintf(cha_text, "%s", + "Non-empty input buffer when done"); + break; + + case SAH_CHA_ADD_ERR: + sprintf(cha_text, "%s", "Illegal address"); + break; + + case SAH_CHA_MODE_ERR: + sprintf(cha_text, "%s", "Illegal mode"); + break; + + case SAH_CHA_DATA_SIZE_ERR: + sprintf(cha_text, "%s", "Illegal data size"); + break; + + case SAH_CHA_KEY_SIZE_ERR: + sprintf(cha_text, "%s", "Illegal key size"); + break; + + case SAH_CHA_PROC_ERR: + sprintf(cha_text, "%s", + "Mode/Context/Key written during processing"); + break; + + case SAH_CHA_CTX_READ_ERR: + sprintf(cha_text, "%s", + "Context read during processing"); + break; + + case SAH_CHA_INTERNAL_HW_ERR: + sprintf(cha_text, "%s", "Internal hardware"); + break; + + case SAH_CHA_IP_BUFF_ERR: + sprintf(cha_text, "%s", + "Input buffer not enabled or underflow"); + break; + + case SAH_CHA_OP_BUFF_ERR: + sprintf(cha_text, "%s", + "Output buffer not enabled or overflow"); + break; + + case SAH_CHA_DES_KEY_ERR: + sprintf(cha_text, "%s", "DES key parity error"); + break; + + case SAH_CHA_RES: + sprintf(cha_text, "%s", "Reserved"); + break; + + case SAH_CHA_NO_ERR: + /* can't happen */ + /* no break */ + default: + sprintf(cha_text, "%s", "Unknown error"); + break; + } + + cha_log = os_alloc_memory(90, GFP_KERNEL); + sprintf(cha_log, + " Module %s encountered the error: %s.", + cha_module, cha_text); + + os_free_memory(cha_module); + os_free_memory(cha_text); + + { + uint32_t mask = 1; + uint32_t count = 0; + + if (cha_error != 0) { + count = 1; + while (cha_error != mask) { + ++count; + mask <<= 1; + } + } + + return_code = sah_CHA_Error_Status_Array[count]; + } + cha_error = 1; + } + break; + + case SAH_ERR_DMA: + sprintf(source_text, "%s", "DMA Error"); + { + char *dma_direction = os_alloc_memory(6, GFP_KERNEL); + char *dma_size = os_alloc_memory(14, GFP_KERNEL); + char *dma_text = os_alloc_memory(250, GFP_KERNEL); + + if ((dma_direction == NULL) || (dma_size == NULL) || + (dma_text == NULL)) { + LOG_KDIAG + ("No memory allocated for DMA debug messages\n"); + } + + /* log DMA error direction */ + sprintf(dma_direction, "%s", + (((error >> 8) & SAH_DMA_ERR_DIR_MASK) == 1) ? + "read" : "write"); + + /* log the size of the DMA transfer error */ + dma_error = (error >> 9) & SAH_DMA_ERR_SIZE_MASK; + switch (dma_error) { + case SAH_DMA_SIZE_BYTE: + sprintf(dma_size, "%s", "byte"); + break; + + case SAH_DMA_SIZE_HALF_WORD: + sprintf(dma_size, "%s", "half-word"); + break; + + case SAH_DMA_SIZE_WORD: + sprintf(dma_size, "%s", "word"); + break; + + case SAH_DMA_SIZE_RES: + sprintf(dma_size, "%s", "reserved size"); + break; + + default: + sprintf(dma_size, "%s", "unknown size"); + break; + } + + /* log DMA error status */ + dma_error = (error >> 12) & SAH_DMA_ERR_STATUS_MASK; + switch (dma_error) { + case SAH_DMA_NO_ERR: + sprintf(dma_text, "%s", "No DMA Error Code"); + break; + + case SAH_DMA_AHB_ERR: + sprintf(dma_text, "%s", + "AHB terminated a bus cycle with an error"); + break; + + case SAH_DMA_IP_ERR: + sprintf(dma_text, "%s", + "Internal IP bus cycle was terminated with an " + "error termination. This would likely be " + "caused by a descriptor length being too " + "large, and thus accessing an illegal " + "internal address. Verify the length field " + "of the current descriptor"); + break; + + case SAH_DMA_PARITY_ERR: + sprintf(dma_text, "%s", + "Parity error detected on DMA command from " + "Descriptor Decoder. Cause is likely to be " + "internal hardware fault"); + break; + + case SAH_DMA_BOUNDRY_ERR: + sprintf(dma_text, "%s", + "DMA was requested to cross a 256 byte " + "internal address boundary. Cause is likely a " + "descriptor length being too large, thus " + "accessing two different internal hardware " + "blocks"); + break; + + case SAH_DMA_BUSY_ERR: + sprintf(dma_text, "%s", + "Descriptor Decoder has made a DMA request " + "while the DMA controller is busy. Cause is " + "likely due to hardware fault"); + break; + + case SAH_DMA_RESERVED_ERR: + sprintf(dma_text, "%s", "Reserved"); + break; + + case SAH_DMA_INT_ERR: + sprintf(dma_text, "%s", + "Internal DMA hardware error detected. The " + "DMA controller has detected an internal " + "condition which should never occur"); + break; + + default: + sprintf(dma_text, "%s", + "Unknown DMA Error Status Code"); + break; + } + + return_code = + sah_DMA_Error_Status_Array[dma_error >> 1]; + dma_error = 1; + + dma_log = os_alloc_memory(320, GFP_KERNEL); + sprintf(dma_log, + " Occurred during a %s operation of a %s transfer: %s.", + dma_direction, dma_size, dma_text); + + os_free_memory(dma_direction); + os_free_memory(dma_size); + os_free_memory(dma_text); + } + break; + + case SAH_ERR_NONE: + default: + sprintf(source_text, "%s", "Unknown Error Code"); + break; + } + + address = os_alloc_memory(35, GFP_KERNEL); + + /* convert error & descriptor address to strings */ + if (dma_error) { + sprintf(address, "Fault address is 0x%08x", fault_address); + } else { + sprintf(address, "Descriptor bus address is 0x%08x", + descriptor); + } + + if (return_code > FSL_INVALID_RETURN) { + return_code = FSL_INVALID_RETURN; + } + + error_log = os_alloc_memory(250, GFP_KERNEL); + + /* construct final log message */ + sprintf(error_log, "Error source = 0x%08x. Return = %s. %s. %s.", + error, sah_return_text[return_code], address, source_text); + + os_free_memory(source_text); + os_free_memory(address); + + /* log standard messages */ + LOG_KDIAG(error_log); + os_free_memory(error_log); + + /* add additional information if available */ + if (cha_error) { + LOG_KDIAG(cha_log); + os_free_memory(cha_log); + } + + if (dma_error) { + LOG_KDIAG(dma_log); + os_free_memory(dma_log); + } + + return; +} /* sah_Log_Error */ + +#endif /* DIAG_DRV_STATUS */ + +/* End of sah_queue_manager.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_sym.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_sym.c @@ -0,0 +1,281 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_sym.c + * + * This file implements Symmetric Cipher functions of the FSL SHW API for + * Sahara. This does not include CCM. + */ + +#include "sahara.h" +#include "fsl_platform.h" + +#include "sf_util.h" +#include "adaptor.h" + +#ifdef LINUX_KERNEL +EXPORT_SYMBOL(fsl_shw_symmetric_encrypt); +EXPORT_SYMBOL(fsl_shw_symmetric_decrypt); +#endif + +#if defined(NEED_CTR_WORKAROUND) +/* CTR mode needs block-multiple data in/out */ +#define LENGTH_PATCH (sym_ctx->block_size_bytes) +#define LENGTH_PATCH_MASK (sym_ctx->block_size_bytes-1) +#else +#define LENGTH_PATCH 0 +#define LENGTH_PATCH_MASK 0 /* du not use! */ +#endif + +/*! + * Block of zeroes which is maximum Symmetric block size, used for + * initializing context register, etc. + */ +static uint32_t block_zeros[4] = { + 0, 0, 0, 0 +}; + +typedef enum cipher_direction { + SYM_DECRYPT, + SYM_ENCRYPT +} cipher_direction_t; + +/*! + * Create and run the chain for a symmetric-key operation. + * + * @param user_ctx Who the user is + * @param key_info What key is to be used + * @param sym_ctx Info details about algorithm + * @param encrypt 0 = decrypt, non-zero = encrypt + * @param length Number of octets at @a in and @a out + * @param in Pointer to input data + * @param out Location to store output data + * + * @return The status of handing chain to driver, + * or an earlier argument/flag or allocation + * error. + */ +static fsl_shw_return_t do_symmetric(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + cipher_direction_t encrypt, + uint32_t length, + const uint8_t * in, uint8_t * out) +{ + SAH_SF_DCLS; + uint8_t *sink = NULL; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + sah_Oct_Str ptr1; + uint32_t size1 = sym_ctx->block_size_bytes; + + SAH_SF_USER_CHECK(); + + /* Two different sets of chains, depending on algorithm */ + if (key_info->algorithm == FSL_KEY_ALG_ARC4) { + if (sym_ctx->flags & FSL_SYM_CTX_INIT) { + /* Desc. #35 w/ARC4 - start from key */ + header = SAH_HDR_ARC4_SET_MODE_KEY + ^ sah_insert_skha_algorithm_arc4; + + DESC_IN_KEY(header, 0, NULL, key_info); + } else { /* load SBox */ + /* Desc. #33 w/ARC4 and NO PERMUTE */ + header = SAH_HDR_ARC4_SET_MODE_SBOX + ^ sah_insert_skha_no_permute + ^ sah_insert_skha_algorithm_arc4; + DESC_IN_IN(header, 256, sym_ctx->context, + 3, sym_ctx->context + 256); + } /* load SBox */ + + /* Add in-out data descriptor to process the data */ + if (length != 0) { + DESC_IN_OUT(SAH_HDR_SKHA_ENC_DEC, length, in, length, + out); + } + + /* Operation is done ... save what came out? */ + if (sym_ctx->flags & FSL_SYM_CTX_SAVE) { + /* Desc. #34 - Read SBox, pointers */ + header = SAH_HDR_ARC4_READ_SBOX; + DESC_OUT_OUT(header, 256, sym_ctx->context, + 3, sym_ctx->context + 256); + } + } else { /* not ARC4 */ + /* Doing 1- or 2- descriptor chain. */ + /* Desc. #1 and algorithm and mode */ + header = SAH_HDR_SKHA_SET_MODE_IV_KEY + ^ sah_insert_skha_mode[sym_ctx->mode] + ^ sah_insert_skha_algorithm[key_info->algorithm]; + + /* Honor 'no key parity checking' for DES and TDES */ + if ((key_info->flags & FSL_SKO_KEY_IGNORE_PARITY) && + ((key_info->algorithm == FSL_KEY_ALG_DES) || + (key_info->algorithm == FSL_KEY_ALG_TDES))) { + header ^= sah_insert_skha_no_key_parity; + } + + /* Header by default is decrypting, so... */ + if (encrypt == SYM_ENCRYPT) { + header ^= sah_insert_skha_encrypt; + } + + if (sym_ctx->mode == FSL_SYM_MODE_CTR) { + header ^= sah_insert_skha_modulus[sym_ctx->modulus_exp]; + } + + if (sym_ctx->mode == FSL_SYM_MODE_ECB) { + ptr1 = NULL; + size1 = 0; + } else if (sym_ctx->flags & FSL_SYM_CTX_INIT) { + ptr1 = (uint8_t *) block_zeros; + } else { + ptr1 = sym_ctx->context; + } + + DESC_IN_KEY(header, sym_ctx->block_size_bytes, ptr1, key_info); + + /* Add in-out data descriptor */ + if (length != 0) { + header = SAH_HDR_SKHA_ENC_DEC; + if (LENGTH_PATCH && (sym_ctx->mode == FSL_SYM_MODE_CTR) + && ((length & LENGTH_PATCH_MASK) != 0)) { + sink = DESC_TEMP_ALLOC(LENGTH_PATCH); + ret = + sah_Create_Link(user_ctx->mem_util, &link1, + (uint8_t *) in, length, + SAH_USES_LINK_DATA); + ret = + sah_Append_Link(user_ctx->mem_util, link1, + (uint8_t *) sink, + LENGTH_PATCH - + (length & + LENGTH_PATCH_MASK), + SAH_USES_LINK_DATA); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + ret = + sah_Create_Link(user_ctx->mem_util, &link2, + out, length, + SAH_USES_LINK_DATA | + SAH_OUTPUT_LINK); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + ret = sah_Append_Link(user_ctx->mem_util, link2, + sink, + LENGTH_PATCH - + (length & + LENGTH_PATCH_MASK), + SAH_USES_LINK_DATA); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + ret = + sah_Append_Desc(user_ctx->mem_util, + &desc_chain, header, link1, + link2); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + link1 = link2 = NULL; + } else { + DESC_IN_OUT(header, length, in, length, out); + } + } + + /* Unload any desired context */ + if (sym_ctx->flags & FSL_SYM_CTX_SAVE) { + DESC_OUT_OUT(SAH_HDR_SKHA_READ_CONTEXT_IV, 0, NULL, + sym_ctx->block_size_bytes, + sym_ctx->context); + } + + } /* not ARC4 */ + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + DESC_TEMP_FREE(sink); + if (LENGTH_PATCH) { + sah_Destroy_Link(user_ctx->mem_util, link1); + sah_Destroy_Link(user_ctx->mem_util, link2); + } + + return ret; +} + +/* REQ-S2LRD-PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ + +/*! + * Compute symmetric encryption + * + * + * @param user_ctx + * @param key_info + * @param sym_ctx + * @param length + * @param pt + * @param ct + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, uint8_t * ct) +{ + fsl_shw_return_t ret; + + ret = do_symmetric(user_ctx, key_info, sym_ctx, SYM_ENCRYPT, + length, pt, ct); + + return ret; +} + +/* PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ + +/*! + * Compute symmetric decryption + * + * + * @param user_ctx + * @param key_info + * @param sym_ctx + * @param length + * @param pt + * @param ct + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, uint8_t * pt) +{ + fsl_shw_return_t ret; + + ret = do_symmetric(user_ctx, key_info, sym_ctx, SYM_DECRYPT, + length, ct, pt); + + return ret; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sf_util.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sf_util.c @@ -0,0 +1,1390 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sf_util.c +* +* @brief Security Functions component API - Utility functions +* +* These are the 'Sahara api' functions which are used by the higher-level +* FSL SHW API to build and then execute descriptor chains. +*/ + + +#include "sf_util.h" +#include + +#ifdef DIAG_SECURITY_FUNC +#include +#endif /*DIAG_SECURITY_FUNC*/ + + +#ifdef __KERNEL__ +EXPORT_SYMBOL(sah_Append_Desc); +EXPORT_SYMBOL(sah_Append_Link); +EXPORT_SYMBOL(sah_Create_Link); +EXPORT_SYMBOL(sah_Create_Key_Link); +EXPORT_SYMBOL(sah_Destroy_Link); +EXPORT_SYMBOL(sah_Descriptor_Chain_Execute); +EXPORT_SYMBOL(sah_insert_mdha_algorithm); +EXPORT_SYMBOL(sah_insert_skha_algorithm); +EXPORT_SYMBOL(sah_insert_skha_mode); +EXPORT_SYMBOL(sah_insert_skha_modulus); +EXPORT_SYMBOL(sah_Descriptor_Chain_Destroy); +EXPORT_SYMBOL(sah_add_two_in_desc); +EXPORT_SYMBOL(sah_add_in_key_desc); +EXPORT_SYMBOL(sah_add_two_out_desc); +EXPORT_SYMBOL(sah_add_in_out_desc); +EXPORT_SYMBOL(sah_add_key_out_desc); +#endif + +#ifdef DEBUG_REWORK +#ifndef __KERNEL__ +#include +#define os_printk printf +#endif +#endif + +/** + * Convert fsl_shw_hash_alg_t to mdha mode bits. + * + * Index must be maintained in order of fsl_shw_hash_alg_t enumeration!!! + */ +const uint32_t sah_insert_mdha_algorithm[] = +{ + [FSL_HASH_ALG_MD5] = sah_insert_mdha_algorithm_md5, + [FSL_HASH_ALG_SHA1] = sah_insert_mdha_algorithm_sha1, + [FSL_HASH_ALG_SHA224] = sah_insert_mdha_algorithm_sha224, + [FSL_HASH_ALG_SHA256] = sah_insert_mdha_algorithm_sha256, +}; + +/** + * Header bits for Algorithm field of SKHA header + * + * Index value must be kept in sync with fsl_shw_key_alg_t + */ +const uint32_t sah_insert_skha_algorithm[] = +{ + [FSL_KEY_ALG_HMAC] = 0x00000040, + [FSL_KEY_ALG_AES] = sah_insert_skha_algorithm_aes, + [FSL_KEY_ALG_DES] = sah_insert_skha_algorithm_des, + [FSL_KEY_ALG_TDES] = sah_insert_skha_algorithm_tdes, + [FSL_KEY_ALG_ARC4] = sah_insert_skha_algorithm_arc4, +}; + + +/** + * Header bits for MODE field of SKHA header + * + * Index value must be kept in sync with fsl_shw_sym_mod_t + */ +const uint32_t sah_insert_skha_mode[] = +{ + [FSL_SYM_MODE_STREAM] = sah_insert_skha_mode_ecb, + [FSL_SYM_MODE_ECB] = sah_insert_skha_mode_ecb, + [FSL_SYM_MODE_CBC] = sah_insert_skha_mode_cbc, + [FSL_SYM_MODE_CTR] = sah_insert_skha_mode_ctr, +}; + + +/** + * Header bits to set CTR modulus size. These have parity + * included to allow XOR insertion of values. + * + * @note Must be kept in sync with fsl_shw_ctr_mod_t + */ +const uint32_t sah_insert_skha_modulus[] = +{ + [FSL_CTR_MOD_8] = 0x00000000, /**< 2**8 */ + [FSL_CTR_MOD_16] = 0x80000200, /**< 2**16 */ + [FSL_CTR_MOD_24] = 0x80000400, /**< 2**24 */ + [FSL_CTR_MOD_32] = 0x00000600, /**< 2**32 */ + [FSL_CTR_MOD_40] = 0x80000800, /**< 2**40 */ + [FSL_CTR_MOD_48] = 0x00000a00, /**< 2**48 */ + [FSL_CTR_MOD_56] = 0x00000c00, /**< 2**56 */ + [FSL_CTR_MOD_64] = 0x80000e00, /**< 2**64 */ + [FSL_CTR_MOD_72] = 0x80001000, /**< 2**72 */ + [FSL_CTR_MOD_80] = 0x00001200, /**< 2**80 */ + [FSL_CTR_MOD_88] = 0x00001400, /**< 2**88 */ + [FSL_CTR_MOD_96] = 0x80001600, /**< 2**96 */ + [FSL_CTR_MOD_104] = 0x00001800, /**< 2**104 */ + [FSL_CTR_MOD_112] = 0x80001a00, /**< 2**112 */ + [FSL_CTR_MOD_120] = 0x80001c00, /**< 2**120 */ + [FSL_CTR_MOD_128] = 0x00001e00 /**< 2**128 */ +}; + + +/****************************************************************************** +* Internal function declarations +******************************************************************************/ +static fsl_shw_return_t sah_Create_Desc( + const sah_Mem_Util *mu, + sah_Desc ** desc, + int head, + uint32_t header, + sah_Link * link1, + sah_Link * link2); + + +/** + * Create a descriptor chain using the the header and links passed in as + * parameters. The newly created descriptor will be added to the end of + * the descriptor chain passed. + * + * If @a desc_head points to a NULL value, then a sah_Head_Desc will be created + * as the first descriptor. Otherwise a sah_Desc will be created and appended. + * + * @pre + * + * - None + * + * @post + * + * - A descriptor has been created from the header, link1 and link2. + * + * - The newly created descriptor has been appended to the end of + * desc_head, or its location stored into the location pointed to by + * @a desc_head. + * + * - On allocation failure, @a link1 and @a link2 will be destroyed., and + * @a desc_head will be untouched. + * + * @brief Create and append descriptor chain, inserting header and links + * pointing to link1 and link2 + * + * @param mu Memory functions + * @param header Value of descriptor header to be added + * @param desc_head Pointer to head of descriptor chain to append new desc + * @param link1 Pointer to sah_Link 1 (or NULL) + * @param link2 Pointer to sah_Link 2 (or NULL) + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_Append_Desc( + const sah_Mem_Util *mu, + sah_Head_Desc **desc_head, + const uint32_t header, + sah_Link *link1, + sah_Link *link2) +{ + fsl_shw_return_t status; + sah_Desc *desc; + sah_Desc *desc_ptr; + + + status = sah_Create_Desc(mu, (sah_Desc**)&desc, (*desc_head == NULL), + header, link1, link2); + /* append newly created descriptor to end of current chain */ + if (status == FSL_RETURN_OK_S) { + if (*desc_head == NULL) { + (*desc_head) = (sah_Head_Desc*)desc; + (*desc_head)->out1_ptr = NULL; + (*desc_head)->out2_ptr = NULL; + + } else { + desc_ptr = (sah_Desc*)*desc_head; + while (desc_ptr->next != NULL) { + desc_ptr = desc_ptr->next; + } + desc_ptr->next = desc; + } + } + + return status; +} + + +/** + * Releases the memory allocated by the Security Function library for + * descriptors, links and any internally allocated memory referenced in the + * given chain. Note that memory allocated by user applications is not + * released. + * + * @post The @a desc_head pointer will be set to NULL to prevent further use. + * + * @brief Destroy a descriptor chain and free memory of associated links + * + * @param mu Memory functions + * @param desc_head Pointer to head of descriptor chain to be freed + * + * @return none + */ +void sah_Descriptor_Chain_Destroy ( + const sah_Mem_Util *mu, + sah_Head_Desc **desc_head) +{ + sah_Desc *desc_ptr = &(*desc_head)->desc; + sah_Head_Desc *desc_head_ptr = (sah_Head_Desc *)desc_ptr; + + while (desc_ptr != NULL) { + register sah_Desc *next_desc_ptr; + + if (desc_ptr->ptr1 != NULL) { + sah_Destroy_Link(mu, desc_ptr->ptr1); + } + if (desc_ptr->ptr2 != NULL) { + sah_Destroy_Link(mu, desc_ptr->ptr2); + } + + next_desc_ptr = desc_ptr->next; + + /* Be sure to free head descriptor as such */ + if (desc_ptr == (sah_Desc*)desc_head_ptr) { + mu->mu_free_head_desc(mu->mu_ref, desc_head_ptr); + } else { + mu->mu_free_desc(mu->mu_ref, desc_ptr); + } + + desc_ptr = next_desc_ptr; + } + + *desc_head = NULL; +} + + +#ifndef NO_INPUT_WORKAROUND +/** + * Reworks the link chain + * + * @brief Reworks the link chain + * + * @param mu Memory functions + * @param link Pointer to head of link chain to be reworked + * + * @return none + */ +static fsl_shw_return_t sah_rework_link_chain( + const sah_Mem_Util *mu, + sah_Link* link) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + int found_potential_problem = 0; + uint32_t total_data = 0; +#ifdef DEBUG_REWORK + sah_Link* first_link = link; +#endif + + if ((link->flags & SAH_OUTPUT_LINK)) { + return status; + } + + while (link != NULL) { + total_data += link->len; + + /* Only non-key Input Links are affected by the DMA flush-to-FIFO + * problem */ + + /* If have seen problem and at end of chain... */ + if (found_potential_problem && (link->next == NULL) && + (total_data > 16)) { + /* insert new 1-byte link */ + sah_Link* new_tail_link = mu->mu_alloc_link(mu->mu_ref); + if (new_tail_link == NULL) { + status = FSL_RETURN_NO_RESOURCE_S; + } else { +#ifdef DEBUG_REWORK + sah_Link* dump_link = first_link; + while (dump_link != NULL) { + uint32_t i; + unsigned bytes_to_dump = (dump_link->len > 32) ? + 32 : dump_link->len; + os_printk("(rework)Link %p: %p/%u/%p\n", dump_link, + dump_link->data, dump_link->len, + dump_link->next); + if (!(dump_link->flags & SAH_STORED_KEY_INFO)) { + os_printk("(rework)Data %p: ", dump_link->data); + for (i = 0; i < bytes_to_dump; i++) { + os_printk("%02X ", dump_link->data[i]); + } + os_printk("\n"); + } + else { + os_printk("rework)Data %p: Red key data\n", dump_link); + } + dump_link = dump_link->next; + } +#endif + link->len--; + link->next = new_tail_link; + new_tail_link->len = 1; + new_tail_link->data = link->data+link->len; + new_tail_link->flags = link->flags & ~(SAH_OWNS_LINK_DATA); + new_tail_link->next = NULL; + link = new_tail_link; +#ifdef DEBUG_REWORK + os_printk("(rework)New link chain:\n"); + dump_link = first_link; + while (dump_link != NULL) { + uint32_t i; + unsigned bytes_to_dump = (dump_link->len > 32) ? + 32 : dump_link->len; + + os_printk("Link %p: %p/%u/%p\n", dump_link, + dump_link->data, dump_link->len, + dump_link->next); + if (!(dump_link->flags & SAH_STORED_KEY_INFO)) { + os_printk("Data %p: ", dump_link->data); + for (i = 0; i < bytes_to_dump; i++) { + os_printk("%02X ", dump_link->data[i]); + } + os_printk("\n"); + } + else { + os_printk("Data %p: Red key data\n", dump_link); + } + dump_link = dump_link->next; + } +#endif + } + } else if ((link->len % 4) || ((uint32_t)link->data % 4)) { + found_potential_problem = 1; + } + + link = link->next; + } + + return status; +} + + +/** + * Rework links to avoid H/W bug + * + * @param head Beginning of descriptor chain + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t sah_rework_links( + const sah_Mem_Util *mu, + sah_Head_Desc *head) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Desc* desc = &head->desc; + + while ((status == FSL_RETURN_OK_S) && (desc != NULL)) { + if (desc->header & SAH_HDR_LLO) { + status = FSL_RETURN_ERROR_S; + break; + } + if (desc->ptr1 != NULL) { + status = sah_rework_link_chain(mu, desc->ptr1); + } + if ((status == FSL_RETURN_OK_S) && (desc->ptr2 != NULL)) { + status = sah_rework_link_chain(mu, desc->ptr2); + } + desc = desc->next; + } + + return status; +} +#endif /* NO_INPUT_WORKAROUND */ + + +/** + * Send a descriptor chain to the SAHARA driver for processing. + * + * Note that SAHARA will read the input data from and write the output data + * directly to the locations indicated during construction of the chain. + * + * @pre + * + * - None + * + * @post + * + * - @a head will have been executed on SAHARA + * - @a head Will be freed unless a SAVE flag is set + * + * @brief Execute a descriptor chain + * + * @param head Pointer to head of descriptor chain to be executed + * @param user_ctx The user context on which to execute the descriptor chain. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_Descriptor_Chain_Execute( + sah_Head_Desc *head, + fsl_shw_uco_t *user_ctx) +{ + fsl_shw_return_t status; + + /* Check for null pointer or non-multiple-of-four value */ + if ((head == NULL) || ((uint32_t)head & 0x3)) { + status = FSL_RETURN_ERROR_S; + goto out; + } + +#ifndef NO_INPUT_WORKAROUND + status = sah_rework_links(user_ctx->mem_util, head); + if (status != FSL_RETURN_OK_S) { + goto out; + } +#endif + + /* complete the information in the descriptor chain head node */ + head->user_ref = user_ctx->user_ref; + head->uco_flags = user_ctx->flags; + head->next = NULL; /* driver will use this to link chain heads */ + + status = adaptor_Exec_Descriptor_Chain(head, user_ctx); + +#ifdef DIAG_SECURITY_FUNC + if (status == FSL_RETURN_OK_S) + LOG_DIAG("after exec desc chain: status is ok\n"); + else + LOG_DIAG("after exec desc chain: status is not ok\n"); +#endif + + out: + return status; +} + + +/** + * Create Link + * + * @brief Allocate Memory for Link structure and populate using input + * parameters + * + * @post On allocation failure, @a p will be freed if #SAH_OWNS_LINK_DATA is + * p set in @a flags. + + * @param mu Memory functions + * @param link Pointer to link to be created + * @param p Pointer to data to use in link + * @param length Length of buffer 'p' in bytes + * @param flags Indicates whether memory has been allocated by the calling + * function or the security function + * + * @return FSL_RETURN_OK_S or FSL_RETURN_NO_RESOURCE_S + */ +fsl_shw_return_t sah_Create_Link( + const sah_Mem_Util *mu, + sah_Link **link, + uint8_t *p, + const size_t length, + const sah_Link_Flags flags) +{ + +#ifdef DIAG_SECURITY_FUNC + + char diag[50]; +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + fsl_shw_return_t status = FSL_RETURN_NO_RESOURCE_S; + + + *link = mu->mu_alloc_link(mu->mu_ref); + + /* populate link if memory allocation successful */ + if (*link != NULL) { + (*link)->len = length; + (*link)->data = p; + (*link)->next = NULL; + (*link)->flags = flags; + status = FSL_RETURN_OK_S; + +#ifdef DIAG_SECURITY_FUNC + + LOG_DIAG("Created Link"); + LOG_DIAG("------------"); + sprintf(diag," address = 0x%x", (int) *link); + LOG_DIAG(diag); + sprintf(diag," link->len = %d",(*link)->len); + LOG_DIAG(diag); + sprintf(diag," link->data = 0x%x",(int) (*link)->data); + LOG_DIAG(diag); + sprintf(diag," link->flags = 0x%x",(*link)->flags); + LOG_DIAG(diag); + LOG_DIAG(" link->next = NULL"); +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + + } else { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Allocation of memory for sah_Link failed!\n"); +#endif /*DIAG_SECURITY_FUNC*/ + + /* Free memory previously allocated by the security function layer for + link data. Note that the memory being pointed to will be zeroed before + being freed, for security reasons. */ + if (flags & SAH_OWNS_LINK_DATA) { + mu->mu_memset(mu->mu_ref, p, 0x00, length); + mu->mu_free(mu->mu_ref, p); + } + } + + return status; +} + + +/** + * Create Key Link + * + * @brief Allocate Memory for Link structure and populate using key info + * object + * + * @param mu Memory functions + * @param link Pointer to store address of link to be created + * @param key_info Pointer to Key Info object to be referenced + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_Create_Key_Link( + const sah_Mem_Util *mu, + sah_Link **link, + fsl_shw_sko_t *key_info) +{ +#ifdef DIAG_SECURITY_FUNC_UGLY + char diag[50]; +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + fsl_shw_return_t status = FSL_RETURN_NO_RESOURCE_S; + sah_Link_Flags flags = 0; + + + *link = mu->mu_alloc_link(mu->mu_ref); + + /* populate link if memory allocation successful */ + if (*link != NULL) { + (*link)->len = key_info->key_length; + + if (key_info->flags & FSL_SKO_KEY_PRESENT) { + (*link)->data = key_info->key; + status = FSL_RETURN_OK_S; + } else { + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + + if (key_info->keystore == NULL) { + /* System Keystore */ + (*link)->slot = key_info->handle; + (*link)->ownerid = key_info->userid; + (*link)->data = 0; + flags |= SAH_STORED_KEY_INFO; + status = FSL_RETURN_OK_S; + } else { +#ifdef FSL_HAVE_SCC2 + /* User Keystore */ + fsl_shw_kso_t *keystore = key_info->keystore; + /* Note: the key data is stored here, but the address has to + * be converted to a partition and offset in the kernel. + * This will be calculated in kernel space, based on the + * list of partitions held by the users context. + */ + (*link)->data = + keystore->slot_get_address(keystore->user_data, + key_info->handle); + + flags |= SAH_IN_USER_KEYSTORE; + status = FSL_RETURN_OK_S; +#else + /* User keystores only supported in SCC2 */ + status = FSL_RETURN_BAD_FLAG_S; +#endif /* FSL_HAVE_SCC2 */ + + } + } else { + /* the flag is bad. Should never get here */ + status = FSL_RETURN_BAD_FLAG_S; + } + } + + (*link)->next = NULL; + (*link)->flags = flags; + +#ifdef DIAG_SECURITY_FUNC_UGLY + if (status == FSL_RETURN_OK_S) { + LOG_DIAG("Created Link"); + LOG_DIAG("------------"); + sprintf(diag," address = 0x%x", (int) *link); + LOG_DIAG(diag); + sprintf(diag," link->len = %d", (*link)->len); + LOG_DIAG(diag); + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + sprintf(diag," link->slot = 0x%x", (*link)->slot); + LOG_DIAG(diag); + } else { + sprintf(diag," link->data = 0x%x", (int)(*link)->data); + LOG_DIAG(diag); + } + sprintf(diag," link->flags = 0x%x", (*link)->flags); + LOG_DIAG(diag); + LOG_DIAG(" link->next = NULL"); + } +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + + if (status == FSL_RETURN_BAD_FLAG_S) { + mu->mu_free_link(mu->mu_ref, *link); + *link = NULL; +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creation of sah_Key_Link failed due to bad key flag!\n"); +#endif /*DIAG_SECURITY_FUNC*/ + } + + } else { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Allocation of memory for sah_Key_Link failed!\n"); +#endif /*DIAG_SECURITY_FUNC*/ + } + + return status; +} + + +/** + * Append Link + * + * @brief Allocate Memory for Link structure and append it to the end of + * the link chain. + * + * @post On allocation failure, @a p will be freed if #SAH_OWNS_LINK_DATA is + * p set in @a flags. + * + * @param mu Memory functions + * @param link_head Pointer to (head of) existing link chain + * @param p Pointer to data to use in link + * @param length Length of buffer 'p' in bytes + * @param flags Indicates whether memory has been allocated by the calling + * function or the security function + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_Append_Link( + const sah_Mem_Util *mu, + sah_Link *link_head, + uint8_t *p, + const size_t length, + const sah_Link_Flags flags) +{ + sah_Link* new_link; + fsl_shw_return_t status; + + + status = sah_Create_Link(mu, &new_link, p, length, flags); + + if (status == FSL_RETURN_OK_S) { + /* chase for the tail */ + while (link_head->next != NULL) { + link_head = link_head->next; + } + + /* and add new tail */ + link_head->next = new_link; + } + + return status; +} + + +/** + * Create and populate a single descriptor + * + * The pointer and length fields will be be set based on the chains passed in + * as @a link1 and @a link2. + * + * @param mu Memory utility suite + * @param desc Location to store pointer of new descriptor + * @param head_desc Non-zero if this will be first in chain; zero otherwise + * @param header The Sahara header value to store in the descriptor + * @param link1 A value (or NULL) for the first ptr + * @param link2 A value (or NULL) for the second ptr + * + * @post If allocation succeeded, the @a link1 and @link2 will be linked into + * the descriptor. If allocation failed, those link structues will be + * freed, and the @a desc will be unchanged. + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t sah_Create_Desc( + const sah_Mem_Util *mu, + sah_Desc ** desc, + int head_desc, + uint32_t header, + sah_Link * link1, + sah_Link * link2) +{ + fsl_shw_return_t status = FSL_RETURN_NO_RESOURCE_S; +#ifdef DIAG_SECURITY_FUNC_UGLY + char diag[50]; +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + + + if (head_desc != 0) { + *desc = (sah_Desc *)mu->mu_alloc_head_desc(mu->mu_ref); + } else { + *desc = mu->mu_alloc_desc(mu->mu_ref); + } + + /* populate descriptor if memory allocation successful */ + if ((*desc) != NULL) { + sah_Link* temp_link; + + status = FSL_RETURN_OK_S; + (*desc)->header = header; + + temp_link = (*desc)->ptr1 = link1; + (*desc)->len1 = 0; + while (temp_link != NULL) { + (*desc)->len1 += temp_link->len; + temp_link = temp_link->next; + } + + temp_link = (*desc)->ptr2 = link2; + (*desc)->len2 = 0; + while (temp_link != NULL) { + (*desc)->len2 += temp_link->len; + temp_link = temp_link->next; + } + + (*desc)->next = NULL; + +#ifdef DIAG_SECURITY_FUNC_UGLY + LOG_DIAG("Created Desc"); + LOG_DIAG("------------"); + sprintf(diag," address = 0x%x",(int) *desc); + LOG_DIAG(diag); + sprintf(diag," desc->header = 0x%x",(*desc)->header); + LOG_DIAG(diag); + sprintf(diag," desc->len1 = %d",(*desc)->len1); + LOG_DIAG(diag); + sprintf(diag," desc->ptr1 = 0x%x",(int) ((*desc)->ptr1)); + LOG_DIAG(diag); + sprintf(diag," desc->len2 = %d",(*desc)->len2); + LOG_DIAG(diag); + sprintf(diag," desc->ptr2 = 0x%x",(int) ((*desc)->ptr2)); + LOG_DIAG(diag); + sprintf(diag," desc->next = 0x%x",(int) ((*desc)->next)); + LOG_DIAG(diag); +#endif /*DIAG_SECURITY_FUNC_UGLY*/ + } else { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Allocation of memory for sah_Desc failed!\n"); +#endif /*DIAG_SECURITY_FUNC*/ + + /* Destroy the links, otherwise the memory allocated by the Security + Function layer for the links (and possibly the data within the links) + will be lost */ + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } + + return status; +} + + +/** + * Destroy a link (chain) and free memory + * + * @param mu memory utility suite + * @param link The Link to destroy + * + * @return none + */ +void sah_Destroy_Link( + const sah_Mem_Util *mu, + sah_Link * link) +{ + + while (link != NULL) { + sah_Link * next_link = link->next; + + if (link->flags & SAH_OWNS_LINK_DATA) { + /* zero data for security purposes */ + mu->mu_memset(mu->mu_ref, link->data, 0x00, link->len); + mu->mu_free(mu->mu_ref, link->data); + } + + link->data = NULL; + link->next = NULL; + mu->mu_free_link(mu->mu_ref, link); + + link = next_link; + } +} + + +/** + * Add descriptor where both links are inputs. + * + * @param header The Sahara header value for the descriptor. + * @param in1 The first input buffer (or NULL) + * @param in1_length Size of @a in1 + * @param[out] in2 The second input buffer (or NULL) + * @param in2_length Size of @a in2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_two_in_desc(uint32_t header, + const uint8_t* in1, + uint32_t in1_length, + const uint8_t* in2, + uint32_t in2_length, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link* link1 = NULL; + sah_Link* link2 = NULL; + + if (in1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) in1, in1_length, SAH_USES_LINK_DATA); + } + + if ( (in2 != NULL) && (status == FSL_RETURN_OK_S) ) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) in2, in2_length, + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} + +/*! + * Add descriptor where neither link needs sync + * + * @param header The Sahara header value for the descriptor. + * @param in1 The first input buffer (or NULL) + * @param in1_length Size of @a in1 + * @param[out] in2 The second input buffer (or NULL) + * @param in2_length Size of @a in2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_two_d_desc(uint32_t header, + const uint8_t * in1, + uint32_t in1_length, + const uint8_t * in2, + uint32_t in2_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + printk("Entering sah_add_two_d_desc \n"); + + if (in1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) in1, in1_length, + SAH_USES_LINK_DATA); + } + + if ((in2 != NULL) && (status == FSL_RETURN_OK_S)) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) in2, in2_length, + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} /* sah_add_two_d_desc() */ + +/** + * Add descriptor where both links are inputs, the second one being a key. + * + * @param header The Sahara header value for the descriptor. + * @param in1 The first input buffer (or NULL) + * @param in1_length Size of @a in1 + * @param[out] in2 The second input buffer (or NULL) + * @param in2_length Size of @a in2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_in_key_desc(uint32_t header, + const uint8_t* in1, + uint32_t in1_length, + fsl_shw_sko_t* key_info, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + if (in1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) in1, in1_length, + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + goto out; + } + + status = sah_Create_Key_Link(mu, &link2, key_info); + + + if (status != FSL_RETURN_OK_S) { + goto out; + } + + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + +out: + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } + + return status; +} + + +/** + * Create two links using keys allocated in the scc + * + * @param header The Sahara header value for the descriptor. + * @param in1 The first input buffer (or NULL) + * @param in1_length Size of @a in1 + * @param[out] in2 The second input buffer (or NULL) + * @param in2_length Size of @a in2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_key_key_desc(uint32_t header, + fsl_shw_sko_t *key_info1, + fsl_shw_sko_t *key_info2, + const sah_Mem_Util *mu, + sah_Head_Desc **desc_chain) +{ + fsl_shw_return_t status; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + + status = sah_Create_Key_Link(mu, &link1, key_info1); + + if (status == FSL_RETURN_OK_S) { + status = sah_Create_Key_Link(mu, &link2, key_info2); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} + + +/** + * Add descriptor where first link is input, the second is a changing key + * + * @param header The Sahara header value for the descriptor. + * @param in1 The first input buffer (or NULL) + * @param in1_length Size of @a in1 + * @param[out] in2 The key for output + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_in_keyout_desc(uint32_t header, + const uint8_t* in1, + uint32_t in1_length, + fsl_shw_sko_t* key_info, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + if (in1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) in1, in1_length, + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + goto out; + } + + status = sah_Create_Key_Link(mu, &link2, key_info); + + if (status != FSL_RETURN_OK_S) { + goto out; + } + +link2->flags |= SAH_OUTPUT_LINK; /* mark key for output */ +status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + +out: + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } + + return status; +} + +/** + * Add descriptor where both links are outputs. + * + * @param header The Sahara header value for the descriptor. + * @param out1 The first output buffer (or NULL) + * @param out1_length Size of @a out1 + * @param[out] out2 The second output buffer (or NULL) + * @param out2_length Size of @a out2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_two_out_desc(uint32_t header, + uint8_t* out1, + uint32_t out1_length, + uint8_t* out2, + uint32_t out2_length, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + + if (out1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) out1, out1_length, + SAH_OUTPUT_LINK | SAH_USES_LINK_DATA); + } + + if ( (out2 != NULL) && (status == FSL_RETURN_OK_S) ) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) out2, out2_length, + SAH_OUTPUT_LINK | + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} + + +/** + * Add descriptor where first link is output, second is output + * + * @param header The Sahara header value for the descriptor. + * @param out1 The first output buffer (or NULL) + * @param out1_length Size of @a out1 + * @param[out] in2 The input buffer (or NULL) + * @param in2_length Size of @a in2 + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_out_in_desc(uint32_t header, + uint8_t* out1, + uint32_t out1_length, + const uint8_t* in2, + uint32_t in2_length, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + + if (out1 != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) out1, out1_length, + SAH_OUTPUT_LINK | + SAH_USES_LINK_DATA); + } + + if ( (in2 != NULL) && (status == FSL_RETURN_OK_S) ) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) in2, in2_length, + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} + + +/** + * Add descriptor where link1 is input buffer, link2 is output buffer. + * + * @param header The Sahara header value for the descriptor. + * @param in The input buffer + * @param in_length Size of the input buffer + * @param[out] out The output buffer + * @param out_length Size of the output buffer + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_in_out_desc(uint32_t header, + const uint8_t* in, uint32_t in_length, + uint8_t* out, uint32_t out_length, + const sah_Mem_Util* mu, + sah_Head_Desc** desc_chain) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + if (in != NULL) { + status = sah_Create_Link(mu, &link1, + (sah_Oct_Str) in, in_length, + SAH_USES_LINK_DATA); + } + + if ((status == FSL_RETURN_OK_S) && (out != NULL)) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) out, out_length, + SAH_OUTPUT_LINK | + SAH_USES_LINK_DATA); + } + + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } else { + status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + } + + return status; +} + + +/** + * Add descriptor where link1 is a key, link2 is output buffer. + * + * @param header The Sahara header value for the descriptor. + * @param key_info Key information + * @param[out] out The output buffer + * @param out_length Size of the output buffer + * @param mu Memory functions + * @param[in,out] desc_chain Chain to start or append to + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_add_key_out_desc(uint32_t header, + const fsl_shw_sko_t *key_info, + uint8_t* out, uint32_t out_length, + const sah_Mem_Util *mu, + sah_Head_Desc **desc_chain) +{ + fsl_shw_return_t status; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + status = sah_Create_Key_Link(mu, &link1, (fsl_shw_sko_t *) key_info); + if (status != FSL_RETURN_OK_S) { + goto out; + } + + + if (out != NULL) { + status = sah_Create_Link(mu, &link2, + (sah_Oct_Str) out, out_length, + SAH_OUTPUT_LINK | + SAH_USES_LINK_DATA); + if (status != FSL_RETURN_OK_S) { + goto out; + } + } +status = sah_Append_Desc(mu, desc_chain, header, link1, link2); + +out: + if (status != FSL_RETURN_OK_S) { + if (link1 != NULL) { + sah_Destroy_Link(mu, link1); + } + if (link2 != NULL) { + sah_Destroy_Link(mu, link2); + } + } + + return status; +} + + +/** + * Sanity checks the user context object fields to ensure that they make some + * sense before passing the uco as a parameter + * + * @brief Verify the user context object + * + * @param uco user context object + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_validate_uco(fsl_shw_uco_t *uco) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + + + /* check if file is opened */ + if (uco->sahara_openfd < 0) { + status = FSL_RETURN_NO_RESOURCE_S; + } else { + /* check flag combination: the only invalid setting of the + * blocking and callback flags is blocking with callback. So check + * for that + */ + if ((uco->flags & (FSL_UCO_BLOCKING_MODE | FSL_UCO_CALLBACK_MODE)) == + (FSL_UCO_BLOCKING_MODE | FSL_UCO_CALLBACK_MODE)) { + status = FSL_RETURN_BAD_FLAG_S; + } else { + /* check that memory utilities have been attached */ + if (uco->mem_util == NULL) { + status = FSL_RETURN_MEMORY_ERROR_S; + } else { + /* must have pool of at least 1, even for blocking mode */ + if (uco->pool_size == 0) { + status = FSL_RETURN_ERROR_S; + } else { + /* if callback flag is set, it better have a callback + * routine */ + if (uco->flags & FSL_UCO_CALLBACK_MODE) { + if (uco->callback == NULL) { + status = FSL_RETURN_INTERNAL_ERROR_S; + } + } + } + } + } + } + + return status; +} + + +/** + * Perform any post-processing on non-blocking results. + * + * For instance, free descriptor chains, compare authentication codes, ... + * + * @param user_ctx User context object + * @param result_info A set of results + */ +void sah_Postprocess_Results(fsl_shw_uco_t* user_ctx, sah_results* result_info) +{ + unsigned i; + + /* for each result returned */ + for (i = 0; i < *result_info->actual; i++) { + sah_Head_Desc* desc = result_info->results[i].user_desc; + uint8_t* out1 = desc->out1_ptr; + uint8_t* out2 = desc->out2_ptr; + uint32_t len = desc->out_len; + + /* + * For now, tne only post-processing besides freeing the + * chain is the need to check the auth code for fsl_shw_auth_decrypt(). + * + * If other uses are required in the future, this code will probably + * need a flag in the sah_Head_Desc (or a function pointer!) to + * determine what needs to be done. + */ + if ((out1 != NULL) && (out2 != NULL)) { + unsigned j; + for (j = 0; j < len; j++) { + if (out1[j] != out2[j]) { + /* Problem detected. Change result. */ + result_info->results[i].code = FSL_RETURN_AUTH_FAILED_S; + break; + } + } + /* free allocated 'calced_auth' */ + user_ctx->mem_util-> + mu_free(user_ctx->mem_util->mu_ref, out1); + } + + /* Free the API-created chain, unless tagged as not-from-API */ + if (! (desc->uco_flags & FSL_UCO_SAVE_DESC_CHAIN)) { + sah_Descriptor_Chain_Destroy(user_ctx->mem_util, &desc); + } + } +} + + +/* End of sf_util.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/km_adaptor.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/km_adaptor.c @@ -0,0 +1,849 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file km_adaptor.c +* +* @brief The Adaptor component provides an interface to the +* driver for a kernel user. +*/ + +#include +#include +#include +#include +#include +#ifdef FSL_HAVE_SCC +#include +#elif defined (FSL_HAVE_SCC2) +#include +#endif + + +EXPORT_SYMBOL(adaptor_Exec_Descriptor_Chain); +EXPORT_SYMBOL(sah_register); +EXPORT_SYMBOL(sah_deregister); +EXPORT_SYMBOL(sah_get_results); +EXPORT_SYMBOL(fsl_shw_smalloc); +EXPORT_SYMBOL(fsl_shw_sfree); +EXPORT_SYMBOL(fsl_shw_sstatus); +EXPORT_SYMBOL(fsl_shw_diminish_perms); +EXPORT_SYMBOL(do_scc_encrypt_region); +EXPORT_SYMBOL(do_scc_decrypt_region); +EXPORT_SYMBOL(do_system_keystore_slot_alloc); +EXPORT_SYMBOL(do_system_keystore_slot_dealloc); +EXPORT_SYMBOL(do_system_keystore_slot_load); +EXPORT_SYMBOL(do_system_keystore_slot_read); +EXPORT_SYMBOL(do_system_keystore_slot_encrypt); +EXPORT_SYMBOL(do_system_keystore_slot_decrypt); + + +#if defined(DIAG_DRV_IF) || defined(DIAG_MEM) || defined(DIAG_ADAPTOR) +#include +#endif + +#if defined(DIAG_DRV_IF) || defined(DIAG_MEM) || defined(DIAG_ADAPTOR) +#define MAX_DUMP 16 + +#define DIAG_MSG_SIZE 300 +static char Diag_msg[DIAG_MSG_SIZE]; +#endif + +/* This is the wait queue to this mode of driver */ +DECLARE_WAIT_QUEUE_HEAD(Wait_queue_km); + +/*! This matches Sahara2 capabilities... */ +fsl_shw_pco_t sahara2_capabilities = { + 1, 3, /* api version number - major & minor */ + 1, 6, /* driver version number - major & minor */ + { + FSL_KEY_ALG_AES, + FSL_KEY_ALG_DES, + FSL_KEY_ALG_TDES, + FSL_KEY_ALG_ARC4}, + { + FSL_SYM_MODE_STREAM, + FSL_SYM_MODE_ECB, + FSL_SYM_MODE_CBC, + FSL_SYM_MODE_CTR}, + { + FSL_HASH_ALG_MD5, + FSL_HASH_ALG_SHA1, + FSL_HASH_ALG_SHA224, + FSL_HASH_ALG_SHA256}, + /* + * The following table must be set to handle all values of key algorithm + * and sym mode, and be in the correct order.. + */ + { /* Stream, ECB, CBC, CTR */ + {0, 0, 0, 0}, /* HMAC */ + {0, 1, 1, 1}, /* AES */ + {0, 1, 1, 0}, /* DES */ + {0, 1, 1, 0}, /* 3DES */ + {1, 0, 0, 0} /* ARC4 */ + }, + 0, 0, + 0, 0, 0, + {{0, 0}} +}; + +#ifdef DIAG_ADAPTOR +void km_Dump_Chain(const sah_Desc * chain); + +void km_Dump_Region(const char *prefix, const unsigned char *data, + unsigned length); + +static void km_Dump_Link(const char *prefix, const sah_Link * link); + +void km_Dump_Words(const char *prefix, const unsigned *data, unsigned length); +#endif + +/**** Memory routines ****/ + +static void *my_malloc(void *ref, size_t n) +{ + register void *mem; + +#ifndef DIAG_MEM_ERRORS + mem = os_alloc_memory(n, GFP_KERNEL); + +#else + { + uint32_t rand; + /* are we feeling lucky ? */ + os_get_random_bytes(&rand, sizeof(rand)); + if ((rand % DIAG_MEM_CONST) == 0) { + mem = 0; + } else { + mem = os_alloc_memory(n, GFP_ATOMIC); + } + } +#endif /* DIAG_MEM_ERRORS */ + +#ifdef DIAG_MEM + sprintf(Diag_msg, "API kmalloc: %p for %d\n", mem, n); + LOG_KDIAG(Diag_msg); +#endif + ref = 0; /* unused param warning */ + return mem; +} + +static sah_Head_Desc *my_alloc_head_desc(void *ref) +{ + register sah_Head_Desc *ptr; + +#ifndef DIAG_MEM_ERRORS + ptr = sah_Alloc_Head_Descriptor(); + +#else + { + uint32_t rand; + /* are we feeling lucky ? */ + os_get_random_bytes(&rand, sizeof(rand)); + if ((rand % DIAG_MEM_CONST) == 0) { + ptr = 0; + } else { + ptr = sah_Alloc_Head_Descriptor(); + } + } +#endif + ref = 0; + return ptr; +} + +static sah_Desc *my_alloc_desc(void *ref) +{ + register sah_Desc *ptr; + +#ifndef DIAG_MEM_ERRORS + ptr = sah_Alloc_Descriptor(); + +#else + { + uint32_t rand; + /* are we feeling lucky ? */ + os_get_random_bytes(&rand, sizeof(rand)); + if ((rand % DIAG_MEM_CONST) == 0) { + ptr = 0; + } else { + ptr = sah_Alloc_Descriptor(); + } + } +#endif + ref = 0; + return ptr; +} + +static sah_Link *my_alloc_link(void *ref) +{ + register sah_Link *ptr; + +#ifndef DIAG_MEM_ERRORS + ptr = sah_Alloc_Link(); + +#else + { + uint32_t rand; + /* are we feeling lucky ? */ + os_get_random_bytes(&rand, sizeof(rand)); + if ((rand % DIAG_MEM_CONST) == 0) { + ptr = 0; + } else { + ptr = sah_Alloc_Link(); + } + } +#endif + ref = 0; + return ptr; +} + +static void my_free(void *ref, void *ptr) +{ + ref = 0; /* unused param warning */ +#ifdef DIAG_MEM + sprintf(Diag_msg, "API kfree: %p\n", ptr); + LOG_KDIAG(Diag_msg); +#endif + os_free_memory(ptr); +} + +static void my_free_head_desc(void *ref, sah_Head_Desc * ptr) +{ + sah_Free_Head_Descriptor(ptr); +} + +static void my_free_desc(void *ref, sah_Desc * ptr) +{ + sah_Free_Descriptor(ptr); +} + +static void my_free_link(void *ref, sah_Link * ptr) +{ + sah_Free_Link(ptr); +} + +static void *my_memcpy(void *ref, void *dest, const void *src, size_t n) +{ + ref = 0; /* unused param warning */ + return memcpy(dest, src, n); +} + +static void *my_memset(void *ref, void *ptr, int ch, size_t n) +{ + ref = 0; /* unused param warning */ + return memset(ptr, ch, n); +} + +/*! Standard memory manipulation routines for kernel API. */ +static sah_Mem_Util std_kernelmode_mem_util = { + .mu_ref = 0, + .mu_malloc = my_malloc, + .mu_alloc_head_desc = my_alloc_head_desc, + .mu_alloc_desc = my_alloc_desc, + .mu_alloc_link = my_alloc_link, + .mu_free = my_free, + .mu_free_head_desc = my_free_head_desc, + .mu_free_desc = my_free_desc, + .mu_free_link = my_free_link, + .mu_memcpy = my_memcpy, + .mu_memset = my_memset +}; + +fsl_shw_return_t get_capabilities(fsl_shw_uco_t * user_ctx, + fsl_shw_pco_t * capabilities) +{ + scc_config_t *scc_capabilities; + + /* Fill in the Sahara2 capabilities. */ + memcpy(capabilities, &sahara2_capabilities, sizeof(fsl_shw_pco_t)); + + /* Fill in the SCC portion of the capabilities object */ + scc_capabilities = scc_get_configuration(); + capabilities->scc_driver_major = scc_capabilities->driver_major_version; + capabilities->scc_driver_minor = scc_capabilities->driver_minor_version; + capabilities->scm_version = scc_capabilities->scm_version; + capabilities->smn_version = scc_capabilities->smn_version; + capabilities->block_size_bytes = scc_capabilities->block_size_bytes; + +#ifdef FSL_HAVE_SCC + capabilities->scc_info.black_ram_size_blocks = + scc_capabilities->black_ram_size_blocks; + capabilities->scc_info.red_ram_size_blocks = + scc_capabilities->red_ram_size_blocks; +#elif defined(FSL_HAVE_SCC2) + capabilities->scc2_info.partition_size_bytes = + scc_capabilities->partition_size_bytes; + capabilities->scc2_info.partition_count = + scc_capabilities->partition_count; +#endif + + return FSL_RETURN_OK_S; +} + +/*! + * Sends a request to register this user + * + * @brief Sends a request to register this user + * + * @param[in,out] user_ctx part of the structure contains input parameters and + * part is filled in by the driver + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_register(fsl_shw_uco_t * user_ctx) +{ + fsl_shw_return_t status; + + /* this field is used in user mode to indicate a file open has occured. + * it is used here, in kernel mode, to indicate that the uco is registered + */ + user_ctx->sahara_openfd = 0; /* set to 'registered' */ + user_ctx->mem_util = &std_kernelmode_mem_util; + + /* check that uco is valid */ + status = sah_validate_uco(user_ctx); + + /* If life is good, register this user */ + if (status == FSL_RETURN_OK_S) { + status = sah_handle_registration(user_ctx); + } + + if (status != FSL_RETURN_OK_S) { + user_ctx->sahara_openfd = -1; /* set to 'not registered' */ + } + + return status; +} + +/*! + * Sends a request to deregister this user + * + * @brief Sends a request to deregister this user + * + * @param[in,out] user_ctx Info on user being deregistered. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_deregister(fsl_shw_uco_t * user_ctx) +{ + fsl_shw_return_t status = FSL_RETURN_OK_S; + + if (user_ctx->sahara_openfd == 0) { + status = sah_handle_deregistration(user_ctx); + user_ctx->sahara_openfd = -1; /* set to 'no registered */ + } + + return status; +} + +/*! + * Sends a request to get results for this user + * + * @brief Sends a request to get results for this user + * + * @param[in,out] arg Pointer to structure to collect results + * @param uco User's context + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t sah_get_results(sah_results * arg, fsl_shw_uco_t * uco) +{ + fsl_shw_return_t code = sah_get_results_from_pool(uco, arg); + + if ((code == FSL_RETURN_OK_S) && (arg->actual != 0)) { + sah_Postprocess_Results(uco, arg); + } + + return code; +} + +/*! + * This function writes the Descriptor Chain to the kernel driver. + * + * @brief Writes the Descriptor Chain to the kernel driver. + * + * @param dar A pointer to a Descriptor Chain of type sah_Head_Desc + * @param uco The user context object + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t adaptor_Exec_Descriptor_Chain(sah_Head_Desc * dar, + fsl_shw_uco_t * uco) +{ + sah_Head_Desc *kernel_space_desc = NULL; + fsl_shw_return_t code = FSL_RETURN_OK_S; + int os_error_code = 0; + unsigned blocking_mode = dar->uco_flags & FSL_UCO_BLOCKING_MODE; + +#ifdef DIAG_ADAPTOR + km_Dump_Chain(&dar->desc); +#endif + + dar->user_info = uco; + dar->user_desc = dar; + + /* This code has been shamelessly copied from sah_driver_interface.c */ + /* It needs to be moved somewhere common ... */ + kernel_space_desc = sah_Physicalise_Descriptors(dar); + + if (kernel_space_desc == NULL) { + /* We may have failed due to a -EFAULT as well, but we will return + * -ENOMEM since either way it is a memory related failure. */ + code = FSL_RETURN_NO_RESOURCE_S; +#ifdef DIAG_DRV_IF + LOG_KDIAG("sah_Physicalise_Descriptors() failed\n"); +#endif + } else { + if (blocking_mode) { +#ifdef SAHARA_POLL_MODE + os_error_code = sah_Handle_Poll(dar); +#else + os_error_code = sah_blocking_mode(dar); +#endif + if (os_error_code != 0) { + code = FSL_RETURN_ERROR_S; + } else { /* status of actual operation */ + code = dar->result; + } + } else { +#ifdef SAHARA_POLL_MODE + sah_Handle_Poll(dar); +#else + /* just put someting in the DAR */ + sah_Queue_Manager_Append_Entry(dar); +#endif /* SAHARA_POLL_MODE */ + } + } + + return code; +} + + +/* System keystore context, defined in sah_driver_interface.c */ +extern fsl_shw_kso_t system_keystore; + +fsl_shw_return_t do_system_keystore_slot_alloc(fsl_shw_uco_t * user_ctx, + uint32_t key_length, + uint64_t ownerid, + uint32_t * slot) +{ + (void)user_ctx; + return keystore_slot_alloc(&system_keystore, key_length, ownerid, slot); +} + +fsl_shw_return_t do_system_keystore_slot_dealloc(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot) +{ + (void)user_ctx; + return keystore_slot_dealloc(&system_keystore, ownerid, slot); +} + +fsl_shw_return_t do_system_keystore_slot_load(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + const uint8_t * key, + uint32_t key_length) +{ + (void)user_ctx; + return keystore_slot_load(&system_keystore, ownerid, slot, + (void *)key, key_length); +} + +fsl_shw_return_t do_system_keystore_slot_read(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t * key) +{ + (void)user_ctx; + return keystore_slot_read(&system_keystore, ownerid, slot, + key_length, (void *)key); +} + +fsl_shw_return_t do_system_keystore_slot_encrypt(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + uint8_t * black_data) +{ + (void)user_ctx; + return keystore_slot_encrypt(NULL, &system_keystore, ownerid, + slot, key_length, black_data); +} + +fsl_shw_return_t do_system_keystore_slot_decrypt(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t * black_data) +{ + (void)user_ctx; + return keystore_slot_decrypt(NULL, &system_keystore, ownerid, + slot, key_length, black_data); +} + +void *fsl_shw_smalloc(fsl_shw_uco_t * user_ctx, + uint32_t size, const uint8_t * UMID, uint32_t permissions) +{ +#ifdef FSL_HAVE_SCC2 + int part_no; + void *part_base; + uint32_t part_phys; + scc_config_t *scc_configuration; + + /* Check that the memory size requested is correct */ + scc_configuration = scc_get_configuration(); + if (size != scc_configuration->partition_size_bytes) { + return NULL; + } + + /* Attempt to grab a partition. */ + if (scc_allocate_partition(0, &part_no, &part_base, &part_phys) + != SCC_RET_OK) { + return NULL; + } + printk(KERN_ALERT "In fsh_shw_smalloc (km): partition_base:%p " + "partition_base_phys: %p\n", part_base, (void *)part_phys); + + /* these bits should be in a separate function */ + printk(KERN_ALERT "writing UMID and MAP to secure the partition\n"); + + scc_engage_partition(part_base, UMID, permissions); + + (void)user_ctx; /* unused param warning */ + + return part_base; +#else /* FSL_HAVE_SCC2 */ + (void)user_ctx; + (void)size; + (void)UMID; + (void)permissions; + return NULL; +#endif /* FSL_HAVE_SCC2 */ + +} + +fsl_shw_return_t fsl_shw_sfree(fsl_shw_uco_t * user_ctx, void *address) +{ + (void)user_ctx; + +#ifdef FSL_HAVE_SCC2 + if (scc_release_partition(address) == SCC_RET_OK) { + return FSL_RETURN_OK_S; + } +#endif + + return FSL_RETURN_ERROR_S; +} + +fsl_shw_return_t fsl_shw_sstatus(fsl_shw_uco_t * user_ctx, + void *address, + fsl_shw_partition_status_t * status) +{ + (void)user_ctx; + +#ifdef FSL_HAVE_SCC2 + *status = scc_partition_status(address); + return FSL_RETURN_OK_S; +#endif + + return FSL_RETURN_ERROR_S; +} + +/* Diminish permissions on some secure memory */ +fsl_shw_return_t fsl_shw_diminish_perms(fsl_shw_uco_t * user_ctx, + void *address, uint32_t permissions) +{ + + (void)user_ctx; /* unused parameter warning */ + +#ifdef FSL_HAVE_SCC2 + if (scc_diminish_permissions(address, permissions) == SCC_RET_OK) { + return FSL_RETURN_OK_S; + } +#endif + return FSL_RETURN_ERROR_S; +} + +/* + * partition_base - physical address of the partition + * offset - offset, in blocks, of the data from the start of the partition + * length - length, in bytes, of the data to be encrypted (multiple of 4) + * black_data - virtual address that the encrypted data should be stored at + * Note that this virtual address must be translatable using the __virt_to_phys + * macro; ie, it can't be a specially mapped address. To do encryption with those + * addresses, use the scc_encrypt_region function directly. This is to make + * this function compatible with the user mode declaration, which does not know + * the physical addresses of the data it is using. + */ +fsl_shw_return_t +do_scc_encrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode) +{ + scc_return_t scc_ret; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + +#ifdef FSL_HAVE_SCC2 + +#ifdef DIAG_ADAPTOR + uint32_t *owner_32 = (uint32_t *) & (owner_id); + + LOG_KDIAG_ARGS + ("partition base: %p, offset: %i, count: %i, black data: %p\n", + partition_base, offset_bytes, byte_count, (void *)black_data); +#endif + (void)user_ctx; + + os_cache_flush_range(black_data, byte_count); + + scc_ret = + scc_encrypt_region((uint32_t) partition_base, offset_bytes, + byte_count, __virt_to_phys(black_data), IV, + cypher_mode); + + if (scc_ret == SCC_RET_OK) { + retval = FSL_RETURN_OK_S; + } else { + retval = FSL_RETURN_ERROR_S; + } + + /* The SCC2 DMA engine should have written to the black ram, so we need to + * invalidate that region of memory. Note that the red ram is not an + * because it is mapped with the cache disabled. + */ + os_cache_inv_range(black_data, byte_count); + +#else + (void)scc_ret; +#endif /* FSL_HAVE_SCC2 */ + + return retval; +} + +/*! + * Call the proper function to decrypt a region of encrypted secure memory + * + * @brief + * + * @param user_ctx User context of the partition owner (NULL in kernel) + * @param partition_base Base address (physical) of the partition + * @param offset_bytes Offset from base address that the decrypted data + * shall be placed + * @param byte_count Length of the message (bytes) + * @param black_data Pointer to where the encrypted data is stored + * @param owner_id + * + * @return status + */ + +fsl_shw_return_t +do_scc_decrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, const uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode) +{ + scc_return_t scc_ret; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + +#ifdef FSL_HAVE_SCC2 + +#ifdef DIAG_ADAPTOR + uint32_t *owner_32 = (uint32_t *) & (owner_id); + + LOG_KDIAG_ARGS + ("partition base: %p, offset: %i, count: %i, black data: %p\n", + partition_base, offset_bytes, byte_count, (void *)black_data); +#endif + + (void)user_ctx; + + /* The SCC2 DMA engine will be reading from the black ram, so we need to + * make sure that the data is pushed out of the cache. Note that the red + * ram is not an issue because it is mapped with the cache disabled. + */ + os_cache_flush_range(black_data, byte_count); + + scc_ret = + scc_decrypt_region((uint32_t) partition_base, offset_bytes, + byte_count, + (uint8_t *) __virt_to_phys(black_data), IV, + cypher_mode); + + if (scc_ret == SCC_RET_OK) { + retval = FSL_RETURN_OK_S; + } else { + retval = FSL_RETURN_ERROR_S; + } + +#else + (void)scc_ret; +#endif /* FSL_HAVE_SCC2 */ + + return retval; +} + +#ifdef DIAG_ADAPTOR +/*! + * Dump chain of descriptors to the log. + * + * @brief Dump descriptor chain + * + * @param chain Kernel virtual address of start of chain of descriptors + * + * @return void + */ +void km_Dump_Chain(const sah_Desc * chain) +{ + while (chain != NULL) { + km_Dump_Words("Desc", (unsigned *)chain, + 6 /*sizeof(*chain)/sizeof(unsigned) */ ); + /* place this definition elsewhere */ + if (chain->ptr1) { + if (chain->header & SAH_HDR_LLO) { + km_Dump_Region(" Data1", chain->ptr1, + chain->len1); + } else { + km_Dump_Link(" Link1", chain->ptr1); + } + } + if (chain->ptr2) { + if (chain->header & SAH_HDR_LLO) { + km_Dump_Region(" Data2", chain->ptr2, + chain->len2); + } else { + km_Dump_Link(" Link2", chain->ptr2); + } + } + + chain = chain->next; + } +} + +/*! + * Dump chain of links to the log. + * + * @brief Dump chain of links + * + * @param prefix Text to put in front of dumped data + * @param link Kernel virtual address of start of chain of links + * + * @return void + */ +static void km_Dump_Link(const char *prefix, const sah_Link * link) +{ + while (link != NULL) { + km_Dump_Words(prefix, (unsigned *)link, + 3 /* # words in h/w link */ ); + if (link->flags & SAH_STORED_KEY_INFO) { +#ifdef CAN_DUMP_SCC_DATA + uint32_t len; +#endif + +#ifdef CAN_DUMP_SCC_DATA + { + char buf[50]; + + scc_get_slot_info(link->ownerid, link->slot, (uint32_t *) & link->data, /* RED key address */ + &len); /* key length */ + sprintf(buf, " SCC slot %d: ", link->slot); + km_Dump_Words(buf, + (void *)IO_ADDRESS((uint32_t) + link->data), + link->len / 4); + } +#else + sprintf(Diag_msg, " SCC slot %d", link->slot); + LOG_KDIAG(Diag_msg); +#endif + } else if (link->data != NULL) { + km_Dump_Region(" Data", link->data, link->len); + } + + link = link->next; + } +} + +/*! + * Dump given region of data to the log. + * + * @brief Dump data + * + * @param prefix Text to put in front of dumped data + * @param data Kernel virtual address of start of region to dump + * @param length Amount of data to dump + * + * @return void +*/ +void km_Dump_Region(const char *prefix, const unsigned char *data, + unsigned length) +{ + unsigned count; + char *output; + unsigned data_len; + + sprintf(Diag_msg, "%s (%08X,%u):", prefix, (uint32_t) data, length); + + /* Restrict amount of data to dump */ + if (length > MAX_DUMP) { + data_len = MAX_DUMP; + } else { + data_len = length; + } + + /* We've already printed some text in output buffer, skip over it */ + output = Diag_msg + strlen(Diag_msg); + + for (count = 0; count < data_len; count++) { + if (count % 4 == 0) { + *output++ = ' '; + } + sprintf(output, "%02X", *data++); + output += 2; + } + + LOG_KDIAG(Diag_msg); +} + +/*! + * Dump given wors of data to the log. + * + * @brief Dump data + * + * @param prefix Text to put in front of dumped data + * @param data Kernel virtual address of start of region to dump + * @param word_count Amount of data to dump + * + * @return void +*/ +void km_Dump_Words(const char *prefix, const unsigned *data, + unsigned word_count) +{ + char *output; + + sprintf(Diag_msg, "%s (%08X,%uw): ", prefix, (uint32_t) data, + word_count); + + /* We've already printed some text in output buffer, skip over it */ + output = Diag_msg + strlen(Diag_msg); + + while (word_count--) { + sprintf(output, "%08X ", *data++); + output += 9; + } + + LOG_KDIAG(Diag_msg); +} +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_status_manager.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_status_manager.c @@ -0,0 +1,734 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sah_status_manager.c +* +* @brief Status Manager Function +* +* This file contains the function which processes the Sahara status register +* during an interrupt. +* +* This file does not need porting. +*/ + +#include "portable_os.h" + +#include +#include +#include +#include +#include + +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) +#include +#endif + +/*! Compile-time flag to count various interrupt types. */ +#define DIAG_INT_COUNT + +/*! + * Number of interrupts processed with Done1Done2 status. Updates to this + * value should only be done in interrupt processing. + */ +uint32_t done1_count; + +/*! + * Number of interrupts processed with Done1Busy2 status. Updates to this + * value should only be done in interrupt processing. + */ +uint32_t done1busy2_count; + +/*! + * Number of interrupts processed with Done1Done2 status. Updates to this + * value should only be done in interrupt processing. + */ +uint32_t done1done2_count; + +/*! + * the dynameic power management flag is false when power management is not + * asserted and true when dpm is. + */ +#ifdef SAHARA_POWER_MANAGEMENT +bool sah_dpm_flag = FALSE; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +static int sah_dpm_suspend(struct device *dev, uint32_t state, uint32_t level); +static int sah_dpm_resume(struct device *dev, uint32_t level); +#else +static int sah_dpm_suspend(struct platform_device *dev, pm_message_t state); +static int sah_dpm_resume(struct platform_device *dev); +#endif +#endif + +#ifndef SAHARA_POLL_MODE +/*! +******************************************************************************* +* This functionx processes the status register of the Sahara, updates the state +* of the finished queue entry, and then tries to find more work for Sahara to +* do. +* +* @brief The bulk of the interrupt handling code. +* +* @param hw_status The status register of Sahara at time of interrupt. +* The Clear interrupt bit is already handled by this +* register read prior to entry into this function. +* @return void +*/ +unsigned long sah_Handle_Interrupt(sah_Execute_Status hw_status) +{ + unsigned long reset_flag = 0; /* assume no SAHARA reset needed */ + os_lock_context_t lock_flags; + sah_Head_Desc *current_entry; + + /* HW status at time of interrupt */ + sah_Execute_Status state = hw_status & SAH_EXEC_STATE_MASK; + + do { + uint32_t dar; + +#ifdef DIAG_INT_COUNT + if (state == SAH_EXEC_DONE1) { + done1_count++; + } else if (state == SAH_EXEC_DONE1_BUSY2) { + done1busy2_count++; + } else if (state == SAH_EXEC_DONE1_DONE2) { + done1done2_count++; + } +#endif + + /* if the first entry on sahara has completed... */ + if ((state & SAH_EXEC_DONE1_BIT) || + (state == SAH_EXEC_ERROR1)) { + /* lock queue while searching */ + os_lock_save_context(desc_queue_lock, lock_flags); + current_entry = + sah_Find_With_State(SAH_STATE_ON_SAHARA); + os_unlock_restore_context(desc_queue_lock, lock_flags); + + /* an active descriptor was not found */ + if (current_entry == NULL) { + /* change state to avoid an infinite loop (possible if + * state is SAH_EXEC_DONE1_BUSY2 first time into loop) */ + hw_status = SAH_EXEC_IDLE; +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) + LOG_KDIAG + ("Interrupt received with nothing on queue."); +#endif + } else { + /* SAHARA has completed its work on this descriptor chain */ + current_entry->status = SAH_STATE_OFF_SAHARA; + + if (state == SAH_EXEC_ERROR1) { + if (hw_status & STATUS_ERROR) { + /* Gather extra diagnostic information */ + current_entry->fault_address = + sah_HW_Read_Fault_Address(); + /* Read this last - it clears the error */ + current_entry->error_status = + sah_HW_Read_Error_Status(); + current_entry->op_status = 0; +#ifdef FSL_HAVE_SAHARA4 + } else { + current_entry->op_status = + sah_HW_Read_Op_Status(); + current_entry->error_status = 0; +#endif + } + + } else { + /* indicate that no errors were found with descriptor + * chain 1 */ + current_entry->error_status = 0; + current_entry->op_status = 0; + + /* is there a second, successfully, completed descriptor + * chain? (done1/error2 processing is handled later) */ + if (state == SAH_EXEC_DONE1_DONE2) { + os_lock_save_context + (desc_queue_lock, + lock_flags); + current_entry = + sah_Find_With_State + (SAH_STATE_ON_SAHARA); + os_unlock_restore_context + (desc_queue_lock, + lock_flags); + + if (current_entry == NULL) { +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) + LOG_KDIAG + ("Done1_Done2 Interrupt received with " + "one entry on queue."); +#endif + } else { + /* indicate no errors in descriptor chain 2 */ + current_entry-> + error_status = 0; + current_entry->status = + SAH_STATE_OFF_SAHARA; + } + } + } + } + +#ifdef SAHARA_POWER_MANAGEMENT + /* check dynamic power management is not asserted */ + if (!sah_dpm_flag) { +#endif + do { + /* protect DAR and main_queue */ + os_lock_save_context(desc_queue_lock, + lock_flags); + dar = sah_HW_Read_DAR(); + /* check if SAHARA has space for another descriptor. SAHARA + * only accepts up to the DAR queue size number of DAR + * entries, after that 'dar' will not be zero until the + * pending interrupt is serviced */ + if (dar == 0) { + current_entry = + sah_Find_With_State + (SAH_STATE_PENDING); + if (current_entry != NULL) { +#ifndef SUBMIT_MULTIPLE_DARS + /* BUG FIX: state machine can transition from Done1 + * Busy2 directly to Idle. To fix that problem, + * only one DAR is being allowed on SAHARA at a + * time. If a high level interrupt has happened, + * there could * be an active descriptor chain */ + if (sah_Find_With_State + (SAH_STATE_ON_SAHARA) + == NULL) { +#endif +#if defined(DIAG_DRV_IF) && defined(DIAG_DURING_INTERRUPT) + sah_Dump_Chain + (¤t_entry-> + desc, + current_entry-> + desc. + dma_addr); +#endif /* DIAG_DRV_IF */ + sah_HW_Write_DAR + (current_entry-> + desc. + dma_addr); + current_entry-> + status = + SAH_STATE_ON_SAHARA; +#ifndef SUBMIT_MULTIPLE_DARS + } + current_entry = NULL; /* exit loop */ +#endif + } + } + os_unlock_restore_context + (desc_queue_lock, lock_flags); + } while ((dar == 0) && (current_entry != NULL)); +#ifdef SAHARA_POWER_MANAGEMENT + } /* sah_device_power_manager */ +#endif + } else { + if (state == SAH_EXEC_FAULT) { + sah_Head_Desc *previous_entry; /* point to chain 1 */ + /* Address of request when fault occured */ + uint32_t bad_dar = sah_HW_Read_IDAR(); + + reset_flag = 1; /* SAHARA needs to be reset */ + + /* get first of possible two descriptor chain that was + * on SAHARA */ + os_lock_save_context(desc_queue_lock, + lock_flags); + previous_entry = + sah_Find_With_State(SAH_STATE_ON_SAHARA); + os_unlock_restore_context(desc_queue_lock, + lock_flags); + + /* if it exists, continue processing the fault */ + if (previous_entry) { + /* assume this chain didn't complete correctly */ + previous_entry->error_status = -1; + previous_entry->status = + SAH_STATE_OFF_SAHARA; + + /* get the second descriptor chain */ + os_lock_save_context(desc_queue_lock, + lock_flags); + current_entry = + sah_Find_With_State + (SAH_STATE_ON_SAHARA); + os_unlock_restore_context + (desc_queue_lock, lock_flags); + + /* if it exists, continue processing both chains */ + if (current_entry) { + /* assume this chain didn't complete correctly */ + current_entry->error_status = + -1; + current_entry->status = + SAH_STATE_OFF_SAHARA; + + /* now see if either can be identified as the one + * in progress when the fault occured */ + if (current_entry->desc. + dma_addr == bad_dar) { + /* the second descriptor chain was active when the + * fault occured, so the first descriptor chain + * was successfull */ + previous_entry-> + error_status = 0; + } else { + if (previous_entry-> + desc.dma_addr == + bad_dar) { + /* if the first chain was in progress when the + * fault occured, the second has not yet been + * touched, so reset it to PENDING */ + current_entry-> + status = + SAH_STATE_PENDING; + } + } + } + } +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) + } else { + /* shouldn't ever get here */ + if (state == SAH_EXEC_BUSY) { + LOG_KDIAG + ("Got Sahara interrupt in Busy state"); + } else { + if (state == SAH_EXEC_IDLE) { + LOG_KDIAG + ("Got Sahara interrupt in Idle state"); + } else { + LOG_KDIAG + ("Got Sahara interrupt in unknown state"); + } + } +#endif + } + } + + /* haven't handled the done1/error2 (the error 2 part), so setup to + * do that now. Otherwise, exit loop */ + state = (state == SAH_EXEC_DONE1_ERROR2) ? + SAH_EXEC_ERROR1 : SAH_EXEC_IDLE; + + /* Keep going while further status is available. */ + } while (state == SAH_EXEC_ERROR1); + + /* Disabling Sahara Clock only if the hardware is in idle state and + the DAR queue is empty.*/ + os_lock_save_context(desc_queue_lock, lock_flags); + current_entry = sah_Find_With_State(SAH_STATE_ON_SAHARA); + os_unlock_restore_context(desc_queue_lock, lock_flags); + + if ((current_entry == NULL) && (state == SAH_EXEC_IDLE)) { + +#ifdef DIAG_DRV_IF + LOG_KDIAG("SAHARA : Disabling the clocks\n") +#endif /* DIAG_DRV_IF */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) + mxc_clks_disable(SAHARA2_CLK); +#else + { + struct clk *clk = clk_get(NULL, "sahara_clk"); + if (clk != ERR_PTR(ENOENT)) + clk_disable(clk); + clk_put(clk); + } +#endif + + } + + return reset_flag; +} + +#endif /* ifndef SAHARA_POLL_MODE */ + +#ifdef SAHARA_POLL_MODE +/*! +******************************************************************************* +* Submits descriptor chain to SAHARA, polls on SAHARA for completion, process +* results, and dephysicalizes chain +* +* @brief Handle poll mode. +* +* @param entry Virtual address of a physicalized chain +* +* @return 0 this function is always successful +*/ + +unsigned long sah_Handle_Poll(sah_Head_Desc * entry) +{ + sah_Execute_Status hw_status; /* Sahara's status register */ + os_lock_context_t lock_flags; + + /* lock SARAHA */ + os_lock_save_context(desc_queue_lock, lock_flags); + +#ifdef SAHARA_POWER_MANAGEMENT + /* check if the dynamic power management is asserted */ + if (sah_dpm_flag) { + /* return that request failed to be processed */ + entry->result = FSL_RETURN_ERROR_S; + entry->fault_address = 0xBAD; + entry->op_status= 0xBAD; + entry->error_status = 0xBAD; + } else { +#endif /* SAHARA_POWER_MANAGEMENT */ + +#if defined(DIAG_DRV_IF) + sah_Dump_Chain(&entry->desc, entry->desc.dma_addr); +#endif /* DIAG_DRV_IF */ + /* Nothing can be in the dar if we got the lock */ + sah_HW_Write_DAR((uint32_t) (entry->desc.dma_addr)); + + /* Wait for SAHARA to finish with this entry */ + hw_status = sah_Wait_On_Sahara(); + + /* if entry completed successfully, mark it as such */ + /**** HARDWARE ERROR WORK AROUND (hw_status == SAH_EXEC_IDLE) *****/ + if ( +#ifndef SUBMIT_MULTIPLE_DARS + (hw_status == SAH_EXEC_IDLE) || (hw_status == SAH_EXEC_DONE1_BUSY2) || /* should not happen */ +#endif + (hw_status == SAH_EXEC_DONE1) + ) { + entry->error_status = 0; + entry->result = FSL_RETURN_OK_S; + } else { + /* SAHARA is reporting an error with entry */ + if (hw_status == SAH_EXEC_ERROR1) { + /* Gather extra diagnostic information */ + entry->fault_address = + sah_HW_Read_Fault_Address(); + /* Read this register last - it clears the error */ + entry->error_status = + sah_HW_Read_Error_Status(); + entry->op_status = 0; + /* translate from SAHARA error status to fsl_shw return values */ + entry->result = + sah_convert_error_status(entry-> + error_status); +#ifdef DIAG_DRV_STATUS + sah_Log_Error(entry->op_status, + entry->error_status, + entry->fault_address); +#endif + } else if (hw_status == SAH_EXEC_OPSTAT1) { + entry->op_status = sah_HW_Read_Op_Status(); + entry->error_status = 0; + entry->result = + sah_convert_op_status(op_status); + } else { + /* SAHARA entered FAULT state (or something bazaar has + * happened) */ + pr_debug + ("Sahara: hw_status = 0x%x; Stat: 0x%08x; IDAR: 0x%08x; " + "CDAR: 0x%08x; FltAdr: 0x%08x; Estat: 0x%08x\n", + hw_status, sah_HW_Read_Status(), + sah_HW_Read_IDAR(), sah_HW_Read_CDAR(), + sah_HW_Read_Fault_Address(), + sah_HW_Read_Error_Status()); +#ifdef DIAG_DRV_IF + { + int old_level = console_loglevel; + console_loglevel = 8; + sah_Dump_Chain(&(entry->desc), + entry->desc.dma_addr); + console_loglevel = old_level; + } +#endif + + entry->error_status = -1; + entry->result = FSL_RETURN_ERROR_S; + sah_HW_Reset(); + } + } +#ifdef SAHARA_POWER_MANAGEMENT + } +#endif + + if (!(entry->uco_flags & FSL_UCO_BLOCKING_MODE)) { + /* put it in results pool to allow get_results to work */ + sah_Queue_Append_Entry(&entry->user_info->result_pool, entry); + if (entry->uco_flags & FSL_UCO_CALLBACK_MODE) { + /* invoke callback */ + entry->user_info->callback(entry->user_info); + } + } else { + /* convert the descriptor link back to virtual memory, mark dirty pages + * if they are from user mode, and release the page cache for user + * pages + */ + entry = sah_DePhysicalise_Descriptors(entry); + } + + os_unlock_restore_context(desc_queue_lock, lock_flags); + + return 0; +} + +#endif /* SAHARA_POLL_MODE */ + +/****************************************************************************** +* The following is the implementation of the Dynamic Power Management +* functionality. +******************************************************************************/ +#ifdef SAHARA_POWER_MANAGEMENT + +static bool sah_dpm_init_flag; + +/* dynamic power management information for the sahara driver */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +static struct device_driver sah_dpm_driver = { + .name = "sahara_", + .bus = &platform_bus_type, +#else +static struct platform_driver sah_dpm_driver = { + .driver.name = "sahara_", + .driver.bus = &platform_bus_type, +#endif + .suspend = sah_dpm_suspend, + .resume = sah_dpm_resume +}; + +/* dynamic power management information for the sahara HW device */ +static struct platform_device sah_dpm_device = { + .name = "sahara_", + .id = 1, +}; + +/*! +******************************************************************************* +* Initilaizes the dynamic power managment functionality +* +* @brief Initialization of the Dynamic Power Management functionality +* +* @return 0 = success; failed otherwise +*/ +int sah_dpm_init() +{ + int status; + + /* dpm is not asserted */ + sah_dpm_flag = FALSE; + + /* register the driver to the kernel */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + status = os_register_to_driver(&sah_dpm_driver); +#else + status = os_register_to_driver(&sah_dpm_driver.driver); +#endif + + if (status == 0) { + /* register a single sahara chip */ + /*status = platform_device_register(&sah_dpm_device); */ + status = os_register_a_device(&sah_dpm_device); + + /* if something went awry, unregister the driver */ + if (status != 0) { + /*driver_unregister(&sah_dpm_driver); */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + os_unregister_from_driver(&sah_dpm_driver); +#else + os_unregister_from_driver(&sah_dpm_driver.driver); +#endif + sah_dpm_init_flag = FALSE; + } else { + /* if everything went okay, flag that life is good */ + sah_dpm_init_flag = TRUE; + } + } + + /* let the kernel know how it went */ + return status; + +} + +/*! +******************************************************************************* +* Unregister the dynamic power managment functionality +* +* @brief Unregister the Dynamic Power Management functionality +* +*/ +void sah_dpm_close() +{ + /* if dynamic power management was initilaized, kill it */ + if (sah_dpm_init_flag == TRUE) { + /*driver_unregister(&sah_dpm_driver); */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + os_unregister_from_driver(&sah_dpm_driver); +#else + os_unregister_from_driver(&sah_dpm_driver.driver); +#endif + /*platform_device_register(&sah_dpm_device); */ + os_unregister_a_device(&sah_dpm_device); + } +} + +/*! +******************************************************************************* +* Callback routine defined by the Linux Device Model / Dynamic Power management +* extension. It sets a global flag to disallow the driver to enter queued items +* into Sahara's DAR. +* +* It allows the current active descriptor chains to complete before it returns +* +* @brief Suspends the driver +* +* @param dev contains device information +* @param state contains state information +* @param level level of shutdown +* +* @return 0 = success; failed otherwise +*/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +static int sah_dpm_suspend(struct device *dev, uint32_t state, uint32_t level) +#else +static int sah_dpm_suspend(struct platform_device *dev, pm_message_t state) +#endif +{ + sah_Head_Desc *entry = NULL; + os_lock_context_t lock_flags; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + switch (level) { + case SUSPEND_DISABLE: + /* Assert dynamic power management. This stops the driver from + * entering queued requests to Sahara */ + sah_dpm_flag = TRUE; + break; + + case SUSPEND_SAVE_STATE: + break; + + case SUSPEND_POWER_DOWN: + /* hopefully between the DISABLE call and this one, the outstanding + * work Sahara was doing complete. this checks (and waits) for + * those entries that were already active on Sahara to complete */ + /* lock queue while searching */ + os_lock_save_context(desc_queue_lock, lock_flags); + do { + entry = sah_Find_With_State(SAH_STATE_ON_SAHARA); + } while (entry != NULL); + os_unlock_restore_context(desc_queue_lock, lock_flags); + + /* now we kill the clock so the control circuitry isn't sucking + * any power */ + mxc_clks_disable(SAHARA2_CLK); + break; + } +#else + /* Assert dynamic power management. This stops the driver from + * entering queued requests to Sahara */ + sah_dpm_flag = TRUE; + + /* Now wait for any outstanding work Sahara was doing to complete. + * this checks (and waits) for + * those entries that were already active on Sahara to complete */ + do { + /* lock queue while searching */ + os_lock_save_context(desc_queue_lock, lock_flags); + entry = sah_Find_With_State(SAH_STATE_ON_SAHARA); + os_unlock_restore_context(desc_queue_lock, lock_flags); + } while (entry != NULL); + + /* now we kill the clock so the control circuitry isn't sucking + * any power */ + { + struct clk *clk = clk_get(NULL, "sahara_clk"); + if (clk != ERR_PTR(ENOENT)) { + clk_disable(clk); + } + } +#endif + + return 0; +} + +/*! +******************************************************************************* +* Callback routine defined by the Linux Device Model / Dynamic Power management +* extension. It cleears a global flag to allow the driver to enter queued items +* into Sahara's DAR. +* +* It primes the mechanism to start depleting the queue +* +* @brief Resumes the driver +* +* @param dev contains device information +* @param level level of resumption +* +* @return 0 = success; failed otherwise +*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +static int sah_dpm_resume(struct device *dev, uint32_t level) +#else +static int sah_dpm_resume(struct platform_device *dev) +#endif +{ + sah_Head_Desc *entry = NULL; + os_lock_context_t lock_flags; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + switch (level) { + case RESUME_POWER_ON: + /* enable Sahara's clock */ + mxc_clks_enable(SAHARA2_CLK); + break; + + case RESUME_RESTORE_STATE: + break; + + case RESUME_ENABLE: + /* Disable dynamic power managment. This allows the driver to put + * entries into Sahara's DAR */ + sah_dpm_flag = FALSE; + + /* find a pending entry to prime the pump */ + os_lock_save_context(desc_queue_lock, lock_flags); + entry = sah_Find_With_State(SAH_STATE_PENDING); + if (entry != NULL) { + sah_Queue_Manager_Prime(entry); + } + os_unlock_restore_context(desc_queue_lock, lock_flags); + break; + } +#else + { + /* enable Sahara's clock */ + struct clk *clk = clk_get(NULL, "sahara_clk"); + + if (clk != ERR_PTR(ENOENT)) { + clk_enable(clk); + } + } + sah_dpm_flag = FALSE; + + /* find a pending entry to prime the pump */ + os_lock_save_context(desc_queue_lock, lock_flags); + entry = sah_Find_With_State(SAH_STATE_PENDING); + if (entry != NULL) { + sah_Queue_Manager_Prime(entry); + } + os_unlock_restore_context(desc_queue_lock, lock_flags); +#endif + return 0; +} + +#endif /* SAHARA_POWER_MANAGEMENT */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_hardware_interface.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_hardware_interface.c @@ -0,0 +1,854 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file sah_hardware_interface.c + * + * @brief Provides an interface to the SAHARA hardware registers. + * + */ + +/* SAHARA Includes */ +#include +#include +#include +#include + +#if defined DIAG_DRV_IF || defined(DO_DBG) +#include +#ifndef LOG_KDIAG +#define LOG_KDIAG(x) os_printk("%s\n", x) +#endif + +static void sah_Dump_Link(const char *prefix, const sah_Link * link, + dma_addr_t addr); + +/* This is for sprintf() to use when constructing output. */ +#define DIAG_MSG_SIZE 1024 +/* was 200 */ +#define MAX_DUMP 200 +static char Diag_msg[DIAG_MSG_SIZE]; + +#endif /* DIAG_DRV_IF */ + +/*! + * Number of descriptors sent to Sahara. This value should only be updated + * with the main queue lock held. + */ +uint32_t dar_count; + +/*! The "link-list optimize" bit in the Header of a Descriptor */ +#define SAH_HDR_LLO 0x01000000 + +/* IO_ADDRESS() is Linux macro -- need portable equivalent */ +#define SAHARA_BASE_ADDRESS IO_ADDRESS(SAHA_BASE_ADDR) +#define SAHARA_VERSION_REGISTER_OFFSET 0x000 +#define SAHARA_DAR_REGISTER_OFFSET 0x004 +#define SAHARA_CONTROL_REGISTER_OFFSET 0x008 +#define SAHARA_COMMAND_REGISTER_OFFSET 0x00C +#define SAHARA_STATUS_REGISTER_OFFSET 0x010 +#define SAHARA_ESTATUS_REGISTER_OFFSET 0x014 +#define SAHARA_FLT_ADD_REGISTER_OFFSET 0x018 +#define SAHARA_CDAR_REGISTER_OFFSET 0x01C +#define SAHARA_IDAR_REGISTER_OFFSET 0x020 +#define SAHARA_OSTATUS_REGISTER_OFFSET 0x028 +#define SAHARA_CONFIG_REGISTER_OFFSET 0x02C +#define SAHARA_MM_STAT_REGISTER_OFFSET 0x030 + +/*! Register within Sahara which contains hardware version. (1 or 2). */ +#define SAHARA_VERSION_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_VERSION_REGISTER_OFFSET) + +/*! Register within Sahara which is used to provide new work to the block. */ +#define SAHARA_DAR_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_DAR_REGISTER_OFFSET) + +/*! Register with Sahara which is used for configuration. */ +#define SAHARA_CONTROL_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_CONTROL_REGISTER_OFFSET) + +/*! Register with Sahara which is used for changing status. */ +#define SAHARA_COMMAND_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_COMMAND_REGISTER_OFFSET) + +/*! Register with Sahara which is contains status and state. */ +#define SAHARA_STATUS_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_STATUS_REGISTER_OFFSET) + +/*! Register with Sahara which is contains error status information. */ +#define SAHARA_ESTATUS_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_ESTATUS_REGISTER_OFFSET) + +/*! Register with Sahara which is contains faulting address information. */ +#define SAHARA_FLT_ADD_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_FLT_ADD_REGISTER_OFFSET) + +/*! Register with Sahara which is contains current descriptor address. */ +#define SAHARA_CDAR_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_CDAR_REGISTER_OFFSET) + +/*! Register with Sahara which is contains initial descriptor address (of a + chain). */ +#define SAHARA_IDAR_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_IDAR_REGISTER_OFFSET) + +/*! Register with Sahara which is contains op status information. */ +#define SAHARA_OSTATUS_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_OSTATUS_REGISTER_OFFSET) + +/*! Register with Sahara which is contains configuration information. */ +#define SAHARA_CONFIG_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_CONFIG_REGISTER_OFFSET) + +/*! Register with Sahara which is contains configuration information. */ +#define SAHARA_MM_STAT_REGISTER (SAHARA_BASE_ADDRESS + \ + SAHARA_MM_STAT_REGISTER_OFFSET) + +/* Local Functions */ +#if defined DIAG_DRV_IF || defined DO_DBG +void sah_Dump_Region(const char *prefix, const unsigned char *data, + dma_addr_t addr, unsigned length); + +#endif /* DIAG_DRV_IF */ + +/* time out value when polling SAHARA status register for completion */ +static uint32_t sah_poll_timeout = 0xFFFFFFFF; + +/*! + * Polls Sahara to determine when its current operation is complete + * + * @return last value found in Sahara's status register + */ +sah_Execute_Status sah_Wait_On_Sahara() +{ + uint32_t count = 0; /* ensure we don't get stuck in the loop forever */ + sah_Execute_Status status; /* Sahara's status register */ + uint32_t stat_reg; + + pr_debug("Entered sah_Wait_On_Sahara\n"); + + do { + /* get current status register from Sahara */ + stat_reg = sah_HW_Read_Status(); + status = stat_reg & SAH_EXEC_STATE_MASK; + + /* timeout if SAHARA takes too long to complete */ + if (++count == sah_poll_timeout) { + status = SAH_EXEC_FAULT; + printk("sah_Wait_On_Sahara timed out\n"); + } + + /* stay in loop as long as Sahara is still busy */ + } while ((status == SAH_EXEC_BUSY) || (status == SAH_EXEC_DONE1_BUSY2)); + + if (status == SAH_EXEC_ERROR1) { + if (stat_reg & OP_STATUS) { + status = SAH_EXEC_OPSTAT1; + } + } + + return status; +} /* sah_Wait_on_Sahara() */ + +/*! + * This function resets the SAHARA hardware. The following operations are + * performed: + * 1. Resets SAHARA. + * 2. Requests BATCH mode. + * 3. Enables interrupts. + * 4. Requests Little Endian mode. + * + * @brief SAHARA hardware reset function. + * + * @return void + */ +int sah_HW_Reset(void) +{ + sah_Execute_Status sah_state; + int status; /* this is the value to return to the calling routine */ + uint32_t saha_control = 0; + +#ifndef USE_3WORD_BURST +#ifdef FSL_HAVE_SAHARA2 + saha_control |= (8 << 16); /* Allow 8-word burst */ +#endif +#else +/***************** HARDWARE BUG WORK AROUND ******************/ +/* A burst size of > 4 can cause Sahara DMA to issue invalid AHB transactions + * when crossing 1KB boundaries. By limiting the 'burst size' to 3, these + * invalid transactions will not be generated, but Sahara will still transfer + * data more efficiently than if the burst size were set to 1. + */ + saha_control |= (3 << 16); /* Limit DMA burst size. For versions 2/3 */ +#endif /* USE_3WORD_BURST */ + +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Address of SAHARA_BASE_ADDRESS = 0x%08x\n", + SAHARA_BASE_ADDRESS); + LOG_KDIAG(Diag_msg); + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Sahara Status register before reset: %08x", + sah_HW_Read_Status()); + LOG_KDIAG(Diag_msg); +#endif + + /* Write the Reset & BATCH mode command to the SAHARA Command register. */ + sah_HW_Write_Command(CMD_BATCH | CMD_RESET); +#ifdef SAHARA4_NO_USE_SQUIB + { + uint32_t cfg = sah_HW_Read_Config(); + cfg &= ~0x10000; + sah_HW_Write_Config(cfg); + } +#endif + + sah_poll_timeout = 0x0FFFFFFF; + sah_state = sah_Wait_On_Sahara(); +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Sahara Status register after reset: %08x", + sah_HW_Read_Status()); + LOG_KDIAG(Diag_msg); +#endif + /* on reset completion, check that Sahara is in the idle state */ + status = (sah_state == SAH_EXEC_IDLE) ? 0 : OS_ERROR_FAIL_S; + + /* Set initial value out of reset */ + sah_HW_Write_Control(saha_control); + +#ifndef NO_RESEED_WORKAROUND +/***************** HARDWARE BUG WORK AROUND ******************/ +/* In order to set the 'auto reseed' bit, must first acquire a random value. */ + /* + * to solve a hardware bug, a random number must be generated before + * the 'RNG Auto Reseed' bit can be set. So this generates a random + * number that is thrown away. + * + * Note that the interrupt bit has not been set at this point so + * the result can be polled. + */ +#ifdef DIAG_DRV_IF + LOG_KDIAG("Create and submit Random Number Descriptor"); +#endif + + if (status == OS_ERROR_OK_S) { + /* place to put random number */ + volatile uint32_t *random_data_ptr; + sah_Head_Desc *random_desc; + dma_addr_t desc_dma; + dma_addr_t rand_dma; + const int rnd_cnt = 3; /* how many random 32-bit values to get */ + + /* Get space for data -- assume at least 32-bit aligned! */ + random_data_ptr = os_alloc_memory(rnd_cnt * sizeof(uint32_t), + GFP_ATOMIC); + + random_desc = sah_Alloc_Head_Descriptor(); + + if ((random_data_ptr == NULL) || (random_desc == NULL)) { + status = OS_ERROR_FAIL_S; + } else { + int i; + + /* Clear out values */ + for (i = 0; i < rnd_cnt; i++) { + random_data_ptr[i] = 0; + } + + rand_dma = os_pa(random_data_ptr); + + random_desc->desc.header = 0xB18C0000; /* LLO get random number */ + random_desc->desc.len1 = + rnd_cnt * sizeof(*random_data_ptr); + random_desc->desc.ptr1 = (void *)rand_dma; + random_desc->desc.original_ptr1 = + (void *)random_data_ptr; + + random_desc->desc.len2 = 0; /* not used */ + random_desc->desc.ptr2 = 0; /* not used */ + + random_desc->desc.next = 0; /* chain terminates here */ + random_desc->desc.original_next = 0; /* chain terminates here */ + + desc_dma = random_desc->desc.dma_addr; + + /* Force in-cache data out to RAM */ + os_cache_clean_range(random_data_ptr, + rnd_cnt * + sizeof(*random_data_ptr)); + + /* pass descriptor to Sahara */ + sah_HW_Write_DAR(desc_dma); + + /* + * Wait for RNG to complete (interrupts are disabled at this point + * due to sahara being reset previously) then check for error + */ + sah_state = sah_Wait_On_Sahara(); + /* Force CPU to ignore in-cache and reload from RAM */ + os_cache_inv_range(random_data_ptr, + rnd_cnt * sizeof(*random_data_ptr)); + + /* if it didn't move to done state, an error occured */ + if ( +#ifndef SUBMIT_MULTIPLE_DARS + (sah_state != SAH_EXEC_IDLE) && +#endif + (sah_state != SAH_EXEC_DONE1) + ) { + status = OS_ERROR_FAIL_S; + os_printk + ("(sahara) Failure: state is %08x; random_data is" + " %08x\n", sah_state, *random_data_ptr); + os_printk + ("(sahara) CDAR: %08x, IDAR: %08x, FADR: %08x," + " ESTAT: %08x\n", sah_HW_Read_CDAR(), + sah_HW_Read_IDAR(), + sah_HW_Read_Fault_Address(), + sah_HW_Read_Error_Status()); + } else { + int i; + int seen_rand = 0; + + for (i = 0; i < rnd_cnt; i++) { + if (*random_data_ptr != 0) { + seen_rand = 1; + break; + } + } + if (!seen_rand) { + status = OS_ERROR_FAIL_S; + os_printk + ("(sahara) Error: Random number is zero!\n"); + } + } + } + + if (random_data_ptr) { + os_free_memory((void *)random_data_ptr); + } + if (random_desc) { + sah_Free_Head_Descriptor(random_desc); + } + } +/***************** END HARDWARE BUG WORK AROUND ******************/ +#endif + + if (status == 0) { +#ifdef FSL_HAVE_SAHARA2 + saha_control |= CTRL_RNG_RESEED; +#endif + +#ifndef SAHARA_POLL_MODE + saha_control |= CTRL_INT_EN; /* enable interrupts */ +#else + sah_poll_timeout = SAHARA_POLL_MODE_TIMEOUT; +#endif + +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Setting up Sahara's Control Register: %08x\n", + saha_control); + LOG_KDIAG(Diag_msg); +#endif + + /* Rewrite the setup to the SAHARA Control register */ + sah_HW_Write_Control(saha_control); +#ifdef DIAG_DRV_IF + snprintf(Diag_msg, DIAG_MSG_SIZE, + "Sahara Status register after control write: %08x", + sah_HW_Read_Status()); + LOG_KDIAG(Diag_msg); +#endif + +#ifdef FSL_HAVE_SAHARA4 + { + uint32_t cfg = sah_HW_Read_Config(); + sah_HW_Write_Config(cfg | 0x100); /* Add RNG auto-reseed */ + } +#endif + } else { +#ifdef DIAG_DRV_IF + LOG_KDIAG("Reset failed\n"); +#endif + } + + return status; +} /* sah_HW_Reset() */ + +/*! + * This function enables High Assurance mode. + * + * @brief SAHARA hardware enable High Assurance mode. + * + * @return FSL_RETURN_OK_S - if HA was set successfully + * @return FSL_RETURN_INTERNAL_ERROR_S - if HA was not set due to SAHARA + * being busy. + */ +fsl_shw_return_t sah_HW_Set_HA(void) +{ + /* This is the value to write to the register */ + uint32_t value; + + /* Read from the control register. */ + value = sah_HW_Read_Control(); + + /* Set the HA bit */ + value |= CTRL_HA; + + /* Write to the control register. */ + sah_HW_Write_Control(value); + + /* Read from the control register. */ + value = sah_HW_Read_Control(); + + return (value & CTRL_HA) ? FSL_RETURN_OK_S : + FSL_RETURN_INTERNAL_ERROR_S; +} + +/*! + * This function reads the SAHARA hardware Version Register. + * + * @brief Read SAHARA hardware Version Register. + * + * @return uint32_t Register value. + */ +uint32_t sah_HW_Read_Version(void) +{ + return os_read32(SAHARA_VERSION_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Control Register. + * + * @brief Read SAHARA hardware Control Register. + * + * @return uint32_t Register value. + */ +uint32_t sah_HW_Read_Control(void) +{ + return os_read32(SAHARA_CONTROL_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Status Register. + * + * @brief Read SAHARA hardware Status Register. + * + * @return uint32_t Register value. + */ +uint32_t sah_HW_Read_Status(void) +{ + return os_read32(SAHARA_STATUS_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Error Status Register. + * + * @brief Read SAHARA hardware Error Status Register. + * + * @return uint32_t Error Status value. + */ +uint32_t sah_HW_Read_Error_Status(void) +{ + return os_read32(SAHARA_ESTATUS_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Op Status Register. + * + * @brief Read SAHARA hardware Op Status Register. + * + * @return uint32_t Op Status value. + */ +uint32_t sah_HW_Read_Op_Status(void) +{ + return os_read32(SAHARA_OSTATUS_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Descriptor Address Register. + * + * @brief Read SAHARA hardware DAR Register. + * + * @return uint32_t DAR value. + */ +uint32_t sah_HW_Read_DAR(void) +{ + return os_read32(SAHARA_DAR_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Current Descriptor Address Register. + * + * @brief Read SAHARA hardware CDAR Register. + * + * @return uint32_t CDAR value. + */ +uint32_t sah_HW_Read_CDAR(void) +{ + return os_read32(SAHARA_CDAR_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Initial Descriptor Address Register. + * + * @brief Read SAHARA hardware IDAR Register. + * + * @return uint32_t IDAR value. + */ +uint32_t sah_HW_Read_IDAR(void) +{ + return os_read32(SAHARA_IDAR_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Fault Address Register. + * + * @brief Read SAHARA Fault Address Register. + * + * @return uint32_t Fault Address value. + */ +uint32_t sah_HW_Read_Fault_Address(void) +{ + return os_read32(SAHARA_FLT_ADD_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Multiple Master Status Register. + * + * @brief Read SAHARA hardware MM Stat Register. + * + * @return uint32_t MM Stat value. + */ +uint32_t sah_HW_Read_MM_Status(void) +{ + return os_read32(SAHARA_MM_STAT_REGISTER); +} + +/*! + * This function reads the SAHARA hardware Configuration Register. + * + * @brief Read SAHARA Configuration Register. + * + * @return uint32_t Configuration value. + */ +uint32_t sah_HW_Read_Config(void) +{ + return os_read32(SAHARA_CONFIG_REGISTER); +} + +/*! + * This function writes a command to the SAHARA hardware Command Register. + * + * @brief Write to SAHARA hardware Command Register. + * + * @param command An unsigned 32bit command value. + * + * @return void + */ +void sah_HW_Write_Command(uint32_t command) +{ + os_write32(SAHARA_COMMAND_REGISTER, command); +} + +/*! + * This function writes a control value to the SAHARA hardware Control + * Register. + * + * @brief Write to SAHARA hardware Control Register. + * + * @param control An unsigned 32bit control value. + * + * @return void + */ +void sah_HW_Write_Control(uint32_t control) +{ + os_write32(SAHARA_CONTROL_REGISTER, control); +} + +/*! + * This function writes a configuration value to the SAHARA hardware Configuration + * Register. + * + * @brief Write to SAHARA hardware Configuration Register. + * + * @param configuration An unsigned 32bit configuration value. + * + * @return void + */ +void sah_HW_Write_Config(uint32_t configuration) +{ + os_write32(SAHARA_CONFIG_REGISTER, configuration); +} + +/*! + * This function writes a descriptor address to the SAHARA Descriptor Address + * Register. + * + * @brief Write to SAHARA Descriptor Address Register. + * + * @param pointer An unsigned 32bit descriptor address value. + * + * @return void + */ +void sah_HW_Write_DAR(uint32_t pointer) +{ + os_write32(SAHARA_DAR_REGISTER, pointer); + dar_count++; +} + +#if defined DIAG_DRV_IF || defined DO_DBG + +static char *interpret_header(uint32_t header) +{ + unsigned desc_type = ((header >> 24) & 0x70) | ((header >> 16) & 0xF); + + switch (desc_type) { + case 0x12: + return "5/SKHA_ST_CTX"; + case 0x13: + return "35/SKHA_LD_MODE_KEY"; + case 0x14: + return "38/SKHA_LD_MODE_IN_CPHR_ST_CTX"; + case 0x15: + return "4/SKHA_IN_CPHR_OUT"; + case 0x16: + return "34/SKHA_ST_SBOX"; + case 0x18: + return "1/SKHA_LD_MODE_IV_KEY"; + case 0x19: + return "33/SKHA_ST_SBOX"; + case 0x1D: + return "2/SKHA_LD_MODE_IN_CPHR_OUT"; + case 0x22: + return "11/MDHA_ST_MD"; + case 0x25: + return "10/MDHA_HASH_ST_MD"; + case 0x28: + return "6/MDHA_LD_MODE_MD_KEY"; + case 0x2A: + return "39/MDHA_ICV"; + case 0x2D: + return "8/MDHA_LD_MODE_HASH_ST_MD"; + case 0x3C: + return "18/RNG_GEN"; + case 0x40: + return "19/PKHA_LD_N_E"; + case 0x41: + return "36/PKHA_LD_A3_B0"; + case 0x42: + return "27/PKHA_ST_A_B"; + case 0x43: + return "22/PKHA_LD_A_B"; + case 0x44: + return "23/PKHA_LD_A0_A1"; + case 0x45: + return "24/PKHA_LD_A2_A3"; + case 0x46: + return "25/PKHA_LD_B0_B1"; + case 0x47: + return "26/PKHA_LD_B2_B3"; + case 0x48: + return "28/PKHA_ST_A0_A1"; + case 0x49: + return "29/PKHA_ST_A2_A3"; + case 0x4A: + return "30/PKHA_ST_B0_B1"; + case 0x4B: + return "31/PKHA_ST_B2_B3"; + case 0x4C: + return "32/PKHA_EX_ST_B1"; + case 0x4D: + return "20/PKHA_LD_A_EX_ST_B"; + case 0x4E: + return "21/PKHA_LD_N_EX_ST_B"; + case 0x4F: + return "37/PKHA_ST_B1_B2"; + default: + return "??/UNKNOWN"; + } +} /* cvt_desc_name() */ + +/*! + * Dump chain of descriptors to the log. + * + * @brief Dump descriptor chain + * + * @param chain Kernel virtual address of start of chain of descriptors + * + * @return void + */ +void sah_Dump_Chain(const sah_Desc * chain, dma_addr_t addr) +{ + int desc_no = 1; + + pr_debug("Chain for Sahara\n"); + + while (chain != NULL) { + char desc_name[50]; + + sprintf(desc_name, "Desc %02d (%s)\n" KERN_DEBUG "Desc ", + desc_no++, interpret_header(chain->header)); + + sah_Dump_Words(desc_name, (unsigned *)chain, addr, + 6 /* #words in h/w link */ ); + if (chain->original_ptr1) { + if (chain->header & SAH_HDR_LLO) { + sah_Dump_Region(" Data1", + (unsigned char *)chain-> + original_ptr1, + (dma_addr_t) chain->ptr1, + chain->len1); + } else { + sah_Dump_Link(" Link1", chain->original_ptr1, + (dma_addr_t) chain->ptr1); + } + } + if (chain->ptr2) { + if (chain->header & SAH_HDR_LLO) { + sah_Dump_Region(" Data2", + (unsigned char *)chain-> + original_ptr2, + (dma_addr_t) chain->ptr2, + chain->len2); + } else { + sah_Dump_Link(" Link2", chain->original_ptr2, + (dma_addr_t) chain->ptr2); + } + } + + addr = (dma_addr_t) chain->next; + chain = (chain->next) ? (chain->original_next) : NULL; + } +} + +/*! + * Dump chain of links to the log. + * + * @brief Dump chain of links + * + * @param prefix Text to put in front of dumped data + * @param link Kernel virtual address of start of chain of links + * + * @return void + */ +static void sah_Dump_Link(const char *prefix, const sah_Link * link, + dma_addr_t addr) +{ +#ifdef DUMP_SCC_DATA + extern uint8_t *sahara_partition_base; + extern dma_addr_t sahara_partition_phys; +#endif + + while (link != NULL) { + sah_Dump_Words(prefix, (unsigned *)link, addr, + 3 /* # words in h/w link */ ); + if (link->flags & SAH_STORED_KEY_INFO) { +#ifdef SAH_DUMP_DATA +#ifdef DUMP_SCC_DATA + sah_Dump_Region(" Data", + (uint8_t *) link->data - + (uint8_t *) sahara_partition_phys + + sahara_partition_base, + (dma_addr_t) link->data, link->len); +#else + pr_debug(" Key Slot %d\n", link->slot); +#endif +#endif + } else { +#ifdef SAH_DUMP_DATA + sah_Dump_Region(" Data", link->original_data, + (dma_addr_t) link->data, link->len); +#endif + } + addr = (dma_addr_t) link->next; + link = link->original_next; + } +} + +/*! + * Dump given region of data to the log. + * + * @brief Dump data + * + * @param prefix Text to put in front of dumped data + * @param data Kernel virtual address of start of region to dump + * @param length Amount of data to dump + * + * @return void + */ +void sah_Dump_Region(const char *prefix, const unsigned char *data, + dma_addr_t addr, unsigned length) +{ + unsigned count; + char *output; + unsigned data_len; + + sprintf(Diag_msg, "%s (%08X,%u):", prefix, addr, length); + + /* Restrict amount of data to dump */ + if (length > MAX_DUMP) { + data_len = MAX_DUMP; + } else { + data_len = length; + } + + /* We've already printed some text in output buffer, skip over it */ + output = Diag_msg + strlen(Diag_msg); + + for (count = 0; count < data_len; count++) { + if ((count % 4) == 0) { + *output++ = ' '; + } + sprintf(output, "%02X", *data++); + output += 2; + } + + pr_debug("%s\n", Diag_msg); +} + +/*! + * Dump given word of data to the log. + * + * @brief Dump data + * + * @param prefix Text to put in front of dumped data + * @param data Kernel virtual address of start of region to dump + * @param word_count Amount of data to dump + * + * @return void + */ +void sah_Dump_Words(const char *prefix, const unsigned *data, dma_addr_t addr, + unsigned word_count) +{ + char *output; + + sprintf(Diag_msg, "%s (%08X,%uw): ", prefix, addr, word_count); + + /* We've already printed some text in output buffer, skip over it */ + output = Diag_msg + strlen(Diag_msg); + + while (word_count--) { + sprintf(output, "%08X ", *data++); + output += 9; + } + + pr_debug("%s\n", Diag_msg); + +} + +#endif /* DIAG_DRV_IF */ + +/* End of sah_hardware_interface.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_hash.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_hash.c @@ -0,0 +1,186 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_hash.c + * + * This file implements Cryptographic Hashing functions of the FSL SHW API + * for Sahara. This does not include HMAC. + */ + +#include "sahara.h" +#include "sf_util.h" + +#ifdef LINUX_KERNEL +EXPORT_SYMBOL(fsl_shw_hash); +#endif + +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-005 */ +/*! + * Hash a stream of data with a cryptographic hash algorithm. + * + * The flags in the @a hash_ctx control the operation of this function. + * + * Hashing functions work on 64 octets of message at a time. Therefore, when + * any partial hashing of a long message is performed, the message @a length of + * each segment must be a multiple of 64. When ready to + * #FSL_HASH_FLAGS_FINALIZE the hash, the @a length may be any value. + * + * With the #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_FINALIZE flags on, a + * one-shot complete hash, including padding, will be performed. The @a length + * may be any value. + * + * The first octets of a data stream can be hashed by setting the + * #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_SAVE flags. The @a length must be + * a multiple of 64. + * + * The flag #FSL_HASH_FLAGS_LOAD is used to load a context previously saved by + * #FSL_HASH_FLAGS_SAVE. The two in combination will allow a (multiple-of-64 + * octets) 'middle sequence' of the data stream to be hashed with the + * beginning. The @a length must again be a multiple of 64. + * + * Since the flag #FSL_HASH_FLAGS_LOAD is used to load a context previously + * saved by #FSL_HASH_FLAGS_SAVE, the #FSL_HASH_FLAGS_LOAD and + * #FSL_HASH_FLAGS_FINALIZE flags, used together, can be used to finish the + * stream. The @a length may be any value. + * + * If the user program wants to do the padding for the hash, it can leave off + * the #FSL_HASH_FLAGS_FINALIZE flag. The @a length must then be a multiple of + * 64 octets. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] hash_ctx Hashing algorithm and state of the cipher. + * @param msg Pointer to the data to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result If not null, pointer to where to store the hash + * digest. + * @param result_len Number of octets to store in @a result. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hash(fsl_shw_uco_t * user_ctx, + fsl_shw_hco_t * hash_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + SAH_SF_DCLS; + unsigned ctx_flags = (hash_ctx->flags & (FSL_HASH_FLAGS_INIT + | FSL_HASH_FLAGS_LOAD + | FSL_HASH_FLAGS_SAVE + | FSL_HASH_FLAGS_FINALIZE)); + + SAH_SF_USER_CHECK(); + + /* Reset expectations if user gets overly zealous. */ + if (result_len > hash_ctx->digest_length) { + result_len = hash_ctx->digest_length; + } + + /* Validate hash ctx flags. + * Need INIT or LOAD but not both. + * Need SAVE or digest ptr (both is ok). + */ + if (((ctx_flags & (FSL_HASH_FLAGS_INIT | FSL_HASH_FLAGS_LOAD)) + == (FSL_HASH_FLAGS_INIT | FSL_HASH_FLAGS_LOAD)) + || ((ctx_flags & (FSL_HASH_FLAGS_INIT | FSL_HASH_FLAGS_LOAD)) == 0) + || (!(ctx_flags & FSL_HASH_FLAGS_SAVE) && (result == NULL))) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + if (ctx_flags & FSL_HASH_FLAGS_INIT) { + sah_Oct_Str out_ptr; + unsigned out_len; + + /* Create desc to perform the initial hashing operation */ + /* Desc. #8 w/INIT and algorithm */ + header = SAH_HDR_MDHA_SET_MODE_HASH + ^ sah_insert_mdha_init + ^ sah_insert_mdha_algorithm[hash_ctx->algorithm]; + + /* If user wants one-shot, set padding operation. */ + if (ctx_flags & FSL_HASH_FLAGS_FINALIZE) { + header ^= sah_insert_mdha_pdata; + } + + /* Determine where Digest will go - hash_ctx or result */ + if (ctx_flags & FSL_HASH_FLAGS_SAVE) { + out_ptr = (sah_Oct_Str) hash_ctx->context; + out_len = hash_ctx->context_register_length; + } else { + out_ptr = result; + out_len = (result_len > hash_ctx->digest_length) + ? hash_ctx->digest_length : result_len; + } + + DESC_IN_OUT(header, length, (sah_Oct_Str) msg, out_len, + out_ptr); + } else { /* not doing hash INIT */ + void *out_ptr; + unsigned out_len; + + /* + * Build two descriptors -- one to load in context/set mode, the + * other to compute & retrieve hash/context value. + * + * First up - Desc. #6 to load context. + */ + /* Desc. #8 w/algorithm */ + header = SAH_HDR_MDHA_SET_MODE_MD_KEY + ^ sah_insert_mdha_algorithm[hash_ctx->algorithm]; + + if (ctx_flags & FSL_HASH_FLAGS_FINALIZE) { + header ^= sah_insert_mdha_pdata; + } + + /* Message Digest (in) */ + DESC_IN_IN(header, + hash_ctx->context_register_length, + (sah_Oct_Str) hash_ctx->context, 0, NULL); + + if (ctx_flags & FSL_HASH_FLAGS_SAVE) { + out_ptr = hash_ctx->context; + out_len = hash_ctx->context_register_length; + } else { + out_ptr = result; + out_len = result_len; + } + + /* Second -- run data through and retrieve ctx regs */ + /* Desc. #10 - no mode register with this. */ + header = SAH_HDR_MDHA_HASH; + DESC_IN_OUT(header, length, (sah_Oct_Str) msg, out_len, + out_ptr); + } /* else not INIT */ + + /* Now that execution is rejoined, we can append another descriptor + to extract the digest/context a second time, into the result. */ + if ((ctx_flags & FSL_HASH_FLAGS_SAVE) + && (result != NULL) && (result_len != 0)) { + + header = SAH_HDR_MDHA_STORE_DIGEST; + + /* Message Digest (out) */ + DESC_IN_OUT(header, 0, NULL, + (result_len > hash_ctx->digest_length) + ? hash_ctx->digest_length : result_len, result); + } + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} /* fsl_shw_hash() */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_hmac.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_hmac.c @@ -0,0 +1,266 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_hmac.c + * + * This file implements Hashed Message Authentication Code functions of the FSL + * SHW API for Sahara. + */ + +#include "sahara.h" +#include "sf_util.h" + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_hmac_precompute); +EXPORT_SYMBOL(fsl_shw_hmac); +#endif + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-001 */ +/*! + * Get the precompute information + * + * + * @param user_ctx + * @param key_info + * @param hmac_ctx + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hmac_precompute(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + if ((key_info->algorithm != FSL_KEY_ALG_HMAC) || + (key_info->key_length > 64)) { + return FSL_RETURN_BAD_ALGORITHM_S; + } else if (key_info->key_length == 0) { + return FSL_RETURN_BAD_KEY_LENGTH_S; + } + + /* Set up to start the Inner Calculation */ + /* Desc. #8 w/IPAD, & INIT */ + header = SAH_HDR_MDHA_SET_MODE_HASH + ^ sah_insert_mdha_ipad + ^ sah_insert_mdha_init + ^ sah_insert_mdha_algorithm[hmac_ctx->algorithm]; + + DESC_KEY_OUT(header, key_info, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx->inner_precompute); + + /* Set up for starting Outer calculation */ + /* exchange IPAD bit for OPAD bit */ + header ^= (sah_insert_mdha_ipad ^ sah_insert_mdha_opad); + + /* Theoretically, we can leave this link out and use the key which is + * already in the register... however, if we do, the resulting opad + * hash does not have the correct value when using the model. */ + DESC_KEY_OUT(header, key_info, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx->outer_precompute); + + SAH_SF_EXECUTE(); + if (ret == FSL_RETURN_OK_S) { + /* flag that precomputes have been entered in this hco + * assume it'll first be used for initilizing */ + hmac_ctx->flags |= (FSL_HMAC_FLAGS_INIT | + FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT); + } + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-002 */ +/*! + * Get the hmac + * + * + * @param user_ctx Info for acquiring memory + * @param key_info + * @param hmac_ctx + * @param msg + * @param length + * @param result + * @param result_len + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_hmac(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + /* check flag consistency */ + /* Note that Final, Init, and Save are an illegal combination when a key + * is being used. Because of the logic flow of this routine, that is + * taken care of without being explict */ + if ( + /* nothing to work on */ + (((hmac_ctx->flags & FSL_HMAC_FLAGS_INIT) == 0) && + ((hmac_ctx->flags & FSL_HMAC_FLAGS_LOAD) == 0)) || + /* can't do both */ + ((hmac_ctx->flags & FSL_HMAC_FLAGS_INIT) && + (hmac_ctx->flags & FSL_HMAC_FLAGS_LOAD)) || + /* must be some output */ + (((hmac_ctx->flags & FSL_HMAC_FLAGS_SAVE) == 0) && + ((hmac_ctx->flags & FSL_HMAC_FLAGS_FINALIZE) == 0))) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* build descriptor #6 */ + + /* start building descriptor header */ + header = SAH_HDR_MDHA_SET_MODE_MD_KEY ^ + sah_insert_mdha_algorithm[hmac_ctx->algorithm] ^ + sah_insert_mdha_init; + + /* if this is to finalize the digest, mark to pad last block */ + if (hmac_ctx->flags & FSL_HMAC_FLAGS_FINALIZE) { + header ^= sah_insert_mdha_pdata; + } + + /* Check if this is a one shot */ + if ((hmac_ctx->flags & FSL_HMAC_FLAGS_INIT) && + (hmac_ctx->flags & FSL_HMAC_FLAGS_FINALIZE)) { + + header ^= sah_insert_mdha_hmac; + + /* See if this uses Precomputes */ + if (hmac_ctx->flags & FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT) { + DESC_IN_IN(header, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx->inner_precompute, + hmac_ctx->context_length, + (uint8_t *) hmac_ctx->outer_precompute); + } else { /* Precomputes not requested, try using Key */ + if (key_info->key != NULL) { + /* first, validate the key fields and related flag */ + if ((key_info->key_length == 0) + || (key_info->key_length > 64)) { + ret = FSL_RETURN_BAD_KEY_LENGTH_S; + goto out; + } else { + if (key_info->algorithm != + FSL_KEY_ALG_HMAC) { + ret = + FSL_RETURN_BAD_ALGORITHM_S; + goto out; + } + } + + /* finish building descriptor header (Key specific) */ + header ^= sah_insert_mdha_mac_full; + DESC_IN_KEY(header, 0, NULL, key_info); + } else { /* not using Key or Precomputes, so die */ + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + } + } else { /* it's not a one shot, must be multi-step */ + /* this the last chunk? */ + if (hmac_ctx->flags & FSL_HMAC_FLAGS_FINALIZE) { + header ^= sah_insert_mdha_hmac; + DESC_IN_IN(header, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx->ongoing_context, + hmac_ctx->context_length, + (uint8_t *) hmac_ctx->outer_precompute); + } else { /* not last chunk */ + uint8_t *ptr1; + + if (hmac_ctx->flags & FSL_HMAC_FLAGS_INIT) { + /* must be using precomputes, cannot 'chunk' message + * starting with a key */ + if (hmac_ctx-> + flags & FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT) + { + ptr1 = + (uint8_t *) hmac_ctx-> + inner_precompute; + } else { + ret = FSL_RETURN_NO_RESOURCE_S; + goto out; + } + } else { + ptr1 = (uint8_t *) hmac_ctx->ongoing_context; + } + + if (ret != FSL_RETURN_OK_S) { + goto out; + } + DESC_IN_IN(header, + hmac_ctx->context_register_length, ptr1, + 0, NULL); + } + } /* multi-step */ + + /* build descriptor #10 & maybe 11 */ + header = SAH_HDR_MDHA_HASH; + + if (hmac_ctx->flags & FSL_HMAC_FLAGS_FINALIZE) { + /* check that the results parameters seem reasonable */ + if ((result_len != 0) && (result != NULL)) { + if (result_len > hmac_ctx->context_register_length) { + result_len = hmac_ctx->context_register_length; + } + + /* message in / digest out (descriptor #10) */ + DESC_IN_OUT(header, length, msg, result_len, result); + + /* see if descriptor #11 needs to be built */ + if (hmac_ctx->flags & FSL_HMAC_FLAGS_SAVE) { + header = SAH_HDR_MDHA_STORE_DIGEST; + /* nothing in / context out */ + DESC_IN_IN(header, 0, NULL, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx-> + ongoing_context); + } + } else { + /* something wrong with result or its length */ + ret = FSL_RETURN_BAD_DATA_LENGTH_S; + } + } else { /* finalize not set, so store in ongoing context field */ + if ((length % 64) == 0) { /* this will change for 384/512 support */ + /* message in / context out */ + DESC_IN_OUT(header, length, msg, + hmac_ctx->context_register_length, + (uint8_t *) hmac_ctx->ongoing_context); + } else { + /* not final data, and not multiple of block length */ + ret = FSL_RETURN_BAD_DATA_LENGTH_S; + } + } + + SAH_SF_EXECUTE(); + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} /* fsl_shw_hmac() */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_wrap.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_wrap.c @@ -0,0 +1,967 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_shw_wrap.c + * + * This file implements Key-Wrap (Black Key) functions of the FSL SHW API for + * Sahara. + * + * - Ownerid is an 8-byte, user-supplied, value to keep KEY confidential. + * - KEY is a 1-32 byte value which starts in SCC RED RAM before + * wrapping, and ends up there on unwrap. Length is limited because of + * size of SCC1 RAM. + * - KEY' is the encrypted KEY + * - LEN is a 1-byte (for now) byte-length of KEY + * - ALG is a 1-byte value for the algorithm which which the key is + * associated. Values are defined by the FSL SHW API + * - Ownerid, LEN, and ALG come from the user's "key_info" object, as does the + * slot number where KEY already is/will be. + * - T is a Nonce + * - T' is the encrypted T + * - KEK is a Key-Encryption Key for the user's Key + * - ICV is the "Integrity Check Value" for the wrapped key + * - Black Key is the string of bytes returned as the wrapped key + + + + + + + + + + + + + + + + + + +
BLACK_KEY =ICV | T' | LEN | ALG | + KEY'
 
To Wrap
T = RND()16 +
KEK=HASHsha256(T | + Ownerid)16
KEY'= + AESctr-enc(Key=KEK, CTR=0, Data=KEY)
ICV=HMACsha256 + (Key=T, Data=Ownerid | LEN | ALG | KEY')16
T'=TDEScbc-enc + (Key=SLID, IV=Ownerid, Data=T)
 
To Unwrap
T=TDESecb-dec + (Key=SLID, IV=Ownerid, Data=T')
ICV=HMACsha256 + (Key=T, Data=Ownerid | LEN | ALG | KEY')16
KEK=HASHsha256 + (T | Ownerid)16
KEY=AESctr-dec + (Key=KEK, CTR=0, Data=KEY')
+ + */ + +#include "sahara.h" +#include "fsl_platform.h" +#include "fsl_shw_keystore.h" + +#include "sf_util.h" +#include "adaptor.h" + +#if defined(DIAG_SECURITY_FUNC) +#include +#endif + +#if defined(NEED_CTR_WORKAROUND) +/* CTR mode needs block-multiple data in/out */ +#define LENGTH_PATCH 16 +#define LENGTH_PATCH_MASK 0xF +#else +#define LENGTH_PATCH 4 +#define LENGTH_PATCH_MASK 3 +#endif + +#if LENGTH_PATCH +#define ROUND_LENGTH(len) \ +({ \ + uint32_t orig_len = len; \ + uint32_t new_len; \ + \ + if ((orig_len & LENGTH_PATCH_MASK) != 0) { \ + new_len = (orig_len + LENGTH_PATCH \ + - (orig_len & LENGTH_PATCH_MASK)); \ + } \ + else { \ + new_len = orig_len; \ + } \ + new_len; \ +}) +#else +#define ROUND_LENGTH(len) (len) +#endif + +#ifdef __KERNEL__ +EXPORT_SYMBOL(fsl_shw_establish_key); +EXPORT_SYMBOL(fsl_shw_extract_key); +EXPORT_SYMBOL(fsl_shw_release_key); +EXPORT_SYMBOL(fsl_shw_read_key); +#endif + +#define ICV_LENGTH 16 +#define T_LENGTH 16 +#define KEK_LENGTH 16 +#define LENGTH_LENGTH 1 +#define ALGORITHM_LENGTH 1 +#define FLAGS_LENGTH 1 + +/* ICV | T' | LEN | ALG | KEY' */ +#define ICV_OFFSET 0 +#define T_PRIME_OFFSET (ICV_OFFSET + ICV_LENGTH) +#define LENGTH_OFFSET (T_PRIME_OFFSET + T_LENGTH) +#define ALGORITHM_OFFSET (LENGTH_OFFSET + LENGTH_LENGTH) +#define FLAGS_OFFSET (ALGORITHM_OFFSET + ALGORITHM_LENGTH) +#define KEY_PRIME_OFFSET (FLAGS_OFFSET + FLAGS_LENGTH) +#define FLAGS_SW_KEY 0x01 + +/* + * For testing of the algorithm implementation,, the DO_REPEATABLE_WRAP flag + * causes the T_block to go into the T field during a wrap operation. This + * will make the black key value repeatable (for a given SCC secret key, or + * always if the default key is in use). + * + * Normally, a random sequence is used. + */ +#ifdef DO_REPEATABLE_WRAP +/*! + * Block of zeroes which is maximum Symmetric block size, used for + * initializing context register, etc. + */ +static uint8_t T_block_[16] = { + 0x42, 0, 0, 0x42, 0x42, 0, 0, 0x42, + 0x42, 0, 0, 0x42, 0x42, 0, 0, 0x42 +}; +#endif + +/*! + * Insert descriptors to calculate ICV = HMAC(key=T, data=LEN|ALG|KEY') + * + * @param user_ctx User's context for this operation + * @param desc_chain Descriptor chain to append to + * @param t_key_info T's key object + * @param black_key Beginning of Black Key region + * @param key_length Number of bytes of key' there are in @c black_key + * @param[out] hmac Location to store ICV. Will be tagged "USES" so + * sf routines will not try to free it. + * + * @return A return code of type #fsl_shw_return_t. + */ +static inline fsl_shw_return_t create_icv_calc(fsl_shw_uco_t * user_ctx, + sah_Head_Desc ** desc_chain, + fsl_shw_sko_t * t_key_info, + const uint8_t * black_key, + uint32_t key_length, + uint8_t * hmac) +{ + fsl_shw_return_t sah_code; + uint32_t header; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + + /* Load up T as key for the HMAC */ + header = (SAH_HDR_MDHA_SET_MODE_MD_KEY /* #6 */ + ^ sah_insert_mdha_algorithm_sha256 + ^ sah_insert_mdha_init ^ sah_insert_mdha_hmac ^ + sah_insert_mdha_pdata ^ sah_insert_mdha_mac_full); + sah_code = sah_add_in_key_desc(header, NULL, 0, t_key_info, /* Reference T in RED */ + user_ctx->mem_util, desc_chain); + if (sah_code != FSL_RETURN_OK_S) { + goto out; + } + + /* Previous step loaded key; Now set up to hash the data */ + header = SAH_HDR_MDHA_HASH; /* #10 */ + + /* Input - start with ownerid */ + sah_code = sah_Create_Link(user_ctx->mem_util, &link1, + (void *)&t_key_info->userid, + sizeof(t_key_info->userid), + SAH_USES_LINK_DATA); + if (sah_code != FSL_RETURN_OK_S) { + goto out; + } + + /* Still input - Append black-key fields len, alg, key' */ + sah_code = sah_Append_Link(user_ctx->mem_util, link1, + (void *)black_key + LENGTH_OFFSET, + (LENGTH_LENGTH + + ALGORITHM_LENGTH + + key_length), SAH_USES_LINK_DATA); + + if (sah_code != FSL_RETURN_OK_S) { + goto out; + } + /* Output - computed ICV/HMAC */ + sah_code = sah_Create_Link(user_ctx->mem_util, &link2, + hmac, ICV_LENGTH, + SAH_USES_LINK_DATA | SAH_OUTPUT_LINK); + if (sah_code != FSL_RETURN_OK_S) { + goto out; + } + + sah_code = sah_Append_Desc(user_ctx->mem_util, desc_chain, + header, link1, link2); + + out: + if (sah_code != FSL_RETURN_OK_S) { + (void)sah_Destroy_Link(user_ctx->mem_util, link1); + (void)sah_Destroy_Link(user_ctx->mem_util, link2); + } + + return sah_code; +} /* create_icv_calc */ + +/*! + * Perform unwrapping of a black key into a RED slot + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be unwrapped... key length, slot info, etc. + * @param black_key Encrypted key + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t unwrap(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + const uint8_t * black_key) +{ + SAH_SF_DCLS; + uint8_t *hmac = NULL; + fsl_shw_sko_t t_key_info; + sah_Link *link1 = NULL; + sah_Link *link2 = NULL; + unsigned i; + unsigned rounded_key_length; + unsigned original_key_length = key_info->key_length; + + hmac = DESC_TEMP_ALLOC(ICV_LENGTH); + + /* Set up key_info for "T" - use same slot as eventual key */ + fsl_shw_sko_init(&t_key_info, FSL_KEY_ALG_AES); + t_key_info.userid = key_info->userid; + t_key_info.handle = key_info->handle; + t_key_info.flags = key_info->flags; + t_key_info.key_length = T_LENGTH; + t_key_info.keystore = key_info->keystore; + + /* Validate SW flags to prevent misuse */ + if ((key_info->flags & FSL_SKO_KEY_SW_KEY) + && !(black_key[FLAGS_OFFSET] & FLAGS_SW_KEY)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + /* Compute T = SLID_decrypt(T'); leave in RED slot */ + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_decrypt(user_ctx, + key_info->userid, + t_key_info.handle, + T_LENGTH, + black_key + T_PRIME_OFFSET); + + } else { + /* Key goes in user keystore */ + ret = keystore_slot_decrypt(user_ctx, + key_info->keystore, + key_info->userid, + t_key_info.handle, + T_LENGTH, + black_key + T_PRIME_OFFSET); + } + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Compute ICV = HMAC(T, ownerid | len | alg | key' */ + ret = create_icv_calc(user_ctx, &desc_chain, &t_key_info, + black_key, original_key_length, hmac); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creation of sah_Key_Link failed due to bad key" + " flag!\n"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Validating MAC of wrapped key"); +#endif + SAH_SF_EXECUTE(); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + SAH_SF_DESC_CLEAN(); + + /* Check computed ICV against value in Black Key */ + for (i = 0; i < ICV_LENGTH; i++) { + if (black_key[ICV_OFFSET + i] != hmac[i]) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS("computed ICV fails at offset %i\n", i); + + { + char buff[300]; + int a; + for (a = 0; a < ICV_LENGTH; a++) + sprintf(&(buff[a * 2]), "%02x", + black_key[ICV_OFFSET + a]); + buff[a * 2 + 1] = 0; + LOG_DIAG_ARGS("black key: %s", buff); + + for (a = 0; a < ICV_LENGTH; a++) + sprintf(&(buff[a * 2]), "%02x", + hmac[a]); + buff[a * 2 + 1] = 0; + LOG_DIAG_ARGS("hmac: %s", buff); + } +#endif + ret = FSL_RETURN_AUTH_FAILED_S; + goto out; + } + } + + /* This is no longer needed. */ + DESC_TEMP_FREE(hmac); + + /* Compute KEK = SHA256(T | ownerid). Rewrite slot with value */ + header = (SAH_HDR_MDHA_SET_MODE_HASH /* #8 */ + ^ sah_insert_mdha_init + ^ sah_insert_mdha_algorithm_sha256 ^ sah_insert_mdha_pdata); + + /* Input - Start with T */ + ret = sah_Create_Key_Link(user_ctx->mem_util, &link1, &t_key_info); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Still input - append ownerid */ + ret = sah_Append_Link(user_ctx->mem_util, link1, + (void *)&key_info->userid, + sizeof(key_info->userid), SAH_USES_LINK_DATA); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Output - KEK goes into RED slot */ + ret = sah_Create_Key_Link(user_ctx->mem_util, &link2, &t_key_info); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Put the Hash calculation into the chain. */ + ret = sah_Append_Desc(user_ctx->mem_util, &desc_chain, + header, link1, link2); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Compute KEY = AES-decrypt(KEK, KEY') */ + header = (SAH_HDR_SKHA_SET_MODE_IV_KEY /* #1 */ + ^ sah_insert_skha_mode_ctr + ^ sah_insert_skha_algorithm_aes + ^ sah_insert_skha_modulus_128); + /* Load KEK in as the key to use */ + DESC_IN_KEY(header, 0, NULL, &t_key_info); + + rounded_key_length = ROUND_LENGTH(original_key_length); + key_info->key_length = rounded_key_length; + + /* Now set up for computation. Result in RED */ + header = SAH_HDR_SKHA_ENC_DEC; /* #4 */ + DESC_IN_KEY(header, rounded_key_length, black_key + KEY_PRIME_OFFSET, + key_info); + + /* Perform the operation */ +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Decrypting key with KEK"); +#endif + SAH_SF_EXECUTE(); + + out: + key_info->key_length = original_key_length; + SAH_SF_DESC_CLEAN(); + + DESC_TEMP_FREE(hmac); + + /* Erase tracks */ + t_key_info.userid = 0xdeadbeef; + t_key_info.handle = 0xdeadbeef; + + return ret; +} /* unwrap */ + +/*! + * Perform wrapping of a black key from a RED slot + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be wrapped... key length, slot info, etc. + * @param black_key Place to store encrypted key + * + * @return A return code of type #fsl_shw_return_t. + */ +static fsl_shw_return_t wrap(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, uint8_t * black_key) +{ + SAH_SF_DCLS; + unsigned slots_allocated = 0; /* boolean */ + fsl_shw_sko_t T_key_info; /* for holding T */ + fsl_shw_sko_t KEK_key_info; /* for holding KEK */ + unsigned original_key_length = key_info->key_length; + unsigned rounded_key_length; + sah_Link *link1; + sah_Link *link2; + + black_key[LENGTH_OFFSET] = key_info->key_length; + black_key[ALGORITHM_OFFSET] = key_info->algorithm; + + memcpy(&T_key_info, key_info, sizeof(T_key_info)); + fsl_shw_sko_set_key_length(&T_key_info, T_LENGTH); + T_key_info.algorithm = FSL_KEY_ALG_HMAC; + + memcpy(&KEK_key_info, &T_key_info, sizeof(KEK_key_info)); + KEK_key_info.algorithm = FSL_KEY_ALG_AES; + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_alloc(user_ctx, + T_LENGTH, key_info->userid, + &T_key_info.handle); + + } else { + /* Key goes in user keystore */ + ret = keystore_slot_alloc(key_info->keystore, + T_LENGTH, + key_info->userid, &T_key_info.handle); + } + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_alloc(user_ctx, + KEK_LENGTH, key_info->userid, + &KEK_key_info.handle); + + } else { + /* Key goes in user keystore */ + ret = keystore_slot_alloc(key_info->keystore, + KEK_LENGTH, key_info->userid, + &KEK_key_info.handle); + } + + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("do_scc_slot_alloc() failed"); +#endif + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + (void)do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, T_key_info.handle); + + } else { + /* Key goes in user keystore */ + (void)keystore_slot_dealloc(key_info->keystore, + key_info->userid, T_key_info.handle); + } + } else { + slots_allocated = 1; + } + + /* Set up to compute everything except T' ... */ +#ifndef DO_REPEATABLE_WRAP + /* Compute T = RND() */ + header = SAH_HDR_RNG_GENERATE; /* Desc. #18 */ + DESC_KEY_OUT(header, &T_key_info, 0, NULL); +#else + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_load(user_ctx, + T_key_info.userid, + T_key_info.handle, T_block, + T_key_info.key_length); + } else { + /* Key goes in user keystore */ + ret = keystore_slot_load(key_info->keystore, + T_key_info.userid, + T_key_info.handle, + T_block, T_key_info.key_length); + } + + if (ret != FSL_RETURN_OK_S) { + goto out; + } +#endif + + /* Compute KEK = SHA256(T | Ownerid) */ + header = (SAH_HDR_MDHA_SET_MODE_HASH /* #8 */ + ^ sah_insert_mdha_init + ^ sah_insert_mdha_algorithm[FSL_HASH_ALG_SHA256] + ^ sah_insert_mdha_pdata); + /* Input - Start with T */ + ret = sah_Create_Key_Link(user_ctx->mem_util, &link1, &T_key_info); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + /* Still input - append ownerid */ + ret = sah_Append_Link(user_ctx->mem_util, link1, + (void *)&key_info->userid, + sizeof(key_info->userid), SAH_USES_LINK_DATA); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + /* Output - KEK goes into RED slot */ + ret = sah_Create_Key_Link(user_ctx->mem_util, &link2, &KEK_key_info); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + /* Put the Hash calculation into the chain. */ + ret = sah_Append_Desc(user_ctx->mem_util, &desc_chain, + header, link1, link2); + if (ret != FSL_RETURN_OK_S) { + goto out; + } +#if defined(NEED_CTR_WORKAROUND) + rounded_key_length = ROUND_LENGTH(original_key_length); + key_info->key_length = rounded_key_length; +#else + rounded_key_length = original_key_length; +#endif + /* Compute KEY' = AES-encrypt(KEK, KEY) */ + header = (SAH_HDR_SKHA_SET_MODE_IV_KEY /* #1 */ + ^ sah_insert_skha_mode[FSL_SYM_MODE_CTR] + ^ sah_insert_skha_algorithm[FSL_KEY_ALG_AES] + ^ sah_insert_skha_modulus[FSL_CTR_MOD_128]); + /* Set up KEK as key to use */ + DESC_IN_KEY(header, 0, NULL, &KEK_key_info); + header = SAH_HDR_SKHA_ENC_DEC; + DESC_KEY_OUT(header, key_info, + key_info->key_length, black_key + KEY_PRIME_OFFSET); + + /* Set up flags info */ + black_key[FLAGS_OFFSET] = 0; + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + black_key[FLAGS_OFFSET] |= FLAGS_SW_KEY; + } + + /* Compute and store ICV into Black Key */ + ret = create_icv_calc(user_ctx, &desc_chain, &T_key_info, + black_key, original_key_length, + black_key + ICV_OFFSET); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creation of sah_Key_Link failed due to bad key" + " flag!\n"); +#endif /*DIAG_SECURITY_FUNC */ + goto out; + } + + /* Now get Sahara to do the work. */ +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Encrypting key with KEK"); +#endif + SAH_SF_EXECUTE(); + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("sah_Descriptor_Chain_Execute() failed"); +#endif + goto out; + } + + /* Compute T' = SLID_encrypt(T); Result goes to Black Key */ + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_encrypt(user_ctx, + T_key_info.userid, T_key_info.handle, + T_LENGTH, black_key + T_PRIME_OFFSET); + } else { + /* Key goes in user keystore */ + ret = keystore_slot_encrypt(user_ctx, + key_info->keystore, + T_key_info.userid, + T_key_info.handle, + T_LENGTH, + black_key + T_PRIME_OFFSET); + } + + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("do_scc_slot_encrypt() failed"); +#endif + goto out; + } + + out: + key_info->key_length = original_key_length; + + SAH_SF_DESC_CLEAN(); + if (slots_allocated) { + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + (void)do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, + T_key_info. + handle); + (void)do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, + KEK_key_info. + handle); + } else { + /* Key goes in user keystore */ + (void)keystore_slot_dealloc(key_info->keystore, + key_info->userid, + T_key_info.handle); + (void)keystore_slot_dealloc(key_info->keystore, + key_info->userid, + KEK_key_info.handle); + } + } + + return ret; +} /* wrap */ + +/*! + * Place a key into a protected location for use only by cryptographic + * algorithms. + * + * This only needs to be used to a) unwrap a key, or b) set up a key which + * could be wrapped with a later call to #fsl_shw_extract_key(). Normal + * cleartext keys can simply be placed into #fsl_shw_sko_t key objects with + * #fsl_shw_sko_set_key() and used directly. + * + * The maximum key size supported for wrapped/unwrapped keys is 32 octets. + * (This is the maximum reasonable key length on Sahara - 32 octets for an HMAC + * key based on SHA-256.) The key size is determined by the @a key_info. The + * expected length of @a key can be determined by + * #fsl_shw_sko_calculate_wrapped_size() + * + * The protected key will not be available for use until this operation + * successfully completes. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be established. In the create case, the key + * length must be set. + * @param establish_type How @a key will be interpreted to establish a + * key for use. + * @param key If @a establish_type is #FSL_KEY_WRAP_UNWRAP, + * this is the location of a wrapped key. If + * @a establish_type is #FSL_KEY_WRAP_CREATE, this + * parameter can be @a NULL. If @a establish_type + * is #FSL_KEY_WRAP_ACCEPT, this is the location + * of a plaintext key. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key) +{ + SAH_SF_DCLS; + unsigned original_key_length = key_info->key_length; + unsigned rounded_key_length; + unsigned slot_allocated = 0; + uint32_t old_flags; + + header = SAH_HDR_RNG_GENERATE; /* Desc. #18 for rand */ + + /* TODO: THIS STILL NEEDS TO BE REFACTORED */ + + /* Write operations into SCC memory require word-multiple number of + * bytes. For ACCEPT and CREATE functions, the key length may need + * to be rounded up. Calculate. */ + if (LENGTH_PATCH && (original_key_length & LENGTH_PATCH_MASK) != 0) { + rounded_key_length = original_key_length + LENGTH_PATCH + - (original_key_length & LENGTH_PATCH_MASK); + } else { + rounded_key_length = original_key_length; + } + + SAH_SF_USER_CHECK(); + + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { +#ifdef DIAG_SECURITY_FUNC + ret = FSL_RETURN_BAD_FLAG_S; + LOG_DIAG("Key already established\n"); +#endif + } + + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_alloc(user_ctx, + key_info->key_length, + key_info->userid, + &(key_info->handle)); +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG_ARGS + ("key length: %i, handle: %i, rounded key length: %i", + key_info->key_length, key_info->handle, + rounded_key_length); +#endif + + } else { + /* Key goes in user keystore */ + ret = keystore_slot_alloc(key_info->keystore, + key_info->key_length, + key_info->userid, + &(key_info->handle)); + } + if (ret != FSL_RETURN_OK_S) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Slot allocation failed\n"); +#endif + goto out; + } + slot_allocated = 1; + + key_info->flags |= FSL_SKO_KEY_ESTABLISHED; + switch (establish_type) { + case FSL_KEY_WRAP_CREATE: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Creating random key\n"); +#endif + /* Use safe version of key length */ + key_info->key_length = rounded_key_length; + /* Generate descriptor to put random value into */ + DESC_KEY_OUT(header, key_info, 0, NULL); + /* Restore actual, desired key length */ + key_info->key_length = original_key_length; + + old_flags = user_ctx->flags; + /* Now put random value into key */ + SAH_SF_EXECUTE(); + /* Restore user's old flag value */ + user_ctx->flags = old_flags; +#ifdef DIAG_SECURITY_FUNC + if (ret == FSL_RETURN_OK_S) { + LOG_DIAG("ret is ok"); + } else { + LOG_DIAG("ret is not ok"); + } +#endif + break; + + case FSL_KEY_WRAP_ACCEPT: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Accepting plaintext key\n"); +#endif + if (key == NULL) { +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("ACCEPT: Red Key is NULL"); +#endif + ret = FSL_RETURN_ERROR_S; + goto out; + } + /* Copy in safe number of bytes of Red key */ + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_load(user_ctx, + key_info->userid, + key_info->handle, key, + rounded_key_length); + } else { + /* Key goes in user keystore */ + ret = keystore_slot_load(key_info->keystore, + key_info->userid, + key_info->handle, key, + key_info->key_length); + } + break; + + case FSL_KEY_WRAP_UNWRAP: +#ifdef DIAG_SECURITY_FUNC + LOG_DIAG("Unwrapping wrapped key\n"); +#endif + /* For now, disallow non-blocking calls. */ + if (!(user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { + ret = FSL_RETURN_BAD_FLAG_S; + } else if (key == NULL) { + ret = FSL_RETURN_ERROR_S; + } else { + ret = unwrap(user_ctx, key_info, key); + } + break; + + default: + ret = FSL_RETURN_BAD_FLAG_S; + break; + } /* switch */ + + out: + if (slot_allocated && (ret != FSL_RETURN_OK_S)) { + fsl_shw_return_t scc_err; + + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + scc_err = do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, + key_info->handle); + } else { + /* Key goes in user keystore */ + scc_err = keystore_slot_dealloc(key_info->keystore, + key_info->userid, key_info->handle); + } + + key_info->flags &= ~FSL_SKO_KEY_ESTABLISHED; + } + + SAH_SF_DESC_CLEAN(); + + return ret; +} /* fsl_shw_establish_key() */ + +/*! + * Wrap a key and retrieve the wrapped value. + * + * A wrapped key is a key that has been cryptographically obscured. It is + * only able to be used with #fsl_shw_establish_key(). + * + * This function will also release the key (see #fsl_shw_release_key()) so + * that it must be re-established before reuse. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * @param[out] covered_key The location to store the 48-octet wrapped key. + * (This size is based upon the maximum key size + * of 32 octets). + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + /* For now, only blocking mode calls are supported */ + if (user_ctx->flags & FSL_UCO_BLOCKING_MODE) { + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + ret = wrap(user_ctx, key_info, covered_key); + if (ret != FSL_RETURN_OK_S) { + goto out; + } + + /* Verify that a SW key info really belongs to a SW key */ + if (key_info->flags & FSL_SKO_KEY_SW_KEY) { + /* ret = FSL_RETURN_BAD_FLAG_S; + goto out;*/ + } + + /* Need to deallocate on successful extraction */ + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + ret = do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, key_info->handle); + } else { + /* Key goes in user keystore */ + ret = keystore_slot_dealloc(key_info->keystore, + key_info->userid, key_info->handle); + } + /* Mark key not available in the flags */ + key_info->flags &= + ~(FSL_SKO_KEY_ESTABLISHED | FSL_SKO_KEY_PRESENT); + } + } + +out: + SAH_SF_DESC_CLEAN(); + + return ret; +} + +/*! + * De-establish a key so that it can no longer be accessed. + * + * The key will need to be re-established before it can again be used. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + if (key_info->flags & FSL_SKO_KEY_ESTABLISHED) { + if (key_info->keystore == NULL) { + /* Key goes in system keystore */ + do_system_keystore_slot_dealloc(user_ctx, + key_info->userid, + key_info->handle); + } else { + /* Key goes in user keystore */ + keystore_slot_dealloc(key_info->keystore, + key_info->userid, + key_info->handle); + } + key_info->flags &= ~(FSL_SKO_KEY_ESTABLISHED | + FSL_SKO_KEY_PRESENT); + } + +out: + SAH_SF_DESC_CLEAN(); + + return ret; +} + +fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, uint8_t * key) +{ + SAH_SF_DCLS; + + SAH_SF_USER_CHECK(); + + if (!(key_info->flags & FSL_SKO_KEY_ESTABLISHED) + || !(key_info->flags & FSL_SKO_KEY_SW_KEY)) { + ret = FSL_RETURN_BAD_FLAG_S; + goto out; + } + + if (key_info->keystore == NULL) { + /* Key lives in system keystore */ + ret = do_system_keystore_slot_read(user_ctx, + key_info->userid, + key_info->handle, + key_info->key_length, key); + } else { + /* Key lives in user keystore */ + ret = keystore_slot_read(key_info->keystore, + key_info->userid, + key_info->handle, + key_info->key_length, key); + } + + out: + SAH_SF_DESC_CLEAN(); + + return ret; +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/sah_interrupt_handler.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/sah_interrupt_handler.c @@ -0,0 +1,216 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sah_interrupt_handler.c +* +* @brief Provides a hardware interrupt handling mechanism for device driver. +* +* This file needs to be ported for a non-Linux OS. +* +* It gets a call at #sah_Intr_Init() during initialization. +* +* #sah_Intr_Top_Half() is intended to be the Interrupt Service Routine. It +* calls a portable function in another file to process the Sahara status. +* +* #sah_Intr_Bottom_Half() is a 'background' task scheduled by the top half to +* take care of the expensive tasks of the interrupt processing. +* +* The driver shutdown code calls #sah_Intr_Release(). +* +*/ + +#include + +/* SAHARA Includes */ +#include +#include +#include +#include +#include + +/*Enable this flag for debugging*/ +#if 0 +#define DIAG_DRV_INTERRUPT +#endif + +#ifdef DIAG_DRV_INTERRUPT +#include +#endif + +/*! + * Number of interrupts received. This value should only be updated during + * interrupt processing. + */ +uint32_t interrupt_count; + +#ifndef SAHARA_POLL_MODE + +#if !defined(LINUX_VERSION_CODE) || LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +#define irqreturn_t void +#define IRQ_HANDLED +#define IRQ_RETVAL(x) +#endif + +/* Internal Prototypes */ +static irqreturn_t sah_Intr_Top_Half(int irq, void *dev_id); + +#ifdef KERNEL_TEST +extern void (*SAHARA_INT_PTR) (int, void *); +#endif + +unsigned long reset_flag; +static void sah_Intr_Bottom_Half(unsigned long reset_flag); + +/* This is the Bottom Half Task, (reset flag set to false) */ +DECLARE_TASKLET(BH_task, sah_Intr_Bottom_Half, (unsigned long)&reset_flag); + +/*! This is set by the Initialisation function */ +wait_queue_head_t *int_queue = NULL; + +/*! +******************************************************************************* +* This function registers the Top Half of the interrupt handler with the Kernel +* and the SAHARA IRQ number. +* +* @brief SAHARA Interrupt Handler Initialisation +* +* @param wait_queue Pointer to the wait queue used by driver interface +* +* @return int A return of Zero indicates successful initialisation. +*/ +/****************************************************************************** +* +* CAUTION: NONE +* +* MODIFICATION HISTORY: +* +* Date Person Change +* 30/07/2003 MW Initial Creation +******************************************************************************/ +int sah_Intr_Init(wait_queue_head_t * wait_queue) +{ + +#ifdef DIAG_DRV_INTERRUPT + char err_string[200]; +#endif + + int result; + +#ifdef KERNEL_TEST + SAHARA_INT_PTR = sah_Intr_Top_Half; +#endif + + /* Set queue used by the interrupt handler to match the driver interface */ + int_queue = wait_queue; + + /* Request use of the Interrupt line. */ + result = request_irq(SAHARA_IRQ, + sah_Intr_Top_Half, 0, SAHARA_NAME, NULL); + +#ifdef DIAG_DRV_INTERRUPT + if (result != 0) { + sprintf(err_string, "Cannot use SAHARA interrupt line %d. " + "request_irq() return code is %i.", SAHARA_IRQ, result); + LOG_KDIAG(err_string); + } else { + sprintf(err_string, + "SAHARA driver registered for interrupt %d. ", + SAHARA_IRQ); + LOG_KDIAG(err_string); + } +#endif + + return result; +} + +/*! +******************************************************************************* +* This function releases the Top Half of the interrupt handler. The driver will +* not receive any more interrupts after calling this functions. +* +* @brief SAHARA Interrupt Handler Release +* +* @return void +*/ +/****************************************************************************** +* +* CAUTION: NONE +* +* MODIFICATION HISTORY: +* +* Date Person Change +* 30/07/2003 MW Initial Creation +******************************************************************************/ +void sah_Intr_Release(void) +{ + /* Release the Interrupt. */ + free_irq(SAHARA_IRQ, NULL); +} + +/*! +******************************************************************************* +* This function is the Top Half of the interrupt handler. It updates the +* status of any finished descriptor chains and then tries to add any pending +* requests into the hardware. It then queues the bottom half to complete +* operations on the finished chains. +* +* @brief SAHARA Interrupt Handler Top Half +* +* @param irq Part of the kernel prototype. +* @param dev_id Part of the kernel prototype. +* +* @return An IRQ_RETVAL() -- non-zero to that function means 'handled' +*/ +static irqreturn_t sah_Intr_Top_Half(int irq, void *dev_id) +{ +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) + LOG_KDIAG("Top half of Sahara's interrupt handler called."); +#endif + + interrupt_count++; + reset_flag = sah_Handle_Interrupt(sah_HW_Read_Status()); + + /* Schedule the Bottom Half of the Interrupt. */ + tasklet_schedule(&BH_task); + + /* To get rid of the unused parameter warnings. */ + irq = 0; + dev_id = NULL; + return IRQ_RETVAL(1); +} + +/*! +******************************************************************************* +* This function is the Bottom Half of the interrupt handler. It calls +* #sah_postprocess_queue() to complete the processing of the Descriptor Chains +* which were finished by the hardware. +* +* @brief SAHARA Interrupt Handler Bottom Half +* +* @param data Part of the kernel prototype. +* +* @return void +*/ +static void sah_Intr_Bottom_Half(unsigned long reset_flag) +{ +#if defined(DIAG_DRV_INTERRUPT) && defined(DIAG_DURING_INTERRUPT) + LOG_KDIAG("Bottom half of Sahara's interrupt handler called."); +#endif + sah_postprocess_queue(*(unsigned long *)reset_flag); + + return; +} + +/* end of sah_interrupt_handler.c */ +#endif /* ifndef SAHARA_POLL_MODE */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/fsl_shw_keystore.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/fsl_shw_keystore.c @@ -0,0 +1,837 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** + * @file fsl_shw_keystore.c + * + * File which implements a default keystore policy, for use as the system + * keystore. + */ +#include "fsl_platform.h" +#include "fsl_shw.h" +#include "fsl_shw_keystore.h" + +#if defined(DIAG_DRV_IF) +#include +#endif + +#if !defined(FSL_HAVE_SCC2) && defined(__KERNEL__) +#include +#endif + +/* Define a semaphore to protect the keystore data */ +#ifdef __KERNEL__ +#define LOCK_INCLUDES os_lock_context_t context +#define ACQUIRE_LOCK os_lock_save_context(keystore->lock, context) +#define RELEASE_LOCK os_unlock_restore_context(keystore->lock, context); +#else +#define LOCK_INCLUDES +#define ACQUIRE_LOCK +#define RELEASE_LOCK +#endif /* __KERNEL__ */ + +/*! + * Calculates the byte offset into a word + * @param bp The byte (char*) pointer + * @return The offset (0, 1, 2, or 3) + */ +#define SCC_BYTE_OFFSET(bp) ((uint32_t)(bp) % sizeof(uint32_t)) + +/*! + * Converts (by rounding down) a byte pointer into a word pointer + * @param bp The byte (char*) pointer + * @return The word (uint32_t) as though it were an aligned (uint32_t*) + */ +#define SCC_WORD_PTR(bp) (((uint32_t)(bp)) & ~(sizeof(uint32_t)-1)) + +/* Depending on the architecture, these functions should be defined + * differently. On Platforms with SCC2, the functions use the secure + * partition interface and should be available in both user and kernel space. + * On platforms with SCC, they use the SCC keystore interface. This is only + * available in kernel mode, so they should be stubbed out in user mode. + */ +#if defined(FSL_HAVE_SCC2) || (defined(FSL_HAVE_SCC) && defined(__KERNEL__)) +EXPORT_SYMBOL(fsl_shw_init_keystore); +void fsl_shw_init_keystore( + fsl_shw_kso_t *keystore, + fsl_shw_return_t(*data_init) (fsl_shw_uco_t *user_ctx, + void **user_data), + void (*data_cleanup) (fsl_shw_uco_t *user_ctx, + void **user_data), + fsl_shw_return_t(*slot_alloc) (void *user_data, + uint32_t size, + uint64_t owner_id, + uint32_t *slot), + fsl_shw_return_t(*slot_dealloc) (void *user_data, + uint64_t + owner_id, + uint32_t slot), + fsl_shw_return_t(*slot_verify_access) (void + *user_data, + uint64_t + owner_id, + uint32_t + slot), + void *(*slot_get_address) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_base) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_offset) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_slot_size) (void *user_data, + uint32_t handle)) +{ + keystore->data_init = data_init; + keystore->data_cleanup = data_cleanup; + keystore->slot_alloc = slot_alloc; + keystore->slot_dealloc = slot_dealloc; + keystore->slot_verify_access = slot_verify_access; + keystore->slot_get_address = slot_get_address; + keystore->slot_get_base = slot_get_base; + keystore->slot_get_offset = slot_get_offset; + keystore->slot_get_slot_size = slot_get_slot_size; +} + +EXPORT_SYMBOL(fsl_shw_init_keystore_default); +void fsl_shw_init_keystore_default(fsl_shw_kso_t *keystore) +{ + keystore->data_init = shw_kso_init_data; + keystore->data_cleanup = shw_kso_cleanup_data; + keystore->slot_alloc = shw_slot_alloc; + keystore->slot_dealloc = shw_slot_dealloc; + keystore->slot_verify_access = shw_slot_verify_access; + keystore->slot_get_address = shw_slot_get_address; + keystore->slot_get_base = shw_slot_get_base; + keystore->slot_get_offset = shw_slot_get_offset; + keystore->slot_get_slot_size = shw_slot_get_slot_size; +} + +/*! + * Do any keystore specific initializations + */ +EXPORT_SYMBOL(fsl_shw_establish_keystore); +fsl_shw_return_t fsl_shw_establish_keystore(fsl_shw_uco_t *user_ctx, + fsl_shw_kso_t *keystore) +{ + if (keystore->data_init == NULL) { + return FSL_RETURN_ERROR_S; + } + + /* Call the data_init function for any user setup */ + return keystore->data_init(user_ctx, &(keystore->user_data)); +} + +EXPORT_SYMBOL(fsl_shw_release_keystore); +void fsl_shw_release_keystore(fsl_shw_uco_t *user_ctx, + fsl_shw_kso_t *keystore) +{ + + /* Call the data_cleanup function for any keystore cleanup. + * NOTE: The keystore doesn't have any way of telling which keys are using + * it, so it is up to the user program to manage their key objects + * correctly. + */ + if ((keystore != NULL) && (keystore->data_cleanup != NULL)) { + keystore->data_cleanup(user_ctx, &(keystore->user_data)); + } + return; +} + +fsl_shw_return_t keystore_slot_alloc(fsl_shw_kso_t *keystore, uint32_t size, + uint64_t owner_id, uint32_t *slot) +{ + LOCK_INCLUDES; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + +#ifdef DIAG_DRV_IF + LOG_DIAG("In keystore_slot_alloc."); + +#endif + ACQUIRE_LOCK; + if ((keystore->slot_alloc == NULL) || (keystore->user_data == NULL)) { + goto out; + } + +#ifdef DIAG_DRV_IF + LOG_DIAG_ARGS("key length: %i, handle: %i\n", size, *slot); + +#endif +retval = keystore->slot_alloc(keystore->user_data, size, owner_id, slot); +out:RELEASE_LOCK; + return retval; +} + +fsl_shw_return_t keystore_slot_dealloc(fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot) +{ + LOCK_INCLUDES; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + ACQUIRE_LOCK; + if ((keystore->slot_alloc == NULL) || (keystore->user_data == NULL)) { + goto out; + } + retval = + keystore->slot_dealloc(keystore->user_data, owner_id, slot); +out:RELEASE_LOCK; + return retval; +} + +fsl_shw_return_t +keystore_slot_load(fsl_shw_kso_t * keystore, uint64_t owner_id, uint32_t slot, + const uint8_t * key_data, uint32_t key_length) +{ + +#ifdef FSL_HAVE_SCC2 + LOCK_INCLUDES; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + uint32_t slot_size; + uint32_t i; + uint8_t * slot_location; + ACQUIRE_LOCK; + if ((keystore->slot_verify_access == NULL) || + (keystore->user_data == NULL)) + goto out; + if (keystore-> + slot_verify_access(keystore->user_data, owner_id, + slot) !=FSL_RETURN_OK_S) { + retval = FSL_RETURN_AUTH_FAILED_S; + goto out; + } + slot_size = keystore->slot_get_slot_size(keystore->user_data, slot); + if (key_length > slot_size) { + retval = FSL_RETURN_BAD_DATA_LENGTH_S; + goto out; + } + slot_location = keystore->slot_get_address(keystore->user_data, slot); + for (i = 0; i < key_length; i++) { + slot_location[i] = key_data[i]; + } + retval = FSL_RETURN_OK_S; +out:RELEASE_LOCK; + return retval; + +#else /* FSL_HAVE_SCC2 */ + fsl_shw_return_t retval; + scc_return_t scc_ret; + scc_ret = + scc_load_slot(owner_id, slot, (uint8_t *) key_data, key_length); + switch (scc_ret) { + case SCC_RET_OK: + retval = FSL_RETURN_OK_S; + break; + case SCC_RET_VERIFICATION_FAILED: + retval = FSL_RETURN_AUTH_FAILED_S; + break; + case SCC_RET_INSUFFICIENT_SPACE: + retval = FSL_RETURN_BAD_DATA_LENGTH_S; + break; + default: + retval = FSL_RETURN_ERROR_S; + } + return retval; + +#endif /* FSL_HAVE_SCC2 */ +} + +fsl_shw_return_t +keystore_slot_read(fsl_shw_kso_t * keystore, uint64_t owner_id, uint32_t slot, + uint32_t key_length, uint8_t * key_data) +{ +#ifdef FSL_HAVE_SCC2 + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + uint8_t *slot_addr; + uint32_t slot_size; + + slot_addr = keystore->slot_get_address(keystore->user_data, slot); + slot_size = keystore->slot_get_slot_size(keystore->user_data, slot); + + if (key_length > slot_size) { + retval = FSL_RETURN_BAD_KEY_LENGTH_S; + goto out; + } + + memcpy(key_data, slot_addr, key_length); + retval = FSL_RETURN_OK_S; + + out: + return retval; + +#else /* Have SCC2 */ + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + scc_return_t scc_ret; + printk("keystore SCC \n"); + + scc_ret = + scc_read_slot(owner_id, slot, key_length, (uint8_t *) key_data); + printk("keystore SCC Ret value: %d \n", scc_ret); + switch (scc_ret) { + case SCC_RET_OK: + retval = FSL_RETURN_OK_S; + break; + case SCC_RET_VERIFICATION_FAILED: + retval = FSL_RETURN_AUTH_FAILED_S; + break; + case SCC_RET_INSUFFICIENT_SPACE: + retval = FSL_RETURN_BAD_DATA_LENGTH_S; + break; + default: + retval = FSL_RETURN_ERROR_S; + } + + return retval; + +#endif /* FSL_HAVE_SCC2 */ +}/* end fn keystore_slot_read */ + +fsl_shw_return_t +keystore_slot_encrypt(fsl_shw_uco_t *user_ctx, fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot, uint32_t length, + uint8_t *destination) +{ + +#ifdef FSL_HAVE_SCC2 + LOCK_INCLUDES; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + uint32_t slot_length; + uint32_t IV[4]; + uint32_t * iv_ptr = (uint32_t *) & (owner_id); + + /* Build the IV */ + IV[0] = iv_ptr[0]; + IV[1] = iv_ptr[1]; + IV[2] = 0; + IV[3] = 0; + ACQUIRE_LOCK; + + /* Ensure that the data will fit in the key slot */ + slot_length = + keystore->slot_get_slot_size(keystore->user_data, slot); + if (length > slot_length) { + goto out; + } + + /* Call scc encrypt function to encrypt the data. */ + retval = do_scc_encrypt_region(user_ctx, + (void *)keystore-> + slot_get_base(keystore->user_data, + slot), + keystore->slot_get_offset(keystore-> + user_data, + slot), + length, destination, IV, + FSL_SHW_CYPHER_MODE_CBC); + goto out; +out:RELEASE_LOCK; + return retval; + +#else + scc_return_t retval; + retval = scc_encrypt_slot(owner_id, slot, length, destination); + if (retval == SCC_RET_OK) + return FSL_RETURN_OK_S; + return FSL_RETURN_ERROR_S; + +#endif /* FSL_HAVE_SCC2 */ +} + +fsl_shw_return_t +keystore_slot_decrypt(fsl_shw_uco_t *user_ctx, fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot, uint32_t length, + const uint8_t *source) +{ + +#ifdef FSL_HAVE_SCC2 + LOCK_INCLUDES; + fsl_shw_return_t retval = FSL_RETURN_ERROR_S; + uint32_t slot_length; + uint32_t IV[4]; + uint32_t *iv_ptr = (uint32_t *) & (owner_id); + + /* Build the IV */ + IV[0] = iv_ptr[0]; + IV[1] = iv_ptr[1]; + IV[2] = 0; + IV[3] = 0; + ACQUIRE_LOCK; + + /* Call scc decrypt function to decrypt the data. */ + + /* Ensure that the data will fit in the key slot */ + slot_length = + keystore->slot_get_slot_size(keystore->user_data, slot); + if (length > slot_length) + goto out; + + /* Call scc decrypt function to encrypt the data. */ + retval = do_scc_decrypt_region(user_ctx, + (void *)keystore-> + slot_get_base(keystore->user_data, + slot), + keystore->slot_get_offset(keystore-> + user_data, + slot), + length, source, IV, + FSL_SHW_CYPHER_MODE_CBC); + goto out; +out:RELEASE_LOCK; + return retval; + +#else + scc_return_t retval; + retval = scc_decrypt_slot(owner_id, slot, length, source); + if (retval == SCC_RET_OK) + return FSL_RETURN_OK_S; + return FSL_RETURN_ERROR_S; + +#endif /* FSL_HAVE_SCC2 */ +} + +#else /* SCC in userspace */ +void fsl_shw_init_keystore( + fsl_shw_kso_t *keystore, + fsl_shw_return_t(*data_init) (fsl_shw_uco_t *user_ctx, + void **user_data), + void (*data_cleanup) (fsl_shw_uco_t *user_ctx, + void **user_data), + fsl_shw_return_t(*slot_alloc) (void *user_data, + uint32_t size, + uint64_t owner_id, + uint32_t *slot), + fsl_shw_return_t(*slot_dealloc) (void *user_data, + uint64_t + owner_id, + uint32_t slot), + fsl_shw_return_t(*slot_verify_access) (void + *user_data, + uint64_t + owner_id, + uint32_t + slot), + void *(*slot_get_address) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_base) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_offset) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_slot_size) (void *user_data, + uint32_t handle)) +{ + (void)keystore; + (void)data_init; + (void)data_cleanup; + (void)slot_alloc; + (void)slot_dealloc; + (void)slot_verify_access; + (void)slot_get_address; + (void)slot_get_base; + (void)slot_get_offset; + (void)slot_get_slot_size; +} + +void fsl_shw_init_keystore_default(fsl_shw_kso_t * keystore) +{ + (void)keystore; +} +fsl_shw_return_t fsl_shw_establish_keystore(fsl_shw_uco_t *user_ctx, + fsl_shw_kso_t *keystore) +{ + (void)user_ctx; + (void)keystore; + return FSL_RETURN_NO_RESOURCE_S; +} +void fsl_shw_release_keystore(fsl_shw_uco_t *user_ctx, + fsl_shw_kso_t *keystore) +{ + (void)user_ctx; + (void)keystore; + return; +} + +fsl_shw_return_t keystore_slot_alloc(fsl_shw_kso_t *keystore, uint32_t size, + uint64_t owner_id, uint32_t *slot) +{ + (void)keystore; + (void)size; + (void)owner_id; + (void)slot; + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t keystore_slot_dealloc(fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot) +{ + (void)keystore; + (void)owner_id; + (void)slot; + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t +keystore_slot_load(fsl_shw_kso_t *keystore, uint64_t owner_id, uint32_t slot, + const uint8_t *key_data, uint32_t key_length) +{ + (void)keystore; + (void)owner_id; + (void)slot; + (void)key_data; + (void)key_length; + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t +keystore_slot_read(fsl_shw_kso_t * keystore, uint64_t owner_id, uint32_t slot, + uint32_t key_length, uint8_t * key_data) +{ + (void)keystore; + (void)owner_id; + (void)slot; + (void)key_length; + (void)key_data; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t +keystore_slot_decrypt(fsl_shw_uco_t *user_ctx, fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot, uint32_t length, + const uint8_t *source) +{ + (void)user_ctx; + (void)keystore; + (void)owner_id; + (void)slot; + (void)length; + (void)source; + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t +keystore_slot_encrypt(fsl_shw_uco_t *user_ctx, fsl_shw_kso_t *keystore, + uint64_t owner_id, uint32_t slot, uint32_t length, + uint8_t *destination) +{ + (void)user_ctx; + (void)keystore; + (void)owner_id; + (void)slot; + (void)length; + (void)destination; + return FSL_RETURN_NO_RESOURCE_S; +} + + +#endif /* FSL_HAVE_SCC2 */ + +/***** Default keystore implementation **************************************/ + +#ifdef FSL_HAVE_SCC2 + fsl_shw_return_t shw_kso_init_data(fsl_shw_uco_t *user_ctx, + void **user_data) +{ + int retval = FSL_RETURN_ERROR_S; + keystore_data_t *keystore_data = NULL; + fsl_shw_pco_t *capabilities = fsl_shw_get_capabilities(user_ctx); + uint32_t partition_size; + uint32_t slot_count; + uint32_t keystore_data_size; + uint8_t UMID[16] = { + 0x42, 0, 0, 0, 0x43, 0, 0, 0, 0x19, 0, 0, 0, 0x59, 0, 0, 0}; + uint32_t permissions = + FSL_PERM_TH_R | FSL_PERM_TH_W | FSL_PERM_HD_R | FSL_PERM_HD_W | + FSL_PERM_HD_X; + + /* Look up the size of a partition to see how big to make the keystore */ + partition_size = fsl_shw_pco_get_spo_size_bytes(capabilities); + + /* Calculate the required size of the keystore data structure, based on the + * number of keys that can fit in the partition. + */ + slot_count = partition_size / KEYSTORE_SLOT_SIZE; + keystore_data_size = + sizeof(keystore_data_t) + + slot_count * sizeof(keystore_data_slot_info_t); + +#ifdef __KERNEL__ + keystore_data = os_alloc_memory(keystore_data_size, GFP_KERNEL); + +#else + keystore_data = malloc(keystore_data_size); + +#endif + if (keystore_data == NULL) { + retval = FSL_RETURN_NO_RESOURCE_S; + goto out; + } + + /* Clear the memory (effectively clear all key assignments) */ + memset(keystore_data, 0, keystore_data_size); + + /* Place the slot information structure directly after the keystore data + * structure. + */ + keystore_data->slot = + (keystore_data_slot_info_t *) (keystore_data + 1); + keystore_data->slot_count = slot_count; + + /* Retrieve a secure partition to put the keystore in. */ + keystore_data->base_address = + fsl_shw_smalloc(user_ctx, partition_size, UMID, permissions); + if (keystore_data->base_address == NULL) { + retval = FSL_RETURN_NO_RESOURCE_S; + goto out; + } + *user_data = keystore_data; + retval = FSL_RETURN_OK_S; +out:if (retval != FSL_RETURN_OK_S) { + if (keystore_data != NULL) { + if (keystore_data->base_address != NULL) + fsl_shw_sfree(NULL, + keystore_data->base_address); + +#ifdef __KERNEL__ + os_free_memory(keystore_data); + +#else + free(keystore_data); + +#endif + } + } + return retval; +} +void shw_kso_cleanup_data(fsl_shw_uco_t *user_ctx, void **user_data) +{ + if (user_data != NULL) { + keystore_data_t * keystore_data = + (keystore_data_t *) (*user_data); + fsl_shw_sfree(user_ctx, keystore_data->base_address); + +#ifdef __KERNEL__ + os_free_memory(*user_data); + +#else + free(*user_data); + +#endif + } + return; +} + +fsl_shw_return_t shw_slot_verify_access(void *user_data, uint64_t owner_id, + uint32_t slot) +{ + keystore_data_t * data = user_data; + if (data->slot[slot].owner == owner_id) { + return FSL_RETURN_OK_S; + } else { + +#ifdef DIAG_DRV_IF + LOG_DIAG_ARGS("Access to slot %i fails.\n", slot); + +#endif + return FSL_RETURN_AUTH_FAILED_S; + } +} + +fsl_shw_return_t shw_slot_alloc(void *user_data, uint32_t size, + uint64_t owner_id, uint32_t *slot) +{ + keystore_data_t *data = user_data; + uint32_t i; + if (size > KEYSTORE_SLOT_SIZE) + return FSL_RETURN_BAD_KEY_LENGTH_S; + for (i = 0; i < data->slot_count; i++) { + if (data->slot[i].allocated == 0) { + data->slot[i].allocated = 1; + data->slot[i].owner = owner_id; + (*slot) = i; + +#ifdef DIAG_DRV_IF + LOG_DIAG_ARGS("Keystore: allocated slot %i. Slot " + "address: %p\n", + (*slot), + data->base_address + + (*slot) * KEYSTORE_SLOT_SIZE); + +#endif + return FSL_RETURN_OK_S; + } + } + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t shw_slot_dealloc(void *user_data, uint64_t owner_id, + uint32_t slot) +{ + keystore_data_t * data = user_data; + (void)owner_id; + (void)slot; + if (slot >= data->slot_count) + return FSL_RETURN_ERROR_S; + if (data->slot[slot].allocated == 1) { + /* Forcibly remove the data from the keystore */ + memset(shw_slot_get_address(user_data, slot), 0, + KEYSTORE_SLOT_SIZE); + data->slot[slot].allocated = 0; + return FSL_RETURN_OK_S; + } + return FSL_RETURN_ERROR_S; +} + +void *shw_slot_get_address(void *user_data, uint32_t slot) +{ + keystore_data_t * data = user_data; + if (slot >= data->slot_count) + return NULL; + return data->base_address + slot * KEYSTORE_SLOT_SIZE; +} + +uint32_t shw_slot_get_base(void *user_data, uint32_t slot) +{ + keystore_data_t * data = user_data; + + /* There could potentially be more than one secure partition object + * associated with this keystore. For now, there is just one. + */ + (void)slot; + return (uint32_t) (data->base_address); +} + +uint32_t shw_slot_get_offset(void *user_data, uint32_t slot) +{ + keystore_data_t *data = user_data; + if (slot >= data->slot_count) + return FSL_RETURN_ERROR_S; + return (slot * KEYSTORE_SLOT_SIZE); +} + +uint32_t shw_slot_get_slot_size(void *user_data, uint32_t slot) +{ + (void)user_data; + (void)slot; + + /* All slots are the same size in the default implementation */ + return KEYSTORE_SLOT_SIZE; +} + +#else /* FSL_HAVE_SCC2 */ + +#ifdef __KERNEL__ + fsl_shw_return_t shw_kso_init_data(fsl_shw_uco_t *user_ctx, + void **user_data) +{ + + /* The SCC does its own initialization. All that needs to be done here is + * make sure an SCC exists. + */ + *user_data = (void *)0xFEEDFEED; + return FSL_RETURN_OK_S; +} +void shw_kso_cleanup_data(fsl_shw_uco_t *user_ctx, void **user_data) +{ + + /* The SCC does its own cleanup. */ + *user_data = NULL; + return; +} + +fsl_shw_return_t shw_slot_verify_access(void *user_data, uint64_t owner_id, + uint32_t slot) +{ + + /* Zero is used for the size because the newer interface does bounds + * checking later. + */ + scc_return_t retval; + retval = scc_verify_slot_access(owner_id, slot, 0); + if (retval == SCC_RET_OK) { + return FSL_RETURN_OK_S; + } + return FSL_RETURN_AUTH_FAILED_S; +} + +fsl_shw_return_t shw_slot_alloc(void *user_data, uint32_t size, + uint64_t owner_id, uint32_t *slot) +{ + scc_return_t retval; + +#ifdef DIAG_DRV_IF + LOG_DIAG_ARGS("key length: %i, handle: %i\n", size, *slot); + +#endif + retval = scc_alloc_slot(size, owner_id, slot); + if (retval == SCC_RET_OK) + return FSL_RETURN_OK_S; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t shw_slot_dealloc(void *user_data, uint64_t owner_id, + uint32_t slot) +{ + scc_return_t retval; + retval = scc_dealloc_slot(owner_id, slot); + if (retval == SCC_RET_OK) + return FSL_RETURN_OK_S; + + return FSL_RETURN_ERROR_S; +} +void *shw_slot_get_address(void *user_data, uint32_t slot) +{ + uint64_t owner_id = *((uint64_t *) user_data); + uint32_t address; + uint32_t value_size_bytes; + uint32_t slot_size_bytes; + scc_return_t scc_ret; + scc_ret = + scc_get_slot_info(owner_id, slot, &address, &value_size_bytes, + &slot_size_bytes); + if (scc_ret == SCC_RET_OK) { + return (void *)address; + } + return NULL; +} + +uint32_t shw_slot_get_base(void *user_data, uint32_t slot) +{ + return 0; +} + +uint32_t shw_slot_get_offset(void *user_data, uint32_t slot) +{ + return 0; +} + + +/* Return the size of the key slot, in octets */ +uint32_t shw_slot_get_slot_size(void *user_data, uint32_t slot) +{ + uint64_t owner_id = *((uint64_t *) user_data); + uint32_t address; + uint32_t value_size_bytes; + uint32_t slot_size_bytes; + scc_return_t scc_ret; + scc_ret = + scc_get_slot_info(owner_id, slot, &address, &value_size_bytes, + &slot_size_bytes); + if (scc_ret == SCC_RET_OK) + return slot_size_bytes; + return 0; +} + + +#endif /* __KERNEL__ */ + +#endif /* FSL_HAVE_SCC2 */ + +/*****************************************************************************/ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/adaptor.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/adaptor.h @@ -0,0 +1,113 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file adaptor.h +* +* @brief The Adaptor component provides an interface to the device +* driver. +* +* Intended to be used by the FSL SHW API, this can also be called directly +*/ + +#ifndef ADAPTOR_H +#define ADAPTOR_H + +#include + +/*! + * Structure passed during user ioctl() call to submit request. + */ +typedef struct sah_dar { + sah_Desc *desc_addr; /*!< head of descriptor chain */ + uint32_t uco_flags; /*!< copy of fsl_shw_uco flags field */ + uint32_t uco_user_ref; /*!< copy of fsl_shw_uco user_ref */ + uint32_t result; /*!< result of descriptor chain request */ + struct sah_dar *next; /*!< for driver use */ +} sah_dar_t; + +/*! + * Structure passed during user ioctl() call to Register a user + */ +typedef struct sah_register { + uint32_t pool_size; /*!< max number of outstanding requests possible */ + uint32_t result; /*!< result of registration request */ +} sah_register_t; + +/*! + * Structure passed during ioctl() call to request SCC operation + */ +typedef struct scc_data { + uint32_t length; /*!< length of data */ + uint8_t *in; /*!< input data */ + uint8_t *out; /*!< output data */ + unsigned direction; /*!< encrypt or decrypt */ + fsl_shw_sym_mode_t crypto_mode; /*!< CBC or EBC */ + uint8_t *init_vector; /*!< initialization vector or NULL */ +} scc_data_t; + +/*! + * Structure passed during user ioctl() calls to manage stored keys and + * stored-key slots. + */ +typedef struct scc_slot_t { + uint64_t ownerid; /*!< Owner's id to check/set permissions */ + uint32_t key_length; /*!< Length of key */ + uint32_t slot; /*!< Slot to operation on, or returned slot + number. */ + uint8_t *key; /*!< User-memory pointer to key value */ + fsl_shw_return_t code; /*!< API return code from operation */ +} scc_slot_t; + +/* + * Structure passed during user ioctl() calls to manage data stored in secure + * partitions. + */ +typedef struct scc_region_t { + uint32_t partition_base; /*!< User virtual address of the + partition base. */ + uint32_t offset; /*!< Offset from the start of the + partition where the cleartext data + is located. */ + uint32_t length; /*!< Length of the region to be + operated on */ + uint8_t *black_data; /*!< User virtual address of any black + (encrypted) data. */ + fsl_shw_cypher_mode_t cypher_mode; /*!< Cypher mode to use in an encryt/ + decrypt operation. */ + uint32_t IV[4]; /*!< Intialization vector to use in an + encrypt/decrypt operation. */ + fsl_shw_return_t code; /*!< API return code from operation */ +} scc_region_t; + +/* + * Structure passed during user ioctl() calls to manage secure partitions. + */ +typedef struct scc_partition_info_t { + uint32_t user_base; /**< Userspace pointer to base of partition */ + uint32_t permissions; /**< Permissions to give the partition (only + used in call to _DROP_PERMS) */ + fsl_shw_partition_status_t status; /*!< Status of the partition */ +} scc_partition_info_t; + +fsl_shw_return_t adaptor_Exec_Descriptor_Chain(sah_Head_Desc * dar, + fsl_shw_uco_t * uco); +fsl_shw_return_t sah_get_results(sah_results * arg, fsl_shw_uco_t * uco); +fsl_shw_return_t sah_register(fsl_shw_uco_t * user_ctx); +fsl_shw_return_t sah_deregister(fsl_shw_uco_t * user_ctx); +fsl_shw_return_t get_capabilities(fsl_shw_uco_t * user_ctx, + fsl_shw_pco_t *capabilities); + +#endif /* ADAPTOR_H */ + +/* End of adaptor.h */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_interrupt_handler.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_interrupt_handler.h @@ -0,0 +1,42 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_interrupt_handler.h +* +* @brief Provides a hardware interrupt handling mechanism for device driver. +* +*/ +/****************************************************************************** +* +* CAUTION: +* +* MODIFICATION HISTORY: +* +* Date Person Change +* 30/07/03 MW Initial Creation +******************************************************************* +*/ + +#ifndef SAH_INTERRUPT_HANDLER_H +#define SAH_INTERRUPT_HANDLER_H + +#include + +/****************************************************************************** +* External function declarations +******************************************************************************/ +int sah_Intr_Init (wait_queue_head_t *wait_queue); +void sah_Intr_Release (void); + +#endif /* SAH_INTERRUPT_HANDLER_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_driver_common.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_driver_common.h @@ -0,0 +1,102 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_driver_common.h +* +* @brief Provides types and defined values for use in the Driver Interface. +* +*/ + +#ifndef SAH_DRIVER_COMMON_H +#define SAH_DRIVER_COMMON_H + +#include "fsl_platform.h" +#include +#include + +/** This specifies the permissions for the device file. It is equivalent to + * chmod 666. + */ +#define SAHARA_DEVICE_MODE S_IFCHR | S_IRUGO | S_IWUGO + +/** +* The status of entries in the Queue. +* +******************************************************************************/ +typedef enum +{ + /** This state indicates that the entry is in the queue and awaits + * execution on SAHARA. */ + SAH_STATE_PENDING, + /** This state indicates that the entry has been written to the SAHARA + * DAR. */ + SAH_STATE_ON_SAHARA, + /** This state indicates that the entry is off of SAHARA, and is awaiting + post-processing. */ + SAH_STATE_OFF_SAHARA, + /** This state indicates that the entry is successfully executed on SAHARA, + and it is finished with post-processing. */ + SAH_STATE_COMPLETE, + /** This state indicates that the entry caused an error or fault on SAHARA, + * and it is finished with post-processing. */ + SAH_STATE_FAILED, + /** This state indicates that the entry was reset via the Reset IO + * Control, and it is finished with post-processing. */ + SAH_STATE_RESET, + /** This state indicates that the entry was signalled from user-space and + * either in the DAR, IDAR or has finished executing pending Bottom Half + * processing. */ + SAH_STATE_IGNORE, + /** This state indicates that the entry was signalled from user-space and + * has been processed by the bottom half. */ + SAH_STATE_IGNORED +} sah_Queue_Status; + +/* any of these conditions being true indicates the descriptor's processing + * is complete */ +#define SAH_DESC_PROCESSED(status) \ + (((status) == SAH_STATE_COMPLETE) || \ + ((status) == SAH_STATE_FAILED ) || \ + ((status) == SAH_STATE_RESET )) + +extern os_lock_t desc_queue_lock; + +extern uint32_t dar_count; +extern uint32_t interrupt_count; +extern uint32_t done1done2_count; +extern uint32_t done1busy2_count; +extern uint32_t done1_count; + +#ifdef FSL_HAVE_SCC2 +extern void *lookup_user_partition(fsl_shw_uco_t * user_ctx, + uint32_t user_base); +#endif + +int sah_get_results_pointers(fsl_shw_uco_t* user_ctx, uint32_t arg); +fsl_shw_return_t sah_get_results_from_pool(volatile fsl_shw_uco_t* user_ctx, + sah_results *arg); +fsl_shw_return_t sah_handle_registration(fsl_shw_uco_t *user_cts); +fsl_shw_return_t sah_handle_deregistration(fsl_shw_uco_t *user_cts); + +int sah_Queue_Manager_Count_Entries(int ignore_state, sah_Queue_Status state); +unsigned long sah_Handle_Poll(sah_Head_Desc *entry); + +#ifdef DIAG_DRV_IF +/****************************************************************************** +* Descriptor and Link dumping functions. +******************************************************************************/ +void sah_Dump_Chain(const sah_Desc *chain, dma_addr_t addr); +#endif /* DIAG_DRV_IF */ + +#endif /* SAH_DRIVER_COMMON_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/fsl_shw_keystore.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/fsl_shw_keystore.h @@ -0,0 +1,475 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +#ifndef FSL_SHW_KEYSTORE_H +#define FSL_SHW_KEYSTORE_H + +/*! + * @file fsl_shw_keystore.h + * + * @brief Definition of the User Keystore API. + * + */ + +/*! \page user_keystore User Keystore API + * + * Definition of the User Keystore API. + * + * On platforms with multiple partitions of Secure Memory, the Keystore Object + * (#fsl_shw_kso_t) is provided to allow users to manage a private keystore for + * use in software cryptographic routines. The user can define a custom set of + * methods for managing their keystore, or use a default keystore handler. The + * keystore is established by #fsl_shw_establish_keystore(), and released by + * #fsl_shw_release_keystore(). The intent of this design is to make the + * keystore implementation as flexible as possible. + * + * See @ref keystore_api for the generic keystore API, and @ref + * default_keystore for the default keystore implementation. + * + */ + +/*! + * @defgroup keystore_api User Keystore API + * + * Keystore API + * + * These functions define the generic keystore API, which can be used in + * conjunction with a keystore implementation backend to support a user + * keystore. + */ + +/*! + * @defgroup default_keystore Default Keystore Implementation + * + * Default Keystore Implementation + * + * These functions define the default keystore implementation, which is used + * for the system keystore and for user keystores initialized by + * #fsl_shw_init_keystore_default(). They can be used as-is or as a reference + * for creating a custom keystore handler. It uses an entire Secure Memory + * partition, divided in to equal slots of length #KEYSTORE_SLOT_SIZE. These + * functions are not intended to be used directly- all user interaction with + * the keystore should be through the @ref keystore_api and the Wrapped Key + * interface. + * + * The current implementation is designed to work with both SCC and SCC2. + * Differences between the two versions are noted below. + */ + +/*! @addtogroup keystore_api + @{ */ + +#ifndef KEYSTORE_SLOT_SIZE +/*! Size of each key slot, in octets. This sets an upper bound on the size + * of a key that can placed in the keystore. + */ +#define KEYSTORE_SLOT_SIZE 32 +#endif + +/*! + * Initialize a Keystore Object. + * + * This function must be called before performing any other operation with the + * Object. It allows the user to associate a custom keystore interface by + * specifying the correct set of functions that will be used to perform actions + * on the keystore object. To use the default keystore handler, the function + * #fsl_shw_init_keystore_default() can be used instead. + * + * @param keystore The Keystore object to operate on. + * @param data_init Keystore initialization function. This function is + * responsible for initializing the keystore. A + * user-defined object can be assigned to the user_data + * pointer, and will be passed to any function acting on + * that keystore. It is called during + * #fsl_shw_establish_keystore(). + * @param data_cleanup Keystore cleanup function. This function cleans up + * any data structures associated with the keyboard. It + * is called by #fsl_shw_release_keystore(). + * @param slot_alloc Slot allocation function. This function allocates a + * key slot, potentially based on size and owner id. It + * is called by #fsl_shw_establish_key(). + * @param slot_dealloc Slot deallocation function. + * @param slot_verify_access Function to verify that a given Owner ID + * credential matches the given slot. + * @param slot_get_address For SCC2: Get the virtual address (kernel or + * userspace) of the data stored in the slot. + * For SCC: Get the physical address of the data + * stored in the slot. + * @param slot_get_base For SCC2: Get the (virtual) base address of the + * partition that the slot is located on. + * For SCC: Not implemented. + * @param slot_get_offset For SCC2: Get the offset from the start of the + * partition that the slot data is located at (in + * octets) + * For SCC: Not implemented. + * @param slot_get_slot_size Get the size of the key slot, in octets. + */ +extern void fsl_shw_init_keystore(fsl_shw_kso_t * keystore, + fsl_shw_return_t(*data_init) (fsl_shw_uco_t * + user_ctx, + void + **user_data), + void (*data_cleanup) (fsl_shw_uco_t * + user_ctx, + void **user_data), + fsl_shw_return_t(*slot_alloc) (void + *user_data, + uint32_t size, + uint64_t + owner_id, + uint32_t * + slot), + fsl_shw_return_t(*slot_dealloc) (void + *user_data, + uint64_t + owner_id, + uint32_t + slot), + fsl_shw_return_t(*slot_verify_access) (void + *user_data, + uint64_t + owner_id, + uint32_t + slot), + void *(*slot_get_address) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_base) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_offset) (void *user_data, + uint32_t handle), + uint32_t(*slot_get_slot_size) (void + *user_data, + uint32_t + handle)); + +/*! + * Initialize a Keystore Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the user keystore object up to use the default keystore + * handler. If a custom keystore handler is desired, the function + * #fsl_shw_init_keystore() can be used instead. + * + * @param keystore The Keystore object to operate on. + */ +extern void fsl_shw_init_keystore_default(fsl_shw_kso_t * keystore); + +/*! + * Establish a Keystore Object. + * + * This function establishes a keystore object that has been set up by a call + * to #fsl_shw_init_keystore(). It is a wrapper for the user-defined + * data_init() function, which is specified during keystore initialization. + * + * @param user_ctx The user context that this keystore should be attached + * to + * @param keystore The Keystore object to operate on. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_establish_keystore(fsl_shw_uco_t * user_ctx, + fsl_shw_kso_t * keystore); + +/*! + * Release a Keystore Object. + * + * This function releases an established keystore object. It is a wrapper for + * the user-defined data_cleanup() function, which is specified during keystore + * initialization. + * + * @param user_ctx The user context that this keystore should be attached + * to. + * @param keystore The Keystore object to operate on. + */ +extern void fsl_shw_release_keystore(fsl_shw_uco_t * user_ctx, + fsl_shw_kso_t * keystore); + +/*! + * Allocate a slot in the Keystore. + * + * This function attempts to allocate a slot to hold a key in the keystore. It + * is called by #fsl_shw_establish_key() when establishing a Secure Key Object, + * if the key has been flagged to be stored in a user keystore by the + * #fsl_shw_sko_set_keystore() function. It is a wrapper for the + * implementation-specific function slot_alloc(). + * + * @param keystore The Keystore object to operate on. + * @param[in] size Size of the key to be stored (octets). + * @param[in] owner_id ID of the key owner. + * @param[out] slot If successful, assigned slot ID + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t keystore_slot_alloc(fsl_shw_kso_t * keystore, + uint32_t size, + uint64_t owner_id, uint32_t * slot); + +/*! + * Deallocate a slot in the Keystore. + * + * This function attempts to allocate a slot to hold a key in the keystore. + * It is called by #fsl_shw_extract_key() and #fsl_shw_release_key() when the + * key that it contains is to be released. It is a wrapper for the + * implmentation-specific function slot_dealloc(). + + * @param keystore The Keystore object to operate on. + * @param[in] owner_id ID of the key owner. + * @param[in] slot If successful, assigned slot ID. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t keystore_slot_dealloc(fsl_shw_kso_t * keystore, + uint64_t owner_id, uint32_t slot); + +/*! + * Load cleartext key data into a key slot + * + * This function loads a key slot with cleartext data. + * + * @param keystore The Keystore object to operate on. + * @param[in] owner_id ID of the key owner. + * @param[in] slot If successful, assigned slot ID. + * @param[in] key_data Pointer to the location of the cleartext key data. + * @param[in] key_length Length of the key data (octets). + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +keystore_slot_load(fsl_shw_kso_t * keystore, uint64_t owner_id, uint32_t slot, + const uint8_t * key_data, uint32_t key_length); + +/*! + * Read cleartext key data from a key slot + * + * This function returns the key in a key slot. + * + * @param keystore The Keystore object to operate on. + * @param[in] owner_id ID of the key owner. + * @param[in] slot ID of slot where key resides. + * @param[in] key_length Length of the key data (octets). + * @param[out] key_data Pointer to the location of the cleartext key data. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +keystore_slot_read(fsl_shw_kso_t * keystore, uint64_t owner_id, uint32_t slot, + uint32_t key_length, uint8_t * key_data); + +/*! + * Encrypt a keyslot + * + * This function encrypts a key using the hardware secret key. + * + * @param user_ctx User context + * @param keystore The Keystore object to operate on. + * @param[in] owner_id ID of the key owner. + * @param[in] slot Slot ID of the key to encrypt. + * @param[in] length Length of the key + * @param[out] destination Pointer to the location where the encrypted data + * is to be stored. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +keystore_slot_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_kso_t * keystore, uint64_t owner_id, + uint32_t slot, uint32_t length, uint8_t * destination); + +/*! + * Decrypt a keyslot + * + * This function decrypts a key using the hardware secret key. + * + * @param user_ctx User context + * @param keystore The Keystore object to operate on. + * @param[in] owner_id ID of the key owner. + * @param[in] slot Slot ID of the key to encrypt. + * @param[in] length Length of the key + * @param[in] source Pointer to the location where the encrypted data + * is stored. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +keystore_slot_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_kso_t * keystore, uint64_t owner_id, + uint32_t slot, uint32_t length, const uint8_t * source); + +/* @} */ + +/*! @addtogroup default_keystore + @{ */ + +/*! + * Data structure to hold per-slot information + */ +typedef struct keystore_data_slot_info_t { + uint8_t allocated; /*!< Track slot assignments */ + uint64_t owner; /*!< Owner IDs */ + uint32_t key_length; /*!< Size of the key */ +} keystore_data_slot_info_t; + +/*! + * Data structure to hold keystore information. + */ +typedef struct keystore_data_t { + void *base_address; /*!< Base of the Secure Partition */ + uint32_t slot_count; /*!< Number of slots in the keystore */ + struct keystore_data_slot_info_t *slot; /*!< Per-slot information */ +} keystore_data_t; + +/*! + * Default keystore initialization routine. + * + * This function acquires a Secure Partition Object to store the keystore, + * divides it into slots of length #KEYSTORE_SLOT_SIZE, and builds a data + * structure to hold key information. + * + * @param user_ctx User context + * @param[out] user_data Pointer to the location where the keystore data + * structure is to be stored. + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t shw_kso_init_data(fsl_shw_uco_t * user_ctx, void **user_data); + +/*! + * Default keystore cleanup routine. + * + * This function releases the Secure Partition Object and the memory holding + * the keystore data structure, that obtained by the shw_kso_init_data + * function. + * + * @param user_ctx User context + * @param[in,out] user_data Pointer to the location where the keystore data + * structure is stored. + */ +void shw_kso_cleanup_data(fsl_shw_uco_t * user_ctx, void **user_data); + +/*! + * Default keystore slot access verification + * + * This function compares the supplied Owner ID to the registered owner of + * the key slot, to see if the supplied ID is correct. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] owner_id Owner ID supplied as a credential. + * @param[in] slot Requested slot + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t shw_slot_verify_access(void *user_data, uint64_t owner_id, + uint32_t slot); + +/*! + * Default keystore slot allocation + * + * This function first checks that the requested size is equal to or less than + * the maximum keystore slot size. If so, it searches the keystore for a free + * key slot, and if found, marks it as used and returns a slot reference to the + * user. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] size Size of the key data that will be stored in this slot + * (octets) + * @param[in] owner_id Owner ID supplied as a credential. + * @param[out] slot Requested slot + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t shw_slot_alloc(void *user_data, uint32_t size, + uint64_t owner_id, uint32_t * slot); + +/*! + * Default keystore slot deallocation + * + * This function releases the given key slot in the keystore, making it + * available to store a new key. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] owner_id Owner ID supplied as a credential. + * @param[in] slot Requested slot + * + * @return A return code of type #fsl_shw_return_t. + */ +fsl_shw_return_t shw_slot_dealloc(void *user_data, + uint64_t owner_id, uint32_t slot); + +/*! + * Default keystore slot address lookup + * + * This function calculates the address where the key data is stored. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] slot Requested slot + * + * @return SCC2: Virtual address (kernel or userspace) of the key data. + * SCC: Physical address of the key data. + */ +void *shw_slot_get_address(void *user_data, uint32_t slot); + +/*! + * Default keystore slot base address lookup + * + * This function calculates the base address of the Secure Partition on which + * the key data is located. For the reference design, only one Secure + * Partition is used per Keystore, however in general, any number may be used. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] slot Requested slot + * + * @return SCC2: Secure Partition virtual (kernel or userspace) base address. + * SCC: Secure Partition physical base address. + */ +uint32_t shw_slot_get_base(void *user_data, uint32_t slot); + +/*! + * Default keystore slot offset lookup + * + * This function calculates the offset from the base of the Secure Partition + * where the key data is located. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] slot Requested slot + * + * @return SCC2: Key data offset (octets) + * SCC: Not implemented + */ +uint32_t shw_slot_get_offset(void *user_data, uint32_t slot); + +/*! + * Default keystore slot offset lookup + * + * This function returns the size of the given key slot. In the reference + * implementation, all key slots are of the same size, however in general, + * the keystore slot sizes can be made variable. + * + * @param[in] user_data Pointer to the location where the keystore data + * structure stored. + * @param[in] slot Requested slot + * + * @return SCC2: Keystore slot size. + * SCC: Not implemented + */ +uint32_t shw_slot_get_slot_size(void *user_data, uint32_t slot); + +/* @} */ + +#endif /* FSL_SHW_KEYSTORE_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sf_util.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sf_util.h @@ -0,0 +1,466 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file sf_util.h +* +* @brief Header for Sahara Descriptor-chain building Functions +*/ +#ifndef SF_UTIL_H +#define SF_UTIL_H + +#include +#include + +/*! Header value for Sahara Descriptor 1 */ +#define SAH_HDR_SKHA_SET_MODE_IV_KEY 0x10880000 +/*! Header value for Sahara Descriptor 2 */ +#define SAH_HDR_SKHA_SET_MODE_ENC_DEC 0x108D0000 +/*! Header value for Sahara Descriptor 4 */ +#define SAH_HDR_SKHA_ENC_DEC 0x90850000 +/*! Header value for Sahara Descriptor 5 */ +#define SAH_HDR_SKHA_READ_CONTEXT_IV 0x10820000 +/*! Header value for Sahara Descriptor 6 */ +#define SAH_HDR_MDHA_SET_MODE_MD_KEY 0x20880000 +/*! Header value for Sahara Descriptor 8 */ +#define SAH_HDR_MDHA_SET_MODE_HASH 0x208D0000 +/*! Header value for Sahara Descriptor 10 */ +#define SAH_HDR_MDHA_HASH 0xA0850000 +/*! Header value for Sahara Descriptor 11 */ +#define SAH_HDR_MDHA_STORE_DIGEST 0x20820000 +/*! Header value for Sahara Descriptor 18 */ +#define SAH_HDR_RNG_GENERATE 0x308C0000 +/*! Header value for Sahara Descriptor 19 */ +#define SAH_HDR_PKHA_LD_N_E 0xC0800000 +/*! Header value for Sahara Descriptor 20 */ +#define SAH_HDR_PKHA_LD_A_EX_ST_B 0x408D0000 +/*! Header value for Sahara Descriptor 21 */ +#define SAH_HDR_PKHA_LD_N_EX_ST_B 0x408E0000 +/*! Header value for Sahara Descriptor 22 */ +#define SAH_HDR_PKHA_LD_A_B 0xC0830000 +/*! Header value for Sahara Descriptor 23 */ +#define SAH_HDR_PKHA_LD_A0_A1 0x40840000 +/*! Header value for Sahara Descriptor 24 */ +#define SAH_HDR_PKHA_LD_A2_A3 0xC0850000 +/*! Header value for Sahara Descriptor 25 */ +#define SAH_HDR_PKHA_LD_B0_B1 0xC0860000 +/*! Header value for Sahara Descriptor 26 */ +#define SAH_HDR_PKHA_LD_B2_B3 0x40870000 +/*! Header value for Sahara Descriptor 27 */ +#define SAH_HDR_PKHA_ST_A_B 0x40820000 +/*! Header value for Sahara Descriptor 28 */ +#define SAH_HDR_PKHA_ST_A0_A1 0x40880000 +/*! Header value for Sahara Descriptor 29 */ +#define SAH_HDR_PKHA_ST_A2_A3 0xC0890000 +/*! Header value for Sahara Descriptor 30 */ +#define SAH_HDR_PKHA_ST_B0_B1 0xC08A0000 +/*! Header value for Sahara Descriptor 31 */ +#define SAH_HDR_PKHA_ST_B2_B3 0x408B0000 +/*! Header value for Sahara Descriptor 32 */ +#define SAH_HDR_PKHA_EX_ST_B1 0xC08C0000 +/*! Header value for Sahara Descriptor 33 */ +#define SAH_HDR_ARC4_SET_MODE_SBOX 0x90890000 +/*! Header value for Sahara Descriptor 34 */ +#define SAH_HDR_ARC4_READ_SBOX 0x90860000 +/*! Header value for Sahara Descriptor 35 */ +#define SAH_HDR_ARC4_SET_MODE_KEY 0x90830000 +/*! Header value for Sahara Descriptor 36 */ +#define SAH_HDR_PKHA_LD_A3_B0 0x40810000 +/*! Header value for Sahara Descriptor 37 */ +#define SAH_HDR_PKHA_ST_B1_B2 0xC08F0000 +/*! Header value for Sahara Descriptor 38 */ +#define SAH_HDR_SKHA_CBC_ICV 0x10840000 +/*! Header value for Sahara Descriptor 39 */ +#define SAH_HDR_MDHA_ICV_CHECK 0xA08A0000 + +/*! Header bit indicating "Link-List optimization" */ +#define SAH_HDR_LLO 0x01000000 + +#define SAH_SF_DCLS \ + fsl_shw_return_t ret; \ + unsigned sf_executed = 0; \ + sah_Head_Desc* desc_chain = NULL; \ + uint32_t header + +#define SAH_SF_USER_CHECK() \ +do { \ + ret = sah_validate_uco(user_ctx); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} while (0) + +#define SAH_SF_EXECUTE() \ +do { \ + sf_executed = 1; \ + ret = sah_Descriptor_Chain_Execute(desc_chain, user_ctx); \ +} while (0) + +#define SAH_SF_DESC_CLEAN() \ +do { \ + if (!sf_executed || (user_ctx->flags & FSL_UCO_BLOCKING_MODE)) { \ + sah_Descriptor_Chain_Destroy(user_ctx->mem_util, &desc_chain); \ + } \ + (void) header; \ +} while (0) + +/*! Add Descriptor with two inputs */ +#define DESC_IN_IN(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_two_in_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with two vectors */ +#define DESC_D_D(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_two_d_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with input and a key */ +#define DESC_IN_KEY(hdr, len1, ptr1, key2) \ +{ \ + ret = sah_add_in_key_desc(hdr, ptr1, len1, key2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with input and an output */ +#define DESC_IN_OUT(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_in_out_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with input and a key output */ +#define DESC_IN_KEYOUT(hdr, len1, ptr1, key2) \ +{ \ + ret = sah_add_in_keyout_desc(hdr, ptr1, len1, key2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with a key and an output */ +#define DESC_KEY_OUT(hdr, key1, len2, ptr2) \ +{ \ + ret = sah_add_key_out_desc(hdr, key1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with two outputs */ +#define DESC_OUT_OUT(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_two_out_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +/*! Add Descriptor with output then input pointers */ +#define DESC_OUT_IN(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_out_in_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} + +#ifdef SAH_SF_DEBUG +/*! Add Descriptor with two outputs */ +#define DBG_DESC(hdr, len1, ptr1, len2, ptr2) \ +{ \ + ret = sah_add_two_out_desc(hdr, ptr1, len1, ptr2, len2, \ + user_ctx->mem_util, &desc_chain); \ + if (ret != FSL_RETURN_OK_S) { \ + goto out; \ + } \ +} +#else +#define DBG_DESC(hdr, len1, ptr1, len2, ptr2) +#endif + +#ifdef __KERNEL__ +#define DESC_DBG_ON ({console_loglevel = 8;}) +#define DESC_DBG_OFF ({console_loglevel = 7;}) +#else +#define DESC_DBG_ON system("echo 8 > /proc/sys/kernel/printk") +#define DESC_DBG_OFF system("echo 7 > /proc/sys/kernel/printk") +#endif + +#define DESC_TEMP_ALLOC(size) \ +({ \ + uint8_t* ptr; \ + ptr = user_ctx->mem_util->mu_malloc(user_ctx->mem_util->mu_ref, \ + size); \ + if (ptr == NULL) { \ + ret = FSL_RETURN_NO_RESOURCE_S; \ + goto out; \ + } \ + \ + ptr; \ +}) + +#define DESC_TEMP_FREE(ptr) \ +({ \ + if ((ptr != NULL) && \ + (!sf_executed || (user_ctx->flags & FSL_UCO_BLOCKING_MODE))) { \ + user_ctx->mem_util-> \ + mu_free(user_ctx->mem_util->mu_ref, ptr); \ + ptr = NULL; \ + } \ +}) + +/* Temporary implementation. This needs to be in internal/secure RAM */ +#define DESC_TEMP_SECURE_ALLOC(size) \ +({ \ + uint8_t* ptr; \ + ptr = user_ctx->mem_util->mu_malloc(user_ctx->mem_util->mu_ref, \ + size); \ + if (ptr == NULL) { \ + ret = FSL_RETURN_NO_RESOURCE_S; \ + goto out; \ + } \ + \ + ptr; \ +}) + +#define DESC_TEMP_SECURE_FREE(ptr, size) \ +({ \ + if ((ptr != NULL) && \ + (!sf_executed || (user_ctx->flags & FSL_UCO_BLOCKING_MODE))) { \ + user_ctx->mem_util->mu_memset(user_ctx->mem_util->mu_ref, \ + ptr, 0, size); \ + \ + user_ctx->mem_util-> \ + mu_free(user_ctx->mem_util->mu_ref, ptr); \ + ptr = NULL; \ + } \ +}) + +extern const uint32_t sah_insert_mdha_algorithm[]; + +/*! @defgroup mdhaflags MDHA Mode Register Values + * + * These are bit fields and combinations of bit fields for setting the Mode + * Register portion of a Sahara Descriptor Header field. + * + * The parity bit has been set to ensure that these values have even parity, + * therefore using an Exclusive-OR operation against an existing header will + * preserve its parity. + * + * @addtogroup mdhaflags + @{ + */ +#define sah_insert_mdha_icv_check 0x80001000 +#define sah_insert_mdha_ssl 0x80000400 +#define sah_insert_mdha_mac_full 0x80000200 +#define sah_insert_mdha_opad 0x80000080 +#define sah_insert_mdha_ipad 0x80000040 +#define sah_insert_mdha_init 0x80000020 +#define sah_insert_mdha_hmac 0x80000008 +#define sah_insert_mdha_pdata 0x80000004 +#define sah_insert_mdha_algorithm_sha224 0x00000003 +#define sah_insert_mdha_algorithm_sha256 0x80000002 +#define sah_insert_mdha_algorithm_md5 0x80000001 +#define sah_insert_mdha_algorithm_sha1 0x00000000 +/*! @} */ + +extern const uint32_t sah_insert_skha_algorithm[]; +extern const uint32_t sah_insert_skha_mode[]; +extern const uint32_t sah_insert_skha_modulus[]; + +/*! @defgroup skhaflags SKHA Mode Register Values + * + * These are bit fields and combinations of bit fields for setting the Mode + * Register portion of a Sahara Descriptor Header field. + * + * The parity bit has been set to ensure that these values have even parity, + * therefore using an Exclusive-OR operation against an existing header will + * preserve its parity. + * + * @addtogroup skhaflags + @{ + */ +/*! */ +#define sah_insert_skha_modulus_128 0x00001e00 +#define sah_insert_skha_no_key_parity 0x80000100 +#define sah_insert_skha_ctr_last_block 0x80000020 +#define sah_insert_skha_suppress_cbc 0x80000020 +#define sah_insert_skha_no_permute 0x80000020 +#define sah_insert_skha_algorithm_arc4 0x00000003 +#define sah_insert_skha_algorithm_tdes 0x80000002 +#define sah_insert_skha_algorithm_des 0x80000001 +#define sah_insert_skha_algorithm_aes 0x00000000 +#define sah_insert_skha_aux0 0x80000020 +#define sah_insert_skha_mode_ctr 0x00000018 +#define sah_insert_skha_mode_ccm 0x80000010 +#define sah_insert_skha_mode_cbc 0x80000008 +#define sah_insert_skha_mode_ecb 0x00000000 +#define sah_insert_skha_encrypt 0x80000004 +#define sah_insert_skha_decrypt 0x00000000 +/*! @} */ + +/*! @defgroup rngflags RNG Mode Register Values + * + */ +/*! */ +#define sah_insert_rng_gen_seed 0x80000001 + +/*! @} */ + +/*! @defgroup pkhaflags PKHA Mode Register Values + * + */ +/*! */ +#define sah_insert_pkha_soft_err_false 0x80000200 +#define sah_insert_pkha_soft_err_true 0x80000100 + +#define sah_insert_pkha_rtn_clr_mem 0x80000001 +#define sah_insert_pkha_rtn_clr_eram 0x80000002 +#define sah_insert_pkha_rtn_mod_exp 0x00000003 +#define sah_insert_pkha_rtn_mod_r2modn 0x80000004 +#define sah_insert_pkha_rtn_mod_rrmodp 0x00000005 +#define sah_insert_pkha_rtn_ec_fp_aff_ptmul 0x00000006 +#define sah_insert_pkha_rtn_ec_f2m_aff_ptmul 0x80000007 +#define sah_insert_pkha_rtn_ec_fp_proj_ptmul 0x80000008 +#define sah_insert_pkha_rtn_ec_f2m_proj_ptmul 0x00000009 +#define sah_insert_pkha_rtn_ec_fp_add 0x0000000A +#define sah_insert_pkha_rtn_ec_fp_double 0x8000000B +#define sah_insert_pkha_rtn_ec_f2m_add 0x0000000C +#define sah_insert_pkha_rtn_ec_f2m_double 0x8000000D +#define sah_insert_pkha_rtn_f2m_r2modn 0x8000000E +#define sah_insert_pkha_rtn_f2m_inv 0x0000000F +#define sah_insert_pkha_rtn_mod_inv 0x80000010 +#define sah_insert_pkha_rtn_rsa_sstep 0x00000011 +#define sah_insert_pkha_rtn_mod_emodn 0x00000012 +#define sah_insert_pkha_rtn_f2m_emodn 0x80000013 +#define sah_insert_pkha_rtn_ec_fp_ptmul 0x00000014 +#define sah_insert_pkha_rtn_ec_f2m_ptmul 0x80000015 +#define sah_insert_pkha_rtn_f2m_gcd 0x80000016 +#define sah_insert_pkha_rtn_mod_gcd 0x00000017 +#define sah_insert_pkha_rtn_f2m_dbl_aff 0x00000018 +#define sah_insert_pkha_rtn_fp_dbl_aff 0x80000019 +#define sah_insert_pkha_rtn_f2m_add_aff 0x8000001A +#define sah_insert_pkha_rtn_fp_add_aff 0x0000001B +#define sah_insert_pkha_rtn_f2m_exp 0x8000001C +#define sah_insert_pkha_rtn_mod_exp_teq 0x0000001D +#define sah_insert_pkha_rtn_rsa_sstep_teq 0x0000001E +#define sah_insert_pkha_rtn_f2m_multn 0x8000001F +#define sah_insert_pkha_rtn_mod_multn 0x80000020 +#define sah_insert_pkha_rtn_mod_add 0x00000021 +#define sah_insert_pkha_rtn_mod_sub 0x00000022 +#define sah_insert_pkha_rtn_mod_mult1_mont 0x80000023 +#define sah_insert_pkha_rtn_mod_mult2_deconv 0x00000024 +#define sah_insert_pkha_rtn_f2m_add 0x80000025 +#define sah_insert_pkha_rtn_f2m_mult1_mont 0x80000026 +#define sah_insert_pkha_rtn_f2m_mult2_deconv 0x00000027 +#define sah_insert_pkha_rtn_miller_rabin 0x00000028 +#define sah_insert_pkha_rtn_mod_amodn 0x00000029 +#define sah_insert_pkha_rtn_f2m_amodn 0x8000002A +/*! @} */ + +/*! Add a descriptor with two input pointers */ +fsl_shw_return_t sah_add_two_in_desc(uint32_t header, + const uint8_t * in1, + uint32_t in1_length, + const uint8_t * in2, + uint32_t in2_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with two 'data' pointers */ +fsl_shw_return_t sah_add_two_d_desc(uint32_t header, + const uint8_t * in1, + uint32_t in1_length, + const uint8_t * in2, + uint32_t in2_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with an input and key pointer */ +fsl_shw_return_t sah_add_in_key_desc(uint32_t header, + const uint8_t * in1, + uint32_t in1_length, + fsl_shw_sko_t * key_info, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with two key pointers */ +fsl_shw_return_t sah_add_key_key_desc(uint32_t header, + fsl_shw_sko_t * key_info1, + fsl_shw_sko_t * key_info2, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with two output pointers */ +fsl_shw_return_t sah_add_two_out_desc(uint32_t header, + uint8_t * out1, + uint32_t out1_length, + uint8_t * out2, + uint32_t out2_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with an input and output pointer */ +fsl_shw_return_t sah_add_in_out_desc(uint32_t header, + const uint8_t * in, uint32_t in_length, + uint8_t * out, uint32_t out_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with an input and key output pointer */ +fsl_shw_return_t sah_add_in_keyout_desc(uint32_t header, + const uint8_t * in, uint32_t in_length, + fsl_shw_sko_t * key_info, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with a key and an output pointer */ +fsl_shw_return_t sah_add_key_out_desc(uint32_t header, + const fsl_shw_sko_t * key_info, + uint8_t * out, uint32_t out_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Add a descriptor with an output and input pointer */ +fsl_shw_return_t sah_add_out_in_desc(uint32_t header, + uint8_t * out, uint32_t out_length, + const uint8_t * in, uint32_t in_length, + const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/*! Verify that supplied User Context Object is valid */ +fsl_shw_return_t sah_validate_uco(fsl_shw_uco_t * uco); + +#endif /* SF_UTIL_H */ + +/* End of sf_util.h */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_memory_mapper.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_memory_mapper.h @@ -0,0 +1,79 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_memory_mapper.h +* +* @brief Re-creates SAHARA data structures in Kernel memory such that they are +* suitable for DMA. +* +*/ + +#ifndef SAH_MEMORY_MAPPER_H +#define SAH_MEMORY_MAPPER_H + +#include +#include + + +/****************************************************************************** +* External function declarations +******************************************************************************/ +sah_Head_Desc *sah_Copy_Descriptors(fsl_shw_uco_t * user_ctx, + sah_Head_Desc * desc); + +sah_Link *sah_Copy_Links(fsl_shw_uco_t * user_ctx, sah_Link * ptr); + +sah_Head_Desc *sah_Physicalise_Descriptors(sah_Head_Desc * desc); + +sah_Link *sah_Physicalise_Links (sah_Link *ptr); + +sah_Head_Desc *sah_DePhysicalise_Descriptors (sah_Head_Desc *desc); + +sah_Link *sah_DePhysicalise_Links (sah_Link *ptr); + +sah_Link *sah_Make_Links(fsl_shw_uco_t * user_ctx, + sah_Link * ptr, sah_Link ** tail); + + +void sah_Destroy_Descriptors (sah_Head_Desc *desc); + +void sah_Destroy_Links (sah_Link *link); + +void sah_Free_Chained_Descriptors (sah_Head_Desc *desc); + +void sah_Free_Chained_Links (sah_Link *link); + +int sah_Init_Mem_Map (void); + +void sah_Stop_Mem_Map (void); + +int sah_Block_Add_Page (int big); + +sah_Desc *sah_Alloc_Descriptor (void); +sah_Head_Desc *sah_Alloc_Head_Descriptor (void); +void sah_Free_Descriptor (sah_Desc *desc); +void sah_Free_Head_Descriptor (sah_Head_Desc *desc); +sah_Link *sah_Alloc_Link (void); +void sah_Free_Link (sah_Link *link); + +void *wire_user_memory(void *address, uint32_t length, void **page_ctx); +void unwire_user_memory(void **page_ctx); + +os_error_code map_user_memory(struct vm_area_struct *vma, + uint32_t physical_addr, uint32_t size); +os_error_code unmap_user_memory(uint32_t user_addr, uint32_t size); + +#endif /* SAH_MEMORY_MAPPER_H */ + +/* End of sah_memory_mapper.h */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_kernel.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_kernel.h @@ -0,0 +1,113 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* +* @file sah_kernel.h +* +* @brief Provides definitions for items that user-space and kernel-space share. +*/ +/****************************************************************************** +* +* This file needs to be PORTED to a non-Linux platform +*/ + +#ifndef SAH_KERNEL_H +#define SAH_KERNEL_H + +#if defined(__KERNEL__) + +#if defined(CONFIG_ARCH_MXC91321) || defined(CONFIG_ARCH_MXC91231) \ + || defined(CONFIG_ARCH_MX27) || defined(CONFIG_ARCH_MXC92323) +#include +#define SAHA_BASE_ADDR SAHARA_BASE_ADDR +#define SAHARA_IRQ MXC_INT_SAHARA +#elif defined(CONFIG_ARCH_MX51) +#include +#define SAHA_BASE_ADDR SAHARA_BASE_ADDR +#define SAHARA_IRQ MXC_INT_SAHARA_H0 +#else +#include +#endif + +#endif /* KERNEL */ + +/* IO Controls */ +/* The magic number 'k' is reserved for the SPARC architecture. (See /Documentation/ioctl-number.txt. + * + * Note: Numbers 8-13 were used in a previous version of the API and should + * be avoided. + */ +#define SAH_IOC_MAGIC 'k' +#define SAHARA_HWRESET _IO(SAH_IOC_MAGIC, 0) +#define SAHARA_SET_HA _IO(SAH_IOC_MAGIC, 1) +#define SAHARA_CHK_TEST_MODE _IOR(SAH_IOC_MAGIC,2, int) +#define SAHARA_DAR _IO(SAH_IOC_MAGIC, 3) +#define SAHARA_GET_RESULTS _IO(SAH_IOC_MAGIC, 4) +#define SAHARA_REGISTER _IO(SAH_IOC_MAGIC, 5) +#define SAHARA_DEREGISTER _IO(SAH_IOC_MAGIC, 6) +/* 7 */ +/* 8 */ +/* 9 */ +/* 10 */ +/* 11 */ +/* 12 */ +/* 13 */ + +#define SAHARA_SCC_DROP_PERMS _IOWR(SAH_IOC_MAGIC, 14, scc_partition_info_t) +#define SAHARA_SCC_SFREE _IOWR(SAH_IOC_MAGIC, 15, scc_partition_info_t) + +#define SAHARA_SK_ALLOC _IOWR(SAH_IOC_MAGIC, 16, scc_slot_t) +#define SAHARA_SK_DEALLOC _IOWR(SAH_IOC_MAGIC, 17, scc_slot_t) +#define SAHARA_SK_LOAD _IOWR(SAH_IOC_MAGIC, 18, scc_slot_t) +#define SAHARA_SK_UNLOAD _IOWR(SAH_IOC_MAGIC, 19, scc_slot_t) +#define SAHARA_SK_SLOT_ENC _IOWR(SAH_IOC_MAGIC, 20, scc_slot_t) +#define SAHARA_SK_SLOT_DEC _IOWR(SAH_IOC_MAGIC, 21, scc_slot_t) + +#define SAHARA_SCC_ENCRYPT _IOWR(SAH_IOC_MAGIC, 22, scc_region_t) +#define SAHARA_SCC_DECRYPT _IOWR(SAH_IOC_MAGIC, 23, scc_region_t) +#define SAHARA_GET_CAPS _IOWR(SAH_IOC_MAGIC, 24, fsl_shw_pco_t) + +#define SAHARA_SCC_SSTATUS _IOWR(SAH_IOC_MAGIC, 25, scc_partition_info_t) + +#define SAHARA_SK_READ _IOWR(SAH_IOC_MAGIC, 29, scc_slot_t) + +/*! This is the name that will appear in /proc/interrupts */ +#define SAHARA_NAME "SAHARA" + +/*! + * SAHARA IRQ number. See page 9-239 of TLICS - Motorola Semiconductors H.K. + * TAHITI-Lite IC Specification, Rev 1.1, Feb 2003. + * + * TAHITI has two blocks of 32 interrupts. The SAHARA IRQ is number 27 + * in the second block. This means that the SAHARA IRQ is 27 + 32 = 59. + */ +#ifndef SAHARA_IRQ +#define SAHARA_IRQ (27+32) +#endif + +/*! + * Device file definition. The #ifndef is here to support the unit test code + * by allowing it to specify a different test device. + */ +#ifndef SAHARA_DEVICE_SHORT +#define SAHARA_DEVICE_SHORT "sahara" +#endif + +#ifndef SAHARA_DEVICE +#define SAHARA_DEVICE "/dev/"SAHARA_DEVICE_SHORT +#endif + +#endif /* SAH_KERNEL_H */ + +/* End of sah_kernel.h */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_hardware_interface.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_hardware_interface.h @@ -0,0 +1,99 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_hardware_interface.h +* +* @brief Provides an interface to the SAHARA hardware registers. +* +*/ + +#ifndef SAH_HARDWARE_INTERFACE_H +#define SAH_HARDWARE_INTERFACE_H + +#include +#include + +/* These values can be used with sah_HW_Write_Control(). */ +#ifdef SAHARA1 +/** Define platform as Little-Endian */ +#define CTRL_LITTLE_END 0x00000002 +/** Bit to cause endian change in transfers */ +#define CTRL_INT_EN 0x00000004 +/** Set High Assurance mode */ +#define CTRL_HA 0x00000008 +#else +/** Bit to cause byte swapping in (data?) transfers */ +#define CTRL_BYTE_SWAP 0x00000001 +/** Bit to cause halfword swapping in (data?) transfers */ +#define CTRL_HALFWORD_SWAP 0x00000002 +/** Bit to cause endian change in (data?) transfers */ +#define CTRL_INT_EN 0x00000010 +/** Set High Assurance mode */ +#define CTRL_HA 0x00000020 +/** Disable High Assurance */ +#define CTRL_HA_DISABLE 0x00000040 +/** Reseed the RNG CHA */ +#define CTRL_RNG_RESEED 0x00000080 +#endif + + +/* These values can be used with sah_HW_Write_Command(). */ +/** Reset the Sahara */ +#define CMD_RESET 0x00000001 +/** Set Sahara into Batch mode. */ +#define CMD_BATCH 0x00010000 +/** Clear the Sahara interrupt */ +#define CMD_CLR_INT_BIT 0x00000100 +/** Clear the Sahara error */ +#define CMD_CLR_ERROR_BIT 0x00000200 + + +/** error status register contains error */ +#define STATUS_ERROR 0x00000010 + +/** Op status register contains op status */ +#define OP_STATUS 0x00000020 + + +/* High Level functions */ +int sah_HW_Reset(void); +fsl_shw_return_t sah_HW_Set_HA(void); +sah_Execute_Status sah_Wait_On_Sahara(void); + +/* Low Level functions */ +uint32_t sah_HW_Read_Version(void); +uint32_t sah_HW_Read_Control(void); +uint32_t sah_HW_Read_Status(void); +uint32_t sah_HW_Read_Error_Status(void); +uint32_t sah_HW_Read_Op_Status(void); +uint32_t sah_HW_Read_DAR(void); +uint32_t sah_HW_Read_CDAR(void); +uint32_t sah_HW_Read_IDAR(void); +uint32_t sah_HW_Read_Fault_Address(void); +uint32_t sah_HW_Read_MM_Status(void); +uint32_t sah_HW_Read_Config(void); +void sah_HW_Write_Command(uint32_t command); +void sah_HW_Write_Control(uint32_t control); +void sah_HW_Write_DAR(uint32_t pointer); +void sah_HW_Write_Config(uint32_t configuration); + +#if defined DIAG_DRV_IF || defined(DO_DBG) + +void sah_Dump_Words(const char *prefix, const unsigned *data, dma_addr_t addr, + unsigned length); +#endif + +#endif /* SAH_HARDWARE_INTERFACE_H */ + +/* End of sah_hardware_interface.c */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/portable_os.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/portable_os.h @@ -0,0 +1,1453 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef PORTABLE_OS_H +#define PORTABLE_OS_H + +/***************************************************************************/ + +/* + * Add support for your target OS by checking appropriate flags and then + * including the appropriate file. Don't forget to document the conditions + * in the later documentation section at the beginning of the + * DOXYGEN_PORTABLE_OS_DOC. + */ + +#if defined(LINUX_KERNEL) + +#include "linux_port.h" + +#elif defined(PORTABLE_OS) + +#include "check_portability.h" + +#else + +#error Target OS unsupported or unspecified + +#endif + + +/***************************************************************************/ + +/*! + * @file portable_os.h + * + * This file should be included by portable driver code in order to gain access + * to the OS-specific header files. It is the only OS-related header file that + * the writer of a portable driver should need. + * + * This file also contains the documentation for the common API. + * + * Begin reading the documentation for this file at the @ref index "main page". + * + */ + +/*! + * @if USE_MAINPAGE + * @mainpage Generic OS API for STC Drivers + * @endif + * + * @section intro_sec Introduction + * + * This defines the API / kernel programming environment for portable drivers. + * + * This API is broken up into several functional areas. It greatly limits the + * choices of a device-driver author, but at the same time should allow for + * greater portability of the resulting code. + * + * Each kernel-to-driver function (initialization function, interrupt service + * routine, etc.) has a 'portable signature' which must be used, and a specific + * function which must be called to generate the return statement. There is + * one exception, a background task or "bottom half" routine, which instead has + * a specific structure which must be followed. These signatures and function + * definitions are found in @ref drsigs. + * + * None of these kernel-to-driver functions seem to get any arguments passed to + * them. Instead, there are @ref drsigargs which allow one of these functions + * to get at fairly generic parts of its calling arguments, if there are any. + * + * Almost every driver will have some need to call the operating system + * @ref dkops is the list of services which are available to the driver. + * + * + * @subsection warn_sec Warning + * + * The specifics of the types, values of the various enumerations + * (unless specifically stated, like = 0), etc., are only here for illustrative + * purposes. No attempts should be made to make use of any specific knowledge + * gleaned from this documentation. These types are only meant to be passed in + * and out of the API, and their contents are to be handled only by the + * provided OS-specific functions. + * + * Also, note that the function may be provided as macros in some + * implementations, or vice versa. + * + * + * @section dev_sec Writing a Portable Driver + * + * First off, writing a portable driver means calling no function in an OS + * except what is available through this header file. + * + * Secondly, all OS-called functions in your driver must be invoked and + * referenced through the signature routines. + * + * Thirdly, there might be some rules which you can get away with ignoring or + * violating on one OS, yet will cause your code not to be portable to a + * different OS. + * + * + * @section limit_sec Limitations + * + * This API is not expected to handle every type of driver which may be found + * in an operating system. For example, it will not be able to handle the + * usual design for something like a UART driver, where there are multiple + * logical devices to access, because the design usually calls for some sort of + * indication to the #OS_DEV_TASK() function or OS_DEV_ISR() to indicate which + * channel is to be serviced by that instance of the task/function. This sort + * of argument is missing in this API for functions like os_dev_schedule_task() and + * os_register_interrupt(). + * + * + * @section port_guide Porting Guidelines + * + * This section is intended for a developer who needs to port the header file + * to an operating system which is not yet supported. + * + * This interface allows for a lot of flexibility when it comes to porting to + * an operating systems device driver interface. There are three main areas to + * examine: The use of Driver Routine Signatures, the use of Driver Argument + * Access functions, the Calls to Kernel Functions, and Data Types. + * + * + * @subsection port_sig Porting Driver Routine Signatures + * + * The three macros for each function (e.g. #OS_DEV_INIT(), #OS_DEV_INIT_DCL(), + * and #OS_DEV_INIT_REF()) allow the flexibility of having a 'wrapper' function + * with the OS-required signature, which would then call the user's function + * with some different signature. + * + * The first form would lay down the wrapper function, followed by the + * signature for the user function. The second form would lay down just the + * signatures for both functions, and the last function would reference the + * wrapper function, since that is the interface function called by the OS. + * + * Note that the driver author has no visibility at all to the signature of the + * routines. The author can access arguments only through a limited set of + * functions, and must return via another function. + * + * The Return Functions allow a lot of flexibility in converting the return + * value, or not returning a value at all. These will likely be implemented as + * macros. + * + * + * @subsection port_arg Porting Driver Argument Access Functions + * + * The signatures defined by the guide will usually be replaced with macro + * definitions. + * + * + * @subsection port_dki Porting Calls to Kernel Functions + * + * The signatures defined by the guide may be replaced with macro definitions, + * if that makes more sense. + * + * Implementors are free to ignore arguments which are not applicable to their + * OS. + * + * @subsection port_datatypes Porting Data Types + * + * + */ + +/*************************************************************************** + * Compile flags + **************************************************************************/ + +/* + * This compile flag should only be turned on when running doxygen to generate + * the API documentation. + */ +#ifdef DOXYGEN_PORTABLE_OS_DOC + +/*! + * @todo module_init()/module_cleanup() for Linux need to be added to OS + * abstractions. Also need EXPORT_SYMBOL() equivalent?? + * + */ + +/* Drop OS differentation documentation here */ + +/*! + * \#define this flag to build your driver as a Linux driver + */ +#define LINUX + +/* end OS differentation documentation */ + +/*! + * Symbol to give version number of the implementation file. Earliest + * definition is in version 1.1, with value 101 (to mean version 1.1) + */ +#define PORTABLE_OS_VERSION 101 + +/* + * NOTICE: The following definitions (the rest of the file) are not meant ever + * to be compiled. Instead, they are the documentation for the portable OS + * API, to be used by driver writers. + * + * Each individual OS port will define each of these types, functions, or + * macros as appropriate to the target OS. This is why they are under the + * DOXYGEN_PORTABLE_OS_DOC flag. + */ + +/*************************************************************************** + * Type definitions + **************************************************************************/ + +/*! + * Type used for registering and deregistering interrupts. + * + * This is typically an interrupt channel number. + */ +typedef int os_interrupt_id_t; + +/*! + * Type used as handle for a process + * + * See #os_get_process_handle() and #os_send_signal(). + */ +typedef int os_process_handle_t; + +/*! + * Generic return code for functions which need such a thing. + * + * No knowledge should be assumed of the value of any of these symbols except + * that @c OS_ERROR_OK_S is guaranteed to be zero. + * + * @todo Any other named values? What about (-EAGAIN? -ERESTARTSYS? Are they + * too Linux/Unix-specific read()/write() return values) ? + */ +typedef enum { + OS_ERROR_OK_S = 0, /*!< Success */ + OS_ERROR_FAIL_S, /*!< Generic driver failure */ + OS_ERROR_NO_MEMORY_S, /*!< Failure to acquire/use memory */ + OS_ERROR_BAD_ADDRESS_S, /*!< Bad address */ + OS_ERROR_BAD_ARG_S /*!< Bad input argument */ +} os_error_code; + +/*! + * Handle to a lock. + */ +typedef int *os_lock_t; + +/*! + * Context while locking. + */ +typedef int os_lock_context_t; + +/*! + * An object which can be slept on and later used to wake any/all sleepers. + */ +typedef int os_sleep_object_t; + +/*! + * Driver registration handle + */ +typedef void *os_driver_reg_t; + +/*! + * Function signature for an #OS_DEV_INIT() function. + * + * @return A call to os_dev_init_return() function. + */ +typedef void (*os_init_function_t) (void); + +/*! + * Function signature for an #OS_DEV_SHUTDOWN() function. + * + * @return A call to os_dev_shutdown_return() function. + */ +typedef void (*os_shutdown_function_t) (void); + +/*! + * Function signature for a user-driver function. + * + * @return A call to the appropriate os_dev_xxx_return() function. + */ +typedef void (*os_user_function_t) (void); + +/*! + * Function signature for the portable interrupt handler + * + * While it would be nice to know which interrupt is being serviced, the + * Least Common Denominator rule says that no arguments get passed in. + * + * @return A call to #os_dev_isr_return() + */ +typedef void (*os_interrupt_handler_t) (void); + +/*! + * Function signature for a task function + * + * Many task function definitions get some sort of generic argument so that the + * same function can run across many (queues, channels, ...) as separate task + * instances. This has been left out of this API. + * + * This function must be structured as documented by #OS_DEV_TASK(). + * + */ +typedef void (*os_task_fn_t) (void); + +/*! + * Function types which can be associated with driver entry points. These are + * used in os_driver_add_registration(). + * + * Note that init and shutdown are absent. + */ +typedef enum { + OS_FN_OPEN, /*!< open() operation handler. */ + OS_FN_CLOSE, /*!< close() operation handler. */ + OS_FN_READ, /*!< read() operation handler. */ + OS_FN_WRITE, /*!< write() operation handler. */ + OS_FN_IOCTL, /*!< ioctl() operation handler. */ + OS_FN_MMAP /*!< mmap() operation handler. */ +} os_driver_fn_t; + +/*************************************************************************** + * Driver-to-Kernel Operations + **************************************************************************/ + +/*! + * @defgroup dkops Driver-to-Kernel Operations + * + * These are the operations which drivers should call to get the OS to perform + * services. + */ + +/*! @addtogroup dkops */ +/*! @{ */ + +/*! + * Register an interrupt handler. + * + * @param driver_name The name of the driver + * @param interrupt_id The interrupt line to monitor (type + * #os_interrupt_id_t) + * @param function The function to be called to handle an interrupt + * + * @return #os_error_code + */ +os_error_code os_register_interrupt(char *driver_name, + os_interrupt_id_t interrupt_id, + os_interrupt_handler_t function); + +/*! + * Deregister an interrupt handler. + * + * @param interrupt_id The interrupt line to stop monitoring + * + * @return #os_error_code + */ +os_error_code os_deregister_interrupt(os_interrupt_id_t interrupt_id); + +/*! + * Initialize driver registration. + * + * If the driver handles open(), close(), ioctl(), read(), write(), or mmap() + * calls, then it needs to register their location with the kernel so that they + * get associated with the device. + * + * @param handle The handle object to be used with this registration. The + * object must live (be in memory somewhere) at least until + * os_driver_remove_registration() is called. + * + * @return An os error code. + */ +os_error_code os_driver_init_registration(os_driver_reg_t handle); + +/*! + * Add a function registration to driver registration. + * + * @param handle The handle used with #os_driver_init_registration(). + * @param name Which function is being supported. + * @param function The result of a call to a @c _REF version of one of the + * driver function signature macros + * driver function signature macros + * @return void + */ +void os_driver_add_registration(os_driver_reg_t handle, os_driver_fn_t name, + void *function); + +/*! + * Finalize the driver registration with the kernel. + * + * Upon return from this call, the driver may begin receiving calls at the + * defined entry points. + * + * @param handle The handle used with #os_driver_init_registration(). + * @param major The major device number to be associated with the driver. + * If this value is zero, a major number may be assigned. + * See #os_driver_get_major() to determine final value. + * #os_driver_remove_registration(). + * @param driver_name The driver name. Can be used as part of 'device node' + * name on platforms which support such a feature. + * + * @return An error code + */ +os_error_code os_driver_complete_registration(os_driver_reg_t handle, + int major, char *driver_name); + +/*! + * Get driver Major Number from handle after a successful registration. + * + * @param handle A handle which has completed registration. + * + * @return The major number (if any) associated with the handle. + */ +uint32_t os_driver_get_major(os_driver_reg_t handle); + +/*! + * Remove the driver's registration with the kernel. + * + * Upon return from this call, the driver not receive any more calls at the + * defined entry points (other than ISR and shutdown). + * + * @param major The major device number to be associated with the driver. + * @param driver_name The driver name + * + * @return An error code. + */ +os_error_code os_driver_remove_registration(int major, char *driver_name); + +/*! + * Print a message to console / into log file. After the @c msg argument a + * number of printf-style arguments may be added. Types should be limited to + * printf string, char, octal, decimal, and hexadecimal types. (This excludes + * pointers, and floating point). + * + * @param msg The message to print to console / system log + * + * @return (void) + */ +void os_printk(char *msg, ...); + +/*! + * Allocate some kernel memory + * + * @param amount Number of 8-bit bytes to allocate + * @param flags Some indication of purpose of memory (needs definition) + * + * @return Pointer to allocated memory, or NULL if failed. + */ +void *os_alloc_memory(unsigned amount, int flags); + +/*! + * Free some kernel memory + * + * @param location The beginning of the region to be freed. + * + * Do some OSes have separate free() functions which should be + * distinguished by passing in @c flags here, too? Don't some also require the + * size of the buffer being freed? Perhaps separate routines for each + * alloc/free pair (DMAable, etc.)? + */ +void os_free_memory(void *location); + +/*! + * Allocate cache-coherent memory + * + * @param amount Number of bytes to allocate + * @param[out] dma_addrp Location to store physical address of allocated + * memory. + * @param flags Some indication of purpose of memory (needs + * definition). + * + * @return (virtual space) pointer to allocated memory, or NULL if failed. + * + */ +void *os_alloc_coherent(unsigned amount, uint32_t * dma_addrp, int flags); + +/*! + * Free cache-coherent memory + * + * @param size Number of bytes which were allocated. + * @param[out] virt_addr Virtual(kernel) address of memory.to be freed, as + * returned by #os_alloc_coherent(). + * @param[out] dma_addr Physical address of memory.to be freed, as returned + * by #os_alloc_coherent(). + * + * @return void + * + */ +void os_free_coherent(unsigned size, void *virt_addr, uint32_t dma_addr); + +/*! + * Map an I/O space into kernel memory space + * + * @param start The starting address of the (physical / io space) region + * @param range_bytes The number of bytes to map + * + * @return A pointer to the mapped area, or NULL on failure + */ +void *os_map_device(uint32_t start, unsigned range_bytes); + +/*! + * Unmap an I/O space from kernel memory space + * + * @param start The starting address of the (virtual) region + * @param range_bytes The number of bytes to unmap + * + * @return None + */ +void os_unmap_device(void *start, unsigned range_bytes); + +/*! + * Copy data from Kernel space to User space + * + * @param to The target location in user memory + * @param from The source location in kernel memory + * @param size The number of bytes to be copied + * + * @return #os_error_code + */ +os_error_code os_copy_to_user(void *to, void *from, unsigned size); + +/*! + * Copy data from User space to Kernel space + * + * @param to The target location in kernel memory + * @param from The source location in user memory + * @param size The number of bytes to be copied + * + * @return #os_error_code + */ +os_error_code os_copy_from_user(void *to, void *from, unsigned size); + +/*! + * Read an 8-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +uint8_t os_read8(uint8_t * register_address); + +/*! + * Write an 8-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +void os_write8(uint8_t * register_address, uint8_t value); + +/*! + * Read a 16-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +uint16_t os_read16(uint16_t * register_address); + +/*! + * Write a 16-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +void os_write16(uint16_t * register_address, uint16_t value); + +/*! + * Read a 32-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +uint32_t os_read32(uint32_t * register_address); + +/*! + * Write a 32-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +void os_write32(uint32_t * register_address, uint32_t value); + +/*! + * Read a 64-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +uint64_t os_read64(uint64_t * register_address); + +/*! + * Write a 64-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +void os_write64(uint64_t * register_address, uint64_t value); + +/*! + * Prepare a task to execute the given function. This should only be done once + * per task, during the driver's initialization routine. + * + * @param task_fn Name of the OS_DEV_TASK() function to be created. + * + * @return an OS ERROR code. + */ +os_error os_create_task(os_task_fn_t * task_fn); + +/*! + * Run the task associated with an #OS_DEV_TASK() function + * + * The task will begin execution sometime after or during this call. + * + * @param task_fn Name of the OS_DEV_TASK() function to be scheduled. + * + * @return void + */ +void os_dev_schedule_task(os_task_fn_t * task_fn); + +/*! + * Make sure that task is no longer running and will no longer run. + * + * This function will not return until both are true. This is useful when + * shutting down a driver. + * + * @param task_fn Name of the OS_DEV_TASK() funciton to be stopped. + * + */ +void os_stop_task(os_task_fn_t * task_fn); + +/*! + * Delay some number of microseconds + * + * Note that this is a busy-loop, not a suspension of the task/process. + * + * @param msecs The number of microseconds to delay + * + * @return void + */ +void os_mdelay(unsigned long msecs); + +/*! + * Calculate virtual address from physical address + * + * @param pa Physical address + * + * @return virtual address + * + * @note this assumes that addresses are 32 bits wide + */ +void *os_va(uint32_t pa); + +/*! + * Calculate physical address from virtual address + * + * + * @param va Virtual address + * + * @return physical address + * + * @note this assumes that addresses are 32 bits wide + */ +uint32_t os_pa(void *va); + +/*! + * Allocate and initialize a lock, returning a lock handle. + * + * The lock state will be initialized to 'unlocked'. + * + * @return A lock handle, or NULL if an error occurred. + */ +os_lock_t os_lock_alloc_init(void); + +/*! + * Acquire a lock. + * + * This function should only be called from an interrupt service routine. + * + * @param lock_handle A handle to the lock to acquire. + * + * @return void + */ +void os_lock(os_lock_t lock_handle); + +/*! + * Unlock a lock. Lock must have been acquired by #os_lock(). + * + * @param lock_handle A handle to the lock to unlock. + * + * @return void + */ +void os_unlock(os_lock_t lock_handle); + +/*! + * Acquire a lock in non-ISR context + * + * This function will spin until the lock is available. + * + * @param lock_handle A handle of the lock to acquire. + * @param context Place to save the before-lock context + * + * @return void + */ +void os_lock_save_context(os_lock_t lock_handle, os_lock_context_t context); + +/*! + * Release a lock in non-ISR context + * + * @param lock_handle A handle of the lock to release. + * @param context Place where before-lock context was saved. + * + * @return void + */ +void os_unlock_restore_context(os_lock_t lock_handle, + os_lock_context_t context); + +/*! + * Deallocate a lock handle. + * + * @param lock_handle An #os_lock_t that has been allocated. + * + * @return void + */ +void os_lock_deallocate(os_lock_t lock_handle); + +/*! + * Determine process handle + * + * The process handle of the current user is returned. + * + * @return A handle on the current process. + */ +os_process_handle_t os_get_process_handle(); + +/*! + * Send a signal to a process + * + * @param proc A handle to the target process. + * @param sig The POSIX signal to send to that process. + */ +void os_send_signal(os_process_handle_t proc, int sig); + +/*! + * Get some random bytes + * + * @param buf The location to store the random data. + * @param count The number of bytes to store. + * + * @return void + */ +void os_get_random_bytes(void *buf, unsigned count); + +/*! + * Go to sleep on an object. + * + * Example: code = os_sleep(my_queue, available_count == 0, 0); + * + * @param object The object on which to sleep + * @param condition An expression to check for sleep completion. Must be + * coded so that it can be referenced more than once inside + * macro, i.e., no ++ or other modifying expressions. + * @param atomic Non-zero if sleep must not return until condition. + * + * @return error code -- OK or sleep interrupted?? + */ +os_error_code os_sleep(os_sleep_object_t object, unsigned condition, + unsigned atomic); + +/*! + * Wake up whatever is sleeping on sleep object + * + * @param object The object on which things might be sleeping + * + * @return none + */ +void os_wake_sleepers(os_sleep_object_t object); + + /*! @} *//* dkops */ + +/***************************************************************************** + * Function-signature-generating macros + *****************************************************************************/ + +/*! + * @defgroup drsigs Driver Function Signatures + * + * These macros will define the entry point signatures for interrupt handlers; + * driver initialization and shutdown; device open/close; etc. They are to be + * used whenever the Kernel will call into the Driver. They are not + * appropriate for driver calls to other routines in the driver. + * + * There are three versions of each macro for a given Driver Entry Point. The + * first version is used to define a function and its implementation in the + * driver.c file, e.g. #OS_DEV_INIT(). + * + * The second form is used whenever a forward declaration (prototype) is + * needed. It has the letters @c _DCL appended to the name of the definition + * function. These are not otherwise mentioned in this documenation. + * + * There is a third form used when a reference to a function is required, for + * instance when passing the routine as a pointer to a function. It has the + * letters @c _REF appended to the name of the definition function + * (e.g. DEV_IOCTL_REF). + * + * Note that these two extra forms are required because of the possibility of + * having an invisible 'wrapper function' created by the os-specific header + * file which would need to be invoked by the operating system, and which in + * turn would invoke the generic function. + * + * Example: + * + * (in a header file) + * @code + * OS_DEV_INIT_DCL(widget_init); + * OS_DEV_ISR_DCL(widget_isr); + * @endcode + * + * (in an implementation file) + * @code + * OS_DEV_INIT(widget, widget_init) + * { + * + * os_register_interrupt("widget", WIDGET_IRQ, OS_DEV_ISR_REF(widget_isr)); + * + * os_dev_init_return(OS_RETURN_NO_ERROR_S); + * } + * + * OS_DEV_ISR(widget_isr) + * { + * os_dev_isr_return(TRUE); + * } + * @endcode + */ + +/*! @addtogroup drsigs */ +/*! @{ */ + +/*! + * Define a function which will handle device initialization + * + * This is tne driver initialization routine. This is normally where the + * part would be initialized; queues, locks, interrupts handlers defined; + * long-term dynamic memory allocated for driver use; etc. + * + * @param function_name The name of the portable initialization function. + * + * @return A call to #os_dev_init_return() + * + */ +#define OS_DEV_INIT(function_name) + +/*! + * Define a function which will handle device shutdown + * + * This is the reverse of the #OS_DEV_INIT() routine. + * + * @param function_name The name of the portable driver shutdown routine. + * + * @return A call to #os_dev_shutdown_return() + */ +#define OS_DEV_SHUTDOWN(function_name) + +/*! + * Define a function which will open the device for a user. + * + * @param function_name The name of the driver open() function + * + * @return A call to #os_dev_open_return() + */ +#define OS_DEV_OPEN(function_name) + +/*! + * Define a function which will handle a user's ioctl() request + * + * @param function_name The name of the driver ioctl() function + * + * @return A call to #os_dev_ioctl_return() + */ +#define OS_DEV_IOCTL(function_name) + +/*! + * Define a function which will handle a user's read() request + * + * @param function_name The name of the driver read() function + * + * @return A call to #os_dev_read_return() + */ +#define OS_DEV_READ(function_name) + +/*! + * Define a function which will handle a user's write() request + * + * @param function_name The name of the driver write() function + * + * @return A call to #os_dev_write_return() + */ +#define OS_DEV_WRITE(function_name) + +/*! + * Define a function which will handle a user's mmap() request + * + * The mmap() function requests the driver to map some memory into user space. + * + * @todo Determine what support functions are needed for mmap() handling. + * + * @param function_name The name of the driver mmap() function + * + * @return A call to #os_dev_mmap_return() + */ +#define OS_DEV_MMAP(function_name) + +/*! + * Define a function which will close the device - opposite of OS_DEV_OPEN() + * + * @param function_name The name of the driver close() function + * + * @return A call to #os_dev_close_return() + */ +#define OS_DEV_CLOSE(function_name) + +/*! + * Define a function which will handle an interrupt + * + * No arguments are available to the generic function. It must not invoke any + * OS functions which are illegal in a ISR. It gets no parameters, and must + * have a call to #os_dev_isr_return() instead of any/all return statements. + * + * Example: + * @code + * OS_DEV_ISR(widget, widget_isr, WIDGET_IRQ_NUMBER) + * { + * os_dev_isr_return(1); + * } + * @endcode + * + * @param function_name The name of the driver ISR function + * + * @return A call to #os_dev_isr_return() + */ +#define OS_DEV_ISR(function_name) + +/*! + * Define a function which will operate as a background task / bottom half. + * + * The function implementation must be structured in the following manner: + * @code + * OS_DEV_TASK(widget_task) + * { + * OS_DEV_TASK_SETUP(widget_task); + * + * while OS_DEV_TASK_CONDITION(widget_task) } + * + * }; + * } + * @endcode + * + * @todo In some systems the OS_DEV_TASK_CONDITION() will be an action which + * will cause the task to sleep on some event triggered by os_run_task(). In + * others, the macro will reference a variable laid down by + * OS_DEV_TASK_SETUP() to make sure that the loop is only performed once. + * + * @param function_name The name of this background task function + */ +#define OS_DEV_TASK(function_name) + + /*! @} *//* drsigs */ + +/*! @defgroup dclsigs Routines to declare Driver Signature routines + * + * These macros drop prototypes suitable for forward-declaration of + * @ref drsigs "function signatures". + */ + +/*! @addtogroup dclsigs */ +/*! @{ */ + +/*! + * Declare prototype for the device initialization function + * + * @param function_name The name of the portable initialization function. + */ +#define OS_DEV_INIT_DCL(function_name) + +/*! + * Declare prototype for the device shutdown function + * + * @param function_name The name of the portable driver shutdown routine. + * + * @return A call to #os_dev_shutdown_return() + */ +#define OS_DEV_SHUTDOWN_DCL(function_name) + +/*! + * Declare prototype for the open() function. + * + * @param function_name The name of the driver open() function + * + * @return A call to #os_dev_open_return() + */ +#define OS_DEV_OPEN_DCL(function_name) + +/*! + * Declare prototype for the user's ioctl() request function + * + * @param function_name The name of the driver ioctl() function + * + * @return A call to #os_dev_ioctl_return() + */ +#define OS_DEV_IOCTL_DCL(function_name) + +/*! + * Declare prototype for the function a user's read() request + * + * @param function_name The name of the driver read() function + */ +#define OS_DEV_READ_DCL(function_name) + +/*! + * Declare prototype for the user's write() request function + * + * @param function_name The name of the driver write() function + */ +#define OS_DEV_WRITE_DCL(function_name) + +/*! + * Declare prototype for the user's mmap() request function + * + * @param function_name The name of the driver mmap() function + */ +#define OS_DEV_MMAP_DCL(function_name) + +/*! + * Declare prototype for the close function + * + * @param function_name The name of the driver close() function + * + * @return A call to #os_dev_close_return() + */ +#define OS_DEV_CLOSE_DCL(function_name) + +/*! + * Declare prototype for the interrupt handling function + * + * @param function_name The name of the driver ISR function + */ +#define OS_DEV_ISR_DCL(function_name) + +/*! + * Declare prototype for a background task / bottom half function + * + * @param function_name The name of this background task function + */ +#define OS_DEV_TASK_DCL(function_name) + + /*! @} *//* dclsigs */ + +/***************************************************************************** + * Functions for Returning Values from Driver Signature routines + *****************************************************************************/ + +/*! + * @defgroup retfns Functions to Return Values from Driver Signature routines + */ + +/*! @addtogroup retfns */ +/*! @{ */ + +/*! + * Return from the #OS_DEV_INIT() function + * + * @param code An error code to report success or failure. + * + */ +void os_dev_init_return(os_error_code code); + +/*! + * Return from the #OS_DEV_SHUTDOWN() function + * + * @param code An error code to report success or failure. + * + */ +void os_dev_shutdown_return(os_error_code code); + +/*! + * Return from the #OS_DEV_ISR() function + * + * The function should verify that it really was supposed to be called, + * and that its device needed attention, in order to properly set the + * return code. + * + * @param code non-zero if interrupt handled, zero otherwise. + * + */ +void os_dev_isr_return(int code); + +/*! + * Return from the #OS_DEV_OPEN() function + * + * @param code An error code to report success or failure. + * + */ +void os_dev_open_return(os_error_code code); + +/*! + * Return from the #OS_DEV_IOCTL() function + * + * @param code An error code to report success or failure. + * + */ +void os_dev_ioctl_return(os_error_code code); + +/*! + * Return from the #OS_DEV_READ() function + * + * @param code Number of bytes read, or an error code to report failure. + * + */ +void os_dev_read_return(os_error_code code); + +/*! + * Return from the #OS_DEV_WRITE() function + * + * @param code Number of bytes written, or an error code to report failure. + * + */ +void os_dev_write_return(os_error_code code); + +/*! + * Return from the #OS_DEV_MMAP() function + * + * @param code Number of bytes written, or an error code to report failure. + * + */ +void os_dev_mmap_return(os_error_code code); + +/*! + * Return from the #OS_DEV_CLOSE() function + * + * @param code An error code to report success or failure. + * + */ +void os_dev_close_return(os_error_code code); + +/*! + * Start the #OS_DEV_TASK() function + * + * In some implementations, this could be turned into a label for + * the os_dev_task_return() call. + * + * For a more portable interface, should this take the sleep object as an + * argument??? + * + * @return none + */ +void os_dev_task_begin(void); + +/*! + * Return from the #OS_DEV_TASK() function + * + * In some implementations, this could be turned into a sleep followed + * by a jump back to the os_dev_task_begin() call. + * + * @param code An error code to report success or failure. + * + */ +void os_dev_task_return(os_error_code code); + + /*! @} *//* retfns */ + +/***************************************************************************** + * Functions/Macros for accessing arguments from Driver Signature routines + *****************************************************************************/ + +/*! @defgroup drsigargs Functions for Getting Arguments in Signature functions + * + */ +/* @addtogroup @drsigargs */ +/*! @{ */ + +/*! + * Check whether user is requesting read (permission) on the file/device. + * Usable in #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() + * and #OS_DEV_WRITE() routines. + */ +int os_dev_is_flag_read(void); + +/*! + * Check whether user is requesting write (permission) on the file/device. + * Usable in #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() + * and #OS_DEV_WRITE() routines. + */ +int os_dev_is_flag_write(void); + +/*! + * Check whether user is requesting non-blocking I/O. Usable in + * #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() and + * #OS_DEV_WRITE() routines. + * + * @todo Specify required behavior when nonblock is requested and (sufficient?) + * data are not available to fulfill the request. + * + */ +int os_dev_is_flag_nonblock(void); + +/*! + * Determine which major device is being accessed. Usable in #OS_DEV_OPEN() + * and #OS_DEV_CLOSE(). + */ +int os_dev_get_major(void); + +/*! + * Determine which minor device is being accessed. Usable in #OS_DEV_OPEN() + * and #OS_DEV_CLOSE(). + */ +int os_dev_get_minor(void); + +/*! + * Determine which operation the user wants performed. Usable in + * #OS_DEV_IOCTL(). + * + * @return Value of the operation. + * + * @todo Define some generic way to define the individual operations. + */ +unsigned os_dev_get_ioctl_op(void); + +/*! + * Retrieve the associated argument for the desired operation. Usable in + * #OS_DEV_IOCTL(). + * + * @return A value which can be cast to a struct pointer or used as + * int/long. + */ +os_dev_ioctl_arg_t os_dev_get_ioctl_arg(void); + +/*! + * Determine the requested byte count. This should be the size of buffer at + * #os_dev_get_user_buffer(). Usable in OS_DEV_READ() and OS_DEV_WRITE() + * routines. + * + * @return A count of bytes + */ +unsigned os_dev_get_count(void); + +/*! + * Get the pointer to the user's data buffer. Usable in OS_DEV_READ(), + * OS_DEV_WRITE(), and OS_DEV_MMAP() routines. + * + * @return Pointer to user buffer (in user space). See #os_copy_to_user() + * and #os_copy_from_user(). + */ +void *os_dev_get_user_buffer(void); + +/*! + * Get the POSIX flags field for the associated open file. Usable in + * OS_DEV_READ(), OS_DEV_WRITE(), and OS_DEV_IOCTL() routines. + * + * @return The flags associated with the file. + */ +unsigned os_dev_get_file_flags(void); + +/*! + * Set the driver's private structure associated with this file/open. + * + * Generally used during #OS_DEV_OPEN(). May also be used during + * #OS_DEV_READ(), #OS_DEV_WRITE(), #OS_DEV_IOCTL(), #OS_DEV_MMAP(), and + * #OS_DEV_CLOSE(). See also #os_dev_get_user_private(). + * + * @param struct_p The driver data structure to associate with this user. + */ +void os_dev_set_user_private(void *struct_p); + +/*! + * Get the driver's private structure associated with this file. + * + * May be used during #OS_DEV_OPEN(), #OS_DEV_READ(), #OS_DEV_WRITE(), + * #OS_DEV_IOCTL(), #OS_DEV_MMAP(), and #OS_DEV_CLOSE(). See + * also #os_dev_set_user_private(). + * + * @return The driver data structure to associate with this user. + */ +void *os_dev_get_user_private(void); + +/*! + * Get the IRQ associated with this call to the #OS_DEV_ISR() function. + * + * @return The IRQ (integer) interrupt number. + */ +int os_dev_get_irq(void); + + /*! @} *//* drsigargs */ + +/***************************************************************************** + * Functions for Generating References to Driver Routines + *****************************************************************************/ + +/*! + * @defgroup drref Functions for Generating References to Driver Routines + * + * These functions will most likely be implemented as macros. They are a + * necessary part of the portable API to guarantee portability. The @c symbol + * type in here is the same symbol passed to the associated + * signature-generating macro. + * + * These macros must be used whenever referring to a + * @ref drsigs "driver signature function", for instance when storing or + * passing a pointer to the function. + */ + +/*! @addtogroup drref */ +/*! @{ */ + +/*! + * Generate a reference to an #OS_DEV_INIT() function + * + * @param function_name The name of the init function being referenced. + * + * @return A reference to the function + */ +os_init_function_t OS_DEV_INIT_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_SHUTDOWN() function + * + * @param function_name The name of the shutdown function being referenced. + * + * @return A reference to the function + */ +os_shutdown_function_t OS_DEV_SHUTDOWN_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_OPEN() function + * + * @param function_name The name of the open function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_OPEN_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_CLOSE() function + * + * @param function_name The name of the close function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_CLOSE_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_READ() function + * + * @param function_name The name of the read function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_READ_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_WRITE() function + * + * @param function_name The name of the write function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_WRITE_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_IOCTL() function + * + * @param function_name The name of the ioctl function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_IOCTL_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_MMAP() function + * + * @param function_name The name of the mmap function being referenced. + * + * @return A reference to the function + */ +os_user_function_t OS_DEV_MMAP_REF(symbol function_name); + +/*! + * Generate a reference to an #OS_DEV_ISR() function + * + * @param function_name The name of the isr being referenced. + * + * @return a reference to the function + */ +os_interrupt_handler_t OS_DEV_ISR_REF(symbol function_name); + + /*! @} *//* drref */ + +/*! + * Flush and invalidate all cache lines. + */ +void os_flush_cache_all(void); + +/*! + * Flush a range of addresses from the cache + * + * @param start Starting virtual address + * @param len Number of bytes to flush + */ +void os_cache_flush_range(void *start, uint32_t len); + +/*! + * Invalidate a range of addresses in the cache + * + * @param start Starting virtual address + * @param len Number of bytes to flush + */ +void os_cache_inv_range(void *start, uint32_t len); + +/*! + * Clean a range of addresses from the cache + * + * @param start Starting virtual address + * @param len Number of bytes to flush + */ +void os_cache_clean_range(void *start, uint32_t len); + +/*! + * @example widget.h + */ + +/*! + * @example widget.c + */ + +/*! + * @example rng_driver.h + */ + +/*! + * @example rng_driver.c + */ + +/*! + * @example shw_driver.h + */ + +/*! + * @example shw_driver.c + */ + +#endif /* DOXYGEN_PORTABLE_OS_DOC */ + +#endif /* PORTABLE_OS_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/linux_port.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/linux_port.h @@ -0,0 +1,1806 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file linux_port.h + * + * OS_PORT ported to Linux (2.6.9+ for now) + * + */ + + /*! + * @if USE_MAINPAGE + * @mainpage ==Linux version of== Generic OS API for STC Drivers + * @endif + * + * @section intro_sec Introduction + * + * This API / kernel programming environment blah blah. + * + * See @ref dkops "Driver-to-Kernel Operations" as a good place to start. + */ + +#ifndef LINUX_PORT_H +#define LINUX_PORT_H + +#define PORTABLE_OS_VERSION 101 + +/* Linux Kernel Includes */ +#include /* Current version Linux kernel */ + +#if defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +#include +#endif +#define MODVERSIONS +#endif +/*! + * __NO_VERSION__ defined due to Kernel module possibly spanning multiple + * files. + */ +#define __NO_VERSION__ + +#include /* Basic support for loadable modules, + printk */ +#include /* module_init, module_exit */ +#include /* General kernel system calls */ +#include /* for interrupt.h */ +#include /* for inode */ +#include +#include +#include +#include +#include /* kmalloc */ + +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +#include /* used in dynamic power management */ +#else +#include /* used in dynamic power management */ +#endif + +#include +#include + +#include /* clock en/disable for DPM */ + +#include +#include + +#include /* copy_to_user(), copy_from_user() */ +#include /* ioremap() */ +#include +#include + +#include + +#ifndef TRUE +/*! Useful symbol for unsigned values used as flags. */ +#define TRUE 1 +#endif + +#ifndef FALSE +/*! Useful symbol for unsigned values used as flags. */ +#define FALSE 0 +#endif + +/* These symbols are defined in Linux 2.6 and later. Include here for minimal + * support of 2.4 kernel. + **/ +#if !defined(LINUX_VERSION_CODE) || LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) +/*! + * Symbol defined somewhere in 2.5/2.6. It is the return signature of an ISR. + */ +#define irqreturn_t void +/*! Possible return value of 'modern' ISR routine. */ +#define IRQ_HANDLED +/*! Method of generating value of 'modern' ISR routine. */ +#define IRQ_RETVAL(x) +#endif + +/*! + * Type used for registering and deregistering interrupts. + */ +typedef int os_interrupt_id_t; + +/*! + * Type used as handle for a process + * + * See #os_get_process_handle() and #os_send_signal(). + */ +/* + * The following should be defined this way, but it gets compiler errors + * on the current tool chain. + * + * typedef task_t *os_process_handle_t; + */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +typedef task_t *os_process_handle_t; +#else +typedef struct task_struct *os_process_handle_t; +#endif + +/*! + * Generic return code for functions which need such a thing. + * + * No knowledge should be assumed of the value of any of these symbols except + * that @c OS_ERROR_OK_S is guaranteed to be zero. + */ +typedef enum { + OS_ERROR_OK_S = 0, /*!< Success */ + OS_ERROR_FAIL_S = -EIO, /*!< Generic driver failure */ + OS_ERROR_NO_MEMORY_S = -ENOMEM, /*!< Failure to acquire/use memory */ + OS_ERROR_BAD_ADDRESS_S = -EFAULT, /*!< Bad address */ + OS_ERROR_BAD_ARG_S = -EINVAL, /*!< Bad input argument */ +} os_error_code; + +/*! + * Handle to a lock. + */ +#ifdef CONFIG_PREEMPT_RT +typedef raw_spinlock_t *os_lock_t; +#else +typedef spinlock_t *os_lock_t; +#endif + +/*! + * Context while locking. + */ +typedef unsigned long os_lock_context_t; + +/*! + * Declare a wait object for sleeping/waking processes. + */ +#define OS_WAIT_OBJECT(name) \ + DECLARE_WAIT_QUEUE_HEAD(name##_qh) + +/*! + * Driver registration handle + * + * Used with #os_driver_init_registration(), #os_driver_add_registration(), + * and #os_driver_complete_registration(). + */ +typedef struct { + unsigned reg_complete; /*!< TRUE if next inits succeeded. */ + dev_t dev; /*!< dev_t for register_chrdev() */ + struct file_operations fops; /*!< struct for register_chrdev() */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) + struct class_simple *cs; /*!< results of class_simple_create() */ +#else + struct class *cs; /*!< results of class_create() */ +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) + struct class_device *cd; /*!< Result of class_device_create() */ +#else + struct device *cd; /*!< Result of device_create() */ +#endif + unsigned power_complete; /*!< TRUE if next inits succeeded */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + struct device_driver dd; /*!< struct for register_driver() */ +#else + struct platform_driver dd; /*!< struct for register_driver() */ +#endif + struct platform_device pd; /*!< struct for platform_register_device() */ +} os_driver_reg_t; + +/* + * Function types which can be associated with driver entry points. + * + * Note that init and shutdown are absent. + */ +/*! @{ */ +/*! Keyword for registering open() operation handler. */ +#define OS_FN_OPEN open +/*! Keyword for registering close() operation handler. */ +#define OS_FN_CLOSE release +/*! Keyword for registering read() operation handler. */ +#define OS_FN_READ read +/*! Keyword for registering write() operation handler. */ +#define OS_FN_WRITE write +/*! Keyword for registering ioctl() operation handler. */ +#define OS_FN_IOCTL ioctl +/*! Keyword for registering mmap() operation handler. */ +#define OS_FN_MMAP mmap +/*! @} */ + +/*! + * Function signature for the portable interrupt handler + * + * While it would be nice to know which interrupt is being serviced, the + * Least Common Denominator rule says that no arguments get passed in. + * + * @return Zero if not handled, non-zero if handled. + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +typedef int (*os_interrupt_handler_t) (int, void *, struct pt_regs *); +#else +typedef int (*os_interrupt_handler_t) (int, void *); +#endif + +/*! + * @defgroup dkops Driver-to-Kernel Operations + * + * These are the operations which drivers should call to get the OS to perform + * services. + */ + +/*! @addtogroup dkops */ +/*! @{ */ + +/*! + * Register an interrupt handler. + * + * @param driver_name The name of the driver + * @param interrupt_id The interrupt line to monitor (type + * #os_interrupt_id_t) + * @param function The function to be called to handle an interrupt + * + * @return #os_error_code + */ +#define os_register_interrupt(driver_name, interrupt_id, function) \ + request_irq(interrupt_id, function, 0, driver_name, NULL) + +/*! + * Deregister an interrupt handler. + * + * @param interrupt_id The interrupt line to stop monitoring + * + * @return #os_error_code + */ +#define os_deregister_interrupt(interrupt_id) \ + free_irq(interrupt_id, NULL) + +/*! + * INTERNAL implementation of os_driver_init_registration() + * + * @return An os error code. + */ +inline static int os_drv_do_init_reg(os_driver_reg_t * handle) +{ + memset(handle, 0, sizeof(*handle)); + handle->fops.owner = THIS_MODULE; + handle->power_complete = FALSE; + handle->reg_complete = FALSE; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + handle->dd.name = NULL; +#else + handle->dd.driver.name = NULL; +#endif + + return OS_ERROR_OK_S; +} + +/*! + * Initialize driver registration. + * + * If the driver handles open(), close(), ioctl(), read(), write(), or mmap() + * calls, then it needs to register their location with the kernel so that they + * get associated with the device. + * + * @param handle The handle object to be used with this registration. The + * object must live (be in memory somewhere) at least until + * os_driver_remove_registration() is called. + * + * @return A handle for further driver registration, or NULL if failed. + */ +#define os_driver_init_registration(handle) \ + os_drv_do_init_reg(&handle) + +/*! + * Add a function registration to driver registration. + * + * @param handle A handle initialized by #os_driver_init_registration(). + * @param name Which function is being supported. + * @param function The result of a call to a @c _REF version of one of the + * driver function signature macros + * @return void + */ +#define os_driver_add_registration(handle, name, function) \ + do {handle.fops.name = (void*)(function); } while (0) + +/*! + * Record 'power suspend' function for the device. + * + * @param handle A handle initialized by #os_driver_init_registration(). + * @param function Name of function to call on power suspend request + * + * Status: Provisional + * + * @return void + */ +#define os_driver_register_power_suspend(handle, function) \ + handle.dd.suspend = function + +/*! + * Record 'power resume' function for the device. + * + * @param handle A handle initialized by #os_driver_init_registration(). + * @param function Name of function to call on power resume request + * + * Status: Provisional + * + * @return void + */ +#define os_driver_register_resume(handle, function) \ + handle.dd.resume = function + +/*! + * INTERNAL function of the Linux port of the OS API. Implements the + * os_driver_complete_registration() function. + * + * @param handle The handle used with #os_driver_init_registration(). + * @param major The major device number to be associated with the driver. + * If this value is zero, a major number may be assigned. + * See #os_driver_get_major() to determine final value. + * #os_driver_remove_registration(). + * @param driver_name The driver name. Can be used as part of 'device node' + * name on platforms which support such a feature. + * + * @return An error code + */ +inline static int os_drv_do_reg(os_driver_reg_t * handle, + unsigned major, char *driver_name) +{ + os_error_code code = OS_ERROR_NO_MEMORY_S; + char *name = kmalloc(strlen(driver_name) + 1, 0); + + if (name != NULL) { + memcpy(name, driver_name, strlen(driver_name) + 1); + code = OS_ERROR_OK_S; /* OK so far */ + /* If any chardev/POSIX routines were added, then do chrdev part */ + if (handle->fops.open || handle->fops.release + || handle->fops.read || handle->fops.write + || handle->fops.ioctl || handle->fops.mmap) { + + printk("ioctl pointer: %p. mmap pointer: %p\n", + handle->fops.ioctl, handle->fops.mmap); + + /* this method is depricated, see: + * http://lwn.net/Articles/126808/ + */ + code = + register_chrdev(major, driver_name, &handle->fops); + + /* instead something like this: */ +#if 0 + handle->dev = MKDEV(major, 0); + code = + register_chrdev_region(handle->dev, 1, driver_name); + if (code < 0) { + code = OS_ERROR_FAIL_S; + } else { + cdev_init(&handle->cdev, &handle->fops); + code = cdev_add(&handle->cdev, major, 1); + } +#endif + + if (code < 0) { + code = OS_ERROR_FAIL_S; + } else { + if (code != 0) { + /* Zero was passed in for major; code is actual value */ + handle->dev = MKDEV(code, 0); + } else { + handle->dev = MKDEV(major, 0); + } + code = OS_ERROR_OK_S; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) + handle->cs = + class_simple_create(THIS_MODULE, + driver_name); + if (IS_ERR(handle->cs)) { + code = (os_error_code) handle->cs; + handle->cs = NULL; + } else { + handle->cd = + class_simple_device_add(handle->cs, + handle->dev, + NULL, + driver_name); + if (IS_ERR(handle->cd)) { + class_simple_device_remove + (handle->dev); + unregister_chrdev(MAJOR + (handle->dev), + driver_name); + code = + (os_error_code) handle->cs; + handle->cs = NULL; + } else { + handle->reg_complete = TRUE; + } + } +#else + handle->cs = + class_create(THIS_MODULE, driver_name); + if (IS_ERR(handle->cs)) { + code = (os_error_code) handle->cs; + handle->cs = NULL; + } else { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) + handle->cd = + class_device_create(handle->cs, + NULL, + handle->dev, + NULL, + driver_name); +#else + handle->cd = + device_create(handle->cs, NULL, + handle->dev, NULL, + driver_name); +#endif + if (IS_ERR(handle->cd)) { + class_destroy(handle->cs); + unregister_chrdev(MAJOR + (handle->dev), + driver_name); + code = + (os_error_code) handle->cs; + handle->cs = NULL; + } else { + handle->reg_complete = TRUE; + } + } +#endif + } + } + /* ... fops routine registered */ + /* Handle power management fns through separate interface */ + if ((code == OS_ERROR_OK_S) && + (handle->dd.suspend || handle->dd.resume)) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + handle->dd.name = name; + handle->dd.bus = &platform_bus_type; + code = driver_register(&handle->dd); +#else + handle->dd.driver.name = name; + handle->dd.driver.bus = &platform_bus_type; + code = driver_register(&handle->dd.driver); +#endif + if (code == OS_ERROR_OK_S) { + handle->pd.name = name; + handle->pd.id = 0; + code = platform_device_register(&handle->pd); + if (code != OS_ERROR_OK_S) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + driver_unregister(&handle->dd); +#else + driver_unregister(&handle->dd.driver); +#endif + } else { + handle->power_complete = TRUE; + } + } + } /* ... suspend or resume */ + } /* name != NULL */ + return code; +} + +/*! + * Finalize the driver registration with the kernel. + * + * Upon return from this call, the driver may begin receiving calls at the + * defined entry points. + * + * @param handle The handle used with #os_driver_init_registration(). + * @param major The major device number to be associated with the driver. + * If this value is zero, a major number may be assigned. + * See #os_driver_get_major() to determine final value. + * #os_driver_remove_registration(). + * @param driver_name The driver name. Can be used as part of 'device node' + * name on platforms which support such a feature. + * + * @return An error code + */ +#define os_driver_complete_registration(handle, major, driver_name) \ + os_drv_do_reg(&handle, major, driver_name) + +/*! + * Get driver Major Number from handle after a successful registration. + * + * @param handle A handle which has completed registration. + * + * @return The major number (if any) associated with the handle. + */ +#define os_driver_get_major(handle) \ + (handle.reg_complete ? MAJOR(handle.dev) : -1) + +/*! + * INTERNAL implemention of os_driver_remove_registration. + * + * @param handle A handle initialized by #os_driver_init_registration(). + * + * @return An error code. + */ +inline static int os_drv_rmv_reg(os_driver_reg_t * handle) +{ + if (handle->reg_complete) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) + if (handle->cd != NULL) { + class_simple_device_remove(handle->dev); + handle->cd = NULL; + } + if (handle->cs != NULL) { + class_simple_destroy(handle->cs); + handle->cs = NULL; + } + unregister_chrdev(MAJOR(handle->dev), handle->dd.name); +#else + if (handle->cd != NULL) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) + class_device_destroy(handle->cs, handle->dev); +#else + device_destroy(handle->cs, handle->dev); +#endif + handle->cd = NULL; + } + if (handle->cs != NULL) { + class_destroy(handle->cs); + handle->cs = NULL; + } + unregister_chrdev(MAJOR(handle->dev), handle->dd.driver.name); +#endif + handle->reg_complete = FALSE; + } + if (handle->power_complete) { + platform_device_unregister(&handle->pd); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + driver_unregister(&handle->dd); +#else + driver_unregister(&handle->dd.driver); +#endif + handle->power_complete = FALSE; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + if (handle->dd.name != NULL) { + kfree(handle->dd.name); + handle->dd.name = NULL; + } +#else + if (handle->dd.driver.name != NULL) { + kfree(handle->dd.driver.name); + handle->dd.driver.name = NULL; + } +#endif + return OS_ERROR_OK_S; +} + +/*! + * Remove the driver's registration with the kernel. + * + * Upon return from this call, the driver not receive any more calls at the + * defined entry points (other than ISR and shutdown). + * + * @param handle A handle initialized by #os_driver_init_registration(). + * + * @return An error code. + */ +#define os_driver_remove_registration(handle) \ + os_drv_rmv_reg(&handle) + +/*! + * Register a driver with the Linux Device Model. + * + * @param driver_information The device_driver structure information + * + * @return An error code. + * + * Status: denigrated in favor of #os_driver_complete_registration() + */ +#define os_register_to_driver(driver_information) \ + driver_register(driver_information) + +/*! + * Unregister a driver from the Linux Device Model + * + * this routine unregisters from the Linux Device Model + * + * @param driver_information The device_driver structure information + * + * @return An error code. + * + * Status: Denigrated. See #os_register_to_driver(). + */ +#define os_unregister_from_driver(driver_information) \ + driver_unregister(driver_information) + +/*! + * register a device to a driver + * + * this routine registers a drivers devices to the Linux Device Model + * + * @param device_information The platform_device structure information + * + * @return An error code. + * + * Status: denigrated in favor of #os_driver_complete_registration() + */ +#define os_register_a_device(device_information) \ + platform_device_register(device_information) + +/*! + * unregister a device from a driver + * + * this routine unregisters a drivers devices from the Linux Device Model + * + * @param device_information The platform_device structure information + * + * @return An error code. + * + * Status: Denigrated. See #os_register_a_device(). + */ +#define os_unregister_a_device(device_information) \ + platform_device_unregister(device_information) + +/*! + * Print a message to console / into log file. After the @c msg argument a + * number of printf-style arguments may be added. Types should be limited to + * printf string, char, octal, decimal, and hexadecimal types. (This excludes + * pointers, and floating point). + * + * @param msg The main text of the message to be logged + * @param s The printf-style arguments which go with msg, if any + * + * @return (void) + */ +#define os_printk(...) \ + (void) printk(__VA_ARGS__) + +/*! + * Prepare a task to execute the given function. This should only be done once + * per function,, during the driver's initialization routine. + * + * @param task_fn Name of the OS_DEV_TASK() function to be created. + * + * @return an OS ERROR code. + */ +#define os_create_task(function_name) \ + OS_ERROR_OK_S + +/*! + * Schedule execution of a task. + * + * @param function_name The function associated with the task. + * + * @return (void) + */ +#define os_dev_schedule_task(function_name) \ + tasklet_schedule(&(function_name ## let)) + +/*! + * Make sure that task is no longer running and will no longer run. + * + * This function will not return until both are true. This is useful when + * shutting down a driver. + */ +#define os_dev_stop_task(function_name) \ +do { \ + tasklet_disable(&(function_name ## let)); \ + tasklet_kill(&(function_name ## let)); \ +} while (0) + +/*! + * Allocate some kernel memory + * + * @param amount Number of 8-bit bytes to allocate + * @param flags Some indication of purpose of memory (needs definition) + * + * @return Pointer to allocated memory, or NULL if failed. + */ +#define os_alloc_memory(amount, flags) \ + (void*)kmalloc(amount, flags) + +/*! + * Free some kernel memory + * + * @param location The beginning of the region to be freed. + * + * Do some OSes have separate free() functions which should be + * distinguished by passing in @c flags here, too? Don't some also require the + * size of the buffer being freed? + */ +#define os_free_memory(location) \ + kfree(location) + +/*! + * Allocate cache-coherent memory + * + * @param amount Number of bytes to allocate + * @param[out] dma_addrp Location to store physical address of allocated + * memory. + * @param flags Some indication of purpose of memory (needs + * definition). + * + * @return (virtual space) pointer to allocated memory, or NULL if failed. + * + */ +#define os_alloc_coherent(amount, dma_addrp, flags) \ + (void*)dma_alloc_coherent(NULL, amount, dma_addrp, flags) + +/*! + * Free cache-coherent memory + * + * @param size Number of bytes which were allocated. + * @param virt_addr Virtual(kernel) address of memory.to be freed, as + * returned by #os_alloc_coherent(). + * @param dma_addr Physical address of memory.to be freed, as returned + * by #os_alloc_coherent(). + * + * @return void + * + */ +#define os_free_coherent(size, virt_addr, dma_addr) \ + dma_free_coherent(NULL, size, virt_addr, dma_addr + +/*! + * Map an I/O space into kernel memory space + * + * @param start The starting address of the (physical / io space) region + * @param range_bytes The number of bytes to map + * + * @return A pointer to the mapped area, or NULL on failure + */ +#define os_map_device(start, range_bytes) \ + (void*)ioremap_nocache((start), range_bytes) + +/*! + * Unmap an I/O space from kernel memory space + * + * @param start The starting address of the (virtual) region + * @param range_bytes The number of bytes to unmap + * + * @return None + */ +#define os_unmap_device(start, range_bytes) \ + iounmap((void*)(start)) + +/*! + * Copy data from Kernel space to User space + * + * @param to The target location in user memory + * @param from The source location in kernel memory + * @param size The number of bytes to be copied + * + * @return #os_error_code + */ +#define os_copy_to_user(to, from, size) \ + ((copy_to_user(to, from, size) == 0) ? 0 : OS_ERROR_BAD_ADDRESS_S) + +/*! + * Copy data from User space to Kernel space + * + * @param to The target location in kernel memory + * @param from The source location in user memory + * @param size The number of bytes to be copied + * + * @return #os_error_code + */ +#define os_copy_from_user(to, from, size) \ + ((copy_from_user(to, from, size) == 0) ? 0 : OS_ERROR_BAD_ADDRESS_S) + +/*! + * Read a 8-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +#define os_read8(register_address) \ + __raw_readb(register_address) + +/*! + * Write a 8-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +#define os_write8(register_address, value) \ + __raw_writeb(value, register_address) + +/*! + * Read a 16-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +#define os_read16(register_address) \ + __raw_readw(register_address) + +/*! + * Write a 16-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +#define os_write16(register_address, value) \ + __raw_writew(value, (uint32_t*)(register_address)) + +/*! + * Read a 32-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +#define os_read32(register_address) \ + __raw_readl((uint32_t*)(register_address)) + +/*! + * Write a 32-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +#define os_write32(register_address, value) \ + __raw_writel(value, register_address) + +/*! + * Read a 64-bit device register + * + * @param register_address The (bus) address of the register to write to + * @return The value in the register + */ +#define os_read64(register_address) \ + ERROR_UNIMPLEMENTED + +/*! + * Write a 64-bit device register + * + * @param register_address The (bus) address of the register to write to + * @param value The value to write into the register + */ +#define os_write64(register_address, value) \ + ERROR_UNIMPLEMENTED + +/*! + * Delay some number of microseconds + * + * Note that this is a busy-loop, not a suspension of the task/process. + * + * @param msecs The number of microseconds to delay + * + * @return void + */ +#define os_mdelay mdelay + +/*! + * Calculate virtual address from physical address + * + * @param pa Physical address + * + * @return virtual address + * + * @note this assumes that addresses are 32 bits wide + */ +#define os_va __va + +/*! + * Calculate physical address from virtual address + * + * + * @param va Virtual address + * + * @return physical address + * + * @note this assumes that addresses are 32 bits wide + */ +#define os_pa __pa + +#ifdef CONFIG_PREEMPT_RT +/*! + * Allocate and initialize a lock, returning a lock handle. + * + * The lock state will be initialized to 'unlocked'. + * + * @return A lock handle, or NULL if an error occurred. + */ +inline static os_lock_t os_lock_alloc_init(void) +{ + raw_spinlock_t *lockp; + lockp = (raw_spinlock_t *) kmalloc(sizeof(raw_spinlock_t), 0); + if (lockp) { + _raw_spin_lock_init(lockp); + } else { + printk("OS: lock init failed\n"); + } + + return lockp; +} +#else +/*! + * Allocate and initialize a lock, returning a lock handle. + * + * The lock state will be initialized to 'unlocked'. + * + * @return A lock handle, or NULL if an error occurred. + */ +inline static os_lock_t os_lock_alloc_init(void) +{ + spinlock_t *lockp; + lockp = (spinlock_t *) kmalloc(sizeof(spinlock_t), 0); + if (lockp) { + spin_lock_init(lockp); + } else { + printk("OS: lock init failed\n"); + } + + return lockp; +} +#endif /* CONFIG_PREEMPT_RT */ + +/*! + * Acquire a lock. + * + * This function should only be called from an interrupt service routine. + * + * @param lock_handle A handle to the lock to acquire. + * + * @return void + */ +#define os_lock(lock_handle) \ + spin_lock(lock_handle) + +/*! + * Unlock a lock. Lock must have been acquired by #os_lock(). + * + * @param lock_handle A handle to the lock to unlock. + * + * @return void + */ +#define os_unlock(lock_handle) \ + spin_unlock(lock_handle) + +/*! + * Acquire a lock in non-ISR context + * + * This function will spin until the lock is available. + * + * @param lock_handle A handle of the lock to acquire. + * @param context Place to save the before-lock context + * + * @return void + */ +#define os_lock_save_context(lock_handle, context) \ + spin_lock_irqsave(lock_handle, context) + +/*! + * Release a lock in non-ISR context + * + * @param lock_handle A handle of the lock to release. + * @param context Place where before-lock context was saved. + * + * @return void + */ +#define os_unlock_restore_context(lock_handle, context) \ + spin_unlock_irqrestore(lock_handle, context) + +/*! + * Deallocate a lock handle. + * + * @param lock_handle An #os_lock_t that has been allocated. + * + * @return void + */ +#define os_lock_deallocate(lock_handle) \ + kfree(lock_handle) + +/*! + * Determine process handle + * + * The process handle of the current user is returned. + * + * @return A handle on the current process. + */ +#define os_get_process_handle() \ + current + +/*! + * Send a signal to a process + * + * @param proc A handle to the target process. + * @param sig The POSIX signal to send to that process. + */ +#define os_send_signal(proc, sig) \ + send_sig(sig, proc, 0); + +/*! + * Get some random bytes + * + * @param buf The location to store the random data. + * @param count The number of bytes to store. + * + * @return void + */ +#define os_get_random_bytes(buf, count) \ + get_random_bytes(buf, count) + +/*! + * Go to sleep on an object. + * + * @param object The object on which to sleep + * @param condition An expression to check for sleep completion. Must be + * coded so that it can be referenced more than once inside + * macro, i.e., no ++ or other modifying expressions. + * @param atomic Non-zero if sleep must not return until condition. + * + * @return error code -- OK or sleep interrupted?? + */ +#define os_sleep(object, condition, atomic) \ +({ \ + DEFINE_WAIT(_waitentry_); \ + os_error_code code = OS_ERROR_OK_S; \ + \ + while (!(condition)) { \ + prepare_to_wait(&(object##_qh), &_waitentry_, \ + atomic ? 0 : TASK_INTERRUPTIBLE); \ + if (!(condition)) { \ + schedule(); \ + } \ + \ + finish_wait(&(object##_qh), &_waitentry_); \ + \ + if (!atomic && signal_pending(current)) { \ + code = OS_ERROR_FAIL_S; /* NEED SOMETHING BETTER */ \ + break; \ + } \ + }; \ + \ + code; \ +}) + +/*! + * Wake up whatever is sleeping on sleep object + * + * @param object The object on which things might be sleeping + * + * @return none + */ +#define os_wake_sleepers(object) \ + wake_up_interruptible(&(object##_qh)); + + /*! @} *//* dkops */ + +/****************************************************************************** + * Function signature-generating macros + *****************************************************************************/ + +/*! + * @defgroup drsigs Driver Signatures + * + * These macros will define the entry point signatures for interrupt handlers; + * driver initialization and shutdown; device open/close; etc. + * + * There are two versions of each macro for a given Driver Entry Point. The + * first version is used to define a function and its implementation in the + * driver.c file, e.g. #OS_DEV_INIT(). + * + * The second form is used whenever a forward declaration (prototype) is + * needed. It has the letters @c _DCL appended to the name of the defintion + * function, and takes only the first two arguments (driver_name and + * function_name). These are not otherwise mentioned in this documenation. + * + * There is a third form used when a reference to a function is required, for + * instance when passing the routine as a pointer to a function. It has the + * letters @c _REF appended to it, and takes only the first two arguments + * (driver_name and function_name). These functions are not otherwise + * mentioned in this documentation. + * + * (Note that these two extra forms are required because of the + * possibility/likelihood of having a 'wrapper function' which invokes the + * generic function with expected arguments. An alternative would be to have a + * generic function which isn't able to get at any arguments directly, but + * would be equipped with macros which could get at information passed in. + * + * Example: + * + * (in a header file) + * @code + * OS_DEV_INIT_DCL(widget, widget_init); + * @endcode + * + * (in an implementation file) + * @code + * OS_DEV_INIT(widget, widget_init) + * { + * os_dev_init_return(TRUE); + * } + * @endcode + * + */ + +/*! @addtogroup drsigs */ +/*! @{ */ + +/*! + * Define a function which will handle device initialization + * + * This is tne driver initialization routine. This is normally where the + * part would be initialized; queues, locks, interrupts handlers defined; + * long-term dynamic memory allocated for driver use; etc. + * + * @param function_name The name of the portable initialization function. + * + * @return A call to #os_dev_init_return() + * + */ +#define OS_DEV_INIT(function_name) \ +module_init(function_name); \ +static int __init function_name (void) + +/*! Make declaration for driver init function. + * @param function_name foo + */ +#define OS_DEV_INIT_DCL(function_name) \ +static int __init function_name (void); + +/*! + * Generate a function reference to the driver's init function. + * @param function_name Name of the OS_DEV_INIT() function. + * + * @return A function pointer. + */ +#define OS_DEV_INIT_REF(function_name) \ +function_name + +/*! + * Define a function which will handle device shutdown + * + * This is the inverse of the #OS_DEV_INIT() routine. + * + * @param function_name The name of the portable driver shutdown routine. + * + * @return A call to #os_dev_shutdown_return() + * + */ +#define OS_DEV_SHUTDOWN(function_name) \ +module_exit(function_name); \ +static void function_name(void) + +/*! + * Generate a function reference to the driver's shutdown function. + * @param function_name Name of the OS_DEV_HUSTDOWN() function. + * + * @return A function pointer. + */ +#define OS_DEV_SHUTDOWN_DCL(function_name) \ +static void function_name(void); + +/*! + * Generate a reference to driver's shutdown function + * @param function_name Name of the OS_DEV_HUSTDOWN() function. +*/ + +#define OS_DEV_SHUTDOWN_REF(function_name) \ +function_name + +/*! + * Define a function which will open the device for a user. + * + * @param function_name The name of the driver open() function + * + * @return A call to #os_dev_open_return() + */ +#define OS_DEV_OPEN(function_name) \ +static int function_name(struct inode* inode_p_, struct file* file_p_) + +/*! + * Declare prototype for an open() function. + * + * @param function_name The name of the OS_DEV_OPEN() function. + */ +#define OS_DEV_OPEN_DCL(function_name) \ +OS_DEV_OPEN(function_name); + +/*! + * Generate a function reference to the driver's open() function. + * @param function_name Name of the OS_DEV_OPEN() function. + * + * @return A function pointer. + */ +#define OS_DEV_OPEN_REF(function_name) \ +function_name + +/*! + * Define a function which will handle a user's ioctl() request + * + * @param function_name The name of the driver ioctl() function + * + * @return A call to #os_dev_ioctl_return() + */ +#define OS_DEV_IOCTL(function_name) \ +static int function_name(struct inode* inode_p_, struct file* file_p_, \ + unsigned int cmd_, unsigned long data_) + +/*! Boo. */ +#define OS_DEV_IOCTL_DCL(function_name) \ +OS_DEV_IOCTL(function_name); + +/*! + * Generate a function reference to the driver's ioctl() function. + * @param function_name Name of the OS_DEV_IOCTL() function. + * + * @return A function pointer. + */ +#define OS_DEV_IOCTL_REF(function_name) \ +function_name + +/*! + * Define a function which will handle a user's mmap() request + * + * @param function_name The name of the driver mmap() function + * + * @return A call to #os_dev_ioctl_return() + */ +#define OS_DEV_MMAP(function_name) \ +int function_name(struct file* file_p_, struct vm_area_struct* vma_) + +#define OS_DEV_MMAP_DCL(function_name) \ +OS_DEV_MMAP(function_name); + +#define OS_DEV_MMAP_REF(function_name) \ +function_name + +/* Retrieve the context to the memory structure that is to be MMAPed */ +#define os_mmap_memory_ctx() (vma_) + +/* Determine the size of the requested MMAP region*/ +#define os_mmap_memory_size() (vma_->vm_end - vma_->vm_start) + +/* Determine the base address of the requested MMAP region*/ +#define os_mmap_user_base() (vma_->vm_start) + +/*! + * Declare prototype for an read() function. + * + * @param function_name The name of the driver read function. + */ +#define OS_DEV_READ_DCL(function_name) \ +OS_DEV_READ(function_name); + +/*! + * Generate a function reference to the driver's read() routine + * @param function_name Name of the OS_DEV_READ() function. + * + * @return A function pointer. + */ +#define OS_DEV_READ_REF(function_name) \ +function_name + +/*! + * Define a function which will handle a user's write() request + * + * @param function_name The name of the driver write() function + * + * @return A call to #os_dev_write_return() + */ +#define OS_DEV_WRITE(function_name) \ +static ssize_t function_name(struct file* file_p_, char* user_buffer_, \ + size_t count_bytes_, loff_t* file_position_) + +/*! + * Declare prototype for an write() function. + * + * @param function_name The name of the driver write function. + */ +#define OS_DEV_WRITE_DCL(function_name) \ +OS_DEV_WRITE(function_name); + +/*! + * Generate a function reference to the driver's write() routine + * @param function_name Name of the OS_DEV_WRITE() function. + * + * @return A function pointer. + */ +#define OS_DEV_WRITE_REF(function_name) \ +function_name + +/*! + * Define a function which will close the device - opposite of OS_DEV_OPEN() + * + * @param function_name The name of the driver close() function + * + * @return A call to #os_dev_close_return() + */ +#define OS_DEV_CLOSE(function_name) \ +static int function_name(struct inode* inode_p_, struct file* file_p_) + +/*! + * Declare prototype for an close() function + * + * @param function_name The name of the driver close() function. + */ +#define OS_DEV_CLOSE_DCL(function_name) \ +OS_DEV_CLOSE(function_name); + +/*! + * Generate a function reference to the driver's close function. + * @param function_name Name of the OS_DEV_CLOSE() function. + * + * @return A function pointer. + */ +#define OS_DEV_CLOSE_REF(function_name) \ +function_name + +/*! + * Define a function which will handle an interrupt + * + * No arguments are available to the generic function. It must not invoke any + * OS functions which are illegal in a ISR. It gets no parameters, and must + * have a call to #os_dev_isr_return() instead of any/all return statements. + * + * Example: + * @code + * OS_DEV_ISR(widget) + * { + * os_dev_isr_return(1); + * } + * @endcode + * + * @param function_name The name of the driver ISR function + * + * @return A call to #os_dev_isr_return() + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +#define OS_DEV_ISR(function_name) \ +static irqreturn_t function_name(int N1_, void* N2_, struct pt_regs* N3_) +#else +#define OS_DEV_ISR(function_name) \ +static irqreturn_t function_name(int N1_, void* N2_) +#endif + +/*! + * Declare prototype for an ISR function. + * + * @param function_name The name of the driver ISR function. + */ +#define OS_DEV_ISR_DCL(function_name) \ +OS_DEV_ISR(function_name); + +/*! + * Generate a function reference to the driver's interrupt service routine + * @param function_name Name of the OS_DEV_ISR() function. + * + * @return A function pointer. + */ +#define OS_DEV_ISR_REF(function_name) \ +function_name + +/*! + * Define a function which will operate as a background task / bottom half. + * + * Tasklet stuff isn't strictly limited to 'Device drivers', but leave it + * this namespace anyway. + * + * @param function_name The name of this background task function + * + * @return A call to #os_dev_task_return() + */ +#define OS_DEV_TASK(function_name) \ +static void function_name(unsigned long data_) + +/*! + * Declare prototype for a background task / bottom half function + * + * @param function_name The name of this background task function + */ +#define OS_DEV_TASK_DCL(function_name) \ +OS_DEV_TASK(function_name); \ +DECLARE_TASKLET(function_name ## let, function_name, 0); + +/*! + * Generate a reference to an #OS_DEV_TASK() function + * + * @param function_name The name of the task being referenced. + */ +#define OS_DEV_TASK_REF(function_name) \ + (function_name ## let) + + /*! @} *//* drsigs */ + +/***************************************************************************** + * Functions/Macros for returning values from Driver Signature routines + *****************************************************************************/ + +/*! + * Return from the #OS_DEV_INIT() function + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_init_return(code) \ + return code + +/*! + * Return from the #OS_DEV_SHUTDOWN() function + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_shutdown_return(code) \ + return + +/*! + * Return from the #OS_DEV_ISR() function + * + * The function should verify that it really was supposed to be called, + * and that its device needed attention, in order to properly set the + * return code. + * + * @param code non-zero if interrupt handled, zero otherwise. + * + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +#define os_dev_isr_return(code) \ +do { \ + /* Unused warnings */ \ + (void)N1_; \ + (void)N2_; \ + (void)N3_; \ + \ + return IRQ_RETVAL(code); \ +} while (0) +#else +#define os_dev_isr_return(code) \ +do { \ + /* Unused warnings */ \ + (void)N1_; \ + (void)N2_; \ + \ + return IRQ_RETVAL(code); \ +} while (0) +#endif + +/*! + * Return from the #OS_DEV_OPEN() function + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_open_return(code) \ +do { \ + int retcode = code; \ + \ + /* get rid of 'unused parameter' warnings */ \ + (void)inode_p_; \ + (void)file_p_; \ + \ + return retcode; \ +} while (0) + +/*! + * Return from the #OS_DEV_IOCTL() function + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_ioctl_return(code) \ +do { \ + int retcode = code; \ + \ + /* get rid of 'unused parameter' warnings */ \ + (void)inode_p_; \ + (void)file_p_; \ + (void)cmd_; \ + (void)data_; \ + \ + return retcode; \ +} while (0) + +/*! + * Return from the #OS_DEV_READ() function + * + * @param code Number of bytes read, or an error code to report failure. + * + */ +#define os_dev_read_return(code) \ +do { \ + ssize_t retcode = code; \ + \ + /* get rid of 'unused parameter' warnings */ \ + (void)file_p_; \ + (void)user_buffer_; \ + (void)count_bytes_; \ + (void)file_position_; \ + \ + return retcode; \ +} while (0) + +/*! + * Return from the #OS_DEV_WRITE() function + * + * @param code Number of bytes written, or an error code to report failure. + * + */ +#define os_dev_write_return(code) \ +do { \ + ssize_t retcode = code; \ + \ + /* get rid of 'unused parameter' warnings */ \ + (void)file_p_; \ + (void)user_buffer_; \ + (void)count_bytes_; \ + (void)file_position_; \ + \ + return retcode; \ +} while (0) + +/*! + * Return from the #OS_DEV_CLOSE() function + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_close_return(code) \ +do { \ + ssize_t retcode = code; \ + \ + /* get rid of 'unused parameter' warnings */ \ + (void)inode_p_; \ + (void)file_p_; \ + \ + return retcode; \ +} while (0) + +/*! + * Start the #OS_DEV_TASK() function + * + * In some implementations, this could be turned into a label for + * the os_dev_task_return() call. + * + * @return none + */ +#define os_dev_task_begin() + +/*! + * Return from the #OS_DEV_TASK() function + * + * In some implementations, this could be turned into a sleep followed + * by a jump back to the os_dev_task_begin() call. + * + * @param code An error code to report success or failure. + * + */ +#define os_dev_task_return(code) \ +do { \ + /* Unused warnings */ \ + (void)data_; \ + \ + return; \ +} while (0) + +/***************************************************************************** + * Functions/Macros for accessing arguments from Driver Signature routines + *****************************************************************************/ + +/*! @defgroup drsigargs Functions for Getting Arguments in Signature functions + * + */ +/* @addtogroup @drsigargs */ +/*! @{ */ +/*! + * Used in #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() and + * #OS_DEV_WRITE() routines to check whether user is requesting read + * (permission) + */ +#define os_dev_is_flag_read() \ + (file_p_->f_mode & FMODE_READ) + +/*! + * Used in #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() and + * #OS_DEV_WRITE() routines to check whether user is requesting write + * (permission) + */ +#define os_dev_is_flag_write() \ + (file_p_->f_mode & FMODE_WRITE) + +/*! + * Used in #OS_DEV_OPEN(), #OS_DEV_CLOSE(), #OS_DEV_IOCTL(), #OS_DEV_READ() and + * #OS_DEV_WRITE() routines to check whether user is requesting non-blocking + * I/O. + */ +#define os_dev_is_flag_nonblock() \ + (file_p_->f_flags & (O_NONBLOCK | O_NDELAY)) + +/*! + * Used in #OS_DEV_OPEN() and #OS_DEV_CLOSE() to determine major device being + * accessed. + */ +#define os_dev_get_major() \ + (imajor(inode_p_)) + +/*! + * Used in #OS_DEV_OPEN() and #OS_DEV_CLOSE() to determine minor device being + * accessed. + */ +#define os_dev_get_minor() \ + (iminor(inode_p_)) + +/*! + * Used in #OS_DEV_IOCTL() to determine which operation the user wants + * performed. + * + * @return Value of the operation. + */ +#define os_dev_get_ioctl_op() \ + (cmd_) + +/*! + * Used in #OS_DEV_IOCTL() to return the associated argument for the desired + * operation. + * + * @return A value which can be cast to a struct pointer or used as + * int/long. + */ +#define os_dev_get_ioctl_arg() \ + (data_) + +/*! + * Used in OS_DEV_READ() and OS_DEV_WRITE() routines to access the requested + * byte count. + * + * @return (unsigned) a count of bytes + */ +#define os_dev_get_count() \ + ((unsigned)count_bytes_) + +/*! + * Used in OS_DEV_READ() and OS_DEV_WRITE() routines to return the pointer + * byte count. + * + * @return char* pointer to user buffer + */ +#define os_dev_get_user_buffer() \ + ((void*)user_buffer_) + +/*! + * Used in OS_DEV_READ(), OS_DEV_WRITE(), and OS_DEV_IOCTL() routines to + * get the POSIX flags field for the associated open file). + * + * @return The flags associated with the file. + */ +#define os_dev_get_file_flags() \ + (file_p_->f_flags) + +/*! + * Set the driver's private structure associated with this file/open. + * + * Generally used during #OS_DEV_OPEN(). See #os_dev_get_user_private(). + * + * @param struct_p The driver data structure to associate with this user. + */ +#define os_dev_set_user_private(struct_p) \ + file_p_->private_data = (void*)(struct_p) + +/*! + * Get the driver's private structure associated with this file. + * + * May be used during #OS_DEV_OPEN(), #OS_DEV_READ(), #OS_DEV_WRITE(), + * #OS_DEV_IOCTL(), and #OS_DEV_CLOSE(). See #os_dev_set_user_private(). + * + * @return The driver data structure to associate with this user. + */ +#define os_dev_get_user_private() \ + ((void*)file_p_->private_data) + +/*! + * Get the IRQ associated with this call to the #OS_DEV_ISR() function. + * + * @return The IRQ (integer) interrupt number. + */ +#define os_dev_get_irq() \ + N1_ + + /*! @} *//* drsigargs */ + +/*! + * @defgroup cacheops Cache Operations + * + * These functions are for synchronizing processor cache with RAM. + */ +/*! @addtogroup cacheops */ +/*! @{ */ + +/*! + * Flush and invalidate all cache lines. + */ +#if 0 +#define os_flush_cache_all() \ + flush_cache_all() +#else +/* Call ARM fn directly, in case L2cache=on3 not set */ +#define os_flush_cache_all() \ + v6_flush_kern_cache_all_L2() + +/*! + * ARM-routine to flush all cache. Defined here, because it exists in no + * easy-access header file. ARM-11 with L210 cache only! + */ +extern void v6_flush_kern_cache_all_L2(void); +#endif + +/* + * These macros are using part of the Linux DMA API. They rely on the + * map function to do nothing more than the equivalent clean/inv/flush + * operation at the time of the mapping, and do nothing at an unmapping + * call, which the Sahara driver code will never invoke. + */ + +/*! + * Clean a range of addresses from the cache. That is, write updates back + * to (RAM, next layer). + * + * @param start Starting virtual address + * @param len Number of bytes to flush + * + * @return void + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) +#define os_cache_clean_range(start,len) \ + dma_map_single(NULL, (void*)start, len, DMA_TO_DEVICE) +#else +#define os_cache_clean_range(start,len) \ +{ \ + void *s = (void*)start; \ + void *e = s + len; \ + dmac_clean_range(s, e); \ + outer_clean_range(__pa(s), __pa(e)); \ +} +#endif + +/*! + * Invalidate a range of addresses in the cache + * + * @param start Starting virtual address + * @param len Number of bytes to flush + * + * @return void + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) +#define os_cache_inv_range(start,len) \ + dma_map_single(NULL, (void*)start, len, DMA_FROM_DEVICE) +#else +#define os_cache_inv_range(start,len) \ +{ \ + void *s = (void*)start; \ + void *e = s + len; \ + dmac_inv_range(s, e); \ + outer_inv_range(__pa(s), __pa(e)); \ +} +#endif + +/*! + * Flush a range of addresses from the cache. That is, perform clean + * and invalidate + * + * @param start Starting virtual address + * @param len Number of bytes to flush + * + * @return void + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) +#define os_cache_flush_range(start,len) \ + dma_map_single(NULL, (void*)start, len, DMA_BIDIRECTIONAL) +#else +#define os_cache_flush_range(start,len) \ +{ \ + void *s = (void*)start; \ + void *e = s + len; \ + dmac_flush_range(s, e); \ + outer_flush_range(__pa(s), __pa(e)); \ +} +#endif + + /*! @} *//* cacheops */ + +#endif /* LINUX_PORT_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sahara.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sahara.h @@ -0,0 +1,2265 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file sahara.h + * + * File which implements the FSL_SHW API when used on Sahara + */ +/*! + * @if USE_MAINPAGE + * @mainpage Sahara2 implemtation of FSL Security Hardware API + * @endif + * + */ + +#define _DIAG_DRV_IF +#define _DIAG_SECURITY_FUNC +#define _DIAG_ADAPTOR + +#ifndef SAHARA2_API_H +#define SAHARA2_API_H + +#ifdef DIAG_SECURITY_FUNC +#include +#endif /* DIAG_SECURITY_FUNC */ + +/* This is a Linux flag... ? */ +#ifndef __KERNEL__ +#include +#include +#include +#else +#include "portable_os.h" +#endif + +/* This definition may need a new name, and needs to go somewhere which + * can determine platform, kernel vs. user, os, etc. + */ +#define copy_bytes(out, in, len) memcpy(out, in, len) + +/* Does this belong here? */ +#ifndef SAHARA_DEVICE +#define SAHARA_DEVICE "/dev/sahara" +#endif + +/*! +******************************************************************************* +* @defgroup lnkflags Link Flags +* +* @brief Flags to show information about link data and link segments +* +******************************************************************************/ +/*! @addtogroup lnkflags + * @{ + */ + +/*! +******************************************************************************* +* This flag indicates that the data in a link is owned by the security +* function component and this memory will be freed by the security function +* component. To be used as part of the flag field of the sah_Link structure. +******************************************************************************/ +#define SAH_OWNS_LINK_DATA 0x01 + +/*! +******************************************************************************* +* The data in a link is not owned by the security function component and +* therefore it will not attempt to free this memory. To be used as part of the +* flag field of the sah_Link structure. +******************************************************************************/ +#define SAH_USES_LINK_DATA 0x02 + +/*! +******************************************************************************* +* The data in this link will change when the descriptor gets executed. +******************************************************************************/ +#define SAH_OUTPUT_LINK 0x04 + +/*! +******************************************************************************* +* The ptr and length in this link are really 'established key' info. They +* are to be converted to ptr/length before putting on request queue. +******************************************************************************/ +#define SAH_KEY_IS_HIDDEN 0x08 + +/*! +******************************************************************************* +* The link structure has been appended to the previous one by the driver. It +* needs to be removed before leaving the driver (and returning to API). +******************************************************************************/ +#define SAH_REWORKED_LINK 0x10 + +/*! +******************************************************************************* +* The length and data fields of this link contain the slot and user id +* used to access the SCC stored key +******************************************************************************/ +#define SAH_STORED_KEY_INFO 0x20 + +/*! +******************************************************************************* +* The Data field points to a physical address, and does not need to be +* processed by the driver. Honored only in Kernel API. +******************************************************************************/ +#define SAH_PREPHYS_DATA 0x40 + +/*! +******************************************************************************* +* The link was inserted during the Physicalise procedure. It is tagged so +* it can be removed during DePhysicalise, thereby returning to the caller an +* intact chain. +******************************************************************************/ +#define SAH_LINK_INSERTED_LINK 0x80 + +/*! +******************************************************************************* +* The Data field points to the location of the key, which is in a secure +* partition held by the user. The memory address needs to be converted to +* kernel space manually, by looking through the partitions that the user holds. +******************************************************************************/ +#define SAH_IN_USER_KEYSTORE 0x100 + +/*! +******************************************************************************* +* sah_Link_Flags +* +* Type to be used for flags associated with a Link in security function. +* These flags are used internally by the security function component only. +* +* Values defined at @ref lnkflags +* +* @brief typedef for flags field of sah_Link +******************************************************************************/ +typedef uint32_t sah_Link_Flags; + +/* +******************************************************************************* +* Security Parameters Related Structures +* +* All of structures associated with API parameters +* +******************************************************************************/ + +/* +******************************************************************************* +* Common Types +* +* All of structures used across several classes of crytography +******************************************************************************/ + +/*! +******************************************************************************* +* @brief Indefinite precision integer used for security operations on SAHARA +* accelerator. The data will always be in little Endian format. +******************************************************************************/ +typedef uint8_t *sah_Int; + +/*! +******************************************************************************* +* @brief Byte array used for block cipher and hash digest/MAC operations on +* SAHARA accelerator. The Endian format will be as specified by the function +* using the sah_Oct_Str. +******************************************************************************/ +typedef uint8_t *sah_Oct_Str; + +/*! + * A queue of descriptor heads -- used to hold requests waiting for user to + * pick up the results. */ +typedef struct sah_Queue { + int count; /*!< # entries in queue */ + struct sah_Head_Desc *head; /*!< first entry in queue */ + struct sah_Head_Desc *tail; /*!< last entry in queue */ +} sah_Queue; + +/****************************************************************************** + * Enumerations + *****************************************************************************/ +/*! + * Flags for the state of the User Context Object (#fsl_shw_uco_t). + */ +typedef enum fsl_shw_user_ctx_flags_t { + /*! + * API will block the caller until operation completes. The result will be + * available in the return code. If this is not set, user will have to get + * results using #fsl_shw_get_results(). + */ + FSL_UCO_BLOCKING_MODE = 0x01, + /*! + * User wants callback (at the function specified with + * #fsl_shw_uco_set_callback()) when the operation completes. This flag is + * valid only if #FSL_UCO_BLOCKING_MODE is not set. + */ + FSL_UCO_CALLBACK_MODE = 0x02, + /*! Do not free descriptor chain after driver (adaptor) finishes */ + FSL_UCO_SAVE_DESC_CHAIN = 0x04, + /*! + * User has made at least one request with callbacks requested, so API is + * ready to handle others. + */ + FSL_UCO_CALLBACK_SETUP_COMPLETE = 0x08, + /*! + * (virtual) pointer to descriptor chain is completely linked with physical + * (DMA) addresses, ready for the hardware. This flag should not be used + * by FSL SHW API programs. + */ + FSL_UCO_CHAIN_PREPHYSICALIZED = 0x10, + /*! + * The user has changed the context but the changes have not been copied to + * the kernel driver. + */ + FSL_UCO_CONTEXT_CHANGED = 0x20, + /*! Internal Use. This context belongs to a user-mode API user. */ + FSL_UCO_USERMODE_USER = 0x40, +} fsl_shw_user_ctx_flags_t; + +/*! + * Return code for FSL_SHW library. + * + * These codes may be returned from a function call. In non-blocking mode, + * they will appear as the status in a Result Object. + */ +typedef enum fsl_shw_return_t { + /*! + * No error. As a function return code in Non-blocking mode, this may + * simply mean that the operation was accepted for eventual execution. + */ + FSL_RETURN_OK_S = 0, + /*! Failure for non-specific reason. */ + FSL_RETURN_ERROR_S, + /*! + * Operation failed because some resource was not able to be allocated. + */ + FSL_RETURN_NO_RESOURCE_S, + /*! Crypto algorithm unrecognized or improper. */ + FSL_RETURN_BAD_ALGORITHM_S, + /*! Crypto mode unrecognized or improper. */ + FSL_RETURN_BAD_MODE_S, + /*! Flag setting unrecognized or inconsistent. */ + FSL_RETURN_BAD_FLAG_S, + /*! Improper or unsupported key length for algorithm. */ + FSL_RETURN_BAD_KEY_LENGTH_S, + /*! Improper parity in a (DES, TDES) key. */ + FSL_RETURN_BAD_KEY_PARITY_S, + /*! + * Improper or unsupported data length for algorithm or internal buffer. + */ + FSL_RETURN_BAD_DATA_LENGTH_S, + /*! Authentication / Integrity Check code check failed. */ + FSL_RETURN_AUTH_FAILED_S, + /*! A memory error occurred. */ + FSL_RETURN_MEMORY_ERROR_S, + /*! An error internal to the hardware occurred. */ + FSL_RETURN_INTERNAL_ERROR_S, + /*! ECC detected Point at Infinity */ + FSL_RETURN_POINT_AT_INFINITY_S, + /*! ECC detected No Point at Infinity */ + FSL_RETURN_POINT_NOT_AT_INFINITY_S, + /*! GCD is One */ + FSL_RETURN_GCD_IS_ONE_S, + /*! GCD is not One */ + FSL_RETURN_GCD_IS_NOT_ONE_S, + /*! Candidate is Prime */ + FSL_RETURN_PRIME_S, + /*! Candidate is not Prime */ + FSL_RETURN_NOT_PRIME_S, + /*! N register loaded improperly with even value */ + FSL_RETURN_EVEN_MODULUS_ERROR_S, + /*! Divisor is zero. */ + FSL_RETURN_DIVIDE_BY_ZERO_ERROR_S, + /*! Bad Exponent or Scalar value for Point Multiply */ + FSL_RETURN_BAD_EXPONENT_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_OSCILLATOR_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_STATISTICS_ERROR_S, +} fsl_shw_return_t; + +/*! + * Algorithm Identifier. + * + * Selection of algorithm will determine how large the block size of the + * algorithm is. Context size is the same length unless otherwise specified. + * Selection of algorithm also affects the allowable key length. + */ +typedef enum fsl_shw_key_alg_t { + /*! + * Key will be used to perform an HMAC. Key size is 1 to 64 octets. Block + * size is 64 octets. + */ + FSL_KEY_ALG_HMAC, + /*! + * Advanced Encryption Standard (Rijndael). Block size is 16 octets. Key + * size is 16 octets. (The single choice of key size is a Sahara platform + * limitation.) + */ + FSL_KEY_ALG_AES, + /*! + * Data Encryption Standard. Block size is 8 octets. Key size is 8 + * octets. + */ + FSL_KEY_ALG_DES, + /*! + * 2- or 3-key Triple DES. Block size is 8 octets. Key size is 16 octets + * for 2-key Triple DES, and 24 octets for 3-key. + */ + FSL_KEY_ALG_TDES, + /*! + * ARC4. No block size. Context size is 259 octets. Allowed key size is + * 1-16 octets. (The choices for key size are a Sahara platform + * limitation.) + */ + FSL_KEY_ALG_ARC4, + /*! + * Private key of a public-private key-pair. Max is 512 bits... + */ + FSL_KEY_PK_PRIVATE, +} fsl_shw_key_alg_t; + +/*! + * Mode selector for Symmetric Ciphers. + * + * The selection of mode determines how a cryptographic algorithm will be + * used to process the plaintext or ciphertext. + * + * For all modes which are run block-by-block (that is, all but + * #FSL_SYM_MODE_STREAM), any partial operations must be performed on a text + * length which is multiple of the block size. Except for #FSL_SYM_MODE_CTR, + * these block-by-block algorithms must also be passed a total number of octets + * which is a multiple of the block size. + * + * In modes which require that the total number of octets of data be a multiple + * of the block size (#FSL_SYM_MODE_ECB and #FSL_SYM_MODE_CBC), and the user + * has a total number of octets which are not a multiple of the block size, the + * user must perform any necessary padding to get to the correct data length. + */ +typedef enum fsl_shw_sym_mode_t { + /*! + * Stream. There is no associated block size. Any request to process data + * may be of any length. This mode is only for ARC4 operations, and is + * also the only mode used for ARC4. + */ + FSL_SYM_MODE_STREAM, + + /*! + * Electronic Codebook. Each block of data is encrypted/decrypted. The + * length of the data stream must be a multiple of the block size. This + * mode may be used for DES, 3DES, and AES. The block size is determined + * by the algorithm. + */ + FSL_SYM_MODE_ECB, + /*! + * Cipher-Block Chaining. Each block of data is encrypted/decrypted and + * then "chained" with the previous block by an XOR function. Requires + * context to start the XOR (previous block). This mode may be used for + * DES, 3DES, and AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CBC, + /*! + * Counter. The counter is encrypted, then XORed with a block of data. + * The counter is then incremented (using modulus arithmetic) for the next + * block. The final operation may be non-multiple of block size. This mode + * may be used for AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CTR, +} fsl_shw_sym_mode_t; + +/*! + * Algorithm selector for Cryptographic Hash functions. + * + * Selection of algorithm determines how large the context and digest will be. + * Context is the same size as the digest (resulting hash), unless otherwise + * specified. + */ +typedef enum fsl_shw_hash_alg_t { + /*! MD5 algorithm. Digest is 16 octets. */ + FSL_HASH_ALG_MD5, + /*! SHA-1 (aka SHA or SHA-160) algorithm. Digest is 20 octets. */ + FSL_HASH_ALG_SHA1, + /*! + * SHA-224 algorithm. Digest is 28 octets, though context is 32 octets. + */ + FSL_HASH_ALG_SHA224, + /*! SHA-256 algorithm. Digest is 32 octets. */ + FSL_HASH_ALG_SHA256 +} fsl_shw_hash_alg_t; + +/*! + * The type of Authentication-Cipher function which will be performed. + */ +typedef enum fsl_shw_acc_mode_t { + /*! + * CBC-MAC for Counter. Requires context and modulus. Final operation may + * be non-multiple of block size. This mode may be used for AES. + */ + FSL_ACC_MODE_CCM, + /*! + * SSL mode. Not supported. Combines HMAC and encrypt (or decrypt). + * Needs one key object for encryption, another for the HMAC. The usual + * hashing and symmetric encryption algorithms are supported. + */ + FSL_ACC_MODE_SSL, +} fsl_shw_acc_mode_t; + +/* REQ-S2LRD-PINTFC-COA-HCO-001 */ +/*! + * Flags which control a Hash operation. + */ +typedef enum fsl_shw_hash_ctx_flags_t { + /*! + * Context is empty. Hash is started from scratch, with a + * message-processed count of zero. + */ + FSL_HASH_FLAGS_INIT = 0x01, + /*! + * Retrieve context from hardware after hashing. If used with the + * #FSL_HASH_FLAGS_FINALIZE flag, the final digest value will be saved in + * the object. + */ + FSL_HASH_FLAGS_SAVE = 0x02, + /*! Place context into hardware before hashing. */ + FSL_HASH_FLAGS_LOAD = 0x04, + /*! + * PAD message and perform final digest operation. If user message is + * pre-padded, this flag should not be used. + */ + FSL_HASH_FLAGS_FINALIZE = 0x08, +} fsl_shw_hash_ctx_flags_t; + +/*! + * Flags which control an HMAC operation. + * + * These may be combined by ORing them together. See #fsl_shw_hmco_set_flags() + * and #fsl_shw_hmco_clear_flags(). + */ +typedef enum fsl_shw_hmac_ctx_flags_t { + /*! + * Message context is empty. HMAC is started from scratch (with key) or + * from precompute of inner hash, depending on whether + * #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT is set. + */ + FSL_HMAC_FLAGS_INIT = 1, + /*! + * Retrieve ongoing context from hardware after hashing. If used with the + * #FSL_HMAC_FLAGS_FINALIZE flag, the final digest value (HMAC) will be + * saved in the object. + */ + FSL_HMAC_FLAGS_SAVE = 2, + /*! Place ongoing context into hardware before hashing. */ + FSL_HMAC_FLAGS_LOAD = 4, + /*! + * PAD message and perform final HMAC operations of inner and outer + * hashes. + */ + FSL_HMAC_FLAGS_FINALIZE = 8, + /*! + * This means that the context contains precomputed inner and outer hash + * values. + */ + FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT = 16, +} fsl_shw_hmac_ctx_flags_t; + +/*! + * Flags to control use of the #fsl_shw_scco_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_scco_set_flags() and #fsl_shw_scco_clear_flags() + */ +typedef enum fsl_shw_sym_ctx_flags_t { + /*! + * Context is empty. In ARC4, this means that the S-Box needs to be + * generated from the key. In #FSL_SYM_MODE_CBC mode, this allows an IV of + * zero to be specified. In #FSL_SYM_MODE_CTR mode, it means that an + * initial CTR value of zero is desired. + */ + FSL_SYM_CTX_INIT = 1, + /*! + * Load context from object into hardware before running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_LOAD = 2, + /*! + * Save context from hardware into object after running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_SAVE = 4, + /*! + * Context (SBox) is to be unwrapped and wrapped on each use. + * This flag is unsupported. + * */ + FSL_SYM_CTX_PROTECT = 8, +} fsl_shw_sym_ctx_flags_t; + +/*! + * Flags which describe the state of the #fsl_shw_sko_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_sko_set_flags() and #fsl_shw_sko_clear_flags() + */ +typedef enum fsl_shw_key_flags_t { + /*! If algorithm is DES or 3DES, do not validate the key parity bits. */ + FSL_SKO_KEY_IGNORE_PARITY = 1, + /*! Clear key is present in the object. */ + FSL_SKO_KEY_PRESENT = 2, + /*! + * Key has been established for use. This feature is not available for all + * platforms, nor for all algorithms and modes. + */ + FSL_SKO_KEY_ESTABLISHED = 4, + /*! + * Key intended for user (software) use; can be read cleartext from the + * keystore. + */ + FSL_SKO_KEY_SW_KEY = 8, +} fsl_shw_key_flags_t; + +/*! + * Type of value which is associated with an established key. + */ +typedef uint64_t key_userid_t; + +/*! + * Flags which describe the state of the #fsl_shw_acco_t. + * + * The @a FSL_ACCO_CTX_INIT and @a FSL_ACCO_CTX_FINALIZE flags, when used + * together, provide for a one-shot operation. + */ +typedef enum fsl_shw_auth_ctx_flags_t { + /*! Initialize Context(s) */ + FSL_ACCO_CTX_INIT = 1, + /*! Load intermediate context(s). This flag is unsupported. */ + FSL_ACCO_CTX_LOAD = 2, + /*! Save intermediate context(s). This flag is unsupported. */ + FSL_ACCO_CTX_SAVE = 4, + /*! Create MAC during this operation. */ + FSL_ACCO_CTX_FINALIZE = 8, + /*! + * Formatting of CCM input data is performed by calls to + * #fsl_shw_ccm_nist_format_ctr_and_iv() and + * #fsl_shw_ccm_nist_update_ctr_and_iv(). + */ + FSL_ACCO_NIST_CCM = 0x10, +} fsl_shw_auth_ctx_flags_t; + +/*! + * The operation which controls the behavior of #fsl_shw_establish_key(). + * + * These values are passed to #fsl_shw_establish_key(). + */ +typedef enum fsl_shw_key_wrap_t { + /*! Generate a key from random values. */ + FSL_KEY_WRAP_CREATE, + /*! Use the provided clear key. */ + FSL_KEY_WRAP_ACCEPT, + /*! Unwrap a previously wrapped key. */ + FSL_KEY_WRAP_UNWRAP +} fsl_shw_key_wrap_t; + +/*! + * Modulus Selector for CTR modes. + * + * The incrementing of the Counter value may be modified by a modulus. If no + * modulus is needed or desired for AES, use #FSL_CTR_MOD_128. + */ +typedef enum fsl_shw_ctr_mod_t { + FSL_CTR_MOD_8, /*!< Run counter with modulus of 2^8. */ + FSL_CTR_MOD_16, /*!< Run counter with modulus of 2^16. */ + FSL_CTR_MOD_24, /*!< Run counter with modulus of 2^24. */ + FSL_CTR_MOD_32, /*!< Run counter with modulus of 2^32. */ + FSL_CTR_MOD_40, /*!< Run counter with modulus of 2^40. */ + FSL_CTR_MOD_48, /*!< Run counter with modulus of 2^48. */ + FSL_CTR_MOD_56, /*!< Run counter with modulus of 2^56. */ + FSL_CTR_MOD_64, /*!< Run counter with modulus of 2^64. */ + FSL_CTR_MOD_72, /*!< Run counter with modulus of 2^72. */ + FSL_CTR_MOD_80, /*!< Run counter with modulus of 2^80. */ + FSL_CTR_MOD_88, /*!< Run counter with modulus of 2^88. */ + FSL_CTR_MOD_96, /*!< Run counter with modulus of 2^96. */ + FSL_CTR_MOD_104, /*!< Run counter with modulus of 2^104. */ + FSL_CTR_MOD_112, /*!< Run counter with modulus of 2^112. */ + FSL_CTR_MOD_120, /*!< Run counter with modulus of 2^120. */ + FSL_CTR_MOD_128 /*!< Run counter with modulus of 2^128. */ +} fsl_shw_ctr_mod_t; + +/*! + * Permissions flags for Secure Partitions + */ +typedef enum fsl_shw_permission_t { +/*! SCM Access Permission: Do not zeroize/deallocate partition on SMN Fail state */ + FSL_PERM_NO_ZEROIZE = 0x80000000, +/*! SCM Access Permission: Enforce trusted key read in */ + FSL_PERM_TRUSTED_KEY_READ = 0x40000000, +/*! SCM Access Permission: Ignore Supervisor/User mode in permission determination */ + FSL_PERM_HD_S = 0x00000800, +/*! SCM Access Permission: Allow Read Access to Host Domain */ + FSL_PERM_HD_R = 0x00000400, +/*! SCM Access Permission: Allow Write Access to Host Domain */ + FSL_PERM_HD_W = 0x00000200, +/*! SCM Access Permission: Allow Execute Access to Host Domain */ + FSL_PERM_HD_X = 0x00000100, +/*! SCM Access Permission: Allow Read Access to Trusted Host Domain */ + FSL_PERM_TH_R = 0x00000040, +/*! SCM Access Permission: Allow Write Access to Trusted Host Domain */ + FSL_PERM_TH_W = 0x00000020, +/*! SCM Access Permission: Allow Read Access to Other/World Domain */ + FSL_PERM_OT_R = 0x00000004, +/*! SCM Access Permission: Allow Write Access to Other/World Domain */ + FSL_PERM_OT_W = 0x00000002, +/*! SCM Access Permission: Allow Execute Access to Other/World Domain */ + FSL_PERM_OT_X = 0x00000001, +} fsl_shw_permission_t; + +typedef enum fsl_shw_cypher_mode_t { + FSL_SHW_CYPHER_MODE_ECB = 1, /*!< ECB mode */ + FSL_SHW_CYPHER_MODE_CBC = 2, /*!< CBC mode */ +} fsl_shw_cypher_mode_t; + +typedef enum fsl_shw_pf_key_t { + FSL_SHW_PF_KEY_IIM, /*!< Present fused IIM key */ + FSL_SHW_PF_KEY_PRG, /*!< Present Program key */ + FSL_SHW_PF_KEY_IIM_PRG, /*!< Present IIM ^ Program key */ + FSL_SHW_PF_KEY_IIM_RND, /*!< Present Random key */ + FSL_SHW_PF_KEY_RND, /*!< Present IIM ^ Random key */ +} fsl_shw_pf_key_t; + +typedef enum fsl_shw_tamper_t { + FSL_SHW_TAMPER_NONE, /*!< No error detected */ + FSL_SHW_TAMPER_WTD, /*!< wire-mesh tampering det */ + FSL_SHW_TAMPER_ETBD, /*!< ext tampering det: input B */ + FSL_SHW_TAMPER_ETAD, /*!< ext tampering det: input A */ + FSL_SHW_TAMPER_EBD, /*!< external boot detected */ + FSL_SHW_TAMPER_SAD, /*!< security alarm detected */ + FSL_SHW_TAMPER_TTD, /*!< temperature tampering det */ + FSL_SHW_TAMPER_CTD, /*!< clock tampering det */ + FSL_SHW_TAMPER_VTD, /*!< voltage tampering det */ + FSL_SHW_TAMPER_MCO, /*!< monotonic counter overflow */ + FSL_SHW_TAMPER_TCO, /*!< time counter overflow */ +} fsl_shw_tamper_t; + +/****************************************************************************** + * Data Structures + *****************************************************************************/ + +/*! + * + * @brief Structure type for descriptors + * + * The first five fields are passed to the hardware. + * + *****************************************************************************/ +#ifndef USE_NEW_PTRS /* Experimental */ + +typedef struct sah_Desc { + uint32_t header; /*!< descriptor header value */ + uint32_t len1; /*!< number of data bytes in 'ptr1' buffer */ + void *ptr1; /*!< pointer to first sah_Link structure */ + uint32_t len2; /*!< number of data bytes in 'ptr2' buffer */ + void *ptr2; /*!< pointer to second sah_Link structure */ + struct sah_Desc *next; /*!< pointer to next descriptor */ +#ifdef __KERNEL__ /* This needs a better test */ + /* These two must be last. See sah_Copy_Descriptors */ + struct sah_Desc *virt_addr; /*!< Virtual (kernel) address of this + descriptor. */ + dma_addr_t dma_addr; /*!< Physical (bus) address of this + descriptor. */ + void *original_ptr1; /*!< user's pointer to ptr1 */ + void *original_ptr2; /*!< user's pointer to ptr2 */ + struct sah_Desc *original_next; /*!< user's pointer to next */ +#endif +} sah_Desc; + +#else + +typedef struct sah_Desc { + uint32_t header; /*!< descriptor header value */ + uint32_t len1; /*!< number of data bytes in 'ptr1' buffer */ + uint32_t hw_ptr1; /*!< pointer to first sah_Link structure */ + uint32_t len2; /*!< number of data bytes in 'ptr2' buffer */ + uint32_t hw_ptr2; /*!< pointer to second sah_Link structure */ + uint32_t hw_next; /*!< pointer to next descriptor */ + struct sah_Link *ptr1; /*!< (virtual) pointer to first sah_Link structure */ + struct sah_Link *ptr2; /*!< (virtual) pointer to first sah_Link structure */ + struct sah_Desc *next; /*!< (virtual) pointer to next descriptor */ +#ifdef __KERNEL__ /* This needs a better test */ + /* These two must be last. See sah_Copy_Descriptors */ + struct sah_Desc *virt_addr; /*!< Virtual (kernel) address of this + descriptor. */ + dma_addr_t dma_addr; /*!< Physical (bus) address of this + descriptor. */ +#endif +} sah_Desc; + +#endif + +/*! +******************************************************************************* +* @brief The first descriptor in a chain +******************************************************************************/ +typedef struct sah_Head_Desc { + sah_Desc desc; /*!< whole struct - must be first */ + struct fsl_shw_uco_t *user_info; /*!< where result pool lives */ + uint32_t user_ref; /*!< at time of request */ + uint32_t uco_flags; /*!< at time of request */ + uint32_t status; /*!< Status of queue entry */ + uint32_t error_status; /*!< If error, register from Sahara */ + uint32_t fault_address; /*!< If error, register from Sahara */ + uint32_t op_status; /*!< If error, register from Sahara */ + fsl_shw_return_t result; /*!< Result of running descriptor */ + struct sah_Head_Desc *next; /*!< Next in queue */ + struct sah_Head_Desc *prev; /*!< previous in queue */ + struct sah_Head_Desc *user_desc; /*!< For API async get_results */ + void *out1_ptr; /*!< For async post-processing */ + void *out2_ptr; /*!< For async post-processing */ + uint32_t out_len; /*!< For async post-processing */ +} sah_Head_Desc; + +/*! + * @brief Structure type for links + * + * The first three fields are used by hardware. + *****************************************************************************/ +#ifndef USE_NEW_PTRS + +typedef struct sah_Link { + size_t len; /*!< len of 'data' buffer in bytes */ + uint8_t *data; /*!< buffer to store data */ + struct sah_Link *next; /*!< pointer to the next sah_Link storing + * data */ + sah_Link_Flags flags; /*!< indicates the component that created the + * data buffer. Security Function internal + * information */ + key_userid_t ownerid; /*!< Auth code for established key */ + uint32_t slot; /*!< Location of the the established key */ +#ifdef __KERNEL__ /* This needs a better test */ + /* These two elements must be last. See sah_Copy_Links() */ + struct sah_Link *virt_addr; + dma_addr_t dma_addr; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + struct page *vm_info; +#endif + uint8_t *original_data; /*!< user's version of data pointer */ + struct sah_Link *original_next; /*!< user's version of next pointer */ +#ifdef SAH_COPY_DATA + uint8_t *copy_data; /*!< Virtual address of acquired buffer */ +#endif +#endif /* kernel-only */ +} sah_Link; + +#else + +typedef struct sah_Link { + /*! len of 'data' buffer in bytes */ + size_t len; + /*! buffer to store data */ + uint32_t hw_data; + /*! Physical address */ + uint32_t hw_next; + /*! + * indicates the component that created the data buffer. Security Function + * internal information + */ + sah_Link_Flags flags; + /*! (virtual) pointer to data */ + uint8_t *data; + /*! (virtual) pointer to the next sah_Link storing data */ + struct sah_Link *next; + /*! Auth code for established key */ + key_userid_t ownerid; + /*! Location of the the established key */ + uint32_t slot; +#ifdef __KERNEL__ /* This needs a better test */ + /* These two elements must be last. See sah_Copy_Links() */ + struct sah_Link *virt_addr; + dma_addr_t dma_addr; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) + struct page *vm_info; +#endif +#endif /* kernel-only */ +} sah_Link; + +#endif + +/*! + * Initialization Object + */ +typedef struct fsl_sho_ibo_t { +} fsl_sho_ibo_t; + +/* Imported from Sahara1 driver -- is it needed forever? */ +/*! +******************************************************************************* +* FIELDS +* +* void * ref - parameter to be passed into the memory function calls +* +* void * (*malloc)(void *ref, size_t n) - pointer to user's malloc function +* +* void (*free)(void *ref, void *ptr) - pointer to user's free function +* +* void * (*memcpy)(void *ref, void *dest, const void *src, size_t n) - +* pointer to user's memcpy function +* +* void * (*memset)(void *ref, void *ptr, int ch, size_t n) - pointer to +* user's memset function +* +* @brief Structure for API memory utilities +******************************************************************************/ +typedef struct sah_Mem_Util { + /*! Who knows. Vestigial. */ + void *mu_ref; + /*! Acquire buffer of size n bytes */ + void *(*mu_malloc) (void *ref, size_t n); + /*! Acquire a sah_Head_Desc */ + sah_Head_Desc *(*mu_alloc_head_desc) (void *ref); + /* Acquire a sah_Desc */ + sah_Desc *(*mu_alloc_desc) (void *ref); + /* Acquire a sah_Link */ + sah_Link *(*mu_alloc_link) (void *ref); + /*! Free buffer at ptr */ + void (*mu_free) (void *ref, void *ptr); + /*! Free sah_Head_Desc at ptr */ + void (*mu_free_head_desc) (void *ref, sah_Head_Desc * ptr); + /*! Free sah_Desc at ptr */ + void (*mu_free_desc) (void *ref, sah_Desc * ptr); + /*! Free sah_Link at ptr */ + void (*mu_free_link) (void *ref, sah_Link * ptr); + /*! Funciton which will copy n bytes from src to dest */ + void *(*mu_memcpy) (void *ref, void *dest, const void *src, size_t n); + /*! Set all n bytes of ptr to ch */ + void *(*mu_memset) (void *ref, void *ptr, int ch, size_t n); +} sah_Mem_Util; + +/*! + * Secure Partition information + * + * This holds the context to a single secure partition owned by the user. It + * is only available in the kernel version of the User Context Object. + */ +typedef struct fsl_shw_spo_t { + uint32_t user_base; /*!< Base address (user virtual) */ + void *kernel_base; /*!< Base address (kernel virtual) */ + struct fsl_shw_spo_t *next; /*!< Pointer to the next partition + owned by the user. NULL if this + is the last partition. */ +} fsl_shw_spo_t; + +/* REQ-S2LRD-PINTFC-COA-UCO-001 */ +/*! + * User Context Object + */ +typedef struct fsl_shw_uco_t { + int sahara_openfd; /*!< this should be kernel-only?? */ + sah_Mem_Util *mem_util; /*!< Memory utility fns */ + uint32_t user_ref; /*!< User's reference */ + void (*callback) (struct fsl_shw_uco_t * uco); /*!< User's callback fn */ + uint32_t flags; /*!< from fsl_shw_user_ctx_flags_t */ + unsigned pool_size; /*!< maximum size of user pool */ +#ifdef __KERNEL__ + sah_Queue result_pool; /*!< where non-blocking results go */ + os_process_handle_t process; /*!< remember for signalling User mode */ + fsl_shw_spo_t *partition; /*!< chain of secure partitions owned by + the user */ +#else + struct fsl_shw_uco_t *next; /*!< To allow user-mode chaining of contexts, + for signalling. */ +#endif +} fsl_shw_uco_t; + +/* REQ-S2LRD-PINTFC-API-GEN-006 ?? */ +/*! + * Result object + */ +typedef struct fsl_shw_result_t { + uint32_t user_ref; + fsl_shw_return_t code; + uint32_t detail1; + uint32_t detail2; + sah_Head_Desc *user_desc; +} fsl_shw_result_t; + +/*! + * Keystore Object + */ +typedef struct fsl_shw_kso_t { +#ifdef __KERNEL__ + os_lock_t lock; /*!< Pointer to lock that controls access to + the keystore. */ +#endif + void *user_data; /*!< Pointer to user structure that handles + the internals of the keystore. */ + fsl_shw_return_t(*data_init) (fsl_shw_uco_t * user_ctx, + void **user_data); + void (*data_cleanup) (fsl_shw_uco_t * user_ctx, void **user_data); + fsl_shw_return_t(*slot_verify_access) (void *user_data, + uint64_t owner_id, + uint32_t slot); + fsl_shw_return_t(*slot_alloc) (void *user_data, uint32_t size_bytes, + uint64_t owner_id, uint32_t * slot); + fsl_shw_return_t(*slot_dealloc) (void *user_data, uint64_t owner_id, + uint32_t slot); + void *(*slot_get_address) (void *user_data, uint32_t slot); + uint32_t(*slot_get_base) (void *user_data, uint32_t slot); + uint32_t(*slot_get_offset) (void *user_data, uint32_t slot); + uint32_t(*slot_get_slot_size) (void *user_data, uint32_t slot); +} fsl_shw_kso_t; + +/* REQ-S2LRD-PINTFC-COA-SKO-001 */ +/*! + * Secret Key Context Object + */ +typedef struct fsl_shw_sko_t { + uint32_t flags; + fsl_shw_key_alg_t algorithm; + key_userid_t userid; + uint32_t handle; + uint16_t key_length; + uint8_t key[64]; + struct fsl_shw_kso_t *keystore; /*!< If present, key is in keystore */ +} fsl_shw_sko_t; + +/* REQ-S2LRD-PINTFC-COA-CO-001 */ +/*! + * @brief Platform Capability Object + */ +typedef struct fsl_shw_pco_t { /* Consider turning these constants into symbols */ + int api_major; + int api_minor; + int driver_major; + int driver_minor; + fsl_shw_key_alg_t sym_algorithms[4]; + fsl_shw_sym_mode_t sym_modes[4]; + fsl_shw_hash_alg_t hash_algorithms[4]; + uint8_t sym_support[5][4]; /* indexed by key alg then mode */ + + int scc_driver_major; + int scc_driver_minor; + int scm_version; /*!< Version from SCM Configuration register */ + int smn_version; /*!< Version from SMN Status register */ + int block_size_bytes; /*!< Number of bytes per block of RAM; also + block size of the crypto algorithm. */ + union { + struct { + int black_ram_size_blocks; /*!< Number of blocks of Black RAM */ + int red_ram_size_blocks; /*!< Number of blocks of Red RAM */ + } scc_info; + struct { + int partition_size_bytes; /*!< Number of bytes in each partition */ + int partition_count; /*!< Number of partitions on this platform */ + } scc2_info; + }; +} fsl_shw_pco_t; + +/* REQ-S2LRD-PINTFC-COA-HCO-001 */ +/*! + * Hash Context Object + */ +typedef struct fsl_shw_hco_t { /* fsl_shw_hash_context_object */ + fsl_shw_hash_alg_t algorithm; + uint32_t flags; + uint8_t digest_length; /* in bytes */ + uint8_t context_length; /* in bytes */ + uint8_t context_register_length; /* in bytes */ + uint32_t context[9]; /* largest digest + msg size */ +} fsl_shw_hco_t; + +/*! + * HMAC Context Object + */ +typedef struct fsl_shw_hmco_t { /* fsl_shw_hmac_context_object */ + fsl_shw_hash_alg_t algorithm; + uint32_t flags; + uint8_t digest_length; /*!< in bytes */ + uint8_t context_length; /*!< in bytes */ + uint8_t context_register_length; /*!< in bytes */ + uint32_t ongoing_context[9]; /*!< largest digest + msg + size */ + uint32_t inner_precompute[9]; /*!< largest digest + msg + size */ + uint32_t outer_precompute[9]; /*!< largest digest + msg + size */ +} fsl_shw_hmco_t; + +/* REQ-S2LRD-PINTFC-COA-SCCO-001 */ +/*! + * Symmetric Crypto Context Object Context Object + */ +typedef struct fsl_shw_scco_t { + uint32_t flags; + unsigned block_size_bytes; /* double duty block&ctx size */ + fsl_shw_sym_mode_t mode; + /* Could put modulus plus 16-octet context in union with arc4 + sbox+ptrs... */ + fsl_shw_ctr_mod_t modulus_exp; + uint8_t context[259]; +} fsl_shw_scco_t; + +/*! + * Authenticate-Cipher Context Object + + * An object for controlling the function of, and holding information about, + * data for the authenticate-cipher functions, #fsl_shw_gen_encrypt() and + * #fsl_shw_auth_decrypt(). + */ +typedef struct fsl_shw_acco_t { + uint32_t flags; /*!< See #fsl_shw_auth_ctx_flags_t for + meanings */ + fsl_shw_acc_mode_t mode; /*!< CCM only */ + uint8_t mac_length; /*!< User's value for length */ + unsigned q_length; /*!< NIST parameter - */ + fsl_shw_scco_t cipher_ctx_info; /*!< For running + encrypt/decrypt. */ + union { + fsl_shw_scco_t CCM_ctx_info; /*!< For running the CBC in + AES-CCM. */ + fsl_shw_hco_t hash_ctx_info; /*!< For running the hash */ + } auth_info; /*!< "auth" info struct */ + uint8_t unencrypted_mac[16]; /*!< max block size... */ +} fsl_shw_acco_t; + +/*! + * Used by Sahara API to retrieve completed non-blocking results. + */ +typedef struct sah_results { + unsigned requested; /*!< number of results requested */ + unsigned *actual; /*!< number of results obtained */ + fsl_shw_result_t *results; /*!< pointer to memory to hold results */ +} sah_results; + +/*! + * @typedef scc_partition_status_t + */ +/*! Partition status information. */ +typedef enum fsl_shw_partition_status_t { + FSL_PART_S_UNUSABLE, /*!< Partition not implemented */ + FSL_PART_S_UNAVAILABLE, /*!< Partition owned by other host */ + FSL_PART_S_AVAILABLE, /*!< Partition available */ + FSL_PART_S_ALLOCATED, /*!< Partition owned by host but not engaged + */ + FSL_PART_S_ENGAGED, /*!< Partition owned by host and engaged */ +} fsl_shw_partition_status_t; + +/****************************************************************************** + * Access Macros for Objects + *****************************************************************************/ +/*! + * Get FSL SHW API version + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the API is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the API is to be stored. + */ +#define fsl_shw_pco_get_version(pcobject, pcmajor, pcminor) \ +{ \ + *(pcmajor) = (pcobject)->api_major; \ + *(pcminor) = (pcobject)->api_minor; \ +} + +/*! + * Get underlying driver version. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the driver is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the driver is to be stored. + */ +#define fsl_shw_pco_get_driver_version(pcobject, pcmajor, pcminor) \ +{ \ + *(pcmajor) = (pcobject)->driver_major; \ + *(pcminor) = (pcobject)->driver_minor; \ +} + +/*! + * Get list of symmetric algorithms supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] pcalgorithms A pointer to where to store the location of + * the list of algorithms. + * @param[out] pcacount A pointer to where to store the number of + * algorithms in the list at @a algorithms. + */ +#define fsl_shw_pco_get_sym_algorithms(pcobject, pcalgorithms, pcacount) \ +{ \ + *(pcalgorithms) = (pcobject)->sym_algorithms; \ + *(pcacount) = sizeof((pcobject)->sym_algorithms)/4; \ +} + +/*! + * Get list of symmetric modes supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] gsmodes A pointer to where to store the location of + * the list of modes. + * @param[out] gsacount A pointer to where to store the number of + * algorithms in the list at @a modes. + */ +#define fsl_shw_pco_get_sym_modes(pcobject, gsmodes, gsacount) \ +{ \ + *(gsmodes) = (pcobject)->sym_modes; \ + *(gsacount) = sizeof((pcobject)->sym_modes)/4; \ +} + +/*! + * Get list of hash algorithms supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param[out] gsalgorithms A pointer which will be set to the list of + * algorithms. + * @param[out] gsacount The number of algorithms in the list at @a + * algorithms. + */ +#define fsl_shw_pco_get_hash_algorithms(pcobject, gsalgorithms, gsacount) \ +{ \ + *(gsalgorithms) = (pcobject)->hash_algorithms; \ + *(gsacount) = sizeof((pcobject)->hash_algorithms)/4; \ +} + +/*! + * Determine whether the combination of a given symmetric algorithm and a given + * mode is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param pcalg A Symmetric Cipher algorithm. + * @param pcmode A Symmetric Cipher mode. + * + * @return 0 if combination is not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_sym_supported(pcobject, pcalg, pcmode) \ + ((pcobject)->sym_support[pcalg][pcmode]) + +/*! + * Determine whether a given Encryption-Authentication mode is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * @param pcmode The Authentication mode. + * + * @return 0 if mode is not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_auth_supported(pcobject, pcmode) \ + ((pcmode == FSL_ACC_MODE_CCM) ? 1 : 0) + +/*! + * Determine whether Black Keys (key establishment / wrapping) is supported. + * + * @param pcobject The Platform Capababilities Object to query. + * + * @return 0 if wrapping is not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_black_key_supported(pcobject) \ + 1 + +/*! + * Determine whether Programmed Key features are available + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 1 if Programmed Key features are available, otherwise zero. + */ +#define fsl_shw_pco_check_pk_supported(pcobject) \ + 0 + +/*! + * Determine whether Software Key features are available + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 1 if Software key features are available, otherwise zero. + */ +#define fsl_shw_pco_check_sw_keys_supported(pcobject) \ + 0 + +/*! + * Get FSL SHW SCC driver version + * + * @param pcobject The Platform Capabilities Object to query. + * @param[out] pcmajor A pointer to where the major version + * of the SCC driver is to be stored. + * @param[out] pcminor A pointer to where the minor version + * of the SCC driver is to be stored. + */ +#define fsl_shw_pco_get_scc_driver_version(pcobject, pcmajor, pcminor) \ +{ \ + *(pcmajor) = (pcobject)->scc_driver_major; \ + *(pcminor) = (pcobject)->scc_driver_minor; \ +} + +/*! + * Get SCM hardware version + * + * @param pcobject The Platform Capabilities Object to query. + * @return The SCM hardware version + */ +#define fsl_shw_pco_get_scm_version(pcobject) \ + ((pcobject)->scm_version) + +/*! + * Get SMN hardware version + * + * @param pcobject The Platform Capabilities Object to query. + * @return The SMN hardware version + */ +#define fsl_shw_pco_get_smn_version(pcobject) \ + ((pcobject)->smn_version) + +/*! + * Get the size of an SCM block, in bytes + * + * @param pcobject The Platform Capabilities Object to query. + * @return The size of an SCM block, in bytes. + */ +#define fsl_shw_pco_get_scm_block_size(pcobject) \ + ((pcobject)->block_size_bytes) + +/*! + * Get size of Black and Red RAM memory + * + * @param pcobject The Platform Capabilities Object to query. + * @param[out] black_size A pointer to where the size of the Black RAM, in + * blocks, is to be placed. + * @param[out] red_size A pointer to where the size of the Red RAM, in + * blocks, is to be placed. + */ +#define fsl_shw_pco_get_smn_size(pcobject, black_size, red_size) \ +{ \ + if ((pcobject)->scm_version == 1) { \ + *(black_size) = (pcobject)->scc_info.black_ram_size_blocks; \ + *(red_size) = (pcobject)->scc_info.red_ram_size_blocks; \ + } else { \ + *(black_size) = 0; \ + *(red_size) = 0; \ + } \ +} + +/*! + * Determine whether Secure Partitions are supported + * + * @param pcobject The Platform Capabilities Object to query. + * + * @return 0 if secure partitions are not supported, non-zero if supported. + */ +#define fsl_shw_pco_check_spo_supported(pcobject) \ + ((pcobject)->scm_version == 2) + +/*! + * Get the size of a Secure Partitions + * + * @param pcobject The Platform Capabilities Object to query. + * + * @return Partition size, in bytes. 0 if Secure Partitions not supported. + */ +#define fsl_shw_pco_get_spo_size_bytes(pcobject) \ + (((pcobject)->scm_version == 2) ? \ + ((pcobject)->scc2_info.partition_size_bytes) : 0 ) + +/*! + * Get the number of Secure Partitions on this platform + * + * @param pcobject The Platform Capabilities Object to query. + * + * @return Number of partitions. 0 if Secure Paritions not supported. Note + * that this returns the total number of partitions, not all may be + * available to the user. + */ +#define fsl_shw_pco_get_spo_count(pcobject) \ + (((pcobject)->scm_version == 2) ? \ + ((pcobject)->scc2_info.partition_count) : 0 ) + +/*! + * Initialize a User Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the User Context Object to initial values, and set the size + * of the results pool. The mode will be set to a default of + * #FSL_UCO_BLOCKING_MODE. + * + * When using non-blocking operations, this sets the maximum number of + * operations which can be outstanding. This number includes the counts of + * operations waiting to start, operation(s) being performed, and results which + * have not been retrieved. + * + * Changes to this value are ignored once user registration has completed. It + * should be set to 1 if only blocking operations will ever be performed. + * + * @param ucontext The User Context object to operate on. + * @param usize The maximum number of operations which can be + * outstanding. + */ +#ifdef __KERNEL__ +#define fsl_shw_uco_init(ucontext, usize) \ +{ \ + (ucontext)->pool_size = usize; \ + (ucontext)->flags = FSL_UCO_BLOCKING_MODE; \ + (ucontext)->sahara_openfd = -1; \ + (ucontext)->mem_util = NULL; \ + (ucontext)->partition = NULL; \ + (ucontext)->callback = NULL; \ +} +#else +#define fsl_shw_uco_init(ucontext, usize) \ +{ \ + (ucontext)->pool_size = usize; \ + (ucontext)->flags = FSL_UCO_BLOCKING_MODE; \ + (ucontext)->sahara_openfd = -1; \ + (ucontext)->mem_util = NULL; \ + (ucontext)->callback = NULL; \ +} +#endif + +/*! + * Set the User Reference for the User Context. + * + * @param ucontext The User Context object to operate on. + * @param uref A value which will be passed back with a result. + */ +#define fsl_shw_uco_set_reference(ucontext, uref) \ + (ucontext)->user_ref = uref + +/*! + * Set the User Reference for the User Context. + * + * @param ucontext The User Context object to operate on. + * @param ucallback The function the API will invoke when an operation + * completes. + */ +#define fsl_shw_uco_set_callback(ucontext, ucallback) \ + (ucontext)->callback = ucallback + +/*! + * Set flags in the User Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param ucontext The User Context object to operate on. + * @param uflags ORed values from #fsl_shw_user_ctx_flags_t. + */ +#define fsl_shw_uco_set_flags(ucontext, uflags) \ + (ucontext)->flags |= (uflags) + +/*! + * Clear flags in the User Context. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param ucontext The User Context object to operate on. + * @param uflags ORed values from #fsl_shw_user_ctx_flags_t. + */ +#define fsl_shw_uco_clear_flags(ucontext, uflags) \ + (ucontext)->flags &= ~(uflags) + +/*! + * Retrieve the reference value from a Result Object. + * + * @param robject The result object to query. + * + * @return The reference associated with the request. + */ +#define fsl_shw_ro_get_reference(robject) \ + (robject)->user_ref + +/*! + * Retrieve the status code from a Result Object. + * + * @param robject The result object to query. + * + * @return The status of the request. + */ +#define fsl_shw_ro_get_status(robject) \ + (robject)->code + +/*! + * Initialize a Secret Key Object. + * + * This function must be called before performing any other operation with + * the Object. + * + * @param skobject The Secret Key Object to be initialized. + * @param skalgorithm DES, AES, etc. + * + */ +#define fsl_shw_sko_init(skobject,skalgorithm) \ +{ \ + (skobject)->algorithm = skalgorithm; \ + (skobject)->flags = 0; \ + (skobject)->keystore = NULL; \ +} + +/*! + * Initialize a Secret Key Object to use a Platform Key register. + * + * This function must be called before performing any other operation with + * the Object. INVALID on this platform. + * + * @param skobject The Secret Key Object to be initialized. + * @param skalgorithm DES, AES, etc. + * @param skhwkey one of the fsl_shw_pf_key_t values. + * + */ +#define fsl_shw_sko_init_pf_key(skobject,skalgorithm,skhwkey) \ +{ \ + (skobject)->algorithm = -1; \ + (skobject)->flags = -1; \ + (skobject)->keystore = NULL; \ +} + +/*! + * Store a cleartext key in the key object. + * + * This has the side effect of setting the #FSL_SKO_KEY_PRESENT flag and + * resetting the #FSL_SKO_KEY_ESTABLISHED flag. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skkey A pointer to the beginning of the key. + * @param skkeylen The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +#define fsl_shw_sko_set_key(skobject, skkey, skkeylen) \ +{ \ + (skobject)->key_length = skkeylen; \ + copy_bytes((skobject)->key, skkey, skkeylen); \ + (skobject)->flags |= FSL_SKO_KEY_PRESENT; \ + (skobject)->flags &= ~FSL_SKO_KEY_ESTABLISHED; \ +} + +/*! + * Set a size for the key. + * + * This function would normally be used when the user wants the key to be + * generated from a random source. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skkeylen The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +#define fsl_shw_sko_set_key_length(skobject, skkeylen) \ + (skobject)->key_length = skkeylen; + +/*! + * Set the User ID associated with the key. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skuserid The User ID to identify authorized users of the key. + */ +#define fsl_shw_sko_set_user_id(skobject, skuserid) \ + (skobject)->userid = (skuserid) + +/*! + * Establish a user Keystore to hold the key. + */ +#define fsl_shw_sko_set_keystore(skobject, user_keystore) \ + (skobject)->keystore = (user_keystore) + +/*! + * Set the establish key handle into a key object. + * + * The @a userid field will be used to validate the access to the unwrapped + * key. This feature is not available for all platforms, nor for all + * algorithms and modes. + * + * The #FSL_SKO_KEY_ESTABLISHED will be set (and the #FSL_SKO_KEY_PRESENT flag + * will be cleared). + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skuserid The User ID to verify this user is an authorized user of + * the key. + * @param skhandle A @a handle from #fsl_shw_sko_get_established_info. + */ +#define fsl_shw_sko_set_established_info(skobject, skuserid, skhandle) \ +{ \ + (skobject)->userid = (skuserid); \ + (skobject)->handle = (skhandle); \ + (skobject)->flags |= FSL_SKO_KEY_ESTABLISHED; \ + (skobject)->flags &= \ + ~(FSL_SKO_KEY_PRESENT); \ +} + +/*! + * Retrieve the established-key handle from a key object. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skhandle The location to store the @a handle of the unwrapped + * key. + */ +#define fsl_shw_sko_get_established_info(skobject, skhandle) \ + *(skhandle) = (skobject)->handle + +/*! + * Extract the algorithm from a key object. + * + * @param skobject The Key Object to be queried. + * @param[out] skalgorithm A pointer to the location to store the algorithm. + */ +#define fsl_shw_sko_get_algorithm(skobject, skalgorithm) \ + *(skalgorithm) = (skobject)->algorithm + +/*! + * Retrieve the cleartext key from a key object that is stored in a user + * keystore. + * + * @param skobject The Key Object to be queried. + * @param[out] skkey A pointer to the location to store the key. NULL + * if the key is not stored in a user keystore. + */ +#define fsl_shw_sko_get_key(skobject, skkey) \ +{ \ + fsl_shw_kso_t* keystore = (skobject)->keystore; \ + if (keystore != NULL) { \ + *(skkey) = keystore->slot_get_address(keystore->user_data, \ + (skobject)->handle); \ + } else { \ + *(skkey) = NULL; \ + } \ +} + +/*! + * Determine the size of a wrapped key based upon the cleartext key's length. + * + * This function can be used to calculate the number of octets that + * #fsl_shw_extract_key() will write into the location at @a covered_key. + * + * If zero is returned at @a length, this means that the key length in + * @a key_info is not supported. + * + * @param wkeyinfo Information about a key to be wrapped. + * @param wkeylen Location to store the length of a wrapped + * version of the key in @a key_info. + */ +#define fsl_shw_sko_calculate_wrapped_size(wkeyinfo, wkeylen) \ +{ \ + register fsl_shw_sko_t* kp = wkeyinfo; \ + register uint32_t kl = kp->key_length; \ + int key_blocks = (kl + 15) / 16; \ + int base_size = 35; /* ICV + T' + ALG + LEN + FLAGS */ \ + \ + *(wkeylen) = base_size + 16 * key_blocks; \ +} + +/*! + * Set some flags in the key object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skflags (One or more) ORed members of #fsl_shw_key_flags_t which + * are to be set. + */ +#define fsl_shw_sko_set_flags(skobject, skflags) \ + (skobject)->flags |= (skflags) + +/*! + * Clear some flags in the key object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param skobject A variable of type #fsl_shw_sko_t. + * @param skflags (One or more) ORed members of #fsl_shw_key_flags_t + * which are to be reset. + */ +#define fsl_shw_sko_clear_flags(skobject, skflags) \ + (skobject)->flags &= ~(skflags) + +/*! + * Initialize a Hash Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the hash + * context object. + * + * @param hcobject The hash context to operate upon. + * @param hcalgorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +#define fsl_shw_hco_init(hcobject, hcalgorithm) \ +{ \ + (hcobject)->algorithm = hcalgorithm; \ + (hcobject)->flags = 0; \ + switch (hcalgorithm) { \ + case FSL_HASH_ALG_MD5: \ + (hcobject)->digest_length = 16; \ + (hcobject)->context_length = 16; \ + (hcobject)->context_register_length = 24; \ + break; \ + case FSL_HASH_ALG_SHA1: \ + (hcobject)->digest_length = 20; \ + (hcobject)->context_length = 20; \ + (hcobject)->context_register_length = 24; \ + break; \ + case FSL_HASH_ALG_SHA224: \ + (hcobject)->digest_length = 28; \ + (hcobject)->context_length = 32; \ + (hcobject)->context_register_length = 36; \ + break; \ + case FSL_HASH_ALG_SHA256: \ + (hcobject)->digest_length = 32; \ + (hcobject)->context_length = 32; \ + (hcobject)->context_register_length = 36; \ + break; \ + default: \ + /* error ! */ \ + (hcobject)->digest_length = 1; \ + (hcobject)->context_length = 1; \ + (hcobject)->context_register_length = 1; \ + break; \ + } \ +} + +/*! + * Get the current hash value and message length from the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hcobject The hash context to query. + * @param[out] hccontext Pointer to the location of @a length octets where to + * store a copy of the current value of the digest. + * @param hcclength Number of octets of hash value to copy. + * @param[out] hcmsglen Pointer to the location to store the number of octets + * already hashed. + */ +#define fsl_shw_hco_get_digest(hcobject, hccontext, hcclength, hcmsglen) \ +{ \ + copy_bytes(hccontext, (hcobject)->context, hcclength); \ + if ((hcobject)->algorithm == FSL_HASH_ALG_SHA224 \ + || (hcobject)->algorithm == FSL_HASH_ALG_SHA256) { \ + *(hcmsglen) = (hcobject)->context[8]; \ + } else { \ + *(hcmsglen) = (hcobject)->context[5]; \ + } \ +} + +/*! + * Get the hash algorithm from the hash context object. + * + * @param hcobject The hash context to query. + * @param[out] hcalgorithm Pointer to where the algorithm is to be stored. + */ +#define fsl_shw_hco_get_info(hcobject, hcalgorithm) \ +{ \ + *(hcalgorithm) = (hcobject)->algorithm; \ +} + +/*! + * Set the current hash value and message length in the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hcobject The hash context to operate upon. + * @param hccontext Pointer to buffer of appropriate length to copy into + * the hash context object. + * @param hcmsglen The number of octets of the message which have + * already been hashed. + * + */ +#define fsl_shw_hco_set_digest(hcobject, hccontext, hcmsglen) \ +{ \ + copy_bytes((hcobject)->context, hccontext, (hcobject)->context_length); \ + if (((hcobject)->algorithm == FSL_HASH_ALG_SHA224) \ + || ((hcobject)->algorithm == FSL_HASH_ALG_SHA256)) { \ + (hcobject)->context[8] = hcmsglen; \ + } else { \ + (hcobject)->context[5] = hcmsglen; \ + } \ +} + +/*! + * Set flags in a Hash Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The hash context to be operated on. + * @param hcflags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +#define fsl_shw_hco_set_flags(hcobject, hcflags) \ + (hcobject)->flags |= (hcflags) + +/*! + * Clear flags in a Hash Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The hash context to be operated on. + * @param hcflags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +#define fsl_shw_hco_clear_flags(hcobject, hcflags) \ + (hcobject)->flags &= ~(hcflags) + +/*! + * Initialize an HMAC Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the HMAC + * context object. + * + * @param hcobject The HMAC context to operate upon. + * @param hcalgorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +#define fsl_shw_hmco_init(hcobject, hcalgorithm) \ + fsl_shw_hco_init(hcobject, hcalgorithm) + +/*! + * Set flags in an HMAC Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The HMAC context to be operated on. + * @param hcflags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +#define fsl_shw_hmco_set_flags(hcobject, hcflags) \ + (hcobject)->flags |= (hcflags) + +/*! + * Clear flags in an HMAC Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hcobject The HMAC context to be operated on. + * @param hcflags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +#define fsl_shw_hmco_clear_flags(hcobject, hcflags) \ + (hcobject)->flags &= ~(hcflags) + +/*! + * Initialize a Symmetric Cipher Context Object. + * + * This function must be called before performing any other operation with the + * Object. This will set the @a mode and @a algorithm and initialize the + * Object. + * + * @param scobject The context object to operate on. + * @param scalg The cipher algorithm this context will be used with. + * @param scmode #FSL_SYM_MODE_CBC, #FSL_SYM_MODE_ECB, etc. + * + */ +#define fsl_shw_scco_init(scobject, scalg, scmode) \ +{ \ + register uint32_t bsb; /* block-size bytes */ \ + \ + switch (scalg) { \ + case FSL_KEY_ALG_AES: \ + bsb = 16; \ + break; \ + case FSL_KEY_ALG_DES: \ + /* fall through */ \ + case FSL_KEY_ALG_TDES: \ + bsb = 8; \ + break; \ + case FSL_KEY_ALG_ARC4: \ + bsb = 259; \ + break; \ + case FSL_KEY_ALG_HMAC: \ + bsb = 1; /* meaningless */ \ + break; \ + default: \ + bsb = 00; \ + } \ + (scobject)->block_size_bytes = bsb; \ + (scobject)->mode = scmode; \ + (scobject)->flags = 0; \ +} + +/*! + * Set the flags for a Symmetric Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param scobject The context object to operate on. + * @param scflags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +#define fsl_shw_scco_set_flags(scobject, scflags) \ + (scobject)->flags |= (scflags) + +/*! + * Clear some flags in a Symmetric Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param scobject The context object to operate on. + * @param scflags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +#define fsl_shw_scco_clear_flags(scobject, scflags) \ + (scobject)->flags &= ~(scflags) + +/*! + * Set the Context (IV) for a Symmetric Cipher Context. + * + * This is to set the context/IV for #FSL_SYM_MODE_CBC mode, or to set the + * context (the S-Box and pointers) for ARC4. The full context size will + * be copied. + * + * @param scobject The context object to operate on. + * @param sccontext A pointer to the buffer which contains the context. + * + */ +#define fsl_shw_scco_set_context(scobject, sccontext) \ + copy_bytes((scobject)->context, sccontext, \ + (scobject)->block_size_bytes) + +/*! + * Get the Context for a Symmetric Cipher Context. + * + * This is to retrieve the context/IV for #FSL_SYM_MODE_CBC mode, or to + * retrieve context (the S-Box and pointers) for ARC4. The full context + * will be copied. + * + * @param scobject The context object to operate on. + * @param[out] sccontext Pointer to location where context will be stored. + */ +#define fsl_shw_scco_get_context(scobject, sccontext) \ + copy_bytes(sccontext, (scobject)->context, (scobject)->block_size_bytes) + +/*! + * Set the Counter Value for a Symmetric Cipher Context. + * + * This will set the Counter Value for CTR mode. + * + * @param scobject The context object to operate on. + * @param sccounter The starting counter value. The number of octets. + * copied will be the block size for the algorithm. + * @param scmodulus The modulus for controlling the incrementing of the + * counter. + * + */ +#define fsl_shw_scco_set_counter_info(scobject, sccounter, scmodulus) \ + { \ + if ((sccounter) != NULL) { \ + copy_bytes((scobject)->context, sccounter, \ + (scobject)->block_size_bytes); \ + } \ + (scobject)->modulus_exp = scmodulus; \ + } + +/*! + * Get the Counter Value for a Symmetric Cipher Context. + * + * This will retrieve the Counter Value is for CTR mode. + * + * @param scobject The context object to query. + * @param[out] sccounter Pointer to location to store the current counter + * value. The number of octets copied will be the + * block size for the algorithm. + * @param[out] scmodulus Pointer to location to store the modulus. + * + */ +#define fsl_shw_scco_get_counter_info(scobject, sccounter, scmodulus) \ + { \ + if ((sccounter) != NULL) { \ + copy_bytes(sccounter, (scobject)->context, \ + (scobject)->block_size_bytes); \ + } \ + if ((scmodulus) != NULL) { \ + *(scmodulus) = (scobject)->modulus_exp; \ + } \ + } + +/*! + * Initialize a Authentication-Cipher Context. + * + * @param acobject Pointer to object to operate on. + * @param acmode The mode for this object (only #FSL_ACC_MODE_CCM + * supported). + */ +#define fsl_shw_acco_init(acobject, acmode) \ + { \ + (acobject)->flags = 0; \ + (acobject)->mode = (acmode); \ + } + +/*! + * Set the flags for a Authentication-Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param acobject Pointer to object to operate on. + * @param acflags The flags to set (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +#define fsl_shw_acco_set_flags(acobject, acflags) \ + (acobject)->flags |= (acflags) + +/*! + * Clear some flags in a Authentication-Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param acobject Pointer to object to operate on. + * @param acflags The flags to reset (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +#define fsl_shw_acco_clear_flags(acobject, acflags) \ + (acobject)->flags &= ~(acflags) + +/*! + * Set up the Authentication-Cipher Object for CCM mode. + * + * This will set the @a auth_object for CCM mode and save the @a ctr, + * and @a mac_length. This function can be called instead of + * #fsl_shw_acco_init(). + * + * The paramater @a ctr is Counter Block 0, (counter value 0), which is for the + * MAC. + * + * @param acobject Pointer to object to operate on. + * @param acalg Cipher algorithm. Only AES is supported. + * @param accounter The initial counter value. + * @param acmaclen The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + */ +/* Do we need to stash the +1 value of the CTR somewhere? */ +#define fsl_shw_acco_set_ccm(acobject, acalg, accounter, acmaclen) \ +{ \ + (acobject)->flags = 0; \ + (acobject)->mode = FSL_ACC_MODE_CCM; \ + (acobject)->auth_info.CCM_ctx_info.block_size_bytes = 16; \ + (acobject)->cipher_ctx_info.block_size_bytes = 16; \ + (acobject)->mac_length = acmaclen; \ + fsl_shw_scco_set_counter_info(&(acobject)->cipher_ctx_info, accounter, \ + FSL_CTR_MOD_128); \ +} + +/*! + * Format the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will also set the IV and CTR values per Appendix A of NIST + * Special Publication 800-38C (May 2004). It will also perform the + * #fsl_shw_acco_set_ccm() operation with information derived from this set of + * parameters. + * + * Note this function assumes the algorithm is AES. It initializes the + * @a auth_object by setting the mode to #FSL_ACC_MODE_CCM and setting the + * flags to be #FSL_ACCO_NIST_CCM. + * + * @param acobject Pointer to object to operate on. + * @param act The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + * @param acad Number of octets of Associated Data (may be zero). + * @param acq A value for the size of the length of @a q field. Valid + * values are 1-8. + * @param acN The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param acQ The value of Q (size of the payload in octets). + * + */ +/* Do we need to stash the +1 value of the CTR somewhere? */ +#define fsl_shw_ccm_nist_format_ctr_and_iv(acobject, act, acad, acq, acN, acQ)\ + { \ + uint64_t Q = acQ; \ + uint8_t bflag = ((acad)?0x40:0) | ((((act)-2)/2)<<3) | ((acq)-1); \ + unsigned i; \ + uint8_t* qptr = (acobject)->auth_info.CCM_ctx_info.context + 15; \ + (acobject)->auth_info.CCM_ctx_info.block_size_bytes = 16; \ + (acobject)->cipher_ctx_info.block_size_bytes = 16; \ + (acobject)->mode = FSL_ACC_MODE_CCM; \ + (acobject)->flags = FSL_ACCO_NIST_CCM; \ + \ + /* Store away the MAC length (after calculating actual value */ \ + (acobject)->mac_length = (act); \ + /* Set Flag field in Block 0 */ \ + *((acobject)->auth_info.CCM_ctx_info.context) = bflag; \ + /* Set Nonce field in Block 0 */ \ + copy_bytes((acobject)->auth_info.CCM_ctx_info.context+1, acN, \ + 15-(acq)); \ + /* Set Flag field in ctr */ \ + *((acobject)->cipher_ctx_info.context) = (acq)-1; \ + /* Update the Q (payload length) field of Block0 */ \ + (acobject)->q_length = acq; \ + for (i = 0; i < (acq); i++) { \ + *qptr-- = Q & 0xFF; \ + Q >>= 8; \ + } \ + /* Set the Nonce field of the ctr */ \ + copy_bytes((acobject)->cipher_ctx_info.context+1, acN, 15-(acq)); \ + /* Clear the block counter field of the ctr */ \ + memset((acobject)->cipher_ctx_info.context+16-(acq), 0, (acq)+1); \ + } + +/*! + * Update the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will set the IV and CTR values per Appendix A of NIST Special + * Publication 800-38C (May 2004). + * + * Note this function assumes that #fsl_shw_ccm_nist_format_ctr_and_iv() has + * previously been called on the @a auth_object. + * + * @param acobject Pointer to object to operate on. + * @param acN The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param acQ The value of Q (size of the payload in octets). + * + */ +/* Do we need to stash the +1 value of the CTR somewhere? */ +#define fsl_shw_ccm_nist_update_ctr_and_iv(acobject, acN, acQ) \ + { \ + uint64_t Q = acQ; \ + unsigned i; \ + uint8_t* qptr = (acobject)->auth_info.CCM_ctx_info.context + 15; \ + \ + /* Update the Nonce field field of Block0 */ \ + copy_bytes((acobject)->auth_info.CCM_ctx_info.context+1, acN, \ + 15 - (acobject)->q_length); \ + /* Update the Q (payload length) field of Block0 */ \ + for (i = 0; i < (acobject)->q_length; i++) { \ + *qptr-- = Q & 0xFF; \ + Q >>= 8; \ + } \ + /* Update the Nonce field of the ctr */ \ + copy_bytes((acobject)->cipher_ctx_info.context+1, acN, \ + 15 - (acobject)->q_length); \ + } + +/****************************************************************************** + * Library functions + *****************************************************************************/ +/* REQ-S2LRD-PINTFC-API-GEN-003 */ +extern fsl_shw_pco_t *fsl_shw_get_capabilities(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-004 */ +extern fsl_shw_return_t fsl_shw_register_user(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-005 */ +extern fsl_shw_return_t fsl_shw_deregister_user(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-006 */ +extern fsl_shw_return_t fsl_shw_get_results(fsl_shw_uco_t * user_ctx, + unsigned result_size, + fsl_shw_result_t results[], + unsigned *result_count); + +extern fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key); + +extern fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key); + +extern fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info); + +extern void *fsl_shw_smalloc(fsl_shw_uco_t * user_ctx, + uint32_t size, + const uint8_t * UMID, uint32_t permissions); + +extern fsl_shw_return_t fsl_shw_sfree(fsl_shw_uco_t * user_ctx, void *address); + +extern fsl_shw_return_t fsl_shw_sstatus(fsl_shw_uco_t * user_ctx, + void *address, + fsl_shw_partition_status_t * status); + +extern fsl_shw_return_t fsl_shw_diminish_perms(fsl_shw_uco_t * user_ctx, + void *address, + uint32_t permissions); + +extern fsl_shw_return_t do_scc_engage_partition(fsl_shw_uco_t * user_ctx, + void *address, + const uint8_t * UMID, + uint32_t permissions); + +extern fsl_shw_return_t do_system_keystore_slot_alloc(fsl_shw_uco_t * user_ctx, + uint32_t key_lenth, + uint64_t ownerid, + uint32_t * slot); + +extern fsl_shw_return_t do_system_keystore_slot_dealloc(fsl_shw_uco_t * + user_ctx, + uint64_t ownerid, + uint32_t slot); + +extern fsl_shw_return_t do_system_keystore_slot_load(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + const uint8_t * key, + uint32_t key_length); + +extern fsl_shw_return_t do_system_keystore_slot_read(fsl_shw_uco_t * user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t * key); + +extern fsl_shw_return_t do_system_keystore_slot_encrypt(fsl_shw_uco_t * + user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + uint8_t * black_data); + +extern fsl_shw_return_t do_system_keystore_slot_decrypt(fsl_shw_uco_t * + user_ctx, + uint64_t ownerid, + uint32_t slot, + uint32_t key_length, + const uint8_t * + black_data); + +extern fsl_shw_return_t +do_scc_encrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode); + +extern fsl_shw_return_t +do_scc_decrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, const uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode); + +extern fsl_shw_return_t +system_keystore_get_slot_info(uint64_t owner_id, uint32_t slot, + uint32_t * address, uint32_t * slot_size_bytes); + +/* REQ-S2LRD-PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +extern fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, + uint8_t * ct); + +/* PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +extern fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, + uint8_t * pt); + +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-005 */ +extern fsl_shw_return_t fsl_shw_hash(fsl_shw_uco_t * user_ctx, + fsl_shw_hco_t * hash_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len); + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-001 */ +extern fsl_shw_return_t fsl_shw_hmac_precompute(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx); + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-002 */ +extern fsl_shw_return_t fsl_shw_hmac(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len); + +/* REQ-S2LRD-PINTFC-API-BASIC-RNG-002 */ +extern fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data); + +extern fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data); + +extern fsl_shw_return_t fsl_shw_gen_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * payload, + uint8_t * ct, uint8_t * auth_value); + +extern fsl_shw_return_t fsl_shw_auth_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * ct, + const uint8_t * auth_value, + uint8_t * payload); + +extern fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * key); + +static inline fsl_shw_return_t fsl_shw_gen_random_pf_key(fsl_shw_uco_t * + user_ctx) +{ + (void)user_ctx; + + return FSL_RETURN_NO_RESOURCE_S; +} + +static inline fsl_shw_return_t fsl_shw_read_tamper_event(fsl_shw_uco_t * + user_ctx, + fsl_shw_tamper_t * + tamperp, + uint64_t * timestampp) +{ + (void)user_ctx; + (void)tamperp; + (void)timestampp; + + return FSL_RETURN_NO_RESOURCE_S; +} + +fsl_shw_return_t sah_Append_Desc(const sah_Mem_Util * mu, + sah_Head_Desc ** desc_head, + const uint32_t header, + sah_Link * link1, sah_Link * link2); + +/* Utility Function leftover from sahara1 API */ +void sah_Descriptor_Chain_Destroy(const sah_Mem_Util * mu, + sah_Head_Desc ** desc_chain); + +/* Utility Function leftover from sahara1 API */ +fsl_shw_return_t sah_Descriptor_Chain_Execute(sah_Head_Desc * desc_chain, + fsl_shw_uco_t * user_ctx); + +fsl_shw_return_t sah_Append_Link(const sah_Mem_Util * mu, + sah_Link * link, + uint8_t * p, + const size_t length, + const sah_Link_Flags flags); + +fsl_shw_return_t sah_Create_Link(const sah_Mem_Util * mu, + sah_Link ** link, + uint8_t * p, + const size_t length, + const sah_Link_Flags flags); + +fsl_shw_return_t sah_Create_Key_Link(const sah_Mem_Util * mu, + sah_Link ** link, + fsl_shw_sko_t * key_info); + +void sah_Destroy_Link(const sah_Mem_Util * mu, sah_Link * link); + +void sah_Postprocess_Results(fsl_shw_uco_t * user_ctx, + sah_results * result_info); + +#endif /* SAHARA2_API_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/platform_abstractions.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/platform_abstractions.h @@ -0,0 +1,15 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file platform_abstractions.h + */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_queue_manager.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_queue_manager.h @@ -0,0 +1,63 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_queue_manager.h +* +* @brief This file definitions for the Queue Manager. + +* The Queue Manager manages additions and removal from the queue and updates +* the status of queue entries. It also calls sah_HW_* functions to interact +* with the hardware. +* +*/ + +#ifndef SAH_QUEUE_MANAGER_H +#define SAH_QUEUE_MANAGER_H + +#include +#include + + +/************************* +* Queue Manager Functions +*************************/ +fsl_shw_return_t sah_Queue_Manager_Init(void); +void sah_Queue_Manager_Close(void); +void sah_Queue_Manager_Reset_Entries(void); +void sah_Queue_Manager_Append_Entry(sah_Head_Desc *entry); +void sah_Queue_Manager_Remove_Entry(sah_Head_Desc *entry); + + +/************************* +* Queue Functions +*************************/ +sah_Queue *sah_Queue_Construct(void); +void sah_Queue_Destroy(sah_Queue *this); +void sah_Queue_Append_Entry(sah_Queue *this, sah_Head_Desc *entry); +void sah_Queue_Remove_Entry(sah_Queue *this); +void sah_Queue_Remove_Any_Entry(sah_Queue *this, sah_Head_Desc *entry); +void sah_postprocess_queue(unsigned long reset_flag); + + +/************************* +* Misc Releated Functions +*************************/ + +int sah_blocking_mode(struct sah_Head_Desc *entry); +fsl_shw_return_t sah_convert_error_status(uint32_t error_status); + + +#endif /* SAH_QUEUE_MANAGER_H */ + +/* End of sah_queue_manager.h */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sah_status_manager.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sah_status_manager.h @@ -0,0 +1,228 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/** +* @file sah_status_manager.h +* +* @brief SAHARA Status Manager Types and Function Prototypes +* +* @author Stuart Holloway (SH) +* +*/ + +#ifndef STATUS_MANAGER_H +#define STATUS_MANAGER_H +#include "sah_driver_common.h" +#include "sahara.h" + + +/****************************************************************************** +* User defined data types +******************************************************************************/ +/** +****************************************************************************** +* sah_Execute_Status +* Types read from SAHARA Status Register, with additional state for Op Status +******************************************************************************/ +typedef enum sah_Execute_Status +{ + /** Sahara is Idle. */ + SAH_EXEC_IDLE = 0, + /** SAHARA is busy performing a resest or processing a decriptor chain. */ + SAH_EXEC_BUSY = 1, + /** An error occurred while SAHARA executed the first descriptor. */ + SAH_EXEC_ERROR1 = 2, + /** SAHARA has failed internally. */ + SAH_EXEC_FAULT = 3, + /** SAHARA has finished processing a descriptor chain and is idle. */ + SAH_EXEC_DONE1 = 4, + /** SAHARA has finished processing a descriptor chain, and is processing a + * second chain. */ + SAH_EXEC_DONE1_BUSY2 = 5, + /** SAHARA has finished processing a descriptor chain, but has generated an + * error while processing a second descriptor chain. */ + SAH_EXEC_DONE1_ERROR2 = 6, + /** SAHARA has finished two descriptors. */ + SAH_EXEC_DONE1_DONE2 = 7, + /** SAHARA has stopped, and first descriptor has Op Status, not Err */ + SAH_EXEC_OPSTAT1 = 0x20, +} sah_Execute_Status; + +/** + * When this bit is on in a #sah_Execute_Status, it means that DONE1 is true. + */ +#define SAH_EXEC_DONE1_BIT 4 + +/** + * Bits which make up the Sahara State + */ +#define SAH_EXEC_STATE_MASK 0x00000007 + +/** +******************************************************************************* +* sah_Execute_Error +* Types read from SAHARA Error Status Register +******************************************************************************/ +typedef enum sah_Execute_Error +{ + /** No Error */ + SAH_ERR_NONE = 0, + /** Header is not valid. */ + SAH_ERR_HEADER = 1, + /** Descriptor length is not correct. */ + SAH_ERR_DESC_LENGTH = 2, + /** Length or pointer field is zero while the other is non-zero. */ + SAH_ERR_DESC_POINTER = 3, + /** Length of the link is not a multiple of 4 and is not the last link */ + SAH_ERR_LINK_LENGTH = 4, + /** The data pointer in a link is zero */ + SAH_ERR_LINK_POINTER = 5, + /** Input Buffer reported an overflow */ + SAH_ERR_INPUT_BUFFER = 6, + /** Output Buffer reported an underflow */ + SAH_ERR_OUTPUT_BUFFER = 7, + /** Incorrect data in output buffer after CHA's has signalled 'done'. */ + SAH_ERR_OUTPUT_BUFFER_STARVATION = 8, + /** Internal Hardware Failure. */ + SAH_ERR_INTERNAL_STATE = 9, + /** Current Descriptor was not legal, but cause is unknown. */ + SAH_ERR_GENERAL_DESCRIPTOR = 10, + /** Reserved pointer fields have been set to 1. */ + SAH_ERR_RESERVED_FIELDS = 11, + /** Descriptor address error */ + SAH_ERR_DESCRIPTOR_ADDRESS = 12, + /** Link address error */ + SAH_ERR_LINK_ADDRESS = 13, + /** Processing error in CHA module */ + SAH_ERR_CHA = 14, + /** Processing error during DMA */ + SAH_ERR_DMA = 15 +} sah_Execute_Error; + + +/** +******************************************************************************* +* sah_CHA_Error_Source +* Types read from SAHARA Error Status Register for CHA Error Source +* +******************************************************************************/ +typedef enum sah_CHA_Error_Source +{ + /** No Error indicated in Source CHA Error. */ + SAH_CHA_NO_ERROR = 0, + /** Error in SKHA module. */ + SAH_CHA_SKHA_ERROR = 1, + /** Error in MDHA module. */ + SAH_CHA_MDHA_ERROR = 2, + /** Error in RNG module. */ + SAH_CHA_RNG_ERROR = 3, + /** Error in PKHA module. */ + SAH_CHA_PKHA_ERROR = 4, +} sah_CHA_Error_Source; + +/** +****************************************************************************** +* sah_CHA_Error_Status +* Types read from SAHARA Error Status Register for CHA Error Status +* +******************************************************************************/ +typedef enum sah_CHA_Error_Status +{ + /** No CHA error detected */ + SAH_CHA_NO_ERR = 0x000, + /** Non-empty input buffer when complete. */ + SAH_CHA_IP_BUF = 0x001, + /** Illegal Address Error. */ + SAH_CHA_ADD_ERR = 0x002, + /** Illegal Mode Error. */ + SAH_CHA_MODE_ERR = 0x004, + /** Illegal Data Size Error. */ + SAH_CHA_DATA_SIZE_ERR = 0x008, + /** Illegal Key Size Error. */ + SAH_CHA_KEY_SIZE_ERR = 0x010, + /** Mode/Context/Key written during processing. */ + SAH_CHA_PROC_ERR = 0x020, + /** Context Read During Processing. */ + SAH_CHA_CTX_READ_ERR = 0x040, + /** Internal Hardware Error. */ + SAH_CHA_INTERNAL_HW_ERR = 0x080, + /** Input Buffer not enabled or underflow. */ + SAH_CHA_IP_BUFF_ERR = 0x100, + /** Output Buffer not enabled or overflow. */ + SAH_CHA_OP_BUFF_ERR = 0x200, + /** DES key parity error (SKHA) */ + SAH_CHA_DES_KEY_ERR = 0x400, + /** Reserved error code. */ + SAH_CHA_RES = 0x800 +} sah_CHA_Error_Status; + +/** +***************************************************************************** +* sah_DMA_Error_Status +* Types read from SAHARA Error Status Register for DMA Error Status +******************************************************************************/ +typedef enum sah_DMA_Error_Status +{ + /** No DMA Error Code. */ + SAH_DMA_NO_ERR = 0, + /** AHB terminated a bus cycle with an error. */ + SAH_DMA_AHB_ERR = 2, + /** Internal IP bus cycle was terminated with an error termination. */ + SAH_DMA_IP_ERR = 4, + /** Parity error detected on DMA command. */ + SAH_DMA_PARITY_ERR = 6, + /** DMA was requested to cross a 256 byte internal address boundary. */ + SAH_DMA_BOUNDRY_ERR = 8, + /** DMA controller is busy */ + SAH_DMA_BUSY_ERR = 10, + /** Memory Bounds Error */ + SAH_DMA_RESERVED_ERR = 12, + /** Internal DMA hardware error detected */ + SAH_DMA_INT_ERR = 14 +} sah_DMA_Error_Status; + +/** +***************************************************************************** +* sah_DMA_Error_Size +* Types read from SAHARA Error Status Register for DMA Error Size +* +******************************************************************************/ +typedef enum sah_DMA_Error_Size +{ + /** Error during Byte transfer. */ + SAH_DMA_SIZE_BYTE = 0, + /** Error during Half-word transfer. */ + SAH_DMA_SIZE_HALF_WORD = 1, + /** Error during Word transfer. */ + SAH_DMA_SIZE_WORD = 2, + /** Reserved DMA word size. */ + SAH_DMA_SIZE_RES = 3 +} sah_DMA_Error_Size; + + + + +extern bool sah_dpm_flag; + +/************************* +* Status Manager Functions +*************************/ + +unsigned long sah_Handle_Interrupt(sah_Execute_Status hw_status); +sah_Head_Desc *sah_Find_With_State (sah_Queue_Status status); +int sah_dpm_init(void); +void sah_dpm_close(void); +void sah_Queue_Manager_Prime (sah_Head_Desc *entry); + + +#endif /* STATUS_MANAGER_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/diagnostic.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/diagnostic.h @@ -0,0 +1,116 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! +* @file diagnostic.h +* +* @brief Macros for outputting kernel and user space diagnostics. +*/ + +#ifndef DIAGNOSTIC_H +#define DIAGNOSTIC_H + +#ifndef __KERNEL__ /* linux flag */ +#include +#endif +#include "fsl_platform.h" + +#if defined(FSL_HAVE_SAHARA2) || defined(FSL_HAVE_SAHARA4) +#define DEV_NAME "sahara" +#elif defined(FSL_HAVE_RNGA) || defined(FSL_HAVE_RNGB) || \ + defined(FSL_HAVE_RNGC) +#define DEV_NAME "shw" +#endif + +/*! +******************************************************************** +* @brief This macro logs diagnostic messages to stderr. +* +* @param diag String that must be logged, char *. +* +* @return void +* +*/ +//#if defined DIAG_SECURITY_FUNC || defined DIAG_ADAPTOR +#define LOG_DIAG(diag) \ +({ \ + const char* fname = strrchr(__FILE__, '/'); \ + \ + sah_Log_Diag(fname ? fname+1 : __FILE__, __LINE__, diag); \ +}) + +#ifdef __KERNEL__ + +#define LOG_DIAG_ARGS(fmt, ...) \ +({ \ + const char* fname = strrchr(__FILE__, '/'); \ + os_printk(KERN_ALERT "%s:%i: " fmt "\n", \ + fname ? fname+1 : __FILE__, \ + __LINE__, \ + __VA_ARGS__); \ +}) + +#else + +#define LOG_DIAG_ARGS(fmt, ...) \ +({ \ + const char* fname = strrchr(__FILE__, '/'); \ + printf("%s:%i: " fmt "\n", \ + fname ? fname+1 : __FILE__, \ + __LINE__, \ + __VA_ARGS__); \ +}) + +#ifndef __KERNEL__ +void sah_Log_Diag(char *source_name, int source_line, char *diag); +#endif +#endif /* if define DIAG_SECURITY_FUNC ... */ + +#ifdef __KERNEL__ +/*! +******************************************************************** +* @brief This macro logs kernel diagnostic messages to the kernel +* log. +* +* @param diag String that must be logged, char *. +* +* @return As for printf() +*/ +#if 0 +#if defined(DIAG_DRV_IF) || defined(DIAG_DRV_QUEUE) || \ + defined(DIAG_DRV_STATUS) || defined(DIAG_DRV_INTERRUPT) || \ + defined(DIAG_MEM) || defined(DIAG_SECURITY_FUNC) || defined(DIAG_ADAPTOR) +#endif +#endif + +#define LOG_KDIAG_ARGS(fmt, ...) \ +({ \ + os_printk (KERN_ALERT "%s (%s:%i): " fmt "\n", \ + DEV_NAME, strrchr(__FILE__, '/')+1, __LINE__, __VA_ARGS__); \ +}) + +#define LOG_KDIAG(diag) \ + os_printk (KERN_ALERT "%s (%s:%i): %s\n", \ + DEV_NAME, strrchr(__FILE__, '/')+1, __LINE__, diag); + +#define sah_Log_Diag(n, l, d) \ + os_printk(KERN_ALERT "%s:%i: %s\n", n, l, d) + +#else /* not KERNEL */ + +#define sah_Log_Diag(n, l, d) \ + printf("%s:%i: %s\n", n, l, d) + +#endif /* __KERNEL__ */ + +#endif /* DIAGNOSTIC_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/fsl_platform.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/fsl_platform.h @@ -0,0 +1,161 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file fsl_platform.h + * + * Header file to isolate code which might be platform-dependent + */ + +#ifndef FSL_PLATFORM_H +#define FSL_PLATFORM_H + +#ifdef __KERNEL__ +#include "portable_os.h" +#endif + +#if defined(FSL_PLATFORM_OTHER) + +/* Have Makefile or other method of setting FSL_HAVE_* flags */ + +#elif defined(CONFIG_ARCH_MX3) /* i.MX31 */ + +#define FSL_HAVE_SCC +#define FSL_HAVE_RTIC +#define FSL_HAVE_RNGA + +#elif defined(CONFIG_ARCH_MX21) + +#define FSL_HAVE_HAC +#define FSL_HAVE_RNGA +#define FSL_HAVE_SCC + +#elif defined(CONFIG_ARCH_MX25) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGB +#define FSL_HAVE_RTIC3 +#define FSL_HAVE_DRYICE + +#elif defined(CONFIG_ARCH_MX27) + +#define FSL_HAVE_SAHARA2 +#define SUBMIT_MULTIPLE_DARS +#define FSL_HAVE_RTIC +#define FSL_HAVE_SCC +#define ALLOW_LLO_DESCRIPTORS + +#elif defined(CONFIG_ARCH_MX35) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGC +#define FSL_HAVE_RTIC + +#elif defined(CONFIG_ARCH_MX37) + +#define FSL_HAVE_SCC2 +#define FSL_HAVE_RNGC +#define FSL_HAVE_RTIC2 +#define FSL_HAVE_SRTC + +#elif defined(CONFIG_ARCH_MX51) + +#define FSL_HAVE_SCC2 +#define FSL_HAVE_SAHARA4 +#define FSL_HAVE_RTIC3 +#define FSL_HAVE_SRTC +#define NO_RESEED_WORKAROUND +#define NEED_CTR_WORKAROUND +#define USE_S2_CCM_ENCRYPT_CHAIN +#define USE_S2_CCM_DECRYPT_CHAIN +#define ALLOW_LLO_DESCRIPTORS + +#elif defined(CONFIG_ARCH_MXC91131) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGC +#define FSL_HAVE_HAC + +#elif defined(CONFIG_ARCH_MXC91221) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGC +#define FSL_HAVE_RTIC2 + +#elif defined(CONFIG_ARCH_MXC91231) + +#define FSL_HAVE_SAHARA2 +#define FSL_HAVE_RTIC +#define FSL_HAVE_SCC +#define NO_OUTPUT_1K_CROSSING + +#elif defined(CONFIG_ARCH_MXC91311) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGC + +#elif defined(CONFIG_ARCH_MXC91314) + +#define FSL_HAVE_SCC +#define FSL_HAVE_SAHAR4 +#define FSL_HAVE_RTIC3 +#define NO_RESEED_WORKAROUND +#define NEED_CTR_WORKAROUND +#define USE_S2_CCM_ENCRYPT_CHAIN +#define USE_S2_CCM_DECRYPT_CHAIN +#define ALLOW_LLO_DESCRIPTORS + +#elif defined(CONFIG_ARCH_MXC91321) + +#define FSL_HAVE_SAHARA2 +#define FSL_HAVE_RTIC +#define FSL_HAVE_SCC +#define SCC_CLOCK_NOT_GATED +#define NO_OUTPUT_1K_CROSSING + +#elif defined(CONFIG_ARCH_MXC92323) + +#define FSL_HAVE_SCC2 +#define FSL_HAVE_SAHARA4 +#define FSL_HAVE_PKHA +#define FSL_HAVE_RTIC2 +#define NO_1K_CROSSING +#define NO_RESEED_WORKAROUND +#define NEED_CTR_WORKAROUND +#define USE_S2_CCM_ENCRYPT_CHAIN +#define USE_S2_CCM_DECRYPT_CHAIN +#define ALLOW_LLO_DESCRIPTORS + + +#elif defined(CONFIG_ARCH_MXC91331) + +#define FSL_HAVE_SCC +#define FSL_HAVE_RNGA +#define FSL_HAVE_HAC +#define FSL_HAVE_RTIC + +#elif defined(CONFIG_8548) + +#define FSL_HAVE_SEC2x + +#elif defined(CONFIG_MPC8374) + +#define FSL_HAVE_SEC3x + +#else + +#error UNKNOWN_PLATFORM + +#endif /* platform checks */ + +#endif /* FSL_PLATFORM_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/sahara2_kernel.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/sahara2_kernel.h @@ -0,0 +1,49 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#define DRIVER_NAME sahara2 + +#define SAHARA_MAJOR_NODE 78 + +#include "portable_os.h" + +#include "platform_abstractions.h" + +/* Forward-declare prototypes using signature macros */ + +OS_DEV_ISR_DCL(sahara2_isr); + +OS_DEV_INIT_DCL(sahara2_init); + +OS_DEV_SHUTDOWN_DCL(sahara2_shutdown); + +OS_DEV_OPEN_DCL(sahara2_open); + +OS_DEV_CLOSE_DCL(sahara2_release); + +OS_DEV_IOCTL_DCL(sahara2_ioctl); + +struct sahara2_kernel_user { + void *command_ring[32]; +}; + +struct sahara2_sym_arg { + char *key; + unsigned key_len; +}; + +/*! These need to be added to Linux / OS abstractions */ +/* +module_init(OS_DEV_INIT_REF(sahara2_init)); +module_cleanup(OS_DEV_SHUTDOWN_REF(sahara2_shutdown)); +*/ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/security/sahara2/include/fsl_shw.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/security/sahara2/include/fsl_shw.h @@ -0,0 +1,2515 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * NOTE TO MAINTAINERS: Although this header file is *the* header file to be + * #include'd by FSL SHW programs, it does not itself make any definitions for + * the API. Instead, it uses the fsl_platform.h file and / or compiler + * environment variables to determine which actual driver header file to + * include. This allows different implementations to contain different + * implementations of the various objects, macros, etc., or even to change + * which functions are macros and which are not. + */ + +/*! + * @file fsl_shw.h + * + * @brief Definition of the Freescale Security Hardware API. + * + * See @ref index for an overview of the API. + */ + +/*! + * @if USE_MAINPAGE + * @mainpage Common API for Freescale Security Hardware (FSL SHW API) + * @endif + * + * @section intro_sec Introduction + * + * This is the interface definition for the Freescale Security Hardware API + * (FSL SHW API) for User Mode and Kernel Mode to access Freescale Security + * Hardware components for cryptographic acceleration. The API is intended to + * provide cross-platform access to security hardware components of Freescale. + * + * This documentation has not been approved, and should not be taken to + * mean anything definite about future direction. + * + * Some example code is provided to give some idea of usage of this API. + * + * Note: This first version has been defined around the capabilities of the + * Sahara2 cryptographic accelerator, and may be expanded in the future to + * provide support for other platforms. The Platform Capabilities Object is + * intended as a way to allow programs to adapt to different platforms. + * + * The i.MX25 is an example of a platform without a SAHARA but yet has + * capabilities supported by this API. These include #fsl_shw_get_random() and + * #fsl_shw_add_entropy(), and the use of Triple-DES (TDEA) cipher algorithm + * (with no checking of key parity supported) in ECB and CBC modes with @ref + * sym_sec. See also the @ref di_sec for information on key handling, and @ref + * td_sec for detection of Tamper Events. Only the random functions are + * available from user space on this platform. + * + * @section usr_ctx The User Context + * + * The User Context Object (#fsl_shw_uco_t) controls the interaction between + * the user program and the API. It is initialized as part of user + * registration (#fsl_shw_register_user()), and is part of every interaction + * thereafter. + * + * @section pf_sec Platform Capabilities + * + * Since this API is not tied to one specific type of hardware or even one + * given version of a given type of hardware, the platform capabilities object + * could be used by a portable program to make choices about using software + * instead of hardware for certain operations. + * + * See the #fsl_shw_pco_t, returned by #fsl_shw_get_capabilities(). + * + * @ref pcoops are provided to query its contents. + * + * + * @section sym_sec Symmetric-Key Encryption and Decryption + * + * Symmetric-Key encryption support is provided for the block cipher algorithms + * AES, DES, and Triple DES. Modes supported are #FSL_SYM_MODE_ECB, + * #FSL_SYM_MODE_CBC, and #FSL_SYM_MODE_CTR, though not necessarily all modes + * for all algorithms. There is also support for the stream cipher algorithm + * commonly known as ARC4. + * + * Encryption and decryption are performed by using the functions + * #fsl_shw_symmetric_encrypt() and #fsl_shw_symmetric_decrypt(), respectively. + * There are two objects which provide information about the operation of these + * functions. They are the #fsl_shw_sko_t, to provide key and algorithm + * information; and the #fsl_shw_scco_t, to provide (and store) initial context + * or counter value information. + * + * CCM is not supported by these functions. For information CCM support, see + * @ref cmb_sec. + * + * + * @section hash_sec Cryptographic Hashing + * + * Hashing is performed by fsl_shw_hash(). Control of the function is through + * flags in the #fsl_shw_hco_t. The algorithms which are + * supported are listed in #fsl_shw_hash_alg_t. + * + * The hashing function works on octet streams. If a user application needs to + * hash a bitstream, it will need to do its own padding of the last block. + * + * + * @section hmac_sec Hashed Message Authentication Codes + * + * An HMAC is a method of combining a hash and a key so that a message cannot + * be faked by a third party. + * + * The #fsl_shw_hmac() can be used by itself for one-shot or multi-step + * operations, or in combination with #fsl_shw_hmac_precompute() to provide the + * ability to compute and save the beginning hashes from a key one time, and + * then use #fsl_shw_hmac() to calculate an HMAC on each message as it is + * processed. + * + * The maximum key length which is directly supported by this API is 64 octets. + * If a longer key size is needed for HMAC, the user will have to hash the key + * and present the digest value as the key to be used by the HMAC functions. + * + * + * @section rnd_sec Random Numbers + * + * Support is available for acquiring random values from a + * cryptographically-strong random number generator. See + * #fsl_shw_get_random(). The function #fsl_shw_add_entropy() may be used to + * add entropy to the random number generator. + * + * + * @section cmb_sec Combined Cipher and Authentication + * + * Some schemes require that messages be encrypted and that they also have an + * authentication code associated with the message. The function + * #fsl_shw_gen_encrypt() will generate the authentication code and encrypt the + * message. + * + * Upon receipt of such a message, the message must be decrypted and the + * authentication code validated. The function + * #fsl_shw_auth_decrypt() will perform these steps. + * + * Only AES-CCM is supported. + * + * + * @section wrap_sec Wrapped Keys + * + * On platforms with a Secure Memory, the function #fsl_shw_establish_key() can + * be used to place a key into the System Keystore. This key then can be used + * directly by the cryptographic hardware. It later then be wrapped + * (cryptographically obscured) by #fsl_shw_extract_key() and stored for later + * use. If a software key (#FSL_SKO_KEY_SW_KEY) was established, then its + * value can be retrieved with a call to #fsl_shw_read_key(). + * + * The wrapping and unwrapping functions provide security against unauthorized + * use and detection of tampering. + * + * The functions can also be used with a User Keystore. + * + * @section smalloc_sec Secure Memory Allocation + * + * On platforms with multiple partitions of Secure Memory, the function + * #fsl_shw_smalloc() can be used to acquire a partition for private use. The + * function #fsl_shw_diminish_perms() can then be used to revoke specific + * permissions on the partition, and #fsl_shw_sfree() can be used to release the + * partition. + * + * @section keystore_sec User Keystore + * + * User Keystore functionality is defined in fsl_shw_keystore.h. See @ref + * user_keystore for details. This is not supported on platforms without SCC2. + * + * @section di_sec Hardware key-select extensions - DryIce + * + * Some platforms have a component called DryIce which allows the software to + * control which key will be used by the secure memory encryption hardware. + * The choices are the secret per-chip Fused (IIM) Key, an unknown, hardware- + * generated Random Key, a software-written Programmed Key, or the IIM Key in + * combination with one of the others. #fsl_shw_pco_check_pk_supported() can + * be used to determine whether this feature is available on the platform. + * The rest of this section will explain the symmetric ciphering and key + * operations which are available on such a platform. + * + * The function #fsl_shw_sko_init_pf_key() will set up a Secret Key Object to + * refer to one of the system's platform keys. All keys which reference a + * platform key must use this initialization function, including a user- + * provided key value. Keys which are intended for software encryption must + * use #fsl_shw_sko_init(). + * + * To change the setting of the Programmed Key of the DryIce module, + * #fsl_shw_establish_key() must be called with a platform key object of type + * #FSL_SHW_PF_KEY_PRG or #FSL_SHW_PF_KEY_IIM_PRG. The key will be go + * into the PK register of DryIce and not to the keystore. Any symmetric + * operation which references either #FSL_SHW_PF_KEY_PRG or + * #FSL_SHW_PF_KEY_IIM_PRG will use the current PK value (possibly modified by + * the secret fused IIM key). Before the Flatform Key can be changed, a call to + * #fsl_shw_release_key() or #fsl_shw_extract_key() must be made. Neither + * function will change the value in the PK registers, and further ciphering + * can take place. + * + * When #fsl_shw_establish_key() is called to change the PK value, a plaintext + * key can be passed in with the #FSL_KEY_WRAP_ACCEPT argument or a previously + * wrapped key can be passed in with the #FSL_KEY_WRAP_UNWRAP argument. If + * #FSL_KEY_WRAP_CREATE is passed in, then a random value will be loaded into + * the PK register. The PK value can be wrapped by a call to + * #fsl_shw_extract_key() for later use with the #FSL_KEY_WRAP_UNWRAP argument. + * + * As an alternative to using only the fused key for @ref wrap_sec, + * #fsl_shw_uco_set_wrap_key() can be used to select either the random key or + * the random key with the fused key as the key which will be used to protect + * the one-time value used to wrap the key. This allows for these + * wrapped keys to be dependent upon and therefore unrecoverable after a tamper + * event causes the erasure of the DryIce Random Key register. + * + * The software can request that the hardware generate a (new) Random Key for + * DryIce by calling #fsl_shw_gen_random_pf_key(). + * + * + * @section td_sec Device Tamper-Detection + * + * Some platforms have a component which can detect certain types of tampering + * with the hardware. #fsl_shw_read_tamper_event() API will allow the + * retrieval of the type of event which caused a tamper-detection failure. + * + */ + +/*! @defgroup glossary Glossary + * + * @li @b AES - Advanced Encryption Standard - An NIST-created block cipher + * originally knowns as Rijndael. + * @li @b ARC4 - ARCFOUR - An S-Box-based OFB mode stream cipher. + * @li @b CBC - Cipher-Block Chaining - Each encrypted block is XORed with the + * result of the previous block's encryption. + * @li @b CCM - A way of combining CBC and CTR to perform cipher and + * authentication. + * @li @b ciphertext - @a plaintext which has been encrypted in some fashion. + * @li @b context - Information on the state of a cryptographic operation, + * excluding any key. This could include IV, Counter Value, or SBox. + * @li @b CTR - A mode where a counter value is encrypted and then XORed with + * the data. After each block, the counter value is incremented. + * @li @b DES - Data Encryption Standard - An 8-octet-block cipher. + * @li @b ECB - Electronic Codebook - A straight encryption/decryption of the + * data. + * @li @b hash - A cryptographically strong one-way function performed on data. + * @li @b HMAC - Hashed Message Authentication Code - A key-dependent one-way + * hash result, used to verify authenticity of a message. The equation + * for an HMAC is hash((K + A) || hash((K + B) || msg)), where K is the + * key, A is the constant for the outer hash, B is the constant for the + * inner hash, and hash is the hashing function (MD5, SHA256, etc). + * @li @b IPAD - In an HMAC operation, the context generated by XORing the key + * with a constant and then hashing that value as the first block of the + * inner hash. + * @li @b IV - An "Initial Vector" or @a context for modes like CBC. + * @li @b MAC - A Message Authentication Code. HMAC, hashing, and CCM all + * produce a MAC. + * @li @b mode - A way of using a cryptographic algorithm. See ECB, CBC, etc. + * @li @b MD5 - Message Digest 5 - A one-way hash function. + * @li @b plaintext - Data which has not been encrypted, or has been decrypted + * from @a ciphertext. + * @li @b OPAD - In an HMAC operation, the context generated by XORing the key + * with a constant and then hashing that value as the first block of the + * outer hash. + * @li @b SHA - Secure Hash Algorithm - A one-way hash function. + * @li @b TDES - AKA @b 3DES - Triple Data Encryption Standard - A method of + * using two or three keys and DES to perform three operations (encrypt + * decrypt encrypt) to create a new algorithm. + * @li @b XOR - Exclusive-OR. A Boolean arithmetic function. + * @li @b Wrapped value - A (key) which has been encrypted into an opaque datum + * which cannot be unwrapped (decrypted) for use except by an authorized + * user. Once created, the key is never visible, but may be used for + * other cryptographic operations. + */ + +#ifndef FSL_SHW_H +#define FSL_SHW_H + +/* Set FSL_HAVE_* flags */ + +#include "fsl_platform.h" + +#ifndef API_DOC + +#if defined(FSL_HAVE_SAHARA2) || defined(FSL_HAVE_SAHARA4) + +#include "sahara.h" + +#else + +#if defined(FSL_HAVE_RNGA) || defined(FSL_HAVE_RNGB) || defined(FSL_HAVE_RNGC) + +#include "rng_driver.h" + +#else + +#error FSL_SHW_API_platform_not_recognized + +#endif + +#endif /* HAVE SAHARA */ + +#else /* API_DOC */ + +#include /* for uint32_t, etc. */ +#include /* Mainly for definition of NULL !! */ + +/* These groups will appear in the order in which they are defined. */ + +/*! + * @defgroup strgrp Objects + * + * These objects are used to pass information into and out of the API. Through + * flags and other settings, they control the behavior of the @ref opfuns. + * + * They are manipulated and queried by use of the various access functions. + * There are different sets defined for each object. See @ref objman. + */ + +/*! + * @defgroup consgrp Enumerations and other Constants + * + * This collection of symbols comprise the values which can be passed into + * various functions to control how the API will work. + */ + +/*! @defgroup opfuns Operational Functions + * + * These functions request that the underlying hardware perform cryptographic + * operations. They are the heart of the API. + */ + +/****** Organization the Object Operations under one group ! **********/ +/*! @defgroup objman Object-Manipulation Operations + * + */ +/*! @addtogroup objman + @{ */ +/*! + * @defgroup pcoops Platform Context Object Operations + * + * The Platform Context object is "read-only", so only query operations are + * provided for it. It is returned by the #fsl_shw_get_capabilities() + * function. + */ + +/*! @defgroup ucoops User Context Operations + * + * These operations should be the only access to the #fsl_shw_uco_t + * type/struct, as the internal members of the object are subject to change. + * The #fsl_shw_uco_init() function must be called before any other use of the + * object. + */ + +/*! + * @defgroup rops Result Object Operations + * + * As the Result Object contains the result of one of the @ref opfuns. The + * manipulations provided are query-only. No initialization is needed for this + * object. + */ + +/*! + * @defgroup skoops Secret Key Object Operations + * + * These operations should be the only access to the #fsl_shw_sko_t + * type/struct, as the internal members of that object are subject to change. + */ + +/*! + * @defgroup ksoops Keystore Object Operations + * + * These operations should be the only access to the #fsl_shw_kso_t + * type/struct, as the internal members of that object are subject to change. + */ + +/*! + * @defgroup hcops Hash Context Object Operations + * + * These operations should be the only access to the #fsl_shw_hco_t + * type/struct, as the internal members of that object are subject to change. + */ + +/*! + * @defgroup hmcops HMAC Context Object Operations + * + * These operations should be the only access to the #fsl_shw_hmco_t + * type/struct, as the internal members of that object are subject to change. + */ + +/*! + * @defgroup sccops Symmetric Cipher Context Operations + * + * These operations should be the only access to the #fsl_shw_scco_t + * type/struct, as the internal members of that object are subject to change + */ + +/*! @defgroup accoops Authentication-Cipher Context Object Operations + * + * These functions operate on a #fsl_shw_acco_t. Their purpose is to set + * flags, fields, etc., in order to control the operation of + * #fsl_shw_gen_encrypt() and #fsl_shw_auth_decrypt(). + */ + + /* @} *//************ END GROUPING of Object Manipulations *****************/ + +/*! @defgroup miscfuns Miscellaneous Functions + * + * These functions are neither @ref opfuns nor @ref objman. Their behavior + * does not depend upon the flags in the #fsl_shw_uco_t, yet they may involve + * more interaction with the library and the kernel than simply querying an + * object. + */ + +/****************************************************************************** + * Enumerations + *****************************************************************************/ +/*! @addtogroup consgrp + @{ */ + +/*! + * Flags for the state of the User Context Object (#fsl_shw_uco_t). + * + * These flags describe how the @ref opfuns will operate. + */ +typedef enum fsl_shw_user_ctx_flags_t { + /*! + * API will block the caller until operation completes. The result will be + * available in the return code. If this is not set, user will have to get + * results using #fsl_shw_get_results(). + */ + FSL_UCO_BLOCKING_MODE, + /*! + * User wants callback (at the function specified with + * #fsl_shw_uco_set_callback()) when the operation completes. This flag is + * valid only if #FSL_UCO_BLOCKING_MODE is not set. + */ + FSL_UCO_CALLBACK_MODE, + /*! Do not free descriptor chain after driver (adaptor) finishes */ + FSL_UCO_SAVE_DESC_CHAIN, + /*! + * User has made at least one request with callbacks requested, so API is + * ready to handle others. + */ + FSL_UCO_CALLBACK_SETUP_COMPLETE, + /*! + * (virtual) pointer to descriptor chain is completely linked with physical + * (DMA) addresses, ready for the hardware. This flag should not be used + * by FSL SHW API programs. + */ + FSL_UCO_CHAIN_PREPHYSICALIZED, + /*! + * The user has changed the context but the changes have not been copied to + * the kernel driver. + */ + FSL_UCO_CONTEXT_CHANGED, + /*! Internal Use. This context belongs to a user-mode API user. */ + FSL_UCO_USERMODE_USER, +} fsl_shw_user_ctx_flags_t; + +/*! + * Return code for FSL_SHW library. + * + * These codes may be returned from a function call. In non-blocking mode, + * they will appear as the status in a Result Object. + */ +typedef enum fsl_shw_return_t { + /*! + * No error. As a function return code in Non-blocking mode, this may + * simply mean that the operation was accepted for eventual execution. + */ + FSL_RETURN_OK_S = 0, + /*! Failure for non-specific reason. */ + FSL_RETURN_ERROR_S, + /*! + * Operation failed because some resource was not able to be allocated. + */ + FSL_RETURN_NO_RESOURCE_S, + /*! Crypto algorithm unrecognized or improper. */ + FSL_RETURN_BAD_ALGORITHM_S, + /*! Crypto mode unrecognized or improper. */ + FSL_RETURN_BAD_MODE_S, + /*! Flag setting unrecognized or inconsistent. */ + FSL_RETURN_BAD_FLAG_S, + /*! Improper or unsupported key length for algorithm. */ + FSL_RETURN_BAD_KEY_LENGTH_S, + /*! Improper parity in a (DES, TDES) key. */ + FSL_RETURN_BAD_KEY_PARITY_S, + /*! + * Improper or unsupported data length for algorithm or internal buffer. + */ + FSL_RETURN_BAD_DATA_LENGTH_S, + /*! Authentication / Integrity Check code check failed. */ + FSL_RETURN_AUTH_FAILED_S, + /*! A memory error occurred. */ + FSL_RETURN_MEMORY_ERROR_S, + /*! An error internal to the hardware occurred. */ + FSL_RETURN_INTERNAL_ERROR_S, + /*! ECC detected Point at Infinity */ + FSL_RETURN_POINT_AT_INFINITY_S, + /*! ECC detected No Point at Infinity */ + FSL_RETURN_POINT_NOT_AT_INFINITY_S, + /*! GCD is One */ + FSL_RETURN_GCD_IS_ONE_S, + /*! GCD is not One */ + FSL_RETURN_GCD_IS_NOT_ONE_S, + /*! Candidate is Prime */ + FSL_RETURN_PRIME_S, + /*! Candidate is not Prime */ + FSL_RETURN_NOT_PRIME_S, + /*! N register loaded improperly with even value */ + FSL_RETURN_EVEN_MODULUS_ERROR_S, + /*! Divisor is zero. */ + FSL_RETURN_DIVIDE_BY_ZERO_ERROR_S, + /*! Bad Exponent or Scalar value for Point Multiply */ + FSL_RETURN_BAD_EXPONENT_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_OSCILLATOR_ERROR_S, + /*! RNG hardware problem. */ + FSL_RETURN_STATISTICS_ERROR_S, +} fsl_shw_return_t; + +/*! + * Algorithm Identifier. + * + * Selection of algorithm will determine how large the block size of the + * algorithm is. Context size is the same length unless otherwise specified. + * Selection of algorithm also affects the allowable key length. + */ +typedef enum fsl_shw_key_alg_t { + FSL_KEY_ALG_HMAC, /*!< Key will be used to perform an HMAC. Key + size is 1 to 64 octets. Block size is 64 + octets. */ + FSL_KEY_ALG_AES, /*!< Advanced Encryption Standard (Rijndael). + Block size is 16 octets. Key size is 16 + octets. (The single choice of key size is a + Sahara platform limitation.) */ + FSL_KEY_ALG_DES, /*!< Data Encryption Standard. Block size is + 8 octets. Key size is 8 octets. */ + FSL_KEY_ALG_TDES, /*!< 2- or 3-key Triple DES. Block size is 8 + octets. Key size is 16 octets for 2-key + Triple DES, and 24 octets for 3-key. */ + FSL_KEY_ALG_ARC4 /*!< ARC4. No block size. Context size is 259 + octets. Allowed key size is 1-16 octets. + (The choices for key size are a Sahara + platform limitation.) */ +} fsl_shw_key_alg_t; + +/*! + * Mode selector for Symmetric Ciphers. + * + * The selection of mode determines how a cryptographic algorithm will be + * used to process the plaintext or ciphertext. + * + * For all modes which are run block-by-block (that is, all but + * #FSL_SYM_MODE_STREAM), any partial operations must be performed on a text + * length which is multiple of the block size. Except for #FSL_SYM_MODE_CTR, + * these block-by-block algorithms must also be passed a total number of octets + * which is a multiple of the block size. + * + * In modes which require that the total number of octets of data be a multiple + * of the block size (#FSL_SYM_MODE_ECB and #FSL_SYM_MODE_CBC), and the user + * has a total number of octets which are not a multiple of the block size, the + * user must perform any necessary padding to get to the correct data length. + */ +typedef enum fsl_shw_sym_mode_t { + /*! + * Stream. There is no associated block size. Any request to process data + * may be of any length. This mode is only for ARC4 operations, and is + * also the only mode used for ARC4. + */ + FSL_SYM_MODE_STREAM, + + /*! + * Electronic Codebook. Each block of data is encrypted/decrypted. The + * length of the data stream must be a multiple of the block size. This + * mode may be used for DES, 3DES, and AES. The block size is determined + * by the algorithm. + */ + FSL_SYM_MODE_ECB, + /*! + * Cipher-Block Chaining. Each block of data is encrypted/decrypted and + * then "chained" with the previous block by an XOR function. Requires + * context to start the XOR (previous block). This mode may be used for + * DES, 3DES, and AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CBC, + /*! + * Counter. The counter is encrypted, then XORed with a block of data. + * The counter is then incremented (using modulus arithmetic) for the next + * block. The final operation may be non-multiple of block size. This mode + * may be used for AES. The block size is determined by the algorithm. + */ + FSL_SYM_MODE_CTR, +} fsl_shw_sym_mode_t; + +/*! + * Algorithm selector for Cryptographic Hash functions. + * + * Selection of algorithm determines how large the context and digest will be. + * Context is the same size as the digest (resulting hash), unless otherwise + * specified. + */ +typedef enum fsl_shw_hash_alg_t { + FSL_HASH_ALG_MD5, /*!< MD5 algorithm. Digest is 16 octets. */ + FSL_HASH_ALG_SHA1, /*!< SHA-1 (aka SHA or SHA-160) algorithm. + Digest is 20 octets. */ + FSL_HASH_ALG_SHA224, /*!< SHA-224 algorithm. Digest is 28 octets, + though context is 32 octets. */ + FSL_HASH_ALG_SHA256 /*!< SHA-256 algorithm. Digest is 32 + octets. */ +} fsl_shw_hash_alg_t; + +/*! + * The type of Authentication-Cipher function which will be performed. + */ +typedef enum fsl_shw_acc_mode_t { + /*! + * CBC-MAC for Counter. Requires context and modulus. Final operation may + * be non-multiple of block size. This mode may be used for AES. + */ + FSL_ACC_MODE_CCM, + /*! + * SSL mode. Not supported. Combines HMAC and encrypt (or decrypt). + * Needs one key object for encryption, another for the HMAC. The usual + * hashing and symmetric encryption algorithms are supported. + */ + FSL_ACC_MODE_SSL, +} fsl_shw_acc_mode_t; + +/*! + * The operation which controls the behavior of #fsl_shw_establish_key(). + * + * These values are passed to #fsl_shw_establish_key(). + */ +typedef enum fsl_shw_key_wrap_t { + FSL_KEY_WRAP_CREATE, /*!< Generate a key from random values. */ + FSL_KEY_WRAP_ACCEPT, /*!< Use the provided clear key. */ + FSL_KEY_WRAP_UNWRAP /*!< Unwrap a previously wrapped key. */ +} fsl_shw_key_wrap_t; + +/* REQ-S2LRD-PINTFC-COA-HCO-001 */ +/*! + * Flags which control a Hash operation. + * + * These may be combined by ORing them together. See #fsl_shw_hco_set_flags() + * and #fsl_shw_hco_clear_flags(). + */ +typedef enum fsl_shw_hash_ctx_flags_t { + FSL_HASH_FLAGS_INIT = 1, /*!< Context is empty. Hash is started + from scratch, with a message-processed + count of zero. */ + FSL_HASH_FLAGS_SAVE = 2, /*!< Retrieve context from hardware after + hashing. If used with the + #FSL_HASH_FLAGS_FINALIZE flag, the final + digest value will be saved in the + object. */ + FSL_HASH_FLAGS_LOAD = 4, /*!< Place context into hardware before + hashing. */ + FSL_HASH_FLAGS_FINALIZE = 8, /*!< PAD message and perform final digest + operation. If user message is + pre-padded, this flag should not be + used. */ +} fsl_shw_hash_ctx_flags_t; + +/*! + * Flags which control an HMAC operation. + * + * These may be combined by ORing them together. See #fsl_shw_hmco_set_flags() + * and #fsl_shw_hmco_clear_flags(). + */ +typedef enum fsl_shw_hmac_ctx_flags_t { + FSL_HMAC_FLAGS_INIT = 1, /*!< Message context is empty. HMAC is + started from scratch (with key) or from + precompute of inner hash, depending on + whether + #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT is + set. */ + FSL_HMAC_FLAGS_SAVE = 2, /*!< Retrieve ongoing context from hardware + after hashing. If used with the + #FSL_HMAC_FLAGS_FINALIZE flag, the final + digest value (HMAC) will be saved in the + object. */ + FSL_HMAC_FLAGS_LOAD = 4, /*!< Place ongoing context into hardware + before hashing. */ + FSL_HMAC_FLAGS_FINALIZE = 8, /*!< PAD message and perform final HMAC + operations of inner and outer hashes. */ + FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT = 16 /*!< This means that the context + contains precomputed inner and outer + hash values. */ +} fsl_shw_hmac_ctx_flags_t; + +/*! + * Flags to control use of the #fsl_shw_scco_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_scco_set_flags() and #fsl_shw_scco_clear_flags() + */ +typedef enum fsl_shw_sym_ctx_flags_t { + /*! + * Context is empty. In ARC4, this means that the S-Box needs to be + * generated from the key. In #FSL_SYM_MODE_CBC mode, this allows an IV of + * zero to be specified. In #FSL_SYM_MODE_CTR mode, it means that an + * initial CTR value of zero is desired. + */ + FSL_SYM_CTX_INIT = 1, + /*! + * Load context from object into hardware before running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_LOAD = 2, + /*! + * Save context from hardware into object after running cipher. In + * #FSL_SYM_MODE_CTR mode, this would refer to the Counter Value. + */ + FSL_SYM_CTX_SAVE = 4, + /*! + * Context (SBox) is to be unwrapped and wrapped on each use. + * This flag is unsupported. + * */ + FSL_SYM_CTX_PROTECT = 8, +} fsl_shw_sym_ctx_flags_t; + +/*! + * Flags which describe the state of the #fsl_shw_sko_t. + * + * These may be ORed together to get the desired effect. + * See #fsl_shw_sko_set_flags() and #fsl_shw_sko_clear_flags() + */ +typedef enum fsl_shw_key_flags_t { + FSL_SKO_KEY_IGNORE_PARITY = 1, /*!< If algorithm is DES or 3DES, do not + validate the key parity bits. */ + FSL_SKO_KEY_PRESENT = 2, /*!< Clear key is present in the object. */ + FSL_SKO_KEY_ESTABLISHED = 4, /*!< Key has been established for use. This + feature is not available for all + platforms, nor for all algorithms and + modes. */ + FSL_SKO_KEY_SW_KEY = 8, /*!< This key is for software use, and can + be copied out of a keystore by its owner. + The default is that they key is available + only for hardware (or security driver) + use. */ +} fsl_shw_key_flags_t; + +/*! + * Type of value which is associated with an established key. + */ +typedef uint64_t key_userid_t; + +/*! + * Flags which describe the state of the #fsl_shw_acco_t. + * + * The @a FSL_ACCO_CTX_INIT and @a FSL_ACCO_CTX_FINALIZE flags, when used + * together, provide for a one-shot operation. + */ +typedef enum fsl_shw_auth_ctx_flags_t { + FSL_ACCO_CTX_INIT = 1, /*!< Initialize Context(s) */ + FSL_ACCO_CTX_LOAD = 2, /*!< Load intermediate context(s). + This flag is unsupported. */ + FSL_ACCO_CTX_SAVE = 4, /*!< Save intermediate context(s). + This flag is unsupported. */ + FSL_ACCO_CTX_FINALIZE = 8, /*!< Create MAC during this operation. */ + FSL_ACCO_NIST_CCM = 16, /*!< Formatting of CCM input data is + performed by calls to + #fsl_shw_ccm_nist_format_ctr_and_iv() and + #fsl_shw_ccm_nist_update_ctr_and_iv(). */ +} fsl_shw_auth_ctx_flags_t; + +/*! + * Modulus Selector for CTR modes. + * + * The incrementing of the Counter value may be modified by a modulus. If no + * modulus is needed or desired for AES, use #FSL_CTR_MOD_128. + */ +typedef enum fsl_shw_ctr_mod_t { + FSL_CTR_MOD_8, /*!< Run counter with modulus of 2^8. */ + FSL_CTR_MOD_16, /*!< Run counter with modulus of 2^16. */ + FSL_CTR_MOD_24, /*!< Run counter with modulus of 2^24. */ + FSL_CTR_MOD_32, /*!< Run counter with modulus of 2^32. */ + FSL_CTR_MOD_40, /*!< Run counter with modulus of 2^40. */ + FSL_CTR_MOD_48, /*!< Run counter with modulus of 2^48. */ + FSL_CTR_MOD_56, /*!< Run counter with modulus of 2^56. */ + FSL_CTR_MOD_64, /*!< Run counter with modulus of 2^64. */ + FSL_CTR_MOD_72, /*!< Run counter with modulus of 2^72. */ + FSL_CTR_MOD_80, /*!< Run counter with modulus of 2^80. */ + FSL_CTR_MOD_88, /*!< Run counter with modulus of 2^88. */ + FSL_CTR_MOD_96, /*!< Run counter with modulus of 2^96. */ + FSL_CTR_MOD_104, /*!< Run counter with modulus of 2^104. */ + FSL_CTR_MOD_112, /*!< Run counter with modulus of 2^112. */ + FSL_CTR_MOD_120, /*!< Run counter with modulus of 2^120. */ + FSL_CTR_MOD_128 /*!< Run counter with modulus of 2^128. */ +} fsl_shw_ctr_mod_t; + +/*! + * Permissions flags for Secure Partitions + * + * They currently map directly to the SCC2 hardware values, but this is not + * guarinteed behavior. + */ +typedef enum fsl_shw_permission_t { +/*! SCM Access Permission: Do not zeroize/deallocate partition on SMN Fail state */ + FSL_PERM_NO_ZEROIZE, +/*! SCM Access Permission: Enforce trusted key read in */ + FSL_PERM_TRUSTED_KEY_READ, +/*! SCM Access Permission: Ignore Supervisor/User mode in permission determination */ + FSL_PERM_HD_S, +/*! SCM Access Permission: Allow Read Access to Host Domain */ + FSL_PERM_HD_R, +/*! SCM Access Permission: Allow Write Access to Host Domain */ + FSL_PERM_HD_W, +/*! SCM Access Permission: Allow Execute Access to Host Domain */ + FSL_PERM_HD_X, +/*! SCM Access Permission: Allow Read Access to Trusted Host Domain */ + FSL_PERM_TH_R, +/*! SCM Access Permission: Allow Write Access to Trusted Host Domain */ + FSL_PERM_TH_W, +/*! SCM Access Permission: Allow Read Access to Other/World Domain */ + FSL_PERM_OT_R, +/*! SCM Access Permission: Allow Write Access to Other/World Domain */ + FSL_PERM_OT_W, +/*! SCM Access Permission: Allow Execute Access to Other/World Domain */ + FSL_PERM_OT_X, +} fsl_shw_permission_t; + +/*! + * Select the cypher mode to use for partition cover/uncover operations. + * + * They currently map directly to the values used in the SCC2 driver, but this + * is not guarinteed behavior. + */ +typedef enum fsl_shw_cypher_mode_t { + FSL_SHW_CYPHER_MODE_ECB, /*!< ECB mode */ + FSL_SHW_CYPHER_MODE_CBC, /*!< CBC mode */ +} fsl_shw_cypher_mode_t; + +/*! + * Which platform key should be presented for cryptographic use. + */ +typedef enum fsl_shw_pf_key_t { + FSL_SHW_PF_KEY_IIM, /*!< Present fused IIM key */ + FSL_SHW_PF_KEY_PRG, /*!< Present Program key */ + FSL_SHW_PF_KEY_IIM_PRG, /*!< Present IIM ^ Program key */ + FSL_SHW_PF_KEY_IIM_RND, /*!< Present Random key */ + FSL_SHW_PF_KEY_RND, /*!< Present IIM ^ Random key */ +} fsl_shw_pf_key_t; + +/*! + * The various security tamper events + */ +typedef enum fsl_shw_tamper_t { + FSL_SHW_TAMPER_NONE, /*!< No error detected */ + FSL_SHW_TAMPER_WTD, /*!< wire-mesh tampering det */ + FSL_SHW_TAMPER_ETBD, /*!< ext tampering det: input B */ + FSL_SHW_TAMPER_ETAD, /*!< ext tampering det: input A */ + FSL_SHW_TAMPER_EBD, /*!< external boot detected */ + FSL_SHW_TAMPER_SAD, /*!< security alarm detected */ + FSL_SHW_TAMPER_TTD, /*!< temperature tampering det */ + FSL_SHW_TAMPER_CTD, /*!< clock tampering det */ + FSL_SHW_TAMPER_VTD, /*!< voltage tampering det */ + FSL_SHW_TAMPER_MCO, /*!< monotonic counter overflow */ + FSL_SHW_TAMPER_TCO, /*!< time counter overflow */ +} fsl_shw_tamper_t; + +/*! @} *//* consgrp */ + +/****************************************************************************** + * Data Structures + *****************************************************************************/ +/*! @addtogroup strgrp + @{ */ + +/* REQ-S2LRD-PINTFC-COA-IBO-001 */ +/*! + * Application Initialization Object + * + * This object, the operations on it, and its interaction with the driver are + * TBD. + */ +typedef struct fsl_sho_ibo_t { +} fsl_sho_ibo_t; + +/* REQ-S2LRD-PINTFC-COA-UCO-001 */ +/*! + * User Context Object + * + * This object must be initialized by a call to #fsl_shw_uco_init(). It must + * then be passed to #fsl_shw_register_user() before it can be used in any + * calls besides those in @ref ucoops. + * + * It contains the user's configuration for the API, for instance whether an + * operation should block, or instead should call back the user upon completion + * of the operation. + * + * See @ref ucoops for further information. + */ +typedef struct fsl_shw_uco_t { /* fsl_shw_user_context_object */ +} fsl_shw_uco_t; + +/* REQ-S2LRD-PINTFC-API-GEN-006 ?? */ +/*! + * Result Object + * + * This object will contain success and failure information about a specific + * cryptographic request which has been made. + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref rops. + */ +typedef struct fsl_shw_result_t { /* fsl_shw_result */ +} fsl_shw_result_t; + +/*! + * Keystore Object + * + * This object holds the context of a user keystore, including the functions + * that define the interface and pointers to where the key data is stored. The + * user must supply a set of functions to handle keystore management, including + * slot allocation, deallocation, etc. A default keystore manager is provided + * as part of the API. + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref ksoops. + */ +typedef struct fsl_shw_kso_t { /* fsl_shw_keystore_object */ +} fsl_shw_kso_t; + +/* REQ-S2LRD-PINTFC-COA-SKO-001 */ +/*! + * Secret Key Object + * + * This object contains a key for a cryptographic operation, and information + * about its current state, its intended usage, etc. It may instead contain + * information about a protected key, or an indication to use a platform- + * specific secret key. + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref skoops. + */ +typedef struct fsl_shw_sko_t { /* fsl_shw_secret_key_object */ +} fsl_shw_sko_t; + +/* REQ-S2LRD-PINTFC-COA-CO-001 */ +/*! + * Platform Capabilities Object + * + * This object will contain information about the cryptographic features of the + * platform which the program is running on. + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. + * + * See @ref pcoops. + */ +typedef struct fsl_shw_pco_t { /* fsl_shw_platform_capabilities_object */ +} fsl_shw_pco_t; + +/* REQ-S2LRD-PINTFC-COA-HCO-001 */ +/*! + * Hash Context Object + * + * This object contains information to control hashing functions. + + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref hcops. + */ +typedef struct fsl_shw_hco_t { /* fsl_shw_hash_context_object */ +} fsl_shw_hco_t; + +/*! + * HMAC Context Object + * + * This object contains information to control HMAC functions. + + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref hmcops. + */ +typedef struct fsl_shw_hmco_t { /* fsl_shw_hmac_context_object */ +} fsl_shw_hmco_t; + +/* REQ-S2LRD-PINTFC-COA-SCCO-001 */ +/*! + * Symmetric Cipher Context Object + * + * This object contains information to control Symmetric Ciphering encrypt and + * decrypt functions in #FSL_SYM_MODE_STREAM (ARC4), #FSL_SYM_MODE_ECB, + * #FSL_SYM_MODE_CBC, and #FSL_SYM_MODE_CTR modes and the + * #fsl_shw_symmetric_encrypt() and #fsl_shw_symmetric_decrypt() functions. + * CCM mode is controlled with the #fsl_shw_acco_t object. + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref sccops. + */ +typedef struct fsl_shw_scco_t { /* fsl_shw_symmetric_cipher_context_object */ +} fsl_shw_scco_t; + +/*! + * Authenticate-Cipher Context Object + + * An object for controlling the function of, and holding information about, + * data for the authenticate-cipher functions, #fsl_shw_gen_encrypt() and + * #fsl_shw_auth_decrypt(). + * + * No direct access to its members should be made by programs. Instead, the + * object should be manipulated using the provided functions. See @ref + * accoops. + */ +typedef struct fsl_shw_acco_t { /* fsl_shw_authenticate_cipher_context_object */ +} fsl_shw_acco_t; + /*! @} *//* strgrp */ + +/****************************************************************************** + * Access Macros for Objects + *****************************************************************************/ +/*! @addtogroup pcoops + @{ */ + +/*! + * Get FSL SHW API version + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] major A pointer to where the major version + * of the API is to be stored. + * @param[out] minor A pointer to where the minor version + * of the API is to be stored. + */ +void fsl_shw_pco_get_version(const fsl_shw_pco_t * pc_info, + uint32_t * major, uint32_t * minor); + +/*! + * Get underlying driver version. + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] major A pointer to where the major version + * of the driver is to be stored. + * @param[out] minor A pointer to where the minor version + * of the driver is to be stored. + */ +void fsl_shw_pco_get_driver_version(const fsl_shw_pco_t * pc_info, + uint32_t * major, uint32_t * minor); + +/*! + * Get list of symmetric algorithms supported. + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] algorithms A pointer to where to store the location of + * the list of algorithms. + * @param[out] algorithm_count A pointer to where to store the number of + * algorithms in the list at @a algorithms. + */ +void fsl_shw_pco_get_sym_algorithms(const fsl_shw_pco_t * pc_info, + fsl_shw_key_alg_t * algorithms[], + uint8_t * algorithm_count); + +/*! + * Get list of symmetric modes supported. + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] modes A pointer to where to store the location of + * the list of modes. + * @param[out] mode_count A pointer to where to store the number of + * algorithms in the list at @a modes. + */ +void fsl_shw_pco_get_sym_modes(const fsl_shw_pco_t * pc_info, + fsl_shw_sym_mode_t * modes[], + uint8_t * mode_count); + +/*! + * Get list of hash algorithms supported. + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] algorithms A pointer which will be set to the list of + * algorithms. + * @param[out] algorithm_count The number of algorithms in the list at @a + * algorithms. + */ +void fsl_shw_pco_get_hash_algorithms(const fsl_shw_pco_t * pc_info, + fsl_shw_hash_alg_t * algorithms[], + uint8_t * algorithm_count); + +/*! + * Determine whether the combination of a given symmetric algorithm and a given + * mode is supported. + * + * @param pc_info The Platform Capabilities Object to query. + * @param algorithm A Symmetric Cipher algorithm. + * @param mode A Symmetric Cipher mode. + * + * @return 0 if combination is not supported, non-zero if supported. + */ +int fsl_shw_pco_check_sym_supported(const fsl_shw_pco_t * pc_info, + fsl_shw_key_alg_t algorithm, + fsl_shw_sym_mode_t mode); + +/*! + * Determine whether a given Encryption-Authentication mode is supported. + * + * @param pc_info The Platform Capabilities Object to query. + * @param mode The Authentication mode. + * + * @return 0 if mode is not supported, non-zero if supported. + */ +int fsl_shw_pco_check_auth_supported(const fsl_shw_pco_t * pc_info, + fsl_shw_acc_mode_t mode); + +/*! + * Determine whether Black Keys (key establishment / wrapping) is supported. + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 0 if wrapping is not supported, non-zero if supported. + */ +int fsl_shw_pco_check_black_key_supported(const fsl_shw_pco_t * pc_info); + +/*! + * Get FSL SHW SCC driver version + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] major A pointer to where the major version + * of the SCC driver is to be stored. + * @param[out] minor A pointer to where the minor version + * of the SCC driver is to be stored. + */ +void fsl_shw_pco_get_scc_driver_version(const fsl_shw_pco_t * pc_info, + uint32_t * major, uint32_t * minor); + +/*! + * Get SCM hardware version + * + * @param pc_info The Platform Capabilities Object to query. + * @return The SCM hardware version + */ +uint32_t fsl_shw_pco_get_scm_version(const fsl_shw_pco_t * pc_info); + +/*! + * Get SMN hardware version + * + * @param pc_info The Platform Capabilities Object to query. + * @return The SMN hardware version + */ +uint32_t fsl_shw_pco_get_smn_version(const fsl_shw_pco_t * pc_info); + +/*! + * Get the size of an SCM block, in bytes + * + * @param pc_info The Platform Capabilities Object to query. + * @return The size of an SCM block, in bytes. + */ +uint32_t fsl_shw_pco_get_scm_block_size(const fsl_shw_pco_t * pc_info); + +/*! + * Get size of Black and Red RAM memory + * + * @param pc_info The Platform Capabilities Object to query. + * @param[out] black_size A pointer to where the size of the Black RAM, in + * blocks, is to be placed. + * @param[out] red_size A pointer to where the size of the Red RAM, in + * blocks, is to be placed. + */ +void fsl_shw_pco_get_smn_size(const fsl_shw_pco_t * pc_info, + uint32_t * black_size, uint32_t * red_size); + +/*! + * Determine whether Secure Partitions are supported + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 0 if secure partitions are not supported, non-zero if supported. + */ +int fsl_shw_pco_check_spo_supported(const fsl_shw_pco_t * pc_info); + +/*! + * Get the size of a Secure Partitions + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return Partition size, in bytes. 0 if Secure Partitions not supported. + */ +uint32_t fsl_shw_pco_get_spo_size_bytes(const fsl_shw_pco_t * pc_info); + +/*! + * Get the number of Secure Partitions on this platform + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return Number of partitions. 0 if Secure Partitions not supported. Note + * that this returns the total number of partitions, though + * not all may be available to the user. + */ +uint32_t fsl_shw_pco_get_spo_count(const fsl_shw_pco_t * pc_info); + +/*! + * Determine whether Platform Key features are available + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 1 if Programmed Key features are available, otherwise zero. + */ +int fsl_shw_pco_check_pk_supported(const fsl_shw_pco_t * pc_info); + +/*! + * Determine whether Software Key features are available + * + * @param pc_info The Platform Capabilities Object to query. + * + * @return 1 if Software key features are available, otherwise zero. + */ +int fsl_shw_pco_check_sw_keys_supported(const fsl_shw_pco_t * pc_info); + +/*! @} *//* pcoops */ + +/*! @addtogroup ucoops + @{ */ + +/*! + * Initialize a User Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the User Context Object to initial values, and set the size + * of the results pool. The mode will be set to a default of + * #FSL_UCO_BLOCKING_MODE. + * + * When using non-blocking operations, this sets the maximum number of + * operations which can be outstanding. This number includes the counts of + * operations waiting to start, operation(s) being performed, and results which + * have not been retrieved. + * + * Changes to this value are ignored once user registration has completed. It + * should be set to 1 if only blocking operations will ever be performed. + * + * @param user_ctx The User Context object to operate on. + * @param pool_size The maximum number of operations which can be + * outstanding. + */ +void fsl_shw_uco_init(fsl_shw_uco_t * user_ctx, uint16_t pool_size); + +/*! + * Set the User Reference for the User Context. + * + * @param user_ctx The User Context object to operate on. + * @param reference A value which will be passed back with a result. + */ +void fsl_shw_uco_set_reference(fsl_shw_uco_t * user_ctx, uint32_t reference); + +/*! + * Set the callback routine for the User Context. + * + * Note that the callback routine may be called when no results are available, + * and possibly even when no requests are outstanding. + * + * + * @param user_ctx The User Context object to operate on. + * @param callback_fn The function the API will invoke when an operation + * completes. + */ +void fsl_shw_uco_set_callback(fsl_shw_uco_t * user_ctx, + void (*callback_fn) (fsl_shw_uco_t * uco)); + +/*! + * Set flags in the User Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param user_ctx The User Context object to operate on. + * @param flags ORed values from #fsl_shw_user_ctx_flags_t. + */ +void fsl_shw_uco_set_flags(fsl_shw_uco_t * user_ctx, uint32_t flags); + +/*! + * Clear flags in the User Context. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param user_ctx The User Context object to operate on. + * @param flags ORed values from #fsl_shw_user_ctx_flags_t. + */ +void fsl_shw_uco_clear_flags(fsl_shw_uco_t * user_ctx, uint32_t flags); + +/*! + * Select a key for the key-wrap key for key wrapping/unwrapping + * + * Without a call to this function, default is FSL_SHW_PF_KEY_IIM. The wrap + * key is used to encrypt and decrypt the per-key random secret which is used + * to calculate the key which will encrypt/decrypt the user's key. + * + * @param user_ctx The User Context object to operate on. + * @param pf_key Which key to use. Valid choices are + * #FSL_SHW_PF_KEY_IIM, #FSL_SHW_PF_KEY_RND, and + * #FSL_SHW_PF_KEY_IIM_RND. + */ +void fsl_shw_uco_set_wrap_key(fsl_shw_uco_t * user_ctx, + fsl_shw_pf_key_t pf_key); + + /*! @} *//* ucoops */ + +/*! @addtogroup rops + @{ */ + +/*! + * Retrieve the status code from a Result Object. + * + * @param result The result object to query. + * + * @return The status of the request. + */ +fsl_shw_return_t fsl_shw_ro_get_status(fsl_shw_result_t * result); + +/*! + * Retrieve the reference value from a Result Object. + * + * @param result The result object to query. + * + * @return The reference associated with the request. + */ +uint32_t fsl_shw_ro_get_reference(fsl_shw_result_t * result); + + /* @} *//* rops */ + +/*! @addtogroup skoops + @{ */ + +/*! + * Initialize a Secret Key Object. + * + * This function or #fsl_shw_sko_init_pf_key() must be called before performing + * any other operation with the Object. + * + * @param key_info The Secret Key Object to be initialized. + * @param algorithm DES, AES, etc. + * + */ +void fsl_shw_sko_init(fsl_shw_sko_t * key_info, fsl_shw_key_alg_t algorithm); + +/*! + * Initialize a Secret Key Object to use a Platform Key register. + * + * This function or #fsl_shw_sko_init() must be called before performing any + * other operation with the Object. #fsl_shw_sko_set_key() does not work on + * a key object initialized in this way. + * + * If this function is used to initialize the key object, but no key is + * established with the key object, then the object will refer strictly to the + * key value specified by the @c pf_key selection. + * + * If the pf key is #FSL_SHW_PF_KEY_PRG or #FSL_SHW_PF_KEY_IIM_PRG, then the + * key object may be used with #fsl_shw_establish_key() to change the Program + * Key value. When the pf key is neither #FSL_SHW_PF_KEY_PRG nor + * #FSL_SHW_PF_KEY_IIM_PRG, it is an error to call #fsl_shw_establish_key(). + * + * @param key_info The Secret Key Object to be initialized. + * @param algorithm DES, AES, etc. + * @param pf_key Which platform key is referenced. + */ +void fsl_shw_sko_init_pf_key(fsl_shw_sko_t * key_info, + fsl_shw_key_alg_t algorithm, + fsl_shw_pf_key_t pf_key); + +/*! + * Store a cleartext key in the key object. + * + * This has the side effect of setting the #FSL_SKO_KEY_PRESENT flag. It should + * not be used if there is a key established with the key object. If there is, + * a call to #fsl_shw_release_key() should be made first. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param key A pointer to the beginning of the key. + * @param key_length The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +void fsl_shw_sko_set_key(fsl_shw_sko_t * key_object, + const uint8_t * key, uint16_t key_length); + +/*! + * Set a size for the key. + * + * This function would normally be used when the user wants the key to be + * generated from a random source. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param key_length The length, in octets, of the key. The value should be + * appropriate to the key size supported by the algorithm. + * 64 octets is the absolute maximum value allowed for this + * call. + */ +void fsl_shw_sko_set_key_length(fsl_shw_sko_t * key_object, + uint16_t key_length); + +/*! + * Set the User ID associated with the key. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param userid The User ID to identify authorized users of the key. + */ +void fsl_shw_sko_set_user_id(fsl_shw_sko_t * key_object, key_userid_t userid); + +/*! + * Set the keystore that the key will be stored in. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param keystore The keystore to place the key in. This is a variable of + * type #fsl_shw_kso_t. + */ +void fsl_shw_sko_set_keystore(fsl_shw_sko_t * key_object, + fsl_shw_kso_t * keystore); + +/*! + * Set the establish key handle into a key object. + * + * The @a userid field will be used to validate the access to the unwrapped + * key. This feature is not available for all platforms, nor for all + * algorithms and modes. + * + * The #FSL_SKO_KEY_ESTABLISHED will be set (and the #FSL_SKO_KEY_PRESENT + * flag will be cleared). + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param userid The User ID to verify this user is an authorized user of + * the key. + * @param handle A @a handle from #fsl_shw_sko_get_established_info. + */ +void fsl_shw_sko_set_established_info(fsl_shw_sko_t * key_object, + key_userid_t userid, uint32_t handle); + +/*! + * Extract the algorithm from a key object. + * + * @param key_info The Key Object to be queried. + * @param[out] algorithm A pointer to the location to store the algorithm. + */ +void fsl_shw_sko_get_algorithm(const fsl_shw_sko_t * key_info, + fsl_shw_key_alg_t * algorithm); + +/*! + * Retrieve the cleartext key from a key object that is stored in a user + * keystore. + * + * @param skobject The Key Object to be queried. + * @param[out] skkey A pointer to the location to store the key. NULL + * if the key is not stored in a user keystore. + */ +void fsl_shw_sko_get_key(const fsl_shw_sko_t * skobject, void *skkey); + +/*! + * Retrieve the established-key handle from a key object. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param handle The location to store the @a handle of the unwrapped + * key. + */ +void fsl_shw_sko_get_established_info(fsl_shw_sko_t * key_object, + uint32_t * handle); + +/*! + * Determine the size of a wrapped key based upon the cleartext key's length. + * + * This function can be used to calculate the number of octets that + * #fsl_shw_extract_key() will write into the location at @a covered_key. + * + * If zero is returned at @a length, this means that the key length in + * @a key_info is not supported. + * + * @param key_info Information about a key to be wrapped. + * @param length Location to store the length of a wrapped + * version of the key in @a key_info. + */ +void fsl_shw_sko_calculate_wrapped_size(const fsl_shw_sko_t * key_info, + uint32_t * length); + +/*! + * Set some flags in the key object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param flags (One or more) ORed members of #fsl_shw_key_flags_t which + * are to be set. + */ +void fsl_shw_sko_set_flags(fsl_shw_sko_t * key_object, uint32_t flags); + +/*! + * Clear some flags in the key object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param key_object A variable of type #fsl_shw_sko_t. + * @param flags (One or more) ORed members of #fsl_shw_key_flags_t which + * are to be reset. + */ +void fsl_shw_sko_clear_flags(fsl_shw_sko_t * key_object, uint32_t flags); + + /*! @} *//* end skoops */ + +/*****************************************************************************/ + +/*! @addtogroup hcops + @{ */ + +/*****************************************************************************/ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-004 - partially */ +/*! + * Initialize a Hash Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the hash + * context object. + * + * @param hash_ctx The hash context to operate upon. + * @param algorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +void fsl_shw_hco_init(fsl_shw_hco_t * hash_ctx, fsl_shw_hash_alg_t algorithm); + +/*****************************************************************************/ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-001 */ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-002 */ +/*! + * Get the current hash value and message length from the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hash_ctx The hash context to query. + * @param[out] digest Pointer to the location of @a length octets where to + * store a copy of the current value of the digest. + * @param length Number of octets of hash value to copy. + * @param[out] msg_length Pointer to the location to store the number of octets + * already hashed. + */ +void fsl_shw_hco_get_digest(const fsl_shw_hco_t * hash_ctx, uint8_t * digest, + uint8_t length, uint32_t * msg_length); + +/*****************************************************************************/ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-002 - partially */ +/*! + * Get the hash algorithm from the hash context object. + * + * @param hash_ctx The hash context to query. + * @param[out] algorithm Pointer to where the algorithm is to be stored. + */ +void fsl_shw_hco_get_info(const fsl_shw_hco_t * hash_ctx, + fsl_shw_hash_alg_t * algorithm); + +/*****************************************************************************/ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-003 */ +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-004 */ +/*! + * Set the current hash value and message length in the hash context object. + * + * The algorithm must have already been specified. See #fsl_shw_hco_init(). + * + * @param hash_ctx The hash context to operate upon. + * @param context Pointer to buffer of appropriate length to copy into + * the hash context object. + * @param msg_length The number of octets of the message which have + * already been hashed. + * + */ +void fsl_shw_hco_set_digest(fsl_shw_hco_t * hash_ctx, const uint8_t * context, + uint32_t msg_length); + +/*! + * Set flags in a Hash Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hash_ctx The hash context to be operated on. + * @param flags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +void fsl_shw_hco_set_flags(fsl_shw_hco_t * hash_ctx, uint32_t flags); + +/*! + * Clear flags in a Hash Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hash_ctx The hash context to be operated on. + * @param flags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hash_ctx_flags_t. + */ +void fsl_shw_hco_clear_flags(fsl_shw_hco_t * hash_ctx, uint32_t flags); + + /*! @} *//* end hcops */ + +/*****************************************************************************/ + +/*! @addtogroup hmcops + @{ */ + +/*! + * Initialize an HMAC Context Object. + * + * This function must be called before performing any other operation with the + * Object. It sets the current message length and hash algorithm in the HMAC + * context object. + * + * @param hmac_ctx The HMAC context to operate upon. + * @param algorithm The hash algorithm to be used (#FSL_HASH_ALG_MD5, + * #FSL_HASH_ALG_SHA256, etc). + * + */ +void fsl_shw_hmco_init(fsl_shw_hmco_t * hmac_ctx, fsl_shw_hash_alg_t algorithm); + +/*! + * Set flags in an HMAC Context Object. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param hmac_ctx The HMAC context to be operated on. + * @param flags The flags to be set in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +void fsl_shw_hmco_set_flags(fsl_shw_hmco_t * hmac_ctx, uint32_t flags); + +/*! + * Clear flags in an HMAC Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param hmac_ctx The HMAC context to be operated on. + * @param flags The flags to be reset in the context. These can be ORed + * members of #fsl_shw_hmac_ctx_flags_t. + */ +void fsl_shw_hmco_clear_flags(fsl_shw_hmco_t * hmac_ctx, uint32_t flags); + +/*! @} */ + +/*****************************************************************************/ + +/*! @addtogroup sccops + @{ */ + +/*! + * Initialize a Symmetric Cipher Context Object. + * + * This function must be called before performing any other operation with the + * Object. This will set the @a mode and @a algorithm and initialize the + * Object. + * + * @param sym_ctx The context object to operate on. + * @param algorithm The cipher algorithm this context will be used with. + * @param mode #FSL_SYM_MODE_CBC, #FSL_SYM_MODE_ECB, etc. + * + */ +void fsl_shw_scco_init(fsl_shw_scco_t * sym_ctx, + fsl_shw_key_alg_t algorithm, fsl_shw_sym_mode_t mode); + +/*! + * Set the flags for a Symmetric Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param sym_ctx The context object to operate on. + * @param flags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +void fsl_shw_scco_set_flags(fsl_shw_scco_t * sym_ctx, uint32_t flags); + +/*! + * Clear some flags in a Symmetric Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param sym_ctx The context object to operate on. + * @param flags The flags to reset (one or more values from + * #fsl_shw_sym_ctx_flags_t ORed together). + * + */ +void fsl_shw_scco_clear_flags(fsl_shw_scco_t * sym_ctx, uint32_t flags); + +/*! + * Set the Context (IV) for a Symmetric Cipher Context. + * + * This is to set the context/IV for #FSL_SYM_MODE_CBC mode, or to set the + * context (the S-Box and pointers) for ARC4. The full context size will + * be copied. + * + * @param sym_ctx The context object to operate on. + * @param context A pointer to the buffer which contains the context. + * + */ +void fsl_shw_scco_set_context(fsl_shw_scco_t * sym_ctx, uint8_t * context); + +/*! + * Get the Context for a Symmetric Cipher Context. + * + * This is to retrieve the context/IV for #FSL_SYM_MODE_CBC mode, or to + * retrieve context (the S-Box and pointers) for ARC4. The full context + * will be copied. + * + * @param sym_ctx The context object to operate on. + * @param[out] context Pointer to location where context will be stored. + */ +void fsl_shw_scco_get_context(const fsl_shw_scco_t * sym_ctx, + uint8_t * context); + +/*! + * Set the Counter Value for a Symmetric Cipher Context. + * + * This will set the Counter Value for CTR mode. + * + * @param sym_ctx The context object to operate on. + * @param counter The starting counter value. The number of octets. + * copied will be the block size for the algorithm. + * @param modulus The modulus for controlling the incrementing of the counter. + * + */ +void fsl_shw_scco_set_counter_info(fsl_shw_scco_t * sym_ctx, + const uint8_t * counter, + fsl_shw_ctr_mod_t modulus); + +/*! + * Get the Counter Value for a Symmetric Cipher Context. + * + * This will retrieve the Counter Value is for CTR mode. + * + * @param sym_ctx The context object to query. + * @param[out] counter Pointer to location to store the current counter + * value. The number of octets copied will be the + * block size for the algorithm. + * @param[out] modulus Pointer to location to store the modulus. + * + */ +void fsl_shw_scco_get_counter_info(const fsl_shw_scco_t * sym_ctx, + uint8_t * counter, + fsl_shw_ctr_mod_t * modulus); + + /*! @} *//* end sccops */ + +/*****************************************************************************/ + +/*! @addtogroup accoops + @{ */ + +/*! + * Initialize a Authentication-Cipher Context. + * + * @param auth_object Pointer to object to operate on. + * @param mode The mode for this object (only #FSL_ACC_MODE_CCM + * supported). + */ +void fsl_shw_acco_init(fsl_shw_acco_t * auth_object, fsl_shw_acc_mode_t mode); + +/*! + * Set the flags for a Authentication-Cipher Context. + * + * Turns on the flags specified in @a flags. Other flags are untouched. + * + * @param auth_object Pointer to object to operate on. + * @param flags The flags to set (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +void fsl_shw_acco_set_flags(fsl_shw_acco_t * auth_object, uint32_t flags); + +/*! + * Clear some flags in a Authentication-Cipher Context Object. + * + * Turns off the flags specified in @a flags. Other flags are untouched. + * + * @param auth_object Pointer to object to operate on. + * @param flags The flags to reset (one or more from + * #fsl_shw_auth_ctx_flags_t ORed together). + * + */ +void fsl_shw_acco_clear_flags(fsl_shw_acco_t * auth_object, uint32_t flags); + +/*! + * Set up the Authentication-Cipher Object for CCM mode. + * + * This will set the @a auth_object for CCM mode and save the @a ctr, + * and @a mac_length. This function can be called instead of + * #fsl_shw_acco_init(). + * + * The parameter @a ctr is Counter Block 0, (counter value 0), which is for the + * MAC. + * + * @param auth_object Pointer to object to operate on. + * @param algorithm Cipher algorithm. Only AES is supported. + * @param ctr The initial counter value. + * @param mac_length The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + */ +void fsl_shw_acco_set_ccm(fsl_shw_acco_t * auth_object, + fsl_shw_key_alg_t algorithm, + const uint8_t * ctr, uint8_t mac_length); + +/*! + * Format the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will also set the IV and CTR values per Appendix A of NIST + * Special Publication 800-38C (May 2004). It will also perform the + * #fsl_shw_acco_set_ccm() operation with information derived from this set of + * parameters. + * + * Note this function assumes the algorithm is AES. It initializes the + * @a auth_object by setting the mode to #FSL_ACC_MODE_CCM and setting the + * flags to be #FSL_ACCO_NIST_CCM. + * + * @param auth_object Pointer to object to operate on. + * @param t_length The number of octets used for the MAC. Valid values are + * 4, 6, 8, 10, 12, 14, and 16. + * @param ad_length Number of octets of Associated Data (may be zero). + * @param q_length A value for the size of the length of @a q field. Valid + * values are 1-8. + * @param n The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param q The value of Q (size of the payload in octets). + * + */ +void fsl_shw_ccm_nist_format_ctr_and_iv(fsl_shw_acco_t * auth_object, + uint8_t t_length, + uint32_t ad_length, + uint8_t q_length, + const uint8_t * n, uint32_t q); + +/*! + * Update the First Block (IV) & Initial Counter Value per NIST CCM. + * + * This function will set the IV and CTR values per Appendix A of NIST Special + * Publication 800-38C (May 2004). + * + * Note this function assumes that #fsl_shw_ccm_nist_format_ctr_and_iv() has + * previously been called on the @a auth_object. + * + * @param auth_object Pointer to object to operate on. + * @param n The Nonce (packet number or other changing value). Must + * be (15 - @a q_length) octets long. + * @param q The value of Q (size of the payload in octets). + * + */ +void fsl_shw_ccm_nist_update_ctr_and_iv(fsl_shw_acco_t * auth_object, + const uint8_t * n, uint32_t q); + + /* @} *//* accoops */ + +/****************************************************************************** + * Library functions + *****************************************************************************/ + +/*! @addtogroup miscfuns + @{ */ + +/* REQ-S2LRD-PINTFC-API-GEN-003 */ +/*! + * Determine the hardware security capabilities of this platform. + * + * Though a user context object is passed into this function, it will always + * act in a non-blocking manner. + * + * @param user_ctx The user context which will be used for the query. + * + * @return A pointer to the capabilities object. + */ +extern fsl_shw_pco_t *fsl_shw_get_capabilities(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-004 */ +/*! + * Create an association between the user and the provider of the API. + * + * @param user_ctx The user context which will be used for this association. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_register_user(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-005 */ +/*! + * Destroy the association between the user and the provider of the API. + * + * @param user_ctx The user context which is no longer needed. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_deregister_user(fsl_shw_uco_t * user_ctx); + +/* REQ-S2LRD-PINTFC-API-GEN-006 */ +/*! + * Retrieve results from earlier operations. + * + * @param user_ctx The user's context. + * @param result_size The number of array elements of @a results. + * @param[in,out] results Pointer to first of the (array of) locations to + * store results. + * @param[out] result_count Pointer to store the number of results which + * were returned. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_get_results(fsl_shw_uco_t * user_ctx, + uint16_t result_size, + fsl_shw_result_t results[], + uint16_t * result_count); + +/*! + * Allocate a block of secure memory + * + * @param user_ctx User context + * @param size Memory size (octets). Note: currently only + * supports only single-partition sized blocks. + * @param UMID User Mode ID to use when registering the + * partition. + * @param permissions Permissions to initialize the partition with. + * Can be made by ORing flags from the + * #fsl_shw_permission_t. + * + * @return Address of the allocated memory. NULL if the + * call was not successful. + */ +extern void *fsl_shw_smalloc(fsl_shw_uco_t * user_ctx, + uint32_t size, + const uint8_t * UMID, uint32_t permissions); + +/*! + * Free a block of secure memory that was allocated with #fsl_shw_smalloc + * + * @param user_ctx User context + * @param address Address of the block of secure memory to be + * released. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_sfree(fsl_shw_uco_t * user_ctx, void *address); + +/*! + * Diminish the permissions of a block of secure memory. Note that permissions + * can only be revoked. + * + * @param user_ctx User context + * @param address Base address of the secure memory to work with + * @param permissions Permissions to initialize the partition with. + * Can be made by ORing flags from the + * #fsl_shw_permission_t. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_diminish_perms(fsl_shw_uco_t * user_ctx, + void *address, + uint32_t permissions); + +/*! + * @brief Encrypt a region of secure memory using the hardware secret key + * + * @param user_ctx User context + * @param partition_base Base address of the partition + * @param offset_bytes Offset of data from the partition base + * @param byte_count Length of the data to encrypt + * @param black_data Location to store the encrypted data + * @param IV IV to use for the encryption routine + * @param cypher_mode Cyphering mode to use, specified by type + * #fsl_shw_cypher_mode_t + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +do_scc_encrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode); + +/*! + * @brief Decrypt a region of secure memory using the hardware secret key + * + * @param user_ctx User context + * @param partition_base Base address of the partition + * @param offset_bytes Offset of data from the partition base + * @param byte_count Length of the data to encrypt + * @param black_data Location to store the encrypted data + * @param IV IV to use for the encryption routine + * @param cypher_mode Cyphering mode to use, specified by type + * #fsl_shw_cypher_mode_t + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t +do_scc_decrypt_region(fsl_shw_uco_t * user_ctx, + void *partition_base, uint32_t offset_bytes, + uint32_t byte_count, const uint8_t * black_data, + uint32_t * IV, fsl_shw_cypher_mode_t cypher_mode); + + /*! @} *//* miscfuns */ + +/*! @addtogroup opfuns + @{ */ + +/* REQ-S2LRD-PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +/*! + * Encrypt a stream of data with a symmetric-key algorithm. + * + * In ARC4, and also in #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_CTR modes, the + * flags of the @a sym_ctx object will control part of the operation of this + * function. The #FSL_SYM_CTX_INIT flag means that there is no context info in + * the object. The #FSL_SYM_CTX_LOAD means to use information in the + * @a sym_ctx at the start of the operation, and the #FSL_SYM_CTX_SAVE flag + * means to update the object's context information after the operation has + * been performed. + * + * All of the data for an operation can be run through at once using the + * #FSL_SYM_CTX_INIT or #FSL_SYM_CTX_LOAD flags, as appropriate, and then using + * a @a length for the whole of the data. + * + * If a #FSL_SYM_CTX_SAVE flag were added, an additional call to the function + * would "pick up" where the previous call left off, allowing the user to + * perform the larger function in smaller steps. + * + * In #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_ECB modes, the @a length must always + * be a multiple of the block size for the algorithm being used. For proper + * operation in #FSL_SYM_MODE_CTR mode, the @a length must be a multiple of the + * block size until the last operation on the total octet stream. + * + * Some users of ARC4 may want to compute the context (S-Box and pointers) from + * the key before any data is available. This may be done by running this + * function with a @a length of zero, with the init & save flags flags on in + * the @a sym_ctx. Subsequent operations would then run as normal with the + * load and save flags. Note that they key object is still required. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info Key and algorithm being used for this operation. + * @param[in,out] sym_ctx Info on cipher mode, state of the cipher. + * @param length Length, in octets, of the pt (and ct). + * @param pt pointer to plaintext to be encrypted. + * @param[out] ct pointer to where to store the resulting ciphertext. + * + * @return A return code of type #fsl_shw_return_t. + * + */ +extern fsl_shw_return_t fsl_shw_symmetric_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * pt, + uint8_t * ct); + +/* PINTFC-API-BASIC-SYM-002 */ +/* PINTFC-API-BASIC-SYM-ARC4-001 */ +/* PINTFC-API-BASIC-SYM-ARC4-002 */ +/*! + * Decrypt a stream of data with a symmetric-key algorithm. + * + * In ARC4, and also in #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_CTR modes, the + * flags of the @a sym_ctx object will control part of the operation of this + * function. The #FSL_SYM_CTX_INIT flag means that there is no context info in + * the object. The #FSL_SYM_CTX_LOAD means to use information in the + * @a sym_ctx at the start of the operation, and the #FSL_SYM_CTX_SAVE flag + * means to update the object's context information after the operation has + * been performed. + * + * All of the data for an operation can be run through at once using the + * #FSL_SYM_CTX_INIT or #FSL_SYM_CTX_LOAD flags, as appropriate, and then using + * a @a length for the whole of the data. + * + * If a #FSL_SYM_CTX_SAVE flag were added, an additional call to the function + * would "pick up" where the previous call left off, allowing the user to + * perform the larger function in smaller steps. + * + * In #FSL_SYM_MODE_CBC and #FSL_SYM_MODE_ECB modes, the @a length must always + * be a multiple of the block size for the algorithm being used. For proper + * operation in #FSL_SYM_MODE_CTR mode, the @a length must be a multiple of the + * block size until the last operation on the total octet stream. + * + * Some users of ARC4 may want to compute the context (S-Box and pointers) from + * the key before any data is available. This may be done by running this + * function with a @a length of zero, with the #FSL_SYM_CTX_INIT & + * #FSL_SYM_CTX_SAVE flags on in the @a sym_ctx. Subsequent operations would + * then run as normal with the load & save flags. Note that they key object is + * still required. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The key and algorithm being used in this operation. + * @param[in,out] sym_ctx Info on cipher mode, state of the cipher. + * @param length Length, in octets, of the ct (and pt). + * @param ct pointer to ciphertext to be decrypted. + * @param[out] pt pointer to where to store the resulting plaintext. + * + * @return A return code of type #fsl_shw_return_t + * + */ +extern fsl_shw_return_t fsl_shw_symmetric_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_scco_t * sym_ctx, + uint32_t length, + const uint8_t * ct, + uint8_t * pt); + +/* REQ-S2LRD-PINTFC-API-BASIC-HASH-005 */ +/*! + * Hash a stream of data with a cryptographic hash algorithm. + * + * The flags in the @a hash_ctx control the operation of this function. + * + * Hashing functions work on 64 octets of message at a time. Therefore, when + * any partial hashing of a long message is performed, the message @a length of + * each segment must be a multiple of 64. When ready to + * #FSL_HASH_FLAGS_FINALIZE the hash, the @a length may be any value. + * + * With the #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_FINALIZE flags on, a + * one-shot complete hash, including padding, will be performed. The @a length + * may be any value. + * + * The first octets of a data stream can be hashed by setting the + * #FSL_HASH_FLAGS_INIT and #FSL_HASH_FLAGS_SAVE flags. The @a length must be + * a multiple of 64. + * + * The flag #FSL_HASH_FLAGS_LOAD is used to load a context previously saved by + * #FSL_HASH_FLAGS_SAVE. The two in combination will allow a (multiple-of-64 + * octets) 'middle sequence' of the data stream to be hashed with the + * beginning. The @a length must again be a multiple of 64. + * + * Since the flag #FSL_HASH_FLAGS_LOAD is used to load a context previously + * saved by #FSL_HASH_FLAGS_SAVE, the #FSL_HASH_FLAGS_LOAD and + * #FSL_HASH_FLAGS_FINALIZE flags, used together, can be used to finish the + * stream. The @a length may be any value. + * + * If the user program wants to do the padding for the hash, it can leave off + * the #FSL_HASH_FLAGS_FINALIZE flag. The @a length must then be a multiple of + * 64 octets. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] hash_ctx Hashing algorithm and state of the cipher. + * @param msg Pointer to the data to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result If not null, pointer to where to store the hash + * digest. + * @param result_len Number of octets to store in @a result. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hash(fsl_shw_uco_t * user_ctx, + fsl_shw_hco_t * hash_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len); + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-001 */ +/*! + * Precompute the Key hashes for an HMAC operation. + * + * This function may be used to calculate the inner and outer precomputes, + * which are the hash contexts resulting from hashing the XORed key for the + * 'inner hash' and the 'outer hash', respectively, of the HMAC function. + * + * After execution of this function, the @a hmac_ctx will contain the + * precomputed inner and outer contexts, so that they may be used by + * #fsl_shw_hmac(). The flags of @a hmac_ctx will be updated with + * #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT to mark their presence. In addition, the + * #FSL_HMAC_FLAGS_INIT flag will be set. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The key being used in this operation. Key must be + * 1 to 64 octets long. + * @param[in,out] hmac_ctx The context which controls, by its flags and + * algorithm, the operation of this function. + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hmac_precompute(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx); + +/* REQ-S2LRD-PINTFC-API-BASIC-HMAC-002 */ +/*! + * Continue, finalize, or one-shot an HMAC operation. + * + * There are a number of ways to use this function. The flags in the + * @a hmac_ctx object will determine what operations occur. + * + * If #FSL_HMAC_FLAGS_INIT is set, then the hash will be started either from + * the @a key_info, or from the precomputed inner hash value in the + * @a hmac_ctx, depending on the value of #FSL_HMAC_FLAGS_PRECOMPUTES_PRESENT. + * + * If, instead, #FSL_HMAC_FLAGS_LOAD is set, then the hash will be continued + * from the ongoing inner hash computation in the @a hmac_ctx. + * + * If #FSL_HMAC_FLAGS_FINALIZE are set, then the @a msg will be padded, hashed, + * the outer hash will be performed, and the @a result will be generated. + * + * If the #FSL_HMAC_FLAGS_SAVE flag is set, then the (ongoing or final) digest + * value will be stored in the ongoing inner hash computation field of the @a + * hmac_ctx. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info If #FSL_HMAC_FLAGS_INIT is set in the @a hmac_ctx, + * this is the key being used in this operation, and the + * IPAD. If #FSL_HMAC_FLAGS_INIT is set in the @a + * hmac_ctx and @a key_info is NULL, then + * #fsl_shw_hmac_precompute() has been used to populate + * the @a inner_precompute and @a outer_precompute + * contexts. If #FSL_HMAC_FLAGS_INIT is not set, this + * parameter is ignored. + + * @param[in,out] hmac_ctx The context which controls, by its flags and + * algorithm, the operation of this function. + * @param msg Pointer to the message to be hashed. + * @param length Length, in octets, of the @a msg. + * @param[out] result Pointer, of @a result_len octets, to where to + * store the HMAC. + * @param result_len Length of @a result buffer. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_hmac(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_hmco_t * hmac_ctx, + const uint8_t * msg, + uint32_t length, + uint8_t * result, uint32_t result_len); + +/* REQ-S2LRD-PINTFC-API-BASIC-RNG-002 */ +/*! + * Get random data. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length The number of octets of @a data being requested. + * @param[out] data A pointer to a location of @a length octets to where + * random data will be returned. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_get_random(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data); + +/* REQ-S2LRD-PINTFC-API-BASIC-RNG-002 */ +/*! + * Add entropy to random number generator. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param length Number of bytes at @a data. + * @param data Entropy to add to random number generator. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_add_entropy(fsl_shw_uco_t * user_ctx, + uint32_t length, uint8_t * data); + +/*! + * Perform Generation-Encryption by doing a Cipher and a Hash. + * + * Generate the authentication value @a auth_value as well as encrypt the @a + * payload into @a ct (the ciphertext). This is a one-shot function, so all of + * the @a auth_data and the total message @a payload must passed in one call. + * This also means that the flags in the @a auth_ctx must be #FSL_ACCO_CTX_INIT + * and #FSL_ACCO_CTX_FINALIZE. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param auth_ctx Controlling object for Authenticate-decrypt. + * @param cipher_key_info The key being used for the cipher part of this + * operation. In CCM mode, this key is used for + * both parts. + * @param auth_key_info The key being used for the authentication part + * of this operation. In CCM mode, this key is + * ignored and may be NULL. + * @param auth_data_length Length, in octets, of @a auth_data. + * @param auth_data Data to be authenticated but not encrypted. + * @param payload_length Length, in octets, of @a payload. + * @param payload Pointer to the plaintext to be encrypted. + * @param[out] ct Pointer to the where the encrypted @a payload + * will be stored. Must be @a payload_length + * octets long. + * @param[out] auth_value Pointer to where the generated authentication + * field will be stored. Must be as many octets as + * indicated by MAC length in the @a function_ctx. + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_gen_encrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * payload, + uint8_t * ct, uint8_t * auth_value); + +/*! + * Perform Authentication-Decryption in Cipher + Hash. + * + * This function will perform a one-shot decryption of a data stream as well as + * authenticate the authentication value. This is a one-shot function, so all + * of the @a auth_data and the total message @a payload must passed in one + * call. This also means that the flags in the @a auth_ctx must be + * #FSL_ACCO_CTX_INIT and #FSL_ACCO_CTX_FINALIZE. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param auth_ctx Controlling object for Authenticate-decrypt. + * @param cipher_key_info The key being used for the cipher part of this + * operation. In CCM mode, this key is used for + * both parts. + * @param auth_key_info The key being used for the authentication part + * of this operation. In CCM mode, this key is + * ignored and may be NULL. + * @param auth_data_length Length, in octets, of @a auth_data. + * @param auth_data Data to be authenticated but not decrypted. + * @param payload_length Length, in octets, of @a ct and @a pt. + * @param ct Pointer to the encrypted input stream. + * @param auth_value The (encrypted) authentication value which will + * be authenticated. This is the same data as the + * (output) @a auth_value argument to + * #fsl_shw_gen_encrypt(). + * @param[out] payload Pointer to where the plaintext resulting from + * the decryption will be stored. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_auth_decrypt(fsl_shw_uco_t * user_ctx, + fsl_shw_acco_t * auth_ctx, + fsl_shw_sko_t * cipher_key_info, + fsl_shw_sko_t * auth_key_info, + uint32_t auth_data_length, + const uint8_t * auth_data, + uint32_t payload_length, + const uint8_t * ct, + const uint8_t * auth_value, + uint8_t * payload); + +/*! + * Establish the key in a protected location, which can be the system keystore, + * user keystore, or (on platforms that support it) as a Platform Key. + * + * By default, keys initialized with #fsl_shw_sko_init() will be placed into + * the system keystore. The user can cause the key to be established in a + * user keystore by first calling #fsl_shw_sko_set_keystore() on the key. + * Normally, keys in the system keystore can only be used for hardware + * encrypt or decrypt operations, however if the #FSL_SKO_KEY_SW_KEY flag is + * applied using #fsl_shw_sko_set_flags(), the key will be established as a + * software key, which can then be read out using #fsl_shw_read_key(). + * + * Keys initialized with #fsl_shw_sko_init_pf_key() are established as a + * Platform Key. Their use is covered in @ref di_sec. + * + * This function only needs to be used when unwrapping a key, setting up a key + * which could be wrapped with a later call to #fsl_shw_extract_key(), or + * setting up a key as a Platform Key. Normal cleartext keys can simply be + * placed into #fsl_shw_sko_t key objects with #fsl_shw_sko_set_key() and used + * directly. + * + * The maximum key size supported for wrapped/unwrapped keys is 32 octets. + * (This is the maximum reasonable key length on Sahara - 32 octets for an HMAC + * key based on SHA-256.) The key size is determined by the @a key_info. The + * expected length of @a key can be determined by + * #fsl_shw_sko_calculate_wrapped_size() + * + * The protected key will not be available for use until this operation + * successfully completes. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param[in,out] key_info The information about the key to be which will + * be established. In the create case, the key + * length must be set. + * @param establish_type How @a key will be interpreted to establish a + * key for use. + * @param key If @a establish_type is #FSL_KEY_WRAP_UNWRAP, + * this is the location of a wrapped key. If + * @a establish_type is #FSL_KEY_WRAP_CREATE, this + * parameter can be @a NULL. If @a establish_type + * is #FSL_KEY_WRAP_ACCEPT, this is the location + * of a plaintext key. + */ +extern fsl_shw_return_t fsl_shw_establish_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + fsl_shw_key_wrap_t establish_type, + const uint8_t * key); + +/*! + * Read the key value from a key object. + * + * Only a key marked as a software key (#FSL_SKO_KEY_SW_KEY) can be read with + * this call. It has no effect on the status of the key store. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The referenced key. + * @param[out] key The location to store the key value. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_read_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * key); + +/*! + * Wrap a key and retrieve the wrapped value. + * + * A wrapped key is a key that has been cryptographically obscured. It is + * only able to be used with keys that have been established by + * #fsl_shw_establish_key(). + * + * For keys established in the system or user keystore, this function will + * also release the key (see #fsl_shw_release_key()) so that it must be re- + * established before reuse. This function will not release keys that are + * established as a Platform Key, so a call to #fsl_shw_release_key() is + * necessary to release those keys. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * @param[out] covered_key The location to store the wrapped key. + * (This size is based upon the maximum key size + * of 32 octets). + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_extract_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info, + uint8_t * covered_key); + +/*! + * De-establish a key so that it can no longer be accessed. + * + * The key will need to be re-established before it can again be used. + * + * This feature is not available for all platforms, nor for all algorithms and + * modes. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * @param key_info The information about the key to be deleted. + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_release_key(fsl_shw_uco_t * user_ctx, + fsl_shw_sko_t * key_info); + +/*! + * Cause the hardware to create a new random key for use by the secure memory + * encryption hardware. + * + * Have the hardware use the secure hardware random number generator to load a + * new secret key into the system's Random Key register. + * + * @param user_ctx A user context from #fsl_shw_register_user(). + * + * @return A return code of type #fsl_shw_return_t. + */ +extern fsl_shw_return_t fsl_shw_gen_random_pf_key(fsl_shw_uco_t * user_ctx); + +/*! + * Retrieve the detected tamper event. + * + * Note that if more than one event was detected, this routine will only ever + * return one of them. + * + * @param[in] user_ctx A user context from #fsl_shw_register_user(). + * @param[out] tamperp Location to store the tamper information. + * @param[out] timestampp Locate to store timestamp from hardwhare when + * an event was detected. + * + * + * @return A return code of type #fsl_shw_return_t (for instance, if the platform + * is not in a fail state. + */ +extern fsl_shw_return_t fsl_shw_read_tamper_event(fsl_shw_uco_t * user_ctx, + fsl_shw_tamper_t * tamperp, + uint64_t * timestampp); + +/*! @} *//* opfuns */ + +/* Insert example code into the API documentation. */ + +/*! + * @example apitest.c + */ + +/*! + * @example sym.c + */ + +/*! + * @example rand.c + */ + +/*! + * @example hash.c + */ + +/*! + * @example hmac1.c + */ + +/*! + * @example hmac2.c + */ + +/*! + * @example gen_encrypt.c + */ + +/*! + * @example auth_decrypt.c + */ + +/*! + * @example wrapped_key.c + */ + +/*! + * @example smalloc.c + */ + +/*! + * @example user_keystore.c + */ + +/*! + * @example dryice.c + */ + +#endif /* API_DOC */ + +#endif /* FSL_SHW_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/Kconfig @@ -0,0 +1,64 @@ +# +# PMIC device driver configuration +# + +menu "MXC PMIC support" + +config MXC_PMIC + boolean + +config MXC_PMIC_MC13783 + tristate "MC13783 PMIC" + depends on ARCH_MXC && SPI + select MXC_PMIC + ---help--- + This is the MXC MC13783(PMIC) support. It include + ADC, Audio, Battery, Connectivity, Light, Power and RTC. + +config MXC_PMIC_MC13892 + tristate "MC13892 PMIC" + depends on ARCH_MXC && (I2C || SPI) + select MXC_PMIC + ---help--- + This is the MXC MC13892(PMIC) support. It include + ADC, Battery, Connectivity, Light, Power and RTC. + +config MXC_PMIC_I2C + bool "Support PMIC I2C Interface" + depends on MXC_PMIC_MC13892 && I2C + +config MXC_PMIC_SPI + bool "Support PMIC SPI Interface" + depends on (MXC_PMIC_MC13892 || MXC_PMIC_MC13783) && SPI + +config MXC_PMIC_MC34704 + tristate "MC34704 PMIC" + depends on ARCH_MXC && I2C + select MXC_PMIC + ---help--- + This is the MXC MC34704 PMIC support. + +config MXC_PMIC_MC9SDZ60 + tristate "MC9sDZ60 PMIC" + depends on ARCH_MXC && I2C + select MXC_PMIC + ---help--- + This is the MXC MC9sDZ60(MCU) PMIC support. + +config MXC_PMIC_CHARDEV + tristate "MXC PMIC device interface" + depends on MXC_PMIC + help + Say Y here to use "pmic" device files, found in the /dev directory + on the system. They make it possible to have user-space programs + use or controll PMIC. Mainly its useful for notifying PMIC events + to user-space programs. + +comment "MXC PMIC Client Drivers" + depends on MXC_PMIC + +source "drivers/mxc/pmic/mc13783/Kconfig" + +source "drivers/mxc/pmic/mc13892/Kconfig" + +endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the MXC PMIC drivers. +# + +obj-y += core/ +obj-$(CONFIG_MXC_PMIC_MC13783) += mc13783/ +obj-$(CONFIG_MXC_PMIC_MC13892) += mc13892/ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_power.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_power.c @@ -0,0 +1,3146 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_power.c + * @brief This is the main file of PMIC(mc13783) Power driver. + * + * @ingroup PMIC_POWER + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "pmic_power_defs.h" + +#ifdef CONFIG_MXC_HWEVENT +#include +#endif + +#include + +#define MC13783_REGCTRL_GPOx_MASK 0x18000 + +static bool VBKUP1_EN = false; +static bool VBKUP2_EN = false; + +/* + * Power Pmic API + */ + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_power_off); +EXPORT_SYMBOL(pmic_power_set_pc_config); +EXPORT_SYMBOL(pmic_power_get_pc_config); +EXPORT_SYMBOL(pmic_power_regulator_on); +EXPORT_SYMBOL(pmic_power_regulator_off); +EXPORT_SYMBOL(pmic_power_regulator_set_voltage); +EXPORT_SYMBOL(pmic_power_regulator_get_voltage); +EXPORT_SYMBOL(pmic_power_regulator_set_config); +EXPORT_SYMBOL(pmic_power_regulator_get_config); +EXPORT_SYMBOL(pmic_power_vbkup2_auto_en); +EXPORT_SYMBOL(pmic_power_get_vbkup2_auto_state); +EXPORT_SYMBOL(pmic_power_bat_det_en); +EXPORT_SYMBOL(pmic_power_get_bat_det_state); +EXPORT_SYMBOL(pmic_power_vib_pin_en); +EXPORT_SYMBOL(pmic_power_gets_vib_pin_state); +EXPORT_SYMBOL(pmic_power_get_power_mode_sense); +EXPORT_SYMBOL(pmic_power_set_regen_assig); +EXPORT_SYMBOL(pmic_power_get_regen_assig); +EXPORT_SYMBOL(pmic_power_set_regen_inv); +EXPORT_SYMBOL(pmic_power_get_regen_inv); +EXPORT_SYMBOL(pmic_power_esim_v_en); +EXPORT_SYMBOL(pmic_power_gets_esim_v_state); +EXPORT_SYMBOL(pmic_power_set_auto_reset_en); +EXPORT_SYMBOL(pmic_power_get_auto_reset_en); +EXPORT_SYMBOL(pmic_power_set_conf_button); +EXPORT_SYMBOL(pmic_power_get_conf_button); +EXPORT_SYMBOL(pmic_power_event_sub); +EXPORT_SYMBOL(pmic_power_event_unsub); + +/*! + * This function is called to put the power in a low power state. + * Switching off the platform cannot be decided by + * the power module. It has to be handled by the + * client application. + * + * @param pdev the device structure used to give information on which power + * device (0 through 3 channels) to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int pmic_power_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +}; + +/*! + * This function is called to resume the power from a low power state. + * + * @param pdev the device structure used to give information on which power + * device (0 through 3 channels) to suspend + * + * @return The function always returns 0. + */ +static int pmic_power_resume(struct platform_device *pdev) +{ + return 0; +}; + +/*! + * This function sets user power off in power control register and thus powers + * off the phone. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +void pmic_power_off(void) +{ + unsigned int mask, value; + + mask = BITFMASK(MC13783_PWRCTRL_USER_OFF_SPI); + value = BITFVAL(MC13783_PWRCTRL_USER_OFF_SPI, + MC13783_PWRCTRL_USER_OFF_SPI_ENABLE); + + pmic_write_reg(REG_POWER_CONTROL_0, value, mask); +} + +/*! + * This function sets the power control configuration. + * + * @param pc_config power control configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_set_pc_config(t_pc_config * pc_config) +{ + unsigned int pwrctrl_val_reg0 = 0; + unsigned int pwrctrl_val_reg1 = 0; + unsigned int pwrctrl_mask_reg0 = 0; + unsigned int pwrctrl_mask_reg1 = 0; + + if (pc_config == NULL) { + return PMIC_PARAMETER_ERROR; + } + + if (pc_config->pc_enable != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_PCEN, + MC13783_PWRCTRL_PCEN_ENABLE); + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_PCT, + pc_config->pc_timer); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_PCEN, + MC13783_PWRCTRL_PCEN_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_PCEN); + pwrctrl_mask_reg1 |= BITFMASK(MC13783_PWRCTRL_PCT); + + if (pc_config->pc_count_enable != false) { + + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_PC_COUNT_EN, + MC13783_PWRCTRL_PC_COUNT_EN_ENABLE); + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_PC_COUNT, + pc_config->pc_count); + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_PC_MAX_CNT, + pc_config->pc_max_count); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_PC_COUNT_EN, + MC13783_PWRCTRL_PC_COUNT_EN_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_PC_COUNT_EN); + pwrctrl_mask_reg1 |= BITFMASK(MC13783_PWRCTRL_PC_MAX_CNT) | + BITFMASK(MC13783_PWRCTRL_PC_COUNT); + + if (pc_config->warm_enable != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_WARM_EN, + MC13783_PWRCTRL_WARM_EN_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_WARM_EN, + MC13783_PWRCTRL_WARM_EN_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_WARM_EN); + + if (pc_config->user_off_pc != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_USER_OFF_PC, + MC13783_PWRCTRL_USER_OFF_PC_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_WARM_EN, + MC13783_PWRCTRL_USER_OFF_PC_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_USER_OFF_PC); + + if (pc_config->clk_32k_user_off != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_32OUT_USER_OFF, + MC13783_PWRCTRL_32OUT_USER_OFF_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_32OUT_USER_OFF, + MC13783_PWRCTRL_32OUT_USER_OFF_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_32OUT_USER_OFF); + + if (pc_config->clk_32k_enable != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_32OUT_EN, + MC13783_PWRCTRL_32OUT_EN_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_32OUT_EN, + MC13783_PWRCTRL_32OUT_EN_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_32OUT_EN); + + if (pc_config->en_vbkup1 != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP1_EN, + MC13783_PWRCTRL_VBKUP_ENABLE); + VBKUP1_EN = true; + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP1_EN, + MC13783_PWRCTRL_VBKUP_DISABLE); + VBKUP1_EN = false; + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_VBKUP1_EN); + + if (pc_config->en_vbkup2 != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP2_EN, + MC13783_PWRCTRL_VBKUP_ENABLE); + VBKUP2_EN = true; + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP2_EN, + MC13783_PWRCTRL_VBKUP_DISABLE); + VBKUP2_EN = false; + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_VBKUP2_EN); + + if (pc_config->auto_en_vbkup1 != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP1_AUTO_EN, + MC13783_PWRCTRL_VBKUP_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP1_AUTO_EN, + MC13783_PWRCTRL_VBKUP_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_VBKUP1_AUTO_EN); + + if (pc_config->auto_en_vbkup2 != false) { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP2_AUTO_EN, + MC13783_PWRCTRL_VBKUP_ENABLE); + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP2_AUTO_EN, + MC13783_PWRCTRL_VBKUP_DISABLE); + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_VBKUP2_AUTO_EN); + + if (VBKUP1_EN != false) { + if (pc_config->vhold_voltage > 3 + || pc_config->vhold_voltage < 0) { + return PMIC_PARAMETER_ERROR; + } else { + + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP1, + pc_config->vhold_voltage); + } + } + if (VBKUP2_EN != false) { + if (pc_config->vhold_voltage > 3 + || pc_config->vhold_voltage < 0) { + return PMIC_PARAMETER_ERROR; + } else { + pwrctrl_val_reg0 |= BITFVAL(MC13783_PWRCTRL_VBKUP2, + pc_config->vhold_voltage2); + } + } + pwrctrl_mask_reg0 |= BITFMASK(MC13783_PWRCTRL_VBKUP1) | + BITFMASK(MC13783_PWRCTRL_VBKUP2); + + if (pc_config->mem_allon != false) { + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_MEM_ALLON, + MC13783_PWRCTRL_MEM_ALLON_ENABLE); + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_MEM_TMR, + pc_config->mem_timer); + } else { + pwrctrl_val_reg1 |= BITFVAL(MC13783_PWRCTRL_MEM_ALLON, + MC13783_PWRCTRL_MEM_ALLON_DISABLE); + } + pwrctrl_mask_reg1 |= BITFMASK(MC13783_PWRCTRL_MEM_ALLON) | + BITFMASK(MC13783_PWRCTRL_MEM_TMR); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, + pwrctrl_val_reg0, pwrctrl_mask_reg0)); + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_1, + pwrctrl_val_reg1, pwrctrl_mask_reg1)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives the power control configuration. + * + * @param pc_config pointer to power control configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_pc_config(t_pc_config * pc_config) +{ + unsigned int pwrctrl_val_reg0 = 0; + unsigned int pwrctrl_val_reg1 = 0; + + if (pc_config == NULL) { + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_0, + &pwrctrl_val_reg0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_1, + &pwrctrl_val_reg1, PMIC_ALL_BITS)); + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_PCEN) + == MC13783_PWRCTRL_PCEN_ENABLE) { + pc_config->pc_enable = true; + pc_config->pc_timer = BITFEXT(pwrctrl_val_reg1, + MC13783_PWRCTRL_PCT); + + } else { + pc_config->pc_enable = false; + pc_config->pc_timer = 0; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_PC_COUNT_EN) + == MC13783_PWRCTRL_PCEN_ENABLE) { + pc_config->pc_count_enable = true; + pc_config->pc_count = BITFEXT(pwrctrl_val_reg1, + MC13783_PWRCTRL_PC_COUNT); + pc_config->pc_max_count = BITFEXT(pwrctrl_val_reg1, + MC13783_PWRCTRL_PC_MAX_CNT); + } else { + pc_config->pc_count_enable = false; + pc_config->pc_count = 0; + pc_config->pc_max_count = 0; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_WARM_EN) + == MC13783_PWRCTRL_WARM_EN_ENABLE) { + pc_config->warm_enable = true; + } else { + pc_config->warm_enable = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_USER_OFF_PC) + == MC13783_PWRCTRL_USER_OFF_PC_ENABLE) { + pc_config->user_off_pc = true; + } else { + pc_config->user_off_pc = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_32OUT_USER_OFF) + == MC13783_PWRCTRL_32OUT_USER_OFF_ENABLE) { + pc_config->clk_32k_user_off = true; + } else { + pc_config->clk_32k_user_off = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_32OUT_EN) + == MC13783_PWRCTRL_32OUT_EN_ENABLE) { + pc_config->clk_32k_enable = true; + } else { + pc_config->clk_32k_enable = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_VBKUP1_AUTO_EN) + == MC13783_PWRCTRL_VBKUP_ENABLE) { + pc_config->auto_en_vbkup1 = true; + } else { + pc_config->auto_en_vbkup1 = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_VBKUP2_AUTO_EN) + == MC13783_PWRCTRL_VBKUP_ENABLE) { + pc_config->auto_en_vbkup2 = true; + } else { + pc_config->auto_en_vbkup2 = false; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_VBKUP1_EN) + == MC13783_PWRCTRL_VBKUP_ENABLE) { + pc_config->en_vbkup1 = true; + pc_config->vhold_voltage = BITFEXT(pwrctrl_val_reg0, + MC13783_PWRCTRL_VBKUP1); + } else { + pc_config->en_vbkup1 = false; + pc_config->vhold_voltage = 0; + } + + if (BITFEXT(pwrctrl_val_reg0, MC13783_PWRCTRL_VBKUP2_EN) + == MC13783_PWRCTRL_VBKUP_ENABLE) { + pc_config->en_vbkup2 = true; + pc_config->vhold_voltage2 = BITFEXT(pwrctrl_val_reg0, + MC13783_PWRCTRL_VBKUP2); + } else { + pc_config->en_vbkup2 = false; + pc_config->vhold_voltage2 = 0; + } + + if (BITFEXT(pwrctrl_val_reg1, MC13783_PWRCTRL_MEM_ALLON) == + MC13783_PWRCTRL_MEM_ALLON_ENABLE) { + pc_config->mem_allon = true; + pc_config->mem_timer = BITFEXT(pwrctrl_val_reg1, + MC13783_PWRCTRL_MEM_TMR); + } else { + pc_config->mem_allon = false; + pc_config->mem_timer = 0; + } + + return PMIC_SUCCESS; +} + +/*! + * This function turns on a regulator. + * + * @param regulator The regulator to be truned on. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_on(t_pmic_regulator regulator) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_PLL: + reg_val = BITFVAL(MC13783_SWCTRL_PLL_EN, + MC13783_SWCTRL_PLL_EN_ENABLE); + reg_mask = BITFMASK(MC13783_SWCTRL_PLL_EN); + reg = REG_SWITCHERS_4; + break; + case SW_SW3: + reg_val = BITFVAL(MC13783_SWCTRL_SW3_EN, + MC13783_SWCTRL_SW3_EN_ENABLE); + reg_mask = BITFMASK(MC13783_SWCTRL_SW3_EN); + reg = REG_SWITCHERS_5; + break; + case REGU_VAUDIO: + reg_val = BITFVAL(MC13783_REGCTRL_VAUDIO_EN, + MC13783_REGCTRL_VAUDIO_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VAUDIO_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOHI: + reg_val = BITFVAL(MC13783_REGCTRL_VIOHI_EN, + MC13783_REGCTRL_VIOHI_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOHI_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOLO: + reg_val = BITFVAL(MC13783_REGCTRL_VIOLO_EN, + MC13783_REGCTRL_VIOLO_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOLO_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VDIG_EN, + MC13783_REGCTRL_VDIG_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VDIG_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VGEN: + reg_val = BITFVAL(MC13783_REGCTRL_VGEN_EN, + MC13783_REGCTRL_VGEN_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VGEN_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VRFDIG_EN, + MC13783_REGCTRL_VRFDIG_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFDIG_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFREF: + reg_val = BITFVAL(MC13783_REGCTRL_VRFREF_EN, + MC13783_REGCTRL_VRFREF_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFREF_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFCP: + reg_val = BITFVAL(MC13783_REGCTRL_VRFCP_EN, + MC13783_REGCTRL_VRFCP_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFCP_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VSIM: + reg_val = BITFVAL(MC13783_REGCTRL_VSIM_EN, + MC13783_REGCTRL_VSIM_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VSIM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VESIM: + reg_val = BITFVAL(MC13783_REGCTRL_VESIM_EN, + MC13783_REGCTRL_VESIM_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VESIM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VCAM: + reg_val = BITFVAL(MC13783_REGCTRL_VCAM_EN, + MC13783_REGCTRL_VCAM_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VCAM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRFBG: + reg_val = BITFVAL(MC13783_REGCTRL_VRFBG_EN, + MC13783_REGCTRL_VRFBG_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFBG_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VVIB: + reg_val = BITFVAL(MC13783_REGCTRL_VVIB_EN, + MC13783_REGCTRL_VVIB_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VVIB_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF1: + reg_val = BITFVAL(MC13783_REGCTRL_VRF1_EN, + MC13783_REGCTRL_VRF1_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF1_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF2: + reg_val = BITFVAL(MC13783_REGCTRL_VRF2_EN, + MC13783_REGCTRL_VRF2_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF2_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC1: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC1_EN, + MC13783_REGCTRL_VMMC1_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC1_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC2: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC2_EN, + MC13783_REGCTRL_VMMC2_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC2_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_GPO1: + reg_val = BITFVAL(MC13783_REGCTRL_GPO1_EN, + MC13783_REGCTRL_GPO1_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO1_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO2: + reg_val = BITFVAL(MC13783_REGCTRL_GPO2_EN, + MC13783_REGCTRL_GPO2_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO2_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO3: + reg_val = BITFVAL(MC13783_REGCTRL_GPO3_EN, + MC13783_REGCTRL_GPO3_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO3_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO4: + reg_val = BITFVAL(MC13783_REGCTRL_GPO4_EN, + MC13783_REGCTRL_GPO4_EN_ENABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO4_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function turns off a regulator. + * + * @param regulator The regulator to be truned off. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_off(t_pmic_regulator regulator) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_PLL: + reg_val = BITFVAL(MC13783_SWCTRL_PLL_EN, + MC13783_SWCTRL_PLL_EN_DISABLE); + reg_mask = BITFMASK(MC13783_SWCTRL_PLL_EN); + reg = REG_SWITCHERS_4; + break; + case SW_SW3: + reg_val = BITFVAL(MC13783_SWCTRL_SW3_EN, + MC13783_SWCTRL_SW3_EN_DISABLE); + reg_mask = BITFMASK(MC13783_SWCTRL_SW3_EN); + reg = REG_SWITCHERS_5; + break; + case REGU_VAUDIO: + reg_val = BITFVAL(MC13783_REGCTRL_VAUDIO_EN, + MC13783_REGCTRL_VAUDIO_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VAUDIO_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOHI: + reg_val = BITFVAL(MC13783_REGCTRL_VIOHI_EN, + MC13783_REGCTRL_VIOHI_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOHI_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOLO: + reg_val = BITFVAL(MC13783_REGCTRL_VIOLO_EN, + MC13783_REGCTRL_VIOLO_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOLO_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VDIG_EN, + MC13783_REGCTRL_VDIG_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VDIG_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VGEN: + reg_val = BITFVAL(MC13783_REGCTRL_VGEN_EN, + MC13783_REGCTRL_VGEN_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VGEN_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VRFDIG_EN, + MC13783_REGCTRL_VRFDIG_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFDIG_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFREF: + reg_val = BITFVAL(MC13783_REGCTRL_VRFREF_EN, + MC13783_REGCTRL_VRFREF_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFREF_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFCP: + reg_val = BITFVAL(MC13783_REGCTRL_VRFCP_EN, + MC13783_REGCTRL_VRFCP_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFCP_EN); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VSIM: + reg_val = BITFVAL(MC13783_REGCTRL_VSIM_EN, + MC13783_REGCTRL_VSIM_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VSIM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VESIM: + reg_val = BITFVAL(MC13783_REGCTRL_VESIM_EN, + MC13783_REGCTRL_VESIM_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VESIM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VCAM: + reg_val = BITFVAL(MC13783_REGCTRL_VCAM_EN, + MC13783_REGCTRL_VCAM_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VCAM_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRFBG: + reg_val = BITFVAL(MC13783_REGCTRL_VRFBG_EN, + MC13783_REGCTRL_VRFBG_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFBG_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VVIB: + reg_val = BITFVAL(MC13783_REGCTRL_VVIB_EN, + MC13783_REGCTRL_VVIB_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VVIB_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF1: + reg_val = BITFVAL(MC13783_REGCTRL_VRF1_EN, + MC13783_REGCTRL_VRF1_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF1_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF2: + reg_val = BITFVAL(MC13783_REGCTRL_VRF2_EN, + MC13783_REGCTRL_VRF2_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF2_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC1: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC1_EN, + MC13783_REGCTRL_VMMC1_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC1_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC2: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC2_EN, + MC13783_REGCTRL_VMMC2_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC2_EN); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_GPO1: + reg_val = BITFVAL(MC13783_REGCTRL_GPO1_EN, + MC13783_REGCTRL_GPO1_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO1_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO2: + reg_val = BITFVAL(MC13783_REGCTRL_GPO2_EN, + MC13783_REGCTRL_GPO2_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO2_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO3: + reg_val = BITFVAL(MC13783_REGCTRL_GPO3_EN, + MC13783_REGCTRL_GPO3_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO3_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + case REGU_GPO4: + reg_val = BITFVAL(MC13783_REGCTRL_GPO4_EN, + MC13783_REGCTRL_GPO4_EN_DISABLE); + reg_mask = BITFMASK(MC13783_REGCTRL_GPO4_EN); + reg = REG_POWER_MISCELLANEOUS; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function sets the regulator output voltage. + * + * @param regulator The regulator to be configured. + * @param voltage The regulator output voltage. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_voltage(t_pmic_regulator regulator, + t_regulator_voltage voltage) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + if ((voltage.sw1a < SW1A_0_9V) || (voltage.sw1a > SW1A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1A, voltage.sw1a); + reg_mask = BITFMASK(MC13783_SWSET_SW1A); + reg = REG_SWITCHERS_0; + break; + case SW_SW1B: + if ((voltage.sw1b < SW1B_0_9V) || (voltage.sw1b > SW1B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1B, voltage.sw1b); + reg_mask = BITFMASK(MC13783_SWSET_SW1B); + reg = REG_SWITCHERS_1; + break; + case SW_SW2A: + if ((voltage.sw2a < SW2A_0_9V) || (voltage.sw2a > SW2A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2A, voltage.sw1a); + reg_mask = BITFMASK(MC13783_SWSET_SW2A); + reg = REG_SWITCHERS_2; + break; + case SW_SW2B: + if ((voltage.sw2b < SW2B_0_9V) || (voltage.sw2b > SW2B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2B, voltage.sw2b); + reg_mask = BITFMASK(MC13783_SWSET_SW1A); + reg = REG_SWITCHERS_3; + break; + case SW_SW3: + if (voltage.sw3 != SW3_5V) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW3, voltage.sw3); + reg_mask = BITFMASK(MC13783_SWSET_SW3); + reg = REG_SWITCHERS_5; + break; + case REGU_VIOLO: + if ((voltage.violo < VIOLO_1_2V) || + (voltage.violo > VIOLO_1_8V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VIOLO, voltage.violo); + reg_mask = BITFMASK(MC13783_REGSET_VIOLO); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VDIG: + if ((voltage.vdig < VDIG_1_2V) || (voltage.vdig > VDIG_1_8V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VDIG, voltage.vdig); + reg_mask = BITFMASK(MC13783_REGSET_VDIG); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VGEN: + if ((voltage.vgen < VGEN_1_2V) || (voltage.vgen > VGEN_2_4V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VGEN, voltage.vgen); + reg_mask = BITFMASK(MC13783_REGSET_VGEN); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VRFDIG: + if ((voltage.vrfdig < VRFDIG_1_2V) || + (voltage.vrfdig > VRFDIG_1_875V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VRFDIG, voltage.vrfdig); + reg_mask = BITFMASK(MC13783_REGSET_VRFDIG); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VRFREF: + if ((voltage.vrfref < VRFREF_2_475V) || + (voltage.vrfref > VRFREF_2_775V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VRFREF, voltage.vrfref); + reg_mask = BITFMASK(MC13783_REGSET_VRFREF); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VRFCP: + if ((voltage.vrfcp < VRFCP_2_7V) || + (voltage.vrfcp > VRFCP_2_775V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VRFCP, voltage.vrfcp); + reg_mask = BITFMASK(MC13783_REGSET_VRFCP); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VSIM: + if ((voltage.vsim < VSIM_1_8V) || (voltage.vsim > VSIM_2_9V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VSIM, voltage.vsim); + reg_mask = BITFMASK(MC13783_REGSET_VSIM); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VESIM: + if ((voltage.vesim < VESIM_1_8V) || + (voltage.vesim > VESIM_2_9V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VESIM, voltage.vesim); + reg_mask = BITFMASK(MC13783_REGSET_VESIM); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VCAM: + if ((voltage.vcam < VCAM_1_5V) || (voltage.vcam > VCAM_3V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VCAM, voltage.vcam); + reg_mask = BITFMASK(MC13783_REGSET_VCAM); + reg = REG_REGULATOR_SETTING_0; + break; + case REGU_VVIB: + if ((voltage.vvib < VVIB_1_3V) || (voltage.vvib > VVIB_3V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VVIB, voltage.vvib); + reg_mask = BITFMASK(MC13783_REGSET_VVIB); + reg = REG_REGULATOR_SETTING_1; + break; + case REGU_VRF1: + if ((voltage.vrf1 < VRF1_1_5V) || (voltage.vrf1 > VRF1_2_775V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VRF1, voltage.vrf1); + reg_mask = BITFMASK(MC13783_REGSET_VRF1); + reg = REG_REGULATOR_SETTING_1; + break; + case REGU_VRF2: + if ((voltage.vrf2 < VRF2_1_5V) || (voltage.vrf2 > VRF2_2_775V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VRF2, voltage.vrf2); + reg_mask = BITFMASK(MC13783_REGSET_VRF2); + reg = REG_REGULATOR_SETTING_1; + break; + case REGU_VMMC1: + if ((voltage.vmmc1 < VMMC1_1_6V) || (voltage.vmmc1 > VMMC1_3V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VMMC1, voltage.vmmc1); + reg_mask = BITFMASK(MC13783_REGSET_VMMC1); + reg = REG_REGULATOR_SETTING_1; + break; + case REGU_VMMC2: + if ((voltage.vmmc2 < VMMC2_1_6V) || (voltage.vmmc2 > VMMC2_3V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGSET_VMMC2, voltage.vmmc2); + reg_mask = BITFMASK(MC13783_REGSET_VMMC2); + reg = REG_REGULATOR_SETTING_1; + break; + case REGU_VAUDIO: + case REGU_VIOHI: + case REGU_VRFBG: + case REGU_GPO1: + case REGU_GPO2: + case REGU_GPO3: + case REGU_GPO4: + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives the regulator output voltage. + * + * @param regulator The regulator to be truned off. + * @param voltage Pointer to regulator output voltage. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_voltage(t_pmic_regulator regulator, + t_regulator_voltage * voltage) +{ + unsigned int reg_val = 0; + + if (regulator == SW_SW1A) { + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_0, + ®_val, PMIC_ALL_BITS)); + } else if (regulator == SW_SW1B) { + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_1, + ®_val, PMIC_ALL_BITS)); + } else if (regulator == SW_SW2A) { + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_2, + ®_val, PMIC_ALL_BITS)); + } else if (regulator == SW_SW2B) { + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_3, + ®_val, PMIC_ALL_BITS)); + } else if (regulator == SW_SW3) { + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_5, + ®_val, PMIC_ALL_BITS)); + } else if ((regulator == REGU_VIOLO) || (regulator == REGU_VDIG) || + (regulator == REGU_VGEN) || + (regulator == REGU_VRFDIG) || + (regulator == REGU_VRFREF) || + (regulator == REGU_VRFCP) || + (regulator == REGU_VSIM) || + (regulator == REGU_VESIM) || (regulator == REGU_VCAM)) { + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®_val, PMIC_ALL_BITS)); + } else if ((regulator == REGU_VVIB) || (regulator == REGU_VRF1) || + (regulator == REGU_VRF2) || + (regulator == REGU_VMMC1) || (regulator == REGU_VMMC2)) { + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_1, + ®_val, PMIC_ALL_BITS)); + } + + switch (regulator) { + case SW_SW1A: + voltage->sw1a = BITFEXT(reg_val, MC13783_SWSET_SW1A); + break; + case SW_SW1B: + voltage->sw1b = BITFEXT(reg_val, MC13783_SWSET_SW1B); + break; + case SW_SW2A: + voltage->sw2a = BITFEXT(reg_val, MC13783_SWSET_SW2A); + break; + case SW_SW2B: + voltage->sw2b = BITFEXT(reg_val, MC13783_SWSET_SW2B); + break; + case SW_SW3: + voltage->sw3 = BITFEXT(reg_val, MC13783_SWSET_SW3); + break; + case REGU_VIOLO: + voltage->violo = BITFEXT(reg_val, MC13783_REGSET_VIOLO); + break; + case REGU_VDIG: + voltage->vdig = BITFEXT(reg_val, MC13783_REGSET_VDIG); + break; + case REGU_VGEN: + voltage->vgen = BITFEXT(reg_val, MC13783_REGSET_VGEN); + break; + case REGU_VRFDIG: + voltage->vrfdig = BITFEXT(reg_val, MC13783_REGSET_VRFDIG); + break; + case REGU_VRFREF: + voltage->vrfref = BITFEXT(reg_val, MC13783_REGSET_VRFREF); + break; + case REGU_VRFCP: + voltage->vrfcp = BITFEXT(reg_val, MC13783_REGSET_VRFCP); + break; + case REGU_VSIM: + voltage->vsim = BITFEXT(reg_val, MC13783_REGSET_VSIM); + break; + case REGU_VESIM: + voltage->vesim = BITFEXT(reg_val, MC13783_REGSET_VESIM); + break; + case REGU_VCAM: + voltage->vcam = BITFEXT(reg_val, MC13783_REGSET_VCAM); + break; + case REGU_VVIB: + voltage->vvib = BITFEXT(reg_val, MC13783_REGSET_VVIB); + break; + case REGU_VRF1: + voltage->vrf1 = BITFEXT(reg_val, MC13783_REGSET_VRF1); + break; + case REGU_VRF2: + voltage->vrf2 = BITFEXT(reg_val, MC13783_REGSET_VRF2); + break; + case REGU_VMMC1: + voltage->vmmc1 = BITFEXT(reg_val, MC13783_REGSET_VMMC1); + break; + case REGU_VMMC2: + voltage->vmmc2 = BITFEXT(reg_val, MC13783_REGSET_VMMC2); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the DVS voltage + * + * @param regulator The regulator to be configured. + * @param dvs The switch Dynamic Voltage Scaling + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_dvs(t_pmic_regulator regulator, + t_regulator_voltage dvs) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + if ((dvs.sw1a < SW1A_0_9V) || (dvs.sw1a > SW1A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1A_DVS, dvs.sw1a); + reg_mask = BITFMASK(MC13783_SWSET_SW1A_DVS); + reg = REG_SWITCHERS_0; + break; + case SW_SW1B: + if ((dvs.sw1b < SW1B_0_9V) || (dvs.sw1b > SW1B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1B_DVS, dvs.sw1b); + reg_mask = BITFMASK(MC13783_SWSET_SW1B_DVS); + reg = REG_SWITCHERS_1; + break; + case SW_SW2A: + if ((dvs.sw2a < SW2A_0_9V) || (dvs.sw2a > SW2A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2A_DVS, dvs.sw2a); + reg_mask = BITFMASK(MC13783_SWSET_SW2A_DVS); + reg = REG_SWITCHERS_2; + break; + case SW_SW2B: + if ((dvs.sw2b < SW2B_0_9V) || (dvs.sw2b > SW2B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2B_DVS, dvs.sw2b); + reg_mask = BITFMASK(MC13783_SWSET_SW2B_DVS); + reg = REG_SWITCHERS_3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the DVS voltage + * + * @param regulator The regulator to be handled. + * @param dvs The switch Dynamic Voltage Scaling + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_dvs(t_pmic_regulator regulator, + t_regulator_voltage * dvs) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_mask = BITFMASK(MC13783_SWSET_SW1A_DVS); + reg = REG_SWITCHERS_0; + break; + case SW_SW1B: + reg_mask = BITFMASK(MC13783_SWSET_SW1B_DVS); + reg = REG_SWITCHERS_1; + break; + case SW_SW2A: + reg_mask = BITFMASK(MC13783_SWSET_SW2A_DVS); + reg = REG_SWITCHERS_2; + break; + case SW_SW2B: + reg_mask = BITFMASK(MC13783_SWSET_SW2B_DVS); + reg = REG_SWITCHERS_3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + *dvs = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW1A_DVS); + break; + case SW_SW1B: + *dvs = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW1B_DVS); + break; + case SW_SW2A: + *dvs = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW2A_DVS); + break; + case SW_SW2B: + *dvs = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW2B_DVS); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the standiby voltage + * + * @param regulator The regulator to be configured. + * @param stby The switch standby voltage + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_stby(t_pmic_regulator regulator, + t_regulator_voltage stby) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + if ((stby.sw1a < SW1A_0_9V) || (stby.sw1a > SW1A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1A_STDBY, stby.sw1a); + reg_mask = BITFMASK(MC13783_SWSET_SW1A_STDBY); + reg = REG_SWITCHERS_0; + break; + case SW_SW1B: + if ((stby.sw1b < SW1B_0_9V) || (stby.sw1b > SW1B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW1B_STDBY, stby.sw1b); + reg_mask = BITFMASK(MC13783_SWSET_SW1B_STDBY); + reg = REG_SWITCHERS_1; + break; + case SW_SW2A: + if ((stby.sw2a < SW2A_0_9V) || (stby.sw2a > SW2A_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2A_STDBY, stby.sw2a); + reg_mask = BITFMASK(MC13783_SWSET_SW2A_STDBY); + reg = REG_SWITCHERS_2; + break; + case SW_SW2B: + if ((stby.sw2b < SW2B_0_9V) || (stby.sw2b > SW2B_2_2V)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWSET_SW2B_STDBY, stby.sw2b); + reg_mask = BITFMASK(MC13783_SWSET_SW2B_STDBY); + reg = REG_SWITCHERS_3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the standiby voltage + * + * @param regulator The regulator to be handled. + * @param stby The switch standby voltage + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_stby(t_pmic_regulator regulator, + t_regulator_voltage * stby) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_mask = BITFMASK(MC13783_SWSET_SW1A_STDBY); + reg = REG_SWITCHERS_0; + break; + case SW_SW1B: + reg_mask = BITFMASK(MC13783_SWSET_SW1B_STDBY); + reg = REG_SWITCHERS_1; + break; + case SW_SW2A: + reg_mask = BITFMASK(MC13783_SWSET_SW2A_STDBY); + reg = REG_SWITCHERS_2; + break; + case SW_SW2B: + reg_mask = BITFMASK(MC13783_SWSET_SW2B_STDBY); + reg = REG_SWITCHERS_3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + *stby = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW1A_STDBY); + break; + case SW_SW1B: + *stby = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW1B_STDBY); + break; + case SW_SW2A: + *stby = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW2A_STDBY); + break; + case SW_SW2B: + *stby = (t_regulator_voltage) BITFEXT(reg_val, + MC13783_SWSET_SW2B_STDBY); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the switchers mode. + * + * @param regulator The regulator to be configured. + * @param mode The switcher mode + * @param stby Switch between main and standby. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_mode(t_pmic_regulator regulator, + t_regulator_sw_mode mode, bool stby) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + unsigned int l_mode; + + if (mode == SYNC_RECT) { + l_mode = MC13783_SWCTRL_SW_MODE_SYNC_RECT_EN; + } else if (mode == NO_PULSE_SKIP) { + l_mode = MC13783_SWCTRL_SW_MODE_PULSE_NO_SKIP_EN; + } else if (mode == PULSE_SKIP) { + l_mode = MC13783_SWCTRL_SW_MODE_PULSE_SKIP_EN; + } else if (mode == LOW_POWER) { + l_mode = MC13783_SWCTRL_SW_MODE_LOW_POWER_EN; + } else { + return PMIC_PARAMETER_ERROR; + } + + switch (regulator) { + case SW_SW1A: + if (stby) { + reg_val = + BITFVAL(MC13783_SWCTRL_SW1A_STBY_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_STBY_MODE); + } else { + reg_val = BITFVAL(MC13783_SWCTRL_SW1A_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_MODE); + } + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + if (stby) { + reg_val = + BITFVAL(MC13783_SWCTRL_SW1B_STBY_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_STBY_MODE); + } else { + reg_val = BITFVAL(MC13783_SWCTRL_SW1B_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_MODE); + } + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + if (stby) { + reg_val = + BITFVAL(MC13783_SWCTRL_SW2A_STBY_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_STBY_MODE); + } else { + reg_val = BITFVAL(MC13783_SWCTRL_SW2A_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_MODE); + } + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + if (stby) { + reg_val = + BITFVAL(MC13783_SWCTRL_SW2B_STBY_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_STBY_MODE); + } else { + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_MODE, l_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_MODE); + } + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the switchers mode. + * + * @param regulator The regulator to be handled. + * @param mode The switcher mode. + * @param stby Switch between main and standby. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_mode(t_pmic_regulator regulator, + t_regulator_sw_mode * mode, bool stby) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg = 0; + unsigned int l_mode = 0; + + switch (regulator) { + case SW_SW1A: + if (stby) { + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_STBY_MODE); + } else { + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_MODE); + } + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + if (stby) { + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_STBY_MODE); + } else { + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_MODE); + } + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + if (stby) { + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_STBY_MODE); + } else { + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_MODE); + } + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + if (stby) { + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_STBY_MODE); + } else { + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_MODE); + } + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + if (stby) { + l_mode = + BITFEXT(reg_val, MC13783_SWCTRL_SW1A_STBY_MODE); + } else { + l_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW1A_MODE); + } + break; + case SW_SW1B: + if (stby) { + l_mode = + BITFEXT(reg_val, MC13783_SWCTRL_SW1B_STBY_MODE); + } else { + l_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW1B_MODE); + } + break; + case SW_SW2A: + if (stby) { + l_mode = + BITFEXT(reg_val, MC13783_SWCTRL_SW2A_STBY_MODE); + } else { + l_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW2A_MODE); + } + break; + case SW_SW2B: + if (stby) { + l_mode = + BITFEXT(reg_val, MC13783_SWCTRL_SW2B_STBY_MODE); + } else { + l_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW2B_MODE); + } + break; + default: + return PMIC_PARAMETER_ERROR; + } + + if (l_mode == MC13783_SWCTRL_SW_MODE_SYNC_RECT_EN) { + *mode = SYNC_RECT; + } else if (l_mode == MC13783_SWCTRL_SW_MODE_PULSE_NO_SKIP_EN) { + *mode = NO_PULSE_SKIP; + } else if (l_mode == MC13783_SWCTRL_SW_MODE_PULSE_SKIP_EN) { + *mode = PULSE_SKIP; + } else if (l_mode == MC13783_SWCTRL_SW_MODE_LOW_POWER_EN) { + *mode = LOW_POWER; + } else { + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the switch dvs speed + * + * @param regulator The regulator to be configured. + * @param speed The dvs speed. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_dvs_speed(t_pmic_regulator regulator, + t_switcher_dvs_speed speed) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + if (speed > 3 || speed < 0) { + return PMIC_PARAMETER_ERROR; + } + + switch (regulator) { + case SW_SW1A: + reg_val = BITFVAL(MC13783_SWCTRL_SW1A_DVS_SPEED, speed); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_DVS_SPEED); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_DVS_SPEED, speed); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_DVS_SPEED); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_val = BITFVAL(MC13783_SWCTRL_SW2A_DVS_SPEED, speed); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_DVS_SPEED); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_DVS_SPEED, speed); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_DVS_SPEED); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the switch dvs speed + * + * @param regulator The regulator to be handled. + * @param speed The dvs speed. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_dvs_speed(t_pmic_regulator regulator, + t_switcher_dvs_speed * speed) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_DVS_SPEED); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_DVS_SPEED); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_DVS_SPEED); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_DVS_SPEED); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + *speed = BITFEXT(reg_val, MC13783_SWCTRL_SW1A_DVS_SPEED); + break; + case SW_SW1B: + *speed = BITFEXT(reg_val, MC13783_SWCTRL_SW1B_DVS_SPEED); + break; + case SW_SW2A: + *speed = BITFEXT(reg_val, MC13783_SWCTRL_SW2A_DVS_SPEED); + break; + case SW_SW2B: + *speed = BITFEXT(reg_val, MC13783_SWCTRL_SW2B_DVS_SPEED); + break; + default: + break; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the switch panic mode + * + * @param regulator The regulator to be configured. + * @param panic_mode Enable or disable panic mode + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_panic_mode(t_pmic_regulator regulator, + bool panic_mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_val = BITFVAL(MC13783_SWCTRL_SW1A_PANIC_MODE, panic_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_PANIC_MODE); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_PANIC_MODE, panic_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_PANIC_MODE); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_val = BITFVAL(MC13783_SWCTRL_SW2A_PANIC_MODE, panic_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_PANIC_MODE); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_PANIC_MODE, panic_mode); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_PANIC_MODE); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the switch panic mode + * + * @param regulator The regulator to be handled + * @param panic_mode Enable or disable panic mode + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_panic_mode(t_pmic_regulator regulator, + bool * panic_mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_PANIC_MODE); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_PANIC_MODE); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_PANIC_MODE); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_PANIC_MODE); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + *panic_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW1A_PANIC_MODE); + break; + case SW_SW1B: + *panic_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW1B_PANIC_MODE); + break; + case SW_SW2A: + *panic_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW2A_PANIC_MODE); + break; + case SW_SW2B: + *panic_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW2B_PANIC_MODE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the switch softstart mode + * + * @param regulator The regulator to be configured. + * @param softstart Enable or disable softstart. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_softstart(t_pmic_regulator regulator, + bool softstart) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_val = BITFVAL(MC13783_SWCTRL_SW1A_SOFTSTART, softstart); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_SOFTSTART); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_SOFTSTART, softstart); + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_SOFTSTART); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_val = BITFVAL(MC13783_SWCTRL_SW2A_SOFTSTART, softstart); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_SOFTSTART); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_val = BITFVAL(MC13783_SWCTRL_SW2B_SOFTSTART, softstart); + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_SOFTSTART); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the switch softstart mode + * + * @param regulator The regulator to be handled + * @param softstart Enable or disable softstart. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_softstart(t_pmic_regulator regulator, + bool * softstart) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + + switch (regulator) { + case SW_SW1A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1A_SOFTSTART); + reg = REG_SWITCHERS_4; + break; + case SW_SW1B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW1B_SOFTSTART); + reg = REG_SWITCHERS_4; + break; + case SW_SW2A: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2A_SOFTSTART); + reg = REG_SWITCHERS_5; + break; + case SW_SW2B: + reg_mask = BITFMASK(MC13783_SWCTRL_SW2B_SOFTSTART); + reg = REG_SWITCHERS_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW1A: + *softstart = BITFEXT(reg_val, MC13783_SWCTRL_SW1A_SOFTSTART); + break; + case SW_SW1B: + *softstart = BITFEXT(reg_val, MC13783_SWCTRL_SW2B_SOFTSTART); + break; + case SW_SW2A: + *softstart = BITFEXT(reg_val, MC13783_SWCTRL_SW2A_SOFTSTART); + break; + case SW_SW2B: + *softstart = BITFEXT(reg_val, MC13783_SWCTRL_SW2B_SOFTSTART); + break; + default: + break; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the PLL multiplication factor + * + * @param regulator The regulator to be configured. + * @param factor The multiplication factor. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_factor(t_pmic_regulator regulator, + t_switcher_factor factor) +{ + unsigned int reg_val = 0, reg_mask = 0; + + if (regulator != SW_PLL) { + return PMIC_PARAMETER_ERROR; + } + if (factor < FACTOR_28 || factor > FACTOR_35) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_SWCTRL_PLL_FACTOR, factor); + reg_mask = BITFMASK(MC13783_SWCTRL_PLL_FACTOR); + + CHECK_ERROR(pmic_write_reg(REG_SWITCHERS_4, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the PLL multiplication factor + * + * @param regulator The regulator to be handled + * @param factor The multiplication factor. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_factor(t_pmic_regulator regulator, + t_switcher_factor * factor) +{ + unsigned int reg_val = 0, reg_mask = 0; + + if (regulator != SW_PLL) { + return PMIC_PARAMETER_ERROR; + } + reg_mask = BITFMASK(MC13783_SWCTRL_PLL_FACTOR); + + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_4, ®_val, reg_mask)); + + *factor = BITFEXT(reg_val, MC13783_SWCTRL_PLL_FACTOR); + + return PMIC_SUCCESS; +} + +/*! + * This function enables or disables low power mode. + * + * @param regulator The regulator to be configured. + * @param lp_mode Select nominal or low power mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_lp_mode(t_pmic_regulator regulator, + t_regulator_lp_mode lp_mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + unsigned int l_mode, l_stby; + + if (lp_mode == LOW_POWER_DISABLED) { + l_mode = MC13783_REGTRL_LP_MODE_DISABLE; + l_stby = MC13783_REGTRL_STBY_MODE_DISABLE; + } else if (lp_mode == LOW_POWER_CTRL_BY_PIN) { + l_mode = MC13783_REGTRL_LP_MODE_DISABLE; + l_stby = MC13783_REGTRL_STBY_MODE_ENABLE; + } else if (lp_mode == LOW_POWER_EN) { + l_mode = MC13783_REGTRL_LP_MODE_ENABLE; + l_stby = MC13783_REGTRL_STBY_MODE_DISABLE; + } else if (lp_mode == LOW_POWER_AND_LOW_POWER_CTRL_BY_PIN) { + l_mode = MC13783_REGTRL_LP_MODE_ENABLE; + l_stby = MC13783_REGTRL_STBY_MODE_ENABLE; + } else { + return PMIC_PARAMETER_ERROR; + } + + switch (regulator) { + case SW_SW3: + reg_val = BITFVAL(MC13783_SWCTRL_SW3_MODE, l_mode) | + BITFVAL(MC13783_SWCTRL_SW3_STBY, l_stby); + reg_mask = BITFMASK(MC13783_SWCTRL_SW3_MODE) | + BITFMASK(MC13783_SWCTRL_SW3_STBY); + reg = REG_SWITCHERS_5; + break; + case REGU_VAUDIO: + reg_val = BITFVAL(MC13783_REGCTRL_VAUDIO_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VAUDIO_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VAUDIO_MODE) | + BITFMASK(MC13783_REGCTRL_VAUDIO_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOHI: + reg_val = BITFVAL(MC13783_REGCTRL_VIOHI_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VIOHI_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOHI_MODE) | + BITFMASK(MC13783_REGCTRL_VIOHI_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOLO: + reg_val = BITFVAL(MC13783_REGCTRL_VIOLO_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VIOLO_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VIOLO_MODE) | + BITFMASK(MC13783_REGCTRL_VIOLO_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VDIG_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VDIG_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VDIG_MODE) | + BITFMASK(MC13783_REGCTRL_VDIG_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VGEN: + reg_val = BITFVAL(MC13783_REGCTRL_VGEN_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VGEN_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VGEN_MODE) | + BITFMASK(MC13783_REGCTRL_VGEN_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFDIG: + reg_val = BITFVAL(MC13783_REGCTRL_VRFDIG_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VRFDIG_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFDIG_MODE) | + BITFMASK(MC13783_REGCTRL_VRFDIG_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFREF: + reg_val = BITFVAL(MC13783_REGCTRL_VRFREF_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VRFREF_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFREF_MODE) | + BITFMASK(MC13783_REGCTRL_VRFREF_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFCP: + reg_val = BITFVAL(MC13783_REGCTRL_VRFCP_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VRFCP_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFCP_MODE) | + BITFMASK(MC13783_REGCTRL_VRFCP_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VSIM: + reg_val = BITFVAL(MC13783_REGCTRL_VSIM_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VSIM_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VSIM_MODE) | + BITFMASK(MC13783_REGCTRL_VSIM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VESIM: + reg_val = BITFVAL(MC13783_REGCTRL_VESIM_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VESIM_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VESIM_MODE) | + BITFMASK(MC13783_REGCTRL_VESIM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VCAM: + reg_val = BITFVAL(MC13783_REGCTRL_VCAM_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VCAM_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VCAM_MODE) | + BITFMASK(MC13783_REGCTRL_VCAM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRFBG: + if ((lp_mode == LOW_POWER) || + (lp_mode == LOW_POWER_AND_LOW_POWER_CTRL_BY_PIN)) { + return PMIC_PARAMETER_ERROR; + } + reg_val = BITFVAL(MC13783_REGCTRL_VRFBG_STBY, l_mode); + reg_mask = BITFMASK(MC13783_REGCTRL_VRFBG_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF1: + reg_val = BITFVAL(MC13783_REGCTRL_VRF1_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VRF1_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF1_MODE) | + BITFMASK(MC13783_REGCTRL_VRF1_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF2: + reg_val = BITFVAL(MC13783_REGCTRL_VRF2_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VRF2_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VRF2_MODE) | + BITFMASK(MC13783_REGCTRL_VRF2_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC1: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC1_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VMMC1_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC1_MODE) | + BITFMASK(MC13783_REGCTRL_VMMC1_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC2: + reg_val = BITFVAL(MC13783_REGCTRL_VMMC2_MODE, l_mode) | + BITFVAL(MC13783_REGCTRL_VMMC2_STBY, l_stby); + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC2_MODE) | + BITFMASK(MC13783_REGCTRL_VMMC2_STBY); + reg = REG_REGULATOR_MODE_1; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets low power mode. + * + * @param regulator The regulator to be handled + * @param lp_mode Select nominal or low power mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_lp_mode(t_pmic_regulator regulator, + t_regulator_lp_mode * lp_mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int reg; + unsigned int l_mode, l_stby; + + switch (regulator) { + case SW_SW3: + reg_mask = BITFMASK(MC13783_SWCTRL_SW3_MODE) | + BITFMASK(MC13783_SWCTRL_SW3_STBY); + reg = REG_SWITCHERS_5; + break; + case REGU_VAUDIO: + reg_mask = BITFMASK(MC13783_REGCTRL_VAUDIO_MODE) | + BITFMASK(MC13783_REGCTRL_VAUDIO_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOHI: + reg_mask = BITFMASK(MC13783_REGCTRL_VIOHI_MODE) | + BITFMASK(MC13783_REGCTRL_VIOHI_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VIOLO: + reg_mask = BITFMASK(MC13783_REGCTRL_VIOLO_MODE) | + BITFMASK(MC13783_REGCTRL_VIOLO_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VDIG: + reg_mask = BITFMASK(MC13783_REGCTRL_VDIG_MODE) | + BITFMASK(MC13783_REGCTRL_VDIG_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VGEN: + reg_mask = BITFMASK(MC13783_REGCTRL_VGEN_MODE) | + BITFMASK(MC13783_REGCTRL_VGEN_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFDIG: + reg_mask = BITFMASK(MC13783_REGCTRL_VRFDIG_MODE) | + BITFMASK(MC13783_REGCTRL_VRFDIG_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFREF: + reg_mask = BITFMASK(MC13783_REGCTRL_VRFREF_MODE) | + BITFMASK(MC13783_REGCTRL_VRFREF_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VRFCP: + reg_mask = BITFMASK(MC13783_REGCTRL_VRFCP_MODE) | + BITFMASK(MC13783_REGCTRL_VRFCP_STBY); + reg = REG_REGULATOR_MODE_0; + break; + case REGU_VSIM: + reg_mask = BITFMASK(MC13783_REGCTRL_VSIM_MODE) | + BITFMASK(MC13783_REGCTRL_VSIM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VESIM: + reg_mask = BITFMASK(MC13783_REGCTRL_VESIM_MODE) | + BITFMASK(MC13783_REGCTRL_VESIM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VCAM: + reg_mask = BITFMASK(MC13783_REGCTRL_VCAM_MODE) | + BITFMASK(MC13783_REGCTRL_VCAM_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRFBG: + reg_mask = BITFMASK(MC13783_REGCTRL_VRFBG_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF1: + reg_mask = BITFMASK(MC13783_REGCTRL_VRF1_MODE) | + BITFMASK(MC13783_REGCTRL_VRF1_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VRF2: + reg_mask = BITFMASK(MC13783_REGCTRL_VRF2_MODE) | + BITFMASK(MC13783_REGCTRL_VRF2_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC1: + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC1_MODE) | + BITFMASK(MC13783_REGCTRL_VMMC1_STBY); + reg = REG_REGULATOR_MODE_1; + break; + case REGU_VMMC2: + reg_mask = BITFMASK(MC13783_REGCTRL_VMMC2_MODE) | + BITFMASK(MC13783_REGCTRL_VMMC2_STBY); + reg = REG_REGULATOR_MODE_1; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_val, reg_mask)); + + switch (regulator) { + case SW_SW3: + l_mode = BITFEXT(reg_val, MC13783_SWCTRL_SW3_MODE); + l_stby = BITFEXT(reg_val, MC13783_SWCTRL_SW3_STBY); + break; + case REGU_VAUDIO: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VAUDIO_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VAUDIO_STBY); + break; + case REGU_VIOHI: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VIOHI_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VIOHI_STBY); + break; + case REGU_VIOLO: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VIOLO_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VIOLO_STBY); + break; + case REGU_VDIG: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VDIG_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VDIG_STBY); + break; + case REGU_VGEN: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VGEN_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VGEN_STBY); + break; + case REGU_VRFDIG: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VRFDIG_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRFDIG_STBY); + break; + case REGU_VRFREF: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VRFREF_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRFREF_STBY); + break; + case REGU_VRFCP: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VRFCP_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRFCP_STBY); + break; + case REGU_VSIM: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VSIM_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VSIM_STBY); + break; + case REGU_VESIM: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VESIM_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VESIM_STBY); + break; + case REGU_VCAM: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VCAM_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VCAM_STBY); + break; + case REGU_VRFBG: + l_mode = MC13783_REGTRL_LP_MODE_DISABLE; + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRFBG_STBY); + break; + case REGU_VRF1: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VRF1_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRF1_STBY); + break; + case REGU_VRF2: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VRF2_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VRF2_STBY); + break; + case REGU_VMMC1: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VMMC1_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VMMC1_STBY); + break; + case REGU_VMMC2: + l_mode = BITFEXT(reg_val, MC13783_REGCTRL_VMMC2_MODE); + l_stby = BITFEXT(reg_val, MC13783_REGCTRL_VMMC2_STBY); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + if ((l_mode == MC13783_REGTRL_LP_MODE_DISABLE) && + (l_stby == MC13783_REGTRL_STBY_MODE_DISABLE)) { + *lp_mode = LOW_POWER_DISABLED; + } else if ((l_mode == MC13783_REGTRL_LP_MODE_DISABLE) && + (l_stby == MC13783_REGTRL_STBY_MODE_ENABLE)) { + *lp_mode = LOW_POWER_CTRL_BY_PIN; + } else if ((l_mode == MC13783_REGTRL_LP_MODE_ENABLE) && + (l_stby == MC13783_REGTRL_STBY_MODE_DISABLE)) { + *lp_mode = LOW_POWER_EN; + } else { + *lp_mode = LOW_POWER_AND_LOW_POWER_CTRL_BY_PIN; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the regulator configuration. + * + * @param regulator The regulator to be configured. + * @param config The regulator output configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_config(t_pmic_regulator regulator, + t_regulator_config * config) +{ + if (config == NULL) { + return PMIC_ERROR; + } + + switch (regulator) { + case SW_SW1A: + case SW_SW1B: + case SW_SW2A: + case SW_SW2B: + CHECK_ERROR(pmic_power_regulator_set_voltage + (regulator, config->voltage)); + CHECK_ERROR(pmic_power_switcher_set_dvs + (regulator, config->voltage_lvs)); + CHECK_ERROR(pmic_power_switcher_set_stby + (regulator, config->voltage_stby)); + CHECK_ERROR(pmic_power_switcher_set_mode + (regulator, config->mode, false)); + CHECK_ERROR(pmic_power_switcher_set_mode + (regulator, config->stby_mode, true)); + CHECK_ERROR(pmic_power_switcher_set_dvs_speed + (regulator, config->dvs_speed)); + CHECK_ERROR(pmic_power_switcher_set_panic_mode + (regulator, config->panic_mode)); + CHECK_ERROR(pmic_power_switcher_set_softstart + (regulator, config->softstart)); + break; + case SW_PLL: + CHECK_ERROR(pmic_power_switcher_set_factor + (regulator, config->factor)); + break; + case SW_SW3: + case REGU_VIOLO: + case REGU_VDIG: + case REGU_VGEN: + case REGU_VRFDIG: + case REGU_VRFREF: + case REGU_VRFCP: + case REGU_VSIM: + case REGU_VESIM: + case REGU_VCAM: + case REGU_VRF1: + case REGU_VRF2: + case REGU_VMMC1: + case REGU_VMMC2: + CHECK_ERROR(pmic_power_regulator_set_voltage + (regulator, config->voltage)); + CHECK_ERROR(pmic_power_regulator_set_lp_mode + (regulator, config->lp_mode)); + break; + case REGU_VVIB: + CHECK_ERROR(pmic_power_regulator_set_voltage + (regulator, config->voltage)); + break; + case REGU_VAUDIO: + case REGU_VIOHI: + case REGU_VRFBG: + CHECK_ERROR(pmic_power_regulator_set_lp_mode + (regulator, config->lp_mode)); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function retrives the regulator output configuration. + * + * @param regulator The regulator to be truned off. + * @param config Pointer to regulator configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_config(t_pmic_regulator regulator, + t_regulator_config * config) +{ + if (config == NULL) { + return PMIC_ERROR; + } + + switch (regulator) { + case SW_SW1A: + case SW_SW1B: + case SW_SW2A: + case SW_SW2B: + CHECK_ERROR(pmic_power_regulator_get_voltage + (regulator, &config->voltage)); + CHECK_ERROR(pmic_power_switcher_get_dvs + (regulator, &config->voltage_lvs)); + CHECK_ERROR(pmic_power_switcher_get_stby + (regulator, &config->voltage_stby)); + CHECK_ERROR(pmic_power_switcher_get_mode + (regulator, &config->mode, false)); + CHECK_ERROR(pmic_power_switcher_get_mode + (regulator, &config->stby_mode, true)); + CHECK_ERROR(pmic_power_switcher_get_dvs_speed + (regulator, &config->dvs_speed)); + CHECK_ERROR(pmic_power_switcher_get_panic_mode + (regulator, &config->panic_mode)); + CHECK_ERROR(pmic_power_switcher_get_softstart + (regulator, &config->softstart)); + break; + case SW_PLL: + CHECK_ERROR(pmic_power_switcher_get_factor + (regulator, &config->factor)); + break; + case SW_SW3: + case REGU_VIOLO: + case REGU_VDIG: + case REGU_VGEN: + case REGU_VRFDIG: + case REGU_VRFREF: + case REGU_VRFCP: + case REGU_VSIM: + case REGU_VESIM: + case REGU_VCAM: + case REGU_VRF1: + case REGU_VRF2: + case REGU_VMMC1: + case REGU_VMMC2: + CHECK_ERROR(pmic_power_regulator_get_voltage + (regulator, &config->voltage)); + CHECK_ERROR(pmic_power_regulator_get_lp_mode + (regulator, &config->lp_mode)); + break; + case REGU_VVIB: + CHECK_ERROR(pmic_power_regulator_get_voltage + (regulator, &config->voltage)); + break; + case REGU_VAUDIO: + case REGU_VIOHI: + case REGU_VRFBG: + CHECK_ERROR(pmic_power_regulator_get_lp_mode + (regulator, &config->lp_mode)); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function enables automatically VBKUP2 in the memory hold modes. + * Only on mc13783 2.0 or higher + * + * @param en if true, enable VBKUP2AUTOMH + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_vbkup2_auto_en(bool en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_val = BITFVAL(MC13783_REGCTRL_VBKUP2AUTOMH, en); + reg_mask = BITFMASK(MC13783_REGCTRL_VBKUP2AUTOMH); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, + reg_val, reg_mask)); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets state of automatically VBKUP2. + * Only on mc13783 2.0 or higher + * + * @param en if true, VBKUP2AUTOMH is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_vbkup2_auto_state(bool * en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_mask = BITFMASK(MC13783_REGCTRL_VBKUP2AUTOMH); + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_0, + ®_val, reg_mask)); + *en = BITFEXT(reg_val, MC13783_REGCTRL_VBKUP2AUTOMH); + + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function enables battery detect function. + * Only on mc13783 2.0 or higher + * + * @param en if true, enable BATTDETEN + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_bat_det_en(bool en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_val = BITFVAL(MC13783_REGCTRL_BATTDETEN, en); + reg_mask = BITFMASK(MC13783_REGCTRL_BATTDETEN); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, + reg_val, reg_mask)); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets state of battery detect function. + * Only on mc13783 2.0 or higher + * + * @param en if true, BATTDETEN is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_bat_det_state(bool * en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_mask = BITFMASK(MC13783_REGCTRL_BATTDETEN); + + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_0, + ®_val, reg_mask)); + *en = BITFEXT(reg_val, MC13783_REGCTRL_BATTDETEN); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function enables control of VVIB by VIBEN pin. + * Only on mc13783 2.0 or higher + * + * @param en if true, enable VIBPINCTRL + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_vib_pin_en(bool en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_val = BITFVAL(MC13783_REGCTRL_VIBPINCTRL, en); + reg_mask = BITFMASK(MC13783_REGCTRL_VIBPINCTRL); + + CHECK_ERROR(pmic_write_reg(REG_POWER_MISCELLANEOUS, + reg_val, reg_mask)); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets state of control of VVIB by VIBEN pin. + * Only on mc13783 2.0 or higher + * @param en if true, VIBPINCTRL is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_gets_vib_pin_state(bool * en) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_mask = BITFMASK(MC13783_REGCTRL_VIBPINCTRL); + CHECK_ERROR(pmic_read_reg(REG_POWER_MISCELLANEOUS, + ®_val, reg_mask)); + *en = BITFEXT(reg_val, MC13783_REGCTRL_VIBPINCTRL); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function returns power up sense value + * + * @param p_up_sense value of power up sense + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_power_mode_sense(struct t_p_up_sense * p_up_sense) +{ + unsigned int reg_value = 0; + CHECK_ERROR(pmic_read_reg(REG_POWER_UP_MODE_SENSE, + ®_value, PMIC_ALL_BITS)); + p_up_sense->state_ictest = (STATE_ICTEST_MASK & reg_value); + p_up_sense->state_clksel = ((STATE_CLKSEL_MASK & reg_value) + >> STATE_CLKSEL_BIT); + p_up_sense->state_pums1 = ((STATE_PUMS1_MASK & reg_value) + >> STATE_PUMS1_BITS); + p_up_sense->state_pums2 = ((STATE_PUMS2_MASK & reg_value) + >> STATE_PUMS2_BITS); + p_up_sense->state_pums3 = ((STATE_PUMS3_MASK & reg_value) + >> STATE_PUMS3_BITS); + p_up_sense->state_chrgmode0 = ((STATE_CHRGM1_MASK & reg_value) + >> STATE_CHRGM1_BITS); + p_up_sense->state_chrgmode1 = ((STATE_CHRGM2_MASK & reg_value) + >> STATE_CHRGM2_BITS); + p_up_sense->state_umod = ((STATE_UMOD_MASK & reg_value) + >> STATE_UMOD_BITS); + p_up_sense->state_usben = ((STATE_USBEN_MASK & reg_value) + >> STATE_USBEN_BIT); + p_up_sense->state_sw_1a1b_joined = ((STATE_SW1A_J_B_MASK & reg_value) + >> STATE_SW1A_J_B_BIT); + p_up_sense->state_sw_2a2b_joined = ((STATE_SW2A_J_B_MASK & reg_value) + >> STATE_SW2A_J_B_BIT); + return PMIC_SUCCESS; +} + +/*! + * This function configures the Regen assignment for all regulator + * + * @param regulator type of regulator + * @param en_dis if true, the regulator is enabled by regen. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_regen_assig(t_pmic_regulator regulator, bool en_dis) +{ + unsigned int reg_val = 0, reg_mask = 0; + + switch (regulator) { + case REGU_VAUDIO: + reg_val = BITFVAL(MC13783_REGGEN_VAUDIO, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VAUDIO); + break; + case REGU_VIOHI: + reg_val = BITFVAL(MC13783_REGGEN_VIOHI, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VIOHI); + break; + case REGU_VIOLO: + reg_val = BITFVAL(MC13783_REGGEN_VIOLO, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VIOLO); + break; + case REGU_VDIG: + reg_val = BITFVAL(MC13783_REGGEN_VDIG, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VDIG); + break; + case REGU_VGEN: + reg_val = BITFVAL(MC13783_REGGEN_VGEN, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VGEN); + break; + case REGU_VRFDIG: + reg_val = BITFVAL(MC13783_REGGEN_VRFDIG, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRFDIG); + break; + case REGU_VRFREF: + reg_val = BITFVAL(MC13783_REGGEN_VRFREF, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRFREF); + break; + case REGU_VRFCP: + reg_val = BITFVAL(MC13783_REGGEN_VRFCP, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRFCP); + break; + case REGU_VCAM: + reg_val = BITFVAL(MC13783_REGGEN_VCAM, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VCAM); + break; + case REGU_VRFBG: + reg_val = BITFVAL(MC13783_REGGEN_VRFBG, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRFBG); + break; + case REGU_VRF1: + reg_val = BITFVAL(MC13783_REGGEN_VRF1, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRF1); + break; + case REGU_VRF2: + reg_val = BITFVAL(MC13783_REGGEN_VRF2, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VRF2); + break; + case REGU_VMMC1: + reg_val = BITFVAL(MC13783_REGGEN_VMMC1, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VMMC1); + break; + case REGU_VMMC2: + reg_val = BITFVAL(MC13783_REGGEN_VMMC2, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_VMMC2); + break; + case REGU_GPO1: + reg_val = BITFVAL(MC13783_REGGEN_GPO1, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_GPO1); + break; + case REGU_GPO2: + reg_val = BITFVAL(MC13783_REGGEN_GPO2, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_GPO2); + break; + case REGU_GPO3: + reg_val = BITFVAL(MC13783_REGGEN_GPO3, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_GPO3); + break; + case REGU_GPO4: + reg_val = BITFVAL(MC13783_REGGEN_GPO4, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_GPO4); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(REG_REGEN_ASSIGNMENT, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets the Regen assignment for all regulator + * + * @param regulator type of regulator + * @param en_dis return value, if true : + * the regulator is enabled by regen. + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_regen_assig(t_pmic_regulator regulator, + bool * en_dis) +{ + unsigned int reg_val = 0, reg_mask = 0; + + switch (regulator) { + case REGU_VAUDIO: + reg_mask = BITFMASK(MC13783_REGGEN_VAUDIO); + break; + case REGU_VIOHI: + reg_mask = BITFMASK(MC13783_REGGEN_VIOHI); + break; + case REGU_VIOLO: + reg_mask = BITFMASK(MC13783_REGGEN_VIOLO); + break; + case REGU_VDIG: + reg_mask = BITFMASK(MC13783_REGGEN_VDIG); + break; + case REGU_VGEN: + reg_mask = BITFMASK(MC13783_REGGEN_VGEN); + break; + case REGU_VRFDIG: + reg_mask = BITFMASK(MC13783_REGGEN_VRFDIG); + break; + case REGU_VRFREF: + reg_mask = BITFMASK(MC13783_REGGEN_VRFREF); + break; + case REGU_VRFCP: + reg_mask = BITFMASK(MC13783_REGGEN_VRFCP); + break; + case REGU_VCAM: + reg_mask = BITFMASK(MC13783_REGGEN_VCAM); + break; + case REGU_VRFBG: + reg_mask = BITFMASK(MC13783_REGGEN_VRFBG); + break; + case REGU_VRF1: + reg_mask = BITFMASK(MC13783_REGGEN_VRF1); + break; + case REGU_VRF2: + reg_mask = BITFMASK(MC13783_REGGEN_VRF2); + break; + case REGU_VMMC1: + reg_mask = BITFMASK(MC13783_REGGEN_VMMC1); + break; + case REGU_VMMC2: + reg_mask = BITFMASK(MC13783_REGGEN_VMMC2); + break; + case REGU_GPO1: + reg_mask = BITFMASK(MC13783_REGGEN_GPO1); + break; + case REGU_GPO2: + reg_mask = BITFMASK(MC13783_REGGEN_GPO2); + break; + case REGU_GPO3: + reg_mask = BITFMASK(MC13783_REGGEN_GPO3); + break; + case REGU_GPO4: + reg_mask = BITFMASK(MC13783_REGGEN_GPO4); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(REG_REGEN_ASSIGNMENT, ®_val, reg_mask)); + + switch (regulator) { + case REGU_VAUDIO: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VAUDIO); + break; + case REGU_VIOHI: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VIOHI); + break; + case REGU_VIOLO: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VIOLO); + break; + case REGU_VDIG: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VDIG); + break; + case REGU_VGEN: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VGEN); + break; + case REGU_VRFDIG: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRFDIG); + break; + case REGU_VRFREF: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRFREF); + break; + case REGU_VRFCP: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRFCP); + break; + case REGU_VCAM: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VCAM); + break; + case REGU_VRFBG: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRFBG); + break; + case REGU_VRF1: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRF1); + break; + case REGU_VRF2: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VRF2); + break; + case REGU_VMMC1: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VMMC1); + break; + case REGU_VMMC2: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_VMMC2); + break; + case REGU_GPO1: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_GPO1); + break; + case REGU_GPO2: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_GPO2); + break; + case REGU_GPO3: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_GPO3); + break; + case REGU_GPO4: + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_GPO4); + break; + default: + break; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets the Regen polarity. + * + * @param en_dis If true regen is inverted. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_regen_inv(bool en_dis) +{ + unsigned int reg_val = 0, reg_mask = 0; + + reg_val = BITFVAL(MC13783_REGGEN_INV, en_dis); + reg_mask = BITFMASK(MC13783_REGGEN_INV); + + CHECK_ERROR(pmic_write_reg(REG_REGEN_ASSIGNMENT, reg_val, reg_mask)); + return PMIC_SUCCESS; +} + +/*! + * This function gets the Regen polarity. + * + * @param en_dis If true regen is inverted. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_regen_inv(bool * en_dis) +{ + unsigned int reg_val = 0, reg_mask = 0; + + reg_mask = BITFMASK(MC13783_REGGEN_INV); + CHECK_ERROR(pmic_read_reg(REG_REGEN_ASSIGNMENT, ®_val, reg_mask)); + *en_dis = BITFEXT(reg_val, MC13783_REGGEN_INV); + return PMIC_SUCCESS; +} + +/*! + * This function enables esim control voltage. + * Only on mc13783 2.0 or higher + * + * @param vesim if true, enable VESIMESIMEN + * @param vmmc1 if true, enable VMMC1ESIMEN + * @param vmmc2 if true, enable VMMC2ESIMEN + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_esim_v_en(bool vesim, bool vmmc1, bool vmmc2) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_val = BITFVAL(MC13783_REGGEN_VESIMESIM, vesim) | + BITFVAL(MC13783_REGGEN_VMMC1ESIM, vesim) | + BITFVAL(MC13783_REGGEN_VMMC2ESIM, vesim); + reg_mask = BITFMASK(MC13783_REGGEN_VESIMESIM) | + BITFMASK(MC13783_REGGEN_VMMC1ESIM) | + BITFMASK(MC13783_REGGEN_VMMC2ESIM); + CHECK_ERROR(pmic_write_reg(REG_REGEN_ASSIGNMENT, + reg_val, reg_mask)); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets esim control voltage values. + * Only on mc13783 2.0 or higher + * + * @param vesim if true, enable VESIMESIMEN + * @param vmmc1 if true, enable VMMC1ESIMEN + * @param vmmc2 if true, enable VMMC2ESIMEN + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_gets_esim_v_state(bool * vesim, bool * vmmc1, + bool * vmmc2) +{ + unsigned int reg_val = 0, reg_mask = 0; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + reg_mask = BITFMASK(MC13783_REGGEN_VESIMESIM) | + BITFMASK(MC13783_REGGEN_VMMC1ESIM) | + BITFMASK(MC13783_REGGEN_VMMC2ESIM); + CHECK_ERROR(pmic_read_reg(REG_REGEN_ASSIGNMENT, + ®_val, reg_mask)); + *vesim = BITFEXT(reg_val, MC13783_REGGEN_VESIMESIM); + *vmmc1 = BITFEXT(reg_val, MC13783_REGGEN_VMMC1ESIM); + *vmmc2 = BITFEXT(reg_val, MC13783_REGGEN_VMMC2ESIM); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function enables auto reset after a system reset. + * + * @param en if true, the auto reset is enabled + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_auto_reset_en(bool en) +{ + unsigned int reg_val = 0, reg_mask = 0; + + reg_val = BITFVAL(MC13783_AUTO_RESTART, en); + reg_mask = BITFMASK(MC13783_AUTO_RESTART); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_2, reg_val, reg_mask)); + return PMIC_SUCCESS; +} + +/*! + * This function gets auto reset configuration. + * + * @param en if true, the auto reset is enabled + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_auto_reset_en(bool * en) +{ + unsigned int reg_val = 0, reg_mask = 0; + + reg_mask = BITFMASK(MC13783_AUTO_RESTART); + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_2, ®_val, reg_mask)); + *en = BITFEXT(reg_val, MC13783_AUTO_RESTART); + return PMIC_SUCCESS; +} + +/*! + * This function configures a system reset on a button. + * + * @param bt type of button. + * @param sys_rst if true, enable the system reset on this button + * @param deb_time sets the debounce time on this button pin + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_conf_button(t_button bt, bool sys_rst, int deb_time) +{ + int max_val = 0; + unsigned int reg_val = 0, reg_mask = 0; + + max_val = (1 << MC13783_DEB_BT_ON1B_WID) - 1; + if (deb_time > max_val) { + return PMIC_PARAMETER_ERROR; + } + + switch (bt) { + case BT_ON1B: + reg_val = BITFVAL(MC13783_EN_BT_ON1B, sys_rst) | + BITFVAL(MC13783_DEB_BT_ON1B, deb_time); + reg_mask = BITFMASK(MC13783_EN_BT_ON1B) | + BITFMASK(MC13783_DEB_BT_ON1B); + break; + case BT_ON2B: + reg_val = BITFVAL(MC13783_EN_BT_ON2B, sys_rst) | + BITFVAL(MC13783_DEB_BT_ON2B, deb_time); + reg_mask = BITFMASK(MC13783_EN_BT_ON2B) | + BITFMASK(MC13783_DEB_BT_ON2B); + break; + case BT_ON3B: + reg_val = BITFVAL(MC13783_EN_BT_ON3B, sys_rst) | + BITFVAL(MC13783_DEB_BT_ON3B, deb_time); + reg_mask = BITFMASK(MC13783_EN_BT_ON3B) | + BITFMASK(MC13783_DEB_BT_ON3B); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_2, reg_val, reg_mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets configuration of a button. + * + * @param bt type of button. + * @param sys_rst if true, the system reset is enabled on this button + * @param deb_time gets the debounce time on this button pin + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_conf_button(t_button bt, + bool * sys_rst, int *deb_time) +{ + unsigned int reg_val = 0, reg_mask = 0; + + switch (bt) { + case BT_ON1B: + reg_mask = BITFMASK(MC13783_EN_BT_ON1B) | + BITFMASK(MC13783_DEB_BT_ON1B); + break; + case BT_ON2B: + reg_mask = BITFMASK(MC13783_EN_BT_ON2B) | + BITFMASK(MC13783_DEB_BT_ON2B); + break; + case BT_ON3B: + reg_mask = BITFMASK(MC13783_EN_BT_ON3B) | + BITFMASK(MC13783_DEB_BT_ON3B); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(REG_POWER_CONTROL_2, ®_val, reg_mask)); + + switch (bt) { + case BT_ON1B: + *sys_rst = BITFEXT(reg_val, MC13783_EN_BT_ON1B); + *deb_time = BITFEXT(reg_val, MC13783_DEB_BT_ON1B); + break; + case BT_ON2B: + *sys_rst = BITFEXT(reg_val, MC13783_EN_BT_ON2B); + *deb_time = BITFEXT(reg_val, MC13783_DEB_BT_ON2B); + break; + case BT_ON3B: + *sys_rst = BITFEXT(reg_val, MC13783_EN_BT_ON3B); + *deb_time = BITFEXT(reg_val, MC13783_DEB_BT_ON3B); + break; + default: + return PMIC_PARAMETER_ERROR; + } + return PMIC_SUCCESS; +} + +/*! + * This function is used to un/subscribe on power event IT. + * + * @param event type of event. + * @param callback event callback function. + * @param sub define if Un/subscribe event. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_event(t_pwr_int event, void *callback, bool sub) +{ + pmic_event_callback_t power_callback; + type_event power_event; + + power_callback.func = callback; + power_callback.param = NULL; + switch (event) { + case PWR_IT_BPONI: + power_event = EVENT_BPONI; + break; + case PWR_IT_LOBATLI: + power_event = EVENT_LOBATLI; + break; + case PWR_IT_LOBATHI: + power_event = EVENT_LOBATHI; + break; + case PWR_IT_ONOFD1I: + power_event = EVENT_ONOFD1I; + break; + case PWR_IT_ONOFD2I: + power_event = EVENT_ONOFD2I; + break; + case PWR_IT_ONOFD3I: + power_event = EVENT_ONOFD3I; + break; + case PWR_IT_SYSRSTI: + power_event = EVENT_SYSRSTI; + break; + case PWR_IT_PWRRDYI: + power_event = EVENT_PWRRDYI; + break; + case PWR_IT_PCI: + power_event = EVENT_PCI; + break; + case PWR_IT_WARMI: + power_event = EVENT_WARMI; + break; + default: + return PMIC_PARAMETER_ERROR; + } + if (sub == true) { + CHECK_ERROR(pmic_event_subscribe(power_event, power_callback)); + } else { + CHECK_ERROR(pmic_event_unsubscribe + (power_event, power_callback)); + } + return PMIC_SUCCESS; +} + +/*! + * This function is used to subscribe on power event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_event_sub(t_pwr_int event, void *callback) +{ + return pmic_power_event(event, callback, true); +} + +/*! + * This function is used to un subscribe on power event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_event_unsub(t_pwr_int event, void *callback) +{ + return pmic_power_event(event, callback, false); +} + +void pmic_power_key_callback(void) +{ +#ifdef CONFIG_MXC_HWEVENT + /*read the power key is pressed or up */ + t_sensor_bits sense; + struct mxc_hw_event event = { HWE_POWER_KEY, 0 }; + + pmic_get_sensors(&sense); + if (sense.sense_onofd1s) { + pr_debug("PMIC Power key up\n"); + event.args = PWRK_UNPRESS; + } else { + pr_debug("PMIC Power key pressed\n"); + event.args = PWRK_PRESS; + } + /* send hw event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +static irqreturn_t power_key_int(int irq, void *dev_id) +{ + pr_info(KERN_INFO "on-off key pressed\n"); + + return 0; +} + +extern void gpio_power_key_active(void); + +/* + * Init and Exit + */ + +static int pmic_power_probe(struct platform_device *pdev) +{ + int irq, ret; + struct pmic_platform_data *ppd; + + /* configure on/off button */ + gpio_power_key_active(); + + ppd = pdev->dev.platform_data; + if (ppd) + irq = ppd->power_key_irq; + else + goto done; + + if (irq == 0) { + pr_info(KERN_INFO "PMIC Power has no platform data\n"); + goto done; + } + set_irq_type(irq, IRQF_TRIGGER_RISING); + + ret = request_irq(irq, power_key_int, 0, "power_key", 0); + if (ret) + pr_info(KERN_ERR "register on-off key interrupt failed\n"); + + set_irq_wake(irq, 1); + + done: + pr_info(KERN_INFO "PMIC Power successfully probed\n"); + return 0; +} + +static struct platform_driver pmic_power_driver_ldm = { + .driver = { + .name = "pmic_power", + }, + .suspend = pmic_power_suspend, + .resume = pmic_power_resume, + .probe = pmic_power_probe, + .remove = NULL, +}; + +static int __init pmic_power_init(void) +{ + pr_debug("PMIC Power driver loading..\n"); + pmic_power_event_sub(PWR_IT_ONOFD1I, pmic_power_key_callback); + /* set power off hook to mc13783 power off */ + pm_power_off = pmic_power_off; + return platform_driver_register(&pmic_power_driver_ldm); +} +static void __exit pmic_power_exit(void) +{ + pmic_power_event_unsub(PWR_IT_ONOFD1I, pmic_power_key_callback); + platform_driver_unregister(&pmic_power_driver_ldm); + pr_debug("PMIC Power driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +subsys_initcall_sync(pmic_power_init); +module_exit(pmic_power_exit); + +MODULE_DESCRIPTION("pmic_power driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/Kconfig @@ -0,0 +1,55 @@ +# +# PMIC Modules configuration +# + +config MXC_MC13783_ADC + tristate "MC13783 ADC support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 ADC module driver. This module provides kernel API + for the ADC system of MC13783. + It controls also the touch screen interface. + If you want MC13783 ADC support, you should say Y here + +config MXC_MC13783_AUDIO + tristate "MC13783 Audio support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 audio module driver. This module provides kernel API + for audio part of MC13783. + If you want MC13783 audio support, you should say Y here +config MXC_MC13783_RTC + tristate "MC13783 Real Time Clock (RTC) support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 RTC module driver. This module provides kernel API + for RTC part of MC13783. + If you want MC13783 RTC support, you should say Y here +config MXC_MC13783_LIGHT + tristate "MC13783 Light and Backlight support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 Light module driver. This module provides kernel API + for led and backlight control part of MC13783. + If you want MC13783 Light support, you should say Y here +config MXC_MC13783_BATTERY + tristate "MC13783 Battery API support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 battery module driver. This module provides kernel API + for battery control part of MC13783. + If you want MC13783 battery support, you should say Y here +config MXC_MC13783_CONNECTIVITY + tristate "MC13783 Connectivity API support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 connectivity module driver. This module provides kernel API + for USB/RS232 connectivity control part of MC13783. + If you want MC13783 connectivity support, you should say Y here +config MXC_MC13783_POWER + tristate "MC13783 Power API support" + depends on MXC_PMIC_MC13783 + ---help--- + This is the MC13783 power and supplies module driver. This module provides kernel API + for power and regulator control part of MC13783. + If you want MC13783 power support, you should say Y here --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_convity.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_convity.c @@ -0,0 +1,2482 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_convity.c + * @brief Implementation of the PMIC Connectivity driver APIs. + * + * The PMIC connectivity device driver and this API were developed to support + * the external connectivity capabilities of several power management ICs that + * are available from Freescale Semiconductor, Inc. + * + * The following operating modes, in terms of external connectivity, are + * supported: + * + * @verbatim + Operating Mode mc13783 + --------------- ------- + USB (incl. OTG) Yes + RS-232 Yes + CEA-936 Yes + + @endverbatim + * + * @ingroup PMIC_CONNECTIVITY + */ + +#include /* For tasklet interface. */ +#include /* For kernel module interface. */ +#include /* For spinlock interface. */ +#include /* For PMIC ADC driver interface. */ +#include +#include /* For PMIC Connectivity driver interface. */ + +/* + * mc13783 Connectivity API + */ +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_convity_open); +EXPORT_SYMBOL(pmic_convity_close); +EXPORT_SYMBOL(pmic_convity_set_mode); +EXPORT_SYMBOL(pmic_convity_get_mode); +EXPORT_SYMBOL(pmic_convity_reset); +EXPORT_SYMBOL(pmic_convity_set_callback); +EXPORT_SYMBOL(pmic_convity_clear_callback); +EXPORT_SYMBOL(pmic_convity_get_callback); +EXPORT_SYMBOL(pmic_convity_usb_set_speed); +EXPORT_SYMBOL(pmic_convity_usb_get_speed); +EXPORT_SYMBOL(pmic_convity_usb_set_power_source); +EXPORT_SYMBOL(pmic_convity_usb_get_power_source); +EXPORT_SYMBOL(pmic_convity_usb_set_xcvr); +EXPORT_SYMBOL(pmic_convity_usb_get_xcvr); +EXPORT_SYMBOL(pmic_convity_usb_otg_set_dlp_duration); +EXPORT_SYMBOL(pmic_convity_usb_otg_get_dlp_duration); +EXPORT_SYMBOL(pmic_convity_usb_otg_set_config); +EXPORT_SYMBOL(pmic_convity_usb_otg_clear_config); +EXPORT_SYMBOL(pmic_convity_usb_otg_get_config); +EXPORT_SYMBOL(pmic_convity_set_output); +EXPORT_SYMBOL(pmic_convity_rs232_set_config); +EXPORT_SYMBOL(pmic_convity_rs232_get_config); +EXPORT_SYMBOL(pmic_convity_cea936_exit_signal); + +/*! @def SET_BITS + * Set a register field to a given value. + */ + +#define SET_BITS(reg, field, value) (((value) << reg.field.offset) & \ + reg.field.mask) + +/*! @def GET_BITS + * Get the current value of a given register field. + */ +#define GET_BITS(reg, value) (((value) & reg.mask) >> \ + reg.offset) + +/*! + * @brief Define the possible states for a device handle. + * + * This enumeration is used to track the current state of each device handle. + */ +typedef enum { + HANDLE_FREE, /*!< Handle is available for use. */ + HANDLE_IN_USE /*!< Handle is currently in use. */ +} HANDLE_STATE; + +/* + * This structure is used to define a specific hardware register field. + * + * All hardware register fields are defined using an offset to the LSB + * and a mask. The offset is used to right shift a register value before + * applying the mask to actually obtain the value of the field. + */ +typedef struct { + const unsigned char offset; /* Offset of LSB of register field. */ + const unsigned int mask; /* Mask value used to isolate register field. */ +} REGFIELD; + +/*! + * @brief This structure is used to identify the fields in the USBCNTRL_REG_0 hardware register. + * + * This structure lists all of the fields within the USBCNTRL_REG_0 hardware + * register. + */ +typedef struct { + REGFIELD FSENB; /*!< USB Full Speed Enable */ + REGFIELD USB_SUSPEND; /*!< USB Suspend Mode Enable */ + REGFIELD USB_PU; /*!< USB Pullup Enable */ + REGFIELD UDP_PD; /*!< USB Data Plus Pulldown Enable */ + REGFIELD UDM_PD; /*!< USB 150K UDP Pullup Enable */ + REGFIELD DP150K_PU; /*!< USB Pullup/Pulldown Override Enable */ + REGFIELD VBUSPDENB; /*!< USB VBUS Pulldown NMOS Switch Enable */ + REGFIELD CURRENT_LIMIT; /*!< USB Regulator Current Limit Setting-3 bits */ + REGFIELD DLP_SRP; /*!< USB Data Line Pulsing Timer Enable */ + REGFIELD SE0_CONN; /*!< USB Pullup Connect When SE0 Detected */ + REGFIELD USBXCVREN; /*!< USB Transceiver Enabled When INTERFACE_MODE[2:0]=000 and RESETB=high */ + REGFIELD PULLOVR; /*!< 1K5 Pullup and UDP/UDM Pulldown Disable When UTXENB=Low */ + REGFIELD INTERFACE_MODE; /*!< Connectivity Interface Mode Select-3 Bits */ + REGFIELD DATSE0; /*!< USB Single or Differential Mode Select */ + REGFIELD BIDIR; /*!< USB Unidirectional/Bidirectional Transmission */ + REGFIELD USBCNTRL; /*!< USB Mode of Operation controlled By USBEN/SPI Pin */ + REGFIELD IDPD; /*!< USB UID Pulldown Enable */ + REGFIELD IDPULSE; /*!< USB Pulse to Gnd on UID Line Generated */ + REGFIELD IDPUCNTRL; /*!< USB UID Pin pulled high By 5ua Curr Source */ + REGFIELD DMPULSE; /*!< USB Positive pulse on the UDM Line Generated */ +} USBCNTRL_REG_0; + +/*! + * @brief This variable is used to access the USBCNTRL_REG_0 hardware register. + * + * This variable defines how to access all of the fields within the + * USBCNTRL_REG_0 hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const USBCNTRL_REG_0 regUSB0 = { + {0, 0x000001}, /*!< FSENB */ + {1, 0x000002}, /*!< USB_SUSPEND */ + {2, 0x000004}, /*!< USB_PU */ + {3, 0x000008}, /*!< UDP_PD */ + {4, 0x000010}, /*!< UDM_PD */ + {5, 0x000020}, /*!< DP150K_PU */ + {6, 0x000040}, /*!< VBUSPDENB */ + {7, 0x000380}, /*!< CURRENT_LIMIT */ + {10, 0x000400}, /*!< DLP_SRP */ + {11, 0x000800}, /*!< SE0_CONN */ + {12, 0x001000}, /*!< USBXCVREN */ + {13, 0x002000}, /*!< PULLOVR */ + {14, 0x01c000}, /*!< INTERFACE_MODE */ + {17, 0x020000}, /*!< DATSE0 */ + {18, 0x040000}, /*!< BIDIR */ + {19, 0x080000}, /*!< USBCNTRL */ + {20, 0x100000}, /*!< IDPD */ + {21, 0x200000}, /*!< IDPULSE */ + {22, 0x400000}, /*!< IDPUCNTRL */ + {23, 0x800000} /*!< DMPULSE */ + +}; + +/*! + * @brief This structure is used to identify the fields in the USBCNTRL_REG_1 hardware register. + * + * This structure lists all of the fields within the USBCNTRL_REG_1 hardware + * register. + */ +typedef struct { + REGFIELD VUSBIN; /*!< Controls The Input Source For VUSB */ + REGFIELD VUSB; /*!< VUSB Output Voltage Select-High=3.3V Low=2.775V */ + REGFIELD VUSBEN; /*!< VUSB Output Enable- */ + REGFIELD VBUSEN; /*!< VBUS Output Enable- */ + REGFIELD RSPOL; /*!< Low=RS232 TX on UDM, RX on UDP + High= RS232 TX on UDP, RX on UDM */ + REGFIELD RSTRI; /*!< TX Forced To Tristate in RS232 Mode Only */ + REGFIELD ID100kPU; /*!< 100k UID Pullup Enabled */ +} USBCNTRL_REG_1; + +/*! + * @brief This variable is used to access the USBCNTRL_REG_1 hardware register. + * + * This variable defines how to access all of the fields within the + * USBCNTRL_REG_1 hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const USBCNTRL_REG_1 regUSB1 = { + {0, 0x000003}, /*!< VUSBIN-2 Bits */ + {2, 0x000004}, /*!< VUSB */ + {3, 0x000008}, /*!< VUSBEN */ + /*{4, 0x000010} *//*!< Reserved */ + {5, 0x000020}, /*!< VBUSEN */ + {6, 0x000040}, /*!< RSPOL */ + {7, 0x000080}, /*!< RSTRI */ + {8, 0x000100} /*!< ID100kPU */ + /*!< 9-23 Unused */ +}; + +/*! Define a mask to access the entire hardware register. */ +static const unsigned int REG_FULLMASK = 0xffffff; + +/*! Define the mc13783 USBCNTRL_REG_0 register power on reset state. */ +static const unsigned int RESET_USBCNTRL_REG_0 = 0x080060; + +/*! Define the mc13783 USBCNTRL_REG_1 register power on reset state. */ +static const unsigned int RESET_USBCNTRL_REG_1 = 0x000006; + +static pmic_event_callback_t eventNotify; + +/*! + * @brief This structure is used to maintain the current device driver state. + * + * This structure maintains the current state of the connectivity driver. This + * includes both the PMIC hardware state as well as the device handle and + * callback states. + */ + +typedef struct { + PMIC_CONVITY_HANDLE handle; /*!< Device handle. */ + HANDLE_STATE handle_state; /*!< Device handle + state. */ + PMIC_CONVITY_MODE mode; /*!< Device mode. */ + PMIC_CONVITY_CALLBACK callback; /*!< Event callback function pointer. */ + PMIC_CONVITY_EVENTS eventMask; /*!< Event mask. */ + PMIC_CONVITY_USB_SPEED usbSpeed; /*!< USB connection + speed. */ + PMIC_CONVITY_USB_MODE usbMode; /*!< USB connection + mode. */ + PMIC_CONVITY_USB_POWER_IN usbPowerIn; /*!< USB transceiver + power source. */ + PMIC_CONVITY_USB_POWER_OUT usbPowerOut; /*!< USB transceiver + power output + level. */ + PMIC_CONVITY_USB_TRANSCEIVER_MODE usbXcvrMode; /*!< USB transceiver + mode. */ + unsigned int usbDlpDuration; /*!< USB Data Line + Pulsing duration. */ + PMIC_CONVITY_USB_OTG_CONFIG usbOtgCfg; /*!< USB OTG + configuration + options. */ + PMIC_CONVITY_RS232_INTERNAL rs232CfgInternal; /*!< RS-232 internal + connections. */ + PMIC_CONVITY_RS232_EXTERNAL rs232CfgExternal; /*!< RS-232 external + connections. */ +} pmic_convity_state_struct; + +/*! + * @brief This structure is used to maintain the current device driver state. + * + * This structure maintains the current state of the driver in USB mode. This + * includes both the PMIC hardware state as well as the device handle and + * callback states. + */ + +typedef struct { + PMIC_CONVITY_HANDLE handle; /*!< Device handle. */ + HANDLE_STATE handle_state; /*!< Device handle + state. */ + PMIC_CONVITY_MODE mode; /*!< Device mode. */ + PMIC_CONVITY_CALLBACK callback; /*!< Event callback function pointer. */ + PMIC_CONVITY_EVENTS eventMask; /*!< Event mask. */ + PMIC_CONVITY_USB_SPEED usbSpeed; /*!< USB connection + speed. */ + PMIC_CONVITY_USB_MODE usbMode; /*!< USB connection + mode. */ + PMIC_CONVITY_USB_POWER_IN usbPowerIn; /*!< USB transceiver + power source. */ + PMIC_CONVITY_USB_POWER_OUT usbPowerOut; /*!< USB transceiver + power output + level. */ + PMIC_CONVITY_USB_TRANSCEIVER_MODE usbXcvrMode; /*!< USB transceiver + mode. */ + unsigned int usbDlpDuration; /*!< USB Data Line + Pulsing duration. */ + PMIC_CONVITY_USB_OTG_CONFIG usbOtgCfg; /*!< USB OTG + configuration + options. */ +} pmic_convity_usb_state; + +/*! + * @brief This structure is used to maintain the current device driver state. + * + * This structure maintains the current state of the driver in RS_232 mode. This + * includes both the PMIC hardware state as well as the device handle and + * callback states. + */ + +typedef struct { + PMIC_CONVITY_HANDLE handle; /*!< Device handle. */ + HANDLE_STATE handle_state; /*!< Device handle + state. */ + PMIC_CONVITY_MODE mode; /*!< Device mode. */ + PMIC_CONVITY_CALLBACK callback; /*!< Event callback function pointer. */ + PMIC_CONVITY_EVENTS eventMask; /*!< Event mask. */ + PMIC_CONVITY_RS232_INTERNAL rs232CfgInternal; /*!< RS-232 internal + connections. */ + PMIC_CONVITY_RS232_EXTERNAL rs232CfgExternal; /*!< RS-232 external + connections. */ +} pmic_convity_rs232_state; + +/*! + * @brief This structure is used to maintain the current device driver state. + * + * This structure maintains the current state of the driver in cea-936 mode. This + * includes both the PMIC hardware state as well as the device handle and + * callback states. + */ + +typedef struct { + PMIC_CONVITY_HANDLE handle; /*!< Device handle. */ + HANDLE_STATE handle_state; /*!< Device handle + state. */ + PMIC_CONVITY_MODE mode; /*!< Device mode. */ + PMIC_CONVITY_CALLBACK callback; /*!< Event callback function pointer. */ + PMIC_CONVITY_EVENTS eventMask; /*!< Event mask. */ + +} pmic_convity_cea936_state; + +/*! + * @brief Identifies the hardware interrupt source. + * + * This enumeration identifies which of the possible hardware interrupt + * sources actually caused the current interrupt handler to be called. + */ +typedef enum { + CORE_EVENT_4V4 = 1, /*!< Detected USB 4.4 V event. */ + CORE_EVENT_2V0 = 2, /*!< Detected USB 2.0 V event. */ + CORE_EVENT_0V8 = 4, /*!< Detected USB 0.8 V event. */ + CORE_EVENT_ABDET = 8 /*!< Detected USB mini A-B connector event. */ +} PMIC_CORE_EVENT; + +/*! + * @brief This structure defines the reset/power on state for the Connectivity driver. + */ +static const pmic_convity_state_struct reset = { + 0, + HANDLE_FREE, + USB, + NULL, + 0, + USB_FULL_SPEED, + USB_PERIPHERAL, + USB_POWER_INTERNAL, + USB_POWER_3V3, + USB_TRANSCEIVER_OFF, + 0, + USB_PULL_OVERRIDE | USB_VBUS_CURRENT_LIMIT_HIGH, + RS232_TX_USE0VM_RX_UDATVP, + RS232_TX_UDM_RX_UDP +}; + +/*! + * @brief This structure maintains the current state of the Connectivity driver. + * + * The initial values must be identical to the reset state defined by the + * #reset variable. + */ +static pmic_convity_usb_state usb = { + 0, + HANDLE_FREE, + USB, + NULL, + 0, + USB_FULL_SPEED, + USB_PERIPHERAL, + USB_POWER_INTERNAL, + USB_POWER_3V3, + USB_TRANSCEIVER_OFF, + 0, + USB_PULL_OVERRIDE | USB_VBUS_CURRENT_LIMIT_HIGH, +}; + +/*! + * @brief This structure maintains the current state of the Connectivity driver. + * + * The initial values must be identical to the reset state defined by the + * #reset variable. + */ +static pmic_convity_rs232_state rs_232 = { + 0, + HANDLE_FREE, + RS232_1, + NULL, + 0, + RS232_TX_USE0VM_RX_UDATVP, + RS232_TX_UDM_RX_UDP +}; + +/*! + * @brief This structure maintains the current state of the Connectivity driver. + * + * The initial values must be identical to the reset state defined by the + * #reset variable. + */ +static pmic_convity_cea936_state cea_936 = { + 0, + HANDLE_FREE, + CEA936_MONO, + NULL, + 0, +}; + +/*! + * @brief This spinlock is used to provide mutual exclusion. + * + * Create a spinlock that can be used to provide mutually exclusive + * read/write access to the globally accessible "convity" data structure + * that was defined above. Mutually exclusive access is required to + * ensure that the convity data structure is consistent at all times + * when possibly accessed by multiple threads of execution (for example, + * while simultaneously handling a user request and an interrupt event). + * + * We need to use a spinlock sometimes because we need to provide mutual + * exclusion while handling a hardware interrupt. + */ +static spinlock_t lock = SPIN_LOCK_UNLOCKED; + +/*! + * @brief This mutex is used to provide mutual exclusion. + * + * Create a mutex that can be used to provide mutually exclusive + * read/write access to the globally accessible data structures + * that were defined above. Mutually exclusive access is required to + * ensure that the Connectivity data structures are consistent at all + * times when possibly accessed by multiple threads of execution. + * + * Note that we use a mutex instead of the spinlock whenever disabling + * interrupts while in the critical section is not required. This helps + * to minimize kernel interrupt handling latency. + */ +static DECLARE_MUTEX(mutex); + +/* Prototype for the connectivity driver tasklet function. */ +static void pmic_convity_tasklet(struct work_struct *work); + +/*! + * @brief Tasklet handler for the connectivity driver. + * + * Declare a tasklet that will do most of the processing for all of the + * connectivity-related interrupt events (USB4.4VI, USB2.0VI, USB0.8VI, + * and AB_DETI). Note that we cannot do all of the required processing + * within the interrupt handler itself because we may need to call the + * ADC driver to measure voltages as well as calling any user-registered + * callback functions. + */ +DECLARE_WORK(convityTasklet, pmic_convity_tasklet); + +/*! + * @brief Global variable to track currently active interrupt events. + * + * This global variable is used to keep track of all of the currently + * active interrupt events for the connectivity driver. Note that access + * to this variable may occur while within an interrupt context and, + * therefore, must be guarded by using a spinlock. + */ +static PMIC_CORE_EVENT eventID = 0; + +/* Prototypes for all static connectivity driver functions. */ +static PMIC_STATUS pmic_convity_set_mode_internal(const PMIC_CONVITY_MODE mode); +static PMIC_STATUS pmic_convity_deregister_all(void); +static void pmic_convity_event_handler(void *param); + +/************************************************************************** + * General setup and configuration functions. + ************************************************************************** + */ + +/*! + * @name General Setup and Configuration Connectivity APIs + * Functions for setting up and configuring the connectivity hardware. + */ +/*@{*/ + +/*! + * Attempt to open and gain exclusive access to the PMIC connectivity + * hardware. An initial operating mode must also be specified. + * + * If the open request is successful, then a numeric handle is returned + * and this handle must be used in all subsequent function calls. The + * same handle must also be used in the pmic_convity_close() call when use + * of the PMIC connectivity hardware is no longer required. + * + * @param handle device handle from open() call + * @param mode initial connectivity operating mode + * + * @return PMIC_SUCCESS if the open request was successful + */ +PMIC_STATUS pmic_convity_open(PMIC_CONVITY_HANDLE * const handle, + const PMIC_CONVITY_MODE mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + + if (handle == (PMIC_CONVITY_HANDLE *) NULL) { + /* Do not dereference a NULL pointer. */ + return PMIC_ERROR; + } + + /* We only need to acquire a mutex here because the interrupt handler + * never modifies the device handle or device handle state. Therefore, + * we don't need to worry about conflicts with the interrupt handler + * or the need to execute in an interrupt context. + * + * But we do need a critical section here to avoid problems in case + * multiple calls to pmic_convity_open() are made since we can only + * allow one of them to succeed. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* Check the current device handle state and acquire the handle if + * it is available. + */ + if ((usb.handle_state != HANDLE_FREE) + && (rs_232.handle_state != HANDLE_FREE) + && (cea_936.handle_state != HANDLE_FREE)) { + + /* Cannot open the PMIC connectivity hardware at this time or an invalid + * mode was requested. + */ + *handle = reset.handle; + } else { + + if (mode == USB) { + usb.handle = (PMIC_CONVITY_HANDLE) (&usb); + usb.handle_state = HANDLE_IN_USE; + } else if ((mode == RS232_1) || (mode == RS232_2)) { + rs_232.handle = (PMIC_CONVITY_HANDLE) (&rs_232); + rs_232.handle_state = HANDLE_IN_USE; + } else if ((mode == CEA936_STEREO) || (mode == CEA936_MONO) + || (mode == CEA936_TEST_LEFT) + || (mode == CEA936_TEST_RIGHT)) { + cea_936.handle = (PMIC_CONVITY_HANDLE) (&cea_936); + cea_936.handle_state = HANDLE_IN_USE; + + } + /* Let's begin by acquiring the connectivity device handle. */ + /* Then we can try to set the desired operating mode. */ + rc = pmic_convity_set_mode_internal(mode); + + if (rc == PMIC_SUCCESS) { + /* Successfully set the desired operating mode, now return the + * handle to the caller. + */ + if (mode == USB) { + *handle = usb.handle; + } else if ((mode == RS232_1) || (mode == RS232_2)) { + *handle = rs_232.handle; + } else if ((mode == CEA936_STEREO) + || (mode == CEA936_MONO) + || (mode == CEA936_TEST_LEFT) + || (mode == CEA936_TEST_RIGHT)) { + *handle = cea_936.handle; + } + } else { + /* Failed to set the desired mode, return the handle to an unused + * state. + */ + if (mode == USB) { + usb.handle = reset.handle; + usb.handle_state = reset.handle_state; + } else if ((mode == RS232_1) || (mode == RS232_2)) { + rs_232.handle = reset.handle; + rs_232.handle_state = reset.handle_state; + } else if ((mode == CEA936_STEREO) + || (mode == CEA936_MONO) + || (mode == CEA936_TEST_LEFT) + || (mode == CEA936_TEST_RIGHT)) { + cea_936.handle = reset.handle; + cea_936.handle_state = reset.handle_state; + } + + *handle = reset.handle; + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Terminate further access to the PMIC connectivity hardware. Also allows + * another process to call pmic_convity_open() to gain access. + * + * @param handle device handle from open() call + * + * @return PMIC_SUCCESS if the close request was successful + */ +PMIC_STATUS pmic_convity_close(const PMIC_CONVITY_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Begin a critical section here to avoid the possibility of race + * conditions if multiple threads happen to call this function and + * pmic_convity_open() at the same time. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* Confirm that the device handle matches the one assigned in the + * pmic_convity_open() call and then close the connection. + */ + if (((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232.handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) { + rc = PMIC_SUCCESS; + + /* Deregister for all existing callbacks if necessary and make sure + * that the event handling settings are consistent following the + * close operation. + */ + if ((usb.callback != reset.callback) + || (rs_232.callback != reset.callback) + || (cea_936.callback != reset.callback)) { + /* Deregister the existing callback function and all registered + * events before we completely close the handle. + */ + rc = pmic_convity_deregister_all(); + if (rc == PMIC_SUCCESS) { + + } else if (usb.eventMask != reset.eventMask) { + /* Having a non-zero eventMask without a callback function being + * defined should never occur but let's just make sure here that + * we keep things consistent. + */ + usb.eventMask = reset.eventMask; + /* Mark the connectivity device handle as being closed. */ + usb.handle = reset.handle; + usb.handle_state = reset.handle_state; + + } else if (rs_232.eventMask != reset.eventMask) { + + rs_232.eventMask = reset.eventMask; + /* Mark the connectivity device handle as being closed. */ + rs_232.handle = reset.handle; + rs_232.handle_state = reset.handle_state; + + } else if (cea_936.eventMask != reset.eventMask) { + cea_936.eventMask = reset.eventMask; + /* Mark the connectivity device handle as being closed. */ + cea_936.handle = reset.handle; + cea_936.handle_state = reset.handle_state; + + } + + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Change the current operating mode of the PMIC connectivity hardware. + * The available connectivity operating modes is hardware dependent and + * consists of one or more of the following: USB (including USB On-the-Go), + * RS-232, and CEA-936. Requesting an operating mode that is not supported + * by the PMIC hardware will return PMIC_NOT_SUPPORTED. + * + * @param handle device handle from + open() call + * @param mode desired operating mode + * + * @return PMIC_SUCCESS if the requested mode was successfully set + */ +PMIC_STATUS pmic_convity_set_mode(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_MODE mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232.handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) { + rc = pmic_convity_set_mode_internal(mode); + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the current operating mode for the PMIC connectivity hardware. + * + * @param handle device handle from open() call + * @param mode the current PMIC connectivity operating mode + * + * @return PMIC_SUCCESS if the requested mode was successfully set + */ +PMIC_STATUS pmic_convity_get_mode(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_MODE * const mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232. + handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) + && (mode != (PMIC_CONVITY_MODE *) NULL)) { + + *mode = usb.mode; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Restore all registers to the initial power-on/reset state. + * + * @param handle device handle from open() call + * + * @return PMIC_SUCCESS if the reset was successful + */ +PMIC_STATUS pmic_convity_reset(const PMIC_CONVITY_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + if (((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232.handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) { + + /* Reset the PMIC Connectivity register to it's power on state. */ + rc = pmic_write_reg(REG_USB, RESET_USBCNTRL_REG_0, + REG_FULLMASK); + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + RESET_USBCNTRL_REG_1, REG_FULLMASK); + + if (rc == PMIC_SUCCESS) { + /* Also reset the device driver state data structure. */ + + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Register a callback function that will be used to signal PMIC connectivity + * events. For example, the USB subsystem should register a callback function + * in order to be notified of device connect/disconnect events. Note, however, + * that non-USB events may also be signalled depending upon the PMIC hardware + * capabilities. Therefore, the callback function must be able to properly + * handle all of the possible events if support for non-USB peripherals is + * also to be included. + * + * @param handle device handle from open() call + * @param func a pointer to the callback function + * @param eventMask a mask selecting events to be notified + * + * @return PMIC_SUCCESS if the callback was successful registered + */ +PMIC_STATUS pmic_convity_set_callback(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_CALLBACK func, + const PMIC_CONVITY_EVENTS eventMask) +{ + unsigned long flags; + PMIC_STATUS rc = PMIC_ERROR; + + /* We need to start a critical section here to ensure a consistent state + * in case simultaneous calls to pmic_convity_set_callback() are made. In + * that case, we must serialize the calls to ensure that the "callback" + * and "eventMask" state variables are always consistent. + * + * Note that we don't actually need to acquire the spinlock until later + * when we are finally ready to update the "callback" and "eventMask" + * state variables which are shared with the interrupt handler. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + + /* Return an error if either the callback function or event mask + * is not properly defined. + * + * It is also considered an error if a callback function has already + * been defined. If you wish to register for a new set of events, + * then you must first call pmic_convity_clear_callback() to + * deregister the existing callback function and list of events + * before trying to register a new callback function. + */ + if ((func == NULL) || (eventMask == 0) + || (usb.callback != NULL)) { + rc = PMIC_ERROR; + + /* Register for PMIC events from the core protocol driver. */ + } else { + + if ((eventMask & USB_DETECT_4V4_RISE) || + (eventMask & USB_DETECT_4V4_FALL)) { + /* We need to register for the 4.4V interrupt. */ + //EVENT_USBI or EVENT_USB_44VI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_4V4); + rc = pmic_event_subscribe(EVENT_USBI, + eventNotify); + + if (rc != PMIC_SUCCESS) { + return rc; + } + } + + if ((eventMask & USB_DETECT_2V0_RISE) || + (eventMask & USB_DETECT_2V0_FALL)) { + /* We need to register for the 2.0V interrupt. */ + //EVENT_USB_20VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_2V0); + rc = pmic_event_subscribe(EVENT_USBI, + eventNotify); + + if (rc != PMIC_SUCCESS) { + goto Cleanup_4V4; + } + } + + if ((eventMask & USB_DETECT_0V8_RISE) || + (eventMask & USB_DETECT_0V8_FALL)) { + /* We need to register for the 0.8V interrupt. */ + //EVENT_USB_08VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_0V8); + rc = pmic_event_subscribe(EVENT_USBI, + eventNotify); + + if (rc != PMIC_SUCCESS) { + goto Cleanup_2V0; + } + } + + if ((eventMask & USB_DETECT_MINI_A) || + (eventMask & USB_DETECT_MINI_B) + || (eventMask & USB_DETECT_NON_USB_ACCESSORY) + || (eventMask & USB_DETECT_FACTORY_MODE)) { + /* We need to register for the AB_DET interrupt. */ + //EVENT_AB_DETI or EVENT_IDI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_ABDET); + rc = pmic_event_subscribe(EVENT_IDI, + eventNotify); + + if (rc != PMIC_SUCCESS) { + goto Cleanup_0V8; + } + } + + /* Use a critical section to maintain a consistent state. */ + spin_lock_irqsave(&lock, flags); + + /* Successfully registered for all events. */ + usb.callback = func; + usb.eventMask = eventMask; + spin_unlock_irqrestore(&lock, flags); + + goto End; + + /* This section unregisters any already registered events if we should + * encounter an error partway through the registration process. Note + * that we don't check the return status here since it is already set + * to PMIC_ERROR before we get here. + */ + Cleanup_0V8: + + if ((eventMask & USB_DETECT_0V8_RISE) || + (eventMask & USB_DETECT_0V8_FALL)) { + //EVENT_USB_08VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_0V8); + pmic_event_unsubscribe(EVENT_USBI, eventNotify); + goto End; + } + + Cleanup_2V0: + + if ((eventMask & USB_DETECT_2V0_RISE) || + (eventMask & USB_DETECT_2V0_FALL)) { + //EVENT_USB_20VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_2V0); + pmic_event_unsubscribe(EVENT_USBI, eventNotify); + goto End; + } + + Cleanup_4V4: + + if ((eventMask & USB_DETECT_4V4_RISE) || + (eventMask & USB_DETECT_4V4_FALL)) { + //EVENT_USB_44VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_4V4); + pmic_event_unsubscribe(EVENT_USBI, eventNotify); + } + } + /* Exit the critical section. */ + + } + End:up(&mutex); + return rc; + +} + +/*! + * Clears the current callback function. If this function returns successfully + * then all future Connectivity events will only be handled by the default + * handler within the Connectivity driver. + * + * @param handle device handle from open() call + * + * @return PMIC_SUCCESS if the callback was successful cleared + */ +PMIC_STATUS pmic_convity_clear_callback(const PMIC_CONVITY_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + if (((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232.handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) { + + rc = pmic_convity_deregister_all(); + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the current callback function and event mask. + * + * @param handle device handle from open() call + * @param func the current callback function + * @param eventMask the current event selection mask + * + * @return PMIC_SUCCESS if the callback information was successful + * retrieved + */ +PMIC_STATUS pmic_convity_get_callback(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_CALLBACK * const func, + PMIC_CONVITY_EVENTS * const eventMask) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + if ((((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) || ((handle == rs_232.handle) + && (rs_232. + handle_state == + HANDLE_IN_USE)) + || ((handle == cea_936.handle) + && (cea_936.handle_state == HANDLE_IN_USE))) + && (func != (PMIC_CONVITY_CALLBACK *) NULL) + && (eventMask != (PMIC_CONVITY_EVENTS *) NULL)) { + *func = usb.callback; + *eventMask = usb.eventMask; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + + up(&mutex); + + return rc; +} + +/*@*/ + +/************************************************************************** + * USB-specific configuration and setup functions. + ************************************************************************** + */ + +/*! + * @name USB and USB-OTG Connectivity APIs + * Functions for controlling USB and USB-OTG connectivity. + */ +/*@{*/ + +/*! + * Set the USB transceiver speed. + * + * @param handle device handle from open() call + * @param speed the desired USB transceiver speed + * + * @return PMIC_SUCCESS if the transceiver speed was successfully set + */ +PMIC_STATUS pmic_convity_usb_set_speed(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_SPEED speed) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = SET_BITS(regUSB0, FSENB, 1); + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (handle == (rs_232.handle || cea_936.handle)) { + return PMIC_PARAMETER_ERROR; + } else { + if ((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE)) { + /* Validate the function parameters and if they are valid, then + * configure the pull-up and pull-down resistors as required for + * the desired operating mode. + */ + if ((speed == USB_HIGH_SPEED)) { + /* + * The USB transceiver also does not support the high speed mode + * (which is also optional under the USB OTG specification). + */ + rc = PMIC_NOT_SUPPORTED; + } else if ((speed != USB_LOW_SPEED) + && (speed != USB_FULL_SPEED)) { + /* Final validity check on the speed parameter. */ + rc = PMIC_ERROR;; + } else { + /* First configure the D+ and D- pull-up/pull-down resistors as + * per the USB OTG specification. + */ + if (speed == USB_FULL_SPEED) { + /* Activate pull-up on D+ and pull-down on D-. */ + reg_value = + SET_BITS(regUSB0, UDM_PD, 1); + } else if (speed == USB_LOW_SPEED) { + /* Activate pull-up on D+ and pull-down on D-. */ + reg_value = SET_BITS(regUSB0, FSENB, 1); + } + + /* Now set the desired USB transceiver speed. Note that + * USB_FULL_SPEED simply requires FSENB=0 (which it + * already is). + */ + + rc = pmic_write_reg(REG_USB, reg_value, + reg_mask); + + if (rc == PMIC_SUCCESS) { + usb.usbSpeed = speed; + } + } + } + } + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the USB transceiver speed. + * + * @param handle device handle from open() call + * @param speed the current USB transceiver speed + * @param mode the current USB transceiver mode + * + * @return PMIC_SUCCESS if the transceiver speed was successfully + * obtained + */ +PMIC_STATUS pmic_convity_usb_get_speed(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_SPEED * const speed, + PMIC_CONVITY_USB_MODE * const mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE) && + (speed != (PMIC_CONVITY_USB_SPEED *) NULL) && + (mode != (PMIC_CONVITY_USB_MODE *) NULL)) { + *speed = usb.usbSpeed; + *mode = usb.usbMode; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * This function enables/disables VUSB and VBUS output. + * This API configures the VUSBEN and VBUSEN bits of USB register + * + * @param handle device handle from open() call + * @param out_type true, for VBUS + * false, for VUSB + * @param out if true, output is enabled + * if false, output is disabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_convity_set_output(const PMIC_CONVITY_HANDLE handle, + bool out_type, bool out) +{ + + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + + unsigned int reg_mask = 0; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + + if ((out_type == 0) && (out == 1)) { + + reg_value = SET_BITS(regUSB1, VUSBEN, 1); + reg_mask = SET_BITS(regUSB1, VUSBEN, 1); + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value, reg_mask); + } else if (out_type == 0 && out == 0) { + reg_mask = SET_BITS(regUSB1, VBUSEN, 1); + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value, reg_mask); + } else if (out_type == 1 && out == 1) { + + reg_value = SET_BITS(regUSB1, VBUSEN, 1); + reg_mask = SET_BITS(regUSB1, VBUSEN, 1); + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value, reg_mask); + } + + else if (out_type == 1 && out == 0) { + + reg_mask = SET_BITS(regUSB1, VBUSEN, 1); + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value, reg_mask); + } + + /*else { + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value, reg_mask); + } */ + } + + up(&mutex); + + return rc; +} + +/*! + * Set the USB transceiver's power supply configuration. + * + * @param handle device handle from open() call + * @param pwrin USB transceiver regulator input power source + * @param pwrout USB transceiver regulator output power level + * + * @return PMIC_SUCCESS if the USB transceiver's power supply + * configuration was successfully set + */ +PMIC_STATUS pmic_convity_usb_set_power_source(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_POWER_IN + pwrin, + const PMIC_CONVITY_USB_POWER_OUT + pwrout) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + /* SET_BITS(regUSB1, VUSBEN, 1) | SET_BITS(regUSB1, VBUSEN, + 1) | SET_BITS(regUSB1, + VUSBIN, + 2) | */ + // SET_BITS(regUSB1, VUSB, 1); +/* SET_BITS(regUSB1, VUSBIN, 1) | SET_BITS(regUSB1, VUSBEN, + 1) | SET_BITS(regUSB1, + VBUSEN, 1);*/ + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + + if (pwrin == USB_POWER_INTERNAL_BOOST) { + reg_value |= SET_BITS(regUSB1, VUSBIN, 0); + reg_mask = SET_BITS(regUSB1, VUSBIN, 1); + } else if (pwrin == USB_POWER_VBUS) { + reg_value |= SET_BITS(regUSB1, VUSBIN, 1); + reg_mask = SET_BITS(regUSB1, VUSBIN, 1); + } + + else if (pwrin == USB_POWER_INTERNAL) { + reg_value |= SET_BITS(regUSB1, VUSBIN, 2); + reg_mask = SET_BITS(regUSB1, VUSBIN, 1); + } + + if (pwrout == USB_POWER_3V3) { + reg_value |= SET_BITS(regUSB1, VUSB, 1); + reg_mask |= SET_BITS(regUSB1, VUSB, 1); + } + + else if (pwrout == USB_POWER_2V775) { + reg_value |= SET_BITS(regUSB1, VUSB, 0); + reg_mask |= SET_BITS(regUSB1, VUSB, 1); + } + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, reg_value, reg_mask); + + if (rc == PMIC_SUCCESS) { + usb.usbPowerIn = pwrin; + usb.usbPowerOut = pwrout; + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the USB transceiver's current power supply configuration. + * + * @param handle device handle from open() call + * @param pwrin USB transceiver regulator input power source + * @param pwrout USB transceiver regulator output power level + * + * @return PMIC_SUCCESS if the USB transceiver's power supply + * configuration was successfully retrieved + */ +PMIC_STATUS pmic_convity_usb_get_power_source(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_POWER_IN * + const pwrin, + PMIC_CONVITY_USB_POWER_OUT * + const pwrout) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE) && + (pwrin != (PMIC_CONVITY_USB_POWER_IN *) NULL) && + (pwrout != (PMIC_CONVITY_USB_POWER_OUT *) NULL)) { + *pwrin = usb.usbPowerIn; + *pwrout = usb.usbPowerOut; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Set the USB transceiver's operating mode. + * + * @param handle device handle from open() call + * @param mode desired operating mode + * + * @return PMIC_SUCCESS if the USB transceiver's operating mode + * was successfully configured + */ +PMIC_STATUS pmic_convity_usb_set_xcvr(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_TRANSCEIVER_MODE + mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + + if (mode == USB_TRANSCEIVER_OFF) { + reg_value = SET_BITS(regUSB0, USBXCVREN, 0); + reg_mask |= SET_BITS(regUSB0, USB_SUSPEND, 1); + + rc = pmic_write_reg(REG_USB, reg_value, reg_mask); + + } + + if (mode == USB_SINGLE_ENDED_UNIDIR) { + reg_value |= + SET_BITS(regUSB0, DATSE0, 1) | SET_BITS(regUSB0, + BIDIR, 0); + reg_mask |= + SET_BITS(regUSB0, USB_SUSPEND, + 1) | SET_BITS(regUSB0, DATSE0, + 1) | SET_BITS(regUSB0, BIDIR, + 1); + } else if (mode == USB_SINGLE_ENDED_BIDIR) { + reg_value |= + SET_BITS(regUSB0, DATSE0, 1) | SET_BITS(regUSB0, + BIDIR, 1); + reg_mask |= + SET_BITS(regUSB0, USB_SUSPEND, + 1) | SET_BITS(regUSB0, DATSE0, + 1) | SET_BITS(regUSB0, BIDIR, + 1); + } else if (mode == USB_DIFFERENTIAL_UNIDIR) { + reg_value |= + SET_BITS(regUSB0, DATSE0, 0) | SET_BITS(regUSB0, + BIDIR, 0); + reg_mask |= + SET_BITS(regUSB0, USB_SUSPEND, + 1) | SET_BITS(regUSB0, DATSE0, + 1) | SET_BITS(regUSB0, BIDIR, + 1); + } else if (mode == USB_DIFFERENTIAL_BIDIR) { + reg_value |= + SET_BITS(regUSB0, DATSE0, 0) | SET_BITS(regUSB0, + BIDIR, 1); + reg_mask |= + SET_BITS(regUSB0, USB_SUSPEND, + 1) | SET_BITS(regUSB0, DATSE0, + 1) | SET_BITS(regUSB0, BIDIR, + 1); + } + + if (mode == USB_SUSPEND_ON) { + reg_value |= SET_BITS(regUSB0, USB_SUSPEND, 1); + reg_mask |= SET_BITS(regUSB0, USB_SUSPEND, 1); + } else if (mode == USB_SUSPEND_OFF) { + reg_value |= SET_BITS(regUSB0, USB_SUSPEND, 0); + reg_mask |= SET_BITS(regUSB0, USB_SUSPEND, 1); + } + + if (mode == USB_OTG_SRP_DLP_START) { + reg_value |= SET_BITS(regUSB0, USB_PU, 0); + reg_mask |= SET_BITS(regUSB0, USB_SUSPEND, 1); + } else if (mode == USB_OTG_SRP_DLP_STOP) { + reg_value &= SET_BITS(regUSB0, USB_PU, 1); + reg_mask |= SET_BITS(regUSB0, USB_PU, 1); + } + + rc = pmic_write_reg(REG_USB, reg_value, reg_mask); + + if (rc == PMIC_SUCCESS) { + usb.usbXcvrMode = mode; + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the USB transceiver's current operating mode. + * + * @param handle device handle from open() call + * @param mode current operating mode + * + * @return PMIC_SUCCESS if the USB transceiver's operating mode + * was successfully retrieved + */ +PMIC_STATUS pmic_convity_usb_get_xcvr(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_TRANSCEIVER_MODE * + const mode) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE) && + (mode != (PMIC_CONVITY_USB_TRANSCEIVER_MODE *) NULL)) { + *mode = usb.usbXcvrMode; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Set the Data Line Pulse duration (in milliseconds) for the USB OTG + * Session Request Protocol. + * + * For mc13783, this feature is not supported.So return PMIC_NOT_SUPPORTED + * + * @param handle device handle from open() call + * @param duration the data line pulse duration (ms) + * + * @return PMIC_SUCCESS if the pulse duration was successfully set + */ +PMIC_STATUS pmic_convity_usb_otg_set_dlp_duration(const PMIC_CONVITY_HANDLE + handle, + const unsigned int duration) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + + /* The setting of the dlp duration is not supported by the mc13783 PMIC hardware. */ + + /* No critical section is required. */ + + if ((handle != usb.handle) + || (usb.handle_state != HANDLE_IN_USE)) { + /* Must return error indication for invalid handle parameter to be + * consistent with other APIs. + */ + rc = PMIC_ERROR; + } + + return rc; +} + +/*! + * Get the current Data Line Pulse duration (in milliseconds) for the USB + * OTG Session Request Protocol. + * + * @param handle device handle from open() call + * @param duration the data line pulse duration (ms) + * + * @return PMIC_SUCCESS if the pulse duration was successfully obtained + */ +PMIC_STATUS pmic_convity_usb_otg_get_dlp_duration(const PMIC_CONVITY_HANDLE + handle, + unsigned int *const duration) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + + /* The setting of dlp duration is not supported by the mc13783 PMIC hardware. */ + + /* No critical section is required. */ + + if ((handle != usb.handle) + || (usb.handle_state != HANDLE_IN_USE)) { + /* Must return error indication for invalid handle parameter to be + * consistent with other APIs. + */ + rc = PMIC_ERROR; + } + + return rc; +} + +/*! + * Set the USB On-The-Go (OTG) configuration. + * + * @param handle device handle from open() call + * @param cfg desired USB OTG configuration + * + * @return PMIC_SUCCESS if the OTG configuration was successfully set + */ +PMIC_STATUS pmic_convity_usb_otg_set_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_OTG_CONFIG + cfg) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + if (cfg & USB_OTG_SE0CONN) { + reg_value = SET_BITS(regUSB0, SE0_CONN, 1); + reg_mask = SET_BITS(regUSB0, SE0_CONN, 1); + } + if (cfg & USBXCVREN) { + reg_value |= SET_BITS(regUSB0, USBXCVREN, 1); + reg_mask |= SET_BITS(regUSB0, USBXCVREN, 1); + } + + if (cfg & USB_OTG_DLP_SRP) { + reg_value |= SET_BITS(regUSB0, DLP_SRP, 1); + reg_mask |= SET_BITS(regUSB0, DLP_SRP, 1); + } + + if (cfg & USB_PULL_OVERRIDE) { + reg_value |= SET_BITS(regUSB0, PULLOVR, 1); + reg_mask |= SET_BITS(regUSB0, PULLOVR, 1); + } + + if (cfg & USB_PU) { + reg_value |= SET_BITS(regUSB0, USB_PU, 1); + reg_mask |= SET_BITS(regUSB0, USB_PU, 1); + } + + if (cfg & USB_UDM_PD) { + reg_value |= SET_BITS(regUSB0, UDM_PD, 1); + reg_mask |= SET_BITS(regUSB0, UDM_PD, 1); + } + + if (cfg & USB_UDP_PD) { + reg_value |= SET_BITS(regUSB0, UDP_PD, 1); + reg_mask |= SET_BITS(regUSB0, UDP_PD, 1); + } + + if (cfg & USB_DP150K_PU) { + reg_value |= SET_BITS(regUSB0, DP150K_PU, 1); + reg_mask |= SET_BITS(regUSB0, DP150K_PU, 1); + } + + if (cfg & USB_USBCNTRL) { + reg_value |= SET_BITS(regUSB0, USBCNTRL, 1); + reg_mask |= SET_BITS(regUSB0, USBCNTRL, 1); + } + + if (cfg & USB_VBUS_CURRENT_LIMIT_HIGH) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 0); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_10MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 1); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_20MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 2); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_30MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 3); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_40MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 4); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_50MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 5); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_60MS) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 6); + } + if (cfg & USB_VBUS_CURRENT_LIMIT_LOW) { + reg_value |= SET_BITS(regUSB0, CURRENT_LIMIT, 7); + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 7); + } + + if (cfg & USB_VBUS_PULLDOWN) { + reg_value |= SET_BITS(regUSB0, VBUSPDENB, 1); + reg_mask |= SET_BITS(regUSB0, VBUSPDENB, 1); + } + + rc = pmic_write_reg(REG_USB, reg_value, reg_mask); + + if (rc == PMIC_SUCCESS) { + if ((cfg & USB_VBUS_CURRENT_LIMIT_HIGH) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_10MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_20MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_30MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_40MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_50MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_60MS)) { + /* Make sure that the VBUS current limit state is + * correctly set to either USB_VBUS_CURRENT_LIMIT_HIGH + * or USB_VBUS_CURRENT_LIMIT_LOW but never both at the + * same time. + * + * We guarantee this by first clearing both of the + * status bits and then resetting the correct one. + */ + usb.usbOtgCfg &= + ~(USB_VBUS_CURRENT_LIMIT_HIGH | + USB_VBUS_CURRENT_LIMIT_LOW | + USB_VBUS_CURRENT_LIMIT_LOW_10MS | + USB_VBUS_CURRENT_LIMIT_LOW_20MS | + USB_VBUS_CURRENT_LIMIT_LOW_30MS | + USB_VBUS_CURRENT_LIMIT_LOW_40MS | + USB_VBUS_CURRENT_LIMIT_LOW_50MS | + USB_VBUS_CURRENT_LIMIT_LOW_60MS); + } + + usb.usbOtgCfg |= cfg; + } + } + //} + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Clears the USB On-The-Go (OTG) configuration. Multiple configuration settings + * may be OR'd together in a single call. However, selecting conflicting + * settings (e.g., multiple VBUS current limits) will result in undefined + * behavior. + * + * @param handle Device handle from open() call. + * @param cfg USB OTG configuration settings to be cleared. + * + * @retval PMIC_SUCCESS If the OTG configuration was successfully + * cleared. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired USB OTG configuration is + * not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_usb_otg_clear_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_OTG_CONFIG + cfg) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && (usb.handle_state == HANDLE_IN_USE)) { + /* if ((cfg & USB_VBUS_CURRENT_LIMIT_LOW_10MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_20MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_30MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_40MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_50MS) || + (cfg & USB_VBUS_CURRENT_LIMIT_LOW_60MS)) + { + rc = PMIC_NOT_SUPPORTED; + } */ + //else + + if (cfg & USB_OTG_SE0CONN) { + reg_mask = SET_BITS(regUSB0, SE0_CONN, 1); + } + + if (cfg & USB_OTG_DLP_SRP) { + reg_mask |= SET_BITS(regUSB0, DLP_SRP, 1); + } + + if (cfg & USB_DP150K_PU) { + reg_mask |= SET_BITS(regUSB0, DP150K_PU, 1); + } + + if (cfg & USB_PULL_OVERRIDE) { + reg_mask |= SET_BITS(regUSB0, PULLOVR, 1); + } + + if (cfg & USB_PU) { + + reg_mask |= SET_BITS(regUSB0, USB_PU, 1); + } + + if (cfg & USB_UDM_PD) { + + reg_mask |= SET_BITS(regUSB0, UDM_PD, 1); + } + + if (cfg & USB_UDP_PD) { + + reg_mask |= SET_BITS(regUSB0, UDP_PD, 1); + } + + if (cfg & USB_USBCNTRL) { + reg_mask |= SET_BITS(regUSB0, USBCNTRL, 1); + } + + if (cfg & USB_VBUS_CURRENT_LIMIT_HIGH) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 0); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_10MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 1); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_20MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 2); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_30MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 3); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_40MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 4); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_50MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 5); + } else if (cfg & USB_VBUS_CURRENT_LIMIT_LOW_60MS) { + reg_mask |= SET_BITS(regUSB0, CURRENT_LIMIT, 6); + } + + if (cfg & USB_VBUS_PULLDOWN) { + // reg_value |= SET_BITS(regUSB0, VBUSPDENB, 1); + reg_mask |= SET_BITS(regUSB0, VBUSPDENB, 1); + } + + rc = pmic_write_reg(REG_USB, reg_value, reg_mask); + + if (rc == PMIC_SUCCESS) { + usb.usbOtgCfg &= ~cfg; + } + } + //} + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the current USB On-The-Go (OTG) configuration. + * + * @param handle device handle from open() call + * @param cfg the current USB OTG configuration + * + * @return PMIC_SUCCESS if the OTG configuration was successfully + * retrieved + */ +PMIC_STATUS pmic_convity_usb_otg_get_config(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_OTG_CONFIG * + const cfg) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == usb.handle) && + (usb.handle_state == HANDLE_IN_USE) && + (cfg != (PMIC_CONVITY_USB_OTG_CONFIG *) NULL)) { + *cfg = usb.usbOtgCfg; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*@}*/ + +/************************************************************************** + * RS-232-specific configuration and setup functions. + ************************************************************************** + */ + +/*! + * @name RS-232 Serial Connectivity APIs + * Functions for controlling RS-232 serial connectivity. + */ +/*@{*/ + +/*! + * Set the connectivity interface to the selected RS-232 operating + * configuration. Note that the RS-232 operating mode will be automatically + * overridden if the USB_EN is asserted at any time (e.g., when a USB device + * is attached). However, we will also automatically return to the RS-232 + * mode once the USB device is detached. + * + * @param handle device handle from open() call + * @param cfgInternal RS-232 transceiver internal connections + * @param cfgExternal RS-232 transceiver external connections + * + * @return PMIC_SUCCESS if the requested mode was set + */ +PMIC_STATUS pmic_convity_rs232_set_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_RS232_INTERNAL + cfgInternal, + const PMIC_CONVITY_RS232_EXTERNAL + cfgExternal) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value0 = 0, reg_value1 = 0; + unsigned int reg_mask = SET_BITS(regUSB1, RSPOL, 1); + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == rs_232.handle) && (rs_232.handle_state == HANDLE_IN_USE)) { + rc = PMIC_SUCCESS; + + /* Validate the calling parameters. */ + /*if ((cfgInternal != RS232_TX_USE0VM_RX_UDATVP) && + (cfgInternal != RS232_TX_RX_INTERNAL_DEFAULT) && (cfgInternal != RS232_TX_UDATVP_RX_URXVM)) + { + + rc = PMIC_NOT_SUPPORTED; + } */ + if (cfgInternal == RS232_TX_USE0VM_RX_UDATVP) { + + reg_value0 = SET_BITS(regUSB0, INTERFACE_MODE, 1); + + } else if (cfgInternal == RS232_TX_RX_INTERNAL_DEFAULT) { + + reg_value0 = SET_BITS(regUSB0, INTERFACE_MODE, 1); + reg_mask |= SET_BITS(regUSB1, RSPOL, 1); + + } else if (cfgInternal == RS232_TX_UDATVP_RX_URXVM) { + + reg_value0 = SET_BITS(regUSB0, INTERFACE_MODE, 2); + reg_value1 |= SET_BITS(regUSB1, RSPOL, 1); + + } else if ((cfgExternal == RS232_TX_UDM_RX_UDP) || + (cfgExternal == RS232_TX_RX_EXTERNAL_DEFAULT)) { + /* Configure for TX on D+ and RX on D-. */ + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 1); + reg_value1 |= SET_BITS(regUSB1, RSPOL, 0); + } else if (cfgExternal != RS232_TX_UDM_RX_UDP) { + /* Any other RS-232 configuration is an error. */ + rc = PMIC_ERROR; + } + + if (rc == PMIC_SUCCESS) { + /* Configure for TX on D- and RX on D+. */ + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask); + + rc = pmic_write_reg(REG_CHARGE_USB_SPARE, + reg_value1, reg_mask); + + if (rc == PMIC_SUCCESS) { + rs_232.rs232CfgInternal = cfgInternal; + rs_232.rs232CfgExternal = cfgExternal; + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * Get the connectivity interface's current RS-232 operating configuration. + * + * @param handle device handle from open() call + * @param cfgInternal RS-232 transceiver internal connections + * @param cfgExternal RS-232 transceiver external connections + * + * @return PMIC_SUCCESS if the requested mode was retrieved + */ +PMIC_STATUS pmic_convity_rs232_get_config(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_RS232_INTERNAL * + const cfgInternal, + PMIC_CONVITY_RS232_EXTERNAL * + const cfgExternal) +{ + PMIC_STATUS rc = PMIC_ERROR; + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == rs_232.handle) && + (rs_232.handle_state == HANDLE_IN_USE) && + (cfgInternal != (PMIC_CONVITY_RS232_INTERNAL *) NULL) && + (cfgExternal != (PMIC_CONVITY_RS232_EXTERNAL *) NULL)) { + *cfgInternal = rs_232.rs232CfgInternal; + *cfgExternal = rs_232.rs232CfgExternal; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*@}*/ + +/************************************************************************** + * CEA-936-specific configuration and setup functions. + ************************************************************************** + */ + +/*! + * @name CEA-936 Connectivity APIs + * Functions for controlling CEA-936 connectivity. + */ +/*@{*/ + +/*! + * Signal the attached device to exit the current CEA-936 operating mode. + * Returns an error if the current operating mode is not CEA-936. + * + * @param handle device handle from open() call + * @param signal type of exit signal to be sent + * + * @return PMIC_SUCCESS if exit signal was sent + */ +PMIC_STATUS pmic_convity_cea936_exit_signal(const PMIC_CONVITY_HANDLE handle, + const + PMIC_CONVITY_CEA936_EXIT_SIGNAL + signal) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = + SET_BITS(regUSB0, IDPD, 1) | SET_BITS(regUSB0, IDPULSE, 1); + + /* Use a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle != cea_936.handle) + || (cea_936.handle_state != HANDLE_IN_USE)) { + /* Must return error indication for invalid handle parameter to be + * consistent with other APIs. + */ + rc = PMIC_ERROR; + } else if (signal == CEA936_UID_PULLDOWN_6MS) { + reg_value = + SET_BITS(regUSB0, IDPULSE, 0) | SET_BITS(regUSB0, IDPD, 0); + } else if (signal == CEA936_UID_PULLDOWN_6MS) { + reg_value = SET_BITS(regUSB0, IDPULSE, 1); + } else if (signal == CEA936_UID_PULLDOWN) { + reg_value = SET_BITS(regUSB0, IDPD, 1); + } else if (signal == CEA936_UDMPULSE) { + reg_value = SET_BITS(regUSB0, DMPULSE, 1); + } + + rc = pmic_write_reg(REG_USB, reg_value, reg_mask); + + up(&mutex); + + return rc; +} + +/*@}*/ + +/************************************************************************** + * Static functions. + ************************************************************************** + */ + +/*! + * @name Connectivity Driver Internal Support Functions + * These non-exported internal functions are used to support the functionality + * of the exported connectivity APIs. + */ +/*@{*/ + +/*! + * This internal helper function sets the desired operating mode (either USB + * OTG or RS-232). It must be called with the mutex already acquired. + * + * @param mode the desired operating mode (USB or RS232) + * + * @return PMIC_SUCCESS if the desired operating mode was set + * @return PMIC_NOT_SUPPORTED if the desired operating mode is invalid + */ +static PMIC_STATUS pmic_convity_set_mode_internal(const PMIC_CONVITY_MODE mode) +{ + unsigned int reg_value0 = 0, reg_value1 = 0; + unsigned int reg_mask0 = 0, reg_mask1 = 0; + + //unsigned int reg_mask1 = SET_BITS(regUSB1, VBUSEN, 1); + + PMIC_STATUS rc = PMIC_SUCCESS; + + switch (mode) { + case USB: + /* For the USB mode, we start by tri-stating the USB bus (by + * setting VBUSEN = 0) until a device is connected (i.e., + * until we receive a 4.4V rising edge event). All pull-up + * and pull-down resistors are also disabled until a USB + * device is actually connected and we have determined which + * device is the host and the desired USB bus speed. + * + * Also tri-state the RS-232 buffers (by setting RSTRI = 1). + * This prevents the hardware from automatically returning to + * the RS-232 mode when the USB device is detached. + */ + + reg_value0 = SET_BITS(regUSB0, INTERFACE_MODE, 0); + reg_mask0 = SET_BITS(regUSB0, INTERFACE_MODE, 7); + + /*reg_value1 = SET_BITS(regUSB1, RSTRI, 1); */ + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + /* if (rc == PMIC_SUCCESS) { + CHECK_ERROR(pmic_write_reg + (REG_CHARGE_USB_SPARE, + reg_value1, reg_mask1)); + } */ + + break; + + case RS232_1: + /* For the RS-232 mode, we tri-state the USB bus (by setting + * VBUSEN = 0) and enable the RS-232 transceiver (by setting + * RS232ENB = 0). + * + * Note that even in the RS-232 mode, if a USB device is + * plugged in, we will receive a 4.4V rising edge event which + * will automatically disable the RS-232 transceiver and + * tri-state the RS-232 buffers. This allows us to temporarily + * switch over to USB mode while the USB device is attached. + * The RS-232 transceiver and buffers will be automatically + * re-enabled when the USB device is detached. + */ + + /* Explicitly disconnect all of the USB pull-down resistors + * and the VUSB power regulator here just to be safe. + * + * But we do connect the internal pull-up resistor on USB_D+ + * to avoid having an extra load on the USB_D+ line when in + * RS-232 mode. + */ + + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 1) | + SET_BITS(regUSB0, VBUSPDENB, 1) | + SET_BITS(regUSB0, USB_PU, 1); + reg_mask0 = + SET_BITS(regUSB0, INTERFACE_MODE, 7) | SET_BITS(regUSB0, + VBUSPDENB, + 1) | + SET_BITS(regUSB0, USB_PU, 1); + + reg_value1 = SET_BITS(regUSB1, RSPOL, 0); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + + if (rc == PMIC_SUCCESS) { + CHECK_ERROR(pmic_write_reg + (REG_CHARGE_USB_SPARE, + reg_value1, reg_mask1)); + } + break; + + case RS232_2: + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 2) | + SET_BITS(regUSB0, VBUSPDENB, 1) | + SET_BITS(regUSB0, USB_PU, 1); + reg_mask0 = + SET_BITS(regUSB0, INTERFACE_MODE, 7) | SET_BITS(regUSB0, + VBUSPDENB, + 1) | + SET_BITS(regUSB0, USB_PU, 1); + + reg_value1 = SET_BITS(regUSB1, RSPOL, 1); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + + if (rc == PMIC_SUCCESS) { + CHECK_ERROR(pmic_write_reg + (REG_CHARGE_USB_SPARE, + reg_value1, reg_mask1)); + } + break; + + case CEA936_MONO: + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 4); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + break; + + case CEA936_STEREO: + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 5); + reg_mask0 = SET_BITS(regUSB0, INTERFACE_MODE, 7); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + break; + + case CEA936_TEST_RIGHT: + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 6); + reg_mask0 = SET_BITS(regUSB0, INTERFACE_MODE, 7); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + break; + + case CEA936_TEST_LEFT: + reg_value0 |= SET_BITS(regUSB0, INTERFACE_MODE, 7); + reg_mask0 = SET_BITS(regUSB0, INTERFACE_MODE, 7); + + rc = pmic_write_reg(REG_USB, reg_value0, reg_mask0); + break; + + default: + rc = PMIC_NOT_SUPPORTED; + } + + if (rc == PMIC_SUCCESS) { + if (mode == USB) { + usb.mode = mode; + } else if ((mode == RS232_1) || (mode == RS232_1)) { + rs_232.mode = mode; + } else if ((mode == CEA936_MONO) || (mode == CEA936_STEREO) || + (mode == CEA936_TEST_RIGHT) + || (mode == CEA936_TEST_LEFT)) { + cea_936.mode = mode; + } + } + + return rc; +} + +/*! + * This internal helper function deregisters all of the currently registered + * callback events. It must be called with the mutual exclusion spinlock + * already acquired. + * + * We've defined the event and callback deregistration code here as a separate + * function because it can be called by either the pmic_convity_close() or the + * pmic_convity_clear_callback() APIs. We also wanted to avoid any possible + * issues with having the same thread calling spin_lock_irq() twice. + * + * Note that the mutex must have already been acquired. We will also acquire + * the spinlock here to avoid any possible race conditions with the interrupt + * handler. + * + * @return PMIC_SUCCESS if all of the callback events were cleared + */ +static PMIC_STATUS pmic_convity_deregister_all(void) +{ + unsigned long flags; + PMIC_STATUS rc = PMIC_SUCCESS; + + /* Deregister each of the PMIC events that we had previously + * registered for by using pmic_event_subscribe(). + */ + + if ((usb.eventMask & USB_DETECT_MINI_A) || + (usb.eventMask & USB_DETECT_MINI_B) || + (usb.eventMask & USB_DETECT_NON_USB_ACCESSORY) || + (usb.eventMask & USB_DETECT_FACTORY_MODE)) { + //EVENT_AB_DETI or EVENT_IDI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_ABDET); + + if (pmic_event_unsubscribe(EVENT_IDI, eventNotify) == + PMIC_SUCCESS) { + /* Also acquire the spinlock here to avoid any possible race + * conditions with the interrupt handler. + */ + + spin_lock_irqsave(&lock, flags); + + usb.eventMask &= ~(USB_DETECT_MINI_A | + USB_DETECT_MINI_B | + USB_DETECT_NON_USB_ACCESSORY | + USB_DETECT_FACTORY_MODE); + + spin_unlock_irqrestore(&lock, flags); + } else { + pr_debug + ("%s: pmic_event_unsubscribe() for EVENT_AB_DETI failed\n", + __FILE__); + rc = PMIC_ERROR; + } + } + + else if ((usb.eventMask & USB_DETECT_0V8_RISE) || + (usb.eventMask & USB_DETECT_0V8_FALL)) { + //EVENT_USB_08VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_0V8); + if (pmic_event_unsubscribe(EVENT_USBI, eventNotify) == + PMIC_SUCCESS) { + /* Also acquire the spinlock here to avoid any possible race + * conditions with the interrupt handler. + */ + spin_lock_irqsave(&lock, flags); + + usb.eventMask &= ~(USB_DETECT_0V8_RISE | + USB_DETECT_0V8_FALL); + + spin_unlock_irqrestore(&lock, flags); + } else { + pr_debug + ("%s: pmic_event_unsubscribe() for EVENT_USB_08VI failed\n", + __FILE__); + rc = PMIC_ERROR; + } + + } + + else if ((usb.eventMask & USB_DETECT_2V0_RISE) || + (usb.eventMask & USB_DETECT_2V0_FALL)) { + //EVENT_USB_20VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_2V0); + if (pmic_event_unsubscribe(EVENT_USBI, eventNotify) == + PMIC_SUCCESS) { + /* Also acquire the spinlock here to avoid any possible race + * conditions with the interrupt handler. + */ + spin_lock_irqsave(&lock, flags); + + usb.eventMask &= ~(USB_DETECT_2V0_RISE | + USB_DETECT_2V0_FALL); + + spin_unlock_irqrestore(&lock, flags); + } else { + pr_debug + ("%s: pmic_event_unsubscribe() for EVENT_USB_20VI failed\n", + __FILE__); + rc = PMIC_ERROR; + } + } + + else if ((usb.eventMask & USB_DETECT_4V4_RISE) || + (usb.eventMask & USB_DETECT_4V4_FALL)) { + + //EVENT_USB_44VI or EVENT_USBI + eventNotify.func = pmic_convity_event_handler; + eventNotify.param = (void *)(CORE_EVENT_4V4); + + if (pmic_event_unsubscribe(EVENT_USBI, eventNotify) == + PMIC_SUCCESS) { + + /* Also acquire the spinlock here to avoid any possible race + * conditions with the interrupt handler. + */ + spin_lock_irqsave(&lock, flags); + + usb.eventMask &= ~(USB_DETECT_4V4_RISE | + USB_DETECT_4V4_FALL); + + spin_unlock_irqrestore(&lock, flags); + } else { + pr_debug + ("%s: pmic_event_unsubscribe() for EVENT_USB_44VI failed\n", + __FILE__); + rc = PMIC_ERROR; + } + } + + if (rc == PMIC_SUCCESS) { + /* Also acquire the spinlock here to avoid any possible race + * conditions with the interrupt handler. + */ + spin_lock_irqsave(&lock, flags); + + /* Restore the initial reset values for the callback function + * and event mask parameters. This should be NULL and zero, + * respectively. + * + * Note that we wait until the end here to fully reset everything + * just in case some of the pmic_event_unsubscribe() calls above + * failed for some reason (which normally shouldn't happen). + */ + usb.callback = reset.callback; + usb.eventMask = reset.eventMask; + + spin_unlock_irqrestore(&lock, flags); + } + return rc; +} + +/*! + * This is the default event handler for all connectivity-related events + * and hardware interrupts. + * + * @param param event ID + */ +static void pmic_convity_event_handler(void *param) +{ + unsigned long flags; + + /* Update the global list of active interrupt events. */ + spin_lock_irqsave(&lock, flags); + eventID |= (PMIC_CORE_EVENT) (param); + spin_unlock_irqrestore(&lock, flags); + + /* Schedule the tasklet to be run as soon as it is convenient to do so. */ + schedule_work(&convityTasklet); +} + +/*! + * @brief This is the connectivity driver tasklet that handles interrupt events. + * + * This function is scheduled by the connectivity driver interrupt handler + * pmic_convity_event_handler() to complete the processing of all of the + * connectivity-related interrupt events. + * + * Since this tasklet runs with interrupts enabled, we can safely call + * the ADC driver, if necessary, to properly detect the type of USB connection + * that is being made and to call any user-registered callback functions. + * + * @param arg The parameter that was provided above in + * the DECLARE_TASKLET() macro (unused). + */ +static void pmic_convity_tasklet(struct work_struct *work) +{ + + PMIC_CONVITY_EVENTS activeEvents = 0; + unsigned long flags = 0; + + /* Check the interrupt sense bits to determine exactly what + * event just occurred. + */ + if (eventID & CORE_EVENT_4V4) { + spin_lock_irqsave(&lock, flags); + eventID &= ~CORE_EVENT_4V4; + spin_unlock_irqrestore(&lock, flags); + + activeEvents |= pmic_check_sensor(SENSE_USB4V4S) ? + USB_DETECT_4V4_RISE : USB_DETECT_4V4_FALL; + + if (activeEvents & ~usb.eventMask) { + /* The default handler for 4.4 V rising/falling edge detection + * is to simply ignore the event. + */ + ; + } + } + if (eventID & CORE_EVENT_2V0) { + spin_lock_irqsave(&lock, flags); + eventID &= ~CORE_EVENT_2V0; + spin_unlock_irqrestore(&lock, flags); + + activeEvents |= pmic_check_sensor(SENSE_USB2V0S) ? + USB_DETECT_2V0_RISE : USB_DETECT_2V0_FALL; + if (activeEvents & ~usb.eventMask) { + /* The default handler for 2.0 V rising/falling edge detection + * is to simply ignore the event. + */ + ; + } + } + if (eventID & CORE_EVENT_0V8) { + spin_lock_irqsave(&lock, flags); + eventID &= ~CORE_EVENT_0V8; + spin_unlock_irqrestore(&lock, flags); + + activeEvents |= pmic_check_sensor(SENSE_USB0V8S) ? + USB_DETECT_0V8_RISE : USB_DETECT_0V8_FALL; + + if (activeEvents & ~usb.eventMask) { + /* The default handler for 0.8 V rising/falling edge detection + * is to simply ignore the event. + */ + ; + } + } + if (eventID & CORE_EVENT_ABDET) { + spin_lock_irqsave(&lock, flags); + eventID &= ~CORE_EVENT_ABDET; + spin_unlock_irqrestore(&lock, flags); + + activeEvents |= pmic_check_sensor(SENSE_ID_GNDS) ? + USB_DETECT_MINI_A : 0; + + activeEvents |= pmic_check_sensor(SENSE_ID_FLOATS) ? + USB_DETECT_MINI_B : 0; + } + + /* Begin a critical section here so that we don't register/deregister + * for events or open/close the connectivity driver while the existing + * event handler (if it is currently defined) is in the middle of handling + * the current event. + */ + spin_lock_irqsave(&lock, flags); + + /* Finally, call the user-defined callback function if required. */ + if ((usb.handle_state == HANDLE_IN_USE) && + (usb.callback != NULL) && (activeEvents & usb.eventMask)) { + (*usb.callback) (activeEvents); + } + + spin_unlock_irqrestore(&lock, flags); +} + +/*@}*/ + +/************************************************************************** + * Module initialization and termination functions. + * + * Note that if this code is compiled into the kernel, then the + * module_init() function will be called within the device_initcall() + * group. + ************************************************************************** + */ + +/*! + * @name Connectivity Driver Loading/Unloading Functions + * These non-exported internal functions are used to support the connectivity + * device driver initialization and de-initialization operations. + */ +/*@{*/ + +/*! + * @brief This is the connectivity device driver initialization function. + * + * This function is called by the kernel when this device driver is first + * loaded. + */ +static int __init mc13783_pmic_convity_init(void) +{ + printk(KERN_INFO "PMIC Connectivity driver loading..\n"); + + return 0; +} + +/*! + * @brief This is the Connectivity device driver de-initialization function. + * + * This function is called by the kernel when this device driver is about + * to be unloaded. + */ +static void __exit mc13783_pmic_convity_exit(void) +{ + printk(KERN_INFO "PMIC Connectivity driver unloading\n"); + + /* Close the device handle if it is still open. This will also + * deregister any callbacks that may still be active. + */ + if (usb.handle_state == HANDLE_IN_USE) { + pmic_convity_close(usb.handle); + } else if (usb.handle_state == HANDLE_IN_USE) { + pmic_convity_close(rs_232.handle); + } else if (usb.handle_state == HANDLE_IN_USE) { + pmic_convity_close(cea_936.handle); + } + + /* Reset the PMIC Connectivity register to it's power on state. + * We should do this when unloading the module so that we don't + * leave the hardware in a state which could cause problems when + * no device driver is loaded. + */ + pmic_write_reg(REG_USB, RESET_USBCNTRL_REG_0, REG_FULLMASK); + pmic_write_reg(REG_CHARGE_USB_SPARE, RESET_USBCNTRL_REG_1, + REG_FULLMASK); + /* Note that there is no need to reset the "convity" device driver + * state structure to the reset state since we are in the final + * stage of unloading the device driver. The device driver state + * structure will be automatically and properly reinitialized if + * this device driver is reloaded. + */ +} + +/*@}*/ + +/* + * Module entry points and description information. + */ + +module_init(mc13783_pmic_convity_init); +module_exit(mc13783_pmic_convity_exit); + +MODULE_DESCRIPTION("mc13783 Connectivity device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_battery.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_battery.c @@ -0,0 +1,1221 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_battery.c + * @brief This is the main file of PMIC(mc13783) Battery driver. + * + * @ingroup PMIC_BATTERY + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "pmic_battery_defs.h" + +#include +#ifdef CONFIG_MXC_HWEVENT +#include +#endif + +static int pmic_battery_major; + +/*! + * Number of users waiting in suspendq + */ +static int swait = 0; + +/*! + * To indicate whether any of the battery devices are suspending + */ +static int suspend_flag = 0; + +/*! + * The suspendq is used to block application calls + */ +static wait_queue_head_t suspendq; + +static struct class *pmic_battery_class; + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_batt_enable_charger); +EXPORT_SYMBOL(pmic_batt_disable_charger); +EXPORT_SYMBOL(pmic_batt_set_charger); +EXPORT_SYMBOL(pmic_batt_get_charger_setting); +EXPORT_SYMBOL(pmic_batt_get_charge_current); +EXPORT_SYMBOL(pmic_batt_enable_eol); +EXPORT_SYMBOL(pmic_batt_bp_enable_eol); +EXPORT_SYMBOL(pmic_batt_disable_eol); +EXPORT_SYMBOL(pmic_batt_set_out_control); +EXPORT_SYMBOL(pmic_batt_set_threshold); +EXPORT_SYMBOL(pmic_batt_led_control); +EXPORT_SYMBOL(pmic_batt_set_reverse_supply); +EXPORT_SYMBOL(pmic_batt_set_unregulated); +EXPORT_SYMBOL(pmic_batt_set_5k_pull); +EXPORT_SYMBOL(pmic_batt_event_subscribe); +EXPORT_SYMBOL(pmic_batt_event_unsubscribe); + +static DECLARE_MUTEX(count_mutex); /* open count mutex */ +static int open_count; /* open count for device file */ + +/*! + * Callback function for events, we want on MGN board + */ +static void callback_chg_detect(void) +{ +#ifdef CONFIG_MXC_HWEVENT + t_sensor_bits sensor; + struct mxc_hw_event event = { HWE_BAT_CHARGER_PLUG, 0 }; + + pr_debug("In callback_chg_detect\n"); + + /* get sensor values */ + pmic_get_sensors(&sensor); + + pr_debug("Callback, charger detect:%d\n", sensor.sense_chgdets); + + if (sensor.sense_chgdets) + event.args = 1; + else + event.args = 0; + /* send hardware event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +static void callback_low_battery(void) +{ +#ifdef CONFIG_MXC_HWEVENT + struct mxc_hw_event event = { HWE_BAT_BATTERY_LOW, 0 }; + + pr_debug("In callback_low_battery\n"); + /* send hardware event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +static void callback_power_fail(void) +{ +#ifdef CONFIG_MXC_HWEVENT + struct mxc_hw_event event = { HWE_BAT_POWER_FAILED, 0 }; + + pr_debug("In callback_power_fail\n"); + /* send hardware event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +static void callback_chg_overvoltage(void) +{ +#ifdef CONFIG_MXC_HWEVENT + struct mxc_hw_event event = { HWE_BAT_CHARGER_OVERVOLTAGE, 0 }; + + pr_debug("In callback_chg_overvoltage\n"); + /* send hardware event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +static void callback_chg_full(void) +{ +#ifdef CONFIG_MXC_HWEVENT + t_sensor_bits sensor; + struct mxc_hw_event event = { HWE_BAT_CHARGER_FULL, 0 }; + + pr_debug("In callback_chg_full\n"); + + /* disable charge function */ + pmic_batt_disable_charger(BATT_MAIN_CHGR); + + /* get charger sensor */ + pmic_get_sensors(&sensor); + + /* if did not detect the charger */ + if (sensor.sense_chgdets) + return; + /* send hardware event */ + hw_event_send(HWE_DEF_PRIORITY, &event); +#endif +} + +/*! + * This is the suspend of power management for the pmic battery API. + * It suports SAVE and POWER_DOWN state. + * + * @param pdev the device + * @param state the state + * + * @return This function returns 0 if successful. + */ +static int pmic_battery_suspend(struct platform_device *pdev, + pm_message_t state) +{ + unsigned int reg_value = 0; + + suspend_flag = 1; + CHECK_ERROR(pmic_write_reg(REG_CHARGER, reg_value, PMIC_ALL_BITS)); + + return 0; +}; + +/*! + * This is the resume of power management for the pmic battery API. + * It suports RESTORE state. + * + * @param pdev the device + * + * @return This function returns 0 if successful. + */ +static int pmic_battery_resume(struct platform_device *pdev) +{ + suspend_flag = 0; + while (swait > 0) { + swait--; + wake_up_interruptible(&suspendq); + } + + return 0; +}; + +/*! + * This function is used to start charging a battery. For different charger, + * different voltage and current range are supported. \n + * + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Charging voltage. + * @param c_current Charging current. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_enable_charger(t_batt_charger chgr, + unsigned char c_voltage, + unsigned char c_current) +{ + unsigned int val, mask, reg; + + val = 0; + mask = 0; + reg = 0; + + if (suspend_flag == 1) + return PMIC_ERROR; + + switch (chgr) { + case BATT_MAIN_CHGR: + val = BITFVAL(MC13783_BATT_DAC_DAC, c_current) | + BITFVAL(MC13783_BATT_DAC_V_DAC, c_voltage); + mask = BITFMASK(MC13783_BATT_DAC_DAC) | + BITFMASK(MC13783_BATT_DAC_V_DAC); + reg = REG_CHARGER; + break; + + case BATT_CELL_CHGR: + val = BITFVAL(MC13783_BATT_DAC_V_COIN, c_voltage) | + BITFVAL(MC13783_BATT_DAC_COIN_CH_EN, + MC13783_BATT_DAC_COIN_CH_EN_ENABLED); + mask = BITFMASK(MC13783_BATT_DAC_V_COIN) | + BITFMASK(MC13783_BATT_DAC_COIN_CH_EN); + reg = REG_POWER_CONTROL_0; + break; + + case BATT_TRCKLE_CHGR: + val = BITFVAL(MC13783_BATT_DAC_TRCKLE, c_current); + mask = BITFMASK(MC13783_BATT_DAC_TRCKLE); + reg = REG_CHARGER; + break; + + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function turns off a charger. + * + * @param chgr Charger as defined in \b t_batt_charger. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_disable_charger(t_batt_charger chgr) +{ + unsigned int val, mask, reg; + + val = 0; + mask = 0; + reg = 0; + + if (suspend_flag == 1) + return PMIC_ERROR; + switch (chgr) { + case BATT_MAIN_CHGR: + val = BITFVAL(MC13783_BATT_DAC_DAC, 0) | + BITFVAL(MC13783_BATT_DAC_V_DAC, 0); + mask = BITFMASK(MC13783_BATT_DAC_DAC) | + BITFMASK(MC13783_BATT_DAC_V_DAC); + reg = REG_CHARGER; + break; + + case BATT_CELL_CHGR: + val = BITFVAL(MC13783_BATT_DAC_COIN_CH_EN, + MC13783_BATT_DAC_COIN_CH_EN_DISABLED); + mask = BITFMASK(MC13783_BATT_DAC_COIN_CH_EN); + reg = REG_POWER_CONTROL_0; + break; + + case BATT_TRCKLE_CHGR: + val = BITFVAL(MC13783_BATT_DAC_TRCKLE, 0); + mask = BITFMASK(MC13783_BATT_DAC_TRCKLE); + reg = REG_CHARGER; + break; + + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function is used to change the charger setting. + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Charging voltage. + * @param c_current Charging current. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_charger(t_batt_charger chgr, + unsigned char c_voltage, + unsigned char c_current) +{ + unsigned int val, mask, reg; + + val = 0; + mask = 0; + reg = 0; + + if (suspend_flag == 1) + return PMIC_ERROR; + + switch (chgr) { + case BATT_MAIN_CHGR: + val = BITFVAL(MC13783_BATT_DAC_DAC, c_current) | + BITFVAL(MC13783_BATT_DAC_V_DAC, c_voltage); + mask = BITFMASK(MC13783_BATT_DAC_DAC) | + BITFMASK(MC13783_BATT_DAC_V_DAC); + reg = REG_CHARGER; + break; + + case BATT_CELL_CHGR: + val = BITFVAL(MC13783_BATT_DAC_V_COIN, c_voltage); + mask = BITFMASK(MC13783_BATT_DAC_V_COIN); + reg = REG_POWER_CONTROL_0; + break; + + case BATT_TRCKLE_CHGR: + val = BITFVAL(MC13783_BATT_DAC_TRCKLE, c_current); + mask = BITFMASK(MC13783_BATT_DAC_TRCKLE); + reg = REG_CHARGER; + break; + + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg, val, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function is used to retrive the charger setting. + * + * @param chgr Charger as defined in \b t_batt_charger. + * @param c_voltage Output parameter for charging voltage setting. + * @param c_current Output parameter for charging current setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_charger_setting(t_batt_charger chgr, + unsigned char *c_voltage, + unsigned char *c_current) +{ + unsigned int val, reg; + + reg = 0; + + if (suspend_flag == 1) + return PMIC_ERROR; + + switch (chgr) { + case BATT_MAIN_CHGR: + case BATT_TRCKLE_CHGR: + reg = REG_CHARGER; + break; + case BATT_CELL_CHGR: + reg = REG_POWER_CONTROL_0; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, &val, PMIC_ALL_BITS)); + + switch (chgr) { + case BATT_MAIN_CHGR: + *c_voltage = BITFEXT(val, MC13783_BATT_DAC_V_DAC);; + *c_current = BITFEXT(val, MC13783_BATT_DAC_DAC); + break; + + case BATT_CELL_CHGR: + *c_voltage = BITFEXT(val, MC13783_BATT_DAC_V_COIN); + *c_current = 0; + break; + + case BATT_TRCKLE_CHGR: + *c_voltage = 0; + *c_current = BITFEXT(val, MC13783_BATT_DAC_TRCKLE); + break; + + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function is retrives the main battery voltage. + * + * @param b_voltage Output parameter for voltage setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_batt_voltage(unsigned short *b_voltage) +{ + t_channel channel; + unsigned short result[8]; + + if (suspend_flag == 1) + return PMIC_ERROR; + channel = BATTERY_VOLTAGE; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *b_voltage = result[0]; + + return PMIC_SUCCESS; +} + +/*! + * This function is retrives the main battery current. + * + * @param b_current Output parameter for current setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_batt_current(unsigned short *b_current) +{ + t_channel channel; + unsigned short result[8]; + + if (suspend_flag == 1) + return PMIC_ERROR; + + channel = BATTERY_CURRENT; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *b_current = result[0]; + + return PMIC_SUCCESS; +} + +/*! + * This function is retrives the main battery temperature. + * + * @param b_temper Output parameter for temperature setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_batt_temperature(unsigned short *b_temper) +{ + t_channel channel; + unsigned short result[8]; + + if (suspend_flag == 1) + return PMIC_ERROR; + + channel = GEN_PURPOSE_AD5; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *b_temper = result[0]; + + return PMIC_SUCCESS; +} + +/*! + * This function is retrives the main battery charging voltage. + * + * @param c_voltage Output parameter for charging voltage setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_charge_voltage(unsigned short *c_voltage) +{ + t_channel channel; + unsigned short result[8]; + + if (suspend_flag == 1) + return PMIC_ERROR; + + channel = CHARGE_VOLTAGE; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *c_voltage = result[0]; + + return PMIC_SUCCESS; +} + +/*! + * This function is retrives the main battery charging current. + * + * @param c_current Output parameter for charging current setting. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_get_charge_current(unsigned short *c_current) +{ + t_channel channel; + unsigned short result[8]; + + if (suspend_flag == 1) + return PMIC_ERROR; + + channel = CHARGE_CURRENT; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *c_current = result[0]; + + return PMIC_SUCCESS; +} + +/*! + * This function enables End-of-Life comparator. Not supported on + * mc13783. Use pmic_batt_bp_enable_eol function. + * + * @param threshold End-of-Life threshold. + * + * @return This function returns PMIC_UNSUPPORTED + */ +PMIC_STATUS pmic_batt_enable_eol(unsigned char threshold) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function enables End-of-Life comparator. + * + * @param typical Falling Edge Threshold threshold. + * @verbatim + BPDET UVDET LOBATL + ____ _____ ___________ + 0 2.6 UVDET + 0.2 + 1 2.6 UVDET + 0.3 + 2 2.6 UVDET + 0.4 + 3 2.6 UVDET + 0.5 + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_bp_enable_eol(t_bp_threshold typical) +{ + unsigned int val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_EOL_CMP_EN, + MC13783_BATT_DAC_EOL_CMP_EN_ENABLE) | + BITFVAL(MC13783_BATT_DAC_EOL_SEL, typical); + mask = BITFMASK(MC13783_BATT_DAC_EOL_CMP_EN) | + BITFMASK(MC13783_BATT_DAC_EOL_SEL); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables End-of-Life comparator. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_disable_eol(void) +{ + unsigned int val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_EOL_CMP_EN, + MC13783_BATT_DAC_EOL_CMP_EN_DISABLE); + mask = BITFMASK(MC13783_BATT_DAC_EOL_CMP_EN); + + CHECK_ERROR(pmic_write_reg(REG_POWER_CONTROL_0, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function sets the output controls. + * It sets the FETOVRD and FETCTRL bits of mc13783 + * + * @param control type of control. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_set_out_control(t_control control) +{ + unsigned int val, mask; + if (suspend_flag == 1) + return PMIC_ERROR; + + switch (control) { + case CONTROL_HARDWARE: + val = BITFVAL(MC13783_BATT_DAC_FETOVRD_EN, 0) | + BITFVAL(MC13783_BATT_DAC_FETCTRL_EN, 0); + mask = BITFMASK(MC13783_BATT_DAC_FETOVRD_EN) | + BITFMASK(MC13783_BATT_DAC_FETCTRL_EN); + break; + case CONTROL_BPFET_LOW: + val = BITFVAL(MC13783_BATT_DAC_FETOVRD_EN, 1) | + BITFVAL(MC13783_BATT_DAC_FETCTRL_EN, 0); + mask = BITFMASK(MC13783_BATT_DAC_FETOVRD_EN) | + BITFMASK(MC13783_BATT_DAC_FETCTRL_EN); + break; + case CONTROL_BPFET_HIGH: + val = BITFVAL(MC13783_BATT_DAC_FETOVRD_EN, 1) | + BITFVAL(MC13783_BATT_DAC_FETCTRL_EN, 1); + mask = BITFMASK(MC13783_BATT_DAC_FETOVRD_EN) | + BITFMASK(MC13783_BATT_DAC_FETCTRL_EN); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function sets over voltage threshold. + * + * @param threshold value of over voltage threshold. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_set_threshold(int threshold) +{ + unsigned int val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + if (threshold > BAT_THRESHOLD_MAX) + return PMIC_PARAMETER_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_OVCTRL, threshold); + mask = BITFMASK(MC13783_BATT_DAC_OVCTRL); + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function controls charge LED. + * + * @param on If on is ture, LED will be turned on, + * or otherwise, LED will be turned off. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_led_control(bool on) +{ + unsigned val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_LED_EN, on); + mask = BITFMASK(MC13783_BATT_DAC_LED_EN); + + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function sets reverse supply mode. + * + * @param enable If enable is ture, reverse supply mode is enable, + * or otherwise, reverse supply mode is disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_reverse_supply(bool enable) +{ + unsigned val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_REVERSE_SUPPLY, enable); + mask = BITFMASK(MC13783_BATT_DAC_REVERSE_SUPPLY); + + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function sets unregulatored charging mode on main battery. + * + * @param enable If enable is ture, unregulated charging mode is + * enable, or otherwise, disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_unregulated(bool enable) +{ + unsigned val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_UNREGULATED, enable); + mask = BITFMASK(MC13783_BATT_DAC_UNREGULATED); + + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function sets a 5K pull down at CHRGRAW. + * To be used in the dual path charging configuration. + * + * @param enable If enable is true, 5k pull down is + * enable, or otherwise, disabled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_batt_set_5k_pull(bool enable) +{ + unsigned val, mask; + + if (suspend_flag == 1) + return PMIC_ERROR; + + val = BITFVAL(MC13783_BATT_DAC_5K, enable); + mask = BITFMASK(MC13783_BATT_DAC_5K); + + CHECK_ERROR(pmic_write_reg(REG_CHARGER, val, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function is used to un/subscribe on battery event IT. + * + * @param event type of event. + * @param callback event callback function. + * @param sub define if Un/subscribe event. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS mc13783_battery_event(t_batt_event event, void *callback, bool sub) +{ + pmic_event_callback_t bat_callback; + type_event bat_event; + + bat_callback.func = callback; + bat_callback.param = NULL; + switch (event) { + case BAT_IT_CHG_DET: + bat_event = EVENT_CHGDETI; + break; + case BAT_IT_CHG_OVERVOLT: + bat_event = EVENT_CHGOVI; + break; + case BAT_IT_CHG_REVERSE: + bat_event = EVENT_CHGREVI; + break; + case BAT_IT_CHG_SHORT_CIRCUIT: + bat_event = EVENT_CHGSHORTI; + break; + case BAT_IT_CCCV: + bat_event = EVENT_CCCVI; + break; + case BAT_IT_BELOW_THRESHOLD: + bat_event = EVENT_CHRGCURRI; + break; + default: + return PMIC_PARAMETER_ERROR; + } + if (sub == true) { + CHECK_ERROR(pmic_event_subscribe(bat_event, bat_callback)); + } else { + CHECK_ERROR(pmic_event_unsubscribe(bat_event, bat_callback)); + } + return 0; +} + +/*! + * This function is used to subscribe on battery event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_event_subscribe(t_batt_event event, void *callback) +{ + if (suspend_flag == 1) + return PMIC_ERROR; + + return mc13783_battery_event(event, callback, true); +} + +/*! + * This function is used to un subscribe on battery event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_batt_event_unsubscribe(t_batt_event event, void *callback) +{ + if (suspend_flag == 1) + return PMIC_ERROR; + + return mc13783_battery_event(event, callback, false); +} + +/*! + * This function implements IOCTL controls on a PMIC Battery device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int pmic_battery_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + t_charger_setting *chgr_setting = NULL; + unsigned short c_current; + unsigned int bc_info; + t_eol_setting *eol_setting; + + if (_IOC_TYPE(cmd) != 'p') + return -ENOTTY; + + switch (cmd) { + case PMIC_BATT_CHARGER_CONTROL: + if ((chgr_setting = kmalloc(sizeof(t_charger_setting), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(chgr_setting, (t_charger_setting *) arg, + sizeof(t_charger_setting))) { + kfree(chgr_setting); + return -EFAULT; + } + + if (chgr_setting->on != false) { + CHECK_ERROR_KFREE(pmic_batt_enable_charger + (chgr_setting->chgr, + chgr_setting->c_voltage, + chgr_setting->c_current), + (kfree(chgr_setting))); + } else { + CHECK_ERROR(pmic_batt_disable_charger + (chgr_setting->chgr)); + } + + kfree(chgr_setting); + break; + + case PMIC_BATT_SET_CHARGER: + if ((chgr_setting = kmalloc(sizeof(t_charger_setting), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(chgr_setting, (t_charger_setting *) arg, + sizeof(t_charger_setting))) { + kfree(chgr_setting); + return -EFAULT; + } + + CHECK_ERROR_KFREE(pmic_batt_set_charger(chgr_setting->chgr, + chgr_setting->c_voltage, + chgr_setting-> + c_current), + (kfree(chgr_setting))); + + kfree(chgr_setting); + break; + + case PMIC_BATT_GET_CHARGER: + if ((chgr_setting = kmalloc(sizeof(t_charger_setting), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(chgr_setting, (t_charger_setting *) arg, + sizeof(t_charger_setting))) { + kfree(chgr_setting); + return -EFAULT; + } + + CHECK_ERROR_KFREE(pmic_batt_get_charger_setting + (chgr_setting->chgr, &chgr_setting->c_voltage, + &chgr_setting->c_current), + (kfree(chgr_setting))); + if (copy_to_user + ((t_charger_setting *) arg, chgr_setting, + sizeof(t_charger_setting))) { + return -EFAULT; + } + + kfree(chgr_setting); + break; + + case PMIC_BATT_GET_CHARGER_SENSOR: + { + t_sensor_bits sensor; + pmic_get_sensors(&sensor); + if (copy_to_user + ((unsigned int *)arg, &sensor.sense_chgdets, + sizeof(unsigned int))) + return -EFAULT; + + break; + } + case PMIC_BATT_GET_BATTERY_VOLTAGE: + CHECK_ERROR(pmic_batt_get_batt_voltage(&c_current)); + bc_info = (unsigned int)c_current * 2300 / 1023 + 2400; + if (copy_to_user((unsigned int *)arg, &bc_info, + sizeof(unsigned int))) + return -EFAULT; + + break; + + case PMIC_BATT_GET_BATTERY_CURRENT: + CHECK_ERROR(pmic_batt_get_batt_current(&c_current)); + bc_info = (unsigned int)c_current * 5750 / 1023; + if (copy_to_user((unsigned int *)arg, &bc_info, + sizeof(unsigned int))) + return -EFAULT; + break; + + case PMIC_BATT_GET_BATTERY_TEMPERATURE: + CHECK_ERROR(pmic_batt_get_batt_temperature(&c_current)); + bc_info = (unsigned int)c_current; + if (copy_to_user((unsigned int *)arg, &bc_info, + sizeof(unsigned int))) + return -EFAULT; + + break; + + case PMIC_BATT_GET_CHARGER_VOLTAGE: + CHECK_ERROR(pmic_batt_get_charge_voltage(&c_current)); + bc_info = (unsigned int)c_current * 23000 / 1023; + if (copy_to_user((unsigned int *)arg, &bc_info, + sizeof(unsigned int))) + return -EFAULT; + + break; + + case PMIC_BATT_GET_CHARGER_CURRENT: + CHECK_ERROR(pmic_batt_get_charge_current(&c_current)); + bc_info = (unsigned int)c_current * 5750 / 1023; + if (copy_to_user((unsigned int *)arg, &bc_info, + sizeof(unsigned int))) + return -EFAULT; + + break; + + case PMIC_BATT_EOL_CONTROL: + if ((eol_setting = kmalloc(sizeof(t_eol_setting), GFP_KERNEL)) + == NULL) { + return -ENOMEM; + } + if (copy_from_user(eol_setting, (t_eol_setting *) arg, + sizeof(t_eol_setting))) { + kfree(eol_setting); + return -EFAULT; + } + + if (eol_setting->enable != false) { + CHECK_ERROR_KFREE(pmic_batt_bp_enable_eol + (eol_setting->typical), + (kfree(chgr_setting))); + } else { + CHECK_ERROR_KFREE(pmic_batt_disable_eol(), + (kfree(chgr_setting))); + } + + kfree(eol_setting); + break; + + case PMIC_BATT_SET_OUT_CONTROL: + CHECK_ERROR(pmic_batt_set_out_control((t_control) arg)); + break; + + case PMIC_BATT_SET_THRESHOLD: + CHECK_ERROR(pmic_batt_set_threshold((int)arg)); + break; + + case PMIC_BATT_LED_CONTROL: + CHECK_ERROR(pmic_batt_led_control((bool) arg)); + break; + + case PMIC_BATT_REV_SUPP_CONTROL: + CHECK_ERROR(pmic_batt_set_reverse_supply((bool) arg)); + break; + + case PMIC_BATT_UNREG_CONTROL: + CHECK_ERROR(pmic_batt_set_unregulated((bool) arg)); + break; + + default: + return -EINVAL; + } + return 0; +} + +/*! + * This function implements the open method on a Pmic battery device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_battery_open(struct inode *inode, struct file *file) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + + /* check open count, if open firstly, register callbacks */ + down(&count_mutex); + if (open_count++ > 0) { + up(&count_mutex); + return 0; + } + + pr_debug("Subscribe the callbacks\n"); + /* register battery event callback */ + if (pmic_batt_event_subscribe(BAT_IT_CHG_DET, callback_chg_detect)) { + pr_debug("Failed to subscribe the charger detect callback\n"); + goto event_err1; + } + if (pmic_power_event_sub(PWR_IT_LOBATLI, callback_power_fail)) { + pr_debug("Failed to subscribe the power failed callback\n"); + goto event_err2; + } + if (pmic_power_event_sub(PWR_IT_LOBATHI, callback_low_battery)) { + pr_debug("Failed to subscribe the low battery callback\n"); + goto event_err3; + } + if (pmic_batt_event_subscribe + (BAT_IT_CHG_OVERVOLT, callback_chg_overvoltage)) { + pr_debug("Failed to subscribe the low battery callback\n"); + goto event_err4; + } + if (pmic_batt_event_subscribe + (BAT_IT_BELOW_THRESHOLD, callback_chg_full)) { + pr_debug("Failed to subscribe the charge full callback\n"); + goto event_err5; + } + + up(&count_mutex); + + return 0; + + /* un-subscribe the event callbacks */ +event_err5: + pmic_batt_event_unsubscribe(BAT_IT_CHG_OVERVOLT, + callback_chg_overvoltage); +event_err4: + pmic_power_event_unsub(PWR_IT_LOBATHI, callback_low_battery); +event_err3: + pmic_power_event_unsub(PWR_IT_LOBATLI, callback_power_fail); +event_err2: + pmic_batt_event_unsubscribe(BAT_IT_CHG_DET, callback_chg_detect); +event_err1: + + open_count--; + up(&count_mutex); + + return -EFAULT; + +} + +/*! + * This function implements the release method on a Pmic battery device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_battery_release(struct inode *inode, struct file *file) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + + /* check open count, if open firstly, register callbacks */ + down(&count_mutex); + if (--open_count == 0) { + /* unregister these event callback */ + pr_debug("Unsubscribe the callbacks\n"); + pmic_batt_event_unsubscribe(BAT_IT_BELOW_THRESHOLD, + callback_chg_full); + pmic_batt_event_unsubscribe(BAT_IT_CHG_OVERVOLT, + callback_chg_overvoltage); + pmic_power_event_unsub(PWR_IT_LOBATHI, callback_low_battery); + pmic_power_event_unsub(PWR_IT_LOBATLI, callback_power_fail); + pmic_batt_event_unsubscribe(BAT_IT_CHG_DET, + callback_chg_detect); + } + up(&count_mutex); + + return 0; +} + +static struct file_operations pmic_battery_fops = { + .owner = THIS_MODULE, + .ioctl = pmic_battery_ioctl, + .open = pmic_battery_open, + .release = pmic_battery_release, +}; + +static int pmic_battery_remove(struct platform_device *pdev) +{ + device_destroy(pmic_battery_class, MKDEV(pmic_battery_major, 0)); + class_destroy(pmic_battery_class); + unregister_chrdev(pmic_battery_major, PMIC_BATTERY_STRING); + return 0; +} + +static int pmic_battery_probe(struct platform_device *pdev) +{ + int ret = 0; + struct device *temp_class; + + pmic_battery_major = register_chrdev(0, PMIC_BATTERY_STRING, + &pmic_battery_fops); + + if (pmic_battery_major < 0) { + printk(KERN_ERR "Unable to get a major for pmic_battery\n"); + return pmic_battery_major; + } + init_waitqueue_head(&suspendq); + + pmic_battery_class = class_create(THIS_MODULE, PMIC_BATTERY_STRING); + if (IS_ERR(pmic_battery_class)) { + printk(KERN_ERR "Error creating PMIC battery class.\n"); + ret = PTR_ERR(pmic_battery_class); + goto err_out1; + } + + temp_class = device_create(pmic_battery_class, NULL, + MKDEV(pmic_battery_major, 0), NULL, + PMIC_BATTERY_STRING); + if (IS_ERR(temp_class)) { + printk(KERN_ERR "Error creating PMIC battery class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + pmic_batt_led_control(true); + pmic_batt_set_5k_pull(true); + + printk(KERN_INFO "PMIC Battery successfully probed\n"); + + return ret; + + err_out2: + class_destroy(pmic_battery_class); + err_out1: + unregister_chrdev(pmic_battery_major, PMIC_BATTERY_STRING); + return ret; +} + +static struct platform_driver pmic_battery_driver_ldm = { + .driver = { + .name = "pmic_battery", + .bus = &platform_bus_type, + }, + .suspend = pmic_battery_suspend, + .resume = pmic_battery_resume, + .probe = pmic_battery_probe, + .remove = pmic_battery_remove, +}; + +/* + * Init and Exit + */ + +static int __init pmic_battery_init(void) +{ + pr_debug("PMIC Battery driver loading...\n"); + return platform_driver_register(&pmic_battery_driver_ldm); +} + +static void __exit pmic_battery_exit(void) +{ + platform_driver_unregister(&pmic_battery_driver_ldm); + pr_debug("PMIC Battery driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +module_init(pmic_battery_init); +module_exit(pmic_battery_exit); + +MODULE_DESCRIPTION("pmic_battery driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/Makefile @@ -0,0 +1,18 @@ +# +# Makefile for the mc13783 pmic drivers. +# + +obj-$(CONFIG_MXC_MC13783_ADC) += pmic_adc-mod.o +obj-$(CONFIG_MXC_MC13783_AUDIO) += pmic_audio-mod.o +obj-$(CONFIG_MXC_MC13783_RTC) += pmic_rtc-mod.o +obj-$(CONFIG_MXC_MC13783_LIGHT) += pmic_light-mod.o +obj-$(CONFIG_MXC_MC13783_BATTERY) += pmic_battery-mod.o +obj-$(CONFIG_MXC_MC13783_CONNECTIVITY) += pmic_convity-mod.o +obj-$(CONFIG_MXC_MC13783_POWER) += pmic_power-mod.o +pmic_adc-mod-objs := pmic_adc.o +pmic_audio-mod-objs := pmic_audio.o +pmic_rtc-mod-objs := pmic_rtc.o +pmic_light-mod-objs := pmic_light.o +pmic_battery-mod-objs := pmic_battery.o +pmic_convity-mod-objs := pmic_convity.o +pmic_power-mod-objs := pmic_power.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_audio.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_audio.c @@ -0,0 +1,5876 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_audio.c + * @brief Implementation of the PMIC(mc13783) Audio driver APIs. + * + * The PMIC Audio driver and this API were developed to support the + * audio playback, recording, and mixing capabilities of the power + * management ICs that are available from Freescale Semiconductor, Inc. + * + * The following operating modes are supported: + * + * @verbatim + Operating Mode mc13783 + ---------------------------- ------- + Stereo DAC Playback Yes + Stereo DAC Input Mixing Yes + Voice CODEC Playback Yes + Voice CODEC Input Mixing Yes + Voice CODEC Mono Recording Yes + Voice CODEC Stereo Recording Yes + Microphone Bias Control Yes + Output Amplifier Control Yes + Output Mixing Control Yes + Input Amplifier Control Yes + Master/Slave Mode Select Yes + Anti Pop Bias Circuit Control Yes + @endverbatim + * + * Note that the Voice CODEC may also be referred to as the Telephone + * CODEC in the PMIC DTS documentation. Also note that, while the power + * management ICs do provide similar audio capabilities, each PMIC may + * support additional configuration settings and features. Therefore, it + * is highly recommended that the appropriate power management IC DTS + * documents be used in conjunction with this API interface. + * + * @ingroup PMIC_AUDIO + */ + +#include +#include /* For tasklet interface. */ +#include /* For kernel module interface. */ +#include +#include /* For spinlock interface. */ +#include /* For PMIC ADC driver interface. */ +#include +#include /* For PMIC Audio driver interface. */ + +/* + * mc13783 PMIC Audio API + */ + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(MIN_STDAC_SAMPLING_RATE_HZ); +EXPORT_SYMBOL(MAX_STDAC_SAMPLING_RATE_HZ); +EXPORT_SYMBOL(pmic_audio_open); +EXPORT_SYMBOL(pmic_audio_close); +EXPORT_SYMBOL(pmic_audio_set_protocol); +EXPORT_SYMBOL(pmic_audio_get_protocol); +EXPORT_SYMBOL(pmic_audio_enable); +EXPORT_SYMBOL(pmic_audio_disable); +EXPORT_SYMBOL(pmic_audio_reset); +EXPORT_SYMBOL(pmic_audio_reset_all); +EXPORT_SYMBOL(pmic_audio_set_callback); +EXPORT_SYMBOL(pmic_audio_clear_callback); +EXPORT_SYMBOL(pmic_audio_get_callback); +EXPORT_SYMBOL(pmic_audio_antipop_enable); +EXPORT_SYMBOL(pmic_audio_antipop_disable); +EXPORT_SYMBOL(pmic_audio_digital_filter_reset); +EXPORT_SYMBOL(pmic_audio_vcodec_set_clock); +EXPORT_SYMBOL(pmic_audio_vcodec_get_clock); +EXPORT_SYMBOL(pmic_audio_vcodec_set_rxtx_timeslot); +EXPORT_SYMBOL(pmic_audio_vcodec_get_rxtx_timeslot); +EXPORT_SYMBOL(pmic_audio_vcodec_set_secondary_txslot); +EXPORT_SYMBOL(pmic_audio_vcodec_get_secondary_txslot); +EXPORT_SYMBOL(pmic_audio_vcodec_set_config); +EXPORT_SYMBOL(pmic_audio_vcodec_clear_config); +EXPORT_SYMBOL(pmic_audio_vcodec_get_config); +EXPORT_SYMBOL(pmic_audio_vcodec_enable_bypass); +EXPORT_SYMBOL(pmic_audio_vcodec_disable_bypass); +EXPORT_SYMBOL(pmic_audio_stdac_set_clock); +EXPORT_SYMBOL(pmic_audio_stdac_get_clock); +EXPORT_SYMBOL(pmic_audio_stdac_set_rxtx_timeslot); +EXPORT_SYMBOL(pmic_audio_stdac_get_rxtx_timeslot); +EXPORT_SYMBOL(pmic_audio_stdac_set_config); +EXPORT_SYMBOL(pmic_audio_stdac_clear_config); +EXPORT_SYMBOL(pmic_audio_stdac_get_config); +EXPORT_SYMBOL(pmic_audio_input_set_config); +EXPORT_SYMBOL(pmic_audio_input_clear_config); +EXPORT_SYMBOL(pmic_audio_input_get_config); +EXPORT_SYMBOL(pmic_audio_vcodec_set_mic); +EXPORT_SYMBOL(pmic_audio_vcodec_get_mic); +EXPORT_SYMBOL(pmic_audio_vcodec_set_mic_on_off); +EXPORT_SYMBOL(pmic_audio_vcodec_get_mic_on_off); +EXPORT_SYMBOL(pmic_audio_vcodec_set_record_gain); +EXPORT_SYMBOL(pmic_audio_vcodec_get_record_gain); +EXPORT_SYMBOL(pmic_audio_vcodec_enable_micbias); +EXPORT_SYMBOL(pmic_audio_vcodec_disable_micbias); +EXPORT_SYMBOL(pmic_audio_vcodec_enable_mixer); +EXPORT_SYMBOL(pmic_audio_vcodec_disable_mixer); +EXPORT_SYMBOL(pmic_audio_stdac_enable_mixer); +EXPORT_SYMBOL(pmic_audio_stdac_disable_mixer); +EXPORT_SYMBOL(pmic_audio_output_set_port); +EXPORT_SYMBOL(pmic_audio_output_get_port); +EXPORT_SYMBOL(pmic_audio_output_clear_port); +EXPORT_SYMBOL(pmic_audio_output_set_stereo_in_gain); +EXPORT_SYMBOL(pmic_audio_output_get_stereo_in_gain); +EXPORT_SYMBOL(pmic_audio_output_set_pgaGain); +EXPORT_SYMBOL(pmic_audio_output_get_pgaGain); +EXPORT_SYMBOL(pmic_audio_output_enable_mixer); +EXPORT_SYMBOL(pmic_audio_output_disable_mixer); +EXPORT_SYMBOL(pmic_audio_output_set_balance); +EXPORT_SYMBOL(pmic_audio_output_get_balance); +EXPORT_SYMBOL(pmic_audio_output_enable_mono_adder); +EXPORT_SYMBOL(pmic_audio_output_disable_mono_adder); +EXPORT_SYMBOL(pmic_audio_output_set_mono_adder_gain); +EXPORT_SYMBOL(pmic_audio_output_get_mono_adder_gain); +EXPORT_SYMBOL(pmic_audio_output_set_config); +EXPORT_SYMBOL(pmic_audio_output_clear_config); +EXPORT_SYMBOL(pmic_audio_output_get_config); +EXPORT_SYMBOL(pmic_audio_output_enable_phantom_ground); +EXPORT_SYMBOL(pmic_audio_output_disable_phantom_ground); +EXPORT_SYMBOL(pmic_audio_set_autodetect); +#ifdef DEBUG_AUDIO +EXPORT_SYMBOL(pmic_audio_dump_registers); +#endif /* DEBUG_AUDIO */ +/*! + * Define the minimum sampling rate (in Hz) that is supported by the + * Stereo DAC. + */ +const unsigned MIN_STDAC_SAMPLING_RATE_HZ = 8000; + +/*! + * Define the maximum sampling rate (in Hz) that is supported by the + * Stereo DAC. + */ +const unsigned MAX_STDAC_SAMPLING_RATE_HZ = 96000; + +/*! @def SET_BITS + * Set a register field to a given value. + */ +#define SET_BITS(reg, field, value) (((value) << reg.field.offset) & \ + reg.field.mask) +/*! @def GET_BITS + * Get the current value of a given register field. + */ +#define GET_BITS(reg, field, value) (((value) & reg.field.mask) >> \ + reg.field.offset) + +/*! + * @brief Define the possible states for a device handle. + * + * This enumeration is used to track the current state of each device handle. + */ +typedef enum { + HANDLE_FREE, /*!< Handle is available for use. */ + HANDLE_IN_USE /*!< Handle is currently in use. */ +} HANDLE_STATE; + +/*! + * @brief Identifies the hardware interrupt source. + * + * This enumeration identifies which of the possible hardware interrupt + * sources actually caused the current interrupt handler to be called. + */ +typedef enum { + CORE_EVENT_MC2BI, /*!< Microphone Bias 2 detect. */ + CORE_EVENT_HSDETI, /*!< Detect Headset attach */ + CORE_EVENT_HSLI, /*!< Detect Stereo Headset */ + CORE_EVENT_ALSPTHI, /*!< Detect Thermal shutdown of ALSP */ + CORE_EVENT_AHSSHORTI /*!< Detect Short circuit on AHS outputs */ +} PMIC_CORE_EVENT; + +/*! + * @brief This structure is used to track the state of a microphone input. + */ +typedef struct { + PMIC_AUDIO_INPUT_PORT mic; /*!< Microphone input port. */ + PMIC_AUDIO_INPUT_MIC_STATE micOnOff; /*!< Microphone On/Off state. */ + PMIC_AUDIO_MIC_AMP_MODE ampMode; /*!< Input amplifier mode. */ + PMIC_AUDIO_MIC_GAIN gain; /*!< Input amplifier gain level. */ +} PMIC_MICROPHONE_STATE; + +/*! + * @brief Tracks whether a headset is currently attached or not. + */ +typedef enum { + NO_HEADSET, /*!< No headset currently attached. */ + HEADSET_ON /*!< Headset has been attached. */ +} HEADSET_STATUS; + +/*! + * @brief mc13783 only enum that indicates the path to output taken + * by the voice codec output + */ +typedef enum { + VCODEC_DIRECT_OUT, /*!< Vcodec signal out direct */ + VCODEC_MIXER_OUT /*!< Output via the mixer */ +} PMIC_AUDIO_VCODEC_OUTPUT_PATH; + +/*! + * @brief This structure is used to define a specific hardware register field. + * + * All hardware register fields are defined using an offset to the LSB + * and a mask. The offset is used to right shift a register value before + * applying the mask to actually obtain the value of the field. + */ +typedef struct { + const unsigned char offset; /*!< Offset of LSB of register field. */ + const unsigned int mask; /*!< Mask value used to isolate register field. */ +} REGFIELD; + +/*! + * @brief This structure lists all fields of the AUD_CODEC hardware register. + */ +typedef struct { + REGFIELD CDCSSISEL; /*!< codec SSI bus select */ + REGFIELD CDCCLKSEL; /*!< Codec clock input select */ + REGFIELD CDCSM; /*!< Codec slave / master select */ + REGFIELD CDCBCLINV; /*!< Codec bitclock inversion */ + REGFIELD CDCFSINV; /*!< Codec framesync inversion */ + REGFIELD CDCFS; /*!< Bus protocol selection - 2 bits */ + REGFIELD CDCCLK; /*!< Codec clock setting - 3 bits */ + REGFIELD CDCFS8K16K; /*!< Codec framesync select */ + REGFIELD CDCEN; /*!< Codec enable */ + REGFIELD CDCCLKEN; /*!< Codec clocking enable */ + REGFIELD CDCTS; /*!< Codec SSI tristate */ + REGFIELD CDCDITH; /*!< Codec dithering */ + REGFIELD CDCRESET; /*!< Codec filter reset */ + REGFIELD CDCBYP; /*!< Codec bypass */ + REGFIELD CDCALM; /*!< Codec analog loopback */ + REGFIELD CDCDLM; /*!< Codec digital loopback */ + REGFIELD AUDIHPF; /*!< Transmit high pass filter enable */ + REGFIELD AUDOHPF; /*!< Receive high pass filter enable */ +} REGISTER_AUD_CODEC; + +/*! + * @brief This variable is used to access the AUD_CODEC hardware register. + * + * This variable defines how to access all of the fields within the + * AUD_CODEC hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_AUD_CODEC regAUD_CODEC = { + {0, 0x000001}, /* CDCSSISEL */ + {1, 0x000002}, /* CDCCLKSEL */ + {2, 0x000004}, /* CDCSM */ + {3, 0x000008}, /* CDCBCLINV */ + {4, 0x000010}, /* CDCFSINV */ + {5, 0x000060}, /* CDCFS */ + {7, 0x000380}, /* CDCCLK */ + {10, 0x000400}, /* CDCFS8K16K */ + {11, 0x000800}, /* CDCEN */ + {12, 0x001000}, /* CDCCLKEN */ + {13, 0x002000}, /* CDCTS */ + {14, 0x004000}, /* CDCDITH */ + {15, 0x008000}, /* CDCRESET */ + {16, 0x010000}, /* CDCBYP */ + {17, 0x020000}, /* CDCALM */ + {18, 0x040000}, /* CDCDLM */ + {19, 0x080000}, /* AUDIHPF */ + {20, 0x100000} /* AUDOHPF */ + /* Unused */ + /* Unused */ + /* Unused */ + +}; + +/*! + * @brief This structure lists all fields of the ST_DAC hardware register. + */ + /* VVV */ +typedef struct { + REGFIELD STDCSSISEL; /*!< Stereo DAC SSI bus select */ + REGFIELD STDCCLKSEL; /*!< Stereo DAC clock input select */ + REGFIELD STDCSM; /*!< Stereo DAC slave / master select */ + REGFIELD STDCBCLINV; /*!< Stereo DAC bitclock inversion */ + REGFIELD STDCFSINV; /*!< Stereo DAC framesync inversion */ + REGFIELD STDCFS; /*!< Bus protocol selection - 2 bits */ + REGFIELD STDCCLK; /*!< Stereo DAC clock setting - 3 bits */ + REGFIELD STDCFSDLYB; /*!< Stereo DAC framesync delay bar */ + REGFIELD STDCEN; /*!< Stereo DAC enable */ + REGFIELD STDCCLKEN; /*!< Stereo DAC clocking enable */ + REGFIELD STDCRESET; /*!< Stereo DAC filter reset */ + REGFIELD SPDIF; /*!< Stereo DAC SSI SPDIF mode. Mode no longer available. */ + REGFIELD SR; /*!< Stereo DAC sample rate - 4 bits */ +} REGISTER_ST_DAC; + +/*! + * @brief This variable is used to access the ST_DAC hardware register. + * + * This variable defines how to access all of the fields within the + * ST_DAC hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_ST_DAC regST_DAC = { + {0, 0x000001}, /* STDCSSISEL */ + {1, 0x000002}, /* STDCCLKSEL */ + {2, 0x000004}, /* STDCSM */ + {3, 0x000008}, /* STDCBCLINV */ + {4, 0x000010}, /* STDCFSINV */ + {5, 0x000060}, /* STDCFS */ + {7, 0x000380}, /* STDCCLK */ + {10, 0x000400}, /* STDCFSDLYB */ + {11, 0x000800}, /* STDCEN */ + {12, 0x001000}, /* STDCCLKEN */ + {15, 0x008000}, /* STDCRESET */ + {16, 0x010000}, /* SPDIF */ + {17, 0x1E0000} /* SR */ +}; + +/*! + * @brief This structure lists all of the fields in the SSI_NETWORK hardware register. + */ +typedef struct { + REGFIELD CDCTXRXSLOT; /*!< Codec timeslot assignment - 2 bits */ + REGFIELD CDCTXSECSLOT; /*!< Codec secondary transmit timeslot - 2 bits */ + REGFIELD CDCRXSECSLOT; /*!< Codec secondary receive timeslot - 2 bits */ + REGFIELD CDCRXSECGAIN; /*!< Codec secondary receive channel gain setting - 2 bits */ + REGFIELD CDCSUMGAIN; /*!< Codec summed receive signal gain setting */ + REGFIELD CDCFSDLY; /*!< Codec framesync delay */ + REGFIELD STDCSLOTS; /*!< Stereo DAC number of timeslots select - 2 bits */ + REGFIELD STDCRXSLOT; /*!< Stereo DAC timeslot assignment - 2 bits */ + REGFIELD STDCRXSECSLOT; /*!< Stereo DAC secondary receive timeslot - 2 bits */ + REGFIELD STDCRXSECGAIN; /*!< Stereo DAC secondary receive channel gain setting - 2 bits */ + REGFIELD STDCSUMGAIN; /*!< Stereo DAC summed receive signal gain setting */ +} REGISTER_SSI_NETWORK; + +/*! + * @brief This variable is used to access the SSI_NETWORK hardware register. + * + * This variable defines how to access all of the fields within the + * SSI_NETWORK hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_SSI_NETWORK regSSI_NETWORK = { + {2, 0x00000c}, /* CDCTXRXSLOT */ + {4, 0x000030}, /* CDCTXSECSLOT */ + {6, 0x0000c0}, /* CDCRXSECSLOT */ + {8, 0x000300}, /* CDCRXSECGAIN */ + {10, 0x000400}, /* CDCSUMGAIN */ + {11, 0x000800}, /* CDCFSDLY */ + {12, 0x003000}, /* STDCSLOTS */ + {14, 0x00c000}, /* STDCRXSLOT */ + {16, 0x030000}, /* STDCRXSECSLOT */ + {18, 0x0c0000}, /* STDCRXSECGAIN */ + {20, 0x100000} /* STDCSUMGAIN */ +}; + +/*! + * @brief This structure lists all fields of the AUDIO_TX hardware register. + * + * + */ +typedef struct { + REGFIELD MC1BEN; /*!< Microphone bias 1 enable */ + REGFIELD MC2BEN; /*!< Microphone bias 2 enable */ + REGFIELD MC2BDETDBNC; /*!< Microphone bias detect debounce setting */ + REGFIELD MC2BDETEN; /*!< Microphone bias 2 detect enable */ + REGFIELD AMC1REN; /*!< Amplifier Amc1R enable */ + REGFIELD AMC1RITOV; /*!< Amplifier Amc1R current to voltage mode enable */ + REGFIELD AMC1LEN; /*!< Amplifier Amc1L enable */ + REGFIELD AMC1LITOV; /*!< Amplifier Amc1L current to voltage mode enable */ + REGFIELD AMC2EN; /*!< Amplifier Amc2 enable */ + REGFIELD AMC2ITOV; /*!< Amplifier Amc2 current to voltage mode enable */ + REGFIELD ATXINEN; /*!< Amplifier Atxin enable */ + REGFIELD ATXOUTEN; /*!< Reserved for output TXOUT enable, currently not used */ + REGFIELD RXINREC; /*!< RXINR/RXINL to voice CODEC ADC routing enable */ + REGFIELD PGATXR; /*!< Transmit gain setting right - 5 bits */ + REGFIELD PGATXL; /*!< Transmit gain setting left - 5 bits */ +} REGISTER_AUDIO_TX; + +/*! + * @brief This variable is used to access the AUDIO_TX hardware register. + * + * This variable defines how to access all of the fields within the + * AUDIO_TX hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_AUDIO_TX regAUDIO_TX = { + {0, 0x000001}, /* MC1BEN */ + {1, 0x000002}, /* MC2BEN */ + {2, 0x000004}, /* MC2BDETDBNC */ + {3, 0x000008}, /* MC2BDETEN */ + {5, 0x000020}, /* AMC1REN */ + {6, 0x000040}, /* AMC1RITOV */ + {7, 0x000080}, /* AMC1LEN */ + {8, 0x000100}, /* AMC1LITOV */ + {9, 0x000200}, /* AMC2EN */ + {10, 0x000400}, /* AMC2ITOV */ + {11, 0x000800}, /* ATXINEN */ + {12, 0x001000}, /* ATXOUTEN */ + {13, 0x002000}, /* RXINREC */ + {14, 0x07c000}, /* PGATXR */ + {19, 0xf80000} /* PGATXL */ +}; + +/*! + * @brief This structure lists all fields of the AUDIO_RX_0 hardware register. + */ +typedef struct { + REGFIELD VAUDIOON; /*!< Forces VAUDIO in active on mode */ + REGFIELD BIASEN; /*!< Audio bias enable */ + REGFIELD BIASSPEED; /*!< Turn on ramp speed of the audio bias */ + REGFIELD ASPEN; /*!< Amplifier Asp enable */ + REGFIELD ASPSEL; /*!< Asp input selector */ + REGFIELD ALSPEN; /*!< Amplifier Alsp enable */ + REGFIELD ALSPREF; /*!< Bias Alsp at common audio reference */ + REGFIELD ALSPSEL; /*!< Alsp input selector */ + REGFIELD LSPLEN; /*!< Output LSPL enable */ + REGFIELD AHSREN; /*!< Amplifier AhsR enable */ + REGFIELD AHSLEN; /*!< Amplifier AhsL enable */ + REGFIELD AHSSEL; /*!< Ahsr and Ahsl input selector */ + REGFIELD HSPGDIS; /*!< Phantom ground disable */ + REGFIELD HSDETEN; /*!< Headset detect enable */ + REGFIELD HSDETAUTOB; /*!< Amplifier state determined by headset detect */ + REGFIELD ARXOUTREN; /*!< Output RXOUTR enable */ + REGFIELD ARXOUTLEN; /*!< Output RXOUTL enable */ + REGFIELD ARXOUTSEL; /*!< Arxout input selector */ + REGFIELD CDCOUTEN; /*!< Output CDCOUT enable */ + REGFIELD HSLDETEN; /*!< Headset left channel detect enable */ + REGFIELD ADDCDC; /*!< Adder channel codec selection */ + REGFIELD ADDSTDC; /*!< Adder channel stereo DAC selection */ + REGFIELD ADDRXIN; /*!< Adder channel line in selection */ +} REGISTER_AUDIO_RX_0; + +/*! + * @brief This variable is used to access the AUDIO_RX_0 hardware register. + * + * This variable defines how to access all of the fields within the + * AUDIO_RX_0 hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_AUDIO_RX_0 regAUDIO_RX_0 = { + {0, 0x000001}, /* VAUDIOON */ + {1, 0x000002}, /* BIASEN */ + {2, 0x000004}, /* BIASSPEED */ + {3, 0x000008}, /* ASPEN */ + {4, 0x000010}, /* ASPSEL */ + {5, 0x000020}, /* ALSPEN */ + {6, 0x000040}, /* ALSPREF */ + {7, 0x000080}, /* ALSPSEL */ + {8, 0x000100}, /* LSPLEN */ + {9, 0x000200}, /* AHSREN */ + {10, 0x000400}, /* AHSLEN */ + {11, 0x000800}, /* AHSSEL */ + {12, 0x001000}, /* HSPGDIS */ + {13, 0x002000}, /* HSDETEN */ + {14, 0x004000}, /* HSDETAUTOB */ + {15, 0x008000}, /* ARXOUTREN */ + {16, 0x010000}, /* ARXOUTLEN */ + {17, 0x020000}, /* ARXOUTSEL */ + {18, 0x040000}, /* CDCOUTEN */ + {19, 0x080000}, /* HSLDETEN */ + {21, 0x200000}, /* ADDCDC */ + {22, 0x400000}, /* ADDSTDC */ + {23, 0x800000} /* ADDRXIN */ +}; + +/*! + * @brief This structure lists all fields of the AUDIO_RX_1 hardware register. + */ +typedef struct { + REGFIELD PGARXEN; /*!< Codec receive PGA enable */ + REGFIELD PGARX; /*!< Codec receive gain setting - 4 bits */ + REGFIELD PGASTEN; /*!< Stereo DAC PGA enable */ + REGFIELD PGAST; /*!< Stereo DAC gain setting - 4 bits */ + REGFIELD ARXINEN; /*!< Amplifier Arx enable */ + REGFIELD ARXIN; /*!< Amplifier Arx additional gain setting */ + REGFIELD PGARXIN; /*!< PGArxin gain setting - 4 bits */ + REGFIELD MONO; /*!< Mono adder setting - 2 bits */ + REGFIELD BAL; /*!< Balance control - 3 bits */ + REGFIELD BALLR; /*!< Left / right balance */ +} REGISTER_AUDIO_RX_1; + +/*! + * @brief This variable is used to access the AUDIO_RX_1 hardware register. + * + * This variable defines how to access all of the fields within the + * AUDIO_RX_1 hardware register. The initial values consist of the offset + * and mask values needed to access each of the register fields. + */ +static const REGISTER_AUDIO_RX_1 regAUDIO_RX_1 = { + {0, 0x000001}, /* PGARXEN */ + {1, 0x00001e}, /* PGARX */ + {5, 0x000020}, /* PGASTEN */ + {6, 0x0003c0}, /* PGAST */ + {10, 0x000400}, /* ARXINEN */ + {11, 0x000800}, /* ARXIN */ + {12, 0x00f000}, /* PGARXIN */ + {16, 0x030000}, /* MONO */ + {18, 0x1c0000}, /* BAL */ + {21, 0x200000} /* BALLR */ +}; + +/*! Define a mask to access the entire hardware register. */ +static const unsigned int REG_FULLMASK = 0xffffff; + +/*! Reset value for the AUD_CODEC register. */ +static const unsigned int RESET_AUD_CODEC = 0x180027; + +/*! Reset value for the ST_DAC register. + * + * Note that we avoid resetting any of the arbitration bits. + */ +static const unsigned int RESET_ST_DAC = 0x0E0004; + +/*! Reset value for the SSI_NETWORK register. */ +static const unsigned int RESET_SSI_NETWORK = 0x013060; + +/*! Reset value for the AUDIO_TX register. + * + * Note that we avoid resetting any of the arbitration bits. + */ +static const unsigned int RESET_AUDIO_TX = 0x420000; + +/*! Reset value for the AUDIO_RX_0 register. */ +static const unsigned int RESET_AUDIO_RX_0 = 0x001000; + +/*! Reset value for the AUDIO_RX_1 register. */ +static const unsigned int RESET_AUDIO_RX_1 = 0x00D35A; + +/*! Reset mask for the SSI network Vcodec part. first 12 bits + * 0 - 11 */ +static const unsigned int REG_SSI_VCODEC_MASK = 0x000fff; + +/*! Reset mask for the SSI network STDAC part. last 12 bits + * 12 - 24 */ +static const unsigned int REG_SSI_STDAC_MASK = 0xfff000; + +/*! Constant NULL value for initializing/reseting the audio handles. */ +static const PMIC_AUDIO_HANDLE AUDIO_HANDLE_NULL = (PMIC_AUDIO_HANDLE) NULL; + +/*! + * @brief This structure maintains the current state of the Stereo DAC. + */ +typedef struct { + PMIC_AUDIO_HANDLE handle; /*!< Handle used to access + the Stereo DAC. */ + HANDLE_STATE handleState; /*!< Current handle state. */ + PMIC_AUDIO_DATA_BUS busID; /*!< Data bus used to access + the Stereo DAC. */ + bool protocol_set; + PMIC_AUDIO_BUS_PROTOCOL protocol; /*!< Data bus protocol. */ + PMIC_AUDIO_BUS_MODE masterSlave; /*!< Master/Slave mode + select. */ + PMIC_AUDIO_NUMSLOTS numSlots; /*!< Number of timeslots + used. */ + PMIC_AUDIO_CALLBACK callback; /*!< Event notification + callback function + pointer. */ + PMIC_AUDIO_EVENTS eventMask; /*!< Event notification mask. */ + PMIC_AUDIO_CLOCK_IN_SOURCE clockIn; /*!< Stereo DAC clock input + source select. */ + PMIC_AUDIO_STDAC_SAMPLING_RATE samplingRate; /*!< Stereo DAC sampling rate + select. */ + PMIC_AUDIO_STDAC_CLOCK_IN_FREQ clockFreq; /*!< Stereo DAC clock input + frequency. */ + PMIC_AUDIO_CLOCK_INVERT invert; /*!< Stereo DAC clock signal + invert select. */ + PMIC_AUDIO_STDAC_TIMESLOTS timeslot; /*!< Stereo DAC data + timeslots select. */ + PMIC_AUDIO_STDAC_CONFIG config; /*!< Stereo DAC configuration + options. */ +} PMIC_AUDIO_STDAC_STATE; + +/*! + * @brief This variable maintains the current state of the Stereo DAC. + * + * This variable tracks the current state of the Stereo DAC audio hardware + * along with any information that is required by the device driver to + * manage the hardware (e.g., callback functions and event notification + * masks). + * + * The initial values represent the reset/power on state of the Stereo DAC. + */ +static PMIC_AUDIO_STDAC_STATE stDAC = { + (PMIC_AUDIO_HANDLE) NULL, /* handle */ + HANDLE_FREE, /* handleState */ + AUDIO_DATA_BUS_1, /* busID */ + false, + NORMAL_MSB_JUSTIFIED_MODE, /* protocol */ + BUS_MASTER_MODE, /* masterSlave */ + USE_2_TIMESLOTS, /* numSlots */ + (PMIC_AUDIO_CALLBACK) NULL, /* callback */ + (PMIC_AUDIO_EVENTS) NULL, /* eventMask */ + CLOCK_IN_CLIA, /* clockIn */ + STDAC_RATE_44_1_KHZ, /* samplingRate */ + STDAC_CLI_13MHZ, /* clockFreq */ + NO_INVERT, /* invert */ + USE_TS0_TS1, /* timeslot */ + (PMIC_AUDIO_STDAC_CONFIG) 0 /* config */ +}; + +/*! + * @brief This structure maintains the current state of the Voice CODEC. + */ +typedef struct { + PMIC_AUDIO_HANDLE handle; /*!< Handle used to access + the Voice CODEC. */ + HANDLE_STATE handleState; /*!< Current handle state. */ + PMIC_AUDIO_DATA_BUS busID; /*!< Data bus used to access + the Voice CODEC. */ + bool protocol_set; + PMIC_AUDIO_BUS_PROTOCOL protocol; /*!< Data bus protocol. */ + PMIC_AUDIO_BUS_MODE masterSlave; /*!< Master/Slave mode + select. */ + PMIC_AUDIO_NUMSLOTS numSlots; /*!< Number of timeslots + used. */ + PMIC_AUDIO_CALLBACK callback; /*!< Event notification + callback function + pointer. */ + PMIC_AUDIO_EVENTS eventMask; /*!< Event notification + mask. */ + PMIC_AUDIO_CLOCK_IN_SOURCE clockIn; /*!< Voice CODEC clock input + source select. */ + PMIC_AUDIO_VCODEC_SAMPLING_RATE samplingRate; /*!< Voice CODEC sampling + rate select. */ + PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ clockFreq; /*!< Voice CODEC clock input + frequency. */ + PMIC_AUDIO_CLOCK_INVERT invert; /*!< Voice CODEC clock + signal invert select. */ + PMIC_AUDIO_VCODEC_TIMESLOT timeslot; /*!< Voice CODEC data + timeslot select. */ + PMIC_AUDIO_VCODEC_TIMESLOT secondaryTXtimeslot; + + PMIC_AUDIO_VCODEC_CONFIG config; /*!< Voice CODEC + configuration + options. */ + PMIC_MICROPHONE_STATE leftChannelMic; /*!< Left channel + microphone + configuration. */ + PMIC_MICROPHONE_STATE rightChannelMic; /*!< Right channel + microphone + configuration. */ +} PMIC_AUDIO_VCODEC_STATE; + +/*! + * @brief This variable maintains the current state of the Voice CODEC. + * + * This variable tracks the current state of the Voice CODEC audio hardware + * along with any information that is required by the device driver to + * manage the hardware (e.g., callback functions and event notification + * masks). + * + * The initial values represent the reset/power on state of the Voice CODEC. + */ +static PMIC_AUDIO_VCODEC_STATE vCodec = { + (PMIC_AUDIO_HANDLE) NULL, /* handle */ + HANDLE_FREE, /* handleState */ + AUDIO_DATA_BUS_2, /* busID */ + false, + NETWORK_MODE, /* protocol */ + BUS_SLAVE_MODE, /* masterSlave */ + USE_4_TIMESLOTS, /* numSlots */ + (PMIC_AUDIO_CALLBACK) NULL, /* callback */ + (PMIC_AUDIO_EVENTS) NULL, /* eventMask */ + CLOCK_IN_CLIB, /* clockIn */ + VCODEC_RATE_8_KHZ, /* samplingRate */ + VCODEC_CLI_13MHZ, /* clockFreq */ + NO_INVERT, /* invert */ + USE_TS0, /* timeslot pri */ + USE_TS2, /* timeslot sec TX */ + INPUT_HIGHPASS_FILTER | OUTPUT_HIGHPASS_FILTER, /* config */ + /* leftChannelMic */ + {NO_MIC, /* mic */ + MICROPHONE_OFF, /* micOnOff */ + AMP_OFF, /* ampMode */ + MIC_GAIN_0DB /* gain */ + }, + /* rightChannelMic */ + {NO_MIC, /* mic */ + MICROPHONE_OFF, /* micOnOff */ + AMP_OFF, /* ampMode */ + MIC_GAIN_0DB /* gain */ + } +}; + +/*! + * @brief This maintains the current state of the External Stereo Input. + */ +typedef struct { + PMIC_AUDIO_HANDLE handle; /*!< Handle used to access the + External Stereo Inputs. */ + HANDLE_STATE handleState; /*!< Current handle state. */ + PMIC_AUDIO_CALLBACK callback; /*!< Event notification callback + function pointer. */ + PMIC_AUDIO_EVENTS eventMask; /*!< Event notification mask. */ + PMIC_AUDIO_STEREO_IN_GAIN inputGain; /*!< External Stereo Input + amplifier gain level. */ +} PMIC_AUDIO_EXT_STEREO_IN_STATE; + +/*! + * @brief This maintains the current state of the External Stereo Input. + * + * This variable tracks the current state of the External Stereo Input audio + * hardware along with any information that is required by the device driver + * to manage the hardware (e.g., callback functions and event notification + * masks). + * + * The initial values represent the reset/power on state of the External + * Stereo Input. + */ +static PMIC_AUDIO_EXT_STEREO_IN_STATE extStereoIn = { + (PMIC_AUDIO_HANDLE) NULL, /* handle */ + HANDLE_FREE, /* handleState */ + (PMIC_AUDIO_CALLBACK) NULL, /* callback */ + (PMIC_AUDIO_EVENTS) NULL, /* eventMask */ + STEREO_IN_GAIN_0DB /* inputGain */ +}; + +/*! + * @brief This maintains the current state of the callback & Eventmask. + */ +typedef struct { + PMIC_AUDIO_CALLBACK callback; /*!< Event notification callback + function pointer. */ + PMIC_AUDIO_EVENTS eventMask; /*!< Event notification mask. */ +} PMIC_AUDIO_EVENT_STATE; + +static PMIC_AUDIO_EVENT_STATE event_state = { + (PMIC_AUDIO_CALLBACK) NULL, /*Callback */ + (PMIC_AUDIO_EVENTS) NULL, /* EventMask */ + +}; + +/*! + * @brief This maintains the current state of the Audio Output Section. + */ +typedef struct { + PMIC_AUDIO_OUTPUT_PORT outputPort; /*!< Current audio + output port. */ + PMIC_AUDIO_OUTPUT_PGA_GAIN vCodecoutputPGAGain; /*!< Output PGA gain + level codec */ + PMIC_AUDIO_OUTPUT_PGA_GAIN stDacoutputPGAGain; /*!< Output PGA gain + level stDAC */ + PMIC_AUDIO_OUTPUT_PGA_GAIN extStereooutputPGAGain; /*!< Output PGA gain + level stereo ext */ + PMIC_AUDIO_OUTPUT_BALANCE_GAIN balanceLeftGain; /*!< Left channel + balance gain + level. */ + PMIC_AUDIO_OUTPUT_BALANCE_GAIN balanceRightGain; /*!< Right channel + balance gain + level. */ + PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN monoAdderGain; /*!< Mono adder gain + level. */ + PMIC_AUDIO_OUTPUT_CONFIG config; /*!< Audio output + section config + options. */ + PMIC_AUDIO_VCODEC_OUTPUT_PATH vCodecOut; + +} PMIC_AUDIO_AUDIO_OUTPUT_STATE; + +/*! + * @brief This variable maintains the current state of the Audio Output Section. + * + * This variable tracks the current state of the Audio Output Section. + * + * The initial values represent the reset/power on state of the Audio + * Output Section. + */ +static PMIC_AUDIO_AUDIO_OUTPUT_STATE audioOutput = { + (PMIC_AUDIO_OUTPUT_PORT) NULL, /* outputPort */ + OUTPGA_GAIN_0DB, /* outputPGAGain */ + OUTPGA_GAIN_0DB, /* outputPGAGain */ + OUTPGA_GAIN_0DB, /* outputPGAGain */ + BAL_GAIN_0DB, /* balanceLeftGain */ + BAL_GAIN_0DB, /* balanceRightGain */ + MONOADD_GAIN_0DB, /* monoAdderGain */ + (PMIC_AUDIO_OUTPUT_CONFIG) 0, /* config */ + VCODEC_DIRECT_OUT +}; + +/*! The current headset status. */ +static HEADSET_STATUS headsetState = NO_HEADSET; + +/* Removed PTT variable */ +/*! Define a 1 ms wait interval that is needed to ensure that certain + * hardware operations are successfully completed. + */ +static const unsigned long delay_1ms = (HZ / 1000); + +/*! + * @brief This spinlock is used to provide mutual exclusion. + * + * Create a spinlock that can be used to provide mutually exclusive + * read/write access to the globally accessible data structures + * that were defined above. Mutually exclusive access is required to + * ensure that the audio data structures are consistent at all times + * when possibly accessed by multiple threads of execution (for example, + * while simultaneously handling a user request and an interrupt event). + * + * We need to use a spinlock whenever we do need to provide mutual + * exclusion while possibly executing in a hardware interrupt context. + * Spinlocks should be held for the minimum time that is necessary + * because hardware interrupts are disabled while a spinlock is held. + * + */ + +static spinlock_t lock = SPIN_LOCK_UNLOCKED; +/*! + * @brief This mutex is used to provide mutual exclusion. + * + * Create a mutex that can be used to provide mutually exclusive + * read/write access to the globally accessible data structures + * that were defined above. Mutually exclusive access is required to + * ensure that the audio data structures are consistent at all times + * when possibly accessed by multiple threads of execution. + * + * Note that we use a mutex instead of the spinlock whenever disabling + * interrupts while in the critical section is not required. This helps + * to minimize kernel interrupt handling latency. + */ +static DECLARE_MUTEX(mutex); + +/*! + * @brief Global variable to track currently active interrupt events. + * + * This global variable is used to keep track of all of the currently + * active interrupt events for the audio driver. Note that access to this + * variable may occur while within an interrupt context and, therefore, + * must be guarded by using a spinlock. + */ +/* static PMIC_CORE_EVENT eventID = 0; */ + +/* Prototypes for all static audio driver functions. */ +/* +static PMIC_STATUS pmic_audio_mic_boost_enable(void); +static PMIC_STATUS pmic_audio_mic_boost_disable(void);*/ +static PMIC_STATUS pmic_audio_close_handle(const PMIC_AUDIO_HANDLE handle); +static PMIC_STATUS pmic_audio_reset_device(const PMIC_AUDIO_HANDLE handle); + +static PMIC_STATUS pmic_audio_deregister(void *callback, + PMIC_AUDIO_EVENTS * const eventMask); + +/************************************************************************* + * Audio device access APIs. + ************************************************************************* + */ + +/*! + * @name General Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Audio + * hardware. + */ +/*@{*/ + +PMIC_STATUS pmic_audio_set_autodetect(int val) +{ + PMIC_STATUS status; + unsigned int reg_mask = 0, reg_write = 0; + reg_mask = SET_BITS(regAUDIO_RX_0, VAUDIOON, 1); + status = pmic_write_reg(REG_AUDIO_RX_0, reg_mask, reg_mask); + if (status != PMIC_SUCCESS) + return status; + reg_mask = 0; + if (val == 1) { + reg_write = SET_BITS(regAUDIO_RX_0, HSDETEN, 1) | + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + } else { + reg_write = 0; + } + reg_mask = + SET_BITS(regAUDIO_RX_0, HSDETEN, 1) | SET_BITS(regAUDIO_RX_0, + HSDETAUTOB, 1); + status = pmic_write_reg(REG_AUDIO_RX_0, reg_write, reg_mask); + + return status; +} + +/*! + * @brief Request exclusive access to the PMIC Audio hardware. + * + * Attempt to open and gain exclusive access to a key PMIC audio hardware + * component (e.g., the Stereo DAC or the Voice CODEC). Depending upon the + * type of audio operation that is desired and the nature of the audio data + * stream, the Stereo DAC and/or the Voice CODEC will be a required hardware + * component and needs to be acquired by calling this function. + * + * If the open request is successful, then a numeric handle is returned + * and this handle must be used in all subsequent function calls to complete + * the configuration of either the Stereo DAC or the Voice CODEC and along + * with any other associated audio hardware components that will be needed. + * + * The same handle must also be used in the close call when use of the PMIC + * audio hardware is no longer required. + * + * The open request will fail if the requested audio hardware component has + * already been acquired by a previous open call but not yet closed. + * + * @param handle Device handle to be used for subsequent PMIC + * audio API calls. + * @param device The required PMIC audio hardware component. + * + * @retval PMIC_SUCCESS If the open request was successful + * @retval PMIC_PARAMETER_ERROR If the handle argument is NULL. + * @retval PMIC_ERROR If the audio hardware component is + * unavailable. + */ +PMIC_STATUS pmic_audio_open(PMIC_AUDIO_HANDLE * const handle, + const PMIC_AUDIO_SOURCE device) +{ + PMIC_STATUS rc = PMIC_ERROR; + + if (handle == (PMIC_AUDIO_HANDLE *) NULL) { + /* Do not dereference a NULL pointer. */ + return PMIC_PARAMETER_ERROR; + } + + /* We only need to acquire a mutex here because the interrupt handler + * never modifies the device handle or device handle state. Therefore, + * we don't need to worry about conflicts with the interrupt handler + * or the need to execute in an interrupt context. + * + * But we do need a critical section here to avoid problems in case + * multiple calls to pmic_audio_open() are made since we can only allow + * one of them to succeed. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* Check the current device handle state and acquire the handle if + * it is available. + */ + + if ((device == STEREO_DAC) && (stDAC.handleState == HANDLE_FREE)) { + stDAC.handle = (PMIC_AUDIO_HANDLE) (&stDAC); + stDAC.handleState = HANDLE_IN_USE; + *handle = stDAC.handle; + rc = PMIC_SUCCESS; + } else if ((device == VOICE_CODEC) + && (vCodec.handleState == HANDLE_FREE)) { + vCodec.handle = (PMIC_AUDIO_HANDLE) (&vCodec); + vCodec.handleState = HANDLE_IN_USE; + *handle = vCodec.handle; + rc = PMIC_SUCCESS; + } else if ((device == EXTERNAL_STEREO_IN) && + (extStereoIn.handleState == HANDLE_FREE)) { + extStereoIn.handle = (PMIC_AUDIO_HANDLE) (&extStereoIn); + extStereoIn.handleState = HANDLE_IN_USE; + *handle = extStereoIn.handle; + rc = PMIC_SUCCESS; + } else { + *handle = AUDIO_HANDLE_NULL; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Terminate further access to the PMIC audio hardware. + * + * Terminate further access to the PMIC audio hardware that was previously + * acquired by calling pmic_audio_open(). This now allows another thread to + * successfully call pmic_audio_open() to gain access. + * + * Note that we will shutdown/reset the Voice CODEC or Stereo DAC as well as + * any associated audio input/output components that are no longer required. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the close request was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_close(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* We need a critical section here to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* We can now call pmic_audio_close_handle() to actually do the work. */ + rc = pmic_audio_close_handle(handle); + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Configure the data bus protocol to be used. + * + * Provide the parameters needed to properly configure the audio data bus + * protocol so that data can be read/written to either the Stereo DAC or + * the Voice CODEC. + * + * @param handle Device handle from pmic_audio_open() call. + * @param busID Select data bus to be used. + * @param protocol Select the data bus protocol. + * @param masterSlave Select the data bus timing mode. + * @param numSlots Define the number of timeslots (only if in + * master mode). + * + * @retval PMIC_SUCCESS If the protocol was successful configured. + * @retval PMIC_PARAMETER_ERROR If the handle or the protocol parameters + * are invalid. + */ +PMIC_STATUS pmic_audio_set_protocol(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_DATA_BUS busID, + const PMIC_AUDIO_BUS_PROTOCOL protocol, + const PMIC_AUDIO_BUS_MODE masterSlave, + const PMIC_AUDIO_NUMSLOTS numSlots) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int ST_DAC_MASK = SET_BITS(regST_DAC, STDCSSISEL, 1) | + SET_BITS(regST_DAC, STDCFS, 3) | SET_BITS(regST_DAC, STDCSM, 1); + + unsigned int reg_mask; + /*unsigned int VCODEC_MASK = SET_BITS(regAUD_CODEC, CDCSSISEL, 1) | + SET_BITS(regAUD_CODEC, CDCFS, 3) | SET_BITS(regAUD_CODEC, CDCSM, 1); */ + + unsigned int SSI_NW_MASK = SET_BITS(regSSI_NETWORK, STDCSLOTS, 1); + unsigned int reg_value = 0; + unsigned int ssi_nw_value = 0; + + /* Enter a critical section so that we can ensure only one + * state change request is completed at a time. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (handle == (PMIC_AUDIO_HANDLE) NULL) { + rc = PMIC_PARAMETER_ERROR; + } else { + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + if ((stDAC.handleState == HANDLE_IN_USE) && + (stDAC.busID == busID) && (stDAC.protocol_set)) { + pr_debug("The requested bus already in USE\n"); + rc = PMIC_PARAMETER_ERROR; + } else if ((masterSlave == BUS_MASTER_MODE) + && (numSlots != USE_4_TIMESLOTS)) { + pr_debug + ("mc13783 supports only 4 slots in Master mode\n"); + rc = PMIC_NOT_SUPPORTED; + } else if ((masterSlave == BUS_SLAVE_MODE) + && (numSlots != USE_4_TIMESLOTS)) { + pr_debug + ("Driver currently supports only 4 slots in Slave mode\n"); + rc = PMIC_NOT_SUPPORTED; + } else if (!((protocol == NETWORK_MODE) || + (protocol == I2S_MODE))) { + pr_debug + ("mc13783 Voice codec works only in Network and I2S modes\n"); + rc = PMIC_NOT_SUPPORTED; + } else { + pr_debug + ("Proceeding to configure Voice Codec\n"); + if (busID == AUDIO_DATA_BUS_1) { + reg_value = + SET_BITS(regAUD_CODEC, CDCSSISEL, + 0); + } else { + reg_value = + SET_BITS(regAUD_CODEC, CDCSSISEL, + 1); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCSSISEL, 1); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + + if (masterSlave == BUS_MASTER_MODE) { + reg_value = + SET_BITS(regAUD_CODEC, CDCSM, 0); + } else { + reg_value = + SET_BITS(regAUD_CODEC, CDCSM, 1); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCSM, 1); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + + if (protocol == NETWORK_MODE) { + reg_value = + SET_BITS(regAUD_CODEC, CDCFS, 1); + } else { /* protocol == I2S, other options have been already eliminated */ + reg_value = + SET_BITS(regAUD_CODEC, CDCFS, 2); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCFS, 3); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + + ssi_nw_value = + SET_BITS(regSSI_NETWORK, CDCFSDLY, 1); + /*if (pmic_write_reg + (REG_AUDIO_CODEC, reg_value, + VCODEC_MASK) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { */ + vCodec.busID = busID; + vCodec.protocol = protocol; + vCodec.masterSlave = masterSlave; + vCodec.numSlots = numSlots; + vCodec.protocol_set = true; + //pmic_write_reg(REG_AUDIO_SSI_NETWORK, ssi_nw_value, ssi_nw_value); + + pr_debug + ("mc13783 Voice codec successfully configured\n"); + rc = PMIC_SUCCESS; + //} + + } + + } else if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) { + if ((vCodec.handleState == HANDLE_IN_USE) && + (vCodec.busID == busID) && (vCodec.protocol_set)) { + pr_debug("The requested bus already in USE\n"); + rc = PMIC_PARAMETER_ERROR; + } else if (((protocol == NORMAL_MSB_JUSTIFIED_MODE) || + (protocol == I2S_MODE)) + && (numSlots != USE_2_TIMESLOTS)) { + pr_debug + ("STDAC uses only 2 slots in Normal and I2S modes\n"); + rc = PMIC_PARAMETER_ERROR; + } else if ((protocol == NETWORK_MODE) && + !((numSlots == USE_2_TIMESLOTS) || + (numSlots == USE_4_TIMESLOTS) || + (numSlots == USE_8_TIMESLOTS))) { + pr_debug + ("STDAC uses only 2,4 or 8 slots in Network mode\n"); + rc = PMIC_PARAMETER_ERROR; + } else if (protocol == SPD_IF_MODE) { + pr_debug + ("STDAC driver currently does not support SPD IF mode\n"); + rc = PMIC_NOT_SUPPORTED; + } else { + pr_debug + ("Proceeding to configure Stereo DAC\n"); + if (busID == AUDIO_DATA_BUS_1) { + reg_value = + SET_BITS(regST_DAC, STDCSSISEL, 0); + } else { + reg_value = + SET_BITS(regST_DAC, STDCSSISEL, 1); + } + if (masterSlave == BUS_MASTER_MODE) { + reg_value |= + SET_BITS(regST_DAC, STDCSM, 0); + } else { + reg_value |= + SET_BITS(regST_DAC, STDCSM, 1); + } + if (protocol == NETWORK_MODE) { + reg_value |= + SET_BITS(regST_DAC, STDCFS, 1); + } else if (protocol == + NORMAL_MSB_JUSTIFIED_MODE) { + reg_value |= + SET_BITS(regST_DAC, STDCFS, 0); + } else { /* I2S mode as the other option has already been eliminated */ + reg_value |= + SET_BITS(regST_DAC, STDCFS, 2); + } + + if (pmic_write_reg + (REG_AUDIO_STEREO_DAC, + reg_value, ST_DAC_MASK) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + if (numSlots == USE_2_TIMESLOTS) { + reg_value = + SET_BITS(regSSI_NETWORK, + STDCSLOTS, 3); + } else if (numSlots == USE_4_TIMESLOTS) { + reg_value = + SET_BITS(regSSI_NETWORK, + STDCSLOTS, 2); + } else { /* Use 8 timeslots - L , R and 6 other */ + reg_value = + SET_BITS(regSSI_NETWORK, + STDCSLOTS, 1); + } + if (pmic_write_reg + (REG_AUDIO_SSI_NETWORK, + reg_value, + SSI_NW_MASK) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + stDAC.busID = busID; + stDAC.protocol = protocol; + stDAC.protocol_set = true; + stDAC.masterSlave = masterSlave; + stDAC.numSlots = numSlots; + pr_debug + ("mc13783 Stereo DAC successfully configured\n"); + rc = PMIC_SUCCESS; + } + } + + } + } else { + rc = PMIC_PARAMETER_ERROR; + /* Handle can only be Voice Codec or Stereo DAC */ + pr_debug("Handles only STDAC and VCODEC\n"); + } + + } + /* Exit critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Retrieve the current data bus protocol configuration. + * + * Retrieve the parameters that define the current audio data bus protocol. + * + * @param handle Device handle from pmic_audio_open() call. + * @param busID The data bus being used. + * @param protocol The data bus protocol being used. + * @param masterSlave The data bus timing mode being used. + * @param numSlots The number of timeslots being used (if in + * master mode). + * + * @retval PMIC_SUCCESS If the protocol was successful retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_get_protocol(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_DATA_BUS * const busID, + PMIC_AUDIO_BUS_PROTOCOL * const protocol, + PMIC_AUDIO_BUS_MODE * const masterSlave, + PMIC_AUDIO_NUMSLOTS * const numSlots) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + if ((busID != (PMIC_AUDIO_DATA_BUS *) NULL) && + (protocol != (PMIC_AUDIO_BUS_PROTOCOL *) NULL) && + (masterSlave != (PMIC_AUDIO_BUS_MODE *) NULL) && + (numSlots != (PMIC_AUDIO_NUMSLOTS *) NULL)) { + /* Enter a critical section so that we return a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) { + *busID = stDAC.busID; + *protocol = stDAC.protocol; + *masterSlave = stDAC.masterSlave; + *numSlots = stDAC.numSlots; + rc = PMIC_SUCCESS; + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + *busID = vCodec.busID; + *protocol = vCodec.protocol; + *masterSlave = vCodec.masterSlave; + *numSlots = vCodec.numSlots; + rc = PMIC_SUCCESS; + } + + /* Exit critical section. */ + up(&mutex); + } + + return rc; +} + +/*! + * @brief Enable the Stereo DAC or the Voice CODEC. + * + * Explicitly enable the Stereo DAC or the Voice CODEC to begin audio + * playback or recording as required. This should only be done after + * successfully configuring all of the associated audio components (e.g., + * microphones, amplifiers, etc.). + * + * Note that the timed delays used in this function are necessary to + * ensure reliable operation of the Voice CODEC and Stereo DAC. The + * Stereo DAC seems to be particularly sensitive and it has been observed + * to fail to generate the required master mode clock signals if it is + * not allowed enough time to initialize properly. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the device was successful enabled. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the device could not be enabled. + */ +PMIC_STATUS pmic_audio_enable(const PMIC_AUDIO_HANDLE handle) +{ + const unsigned int AUDIO_BIAS_ENABLE = SET_BITS(regAUDIO_RX_0, + VAUDIOON, 1); + const unsigned int STDAC_ENABLE = SET_BITS(regST_DAC, STDCEN, 1); + const unsigned int VCODEC_ENABLE = SET_BITS(regAUD_CODEC, CDCEN, 1); + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + pmic_write_reg(REG_AUDIO_RX_0, AUDIO_BIAS_ENABLE, + AUDIO_BIAS_ENABLE); + reg_mask = + SET_BITS(regAUDIO_RX_0, HSDETEN, + 1) | SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + reg_write = + SET_BITS(regAUDIO_RX_0, HSDETEN, + 1) | SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + rc = pmic_write_reg(REG_AUDIO_RX_0, reg_write, reg_mask); + if (rc == PMIC_SUCCESS) + pr_debug("pmic_audio_enable\n"); + /* We can enable the Stereo DAC. */ + rc = pmic_write_reg(REG_AUDIO_STEREO_DAC, + STDAC_ENABLE, STDAC_ENABLE); + /*pmic_read_reg(REG_AUDIO_STEREO_DAC, ®_value); */ + if (rc != PMIC_SUCCESS) { + pr_debug("Failed to enable the Stereo DAC\n"); + rc = PMIC_ERROR; + } + } else if ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE)) { + /* Must first set the audio bias bit to power up the audio circuits. */ + pmic_write_reg(REG_AUDIO_RX_0, AUDIO_BIAS_ENABLE, + AUDIO_BIAS_ENABLE); + reg_mask = SET_BITS(regAUDIO_RX_0, HSDETEN, 1) | + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + reg_write = SET_BITS(regAUDIO_RX_0, HSDETEN, 1) | + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + rc = pmic_write_reg(REG_AUDIO_RX_0, reg_write, reg_mask); + + /* Then we can enable the Voice CODEC. */ + rc = pmic_write_reg(REG_AUDIO_CODEC, VCODEC_ENABLE, + VCODEC_ENABLE); + + /* pmic_read_reg(REG_AUDIO_CODEC, ®_value); */ + if (rc != PMIC_SUCCESS) { + pr_debug("Failed to enable the Voice codec\n"); + rc = PMIC_ERROR; + } + } + /* Exit critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Disable the Stereo DAC or the Voice CODEC. + * + * Explicitly disable the Stereo DAC or the Voice CODEC to end audio + * playback or recording as required. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the device was successful disabled. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the device could not be disabled. + */ +PMIC_STATUS pmic_audio_disable(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int STDAC_DISABLE = SET_BITS(regST_DAC, STDCEN, 1); + const unsigned int VCODEC_DISABLE = SET_BITS(regAUD_CODEC, CDCEN, 1); + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + rc = pmic_write_reg(REG_AUDIO_STEREO_DAC, 0, STDAC_DISABLE); + } else if ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE)) { + rc = pmic_write_reg(REG_AUDIO_CODEC, 0, VCODEC_DISABLE); + } + if (rc == PMIC_SUCCESS) { + pr_debug("Disabled successfully\n"); + } + /* Exit critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Reset the selected audio hardware control registers to their + * power on state. + * + * This resets all of the audio hardware control registers currently + * associated with the device handle back to their power on states. For + * example, if the handle is associated with the Stereo DAC and a + * specific output port and output amplifiers, then this function will + * reset all of those components to their initial power on state. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the reset operation was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the reset was unsuccessful. + */ +PMIC_STATUS pmic_audio_reset(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + rc = pmic_audio_reset_device(handle); + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Reset all audio hardware control registers to their power on state. + * + * This resets all of the audio hardware control registers back to their + * power on states. Use this function with care since it also invalidates + * (i.e., automatically closes) all currently opened device handles. + * + * @retval PMIC_SUCCESS If the reset operation was successful. + * @retval PMIC_ERROR If the reset was unsuccessful. + */ +PMIC_STATUS pmic_audio_reset_all(void) +{ + PMIC_STATUS rc = PMIC_SUCCESS; + unsigned int audio_ssi_reset = 0; + unsigned int audio_rx1_reset = 0; + /* We need a critical section here to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* First close all opened device handles, also deregisters callbacks. */ + pmic_audio_close_handle(stDAC.handle); + pmic_audio_close_handle(vCodec.handle); + pmic_audio_close_handle(extStereoIn.handle); + + if (pmic_write_reg(REG_AUDIO_RX_1, RESET_AUDIO_RX_1, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + audio_rx1_reset = 1; + } + if (pmic_write_reg(REG_AUDIO_SSI_NETWORK, RESET_SSI_NETWORK, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + audio_ssi_reset = 1; + } + if (pmic_write_reg + (REG_AUDIO_STEREO_DAC, RESET_ST_DAC, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + /* Also reset the driver state information to match. Note that we + * keep the device handle and event callback settings unchanged + * since these don't affect the actual hardware and we rely on + * the user to explicitly close the handle or deregister callbacks + */ + if (audio_ssi_reset) { + /* better to check if SSI is also reset as some fields are represennted in SSI reg */ + stDAC.busID = AUDIO_DATA_BUS_1; + stDAC.protocol = NORMAL_MSB_JUSTIFIED_MODE; + stDAC.masterSlave = BUS_MASTER_MODE; + stDAC.protocol_set = false; + stDAC.numSlots = USE_2_TIMESLOTS; + stDAC.clockIn = CLOCK_IN_CLIA; + stDAC.samplingRate = STDAC_RATE_44_1_KHZ; + stDAC.clockFreq = STDAC_CLI_13MHZ; + stDAC.invert = NO_INVERT; + stDAC.timeslot = USE_TS0_TS1; + stDAC.config = (PMIC_AUDIO_STDAC_CONFIG) 0; + } + } + + if (pmic_write_reg(REG_AUDIO_CODEC, RESET_AUD_CODEC, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + /* Also reset the driver state information to match. Note that we + * keep the device handle and event callback settings unchanged + * since these don't affect the actual hardware and we rely on + * the user to explicitly close the handle or deregister callbacks + */ + if (audio_ssi_reset) { + vCodec.busID = AUDIO_DATA_BUS_2; + vCodec.protocol = NETWORK_MODE; + vCodec.masterSlave = BUS_SLAVE_MODE; + vCodec.protocol_set = false; + vCodec.numSlots = USE_4_TIMESLOTS; + vCodec.clockIn = CLOCK_IN_CLIB; + vCodec.samplingRate = VCODEC_RATE_8_KHZ; + vCodec.clockFreq = VCODEC_CLI_13MHZ; + vCodec.invert = NO_INVERT; + vCodec.timeslot = USE_TS0; + vCodec.config = + INPUT_HIGHPASS_FILTER | OUTPUT_HIGHPASS_FILTER; + } + } + + if (pmic_write_reg(REG_AUDIO_RX_0, RESET_AUDIO_RX_0, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + /* Also reset the driver state information to match. */ + audioOutput.outputPort = (PMIC_AUDIO_OUTPUT_PORT) NULL; + audioOutput.vCodecoutputPGAGain = OUTPGA_GAIN_0DB; + audioOutput.stDacoutputPGAGain = OUTPGA_GAIN_0DB; + audioOutput.extStereooutputPGAGain = OUTPGA_GAIN_0DB; + audioOutput.balanceLeftGain = BAL_GAIN_0DB; + audioOutput.balanceRightGain = BAL_GAIN_0DB; + audioOutput.monoAdderGain = MONOADD_GAIN_0DB; + audioOutput.config = (PMIC_AUDIO_OUTPUT_CONFIG) 0; + audioOutput.vCodecOut = VCODEC_DIRECT_OUT; + } + + if (pmic_write_reg(REG_AUDIO_TX, RESET_AUDIO_TX, + PMIC_ALL_BITS) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + /* Also reset the driver state information to match. Note that we + * reset the vCodec fields since all of the input/recording + * devices are only connected to the Voice CODEC and are managed + * as part of the Voice CODEC state. + */ + if (audio_rx1_reset) { + vCodec.leftChannelMic.mic = NO_MIC; + vCodec.leftChannelMic.micOnOff = MICROPHONE_OFF; + vCodec.leftChannelMic.ampMode = CURRENT_TO_VOLTAGE; + vCodec.leftChannelMic.gain = MIC_GAIN_0DB; + vCodec.rightChannelMic.mic = NO_MIC; + vCodec.rightChannelMic.micOnOff = MICROPHONE_OFF; + vCodec.rightChannelMic.ampMode = AMP_OFF; + vCodec.rightChannelMic.gain = MIC_GAIN_0DB; + } + } + /* Finally, also reset any global state variables. */ + headsetState = NO_HEADSET; + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Set the Audio callback function. + * + * Register a callback function that will be used to signal PMIC audio + * events. For example, the OSS audio driver should register a callback + * function in order to be notified of headset connect/disconnect events. + * + * @param func A pointer to the callback function. + * @param eventMask A mask selecting events to be notified. + * @param hs_state To know the headset state. + * + * + * + * @retval PMIC_SUCCESS If the callback was successfully + * registered. + * @retval PMIC_PARAMETER_ERROR If the handle or the eventMask is invalid. + */ +PMIC_STATUS pmic_audio_set_callback(void *func, + const PMIC_AUDIO_EVENTS eventMask, + PMIC_HS_STATE * hs_state) +{ + unsigned long flags; + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + pmic_event_callback_t eventNotify; + + /* We need to start a critical section here to ensure a consistent state + * in case simultaneous calls to pmic_audio_set_callback() are made. In + * that case, we must serialize the calls to ensure that the "callback" + * and "eventMask" state variables are always consistent. + * + * Note that we don't actually need to acquire the spinlock until later + * when we are finally ready to update the "callback" and "eventMask" + * state variables which are shared with the interrupt handler. + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + rc = PMIC_ERROR; + /* Register for PMIC events from the core protocol driver. */ + if (eventMask & MICROPHONE_DETECTED) { + /* We need to register for the A1 amplifier interrupt. */ + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_MC2BI); + rc = pmic_event_subscribe(EVENT_MC2BI, eventNotify); + + if (rc != PMIC_SUCCESS) { + pr_debug + ("%s: pmic_event_subscribe() for EVENT_HSDETI " + "failed\n", __FILE__); + goto End; + } + } + + if (eventMask & HEADSET_DETECTED) { + /* We need to register for the A1 amplifier interrupt. */ + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_HSDETI); + rc = pmic_event_subscribe(EVENT_HSDETI, eventNotify); + + if (rc != PMIC_SUCCESS) { + pr_debug + ("%s: pmic_event_subscribe() for EVENT_HSDETI " + "failed\n", __FILE__); + goto Cleanup_HDT; + } + + } + if (eventMask & HEADSET_STEREO) { + /* We need to register for the A1 amplifier interrupt. */ + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_HSLI); + rc = pmic_event_subscribe(EVENT_HSLI, eventNotify); + + if (rc != PMIC_SUCCESS) { + pr_debug + ("%s: pmic_event_subscribe() for EVENT_HSLI " + "failed\n", __FILE__); + goto Cleanup_HST; + } + } + if (eventMask & HEADSET_THERMAL_SHUTDOWN) { + /* We need to register for the A1 amplifier interrupt. */ + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_ALSPTHI); + rc = pmic_event_subscribe(EVENT_ALSPTHI, eventNotify); + + if (rc != PMIC_SUCCESS) { + pr_debug + ("%s: pmic_event_subscribe() for EVENT_ALSPTHI " + "failed\n", __FILE__); + goto Cleanup_TSD; + } + pr_debug("Registered for EVENT_ALSPTHI\n"); + } + if (eventMask & HEADSET_SHORT_CIRCUIT) { + /* We need to register for the A1 amplifier interrupt. */ + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_AHSSHORTI); + rc = pmic_event_subscribe(EVENT_AHSSHORTI, eventNotify); + + if (rc != PMIC_SUCCESS) { + pr_debug + ("%s: pmic_event_subscribe() for EVENT_AHSSHORTI " + "failed\n", __FILE__); + goto Cleanup_HShort; + } + pr_debug("Registered for EVENT_AHSSHORTI\n"); + } + + /* We also need the spinlock here to avoid possible problems + * with the interrupt handler when we update the + * "callback" and "eventMask" state variables. + */ + spin_lock_irqsave(&lock, flags); + + /* Successfully registered for all events. */ + event_state.callback = func; + event_state.eventMask = eventMask; + + /* The spinlock is no longer needed now that we've finished + * updating the "callback" and "eventMask" state variables. + */ + spin_unlock_irqrestore(&lock, flags); + + goto End; + + /* This section unregisters any already registered events if we should + * encounter an error partway through the registration process. Note + * that we don't check the return status here since it is already set + * to PMIC_ERROR before we get here. + */ + Cleanup_HShort: + + if (eventMask & HEADSET_SHORT_CIRCUIT) { + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_AHSSHORTI); + pmic_event_unsubscribe(EVENT_AHSSHORTI, eventNotify); + } + + Cleanup_TSD: + + if (eventMask & HEADSET_THERMAL_SHUTDOWN) { + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_ALSPTHI); + pmic_event_unsubscribe(EVENT_ALSPTHI, eventNotify); + } + + Cleanup_HST: + + if (eventMask & HEADSET_STEREO) { + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_HSLI); + pmic_event_unsubscribe(EVENT_HSLI, eventNotify); + } + + Cleanup_HDT: + + if (eventMask & HEADSET_DETECTED) { + eventNotify.func = func; + eventNotify.param = (void *)(CORE_EVENT_HSDETI); + pmic_event_unsubscribe(EVENT_HSDETI, eventNotify); + } + + End: + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Deregisters the existing audio callback function. + * + * Deregister the callback function that was previously registered by calling + * pmic_audio_set_callback(). + * + * + * @retval PMIC_SUCCESS If the callback was successfully + * deregistered. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_clear_callback(void) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* We need a critical section to maintain a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (event_state.callback != (PMIC_AUDIO_CALLBACK) NULL) { + rc = pmic_audio_deregister(&(event_state.callback), + &(event_state.eventMask)); + } + + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Get the current audio callback function settings. + * + * Get the current callback function and event mask. + * + * @param func The current callback function. + * @param eventMask The current event selection mask. + * + * @retval PMIC_SUCCESS If the callback information was + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_get_callback(PMIC_AUDIO_CALLBACK * const func, + PMIC_AUDIO_EVENTS * const eventMask) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* We only need to acquire the mutex here because we will not be updating + * anything that may affect the interrupt handler. We just need to ensure + * that the callback fields are not changed while we are in the critical + * section by calling either pmic_audio_set_callback() or + * pmic_audio_clear_callback(). + */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((func != (PMIC_AUDIO_CALLBACK *) NULL) && + (eventMask != (PMIC_AUDIO_EVENTS *) NULL)) { + + *func = event_state.callback; + *eventMask = event_state.eventMask; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Enable the anti-pop circuitry to avoid extra noise when inserting + * or removing a external device (e.g., a headset). + * + * Enable the use of the built-in anti-pop circuitry to prevent noise from + * being generated when an external audio device is inserted or removed + * from an audio plug. A slow ramp speed may be needed to avoid extra noise. + * + * @param rampSpeed The desired anti-pop circuitry ramp speed. + * + * @retval PMIC_SUCCESS If the anti-pop circuitry was successfully + * enabled. + * @retval PMIC_ERROR If the anti-pop circuitry could not be + * enabled. + */ +PMIC_STATUS pmic_audio_antipop_enable(const PMIC_AUDIO_ANTI_POP_RAMP_SPEED + rampSpeed) +{ + PMIC_STATUS rc = PMIC_ERROR; + unsigned int reg_value = 0; + const unsigned int reg_mask = SET_BITS(regAUDIO_RX_0, BIASEN, 1) | + SET_BITS(regAUDIO_RX_0, BIASSPEED, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + /* + * Antipop is enabled by enabling the BIAS (BIASEN) and setting the + * BIASSPEED . + * BIASEN is just to make sure that BIAS is enabled + */ + reg_value = SET_BITS(regAUDIO_RX_0, BIASEN, 1) + | SET_BITS(regAUDIO_RX_0, BIASSPEED, 0) | SET_BITS(regAUDIO_RX_0, + HSLDETEN, 1); + rc = pmic_write_reg(REG_AUDIO_RX_0, reg_value, reg_mask); + return rc; +} + +/*! + * @brief Disable the anti-pop circuitry. + * + * Disable the use of the built-in anti-pop circuitry to prevent noise from + * being generated when an external audio device is inserted or removed + * from an audio plug. + * + * @retval PMIC_SUCCESS If the anti-pop circuitry was successfully + * disabled. + * @retval PMIC_ERROR If the anti-pop circuitry could not be + * disabled. + */ +PMIC_STATUS pmic_audio_antipop_disable(void) +{ + PMIC_STATUS rc = PMIC_ERROR; + const unsigned int reg_mask = SET_BITS(regAUDIO_RX_0, BIASSPEED, 1) | + SET_BITS(regAUDIO_RX_0, BIASEN, 1); + const unsigned int reg_write = SET_BITS(regAUDIO_RX_0, BIASSPEED, 1) | + SET_BITS(regAUDIO_RX_0, BIASEN, 0); + + /* No critical section required here since we are not updating any + * global data. + */ + + /* + * Antipop is disabled by setting BIASSPEED = 0. BIASEN bit remains set + * as only antipop needs to be disabled + */ + rc = pmic_write_reg(REG_AUDIO_RX_0, reg_write, reg_mask); + + return rc; +} + +/*! + * @brief Performs a reset of the Voice CODEC/Stereo DAC digital filter. + * + * The digital filter should be reset whenever the clock or sampling rate + * configuration has been changed. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the digital filter was successfully + * reset. + * @retval PMIC_ERROR If the digital filter could not be reset. + */ +PMIC_STATUS pmic_audio_digital_filter_reset(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regST_DAC, STDCRESET, 1); + if (pmic_write_reg(REG_AUDIO_STEREO_DAC, reg_mask, + reg_mask) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + pr_debug("STDAC filter reset\n"); + } + + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUD_CODEC, CDCRESET, 1); + if (pmic_write_reg(REG_AUDIO_CODEC, reg_mask, + reg_mask) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + pr_debug("CODEC filter reset\n"); + } + } + return rc; +} + +/*! + * @brief Get the most recent PTT button voltage reading. + * + * This feature is not supported by mc13783 + * @param level PTT button level. + * + * @retval PMIC_SUCCESS If the most recent PTT button voltage was + * returned. + * @retval PMIC_PARAMETER_ERROR If a NULL pointer argument was given. + */ +PMIC_STATUS pmic_audio_get_ptt_button_level(unsigned int *const level) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; +} + +#ifdef DEBUG_AUDIO + +/*! + * @brief Provide a hexadecimal dump of all PMIC audio registers (DEBUG only) + * + * This function is intended strictly for debugging purposes only and will + * print the current values of the following PMIC registers: + * + * - AUD_CODEC + * - ST_DAC + * - AUDIO_RX_0 + * - AUDIO_RX_1 + * - AUDIO_TX + * - AUDIO_SSI_NW + * + * The register fields will not be decoded. + * + * Note that we don't dump any of the arbitration bits because we cannot + * access the true arbitration bit settings when reading the registers + * from the secondary SPI bus. + * + * Also note that we must not call this function with interrupts disabled, + * for example, while holding a spinlock, because calls to pmic_read_reg() + * eventually end up in the SPI driver which will want to perform a + * schedule() operation. If schedule() is called with interrupts disabled, + * then you will see messages like the following: + * + * BUG: scheduling while atomic: ... + * + */ +void pmic_audio_dump_registers(void) +{ + unsigned int reg_value = 0; + + /* Dump the AUD_CODEC (Voice CODEC) register. */ + if (pmic_read_reg(REG_AUDIO_CODEC, ®_value, REG_FULLMASK) + == PMIC_SUCCESS) { + pr_debug("Audio Codec = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read audio codec\n"); + } + + /* Dump the ST DAC (Stereo DAC) register. */ + if (pmic_read_reg + (REG_AUDIO_STEREO_DAC, ®_value, REG_FULLMASK) == PMIC_SUCCESS) { + pr_debug("Stereo DAC = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read Stereo DAC\n"); + } + + /* Dump the SSI NW register. */ + if (pmic_read_reg + (REG_AUDIO_SSI_NETWORK, ®_value, REG_FULLMASK) == PMIC_SUCCESS) { + pr_debug("SSI Network = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read SSI network\n"); + } + + /* Dump the Audio RX 0 register. */ + if (pmic_read_reg(REG_AUDIO_RX_0, ®_value, REG_FULLMASK) + == PMIC_SUCCESS) { + pr_debug("Audio RX 0 = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read audio RX 0\n"); + } + + /* Dump the Audio RX 1 register. */ + if (pmic_read_reg(REG_AUDIO_RX_1, ®_value, REG_FULLMASK) + == PMIC_SUCCESS) { + pr_debug("Audio RX 1 = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read audio RX 1\n"); + } + /* Dump the Audio TX register. */ + if (pmic_read_reg(REG_AUDIO_TX, ®_value, REG_FULLMASK) == + PMIC_SUCCESS) { + pr_debug("Audio Tx = 0x%x\n", reg_value); + } else { + pr_debug("Failed to read audio TX\n"); + } + +} + +#endif /* DEBUG_AUDIO */ + +/*@}*/ + +/************************************************************************* + * General Voice CODEC configuration. + ************************************************************************* + */ + +/*! + * @name General Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice + * CODEC hardware. + */ +/*@{*/ + +/*! + * @brief Set the Voice CODEC clock source and operating characteristics. + * + * Define the Voice CODEC clock source and operating characteristics. This + * must be done before the Voice CODEC is enabled. + * + * + * + * @param handle Device handle from pmic_audio_open() call. + * @param clockIn Select the clock signal source. + * @param clockFreq Select the clock signal frequency. + * @param samplingRate Select the audio data sampling rate. + * @param invert Enable inversion of the frame sync and/or + * bit clock inputs. + * + * @retval PMIC_SUCCESS If the Voice CODEC clock settings were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or clock configuration was + * invalid. + * @retval PMIC_ERROR If the Voice CODEC clock configuration + * could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_clock(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_CLOCK_IN_SOURCE + clockIn, + const PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ + clockFreq, + const PMIC_AUDIO_VCODEC_SAMPLING_RATE + samplingRate, + const PMIC_AUDIO_CLOCK_INVERT invert) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + /* Validate all of the calling parameters. */ + if (handle == (PMIC_AUDIO_HANDLE) NULL) { + rc = PMIC_PARAMETER_ERROR; + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + if ((clockIn != CLOCK_IN_CLIA) && (clockIn != CLOCK_IN_CLIB)) { + rc = PMIC_PARAMETER_ERROR; + } else if (!((clockFreq >= VCODEC_CLI_13MHZ) + && (clockFreq <= VCODEC_CLI_33_6MHZ))) { + rc = PMIC_PARAMETER_ERROR; + } else if ((samplingRate != VCODEC_RATE_8_KHZ) + && (samplingRate != VCODEC_RATE_16_KHZ)) { + rc = PMIC_PARAMETER_ERROR; + } else if (!((invert >= NO_INVERT) + && (invert <= INVERT_FRAMESYNC))) { + rc = PMIC_PARAMETER_ERROR; + } else { + /*reg_mask = SET_BITS(regAUD_CODEC, CDCCLK, 7) | + SET_BITS(regAUD_CODEC, CDCCLKSEL, 1) | + SET_BITS(regAUD_CODEC, CDCFS8K16K, 1) | + SET_BITS(regAUD_CODEC, CDCBCLINV, 1) | + SET_BITS(regAUD_CODEC, CDCFSINV, 1); */ + if (clockIn == CLOCK_IN_CLIA) { + reg_value = + SET_BITS(regAUD_CODEC, CDCCLKSEL, 0); + } else { + reg_value = + SET_BITS(regAUD_CODEC, CDCCLKSEL, 1); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCCLKSEL, 1); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + + reg_value = 0; + if (clockFreq == VCODEC_CLI_13MHZ) { + reg_value |= SET_BITS(regAUD_CODEC, CDCCLK, 0); + } else if (clockFreq == VCODEC_CLI_15_36MHZ) { + reg_value |= SET_BITS(regAUD_CODEC, CDCCLK, 1); + } else if (clockFreq == VCODEC_CLI_16_8MHZ) { + reg_value |= SET_BITS(regAUD_CODEC, CDCCLK, 2); + } else if (clockFreq == VCODEC_CLI_26MHZ) { + reg_value |= SET_BITS(regAUD_CODEC, CDCCLK, 4); + } else { + reg_value |= SET_BITS(regAUD_CODEC, CDCCLK, 7); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCCLK, 7); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + + reg_value = 0; + reg_mask = 0; + + if (samplingRate == VCODEC_RATE_8_KHZ) { + reg_value |= + SET_BITS(regAUD_CODEC, CDCFS8K16K, 0); + } else { + reg_value |= + SET_BITS(regAUD_CODEC, CDCFS8K16K, 1); + } + reg_mask = SET_BITS(regAUD_CODEC, CDCFS8K16K, 1); + if (PMIC_SUCCESS != + pmic_write_reg(REG_AUDIO_CODEC, + reg_value, reg_mask)) + return PMIC_ERROR; + reg_value = 0; + reg_mask = + SET_BITS(regAUD_CODEC, CDCBCLINV, + 1) | SET_BITS(regAUD_CODEC, CDCFSINV, 1); + + if (invert & INVERT_BITCLOCK) { + reg_value |= + SET_BITS(regAUD_CODEC, CDCBCLINV, 1); + } + if (invert & INVERT_FRAMESYNC) { + reg_value |= + SET_BITS(regAUD_CODEC, CDCFSINV, 1); + } + if (invert & NO_INVERT) { + reg_value |= + SET_BITS(regAUD_CODEC, CDCBCLINV, 0); + reg_value |= + SET_BITS(regAUD_CODEC, CDCFSINV, 0); + } + if (pmic_write_reg + (REG_AUDIO_CODEC, reg_value, + reg_mask) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + pr_debug("CODEC clock set\n"); + vCodec.clockIn = clockIn; + vCodec.clockFreq = clockFreq; + vCodec.samplingRate = samplingRate; + vCodec.invert = invert; + } + + } + + } else { + rc = PMIC_PARAMETER_ERROR; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the Voice CODEC clock source and operating characteristics. + * + * Get the current Voice CODEC clock source and operating characteristics. + * + * @param handle Device handle from pmic_audio_open() call. + * @param clockIn The clock signal source. + * @param clockFreq The clock signal frequency. + * @param samplingRate The audio data sampling rate. + * @param invert Inversion of the frame sync and/or + * bit clock inputs is enabled/disabled. + * + * @retval PMIC_SUCCESS If the Voice CODEC clock settings were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle invalid. + * @retval PMIC_ERROR If the Voice CODEC clock configuration + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_clock(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_CLOCK_IN_SOURCE * + const clockIn, + PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ * + const clockFreq, + PMIC_AUDIO_VCODEC_SAMPLING_RATE * + const samplingRate, + PMIC_AUDIO_CLOCK_INVERT * const invert) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure that we return a consistent state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (clockIn != (PMIC_AUDIO_CLOCK_IN_SOURCE *) NULL) && + (clockFreq != (PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ *) NULL) && + (samplingRate != (PMIC_AUDIO_VCODEC_SAMPLING_RATE *) NULL) && + (invert != (PMIC_AUDIO_CLOCK_INVERT *) NULL)) { + *clockIn = vCodec.clockIn; + *clockFreq = vCodec.clockFreq; + *samplingRate = vCodec.samplingRate; + *invert = vCodec.invert; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the Voice CODEC primary audio channel timeslot. + * + * Set the Voice CODEC primary audio channel timeslot. This function must be + * used if the default timeslot for the primary audio channel is to be changed. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot Select the primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC primary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC primary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_TIMESLOT + timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + const unsigned int reg_mask = SET_BITS(regSSI_NETWORK, CDCTXRXSLOT, 3); + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + ((timeslot == USE_TS0) || (timeslot == USE_TS1) || + (timeslot == USE_TS2) || (timeslot == USE_TS3))) { + reg_write = SET_BITS(regSSI_NETWORK, CDCTXRXSLOT, timeslot); + + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + vCodec.timeslot = timeslot; + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current Voice CODEC primary audio channel timeslot. + * + * Get the current Voice CODEC primary audio channel timeslot. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot The primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC primary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC primary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_VCODEC_TIMESLOT * + const timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (timeslot != (PMIC_AUDIO_VCODEC_TIMESLOT *) NULL)) { + *timeslot = vCodec.timeslot; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the Voice CODEC secondary recording audio channel timeslot. + * + * Set the Voice CODEC secondary audio channel timeslot. This function must be + * used if the default timeslot for the secondary audio channel is to be + * changed. The secondary audio channel timeslot is used to transmit the audio + * data that was recorded by the Voice CODEC from the secondary audio input + * channel. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot Select the secondary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC secondary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC secondary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_secondary_txslot(const PMIC_AUDIO_HANDLE + handle, + const + PMIC_AUDIO_VCODEC_TIMESLOT + timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = SET_BITS(regSSI_NETWORK, CDCTXSECSLOT, 3); + unsigned int reg_write = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + /* How to handle primary slot and secondary slot being the same */ + if ((timeslot >= USE_TS0) && (timeslot <= USE_TS3) + && (timeslot != vCodec.timeslot)) { + reg_write = + SET_BITS(regSSI_NETWORK, CDCTXSECSLOT, timeslot); + + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + vCodec.secondaryTXtimeslot = timeslot; + } + } + + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the Voice CODEC secondary recording audio channel timeslot. + * + * Get the Voice CODEC secondary audio channel timeslot. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot The secondary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC secondary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC secondary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_secondary_txslot(const PMIC_AUDIO_HANDLE + handle, + PMIC_AUDIO_VCODEC_TIMESLOT * + const timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (timeslot != (PMIC_AUDIO_VCODEC_TIMESLOT *) NULL)) { + rc = PMIC_SUCCESS; + *timeslot = vCodec.secondaryTXtimeslot; + } + + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Set/Enable the Voice CODEC options. + * + * Set or enable various Voice CODEC options. The available options include + * the use of dithering, highpass digital filters, and loopback modes. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The Voice CODEC options to enable. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or Voice CODEC options + * were invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * successfully set/enabled. + */ +PMIC_STATUS pmic_audio_vcodec_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_CONFIG config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (config & DITHERING) { + reg_write = SET_BITS(regAUD_CODEC, CDCDITH, 0); + reg_mask = SET_BITS(regAUD_CODEC, CDCDITH, 1); + } + + if (config & INPUT_HIGHPASS_FILTER) { + reg_write |= SET_BITS(regAUD_CODEC, AUDIHPF, 1); + reg_mask |= SET_BITS(regAUD_CODEC, AUDIHPF, 1); + } + + if (config & OUTPUT_HIGHPASS_FILTER) { + reg_write |= SET_BITS(regAUD_CODEC, AUDOHPF, 1); + reg_mask |= SET_BITS(regAUD_CODEC, AUDOHPF, 1); + } + + if (config & DIGITAL_LOOPBACK) { + reg_write |= SET_BITS(regAUD_CODEC, CDCDLM, 1); + reg_mask |= SET_BITS(regAUD_CODEC, CDCDLM, 1); + } + + if (config & ANALOG_LOOPBACK) { + reg_write |= SET_BITS(regAUD_CODEC, CDCALM, 1); + reg_mask |= SET_BITS(regAUD_CODEC, CDCALM, 1); + } + + if (config & VCODEC_MASTER_CLOCK_OUTPUTS) { + reg_write |= SET_BITS(regAUD_CODEC, CDCCLKEN, 1) | + SET_BITS(regAUD_CODEC, CDCTS, 0); + reg_mask |= SET_BITS(regAUD_CODEC, CDCCLKEN, 1) | + SET_BITS(regAUD_CODEC, CDCTS, 1); + + } + + if (config & TRISTATE_TS) { + reg_write |= SET_BITS(regAUD_CODEC, CDCTS, 1); + reg_mask |= SET_BITS(regAUD_CODEC, CDCTS, 1); + } + + if (reg_mask == 0) { + /* We should not reach this point without having to configure + * anything so we flag it as an error. + */ + rc = PMIC_ERROR; + } else { + rc = pmic_write_reg(REG_AUDIO_CODEC, + reg_write, reg_mask); + } + + if (rc == PMIC_SUCCESS) { + vCodec.config |= config; + } + } + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Clear/Disable the Voice CODEC options. + * + * Clear or disable various Voice CODEC options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The Voice CODEC options to be cleared/disabled. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the Voice CODEC options + * were invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * cleared/disabled. + */ +PMIC_STATUS pmic_audio_vcodec_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_CONFIG + config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (config & DITHERING) { + reg_mask = SET_BITS(regAUD_CODEC, CDCDITH, 1); + reg_write = SET_BITS(regAUD_CODEC, CDCDITH, 1); + } + + if (config & INPUT_HIGHPASS_FILTER) { + reg_mask |= SET_BITS(regAUD_CODEC, AUDIHPF, 1); + } + + if (config & OUTPUT_HIGHPASS_FILTER) { + reg_mask |= SET_BITS(regAUD_CODEC, AUDOHPF, 1); + } + + if (config & DIGITAL_LOOPBACK) { + reg_mask |= SET_BITS(regAUD_CODEC, CDCDLM, 1); + } + + if (config & ANALOG_LOOPBACK) { + reg_mask |= SET_BITS(regAUD_CODEC, CDCALM, 1); + } + + if (config & VCODEC_MASTER_CLOCK_OUTPUTS) { + reg_mask |= SET_BITS(regAUD_CODEC, CDCCLKEN, 1); + } + + if (config & TRISTATE_TS) { + reg_mask |= SET_BITS(regAUD_CODEC, CDCTS, 1); + } + + if (reg_mask == 0) { + /* We should not reach this point without having to configure + * anything so we flag it as an error. + */ + rc = PMIC_ERROR; + } else { + rc = pmic_write_reg(REG_AUDIO_CODEC, + reg_write, reg_mask); + } + + if (rc == PMIC_SUCCESS) { + vCodec.config |= config; + } + + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current Voice CODEC options. + * + * Get the current Voice CODEC options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The current set of Voice CODEC options. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_VCODEC_CONFIG * + const config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (config != (PMIC_AUDIO_VCODEC_CONFIG *) NULL)) { + *config = vCodec.config; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Enable the Voice CODEC bypass audio pathway. + * + * Enables the Voice CODEC bypass pathway for audio data. This allows direct + * output of the voltages on the TX data bus line to the output amplifiers + * (bypassing the digital-to-analog converters within the Voice CODEC). + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC bypass was successfully + * enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC bypass could not be + * enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_bypass(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_write = SET_BITS(regAUD_CODEC, CDCBYP, 1); + const unsigned int reg_mask = SET_BITS(regAUD_CODEC, CDCBYP, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + rc = pmic_write_reg(REG_AUDIO_CODEC, reg_write, reg_mask); + } + + return rc; +} + +/*! + * @brief Disable the Voice CODEC bypass audio pathway. + * + * Disables the Voice CODEC bypass pathway for audio data. This means that + * the TX data bus line will deliver digital data to the digital-to-analog + * converters within the Voice CODEC. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC bypass was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC bypass could not be + * disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_bypass(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_write = 0; + const unsigned int reg_mask = SET_BITS(regAUD_CODEC, CDCBYP, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + rc = pmic_write_reg(REG_AUDIO_CODEC, reg_write, reg_mask); + } + + return rc; +} + +/*@}*/ + +/************************************************************************* + * General Stereo DAC configuration. + ************************************************************************* + */ + +/*! + * @name General Stereo DAC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Stereo + * DAC hardware. + */ +/*@{*/ + +/*! + * @brief Set the Stereo DAC clock source and operating characteristics. + * + * Define the Stereo DAC clock source and operating characteristics. This + * must be done before the Stereo DAC is enabled. + * + * + * @param handle Device handle from pmic_audio_open() call. + * @param clockIn Select the clock signal source. + * @param clockFreq Select the clock signal frequency. + * @param samplingRate Select the audio data sampling rate. + * @param invert Enable inversion of the frame sync and/or + * bit clock inputs. + * + * @retval PMIC_SUCCESS If the Stereo DAC clock settings were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or clock configuration was + * invalid. + * @retval PMIC_ERROR If the Stereo DAC clock configuration + * could not be set. + */ +PMIC_STATUS pmic_audio_stdac_set_clock(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_CLOCK_IN_SOURCE clockIn, + const PMIC_AUDIO_STDAC_CLOCK_IN_FREQ + clockFreq, + const PMIC_AUDIO_STDAC_SAMPLING_RATE + samplingRate, + const PMIC_AUDIO_CLOCK_INVERT invert) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_value = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + /* Validate all of the calling parameters. */ + if (handle == (PMIC_AUDIO_HANDLE) NULL) { + rc = PMIC_PARAMETER_ERROR; + } else if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) { + if ((clockIn != CLOCK_IN_CLIA) && (clockIn != CLOCK_IN_CLIB)) { + rc = PMIC_PARAMETER_ERROR; + } else if ((stDAC.masterSlave == BUS_MASTER_MODE) + && !((clockFreq >= STDAC_CLI_3_36864MHZ) + && (clockFreq <= STDAC_CLI_33_6MHZ))) { + rc = PMIC_PARAMETER_ERROR; + } else if ((stDAC.masterSlave == BUS_SLAVE_MODE) + && !((clockFreq >= STDAC_MCLK_PLL_DISABLED) + && (clockFreq <= STDAC_BCLK_IN_PLL))) { + rc = PMIC_PARAMETER_ERROR; + } else if (!((samplingRate >= STDAC_RATE_8_KHZ) + && (samplingRate <= STDAC_RATE_96_KHZ))) { + rc = PMIC_PARAMETER_ERROR; + } + /* + else if(!((invert >= NO_INVERT) && (invert <= INVERT_FRAMESYNC))) + { + rc = PMIC_PARAMETER_ERROR; + } */ + else { + reg_mask = SET_BITS(regST_DAC, STDCCLK, 7) | + SET_BITS(regST_DAC, STDCCLKSEL, 1) | + SET_BITS(regST_DAC, SR, 15) | + SET_BITS(regST_DAC, STDCBCLINV, 1) | + SET_BITS(regST_DAC, STDCFSINV, 1); + if (clockIn == CLOCK_IN_CLIA) { + reg_value = SET_BITS(regST_DAC, STDCCLKSEL, 0); + } else { + reg_value = SET_BITS(regST_DAC, STDCCLKSEL, 1); + } + /* How to take care of sample rates in SLAVE mode */ + if ((clockFreq == STDAC_CLI_3_36864MHZ) + || ((clockFreq == STDAC_FSYNC_IN_PLL))) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 6); + } else if ((clockFreq == STDAC_CLI_12MHZ) + || (clockFreq == STDAC_MCLK_PLL_DISABLED)) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 5); + } else if (clockFreq == STDAC_CLI_13MHZ) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 0); + } else if (clockFreq == STDAC_CLI_15_36MHZ) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 1); + } else if (clockFreq == STDAC_CLI_16_8MHZ) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 2); + } else if (clockFreq == STDAC_CLI_26MHZ) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 4); + } else if ((clockFreq == STDAC_CLI_33_6MHZ) + || (clockFreq == STDAC_BCLK_IN_PLL)) { + reg_value |= SET_BITS(regST_DAC, STDCCLK, 7); + } + + reg_value |= SET_BITS(regST_DAC, SR, samplingRate); + + if (invert & INVERT_BITCLOCK) { + reg_value |= SET_BITS(regST_DAC, STDCBCLINV, 1); + } + if (invert & INVERT_FRAMESYNC) { + reg_value |= SET_BITS(regST_DAC, STDCFSINV, 1); + } + if (invert & NO_INVERT) { + reg_value |= SET_BITS(regST_DAC, STDCBCLINV, 0); + reg_value |= SET_BITS(regST_DAC, STDCFSINV, 0); + } + if (pmic_write_reg + (REG_AUDIO_STEREO_DAC, reg_value, + reg_mask) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + pr_debug("STDAC clock set\n"); + rc = PMIC_SUCCESS; + stDAC.clockIn = clockIn; + stDAC.clockFreq = clockFreq; + stDAC.samplingRate = samplingRate; + stDAC.invert = invert; + } + + } + + } else { + rc = PMIC_PARAMETER_ERROR; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the Stereo DAC clock source and operating characteristics. + * + * Get the current Stereo DAC clock source and operating characteristics. + * + * @param handle Device handle from pmic_audio_open() call. + * @param clockIn The clock signal source. + * @param clockFreq The clock signal frequency. + * @param samplingRate The audio data sampling rate. + * @param invert Inversion of the frame sync and/or + * bit clock inputs is enabled/disabled. + * + * @retval PMIC_SUCCESS If the Stereo DAC clock settings were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle invalid. + * @retval PMIC_ERROR If the Stereo DAC clock configuration + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_clock(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_CLOCK_IN_SOURCE * + const clockIn, + PMIC_AUDIO_STDAC_SAMPLING_RATE * + const samplingRate, + PMIC_AUDIO_STDAC_CLOCK_IN_FREQ * + const clockFreq, + PMIC_AUDIO_CLOCK_INVERT * const invert) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE) && + (clockIn != (PMIC_AUDIO_CLOCK_IN_SOURCE *) NULL) && + (samplingRate != (PMIC_AUDIO_STDAC_SAMPLING_RATE *) NULL) && + (clockFreq != (PMIC_AUDIO_STDAC_CLOCK_IN_FREQ *) NULL) && + (invert != (PMIC_AUDIO_CLOCK_INVERT *) NULL)) { + *clockIn = stDAC.clockIn; + *samplingRate = stDAC.samplingRate; + *clockFreq = stDAC.clockFreq; + *invert = stDAC.invert; + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the Stereo DAC primary audio channel timeslot. + * + * Set the Stereo DAC primary audio channel timeslot. This function must be + * used if the default timeslot for the primary audio channel is to be changed. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot Select the primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Stereo DAC primary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Stereo DAC primary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_stdac_set_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_TIMESLOTS + timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = SET_BITS(regSSI_NETWORK, STDCRXSLOT, 3); + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + if ((timeslot == USE_TS0_TS1) || (timeslot == USE_TS2_TS3) + || (timeslot == USE_TS4_TS5) || (timeslot == USE_TS6_TS7)) { + if (pmic_write_reg + (REG_AUDIO_SSI_NETWORK, timeslot, + reg_mask) != PMIC_SUCCESS) { + rc = PMIC_ERROR; + } else { + pr_debug("STDAC primary timeslot set\n"); + stDAC.timeslot = timeslot; + rc = PMIC_SUCCESS; + } + + } else { + rc = PMIC_PARAMETER_ERROR; + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current Stereo DAC primary audio channel timeslot. + * + * Get the current Stereo DAC primary audio channel timeslot. + * + * @param handle Device handle from pmic_audio_open() call. + * @param timeslot The primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Stereo DAC primary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC primary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STDAC_TIMESLOTS * + const timeslot) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE) && + (timeslot != (PMIC_AUDIO_STDAC_TIMESLOTS *) NULL)) { + *timeslot = stDAC.timeslot; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set/Enable the Stereo DAC options. + * + * Set or enable various Stereo DAC options. The available options include + * resetting the digital filter and enabling the bus master clock outputs. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The Stereo DAC options to enable. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or Stereo DAC options + * were invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * successfully set/enabled. + */ +PMIC_STATUS pmic_audio_stdac_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_CONFIG config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + if (config & STDAC_MASTER_CLOCK_OUTPUTS) { + reg_write |= SET_BITS(regST_DAC, STDCCLKEN, 1); + reg_mask |= SET_BITS(regST_DAC, STDCCLKEN, 1); + } + + rc = pmic_write_reg(REG_AUDIO_STEREO_DAC, reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + stDAC.config |= config; + pr_debug("STDAC config set\n"); + + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Clear/Disable the Stereo DAC options. + * + * Clear or disable various Stereo DAC options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The Stereo DAC options to be cleared/disabled. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the Stereo DAC options + * were invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * cleared/disabled. + */ +PMIC_STATUS pmic_audio_stdac_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_CONFIG config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + + if (config & STDAC_MASTER_CLOCK_OUTPUTS) { + reg_mask |= SET_BITS(regST_DAC, STDCCLKEN, 1); + } + + if (reg_mask != 0) { + rc = pmic_write_reg(REG_AUDIO_STEREO_DAC, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + stDAC.config &= ~config; + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current Stereo DAC options. + * + * Get the current Stereo DAC options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The current set of Stereo DAC options. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STDAC_CONFIG * const config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE) && + (config != (PMIC_AUDIO_STDAC_CONFIG *) NULL)) { + *config = stDAC.config; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*@}*/ + +/************************************************************************* + * Audio input section configuration. + ************************************************************************* + */ + +/*! + * @name Audio Input Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC audio + * input hardware. + */ +/*@{*/ + +/*! + * @brief Set/Enable the audio input section options. + * + * Set or enable various audio input section options. The only available + * option right now is to enable the automatic disabling of the microphone + * input amplifiers when a microphone/headset is inserted or removed. + * NOT SUPPORTED BY MC13783 + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The audio input section options to enable. + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio input section + * options were invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be successfully set/enabled. + */ +PMIC_STATUS pmic_audio_input_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_CONFIG config) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; +} + +/*! + * @brief Clear/Disable the audio input section options. + * + * Clear or disable various audio input section options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The audio input section options to be + * cleared/disabled. + * NOT SUPPORTED BY MC13783 + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the audio input section + * options were invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be cleared/disabled. + */ +PMIC_STATUS pmic_audio_input_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_CONFIG config) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; + +} + +/*! + * @brief Get the current audio input section options. + * + * Get the current audio input section options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] config The current set of audio input section options. + * NOT SUPPORTED BY MC13783 + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be retrieved. + */ +PMIC_STATUS pmic_audio_input_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_CONFIG * const config) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; +} + +/*@}*/ + +/************************************************************************* + * Audio recording using the Voice CODEC. + ************************************************************************* + */ + +/*! + * @name Audio Recording Using the Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice CODEC + * to perform audio recording. + */ +/*@{*/ + +/*! + * @brief Select the microphone inputs to be used for Voice CODEC recording. + * + * Select left (mc13783-only) and right microphone inputs for Voice CODEC + * recording. It is possible to disable or not use a particular microphone + * input channel by specifying NO_MIC as a parameter. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannel Select the left microphone input channel. + * @param rightChannel Select the right microphone input channel. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input ports + * were invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be successfully enabled. + */ +PMIC_STATUS pmic_audio_vcodec_set_mic(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_PORT leftChannel, + const PMIC_AUDIO_INPUT_PORT rightChannel) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (!((leftChannel == NO_MIC) || (leftChannel == MIC1_LEFT))) { + rc = PMIC_PARAMETER_ERROR; + } else if (!((rightChannel == NO_MIC) + || (rightChannel == MIC1_RIGHT_MIC_MONO) + || (rightChannel == TXIN_EXT) + || (rightChannel == MIC2_AUX))) { + rc = PMIC_PARAMETER_ERROR; + } else { + if (leftChannel == NO_MIC) { + } else { /* Left channel MIC enable */ + reg_mask = SET_BITS(regAUDIO_TX, AMC1LEN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 1); + reg_write = SET_BITS(regAUDIO_TX, AMC1LEN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 0); + } + /*For right channel enable one and clear the other two as well as RXINREC */ + if (rightChannel == NO_MIC) { + } else if (rightChannel == MIC1_RIGHT_MIC_MONO) { + reg_mask |= SET_BITS(regAUDIO_TX, AMC1REN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 1) | + SET_BITS(regAUDIO_TX, AMC2EN, 1) | + SET_BITS(regAUDIO_TX, ATXINEN, 1); + reg_write |= SET_BITS(regAUDIO_TX, AMC1REN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 0) | + SET_BITS(regAUDIO_TX, AMC2EN, 0) | + SET_BITS(regAUDIO_TX, ATXINEN, 0); + } else if (rightChannel == MIC2_AUX) { + reg_mask |= SET_BITS(regAUDIO_TX, AMC1REN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 1) | + SET_BITS(regAUDIO_TX, AMC2EN, 1) | + SET_BITS(regAUDIO_TX, ATXINEN, 1); + reg_write |= SET_BITS(regAUDIO_TX, AMC1REN, 0) | + SET_BITS(regAUDIO_TX, RXINREC, 0) | + SET_BITS(regAUDIO_TX, AMC2EN, 1) | + SET_BITS(regAUDIO_TX, ATXINEN, 0); + } else { /* TX line in */ + reg_mask |= SET_BITS(regAUDIO_TX, AMC1REN, 1) | + SET_BITS(regAUDIO_TX, RXINREC, 1) | + SET_BITS(regAUDIO_TX, AMC2EN, 1) | + SET_BITS(regAUDIO_TX, ATXINEN, 1); + reg_write |= SET_BITS(regAUDIO_TX, AMC1REN, 0) | + SET_BITS(regAUDIO_TX, RXINREC, 0) | + SET_BITS(regAUDIO_TX, AMC2EN, 0) | + SET_BITS(regAUDIO_TX, ATXINEN, 1); + } + + if (reg_mask == 0) { + rc = PMIC_PARAMETER_ERROR; + } else { + rc = pmic_write_reg(REG_AUDIO_TX, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug + ("MIC inputs configured successfully\n"); + vCodec.leftChannelMic.mic = leftChannel; + vCodec.rightChannelMic.mic = + rightChannel; + + } + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current microphone inputs being used for Voice CODEC + * recording. + * + * Get the left (mc13783-only) and right microphone inputs currently being + * used for Voice CODEC recording. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannel The left microphone input channel. + * @param rightChannel The right microphone input channel. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_mic(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_PORT * const leftChannel, + PMIC_AUDIO_INPUT_PORT * + const rightChannel) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (leftChannel != (PMIC_AUDIO_INPUT_PORT *) NULL) && + (rightChannel != (PMIC_AUDIO_INPUT_PORT *) NULL)) { + *leftChannel = vCodec.leftChannelMic.mic; + *rightChannel = vCodec.rightChannelMic.mic; + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + return rc; +} + +/*! + * @brief Enable/disable the microphone input. + * + * This function enables/disables the current microphone input channel. The + * input amplifier is automatically turned off when the microphone input is + * disabled. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannel The left microphone input channel state. + * @param rightChannel the right microphone input channel state. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully reconfigured. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input states + * were invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be reconfigured. + */ +PMIC_STATUS pmic_audio_vcodec_set_mic_on_off(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_MIC_STATE + leftChannel, + const PMIC_AUDIO_INPUT_MIC_STATE + rightChannel) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + unsigned int curr_left = 0; + unsigned int curr_right = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + curr_left = vCodec.leftChannelMic.mic; + curr_right = vCodec.rightChannelMic.mic; + if ((curr_left == NO_MIC) && (curr_right == NO_MIC)) { + rc = PMIC_PARAMETER_ERROR; + } else { + if (curr_left == MIC1_LEFT) { + if ((leftChannel == MICROPHONE_ON) && + (vCodec.leftChannelMic.micOnOff == + MICROPHONE_OFF)) { + /* Enable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1LEN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1LEN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, 0); + + } else if ((leftChannel == MICROPHONE_OFF) && + (vCodec.leftChannelMic.micOnOff == + MICROPHONE_ON)) { + /* Disable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1LEN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1LEN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, 0); + + } else { + /* Both are in same state . Nothing to be done */ + } + + } + if (curr_right == MIC1_RIGHT_MIC_MONO) { + if ((rightChannel == MICROPHONE_ON) && + (vCodec.leftChannelMic.micOnOff == + MICROPHONE_OFF)) { + /* Enable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 0) | SET_BITS(regAUDIO_TX, + ATXINEN, 0); + } else if ((rightChannel == MICROPHONE_OFF) + && (vCodec.leftChannelMic.micOnOff == + MICROPHONE_ON)) { + /* Disable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 0) | SET_BITS(regAUDIO_TX, + ATXINEN, 0); + } else { + /* Both are in same state . Nothing to be done */ + } + } else if (curr_right == MIC2_AUX) { + if ((rightChannel == MICROPHONE_ON) + && (vCodec.leftChannelMic.micOnOff == + MICROPHONE_OFF)) { + /* Enable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 0); + } else if ((rightChannel == MICROPHONE_OFF) + && (vCodec.leftChannelMic.micOnOff == + MICROPHONE_ON)) { + /* Disable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 0) | SET_BITS(regAUDIO_TX, + ATXINEN, 0); + } else { + /* Both are in same state . Nothing to be done */ + } + } else if (curr_right == TXIN_EXT) { + if ((rightChannel == MICROPHONE_ON) + && (vCodec.leftChannelMic.micOnOff == + MICROPHONE_OFF)) { + /* Enable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 0) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + } else if ((rightChannel == MICROPHONE_OFF) + && (vCodec.leftChannelMic.micOnOff == + MICROPHONE_ON)) { + /* Disable the microphone */ + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1REN, + 1) | SET_BITS(regAUDIO_TX, + RXINREC, + 1) | + SET_BITS(regAUDIO_TX, AMC2EN, + 1) | SET_BITS(regAUDIO_TX, + ATXINEN, 1); + reg_write |= + SET_BITS(regAUDIO_TX, AMC1REN, + 0) | SET_BITS(regAUDIO_TX, + RXINREC, + 0) | + SET_BITS(regAUDIO_TX, AMC2EN, + 0) | SET_BITS(regAUDIO_TX, + ATXINEN, 0); + } else { + /* Both are in same state . Nothing to be done */ + } + } + if (reg_mask == 0) { + } else { + rc = pmic_write_reg(REG_AUDIO_TX, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug + ("MIC states configured successfully\n"); + vCodec.leftChannelMic.micOnOff = + leftChannel; + vCodec.rightChannelMic.micOnOff = + rightChannel; + } + } + } + + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Return the current state of the microphone inputs. + * + * This function returns the current state (on/off) of the microphone + * input channels. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannel The current left microphone input channel + * state. + * @param rightChannel the current right microphone input channel + * state. + * + * @retval PMIC_SUCCESS If the microphone input channel states + * were successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input channel states + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_mic_on_off(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_MIC_STATE * + const leftChannel, + PMIC_AUDIO_INPUT_MIC_STATE * + const rightChannel) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (leftChannel != (PMIC_AUDIO_INPUT_MIC_STATE *) NULL) && + (rightChannel != (PMIC_AUDIO_INPUT_MIC_STATE *) NULL)) { + *leftChannel = vCodec.leftChannelMic.micOnOff; + *rightChannel = vCodec.rightChannelMic.micOnOff; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the microphone input amplifier mode and gain level. + * + * This function sets the current microphone input amplifier operating mode + * and gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannelMode The left microphone input amplifier mode. + * @param leftChannelGain The left microphone input amplifier gain level. + * @param rightChannelMode The right microphone input amplifier mode. + * @param rightChannelGain The right microphone input amplifier gain + * level. + * + * @retval PMIC_SUCCESS If the microphone input amplifiers were + * successfully reconfigured. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input amplifier + * modes or gain levels were invalid. + * @retval PMIC_ERROR If the microphone input amplifiers could + * not be reconfigured. + */ +PMIC_STATUS pmic_audio_vcodec_set_record_gain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_AMP_MODE + leftChannelMode, + const PMIC_AUDIO_MIC_GAIN + leftChannelGain, + const PMIC_AUDIO_MIC_AMP_MODE + rightChannelMode, + const PMIC_AUDIO_MIC_GAIN + rightChannelGain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (!(((leftChannelGain >= MIC_GAIN_MINUS_8DB) + && (leftChannelGain <= MIC_GAIN_PLUS_23DB)) + && ((rightChannelGain >= MIC_GAIN_MINUS_8DB) + && (rightChannelGain <= MIC_GAIN_PLUS_23DB)))) { + rc = PMIC_PARAMETER_ERROR; + pr_debug("VCODEC set record gain - wrong gain value\n"); + } else if (((leftChannelMode != AMP_OFF) + && (leftChannelMode != VOLTAGE_TO_VOLTAGE) + && (leftChannelMode != CURRENT_TO_VOLTAGE)) + || ((rightChannelMode != VOLTAGE_TO_VOLTAGE) + && (rightChannelMode != CURRENT_TO_VOLTAGE) + && (rightChannelMode != AMP_OFF))) { + rc = PMIC_PARAMETER_ERROR; + pr_debug("VCODEC set record gain - wrong amp mode\n"); + } else { + if (vCodec.leftChannelMic.mic == MIC1_LEFT) { + reg_mask = SET_BITS(regAUDIO_TX, AMC1LITOV, 1) | + SET_BITS(regAUDIO_TX, PGATXL, 31); + if (leftChannelMode == VOLTAGE_TO_VOLTAGE) { + reg_write = + SET_BITS(regAUDIO_TX, AMC1LITOV, 0); + } else { + reg_write = + SET_BITS(regAUDIO_TX, AMC1LITOV, 1); + } + reg_write |= + SET_BITS(regAUDIO_TX, PGATXL, + leftChannelGain); + } + if (vCodec.rightChannelMic.mic == MIC1_RIGHT_MIC_MONO) { + reg_mask |= + SET_BITS(regAUDIO_TX, AMC1RITOV, + 1) | SET_BITS(regAUDIO_TX, PGATXR, + 31); + if (rightChannelMode == VOLTAGE_TO_VOLTAGE) { + reg_write |= + SET_BITS(regAUDIO_TX, AMC1RITOV, 0); + } else { + reg_write |= + SET_BITS(regAUDIO_TX, AMC1RITOV, 1); + } + reg_write |= + SET_BITS(regAUDIO_TX, PGATXR, + rightChannelGain); + } else if (vCodec.rightChannelMic.mic == MIC2_AUX) { + reg_mask |= SET_BITS(regAUDIO_TX, AMC2ITOV, 1); + reg_mask |= SET_BITS(regAUDIO_TX, PGATXR, 31); + if (rightChannelMode == VOLTAGE_TO_VOLTAGE) { + reg_write |= + SET_BITS(regAUDIO_TX, AMC2ITOV, 0); + } else { + reg_write |= + SET_BITS(regAUDIO_TX, AMC2ITOV, 1); + } + reg_write |= + SET_BITS(regAUDIO_TX, PGATXR, + rightChannelGain); + } else if (vCodec.rightChannelMic.mic == TXIN_EXT) { + reg_mask |= SET_BITS(regAUDIO_TX, PGATXR, 31); + /* No current to voltage option for TX IN amplifier */ + reg_write |= + SET_BITS(regAUDIO_TX, PGATXR, + rightChannelGain); + } + + if (reg_mask == 0) { + } else { + rc = pmic_write_reg(REG_AUDIO_TX, + reg_write, reg_mask); + reg_write = + SET_BITS(regAUDIO_TX, PGATXL, + leftChannelGain); + reg_mask = SET_BITS(regAUDIO_TX, PGATXL, 31); + rc = pmic_write_reg(REG_AUDIO_TX, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("MIC amp mode and gain set\n"); + vCodec.leftChannelMic.ampMode = + leftChannelMode; + vCodec.leftChannelMic.gain = + leftChannelGain; + vCodec.rightChannelMic.ampMode = + rightChannelMode; + vCodec.rightChannelMic.gain = + rightChannelGain; + + } + } + } + } + + /* Exit critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current microphone input amplifier mode and gain level. + * + * This function gets the current microphone input amplifier operating mode + * and gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftChannelMode The left microphone input amplifier mode. + * @param leftChannelGain The left microphone input amplifier gain level. + * @param rightChannelMode The right microphone input amplifier mode. + * @param rightChannelGain The right microphone input amplifier gain + * level. + * + * @retval PMIC_SUCCESS If the microphone input amplifier modes + * and gain levels were successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input amplifier modes + * and gain levels could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_record_gain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_MIC_AMP_MODE * + const leftChannelMode, + PMIC_AUDIO_MIC_GAIN * + const leftChannelGain, + PMIC_AUDIO_MIC_AMP_MODE * + const rightChannelMode, + PMIC_AUDIO_MIC_GAIN * + const rightChannelGain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE) && + (leftChannelMode != (PMIC_AUDIO_MIC_AMP_MODE *) NULL) && + (leftChannelGain != (PMIC_AUDIO_MIC_GAIN *) NULL) && + (rightChannelMode != (PMIC_AUDIO_MIC_AMP_MODE *) NULL) && + (rightChannelGain != (PMIC_AUDIO_MIC_GAIN *) NULL)) { + *leftChannelMode = vCodec.leftChannelMic.ampMode; + *leftChannelGain = vCodec.leftChannelMic.gain; + *rightChannelMode = vCodec.rightChannelMic.ampMode; + *rightChannelGain = vCodec.rightChannelMic.gain; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Enable a microphone bias circuit. + * + * This function enables one of the available microphone bias circuits. + * + * @param handle Device handle from pmic_audio_open() call. + * @param biasCircuit The microphone bias circuit to be enabled. + * + * @retval PMIC_SUCCESS If the microphone bias circuit was + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or selected microphone bias + * circuit was invalid. + * @retval PMIC_ERROR If the microphone bias circuit could not + * be enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_micbias(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_BIAS + biasCircuit) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (biasCircuit & MIC_BIAS1) { + reg_write = SET_BITS(regAUDIO_TX, MC1BEN, 1); + reg_mask = SET_BITS(regAUDIO_TX, MC1BEN, 1); + } + if (biasCircuit & MIC_BIAS2) { + reg_write |= SET_BITS(regAUDIO_TX, MC2BEN, 1); + reg_mask |= SET_BITS(regAUDIO_TX, MC2BEN, 1); + } + if (reg_mask != 0) { + rc = pmic_write_reg(REG_AUDIO_TX, reg_write, reg_mask); + } + } + + return rc; +} + +/*! + * @brief Disable a microphone bias circuit. + * + * This function disables one of the available microphone bias circuits. + * + * @param handle Device handle from pmic_audio_open() call. + * @param biasCircuit The microphone bias circuit to be disabled. + * + * @retval PMIC_SUCCESS If the microphone bias circuit was + * successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or selected microphone bias + * circuit was invalid. + * @retval PMIC_ERROR If the microphone bias circuit could not + * be disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_micbias(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_BIAS + biasCircuit) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (biasCircuit & MIC_BIAS1) { + reg_mask = SET_BITS(regAUDIO_TX, MC1BEN, 1); + } + + if (biasCircuit & MIC_BIAS2) { + reg_mask |= SET_BITS(regAUDIO_TX, MC2BEN, 1); + } + + if (reg_mask != 0) { + rc = pmic_write_reg(REG_AUDIO_TX, reg_write, reg_mask); + } + } + + return rc; +} + +/*@}*/ + +/************************************************************************* + * Audio Playback Using the Voice CODEC. + ************************************************************************* + */ + +/*! + * @name Audio Playback Using the Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice CODEC + * to perform audio playback. + */ +/*@{*/ + +/*! + * @brief Configure and enable the Voice CODEC mixer. + * + * This function configures and enables the Voice CODEC mixer. + * + * @param handle Device handle from pmic_audio_open() call. + * @param rxSecondaryTimeslot The timeslot used for the secondary audio + * channel. + * @param gainIn The secondary audio channel gain level. + * @param gainOut The mixer output gain level. + * + * @retval PMIC_SUCCESS If the Voice CODEC mixer was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mixer configuration + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC mixer could not be + * reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_mixer(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_TIMESLOT + rxSecondaryTimeslot, + const PMIC_AUDIO_VCODEC_MIX_IN_GAIN + gainIn, + const PMIC_AUDIO_VCODEC_MIX_OUT_GAIN + gainOut) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + if (!((rxSecondaryTimeslot >= USE_TS0) + && (rxSecondaryTimeslot <= USE_TS3))) { + pr_debug + ("VCODEC enable mixer - wrong sec rx timeslot\n"); + } else if (!((gainIn >= VCODEC_NO_MIX) + && (gainIn <= VCODEC_MIX_IN_MINUS_12DB))) { + pr_debug("VCODEC enable mixer - wrong mix in gain\n"); + + } else if (!((gainOut >= VCODEC_MIX_OUT_0DB) + && (gainOut <= VCODEC_MIX_OUT_MINUS_6DB))) { + pr_debug("VCODEC enable mixer - wrong mix out gain\n"); + } else { + + reg_mask = SET_BITS(regSSI_NETWORK, CDCRXSECSLOT, 3) | + SET_BITS(regSSI_NETWORK, CDCRXSECGAIN, 3) | + SET_BITS(regSSI_NETWORK, CDCSUMGAIN, 1); + reg_write = + SET_BITS(regSSI_NETWORK, CDCRXSECSLOT, + rxSecondaryTimeslot) | + SET_BITS(regSSI_NETWORK, CDCRXSECGAIN, + gainIn) | SET_BITS(regSSI_NETWORK, + CDCSUMGAIN, gainOut); + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + reg_write, reg_mask); + if (rc == PMIC_SUCCESS) { + pr_debug("Vcodec mixer enabled\n"); + } + } + } + + return rc; +} + +/*! + * @brief Disable the Voice CODEC mixer. + * + * This function disables the Voice CODEC mixer. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC mixer was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC mixer could not be + * disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_mixer(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask; + + if ((handle == vCodec.handle) && (vCodec.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regSSI_NETWORK, CDCRXSECGAIN, 1); + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + VCODEC_NO_MIX, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Vcodec mixer disabled\n"); + } + + } + + return rc; +} + +/*@}*/ + +/************************************************************************* + * Audio Playback Using the Stereo DAC. + ************************************************************************* + */ + +/*! + * @name Audio Playback Using the Stereo DAC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Stereo DAC + * to perform audio playback. + */ +/*@{*/ + +/*! + * @brief Configure and enable the Stereo DAC mixer. + * + * This function configures and enables the Stereo DAC mixer. + * + * @param handle Device handle from pmic_audio_open() call. + * @param rxSecondaryTimeslot The timeslot used for the secondary audio + * channel. + * @param gainIn The secondary audio channel gain level. + * @param gainOut The mixer output gain level. + * + * @retval PMIC_SUCCESS If the Stereo DAC mixer was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mixer configuration + * was invalid. + * @retval PMIC_ERROR If the Stereo DAC mixer could not be + * reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_stdac_enable_mixer(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_TIMESLOTS + rxSecondaryTimeslot, + const PMIC_AUDIO_STDAC_MIX_IN_GAIN + gainIn, + const PMIC_AUDIO_STDAC_MIX_OUT_GAIN + gainOut) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + if (!((rxSecondaryTimeslot >= USE_TS0_TS1) + && (rxSecondaryTimeslot <= USE_TS6_TS7))) { + rc = PMIC_PARAMETER_ERROR; + pr_debug("STDAC enable mixer - wrong sec timeslot\n"); + } else if (!((gainIn >= STDAC_NO_MIX) + && (gainIn <= STDAC_MIX_IN_MINUS_12DB))) { + rc = PMIC_PARAMETER_ERROR; + pr_debug("STDAC enable mixer - wrong mix in gain\n"); + } else if (!((gainOut >= STDAC_MIX_OUT_0DB) + && (gainOut <= STDAC_MIX_OUT_MINUS_6DB))) { + rc = PMIC_PARAMETER_ERROR; + pr_debug("STDAC enable mixer - wrong mix out gain\n"); + } else { + + reg_mask = SET_BITS(regSSI_NETWORK, STDCRXSECSLOT, 3) | + SET_BITS(regSSI_NETWORK, STDCRXSECGAIN, 3) | + SET_BITS(regSSI_NETWORK, STDCSUMGAIN, 1); + reg_write = + SET_BITS(regSSI_NETWORK, STDCRXSECSLOT, + rxSecondaryTimeslot) | + SET_BITS(regSSI_NETWORK, STDCRXSECGAIN, + gainIn) | SET_BITS(regSSI_NETWORK, + STDCSUMGAIN, gainOut); + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + reg_write, reg_mask); + if (rc == PMIC_SUCCESS) { + pr_debug("STDAC mixer enabled\n"); + } + } + + } + + return rc; +} + +/*! + * @brief Disable the Stereo DAC mixer. + * + * This function disables the Stereo DAC mixer. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Stereo DAC mixer was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC mixer could not be + * disabled. + */ +PMIC_STATUS pmic_audio_stdac_disable_mixer(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_write = 0; + const unsigned int reg_mask = + SET_BITS(regSSI_NETWORK, STDCRXSECGAIN, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, reg_write, reg_mask); + } + + return rc; +} + +/*@}*/ + +/************************************************************************* + * Audio Output Control + ************************************************************************* + */ + +/*! + * @name Audio Output Section Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC audio output + * section to support playback. + */ +/*@{*/ + +/*! + * @brief Select the audio output ports. + * + * This function selects the audio output ports to be used. This also enables + * the appropriate output amplifiers. + * + * @param handle Device handle from pmic_audio_open() call. + * @param port The audio output ports to be used. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * acquired. + * @retval PMIC_PARAMETER_ERROR If the handle or output ports were + * invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * acquired. + */ +PMIC_STATUS pmic_audio_output_set_port(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PORT port) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((port == MONO_ALERT) || (port == MONO_EXTOUT)) { + rc = PMIC_NOT_SUPPORTED; + } else { + if (((handle == stDAC.handle) + && (stDAC.handleState == HANDLE_IN_USE)) + || ((handle == extStereoIn.handle) + && (extStereoIn.handleState == HANDLE_IN_USE)) + || ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE) + && (audioOutput.vCodecOut == VCODEC_MIXER_OUT))) { + /* Stereo signal and MIXER source needs to be routed to the port + / Avoid Codec direct out */ + + if (port & MONO_SPEAKER) { + reg_mask = SET_BITS(regAUDIO_RX_0, ASPEN, 1) | + SET_BITS(regAUDIO_RX_0, ASPSEL, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ASPEN, 1) | + SET_BITS(regAUDIO_RX_0, ASPSEL, 1); + } + if (port & MONO_LOUDSPEAKER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, ALSPEN, 1) | + SET_BITS(regAUDIO_RX_0, ALSPREF, 1) | + SET_BITS(regAUDIO_RX_0, ALSPSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ALSPEN, + 1) | SET_BITS(regAUDIO_RX_0, + ALSPREF, + 1) | + SET_BITS(regAUDIO_RX_0, ALSPSEL, 1); + } + if (port & STEREO_HEADSET_LEFT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1) | + SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, AHSLEN, + 1) | SET_BITS(regAUDIO_RX_0, + AHSSEL, 1); + } + if (port & STEREO_HEADSET_RIGHT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1) | + SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, AHSREN, + 1) | SET_BITS(regAUDIO_RX_0, + AHSSEL, 1); + } + if (port & STEREO_OUT_LEFT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + } + if (port & STEREO_OUT_RIGHT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + } + if (port & STEREO_LEFT_LOW_POWER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, LSPLEN, 1); + + reg_write |= SET_BITS(regAUDIO_RX_0, LSPLEN, 1); + } + } else if ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE) + && (audioOutput.vCodecOut = VCODEC_DIRECT_OUT)) { + if (port & MONO_SPEAKER) { + reg_mask = SET_BITS(regAUDIO_RX_0, ASPEN, 1) | + SET_BITS(regAUDIO_RX_0, ASPSEL, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ASPEN, 1) | + SET_BITS(regAUDIO_RX_0, ASPSEL, 0); + } + if (port & MONO_LOUDSPEAKER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, ALSPEN, 1) | + SET_BITS(regAUDIO_RX_0, ALSPREF, 1) | + SET_BITS(regAUDIO_RX_0, ALSPSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ALSPEN, + 1) | SET_BITS(regAUDIO_RX_0, + ALSPREF, + 1) | + SET_BITS(regAUDIO_RX_0, ALSPSEL, 0); + } + + if (port & STEREO_HEADSET_LEFT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1) | + SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, AHSLEN, + 1) | SET_BITS(regAUDIO_RX_0, + AHSSEL, 0); + } + if (port & STEREO_HEADSET_RIGHT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1) | + SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, AHSREN, + 1) | SET_BITS(regAUDIO_RX_0, + AHSSEL, 0); + } + if (port & STEREO_OUT_LEFT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 0); + } + if (port & STEREO_OUT_RIGHT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, + 1) | SET_BITS(regAUDIO_RX_0, + ARXOUTSEL, 0); + } + if (port & MONO_CDCOUT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, CDCOUTEN, 1); + + reg_write |= + SET_BITS(regAUDIO_RX_0, CDCOUTEN, 1); + } + } + + if (reg_mask == 0) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("output ports enabled\n"); + audioOutput.outputPort = port; + + } + } + } + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Deselect/disable the audio output ports. + * + * This function disables the audio output ports that were previously enabled + * by calling pmic_audio_output_set_port(). + * + * @param handle Device handle from pmic_audio_open() call. + * @param port The audio output ports to be disabled. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or output ports were + * invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * disabled. + */ +PMIC_STATUS pmic_audio_output_clear_port(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PORT port) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((port == MONO_ALERT) || (port == MONO_EXTOUT)) { + rc = PMIC_NOT_SUPPORTED; + } else { + if (((handle == stDAC.handle) + && (stDAC.handleState == HANDLE_IN_USE)) + || ((handle == extStereoIn.handle) + && (extStereoIn.handleState == HANDLE_IN_USE)) + || ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE) + && (audioOutput.vCodecOut = VCODEC_MIXER_OUT))) { + /* Stereo signal and MIXER source needs to be routed to the port / + Avoid Codec direct out */ + if (port & MONO_SPEAKER) { + reg_mask = SET_BITS(regAUDIO_RX_0, ASPEN, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ASPEN, 0); + } + if (port & MONO_LOUDSPEAKER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, ALSPEN, 1) | + SET_BITS(regAUDIO_RX_0, ALSPREF, 1); + + reg_write |= + SET_BITS(regAUDIO_RX_0, ALSPEN, + 0) | SET_BITS(regAUDIO_RX_0, + ALSPREF, 0); + + } + if (port & STEREO_HEADSET_LEFT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSLEN, 0); + } + if (port & STEREO_HEADSET_RIGHT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSREN, 0); + } + if (port & STEREO_OUT_LEFT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, 0); + } + if (port & STEREO_OUT_RIGHT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, 0); + } + if (port & STEREO_LEFT_LOW_POWER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, LSPLEN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, LSPLEN, 0); + } + } else if ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE) + && (audioOutput.vCodecOut = VCODEC_DIRECT_OUT)) { + if (port & MONO_SPEAKER) { + reg_mask = SET_BITS(regAUDIO_RX_0, ASPEN, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ASPEN, 0); + } + if (port & MONO_LOUDSPEAKER) { + reg_mask |= SET_BITS(regAUDIO_RX_0, ALSPEN, 1) | + SET_BITS(regAUDIO_RX_0, ALSPREF, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ALSPEN, + 0) | SET_BITS(regAUDIO_RX_0, + ALSPREF, 0); + } + if (port & STEREO_HEADSET_LEFT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSLEN, 0); + } + if (port & STEREO_HEADSET_RIGHT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSREN, 0); + } + if (port & STEREO_OUT_LEFT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTLEN, 0); + } + if (port & STEREO_OUT_RIGHT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, ARXOUTREN, 0); + } + if (port & MONO_CDCOUT) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, CDCOUTEN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, CDCOUTEN, 0); + } + } +#ifdef CONFIG_HEADSET_DETECT_ENABLE + + if (port & STEREO_HEADSET_LEFT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSLEN, 0); + } + if (port & STEREO_HEADSET_RIGHT) { + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSREN, 0); + } +#endif + + if (reg_mask == 0) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write, reg_mask); + if (rc == PMIC_SUCCESS) { + pr_debug("output ports disabled\n"); + audioOutput.outputPort &= ~port; + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current audio output ports. + * + * This function retrieves the audio output ports that are currently being + * used. + * + * @param handle Device handle from pmic_audio_open() call. + * @param port The audio output ports currently being used. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_output_get_port(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_PORT * const port) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) && + (port != (PMIC_AUDIO_OUTPUT_PORT *) NULL)) { + *port = audioOutput.outputPort; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the gain level for the external stereo inputs. + * + * This function sets the gain levels for the external stereo inputs. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The external stereo input gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the gain level could not be set. + */ +PMIC_STATUS pmic_audio_output_set_stereo_in_gain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STEREO_IN_GAIN + gain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1) | + SET_BITS(regAUDIO_RX_1, ARXIN, 1); + unsigned int reg_write = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + /* The ARX amplifier for stereo is also enabled over here */ + + if ((gain == STEREO_IN_GAIN_0DB) || (gain == STEREO_IN_GAIN_PLUS_18DB)) { + if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + + if (gain == STEREO_IN_GAIN_0DB) { + reg_write |= SET_BITS(regAUDIO_RX_1, ARXIN, 1); + } else { + reg_write |= SET_BITS(regAUDIO_RX_1, ARXIN, 0); + } + + rc = pmic_write_reg(REG_AUDIO_RX_1, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Ext stereo gain set\n"); + extStereoIn.inputGain = gain; + + } + + } else { + rc = PMIC_PARAMETER_ERROR; + } + } + + return rc; +} + +/*! + * @brief Get the current gain level for the external stereo inputs. + * + * This function retrieves the current gain levels for the external stereo + * inputs. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The current external stereo input gain + * level. + * + * @retval PMIC_SUCCESS If the gain level was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the gain level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_stereo_in_gain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STEREO_IN_GAIN * + const gain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE) && + (gain != (PMIC_AUDIO_STEREO_IN_GAIN *) NULL)) { + *gain = extStereoIn.inputGain; + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Set the output PGA gain level. + * + * This function sets the audio output PGA gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The output PGA gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the gain level could not be set. + */ +PMIC_STATUS pmic_audio_output_set_pgaGain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PGA_GAIN gain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = 0; + unsigned int reg_gain; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (!((gain >= OUTPGA_GAIN_MINUS_33DB) + && (gain <= OUTPGA_GAIN_PLUS_6DB))) { + rc = PMIC_NOT_SUPPORTED; + pr_debug("output set PGA gain - wrong gain value\n"); + } else { + reg_gain = gain + 2; + if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, ARXIN, 15) | + SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, ARXIN, reg_gain) | + SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, PGARX, 15); + reg_write = SET_BITS(regAUDIO_RX_1, PGARX, reg_gain); + } else if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, PGAST, 15); + reg_write = SET_BITS(regAUDIO_RX_1, PGAST, reg_gain); + } + + if (reg_mask == 0) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_1, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Output PGA gains set\n"); + + if (handle == stDAC.handle) { + audioOutput.stDacoutputPGAGain = gain; + } else if (handle == vCodec.handle) { + audioOutput.vCodecoutputPGAGain = gain; + } else { + audioOutput.extStereooutputPGAGain = + gain; + } + } else { + pr_debug + ("Error writing PGA gains to register\n"); + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the output PGA gain level. + * + * This function retrieves the current audio output PGA gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The current output PGA gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the gain level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_pgaGain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_PGA_GAIN * + const gain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (gain != (PMIC_AUDIO_OUTPUT_PGA_GAIN *) NULL) { + if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + *gain = audioOutput.extStereooutputPGAGain; + rc = PMIC_SUCCESS; + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + *gain = audioOutput.vCodecoutputPGAGain; + rc = PMIC_SUCCESS; + } else if ((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) { + *gain = audioOutput.stDacoutputPGAGain; + rc = PMIC_SUCCESS; + } else { + rc = PMIC_PARAMETER_ERROR; + } + } else { + rc = PMIC_PARAMETER_ERROR; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Enable the output mixer. + * + * This function enables the output mixer for the audio stream that + * corresponds to the current handle (i.e., the Voice CODEC, Stereo DAC, or + * the external stereo inputs). + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mixer was successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mixer could not be enabled. + */ +PMIC_STATUS pmic_audio_output_enable_mixer(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + unsigned int reg_mask_mix = 0; + unsigned int reg_write_mix = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if (((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE))) { + reg_mask = SET_BITS(regAUDIO_RX_1, PGASTEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, PGASTEN, 1); + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDSTDC, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDSTDC, 1); + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, PGARXEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, PGARXEN, 1); + audioOutput.vCodecOut = VCODEC_MIXER_OUT; + + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDCDC, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDCDC, 1); + } else if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + } + + if (reg_mask == 0) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_1, reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write_mix, reg_mask_mix); + if (rc == PMIC_SUCCESS) { + pr_debug("Output PGA mixers enabled\n"); + rc = PMIC_SUCCESS; + } + + } else { + pr_debug("Error writing mixer enable to register\n"); + } + + } + + return rc; +} + +/*! + * @brief Disable the output mixer. + * + * This function disables the output mixer for the audio stream that + * corresponds to the current handle (i.e., the Voice CODEC, Stereo DAC, or + * the external stereo inputs). + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mixer was successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mixer could not be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_mixer(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + + unsigned int reg_mask_mix = 0; + unsigned int reg_write_mix = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + if (((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE))) { + /*reg_mask = SET_BITS(regAUDIO_RX_1, PGASTEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, PGASTEN, 0); */ + + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDSTDC, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDSTDC, 0); + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + reg_mask = SET_BITS(regAUDIO_RX_1, PGARXEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, PGARXEN, 0); + audioOutput.vCodecOut = VCODEC_DIRECT_OUT; + + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDCDC, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDCDC, 0); + } else if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + /*reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, ARXINEN, 0); */ + + reg_mask_mix = SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + reg_write_mix = SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + } + + if (reg_mask == 0) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_1, reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write_mix, reg_mask_mix); + if (rc == PMIC_SUCCESS) { + pr_debug("Output PGA mixers disabled\n"); + } + } + } + return rc; +} + +/*! + * @brief Configure and enable the output balance amplifiers. + * + * This function configures and enables the output balance amplifiers. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftGain The desired left channel gain level. + * @param rightGain The desired right channel gain level. + * + * @retval PMIC_SUCCESS If the output balance amplifiers were + * successfully configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or gain levels were invalid. + * @retval PMIC_ERROR If the output balance amplifiers could not + * be reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_output_set_balance(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_BALANCE_GAIN + leftGain, + const PMIC_AUDIO_OUTPUT_BALANCE_GAIN + rightGain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + unsigned int reg_mask_ch = 0; + unsigned int reg_write_ch = 0; + + /* No critical section required here since we are not updating any + * global data. + */ + + if (!((leftGain >= BAL_GAIN_MINUS_21DB) && (leftGain <= BAL_GAIN_0DB))) { + rc = PMIC_PARAMETER_ERROR; + } else if (!((rightGain >= BAL_GAIN_MINUS_21DB) + && (rightGain <= BAL_GAIN_0DB))) { + rc = PMIC_PARAMETER_ERROR; + } else { + if (((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) { + /* In mc13783 only one channel can be attenuated wrt the other. + * It is not possible to specify attenuation for both + * This function will return an error if both channels + * are required to be attenuated + * The BALLR bit is set/reset depending on whether leftGain + * or rightGain is specified*/ + if ((rightGain == BAL_GAIN_0DB) + && (leftGain == BAL_GAIN_0DB)) { + /* Nothing to be done */ + } else if ((rightGain != BAL_GAIN_0DB) + && (leftGain == BAL_GAIN_0DB)) { + /* Attenuate right channel */ + reg_mask = SET_BITS(regAUDIO_RX_1, BAL, 7); + reg_mask_ch = SET_BITS(regAUDIO_RX_1, BALLR, 1); + reg_write = + SET_BITS(regAUDIO_RX_1, BAL, + (BAL_GAIN_0DB - rightGain)); + /* The enum and the register values are reversed in order .. */ + reg_write_ch = + SET_BITS(regAUDIO_RX_1, BALLR, 0); + /* BALLR = 0 selects right channel for atten */ + } else if ((rightGain == BAL_GAIN_0DB) + && (leftGain != BAL_GAIN_0DB)) { + /* Attenuate left channel */ + + reg_mask = SET_BITS(regAUDIO_RX_1, BAL, 7); + reg_mask_ch = SET_BITS(regAUDIO_RX_1, BALLR, 1); + reg_write = + SET_BITS(regAUDIO_RX_1, BAL, + (BAL_GAIN_0DB - leftGain)); + reg_write_ch = + SET_BITS(regAUDIO_RX_1, BALLR, 1); + /* BALLR = 1 selects left channel for atten */ + } else { + rc = PMIC_PARAMETER_ERROR; + } + + if ((reg_mask == 0) || (reg_mask_ch == 0)) { + + } else { + rc = pmic_write_reg(REG_AUDIO_RX_1, + reg_write_ch, reg_mask_ch); + + if (rc == PMIC_SUCCESS) { + rc = pmic_write_reg(REG_AUDIO_RX_1, + reg_write, + reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug + ("Output balance attenuation set\n"); + audioOutput.balanceLeftGain = + leftGain; + audioOutput.balanceRightGain = + rightGain; + } + } + } + } + } + return rc; +} + +/*! + * @brief Get the current output balance amplifier gain levels. + * + * This function retrieves the current output balance amplifier gain levels. + * + * @param handle Device handle from pmic_audio_open() call. + * @param leftGain The current left channel gain level. + * @param rightGain The current right channel gain level. + * + * @retval PMIC_SUCCESS If the output balance amplifier gain levels + * were successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the output balance amplifier gain levels + * could be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_balance(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_BALANCE_GAIN * + const leftGain, + PMIC_AUDIO_OUTPUT_BALANCE_GAIN * + const rightGain) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) && + ((leftGain != (PMIC_AUDIO_OUTPUT_BALANCE_GAIN *) NULL) && + (rightGain != (PMIC_AUDIO_OUTPUT_BALANCE_GAIN *) NULL))) { + *leftGain = audioOutput.balanceLeftGain; + *rightGain = audioOutput.balanceRightGain; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Configure and enable the output mono adder. + * + * This function configures and enables the output mono adder. + * + * @param handle Device handle from pmic_audio_open() call. + * @param mode The desired mono adder operating mode. + * + * @retval PMIC_SUCCESS If the mono adder was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mono adder mode was + * invalid. + * @retval PMIC_ERROR If the mono adder could not be reconfigured + * or enabled. + */ +PMIC_STATUS pmic_audio_output_enable_mono_adder(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MONO_ADDER_MODE + mode) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_write = 0; + unsigned int reg_mask = SET_BITS(regAUDIO_RX_1, MONO, 3); + + /* No critical section required here since we are not updating any + * global data. + */ + + if ((mode >= MONO_ADDER_OFF) && (mode <= STEREO_OPPOSITE_PHASE)) { + if (((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) { + if (mode == MONO_ADDER_OFF) { + reg_write = SET_BITS(regAUDIO_RX_1, MONO, 0); + } else if (mode == MONO_ADD_LEFT_RIGHT) { + reg_write = SET_BITS(regAUDIO_RX_1, MONO, 2); + } else if (mode == MONO_ADD_OPPOSITE_PHASE) { + reg_write = SET_BITS(regAUDIO_RX_1, MONO, 3); + } else { /* stereo opposite */ + + reg_write = SET_BITS(regAUDIO_RX_1, MONO, 1); + } + + rc = pmic_write_reg(REG_AUDIO_RX_1, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Output mono adder mode set\n"); + + } + + } else { + rc = PMIC_PARAMETER_ERROR; + } + } else { + rc = PMIC_PARAMETER_ERROR; + } + return rc; +} + +/*! + * @brief Disable the output mono adder. + * + * This function disables the output mono adder. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mono adder was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mono adder could not be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_mono_adder(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_write = 0; + const unsigned int reg_mask = SET_BITS(regAUDIO_RX_1, MONO, 3); + + /* No critical section required here since we are not updating any + * global data. + */ + + if (((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) { + rc = pmic_write_reg(REG_AUDIO_RX_1, reg_write, reg_mask); + } + + return rc; +} + +/*! + * @brief Configure the mono adder output gain level. + * + * This function configures the mono adder output amplifier gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The desired output gain level. + * + * @retval PMIC_SUCCESS If the mono adder output amplifier gain + * level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the mono adder output amplifier gain + * level could not be reconfigured. + */ +PMIC_STATUS pmic_audio_output_set_mono_adder_gain(const PMIC_AUDIO_HANDLE + handle, + const + PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN + gain) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; +} + +/*! + * @brief Get the current mono adder output gain level. + * + * This function retrieves the current mono adder output amplifier gain level. + * + * @param handle Device handle from pmic_audio_open() call. + * @param gain The current output gain level. + * + * @retval PMIC_SUCCESS If the mono adder output amplifier gain + * level was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mono adder output amplifier gain + * level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_mono_adder_gain(const PMIC_AUDIO_HANDLE + handle, + PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN + * const gain) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + return rc; +} + +/*! + * @brief Set various audio output section options. + * + * This function sets one or more audio output section configuration + * options. The currently supported options include whether to disable + * the non-inverting mono speaker output, enabling the loudspeaker common + * bias circuit, enabling detection of headset insertion/removal, and + * whether to automatically disable the headset amplifiers when a headset + * insertion/removal has been detected. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The desired audio output section + * configuration options to be set. + * + * @retval PMIC_SUCCESS If the desired configuration options were + * all successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or configuration options + * were invalid. + * @retval PMIC_ERROR If the desired configuration options + * could not be set. + */ +PMIC_STATUS pmic_audio_output_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_CONFIG config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) { + if (config & MONO_SPEAKER_INVERT_OUT_ONLY) { + /* If this is one of the parameters */ + rc = PMIC_NOT_SUPPORTED; + } else { + if (config & MONO_LOUDSPEAKER_COMMON_BIAS) { + reg_mask = SET_BITS(regAUDIO_RX_0, ALSPREF, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ALSPREF, 1); + } + if (config & HEADSET_DETECT_ENABLE) { + reg_mask |= SET_BITS(regAUDIO_RX_0, HSDETEN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, HSDETEN, 1); + } + if (config & STEREO_HEADSET_AMP_AUTO_DISABLE) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + } + + if (reg_mask == 0) { + rc = PMIC_PARAMETER_ERROR; + } else { + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Output config set\n"); + audioOutput.config |= config; + + } + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Clear various audio output section options. + * + * This function clears one or more audio output section configuration + * options. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The desired audio output section + * configuration options to be cleared. + * + * @retval PMIC_SUCCESS If the desired configuration options were + * all successfully cleared. + * @retval PMIC_PARAMETER_ERROR If the handle or configuration options + * were invalid. + * @retval PMIC_ERROR If the desired configuration options + * could not be cleared. + */ +PMIC_STATUS pmic_audio_output_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_CONFIG + config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + /*unsigned int reg_write_RX = 0; + unsigned int reg_mask_RX = 0; + unsigned int reg_write_TX = 0; + unsigned int reg_mask_TX = 0; */ + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if (((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) { + if (config & MONO_SPEAKER_INVERT_OUT_ONLY) { + /* If this is one of the parameters */ + rc = PMIC_NOT_SUPPORTED; + } else { + if (config & MONO_LOUDSPEAKER_COMMON_BIAS) { + reg_mask = SET_BITS(regAUDIO_RX_0, ALSPREF, 1); + reg_write = SET_BITS(regAUDIO_RX_0, ALSPREF, 0); + } + + if (config & HEADSET_DETECT_ENABLE) { + reg_mask |= SET_BITS(regAUDIO_RX_0, HSDETEN, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, HSDETEN, 0); + } + + if (config & STEREO_HEADSET_AMP_AUTO_DISABLE) { + reg_mask |= + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 1); + reg_write |= + SET_BITS(regAUDIO_RX_0, HSDETAUTOB, 0); + } + + if (reg_mask == 0) { + rc = PMIC_PARAMETER_ERROR; + } else { + rc = pmic_write_reg(REG_AUDIO_RX_0, + reg_write, reg_mask); + + if (rc == PMIC_SUCCESS) { + pr_debug("Output config cleared\n"); + audioOutput.config &= ~config; + + } + } + } + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Get the current audio output section options. + * + * This function retrieves the current audio output section configuration + * option settings. + * + * @param handle Device handle from pmic_audio_open() call. + * @param config The current audio output section + * configuration option settings. + * + * @retval PMIC_SUCCESS If the current configuration options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the current configuration options + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_CONFIG * + const config) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Use a critical section to ensure a consistent hardware state. */ + if (down_interruptible(&mutex)) + return PMIC_SYSTEM_ERROR_EINTR; + + if ((((handle == stDAC.handle) && + (stDAC.handleState == HANDLE_IN_USE)) || + ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) || + ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE))) && + (config != (PMIC_AUDIO_OUTPUT_CONFIG *) NULL)) { + *config = audioOutput.config; + + rc = PMIC_SUCCESS; + } + + /* Exit the critical section. */ + up(&mutex); + + return rc; +} + +/*! + * @brief Enable the phantom ground circuit that is used to help identify + * the type of headset that has been inserted. + * + * This function enables the phantom ground circuit that is used to help + * identify the type of headset (e.g., stereo or mono) that has been inserted. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the phantom ground circuit was + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the phantom ground circuit could not + * be enabled. + */ +PMIC_STATUS pmic_audio_output_enable_phantom_ground() +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_mask = SET_BITS(regAUDIO_RX_0, HSPGDIS, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + rc = pmic_write_reg(REG_AUDIO_RX_0, 0, reg_mask); + if (rc == PMIC_SUCCESS) { + pr_debug("Phantom ground enabled\n"); + + } + return rc; +} + +/*! + * @brief Disable the phantom ground circuit that is used to help identify + * the type of headset that has been inserted. + * + * This function disables the phantom ground circuit that is used to help + * identify the type of headset (e.g., stereo or mono) that has been inserted. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the phantom ground circuit was + * successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the phantom ground circuit could not + * be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_phantom_ground() +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + const unsigned int reg_mask = SET_BITS(regAUDIO_RX_0, HSPGDIS, 1); + + /* No critical section required here since we are not updating any + * global data. + */ + + rc = pmic_write_reg(REG_AUDIO_RX_0, 1, reg_mask); + if (rc == PMIC_SUCCESS) { + pr_debug("Phantom ground disabled\n"); + + } + return rc; +} + +/*@}*/ + +/************************************************************************** + * Static functions. + ************************************************************************** + */ + +/*! + * @name Audio Driver Internal Support Functions + * These non-exported internal functions are used to support the functionality + * of the exported audio APIs. + */ +/*@{*/ + +/*! + * @brief Enables the 5.6V boost for the microphone bias 2 circuit. + * + * This function enables the switching regulator SW3 and configures it to + * provide the 5.6V boost that is required for driving the microphone bias 2 + * circuit when using a 5-pole jack configuration (which is the case for the + * Sphinx board). + * + * @retval PMIC_SUCCESS The 5.6V boost was successfully enabled. + * @retval PMIC_ERROR Failed to enable the 5.6V boost. + */ +/* +static PMIC_STATUS pmic_audio_mic_boost_enable(void) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + + return rc; +} +*/ +/*! + * @brief Disables the 5.6V boost for the microphone bias 2 circuit. + * + * This function disables the switching regulator SW3 to turn off the 5.6V + * boost for the microphone bias 2 circuit. + * + * @retval PMIC_SUCCESS The 5.6V boost was successfully disabled. + * @retval PMIC_ERROR Failed to disable the 5.6V boost. + */ +/* +static PMIC_STATUS pmic_audio_mic_boost_disable(void) +{ + PMIC_STATUS rc = PMIC_NOT_SUPPORTED; + + return rc; +} +*/ + +/*! + * @brief Free a device handle previously acquired by calling pmic_audio_open(). + * + * Terminate further access to the PMIC audio hardware that was previously + * acquired by calling pmic_audio_open(). This now allows another thread to + * successfully call pmic_audio_open() to gain access. + * + * Note that we will shutdown/reset the Voice CODEC or Stereo DAC as well as + * any associated audio input/output components that are no longer required. + * + * Also note that this function should only be called with the mutex already + * acquired. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the close request was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +static PMIC_STATUS pmic_audio_close_handle(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + + /* Match up the handle to the audio device and then close it. */ + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + /* Also shutdown the Stereo DAC hardware. The simplest way to + * do this is to simply call pmic_audio_reset_device() which will + * restore the ST_DAC register to it's initial power-on state. + * + * This will also shutdown the audio output section if no one + * else is still using it. + */ + rc = pmic_audio_reset_device(stDAC.handle); + + if (rc == PMIC_SUCCESS) { + stDAC.handle = AUDIO_HANDLE_NULL; + stDAC.handleState = HANDLE_FREE; + } + } else if ((handle == vCodec.handle) && + (vCodec.handleState == HANDLE_IN_USE)) { + /* Also shutdown the Voice CODEC and audio input hardware. The + * simplest way to do this is to simply call pmic_audio_reset_device() + * which will restore the AUD_CODEC register to it's initial + * power-on state. + * + * This will also shutdown the audio output section if no one + * else is still using it. + */ + rc = pmic_audio_reset_device(vCodec.handle); + if (rc == PMIC_SUCCESS) { + vCodec.handle = AUDIO_HANDLE_NULL; + vCodec.handleState = HANDLE_FREE; + } + } else if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + + /* Call pmic_audio_reset_device() here to shutdown the audio output + * section if no one else is still using it. + */ + rc = pmic_audio_reset_device(extStereoIn.handle); + + if (rc == PMIC_SUCCESS) { + extStereoIn.handle = AUDIO_HANDLE_NULL; + extStereoIn.handleState = HANDLE_FREE; + } + } + + return rc; +} + +/*! + * @brief Reset the selected audio hardware control registers to their + * power on state. + * + * This resets all of the audio hardware control registers currently + * associated with the device handle back to their power on states. For + * example, if the handle is associated with the Stereo DAC and a + * specific output port and output amplifiers, then this function will + * reset all of those components to their initial power on state. + * + * This function can only be called if the mutex has already been acquired. + * + * @param handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the reset operation was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the reset was unsuccessful. + */ +static PMIC_STATUS pmic_audio_reset_device(const PMIC_AUDIO_HANDLE handle) +{ + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + unsigned int reg_mask = 0; + + if ((handle == stDAC.handle) && (stDAC.handleState == HANDLE_IN_USE)) { + /* Also shutdown the audio output section if nobody else is using it. + if ((vCodec.handleState == HANDLE_FREE) && + (extStereoIn.handleState == HANDLE_FREE)) + { + pmic_write_reg(REG_RX_AUD_AMPS, RESET_RX_AUD_AMPS, + REG_FULLMASK); + } */ + + rc = pmic_write_reg(REG_AUDIO_STEREO_DAC, + RESET_ST_DAC, REG_FULLMASK); + + if (rc == PMIC_SUCCESS) { + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + RESET_SSI_NETWORK, + REG_SSI_STDAC_MASK); + if (rc == PMIC_SUCCESS) { + /* Also reset the driver state information to match. Note that we + * keep the device handle and event callback settings unchanged + * since these don't affect the actual hardware and we rely on + * the user to explicitly close the handle or deregister callbacks + */ + stDAC.busID = AUDIO_DATA_BUS_1; + stDAC.protocol = NORMAL_MSB_JUSTIFIED_MODE; + stDAC.protocol_set = false; + stDAC.masterSlave = BUS_MASTER_MODE; + stDAC.numSlots = USE_2_TIMESLOTS; + stDAC.clockIn = CLOCK_IN_CLIA; + stDAC.samplingRate = STDAC_RATE_44_1_KHZ; + stDAC.clockFreq = STDAC_CLI_13MHZ; + stDAC.invert = NO_INVERT; + stDAC.timeslot = USE_TS0_TS1; + stDAC.config = (PMIC_AUDIO_STDAC_CONFIG) 0; + + } + } + } else if ((handle == vCodec.handle) + && (vCodec.handleState == HANDLE_IN_USE)) { + /* Disable the audio input section when disabling the Voice CODEC. */ + pmic_write_reg(REG_AUDIO_TX, RESET_AUDIO_TX, REG_FULLMASK); + + rc = pmic_write_reg(REG_AUDIO_CODEC, + RESET_AUD_CODEC, REG_FULLMASK); + + if (rc == PMIC_SUCCESS) { + rc = pmic_write_reg(REG_AUDIO_SSI_NETWORK, + RESET_SSI_NETWORK, + REG_SSI_VCODEC_MASK); + if (rc == PMIC_SUCCESS) { + + /* Also reset the driver state information to match. Note that we + * keep the device handle and event callback settings unchanged + * since these don't affect the actual hardware and we rely on + * the user to explicitly close the handle or deregister callbacks + */ + vCodec.busID = AUDIO_DATA_BUS_2; + vCodec.protocol = NETWORK_MODE; + vCodec.protocol_set = false; + vCodec.masterSlave = BUS_SLAVE_MODE; + vCodec.numSlots = USE_4_TIMESLOTS; + vCodec.clockIn = CLOCK_IN_CLIB; + vCodec.samplingRate = VCODEC_RATE_8_KHZ; + vCodec.clockFreq = VCODEC_CLI_13MHZ; + vCodec.invert = NO_INVERT; + vCodec.timeslot = USE_TS0; + vCodec.config = + INPUT_HIGHPASS_FILTER | + OUTPUT_HIGHPASS_FILTER; + + } + } + + } else if ((handle == extStereoIn.handle) && + (extStereoIn.handleState == HANDLE_IN_USE)) { + /* Disable the Ext stereo Amplifier and disable it as analog mixer input */ + reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + pmic_write_reg(REG_AUDIO_RX_1, 0, reg_mask); + + reg_mask = SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + pmic_write_reg(REG_AUDIO_RX_0, 0, reg_mask); + + /* We don't need to reset any other registers for this case. */ + rc = PMIC_SUCCESS; + } + + return rc; +} + +/*! + * @brief Deregister the callback function and event mask currently associated + * with an audio device handle. + * + * This function deregisters any existing callback function and event mask for + * the given audio device handle. This is done by either calling the + * pmic_audio_clear_callback() API or by closing the device handle. + * + * Note that this function should only be called with the mutex already + * acquired. We will also acquire the spinlock here to prevent possible + * race conditions with the interrupt handler. + * + * @param[in] callback The current event callback function pointer. + * @param[in] eventMask The current audio event mask. + * + * @retval PMIC_SUCCESS If the callback function and event mask + * were both successfully deregistered. + * @retval PMIC_ERROR If either the callback function or the + * event mask was not successfully + * deregistered. + */ + +static PMIC_STATUS pmic_audio_deregister(void *callback, + PMIC_AUDIO_EVENTS * const eventMask) +{ + unsigned long flags; + pmic_event_callback_t eventNotify; + PMIC_STATUS rc = PMIC_SUCCESS; + + /* Deregister each of the PMIC events that we had previously + * registered for by calling pmic_event_subscribe(). + */ + if (*eventMask & (HEADSET_DETECTED)) { + /* We need to deregister for the A1 amplifier interrupt. */ + eventNotify.func = callback; + eventNotify.param = (void *)(CORE_EVENT_HSDETI); + if (pmic_event_unsubscribe(EVENT_HSDETI, eventNotify) == + PMIC_SUCCESS) { + *eventMask &= ~(HEADSET_DETECTED); + pr_debug("Deregistered for EVENT_HSDETI\n"); + } else { + rc = PMIC_ERROR; + } + } + + if (*eventMask & (HEADSET_STEREO)) { + /* We need to deregister for the A1 amplifier interrupt. */ + eventNotify.func = callback; + eventNotify.param = (void *)(CORE_EVENT_HSLI); + if (pmic_event_unsubscribe(EVENT_HSLI, eventNotify) == + PMIC_SUCCESS) { + *eventMask &= ~(HEADSET_STEREO); + pr_debug("Deregistered for EVENT_HSLI\n"); + } else { + rc = PMIC_ERROR; + } + } + if (*eventMask & (HEADSET_THERMAL_SHUTDOWN)) { + /* We need to deregister for the A1 amplifier interrupt. */ + eventNotify.func = callback; + eventNotify.param = (void *)(CORE_EVENT_ALSPTHI); + if (pmic_event_unsubscribe(EVENT_ALSPTHI, eventNotify) == + PMIC_SUCCESS) { + *eventMask &= ~(HEADSET_THERMAL_SHUTDOWN); + pr_debug("Deregistered for EVENT_ALSPTHI\n"); + } else { + rc = PMIC_ERROR; + } + } + if (*eventMask & (HEADSET_SHORT_CIRCUIT)) { + /* We need to deregister for the A1 amplifier interrupt. */ + eventNotify.func = callback; + eventNotify.param = (void *)(CORE_EVENT_AHSSHORTI); + if (pmic_event_unsubscribe(EVENT_AHSSHORTI, eventNotify) == + PMIC_SUCCESS) { + *eventMask &= ~(HEADSET_SHORT_CIRCUIT); + pr_debug("Deregistered for EVENT_AHSSHORTI\n"); + } else { + rc = PMIC_ERROR; + } + } + + if (rc == PMIC_SUCCESS) { + /* We need to grab the spinlock here to create a critical section to + * avoid any possible race conditions with the interrupt handler + */ + spin_lock_irqsave(&lock, flags); + + /* Restore the initial reset values for the callback function + * and event mask parameters. This should be NULL and zero, + * respectively. + */ + callback = NULL; + *eventMask = 0; + + /* Exit the critical section. */ + spin_unlock_irqrestore(&lock, flags); + } + + return rc; +} + +/*! + * @brief enable/disable fm output. + * + * @param[in] enable true to enable false to disable + */ +PMIC_STATUS pmic_audio_fm_output_enable(bool enable) +{ + unsigned int reg_mask = 0; + unsigned int reg_write = 0; + PMIC_STATUS rc = PMIC_PARAMETER_ERROR; + if (enable) { + pmic_audio_antipop_enable(ANTI_POP_RAMP_FAST); + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSLEN, 1); + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSREN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSREN, 1); + + reg_mask |= SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, AHSSEL, 1); + + reg_mask |= SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + + reg_mask |= SET_BITS(regAUDIO_RX_0, HSPGDIS, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, HSPGDIS, 0); + } else { + reg_mask |= SET_BITS(regAUDIO_RX_0, ADDRXIN, 1); + reg_write |= SET_BITS(regAUDIO_RX_0, ADDRXIN, 0); + } + rc = pmic_write_reg(REG_AUDIO_RX_0, reg_write, reg_mask); + if (rc != PMIC_SUCCESS) + return rc; + if (enable) { + reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + } else { + reg_mask = SET_BITS(regAUDIO_RX_1, ARXINEN, 1); + reg_write = SET_BITS(regAUDIO_RX_1, ARXINEN, 0); + } + rc = pmic_write_reg(REG_AUDIO_RX_1, reg_write, reg_mask); + return rc; +} + +/*@}*/ + +/************************************************************************** + * Module initialization and termination functions. + * + * Note that if this code is compiled into the kernel, then the + * module_init() function will be called within the device_initcall() + * group. + ************************************************************************** + */ + +/*! + * @name Audio Driver Loading/Unloading Functions + * These non-exported internal functions are used to support the audio + * device driver initialization and de-initialization operations. + */ +/*@{*/ + +/*! + * @brief This is the audio device driver initialization function. + * + * This function is called by the kernel when this device driver is first + * loaded. + */ +static int __init mc13783_pmic_audio_init(void) +{ + printk(KERN_INFO "PMIC Audio driver loading...\n"); + + return 0; +} + +/*! + * @brief This is the audio device driver de-initialization function. + * + * This function is called by the kernel when this device driver is about + * to be unloaded. + */ +static void __exit mc13783_pmic_audio_exit(void) +{ + printk(KERN_INFO "PMIC Audio driver unloading...\n"); + + /* Close all device handles that are still open. This will also + * deregister any callbacks that may still be active. + */ + if (stDAC.handleState == HANDLE_IN_USE) { + pmic_audio_close(stDAC.handle); + } + if (vCodec.handleState == HANDLE_IN_USE) { + pmic_audio_close(vCodec.handle); + } + if (extStereoIn.handleState == HANDLE_IN_USE) { + pmic_audio_close(extStereoIn.handle); + } + + /* Explicitly reset all of the audio registers so that there is no + * possibility of leaving the audio hardware in a state + * where it can cause problems if there is no device driver loaded. + */ + pmic_write_reg(REG_AUDIO_STEREO_DAC, RESET_ST_DAC, REG_FULLMASK); + pmic_write_reg(REG_AUDIO_CODEC, RESET_AUD_CODEC, REG_FULLMASK); + pmic_write_reg(REG_AUDIO_TX, RESET_AUDIO_TX, REG_FULLMASK); + pmic_write_reg(REG_AUDIO_SSI_NETWORK, RESET_SSI_NETWORK, REG_FULLMASK); + pmic_write_reg(REG_AUDIO_RX_0, RESET_AUDIO_RX_0, REG_FULLMASK); + pmic_write_reg(REG_AUDIO_RX_1, RESET_AUDIO_RX_1, REG_FULLMASK); +} + +/*@}*/ + +/* + * Module entry points and description information. + */ + +module_init(mc13783_pmic_audio_init); +module_exit(mc13783_pmic_audio_exit); + +MODULE_DESCRIPTION("PMIC - mc13783 ADC driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_rtc_defs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_rtc_defs.h @@ -0,0 +1,47 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MC13783_RTC_DEFS_H__ +#define __MC13783_RTC_DEFS_H__ + +/*! + * @file mc13783/pmic_rtc_defs.h + * @brief This is the internal header of PMIC(mc13783) RTC driver. + * + * @ingroup PMIC_RTC + */ + +/* + * RTC Time + */ +#define MC13783_RTCTIME_TIME_LSH 0 +#define MC13783_RTCTIME_TIME_WID 17 + +/* + * RTC Alarm + */ +#define MC13783_RTCALARM_TIME_LSH 0 +#define MC13783_RTCALARM_TIME_WID 17 + +/* + * RTC Day + */ +#define MC13783_RTCDAY_DAY_LSH 0 +#define MC13783_RTCDAY_DAY_WID 15 + +/* + * RTC Day alarm + */ +#define MC13783_RTCALARM_DAY_LSH 0 +#define MC13783_RTCALARM_DAY_WID 15 + +#endif /* __MC13783_RTC_DEFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_battery_defs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_battery_defs.h @@ -0,0 +1,81 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_battery_defs.h + * @brief This is the internal header for PMIC(mc13783) Battery driver. + * + * @ingroup PMIC_BATTERY + */ + +#ifndef __PMIC_BATTERY_DEFS_H__ +#define __PMIC_BATTERY_DEFS_H__ + +#define PMIC_BATTERY_STRING "pmic_battery" + +/* REG_CHARGE */ +#define MC13783_BATT_DAC_V_DAC_LSH 0 +#define MC13783_BATT_DAC_V_DAC_WID 3 +#define MC13783_BATT_DAC_DAC_LSH 3 +#define MC13783_BATT_DAC_DAC_WID 4 +#define MC13783_BATT_DAC_TRCKLE_LSH 7 +#define MC13783_BATT_DAC_TRCKLE_WID 3 +#define MC13783_BATT_DAC_FETOVRD_EN_LSH 10 +#define MC13783_BATT_DAC_FETOVRD_EN_WID 1 +#define MC13783_BATT_DAC_FETCTRL_EN_LSH 11 +#define MC13783_BATT_DAC_FETCTRL_EN_WID 1 +#define MC13783_BATT_DAC_REVERSE_SUPPLY_LSH 13 +#define MC13783_BATT_DAC_REVERSE_SUPPLY_WID 1 +#define MC13783_BATT_DAC_OVCTRL_LSH 15 +#define MC13783_BATT_DAC_OVCTRL_WID 2 +#define MC13783_BATT_DAC_UNREGULATED_LSH 17 +#define MC13783_BATT_DAC_UNREGULATED_WID 1 +#define MC13783_BATT_DAC_LED_EN_LSH 18 +#define MC13783_BATT_DAC_LED_EN_WID 1 +#define MC13783_BATT_DAC_5K_LSH 19 +#define MC13783_BATT_DAC_5K_WID 1 + +#define BITS_OUT_VOLTAGE 0 +#define LONG_OUT_VOLTAGE 3 +#define BITS_CURRENT_MAIN 3 +#define LONG_CURRENT_MAIN 4 +#define BITS_CURRENT_TRICKLE 7 +#define LONG_CURRENT_TRICKLE 3 +#define BIT_FETOVRD 10 +#define BIT_FETCTRL 11 +#define BIT_RVRSMODE 13 +#define BITS_OVERVOLTAGE 15 +#define LONG_OVERVOLTAGE 2 +#define BIT_UNREGULATED 17 +#define BIT_CHRG_LED 18 +#define BIT_CHRGRAWPDEN 19 + +/* REG_POWXER_CONTROL_0 */ +#define MC13783_BATT_DAC_V_COIN_LSH 20 +#define MC13783_BATT_DAC_V_COIN_WID 3 +#define MC13783_BATT_DAC_COIN_CH_EN_LSH 23 +#define MC13783_BATT_DAC_COIN_CH_EN_WID 1 +#define MC13783_BATT_DAC_COIN_CH_EN_ENABLED 1 +#define MC13783_BATT_DAC_COIN_CH_EN_DISABLED 0 +#define MC13783_BATT_DAC_EOL_CMP_EN_LSH 18 +#define MC13783_BATT_DAC_EOL_CMP_EN_WID 1 +#define MC13783_BATT_DAC_EOL_CMP_EN_ENABLE 1 +#define MC13783_BATT_DAC_EOL_CMP_EN_DISABLE 0 +#define MC13783_BATT_DAC_EOL_SEL_LSH 16 +#define MC13783_BATT_DAC_EOL_SEL_WID 2 + +#define DEF_VALUE 0 + +#define BAT_THRESHOLD_MAX 3 + +#endif /* __PMIC_BATTERY_DEFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_rtc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_rtc.c @@ -0,0 +1,544 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_rtc.c + * @brief This is the main file of PMIC(mc13783) RTC driver. + * + * @ingroup PMIC_RTC + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include + +#include "pmic_rtc_defs.h" + +#define PMIC_LOAD_ERROR_MSG \ +"PMIC card was not correctly detected. Stop loading PMIC RTC driver\n" + +/* + * Global variables + */ +static int pmic_rtc_major; +static void callback_alarm_asynchronous(void *); +static void callback_alarm_synchronous(void *); +static unsigned int pmic_rtc_poll(struct file *file, poll_table * wait); +static DECLARE_WAIT_QUEUE_HEAD(queue_alarm); +static DECLARE_WAIT_QUEUE_HEAD(pmic_rtc_wait); +static pmic_event_callback_t alarm_callback; +static pmic_event_callback_t rtc_callback; +static bool pmic_rtc_done = 0; +static struct class *pmic_rtc_class; + +static DECLARE_MUTEX(mutex); + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_rtc_set_time); +EXPORT_SYMBOL(pmic_rtc_get_time); +EXPORT_SYMBOL(pmic_rtc_set_time_alarm); +EXPORT_SYMBOL(pmic_rtc_get_time_alarm); +EXPORT_SYMBOL(pmic_rtc_wait_alarm); +EXPORT_SYMBOL(pmic_rtc_event_sub); +EXPORT_SYMBOL(pmic_rtc_event_unsub); + +/* + * Real Time Clock Pmic API + */ + +/*! + * This is the callback function called on TSI Pmic event, used in asynchronous + * call. + */ +static void callback_alarm_asynchronous(void *unused) +{ + pmic_rtc_done = true; +} + +/*! + * This is the callback function is used in test code for (un)sub. + */ +static void callback_test_sub(void) +{ + printk(KERN_INFO "*****************************************\n"); + printk(KERN_INFO "***** PMIC RTC 'Alarm IT CallBack' ******\n"); + printk(KERN_INFO "*****************************************\n"); +} + +/*! + * This is the callback function called on TSI Pmic event, used in synchronous + * call. + */ +static void callback_alarm_synchronous(void *unused) +{ + printk(KERN_INFO "*** Alarm IT Pmic ***\n"); + wake_up(&queue_alarm); +} + +/*! + * This function wait the Alarm event + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_wait_alarm(void) +{ + DEFINE_WAIT(wait); + alarm_callback.func = callback_alarm_synchronous; + alarm_callback.param = NULL; + CHECK_ERROR(pmic_event_subscribe(EVENT_TODAI, alarm_callback)); + prepare_to_wait(&queue_alarm, &wait, TASK_UNINTERRUPTIBLE); + schedule(); + finish_wait(&queue_alarm, &wait); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_TODAI, alarm_callback)); + return PMIC_SUCCESS; +} + +/*! + * This function set the real time clock of PMIC + * + * @param pmic_time value of date and time + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_set_time(struct timeval * pmic_time) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + + tod_reg_val = pmic_time->tv_sec % 86400; + day_reg_val = pmic_time->tv_sec / 86400; + + mask = BITFMASK(MC13783_RTCTIME_TIME); + value = BITFVAL(MC13783_RTCTIME_TIME, tod_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_TIME, value, mask)); + + mask = BITFMASK(MC13783_RTCDAY_DAY); + value = BITFVAL(MC13783_RTCDAY_DAY, day_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_DAY, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function get the real time clock of PMIC + * + * @param pmic_time return value of date and time + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_get_time(struct timeval * pmic_time) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + + mask = BITFMASK(MC13783_RTCTIME_TIME); + CHECK_ERROR(pmic_read_reg(REG_RTC_TIME, &value, mask)); + tod_reg_val = BITFEXT(value, MC13783_RTCTIME_TIME); + + mask = BITFMASK(MC13783_RTCDAY_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY, &value, mask)); + day_reg_val = BITFEXT(value, MC13783_RTCDAY_DAY); + + pmic_time->tv_sec = (unsigned long)((unsigned long)(tod_reg_val & + 0x0001FFFF) + + (unsigned long)(day_reg_val * + 86400)); + return PMIC_SUCCESS; +} + +/*! + * This function set the real time clock alarm of PMIC + * + * @param pmic_time value of date and time + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_set_time_alarm(struct timeval * pmic_time) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + int ret; + + if ((ret = down_interruptible(&mutex)) < 0) + return ret; + + tod_reg_val = pmic_time->tv_sec % 86400; + day_reg_val = pmic_time->tv_sec / 86400; + + mask = BITFMASK(MC13783_RTCALARM_TIME); + value = BITFVAL(MC13783_RTCALARM_TIME, tod_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_ALARM, value, mask)); + + mask = BITFMASK(MC13783_RTCALARM_DAY); + value = BITFVAL(MC13783_RTCALARM_DAY, day_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_DAY_ALARM, value, mask)); + up(&mutex); + return PMIC_SUCCESS; +} + +/*! + * This function get the real time clock alarm of PMIC + * + * @param pmic_time return value of date and time + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_get_time_alarm(struct timeval * pmic_time) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + + mask = BITFMASK(MC13783_RTCALARM_TIME); + CHECK_ERROR(pmic_read_reg(REG_RTC_ALARM, &value, mask)); + tod_reg_val = BITFEXT(value, MC13783_RTCALARM_TIME); + + mask = BITFMASK(MC13783_RTCALARM_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY_ALARM, &value, mask)); + day_reg_val = BITFEXT(value, MC13783_RTCALARM_DAY); + + pmic_time->tv_sec = (unsigned long)((unsigned long)(tod_reg_val & + 0x0001FFFF) + + (unsigned long)(day_reg_val * + 86400)); + + return PMIC_SUCCESS; +} + +/*! + * This function is used to un/subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * @param sub define if Un/subscribe event. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_event(t_rtc_int event, void *callback, bool sub) +{ + type_event rtc_event; + if (callback == NULL) { + return PMIC_ERROR; + } else { + rtc_callback.func = callback; + rtc_callback.param = NULL; + } + switch (event) { + case RTC_IT_ALARM: + rtc_event = EVENT_TODAI; + break; + case RTC_IT_1HZ: + rtc_event = EVENT_E1HZI; + break; + case RTC_IT_RST: + rtc_event = EVENT_RTCRSTI; + break; + default: + return PMIC_PARAMETER_ERROR; + } + if (sub == true) { + CHECK_ERROR(pmic_event_subscribe(rtc_event, rtc_callback)); + } else { + CHECK_ERROR(pmic_event_unsubscribe(rtc_event, rtc_callback)); + } + return PMIC_SUCCESS; +} + +/*! + * This function is used to subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_event_sub(t_rtc_int event, void *callback) +{ + CHECK_ERROR(pmic_rtc_event(event, callback, true)); + return PMIC_SUCCESS; +} + +/*! + * This function is used to un subscribe on RTC event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_rtc_event_unsub(t_rtc_int event, void *callback) +{ + CHECK_ERROR(pmic_rtc_event(event, callback, false)); + return PMIC_SUCCESS; +} + +/* Called without the kernel lock - fine */ +static unsigned int pmic_rtc_poll(struct file *file, poll_table * wait) +{ + /*poll_wait(file, &pmic_rtc_wait, wait); */ + + if (pmic_rtc_done) + return POLLIN | POLLRDNORM; + return 0; +} + +/*! + * This function implements IOCTL controls on a PMIC RTC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int pmic_rtc_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct timeval *pmic_time = NULL; + + if (_IOC_TYPE(cmd) != 'p') + return -ENOTTY; + + if (arg) { + if ((pmic_time = kmalloc(sizeof(struct timeval), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + /* if (copy_from_user(pmic_time, (struct timeval *)arg, + sizeof(struct timeval))) { + return -EFAULT; + } */ + } + + switch (cmd) { + case PMIC_RTC_SET_TIME: + if (copy_from_user(pmic_time, (struct timeval *)arg, + sizeof(struct timeval))) { + return -EFAULT; + } + pr_debug("SET RTC\n"); + CHECK_ERROR(pmic_rtc_set_time(pmic_time)); + break; + case PMIC_RTC_GET_TIME: + if (copy_to_user((struct timeval *)arg, pmic_time, + sizeof(struct timeval))) { + return -EFAULT; + } + pr_debug("GET RTC\n"); + CHECK_ERROR(pmic_rtc_get_time(pmic_time)); + break; + case PMIC_RTC_SET_ALARM: + if (copy_from_user(pmic_time, (struct timeval *)arg, + sizeof(struct timeval))) { + return -EFAULT; + } + pr_debug("SET RTC ALARM\n"); + CHECK_ERROR(pmic_rtc_set_time_alarm(pmic_time)); + break; + case PMIC_RTC_GET_ALARM: + if (copy_to_user((struct timeval *)arg, pmic_time, + sizeof(struct timeval))) { + return -EFAULT; + } + pr_debug("GET RTC ALARM\n"); + CHECK_ERROR(pmic_rtc_get_time_alarm(pmic_time)); + break; + case PMIC_RTC_WAIT_ALARM: + printk(KERN_INFO "WAIT ALARM...\n"); + CHECK_ERROR(pmic_rtc_event_sub(RTC_IT_ALARM, + callback_test_sub)); + CHECK_ERROR(pmic_rtc_wait_alarm()); + printk(KERN_INFO "ALARM DONE\n"); + CHECK_ERROR(pmic_rtc_event_unsub(RTC_IT_ALARM, + callback_test_sub)); + break; + case PMIC_RTC_ALARM_REGISTER: + printk(KERN_INFO "PMIC RTC ALARM REGISTER\n"); + alarm_callback.func = callback_alarm_asynchronous; + alarm_callback.param = NULL; + CHECK_ERROR(pmic_event_subscribe(EVENT_TODAI, alarm_callback)); + break; + case PMIC_RTC_ALARM_UNREGISTER: + printk(KERN_INFO "PMIC RTC ALARM UNREGISTER\n"); + alarm_callback.func = callback_alarm_asynchronous; + alarm_callback.param = NULL; + CHECK_ERROR(pmic_event_unsubscribe + (EVENT_TODAI, alarm_callback)); + pmic_rtc_done = false; + break; + default: + pr_debug("%d unsupported ioctl command\n", (int)cmd); + return -EINVAL; + } + + if (arg) { + if (copy_to_user((struct timeval *)arg, pmic_time, + sizeof(struct timeval))) { + return -EFAULT; + } + kfree(pmic_time); + } + + return 0; +} + +/*! + * This function implements the open method on a PMIC RTC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_rtc_open(struct inode *inode, struct file *file) +{ + return 0; +} + +/*! + * This function implements the release method on a PMIC RTC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_rtc_release(struct inode *inode, struct file *file) +{ + return 0; +} + +/*! + * This function is called to put the RTC in a low power state. + * There is no need for power handlers for the RTC device. + * The RTC cannot be suspended. + * + * @param pdev the device structure used to give information on which RTC + * device (0 through 3 channels) to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int pmic_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +/*! + * This function is called to resume the RTC from a low power state. + * + * @param pdev the device structure used to give information on which RTC + * device (0 through 3 channels) to suspend + * + * @return The function always returns 0. + */ +static int pmic_rtc_resume(struct platform_device *pdev) +{ + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ + +static struct file_operations pmic_rtc_fops = { + .owner = THIS_MODULE, + .ioctl = pmic_rtc_ioctl, + .poll = pmic_rtc_poll, + .open = pmic_rtc_open, + .release = pmic_rtc_release, +}; + +static int pmic_rtc_remove(struct platform_device *pdev) +{ + device_destroy(pmic_rtc_class, MKDEV(pmic_rtc_major, 0)); + class_destroy(pmic_rtc_class); + unregister_chrdev(pmic_rtc_major, "pmic_rtc"); + return 0; +} + +static int pmic_rtc_probe(struct platform_device *pdev) +{ + int ret = 0; + struct device *temp_class; + + pmic_rtc_major = register_chrdev(0, "pmic_rtc", &pmic_rtc_fops); + if (pmic_rtc_major < 0) { + printk(KERN_ERR "Unable to get a major for pmic_rtc\n"); + return pmic_rtc_major; + } + + pmic_rtc_class = class_create(THIS_MODULE, "pmic_rtc"); + if (IS_ERR(pmic_rtc_class)) { + printk(KERN_ERR "Error creating pmic rtc class.\n"); + ret = PTR_ERR(pmic_rtc_class); + goto err_out1; + } + + temp_class = device_create(pmic_rtc_class, NULL, + MKDEV(pmic_rtc_major, 0), NULL, + "pmic_rtc"); + if (IS_ERR(temp_class)) { + printk(KERN_ERR "Error creating pmic rtc class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + printk(KERN_INFO "PMIC RTC successfully probed\n"); + return ret; + + err_out2: + class_destroy(pmic_rtc_class); + err_out1: + unregister_chrdev(pmic_rtc_major, "pmic_rtc"); + return ret; +} + +static struct platform_driver pmic_rtc_driver_ldm = { + .driver = { + .name = "pmic_rtc", + .owner = THIS_MODULE, + }, + .suspend = pmic_rtc_suspend, + .resume = pmic_rtc_resume, + .probe = pmic_rtc_probe, + .remove = pmic_rtc_remove, +}; + +static int __init pmic_rtc_init(void) +{ + pr_debug("PMIC RTC driver loading...\n"); + return platform_driver_register(&pmic_rtc_driver_ldm); +} +static void __exit pmic_rtc_exit(void) +{ + platform_driver_unregister(&pmic_rtc_driver_ldm); + pr_debug("PMIC RTC driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +subsys_initcall(pmic_rtc_init); +module_exit(pmic_rtc_exit); + +MODULE_DESCRIPTION("Pmic_rtc driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_adc_defs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_adc_defs.h @@ -0,0 +1,321 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_adc_defs.h + * @brief This header contains all defines for PMIC(mc13783) ADC driver. + * + * @ingroup PMIC_ADC + */ + +#ifndef __MC13783_ADC__DEFS_H__ +#define __MC13783_ADC__DEFS_H__ + +#define MC13783_ADC_DEVICE "/dev/mc13783_adc" + +#define DEF_ADC_0 0x008000 +#define DEF_ADC_3 0x000080 + +#define ADC_NB_AVAILABLE 2 + +#define MAX_CHANNEL 7 + +/* + * Maximun allowed variation in the three X/Y co-ordinates acquired from + * touch-screen + */ +#define DELTA_Y_MAX 50 +#define DELTA_X_MAX 50 + +/* Upon clearing the filter, this is the delay in restarting the filter */ +#define FILTER_MIN_DELAY 4 + +/* Length of X and Y Touch screen filters */ +#define FILTLEN 3 + +#define TS_X_MAX 1000 +#define TS_Y_MAX 1000 + +#define TS_X_MIN 80 +#define TS_Y_MIN 80 + +#define MC13783_ADC0_TS_M_LSH 14 +#define MC13783_ADC0_TS_M_WID 3 +/* + * ADC 0 + */ +#define ADC_WAIT_TSI_0 0x001C00 + +/* + * ADC 1 + */ + +#define ADC_EN 0x000001 +#define ADC_SGL_CH 0x000002 +#define ADC_ADSEL 0x000008 +#define ADC_CH_0_POS 5 +#define ADC_CH_0_MASK 0x0000E0 +#define ADC_CH_1_POS 8 +#define ADC_CH_1_MASK 0x000700 +#define ADC_DELAY_POS 11 +#define ADC_DELAY_MASK 0x07F800 +#define ADC_ATO 0x080000 +#define ASC_ADC 0x100000 +#define ADC_WAIT_TSI_1 0x300001 +#define ADC_CHRGRAW_D5 0x008000 + +/* + * ADC 2 - 4 + */ +#define ADD1_RESULT_MASK 0x00000FFC +#define ADD2_RESULT_MASK 0x00FFC000 +#define ADC_TS_MASK 0x00FFCFFC + +/* + * ADC 3 + */ +#define ADC_INC 0x030000 +#define ADC_BIS 0x800000 + +/* + * ADC 3 + */ +#define ADC_NO_ADTRIG 0x200000 +#define ADC_WCOMP 0x040000 +#define ADC_WCOMP_H_POS 0 +#define ADC_WCOMP_L_POS 9 +#define ADC_WCOMP_H_MASK 0x00003F +#define ADC_WCOMP_L_MASK 0x007E00 + +#define ADC_MODE_MASK 0x00003F + +/* + * Interrupt Status 0 + */ +#define ADC_INT_BISDONEI 0x02 + +/*! + * Define state mode of ADC. + */ +typedef enum adc_state { + /*! + * Free. + */ + ADC_FREE, + /*! + * Used. + */ + ADC_USED, + /*! + * Monitoring + */ + ADC_MONITORING, +} t_adc_state; + +/*! + * This enumeration, is used to configure the mode of ADC. + */ +typedef enum reading_mode { + /*! + * Enables lithium cell reading + */ + M_LITHIUM_CELL = 0x000001, + /*! + * Enables charge current reading + */ + M_CHARGE_CURRENT = 0x000002, + /*! + * Enables battery current reading + */ + M_BATTERY_CURRENT = 0x000004, + /*! + * Enables thermistor reading + */ + M_THERMISTOR = 0x000008, + /*! + * Enables die temperature reading + */ + M_DIE_TEMPERATURE = 0x000010, + /*! + * Enables UID reading + */ + M_UID = 0x000020, +} t_reading_mode; + +/*! + * This enumeration, is used to configure the monitoring mode. + */ +typedef enum check_mode { + /*! + * Comparator low level + */ + CHECK_LOW, + /*! + * Comparator high level + */ + CHECK_HIGH, + /*! + * Comparator low or high level + */ + CHECK_LOW_OR_HIGH, +} t_check_mode; + +/*! + * This structure is used to configure and report adc value. + */ +typedef struct { + /*! + * Delay before first conversion + */ + unsigned int delay; + /*! + * sets the ATX bit for delay on all conversion + */ + bool conv_delay; + /*! + * Sets the single channel mode + */ + bool single_channel; + /*! + * Selects the set of inputs + */ + bool group; + /*! + * Channel selection 1 + */ + t_channel channel_0; + /*! + * Channel selection 2 + */ + t_channel channel_1; + /*! + * Used to configure ADC mode with t_reading_mode + */ + t_reading_mode read_mode; + /*! + * Sets the Touch screen mode + */ + bool read_ts; + /*! + * Wait TSI event before touch screen reading + */ + bool wait_tsi; + /*! + * Sets CHRGRAW scaling to divide by 5 + * Only supported on 2.0 and higher + */ + bool chrgraw_devide_5; + /*! + * Return ADC values + */ + unsigned int value[8]; + /*! + * Return touch screen values + */ + t_touch_screen ts_value; +} t_adc_param; + +/*! + * This structure is used to configure the monitoring mode of ADC. + */ +typedef struct { + /*! + * Delay before first conversion + */ + unsigned int delay; + /*! + * sets the ATX bit for delay on all conversion + */ + bool conv_delay; + /*! + * Channel selection 1 + */ + t_channel channel; + /*! + * Selects the set of inputs + */ + bool group; + /*! + * Used to configure ADC mode with t_reading_mode + */ + unsigned int read_mode; + /*! + * Comparator low level in WCOMP mode + */ + unsigned int comp_low; + /*! + * Comparator high level in WCOMP mode + */ + unsigned int comp_high; + /*! + * Sets type of monitoring (low, high or both) + */ + t_check_mode check_mode; + /*! + * Callback to be launched when event is detected + */ + void (*callback) (void); +} t_monitoring_param; + +/*! + * This function performs filtering and rejection of excessive noise prone + * samples. + * + * @param ts_curr Touch screen value + * + * @return This function returns 0 on success, -1 otherwise. + */ +static int pmic_adc_filter(t_touch_screen * ts_curr); + +/*! + * This function request a ADC. + * + * @return This function returns index of ADC to be used (0 or 1) if successful. + return -1 if error. + */ +int mc13783_adc_request(bool read_ts); + +/*! + * This function is used to update buffer of touch screen value in read mode. + */ +void update_buffer(void); + +/*! + * This function release an ADC. + * + * @param adc_index index of ADC to be released. + * + * @return This function returns 0 if successful. + */ +int mc13783_adc_release(int adc_index); + +/*! + * This function select the required read_mode for a specific channel. + * + * @param channel The channel to be sampled + * + * @return This function returns the requires read_mode + */ +t_reading_mode mc13783_set_read_mode(t_channel channel); + +/*! + * This function read the touch screen value. + * + * @param touch_sample return value of touch screen + * @param wait_tsi if true, this function is synchronous (wait in TSI event). + * + * @return This function returns 0. + */ +PMIC_STATUS mc13783_adc_read_ts(t_touch_screen * touch_sample, int wait_tsi); + +#endif /* __MC13783_ADC__DEFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_light_defs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_light_defs.h @@ -0,0 +1,144 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_light_defs.h + * @brief This is the internal header PMIC(mc13783) Light and Backlight driver. + * + * @ingroup PMIC_LIGHT + */ + +#ifndef __MC13783_LIGHT_DEFS_H__ +#define __MC13783_LIGHT_DEFS_H__ + +#define LREG_0 REG_LED_CONTROL_0 +#define LREG_1 REG_LED_CONTROL_1 +#define LREG_2 REG_LED_CONTROL_2 +#define LREG_3 REG_LED_CONTROL_3 +#define LREG_4 REG_LED_CONTROL_4 +#define LREG_5 REG_LED_CONTROL_5 + +/* REG_LED_CONTROL_0 */ + +#define BIT_LEDEN_LSH 0 +#define BIT_LEDEN_WID 1 +#define MASK_TRIODE_MAIN_BL 0x080 +#define INDEX_AUXILIARY 1 +#define INDEX_KEYPAD 2 +#define BITS_FUN_LIGHT_LSH 17 +#define BITS_FUN_LIGHT_WID 4 +#define MASK_FUN_LIGHT 0x1E0000 +#define MASK_BK1_FL 0x200000 +#define ENABLE_BK1_FL 0x200000 +#define MASK_BK2_FL 0x400000 +#define ENABLE_BK2_FL 0x400000 +#define MASK_BK3_FL 0x800000 +#define ENABLE_BK3_FL 0x800000 +#define BIT_UP_MAIN_BL_LSH 1 +#define BIT_UP_MAIN_BL_WID 1 +#define BIT_UP_AUX_BL_LSH 2 +#define BIT_UP_AUX_BL_WID 1 +#define BIT_UP_KEY_BL_LSH 3 +#define BIT_UP_KEY_BL_WID 1 +#define BIT_DOWN_MAIN_BL_LSH 4 +#define BIT_DOWN_MAIN_BL_WID 1 +#define BIT_DOWN_AUX_BL_LSH 5 +#define BIT_DOWN_AUX_BL_WID 1 +#define BIT_DOWN_KEY_BL_LSH 6 +#define BIT_DOWN_KEY_BL_WID 1 +#define BIT_TRIODE_MAIN_BL_LSH 7 +#define BIT_TRIODE_MAIN_BL_WID 1 +#define BIT_TRIODE_AUX_BL_LSH 8 +#define BIT_TRIODE_AUX_BL_WID 1 +#define BIT_TRIODE_KEY_BL_LSH 9 +#define BIT_TRIODE_KEY_BL_WID 1 + +#define BIT_BOOSTEN_LSH 10 +#define BIT_BOOSTEN_WID 1 +#define BITS_BOOST_LSH 11 +#define BITS_BOOST_WID 5 +#define BITS_BOOST_ABMS_LSH 11 +#define BITS_BOOST_ABMS_WID 3 +#define BITS_BOOST_ABR_LSH 14 +#define BITS_BOOST_ABR_WID 2 + +#define MAX_BOOST_ABMS 7 +#define MAX_BOOST_ABR 3 + +/* REG_LED_CONTROL_1 */ + +#define BIT_SLEWLIMTC_LSH 23 +#define BIT_SLEWLIMTC_WID 1 +#define BIT_TC1HALF_LSH 18 +#define BIT_TC1HALF_WID 1 +#define LEDR1RAMPUP 0x000001 +#define LEDR2RAMPUP 0x000040 +#define LEDR3RAMPUP 0x001000 +#define LEDR1RAMPDOWN 0x000008 +#define LEDR2RAMPDOWN 0x000200 +#define LEDR3RAMPDOWN 0x008000 + +/* REG_LED_CONTROL_2 */ + +#define BIT_SLEWLIMBL_LSH 23 +#define BIT_SLEWLIMBL_WID 1 +#define BIT_DUTY_CYCLE 9 +#define MASK_DUTY_CYCLE 0x001E00 +#define INDEX_AUX 4 +#define INDEX_KYD 8 +#define BIT_CL_MAIN_LSH 0 +#define BIT_CL_MAIN_WID 3 +#define BIT_CL_AUX_LSH 3 +#define BIT_CL_AUX_WID 3 +#define BIT_CL_KEY_LSH 6 +#define BIT_CL_KEY_WID 3 + +/* REG_LED_CONTROL_3 4 5 */ +#define BITS_CL_RED_LSH 0 +#define BITS_CL_RED_WID 2 +#define BITS_CL_GREEN_LSH 2 +#define BITS_CL_GREEN_WID 2 +#define BITS_CL_BLUE_LSH 4 +#define BITS_CL_BLUE_WID 2 +#define BITS_DC_RED_LSH 6 +#define BITS_DC_RED_WID 5 +#define BITS_DC_GREEN_LSH 11 +#define BITS_DC_GREEN_WID 5 +#define BITS_DC_BLUE_LSH 16 +#define BITS_DC_BLUE_WID 5 +#define BIT_PERIOD_LSH 21 +#define BIT_PERIOD_WID 2 + +#define DUTY_CYCLE_MAX 31 + +/* Fun light pattern */ +#define BLENDED_RAMPS_SLOW 0 +#define BLENDED_RAMPS_FAST 1 +#define SAW_RAMPS_SLOW 2 +#define SAW_RAMPS_FAST 3 +#define BLENDED_INVERSE_RAMPS_SLOW 4 +#define BLENDED_INVERSE_RAMPS_FAST 5 +#define CHASING_LIGHTS_RGB_SLOW 6 +#define CHASING_LIGHTS_RGB_FAST 7 +#define CHASING_LIGHTS_BGR_SLOW 8 +#define CHASING_LIGHTS_BGR_FAST 9 +#define FUN_LIGHTS_OFF 15 + +/*! + * This function initialize Light registers of mc13783 with 0. + * + * @return This function returns 0 if successful. + */ +int pmic_light_init_reg(void); + +#endif /* __MC13783_LIGHT_DEFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_power_defs.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_power_defs.h @@ -0,0 +1,509 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_power_defs.h + * @brief This is the internal header define of PMIC(mc13783) Power driver. + * + * @ingroup PMIC_POWER + */ + +/* + * Includes + */ + +#ifndef __MC13783_POWER_DEFS_H__ +#define __MC13783_POWER_DEFS_H__ + +/* + * Power Up Mode Sense bits + */ + +#define STATE_ICTEST_MASK 0x000001 + +#define STATE_CLKSEL_BIT 1 +#define STATE_CLKSEL_MASK 0x000002 + +#define STATE_PUMS1_BITS 2 +#define STATE_PUMS1_MASK 0x00000C + +#define STATE_PUMS2_BITS 4 +#define STATE_PUMS2_MASK 0x000030 + +#define STATE_PUMS3_BITS 6 +#define STATE_PUMS3_MASK 0x0000C0 + +#define STATE_CHRGM1_BITS 8 +#define STATE_CHRGM1_MASK 0x000300 + +#define STATE_CHRGM2_BITS 10 +#define STATE_CHRGM2_MASK 0x000C00 + +#define STATE_UMOD_BITS 12 +#define STATE_UMOD_MASK 0x003000 + +#define STATE_USBEN_BIT 14 +#define STATE_USBEN_MASK 0x004000 + +#define STATE_SW1A_J_B_BIT 15 +#define STATE_SW1A_J_B_MASK 0x008000 + +#define STATE_SW2A_J_B_BIT 16 +#define STATE_SW2A_J_B_MASK 0x010000 + +#define PC_COUNT_MAX 3 +#define PC_COUNT_MIN 0 +/* + * Reg Regen + */ +#define MC13783_REGGEN_VAUDIO_LSH 0 +#define MC13783_REGGEN_VAUDIO_WID 1 +#define MC13783_REGGEN_VIOHI_LSH 1 +#define MC13783_REGGEN_VIOHI_WID 1 +#define MC13783_REGGEN_VIOLO_LSH 2 +#define MC13783_REGGEN_VIOLO_WID 1 +#define MC13783_REGGEN_VDIG_LSH 3 +#define MC13783_REGGEN_VDIG_WID 1 +#define MC13783_REGGEN_VGEN_LSH 4 +#define MC13783_REGGEN_VGEN_WID 1 +#define MC13783_REGGEN_VRFDIG_LSH 5 +#define MC13783_REGGEN_VRFDIG_WID 1 +#define MC13783_REGGEN_VRFREF_LSH 6 +#define MC13783_REGGEN_VRFREF_WID 1 +#define MC13783_REGGEN_VRFCP_LSH 7 +#define MC13783_REGGEN_VRFCP_WID 1 +#define MC13783_REGGEN_VCAM_LSH 8 +#define MC13783_REGGEN_VCAM_WID 1 +#define MC13783_REGGEN_VRFBG_LSH 9 +#define MC13783_REGGEN_VRFBG_WID 1 +#define MC13783_REGGEN_VRF1_LSH 10 +#define MC13783_REGGEN_VRF1_WID 1 +#define MC13783_REGGEN_VRF2_LSH 11 +#define MC13783_REGGEN_VRF2_WID 1 +#define MC13783_REGGEN_VMMC1_LSH 12 +#define MC13783_REGGEN_VMMC1_WID 1 +#define MC13783_REGGEN_VMMC2_LSH 13 +#define MC13783_REGGEN_VMMC2_WID 1 +#define MC13783_REGGEN_GPO1_LSH 16 +#define MC13783_REGGEN_GPO1_WID 1 +#define MC13783_REGGEN_GPO2_LSH 17 +#define MC13783_REGGEN_GPO2_WID 1 +#define MC13783_REGGEN_GPO3_LSH 18 +#define MC13783_REGGEN_GPO3_WID 1 +#define MC13783_REGGEN_GPO4_LSH 19 +#define MC13783_REGGEN_GPO4_WID 1 +#define MC13783_REGGEN_INV_LSH 20 +#define MC13783_REGGEN_INV_WID 1 +#define MC13783_REGGEN_VESIMESIM_LSH 21 +#define MC13783_REGGEN_VESIMESIM_WID 1 +#define MC13783_REGGEN_VMMC1ESIM_LSH 22 +#define MC13783_REGGEN_VMMC1ESIM_WID 1 +#define MC13783_REGGEN_VMMC2ESIM_LSH 23 +#define MC13783_REGGEN_VMMC2ESIM_WID 1 + +/* + * Reg Power Control 0 + */ +#define MC13783_PWRCTRL_PCEN_LSH 0 +#define MC13783_PWRCTRL_PCEN_WID 1 +#define MC13783_PWRCTRL_PCEN_ENABLE 1 +#define MC13783_PWRCTRL_PCEN_DISABLE 0 +#define MC13783_PWRCTRL_PC_COUNT_EN_LSH 1 +#define MC13783_PWRCTRL_PC_COUNT_EN_WID 1 +#define MC13783_PWRCTRL_PC_COUNT_EN_ENABLE 1 +#define MC13783_PWRCTRL_PC_COUNT_EN_DISABLE 0 +#define MC13783_PWRCTRL_WARM_EN_LSH 2 +#define MC13783_PWRCTRL_WARM_EN_WID 1 +#define MC13783_PWRCTRL_WARM_EN_ENABLE 1 +#define MC13783_PWRCTRL_WARM_EN_DISABLE 0 +#define MC13783_PWRCTRL_USER_OFF_SPI_LSH 3 +#define MC13783_PWRCTRL_USER_OFF_SPI_WID 1 +#define MC13783_PWRCTRL_USER_OFF_SPI_ENABLE 1 +#define MC13783_PWRCTRL_USER_OFF_PC_LSH 4 +#define MC13783_PWRCTRL_USER_OFF_PC_WID 1 +#define MC13783_PWRCTRL_USER_OFF_PC_ENABLE 1 +#define MC13783_PWRCTRL_USER_OFF_PC_DISABLE 0 +#define MC13783_PWRCTRL_32OUT_USER_OFF_LSH 5 +#define MC13783_PWRCTRL_32OUT_USER_OFF_WID 1 +#define MC13783_PWRCTRL_32OUT_USER_OFF_ENABLE 1 +#define MC13783_PWRCTRL_32OUT_USER_OFF_DISABLE 0 +#define MC13783_PWRCTRL_32OUT_EN_LSH 6 +#define MC13783_PWRCTRL_32OUT_EN_WID 1 +#define MC13783_PWRCTRL_32OUT_EN_ENABLE 1 +#define MC13783_PWRCTRL_32OUT_EN_DISABLE 0 +#define MC13783_REGCTRL_VBKUP2AUTOMH_LSH 7 +#define MC13783_REGCTRL_VBKUP2AUTOMH_WID 1 +#define MC13783_PWRCTRL_VBKUP1_EN_LSH 8 +#define MC13783_PWRCTRL_VBKUP1_EN_WID 1 +#define MC13783_PWRCTRL_VBKUP_ENABLE 1 +#define MC13783_PWRCTRL_VBKUP_DISABLE 0 +#define MC13783_PWRCTRL_VBKUP1_AUTO_EN_LSH 9 +#define MC13783_PWRCTRL_VBKUP1_AUTO_EN_WID 1 +#define MC13783_PWRCTRL_VBKUP1_LSH 10 +#define MC13783_PWRCTRL_VBKUP1_WID 2 +#define MC13783_PWRCTRL_VBKUP2_EN_LSH 12 +#define MC13783_PWRCTRL_VBKUP2_EN_WID 1 +#define MC13783_PWRCTRL_VBKUP2_AUTO_EN_LSH 13 +#define MC13783_PWRCTRL_VBKUP2_AUTO_EN_WID 1 +#define MC13783_PWRCTRL_VBKUP2_LSH 14 +#define MC13783_PWRCTRL_VBKUP2_WID 2 +#define MC13783_REGCTRL_BATTDETEN_LSH 19 +#define MC13783_REGCTRL_BATTDETEN_WID 1 + +/* + * Reg Power Control 1 + */ +#define MC13783_PWRCTRL_PCT_LSH 0 +#define MC13783_PWRCTRL_PCT_WID 8 +#define MC13783_PWRCTRL_PC_COUNT_LSH 8 +#define MC13783_PWRCTRL_PC_COUNT_WID 4 +#define MC13783_PWRCTRL_PC_MAX_CNT_LSH 12 +#define MC13783_PWRCTRL_PC_MAX_CNT_WID 4 +#define MC13783_PWRCTRL_MEM_TMR_LSH 16 +#define MC13783_PWRCTRL_MEM_TMR_WID 4 +#define MC13783_PWRCTRL_MEM_ALLON_LSH 20 +#define MC13783_PWRCTRL_MEM_ALLON_WID 1 +#define MC13783_PWRCTRL_MEM_ALLON_ENABLE 1 +#define MC13783_PWRCTRL_MEM_ALLON_DISABLE 0 + +/* + * Reg Power Control 2 + */ +#define MC13783_AUTO_RESTART_LSH 0 +#define MC13783_AUTO_RESTART_WID 1 +#define MC13783_EN_BT_ON1B_LSH 1 +#define MC13783_EN_BT_ON1B_WID 1 +#define MC13783_EN_BT_ON2B_LSH 2 +#define MC13783_EN_BT_ON2B_WID 1 +#define MC13783_EN_BT_ON3B_LSH 3 +#define MC13783_EN_BT_ON3B_WID 1 +#define MC13783_DEB_BT_ON1B_LSH 4 +#define MC13783_DEB_BT_ON1B_WID 2 +#define MC13783_DEB_BT_ON2B_LSH 6 +#define MC13783_DEB_BT_ON2B_WID 2 +#define MC13783_DEB_BT_ON3B_LSH 8 +#define MC13783_DEB_BT_ON3B_WID 2 + +/* + * Reg Regulator Mode 0 + */ +#define MC13783_REGCTRL_VAUDIO_EN_LSH 0 +#define MC13783_REGCTRL_VAUDIO_EN_WID 1 +#define MC13783_REGCTRL_VAUDIO_EN_ENABLE 1 +#define MC13783_REGCTRL_VAUDIO_EN_DISABLE 0 +#define MC13783_REGCTRL_VAUDIO_STBY_LSH 1 +#define MC13783_REGCTRL_VAUDIO_STBY_WID 1 +#define MC13783_REGCTRL_VAUDIO_MODE_LSH 2 +#define MC13783_REGCTRL_VAUDIO_MODE_WID 1 +#define MC13783_REGCTRL_VIOHI_EN_LSH 3 +#define MC13783_REGCTRL_VIOHI_EN_WID 1 +#define MC13783_REGCTRL_VIOHI_EN_ENABLE 1 +#define MC13783_REGCTRL_VIOHI_EN_DISABLE 0 +#define MC13783_REGCTRL_VIOHI_STBY_LSH 4 +#define MC13783_REGCTRL_VIOHI_STBY_WID 1 +#define MC13783_REGCTRL_VIOHI_MODE_LSH 5 +#define MC13783_REGCTRL_VIOHI_MODE_WID 1 +#define MC13783_REGCTRL_VIOLO_EN_LSH 6 +#define MC13783_REGCTRL_VIOLO_EN_WID 1 +#define MC13783_REGCTRL_VIOLO_EN_ENABLE 1 +#define MC13783_REGCTRL_VIOLO_EN_DISABLE 0 +#define MC13783_REGCTRL_VIOLO_STBY_LSH 7 +#define MC13783_REGCTRL_VIOLO_STBY_WID 1 +#define MC13783_REGCTRL_VIOLO_MODE_LSH 8 +#define MC13783_REGCTRL_VIOLO_MODE_WID 1 +#define MC13783_REGCTRL_VDIG_EN_LSH 9 +#define MC13783_REGCTRL_VDIG_EN_WID 1 +#define MC13783_REGCTRL_VDIG_EN_ENABLE 1 +#define MC13783_REGCTRL_VDIG_EN_DISABLE 0 +#define MC13783_REGCTRL_VDIG_STBY_LSH 10 +#define MC13783_REGCTRL_VDIG_STBY_WID 1 +#define MC13783_REGCTRL_VDIG_MODE_LSH 11 +#define MC13783_REGCTRL_VDIG_MODE_WID 1 +#define MC13783_REGCTRL_VGEN_EN_LSH 12 +#define MC13783_REGCTRL_VGEN_EN_WID 1 +#define MC13783_REGCTRL_VGEN_EN_ENABLE 1 +#define MC13783_REGCTRL_VGEN_EN_DISABLE 0 +#define MC13783_REGCTRL_VGEN_STBY_LSH 13 +#define MC13783_REGCTRL_VGEN_STBY_WID 1 +#define MC13783_REGCTRL_VGEN_MODE_LSH 14 +#define MC13783_REGCTRL_VGEN_MODE_WID 1 +#define MC13783_REGCTRL_VRFDIG_EN_LSH 15 +#define MC13783_REGCTRL_VRFDIG_EN_WID 1 +#define MC13783_REGCTRL_VRFDIG_EN_ENABLE 1 +#define MC13783_REGCTRL_VRFDIG_EN_DISABLE 0 +#define MC13783_REGCTRL_VRFDIG_STBY_LSH 16 +#define MC13783_REGCTRL_VRFDIG_STBY_WID 1 +#define MC13783_REGCTRL_VRFDIG_MODE_LSH 17 +#define MC13783_REGCTRL_VRFDIG_MODE_WID 1 +#define MC13783_REGCTRL_VRFREF_EN_LSH 18 +#define MC13783_REGCTRL_VRFREF_EN_WID 1 +#define MC13783_REGCTRL_VRFREF_EN_ENABLE 1 +#define MC13783_REGCTRL_VRFREF_EN_DISABLE 0 +#define MC13783_REGCTRL_VRFREF_STBY_LSH 19 +#define MC13783_REGCTRL_VRFREF_STBY_WID 1 +#define MC13783_REGCTRL_VRFREF_MODE_LSH 20 +#define MC13783_REGCTRL_VRFREF_MODE_WID 1 +#define MC13783_REGCTRL_VRFCP_EN_LSH 21 +#define MC13783_REGCTRL_VRFCP_EN_WID 1 +#define MC13783_REGCTRL_VRFCP_EN_ENABLE 1 +#define MC13783_REGCTRL_VRFCP_EN_DISABLE 0 +#define MC13783_REGCTRL_VRFCP_STBY_LSH 22 +#define MC13783_REGCTRL_VRFCP_STBY_WID 1 +#define MC13783_REGCTRL_VRFCP_MODE_LSH 23 +#define MC13783_REGCTRL_VRFCP_MODE_WID 1 + +/* + * Reg Regulator Mode 1 + */ +#define MC13783_REGCTRL_VSIM_EN_LSH 0 +#define MC13783_REGCTRL_VSIM_EN_WID 1 +#define MC13783_REGCTRL_VSIM_EN_ENABLE 1 +#define MC13783_REGCTRL_VSIM_EN_DISABLE 0 +#define MC13783_REGCTRL_VSIM_STBY_LSH 1 +#define MC13783_REGCTRL_VSIM_STBY_WID 1 +#define MC13783_REGCTRL_VSIM_MODE_LSH 2 +#define MC13783_REGCTRL_VSIM_MODE_WID 1 +#define MC13783_REGCTRL_VESIM_EN_LSH 3 +#define MC13783_REGCTRL_VESIM_EN_WID 1 +#define MC13783_REGCTRL_VESIM_EN_ENABLE 1 +#define MC13783_REGCTRL_VESIM_EN_DISABLE 0 +#define MC13783_REGCTRL_VESIM_STBY_LSH 4 +#define MC13783_REGCTRL_VESIM_STBY_WID 1 +#define MC13783_REGCTRL_VESIM_MODE_LSH 5 +#define MC13783_REGCTRL_VESIM_MODE_WID 1 +#define MC13783_REGCTRL_VCAM_EN_LSH 6 +#define MC13783_REGCTRL_VCAM_EN_WID 1 +#define MC13783_REGCTRL_VCAM_EN_ENABLE 1 +#define MC13783_REGCTRL_VCAM_EN_DISABLE 0 +#define MC13783_REGCTRL_VCAM_STBY_LSH 7 +#define MC13783_REGCTRL_VCAM_STBY_WID 1 +#define MC13783_REGCTRL_VCAM_MODE_LSH 8 +#define MC13783_REGCTRL_VCAM_MODE_WID 1 +#define MC13783_REGCTRL_VRFBG_EN_LSH 9 +#define MC13783_REGCTRL_VRFBG_EN_WID 1 +#define MC13783_REGCTRL_VRFBG_EN_ENABLE 1 +#define MC13783_REGCTRL_VRFBG_EN_DISABLE 0 +#define MC13783_REGCTRL_VRFBG_STBY_LSH 10 +#define MC13783_REGCTRL_VRFBG_STBY_WID 1 +#define MC13783_REGCTRL_VVIB_EN_LSH 11 +#define MC13783_REGCTRL_VVIB_EN_WID 1 +#define MC13783_REGCTRL_VVIB_EN_ENABLE 1 +#define MC13783_REGCTRL_VVIB_EN_DISABLE 0 +#define MC13783_REGCTRL_VRF1_EN_LSH 12 +#define MC13783_REGCTRL_VRF1_EN_WID 1 +#define MC13783_REGCTRL_VRF1_EN_ENABLE 1 +#define MC13783_REGCTRL_VRF1_EN_DISABLE 0 +#define MC13783_REGCTRL_VRF1_STBY_LSH 13 +#define MC13783_REGCTRL_VRF1_STBY_WID 1 +#define MC13783_REGCTRL_VRF1_MODE_LSH 14 +#define MC13783_REGCTRL_VRF1_MODE_WID 1 +#define MC13783_REGCTRL_VRF2_EN_LSH 15 +#define MC13783_REGCTRL_VRF2_EN_WID 1 +#define MC13783_REGCTRL_VRF2_EN_ENABLE 1 +#define MC13783_REGCTRL_VRF2_EN_DISABLE 0 +#define MC13783_REGCTRL_VRF2_STBY_LSH 16 +#define MC13783_REGCTRL_VRF2_STBY_WID 1 +#define MC13783_REGCTRL_VRF2_MODE_LSH 17 +#define MC13783_REGCTRL_VRF2_MODE_WID 1 +#define MC13783_REGCTRL_VMMC1_EN_LSH 18 +#define MC13783_REGCTRL_VMMC1_EN_WID 1 +#define MC13783_REGCTRL_VMMC1_EN_ENABLE 1 +#define MC13783_REGCTRL_VMMC1_EN_DISABLE 0 +#define MC13783_REGCTRL_VMMC1_STBY_LSH 19 +#define MC13783_REGCTRL_VMMC1_STBY_WID 1 +#define MC13783_REGCTRL_VMMC1_MODE_LSH 20 +#define MC13783_REGCTRL_VMMC1_MODE_WID 1 +#define MC13783_REGCTRL_VMMC2_EN_LSH 21 +#define MC13783_REGCTRL_VMMC2_EN_WID 1 +#define MC13783_REGCTRL_VMMC2_EN_ENABLE 1 +#define MC13783_REGCTRL_VMMC2_EN_DISABLE 0 +#define MC13783_REGCTRL_VMMC2_STBY_LSH 22 +#define MC13783_REGCTRL_VMMC2_STBY_WID 1 +#define MC13783_REGCTRL_VMMC2_MODE_LSH 23 +#define MC13783_REGCTRL_VMMC2_MODE_WID 1 + +/* + * Reg Regulator Misc. + */ +#define MC13783_REGCTRL_GPO1_EN_LSH 6 +#define MC13783_REGCTRL_GPO1_EN_WID 1 +#define MC13783_REGCTRL_GPO1_EN_ENABLE 1 +#define MC13783_REGCTRL_GPO1_EN_DISABLE 0 +#define MC13783_REGCTRL_GPO2_EN_LSH 8 +#define MC13783_REGCTRL_GPO2_EN_WID 1 +#define MC13783_REGCTRL_GPO2_EN_ENABLE 1 +#define MC13783_REGCTRL_GPO2_EN_DISABLE 0 +#define MC13783_REGCTRL_GPO3_EN_LSH 10 +#define MC13783_REGCTRL_GPO3_EN_WID 1 +#define MC13783_REGCTRL_GPO3_EN_ENABLE 1 +#define MC13783_REGCTRL_GPO3_EN_DISABLE 0 +#define MC13783_REGCTRL_GPO4_EN_LSH 12 +#define MC13783_REGCTRL_GPO4_EN_WID 1 +#define MC13783_REGCTRL_GPO4_EN_ENABLE 1 +#define MC13783_REGCTRL_GPO4_EN_DISABLE 0 +#define MC13783_REGCTRL_VIBPINCTRL_LSH 14 +#define MC13783_REGCTRL_VIBPINCTRL_WID 1 + +/* + * Reg Regulator Setting 0 + */ +#define MC13783_REGSET_VIOLO_LSH 2 +#define MC13783_REGSET_VIOLO_WID 2 +#define MC13783_REGSET_VDIG_LSH 4 +#define MC13783_REGSET_VDIG_WID 2 +#define MC13783_REGSET_VGEN_LSH 6 +#define MC13783_REGSET_VGEN_WID 3 +#define MC13783_REGSET_VRFDIG_LSH 9 +#define MC13783_REGSET_VRFDIG_WID 2 +#define MC13783_REGSET_VRFREF_LSH 11 +#define MC13783_REGSET_VRFREF_WID 2 +#define MC13783_REGSET_VRFCP_LSH 13 +#define MC13783_REGSET_VRFCP_WID 1 +#define MC13783_REGSET_VSIM_LSH 14 +#define MC13783_REGSET_VSIM_WID 1 +#define MC13783_REGSET_VESIM_LSH 15 +#define MC13783_REGSET_VESIM_WID 1 +#define MC13783_REGSET_VCAM_LSH 16 +#define MC13783_REGSET_VCAM_WID 3 + +/* + * Reg Regulator Setting 1 + */ +#define MC13783_REGSET_VVIB_LSH 0 +#define MC13783_REGSET_VVIB_WID 2 +#define MC13783_REGSET_VRF1_LSH 2 +#define MC13783_REGSET_VRF1_WID 2 +#define MC13783_REGSET_VRF2_LSH 4 +#define MC13783_REGSET_VRF2_WID 2 +#define MC13783_REGSET_VMMC1_LSH 6 +#define MC13783_REGSET_VMMC1_WID 3 +#define MC13783_REGSET_VMMC2_LSH 9 +#define MC13783_REGSET_VMMC2_WID 3 + +/* + * Reg Switcher 0 + */ +#define MC13783_SWSET_SW1A_LSH 0 +#define MC13783_SWSET_SW1A_WID 6 +#define MC13783_SWSET_SW1A_DVS_LSH 6 +#define MC13783_SWSET_SW1A_DVS_WID 6 +#define MC13783_SWSET_SW1A_STDBY_LSH 12 +#define MC13783_SWSET_SW1A_STDBY_WID 6 + +/* + * Reg Switcher 1 + */ +#define MC13783_SWSET_SW1B_LSH 0 +#define MC13783_SWSET_SW1B_WID 6 +#define MC13783_SWSET_SW1B_DVS_LSH 6 +#define MC13783_SWSET_SW1B_DVS_WID 6 +#define MC13783_SWSET_SW1B_STDBY_LSH 12 +#define MC13783_SWSET_SW1B_STDBY_WID 6 + +/* + * Reg Switcher 2 + */ +#define MC13783_SWSET_SW2A_LSH 0 +#define MC13783_SWSET_SW2A_WID 6 +#define MC13783_SWSET_SW2A_DVS_LSH 6 +#define MC13783_SWSET_SW2A_DVS_WID 6 +#define MC13783_SWSET_SW2A_STDBY_LSH 12 +#define MC13783_SWSET_SW2A_STDBY_WID 6 + +/* + * Reg Switcher 3 + */ +#define MC13783_SWSET_SW2B_LSH 0 +#define MC13783_SWSET_SW2B_WID 6 +#define MC13783_SWSET_SW2B_DVS_LSH 6 +#define MC13783_SWSET_SW2B_DVS_WID 6 +#define MC13783_SWSET_SW2B_STDBY_LSH 12 +#define MC13783_SWSET_SW2B_STDBY_WID 6 + +/* + * Reg Switcher 4 + */ +#define MC13783_SWCTRL_SW1A_MODE_LSH 0 +#define MC13783_SWCTRL_SW1A_MODE_WID 2 +#define MC13783_SWCTRL_SW1A_STBY_MODE_LSH 2 +#define MC13783_SWCTRL_SW1A_STBY_MODE_WID 2 +#define MC13783_SWCTRL_SW1A_DVS_SPEED_LSH 6 +#define MC13783_SWCTRL_SW1A_DVS_SPEED_WID 2 +#define MC13783_SWCTRL_SW1A_PANIC_MODE_LSH 8 +#define MC13783_SWCTRL_SW1A_PANIC_MODE_WID 1 +#define MC13783_SWCTRL_SW1A_SOFTSTART_LSH 9 +#define MC13783_SWCTRL_SW1A_SOFTSTART_WID 1 +#define MC13783_SWCTRL_SW1B_MODE_LSH 10 +#define MC13783_SWCTRL_SW1B_MODE_WID 2 +#define MC13783_SWCTRL_SW1B_STBY_MODE_LSH 12 +#define MC13783_SWCTRL_SW1B_STBY_MODE_WID 2 +#define MC13783_SWCTRL_SW1B_DVS_SPEED_LSH 14 +#define MC13783_SWCTRL_SW1B_DVS_SPEED_WID 2 +#define MC13783_SWCTRL_SW1B_PANIC_MODE_LSH 16 +#define MC13783_SWCTRL_SW1B_PANIC_MODE_WID 1 +#define MC13783_SWCTRL_SW1B_SOFTSTART_LSH 17 +#define MC13783_SWCTRL_SW1B_SOFTSTART_WID 1 +#define MC13783_SWCTRL_PLL_EN_LSH 18 +#define MC13783_SWCTRL_PLL_EN_WID 1 +#define MC13783_SWCTRL_PLL_EN_ENABLE 1 +#define MC13783_SWCTRL_PLL_EN_DISABLE 0 +#define MC13783_SWCTRL_PLL_FACTOR_LSH 19 +#define MC13783_SWCTRL_PLL_FACTOR_WID 3 + +/* + * Reg Switcher 5 + */ +#define MC13783_SWCTRL_SW2A_MODE_LSH 0 +#define MC13783_SWCTRL_SW2A_MODE_WID 2 +#define MC13783_SWCTRL_SW2A_STBY_MODE_LSH 2 +#define MC13783_SWCTRL_SW2A_STBY_MODE_WID 2 +#define MC13783_SWCTRL_SW2A_DVS_SPEED_LSH 6 +#define MC13783_SWCTRL_SW2A_DVS_SPEED_WID 2 +#define MC13783_SWCTRL_SW2A_PANIC_MODE_LSH 8 +#define MC13783_SWCTRL_SW2A_PANIC_MODE_WID 1 +#define MC13783_SWCTRL_SW2A_SOFTSTART_LSH 9 +#define MC13783_SWCTRL_SW2A_SOFTSTART_WID 1 +#define MC13783_SWCTRL_SW2B_MODE_LSH 10 +#define MC13783_SWCTRL_SW2B_MODE_WID 2 +#define MC13783_SWCTRL_SW2B_STBY_MODE_LSH 12 +#define MC13783_SWCTRL_SW2B_STBY_MODE_WID 2 +#define MC13783_SWCTRL_SW2B_DVS_SPEED_LSH 14 +#define MC13783_SWCTRL_SW2B_DVS_SPEED_WID 2 +#define MC13783_SWCTRL_SW2B_PANIC_MODE_LSH 16 +#define MC13783_SWCTRL_SW2B_PANIC_MODE_WID 1 +#define MC13783_SWCTRL_SW2B_SOFTSTART_LSH 17 +#define MC13783_SWCTRL_SW2B_SOFTSTART_WID 1 +#define MC13783_SWSET_SW3_LSH 18 +#define MC13783_SWSET_SW3_WID 2 +#define MC13783_SWCTRL_SW3_EN_LSH 20 +#define MC13783_SWCTRL_SW3_EN_WID 2 +#define MC13783_SWCTRL_SW3_EN_ENABLE 1 +#define MC13783_SWCTRL_SW3_EN_DISABLE 0 +#define MC13783_SWCTRL_SW3_STBY_LSH 21 +#define MC13783_SWCTRL_SW3_STBY_WID 1 +#define MC13783_SWCTRL_SW3_MODE_LSH 22 +#define MC13783_SWCTRL_SW3_MODE_WID 1 + +/* + * Switcher configuration + */ +#define MC13783_SWCTRL_SW_MODE_SYNC_RECT_EN 0 +#define MC13783_SWCTRL_SW_MODE_PULSE_NO_SKIP_EN 1 +#define MC13783_SWCTRL_SW_MODE_PULSE_SKIP_EN 2 +#define MC13783_SWCTRL_SW_MODE_LOW_POWER_EN 3 +#define MC13783_REGTRL_LP_MODE_ENABLE 1 +#define MC13783_REGTRL_LP_MODE_DISABLE 0 +#define MC13783_REGTRL_STBY_MODE_ENABLE 1 +#define MC13783_REGTRL_STBY_MODE_DISABLE 0 + +#endif /* __MC13783_POWER_DEFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_adc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_adc.c @@ -0,0 +1,1542 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_adc.c + * @brief This is the main file of PMIC(mc13783) ADC driver. + * + * @ingroup PMIC_ADC + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../core/pmic.h" +#include "pmic_adc_defs.h" + +#define NB_ADC_REG 5 + +static int pmic_adc_major; + +/* internal function */ +static void callback_tsi(void *); +static void callback_adcdone(void *); +static void callback_adcbisdone(void *); +static void callback_adc_comp_high(void *); + +/*! + * Number of users waiting in suspendq + */ +static int swait = 0; + +/*! + * To indicate whether any of the adc devices are suspending + */ +static int suspend_flag = 0; + +/*! + * The suspendq is used by blocking application calls + */ +static wait_queue_head_t suspendq; + +static struct class *pmic_adc_class; + +/* + * ADC mc13783 API + */ +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_adc_init); +EXPORT_SYMBOL(pmic_adc_deinit); +EXPORT_SYMBOL(pmic_adc_convert); +EXPORT_SYMBOL(pmic_adc_convert_8x); +EXPORT_SYMBOL(pmic_adc_convert_multichnnel); +EXPORT_SYMBOL(pmic_adc_set_touch_mode); +EXPORT_SYMBOL(pmic_adc_get_touch_mode); +EXPORT_SYMBOL(pmic_adc_get_touch_sample); +EXPORT_SYMBOL(pmic_adc_get_battery_current); +EXPORT_SYMBOL(pmic_adc_active_comparator); +EXPORT_SYMBOL(pmic_adc_deactive_comparator); + +static DECLARE_COMPLETION(adcdone_it); +static DECLARE_COMPLETION(adcbisdone_it); +static DECLARE_COMPLETION(adc_tsi); +static pmic_event_callback_t tsi_event; +static pmic_event_callback_t event_adc; +static pmic_event_callback_t event_adc_bis; +static pmic_event_callback_t adc_comp_h; +static bool data_ready_adc_1; +static bool data_ready_adc_2; +static bool adc_ts; +static bool wait_ts; +static bool monitor_en; +static bool monitor_adc; +static t_check_mode wcomp_mode; +static DECLARE_MUTEX(convert_mutex); + +void (*monitoring_cb) (void); /*call back to be called when event is detected. */ + +static DECLARE_WAIT_QUEUE_HEAD(queue_adc_busy); +static t_adc_state adc_dev[2]; + +static unsigned channel_num[] = { + 0, + 1, + 3, + 4, + 2, + 12, + 13, + 14, + 15, + -1, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 7, + 6, + -1, + -1, + -1, + -1, + 5, + 7 +}; + +static bool pmic_adc_ready; + +int is_pmic_adc_ready() +{ + return pmic_adc_ready; +} +EXPORT_SYMBOL(is_pmic_adc_ready); + + +/*! + * This is the suspend of power management for the mc13783 ADC API. + * It supports SAVE and POWER_DOWN state. + * + * @param pdev the device + * @param state the state + * + * @return This function returns 0 if successful. + */ +static int pmic_adc_suspend(struct platform_device *pdev, pm_message_t state) +{ + unsigned int reg_value = 0; + suspend_flag = 1; + CHECK_ERROR(pmic_write_reg(REG_ADC_0, DEF_ADC_0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_2, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_3, DEF_ADC_3, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_4, reg_value, PMIC_ALL_BITS)); + + return 0; +}; + +/*! + * This is the resume of power management for the mc13783 adc API. + * It supports RESTORE state. + * + * @param pdev the device + * + * @return This function returns 0 if successful. + */ +static int pmic_adc_resume(struct platform_device *pdev) +{ + /* nothing for mc13783 adc */ + unsigned int adc_0_reg, adc_1_reg; + suspend_flag = 0; + + /* let interrupt of TSI again */ + adc_0_reg = ADC_WAIT_TSI_0; + CHECK_ERROR(pmic_write_reg(REG_ADC_0, adc_0_reg, PMIC_ALL_BITS)); + adc_1_reg = ADC_WAIT_TSI_1 | (ADC_BIS * adc_ts); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, adc_1_reg, PMIC_ALL_BITS)); + + while (swait > 0) { + swait--; + wake_up_interruptible(&suspendq); + } + + return 0; +}; + +/* + * Call back functions + */ + +/*! + * This is the callback function called on TSI mc13783 event, used in synchronous call. + */ +static void callback_tsi(void *unused) +{ + pr_debug("*** TSI IT mc13783 PMIC_ADC_GET_TOUCH_SAMPLE ***\n"); + if (wait_ts) { + complete(&adc_tsi); + pmic_event_mask(EVENT_TSI); + } +} + +/*! + * This is the callback function called on ADCDone mc13783 event. + */ +static void callback_adcdone(void *unused) +{ + if (data_ready_adc_1) { + complete(&adcdone_it); + } +} + +/*! + * This is the callback function called on ADCDone mc13783 event. + */ +static void callback_adcbisdone(void *unused) +{ + pr_debug("* adcdone bis it callback *\n"); + if (data_ready_adc_2) { + complete(&adcbisdone_it); + } +} + +/*! + * This is the callback function called on mc13783 event. + */ +static void callback_adc_comp_high(void *unused) +{ + pr_debug("* adc comp it high *\n"); + if (wcomp_mode == CHECK_HIGH || wcomp_mode == CHECK_LOW_OR_HIGH) { + /* launch callback */ + if (monitoring_cb != NULL) { + monitoring_cb(); + } + } +} + +/*! + * This function performs filtering and rejection of excessive noise prone + * samples. + * + * @param ts_curr Touch screen value + * + * @return This function returns 0 on success, -1 otherwise. + */ +static int pmic_adc_filter(t_touch_screen * ts_curr) +{ + unsigned int ydiff1, ydiff2, ydiff3, xdiff1, xdiff2, xdiff3; + unsigned int sample_sumx, sample_sumy; + static unsigned int prev_x[FILTLEN], prev_y[FILTLEN]; + int index = 0; + unsigned int y_curr, x_curr; + static int filt_count = 0; + /* Added a variable filt_type to decide filtering at run-time */ + unsigned int filt_type = 0; + + if (ts_curr->contact_resistance == 0) { + ts_curr->x_position = 0; + ts_curr->y_position = 0; + filt_count = 0; + return 0; + } + + ydiff1 = abs(ts_curr->y_position1 - ts_curr->y_position2); + ydiff2 = abs(ts_curr->y_position2 - ts_curr->y_position3); + ydiff3 = abs(ts_curr->y_position1 - ts_curr->y_position3); + if ((ydiff1 > DELTA_Y_MAX) || + (ydiff2 > DELTA_Y_MAX) || (ydiff3 > DELTA_Y_MAX)) { + pr_debug("pmic_adc_filter: Ret pos 1\n"); + return -1; + } + + xdiff1 = abs(ts_curr->x_position1 - ts_curr->x_position2); + xdiff2 = abs(ts_curr->x_position2 - ts_curr->x_position3); + xdiff3 = abs(ts_curr->x_position1 - ts_curr->x_position3); + + if ((xdiff1 > DELTA_X_MAX) || + (xdiff2 > DELTA_X_MAX) || (xdiff3 > DELTA_X_MAX)) { + pr_debug("mc13783_adc_filter: Ret pos 2\n"); + return -1; + } + /* Compute two closer values among the three available Y readouts */ + + if (ydiff1 < ydiff2) { + if (ydiff1 < ydiff3) { + // Sample 0 & 1 closest together + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position2; + } else { + // Sample 0 & 2 closest together + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position3; + } + } else { + if (ydiff2 < ydiff3) { + // Sample 1 & 2 closest together + sample_sumy = ts_curr->y_position2 + + ts_curr->y_position3; + } else { + // Sample 0 & 2 closest together + sample_sumy = ts_curr->y_position1 + + ts_curr->y_position3; + } + } + + /* + * Compute two closer values among the three available X + * readouts + */ + if (xdiff1 < xdiff2) { + if (xdiff1 < xdiff3) { + // Sample 0 & 1 closest together + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position2; + } else { + // Sample 0 & 2 closest together + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position3; + } + } else { + if (xdiff2 < xdiff3) { + // Sample 1 & 2 closest together + sample_sumx = ts_curr->x_position2 + + ts_curr->x_position3; + } else { + // Sample 0 & 2 closest together + sample_sumx = ts_curr->x_position1 + + ts_curr->x_position3; + } + } + /* + * Wait FILTER_MIN_DELAY number of samples to restart + * filtering + */ + if (filt_count < FILTER_MIN_DELAY) { + /* + * Current output is the average of the two closer + * values and no filtering is used + */ + y_curr = (sample_sumy / 2); + x_curr = (sample_sumx / 2); + ts_curr->y_position = y_curr; + ts_curr->x_position = x_curr; + filt_count++; + } else { + if (abs(sample_sumx - (prev_x[0] + prev_x[1])) > + (DELTA_X_MAX * 16)) { + pr_debug("pmic_adc_filter: : Ret pos 3\n"); + return -1; + } + if (abs(sample_sumy - (prev_y[0] + prev_y[1])) > + (DELTA_Y_MAX * 16)) { + return -1; + } + sample_sumy /= 2; + sample_sumx /= 2; + /* Use hard filtering if the sample difference < 10 */ + if ((abs(sample_sumy - prev_y[0]) > 10) || + (abs(sample_sumx - prev_x[0]) > 10)) { + filt_type = 1; + } + + /* + * Current outputs are the average of three previous + * values and the present readout + */ + y_curr = sample_sumy; + for (index = 0; index < FILTLEN; index++) { + if (filt_type == 0) { + y_curr = y_curr + (prev_y[index]); + } else { + y_curr = y_curr + (prev_y[index] / 3); + } + } + if (filt_type == 0) { + y_curr = y_curr >> 2; + } else { + y_curr = y_curr >> 1; + } + ts_curr->y_position = y_curr; + + x_curr = sample_sumx; + for (index = 0; index < FILTLEN; index++) { + if (filt_type == 0) { + x_curr = x_curr + (prev_x[index]); + } else { + x_curr = x_curr + (prev_x[index] / 3); + } + } + if (filt_type == 0) { + x_curr = x_curr >> 2; + } else { + x_curr = x_curr >> 1; + } + ts_curr->x_position = x_curr; + + } + + /* Update previous X and Y values */ + for (index = (FILTLEN - 1); index > 0; index--) { + prev_x[index] = prev_x[index - 1]; + prev_y[index] = prev_y[index - 1]; + } + + /* + * Current output will be the most recent past for the + * next sample + */ + prev_y[0] = y_curr; + prev_x[0] = x_curr; + + return 0; +} + +/*! + * This function implements the open method on a MC13783 ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_adc_open(struct inode *inode, struct file *file) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + pr_debug("mc13783_adc : mc13783_adc_open()\n"); + return 0; +} + +/*! + * This function implements the release method on a MC13783 ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_adc_free(struct inode *inode, struct file *file) +{ + pr_debug("mc13783_adc : mc13783_adc_free()\n"); + return 0; +} + +/*! + * This function initializes all ADC registers with default values. This + * function also registers the interrupt events. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +int pmic_adc_init(void) +{ + unsigned int reg_value = 0, i = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + for (i = 0; i < ADC_NB_AVAILABLE; i++) { + adc_dev[i] = ADC_FREE; + } + CHECK_ERROR(pmic_write_reg(REG_ADC_0, DEF_ADC_0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_2, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_3, DEF_ADC_3, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_4, reg_value, PMIC_ALL_BITS)); + reg_value = 0x001000; + CHECK_ERROR(pmic_write_reg(REG_ARBITRATION_PERIPHERAL_AUDIO, reg_value, + 0xFFFFFF)); + + data_ready_adc_1 = false; + data_ready_adc_2 = false; + adc_ts = false; + wait_ts = false; + monitor_en = false; + monitor_adc = false; + wcomp_mode = CHECK_LOW; + monitoring_cb = NULL; + /* sub to ADCDone IT */ + event_adc.param = NULL; + event_adc.func = callback_adcdone; + CHECK_ERROR(pmic_event_subscribe(EVENT_ADCDONEI, event_adc)); + + /* sub to ADCDoneBis IT */ + event_adc_bis.param = NULL; + event_adc_bis.func = callback_adcbisdone; + CHECK_ERROR(pmic_event_subscribe(EVENT_ADCBISDONEI, event_adc_bis)); + + /* sub to Touch Screen IT */ + tsi_event.param = NULL; + tsi_event.func = callback_tsi; + CHECK_ERROR(pmic_event_subscribe(EVENT_TSI, tsi_event)); + + /* ADC reading above high limit */ + adc_comp_h.param = NULL; + adc_comp_h.func = callback_adc_comp_high; + CHECK_ERROR(pmic_event_subscribe(EVENT_WHIGHI, adc_comp_h)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables the ADC, de-registers the interrupt events. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_deinit(void) +{ + CHECK_ERROR(pmic_event_unsubscribe(EVENT_ADCDONEI, event_adc)); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_ADCBISDONEI, event_adc_bis)); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_TSI, tsi_event)); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_WHIGHI, adc_comp_h)); + + return PMIC_SUCCESS; +} + +/*! + * This function initializes adc_param structure. + * + * @param adc_param Structure to be initialized. + * + * @return This function returns 0 if successful. + */ +int mc13783_adc_init_param(t_adc_param * adc_param) +{ + int i = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + adc_param->delay = 0; + adc_param->conv_delay = false; + adc_param->single_channel = false; + adc_param->group = false; + adc_param->channel_0 = BATTERY_VOLTAGE; + adc_param->channel_1 = BATTERY_VOLTAGE; + adc_param->read_mode = 0; + adc_param->wait_tsi = 0; + adc_param->chrgraw_devide_5 = true; + adc_param->read_ts = false; + adc_param->ts_value.x_position = 0; + adc_param->ts_value.y_position = 0; + adc_param->ts_value.contact_resistance = 0; + for (i = 0; i <= MAX_CHANNEL; i++) { + adc_param->value[i] = 0; + } + return 0; +} + +/*! + * This function starts the convert. + * + * @param adc_param contains all adc configuration and return value. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS mc13783_adc_convert(t_adc_param * adc_param) +{ + bool use_bis = false; + unsigned int adc_0_reg = 0, adc_1_reg = 0, reg_1 = 0, result_reg = + 0, i = 0; + unsigned int result = 0, temp = 0; + pmic_version_t mc13783_ver; + pr_debug("mc13783 ADC - mc13783_adc_convert ....\n"); + if (suspend_flag == 1) { + return -EBUSY; + } + + if (adc_param->wait_tsi) { + /* we need to set ADCEN 1 for TSI interrupt on mc13783 1.x */ + /* configure adc to wait tsi interrupt */ + INIT_COMPLETION(adc_tsi); + pr_debug("mc13783 ADC - pmic_write_reg ....\n"); + /*for ts don't use bis */ + adc_0_reg = 0x001c00 | (ADC_BIS * 0); + pmic_event_unmask(EVENT_TSI); + CHECK_ERROR(pmic_write_reg + (REG_ADC_0, adc_0_reg, PMIC_ALL_BITS)); + /*for ts don't use bis */ + adc_1_reg = 0x200001 | (ADC_BIS * 0); + CHECK_ERROR(pmic_write_reg + (REG_ADC_1, adc_1_reg, PMIC_ALL_BITS)); + pr_debug("wait tsi ....\n"); + wait_ts = true; + wait_for_completion_interruptible(&adc_tsi); + wait_ts = false; + } + if (adc_param->read_ts == false) + down(&convert_mutex); + use_bis = mc13783_adc_request(adc_param->read_ts); + if (use_bis < 0) { + pr_debug("process has received a signal and got interrupted\n"); + return -EINTR; + } + + /* CONFIGURE ADC REG 0 */ + adc_0_reg = 0; + adc_1_reg = 0; + if (adc_param->read_ts == false) { + adc_0_reg = adc_param->read_mode & 0x00003F; + /* add auto inc */ + adc_0_reg |= ADC_INC; + if (use_bis) { + /* add adc bis */ + adc_0_reg |= ADC_BIS; + } + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + if (adc_param->chrgraw_devide_5) { + adc_0_reg |= ADC_CHRGRAW_D5; + } + } + if (adc_param->single_channel) { + adc_1_reg |= ADC_SGL_CH; + } + + if (adc_param->conv_delay) { + adc_1_reg |= ADC_ATO; + } + + if (adc_param->group) { + adc_1_reg |= ADC_ADSEL; + } + + if (adc_param->single_channel) { + adc_1_reg |= ADC_SGL_CH; + } + + adc_1_reg |= (adc_param->channel_0 << ADC_CH_0_POS) & + ADC_CH_0_MASK; + adc_1_reg |= (adc_param->channel_1 << ADC_CH_1_POS) & + ADC_CH_1_MASK; + } else { + adc_0_reg = 0x003c00 | (ADC_BIS * use_bis) | ADC_INC; + } + pr_debug("Write Reg %i = %x\n", REG_ADC_0, adc_0_reg); + /*Change has been made here */ + CHECK_ERROR(pmic_write_reg(REG_ADC_0, adc_0_reg, + ADC_INC | ADC_BIS | ADC_CHRGRAW_D5 | + 0xfff00ff)); + /* CONFIGURE ADC REG 1 */ + if (adc_param->read_ts == false) { + adc_1_reg |= ADC_NO_ADTRIG; + adc_1_reg |= ADC_EN; + adc_1_reg |= (adc_param->delay << ADC_DELAY_POS) & + ADC_DELAY_MASK; + if (use_bis) { + adc_1_reg |= ADC_BIS; + } + } else { + /* configure and start convert to read x and y position */ + /* configure to read 2 value in channel selection 1 & 2 */ + adc_1_reg = 0x100409 | (ADC_BIS * use_bis) | ADC_NO_ADTRIG; + } + reg_1 = adc_1_reg; + if (use_bis == 0) { + data_ready_adc_1 = false; + adc_1_reg |= ASC_ADC; + data_ready_adc_1 = true; + pr_debug("Write Reg %i = %x\n", REG_ADC_1, adc_1_reg); + INIT_COMPLETION(adcdone_it); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, adc_1_reg, + ADC_SGL_CH | ADC_ATO | ADC_ADSEL + | ADC_CH_0_MASK | ADC_CH_1_MASK | + ADC_NO_ADTRIG | ADC_EN | + ADC_DELAY_MASK | ASC_ADC | ADC_BIS)); + pr_debug("wait adc done \n"); + wait_for_completion_interruptible(&adcdone_it); + data_ready_adc_1 = false; + } else { + data_ready_adc_2 = false; + adc_1_reg |= ASC_ADC; + data_ready_adc_2 = true; + INIT_COMPLETION(adcbisdone_it); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, adc_1_reg, 0xFFFFFF)); + temp = 0x800000; + CHECK_ERROR(pmic_write_reg(REG_ADC_3, temp, 0xFFFFFF)); + temp = 0x001000; + pmic_write_reg(REG_ARBITRATION_PERIPHERAL_AUDIO, temp, + 0xFFFFFF); + pr_debug("wait adc done bis\n"); + wait_for_completion_interruptible(&adcbisdone_it); + data_ready_adc_2 = false; + } + /* read result and store in adc_param */ + result = 0; + if (use_bis == 0) { + result_reg = REG_ADC_2; + } else { + result_reg = REG_ADC_4; + } + CHECK_ERROR(pmic_write_reg(REG_ADC_1, 4 << ADC_CH_1_POS, + ADC_CH_0_MASK | ADC_CH_1_MASK)); + + for (i = 0; i <= 3; i++) { + CHECK_ERROR(pmic_read_reg(result_reg, &result, PMIC_ALL_BITS)); + pr_debug("result %i = %x\n", result_reg, result); + adc_param->value[i] = ((result & ADD1_RESULT_MASK) >> 2); + adc_param->value[i + 4] = ((result & ADD2_RESULT_MASK) >> 14); + } + if (adc_param->read_ts) { + adc_param->ts_value.x_position = adc_param->value[2]; + adc_param->ts_value.x_position1 = adc_param->value[0]; + adc_param->ts_value.x_position2 = adc_param->value[1]; + adc_param->ts_value.x_position3 = adc_param->value[2]; + adc_param->ts_value.y_position1 = adc_param->value[3]; + adc_param->ts_value.y_position2 = adc_param->value[4]; + adc_param->ts_value.y_position3 = adc_param->value[5]; + adc_param->ts_value.y_position = adc_param->value[5]; + adc_param->ts_value.contact_resistance = adc_param->value[6]; + + } + + /*if (adc_param->read_ts) { + adc_param->ts_value.x_position = adc_param->value[2]; + adc_param->ts_value.y_position = adc_param->value[5]; + adc_param->ts_value.contact_resistance = adc_param->value[6]; + } */ + mc13783_adc_release(use_bis); + if (adc_param->read_ts == false) + up(&convert_mutex); + + return PMIC_SUCCESS; +} + +/*! + * This function select the required read_mode for a specific channel. + * + * @param channel The channel to be sampled + * + * @return This function returns the requires read_mode + */ +t_reading_mode mc13783_set_read_mode(t_channel channel) +{ + t_reading_mode read_mode = 0; + + switch (channel) { + case LICELL: + read_mode = M_LITHIUM_CELL; + break; + case CHARGE_CURRENT: + read_mode = M_CHARGE_CURRENT; + break; + case BATTERY_CURRENT: + read_mode = M_BATTERY_CURRENT; + break; + case THERMISTOR: + read_mode = M_THERMISTOR; + break; + case DIE_TEMP: + read_mode = M_DIE_TEMPERATURE; + break; + case USB_ID: + read_mode = M_UID; + break; + default: + read_mode = 0; + } + + return read_mode; +} + +/*! + * This function triggers a conversion and returns one sampling result of one + * channel. + * + * @param channel The channel to be sampled + * @param result The pointer to the conversion result. The memory + * should be allocated by the caller of this function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_convert(t_channel channel, unsigned short *result) +{ + t_adc_param adc_param; + PMIC_STATUS ret; + + if (suspend_flag == 1) { + return -EBUSY; + } + + channel = channel_num[channel]; + if (channel == -1) { + pr_debug("Wrong channel ID\n"); + return PMIC_PARAMETER_ERROR; + } + mc13783_adc_init_param(&adc_param); + pr_debug("pmic_adc_convert\n"); + adc_param.read_ts = false; + adc_param.read_mode = mc13783_set_read_mode(channel); + + adc_param.single_channel = true; + /* Find the group */ + if ((channel >= 0) && (channel <= 7)) { + adc_param.channel_0 = channel; + adc_param.group = false; + } else if ((channel >= 8) && (channel <= 15)) { + adc_param.channel_0 = channel & 0x07; + adc_param.group = true; + } else { + return PMIC_PARAMETER_ERROR; + } + ret = mc13783_adc_convert(&adc_param); + *result = adc_param.value[0]; + return ret; +} + +/*! + * This function triggers a conversion and returns eight sampling results of + * one channel. + * + * @param channel The channel to be sampled + * @param result The pointer to array to store eight sampling results. + * The memory should be allocated by the caller of this + * function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_convert_8x(t_channel channel, unsigned short *result) +{ + t_adc_param adc_param; + int i; + PMIC_STATUS ret; + if (suspend_flag == 1) { + return -EBUSY; + } + + channel = channel_num[channel]; + + if (channel == -1) { + pr_debug("Wrong channel ID\n"); + return PMIC_PARAMETER_ERROR; + } + mc13783_adc_init_param(&adc_param); + pr_debug("pmic_adc_convert_8x\n"); + adc_param.read_ts = false; + adc_param.single_channel = true; + adc_param.read_mode = mc13783_set_read_mode(channel); + if ((channel >= 0) && (channel <= 7)) { + adc_param.channel_0 = channel; + adc_param.channel_1 = channel; + adc_param.group = false; + } else if ((channel >= 8) && (channel <= 15)) { + adc_param.channel_0 = channel & 0x07; + adc_param.channel_1 = channel & 0x07; + adc_param.group = true; + } else { + return PMIC_PARAMETER_ERROR; + } + + ret = mc13783_adc_convert(&adc_param); + for (i = 0; i <= 7; i++) { + result[i] = adc_param.value[i]; + } + return ret; +} + +/*! + * This function triggers a conversion and returns sampling results of each + * specified channel. + * + * @param channels This input parameter is bitmap to specify channels + * to be sampled. + * @param result The pointer to array to store sampling results. + * The memory should be allocated by the caller of this + * function. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_convert_multichnnel(t_channel channels, + unsigned short *result) +{ + t_adc_param adc_param; + int i; + PMIC_STATUS ret; + if (suspend_flag == 1) { + return -EBUSY; + } + mc13783_adc_init_param(&adc_param); + pr_debug("pmic_adc_convert_multichnnel\n"); + + channels = channel_num[channels]; + + if (channels == -1) { + pr_debug("Wrong channel ID\n"); + return PMIC_PARAMETER_ERROR; + } + + adc_param.read_ts = false; + adc_param.single_channel = false; + if ((channels >= 0) && (channels <= 7)) { + adc_param.channel_0 = channels; + adc_param.channel_1 = ((channels + 4) % 4) + 4; + adc_param.group = false; + } else if ((channels >= 8) && (channels <= 15)) { + channels = channels & 0x07; + adc_param.channel_0 = channels; + adc_param.channel_1 = ((channels + 4) % 4) + 4; + adc_param.group = true; + } else { + return PMIC_PARAMETER_ERROR; + } + adc_param.read_mode = 0x00003f; + adc_param.read_ts = false; + ret = mc13783_adc_convert(&adc_param); + + for (i = 0; i <= 7; i++) { + result[i] = adc_param.value[i]; + } + return ret; +} + +/*! + * This function sets touch screen operation mode. + * + * @param touch_mode Touch screen operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_set_touch_mode(t_touch_mode touch_mode) +{ + if (suspend_flag == 1) { + return -EBUSY; + } + CHECK_ERROR(pmic_write_reg(REG_ADC_0, + BITFVAL(MC13783_ADC0_TS_M, touch_mode), + BITFMASK(MC13783_ADC0_TS_M))); + return PMIC_SUCCESS; +} + +/*! + * This function retrieves the current touch screen operation mode. + * + * @param touch_mode Pointer to the retrieved touch screen operation + * mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_touch_mode(t_touch_mode * touch_mode) +{ + unsigned int value; + if (suspend_flag == 1) { + return -EBUSY; + } + CHECK_ERROR(pmic_read_reg(REG_ADC_0, &value, PMIC_ALL_BITS)); + + *touch_mode = BITFEXT(value, MC13783_ADC0_TS_M); + + return PMIC_SUCCESS; +} + +/*! + * This function retrieves the current touch screen (X,Y) coordinates. + * + * @param touch_sample Pointer to touch sample. + * @param wait indicates whether this call must block or not. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_touch_sample(t_touch_screen * touch_sample, int wait) +{ + if (mc13783_adc_read_ts(touch_sample, wait) != 0) + return PMIC_ERROR; + if (0 == pmic_adc_filter(touch_sample)) + return PMIC_SUCCESS; + else + return PMIC_ERROR; +} + +/*! + * This function read the touch screen value. + * + * @param ts_value return value of touch screen + * @param wait_tsi if true, this function is synchronous (wait in TSI event). + * + * @return This function returns 0. + */ +PMIC_STATUS mc13783_adc_read_ts(t_touch_screen * ts_value, int wait_tsi) +{ + t_adc_param param; + pr_debug("mc13783_adc : mc13783_adc_read_ts\n"); + if (suspend_flag == 1) { + return -EBUSY; + } + if (wait_ts) { + pr_debug("mc13783_adc : error TS busy \n"); + return PMIC_ERROR; + } + mc13783_adc_init_param(¶m); + param.wait_tsi = wait_tsi; + param.read_ts = true; + if (mc13783_adc_convert(¶m) != 0) + return PMIC_ERROR; + /* check if x-y is ok */ + if ((param.ts_value.x_position1 < TS_X_MAX) && + (param.ts_value.x_position1 >= TS_X_MIN) && + (param.ts_value.y_position1 < TS_Y_MAX) && + (param.ts_value.y_position1 >= TS_Y_MIN) && + (param.ts_value.x_position2 < TS_X_MAX) && + (param.ts_value.x_position2 >= TS_X_MIN) && + (param.ts_value.y_position2 < TS_Y_MAX) && + (param.ts_value.y_position2 >= TS_Y_MIN) && + (param.ts_value.x_position3 < TS_X_MAX) && + (param.ts_value.x_position3 >= TS_X_MIN) && + (param.ts_value.y_position3 < TS_Y_MAX) && + (param.ts_value.y_position3 >= TS_Y_MIN)) { + ts_value->x_position = param.ts_value.x_position; + ts_value->x_position1 = param.ts_value.x_position1; + ts_value->x_position2 = param.ts_value.x_position2; + ts_value->x_position3 = param.ts_value.x_position3; + ts_value->y_position = param.ts_value.y_position; + ts_value->y_position1 = param.ts_value.y_position1; + ts_value->y_position2 = param.ts_value.y_position2; + ts_value->y_position3 = param.ts_value.y_position3; + ts_value->contact_resistance = + param.ts_value.contact_resistance + 1; + + } else { + ts_value->x_position = 0; + ts_value->y_position = 0; + ts_value->contact_resistance = 0; + + } + return PMIC_SUCCESS; +} + +/*! + * This function starts a Battery Current mode conversion. + * + * @param mode Conversion mode. + * @param result Battery Current measurement result. + * if \a mode = ADC_8CHAN_1X, the result is \n + * result[0] = (BATTP - BATT_I) \n + * if \a mode = ADC_1CHAN_8X, the result is \n + * result[0] = BATTP \n + * result[1] = BATT_I \n + * result[2] = BATTP \n + * result[3] = BATT_I \n + * result[4] = BATTP \n + * result[5] = BATT_I \n + * result[6] = BATTP \n + * result[7] = BATT_I + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_get_battery_current(t_conversion_mode mode, + unsigned short *result) +{ + PMIC_STATUS ret; + t_channel channel; + if (suspend_flag == 1) { + return -EBUSY; + } + channel = BATTERY_CURRENT; + if (mode == ADC_8CHAN_1X) { + ret = pmic_adc_convert(channel, result); + } else { + ret = pmic_adc_convert_8x(channel, result); + } + return ret; +} + +/*! + * This function request a ADC. + * + * @return This function returns index of ADC to be used (0 or 1) if successful. + return -1 if error. + */ +int mc13783_adc_request(bool read_ts) +{ + int adc_index = -1; + if (read_ts != 0) { + /*for ts we use bis=0 */ + if (adc_dev[0] == ADC_USED) + return -1; + /*no wait here */ + adc_dev[0] = ADC_USED; + adc_index = 0; + } else { + /*for other adc use bis = 1 */ + if (adc_dev[1] == ADC_USED) { + return -1; + /*no wait here */ + } + adc_dev[1] = ADC_USED; + adc_index = 1; + } + pr_debug("mc13783_adc : request ADC %d\n", adc_index); + return adc_index; +} + +/*! + * This function release an ADC. + * + * @param adc_index index of ADC to be released. + * + * @return This function returns 0 if successful. + */ +int mc13783_adc_release(int adc_index) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + + pr_debug("mc13783_adc : release ADC %d\n", adc_index); + if ((adc_dev[adc_index] == ADC_MONITORING) || + (adc_dev[adc_index] == ADC_USED)) { + adc_dev[adc_index] = ADC_FREE; + wake_up(&queue_adc_busy); + return 0; + } + return -1; +} + +/*! + * This function initializes monitoring structure. + * + * @param monitor Structure to be initialized. + * + * @return This function returns 0 if successful. + */ +int mc13783_adc_init_monitor_param(t_monitoring_param * monitor) +{ + pr_debug("mc13783_adc : init monitor\n"); + monitor->delay = 0; + monitor->conv_delay = false; + monitor->channel = BATTERY_VOLTAGE; + monitor->read_mode = 0; + monitor->comp_low = 0; + monitor->comp_high = 0; + monitor->group = 0; + monitor->check_mode = CHECK_LOW_OR_HIGH; + monitor->callback = NULL; + return 0; +} + +/*! + * This function actives the comparator. When comparator is active and ADC + * is enabled, the 8th converted value will be digitally compared against the + * window defined by WLOW and WHIGH registers. + * + * @param low Comparison window low threshold (WLOW). + * @param high Comparison window high threshold (WHIGH). + * @param channel The channel to be sampled + * @param callback Callback function to be called when the converted + * value is beyond the comparison window. The callback + * function will pass a parameter of type + * \b t_comp_expection to indicate the reason of + * comparator exception. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_active_comparator(unsigned char low, + unsigned char high, + t_channel channel, + t_comparator_cb callback) +{ + bool use_bis = false; + unsigned int adc_0_reg = 0, adc_1_reg = 0, adc_3_reg = 0; + t_monitoring_param monitoring; + + if (suspend_flag == 1) { + return -EBUSY; + } + if (monitor_en) { + pr_debug("mc13783_adc : monitoring already configured\n"); + return PMIC_ERROR; + } + monitor_en = true; + mc13783_adc_init_monitor_param(&monitoring); + monitoring.comp_low = low; + monitoring.comp_high = high; + monitoring.channel = channel; + monitoring.callback = (void *)callback; + + use_bis = mc13783_adc_request(false); + if (use_bis < 0) { + pr_debug("mc13783_adc : request error\n"); + return PMIC_ERROR; + } + monitor_adc = use_bis; + + adc_0_reg = 0; + + /* TO DO ADOUT CONFIGURE */ + adc_0_reg = monitoring.read_mode & ADC_MODE_MASK; + if (use_bis) { + /* add adc bis */ + adc_0_reg |= ADC_BIS; + } + adc_0_reg |= ADC_WCOMP; + + /* CONFIGURE ADC REG 1 */ + adc_1_reg = 0; + adc_1_reg |= ADC_EN; + if (monitoring.conv_delay) { + adc_1_reg |= ADC_ATO; + } + if (monitoring.group) { + adc_1_reg |= ADC_ADSEL; + } + adc_1_reg |= (monitoring.channel << ADC_CH_0_POS) & ADC_CH_0_MASK; + adc_1_reg |= (monitoring.delay << ADC_DELAY_POS) & ADC_DELAY_MASK; + if (use_bis) { + adc_1_reg |= ADC_BIS; + } + + adc_3_reg |= (monitoring.comp_high << ADC_WCOMP_H_POS) & + ADC_WCOMP_H_MASK; + adc_3_reg |= (monitoring.comp_low << ADC_WCOMP_L_POS) & + ADC_WCOMP_L_MASK; + if (use_bis) { + adc_3_reg |= ADC_BIS; + } + + wcomp_mode = monitoring.check_mode; + /* call back to be called when event is detected. */ + monitoring_cb = monitoring.callback; + + CHECK_ERROR(pmic_write_reg(REG_ADC_0, adc_0_reg, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, adc_1_reg, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_3, adc_3_reg, PMIC_ALL_BITS)); + return PMIC_SUCCESS; +} + +/*! + * This function deactivates the comparator. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_adc_deactive_comparator(void) +{ + unsigned int reg_value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + if (!monitor_en) { + pr_debug("mc13783_adc : adc monitoring free\n"); + return PMIC_ERROR; + } + + if (monitor_en) { + reg_value = ADC_BIS; + } + + /* clear all reg value */ + CHECK_ERROR(pmic_write_reg(REG_ADC_0, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_1, reg_value, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC_3, reg_value, PMIC_ALL_BITS)); + + reg_value = 0; + + if (monitor_adc) { + CHECK_ERROR(pmic_write_reg + (REG_ADC_4, reg_value, PMIC_ALL_BITS)); + } else { + CHECK_ERROR(pmic_write_reg + (REG_ADC_2, reg_value, PMIC_ALL_BITS)); + } + + mc13783_adc_release(monitor_adc); + monitor_en = false; + return PMIC_SUCCESS; +} + +/*! + * This function implements IOCTL controls on a MC13783 ADC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int pmic_adc_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + t_adc_convert_param *convert_param; + t_touch_mode touch_mode; + t_touch_screen touch_sample; + unsigned short b_current; + t_adc_comp_param *comp_param; + if ((_IOC_TYPE(cmd) != 'p') && (_IOC_TYPE(cmd) != 'D')) + return -ENOTTY; + + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + + switch (cmd) { + case PMIC_ADC_INIT: + pr_debug("init adc\n"); + CHECK_ERROR(pmic_adc_init()); + break; + + case PMIC_ADC_DEINIT: + pr_debug("deinit adc\n"); + CHECK_ERROR(pmic_adc_deinit()); + break; + + case PMIC_ADC_CONVERT: + if ((convert_param = kmalloc(sizeof(t_adc_convert_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(convert_param, (t_adc_convert_param *) arg, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_adc_convert(convert_param->channel, + convert_param->result), + (kfree(convert_param))); + + if (copy_to_user((t_adc_convert_param *) arg, convert_param, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + kfree(convert_param); + break; + + case PMIC_ADC_CONVERT_8X: + if ((convert_param = kmalloc(sizeof(t_adc_convert_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(convert_param, (t_adc_convert_param *) arg, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_adc_convert_8x(convert_param->channel, + convert_param->result), + (kfree(convert_param))); + + if (copy_to_user((t_adc_convert_param *) arg, convert_param, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + kfree(convert_param); + break; + + case PMIC_ADC_CONVERT_MULTICHANNEL: + if ((convert_param = kmalloc(sizeof(t_adc_convert_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(convert_param, (t_adc_convert_param *) arg, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + + CHECK_ERROR_KFREE(pmic_adc_convert_multichnnel + (convert_param->channel, + convert_param->result), + (kfree(convert_param))); + + if (copy_to_user((t_adc_convert_param *) arg, convert_param, + sizeof(t_adc_convert_param))) { + kfree(convert_param); + return -EFAULT; + } + kfree(convert_param); + break; + + case PMIC_ADC_SET_TOUCH_MODE: + CHECK_ERROR(pmic_adc_set_touch_mode((t_touch_mode) arg)); + break; + + case PMIC_ADC_GET_TOUCH_MODE: + CHECK_ERROR(pmic_adc_get_touch_mode(&touch_mode)); + if (copy_to_user((t_touch_mode *) arg, &touch_mode, + sizeof(t_touch_mode))) { + return -EFAULT; + } + break; + + case PMIC_ADC_GET_TOUCH_SAMPLE: + pr_debug("pmic_adc_ioctl: " "PMIC_ADC_GET_TOUCH_SAMPLE\n"); + CHECK_ERROR(pmic_adc_get_touch_sample(&touch_sample, 1)); + if (copy_to_user((t_touch_screen *) arg, &touch_sample, + sizeof(t_touch_screen))) { + return -EFAULT; + } + break; + + case PMIC_ADC_GET_BATTERY_CURRENT: + CHECK_ERROR(pmic_adc_get_battery_current(ADC_8CHAN_1X, + &b_current)); + if (copy_to_user((unsigned short *)arg, &b_current, + sizeof(unsigned short))) { + + return -EFAULT; + } + break; + + case PMIC_ADC_ACTIVATE_COMPARATOR: + if ((comp_param = kmalloc(sizeof(t_adc_comp_param), GFP_KERNEL)) + == NULL) { + return -ENOMEM; + } + if (copy_from_user(comp_param, (t_adc_comp_param *) arg, + sizeof(t_adc_comp_param))) { + kfree(comp_param); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_adc_active_comparator(comp_param->wlow, + comp_param->whigh, + comp_param-> + channel, + comp_param-> + callback), + (kfree(comp_param))); + break; + + case PMIC_ADC_DEACTIVE_COMPARATOR: + CHECK_ERROR(pmic_adc_deactive_comparator()); + break; + + default: + pr_debug("pmic_adc_ioctl: unsupported ioctl command 0x%x\n", + cmd); + return -EINVAL; + } + return 0; +} + +static struct file_operations mc13783_adc_fops = { + .owner = THIS_MODULE, + .ioctl = pmic_adc_ioctl, + .open = pmic_adc_open, + .release = pmic_adc_free, +}; + +static int pmic_adc_module_probe(struct platform_device *pdev) +{ + int ret = 0; + struct device *temp_class; + + pmic_adc_major = register_chrdev(0, "pmic_adc", &mc13783_adc_fops); + + if (pmic_adc_major < 0) { + pr_debug(KERN_ERR "Unable to get a major for pmic_adc\n"); + return pmic_adc_major; + } + init_waitqueue_head(&suspendq); + + pmic_adc_class = class_create(THIS_MODULE, "pmic_adc"); + if (IS_ERR(pmic_adc_class)) { + pr_debug(KERN_ERR "Error creating pmic_adc class.\n"); + ret = PTR_ERR(pmic_adc_class); + goto err_out1; + } + + temp_class = device_create(pmic_adc_class, NULL, + MKDEV(pmic_adc_major, 0), NULL, "pmic_adc"); + if (IS_ERR(temp_class)) { + pr_debug(KERN_ERR "Error creating pmic_adc class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + ret = pmic_adc_init(); + if (ret != PMIC_SUCCESS) { + pr_debug(KERN_ERR "Error in pmic_adc_init.\n"); + goto err_out4; + } + + pmic_adc_ready = 1; + pr_debug(KERN_INFO "PMIC ADC successfully probed\n"); + return ret; + + err_out4: + device_destroy(pmic_adc_class, MKDEV(pmic_adc_major, 0)); + err_out2: + class_destroy(pmic_adc_class); + err_out1: + unregister_chrdev(pmic_adc_major, "pmic_adc"); + return ret; +} + +static int pmic_adc_module_remove(struct platform_device *pdev) +{ + pmic_adc_ready = 0; + pmic_adc_deinit(); + device_destroy(pmic_adc_class, MKDEV(pmic_adc_major, 0)); + class_destroy(pmic_adc_class); + unregister_chrdev(pmic_adc_major, "pmic_adc"); + pr_debug(KERN_INFO "PMIC ADC successfully removed\n"); + return 0; +} + +static struct platform_driver pmic_adc_driver_ldm = { + .driver = { + .name = "pmic_adc", + }, + .suspend = pmic_adc_suspend, + .resume = pmic_adc_resume, + .probe = pmic_adc_module_probe, + .remove = pmic_adc_module_remove, +}; + +/* + * Initialization and Exit + */ +static int __init pmic_adc_module_init(void) +{ + pr_debug("PMIC ADC driver loading...\n"); + return platform_driver_register(&pmic_adc_driver_ldm); +} + +static void __exit pmic_adc_module_exit(void) +{ + platform_driver_unregister(&pmic_adc_driver_ldm); + pr_debug("PMIC ADC driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +module_init(pmic_adc_module_init); +module_exit(pmic_adc_module_exit); + +MODULE_DESCRIPTION("PMIC ADC device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13783/pmic_light.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13783/pmic_light.c @@ -0,0 +1,2769 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13783/pmic_light.c + * @brief This is the main file of PMIC(mc13783) Light and Backlight driver. + * + * @ingroup PMIC_LIGHT + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include "pmic_light_defs.h" + +#define NB_LIGHT_REG 6 + +static int pmic_light_major; + +/*! + * Number of users waiting in suspendq + */ +static int swait = 0; + +/*! + * To indicate whether any of the light devices are suspending + */ +static int suspend_flag = 0; + +/*! + * The suspendq is used to block application calls + */ +static wait_queue_head_t suspendq; + +static struct class *pmic_light_class; + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_bklit_tcled_master_enable); +EXPORT_SYMBOL(pmic_bklit_tcled_master_disable); +EXPORT_SYMBOL(pmic_bklit_master_enable); +EXPORT_SYMBOL(pmic_bklit_master_disable); +EXPORT_SYMBOL(pmic_bklit_set_current); +EXPORT_SYMBOL(pmic_bklit_get_current); +EXPORT_SYMBOL(pmic_bklit_set_dutycycle); +EXPORT_SYMBOL(pmic_bklit_get_dutycycle); +EXPORT_SYMBOL(pmic_bklit_set_cycle_time); +EXPORT_SYMBOL(pmic_bklit_get_cycle_time); +EXPORT_SYMBOL(pmic_bklit_set_mode); +EXPORT_SYMBOL(pmic_bklit_get_mode); +EXPORT_SYMBOL(pmic_bklit_rampup); +EXPORT_SYMBOL(pmic_bklit_off_rampup); +EXPORT_SYMBOL(pmic_bklit_rampdown); +EXPORT_SYMBOL(pmic_bklit_off_rampdown); +EXPORT_SYMBOL(pmic_bklit_enable_edge_slow); +EXPORT_SYMBOL(pmic_bklit_disable_edge_slow); +EXPORT_SYMBOL(pmic_bklit_get_edge_slow); +EXPORT_SYMBOL(pmic_bklit_set_strobemode); +EXPORT_SYMBOL(pmic_tcled_enable); +EXPORT_SYMBOL(pmic_tcled_disable); +EXPORT_SYMBOL(pmic_tcled_get_mode); +EXPORT_SYMBOL(pmic_tcled_ind_set_current); +EXPORT_SYMBOL(pmic_tcled_ind_get_current); +EXPORT_SYMBOL(pmic_tcled_ind_set_blink_pattern); +EXPORT_SYMBOL(pmic_tcled_ind_get_blink_pattern); +EXPORT_SYMBOL(pmic_tcled_fun_set_current); +EXPORT_SYMBOL(pmic_tcled_fun_get_current); +EXPORT_SYMBOL(pmic_tcled_fun_set_cycletime); +EXPORT_SYMBOL(pmic_tcled_fun_get_cycletime); +EXPORT_SYMBOL(pmic_tcled_fun_set_dutycycle); +EXPORT_SYMBOL(pmic_tcled_fun_get_dutycycle); +EXPORT_SYMBOL(pmic_tcled_fun_blendedramps); +EXPORT_SYMBOL(pmic_tcled_fun_sawramps); +EXPORT_SYMBOL(pmic_tcled_fun_blendedbowtie); +EXPORT_SYMBOL(pmic_tcled_fun_chasinglightspattern); +EXPORT_SYMBOL(pmic_tcled_fun_strobe); +EXPORT_SYMBOL(pmic_tcled_fun_rampup); +EXPORT_SYMBOL(pmic_tcled_get_fun_rampup); +EXPORT_SYMBOL(pmic_tcled_fun_rampdown); +EXPORT_SYMBOL(pmic_tcled_get_fun_rampdown); +EXPORT_SYMBOL(pmic_tcled_fun_triode_on); +EXPORT_SYMBOL(pmic_tcled_fun_triode_off); +EXPORT_SYMBOL(pmic_tcled_enable_edge_slow); +EXPORT_SYMBOL(pmic_tcled_disable_edge_slow); +EXPORT_SYMBOL(pmic_tcled_enable_half_current); +EXPORT_SYMBOL(pmic_tcled_disable_half_current); +EXPORT_SYMBOL(pmic_tcled_enable_audio_modulation); +EXPORT_SYMBOL(pmic_tcled_disable_audio_modulation); +EXPORT_SYMBOL(pmic_bklit_set_boost_mode); +EXPORT_SYMBOL(pmic_bklit_get_boost_mode); +EXPORT_SYMBOL(pmic_bklit_config_boost_mode); +EXPORT_SYMBOL(pmic_bklit_gets_boost_mode); + +/*! + * This is the suspend of power management for the pmic light API. + * It suports SAVE and POWER_DOWN state. + * + * @param pdev the device + * @param state the state + * + * @return This function returns 0 if successful. + */ +static int pmic_light_suspend(struct platform_device *dev, pm_message_t state) +{ + suspend_flag = 1; + /* switch off all leds and backlights */ + CHECK_ERROR(pmic_light_init_reg()); + + return 0; +}; + +/*! + * This is the resume of power management for the pmic light API. + * It suports RESTORE state. + * + * @param dev the device + * + * @return This function returns 0 if successful. + */ +static int pmic_light_resume(struct platform_device *pdev) +{ + suspend_flag = 0; + while (swait > 0) { + swait--; + wake_up_interruptible(&suspendq); + } + + return 0; +}; + +/*! + * This function enables backlight & tcled. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_tcled_master_enable(void) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + reg_value = BITFVAL(BIT_LEDEN, 1); + mask = BITFMASK(BIT_LEDEN); + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables backlight & tcled. + * + * @return This function returns PMIC_SUCCESS if successful + */ +PMIC_STATUS pmic_bklit_tcled_master_disable(void) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + reg_value = BITFVAL(BIT_LEDEN, 0); + mask = BITFMASK(BIT_LEDEN); + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function enables backlight. Not supported on mc13783 + * Use pmic_bklit_tcled_master_enable. + * + * @return This function returns PMIC_NOT_SUPPORTED + */ +PMIC_STATUS pmic_bklit_master_enable(void) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function disables backlight. Not supported on mc13783 + * Use pmic_bklit_tcled_master_enable. + * + * @return This function returns PMIC_NOT_SUPPORTED + */ +PMIC_STATUS pmic_bklit_master_disable(void) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function sets backlight current level. + * + * @param channel Backlight channel + * @param level Backlight current level, as the following table. + * @verbatim + level main & aux keyboard + ------ ----------- -------- + 0 0 mA 0 mA + 1 3 mA 12 mA + 2 6 mA 24 mA + 3 9 mA 36 mA + 4 12 mA 48 mA + 5 15 mA 60 mA + 6 18 mA 72 mA + 7 21 mA 84 mA + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_current(t_bklit_channel channel, unsigned char level) +{ + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + value = BITFVAL(BIT_CL_MAIN, level); + mask = BITFMASK(BIT_CL_MAIN); + break; + case BACKLIGHT_LED2: + value = BITFVAL(BIT_CL_AUX, level); + mask = BITFMASK(BIT_CL_AUX); + break; + case BACKLIGHT_LED3: + value = BITFVAL(BIT_CL_KEY, level); + mask = BITFMASK(BIT_CL_KEY); + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(LREG_2, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives backlight current level. + * The channels are not individually adjustable, hence + * the channel parameter is ignored. + * + * @param channel Backlight channel (Ignored because the + * channels are not individually adjustable) + * @param level Pointer to store backlight current level result. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_current(t_bklit_channel channel, + unsigned char *level) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_CL_MAIN); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_CL_AUX); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_CL_KEY); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_2, ®_value, mask)); + + switch (channel) { + case BACKLIGHT_LED1: + *level = BITFEXT(reg_value, BIT_CL_MAIN); + break; + case BACKLIGHT_LED2: + *level = BITFEXT(reg_value, BIT_CL_AUX); + break; + case BACKLIGHT_LED3: + *level = BITFEXT(reg_value, BIT_CL_KEY); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets a backlight channel duty cycle. + * LED perceived brightness for each zone may be individually set by setting + * duty cycle. The default setting is for 0% duty cycle; this keeps all zone + * drivers turned off even after the master enable command. Each LED current + * sink can be turned on and adjusted for brightness with an independent 4 bit + * word for a duty cycle ranging from 0% to 100% in approximately 6.7% steps. + * + * @param channel Backlight channel. + * @param dc Backlight duty cycle, as the following table. + * @verbatim + dc Duty Cycle (% On-time over Cycle Time) + ------ --------------------------------------- + 0 0% + 1 6.7% + 2 13.3% + 3 20% + 4 26.7% + 5 33.3% + 6 40% + 7 46.7% + 8 53.3% + 9 60% + 10 66.7% + 11 73.3% + 12 80% + 13 86.7% + 14 93.3% + 15 100% + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_dutycycle(t_bklit_channel channel, unsigned char dc) +{ + unsigned int reg_value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (dc > 15) { + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_2, ®_value, PMIC_ALL_BITS)); + + switch (channel) { + case BACKLIGHT_LED1: + reg_value = reg_value & (~MASK_DUTY_CYCLE); + reg_value = reg_value | (dc << BIT_DUTY_CYCLE); + break; + case BACKLIGHT_LED2: + reg_value = reg_value & (~(MASK_DUTY_CYCLE << INDEX_AUX)); + reg_value = reg_value | (dc << (BIT_DUTY_CYCLE + INDEX_AUX)); + break; + case BACKLIGHT_LED3: + reg_value = reg_value & (~(MASK_DUTY_CYCLE << INDEX_KYD)); + reg_value = reg_value | (dc << (BIT_DUTY_CYCLE + INDEX_KYD)); + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(LREG_2, reg_value, PMIC_ALL_BITS)); + return PMIC_SUCCESS; + +} + +/*! + * This function retrives a backlight channel duty cycle. + * + * @param channel Backlight channel. + * @param dc Pointer to backlight duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_dutycycle(t_bklit_channel channel, unsigned char *dc) +{ + unsigned int reg_value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + CHECK_ERROR(pmic_read_reg(LREG_2, ®_value, PMIC_ALL_BITS)); + + switch (channel) { + case BACKLIGHT_LED1: + *dc = (int)((reg_value & (MASK_DUTY_CYCLE)) + >> BIT_DUTY_CYCLE); + + break; + case BACKLIGHT_LED2: + *dc = (int)((reg_value & (MASK_DUTY_CYCLE << INDEX_AUX)) + >> (BIT_DUTY_CYCLE + INDEX_AUX)); + break; + case BACKLIGHT_LED3: + *dc = (int)((reg_value & (MASK_DUTY_CYCLE << + INDEX_KYD)) >> (BIT_DUTY_CYCLE + + INDEX_KYD)); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets a backlight channel cycle time. + * Cycle Time is defined as the period of a complete cycle of + * Time_on + Time_off. The default Cycle Time is set to 0.01 seconds such that + * the 100 Hz on-off cycling is averaged out by the eye to eliminate + * flickering. Additionally, the Cycle Time can be programmed to intentionally + * extend the period of on-off cycles for a visual pulsating or blinking effect. + * + * @param period Backlight cycle time, as the following table. + * @verbatim + period Cycle Time + -------- ------------ + 0 0.01 seconds + 1 0.1 seconds + 2 0.5 seconds + 3 2 seconds + @endverbatim + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_cycle_time(unsigned char period) +{ + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + if (period > 3) { + return PMIC_PARAMETER_ERROR; + } + mask = BITFMASK(BIT_PERIOD); + value = BITFVAL(BIT_PERIOD, period); + CHECK_ERROR(pmic_write_reg(LREG_2, value, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function retrives a backlight channel cycle time setting. + * + * @param period Pointer to save backlight cycle time setting result. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_cycle_time(unsigned char *period) +{ + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + mask = BITFMASK(BIT_PERIOD); + CHECK_ERROR(pmic_read_reg(LREG_2, &value, mask)); + *period = BITFEXT(value, BIT_PERIOD); + return PMIC_SUCCESS; +} + +/*! + * This function sets backlight operation mode. There are two modes of + * operations: current control and triode mode. + * The Duty Cycle/Cycle Time control is retained in Triode Mode. Audio + * coupling is not available in Triode Mode. + * + * @param channel Backlight channel. + * @param mode Backlight operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_set_mode(t_bklit_channel channel, t_bklit_mode mode) +{ + unsigned int reg_value = 0; + unsigned int clear_val = 0; + unsigned int triode_val = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + CHECK_ERROR(pmic_read_reg(LREG_0, ®_value, PMIC_ALL_BITS)); + + switch (channel) { + case BACKLIGHT_LED1: + clear_val = ~(MASK_TRIODE_MAIN_BL); + triode_val = MASK_TRIODE_MAIN_BL; + break; + case BACKLIGHT_LED2: + clear_val = ~(MASK_TRIODE_MAIN_BL << INDEX_AUXILIARY); + triode_val = (MASK_TRIODE_MAIN_BL << INDEX_AUXILIARY); + break; + case BACKLIGHT_LED3: + clear_val = ~(MASK_TRIODE_MAIN_BL << INDEX_KEYPAD); + triode_val = (MASK_TRIODE_MAIN_BL << INDEX_KEYPAD); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + reg_value = (reg_value & clear_val); + + if (mode == BACKLIGHT_TRIODE_MODE) { + reg_value = (reg_value | triode_val); + } + + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, PMIC_ALL_BITS)); + return PMIC_SUCCESS; +} + +/*! + * This function gets backlight operation mode. There are two modes of + * operations: current control and triode mode. + * The Duty Cycle/Cycle Time control is retained in Triode Mode. Audio + * coupling is not available in Triode Mode. + * + * @param channel Backlight channel. + * @param mode Backlight operation mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_mode(t_bklit_channel channel, t_bklit_mode * mode) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_TRIODE_MAIN_BL); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_TRIODE_AUX_BL); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_TRIODE_KEY_BL); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_0, ®_value, mask)); + + switch (channel) { + case BACKLIGHT_LED1: + *mode = BITFEXT(reg_value, BIT_TRIODE_MAIN_BL); + break; + case BACKLIGHT_LED2: + *mode = BITFEXT(reg_value, BIT_TRIODE_AUX_BL); + break; + case BACKLIGHT_LED3: + *mode = BITFEXT(reg_value, BIT_TRIODE_KEY_BL); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function starts backlight brightness ramp up function; ramp time is + * fixed at 0.5 seconds. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_rampup(t_bklit_channel channel) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_UP_MAIN_BL); + reg_value = BITFVAL(BIT_UP_MAIN_BL, 1); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_UP_AUX_BL); + reg_value = BITFVAL(BIT_UP_AUX_BL, 1); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_UP_KEY_BL); + reg_value = BITFVAL(BIT_UP_KEY_BL, 1); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function stops backlight brightness ramp up function; + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_off_rampup(t_bklit_channel channel) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_UP_MAIN_BL); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_UP_AUX_BL); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_UP_KEY_BL); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function starts backlight brightness ramp down function; ramp time is + * fixed at 0.5 seconds. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_rampdown(t_bklit_channel channel) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_DOWN_MAIN_BL); + reg_value = BITFVAL(BIT_DOWN_MAIN_BL, 1); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_DOWN_AUX_BL); + reg_value = BITFVAL(BIT_DOWN_AUX_BL, 1); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_DOWN_KEY_BL); + reg_value = BITFVAL(BIT_DOWN_KEY_BL, 1); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function stops backlight brightness ramp down function. + * + * @param channel Backlight channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_off_rampdown(t_bklit_channel channel) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (channel) { + case BACKLIGHT_LED1: + mask = BITFMASK(BIT_DOWN_MAIN_BL); + break; + case BACKLIGHT_LED2: + mask = BITFMASK(BIT_DOWN_AUX_BL); + break; + case BACKLIGHT_LED3: + mask = BITFMASK(BIT_DOWN_KEY_BL); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, reg_value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function enables backlight analog edge slowing mode. Analog Edge + * Slowing slows down the transient edges to reduce the chance of coupling LED + * modulation activity into other circuits. Rise and fall times will be targeted + * for approximately 50usec. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_enable_edge_slow(void) +{ + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + mask = BITFMASK(BIT_SLEWLIMBL); + value = BITFVAL(BIT_SLEWLIMBL, 1); + CHECK_ERROR(pmic_write_reg(LREG_2, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables backlight analog edge slowing mode. The backlight + * drivers will default to an <93>Instant On<94> mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_disable_edge_slow(void) +{ + unsigned int mask; + + if (suspend_flag == 1) { + return -EBUSY; + } + mask = BITFMASK(BIT_SLEWLIMBL); + CHECK_ERROR(pmic_write_reg(LREG_2, 0, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets backlight analog edge slowing mode. DThe backlight + * + * @param edge Edge slowing mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_bklit_get_edge_slow(bool * edge) +{ + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + mask = BITFMASK(BIT_SLEWLIMBL); + CHECK_ERROR(pmic_read_reg(LREG_2, &value, mask)); + *edge = (bool) BITFEXT(value, BIT_SLEWLIMBL); + + return PMIC_SUCCESS; +} + +/*! + * This function sets backlight Strobe Light Pulsing mode. + * + * @param channel Backlight channel. + * @param mode Strobe Light Pulsing mode. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_bklit_set_strobemode(t_bklit_channel channel, + t_bklit_strobe_mode mode) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function enables tri-color LED. + * + * @param mode Tri-color LED operation mode. + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_enable(t_tcled_mode mode, t_funlight_bank bank) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (mode) { + case TCLED_FUN_MODE: + switch (bank) { + case TCLED_FUN_BANK1: + mask = MASK_BK1_FL; + value = MASK_BK1_FL; + break; + case TCLED_FUN_BANK2: + mask = MASK_BK2_FL; + value = MASK_BK2_FL; + break; + case TCLED_FUN_BANK3: + mask = MASK_BK3_FL; + value = MASK_BK3_FL; + break; + default: + return PMIC_PARAMETER_ERROR; + } + break; + case TCLED_IND_MODE: + mask = MASK_BK1_FL | MASK_BK2_FL | MASK_BK3_FL; + break; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables tri-color LED. + * + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + * + */ +PMIC_STATUS pmic_tcled_disable(t_funlight_bank bank) +{ + unsigned int mask = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = MASK_BK1_FL; + break; + case TCLED_FUN_BANK2: + mask = MASK_BK2_FL; + break; + case TCLED_FUN_BANK3: + mask = MASK_BK3_FL; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, 0, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives tri-color LED operation mode. + * + * @param mode Pointer to Tri-color LED operation mode. + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_mode(t_tcled_mode * mode, t_funlight_bank bank) +{ + unsigned int val; + unsigned int mask; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = MASK_BK1_FL; + break; + case TCLED_FUN_BANK2: + mask = MASK_BK2_FL; + break; + case TCLED_FUN_BANK3: + mask = MASK_BK3_FL; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_0, &val, mask)); + + if (val) { + *mode = TCLED_FUN_MODE; + } else { + *mode = TCLED_IND_MODE; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets a tri-color LED channel current level in indicator mode. + * + * @param channel Tri-color LED channel. + * @param level Current level. + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_set_current(t_ind_channel channel, + t_tcled_cur_level level, + t_funlight_bank bank) +{ + unsigned int reg_conf = 0; + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (level > TCLED_CUR_LEVEL_4) { + return PMIC_PARAMETER_ERROR; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_IND_RED: + value = BITFVAL(BITS_CL_RED, level); + mask = BITFMASK(BITS_CL_RED); + break; + case TCLED_IND_GREEN: + value = BITFVAL(BITS_CL_GREEN, level); + mask = BITFMASK(BITS_CL_GREEN); + break; + case TCLED_IND_BLUE: + value = BITFVAL(BITS_CL_BLUE, level); + mask = BITFMASK(BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg_conf, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives a tri-color LED channel current level + * in indicator mode. + * + * @param channel Tri-color LED channel. + * @param level Pointer to current level. + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_get_current(t_ind_channel channel, + t_tcled_cur_level * level, + t_funlight_bank bank) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_IND_RED: + mask = BITFMASK(BITS_CL_RED); + break; + case TCLED_IND_GREEN: + mask = BITFMASK(BITS_CL_GREEN); + break; + case TCLED_IND_BLUE: + mask = BITFMASK(BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg_conf, &value, mask)); + + switch (channel) { + case TCLED_IND_RED: + *level = BITFEXT(value, BITS_CL_RED); + break; + case TCLED_IND_GREEN: + *level = BITFEXT(value, BITS_CL_GREEN); + break; + case TCLED_IND_BLUE: + *level = BITFEXT(value, BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets a tri-color LED channel blinking pattern in indication + * mode. + * + * @param channel Tri-color LED channel. + * @param pattern Blinking pattern. + * @param skip If true, skip a cycle after each cycle. + * @param bank Selected tri-color bank + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_set_blink_pattern(t_ind_channel channel, + t_tcled_ind_blink_pattern pattern, + bool skip, t_funlight_bank bank) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (skip == true) { + return PMIC_NOT_SUPPORTED; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_IND_RED: + value = BITFVAL(BITS_DC_RED, pattern); + mask = BITFMASK(BITS_DC_RED); + break; + case TCLED_IND_GREEN: + value = BITFVAL(BITS_DC_GREEN, pattern); + mask = BITFMASK(BITS_DC_GREEN); + break; + case TCLED_IND_BLUE: + value = BITFVAL(BITS_DC_BLUE, pattern); + mask = BITFMASK(BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg_conf, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives a tri-color LED channel blinking pattern in + * indication mode. + * + * @param channel Tri-color LED channel. + * @param pattern Pointer to Blinking pattern. + * @param skip Pointer to a boolean varible indicating if skip + * @param bank Selected tri-color bank + * a cycle after each cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_ind_get_blink_pattern(t_ind_channel channel, + t_tcled_ind_blink_pattern * + pattern, bool * skip, + t_funlight_bank bank) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_IND_RED: + mask = BITFMASK(BITS_DC_RED); + break; + case TCLED_IND_GREEN: + mask = BITFMASK(BITS_DC_GREEN); + break; + case TCLED_IND_BLUE: + mask = BITFMASK(BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg_conf, &value, mask)); + + switch (channel) { + case TCLED_IND_RED: + *pattern = BITFEXT(value, BITS_DC_RED); + break; + case TCLED_IND_GREEN: + *pattern = BITFEXT(value, BITS_DC_GREEN); + break; + case TCLED_IND_BLUE: + *pattern = BITFEXT(value, BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets a tri-color LED channel current level in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param level Current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_current(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_cur_level level) +{ + unsigned int reg_conf = 0; + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (level > TCLED_CUR_LEVEL_4) { + return PMIC_PARAMETER_ERROR; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + value = BITFVAL(BITS_CL_RED, level); + mask = BITFMASK(BITS_CL_RED); + break; + case TCLED_FUN_CHANNEL2: + value = BITFVAL(BITS_CL_GREEN, level); + mask = BITFMASK(BITS_CL_GREEN); + break; + case TCLED_FUN_CHANNEL3: + value = BITFVAL(BITS_CL_BLUE, level); + mask = BITFMASK(BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg_conf, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives a tri-color LED channel current level + * in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param level Pointer to current level. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_current(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_cur_level * level) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = BITFMASK(BITS_CL_RED); + break; + case TCLED_FUN_CHANNEL2: + mask = BITFMASK(BITS_CL_GREEN); + break; + case TCLED_FUN_CHANNEL3: + mask = BITFMASK(BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg_conf, &value, mask)); + + switch (channel) { + case TCLED_FUN_CHANNEL1: + *level = BITFEXT(value, BITS_CL_RED); + break; + case TCLED_FUN_CHANNEL2: + *level = BITFEXT(value, BITS_CL_GREEN); + break; + case TCLED_FUN_CHANNEL3: + *level = BITFEXT(value, BITS_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function sets tri-color LED cycle time. + * + * @param bank Tri-color LED bank + * @param ct Cycle time. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_cycletime(t_funlight_bank bank, + t_tcled_fun_cycle_time ct) +{ + unsigned int reg_conf = 0; + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (ct > TC_CYCLE_TIME_4) { + return PMIC_PARAMETER_ERROR; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + value = BITFVAL(BIT_PERIOD, ct); + mask = BITFMASK(BIT_PERIOD); + + CHECK_ERROR(pmic_write_reg(reg_conf, value, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function retrives tri-color LED cycle time in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param ct Pointer to cycle time. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_cycletime(t_funlight_bank bank, + t_tcled_fun_cycle_time * ct) +{ + unsigned int reg_conf = 0; + unsigned int mask; + unsigned int value; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (*ct > TC_CYCLE_TIME_4) { + return PMIC_PARAMETER_ERROR; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + mask = BITFMASK(BIT_PERIOD); + CHECK_ERROR(pmic_read_reg(reg_conf, &value, mask)); + + *ct = BITFVAL(BIT_PERIOD, value); + + return PMIC_SUCCESS; +} + +/*! + * This function sets a tri-color LED channel duty cycle in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param dc Duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_set_dutycycle(t_funlight_bank bank, + t_funlight_channel channel, + unsigned char dc) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + value = BITFVAL(BITS_DC_RED, dc); + mask = BITFMASK(BITS_DC_RED); + break; + case TCLED_FUN_CHANNEL2: + value = BITFVAL(BITS_DC_GREEN, dc); + mask = BITFMASK(BITS_DC_GREEN); + break; + case TCLED_FUN_CHANNEL3: + value = BITFVAL(BITS_DC_BLUE, dc); + mask = BITFMASK(BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(reg_conf, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function retrives a tri-color LED channel duty cycle in Fun Light mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param dc Pointer to duty cycle. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_get_dutycycle(t_funlight_bank bank, + t_funlight_channel channel, + unsigned char *dc) +{ + unsigned int reg_conf = 0; + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + reg_conf = LREG_3; + break; + case TCLED_FUN_BANK2: + reg_conf = LREG_4; + break; + case TCLED_FUN_BANK3: + reg_conf = LREG_5; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = BITFMASK(BITS_DC_RED); + break; + case TCLED_FUN_CHANNEL2: + mask = BITFMASK(BITS_DC_GREEN); + break; + case TCLED_FUN_CHANNEL3: + mask = BITFMASK(BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg_conf, &value, mask)); + + switch (channel) { + case TCLED_FUN_CHANNEL1: + *dc = BITFEXT(value, BITS_DC_RED); + break; + case TCLED_FUN_CHANNEL2: + *dc = BITFEXT(value, BITS_DC_GREEN); + break; + case TCLED_FUN_CHANNEL3: + *dc = BITFEXT(value, BITS_DC_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Blended Ramp fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_blendedramps(t_funlight_bank bank, + t_tcled_fun_speed speed) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (speed) { + case TC_OFF: + value = BITFVAL(BITS_FUN_LIGHT, FUN_LIGHTS_OFF); + break; + case TC_SLOW: + value = BITFVAL(BITS_FUN_LIGHT, BLENDED_RAMPS_SLOW); + break; + case TC_FAST: + value = BITFVAL(BITS_FUN_LIGHT, BLENDED_RAMPS_FAST); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + mask = BITFMASK(BITS_FUN_LIGHT); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Saw Ramp fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_sawramps(t_funlight_bank bank, + t_tcled_fun_speed speed) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (speed) { + case TC_OFF: + value = BITFVAL(BITS_FUN_LIGHT, FUN_LIGHTS_OFF); + break; + case TC_SLOW: + value = BITFVAL(BITS_FUN_LIGHT, SAW_RAMPS_SLOW); + break; + case TC_FAST: + value = BITFVAL(BITS_FUN_LIGHT, SAW_RAMPS_FAST); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + mask = BITFMASK(BITS_FUN_LIGHT); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Blended Bowtie fun light pattern. + * + * @param bank Tri-color LED bank + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_blendedbowtie(t_funlight_bank bank, + t_tcled_fun_speed speed) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (speed) { + case TC_OFF: + value = BITFVAL(BITS_FUN_LIGHT, FUN_LIGHTS_OFF); + break; + case TC_SLOW: + value = BITFVAL(BITS_FUN_LIGHT, BLENDED_INVERSE_RAMPS_SLOW); + break; + case TC_FAST: + value = BITFVAL(BITS_FUN_LIGHT, BLENDED_INVERSE_RAMPS_FAST); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + mask = BITFMASK(BITS_FUN_LIGHT); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Chasing Lights fun light pattern. + * + * @param bank Tri-color LED bank + * @param pattern Chasing light pattern mode. + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_chasinglightspattern(t_funlight_bank bank, + t_chaselight_pattern pattern, + t_tcled_fun_speed speed) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + if (pattern > BGR) { + return PMIC_PARAMETER_ERROR; + } + + switch (speed) { + case TC_OFF: + value = BITFVAL(BITS_FUN_LIGHT, FUN_LIGHTS_OFF); + break; + case TC_SLOW: + if (pattern == PMIC_RGB) { + value = + BITFVAL(BITS_FUN_LIGHT, CHASING_LIGHTS_RGB_SLOW); + } else { + value = + BITFVAL(BITS_FUN_LIGHT, CHASING_LIGHTS_BGR_SLOW); + } + break; + case TC_FAST: + if (pattern == PMIC_RGB) { + value = + BITFVAL(BITS_FUN_LIGHT, CHASING_LIGHTS_RGB_FAST); + } else { + value = + BITFVAL(BITS_FUN_LIGHT, CHASING_LIGHTS_BGR_FAST); + } + break; + default: + return PMIC_PARAMETER_ERROR; + } + + mask = BITFMASK(BITS_FUN_LIGHT); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Strobe Mode fun light pattern. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param speed Speed of pattern. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_strobe(t_funlight_bank bank, + t_funlight_channel channel, + t_tcled_fun_strobe_speed speed) +{ + /* not supported on mc13783 */ + + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function initiates Tri-color LED brightness Ramp Up function; Ramp time + * is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampup Ramp-up configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_rampup(t_funlight_bank bank, + t_funlight_channel channel, bool rampup) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = LEDR1RAMPUP; + value = LEDR1RAMPUP; + break; + case TCLED_FUN_BANK2: + mask = LEDR2RAMPUP; + value = LEDR2RAMPUP; + break; + case TCLED_FUN_BANK3: + mask = LEDR3RAMPUP; + value = LEDR3RAMPUP; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = mask; + value = value; + break; + case TCLED_FUN_CHANNEL2: + mask = mask * 2; + value = value * 2; + break; + case TCLED_FUN_CHANNEL3: + mask = mask * 4; + value = value * 4; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + if (!rampup) { + value = 0; + } + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function gets Tri-color LED brightness Ramp Up function; Ramp time + * is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampup Ramp-up configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_fun_rampup(t_funlight_bank bank, + t_funlight_channel channel, bool * rampup) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = LEDR1RAMPUP; + break; + case TCLED_FUN_BANK2: + mask = LEDR2RAMPUP; + break; + case TCLED_FUN_BANK3: + mask = LEDR3RAMPUP; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = mask; + break; + case TCLED_FUN_CHANNEL2: + mask = mask * 2; + break; + case TCLED_FUN_CHANNEL3: + mask = mask * 4; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_1, &value, mask)); + if (value) { + *rampup = true; + } else { + *rampup = false; + } + + return PMIC_SUCCESS; +} + +/*! + * This function initiates Tri-color LED brightness Ramp Down function; Ramp + * time is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampdown Ramp-down configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_rampdown(t_funlight_bank bank, + t_funlight_channel channel, bool rampdown) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = LEDR1RAMPDOWN; + value = LEDR1RAMPDOWN; + break; + case TCLED_FUN_BANK2: + mask = LEDR2RAMPDOWN; + value = LEDR2RAMPDOWN; + break; + case TCLED_FUN_BANK3: + mask = LEDR3RAMPDOWN; + value = LEDR3RAMPDOWN; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = mask; + value = value; + break; + case TCLED_FUN_CHANNEL2: + mask = mask * 2; + value = value * 2; + break; + case TCLED_FUN_CHANNEL3: + mask = mask * 4; + value = value * 4; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + if (!rampdown) { + value = 0; + } + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + return PMIC_SUCCESS; +} + +/*! + * This function initiates Tri-color LED brightness Ramp Down function; Ramp + * time is fixed at 1 second. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * @param rampdown Ramp-down configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_get_fun_rampdown(t_funlight_bank bank, + t_funlight_channel channel, + bool * rampdown) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = LEDR1RAMPDOWN; + break; + case TCLED_FUN_BANK2: + mask = LEDR2RAMPDOWN; + break; + case TCLED_FUN_BANK3: + mask = LEDR3RAMPDOWN; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + switch (channel) { + case TCLED_FUN_CHANNEL1: + mask = mask; + break; + case TCLED_FUN_CHANNEL2: + mask = mask * 2; + break; + case TCLED_FUN_CHANNEL3: + mask = mask * 4; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(LREG_1, &value, mask)); + if (value) { + *rampdown = true; + } else { + *rampdown = false; + } + return PMIC_SUCCESS; +} + +/*! + * This function enables a Tri-color channel triode mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_triode_on(t_funlight_bank bank, + t_funlight_channel channel) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = MASK_BK1_FL; + value = ENABLE_BK1_FL; + break; + case TCLED_FUN_BANK2: + mask = MASK_BK2_FL; + value = ENABLE_BK2_FL; + break; + case TCLED_FUN_BANK3: + mask = MASK_BK3_FL; + value = ENABLE_BK2_FL; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables a Tri-color LED channel triode mode. + * + * @param bank Tri-color LED bank + * @param channel Tri-color LED channel. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_fun_triode_off(t_funlight_bank bank, + t_funlight_channel channel) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + switch (bank) { + case TCLED_FUN_BANK1: + mask = MASK_BK1_FL; + break; + case TCLED_FUN_BANK2: + mask = MASK_BK2_FL; + break; + case TCLED_FUN_BANK3: + mask = MASK_BK3_FL; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function enables Tri-color LED edge slowing. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_enable_edge_slow(void) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + value = BITFVAL(BIT_SLEWLIMTC, 1); + mask = BITFMASK(BIT_SLEWLIMTC); + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables Tri-color LED edge slowing. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_disable_edge_slow(void) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + value = BITFVAL(BIT_SLEWLIMTC, 0); + mask = BITFMASK(BIT_SLEWLIMTC); + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function enables Tri-color LED half current mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_enable_half_current(void) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + value = BITFVAL(BIT_TC1HALF, 1); + mask = BITFMASK(BIT_TC1HALF); + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function disables Tri-color LED half current mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_tcled_disable_half_current(void) +{ + unsigned int mask = 0; + unsigned int value = 0; + + if (suspend_flag == 1) { + return -EBUSY; + } + + value = BITFVAL(BIT_TC1HALF, 0); + mask = BITFMASK(BIT_TC1HALF); + + CHECK_ERROR(pmic_write_reg(LREG_1, value, mask)); + + return PMIC_SUCCESS; +} + +/*! + * This function enables backlight or Tri-color LED audio modulation. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_enable_audio_modulation(t_led_channel channel, + t_aud_path path, + t_aud_gain gain, bool lpf_bypass) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function disables backlight or Tri-color LED audio modulation. + * + * @return This function returns PMIC_NOT_SUPPORTED. + */ +PMIC_STATUS pmic_tcled_disable_audio_modulation(void) +{ + return PMIC_NOT_SUPPORTED; +} + +/*! + * This function enables the boost mode. + * Only on mc13783 2.0 or higher + * + * @param en_dis Enable or disable the boost mode + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_set_boost_mode(bool en_dis) +{ + + pmic_version_t mc13783_ver; + unsigned int mask; + unsigned int value; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + + if (suspend_flag == 1) { + return -EBUSY; + } + + value = BITFVAL(BIT_BOOSTEN, en_dis); + mask = BITFMASK(BIT_BOOSTEN); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets the boost mode. + * Only on mc13783 2.0 or higher + * + * @param en_dis Enable or disable the boost mode + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_get_boost_mode(bool * en_dis) +{ + pmic_version_t mc13783_ver; + unsigned int mask; + unsigned int value; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + + if (suspend_flag == 1) { + return -EBUSY; + } + mask = BITFMASK(BIT_BOOSTEN); + CHECK_ERROR(pmic_read_reg(LREG_0, &value, mask)); + *en_dis = BITFEXT(value, BIT_BOOSTEN); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function sets boost mode configuration + * Only on mc13783 2.0 or higher + * + * @param abms Define adaptive boost mode selection + * @param abr Define adaptive boost reference + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_config_boost_mode(unsigned int abms, unsigned int abr) +{ + unsigned int conf_boost = 0; + unsigned int mask; + unsigned int value; + pmic_version_t mc13783_ver; + + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + if (suspend_flag == 1) { + return -EBUSY; + } + + if (abms > MAX_BOOST_ABMS) { + return PMIC_PARAMETER_ERROR; + } + + if (abr > MAX_BOOST_ABR) { + return PMIC_PARAMETER_ERROR; + } + + conf_boost = abms | (abr << 3); + + value = BITFVAL(BITS_BOOST, conf_boost); + mask = BITFMASK(BITS_BOOST); + CHECK_ERROR(pmic_write_reg(LREG_0, value, mask)); + + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function gets boost mode configuration + * Only on mc13783 2.0 or higher + * + * @param abms Define adaptive boost mode selection + * @param abr Define adaptive boost reference + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_bklit_gets_boost_mode(unsigned int *abms, unsigned int *abr) +{ + unsigned int mask; + unsigned int value; + pmic_version_t mc13783_ver; + mc13783_ver = pmic_get_version(); + if (mc13783_ver.revision >= 20) { + if (suspend_flag == 1) { + return -EBUSY; + } + + mask = BITFMASK(BITS_BOOST_ABMS); + CHECK_ERROR(pmic_read_reg(LREG_0, &value, mask)); + *abms = BITFEXT(value, BITS_BOOST_ABMS); + + mask = BITFMASK(BITS_BOOST_ABR); + CHECK_ERROR(pmic_read_reg(LREG_0, &value, mask)); + *abr = BITFEXT(value, BITS_BOOST_ABR); + return PMIC_SUCCESS; + } else { + return PMIC_NOT_SUPPORTED; + } +} + +/*! + * This function implements IOCTL controls on a PMIC Light device. + * + + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int pmic_light_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + t_bklit_setting_param *bklit_setting = NULL; + t_tcled_enable_param *tcled_setting; + t_fun_param *fun_param; + t_tcled_ind_param *tcled_ind; + + if (_IOC_TYPE(cmd) != 'p') + return -ENOTTY; + + switch (cmd) { + case PMIC_BKLIT_TCLED_ENABLE: + pmic_bklit_tcled_master_enable(); + break; + + case PMIC_BKLIT_TCLED_DISABLE: + pmic_bklit_tcled_master_disable(); + break; + + case PMIC_BKLIT_ENABLE: + pmic_bklit_master_enable(); + break; + + case PMIC_BKLIT_DISABLE: + pmic_bklit_master_disable(); + break; + + case PMIC_SET_BKLIT: + if ((bklit_setting = kmalloc(sizeof(t_bklit_setting_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(bklit_setting, (t_bklit_setting_param *) arg, + sizeof(t_bklit_setting_param))) { + kfree(bklit_setting); + return -EFAULT; + } + + CHECK_ERROR_KFREE(pmic_bklit_set_mode(bklit_setting->channel, + bklit_setting->mode), + (kfree(bklit_setting))); + + CHECK_ERROR_KFREE(pmic_bklit_set_current(bklit_setting->channel, + bklit_setting-> + current_level), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_set_dutycycle + (bklit_setting->channel, + bklit_setting->duty_cycle), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_set_cycle_time + (bklit_setting->cycle_time), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_set_boost_mode + (bklit_setting->en_dis), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_config_boost_mode + (bklit_setting->abms, bklit_setting->abr), + (kfree(bklit_setting))); + if (bklit_setting->edge_slow != false) { + CHECK_ERROR_KFREE(pmic_bklit_enable_edge_slow(), + (kfree(bklit_setting))); + } else { + CHECK_ERROR_KFREE(pmic_bklit_disable_edge_slow(), + (kfree(bklit_setting))); + } + + kfree(bklit_setting); + break; + + case PMIC_GET_BKLIT: + if ((bklit_setting = kmalloc(sizeof(t_bklit_setting_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + + if (copy_from_user(bklit_setting, (t_bklit_setting_param *) arg, + sizeof(t_bklit_setting_param))) { + kfree(bklit_setting); + return -EFAULT; + } + + CHECK_ERROR_KFREE(pmic_bklit_get_current(bklit_setting->channel, + &bklit_setting-> + current_level), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_get_cycle_time + (&bklit_setting->cycle_time), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_get_dutycycle + (bklit_setting->channel, + &bklit_setting->duty_cycle), + (kfree(bklit_setting))); + bklit_setting->strobe = BACKLIGHT_STROBE_NONE; + CHECK_ERROR_KFREE(pmic_bklit_get_mode(bklit_setting->channel, + &bklit_setting->mode), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_get_edge_slow + (&bklit_setting->edge_slow), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_get_boost_mode + (&bklit_setting->en_dis), + (kfree(bklit_setting))); + CHECK_ERROR_KFREE(pmic_bklit_gets_boost_mode + (&bklit_setting->abms, &bklit_setting->abr), + (kfree(bklit_setting))); + + if (copy_to_user((t_bklit_setting_param *) arg, bklit_setting, + sizeof(t_bklit_setting_param))) { + kfree(bklit_setting); + return -EFAULT; + } + kfree(bklit_setting); + break; + + case PMIC_RAMPUP_BKLIT: + CHECK_ERROR(pmic_bklit_rampup((t_bklit_channel) arg)); + break; + + case PMIC_RAMPDOWN_BKLIT: + CHECK_ERROR(pmic_bklit_rampdown((t_bklit_channel) arg)); + break; + + case PMIC_OFF_RAMPUP_BKLIT: + CHECK_ERROR(pmic_bklit_off_rampup((t_bklit_channel) arg)); + break; + + case PMIC_OFF_RAMPDOWN_BKLIT: + CHECK_ERROR(pmic_bklit_off_rampdown((t_bklit_channel) arg)); + break; + + case PMIC_TCLED_ENABLE: + if ((tcled_setting = kmalloc(sizeof(t_tcled_enable_param), + GFP_KERNEL)) + == NULL) { + return -ENOMEM; + } + + if (copy_from_user(tcled_setting, (t_tcled_enable_param *) arg, + sizeof(t_tcled_enable_param))) { + kfree(tcled_setting); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_tcled_enable(tcled_setting->mode, + tcled_setting->bank), + (kfree(bklit_setting))); + break; + + case PMIC_TCLED_DISABLE: + CHECK_ERROR(pmic_tcled_disable((t_funlight_bank) arg)); + break; + + case PMIC_TCLED_PATTERN: + if ((fun_param = kmalloc(sizeof(t_fun_param), + GFP_KERNEL)) == NULL) { + return -ENOMEM; + } + if (copy_from_user(fun_param, + (t_fun_param *) arg, sizeof(t_fun_param))) { + kfree(fun_param); + return -EFAULT; + } + + switch (fun_param->pattern) { + case BLENDED_RAMPS_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_blendedramps + (fun_param->bank, TC_SLOW), + (kfree(fun_param))); + break; + + case BLENDED_RAMPS_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_blendedramps + (fun_param->bank, TC_FAST), + (kfree(fun_param))); + break; + + case SAW_RAMPS_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_sawramps + (fun_param->bank, TC_SLOW), + (kfree(fun_param))); + break; + + case SAW_RAMPS_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_sawramps + (fun_param->bank, TC_FAST), + (kfree(fun_param))); + break; + + case BLENDED_BOWTIE_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_blendedbowtie + (fun_param->bank, TC_SLOW), + (kfree(fun_param))); + break; + + case BLENDED_BOWTIE_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_blendedbowtie + (fun_param->bank, TC_FAST), + (kfree(fun_param))); + break; + + case STROBE_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_strobe + (fun_param->bank, fun_param->channel, + TC_STROBE_SLOW), (kfree(fun_param))); + break; + + case STROBE_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_strobe + (fun_param->bank, + fun_param->channel, TC_STROBE_SLOW), + (kfree(fun_param))); + break; + + case CHASING_LIGHT_RGB_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_chasinglightspattern + (fun_param->bank, PMIC_RGB, TC_SLOW), + (kfree(fun_param))); + break; + + case CHASING_LIGHT_RGB_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_chasinglightspattern + (fun_param->bank, PMIC_RGB, TC_FAST), + (kfree(fun_param))); + break; + + case CHASING_LIGHT_BGR_SLOW: + CHECK_ERROR_KFREE(pmic_tcled_fun_chasinglightspattern + (fun_param->bank, BGR, TC_SLOW), + (kfree(fun_param))); + break; + + case CHASING_LIGHT_BGR_FAST: + CHECK_ERROR_KFREE(pmic_tcled_fun_chasinglightspattern + (fun_param->bank, BGR, TC_FAST), + (kfree(fun_param))); + break; + } + + kfree(fun_param); + break; + + case PMIC_SET_TCLED: + if ((tcled_ind = kmalloc(sizeof(t_tcled_ind_param), GFP_KERNEL)) + == NULL) { + return -ENOMEM; + } + + if (copy_from_user(tcled_ind, (t_tcled_ind_param *) arg, + sizeof(t_tcled_ind_param))) { + kfree(tcled_ind); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_tcled_ind_set_current(tcled_ind->channel, + tcled_ind->level, + tcled_ind->bank), + (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_ind_set_blink_pattern + (tcled_ind->channel, tcled_ind->pattern, + tcled_ind->skip, tcled_ind->bank), + (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_fun_rampup + (tcled_ind->bank, tcled_ind->channel, + tcled_ind->rampup), (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_fun_rampdown + (tcled_ind->bank, tcled_ind->channel, + tcled_ind->rampdown), (kfree(tcled_ind))); + if (tcled_ind->half_current) { + CHECK_ERROR_KFREE(pmic_tcled_enable_half_current(), + (kfree(tcled_ind))); + } else { + CHECK_ERROR_KFREE(pmic_tcled_disable_half_current(), + (kfree(tcled_ind))); + } + + kfree(tcled_ind); + break; + + case PMIC_GET_TCLED: + if ((tcled_ind = kmalloc(sizeof(t_tcled_ind_param), GFP_KERNEL)) + == NULL) { + return -ENOMEM; + } + if (copy_from_user(tcled_ind, (t_tcled_ind_param *) arg, + sizeof(t_tcled_ind_param))) { + kfree(tcled_ind); + return -EFAULT; + } + CHECK_ERROR_KFREE(pmic_tcled_ind_get_current(tcled_ind->channel, + &tcled_ind->level, + tcled_ind->bank), + (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_ind_get_blink_pattern + (tcled_ind->channel, &tcled_ind->pattern, + &tcled_ind->skip, tcled_ind->bank), + (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_get_fun_rampup + (tcled_ind->bank, tcled_ind->channel, + &tcled_ind->rampup), (kfree(tcled_ind))); + CHECK_ERROR_KFREE(pmic_tcled_get_fun_rampdown + (tcled_ind->bank, tcled_ind->channel, + &tcled_ind->rampdown), (kfree(tcled_ind))); + if (copy_to_user + ((t_tcled_ind_param *) arg, tcled_ind, + sizeof(t_tcled_ind_param))) { + return -EFAULT; + } + kfree(tcled_ind); + + break; + + default: + return -EINVAL; + } + return 0; +} + +/*! + * This function initialize Light registers of mc13783 with 0. + * + * @return This function returns 0 if successful. + */ +int pmic_light_init_reg(void) +{ + CHECK_ERROR(pmic_write_reg(LREG_0, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(LREG_1, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(LREG_2, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(LREG_3, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(LREG_4, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(LREG_5, 0, PMIC_ALL_BITS)); + return 0; +} + +/*! + * This function implements the open method on a mc13783 light device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_light_open(struct inode *inode, struct file *file) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + return 0; +} + +/*! + * This function implements the release method on a mc13783 light device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_light_release(struct inode *inode, struct file *file) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + return 0; +} + +static struct file_operations pmic_light_fops = { + .owner = THIS_MODULE, + .ioctl = pmic_light_ioctl, + .open = pmic_light_open, + .release = pmic_light_release, +}; + +static int pmic_light_remove(struct platform_device *pdev) +{ + device_destroy(pmic_light_class, MKDEV(pmic_light_major, 0)); + class_destroy(pmic_light_class); + unregister_chrdev(pmic_light_major, "pmic_light"); + return 0; +} + +static int pmic_light_probe(struct platform_device *pdev) +{ + int ret = 0; + struct device *temp_class; + + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) { + return -ERESTARTSYS; + } + } + pmic_light_major = register_chrdev(0, "pmic_light", &pmic_light_fops); + + if (pmic_light_major < 0) { + printk(KERN_ERR "Unable to get a major for pmic_light\n"); + return pmic_light_major; + } + init_waitqueue_head(&suspendq); + + pmic_light_class = class_create(THIS_MODULE, "pmic_light"); + if (IS_ERR(pmic_light_class)) { + printk(KERN_ERR "Error creating pmic_light class.\n"); + ret = PTR_ERR(pmic_light_class); + goto err_out1; + } + + temp_class = device_create(pmic_light_class, NULL, + MKDEV(pmic_light_major, 0), NULL, + "pmic_light"); + if (IS_ERR(temp_class)) { + printk(KERN_ERR "Error creating pmic_light class device.\n"); + ret = PTR_ERR(temp_class); + goto err_out2; + } + + ret = pmic_light_init_reg(); + if (ret != PMIC_SUCCESS) { + goto err_out3; + } + + printk(KERN_INFO "PMIC Light successfully loaded\n"); + return ret; + + err_out3: + device_destroy(pmic_light_class, MKDEV(pmic_light_major, 0)); + err_out2: + class_destroy(pmic_light_class); + err_out1: + unregister_chrdev(pmic_light_major, "pmic_light"); + return ret; +} + +static struct platform_driver pmic_light_driver_ldm = { + .driver = { + .name = "pmic_light", + }, + .suspend = pmic_light_suspend, + .resume = pmic_light_resume, + .probe = pmic_light_probe, + .remove = pmic_light_remove, +}; + +/* + * Initialization and Exit + */ + +static int __init pmic_light_init(void) +{ + pr_debug("PMIC Light driver loading...\n"); + return platform_driver_register(&pmic_light_driver_ldm); +} +static void __exit pmic_light_exit(void) +{ + platform_driver_unregister(&pmic_light_driver_ldm); + pr_debug("PMIC Light driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +subsys_initcall(pmic_light_init); +module_exit(pmic_light_exit); + +MODULE_DESCRIPTION("PMIC_LIGHT"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13892/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13892/Kconfig @@ -0,0 +1,48 @@ +# +# PMIC Modules configuration +# + +config MXC_MC13892_ADC + tristate "MC13892 ADC support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 ADC module driver. This module provides kernel API + for the ADC system of MC13892. + It controls also the touch screen interface. + If you want MC13892 ADC support, you should say Y here + +config MXC_MC13892_RTC + tristate "MC13892 Real Time Clock (RTC) support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 RTC module driver. This module provides kernel API + for RTC part of MC13892. + If you want MC13892 RTC support, you should say Y here +config MXC_MC13892_LIGHT + tristate "MC13892 Light and Backlight support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 Light module driver. This module provides kernel API + for led and backlight control part of MC13892. + If you want MC13892 Light support, you should say Y here +config MXC_MC13892_BATTERY + tristate "MC13892 Battery API support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 battery module driver. This module provides kernel API + for battery control part of MC13892. + If you want MC13892 battery support, you should say Y here +config MXC_MC13892_CONNECTIVITY + tristate "MC13892 Connectivity API support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 connectivity module driver. This module provides kernel API + for USB/RS232 connectivity control part of MC13892. + If you want MC13892 connectivity support, you should say Y here +config MXC_MC13892_POWER + tristate "MC13892 Power API support" + depends on MXC_PMIC_MC13892 + ---help--- + This is the MC13892 power and supplies module driver. This module provides kernel API + for power and regulator control part of MC13892. + If you want MC13892 power support, you should say Y here --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13892/pmic_battery.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13892/pmic_battery.c @@ -0,0 +1,634 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * Includes + */ +#include +#include + +#include +#include +#include +#include +#include + +#define BIT_CHG_VOL_LSH 0 +#define BIT_CHG_VOL_WID 3 + +#define BIT_CHG_CURR_LSH 3 +#define BIT_CHG_CURR_WID 4 + +#define BIT_CHG_PLIM_LSH 15 +#define BIT_CHG_PLIM_WID 2 + +#define BIT_CHG_DETS_LSH 6 +#define BIT_CHG_DETS_WID 1 +#define BIT_CHG_CURRS_LSH 11 +#define BIT_CHG_CURRS_WID 1 + +#define TRICKLE_CHG_EN_LSH 7 +#define LOW_POWER_BOOT_ACK_LSH 8 +#define BAT_TH_CHECK_DIS_LSH 9 +#define BATTFET_CTL_EN_LSH 10 +#define BATTFET_CTL_LSH 11 +#define REV_MOD_EN_LSH 13 +#define PLIM_DIS_LSH 17 +#define CHG_LED_EN_LSH 18 +#define RESTART_CHG_STAT_LSH 20 +#define AUTO_CHG_DIS_LSH 21 +#define CYCLING_DIS_LSH 22 +#define VI_PROGRAM_EN_LSH 23 + +#define TRICKLE_CHG_EN_WID 1 +#define LOW_POWER_BOOT_ACK_WID 1 +#define BAT_TH_CHECK_DIS_WID 1 +#define BATTFET_CTL_EN_WID 1 +#define BATTFET_CTL_WID 1 +#define REV_MOD_EN_WID 1 +#define PLIM_DIS_WID 1 +#define CHG_LED_EN_WID 1 +#define RESTART_CHG_STAT_WID 1 +#define AUTO_CHG_DIS_WID 1 +#define CYCLING_DIS_WID 1 +#define VI_PROGRAM_EN_WID 1 + +#define ACC_STARTCC_LSH 0 +#define ACC_STARTCC_WID 1 +#define ACC_RSTCC_LSH 1 +#define ACC_RSTCC_WID 1 +#define ACC_CCFAULT_LSH 7 +#define ACC_CCFAULT_WID 7 +#define ACC_CCOUT_LSH 8 +#define ACC_CCOUT_WID 16 +#define ACC1_ONEC_LSH 0 +#define ACC1_ONEC_WID 15 + +#define ACC_CALIBRATION 0x17 +#define ACC_START_COUNTER 0x07 +#define ACC_STOP_COUNTER 0x2 +#define ACC_CONTROL_BIT_MASK 0x1f +#define ACC_ONEC_VALUE 2621 +#define ACC_COULOMB_PER_LSB 1 +#define ACC_CALIBRATION_DURATION_MSECS 20 + +#define BAT_VOLTAGE_UNIT_UV 4692 +#define BAT_CURRENT_UNIT_UA 5870 +#define CHG_VOLTAGE_UINT_UV 23474 +#define CHG_MIN_CURRENT_UA 3500 + +#define COULOMB_TO_UAH(c) (10000 * c / 36) + +enum chg_setting { + TRICKLE_CHG_EN, + LOW_POWER_BOOT_ACK, + BAT_TH_CHECK_DIS, + BATTFET_CTL_EN, + BATTFET_CTL, + REV_MOD_EN, + PLIM_DIS, + CHG_LED_EN, + RESTART_CHG_STAT, + AUTO_CHG_DIS, + CYCLING_DIS, + VI_PROGRAM_EN +}; + +static int pmic_set_chg_current(unsigned short curr) +{ + unsigned int mask; + unsigned int value; + + value = BITFVAL(BIT_CHG_CURR, curr); + mask = BITFMASK(BIT_CHG_CURR); + CHECK_ERROR(pmic_write_reg(REG_CHARGE, value, mask)); + + return 0; +} + +static int pmic_set_chg_misc(enum chg_setting type, unsigned short flag) +{ + + unsigned int reg_value = 0; + unsigned int mask = 0; + + switch (type) { + case TRICKLE_CHG_EN: + reg_value = BITFVAL(TRICKLE_CHG_EN, flag); + mask = BITFMASK(TRICKLE_CHG_EN); + break; + case LOW_POWER_BOOT_ACK: + reg_value = BITFVAL(LOW_POWER_BOOT_ACK, flag); + mask = BITFMASK(LOW_POWER_BOOT_ACK); + break; + case BAT_TH_CHECK_DIS: + reg_value = BITFVAL(BAT_TH_CHECK_DIS, flag); + mask = BITFMASK(BAT_TH_CHECK_DIS); + break; + case BATTFET_CTL_EN: + reg_value = BITFVAL(BATTFET_CTL_EN, flag); + mask = BITFMASK(BATTFET_CTL_EN); + break; + case BATTFET_CTL: + reg_value = BITFVAL(BATTFET_CTL, flag); + mask = BITFMASK(BATTFET_CTL); + break; + case REV_MOD_EN: + reg_value = BITFVAL(REV_MOD_EN, flag); + mask = BITFMASK(REV_MOD_EN); + break; + case PLIM_DIS: + reg_value = BITFVAL(PLIM_DIS, flag); + mask = BITFMASK(PLIM_DIS); + break; + case CHG_LED_EN: + reg_value = BITFVAL(CHG_LED_EN, flag); + mask = BITFMASK(CHG_LED_EN); + break; + case RESTART_CHG_STAT: + reg_value = BITFVAL(RESTART_CHG_STAT, flag); + mask = BITFMASK(RESTART_CHG_STAT); + break; + case AUTO_CHG_DIS: + reg_value = BITFVAL(AUTO_CHG_DIS, flag); + mask = BITFMASK(AUTO_CHG_DIS); + break; + case CYCLING_DIS: + reg_value = BITFVAL(CYCLING_DIS, flag); + mask = BITFMASK(CYCLING_DIS); + break; + case VI_PROGRAM_EN: + reg_value = BITFVAL(VI_PROGRAM_EN, flag); + mask = BITFMASK(VI_PROGRAM_EN); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_write_reg(REG_CHARGE, reg_value, mask)); + + return 0; +} + +static int pmic_get_batt_voltage(unsigned short *voltage) +{ + t_channel channel; + unsigned short result[8]; + + channel = BATTERY_VOLTAGE; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *voltage = result[0]; + + return 0; +} + +static int pmic_get_batt_current(unsigned short *curr) +{ + t_channel channel; + unsigned short result[8]; + + channel = BATTERY_CURRENT; + CHECK_ERROR(pmic_adc_convert(channel, result)); + *curr = result[0]; + + return 0; +} + +static int coulomb_counter_calibration; +static unsigned int coulomb_counter_start_time_msecs; + +static int pmic_start_coulomb_counter(void) +{ + /* set scaler */ + CHECK_ERROR(pmic_write_reg(REG_ACC1, + ACC_COULOMB_PER_LSB * ACC_ONEC_VALUE, BITFMASK(ACC1_ONEC))); + + CHECK_ERROR(pmic_write_reg( + REG_ACC0, ACC_START_COUNTER, ACC_CONTROL_BIT_MASK)); + coulomb_counter_start_time_msecs = jiffies_to_msecs(jiffies); + pr_debug("coulomb counter start time %u\n", + coulomb_counter_start_time_msecs); + return 0; +} + +static int pmic_stop_coulomb_counter(void) +{ + CHECK_ERROR(pmic_write_reg( + REG_ACC0, ACC_STOP_COUNTER, ACC_CONTROL_BIT_MASK)); + return 0; +} + +static int pmic_calibrate_coulomb_counter(void) +{ + int ret; + unsigned int value; + + /* set scaler */ + CHECK_ERROR(pmic_write_reg(REG_ACC1, + 0x1, BITFMASK(ACC1_ONEC))); + + CHECK_ERROR(pmic_write_reg( + REG_ACC0, ACC_CALIBRATION, ACC_CONTROL_BIT_MASK)); + msleep(ACC_CALIBRATION_DURATION_MSECS); + + ret = pmic_read_reg(REG_ACC0, &value, BITFMASK(ACC_CCOUT)); + if (ret != 0) + return -1; + value = BITFEXT(value, ACC_CCOUT); + pr_debug("calibrate value = %x\n", value); + coulomb_counter_calibration = (int)((s16)((u16) value)); + pr_debug("coulomb_counter_calibration = %d\n", + coulomb_counter_calibration); + + return 0; + +} + +static int pmic_get_charger_coulomb(int *coulomb) +{ + int ret; + unsigned int value; + int calibration; + unsigned int time_diff_msec; + + ret = pmic_read_reg(REG_ACC0, &value, BITFMASK(ACC_CCOUT)); + if (ret != 0) + return -1; + value = BITFEXT(value, ACC_CCOUT); + pr_debug("counter value = %x\n", value); + *coulomb = ((s16)((u16)value)) * ACC_COULOMB_PER_LSB; + + if (abs(*coulomb) >= ACC_COULOMB_PER_LSB) { + /* calibrate */ + time_diff_msec = jiffies_to_msecs(jiffies); + time_diff_msec = + (time_diff_msec > coulomb_counter_start_time_msecs) ? + (time_diff_msec - coulomb_counter_start_time_msecs) : + (0xffffffff - coulomb_counter_start_time_msecs + + time_diff_msec); + calibration = coulomb_counter_calibration * (int)time_diff_msec + / (ACC_ONEC_VALUE * ACC_CALIBRATION_DURATION_MSECS); + *coulomb -= calibration; + } + + return 0; +} + +static int pmic_restart_charging(void) +{ + pmic_set_chg_misc(BAT_TH_CHECK_DIS, 1); + pmic_set_chg_misc(AUTO_CHG_DIS, 0); + pmic_set_chg_misc(VI_PROGRAM_EN, 1); + pmic_set_chg_current(0x8); + pmic_set_chg_misc(RESTART_CHG_STAT, 1); + return 0; +} + +struct mc13892_dev_info { + struct device *dev; + + unsigned short voltage_raw; + int voltage_uV; + unsigned short current_raw; + int current_uA; + int battery_status; + int full_counter; + int charger_online; + int charger_voltage_uV; + int accum_current_uAh; + + struct power_supply bat; + struct power_supply charger; + + struct workqueue_struct *monitor_wqueue; + struct delayed_work monitor_work; +}; + +#define mc13892_SENSER 25 +#define to_mc13892_dev_info(x) container_of((x), struct mc13892_dev_info, \ + bat); + +static enum power_supply_property mc13892_battery_props[] = { + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_CHARGE_NOW, + POWER_SUPPLY_PROP_STATUS, +}; + +static enum power_supply_property mc13892_charger_props[] = { + POWER_SUPPLY_PROP_ONLINE, +}; + +static int mc13892_charger_update_status(struct mc13892_dev_info *di) +{ + int ret; + unsigned int value; + int online; + + ret = pmic_read_reg(REG_INT_SENSE0, &value, BITFMASK(BIT_CHG_DETS)); + + if (ret == 0) { + online = BITFEXT(value, BIT_CHG_DETS); + if (online != di->charger_online) { + di->charger_online = online; + dev_info(di->charger.dev, "charger status: %s\n", + online ? "online" : "offline"); + power_supply_changed(&di->charger); + + cancel_delayed_work(&di->monitor_work); + queue_delayed_work(di->monitor_wqueue, + &di->monitor_work, HZ / 10); + if (online) { + pmic_start_coulomb_counter(); + pmic_restart_charging(); + } else + pmic_stop_coulomb_counter(); + } + } + + return ret; +} + +static int mc13892_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct mc13892_dev_info *di = + container_of((psy), struct mc13892_dev_info, charger); + + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: + val->intval = di->charger_online; + return 0; + default: + break; + } + return -EINVAL; +} + +static int mc13892_battery_read_status(struct mc13892_dev_info *di) +{ + int retval; + int coulomb; + retval = pmic_get_batt_voltage(&(di->voltage_raw)); + if (retval == 0) + di->voltage_uV = di->voltage_raw * BAT_VOLTAGE_UNIT_UV; + + retval = pmic_get_batt_current(&(di->current_raw)); + if (retval == 0) { + if (di->current_raw & 0x200) + di->current_uA = + (0x1FF - (di->current_raw & 0x1FF)) * + BAT_CURRENT_UNIT_UA * (-1); + else + di->current_uA = + (di->current_raw & 0x1FF) * BAT_CURRENT_UNIT_UA; + } + retval = pmic_get_charger_coulomb(&coulomb); + if (retval == 0) + di->accum_current_uAh = COULOMB_TO_UAH(coulomb); + + return retval; +} + +static void mc13892_battery_update_status(struct mc13892_dev_info *di) +{ + unsigned int value; + int retval; + int old_battery_status = di->battery_status; + + if (di->battery_status == POWER_SUPPLY_STATUS_UNKNOWN) + di->full_counter = 0; + + if (di->charger_online) { + retval = pmic_read_reg(REG_INT_SENSE0, + &value, BITFMASK(BIT_CHG_CURRS)); + + if (retval == 0) { + value = BITFEXT(value, BIT_CHG_CURRS); + if (value) + di->battery_status = + POWER_SUPPLY_STATUS_CHARGING; + else + di->battery_status = + POWER_SUPPLY_STATUS_NOT_CHARGING; + } + + if (di->battery_status == POWER_SUPPLY_STATUS_NOT_CHARGING) + di->full_counter++; + else + di->full_counter = 0; + } else { + di->battery_status = POWER_SUPPLY_STATUS_DISCHARGING; + di->full_counter = 0; + } + + dev_dbg(di->bat.dev, "bat status: %d\n", + di->battery_status); + + if (di->battery_status != old_battery_status) + power_supply_changed(&di->bat); +} + +static void mc13892_battery_work(struct work_struct *work) +{ + struct mc13892_dev_info *di = container_of(work, + struct mc13892_dev_info, + monitor_work.work); + const int interval = HZ * 60; + + dev_dbg(di->dev, "%s\n", __func__); + + mc13892_battery_update_status(di); + queue_delayed_work(di->monitor_wqueue, &di->monitor_work, interval); +} + +static void charger_online_event_callback(void *para) +{ + struct mc13892_dev_info *di = (struct mc13892_dev_info *) para; + pr_info("\n\n DETECTED charger plug/unplug event\n"); + mc13892_charger_update_status(di); +} + + +static int mc13892_battery_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct mc13892_dev_info *di = to_mc13892_dev_info(psy); + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + if (di->battery_status == POWER_SUPPLY_STATUS_UNKNOWN) { + mc13892_charger_update_status(di); + mc13892_battery_update_status(di); + } + val->intval = di->battery_status; + return 0; + default: + break; + } + + mc13892_battery_read_status(di); + + switch (psp) { + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + val->intval = di->voltage_uV; + break; + case POWER_SUPPLY_PROP_CURRENT_NOW: + val->intval = di->current_uA; + break; + case POWER_SUPPLY_PROP_CHARGE_NOW: + val->intval = di->accum_current_uAh; + break; + case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: + val->intval = 3800000; + break; + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: + val->intval = 3300000; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int pmic_battery_remove(struct platform_device *pdev) +{ + pmic_event_callback_t bat_event_callback; + struct mc13892_dev_info *di = platform_get_drvdata(pdev); + + bat_event_callback.func = charger_online_event_callback; + bat_event_callback.param = (void *) di; + pmic_event_unsubscribe(EVENT_CHGDETI, bat_event_callback); + + cancel_rearming_delayed_workqueue(di->monitor_wqueue, + &di->monitor_work); + destroy_workqueue(di->monitor_wqueue); + power_supply_unregister(&di->bat); + power_supply_unregister(&di->charger); + + kfree(di); + + return 0; +} + +static int pmic_battery_probe(struct platform_device *pdev) +{ + int retval = 0; + struct mc13892_dev_info *di; + pmic_event_callback_t bat_event_callback; + pmic_version_t pmic_version; + + /* Only apply battery driver for MC13892 V2.0 due to ENGR108085 */ + pmic_version = pmic_get_version(); + if (pmic_version.revision < 20) { + pr_debug("Battery driver is only applied for MC13892 V2.0\n"); + return -1; + } + if (machine_is_mx51_babbage()) { + pr_debug("mc13892 charger is not used for this platform\n"); + return -1; + } + + di = kzalloc(sizeof(*di), GFP_KERNEL); + if (!di) { + retval = -ENOMEM; + goto di_alloc_failed; + } + + platform_set_drvdata(pdev, di); + + di->dev = &pdev->dev; + di->bat.name = "mc13892_bat"; + di->bat.type = POWER_SUPPLY_TYPE_BATTERY; + di->bat.properties = mc13892_battery_props; + di->bat.num_properties = ARRAY_SIZE(mc13892_battery_props); + di->bat.get_property = mc13892_battery_get_property; + di->bat.use_for_apm = 1; + + di->battery_status = POWER_SUPPLY_STATUS_UNKNOWN; + + retval = power_supply_register(&pdev->dev, &di->bat); + if (retval) { + dev_err(di->dev, "failed to register battery\n"); + goto batt_failed; + } + di->charger.name = "mc13892_charger"; + di->charger.type = POWER_SUPPLY_TYPE_MAINS; + di->charger.properties = mc13892_charger_props; + di->charger.num_properties = ARRAY_SIZE(mc13892_charger_props); + di->charger.get_property = mc13892_charger_get_property; + retval = power_supply_register(&pdev->dev, &di->charger); + if (retval) { + dev_err(di->dev, "failed to register charger\n"); + goto charger_failed; + } + INIT_DELAYED_WORK(&di->monitor_work, mc13892_battery_work); + di->monitor_wqueue = create_singlethread_workqueue(dev_name(&pdev->dev)); + if (!di->monitor_wqueue) { + retval = -ESRCH; + goto workqueue_failed; + } + queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ * 10); + + bat_event_callback.func = charger_online_event_callback; + bat_event_callback.param = (void *) di; + pmic_event_subscribe(EVENT_CHGDETI, bat_event_callback); + + pmic_stop_coulomb_counter(); + pmic_calibrate_coulomb_counter(); + goto success; + +workqueue_failed: + power_supply_unregister(&di->charger); +charger_failed: + power_supply_unregister(&di->bat); +batt_failed: + kfree(di); +di_alloc_failed: +success: + dev_dbg(di->dev, "%s battery probed!\n", __func__); + return retval; + + + return 0; +} + +static struct platform_driver pmic_battery_driver_ldm = { + .driver = { + .name = "pmic_battery", + .bus = &platform_bus_type, + }, + .probe = pmic_battery_probe, + .remove = pmic_battery_remove, +}; + +static int __init pmic_battery_init(void) +{ + pr_debug("PMIC Battery driver loading...\n"); + return platform_driver_register(&pmic_battery_driver_ldm); +} + +static void __exit pmic_battery_exit(void) +{ + platform_driver_unregister(&pmic_battery_driver_ldm); + pr_debug("PMIC Battery driver successfully unloaded\n"); +} + +module_init(pmic_battery_init); +module_exit(pmic_battery_exit); + +MODULE_DESCRIPTION("pmic_battery driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13892/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13892/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the mc13783 pmic drivers. +# + +obj-$(CONFIG_MXC_MC13892_ADC) += pmic_adc.o +#obj-$(CONFIG_MXC_MC13892_RTC) += pmic_rtc.o +obj-$(CONFIG_MXC_MC13892_LIGHT) += pmic_light.o +obj-$(CONFIG_MXC_MC13892_BATTERY) += pmic_battery.o +#obj-$(CONFIG_MXC_MC13892_CONNECTIVITY) += pmic_convity.o +#obj-$(CONFIG_MXC_MC13892_POWER) += pmic_power.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13892/pmic_adc.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13892/pmic_adc.c @@ -0,0 +1,984 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "../core/pmic.h" + +#define DEF_ADC_0 0x008000 +#define DEF_ADC_3 0x0001c0 + +#define ADC_NB_AVAILABLE 2 + +#define MAX_CHANNEL 7 + +#define MC13892_ADC0_TS_M_LSH 14 +#define MC13892_ADC0_TS_M_WID 3 + +/* + * Maximun allowed variation in the three X/Y co-ordinates acquired from + * touch-screen + */ +#define DELTA_Y_MAX 50 +#define DELTA_X_MAX 50 + +/* + * ADC 0 + */ +#define ADC_WAIT_TSI_0 0x001400 + +#define ADC_INC 0x030000 +#define ADC_BIS 0x800000 +#define ADC_CHRGRAW_D5 0x008000 + +/* + * ADC 1 + */ + +#define ADC_EN 0x000001 +#define ADC_SGL_CH 0x000002 +#define ADC_ADSEL 0x000008 +#define ADC_CH_0_POS 5 +#define ADC_CH_0_MASK 0x0000E0 +#define ADC_CH_1_POS 8 +#define ADC_CH_1_MASK 0x000700 +#define ADC_DELAY_POS 11 +#define ADC_DELAY_MASK 0x07F800 +#define ADC_ATO 0x080000 +#define ASC_ADC 0x100000 +#define ADC_WAIT_TSI_1 0x200001 +#define ADC_NO_ADTRIG 0x200000 + +/* + * ADC 2 - 4 + */ +#define ADD1_RESULT_MASK 0x00000FFC +#define ADD2_RESULT_MASK 0x00FFC000 +#define ADC_TS_MASK 0x00FFCFFC + +#define ADC_WCOMP 0x040000 +#define ADC_WCOMP_H_POS 0 +#define ADC_WCOMP_L_POS 9 +#define ADC_WCOMP_H_MASK 0x00003F +#define ADC_WCOMP_L_MASK 0x007E00 + +#define ADC_MODE_MASK 0x00003F + +#define ADC_INT_BISDONEI 0x02 +#define ADC_TSMODE_MASK 0x007000 + +typedef enum adc_state { + ADC_FREE, + ADC_USED, + ADC_MONITORING, +} t_adc_state; + +typedef enum reading_mode { + /*! + * Enables lithium cell reading + */ + M_LITHIUM_CELL = 0x000001, + /*! + * Enables charge current reading + */ + M_CHARGE_CURRENT = 0x000002, + /*! + * Enables battery current reading + */ + M_BATTERY_CURRENT = 0x000004, +} t_reading_mode; + +typedef struct { + /*! + * Delay before first conversion + */ + unsigned int delay; + /*! + * sets the ATX bit for delay on all conversion + */ + bool conv_delay; + /*! + * Sets the single channel mode + */ + bool single_channel; + /*! + * Channel selection 1 + */ + t_channel channel_0; + /*! + * Channel selection 2 + */ + t_channel channel_1; + /*! + * Used to configure ADC mode with t_reading_mode + */ + t_reading_mode read_mode; + /*! + * Sets the Touch screen mode + */ + bool read_ts; + /*! + * Wait TSI event before touch screen reading + */ + bool wait_tsi; + /*! + * Sets CHRGRAW scaling to divide by 5 + * Only supported on 2.0 and higher + */ + bool chrgraw_devide_5; + /*! + * Return ADC values + */ + unsigned int value[8]; + /*! + * Return touch screen values + */ + t_touch_screen ts_value; +} t_adc_param; + +static int pmic_adc_filter(t_touch_screen *ts_curr); +int mc13892_adc_request(bool read_ts); +int mc13892_adc_release(int adc_index); +t_reading_mode mc13892_set_read_mode(t_channel channel); +PMIC_STATUS mc13892_adc_read_ts(t_touch_screen *touch_sample, int wait_tsi); + +/* internal function */ +static void callback_tsi(void *); +static void callback_adcdone(void *); +static void callback_adcbisdone(void *); + +static int swait; + +static int suspend_flag; + +static wait_queue_head_t suspendq; + +/* EXPORTED FUNCTIONS */ +EXPORT_SYMBOL(pmic_adc_init); +EXPORT_SYMBOL(pmic_adc_deinit); +EXPORT_SYMBOL(pmic_adc_convert); +EXPORT_SYMBOL(pmic_adc_convert_8x); +EXPORT_SYMBOL(pmic_adc_set_touch_mode); +EXPORT_SYMBOL(pmic_adc_get_touch_mode); +EXPORT_SYMBOL(pmic_adc_get_touch_sample); + +static DECLARE_COMPLETION(adcdone_it); +static DECLARE_COMPLETION(adcbisdone_it); +static DECLARE_COMPLETION(adc_tsi); +static pmic_event_callback_t tsi_event; +static pmic_event_callback_t event_adc; +static pmic_event_callback_t event_adc_bis; +static bool data_ready_adc_1; +static bool data_ready_adc_2; +static bool adc_ts; +static bool wait_ts; +static bool monitor_en; +static bool monitor_adc; +static DECLARE_MUTEX(convert_mutex); + +static DECLARE_WAIT_QUEUE_HEAD(queue_adc_busy); +static t_adc_state adc_dev[2]; + +static unsigned channel_num[] = { + 0, + 1, + 3, + 4, + 2, + 0, + 1, + 3, + 4, + -1, + 5, + 6, + 7, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1, + -1 +}; + +static bool pmic_adc_ready; + +int is_pmic_adc_ready() +{ + return pmic_adc_ready; +} +EXPORT_SYMBOL(is_pmic_adc_ready); + + +static int pmic_adc_suspend(struct platform_device *pdev, pm_message_t state) +{ + suspend_flag = 1; + CHECK_ERROR(pmic_write_reg(REG_ADC0, DEF_ADC_0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC1, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC2, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC3, DEF_ADC_3, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC4, 0, PMIC_ALL_BITS)); + + return 0; +}; + +static int pmic_adc_resume(struct platform_device *pdev) +{ + /* nothing for mc13892 adc */ + unsigned int adc_0_reg, adc_1_reg, reg_mask; + suspend_flag = 0; + + /* let interrupt of TSI again */ + adc_0_reg = ADC_WAIT_TSI_0; + reg_mask = ADC_WAIT_TSI_0; + CHECK_ERROR(pmic_write_reg(REG_ADC0, adc_0_reg, reg_mask)); + adc_1_reg = ADC_WAIT_TSI_1 | (ADC_BIS * adc_ts); + CHECK_ERROR(pmic_write_reg(REG_ADC1, adc_1_reg, PMIC_ALL_BITS)); + + while (swait > 0) { + swait--; + wake_up_interruptible(&suspendq); + } + + return 0; +}; + +static void callback_tsi(void *unused) +{ + pr_debug("*** TSI IT mc13892 PMIC_ADC_GET_TOUCH_SAMPLE ***\n"); + if (wait_ts) { + complete(&adc_tsi); + pmic_event_mask(EVENT_TSI); + } +} + +static void callback_adcdone(void *unused) +{ + if (data_ready_adc_1) + complete(&adcdone_it); +} + +static void callback_adcbisdone(void *unused) +{ + pr_debug("* adcdone bis it callback *\n"); + if (data_ready_adc_2) + complete(&adcbisdone_it); +} + +static int pmic_adc_filter(t_touch_screen *ts_curr) +{ + unsigned int ydiff, xdiff; + unsigned int sample_sumx, sample_sumy; + + if (ts_curr->contact_resistance == 0) { + ts_curr->x_position = 0; + ts_curr->y_position = 0; + return 0; + } + + ydiff = abs(ts_curr->y_position1 - ts_curr->y_position2); + if (ydiff > DELTA_Y_MAX) { + pr_debug("pmic_adc_filter: Ret pos y\n"); + return -1; + } + + xdiff = abs(ts_curr->x_position1 - ts_curr->x_position2); + if (xdiff > DELTA_X_MAX) { + pr_debug("mc13892_adc_filter: Ret pos x\n"); + return -1; + } + + sample_sumx = ts_curr->x_position1 + ts_curr->x_position2; + sample_sumy = ts_curr->y_position1 + ts_curr->y_position2; + + ts_curr->y_position = sample_sumy / 2; + ts_curr->x_position = sample_sumx / 2; + + return 0; +} + +int pmic_adc_init(void) +{ + unsigned int reg_value = 0, i = 0; + + if (suspend_flag == 1) + return -EBUSY; + + for (i = 0; i < ADC_NB_AVAILABLE; i++) + adc_dev[i] = ADC_FREE; + + CHECK_ERROR(pmic_write_reg(REG_ADC0, DEF_ADC_0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC1, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC2, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC3, DEF_ADC_3, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_ADC4, 0, PMIC_ALL_BITS)); + reg_value = 0x001000; + + data_ready_adc_1 = false; + data_ready_adc_2 = false; + adc_ts = false; + wait_ts = false; + monitor_en = false; + monitor_adc = false; + + /* sub to ADCDone IT */ + event_adc.param = NULL; + event_adc.func = callback_adcdone; + CHECK_ERROR(pmic_event_subscribe(EVENT_ADCDONEI, event_adc)); + + /* sub to ADCDoneBis IT */ + event_adc_bis.param = NULL; + event_adc_bis.func = callback_adcbisdone; + CHECK_ERROR(pmic_event_subscribe(EVENT_ADCBISDONEI, event_adc_bis)); + + /* sub to Touch Screen IT */ + tsi_event.param = NULL; + tsi_event.func = callback_tsi; + CHECK_ERROR(pmic_event_subscribe(EVENT_TSI, tsi_event)); + + return PMIC_SUCCESS; +} + +PMIC_STATUS pmic_adc_deinit(void) +{ + CHECK_ERROR(pmic_event_unsubscribe(EVENT_ADCDONEI, event_adc)); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_ADCBISDONEI, event_adc_bis)); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_TSI, tsi_event)); + + return PMIC_SUCCESS; +} + +int mc13892_adc_init_param(t_adc_param * adc_param) +{ + int i = 0; + + if (suspend_flag == 1) + return -EBUSY; + + adc_param->delay = 0; + adc_param->conv_delay = false; + adc_param->single_channel = false; + adc_param->channel_0 = BATTERY_VOLTAGE; + adc_param->channel_1 = BATTERY_VOLTAGE; + adc_param->read_mode = 0; + adc_param->wait_tsi = 0; + adc_param->chrgraw_devide_5 = true; + adc_param->read_ts = false; + adc_param->ts_value.x_position = 0; + adc_param->ts_value.y_position = 0; + adc_param->ts_value.contact_resistance = 0; + for (i = 0; i <= MAX_CHANNEL; i++) + adc_param->value[i] = 0; + + return 0; +} + +PMIC_STATUS mc13892_adc_convert(t_adc_param * adc_param) +{ + bool use_bis = false; + unsigned int adc_0_reg = 0, adc_1_reg = 0, reg_1 = 0, result_reg = + 0, i = 0; + unsigned int result = 0, temp = 0; + pmic_version_t mc13892_ver; + pr_debug("mc13892 ADC - mc13892_adc_convert ....\n"); + if (suspend_flag == 1) + return -EBUSY; + + if (adc_param->wait_tsi) { + /* configure adc to wait tsi interrupt */ + INIT_COMPLETION(adc_tsi); + + /*for ts don't use bis */ + /*put ts in interrupt mode */ + /* still kep reference? */ + adc_0_reg = 0x001400 | (ADC_BIS * 0); + pmic_event_unmask(EVENT_TSI); + CHECK_ERROR(pmic_write_reg(REG_ADC0, adc_0_reg, PMIC_ALL_BITS)); + /*for ts don't use bis */ + adc_1_reg = 0x200001 | (ADC_BIS * 0); + CHECK_ERROR(pmic_write_reg(REG_ADC1, adc_1_reg, PMIC_ALL_BITS)); + pr_debug("wait tsi ....\n"); + wait_ts = true; + wait_for_completion_interruptible(&adc_tsi); + wait_ts = false; + } + down(&convert_mutex); + use_bis = mc13892_adc_request(adc_param->read_ts); + if (use_bis < 0) { + pr_debug("process has received a signal and got interrupted\n"); + return -EINTR; + } + + /* CONFIGURE ADC REG 0 */ + adc_0_reg = 0; + adc_1_reg = 0; + if (adc_param->read_ts == false) { + adc_0_reg = adc_param->read_mode & 0x00003F; + /* add auto inc */ + adc_0_reg |= ADC_INC; + if (use_bis) { + /* add adc bis */ + adc_0_reg |= ADC_BIS; + } + mc13892_ver = pmic_get_version(); + if (mc13892_ver.revision >= 20) + if (adc_param->chrgraw_devide_5) + adc_0_reg |= ADC_CHRGRAW_D5; + + if (adc_param->single_channel) + adc_1_reg |= ADC_SGL_CH; + + if (adc_param->conv_delay) + adc_1_reg |= ADC_ATO; + + if (adc_param->single_channel) + adc_1_reg |= ADC_SGL_CH; + + adc_1_reg |= (adc_param->channel_0 << ADC_CH_0_POS) & + ADC_CH_0_MASK; + adc_1_reg |= (adc_param->channel_1 << ADC_CH_1_POS) & + ADC_CH_1_MASK; + } else { + adc_0_reg = 0x002400 | (ADC_BIS * use_bis) | ADC_INC; + } + pr_debug("Write Reg %i = %x\n", REG_ADC0, adc_0_reg); + /*Change has been made here */ + CHECK_ERROR(pmic_write_reg(REG_ADC0, adc_0_reg, + ADC_INC | ADC_BIS | ADC_CHRGRAW_D5 | + 0xfff00ff)); + /* CONFIGURE ADC REG 1 */ + if (adc_param->read_ts == false) { + adc_1_reg |= ADC_NO_ADTRIG; + adc_1_reg |= ADC_EN; + adc_1_reg |= (adc_param->delay << ADC_DELAY_POS) & + ADC_DELAY_MASK; + if (use_bis) + adc_1_reg |= ADC_BIS; + } else { + /* configure and start convert to read x and y position */ + /* configure to read 2 value in channel selection 1 & 2 */ + adc_1_reg = 0x100409 | (ADC_BIS * use_bis) | ADC_NO_ADTRIG; + /* set ATOx = 5, it could be better for ts ADC */ + adc_1_reg |= 0x002800; + } + reg_1 = adc_1_reg; + if (use_bis == 0) { + data_ready_adc_1 = false; + adc_1_reg |= ASC_ADC; + data_ready_adc_1 = true; + pr_debug("Write Reg %i = %x\n", REG_ADC1, adc_1_reg); + INIT_COMPLETION(adcdone_it); + CHECK_ERROR(pmic_write_reg(REG_ADC1, adc_1_reg, + ADC_SGL_CH | ADC_ATO | ADC_ADSEL + | ADC_CH_0_MASK | ADC_CH_1_MASK | + ADC_NO_ADTRIG | ADC_EN | + ADC_DELAY_MASK | ASC_ADC | ADC_BIS)); + pr_debug("wait adc done \n"); + wait_for_completion_interruptible(&adcdone_it); + data_ready_adc_1 = false; + } else { + data_ready_adc_2 = false; + adc_1_reg |= ASC_ADC; + data_ready_adc_2 = true; + INIT_COMPLETION(adcbisdone_it); + CHECK_ERROR(pmic_write_reg(REG_ADC1, adc_1_reg, 0xFFFFFF)); + temp = 0x800000; + CHECK_ERROR(pmic_write_reg(REG_ADC3, temp, 0xFFFFFF)); + pr_debug("wait adc done bis\n"); + wait_for_completion_interruptible(&adcbisdone_it); + data_ready_adc_2 = false; + } + /* read result and store in adc_param */ + result = 0; + if (use_bis == 0) + result_reg = REG_ADC2; + else + result_reg = REG_ADC4; + + CHECK_ERROR(pmic_write_reg(REG_ADC1, 4 << ADC_CH_1_POS, + ADC_CH_0_MASK | ADC_CH_1_MASK)); + + for (i = 0; i <= 3; i++) { + CHECK_ERROR(pmic_read_reg(result_reg, &result, PMIC_ALL_BITS)); + adc_param->value[i] = ((result & ADD1_RESULT_MASK) >> 2); + adc_param->value[i + 4] = ((result & ADD2_RESULT_MASK) >> 14); + pr_debug("value[%d] = %d, value[%d] = %d\n", + i, adc_param->value[i], + i + 4, adc_param->value[i + 4]); + } + if (adc_param->read_ts) { + adc_param->ts_value.x_position = adc_param->value[0]; + adc_param->ts_value.x_position1 = adc_param->value[0]; + adc_param->ts_value.x_position2 = adc_param->value[1]; + adc_param->ts_value.y_position = adc_param->value[3]; + adc_param->ts_value.y_position1 = adc_param->value[3]; + adc_param->ts_value.y_position2 = adc_param->value[4]; + adc_param->ts_value.contact_resistance = adc_param->value[6]; + CHECK_ERROR(pmic_write_reg(REG_ADC0, 0x0, + ADC_TSMODE_MASK)); + } + + /*if (adc_param->read_ts) { + adc_param->ts_value.x_position = adc_param->value[2]; + adc_param->ts_value.y_position = adc_param->value[5]; + adc_param->ts_value.contact_resistance = adc_param->value[6]; + } */ + mc13892_adc_release(use_bis); + up(&convert_mutex); + + return PMIC_SUCCESS; +} + +t_reading_mode mc13892_set_read_mode(t_channel channel) +{ + t_reading_mode read_mode = 0; + + switch (channel) { + case CHARGE_CURRENT: + read_mode = M_CHARGE_CURRENT; + break; + case BATTERY_CURRENT: + read_mode = M_BATTERY_CURRENT; + break; + default: + read_mode = 0; + } + + return read_mode; +} + +PMIC_STATUS pmic_adc_convert(t_channel channel, unsigned short *result) +{ + t_adc_param adc_param; + PMIC_STATUS ret; + + if (suspend_flag == 1) + return -EBUSY; + + channel = channel_num[channel]; + if (channel == -1) { + pr_debug("Wrong channel ID\n"); + return PMIC_PARAMETER_ERROR; + } + mc13892_adc_init_param(&adc_param); + pr_debug("pmic_adc_convert\n"); + adc_param.read_ts = false; + adc_param.single_channel = true; + adc_param.read_mode = mc13892_set_read_mode(channel); + + /* Find the group */ + if (channel <= 7) + adc_param.channel_0 = channel; + else + return PMIC_PARAMETER_ERROR; + + ret = mc13892_adc_convert(&adc_param); + *result = adc_param.value[0]; + return ret; +} + +PMIC_STATUS pmic_adc_convert_8x(t_channel channel, unsigned short *result) +{ + t_adc_param adc_param; + int i; + PMIC_STATUS ret; + if (suspend_flag == 1) + return -EBUSY; + + channel = channel_num[channel]; + + if (channel == -1) { + pr_debug("Wrong channel ID\n"); + return PMIC_PARAMETER_ERROR; + } + mc13892_adc_init_param(&adc_param); + pr_debug("pmic_adc_convert_8x\n"); + adc_param.read_ts = false; + adc_param.single_channel = true; + adc_param.read_mode = mc13892_set_read_mode(channel); + + if (channel <= 7) { + adc_param.channel_0 = channel; + adc_param.channel_1 = channel; + } else + return PMIC_PARAMETER_ERROR; + + ret = mc13892_adc_convert(&adc_param); + for (i = 0; i <= 7; i++) + result[i] = adc_param.value[i]; + + return ret; +} + +PMIC_STATUS pmic_adc_set_touch_mode(t_touch_mode touch_mode) +{ + if (suspend_flag == 1) + return -EBUSY; + + CHECK_ERROR(pmic_write_reg(REG_ADC0, + BITFVAL(MC13892_ADC0_TS_M, touch_mode), + BITFMASK(MC13892_ADC0_TS_M))); + return PMIC_SUCCESS; +} + +PMIC_STATUS pmic_adc_get_touch_mode(t_touch_mode * touch_mode) +{ + unsigned int value; + if (suspend_flag == 1) + return -EBUSY; + + CHECK_ERROR(pmic_read_reg(REG_ADC0, &value, PMIC_ALL_BITS)); + + *touch_mode = BITFEXT(value, MC13892_ADC0_TS_M); + + return PMIC_SUCCESS; +} + +PMIC_STATUS pmic_adc_get_touch_sample(t_touch_screen *touch_sample, int wait) +{ + if (mc13892_adc_read_ts(touch_sample, wait) != 0) + return PMIC_ERROR; + if (0 == pmic_adc_filter(touch_sample)) + return PMIC_SUCCESS; + else + return PMIC_ERROR; +} + +PMIC_STATUS mc13892_adc_read_ts(t_touch_screen *ts_value, int wait_tsi) +{ + t_adc_param param; + pr_debug("mc13892_adc : mc13892_adc_read_ts\n"); + if (suspend_flag == 1) + return -EBUSY; + + if (wait_ts) { + pr_debug("mc13892_adc : error TS busy \n"); + return PMIC_ERROR; + } + mc13892_adc_init_param(¶m); + param.wait_tsi = wait_tsi; + param.read_ts = true; + if (mc13892_adc_convert(¶m) != 0) + return PMIC_ERROR; + /* check if x-y is ok */ + if (param.ts_value.contact_resistance < 1000) { + ts_value->x_position = param.ts_value.x_position; + ts_value->x_position1 = param.ts_value.x_position1; + ts_value->x_position2 = param.ts_value.x_position2; + + ts_value->y_position = param.ts_value.y_position; + ts_value->y_position1 = param.ts_value.y_position1; + ts_value->y_position2 = param.ts_value.y_position2; + + ts_value->contact_resistance = + param.ts_value.contact_resistance + 1; + + } else { + ts_value->x_position = 0; + ts_value->y_position = 0; + ts_value->contact_resistance = 0; + + } + return PMIC_SUCCESS; +} + +int mc13892_adc_request(bool read_ts) +{ + int adc_index = -1; + if (read_ts != 0) { + /*for ts we use bis=0 */ + if (adc_dev[0] == ADC_USED) + return -1; + /*no wait here */ + adc_dev[0] = ADC_USED; + adc_index = 0; + } else { + /*for other adc use bis = 1 */ + if (adc_dev[1] == ADC_USED) { + return -1; + /*no wait here */ + } + adc_dev[1] = ADC_USED; + adc_index = 1; + } + pr_debug("mc13892_adc : request ADC %d\n", adc_index); + return adc_index; +} + +int mc13892_adc_release(int adc_index) +{ + while (suspend_flag == 1) { + swait++; + /* Block if the device is suspended */ + if (wait_event_interruptible(suspendq, (suspend_flag == 0))) + return -ERESTARTSYS; + } + + pr_debug("mc13892_adc : release ADC %d\n", adc_index); + if ((adc_dev[adc_index] == ADC_MONITORING) || + (adc_dev[adc_index] == ADC_USED)) { + adc_dev[adc_index] = ADC_FREE; + wake_up(&queue_adc_busy); + return 0; + } + return -1; +} + +#ifdef DEBUG +static t_adc_param adc_param_db; + +static ssize_t adc_info(struct device *dev, struct device_attribute *attr, + char *buf) +{ + int *value = adc_param_db.value; + + pr_debug("adc_info\n"); + + pr_debug("ch0\t\t%d\n", adc_param_db.channel_0); + pr_debug("ch1\t\t%d\n", adc_param_db.channel_1); + pr_debug("d5\t\t%d\n", adc_param_db.chrgraw_devide_5); + pr_debug("conv delay\t%d\n", adc_param_db.conv_delay); + pr_debug("delay\t\t%d\n", adc_param_db.delay); + pr_debug("read mode\t%d\n", adc_param_db.read_mode); + pr_debug("read ts\t\t%d\n", adc_param_db.read_ts); + pr_debug("single ch\t%d\n", adc_param_db.single_channel); + pr_debug("wait ts int\t%d\n", adc_param_db.wait_tsi); + pr_debug("value0-3:\t%d\t%d\t%d\t%d\n", value[0], value[1], + value[2], value[3]); + pr_debug("value4-7:\t%d\t%d\t%d\t%d\n", value[4], value[5], + value[6], value[7]); + + return 0; +} + +enum { + ADC_SET_CH0 = 0, + ADC_SET_CH1, + ADC_SET_DV5, + ADC_SET_CON_DELAY, + ADC_SET_DELAY, + ADC_SET_RM, + ADC_SET_RT, + ADC_SET_S_CH, + ADC_SET_WAIT_TS, + ADC_INIT_P, + ADC_START, + ADC_TS, + ADC_TS_READ, + ADC_TS_CAL, + ADC_CMD_MAX +}; + +static const char *const adc_cmd[ADC_CMD_MAX] = { + [ADC_SET_CH0] = "ch0", + [ADC_SET_CH1] = "ch1", + [ADC_SET_DV5] = "dv5", + [ADC_SET_CON_DELAY] = "cd", + [ADC_SET_DELAY] = "dl", + [ADC_SET_RM] = "rm", + [ADC_SET_RT] = "rt", + [ADC_SET_S_CH] = "sch", + [ADC_SET_WAIT_TS] = "wt", + [ADC_INIT_P] = "init", + [ADC_START] = "start", + [ADC_TS] = "touch", + [ADC_TS_READ] = "touchr", + [ADC_TS_CAL] = "cal" +}; + +static int cmd(unsigned int index, int value) +{ + t_touch_screen ts; + + switch (index) { + case ADC_SET_CH0: + adc_param_db.channel_0 = value; + break; + case ADC_SET_CH1: + adc_param_db.channel_1 = value; + break; + case ADC_SET_DV5: + adc_param_db.chrgraw_devide_5 = value; + break; + case ADC_SET_CON_DELAY: + adc_param_db.conv_delay = value; + break; + case ADC_SET_RM: + adc_param_db.read_mode = value; + break; + case ADC_SET_RT: + adc_param_db.read_ts = value; + break; + case ADC_SET_S_CH: + adc_param_db.single_channel = value; + break; + case ADC_SET_WAIT_TS: + adc_param_db.wait_tsi = value; + break; + case ADC_INIT_P: + mc13892_adc_init_param(&adc_param_db); + break; + case ADC_START: + mc13892_adc_convert(&adc_param_db); + break; + case ADC_TS: + pmic_adc_get_touch_sample(&ts, 1); + pr_debug("x = %d\n", ts.x_position); + pr_debug("y = %d\n", ts.y_position); + pr_debug("p = %d\n", ts.contact_resistance); + break; + case ADC_TS_READ: + pmic_adc_get_touch_sample(&ts, 0); + pr_debug("x = %d\n", ts.x_position); + pr_debug("y = %d\n", ts.y_position); + pr_debug("p = %d\n", ts.contact_resistance); + break; + case ADC_TS_CAL: + break; + default: + pr_debug("error command\n"); + break; + } + return 0; +} + +static ssize_t adc_ctl(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int state = 0; + const char *const *s; + char *p, *q; + int error; + int len, value = 0; + + pr_debug("adc_ctl\n"); + + q = NULL; + q = memchr(buf, ' ', count); + + if (q != NULL) { + len = q - buf; + q += 1; + value = simple_strtoul(q, NULL, 10); + } else { + p = memchr(buf, '\n', count); + len = p ? p - buf : count; + } + + for (s = &adc_cmd[state]; state < ADC_CMD_MAX; s++, state++) { + if (*s && !strncmp(buf, *s, len)) + break; + } + if (state < ADC_CMD_MAX && *s) + error = cmd(state, value); + else + error = -EINVAL; + + return count; +} + +#else +static ssize_t adc_info(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return 0; +} + +static ssize_t adc_ctl(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + return count; +} + +#endif + +static DEVICE_ATTR(adc, 0644, adc_info, adc_ctl); + +static int pmic_adc_module_probe(struct platform_device *pdev) +{ + int ret = 0; + + pr_debug("PMIC ADC start probe\n"); + ret = device_create_file(&(pdev->dev), &dev_attr_adc); + if (ret) { + pr_debug("Can't create device file!\n"); + return -ENODEV; + } + + init_waitqueue_head(&suspendq); + + ret = pmic_adc_init(); + if (ret != PMIC_SUCCESS) { + pr_debug("Error in pmic_adc_init.\n"); + goto rm_dev_file; + } + + pmic_adc_ready = 1; + pr_debug("PMIC ADC successfully probed\n"); + return 0; + + rm_dev_file: + device_remove_file(&(pdev->dev), &dev_attr_adc); + return ret; +} + +static int pmic_adc_module_remove(struct platform_device *pdev) +{ + pmic_adc_deinit(); + pmic_adc_ready = 0; + pr_debug("PMIC ADC successfully removed\n"); + return 0; +} + +static struct platform_driver pmic_adc_driver_ldm = { + .driver = { + .name = "pmic_adc", + }, + .suspend = pmic_adc_suspend, + .resume = pmic_adc_resume, + .probe = pmic_adc_module_probe, + .remove = pmic_adc_module_remove, +}; + +static int __init pmic_adc_module_init(void) +{ + pr_debug("PMIC ADC driver loading...\n"); + return platform_driver_register(&pmic_adc_driver_ldm); +} + +static void __exit pmic_adc_module_exit(void) +{ + platform_driver_unregister(&pmic_adc_driver_ldm); + pr_debug("PMIC ADC driver successfully unloaded\n"); +} + +module_init(pmic_adc_module_init); +module_exit(pmic_adc_module_exit); + +MODULE_DESCRIPTION("PMIC ADC device driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/mc13892/pmic_light.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/mc13892/pmic_light.c @@ -0,0 +1,685 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc13892/pmic_light.c + * @brief This is the main file of PMIC(mc13783) Light and Backlight driver. + * + * @ingroup PMIC_LIGHT + */ + +/* + * Includes + */ +#define DEBUG +#include +#include +#include +#include +#include + +#define BIT_CL_MAIN_LSH 9 +#define BIT_CL_AUX_LSH 21 +#define BIT_CL_KEY_LSH 9 +#define BIT_CL_RED_LSH 9 +#define BIT_CL_GREEN_LSH 21 +#define BIT_CL_BLUE_LSH 9 + +#define BIT_CL_MAIN_WID 3 +#define BIT_CL_AUX_WID 3 +#define BIT_CL_KEY_WID 3 +#define BIT_CL_RED_WID 3 +#define BIT_CL_GREEN_WID 3 +#define BIT_CL_BLUE_WID 3 + +#define BIT_DC_MAIN_LSH 3 +#define BIT_DC_AUX_LSH 15 +#define BIT_DC_KEY_LSH 3 +#define BIT_DC_RED_LSH 3 +#define BIT_DC_GREEN_LSH 15 +#define BIT_DC_BLUE_LSH 3 + +#define BIT_DC_MAIN_WID 6 +#define BIT_DC_AUX_WID 6 +#define BIT_DC_KEY_WID 6 +#define BIT_DC_RED_WID 6 +#define BIT_DC_GREEN_WID 6 +#define BIT_DC_BLUE_WID 6 + +#define BIT_RP_MAIN_LSH 2 +#define BIT_RP_AUX_LSH 14 +#define BIT_RP_KEY_LSH 2 +#define BIT_RP_RED_LSH 2 +#define BIT_RP_GREEN_LSH 14 +#define BIT_RP_BLUE_LSH 2 + +#define BIT_RP_MAIN_WID 1 +#define BIT_RP_AUX_WID 1 +#define BIT_RP_KEY_WID 1 +#define BIT_RP_RED_WID 1 +#define BIT_RP_GREEN_WID 1 +#define BIT_RP_BLUE_WID 1 + +#define BIT_HC_MAIN_LSH 1 +#define BIT_HC_AUX_LSH 13 +#define BIT_HC_KEY_LSH 1 + +#define BIT_HC_MAIN_WID 1 +#define BIT_HC_AUX_WID 1 +#define BIT_HC_KEY_WID 1 + +#define BIT_BP_RED_LSH 0 +#define BIT_BP_GREEN_LSH 12 +#define BIT_BP_BLUE_LSH 0 + +#define BIT_BP_RED_WID 2 +#define BIT_BP_GREEN_WID 2 +#define BIT_BP_BLUE_WID 2 + +int pmic_light_init_reg(void) +{ + CHECK_ERROR(pmic_write_reg(REG_LED_CTL0, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_LED_CTL1, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_LED_CTL2, 0, PMIC_ALL_BITS)); + CHECK_ERROR(pmic_write_reg(REG_LED_CTL3, 0, PMIC_ALL_BITS)); + + return 0; +} + +static int pmic_light_suspend(struct platform_device *dev, pm_message_t state) +{ + return 0; +}; + +static int pmic_light_resume(struct platform_device *pdev) +{ + return 0; +}; + +PMIC_STATUS mc13892_bklit_set_hi_current(enum lit_channel channel, int mode) +{ + unsigned int mask; + unsigned int value; + int reg; + + switch (channel) { + case LIT_MAIN: + value = BITFVAL(BIT_HC_MAIN, mode); + mask = BITFMASK(BIT_HC_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + value = BITFVAL(BIT_HC_AUX, mode); + mask = BITFMASK(BIT_HC_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + value = BITFVAL(BIT_HC_KEY, mode); + mask = BITFMASK(BIT_HC_KEY); + reg = REG_LED_CTL1; + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(reg, value, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_get_hi_current(enum lit_channel channel, int *mode) +{ + unsigned int mask; + int reg; + + switch (channel) { + case LIT_MAIN: + mask = BITFMASK(BIT_HC_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + mask = BITFMASK(BIT_HC_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + mask = BITFMASK(BIT_HC_KEY); + reg = REG_LED_CTL1; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, mode, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_set_current(enum lit_channel channel, + unsigned char level) +{ + unsigned int mask; + unsigned int value; + int reg; + + if (level > LIT_CURR_HI_42) + return PMIC_PARAMETER_ERROR; + else if (level >= LIT_CURR_HI_0) { + CHECK_ERROR(mc13892_bklit_set_hi_current(channel, 1)); + level -= LIT_CURR_HI_0; + } + + switch (channel) { + case LIT_MAIN: + value = BITFVAL(BIT_CL_MAIN, level); + mask = BITFMASK(BIT_CL_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + value = BITFVAL(BIT_CL_AUX, level); + mask = BITFMASK(BIT_CL_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + value = BITFVAL(BIT_CL_KEY, level); + mask = BITFMASK(BIT_CL_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + value = BITFVAL(BIT_CL_RED, level); + mask = BITFMASK(BIT_CL_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + value = BITFVAL(BIT_CL_GREEN, level); + mask = BITFMASK(BIT_CL_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + value = BITFVAL(BIT_CL_BLUE, level); + mask = BITFMASK(BIT_CL_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(reg, value, mask)); + + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_get_current(enum lit_channel channel, + unsigned char *level) +{ + unsigned int reg_value = 0; + unsigned int mask = 0; + int reg, mode; + + CHECK_ERROR(mc13892_bklit_get_hi_current(channel, &mode)); + + switch (channel) { + case LIT_MAIN: + mask = BITFMASK(BIT_CL_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + mask = BITFMASK(BIT_CL_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + mask = BITFMASK(BIT_CL_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + mask = BITFMASK(BIT_CL_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + mask = BITFMASK(BIT_CL_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + mask = BITFMASK(BIT_CL_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_value, mask)); + + switch (channel) { + case LIT_MAIN: + *level = BITFEXT(reg_value, BIT_CL_MAIN); + break; + case LIT_AUX: + *level = BITFEXT(reg_value, BIT_CL_AUX); + break; + case LIT_KEY: + *level = BITFEXT(reg_value, BIT_CL_KEY); + break; + case LIT_RED: + *level = BITFEXT(reg_value, BIT_CL_RED); + break; + case LIT_GREEN: + *level = BITFEXT(reg_value, BIT_CL_GREEN); + break; + case LIT_BLUE: + *level = BITFEXT(reg_value, BIT_CL_BLUE); + break; + default: + return PMIC_PARAMETER_ERROR; + } + + if (mode == 1) + *level += LIT_CURR_HI_0; + + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_set_dutycycle(enum lit_channel channel, + unsigned char dc) +{ + unsigned int mask; + unsigned int value; + int reg; + + switch (channel) { + case LIT_MAIN: + value = BITFVAL(BIT_DC_MAIN, dc); + mask = BITFMASK(BIT_DC_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + value = BITFVAL(BIT_DC_AUX, dc); + mask = BITFMASK(BIT_DC_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + value = BITFVAL(BIT_DC_KEY, dc); + mask = BITFMASK(BIT_DC_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + value = BITFVAL(BIT_DC_RED, dc); + mask = BITFMASK(BIT_DC_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + value = BITFVAL(BIT_DC_GREEN, dc); + mask = BITFMASK(BIT_DC_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + value = BITFVAL(BIT_DC_BLUE, dc); + mask = BITFMASK(BIT_DC_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(reg, value, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_get_dutycycle(enum lit_channel channel, + unsigned char *dc) +{ + unsigned int mask; + int reg; + unsigned int reg_value = 0; + + switch (channel) { + case LIT_MAIN: + mask = BITFMASK(BIT_DC_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + mask = BITFMASK(BIT_DC_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + mask = BITFMASK(BIT_DC_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + mask = BITFMASK(BIT_DC_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + mask = BITFMASK(BIT_DC_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + mask = BITFMASK(BIT_DC_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, ®_value, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_set_ramp(enum lit_channel channel, int flag) +{ + unsigned int mask; + unsigned int value; + int reg; + + switch (channel) { + case LIT_MAIN: + value = BITFVAL(BIT_RP_MAIN, flag); + mask = BITFMASK(BIT_RP_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + value = BITFVAL(BIT_RP_AUX, flag); + mask = BITFMASK(BIT_RP_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + value = BITFVAL(BIT_RP_KEY, flag); + mask = BITFMASK(BIT_RP_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + value = BITFVAL(BIT_RP_RED, flag); + mask = BITFMASK(BIT_RP_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + value = BITFVAL(BIT_RP_GREEN, flag); + mask = BITFMASK(BIT_RP_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + value = BITFVAL(BIT_RP_BLUE, flag); + mask = BITFMASK(BIT_RP_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(reg, value, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_get_ramp(enum lit_channel channel, int *flag) +{ + unsigned int mask; + int reg; + + switch (channel) { + case LIT_MAIN: + mask = BITFMASK(BIT_RP_MAIN); + reg = REG_LED_CTL0; + break; + case LIT_AUX: + mask = BITFMASK(BIT_RP_AUX); + reg = REG_LED_CTL0; + break; + case LIT_KEY: + mask = BITFMASK(BIT_RP_KEY); + reg = REG_LED_CTL1; + break; + case LIT_RED: + mask = BITFMASK(BIT_RP_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + mask = BITFMASK(BIT_RP_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + mask = BITFMASK(BIT_RP_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, flag, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_set_blink_p(enum lit_channel channel, int period) +{ + unsigned int mask; + unsigned int value; + int reg; + + switch (channel) { + case LIT_RED: + value = BITFVAL(BIT_BP_RED, period); + mask = BITFMASK(BIT_BP_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + value = BITFVAL(BIT_BP_GREEN, period); + mask = BITFMASK(BIT_BP_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + value = BITFVAL(BIT_BP_BLUE, period); + mask = BITFMASK(BIT_BP_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + CHECK_ERROR(pmic_write_reg(reg, value, mask)); + return PMIC_SUCCESS; +} + +PMIC_STATUS mc13892_bklit_get_blink_p(enum lit_channel channel, int *period) +{ + unsigned int mask; + int reg; + + switch (channel) { + case LIT_RED: + mask = BITFMASK(BIT_BP_RED); + reg = REG_LED_CTL2; + break; + case LIT_GREEN: + mask = BITFMASK(BIT_BP_GREEN); + reg = REG_LED_CTL2; + break; + case LIT_BLUE: + mask = BITFMASK(BIT_BP_BLUE); + reg = REG_LED_CTL3; + break; + default: + return PMIC_PARAMETER_ERROR; + } + + CHECK_ERROR(pmic_read_reg(reg, period, mask)); + return PMIC_SUCCESS; +} + +EXPORT_SYMBOL(mc13892_bklit_set_current); +EXPORT_SYMBOL(mc13892_bklit_get_current); +EXPORT_SYMBOL(mc13892_bklit_set_dutycycle); +EXPORT_SYMBOL(mc13892_bklit_get_dutycycle); +EXPORT_SYMBOL(mc13892_bklit_set_ramp); +EXPORT_SYMBOL(mc13892_bklit_get_ramp); +EXPORT_SYMBOL(mc13892_bklit_set_blink_p); +EXPORT_SYMBOL(mc13892_bklit_get_blink_p); + +static int pmic_light_remove(struct platform_device *pdev) +{ + return 0; +} + +#ifdef DEBUG +static ssize_t lit_info(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return 0; +} + +enum { + SET_CURR = 0, + SET_DC, + SET_RAMP, + SET_BP, + SET_CH, + LIT_CMD_MAX +}; + +static const char *const lit_cmd[LIT_CMD_MAX] = { + [SET_CURR] = "cur", + [SET_DC] = "dc", + [SET_RAMP] = "ra", + [SET_BP] = "bp", + [SET_CH] = "ch" +}; + +static int cmd(unsigned int index, int value) +{ + static int ch = LIT_MAIN; + int ret = 0; + + switch (index) { + case SET_CH: + ch = value; + break; + case SET_CURR: + pr_debug("set %d cur %d\n", ch, value); + ret = mc13892_bklit_set_current(ch, value); + break; + case SET_DC: + pr_debug("set %d dc %d\n", ch, value); + ret = mc13892_bklit_set_dutycycle(ch, value); + break; + case SET_RAMP: + pr_debug("set %d ramp %d\n", ch, value); + ret = mc13892_bklit_set_ramp(ch, value); + break; + case SET_BP: + pr_debug("set %d bp %d\n", ch, value); + ret = mc13892_bklit_set_blink_p(ch, value); + break; + default: + pr_debug("error command\n"); + break; + } + + if (ret == PMIC_SUCCESS) + pr_debug("command exec successfully!\n"); + + return 0; +} + +static ssize_t lit_ctl(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int state = 0; + const char *const *s; + char *p, *q; + int error; + int len, value = 0; + + pr_debug("lit_ctl\n"); + + q = NULL; + q = memchr(buf, ' ', count); + + if (q != NULL) { + len = q - buf; + q += 1; + value = simple_strtoul(q, NULL, 10); + } else { + p = memchr(buf, '\n', count); + len = p ? p - buf : count; + } + + for (s = &lit_cmd[state]; state < LIT_CMD_MAX; s++, state++) { + if (*s && !strncmp(buf, *s, len)) + break; + } + if (state < LIT_CMD_MAX && *s) + error = cmd(state, value); + else + error = -EINVAL; + + return count; +} + +#else +static ssize_t lit_info(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return 0; +} + +static ssize_t lit_ctl(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + return count; +} + +#endif + +static DEVICE_ATTR(lit, 0644, lit_info, lit_ctl); + +static int pmic_light_probe(struct platform_device *pdev) +{ + int ret = 0; + + pr_debug("PMIC ADC start probe\n"); + ret = device_create_file(&(pdev->dev), &dev_attr_lit); + if (ret) { + pr_debug("Can't create device file!\n"); + return -ENODEV; + } + + pmic_light_init_reg(); + + pr_debug("PMIC Light successfully loaded\n"); + return 0; +} + +static struct platform_driver pmic_light_driver_ldm = { + .driver = { + .name = "pmic_light", + }, + .suspend = pmic_light_suspend, + .resume = pmic_light_resume, + .probe = pmic_light_probe, + .remove = pmic_light_remove, +}; + +/* + * Initialization and Exit + */ + +static int __init pmic_light_init(void) +{ + pr_debug("PMIC Light driver loading...\n"); + return platform_driver_register(&pmic_light_driver_ldm); +} +static void __exit pmic_light_exit(void) +{ + platform_driver_unregister(&pmic_light_driver_ldm); + pr_debug("PMIC Light driver successfully unloaded\n"); +} + +/* + * Module entry points + */ + +subsys_initcall(pmic_light_init); +module_exit(pmic_light_exit); + +MODULE_DESCRIPTION("PMIC_LIGHT"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic.h @@ -0,0 +1,138 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __PMIC_H__ +#define __PMIC_H__ + + /*! + * @file pmic.h + * @brief This file contains prototypes of all the functions to be + * defined for each PMIC chip. The implementation of these may differ + * from PMIC chip to PMIC chip. + * + * @ingroup PMIC_CORE + */ + +#include + +#define MAX_ACTIVE_EVENTS 10 + +/*! + * This structure is a way for the PMIC core driver to define their own + * \b spi_device structure. This structure includes the core \b spi_device + * structure that is provided by Linux SPI Framework/driver as an + * element and may contain other elements that are required by core driver. + */ +struct mxc_pmic { + /*! + * Master side proxy for an SPI slave device(PMIC) + */ + struct spi_device *spi; +}; + +/*! + * This function is called to transfer data to PMIC on SPI. + * + * @param spi the SPI slave device(PMIC) + * @param buf the pointer to the data buffer + * @param len the length of the data to be transferred + * + * @return Returns 0 on success -1 on failure. + */ +static inline int spi_rw(struct spi_device *spi, u8 * buf, size_t len) +{ + struct spi_transfer t = { + .tx_buf = (const void *)buf, + .rx_buf = buf, + .len = len, + .cs_change = 0, + .delay_usecs = 0, + }; + struct spi_message m; + + spi_message_init(&m); + spi_message_add_tail(&t, &m); + if (spi_sync(spi, &m) != 0 || m.status != 0) + return PMIC_ERROR; + return (len - m.actual_length); +} + +/*! + * This function returns the PMIC version in system. + * + * @param ver pointer to the pmic_version_t structure + * + * @return This function returns PMIC version. + */ +void pmic_get_revision(pmic_version_t * ver); + +/*! + * This function initializes the SPI device parameters for this PMIC. + * + * @param spi the SPI slave device(PMIC) + * + * @return None + */ +int pmic_spi_setup(struct spi_device *spi); + +/*! + * This function initializes the PMIC registers. + * + * @return None + */ +int pmic_init_registers(void); + +/*! + * This function reads the interrupt status registers of PMIC + * and determine the current active events. + * + * @param active_events array pointer to be used to return active + * event numbers. + * + * @return This function returns PMIC version. + */ +unsigned int pmic_get_active_events(unsigned int *active_events); + +/*! + * This function sets a bit in mask register of pmic to disable an event IT. + * + * @param event the event to be masked + * + * @return This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE. + */ +int pmic_event_mask(type_event event); + +/*! + * This function unsets a bit in mask register of pmic to unmask an event IT. + * + * @param event the event to be unmasked + * + * @return This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE. + */ +int pmic_event_unmask(type_event event); + +#ifdef CONFIG_MXC_PMIC_FIXARB +extern PMIC_STATUS pmic_fix_arbitration(struct spi_device *spi); +#else +static inline PMIC_STATUS pmic_fix_arbitration(struct spi_device *spi) +{ + return PMIC_SUCCESS; +} +#endif + +void *pmic_alloc_data(struct device *dev); + +int pmic_start_event_thread(int irq_num); + +void pmic_stop_event_thread(void); + +#endif /* __PMIC_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic_event.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic_event.c @@ -0,0 +1,235 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic_event.c + * @brief This file manage all event of PMIC component. + * + * It contains event subscription, unsubscription and callback + * launch methods implemeted. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmic.h" + +/*! + * This structure is used to keep a list of subscribed + * callbacks for an event. + */ +typedef struct { + /*! + * Keeps a list of subscribed clients to an event. + */ + struct list_head list; + + /*! + * Callback function with parameter, called when event occurs + */ + pmic_event_callback_t callback; +} pmic_event_callback_list_t; + +/* Create a mutex to be used to prevent concurrent access to the event list */ +static DECLARE_MUTEX(event_mutex); + +/* This is a pointer to the event handler array. It defines the currently + * active set of events and user-defined callback functions. + */ +static struct list_head pmic_events[PMIC_MAX_EVENTS]; + +/*! + * This function initializes event list for PMIC event handling. + * + */ +void pmic_event_list_init(void) +{ + int i; + + for (i = 0; i < PMIC_MAX_EVENTS; i++) { + INIT_LIST_HEAD(&pmic_events[i]); + } + + sema_init(&event_mutex, 1); + return; +} + +/*! + * This function is used to subscribe on an event. + * + * @param event the event number to be subscribed + * @param callback the callback funtion to be subscribed + * + * @return This function returns 0 on SUCCESS, error on FAILURE. + */ +PMIC_STATUS pmic_event_subscribe(type_event event, + pmic_event_callback_t callback) +{ + pmic_event_callback_list_t *new = NULL; + + pr_debug("Event:%d Subscribe\n", event); + + /* Check whether the event & callback are valid? */ + if (event >= PMIC_MAX_EVENTS) { + pr_debug("Invalid Event:%d\n", event); + return -EINVAL; + } + if (NULL == callback.func) { + pr_debug("Null or Invalid Callback\n"); + return -EINVAL; + } + + /* Create a new linked list entry */ + new = kmalloc(sizeof(pmic_event_callback_list_t), GFP_KERNEL); + if (NULL == new) { + return -ENOMEM; + } + /* Initialize the list node fields */ + new->callback.func = callback.func; + new->callback.param = callback.param; + INIT_LIST_HEAD(&new->list); + + /* Obtain the lock to access the list */ + if (down_interruptible(&event_mutex)) { + kfree(new); + return PMIC_SYSTEM_ERROR_EINTR; + } + + /* Unmask the requested event */ + if (list_empty(&pmic_events[event])) { + if (pmic_event_unmask(event) != PMIC_SUCCESS) { + kfree(new); + up(&event_mutex); + return PMIC_ERROR; + } + } + + /* Add this entry to the event list */ + list_add_tail(&new->list, &pmic_events[event]); + + /* Release the lock */ + up(&event_mutex); + + return PMIC_SUCCESS; +} + +/*! + * This function is used to unsubscribe on an event. + * + * @param event the event number to be unsubscribed + * @param callback the callback funtion to be unsubscribed + * + * @return This function returns 0 on SUCCESS, error on FAILURE. + */ +PMIC_STATUS pmic_event_unsubscribe(type_event event, + pmic_event_callback_t callback) +{ + struct list_head *p; + struct list_head *n; + pmic_event_callback_list_t *temp = NULL; + int ret = PMIC_EVENT_NOT_SUBSCRIBED; + + pr_debug("Event:%d Unsubscribe\n", event); + + /* Check whether the event & callback are valid? */ + if (event >= PMIC_MAX_EVENTS) { + pr_debug("Invalid Event:%d\n", event); + return -EINVAL; + } + + if (NULL == callback.func) { + pr_debug("Null or Invalid Callback\n"); + return -EINVAL; + } + + /* Obtain the lock to access the list */ + if (down_interruptible(&event_mutex)) { + return PMIC_SYSTEM_ERROR_EINTR; + } + + /* Find the entry in the list */ + list_for_each_safe(p, n, &pmic_events[event]) { + temp = list_entry(p, pmic_event_callback_list_t, list); + if (temp->callback.func == callback.func + && temp->callback.param == callback.param) { + /* Remove the entry from the list */ + list_del(p); + kfree(temp); + ret = PMIC_SUCCESS; + break; + } + } + + /* Unmask the requested event */ + if (list_empty(&pmic_events[event])) { + if (pmic_event_mask(event) != PMIC_SUCCESS) { + ret = PMIC_UNSUBSCRIBE_ERROR; + } + } + + /* Release the lock */ + up(&event_mutex); + + return ret; +} + +/*! + * This function calls all callback of a specific event. + * + * @param event the active event number + * + * @return None + */ +void pmic_event_callback(type_event event) +{ + struct list_head *p; + pmic_event_callback_list_t *temp = NULL; + + /* Obtain the lock to access the list */ + if (down_interruptible(&event_mutex)) { + return; + } + + if (list_empty(&pmic_events[event])) { + pr_debug("PMIC Event:%d detected. No callback subscribed\n", + event); + up(&event_mutex); + return; + } + + list_for_each(p, &pmic_events[event]) { + temp = list_entry(p, pmic_event_callback_list_t, list); + temp->callback.func(temp->callback.param); + } + + /* Release the lock */ + up(&event_mutex); + + return; + +} + +EXPORT_SYMBOL(pmic_event_subscribe); +EXPORT_SYMBOL(pmic_event_unsubscribe); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/Makefile @@ -0,0 +1,21 @@ +# +# Makefile for the PMIC core drivers. +# +obj-$(CONFIG_MXC_PMIC_MC13783) += pmic_mc13783_mod.o +pmic_mc13783_mod-objs := pmic_external.o pmic_event.o pmic_common.o pmic_core_spi.o mc13783.o + +obj-$(CONFIG_MXC_PMIC_MC13892) += pmic_mc13892_mod.o +pmic_mc13892_mod-objs := pmic_external.o pmic_event.o pmic_common.o mc13892.o + +ifneq ($(CONFIG_MXC_PMIC_SPI),) +pmic_mc13892_mod-objs += pmic_core_spi.o +endif + +ifneq ($(CONFIG_MXC_PMIC_I2C),) +pmic_mc13892_mod-objs += pmic_core_i2c.o +endif + +obj-$(CONFIG_MXC_PMIC_MC34704) += pmic_mc34704_mod.o +pmic_mc34704_mod-objs := pmic_external.o pmic_event.o mc34704.o + +obj-$(CONFIG_MXC_PMIC_CHARDEV) += pmic-dev.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic_core_spi.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic_core_spi.c @@ -0,0 +1,303 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic_core_spi.c + * @brief This is the main file for the PMIC Core/Protocol driver. SPI + * should be providing the interface between the PMIC and the MCU. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "pmic.h" + +/* + * Static functions + */ +static void pmic_pdev_register(void); +static void pmic_pdev_unregister(void); + +/* + * Platform device structure for PMIC client drivers + */ +static struct platform_device adc_ldm = { + .name = "pmic_adc", + .id = 1, +}; +static struct platform_device battery_ldm = { + .name = "pmic_battery", + .id = 1, +}; +static struct platform_device power_ldm = { + .name = "pmic_power", + .id = 1, +}; +static struct platform_device rtc_ldm = { + .name = "pmic_rtc", + .id = 1, +}; +static struct platform_device light_ldm = { + .name = "pmic_light", + .id = 1, +}; +static struct platform_device rleds_ldm = { + .name = "pmic_leds", + .id = 'r', +}; +static struct platform_device gleds_ldm = { + .name = "pmic_leds", + .id = 'g', +}; +static struct platform_device bleds_ldm = { + .name = "pmic_leds", + .id = 'b', +}; + +/* + * External functions + */ +extern void pmic_event_list_init(void); +extern void pmic_event_callback(type_event event); +extern void gpio_pmic_active(void); +extern irqreturn_t pmic_irq_handler(int irq, void *dev_id); +extern pmic_version_t mxc_pmic_version; + +/*! + * This function registers platform device structures for + * PMIC client drivers. + */ +static void pmic_pdev_register(void) +{ + platform_device_register(&adc_ldm); + platform_device_register(&battery_ldm); + platform_device_register(&rtc_ldm); + platform_device_register(&power_ldm); + platform_device_register(&light_ldm); + platform_device_register(&rleds_ldm); + platform_device_register(&gleds_ldm); + platform_device_register(&bleds_ldm); +} + +/*! + * This function unregisters platform device structures for + * PMIC client drivers. + */ +static void pmic_pdev_unregister(void) +{ + platform_device_unregister(&adc_ldm); + platform_device_unregister(&battery_ldm); + platform_device_unregister(&rtc_ldm); + platform_device_unregister(&power_ldm); + platform_device_unregister(&light_ldm); +} + +/*! + * This function puts the SPI slave device in low-power mode/state. + * + * @param spi the SPI slave device + * @param message the power state to enter + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int pmic_suspend(struct spi_device *spi, pm_message_t message) +{ + return PMIC_SUCCESS; +} + +/*! + * This function brings the SPI slave device back from low-power mode/state. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int pmic_resume(struct spi_device *spi) +{ + return PMIC_SUCCESS; +} + +static struct spi_driver pmic_driver; + +/*! + * This function is called whenever the SPI slave device is detected. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devinit pmic_probe(struct spi_device *spi) +{ + int ret = 0; + struct pmic_platform_data *plat_data = spi->dev.platform_data; + + /* Initialize the PMIC parameters */ + ret = pmic_spi_setup(spi); + if (ret != PMIC_SUCCESS) { + return PMIC_ERROR; + } + + /* Initialize the PMIC event handling */ + pmic_event_list_init(); + + /* Initialize GPIO for PMIC Interrupt */ + gpio_pmic_active(); + + /* Get the PMIC Version */ + pmic_get_revision(&mxc_pmic_version); + if (mxc_pmic_version.revision < 0) { + dev_err((struct device *)spi, + "PMIC not detected!!! Access Failed\n"); + return -ENODEV; + } else { + dev_dbg((struct device *)spi, + "Detected pmic core IC version number is %d\n", + mxc_pmic_version.revision); + } + + spi_set_drvdata(spi, pmic_alloc_data(&(spi->dev))); + + /* Initialize the PMIC parameters */ + ret = pmic_init_registers(); + if (ret != PMIC_SUCCESS) { + kfree(spi_get_drvdata(spi)); + spi_set_drvdata(spi, NULL); + return PMIC_ERROR; + } + + ret = pmic_start_event_thread(spi->irq); + if (ret) { + pr_err("mc13892 pmic driver init: \ + fail to start event thread\n"); + kfree(spi_get_drvdata(spi)); + spi_set_drvdata(spi, NULL); + return PMIC_ERROR; + } + + /* Set and install PMIC IRQ handler */ + set_irq_type(spi->irq, IRQF_TRIGGER_HIGH); + ret = request_irq(spi->irq, pmic_irq_handler, 0, "PMIC_IRQ", 0); + if (ret) { + kfree(spi_get_drvdata(spi)); + spi_set_drvdata(spi, NULL); + dev_err((struct device *)spi, "gpio1: irq%d error.", spi->irq); + return ret; + } + + enable_irq_wake(spi->irq); + + if (plat_data && plat_data->init) { + ret = plat_data->init(spi_get_drvdata(spi)); + if (ret != 0) { + kfree(spi_get_drvdata(spi)); + spi_set_drvdata(spi, NULL); + return PMIC_ERROR; + } + } + + power_ldm.dev.platform_data = spi->dev.platform_data; + + pmic_pdev_register(); + + printk(KERN_INFO "Device %s probed\n", dev_name(&spi->dev)); + + return PMIC_SUCCESS; +} + +/*! + * This function is called whenever the SPI slave device is removed. + * + * @param spi the SPI slave device + * + * @return Returns 0 on SUCCESS and error on FAILURE. + */ +static int __devexit pmic_remove(struct spi_device *spi) +{ + pmic_stop_event_thread(); + free_irq(spi->irq, 0); + + pmic_pdev_unregister(); + + printk(KERN_INFO "Device %s removed\n", dev_name(&spi->dev)); + + return PMIC_SUCCESS; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct spi_driver pmic_driver = { + .driver = { + .name = "pmic_spi", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = pmic_probe, + .remove = __devexit_p(pmic_remove), + .suspend = pmic_suspend, + .resume = pmic_resume, +}; + +/* + * Initialization and Exit + */ + +/*! + * This function implements the init function of the PMIC device. + * This function is called when the module is loaded. It registers + * the PMIC Protocol driver. + * + * @return This function returns 0. + */ +static int __init pmic_init(void) +{ + return spi_register_driver(&pmic_driver); +} + +/*! + * This function implements the exit function of the PMIC device. + * This function is called when the module is unloaded. It unregisters + * the PMIC Protocol driver. + * + */ +static void __exit pmic_exit(void) +{ + pr_debug("Unregistering the PMIC Protocol Driver\n"); + spi_unregister_driver(&pmic_driver); +} + +/* + * Module entry points + */ +subsys_initcall_sync(pmic_init); +module_exit(pmic_exit); + +MODULE_DESCRIPTION("Core/Protocol driver for PMIC"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic_core_i2c.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic_core_i2c.c @@ -0,0 +1,345 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic_core_i2c.c + * @brief This is the main file for the PMIC Core/Protocol driver. i2c + * should be providing the interface between the PMIC and the MCU. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "pmic.h" + +#define MC13892_GENERATION_ID_LSH 6 +#define MC13892_IC_ID_LSH 13 + +#define MC13892_GENERATION_ID_WID 3 +#define MC13892_IC_ID_WID 6 + +#define MC13892_GEN_ID_VALUE 0x7 +#define MC13892_IC_ID_VALUE 1 + +/* + * Global variables + */ +struct i2c_client *mc13892_client; + +extern pmic_version_t mxc_pmic_version; +extern irqreturn_t pmic_irq_handler(int irq, void *dev_id); +/* + * Platform device structure for PMIC client drivers + */ +static struct platform_device adc_ldm = { + .name = "pmic_adc", + .id = 1, +}; +static struct platform_device battery_ldm = { + .name = "pmic_battery", + .id = 1, +}; +static struct platform_device power_ldm = { + .name = "pmic_power", + .id = 1, +}; +static struct platform_device rtc_ldm = { + .name = "pmic_rtc", + .id = 1, +}; +static struct platform_device light_ldm = { + .name = "pmic_light", + .id = 1, +}; +static struct platform_device rleds_ldm = { + .name = "pmic_leds", + .id = 'r', +}; +static struct platform_device gleds_ldm = { + .name = "pmic_leds", + .id = 'g', +}; +static struct platform_device bleds_ldm = { + .name = "pmic_leds", + .id = 'b', +}; + +static void pmic_pdev_register(struct device *dev) +{ + platform_device_register(&adc_ldm); + platform_device_register(&battery_ldm); + platform_device_register(&rtc_ldm); + platform_device_register(&power_ldm); + platform_device_register(&light_ldm); + platform_device_register(&rleds_ldm); + platform_device_register(&gleds_ldm); + platform_device_register(&bleds_ldm); +} + +/*! + * This function unregisters platform device structures for + * PMIC client drivers. + */ +static void pmic_pdev_unregister(void) +{ + platform_device_unregister(&adc_ldm); + platform_device_unregister(&battery_ldm); + platform_device_unregister(&rtc_ldm); + platform_device_unregister(&power_ldm); + platform_device_unregister(&light_ldm); +} + +static int __devinit is_chip_onboard(struct i2c_client *client) +{ + unsigned int ret = 0; + + /*bind the right device to the driver */ + if (pmic_i2c_24bit_read(client, REG_IDENTIFICATION, &ret) == -1) + return -1; + + if (MC13892_GEN_ID_VALUE != BITFEXT(ret, MC13892_GENERATION_ID)) { + /*compare the address value */ + dev_err(&client->dev, + "read generation ID 0x%x is not equal to 0x%x!\n", + BITFEXT(ret, MC13892_GENERATION_ID), + MC13892_GEN_ID_VALUE); + return -1; + } + + return 0; +} + +static ssize_t mc13892_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int i, value; + int offset = (REG_TEST4 + 1) / 4; + + for (i = 0; i < offset; i++) { + pmic_read(i, &value); + pr_info("reg%02d: %06x\t\t", i, value); + pmic_read(i + offset, &value); + pr_info("reg%02d: %06x\t\t", i + offset, value); + pmic_read(i + offset * 2, &value); + pr_info("reg%02d: %06x\t\t", i + offset * 2, value); + pmic_read(i + offset * 3, &value); + pr_info("reg%02d: %06x\n", i + offset * 3, value); + } + + return 0; +} + +static ssize_t mc13892_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + int reg, value, ret; + char *p; + + reg = simple_strtoul(buf, NULL, 10); + + p = NULL; + p = memchr(buf, ' ', count); + + if (p == NULL) { + pmic_read(reg, &value); + pr_debug("reg%02d: %06x\n", reg, value); + return count; + } + + p += 1; + + value = simple_strtoul(p, NULL, 16); + + ret = pmic_write(reg, value); + if (ret == 0) + pr_debug("write reg%02d: %06x\n", reg, value); + else + pr_debug("register update failed\n"); + + return count; +} + +static struct device_attribute mc13892_dev_attr = { + .attr = { + .name = "mc13892_ctl", + .mode = S_IRUSR | S_IWUSR, + }, + .show = mc13892_show, + .store = mc13892_store, +}; + +static int __devinit pmic_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret = 0; + int pmic_irq; + struct mc13892 *mc13892; + struct mc13892_platform_data *plat_data = client->dev.platform_data; + + ret = is_chip_onboard(client); + if (ret == -1) + return -ENODEV; + + mc13892 = kzalloc(sizeof(struct mc13892), GFP_KERNEL); + if (mc13892 == NULL) + return -ENOMEM; + + i2c_set_clientdata(client, mc13892); + mc13892->dev = &client->dev; + mc13892->i2c_client = client; + + /* so far, we got matched chip on board */ + + mc13892_client = client; + + /* Initialize the PMIC event handling */ + pmic_event_list_init(); + + /* Initialize GPIO for PMIC Interrupt */ + gpio_pmic_active(); + + /* Get the PMIC Version */ + pmic_get_revision(&mxc_pmic_version); + if (mxc_pmic_version.revision < 0) { + dev_err((struct device *)client, + "PMIC not detected!!! Access Failed\n"); + return -ENODEV; + } else { + dev_dbg((struct device *)client, + "Detected pmic core IC version number is %d\n", + mxc_pmic_version.revision); + } + + /* Initialize the PMIC parameters */ + ret = pmic_init_registers(); + if (ret != PMIC_SUCCESS) + return PMIC_ERROR; + + pmic_irq = (int)(client->irq); + if (pmic_irq == 0) + return PMIC_ERROR; + + ret = pmic_start_event_thread(pmic_irq); + if (ret) { + pr_err("mc13892 pmic driver init: \ + fail to start event thread\n"); + return PMIC_ERROR; + } + + /* Set and install PMIC IRQ handler */ + + set_irq_type(pmic_irq, IRQF_TRIGGER_HIGH); + + ret = + request_irq(pmic_irq, pmic_irq_handler, 0, "PMIC_IRQ", + 0); + + if (ret) { + dev_err(&client->dev, "request irq %d error!\n", pmic_irq); + return ret; + } + enable_irq_wake(pmic_irq); + + if (plat_data && plat_data->init) { + ret = plat_data->init(mc13892); + if (ret != 0) + return PMIC_ERROR; + } + + ret = device_create_file(&client->dev, &mc13892_dev_attr); + if (ret) + dev_err(&client->dev, "create device file failed!\n"); + + pmic_pdev_register(&client->dev); + + dev_info(&client->dev, "Loaded\n"); + + return PMIC_SUCCESS; +} + +static int pmic_remove(struct i2c_client *client) +{ + int pmic_irq = (int)(client->irq); + + pmic_stop_event_thread(); + free_irq(pmic_irq, 0); + pmic_pdev_unregister(); + return 0; +} + +static int pmic_suspend(struct i2c_client *client, pm_message_t state) +{ + return 0; +} + +static int pmic_resume(struct i2c_client *client) +{ + return 0; +} + +static const struct i2c_device_id mc13892_id[] = { + {"mc13892", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, mc13892_id); + +static struct i2c_driver pmic_driver = { + .driver = { + .name = "mc13892", + .bus = NULL, + }, + .probe = pmic_probe, + .remove = pmic_remove, + .suspend = pmic_suspend, + .resume = pmic_resume, + .id_table = mc13892_id, +}; + +static int __init pmic_init(void) +{ + return i2c_add_driver(&pmic_driver); +} + +static void __exit pmic_exit(void) +{ + i2c_del_driver(&pmic_driver); +} + +/* + * Module entry points + */ +subsys_initcall_sync(pmic_init); +module_exit(pmic_exit); + +MODULE_DESCRIPTION("Core/Protocol driver for PMIC"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic_external.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic_external.c @@ -0,0 +1,100 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic_external.c + * @brief This file contains all external functions of PMIC drivers. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include + +#include +#include + +/* + * External Functions + */ +extern int pmic_read(int reg_num, unsigned int *reg_val); +extern int pmic_write(int reg_num, const unsigned int reg_val); + +/*! + * This function is called by PMIC clients to read a register on PMIC. + * + * @param reg number of register + * @param reg_value return value of register + * @param reg_mask Bitmap mask indicating which bits to modify + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_read_reg(int reg, unsigned int *reg_value, + unsigned int reg_mask) +{ + int ret = 0; + unsigned int temp = 0; + + ret = pmic_read(reg, &temp); + if (ret != PMIC_SUCCESS) { + return PMIC_ERROR; + } + *reg_value = (temp & reg_mask); + + pr_debug("Read REG[ %d ] = 0x%x\n", reg, *reg_value); + + return ret; +} + +/*! + * This function is called by PMIC clients to write a register on PMIC. + * + * @param reg number of register + * @param reg_value New value of register + * @param reg_mask Bitmap mask indicating which bits to modify + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_write_reg(int reg, unsigned int reg_value, + unsigned int reg_mask) +{ + int ret = 0; + unsigned int temp = 0; + + ret = pmic_read(reg, &temp); + if (ret != PMIC_SUCCESS) { + return PMIC_ERROR; + } + temp = (temp & (~reg_mask)) | reg_value; +#ifdef CONFIG_MXC_PMIC_MC13783 + if (reg == REG_POWER_MISCELLANEOUS) + temp &= 0xFFFE7FFF; +#endif + ret = pmic_write(reg, temp); + if (ret != PMIC_SUCCESS) { + return PMIC_ERROR; + } + + pr_debug("Write REG[ %d ] = 0x%x\n", reg, reg_value); + + return ret; +} + +EXPORT_SYMBOL(pmic_read_reg); +EXPORT_SYMBOL(pmic_write_reg); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/mc13892.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/mc13892.c @@ -0,0 +1,335 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic/core/mc13892.c + * @brief This file contains MC13892 specific PMIC code. This implementaion + * may differ for each PMIC chip. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "pmic.h" + +/* + * Defines + */ +#define MC13892_I2C_RETRY_TIMES 10 +#define MXC_PMIC_FRAME_MASK 0x00FFFFFF +#define MXC_PMIC_MAX_REG_NUM 0x3F +#define MXC_PMIC_REG_NUM_SHIFT 0x19 +#define MXC_PMIC_WRITE_BIT_SHIFT 31 + +static unsigned int events_enabled0; +static unsigned int events_enabled1; +static struct mxc_pmic pmic_drv_data; +#ifndef CONFIG_MXC_PMIC_I2C +struct i2c_client *mc13892_client; +#endif + +int pmic_i2c_24bit_read(struct i2c_client *client, unsigned int reg_num, + unsigned int *value) +{ + unsigned char buf[3]; + int ret; + int i; + + memset(buf, 0, 3); + for (i = 0; i < MC13892_I2C_RETRY_TIMES; i++) { + ret = i2c_smbus_read_i2c_block_data(client, reg_num, 3, buf); + if (ret == 3) + break; + msleep(1); + } + + if (ret == 3) { + *value = buf[0] << 16 | buf[1] << 8 | buf[2]; + return ret; + } else { + pr_err("24bit read error, ret = %d\n", ret); + return -1; /* return -1 on failure */ + } +} + +int pmic_i2c_24bit_write(struct i2c_client *client, + unsigned int reg_num, unsigned int reg_val) +{ + char buf[3]; + int ret; + int i; + + buf[0] = (reg_val >> 16) & 0xff; + buf[1] = (reg_val >> 8) & 0xff; + buf[2] = (reg_val) & 0xff; + + for (i = 0; i < MC13892_I2C_RETRY_TIMES; i++) { + ret = i2c_smbus_write_i2c_block_data(client, reg_num, 3, buf); + if (ret == 0) + break; + msleep(1); + } + if (i == MC13892_I2C_RETRY_TIMES) + pr_err("24bit write error, ret = %d\n", ret); + + return ret; +} + +int pmic_read(int reg_num, unsigned int *reg_val) +{ + unsigned int frame = 0; + int ret = 0; + + if (pmic_drv_data.spi != NULL) { + if (reg_num > MXC_PMIC_MAX_REG_NUM) + return PMIC_ERROR; + + frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT; + + ret = spi_rw(pmic_drv_data.spi, (u8 *) &frame, 1); + + *reg_val = frame & MXC_PMIC_FRAME_MASK; + } else { + if (mc13892_client == NULL) + return PMIC_ERROR; + + if (pmic_i2c_24bit_read(mc13892_client, reg_num, reg_val) == -1) + return PMIC_ERROR; + } + + return PMIC_SUCCESS; +} + +int pmic_write(int reg_num, const unsigned int reg_val) +{ + unsigned int frame = 0; + int ret = 0; + + if (pmic_drv_data.spi != NULL) { + if (reg_num > MXC_PMIC_MAX_REG_NUM) + return PMIC_ERROR; + + frame |= (1 << MXC_PMIC_WRITE_BIT_SHIFT); + + frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT; + + frame |= reg_val & MXC_PMIC_FRAME_MASK; + + ret = spi_rw(pmic_drv_data.spi, (u8 *) &frame, 1); + + return ret; + } else { + if (mc13892_client == NULL) + return PMIC_ERROR; + + return pmic_i2c_24bit_write(mc13892_client, reg_num, reg_val); + } +} + +void *pmic_alloc_data(struct device *dev) +{ + struct mc13892 *mc13892; + + mc13892 = kzalloc(sizeof(struct mc13892), GFP_KERNEL); + if (mc13892 == NULL) + return NULL; + + mc13892->dev = dev; + + return (void *)mc13892; +} + +/*! + * This function initializes the SPI device parameters for this PMIC. + * + * @param spi the SPI slave device(PMIC) + * + * @return None + */ +int pmic_spi_setup(struct spi_device *spi) +{ + /* Setup the SPI slave i.e.PMIC */ + pmic_drv_data.spi = spi; + + spi->mode = SPI_MODE_0 | SPI_CS_HIGH; + spi->bits_per_word = 32; + + return spi_setup(spi); +} + +int pmic_init_registers(void) +{ + CHECK_ERROR(pmic_write(REG_INT_MASK0, 0xFFFFFF)); + CHECK_ERROR(pmic_write(REG_INT_MASK0, 0xFFFFFF)); + CHECK_ERROR(pmic_write(REG_INT_STATUS0, 0xFFFFFF)); + CHECK_ERROR(pmic_write(REG_INT_STATUS1, 0xFFFFFF)); + /* disable auto charge */ + if (machine_is_mx51_3ds()) + CHECK_ERROR(pmic_write(REG_CHARGE, 0xB40003)); + + pm_power_off = mc13892_power_off; + + return PMIC_SUCCESS; +} + +unsigned int pmic_get_active_events(unsigned int *active_events) +{ + unsigned int count = 0; + unsigned int status0, status1; + int bit_set; + + pmic_read(REG_INT_STATUS0, &status0); + pmic_read(REG_INT_STATUS1, &status1); + pmic_write(REG_INT_STATUS0, status0); + pmic_write(REG_INT_STATUS1, status1); + status0 &= events_enabled0; + status1 &= events_enabled1; + + while (status0) { + bit_set = ffs(status0) - 1; + *(active_events + count) = bit_set; + count++; + status0 ^= (1 << bit_set); + } + while (status1) { + bit_set = ffs(status1) - 1; + *(active_events + count) = bit_set + 24; + count++; + status1 ^= (1 << bit_set); + } + + return count; +} + +#define EVENT_MASK_0 0x387fff +#define EVENT_MASK_1 0x1177eb + +int pmic_event_unmask(type_event event) +{ + unsigned int event_mask = 0; + unsigned int mask_reg = 0; + unsigned int event_bit = 0; + int ret; + + if (event < EVENT_1HZI) { + mask_reg = REG_INT_MASK0; + event_mask = EVENT_MASK_0; + event_bit = (1 << event); + events_enabled0 |= event_bit; + } else { + event -= 24; + mask_reg = REG_INT_MASK1; + event_mask = EVENT_MASK_1; + event_bit = (1 << event); + events_enabled1 |= event_bit; + } + + if ((event_bit & event_mask) == 0) { + pr_debug("Error: unmasking a reserved/unused event\n"); + return PMIC_ERROR; + } + + ret = pmic_write_reg(mask_reg, 0, event_bit); + + pr_debug("Enable Event : %d\n", event); + + return ret; +} + +int pmic_event_mask(type_event event) +{ + unsigned int event_mask = 0; + unsigned int mask_reg = 0; + unsigned int event_bit = 0; + int ret; + + if (event < EVENT_1HZI) { + mask_reg = REG_INT_MASK0; + event_mask = EVENT_MASK_0; + event_bit = (1 << event); + events_enabled0 &= ~event_bit; + } else { + event -= 24; + mask_reg = REG_INT_MASK1; + event_mask = EVENT_MASK_1; + event_bit = (1 << event); + events_enabled1 &= ~event_bit; + } + + if ((event_bit & event_mask) == 0) { + pr_debug("Error: masking a reserved/unused event\n"); + return PMIC_ERROR; + } + + ret = pmic_write_reg(mask_reg, event_bit, event_bit); + + pr_debug("Disable Event : %d\n", event); + + return ret; +} + +/*! + * This function returns the PMIC version in system. + * + * @param ver pointer to the pmic_version_t structure + * + * @return This function returns PMIC version. + */ +void pmic_get_revision(pmic_version_t *ver) +{ + int rev_id = 0; + int rev1 = 0; + int rev2 = 0; + int finid = 0; + int icid = 0; + + ver->id = PMIC_MC13892; + pmic_read(REG_IDENTIFICATION, &rev_id); + + rev1 = (rev_id & 0x018) >> 3; + rev2 = (rev_id & 0x007); + icid = (rev_id & 0x01C0) >> 6; + finid = (rev_id & 0x01E00) >> 9; + + ver->revision = ((rev1 * 10) + rev2); + printk(KERN_INFO "mc13892 Rev %d.%d FinVer %x detected\n", rev1, + rev2, finid); +} + +void mc13892_power_off(void) +{ + unsigned int value; + + pmic_read_reg(REG_POWER_CTL0, &value, 0xffffff); + + value |= 0x000008; + + pmic_write_reg(REG_POWER_CTL0, value, 0xffffff); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic_common.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic_common.c @@ -0,0 +1,127 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic_common.c + * @brief This is the common file for the PMIC Core/Protocol driver. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "pmic.h" + +/* + * Global variables + */ +pmic_version_t mxc_pmic_version; +unsigned int active_events[MAX_ACTIVE_EVENTS]; + + +static struct completion event_completion; +static struct task_struct *tstask; + +static int pmic_event_thread_func(void *v) +{ + unsigned int loop; + unsigned int count = 0; + unsigned int irq = (int)v; + + while (1) { + wait_for_completion_interruptible( + &event_completion); + if (kthread_should_stop()) + break; + + count = pmic_get_active_events( + active_events); + pr_debug("active events number %d\n", count); + + for (loop = 0; loop < count; loop++) + pmic_event_callback( + active_events[loop]); + enable_irq(irq); + } + + return 0; +} + +int pmic_start_event_thread(int irq_num) +{ + int ret = 0; + + if (tstask) + return ret; + + init_completion(&event_completion); + + tstask = kthread_run(pmic_event_thread_func, + (void *)irq_num, "pmic-event-thread"); + ret = IS_ERR(tstask) ? -1 : 0; + if (IS_ERR(tstask)) + tstask = NULL; + return ret; +} + +void pmic_stop_event_thread(void) +{ + if (tstask) { + complete(&event_completion); + kthread_stop(tstask); + } +} + +/*! + * This function is called when pmic interrupt occurs on the processor. + * It is the interrupt handler for the pmic module. + * + * @param irq the irq number + * @param dev_id the pointer on the device + * + * @return The function returns IRQ_HANDLED when handled. + */ +irqreturn_t pmic_irq_handler(int irq, void *dev_id) +{ + disable_irq_nosync(irq); + complete(&event_completion); + + return IRQ_HANDLED; +} + +/*! + * This function is used to determine the PMIC type and its revision. + * + * @return Returns the PMIC type and its revision. + */ + +pmic_version_t pmic_get_version(void) +{ + return mxc_pmic_version; +} +EXPORT_SYMBOL(pmic_get_version); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/pmic-dev.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/pmic-dev.c @@ -0,0 +1,319 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All rights reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic-dev.c + * @brief This provides /dev interface to the user program. They make it + * possible to have user-space programs use or control PMIC. Mainly its + * useful for notifying PMIC events to user-space programs. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define PMIC_NAME "pmic" +#define CIRC_BUF_MAX 16 +#define CIRC_ADD(elem,cir_buf,size) \ + down(&event_mutex); \ + if(CIRC_SPACE(cir_buf.head, cir_buf.tail, size)){ \ + cir_buf.buf[cir_buf.head] = (char)elem; \ + cir_buf.head = (cir_buf.head + 1) & (size - 1); \ + } else { \ + pr_info("Failed to notify event to the user\n");\ + } \ + up(&event_mutex); + +#define CIRC_REMOVE(elem,cir_buf,size) \ + down(&event_mutex); \ + if(CIRC_CNT(cir_buf.head, cir_buf.tail, size)){ \ + elem = (int)cir_buf.buf[cir_buf.tail]; \ + cir_buf.tail = (cir_buf.tail + 1) & (size - 1); \ + } else { \ + elem = -1; \ + pr_info("No valid notified event\n"); \ + } \ + up(&event_mutex); + +static int pmic_major; +static struct class *pmic_class; +static struct fasync_struct *pmic_dev_queue; + +static DECLARE_MUTEX(event_mutex); +static struct circ_buf pmic_events; + +static void callbackfn(void *event) +{ + printk(KERN_INFO "\n\n DETECTED PMIC EVENT : %d\n\n", + (unsigned int)event); +} + +static void user_notify_callback(void *event) +{ + CIRC_ADD((int)event, pmic_events, CIRC_BUF_MAX); + kill_fasync(&pmic_dev_queue, SIGIO, POLL_IN); +} + +/*! + * This function implements IOCTL controls on a PMIC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @param cmd the command + * @param arg the parameter + * @return This function returns 0 if successful. + */ +static int pmic_dev_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + register_info reg_info; + pmic_event_callback_t event_sub; + type_event event; + int ret = 0; + + if (_IOC_TYPE(cmd) != 'P') + return -ENOTTY; + + switch (cmd) { + case PMIC_READ_REG: + if (copy_from_user(®_info, (register_info *) arg, + sizeof(register_info))) { + return -EFAULT; + } + ret = + pmic_read_reg(reg_info.reg, &(reg_info.reg_value), + 0x00ffffff); + pr_debug("read reg %d %x\n", reg_info.reg, reg_info.reg_value); + if (copy_to_user((register_info *) arg, ®_info, + sizeof(register_info))) { + return -EFAULT; + } + break; + + case PMIC_WRITE_REG: + if (copy_from_user(®_info, (register_info *) arg, + sizeof(register_info))) { + return -EFAULT; + } + ret = + pmic_write_reg(reg_info.reg, reg_info.reg_value, + 0x00ffffff); + pr_debug("write reg %d %x\n", reg_info.reg, reg_info.reg_value); + if (copy_to_user((register_info *) arg, ®_info, + sizeof(register_info))) { + return -EFAULT; + } + break; + + case PMIC_SUBSCRIBE: + if (get_user(event, (int __user *)arg)) { + return -EFAULT; + } + event_sub.func = callbackfn; + event_sub.param = (void *)event; + ret = pmic_event_subscribe(event, event_sub); + pr_debug("subscribe done\n"); + break; + + case PMIC_UNSUBSCRIBE: + if (get_user(event, (int __user *)arg)) { + return -EFAULT; + } + event_sub.func = callbackfn; + event_sub.param = (void *)event; + ret = pmic_event_unsubscribe(event, event_sub); + pr_debug("unsubscribe done\n"); + break; + + case PMIC_NOTIFY_USER: + if (get_user(event, (int __user *)arg)) { + return -EFAULT; + } + event_sub.func = user_notify_callback; + event_sub.param = (void *)event; + ret = pmic_event_subscribe(event, event_sub); + break; + + case PMIC_GET_NOTIFY: + CIRC_REMOVE(event, pmic_events, CIRC_BUF_MAX); + if (put_user(event, (int __user *)arg)) { + return -EFAULT; + } + break; + + default: + printk(KERN_ERR "%d unsupported ioctl command\n", (int)cmd); + return -EINVAL; + } + + return ret; +} + +/*! + * This function implements the open method on a PMIC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * @return This function returns 0. + */ +static int pmic_dev_open(struct inode *inode, struct file *file) +{ + pr_debug("open\n"); + return PMIC_SUCCESS; +} + +/*! + * This function implements the release method on a PMIC device. + * + * @param inode pointer on the node + * @param file pointer on the file + * + * @return This function returns 0. + */ +static int pmic_dev_free(struct inode *inode, struct file *file) +{ + pr_debug("free\n"); + return PMIC_SUCCESS; +} + +static int pmic_dev_fasync(int fd, struct file *filp, int mode) +{ + return fasync_helper(fd, filp, mode, &pmic_dev_queue); +} + +/*! + * This structure defines file operations for a PMIC device. + */ +static struct file_operations pmic_fops = { + /*! + * the owner + */ + .owner = THIS_MODULE, + /*! + * the ioctl operation + */ + .ioctl = pmic_dev_ioctl, + /*! + * the open operation + */ + .open = pmic_dev_open, + /*! + * the release operation + */ + .release = pmic_dev_free, + /*! + * the release operation + */ + .fasync = pmic_dev_fasync, +}; + +/*! + * This function implements the init function of the PMIC char device. + * This function is called when the module is loaded. It registers + * the character device for PMIC to be used by user-space programs. + * + * @return This function returns 0. + */ +static int __init pmic_dev_init(void) +{ + int ret = 0; + struct device *pmic_device; + pmic_version_t pmic_ver; + + pmic_ver = pmic_get_version(); + if (pmic_ver.revision < 0) { + printk(KERN_ERR "No PMIC device found\n"); + return -ENODEV; + } + + pmic_major = register_chrdev(0, PMIC_NAME, &pmic_fops); + if (pmic_major < 0) { + printk(KERN_ERR "unable to get a major for pmic\n"); + return pmic_major; + } + + pmic_class = class_create(THIS_MODULE, PMIC_NAME); + if (IS_ERR(pmic_class)) { + printk(KERN_ERR "Error creating pmic class.\n"); + ret = PMIC_ERROR; + goto err; + } + + pmic_device = device_create(pmic_class, NULL, MKDEV(pmic_major, 0), NULL, + PMIC_NAME); + if (IS_ERR(pmic_device)) { + printk(KERN_ERR "Error creating pmic class device.\n"); + ret = PMIC_ERROR; + goto err1; + } + + pmic_events.buf = kmalloc(CIRC_BUF_MAX * sizeof(char), GFP_KERNEL); + if (NULL == pmic_events.buf) { + ret = -ENOMEM; + goto err2; + } + pmic_events.head = pmic_events.tail = 0; + + printk(KERN_INFO "PMIC Character device: successfully loaded\n"); + return ret; + err2: + device_destroy(pmic_class, MKDEV(pmic_major, 0)); + err1: + class_destroy(pmic_class); + err: + unregister_chrdev(pmic_major, PMIC_NAME); + return ret; + +} + +/*! + * This function implements the exit function of the PMIC character device. + * This function is called when the module is unloaded. It unregisters + * the PMIC character device. + * + */ +static void __exit pmic_dev_exit(void) +{ + device_destroy(pmic_class, MKDEV(pmic_major, 0)); + class_destroy(pmic_class); + + unregister_chrdev(pmic_major, PMIC_NAME); + + printk(KERN_INFO "PMIC Character device: successfully unloaded\n"); +} + +/* + * Module entry points + */ + +module_init(pmic_dev_init); +module_exit(pmic_dev_exit); + +MODULE_DESCRIPTION("PMIC Protocol /dev entries driver"); +MODULE_AUTHOR("FreeScale"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/mc34704.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/mc34704.c @@ -0,0 +1,329 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic/core/mc34704.c + * @brief This file contains MC34704 specific PMIC code. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pmic.h" + +/* + * Globals + */ +static pmic_version_t mxc_pmic_version = { + .id = PMIC_MC34704, + .revision = 0, +}; +static unsigned int events_enabled; +unsigned int active_events[MAX_ACTIVE_EVENTS]; +struct i2c_client *mc34704_client; +static void pmic_trigger_poll(void); + +#define MAX_MC34704_REG 0x59 +static unsigned int mc34704_reg_readonly[MAX_MC34704_REG / 32 + 1] = { + (1 << 0x03) || (1 << 0x05) || (1 << 0x07) || (1 << 0x09) || + (1 << 0x0B) || (1 << 0x0E) || (1 << 0x11) || (1 << 0x14) || + (1 << 0x17) || (1 << 0x18), + 0, +}; +static unsigned int mc34704_reg_written[MAX_MC34704_REG / 32 + 1]; +static unsigned char mc34704_shadow_regs[MAX_MC34704_REG - 1]; +#define IS_READONLY(r) ((1 << ((r) % 32)) & mc34704_reg_readonly[(r) / 32]) +#define WAS_WRITTEN(r) ((1 << ((r) % 32)) & mc34704_reg_written[(r) / 32]) +#define MARK_WRITTEN(r) do { \ + mc34704_reg_written[(r) / 32] |= (1 << ((r) % 32)); \ +} while (0) + +int pmic_read(int reg_nr, unsigned int *reg_val) +{ + int c; + + /* + * Use the shadow register if we've written to it + */ + if (WAS_WRITTEN(reg_nr)) { + *reg_val = mc34704_shadow_regs[reg_nr]; + return PMIC_SUCCESS; + } + + /* + * Otherwise, actually read the real register. + * Write-only registers will read as zero. + */ + c = i2c_smbus_read_byte_data(mc34704_client, reg_nr); + if (c == -1) { + pr_debug("mc34704: error reading register 0x%02x\n", reg_nr); + return PMIC_ERROR; + } else { + *reg_val = c; + return PMIC_SUCCESS; + } +} + +int pmic_write(int reg_nr, const unsigned int reg_val) +{ + int ret; + + ret = i2c_smbus_write_byte_data(mc34704_client, reg_nr, reg_val); + if (ret == -1) { + return PMIC_ERROR; + } else { + /* + * Update our software copy of the register since you + * can't read what you wrote. + */ + if (!IS_READONLY(reg_nr)) { + mc34704_shadow_regs[reg_nr] = reg_val; + MARK_WRITTEN(reg_nr); + } + return PMIC_SUCCESS; + } +} + +unsigned int pmic_get_active_events(unsigned int *active_events) +{ + unsigned int count = 0; + unsigned int faults; + int bit_set; + + /* Check for any relevant PMIC faults */ + pmic_read(REG_MC34704_FAULTS, &faults); + faults &= events_enabled; + + /* + * Mask all active events, because there is no way to acknowledge + * or dismiss them in the PMIC -- they're sticky. + */ + events_enabled &= ~faults; + + /* Account for all unmasked faults */ + while (faults) { + bit_set = ffs(faults) - 1; + *(active_events + count) = bit_set; + count++; + faults ^= (1 << bit_set); + } + return count; +} + +int pmic_event_unmask(type_event event) +{ + unsigned int event_bit = 0; + unsigned int prior_events = events_enabled; + + event_bit = (1 << event); + events_enabled |= event_bit; + + pr_debug("Enable Event : %d\n", event); + + /* start the polling task as needed */ + if (events_enabled && prior_events == 0) + pmic_trigger_poll(); + + return 0; +} + +int pmic_event_mask(type_event event) +{ + unsigned int event_bit = 0; + + event_bit = (1 << event); + events_enabled &= ~event_bit; + + pr_debug("Disable Event : %d\n", event); + + return 0; +} + +/*! + * PMIC event polling task. This task is called periodically to poll + * for possible MC34704 events (No interrupt supplied by the hardware). + */ +static void pmic_event_task(struct work_struct *work); +DECLARE_DELAYED_WORK(pmic_ws, pmic_event_task); + +static void pmic_trigger_poll(void) +{ + schedule_delayed_work(&pmic_ws, HZ / 10); +} + +static void pmic_event_task(struct work_struct *work) +{ + unsigned int count = 0; + int i; + + count = pmic_get_active_events(active_events); + pr_debug("active events number %d\n", count); + + /* call handlers for all active events */ + for (i = 0; i < count; i++) + pmic_event_callback(active_events[i]); + + /* re-trigger this task, but only if somebody is watching */ + if (events_enabled) + pmic_trigger_poll(); + + return; +} + +pmic_version_t pmic_get_version(void) +{ + return mxc_pmic_version; +} +EXPORT_SYMBOL(pmic_get_version); + +int __devinit pmic_init_registers(void) +{ + /* + * Set some registers to what they should be, + * if for no other reason than to initialize our + * software register copies. + */ + CHECK_ERROR(pmic_write(REG_MC34704_GENERAL2, 0x09)); + CHECK_ERROR(pmic_write(REG_MC34704_VGSET1, 0)); + CHECK_ERROR(pmic_write(REG_MC34704_REG2SET1, 0)); + CHECK_ERROR(pmic_write(REG_MC34704_REG3SET1, 0)); + CHECK_ERROR(pmic_write(REG_MC34704_REG4SET1, 0)); + CHECK_ERROR(pmic_write(REG_MC34704_REG5SET1, 0)); + + return PMIC_SUCCESS; +} + +static int __devinit is_chip_onboard(struct i2c_client *client) +{ + int val; + + /* + * This PMIC has no version or ID register, so just see + * if it ACK's and returns 0 on some write-only register as + * evidence of its presence. + */ + val = i2c_smbus_read_byte_data(client, REG_MC34704_GENERAL2); + if (val != 0) + return -1; + + return 0; +} + +static int __devinit pmic_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret = 0; + struct mc34704 *mc34704; + struct mc34704_platform_data *plat_data = client->dev.platform_data; + + if (!plat_data || !plat_data->init) + return -ENODEV; + + ret = is_chip_onboard(client); + + if (ret == -1) + return -ENODEV; + + mc34704 = kzalloc(sizeof(struct mc34704), GFP_KERNEL); + if (mc34704 == NULL) + return -ENOMEM; + + i2c_set_clientdata(client, mc34704); + mc34704->dev = &client->dev; + mc34704->i2c_client = client; + + mc34704_client = client; + + /* Initialize the PMIC event handling */ + pmic_event_list_init(); + + /* Initialize PMI registers */ + if (pmic_init_registers() != PMIC_SUCCESS) + return PMIC_ERROR; + + ret = plat_data->init(mc34704); + if (ret != 0) + return PMIC_ERROR; + + dev_info(&client->dev, "Loaded\n"); + + return PMIC_SUCCESS; +} + +static int pmic_remove(struct i2c_client *client) +{ + return 0; +} + +static int pmic_suspend(struct i2c_client *client, pm_message_t state) +{ + return 0; +} + +static int pmic_resume(struct i2c_client *client) +{ + return 0; +} + +static const struct i2c_device_id mc34704_id[] = { + {"mc34704", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, mc34704_id); + +static struct i2c_driver pmic_driver = { + .driver = { + .name = "mc34704", + .bus = NULL, + }, + .probe = pmic_probe, + .remove = pmic_remove, + .suspend = pmic_suspend, + .resume = pmic_resume, + .id_table = mc34704_id, +}; + +static int __init pmic_init(void) +{ + return i2c_add_driver(&pmic_driver); +} + +static void __exit pmic_exit(void) +{ + i2c_del_driver(&pmic_driver); +} + +/* + * Module entry points + */ +subsys_initcall_sync(pmic_init); +module_exit(pmic_exit); + +MODULE_DESCRIPTION("MC34704 PMIC driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/pmic/core/mc13783.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/pmic/core/mc13783.c @@ -0,0 +1,380 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file pmic/core/mc13783.c + * @brief This file contains MC13783 specific PMIC code. This implementaion + * may differ for each PMIC chip. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "pmic.h" + +/* + * Defines + */ +#define EVENT_MASK_0 0x697fdf +#define EVENT_MASK_1 0x3efffb +#define MXC_PMIC_FRAME_MASK 0x00FFFFFF +#define MXC_PMIC_MAX_REG_NUM 0x3F +#define MXC_PMIC_REG_NUM_SHIFT 0x19 +#define MXC_PMIC_WRITE_BIT_SHIFT 31 + +static unsigned int events_enabled0 = 0; +static unsigned int events_enabled1 = 0; +struct mxc_pmic pmic_drv_data; + +/*! + * This function is called to read a register on PMIC. + * + * @param reg_num number of the pmic register to be read + * @param reg_val return value of register + * + * @return Returns 0 on success -1 on failure. + */ +int pmic_read(unsigned int reg_num, unsigned int *reg_val) +{ + unsigned int frame = 0; + int ret = 0; + + if (reg_num > MXC_PMIC_MAX_REG_NUM) + return PMIC_ERROR; + + frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT; + + ret = spi_rw(pmic_drv_data.spi, (u8 *) & frame, 1); + + *reg_val = frame & MXC_PMIC_FRAME_MASK; + + return ret; +} + +/*! + * This function is called to write a value to the register on PMIC. + * + * @param reg_num number of the pmic register to be written + * @param reg_val value to be written + * + * @return Returns 0 on success -1 on failure. + */ +int pmic_write(int reg_num, const unsigned int reg_val) +{ + unsigned int frame = 0; + int ret = 0; + + if (reg_num > MXC_PMIC_MAX_REG_NUM) + return PMIC_ERROR; + + frame |= (1 << MXC_PMIC_WRITE_BIT_SHIFT); + + frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT; + + frame |= reg_val & MXC_PMIC_FRAME_MASK; + + ret = spi_rw(pmic_drv_data.spi, (u8 *) & frame, 1); + + return ret; +} + +void *pmic_alloc_data(struct device *dev) +{ + struct mc13783 *mc13783; + + mc13783 = kzalloc(sizeof(struct mc13783), GFP_KERNEL); + if (mc13783 == NULL) + return NULL; + + mc13783->dev = dev; + + return (void *)mc13783; +} + +/*! + * This function initializes the SPI device parameters for this PMIC. + * + * @param spi the SPI slave device(PMIC) + * + * @return None + */ +int pmic_spi_setup(struct spi_device *spi) +{ + /* Setup the SPI slave i.e.PMIC */ + pmic_drv_data.spi = spi; + + spi->mode = SPI_MODE_2 | SPI_CS_HIGH; + spi->bits_per_word = 32; + + return spi_setup(spi); +} + +/*! + * This function initializes the PMIC registers. + * + * @return None + */ +int pmic_init_registers(void) +{ + CHECK_ERROR(pmic_write(REG_INTERRUPT_MASK_0, MXC_PMIC_FRAME_MASK)); + CHECK_ERROR(pmic_write(REG_INTERRUPT_MASK_1, MXC_PMIC_FRAME_MASK)); + CHECK_ERROR(pmic_write(REG_INTERRUPT_STATUS_0, MXC_PMIC_FRAME_MASK)); + CHECK_ERROR(pmic_write(REG_INTERRUPT_STATUS_1, MXC_PMIC_FRAME_MASK)); + return PMIC_SUCCESS; +} + +/*! + * This function returns the PMIC version in system. + * + * @param ver pointer to the pmic_version_t structure + * + * @return This function returns PMIC version. + */ +void pmic_get_revision(pmic_version_t * ver) +{ + int rev_id = 0; + int rev1 = 0; + int rev2 = 0; + int finid = 0; + int icid = 0; + + ver->id = PMIC_MC13783; + pmic_read(REG_REVISION, &rev_id); + + rev1 = (rev_id & 0x018) >> 3; + rev2 = (rev_id & 0x007); + icid = (rev_id & 0x01C0) >> 6; + finid = (rev_id & 0x01E00) >> 9; + + /* Ver 0.2 is actually 3.2a. Report as 3.2 */ + if ((rev1 == 0) && (rev2 == 2)) { + rev1 = 3; + } + + if (rev1 == 0 || icid != 2) { + ver->revision = -1; + printk(KERN_NOTICE + "mc13783: Not detected.\tAccess failed\t!!!\n"); + } else { + ver->revision = ((rev1 * 10) + rev2); + printk(KERN_INFO "mc13783 Rev %d.%d FinVer %x detected\n", rev1, + rev2, finid); + } + + return; + +} + +/*! + * This function reads the interrupt status registers of PMIC + * and determine the current active events. + * + * @param active_events array pointer to be used to return active + * event numbers. + * + * @return This function returns PMIC version. + */ +unsigned int pmic_get_active_events(unsigned int *active_events) +{ + unsigned int count = 0; + unsigned int status0, status1; + int bit_set; + + pmic_read(REG_INTERRUPT_STATUS_0, &status0); + pmic_read(REG_INTERRUPT_STATUS_1, &status1); + pmic_write(REG_INTERRUPT_STATUS_0, status0); + pmic_write(REG_INTERRUPT_STATUS_1, status1); + status0 &= events_enabled0; + status1 &= events_enabled1; + + while (status0) { + bit_set = ffs(status0) - 1; + *(active_events + count) = bit_set; + count++; + status0 ^= (1 << bit_set); + } + while (status1) { + bit_set = ffs(status1) - 1; + *(active_events + count) = bit_set + 24; + count++; + status1 ^= (1 << bit_set); + } + + return count; +} + +/*! + * This function unsets a bit in mask register of pmic to unmask an event IT. + * + * @param event the event to be unmasked + * + * @return This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE. + */ +int pmic_event_unmask(type_event event) +{ + unsigned int event_mask = 0; + unsigned int mask_reg = 0; + unsigned int event_bit = 0; + int ret; + + if (event < EVENT_E1HZI) { + mask_reg = REG_INTERRUPT_MASK_0; + event_mask = EVENT_MASK_0; + event_bit = (1 << event); + events_enabled0 |= event_bit; + } else { + event -= 24; + mask_reg = REG_INTERRUPT_MASK_1; + event_mask = EVENT_MASK_1; + event_bit = (1 << event); + events_enabled1 |= event_bit; + } + + if ((event_bit & event_mask) == 0) { + pr_debug("Error: unmasking a reserved/unused event\n"); + return PMIC_ERROR; + } + + ret = pmic_write_reg(mask_reg, 0, event_bit); + + pr_debug("Enable Event : %d\n", event); + + return ret; +} + +/*! + * This function sets a bit in mask register of pmic to disable an event IT. + * + * @param event the event to be masked + * + * @return This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE. + */ +int pmic_event_mask(type_event event) +{ + unsigned int event_mask = 0; + unsigned int mask_reg = 0; + unsigned int event_bit = 0; + int ret; + + if (event < EVENT_E1HZI) { + mask_reg = REG_INTERRUPT_MASK_0; + event_mask = EVENT_MASK_0; + event_bit = (1 << event); + events_enabled0 &= ~event_bit; + } else { + event -= 24; + mask_reg = REG_INTERRUPT_MASK_1; + event_mask = EVENT_MASK_1; + event_bit = (1 << event); + events_enabled1 &= ~event_bit; + } + + if ((event_bit & event_mask) == 0) { + pr_debug("Error: masking a reserved/unused event\n"); + return PMIC_ERROR; + } + + ret = pmic_write_reg(mask_reg, event_bit, event_bit); + + pr_debug("Disable Event : %d\n", event); + + return ret; +} + +/*! + * This function is called to read all sensor bits of PMIC. + * + * @param sensor Sensor to be checked. + * + * @return This function returns true if the sensor bit is high; + * or returns false if the sensor bit is low. + */ +bool pmic_check_sensor(t_sensor sensor) +{ + unsigned int reg_val = 0; + + CHECK_ERROR(pmic_read_reg + (REG_INTERRUPT_SENSE_0, ®_val, PMIC_ALL_BITS)); + + if ((1 << sensor) & reg_val) + return true; + else + return false; +} + +/*! + * This function checks one sensor of PMIC. + * + * @param sensor_bits structure of all sensor bits. + * + * @return This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE. + */ + +PMIC_STATUS pmic_get_sensors(t_sensor_bits * sensor_bits) +{ + int sense_0 = 0; + int sense_1 = 0; + + memset(sensor_bits, 0, sizeof(t_sensor_bits)); + + pmic_read_reg(REG_INTERRUPT_SENSE_0, &sense_0, 0xffffff); + pmic_read_reg(REG_INTERRUPT_SENSE_1, &sense_1, 0xffffff); + + sensor_bits->sense_chgdets = (sense_0 & (1 << 6)) ? true : false; + sensor_bits->sense_chgovs = (sense_0 & (1 << 7)) ? true : false; + sensor_bits->sense_chgrevs = (sense_0 & (1 << 8)) ? true : false; + sensor_bits->sense_chgshorts = (sense_0 & (1 << 9)) ? true : false; + sensor_bits->sense_cccvs = (sense_0 & (1 << 10)) ? true : false; + sensor_bits->sense_chgcurrs = (sense_0 & (1 << 11)) ? true : false; + sensor_bits->sense_bpons = (sense_0 & (1 << 12)) ? true : false; + sensor_bits->sense_lobatls = (sense_0 & (1 << 13)) ? true : false; + sensor_bits->sense_lobaths = (sense_0 & (1 << 14)) ? true : false; + sensor_bits->sense_usb4v4s = (sense_0 & (1 << 16)) ? true : false; + sensor_bits->sense_usb2v0s = (sense_0 & (1 << 17)) ? true : false; + sensor_bits->sense_usb0v8s = (sense_0 & (1 << 18)) ? true : false; + sensor_bits->sense_id_floats = (sense_0 & (1 << 19)) ? true : false; + sensor_bits->sense_id_gnds = (sense_0 & (1 << 20)) ? true : false; + sensor_bits->sense_se1s = (sense_0 & (1 << 21)) ? true : false; + sensor_bits->sense_ckdets = (sense_0 & (1 << 22)) ? true : false; + + sensor_bits->sense_onofd1s = (sense_1 & (1 << 3)) ? true : false; + sensor_bits->sense_onofd2s = (sense_1 & (1 << 4)) ? true : false; + sensor_bits->sense_onofd3s = (sense_1 & (1 << 5)) ? true : false; + sensor_bits->sense_pwrrdys = (sense_1 & (1 << 11)) ? true : false; + sensor_bits->sense_thwarnhs = (sense_1 & (1 << 12)) ? true : false; + sensor_bits->sense_thwarnls = (sense_1 & (1 << 13)) ? true : false; + sensor_bits->sense_clks = (sense_1 & (1 << 14)) ? true : false; + sensor_bits->sense_mc2bs = (sense_1 & (1 << 17)) ? true : false; + sensor_bits->sense_hsdets = (sense_1 & (1 << 18)) ? true : false; + sensor_bits->sense_hsls = (sense_1 & (1 << 19)) ? true : false; + sensor_bits->sense_alspths = (sense_1 & (1 << 20)) ? true : false; + sensor_bits->sense_ahsshorts = (sense_1 & (1 << 21)) ? true : false; + return PMIC_SUCCESS; +} + +EXPORT_SYMBOL(pmic_check_sensor); +EXPORT_SYMBOL(pmic_get_sensors); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/max8660.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/max8660.c @@ -0,0 +1,154 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file max8660.c + * @brief Driver for max8660 + * + * @ingroup pmic + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcu_pmic_core.h" +#include "max8660.h" + +/* I2C bus id and device address of mcu */ +#define I2C1_BUS 0 +#define MAX8660_I2C_ADDR 0x68 + +static struct i2c_client *max8660_i2c_client; + + /* reg names for max8660 + REG_MAX8660_OUTPUT_ENABLE_1, + REG_MAX8660_OUTPUT_ENABLE_2, + REG_MAX8660_VOLT__CHANGE_1, + REG_MAX8660_V3_TARGET_VOLT_1, + REG_MAX8660_V3_TARGET_VOLT_2, + REG_MAX8660_V4_TARGET_VOLT_1, + REG_MAX8660_V4_TARGET_VOLT_2, + REG_MAX8660_V5_TARGET_VOLT_1, + REG_MAX8660_V5_TARGET_VOLT_2, + REG_MAX8660_V6V7_TARGET_VOLT, + REG_MAX8660_FORCE_PWM + */ + + /* save down the reg values for the device is write only */ +static u8 max8660_reg_value_table[] = + { 0x0, 0x0, 0x0, 0x17, 0x17, 0x1F, 0x1F, 0x04, 0x04, 0x0, 0x0 +}; +static int max8660_dev_present; + +int is_max8660_present(void) +{ + return max8660_dev_present; +} + +int max8660_get_buffered_reg_val(int reg_name, u8 *value) +{ + if (!max8660_dev_present) + return -1; + /* outof range */ + if (reg_name < REG_MAX8660_OUTPUT_ENABLE_1 + || reg_name > REG_MAX8660_FORCE_PWM) + return -1; + *value = + max8660_reg_value_table[reg_name - REG_MAX8660_OUTPUT_ENABLE_1]; + return 0; +} +int max8660_save_buffered_reg_val(int reg_name, u8 value) +{ + + /* outof range */ + if (reg_name < REG_MAX8660_OUTPUT_ENABLE_1 + || reg_name > REG_MAX8660_FORCE_PWM) + return -1; + max8660_reg_value_table[reg_name - REG_MAX8660_OUTPUT_ENABLE_1] = value; + return 0; +} + +int max8660_write_reg(u8 reg, u8 value) +{ + if (max8660_dev_present && (i2c_smbus_write_byte_data( + max8660_i2c_client, reg, value) >= 0)) + return 0; + return -1; +} + +/*! + * max8660 I2C attach function + * + * @param adapter struct i2c_client * + * @return 0 for max8660 successfully detected + */ +static int max8660_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int retval; + max8660_i2c_client = client; + retval = i2c_smbus_write_byte_data(max8660_i2c_client, + MAX8660_OUTPUT_ENABLE_1, 0); + if (retval == 0) { + max8660_dev_present = 1; + pr_info("max8660 probed !\n"); + } else { + max8660_dev_present = 0; + pr_info("max8660 not detected!\n"); + } + return retval; +} + +/*! + * max8660 I2C detach function + * + * @param client struct i2c_client * + * @return 0 + */ +static int max8660_remove(struct i2c_client *client) +{ + return 0; +} + +static const struct i2c_device_id max8660_id[] = { + { "max8660", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, max8660_id); + +static struct i2c_driver max8660_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "max8660",}, + .probe = max8660_probe, + .remove = max8660_remove, + .id_table = max8660_id, +}; + +/* called by pmic core when init*/ +int max8660_init(void) +{ + int err; + err = i2c_add_driver(&max8660_i2c_driver); + return err; +} +void max8660_exit(void) +{ + i2c_del_driver(&max8660_i2c_driver); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/mcu_pmic_gpio.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/mcu_pmic_gpio.c @@ -0,0 +1,131 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc9s08dz60/mcu_pmic_gpio.c + * @brief This is the main file of mc9s08dz60 Power Control driver. + * + * @ingroup PMIC_POWER + */ + +/* + * Includes + */ +#include +#include +#include +#include + +#define SET_BIT_IN_BYTE(byte, pos) (byte |= (0x01 << pos)) +#define CLEAR_BIT_IN_BYTE(byte, pos) (byte &= ~(0x01 << pos)) + +int pmic_gpio_set_bit_val(int reg, unsigned int bit, + unsigned int val) +{ + int reg_name; + u8 reg_mask = 0; + + if (bit > 7) + return -1; + + switch (reg) { + case MCU_GPIO_REG_RESET_1: + reg_name = REG_MCU_RESET_1; + break; + case MCU_GPIO_REG_RESET_2: + reg_name = REG_MCU_RESET_2; + break; + case MCU_GPIO_REG_POWER_CONTROL: + reg_name = REG_MCU_POWER_CTL; + break; + case MCU_GPIO_REG_GPIO_CONTROL_1: + reg_name = REG_MCU_GPIO_1; + break; + case MCU_GPIO_REG_GPIO_CONTROL_2: + reg_name = REG_MCU_GPIO_2; + break; + default: + return -1; + } + + SET_BIT_IN_BYTE(reg_mask, bit); + if (0 == val) + CHECK_ERROR(mcu_pmic_write_reg(reg_name, 0, reg_mask)); + else + CHECK_ERROR(mcu_pmic_write_reg(reg_name, reg_mask, reg_mask)); + + return 0; +} +EXPORT_SYMBOL(pmic_gpio_set_bit_val); + +int pmic_gpio_get_bit_val(int reg, unsigned int bit, + unsigned int *val) +{ + int reg_name; + unsigned int reg_read_val; + u8 reg_mask = 0; + + if (bit > 7) + return -1; + + switch (reg) { + case MCU_GPIO_REG_RESET_1: + reg_name = REG_MCU_RESET_1; + break; + case MCU_GPIO_REG_RESET_2: + reg_name = REG_MCU_RESET_2; + break; + case MCU_GPIO_REG_POWER_CONTROL: + reg_name = REG_MCU_POWER_CTL; + break; + case MCU_GPIO_REG_GPIO_CONTROL_1: + reg_name = REG_MCU_GPIO_1; + break; + case MCU_GPIO_REG_GPIO_CONTROL_2: + reg_name = REG_MCU_GPIO_2; + break; + default: + return -1; + } + + SET_BIT_IN_BYTE(reg_mask, bit); + CHECK_ERROR(mcu_pmic_read_reg(reg_name, ®_read_val, reg_mask)); + if (0 == reg_read_val) + *val = 0; + else + *val = 1; + + return 0; +} +EXPORT_SYMBOL(pmic_gpio_get_bit_val); + +int pmic_gpio_get_designation_bit_val(unsigned int bit, + unsigned int *val) +{ + unsigned int reg_read_val; + u8 reg_mask = 0; + + if (bit > 7) + return -1; + + SET_BIT_IN_BYTE(reg_mask, bit); + CHECK_ERROR( + mcu_pmic_read_reg(REG_MCU_DES_FLAG, ®_read_val, reg_mask)); + if (0 == reg_read_val) + *val = 0; + else + *val = 1; + + return 0; +} +EXPORT_SYMBOL(pmic_gpio_get_designation_bit_val); --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/max8660.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/max8660.h @@ -0,0 +1,49 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file max8660.h + * @brief Driver for max8660 + * + * @ingroup pmic + */ +#ifndef _MAX8660_H_ +#define _MAX8660_H_ + +#ifdef __KERNEL__ + +#define MAX8660_OUTPUT_ENABLE_1 0x10 +#define MAX8660_OUTPUT_ENABLE_2 0x12 +#define MAX8660_VOLT_CHANGE_CONTROL 0x20 +#define MAX8660_V3_TARGET_VOLT_1 0x23 +#define MAX8660_V3_TARGET_VOLT_2 0x24 +#define MAX8660_V4_TARGET_VOLT_1 0x29 +#define MAX8660_V4_TARGET_VOLT_2 0x2A +#define MAX8660_V5_TARGET_VOLT_1 0x32 +#define MAX8660_V5_TARGET_VOLT_2 0x33 +#define MAX8660_V6V7_TARGET_VOLT 0x39 +#define MAX8660_FORCE_PWM 0x80 + +int is_max8660_present(void); +int max8660_write_reg(u8 reg, u8 value); +int max8660_save_buffered_reg_val(int reg_name, u8 value); +int max8660_get_buffered_reg_val(int reg_name, u8 *value); +int max8660_init(void); +void max8660_exit(void); + +extern int reg_max8660_probe(void); +extern int reg_max8660_remove(void); + +#endif /* __KERNEL__ */ + +#endif /* _MAX8660_H_ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/Kconfig @@ -0,0 +1,17 @@ +# +# PMIC Modules configuration +# + +config MXC_PMIC_MC9S08DZ60 + tristate "MC9S08DZ60 PMIC" + depends on ARCH_MXC && I2C + ---help--- + This is the MXC MC9S08DZ60(MCU) PMIC support. + +config MXC_MC9SDZ60_RTC + tristate "MC9SDZ60 Real Time Clock (RTC) support" + depends on MXC_PMIC_MC9SDZ60 + ---help--- + This is the MC9SDZ60 RTC module driver. This module provides kernel API + for RTC part of MC9SDZ60. + If you want MC9SDZ60 RTC support, you should say Y here --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/mc9s08dz60.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/mc9s08dz60.h @@ -0,0 +1,73 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc9s08dz60.h + * @brief Driver for mc9s08dz60 + * + * @ingroup pmic + */ +#ifndef _MC9SDZ60_H_ +#define _MC9SDZ60_H_ + +#define MCU_VERSION 0x00 +/*#define Reserved 0x01*/ +#define MCU_SECS 0x02 +#define MCU_MINS 0x03 +#define MCU_HRS 0x04 +#define MCU_DAY 0x05 +#define MCU_DATE 0x06 +#define MCU_MONTH 0x07 +#define MCU_YEAR 0x08 + +#define MCU_ALARM_SECS 0x09 +#define MCU_ALARM_MINS 0x0A +#define MCU_ALARM_HRS 0x0B +/* #define Reserved 0x0C*/ +/* #define Reserved 0x0D*/ +#define MCU_TS_CONTROL 0x0E +#define MCU_X_LOW 0x0F +#define MCU_Y_LOW 0x10 +#define MCU_XY_HIGH 0x11 +#define MCU_X_LEFT_LOW 0x12 +#define MCU_X_LEFT_HIGH 0x13 +#define MCU_X_RIGHT 0x14 +#define MCU_Y_TOP_LOW 0x15 +#define MCU_Y_TOP_HIGH 0x16 +#define MCU_Y_BOTTOM 0x17 +/* #define Reserved 0x18*/ +/* #define Reserved 0x19*/ +#define MCU_RESET_1 0x1A +#define MCU_RESET_2 0x1B +#define MCU_POWER_CTL 0x1C +#define MCU_DELAY_CONFIG 0x1D +/* #define Reserved 0x1E */ +/* #define Reserved 0x1F */ +#define MCU_GPIO_1 0x20 +#define MCU_GPIO_2 0x21 +#define MCU_KPD_1 0x22 +#define MCU_KPD_2 0x23 +#define MCU_KPD_CONTROL 0x24 +#define MCU_INT_ENABLE_1 0x25 +#define MCU_INT_ENABLE_2 0x26 +#define MCU_INT_FLAG_1 0x27 +#define MCU_INT_FLAG_2 0x28 +#define MCU_DES_FLAG 0x29 +int mc9s08dz60_read_reg(u8 reg, u8 *value); +int mc9s08dz60_write_reg(u8 reg, u8 value); +int mc9s08dz60_init(void); +void mc9s08dz60_exit(void); + +extern int reg_mc9s08dz60_probe(void); +extern int reg_mc9s08dz60_remove(void); + +#endif /* _MC9SDZ60_H_ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/mc9s08dz60.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/mc9s08dz60.c @@ -0,0 +1,197 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file mc9s08dz60.c + * @brief Driver for MC9sdz60 + * + * @ingroup pmic + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "mc9s08dz60.h" + +/* I2C bus id and device address of mcu */ +#define I2C1_BUS 0 +#define MC9S08DZ60_I2C_ADDR 0xD2 /* 7bits I2C address */ +static struct i2c_client *mc9s08dz60_i2c_client; + +int mc9s08dz60_read_reg(u8 reg, u8 *value) +{ + *value = (u8) i2c_smbus_read_byte_data(mc9s08dz60_i2c_client, reg); + return 0; +} + +int mc9s08dz60_write_reg(u8 reg, u8 value) +{ + if (i2c_smbus_write_byte_data(mc9s08dz60_i2c_client, reg, value) < 0) + return -1; + return 0; +} + +static ssize_t mc9s08dz60_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned int i; + u8 value; + int offset = 7; + + for (i = 0; i < 7; i++) { + mc9s08dz60_read_reg(i, &value); + pr_info("reg%02x: %02x\t", i, value); + mc9s08dz60_read_reg(i + offset, &value); + pr_info("reg%02x: %02x\t", i + offset, value); + mc9s08dz60_read_reg(i + offset * 2, &value); + pr_info("reg%02x: %02x\t", i + offset * 2, value); + mc9s08dz60_read_reg(i + offset * 3, &value); + pr_info("reg%02x: %02x\t", i + offset * 3, value); + mc9s08dz60_read_reg(i + offset * 4, &value); + pr_info("reg%02x: %02x\t", i + offset * 4, value); + mc9s08dz60_read_reg(i + offset * 5, &value); + pr_info("reg%02x: %02x\n", i + offset * 5, value); + } + + return 0; +} + +static ssize_t mc9s08dz60_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + int ret; + unsigned long reg, new_value; + u8 value; + char *p; + + strict_strtoul(buf, 16, ®); + + p = NULL; + p = memchr(buf, ' ', count); + + if (p == NULL) { + mc9s08dz60_read_reg(reg, &value); + pr_info("reg%02lu: %06x\n", reg, value); + return count; + } + + p += 1; + + strict_strtoul(p, 16, &new_value); + value = new_value; + + ret = mc9s08dz60_write_reg((u8)reg, value); + if (ret == 0) + pr_info("write reg%02lx: %06x\n", reg, value); + else + pr_info("register update failed\n"); + + return count; +} + +static struct device_attribute mc9s08dz60_dev_attr = { + .attr = { + .name = "mc9s08dz60_ctl", + .mode = S_IRUSR | S_IWUSR, + }, + .show = mc9s08dz60_show, + .store = mc9s08dz60_store, +}; + + +/*! + * mc9s08dz60 I2C attach function + * + * @param adapter struct i2c_adapter * + * @return 0 + */ +static int mc9s08dz60_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret = 0; + struct mc9s08dz60 *mc9s08dz60 = NULL; + struct mc9s08dz60_platform_data *plat_data = client->dev.platform_data; + pr_info("mc9s08dz60 probing .... \n"); + + mc9s08dz60 = kzalloc(sizeof(struct mc9s08dz60), GFP_KERNEL); + if (mc9s08dz60 == NULL) + return -ENOMEM; + + i2c_set_clientdata(client, mc9s08dz60); + mc9s08dz60->dev = &client->dev; + mc9s08dz60->i2c_client = client; + + if (plat_data && plat_data->init) { + ret = plat_data->init(mc9s08dz60); + if (ret != 0) + return -1; + } + + ret = device_create_file(&client->dev, &mc9s08dz60_dev_attr); + if (ret) + dev_err(&client->dev, "create device file failed!\n"); + + + mc9s08dz60_i2c_client = client; + + return 0; +} + +/*! + * mc9s08dz60 I2C detach function + * + * @param client struct i2c_client * + * @return 0 + */ +static int mc9s08dz60_remove(struct i2c_client *client) +{ + return 0; +} + +static const struct i2c_device_id mc9s08dz60_id[] = { + { "mc9s08dz60", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, mc9s08dz60_id); + +static struct i2c_driver mc9s08dz60_i2c_driver = { + .driver = {.owner = THIS_MODULE, + .name = "mc9s08dz60", + }, + .probe = mc9s08dz60_probe, + .remove = mc9s08dz60_remove, + .id_table = mc9s08dz60_id, +}; + +#define SET_BIT_IN_BYTE(byte, pos) (byte |= (0x01 << pos)) +#define CLEAR_BIT_IN_BYTE(byte, pos) (byte &= ~(0x01 << pos)) + +int mc9s08dz60_init(void) +{ + int err; + err = i2c_add_driver(&mc9s08dz60_i2c_driver); + return err; +} +void mc9s08dz60_exit(void) +{ + i2c_del_driver(&mc9s08dz60_i2c_driver); +} --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the mc9sdz60 pmic drivers. +# + +obj-$(CONFIG_MXC_PMIC_MC9SDZ60) += pmic_mc9sdz60_mod.o +pmic_mc9sdz60_mod-objs := mcu_pmic_core.o max8660.o mc9s08dz60.o mcu_pmic_gpio.o --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/mcu_pmic_core.h +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/mcu_pmic_core.h @@ -0,0 +1,43 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mcu_pmic_core.h + * @brief Driver for max8660 + * + * @ingroup pmic + */ +#ifndef _MCU_PMIC_CORE_H_ +#define _MCU_PMIC_CORE_H_ + +#include + +#define MAX8660_REG_START (REG_MCU_DES_FLAG + 1) +enum { + + /* reg names for max8660 */ + REG_MAX8660_OUTPUT_ENABLE_1 = MAX8660_REG_START, + REG_MAX8660_OUTPUT_ENABLE_2, + REG_MAX8660_VOLT_CHANGE_CONTROL_1, + REG_MAX8660_V3_TARGET_VOLT_1, + REG_MAX8660_V3_TARGET_VOLT_2, + REG_MAX8660_V4_TARGET_VOLT_1, + REG_MAX8660_V4_TARGET_VOLT_2, + REG_MAX8660_V5_TARGET_VOLT_1, + REG_MAX8660_V5_TARGET_VOLT_2, + REG_MAX8660_V6V7_TARGET_VOLT, + REG_MAX8660_FORCE_PWM +}; + + +#endif /* _MCU_PMIC_CORE_H_ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mxc/mcu_pmic/mcu_pmic_core.c +++ linux-fsl-imx51-2.6.31/drivers/mxc/mcu_pmic/mcu_pmic_core.c @@ -0,0 +1,226 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc9s08dz60/mcu_pmic_core.c + * @brief This is the main file of mc9s08dz60 Power Control driver. + * + * @ingroup PMIC_POWER + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mcu_pmic_core.h" +#include "mc9s08dz60.h" +#include "max8660.h" + +/* bitfield macros for mcu pmic*/ +#define SET_BIT_IN_BYTE(byte, pos) (byte |= (0x01 << pos)) +#define CLEAR_BIT_IN_BYTE(byte, pos) (byte &= ~(0x01 << pos)) + + +/* map reg names (enum pmic_reg in pmic_external.h) to real addr*/ +const static u8 mcu_pmic_reg_addr_table[] = { + MCU_VERSION, + MCU_SECS, + MCU_MINS, + MCU_HRS, + MCU_DAY, + MCU_DATE, + MCU_MONTH, + MCU_YEAR, + MCU_ALARM_SECS, + MCU_ALARM_MINS, + MCU_ALARM_HRS, + MCU_TS_CONTROL, + MCU_X_LOW, + MCU_Y_LOW, + MCU_XY_HIGH, + MCU_X_LEFT_LOW, + MCU_X_LEFT_HIGH, + MCU_X_RIGHT, + MCU_Y_TOP_LOW, + MCU_Y_TOP_HIGH, + MCU_Y_BOTTOM, + MCU_RESET_1, + MCU_RESET_2, + MCU_POWER_CTL, + MCU_DELAY_CONFIG, + MCU_GPIO_1, + MCU_GPIO_2, + MCU_KPD_1, + MCU_KPD_2, + MCU_KPD_CONTROL, + MCU_INT_ENABLE_1, + MCU_INT_ENABLE_2, + MCU_INT_FLAG_1, + MCU_INT_FLAG_2, + MCU_DES_FLAG, + MAX8660_OUTPUT_ENABLE_1, + MAX8660_OUTPUT_ENABLE_2, + MAX8660_VOLT_CHANGE_CONTROL, + MAX8660_V3_TARGET_VOLT_1, + MAX8660_V3_TARGET_VOLT_2, + MAX8660_V4_TARGET_VOLT_1, + MAX8660_V4_TARGET_VOLT_2, + MAX8660_V5_TARGET_VOLT_1, + MAX8660_V5_TARGET_VOLT_2, + MAX8660_V6V7_TARGET_VOLT, + MAX8660_FORCE_PWM +}; + +static int mcu_pmic_read(int reg_num, unsigned int *reg_val) +{ + int ret; + u8 value = 0; + /* mcu ops */ + if (reg_num >= REG_MCU_VERSION && reg_num <= REG_MCU_DES_FLAG) + ret = mc9s08dz60_read_reg(mcu_pmic_reg_addr_table[reg_num], + &value); + else if (reg_num >= REG_MAX8660_OUTPUT_ENABLE_1 + && reg_num <= REG_MAX8660_FORCE_PWM) + ret = max8660_get_buffered_reg_val(reg_num, &value); + else + return -1; + + if (ret < 0) + return -1; + *reg_val = value; + + return 0; +} + +static int mcu_pmic_write(int reg_num, const unsigned int reg_val) +{ + int ret; + u8 value = reg_val; + /* mcu ops */ + if (reg_num >= REG_MCU_VERSION && reg_num <= REG_MCU_DES_FLAG) { + + ret = + mc9s08dz60_write_reg( + mcu_pmic_reg_addr_table[reg_num], value); + if (ret < 0) + return -1; + } else if (reg_num >= REG_MAX8660_OUTPUT_ENABLE_1 + && reg_num <= REG_MAX8660_FORCE_PWM) { + ret = + max8660_write_reg(mcu_pmic_reg_addr_table[reg_num], value); + + if (ret < 0) + return -1; + + ret = max8660_save_buffered_reg_val(reg_num, value); + } else + return -1; + + return 0; +} + +int mcu_pmic_read_reg(int reg, unsigned int *reg_value, + unsigned int reg_mask) +{ + int ret = 0; + unsigned int temp = 0; + + ret = mcu_pmic_read(reg, &temp); + if (ret != 0) + return -1; + *reg_value = (temp & reg_mask); + + pr_debug("Read REG[ %d ] = 0x%x\n", reg, *reg_value); + + return ret; +} + + +int mcu_pmic_write_reg(int reg, unsigned int reg_value, + unsigned int reg_mask) +{ + int ret = 0; + unsigned int temp = 0; + + ret = mcu_pmic_read(reg, &temp); + if (ret != 0) + return -1; + temp = (temp & (~reg_mask)) | reg_value; + + ret = mcu_pmic_write(reg, temp); + if (ret != 0) + return -1; + + pr_debug("Write REG[ %d ] = 0x%x\n", reg, reg_value); + + return ret; +} + +/*! + * make max8660 - mc9s08dz60 enter low-power mode + */ +static void pmic_power_off(void) +{ + mcu_pmic_write_reg(REG_MCU_POWER_CTL, 0x10, 0x10); +} + +static int __init mcu_pmic_init(void) +{ + int err; + + /* init chips */ + err = max8660_init(); + if (err) + goto fail1; + + err = mc9s08dz60_init(); + if (err) + goto fail1; + + if (is_max8660_present()) { + pr_info("max8660 is present \n"); + pm_power_off = pmic_power_off; + } else + pr_debug("max8660 is not present\n"); + pr_info("mcu_pmic_init completed!\n"); + return 0; + +fail1: + pr_err("mcu_pmic_init failed!\n"); + return err; +} + +static void __exit mcu_pmic_exit(void) +{ + reg_max8660_remove(); + mc9s08dz60_exit(); + max8660_exit(); +} + +subsys_initcall_sync(mcu_pmic_init); +module_exit(mcu_pmic_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("mcu pmic driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/ssb/sprom.c +++ linux-fsl-imx51-2.6.31/drivers/ssb/sprom.c @@ -13,6 +13,8 @@ #include "ssb_private.h" +#include + static const struct ssb_sprom *fallback_sprom; @@ -33,17 +35,27 @@ static int hex2sprom(u16 *sprom, const char *dump, size_t len, size_t sprom_size_words) { - char tmp[5] = { 0 }; - int cnt = 0; + char c, tmp[5] = { 0 }; + int err, cnt = 0; unsigned long parsed; - if (len < sprom_size_words * 2) + /* Strip whitespace at the end. */ + while (len) { + c = dump[len - 1]; + if (!isspace(c) && c != '\0') + break; + len--; + } + /* Length must match exactly. */ + if (len != sprom_size_words * 4) return -EINVAL; while (cnt < sprom_size_words) { memcpy(tmp, dump, 4); dump += 4; - parsed = simple_strtoul(tmp, NULL, 16); + err = strict_strtoul(tmp, 16, &parsed); + if (err) + return err; sprom[cnt++] = swab16((u16)parsed); } --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/toshiba_acpi.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/toshiba_acpi.c @@ -28,13 +28,28 @@ * engineering the Windows drivers * Yasushi Nagato - changes for linux kernel 2.4 -> 2.5 * Rob Miller - TV out and hotkeys help + * Daniel Silverstone - Punting of hotkeys via acpi using a thread * + * PLEASE NOTE + * + * This is an experimental version of toshiba_acpi which includes emulation + * of the original toshiba driver's /proc/toshiba and /dev/toshiba, + * allowing Toshiba userspace utilities to work. The relevant code was + * based on toshiba.c (copyright 1996-2001 Jonathan A. Buzzard) and + * incorporated into this driver with help from Gintautas Miliauskas, + * Charles Schwieters, and Christoph Burger-Scheidlin. + * + * Caveats: + * * hotkey status in /proc/toshiba is not implemented + * * to make accesses to /dev/toshiba load this driver instead of + * the original driver, you will have to modify your module + * auto-loading configuration * * TODO * */ -#define TOSHIBA_ACPI_VERSION "0.19" +#define TOSHIBA_ACPI_VERSION "0.19-dev-acpikeys" #define PROC_INTERFACE_VERSION 1 #include @@ -42,9 +57,15 @@ #include #include #include +#include +#include +#include +#include #include #include #include +#include +#include #include @@ -356,6 +377,11 @@ static int force_fan; static int last_key_event; static int key_event_valid; +static int hotkeys_over_acpi = 1; +static int hotkeys_check_per_sec = 2; + +module_param(hotkeys_over_acpi, uint, 0400); +module_param(hotkeys_check_per_sec, uint, 0400); typedef struct _ProcItem { const char *name; @@ -583,27 +609,34 @@ u32 hci_result; u32 value; - if (!key_event_valid) { - hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result); - if (hci_result == HCI_SUCCESS) { - key_event_valid = 1; - last_key_event = value; - } else if (hci_result == HCI_EMPTY) { - /* better luck next time */ - } else if (hci_result == HCI_NOT_SUPPORTED) { - /* This is a workaround for an unresolved issue on - * some machines where system events sporadically - * become disabled. */ - hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result); - printk(MY_NOTICE "Re-enabled hotkeys\n"); - } else { - printk(MY_ERR "Error reading hotkey status\n"); - goto end; + if (!hotkeys_over_acpi) { + if (!key_event_valid) { + hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result); + if (hci_result == HCI_SUCCESS) { + key_event_valid = 1; + last_key_event = value; + } else if (hci_result == HCI_EMPTY) { + /* better luck next time */ + } else if (hci_result == HCI_NOT_SUPPORTED) { + /* This is a workaround for an + * unresolved issue on some machines + * where system events sporadically + * become disabled. */ + hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result); + printk(MY_NOTICE "Re-enabled hotkeys\n"); + } else { + printk(MY_ERR "Error reading hotkey status\n"); + goto end; + } } + } else { + key_event_valid = 0; + last_key_event = 0; } p += sprintf(p, "hotkey_ready: %d\n", key_event_valid); p += sprintf(p, "hotkey: 0x%04x\n", last_key_event); + p += sprintf(p, "hotkeys_via_acpi: %d\n", hotkeys_over_acpi); end: return p; @@ -630,6 +663,191 @@ return p; } +/* /dev/toshiba and /proc/toshiba handlers {{{ + * + * ISSUE: lots of magic numbers and mysterious code + */ + +#define TOSH_MINOR_DEV 181 +#define OLD_PROC_TOSHIBA "toshiba" + +static int +tosh_acpi_bridge(SMMRegisters* regs) +{ + acpi_status status; + + /* assert(sizeof(SMMRegisters) == sizeof(u32)*HCI_WORDS); */ + status = hci_raw((u32*)regs, (u32*)regs); + if (status == AE_OK && (regs->eax & 0xff00) == HCI_SUCCESS) + return 0; + + return -EINVAL; +} + +static int +tosh_ioctl(struct inode* ip, struct file* fp, unsigned int cmd, + unsigned long arg) +{ + SMMRegisters regs; + unsigned short ax,bx; + int err; + + if ((!arg) || (cmd != TOSH_SMM)) + return -EINVAL; + + if (copy_from_user(®s, (SMMRegisters*)arg, sizeof(SMMRegisters))) + return -EFAULT; + + ax = regs.eax & 0xff00; + bx = regs.ebx & 0xffff; + + /* block HCI calls to read/write memory & PCI devices */ + if (((ax==HCI_SET) || (ax==HCI_GET)) && (bx>0x0069)) + return -EINVAL; + + err = tosh_acpi_bridge(®s); + + if (copy_to_user((SMMRegisters*)arg, ®s, sizeof(SMMRegisters))) + return -EFAULT; + + return err; +} + +static int +tosh_get_machine_id(void __iomem *bios) +{ + int id; + unsigned short bx,cx; + unsigned long address; + + id = (0x100*(int) readb(bios+0xfffe))+((int) readb(bios+0xfffa)); + + /* do we have a SCTTable machine identication number on our hands */ + if (id==0xfc2f) { + bx = 0xe6f5; /* cheat */ + /* now twiddle with our pointer a bit */ + address = 0x00000000 + bx; + cx = readw(bios + address); + address = 0x00000009 + bx + cx; + cx = readw(bios + address); + address = 0x0000000a + cx; + cx = readw(bios + address); + /* now construct our machine identification number */ + id = ((cx & 0xff)<<8)+((cx & 0xff00)>>8); + } + + return id; +} + +static int tosh_id; +static int tosh_bios; +static int tosh_date; +static int tosh_sci; + +static struct file_operations tosh_fops = { + .owner = THIS_MODULE, + .ioctl = tosh_ioctl +}; + +static struct miscdevice tosh_device = { + TOSH_MINOR_DEV, + "toshiba", + &tosh_fops +}; + +static void +setup_tosh_info(void __iomem *bios) +{ + int major, minor; + int day, month, year; + + tosh_id = tosh_get_machine_id(bios); + + /* get the BIOS version */ + major = readb(bios + 0xe009)-'0'; + minor = ((readb(bios + 0xe00b)-'0')*10)+(readb(bios + 0xe00c)-'0'); + tosh_bios = (major*0x100)+minor; + + /* get the BIOS date */ + day = ((readb(bios + 0xfff5)-'0')*10)+(readb(bios + 0xfff6)-'0'); + month = ((readb(bios + 0xfff8)-'0')*10)+(readb(bios + 0xfff9)-'0'); + year = ((readb(bios + 0xfffb)-'0')*10)+(readb(bios + 0xfffc)-'0'); + tosh_date = (((year-90) & 0x1f)<<10) | ((month & 0xf)<<6) + | ((day & 0x1f)<<1); +} + +/* /proc/toshiba read handler */ +static int +tosh_proc_show(struct seq_file *m, void *v) +{ + /* TODO: tosh_fn_status() */ + int key = 0; + + /* Format: + * 0) Linux driver version (this will change if format changes) + * 1) Machine ID + * 2) SCI version + * 3) BIOS version (major, minor) + * 4) BIOS date (in SCI date format) + * 5) Fn Key status + */ + + seq_printf(m, "1.1 0x%04x %d.%d %d.%d 0x%04x 0x%02x\n", + tosh_id, + (tosh_sci & 0xff00)>>8, + tosh_sci & 0xff, + (tosh_bios & 0xff00)>>8, + tosh_bios & 0xff, + tosh_date, + key); + + return 0; +} + +static int tosh_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, tosh_proc_show, NULL); +} + +static const struct file_operations tosh_proc_fops = { + .owner = THIS_MODULE, + .open = tosh_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init +old_driver_emulation_init(void) +{ + int status; + void __iomem *bios = ioremap(0xf0000, 0x10000); + if (!bios) + return -ENOMEM; + + if ((status = misc_register(&tosh_device))) { + printk(MY_ERR "failed to register misc device %d (\"%s\")\n", + tosh_device.minor, tosh_device.name); + return status; + } + + setup_tosh_info(bios); + proc_create(OLD_PROC_TOSHIBA, 0, NULL, &tosh_proc_fops); + + iounmap(bios); + + return 0; +} + +static void __exit +old_driver_emulation_exit(void) +{ + remove_proc_entry(OLD_PROC_TOSHIBA, NULL); + misc_deregister(&tosh_device); +} + +/* }}} end of /dev/toshiba and /proc/toshiba handlers */ + /* proc and module init */ @@ -676,6 +894,133 @@ .update_status = set_lcd_status, }; +static struct semaphore thread_sem; +static int thread_should_die; + +static struct acpi_device *threaded_device = 0; + +static void thread_deliver_button_event(u32 value) +{ + if (!threaded_device) return; + if( value == 0x0100 ) { + /* Ignore FN on its own */ + } else if( value & 0x80 ) { + acpi_bus_generate_proc_event( threaded_device, 1, value & ~0x80 ); + } else { + acpi_bus_generate_proc_event( threaded_device, 0, value ); + } +} + +static int toshiba_acpi_thread(void *data) +{ + int dropped = 0; + u32 hci_result, value; + + daemonize("ktoshkeyd"); + set_user_nice(current, 4); + thread_should_die = 0; + + up(&thread_sem); + + do { + /* In case we get stuck; we can rmmod the module here */ + if (thread_should_die) + break; + + hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result); + if (hci_result == HCI_SUCCESS) { + dropped++; + } else if (hci_result == HCI_EMPTY) { + /* better luck next time */ + } else if (hci_result == HCI_NOT_SUPPORTED) { + /* This is a workaround for an unresolved issue on + * some machines where system events sporadically + * become disabled. */ + hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result); + printk(MY_NOTICE "Re-enabled hotkeys\n"); + } + } while (hci_result != HCI_EMPTY); + + printk(MY_INFO "Dropped %d keys from the queue on startup\n", dropped); + + for (;;) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / hotkeys_check_per_sec); + + if (thread_should_die) + break; + + if (try_to_freeze()) + continue; + + do { + hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result); + if (hci_result == HCI_SUCCESS) { + thread_deliver_button_event(value); + } else if (hci_result == HCI_EMPTY) { + /* better luck next time */ + } else if (hci_result == HCI_NOT_SUPPORTED) { + /* This is a workaround for an + * unresolved issue on some machines + * where system events sporadically + * become disabled. */ + hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result); + printk(MY_NOTICE "Re-enabled hotkeys\n"); + } + } while (hci_result == HCI_SUCCESS); + } + set_user_nice(current, -20); /* Become nasty so we are cleaned up + * before the module exits making us oops */ + up(&thread_sem); + return 0; +} + +static int acpi_toshkeys_add (struct acpi_device *device) +{ + threaded_device = device; + strcpy(acpi_device_name(device), "Toshiba laptop hotkeys"); + strcpy(acpi_device_class(device), "hkey"); + return 0; +} + +static int acpi_toshkeys_remove (struct acpi_device *device, int type) +{ + if (threaded_device == device) + threaded_device = 0; + return 0; +} + +static const struct acpi_device_id acpi_toshkeys_ids[] = { + { "TOS6200", 0 }, + { "TOS6207", 0 }, + { "TOS6208", 0 }, + {"", 0} +}; + +static struct acpi_driver acpi_threaded_toshkeys = { + .name = "Toshiba laptop hotkeys driver", + .class = "hkey", + .ids = acpi_toshkeys_ids, + .ops = { + .add = acpi_toshkeys_add, + .remove = acpi_toshkeys_remove, + }, +}; + +static int __init init_threaded_acpi(void) +{ + acpi_status result = AE_OK; + result = acpi_bus_register_driver(&acpi_threaded_toshkeys); + if( result < 0 ) + printk(MY_ERR "Registration of toshkeys acpi device failed\n"); + return result; +} + +static void kill_threaded_acpi(void) +{ + acpi_bus_unregister_driver(&acpi_threaded_toshkeys); +} + static void toshiba_acpi_exit(void) { if (toshiba_acpi.bt_rfk) { @@ -686,11 +1031,19 @@ if (toshiba_backlight_device) backlight_device_unregister(toshiba_backlight_device); + if (hotkeys_over_acpi) { + thread_should_die = 1; + down(&thread_sem); + kill_threaded_acpi(); + } + remove_device(); if (toshiba_proc_dir) remove_proc_entry(PROC_TOSHIBA, acpi_root_dir); + old_driver_emulation_exit(); + platform_device_unregister(toshiba_acpi.p_dev); return; @@ -730,6 +1083,9 @@ return ret; } + if ((ret = old_driver_emulation_init())) + return ret; + force_fan = 0; key_event_valid = 0; @@ -762,6 +1118,26 @@ } toshiba_backlight_device->props.max_brightness = HCI_LCD_BRIGHTNESS_LEVELS - 1; + if (hotkeys_over_acpi && ACPI_SUCCESS(status)) { + printk(MY_INFO "Toshiba hotkeys are sent as ACPI events\n"); + if (hotkeys_check_per_sec < 1) + hotkeys_check_per_sec = 1; + if (hotkeys_check_per_sec > 10) + hotkeys_check_per_sec = 10; + printk(MY_INFO "ktoshkeyd will check %d time%s per second\n", + hotkeys_check_per_sec, hotkeys_check_per_sec==1?"":"s"); + if (init_threaded_acpi() >= 0) { + init_MUTEX_LOCKED(&thread_sem); + kernel_thread(toshiba_acpi_thread, NULL, CLONE_KERNEL); + down(&thread_sem); + } else { + remove_device(); + remove_proc_entry(PROC_TOSHIBA, acpi_root_dir); + status = AE_ERROR; + printk(MY_INFO "ktoshkeyd initialisation failed. Refusing to load module\n"); + } + } + /* Register rfkill switch for Bluetooth */ if (hci_get_bt_present(&bt_present) == HCI_SUCCESS && bt_present) { toshiba_acpi.bt_rfk = rfkill_alloc(toshiba_acpi.bt_name, --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/asus-laptop.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/asus-laptop.c @@ -1172,8 +1172,8 @@ hotk->ledd_status = 0xFFF; /* Set initial values of light sensor and level */ - hotk->light_switch = 1; /* Default to light sensor disabled */ - hotk->light_level = 0; /* level 5 for sensor sensitivity */ + hotk->light_switch = 0; /* Default to light sensor disabled */ + hotk->light_level = 5; /* level 5 for sensor sensitivity */ if (ls_switch_handle) set_light_sens_switch(hotk->light_switch); --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/thinkpad_acpi.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/thinkpad_acpi.c @@ -235,6 +235,7 @@ char param[32]; int (*init) (struct ibm_init_struct *); + mode_t base_procfs_mode; struct ibm_struct *data; }; @@ -3406,15 +3407,6 @@ #define TPACPI_RFK_BLUETOOTH_SW_NAME "tpacpi_bluetooth_sw" -static void bluetooth_suspend(pm_message_t state) -{ - /* Try to make sure radio will resume powered off */ - if (!acpi_evalf(NULL, NULL, "\\BLTH", "vd", - TP_ACPI_BLTH_PWR_OFF_ON_RESUME)) - vdbg_printk(TPACPI_DBG_RFKILL, - "bluetooth power down on resume request failed\n"); -} - static int bluetooth_get_status(void) { int status; @@ -3448,10 +3440,9 @@ #endif /* We make sure to keep TP_ACPI_BLUETOOTH_RESUMECTRL off */ + status = TP_ACPI_BLUETOOTH_RESUMECTRL; if (state == TPACPI_RFK_RADIO_ON) - status = TP_ACPI_BLUETOOTH_RADIOSSW; - else - status = 0; + status |= TP_ACPI_BLUETOOTH_RADIOSSW; if (!acpi_evalf(hkey_handle, NULL, "SBDC", "vd", status)) return -EIO; @@ -3590,7 +3581,6 @@ .read = bluetooth_read, .write = bluetooth_write, .exit = bluetooth_exit, - .suspend = bluetooth_suspend, .shutdown = bluetooth_shutdown, }; @@ -3608,15 +3598,6 @@ #define TPACPI_RFK_WWAN_SW_NAME "tpacpi_wwan_sw" -static void wan_suspend(pm_message_t state) -{ - /* Try to make sure radio will resume powered off */ - if (!acpi_evalf(NULL, NULL, "\\WGSV", "qvd", - TP_ACPI_WGSV_PWR_OFF_ON_RESUME)) - vdbg_printk(TPACPI_DBG_RFKILL, - "WWAN power down on resume request failed\n"); -} - static int wan_get_status(void) { int status; @@ -3649,11 +3630,10 @@ } #endif - /* We make sure to keep TP_ACPI_WANCARD_RESUMECTRL off */ + /* We make sure to set TP_ACPI_WANCARD_RESUMECTRL */ + status = TP_ACPI_WANCARD_RESUMECTRL; if (state == TPACPI_RFK_RADIO_ON) - status = TP_ACPI_WANCARD_RADIOSSW; - else - status = 0; + status |= TP_ACPI_WANCARD_RADIOSSW; if (!acpi_evalf(hkey_handle, NULL, "SWAN", "vd", status)) return -EIO; @@ -3791,7 +3771,6 @@ .read = wan_read, .write = wan_write, .exit = wan_exit, - .suspend = wan_suspend, .shutdown = wan_shutdown, }; @@ -4164,6 +4143,10 @@ return len; } + /* Even reads can crash X.org, so... */ + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + status = video_outputsw_get(); if (status < 0) return status; @@ -4197,6 +4180,10 @@ if (video_supported == TPACPI_VIDEO_NONE) return -ENODEV; + /* Even reads can crash X.org, let alone writes... */ + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + enable = 0; disable = 0; @@ -5655,16 +5642,16 @@ /* Models with ATI GPUs known to require ECNVRAM mode */ TPACPI_Q_IBM('1', 'Y', TPACPI_BRGHT_Q_EC), /* T43/p ATI */ - /* Models with ATI GPUs (waiting confirmation) */ - TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), + /* Models with ATI GPUs that can use ECNVRAM */ + TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_EC), TPACPI_Q_IBM('1', 'Q', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), TPACPI_Q_IBM('7', '8', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), - /* Models with Intel Extreme Graphics 2 (waiting confirmation) */ - TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC), - TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC), - TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC), + /* Models with Intel Extreme Graphics 2 */ + TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC), + TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), + TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC), /* Models with Intel GMA900 */ TPACPI_Q_IBM('7', '0', TPACPI_BRGHT_Q_NOEC), /* T43, R52 */ @@ -5863,7 +5850,7 @@ * Doing it this way makes the syscall restartable in case of EINTR */ rc = brightness_set(level); - return (rc == -EINTR)? ERESTARTSYS : rc; + return (rc == -EINTR)? -ERESTARTSYS : rc; } static struct ibm_struct brightness_driver_data = { @@ -7379,9 +7366,11 @@ "%s installed\n", ibm->name); if (ibm->read) { - entry = create_proc_entry(ibm->name, - S_IFREG | S_IRUGO | S_IWUSR, - proc_dir); + mode_t mode = iibm->base_procfs_mode; + + if (!mode) + mode = S_IRUGO; + entry = create_proc_entry(ibm->name, mode, proc_dir); if (!entry) { printk(TPACPI_ERR "unable to create proc entry %s\n", ibm->name); @@ -7577,6 +7566,7 @@ #ifdef CONFIG_THINKPAD_ACPI_VIDEO { .init = video_init, + .base_procfs_mode = S_IRUSR, .data = &video_driver_data, }, #endif --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/sony-laptop.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/sony-laptop.c @@ -1081,6 +1081,8 @@ struct rfkill *rfk; enum rfkill_type type; const char *name; + int result; + bool hwblock; switch (nc_type) { case SONY_WIFI: @@ -1108,6 +1110,10 @@ if (!rfk) return -ENOMEM; + sony_call_snc_handle(0x124, 0x200, &result); + hwblock = !(result & 0x1); + rfkill_set_hw_state(rfk, hwblock); + err = rfkill_register(rfk); if (err) { rfkill_destroy(rfk); @@ -1399,10 +1405,13 @@ u16 evport_offset; u8 has_camera; u8 has_bluetooth; - u8 has_wwan; struct sonypi_eventtypes *event_types; }; +struct sony_pic_quirk_entry { + u8 set_wwan_power; +}; + struct sony_pic_dev { struct device_ctrl *control; struct acpi_device *acpi_dev; @@ -1411,6 +1420,7 @@ struct list_head interrupts; struct list_head ioports; struct mutex lock; + struct sony_pic_quirk_entry *quirks; u8 camera_power; u8 bluetooth_power; u8 wwan_power; @@ -2844,6 +2854,12 @@ if (result) goto err_remove_pf; + if (spic_dev.quirks && spic_dev.quirks->set_wwan_power) { + /* + * Power isn't enabled by default. + */ + __sony_pic_set_wwanpower(1); + } return 0; err_remove_pf: @@ -2914,6 +2930,16 @@ }, }; +static struct sony_pic_quirk_entry sony_pic_vaio_vgn = { + .set_wwan_power = 1, +}; + +static int dmi_matched(const struct dmi_system_id *dmi) +{ + spic_dev.quirks = dmi->driver_data; + return 0; +} + static struct dmi_system_id __initdata sonypi_dmi_table[] = { { .ident = "Sony Vaio", @@ -2928,6 +2954,8 @@ DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), DMI_MATCH(DMI_PRODUCT_NAME, "VGN-"), }, + .callback = dmi_matched, + .driver_data = &sony_pic_vaio_vgn, }, { } }; --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/acerhdf.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/acerhdf.c @@ -52,7 +52,7 @@ */ #undef START_IN_KERNEL_MODE -#define DRV_VER "0.5.13" +#define DRV_VER "0.5.16" /* * According to the Atom N270 datasheet, @@ -61,7 +61,7 @@ * measured by the on-die thermal monitor are within 0 <= Tj <= 90. So, * assume 89°C is critical temperature. */ -#define ACERHDF_TEMP_CRIT 89 +#define ACERHDF_TEMP_CRIT 89000 #define ACERHDF_FAN_OFF 0 #define ACERHDF_FAN_AUTO 1 @@ -69,7 +69,7 @@ * No matter what value the user puts into the fanon variable, turn on the fan * at 80 degree Celsius to prevent hardware damage */ -#define ACERHDF_MAX_FANON 80 +#define ACERHDF_MAX_FANON 80000 /* * Maximum interval between two temperature checks is 15 seconds, as the die @@ -85,11 +85,12 @@ #endif static unsigned int interval = 10; -static unsigned int fanon = 63; -static unsigned int fanoff = 58; +static unsigned int fanon = 63000; +static unsigned int fanoff = 58000; static unsigned int verbose; static unsigned int fanstate = ACERHDF_FAN_AUTO; static char force_bios[16]; +static char force_product[16]; static unsigned int prev_interval; struct thermal_zone_device *thz_dev; struct thermal_cooling_device *cl_dev; @@ -107,34 +108,62 @@ MODULE_PARM_DESC(verbose, "Enable verbose dmesg output"); module_param_string(force_bios, force_bios, 16, 0); MODULE_PARM_DESC(force_bios, "Force BIOS version and omit BIOS check"); +module_param_string(force_product, force_product, 16, 0); +MODULE_PARM_DESC(force_product, "Force BIOS product and omit BIOS check"); + +/* + * cmd_off: to switch the fan completely off / to check if the fan is off + * cmd_auto: to set the BIOS in control of the fan. The BIOS regulates then + * the fan speed depending on the temperature + */ +struct fancmd { + u8 cmd_off; + u8 cmd_auto; +}; /* BIOS settings */ struct bios_settings_t { const char *vendor; + const char *product; const char *version; unsigned char fanreg; unsigned char tempreg; - unsigned char fancmd[2]; /* fan off and auto commands */ + struct fancmd cmd; }; /* Register addresses and values for different BIOS versions */ static const struct bios_settings_t bios_tbl[] = { - {"Acer", "v0.3109", 0x55, 0x58, {0x1f, 0x00} }, - {"Acer", "v0.3114", 0x55, 0x58, {0x1f, 0x00} }, - {"Acer", "v0.3301", 0x55, 0x58, {0xaf, 0x00} }, - {"Acer", "v0.3304", 0x55, 0x58, {0xaf, 0x00} }, - {"Acer", "v0.3305", 0x55, 0x58, {0xaf, 0x00} }, - {"Acer", "v0.3308", 0x55, 0x58, {0x21, 0x00} }, - {"Acer", "v0.3309", 0x55, 0x58, {0x21, 0x00} }, - {"Acer", "v0.3310", 0x55, 0x58, {0x21, 0x00} }, - {"Gateway", "v0.3103", 0x55, 0x58, {0x21, 0x00} }, - {"Packard Bell", "v0.3105", 0x55, 0x58, {0x21, 0x00} }, - {"", "", 0, 0, {0, 0} } + /* AOA110 */ + {"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x00} }, + {"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x00} }, + {"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0x00} }, + {"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0x00} }, + {"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0x00} }, + {"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0x00} }, + {"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x00} }, + {"Acer", "AOA110", "v0.3309", 0x55, 0x58, {0x21, 0x00} }, + {"Acer", "AOA110", "v0.3310", 0x55, 0x58, {0x21, 0x00} }, + /* AOA150 */ + {"Acer", "AOA150", "v0.3114", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3301", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3304", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3305", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3307", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3308", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3309", 0x55, 0x58, {0x20, 0x00} }, + {"Acer", "AOA150", "v0.3310", 0x55, 0x58, {0x20, 0x00} }, + /* special BIOS / other */ + {"Gateway", "AOA110", "v0.3103", 0x55, 0x58, {0x21, 0x00} }, + {"Gateway", "AOA150", "v0.3103", 0x55, 0x58, {0x20, 0x00} }, + {"Packard Bell", "DOA150", "v0.3104", 0x55, 0x58, {0x21, 0x00} }, + {"Packard Bell", "AOA110", "v0.3105", 0x55, 0x58, {0x21, 0x00} }, + {"Packard Bell", "AOA150", "v0.3105", 0x55, 0x58, {0x20, 0x00} }, + /* pewpew-terminator */ + {"", "", "", 0, 0, {0, 0} } }; static const struct bios_settings_t *bios_cfg __read_mostly; - static int acerhdf_get_temp(int *temp) { u8 read_temp; @@ -142,7 +171,7 @@ if (ec_read(bios_cfg->tempreg, &read_temp)) return -EINVAL; - *temp = read_temp; + *temp = read_temp * 1000; return 0; } @@ -150,13 +179,14 @@ static int acerhdf_get_fanstate(int *state) { u8 fan; - bool tmp; if (ec_read(bios_cfg->fanreg, &fan)) return -EINVAL; - tmp = (fan == bios_cfg->fancmd[ACERHDF_FAN_OFF]); - *state = tmp ? ACERHDF_FAN_OFF : ACERHDF_FAN_AUTO; + if (fan != bios_cfg->cmd.cmd_off) + *state = ACERHDF_FAN_AUTO; + else + *state = ACERHDF_FAN_OFF; return 0; } @@ -175,7 +205,8 @@ state = ACERHDF_FAN_AUTO; } - cmd = bios_cfg->fancmd[state]; + cmd = (state == ACERHDF_FAN_OFF) ? bios_cfg->cmd.cmd_off + : bios_cfg->cmd.cmd_auto; fanstate = state; ec_write(bios_cfg->fanreg, cmd); @@ -437,7 +468,7 @@ return 0; } -struct platform_driver acerhdf_drv = { +static struct platform_driver acerhdf_driver = { .driver = { .name = "acerhdf", .owner = THIS_MODULE, @@ -454,32 +485,40 @@ { char const *vendor, *version, *product; int i; + unsigned long prod_len = 0; /* get BIOS data */ vendor = dmi_get_system_info(DMI_SYS_VENDOR); version = dmi_get_system_info(DMI_BIOS_VERSION); product = dmi_get_system_info(DMI_PRODUCT_NAME); + pr_info("Acer Aspire One Fan driver, v.%s\n", DRV_VER); - if (!force_bios[0]) { - if (strncmp(product, "AO", 2)) { - pr_err("no Aspire One hardware found\n"); - return -EINVAL; - } - } else { - pr_info("forcing BIOS version: %s\n", version); + if (force_bios[0]) { version = force_bios; + pr_info("forcing BIOS version: %s\n", version); kernelmode = 0; } + if (force_product[0]) { + product = force_product; + pr_info("forcing BIOS product: %s\n", product); + kernelmode = 0; + } + + prod_len = strlen(product); + if (verbose) pr_info("BIOS info: %s %s, product: %s\n", vendor, version, product); /* search BIOS version and vendor in BIOS settings table */ for (i = 0; bios_tbl[i].version[0]; i++) { - if (!strcmp(bios_tbl[i].vendor, vendor) && + if (strlen(bios_tbl[i].product) >= prod_len && + !strncmp(bios_tbl[i].product, product, + strlen(bios_tbl[i].product)) && + !strcmp(bios_tbl[i].vendor, vendor) && !strcmp(bios_tbl[i].version, version)) { bios_cfg = &bios_tbl[i]; break; @@ -487,8 +526,8 @@ } if (!bios_cfg) { - pr_err("unknown (unsupported) BIOS version %s/%s, " - "please report, aborting!\n", vendor, version); + pr_err("unknown (unsupported) BIOS version %s/%s/%s, " + "please report, aborting!\n", vendor, product, version); return -EINVAL; } @@ -509,7 +548,7 @@ { int err = 0; - err = platform_driver_register(&acerhdf_drv); + err = platform_driver_register(&acerhdf_driver); if (err) return err; @@ -525,7 +564,7 @@ return; platform_device_del(acerhdf_dev); - platform_driver_unregister(&acerhdf_drv); + platform_driver_unregister(&acerhdf_driver); } static int acerhdf_register_thermal(void) @@ -594,9 +633,10 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Peter Feuerer"); MODULE_DESCRIPTION("Aspire One temperature and fan driver"); -MODULE_ALIAS("dmi:*:*Acer*:*:"); -MODULE_ALIAS("dmi:*:*Gateway*:*:"); -MODULE_ALIAS("dmi:*:*Packard Bell*:*:"); +MODULE_ALIAS("dmi:*:*Acer*:pnAOA*:"); +MODULE_ALIAS("dmi:*:*Gateway*:pnAOA*:"); +MODULE_ALIAS("dmi:*:*Packard Bell*:pnAOA*:"); +MODULE_ALIAS("dmi:*:*Packard Bell*:pnDOA*:"); module_init(acerhdf_init); module_exit(acerhdf_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/dell-laptop.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/dell-laptop.c @@ -22,9 +22,14 @@ #include #include #include +#include #include "../../firmware/dcdbas.h" #define BRIGHTNESS_TOKEN 0x7d +#define WLAN_SWITCH_MASK 0 +#define BT_SWITCH_MASK 1 +#define WWAN_SWITCH_MASK 2 +#define HW_SWITCH_MASK 16 /* This structure will be modified by the firmware when we enter * system management mode, hence the volatiles */ @@ -63,6 +68,13 @@ static struct rfkill *bluetooth_rfkill; static struct rfkill *wwan_rfkill; +/* + * RFkill status is maintained in software because the BIOS has an annoying + * habit of emitting a KEY_WLAN key press event before the BIOS state is updated, making + * dell_send_request() racy. + */ +static int hw_switch_status; + static const struct dmi_system_id __initdata dell_device_table[] = { { .ident = "Dell laptop", @@ -74,6 +86,54 @@ { } }; +static struct dmi_system_id __devinitdata dell_blacklist[] = { + /* BIOS always returns HW switch disabled */ + { + .ident = "Dell Vostro 1720", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1720"), + }, + }, + /* Supported by compal-laptop */ + { + .ident = "Dell Mini 9", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"), + }, + }, + { + .ident = "Dell Mini 10", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"), + }, + }, + { + .ident = "Dell Mini 10v", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"), + }, + }, + { + .ident = "Dell Inspiron 11z", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"), + }, + }, + { + .ident = "Dell Mini 12", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"), + }, + }, + {} +}; + static void parse_da_table(const struct dmi_header *dm) { /* Final token is a terminator, so we don't want to copy it */ @@ -180,10 +240,11 @@ int disable = blocked ? 1 : 0; unsigned long radio = (unsigned long)data; - memset(&buffer, 0, sizeof(struct calling_interface_buffer)); - buffer.input[0] = (1 | (radio<<8) | (disable << 16)); - dell_send_request(&buffer, 17, 11); - + if (!(hw_switch_status & BIT(radio-1)) || !(hw_switch_status & BIT(HW_SWITCH_MASK))) { + memset(&buffer, 0, sizeof(struct calling_interface_buffer)); + buffer.input[0] = (1 | (radio<<8) | (disable << 16)); + dell_send_request(&buffer, 17, 11); + } return 0; } @@ -191,14 +252,32 @@ { struct calling_interface_buffer buffer; int status; - int bit = (unsigned long)data + 16; + int bit = (unsigned long)data - 1; memset(&buffer, 0, sizeof(struct calling_interface_buffer)); dell_send_request(&buffer, 17, 11); status = buffer.output[1]; - if (status & BIT(bit)) - rfkill_set_hw_state(rfkill, !!(status & BIT(16))); + hw_switch_status |= (status & BIT(HW_SWITCH_MASK)) ^ BIT(HW_SWITCH_MASK); + + /* HW switch control not supported + explicitly set it to all 3 as they'll change in unison then */ + if (!(status & BIT(0))) + hw_switch_status |= BIT(WLAN_SWITCH_MASK) | BIT(BT_SWITCH_MASK) | (WWAN_SWITCH_MASK); + else { + /* rerun the query to see what is really supported */ + memset(&buffer, 0, sizeof(struct calling_interface_buffer)); + buffer.input[0] = 2; + dell_send_request(&buffer, 17, 11); + status = buffer.output[1]; + + hw_switch_status |= status & BIT(bit); + } + + if (hw_switch_status & BIT(bit)) + rfkill_set_hw_state(rfkill, hw_switch_status & BIT(HW_SWITCH_MASK)); + else + rfkill_set_hw_state(rfkill, 0); } static const struct rfkill_ops dell_rfkill_ops = { @@ -206,11 +285,35 @@ .query = dell_rfkill_query, }; +/* + * Called for each KEY_WLAN key press event. Note that a physical + * rf-kill switch change also causes the BIOS to emit a KEY_WLAN. + */ +static void dell_rfkill_update(void) +{ + hw_switch_status ^= BIT(HW_SWITCH_MASK); + if (wifi_rfkill && (hw_switch_status & BIT(WLAN_SWITCH_MASK))) { + rfkill_set_hw_state(wifi_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK)); + dell_rfkill_set((void*)1, rfkill_blocked(wifi_rfkill)); + } + + if (bluetooth_rfkill && (hw_switch_status & BIT(BT_SWITCH_MASK))) { + rfkill_set_hw_state(bluetooth_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK)); + dell_rfkill_set((void*)2, rfkill_blocked(bluetooth_rfkill)); + } + + if (wwan_rfkill && (hw_switch_status & BIT(WWAN_SWITCH_MASK))) { + rfkill_set_hw_state(wwan_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK)); + dell_rfkill_set((void*)3, rfkill_blocked(wwan_rfkill)); + } +} + static int dell_setup_rfkill(void) { struct calling_interface_buffer buffer; int status; int ret; + hw_switch_status = 0; memset(&buffer, 0, sizeof(struct calling_interface_buffer)); dell_send_request(&buffer, 17, 11); @@ -310,6 +413,90 @@ .update_status = dell_send_intensity, }; +static const struct input_device_id dell_input_ids[] = { + { + .bustype = 0x11, + .vendor = 0x01, + .product = 0x01, + .version = 0xab41, + .flags = INPUT_DEVICE_ID_MATCH_BUS | + INPUT_DEVICE_ID_MATCH_VENDOR | + INPUT_DEVICE_ID_MATCH_PRODUCT | + INPUT_DEVICE_ID_MATCH_VERSION + }, + { }, +}; + +static bool dell_input_filter(struct input_handle *handle, unsigned int type, + unsigned int code, int value) +{ + if (type == EV_KEY && code == KEY_WLAN && value == 1) { + dell_rfkill_update(); + return 1; + } + + return 0; +} + +static void dell_input_event(struct input_handle *handle, unsigned int type, + unsigned int code, int value) +{ +} + +static int dell_input_connect(struct input_handler *handler, + struct input_dev *dev, + const struct input_device_id *id) +{ + struct input_handle *handle; + int error; + + handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL); + if (!handle) + return -ENOMEM; + + handle->dev = dev; + handle->handler = handler; + handle->name = "dell-laptop"; + + error = input_register_handle(handle); + if (error) + goto err_free_handle; + + error = input_open_device(handle); + if (error) + goto err_unregister_handle; + + error = input_filter_device(handle); + if (error) + goto err_close_handle; + + return 0; + +err_close_handle: + input_close_device(handle); +err_unregister_handle: + input_unregister_handle(handle); +err_free_handle: + kfree(handle); + return error; +} + +static void dell_input_disconnect(struct input_handle *handle) +{ + input_close_device(handle); + input_unregister_handle(handle); + kfree(handle); +} + +static struct input_handler dell_input_handler = { + .name = "dell-laptop", + .filter = dell_input_filter, + .event = dell_input_event, + .connect = dell_input_connect, + .disconnect = dell_input_disconnect, + .id_table = dell_input_ids, +}; + static int __init dell_init(void) { struct calling_interface_buffer buffer; @@ -319,6 +506,12 @@ if (!dmi_check_system(dell_device_table)) return -ENODEV; + if (dmi_check_system(dell_blacklist)) { + printk(KERN_INFO "dell-laptop: Blacklisted hardware detected - " + "not loading\n"); + return -ENODEV; + } + dmi_walk(find_tokens, NULL); if (!da_tokens) { @@ -333,6 +526,10 @@ goto out; } + if (input_register_handler(&dell_input_handler)) + printk(KERN_INFO + "dell-laptop: Could not register input filter\n"); + #ifdef CONFIG_ACPI /* In the event of an ACPI backlight being available, don't * register the platform controller. @@ -388,6 +585,7 @@ rfkill_unregister(bluetooth_rfkill); if (wwan_rfkill) rfkill_unregister(wwan_rfkill); + input_unregister_handler(&dell_input_handler); } module_init(dell_init); --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/Kconfig @@ -290,9 +290,15 @@ server running, phase of the moon, and the current mood of Schroedinger's cat. If you can use X.org's RandR to control your ThinkPad's video output ports instead of this feature, - don't think twice: do it and say N here to save some memory. + don't think twice: do it and say N here to save memory and avoid + bad interactions with X.org. - If you are not sure, say Y here. + NOTE: access to this feature is limited to processes with the + CAP_SYS_ADMIN capability, to avoid local DoS issues in platforms + where it interacts badly with X.org. + + If you are not sure, say Y here but do try to check if you could + be using X.org RandR instead. config THINKPAD_ACPI_HOTKEY_POLL bool "Support NVRAM polling for hot keys" --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/dell-wmi.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/dell-wmi.c @@ -40,6 +40,10 @@ MODULE_ALIAS("wmi:"DELL_EVENT_GUID); +/* Temporary workaround until the WMI sysfs interface goes in. + Borrowed from acer-wmi */ +MODULE_ALIAS("dmi:*:*Dell*:*:"); + struct key_entry { char type; /* See KE_* below */ u16 code; --- linux-fsl-imx51-2.6.31.orig/drivers/platform/x86/compal-laptop.c +++ linux-fsl-imx51-2.6.31/drivers/platform/x86/compal-laptop.c @@ -26,17 +26,8 @@ /* * comapl-laptop.c - Compal laptop support. * - * This driver exports a few files in /sys/devices/platform/compal-laptop/: - * - * wlan - wlan subsystem state: contains 0 or 1 (rw) - * - * bluetooth - Bluetooth subsystem state: contains 0 or 1 (rw) - * - * raw - raw value taken from embedded controller register (ro) - * - * In addition to these platform device attributes the driver - * registers itself in the Linux backlight control subsystem and is - * available to userspace under /sys/class/backlight/compal-laptop/. + * The driver registers itself with the rfkill subsystem and + * the Linux backlight control subsystem. * * This driver might work on other laptops produced by Compal. If you * want to try it you can pass force=1 as argument to the module which @@ -52,6 +43,7 @@ #include #include #include +#include #define COMPAL_DRIVER_VERSION "0.2.6" @@ -64,6 +56,10 @@ #define WLAN_MASK 0x01 #define BT_MASK 0x02 +static struct rfkill *wifi_rfkill; +static struct rfkill *bt_rfkill; +static struct platform_device *compal_device; + static int force; module_param(force, bool, 0); MODULE_PARM_DESC(force, "Force driver load, ignore DMI data"); @@ -89,65 +85,75 @@ return (int) result; } -static int set_wlan_state(int state) +static int compal_rfkill_set(void *data, bool blocked) { + unsigned long radio = (unsigned long) data; u8 result, value; ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); - if ((result & KILLSWITCH_MASK) == 0) - return -EINVAL; - else { - if (state) - value = (u8) (result | WLAN_MASK); - else - value = (u8) (result & ~WLAN_MASK); - ec_write(COMPAL_EC_COMMAND_WIRELESS, value); - } + if (!blocked) + value = (u8) (result | radio); + else + value = (u8) (result & ~radio); + ec_write(COMPAL_EC_COMMAND_WIRELESS, value); return 0; } -static int set_bluetooth_state(int state) +static void compal_rfkill_poll(struct rfkill *rfkill, void *data) { - u8 result, value; + u8 result; + bool hw_blocked; ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); - if ((result & KILLSWITCH_MASK) == 0) - return -EINVAL; - else { - if (state) - value = (u8) (result | BT_MASK); - else - value = (u8) (result & ~BT_MASK); - ec_write(COMPAL_EC_COMMAND_WIRELESS, value); - } - - return 0; + hw_blocked = !(result & KILLSWITCH_MASK); + rfkill_set_hw_state(rfkill, hw_blocked); } -static int get_wireless_state(int *wlan, int *bluetooth) +static const struct rfkill_ops compal_rfkill_ops = { + .poll = compal_rfkill_poll, + .set_block = compal_rfkill_set, +}; + +static int setup_rfkill(void) { - u8 result; + int ret; - ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); + wifi_rfkill = rfkill_alloc("compal-wifi", &compal_device->dev, + RFKILL_TYPE_WLAN, &compal_rfkill_ops, + (void *) WLAN_MASK); + if (!wifi_rfkill) + return -ENOMEM; - if (wlan) { - if ((result & KILLSWITCH_MASK) == 0) - *wlan = 0; - else - *wlan = result & WLAN_MASK; - } + ret = rfkill_register(wifi_rfkill); + if (ret) + goto err_wifi; - if (bluetooth) { - if ((result & KILLSWITCH_MASK) == 0) - *bluetooth = 0; - else - *bluetooth = (result & BT_MASK) >> 1; + bt_rfkill = rfkill_alloc("compal-bluetooth", &compal_device->dev, + RFKILL_TYPE_BLUETOOTH, &compal_rfkill_ops, + (void *) BT_MASK); + if (!bt_rfkill) { + ret = -ENOMEM; + goto err_allocate_bt; } + ret = rfkill_register(bt_rfkill); + if (ret) + goto err_register_bt; return 0; + +err_register_bt: + rfkill_destroy(bt_rfkill); + +err_allocate_bt: + rfkill_unregister(wifi_rfkill); + +err_wifi: + rfkill_destroy(wifi_rfkill); + + return ret; } /* Backlight device stuff */ @@ -170,86 +176,6 @@ static struct backlight_device *compalbl_device; -/* Platform device */ - -static ssize_t show_wlan(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret, enabled; - - ret = get_wireless_state(&enabled, NULL); - if (ret < 0) - return ret; - - return sprintf(buf, "%i\n", enabled); -} - -static ssize_t show_raw(struct device *dev, - struct device_attribute *attr, char *buf) -{ - u8 result; - - ec_read(COMPAL_EC_COMMAND_WIRELESS, &result); - - return sprintf(buf, "%i\n", result); -} - -static ssize_t show_bluetooth(struct device *dev, - struct device_attribute *attr, char *buf) -{ - int ret, enabled; - - ret = get_wireless_state(NULL, &enabled); - if (ret < 0) - return ret; - - return sprintf(buf, "%i\n", enabled); -} - -static ssize_t store_wlan_state(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - int state, ret; - - if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1)) - return -EINVAL; - - ret = set_wlan_state(state); - if (ret < 0) - return ret; - - return count; -} - -static ssize_t store_bluetooth_state(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - int state, ret; - - if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1)) - return -EINVAL; - - ret = set_bluetooth_state(state); - if (ret < 0) - return ret; - - return count; -} - -static DEVICE_ATTR(bluetooth, 0644, show_bluetooth, store_bluetooth_state); -static DEVICE_ATTR(wlan, 0644, show_wlan, store_wlan_state); -static DEVICE_ATTR(raw, 0444, show_raw, NULL); - -static struct attribute *compal_attributes[] = { - &dev_attr_bluetooth.attr, - &dev_attr_wlan.attr, - &dev_attr_raw.attr, - NULL -}; - -static struct attribute_group compal_attribute_group = { - .attrs = compal_attributes -}; static struct platform_driver compal_driver = { .driver = { @@ -258,8 +184,6 @@ } }; -static struct platform_device *compal_device; - /* Initialization */ static int dmi_check_cb(const struct dmi_system_id *id) @@ -311,6 +235,47 @@ }, .callback = dmi_check_cb }, + { + .ident = "Dell Mini 9", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"), + }, + .callback = dmi_check_cb + }, + { + .ident = "Dell Mini 10", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"), + }, + .callback = dmi_check_cb + }, + { + .ident = "Dell Mini 10v", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"), + }, + .callback = dmi_check_cb + }, + { + .ident = "Dell Inspiron 11z", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"), + }, + .callback = dmi_check_cb + }, + { + .ident = "Dell Mini 12", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"), + }, + .callback = dmi_check_cb + }, + { } }; @@ -349,23 +314,21 @@ ret = platform_device_add(compal_device); if (ret) - goto fail_platform_device1; + goto fail_platform_device; - ret = sysfs_create_group(&compal_device->dev.kobj, - &compal_attribute_group); + ret = setup_rfkill(); if (ret) - goto fail_platform_device2; + goto fail_rfkill; printk(KERN_INFO "compal-laptop: driver "COMPAL_DRIVER_VERSION " successfully loaded.\n"); return 0; -fail_platform_device2: - +fail_rfkill: platform_device_del(compal_device); -fail_platform_device1: +fail_platform_device: platform_device_put(compal_device); @@ -383,10 +346,13 @@ static void __exit compal_cleanup(void) { - sysfs_remove_group(&compal_device->dev.kobj, &compal_attribute_group); platform_device_unregister(compal_device); platform_driver_unregister(&compal_driver); backlight_device_unregister(compalbl_device); + rfkill_unregister(wifi_rfkill); + rfkill_destroy(wifi_rfkill); + rfkill_unregister(bt_rfkill); + rfkill_destroy(bt_rfkill); printk(KERN_INFO "compal-laptop: driver unloaded.\n"); } @@ -404,3 +370,8 @@ MODULE_ALIAS("dmi:*:rnIFL91:rvrIFT00:*"); MODULE_ALIAS("dmi:*:rnJFL92:rvrIFT00:*"); MODULE_ALIAS("dmi:*:rnIFT00:rvrIFT00:*"); +MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron910:*"); +MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1010:*"); +MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1011:*"); +MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1110:*"); +MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1210:*"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/input.c +++ linux-fsl-imx51-2.6.31/drivers/input/input.c @@ -88,19 +88,26 @@ */ static void input_pass_event(struct input_dev *dev, unsigned int type, unsigned int code, int value) -{ - struct input_handle *handle; + +{ struct input_handle *handle; rcu_read_lock(); handle = rcu_dereference(dev->grab); - if (handle) + if (handle) { handle->handler->event(handle, type, code, value); - else - list_for_each_entry_rcu(handle, &dev->h_list, d_node) - if (handle->open) - handle->handler->event(handle, - type, code, value); + goto out; + } + + handle = rcu_dereference(dev->filter); + if (handle && handle->handler->filter(handle, type, code, value)) + goto out; + + list_for_each_entry_rcu(handle, &dev->h_list, d_node) + if (handle->open) + handle->handler->event(handle, + type, code, value); +out: rcu_read_unlock(); } @@ -375,12 +382,15 @@ } EXPORT_SYMBOL(input_grab_device); -static void __input_release_device(struct input_handle *handle) +static void __input_release_device(struct input_handle *handle, bool filter) { struct input_dev *dev = handle->dev; - if (dev->grab == handle) { - rcu_assign_pointer(dev->grab, NULL); + if (handle == (filter ? dev->filter : dev->grab)) { + if (filter) + rcu_assign_pointer(dev->filter, NULL); + else + rcu_assign_pointer(dev->grab, NULL); /* Make sure input_pass_event() notices that grab is gone */ synchronize_rcu(); @@ -404,12 +414,65 @@ struct input_dev *dev = handle->dev; mutex_lock(&dev->mutex); - __input_release_device(handle); + __input_release_device(handle, false); mutex_unlock(&dev->mutex); } EXPORT_SYMBOL(input_release_device); /** + * input_filter_device - allow input events to be filtered from higher layers + * @handle: input handle that wants to filter the device + * + * When a device is filtered by an input handle all events generated by + * the device are to this handle. If the filter function returns true then + * the event is discarded rather than being passed to any other input handles, + * otherwise it is passed to them as normal. Grabs will be handled before + * filters, so a grabbed device will not deliver events to a filter function. + */ +int input_filter_device(struct input_handle *handle) +{ + struct input_dev *dev = handle->dev; + int retval; + + retval = mutex_lock_interruptible(&dev->mutex); + if (retval) + return retval; + + if (dev->filter) { + retval = -EBUSY; + goto out; + } + + rcu_assign_pointer(dev->filter, handle); + synchronize_rcu(); + + out: + mutex_unlock(&dev->mutex); + return retval; +} +EXPORT_SYMBOL(input_filter_device); + +/** + * input_unfilter_device - removes a filter from a device + * @handle: input handle that owns the device + * + * Removes the filter from a device so that other input handles can + * start receiving unfiltered input events. Upon release all handlers + * attached to the device have their start() method called so they + * have a change to synchronize device state with the rest of the + * system. + */ +void input_unfilter_device(struct input_handle *handle) +{ + struct input_dev *dev = handle->dev; + + mutex_lock(&dev->mutex); + __input_release_device(handle, true); + mutex_unlock(&dev->mutex); +} +EXPORT_SYMBOL(input_unfilter_device); + +/** * input_open_device - open input device * @handle: handle through which device is being accessed * @@ -482,7 +545,9 @@ mutex_lock(&dev->mutex); - __input_release_device(handle); + /* Release both grabs and filters */ + __input_release_device(handle, false); + __input_release_device(handle, true); if (!--dev->users && dev->close) dev->close(dev); --- linux-fsl-imx51-2.6.31.orig/drivers/input/misc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/input/misc/Kconfig @@ -40,6 +40,15 @@ tristate "M68k Beeper support" depends on M68K +config INPUT_STMP3XXX_ROTDEC + tristate "STMP3xxx Rotary Decoder support" + depends on MACH_STMP378X + select INPUT_POLLDEV + help + Say Y here for support for the rotary decoder on STMP3xxx + + If compiled as a module, it will be called stmp3xxx_rotdec + config INPUT_APANEL tristate "Fujitsu Lifebook Application Panel buttons" depends on X86 && I2C && LEDS_CLASS --- linux-fsl-imx51-2.6.31.orig/drivers/input/misc/stmp3xxx_rotdec.c +++ linux-fsl-imx51-2.6.31/drivers/input/misc/stmp3xxx_rotdec.c @@ -0,0 +1,174 @@ +/* + * Freescale STMP3XXX Rotary Encoder Driver + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +static int relative; +static unsigned int poll_interval = 500; + +void stmp3xxx_rotdec_flush(struct input_polled_dev *dev) +{ + /* in relative mode, reading the counter resets it */ + if (relative) + __raw_readl(REGS_TIMROT_BASE + HW_TIMROT_ROTCOUNT); +} + +void stmp3xxx_rotdec_poll(struct input_polled_dev *dev) +{ + s16 cnt = __raw_readl(REGS_TIMROT_BASE + HW_TIMROT_ROTCOUNT) & BM_TIMROT_ROTCOUNT_UPDOWN; + if (relative) + input_report_rel(dev->input, REL_WHEEL, cnt); + else + input_report_abs(dev->input, ABS_WHEEL, cnt); +} + +struct input_polled_dev *rotdec; +static u32 rotctrl; + +static int stmp3xxx_rotdec_probe(struct platform_device *pdev) +{ + int rc = 0; + + /* save original state of HW_TIMROT_ROTCTRL */ + rotctrl = __raw_readl(REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL); + + if (!(rotctrl & BM_TIMROT_ROTCTRL_ROTARY_PRESENT)) { + dev_info(&pdev->dev, "No rotary decoder present\n"); + rc = -ENODEV; + goto err_rotdec_present; + } else { + /* I had to add some extra line breaks in here + * to avoid lines >80 chars wide + */ + __raw_writel( + BF(0x0, TIMROT_ROTCTRL_DIVIDER) | /* 32kHz divider - 1 */ + BF(BV_TIMROT_ROTCTRL_OVERSAMPLE__2X, + TIMROT_ROTCTRL_OVERSAMPLE) | + BF(BV_TIMROT_ROTCTRL_SELECT_B__ROTARYB, + TIMROT_ROTCTRL_SELECT_B) | + BF(BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA, + TIMROT_ROTCTRL_SELECT_A) + , REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL); + __raw_writel( + BM_TIMROT_ROTCTRL_POLARITY_B | + BM_TIMROT_ROTCTRL_POLARITY_A + , REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_CLR); + + if (relative) + __raw_writel(BM_TIMROT_ROTCTRL_RELATIVE, + REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_SET); + else + __raw_writel(BM_TIMROT_ROTCTRL_RELATIVE, + REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_CLR); + + rc = rotdec_pinmux_request(); + if (rc) { + dev_err(&pdev->dev, + "Pin request failed (err=%d)\n", rc); + goto err_pinmux; + } + + /* set up input_polled_dev */ + rotdec = input_allocate_polled_device(); + if (!rotdec) { + dev_err(&pdev->dev, + "Unable to allocate polled device\n"); + rc = -ENOMEM; + goto err_alloc_polldev; + } + rotdec->flush = stmp3xxx_rotdec_flush; + rotdec->poll = stmp3xxx_rotdec_poll; + rotdec->poll_interval = poll_interval; /* msec */ + + rotdec->input->name = "stmp3xxx-rotdec"; + if (relative) + input_set_capability(rotdec->input, EV_REL, REL_WHEEL); + else { + input_set_capability(rotdec->input, EV_ABS, ABS_WHEEL); + input_set_abs_params(rotdec->input, ABS_WHEEL, + -32768, 32767, 0, 0); + } + + rc = input_register_polled_device(rotdec); + if (rc) { + dev_err(&pdev->dev, + "Unable to register rotary decoder (err=%d)\n", + rc); + goto err_reg_polldev; + } + } + + return 0; + +err_reg_polldev: + input_free_polled_device(rotdec); +err_alloc_polldev: + rotdec_pinmux_free(); +err_pinmux: + /* restore original register state */ + __raw_writel(rotctrl, REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL); + +err_rotdec_present: + return rc; +} + +static int stmp3xxx_rotdec_remove(struct platform_device *pdev) +{ + input_unregister_polled_device(rotdec); + input_free_polled_device(rotdec); + + rotdec_pinmux_free(); + + /* restore original register state */ + __raw_writel(rotctrl, REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL); + + return 0; +} + +static struct platform_driver stmp3xxx_rotdec_driver = { + .probe = stmp3xxx_rotdec_probe, + .remove = stmp3xxx_rotdec_remove, + .driver = { + .name = "stmp3xxx-rotdec", + }, +}; + +static int __init stmp3xxx_rotdec_init(void) +{ + return platform_driver_register(&stmp3xxx_rotdec_driver); +} + +static void __exit stmp3xxx_rotdec_exit(void) +{ + platform_driver_unregister(&stmp3xxx_rotdec_driver); +} + +module_init(stmp3xxx_rotdec_init); +module_exit(stmp3xxx_rotdec_exit); + +module_param(relative, bool, 0600); +module_param(poll_interval, uint, 0600); + +MODULE_AUTHOR("Drew Benedetti "); +MODULE_DESCRIPTION("STMP3xxx rotary decoder driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/misc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/input/misc/Makefile @@ -26,3 +26,4 @@ obj-$(CONFIG_INPUT_UINPUT) += uinput.o obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o obj-$(CONFIG_INPUT_YEALINK) += yealink.o +obj-$(CONFIG_INPUT_STMP3XXX_ROTDEC) += stmp3xxx_rotdec.o --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/mc9s08dz60_keyb.c +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/mc9s08dz60_keyb.c @@ -0,0 +1,248 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mc9s08dz60keyb.c + * + * @brief Driver for the Freescale Semiconductor MXC keypad port. + * + * The keypad driver is designed as a standard Input driver which interacts + * with low level keypad port hardware. Upon opening, the Keypad driver + * initializes the keypad port. When the keypad interrupt happens the driver + * calles keypad polling timer and scans the keypad matrix for key + * press/release. If all key press/release happened it comes out of timer and + * waits for key press interrupt. The scancode for key press and release events + * are passed to Input subsytem. + * + * @ingroup keypad + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MOD_NAME "mc9s08dz60-keyb" +/* + * Module header file + */ + +/*! Input device structure. */ +static struct input_dev *mc9s08dz60kbd_dev; +static unsigned int key_status; +static int keypad_irq; +static unsigned int key_code_map[8] = { + KEY_LEFT, + KEY_DOWN, + 0, + 0, + KEY_UP, + KEY_RIGHT, + 0, + 0, +}; +static unsigned int keycodes_size = 8; + +static void read_key_handler(struct work_struct *work); +static DECLARE_WORK(key_pad_event, read_key_handler); + + +static void read_key_handler(struct work_struct *work) +{ + unsigned int val1, val2; + int pre_val, curr_val, i; + val1 = val2 = 0xff; + mcu_pmic_read_reg(REG_MCU_KPD_1, &val1, 0xff); + mcu_pmic_read_reg(REG_MCU_KPD_2, &val2, 0xff); + pr_debug("key pressed, 0x%02x%02x\n", val2, val1); + for (i = 0; i < 8; i++) { + curr_val = (val1 >> i) & 0x1; + if (curr_val > 0) + input_event(mc9s08dz60kbd_dev, EV_KEY, + key_code_map[i], 1); + else { + pre_val = (key_status >> i) & 0x1; + if (pre_val > 0) + input_event(mc9s08dz60kbd_dev, EV_KEY, + key_code_map[i], 0); + } + } + key_status = val1; + +} + +static irqreturn_t mc9s08dz60kpp_interrupt(int irq, void *dev_id) +{ + schedule_work(&key_pad_event); + return IRQ_RETVAL(1); +} + +/*! + * This function is called when the keypad driver is opened. + * Since keypad initialization is done in __init, nothing is done in open. + * + * @param dev Pointer to device inode + * + * @result The function always return 0 + */ +static int mc9s08dz60kpp_open(struct input_dev *dev) +{ + return 0; +} + +/*! + * This function is called close the keypad device. + * Nothing is done in this function, since every thing is taken care in + * __exit function. + * + * @param dev Pointer to device inode + * + */ +static void mc9s08dz60kpp_close(struct input_dev *dev) +{ +} + + +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions. + * + * @return The function returns 0 on successful registration. Otherwise returns + * specific error code. + */ +static int mc9s08dz60kpp_probe(struct platform_device *pdev) +{ + int i, irq; + int retval; + + retval = mcu_pmic_write_reg(REG_MCU_KPD_CONTROL, 0x1, 0x1); + if (retval != 0) { + pr_info("mc9s08dz60 keypad: mcu not detected!\n"); + return retval; + } + + irq = platform_get_irq(pdev, 0); + retval = request_irq(irq, mc9s08dz60kpp_interrupt, + 0, MOD_NAME, MOD_NAME); + if (retval) { + pr_debug("KPP: request_irq(%d) returned error %d\n", + irq, retval); + return retval; + } + keypad_irq = irq; + + mc9s08dz60kbd_dev = input_allocate_device(); + if (!mc9s08dz60kbd_dev) { + pr_info(KERN_ERR "mc9s08dz60kbd_dev: \ + not enough memory for input device\n"); + retval = -ENOMEM; + goto err1; + } + + mc9s08dz60kbd_dev->name = "mc9s08dz60kpd"; + mc9s08dz60kbd_dev->id.bustype = BUS_HOST; + mc9s08dz60kbd_dev->open = mc9s08dz60kpp_open; + mc9s08dz60kbd_dev->close = mc9s08dz60kpp_close; + + retval = input_register_device(mc9s08dz60kbd_dev); + if (retval < 0) { + pr_info(KERN_ERR + "mc9s08dz60kbd_dev: failed to register input device\n"); + goto err2; + } + + __set_bit(EV_KEY, mc9s08dz60kbd_dev->evbit); + + for (i = 0; i < keycodes_size; i++) + __set_bit(key_code_map[i], mc9s08dz60kbd_dev->keybit); + + device_init_wakeup(&pdev->dev, 1); + + pr_info("mc9s08dz60 keypad probed\n"); + + return 0; + +err2: + input_free_device(mc9s08dz60kbd_dev); +err1: + free_irq(irq, MOD_NAME); + return retval; +} + +/*! + * Dissociates the driver from the kpp device. + * + * @param pdev the device structure used to give information on which SDHC + * to remove + * + * @return The function always returns 0. + */ +static int mc9s08dz60kpp_remove(struct platform_device *pdev) +{ + free_irq(keypad_irq, MOD_NAME); + input_unregister_device(mc9s08dz60kbd_dev); + + if (mc9s08dz60kbd_dev) + input_free_device(mc9s08dz60kbd_dev); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mc9s08dz60kpd_driver = { + .driver = { + .name = "mc9s08dz60keypad", + .bus = &platform_bus_type, + }, + .probe = mc9s08dz60kpp_probe, + .remove = mc9s08dz60kpp_remove +}; + +static int __init mc9s08dz60kpp_init(void) +{ + pr_info(KERN_INFO "mc9s08dz60 keypad loaded\n"); + platform_driver_register(&mc9s08dz60kpd_driver); + return 0; +} + +static void __exit mc9s08dz60kpp_cleanup(void) +{ + platform_driver_unregister(&mc9s08dz60kpd_driver); +} + +module_init(mc9s08dz60kpp_init); +module_exit(mc9s08dz60kpp_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Keypad Controller Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/Kconfig @@ -310,6 +310,13 @@ To compile this driver as a module, choose M here: the module will be called sunkbd. +config KEYBOARD_MPR084 + tristate "Freescale MPR084 Touch Keypad Driver" + depends on ARCH_MX37 + help + This is the Keypad driver for the Freescale Proximity Capacitive + Touch Sensor controller chip. + config KEYBOARD_SH_KEYSC tristate "SuperH KEYSC keypad support" depends on SUPERH @@ -317,6 +324,7 @@ Say Y here if you want to use a keypad attached to the KEYSC block on SuperH processors such as sh7722 and sh7343. + To compile this driver as a module, choose M here: the module will be called sh_keysc. @@ -361,4 +369,24 @@ To compile this driver as a module, choose M here: the module will be called xtkbd. +config KEYBOARD_MXC + tristate "MXC Keypad Driver" + depends on ARCH_MXC + help + This is the Keypad driver for the Freescale MXC application + processors. + +config KEYBOARD_STMP3XXX + tristate "STMP3xxx keyboard" + depends on ARCH_STMP3XXX + help + -to be written- + + +config KEYBOARD_MC9S08DZ60 + tristate "mc9s08dz60 keyboard" + depends on MXC_PMIC_MC9S08DZ60 + help + -to be written- + endif --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/mxc_keyb.c +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/mxc_keyb.c @@ -0,0 +1,1037 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_keyb.c + * + * @brief Driver for the Freescale Semiconductor MXC keypad port. + * + * The keypad driver is designed as a standard Input driver which interacts + * with low level keypad port hardware. Upon opening, the Keypad driver + * initializes the keypad port. When the keypad interrupt happens the driver + * calles keypad polling timer and scans the keypad matrix for key + * press/release. If all key press/release happened it comes out of timer and + * waits for key press interrupt. The scancode for key press and release events + * are passed to Input subsytem. + * + * @ingroup keypad + */ + +/*! + * Comment KPP_DEBUG to disable debug messages + */ +#define KPP_DEBUG 0 + +#if KPP_DEBUG +#define DEBUG +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Module header file + */ +#include "mxc_keyb.h" + +/*! + * This structure holds the keypad private data structure. + */ +static struct keypad_priv kpp_dev; + +/*! Indicates if the key pad device is enabled. */ +static unsigned int key_pad_enabled; + +/*! Input device structure. */ +static struct input_dev *mxckbd_dev = NULL; + +/*! KPP clock handle. */ +static struct clk *kpp_clk; + +/*! This static variable indicates whether a key event is pressed/released. */ +static unsigned short KPress; + +/*! cur_rcmap and prev_rcmap array is used to detect key press and release. */ +static unsigned short *cur_rcmap; /* max 64 bits (8x8 matrix) */ +static unsigned short *prev_rcmap; + +/*! + * Debounce polling period(10ms) in system ticks. + */ +static unsigned short KScanRate = (10 * HZ) / 1000; + +static struct keypad_data *keypad; + +static int has_leaning_key; +/*! + * These arrays are used to store press and release scancodes. + */ +static short **press_scancode; +static short **release_scancode; + +static const unsigned short *mxckpd_keycodes; +static unsigned short mxckpd_keycodes_size; + +#define press_left_code 30 +#define press_right_code 29 +#define press_up_code 28 +#define press_down_code 27 + +#define rel_left_code 158 +#define rel_right_code 157 +#define rel_up_code 156 +#define rel_down_code 155 +/*! + * These functions are used to configure and the GPIO pins for keypad to + * activate and deactivate it. + */ +extern void gpio_keypad_active(void); +extern void gpio_keypad_inactive(void); + +/*! + * This function is called for generating scancodes for key press and + * release on keypad for the board. + * + * @param row Keypad row pressed on the keypad matrix. + * @param col Keypad col pressed on the keypad matrix. + * @param press Indicated key press/release. + * + * @return Key press/release Scancode. + */ +static signed short mxc_scan_matrix_leaning_key(int row, int col, int press) +{ + static unsigned first_row; + static unsigned first_set = 0, flag = 0; + signed short scancode = -1; + + if (press) { + if ((3 == col) && ((3 == row) || + (4 == row) || (5 == row) || (6 == row))) { + if (first_set == 0) { + first_set = 1; + first_row = row; + } else { + first_set = 0; + if (((first_row == 6) || (first_row == 3)) + && ((row == 6) || (row == 3))) + scancode = press_down_code; + else if (((first_row == 3) || (first_row == 5)) + && ((row == 3) || (row == 5))) + scancode = press_left_code; + else if (((first_row == 6) || (first_row == 4)) + && ((row == 6) || (row == 4))) + scancode = press_right_code; + else if (((first_row == 4) || (first_row == 5)) + && ((row == 4) || (row == 5))) + scancode = press_up_code; + KPress = 1; + kpp_dev.iKeyState = KStateUp; + pr_debug("Press (%d, %d) scan=%d Kpress=%d\n", + row, col, scancode, KPress); + } + } else { + /* + * check for other keys only + * if the cursor key presses + * are not detected may be + * this needs better logic + */ + if ((0 == (cur_rcmap[3] & BITSET(0, 3))) && + (0 == (cur_rcmap[4] & BITSET(0, 3))) && + (0 == (cur_rcmap[5] & BITSET(0, 3))) && + (0 == (cur_rcmap[6] & BITSET(0, 3)))) { + scancode = ((col * kpp_dev.kpp_rows) + row); + KPress = 1; + kpp_dev.iKeyState = KStateUp; + flag = 1; + pr_debug("Press (%d, %d) scan=%d Kpress=%d\n", + row, col, scancode, KPress); + } + } + } else { + if ((flag == 0) && (3 == col) + && ((3 == row) || (4 == row) || (5 == row) + || (6 == row))) { + if (first_set == 0) { + first_set = 1; + first_row = row; + } else { + first_set = 0; + if (((first_row == 6) || (first_row == 3)) + && ((row == 6) || (row == 3))) + scancode = rel_down_code; + else if (((first_row == 3) || (first_row == 5)) + && ((row == 3) || (row == 5))) + scancode = rel_left_code; + else if (((first_row == 6) || (first_row == 4)) + && ((row == 6) || (row == 4))) + scancode = rel_right_code; + else if (((first_row == 4) || (first_row == 5)) + && ((row == 4) || (row == 5))) + scancode = rel_up_code; + KPress = 0; + kpp_dev.iKeyState = KStateDown; + pr_debug("Release (%d, %d) scan=%d Kpress=%d\n", + row, col, scancode, KPress); + } + } else { + /* + * check for other keys only + * if the cursor key presses + * are not detected may be + * this needs better logic + */ + if ((0 == (prev_rcmap[3] & BITSET(0, 3))) && + (0 == (prev_rcmap[4] & BITSET(0, 3))) && + (0 == (cur_rcmap[5] & BITSET(0, 3))) && + (0 == (cur_rcmap[6] & BITSET(0, 3)))) { + scancode = ((col * kpp_dev.kpp_rows) + row) + + MXC_KEYRELEASE; + KPress = 0; + flag = 0; + kpp_dev.iKeyState = KStateDown; + pr_debug("Release (%d, %d) scan=%d Kpress=%d\n", + row, col, scancode, KPress); + } + } + } + return scancode; +} + +/*! + * This function is called to scan the keypad matrix to find out the key press + * and key release events. Make scancode and break scancode are generated for + * key press and key release events. + * + * The following scanning sequence are done for + * keypad row and column scanning, + * -# Write 1's to KPDR[15:8], setting column data to 1's + * -# Configure columns as totem pole outputs(for quick discharging of keypad + * capacitance) + * -# Configure columns as open-drain + * -# Write a single column to 0, others to 1. + * -# Sample row inputs and save data. Multiple key presses can be detected on + * a single column. + * -# Repeat steps the above steps for remaining columns. + * -# Return all columns to 0 in preparation for standby mode. + * -# Clear KPKD and KPKR status bit(s) by writing to a 1, + * Set the KPKR synchronizer chain by writing "1" to KRSS register, + * Clear the KPKD synchronizer chain by writing "1" to KDSC register + * + * @result Number of key pressed/released. + */ +static int mxc_kpp_scan_matrix(void) +{ + unsigned short reg_val; + int col, row; + short scancode = 0; + int keycnt = 0; /* How many keys are still pressed */ + + /* + * wmb() linux kernel function which guarantees orderings in write + * operations + */ + wmb(); + + /* save cur keypad matrix to prev */ + + memcpy(prev_rcmap, cur_rcmap, kpp_dev.kpp_rows * sizeof(prev_rcmap[0])); + memset(cur_rcmap, 0, kpp_dev.kpp_rows * sizeof(cur_rcmap[0])); + + for (col = 0; col < kpp_dev.kpp_cols; col++) { /* Col */ + /* 2. Write 1.s to KPDR[15:8] setting column data to 1.s */ + reg_val = __raw_readw(KPDR); + reg_val |= 0xff00; + __raw_writew(reg_val, KPDR); + + /* + * 3. Configure columns as totem pole outputs(for quick + * discharging of keypad capacitance) + */ + reg_val = __raw_readw(KPCR); + reg_val &= 0x00ff; + __raw_writew(reg_val, KPCR); + + udelay(2); + + /* + * 4. Configure columns as open-drain + */ + reg_val = __raw_readw(KPCR); + reg_val |= ((1 << kpp_dev.kpp_cols) - 1) << 8; + __raw_writew(reg_val, KPCR); + + /* + * 5. Write a single column to 0, others to 1. + * 6. Sample row inputs and save data. Multiple key presses + * can be detected on a single column. + * 7. Repeat steps 2 - 6 for remaining columns. + */ + + /* Col bit starts at 8th bit in KPDR */ + reg_val = __raw_readw(KPDR); + reg_val &= ~(1 << (8 + col)); + __raw_writew(reg_val, KPDR); + + /* Delay added to avoid propagating the 0 from column to row + * when scanning. */ + + udelay(5); + + /* Read row input */ + reg_val = __raw_readw(KPDR); + for (row = 0; row < kpp_dev.kpp_rows; row++) { /* sample row */ + if (TEST_BIT(reg_val, row) == 0) { + cur_rcmap[row] = BITSET(cur_rcmap[row], col); + keycnt++; + } + } + } + + /* + * 8. Return all columns to 0 in preparation for standby mode. + * 9. Clear KPKD and KPKR status bit(s) by writing to a .1., + * set the KPKR synchronizer chain by writing "1" to KRSS register, + * clear the KPKD synchronizer chain by writing "1" to KDSC register + */ + reg_val = 0x00; + __raw_writew(reg_val, KPDR); + reg_val = __raw_readw(KPDR); + reg_val = __raw_readw(KPSR); + reg_val |= KBD_STAT_KPKD | KBD_STAT_KPKR | KBD_STAT_KRSS | + KBD_STAT_KDSC; + __raw_writew(reg_val, KPSR); + + /* Check key press status change */ + + /* + * prev_rcmap array will contain the previous status of the keypad + * matrix. cur_rcmap array will contains the present status of the + * keypad matrix. If a bit is set in the array, that (row, col) bit is + * pressed, else it is not pressed. + * + * XORing these two variables will give us the change in bit for + * particular row and column. If a bit is set in XOR output, then that + * (row, col) has a change of status from the previous state. From + * the diff variable the key press and key release of row and column + * are found out. + * + * If the key press is determined then scancode for key pressed + * can be generated using the following statement: + * scancode = ((row * 8) + col); + * + * If the key release is determined then scancode for key release + * can be generated using the following statement: + * scancode = ((row * 8) + col) + MXC_KEYRELEASE; + */ + for (row = 0; row < kpp_dev.kpp_rows; row++) { + unsigned char diff; + + /* + * Calculate the change in the keypad row status + */ + diff = prev_rcmap[row] ^ cur_rcmap[row]; + + for (col = 0; col < kpp_dev.kpp_cols; col++) { + if ((diff >> col) & 0x1) { + /* There is a status change on col */ + if ((prev_rcmap[row] & BITSET(0, col)) == 0) { + /* + * Previous state is 0, so now + * a key is pressed + */ + if (has_leaning_key) { + scancode = + mxc_scan_matrix_leaning_key + (row, col, 1); + } else { + scancode = + ((row * kpp_dev.kpp_cols) + + col); + KPress = 1; + kpp_dev.iKeyState = KStateUp; + } + pr_debug("Press (%d, %d) scan=%d " + "Kpress=%d\n", + row, col, scancode, KPress); + press_scancode[row][col] = + (short)scancode; + } else { + /* + * Previous state is not 0, so + * now a key is released + */ + if (has_leaning_key) { + scancode = + mxc_scan_matrix_leaning_key + (row, col, 0); + } else { + scancode = + (row * kpp_dev.kpp_cols) + + col + MXC_KEYRELEASE; + KPress = 0; + kpp_dev.iKeyState = KStateDown; + } + + pr_debug + ("Release (%d, %d) scan=%d Kpress=%d\n", + row, col, scancode, KPress); + release_scancode[row][col] = + (short)scancode; + keycnt++; + } + } + } + } + + /* + * This switch case statement is the + * implementation of state machine of debounce + * logic for key press/release. + * The explaination of state machine is as + * follows: + * + * KStateUp State: + * This is in intial state of the state machine + * this state it checks for any key presses. + * The key press can be checked using the + * variable KPress. If KPress is set, then key + * press is identified and switches the to + * KStateFirstDown state for key press to + * debounce. + * + * KStateFirstDown: + * After debounce delay(10ms), if the KPress is + * still set then pass scancode generated to + * input device and change the state to + * KStateDown, else key press debounce is not + * satisfied so change the state to KStateUp. + * + * KStateDown: + * In this state it checks for any key release. + * If KPress variable is cleared, then key + * release is indicated and so, switch the + * state to KStateFirstUp else to state + * KStateDown. + * + * KStateFirstUp: + * After debounce delay(10ms), if the KPress is + * still reset then pass the key release + * scancode to input device and change + * the state to KStateUp else key release is + * not satisfied so change the state to + * KStateDown. + */ + switch (kpp_dev.iKeyState) { + case KStateUp: + if (KPress) { + /* First Down (must debounce). */ + kpp_dev.iKeyState = KStateFirstDown; + } else { + /* Still UP.(NO Changes) */ + kpp_dev.iKeyState = KStateUp; + } + break; + + case KStateFirstDown: + if (KPress) { + for (row = 0; row < kpp_dev.kpp_rows; row++) { + for (col = 0; col < kpp_dev.kpp_cols; col++) { + if ((press_scancode[row][col] != -1)) { + /* Still Down, so add scancode */ + scancode = + press_scancode[row][col]; + input_event(mxckbd_dev, EV_KEY, + mxckpd_keycodes + [scancode], 1); + if (mxckpd_keycodes[scancode] == + KEY_LEFTSHIFT) { + input_event(mxckbd_dev, + EV_KEY, + KEY_3, 1); + } + kpp_dev.iKeyState = KStateDown; + press_scancode[row][col] = -1; + } + } + } + } else { + /* Just a bounce */ + kpp_dev.iKeyState = KStateUp; + } + break; + + case KStateDown: + if (KPress) { + /* Still down (no change) */ + kpp_dev.iKeyState = KStateDown; + } else { + /* First Up. Must debounce */ + kpp_dev.iKeyState = KStateFirstUp; + } + break; + + case KStateFirstUp: + if (KPress) { + /* Just a bounce */ + kpp_dev.iKeyState = KStateDown; + } else { + for (row = 0; row < kpp_dev.kpp_rows; row++) { + for (col = 0; col < kpp_dev.kpp_cols; col++) { + if ((release_scancode[row][col] != -1)) { + scancode = + release_scancode[row][col]; + scancode = + scancode - MXC_KEYRELEASE; + input_event(mxckbd_dev, EV_KEY, + mxckpd_keycodes + [scancode], 0); + if (mxckpd_keycodes[scancode] == + KEY_LEFTSHIFT) { + input_event(mxckbd_dev, + EV_KEY, + KEY_3, 0); + } + kpp_dev.iKeyState = KStateUp; + release_scancode[row][col] = -1; + } + } + } + } + break; + + default: + return -EBADRQC; + break; + } + + return keycnt; +} + +/*! + * This function is called to start the timer for scanning the keypad if there + * is any key press. Currently this interval is set to 10 ms. When there are + * no keys pressed on the keypad we return back, waiting for a keypad key + * press interrupt. + * + * @param data Opaque data passed back by kernel. Not used. + */ +static void mxc_kpp_handle_timer(unsigned long data) +{ + unsigned short reg_val; + int i; + + if (key_pad_enabled == 0) { + return; + } + if (mxc_kpp_scan_matrix() == 0) { + /* + * Stop scanning and wait for interrupt. + * Enable press interrupt and disable release interrupt. + */ + __raw_writew(0x00FF, KPDR); + reg_val = __raw_readw(KPSR); + reg_val |= (KBD_STAT_KPKR | KBD_STAT_KPKD); + reg_val |= KBD_STAT_KRSS | KBD_STAT_KDSC; + __raw_writew(reg_val, KPSR); + reg_val |= KBD_STAT_KDIE; + reg_val &= ~KBD_STAT_KRIE; + __raw_writew(reg_val, KPSR); + + /* + * No more keys pressed... make sure unwanted key codes are + * not given upstairs + */ + for (i = 0; i < kpp_dev.kpp_rows; i++) { + memset(press_scancode[i], -1, + sizeof(press_scancode[0][0]) * kpp_dev.kpp_cols); + memset(release_scancode[i], -1, + sizeof(release_scancode[0][0]) * + kpp_dev.kpp_cols); + } + return; + } + + /* + * There are still some keys pressed, continue to scan. + * We shall scan again in 10 ms. This has to be tuned according + * to the requirement. + */ + kpp_dev.poll_timer.expires = jiffies + KScanRate; + kpp_dev.poll_timer.function = mxc_kpp_handle_timer; + add_timer(&kpp_dev.poll_timer); +} + +/*! + * This function is the keypad Interrupt handler. + * This function checks for keypad status register (KPSR) for key press + * and interrupt. If key press interrupt has occurred, then the key + * press interrupt in the KPSR are disabled. + * It then calls mxc_kpp_scan_matrix to check for any key pressed/released. + * If any key is found to be pressed, then a timer is set to call + * mxc_kpp_scan_matrix function for every 10 ms. + * + * @param irq The Interrupt number + * @param dev_id Driver private data + * + * @result The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + * \b IRQ_RETVAL is defined in include/linux/interrupt.h. + */ +static irqreturn_t mxc_kpp_interrupt(int irq, void *dev_id) +{ + unsigned short reg_val; + + /* Delete the polling timer */ + del_timer(&kpp_dev.poll_timer); + reg_val = __raw_readw(KPSR); + + /* Check if it is key press interrupt */ + if (reg_val & KBD_STAT_KPKD) { + /* + * Disable key press(KDIE status bit) interrupt + */ + reg_val &= ~KBD_STAT_KDIE; + __raw_writew(reg_val, KPSR); + } else { + /* spurious interrupt */ + return IRQ_RETVAL(0); + } + /* + * Check if any keys are pressed, if so start polling. + */ + mxc_kpp_handle_timer(0); + + return IRQ_RETVAL(1); +} + +/*! + * This function is called when the keypad driver is opened. + * Since keypad initialization is done in __init, nothing is done in open. + * + * @param dev Pointer to device inode + * + * @result The function always return 0 + */ +static int mxc_kpp_open(struct input_dev *dev) +{ + return 0; +} + +/*! + * This function is called close the keypad device. + * Nothing is done in this function, since every thing is taken care in + * __exit function. + * + * @param dev Pointer to device inode + * + */ +static void mxc_kpp_close(struct input_dev *dev) +{ +} + +#ifdef CONFIG_PM +/*! + * This function puts the Keypad controller in low-power mode/state. + * If Keypad is enabled as a wake source(i.e. it can resume the system + * from suspend mode), the Keypad controller doesn't enter low-power state. + * + * @param pdev the device structure used to give information on Keypad + * to suspend + * @param state the power state the device is entering + * + * @return return -1 when the keypad is pressed. Otherwise, return 0 + */ +static int mxc_kpp_suspend(struct platform_device *pdev, pm_message_t state) +{ + /* When the keypad is still pressed, clean up registers and timers */ + if (timer_pending(&kpp_dev.poll_timer)) + return -1; + + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(keypad->irq); + } else { + disable_irq(keypad->irq); + key_pad_enabled = 0; + clk_disable(kpp_clk); + gpio_keypad_inactive(); + } + + return 0; +} + +/*! + * This function brings the Keypad controller back from low-power state. + * If Keypad is enabled as a wake source(i.e. it can resume the system + * from suspend mode), the Keypad controller doesn't enter low-power state. + * + * @param pdev the device structure used to give information on Keypad + * to resume + * + * @return The function always returns 0. + */ +static int mxc_kpp_resume(struct platform_device *pdev) +{ + if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(keypad->irq); + } else { + gpio_keypad_active(); + clk_enable(kpp_clk); + key_pad_enabled = 1; + enable_irq(keypad->irq); + } + + return 0; +} + +#else +#define mxc_kpp_suspend NULL +#define mxc_kpp_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This function is called to free the allocated memory for local arrays + */ +static void mxc_kpp_free_allocated(void) +{ + + int i; + + if (press_scancode) { + for (i = 0; i < kpp_dev.kpp_rows; i++) { + if (press_scancode[i]) + kfree(press_scancode[i]); + } + kfree(press_scancode); + } + + if (release_scancode) { + for (i = 0; i < kpp_dev.kpp_rows; i++) { + if (release_scancode[i]) + kfree(release_scancode[i]); + } + kfree(release_scancode); + } + + if (cur_rcmap) + kfree(cur_rcmap); + + if (prev_rcmap) + kfree(prev_rcmap); + + if (mxckbd_dev) + input_free_device(mxckbd_dev); +} + +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions. + * + * @return The function returns 0 on successful registration. Otherwise returns + * specific error code. + */ +static int mxc_kpp_probe(struct platform_device *pdev) +{ + int i, irq; + int retval; + unsigned int reg_val; + + keypad = (struct keypad_data *)pdev->dev.platform_data; + + kpp_dev.kpp_cols = keypad->colmax; + kpp_dev.kpp_rows = keypad->rowmax; + key_pad_enabled = 0; + + irq = platform_get_irq(pdev, 0); + keypad->irq = irq; + + /* Enable keypad clock */ + kpp_clk = clk_get(&pdev->dev, "kpp_clk"); + clk_enable(kpp_clk); + + /* IOMUX configuration for keypad */ + gpio_keypad_active(); + + /* Configure keypad */ + + /* Enable number of rows in keypad (KPCR[7:0]) + * Configure keypad columns as open-drain (KPCR[15:8]) + * + * Configure the rows/cols in KPP + * LSB nibble in KPP is for 8 rows + * MSB nibble in KPP is for 8 cols + */ + reg_val = __raw_readw(KPCR); + reg_val |= (1 << keypad->rowmax) - 1; /* LSB */ + reg_val |= ((1 << keypad->colmax) - 1) << 8; /* MSB */ + __raw_writew(reg_val, KPCR); + + /* Write 0's to KPDR[15:8] */ + reg_val = __raw_readw(KPDR); + reg_val &= 0x00ff; + __raw_writew(reg_val, KPDR); + + /* Configure columns as output, rows as input (KDDR[15:0]) */ + reg_val = __raw_readw(KDDR); + reg_val |= 0xff00; + reg_val &= 0xff00; + __raw_writew(reg_val, KDDR); + + reg_val = __raw_readw(KPSR); + reg_val &= ~(KBD_STAT_KPKR | KBD_STAT_KPKD); + reg_val |= KBD_STAT_KPKD; + reg_val |= KBD_STAT_KRSS | KBD_STAT_KDSC; + __raw_writew(reg_val, KPSR); + reg_val |= KBD_STAT_KDIE; + reg_val &= ~KBD_STAT_KRIE; + __raw_writew(reg_val, KPSR); + + has_leaning_key = keypad->learning; + mxckpd_keycodes = keypad->matrix; + mxckpd_keycodes_size = keypad->rowmax * keypad->colmax; + + if ((keypad->matrix == (void *)0) + || (mxckpd_keycodes_size == 0)) { + retval = -ENODEV; + goto err1; + } + + mxckbd_dev = input_allocate_device(); + if (!mxckbd_dev) { + printk(KERN_ERR + "mxckbd_dev: not enough memory for input device\n"); + retval = -ENOMEM; + goto err1; + } + + mxckbd_dev->keycode = (void *)mxckpd_keycodes; + mxckbd_dev->keycodesize = sizeof(mxckpd_keycodes[0]); + mxckbd_dev->keycodemax = mxckpd_keycodes_size; + mxckbd_dev->name = "mxckpd"; + mxckbd_dev->id.bustype = BUS_HOST; + mxckbd_dev->open = mxc_kpp_open; + mxckbd_dev->close = mxc_kpp_close; + + retval = input_register_device(mxckbd_dev); + if (retval < 0) { + printk(KERN_ERR + "mxckbd_dev: failed to register input device\n"); + goto err2; + } + + /* allocate required memory */ + press_scancode = kmalloc(kpp_dev.kpp_rows * sizeof(press_scancode[0]), + GFP_KERNEL); + release_scancode = + kmalloc(kpp_dev.kpp_rows * sizeof(release_scancode[0]), GFP_KERNEL); + + if (!press_scancode || !release_scancode) { + retval = -ENOMEM; + goto err3; + } + + for (i = 0; i < kpp_dev.kpp_rows; i++) { + press_scancode[i] = kmalloc(kpp_dev.kpp_cols + * sizeof(press_scancode[0][0]), + GFP_KERNEL); + release_scancode[i] = + kmalloc(kpp_dev.kpp_cols * sizeof(release_scancode[0][0]), + GFP_KERNEL); + + if (!press_scancode[i] || !release_scancode[i]) { + retval = -ENOMEM; + goto err3; + } + } + + cur_rcmap = + kmalloc(kpp_dev.kpp_rows * sizeof(cur_rcmap[0]), GFP_KERNEL); + prev_rcmap = + kmalloc(kpp_dev.kpp_rows * sizeof(prev_rcmap[0]), GFP_KERNEL); + + if (!cur_rcmap || !prev_rcmap) { + retval = -ENOMEM; + goto err3; + } + + __set_bit(EV_KEY, mxckbd_dev->evbit); + + for (i = 0; i < mxckpd_keycodes_size; i++) + __set_bit(mxckpd_keycodes[i], mxckbd_dev->keybit); + + for (i = 0; i < kpp_dev.kpp_rows; i++) { + memset(press_scancode[i], -1, + sizeof(press_scancode[0][0]) * kpp_dev.kpp_cols); + memset(release_scancode[i], -1, + sizeof(release_scancode[0][0]) * kpp_dev.kpp_cols); + } + memset(cur_rcmap, 0, kpp_dev.kpp_rows * sizeof(cur_rcmap[0])); + memset(prev_rcmap, 0, kpp_dev.kpp_rows * sizeof(prev_rcmap[0])); + + key_pad_enabled = 1; + /* Initialize the polling timer */ + init_timer(&kpp_dev.poll_timer); + + /* + * Request for IRQ number for keypad port. The Interrupt handler + * function (mxc_kpp_interrupt) is called when ever interrupt occurs on + * keypad port. + */ + retval = request_irq(irq, mxc_kpp_interrupt, 0, MOD_NAME, MOD_NAME); + if (retval) { + pr_debug("KPP: request_irq(%d) returned error %d\n", + MXC_INT_KPP, retval); + goto err3; + } + + /* By default, devices should wakeup if they can */ + /* So keypad is set as "should wakeup" as it can */ + device_init_wakeup(&pdev->dev, 1); + + return 0; + + err3: + mxc_kpp_free_allocated(); + err2: + input_free_device(mxckbd_dev); + err1: + free_irq(irq, MOD_NAME); + clk_disable(kpp_clk); + clk_put(kpp_clk); + return retval; +} + +/*! + * Dissociates the driver from the kpp device. + * + * @param pdev the device structure used to give information on which SDHC + * to remove + * + * @return The function always returns 0. + */ +static int mxc_kpp_remove(struct platform_device *pdev) +{ + unsigned short reg_val; + + /* + * Clear the KPKD status flag (write 1 to it) and synchronizer chain. + * Set KDIE control bit, clear KRIE control bit (avoid false release + * events. Disable the keypad GPIO pins. + */ + __raw_writew(0x00, KPCR); + __raw_writew(0x00, KPDR); + __raw_writew(0x00, KDDR); + + reg_val = __raw_readw(KPSR); + reg_val |= KBD_STAT_KPKD; + reg_val &= ~KBD_STAT_KRSS; + reg_val |= KBD_STAT_KDIE; + reg_val &= ~KBD_STAT_KRIE; + __raw_writew(reg_val, KPSR); + + gpio_keypad_inactive(); + clk_disable(kpp_clk); + clk_put(kpp_clk); + + KPress = 0; + + del_timer(&kpp_dev.poll_timer); + + free_irq(keypad->irq, MOD_NAME); + input_unregister_device(mxckbd_dev); + + mxc_kpp_free_allocated(); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_kpd_driver = { + .driver = { + .name = "mxc_keypad", + .bus = &platform_bus_type, + }, + .suspend = mxc_kpp_suspend, + .resume = mxc_kpp_resume, + .probe = mxc_kpp_probe, + .remove = mxc_kpp_remove +}; + +/*! + * This function is called for module initialization. + * It registers keypad char driver and requests for KPP irq number. This + * function does the initialization of the keypad device. + * + * The following steps are used for keypad configuration,\n + * -# Enable number of rows in the keypad control register (KPCR[7:0}).\n + * -# Write 0's to KPDR[15:8]\n + * -# Configure keypad columns as open-drain (KPCR[15:8])\n + * -# Configure columns as output, rows as input (KDDR[15:0])\n + * -# Clear the KPKD status flag (write 1 to it) and synchronizer chain\n + * -# Set KDIE control bit, clear KRIE control bit\n + * In this function the keypad queue initialization is done. + * The keypad IOMUX configuration are done here.* + + * + * @return 0 on success and a non-zero value on failure. + */ +static int __init mxc_kpp_init(void) +{ + printk(KERN_INFO "MXC keypad loaded\n"); + platform_driver_register(&mxc_kpd_driver); + return 0; +} + +/*! + * This function is called whenever the module is removed from the kernel. It + * unregisters the keypad driver from kernel and frees the irq number. + * This function puts the keypad to standby mode. The keypad interrupts are + * disabled. It calls gpio_keypad_inactive function to switch gpio + * configuration into default state. + * + */ +static void __exit mxc_kpp_cleanup(void) +{ + platform_driver_unregister(&mxc_kpd_driver); +} + +module_init(mxc_kpp_init); +module_exit(mxc_kpp_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Keypad Controller Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/mxc_keyb.h +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/mxc_keyb.h @@ -0,0 +1,191 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup keypad Keypad Driver + */ + +/*! + * @file mxc_keyb.h + * + * @brief MXC keypad header file. + * + * @ingroup keypad + */ +#ifndef __MXC_KEYB_H__ +#define __MXC_KEYB_H__ + +/*! + * Keypad Module Name + */ +#define MOD_NAME "mxckpd" + +/*! + * Keypad irq number + */ +#define KPP_IRQ MXC_INT_KPP + +/*! + * XLATE mode selection + */ +#define KEYPAD_XLATE 0 + +/*! + * RAW mode selection + */ +#define KEYPAD_RAW 1 + +/*! + * Maximum number of keys. + */ +#define MAXROW 8 +#define MAXCOL 8 +#define MXC_MAXKEY (MAXROW * MAXCOL) + +/*! + * This define indicates break scancode for every key release. A constant + * of 128 is added to the key press scancode. + */ +#define MXC_KEYRELEASE 128 + +/* + * _reg_KPP_KPCR _reg_KPP_KPSR _reg_KPP_KDDR _reg_KPP_KPDR + * Keypad Control Register Address + */ +#define KPCR IO_ADDRESS(KPP_BASE_ADDR + 0x00) + +/* + * Keypad Status Register Address + */ +#define KPSR IO_ADDRESS(KPP_BASE_ADDR + 0x02) + +/* + * Keypad Data Direction Address + */ +#define KDDR IO_ADDRESS(KPP_BASE_ADDR + 0x04) + +/* + * Keypad Data Register + */ +#define KPDR IO_ADDRESS(KPP_BASE_ADDR + 0x06) + +/* + * Key Press Interrupt Status bit + */ +#define KBD_STAT_KPKD 0x01 + +/* + * Key Release Interrupt Status bit + */ +#define KBD_STAT_KPKR 0x02 + +/* + * Key Depress Synchronizer Chain Status bit + */ +#define KBD_STAT_KDSC 0x04 + +/* + * Key Release Synchronizer Status bit + */ +#define KBD_STAT_KRSS 0x08 + +/* + * Key Depress Interrupt Enable Status bit + */ +#define KBD_STAT_KDIE 0x100 + +/* + * Key Release Interrupt Enable + */ +#define KBD_STAT_KRIE 0x200 + +/* + * Keypad Clock Enable + */ +#define KBD_STAT_KPPEN 0x400 + +/*! + * Buffer size of keypad queue. Should be a power of 2. + */ +#define KPP_BUF_SIZE 128 + +/*! + * Test whether bit is set for integer c + */ +#define TEST_BIT(c, n) ((c) & (0x1 << (n))) + +/*! + * Set nth bit in the integer c + */ +#define BITSET(c, n) ((c) | (1 << (n))) + +/*! + * Reset nth bit in the integer c + */ +#define BITRESET(c, n) ((c) & ~(1 << (n))) + +/*! + * This enum represents the keypad state machine to maintain debounce logic + * for key press/release. + */ +enum KeyState { + + /*! + * Key press state. + */ + KStateUp, + + /*! + * Key press debounce state. + */ + KStateFirstDown, + + /*! + * Key release state. + */ + KStateDown, + + /*! + * Key release debounce state. + */ + KStateFirstUp +}; + +/*! + * Keypad Private Data Structure + */ +typedef struct keypad_priv { + + /*! + * Keypad state machine. + */ + enum KeyState iKeyState; + + /*! + * Number of rows configured in the keypad matrix + */ + unsigned long kpp_rows; + + /*! + * Number of Columns configured in the keypad matrix + */ + unsigned long kpp_cols; + + /*! + * Timer used for Keypad polling. + */ + struct timer_list poll_timer; + +} keypad_priv; + +#endif /* __MXC_KEYB_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/Makefile +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/Makefile @@ -31,3 +31,7 @@ obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o obj-$(CONFIG_KEYBOARD_TOSA) += tosakbd.o obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o +obj-$(CONFIG_KEYBOARD_MXC) += mxc_keyb.o +obj-$(CONFIG_KEYBOARD_MPR084) += mpr084.o +obj-$(CONFIG_KEYBOARD_STMP3XXX) += stmp3xxx-kbd.o +obj-$(CONFIG_KEYBOARD_MC9S08DZ60) += mc9s08dz60_keyb.o --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/mpr084.c +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/mpr084.c @@ -0,0 +1,500 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file linux/drivers/input/keyboard/mpr084.c + * + * @brief Driver for the Freescale MPR084 I2C Touch Sensor KeyPad module. + * + * + * + * @ingroup Keypad + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Definitions + */ +#define DEBUG 0 + +#define KEY_COUNT 8 + +/* + *Registers in MPR084 + */ +#define MPR084_FIFO_ADDR 0x00 +#define MPR084_FAULT_ADDR 0x01 +#define MPR084_TPS_ADDR 0x02 +#define MPR084_TPC_ADDR 0x03 +#define MPR084_STR1_ADDR 0x04 +#define MPR084_STR2_ADDR 0x05 +#define MPR084_STR3_ADDR 0x06 +#define MPR084_STR4_ADDR 0x07 +#define MPR084_STR5_ADDR 0x08 +#define MPR084_STR6_ADDR 0x09 +#define MPR084_STR7_ADDR 0x0A +#define MPR084_STR8_ADDR 0x0B +#define MPR084_ECEM_ADDR 0x0C +#define MPR084_MNTP_ADDR 0x0D +#define MPR084_MTC_ADDR 0x0E +#define MPR084_TASP_ADDR 0x0F +#define MPR084_SC_ADDR 0x10 +#define MPR084_LPC_ADDR 0x11 +#define MPR084_SKT_ADDR 0x12 +#define MPR084_CONFIG_ADDR 0x13 +#define MPR084_SI_ADDR 0x14 +#define MPR084_ADDR_MINI MPR084_FIFO_ADDR +#define MPR084_ADDR_MAX MPR084_SI_ADDR + +/* FIFO registers */ +#define MPR084_FIFO_MORE_DATA_FLAG 0x80 +#define MPR084_FIFO_NO_DATA_FLAG 0x40 +#define MPR084_FIFO_OVERFLOW_FLAG 0x20 +#define MPR084_FIFO_PAD_IS_TOUCHED 0x10 +#define MPR084_FIFO_POSITION_MASK 0x0F + +#define DRIVER_NAME "mpr084" + +struct mpr084_data { + struct i2c_client *client; + struct device_driver driver; + struct input_dev *idev; + struct task_struct *tstask; + struct completion kpirq_completion; + int kpirq; + int kp_thread_cnt; + int opened; +}; + +static int kpstatus[KEY_COUNT]; +static struct mxc_keyp_platform_data *keypad; +static const unsigned short *mxckpd_keycodes; +static struct regulator *vdd_reg; + +static int mpr084_read_register(struct mpr084_data *data, + unsigned char regaddr, int *value) +{ + int ret = 0; + unsigned char regvalue; + + ret = i2c_master_send(data->client, ®addr, 1); + if (ret < 0) + goto err; + udelay(20); + ret = i2c_master_recv(data->client, ®value, 1); + if (ret < 0) + goto err; + *value = regvalue; + + return ret; +err: + return -ENODEV; +} + +static int mpr084_write_register(struct mpr084_data *data, + u8 regaddr, u8 regvalue) +{ + int ret = 0; + unsigned char msgbuf[2]; + + msgbuf[0] = regaddr; + msgbuf[1] = regvalue; + ret = i2c_master_send(data->client, msgbuf, 2); + if (ret < 0) { + printk(KERN_ERR "%s - Error in writing to I2C Register %d \n", + __func__, regaddr); + return ret; + } + + return ret; +} + + +static irqreturn_t mpr084_keypadirq(int irq, void *v) +{ + struct mpr084_data *d = v; + + disable_irq(d->kpirq); + complete(&d->kpirq_completion); + return IRQ_HANDLED; +} + +static int mpr084ts_thread(void *v) +{ + struct mpr084_data *d = v; + int ret = 0, fifo = 0; + int index = 0, currentstatus = 0; + + if (d->kp_thread_cnt) + return -EINVAL; + d->kp_thread_cnt = 1; + while (1) { + + if (kthread_should_stop()) + break; + /* Wait for keypad interrupt */ + if (wait_for_completion_interruptible_timeout + (&d->kpirq_completion, HZ) <= 0) + continue; + + ret = mpr084_read_register(d, MPR084_FIFO_ADDR, &fifo); + if (ret < 0) { + printk(KERN_ERR + "%s: Err in reading keypad FIFO register \n\n", + __func__); + } else { + if (fifo & MPR084_FIFO_OVERFLOW_FLAG) + printk(KERN_ERR + "%s: FIFO overflow \n\n", __func__); + while (!(fifo & MPR084_FIFO_NO_DATA_FLAG)) { + index = fifo & MPR084_FIFO_POSITION_MASK; + currentstatus = + fifo & MPR084_FIFO_PAD_IS_TOUCHED; + /*Scan key map for changes */ + if ((currentstatus) ^ (kpstatus[index])) { + if (!(currentstatus)) { + /*Key released. */ + input_event(d->idev, EV_KEY, + mxckpd_keycodes + [index], 0); + } else { + /* Key pressed. */ + input_event(d->idev, EV_KEY, + mxckpd_keycodes + [index], 1); + } + /*Store current keypad status */ + kpstatus[index] = currentstatus; + } + mpr084_read_register(d, MPR084_FIFO_ADDR, + &fifo); + if (fifo & MPR084_FIFO_OVERFLOW_FLAG) + printk(KERN_ERR + "%s: FIFO overflow \n\n", + __func__); + } + } + /* Re-enable interrupts */ + enable_irq(d->kpirq); + } + + d->kp_thread_cnt = 0; + return 0; +} + +/*! + * This function puts the Keypad controller in low-power mode/state. + * + * @param pdev the device structure used to give information on Keypad + * to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mpr084_suspend(struct i2c_client *client, pm_message_t state) +{ + struct mpr084_data *d = i2c_get_clientdata(client); + + if (!IS_ERR(d->tstask) && d->opened) + kthread_stop(d->tstask); + + return 0; +} + +/*! + * This function brings the Keypad controller back from low-power state. + * + * @param pdev the device structure used to give information on Keypad + * to resume + * + * @return The function always returns 0. + */ +static int mpr084_resume(struct i2c_client *client) +{ + struct mpr084_data *d = i2c_get_clientdata(client); + + if (d->opened) + d->tstask = kthread_run(mpr084ts_thread, d, DRIVER_NAME "kpd"); + + return 0; +} + +static int mpr084_idev_open(struct input_dev *idev) +{ + struct mpr084_data *d = input_get_drvdata(idev); + int ret = 0; + + d->tstask = kthread_run(mpr084ts_thread, d, DRIVER_NAME "kpd"); + if (IS_ERR(d->tstask)) + ret = PTR_ERR(d->tstask); + else + d->opened++; + return ret; +} + +static void mpr084_idev_close(struct input_dev *idev) +{ + struct mpr084_data *d = input_get_drvdata(idev); + + if (!IS_ERR(d->tstask)) + kthread_stop(d->tstask); + if (d->opened > 0) + d->opened--; +} + +static int mpr084_driver_register(struct mpr084_data *data) +{ + struct input_dev *idev; + int ret = 0; + + if (data->kpirq) { + ret = + request_irq(data->kpirq, mpr084_keypadirq, + IRQF_TRIGGER_FALLING, DRIVER_NAME, data); + if (!ret) { + init_completion(&data->kpirq_completion); + set_irq_wake(data->kpirq, 1); + } else { + printk(KERN_ERR "%s: cannot grab irq %d\n", + __func__, data->kpirq); + } + + } + idev = input_allocate_device(); + data->idev = idev; + input_set_drvdata(idev, data); + idev->name = DRIVER_NAME; + idev->open = mpr084_idev_open; + idev->close = mpr084_idev_close; + if (!ret) + ret = input_register_device(idev); + + return ret; +} + +static int mpr084_i2c_remove(struct i2c_client *client) +{ + struct mpr084_data *d = i2c_get_clientdata(client); + + free_irq(d->kpirq, d); + input_unregister_device(d->idev); + if (keypad->inactive) + keypad->inactive(); + + /*Disable the Regulator*/ + if (keypad->vdd_reg) { + regulator_disable(vdd_reg); + regulator_put(vdd_reg); + } + + return 0; +} + +static int mpr084_configure(struct mpr084_data *data) +{ + int ret = 0, regValue = 0; + + ret = mpr084_write_register(data, MPR084_TPC_ADDR, 0x1d); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR1_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR2_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR3_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR4_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR5_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR6_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR7_ADDR, 0x10); + if (ret < 0) + goto err; + ret = mpr084_write_register(data, MPR084_STR8_ADDR, 0x10); + if (ret < 0) + goto err; + /* channel enable mask: enable all */ + ret = mpr084_write_register(data, MPR084_ECEM_ADDR, 0xff); + if (ret < 0) + goto err; + /*two conccurrent touch position allowed */ + ret = mpr084_write_register(data, MPR084_MNTP_ADDR, 0x02); + if (ret < 0) + goto err; + + /* master tick period*/ + ret = mpr084_write_register(data, MPR084_MTC_ADDR, 0x05); + if (ret < 0) + goto err; + + + /*Sample period */ + ret = mpr084_write_register(data, MPR084_TASP_ADDR, 0x02); + if (ret < 0) + goto err; + + + /* disable sournder*/ + ret = mpr084_write_register(data, MPR084_SC_ADDR, 0x00); + if (ret < 0) + goto err; + + /* stuck key timeout */ + ret = mpr084_write_register(data, MPR084_SKT_ADDR, 0x01); + if (ret < 0) + goto err; + + /*enabled IRQEN, RUNE, IRQR */ + ret = mpr084_read_register(data, MPR084_CONFIG_ADDR, ®Value); + if (ret < 0) { + printk(KERN_ERR + "%s: Err in reading keypad CONFIGADDR register \n\n", + __func__); + goto err; + } + regValue |= 0x03; + ret = mpr084_write_register(data, MPR084_CONFIG_ADDR, regValue); + if (ret < 0) + goto err; + return ret; +err: + return -ENODEV; +} + +static int mpr084_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct mpr084_data *data; + int err = 0, i = 0; +#if DEBUG + int regValue = 0; +#endif + data = kzalloc(sizeof(struct mpr084_data), GFP_KERNEL); + if (data == NULL) + return -ENOMEM; + i2c_set_clientdata(client, data); + data->client = client; + data->kpirq = client->irq; + err = mpr084_driver_register(data); + if (err < 0) + goto exit_free; + keypad = (struct mxc_keyp_platform_data *)(client->dev).platform_data; + if (keypad->active) + keypad->active(); + + /*Enable the Regulator*/ + if (keypad && keypad->vdd_reg) { + vdd_reg = regulator_get(&client->dev, keypad->vdd_reg); + if (!IS_ERR(vdd_reg)) + regulator_enable(vdd_reg); + else + vdd_reg = NULL; + } else + vdd_reg = NULL; + + mxckpd_keycodes = keypad->matrix; + data->idev->keycode = &mxckpd_keycodes; + data->idev->keycodesize = sizeof(unsigned char); + data->idev->keycodemax = KEY_COUNT; + data->idev->id.bustype = BUS_I2C; + __set_bit(EV_KEY, data->idev->evbit); + for (i = 0; i < 8; i++) + __set_bit(mxckpd_keycodes[i], data->idev->keybit); + err = mpr084_configure(data); + if (err == -ENODEV) { + free_irq(data->kpirq, data); + input_unregister_device(data->idev); + goto exit_free; + } + +#if DEBUG + for (i = MPR084_ADDR_MINI; i <= MPR084_ADDR_MAX; i++) { + err = mpr084_read_register(data, i, ®Value); + if (err < 0) { + printk(KERN_ERR + "%s: Err in reading keypad CONFIGADDR register \n\n", + __func__); + goto exit_free; + } + printk("MPR084 Register id: %d, Value:%d \n", i, regValue); + + } +#endif + memset(kpstatus, 0, sizeof(kpstatus)); + printk(KERN_INFO "%s: Device Attached\n", __func__); + return 0; +exit_free: + /*disable the Regulator*/ + if (vdd_reg) { + regulator_disable(vdd_reg); + regulator_put(vdd_reg); + vdd_reg = NULL; + } + kfree(data); + return err; +} + +static const struct i2c_device_id mpr084_id[] = { + { "mpr084", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, mpr084_id); + +static struct i2c_driver mpr084_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = mpr084_i2c_probe, + .remove = mpr084_i2c_remove, + .suspend = mpr084_suspend, + .resume = mpr084_resume, + .command = NULL, + .id_table = mpr084_id, +}; +static int __init mpr084_init(void) +{ + return i2c_add_driver(&mpr084_driver); +} + +static void __exit mpr084_exit(void) +{ + i2c_del_driver(&mpr084_driver); +} + +MODULE_AUTHOR("Freescale Semiconductor Inc"); +MODULE_DESCRIPTION("MPR084 Touch KeyPad Controller driver"); +MODULE_LICENSE("GPL"); +module_init(mpr084_init); +module_exit(mpr084_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/stmp3xxx-kbd.c +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/stmp3xxx-kbd.c @@ -0,0 +1,307 @@ +/* + * Keypad ladder driver for Freescale STMP37XX/STMP378X boards + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BUTTON_PRESS_THRESHOLD 3300 +#define LRADC_NOISE_MARGIN 100 + +/* this value represents the the lradc value at 3.3V ( 3.3V / 0.000879 V/b ) */ +#define TARGET_VDDIO_LRADC_VALUE 3754 + +struct stmpkbd_data { + struct input_dev *input; + int last_button; + int irq; + struct stmpkbd_keypair *keycodes; +}; + +static int delay1 = 500; +static int delay2 = 200; + +static int stmpkbd_open(struct input_dev *dev); +static void stmpkbd_close(struct input_dev *dev); + +static struct stmpkbd_data *stmpkbd_data_alloc(struct platform_device *pdev, + struct stmpkbd_keypair *keys) +{ + struct stmpkbd_data *d = kzalloc(sizeof(*d), GFP_KERNEL); + + if (!d) + return NULL; + + if (!keys) { + dev_err(&pdev->dev, + "No keycodes in platform_data, bailing out.\n"); + kfree(d); + return NULL; + } + d->keycodes = keys; + + d->input = input_allocate_device(); + if (!d->input) { + kfree(d); + return NULL; + } + + d->input->phys = "onboard"; + d->input->uniq = "0000'0000"; + d->input->name = pdev->name; + d->input->id.bustype = BUS_HOST; + d->input->open = stmpkbd_open; + d->input->close = stmpkbd_close; + d->input->dev.parent = &pdev->dev; + + set_bit(EV_KEY, d->input->evbit); + set_bit(EV_REL, d->input->evbit); + set_bit(EV_REP, d->input->evbit); + + + d->last_button = -1; + + while (keys->raw >= 0) { + set_bit(keys->kcode, d->input->keybit); + keys++; + } + + return d; +} + +static inline struct input_dev *GET_INPUT_DEV(struct stmpkbd_data *d) +{ + BUG_ON(!d); + return d->input; +} + +static void stmpkbd_data_free(struct stmpkbd_data *d) +{ + if (!d) + return; + if (d->input) + input_free_device(d->input); + kfree(d); +} + +static unsigned stmpkbd_decode_button(struct stmpkbd_keypair *codes, + int raw_button) + +{ + pr_debug("Decoding %d\n", raw_button); + while (codes->raw != -1) { + if ((raw_button > (codes->raw - LRADC_NOISE_MARGIN)) && + (raw_button < (codes->raw + LRADC_NOISE_MARGIN))) { + pr_debug("matches code 0x%x = %d\n", + codes->kcode, codes->kcode); + return codes->kcode; + } + codes++; + } + return (unsigned)-1; /* invalid key */ +} + + +static irqreturn_t stmpkbd_irq_handler(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + struct stmpkbd_data *devdata = platform_get_drvdata(pdev); + u16 raw_button, normalized_button, vddio; + unsigned btn; + + raw_button = __raw_readl(REGS_LRADC_BASE + + HW_LRADC_CHn(LRADC_CH0)) & BM_LRADC_CHn_VALUE; + vddio = hw_lradc_vddio(); + BUG_ON(vddio == 0); + + normalized_button = (raw_button * TARGET_VDDIO_LRADC_VALUE) / + vddio; + + if (normalized_button < BUTTON_PRESS_THRESHOLD && + devdata->last_button < 0) { + + btn = stmpkbd_decode_button(devdata->keycodes, + normalized_button); + + if (btn < KEY_MAX) { + devdata->last_button = btn; + input_report_key(GET_INPUT_DEV(devdata), + devdata->last_button, !0); + } else + dev_err(&pdev->dev, "Invalid button: raw = %d, " + "normalized = %d, vddio = %d\n", + raw_button, normalized_button, vddio); + } else if (devdata->last_button > 0 && + normalized_button >= BUTTON_PRESS_THRESHOLD) { + + input_report_key(GET_INPUT_DEV(devdata), + devdata->last_button, 0); + devdata->last_button = -1; + + } + + __raw_writel(BM_LRADC_CTRL1_LRADC0_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + return IRQ_HANDLED; +} + +static int stmpkbd_open(struct input_dev *dev) +{ + /* enable clock */ + return 0; +} + +static void stmpkbd_close(struct input_dev *dev) +{ + /* disable clock */ +} + +static void stmpkbd_hwinit(struct platform_device *pdev) +{ + hw_lradc_init_ladder(LRADC_CH0, LRADC_DELAY_TRIGGER_BUTTON, 200); + __raw_writel(BM_LRADC_CTRL1_LRADC0_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BM_LRADC_CTRL1_LRADC0_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_SET); + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_BUTTON, !0); +} + +static int stmpkbd_suspend(struct platform_device *pdev, pm_message_t state) +{ +#ifdef CONFIG_PM + struct input_dev *idev = platform_get_drvdata(pdev); + + hw_lradc_stop_ladder(LRADC_CH0, LRADC_DELAY_TRIGGER_BUTTON); + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_BUTTON, 0); + hw_lradc_unuse_channel(LRADC_CH0); + __raw_writel(BM_LRADC_CTRL1_LRADC0_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + stmpkbd_close(idev); +#endif + return 0; +} + +static int stmpkbd_resume(struct platform_device *pdev) +{ +#ifdef CONFIG_PM + struct input_dev *idev = platform_get_drvdata(pdev); + + __raw_writel(BM_LRADC_CTRL1_LRADC0_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_SET); + stmpkbd_open(idev); + hw_lradc_use_channel(LRADC_CH0); + stmpkbd_hwinit(pdev); +#endif + return 0; +} + +static int __devinit stmpkbd_probe(struct platform_device *pdev) +{ + int err = 0; + int irq = platform_get_irq(pdev, 0); + struct stmpkbd_data *d; + + /* Create and register the input driver. */ + d = stmpkbd_data_alloc(pdev, + (struct stmpkbd_keypair *)pdev->dev.platform_data); + if (!d) { + dev_err(&pdev->dev, "Cannot allocate driver structures\n"); + err = -ENOMEM; + goto err_out; + } + + d->irq = irq; + err = request_irq(irq, stmpkbd_irq_handler, + IRQF_DISABLED, pdev->name, pdev); + if (err) { + dev_err(&pdev->dev, "Cannot request keypad IRQ\n"); + goto err_free_dev; + } + + platform_set_drvdata(pdev, d); + + /* Register the input device */ + err = input_register_device(GET_INPUT_DEV(d)); + if (err) + goto err_free_irq; + + /* these two have to be set after registering the input device */ + d->input->rep[REP_DELAY] = delay1; + d->input->rep[REP_PERIOD] = delay2; + + hw_lradc_use_channel(LRADC_CH0); + stmpkbd_hwinit(pdev); + + return 0; + +err_free_irq: + platform_set_drvdata(pdev, NULL); + free_irq(irq, pdev); +err_free_dev: + stmpkbd_data_free(d); +err_out: + return err; +} + +static int __devexit stmpkbd_remove(struct platform_device *pdev) +{ + struct stmpkbd_data *d = platform_get_drvdata(pdev); + + hw_lradc_unuse_channel(LRADC_CH0); + input_unregister_device(GET_INPUT_DEV(d)); + free_irq(d->irq, pdev); + stmpkbd_data_free(d); + + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_driver stmpkbd_driver = { + .probe = stmpkbd_probe, + .remove = __devexit_p(stmpkbd_remove), + .suspend = stmpkbd_suspend, + .resume = stmpkbd_resume, + .driver = { + .name = "stmp3xxx-keyboard", + }, +}; + +static int __init stmpkbd_init(void) +{ + return platform_driver_register(&stmpkbd_driver); +} + +static void __exit stmpkbd_exit(void) +{ + platform_driver_unregister(&stmpkbd_driver); +} + +module_init(stmpkbd_init); +module_exit(stmpkbd_exit); +MODULE_DESCRIPTION("Freescale STMP3xxxx keyboard driver"); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/keyboard/atkbd.c +++ linux-fsl-imx51-2.6.31/drivers/input/keyboard/atkbd.c @@ -857,6 +857,14 @@ }; /* + * Dell Studio 1557 does not generate release keys for + * mute, volume up, & volume down + */ +static unsigned int atkdb_dell_studio_1157_force_relase_keys[] = { + 0xa0, 0xae, 0xb0, -1U +}; + +/* * Perform fixup for HP system that doesn't generate release * for its video switch */ @@ -910,6 +918,13 @@ }; /* + * Amilo Si 1848 key release for Fn+Volume keys not working + */ +static unsigned int atkbd_amilo_si1848_forced_release_keys[] = { + 0xa0, 0xae, 0xb0, -1U +}; + +/* * Amilo Xi 3650 key release for light touch bar not working */ static unsigned int atkbd_amilo_xi3650_forced_release_keys[] = { @@ -917,6 +932,14 @@ }; /* + * Fujitsu Siemens system with broken key release on volume keys and mute key + */ + +static unsigned int atkbd_amilo_xi_2428_forced_release_keys[] = { + 0xa0, 0xae, 0xb0, -1U +}; + +/* * Soltech TA12 system with broken key release on volume keys and mute key */ static unsigned int atkdb_soltech_ta12_forced_release_keys[] = { @@ -1527,6 +1550,15 @@ .driver_data = atkbd_dell_laptop_forced_release_keys, }, { + .ident = "Dell Stuido 1557", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkdb_dell_studio_1157_force_relase_keys, + }, + { .ident = "HP 2133", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), @@ -1608,6 +1640,24 @@ .driver_data = atkbd_samsung_forced_release_keys, }, { + .ident = "Samsung Q210/P210", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), + DMI_MATCH(DMI_PRODUCT_NAME, "Q210/P210"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_samsung_forced_release_keys, + }, + { + .ident = "Samsung R59P/R60P/R61P", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), + DMI_MATCH(DMI_PRODUCT_NAME, "R59P/R60P/R61P"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_samsung_forced_release_keys, + }, + { .ident = "Fujitsu Amilo PA 1510", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), @@ -1617,6 +1667,15 @@ .driver_data = atkbd_amilo_pa1510_forced_release_keys, }, { + .ident = "Fujitsu Amilo Si 1848+u", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), + DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Si 1848+u"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_amilo_si1848_forced_release_keys, + }, + { .ident = "Fujitsu Amilo Pi 3525", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), @@ -1635,6 +1694,43 @@ .driver_data = atkbd_amilo_xi3650_forced_release_keys, }, { + .ident = "Znote 6615WD", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Zepto"), + DMI_MATCH(DMI_PRODUCT_NAME, "Znote 6615WD"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_inventec_forced_release_keys, + }, + { + .ident = "Znote 6625WD", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Zepto"), + DMI_MATCH(DMI_PRODUCT_NAME, "Znote"), + DMI_MATCH(DMI_PRODUCT_VERSION, "6625WD"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_inventec_forced_release_keys, + }, + { + .ident = "AMILO Xi 2428", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), + DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2428"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkbd_amilo_xi_2428_forced_release_keys, + }, + { + .ident = "Soltech Corporation TA12", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Soltech Corporation"), + DMI_MATCH(DMI_PRODUCT_NAME, "TA12"), + }, + .callback = atkbd_setup_forced_release, + .driver_data = atkdb_soltech_ta12_forced_release_keys, + }, + { .ident = "Soltech Corporation TA12", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Soltech Corporation"), --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/stmp3xxx_ts.c +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/stmp3xxx_ts.c @@ -0,0 +1,422 @@ +/* + * Freesclae STMP37XX/STMP378X Touchscreen driver + * + * Author: Vitaly Wool + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* #define DEBUG*/ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define TOUCH_DEBOUNCE_TOLERANCE 100 + +struct stmp3xxx_ts_info { + int touch_irq; + int device_irq; + struct input_dev *idev; + enum { + TS_STATE_DISABLED, + TS_STATE_TOUCH_DETECT, + TS_STATE_TOUCH_VERIFY, + TS_STATE_X_PLANE, + TS_STATE_Y_PLANE, + } state; + u16 x; + u16 y; + int sample_count; +}; + +static inline void enter_state_touch_detect(struct stmp3xxx_ts_info *info) +{ + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(2)); + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(3)); + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(4)); + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(5)); + __raw_writel(BM_LRADC_CTRL1_LRADC5_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BM_LRADC_CTRL1_TOUCH_DETECT_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + /* + * turn off the yplus and yminus pullup and pulldown, and turn off touch + * detect (enables yminus, and xplus through a resistor.On a press, + * xplus is pulled down) + */ + __raw_writel(BM_LRADC_CTRL0_YMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_YPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_TOUCHSCREEN, 0); + info->state = TS_STATE_TOUCH_DETECT; + info->sample_count = 0; +} + +static inline void enter_state_disabled(struct stmp3xxx_ts_info *info) +{ + __raw_writel(BM_LRADC_CTRL0_YMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_YPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_TOUCHSCREEN, 0); + info->state = TS_STATE_DISABLED; + info->sample_count = 0; +} + + +static inline void enter_state_x_plane(struct stmp3xxx_ts_info *info) +{ + __raw_writel(BM_LRADC_CTRL0_YMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + __raw_writel(BM_LRADC_CTRL0_YPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + __raw_writel(BM_LRADC_CTRL0_XMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + + info->state = TS_STATE_X_PLANE; + info->sample_count = 0; +} + +static inline void enter_state_y_plane(struct stmp3xxx_ts_info *info) +{ + __raw_writel(BM_LRADC_CTRL0_YMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_YPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + __raw_writel(BM_LRADC_CTRL0_XPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + __raw_writel(BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + info->state = TS_STATE_Y_PLANE; + info->sample_count = 0; +} + +static inline void enter_state_touch_verify(struct stmp3xxx_ts_info *info) +{ + __raw_writel(BM_LRADC_CTRL0_YMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_YPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XMINUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_XPLUS_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR); + __raw_writel(BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE, + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + + info->state = TS_STATE_TOUCH_VERIFY; + hw_lradc_set_delay_trigger_kick(LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + info->sample_count = 0; +} + +static void process_lradc(struct stmp3xxx_ts_info *info, u16 x, u16 y, + int pressure) +{ + switch (info->state) { + case TS_STATE_X_PLANE: + pr_debug("%s: x plane state, sample_count %d\n", __func__, + info->sample_count); + if (info->sample_count < 2) { + info->x = x; + info->sample_count++; + } else { + if (abs(info->x - x) > TOUCH_DEBOUNCE_TOLERANCE) + info->sample_count = 1; + else { + u16 x_c = info->x * (info->sample_count - 1); + info->x = (x_c + x) / info->sample_count; + info->sample_count++; + } + } + if (info->sample_count > 4) + enter_state_y_plane(info); + else + hw_lradc_set_delay_trigger_kick( + LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + break; + + case TS_STATE_Y_PLANE: + pr_debug("%s: y plane state, sample_count %d\n", __func__, + info->sample_count); + if (info->sample_count < 2) { + info->y = y; + info->sample_count++; + } else { + if (abs(info->y - y) > TOUCH_DEBOUNCE_TOLERANCE) + info->sample_count = 1; + else { + u16 y_c = info->y * (info->sample_count - 1); + info->y = (y_c + y) / info->sample_count; + info->sample_count++; + } + } + if (info->sample_count > 4) + enter_state_touch_verify(info); + else + hw_lradc_set_delay_trigger_kick( + LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + break; + + case TS_STATE_TOUCH_VERIFY: + pr_debug("%s: touch verify state, sample_count %d\n", __func__, + info->sample_count); + pr_debug("%s: x %d, y %d\n", __func__, info->x, info->y); + input_report_abs(info->idev, ABS_X, info->x); + input_report_abs(info->idev, ABS_Y, info->y); + input_report_abs(info->idev, ABS_PRESSURE, pressure); + input_sync(info->idev); + /* fall through */ + case TS_STATE_TOUCH_DETECT: + pr_debug("%s: touch detect state, sample_count %d\n", __func__, + info->sample_count); + if (pressure) { + input_report_abs(info->idev, ABS_PRESSURE, pressure); + enter_state_x_plane(info); + hw_lradc_set_delay_trigger_kick( + LRADC_DELAY_TRIGGER_TOUCHSCREEN, 1); + } else + enter_state_touch_detect(info); + break; + + default: + printk(KERN_ERR "%s: unknown touchscreen state %d\n", __func__, + info->state); + } +} + +static irqreturn_t ts_handler(int irq, void *dev_id) +{ + struct stmp3xxx_ts_info *info = dev_id; + u16 x_plus, y_plus; + int pressure = 0; + + if (irq == info->touch_irq) + __raw_writel(BM_LRADC_CTRL1_TOUCH_DETECT_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + else if (irq == info->device_irq) + __raw_writel(BM_LRADC_CTRL1_LRADC5_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + + /* get x, y values */ + x_plus = __raw_readl(REGS_LRADC_BASE + HW_LRADC_CHn(LRADC_TOUCH_X_PLUS)) & BM_LRADC_CHn_VALUE; + y_plus = __raw_readl(REGS_LRADC_BASE + HW_LRADC_CHn(LRADC_TOUCH_Y_PLUS)) & BM_LRADC_CHn_VALUE; + + /* pressed? */ + if (__raw_readl(REGS_LRADC_BASE + HW_LRADC_STATUS) & BM_LRADC_STATUS_TOUCH_DETECT_RAW) + pressure = 1; + + pr_debug("%s: irq %d, x_plus %d, y_plus %d, pressure %d\n", + __func__, irq, x_plus, y_plus, pressure); + + process_lradc(info, x_plus, y_plus, pressure); + + return IRQ_HANDLED; +} + +static int stmp3xxx_ts_probe(struct platform_device *pdev) +{ + struct input_dev *idev; + struct stmp3xxx_ts_info *info; + int ret = 0; + struct resource *res; + + idev = input_allocate_device(); + info = kzalloc(sizeof(struct stmp3xxx_ts_info), GFP_KERNEL); + if (idev == NULL || info == NULL) { + ret = -ENOMEM; + goto out_nomem; + } + + idev->name = "STMP3XXX touchscreen"; + idev->evbit[0] = BIT(EV_ABS); + input_set_abs_params(idev, ABS_X, 0, 0xFFF, 0, 0); + input_set_abs_params(idev, ABS_Y, 0, 0xFFF, 0, 0); + input_set_abs_params(idev, ABS_PRESSURE, 0, 1, 0, 0); + + ret = input_register_device(idev); + if (ret) + goto out_nomem; + + info->idev = idev; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + printk(KERN_ERR "%s: couldn't get IRQ resource\n", __func__); + ret = -ENODEV; + goto out_nodev; + } + info->touch_irq = res->start; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 1); + if (!res) { + printk(KERN_ERR "%s: couldn't get IRQ resource\n", __func__); + ret = -ENODEV; + goto out_nodev; + } + info->device_irq = res->start; + + ret = request_irq(info->touch_irq, ts_handler, IRQF_DISABLED, + "stmp3xxx_ts_touch", info); + if (ret) + goto out_nodev; + + ret = request_irq(info->device_irq, ts_handler, IRQF_DISABLED, + "stmp3xxx_ts_dev", info); + if (ret) { + free_irq(info->touch_irq, info); + goto out_nodev; + } + enter_state_touch_detect(info); + + hw_lradc_use_channel(LRADC_CH2); + hw_lradc_use_channel(LRADC_CH3); + hw_lradc_use_channel(LRADC_CH5); + hw_lradc_configure_channel(LRADC_CH2, 0, 0, 0); + hw_lradc_configure_channel(LRADC_CH3, 0, 0, 0); + hw_lradc_configure_channel(LRADC_CH5, 0, 0, 0); + + /* Clear the accumulator & NUM_SAMPLES for the channels */ + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH2)); + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH3)); + __raw_writel(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH5)); + + hw_lradc_set_delay_trigger(LRADC_DELAY_TRIGGER_TOUCHSCREEN, + 0x3c, 0, 0, 8); + + __raw_writel(BM_LRADC_CTRL1_LRADC5_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BM_LRADC_CTRL1_TOUCH_DETECT_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + + __raw_writel(BM_LRADC_CTRL1_LRADC5_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_SET); + __raw_writel(BM_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_SET); + + platform_set_drvdata(pdev, info); + device_init_wakeup(&pdev->dev, 1); + goto out; + +out_nodev: + input_free_device(idev); +out_nomem: + kfree(idev); + kfree(info); +out: + return ret; +} + +static int stmp3xxx_ts_remove(struct platform_device *pdev) +{ + struct stmp3xxx_ts_info *info = platform_get_drvdata(pdev); + + platform_set_drvdata(pdev, NULL); + + hw_lradc_unuse_channel(LRADC_CH2); + hw_lradc_unuse_channel(LRADC_CH3); + hw_lradc_unuse_channel(LRADC_CH5); + __raw_writel(BM_LRADC_CTRL1_LRADC5_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BM_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + + free_irq(info->device_irq, info); + free_irq(info->touch_irq, info); + input_free_device(info->idev); + + enter_state_disabled(info); + kfree(info->idev); + kfree(info); + return 0; +} + +static int stmp3xxx_ts_suspend(struct platform_device *pdev, + pm_message_t state) +{ +#ifdef CONFIG_PM + if (!device_may_wakeup(&pdev->dev)) { + hw_lradc_unuse_channel(LRADC_CH2); + hw_lradc_unuse_channel(LRADC_CH3); + hw_lradc_unuse_channel(LRADC_CH5); + } +#endif + return 0; +} + +static int stmp3xxx_ts_resume(struct platform_device *pdev) +{ +#ifdef CONFIG_PM + if (!device_may_wakeup(&pdev->dev)) { + hw_lradc_use_channel(LRADC_CH2); + hw_lradc_use_channel(LRADC_CH3); + hw_lradc_use_channel(LRADC_CH5); + } +#endif + return 0; +} + +static struct platform_driver stmp3xxx_ts_driver = { + .probe = stmp3xxx_ts_probe, + .remove = stmp3xxx_ts_remove, + .suspend = stmp3xxx_ts_suspend, + .resume = stmp3xxx_ts_resume, + .driver = { + .name = "stmp3xxx_ts", + }, +}; + +static int __init stmp3xxx_ts_init(void) +{ + return platform_driver_register(&stmp3xxx_ts_driver); +} + +static void __exit stmp3xxx_ts_exit(void) +{ + platform_driver_unregister(&stmp3xxx_ts_driver); +} + +module_init(stmp3xxx_ts_init); +module_exit(stmp3xxx_ts_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/Kconfig @@ -225,6 +225,38 @@ To compile this driver as a module, choose M here: the module will be called jornada720_ts. +config TOUCHSCREEN_MXC + tristate "MXC touchscreen input driver" + depends on MXC_MC13783_ADC || MXC_MC13892_ADC + help + Say Y here if you have an MXC based board with touchscreen + attached to it. + + If unsure, say N. + + To compile this driver as a module, choose M here: the + module will be called mxc_ts. + +config TOUCHSCREEN_IMX_ADC + tristate "Freescale i.MX ADC touchscreen input driver" + depends on IMX_ADC + help + Say Y here if you have a Freescale i.MX based board with a + touchscreen interfaced to the processor's integrated ADC. + + If unsure, say N. + + To compile this driver as a module, choose M here: the + module will be called imx_adc_ts. + +config TOUCHSCREEN_STMP3XXX + tristate "STMP3XXX LRADC-based touchscreen" + depends on ARCH_STMP3XXX + select SERIO + help + Say Y here if you want to enable TMP3XXX LRADC-based touchscreen. + module will be called stmp3xxx_ts. + config TOUCHSCREEN_HTCPEN tristate "HTC Shift X9500 touchscreen" depends on ISA --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/Makefile +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/Makefile @@ -23,6 +23,9 @@ obj-$(CONFIG_TOUCHSCREEN_HP600) += hp680_ts_input.o obj-$(CONFIG_TOUCHSCREEN_HP7XX) += jornada720_ts.o obj-$(CONFIG_TOUCHSCREEN_HTCPEN) += htcpen.o +obj-$(CONFIG_TOUCHSCREEN_MXC) += mxc_ts.o +obj-$(CONFIG_TOUCHSCREEN_IMX_ADC) += imx_adc_ts.o +obj-$(CONFIG_TOUCHSCREEN_STMP3XXX) += stmp3xxx_ts.o obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE) += usbtouchscreen.o obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/tsc2007.c +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/tsc2007.c @@ -21,15 +21,13 @@ */ #include -#include #include #include #include #include #include -#define TS_POLL_DELAY (10 * 1000) /* ns delay before the first sample */ -#define TS_POLL_PERIOD (5 * 1000) /* ns delay between samples */ +#define TS_POLL_PERIOD msecs_to_jiffies(1) /* ms delay between samples */ #define TSC2007_MEASURE_TEMP0 (0x0 << 4) #define TSC2007_MEASURE_AUX (0x2 << 4) @@ -70,13 +68,11 @@ struct tsc2007 { struct input_dev *input; char phys[32]; - struct hrtimer timer; + struct delayed_work work; struct ts_event tc; struct i2c_client *client; - spinlock_t lock; - u16 model; u16 x_plate_ohms; @@ -142,8 +138,7 @@ if (rt > MAX_12BIT) { dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt); - hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD), - HRTIMER_MODE_REL); + schedule_delayed_work(&ts->work, TS_POLL_PERIOD); return; } @@ -153,7 +148,7 @@ * in some cases may not even settle at the expected value. * * The only safe way to check for the pen up condition is in the - * timer by reading the pen signal state (it's a GPIO _and_ IRQ). + * work function by reading the pen signal state (it's a GPIO and IRQ). */ if (rt) { struct input_dev *input = ts->input; @@ -175,8 +170,7 @@ x, y, rt); } - hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD), - HRTIMER_MODE_REL); + schedule_delayed_work(&ts->work, TS_POLL_PERIOD); } static int tsc2007_read_values(struct tsc2007 *tsc) @@ -197,13 +191,10 @@ return 0; } -static enum hrtimer_restart tsc2007_timer(struct hrtimer *handle) +static void tsc2007_work(struct work_struct *work) { - struct tsc2007 *ts = container_of(handle, struct tsc2007, timer); - unsigned long flags; - - spin_lock_irqsave(&ts->lock, flags); - + struct tsc2007 *ts = + container_of(to_delayed_work(work), struct tsc2007, work); if (unlikely(!ts->get_pendown_state() && ts->pendown)) { struct input_dev *input = ts->input; @@ -222,30 +213,20 @@ tsc2007_read_values(ts); tsc2007_send_event(ts); } - - spin_unlock_irqrestore(&ts->lock, flags); - - return HRTIMER_NORESTART; } static irqreturn_t tsc2007_irq(int irq, void *handle) { struct tsc2007 *ts = handle; - unsigned long flags; - - spin_lock_irqsave(&ts->lock, flags); if (likely(ts->get_pendown_state())) { disable_irq_nosync(ts->irq); - hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_DELAY), - HRTIMER_MODE_REL); + schedule_delayed_work(&ts->work, 0); } if (ts->clear_penirq) ts->clear_penirq(); - spin_unlock_irqrestore(&ts->lock, flags); - return IRQ_HANDLED; } @@ -278,11 +259,6 @@ ts->input = input_dev; - hrtimer_init(&ts->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - ts->timer.function = tsc2007_timer; - - spin_lock_init(&ts->lock); - ts->model = pdata->model; ts->x_plate_ohms = pdata->x_plate_ohms; ts->get_pendown_state = pdata->get_pendown_state; @@ -290,6 +266,11 @@ pdata->init_platform_hw(); + if (tsc2007_xfer(ts, PWRDOWN) < 0) { + err = -ENODEV; + goto err_no_dev; + } + snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(&client->dev)); @@ -308,6 +289,8 @@ ts->irq = client->irq; + INIT_DELAYED_WORK(&ts->work, tsc2007_work); + err = request_irq(ts->irq, tsc2007_irq, 0, client->dev.driver->name, ts); if (err < 0) { @@ -325,9 +308,10 @@ err_free_irq: free_irq(ts->irq, ts); - hrtimer_cancel(&ts->timer); err_free_mem: input_free_device(input_dev); + err_no_dev: + pdata->exit_platform_hw(); kfree(ts); return err; } @@ -337,11 +321,12 @@ struct tsc2007 *ts = i2c_get_clientdata(client); struct tsc2007_platform_data *pdata; + cancel_delayed_work_sync(&ts->work); + pdata = client->dev.platform_data; pdata->exit_platform_hw(); free_irq(ts->irq, ts); - hrtimer_cancel(&ts->timer); input_unregister_device(ts->input); kfree(ts); --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/mxc_ts.c +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/mxc_ts.c @@ -0,0 +1,118 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_ts.c + * + * @brief Driver for the Freescale Semiconductor MXC touchscreen. + * + * The touchscreen driver is designed as a standard input driver which is a + * wrapper over low level PMIC driver. Most of the hardware configuration and + * touchscreen functionality is implemented in the low level PMIC driver. During + * initialization, this driver creates a kernel thread. This thread then calls + * PMIC driver to obtain touchscreen values continously. These values are then + * passed to the input susbsystem. + * + * @ingroup touchscreen + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_TS_NAME "mxc_ts" + +static struct input_dev *mxc_inputdev = NULL; +static u32 input_ts_installed; + +static int ts_thread(void *arg) +{ + t_touch_screen ts_sample; + s32 wait = 0; + + daemonize("mxc_ts"); + while (input_ts_installed) { + try_to_freeze(); + memset(&ts_sample, 0, sizeof(t_touch_screen)); + if (0 != pmic_adc_get_touch_sample(&ts_sample, !wait)) + continue; + if (!(ts_sample.contact_resistance || wait)) + continue; + + input_report_abs(mxc_inputdev, ABS_X, ts_sample.x_position); + input_report_abs(mxc_inputdev, ABS_Y, ts_sample.y_position); + input_report_abs(mxc_inputdev, ABS_PRESSURE, + ts_sample.contact_resistance); + input_sync(mxc_inputdev); + + wait = ts_sample.contact_resistance; + msleep(20); + } + + return 0; +} + +static int __init mxc_ts_init(void) +{ + int retval; + + if (!is_pmic_adc_ready()) + return -ENODEV; + + mxc_inputdev = input_allocate_device(); + if (!mxc_inputdev) { + printk(KERN_ERR + "mxc_ts_init: not enough memory for input device\n"); + return -ENOMEM; + } + + mxc_inputdev->name = MXC_TS_NAME; + mxc_inputdev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); + mxc_inputdev->keybit[BIT_WORD(BTN_TOUCH)] |= BIT_MASK(BTN_TOUCH); + mxc_inputdev->absbit[0] = + BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) | BIT_MASK(ABS_PRESSURE); + retval = input_register_device(mxc_inputdev); + if (retval < 0) { + input_free_device(mxc_inputdev); + return retval; + } + + input_ts_installed = 1; + kernel_thread(ts_thread, NULL, CLONE_VM | CLONE_FS); + printk("mxc input touchscreen loaded\n"); + return 0; +} + +static void __exit mxc_ts_exit(void) +{ + input_ts_installed = 0; + input_unregister_device(mxc_inputdev); + + if (mxc_inputdev) { + input_free_device(mxc_inputdev); + mxc_inputdev = NULL; + } +} + +late_initcall(mxc_ts_init); +module_exit(mxc_ts_exit); + +MODULE_DESCRIPTION("MXC input touchscreen driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/touchscreen/imx_adc_ts.c +++ linux-fsl-imx51-2.6.31/drivers/input/touchscreen/imx_adc_ts.c @@ -0,0 +1,114 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file imx_adc_ts.c + * + * @brief Driver for the Freescale Semiconductor i.MX ADC touchscreen. + * + * This touchscreen driver is designed as a standard input driver. It is a + * wrapper around the low level ADC driver. Much of the hardware configuration + * and touchscreen functionality is implemented in the low level ADC driver. + * During initialization, this driver creates a kernel thread. This thread + * then calls the ADC driver to obtain touchscreen values continously. These + * values are then passed to the input susbsystem. + * + * @ingroup touchscreen + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define IMX_ADC_TS_NAME "imx_adc_ts" + +static struct input_dev *imx_inputdev; +static u32 input_ts_installed; + +static int ts_thread(void *arg) +{ + struct t_touch_screen ts_sample; + int wait = 0; + daemonize("imx_adc_ts"); + while (input_ts_installed) { + try_to_freeze(); + + memset(&ts_sample, 0, sizeof(ts_sample)); + if (0 != imx_adc_get_touch_sample(&ts_sample, !wait)) + continue; + + input_report_abs(imx_inputdev, ABS_X, ts_sample.x_position); + input_report_abs(imx_inputdev, ABS_Y, ts_sample.y_position); + input_report_abs(imx_inputdev, ABS_PRESSURE, + ts_sample.contact_resistance); + input_sync(imx_inputdev); + wait = ts_sample.contact_resistance; + msleep(10); + } + + return 0; +} + +static int __init imx_adc_ts_init(void) +{ + int retval; + + if (!is_imx_adc_ready()) + return -ENODEV; + + imx_inputdev = input_allocate_device(); + if (!imx_inputdev) { + pr_err("imx_ts_init: not enough memory for input device\n"); + return -ENOMEM; + } + + imx_inputdev->name = IMX_ADC_TS_NAME; + imx_inputdev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); + imx_inputdev->keybit[BIT_WORD(BTN_TOUCH)] |= BIT_MASK(BTN_TOUCH); + imx_inputdev->absbit[0] = + BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) | BIT_MASK(ABS_PRESSURE); + retval = input_register_device(imx_inputdev); + if (retval < 0) { + input_free_device(imx_inputdev); + return retval; + } + + input_ts_installed = 1; + kthread_run(ts_thread, NULL, "ts_thread"); + pr_info("i.MX ADC input touchscreen loaded.\n"); + return 0; +} + +static void __exit imx_adc_ts_exit(void) +{ + input_ts_installed = 0; + input_unregister_device(imx_inputdev); + + if (imx_inputdev) { + input_free_device(imx_inputdev); + imx_inputdev = NULL; + } +} + +late_initcall(imx_adc_ts_init); +module_exit(imx_adc_ts_exit); + +MODULE_DESCRIPTION("i.MX ADC input touchscreen driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/input/serio/i8042-x86ia64io.h +++ linux-fsl-imx51-2.6.31/drivers/input/serio/i8042-x86ia64io.h @@ -457,6 +457,34 @@ }, { } }; + +static struct dmi_system_id __initdata i8042_dmi_laptop_table[] = { + { + .ident = "Portable", + .matches = { + DMI_MATCH(DMI_CHASSIS_TYPE, "8"), /* Portable */ + }, + }, + { + .ident = "Laptop", + .matches = { + DMI_MATCH(DMI_CHASSIS_TYPE, "9"), /* Laptop */ + }, + }, + { + .ident = "Notebook", + .matches = { + DMI_MATCH(DMI_CHASSIS_TYPE, "10"), /* Notebook */ + }, + }, + { + .ident = "Sub-Notebook", + .matches = { + DMI_MATCH(DMI_CHASSIS_TYPE, "14"), /* Sub-Notebook */ + }, + }, + { } +}; #endif /* @@ -735,6 +763,11 @@ i8042_kbd_irq = i8042_pnp_kbd_irq; i8042_aux_irq = i8042_pnp_aux_irq; +#ifdef CONFIG_X86 + i8042_bypass_aux_irq_test = !pnp_data_busted && + dmi_check_system(i8042_dmi_laptop_table); +#endif + return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/input/serio/i8042.c +++ linux-fsl-imx51-2.6.31/drivers/input/serio/i8042.c @@ -83,6 +83,8 @@ MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); #endif +static bool i8042_bypass_aux_irq_test; + #include "i8042.h" static DEFINE_SPINLOCK(i8042_lock); @@ -641,7 +643,7 @@ * used it for a PCI card or somethig else. */ - if (i8042_noloop || aux_loop_broken) { + if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { /* * Without LOOP command we can't test AUX IRQ delivery. Assume the port * is working and hope we are right. --- linux-fsl-imx51-2.6.31.orig/drivers/input/mouse/synaptics.c +++ linux-fsl-imx51-2.6.31/drivers/input/mouse/synaptics.c @@ -652,6 +652,16 @@ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M300"), }, + + }, + { + .ident = "Toshiba Portege M300", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), + DMI_MATCH(DMI_PRODUCT_NAME, "Portable PC"), + DMI_MATCH(DMI_PRODUCT_VERSION, "Version 1.0"), + }, + }, { } }; --- linux-fsl-imx51-2.6.31.orig/drivers/input/mouse/alps.h +++ linux-fsl-imx51-2.6.31/drivers/input/mouse/alps.h @@ -23,6 +23,7 @@ char phys[32]; /* Phys */ const struct alps_model_info *i;/* Info */ int prev_fin; /* Finger bit from previous packet */ + struct timer_list timer; }; #ifdef CONFIG_MOUSE_PS2_ALPS --- linux-fsl-imx51-2.6.31.orig/drivers/input/mouse/alps.c +++ linux-fsl-imx51-2.6.31/drivers/input/mouse/alps.c @@ -5,6 +5,7 @@ * Copyright (c) 2003-2005 Peter Osterlund * Copyright (c) 2004 Dmitry Torokhov * Copyright (c) 2005 Vojtech Pavlik + * Copyright (c) 2009 Sebastian Kapfer * * ALPS detection, tap switching and status querying info is taken from * tpconfig utility (by C. Scott Ananian and Bruce Kall). @@ -35,6 +36,8 @@ #define ALPS_OLDPROTO 0x10 #define ALPS_PASS 0x20 #define ALPS_FW_BK_2 0x40 +#define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with + 6-byte ALPS packet */ static const struct alps_model_info alps_model_data[] = { { { 0x32, 0x02, 0x14 }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */ @@ -55,7 +58,9 @@ { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */ { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */ - { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */ + /* Dell Latitude E5500, E6400, E6500, Precision M4400 */ + { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, + ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FW_BK_1 }, /* Dell Vostro 1400 */ }; @@ -66,20 +71,88 @@ */ /* - * ALPS abolute Mode - new format + * PS/2 packet format + * + * byte 0: 0 0 YSGN XSGN 1 M R L + * byte 1: X7 X6 X5 X4 X3 X2 X1 X0 + * byte 2: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 + * + * Note that the device never signals overflow condition. + * + * ALPS absolute Mode - new format * * byte 0: 1 ? ? ? 1 ? ? ? * byte 1: 0 x6 x5 x4 x3 x2 x1 x0 - * byte 2: 0 x10 x9 x8 x7 ? fin ges + * byte 2: 0 x10 x9 x8 x7 ? fin ges * byte 3: 0 y9 y8 y7 1 M R L * byte 4: 0 y6 y5 y4 y3 y2 y1 y0 * byte 5: 0 z6 z5 z4 z3 z2 z1 z0 * + * Dualpoint device -- interleaved packet format + * + * byte 0: 1 1 0 0 1 1 1 1 + * byte 1: 0 x6 x5 x4 x3 x2 x1 x0 + * byte 2: 0 x10 x9 x8 x7 0 fin ges + * byte 3: 0 0 YSGN XSGN 1 1 1 1 + * byte 4: X7 X6 X5 X4 X3 X2 X1 X0 + * byte 5: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 + * byte 6: 0 y9 y8 y7 1 m r l + * byte 7: 0 y6 y5 y4 y3 y2 y1 y0 + * byte 8: 0 z6 z5 z4 z3 z2 z1 z0 + * + * CAPITALS = stick, miniscules = touchpad + * * ?'s can have different meanings on different models, * such as wheel rotation, extra buttons, stick buttons * on a dualpoint, etc. */ +static bool alps_is_valid_first_byte(const struct alps_model_info *model, + unsigned char data) +{ + return (data & model->mask0) == model->byte0; +} + +static void alps_report_buttons(struct psmouse *psmouse, + struct input_dev *dev1, struct input_dev *dev2, + int left, int right, int middle) +{ + struct alps_data *priv = psmouse->private; + const struct alps_model_info *model = priv->i; + + if (model->flags & ALPS_PS2_INTERLEAVED) { + struct input_dev *dev; + + /* + * If shared button has already been reported on the + * other device (dev2) then this event should be also + * sent through that device. + */ + dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1; + input_report_key(dev, BTN_LEFT, left); + + dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1; + input_report_key(dev, BTN_RIGHT, right); + + dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1; + input_report_key(dev, BTN_MIDDLE, middle); + + /* + * Sync the _other_ device now, we'll do the first + * device later once we report the rest of the events. + */ + input_sync(dev2); + } else { + /* + * For devices with non-interleaved packets we know what + * device buttons belong to so we can simply report them. + */ + input_report_key(dev1, BTN_LEFT, left); + input_report_key(dev1, BTN_RIGHT, right); + input_report_key(dev1, BTN_MIDDLE, middle); + } +} + static void alps_process_packet(struct psmouse *psmouse) { struct alps_data *priv = psmouse->private; @@ -89,18 +162,6 @@ int x, y, z, ges, fin, left, right, middle; int back = 0, forward = 0; - if ((packet[0] & 0xc8) == 0x08) { /* 3-byte PS/2 packet */ - input_report_key(dev2, BTN_LEFT, packet[0] & 1); - input_report_key(dev2, BTN_RIGHT, packet[0] & 2); - input_report_key(dev2, BTN_MIDDLE, packet[0] & 4); - input_report_rel(dev2, REL_X, - packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0); - input_report_rel(dev2, REL_Y, - packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0); - input_sync(dev2); - return; - } - if (priv->i->flags & ALPS_OLDPROTO) { left = packet[2] & 0x10; right = packet[2] & 0x08; @@ -136,18 +197,13 @@ input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x)); input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y)); - input_report_key(dev2, BTN_LEFT, left); - input_report_key(dev2, BTN_RIGHT, right); - input_report_key(dev2, BTN_MIDDLE, middle); + alps_report_buttons(psmouse, dev2, dev, left, right, middle); - input_sync(dev); input_sync(dev2); return; } - input_report_key(dev, BTN_LEFT, left); - input_report_key(dev, BTN_RIGHT, right); - input_report_key(dev, BTN_MIDDLE, middle); + alps_report_buttons(psmouse, dev, dev2, left, right, middle); /* Convert hardware tap to a reasonable Z value */ if (ges && !fin) z = 40; @@ -188,25 +244,168 @@ input_sync(dev); } +static void alps_report_bare_ps2_packet(struct psmouse *psmouse, + unsigned char packet[], + bool report_buttons) +{ + struct alps_data *priv = psmouse->private; + struct input_dev *dev2 = priv->dev2; + + if (report_buttons) + alps_report_buttons(psmouse, dev2, psmouse->dev, + packet[0] & 1, packet[0] & 2, packet[0] & 4); + + input_report_rel(dev2, REL_X, + packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0); + input_report_rel(dev2, REL_Y, + packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0); + + input_sync(dev2); +} + +static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse) +{ + struct alps_data *priv = psmouse->private; + + if (psmouse->pktcnt < 6) + return PSMOUSE_GOOD_DATA; + + if (psmouse->pktcnt == 6) { + /* + * Start a timer to flush the packet if it ends up last + * 6-byte packet in the stream. Timer needs to fire + * psmouse core times out itself. 20 ms should be enough + * to decide if we are getting more data or not. + */ + mod_timer(&priv->timer, jiffies + msecs_to_jiffies(20)); + return PSMOUSE_GOOD_DATA; + } + + del_timer(&priv->timer); + + if (psmouse->packet[6] & 0x80) { + + /* + * Highest bit is set - that means we either had + * complete ALPS packet and this is start of the + * next packet or we got garbage. + */ + + if (((psmouse->packet[3] | + psmouse->packet[4] | + psmouse->packet[5]) & 0x80) || + (!alps_is_valid_first_byte(priv->i, psmouse->packet[6]))) { + dbg("refusing packet %x %x %x %x " + "(suspected interleaved ps/2)\n", + psmouse->packet[3], psmouse->packet[4], + psmouse->packet[5], psmouse->packet[6]); + return PSMOUSE_BAD_DATA; + } + + alps_process_packet(psmouse); + + /* Continue with the next packet */ + psmouse->packet[0] = psmouse->packet[6]; + psmouse->pktcnt = 1; + + } else { + + /* + * High bit is 0 - that means that we indeed got a PS/2 + * packet in the middle of ALPS packet. + * + * There is also possibility that we got 6-byte ALPS + * packet followed by 3-byte packet from trackpoint. We + * can not distinguish between these 2 scenarios but + * becase the latter is unlikely to happen in course of + * normal operation (user would need to press all + * buttons on the pad and start moving trackpoint + * without touching the pad surface) we assume former. + * Even if we are wrong the wost thing that would happen + * the cursor would jump but we should not get protocol + * desynchronization. + */ + + alps_report_bare_ps2_packet(psmouse, &psmouse->packet[3], + false); + + /* + * Continue with the standard ALPS protocol handling, + * but make sure we won't process it as an interleaved + * packet again, which may happen if all buttons are + * pressed. To avoid this let's reset the 4th bit which + * is normally 1. + */ + psmouse->packet[3] = psmouse->packet[6] & 0xf7; + psmouse->pktcnt = 4; + } + + return PSMOUSE_GOOD_DATA; +} + +static void alps_flush_packet(unsigned long data) +{ + struct psmouse *psmouse = (struct psmouse *)data; + + serio_pause_rx(psmouse->ps2dev.serio); + + if (psmouse->pktcnt == 6) { + + /* + * We did not any more data in reasonable amount of time. + * Validate the last 3 bytes and process as a standard + * ALPS packet. + */ + if ((psmouse->packet[3] | + psmouse->packet[4] | + psmouse->packet[5]) & 0x80) { + dbg("refusing packet %x %x %x " + "(suspected interleaved ps/2)\n", + psmouse->packet[3], psmouse->packet[4], + psmouse->packet[5]); + } else { + alps_process_packet(psmouse); + } + psmouse->pktcnt = 0; + } + + serio_continue_rx(psmouse->ps2dev.serio); +} + static psmouse_ret_t alps_process_byte(struct psmouse *psmouse) { struct alps_data *priv = psmouse->private; + const struct alps_model_info *model = priv->i; if ((psmouse->packet[0] & 0xc8) == 0x08) { /* PS/2 packet */ if (psmouse->pktcnt == 3) { - alps_process_packet(psmouse); + alps_report_bare_ps2_packet(psmouse, psmouse->packet, + true); return PSMOUSE_FULL_PACKET; } return PSMOUSE_GOOD_DATA; } - if ((psmouse->packet[0] & priv->i->mask0) != priv->i->byte0) + /* Check for PS/2 packet stuffed in the middle of ALPS packet. */ + + if ((model->flags & ALPS_PS2_INTERLEAVED) && + psmouse->pktcnt >= 4 && (psmouse->packet[3] & 0x0f) == 0x0f) { + return alps_handle_interleaved_ps2(psmouse); + } + + if (!alps_is_valid_first_byte(model, psmouse->packet[0])) { + dbg("refusing packet[0] = %x (mask0 = %x, byte0 = %x)\n", + psmouse->packet[0], model->mask0, model->byte0); return PSMOUSE_BAD_DATA; + } /* Bytes 2 - 6 should have 0 in the highest bit */ if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= 6 && - (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) + (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) { + dbg("refusing packet[%i] = %x\n", + psmouse->pktcnt - 1, psmouse->packet[psmouse->pktcnt - 1]); return PSMOUSE_BAD_DATA; + } if (psmouse->pktcnt == 6) { alps_process_packet(psmouse); @@ -428,7 +627,8 @@ static int alps_reconnect(struct psmouse *psmouse) { - psmouse_reset(psmouse); + /* UBUNTU: Causes lockups on resume */ + /* psmouse_reset(psmouse); */ if (alps_hw_init(psmouse, NULL)) return -1; @@ -441,6 +641,7 @@ struct alps_data *priv = psmouse->private; psmouse_reset(psmouse); + del_timer_sync(&priv->timer); input_unregister_device(priv->dev2); kfree(priv); } @@ -457,6 +658,8 @@ goto init_fail; priv->dev2 = dev2; + setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse); + psmouse->private = priv; if (alps_hw_init(psmouse, &version)) --- linux-fsl-imx51-2.6.31.orig/drivers/w1/w1_family.h +++ linux-fsl-imx51-2.6.31/drivers/w1/w1_family.h @@ -32,8 +32,10 @@ #define W1_THERM_DS18S20 0x10 #define W1_THERM_DS1822 0x22 #define W1_EEPROM_DS2433 0x23 +#define W1_EEPROM_DS2751 0x51 #define W1_THERM_DS18B20 0x28 #define W1_EEPROM_DS2431 0x2D +#define W1_FAMILY_DS2438 0x26 #define W1_FAMILY_DS2760 0x30 #define MAXNAMELEN 32 --- linux-fsl-imx51-2.6.31.orig/drivers/w1/w1_netlink.c +++ linux-fsl-imx51-2.6.31/drivers/w1/w1_netlink.c @@ -306,9 +306,8 @@ return error; } -static void w1_cn_callback(void *data) +static void w1_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { - struct cn_msg *msg = data; struct w1_netlink_msg *m = (struct w1_netlink_msg *)(msg + 1); struct w1_netlink_cmd *cmd; struct w1_slave *sl; --- linux-fsl-imx51-2.6.31.orig/drivers/w1/slaves/w1_ds2438.h +++ linux-fsl-imx51-2.6.31/drivers/w1/slaves/w1_ds2438.h @@ -0,0 +1,119 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __W1_DS2438_H__ +#define __W1_DS2438_H__ + +#include + +#include +#include +#include +#include +#include + +#define DS2438_DEV_NAME "ds2438-battery" + +#define DS2438_PAGE_SIZE 8 +#define DS2438_PAGE_NUM 8 + +#define DS2438_CONVERT_TEMP 0x44 +#define DS2438_CONVERT_VOLT 0xB4 +#define DS2438_WRITE_SCRATCHPAD 0x4E +#define DS2438_COPY_SCRATCHPAD 0x48 +#define DS2438_RECALL_MEMORY 0xB8 + +enum DS2438_PAGE { + PAGE0_CONTROL = 0, + PAGE1_ETM, + PAGE2_STAMP, + PAGE3_RESV3, + PAGE4_RESV4, + PAGE5_RESV5, + PAGE6_RESV6, + PAGE7_CCA, +}; + +enum DS2438_REG { + /* PAGE 0 */ + PAGE0_STAT_CTRL = 0, + PAGE0_TEMP_LSB = 1, + PAGE0_TEMP_MSB = 2, + PAGE0_VOLTAGE_LSB = 3, + PAGE0_VOLTAGE_MSB = 4, + PAGE0_CURRENT_LSB = 5, + PAGE0_CURRENT_MSB = 6, + PAGE0_THRESHOLD = 7, + + /* PAGE 1 */ + PAGE1_ETM_BYTE0 = 0, + PAGE1_ETM_BYTE1 = 1, + PAGE1_ETM_BYTE2 = 2, + PAGE1_ETM_BYTE3 = 3, + PAGE1_ICA = 4, + PAGE1_OFFSET_LSB = 5, + PAGE1_OFFSET_MSB = 6, + + /* PAGE 2 */ + PAGE2_DISCONNECT_BYTE0 = 0, + PAGE2_DISCONNECT_BYTE1 = 1, + PAGE2_DISCONNECT_BYTE2 = 2, + PAGE2_DISCONNECT_BYTE3 = 3, + PAGE2_END_CHARGE_BYTE0 = 4, + PAGE2_END_CHARGE_BYTE1 = 5, + PAGE2_END_CHARGE_BYTE2 = 6, + PAGE2_END_CHARGE_BYTE3 = 7, + + /* PAGE 3 */ + /* PAGE 4 */ + /* PAGE 5 */ + /* PAGE 6 */ + /* PAGE 7 */ + PAGE7_CCA_LSB = 4, + PAGE7_CCA_MSB = 5, + PAGE7_DCA_LSB = 6, + PAGE7_DCA_MSB = 7, +}; + +#define DS2438_CTRL_IAD (1 << 0) +#define DS2438_CTRL_CA (1 << 1) +#define DS2438_CTRL_EE (1 << 2) +#define DS2438_CTRL_AD (1 << 3) +#define DS2438_STAT_TB (1 << 4) +#define DS2438_STAT_NVB (1 << 5) +#define DS2438_STAT_ADB (1 << 6) + +struct ds2438_ops { + int (*read_page) (struct device *, u8, u8 *); + int (*read_byte) (struct device *, u8, u8, u8 *); + int (*read_halfword) (struct device *, u8, u8, u16 *); + int (*read_word) (struct device *, u8, u8, u32 *); + int (*write_page) (struct device *, u8, u8 *); + int (*write_byte) (struct device *, u8, u8, u8); + int (*write_halfword) (struct device *, u8, u8, u16); + int (*write_word) (struct device *, u8, u8, u32); + int (*drain_sram) (struct device *, u8); + int (*load_sram) (struct device *, u8); + int (*command) (struct device *, u8, u8); +}; + +static inline u16 ds2438_readw(u8 *raw) +{ + return ((*(raw + 1)) << 8) | (*raw); +} + +static inline void ds2438_writew(u8 *raw, u16 data) +{ + *raw++ = data & 0xFF; + *raw = (data >> 8) & 0xFF; +} +#endif /* __W1_DS2438_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/w1/slaves/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/w1/slaves/Kconfig @@ -22,12 +22,34 @@ Say Y here if you want to use a 1-wire 1kb EEPROM family device (DS2431) +config W1_SLAVE_DS2751 + tristate "Battery Level sensing support (DS2751)" + depends on W1 + help + Say Y here if you want to use a 1-wire + battery level sensing device (DS2751). + +config W1_SLAVE_DS2751_CRC + bool "Protect DS2751 data with a CRC16" + depends on W1_SLAVE_DS2751 + select CRC16 + help + Say Y here to protect DS2751 data with a CRC16. + Each block has 30 bytes of data and a two byte CRC16. + Full block writes are only allowed if the CRC is valid. + config W1_SLAVE_DS2433 tristate "4kb EEPROM family support (DS2433)" help Say Y here if you want to use a 1-wire 4kb EEPROM family device (DS2433). +config W1_SLAVE_DS2438 + tristate "Smart Battery Monitor (DS2438)" + help + Say Y here if you want to use a 1-wire + Smart Battery Monitor family device (DS2438). + config W1_SLAVE_DS2433_CRC bool "Protect DS2433 data with a CRC16" depends on W1_SLAVE_DS2433 --- linux-fsl-imx51-2.6.31.orig/drivers/w1/slaves/w1_ds2438.c +++ linux-fsl-imx51-2.6.31/drivers/w1/slaves/w1_ds2438.c @@ -0,0 +1,585 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../w1.h" +#include "../w1_int.h" +#include "../w1_family.h" +#include "w1_ds2438.h" + +struct ds2438_device_info { + /* DS2438 data, valid after calling ds2438_battery_read_status() */ + unsigned long update_time; /* jiffies when data read */ + char raw[DS2438_PAGE_SIZE]; /* raw DS2438 data */ + int voltage_uV; + int current_uA; + int accum_current_uAh; + int temp_C; + int charge_status; + u8 init:1; + u8 setup:1; + u8 calibrate:1; + u8 input_src:1; + u8 ee_flg:1; + u8 resv_bit:3; + u8 threshold:8; + u16 resv_bytes; + u32 senser; + + struct power_supply bat; + struct device *w1_dev; + struct ds2438_ops ops; + struct workqueue_struct *monitor_wqueue; + struct delayed_work monitor_work; +}; + +#define DS2438_SENSER 25 +#define to_ds2438_device_info(x) container_of((x), struct ds2438_device_info, \ + bat); + + +static enum power_supply_property ds2438_battery_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_CHARGE_NOW, +}; + +static char ds2438_sensers_title[] = "DS2438 senserin thousands of resister:"; +static unsigned int cache_time = 1000; +module_param(cache_time, uint, 0644); +MODULE_PARM_DESC(cache_time, "cache time in milliseconds"); + +static ssize_t ds2438_show_input(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + return sprintf(buf, "%s\n", di->input_src ? "1:VDD" : "0:VAD"); +} + +static ssize_t ds2438_show_senser(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int len; + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + len = sprintf(buf, "%s\n", ds2438_sensers_title); + len += sprintf(buf + len, "%d\n", di->senser); + return len; +} + +static ssize_t ds2438_show_ee(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + return sprintf(buf, "%d\n", di->ee_flg); +} + +static ssize_t ds2438_show_threshold(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + return sprintf(buf, "%d\n", di->threshold); +} + +static ssize_t ds2438_set_input(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + di->input_src = !!simple_strtoul(buf, NULL, 0); + return count; +} + +static ssize_t ds2438_set_senser(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + u32 resister; + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + resister = simple_strtoul(buf, NULL, 0); + if (resister) + di->senser = resister; + return count; +} + +static ssize_t ds2438_set_ee(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + di->ee_flg = !!simple_strtoul(buf, NULL, 0); + di->setup = 1; + return count; +} + +static ssize_t ds2438_set_threshold(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int threshold; + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + threshold = simple_strtoul(buf, NULL, 0); + if (threshold < 256) { + di->threshold = threshold; + di->setup = 1; + return count; + } + return -EINVAL; +} + +static ssize_t ds2438_set_calibrate(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct power_supply *psy = dev_get_drvdata(dev); + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + di->calibrate = !!simple_strtoul(buf, NULL, 0); + return count; +} + +static struct device_attribute ds2438_dev_attr[] = { + __ATTR(input_src, 0664, ds2438_show_input, ds2438_set_input), + __ATTR(senser, 0664, ds2438_show_senser, ds2438_set_senser), + __ATTR(ee_flg, 0664, ds2438_show_ee, ds2438_set_ee), + __ATTR(threshold, 0664, ds2438_show_threshold, ds2438_set_threshold), + __ATTR(calibrate, 0220, NULL, ds2438_set_calibrate), +}; + +static void ds2438_setup(struct ds2438_device_info *di) +{ + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + if (di->init && di->setup) { + if (di->ee_flg) + di->raw[PAGE0_STAT_CTRL] |= DS2438_CTRL_EE; + else + di->raw[PAGE0_STAT_CTRL] &= ~DS2438_CTRL_EE; + if (di->input_src) + di->raw[PAGE0_STAT_CTRL] |= DS2438_CTRL_AD; + else + di->raw[PAGE0_STAT_CTRL] &= ~DS2438_CTRL_AD; + di->raw[PAGE0_THRESHOLD] = di->threshold; + } else { + di->ee_flg = !!(di->raw[PAGE0_STAT_CTRL] & DS2438_CTRL_EE); + di->input_src = !!(di->raw[PAGE0_STAT_CTRL] & DS2438_CTRL_AD); + di->threshold = di->raw[PAGE0_THRESHOLD]; + di->raw[PAGE0_STAT_CTRL] |= DS2438_CTRL_IAD | DS2438_CTRL_CA; + } + di->ops.write_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE0_CONTROL); + if (!di->init) { + di->calibrate = 1; + di->init = 1; + } + di->setup = 0; +} + +static void ds2438_calibrate(struct ds2438_device_info *di) +{ + int current_raw; + /* disable ICA */ + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->raw[PAGE0_STAT_CTRL] &= ~DS2438_CTRL_IAD; + di->ops.write_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE0_CONTROL); + + /* Zero offset */ + di->ops.load_sram(di->w1_dev, PAGE1_ETM); + di->ops.read_page(di->w1_dev, PAGE1_ETM, di->raw); + ds2438_writew(di->raw + PAGE1_OFFSET_LSB, 0); + di->ops.drain_sram(di->w1_dev, PAGE1_ETM_BYTE0); + + /* enable ICA & read current */ + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->raw[PAGE0_STAT_CTRL] |= DS2438_CTRL_IAD; + di->ops.write_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE0_CONTROL); + /*wait current convert about 36HZ */ + mdelay(30); + /* disable ICA */ + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->raw[PAGE0_STAT_CTRL] &= ~DS2438_CTRL_IAD; + di->ops.write_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE0_CONTROL); + /* read current value */ + current_raw = ds2438_readw(di->raw + PAGE0_CURRENT_LSB); + /* write offset by current value */ + di->ops.load_sram(di->w1_dev, PAGE1_ETM); + di->ops.read_page(di->w1_dev, PAGE1_ETM, di->raw); + ds2438_writew(di->raw + PAGE1_OFFSET_LSB, current_raw << 8); + di->ops.write_page(di->w1_dev, PAGE1_ETM, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE1_ETM); + + /*enable ICA again */ + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->raw[PAGE0_STAT_CTRL] |= DS2438_CTRL_IAD; + di->ops.write_page(di->w1_dev, PAGE0_CONTROL, di->raw); + di->ops.drain_sram(di->w1_dev, PAGE0_CONTROL); + di->calibrate = 0; +} + +/* + * power supply temperture is in tenths of degree. + */ +static inline int ds2438_get_temp(u16 raw) +{ + int degree, s; + s = !!(raw & 0x8000); + + if (s) + raw = ((~raw & 0x7FFF) + 1); + degree = ((raw >> 8) * 10) + (((raw & 0xFF) * 5) + 63) / 128; + return s ? -degree : degree; +} + +/* + * power supply current is in uA. + */ +static inline int ds2438_get_current(u32 senser, u16 raw) +{ + int s, current_uA; + s = !!(raw & 0xFC00); + /* (x * 1000 * 1000)uA / (4096 * (Rsens / 1000)) */ + raw &= 0x3FF; + current_uA = raw * 125 * 125 * 125; + current_uA /= (senser << 3); + return s ? -current_uA : current_uA; +} + +/* + * power supply current is in uAh. + */ +static inline int ds2438_get_ica(u32 senser, u8 raw) +{ + int charge_uAh; + /* (x * 1000 * 1000)uA / (2048 * (Rsens / 1000)) */ + charge_uAh = (raw * 125 * 125 * 125) >> 4; + charge_uAh /= (senser << 4); + return charge_uAh; +} + +static int ds2438_battery_update_page1(struct ds2438_device_info *di) +{ + int ica_raw; + di->ops.load_sram(di->w1_dev, PAGE1_ETM); + di->ops.read_page(di->w1_dev, PAGE1_ETM, di->raw); + ica_raw = di->raw[PAGE1_ICA]; + di->accum_current_uAh = ds2438_get_ica(di->senser, ica_raw); + return 0; +} + +static int ds2438_battery_read_status(struct ds2438_device_info *di) +{ + u8 status; + int temp_raw, voltage_raw, current_raw; + + if (!(di->init) || di->setup) + ds2438_setup(di); + + if (di->calibrate) + ds2438_calibrate(di); + + if (di->update_time && time_before(jiffies, di->update_time + + msecs_to_jiffies(cache_time))) + return 0; + + di->ops.load_sram(di->w1_dev, PAGE0_CONTROL); + di->ops.read_page(di->w1_dev, PAGE0_CONTROL, di->raw); + status = di->raw[PAGE0_STAT_CTRL]; + temp_raw = ds2438_readw(di->raw + PAGE0_TEMP_LSB); + voltage_raw = ds2438_readw(di->raw + PAGE0_VOLTAGE_LSB); + current_raw = ds2438_readw(di->raw + PAGE0_CURRENT_LSB); + di->temp_C = ds2438_get_temp(temp_raw); + di->voltage_uV = voltage_raw * 10000; + di->current_uA = ds2438_get_current(di->senser, current_raw); + + ds2438_battery_update_page1(di); + + if (!(status & DS2438_STAT_TB)) + di->ops.command(di->w1_dev, DS2438_CONVERT_TEMP, 0); + if (!(status & DS2438_STAT_ADB)) + di->ops.command(di->w1_dev, DS2438_CONVERT_VOLT, 0); + di->update_time = jiffies; + return 0; +} + +static void ds2438_battery_update_status(struct ds2438_device_info *di) +{ + int old_charge_status = di->charge_status; + + ds2438_battery_read_status(di); + + if (di->charge_status != old_charge_status) + power_supply_changed(&di->bat); +} + +static void ds2438_battery_work(struct work_struct *work) +{ + struct ds2438_device_info *di = container_of(work, + struct ds2438_device_info, + monitor_work.work); + const int interval = HZ * 60; + + dev_dbg(di->w1_dev, "%s\n", __func__); + + ds2438_battery_update_status(di); + queue_delayed_work(di->monitor_wqueue, &di->monitor_work, interval); +} + +static void ds2438_battery_external_power_changed(struct power_supply *psy) +{ + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + dev_dbg(di->w1_dev, "%s\n", __func__); + + cancel_delayed_work(&di->monitor_work); + queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ / 10); +} + +static int ds2438_battery_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct ds2438_device_info *di = to_ds2438_device_info(psy); + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + val->intval = di->charge_status; + return 0; + default: + break; + } + + ds2438_battery_read_status(di); + + switch (psp) { + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + val->intval = di->voltage_uV; + break; + case POWER_SUPPLY_PROP_CURRENT_NOW: + val->intval = di->current_uA; + break; + case POWER_SUPPLY_PROP_TEMP: + val->intval = di->temp_C; + break; + case POWER_SUPPLY_PROP_CHARGE_NOW: + val->intval = di->accum_current_uAh; + break; + default: + return -EINVAL; + } + + return 0; +} + +/* W1 slave DS2438 famliy operations */ +static int ds2438_read_page(struct device *dev, u8 page, u8 *buf) +{ + struct w1_slave *slave = container_of(dev, struct w1_slave, dev); + if ((page >= DS2438_PAGE_NUM) || (buf == NULL)) + return -EINVAL; + + mutex_lock(&slave->master->mutex); + if (!w1_reset_select_slave(slave)) { + w1_write_8(slave->master, W1_READ_SCRATCHPAD); + w1_write_8(slave->master, page); + w1_read_block(slave->master, buf, DS2438_PAGE_SIZE); + } + mutex_unlock(&slave->master->mutex); + return 0; +} + +static int ds2438_write_page(struct device *dev, u8 page, u8 *buf) +{ + struct w1_slave *slave = container_of(dev, struct w1_slave, dev); + if ((page >= DS2438_PAGE_NUM) || (buf == NULL)) + return -EINVAL; + + mutex_lock(&slave->master->mutex); + if (!w1_reset_select_slave(slave)) { + w1_write_8(slave->master, DS2438_WRITE_SCRATCHPAD); + w1_write_8(slave->master, page); + w1_write_block(slave->master, buf, DS2438_PAGE_SIZE); + } + mutex_unlock(&slave->master->mutex); + return 0; +} + +static int ds2438_command(struct device *dev, u8 command, u8 data) +{ + struct w1_slave *slave = container_of(dev, struct w1_slave, dev); + + mutex_lock(&slave->master->mutex); + if (!w1_reset_select_slave(slave)) { + w1_write_8(slave->master, command); + switch (command) { + case DS2438_COPY_SCRATCHPAD: + case DS2438_RECALL_MEMORY: + w1_write_8(slave->master, data); + } + } + mutex_unlock(&slave->master->mutex); + return 0; +} + +static int ds2438_drain_sram(struct device *dev, u8 page) +{ + return ds2438_command(dev, DS2438_COPY_SCRATCHPAD, page); +} + +static int ds2438_load_sram(struct device *dev, u8 page) +{ + return ds2438_command(dev, DS2438_RECALL_MEMORY, page); +} + +static inline void ds2438_defaut_ops(struct ds2438_ops *ops) +{ + ops->read_page = ds2438_read_page; + ops->write_page = ds2438_write_page; + ops->drain_sram = ds2438_drain_sram; + ops->load_sram = ds2438_load_sram; + ops->command = ds2438_command; +} + +static int ds2438_add_slave(struct w1_slave *slave) +{ + int i, retval = 0; + struct ds2438_device_info *di; + + di = kzalloc(sizeof(*di), GFP_KERNEL); + if (!di) { + retval = -ENOMEM; + goto di_alloc_failed; + } + + di->w1_dev = &slave->dev; + di->bat.name = dev_name(&slave->dev); + di->bat.type = POWER_SUPPLY_TYPE_BATTERY; + di->bat.properties = ds2438_battery_props; + di->bat.num_properties = ARRAY_SIZE(ds2438_battery_props); + di->bat.get_property = ds2438_battery_get_property; + di->bat.external_power_changed = ds2438_battery_external_power_changed; + ds2438_defaut_ops(&di->ops); + di->senser = DS2438_SENSER; + di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN; + + retval = power_supply_register(&slave->dev, &di->bat); + if (retval) { + dev_err(&slave->dev, "failed to register battery\n"); + goto batt_failed; + } + + for (i = 0; i < ARRAY_SIZE(ds2438_dev_attr); i++) { + if (device_create_file(di->bat.dev, ds2438_dev_attr + i)) { + printk(KERN_ERR "Customize attribute file fail!\n"); + break; + } + } + + if (i != ARRAY_SIZE(ds2438_dev_attr)) { + for (; i >= 0; i++) + device_remove_file(di->bat.dev, ds2438_dev_attr + i); + goto workqueue_failed; + } + INIT_DELAYED_WORK(&di->monitor_work, ds2438_battery_work); + di->monitor_wqueue = create_singlethread_workqueue(dev_name(&slave->dev)); + if (!di->monitor_wqueue) { + retval = -ESRCH; + goto workqueue_failed; + } + dev_set_drvdata(&slave->dev, di); + queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ / 2); + + goto success; + + workqueue_failed: + power_supply_unregister(&di->bat); + batt_failed: + kfree(di); + di_alloc_failed: + success: + return retval; +} + +static void ds2438_remove_slave(struct w1_slave *slave) +{ + struct ds2438_device_info *di = dev_get_drvdata(&slave->dev); + + cancel_rearming_delayed_workqueue(di->monitor_wqueue, + &di->monitor_work); + destroy_workqueue(di->monitor_wqueue); + power_supply_unregister(&di->bat); +} + +static struct w1_family_ops w1_ds2438_fops = { + .add_slave = ds2438_add_slave, + .remove_slave = ds2438_remove_slave, +}; + +static struct w1_family w1_family_ds2438 = { + .fid = W1_FAMILY_DS2438, + .fops = &w1_ds2438_fops, +}; + +static int __init w1_ds2438_init(void) +{ + pr_info("1-wire driver for the DS2438 smart battery monitor\n"); + return w1_register_family(&w1_family_ds2438); +} + +static void __exit w1_ds2438_fini(void) +{ + w1_unregister_family(&w1_family_ds2438); +} + +module_init(w1_ds2438_init); +module_exit(w1_ds2438_fini); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Freescale Semiconductors Inc"); +MODULE_DESCRIPTION("1-wire DS2438 family, smart battery monitor."); --- linux-fsl-imx51-2.6.31.orig/drivers/w1/slaves/w1_ds2751.c +++ linux-fsl-imx51-2.6.31/drivers/w1/slaves/w1_ds2751.c @@ -0,0 +1,317 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* + * Implementation based on w1_ds2433.c + */ + +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_W1_F51_CRC +#include + +#define CRC16_INIT 0 +#define CRC16_VALID 0xb001 + +#endif + +#include "../w1.h" +#include "../w1_int.h" +#include "../w1_family.h" + +#define W1_EEPROM_SIZE 32 +#define W1_PAGE_SIZE 32 +#define W1_PAGE_BITS 5 +#define W1_PAGE_MASK 0x1F + +#define W1_F51_TIME 300 + +#define W1_F51_READ_EEPROM 0xB8 +#define W1_F51_WRITE_SCRATCH 0x6C +#define W1_F51_READ_SCRATCH 0x69 +#define W1_F51_COPY_SCRATCH 0x48 +#define W1_STATUS_OFFSET 0x0001 +#define W1_EEPROM_OFFSET 0x0007 +#define W1_SPECIAL_OFFSET 0x0008 +#define W1_EEPROM_BLOCK_0 0x0020 +#define W1_EEPROM_BLOCK_1 0x0030 +#define W1_SRAM 0x0080 +struct w1_f51_data { + u8 memory[W1_EEPROM_SIZE]; + u32 validcrc; +}; + +/** + * Check the file size bounds and adjusts count as needed. + * This would not be needed if the file size didn't reset to 0 after a write. + */ +static inline size_t w1_f51_fix_count(loff_t off, size_t count, size_t size) +{ + if (off > size) + return 0; + + if ((off + count) > size) + return (size - off); + + return count; +} + +#ifdef CONFIG_W1_F51_CRC +static int w1_f51_refresh_block(struct w1_slave *sl, struct w1_f51_data *data, + int block) +{ + u8 wrbuf[3]; + int off = block * W1_PAGE_SIZE; + if (data->validcrc & (1 << block)) + return 0; + + if (w1_reset_select_slave(sl)) { + data->validcrc = 0; + return -EIO; + } + wrbuf[0] = W1_F51_READ_EEPROM; + wrbuf[1] = off & 0xff; + wrbuf[2] = off >> 8; + w1_write_block(sl->master, wrbuf, 3); + w1_read_block(sl->master, &data->memory[off], W1_PAGE_SIZE); + + /* cache the block if the CRC is valid */ + if (crc16(CRC16_INIT, &data->memory[off], W1_PAGE_SIZE) == CRC16_VALID) + data->validcrc |= (1 << block); + + return 0; +} +#endif /* CONFIG_W1_F51_CRC */ + +static ssize_t w1_f51_read_bin(struct kobject *kobj, char *buf, loff_t off, + size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); +#ifdef CONFIG_W1_F51_CRC + struct w1_f51_data *data = sl->family_data; + int i, min_page, max_page; +#else + u8 wrbuf[3]; +#endif + + if ((count = w1_f51_fix_count(off, count, W1_EEPROM_SIZE)) == 0) { + return 0; + } + mutex_lock(&sl->master->mutex); +#ifdef CONFIG_W1_F51_CRC + min_page = (off >> W1_PAGE_BITS); + max_page = (off + count - 1) >> W1_PAGE_BITS; + for (i = min_page; i <= max_page; i++) { + if (w1_f51_refresh_block(sl, data, i)) { + count = -EIO; + goto out_up; + } + } + memcpy(buf, &data->memory[off], count); + +#else /* CONFIG_W1_F51_CRC */ + + /* read directly from the EEPROM */ + if (w1_reset_select_slave(sl)) { + count = -EIO; + goto out_up; + } + off = (loff_t) W1_EEPROM_BLOCK_0; + wrbuf[0] = W1_F51_READ_EEPROM; + wrbuf[1] = off & 0xff; + wrbuf[2] = off >> 8; + w1_write_block(sl->master, wrbuf, 3); + if (w1_reset_select_slave(sl)) { + count = -EIO; + goto out_up; + } + + wrbuf[0] = W1_F51_READ_SCRATCH; + wrbuf[1] = off & 0xff; + wrbuf[2] = off >> 8; + w1_write_block(sl->master, wrbuf, 3); + w1_read_block(sl->master, buf, count); + +#endif /* CONFIG_W1_F51_CRC */ + + out_up: + mutex_unlock(&sl->master->mutex); + return count; +} + +/** + * Writes to the scratchpad and reads it back for verification. + * Then copies the scratchpad to EEPROM. + * The data must be on one page. + * The master must be locked. + * + * @param sl The slave structure + * @param addr Address for the write + * @param len length must be <= (W1_PAGE_SIZE - (addr & W1_PAGE_MASK)) + * @param data The data to write + * @return 0=Success -1=failure + */ +static int w1_f51_write(struct w1_slave *sl, int addr, int len, const u8 * data) +{ + u8 wrbuf[4]; + u8 rdbuf[W1_EEPROM_SIZE + 3]; + u8 es = (addr + len - 1) & 0x1f; + /* Write the data to the scratchpad */ + if (w1_reset_select_slave(sl)) + return -1; + wrbuf[0] = W1_F51_WRITE_SCRATCH; + wrbuf[1] = addr & 0xff; + wrbuf[2] = addr >> 8; + + w1_write_block(sl->master, wrbuf, 3); + w1_write_block(sl->master, data, len); + /* Read the scratchpad and verify */ + if (w1_reset_select_slave(sl)) + return -1; + wrbuf[0] = W1_F51_READ_SCRATCH; + w1_write_block(sl->master, wrbuf, 3); + w1_read_block(sl->master, rdbuf, len + 3); + /* Compare what was read against the data written */ + if (memcmp(data, &rdbuf[0], len) != 0) { + printk("Error reading the scratch Pad\n"); + return -1; + } + /* Copy the scratchpad to EEPROM */ + if (w1_reset_select_slave(sl)) + return -1; + wrbuf[0] = W1_F51_COPY_SCRATCH; + wrbuf[3] = es; + w1_write_block(sl->master, wrbuf, 4); + /* Sleep for 5 ms to wait for the write to complete */ + msleep(5); + + /* Reset the bus to wake up the EEPROM (this may not be needed) */ + w1_reset_bus(sl->master); + + return 0; +} + +static ssize_t w1_f51_write_bin(struct kobject *kobj, char *buf, loff_t off, + size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); + int addr; + + if ((count = w1_f51_fix_count(off, count, W1_EEPROM_SIZE)) == 0) + return 0; + off = (loff_t) 0x0020; +#ifdef CONFIG_W1_F51_CRC + /* can only write full blocks in cached mode */ + if ((off & W1_PAGE_MASK) || (count & W1_PAGE_MASK)) { + dev_err(&sl->dev, "invalid offset/count off=%d cnt=%zd\n", + (int)off, count); + return -EINVAL; + } + + /* make sure the block CRCs are valid */ + for (idx = 0; idx < count; idx += W1_PAGE_SIZE) { + if (crc16(CRC16_INIT, &buf[idx], W1_PAGE_SIZE) != CRC16_VALID) { + dev_err(&sl->dev, "bad CRC at offset %d\n", (int)off); + return -EINVAL; + } + } +#endif /* CONFIG_W1_F51_CRC */ + + mutex_lock(&sl->master->mutex); + + /* Can only write data to one page at a time */ + addr = off; + if (w1_f51_write(sl, addr, count, buf) < 0) { + count = -EIO; + goto out_up; + } + + out_up: + mutex_unlock(&sl->master->mutex); + + return count; +} + +static struct bin_attribute w1_f51_bin_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + .owner = THIS_MODULE, + }, + .size = W1_EEPROM_SIZE, + .read = w1_f51_read_bin, + .write = w1_f51_write_bin, +}; + +static int w1_f51_add_slave(struct w1_slave *sl) +{ + int err; +#ifdef CONFIG_W1_F51_CRC + struct w1_f51_data *data; + data = kmalloc(sizeof(struct w1_f51_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + memset(data, 0, sizeof(struct w1_f51_data)); + sl->family_data = data; + +#endif /* CONFIG_W1_F51_CRC */ + + err = sysfs_create_bin_file(&sl->dev.kobj, &w1_f51_bin_attr); + +#ifdef CONFIG_W1_F51_CRC + if (err) + kfree(data); +#endif /* CONFIG_W1_F51_CRC */ + + return err; +} + +static void w1_f51_remove_slave(struct w1_slave *sl) +{ +#ifdef CONFIG_W1_F51_CRC + kfree(sl->family_data); + sl->family_data = NULL; +#endif /* CONFIG_W1_F51_CRC */ + sysfs_remove_bin_file(&sl->dev.kobj, &w1_f51_bin_attr); +} + +static struct w1_family_ops w1_f51_fops = { + .add_slave = w1_f51_add_slave, + .remove_slave = w1_f51_remove_slave, +}; + +static struct w1_family w1_family_51 = { + .fid = W1_EEPROM_DS2751, + .fops = &w1_f51_fops, +}; + +static int __init w1_f51_init(void) +{ + return w1_register_family(&w1_family_51); +} + +static void __exit w1_f51_fini(void) +{ + w1_unregister_family(&w1_family_51); +} + +module_init(w1_f51_init); +module_exit(w1_f51_fini); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Freescale Semiconductors Inc"); +MODULE_DESCRIPTION + ("w1 family 51 driver for DS2751, Battery Level Sensing Device"); --- linux-fsl-imx51-2.6.31.orig/drivers/w1/slaves/Makefile +++ linux-fsl-imx51-2.6.31/drivers/w1/slaves/Makefile @@ -8,3 +8,5 @@ obj-$(CONFIG_W1_SLAVE_DS2433) += w1_ds2433.o obj-$(CONFIG_W1_SLAVE_DS2760) += w1_ds2760.o obj-$(CONFIG_W1_SLAVE_BQ27000) += w1_bq27000.o +obj-$(CONFIG_W1_SLAVE_DS2751) += w1_ds2751.o +obj-$(CONFIG_W1_SLAVE_DS2438) += w1_ds2438.o --- linux-fsl-imx51-2.6.31.orig/drivers/w1/masters/mxc_w1.c +++ linux-fsl-imx51-2.6.31/drivers/w1/masters/mxc_w1.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "../w1.h" #include "../w1_int.h" @@ -43,6 +44,8 @@ #define MXC_W1_INTERRUPT 0x0A #define MXC_W1_INTERRUPT_EN 0x0C +static DECLARE_COMPLETION(transmit_done); + struct mxc_w1_device { void __iomem *regs; unsigned int clkdiv; @@ -102,10 +105,155 @@ return ((__raw_readb(ctrl_addr)) >> 3) & 0x1; } +static void mxc_w1_ds2_write_byte(void *data, u8 byte) +{ + struct mxc_w1_device *dev = (struct mxc_w1_device *)data; + INIT_COMPLETION(transmit_done); + __raw_writeb(byte, (dev->regs + MXC_W1_TXRX)); + __raw_writeb(0x10, (dev->regs + MXC_W1_INTERRUPT_EN)); + wait_for_completion(&transmit_done); +} +static u8 mxc_w1_ds2_read_byte(void *data) +{ + volatile u8 reg_val; + struct mxc_w1_device *dev = (struct mxc_w1_device *)data; + mxc_w1_ds2_write_byte(data, 0xFF); + reg_val = __raw_readb((dev->regs + MXC_W1_TXRX)); + return reg_val; +} +static u8 mxc_w1_read_byte(void *data) +{ + volatile u8 reg_val; + struct mxc_w1_device *dev = (struct mxc_w1_device *)data; + reg_val = __raw_readb((dev->regs + MXC_W1_TXRX)); + return reg_val; +} +static irqreturn_t w1_interrupt_handler(int irq, void *data) +{ + u8 reg_val; + irqreturn_t ret = IRQ_NONE; + struct mxc_w1_device *dev = (struct mxc_w1_device *)data; + reg_val = __raw_readb((dev->regs + MXC_W1_INTERRUPT)); + if ((reg_val & 0x10)) { + complete(&transmit_done); + reg_val = __raw_readb((dev->regs + MXC_W1_TXRX)); + ret = IRQ_HANDLED; + } + return ret; +} +void search_ROM_accelerator(void *data, struct w1_master *master, u8 search_type, + w1_slave_found_callback cb) +{ + u64 rn[2], last_rn[2], rn2[2]; + u64 rn1, rom_id, temp, temp1; + int i, j, z, w, last_zero, loop; + u8 bit, reg_val, bit2; + u8 byte, byte1; + int disc, prev_disc, last_disc; + struct mxc_w1_device *dev = (struct mxc_w1_device *)data; + last_rn[0] = 0; + last_rn[1] = 0; + rom_id = 0; + prev_disc = 0; + loop = 0; + disc = -1; + last_disc = 0; + last_zero = 0; + while (!last_zero) { + /* + * Reset bus and all 1-wire device state machines + * so they can respond to our requests. + * + * Return 0 - device(s) present, 1 - no devices present. + */ + if (mxc_w1_ds2_reset_bus(data)) { + pr_debug("No devices present on the wire.\n"); + break; + } + rn[0] = 0; + rn[1] = 0; + __raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL)); + mdelay(1); + mxc_w1_ds2_write_byte(data, 0xF0); + __raw_writeb(0x02, (dev->regs + MXC_W1_COMMAND)); + memcpy(rn2, last_rn, 16); + z = 0; + w = 0; + for (i = 0; i < 16; i++) { + reg_val = rn2[z] >> (8 * w); + mxc_w1_ds2_write_byte(data, reg_val); + reg_val = mxc_w1_read_byte(data); + if ((reg_val & 0x3) == 0x3) { + pr_debug("Device is Not Responding\n"); + break; + } + for (j = 0; j < 8; j += 2) { + byte = 0xFF; + byte1 = 1; + byte ^= byte1 << j; + bit = (reg_val >> j) & 0x1; + bit2 = (reg_val >> j); + if (bit) { + prev_disc = disc; + disc = 8 * i + j; + reg_val &= byte; + } + } + rn1 = 0; + rn1 = reg_val; + rn[z] |= rn1 << (8 * w); + w++; + if (i == 7) { + z++; + w = 0; + } + } + if ((disc == -1) || (disc == prev_disc)) + last_zero = 1; + if (disc == last_disc) + disc = prev_disc; + z = 0; + rom_id = 0; + for (i = 0, j = 1; i < 64; i++) { + temp = 0; + temp = (rn[z] >> j) & 0x1; + rom_id |= (temp << i); + j += 2; + if (i == 31) { + z++; + j = 1; + } + + } + if (disc > 63) { + last_rn[0] = rn[0]; + temp1 = rn[1]; + loop = disc % 64; + temp = 1; + temp1 |= (temp << (loop + 1)) - 1; + temp1 |= (temp << (loop + 1)); + last_rn[1] = temp1; + + } else { + last_rn[1] = 0; + temp1 = rn[0]; + temp = 1; + temp1 |= (temp << (loop + 1)) - 1; + temp1 |= (temp << (loop + 1)); + last_rn[0] = temp1; + } + last_disc = disc; + cb(master, rom_id); + } +} + static int __init mxc_w1_probe(struct platform_device *pdev) { struct mxc_w1_device *mdev; + struct mxc_w1_config *data = + (struct mxc_w1_config *)pdev->dev.platform_data; struct resource *res; + int irq = 0; int err = 0; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -143,6 +291,22 @@ mdev->bus_master.data = mdev; mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus; mdev->bus_master.touch_bit = mxc_w1_ds2_touch_bit; + if (data->search_rom_accelerator) { + mdev->bus_master.write_byte = &mxc_w1_ds2_write_byte; + mdev->bus_master.read_byte = &mxc_w1_ds2_read_byte; + mdev->bus_master.search = &search_ROM_accelerator; + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + err = -ENOENT; + goto failed_irq; + } + err = request_irq(irq, w1_interrupt_handler, 0, "mxc_w1", mdev); + if (err) { + pr_debug("OWire:request_irq(%d) returned error %d\n", + irq, err); + goto failed_irq; + } + } err = w1_add_master_device(&mdev->bus_master); @@ -153,6 +317,9 @@ return 0; failed_add: + if (irq) + free_irq(irq, mdev); +failed_irq: iounmap(mdev->regs); failed_ioremap: release_mem_region(res->start, resource_size(res)); @@ -170,6 +337,9 @@ { struct mxc_w1_device *mdev = platform_get_drvdata(pdev); struct resource *res; + struct mxc_w1_config *data = + (struct mxc_w1_config *)pdev->dev.platform_data; + int irq; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -177,6 +347,11 @@ iounmap(mdev->regs); release_mem_region(res->start, resource_size(res)); + + irq = platform_get_irq(pdev, 0); + if ((irq >= 0) && (data->search_rom_accelerator)) + free_irq(irq, mdev); + clk_disable(mdev->clk); clk_put(mdev->clk); --- linux-fsl-imx51-2.6.31.orig/drivers/power/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/power/Kconfig @@ -103,4 +103,11 @@ help Say Y to include support for NXP PCF50633 Main Battery Charger. +config BATTERY_STMP3XXX + tristate "Sigmatel STMP3xxx SoC battery charger driver" + depends on ARCH_STMP3XXX + help + Say Y to enable support for the battery charger state machine + for the Sigmatel STMP3xxx based SoC's. + endif # POWER_SUPPLY --- linux-fsl-imx51-2.6.31.orig/drivers/power/Makefile +++ linux-fsl-imx51-2.6.31/drivers/power/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o +obj-$(CONFIG_BATTERY_STMP3XXX) += stmp37xx/ --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/linux.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/linux.c @@ -0,0 +1,1151 @@ +/* + * Linux glue to STMP3xxx battery state machine. + * + * Author: Steve Longerbeam + * + * Copyright (C) 2008 EmbeddedAlley Solutions Inc. + * Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "ddi_bc_internal.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum application_5v_status{ + _5v_connected_verified, + _5v_connected_unverified, + _5v_disconnected_unverified, + _5v_disconnected_verified, +}; + +struct stmp3xxx_info { + struct device *dev; + struct regulator *regulator; + + struct power_supply bat; + struct power_supply ac; + struct power_supply usb; + + ddi_bc_Cfg_t *sm_cfg; + struct mutex sm_lock; + struct timer_list sm_timer; + struct work_struct sm_work; + struct resource *irq_vdd5v; + struct resource *irq_dcdc4p2_bo; + struct resource *irq_batt_brnout; + struct resource *irq_vddd_brnout; + struct resource *irq_vdda_brnout; + struct resource *irq_vddio_brnout; + struct resource *irq_vdd5v_droop; + int is_ac_online; + int source_protection_mode; + uint32_t sm_new_5v_connection_jiffies; + uint32_t sm_new_5v_disconnection_jiffies; + enum application_5v_status sm_5v_connection_status; + + + + +#define USB_ONLINE 0x01 +#define USB_REG_SET 0x02 +#define USB_SM_RESTART 0x04 +#define USB_SHUTDOWN 0x08 +#define USB_N_SEND 0x10 + int is_usb_online; +}; + +#define to_stmp3xxx_info(x) container_of((x), struct stmp3xxx_info, bat) + +#ifndef NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA +#define NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA 780 +#endif + +#ifndef POWERED_USB_5V_CURRENT_LIMIT_MA +#define POWERED_USB_5V_CURRENT_LIMIT_MA 450 +#endif + +#ifndef UNPOWERED_USB_5V_CURRENT_LIMIT_MA +#define UNPOWERED_USB_5V_CURRENT_LIMIT_MA 80 +#endif + +#ifndef _5V_DEBOUNCE_TIME_MS +#define _5V_DEBOUNCE_TIME_MS 500 +#endif + +#ifndef OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV +#define OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV 3350 +#endif + +#define POWER_FIQ + +/* #define DEBUG_IRQS */ + +/* There is no direct way to detect wall power presence, so assume the AC + * power source is valid if 5V presents and USB device is disconnected. + * If USB device is connected then assume that AC is offline and USB power + * is online. + */ + +#define is_usb_plugged()(__raw_readl(REGS_USBPHY_BASE + HW_USBPHY_STATUS) & \ + BM_USBPHY_STATUS_DEVPLUGIN_STATUS) + +#define is_ac_online() \ + (ddi_power_Get5vPresentFlag() ? (!is_usb_plugged()) : 0) +#define is_usb_online() \ + (ddi_power_Get5vPresentFlag() ? (!!is_usb_plugged()) : 0) + + + +void init_protection(struct stmp3xxx_info *info) +{ + enum ddi_power_5v_status pmu_5v_status; + uint16_t battery_voltage; + + pmu_5v_status = ddi_power_GetPmu5vStatus(); + battery_voltage = ddi_power_GetBattery(); + + /* InitializeFiqSystem(); */ + + ddi_power_InitOutputBrownouts(); + + + /* if we start the kernel with 4p2 already started + * by the bootlets, we need to hand off from this + * state to the kernel 4p2 enabled state. + */ + if ((pmu_5v_status == existing_5v_connection) && + ddi_power_check_4p2_bits()) { + ddi_power_enable_5v_disconnect_detection(); + + /* includes VBUS DROOP workaround for errata */ + ddi_power_init_4p2_protection(); + + /* if we still have our 5V connection, we can disable + * battery brownout interrupt. This is because the + * VDD5V DROOP IRQ handler will also shutdown if battery + * is browned out and it will enable the battery brownout + * and bring VBUSVALID_TRSH level back to a normal level + * which caused the hardware battery brownout shutdown + * to be enabled. The benefit of this is that device + * that have detachable batteries (or devices going through + * the assembly line and running this firmware to test + * with) can avoid shutting down if 5V is present and + * battery voltage goes away. + */ + ddi_power_EnableBatteryBoInterrupt(false); + + info->sm_5v_connection_status = _5v_connected_verified; + } else { +#ifdef DEBUG_IRQS + if (battery_voltage < + OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV) { + printk(KERN_CRIT "Polled battery voltage measurement is\ + less than %dmV. Kernel should be halted/\ + shutdown\n", + OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV); + + return; + } +#endif + info->sm_5v_connection_status = _5v_disconnected_verified; + ddi_power_EnableBatteryBoInterrupt(true); + + } + + + /* all brownouts are now handled software fiqs. We + * can now disable the hardware protection mechanisms + * because leaving them on yields ~2kV ESD level + * versus ~4kV ESD levels when they are off. This + * difference is suspected to be cause by the fast + * falling edge pswitch functionality being tripped + * by ESD events. This functionality is disabled + * when PWD_OFF is disabled. + */ +#ifdef DISABLE_HARDWARE_PROTECTION_MECHANISMS + __raw_writel(BM_POWER_RESET_PWD_OFF, + HW_POWER_RESET_SET_ADDR); +#endif + + + + +} + + + +static void check_and_handle_5v_connection(struct stmp3xxx_info *info) +{ + + switch (ddi_power_GetPmu5vStatus()) { + + case new_5v_connection: + ddi_power_enable_5v_disconnect_detection(); + info->sm_5v_connection_status = _5v_connected_unverified; + + case existing_5v_connection: + if (info->sm_5v_connection_status != _5v_connected_verified) { + /* we allow some time to pass before considering + * the 5v connection to be ready to use. This + * will give the USB system time to enumerate + * (coordination with USB driver to be added + * in the future). + */ + + /* handle jiffies rollover case */ + if ((jiffies - info->sm_new_5v_connection_jiffies) + < 0) { + info->sm_new_5v_connection_jiffies = jiffies; + break; + } + + if ((jiffies_to_msecs(jiffies - + info->sm_new_5v_connection_jiffies)) > + _5V_DEBOUNCE_TIME_MS) { + info->sm_5v_connection_status = + _5v_connected_verified; + dev_info(info->dev, + "5v connection verified\n"); + ddi_power_Enable4p2(450); + + + /* part of handling for errata. It is + * now "somewhat" safe to + * turn on vddio interrupts again + */ + ddi_power_enable_vddio_interrupt(true); + } + } + break; + + case new_5v_disconnection: + + ddi_bc_SetDisable(); + ddi_bc_SetCurrentLimit(0); + if (info->regulator) + regulator_set_current_limit(info->regulator, 0, 0); + info->is_usb_online = 0; + info->is_ac_online = 0; + + info->sm_5v_connection_status = _5v_disconnected_unverified; + + case existing_5v_disconnection: + + if (info->sm_5v_connection_status != + _5v_disconnected_verified) { + if ((jiffies - info->sm_new_5v_disconnection_jiffies) + < 0) { + info->sm_new_5v_connection_jiffies = jiffies; + break; + } + + if ((jiffies_to_msecs(jiffies - + info->sm_new_5v_disconnection_jiffies)) > + _5V_DEBOUNCE_TIME_MS) { + info->sm_5v_connection_status = + _5v_disconnected_verified; + ddi_power_execute_5v_to_battery_handoff(); + ddi_power_enable_5v_connect_detection(); + + /* part of handling for errata. + * It is now safe to + * turn on vddio interrupts again + */ + ddi_power_enable_vddio_interrupt(true); + dev_info(info->dev, + "5v disconnection handled\n"); + + } + } + + break; + } +} + + +static void handle_battery_voltage_changes(struct stmp3xxx_info *info) +{ +#if 0 + uint16_t battery_voltage; + + battery_voltage = ddi_power_GetBattery(); + + if (info->sm_5v_connection_status != _5v_connected_verified) { + if (battery_voltage < + OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV) { + printk(KERN_CRIT "Polled battery voltage measurement is\ + less than %dmV. Shutting down the \ + system\n", + OS_SHUTDOWN_BATTERY_VOLTAGE_THRESHOLD_MV); + + shutdown_os(); + return; + } + } else +#endif + { + ddi_power_handle_cmptrip(); + + if (ddi_power_IsBattRdyForXfer()) + ddi_power_enable_5v_to_battery_xfer(true); + else + ddi_power_enable_5v_to_battery_xfer(false); + + } +} + + +/* + * Power properties + */ +static enum power_supply_property stmp3xxx_power_props[] = { + POWER_SUPPLY_PROP_ONLINE, +}; + +static int stmp3xxx_power_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: + if (psy->type == POWER_SUPPLY_TYPE_MAINS) + /* ac online */ + val->intval = is_ac_online(); + else + /* usb online */ + val->intval = is_usb_online(); + break; + default: + return -EINVAL; + } + + return 0; +} +/* + * Battery properties + */ +static enum power_supply_property stmp3xxx_bat_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_TEMP, +}; + +static int stmp3xxx_bat_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct stmp3xxx_info *info = to_stmp3xxx_info(psy); + ddi_bc_State_t state; + ddi_bc_BrokenReason_t reason; + int temp_alarm; + int16_t temp_lo, temp_hi; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + state = ddi_bc_GetState(); + switch (state) { + case DDI_BC_STATE_CONDITIONING: + case DDI_BC_STATE_CHARGING: + case DDI_BC_STATE_TOPPING_OFF: + val->intval = POWER_SUPPLY_STATUS_CHARGING; + break; + case DDI_BC_STATE_DISABLED: + val->intval = ddi_power_Get5vPresentFlag() ? + POWER_SUPPLY_STATUS_NOT_CHARGING : + POWER_SUPPLY_STATUS_DISCHARGING; + break; + default: + /* TODO: detect full */ + val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; + break; + } + break; + case POWER_SUPPLY_PROP_PRESENT: + /* is battery present */ + state = ddi_bc_GetState(); + switch (state) { + case DDI_BC_STATE_WAITING_TO_CHARGE: + case DDI_BC_STATE_DCDC_MODE_WAITING_TO_CHARGE: + case DDI_BC_STATE_CONDITIONING: + case DDI_BC_STATE_CHARGING: + case DDI_BC_STATE_TOPPING_OFF: + case DDI_BC_STATE_DISABLED: + val->intval = 1; + break; + case DDI_BC_STATE_BROKEN: + val->intval = !(ddi_bc_GetBrokenReason() == + DDI_BC_BROKEN_NO_BATTERY_DETECTED); + break; + default: + val->intval = 0; + break; + } + break; + case POWER_SUPPLY_PROP_HEALTH: + temp_alarm = ddi_bc_RampGetDieTempAlarm(); + if (temp_alarm) { + val->intval = POWER_SUPPLY_HEALTH_OVERHEAT; + } else { + state = ddi_bc_GetState(); + switch (state) { + case DDI_BC_STATE_BROKEN: + reason = ddi_bc_GetBrokenReason(); + val->intval = + (reason == DDI_BC_BROKEN_CHARGING_TIMEOUT) ? + POWER_SUPPLY_HEALTH_DEAD : + POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; + break; + case DDI_BC_STATE_UNINITIALIZED: + val->intval = POWER_SUPPLY_HEALTH_UNKNOWN; + break; + default: + val->intval = POWER_SUPPLY_HEALTH_GOOD; + break; + } + } + break; + case POWER_SUPPLY_PROP_TECHNOLOGY: + val->intval = POWER_SUPPLY_TECHNOLOGY_LION; + break; + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + /* uV */ + val->intval = ddi_power_GetBattery() * 1000; + break; + case POWER_SUPPLY_PROP_CURRENT_NOW: + /* uA */ + val->intval = ddi_power_GetMaxBatteryChargeCurrent() * 1000; + break; + case POWER_SUPPLY_PROP_TEMP: + mutex_lock(&info->sm_lock); + ddi_power_GetDieTemp(&temp_lo, &temp_hi); + mutex_unlock(&info->sm_lock); + val->intval = temp_lo + (temp_hi - temp_lo) / 2; + + break; + default: + return -EINVAL; + } + + return 0; +} + +static void state_machine_timer(unsigned long data) +{ + struct stmp3xxx_info *info = (struct stmp3xxx_info *)data; + ddi_bc_Cfg_t *cfg = info->sm_cfg; + int ret; + + /* schedule next call to state machine */ + mod_timer(&info->sm_timer, + jiffies + msecs_to_jiffies(cfg->u32StateMachinePeriod)); + + ret = schedule_work(&info->sm_work); + if (!ret) + dev_dbg(info->dev, "state machine failed to schedule\n"); + +} +/* + * Assumption: + * AC power can't be switched to USB w/o system reboot + * and vice-versa + */ +static void state_machine_work(struct work_struct *work) +{ + struct stmp3xxx_info *info = + container_of(work, struct stmp3xxx_info, sm_work); + + mutex_lock(&info->sm_lock); + + handle_battery_voltage_changes(info); + + check_and_handle_5v_connection(info); + + if ((info->sm_5v_connection_status != _5v_connected_verified) || + !(info->regulator)) { + mod_timer(&info->sm_timer, jiffies + msecs_to_jiffies(100)); + goto out; + } + + /* if we made it here, we have a verified 5v connection */ + + if (is_ac_online()) { + if (info->is_ac_online) + goto done; + + /* ac supply connected */ + dev_info(info->dev, "changed power connection to ac/5v.\n)"); + dev_info(info->dev, "5v current limit set to %u.\n", + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA); + + info->is_ac_online = 1; + info->is_usb_online = 0; + ddi_power_set_4p2_ilimit( + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA); + ddi_bc_SetCurrentLimit( + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA /*mA*/); + if (regulator_set_current_limit(info->regulator, + 0, + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA*1000)) { + dev_err(info->dev, "reg_set_current(%duA) failed\n", + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA*1000); + } + ddi_bc_SetEnable(); + goto done; + } + + if (!is_usb_online()) + goto out; + + if (info->is_usb_online & USB_REG_SET) + goto done; + + info->is_ac_online = 0; + info->is_usb_online |= USB_ONLINE; + + + + if (!(info->is_usb_online & USB_N_SEND)) { + info->is_usb_online |= USB_N_SEND; + } + + + dev_dbg(info->dev, "%s: charge current set to %dmA\n", __func__, + POWERED_USB_5V_CURRENT_LIMIT_MA); + + if (regulator_set_current_limit(info->regulator, + 0, + POWERED_USB_5V_CURRENT_LIMIT_MA*1000)) { + dev_err(info->dev, "reg_set_current(%duA) failed\n", + POWERED_USB_5V_CURRENT_LIMIT_MA*1000); + } else { + ddi_bc_SetCurrentLimit(POWERED_USB_5V_CURRENT_LIMIT_MA/*mA*/); + ddi_bc_SetEnable(); + } + + if (info->is_usb_online & USB_SM_RESTART) { + info->is_usb_online &= ~USB_SM_RESTART; + ddi_bc_SetEnable(); + } + + info->is_usb_online |= USB_REG_SET; + + dev_info(info->dev, "changed power connection to usb/5v present\n"); + + +done: + ddi_bc_StateMachine(); +out: + mutex_unlock(&info->sm_lock); +} + + + +static int bc_sm_restart(struct stmp3xxx_info *info) +{ + ddi_bc_Status_t bcret; + int ret = 0; + + mutex_lock(&info->sm_lock); + + /* ungate power clk */ + ddi_power_SetPowerClkGate(0); + + /* + * config battery charger state machine and move it to the Disabled + * state. This must be done before starting the state machine. + */ + bcret = ddi_bc_Init(info->sm_cfg); + if (bcret != DDI_BC_STATUS_SUCCESS) { + dev_err(info->dev, "battery charger init failed: %d\n", bcret); + ret = -EIO; + goto out; + } else { + + if (!info->regulator) { + info->regulator = regulator_get(NULL, "charger-1"); + if (!info->regulator || IS_ERR(info->regulator)) { + dev_err(info->dev, + "%s: failed to get regulator\n", __func__); + info->regulator = NULL; + } else { + regulator_set_current_limit( + info->regulator, 0, 0); + regulator_set_mode(info->regulator, + REGULATOR_MODE_FAST); + } + } + } + + + + /* schedule first call to state machine */ + mod_timer(&info->sm_timer, jiffies + 1); +out: + mutex_unlock(&info->sm_lock); + return ret; +} + +#ifndef POWER_FIQ + +static irqreturn_t stmp3xxx_irq_dcdc4p2_bo(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "dcdc4p2 brownout interrupt occurred\n"); + +#endif + ddi_power_handle_dcdc4p2_bo(); + return IRQ_HANDLED; +} + +static irqreturn_t stmp3xxx_irq_batt_brnout(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "battery brownout interrupt occurred\n"); + ddi_power_disable_power_interrupts(); +#else + ddi_power_shutdown(); +#endif + return IRQ_HANDLED; +} +static irqreturn_t stmp3xxx_irq_vddd_brnout(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "vddd brownout interrupt occurred\n"); + ddi_power_disable_power_interrupts(); +#else + ddi_power_shutdown(); +#endif + return IRQ_HANDLED; +} +static irqreturn_t stmp3xxx_irq_vdda_brnout(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "vdda brownout interrupt occurred\n"); + ddi_power_disable_power_interrupts(); +#else + ddi_power_shutdown(); +#endif + return IRQ_HANDLED; +} + +static irqreturn_t stmp3xxx_irq_vdd5v_droop(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "vdd5v droop interrupt occurred\n"); +#endif + ddi_power_handle_vdd5v_droop(); + + return IRQ_HANDLED; +} + +#endif /* if POWER_FIQ */ + +static irqreturn_t stmp3xxx_irq_vddio_brnout(int irq, void *cookie) +{ +#ifdef DEBUG_IRQS + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + dev_info(info->dev, "vddio brownout interrupt occurred\n"); + ddi_power_disable_power_interrupts(); +#else + ddi_power_handle_vddio_brnout(); +#endif + return IRQ_HANDLED; +} + +static irqreturn_t stmp3xxx_irq_vdd5v(int irq, void *cookie) +{ + struct stmp3xxx_info *info = (struct stmp3xxx_info *)cookie; + + + switch (ddi_power_GetPmu5vStatus()) { + + case new_5v_connection: + + ddi_power_disable_5v_connection_irq(); + dev_info(info->dev, "new 5v connection detected\n"); + info->sm_new_5v_connection_jiffies = jiffies; + mod_timer(&info->sm_timer, jiffies + 1); + break; + + case new_5v_disconnection: + + /* due to 5v connect vddio bo chip bug, we need to + * disable vddio interrupts until we reset the 5v + * detection for 5v connect detect. We want to allow + * some debounce time before enabling connect detection. + * This is handled in the vdd5v_droop interrupt for now. + */ + /* ddi_power_enable_vddio_interrupt(false); */ + + ddi_power_disable_5v_connection_irq(); + dev_info(info->dev, "new 5v disconnection detected\n"); + info->sm_new_5v_disconnection_jiffies = jiffies; + mod_timer(&info->sm_timer, jiffies + 1); + break; + + default: + + break; + + } + + return IRQ_HANDLED; +} + +static int stmp3xxx_bat_probe(struct platform_device *pdev) +{ + struct stmp3xxx_info *info; + int ret = 0; + + + + ret = ddi_power_init_battery(); + if (ret) { + printk(KERN_ERR "Aborting power driver initialization\n"); + return 1; + } + + + if (!pdev->dev.platform_data) { + printk(KERN_ERR "%s: missing platform data\n", __func__); + return -ENODEV; + } + + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->irq_vdd5v = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (info->irq_vdd5v == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + + info->irq_vddio_brnout = platform_get_resource( + pdev, IORESOURCE_IRQ, 5); + if (info->irq_vddio_brnout == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + +#ifndef POWER_FIQ + info->irq_dcdc4p2_bo = platform_get_resource(pdev, IORESOURCE_IRQ, 1); + if (info->irq_dcdc4p2_bo == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + + info->irq_batt_brnout = platform_get_resource(pdev, IORESOURCE_IRQ, 2); + if (info->irq_batt_brnout == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + + info->irq_vddd_brnout = platform_get_resource(pdev, IORESOURCE_IRQ, 3); + if (info->irq_vddd_brnout == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + + info->irq_vdda_brnout = platform_get_resource(pdev, IORESOURCE_IRQ, 4); + if (info->irq_vdda_brnout == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } + + + info->irq_vdd5v_droop = platform_get_resource(pdev, IORESOURCE_IRQ, 6); + if (info->irq_vdd5v_droop == NULL) { + printk(KERN_ERR "%s: failed to get irq resouce\n", __func__); + goto free_info; + } +#endif + + + platform_set_drvdata(pdev, info); + + info->dev = &pdev->dev; + info->sm_cfg = pdev->dev.platform_data; + + /* initialize bat power_supply struct */ + info->bat.name = "battery"; + info->bat.type = POWER_SUPPLY_TYPE_BATTERY; + info->bat.properties = stmp3xxx_bat_props; + info->bat.num_properties = ARRAY_SIZE(stmp3xxx_bat_props); + info->bat.get_property = stmp3xxx_bat_get_property; + + /* initialize ac power_supply struct */ + info->ac.name = "ac"; + info->ac.type = POWER_SUPPLY_TYPE_MAINS; + info->ac.properties = stmp3xxx_power_props; + info->ac.num_properties = ARRAY_SIZE(stmp3xxx_power_props); + info->ac.get_property = stmp3xxx_power_get_property; + + /* initialize usb power_supply struct */ + info->usb.name = "usb"; + info->usb.type = POWER_SUPPLY_TYPE_USB; + info->usb.properties = stmp3xxx_power_props; + info->usb.num_properties = ARRAY_SIZE(stmp3xxx_power_props); + info->usb.get_property = stmp3xxx_power_get_property; + + init_timer(&info->sm_timer); + info->sm_timer.data = (unsigned long)info; + info->sm_timer.function = state_machine_timer; + + mutex_init(&info->sm_lock); + INIT_WORK(&info->sm_work, state_machine_work); + + /* init LRADC channels to measure battery voltage and die temp */ + + __raw_writel(BM_POWER_5VCTRL_ENABLE_LINREG_ILIMIT, + REGS_POWER_BASE + HW_POWER_5VCTRL_CLR); + + ret = bc_sm_restart(info); + if (ret) + goto free_info; + + + ret = request_irq(info->irq_vdd5v->start, + stmp3xxx_irq_vdd5v, IRQF_DISABLED | IRQF_SHARED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + + ret = request_irq(info->irq_vddio_brnout->start, + stmp3xxx_irq_vddio_brnout, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + +#ifndef POWER_FIQ + ret = request_irq(info->irq_dcdc4p2_bo->start, + stmp3xxx_irq_dcdc4p2_bo, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + + ret = request_irq(info->irq_batt_brnout->start, + stmp3xxx_irq_batt_brnout, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + + ret = request_irq(info->irq_vddd_brnout->start, + stmp3xxx_irq_vddd_brnout, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + + ret = request_irq(info->irq_vdda_brnout->start, + stmp3xxx_irq_vdda_brnout, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } + + + ret = request_irq(info->irq_vdd5v_droop->start, + stmp3xxx_irq_vdd5v_droop, IRQF_DISABLED, + pdev->name, info); + if (ret) { + dev_err(info->dev, "failed to request irq\n"); + goto stop_sm; + } +#endif + + ret = power_supply_register(&pdev->dev, &info->bat); + if (ret) { + dev_err(info->dev, "failed to register battery\n"); + goto free_irq; + } + + ret = power_supply_register(&pdev->dev, &info->ac); + if (ret) { + dev_err(info->dev, "failed to register ac power supply\n"); + goto unregister_bat; + } + + ret = power_supply_register(&pdev->dev, &info->usb); + if (ret) { + dev_err(info->dev, "failed to register usb power supply\n"); + goto unregister_ac; + } + + /* handoff protection handling from bootlets protection method + * to kernel protection method + */ + init_protection(info); + + /* enable usb device presence detection */ + __raw_writel(BM_USBPHY_CTRL_ENDEVPLUGINDETECT, + REGS_USBPHY_BASE + HW_USBPHY_CTRL_SET); + + return 0; + +unregister_ac: + power_supply_unregister(&info->ac); +unregister_bat: + power_supply_unregister(&info->bat); +free_irq: + free_irq(info->irq_vdd5v->start, pdev); + free_irq(info->irq_vddio_brnout->start, pdev); +#ifndef POWER_FIQ + free_irq(info->irq_dcdc4p2_bo->start, pdev); + free_irq(info->irq_batt_brnout->start, pdev); + free_irq(info->irq_vddd_brnout->start, pdev); + free_irq(info->irq_vdda_brnout->start, pdev); + free_irq(info->irq_vdd5v_droop->start, pdev); +#endif + +stop_sm: + ddi_bc_ShutDown(); +free_info: + kfree(info); + return ret; +} + +static int stmp3xxx_bat_remove(struct platform_device *pdev) +{ + struct stmp3xxx_info *info = platform_get_drvdata(pdev); + + if (info->regulator) + regulator_put(info->regulator); + free_irq(info->irq_vdd5v->start, pdev); + free_irq(info->irq_vddio_brnout->start, pdev); +#ifndef POWER_FIQ + free_irq(info->irq_dcdc4p2_bo->start, pdev); + free_irq(info->irq_batt_brnout->start, pdev); + free_irq(info->irq_vddd_brnout->start, pdev); + free_irq(info->irq_vdda_brnout->start, pdev); + free_irq(info->irq_vdd5v_droop->start, pdev); +#endif + ddi_bc_ShutDown(); + power_supply_unregister(&info->usb); + power_supply_unregister(&info->ac); + power_supply_unregister(&info->bat); + return 0; +} + +static void stmp3xxx_bat_shutdown(struct platform_device *pdev) +{ + ddi_bc_ShutDown(); +} + + +#ifdef CONFIG_PM + +static int stmp3xxx_bat_suspend(struct platform_device *pdev, pm_message_t msg) +{ + struct stmp3xxx_info *info = platform_get_drvdata(pdev); + + mutex_lock(&info->sm_lock); + + /* enable USB 5v wake up so don't disable irq here*/ + + ddi_bc_SetDisable(); + /* cancel state machine timer */ + del_timer_sync(&info->sm_timer); + + mutex_unlock(&info->sm_lock); + return 0; +} + +static int stmp3xxx_bat_resume(struct platform_device *pdev) +{ + struct stmp3xxx_info *info = platform_get_drvdata(pdev); + ddi_bc_Cfg_t *cfg = info->sm_cfg; + + mutex_lock(&info->sm_lock); + + if (is_ac_online()) { + /* ac supply connected */ + dev_info(info->dev, "ac/5v present, enabling state machine\n"); + + info->is_ac_online = 1; + info->is_usb_online = 0; + ddi_bc_SetCurrentLimit( + NON_USB_5V_SUPPLY_CURRENT_LIMIT_MA /*mA*/); + ddi_bc_SetEnable(); + } else if (is_usb_online()) { + /* usb supply connected */ + dev_info(info->dev, "usb/5v present, enabling state machine\n"); + + info->is_ac_online = 0; + info->is_usb_online = 1; + ddi_bc_SetCurrentLimit(POWERED_USB_5V_CURRENT_LIMIT_MA /*mA*/); + ddi_bc_SetEnable(); + } else { + /* not powered */ + dev_info(info->dev, "%s: 5v not present\n", __func__); + + info->is_ac_online = 0; + info->is_usb_online = 0; + } + + /* enable 5v irq */ + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + + /* reschedule calls to state machine */ + mod_timer(&info->sm_timer, + jiffies + msecs_to_jiffies(cfg->u32StateMachinePeriod)); + + mutex_unlock(&info->sm_lock); + return 0; +} + +#else +#define stmp3xxx_bat_suspend NULL +#define stmp3xxx_bat_resume NULL +#endif + +static struct platform_driver stmp3xxx_batdrv = { + .probe = stmp3xxx_bat_probe, + .remove = stmp3xxx_bat_remove, + .shutdown = stmp3xxx_bat_shutdown, + .suspend = stmp3xxx_bat_suspend, + .resume = stmp3xxx_bat_resume, + .driver = { + .name = "stmp3xxx-battery", + .owner = THIS_MODULE, + }, +}; + +static int power_relinquish(void *data, int relinquish) +{ + return -1; +} + +static struct fiq_handler power_fiq = { + .name = "stmp3xxx-battery", + .fiq_op = power_relinquish +}; + +static struct pt_regs fiq_regs; +extern char power_fiq_start[], power_fiq_end[]; +extern void lock_vector_tlb(void *); +extern long power_fiq_count; +static struct proc_dir_entry *power_fiq_proc; + +static int __init stmp3xxx_bat_init(void) +{ +#ifdef POWER_FIQ + int ret; + ret = claim_fiq(&power_fiq); + if (ret) { + pr_err("Can't claim fiq"); + } else { + get_fiq_regs(&fiq_regs); + set_fiq_handler(power_fiq_start, power_fiq_end-power_fiq_start); + lock_vector_tlb((void *)0xffff0000); + lock_vector_tlb(REGS_POWER_BASE); + + /* disable interrupts to be configured as FIQs */ + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_CLR_ADDR(IRQ_DCDC4P2_BO)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_CLR_ADDR(IRQ_BATT_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_CLR_ADDR(IRQ_VDDD_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_CLR_ADDR(IRQ_VDD18_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_CLR_ADDR(IRQ_VDD5V_DROOP)); + + /* Enable these interrupts as FIQs */ + __raw_writel(BM_ICOLL_INTERRUPTn_ENFIQ, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_DCDC4P2_BO)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENFIQ, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_BATT_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENFIQ, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDDD_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENFIQ, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDD18_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENFIQ, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDD5V_DROOP)); + + /* enable FIQ functionality */ + __raw_writel(BM_ICOLL_CTRL_FIQ_FINAL_ENABLE, + HW_ICOLL_CTRL_SET_ADDR); + + /* enable these interrupts */ + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_DCDC4P2_BO)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_BATT_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDDD_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDD18_BRNOUT)); + + __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, + HW_ICOLL_INTERRUPTn_SET_ADDR(IRQ_VDD5V_DROOP)); + + } +#endif + return platform_driver_register(&stmp3xxx_batdrv); +} + +static void __exit stmp3xxx_bat_exit(void) +{ + platform_driver_unregister(&stmp3xxx_batdrv); +} + +module_init(stmp3xxx_bat_init); +module_exit(stmp3xxx_bat_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Steve Longerbeam "); +MODULE_DESCRIPTION("Linux glue to STMP3xxx battery state machine"); --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_hw.h +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_hw.h @@ -0,0 +1,93 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_hw.h +//! \brief Internal header file for Battery Charger hardware operations. +//! \date 06/2005 +//! +//! This file contains internal declarations for Battery Charger hardware +//! operations. +//! +//! \see ddi_bc.c and related files. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_HW_H +#define _DDI_BC_HW_H + +//////////////////////////////////////////////////////////////////////////////// +// Definitions +//////////////////////////////////////////////////////////////////////////////// + +//! The enumeration of battery modes. + +typedef enum _ddi_bc_BatteryMode { + DDI_BC_BATTERY_MODE_LI_ION_2_CELLS = 0, + DDI_BC_BATTERY_MODE_LI_ION_1_CELL = 1, + DDI_BC_BATTERY_MODE_2_CELLS = 2, + DDI_BC_BATTERY_MODE_1_CELL = 3 +} ddi_bc_BatteryMode_t; + +//! The enumeration of bias current sources. + +typedef enum _ddi_bc_BiasCurrentSource { + DDI_BC_EXTERNAL_BIAS_CURRENT = 0, + DDI_BC_INTERNAL_BIAS_CURRENT = 1, +} ddi_bc_BiasCurrentSource_t; + +//////////////////////////////////////////////////////////////////////////////// +// Prototypes +//////////////////////////////////////////////////////////////////////////////// + +extern int ddi_bc_hwBatteryChargerIsEnabled(void); +extern ddi_bc_BatteryMode_t ddi_bc_hwGetBatteryMode(void); +extern ddi_bc_BiasCurrentSource_t ddi_bc_hwGetBiasCurrentSource(void); +extern ddi_bc_Status_t +ddi_bc_hwSetBiasCurrentSource(ddi_bc_BiasCurrentSource_t); +extern ddi_bc_Status_t ddi_bc_hwSetChargingVoltage(uint16_t); +extern uint16_t ddi_bc_hwGetBatteryVoltage(void); +extern int ddi_bc_hwPowerSupplyIsPresent(void); +extern uint16_t ddi_bc_hwSetMaxCurrent(uint16_t); +extern uint16_t ddi_bc_hwGetMaxCurrent(void); +extern uint16_t ddi_bc_hwSetCurrentThreshold(uint16_t); +extern uint16_t ddi_bc_hwGetCurrentThreshold(void); +extern int ddi_bc_hwChargerPowerIsOn(void); +extern void ddi_bc_hwSetChargerPower(int); +extern int ddi_bc_hwGetChargeStatus(void); +extern void ddi_bc_hwGetDieTemp(int16_t *, int16_t *); +extern ddi_bc_Status_t ddi_bc_hwGetBatteryTemp(uint16_t *); +uint8_t ddi_bc_hwCurrentToSetting(uint16_t); +uint16_t ddi_bc_hwSettingToCurrent(uint8_t); +uint16_t ddi_bc_hwExpressibleCurrent(uint16_t); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Checks to see if the DCDC has been manually enabled +//! +//! \fntype Function +//! +//! \retval true if DCDC is ON, false if DCDC is OFF. +//! +//////////////////////////////////////////////////////////////////////////////// +bool ddi_bc_hwIsDcdcOn(void); + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/fiq.S +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/fiq.S @@ -0,0 +1,108 @@ +#include +#include +#include +#include +#include +#include +#include +#include + + .align 5 + .globl power_fiq_start + .globl power_fiq_end + .globl power_fiq_count + .globl lock_vector_tlb + +power_fiq_start: + + ldr r8,power_reg + ldr r9,[r8,#HW_POWER_CTRL ] + ldr r10,power_off + + @ when VDDIO_BO_IRQ, + @ disabled, handled in IRQ for now + @tst r9, #BM_POWER_CTRL_VDDIO_BO_IRQ + + + @ when BATT_BO_IRQ, VDDD_BO_IRQ, VDDA_BO_IRQ, power off chip + ldr r11,power_bo + tst r9, r11 + strne r10,[r8,#HW_POWER_RESET] + + @VDD5V_DROOP_IRQ + tst r9, #BM_POWER_CTRL_VDD5V_DROOP_IRQ + beq check_dcdc4p2 + + @ handle errata + ldr r10, [r8, #HW_POWER_DCDC4P2] + orr r10,r10,#(BM_POWER_DCDC4P2_TRG) + orr r10,r10,#(BF_POWER_DCDC4P2_CMPTRIP(31)) + str r10,[r8, #(HW_POWER_DCDC4P2)] + + @ if battery is below brownout level, shutdown asap + ldr r10, [r8, #HW_POWER_STS] + tst r10, #BM_POWER_STS_BATT_BO + ldr r10, power_off + strne r10, [r8, #HW_POWER_RESET] + + @ disable viddio irq + mov r11, #BM_POWER_CTRL_ENIRQ_VDDIO_BO + str r11, [r8, #HW_POWER_CTRL_CLR] + + @ enable battery BO irq + mov r11, #BM_POWER_CTRL_BATT_BO_IRQ + str r11, [r8, #HW_POWER_CTRL_CLR] + mov r11, #BM_POWER_CTRL_ENIRQBATT_BO + str r11, [r8, #HW_POWER_CTRL_SET] + + @ disable dcdc4p2 interrupt + mov r11, #BM_POWER_CTRL_ENIRQ_DCDC4P2_BO + str r11, [r8, #HW_POWER_CTRL_CLR] + + @ disable vdd5v_droop interrupt + mov r11, #BM_POWER_CTRL_ENIRQ_VDD5V_DROOP + str r11, [r8, #HW_POWER_CTRL_CLR] + +check_dcdc4p2: + @ when DCDC4P2_BO_IRQ, + tst r9, #BM_POWER_CTRL_DCDC4P2_BO_IRQ + + mov r11, #BM_POWER_CTRL_BATT_BO_IRQ + strne r11, [r8, #HW_POWER_CTRL_CLR] + + mov r11, #BM_POWER_CTRL_ENIRQBATT_BO + strne r11, [r8, #HW_POWER_CTRL_SET] + + mov r11, #BM_POWER_CTRL_ENIRQ_DCDC4P2_BO + strne r11, [r8, #HW_POWER_CTRL_CLR] + + + + @return from fiq + subs pc,lr, #4 + +power_reg: + .long REGS_POWER_BASE +power_off: + .long 0x3e770001 +power_bo: + .long BM_POWER_CTRL_BATT_BO_IRQ | \ + BM_POWER_CTRL_VDDA_BO_IRQ | BM_POWER_CTRL_VDDD_BO_IRQ +power_fiq_count: + .long 0 +power_fiq_end: + +lock_vector_tlb: + + mov r1, r0 @ set r1 to the value of the address to be locked down + mcr p15,0,r1,c8,c7,1 @ invalidate TLB single entry to ensure that + @ LockAddr is not already in the TLB + mrc p15,0,r0,c10,c0,0 @ read the lockdown register + orr r0,r0,#1 @ set the preserve bit + mcr p15,0,r0,c10,c0,0 @ write to the lockdown register + ldr r1,[r1] @ TLB will miss, and entry will be loaded + mrc p15,0,r0,c10,c0,0 @ read the lockdown register (victim will have + @ incremented) + bic r0,r0,#1 @ clear preserve bit + mcr p15,0,r0,c10,c0,0 @ write to the lockdown registerADR r1,LockAddr + mov pc,lr @ --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_power_battery.h +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_power_battery.h @@ -0,0 +1,95 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//! \brief Battery modes +typedef enum { + // 37xx battery modes + //! \brief LiIon battery powers the player + DDI_POWER_BATT_MODE_LIION = 0, + //! \brief Alkaline/NiMH battery powers the player + DDI_POWER_BATT_MODE_ALKALINE_NIMH = 1, +} ddi_power_BatteryMode_t; + + +//! \brief Possible 5V detection methods +typedef enum { + //! \brief Use VBUSVALID comparator for detection + DDI_POWER_5V_VBUSVALID, + //! \brief Use VDD5V_GT_VDDIO comparison for detection + DDI_POWER_5V_VDD5V_GT_VDDIO +} ddi_power_5vDetection_t; + + +enum ddi_power_5v_status { + new_5v_connection, + existing_5v_connection, + new_5v_disconnection, + existing_5v_disconnection, +} ; + + +uint16_t ddi_power_convert_current_to_setting(uint16_t u16Current); +uint16_t ddi_power_convert_setting_to_current(uint16_t u16Setting); +void ddi_power_enable_5v_to_battery_handoff(void); +void ddi_power_execute_5v_to_battery_handoff(void); +void ddi_power_enable_battery_to_5v_handoff(void); +void ddi_power_execute_battery_to_5v_handoff(void); +int ddi_power_init_battery(void); +ddi_power_BatteryMode_t ddi_power_GetBatteryMode(void); +bool ddi_power_GetBatteryChargerEnabled(void); +bool ddi_power_GetChargerPowered(void); +void ddi_power_SetChargerPowered(bool bPowerOn); +int ddi_power_GetChargeStatus(void); +uint16_t ddi_power_GetBattery(void); +uint16_t ddi_power_GetBatteryBrownout(void); +int ddi_power_SetBatteryBrownout(uint16_t u16BattBrownout_mV); +uint16_t ddi_power_SetMaxBatteryChargeCurrent(uint16_t u16MaxCur); +uint16_t ddi_power_GetMaxBatteryChargeCurrent(void); +uint16_t ddi_power_SetBatteryChargeCurrentThreshold(uint16_t u16Thresh); +uint16_t ddi_power_GetBatteryChargeCurrentThreshold(void); +uint16_t ddi_power_ExpressibleCurrent(uint16_t u16Current); +bool ddi_power_Get5vPresentFlag(void); +void ddi_power_GetDieTemp(int16_t * pLow, int16_t * pHigh); +bool ddi_power_IsDcdcOn(void); +void ddi_power_SetPowerClkGate(bool bGate); +bool ddi_power_GetPowerClkGate(void); +enum ddi_power_5v_status ddi_power_GetPmu5vStatus(void); +void ddi_power_EnableBatteryBoFiq(bool bEnable); +void ddi_power_disable_5v_connection_irq(void); +void ddi_power_enable_5v_disconnect_detection(void); +void ddi_power_enable_5v_connect_detection(void); +void ddi_power_Enable5vDisconnectShutdown(bool bEnable); +void ddi_power_enable_5v_to_battery_xfer(bool bEnable); +void ddi_power_init_4p2_protection(void); +bool ddi_power_check_4p2_bits(void); +void ddi_power_Start4p2Dcdc(bool battery_ready); +void ddi_power_Init4p2Params(void); +bool ddi_power_IsBattRdyForXfer(void); +void ddi_power_EnableVbusDroopIrq(void); +void ddi_power_Enable4p2(uint16_t target_current_limit_ma); +uint16_t ddi_power_BringUp4p2Regulator( + uint16_t target_current_limit_ma, + bool b4p2_dcdc_enabled); +void ddi_power_Set4p2BoLevel(uint16_t bo_voltage_mv); +void ddi_power_EnableBatteryBoInterrupt(bool bEnable); +void ddi_power_handle_cmptrip(void); +uint16_t ddi_power_set_4p2_ilimit(uint16_t ilimit); +void ddi_power_shutdown(void); +void ddi_power_handle_dcdc4p2_bo(void); +void ddi_power_enable_vddio_interrupt(bool enable); +void ddi_power_handle_vddio_brnout(void); +void ddi_power_EnableDcdc4p2BoInterrupt(bool bEnable); +void ddi_power_handle_vdd5v_droop(void); +void ddi_power_InitOutputBrownouts(void); +void ddi_power_disable_power_interrupts(void); +bool ddi_power_Get5vDroopFlag(void); --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_sm.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_sm.c @@ -0,0 +1,916 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_sm.c +//! \brief Contains the Battery Charger state machine. +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Includes +//////////////////////////////////////////////////////////////////////////////// + +#include +#include "ddi_bc_internal.h" + +#include + +//////////////////////////////////////////////////////////////////////////////// +// Definitions +//////////////////////////////////////////////////////////////////////////////// + +// This is the minimum time we must charge before we transition from +// the charging state to the topping off. If we reach the +// u16ChargingThresholdCurrent charge curent before then, the battery was +// already full so we can avoid the risk of charging it past .1C for +// too long. + +#define TRANSITION_TO_TOPOFF_MINIMUM_CHARGE_TIME_mS 1 * 60 * 1000 // 1 minute + +//////////////////////////////////////////////////////////////////////////////// +// Variables +//////////////////////////////////////////////////////////////////////////////// + +// The current state. + +ddi_bc_State_t g_ddi_bc_State = DDI_BC_STATE_UNINITIALIZED; + +// This table contains pointers to the functions that implement states. The +// table is indexed by state. Note that it's critically important for this +// table to agree with the state enumeration in ddi_bc.h. + +static ddi_bc_Status_t ddi_bc_Uninitialized(void); +static ddi_bc_Status_t ddi_bc_Broken(void); +static ddi_bc_Status_t ddi_bc_Disabled(void); +static ddi_bc_Status_t ddi_bc_WaitingToCharge(void); +static ddi_bc_Status_t ddi_bc_Conditioning(void); +static ddi_bc_Status_t ddi_bc_Charging(void); +static ddi_bc_Status_t ddi_bc_ToppingOff(void); + + +ddi_bc_Status_t(*const (stateFunctionTable[])) (void) = { +ddi_bc_Uninitialized, + ddi_bc_Broken, + ddi_bc_Disabled, + ddi_bc_WaitingToCharge, + ddi_bc_Conditioning, + ddi_bc_Charging, ddi_bc_ToppingOff}; + +// Used by states that need to watch the time. +uint32_t g_ddi_bc_u32StateTimer = 0; + +/* Always attempt to charge on first 5V connection */ +bool bRestartChargeCycle = true; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG +static uint16_t u16ExternalBatteryPowerVoltageCheck = 0; +#endif + +ddi_bc_BrokenReason_t ddi_bc_gBrokenReason = DDI_BC_BROKEN_UNINITIALIZED; + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Transition to the Waiting to Charge state. +//! +//! \fntype Function +//! +//! This function implements the transition to the Waiting to Charge state. +//! +//////////////////////////////////////////////////////////////////////////////// +static void TransitionToWaitingToCharge(void) +{ + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Reset the current ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Move to the Waiting to Charge state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_WAITING_TO_CHARGE; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: now waiting to charge\n"); +#endif + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Transition to the Conditioning state. +//! +//! \fntype Function +//! +//! This function implements the transition to the Conditioning state. +//! +//////////////////////////////////////////////////////////////////////////////// +static void TransitionToConditioning(void) +{ + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Set up the current ramp for conditioning. + //-------------------------------------------------------------------------- + + ddi_bc_RampSetTarget(g_ddi_bc_Configuration.u16ConditioningCurrent); + + //-------------------------------------------------------------------------- + // Move to the Conditioning state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_CONDITIONING; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: now conditioning\n"); +#endif + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Transition to the Charging state. +//! +//! \fntype Function +//! +//! This function implements the transition to the Charging state. +//! +//////////////////////////////////////////////////////////////////////////////// +static void TransitionToCharging(void) +{ + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Set up the current ramp for charging. + //-------------------------------------------------------------------------- + + ddi_bc_RampSetTarget(g_ddi_bc_Configuration.u16ChargingCurrent); + + //-------------------------------------------------------------------------- + // We'll be finished charging when the current flow drops below this level. + //-------------------------------------------------------------------------- + + ddi_bc_hwSetCurrentThreshold(g_ddi_bc_Configuration. + u16ChargingThresholdCurrent); + + //-------------------------------------------------------------------------- + // Move to the Charging state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_CHARGING; +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: now charging\n"); +#endif +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Transition to the Topping Off state. +//! +//! \fntype Function +//! +//! This function implements the transition to the Topping Off state. +//! +//////////////////////////////////////////////////////////////////////////////// +static void TransitionToToppingOff(void) +{ + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Set up the current ramp for topping off. + //-------------------------------------------------------------------------- + + ddi_bc_RampSetTarget(g_ddi_bc_Configuration.u16ChargingCurrent); + + //-------------------------------------------------------------------------- + // Move to the Topping Off state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_TOPPING_OFF; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: now topping off\n"); +#endif + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Transition to the Broken state. +//! +//! \fntype Function +//! +//! This function implements the transition to the Broken state. +//! +//////////////////////////////////////////////////////////////////////////////// +static void TransitionToBroken(void) +{ + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Reset the current ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Move to the Broken state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_BROKEN; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: declaring a broken battery\n"); +#endif + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Uninitialized state function. +//! +//! \fntype Function +//! +//! This function implements the Uninitialized state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_Uninitialized(void) +{ + + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // Increment the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer += g_ddi_bc_Configuration.u32StateMachinePeriod; + + //-------------------------------------------------------------------------- + // The only way to leave this state is with a call to ddi_bc_Initialize. So, + // calling this state function does nothing. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Broken state function. +//! +//! \fntype Function +//! +//! This function implements the Broken state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_Broken(void) +{ + + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // Increment the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer += g_ddi_bc_Configuration.u32StateMachinePeriod; + + //-------------------------------------------------------------------------- + // The only way to leave this state is with a call to ddi_bc_SetFixed. So, + // calling this state function does nothing. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Disabled state function. +//! +//! \fntype Function +//! +//! This function implements the Disabled state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_Disabled(void) +{ + + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // Increment the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer += g_ddi_bc_Configuration.u32StateMachinePeriod; + + //-------------------------------------------------------------------------- + // The only way to leave this state is with a call to ddi_bc_SetEnable. So, + // calling this state function does nothing. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Waitin to Charge state function. +//! +//! \fntype Function +//! +//! This function implements the Waiting to Charge state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_WaitingToCharge(void) +{ + uint16_t u16BatteryVoltage; + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // Increment the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer += g_ddi_bc_Configuration.u32StateMachinePeriod; + + //-------------------------------------------------------------------------- + // Check if the power supply is present. If not, we're not going anywhere. + //-------------------------------------------------------------------------- + + if (!ddi_bc_hwPowerSupplyIsPresent()) { +#ifdef CONFIG_POWER_SUPPLY_DEBUG + u16ExternalBatteryPowerVoltageCheck = 0; +#endif + return (DDI_BC_STATUS_SUCCESS); + } + //-------------------------------------------------------------------------- + // If control arrives here, we're connected to a power supply. Have a look + // at the battery voltage. + //-------------------------------------------------------------------------- + + u16BatteryVoltage = ddi_bc_hwGetBatteryVoltage(); + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + if (u16ExternalBatteryPowerVoltageCheck) { + if ((u16ExternalBatteryPowerVoltageCheck - u16BatteryVoltage) > + 300) { + /* + * If control arrives here, battery voltage has + * dropped too quickly after the first charge + * cycle. We think an external voltage regulator is + * connected. + */ + + ddi_bc_gBrokenReason = + DDI_BC_BROKEN_EXTERNAL_BATTERY_VOLTAGE_DETECTED; + + TransitionToBroken(); + + //---------------------------------------------------------------------- + // Tell our caller the battery appears to be broken. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_BROKEN); + } else { + // reset this check + u16ExternalBatteryPowerVoltageCheck = 0; + } + + } +#endif + + + //-------------------------------------------------------------------------- + // If the battery voltage isn't low, we don't need to be charging it. We + // use a 5% margin to decide. + //-------------------------------------------------------------------------- + + if (!bRestartChargeCycle) { + uint16_t x; + + x = u16BatteryVoltage + (u16BatteryVoltage / 20); + + if (x >= g_ddi_bc_Configuration.u16ChargingVoltage) + return (DDI_BC_STATUS_SUCCESS); + + } + + bRestartChargeCycle = false; + //-------------------------------------------------------------------------- + // If control arrives here, the battery is low. How low? + //-------------------------------------------------------------------------- + + if (u16BatteryVoltage < + g_ddi_bc_Configuration.u16ConditioningThresholdVoltage) { + + //---------------------------------------------------------------------- + // If control arrives here, the battery is very low and it needs to be + // conditioned. + //---------------------------------------------------------------------- + + TransitionToConditioning(); + + } else { + + //---------------------------------------------------------------------- + // If control arrives here, the battery isn't too terribly low. + //---------------------------------------------------------------------- + + TransitionToCharging(); + + } + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Conditioning state function. +//! +//! \fntype Function +//! +//! This function implements the Conditioning state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_Conditioning(void) +{ + + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // If we're not under an alarm, increment the state timer. + //-------------------------------------------------------------------------- + + if (!ddi_bc_RampGetDieTempAlarm() && !ddi_bc_RampGetBatteryTempAlarm()) { + g_ddi_bc_u32StateTimer += + g_ddi_bc_Configuration.u32StateMachinePeriod; + } + //-------------------------------------------------------------------------- + // Check if the power supply is still around. + //-------------------------------------------------------------------------- + + if (!ddi_bc_hwPowerSupplyIsPresent()) { + + //---------------------------------------------------------------------- + // If control arrives here, the power supply has been removed. Go back + // and wait. + //---------------------------------------------------------------------- + + TransitionToWaitingToCharge(); + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + + //-------------------------------------------------------------------------- + // If control arrives here, we're still connected to a power supply. + // Check if a battery is connected. If the voltage rises to high with only + // conditioning charge current, we determine that a battery is not connected. + // If that is not the case and a battery is connected, check + // if the battery voltage indicates it still needs conditioning. + //-------------------------------------------------------------------------- + +// if (ddi_bc_hwGetBatteryVoltage() >= 3900) { + if ((ddi_bc_hwGetBatteryVoltage() > + g_ddi_bc_Configuration.u16ConditioningMaxVoltage) && + (ddi_power_GetMaxBatteryChargeCurrent() < + g_ddi_bc_Configuration.u16ConditioningCurrent)) { + //---------------------------------------------------------------------- + // If control arrives here, voltage has risen too quickly for so + // little charge being applied so their must be no battery connected. + //---------------------------------------------------------------------- + + ddi_bc_gBrokenReason = DDI_BC_BROKEN_NO_BATTERY_DETECTED; + + TransitionToBroken(); + + //---------------------------------------------------------------------- + // Tell our caller the battery appears to be broken. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_BROKEN); + + } + + if (ddi_bc_hwGetBatteryVoltage() >= + g_ddi_bc_Configuration.u16ConditioningMaxVoltage) { + + //---------------------------------------------------------------------- + // If control arrives here, this battery no longer needs conditioning. + //---------------------------------------------------------------------- + + TransitionToCharging(); + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + //-------------------------------------------------------------------------- + // Have we been in this state too long? + //-------------------------------------------------------------------------- + + if (g_ddi_bc_u32StateTimer >= + g_ddi_bc_Configuration.u32ConditioningTimeout) { + + //---------------------------------------------------------------------- + // If control arrives here, we've been here too long. + //---------------------------------------------------------------------- + + ddi_bc_gBrokenReason = DDI_BC_BROKEN_CHARGING_TIMEOUT; + + TransitionToBroken(); + + //---------------------------------------------------------------------- + // Tell our caller the battery appears to be broken. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_BROKEN); + + } + //-------------------------------------------------------------------------- + // If control arrives here, we're staying in this state. Step the current + // ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(g_ddi_bc_Configuration.u32StateMachinePeriod); + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Charging state function. +//! +//! \fntype Function +//! +//! This function implements the Charging state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_Charging(void) +{ + + //-------------------------------------------------------------------------- + // This variable counts the number of times we've seen the charging status + // bit cleared. + //-------------------------------------------------------------------------- + + static int iStatusCount = 0; + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // If we're not under an alarm, increment the state timer. + //-------------------------------------------------------------------------- + + if (!ddi_bc_RampGetDieTempAlarm() && !ddi_bc_RampGetBatteryTempAlarm()) { + g_ddi_bc_u32StateTimer += + g_ddi_bc_Configuration.u32StateMachinePeriod; + } + /* Check if the power supply is still around. */ + + + if (!ddi_bc_hwPowerSupplyIsPresent()) { + + //---------------------------------------------------------------------- + // If control arrives here, the power supply has been removed. Go back + // and wait. + //---------------------------------------------------------------------- + + TransitionToWaitingToCharge(); + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + //-------------------------------------------------------------------------- + // If control arrives here, we're still connected to a power supply. We need + // to decide now if the battery is still charging, or if it's nearly full. + // If it's still charging, we'll stay in this state. Otherwise, we'll move + // to the Topping Off state. + // + // Most of the time, we decide that the battery is still charging simply by + // checking if the the actual current flow is above the charging threshold + // current (as indicated by the charge status bit). However, if we're + // still ramping up to full charging current, the hardware may still be set + // to deliver an amount that's less than the threshold. In that case, the + // charging status bit would *definitely* show a low charging current, but + // that doesn't mean the battery is ready for topping off. + // + // So, in summary, we will move to the Topping Off state if both of the + // following are true: + // + // 1) The maximum current set in the hardware is greater than the charging + // threshold. + // -AND- + // 2) The actual current flow is also higher than the threshold (as + // indicated by the charge status bit). + // + //-------------------------------------------------------------------------- + + + + ddi_bc_hwSetCurrentThreshold(g_ddi_bc_Configuration. + u16ChargingThresholdCurrent); + + + { + uint16_t u16ActualProgrammedCurrent = ddi_bc_hwGetMaxCurrent(); + + //---------------------------------------------------------------------- + // Get the Maximum current that we will ramp to. + //---------------------------------------------------------------------- + + //---------------------------------------------------------------------- + // Not all possible values are expressible by the BATTCHRG_I bitfield. + // The following coverts the max current value into the the closest hardware + // expressible bitmask equivalent. Then, it converts this back to the actual + // decimal current value that this bitmask represents. + //---------------------------------------------------------------------- + + uint16_t u16CurrentRampTarget = ddi_bc_RampGetTarget(); + + if (u16CurrentRampTarget > ddi_bc_RampGetLimit()) + u16CurrentRampTarget = ddi_bc_RampGetLimit(); + + //---------------------------------------------------------------------- + // Not all possible values are expressible by the BATTCHRG_I bitfield. + // The following coverts the max current value into the the closest hardware + // expressible bitmask equivalent. Then, it converts this back to the actual + // decimal current value that this bitmask represents. + //---------------------------------------------------------------------- + + u16CurrentRampTarget = + ddi_bc_hwExpressibleCurrent(u16CurrentRampTarget); + + //---------------------------------------------------------------------- + // We want to wait before we check the charge status bit until the ramping + // up is complete. Because the charge status bit is noisy, we want to + // disregard it until the programmed charge currint in BATTCHRG_I is well + // beyond the STOP_ILIMIT value. + //---------------------------------------------------------------------- + if ((u16ActualProgrammedCurrent >= u16CurrentRampTarget) && + !ddi_bc_hwGetChargeStatus()) { + uint8_t u8IlimitThresholdLimit; + //---------------------------------------------------------------------- + // If control arrives here, the hardware flag is telling us that the + // charging current has fallen below the threshold. We need to see this + // happen twice consecutively before we believe it. Increment the count. + //---------------------------------------------------------------------- + + iStatusCount++; + + + u8IlimitThresholdLimit = 10; + + //---------------------------------------------------------------------- + // How many times in a row have we seen this status bit low? + //---------------------------------------------------------------------- + + if (iStatusCount >= u8IlimitThresholdLimit) { + + /* + * If control arrives here, we've seen the + * CHRGSTS bit low too many times. This means + * it's time to move to the Topping Off state. + * First, reset the status count for the next + * time we're in this state. + */ + + iStatusCount = 0; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + u16ExternalBatteryPowerVoltageCheck = + ddi_bc_hwGetBatteryVoltage(); +#endif + + + + /* Move to the Topping Off state */ + + + TransitionToToppingOff(); + + //------------------------------------------------------------------ + // Return success. + //------------------------------------------------------------------ + + return (DDI_BC_STATUS_SUCCESS); + + } + + } else { + + //---------------------------------------------------------------------- + // If control arrives here, the battery is still charging. Clear the + // status count. + //---------------------------------------------------------------------- + + iStatusCount = 0; + + } + + } + + //-------------------------------------------------------------------------- + // Have we been in this state too long? + //-------------------------------------------------------------------------- + + if (g_ddi_bc_u32StateTimer >= g_ddi_bc_Configuration.u32ChargingTimeout) { + + //---------------------------------------------------------------------- + // If control arrives here, we've been here too long. + //---------------------------------------------------------------------- + + ddi_bc_gBrokenReason = DDI_BC_BROKEN_CHARGING_TIMEOUT; + + TransitionToBroken(); + + //---------------------------------------------------------------------- + // Tell our caller the battery appears to be broken. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_BROKEN); + + } + //-------------------------------------------------------------------------- + // If control arrives here, we're staying in this state. Step the current + // ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(g_ddi_bc_Configuration.u32StateMachinePeriod); + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Topping Off state function. +//! +//! \fntype Function +//! +//! This function implements the Topping Off state. +//! +//////////////////////////////////////////////////////////////////////////////// +static ddi_bc_Status_t ddi_bc_ToppingOff(void) +{ + + //-------------------------------------------------------------------------- + // The first order of business is to update alarms. + + //-------------------------------------------------------------------------- + + ddi_bc_RampUpdateAlarms(); + + //-------------------------------------------------------------------------- + // Increment the state timer. Notice that, unlike other states, we increment + // the state timer whether or not we're under an alarm. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer += g_ddi_bc_Configuration.u32StateMachinePeriod; + + //-------------------------------------------------------------------------- + // Check if the power supply is still around. + //-------------------------------------------------------------------------- + + if (!ddi_bc_hwPowerSupplyIsPresent()) { + + //---------------------------------------------------------------------- + // If control arrives here, the power supply has been removed. Go back + // and wait. + //--------------------------------------------------------------------- + + TransitionToWaitingToCharge(); + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + + //-------------------------------------------------------------------------- + // Are we done topping off? + //-------------------------------------------------------------------------- + if (g_ddi_bc_u32StateTimer >= g_ddi_bc_Configuration.u32TopOffPeriod) { + + //---------------------------------------------------------------------- + // If control arrives here, we're done topping off. + //---------------------------------------------------------------------- + + TransitionToWaitingToCharge(); + + } + //-------------------------------------------------------------------------- + // If control arrives here, we're staying in this state. Step the current + // ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(g_ddi_bc_Configuration.u32StateMachinePeriod); + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_sm.h +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_sm.h @@ -0,0 +1,46 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_sm.h +//! \brief Header file for the Battery Charger state machine. +//! \date 06/2005 +//! +//! This file contains declarations for the Battery Charger state machine. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_SM_H +#define _DDI_BC_SM_H + +//////////////////////////////////////////////////////////////////////////////// +// Externs +//////////////////////////////////////////////////////////////////////////////// + +//! The current state. + +extern ddi_bc_State_t g_ddi_bc_State; + +//! The state function table. + +extern ddi_bc_Status_t(*const (stateFunctionTable[])) (void); + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/Makefile +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the STMP3xxx battery charger driver +# + +obj-$(CONFIG_BATTERY_STMP3XXX) += stmp3xxx-battery.o + +stmp3xxx-battery-objs := ddi_bc_api.o ddi_bc_hw.o ddi_bc_init.o \ + ddi_bc_ramp.o ddi_bc_sm.o ddi_power_battery.o linux.o \ + fiq.o + --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_power_battery.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_power_battery.c @@ -0,0 +1,1815 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_power +//! @{ +// +// Copyright(C) 2005 SigmaTel, Inc. +// +//! \file ddi_power_battery.c +//! \brief Implementation file for the power driver battery charger. +//! +//////////////////////////////////////////////////////////////////////////////// +// Includes and external references +//////////////////////////////////////////////////////////////////////////////// +#include +#include +#include +#include /* cpu_relax */ +#include +#include +#include +#include +#include +#include +#include +#include "ddi_bc_internal.h" +#include + +//! \brief Base voltage to start battery calculations for LiIon +#define BATT_BRWNOUT_LIION_BASE_MV 2800 +//! \brief Constant to help with determining whether to round up or +//! not during calculation +#define BATT_BRWNOUT_LIION_CEILING_OFFSET_MV 39 +//! \brief Number of mV to add if rounding up in LiIon mode +#define BATT_BRWNOUT_LIION_LEVEL_STEP_MV 40 +//! \brief Constant value to be calculated by preprocessing +#define BATT_BRWNOUT_LIION_EQN_CONST \ + (BATT_BRWNOUT_LIION_BASE_MV - BATT_BRWNOUT_LIION_CEILING_OFFSET_MV) +//! \brief Base voltage to start battery calculations for Alkaline/NiMH +#define BATT_BRWNOUT_ALKAL_BASE_MV 800 +//! \brief Constant to help with determining whether to round up or +//! not during calculation +#define BATT_BRWNOUT_ALKAL_CEILING_OFFSET_MV 19 +//! \brief Number of mV to add if rounding up in Alkaline/NiMH mode +#define BATT_BRWNOUT_ALKAL_LEVEL_STEP_MV 20 +//! \brief Constant value to be calculated by preprocessing +#define BATT_BRWNOUT_ALKAL_EQN_CONST \ + (BATT_BRWNOUT_ALKAL_BASE_MV - BATT_BRWNOUT_ALKAL_CEILING_OFFSET_MV) + +#define GAIN_CORRECTION 1012 // 1.012 + +#define VBUSVALID_THRESH_2_90V 0x0 +#define VBUSVALID_THRESH_4_00V 0x1 +#define VBUSVALID_THRESH_4_10V 0x2 +#define VBUSVALID_THRESH_4_20V 0x3 +#define VBUSVALID_THRESH_4_30V 0x4 +#define VBUSVALID_THRESH_4_40V 0x5 +#define VBUSVALID_THRESH_4_50V 0x6 +#define VBUSVALID_THRESH_4_60V 0x7 + +#define LINREG_OFFSET_STEP_BELOW 0x2 +#define BP_POWER_BATTMONITOR_BATT_VAL 16 +#define BP_POWER_CHARGE_BATTCHRG_I 0 +#define BP_POWER_CHARGE_STOP_ILIMIT 8 + +#define VDD4P2_ENABLED + +#define DDI_POWER_BATTERY_XFER_THRESHOLD_MV 3200 + + +#ifndef BATTERY_VOLTAGE_CMPTRIP100_THRESHOLD_MV +#define BATTERY_VOLTAGE_CMPTRIP100_THRESHOLD_MV 4000 +#endif + +#ifndef BATTERY_VOLTAGE_CMPTRIP105_THRESHOLD_MV +#define BATTERY_VOLTAGE_CMPTRIP105_THRESHOLD_MV 3800 +#endif + +/* #define DEBUG_IRQS */ + +/* to be re-enabled once FIQ functionality is added */ +#define DISABLE_VDDIO_BO_PROTECTION +//////////////////////////////////////////////////////////////////////////////// +// Globals & Variables +//////////////////////////////////////////////////////////////////////////////// + + +/* Select your 5V Detection method */ + +/* static ddi_power_5vDetection_t DetectionMethod = + DDI_POWER_5V_VDD5V_GT_VDDIO; */ +static ddi_power_5vDetection_t DetectionMethod = DDI_POWER_5V_VBUSVALID; + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +#if 0 +static void dump_regs(void) +{ + printk("HW_POWER_CHARGE 0x%08x\n", __raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE)); + printk("HW_POWER_STS 0x%08x\n", __raw_readl(REGS_POWER_BASE + HW_POWER_STS)); + printk("HW_POWER_BATTMONITOR 0x%08x\n", __raw_readl(REGS_POWER_BASE + HW_POWER_BATTMONITOR)); +} +#endif + +//! This array maps bit numbers to current increments, as used in the register +//! fields HW_POWER_CHARGE.STOP_ILIMIT and HW_POWER_CHARGE.BATTCHRG_I. +static const uint16_t currentPerBit[] = { 10, 20, 50, 100, 200, 400 }; + +uint16_t ddi_power_convert_current_to_setting(uint16_t u16Current) +{ + int i; + uint16_t u16Mask; + uint16_t u16Setting = 0; + + // Scan across the bit field, adding in current increments. + u16Mask = (0x1 << 5); + + for (i = 5; (i >= 0) && (u16Current > 0); i--, u16Mask >>= 1) { + if (u16Current >= currentPerBit[i]) { + u16Current -= currentPerBit[i]; + u16Setting |= u16Mask; + } + } + + // Return the result. + return(u16Setting); +} + +//////////////////////////////////////////////////////////////////////////////// +//! See hw_power.h for details. +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_convert_setting_to_current(uint16_t u16Setting) +{ + int i; + uint16_t u16Mask; + uint16_t u16Current = 0; + + // Scan across the bit field, adding in current increments. + u16Mask = (0x1 << 5); + + for (i = 5; i >= 0; i--, u16Mask >>= 1) { + if (u16Setting & u16Mask) u16Current += currentPerBit[i]; + } + + // Return the result. + return(u16Current); +} + +void ddi_power_Enable5vDetection(void) +{ + u32 val; + // Disable hardware power down when 5V is inserted or removed + __raw_writel(BM_POWER_5VCTRL_PWDN_5VBRNOUT, + REGS_POWER_BASE + HW_POWER_5VCTRL_CLR); + + /* Enabling VBUSVALID hardware detection even if VDD5V_GT_VDDIO + * is the detection method being used for 5V status (hardware + * or software). This is in case any other drivers (such as + * USB) are specifically monitoring VBUSVALID status + */ + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_5VDETECT, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); + + // Set 5V detection threshold to 4.3V for VBUSVALID. + __raw_writel( + BF(VBUSVALID_THRESH_4_30V, POWER_5VCTRL_VBUSVALID_TRSH), + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); + + // gotta set LINREG_OFFSET to STEP_BELOW according to manual + val = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + val &= ~(BM_POWER_VDDIOCTRL_LINREG_OFFSET); + val |= BF(LINREG_OFFSET_STEP_BELOW, POWER_VDDIOCTRL_LINREG_OFFSET); + __raw_writel(val, REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + + val = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDACTRL); + val &= ~(BM_POWER_VDDACTRL_LINREG_OFFSET); + val |= BF(LINREG_OFFSET_STEP_BELOW, POWER_VDDACTRL_LINREG_OFFSET); + __raw_writel(val, REGS_POWER_BASE + HW_POWER_VDDACTRL); + + val = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDDCTRL); + val &= ~(BM_POWER_VDDDCTRL_LINREG_OFFSET); + val |= BF(LINREG_OFFSET_STEP_BELOW, POWER_VDDDCTRL_LINREG_OFFSET); + __raw_writel(val, REGS_POWER_BASE + HW_POWER_VDDDCTRL); + + /* Clear vbusvalid interrupt flag */ + __raw_writel(BM_POWER_CTRL_VBUSVALID_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + __raw_writel(BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + /* enable vbusvalid irq */ + + + /* enable 5V Detection interrupt vbusvalid irq */ + switch (DetectionMethod) { + case DDI_POWER_5V_VBUSVALID: + /* Check VBUSVALID for 5V present */ + __raw_writel(BM_POWER_CTRL_ENIRQ_VBUS_VALID, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + break; + case DDI_POWER_5V_VDD5V_GT_VDDIO: + /* Check VDD5V_GT_VDDIO for 5V present */ + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + break; + } +} + +/* + * This function prepares the hardware for a 5V-to-battery handoff. It assumes + * the current configuration is using 5V as the power source. The 5V + * interrupt will be set up for a 5V removal. + */ +void ddi_power_enable_5v_to_battery_handoff(void) +{ + /* Clear vbusvalid interrupt flag */ + __raw_writel(BM_POWER_CTRL_VBUSVALID_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + __raw_writel(BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + + /* detect 5v unplug */ + __raw_writel(BM_POWER_CTRL_POLARITY_VBUSVALID, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + __raw_writel(BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + +#ifndef VDD4P2_ENABLED + // Enable automatic transition to DCDC + __raw_writel(BM_POWER_5VCTRL_DCDC_XFER, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); +#endif +} + +/* + * This function will handle all the power rail transitions necesarry to power + * the chip from the battery when it was previously powered from the 5V power + * source. + */ +void ddi_power_execute_5v_to_battery_handoff(void) +{ + int val; +#ifdef VDD4P2_ENABLED + val = __raw_readl(REGS_POWER_BASE + HW_POWER_DCDC4P2); + val &= ~(BM_POWER_DCDC4P2_ENABLE_DCDC | BM_POWER_DCDC4P2_ENABLE_4P2); + __raw_writel(val, REGS_POWER_BASE + HW_POWER_DCDC4P2); + + __raw_writel(BM_POWER_5VCTRL_PWD_CHARGE_4P2, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); + + /* make VBUSVALID_TRSH 4400mV and set PWD_CHARGE_4P2 */ + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + __raw_writel(BF_POWER_5VCTRL_VBUSVALID_TRSH(VBUSVALID_THRESH_4_40V), + HW_POWER_5VCTRL_SET_ADDR); + +#else + // VDDD has different configurations depending on the battery type + // and battery level. + + // For LiIon battery, we will use the DCDC to power VDDD. + // Use LinReg offset for DCDC mode. + __raw_writel(BF_POWER_VDDDCTRL_LINREG_OFFSET(LINREG_OFFSET_STEP_BELOW), + HW_POWER_BASE + HW_POWER_VDDDCTRL_SET); + // Turn on the VDDD DCDC output and turn off the VDDD LinReg output. + __raw_writel(BM_POWER_VDDDCTRL_DISABLE_FET, + HW_POWER_BASE + HW_POWER_VDDDCTRL_CLR); + + __raw_writel(BM_POWER_VDDDCTRL_ENABLE_LINREG, + HW_POWER_BASE + HW_POWER_VDDDCTRL_CLR); + // Make sure stepping is enabled when using DCDC. + __raw_writel(BM_POWER_VDDDCTRL_DISABLE_STEPPING, + HW_POWER_BASE + HW_POWER_VDDDCTRL_CLR); + + // Power VDDA and VDDIO from the DCDC. + + /* Use LinReg offset for DCDC mode. */ + __raw_writel(BF_POWER_VDDACTRL_LINREG_OFFSET(LINREG_OFFSET_STEP_BELOW), + HW_POWER_BASE + HW_POWER_VDDACTRL_SET); + // Turn on the VDDA DCDC converter output and turn off LinReg output. + __raw_writel(BM_POWER_VDDACTRL_DISABLE_FET, + HW_POWER_BASE + HW_POWER_VDDACTRL_CLR); + __raw_writel(BM_POWER_VDDACTRL_ENABLE_LINREG, + HW_POWER_BASE + HW_POWER_VDDACTRL_CLR); + + // Make sure stepping is enabled when using DCDC. + __raw_writel(BM_POWER_VDDACTRL_DISABLE_STEPPING, + HW_POWER_BASE + HW_POWER_VDDACTRL_CLR); + + // Use LinReg offset for DCDC mode. + __raw_writel(BF_POWER_VDDIOCTRL_LINREG_OFFSET( + LINREG_OFFSET_STEP_BELOW + ), + HW_POWER_BASE + HW_POWER_VDDIOCTRL_SET); + + /* Turn on the VDDIO DCDC output and turn on the LinReg output.*/ + __raw_writel(BM_POWER_VDDIOCTRL_DISABLE_FET, + HW_POWER_BASE + HW_POWER_VDDIOCTRL_CLR); + + __raw_writel(BM_POWER_5VCTRL_ILIMIT_EQ_ZERO, + HW_POWER_BASE + HW_POWER_5VCTRL_CLR_CLR); + + // Make sure stepping is enabled when using DCDC. + __raw_writel(BM_POWER_VDDIOCTRL_DISABLE_STEPPING, + HW_POWER_BASE + HW_POWER_VDDIOCTRL_CLR); +#endif + +} + +/* + * This function sets up battery-to-5V handoff. The power switch from + * battery to 5V is automatic. This funtion enables the 5V present detection + * such that the 5V interrupt can be generated if it is enabled. (The interrupt + * handler can inform software the 5V present event.) To deal with noise or + * a high current, this function enables DCDC1/2 based on the battery mode. + */ +void ddi_power_enable_battery_to_5v_handoff(void) +{ + /* Clear vbusvalid interrupt flag */ + __raw_writel(BM_POWER_CTRL_VBUSVALID_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + __raw_writel(BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + + /* detect 5v plug-in */ + __raw_writel(BM_POWER_CTRL_POLARITY_VBUSVALID, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + __raw_writel(BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + +#ifndef VDD4P2_ENABLED + // Force current from 5V to be zero by disabling its entry source. + __raw_writel(BM_POWER_5VCTRL_ILIMIT_EQ_ZERO, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); +#endif + // Allow DCDC be to active when 5V is present. + __raw_writel(BM_POWER_5VCTRL_ENABLE_DCDC, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); +} + +/* This function handles the transitions on each of theVDD5V_GT_VDDIO power + * rails necessary to power the chip from the 5V power supply when it was + * previously powered from the battery power supply. + */ +void ddi_power_execute_battery_to_5v_handoff(void) +{ + +#ifdef VDD4P2_ENABLED + ddi_power_Enable4p2(450); +#else + // Disable the DCDC during 5V connections. + __raw_writel(BM_POWER_5VCTRL_ENABLE_DCDC, + HW_POWER_BAE + HW_POWER_5VCTRL_CLR); + + // Power the VDDD/VDDA/VDDIO rail from the linear regulator. The DCDC + // is ready to automatically power the chip when 5V is removed. + // Use this configuration when powering from 5V + + // Use LinReg offset for LinReg mode + __raw_writel(BF_POWER_VDDDCTRL_LINREG_OFFSET(LINREG_OFFSET_STEP_BELOW), + HW_POWER_BAE + HW_POWER_VDDDCTRL_SET); + + // Turn on the VDDD LinReg and turn on the VDDD DCDC output. The + // ENABLE_DCDC must be cleared to avoid LinReg and DCDC conflict. + __raw_writel(BM_POWER_VDDDCTRL_ENABLE_LINREG, + HW_POWER_BAE + HW_POWER_VDDDCTRL_SET); + __raw_writel(BM_POWER_VDDDCTRL_DISABLE_FET, + HW_POWER_BAE + HW_POWER_VDDDCTRL_CLR); + + // Make sure stepping is disabled when using linear regulators + __raw_writel(BM_POWER_VDDDCTRL_DISABLE_STEPPING, + HW_POWER_BAE + HW_POWER_VDDDCTRL_SET); + + // Use LinReg offset for LinReg mode + __raw_writel(BM_POWER_VDDACTRL_LINREG_OFFSET(LINREG_OFFSET_STEP_BELOW), + HW_POWER_BAE + HW_POWER_VDDACTRL_SET); + + + // Turn on the VDDA LinReg output and prepare the DCDC for transfer. + // ENABLE_DCDC must be clear to avoid DCDC and LinReg conflict. + stmp3xxx_set(BM_POWER_VDDACTRL_ENABLE_LINREG, + HW_POWER_BASE + HW_POWER_VDDACTRL_SET); + __raw_writel(BM_POWER_VDDACTRL_DISABLE_FET, + HW_POWER_BASE + HW_POWER_VDDACTRL_CLR); + + // Make sure stepping is disabled when using linear regulators + __raw_writel(BM_POWER_VDDACTRL_DISABLE_STEPPING, + HW_POWER_BASE + HW_POWER_VDDACTRL_SET); + + // Use LinReg offset for LinReg mode. + __raw_writel(BF_POWER_VDDIOCTRL_LINREG_OFFSET( + LINREG_OFFSET_STEP_BELOW), + HW_POWER_BASE + HW_POWER_VDDIOCTRL_SET); + + // Turn on the VDDIO LinReg output and prepare the VDDIO DCDC output. + // ENABLE_DCDC must be cleared to prevent DCDC and LinReg conflict. + __raw_writel(BM_POWER_VDDIOCTRL_DISABLE_FET, + HW_POWER_BASE + HW_POWER_VDDIOCTRL_CLR); + __raw_writel(BM_POWER_5VCTRL_ILIMIT_EQ_ZERO, + REGS_POWER_BASE + HW_POWER_5VCTRL_CLR); + + // Make sure stepping is disabled when using DCDC. + __raw_writel(BM_POWER_VDDIOCTRL_DISABLE_STEPPING, + REGS_POWER_BASE + HW_POWER_VDDIOCTRL_SET); +#endif +} + + +void ddi_power_Start4p2Dcdc(bool battery_ready) +{ + + uint32_t temp_reg, old_values; + + /* set vbusvalid threshold to 2.9V because of errata */ + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + +#if 0 + if (battery_ready) + ddi_power_EnableBatteryIrq(); + else + enable_4p2_fiq_shutdown(); +#endif + + /* enable hardware shutdown on battery brownout */ + __raw_writel( + BM_POWER_BATTMONITOR_PWDN_BATTBRNOUT | + __raw_readl(HW_POWER_BATTMONITOR_ADDR), + HW_POWER_BATTMONITOR_ADDR); + + /* set VBUS DROOP threshold to 4.3V */ + __raw_writel(BM_POWER_5VCTRL_VBUSDROOP_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + /* turn of vbus valid detection. Part of errate + * workaround. */ + __raw_writel(BM_POWER_5VCTRL_PWRUP_VBUS_CMPS, + HW_POWER_5VCTRL_SET_ADDR); + + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_5VDETECT, + HW_POWER_5VCTRL_CLR_ADDR); + + + temp_reg = (BM_POWER_CTRL_ENIRQ_VDDD_BO | + BM_POWER_CTRL_ENIRQ_VDDA_BO | + BM_POWER_CTRL_ENIRQ_VDDIO_BO | + BM_POWER_CTRL_ENIRQ_VDD5V_DROOP | + BM_POWER_CTRL_ENIRQ_VBUS_VALID); + + /* save off old brownout enable values */ + old_values = __raw_readl(HW_POWER_CTRL_ADDR) & + temp_reg; + + /* disable irqs affected by errata */ + __raw_writel(temp_reg, HW_POWER_CTRL_CLR_ADDR); + + /* Enable DCDC from 4P2 */ + __raw_writel(__raw_readl(HW_POWER_DCDC4P2_ADDR) | + BM_POWER_DCDC4P2_ENABLE_DCDC, + HW_POWER_DCDC4P2_ADDR); + + /* give a delay to check for errate noise problem */ + mdelay(1); + + temp_reg = (BM_POWER_CTRL_VDDD_BO_IRQ | + BM_POWER_CTRL_VDDA_BO_IRQ | + BM_POWER_CTRL_VDDIO_BO_IRQ | + BM_POWER_CTRL_VDD5V_DROOP_IRQ | + BM_POWER_CTRL_VBUSVALID_IRQ); + + /* stay in this loop until the false brownout indciations + * no longer occur or until 5V actually goes away + */ + while ((__raw_readl(HW_POWER_CTRL_ADDR) & temp_reg) && + !(__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ)) { + __raw_writel(temp_reg, HW_POWER_CTRL_CLR_ADDR); + + mdelay(1); + } + + /* revert to previous enable irq values */ + __raw_writel(old_values, HW_POWER_CTRL_SET_ADDR); + + if (DetectionMethod == DDI_POWER_5V_VBUSVALID) + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_5VDETECT, + HW_POWER_5VCTRL_SET_ADDR); +} + + +/* set the optimal CMPTRIP for the best possible 5V + * disconnection handling but without drawing power + * from the power on a stable 4p2 rails (at 4.2V). + */ +void ddi_power_handle_cmptrip(void) +{ + enum ddi_power_5v_status pmu_5v_status; + uint32_t temp = __raw_readl(HW_POWER_DCDC4P2_ADDR); + temp &= ~(BM_POWER_DCDC4P2_CMPTRIP); + + pmu_5v_status = ddi_power_GetPmu5vStatus(); + + /* CMPTRIP should remain at 31 when 5v is disconnected + * or 5v is connected but hasn't been handled yet + */ + if (pmu_5v_status != existing_5v_connection) + temp |= (31 << BP_POWER_DCDC4P2_CMPTRIP); + else if (ddi_power_GetBattery() > + BATTERY_VOLTAGE_CMPTRIP100_THRESHOLD_MV) + temp |= (1 << BP_POWER_DCDC4P2_CMPTRIP); + else if (ddi_power_GetBattery() > + BATTERY_VOLTAGE_CMPTRIP105_THRESHOLD_MV) + temp |= (24 << BP_POWER_DCDC4P2_CMPTRIP); + else + temp |= (31 << BP_POWER_DCDC4P2_CMPTRIP); + + + __raw_writel(temp, HW_POWER_DCDC4P2_ADDR); +} + +void ddi_power_Init4p2Params(void) +{ + uint32_t temp; + + ddi_power_handle_cmptrip(); + + temp = __raw_readl(HW_POWER_DCDC4P2_ADDR); + + /* DROPOUT CTRL to 10, TRG to 0 */ + temp &= ~(BM_POWER_DCDC4P2_TRG | BM_POWER_DCDC4P2_DROPOUT_CTRL); + temp |= (0xa << BP_POWER_DCDC4P2_DROPOUT_CTRL); + + __raw_writel(temp, HW_POWER_DCDC4P2_ADDR); + + + temp = __raw_readl(HW_POWER_5VCTRL_ADDR); + + /* HEADROOM_ADJ to 4, CHARGE_4P2_ILIMIT to 0 */ + temp &= ~(BM_POWER_5VCTRL_HEADROOM_ADJ | + BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT); + temp |= (4 << BP_POWER_5VCTRL_HEADROOM_ADJ); + +} + +bool ddi_power_IsBattRdyForXfer(void) +{ + uint16_t u16BatteryVoltage = ddi_power_GetBattery(); + + if (u16BatteryVoltage > DDI_POWER_BATTERY_XFER_THRESHOLD_MV) + return true; + else + return false; + +} + +void ddi_power_EnableVbusDroopIrq(void) +{ + + __raw_writel(BM_POWER_CTRL_VDD5V_DROOP_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_DROOP, + HW_POWER_CTRL_SET_ADDR); + +} + + +void ddi_power_Enable4p2(uint16_t target_current_limit_ma) +{ + + uint16_t u16BatteryVoltage; + uint32_t temp_reg; + + ddi_power_Init4p2Params(); + + /* disable 4p2 rail brownouts for now. (they + * should have already been off at this point) */ + __raw_writel(BM_POWER_CTRL_ENIRQ_DCDC4P2_BO, + HW_POWER_CTRL_CLR_ADDR); + + u16BatteryVoltage = ddi_power_GetBattery(); + + if (ddi_power_IsBattRdyForXfer()) { + + /* PWD_CHARGE_4P2 should already be set but just in case... */ + __raw_writel(BM_POWER_5VCTRL_PWD_CHARGE_4P2, + HW_POWER_5VCTRL_SET_ADDR); + + /* set CMPTRIP to DCDC_4P2 pin >= BATTERY pin */ + temp_reg = __raw_readl(HW_POWER_DCDC4P2_ADDR); + temp_reg &= ~(BM_POWER_DCDC4P2_CMPTRIP); + temp_reg |= (31 << BP_POWER_DCDC4P2_CMPTRIP); + __raw_writel(temp_reg, HW_POWER_DCDC4P2_ADDR); + + /* since we have a good battery, we can go ahead + * and turn on the Dcdcing from the 4p2 source. + * This is helpful in working around the chip + * errata. + */ + ddi_power_Start4p2Dcdc(true); + + /* Enable VbusDroopIrq to handle errata */ + + /* set vbus droop detection level to 4.3V */ + __raw_writel(BM_POWER_5VCTRL_VBUSDROOP_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + ddi_power_EnableVbusDroopIrq(); + /* now that the DCDC4P2 problems are cleared, + * turn on and ramp up the 4p2 regulator + */ + temp_reg = ddi_power_BringUp4p2Regulator( + target_current_limit_ma, true); + + /* if we still have our 5V connection, we can disable + * battery brownout interrupt. This is because the + * VDD5V DROOP IRQ handler will also shutdown if battery + * is browned out and it will enable the battery brownout + * and bring VBUSVALID_TRSH level back to a normal level + * which caused the hardware battery brownout shutdown + * to be enabled. The benefit of this is that device + * that have detachable batteries (or devices going through + * the assembly line and running this firmware to test + * with) can avoid shutting down if 5V is present and + * battery voltage goes away. + */ + if (!(__raw_readl(HW_POWER_CTRL_ADDR) & + (BM_POWER_CTRL_VBUSVALID_IRQ | + BM_POWER_CTRL_VDD5V_DROOP_IRQ))) { + ddi_power_EnableBatteryBoInterrupt(false); + } + + + + printk(KERN_INFO "4P2 rail started. 5V current limit\ + set to %dmA\n", temp_reg); + + } else { + + printk(KERN_ERR "4P2 rail was attempted to be started \ + from a system\ + with a very low battery voltage. This is not\ + yet handled by the kernel driver, only by the\ + bootlets. Remaining on battery power.\n"); + + if ((__raw_readl(HW_POWER_5VCTRL_ADDR) && + BM_POWER_5VCTRL_ENABLE_DCDC)) + ddi_power_EnableBatteryBoInterrupt(true); + +#if 0 + /* enable hardware shutdown (if 5v disconnected) + * on battery brownout */ + __raw_writel( + BM_POWER_BATTMONITOR_PWDN_BATTBRNOUT | + __raw_readl(HW_POWER_BATTMONITOR_ADDR), + HW_POWER_BATTMONITOR_ADDR); + + /* turn on and ramp up the 4p2 regulator */ + temp_reg = ddi_power_BringUp4p2Regulator( + target_current_limit_ma, false); + + Configure4p2FiqShutdown(); + + SetVbusValidThresh(0); +#endif + } +} + +/* enable and ramp up 4p2 regulator */ +uint16_t ddi_power_BringUp4p2Regulator( + uint16_t target_current_limit_ma, + bool b4p2_dcdc_enabled) +{ + uint32_t temp_reg; + uint16_t charge_4p2_ilimit = 0; + + /* initial current limit to 0 */ + __raw_writel(BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT, + HW_POWER_5VCTRL_CLR_ADDR); + + __raw_writel(__raw_readl(HW_POWER_DCDC4P2_ADDR) | + BM_POWER_DCDC4P2_ENABLE_4P2, + HW_POWER_DCDC4P2_ADDR); + + /* set 4p2 target voltage to zero */ + temp_reg = __raw_readl(HW_POWER_DCDC4P2_ADDR); + temp_reg &= (~BM_POWER_DCDC4P2_TRG); + __raw_writel(temp_reg, HW_POWER_DCDC4P2_ADDR); + + /* Enable 4P2 regulator*/ + __raw_writel(BM_POWER_5VCTRL_PWD_CHARGE_4P2, + HW_POWER_5VCTRL_CLR_ADDR); + + if (target_current_limit_ma > 780) + target_current_limit_ma = 780; + + ddi_power_Set4p2BoLevel(4150); + + /* possibly not necessary but recommended for unloaded + * 4p2 rail + */ + __raw_writel(BM_POWER_CHARGE_ENABLE_LOAD, + HW_POWER_CHARGE_SET_ADDR); + + while (charge_4p2_ilimit < target_current_limit_ma) { + + if (__raw_readl(HW_POWER_CTRL_ADDR) & + (BM_POWER_CTRL_VBUSVALID_IRQ | + BM_POWER_CTRL_VDD5V_DROOP_IRQ)) + break; + + + charge_4p2_ilimit += 100; + if (charge_4p2_ilimit > target_current_limit_ma) + charge_4p2_ilimit = target_current_limit_ma; + + ddi_power_set_4p2_ilimit(charge_4p2_ilimit); + + /* dcdc4p2 enable_dcdc must be enabled for + * 4p2 bo indication to function. If not enabled, + * skip using bo level detection + */ + if (!(b4p2_dcdc_enabled)) + msleep(1); + else if (__raw_readl(HW_POWER_STS_ADDR) & + BM_POWER_STS_DCDC_4P2_BO) + msleep(1); + else { + charge_4p2_ilimit = target_current_limit_ma; + ddi_power_set_4p2_ilimit(charge_4p2_ilimit); + } + } + + ddi_power_Set4p2BoLevel(3600); + + __raw_writel(BM_POWER_CTRL_DCDC4P2_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + /* rail should now be up and loaded. Extra + * internal load is not necessary. + */ + __raw_writel(BM_POWER_CHARGE_ENABLE_LOAD, + HW_POWER_CHARGE_CLR_ADDR); + + return charge_4p2_ilimit; + +} + + +void ddi_power_Set4p2BoLevel(uint16_t bo_voltage_mv) +{ + uint16_t bo_reg_value; + uint32_t temp; + + if (bo_voltage_mv < 3600) + bo_voltage_mv = 3600; + else if (bo_voltage_mv > 4375) + bo_voltage_mv = 4375; + + bo_reg_value = (bo_voltage_mv - 3600) / 25; + + temp = __raw_readl(HW_POWER_DCDC4P2_ADDR); + temp &= (~BM_POWER_DCDC4P2_BO); + temp |= (bo_reg_value << BP_POWER_DCDC4P2_BO); + __raw_writel(temp, HW_POWER_DCDC4P2_ADDR); +} + + + +void ddi_power_init_handoff(void) +{ + int val; + /* The following settings give optimal power supply capability */ + + // enable 5v presence detection + ddi_power_Enable5vDetection(); + + if (ddi_power_Get5vPresentFlag()) + /* It's 5V mode, enable 5V-to-battery handoff */ + ddi_power_enable_5v_to_battery_handoff(); + else + /* It's battery mode, enable battery-to-5V handoff */ + ddi_power_enable_battery_to_5v_handoff(); + + // Finally enable the battery adjust + val = __raw_readl(REGS_POWER_BASE + HW_POWER_BATTMONITOR); + val |= BM_POWER_BATTMONITOR_EN_BATADJ; + __raw_writel(val, REGS_POWER_BASE + HW_POWER_BATTMONITOR); +} + + +void ddi_power_EnableBatteryInterrupt(bool enable) +{ + + __raw_writel(BM_POWER_CTRL_BATT_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + __raw_writel(BM_POWER_CTRL_ENIRQBATT_BO, + HW_POWER_CTRL_SET_ADDR); + +} + + +int ddi_power_init_battery(void) +{ + + int ret = 0; + + if (!(__raw_readl(HW_POWER_5VCTRL_ADDR) && + BM_POWER_5VCTRL_ENABLE_DCDC)) { + printk(KERN_ERR "WARNING: Power Supply not\ + initialized correctly by \ + pre-kernel bootlets. HW_POWER_5VCTRL \ + ENABLE_DCDC should already be set. Kernel \ + power driver behavior may not be reliable \n"); + ret = 1; + } + + /* the following code to enable automatic battery measurement + * should have already been enabled in the boot prep files. Not + * sure if this is necessary or possibly susceptible to + * mis-coordination + */ + + + ret = !hw_lradc_present(BATTERY_VOLTAGE_CH); + + if (ret) { + printk(KERN_ERR "%s: hw_lradc_present failed\n", __func__); + return -ENODEV; + } else { + uint16_t wait_time = 0; + + hw_lradc_configure_channel(BATTERY_VOLTAGE_CH, 0 /* div2 */ , + 0 /* acc */ , + 0 /* num_samples */); + + /* Setup the trigger loop forever */ + hw_lradc_set_delay_trigger(LRADC_DELAY_TRIGGER_BATTERY, + 1 << BATTERY_VOLTAGE_CH, + 1 << LRADC_DELAY_TRIGGER_BATTERY, + 0, 200); + + /* Clear the accumulator & NUM_SAMPLES */ + stmp3xxx_clearl(0xFFFFFFFF, + REGS_LRADC_BASE + HW_LRADC_CHn(BATTERY_VOLTAGE_CH)); + + /* clear previous "measurement performed" status */ + __raw_writel(1 << BATTERY_VOLTAGE_CH, + HW_LRADC_CTRL1_CLR_ADDR); + + /* set to LiIon scale factor */ + __raw_writel(BM_LRADC_CONVERSION_SCALE_FACTOR, + HW_LRADC_CONVERSION_SET_ADDR); + + /* kick off the trigger */ + hw_lradc_set_delay_trigger_kick( + LRADC_DELAY_TRIGGER_BATTERY, 1); + + + /* wait for 1st converstion to be complete before + * enabling automatic copy to power supply + * peripheral + */ + while (!(__raw_readl(HW_LRADC_CTRL1_ADDR) & + 1 << BATTERY_VOLTAGE_CH) && + (wait_time < 10)) { + wait_time++; + udelay(1); + } + + __raw_writel(BM_LRADC_CONVERSION_AUTOMATIC, + HW_LRADC_CONVERSION_SET_ADDR); + } + +#ifndef VDD4P2_ENABLED + /* prepare handoff */ + ddi_power_init_handoff(); +#endif + return ret; +} + +/* + * Use the the lradc1 channel + * get the die temperature from on-chip sensor. + */ +uint16_t MeasureInternalDieTemperature(void) +{ + uint32_t ch8Value, ch9Value; + + /* power up internal tep sensor block */ + __raw_writel(BM_LRADC_CTRL2_TEMPSENSE_PWD, + REGS_LRADC_BASE + HW_LRADC_CTRL2_CLR); + + /* mux to the lradc 8th temp channel */ + __raw_writel(BF(0xF, LRADC_CTRL4_LRADC1SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4_CLR); + __raw_writel(BF(8, LRADC_CTRL4_LRADC1SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4_SET); + + /* Clear the interrupt flag */ + __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BF(1 << LRADC_CH1, LRADC_CTRL0_SCHEDULE), + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + + /* Wait for conversion complete*/ + while (!(__raw_readl(REGS_LRADC_BASE + HW_LRADC_CTRL1) + & BM_LRADC_CTRL1_LRADC1_IRQ)) + cpu_relax(); + + /* Clear the interrupt flag again */ + __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + + // read temperature value and clr lradc + ch8Value = __raw_readl(REGS_LRADC_BASE + + HW_LRADC_CHn(LRADC_CH1)) & BM_LRADC_CHn_VALUE; + + + __raw_writel(BM_LRADC_CHn_VALUE, + REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH1)); + + /* mux to the lradc 9th temp channel */ + __raw_writel(BF(0xF, LRADC_CTRL4_LRADC1SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4_CLR); + __raw_writel(BF(9, LRADC_CTRL4_LRADC1SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4_SET); + + /* Clear the interrupt flag */ + __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + __raw_writel(BF(1 << LRADC_CH1, LRADC_CTRL0_SCHEDULE), + REGS_LRADC_BASE + HW_LRADC_CTRL0_SET); + // Wait for conversion complete + while (!(__raw_readl(REGS_LRADC_BASE + HW_LRADC_CTRL1) + & BM_LRADC_CTRL1_LRADC1_IRQ)) + cpu_relax(); + + /* Clear the interrupt flag */ + __raw_writel(BM_LRADC_CTRL1_LRADC1_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR); + // read temperature value + ch9Value = __raw_readl( + REGS_LRADC_BASE + HW_LRADC_CHn(LRADC_CH1)) + & BM_LRADC_CHn_VALUE; + + + __raw_writel(BM_LRADC_CHn_VALUE, + REGS_LRADC_BASE + HW_LRADC_CHn_CLR(LRADC_CH1)); + + /* power down temp sensor block */ + __raw_writel(BM_LRADC_CTRL2_TEMPSENSE_PWD, + REGS_LRADC_BASE + HW_LRADC_CTRL2_SET); + + + return (uint16_t)((ch9Value-ch8Value)*GAIN_CORRECTION/4000); +} + + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_GetBatteryMode +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +ddi_power_BatteryMode_t ddi_power_GetBatteryMode(void) +{ + return DDI_POWER_BATT_MODE_LIION; +} + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_GetBatteryChargerEnabled +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +bool ddi_power_GetBatteryChargerEnabled(void) +{ +#if 0 + return (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_BATT_CHRG_PRESENT) ? 1 : 0; +#endif + return 1; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report if the charger hardware power is on. +//! +//! \fntype Function +//! +//! This function reports if the charger hardware power is on. +//! +//! \retval Zero if the charger hardware is not powered. Non-zero otherwise. +//! +//! Note that the bit we're looking at is named PWD_BATTCHRG. The "PWD" +//! stands for "power down". Thus, when the bit is set, the battery charger +//! hardware is POWERED DOWN. +//////////////////////////////////////////////////////////////////////////////// +bool ddi_power_GetChargerPowered(void) +{ + return (__raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE) & BM_POWER_CHARGE_PWD_BATTCHRG) ? 0 : 1; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Turn the charging hardware on or off. +//! +//! \fntype Function +//! +//! This function turns the charging hardware on or off. +//! +//! \param[in] on Indicates whether the charging hardware should be on or off. +//! +//! Note that the bit we're looking at is named PWD_BATTCHRG. The "PWD" +//! stands for "power down". Thus, when the bit is set, the battery charger +//! hardware is POWERED DOWN. +//////////////////////////////////////////////////////////////////////////////// +void ddi_power_SetChargerPowered(bool bPowerOn) +{ + // Hit the battery charge power switch. + if (bPowerOn) { + __raw_writel(BM_POWER_CHARGE_PWD_BATTCHRG, + REGS_POWER_BASE + HW_POWER_CHARGE_CLR); + __raw_writel(BM_POWER_5VCTRL_PWD_CHARGE_4P2, + REGS_POWER_BASE + HW_POWER_5VCTRL_CLR); + } else { + __raw_writel(BM_POWER_CHARGE_PWD_BATTCHRG, + REGS_POWER_BASE + HW_POWER_CHARGE_SET); +#ifndef VDD4P2_ENABLED + __raw_writel(BM_POWER_5VCTRL_PWD_CHARGE_4P2, + REGS_POWER_BASE + HW_POWER_5VCTRL_SET); +#endif + } + +//#ifdef CONFIG_POWER_SUPPLY_DEBUG +#if 0 + printk("Battery charger: charger %s\n", bPowerOn ? "ON!" : "OFF"); + dump_regs(); +#endif +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reports if the charging current has fallen below the threshold. +//! +//! \fntype Function +//! +//! This function reports if the charging current that the battery is accepting +//! has fallen below the threshold. +//! +//! Note that this bit is regarded by the hardware guys as very slightly +//! unreliable. They recommend that you don't believe a value of zero until +//! you've sampled it twice. +//! +//! \retval Zero if the battery is accepting less current than indicated by the +//! charging threshold. Non-zero otherwise. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_power_GetChargeStatus(void) +{ + return (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_CHRGSTS) ? 1 : 0; +} + +//////////////////////////////////////////////////////////////////////////////// +// Battery Voltage +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the voltage across the battery. +//! +//! \fntype Function +//! +//! This function reports the voltage across the battery. Should return a +//! value in range ~3000 - 4200 mV. +//! +//! \retval The voltage across the battery, in mV. +//! +//////////////////////////////////////////////////////////////////////////////// + +//! \brief Constant value for 8mV steps used in battery translation +#define BATT_VOLTAGE_8_MV 8 + +uint16_t ddi_power_GetBattery(void) +{ + uint32_t u16BattVolt; + + // Get the raw result of battery measurement + u16BattVolt = __raw_readl(REGS_POWER_BASE + HW_POWER_BATTMONITOR); + u16BattVolt &= BM_POWER_BATTMONITOR_BATT_VAL; + u16BattVolt >>= BP_POWER_BATTMONITOR_BATT_VAL; + + // Adjust for 8-mV LSB resolution and return + u16BattVolt *= BATT_VOLTAGE_8_MV; + +//#ifdef CONFIG_POWER_SUPPLY_DEBUG +#if 0 + printk("Battery charger: %u mV\n", u16BattVolt); +#endif + + return u16BattVolt; +} + +#if 0 +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the voltage across the battery. +//! +//! \fntype Function +//! +//! This function reports the voltage across the battery. +//! +//! \retval The voltage across the battery, in mV. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_GetBatteryBrownout(void) +{ + uint32_t u16BatteryBrownoutLevel; + + // Get battery brownout level + u16BatteryBrownoutLevel = __raw_readl(REGS_POWER_BASE + HW_POWER_BATTMONITOR); + u16BatteryBrownoutLevel &= BM_POWER_BATTMONITOR_BRWNOUT_LVL; + u16BatteryBrownoutLevel >>= BP_POWER_BATTMONITOR_BRWNOUT_LVL; + + // Calculate battery brownout level + switch (ddi_power_GetBatteryMode()) { + case DDI_POWER_BATT_MODE_LIION: + u16BatteryBrownoutLevel *= BATT_BRWNOUT_LIION_LEVEL_STEP_MV; + u16BatteryBrownoutLevel += BATT_BRWNOUT_LIION_BASE_MV; + break; + case DDI_POWER_BATT_MODE_ALKALINE_NIMH: + u16BatteryBrownoutLevel *= BATT_BRWNOUT_ALKAL_LEVEL_STEP_MV; + u16BatteryBrownoutLevel += BATT_BRWNOUT_ALKAL_BASE_MV; + break; + default: + u16BatteryBrownoutLevel = 0; + break; + } + return u16BatteryBrownoutLevel; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set battery brownout level +//! +//! \fntype Reentrant Function +//! +//! This function sets the battery brownout level in millivolt. It transforms the +//! input brownout value from millivolts to the hardware register bit field value +//! taking the ceiling value in the calculation. +//! +//! \param[in] u16BattBrownout_mV Battery battery brownout level in mV +//! +//! \return SUCCESS +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_power_SetBatteryBrownout(uint16_t u16BattBrownout_mV) +{ + int16_t i16BrownoutLevel; + int ret = 0; + + // Calculate battery brownout level + switch (ddi_power_GetBatteryMode()) { + case DDI_POWER_BATT_MODE_LIION: + i16BrownoutLevel = u16BattBrownout_mV - + BATT_BRWNOUT_LIION_EQN_CONST; + i16BrownoutLevel /= BATT_BRWNOUT_LIION_LEVEL_STEP_MV; + break; + case DDI_POWER_BATT_MODE_ALKALINE_NIMH: + i16BrownoutLevel = u16BattBrownout_mV - + BATT_BRWNOUT_ALKAL_EQN_CONST; + i16BrownoutLevel /= BATT_BRWNOUT_ALKAL_LEVEL_STEP_MV; + break; + default: + return -EINVAL; + } + + // Do a check to make sure nothing went wrong. + if (i16BrownoutLevel <= 0x0f) { + //Write the battery brownout level + __raw_writel( + BF(i16BrownoutLevel, POWER_BATTMONITOR_BRWNOUT_LVL), + REGS_POWER_BASE + HW_POWER_BATTMONITOR_SET); + } else + ret = -EINVAL; + + return ret; +} +#endif + +//////////////////////////////////////////////////////////////////////////////// +// Currents +//////////////////////////////////////////////////////////////////////////////// + + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_SetMaxBatteryChargeCurrent +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_SetMaxBatteryChargeCurrent(uint16_t u16MaxCur) +{ + uint32_t u16OldSetting; + uint32_t u16NewSetting; + uint32_t u16ToggleMask; + + // Get the old setting. + u16OldSetting = (__raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE) & BM_POWER_CHARGE_BATTCHRG_I) >> + BP_POWER_CHARGE_BATTCHRG_I; + + // Convert the new threshold into a setting. + u16NewSetting = ddi_power_convert_current_to_setting(u16MaxCur); + + /* Compute the toggle mask. */ + u16ToggleMask = u16OldSetting ^ u16NewSetting; + + /* Write to the toggle register.*/ + __raw_writel(u16ToggleMask << BP_POWER_CHARGE_BATTCHRG_I, + REGS_POWER_BASE + HW_POWER_CHARGE_TOG); + + // Tell the caller what current we're set at now. + return ddi_power_convert_setting_to_current(u16NewSetting); +} + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_GetMaxBatteryChargeCurrent +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_GetMaxBatteryChargeCurrent(void) +{ + uint32_t u8Bits; + + // Get the raw data from register + u8Bits = (__raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE) & BM_POWER_CHARGE_BATTCHRG_I) >> + BP_POWER_CHARGE_BATTCHRG_I; + + // Translate raw data to current (in mA) and return it + return ddi_power_convert_setting_to_current(u8Bits); +} + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_GetMaxChargeCurrent +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_SetBatteryChargeCurrentThreshold(uint16_t u16Thresh) +{ + uint32_t u16OldSetting; + uint32_t u16NewSetting; + uint32_t u16ToggleMask; + + //------------------------------------------------------------------- + // See ddi_power_SetMaxBatteryChargeCurrent for an explanation of + // why we're using the toggle register here. + // + // Since this function doesn't have any major hardware effect, + // we could use the usual macros for writing to this bit field. But, + // for the sake of parallel construction and any potentially odd + // effects on the status bit, we use the toggle register in the same + // way as ddi_bc_hwSetMaxCurrent. + //------------------------------------------------------------------- + + //------------------------------------------------------------------- + // The threshold hardware can't express as large a range as the max + // current setting, but we can use the same functions as long as we + // add an extra check here. + // + // Thresholds larger than 180mA can't be expressed. + //------------------------------------------------------------------- + + if (u16Thresh > 180) + u16Thresh = 180; + + //////////////////////////////////////// + // Create the mask + //////////////////////////////////////// + + // Get the old setting. + u16OldSetting = (__raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE) & BM_POWER_CHARGE_STOP_ILIMIT) >> + BP_POWER_CHARGE_STOP_ILIMIT; + + // Convert the new threshold into a setting. + u16NewSetting = ddi_power_convert_current_to_setting(u16Thresh); + + // Compute the toggle mask. + u16ToggleMask = u16OldSetting ^ u16NewSetting; + + ///////////////////////////////////////// + // Write to the register + ///////////////////////////////////////// + + // Write to the toggle register. + __raw_writel(BF_POWER_CHARGE_STOP_ILIMIT(u16ToggleMask), + REGS_POWER_BASE + HW_POWER_CHARGE_TOG); + + // Tell the caller what current we're set at now. + return ddi_power_convert_setting_to_current(u16NewSetting); +} + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_GetBatteryChargeCurrentThreshold +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_GetBatteryChargeCurrentThreshold(void) +{ + uint32_t u16Threshold; + + u16Threshold = (__raw_readl(REGS_POWER_BASE + HW_POWER_CHARGE) & BM_POWER_CHARGE_STOP_ILIMIT) >> + BP_POWER_CHARGE_STOP_ILIMIT; + + return ddi_power_convert_setting_to_current(u16Threshold); +} + +//////////////////////////////////////////////////////////////////////////////// +// Conversion +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Compute the actual current expressible in the hardware. +//! +//! \fntype Function +//! +//! Given a desired current, this function computes the actual current +//! expressible in the hardware. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 780mA (see the data sheet for details). If the given +//! current cannot be expressed exactly, then the largest expressible smaller +//! value will be used. +//! +//! \param[in] u16Current The current of interest. +//! +//! \retval The corresponding current in mA. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_power_ExpressibleCurrent(uint16_t u16Current) +{ + return ddi_power_convert_setting_to_current( + ddi_power_convert_current_to_setting(u16Current)); +} + +//////////////////////////////////////////////////////////////////////////////// +//! Name: ddi_power_Get5VPresent +//! +//! \brief +//////////////////////////////////////////////////////////////////////////////// +bool ddi_power_Get5vPresentFlag(void) +{ + switch (DetectionMethod) { + case DDI_POWER_5V_VBUSVALID: + // Check VBUSVALID for 5V present + return ((__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_VBUSVALID) != 0); + case DDI_POWER_5V_VDD5V_GT_VDDIO: + // Check VDD5V_GT_VDDIO for 5V present + return ((__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_VDD5V_GT_VDDIO) != 0); + default: + break; + } + + return 0; +} + + + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report on the die temperature. +//! +//! \fntype Function +//! +//! This function reports on the die temperature. +//! +//! \param[out] pLow The low end of the temperature range. +//! \param[out] pHigh The high end of the temperature range. +//! +//////////////////////////////////////////////////////////////////////////////// +// Temperature constant +#define TEMP_READING_ERROR_MARGIN 5 +#define KELVIN_TO_CELSIUS_CONST 273 + +void ddi_power_GetDieTemp(int16_t * pLow, int16_t * pHigh) +{ + int16_t i16High, i16Low; + uint16_t u16Reading; + + // Get the reading in Kelvins + u16Reading = MeasureInternalDieTemperature(); + + // Adjust for error margin + i16High = u16Reading + TEMP_READING_ERROR_MARGIN; + i16Low = u16Reading - TEMP_READING_ERROR_MARGIN; + + // Convert to Celsius + i16High -= KELVIN_TO_CELSIUS_CONST; + i16Low -= KELVIN_TO_CELSIUS_CONST; + +//#ifdef CONFIG_POWER_SUPPLY_DEBUG +#if 0 + printk("Battery charger: Die temp %d to %d C\n", i16Low, i16High); +#endif + // Return the results + *pHigh = i16High; + *pLow = i16Low; +} + +/////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Checks to see if the DCDC has been manually enabled +//! +//! \fntype Function +//! +//! \retval true if DCDC is ON, false if DCDC is OFF. +//! +//////////////////////////////////////////////////////////////////////////////// +bool ddi_power_IsDcdcOn(void) +{ + return (__raw_readl(REGS_POWER_BASE + HW_POWER_5VCTRL) & BM_POWER_5VCTRL_ENABLE_DCDC) ? 1 : 0; +} + + +//////////////////////////////////////////////////////////////////////////////// +//! See hw_power.h for details. +//////////////////////////////////////////////////////////////////////////////// +void ddi_power_SetPowerClkGate(bool bGate) +{ + // Gate/Ungate the clock to the power block + if (bGate) { + __raw_writel(BM_POWER_CTRL_CLKGATE, + REGS_POWER_BASE + HW_POWER_CTRL_SET); + } else { + __raw_writel(BM_POWER_CTRL_CLKGATE, + REGS_POWER_BASE + HW_POWER_CTRL_CLR); + } +} + +//////////////////////////////////////////////////////////////////////////////// +//! See hw_power.h for details. +//////////////////////////////////////////////////////////////////////////////// +bool ddi_power_GetPowerClkGate(void) +{ + return (__raw_readl(REGS_POWER_BASE + HW_POWER_CTRL) & BM_POWER_CTRL_CLKGATE) ? 1 : 0; +} + + +enum ddi_power_5v_status ddi_power_GetPmu5vStatus(void) +{ + + if (DetectionMethod == DDI_POWER_5V_VDD5V_GT_VDDIO) { + + if (__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO) { + if ((__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ) || + ddi_power_Get5vPresentFlag()) + return new_5v_connection; + else + return existing_5v_disconnection; + } else { + if ((__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ) || + !ddi_power_Get5vPresentFlag() || + ddi_power_Get5vDroopFlag()) + return new_5v_disconnection; + else + return existing_5v_connection; + } + } else { + + if (__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_POLARITY_VBUSVALID) { + if ((__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_VBUSVALID_IRQ) || + ddi_power_Get5vPresentFlag()) + return new_5v_connection; + else + return existing_5v_disconnection; + } else { + if ((__raw_readl(HW_POWER_CTRL_ADDR) & + BM_POWER_CTRL_VBUSVALID_IRQ) || + !ddi_power_Get5vPresentFlag() || + ddi_power_Get5vDroopFlag()) + return new_5v_disconnection; + else + return existing_5v_connection; + } + + } +} + +void ddi_power_disable_5v_connection_irq(void) +{ + + __raw_writel((BM_POWER_CTRL_ENIRQ_VBUS_VALID | + BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO), + HW_POWER_CTRL_CLR_ADDR); +} + +void ddi_power_enable_5v_disconnect_detection(void) +{ + __raw_writel(BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO | + BM_POWER_CTRL_POLARITY_VBUSVALID, + HW_POWER_CTRL_CLR_ADDR); + + __raw_writel(BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ | + BM_POWER_CTRL_VBUSVALID_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + if (DetectionMethod == DDI_POWER_5V_VDD5V_GT_VDDIO) { + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO, + HW_POWER_CTRL_SET_ADDR); + } else { + __raw_writel(BM_POWER_CTRL_ENIRQ_VBUS_VALID, + HW_POWER_CTRL_SET_ADDR); + } +} + +void ddi_power_enable_5v_connect_detection(void) +{ + __raw_writel(BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO | + BM_POWER_CTRL_POLARITY_VBUSVALID, + HW_POWER_CTRL_SET_ADDR); + + __raw_writel(BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ | + BM_POWER_CTRL_VBUSVALID_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + if (DetectionMethod == DDI_POWER_5V_VDD5V_GT_VDDIO) { + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO, + HW_POWER_CTRL_SET_ADDR); + } else { + __raw_writel(BM_POWER_CTRL_ENIRQ_VBUS_VALID, + HW_POWER_CTRL_SET_ADDR); + } +} + +void ddi_power_EnableBatteryBoInterrupt(bool bEnable) +{ + if (bEnable) { + + __raw_writel(BM_POWER_CTRL_BATT_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); + __raw_writel(BM_POWER_CTRL_ENIRQBATT_BO, + HW_POWER_CTRL_SET_ADDR); + /* todo: make sure the battery brownout comparator + * is enabled in HW_POWER_BATTMONITOR + */ + } else { + __raw_writel(BM_POWER_CTRL_ENIRQBATT_BO, + HW_POWER_CTRL_CLR_ADDR); + } +} + +void ddi_power_EnableDcdc4p2BoInterrupt(bool bEnable) +{ + if (bEnable) { + + __raw_writel(BM_POWER_CTRL_DCDC4P2_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); + __raw_writel(BM_POWER_CTRL_ENIRQ_DCDC4P2_BO, + HW_POWER_CTRL_SET_ADDR); + } else { + __raw_writel(BM_POWER_CTRL_ENIRQ_DCDC4P2_BO, + HW_POWER_CTRL_CLR_ADDR); + } +} + +void ddi_power_EnableVdd5vDroopInterrupt(bool bEnable) +{ + if (bEnable) { + + __raw_writel(BM_POWER_CTRL_VDD5V_DROOP_IRQ, + HW_POWER_CTRL_CLR_ADDR); + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_DROOP, + HW_POWER_CTRL_SET_ADDR); + } else { + __raw_writel(BM_POWER_CTRL_ENIRQ_VDD5V_DROOP, + HW_POWER_CTRL_CLR_ADDR); + } +} + + +void ddi_power_Enable5vDisconnectShutdown(bool bEnable) +{ + if (bEnable) { + __raw_writel(BM_POWER_5VCTRL_PWDN_5VBRNOUT, + HW_POWER_5VCTRL_SET_ADDR); + } else { + __raw_writel(BM_POWER_5VCTRL_PWDN_5VBRNOUT, + HW_POWER_5VCTRL_CLR_ADDR); + } +} + + +void ddi_power_enable_5v_to_battery_xfer(bool bEnable) +{ + if (bEnable) { + /* order matters */ + + /* we can enable this in in vbus droop or 4p2 fiq handler + * ddi_power_EnableBatteryBoInterrupt(true); + */ + ddi_power_Enable5vDisconnectShutdown(false); + } else { + /* order matters */ + ddi_power_Enable5vDisconnectShutdown(true); + ddi_power_EnableBatteryBoInterrupt(false); + } +} + + +void ddi_power_init_4p2_protection(void) +{ + /* set vbus droop detection level to 4.3V */ + __raw_writel(BM_POWER_5VCTRL_VBUSDROOP_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + /* VBUSDROOP THRESHOLD to 4.3V */ + __raw_writel(BM_POWER_5VCTRL_VBUSDROOP_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + + ddi_power_EnableVbusDroopIrq(); + + /* VBUSVALID THRESH = 2.9V */ + __raw_writel(BM_POWER_5VCTRL_VBUSVALID_TRSH, + HW_POWER_5VCTRL_CLR_ADDR); + +} + +/* determine if all the bits are in a 'DCDC 4P2 Enabled' state. */ +bool ddi_power_check_4p2_bits(void) +{ + + + uint32_t temp; + + temp = __raw_readl(HW_POWER_5VCTRL_ADDR) & + BM_POWER_5VCTRL_PWD_CHARGE_4P2; + + /* if PWD_CHARGE_4P2 = 1, 4p2 is disabled */ + if (temp) + return false; + + temp = __raw_readl(HW_POWER_DCDC4P2_ADDR) & + BM_POWER_DCDC4P2_ENABLE_DCDC; + + if (!temp) + return false; + + temp = __raw_readl(HW_POWER_DCDC4P2_ADDR) & + BM_POWER_DCDC4P2_ENABLE_4P2; + + if (temp) + return true; + else + return false; + +} + +uint16_t ddi_power_set_4p2_ilimit(uint16_t ilimit) +{ + uint32_t temp_reg; + + if (ilimit > 780) + ilimit = 780; + temp_reg = __raw_readl(HW_POWER_5VCTRL_ADDR); + temp_reg &= (~BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT); + temp_reg |= BF_POWER_5VCTRL_CHARGE_4P2_ILIMIT( + ddi_power_convert_current_to_setting( + ilimit)); + __raw_writel(temp_reg, HW_POWER_5VCTRL_ADDR); + + return ilimit; +} + +void ddi_power_shutdown(void) +{ + __raw_writel(0x3e770001, HW_POWER_RESET_ADDR); +} + +void ddi_power_handle_dcdc4p2_bo(void) +{ + ddi_power_EnableBatteryBoInterrupt(true); + ddi_power_EnableDcdc4p2BoInterrupt(false); +} + +void ddi_power_enable_vddio_interrupt(bool enable) +{ + if (enable) { + __raw_writel(BM_POWER_CTRL_VDDIO_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); +#ifndef DISABLE_VDDIO_BO_PROTECTION + __raw_writel(BM_POWER_CTRL_ENIRQ_VDDIO_BO, + HW_POWER_CTRL_SET_ADDR); +#endif + } else { + __raw_writel(BM_POWER_CTRL_ENIRQ_VDDIO_BO, + HW_POWER_CTRL_CLR_ADDR); + } +} + +void ddi_power_handle_vddio_brnout(void) +{ + if (ddi_power_GetPmu5vStatus() == new_5v_connection) { + ddi_power_enable_vddio_interrupt(false); + } else { +#ifdef DEBUG_IRQS + ddi_power_enable_vddio_interrupt(false); + printk(KERN_ALERT "VDDIO BO TRIED TO SHUTDOWN!!!\n"); + return; +#else + ddi_power_shutdown(); +#endif + } +} + +void ddi_power_handle_vdd5v_droop(void) +{ + uint32_t temp; + + /* handle errata */ + temp = __raw_readl(HW_POWER_DCDC4P2_ADDR); + temp |= (BF(31, POWER_DCDC4P2_CMPTRIP) | BM_POWER_DCDC4P2_TRG); + __raw_writel(temp, HW_POWER_DCDC4P2_ADDR); + + + /* if battery is below brownout level, shutdown asap */ + if (__raw_readl(HW_POWER_STS_ADDR) & BM_POWER_STS_BATT_BO) + ddi_power_shutdown(); + + /* due to 5v connect vddio bo chip bug, we need to + * disable vddio interrupts until we reset the 5v + * detection for 5v connect detect. We want to allow + * some debounce time before enabling connect detection. + */ + ddi_power_enable_vddio_interrupt(false); + + ddi_power_EnableBatteryBoInterrupt(true); + ddi_power_EnableDcdc4p2BoInterrupt(false); + ddi_power_EnableVdd5vDroopInterrupt(false); + +} + +void ddi_power_InitOutputBrownouts(void) +{ + uint32_t temp; + + __raw_writel(BM_POWER_CTRL_VDDD_BO_IRQ | + BM_POWER_CTRL_VDDA_BO_IRQ | + BM_POWER_CTRL_VDDIO_BO_IRQ, + HW_POWER_CTRL_CLR_ADDR); + + __raw_writel(BM_POWER_CTRL_ENIRQ_VDDD_BO | + BM_POWER_CTRL_ENIRQ_VDDA_BO | + BM_POWER_CTRL_ENIRQ_VDDIO_BO, + HW_POWER_CTRL_SET_ADDR); + + temp = __raw_readl(HW_POWER_VDDDCTRL_ADDR); + temp &= ~BM_POWER_VDDDCTRL_PWDN_BRNOUT; + __raw_writel(temp, HW_POWER_VDDDCTRL_ADDR); + + temp = __raw_readl(HW_POWER_VDDACTRL_ADDR); + temp &= ~BM_POWER_VDDACTRL_PWDN_BRNOUT; + __raw_writel(temp, HW_POWER_VDDACTRL_ADDR); + + temp = __raw_readl(HW_POWER_VDDIOCTRL_ADDR); + temp &= ~BM_POWER_VDDIOCTRL_PWDN_BRNOUT; + __raw_writel(temp, HW_POWER_VDDIOCTRL_ADDR); +} + +/* used for debugging purposes only */ +void ddi_power_disable_power_interrupts(void) +{ + __raw_writel(BM_POWER_CTRL_ENIRQ_DCDC4P2_BO | + BM_POWER_CTRL_ENIRQ_VDD5V_DROOP | + BM_POWER_CTRL_ENIRQ_PSWITCH | + BM_POWER_CTRL_ENIRQ_DC_OK | + BM_POWER_CTRL_ENIRQBATT_BO | + BM_POWER_CTRL_ENIRQ_VDDIO_BO | + BM_POWER_CTRL_ENIRQ_VDDA_BO | + BM_POWER_CTRL_ENIRQ_VDDD_BO | + BM_POWER_CTRL_ENIRQ_VBUS_VALID | + BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO, + HW_POWER_CTRL_CLR_ADDR); + +} + +bool ddi_power_Get5vDroopFlag(void) +{ + if (__raw_readl(HW_POWER_STS_ADDR) & + BM_POWER_STS_VDD5V_DROOP) + return true; + else + return false; +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_internal.h +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_internal.h @@ -0,0 +1,52 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_internal.h +//! \brief Internal header file for the Battery Charger device driver. +//! \date 06/2005 +//! +//! This file contains internal declarations for the Battery Charger device +//! driver. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_INTERNAL_H +#define _DDI_BC_INTERNAL_H + +//////////////////////////////////////////////////////////////////////////////// +// Includes +//////////////////////////////////////////////////////////////////////////////// + +#include +#include "ddi_bc_hw.h" +#include "ddi_bc_ramp.h" +#include "ddi_bc_sm.h" +#include "ddi_power_battery.h" + +//////////////////////////////////////////////////////////////////////////////// +// Externs +//////////////////////////////////////////////////////////////////////////////// + +extern bool g_ddi_bc_Configured; +extern ddi_bc_Cfg_t g_ddi_bc_Configuration; + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_ramp.h +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_ramp.h @@ -0,0 +1,50 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_ramp.h +//! \brief Internal header file for Battery Charger current ramp controller. +//! \date 06/2005 +//! +//! This file contains internal declarations for Battery current ramp +//! controller. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_RAMP_H +#define _DDI_BC_RAMP_H + +//////////////////////////////////////////////////////////////////////////////// +// Prototypes +//////////////////////////////////////////////////////////////////////////////// + +extern void ddi_bc_RampReset(void); +extern uint16_t ddi_bc_RampSetTarget(uint16_t); +extern uint16_t ddi_bc_RampGetTarget(void); +extern uint16_t ddi_bc_RampSetLimit(uint16_t); +extern uint16_t ddi_bc_RampGetLimit(void); +extern void ddi_bc_RampUpdateAlarms(void); +extern int ddi_bc_RampGetDieTempAlarm(void); +extern int ddi_bc_RampGetBatteryTempAlarm(void); +extern int ddi_bc_RampGetAmbientTempAlarm(void); +extern ddi_bc_Status_t ddi_bc_RampStep(uint32_t); + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_api.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_api.c @@ -0,0 +1,566 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_api.c +//! \brief Contains the Battery Charger API. +//! \date 06/2005 +//! +//! This file contains Battery Charger API. +//! +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Includes +//////////////////////////////////////////////////////////////////////////////// + +#include "ddi_bc_internal.h" + +//////////////////////////////////////////////////////////////////////////////// +// Variables +//////////////////////////////////////////////////////////////////////////////// + +//! This structure holds the current Battery Charger configuration. + +ddi_bc_Cfg_t g_ddi_bc_Configuration; + +extern uint32_t g_ddi_bc_u32StateTimer; +extern ddi_bc_BrokenReason_t ddi_bc_gBrokenReason; +extern bool bRestartChargeCycle; + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the Battery Charger configuration. +//! +//! \fntype Function +//! +//! This function reports the Battery Charger configuration. +//! +//! Note that, if the Battery Charger has not yet been initialized, the data +//! returned by this function is unknown. +//! +//! \param[in,out] pCfg A pointer to a structure that will receive the data. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_QueryCfg(ddi_bc_Cfg_t * pCfg) +{ + + //-------------------------------------------------------------------------- + // Return the current configuration. + //-------------------------------------------------------------------------- + + *pCfg = g_ddi_bc_Configuration; + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Shut down the Battery Charger. +//! +//! \fntype Function +//! +//! This function immediately shuts down the Battery Charger hardware and +//! returns the state machine to the Uninitialized state. Use this function to +//! safely “mummify” the battery charger before retiring it from memory. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_ShutDown() +{ + + //-------------------------------------------------------------------------- + // Reset the current ramp. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Move to the Uninitialized state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_UNINITIALIZED; + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Advances the state machine. +//! +//! \fntype Function +//! +//! This function advances the state machine. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_BROKEN If the battery violated a time-out +//! and has been declared broken. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_StateMachine() +{ + + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // Execute the function for the current state. + //-------------------------------------------------------------------------- + + return (stateFunctionTable[g_ddi_bc_State] ()); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Get the Battery Charger's current state. +//! +//! \fntype Function +//! +//! This function returns the current state. +//! +//! \retval The current state. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_State_t ddi_bc_GetState() +{ + //-------------------------------------------------------------------------- + // Return the current state. + //-------------------------------------------------------------------------- + + return (g_ddi_bc_State); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Disable the Battery Charger. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_SetDisable() +{ + + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_BROKEN) { + return (DDI_BC_STATUS_BROKEN); + } + //-------------------------------------------------------------------------- + // Reset the current ramp. This will jam the current to zero and power off + // the charging hardware. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Move to the Disabled state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_DISABLED; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Enable the Battery Charger. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Disabled state, this function moves it to +//! the Waiting to Charge state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_DISABLED If the Battery Charger is not +//! disabled. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_SetEnable() +{ + + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // If we're not in the Disabled state, this is pointless. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State != DDI_BC_STATE_DISABLED) { + return (DDI_BC_STATUS_NOT_DISABLED); + } + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + //-------------------------------------------------------------------------- + // Move to the Waiting to Charge state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_WAITING_TO_CHARGE; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be broken. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Broken state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_SetBroken() +{ + + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // Reset the current ramp. This will jam the current to zero and power off + // the charging hardware. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Move to the Broken state. + //-------------------------------------------------------------------------- + + ddi_bc_gBrokenReason = DDI_BC_BROKEN_CHARGING_TIMEOUT; + + g_ddi_bc_State = DDI_BC_STATE_BROKEN; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be fixed. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Broken state, this function moves it to +//! the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_BROKEN If the Battery Charger is not broken. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_SetFixed() +{ + + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // If we're not in the Broken state, this is pointless. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State != DDI_BC_STATE_BROKEN) { + return (DDI_BC_STATUS_NOT_BROKEN); + } + //-------------------------------------------------------------------------- + // Reset the state timer. + //-------------------------------------------------------------------------- + + g_ddi_bc_u32StateTimer = 0; + + //-------------------------------------------------------------------------- + // Unitialize the Broken Reason + //-------------------------------------------------------------------------- + + ddi_bc_gBrokenReason = DDI_BC_BROKEN_UNINITIALIZED; + + //-------------------------------------------------------------------------- + // Move to the Disabled state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_DISABLED; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current limit. +//! +//! \fntype Function +//! +//! This function applies a limit to the current that the Battery Charger can +//! draw. +//! +//! \param[in] u16Limit The maximum current the Battery Charger can draw +//! (in mA). +//! +//! \retval The expressible version of the limit. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_SetCurrentLimit(uint16_t u16Limit) +{ + + //-------------------------------------------------------------------------- + // Set the limit and return what is actually expressible. + //-------------------------------------------------------------------------- + + return (ddi_bc_RampSetLimit(u16Limit)); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current limit. +//! +//! \fntype Function +//! +//! This function reports the limit to the current that the Battery Charger can +//! draw. +//! +//! \retval The current limit. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_GetCurrentLimit(void) +{ + + //-------------------------------------------------------------------------- + // Set the limit and return what is actually expressible. + //-------------------------------------------------------------------------- + + return (ddi_bc_RampGetLimit()); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the battery charger state machine period. +//! +//! \fntype Function +//! +//! This function sets a new state machine period. The Period and Slope should +//! be coordinated to achieve the minimal ramp step current which will minimize +//! transients on the system. +//! +//! \param[in] u32StateMachinePeriod (in milliseconds) +//! \param[in] u16CurrentRampSlope (in mA/s) +//! +//! \retval SUCCESS If all goes well +//! \retval ERROR_DDI_BCM_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_SetNewPeriodAndSlope(uint32_t u32StateMachinePeriod, + uint16_t u16CurrentRampSlope) +{ + //-------------------------------------------------------------------------- + // Check if we've been initialized yet. + //-------------------------------------------------------------------------- + bool bDisableRequired; + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + + if (g_ddi_bc_State == DDI_BC_STATE_DISABLED) + bDisableRequired = false; + else { + bDisableRequired = true; + ddi_bc_SetDisable(); + } + + // Looking at the code, changing the period while the battery charger is running + // doesn't seem to have a negative affect. One could wrap this in the mutex + // or implement further coordination if it did. + g_ddi_bc_Configuration.u32StateMachinePeriod = u32StateMachinePeriod; + g_ddi_bc_Configuration.u16CurrentRampSlope = u16CurrentRampSlope; + + if (bDisableRequired) + ddi_bc_SetEnable(); + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the state machine period. +//! +//! \fntype Function +//! +//! This function reports the battery charger period. +//! +//! \retval The battery charger period (in milliseconds). +//! +//////////////////////////////////////////////////////////////////////////////// +uint32_t ddi_bc_GetStateMachinePeriod() +{ + return (g_ddi_bc_Configuration.u32StateMachinePeriod); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current ramp slope. +//! +//! \fntype Function +//! +//! This function reports the current ramp slope. +//! +//! \retval The current ramp slope (in mA/s). +//! +//////////////////////////////////////////////////////////////////////////////// +uint32_t ddi_bc_GetCurrentRampSlope() +{ + return (g_ddi_bc_Configuration.u16CurrentRampSlope); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the time spent in the present state (milliseconds) +//! +//! \fntype Function +//! +//! This function reports the time spent in the present charging state. Note that +//! for the states that actually charge the battery, this time does not include the +//! time spent under alarm conditions such as die termperature alarm or battery +//! temperature alarm. +//! +//! \retval The time spent in the current state in milliseconds. +//! +//////////////////////////////////////////////////////////////////////////////// +uint32_t ddi_bc_GetStateTime(void) +{ + return g_ddi_bc_u32StateTimer; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the reason for being in the broken state +//! +//! \fntype Function +//! +//! +//! \retval ddi_bc_BrokenReason_t enumeration +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_BrokenReason_t ddi_bc_GetBrokenReason(void) +{ + return ddi_bc_gBrokenReason; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Restart the charge cycle +//! +//! \fntype Function +//! +//! +//! \retval SUCCESS +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_ForceChargingToStart(void) +{ + static int16_t restarts = 0; + + if (restarts < DDI_BC_MAX_RESTART_CYCLES) { + restarts++; + bRestartChargeCycle = true; + } + + return (DDI_BC_STATUS_SUCCESS); +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_ramp.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_ramp.c @@ -0,0 +1,724 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_ramp.c +//! \brief Contains the Battery Charger current ramp controller. +//! \date 06/2005 +//! +//! This file contains Battery Charger current ramp controller. +//! +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Includes and external references +//////////////////////////////////////////////////////////////////////////////// + +#include +#include "ddi_bc_internal.h" + +//////////////////////////////////////////////////////////////////////////////// +// Definitions +//////////////////////////////////////////////////////////////////////////////// + +//! This is the control structure for the current ramp. + +typedef struct _ddi_bc_RampControl { + + uint32_t u32AccumulatedTime; + + //!< The accumulated time since we last changed the actual + //!< current setting in the hardware. If the time between + //!< steps is quite short, we may have to wait for several steps + //!< before we can actually change the hardware setting. + + uint16_t u16Target; + + //!< The target current, regardless of expressibility. + + uint16_t u16Limit; + + //!< The current limit, regardless of expressibility. + + uint8_t dieTempAlarm:1; + + //!< Indicates if we are operating under a die temperature + //!< alarm. + + uint8_t batteryTempAlarm:1; + + //!< Indicates if we are operating under a battery temperature + //!< alarm. + + uint8_t ambientTempAlarm:1; + + //!< Indicates if we are operating under an ambient temperature + //!< alarm. + +} ddi_bc_RampControl_t; + +//////////////////////////////////////////////////////////////////////////////// +// Variables +//////////////////////////////////////////////////////////////////////////////// + +//! This structure contains control information for the current ramp. + +static ddi_bc_RampControl_t g_RampControl; + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reset the current ramp. +//! +//! \fntype Function +//! +//! This function resets the current ramp. +//! +//! Note that this function does NOT reset the temperature alarms or the current +//! limit. Those can only be changed explicitly. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_RampReset() +{ + + //-------------------------------------------------------------------------- + // Reset the control structure. + //-------------------------------------------------------------------------- + + g_RampControl.u32AccumulatedTime = 0; + g_RampControl.u16Target = 0; + + //-------------------------------------------------------------------------- + // Step the ramp. Note that we don't care if this function returns an error. + // We're stepping the ramp to make sure it takes immediate effect, if + // possible. But, for example, if the Battery Charger is not yet + // initialized, it doesn't matter. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(0); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the target current. +//! +//! \fntype Function +//! +//! This function sets the target current and implements it immediately. +//! +//! Note that this function does NOT reset the temperature alarms. Those can +//! only be reset explicitly. +//! +//! \param[in] u16Target The target current. +//! +//! \retval The expressible version of the target. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_RampSetTarget(uint16_t u16Target) +{ + + //-------------------------------------------------------------------------- + // Set the target. + //-------------------------------------------------------------------------- + + g_RampControl.u16Target = u16Target; + + //-------------------------------------------------------------------------- + // Step the ramp. Note that we don't care if this function returns an error. + // We're stepping the ramp to make sure it takes immediate effect, if + // possible. But, for example, if the Battery Charger is not yet + // initialized, it doesn't matter. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(0); + + //-------------------------------------------------------------------------- + // Compute and return the expressible target. + //-------------------------------------------------------------------------- + + return (ddi_bc_hwExpressibleCurrent(u16Target)); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the target. +//! +//! \fntype Function +//! +//! This function reports the target. +//! +//! \retval The target. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_RampGetTarget(void) +{ + + //-------------------------------------------------------------------------- + // Return the target. + //-------------------------------------------------------------------------- + + return (g_RampControl.u16Target); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current limit. +//! +//! \fntype Function +//! +//! This function sets the current limit and implements it immediately. +//! +//! \param[in] u16Limit The current limit. +//! +//! \retval The expressible version of the limit. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_RampSetLimit(uint16_t u16Limit) +{ + + //-------------------------------------------------------------------------- + // Set the limit. + //-------------------------------------------------------------------------- + + g_RampControl.u16Limit = u16Limit; + + //-------------------------------------------------------------------------- + // Step the ramp. Note that we don't care if this function returns an error. + // We're stepping the ramp to make sure it takes immediate effect, if + // possible. But, for example, if the Battery Charger is not yet + // initialized, it doesn't matter. + //-------------------------------------------------------------------------- + + ddi_bc_RampStep(0); + + //-------------------------------------------------------------------------- + // Compute and return the expressible limit. + //-------------------------------------------------------------------------- + + return (ddi_bc_hwExpressibleCurrent(u16Limit)); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current limit. +//! +//! \fntype Function +//! +//! This function reports the current limit. +//! +//! \retval The current limit. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_RampGetLimit(void) +{ + + //-------------------------------------------------------------------------- + // Return the current limit. + //-------------------------------------------------------------------------- + + return (g_RampControl.u16Limit); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Update alarms. +//! +//! \fntype Function +//! +//! This function checks for all alarms and updates the current ramp +//! accordingly. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_RampUpdateAlarms() +{ + + // Set to true if something changed and we need to step the ramp right away. + + int iStepTheRamp = 0; + + //-------------------------------------------------------------------------- + // Are we monitoring die temperature? + //-------------------------------------------------------------------------- + + if (g_ddi_bc_Configuration.monitorDieTemp) { + + //---------------------------------------------------------------------- + // Get the die temperature range. + //---------------------------------------------------------------------- + + int16_t i16Low; + int16_t i16High; + + ddi_bc_hwGetDieTemp(&i16Low, &i16High); + + //---------------------------------------------------------------------- + // Now we need to decide if it's time to raise or lower the alarm. The + // first question to ask is: Were we already under an alarm? + //---------------------------------------------------------------------- + + if (g_RampControl.dieTempAlarm) { + + //------------------------------------------------------------------ + // If control arrives here, we were already under an alarm. We'll + // change that if the high end of the temperature range drops below + // the low temperature mark. + //------------------------------------------------------------------ + + if (i16High < g_ddi_bc_Configuration.u8DieTempLow) { + + //-------------------------------------------------------------- + // If control arrives here, we're safe now. Drop the alarm. + //-------------------------------------------------------------- + + g_RampControl.dieTempAlarm = 0; + + iStepTheRamp = !0; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: releasing " + "die temp alarm: [%d, %d] < %d\r\n", + (int32_t) i16Low, (int32_t) i16High, + (int32_t) g_ddi_bc_Configuration. + u8DieTempLow); +#endif + + } + + } else { + + //------------------------------------------------------------------ + // If control arrives here, we were not under an alarm. We'll change + // that if the high end of the temperature range rises above the + // high temperature mark. + //------------------------------------------------------------------ + + if (i16High >= g_ddi_bc_Configuration.u8DieTempHigh) { + + //-------------------------------------------------------------- + // If control arrives here, we're running too hot. Raise the + // alarm. + //-------------------------------------------------------------- + + g_RampControl.dieTempAlarm = 1; + + iStepTheRamp = !0; + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: declaring " + "die temp alarm: [%d, %d] >= %d\r\n", + (int32_t) i16Low, (int32_t) i16High, + (int32_t) g_ddi_bc_Configuration. + u8DieTempLow); +#endif + } + + } + + } + //-------------------------------------------------------------------------- + // Are we monitoring battery temperature? + //-------------------------------------------------------------------------- + + if (g_ddi_bc_Configuration.monitorBatteryTemp) { + + ddi_bc_Status_t status; + + //---------------------------------------------------------------------- + // Get the battery temperature reading. + //---------------------------------------------------------------------- + + uint16_t u16Reading; + + status = ddi_bc_hwGetBatteryTemp(&u16Reading); + + //---------------------------------------------------------------------- + // If there was a problem, then we ignore the reading. Otherwise, let's + // have a look. + //---------------------------------------------------------------------- + + if (status == DDI_BC_STATUS_SUCCESS) { + + //------------------------------------------------------------------ + // Now we need to decide if it's time to raise or lower the alarm. + // The first question to ask is: Were we already under an alarm? + //------------------------------------------------------------------ + + if (g_RampControl.batteryTempAlarm) { + + //-------------------------------------------------------------- + // If control arrives here, we were already under an alarm. + // We'll change that if the reading drops below the low mark. + //-------------------------------------------------------------- + + if (u16Reading < + g_ddi_bc_Configuration.u16BatteryTempLow) { + + //---------------------------------------------------------- + // If control arrives here, we're safe now. Drop the alarm. + //---------------------------------------------------------- + + g_RampControl.batteryTempAlarm = 0; + + iStepTheRamp = !0; + + } + + } else { + + //-------------------------------------------------------------- + // If control arrives here, we were not under an alarm. We'll + // change that if the reading rises above the high mark. + //-------------------------------------------------------------- + + if (u16Reading >= + g_ddi_bc_Configuration.u16BatteryTempHigh) { + + //---------------------------------------------------------- + // If control arrives here, we're running too hot. Raise the + // alarm. + //---------------------------------------------------------- + + g_RampControl.batteryTempAlarm = 1; + + iStepTheRamp = !0; + + } + + } + + } + + } + //-------------------------------------------------------------------------- + // Do we need to step the ramp? + //-------------------------------------------------------------------------- + + if (iStepTheRamp) + ddi_bc_RampStep(0); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reports the state of the die temperature alarm. +//! +//! \fntype Function +//! +//! This function reports the state of the die temperature alarm. +//! +//! \retval The state of the die temperature alarm. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_RampGetDieTempAlarm(void) +{ + return (g_RampControl.dieTempAlarm); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reports the state of the battery temperature alarm. +//! +//! \fntype Function +//! +//! This function reports the state of the battery temperature alarm. +//! +//! \retval The state of the battery temperature alarm. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_RampGetBatteryTempAlarm(void) +{ + return (g_RampControl.batteryTempAlarm); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reports the state of the ambient temperature alarm. +//! +//! \fntype Function +//! +//! This function reports the state of the ambient temperature alarm. +//! +//! \retval The state of the ambient temperature alarm. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_RampGetAmbientTempAlarm(void) +{ + return (g_RampControl.ambientTempAlarm); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Step the current ramp. +//! +//! \fntype Function +//! +//! This function steps the current ramp forward through the given amount of time. +//! +//! \param[in] u32Time The time increment to add. +//! +//! \retval DDI_BC_STATUS_SUCCESS If the operation succeeded. +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_RampStep(uint32_t u32Time) +{ + + uint16_t u16MaxNow; + uint16_t u16Target; + uint16_t u16Cart; + int32_t i32Delta; + + //-------------------------------------------------------------------------- + // Make sure the Battery Charger is initialized. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State == DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_NOT_INITIALIZED); + } + //-------------------------------------------------------------------------- + // Figure out how much current the hardware is set to draw right now. + //-------------------------------------------------------------------------- + + u16MaxNow = ddi_bc_hwGetMaxCurrent(); + + //-------------------------------------------------------------------------- + // Start with the target. + //-------------------------------------------------------------------------- + + u16Target = g_RampControl.u16Target; + + //-------------------------------------------------------------------------- + // Check the target against the hard limit. + //-------------------------------------------------------------------------- + + if (u16Target > g_RampControl.u16Limit) + u16Target = g_RampControl.u16Limit; + + //-------------------------------------------------------------------------- + // Check if the die temperature alarm is active. + //-------------------------------------------------------------------------- + + if (g_RampControl.dieTempAlarm) { + + //---------------------------------------------------------------------- + // If control arrives here, we are under a die temperature alarm. Clamp + // the target current. + //---------------------------------------------------------------------- + + if (u16Target > g_ddi_bc_Configuration.u16DieTempSafeCurrent) { + u16Target = + g_ddi_bc_Configuration.u16DieTempSafeCurrent; + } + + } + //-------------------------------------------------------------------------- + // Check if the battery temperature alarm is active. + //-------------------------------------------------------------------------- + + if (g_RampControl.batteryTempAlarm) { + + //---------------------------------------------------------------------- + // If control arrives here, we are under a battery temperature alarm. + // Clamp the target current. + //---------------------------------------------------------------------- + + if (u16Target > + g_ddi_bc_Configuration.u16BatteryTempSafeCurrent) { + u16Target = + g_ddi_bc_Configuration.u16BatteryTempSafeCurrent; + } + + } + //-------------------------------------------------------------------------- + // Now we know the target current. Figure out what is actually expressible + // in the hardware. + //-------------------------------------------------------------------------- + + u16Target = ddi_bc_hwExpressibleCurrent(u16Target); + + //-------------------------------------------------------------------------- + // Compute the difference between the expressible target and what's actually + // set in the hardware right now. + //-------------------------------------------------------------------------- + + i32Delta = ((int32_t) u16Target) - ((int32_t) u16MaxNow); + + //-------------------------------------------------------------------------- + // Check if the delta is zero. + //-------------------------------------------------------------------------- + + if (i32Delta == 0) { + + //---------------------------------------------------------------------- + // If control arrives here, there is no difference between what we want + // and what's set in the hardware. + // + // Before we leave, though, we don't want to leave any accumulated time + // laying around for the next ramp up. Zero it out. + //---------------------------------------------------------------------- + + g_RampControl.u32AccumulatedTime = 0; + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + //-------------------------------------------------------------------------- + // Check if the delta is negative. + //-------------------------------------------------------------------------- + + if (i32Delta < 0) { + + //---------------------------------------------------------------------- + // If control arrives here, the new target is lower than what's + // currently set in the hardware. Since that means we're *reducing* the + // current draw, we can do it right now. Just gimme a sec here... + //---------------------------------------------------------------------- + + ddi_bc_hwSetMaxCurrent(u16Target); + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: setting max charge " + "current to: %hdmA\r\n", u16Target); +#endif + + //---------------------------------------------------------------------- + // Flip the power switch on the charging hardware according to the new + // current setting. + //---------------------------------------------------------------------- + + ddi_bc_hwSetChargerPower(u16Target != 0); + + //---------------------------------------------------------------------- + // We don't want to leave any accumulated time laying around for the + // next ramp up. Zero it out. + //---------------------------------------------------------------------- + + g_RampControl.u32AccumulatedTime = 0; + + //---------------------------------------------------------------------- + // Return success. + //---------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + + } + //-------------------------------------------------------------------------- + // If control arrives here, the target current is higher than what's set in + // the hardware right now. That means we're going to ramp it up. To do that, + // we're going to "buy" more milliamps by "spending" milliseconds of time. + // Add the time we've "banked" to the time we've been credited in this call. + //-------------------------------------------------------------------------- + + u32Time += g_RampControl.u32AccumulatedTime; + + //-------------------------------------------------------------------------- + // Now we know how much we can spend. How much current will it buy? + //-------------------------------------------------------------------------- + + u16Cart = (g_ddi_bc_Configuration.u16CurrentRampSlope * u32Time) / 1000; + + //-------------------------------------------------------------------------- + // Check how the current we can afford stacks up against the target we want. + //-------------------------------------------------------------------------- + + if ((u16MaxNow + u16Cart) < u16Target) { + + //---------------------------------------------------------------------- + // If control arrives here, we can't afford to buy all the current we + // want. Compute the maximum we can afford, and then figure out what we + // can actually express in the hardware. + //---------------------------------------------------------------------- + + u16Target = ddi_bc_hwExpressibleCurrent(u16MaxNow + u16Cart); + + //---------------------------------------------------------------------- + // Check if the result isn't actually different from what's set in the + // the hardware right now. + //---------------------------------------------------------------------- + + if (u16Target == u16MaxNow) { + + //------------------------------------------------------------------ + // If control arrives here, we are so poor that we can't yet afford + // to buy enough current to make a change in the expressible + // hardware setting. Since we didn't spend any of our time, put the + // new balance back in the bank. + //------------------------------------------------------------------ + + g_RampControl.u32AccumulatedTime = u32Time; + + //------------------------------------------------------------------ + // Leave dispiritedly. + //------------------------------------------------------------------ + + return (DDI_BC_STATUS_SUCCESS); + + } + + } + //-------------------------------------------------------------------------- + // If control arrives here, we can afford to buy enough current to get us + // all the way to the target. Set it. + //-------------------------------------------------------------------------- + + ddi_bc_hwSetMaxCurrent(u16Target); + +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("Battery charger: setting max charge" + "current to: %hdmA\r\n", u16Target); +#endif + + //-------------------------------------------------------------------------- + // Flip the power switch on the charging hardware according to the new + // current setting. + //-------------------------------------------------------------------------- + + ddi_bc_hwSetChargerPower(u16Target != 0); + + //-------------------------------------------------------------------------- + // We're at the target, so we're finished buying current. Zero out the + // account. + //-------------------------------------------------------------------------- + + g_RampControl.u32AccumulatedTime = 0; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- + + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_init.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_init.c @@ -0,0 +1,188 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "ddi_bc_internal.h" + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_init.c +//! \brief Contains the Battery Charger initialization function. +//! \date 06/2005 +//! +//! This file contains Battery Charger initialization function. +//! +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Includes and external references +//////////////////////////////////////////////////////////////////////////////// +#include +#include "ddi_bc_internal.h" + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! \brief Initialize the Battery Charger. +//! +//! \fntype Function +//! +//! This function initializes the Battery Charger. +//! +//! \param[in] pCfg A pointer to the new configuration. +//! +//! \retval DDI_BC_STATUS_SUCCESS +//! If the operation succeeded. +//! \retval DDI_BC_STATUS_ALREADY_INITIALIZED +//! If the Battery Charger is already initialized. +//! \retval DDI_BC_STATUS_HARDWARE_DISABLED +//! If the Battery Charger hardware is disabled by a laser fuse. +//! \retval DDI_BC_STATUS_BAD_BATTERY_MODE +//! If the power supply is set up for a non-rechargeable battery. +//! \retval DDI_BC_STATUS_CLOCK_GATE_CLOSED +//! If the clock gate for the power supply registers is closed. +//! \retval DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE +//! If the charging voltage is not either 4100 or 4200. +//! \retval DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL +//! If the LRADC channel number for monitoring battery temperature +//! is bad. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_Init(ddi_bc_Cfg_t * pCfg) +{ + + //-------------------------------------------------------------------------- + // We can only be initialized if we're in the Uninitialized state. + //-------------------------------------------------------------------------- + + if (g_ddi_bc_State != DDI_BC_STATE_UNINITIALIZED) { + return (DDI_BC_STATUS_ALREADY_INITIALIZED); + } + //-------------------------------------------------------------------------- + // Check if the battery charger hardware has been disabled by laser fuse. + //-------------------------------------------------------------------------- + + if (!ddi_power_GetBatteryChargerEnabled()) + return (DDI_BC_STATUS_HARDWARE_DISABLED); + + //-------------------------------------------------------------------------- + // Check if the power supply has been set up for a non-rechargeable battery. + //-------------------------------------------------------------------------- + + switch (ddi_power_GetBatteryMode()) { + + case DDI_POWER_BATT_MODE_LIION: + break; + + // TODO: we'll need to do NiMH also + default: + return (DDI_BC_STATUS_BAD_BATTERY_MODE); + //break; + + } + + //-------------------------------------------------------------------------- + // Make sure that the clock gate has been opened for the power supply + // registers. If not, then none of our writes to those registers will + // succeed, which will kind of slow us down... + //-------------------------------------------------------------------------- + + if (ddi_power_GetPowerClkGate()) { + return (DDI_BC_STATUS_CLOCK_GATE_CLOSED); + } + //-------------------------------------------------------------------------- + // Check the incoming configuration for nonsense. + //-------------------------------------------------------------------------- + + // + // Only permitted charging voltage: 4200mV. + // + + if (pCfg->u16ChargingVoltage != DDI_BC_LIION_CHARGING_VOLTAGE) { + return (DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE); + } + // + // There are 8 LRADC channels. + // + + if (pCfg->u8BatteryTempChannel > 7) { + return (DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL); + } + //-------------------------------------------------------------------------- + // Accept the configuration. + //-------------------------------------------------------------------------- + + //-------------------------------------------------------------------------- + // ddi_bc_Cfg_t.u16ChargingThresholdCurrent is destined for the + // register field HW_POWER_BATTCHRG.STOP_ILIMIT. This 4-bit field + // is unevenly quantized to provide a useful range of currents. A + // side effect of the quantization is that the field can only be + // set to certain unevenly-spaced values. + // + // Here, we use the two functions that manipulate the register field + // to adjust u16ChargingThresholdCurrent to match the quantized value. + //-------------------------------------------------------------------------- + pCfg->u16ChargingThresholdCurrent = + ddi_power_ExpressibleCurrent(pCfg->u16ChargingThresholdCurrent); + + //-------------------------------------------------------------------------- + // ...similar situation with ddi_bc_Cfg_t.u16BatteryTempSafeCurrent and + // u16DieTempSafeCurrent. + //-------------------------------------------------------------------------- + pCfg->u16BatteryTempSafeCurrent = + ddi_power_ExpressibleCurrent(pCfg->u16BatteryTempSafeCurrent); + pCfg->u16DieTempSafeCurrent = + ddi_power_ExpressibleCurrent(pCfg->u16DieTempSafeCurrent); + + g_ddi_bc_Configuration = *pCfg; + + //-------------------------------------------------------------------------- + // Turn the charger hardware off. This is a very important initial condition + // because we only flip the power switch on the hardware when we make + // transitions. Baseline, it needs to be off. + //-------------------------------------------------------------------------- + + ddi_power_SetChargerPowered(0); + + //-------------------------------------------------------------------------- + // Reset the current ramp. This will jam the current to zero and power off + // the charging hardware. + //-------------------------------------------------------------------------- + + ddi_bc_RampReset(); + + //-------------------------------------------------------------------------- + // Move to the Disabled state. + //-------------------------------------------------------------------------- + + g_ddi_bc_State = DDI_BC_STATE_DISABLED; + + //-------------------------------------------------------------------------- + // Return success. + //-------------------------------------------------------------------------- +#ifdef CONFIG_POWER_SUPPLY_DEBUG + printk("%s: success\n", __func__); +#endif + return (DDI_BC_STATUS_SUCCESS); + +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/power/stmp37xx/ddi_bc_hw.c +++ linux-fsl-imx51-2.6.31/drivers/power/stmp37xx/ddi_bc_hw.c @@ -0,0 +1,411 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "ddi_bc_internal.h" + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc_hw.c +//! \brief Contains the Battery Charger hardware operations. +//! \date 06/2005 +//! +//! This file contains Battery Charger hardware operations. +//! +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Includes and external references +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Variables +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Code +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report if the battery charging hardware is available. +//! +//! \fntype Function +//! +//! This function reports if the battery charging hardware is available by +//! reading the corresponding laser fuse bit. +//! +//! \retval Zero if the battery charging hardware is not available. Non-zero +//! otherwise. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_hwBatteryChargerIsEnabled(void) +{ + //TODO: replace ddi_bc_hwBatteryChargerIsEnabled with the function below in the code + return (int)ddi_power_GetBatteryChargerEnabled(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the battery configuration. +//! +//! \fntype Function +//! +//! This function reports the hardware battery configuration. +//! +//! \retval A value that indicates the battery configuration. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_BatteryMode_t ddi_bc_hwGetBatteryMode(void) +{ + //TODO: replace ddi_bc_hwGetBatteryMode() with the function below. + return (ddi_bc_BatteryMode_t) ddi_power_GetBatteryMode(); +} + + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the voltage across the battery. +//! +//! \fntype Function +//! +//! This function reports the voltage across the battery. +//! +//! \retval The voltage across the battery, in mV. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwGetBatteryVoltage(void) +{ + //TODO: replace ddi_bc_hwGetBattery with function below + return ddi_power_GetBattery(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report on the presence of the power supply. +//! +//! \fntype Function +//! +//! This function repots on whether or not the 5V power supply is present. +//! +//! \retval Zero if the power supply is not present. Non-zero otherwise. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_hwPowerSupplyIsPresent(void) +{ + // TODO: replace ddi_bc_hwPowerSupplyIsPresent with the functino below. + return (int)ddi_power_Get5vPresentFlag(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the maximum charging current. +//! +//! \fntype Function +//! +//! This function reports the maximum charging current that will be offered to +//! the battery, as currently set in the hardware. +//! +//! \retval The maximum current setting in the hardware. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwGetMaxCurrent(void) +{ + // TODO: replace ddi_bc_hwGetMaxCurrent() with the below function + return (uint16_t) ddi_power_GetMaxBatteryChargeCurrent(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the maximum charging current. +//! +//! \fntype Function +//! +//! This function sets the maximum charging current that will be offered to the +//! battery. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 780mA (see the data sheet for details). If the given +//! current cannot be expressed exactly, then the largest expressible smaller +//! value will be used. The return reports the actual value that was effected. +//! +//! \param[in] u16Limit The maximum charging current, in mA. +//! +//! \retval The actual value that was effected. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwSetMaxCurrent(uint16_t u16Limit) +{ + //TODO: replace ddi_bc_hwSetMaxChargeCurrent + return ddi_power_SetMaxBatteryChargeCurrent(u16Limit); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the charging current threshold. +//! +//! \fntype Function +//! +//! This function sets the charging current threshold. When the actual current +//! flow to the battery is less than this threshold, the HW_POWER_STS.CHRGSTS +//! flag is clear. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 180mA (see the data sheet for details). If the given +//! current cannot be expressed exactly, then the largest expressible smaller +//! value will be used. The return reports the actual value that was effected. +//! +//! \param[in] u16Threshold The charging current threshold, in mA. +//! +//! \retval The actual value that was effected. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwSetCurrentThreshold(uint16_t u16Threshold) +{ + //TODO: replace calls to ddi_bc_hwSetCurrentThreshold with the one below + return ddi_power_SetBatteryChargeCurrentThreshold(u16Threshold); + +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the charging current threshold. +//! +//! \fntype Function +//! +//! This function reports the charging current threshold. When the actual +//! current flow to the battery is less than this threshold, the +//! HW_POWER_STS.CHRGSTS flag is clear. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 180mA (see the data sheet for details). +//! +//! \retval The charging current threshold, in mA. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwGetCurrentThreshold(void) +{ + //TODO: replace calls to ddi_bc_hwGetCurrentThreshold with function below + return ddi_power_GetBatteryChargeCurrentThreshold(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report if the charger hardware power is on. +//! +//! \fntype Function +//! +//! This function reports if the charger hardware power is on. +//! +//! \retval Zero if the charger hardware is not powered. Non-zero otherwise. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_hwChargerPowerIsOn(void) +{ + + //-------------------------------------------------------------------------- + // Note that the bit we're looking at is named PWD_BATTCHRG. The "PWD" + // stands for "power down". Thus, when the bit is set, the battery charger + // hardware is POWERED DOWN. + //-------------------------------------------------------------------------- + + //-------------------------------------------------------------------------- + // Read the register and return the result. + //-------------------------------------------------------------------------- + + //TODO: replace ddi_bc_hwChargerPowerIsOn with function below + return ddi_power_GetChargerPowered(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Turn the charging hardware on or off. +//! +//! \fntype Function +//! +//! This function turns the charging hardware on or off. +//! +//! \param[in] on Indicates whether the charging hardware should be on or off. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_hwSetChargerPower(int on) +{ + + //-------------------------------------------------------------------------- + // Note that the bit we're looking at is named PWD_BATTCHRG. The "PWD" + // stands for "power down". Thus, when the bit is set, the battery charger + // hardware is POWERED DOWN. + //-------------------------------------------------------------------------- + + //-------------------------------------------------------------------------- + // Hit the power switch. + //-------------------------------------------------------------------------- + + //TODO: replace ddi_bc_hwSetChargerPower with functino below + ddi_power_SetChargerPowered(on); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Reports if the charging current has fallen below the threshold. +//! +//! \fntype Function +//! +//! This function reports if the charging current that the battery is accepting +//! has fallen below the threshold. +//! +//! Note that this bit is regarded by the hardware guys as very slightly +//! unreliable. They recommend that you don't believe a value of zero until +//! you've sampled it twice. +//! +//! \retval Zero if the battery is accepting less current than indicated by the +//! charging threshold. Non-zero otherwise. +//! +//////////////////////////////////////////////////////////////////////////////// +int ddi_bc_hwGetChargeStatus(void) +{ + return ddi_power_GetChargeStatus(); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report on the die temperature. +//! +//! \fntype Function +//! +//! This function reports on the die temperature. +//! +//! \param[out] pLow The low end of the temperature range. +//! \param[out] pHigh The high end of the temperature range. +//! +//////////////////////////////////////////////////////////////////////////////// +void ddi_bc_hwGetDieTemp(int16_t * pLow, int16_t * pHigh) +{ + // TODO: replace ddi_bc_hwGetDieTemp with function below + ddi_power_GetDieTemp(pLow, pHigh); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the battery temperature reading. +//! +//! \fntype Function +//! +//! This function examines the configured LRADC channel and reports the battery +//! temperature reading. +//! +//! \param[out] pReading A pointer to a variable that will receive the +//! temperature reading. +//! +//! \retval DDI_BC_STATUS_SUCCESS If the operation succeeded. +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_hwGetBatteryTemp(uint16_t * pReading) +{ + return (ddi_bc_Status_t)DDI_BC_STATUS_HARDWARE_DISABLED; +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Convert a current in mA to a hardware setting. +//! +//! \fntype Function +//! +//! This function converts a current measurement in mA to a hardware setting +//! used by HW_POWER_BATTCHRG.STOP_ILIMIT or HW_POWER_BATTCHRG.BATTCHRG_I. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 780mA (see the data sheet for details). If the given +//! current cannot be expressed exactly, then the largest expressible smaller +//! value will be used. +//! +//! \param[in] u16Current The current of interest. +//! +//! \retval The corresponding setting. +//! +//////////////////////////////////////////////////////////////////////////////// +uint8_t ddi_bc_hwCurrentToSetting(uint16_t u16Current) +{ + return ddi_power_convert_current_to_setting(u16Current); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Convert a hardware current setting to a value in mA. +//! +//! \fntype Function +//! +//! This function converts a setting used by HW_POWER_BATTCHRG.STOP_ILIMIT or +//! HW_POWER_BATTCHRG.BATTCHRG_I into an actual current measurement in mA. +//! +//! Note that the hardware current fields are 6 bits wide. The higher bits in +//! the 8-bit input parameter are ignored. +//! +//! \param[in] u8Setting A hardware current setting. +//! +//! \retval The corresponding current in mA. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwSettingToCurrent(uint8_t u8Setting) +{ + return ddi_power_convert_setting_to_current(u8Setting); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Compute the actual current expressible in the hardware. +//! +//! \fntype Function +//! +//! Given a desired current, this function computes the actual current +//! expressible in the hardware. +//! +//! Note that the hardware has a minimum resolution of 10mA and a maximum +//! expressible value of 780mA (see the data sheet for details). If the given +//! current cannot be expressed exactly, then the largest expressible smaller +//! value will be used. +//! +//! \param[in] u16Current The current of interest. +//! +//! \retval The corresponding current in mA. +//! +//////////////////////////////////////////////////////////////////////////////// +uint16_t ddi_bc_hwExpressibleCurrent(uint16_t u16Current) +{ + //TODO: replace the bc function with this one + return ddi_power_ExpressibleCurrent(u16Current); +} + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Checks to see if the DCDC has been manually enabled +//! +//! \fntype Function +//! +//! \retval true if DCDC is ON, false if DCDC is OFF. +//! +//////////////////////////////////////////////////////////////////////////////// +bool ddi_bc_hwIsDcdcOn(void) +{ + return ddi_power_IsDcdcOn(); +} + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +//! @} --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/block.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/block.c @@ -88,6 +88,12 @@ int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT; __clear_bit(devidx, dev_use); + /* + * We are about to drop the last reference to the disk object. + * Nothing else should now be looking at the queue pointer, so + * now it won't hurt if we release it. + */ + blk_cleanup_queue(md->disk->queue); put_disk(md->disk); kfree(md); } --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/Kconfig @@ -50,3 +50,15 @@ This driver is only of interest to those developing or testing a host driver. Most people should say N here. + +config SDIO_UNIFI_FS + tristate "UniFi SDIO glue for Freescale MMC/SDIO" + depends on (MMC_MXC || MMC_IMX_ESDHCI) + depends on (MACH_MX31_3DS || MACH_MX35_3DS || MACH_MX37_3DS || MACH_MX51_3DS) + help + This provides an interface between the CSR UniFi WiFi + driver and the Freescale MMC/SDIO interface. + If you have a MXC platform with a UniFi WiFi chip, + say M here. + + If unsure, say N. --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_SDIO_UART) += sdio_uart.o +obj-$(CONFIG_SDIO_UNIFI_FS) += unifi_fs/ --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/queue.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/queue.c @@ -245,7 +245,12 @@ kfree(mq->bounce_buf); mq->bounce_buf = NULL; - blk_cleanup_queue(mq->queue); + /* + * Calling blk_cleanup_queue() would be too soon here. As long as + * the gendisk has a reference to it and is not released we should + * keep the queue. It has been shutdown and will not accept any new + * requests, so that should be safe. + */ mq->card = NULL; } --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/unifi_fs/fs_sdio_api.h +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/unifi_fs/fs_sdio_api.h @@ -0,0 +1,68 @@ +/* + *fs_sdio_api.h - Freescale SDIO glue module API for UniFi. + * + * Copyright (C) 2008 Cambridge Silicon Radio Ltd. + * + */ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _FS_SDIO_API_H +#define _FS_SDIO_API_H + +struct sdio_dev; + +struct fs_driver { + const char *name; + int (*probe)(struct sdio_dev *fdev); + void (*remove)(struct sdio_dev *fdev); + void (*card_int_handler)(struct sdio_dev *fdev); + void (*suspend)(struct sdio_dev *fdev, pm_message_t state); + void (*resume)(struct sdio_dev *fdev); +}; + +int fs_sdio_readb(struct sdio_dev *fdev, int funcnum, + unsigned long addr, unsigned char *pdata); +int fs_sdio_writeb(struct sdio_dev *fdev, int funcnum, + unsigned long addr, unsigned char data); +int fs_sdio_block_rw(struct sdio_dev *fdev, int funcnum, + unsigned long addr, unsigned char *pdata, + unsigned int count, int direction); + +int fs_sdio_register_driver(struct fs_driver *driver); +void fs_sdio_unregister_driver(struct fs_driver *driver); +int fs_sdio_set_block_size(struct sdio_dev *fdev, int blksz); +int fs_sdio_set_max_clock_speed(struct sdio_dev *fdev, int max_khz); +int fs_sdio_enable_interrupt(struct sdio_dev *fdev, int enable); +int fs_sdio_enable(struct sdio_dev *fdev); +int fs_sdio_hard_reset(struct sdio_dev *fdev); + +struct sdio_dev { + /**< Device driver for this module. */ + struct fs_driver *driver; + + struct sdio_func *func; + + /**< Data private to the device driver. */ + void *drv_data; + + int int_enabled; + spinlock_t lock; + + uint16_t vendor_id; /**< Vendor ID of the card. */ + uint16_t device_id; /**< Device ID of the card. */ + + /**< Maximum block size supported. */ + int max_blocksize; +}; + + +#endif /* #ifndef _FS_SDIO_API_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/unifi_fs/fs_lx.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/unifi_fs/fs_lx.c @@ -0,0 +1,681 @@ +/* + * fs_lx.c - Freescale SDIO glue module for UniFi. + * + * Copyright (C) 2008 Cambridge Silicon Radio Ltd. + * + * Important: + * This module does not support more than one device driver instances. + * + */ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include + +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include + +#include "fs_sdio_api.h" + +struct regulator_unifi { + struct regulator *reg_gpo1; + struct regulator *reg_gpo2; + struct regulator *reg_1v5_ana_bb; + struct regulator *reg_vdd_vpa; + struct regulator *reg_1v5_dd; +}; + +static struct sdio_driver sdio_unifi_driver; + +static int fs_sdio_probe(struct sdio_func *func, + const struct sdio_device_id *id); +static void fs_sdio_remove(struct sdio_func *func); +static void fs_sdio_irq(struct sdio_func *func); +static int fs_sdio_suspend(struct device *dev, pm_message_t state); +static int fs_sdio_resume(struct device *dev); + +/* Globals to store the context to this module and the device driver */ +static struct sdio_dev *available_sdio_dev; +static struct fs_driver *available_driver; +struct mxc_unifi_platform_data *plat_data; + +extern void mxc_mmc_force_detect(int id); + +enum sdio_cmd_direction { + CMD_READ, + CMD_WRITE, +}; + +static int fsl_io_rw_direct(struct mmc_card *card, int write, unsigned fn, + unsigned addr, u8 in, u8 *out) +{ + struct mmc_command cmd; + int err; + + BUG_ON(!card); + BUG_ON(fn > 7); + + memset(&cmd, 0, sizeof(struct mmc_command)); + + cmd.opcode = SD_IO_RW_DIRECT; + cmd.arg = write ? 0x80000000 : 0x00000000; + cmd.arg |= fn << 28; + cmd.arg |= (write && out) ? 0x08000000 : 0x00000000; + cmd.arg |= addr << 9; + cmd.arg |= in; + cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC; + + err = mmc_wait_for_cmd(card->host, &cmd, 0); + if (err) + return err; + + if (mmc_host_is_spi(card->host)) { + /* host driver already reported errors */ + } else { + if (cmd.resp[0] & R5_ERROR) + return -EIO; + if (cmd.resp[0] & R5_FUNCTION_NUMBER) + return -EINVAL; + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return -ERANGE; + } + + if (out) { + if (mmc_host_is_spi(card->host)) + *out = (cmd.resp[0] >> 8) & 0xFF; + else + *out = cmd.resp[0] & 0xFF; + } + + return 0; +} + + +int fs_sdio_readb(struct sdio_dev *fdev, int funcnum, unsigned long addr, + unsigned char *pdata) +{ + int err; + char val; + + sdio_claim_host(fdev->func); + if (funcnum == 0) + val = sdio_f0_readb(fdev->func, (unsigned int)addr, &err); + else + val = sdio_readb(fdev->func, (unsigned int)addr, &err); + sdio_release_host(fdev->func); + if (!err) + *pdata = val; + else + printk(KERN_ERR "fs_lx: readb error,fun=%d,addr=%d,data=%d," + "err=%d\n", funcnum, (int)addr, *pdata, err); + + return err; +} +EXPORT_SYMBOL(fs_sdio_readb); + +int fs_sdio_writeb(struct sdio_dev *fdev, int funcnum, unsigned long addr, + unsigned char data) +{ + int err; + + sdio_claim_host(fdev->func); + if (funcnum == 0) + err = fsl_io_rw_direct(fdev->func->card, 1, 0, addr, + data, NULL); + else + sdio_writeb(fdev->func, data, (unsigned int)addr, &err); + sdio_release_host(fdev->func); + + if (err) + printk(KERN_ERR "fs_lx: writeb error,fun=%d,addr=%d,data=%d," + "err=%d\n", funcnum, (int)addr, data, err); + return err; +} +EXPORT_SYMBOL(fs_sdio_writeb); + +int fs_sdio_block_rw(struct sdio_dev *fdev, int funcnum, unsigned long addr, + unsigned char *pdata, unsigned int count, int direction) +{ + int err; + + sdio_claim_host(fdev->func); + if (direction == CMD_READ) + err = sdio_memcpy_fromio(fdev->func, pdata, addr, count); + else + err = sdio_memcpy_toio(fdev->func, addr, pdata, count); + sdio_release_host(fdev->func); + + return err; +} +EXPORT_SYMBOL(fs_sdio_block_rw); + +int fs_sdio_enable_interrupt(struct sdio_dev *fdev, int enable) +{ + struct mmc_host *host = fdev->func->card->host; + unsigned long flags; + + spin_lock_irqsave(&fdev->lock, flags); + if (enable) { + if (!fdev->int_enabled) { + fdev->int_enabled = 1; + host->ops->enable_sdio_irq(host, 1); + } + } else { + if (fdev->int_enabled) { + host->ops->enable_sdio_irq(host, 0); + fdev->int_enabled = 0; + } + } + spin_unlock_irqrestore(&fdev->lock, flags); + + return 0; +} +EXPORT_SYMBOL(fs_sdio_enable_interrupt); + +int fs_sdio_disable(struct sdio_dev *fdev) +{ + int err; + sdio_claim_host(fdev->func); + err = sdio_disable_func(fdev->func); + sdio_release_host(fdev->func); + if (err) + printk(KERN_ERR "fs_lx:fs_sdio_disable error,err=%d\n", err); + return err; +} +EXPORT_SYMBOL(fs_sdio_disable); + +int fs_sdio_enable(struct sdio_dev *fdev) +{ + int err = 0; + + sdio_claim_host(fdev->func); + err = sdio_disable_func(fdev->func); + err = sdio_enable_func(fdev->func); + sdio_release_host(fdev->func); + if (err) + printk(KERN_ERR "fs_lx:fs_sdio_enable error,err=%d\n", err); + return err; +} +EXPORT_SYMBOL(fs_sdio_enable); + +int fs_sdio_set_max_clock_speed(struct sdio_dev *fdev, int max_khz) +{ + struct mmc_card *card = fdev->func->card; + + /* Respect the host controller's min-max. */ + max_khz *= 1000; + if (max_khz < card->host->f_min) + max_khz = card->host->f_min; + if (max_khz > card->host->f_max) + max_khz = card->host->f_max; + + card->host->ios.clock = max_khz; + card->host->ops->set_ios(card->host, &card->host->ios); + + return max_khz / 1000; +} +EXPORT_SYMBOL(fs_sdio_set_max_clock_speed); + +int fs_sdio_set_block_size(struct sdio_dev *fdev, int blksz) +{ + return 0; +} +EXPORT_SYMBOL(fs_sdio_set_block_size); + +/* + * --------------------------------------------------------------------------- + * + * Turn on the power of WIFI card + * + * --------------------------------------------------------------------------- + */ +static void fs_unifi_power_on(void) +{ + struct regulator_unifi *reg_unifi; + unsigned int tmp; + + reg_unifi = plat_data->priv; + + if (reg_unifi->reg_gpo1) + regulator_enable(reg_unifi->reg_gpo1); + if (reg_unifi->reg_gpo2) + regulator_enable(reg_unifi->reg_gpo2); + + if (plat_data->enable) + plat_data->enable(1); + + if (reg_unifi->reg_1v5_ana_bb) { + regulator_set_voltage(reg_unifi->reg_1v5_ana_bb, + 1500000, 1500000); + regulator_enable(reg_unifi->reg_1v5_ana_bb); + } + if (reg_unifi->reg_vdd_vpa) { + tmp = regulator_get_voltage(reg_unifi->reg_vdd_vpa); + if (tmp < 3000000 || tmp > 3600000) + regulator_set_voltage(reg_unifi->reg_vdd_vpa, + 3000000, 3000000); + regulator_enable(reg_unifi->reg_vdd_vpa); + } + /* WL_1V5DD should come on last, 10ms after other supplies */ + msleep(10); + if (reg_unifi->reg_1v5_dd) { + regulator_set_voltage(reg_unifi->reg_1v5_dd, + 1500000, 1500000); + regulator_enable(reg_unifi->reg_1v5_dd); + } + msleep(10); +} + +/* + * --------------------------------------------------------------------------- + * + * Turn off the power of WIFI card + * + * --------------------------------------------------------------------------- + */ +static void fs_unifi_power_off(void) +{ + struct regulator_unifi *reg_unifi; + + reg_unifi = plat_data->priv; + if (reg_unifi->reg_1v5_dd) + regulator_disable(reg_unifi->reg_1v5_dd); + if (reg_unifi->reg_vdd_vpa) + regulator_disable(reg_unifi->reg_vdd_vpa); + + if (reg_unifi->reg_1v5_ana_bb) + regulator_disable(reg_unifi->reg_1v5_ana_bb); + + if (plat_data->enable) + plat_data->enable(0); + + if (reg_unifi->reg_gpo2) + regulator_disable(reg_unifi->reg_gpo2); + + if (reg_unifi->reg_gpo1) + regulator_disable(reg_unifi->reg_gpo1); +} + +/* This should be made conditional on being slot 2 too - so we can + * use a plug in card in slot 1 + */ +int fs_sdio_hard_reset(struct sdio_dev *fdev) +{ + return 0; +} +EXPORT_SYMBOL(fs_sdio_hard_reset); + +static const struct sdio_device_id fs_sdio_ids[] = { + {SDIO_DEVICE(0x032a, 0x0001)}, + { /* end: all zeroes */ }, +}; + +static struct sdio_driver sdio_unifi_driver = { + .name = "fs_unifi", + .probe = fs_sdio_probe, + .remove = fs_sdio_remove, + .id_table = fs_sdio_ids, + .drv = { + .suspend = fs_sdio_suspend, + .resume = fs_sdio_resume, + } +}; + +int fs_sdio_register_driver(struct fs_driver *driver) +{ + int ret, retry; + + /* Switch us on, sdio device may exist if power is on by default. */ + plat_data->hardreset(0); + if (available_sdio_dev) + mxc_mmc_force_detect(plat_data->host_id); + /* Wait for card removed */ + for (retry = 0; retry < 100; retry++) { + if (!available_sdio_dev) + break; + msleep(100); + } + if (retry == 100) + printk(KERN_ERR "fs_sdio_register_driver: sdio device exists, " + "timeout for card removed"); + fs_unifi_power_on(); + plat_data->hardreset(1); + msleep(500); + mxc_mmc_force_detect(plat_data->host_id); + for (retry = 0; retry < 100; retry++) { + if (available_sdio_dev) + break; + msleep(50); + } + if (retry == 100) + printk(KERN_ERR "fs_sdio_register_driver: Timeout waiting" + " for card added\n"); + /* Store the context to the device driver to the global */ + available_driver = driver; + + /* + * If available_sdio_dev is not NULL, probe has been called, + * so pass the probe to the registered driver + */ + if (available_sdio_dev) { + /* Store the context to the new device driver */ + available_sdio_dev->driver = driver; + + printk(KERN_INFO "fs_sdio_register_driver: Glue exists, add " + "device driver and register IRQ\n"); + driver->probe(available_sdio_dev); + + /* Register the IRQ handler to the SDIO IRQ. */ + sdio_claim_host(available_sdio_dev->func); + ret = sdio_claim_irq(available_sdio_dev->func, fs_sdio_irq); + sdio_release_host(available_sdio_dev->func); + if (ret) + return ret; + } + + return 0; +} +EXPORT_SYMBOL(fs_sdio_register_driver); + +void fs_sdio_unregister_driver(struct fs_driver *driver) +{ + /* + * If available_sdio_dev is not NULL, probe has been called, + * so pass the remove to the registered driver to clean up. + */ + if (available_sdio_dev) { + struct mmc_host *host = available_sdio_dev->func->card->host; + + printk(KERN_INFO "fs_sdio_unregister_driver: Glue exists, " + "unregister IRQ and remove device driver\n"); + + /* Unregister the IRQ handler first. */ + sdio_claim_host(available_sdio_dev->func); + sdio_release_irq(available_sdio_dev->func); + sdio_release_host(available_sdio_dev->func); + + driver->remove(available_sdio_dev); + + if (!available_sdio_dev->int_enabled) { + available_sdio_dev->int_enabled = 1; + host->ops->enable_sdio_irq(host, 1); + } + + /* Invalidate the context to the device driver */ + available_sdio_dev->driver = NULL; + } + + /* invalidate the context to the device driver to the global */ + available_driver = NULL; + /* Power down the UniFi */ + fs_unifi_power_off(); + +} +EXPORT_SYMBOL(fs_sdio_unregister_driver); + +static void fs_sdio_irq(struct sdio_func *func) +{ + struct sdio_dev *fdev = (struct sdio_dev *)sdio_get_drvdata(func); + if (fdev->driver) { + if (fdev->driver->card_int_handler) + fdev->driver->card_int_handler(fdev); + } +} + +#ifdef CONFIG_PM +static int fs_sdio_suspend(struct device *dev, pm_message_t state) +{ + struct sdio_dev *fdev = available_sdio_dev; + + /* Pass event to the registered driver. */ + if (fdev->driver) + if (fdev->driver->suspend) + fdev->driver->suspend(fdev, state); + + return 0; +} + +static int fs_sdio_resume(struct device *dev) +{ + struct sdio_dev *fdev = available_sdio_dev; + + /* Pass event to the registered driver. */ + if (fdev->driver) + if (fdev->driver->resume) + fdev->driver->resume(fdev); + + return 0; +} +#else +#define fs_sdio_suspend NULL +#define fs_sdio_resume NULL +#endif + +static int fs_sdio_probe(struct sdio_func *func, + const struct sdio_device_id *id) +{ + struct sdio_dev *fdev; + + /* Allocate our private context */ + fdev = kmalloc(sizeof(struct sdio_dev), GFP_KERNEL); + if (!fdev) + return -ENOMEM; + available_sdio_dev = fdev; + memset(fdev, 0, sizeof(struct sdio_dev)); + fdev->func = func; + fdev->vendor_id = id->vendor; + fdev->device_id = id->device; + fdev->max_blocksize = func->max_blksize; + fdev->int_enabled = 1; + spin_lock_init(&fdev->lock); + + /* Store our context in the MMC driver */ + printk(KERN_INFO "fs_sdio_probe: Add glue driver\n"); + sdio_set_drvdata(func, fdev); + + return 0; +} + +static void fs_sdio_remove(struct sdio_func *func) +{ + struct sdio_dev *fdev = (struct sdio_dev *)sdio_get_drvdata(func); + struct mmc_host *host = func->card->host; + + /* If there is a registered device driver, pass on the remove */ + if (fdev->driver) { + printk(KERN_INFO "fs_sdio_remove: Free IRQ and remove device " + "driver\n"); + /* Unregister the IRQ handler first. */ + sdio_claim_host(fdev->func); + sdio_release_irq(func); + sdio_release_host(fdev->func); + + fdev->driver->remove(fdev); + + if (!fdev->int_enabled) { + fdev->int_enabled = 1; + host->ops->enable_sdio_irq(host, 1); + } + } + + /* Unregister the card context from the MMC driver. */ + sdio_set_drvdata(func, NULL); + + /* Invalidate the global to our context. */ + available_sdio_dev = NULL; + kfree(fdev); +} + +static int fs_unifi_init(void) +{ + struct regulator_unifi *reg_unifi; + struct regulator *reg; + int err = 0; + + plat_data = get_unifi_plat_data(); + + if (!plat_data) + return -ENOENT; + + reg_unifi = kzalloc(sizeof(struct regulator_unifi), GFP_KERNEL); + if (!reg_unifi) + return -ENOMEM; + + if (plat_data->reg_gpo1) { + reg = regulator_get(NULL, plat_data->reg_gpo1); + if (!IS_ERR(reg)) + reg_unifi->reg_gpo1 = reg; + else { + err = -EINVAL; + goto err_reg_gpo1; + } + } + + if (plat_data->reg_gpo2) { + reg = regulator_get(NULL, plat_data->reg_gpo2); + if (!IS_ERR(reg)) + reg_unifi->reg_gpo2 = reg; + else { + err = -EINVAL; + goto err_reg_gpo2; + } + } + + if (plat_data->reg_1v5_ana_bb) { + reg = regulator_get(NULL, plat_data->reg_1v5_ana_bb); + if (!IS_ERR(reg)) + reg_unifi->reg_1v5_ana_bb = reg; + else { + err = -EINVAL; + goto err_reg_1v5_ana_bb; + } + } + + if (plat_data->reg_vdd_vpa) { + reg = regulator_get(NULL, plat_data->reg_vdd_vpa); + if (!IS_ERR(reg)) + reg_unifi->reg_vdd_vpa = reg; + else { + err = -EINVAL; + goto err_reg_vdd_vpa; + } + } + + if (plat_data->reg_1v5_dd) { + reg = regulator_get(NULL, plat_data->reg_1v5_dd); + if (!IS_ERR(reg)) + reg_unifi->reg_1v5_dd = reg; + else { + err = -EINVAL; + goto err_reg_1v5_dd; + } + } + plat_data->priv = reg_unifi; + return 0; + +err_reg_1v5_dd: + if (reg_unifi->reg_vdd_vpa) + regulator_put(reg_unifi->reg_vdd_vpa); +err_reg_vdd_vpa: + if (reg_unifi->reg_1v5_ana_bb) + regulator_put(reg_unifi->reg_1v5_ana_bb); +err_reg_1v5_ana_bb: + if (reg_unifi->reg_gpo2) + regulator_put(reg_unifi->reg_gpo2); +err_reg_gpo2: + if (reg_unifi->reg_gpo1) + regulator_put(reg_unifi->reg_gpo1); +err_reg_gpo1: + kfree(reg_unifi); + return err; +} + +int fs_unifi_remove(void) +{ + struct regulator_unifi *reg_unifi; + + reg_unifi = plat_data->priv; + plat_data->priv = NULL; + + if (reg_unifi->reg_1v5_dd) + regulator_put(reg_unifi->reg_1v5_dd); + if (reg_unifi->reg_vdd_vpa) + regulator_put(reg_unifi->reg_vdd_vpa); + + if (reg_unifi->reg_1v5_ana_bb) + regulator_put(reg_unifi->reg_1v5_ana_bb); + + if (reg_unifi->reg_gpo2) + regulator_put(reg_unifi->reg_gpo2); + + if (reg_unifi->reg_gpo1) + regulator_put(reg_unifi->reg_gpo1); + + kfree(reg_unifi); + return 0; +} + +/* Module init and exit, register and unregister to the SDIO/MMC driver */ +static int __init fs_sdio_init(void) +{ + int err; + + printk(KERN_INFO "Freescale: Register to MMC/SDIO driver\n"); + /* Sleep a bit - otherwise if the mmc subsystem has just started, it + * will allow us to register, then immediatly remove us! + */ + msleep(10); + err = fs_unifi_init(); + if (err) { + printk(KERN_ERR "Error: fs_unifi_init failed!\n"); + return err; + } + err = sdio_register_driver(&sdio_unifi_driver); + if (err) { + printk(KERN_ERR "Error: register sdio_unifi_driver failed!\n"); + fs_unifi_remove(); + } + return err; +} + +module_init(fs_sdio_init); + +static void __exit fs_sdio_exit(void) +{ + printk(KERN_INFO "Freescale: Unregister from MMC/SDIO driver\n"); + sdio_unregister_driver(&sdio_unifi_driver); + fs_unifi_remove(); +} + +module_exit(fs_sdio_exit); + +MODULE_DESCRIPTION("Freescale SDIO glue driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/card/unifi_fs/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mmc/card/unifi_fs/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_SDIO_UNIFI_FS) = unifi_fs.o +unifi_fs-objs = fs_lx.o --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/mx_sdhci.h +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/mx_sdhci.h @@ -0,0 +1,276 @@ +/* + * linux/drivers/mmc/host/mx_sdhci.h - Secure Digital Host + * Controller Interface driver + * + * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +/* + * Controller registers + */ + +#define SDHCI_DMA_ADDRESS 0x00 + +#define SDHCI_BLOCK_SIZE 0x04 +#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 13) | (blksz & 0x1FFF)) + +#define SDHCI_BLOCK_COUNT 0x04 + +#define SDHCI_ARGUMENT 0x08 + +#define SDHCI_TRANSFER_MODE 0x0C +#define SDHCI_TRNS_DMA 0x00000001 +#define SDHCI_TRNS_BLK_CNT_EN 0x00000002 +#define SDHCI_TRNS_ACMD12 0x00000004 +#define SDHCI_TRNS_READ 0x00000010 +#define SDHCI_TRNS_MULTI 0x00000020 +#define SDHCI_TRNS_DPSEL 0x00200000 +#define SDHCI_TRNS_MASK 0xFFFF0000 + +#define SDHCI_COMMAND 0x0E +#define SDHCI_CMD_RESP_MASK 0x03 +#define SDHCI_CMD_CRC 0x08 +#define SDHCI_CMD_INDEX 0x10 +#define SDHCI_CMD_DATA 0x20 + +#define SDHCI_CMD_RESP_NONE 0x00 +#define SDHCI_CMD_RESP_LONG 0x01 +#define SDHCI_CMD_RESP_SHORT 0x02 +#define SDHCI_CMD_RESP_SHORT_BUSY 0x03 + +#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) << 16 + +#define SDHCI_RESPONSE 0x10 + +#define SDHCI_BUFFER 0x20 + +#define SDHCI_PRESENT_STATE 0x24 +#define SDHCI_CMD_INHIBIT 0x00000001 +#define SDHCI_DATA_INHIBIT 0x00000002 +#define SDHCI_DATA_ACTIVE 0x00000004 +#define SDHCI_DOING_WRITE 0x00000100 +#define SDHCI_DOING_READ 0x00000200 +#define SDHCI_SPACE_AVAILABLE 0x00000400 +#define SDHCI_DATA_AVAILABLE 0x00000800 +#define SDHCI_CARD_PRESENT 0x00010000 +#define SDHCI_WRITE_PROTECT 0x00080000 +#define SDHCI_DAT0_IDLE 0x01000000 +#define SDHCI_CARD_INT_MASK 0x0E000000 +#define SDHCI_CARD_INT_ID 0x0C000000 + +#define SDHCI_HOST_CONTROL 0x28 +#define SDHCI_CTRL_LED 0x00000001 +#define SDHCI_CTRL_4BITBUS 0x00000002 +#define SDHCI_CTRL_8BITBUS 0x00000004 +#define SDHCI_CTRL_HISPD 0x00000004 +#define SDHCI_CTRL_DMA_MASK 0x18 +#define SDHCI_CTRL_SDMA 0x00 +#define SDHCI_CTRL_ADMA1 0x08 +#define SDHCI_CTRL_ADMA32 0x10 +#define SDHCI_CTRL_ADMA64 0x18 +#define SDHCI_CTRL_D3CD 0x00000008 +#define SDHCI_CTRL_ADMA 0x00000100 +/* wake up control */ +#define SDHCI_CTRL_WECINS 0x04000000 + +#define SDHCI_POWER_CONTROL 0x29 +#define SDHCI_POWER_ON 0x01 +#define SDHCI_POWER_180 0x0A +#define SDHCI_POWER_300 0x0C +#define SDHCI_POWER_330 0x0E + +#define SDHCI_BLOCK_GAP_CONTROL 0x2A + +#define SDHCI_WAKE_UP_CONTROL 0x2B + +#define SDHCI_CLOCK_CONTROL 0x2C +#define SDHCI_DIVIDER_SHIFT 8 +#define SDHCI_CLOCK_SD_EN 0x00000008 +#define SDHCI_CLOCK_PER_EN 0x00000004 +#define SDHCI_CLOCK_HLK_EN 0x00000002 +#define SDHCI_CLOCK_IPG_EN 0x00000001 +#define SDHCI_CLOCK_MASK 0x0000FFFF + +#define SDHCI_TIMEOUT_CONTROL 0x2E + +#define SDHCI_SOFTWARE_RESET 0x2F +#define SDHCI_RESET_ALL 0x01 +#define SDHCI_RESET_CMD 0x02 +#define SDHCI_RESET_DATA 0x04 + +#define SDHCI_INT_STATUS 0x30 +#define SDHCI_INT_ENABLE 0x34 +#define SDHCI_SIGNAL_ENABLE 0x38 +#define SDHCI_INT_RESPONSE 0x00000001 +#define SDHCI_INT_DATA_END 0x00000002 +#define SDHCI_INT_DMA_END 0x00000008 +#define SDHCI_INT_SPACE_AVAIL 0x00000010 +#define SDHCI_INT_DATA_AVAIL 0x00000020 +#define SDHCI_INT_CARD_INSERT 0x00000040 +#define SDHCI_INT_CARD_REMOVE 0x00000080 +#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_ERROR 0x00008000 +#define SDHCI_INT_TIMEOUT 0x00010000 +#define SDHCI_INT_CRC 0x00020000 +#define SDHCI_INT_END_BIT 0x00040000 +#define SDHCI_INT_INDEX 0x00080000 +#define SDHCI_INT_DATA_TIMEOUT 0x00100000 +#define SDHCI_INT_DATA_CRC 0x00200000 +#define SDHCI_INT_DATA_END_BIT 0x00400000 +#define SDHCI_INT_BUS_POWER 0x00800000 +#define SDHCI_INT_ACMD12ERR 0x01000000 +#define SDHCI_INT_ADMA_ERROR 0x10000000 + +#define SDHCI_INT_NORMAL_MASK 0x00007FFF +#define SDHCI_INT_ERROR_MASK 0xFFFF8000 + +#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ + SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) +#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ + SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ + SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR) +#define SDHCI_INT_DATA_RE_MASK (SDHCI_INT_DMA_END | \ + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL) + +#define SDHCI_ACMD12_ERR 0x3C + +/* 3E-3F reserved */ + +#define SDHCI_CAPABILITIES 0x40 +#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F +#define SDHCI_TIMEOUT_CLK_SHIFT 0 +#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 +#define SDHCI_CLOCK_BASE_MASK 0x00003F00 +#define SDHCI_CLOCK_BASE_SHIFT 8 +#define SDHCI_MAX_BLOCK_MASK 0x00030000 +#define SDHCI_MAX_BLOCK_SHIFT 16 +#define SDHCI_CAN_DO_ADMA2 0x00080000 +#define SDHCI_CAN_DO_ADMA1 0x00100000 +#define SDHCI_CAN_DO_HISPD 0x00200000 +#define SDHCI_CAN_DO_DMA 0x00400000 +#define SDHCI_CAN_VDD_330 0x01000000 +#define SDHCI_CAN_VDD_300 0x02000000 +#define SDHCI_CAN_VDD_180 0x04000000 +#define SDHCI_CAN_64BIT 0x10000000 + +/* 44-47 reserved for more caps */ +#define SDHCI_WML 0x44 +#define SDHCI_WML_4_WORDS 0x00040004 +#define SDHCI_WML_16_WORDS 0x00100010 +#define SDHCI_WML_64_WORDS 0x00400040 +#define SDHCI_WML_128_WORDS 0x00800080 + +#define SDHCI_MAX_CURRENT 0x48 + +/* 4C-4F reserved for more max current */ + +#define SDHCI_SET_ACMD12_ERROR 0x50 +#define SDHCI_SET_INT_ERROR 0x52 + +#define SDHCI_ADMA_ERROR 0x54 + +/* 55-57 reserved */ + +#define SDHCI_ADMA_ADDRESS 0x58 + +/* 60-FB reserved */ + +/* ADMA Addr Descriptor Attribute Filed */ +enum { + FSL_ADMA_DES_ATTR_VALID = 0x01, + FSL_ADMA_DES_ATTR_END = 0x02, + FSL_ADMA_DES_ATTR_INT = 0x04, + FSL_ADMA_DES_ATTR_SET = 0x10, + FSL_ADMA_DES_ATTR_TRAN = 0x20, + FSL_ADMA_DES_ATTR_LINK = 0x30, +}; + +#define SDHCI_HOST_VERSION 0xFC +#define SDHCI_VENDOR_VER_MASK 0xFF00 +#define SDHCI_VENDOR_VER_SHIFT 8 +#define SDHCI_SPEC_VER_MASK 0x00FF +#define SDHCI_SPEC_VER_SHIFT 0 +#define SDHCI_SPEC_100 0 +#define SDHCI_SPEC_200 1 +#define ESDHC_VENDOR_V22 0x12 + +struct sdhci_chip; + +struct sdhci_host { + struct sdhci_chip *chip; + struct mmc_host *mmc; /* MMC structure */ + +#ifdef CONFIG_LEDS_CLASS + struct led_classdev led; /* LED control */ +#endif + + spinlock_t lock; /* Mutex */ + + int init_flag; /* Host has been initialized */ + int flags; /* Host attributes */ +#define SDHCI_USE_DMA (1<<0) /* Host is DMA capable */ +#define SDHCI_REQ_USE_DMA (1<<1) /* Use DMA for this req. */ +#define SDHCI_USE_EXTERNAL_DMA (1<<2) /* Use the External DMA */ +#define SDHCI_CD_PRESENT (1<<8) /* CD present */ +#define SDHCI_WP_ENABLED (1<<9) /* Write protect */ +#define SDHCI_CD_TIMEOUT (1<<10) /* cd timer is expired */ + + unsigned int max_clk; /* Max possible freq (MHz) */ + unsigned int min_clk; /* Min possible freq (MHz) */ + unsigned int timeout_clk; /* Timeout freq (KHz) */ + + unsigned int clock; /* Current clock (MHz) */ + unsigned short power; /* Current voltage */ + struct regulator *regulator_mmc; /*! Regulator */ + + struct mmc_request *mrq; /* Current request */ + struct mmc_command *cmd; /* Current command */ + struct mmc_data *data; /* Current data request */ + unsigned int data_early:1; /* Data finished before cmd */ + + unsigned int id; /* Id for SD/MMC block */ + int mode; /* SD/MMC mode */ + int dma; /* DMA channel number. */ + unsigned int dma_size; /* Number of Bytes in DMA */ + unsigned int dma_len; /* Length of the s-g list */ + unsigned int dma_dir; /* DMA transfer direction */ + + struct scatterlist *cur_sg; /* We're working on this */ + int num_sg; /* Entries left */ + int offset; /* Offset into current sg */ + int remain; /* Bytes left in current */ + + struct resource *res; /* IO map memory */ + int irq; /* Device IRQ */ + int detect_irq; /* Card Detect IRQ number. */ + int sdio_enable; /* sdio interrupt enable number. */ + struct clk *clk; /* Clock id */ + int bar; /* PCI BAR index */ + unsigned long addr; /* Bus address */ + void __iomem *ioaddr; /* Mapped address */ + + struct tasklet_struct card_tasklet; /* Tasklet structures */ + struct tasklet_struct finish_tasklet; + struct work_struct cd_wq; /* card detection work queue */ + /* Platform specific data */ + struct mxc_mmc_platform_data *plat_data; + + struct timer_list timer; /* Timer for timeouts */ + struct timer_list cd_timer; /* Timer for cd */ +}; + +struct sdhci_chip { + struct platform_device *pdev; + + unsigned long quirks; + + int num_slots; /* Slots on controller */ + struct sdhci_host *hosts[0]; /* Pointers to hosts */ +}; --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/pxamci.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/pxamci.c @@ -694,14 +694,14 @@ if (mmc) { struct pxamci_host *host = mmc_priv(mmc); + mmc_remove_host(mmc); + if (host->vcc) regulator_put(host->vcc); if (host->pdata && host->pdata->exit) host->pdata->exit(&pdev->dev, mmc); - mmc_remove_host(mmc); - pxamci_stop_clock(host); writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD| END_CMD_RES|PRG_DONE|DATA_TRAN_DONE, --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/Kconfig @@ -250,6 +250,51 @@ If unsure, or if your system has no SPI master driver, say N. +config MMC_MXC + tristate "Freescale MXC Multimedia Card Interface support" + depends on ARCH_MXC && MMC + help + This selects the Freescale MXC Multimedia card Interface. + If you have a MXC platform with a Multimedia Card slot, + say Y or M here. + +config MMC_IMX_ESDHCI + tristate "Freescale i.MX Secure Digital Host Controller Interface support" + depends on ARCH_MXC && MMC + help + This selects the Freescale i.MX Multimedia card Interface. + If you have a i.MX platform with a Multimedia Card slot, + say Y or M here. + + If unsure, say N. + +config MMC_IMX_ESDHCI_SELECT2 + bool "Enable second ESDHCI port" + depends on MMC_IMX_ESDHCI && ARCH_MX25 + default n + help + Enable the second ESDHC port + +config MMC_IMX_ESDHCI_PIO_MODE + bool "Freescale i.MX Secure Digital Host Controller Interface PIO mode" + depends on MMC_IMX_ESDHC != n + default n + help + This set the Freescale i.MX Multimedia card Interface to PIO mode. + If you have a i.MX platform with a Multimedia Card slot, + and want test it with PIO mode. + say Y here. + + If unsure, say N. + +config MMC_STMP3XXX + tristate "STMP37xx/378x MMC support" + depends on MMC && ARCH_STMP3XXX + help + Select Y if you would like to access STMP37xx/378x MMC support. + + If unsure, say N. + config MMC_S3C tristate "Samsung S3C SD/MMC Card Interface support" depends on ARCH_S3C2410 @@ -267,6 +312,7 @@ help Say Y here if your Notebook reports a Ricoh Bay1Controller PCMCIA card whenever you insert a MMC or SD card into the card slot. + say Y or M here. To compile this driver as a module, choose M here: the module will be called sdricoh_cs. --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/mxc_mmc.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/mxc_mmc.c @@ -0,0 +1,1530 @@ +/* + * linux/drivers/mmc/host/mxc_mmc.c - Freescale MXC/i.MX MMC driver + * + * based on imxmmc.c + * Copyright (C) 2004 Sascha Hauer, Pengutronix + * + * derived from pxamci.c by Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_mmc.c + * + * @brief Driver for the Freescale Semiconductor MXC SDHC modules. + * + * This driver code is based on imxmmc.c, by Sascha Hauer, + * Pengutronix . This driver supports both Secure Digital + * Host Controller modules (SDHC1 and SDHC2) of MXC. SDHC is also referred as + * MMC/SD controller. This code is not tested for SD cards. + * + * @ingroup MMC_SD + */ + +/* + * Include Files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "mxc_mmc.h" + +#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) + +/* + * This define is used to test the driver without using DMA + */ +#define MXC_MMC_DMA_ENABLE + +/*! + * Maxumum length of s/g list, only length of 1 is currently supported + */ +#define NR_SG 1 + +#ifdef CONFIG_MMC_DEBUG +static void dump_cmd(struct mmc_command *cmd) +{ + printk(KERN_INFO "%s: CMD: opcode: %d ", DRIVER_NAME, cmd->opcode); + printk(KERN_INFO "arg: 0x%08x ", cmd->arg); + printk(KERN_INFO "flags: 0x%08x\n", cmd->flags); +} + +static void dump_status(const char *func, int sts) +{ + unsigned int bitset; + printk(KERN_INFO "%s:status: ", func); + while (sts) { + /* Find the next bit set */ + bitset = sts & ~(sts - 1); + switch (bitset) { + case STATUS_CARD_INSERTION: + printk(KERN_INFO "CARD_INSERTION|"); + break; + case STATUS_CARD_REMOVAL: + printk(KERN_INFO "CARD_REMOVAL |"); + break; + case STATUS_YBUF_EMPTY: + printk(KERN_INFO "YBUF_EMPTY |"); + break; + case STATUS_XBUF_EMPTY: + printk(KERN_INFO "XBUF_EMPTY |"); + break; + case STATUS_YBUF_FULL: + printk(KERN_INFO "YBUF_FULL |"); + break; + case STATUS_XBUF_FULL: + printk(KERN_INFO "XBUF_FULL |"); + break; + case STATUS_BUF_UND_RUN: + printk(KERN_INFO "BUF_UND_RUN |"); + break; + case STATUS_BUF_OVFL: + printk(KERN_INFO "BUF_OVFL |"); + break; + case STATUS_READ_OP_DONE: + printk(KERN_INFO "READ_OP_DONE |"); + break; + case STATUS_WR_CRC_ERROR_CODE_MASK: + printk(KERN_INFO "WR_CRC_ERROR_CODE |"); + break; + case STATUS_READ_CRC_ERR: + printk(KERN_INFO "READ_CRC_ERR |"); + break; + case STATUS_WRITE_CRC_ERR: + printk(KERN_INFO "WRITE_CRC_ERR |"); + break; + case STATUS_SDIO_INT_ACTIVE: + printk(KERN_INFO "SDIO_INT_ACTIVE |"); + break; + case STATUS_END_CMD_RESP: + printk(KERN_INFO "END_CMD_RESP |"); + break; + case STATUS_WRITE_OP_DONE: + printk(KERN_INFO "WRITE_OP_DONE |"); + break; + case STATUS_CARD_BUS_CLK_RUN: + printk(KERN_INFO "CARD_BUS_CLK_RUN |"); + break; + case STATUS_BUF_READ_RDY: + printk(KERN_INFO "BUF_READ_RDY |"); + break; + case STATUS_BUF_WRITE_RDY: + printk(KERN_INFO "BUF_WRITE_RDY |"); + break; + case STATUS_RESP_CRC_ERR: + printk(KERN_INFO "RESP_CRC_ERR |"); + break; + case STATUS_TIME_OUT_RESP: + printk(KERN_INFO "TIME_OUT_RESP |"); + break; + case STATUS_TIME_OUT_READ: + printk(KERN_INFO "TIME_OUT_READ |"); + break; + default: + printk(KERN_INFO "Invalid Status Register value0x%x\n", + bitset); + break; + } + sts &= ~bitset; + } + printk(KERN_INFO "\n"); +} +#endif + +/*! + * This structure is a way for the low level driver to define their own + * \b mmc_host structure. This structure includes the core \b mmc_host + * structure that is provided by Linux MMC/SD Bus protocol driver as an + * element and has other elements that are specifically required by this + * low-level driver. + */ +struct mxcmci_host { + /*! + * The mmc structure holds all the information about the device + * structure, current SDHC io bus settings, the current OCR setting, + * devices attached to this host, and so on. + */ + struct mmc_host *mmc; + + /*! + * This variable is used for locking the host data structure from + * multiple access. + */ + spinlock_t lock; + + /*! + * Resource structure, which will maintain base addresses and IRQs. + */ + struct resource *res; + + /*! + * Base address of SDHC, used in readl and writel. + */ + void *base; + + /*! + * SDHC IRQ number. + */ + int irq; + + /*! + * Card Detect IRQ number. + */ + int detect_irq; + + /*! + * Clock id to hold ipg_perclk. + */ + struct clk *clk; + /*! + * MMC mode. + */ + int mode; + + /*! + * DMA channel number. + */ + int dma; + + /*! + * Pointer to hold MMC/SD request. + */ + struct mmc_request *req; + + /*! + * Pointer to hold MMC/SD command. + */ + struct mmc_command *cmd; + + /*! + * Pointer to hold MMC/SD data. + */ + struct mmc_data *data; + + /*! + * Holds the number of bytes to transfer using DMA. + */ + unsigned int dma_size; + + /*! + * Value to store in Command and Data Control Register + * - currently unused + */ + unsigned int cmdat; + + /*! + * Regulator + */ + struct regulator *regulator_mmc; + + /*! + * Current vdd settting + */ + int current_vdd; + + /*! + * Power mode - currently unused + */ + unsigned int power_mode; + + /*! + * DMA address for scatter-gather transfers + */ + dma_addr_t sg_dma; + + /*! + * Length of the scatter-gather list + */ + unsigned int dma_len; + + /*! + * Holds the direction of data transfer. + */ + unsigned int dma_dir; + + /*! + * Id for MMC block. + */ + unsigned int id; + + /*! + * Note whether this driver has been suspended. + */ + unsigned int mxc_mmc_suspend_flag; + + /*! + * sdio_irq enable/disable ref count + */ + int sdio_irq_cnt; + + /*! + * Platform specific data + */ + struct mxc_mmc_platform_data *plat_data; +}; + +extern void gpio_sdhc_active(int module); +extern void gpio_sdhc_inactive(int module); + +#ifdef MXC_MMC_DMA_ENABLE +static void mxcmci_dma_irq(void *devid, int error, unsigned int cnt); +#endif +static int mxcmci_data_done(struct mxcmci_host *host, unsigned int stat); + +/* Wait count to start the clock */ +#define CMD_WAIT_CNT 100 + +#define MAX_HOST 10 +static struct mmc_host *hosts[MAX_HOST]; + +void mxc_mmc_force_detect(int id) +{ + if (id < MAX_HOST) + mmc_detect_change(hosts[id], msecs_to_jiffies(100)); +} + +EXPORT_SYMBOL(mxc_mmc_force_detect); + +/*! + This function sets the SDHC register to stop the clock and waits for the + * clock stop indication. + */ +static void mxcmci_stop_clock(struct mxcmci_host *host, bool wait) +{ + int wait_cnt = 0; + while (1) { + __raw_writel(STR_STP_CLK_STOP_CLK, + host->base + MMC_STR_STP_CLK); + + if (!wait) + break; + + wait_cnt = CMD_WAIT_CNT; + while (wait_cnt--) { + if (!(__raw_readl(host->base + MMC_STATUS) & + STATUS_CARD_BUS_CLK_RUN)) + break; + } + + if (!(__raw_readl(host->base + MMC_STATUS) & + STATUS_CARD_BUS_CLK_RUN)) + break; + } +} + +/*! + * This function sets the SDHC register to start the clock and waits for the + * clock start indication. When the clock starts SDHC module starts processing + * the command in CMD Register with arguments in ARG Register. + * + * @param host Pointer to MMC/SD host structure + * @param wait Boolean value to indicate whether to wait for the clock to start or come out instantly + */ +static void mxcmci_start_clock(struct mxcmci_host *host, bool wait) +{ + int wait_cnt; + +#ifdef CONFIG_MMC_DEBUG + dump_status(__FUNCTION__, __raw_readl(host->base + MMC_STATUS)); +#endif + + while (1) { + __raw_writel(STR_STP_CLK_START_CLK, + host->base + MMC_STR_STP_CLK); + if (!wait) + break; + + wait_cnt = CMD_WAIT_CNT; + while (wait_cnt--) { + if (__raw_readl(host->base + MMC_STATUS) & + STATUS_CARD_BUS_CLK_RUN) { + break; + } + } + + if (__raw_readl(host->base + MMC_STATUS) & + STATUS_CARD_BUS_CLK_RUN) { + break; + } + } +#ifdef CONFIG_MMC_DEBUG + dump_status(__FUNCTION__, __raw_readl(host->base + MMC_STATUS)); +#endif + pr_debug("%s:CLK_RATE: 0x%08x\n", DRIVER_NAME, + __raw_readl(host->base + MMC_CLK_RATE)); +} + +/*! + * This function resets the SDHC host. + * + * @param host Pointer to MMC/SD host structure + */ +static void mxcmci_softreset(struct mxcmci_host *host) +{ + /* reset sequence */ + __raw_writel(0x8, host->base + MMC_STR_STP_CLK); + __raw_writel(0x9, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x1, host->base + MMC_STR_STP_CLK); + __raw_writel(0x3f, host->base + MMC_CLK_RATE); + + __raw_writel(0xff, host->base + MMC_RES_TO); + __raw_writel(512, host->base + MMC_BLK_LEN); + __raw_writel(1, host->base + MMC_NOB); +} + +/*! + * This function is called to setup SDHC register for data transfer. + * The function allocates DMA buffers, configures the DMA channel. + * Start the DMA channel to transfer data. When DMA is not enabled this + * function set ups only Number of Block and Block Length registers. + * + * @param host Pointer to MMC/SD host structure + * @param data Pointer to MMC/SD data structure + */ +static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) +{ + unsigned int nob = data->blocks; + + if (data->flags & MMC_DATA_STREAM) { + nob = 0xffff; + } + + host->data = data; + + __raw_writel(nob, host->base + MMC_NOB); + __raw_writel(data->blksz, host->base + MMC_BLK_LEN); + + host->dma_size = data->blocks * data->blksz; + pr_debug("%s:Request bytes to transfer:%d\n", DRIVER_NAME, + host->dma_size); + +#ifdef MXC_MMC_DMA_ENABLE + if (host->dma_size <= (16 << host->mmc->ios.bus_width)) { + return; + } + + if (data->blksz & 0x3) { + printk(KERN_ERR + "mxc_mci: block size not multiple of 4 bytes\n"); + } + + if (data->flags & MMC_DATA_READ) { + host->dma_dir = DMA_FROM_DEVICE; + } else { + host->dma_dir = DMA_TO_DEVICE; + } + host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, + host->dma_dir); + + if (data->flags & MMC_DATA_READ) { + mxc_dma_sg_config(host->dma, data->sg, data->sg_len, + host->dma_size, MXC_DMA_MODE_READ); + } else { + mxc_dma_sg_config(host->dma, data->sg, data->sg_len, + host->dma_size, MXC_DMA_MODE_WRITE); + } +#endif +} + +/*! + * This function is called by \b mxcmci_request() function to setup the SDHC + * register to issue command. This function disables the card insertion and + * removal detection interrupt. + * + * @param host Pointer to MMC/SD host structure + * @param cmd Pointer to MMC/SD command structure + * @param cmdat Value to store in Command and Data Control Register + */ +static void mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, + unsigned int cmdat) +{ + WARN_ON(host->cmd != NULL); + host->cmd = cmd; + + switch (RSP_TYPE(mmc_resp_type(cmd))) { + case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6 */ + cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R1; + break; + case RSP_TYPE(MMC_RSP_R3): + cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R3; + break; + case RSP_TYPE(MMC_RSP_R2): + cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R2; + break; + default: + /* No Response required */ + break; + } + + if (cmd->opcode == MMC_GO_IDLE_STATE) { + cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */ + } + + if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { + cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; + } + + __raw_writel(cmd->opcode, host->base + MMC_CMD); + __raw_writel(cmd->arg, host->base + MMC_ARG); + + __raw_writel(cmdat, host->base + MMC_CMD_DAT_CONT); + + if (!(__raw_readl(host->base + MMC_STATUS) & STATUS_CARD_BUS_CLK_RUN)) + mxcmci_start_clock(host, true); +} + +/*! + * This function is called to complete the command request. + * This function enables insertion or removal interrupt. + * + * @param host Pointer to MMC/SD host structure + * @param req Pointer to MMC/SD command request structure + */ +static void mxcmci_finish_request(struct mxcmci_host *host, + struct mmc_request *req) +{ + + host->req = NULL; + host->cmd = NULL; + host->data = NULL; + + mmc_request_done(host->mmc, req); +} + +/*! + * This function is called when the requested command is completed. + * This function reads the response from the card and data if the command is for + * data transfer. This function checks for CRC error in response FIFO or + * data FIFO. + * + * @param host Pointer to MMC/SD host structure + * @param stat Content of SDHC Status Register + * + * @return This function returns 0 if there is no pending command, otherwise 1 + * always. + */ +static int mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) +{ + struct mmc_command *cmd = host->cmd; + struct mmc_data *data = host->data; + int i; + u32 a, b, c; + u32 temp_data; + unsigned int status; + unsigned long *buf; + u8 *buf8; + int no_of_bytes; + int no_of_words; + + if (!cmd) { + /* There is no command for completion */ + return 0; + } + + /* As this function finishes the command, initialize cmd to NULL */ + host->cmd = NULL; + + /* check for Time out errors */ + if (stat & STATUS_TIME_OUT_RESP) { + __raw_writel(STATUS_TIME_OUT_RESP, host->base + MMC_STATUS); + pr_debug("%s: CMD %d TIMEOUT\n", DRIVER_NAME, cmd->opcode); + cmd->error = -ETIMEDOUT; + /* + * Reinitialized the controller to clear the unknown + * error state. + */ + mxcmci_softreset(host); + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + __raw_writel(INT_CNTR_END_CMD_RES, host->base + MMC_INT_CNTR); + } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { + __raw_writel(STATUS_RESP_CRC_ERR, host->base + MMC_STATUS); + printk(KERN_ERR "%s: cmd %d CRC error\n", DRIVER_NAME, + cmd->opcode); + cmd->error = -EILSEQ; + /* + * Reinitialized the controller to clear the unknown + * error state. + */ + mxcmci_softreset(host); + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + __raw_writel(INT_CNTR_END_CMD_RES, host->base + MMC_INT_CNTR); + } + + /* Read response from the card */ + switch (RSP_TYPE(mmc_resp_type(cmd))) { + case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6 */ + a = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + b = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + c = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + cmd->resp[0] = a << 24 | b << 8 | c >> 8; + break; + case RSP_TYPE(MMC_RSP_R3): /* r3, r4 */ + a = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + b = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + c = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + cmd->resp[0] = a << 24 | b << 8 | c >> 8; + break; + case RSP_TYPE(MMC_RSP_R2): + for (i = 0; i < 4; i++) { + a = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + b = __raw_readl(host->base + MMC_RES_FIFO) & 0xffff; + cmd->resp[i] = a << 16 | b; + } + break; + default: + break; + } + + pr_debug("%s: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n", DRIVER_NAME, + cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); + + if (!host->data || cmd->error) { + /* complete the command */ + mxcmci_finish_request(host, host->req); + return 1; + } + + /* The command has a data transfer */ +#ifdef MXC_MMC_DMA_ENABLE + /* Use DMA if transfer size is greater than fifo size */ + if (host->dma_size > (16 << host->mmc->ios.bus_width)) { + mxc_dma_enable(host->dma); + return 1; + } +#endif + /* Use PIO tranfer of data */ + buf = (unsigned long *)sg_virt(data->sg); + buf8 = (u8 *) buf; + + /* calculate the number of bytes requested for transfer */ + no_of_bytes = data->blocks * data->blksz; + no_of_words = (no_of_bytes + 3) / 4; + pr_debug("no_of_words=%d\n", no_of_words); + + if (data->flags & MMC_DATA_READ) { + for (i = 0; i < no_of_words; i++) { + /* wait for buffers to be ready for read */ + while (!(__raw_readl(host->base + MMC_STATUS) & + (STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE))) ; + + pr_debug("status is 0x%x\n", + __raw_readl(host->base + MMC_STATUS)); + /* read 32 bit data */ + temp_data = __raw_readl(host->base + MMC_BUFFER_ACCESS); + if (SD_APP_SEND_SCR == cmd->opcode) { + pr_debug("CMD51 read out 0x%x\n", temp_data); + if (temp_data == 0xFFFFFFFF) + temp_data = 0; + } + if (no_of_bytes >= 4) { + *buf++ = temp_data; + no_of_bytes -= 4; + } else { + do { + *buf8++ = temp_data; + temp_data = temp_data >> 8; + } while (--no_of_bytes); + } + } + + /* wait for read operation completion bit */ + while (!(__raw_readl(host->base + MMC_STATUS) & + STATUS_READ_OP_DONE)) ; + + /* check for time out and CRC errors */ + status = __raw_readl(host->base + MMC_STATUS); + if (status & STATUS_TIME_OUT_READ) { + printk(KERN_ERR "%s: Read time out occurred\n", + DRIVER_NAME); + data->error = -ETIMEDOUT; + __raw_writel(STATUS_TIME_OUT_READ, + host->base + MMC_STATUS); + /* + * Reinitialized the controller to clear the unknown + * error state. + */ + mxcmci_softreset(host); + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + __raw_writel(INT_CNTR_END_CMD_RES, + host->base + MMC_INT_CNTR); + } else if (status & STATUS_READ_CRC_ERR) { + printk(KERN_ERR "%s: Read CRC error occurred\n", + DRIVER_NAME); + if (SD_APP_SEND_SCR != cmd->opcode) + data->error = -EILSEQ; + __raw_writel(STATUS_READ_CRC_ERR, + host->base + MMC_STATUS); + /* + * Reinitialized the controller to clear the unknown + * error state. + */ + mxcmci_softreset(host); + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + __raw_writel(INT_CNTR_END_CMD_RES, + host->base + MMC_INT_CNTR); + } + __raw_writel(STATUS_READ_OP_DONE, host->base + MMC_STATUS); + + pr_debug("%s: Read %u words\n", DRIVER_NAME, i); + } else { + for (i = 0; i < no_of_words; i++) { + + /* wait for buffers to be ready for write */ + while (!(__raw_readl(host->base + MMC_STATUS) & + STATUS_BUF_WRITE_RDY)) ; + + /* write 32 bit data */ + __raw_writel(*buf++, host->base + MMC_BUFFER_ACCESS); + if (__raw_readl(host->base + MMC_STATUS) & + STATUS_WRITE_OP_DONE) { + break; + } + } + + /* wait for write operation completion bit */ + while (!(__raw_readl(host->base + MMC_STATUS) & + STATUS_WRITE_OP_DONE)) ; + + /* check for CRC errors */ + status = __raw_readl(host->base + MMC_STATUS); + if (status & STATUS_WRITE_CRC_ERR) { + printk(KERN_ERR "%s: Write CRC error occurred\n", + DRIVER_NAME); + data->error = -EILSEQ; + __raw_writel(STATUS_WRITE_CRC_ERR, + host->base + MMC_STATUS); + } + __raw_writel(STATUS_WRITE_OP_DONE, host->base + MMC_STATUS); + pr_debug("%s: Written %u words\n", DRIVER_NAME, i); + } + + /* complete the data transfer request */ + mxcmci_data_done(host, status); + + return 1; +} + +/*! + * This function is called when the data transfer is completed either by DMA + * or by core. This function is called to clean up the DMA buffer and to send + * STOP transmission command for commands to transfer data. This function + * completes request issued by the MMC/SD core driver. + * + * @param host pointer to MMC/SD host structure. + * @param stat content of SDHC Status Register + * + * @return This function returns 0 if no data transfer otherwise return 1 + * always. + */ +static int mxcmci_data_done(struct mxcmci_host *host, unsigned int stat) +{ + struct mmc_data *data = host->data; + + if (!data) { + return 0; + } +#ifdef MXC_MMC_DMA_ENABLE + if (host->dma_size > (16 << host->mmc->ios.bus_width)) { + dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, + host->dma_dir); + } +#endif + if (__raw_readl(host->base + MMC_STATUS) & STATUS_ERR_MASK) { + printk(KERN_ERR "%s: request failed. status: 0x%08x\n", + DRIVER_NAME, __raw_readl(host->base + MMC_STATUS)); + } + + host->data = NULL; + data->bytes_xfered = host->dma_size; + + if (host->req->stop && !(data->error)) { + mxcmci_stop_clock(host, true); + mxcmci_start_cmd(host, host->req->stop, 0); + } else { + mxcmci_finish_request(host, host->req); + } + + return 1; +} + +/*! + * GPIO interrupt service routine registered to handle the SDHC interrupts. + * This interrupt routine handles card insertion and card removal interrupts. + * + * @param irq the interrupt number + * @param devid driver private data + * @param regs holds a snapshot of the processor's context before the + * processor entered the interrupt code + * + * @return The function returns \b IRQ_RETVAL(1) + */ +static irqreturn_t mxcmci_gpio_irq(int irq, void *devid) +{ + struct mxcmci_host *host = devid; + int card_gpio_status = host->plat_data->status(host->mmc->parent); + + pr_debug("%s: MMC%d status=%d %s\n", DRIVER_NAME, host->id, + card_gpio_status, card_gpio_status ? "removed" : "inserted"); + + if (card_gpio_status == host->plat_data->card_inserted_state) { + /* + * Reinitialized the controller to clear the unknown + * error state when a card is inserted. + */ + mxcmci_softreset(host); + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + __raw_writel(INT_CNTR_END_CMD_RES, host->base + MMC_INT_CNTR); + + mmc_detect_change(host->mmc, msecs_to_jiffies(100)); + } else { + mxcmci_cmd_done(host, STATUS_TIME_OUT_RESP); + mmc_detect_change(host->mmc, msecs_to_jiffies(50)); + } + + do { + card_gpio_status = host->plat_data->status(host->mmc->parent); + if (card_gpio_status) { + set_irq_type(host->detect_irq, IRQF_TRIGGER_FALLING); + } else { + set_irq_type(host->detect_irq, IRQF_TRIGGER_RISING); + } + } while (card_gpio_status != + host->plat_data->status(host->mmc->parent)); + + return IRQ_HANDLED; +} + +/*! + * Interrupt service routine registered to handle the SDHC interrupts. + * This interrupt routine handles end of command, card insertion and + * card removal interrupts. If the interrupt is card insertion or removal then + * inform the MMC/SD core driver to detect the change in physical connections. + * If the command is END_CMD_RESP read the Response FIFO. If DMA is not enabled + * and data transfer is associated with the command then read or write the data + * from or to the BUFFER_ACCESS FIFO. + * + * @param irq the interrupt number + * @param devid driver private data + * @param regs holds a snapshot of the processor's context before the + * processor entered the interrupt code + * + * @return The function returns \b IRQ_RETVAL(1) if interrupt was handled, + * returns \b IRQ_RETVAL(0) if the interrupt was not handled. + */ +static irqreturn_t mxcmci_irq(int irq, void *devid) +{ + struct mxcmci_host *host = devid; + struct mmc_data *data = host->data; + unsigned int status = 0; + u32 intctrl; + + if (host->mxc_mmc_suspend_flag == 1) { + clk_enable(host->clk); + } + + status = __raw_readl(host->base + MMC_STATUS); + pr_debug("MXC MMC IRQ status is 0x%x.\n", status); +#ifdef CONFIG_MMC_DEBUG + dump_status(__FUNCTION__, status); +#endif + if (status & STATUS_END_CMD_RESP) { + __raw_writel(STATUS_END_CMD_RESP, host->base + MMC_STATUS); + mxcmci_cmd_done(host, status); + } +#ifdef MXC_MMC_DMA_ENABLE + /* + * If read length < fifo length, STATUS_END_CMD_RESP and + * STATUS_READ_OP_DONE may come together. In this case, it's using PIO + * mode, we ignore STATUS_READ_OP_DONE. + */ + if ((status & (STATUS_WRITE_OP_DONE | STATUS_READ_OP_DONE)) && + !(status & STATUS_END_CMD_RESP)) { + pr_debug(KERN_INFO "MXC MMC IO OP DONE INT.\n"); + intctrl = __raw_readl(host->base + MMC_INT_CNTR); + __raw_writel((~(INT_CNTR_WRITE_OP_DONE | INT_CNTR_READ_OP_DONE) + & intctrl), host->base + MMC_INT_CNTR); + + pr_debug("%s:READ/WRITE OPERATION DONE\n", DRIVER_NAME); + /* check for time out and CRC errors */ + status = __raw_readl(host->base + MMC_STATUS); + if (status & STATUS_READ_OP_DONE) { + if (status & STATUS_TIME_OUT_READ) { + pr_debug("%s: Read time out occurred\n", + DRIVER_NAME); + data->error = -ETIMEDOUT; + __raw_writel(STATUS_TIME_OUT_READ, + host->base + MMC_STATUS); + } else if (status & STATUS_READ_CRC_ERR) { + pr_debug("%s: Read CRC error occurred\n", + DRIVER_NAME); + data->error = -EILSEQ; + __raw_writel(STATUS_READ_CRC_ERR, + host->base + MMC_STATUS); + } + __raw_writel(STATUS_READ_OP_DONE, + host->base + MMC_STATUS); + } + + /* check for CRC errors */ + if (status & STATUS_WRITE_OP_DONE) { + if (status & STATUS_WRITE_CRC_ERR) { + printk(KERN_ERR + "%s: Write CRC error occurred\n", + DRIVER_NAME); + data->error = -EILSEQ; + __raw_writel(STATUS_WRITE_CRC_ERR, + host->base + MMC_STATUS); + } + __raw_writel(STATUS_WRITE_OP_DONE, + host->base + MMC_STATUS); + } + + mxcmci_data_done(host, status); + } +#endif + status = __raw_readl(host->base + MMC_STATUS); + intctrl = __raw_readl(host->base + MMC_INT_CNTR); + if ((status & STATUS_SDIO_INT_ACTIVE) + && (intctrl & INT_CNTR_SDIO_IRQ_EN)) { + __raw_writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_STATUS); + + /*Here we do not handle the sdio interrupt to client driver + if the host is in suspend state */ + if (host->mxc_mmc_suspend_flag == 0) { + mmc_signal_sdio_irq(host->mmc); + } + } + return IRQ_HANDLED; +} + +/*! + * This function is called by MMC/SD Bus Protocol driver to issue a MMC + * and SD commands to the SDHC. + * + * @param mmc Pointer to MMC/SD host structure + * @param req Pointer to MMC/SD command request structure + */ +static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req) +{ + struct mxcmci_host *host = mmc_priv(mmc); + /* Holds the value of Command and Data Control Register */ + unsigned long cmdat; + + WARN_ON(host->req != NULL); + + host->req = req; +#ifdef CONFIG_MMC_DEBUG + dump_cmd(req->cmd); + dump_status(__FUNCTION__, __raw_readl(host->base + MMC_STATUS)); +#endif + + cmdat = 0; + if (req->data) { + mxcmci_setup_data(host, req->data); + + cmdat |= CMD_DAT_CONT_DATA_ENABLE; + + if (req->data->flags & MMC_DATA_WRITE) { + cmdat |= CMD_DAT_CONT_WRITE; + } + if (req->data->flags & MMC_DATA_STREAM) { + printk(KERN_ERR + "MXC MMC does not support stream mode\n"); + } + } + mxcmci_start_cmd(host, req->cmd, cmdat); +} + +/*! + * This function is called by MMC/SD Bus Protocol driver to change the clock + * speed of MMC or SD card + * + * @param mmc Pointer to MMC/SD host structure + * @param ios Pointer to MMC/SD I/O type structure + */ +static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct mxcmci_host *host = mmc_priv(mmc); + /*This variable holds the value of clock prescaler */ + int prescaler; + int clk_rate = clk_get_rate(host->clk); + int voltage = 0; +#ifdef MXC_MMC_DMA_ENABLE + mxc_dma_device_t dev_id = 0; +#endif + + pr_debug("%s: clock %u, bus %lu, power %u, vdd %u\n", DRIVER_NAME, + ios->clock, 1UL << ios->bus_width, ios->power_mode, ios->vdd); + + host->dma_dir = DMA_NONE; + +#ifdef MXC_MMC_DMA_ENABLE + if (mmc->ios.bus_width != host->mode) { + mxc_dma_free(host->dma); + if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) { + if (host->id == 0) { + dev_id = MXC_DMA_MMC1_WIDTH_4; + } else { + dev_id = MXC_DMA_MMC2_WIDTH_4; + } + } else { + if (host->id == 0) { + dev_id = MXC_DMA_MMC1_WIDTH_1; + } else { + dev_id = MXC_DMA_MMC2_WIDTH_1; + } + } + host->dma = mxc_dma_request(dev_id, "MXC MMC"); + if (host->dma < 0) { + printk(KERN_ERR "Cannot allocate MMC DMA channel\n"); + } + host->mode = mmc->ios.bus_width; + mxc_dma_callback_set(host->dma, mxcmci_dma_irq, (void *)host); + } +#endif + + if ((ios->vdd != host->current_vdd) && host->regulator_mmc) { + if (ios->vdd == 7) + voltage = 1800000; + else if (ios->vdd >= 8) + voltage = 2000000 + (ios->vdd - 8) * 100000; + regulator_set_voltage(host->regulator_mmc, voltage, voltage); + } + host->current_vdd = ios->vdd; + + if (ios->power_mode != host->power_mode && host->regulator_mmc) { + if (ios->power_mode == MMC_POWER_UP) { + if (regulator_enable(host->regulator_mmc) == 0) { + pr_debug("mmc power on\n"); + msleep(1); + } + } else if (ios->power_mode == MMC_POWER_OFF) { + regulator_disable(host->regulator_mmc); + pr_debug("mmc power off\n"); + } + } + host->power_mode = ios->power_mode; + + /* + * Vary divider first, then prescaler. + **/ + if (ios->clock) { + unsigned int clk_dev = 0; + + /* + * when prescaler = 16, CLK_20M = CLK_DIV / 2 + */ + if (ios->clock == mmc->f_min) + prescaler = 16; + else + prescaler = 0; + + /* clk_dev =1, CLK_DIV = ipg_perclk/2 */ + while (prescaler <= 0x800) { + for (clk_dev = 1; clk_dev <= 0xF; clk_dev++) { + int x; + if (prescaler != 0) { + x = (clk_rate / (clk_dev + 1)) / + (prescaler * 2); + } else { + x = clk_rate / (clk_dev + 1); + } + + pr_debug("x=%d, clock=%d %d\n", x, ios->clock, + clk_dev); + if (x <= ios->clock) { + break; + } + } + if (clk_dev < 0x10) { + break; + } + if (prescaler == 0) + prescaler = 1; + else + prescaler <<= 1; + } + + pr_debug("prescaler = 0x%x, divider = 0x%x\n", prescaler, + clk_dev); + mxcmci_stop_clock(host, true); + __raw_writel((prescaler << 4) | clk_dev, + host->base + MMC_CLK_RATE); + mxcmci_start_clock(host, false); + } else { + mxcmci_stop_clock(host, true); + } +} + +static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) +{ + struct mxcmci_host *host = mmc_priv(mmc); + u32 intctrl; + unsigned long flags; + + spin_lock_irqsave(&host->lock, flags); + + if (enable) + host->sdio_irq_cnt++; + else + host->sdio_irq_cnt--; + + if (host->sdio_irq_cnt == 1 || host->sdio_irq_cnt == 0) { + intctrl = __raw_readl(host->base + MMC_INT_CNTR); + intctrl &= ~INT_CNTR_SDIO_IRQ_EN; + if (host->sdio_irq_cnt) + intctrl |= INT_CNTR_SDIO_IRQ_EN; + __raw_writel(intctrl, host->base + MMC_INT_CNTR); + } + + spin_unlock_irqrestore(&host->lock, flags); +} + +static int mxcmci_get_ro(struct mmc_host *mmc) +{ + struct mxcmci_host *host = mmc_priv(mmc); + + if (host->plat_data->wp_status) + return host->plat_data->wp_status(mmc->parent); + else + return 0; +} + +/*! + * MMC/SD host operations structure. + * These functions are registered with MMC/SD Bus protocol driver. + */ +static struct mmc_host_ops mxcmci_ops = { + .request = mxcmci_request, + .set_ios = mxcmci_set_ios, + .get_ro = mxcmci_get_ro, + .enable_sdio_irq = mxcmci_enable_sdio_irq, +}; + +#ifdef MXC_MMC_DMA_ENABLE +/*! + * This function is called by DMA Interrupt Service Routine to indicate + * requested DMA transfer is completed. + * + * @param devid pointer to device specific structure + * @param error any DMA error + * @param cnt amount of data that was transferred + */ +static void mxcmci_dma_irq(void *devid, int error, unsigned int cnt) +{ + struct mxcmci_host *host = devid; + u32 status; + ulong nob, blk_size, i, blk_len; + + mxc_dma_disable(host->dma); + + if (error) { + printk(KERN_ERR "Error in DMA transfer\n"); + status = __raw_readl(host->base + MMC_STATUS); +#ifdef CONFIG_MMC_DEBUG + dump_status(__FUNCTION__, status); +#endif + mxcmci_data_done(host, status); + return; + } + pr_debug("%s: Transfered bytes:%d\n", DRIVER_NAME, cnt); + nob = __raw_readl(host->base + MMC_REM_NOB); + blk_size = __raw_readl(host->base + MMC_REM_BLK_SIZE); + blk_len = __raw_readl(host->base + MMC_BLK_LEN); + pr_debug("%s: REM_NOB:%lu REM_BLK_SIZE:%lu\n", DRIVER_NAME, nob, + blk_size); + i = 0; + + /* Enable the WRITE OP Done INT */ + status = __raw_readl(host->base + MMC_INT_CNTR); + __raw_writel((INT_CNTR_READ_OP_DONE | INT_CNTR_WRITE_OP_DONE | status), + host->base + MMC_INT_CNTR); +} +#endif + +/*! + * This function is called during the driver binding process. Based on the SDHC + * module that is being probed this function adds the appropriate SDHC module + * structure in the core driver. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions. + * + * @return The function returns 0 on successful registration and initialization + * of SDHC module. Otherwise returns specific error code. + */ +static int mxcmci_probe(struct platform_device *pdev) +{ + struct mxc_mmc_platform_data *mmc_plat = pdev->dev.platform_data; + struct mmc_host *mmc; + struct mxcmci_host *host = NULL; + int card_gpio_status; + int ret = -ENODEV; + + if (!mmc_plat) { + return -EINVAL; + } + + mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev); + if (!mmc) { + return -ENOMEM; + } + host = mmc_priv(mmc); + platform_set_drvdata(pdev, mmc); + + mmc->ops = &mxcmci_ops; + mmc->ocr_avail = mmc_plat->ocr_mask; + + /* Hack to work with LP1070 */ + if (mmc->ocr_avail && ~(MMC_VDD_31_32 - 1) == 0) + mmc->ocr_avail |= MMC_VDD_31_32; + + mmc->max_phys_segs = NR_SG; + mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; + + mmc->f_min = mmc_plat->min_clk; + mmc->f_max = mmc_plat->max_clk; + mmc->max_req_size = 32 * 1024; + mmc->max_seg_size = mmc->max_req_size; + mmc->max_blk_count = 65536; + + spin_lock_init(&host->lock); + host->mmc = mmc; + host->dma = -1; + host->dma_dir = DMA_NONE; + host->id = pdev->id; + host->mxc_mmc_suspend_flag = 0; + host->mode = -1; + host->plat_data = mmc_plat; + if (!host->plat_data) { + ret = -EINVAL; + goto out0; + } + + /* Get pwr supply for SDHC */ + if (NULL != mmc_plat->power_mmc) { + host->regulator_mmc = + regulator_get(&pdev->dev, mmc_plat->power_mmc); + if (IS_ERR(host->regulator_mmc)) { + ret = PTR_ERR(host->regulator_mmc); + goto out1; + } + if (!regulator_is_enabled(host->regulator_mmc)) { + if (regulator_enable(host->regulator_mmc) == 0) { + pr_debug("mmc power on\n"); + msleep(1); + } + } + } + + gpio_sdhc_active(pdev->id); + + host->clk = clk_get(&pdev->dev, "sdhc_clk"); + pr_debug("SDHC:%d clock:%lu\n", pdev->id, clk_get_rate(host->clk)); + clk_enable(host->clk); + + host->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!host->res) { + ret = -ENOMEM; + goto out2; + } + + if (!request_mem_region(host->res->start, + host->res->end - + host->res->start + 1, pdev->name)) { + printk(KERN_ERR "request_mem_region failed\n"); + ret = -ENOMEM; + goto out2; + } + host->base = (void *)IO_ADDRESS(host->res->start); + if (!host->base) { + ret = -ENOMEM; + goto out3; + } + + host->irq = platform_get_irq(pdev, 0); + if (!host->irq) { + ret = -ENOMEM; + goto out3; + } + + if (!host->plat_data->card_fixed) { + host->detect_irq = platform_get_irq(pdev, 1); + if (!host->detect_irq) + goto out3; + + do { + card_gpio_status = + host->plat_data->status(host->mmc->parent); + if (card_gpio_status) + set_irq_type(host->detect_irq, + IRQF_TRIGGER_FALLING); + else + set_irq_type(host->detect_irq, + IRQF_TRIGGER_RISING); + + } while (card_gpio_status != + host->plat_data->status(host->mmc->parent)); + + ret = request_irq(host->detect_irq, mxcmci_gpio_irq, 0, + pdev->name, host); + if (ret) + goto out3; + } + + mxcmci_softreset(host); + + if (__raw_readl(host->base + MMC_REV_NO) != SDHC_REV_NO) { + printk(KERN_ERR "%s: wrong rev.no. 0x%08x. aborting.\n", + pdev->name, MMC_REV_NO); + goto out3; + } + __raw_writel(READ_TO_VALUE, host->base + MMC_READ_TO); + + __raw_writel(INT_CNTR_END_CMD_RES, host->base + MMC_INT_CNTR); + + ret = request_irq(host->irq, mxcmci_irq, 0, pdev->name, host); + if (ret) { + goto out4; + } + + if ((ret = mmc_add_host(mmc)) < 0) { + goto out5; + } + + printk(KERN_INFO "%s-%d found\n", pdev->name, pdev->id); + if (host->id < MAX_HOST) + hosts[host->id] = host->mmc; + + return 0; + + out5: + free_irq(host->irq, host); + out4: + free_irq(host->detect_irq, host); + out3: + release_mem_region(pdev->resource[0].start, + pdev->resource[0].end - pdev->resource[0].start + 1); + out2: + clk_disable(host->clk); + regulator_disable(host->regulator_mmc); + regulator_put(host->regulator_mmc); + out1: + gpio_sdhc_inactive(pdev->id); + out0: + mmc_free_host(mmc); + platform_set_drvdata(pdev, NULL); + return ret; +} + +/*! + * Dissociates the driver from the SDHC device. Removes the appropriate SDHC + * module structure from the core driver. + * + * @param pdev the device structure used to give information on which SDHC + * to remove + * + * @return The function always returns 0. + */ +static int mxcmci_remove(struct platform_device *pdev) +{ + struct mmc_host *mmc = platform_get_drvdata(pdev); + + if (mmc) { + struct mxcmci_host *host = mmc_priv(mmc); + + hosts[host->id] = NULL; + mmc_remove_host(mmc); + free_irq(host->irq, host); + free_irq(host->detect_irq, host); +#ifdef MXC_MMC_DMA_ENABLE + mxc_dma_free(host->dma); +#endif + release_mem_region(host->res->start, + host->res->end - host->res->start + 1); + mmc_free_host(mmc); + if (NULL != host->regulator_mmc) + regulator_put(host->regulator_mmc); + gpio_sdhc_inactive(pdev->id); + } + platform_set_drvdata(pdev, NULL); + return 0; +} + +#ifdef CONFIG_PM + +/*! + * This function is called to put the SDHC in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which SDHC + * to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxcmci_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct mmc_host *mmc = platform_get_drvdata(pdev); + struct mxcmci_host *host = mmc_priv(mmc); + int ret = 0; + + if (mmc) { + host->mxc_mmc_suspend_flag = 1; + ret = mmc_suspend_host(mmc, state); + } + + clk_disable(host->clk); + /* + * The CD INT should be disabled in the suspend + * and enabled in resumed. + * Otherwise, the system would be halt when wake + * up with the situation that there is a card + * insertion during the system is in suspend mode. + */ + disable_irq(host->detect_irq); + + gpio_sdhc_inactive(pdev->id); + + if (host->regulator_mmc) + regulator_disable(host->regulator_mmc); + + return ret; +} + +/*! + * This function is called to bring the SDHC back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which SDHC + * to resume + * + * @return The function always returns 0. + */ +static int mxcmci_resume(struct platform_device *pdev) +{ + struct mmc_host *mmc = platform_get_drvdata(pdev); + struct mxcmci_host *host = mmc_priv(mmc); + int ret = 0; + + /* + * Note that a card insertion interrupt will cause this + * driver to resume automatically. In that case we won't + * actually have to do any work here. Return success. + */ + if (!host->mxc_mmc_suspend_flag) { + return 0; + } + + /* enable pwr supply for SDHC */ + if (host->regulator_mmc && !regulator_is_enabled(host->regulator_mmc)) { + regulator_enable(host->regulator_mmc); + msleep(1); + } + + gpio_sdhc_active(pdev->id); + + clk_enable(host->clk); + + if (mmc) { + ret = mmc_resume_host(mmc); + host->mxc_mmc_suspend_flag = 0; + } + + enable_irq(host->detect_irq); + + return ret; +} +#else +#define mxcmci_suspend NULL +#define mxcmci_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcmci_driver = { + .driver = { + .name = "mxcmci", + }, + .probe = mxcmci_probe, + .remove = mxcmci_remove, + .suspend = mxcmci_suspend, + .resume = mxcmci_resume, +}; + +/*! + * This function is used to initialize the MMC/SD driver module. The function + * registers the power management callback functions with the kernel and also + * registers the MMC/SD callback functions with the core MMC/SD driver. + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int __init mxcmci_init(void) +{ + printk(KERN_INFO "MXC MMC/SD driver\n"); + return platform_driver_register(&mxcmci_driver); +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxcmci_exit(void) +{ + platform_driver_unregister(&mxcmci_driver); +} + +module_init(mxcmci_init); +module_exit(mxcmci_exit); + +MODULE_DESCRIPTION("MXC Multimedia Card Interface Driver"); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/stmp3xxx_mmc.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/stmp3xxx_mmc.c @@ -0,0 +1,1095 @@ +/* + * Copyright (C) 2007 SigmaTel, Inc., Ioannis Kappas + * + * Portions copyright (C) 2003 Russell King, PXA MMCI Driver + * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "stmp3xxx-mmc" + +#define CLOCKRATE_MIN 400000 +#define CLOCKRATE_MAX 48000000 + +/* + * Card detect polling timeout + */ +#define STMP37XX_MMC_DETECT_TIMEOUT (HZ/2) + +/* Max value supported for XFER_COUNT */ +#define SSP_BUFFER_SIZE (65536 - 512) + +struct stmp3xxx_mmc_host { + struct device *dev; + struct mmc_host *mmc; + + struct clk *clk; + unsigned int clkrt; + + struct mmc_request *mrq; + struct mmc_command *cmd; + struct mmc_data *data; + + /* Whether the card is capable of 4-bit data */ + int bus_width_4:1; + + /* Whether SD card is present */ + unsigned present:1; + + /* Polling timer */ + struct timer_list timer; + + /* SSP interface which MMC/SD card slot is attached to */ + void __iomem *ssp_base; + + /* DMA channel used for this host */ + unsigned int dmach; + + /* IRQs */ + int dmairq, errirq; + + /* DMA descriptor to transfer data over SSP interface */ + struct stmp3xxx_dma_descriptor dma_desc; + + /* DMA buffer */ + dma_addr_t dma_buf_phys; + char *dma_buf; + + struct completion dma_done; + /* status on last interrupt */ + u32 status; + int read_uA, write_uA; + struct regulator *regulator; +}; + +/* Return read only state of card */ +static int stmp3xxx_mmc_get_ro(struct mmc_host *mmc) +{ + struct stmp3xxx_mmc_host *host = mmc_priv(mmc); + struct stmp3xxxmmc_platform_data *pdata = host->dev->platform_data; + + if (pdata && pdata->get_wp) + return pdata->get_wp(); + + return 0; +} + +/* Detect if card is plugged */ +static inline int stmp3xxx_mmc_is_plugged(struct stmp3xxx_mmc_host *host) +{ + u32 status = __raw_readl(host->ssp_base + HW_SSP_STATUS); + return !(status & BM_SSP_STATUS_CARD_DETECT); +} + +/* Card detection polling function */ +static void stmp3xxx_mmc_detect_poll(unsigned long arg) +{ + struct stmp3xxx_mmc_host *host = (struct stmp3xxx_mmc_host *)arg; + int card_status; + + card_status = stmp3xxx_mmc_is_plugged(host); + if (card_status != host->present) { + host->present = card_status; + mmc_detect_change(host->mmc, 0); + } + + mod_timer(&host->timer, jiffies + STMP37XX_MMC_DETECT_TIMEOUT); +} + +#define STMP3XXX_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \ + BM_SSP_CTRL1_RESP_ERR_IRQ | \ + BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \ + BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \ + BM_SSP_CTRL1_DATA_CRC_IRQ | \ + BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \ + BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \ + BM_SSP_CTRL1_FIFO_OVERRUN_IRQ) + +/* SSP DMA interrupt handler */ +static irqreturn_t mmc_irq_handler(int irq, void *dev_id) +{ + struct stmp3xxx_mmc_host *host = dev_id; + u32 c1; + + c1 = __raw_readl(host->ssp_base + HW_SSP_CTRL1); + __raw_writel(c1 & STMP3XXX_MMC_IRQ_BITS, + host->ssp_base + HW_SSP_CTRL1_CLR); + if (irq == host->dmairq) + stmp3xxx_dma_clear_interrupt(host->dmach); + host->status = + __raw_readl(host->ssp_base + HW_SSP_STATUS); + + if (host->cmd) /* else it is a bogus interrupt */ + complete(&host->dma_done); + + return IRQ_HANDLED; +} + +/* + * Check for MMC command errors + * Returns error code or zerro if no errors + */ +static inline int stmp3xxx_mmc_cmd_error(u32 status) +{ + int err = 0; + + if (status & BM_SSP_STATUS_TIMEOUT) + err = -ETIMEDOUT; + else if (status & BM_SSP_STATUS_RESP_TIMEOUT) + err = -ETIMEDOUT; + else if (status & BM_SSP_STATUS_RESP_CRC_ERR) + err = -EILSEQ; + else if (status & BM_SSP_STATUS_RESP_ERR) + err = -EIO; + + return err; +} + +/* Send the BC command to the device */ +static void stmp3xxx_mmc_bc(struct stmp3xxx_mmc_host *host) +{ + struct mmc_command *cmd = host->cmd; + struct stmp3xxx_dma_descriptor *dma_desc = &host->dma_desc; + + dma_desc->command->cmd = BM_APBH_CHn_CMD_WAIT4ENDCMD | BM_APBH_CHn_CMD_SEMAPHORE | BM_APBH_CHn_CMD_IRQONCMPLT | BF(0, APBH_CHn_CMD_XFER_COUNT) | BF(3, APBH_CHn_CMD_CMDWORDS) | BF(0, APBH_CHn_CMD_COMMAND); /* NO_DMA_XFER */ + + dma_desc->command->pio_words[0] = BM_SSP_CTRL0_ENABLE | + BM_SSP_CTRL0_IGNORE_CRC; + dma_desc->command->pio_words[1] = BF(cmd->opcode, SSP_CMD0_CMD) | + BM_SSP_CMD0_APPEND_8CYC; + dma_desc->command->pio_words[2] = BF(cmd->arg, SSP_CMD1_CMD_ARG); + + init_completion(&host->dma_done); + stmp3xxx_dma_reset_channel(host->dmach); + stmp3xxx_dma_go(host->dmach, dma_desc, 1); + wait_for_completion(&host->dma_done); + + cmd->error = stmp3xxx_mmc_cmd_error(host->status); + + if (stmp3xxx_dma_running(host->dmach)) + dev_dbg(host->dev, "DMA command not finished\n"); + + if (cmd->error) { + dev_dbg(host->dev, "Command error 0x%x\n", cmd->error); + stmp3xxx_dma_reset_channel(host->dmach); + } +} + +/* Send the ac command to the device */ +static void stmp3xxx_mmc_ac(struct stmp3xxx_mmc_host *host) +{ + struct mmc_command *cmd = host->cmd; + struct stmp3xxx_dma_descriptor *dma_desc = &host->dma_desc; + u32 ignore_crc, resp, long_resp; + u32 ssp_ctrl0; + u32 ssp_cmd0; + u32 ssp_cmd1; + + ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ? + 0 : BM_SSP_CTRL0_IGNORE_CRC; + resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ? + BM_SSP_CTRL0_GET_RESP : 0; + long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ? + BM_SSP_CTRL0_LONG_RESP : 0; + + dma_desc->command->cmd = + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_SEMAPHORE | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(0, APBH_CHn_CMD_XFER_COUNT) | + BF(3, APBH_CHn_CMD_CMDWORDS) | BF(0, APBH_CHn_CMD_COMMAND); + + ssp_ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | long_resp | resp; + ssp_cmd0 = BF(cmd->opcode, SSP_CMD0_CMD); + ssp_cmd1 = BF(cmd->arg, SSP_CMD1_CMD_ARG); + + dma_desc->command->pio_words[0] = ssp_ctrl0; + dma_desc->command->pio_words[1] = ssp_cmd0; + dma_desc->command->pio_words[2] = ssp_cmd1; + + stmp3xxx_dma_reset_channel(host->dmach); + init_completion(&host->dma_done); + stmp3xxx_dma_go(host->dmach, dma_desc, 1); + wait_for_completion(&host->dma_done); + + switch (mmc_resp_type(cmd)) { + case MMC_RSP_NONE: + while (__raw_readl(host->ssp_base + HW_SSP_CTRL0) + & BM_SSP_CTRL0_RUN) + continue; + break; + case MMC_RSP_R1: + case MMC_RSP_R1B: + case MMC_RSP_R3: + cmd->resp[0] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP0); + break; + case MMC_RSP_R2: + cmd->resp[3] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP0); + cmd->resp[2] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP1); + cmd->resp[1] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP2); + cmd->resp[0] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP3); + break; + default: + dev_warn(host->dev, "Unsupported response type 0x%x\n", + mmc_resp_type(cmd)); + BUG(); + break; + } + + cmd->error = stmp3xxx_mmc_cmd_error(host->status); + + if (stmp3xxx_dma_running(host->dmach)) + dev_dbg(host->dev, "DMA command not finished\n"); + + if (cmd->error) { + dev_dbg(host->dev, "Command error 0x%x\n", cmd->error); + stmp3xxx_dma_reset_channel(host->dmach); + } +} + +/* Copy data between sg list and dma buffer */ +static unsigned int stmp3xxx_sg_dma_copy(struct stmp3xxx_mmc_host *host, + unsigned int size, int to_dma) +{ + struct mmc_data *data = host->cmd->data; + unsigned int copy_size, bytes_copied = 0; + struct scatterlist *sg; + char *dmabuf = host->dma_buf; + char *sgbuf; + int len, i; + + sg = data->sg; + len = data->sg_len; + + /* + * Just loop through all entries. Size might not + * be the entire list though so make sure that + * we do not transfer too much. + */ + for (i = 0; i < len; i++) { + sgbuf = kmap_atomic(sg_page(&sg[i]), KM_BIO_SRC_IRQ) + + sg[i].offset; + copy_size = size < sg[i].length ? size : sg[i].length; + if (to_dma) + memcpy(dmabuf, sgbuf, copy_size); + else + memcpy(sgbuf, dmabuf, copy_size); + kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); + + dmabuf += sg[i].length; + + bytes_copied += copy_size; + size -= copy_size; + + if (size == 0) + break; + } + + return bytes_copied; +} + +/* Convert ns to tick count according to the current sclk speed */ +static unsigned short stmp3xxx_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns) +{ + const unsigned int ssp_timeout_mul = 4096; + /* + * Calculate ticks in ms since ns are large numbers + * and might overflow + */ + const unsigned int clock_per_ms = clock_rate / 1000; + const unsigned int ms = ns / 1000; + const unsigned int ticks = ms * clock_per_ms; + const unsigned int ssp_ticks = ticks / ssp_timeout_mul; + + BUG_ON(ssp_ticks == 0); + return ssp_ticks; +} + +static void __init_reg(struct device *dev, struct regulator **pp_reg) +{ + struct regulator *reg = *pp_reg; + + if (!reg) { + reg = regulator_get(NULL, "mmc_ssp-1"); + if (reg && !IS_ERR(reg)) + regulator_set_mode(reg, REGULATOR_MODE_NORMAL); + else + reg = NULL; + *pp_reg = reg; + } +} + +/* Send adtc command to the card */ +static void stmp3xxx_mmc_adtc(struct stmp3xxx_mmc_host *host) +{ + struct mmc_command *cmd = host->cmd; + struct stmp3xxx_dma_descriptor *dma_desc = &host->dma_desc; + int ignore_crc, resp, long_resp; + int is_reading = 0; + unsigned int copy_size; + + u32 ssp_ctrl0; + u32 ssp_cmd0; + u32 ssp_cmd1; + u32 timeout; + u32 val; + + u32 data_size = cmd->data->blksz * cmd->data->blocks; + u32 log2_block_size; + + ignore_crc = mmc_resp_type(cmd) & MMC_RSP_CRC ? 0 : 1; + resp = mmc_resp_type(cmd) & MMC_RSP_PRESENT ? 1 : 0; + long_resp = mmc_resp_type(cmd) & MMC_RSP_136 ? 1 : 0; + + dev_dbg(host->dev, "ADTC command:\n" + "response: %d, ignore crc: %d\n" + "data list: %u, blocksz: %u, blocks: %u, timeout: %uns %uclks, " + "flags: 0x%x\n", resp, ignore_crc, cmd->data->sg_len, + cmd->data->blksz, cmd->data->blocks, cmd->data->timeout_ns, + cmd->data->timeout_clks, cmd->data->flags); + + if (cmd->data->flags & MMC_DATA_WRITE) { + dev_dbg(host->dev, "Data Write\n"); + copy_size = stmp3xxx_sg_dma_copy(host, data_size, 1); + BUG_ON(copy_size < data_size); + is_reading = 0; + if (!host->regulator) + __init_reg(host->dev, &host->regulator); + if (host->regulator) + regulator_set_current_limit(host->regulator, + host->write_uA, + host->write_uA); + } else if (cmd->data->flags & MMC_DATA_READ) { + dev_dbg(host->dev, "Data Read\n"); + is_reading = 1; + if (!host->regulator) + __init_reg(host->dev, &host->regulator); + if (host->regulator) + regulator_set_current_limit(host->regulator, + host->read_uA, + host->read_uA); + } else { + dev_warn(host->dev, "Unsuspported data mode, 0x%x\n", + cmd->data->flags); + BUG(); + } + + BUG_ON(cmd->data->flags & MMC_DATA_STREAM); + BUG_ON((data_size % 8) > 0); + + dma_desc->command->cmd = + BM_APBH_CHn_CMD_WAIT4ENDCMD | + BM_APBH_CHn_CMD_SEMAPHORE | + BM_APBH_CHn_CMD_IRQONCMPLT | + BF(data_size, APBH_CHn_CMD_XFER_COUNT) | + BF(3, APBH_CHn_CMD_CMDWORDS); + + /* when is_reading is set, DMA controller performs WRITE operation. */ + dma_desc->command->cmd |= + BF(is_reading ? BV_APBH_CHn_CMD_COMMAND__DMA_WRITE : + BV_APBH_CHn_CMD_COMMAND__DMA_READ, + APBH_CHn_CMD_COMMAND); + ssp_ctrl0 = + (ignore_crc ? BM_SSP_CTRL0_IGNORE_CRC : 0) | (resp ? + BM_SSP_CTRL0_GET_RESP + : 0) | (long_resp ? + BM_SSP_CTRL0_LONG_RESP + : 0) | + (is_reading ? BM_SSP_CTRL0_READ : 0) | BM_SSP_CTRL0_DATA_XFER | + BM_SSP_CTRL0_WAIT_FOR_IRQ | BM_SSP_CTRL0_ENABLE | BF(data_size, + SSP_CTRL0_XFER_COUNT) + | BF(host->bus_width_4 ? BV_SSP_CTRL0_BUS_WIDTH__FOUR_BIT : + BV_SSP_CTRL0_BUS_WIDTH__ONE_BIT, + SSP_CTRL0_BUS_WIDTH); + + /* + * We need to set the hardware register to the logarithm to base 2 of + * the block size. + */ + log2_block_size = ilog2(cmd->data->blksz); + + ssp_cmd0 = + BF(log2_block_size, SSP_CMD0_BLOCK_SIZE) | + BF(cmd->opcode, SSP_CMD0_CMD) | + BF(cmd->data->blocks - 1, SSP_CMD0_BLOCK_COUNT); + + if (cmd->opcode == 12) + ssp_cmd0 |= BM_SSP_CMD0_APPEND_8CYC; + + ssp_cmd1 = BF(cmd->arg, SSP_CMD1_CMD_ARG); + + dma_desc->command->pio_words[0] = ssp_ctrl0; + dma_desc->command->pio_words[1] = ssp_cmd0; + dma_desc->command->pio_words[2] = ssp_cmd1; + + /* Set the timeout count */ + timeout = stmp3xxx_ns_to_ssp_ticks(host->clkrt, cmd->data->timeout_ns); + val = __raw_readl(host->ssp_base + HW_SSP_TIMING); + val &= ~(BM_SSP_TIMING_TIMEOUT); + val |= BF(timeout, SSP_TIMING_TIMEOUT); + __raw_writel(val, host->ssp_base + HW_SSP_TIMING); + + init_completion(&host->dma_done); + stmp3xxx_dma_reset_channel(host->dmach); + stmp3xxx_dma_go(host->dmach, dma_desc, 1); + wait_for_completion(&host->dma_done); + if (host->regulator) + regulator_set_current_limit(host->regulator, 0, 0); + + switch (mmc_resp_type(cmd)) { + case MMC_RSP_NONE: + break; + case MMC_RSP_R1: + case MMC_RSP_R3: + cmd->resp[0] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP0); + break; + case MMC_RSP_R2: + cmd->resp[3] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP0); + cmd->resp[2] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP1); + cmd->resp[1] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP2); + cmd->resp[0] = + __raw_readl(host->ssp_base + HW_SSP_SDRESP3); + break; + default: + dev_warn(host->dev, "Unsupported response type 0x%x\n", + mmc_resp_type(cmd)); + BUG(); + break; + } + + cmd->error = stmp3xxx_mmc_cmd_error(host->status); + + if (stmp3xxx_dma_running(host->dmach)) + dev_dbg(host->dev, "DMA command not finished\n"); + + if (cmd->error) { + dev_dbg(host->dev, "Command error 0x%x\n", cmd->error); + stmp3xxx_dma_reset_channel(host->dmach); + } else { + if (is_reading) + cmd->data->bytes_xfered = + stmp3xxx_sg_dma_copy(host, data_size, 0); + else + cmd->data->bytes_xfered = data_size; + + dev_dbg(host->dev, "Transferred %u bytes\n", + cmd->data->bytes_xfered); + } +} + +/* Begin sedning a command to the card */ +static void stmp3xxx_mmc_start_cmd(struct stmp3xxx_mmc_host *host, + struct mmc_command *cmd) +{ + dev_dbg(host->dev, "MMC command:\n" + "type: 0x%x opcode: %u, arg: %u, flags 0x%x retries: %u\n", + mmc_cmd_type(cmd), cmd->opcode, cmd->arg, cmd->flags, + cmd->retries); + + host->cmd = cmd; + + switch (mmc_cmd_type(cmd)) { + case MMC_CMD_BC: + stmp3xxx_mmc_bc(host); + break; + case MMC_CMD_BCR: + stmp3xxx_mmc_ac(host); + break; + case MMC_CMD_AC: + stmp3xxx_mmc_ac(host); + break; + case MMC_CMD_ADTC: + stmp3xxx_mmc_adtc(host); + break; + default: + dev_warn(host->dev, "Unknown MMC command\n"); + BUG(); + break; + } + + dev_dbg(host->dev, "response: %u %u %u %u errors: %u\n", + cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], + cmd->error); +} + +/* Handle MMC request */ +static void stmp3xxx_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) +{ + struct stmp3xxx_mmc_host *host = mmc_priv(mmc); + + dev_dbg(host->dev, "MMC request\n"); + + host->mrq = mrq; + + stmp3xxx_mmc_start_cmd(host, mrq->cmd); + + if (mrq->data && mrq->data->stop) { + dev_dbg(host->dev, "Stop opcode is %u\n", + mrq->data->stop->opcode); + stmp3xxx_mmc_start_cmd(host, mrq->data->stop); + } + + host->mrq = NULL; + mmc_request_done(mmc, mrq); +} + +/* + * Change divisors to reflect the rate of 'hz'. Note that we should not + * play with clock rate, because the same source is used to clock both + * SSP ports. + */ +static void +stmp3xxx_set_sclk_speed(struct stmp3xxx_mmc_host *host, unsigned int hz) +{ + unsigned long ssp; + u32 div1, div2; + u32 val; + struct stmp3xxxmmc_platform_data *pdata = host->dev->platform_data; + + if (get_evk_board_version() == 1) { + /*EVK Ver1 max clock is 12M */ + if (hz > 12000000) + hz = 12000000; + } + + if (pdata && pdata->setclock) { + /* + if the SSP is buggy and platform provides callback... + well, let it be. + */ + host->clkrt = pdata->setclock(hz); + return; + } + + /* + ...but the RightIdea(tm) is to set divisors to match + the requested clock. + */ + hz /= 1000; + + ssp = clk_get_rate(host->clk); + + for (div1 = 2; div1 < 254; div1 += 2) { + div2 = ssp / hz / div1; + if (div2 < 0x100) + break; + } + if (div1 >= 254) { + dev_err(host->dev, "Cannot set clock to %dkHz\n", hz); + return; + } + + dev_dbg(host->dev, "Setting clock rate to %ld kHz [%x+%x] " + "(requested %d), source %ldk\n", + ssp / div1 / div2, div1, div2, hz, ssp); + + val = __raw_readl(host->ssp_base + HW_SSP_TIMING); + val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE); + val |= BF(div1, SSP_TIMING_CLOCK_DIVIDE) | + BF(div2 - 1, SSP_TIMING_CLOCK_RATE); + __raw_writel(val, host->ssp_base + HW_SSP_TIMING); + + host->clkrt = ssp / div1 / div2 * 1000; +} + +/* Configure card */ +static void stmp3xxx_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct stmp3xxx_mmc_host *host = mmc_priv(mmc); + struct stmp3xxxmmc_platform_data *pdata; + + dev_dbg(host->dev, "MMC set ios:\n" + "Clock %u, vdd %u, bus_mode %u, chip_select %u, " + "power mode %u, bus_width %u\n", ios->clock, ios->vdd, + ios->bus_mode, ios->chip_select, ios->power_mode, + ios->bus_width); + + pdata = host->dev->platform_data; + + if (pdata->cmd_pullup) { + if (ios->bus_mode == MMC_BUSMODE_PUSHPULL) + pdata->cmd_pullup(0); + else + pdata->cmd_pullup(1); + } else + dev_warn(host->dev, + "Platform does not support CMD pin pullup control\n"); + + if (ios->bus_width == MMC_BUS_WIDTH_4) + host->bus_width_4 = 1; + else + host->bus_width_4 = 0; + + if (ios->clock > 0) + stmp3xxx_set_sclk_speed(host, ios->clock); +} + +static const struct mmc_host_ops stmp3xxx_mmc_ops = { + .request = stmp3xxx_mmc_request, + .get_ro = stmp3xxx_mmc_get_ro, + .set_ios = stmp3xxx_mmc_set_ios, +}; + +/* + * STMP37XX MMC/SD driver initialization + */ + +/* Reset ssp peripheral to default values */ +static void stmp3xxx_mmc_reset(struct stmp3xxx_mmc_host *host) +{ + u32 ssp_ctrl0; + u32 ssp_ctrl1; + + stmp3xxx_reset_block(host->ssp_base, 0); + + /* Configure SSP Control Register 0 */ + ssp_ctrl0 = + BM_SSP_CTRL0_IGNORE_CRC | + BF(BV_SSP_CTRL0_BUS_WIDTH__ONE_BIT, SSP_CTRL0_BUS_WIDTH); + + /* Configure SSP Control Register 1 */ + ssp_ctrl1 = + BM_SSP_CTRL1_DMA_ENABLE | + BM_SSP_CTRL1_POLARITY | + BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN | + BM_SSP_CTRL1_DATA_CRC_IRQ_EN | + BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN | + BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN | + BM_SSP_CTRL1_RESP_ERR_IRQ_EN | + BF(BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS, SSP_CTRL1_WORD_LENGTH) | + BF(BV_SSP_CTRL1_SSP_MODE__SD_MMC, SSP_CTRL1_SSP_MODE); + + __raw_writel(BF(0xFFFF, SSP_TIMING_TIMEOUT) | + BF(2, SSP_TIMING_CLOCK_DIVIDE) | + BF(0, SSP_TIMING_CLOCK_RATE), + host->ssp_base + HW_SSP_TIMING); + + /* Write the SSP Control Register 0 and 1 values out to the interface */ + __raw_writel(ssp_ctrl0, host->ssp_base + HW_SSP_CTRL0); + __raw_writel(ssp_ctrl1, host->ssp_base + HW_SSP_CTRL1); +} + +static void stmp3xxx_mmc_irq_release(struct stmp3xxx_mmc_host *host) +{ + free_irq(host->dmairq, host); + free_irq(host->errirq, host); +} + +static int __init stmp3xxx_mmc_irq_init(struct stmp3xxx_mmc_host *host) +{ + int ret; + + ret = request_irq(host->dmairq, mmc_irq_handler, 0, + DRIVER_NAME " dma", host); + if (ret) { + dev_err(host->dev, "Unable to set up DMA irq handler\n"); + goto out0; + } + + ret = request_irq(host->errirq, mmc_irq_handler, IRQF_SHARED, + DRIVER_NAME " error", host); + if (ret) { + dev_err(host->dev, "Unable to set up SSP error irq handler\n"); + goto out1; + } + return 0; + +out1: + free_irq(host->dmairq, host); +out0: + return ret; +} + +/* Allocate and initialise the DMA chains */ +static int stmp3xxx_mmc_dma_init(struct stmp3xxx_mmc_host *host, int reset) +{ + int ret; + + if (!reset) { + /* Allocate DMA channel */ + ret = stmp3xxx_dma_request(host->dmach, + host->dev, "STMP37XX MMC/SD"); + if (ret) { + dev_err(host->dev, "Unable to request DMA channel\n"); + return ret; + } + + host->dma_buf = dma_alloc_coherent(host->dev, SSP_BUFFER_SIZE, + &host->dma_buf_phys, + GFP_DMA); + if (host->dma_buf == NULL) { + dev_err(host->dev, "Unable to allocate DMA memory\n"); + ret = -ENOMEM; + goto out_mem; + } + + ret = stmp3xxx_dma_allocate_command(host->dmach, + &host->dma_desc); + if (ret) { + dev_err(host->dev, + "Unable to allocate DMA descriptor\n"); + goto out_cmd; + } + + host->dma_desc.command->next = (u32) host->dma_desc.handle; + host->dma_desc.command->buf_ptr = (u32) host->dma_buf_phys; + host->dma_desc.virtual_buf_ptr = host->dma_buf; + } + + /* Reset DMA channel */ + stmp3xxx_dma_reset_channel(host->dmach); + + /* Enable DMA interrupt */ + stmp3xxx_dma_clear_interrupt(host->dmach); + stmp3xxx_dma_enable_interrupt(host->dmach); + + return 0; + +out_cmd: + dma_free_coherent(host->dev, SSP_BUFFER_SIZE, host->dma_buf, + host->dma_buf_phys); +out_mem: + stmp3xxx_dma_release(host->dmach); + + return ret; +} + +static void stmp3xxx_mmc_dma_release(struct stmp3xxx_mmc_host *host) +{ + stmp3xxx_dma_reset_channel(host->dmach); + + dma_free_coherent(host->dev, SSP_BUFFER_SIZE, host->dma_buf, + host->dma_buf_phys); + + stmp3xxx_dma_free_command(host->dmach, &host->dma_desc); + stmp3xxx_dma_release(host->dmach); +} + +/* Probe peripheral for connected cards */ +static int __init stmp3xxx_mmc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct stmp3xxxmmc_platform_data *mmc_data; + struct stmp3xxx_mmc_host *host; + struct mmc_host *mmc; + struct resource *r; + int err = 0; + + mmc_data = dev->platform_data; + if (mmc_data == NULL) { + err = -EINVAL; + dev_err(dev, "Missing platform data\n"); + goto out; + } + + /* Allocate main MMC host structure */ + mmc = mmc_alloc_host(sizeof(struct stmp3xxx_mmc_host), dev); + if (!mmc) { + dev_err(dev, "Unable to allocate MMC host\n"); + err = -ENOMEM; + goto out; + } + host = mmc_priv(mmc); + + host->read_uA = mmc_data->read_uA; + host->write_uA = mmc_data->write_uA; + host->regulator = regulator_get(NULL, "mmc_ssp-1"); + if (host->regulator && !IS_ERR(host->regulator)) + regulator_set_mode(host->regulator, REGULATOR_MODE_NORMAL); + else + host->regulator = NULL; + + /* get resources: */ + + /* + * 1. io memory + */ + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(&pdev->dev, "failed to get IORESOURCE_MEM\n"); + err = -ENXIO; + goto out_res; + } + host->ssp_base = + r->start - STMP3XXX_REGS_PHBASE + STMP3XXX_REGS_BASE; + + /* + * 2. DMA channel + */ + r = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (!r) { + dev_err(&pdev->dev, "failed to get IORESOURCE_DMA\n"); + err = -ENXIO; + goto out_res; + } + host->dmach = r->start; + + /* + * 3. two IRQs + */ + host->dmairq = platform_get_irq(pdev, 0); + if (host->dmairq < 0) { + dev_err(&pdev->dev, "failed to get IORESOURCE_IRQ/0\n"); + err = host->dmairq; + goto out_res; + } + + host->errirq = platform_get_irq(pdev, 1); + if (host->errirq < 0) { + dev_err(&pdev->dev, "failed to get IORESOURCE_IRQ/1\n"); + err = host->errirq; + goto out_res; + } + + /* Set up MMC pins */ + if (mmc_data->hw_init) { + err = mmc_data->hw_init(); + if (err) { + dev_err(dev, "MMC HW configuration failed\n"); + goto out_res; + } + } + + host->mmc = mmc; + host->dev = dev; + + /* Set minimal clock rate */ + host->clk = clk_get(dev, "ssp"); + if (IS_ERR(host->clk)) { + err = PTR_ERR(host->clk); + dev_err(dev, "Clocks initialization failed\n"); + goto out_clk; + } + + clk_enable(host->clk); + stmp3xxx_set_sclk_speed(host, CLOCKRATE_MIN); + + /* Reset MMC block */ + stmp3xxx_mmc_reset(host); + + /* Enable DMA */ + err = stmp3xxx_mmc_dma_init(host, 0); + if (err) { + dev_err(dev, "DMA init failed\n"); + goto out_dma; + } + + /* Set up interrupt handlers */ + err = stmp3xxx_mmc_irq_init(host); + if (err) { + dev_err(dev, "IRQ initialization failed\n"); + goto out_irq; + } + + /* Get current card status for further cnanges tracking */ + host->present = stmp3xxx_mmc_is_plugged(host); + + /* Add a card detection polling timer */ + init_timer(&host->timer); + host->timer.function = stmp3xxx_mmc_detect_poll; + host->timer.data = (unsigned long)host; + host->timer.expires = jiffies + STMP37XX_MMC_DETECT_TIMEOUT; + add_timer(&host->timer); + + mmc->ops = &stmp3xxx_mmc_ops; + mmc->f_min = CLOCKRATE_MIN; + mmc->f_max = CLOCKRATE_MAX; + mmc->caps = MMC_CAP_4_BIT_DATA; + + /* Maximum block count requests. */ + mmc->max_blk_size = 512; + mmc->max_blk_count = SSP_BUFFER_SIZE / 512; + mmc->max_hw_segs = SSP_BUFFER_SIZE / 512; + mmc->max_phys_segs = SSP_BUFFER_SIZE / 512; + mmc->max_req_size = SSP_BUFFER_SIZE; + mmc->max_seg_size = SSP_BUFFER_SIZE; + + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; + + platform_set_drvdata(pdev, mmc); + + err = mmc_add_host(mmc); + if (err) { + dev_err(dev, "Oh God. mmc_add_host failed\n"); + goto out_all; + } + + return err; + +out_all: + +out_irq: + stmp3xxx_mmc_dma_release(host); +out_dma: + clk_disable(host->clk); +out_clk: + if (mmc_data->hw_release) + mmc_data->hw_release(); +out_res: + mmc_free_host(mmc); +out: + return err; +} + +static int __exit stmp3xxx_mmc_remove(struct platform_device *pdev) +{ + struct stmp3xxx_mmc_host *host; + struct stmp3xxxmmc_platform_data *mmc_data; + struct mmc_host *mmc; + + dev_info(&pdev->dev, "Removing\n"); + + mmc_data = pdev->dev.platform_data; + mmc = platform_get_drvdata(pdev); + platform_set_drvdata(pdev, NULL); + + host = mmc_priv(mmc); + mmc_remove_host(mmc); + + /* Disable SSP clock */ + clk_disable(host->clk); + clk_put(host->clk); + + /* Release IRQs */ + stmp3xxx_mmc_irq_release(host); + + /* Delete card detection timer */ + del_timer(&host->timer); + + /* Release DMA */ + stmp3xxx_mmc_dma_release(host); + if (host->regulator) + regulator_put(host->regulator); + + mmc_free_host(mmc); + + if (mmc_data->hw_release) + mmc_data->hw_release(); + + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxx_mmc_suspend(struct platform_device *pdev, + pm_message_t state) +{ + struct stmp3xxx_mmc_host *host; + struct stmp3xxxmmc_platform_data *mmc_data; + struct mmc_host *mmc; + int ret = 0; + + dev_dbg(&pdev->dev, "Suspending\n"); + + mmc_data = pdev->dev.platform_data; + mmc = platform_get_drvdata(pdev); + host = mmc_priv(mmc); + + ret = mmc_suspend_host(mmc, state); + if (!ret) { + if (mmc_data && mmc_data->hw_release) + mmc_data->hw_release(); + clk_disable(host->clk); + } + return ret; +} + +static int stmp3xxx_mmc_resume(struct platform_device *pdev) +{ + struct stmp3xxx_mmc_host *host; + struct stmp3xxxmmc_platform_data *mmc_data; + struct mmc_host *mmc; + + dev_dbg(&pdev->dev, "Resuming\n"); + + mmc_data = pdev->dev.platform_data; + mmc = platform_get_drvdata(pdev); + host = mmc_priv(mmc); + + clk_enable(host->clk); + + if (mmc_data->hw_init) + mmc_data->hw_init(); + stmp3xxx_mmc_reset(host); + stmp3xxx_mmc_dma_init(host, 1); + + return mmc_resume_host(mmc); +} +#else +#define stmp3xxx_mmc_suspend NULL +#define stmp3xxx_mmc_resume NULL +#endif /* CONFIG_PM */ + +static struct platform_driver stmp3xxx_mmc_driver = { + .probe = stmp3xxx_mmc_probe, + .remove = __exit_p(stmp3xxx_mmc_remove), + .suspend = stmp3xxx_mmc_suspend, + .resume = stmp3xxx_mmc_resume, + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxx_mmc_init(void) +{ + int ret = 0; + + ret = platform_driver_register(&stmp3xxx_mmc_driver); + if (ret < 0) + return ret; + + return ret; +} + +static void __exit stmp3xxx_mmc_exit(void) +{ + platform_driver_unregister(&stmp3xxx_mmc_driver); +} + +module_init(stmp3xxx_mmc_init); +module_exit(stmp3xxx_mmc_exit); + +MODULE_DESCRIPTION("STMP37xx/378x MMC peripheral"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/Makefile +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/Makefile @@ -9,13 +9,15 @@ obj-$(CONFIG_MMC_ARMMMCI) += mmci.o obj-$(CONFIG_MMC_PXA) += pxamci.o obj-$(CONFIG_MMC_IMX) += imxmmc.o -obj-$(CONFIG_MMC_MXC) += mxcmmc.o +obj-$(CONFIG_MMC_MXC) += mxc_mmc.o obj-$(CONFIG_MMC_SDHCI) += sdhci.o obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o +obj-$(CONFIG_MMC_IMX_ESDHCI) += mx_sdhci.o +obj-$(CONFIG_MMC_STMP3XXX) += stmp3xxx_mmc.o obj-$(CONFIG_MMC_WBSD) += wbsd.o obj-$(CONFIG_MMC_AU1X) += au1xmmc.o obj-$(CONFIG_MMC_OMAP) += omap.o --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/mx_sdhci.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/mx_sdhci.c @@ -0,0 +1,2171 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx_sdhci.c + * + * @brief Driver for the Freescale Semiconductor MXC eSDHC modules. + * + * This driver code is based on sdhci.c, by Pierre Ossman "); + * This driver supports Enhanced Secure Digital Host Controller + * modules eSDHC of MXC. eSDHC is also referred as enhanced MMC/SD + * controller. + * + * @ingroup MMC_SD + */ + +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mx_sdhci.h" + +#define DRIVER_NAME "mxsdhci" + +#define DBG(f, x...) \ + pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x) + +static unsigned int debug_quirks; +static int last_op_dir; + +/* + * Different quirks to handle when the hardware deviates from a strict + * interpretation of the SDHCI specification. + */ + +/* Controller doesn't honor resets unless we touch the clock register */ +#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) +/* Controller has bad caps bits, but really supports DMA */ +#define SDHCI_QUIRK_FORCE_DMA (1<<1) +/* Controller doesn't like to be reset when there is no card inserted. */ +#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) +/* Controller doesn't like clearing the power reg before a change */ +#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) +/* Controller has flaky internal state so reset it on each ios change */ +#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) +/* Controller has an unusable DMA engine */ +#define SDHCI_QUIRK_BROKEN_DMA (1<<5) +/* Controller can only DMA from 32-bit aligned addresses */ +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6) +/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ +#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7) +/* Controller needs to be reset after each request to stay stable */ +#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8) +/* Controller needs voltage and power writes to happen separately */ +#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<9) +/* Controller has an off-by-one issue with timeout value */ +#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<10) +/* Controller only support the PIO */ +#define SDHCI_QUIRK_ONLY_PIO (1<<16) +/* Controller support the External DMA */ +#define SDHCI_QUIRK_EXTERNAL_DMA_MODE (1<<17) +/* Controller support the Internal Simple DMA */ +#define SDHCI_QUIRK_INTERNAL_SIMPLE_DMA (1<<18) +/* Controller support the Internal Advanced DMA */ +#define SDHCI_QUIRK_INTERNAL_ADVANCED_DMA (1<<19) + +/* + * defines the mxc flags refer to the special hw pre-conditons and behavior + */ +static unsigned int mxc_quirks; +#ifdef CONFIG_MMC_IMX_ESDHCI_PIO_MODE +static unsigned int debug_quirks = SDHCI_QUIRK_ONLY_PIO; +#else +static unsigned int debug_quirks; +#endif +static unsigned int mxc_wml_value = 512; +static unsigned int *adma_des_table; + +#ifndef MXC_SDHCI_NUM +#define MXC_SDHCI_NUM 4 +#endif + +static struct sdhci_chip *mxc_fix_chips[MXC_SDHCI_NUM]; + +static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); +static void sdhci_finish_data(struct sdhci_host *); + +static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); +static void sdhci_finish_command(struct sdhci_host *); + +/* Used to active the SD bus */ +extern void gpio_sdhc_active(int module); +extern void gpio_sdhc_inactive(int module); +static void sdhci_dma_irq(void *devid, int error, unsigned int cnt); + +void mxc_mmc_force_detect(int id) +{ + struct sdhci_host *host; + if ((id < 0) || (id >= MXC_SDHCI_NUM)) + return; + if (!mxc_fix_chips[id]) + return; + host = mxc_fix_chips[id]->hosts[0]; + if (host->detect_irq) + return; + + schedule_work(&host->cd_wq); + return; +} + +EXPORT_SYMBOL(mxc_mmc_force_detect); + +static void sdhci_dumpregs(struct sdhci_host *host) +{ + printk(KERN_DEBUG DRIVER_NAME + ": ============== REGISTER DUMP ==============\n"); + + printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", + readl(host->ioaddr + SDHCI_DMA_ADDRESS), + readl(host->ioaddr + SDHCI_HOST_VERSION)); + printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", + (readl(host->ioaddr + SDHCI_BLOCK_SIZE) & 0xFFFF), + (readl(host->ioaddr + SDHCI_BLOCK_COUNT) >> 16)); + printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", + readl(host->ioaddr + SDHCI_ARGUMENT), + readl(host->ioaddr + SDHCI_TRANSFER_MODE)); + printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", + readl(host->ioaddr + SDHCI_PRESENT_STATE), + readl(host->ioaddr + SDHCI_HOST_CONTROL)); + printk(KERN_DEBUG DRIVER_NAME ": Clock: 0x%08x\n", + readl(host->ioaddr + SDHCI_CLOCK_CONTROL)); + printk(KERN_DEBUG DRIVER_NAME ": Int stat: 0x%08x\n", + readl(host->ioaddr + SDHCI_INT_STATUS)); + printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", + readl(host->ioaddr + SDHCI_INT_ENABLE), + readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)); + printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x\n", + readl(host->ioaddr + SDHCI_CAPABILITIES)); + + printk(KERN_DEBUG DRIVER_NAME + ": ===========================================\n"); +} + +/*****************************************************************************\ + * * + * Low level functions * + * * +\*****************************************************************************/ + +static void sdhci_reset(struct sdhci_host *host, u8 mask) +{ + unsigned long tmp; + unsigned long mask_u32; + unsigned long reg_save = 0; + + if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { + if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & + SDHCI_CARD_PRESENT)) + return; + } + + if (mask & SDHCI_RESET_ALL) + host->clock = 0; + else if (host->flags & SDHCI_CD_PRESENT) + reg_save = readl(host->ioaddr + SDHCI_HOST_CONTROL); + + tmp = readl(host->ioaddr + SDHCI_CLOCK_CONTROL) | (mask << 24); + mask_u32 = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); + writel(tmp, host->ioaddr + SDHCI_CLOCK_CONTROL); + + /* Wait max 100 ms */ + tmp = 5000; + + /* hw clears the bit when it's done */ + while ((readl(host->ioaddr + SDHCI_CLOCK_CONTROL) >> 24) & mask) { + if (tmp == 0) { + printk(KERN_ERR "%s: Reset 0x%x never completed.\n", + mmc_hostname(host->mmc), (int)mask); + sdhci_dumpregs(host); + return; + } + tmp--; + udelay(20); + } + /* + * The INT_EN SIG_EN regs have been modified after reset. + * re-configure them ag. + */ + if (!(mask & SDHCI_RESET_ALL) && (host->flags & SDHCI_CD_PRESENT)) + writel(reg_save, host->ioaddr + SDHCI_HOST_CONTROL); + if (host->flags & SDHCI_USE_DMA) + mask_u32 &= ~(SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL); + if (mxc_wml_value == 512) + writel(SDHCI_WML_128_WORDS, host->ioaddr + SDHCI_WML); + else + writel(SDHCI_WML_16_WORDS, host->ioaddr + SDHCI_WML); + writel(mask_u32 | SDHCI_INT_CARD_INT, host->ioaddr + SDHCI_INT_ENABLE); + writel(mask_u32, host->ioaddr + SDHCI_SIGNAL_ENABLE); + last_op_dir = 0; +} + +static void sdhci_init(struct sdhci_host *host) +{ + u32 intmask; + + sdhci_reset(host, SDHCI_RESET_ALL); + + intmask = SDHCI_INT_ADMA_ERROR | + SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC | + SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | + SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | + SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE; + + if (host->flags & SDHCI_USE_DMA) + intmask &= ~(SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL); + /* Configure the WML rege */ + if (mxc_wml_value == 512) + writel(SDHCI_WML_128_WORDS, host->ioaddr + SDHCI_WML); + else + writel(SDHCI_WML_16_WORDS, host->ioaddr + SDHCI_WML); + writel(intmask | SDHCI_INT_CARD_INT, host->ioaddr + SDHCI_INT_ENABLE); + writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE); +} + +static void sdhci_activate_led(struct sdhci_host *host) +{ + u32 ctrl; + + ctrl = readl(host->ioaddr + SDHCI_HOST_CONTROL); + ctrl |= SDHCI_CTRL_LED; + writel(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); +} + +static void sdhci_deactivate_led(struct sdhci_host *host) +{ + u32 ctrl; + + ctrl = readl(host->ioaddr + SDHCI_HOST_CONTROL); + ctrl &= ~SDHCI_CTRL_LED; + writel(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); +} + +/*****************************************************************************\ + * * + * Core functions * + * * +\*****************************************************************************/ + +static inline char *sdhci_sg_to_buffer(struct sdhci_host *host) +{ + return sg_virt(host->cur_sg); +} + +static inline int sdhci_next_sg(struct sdhci_host *host) +{ + /* + * Skip to next SG entry. + */ + host->cur_sg++; + host->num_sg--; + + /* + * Any entries left? + */ + if (host->num_sg > 0) { + host->offset = 0; + host->remain = host->cur_sg->length; + } + + return host->num_sg; +} + +static void sdhci_read_block_pio(struct sdhci_host *host) +{ + int blksize, chunk_remain; + u32 data; + char *buffer; + int size; + + DBG("PIO reading\n"); + + blksize = host->data->blksz; + chunk_remain = 0; + data = 0; + + buffer = sdhci_sg_to_buffer(host) + host->offset; + + while (blksize) { + if (chunk_remain == 0) { + data = readl(host->ioaddr + SDHCI_BUFFER); + chunk_remain = min(blksize, 4); + } + + size = min(host->remain, chunk_remain); + + chunk_remain -= size; + blksize -= size; + host->offset += size; + host->remain -= size; + + while (size) { + *buffer = data & 0xFF; + buffer++; + data >>= 8; + size--; + } + + if (host->remain == 0) { + if (sdhci_next_sg(host) == 0) { + BUG_ON(blksize != 0); + return; + } + buffer = sdhci_sg_to_buffer(host); + } + } +} + +static void sdhci_write_block_pio(struct sdhci_host *host) +{ + int blksize, chunk_remain; + u32 data; + char *buffer; + int bytes, size; + + DBG("PIO writing\n"); + + blksize = host->data->blksz; + chunk_remain = 4; + data = 0; + + bytes = 0; + buffer = sdhci_sg_to_buffer(host) + host->offset; + + while (blksize) { + size = min(host->remain, chunk_remain); + + chunk_remain -= size; + blksize -= size; + host->offset += size; + host->remain -= size; + + while (size) { + data >>= 8; + data |= (u32) *buffer << 24; + buffer++; + size--; + } + + if (chunk_remain == 0) { + writel(data, host->ioaddr + SDHCI_BUFFER); + chunk_remain = min(blksize, 4); + } + + if (host->remain == 0) { + if (sdhci_next_sg(host) == 0) { + BUG_ON(blksize != 0); + return; + } + buffer = sdhci_sg_to_buffer(host); + } + } +} + +static void sdhci_transfer_pio(struct sdhci_host *host) +{ + u32 mask; + + BUG_ON(!host->data); + + if (host->num_sg == 0) + return; + + if (host->data->flags & MMC_DATA_READ) + mask = SDHCI_DATA_AVAILABLE; + else + mask = SDHCI_SPACE_AVAILABLE; + + while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { + if (host->data->flags & MMC_DATA_READ) + sdhci_read_block_pio(host); + else + sdhci_write_block_pio(host); + + if (host->num_sg == 0) + break; + } + + DBG("PIO transfer complete.\n"); +} + +static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) +{ + u32 count; + unsigned target_timeout, current_timeout; + + WARN_ON(host->data); + + if (data == NULL) + return; + + /* Sanity checks */ + BUG_ON(data->blksz * data->blocks > 524288); + BUG_ON(data->blksz > host->mmc->max_blk_size); + BUG_ON(data->blocks > 65535); + + host->data = data; + host->data_early = 0; + if (host->data->flags & MMC_DATA_READ) + writel(readl(host->ioaddr + SDHCI_CLOCK_CONTROL) | + SDHCI_CLOCK_HLK_EN, host->ioaddr + SDHCI_CLOCK_CONTROL); + + /* timeout in us */ + target_timeout = data->timeout_ns / 1000 + + data->timeout_clks / host->clock; + + /* + * Figure out needed cycles. + * We do this in steps in order to fit inside a 32 bit int. + * The first step is the minimum timeout, which will have a + * minimum resolution of 6 bits: + * (1) 2^13*1000 > 2^22, + * (2) host->timeout_clk < 2^16 + * => + * (1) / (2) > 2^6 + */ + count = 0; + current_timeout = (1 << 13) * 1000 / host->timeout_clk; + while (current_timeout < target_timeout) { + count++; + current_timeout <<= 1; + if (count >= 0xF) + break; + } + + /* + * Compensate for an off-by-one error in the CaFe hardware; otherwise, + * a too-small count gives us interrupt timeouts. + */ + if ((host->chip->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL)) + count++; + + if (count >= 0xF) { + DBG(KERN_WARNING "%s: Too large timeout requested!\n", + mmc_hostname(host->mmc)); + count = 0xE; + } + + /* Set the max time-out value to level up the compatibility */ + count = 0xE; + + count = + (count << 16) | (readl(host->ioaddr + SDHCI_CLOCK_CONTROL) & + 0xFFF0FFFF); + writel(count, host->ioaddr + SDHCI_CLOCK_CONTROL); + + if (host->flags & SDHCI_USE_DMA) + host->flags |= SDHCI_REQ_USE_DMA; + + if (unlikely((host->flags & SDHCI_REQ_USE_DMA) && + (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) && + ((data->blksz * data->blocks) & 0x3))) { + DBG("Reverting to PIO because of transfer size (%d)\n", + data->blksz * data->blocks); + host->flags &= ~SDHCI_REQ_USE_DMA; + } + + /* + * The assumption here being that alignment is the same after + * translation to device address space. + */ + if (unlikely((host->flags & SDHCI_REQ_USE_DMA) && + (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && + (data->sg->offset & 0x3))) { + DBG("Reverting to PIO because of bad alignment\n"); + host->flags &= ~SDHCI_REQ_USE_DMA; + } + + if (host->flags & SDHCI_REQ_USE_DMA) { + int i; + struct scatterlist *tsg; + + host->dma_size = data->blocks * data->blksz; + count = + dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, + (data-> + flags & MMC_DATA_READ) ? DMA_FROM_DEVICE : + DMA_TO_DEVICE); + BUG_ON(count != data->sg_len); + DBG("Configure the sg DMA, %s, len is 0x%x, count is %d\n", + (data->flags & MMC_DATA_READ) + ? "DMA_FROM_DEIVCE" : "DMA_TO_DEVICE", host->dma_size, + count); + + /* Make sure the ADMA mode is selected. */ + i = readl(host->ioaddr + SDHCI_HOST_CONTROL); + i |= SDHCI_CTRL_ADMA; + writel(i, host->ioaddr + SDHCI_HOST_CONTROL); + + tsg = data->sg; + /* ADMA mode is used, create the descriptor table */ + for (i = 0; i < count; i++) { + if (tsg->dma_address & 0xFFF) { + DBG(KERN_ERR "ADMA addr isn't 4K aligned.\n"); + DBG(KERN_ERR "0x%x\n", tsg->dma_address); + DBG(KERN_ERR "Changed to Single DMA mode.\n"); + goto Single_DMA; + } + adma_des_table[2 * i] = tsg->length << 12; + adma_des_table[2 * i] |= FSL_ADMA_DES_ATTR_SET; + adma_des_table[2 * i] |= FSL_ADMA_DES_ATTR_VALID; + adma_des_table[2 * i + 1] = tsg->dma_address; + adma_des_table[2 * i + 1] |= FSL_ADMA_DES_ATTR_TRAN; + adma_des_table[2 * i + 1] |= FSL_ADMA_DES_ATTR_VALID; + if (count == (i + 1)) + adma_des_table[2 * i + 1] |= + FSL_ADMA_DES_ATTR_END; + tsg++; + } + + /* Write the physical address to ADMA address reg */ + writel(virt_to_phys(adma_des_table), + host->ioaddr + SDHCI_ADMA_ADDRESS); + Single_DMA: + /* Rollback to the Single DMA mode */ + i = readl(host->ioaddr + SDHCI_HOST_CONTROL); + i &= ~SDHCI_CTRL_ADMA; + writel(i, host->ioaddr + SDHCI_HOST_CONTROL); + /* Single DMA mode is used */ + writel(sg_dma_address(data->sg), + host->ioaddr + SDHCI_DMA_ADDRESS); + } else if ((host->flags & SDHCI_USE_EXTERNAL_DMA) && + (data->blocks * data->blksz >= mxc_wml_value)) { + host->dma_size = data->blocks * data->blksz; + DBG("Configure the External DMA, %s, len is 0x%x\n", + (data->flags & MMC_DATA_READ) + ? "DMA_FROM_DEIVCE" : "DMA_TO_DEVICE", host->dma_size); + + if (data->blksz & 0x3) { + printk(KERN_ERR + "mxc_mci: block size not multiple of 4 bytes\n"); + } + + if (data->flags & MMC_DATA_READ) + host->dma_dir = DMA_FROM_DEVICE; + else + host->dma_dir = DMA_TO_DEVICE; + + host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, + data->sg_len, host->dma_dir); + + if (data->flags & MMC_DATA_READ) { + mxc_dma_sg_config(host->dma, data->sg, data->sg_len, + host->dma_size, MXC_DMA_MODE_READ); + } else { + mxc_dma_sg_config(host->dma, data->sg, data->sg_len, + host->dma_size, MXC_DMA_MODE_WRITE); + } + } else { + host->cur_sg = data->sg; + host->num_sg = data->sg_len; + + host->offset = 0; + host->remain = host->cur_sg->length; + } + + /* We do not handle DMA boundaries, so set it to max (512 KiB) */ + writel((data->blocks << 16) | SDHCI_MAKE_BLKSZ(7, data->blksz), + host->ioaddr + SDHCI_BLOCK_SIZE); +} + +static void sdhci_finish_data(struct sdhci_host *host) +{ + struct mmc_data *data; + u16 blocks; + + BUG_ON(!host->data); + + data = host->data; + host->data = NULL; + + if (host->flags & SDHCI_REQ_USE_DMA) { + dma_unmap_sg(&(host->chip->pdev)->dev, data->sg, data->sg_len, + (data->flags & MMC_DATA_READ) ? DMA_FROM_DEVICE : + DMA_TO_DEVICE); + } + if ((host->flags & SDHCI_USE_EXTERNAL_DMA) && + (host->dma_size >= mxc_wml_value) && (data != NULL)) { + dma_unmap_sg(mmc_dev(host->mmc), data->sg, + host->dma_len, host->dma_dir); + host->dma_size = 0; + } + + /* + * Controller doesn't count down when in single block mode. + */ + if (data->blocks == 1) + blocks = (data->error == 0) ? 0 : 1; + else + blocks = readl(host->ioaddr + SDHCI_BLOCK_COUNT) >> 16; + data->bytes_xfered = data->blksz * data->blocks; + + if (data->stop) { + /* + * The controller needs a reset of internal state machines + * upon error conditions. + */ + if (data->error) { + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + } + + sdhci_send_command(host, data->stop); + } else + tasklet_schedule(&host->finish_tasklet); +} + +static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) +{ + int flags; + u32 mask; + u32 mode = 0; + unsigned long timeout; + + DBG("sdhci_send_command 0x%x is starting...\n", cmd->opcode); + WARN_ON(host->cmd); + + /* Wait max 10 ms */ + timeout = 5000; + + mask = SDHCI_CMD_INHIBIT; + if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) + mask |= SDHCI_DATA_INHIBIT; + + /* We shouldn't wait for data inihibit for stop commands, even + though they might use busy signaling */ + if (host->mrq->data && (cmd == host->mrq->data->stop)) + mask &= ~SDHCI_DATA_INHIBIT; + + while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { + if (timeout == 0) { + printk(KERN_ERR "%s: Controller never released " + "inhibit bit(s).\n", mmc_hostname(host->mmc)); + sdhci_dumpregs(host); + cmd->error = -EIO; + tasklet_schedule(&host->finish_tasklet); + return; + } + timeout--; + udelay(20); + } + + mod_timer(&host->timer, jiffies + 1 * HZ); + + host->cmd = cmd; + + sdhci_prepare_data(host, cmd->data); + + writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT); + + /* Set up the transfer mode */ + if (cmd->data != NULL) { + mode = SDHCI_TRNS_BLK_CNT_EN | SDHCI_TRNS_DPSEL; + if (cmd->data->blocks > 1) + mode |= SDHCI_TRNS_MULTI; + if (cmd->data->flags & MMC_DATA_READ) + mode |= SDHCI_TRNS_READ; + else + mode &= ~SDHCI_TRNS_READ; + if (host->flags & SDHCI_USE_DMA) + mode |= SDHCI_TRNS_DMA; + if (host->flags & SDHCI_USE_EXTERNAL_DMA) + DBG("Prepare data completely in %s transfer mode.\n", + "EXTTERNAL DMA"); + } + + if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { + printk(KERN_ERR "%s: Unsupported response type!\n", + mmc_hostname(host->mmc)); + cmd->error = -EINVAL; + tasklet_schedule(&host->finish_tasklet); + return; + } + + if (!(cmd->flags & MMC_RSP_PRESENT)) + flags = SDHCI_CMD_RESP_NONE; + else if (cmd->flags & MMC_RSP_136) + flags = SDHCI_CMD_RESP_LONG; + else if (cmd->flags & MMC_RSP_BUSY) + flags = SDHCI_CMD_RESP_SHORT_BUSY; + else + flags = SDHCI_CMD_RESP_SHORT; + + if (cmd->flags & MMC_RSP_CRC) + flags |= SDHCI_CMD_CRC; + if (cmd->flags & MMC_RSP_OPCODE) + flags |= SDHCI_CMD_INDEX; + if (cmd->data) + flags |= SDHCI_CMD_DATA; + + mode |= SDHCI_MAKE_CMD(cmd->opcode, flags); + DBG("Complete sending cmd, transfer mode would be 0x%x.\n", mode); + writel(mode, host->ioaddr + SDHCI_TRANSFER_MODE); +} + +static void sdhci_finish_command(struct sdhci_host *host) +{ + int i; + + BUG_ON(host->cmd == NULL); + + if (host->cmd->flags & MMC_RSP_PRESENT) { + if (host->cmd->flags & MMC_RSP_136) { + /* CRC is stripped so we need to do some shifting. */ + for (i = 0; i < 4; i++) { + host->cmd->resp[i] = readl(host->ioaddr + + SDHCI_RESPONSE + (3 - + i) + * 4) << 8; + if (i != 3) + host->cmd->resp[i] |= + readb(host->ioaddr + + SDHCI_RESPONSE + (3 - i) * 4 - + 1); + } + } else { + host->cmd->resp[0] = + readl(host->ioaddr + SDHCI_RESPONSE); + } + } + + host->cmd->error = 0; + + if (host->data && host->data_early) + sdhci_finish_data(host); + + if (!host->cmd->data) + tasklet_schedule(&host->finish_tasklet); + + host->cmd = NULL; +} + +static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) +{ + /*This variable holds the value of clock divider, prescaler */ + int div = 0, prescaler = 0; + int clk_rate; + u32 clk; + unsigned long timeout; + + if (clock == 0) { + goto out; + } else { + if (!host->plat_data->clk_flg) { + clk_enable(host->clk); + host->plat_data->clk_flg = 1; + } + } + if (clock == host->clock) + return; + + clk_rate = clk_get_rate(host->clk); + clk = readl(host->ioaddr + SDHCI_CLOCK_CONTROL) & ~SDHCI_CLOCK_MASK; + writel(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); + + if (clock == host->min_clk) + prescaler = 16; + else + prescaler = 0; + while (prescaler <= 0x80) { + for (div = 0; div <= 0xF; div++) { + int x; + if (prescaler != 0) + x = (clk_rate / (div + 1)) / (prescaler * 2); + else + x = clk_rate / (div + 1); + + DBG("x=%d, clock=%d %d\n", x, clock, div); + if (x <= clock) + break; + } + if (div < 0x10) + break; + if (prescaler == 0) + prescaler = 1; + else + prescaler <<= 1; + } + DBG("prescaler = 0x%x, divider = 0x%x\n", prescaler, div); + clk |= (prescaler << 8) | (div << 4); + + /* Configure the clock control register */ + clk |= + (readl(host->ioaddr + SDHCI_CLOCK_CONTROL) & (~SDHCI_CLOCK_MASK)); + if (host->plat_data->vendor_ver < ESDHC_VENDOR_V22) + writel(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); + else + writel(clk | SDHCI_CLOCK_SD_EN, + host->ioaddr + SDHCI_CLOCK_CONTROL); + + /* Wait max 10 ms */ + timeout = 5000; + while (timeout > 0) { + timeout--; + udelay(20); + } + + out: + host->clock = clock; +} + +static void sdhci_set_power(struct sdhci_host *host, unsigned short power) +{ + int voltage = 0; + + /* There is no PWR CTL REG */ + if (host->power == power) + return; + + if (host->regulator_mmc) { + if (power == (unsigned short)-1) { + regulator_disable(host->regulator_mmc); + DBG("mmc power off\n"); + } else { + if (power == 7) + voltage = 1800000; + else if (power >= 8) + voltage = 2000000 + (power - 8) * 100000; + regulator_set_voltage(host->regulator_mmc, + voltage, voltage); + + if (regulator_enable(host->regulator_mmc) == 0) { + DBG("mmc power on\n"); + msleep(1); + } + } + } + + host->power = power; +} + +/*****************************************************************************\ + * * + * MMC callbacks * + * * +\*****************************************************************************/ + +static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) +{ + struct sdhci_host *host; + unsigned long flags; + + host = mmc_priv(mmc); + + /* Enable the clock */ + if (!host->plat_data->clk_flg) { + clk_enable(host->clk); + host->plat_data->clk_flg = 1; + } + + spin_lock_irqsave(&host->lock, flags); + + WARN_ON(host->mrq != NULL); + + sdhci_activate_led(host); + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) { + if (mrq->cmd && mrq->data) { + if (mrq->data->flags & MMC_DATA_READ) + last_op_dir = 1; + else { + if (last_op_dir) + sdhci_reset(host, + SDHCI_RESET_CMD | + SDHCI_RESET_DATA); + } + } + } + + if (host->flags & SDHCI_USE_EXTERNAL_DMA) + spin_unlock_irqrestore(&host->lock, flags); + + host->mrq = mrq; + if (!(host->flags & SDHCI_CD_PRESENT)) { + host->mrq->cmd->error = -ENOMEDIUM; + tasklet_schedule(&host->finish_tasklet); + } else + sdhci_send_command(host, mrq->cmd); + + if (!(host->flags & SDHCI_USE_EXTERNAL_DMA)) + spin_unlock_irqrestore(&host->lock, flags); + + mmiowb(); +} + +static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host; + unsigned long flags; + u32 tmp; + mxc_dma_device_t dev_id = 0; + + DBG("%s: clock %u, bus %lu, power %u, vdd %u\n", DRIVER_NAME, + ios->clock, 1UL << ios->bus_width, ios->power_mode, ios->vdd); + + host = mmc_priv(mmc); + + /* Configure the External DMA mode */ + if (host->flags & SDHCI_USE_EXTERNAL_DMA) { + host->dma_dir = DMA_NONE; + if (mmc->ios.bus_width != host->mode) { + mxc_dma_free(host->dma); + if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) { + if (host->id == 0) + dev_id = MXC_DMA_MMC1_WIDTH_4; + else + dev_id = MXC_DMA_MMC2_WIDTH_4; + } else { + if (host->id == 0) + dev_id = MXC_DMA_MMC1_WIDTH_1; + else + dev_id = MXC_DMA_MMC2_WIDTH_1; + } + host->dma = mxc_dma_request(dev_id, "MXC MMC"); + if (host->dma < 0) + DBG("Cannot allocate MMC DMA channel\n"); + mxc_dma_callback_set(host->dma, sdhci_dma_irq, + (void *)host); + /* Configure the WML rege */ + if (mxc_wml_value == 512) + writel(SDHCI_WML_128_WORDS, + host->ioaddr + SDHCI_WML); + else + writel(SDHCI_WML_16_WORDS, + host->ioaddr + SDHCI_WML); + } + } + + host->mode = mmc->ios.bus_width; + + spin_lock_irqsave(&host->lock, flags); + + /* + * Reset the chip on each power off. + * Should clear out any weird states. + */ + if (ios->power_mode == MMC_POWER_OFF) { + writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE); + sdhci_init(host); + } + + sdhci_set_clock(host, ios->clock); + + if (ios->power_mode == MMC_POWER_OFF) + sdhci_set_power(host, -1); + else { + sdhci_set_power(host, ios->vdd); + if (!readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)) { + tmp = readl(host->ioaddr + SDHCI_INT_ENABLE); + if (host->sdio_enable) + writel(tmp, host->ioaddr + SDHCI_SIGNAL_ENABLE); + else + writel(tmp & ~SDHCI_INT_CARD_INT, + host->ioaddr + SDHCI_SIGNAL_ENABLE); + } + } + + tmp = readl(host->ioaddr + SDHCI_HOST_CONTROL); + + if (ios->bus_width == MMC_BUS_WIDTH_4) { + tmp &= ~SDHCI_CTRL_8BITBUS; + tmp |= SDHCI_CTRL_4BITBUS; + } else if (ios->bus_width == MMC_BUS_WIDTH_8) { + tmp &= ~SDHCI_CTRL_4BITBUS; + tmp |= SDHCI_CTRL_8BITBUS; + } else if (ios->bus_width == MMC_BUS_WIDTH_1) { + tmp &= ~SDHCI_CTRL_4BITBUS; + tmp &= ~SDHCI_CTRL_8BITBUS; + } + + if (host->flags & SDHCI_USE_DMA) + tmp |= SDHCI_CTRL_ADMA; + + writel(tmp, host->ioaddr + SDHCI_HOST_CONTROL); + + /* + * Some (ENE) controllers go apeshit on some ios operation, + * signalling timeout and CRC errors even on CMD0. Resetting + * it on each ios seems to solve the problem. + */ + if (host->chip->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) + sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + + mmiowb(); + spin_unlock_irqrestore(&host->lock, flags); +} + +static int sdhci_get_ro(struct mmc_host *mmc) +{ + struct sdhci_host *host; + + host = mmc_priv(mmc); + + if (host->plat_data->wp_status) + return host->plat_data->wp_status(mmc->parent); + else + return 0; +} + +static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) +{ + struct sdhci_host *host; + unsigned long flags; + u32 ier, prot, clk, present; + + host = mmc_priv(mmc); + + spin_lock_irqsave(&host->lock, flags); + + if (enable) { + if (host->sdio_enable++) + goto exit_unlock; + } else { + if (--(host->sdio_enable)) + goto exit_unlock; + } + /* Enable the clock */ + if (!host->plat_data->clk_flg) { + clk_enable(host->clk); + host->plat_data->clk_flg = 1; + } + ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); + prot = readl(host->ioaddr + SDHCI_HOST_CONTROL); + clk = readl(host->ioaddr + SDHCI_CLOCK_CONTROL); + + if (enable) { + ier |= SDHCI_INT_CARD_INT; + prot |= SDHCI_CTRL_D3CD; + clk |= SDHCI_CLOCK_PER_EN | SDHCI_CLOCK_IPG_EN; + present = readl(host->ioaddr + SDHCI_PRESENT_STATE); + if ((present & SDHCI_CARD_INT_MASK) != SDHCI_CARD_INT_ID) + writel(SDHCI_INT_CARD_INT, + host->ioaddr + SDHCI_INT_STATUS); + } else { + ier &= ~SDHCI_INT_CARD_INT; + prot &= ~SDHCI_CTRL_D3CD; + clk &= ~(SDHCI_CLOCK_PER_EN | SDHCI_CLOCK_IPG_EN); + } + + writel(prot, host->ioaddr + SDHCI_HOST_CONTROL); + writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); + writel(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); + + mmiowb(); + exit_unlock: + spin_unlock_irqrestore(&host->lock, flags); +} + +static const struct mmc_host_ops sdhci_ops = { + .request = sdhci_request, + .set_ios = sdhci_set_ios, + .get_ro = sdhci_get_ro, + .enable_sdio_irq = sdhci_enable_sdio_irq, +}; + +/*****************************************************************************\ + * * + * Tasklets * + * * +\*****************************************************************************/ + +static void sdhci_tasklet_card(unsigned long param) +{ + struct sdhci_host *host; + unsigned long flags; + unsigned int cd_status = 0; + + host = (struct sdhci_host *)param; + + if (host->flags & SDHCI_CD_PRESENT) + host->flags &= ~SDHCI_CD_PRESENT; + else + host->flags |= SDHCI_CD_PRESENT; + /* Detect there is a card in slot or not */ + DBG("cd_status=%d %s\n", cd_status, + (host->flags & SDHCI_CD_PRESENT) ? "inserted" : "removed"); + + spin_lock_irqsave(&host->lock, flags); + + if (!(host->flags & SDHCI_CD_PRESENT)) { + if (host->mrq) { + printk(KERN_ERR "%s: Card removed during transfer!\n", + mmc_hostname(host->mmc)); + printk(KERN_ERR "%s: Resetting controller.\n", + mmc_hostname(host->mmc)); + + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + + host->mrq->cmd->error = -ENOMEDIUM; + tasklet_schedule(&host->finish_tasklet); + } + } + + spin_unlock_irqrestore(&host->lock, flags); + + mmc_detect_change(host->mmc, msecs_to_jiffies(200)); +} + +static void sdhci_tasklet_finish(unsigned long param) +{ + struct sdhci_host *host; + unsigned long flags; + struct mmc_request *mrq; + + host = (struct sdhci_host *)param; + + spin_lock_irqsave(&host->lock, flags); + + del_timer(&host->timer); + + mrq = host->mrq; + + /* + * The controller needs a reset of internal state machines + * upon error conditions. + */ + if (mrq->cmd->error || + (mrq->data && (mrq->data->error || + (mrq->data->stop && mrq->data->stop->error))) || + (host->chip->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) { + + /* Some controllers need this kick or reset won't work here */ + if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { + unsigned int clock; + + /* This is to force an update */ + clock = host->clock; + host->clock = 0; + sdhci_set_clock(host, clock); + } + + /* Spec says we should do both at the same time, but Ricoh + controllers do not like that. */ + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + } + + host->mrq = NULL; + host->cmd = NULL; + host->data = NULL; + + sdhci_deactivate_led(host); + + mmiowb(); + spin_unlock_irqrestore(&host->lock, flags); + + /* Stop the clock when the req is done */ + flags = SDHCI_DATA_ACTIVE | SDHCI_DOING_WRITE | SDHCI_DOING_READ; + if (machine_is_mx35_3ds()) { + /* Do not disable the eSDHC clk on MX35 3DS board, + * since SYSTEM can't boot up after the reset key + * is pressed when the SD/MMC boot mode is used. + * The root cause is that the ROM code don't ensure + * the SD/MMC clk is running when boot system. + * */ + mmc_request_done(host->mmc, mrq); + } else { + if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & flags)) { + if (host->plat_data->clk_flg) { + clk_disable(host->clk); + host->plat_data->clk_flg = 0; + } + } + + mmc_request_done(host->mmc, mrq); + } + +} + +static void sdhci_timeout_timer(unsigned long data) +{ + struct sdhci_host *host; + unsigned long tmp, flags; + + host = (struct sdhci_host *)data; + + spin_lock_irqsave(&host->lock, flags); + + if (host->mrq) { + printk(KERN_ERR "%s: Timeout waiting for hardware " + "interrupt.\n", mmc_hostname(host->mmc)); + sdhci_dumpregs(host); + + if (host->data) { + host->data->error = -ETIMEDOUT; + sdhci_finish_data(host); + } else { + if (host->cmd) + host->cmd->error = -ETIMEDOUT; + else + host->mrq->cmd->error = -ETIMEDOUT; + + tasklet_schedule(&host->finish_tasklet); + } + + if (!readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)) { + printk(KERN_ERR "%s, ERROR SIG_INT is 0.\n", __func__); + tmp = readl(host->ioaddr + SDHCI_INT_ENABLE); + if (host->sdio_enable) + writel(tmp, host->ioaddr + SDHCI_SIGNAL_ENABLE); + else + writel(tmp & ~SDHCI_INT_CARD_INT, + host->ioaddr + SDHCI_SIGNAL_ENABLE); + if (!host->plat_data->status(host->mmc->parent)) + schedule_work(&host->cd_wq); + } + } + + mmiowb(); + spin_unlock_irqrestore(&host->lock, flags); +} + +static void sdhci_cd_timer(unsigned long data) +{ + struct sdhci_host *host; + + host = (struct sdhci_host *)data; + host->flags |= SDHCI_CD_TIMEOUT; + schedule_work(&host->cd_wq); +} + +/*****************************************************************************\ + * * + * Interrupt handling * + * * +\*****************************************************************************/ + +static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) +{ + BUG_ON(intmask == 0); + + if (!host->cmd) { + printk(KERN_ERR "%s: Got command interrupt 0x%08x even " + "though no command operation was in progress.\n", + mmc_hostname(host->mmc), (unsigned)intmask); + sdhci_dumpregs(host); + return; + } + + if (intmask & SDHCI_INT_TIMEOUT) + host->cmd->error = -ETIMEDOUT; + else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | + SDHCI_INT_INDEX)) + host->cmd->error = -EILSEQ; + + if (host->cmd->error) + tasklet_schedule(&host->finish_tasklet); + else if (intmask & SDHCI_INT_RESPONSE) + sdhci_finish_command(host); +} + +static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) +{ + u32 intsave = 0; + + BUG_ON(intmask == 0); + + if (!host->data) { + /* + * A data end interrupt is sent together with the response + * for the stop command. + */ + if (intmask & SDHCI_INT_DATA_END) + return; + + printk(KERN_ERR "%s: Got data interrupt 0x%08x even " + "though no data operation was in progress.\n", + mmc_hostname(host->mmc), (unsigned)intmask); + sdhci_dumpregs(host); + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + return; + } + + /* Mask the INT */ + intsave = readl(host->ioaddr + SDHCI_INT_ENABLE); + writel(intsave & (~(intmask & SDHCI_INT_DATA_RE_MASK)), + host->ioaddr + SDHCI_INT_ENABLE); + + if (intmask & SDHCI_INT_DATA_TIMEOUT) + host->data->error = -ETIMEDOUT; + else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT)) + host->data->error = -EILSEQ; + + if (host->data->error) + sdhci_finish_data(host); + else { + if ((host->flags & SDHCI_USE_EXTERNAL_DMA) && + (host->dma_size >= mxc_wml_value)) { + /* Use DMA if transfer size is greater than fifo size */ + if (intmask & (SDHCI_INT_DATA_AVAIL | + SDHCI_INT_SPACE_AVAIL)) { + intsave &= ~SDHCI_INT_DATA_RE_MASK; + if (mxc_dma_enable(host->dma) < 0) { + printk(KERN_ERR "ENABLE SDMA ERR.\n"); + intsave |= SDHCI_INT_DATA_RE_MASK; + } + } + } else { + if (intmask & (SDHCI_INT_DATA_AVAIL | + SDHCI_INT_SPACE_AVAIL)) + sdhci_transfer_pio(host); + } + + /* + * We currently don't do anything fancy with DMA + * boundaries, but as we can't disable the feature + * we need to at least restart the transfer. + */ + if ((intmask & SDHCI_INT_DMA_END) && + (!(intmask & SDHCI_INT_DATA_END))) + writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS), + host->ioaddr + SDHCI_DMA_ADDRESS); + + if (intmask & SDHCI_INT_DATA_END) { + if (host->data->flags & MMC_DATA_READ) + writel(readl(host->ioaddr + SDHCI_CLOCK_CONTROL) + & ~SDHCI_CLOCK_HLK_EN, + host->ioaddr + SDHCI_CLOCK_CONTROL); + if (host->cmd) { + /* + * Data managed to finish before the + * command completed. Make sure we do + * things in the proper order. + */ + host->data_early = 1; + } else { + + if (host->plat_data->vendor_ver + < ESDHC_VENDOR_V22) { + /* + * There are the DATA END INT when + * writing is not complete. Double + * check on it. TO2 has been fixed it. + */ + intmask = readl(host->ioaddr + + SDHCI_PRESENT_STATE); + if (intmask & SDHCI_DATA_ACTIVE) + goto data_irq_out; + } + sdhci_finish_data(host); + } + } + } + data_irq_out: + /* Enable the INT */ + writel(intsave, host->ioaddr + SDHCI_INT_ENABLE); +} + +/*! +* This function is called by DMA Interrupt Service Routine to indicate +* requested DMA transfer is completed. +* +* @param devid pointer to device specific structure +* @param error any DMA error +* @param cnt amount of data that was transferred +*/ +static void sdhci_dma_irq(void *devid, int error, unsigned int cnt) +{ + u32 intsave = 0; + int ret; + struct sdhci_host *host = devid; + + DBG("%s: error: %d Transferred bytes:%d\n", DRIVER_NAME, error, cnt); + if (host->flags & SDHCI_USE_EXTERNAL_DMA) { + /* + * Stop the DMA transfer here, the data_irq would be called + * to process the others + */ + ret = mxc_dma_disable(host->dma); + if (ret < 0) + printk(KERN_ERR "Disable dma channel err %d\n", ret); + + if (error) { + DBG("Error in DMA transfer\n"); + return; + } + intsave = readl(host->ioaddr + SDHCI_INT_ENABLE); + intsave |= SDHCI_INT_DATA_RE_MASK; + writel(intsave, host->ioaddr + SDHCI_INT_ENABLE); + } +} + +/* woke queue handler func */ +static void esdhc_cd_callback(struct work_struct *work) +{ + unsigned long flags; + unsigned int cd_status = 0; + struct sdhci_host *host = container_of(work, struct sdhci_host, cd_wq); + + do { + if (host->detect_irq == 0) + break; + cd_status = host->plat_data->status(host->mmc->parent); + if (cd_status) + set_irq_type(host->detect_irq, IRQF_TRIGGER_FALLING); + else + set_irq_type(host->detect_irq, IRQF_TRIGGER_RISING); + } while (cd_status != host->plat_data->status(host->mmc->parent)); + + cd_status = host->plat_data->status(host->mmc->parent); + + DBG("cd_status=%d %s\n", cd_status, cd_status ? "removed" : "inserted"); + /* If there is no card, call the card detection func + * immediately. */ + if (!cd_status) { + /* If there is a card in the slot, the timer is start + * to work. Then the card detection would be carried + * after the timer is timeout. + * */ + if (host->flags & SDHCI_CD_TIMEOUT) + host->flags &= ~SDHCI_CD_TIMEOUT; + else { + mod_timer(&host->cd_timer, jiffies + HZ / 4); + return; + } + } + + cd_status = host->plat_data->status(host->mmc->parent); + if (cd_status) + host->flags &= ~SDHCI_CD_PRESENT; + else + host->flags |= SDHCI_CD_PRESENT; + /* Detect there is a card in slot or not */ + DBG("cd_status=%d %s\n", cd_status, + (host->flags & SDHCI_CD_PRESENT) ? "inserted" : "removed"); + + spin_lock_irqsave(&host->lock, flags); + + if (!(host->flags & SDHCI_CD_PRESENT)) { + printk(KERN_INFO + "%s: Card removed and resetting controller.\n", + mmc_hostname(host->mmc)); + if (host->mrq) { + struct mmc_data *data; + data = host->data; + host->data = NULL; + + printk(KERN_ERR + "%s: Card removed during transfer!\n", + mmc_hostname(host->mmc)); + printk(KERN_ERR + "%s: Resetting controller.\n", + mmc_hostname(host->mmc)); + + if ((host->flags & SDHCI_USE_EXTERNAL_DMA) && + (data != NULL)) { + dma_unmap_sg(mmc_dev(host->mmc), data->sg, + host->dma_len, host->dma_dir); + host->dma_size = 0; + } + sdhci_reset(host, SDHCI_RESET_CMD); + sdhci_reset(host, SDHCI_RESET_DATA); + + host->mrq->cmd->error = -ENOMEDIUM; + tasklet_schedule(&host->finish_tasklet); + } + + if (host->init_flag > 0) + /* The initialization of sdhc controller has been + * done in the resume func */ + host->init_flag--; + else + sdhci_init(host); + } + + spin_unlock_irqrestore(&host->lock, flags); + + if (host->flags & SDHCI_CD_PRESENT) { + del_timer(&host->cd_timer); + mmc_detect_change(host->mmc, msecs_to_jiffies(100)); + } else + mmc_detect_change(host->mmc, 0); +} + +/*! +* Card detection interrupt service routine registered to handle +* the SDHC interrupts. This interrupt routine handles card +* insertion and card removal interrupts. +* +* @param irq the interrupt number +* @param devid driver private data +* +* @return The function returns \b IRQ_RETVAL(1) +*/ +static irqreturn_t sdhci_cd_irq(int irq, void *dev_id) +{ + struct sdhci_host *host = dev_id; + + schedule_work(&host->cd_wq); + + return IRQ_HANDLED; +} + +static irqreturn_t sdhci_irq(int irq, void *dev_id) +{ + irqreturn_t result; + struct sdhci_host *host = dev_id; + u32 intmask; + int cardint = 0; + + spin_lock(&host->lock); + + intmask = readl(host->ioaddr + SDHCI_INT_STATUS); + + if (!intmask || intmask == 0xffffffff) { + result = IRQ_NONE; + goto out; + } + + DBG("*** %s got interrupt: 0x%08x\n", mmc_hostname(host->mmc), intmask); + + if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { + writel(intmask & + (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE), + host->ioaddr + SDHCI_INT_STATUS); + tasklet_schedule(&host->card_tasklet); + } + + intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); + + if (intmask & SDHCI_INT_CMD_MASK) { + writel(intmask & SDHCI_INT_CMD_MASK, + host->ioaddr + SDHCI_INT_STATUS); + sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); + } + + if (intmask & SDHCI_INT_DATA_MASK) { + writel(intmask & SDHCI_INT_DATA_MASK, + host->ioaddr + SDHCI_INT_STATUS); + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) { + if (! + (readl(host->ioaddr + SDHCI_TRANSFER_MODE) & + SDHCI_TRNS_READ)) + intmask &= ~SDHCI_INT_DATA_END_BIT; + } + if (intmask & SDHCI_INT_DATA_MASK) + sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); + } + + intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); + + intmask &= ~SDHCI_INT_ERROR; + + if (intmask & SDHCI_INT_BUS_POWER) { + printk(KERN_ERR "%s: Card is consuming too much power!\n", + mmc_hostname(host->mmc)); + writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS); + } + + intmask &= ~SDHCI_INT_BUS_POWER; + + if (intmask & SDHCI_INT_CARD_INT) + cardint = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE) & + SDHCI_INT_CARD_INT; + + intmask &= ~SDHCI_INT_CARD_INT; + + if (intmask) { + printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", + mmc_hostname(host->mmc), intmask); + sdhci_dumpregs(host); + + writel(intmask, host->ioaddr + SDHCI_INT_STATUS); + } + + result = IRQ_HANDLED; + + mmiowb(); + out: + spin_unlock(&host->lock); + + /* + * We have to delay this as it calls back into the driver. + */ + if (cardint) + mmc_signal_sdio_irq(host->mmc); + + return result; +} + +/*****************************************************************************\ + * * + * Suspend/resume * + * * +\*****************************************************************************/ + +#ifdef CONFIG_PM + +static int sdhci_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct sdhci_chip *chip; + int i, ret; + + chip = dev_get_drvdata(&pdev->dev); + if (!chip) + return 0; + + DBG("Suspending...\n"); + + for (i = 0; i < chip->num_slots; i++) { + if (!chip->hosts[i]) + continue; + ret = mmc_suspend_host(chip->hosts[i]->mmc, state); + if (ret) { + for (i--; i >= 0; i--) + mmc_resume_host(chip->hosts[i]->mmc); + return ret; + } + } + + for (i = 0; i < chip->num_slots; i++) { + if (!chip->hosts[i]) + continue; + free_irq(chip->hosts[i]->irq, chip->hosts[i]); + } + + return 0; +} + +static int sdhci_resume(struct platform_device *pdev) +{ + struct sdhci_chip *chip; + int i, ret; + + chip = dev_get_drvdata(&pdev->dev); + if (!chip) + return 0; + + DBG("Resuming...\n"); + + for (i = 0; i < chip->num_slots; i++) { + if (!chip->hosts[i]) + continue; + ret = request_irq(chip->hosts[i]->irq, sdhci_irq, + IRQF_SHARED, + mmc_hostname(chip->hosts[i]->mmc), + chip->hosts[i]); + if (ret) + return ret; + sdhci_init(chip->hosts[i]); + chip->hosts[i]->init_flag = 2; + mmiowb(); + ret = mmc_resume_host(chip->hosts[i]->mmc); + if (ret) + return ret; + } + + return 0; +} + +#else /* CONFIG_PM */ + +#define sdhci_suspend NULL +#define sdhci_resume NULL + +#endif /* CONFIG_PM */ + +/*****************************************************************************\ + * * + * Device probing/removal * + * * +\*****************************************************************************/ + +static int __devinit sdhci_probe_slot(struct platform_device + *pdev, int slot) +{ + struct mxc_mmc_platform_data *mmc_plat = pdev->dev.platform_data; + int ret = 0; + unsigned int version, caps; + struct sdhci_chip *chip; + struct mmc_host *mmc; + struct sdhci_host *host; + mxc_dma_device_t dev_id = 0; + + if (!mmc_plat) + return -EINVAL; + + chip = dev_get_drvdata(&pdev->dev); + BUG_ON(!chip); + + mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev); + if (!mmc) + return -ENOMEM; + + host = mmc_priv(mmc); + host->mmc = mmc; + host->id = pdev->id; + host->dma = -1; + host->plat_data = mmc_plat; + if (!host->plat_data) { + ret = -EINVAL; + goto out0; + } + + host->chip = chip; + chip->hosts[slot] = host; + + /* Get pwr supply for eSDHC */ + if (NULL != mmc_plat->power_mmc) { + host->regulator_mmc = + regulator_get(&pdev->dev, mmc_plat->power_mmc); + if (IS_ERR(host->regulator_mmc)) { + ret = PTR_ERR(host->regulator_mmc); + goto out1; + } + if (regulator_enable(host->regulator_mmc) == 0) { + DBG("mmc power on\n"); + msleep(1); + } + } + + /* Active the eSDHC bus */ + gpio_sdhc_active(pdev->id); + + /* Get the SDHC clock from clock system APIs */ + host->clk = clk_get(&pdev->dev, mmc_plat->clock_mmc); + if (NULL == host->clk) + printk(KERN_ERR "MXC MMC can't get clock.\n"); + DBG("SDHC:%d clock:%lu\n", pdev->id, clk_get_rate(host->clk)); + + host->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!host->res) { + ret = -ENOMEM; + goto out2; + } + host->irq = platform_get_irq(pdev, 0); + if (!host->irq) { + ret = -ENOMEM; + goto out2; + } + host->detect_irq = platform_get_irq(pdev, 1); + if (!host->detect_irq) { + host->flags &= ~SDHCI_CD_PRESENT; + if ((pdev->id >= 0) && (pdev->id < MXC_SDHCI_NUM)) + mxc_fix_chips[pdev->id] = chip; + goto no_detect_irq; + } + + do { + ret = host->plat_data->status(host->mmc->parent); + if (ret) + set_irq_type(host->detect_irq, IRQF_TRIGGER_FALLING); + else + set_irq_type(host->detect_irq, IRQF_TRIGGER_RISING); + } while (ret != host->plat_data->status(host->mmc->parent)); + + ret = host->plat_data->status(host->mmc->parent); + if (ret) + host->flags &= ~SDHCI_CD_PRESENT; + else + host->flags |= SDHCI_CD_PRESENT; + + no_detect_irq: + DBG("slot %d at 0x%x, irq %d \n", slot, host->res->start, host->irq); + if (!request_mem_region(host->res->start, + host->res->end - + host->res->start + 1, pdev->name)) { + printk(KERN_ERR "request_mem_region failed\n"); + ret = -ENOMEM; + goto out2; + } + host->ioaddr = (void *)ioremap(host->res->start, host->res->end - + host->res->start + 1); + if (!host->ioaddr) { + ret = -ENOMEM; + goto out3; + } + + sdhci_reset(host, SDHCI_RESET_ALL); + + version = readl(host->ioaddr + SDHCI_HOST_VERSION); + host->plat_data->vendor_ver = (version & SDHCI_VENDOR_VER_MASK) >> + SDHCI_VENDOR_VER_SHIFT; + version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; + if (version != 1) { + printk(KERN_ERR "%s: Unknown controller version (%d). " + "You may experience problems.\n", mmc_hostname(mmc), + version); + } + + caps = readl(host->ioaddr + SDHCI_CAPABILITIES); + + if (chip->quirks & SDHCI_QUIRK_FORCE_DMA) + host->flags |= SDHCI_USE_DMA; + else if (!(caps & SDHCI_CAN_DO_DMA)) + DBG("Controller doesn't have DMA capability\n"); + else if (chip-> + quirks & (SDHCI_QUIRK_INTERNAL_ADVANCED_DMA | + SDHCI_QUIRK_INTERNAL_SIMPLE_DMA)) + host->flags |= SDHCI_USE_DMA; + else if (chip->quirks & (SDHCI_QUIRK_EXTERNAL_DMA_MODE)) + host->flags |= SDHCI_USE_EXTERNAL_DMA; + else + host->flags &= ~SDHCI_USE_DMA; + + /* + * These definitions of eSDHC are not compatible with the SD Host + * Controller Spec v2.0 + */ + host->min_clk = mmc_plat->min_clk; + host->max_clk = mmc_plat->max_clk; + host->timeout_clk = 1024 * 1000; /* Just set the value temply. */ + + /* + * Set host parameters. + */ + mmc->ops = &sdhci_ops; + mmc->f_min = host->min_clk; + mmc->f_max = host->max_clk; + mmc->caps = MMC_CAP_SDIO_IRQ; + mmc->caps |= mmc_plat->caps; + + if (caps & SDHCI_CAN_DO_HISPD) + mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; + + mmc->ocr_avail = mmc_plat->ocr_mask; + if (caps & SDHCI_CAN_VDD_330) + mmc->ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; + if (caps & SDHCI_CAN_VDD_300) + mmc->ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; + if (caps & SDHCI_CAN_VDD_180) + mmc->ocr_avail |= MMC_VDD_165_195; + + if (mmc->ocr_avail == 0) { + printk(KERN_ERR "%s: Hardware doesn't report any " + "support voltages.\n", mmc_hostname(mmc)); + ret = -ENODEV; + goto out3; + } + + spin_lock_init(&host->lock); + + /* + * Maximum number of segments. Hardware cannot do scatter lists. + */ + if (host->flags & SDHCI_USE_DMA) + mmc->max_hw_segs = 1; + else + mmc->max_hw_segs = 16; + mmc->max_phys_segs = 16; + + /* + * Maximum number of sectors in one transfer. Limited by DMA boundary + * size (512KiB). + */ + if (host->flags & SDHCI_USE_EXTERNAL_DMA) + mmc->max_req_size = 32 * 1024; + else + mmc->max_req_size = 524288; + + /* + * Maximum segment size. Could be one segment with the maximum number + * of bytes. + */ + mmc->max_seg_size = mmc->max_req_size; + + /* + * Maximum block size. This varies from controller to controller and + * is specified in the capabilities register. + */ + mmc->max_blk_size = + (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT; + if (mmc->max_blk_size > 3) { + printk(KERN_WARNING "%s: Invalid maximum block size, " + "assuming 512 bytes\n", mmc_hostname(mmc)); + mmc->max_blk_size = 512; + } else + mmc->max_blk_size = 512 << mmc->max_blk_size; + + /* + * Maximum block count. + */ + mmc->max_blk_count = 65535; + + /* + * Apply a continous physical memory used for storing the ADMA + * descriptor table. + */ + if (host->flags & SDHCI_USE_DMA) { + adma_des_table = kcalloc((2 * (mmc->max_phys_segs) + 1), + sizeof(unsigned int), GFP_DMA); + if (adma_des_table == NULL) { + printk(KERN_ERR "Cannot allocate ADMA memory\n"); + ret = -ENOMEM; + goto out3; + } + } + + /* + * Init tasklets. + */ + tasklet_init(&host->card_tasklet, + sdhci_tasklet_card, (unsigned long)host); + tasklet_init(&host->finish_tasklet, + sdhci_tasklet_finish, (unsigned long)host); + + /* initialize the work queue */ + INIT_WORK(&host->cd_wq, esdhc_cd_callback); + + setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); + setup_timer(&host->cd_timer, sdhci_cd_timer, (unsigned long)host); + + if (host->detect_irq) { + ret = request_irq(host->detect_irq, sdhci_cd_irq, 0, + pdev->name, host); + if (ret) + goto out4; + } + + ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, pdev->name, host); + if (ret) + goto out5; + + sdhci_init(host); + + if (host->flags & SDHCI_USE_EXTERNAL_DMA) { + /* Apply the 1-bit SDMA channel. */ + if (host->id == 0) + dev_id = MXC_DMA_MMC1_WIDTH_1; + else + dev_id = MXC_DMA_MMC2_WIDTH_1; + host->dma = mxc_dma_request(dev_id, "MXC MMC"); + if (host->dma < 0) { + DBG("Cannot allocate MMC DMA channel\n"); + goto out6; + } + mxc_dma_callback_set(host->dma, sdhci_dma_irq, (void *)host); + } +#ifdef CONFIG_MMC_DEBUG + sdhci_dumpregs(host); +#endif + + mmiowb(); + + if (mmc_add_host(mmc) < 0) + goto out6; + if (host->flags & SDHCI_USE_EXTERNAL_DMA) + printk(KERN_INFO "%s: SDHCI detect irq %d irq %d %s\n", + mmc_hostname(mmc), host->detect_irq, host->irq, + "EXTERNAL DMA"); + else + printk(KERN_INFO "%s: SDHCI detect irq %d irq %d %s\n", + mmc_hostname(mmc), host->detect_irq, host->irq, + (host->flags & SDHCI_USE_DMA) ? "INTERNAL DMA" : "PIO"); + + return 0; + + out6: + free_irq(host->irq, host); + out5: + if (host->detect_irq) + free_irq(host->detect_irq, host); + else { + if ((pdev->id >= 0) && (pdev->id < MXC_SDHCI_NUM)) + mxc_fix_chips[pdev->id] = chip; + } + out4: + del_timer_sync(&host->timer); + del_timer_sync(&host->cd_timer); + tasklet_kill(&host->card_tasklet); + tasklet_kill(&host->finish_tasklet); + out3: + if (host->flags & SDHCI_USE_DMA) + kfree(adma_des_table); + release_mem_region(host->res->start, + host->res->end - host->res->start + 1); + out2: + clk_disable(host->clk); + host->plat_data->clk_flg = 0; + clk_put(host->clk); + out1: + gpio_sdhc_inactive(pdev->id); + out0: + mmc_free_host(mmc); + return ret; +} + +static void sdhci_remove_slot(struct platform_device *pdev, int slot) +{ + struct sdhci_chip *chip; + struct mmc_host *mmc; + struct sdhci_host *host; + + chip = dev_get_drvdata(&pdev->dev); + host = chip->hosts[slot]; + mmc = host->mmc; + + chip->hosts[slot] = NULL; + + mmc_remove_host(mmc); + + sdhci_reset(host, SDHCI_RESET_ALL); + + if (host->detect_irq) + free_irq(host->detect_irq, host); + else { + if ((pdev->id >= 0) && (pdev->id < MXC_SDHCI_NUM)) + mxc_fix_chips[pdev->id] = NULL; + } + free_irq(host->irq, host); + if (chip->quirks & SDHCI_QUIRK_EXTERNAL_DMA_MODE) { + host->flags &= ~SDHCI_USE_EXTERNAL_DMA; + mxc_dma_free(host->dma); + } + + del_timer_sync(&host->timer); + + tasklet_kill(&host->card_tasklet); + tasklet_kill(&host->finish_tasklet); + + if (host->flags & SDHCI_USE_DMA) + kfree(adma_des_table); + release_mem_region(host->res->start, + host->res->end - host->res->start + 1); + clk_disable(host->clk); + host->plat_data->clk_flg = 0; + clk_put(host->clk); + mmc_free_host(mmc); + gpio_sdhc_inactive(pdev->id); +} + +static int sdhci_probe(struct platform_device *pdev) +{ + int ret = 0, i; + u8 slots = 1; + struct sdhci_chip *chip; + + printk(KERN_INFO DRIVER_NAME ": MXC SDHCI Controller Driver. \n"); + BUG_ON(pdev == NULL); + + chip = kzalloc(sizeof(struct sdhci_chip) + + sizeof(struct sdhci_host *) * slots, GFP_KERNEL); + if (!chip) { + ret = -ENOMEM; + goto err; + } + + /* Distinguish different platform */ + if (machine_is_mx37_3ds()) { + mxc_quirks = SDHCI_QUIRK_EXTERNAL_DMA_MODE; + } else { + mxc_quirks = SDHCI_QUIRK_INTERNAL_ADVANCED_DMA | + SDHCI_QUIRK_INTERNAL_SIMPLE_DMA; + } + chip->pdev = pdev; + chip->quirks = mxc_quirks; + + if (debug_quirks) + chip->quirks = debug_quirks; + + chip->num_slots = slots; + dev_set_drvdata(&pdev->dev, chip); + + for (i = 0; i < slots; i++) { + ret = sdhci_probe_slot(pdev, i); + if (ret) { + for (i--; i >= 0; i--) + sdhci_remove_slot(pdev, i); + goto free; + } + } + + return 0; + + free: + dev_set_drvdata(&pdev->dev, NULL); + kfree(chip); + + err: + return ret; +} + +static int sdhci_remove(struct platform_device *pdev) +{ + int i; + struct sdhci_chip *chip; + + chip = dev_get_drvdata(&pdev->dev); + + if (chip) { + for (i = 0; i < chip->num_slots; i++) + sdhci_remove_slot(pdev, i); + + dev_set_drvdata(&pdev->dev, NULL); + + kfree(chip); + } + + return 0; +} + +static struct platform_driver sdhci_driver = { + .driver = { + .name = DRIVER_NAME, + }, + .probe = sdhci_probe, + .remove = sdhci_remove, + .suspend = sdhci_suspend, + .resume = sdhci_resume, +}; + +/*****************************************************************************\ + * * + * Driver init/exit * + * * +\*****************************************************************************/ + +static int __init sdhci_drv_init(void) +{ + printk(KERN_INFO DRIVER_NAME + ": MXC Secure Digital Host Controller Interface driver\n"); + return platform_driver_register(&sdhci_driver); +} + +static void __exit sdhci_drv_exit(void) +{ + DBG("Exiting\n"); + + platform_driver_unregister(&sdhci_driver); +} + +module_init(sdhci_drv_init); +module_exit(sdhci_drv_exit); + +module_param(debug_quirks, uint, 0444); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Secure Digital Host Controller Interface driver"); +MODULE_LICENSE("GPL"); + +MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/host/mxc_mmc.h +++ linux-fsl-imx51-2.6.31/drivers/mmc/host/mxc_mmc.h @@ -0,0 +1,126 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MXC_MMC_REG_H__ +#define __MXC_MMC_REG_H__ + +#include + +/*! + * @defgroup MMC_SD MMC/SD Driver + */ + +/*! + * @file mxc_mmc.h + * + * @brief Driver for the Freescale Semiconductor MXC SDHC modules. + * + * This file defines offsets and bits of SDHC registers. SDHC is also referred as + * MMC/SD controller + * + * @ingroup MMC_SD + */ + +/*! + * Number of SDHC modules + */ + +#define SDHC_MMC_WML 16 +#define SDHC_SD_WML 64 +#define DRIVER_NAME "MXCMMC" +#define SDHC_MEM_SIZE 16384 +#define SDHC_REV_NO 0x400 +#define READ_TO_VALUE 0x2db4 + +/* Address offsets of the SDHC registers */ +#define MMC_STR_STP_CLK 0x00 /* Clock Control Reg */ +#define MMC_STATUS 0x04 /* Status Reg */ +#define MMC_CLK_RATE 0x08 /* Clock Rate Reg */ +#define MMC_CMD_DAT_CONT 0x0C /* Command and Data Control Reg */ +#define MMC_RES_TO 0x10 /* Response Time-out Reg */ +#define MMC_READ_TO 0x14 /* Read Time-out Reg */ +#define MMC_BLK_LEN 0x18 /* Block Length Reg */ +#define MMC_NOB 0x1C /* Number of Blocks Reg */ +#define MMC_REV_NO 0x20 /* Revision Number Reg */ +#define MMC_INT_CNTR 0x24 /* Interrupt Control Reg */ +#define MMC_CMD 0x28 /* Command Number Reg */ +#define MMC_ARG 0x2C /* Command Argument Reg */ +#define MMC_RES_FIFO 0x34 /* Command Response Reg */ +#define MMC_BUFFER_ACCESS 0x38 /* Data Buffer Access Reg */ +#define MMC_REM_NOB 0x40 /* Remaining NOB Reg */ +#define MMC_REM_BLK_SIZE 0x44 /* Remaining Block Size Reg */ + +/* Bit definitions for STR_STP_CLK */ +#define STR_STP_CLK_RESET (1<<3) +#define STR_STP_CLK_START_CLK (1<<1) +#define STR_STP_CLK_STOP_CLK (1<<0) + +/* Bit definitions for STATUS */ +#define STATUS_CARD_INSERTION (1<<31) +#define STATUS_CARD_REMOVAL (1<<30) +#define STATUS_YBUF_EMPTY (1<<29) +#define STATUS_XBUF_EMPTY (1<<28) +#define STATUS_YBUF_FULL (1<<27) +#define STATUS_XBUF_FULL (1<<26) +#define STATUS_BUF_UND_RUN (1<<25) +#define STATUS_BUF_OVFL (1<<24) +#define STATUS_SDIO_INT_ACTIVE (1<<14) +#define STATUS_END_CMD_RESP (1<<13) +#define STATUS_WRITE_OP_DONE (1<<12) +#define STATUS_READ_OP_DONE (1<<11) +#define STATUS_WR_CRC_ERROR_CODE_MASK (3<<9) +#define STATUS_CARD_BUS_CLK_RUN (1<<8) +#define STATUS_BUF_READ_RDY (1<<7) +#define STATUS_BUF_WRITE_RDY (1<<6) +#define STATUS_RESP_CRC_ERR (1<<5) +#define STATUS_READ_CRC_ERR (1<<3) +#define STATUS_WRITE_CRC_ERR (1<<2) +#define STATUS_TIME_OUT_RESP (1<<1) +#define STATUS_TIME_OUT_READ (1<<0) +#define STATUS_ERR_MASK 0x3f + +/* Clock rate definitions */ +#define CLK_RATE_PRESCALER(x) ((x) & 0xF) +#define CLK_RATE_CLK_DIVIDER(x) (((x) & 0xF) << 4) + +/* Bit definitions for CMD_DAT_CONT */ +#define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1<<12) +#define CMD_DAT_CONT_STOP_READWAIT (1<<11) +#define CMD_DAT_CONT_START_READWAIT (1<<10) +#define CMD_DAT_CONT_BUS_WIDTH_1 (0<<8) +#define CMD_DAT_CONT_BUS_WIDTH_4 (2<<8) +#define CMD_DAT_CONT_INIT (1<<7) +#define CMD_DAT_CONT_WRITE (1<<4) +#define CMD_DAT_CONT_DATA_ENABLE (1<<3) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R1 (1) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R2 (2) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R3 (3) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R4 (4) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R5 (5) +#define CMD_DAT_CONT_RESPONSE_FORMAT_R6 (6) + +/* Bit definitions for INT_CNTR */ +#define INT_CNTR_SDIO_INT_WKP_EN (1<<18) +#define INT_CNTR_CARD_INSERTION_WKP_EN (1<<17) +#define INT_CNTR_CARD_REMOVAL_WKP_EN (1<<16) +#define INT_CNTR_CARD_INSERTION_EN (1<<15) +#define INT_CNTR_CARD_REMOVAL_EN (1<<14) +#define INT_CNTR_SDIO_IRQ_EN (1<<13) +#define INT_CNTR_DAT0_EN (1<<12) +#define INT_CNTR_BUF_READ_EN (1<<4) +#define INT_CNTR_BUF_WRITE_EN (1<<3) +#define INT_CNTR_END_CMD_RES (1<<2) +#define INT_CNTR_WRITE_OP_DONE (1<<1) +#define INT_CNTR_READ_OP_DONE (1<<0) + +#endif /* __MXC_MMC_REG_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/core/mmc.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/core/mmc.c @@ -180,11 +180,11 @@ err = mmc_send_ext_csd(card, ext_csd); if (err) { - /* - * We all hosts that cannot perform the command - * to fail more gracefully - */ - if (err != -EINVAL) + /* If the host or the card can't do the switch, + * fail more gracefully. */ + if ((err != -EINVAL) + && (err != -ENOSYS) + && (err != -EFAULT)) goto out; /* --- linux-fsl-imx51-2.6.31.orig/drivers/mmc/core/sd.c +++ linux-fsl-imx51-2.6.31/drivers/mmc/core/sd.c @@ -210,11 +210,11 @@ err = mmc_sd_switch(card, 0, 0, 1, status); if (err) { - /* - * We all hosts that cannot perform the command - * to fail more gracefully - */ - if (err != -EINVAL) + /* If the host or the card can't do the switch, + * fail more gracefully. */ + if ((err != -EINVAL) + && (err != -ENOSYS) + && (err != -EFAULT)) goto out; printk(KERN_WARNING "%s: problem reading switch " --- linux-fsl-imx51-2.6.31.orig/drivers/cpuidle/cpuidle.c +++ linux-fsl-imx51-2.6.31/drivers/cpuidle/cpuidle.c @@ -75,8 +75,11 @@ #endif /* ask the governor for the next state */ next_state = cpuidle_curr_governor->select(dev); - if (need_resched()) + if (need_resched()) { + local_irq_enable(); return; + } + target_state = &dev->states[next_state]; /* enter the state and update stats */ --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/mx31ads-pcmcia.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/mx31ads-pcmcia.c @@ -0,0 +1,1291 @@ +/*====================================================================== + drivers/pcmcia/mx31ads-pcmica.c + + Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + + Device driver for the PCMCIA control functionality of i.Mx31 + microprocessors. + + The contents of this file are subject to the Mozilla Public + License Version 1.1 (the "License"); you may not use this file + except in compliance with the License. You may obtain a copy of + the License at http://www.mozilla.org/MPL/ + + Software distributed under the License is distributed on an "AS + IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or + implied. See the License for the specific language governing + rights and limitations under the License. + + The initial developer of the original code is John G. Dorsey + . Portions created by John G. Dorsey are + Copyright (C) 1999 John G. Dorsey. All Rights Reserved. + + Alternatively, the contents of this file may be used under the + terms of the GNU Public License version 2 (the "GPL"), in which + case the provisions of the GPL are applicable instead of the + above. If you wish to allow the use of your version of this file + only under the terms of the GPL and not to allow others to use + your version of this file under the MPL, indicate your decision + by deleting the provisions above and replace them with the notice + and other provisions required by the GPL. If you do not delete + the provisions above, a recipient may use your version of this + file under either the MPL or the GPL. + +======================================================================*/ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mx31ads-pcmcia.h" +#include + +#define MX31ADS_PCMCIA_IRQ MXC_INT_PCMCIA + +/* + * The mapping of window size to bank size value + */ +static bsize_map_t bsize_map[] = { + /* Window size Bank size */ + {POR_1, POR_BSIZE_1}, + {POR_2, POR_BSIZE_2}, + {POR_4, POR_BSIZE_4}, + {POR_8, POR_BSIZE_8}, + {POR_16, POR_BSIZE_16}, + {POR_32, POR_BSIZE_32}, + {POR_64, POR_BSIZE_64}, + {POR_128, POR_BSIZE_128}, + {POR_256, POR_BSIZE_256}, + {POR_512, POR_BSIZE_512}, + + {POR_1K, POR_BSIZE_1K}, + {POR_2K, POR_BSIZE_2K}, + {POR_4K, POR_BSIZE_4K}, + {POR_8K, POR_BSIZE_8K}, + {POR_16K, POR_BSIZE_16K}, + {POR_32K, POR_BSIZE_32K}, + {POR_64K, POR_BSIZE_64K}, + {POR_128K, POR_BSIZE_128K}, + {POR_256K, POR_BSIZE_256K}, + {POR_512K, POR_BSIZE_512K}, + + {POR_1M, POR_BSIZE_1M}, + {POR_2M, POR_BSIZE_2M}, + {POR_4M, POR_BSIZE_4M}, + {POR_8M, POR_BSIZE_8M}, + {POR_16M, POR_BSIZE_16M}, + {POR_32M, POR_BSIZE_32M}, + {POR_64M, POR_BSIZE_64M} +}; + +#define to_mx31ads_pcmcia_socket(x) container_of(x, struct mx31ads_pcmcia_socket, socket) + +/* mx31ads_pcmcia_find_bsize() + * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * + * Find the bsize according to the window size passed in + * + * Return: + */ +static int mx31ads_pcmcia_find_bsize(unsigned long win_size) +{ + int i, nr = sizeof(bsize_map) / sizeof(bsize_map_t); + int bsize = -1; + + for (i = 0; i < nr; i++) { + if (bsize_map[i].win_size == win_size) { + bsize = bsize_map[i].bsize; + break; + } + } + + pr_debug(KERN_INFO "nr = %d bsize = 0x%0x\n", nr, bsize); + if (bsize < 0 || i > nr) { + pr_debug(KERN_INFO "No such bsize\n"); + return -ENODEV; + } + + return bsize; +} + +/* mx31ads_common_pcmcia_sock_init() + * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * + * (Re-)Initialise the socket, turning on status interrupts + * and PCMCIA bus. This must wait for power to stabilise + * so that the card status signals report correctly. + * + * Returns: 0 + */ +static int mx31ads_common_pcmcia_sock_init(struct pcmcia_socket *sock) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + + pr_debug(KERN_INFO "initializing socket\n"); + + skt->ops->socket_init(skt); + return 0; +} + +/* + * mx31ads_common_pcmcia_config_skt + * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * + * Convert PCMCIA socket state to our socket configure structure. + */ +static int +mx31ads_common_pcmcia_config_skt(struct mx31ads_pcmcia_socket *skt, + socket_state_t * state) +{ + int ret; + + ret = skt->ops->configure_socket(skt, state); + if (ret == 0) { + /* + * This really needs a better solution. The IRQ + * may or may not be claimed by the driver. + */ + if (skt->irq_state != 1 && state->io_irq) { + skt->irq_state = 1; + set_irq_type(skt->irq, IRQF_TRIGGER_FALLING); + } else if (skt->irq_state == 1 && state->io_irq == 0) { + skt->irq_state = 0; + set_irq_type(skt->irq, IRQF_TRIGGER_RISING); + } + + skt->cs_state = *state; + } + + if (ret < 0) + pr_debug(KERN_ERR "mx31ads_common_pcmcia: unable to configure" + " socket\n"); + + return ret; +} + +/* + * mx31ads_common_pcmcia_suspend() + * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * + * Remove power on the socket, disable IRQs from the card. + * Turn off status interrupts, and disable the PCMCIA bus. + * + * Returns: 0 + */ +static int mx31ads_common_pcmcia_suspend(struct pcmcia_socket *sock) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + int ret; + + pr_debug(KERN_INFO "suspending socket\n"); + + ret = mx31ads_common_pcmcia_config_skt(skt, &dead_socket); + if (ret == 0) + skt->ops->socket_suspend(skt); + + return ret; +} + +static unsigned int mx31ads_common_pcmcia_skt_state(struct mx31ads_pcmcia_socket + *skt) +{ + struct pcmcia_state state; + unsigned int stat; + + memset(&state, 0, sizeof(struct pcmcia_state)); + + skt->ops->socket_state(skt, &state); + + stat = state.detect ? SS_DETECT : 0; + stat |= state.ready ? SS_READY : 0; + stat |= state.wrprot ? SS_WRPROT : 0; + stat |= state.vs_3v ? SS_3VCARD : 0; + stat |= state.vs_Xv ? SS_XVCARD : 0; + + /* The power status of individual sockets is not available + * explicitly from the hardware, so we just remember the state + * and regurgitate it upon request: + */ + stat |= skt->cs_state.Vcc ? SS_POWERON : 0; + + if (skt->cs_state.flags & SS_IOCARD) + stat |= state.bvd1 ? SS_STSCHG : 0; + else { + if (state.bvd1 == 0) + stat |= SS_BATDEAD; + else if (state.bvd2 == 0) + stat |= SS_BATWARN; + } + + pr_debug(KERN_INFO "stat = 0x%08x\n", stat); + + return stat; +} + +/* + * Implements the get_status() operation for the in-kernel PCMCIA + * service (formerly SS_GetStatus in Card Services). Essentially just + * fills in bits in `status' according to internal driver state or + * the value of the voltage detect chipselect register. + * + * As a debugging note, during card startup, the PCMCIA core issues + * three set_socket() commands in a row the first with RESET deasserted, + * the second with RESET asserted, and the last with RESET deasserted + * again. Following the third set_socket(), a get_status() command will + * be issued. The kernel is looking for the SS_READY flag (see + * setup_socket(), reset_socket(), and unreset_socket() in cs.c). + * + * Returns: 0 + */ +static int mx31ads_common_pcmcia_get_status(struct pcmcia_socket *sock, + unsigned int *status) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + + skt->status = mx31ads_common_pcmcia_skt_state(skt); + *status = skt->status; + + return 0; +} + +/* + * Implements the set_socket() operation for the in-kernel PCMCIA + * service (formerly SS_SetSocket in Card Services). We more or + * less punt all of this work and let the kernel handle the details + * of power configuration, reset, &c. We also record the value of + * `state' in order to regurgitate it to the PCMCIA core later. + * + * Returns: 0 + */ +static int mx31ads_common_pcmcia_set_socket(struct pcmcia_socket *sock, + socket_state_t * state) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + + pr_debug(KERN_INFO + "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", + (state->csc_mask == 0) ? " " : "", + (state->csc_mask & SS_DETECT) ? "DETECT " : "", + (state->csc_mask & SS_READY) ? "READY " : "", + (state->csc_mask & SS_BATDEAD) ? "BATDEAD " : "", + (state->csc_mask & SS_BATWARN) ? "BATWARN " : "", + (state->csc_mask & SS_STSCHG) ? "STSCHG " : "", + (state->flags == 0) ? " " : "", + (state->flags & SS_PWR_AUTO) ? "PWR_AUTO " : "", + (state->flags & SS_IOCARD) ? "IOCARD " : "", + (state->flags & SS_RESET) ? "RESET " : "", + (state->flags & SS_SPKR_ENA) ? "SPKR_ENA " : "", + (state->flags & SS_OUTPUT_ENA) ? "OUTPUT_ENA " : "", + state->Vcc, state->Vpp, state->io_irq); + + pr_debug(KERN_INFO + "csc_mask: %08x flags: %08x Vcc: %d Vpp: %d io_irq: %d\n", + state->csc_mask, state->flags, state->Vcc, state->Vpp, + state->io_irq); + + return mx31ads_common_pcmcia_config_skt(skt, state); +} + +/* + * Set address and profile to window registers PBR, POR, POFR + */ +static int mx31ads_pcmcia_set_window_reg(ulong start, ulong end, u_int window) +{ + int bsize; + ulong size = end - start + 1; + + bsize = mx31ads_pcmcia_find_bsize(size); + if (bsize < 0) { + pr_debug("Cannot set the window register\n"); + return -1; + } + /* Disable the window */ + _reg_PCMCIA_POR(window) &= ~PCMCIA_POR_PV; + + /* Set PBR, POR, POFR */ + _reg_PCMCIA_PBR(window) = start; + _reg_PCMCIA_POR(window) &= ~(PCMCIA_POR_PRS_MASK + | PCMCIA_POR_WPEN + | PCMCIA_POR_WP + | PCMCIA_POR_BSIZE_MASK + | PCMCIA_POR_PPS_8); + _reg_PCMCIA_POR(window) |= bsize | PCMCIA_POR_PPS_16; + + switch (window) { + case IO_WINDOW: + _reg_PCMCIA_POR(window) |= PCMCIA_POR_PRS(PCMCIA_POR_PRS_IO); + break; + + case ATTRIBUTE_MEMORY_WINDOW: + _reg_PCMCIA_POR(window) |= + PCMCIA_POR_PRS(PCMCIA_POR_PRS_ATTRIBUTE); + break; + + case COMMON_MEMORY_WINDOW: + _reg_PCMCIA_POR(window) |= + PCMCIA_POR_PRS(PCMCIA_POR_PRS_COMMON); + break; + + default: + pr_debug("Window %d is not support\n", window); + return -1; + } + _reg_PCMCIA_POFR(window) = 0; + + /* Enable the window */ + _reg_PCMCIA_POR(window) |= PCMCIA_POR_PV; + + return 0; +} + +/* + * Implements the set_io_map() operation for the in-kernel PCMCIA + * service (formerly SS_SetIOMap in Card Services). We configure + * the map speed as requested, but override the address ranges + * supplied by Card Services. + * + * Returns: 0 on success, -1 on error + */ +static int +mx31ads_common_pcmcia_set_io_map(struct pcmcia_socket *sock, + struct pccard_io_map *map) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + unsigned short speed = map->speed; + + pr_debug("map %u speed %u start 0x%08x stop 0x%08x\n", + map->map, map->speed, map->start, map->stop); + pr_debug("flags: %s%s%s%s%s%s%s%s\n", + (map->flags == 0) ? "" : "", + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", + (map->flags & MAP_16BIT) ? "16BIT " : "", + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", + (map->flags & MAP_0WS) ? "0WS " : "", + (map->flags & MAP_WRPROT) ? "WRPROT " : "", + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", + (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); + + if (map->map >= MAX_IO_WIN) { + pr_debug(KERN_ERR "%s(): map (%d) out of range\n", __FUNCTION__, + map->map); + return -1; + } + + if (map->flags & MAP_ACTIVE) { + if (speed == 0) + speed = PCMCIA_IO_ACCESS; + } else { + speed = 0; + } + + skt->spd_io[map->map] = speed; + skt->ops->set_timing(skt); + + if (map->stop == 1) + map->stop = PAGE_SIZE - 1; + + skt->socket.io_offset = (unsigned long)skt->virt_io; + map->stop -= map->start; + map->stop += (unsigned long)skt->virt_io; + map->start = (unsigned long)skt->virt_io; + + mx31ads_pcmcia_set_window_reg(skt->res_io.start, skt->res_io.end, + IO_WINDOW); + + pr_debug(KERN_ERR "IO window: _reg_PCMCIA_PBR(%d) = %08x\n", + IO_WINDOW, _reg_PCMCIA_PBR(IO_WINDOW)); + pr_debug(KERN_ERR "IO window: _reg_PCMCIA_POR(%d) = %08x\n", + IO_WINDOW, _reg_PCMCIA_POR(IO_WINDOW)); + + return 0; +} + +/* + * Implements the set_mem_map() operation for the in-kernel PCMCIA + * service (formerly SS_SetMemMap in Card Services). We configure + * the map speed as requested, but override the address ranges + * supplied by Card Services. + * + * Returns: 0 on success, -1 on error + */ +static int +mx31ads_common_pcmcia_set_mem_map(struct pcmcia_socket *sock, + struct pccard_mem_map *map) +{ + struct mx31ads_pcmcia_socket *skt = to_mx31ads_pcmcia_socket(sock); + struct resource *res; + unsigned short speed = map->speed; + + pr_debug + (KERN_INFO + "map %u speed %u card_start %08x flags%08x static_start %08lx\n", + map->map, map->speed, map->card_start, map->flags, + map->static_start); + pr_debug(KERN_INFO "flags: %s%s%s%s%s%s%s%s\n", + (map->flags == 0) ? "" : "", + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", + (map->flags & MAP_16BIT) ? "16BIT " : "", + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", + (map->flags & MAP_0WS) ? "0WS " : "", + (map->flags & MAP_WRPROT) ? "WRPROT " : "", + (map->flags & MAP_ATTRIB) ? "ATTRIB " : "", + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : ""); + + if (map->map >= MAX_WIN) + return -EINVAL; + + if (map->flags & MAP_ACTIVE) { + if (speed == 0) + speed = 300; + } else { + speed = 0; + } + + if (map->flags & MAP_ATTRIB) { + res = &skt->res_attr; + skt->spd_attr[map->map] = speed; + skt->spd_mem[map->map] = 0; + mx31ads_pcmcia_set_window_reg(res->start, res->end, + ATTRIBUTE_MEMORY_WINDOW); + + pr_debug(KERN_INFO "Attr window: _reg_PCMCIA_PBR(%d) = %08x\n", + ATTRIBUTE_MEMORY_WINDOW, + _reg_PCMCIA_PBR(ATTRIBUTE_MEMORY_WINDOW)); + pr_debug(KERN_INFO "_reg_PCMCIA_POR(%d) = %08x\n", + ATTRIBUTE_MEMORY_WINDOW, + _reg_PCMCIA_POR(ATTRIBUTE_MEMORY_WINDOW)); + + } else { + res = &skt->res_mem; + skt->spd_attr[map->map] = 0; + skt->spd_mem[map->map] = speed; + mx31ads_pcmcia_set_window_reg(res->start, res->end, + COMMON_MEMORY_WINDOW); + + pr_debug(KERN_INFO "Com window: _reg_PCMCIA_PBR(%d) = %08x\n", + COMMON_MEMORY_WINDOW, + _reg_PCMCIA_PBR(COMMON_MEMORY_WINDOW)); + pr_debug(KERN_INFO "Com window: _reg_PCMCIA_POR(%d) = %08x\n", + COMMON_MEMORY_WINDOW, + _reg_PCMCIA_POR(COMMON_MEMORY_WINDOW)); + } + + skt->ops->set_timing(skt); + + map->static_start = res->start + map->card_start; + + return 0; +} + +static struct pccard_operations mx31ads_common_pcmcia_operations = { + .init = mx31ads_common_pcmcia_sock_init, + .suspend = mx31ads_common_pcmcia_suspend, + .get_status = mx31ads_common_pcmcia_get_status, + .set_socket = mx31ads_common_pcmcia_set_socket, + .set_io_map = mx31ads_common_pcmcia_set_io_map, + .set_mem_map = mx31ads_common_pcmcia_set_mem_map, +}; + +/* ============================================================================== */ + +static inline void mx31ads_pcmcia_irq_config(void) +{ + /* Setup irq */ + _reg_PCMCIA_PER = + (PCMCIA_PER_RDYLE | PCMCIA_PER_CDE1 | PCMCIA_PER_CDE2); +} + +static inline void mx31ads_pcmcia_invalidate_windows(void) +{ + int i; + + for (i = 0; i < PCMCIA_WINDOWS; i++) { + _reg_PCMCIA_PBR(i) = 0; + _reg_PCMCIA_POR(i) = 0; + _reg_PCMCIA_POFR(i) = 0; + } +} + +extern void gpio_pcmcia_active(void); +extern void gpio_pcmcia_inactive(void); + +static int mx31ads_pcmcia_hw_init(struct mx31ads_pcmcia_socket *skt) +{ + /* Configure the pins for PCMCIA */ + gpio_pcmcia_active(); + + /* + * enabling interrupts at this time causes a flood of interrupts + * if a card is present, so wait for configure_socket + * to enable them when requested. + * + * mx31ads_pcmcia_irq_config(); + */ + mx31ads_pcmcia_invalidate_windows(); + + /* Register interrupt. */ + skt->irq = MX31ADS_PCMCIA_IRQ; + + return 0; +} + +static void mx31ads_pcmcia_free_irq(struct mx31ads_pcmcia_socket *skt, + unsigned int irq) +{ + free_irq(irq, skt); +} + +static void mx31ads_pcmcia_hw_shutdown(struct mx31ads_pcmcia_socket *skt) +{ + mx31ads_pcmcia_invalidate_windows(); + mx31ads_pcmcia_free_irq(skt, MX31ADS_PCMCIA_IRQ); + + /* Disable the pins */ + gpio_pcmcia_inactive(); +} + +/* + * Get the socket state + */ +static void +mx31ads_pcmcia_socket_state(struct mx31ads_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + unsigned long pins; + + pins = _reg_PCMCIA_PIPR; + pr_debug(KERN_INFO "_reg_PCMCIA_PIPR = 0x%08lx\n", pins); + + state->ready = (pins & PCMCIA_PIPR_RDY) ? 1 : 0; + state->bvd2 = (pins & PCMCIA_PIPR_BVD2) ? 1 : 0; + state->bvd1 = (pins & PCMCIA_PIPR_BVD1) ? 1 : 0; + + if ((pins & PCMCIA_PIPR_CD) == PCMCIA_PIPR_CD) { + state->detect = 0; + skt->cs_state.csc_mask |= SS_INSERTION; + } else { + state->detect = 1; + } + state->detect = (pins & PCMCIA_PIPR_CD) ? 0 : 1; + state->wrprot = (pins & PCMCIA_PIPR_WP) ? 1 : 0; + state->poweron = (pins & PCMCIA_PIPR_POWERON) ? 1 : 0; +#if 0 + if ((pins & PCMCIA_PIPR_CD) == PCMCIA_PIPR_CD) { + state->detect = 0; + skt->cs_state.csc_mask |= SS_INSERTION; + } else { + state->detect = 1; + } + if (pins & PCMCIA_PIPR_VS_5V) { + state->vs_3v = 0; + skt->cs_state.Vcc = 33; + } else { + state->vs_3v = 1; + skt->cs_state.Vcc = 50; + } +#endif + state->vs_3v = (pins & PCMCIA_PIPR_VS_5V) ? 0 : 1; + state->vs_Xv = 0; +} + +static __inline__ void mx31ads_pcmcia_low_power(bool enable) +{ + if (enable) + _reg_PCMCIA_PGCR |= PCMCIA_PGCR_LPMEN; + else + _reg_PCMCIA_PGCR &= ~PCMCIA_PGCR_LPMEN; +} + +static __inline__ void mx31ads_pcmcia_soft_reset(void) +{ + _reg_PCMCIA_PGCR |= PCMCIA_PGCR_RESET; + msleep(2); + + _reg_PCMCIA_PGCR &= ~(PCMCIA_PGCR_RESET | PCMCIA_PGCR_LPMEN); + _reg_PCMCIA_PGCR |= PCMCIA_PGCR_POE; + msleep(2); + pr_debug(KERN_INFO "_reg_PCMCIA_PGCR = %08x\n", _reg_PCMCIA_PGCR); +} + +static int +mx31ads_pcmcia_configure_socket(struct mx31ads_pcmcia_socket *skt, + const socket_state_t * state) +{ + int ret = 0; + + if (state->Vcc != 0 && state->Vcc != 33 && state->Vcc != 50) { + pr_debug(KERN_ERR "mx31ads-pcmcia: unrecognized Vcc %d\n", + state->Vcc); + return -1; + } + + pr_debug(KERN_INFO "PIPR = %x, desired Vcc = %d.%dV\n", + _reg_PCMCIA_PIPR, state->Vcc / 10, state->Vcc % 10); + + if (!(skt->socket.state & SOCKET_PRESENT) && (skt->pre_stat == 1)) { + pr_debug(KERN_INFO "Socket enter low power mode\n"); + skt->pre_stat = 0; + mx31ads_pcmcia_low_power(1); + } + + if (state->flags & SS_RESET) { + mx31ads_pcmcia_soft_reset(); + + /* clean out previous tenant's trash */ + _reg_PCMCIA_PGSR = (PCMCIA_PGSR_NWINE + | PCMCIA_PGSR_LPE + | PCMCIA_PGSR_SE + | PCMCIA_PGSR_CDE | PCMCIA_PGSR_WPE); + } + /* enable interrupts if requested, else turn 'em off */ + if (skt->irq) + mx31ads_pcmcia_irq_config(); + else + _reg_PCMCIA_PER = 0; + + if (skt->socket.state & SOCKET_PRESENT) { + skt->pre_stat = 1; + } + return ret; +} + +static void mx31ads_pcmcia_enable_irq(struct mx31ads_pcmcia_socket *skt, + unsigned int irq) +{ + set_irq_type(irq, IRQF_TRIGGER_RISING); + set_irq_type(irq, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING); +} + +static void mx31ads_pcmcia_disable_irq(struct mx31ads_pcmcia_socket *skt, + unsigned int irq) +{ + set_irq_type(irq, IRQF_TRIGGER_NONE); +} + +/* + * Enable card status IRQs on (re-)initialisation. This can + * be called at initialisation, power management event, or + * pcmcia event. + */ +static void mx31ads_pcmcia_socket_init(struct mx31ads_pcmcia_socket *skt) +{ + mx31ads_pcmcia_soft_reset(); + + mx31ads_pcmcia_enable_irq(skt, MX31ADS_PCMCIA_IRQ); +} + +/* + * Disable card status IRQ on suspend. + */ +static void mx31ads_pcmcia_socket_suspend(struct mx31ads_pcmcia_socket *skt) +{ + mx31ads_pcmcia_disable_irq(skt, MX31ADS_PCMCIA_IRQ); + mx31ads_pcmcia_low_power(1); +} + +/* ==================================================================================== */ + +/* + * PCMCIA strobe hold time + */ +static inline u_int mx31ads_pcmcia_por_psht(u_int pcmcia_cycle_ns, + u_int hclk_cycle_ns) +{ + u_int psht; + + return psht = pcmcia_cycle_ns / hclk_cycle_ns; +} + +/* + * PCMCIA strobe set up time + */ +static inline u_int mx31ads_pcmcia_por_psst(u_int pcmcia_cycle_ns, + u_int hclk_cycle_ns) +{ + u_int psst; + + return psst = pcmcia_cycle_ns / hclk_cycle_ns; +} + +/* + * PCMCIA strobe length time + */ +static inline u_int mx31ads_pcmcia_por_pslt(u_int pcmcia_cycle_ns, + u_int hclk_cycle_ns) +{ + u_int pslt; + + return pslt = pcmcia_cycle_ns / hclk_cycle_ns + 2; +} + +/* + * mx31ads_pcmcia_default_mecr_timing + * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + * + * Calculate MECR clock wait states for given CPU clock + * speed and command wait state. This function can be over- + * written by a board specific version. + * + * The default is to simply calculate the BS values as specified in + * the INTEL SA1100 development manual + * "Expansion Memory (PCMCIA) Configuration Register (MECR)" + * that's section 10.2.5 in _my_ version of the manual ;) + */ +static unsigned int mx31ads_pcmcia_default_mecr_timing(struct + mx31ads_pcmcia_socket + *skt, + unsigned int cpu_speed, + unsigned int cmd_time) +{ + return 0; +} + +/* + * Calculate the timing code + */ +static u_int mx31ads_pcmcia_cal_code(u_int speed_ns, u_int clk_ns) +{ + u_int code; + + code = PCMCIA_POR_PSHT(mx31ads_pcmcia_por_psht(speed_ns, clk_ns)) + | PCMCIA_POR_PSST(mx31ads_pcmcia_por_psst(speed_ns, clk_ns)) + | PCMCIA_POR_PSL(mx31ads_pcmcia_por_pslt(speed_ns, clk_ns)); + + return code; +} + +/* + * set MECR value for socket based on this sockets + * io, mem and attribute space access speed. + * Call board specific BS value calculation to allow boards + * to tweak the BS values. + */ +static int mx31ads_pcmcia_set_window_timing(u_int speed_ns, u_int window, + u_int clk_ns) +{ + u_int code = 0; + + switch (window) { + case IO_WINDOW: + code = mx31ads_pcmcia_cal_code(speed_ns, clk_ns); + break; + case COMMON_MEMORY_WINDOW: + code = mx31ads_pcmcia_cal_code(speed_ns, clk_ns); + break; + case ATTRIBUTE_MEMORY_WINDOW: + code = mx31ads_pcmcia_cal_code(speed_ns, clk_ns); + break; + default: + break; + } + + /* Disable the window */ + _reg_PCMCIA_POR(window) &= ~PCMCIA_POR_PV; + + /* Clear the register fisrt */ + _reg_PCMCIA_POR(window) &= ~(PCMCIA_POR_PSST_MASK + | PCMCIA_POR_PSL_MASK + | PCMCIA_POR_PSHT_MASK); + /* And then set the register */ + _reg_PCMCIA_POR(window) |= code; + + /* Enable the window */ + _reg_PCMCIA_POR(window) |= PCMCIA_POR_PV; + + return 0; +} + +static unsigned short calc_speed(unsigned short *spds, int num, + unsigned short dflt) +{ + unsigned short speed = 0; + int i; + + for (i = 0; i < num; i++) + if (speed < spds[i]) + speed = spds[i]; + if (speed == 0) + speed = dflt; + + return speed; +} + +static void +mx31ads_common_pcmcia_get_timing(struct mx31ads_pcmcia_socket *skt, + struct mx31ads_pcmcia_timing *timing) +{ + timing->io = calc_speed(skt->spd_io, MAX_IO_WIN, PCMCIA_IO_ACCESS); + timing->mem = calc_speed(skt->spd_mem, MAX_WIN, PCMCIA_3V_MEM_ACCESS); + timing->attr = + calc_speed(skt->spd_attr, MAX_WIN, PCMCIA_ATTR_MEM_ACCESS); +} + +static int mx31ads_pcmcia_set_timing(struct mx31ads_pcmcia_socket *skt) +{ + u_int clk_ns; + struct mx31ads_pcmcia_timing timing; + + /* How many nanoseconds */ + clk_ns = (1000 * 1000 * 1000) / clk_get_rate(skt->clk); + pr_debug(KERN_INFO "clk_ns = %d\n", clk_ns); + + mx31ads_common_pcmcia_get_timing(skt, &timing); + pr_debug(KERN_INFO "timing: io %d, mem %d, attr %d\n", timing.io, + timing.mem, timing.attr); + + mx31ads_pcmcia_set_window_timing(timing.io, IO_WINDOW, clk_ns); + mx31ads_pcmcia_set_window_timing(timing.mem, COMMON_MEMORY_WINDOW, + clk_ns); + mx31ads_pcmcia_set_window_timing(timing.attr, ATTRIBUTE_MEMORY_WINDOW, + clk_ns); + + return 0; +} + +static int mx31ads_pcmcia_show_timing(struct mx31ads_pcmcia_socket *skt, + char *buf) +{ + return 0; +} + +static struct pcmcia_low_level mx31ads_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = mx31ads_pcmcia_hw_init, + .hw_shutdown = mx31ads_pcmcia_hw_shutdown, + .socket_state = mx31ads_pcmcia_socket_state, + .configure_socket = mx31ads_pcmcia_configure_socket, + + .socket_init = mx31ads_pcmcia_socket_init, + .socket_suspend = mx31ads_pcmcia_socket_suspend, + + .get_timing = mx31ads_pcmcia_default_mecr_timing, + .set_timing = mx31ads_pcmcia_set_timing, + .show_timing = mx31ads_pcmcia_show_timing, +}; + +/* =================================================================================== */ + +LIST_HEAD(mx31ads_pcmcia_sockets); +DECLARE_MUTEX(mx31ads_pcmcia_sockets_lock); + +static DEFINE_SPINLOCK(status_lock); + +struct bittbl { + unsigned int mask; + const char *name; +}; + +static struct bittbl status_bits[] = { + {SS_WRPROT, "SS_WRPROT"}, + {SS_BATDEAD, "SS_BATDEAD"}, + {SS_BATWARN, "SS_BATWARN"}, + {SS_READY, "SS_READY"}, + {SS_DETECT, "SS_DETECT"}, + {SS_POWERON, "SS_POWERON"}, + {SS_STSCHG, "SS_STSCHG"}, + {SS_3VCARD, "SS_3VCARD"}, + {SS_XVCARD, "SS_XVCARD"}, +}; + +static struct bittbl conf_bits[] = { + {SS_PWR_AUTO, "SS_PWR_AUTO"}, + {SS_IOCARD, "SS_IOCARD"}, + {SS_RESET, "SS_RESET"}, + {SS_DMA_MODE, "SS_DMA_MODE"}, + {SS_SPKR_ENA, "SS_SPKR_ENA"}, + {SS_OUTPUT_ENA, "SS_OUTPUT_ENA"}, +}; + +static void +dump_bits(char **p, const char *prefix, unsigned int val, struct bittbl *bits, + int sz) +{ + char *b = *p; + int i; + + b += sprintf(b, "%-9s:", prefix); + for (i = 0; i < sz; i++) + if (val & bits[i].mask) + b += sprintf(b, " %s", bits[i].name); + *b++ = '\n'; + *p = b; +} + +/* + * Implements the /sys/class/pcmcia_socket/??/status file. + * + * Returns: the number of characters added to the buffer + */ +static ssize_t show_status(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct mx31ads_pcmcia_socket *skt = + container_of(dev, struct mx31ads_pcmcia_socket, socket.dev); + char *p = buf; + + p += sprintf(p, "slot : %d\n", skt->nr); + + dump_bits(&p, "status", skt->status, + status_bits, ARRAY_SIZE(status_bits)); + dump_bits(&p, "csc_mask", skt->cs_state.csc_mask, + status_bits, ARRAY_SIZE(status_bits)); + dump_bits(&p, "cs_flags", skt->cs_state.flags, + conf_bits, ARRAY_SIZE(conf_bits)); + + p += sprintf(p, "Vcc : %d\n", skt->cs_state.Vcc); + p += sprintf(p, "Vpp : %d\n", skt->cs_state.Vpp); + p += sprintf(p, "IRQ : %d (%d)\n", skt->cs_state.io_irq, skt->irq); + if (skt->ops->show_timing) + p += skt->ops->show_timing(skt, p); + + return p - buf; +} + +static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); + +static void mx31ads_common_check_status(struct mx31ads_pcmcia_socket *skt) +{ + unsigned int events; + + pr_debug(KERN_INFO "entering PCMCIA monitoring thread\n"); + + do { + unsigned int status; + unsigned long flags; + + status = mx31ads_common_pcmcia_skt_state(skt); + + spin_lock_irqsave(&status_lock, flags); + events = (status ^ skt->status) & skt->cs_state.csc_mask; + skt->status = status; + spin_unlock_irqrestore(&status_lock, flags); + + pr_debug(KERN_INFO "events: %s%s%s%s%s%s\n", + events == 0 ? "" : "", + events & SS_DETECT ? "DETECT " : "", + events & SS_READY ? "READY " : "", + events & SS_BATDEAD ? "BATDEAD " : "", + events & SS_BATWARN ? "BATWARN " : "", + events & SS_STSCHG ? "STSCHG " : ""); + + if (events) + pcmcia_parse_events(&skt->socket, events); + } while (events); +} + +/* + * Service routine for socket driver interrupts (requested by the + * low-level PCMCIA init() operation via mx31ads_common_pcmcia_thread()). + * The actual interrupt-servicing work is performed by + * mx31ads_common_pcmcia_thread(), largely because the Card Services event- + * handling code performs scheduling operations which cannot be + * executed from within an interrupt context. + */ +static irqreturn_t mx31ads_common_pcmcia_interrupt(int irq, void *dev) +{ + struct mx31ads_pcmcia_socket *skt = dev; + volatile u32 pscr, pgsr; + + dev_dbg(dev, "servicing IRQ %d\n", irq); + + /* clear interrupt states */ + pscr = _reg_PCMCIA_PSCR; + _reg_PCMCIA_PSCR = pscr; + + pgsr = _reg_PCMCIA_PGSR; + _reg_PCMCIA_PGSR = pgsr; + + mx31ads_common_check_status(skt); + + return IRQ_HANDLED; +} + +/* Let's poll for events in addition to IRQs since IRQ only is unreliable... */ +static void mx31ads_common_pcmcia_poll_event(unsigned long dummy) +{ + struct mx31ads_pcmcia_socket *skt = + (struct mx31ads_pcmcia_socket *)dummy; + pr_debug(KERN_INFO "polling for events\n"); + + mod_timer(&skt->poll_timer, jiffies + PCMCIA_POLL_PERIOD); + + mx31ads_common_check_status(skt); +} + +#define mx31ads_pcmcia_cpufreq_register() +#define mx31ads_pcmcia_cpufreq_unregister() + +static int mx31ads_common_drv_pcmcia_probe(struct platform_device *pdev, + struct pcmcia_low_level *ops) +{ + struct mx31ads_pcmcia_socket *skt; + int vs, value, ret; + struct pccard_io_map map; + + down(&mx31ads_pcmcia_sockets_lock); + + skt = kzalloc(sizeof(struct mx31ads_pcmcia_socket), GFP_KERNEL); + if (!skt) { + ret = -ENOMEM; + goto out; + } + + /* + * Initialise the socket structure. + */ + skt->socket.ops = &mx31ads_common_pcmcia_operations; + skt->socket.owner = ops->owner; + skt->socket.driver_data = skt; + + init_timer(&skt->poll_timer); + skt->poll_timer.function = mx31ads_common_pcmcia_poll_event; + skt->poll_timer.data = (unsigned long)skt; + skt->poll_timer.expires = jiffies + PCMCIA_POLL_PERIOD; + + skt->irq = MX31ADS_PCMCIA_IRQ; + skt->socket.dev.parent = &pdev->dev; + skt->ops = ops; + + skt->clk = clk_get(NULL, "ahb_clk"); + + skt->res_skt.start = _PCMCIA(0); + skt->res_skt.end = _PCMCIA(0) + PCMCIASp - 1; + skt->res_skt.name = MX31ADS_PCMCIA; + skt->res_skt.flags = IORESOURCE_MEM; + + ret = request_resource(&iomem_resource, &skt->res_skt); + if (ret) + goto out_err_1; + + skt->res_io.start = _PCMCIAIO(0); + skt->res_io.end = _PCMCIAIO(0) + PCMCIAIOSp - 1; + skt->res_io.name = "io"; + skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY; + + ret = request_resource(&skt->res_skt, &skt->res_io); + if (ret) + goto out_err_2; + + skt->res_mem.start = _PCMCIAMem(0); + skt->res_mem.end = _PCMCIAMem(0) + PCMCIAMemSp - 1; + skt->res_mem.name = "memory"; + skt->res_mem.flags = IORESOURCE_MEM; + + ret = request_resource(&skt->res_skt, &skt->res_mem); + if (ret) + goto out_err_3; + + skt->res_attr.start = _PCMCIAAttr(0); + skt->res_attr.end = _PCMCIAAttr(0) + PCMCIAAttrSp - 1; + skt->res_attr.name = "attribute"; + skt->res_attr.flags = IORESOURCE_MEM; + + ret = request_resource(&skt->res_skt, &skt->res_attr); + if (ret) + goto out_err_4; + + skt->virt_io = ioremap(skt->res_io.start, 0x10000); + if (skt->virt_io == NULL) { + ret = -ENOMEM; + goto out_err_5; + } + + if (list_empty(&mx31ads_pcmcia_sockets)) + mx31ads_pcmcia_cpufreq_register(); + + list_add(&skt->node, &mx31ads_pcmcia_sockets); + + /* + * We initialize default socket timing here, because + * we are not guaranteed to see a SetIOMap operation at + * runtime. + */ + ops->set_timing(skt); + + ret = ops->hw_init(skt); + if (ret) + goto out_err_6; + + ret = request_irq(skt->irq, mx31ads_common_pcmcia_interrupt, + IRQF_SHARED | IRQF_DISABLED, "PCMCIA IRQ", skt); + if (ret) + goto out_err_6; + + skt->socket.features = SS_CAP_STATIC_MAP | SS_CAP_PCCARD; + skt->socket.resource_ops = &pccard_static_ops; + skt->socket.irq_mask = 0; + skt->socket.map_size = PCMCIAPrtSp; + skt->socket.pci_irq = skt->irq; + skt->socket.io_offset = (unsigned long)skt->virt_io; + + skt->status = mx31ads_common_pcmcia_skt_state(skt); + skt->pre_stat = 0; + ret = pcmcia_register_socket(&skt->socket); + if (ret) + goto out_err_7; + /* FIXED ME workaround for binding with ide-cs. ide usage io port 0x100~0x107 and 0x10e */ + map.map = 0; + map.flags = MAP_ACTIVE | MAP_16BIT; + map.start = 0; + map.stop = PCMCIAIOSp - 1; + map.speed = 0; + mx31ads_common_pcmcia_set_io_map(&skt->socket, &map); + + vs = _reg_PCMCIA_PIPR & PCMCIA_PIPR_VS; + value = vs & PCMCIA_PIPR_VS_5V ? 50 : 33; + dev_dbg(&pdev->dev, "PCMCIA: Voltage the card supports: %d.%dV\n", + value / 10, value % 10); + + add_timer(&skt->poll_timer); + + ret = device_create_file(&skt->socket.dev, &dev_attr_status); + if (ret < 0) + goto out_err_8; + + platform_set_drvdata(pdev, skt); + ret = 0; + goto out; + + out_err_8: + del_timer_sync(&skt->poll_timer); + pcmcia_unregister_socket(&skt->socket); + + out_err_7: + flush_scheduled_work(); + free_irq(skt->irq, skt); + ops->hw_shutdown(skt); + out_err_6: + list_del(&skt->node); + iounmap(skt->virt_io); + out_err_5: + release_resource(&skt->res_attr); + out_err_4: + release_resource(&skt->res_mem); + out_err_3: + release_resource(&skt->res_io); + out_err_2: + release_resource(&skt->res_skt); + out_err_1: + + kfree(skt); + out: + up(&mx31ads_pcmcia_sockets_lock); + return ret; +} + +static int mx31ads_drv_pcmcia_remove(struct platform_device *pdev) +{ + struct mx31ads_pcmcia_socket *skt = platform_get_drvdata(pdev); + + platform_set_drvdata(pdev, NULL); + + down(&mx31ads_pcmcia_sockets_lock); + + del_timer_sync(&skt->poll_timer); + + pcmcia_unregister_socket(&skt->socket); + + flush_scheduled_work(); + + skt->ops->hw_shutdown(skt); + + mx31ads_common_pcmcia_config_skt(skt, &dead_socket); + + list_del(&skt->node); + iounmap(skt->virt_io); + skt->virt_io = NULL; + release_resource(&skt->res_attr); + release_resource(&skt->res_mem); + release_resource(&skt->res_io); + release_resource(&skt->res_skt); + + if (list_empty(&mx31ads_pcmcia_sockets)) + mx31ads_pcmcia_cpufreq_unregister(); + + up(&mx31ads_pcmcia_sockets_lock); + + kfree(skt); + + return 0; +} + +static int mx31ads_drv_pcmcia_probe(struct platform_device *pdev) +{ + if (!machine_is_mx31ads()) + return -ENODEV; + + return mx31ads_common_drv_pcmcia_probe(pdev, &mx31ads_pcmcia_ops); +} + +static int mx31ads_drv_pcmcia_suspend(struct platform_device *pdev, + pm_message_t state) +{ + return pcmcia_socket_dev_suspend(&pdev->dev, state); +} + +static int mx31ads_drv_pcmcia_resume(struct platform_device *pdev) +{ + return pcmcia_socket_dev_resume(&pdev->dev); +} + +/* + * Low level functions + */ +static struct platform_driver mx31ads_pcmcia_driver = { + .driver = { + .name = MX31ADS_PCMCIA, + }, + .probe = mx31ads_drv_pcmcia_probe, + .remove = mx31ads_drv_pcmcia_remove, + .suspend = mx31ads_drv_pcmcia_suspend, + .resume = mx31ads_drv_pcmcia_resume, +}; + +/* mx31ads_pcmcia_init() + * + */ +static int __init mx31ads_pcmcia_init(void) +{ + int ret; + + if ((ret = platform_driver_register(&mx31ads_pcmcia_driver))) + return ret; + pr_debug(KERN_INFO "PCMCIA: Initialize i.Mx31 pcmcia socket\n"); + + return ret; +} + +/* mx31ads_pcmcia_exit() + * + */ +static void __exit mx31ads_pcmcia_exit(void) +{ + platform_driver_unregister(&mx31ads_pcmcia_driver); +} + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("i.MX31 PCMCIA Socket Controller"); +MODULE_LICENSE("GPL"); + +module_init(mx31ads_pcmcia_init); +module_exit(mx31ads_pcmcia_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/m32r_cfc.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/m32r_cfc.c @@ -699,7 +699,7 @@ static int cfc_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int cfc_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/i82092.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/i82092.c @@ -42,7 +42,7 @@ #ifdef CONFIG_PM static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int i82092aa_socket_resume (struct pci_dev *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/mx31ads-pcmcia.h +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/mx31ads-pcmcia.h @@ -0,0 +1,155 @@ +/* + * linux/drivers/pcmcia/mx31ads-pcmcia.h + * + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This file contains definitions for the PCMCIA support code common to + * integrated SOCs like the i.Mx31 microprocessors. + */ +#ifndef _ASM_ARCH_PCMCIA +#define _ASM_ARCH_PCMCIA + +/* include the world */ +#include +#include +#include +#include +#include +#include "cs_internal.h" + +#define MX31ADS_PCMCIA "Mx31ads_pcmcia_socket" + +struct device; +struct pcmcia_low_level; + +/* + * This structure encapsulates per-socket state which we might need to + * use when responding to a Card Services query of some kind. + */ +struct mx31ads_pcmcia_socket { + struct pcmcia_socket socket; + + /* + * Info from low level handler + */ + struct device *dev; + unsigned int nr; + unsigned int irq; + + struct clk *clk; + + /* + * Core PCMCIA state + */ + struct pcmcia_low_level *ops; + + unsigned int status; + unsigned int pre_stat; + socket_state_t cs_state; + + unsigned short spd_io[MAX_IO_WIN]; + unsigned short spd_mem[MAX_WIN]; + unsigned short spd_attr[MAX_WIN]; + + struct resource res_skt; + struct resource res_io; + struct resource res_mem; + struct resource res_attr; + void *virt_io; + + unsigned int irq_state; + + struct timer_list poll_timer; + struct list_head node; +}; + +struct pcmcia_state { + unsigned detect:1, + ready:1, bvd1:1, bvd2:1, wrprot:1, vs_3v:1, vs_Xv:1, poweron:1; +}; + +struct pcmcia_low_level { + struct module *owner; + + /* first socket in system */ + int first; + /* nr of sockets */ + int nr; + + int (*hw_init) (struct mx31ads_pcmcia_socket *); + void (*hw_shutdown) (struct mx31ads_pcmcia_socket *); + + void (*socket_state) (struct mx31ads_pcmcia_socket *, + struct pcmcia_state *); + int (*configure_socket) (struct mx31ads_pcmcia_socket *, + const socket_state_t *); + + /* + * Enable card status IRQs on (re-)initialisation. This can + * be called at initialisation, power management event, or + * pcmcia event. + */ + void (*socket_init) (struct mx31ads_pcmcia_socket *); + + /* + * Disable card status IRQs and PCMCIA bus on suspend. + */ + void (*socket_suspend) (struct mx31ads_pcmcia_socket *); + + /* + * Hardware specific timing routines. + * If provided, the get_timing routine overrides the SOC default. + */ + unsigned int (*get_timing) (struct mx31ads_pcmcia_socket *, + unsigned int, unsigned int); + int (*set_timing) (struct mx31ads_pcmcia_socket *); + int (*show_timing) (struct mx31ads_pcmcia_socket *, char *); + +#ifdef CONFIG_CPU_FREQ + /* + * CPUFREQ support. + */ + int (*frequency_change) (struct mx31ads_pcmcia_socket *, unsigned long, + struct cpufreq_freqs *); +#endif +}; + +struct mx31ads_pcmcia_timing { + unsigned short io; + unsigned short mem; + unsigned short attr; +}; + +typedef struct { + ulong win_size; + int bsize; +} bsize_map_t; + +/* + * The PC Card Standard, Release 7, section 4.13.4, says that twIORD + * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has + * a minimum value of 165ns, as well. Section 4.7.2 (describing + * common and attribute memory write timing) says that twWE has a + * minimum value of 150ns for a 250ns cycle time (for 5V operation; + * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V + * operation, also section 4.7.4). Section 4.7.3 says that taOE + * has a maximum value of 150ns for a 300ns cycle time (for 5V + * operation), or 300ns for a 600ns cycle time (for 3.3V operation). + * + * When configuring memory maps, Card Services appears to adopt the policy + * that a memory access time of "0" means "use the default." The default + * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute + * and memory command width time is 150ns; the PCMCIA 3.3V attribute and + * memory command width time is 300ns. + */ +#define PCMCIA_IO_ACCESS (165) +#define PCMCIA_5V_MEM_ACCESS (150) +#define PCMCIA_3V_MEM_ACCESS (300) +#define PCMCIA_ATTR_MEM_ACCESS (300) + +/* + * The socket driver actually works nicely in interrupt-driven form, + * so the (relatively infrequent) polling is "just to be sure." + */ +#define PCMCIA_POLL_PERIOD (2*HZ) +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/Kconfig @@ -275,6 +275,14 @@ Say Y here to support the CompactFlash controller on AT91 chips. Or choose M to compile the driver as a module named "at91_cf". +config PCMCIA_MX31ADS + tristate "MX31ADS PCMCIA support" + depends on ARM && MACH_MX31ADS && PCMCIA + help + Say Y here to include support for the Freescale i.MX31 PCMCIA controller. + + This driver is also available as a module called mx31ads_pcmcia. + config ELECTRA_CF tristate "Electra CompactFlash Controller" depends on PCMCIA && PPC_PASEMI --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/i82365.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/i82365.c @@ -1241,7 +1241,7 @@ static int i82365_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int i82365_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/at91_cf.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/at91_cf.c @@ -363,7 +363,7 @@ struct at91_cf_socket *cf = platform_get_drvdata(pdev); struct at91_cf_data *board = cf->board; - pcmcia_socket_dev_suspend(&pdev->dev, mesg); + pcmcia_socket_dev_suspend(&pdev->dev); if (device_may_wakeup(&pdev->dev)) { enable_irq_wake(board->det_pin); if (board->irq_pin) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/m32r_pcc.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/m32r_pcc.c @@ -675,7 +675,7 @@ static int pcc_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int pcc_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/omap_cf.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/omap_cf.c @@ -334,7 +334,7 @@ static int omap_cf_suspend(struct platform_device *pdev, pm_message_t mesg) { - return pcmcia_socket_dev_suspend(&pdev->dev, mesg); + return pcmcia_socket_dev_suspend(&pdev->dev); } static int omap_cf_resume(struct platform_device *pdev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/au1000_generic.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/au1000_generic.c @@ -515,7 +515,7 @@ static int au1x00_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int au1x00_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/cardbus.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/cardbus.c @@ -214,7 +214,7 @@ unsigned int max, pass; s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0)); -// pcibios_fixup_bus(bus); + pci_fixup_cardbus(bus); max = bus->secondary; for (pass = 0; pass < 2; pass++) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/pxa2xx_base.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/pxa2xx_base.c @@ -302,7 +302,7 @@ static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/sa1100_generic.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/sa1100_generic.c @@ -89,7 +89,7 @@ static int sa11x0_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int sa11x0_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/Makefile +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_BFIN_CFPCMCIA) += bfin_cf_pcmcia.o obj-$(CONFIG_AT91_CF) += at91_cf.o obj-$(CONFIG_ELECTRA_CF) += electra_cf.o +obj-$(CONFIG_PCMCIA_MX31ADS) += mx31ads-pcmcia.o sa11xx_core-y += soc_common.o sa11xx_base.o pxa2xx_core-y += soc_common.o pxa2xx_base.o --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/cs.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/cs.c @@ -98,10 +98,13 @@ * These functions check for the appropriate struct pcmcia_soket arrays, * and pass them to the low-level functions pcmcia_{suspend,resume}_socket */ +static int socket_early_resume(struct pcmcia_socket *skt); +static int socket_late_resume(struct pcmcia_socket *skt); static int socket_resume(struct pcmcia_socket *skt); static int socket_suspend(struct pcmcia_socket *skt); -int pcmcia_socket_dev_suspend(struct device *dev, pm_message_t state) +static void pcmcia_socket_dev_run(struct device *dev, + int (*cb)(struct pcmcia_socket *)) { struct pcmcia_socket *socket; @@ -110,29 +113,34 @@ if (socket->dev.parent != dev) continue; mutex_lock(&socket->skt_mutex); - socket_suspend(socket); + cb(socket); mutex_unlock(&socket->skt_mutex); } up_read(&pcmcia_socket_list_rwsem); +} +int pcmcia_socket_dev_suspend(struct device *dev) +{ + pcmcia_socket_dev_run(dev, socket_suspend); return 0; } EXPORT_SYMBOL(pcmcia_socket_dev_suspend); -int pcmcia_socket_dev_resume(struct device *dev) +void pcmcia_socket_dev_early_resume(struct device *dev) { - struct pcmcia_socket *socket; + pcmcia_socket_dev_run(dev, socket_early_resume); +} +EXPORT_SYMBOL(pcmcia_socket_dev_early_resume); - down_read(&pcmcia_socket_list_rwsem); - list_for_each_entry(socket, &pcmcia_socket_list, socket_list) { - if (socket->dev.parent != dev) - continue; - mutex_lock(&socket->skt_mutex); - socket_resume(socket); - mutex_unlock(&socket->skt_mutex); - } - up_read(&pcmcia_socket_list_rwsem); +void pcmcia_socket_dev_late_resume(struct device *dev) +{ + pcmcia_socket_dev_run(dev, socket_late_resume); +} +EXPORT_SYMBOL(pcmcia_socket_dev_late_resume); +int pcmcia_socket_dev_resume(struct device *dev) +{ + pcmcia_socket_dev_run(dev, socket_resume); return 0; } EXPORT_SYMBOL(pcmcia_socket_dev_resume); @@ -546,29 +554,24 @@ return 0; } -/* - * Resume a socket. If a card is present, verify its CIS against - * our cached copy. If they are different, the card has been - * replaced, and we need to tell the drivers. - */ -static int socket_resume(struct pcmcia_socket *skt) +static int socket_early_resume(struct pcmcia_socket *skt) { - int ret; - - if (!(skt->state & SOCKET_SUSPEND)) - return -EBUSY; - skt->socket = dead_socket; skt->ops->init(skt); skt->ops->set_socket(skt, &skt->socket); + if (skt->state & SOCKET_PRESENT) + skt->resume_status = socket_setup(skt, resume_delay); + return 0; +} +static int socket_late_resume(struct pcmcia_socket *skt) +{ if (!(skt->state & SOCKET_PRESENT)) { skt->state &= ~SOCKET_SUSPEND; return socket_insert(skt); } - ret = socket_setup(skt, resume_delay); - if (ret == 0) { + if (skt->resume_status == 0) { /* * FIXME: need a better check here for cardbus cards. */ @@ -596,6 +599,20 @@ return 0; } +/* + * Resume a socket. If a card is present, verify its CIS against + * our cached copy. If they are different, the card has been + * replaced, and we need to tell the drivers. + */ +static int socket_resume(struct pcmcia_socket *skt) +{ + if (!(skt->state & SOCKET_SUSPEND)) + return -EBUSY; + + socket_early_resume(skt); + return socket_late_resume(skt); +} + static void socket_remove(struct pcmcia_socket *skt) { dev_printk(KERN_NOTICE, &skt->dev, --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/tcic.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/tcic.c @@ -366,7 +366,7 @@ static int tcic_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int tcic_drv_pcmcia_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/m8xx_pcmcia.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/m8xx_pcmcia.c @@ -1296,7 +1296,7 @@ #ifdef CONFIG_PM static int m8xx_suspend(struct platform_device *pdev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&pdev->dev, state); + return pcmcia_socket_dev_suspend(&pdev->dev); } static int m8xx_resume(struct platform_device *pdev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/pd6729.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/pd6729.c @@ -758,7 +758,7 @@ #ifdef CONFIG_PM static int pd6729_socket_suspend(struct pci_dev *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int pd6729_socket_resume(struct pci_dev *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/sa1111_generic.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/sa1111_generic.c @@ -159,7 +159,7 @@ static int pcmcia_suspend(struct sa1111_dev *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int pcmcia_resume(struct sa1111_dev *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/vrc4171_card.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/vrc4171_card.c @@ -707,7 +707,7 @@ static int vrc4171_card_suspend(struct platform_device *dev, pm_message_t state) { - return pcmcia_socket_dev_suspend(&dev->dev, state); + return pcmcia_socket_dev_suspend(&dev->dev); } static int vrc4171_card_resume(struct platform_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/yenta_socket.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/yenta_socket.c @@ -1225,60 +1225,81 @@ } #ifdef CONFIG_PM -static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state) +static int yenta_dev_suspend_noirq(struct device *dev) { - struct yenta_socket *socket = pci_get_drvdata(dev); + struct pci_dev *pdev = to_pci_dev(dev); + struct yenta_socket *socket = pci_get_drvdata(pdev); int ret; - ret = pcmcia_socket_dev_suspend(&dev->dev, state); + ret = pcmcia_socket_dev_suspend(dev); - if (socket) { - if (socket->type && socket->type->save_state) - socket->type->save_state(socket); - - /* FIXME: pci_save_state needs to have a better interface */ - pci_save_state(dev); - pci_read_config_dword(dev, 16*4, &socket->saved_state[0]); - pci_read_config_dword(dev, 17*4, &socket->saved_state[1]); - pci_disable_device(dev); - - /* - * Some laptops (IBM T22) do not like us putting the Cardbus - * bridge into D3. At a guess, some other laptop will - * probably require this, so leave it commented out for now. - */ - /* pci_set_power_state(dev, 3); */ - } + if (!socket) + return ret; + + if (socket->type && socket->type->save_state) + socket->type->save_state(socket); + + pci_save_state(pdev); + pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); + pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); + pci_disable_device(pdev); + + /* + * Some laptops (IBM T22) do not like us putting the Cardbus + * bridge into D3. At a guess, some other laptop will + * probably require this, so leave it commented out for now. + */ + /* pci_set_power_state(dev, 3); */ return ret; } - -static int yenta_dev_resume (struct pci_dev *dev) +static int yenta_dev_resume_noirq(struct device *dev) { - struct yenta_socket *socket = pci_get_drvdata(dev); + struct pci_dev *pdev = to_pci_dev(dev); + struct yenta_socket *socket = pci_get_drvdata(pdev); + int ret; - if (socket) { - int rc; + if (!socket) + return 0; - pci_set_power_state(dev, 0); - /* FIXME: pci_restore_state needs to have a better interface */ - pci_restore_state(dev); - pci_write_config_dword(dev, 16*4, socket->saved_state[0]); - pci_write_config_dword(dev, 17*4, socket->saved_state[1]); + pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); + pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); - rc = pci_enable_device(dev); - if (rc) - return rc; + ret = pci_enable_device(pdev); + if (ret) + return ret; - pci_set_master(dev); + pci_set_master(pdev); - if (socket->type && socket->type->restore_state) - socket->type->restore_state(socket); - } + if (socket->type && socket->type->restore_state) + socket->type->restore_state(socket); - return pcmcia_socket_dev_resume(&dev->dev); + pcmcia_socket_dev_early_resume(dev); + return 0; } + +static int yenta_dev_resume(struct device *dev) +{ + pcmcia_socket_dev_late_resume(dev); + return 0; +} + +static struct dev_pm_ops yenta_pm_ops = { + .suspend_noirq = yenta_dev_suspend_noirq, + .resume_noirq = yenta_dev_resume_noirq, + .resume = yenta_dev_resume, + .freeze_noirq = yenta_dev_suspend_noirq, + .thaw_noirq = yenta_dev_resume_noirq, + .thaw = yenta_dev_resume, + .poweroff_noirq = yenta_dev_suspend_noirq, + .restore_noirq = yenta_dev_resume_noirq, + .restore = yenta_dev_resume, +}; + +#define YENTA_PM_OPS (¥ta_pm_ops) +#else +#define YENTA_PM_OPS NULL #endif #define CB_ID(vend,dev,type) \ @@ -1376,10 +1397,7 @@ .id_table = yenta_table, .probe = yenta_probe, .remove = __devexit_p(yenta_close), -#ifdef CONFIG_PM - .suspend = yenta_dev_suspend, - .resume = yenta_dev_resume, -#endif + .driver.pm = YENTA_PM_OPS, }; --- linux-fsl-imx51-2.6.31.orig/drivers/pcmcia/bfin_cf_pcmcia.c +++ linux-fsl-imx51-2.6.31/drivers/pcmcia/bfin_cf_pcmcia.c @@ -302,7 +302,7 @@ static int bfin_cf_suspend(struct platform_device *pdev, pm_message_t mesg) { - return pcmcia_socket_dev_suspend(&pdev->dev, mesg); + return pcmcia_socket_dev_suspend(&pdev->dev); } static int bfin_cf_resume(struct platform_device *pdev) --- linux-fsl-imx51-2.6.31.orig/drivers/ata/sata_nv.c +++ linux-fsl-imx51-2.6.31/drivers/ata/sata_nv.c @@ -1594,9 +1594,21 @@ !ata_dev_enabled(link->device)) sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, NULL, NULL); - else if (!(ehc->i.flags & ATA_EHI_QUIET)) - ata_link_printk(link, KERN_INFO, - "nv: skipping hardreset on occupied port\n"); + else { + const unsigned long *timing = sata_ehc_deb_timing(ehc); + int rc; + + if (!(ehc->i.flags & ATA_EHI_QUIET)) + ata_link_printk(link, KERN_INFO, "nv: skipping " + "hardreset on occupied port\n"); + + /* make sure the link is online */ + rc = sata_link_resume(link, timing, deadline); + /* whine about phy resume failure but proceed */ + if (rc && rc != -EOPNOTSUPP) + ata_link_printk(link, KERN_WARNING, "failed to resume " + "link (errno=%d)\n", rc); + } /* device signature acquisition is unreliable */ return -EAGAIN; --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_amd.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_amd.c @@ -307,6 +307,9 @@ limit |= ATA_MASK_PIO; if (!(limit & (ATA_MASK_MWDMA | ATA_MASK_UDMA))) limit |= ATA_MASK_MWDMA | ATA_MASK_UDMA; + /* PIO4, MWDMA2, UDMA2 should always be supported regardless of + cable detection result */ + limit |= ata_pack_xfermask(ATA_PIO4, ATA_MWDMA2, ATA_UDMA2); ata_port_printk(ap, KERN_DEBUG, "nv_mode_filter: 0x%lx&0x%lx->0x%lx, " "BIOS=0x%lx (0x%x) ACPI=0x%lx%s\n", --- linux-fsl-imx51-2.6.31.orig/drivers/ata/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/ata/Kconfig @@ -751,5 +751,14 @@ If unsure, say N. +config PATA_FSL + tristate "Freescale on-chip PATA support" + depends on (ARCH_MX51 || ARCH_MX37 || ARCH_MX35 || ARCH_MX3 || ARCH_MX27) + help + On Freescale processors, say Y here if you wish to use the on-chip + ATA interface. + If you are unsure, say N to this. + endif # ATA_SFF + endif # ATA --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_hpt37x.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_hpt37x.c @@ -24,7 +24,7 @@ #include #define DRV_NAME "pata_hpt37x" -#define DRV_VERSION "0.6.12" +#define DRV_VERSION "0.6.14" struct hpt_clock { u8 xfer_speed; @@ -404,9 +404,8 @@ pci_read_config_dword(pdev, addr1, ®); mode = hpt37x_find_mode(ap, adev->pio_mode); - mode &= ~0x8000000; /* No FIFO in PIO */ - mode &= ~0x30070000; /* Leave config bits alone */ - reg &= 0x30070000; /* Strip timing bits */ + mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ + reg &= ~0xCFC3FFFF; /* Strip timing bits */ pci_write_config_dword(pdev, addr1, reg | mode); } @@ -423,8 +422,7 @@ { struct pci_dev *pdev = to_pci_dev(ap->host->dev); u32 addr1, addr2; - u32 reg; - u32 mode; + u32 reg, mode, mask; u8 fast; addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); @@ -436,11 +434,12 @@ fast |= 0x01; pci_write_config_byte(pdev, addr2, fast); + mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; + pci_read_config_dword(pdev, addr1, ®); mode = hpt37x_find_mode(ap, adev->dma_mode); - mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ - mode &= ~0xC0000000; /* Leave config bits alone */ - reg &= 0xC0000000; /* Strip timing bits */ + mode &= mask; + reg &= ~mask; pci_write_config_dword(pdev, addr1, reg | mode); } @@ -508,9 +507,8 @@ mode = hpt37x_find_mode(ap, adev->pio_mode); printk("Find mode for %d reports %X\n", adev->pio_mode, mode); - mode &= ~0x80000000; /* No FIFO in PIO */ - mode &= ~0x30070000; /* Leave config bits alone */ - reg &= 0x30070000; /* Strip timing bits */ + mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ + reg &= ~0xCFC3FFFF; /* Strip timing bits */ pci_write_config_dword(pdev, addr1, reg | mode); } @@ -527,8 +525,7 @@ { struct pci_dev *pdev = to_pci_dev(ap->host->dev); u32 addr1, addr2; - u32 reg; - u32 mode; + u32 reg, mode, mask; u8 fast; addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); @@ -539,12 +536,13 @@ fast &= ~0x07; pci_write_config_byte(pdev, addr2, fast); + mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; + pci_read_config_dword(pdev, addr1, ®); mode = hpt37x_find_mode(ap, adev->dma_mode); printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode); - mode &= ~0xC0000000; /* Leave config bits alone */ - mode |= 0x80000000; /* FIFO in MWDMA or UDMA */ - reg &= 0xC0000000; /* Strip timing bits */ + mode &= mask; + reg &= ~mask; pci_write_config_dword(pdev, addr1, reg | mode); } --- linux-fsl-imx51-2.6.31.orig/drivers/ata/libata-eh.c +++ linux-fsl-imx51-2.6.31/drivers/ata/libata-eh.c @@ -2541,14 +2541,14 @@ dev->pio_mode = XFER_PIO_0; dev->flags &= ~ATA_DFLAG_SLEEPING; - if (!ata_phys_link_offline(ata_dev_phys_link(dev))) { - /* apply class override */ - if (lflags & ATA_LFLAG_ASSUME_ATA) - classes[dev->devno] = ATA_DEV_ATA; - else if (lflags & ATA_LFLAG_ASSUME_SEMB) - classes[dev->devno] = ATA_DEV_SEMB_UNSUP; - } else - classes[dev->devno] = ATA_DEV_NONE; + if (ata_phys_link_offline(ata_dev_phys_link(dev))) + continue; + + /* apply class override */ + if (lflags & ATA_LFLAG_ASSUME_ATA) + classes[dev->devno] = ATA_DEV_ATA; + else if (lflags & ATA_LFLAG_ASSUME_SEMB) + classes[dev->devno] = ATA_DEV_SEMB_UNSUP; } /* record current link speed */ @@ -2581,34 +2581,48 @@ slave->eh_info.serror = 0; spin_unlock_irqrestore(link->ap->lock, flags); - /* Make sure onlineness and classification result correspond. + /* + * Make sure onlineness and classification result correspond. * Hotplug could have happened during reset and some * controllers fail to wait while a drive is spinning up after * being hotplugged causing misdetection. By cross checking - * link onlineness and classification result, those conditions - * can be reliably detected and retried. + * link on/offlineness and classification result, those + * conditions can be reliably detected and retried. */ nr_unknown = 0; ata_for_each_dev(dev, link, ALL) { - /* convert all ATA_DEV_UNKNOWN to ATA_DEV_NONE */ - if (classes[dev->devno] == ATA_DEV_UNKNOWN) { - classes[dev->devno] = ATA_DEV_NONE; - if (ata_phys_link_online(ata_dev_phys_link(dev))) + if (ata_phys_link_online(ata_dev_phys_link(dev))) { + if (classes[dev->devno] == ATA_DEV_UNKNOWN) { + ata_dev_printk(dev, KERN_DEBUG, "link online " + "but device misclassifed\n"); + classes[dev->devno] = ATA_DEV_NONE; nr_unknown++; + } + } else if (ata_phys_link_offline(ata_dev_phys_link(dev))) { + if (ata_class_enabled(classes[dev->devno])) + ata_dev_printk(dev, KERN_DEBUG, "link offline, " + "clearing class %d to NONE\n", + classes[dev->devno]); + classes[dev->devno] = ATA_DEV_NONE; + } else if (classes[dev->devno] == ATA_DEV_UNKNOWN) { + ata_dev_printk(dev, KERN_DEBUG, "link status unknown, " + "clearing UNKNOWN to NONE\n"); + classes[dev->devno] = ATA_DEV_NONE; } } if (classify && nr_unknown) { if (try < max_tries) { ata_link_printk(link, KERN_WARNING, "link online but " - "device misclassified, retrying\n"); + "%d devices misclassified, retrying\n", + nr_unknown); failed_link = link; rc = -EAGAIN; goto fail; } ata_link_printk(link, KERN_WARNING, - "link online but device misclassified, " - "device detection might fail\n"); + "link online but %d devices misclassified, " + "device detection might fail\n", nr_unknown); } /* reset successful, schedule revalidation */ @@ -2835,12 +2849,14 @@ * device detection messages backwards. */ ata_for_each_dev(dev, link, ALL) { - if (!(new_mask & (1 << dev->devno)) || - dev->class == ATA_DEV_PMP) + if (!(new_mask & (1 << dev->devno))) continue; dev->class = ehc->classes[dev->devno]; + if (dev->class == ATA_DEV_PMP) + continue; + ehc->i.flags |= ATA_EHI_PRINTINFO; rc = ata_dev_configure(dev); ehc->i.flags &= ~ATA_EHI_PRINTINFO; --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_via.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_via.c @@ -111,7 +111,7 @@ { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, - { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, + { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, --- linux-fsl-imx51-2.6.31.orig/drivers/ata/Makefile +++ linux-fsl-imx51-2.6.31/drivers/ata/Makefile @@ -75,6 +75,7 @@ obj-$(CONFIG_PATA_AT91) += pata_at91.o obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o +obj-$(CONFIG_PATA_FSL) += pata_fsl.o # Should be last but two libata driver obj-$(CONFIG_PATA_ACPI) += pata_acpi.o # Should be last but one libata driver --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_sc1200.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_sc1200.c @@ -235,8 +235,7 @@ .udma_mask = ATA_UDMA2, .port_ops = &sc1200_port_ops }; - /* Can't enable port 2 yet, see top comments */ - const struct ata_port_info *ppi[] = { &info, }; + const struct ata_port_info *ppi[] = { &info, NULL }; return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); } --- linux-fsl-imx51-2.6.31.orig/drivers/ata/libata-core.c +++ linux-fsl-imx51-2.6.31/drivers/ata/libata-core.c @@ -139,7 +139,7 @@ module_param_named(fua, libata_fua, int, 0444); MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)"); -static int ata_ignore_hpa; +static int ata_ignore_hpa = 1; module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); @@ -709,7 +709,13 @@ head = tf->device & 0xf; sect = tf->lbal; - block = (cyl * dev->heads + head) * dev->sectors + sect; + if (!sect) { + ata_dev_printk(dev, KERN_WARNING, "device reported " + "invalid CHS sector 0\n"); + sect = 1; /* oh well */ + } + + block = (cyl * dev->heads + head) * dev->sectors + sect - 1; } return block; @@ -4295,6 +4301,7 @@ { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, + { "FUJITSU MHW2160BH PL", "0084001E", ATA_HORKAGE_NONCQ, }, /* devices which puke on READ_NATIVE_MAX */ { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, @@ -5002,12 +5009,14 @@ qc->flags |= ATA_QCFLAG_FAILED; if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { - if (!ata_tag_internal(qc->tag)) { - /* always fill result TF for failed qc */ - fill_result_tf(qc); + /* always fill result TF for failed qc */ + fill_result_tf(qc); + + if (!ata_tag_internal(qc->tag)) ata_qc_schedule_eh(qc); - return; - } + else + __ata_qc_complete(qc); + return; } /* read result TF if requested */ --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_fsl.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_fsl.c @@ -0,0 +1,1042 @@ +/* + * Freescale integrated PATA driver + */ + +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "pata_fsl" + +struct pata_fsl_priv { + int ultra; + u8 *fsl_ata_regs; + struct clk *clk; + int dma_rchan; + int dma_wchan; + int dma_done; + int dma_dir; + unsigned int adma_des_paddr; + unsigned int *adma_des_tp; +}; + +struct adma_bd { + unsigned char *sg_buf; + unsigned char *work_buf; + unsigned int dma_address; + int length; +}; + +struct adma_bulk { + struct adma_bd adma_bd_table[64]; + struct ata_queued_cmd *qc; + int sg_ents; + int reserved[2]; +}; + +enum { + /* various constants */ + FSL_ATA_MAX_SG_LEN = ATA_DMA_BOUNDARY << 1, + + /* offsets to registers */ + FSL_ATA_TIMING_REGS = 0x00, + FSL_ATA_FIFO_FILL = 0x20, + FSL_ATA_CONTROL = 0x24, + FSL_ATA_INT_PEND = 0x28, + FSL_ATA_INT_EN = 0x2C, + FSL_ATA_INT_CLEAR = 0x30, + FSL_ATA_FIFO_ALARM = 0x34, + FSL_ATA_ADMA_ERROR_STATUS = 0x38, + FSL_ATA_SYS_DMA_BADDR = 0x3C, + FSL_ATA_ADMA_SYS_ADDR = 0x40, + FSL_ATA_BLOCK_COUNT = 0x48, + FSL_ATA_BURST_LENGTH = 0x4C, + FSL_ATA_SECTOR_SIZE = 0x50, + FSL_ATA_DRIVE_DATA = 0xA0, + FSL_ATA_DRIVE_CONTROL = 0xD8, + + /* bits within FSL_ATA_CONTROL */ + FSL_ATA_CTRL_DMA_SRST = 0x1000, + FSL_ATA_CTRL_DMA_64ADMA = 0x800, + FSL_ATA_CTRL_DMA_32ADMA = 0x400, + FSL_ATA_CTRL_DMA_STAT_STOP = 0x200, + FSL_ATA_CTRL_DMA_ENABLE = 0x100, + FSL_ATA_CTRL_FIFO_RST_B = 0x80, + FSL_ATA_CTRL_ATA_RST_B = 0x40, + FSL_ATA_CTRL_FIFO_TX_EN = 0x20, + FSL_ATA_CTRL_FIFO_RCV_EN = 0x10, + FSL_ATA_CTRL_DMA_PENDING = 0x08, + FSL_ATA_CTRL_DMA_ULTRA = 0x04, + FSL_ATA_CTRL_DMA_WRITE = 0x02, + FSL_ATA_CTRL_IORDY_EN = 0x01, + + /* bits within the interrupt control registers */ + FSL_ATA_INTR_ATA_INTRQ1 = 0x80, + FSL_ATA_INTR_FIFO_UNDERFLOW = 0x40, + FSL_ATA_INTR_FIFO_OVERFLOW = 0x20, + FSL_ATA_INTR_CTRL_IDLE = 0x10, + FSL_ATA_INTR_ATA_INTRQ2 = 0x08, + FSL_ATA_INTR_DMA_ERR = 0x04, + FSL_ATA_INTR_DMA_TRANS_OVER = 0x02, + + /* ADMA Addr Descriptor Attribute Filed */ + FSL_ADMA_DES_ATTR_VALID = 0x01, + FSL_ADMA_DES_ATTR_END = 0x02, + FSL_ADMA_DES_ATTR_INT = 0x04, + FSL_ADMA_DES_ATTR_SET = 0x10, + FSL_ADMA_DES_ATTR_TRAN = 0x20, + FSL_ADMA_DES_ATTR_LINK = 0x30, +}; + +/* + * This structure contains the timing parameters for + * ATA bus timing in the 5 PIO modes. The timings + * are in nanoseconds, and are converted to clock + * cycles before being stored in the ATA controller + * timing registers. + */ +static struct { + short t0, t1, t2_8, t2_16, t2i, t4, t9, tA; +} pio_specs[] = { + [0] = { + .t0 = 600, .t1 = 70, .t2_8 = 290, .t2_16 = 165, .t2i = 0, .t4 = + 30, .t9 = 20, .tA = 50,}, + [1] = { + .t0 = 383, .t1 = 50, .t2_8 = 290, .t2_16 = 125, .t2i = 0, .t4 = + 20, .t9 = 15, .tA = 50,}, + [2] = { + .t0 = 240, .t1 = 30, .t2_8 = 290, .t2_16 = 100, .t2i = 0, .t4 = + 15, .t9 = 10, .tA = 50,}, + [3] = { + .t0 = 180, .t1 = 30, .t2_8 = 80, .t2_16 = 80, .t2i = 0, .t4 = + 10, .t9 = 10, .tA = 50,}, + [4] = { + .t0 = 120, .t1 = 25, .t2_8 = 70, .t2_16 = 70, .t2i = 0, .t4 = + 10, .t9 = 10, .tA = 50,}, + }; + +#define NR_PIO_SPECS (sizeof pio_specs / sizeof pio_specs[0]) + +/* + * This structure contains the timing parameters for + * ATA bus timing in the 3 MDMA modes. The timings + * are in nanoseconds, and are converted to clock + * cycles before being stored in the ATA controller + * timing registers. + */ +static struct { + short t0M, tD, tH, tJ, tKW, tM, tN, tJNH; +} mdma_specs[] = { + [0] = { + .t0M = 480, .tD = 215, .tH = 20, .tJ = 20, .tKW = 215, .tM = 50, .tN = + 15, .tJNH = 20,}, + [1] = { + .t0M = 150, .tD = 80, .tH = 15, .tJ = 5, .tKW = 50, .tM = 30, .tN = + 10, .tJNH = 15,}, + [2] = { + .t0M = 120, .tD = 70, .tH = 10, .tJ = 5, .tKW = 25, .tM = 25, .tN = + 10, .tJNH = 10,}, + }; + +#define NR_MDMA_SPECS (sizeof mdma_specs / sizeof mdma_specs[0]) + +/* + * This structure contains the timing parameters for + * ATA bus timing in the 6 UDMA modes. The timings + * are in nanoseconds, and are converted to clock + * cycles before being stored in the ATA controller + * timing registers. + */ +static struct { + short t2CYC, tCYC, tDS, tDH, tDVS, tDVH, tCVS, tCVH, tFS_min, tLI_max, + tMLI, tAZ, tZAH, tENV_min, tSR, tRFS, tRP, tACK, tSS, tDZFS; +} udma_specs[] = { + [0] = { + .t2CYC = 235, .tCYC = 114, .tDS = 15, .tDH = 5, .tDVS = 70, .tDVH = + 6, .tCVS = 70, .tCVH = 6, .tFS_min = 0, .tLI_max = + 100, .tMLI = 20, .tAZ = 10, .tZAH = 20, .tENV_min = + 20, .tSR = 50, .tRFS = 75, .tRP = 160, .tACK = 20, .tSS = + 50, .tDZFS = 80,}, + [1] = { + .t2CYC = 156, .tCYC = 75, .tDS = 10, .tDH = 5, .tDVS = 48, .tDVH = + 6, .tCVS = 48, .tCVH = 6, .tFS_min = 0, .tLI_max = + 100, .tMLI = 20, .tAZ = 10, .tZAH = 20, .tENV_min = + 20, .tSR = 30, .tRFS = 70, .tRP = 125, .tACK = 20, .tSS = + 50, .tDZFS = 63,}, + [2] = { + .t2CYC = 117, .tCYC = 55, .tDS = 7, .tDH = 5, .tDVS = 34, .tDVH = + 6, .tCVS = 34, .tCVH = 6, .tFS_min = 0, .tLI_max = + 100, .tMLI = 20, .tAZ = 10, .tZAH = 20, .tENV_min = + 20, .tSR = 20, .tRFS = 60, .tRP = 100, .tACK = 20, .tSS = + 50, .tDZFS = 47,}, + [3] = { + .t2CYC = 86, .tCYC = 39, .tDS = 7, .tDH = 5, .tDVS = 20, .tDVH = + 6, .tCVS = 20, .tCVH = 6, .tFS_min = 0, .tLI_max = + 100, .tMLI = 20, .tAZ = 10, .tZAH = 20, .tENV_min = + 20, .tSR = 20, .tRFS = 60, .tRP = 100, .tACK = 20, .tSS = + 50, .tDZFS = 35,}, + [4] = { + .t2CYC = 57, .tCYC = 25, .tDS = 5, .tDH = 5, .tDVS = 7, .tDVH = + 6, .tCVS = 7, .tCVH = 6, .tFS_min = 0, .tLI_max = + 100, .tMLI = 20, .tAZ = 10, .tZAH = 20, .tENV_min = + 20, .tSR = 50, .tRFS = 60, .tRP = 100, .tACK = 20, .tSS = + 50, .tDZFS = 25,}, + [5] = { + .t2CYC = 38, .tCYC = 17, .tDS = 4, .tDH = 5, .tDVS = 5, .tDVH = + 6, .tCVS = 10, .tCVH = 10, .tFS_min = + 0, .tLI_max = 75, .tMLI = 20, .tAZ = 10, .tZAH = + 20, .tENV_min = 20, .tSR = 20, .tRFS = + 50, .tRP = 85, .tACK = 20, .tSS = 50, .tDZFS = 40,}, +}; + +#define NR_UDMA_SPECS (sizeof udma_specs / sizeof udma_specs[0]) + +struct fsl_ata_time_regs { + u8 time_off, time_on, time_1, time_2w; + u8 time_2r, time_ax, time_pio_rdx, time_4; + u8 time_9, time_m, time_jn, time_d; + u8 time_k, time_ack, time_env, time_rpx; + u8 time_zah, time_mlix, time_dvh, time_dzfs; + u8 time_dvs, time_cvh, time_ss, time_cyc; +}; + +static struct regulator *io_reg; +static struct regulator *core_reg; +static struct adma_bulk adma_info; + +static void +update_timing_config(struct fsl_ata_time_regs *tp, struct ata_host *host) +{ + u32 *lp = (u32 *) tp; + struct pata_fsl_priv *priv = host->private_data; + u32 *ctlp = (u32 *) priv->fsl_ata_regs; + int i; + + for (i = 0; i < 5; i++) { + __raw_writel(*lp, ctlp); + lp++; + ctlp++; + } +} + +/*! + * Calculate values for the ATA bus timing registers and store + * them into the hardware. + * + * @param xfer_mode specifies XFER xfer_mode + * @param pdev specifies platform_device + * + * @return EINVAL speed out of range, or illegal mode + */ +static int set_ata_bus_timing(u8 xfer_mode, struct platform_device *pdev) +{ + struct ata_host *host = dev_get_drvdata(&pdev->dev); + struct pata_fsl_priv *priv = host->private_data; + + /* get the bus clock cycle time, in ns */ + int T = 1 * 1000 * 1000 * 1000 / clk_get_rate(priv->clk); + struct fsl_ata_time_regs tr = { 0 }; + + /* + * every mode gets the same t_off and t_on + */ + tr.time_off = 3; + tr.time_on = 3; + + if (xfer_mode >= XFER_UDMA_0) { + int speed = xfer_mode - XFER_UDMA_0; + if (speed >= NR_UDMA_SPECS) + return -EINVAL; + + tr.time_ack = (udma_specs[speed].tACK + T) / T; + tr.time_env = (udma_specs[speed].tENV_min + T) / T; + tr.time_rpx = (udma_specs[speed].tRP + T) / T + 2; + tr.time_zah = (udma_specs[speed].tZAH + T) / T; + tr.time_mlix = (udma_specs[speed].tMLI + T) / T; + tr.time_dvh = (udma_specs[speed].tDVH + T) / T + 1; + tr.time_dzfs = (udma_specs[speed].tDZFS + T) / T; + + tr.time_dvs = (udma_specs[speed].tDVS + T) / T; + tr.time_cvh = (udma_specs[speed].tCVH + T) / T; + tr.time_ss = (udma_specs[speed].tSS + T) / T; + tr.time_cyc = (udma_specs[speed].tCYC + T) / T; + } else if (xfer_mode >= XFER_MW_DMA_0) { + int speed = xfer_mode - XFER_MW_DMA_0; + if (speed >= NR_MDMA_SPECS) + return -EINVAL; + + tr.time_m = (mdma_specs[speed].tM + T) / T; + tr.time_jn = (mdma_specs[speed].tJNH + T) / T; + tr.time_d = (mdma_specs[speed].tD + T) / T; + + tr.time_k = (mdma_specs[speed].tKW + T) / T; + } else { + int speed = xfer_mode - XFER_PIO_0; + if (speed >= NR_PIO_SPECS) + return -EINVAL; + + tr.time_1 = (pio_specs[speed].t1 + T) / T; + tr.time_2w = (pio_specs[speed].t2_8 + T) / T; + + tr.time_2r = (pio_specs[speed].t2_8 + T) / T; + tr.time_ax = (pio_specs[speed].tA + T) / T + 2; + tr.time_pio_rdx = 1; + tr.time_4 = (pio_specs[speed].t4 + T) / T; + + tr.time_9 = (pio_specs[speed].t9 + T) / T; + } + + update_timing_config(&tr, host); + + return 0; +} + +static void pata_fsl_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + set_ata_bus_timing(adev->pio_mode, to_platform_device(ap->dev)); +} + +static void pata_fsl_set_dmamode(struct ata_port *ap, struct ata_device *adev) +{ + struct pata_fsl_priv *priv = ap->host->private_data; + + priv->ultra = adev->dma_mode >= XFER_UDMA_0; + + set_ata_bus_timing(adev->dma_mode, to_platform_device(ap->dev)); +} + +static int pata_fsl_port_start(struct ata_port *ap) +{ + return 0; +} + +static void pata_adma_bulk_unmap(struct ata_queued_cmd *qc) +{ + int i; + struct adma_bd *bdp = adma_info.adma_bd_table; + if (adma_info.qc == NULL) + return; + BUG_ON(adma_info.qc != qc); + + adma_info.qc = NULL; + + for (i = 0; i < adma_info.sg_ents; i++) { + if (bdp->work_buf != bdp->sg_buf) { + if (qc->dma_dir == DMA_FROM_DEVICE) { + memcpy(bdp->sg_buf, bdp->work_buf, bdp->length); + dma_cache_maint(bdp->sg_buf, bdp->length, + DMA_FROM_DEVICE); + } + dma_free_coherent(qc->ap->dev, bdp->length, + bdp->work_buf, bdp->dma_address); + } + bdp->work_buf = bdp->sg_buf = NULL; + bdp++; + } +} + +static int pata_adma_bulk_map(struct ata_queued_cmd *qc) +{ + unsigned int si; + struct scatterlist *sg; + struct adma_bd *bdp = adma_info.adma_bd_table; + + BUG_ON(adma_info.qc); + + adma_info.qc = qc; + adma_info.sg_ents = 0; + + for_each_sg(qc->sg, sg, qc->n_elem, si) { + /* + * The ADMA mode is used setup the ADMA descriptor table + */ + bdp->sg_buf = sg_virt(sg); + bdp->length = sg->length; + if (sg->dma_address & 0xFFF) { + bdp->work_buf = + dma_alloc_coherent(qc->ap->dev, bdp->length, + &bdp->dma_address, GFP_KERNEL); + if (!bdp->work_buf) { + printk(KERN_WARNING + "can not allocate aligned buffer\n"); + goto fail; + } + if (qc->dma_dir == DMA_TO_DEVICE) + memcpy(bdp->work_buf, bdp->sg_buf, bdp->length); + } else { + bdp->work_buf = bdp->sg_buf; + bdp->dma_address = sg->dma_address; + } + + adma_info.sg_ents++; + bdp++; + } + return 0; + fail: + pata_adma_bulk_unmap(qc); + return -1; +} + +static void dma_callback(void *arg, int error_status, unsigned int count) +{ + struct ata_port *ap = arg; + struct pata_fsl_priv *priv = ap->host->private_data; + u8 *ata_regs = priv->fsl_ata_regs; + + priv->dma_done = 1; + /* + * DMA is finished, so unmask INTRQ from the drive to allow the + * normal ISR to fire. + */ + __raw_writel(FSL_ATA_INTR_ATA_INTRQ2, ata_regs + FSL_ATA_INT_EN); +} + +static irqreturn_t pata_fsl_adma_intr(int irq, void *dev_instance) +{ + struct ata_host *host = dev_instance; + struct pata_fsl_priv *priv = host->private_data; + u8 *ata_regs = priv->fsl_ata_regs; + unsigned int handled = 0; + unsigned int i; + unsigned long flags; + unsigned int pending = __raw_readl(ata_regs + FSL_ATA_INT_PEND); + + if (FSL_ATA_INTR_DMA_TRANS_OVER & pending) { + priv->dma_done = 1; + __raw_writel(pending, ata_regs + FSL_ATA_INT_CLEAR); + handled = 1; + } else if (FSL_ATA_INTR_DMA_ERR & pending) { + printk(KERN_ERR "dma err status 0x%x ...\n", + __raw_readl(ata_regs + FSL_ATA_ADMA_ERROR_STATUS)); + __raw_writel(pending, ata_regs + FSL_ATA_INT_CLEAR); + handled = 1; + i = __raw_readl(ata_regs + FSL_ATA_CONTROL) && 0xFF; + i |= FSL_ATA_CTRL_DMA_SRST | FSL_ATA_CTRL_DMA_32ADMA | + FSL_ATA_CTRL_DMA_ENABLE; + __raw_writel(i, ata_regs + FSL_ATA_CONTROL); + } + + spin_lock_irqsave(&host->lock, flags); + + for (i = 0; i < host->n_ports; i++) { + struct ata_port *ap; + + ap = host->ports[i]; + if (ap && !(ap->flags & ATA_FLAG_DISABLED)) { + struct ata_queued_cmd *qc; + + qc = ata_qc_from_tag(ap, ap->link.active_tag); + raw_local_irq_restore(flags); + pata_adma_bulk_unmap(qc); + raw_local_irq_save(flags); + if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && + (qc->flags & ATA_QCFLAG_ACTIVE)) + handled |= ata_sff_host_intr(ap, qc); + } + } + + spin_unlock_irqrestore(&host->lock, flags); + + return IRQ_RETVAL(handled); +} + +static int pata_fsl_check_atapi_dma(struct ata_queued_cmd *qc) +{ + return 1; /* ATAPI DMA not yet supported */ +} + +unsigned long pata_fsl_bmdma_mode_filter(struct ata_device *adev, + unsigned long xfer_mask) +{ + /* Capability of the controller has been specified in the + * platform data. Do not filter any modes, just return + * the xfer_mask */ + return xfer_mask; +} + +static void pata_fsl_bmdma_setup(struct ata_queued_cmd *qc) +{ + int chan, i; + int dma_mode = 0, dma_ultra; + u32 ata_control; + struct ata_port *ap = qc->ap; + struct pata_fsl_priv *priv = ap->host->private_data; + u8 *ata_regs = priv->fsl_ata_regs; + struct fsl_ata_platform_data *plat = ap->dev->platform_data; + int err; + unsigned int si; + + priv->dma_dir = qc->dma_dir; + + /* + * Configure the on-chip ATA interface hardware. + */ + dma_ultra = priv->ultra ? FSL_ATA_CTRL_DMA_ULTRA : 0; + + ata_control = FSL_ATA_CTRL_FIFO_RST_B | + FSL_ATA_CTRL_ATA_RST_B | FSL_ATA_CTRL_DMA_PENDING | dma_ultra; + if (plat->adma_flag) + ata_control |= FSL_ATA_CTRL_DMA_32ADMA | + FSL_ATA_CTRL_DMA_ENABLE; + + if (qc->dma_dir == DMA_TO_DEVICE) { + chan = priv->dma_wchan; + ata_control |= FSL_ATA_CTRL_FIFO_TX_EN | FSL_ATA_CTRL_DMA_WRITE; + dma_mode = MXC_DMA_MODE_WRITE; + } else { + chan = priv->dma_rchan; + ata_control |= FSL_ATA_CTRL_FIFO_RCV_EN; + dma_mode = MXC_DMA_MODE_READ; + } + + __raw_writel(ata_control, ata_regs + FSL_ATA_CONTROL); + __raw_writel(plat->fifo_alarm, ata_regs + FSL_ATA_FIFO_ALARM); + + if (plat->adma_flag) { + i = FSL_ATA_INTR_DMA_TRANS_OVER | FSL_ATA_INTR_DMA_ERR; + __raw_writel(FSL_ATA_INTR_ATA_INTRQ2 | i, + ata_regs + FSL_ATA_INT_EN); + } else { + __raw_writel(FSL_ATA_INTR_ATA_INTRQ1, + ata_regs + FSL_ATA_INT_EN); + /* + * Set up the DMA completion callback. + */ + mxc_dma_callback_set(chan, dma_callback, (void *)ap); + } + + /* + * Copy the sg list to an array. + */ + if (plat->adma_flag) { + struct adma_bd *bdp = adma_info.adma_bd_table; + pata_adma_bulk_map(qc); + for (i = 0; i < adma_info.sg_ents; i++) { + priv->adma_des_tp[i << 1] = bdp->length << 12; + priv->adma_des_tp[i << 1] |= FSL_ADMA_DES_ATTR_SET; + priv->adma_des_tp[i << 1] |= FSL_ADMA_DES_ATTR_VALID; + priv->adma_des_tp[(i << 1) + 1] = bdp->dma_address; + priv->adma_des_tp[(i << 1) + 1] |= + FSL_ADMA_DES_ATTR_TRAN; + priv->adma_des_tp[(i << 1) + 1] |= + FSL_ADMA_DES_ATTR_VALID; + if (adma_info.sg_ents == (i + 1)) + priv->adma_des_tp[(i << 1) + 1] |= + FSL_ADMA_DES_ATTR_END; + bdp++; + } + __raw_writel((qc->nbytes / qc->sect_size), ata_regs + + FSL_ATA_BLOCK_COUNT); + __raw_writel(plat->fifo_alarm, ata_regs + FSL_ATA_BURST_LENGTH); + __raw_writel(priv->adma_des_paddr, + ata_regs + FSL_ATA_ADMA_SYS_ADDR); + } else { + int nr_sg = 0; + struct scatterlist tmp[64], *tsg, *sg; + tsg = tmp; + for_each_sg(qc->sg, sg, qc->n_elem, si) { + memcpy(tsg, sg, sizeof(*sg)); + tsg++; + nr_sg++; + } + err = mxc_dma_sg_config(chan, tmp, nr_sg, 0, dma_mode); + if (err) + printk(KERN_ERR "pata_fsl_bmdma_setup: error %d\n", + err); + } +} + +static void pata_fsl_bmdma_start(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct pata_fsl_priv *priv = ap->host->private_data; + u8 *ata_regs = priv->fsl_ata_regs; + struct fsl_ata_platform_data *plat = ap->dev->platform_data; + int chan; + int err; + unsigned i; + + if (1 == plat->adma_flag) { + i = FSL_ATA_CTRL_DMA_32ADMA | FSL_ATA_CTRL_DMA_ENABLE; + /* The adma mode is used, set dma_start_stop to 1 */ + __raw_writel(i | __raw_readl(ata_regs + FSL_ATA_CONTROL) | + FSL_ATA_CTRL_DMA_STAT_STOP, + ata_regs + FSL_ATA_CONTROL); + } else { + /* + * Start the channel. + */ + chan = qc->dma_dir == DMA_TO_DEVICE ? priv->dma_wchan : + priv->dma_rchan; + + err = mxc_dma_enable(chan); + if (err) + printk(KERN_ERR "%s: : error %d\n", __func__, err); + } + + priv->dma_done = 0; + + ata_sff_exec_command(ap, &qc->tf); +} + +static void pata_fsl_bmdma_stop(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct pata_fsl_priv *priv = ap->host->private_data; + u8 *ata_regs = priv->fsl_ata_regs; + struct fsl_ata_platform_data *plat = ap->dev->platform_data; + unsigned i; + + if (plat->adma_flag) { + /* The adma mode is used, set dma_start_stop to 0 */ + i = FSL_ATA_CTRL_DMA_32ADMA | FSL_ATA_CTRL_DMA_ENABLE; + __raw_writel((i | __raw_readl(ata_regs + FSL_ATA_CONTROL)) & + (~FSL_ATA_CTRL_DMA_STAT_STOP), + ata_regs + FSL_ATA_CONTROL); + } + + /* do a dummy read as in ata_bmdma_stop */ +#if 0 + ata_sff_dma_pause(ap); +#endif +} + +static u8 pata_fsl_bmdma_status(struct ata_port *ap) +{ + struct pata_fsl_priv *priv = ap->host->private_data; + + return priv->dma_done ? ATA_DMA_INTR : 0; +} + +static void pata_fsl_dma_init(struct ata_port *ap) +{ + struct pata_fsl_priv *priv = ap->host->private_data; + + priv->dma_rchan = -1; + priv->dma_wchan = -1; + + priv->dma_rchan = mxc_dma_request(MXC_DMA_ATA_RX, "MXC ATA RX"); + if (priv->dma_rchan < 0) { + dev_printk(KERN_ERR, ap->dev, "couldn't get RX DMA channel\n"); + goto err_out; + } + + priv->dma_wchan = mxc_dma_request(MXC_DMA_ATA_TX, "MXC ATA TX"); + if (priv->dma_wchan < 0) { + dev_printk(KERN_ERR, ap->dev, "couldn't get TX DMA channel\n"); + goto err_out; + } + + dev_printk(KERN_ERR, ap->dev, "rchan=%d wchan=%d\n", priv->dma_rchan, + priv->dma_wchan); + return; + + err_out: + ap->mwdma_mask = 0; + ap->udma_mask = 0; + mxc_dma_free(priv->dma_rchan); + mxc_dma_free(priv->dma_wchan); + kfree(priv); +} + +#if 0 +static u8 pata_fsl_irq_ack(struct ata_port *ap, unsigned int chk_drq) +{ + unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY; + u8 status; + + status = ata_sff_busy_wait(ap, bits, 1000); + if (status & bits) + if (ata_msg_err(ap)) + printk(KERN_ERR "abnormal status 0x%X\n", status); + + return status; +} +#endif + +static void ata_dummy_noret(struct ata_port *ap) +{ + return; +} + +static struct scsi_host_template pata_fsl_sht = { + .module = THIS_MODULE, + .name = DRV_NAME, + .ioctl = ata_scsi_ioctl, + .queuecommand = ata_scsi_queuecmd, + .can_queue = ATA_DEF_QUEUE, + .this_id = ATA_SHT_THIS_ID, + .sg_tablesize = LIBATA_MAX_PRD, + .cmd_per_lun = ATA_SHT_CMD_PER_LUN, + .emulated = ATA_SHT_EMULATED, + .use_clustering = ATA_SHT_USE_CLUSTERING, + .proc_name = DRV_NAME, + .dma_boundary = FSL_ATA_MAX_SG_LEN, + .slave_configure = ata_scsi_slave_config, + .slave_destroy = ata_scsi_slave_destroy, + .bios_param = ata_std_bios_param, +}; + +static struct ata_port_operations pata_fsl_port_ops = { + .inherits = &ata_bmdma_port_ops, + .set_piomode = pata_fsl_set_piomode, + .set_dmamode = pata_fsl_set_dmamode, + + .check_atapi_dma = pata_fsl_check_atapi_dma, + .cable_detect = ata_cable_unknown, + .mode_filter = pata_fsl_bmdma_mode_filter, + + .bmdma_setup = pata_fsl_bmdma_setup, + .bmdma_start = pata_fsl_bmdma_start, + .bmdma_stop = pata_fsl_bmdma_stop, + .bmdma_status = pata_fsl_bmdma_status, + + .qc_prep = ata_noop_qc_prep, + + .sff_data_xfer = ata_sff_data_xfer_noirq, + .sff_irq_clear = ata_dummy_noret, + .sff_irq_on = ata_sff_irq_on, + + .port_start = pata_fsl_port_start, +}; + +static void fsl_setup_port(struct ata_ioports *ioaddr) +{ + unsigned int shift = 2; + + ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); + ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); + ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); + ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); + ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); + ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); + ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); + ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); + ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); + ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << shift); +} + +/** + * pata_fsl_probe - attach a platform interface + * @pdev: platform device + * + * Register a platform bus integrated ATA host controller + * + * The 3 platform device resources are used as follows: + * + * - I/O Base (IORESOURCE_MEM) virt. addr. of ATA controller regs + * - CTL Base (IORESOURCE_MEM) unused + * - IRQ (IORESOURCE_IRQ) platform IRQ assigned to ATA + * + */ +static int __devinit pata_fsl_probe(struct platform_device *pdev) +{ + int ret = 0; + struct resource *io_res; + struct ata_host *host; + struct ata_port *ap; + struct fsl_ata_platform_data *plat = (struct fsl_ata_platform_data *) + pdev->dev.platform_data; + struct pata_fsl_priv *priv; + u8 *ata_regs; + unsigned int int_enable; + + /* + * Set up resources + */ + if (unlikely(pdev->num_resources != 3)) { + dev_err(&pdev->dev, "invalid number of resources\n"); + return -EINVAL; + } + /* + * Get an ata_host structure for this device + */ + host = ata_host_alloc(&pdev->dev, 1); + if (!host) + return -ENOMEM; + ap = host->ports[0]; + + /* + * Allocate private data + */ + priv = kzalloc(sizeof(struct pata_fsl_priv), GFP_KERNEL); + if (priv == NULL) { + ret = -ENOMEM; + goto err0; + } + host->private_data = priv; + + /* + * Set up resources + */ + io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ata_regs = + (u8 *) ioremap(io_res->start, io_res->end - io_res->start + 1); + priv->fsl_ata_regs = ata_regs; + ap->ioaddr.cmd_addr = (void *)(ata_regs + FSL_ATA_DRIVE_DATA); + ap->ioaddr.ctl_addr = (void *)(ata_regs + FSL_ATA_DRIVE_CONTROL); + ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; + ap->ops = &pata_fsl_port_ops; + ap->pio_mask = plat->pio_mask; /* support pio 0~4 */ + ap->mwdma_mask = plat->mwdma_mask; /* support mdma 0~2 */ + ap->udma_mask = plat->udma_mask; + pata_fsl_sht.sg_tablesize = plat->max_sg; + fsl_setup_port(&ap->ioaddr); + + if (plat->adma_flag) { + priv->adma_des_tp = + dma_alloc_coherent(&(pdev->dev), + (2 * plat->max_sg) * + sizeof(unsigned int), + &(priv->adma_des_paddr), GFP_DMA); + if (priv->adma_des_tp == NULL) { + ret = -ENOMEM; + goto err1; + } + } + /* + * Do platform-specific initialization (e.g. allocate pins, + * turn on clock). After this call it is assumed that + * plat->get_clk_rate() can be called to calculate + * timing. + */ + if (plat->init && plat->init(pdev)) { + ret = -ENODEV; + goto err2; + } + + priv->clk = clk_get(&pdev->dev, "ata_clk"); + clk_enable(priv->clk); + + /* Deassert the reset bit to enable the interface */ + __raw_writel(FSL_ATA_CTRL_ATA_RST_B, ata_regs + FSL_ATA_CONTROL); + + /* Enable Core regulator & IO Regulator */ + if (plat->core_reg != NULL) { + core_reg = regulator_get(&pdev->dev, plat->core_reg); + if (regulator_enable(core_reg)) + printk(KERN_INFO "enable core regulator error.\n"); + msleep(100); + + } else + core_reg = NULL; + + if (plat->io_reg != NULL) { + io_reg = regulator_get(&pdev->dev, plat->io_reg); + if (regulator_enable(io_reg)) + printk(KERN_INFO "enable io regulator error.\n"); + msleep(100); + + } else + io_reg = NULL; + + /* Set initial timing and mode */ + set_ata_bus_timing(XFER_PIO_4, pdev); + + /* get DMA ready */ + if (plat->adma_flag == 0) + pata_fsl_dma_init(ap); + + /* + * Enable the ATA INTRQ interrupt from the bus, but + * only allow the CPU to see it (INTRQ2) at this point. + * INTRQ1, which goes to the DMA, will be enabled later. + */ + int_enable = FSL_ATA_INTR_DMA_TRANS_OVER | FSL_ATA_INTR_DMA_ERR | + FSL_ATA_INTR_ATA_INTRQ2; + if (plat->adma_flag) + __raw_writel(int_enable, ata_regs + FSL_ATA_INT_EN); + else + __raw_writel(FSL_ATA_INTR_ATA_INTRQ2, + ata_regs + FSL_ATA_INT_EN); + + /* activate */ + if (plat->adma_flag) + ret = ata_host_activate(host, platform_get_irq(pdev, 0), + pata_fsl_adma_intr, 0, &pata_fsl_sht); + else + ret = ata_host_activate(host, platform_get_irq(pdev, 0), + ata_sff_interrupt, 0, &pata_fsl_sht); + + if (!ret) + return ret; + + clk_disable(priv->clk); + regulator_disable(core_reg); + regulator_disable(io_reg); + err2: + if (plat->adma_flag && priv->adma_des_tp) + dma_free_coherent(&(pdev->dev), + (2 * plat->max_sg + + 1) * sizeof(unsigned int), priv->adma_des_tp, + priv->adma_des_paddr); + err1: + iounmap(ata_regs); + kfree(priv); + err0: + ata_host_detach(host); + return ret; + +} + +/** + * pata_fsl_remove - unplug a platform interface + * @pdev: platform device + * + * A platform bus ATA device has been unplugged. Perform the needed + * cleanup. Also called on module unload for any active devices. + */ +static int __devexit pata_fsl_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct ata_host *host = dev_get_drvdata(dev); + struct pata_fsl_priv *priv = host->private_data; + struct fsl_ata_platform_data *plat = (struct fsl_ata_platform_data *) + pdev->dev.platform_data; + u8 *ata_regs = priv->fsl_ata_regs; + + __raw_writel(0, ata_regs + FSL_ATA_INT_EN); /* Disable interrupts */ + + ata_host_detach(host); + + clk_disable(priv->clk); + clk_put(priv->clk); + priv->clk = NULL; + + /* Disable Core regulator & IO Regulator */ + if (plat->core_reg != NULL) { + regulator_disable(core_reg); + regulator_put(core_reg); + } + if (plat->io_reg != NULL) { + regulator_disable(io_reg); + regulator_put(io_reg); + } + + if (plat->exit) + plat->exit(); + + if (plat->adma_flag && priv->adma_des_tp) + dma_free_coherent(&(pdev->dev), + (2 * plat->max_sg) * + sizeof(unsigned int), priv->adma_des_tp, + priv->adma_des_paddr); + iounmap(ata_regs); + + kfree(priv); + + return 0; +} + +#ifdef CONFIG_PM +static int pata_fsl_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct ata_host *host = dev_get_drvdata(&pdev->dev); + struct pata_fsl_priv *priv = host->private_data; + struct fsl_ata_platform_data *plat = (struct fsl_ata_platform_data *) + pdev->dev.platform_data; + u8 *ata_regs = priv->fsl_ata_regs; + + ata_host_suspend(host, state); + + /* Disable interrupts. */ + __raw_writel(0, ata_regs + FSL_ATA_INT_EN); + + clk_disable(priv->clk); + + if (plat->exit) + plat->exit(); + + return 0; +} + +static int pata_fsl_resume(struct platform_device *pdev) +{ + struct ata_host *host = dev_get_drvdata(&pdev->dev); + struct pata_fsl_priv *priv = host->private_data; + struct fsl_ata_platform_data *plat = (struct fsl_ata_platform_data *) + pdev->dev.platform_data; + u8 *ata_regs = priv->fsl_ata_regs; + unsigned char int_enable; + + if (plat->init && plat->init(pdev)) + return -ENODEV; + + clk_enable(priv->clk); + + /* Deassert the reset bit to enable the interface */ + __raw_writel(FSL_ATA_CTRL_ATA_RST_B, ata_regs + FSL_ATA_CONTROL); + + /* Set initial timing and mode */ + set_ata_bus_timing(XFER_PIO_4, pdev); + + /* + * Enable hardware interrupts. + */ + int_enable = FSL_ATA_INTR_DMA_TRANS_OVER | FSL_ATA_INTR_DMA_ERR | + FSL_ATA_INTR_ATA_INTRQ2; + if (1 == plat->adma_flag) + __raw_writel(int_enable, ata_regs + FSL_ATA_INT_EN); + else + __raw_writel(FSL_ATA_INTR_ATA_INTRQ2, + ata_regs + FSL_ATA_INT_EN); + + ata_host_resume(host); + + return 0; +} +#endif + +static struct platform_driver pata_fsl_driver = { + .probe = pata_fsl_probe, + .remove = __devexit_p(pata_fsl_remove), +#ifdef CONFIG_PM + .suspend = pata_fsl_suspend, + .resume = pata_fsl_resume, +#endif + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + }, +}; + +static int __init pata_fsl_init(void) +{ + return platform_driver_register(&pata_fsl_driver); + + return 0; +} + +static void __exit pata_fsl_exit(void) +{ + platform_driver_unregister(&pata_fsl_driver); +} + +module_init(pata_fsl_init); +module_exit(pata_fsl_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("low-level driver for Freescale ATA"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/ata/sata_via.c +++ linux-fsl-imx51-2.6.31/drivers/ata/sata_via.c @@ -93,7 +93,6 @@ { PCI_VDEVICE(VIA, 0x7372), vt6420 }, { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ { PCI_VDEVICE(VIA, 0x9000), vt8251 }, - { PCI_VDEVICE(VIA, 0x9040), vt8251 }, { } /* terminate list */ }; --- linux-fsl-imx51-2.6.31.orig/drivers/ata/ahci.c +++ linux-fsl-imx51-2.6.31/drivers/ata/ahci.c @@ -433,7 +433,8 @@ [board_ahci_sb600] = { AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | - AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255), + AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI | + AHCI_HFLAG_SECT255), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, @@ -2602,51 +2603,6 @@ } } -/* - * SB600 ahci controller on ASUS M2A-VM can't do 64bit DMA with older - * BIOS. The oldest version known to be broken is 0901 and working is - * 1501 which was released on 2007-10-26. Force 32bit DMA on anything - * older than 1501. Please read bko#9412 for more info. - */ -static bool ahci_asus_m2a_vm_32bit_only(struct pci_dev *pdev) -{ - static const struct dmi_system_id sysids[] = { - { - .ident = "ASUS M2A-VM", - .matches = { - DMI_MATCH(DMI_BOARD_VENDOR, - "ASUSTeK Computer INC."), - DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"), - }, - }, - { } - }; - const char *cutoff_mmdd = "10/26"; - const char *date; - int year; - - if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) || - !dmi_check_system(sysids)) - return false; - - /* - * Argh.... both version and date are free form strings. - * Let's hope they're using the same date format across - * different versions. - */ - date = dmi_get_system_info(DMI_BIOS_DATE); - year = dmi_get_year(DMI_BIOS_DATE); - if (date && strlen(date) >= 10 && date[2] == '/' && date[5] == '/' && - (year > 2007 || - (year == 2007 && strncmp(date, cutoff_mmdd, 5) >= 0))) - return false; - - dev_printk(KERN_WARNING, &pdev->dev, "ASUS M2A-VM: BIOS too old, " - "forcing 32bit DMA, update BIOS\n"); - - return true; -} - static bool ahci_broken_system_poweroff(struct pci_dev *pdev) { static const struct dmi_system_id broken_systems[] = { @@ -2857,12 +2813,8 @@ if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; - /* apply ASUS M2A_VM quirk */ - if (ahci_asus_m2a_vm_32bit_only(pdev)) - hpriv->flags |= AHCI_HFLAG_32BIT_ONLY; - - if (!(hpriv->flags & AHCI_HFLAG_NO_MSI)) - pci_enable_msi(pdev); + if ((hpriv->flags & AHCI_HFLAG_NO_MSI) || pci_enable_msi(pdev)) + pci_intx(pdev, 1); /* save initial config */ ahci_save_initial_config(pdev, hpriv); --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_cmd64x.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_cmd64x.c @@ -219,7 +219,7 @@ regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; /* Merge the control bits */ regU |= 1 << adev->devno; /* UDMA on */ - if (adev->dma_mode > 2) /* 15nS timing */ + if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */ regU |= 4 << adev->devno; } else { regU &= ~ (1 << adev->devno); /* UDMA off */ --- linux-fsl-imx51-2.6.31.orig/drivers/ata/pata_hpt3x2n.c +++ linux-fsl-imx51-2.6.31/drivers/ata/pata_hpt3x2n.c @@ -8,7 +8,7 @@ * Copyright (C) 1999-2003 Andre Hedrick * Portions Copyright (C) 2001 Sun Microsystems, Inc. * Portions Copyright (C) 2003 Red Hat Inc - * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. + * Portions Copyright (C) 2005-2009 MontaVista Software, Inc. * * * TODO @@ -25,7 +25,7 @@ #include #define DRV_NAME "pata_hpt3x2n" -#define DRV_VERSION "0.3.4" +#define DRV_VERSION "0.3.8" enum { HPT_PCI_FAST = (1 << 31), @@ -185,9 +185,8 @@ pci_read_config_dword(pdev, addr1, ®); mode = hpt3x2n_find_mode(ap, adev->pio_mode); - mode &= ~0x8000000; /* No FIFO in PIO */ - mode &= ~0x30070000; /* Leave config bits alone */ - reg &= 0x30070000; /* Strip timing bits */ + mode &= 0xCFC3FFFF; /* Leave DMA bits alone */ + reg &= ~0xCFC3FFFF; /* Strip timing bits */ pci_write_config_dword(pdev, addr1, reg | mode); } @@ -204,8 +203,7 @@ { struct pci_dev *pdev = to_pci_dev(ap->host->dev); u32 addr1, addr2; - u32 reg; - u32 mode; + u32 reg, mode, mask; u8 fast; addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); @@ -216,11 +214,12 @@ fast &= ~0x07; pci_write_config_byte(pdev, addr2, fast); + mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000; + pci_read_config_dword(pdev, addr1, ®); mode = hpt3x2n_find_mode(ap, adev->dma_mode); - mode |= 0x8000000; /* FIFO in MWDMA or UDMA */ - mode &= ~0xC0000000; /* Leave config bits alone */ - reg &= 0xC0000000; /* Strip timing bits */ + mode &= mask; + reg &= ~mask; pci_write_config_dword(pdev, addr1, reg | mode); } @@ -263,7 +262,7 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source) { - void __iomem *bmdma = ap->ioaddr.bmdma_addr; + void __iomem *bmdma = ap->ioaddr.bmdma_addr - ap->port_no * 8; /* Tristate the bus */ iowrite8(0x80, bmdma+0x73); @@ -273,9 +272,9 @@ iowrite8(source, bmdma+0x7B); iowrite8(0xC0, bmdma+0x79); - /* Reset state machines */ - iowrite8(0x37, bmdma+0x70); - iowrite8(0x37, bmdma+0x74); + /* Reset state machines, avoid enabling the disabled channels */ + iowrite8(ioread8(bmdma+0x70) | 0x32, bmdma+0x70); + iowrite8(ioread8(bmdma+0x74) | 0x32, bmdma+0x74); /* Complete reset */ iowrite8(0x00, bmdma+0x79); @@ -285,21 +284,10 @@ iowrite8(0x00, bmdma+0x77); } -/* Check if our partner interface is busy */ - -static int hpt3x2n_pair_idle(struct ata_port *ap) -{ - struct ata_host *host = ap->host; - struct ata_port *pair = host->ports[ap->port_no ^ 1]; - - if (pair->hsm_task_state == HSM_ST_IDLE) - return 1; - return 0; -} - static int hpt3x2n_use_dpll(struct ata_port *ap, int writing) { long flags = (long)ap->host->private_data; + /* See if we should use the DPLL */ if (writing) return USE_DPLL; /* Needed for write */ @@ -308,20 +296,35 @@ return 0; } +static int hpt3x2n_qc_defer(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct ata_port *alt = ap->host->ports[ap->port_no ^ 1]; + int rc, flags = (long)ap->host->private_data; + int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); + + /* First apply the usual rules */ + rc = ata_std_qc_defer(qc); + if (rc != 0) + return rc; + + if ((flags & USE_DPLL) != dpll && alt->qc_active) + return ATA_DEFER_PORT; + return 0; +} + static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc) { - struct ata_taskfile *tf = &qc->tf; struct ata_port *ap = qc->ap; int flags = (long)ap->host->private_data; + int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); - if (hpt3x2n_pair_idle(ap)) { - int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); - if ((flags & USE_DPLL) != dpll) { - if (dpll == 1) - hpt3x2n_set_clock(ap, 0x21); - else - hpt3x2n_set_clock(ap, 0x23); - } + if ((flags & USE_DPLL) != dpll) { + flags &= ~USE_DPLL; + flags |= dpll; + ap->host->private_data = (void *)(long)flags; + + hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23); } return ata_sff_qc_issue(qc); } @@ -338,6 +341,8 @@ .inherits = &ata_bmdma_port_ops, .bmdma_stop = hpt3x2n_bmdma_stop, + + .qc_defer = hpt3x2n_qc_defer, .qc_issue = hpt3x2n_qc_issue, .cable_detect = hpt3x2n_cable_detect, @@ -455,7 +460,7 @@ unsigned int f_low, f_high; int adjust; unsigned long iobase = pci_resource_start(dev, 4); - void *hpriv = NULL; + void *hpriv = (void *)USE_DPLL; int rc; rc = pcim_enable_device(dev); @@ -543,7 +548,7 @@ /* Set our private data up. We only need a few flags so we use it directly */ if (pci_mhz > 60) { - hpriv = (void *)PCI66; + hpriv = (void *)(PCI66 | USE_DPLL); /* * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in * the MISC. register to stretch the UltraDMA Tss timing. --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/watchdog/Kconfig @@ -203,6 +203,27 @@ Say N if you are unsure. +config MXC_WATCHDOG + tristate "MXC watchdog" + depends on WATCHDOG && WATCHDOG_NOWAYOUT + depends on ARCH_MXC + help + Watchdog timer embedded into MXC chips. This will + reboot your system when timeout is reached. + + NOTE: once enabled, this timer cannot be disabled. + To compile this driver as a module, choose M here: the + module will be called mxc_wdt. + +config STMP3XXX_WATCHDOG + tristate "Sigmatel STMP3XXX watchdog" + depends on ARCH_STMP3XXX + help + Say Y here if to include support for the watchdog timer + for the Sigmatel STMP37XX/378X SoC. + To compile this driver as a module, choose M here: the + module will be called stmp3xxx_wdt. + config IOP_WATCHDOG tristate "IOP Watchdog" depends on PLAT_IOP --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/stmp3xxx_wdt.c +++ linux-fsl-imx51-2.6.31/drivers/watchdog/stmp3xxx_wdt.c @@ -3,7 +3,7 @@ * * Author: Vitaly Wool * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ #include @@ -39,18 +39,18 @@ { spin_lock(&stmp3xxx_wdt_io_lock); __raw_writel(value, REGS_RTC_BASE + HW_RTC_WATCHDOG); - stmp3xxx_setl(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL); - stmp3xxx_setl(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, - REGS_RTC_BASE + HW_RTC_PERSISTENT1); + __raw_writel(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL_SET); + __raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, + REGS_RTC_BASE + HW_RTC_PERSISTENT1_SET); spin_unlock(&stmp3xxx_wdt_io_lock); } static void wdt_disable(void) { spin_lock(&stmp3xxx_wdt_io_lock); - stmp3xxx_clearl(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, - REGS_RTC_BASE + HW_RTC_PERSISTENT1); - stmp3xxx_clearl(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL); + __raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, + REGS_RTC_BASE + HW_RTC_PERSISTENT1_CLR); + __raw_writel(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL_CLR); spin_unlock(&stmp3xxx_wdt_io_lock); } @@ -210,8 +210,8 @@ boot_status = __raw_readl(REGS_RTC_BASE + HW_RTC_PERSISTENT1) & BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER; boot_status = !!boot_status; - stmp3xxx_clearl(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, - REGS_RTC_BASE + HW_RTC_PERSISTENT1); + __raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, + REGS_RTC_BASE + HW_RTC_PERSISTENT1_CLR); wdt_disable(); /* disable for now */ ret = misc_register(&stmp3xxx_wdt_miscdev); --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/Makefile +++ linux-fsl-imx51-2.6.31/drivers/watchdog/Makefile @@ -38,6 +38,8 @@ obj-$(CONFIG_SA1100_WATCHDOG) += sa1100_wdt.o obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o +obj-$(CONFIG_MXC_WATCHDOG) += mxc_wdt.o +obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/riowd.c +++ linux-fsl-imx51-2.6.31/drivers/watchdog/riowd.c @@ -206,7 +206,7 @@ dev_set_drvdata(&op->dev, p); riowd_device = p; - err = 0; + return 0; out_iounmap: of_iounmap(&op->resource[0], p->regs, 2); --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/mxc_wdt.c +++ linux-fsl-imx51-2.6.31/drivers/watchdog/mxc_wdt.c @@ -0,0 +1,381 @@ +/* + * linux/drivers/char/watchdog/mxc_wdt.c + * + * Watchdog driver for FSL MXC. It is based on omap1610_wdt.c + * + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * 2005 (c) MontaVista Software, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * History: + * + * 20051207: + * Full rewrite based on + * linux-2.6.15-rc5/drivers/char/watchdog/omap_wdt.c + * Add platform resource support + * + */ + +/*! + * @defgroup WDOG Watchdog Timer (WDOG) Driver + */ +/*! + * @file mxc_wdt.c + * + * @brief Watchdog timer driver + * + * @ingroup WDOG + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include "mxc_wdt.h" +#define DVR_VER "2.0" + +#define WDOG_SEC_TO_COUNT(s) ((s * 2) << 8) +#define WDOG_COUNT_TO_SEC(c) ((c >> 8) / 2) + +static void __iomem *wdt_base_reg; +static int mxc_wdt_users; +static struct clk *mxc_wdt_clk; + +static unsigned timer_margin = TIMER_MARGIN_DEFAULT; +module_param(timer_margin, uint, 0); +MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); + +static unsigned dev_num = 0; + +static void mxc_wdt_ping(void *base) +{ + /* issue the service sequence instructions */ + __raw_writew(WDT_MAGIC_1, base + MXC_WDT_WSR); + __raw_writew(WDT_MAGIC_2, base + MXC_WDT_WSR); +} + +static void mxc_wdt_config(void *base) +{ + u16 val; + + val = __raw_readw(base + MXC_WDT_WCR); + val |= 0xFF00 | WCR_WOE_BIT | WCR_WDA_BIT | WCR_SRS_BIT; + /* enable suspend WDT */ + val |= WCR_WDZST_BIT | WCR_WDBG_BIT; + /* generate reset if wdog times out */ + val &= ~WCR_WRE_BIT; + + __raw_writew(val, base + MXC_WDT_WCR); +} + +static void mxc_wdt_enable(void *base) +{ + u16 val; + + val = __raw_readw(base + MXC_WDT_WCR); + val |= WCR_WDE_BIT; + __raw_writew(val, base + MXC_WDT_WCR); +} + +static void mxc_wdt_disable(void *base) +{ + /* disable not supported by this chip */ +} + +static void mxc_wdt_adjust_timeout(unsigned new_timeout) +{ + if (new_timeout < TIMER_MARGIN_MIN) + new_timeout = TIMER_MARGIN_DEFAULT; + if (new_timeout > TIMER_MARGIN_MAX) + new_timeout = TIMER_MARGIN_MAX; + timer_margin = new_timeout; +} + +static u16 mxc_wdt_get_timeout(void *base) +{ + u16 val; + + val = __raw_readw(base + MXC_WDT_WCR); + return WDOG_COUNT_TO_SEC(val); +} + +static u16 mxc_wdt_get_bootreason(void *base) +{ + u16 val; + + val = __raw_readw(base + MXC_WDT_WRSR); + return val; +} + +static void mxc_wdt_set_timeout(void *base) +{ + u16 val; + val = __raw_readw(base + MXC_WDT_WCR); + val = (val & 0x00FF) | WDOG_SEC_TO_COUNT(timer_margin); + __raw_writew(val, base + MXC_WDT_WCR); + val = __raw_readw(base + MXC_WDT_WCR); + timer_margin = WDOG_COUNT_TO_SEC(val); +} + +/* + * Allow only one task to hold it open + */ + +static int mxc_wdt_open(struct inode *inode, struct file *file) +{ + + if (test_and_set_bit(1, (unsigned long *)&mxc_wdt_users)) + return -EBUSY; + + mxc_wdt_config(wdt_base_reg); + mxc_wdt_set_timeout(wdt_base_reg); + mxc_wdt_enable(wdt_base_reg); + mxc_wdt_ping(wdt_base_reg); + + return 0; +} + +static int mxc_wdt_release(struct inode *inode, struct file *file) +{ + /* + * Shut off the timer unless NOWAYOUT is defined. + */ +#ifndef CONFIG_WATCHDOG_NOWAYOUT + mxc_wdt_disable(wdt_base_reg); + +#else + printk(KERN_CRIT "mxc_wdt: Unexpected close, not stopping!\n"); +#endif + mxc_wdt_users = 0; + return 0; +} + +static ssize_t +mxc_wdt_write(struct file *file, const char __user * data, + size_t len, loff_t * ppos) +{ + /* Refresh LOAD_TIME. */ + if (len) + mxc_wdt_ping(wdt_base_reg); + return len; +} + +static int +mxc_wdt_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int new_margin; + int bootr; + + static struct watchdog_info ident = { + .identity = "MXC Watchdog", + .options = WDIOF_SETTIMEOUT, + .firmware_version = 0, + }; + + switch (cmd) { + default: + return -ENOIOCTLCMD; + case WDIOC_GETSUPPORT: + return copy_to_user((struct watchdog_info __user *)arg, &ident, + sizeof(ident)); + case WDIOC_GETSTATUS: + return put_user(0, (int __user *)arg); + case WDIOC_GETBOOTSTATUS: + bootr = mxc_wdt_get_bootreason(wdt_base_reg); + return put_user(bootr, (int __user *)arg); + case WDIOC_KEEPALIVE: + mxc_wdt_ping(wdt_base_reg); + return 0; + case WDIOC_SETTIMEOUT: + if (get_user(new_margin, (int __user *)arg)) + return -EFAULT; + + mxc_wdt_adjust_timeout(new_margin); + mxc_wdt_disable(wdt_base_reg); + mxc_wdt_set_timeout(wdt_base_reg); + mxc_wdt_enable(wdt_base_reg); + mxc_wdt_ping(wdt_base_reg); + return 0; + + case WDIOC_GETTIMEOUT: + mxc_wdt_ping(wdt_base_reg); + new_margin = mxc_wdt_get_timeout(wdt_base_reg); + return put_user(new_margin, (int __user *)arg); + } +} + +static struct file_operations mxc_wdt_fops = { + .owner = THIS_MODULE, + .write = mxc_wdt_write, + .ioctl = mxc_wdt_ioctl, + .open = mxc_wdt_open, + .release = mxc_wdt_release, +}; + +static struct miscdevice mxc_wdt_miscdev = { + .minor = WATCHDOG_MINOR, + .name = "watchdog", + .fops = &mxc_wdt_fops +}; + +static int __init mxc_wdt_probe(struct platform_device *pdev) +{ + struct resource *res, *mem; + int ret; + + /* reserve static register mappings */ + res = platform_get_resource(pdev, IORESOURCE_MEM, dev_num); + if (!res) + return -ENOENT; + + mem = request_mem_region(res->start, res->end - res->start + 1, + pdev->name); + if (mem == NULL) + return -EBUSY; + + platform_set_drvdata(pdev, mem); + + wdt_base_reg = IO_ADDRESS(res->start); + mxc_wdt_disable(wdt_base_reg); + mxc_wdt_adjust_timeout(timer_margin); + + mxc_wdt_users = 0; + + mxc_wdt_miscdev.this_device = &pdev->dev; + + mxc_wdt_clk = clk_get(NULL, "wdog_clk"); + clk_enable(mxc_wdt_clk); + + ret = misc_register(&mxc_wdt_miscdev); + if (ret) + goto fail; + + pr_info("MXC Watchdog # %d Timer: initial timeout %d sec\n", dev_num, + timer_margin); + + return 0; + + fail: + release_resource(mem); + pr_info("MXC Watchdog Probe failed\n"); + return ret; +} + +static void mxc_wdt_shutdown(struct platform_device *pdev) +{ + mxc_wdt_disable(wdt_base_reg); + pr_info("MXC Watchdog # %d shutdown\n", dev_num); +} + +static int __exit mxc_wdt_remove(struct platform_device *pdev) +{ + struct resource *mem = platform_get_drvdata(pdev); + misc_deregister(&mxc_wdt_miscdev); + release_resource(mem); + pr_info("MXC Watchdog # %d removed\n", dev_num); + return 0; +} + +#ifdef CONFIG_PM + +/* REVISIT ... not clear this is the best way to handle system suspend; and + * it's very inappropriate for selective device suspend (e.g. suspending this + * through sysfs rather than by stopping the watchdog daemon). Also, this + * may not play well enough with NOWAYOUT... + */ + +static int mxc_wdt_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (mxc_wdt_users) { + mxc_wdt_disable(wdt_base_reg); + } + return 0; +} + +static int mxc_wdt_resume(struct platform_device *pdev) +{ + if (mxc_wdt_users) { + mxc_wdt_enable(wdt_base_reg); + mxc_wdt_ping(wdt_base_reg); + } + return 0; +} + +#else +#define mxc_wdt_suspend NULL +#define mxc_wdt_resume NULL +#endif + +static struct platform_driver mxc_wdt_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "mxc_wdt", + }, + .probe = mxc_wdt_probe, + .shutdown = mxc_wdt_shutdown, + .remove = __exit_p(mxc_wdt_remove), + .suspend = mxc_wdt_suspend, + .resume = mxc_wdt_resume, +}; + +static int __init mxc_wdt_init(void) +{ + pr_info("MXC WatchDog Driver %s\n", DVR_VER); + + if ((timer_margin < TIMER_MARGIN_MIN) || + (timer_margin > TIMER_MARGIN_MAX)) { + pr_info("MXC watchdog error. wrong timer_margin %d\n", + timer_margin); + pr_info(" Range: %d to %d seconds\n", TIMER_MARGIN_MIN, + TIMER_MARGIN_MAX); + return -EINVAL; + } + + return platform_driver_register(&mxc_wdt_driver); +} + +static void __exit mxc_wdt_exit(void) +{ + platform_driver_unregister(&mxc_wdt_driver); + pr_info("MXC WatchDog Driver removed\n"); +} + +module_init(mxc_wdt_init); +module_exit(mxc_wdt_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); --- linux-fsl-imx51-2.6.31.orig/drivers/watchdog/mxc_wdt.h +++ linux-fsl-imx51-2.6.31/drivers/watchdog/mxc_wdt.h @@ -0,0 +1,37 @@ +/* + * linux/drivers/char/watchdog/mxc_wdt.h + * + * BRIEF MODULE DESCRIPTION + * MXC Watchdog timer register definitions + * + * Author: MontaVista Software, Inc. + * or + * + * 2005 (c) MontaVista Software, Inc. + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __MXC_WDT_H__ +#define __MXC_WDT_H__ + +#define MXC_WDT_WCR 0x00 +#define MXC_WDT_WSR 0x02 +#define MXC_WDT_WRSR 0x04 +#define WCR_WOE_BIT (1 << 6) +#define WCR_WDA_BIT (1 << 5) +#define WCR_SRS_BIT (1 << 4) +#define WCR_WRE_BIT (1 << 3) +#define WCR_WDE_BIT (1 << 2) +#define WCR_WDBG_BIT (1 << 1) +#define WCR_WDZST_BIT (1 << 0) +#define WDT_MAGIC_1 0x5555 +#define WDT_MAGIC_2 0xAAAA + +#define TIMER_MARGIN_MAX 127 +#define TIMER_MARGIN_DEFAULT 60 /* 60 secs */ +#define TIMER_MARGIN_MIN 1 + +#endif /* __MXC_WDT_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/infiniband/core/uverbs_cmd.c +++ linux-fsl-imx51-2.6.31/drivers/infiniband/core/uverbs_cmd.c @@ -875,68 +875,81 @@ return ret ? ret : in_len; } +static int copy_wc_to_user(void __user *dest, struct ib_wc *wc) +{ + struct ib_uverbs_wc tmp; + + tmp.wr_id = wc->wr_id; + tmp.status = wc->status; + tmp.opcode = wc->opcode; + tmp.vendor_err = wc->vendor_err; + tmp.byte_len = wc->byte_len; + tmp.ex.imm_data = (__u32 __force) wc->ex.imm_data; + tmp.qp_num = wc->qp->qp_num; + tmp.src_qp = wc->src_qp; + tmp.wc_flags = wc->wc_flags; + tmp.pkey_index = wc->pkey_index; + tmp.slid = wc->slid; + tmp.sl = wc->sl; + tmp.dlid_path_bits = wc->dlid_path_bits; + tmp.port_num = wc->port_num; + tmp.reserved = 0; + + if (copy_to_user(dest, &tmp, sizeof tmp)) + return -EFAULT; + + return 0; +} + ssize_t ib_uverbs_poll_cq(struct ib_uverbs_file *file, const char __user *buf, int in_len, int out_len) { struct ib_uverbs_poll_cq cmd; - struct ib_uverbs_poll_cq_resp *resp; + struct ib_uverbs_poll_cq_resp resp; + u8 __user *header_ptr; + u8 __user *data_ptr; struct ib_cq *cq; - struct ib_wc *wc; - int ret = 0; - int i; - int rsize; + struct ib_wc wc; + int ret; if (copy_from_user(&cmd, buf, sizeof cmd)) return -EFAULT; - wc = kmalloc(cmd.ne * sizeof *wc, GFP_KERNEL); - if (!wc) - return -ENOMEM; - - rsize = sizeof *resp + cmd.ne * sizeof(struct ib_uverbs_wc); - resp = kmalloc(rsize, GFP_KERNEL); - if (!resp) { - ret = -ENOMEM; - goto out_wc; - } - cq = idr_read_cq(cmd.cq_handle, file->ucontext, 0); - if (!cq) { - ret = -EINVAL; - goto out; - } + if (!cq) + return -EINVAL; - resp->count = ib_poll_cq(cq, cmd.ne, wc); - - put_cq_read(cq); + /* we copy a struct ib_uverbs_poll_cq_resp to user space */ + header_ptr = (void __user *)(unsigned long) cmd.response; + data_ptr = header_ptr + sizeof resp; + + memset(&resp, 0, sizeof resp); + while (resp.count < cmd.ne) { + ret = ib_poll_cq(cq, 1, &wc); + if (ret < 0) + goto out_put; + if (!ret) + break; + + ret = copy_wc_to_user(data_ptr, &wc); + if (ret) + goto out_put; - for (i = 0; i < resp->count; i++) { - resp->wc[i].wr_id = wc[i].wr_id; - resp->wc[i].status = wc[i].status; - resp->wc[i].opcode = wc[i].opcode; - resp->wc[i].vendor_err = wc[i].vendor_err; - resp->wc[i].byte_len = wc[i].byte_len; - resp->wc[i].ex.imm_data = (__u32 __force) wc[i].ex.imm_data; - resp->wc[i].qp_num = wc[i].qp->qp_num; - resp->wc[i].src_qp = wc[i].src_qp; - resp->wc[i].wc_flags = wc[i].wc_flags; - resp->wc[i].pkey_index = wc[i].pkey_index; - resp->wc[i].slid = wc[i].slid; - resp->wc[i].sl = wc[i].sl; - resp->wc[i].dlid_path_bits = wc[i].dlid_path_bits; - resp->wc[i].port_num = wc[i].port_num; + data_ptr += sizeof(struct ib_uverbs_wc); + ++resp.count; } - if (copy_to_user((void __user *) (unsigned long) cmd.response, resp, rsize)) + if (copy_to_user(header_ptr, &resp, sizeof resp)) { ret = -EFAULT; + goto out_put; + } -out: - kfree(resp); + ret = in_len; -out_wc: - kfree(wc); - return ret ? ret : in_len; +out_put: + put_cq_read(cq); + return ret; } ssize_t ib_uverbs_req_notify_cq(struct ib_uverbs_file *file, --- linux-fsl-imx51-2.6.31.orig/drivers/infiniband/core/cm.c +++ linux-fsl-imx51-2.6.31/drivers/infiniband/core/cm.c @@ -2986,6 +2986,7 @@ goto out; /* No match. */ } atomic_inc(&cur_cm_id_priv->refcount); + atomic_inc(&cm_id_priv->refcount); spin_unlock_irq(&cm.lock); cm_id_priv->id.cm_handler = cur_cm_id_priv->id.cm_handler; --- linux-fsl-imx51-2.6.31.orig/drivers/infiniband/core/cma.c +++ linux-fsl-imx51-2.6.31/drivers/infiniband/core/cma.c @@ -1138,6 +1138,11 @@ cm_id->context = conn_id; cm_id->cm_handler = cma_ib_handler; + /* + * Protect against the user destroying conn_id from another thread + * until we're done accessing it. + */ + atomic_inc(&conn_id->refcount); ret = conn_id->id.event_handler(&conn_id->id, &event); if (!ret) { /* @@ -1150,8 +1155,10 @@ ib_send_cm_mra(cm_id, CMA_CM_MRA_SETTING, NULL, 0); mutex_unlock(&lock); mutex_unlock(&conn_id->handler_mutex); + cma_deref_id(conn_id); goto out; } + cma_deref_id(conn_id); /* Destroy the CM ID by returning a non-zero value. */ conn_id->cm_id.ib = NULL; @@ -1353,17 +1360,25 @@ event.param.conn.private_data_len = iw_event->private_data_len; event.param.conn.initiator_depth = attr.max_qp_init_rd_atom; event.param.conn.responder_resources = attr.max_qp_rd_atom; + + /* + * Protect against the user destroying conn_id from another thread + * until we're done accessing it. + */ + atomic_inc(&conn_id->refcount); ret = conn_id->id.event_handler(&conn_id->id, &event); if (ret) { /* User wants to destroy the CM ID */ conn_id->cm_id.iw = NULL; cma_exch(conn_id, CMA_DESTROYING); mutex_unlock(&conn_id->handler_mutex); + cma_deref_id(conn_id); rdma_destroy_id(&conn_id->id); goto out; } mutex_unlock(&conn_id->handler_mutex); + cma_deref_id(conn_id); out: if (dev) --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/core.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/core.c @@ -37,7 +37,7 @@ */ struct regulator_map { struct list_head list; - struct device *dev; + const char *dev_name; /* The dev_name() for the consumer */ const char *supply; struct regulator_dev *regulator; }; @@ -857,23 +857,39 @@ * set_consumer_device_supply: Bind a regulator to a symbolic supply * @rdev: regulator source * @consumer_dev: device the supply applies to + * @consumer_dev_name: dev_name() string for device supply applies to * @supply: symbolic name for supply * * Allows platform initialisation code to map physical regulator * sources to symbolic names for supplies for use by devices. Devices * should use these symbolic names to request regulators, avoiding the * need to provide board-specific regulator names as platform data. + * + * Only one of consumer_dev and consumer_dev_name may be specified. */ static int set_consumer_device_supply(struct regulator_dev *rdev, - struct device *consumer_dev, const char *supply) + struct device *consumer_dev, const char *consumer_dev_name, + const char *supply) { struct regulator_map *node; + int has_dev; + + if (consumer_dev && consumer_dev_name) + return -EINVAL; + + if (!consumer_dev_name && consumer_dev) + consumer_dev_name = dev_name(consumer_dev); if (supply == NULL) return -EINVAL; + if (consumer_dev_name != NULL) + has_dev = 1; + else + has_dev = 0; + list_for_each_entry(node, ®ulator_map_list, list) { - if (consumer_dev != node->dev) + if (consumer_dev_name != node->dev_name) continue; if (strcmp(node->supply, supply) != 0) continue; @@ -886,30 +902,45 @@ return -EBUSY; } - node = kmalloc(sizeof(struct regulator_map), GFP_KERNEL); + node = kzalloc(sizeof(struct regulator_map), GFP_KERNEL); if (node == NULL) return -ENOMEM; node->regulator = rdev; - node->dev = consumer_dev; node->supply = supply; + if (has_dev) { + node->dev_name = kstrdup(consumer_dev_name, GFP_KERNEL); + if (node->dev_name == NULL) { + kfree(node); + return -ENOMEM; + } + } + list_add(&node->list, ®ulator_map_list); return 0; } static void unset_consumer_device_supply(struct regulator_dev *rdev, - struct device *consumer_dev) + const char *consumer_dev_name, struct device *consumer_dev) { struct regulator_map *node, *n; + if (consumer_dev && !consumer_dev_name) + consumer_dev_name = dev_name(consumer_dev); + list_for_each_entry_safe(node, n, ®ulator_map_list, list) { - if (rdev == node->regulator && - consumer_dev == node->dev) { - list_del(&node->list); - kfree(node); - return; - } + if (rdev != node->regulator) + continue; + + if (consumer_dev_name && node->dev_name && + strcmp(consumer_dev_name, node->dev_name)) + continue; + + list_del(&node->list); + kfree(node->dev_name); + kfree(node); + return; } } @@ -920,6 +951,7 @@ list_for_each_entry_safe(node, n, ®ulator_map_list, list) { if (rdev == node->regulator) { list_del(&node->list); + kfree(node->dev_name); kfree(node); return; } @@ -1019,21 +1051,36 @@ struct regulator_dev *rdev; struct regulator_map *map; struct regulator *regulator = ERR_PTR(-ENODEV); + const char *devname = NULL; if (id == NULL) { printk(KERN_ERR "regulator: get() with no identifier\n"); return regulator; } + if (dev) + devname = dev_name(dev); + mutex_lock(®ulator_list_mutex); list_for_each_entry(map, ®ulator_map_list, list) { - if (dev == map->dev && - strcmp(map->supply, id) == 0) { + /* If the mapping has a device set up it must match */ + if (map->dev_name && + (!devname || strcmp(map->dev_name, devname))) + continue; + + if (strcmp(map->supply, id) == 0) { rdev = map->regulator; goto found; } } + list_for_each_entry(rdev, ®ulator_list, list) { + if (strcmp(rdev->desc->name, id) == 0) { + goto found; + } + } + printk(KERN_ERR "regulator: Unable to get requested regulator: %s\n", + id); mutex_unlock(®ulator_list_mutex); return regulator; @@ -2067,11 +2114,13 @@ for (i = 0; i < init_data->num_consumer_supplies; i++) { ret = set_consumer_device_supply(rdev, init_data->consumer_supplies[i].dev, + init_data->consumer_supplies[i].dev_name, init_data->consumer_supplies[i].supply); if (ret < 0) { for (--i; i >= 0; i--) unset_consumer_device_supply(rdev, - init_data->consumer_supplies[i].dev); + init_data->consumer_supplies[i].dev_name, + init_data->consumer_supplies[i].dev); goto scrub; } } --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/regulator/Kconfig @@ -117,4 +117,34 @@ Say Y here to support the voltage regulators and convertors on National Semiconductors LP3971 PMIC +config REGULATOR_MC13892 + tristate "MC13892 Regulator Support" + depends on REGULATOR + depends on MXC_PMIC_MC13892 + default y + +config REGULATOR_MC13783 + tristate "MC13783 Regulator Support" + depends on REGULATOR + depends on MXC_PMIC_MC13783 + default y + +config REGULATOR_MC34704 + tristate "MC34704 Regulator Support" + depends on REGULATOR + depends on MXC_PMIC_MC34704 + default y + +config REGULATOR_STMP3XXX + tristate "STMP3xxx Regulator Support" + depends on REGULATOR + depends on ARCH_STMP3XXX + default y + +config REGULATOR_MC9S08DZ60 + tristate "mc9s08dz60 Regulator Support" + depends on REGULATOR + depends on MXC_PMIC_MC9S08DZ60 + default y + endif --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/reg-mc13783.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/reg-mc13783.c @@ -0,0 +1,2662 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +/*! + * @enum regulator_voltage_sw + * @brief PMIC regulator SW output voltage. + */ +enum { + SW_0_9V = 0, /*!< 0.900 V */ + SW_0_925V, /*!< 0.925 V */ + SW_0_95V, /*!< 0.950 V */ + SW_0_975V, /*!< 0.975 V */ + SW_1V, /*!< 1.000 V */ + SW_1_025V, /*!< 1.025 V */ + SW_1_05V, /*!< 1.050 V */ + SW_1_075V, /*!< 1.075 V */ + SW_1_1V, /*!< 1.100 V */ + SW_1_125V, /*!< 1.125 V */ + SW_1_15V, /*!< 1.150 V */ + SW_1_175V, /*!< 1.175 V */ + SW_1_2V, /*!< 1.200 V */ + SW_1_225V, /*!< 1.225 V */ + SW_1_25V, /*!< 1.250 V */ + SW_1_275V, /*!< 1.275 V */ + SW_1_3V, /*!< 1.300 V */ + SW_1_325V, /*!< 1.325 V */ + SW_1_35V, /*!< 1.350 V */ + SW_1_375V, /*!< 1.375 V */ + SW_1_4V, /*!< 1.400 V */ + SW_1_425V, /*!< 1.425 V */ + SW_1_45V, /*!< 1.450 V */ + SW_1_475V, /*!< 1.475 V */ + SW_1_5V, /*!< 1.500 V */ + SW_1_525V, /*!< 1.525 V */ + SW_1_55V, /*!< 1.550 V */ + SW_1_575V, /*!< 1.575 V */ + SW_1_6V, /*!< 1.600 V */ + SW_1_625V, /*!< 1.625 V */ + SW_1_65V, /*!< 1.650 V */ + SW_1_675V, /*!< 1.675 V */ + SW_1_7V, /*!< 1.700 V */ + SW_1_8V = 36, /*!< 1.800 V */ + SW_1_85V = 40, /*!< 1.850 V */ + SW_2V = 44, /*!< 2_000 V */ + SW_2_1V = 48, /*!< 2_100 V */ + SW_2_2V = 52, /*!< 2_200 V */ +} regulator_voltage_sw; + +/*! + * @enum regulator_voltage_violo + * @brief PMIC regulator VIOLO output voltage. + */ +enum { + VIOLO_1_2V = 0, /*!< 1.2 V */ + VIOLO_1_3V, /*!< 1.3 V */ + VIOLO_1_5V, /*!< 1.5 V */ + VIOLO_1_8V, /*!< 1.8 V */ +} regulator_voltage_violo; + +/*! + * @enum regulator_voltage_vdig + * @brief PMIC regulator VDIG output voltage. + */ +enum { + VDIG_1_2V = 0, /*!< 1.2 V */ + VDIG_1_3V, /*!< 1.3 V */ + VDIG_1_5V, /*!< 1.5 V */ + VDIG_1_8V, /*!< 1.8 V */ +} regulator_voltage_vdig; + +/*! + * @enum regulator_voltage_vgen + * @brief PMIC regulator VGEN output voltage. + */ +enum { + VGEN_1_2V = 0, /*!< 1.2 V */ + VGEN_1_3V, /*!< 1.3 V */ + VGEN_1_5V, /*!< 1.5 V */ + VGEN_1_8V, /*!< 1.8 V */ + VGEN_1_1V, /*!< 1.1 V */ + VGEN_2V, /*!< 2 V */ + VGEN_2_775V, /*!< 2.775 V */ + VGEN_2_4V, /*!< 2.4 V */ +} regulator_voltage_vgen; + +/*! + * @enum regulator_voltage_vrfdig + * @brief PMIC regulator VRFDIG output voltage. + */ +enum { + VRFDIG_1_2V = 0, /*!< 1.2 V */ + VRFDIG_1_5V, /*!< 1.5 V */ + VRFDIG_1_8V, /*!< 1.8 V */ + VRFDIG_1_875V, /*!< 1.875 V */ +} regulator_voltage_vrfdig; + +/*! + * @enum regulator_voltage_vrfref + * @brief PMIC regulator VRFREF output voltage. + */ +enum { + VRFREF_2_475V = 0, /*!< 2.475 V */ + VRFREF_2_6V, /*!< 2.600 V */ + VRFREF_2_7V, /*!< 2.700 V */ + VRFREF_2_775V, /*!< 2.775 V */ +} regulator_voltage_vrfref; + +/*! + * @enum regulator_voltage_vrfcp + * @brief PMIC regulator VRFCP output voltage. + */ +enum { + VRFCP_2_7V = 0, /*!< 2.700 V */ + VRFCP_2_775V, /*!< 2.775 V */ +} regulator_voltage_vrfcp; + +/*! + * @enum regulator_voltage_vsim + * @brief PMIC linear regulator VSIM output voltage. + */ +enum { + VSIM_1_8V = 0, /*!< 1.8 V */ + VSIM_2_9V, /*!< 2.90 V */ + VSIM_3V = 1, /*!< 3 V */ +} regulator_voltage_vsim; + +/*! + * @enum regulator_voltage_vesim + * @brief PMIC regulator VESIM output voltage. + */ +enum { + VESIM_1_8V = 0, /*!< 1.80 V */ + VESIM_2_9V, /*!< 2.90 V */ +} regulator_voltage_vesim; + +/*! + * @enum regulator_voltage_vcam + * @brief PMIC regulator VCAM output voltage. + */ +enum { + VCAM_1_5V = 0, /*!< 1.50 V */ + VCAM_1_8V, /*!< 1.80 V */ + VCAM_2_5V, /*!< 2.50 V */ + VCAM_2_55V, /*!< 2.55 V */ + VCAM_2_6V, /*!< 2.60 V */ + VCAM_2_75V, /*!< 2.75 V */ + VCAM_2_8V, /*!< 2.80 V */ + VCAM_3V, /*!< 3.00 V */ +} regulator_voltage_vcam; + +/*! + * @enum regulator_voltage_vvib + * @brief PMIC linear regulator V_VIB output voltage. + */ +enum { + VVIB_1_3V = 0, /*!< 1.30 V */ + VVIB_1_8V, /*!< 1.80 V */ + VVIB_2V, /*!< 2 V */ + VVIB_3V, /*!< 3 V */ +} regulator_voltage_vvib; + +/*! + * @enum regulator_voltage_vmmc + * @brief MC13783 PMIC regulator VMMC output voltage. + */ +enum { + VMMC_1_6V = 0, /*!< 1.60 V */ + VMMC_1_8V, /*!< 1.80 V */ + VMMC_2V, /*!< 2.00 V */ + VMMC_2_6V, /*!< 2.60 V */ + VMMC_2_7V, /*!< 2.70 V */ + VMMC_2_8V, /*!< 2.80 V */ + VMMC_2_9V, /*!< 2.90 V */ + VMMC_3V, /*!< 3.00 V */ +} regulator_voltage_vmmc; + +/*! + * @enum regulator_voltage_vrf + * @brief PMIC regulator VRF output voltage. + */ +enum { + VRF_1_5V = 0, /*!< 1.500 V */ + VRF_1_875V, /*!< 1.875 V */ + VRF_2_7V, /*!< 2.700 V */ + VRF_2_775V, /*!< 2.775 V */ +} regulator_voltage_vrf; + +/*! + * @enum regulator_voltage_sw3 + * @brief PMIC Switch mode regulator SW3 output voltages. + */ +enum { + SW3_5V = 0, /*!< 5.0 V */ + SW3_5_5V = 3, /*!< 5.5 V */ +} regulator_voltage_sw3; + +/*! + * The \b TPmicDVSTransitionSpeed enum defines the rate with which the + * voltage transition occurs. + */ +enum { + ESysDependent, + E25mVEach4us, + E25mVEach8us, + E25mvEach16us +} DVS_transition_speed; + +/* + * Reg Regulator Mode 0 + */ +#define VAUDIO_EN_LSH 0 +#define VAUDIO_EN_WID 1 +#define VAUDIO_EN_ENABLE 1 +#define VAUDIO_EN_DISABLE 0 +#define VIOHI_EN_LSH 3 +#define VIOHI_EN_WID 1 +#define VIOHI_EN_ENABLE 1 +#define VIOHI_EN_DISABLE 0 +#define VIOLO_EN_LSH 6 +#define VIOLO_EN_WID 1 +#define VIOLO_EN_ENABLE 1 +#define VIOLO_EN_DISABLE 0 +#define VDIG_EN_LSH 9 +#define VDIG_EN_WID 1 +#define VDIG_EN_ENABLE 1 +#define VDIG_EN_DISABLE 0 +#define VGEN_EN_LSH 12 +#define VGEN_EN_WID 1 +#define VGEN_EN_ENABLE 1 +#define VGEN_EN_DISABLE 0 +#define VRFDIG_EN_LSH 15 +#define VRFDIG_EN_WID 1 +#define VRFDIG_EN_ENABLE 1 +#define VRFDIG_EN_DISABLE 0 +#define VRFREF_EN_LSH 18 +#define VRFREF_EN_WID 1 +#define VRFREF_EN_ENABLE 1 +#define VRFREF_EN_DISABLE 0 +#define VRFCP_EN_LSH 21 +#define VRFCP_EN_WID 1 +#define VRFCP_EN_ENABLE 1 +#define VRFCP_EN_DISABLE 0 + +/* + * Reg Regulator Mode 1 + */ +#define VSIM_EN_LSH 0 +#define VSIM_EN_WID 1 +#define VSIM_EN_ENABLE 1 +#define VSIM_EN_DISABLE 0 +#define VESIM_EN_LSH 3 +#define VESIM_EN_WID 1 +#define VESIM_EN_ENABLE 1 +#define VESIM_EN_DISABLE 0 +#define VCAM_EN_LSH 6 +#define VCAM_EN_WID 1 +#define VCAM_EN_ENABLE 1 +#define VCAM_EN_DISABLE 0 +#define VRFBG_EN_LSH 9 +#define VRFBG_EN_WID 1 +#define VRFBG_EN_ENABLE 1 +#define VRFBG_EN_DISABLE 0 +#define VVIB_EN_LSH 11 +#define VVIB_EN_WID 1 +#define VVIB_EN_ENABLE 1 +#define VVIB_EN_DISABLE 0 +#define VRF1_EN_LSH 12 +#define VRF1_EN_WID 1 +#define VRF1_EN_ENABLE 1 +#define VRF1_EN_DISABLE 0 +#define VRF2_EN_LSH 15 +#define VRF2_EN_WID 1 +#define VRF2_EN_ENABLE 1 +#define VRF2_EN_DISABLE 0 +#define VMMC1_EN_LSH 18 +#define VMMC1_EN_WID 1 +#define VMMC1_EN_ENABLE 1 +#define VMMC1_EN_DISABLE 0 +#define VMMC2_EN_LSH 21 +#define VMMC2_EN_WID 1 +#define VMMC2_EN_ENABLE 1 +#define VMMC2_EN_DISABLE 0 + +/* + * Reg Regulator Setting 0 + */ +#define VIOLO_LSH 2 +#define VIOLO_WID 2 +#define VDIG_LSH 4 +#define VDIG_WID 2 +#define VGEN_LSH 6 +#define VGEN_WID 3 +#define VRFDIG_LSH 9 +#define VRFDIG_WID 2 +#define VRFREF_LSH 11 +#define VRFREF_WID 2 +#define VRFCP_LSH 13 +#define VRFCP_WID 1 +#define VSIM_LSH 14 +#define VSIM_WID 1 +#define VESIM_LSH 15 +#define VESIM_WID 1 +#define VCAM_LSH 16 +#define VCAM_WID 3 + +/* + * Reg Regulator Setting 1 + */ +#define VVIB_LSH 0 +#define VVIB_WID 2 +#define VRF1_LSH 2 +#define VRF1_WID 2 +#define VRF2_LSH 4 +#define VRF2_WID 2 +#define VMMC1_LSH 6 +#define VMMC1_WID 3 +#define VMMC2_LSH 9 +#define VMMC2_WID 3 + +/* + * Reg Switcher 0 + */ +#define SW1A_LSH 0 +#define SW1A_WID 6 +#define SW1A_DVS_LSH 6 +#define SW1A_DVS_WID 6 +#define SW1A_STDBY_LSH 12 +#define SW1A_STDBY_WID 6 + +/* + * Reg Switcher 1 + */ +#define SW1B_LSH 0 +#define SW1B_WID 6 +#define SW1B_DVS_LSH 6 +#define SW1B_DVS_WID 6 +#define SW1B_STDBY_LSH 12 +#define SW1B_STDBY_WID 6 + +/* + * Reg Switcher 2 + */ +#define SW2A_LSH 0 +#define SW2A_WID 6 +#define SW2A_DVS_LSH 6 +#define SW2A_DVS_WID 6 +#define SW2A_STDBY_LSH 12 +#define SW2A_STDBY_WID 6 + +/* + * Reg Switcher 3 + */ +#define SW2B_LSH 0 +#define SW2B_WID 6 +#define SW2B_DVS_LSH 6 +#define SW2B_DVS_WID 6 +#define SW2B_STDBY_LSH 12 +#define SW2B_STDBY_WID 6 + +/* + * Reg Switcher 4 + */ +#define SW1A_MODE_LSH 0 +#define SW1A_MODE_WID 2 +#define SW1A_STBY_MODE_LSH 2 +#define SW1A_STBY_MODE_WID 2 +#define SW1A_DVS_SPEED_LSH 6 +#define SW1A_DVS_SPEED_WID 2 +#define SW1B_MODE_LSH 10 +#define SW1B_MODE_WID 2 +#define SW1B_STBY_MODE_LSH 12 +#define SW1B_STBY_MODE_WID 2 +#define SW1B_DVS_SPEED_LSH 14 +#define SW1B_DVS_SPEED_WID 2 + +/* + * Reg Switcher 5 + */ +#define SW2A_MODE_LSH 0 +#define SW2A_MODE_WID 2 +#define SW2A_STBY_MODE_LSH 2 +#define SW2A_STBY_MODE_WID 2 +#define SW2A_DVS_SPEED_LSH 6 +#define SW2A_DVS_SPEED_WID 2 +#define SW2B_MODE_LSH 10 +#define SW2B_MODE_WID 2 +#define SW2B_STBY_MODE_LSH 12 +#define SW2B_STBY_MODE_WID 2 +#define SW2B_DVS_SPEED_LSH 14 +#define SW2B_DVS_SPEED_WID 2 +#define SW3_LSH 18 +#define SW3_WID 2 +#define SW3_EN_LSH 20 +#define SW3_EN_WID 2 +#define SW3_EN_ENABLE 1 +#define SW3_EN_DISABLE 0 + +/* + * Reg Regulator Misc. + */ +#define GPO1_EN_LSH 6 +#define GPO1_EN_WID 1 +#define GPO1_EN_ENABLE 1 +#define GPO1_EN_DISABLE 0 +#define GPO2_EN_LSH 8 +#define GPO2_EN_WID 1 +#define GPO2_EN_ENABLE 1 +#define GPO2_EN_DISABLE 0 +#define GPO3_EN_LSH 10 +#define GPO3_EN_WID 1 +#define GPO3_EN_ENABLE 1 +#define GPO3_EN_DISABLE 0 +#define GPO4_EN_LSH 12 +#define GPO4_EN_WID 1 +#define GPO4_EN_ENABLE 1 +#define GPO4_EN_DISABLE 0 + +/* + * Switcher mode configuration + */ +#define SW_MODE_SYNC_RECT_EN 0 +#define SW_MODE_PULSE_NO_SKIP_EN 1 +#define SW_MODE_PULSE_SKIP_EN 2 +#define SW_MODE_LOW_POWER_EN 3 + +#define dvs_speed E25mvEach16us + +static int mc13783_vaudio_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VAUDIO_EN, VAUDIO_EN_ENABLE); + register_mask = BITFMASK(VAUDIO_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vaudio_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VAUDIO_EN, VAUDIO_EN_DISABLE); + register_mask = BITFMASK(VAUDIO_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_viohi_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOHI_EN, VIOHI_EN_ENABLE); + register_mask = BITFMASK(VIOHI_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_viohi_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOHI_EN, VIOHI_EN_DISABLE); + register_mask = BITFMASK(VIOHI_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_violo_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0, register1 = 0; + int voltage, mV = uV / 1000; + + if ((mV >= 1200) && (mV < 1300)) + voltage = VIOLO_1_2V; + else if ((mV >= 1300) && (mV < 1500)) + voltage = VIOLO_1_3V; + else if ((mV >= 1500) && (mV < 1800)) + voltage = VIOLO_1_5V; + else + voltage = VIOLO_1_8V; + + register_val = BITFVAL(VIOLO, voltage); + register_mask = BITFMASK(VIOLO); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_violo_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VIOLO); + + switch (voltage) { + case VIOLO_1_2V: + mV = 1200; + break; + case VIOLO_1_3V: + mV = 1300; + break; + case VIOLO_1_5V: + mV = 1500; + break; + case VIOLO_1_8V: + mV = 1800; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_violo_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOLO_EN, VIOLO_EN_ENABLE); + register_mask = BITFMASK(VIOLO_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_violo_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOLO_EN, VIOLO_EN_DISABLE); + register_mask = BITFMASK(VIOLO_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vdig_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1200) && (mV < 1300)) + voltage = VDIG_1_2V; + else if ((mV >= 1300) && (mV < 1500)) + voltage = VDIG_1_3V; + else if ((mV >= 1500) && (mV < 1800)) + voltage = VDIG_1_5V; + else + voltage = VDIG_1_8V; + + register_val = BITFVAL(VDIG, voltage); + register_mask = BITFMASK(VDIG); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vdig_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VDIG); + + switch (voltage) { + case VDIG_1_2V: + mV = 1200; + break; + case VDIG_1_3V: + mV = 1300; + break; + case VDIG_1_5V: + mV = 1500; + break; + case VDIG_1_8V: + mV = 1800; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vdig_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VDIG_EN, VDIG_EN_ENABLE); + register_mask = BITFMASK(VDIG_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vdig_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VDIG_EN, VDIG_EN_DISABLE); + register_mask = BITFMASK(VDIG_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vgen_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + int vgenid = rdev_get_id(reg); + + printk(KERN_INFO "VGEN ID is %d\n", vgenid); + + if ((mV >= 1100) && (mV < 1200)) + voltage = VGEN_1_1V; + else if ((mV >= 1200) && (mV < 1300)) + voltage = VGEN_1_2V; + else if ((mV >= 1300) && (mV < 1500)) + voltage = VGEN_1_3V; + else if ((mV >= 1500) && (mV < 1800)) + voltage = VGEN_1_5V; + else if ((mV >= 1800) && (mV < 2000)) + voltage = VGEN_1_8V; + else if ((mV >= 2000) && (mV < 2400)) + voltage = VGEN_2V; + else if ((mV >= 2400) && (mV < 2775)) + voltage = VGEN_2_4V; + else + voltage = VGEN_2_775V; + + register_val = BITFVAL(VGEN, voltage); + register_mask = BITFMASK(VGEN); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vgen_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VGEN); + + switch (voltage) { + case VGEN_1_2V: + mV = 1200; + break; + case VGEN_1_3V: + mV = 1300; + break; + case VGEN_1_5V: + mV = 1500; + break; + case VGEN_1_8V: + mV = 1800; + break; + case VGEN_1_1V: + mV = 1100; + break; + case VGEN_2V: + mV = 2000; + break; + case VGEN_2_775V: + mV = 2775; + break; + case VGEN_2_4V: + mV = 2400; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vgen_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN_EN, VGEN_EN_ENABLE); + register_mask = BITFMASK(VGEN_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vgen_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN_EN, VGEN_EN_DISABLE); + register_mask = BITFMASK(VGEN_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfdig_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1200) && (mV < 1500)) + voltage = VRFDIG_1_2V; + else if ((mV >= 1500) && (mV < 1300)) + voltage = VRFDIG_1_5V; + else if ((mV >= 1800) && (mV < 1875)) + voltage = VRFDIG_1_8V; + else + voltage = VRFDIG_1_875V; + + register_val = BITFVAL(VRFDIG, voltage); + register_mask = BITFMASK(VRFDIG); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfdig_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VRFDIG); + + switch (voltage) { + case VRFDIG_1_2V: + mV = 1200; + break; + case VRFDIG_1_5V: + mV = 1500; + break; + case VRFDIG_1_8V: + mV = 1800; + break; + case VRFDIG_1_875V: + mV = 1875; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vrfdig_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFDIG_EN, VRFDIG_EN_ENABLE); + register_mask = BITFMASK(VRFDIG_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfdig_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFDIG_EN, VRFDIG_EN_DISABLE); + register_mask = BITFMASK(VRFDIG_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfref_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2475) && (mV < 2600)) + voltage = VRFREF_2_475V; + else if ((mV >= 2600) && (mV < 2700)) + voltage = VRFREF_2_6V; + else if ((mV >= 2700) && (mV < 2775)) + voltage = VRFREF_2_7V; + else + voltage = VRFREF_2_775V; + + register_val = BITFVAL(VRFREF, voltage); + register_mask = BITFMASK(VRFREF); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfref_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VRFREF); + + switch (voltage) { + case VRFREF_2_475V: + mV = 2475; + break; + case VRFREF_2_6V: + mV = 2600; + break; + case VRFREF_2_7V: + mV = 2700; + break; + case VRFREF_2_775V: + mV = 2775; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vrfref_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFREF_EN, VRFREF_EN_ENABLE); + register_mask = BITFMASK(VRFREF_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfref_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFREF_EN, VRFREF_EN_DISABLE); + register_mask = BITFMASK(VRFREF_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfcp_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2700) && (mV < 2775)) + voltage = VRFCP_2_7V; + else + voltage = VRFCP_2_775V; + + register_val = BITFVAL(VRFCP, voltage); + register_mask = BITFMASK(VRFCP); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfcp_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VRFCP); + + switch (voltage) { + case VRFCP_2_7V: + mV = 2700; + break; + case VRFCP_2_775V: + mV = 2775; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vrfcp_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFCP_EN, VRFCP_EN_ENABLE); + register_mask = BITFMASK(VRFCP_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrfcp_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VRFCP_EN, VRFCP_EN_DISABLE); + register_mask = BITFMASK(VRFCP_EN); + register1 = REG_REGULATOR_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vsim_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1800) && (mV < 2900)) + voltage = VSIM_1_8V; + else + voltage = VSIM_2_9V; + + register_val = BITFVAL(VSIM, voltage); + register_mask = BITFMASK(VSIM); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vsim_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VSIM); + + switch (voltage) { + case VSIM_1_8V: + mV = 1800; + break; + case VSIM_2_9V: + mV = 1900; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vsim_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VSIM_EN, VSIM_EN_ENABLE); + register_mask = BITFMASK(VSIM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vsim_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VSIM_EN, VSIM_EN_DISABLE); + register_mask = BITFMASK(VSIM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vesim_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1800) && (mV < 2900)) + voltage = VESIM_1_8V; + else + voltage = VESIM_2_9V; + + register_val = BITFVAL(VESIM, voltage); + register_mask = BITFMASK(VESIM); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vesim_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VESIM); + + switch (voltage) { + case VESIM_1_8V: + mV = 1800; + break; + case VESIM_2_9V: + mV = 1900; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vesim_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VESIM_EN, VESIM_EN_ENABLE); + register_mask = BITFMASK(VESIM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vesim_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VESIM_EN, VESIM_EN_DISABLE); + register_mask = BITFMASK(VESIM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vcam_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1500) && (mV < 1800)) + voltage = VCAM_1_5V; + else if ((mV >= 1800) && (mV < 2500)) + voltage = VCAM_1_8V; + else if ((mV >= 2500) && (mV < 2550)) + voltage = VCAM_2_5V; + else if ((mV >= 2550) && (mV < 2600)) + voltage = VCAM_2_55V; + if ((mV >= 2600) && (mV < 2750)) + voltage = VCAM_2_6V; + else if ((mV >= 2750) && (mV < 2800)) + voltage = VCAM_2_75V; + else if ((mV >= 2800) && (mV < 3000)) + voltage = VCAM_2_8V; + else + voltage = VCAM_3V; + + register_val = BITFVAL(VCAM, voltage); + register_mask = BITFMASK(VCAM); + register1 = REG_REGULATOR_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vcam_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VCAM); + + switch (voltage) { + case VCAM_1_5V: + mV = 1500; + break; + case VCAM_1_8V: + mV = 1800; + break; + case VCAM_2_5V: + mV = 2500; + break; + case VCAM_2_55V: + mV = 2550; + break; + case VCAM_2_6V: + mV = 2600; + break; + case VCAM_2_75V: + mV = 2750; + break; + case VCAM_2_8V: + mV = 2800; + break; + case VCAM_3V: + mV = 3000; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vcam_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VCAM_EN, VCAM_EN_ENABLE); + register_mask = BITFMASK(VCAM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vcam_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VCAM_EN, VCAM_EN_DISABLE); + register_mask = BITFMASK(VCAM_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vvib_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1300) && (mV < 1800)) + voltage = VVIB_1_3V; + else if ((mV >= 1800) && (mV < 2000)) + voltage = VVIB_1_8V; + else if ((mV >= 2000) && (mV < 3000)) + voltage = VVIB_2V; + else + voltage = VVIB_3V; + + register_val = BITFVAL(VVIB, voltage); + register_mask = BITFMASK(VVIB); + register1 = REG_REGULATOR_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vvib_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_1, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VVIB); + + switch (voltage) { + case VVIB_1_3V: + mV = 1300; + break; + case VVIB_1_8V: + mV = 1800; + break; + case VVIB_2V: + mV = 2000; + break; + case VVIB_3V: + mV = 3000; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vvib_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VVIB_EN, VVIB_EN_ENABLE); + register_mask = BITFMASK(VVIB_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vvib_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VVIB_EN, VVIB_EN_DISABLE); + register_mask = BITFMASK(VVIB_EN); + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrf_set_voltage(struct regulator_dev *reg, int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, rf = rdev_get_id(reg), mV = uV / 1000; + + if ((mV >= 1500) && (mV < 1875)) + voltage = VRF_1_5V; + else if ((mV >= 1875) && (mV < 2700)) + voltage = VRF_1_875V; + else if ((mV >= 2700) && (mV < 2775)) + voltage = VRF_2_7V; + else + voltage = VRF_2_775V; + + switch (rf) { + case MC13783_VRF1: + register_val = BITFVAL(VRF1, voltage); + register_mask = BITFMASK(VRF1); + break; + case MC13783_VRF2: + register_val = BITFVAL(VRF2, voltage); + register_mask = BITFMASK(VRF2); + break; + default: + return -EINVAL; + } + + register1 = REG_REGULATOR_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrf_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, rf = rdev_get_id(reg), mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_1, + ®ister_val, PMIC_ALL_BITS)); + + switch (rf) { + case MC13783_VRF1: + voltage = BITFEXT(register_val, VRF1); + break; + case MC13783_VRF2: + voltage = BITFEXT(register_val, VRF2); + break; + default: + return -EINVAL; + }; + + switch (voltage) { + case VRF_1_5V: + mV = 1500; + break; + case VRF_1_875V: + mV = 1875; + break; + case VRF_2_7V: + mV = 2700; + break; + case VRF_2_775V: + mV = 2775; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vrf_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int vrf = rdev_get_id(reg); + + switch (vrf) { + case MC13783_VRF1: + register_val = BITFVAL(VRF1_EN, VRF1_EN_ENABLE); + register_mask = BITFMASK(VRF1_EN); + break; + case MC13783_VRF2: + register_val = BITFVAL(VRF2_EN, VRF2_EN_ENABLE); + register_mask = BITFMASK(VRF2_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vrf_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int vrf = rdev_get_id(reg); + + switch (vrf) { + case MC13783_VRF1: + register_val = BITFVAL(VRF1_EN, VRF1_EN_DISABLE); + register_mask = BITFMASK(VRF1_EN); + break; + case MC13783_VRF2: + register_val = BITFVAL(VRF2_EN, VRF2_EN_DISABLE); + register_mask = BITFMASK(VRF2_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vmmc_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mmc = rdev_get_id(reg), mV = uV / 1000; + + printk(KERN_INFO "VMMC ID is %d\n", mmc); + + if ((mV >= 1600) && (mV < 1800)) + voltage = VMMC_1_6V; + else if ((mV >= 1800) && (mV < 2000)) + voltage = VMMC_1_8V; + else if ((mV >= 2000) && (mV < 2600)) + voltage = VMMC_2V; + else if ((mV >= 2600) && (mV < 2700)) + voltage = VMMC_2_6V; + else if ((mV >= 2700) && (mV < 2800)) + voltage = VMMC_2_7V; + else if ((mV >= 2800) && (mV < 2900)) + voltage = VMMC_2_8V; + else if ((mV >= 2900) && (mV < 3000)) + voltage = VMMC_2_9V; + else + voltage = VMMC_3V; + + switch (mmc) { + case MC13783_VMMC1: + register_val = BITFVAL(VMMC1, voltage); + register_mask = BITFMASK(VMMC1); + break; + case MC13783_VMMC2: + register_val = BITFVAL(VMMC2, voltage); + register_mask = BITFMASK(VMMC2); + break; + default: + return -EINVAL; + } + + register1 = REG_REGULATOR_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vmmc_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mmc = rdev_get_id(reg), mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_REGULATOR_SETTING_1, + ®ister_val, PMIC_ALL_BITS)); + + switch (mmc) { + case MC13783_VMMC1: + voltage = BITFEXT(register_val, VMMC1); + break; + case MC13783_VMMC2: + voltage = BITFEXT(register_val, VMMC2); + break; + default: + return -EINVAL; + } + + switch (voltage) { + case VMMC_1_6V: + mV = 1600; + break; + case VMMC_1_8V: + mV = 1800; + break; + case VMMC_2V: + mV = 2000; + break; + case VMMC_2_6V: + mV = 2600; + break; + case VMMC_2_7V: + mV = 2700; + break; + case VMMC_2_8V: + mV = 2800; + break; + case VMMC_2_9V: + mV = 2900; + break; + case VMMC_3V: + mV = 3000; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_vmmc_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int vmmc = rdev_get_id(reg); + + switch (vmmc) { + case MC13783_VMMC1: + register_val = BITFVAL(VMMC1_EN, VMMC1_EN_ENABLE); + register_mask = BITFMASK(VMMC1_EN); + break; + case MC13783_VMMC2: + register_val = BITFVAL(VMMC2_EN, VMMC2_EN_ENABLE); + register_mask = BITFMASK(VMMC2_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_vmmc_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int vmmc = rdev_get_id(reg); + + switch (vmmc) { + case MC13783_VMMC1: + register_val = BITFVAL(VMMC1_EN, VMMC1_EN_DISABLE); + register_mask = BITFMASK(VMMC1_EN); + break; + case MC13783_VMMC2: + register_val = BITFVAL(VMMC2_EN, VMMC2_EN_DISABLE); + register_mask = BITFMASK(VMMC2_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_REGULATOR_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_gpo_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13783_GPO1: + register_val = BITFVAL(GPO1_EN, GPO1_EN_ENABLE); + register_mask = BITFMASK(GPO1_EN); + break; + case MC13783_GPO2: + register_val = BITFVAL(GPO2_EN, GPO2_EN_ENABLE); + register_mask = BITFMASK(GPO2_EN); + break; + case MC13783_GPO3: + register_val = BITFVAL(GPO3_EN, GPO3_EN_ENABLE); + register_mask = BITFMASK(GPO3_EN); + break; + case MC13783_GPO4: + register_val = BITFVAL(GPO4_EN, GPO4_EN_ENABLE); + register_mask = BITFMASK(GPO4_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISCELLANEOUS; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_gpo_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13783_GPO1: + register_val = BITFVAL(GPO1_EN, GPO1_EN_DISABLE); + register_mask = BITFMASK(GPO1_EN); + break; + case MC13783_GPO2: + register_val = BITFVAL(GPO2_EN, GPO2_EN_DISABLE); + register_mask = BITFMASK(GPO2_EN); + break; + case MC13783_GPO3: + register_val = BITFVAL(GPO3_EN, GPO3_EN_DISABLE); + register_mask = BITFMASK(GPO3_EN); + break; + case MC13783_GPO4: + register_val = BITFVAL(GPO4_EN, GPO4_EN_DISABLE); + register_mask = BITFMASK(GPO4_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISCELLANEOUS; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw3_set_voltage(struct regulator_dev *reg, int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0, register1 = 0; + int voltage, mV = uV / 1000; + + if ((mV >= 5000) && (mV < 5500)) + voltage = SW3_5V; + else + voltage = SW3_5_5V; + + register_val = BITFVAL(SW3, voltage); + register_mask = BITFMASK(SW3); + register1 = REG_SWITCHERS_5; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw3_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_5, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW3); + + if (voltage == SW3_5_5V) + mV = 5500; + else + mV = 5000; + + return mV * 1000; +} + +static int mc13783_sw3_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(SW3_EN, SW3_EN_ENABLE); + register_mask = BITFMASK(SW3_EN); + register1 = REG_SWITCHERS_5; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw3_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(SW3_EN, SW3_EN_DISABLE); + register_mask = BITFMASK(SW3_EN); + register1 = REG_SWITCHERS_5; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw_set_normal_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1 = 0; + int voltage, sw = rdev_get_id(reg), mV = uV / 1000; + + if ((mV >= 900) && (mV < 925)) + voltage = SW_0_9V; + else if ((mV >= 925) && (mV < 950)) + voltage = SW_0_925V; + else if ((mV >= 950) && (mV < 975)) + voltage = SW_0_95V; + else if ((mV >= 975) && (mV < 1000)) + voltage = SW_0_975V; + else if ((mV >= 1000) && (mV < 1025)) + voltage = SW_1V; + else if ((mV >= 1025) && (mV < 1050)) + voltage = SW_1_025V; + else if ((mV >= 1050) && (mV < 1075)) + voltage = SW_1_05V; + else if ((mV >= 1075) && (mV < 1100)) + voltage = SW_1_075V; + else if ((mV >= 1100) && (mV < 1125)) + voltage = SW_1_1V; + else if ((mV >= 1125) && (mV < 1150)) + voltage = SW_1_125V; + else if ((mV >= 1150) && (mV < 1175)) + voltage = SW_1_15V; + else if ((mV >= 1175) && (mV < 1200)) + voltage = SW_1_175V; + else if ((mV >= 1200) && (mV < 1225)) + voltage = SW_1_2V; + else if ((mV >= 1225) && (mV < 1250)) + voltage = SW_1_225V; + else if ((mV >= 1250) && (mV < 1275)) + voltage = SW_1_25V; + else if ((mV >= 1275) && (mV < 1300)) + voltage = SW_1_275V; + else if ((mV >= 1300) && (mV < 1325)) + voltage = SW_1_3V; + else if ((mV >= 1325) && (mV < 1350)) + voltage = SW_1_325V; + else if ((mV >= 1350) && (mV < 1375)) + voltage = SW_1_35V; + else if ((mV >= 1375) && (mV < 1400)) + voltage = SW_1_375V; + else if ((mV >= 1400) && (mV < 1425)) + voltage = SW_1_4V; + else if ((mV >= 1425) && (mV < 1450)) + voltage = SW_1_425V; + else if ((mV >= 1450) && (mV < 1475)) + voltage = SW_1_45V; + else if ((mV >= 1475) && (mV < 1500)) + voltage = SW_1_475V; + else if ((mV >= 1500) && (mV < 1525)) + voltage = SW_1_5V; + else if ((mV >= 1525) && (mV < 1550)) + voltage = SW_1_525V; + else if ((mV >= 1550) && (mV < 1575)) + voltage = SW_1_55V; + else if ((mV >= 1575) && (mV < 1600)) + voltage = SW_1_575V; + else if ((mV >= 1600) && (mV < 1625)) + voltage = SW_1_6V; + else if ((mV >= 1625) && (mV < 1650)) + voltage = SW_1_625V; + else if ((mV >= 1650) && (mV < 1675)) + voltage = SW_1_65V; + else if ((mV >= 1675) && (mV < 1700)) + voltage = SW_1_675V; + else if ((mV >= 1700) && (mV < 1800)) + voltage = SW_1_7V; + else if ((mV >= 1800) && (mV < 1850)) + voltage = SW_1_8V; + else if ((mV >= 1850) && (mV < 2000)) + voltage = SW_1_85V; + else if ((mV >= 2000) && (mV < 2100)) + voltage = SW_2V; + else if ((mV >= 2100) && (mV < 2200)) + voltage = SW_2_1V; + else + voltage = SW_2_2V; + + switch (sw) { + case MC13783_SW1A: + register1 = REG_SWITCHERS_0; + register_val = BITFVAL(SW1A, voltage); + register_mask = BITFMASK(SW1A); + break; + case MC13783_SW1B: + register1 = REG_SWITCHERS_1; + register_val = BITFVAL(SW1B, voltage); + register_mask = BITFMASK(SW1B); + break; + case MC13783_SW2A: + register1 = REG_SWITCHERS_2; + register_val = BITFVAL(SW2A, voltage); + register_mask = BITFMASK(SW2A); + break; + case MC13783_SW2B: + register1 = REG_SWITCHERS_3; + register_val = BITFVAL(SW2B, voltage); + register_mask = BITFMASK(SW2B); + break; + default: + return -EINVAL; + } + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw_get_normal_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0, sw = rdev_get_id(reg); + + switch (sw) { + case MC13783_SW1A: + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW1A); + break; + case MC13783_SW1B: + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_1, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW1B); + break; + case MC13783_SW2A: + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_2, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW2A); + break; + case MC13783_SW2B: + CHECK_ERROR(pmic_read_reg(REG_SWITCHERS_3, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW2B); + break; + default: + return -EINVAL; + } + + switch (voltage) { + case SW_0_9V: + mV = 900; + break; + case SW_0_925V: + mV = 925; + break; + case SW_0_95V: + mV = 950; + break; + case SW_0_975V: + mV = 975; + break; + case SW_1V: + mV = 1000; + break; + case SW_1_025V: + mV = 1025; + break; + case SW_1_05V: + mV = 1050; + break; + case SW_1_075V: + mV = 1075; + break; + case SW_1_1V: + mV = 1100; + break; + case SW_1_125V: + mV = 1125; + break; + case SW_1_15V: + mV = 1150; + break; + case SW_1_175V: + mV = 1175; + break; + case SW_1_2V: + mV = 1200; + break; + case SW_1_225V: + mV = 1225; + break; + case SW_1_25V: + mV = 1250; + break; + case SW_1_275V: + mV = 1275; + break; + case SW_1_3V: + mV = 1300; + break; + case SW_1_325V: + mV = 1325; + break; + case SW_1_35V: + mV = 1350; + break; + case SW_1_375V: + mV = 1375; + break; + case SW_1_4V: + mV = 1400; + break; + case SW_1_425V: + mV = 1425; + break; + case SW_1_45V: + mV = 1450; + break; + case SW_1_475V: + mV = 1475; + break; + case SW_1_5V: + mV = 1500; + break; + case SW_1_525V: + mV = 1525; + break; + case SW_1_55V: + mV = 1550; + break; + case SW_1_575V: + mV = 1575; + break; + case SW_1_6V: + mV = 1600; + break; + case SW_1_625V: + mV = 1625; + break; + case SW_1_65V: + mV = 1650; + break; + case SW_1_675V: + mV = 1675; + break; + case SW_1_7V: + mV = 1700; + break; + case SW_1_8V: + mV = 1800; + break; + case SW_1_85V: + mV = 1850; + break; + case SW_2V: + mV = 2000; + break; + case SW_2_1V: + mV = 2100; + break; + case SW_2_2V: + mV = 2200; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13783_sw_normal_enable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13783_sw_normal_disable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13783_sw_stby_enable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13783_sw_stby_disable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13783_sw_set_stby_voltage(struct regulator_dev *reg, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1 = 0; + int voltage, sw = rdev_get_id(reg), mV = uV / 1000; + + if ((mV >= 900) && (mV < 925)) + voltage = SW_0_9V; + else if ((mV >= 925) && (mV < 950)) + voltage = SW_0_925V; + else if ((mV >= 950) && (mV < 975)) + voltage = SW_0_95V; + else if ((mV >= 975) && (mV < 1000)) + voltage = SW_0_975V; + else if ((mV >= 1000) && (mV < 1025)) + voltage = SW_1V; + else if ((mV >= 1025) && (mV < 1050)) + voltage = SW_1_025V; + else if ((mV >= 1050) && (mV < 1075)) + voltage = SW_1_05V; + else if ((mV >= 1075) && (mV < 1100)) + voltage = SW_1_075V; + else if ((mV >= 1100) && (mV < 1125)) + voltage = SW_1_1V; + else if ((mV >= 1125) && (mV < 1150)) + voltage = SW_1_125V; + else if ((mV >= 1150) && (mV < 1175)) + voltage = SW_1_15V; + else if ((mV >= 1175) && (mV < 1200)) + voltage = SW_1_175V; + else if ((mV >= 1200) && (mV < 1225)) + voltage = SW_1_2V; + else if ((mV >= 1225) && (mV < 1250)) + voltage = SW_1_225V; + else if ((mV >= 1250) && (mV < 1275)) + voltage = SW_1_25V; + else if ((mV >= 1275) && (mV < 1300)) + voltage = SW_1_275V; + else if ((mV >= 1300) && (mV < 1325)) + voltage = SW_1_3V; + else if ((mV >= 1325) && (mV < 1350)) + voltage = SW_1_325V; + else if ((mV >= 1350) && (mV < 1375)) + voltage = SW_1_35V; + else if ((mV >= 1375) && (mV < 1400)) + voltage = SW_1_375V; + else if ((mV >= 1400) && (mV < 1425)) + voltage = SW_1_4V; + else if ((mV >= 1425) && (mV < 1450)) + voltage = SW_1_425V; + else if ((mV >= 1450) && (mV < 1475)) + voltage = SW_1_45V; + else if ((mV >= 1475) && (mV < 1500)) + voltage = SW_1_475V; + else if ((mV >= 1500) && (mV < 1525)) + voltage = SW_1_5V; + else if ((mV >= 1525) && (mV < 1550)) + voltage = SW_1_525V; + else if ((mV >= 1550) && (mV < 1575)) + voltage = SW_1_55V; + else if ((mV >= 1575) && (mV < 1600)) + voltage = SW_1_575V; + else if ((mV >= 1600) && (mV < 1625)) + voltage = SW_1_6V; + else if ((mV >= 1625) && (mV < 1650)) + voltage = SW_1_625V; + else if ((mV >= 1650) && (mV < 1675)) + voltage = SW_1_65V; + else if ((mV >= 1675) && (mV < 1700)) + voltage = SW_1_675V; + else if ((mV >= 1700) && (mV < 1800)) + voltage = SW_1_7V; + else if ((mV >= 1800) && (mV < 1850)) + voltage = SW_1_8V; + else if ((mV >= 1850) && (mV < 2000)) + voltage = SW_1_85V; + else if ((mV >= 2000) && (mV < 2100)) + voltage = SW_2V; + else if ((mV >= 2100) && (mV < 2200)) + voltage = SW_2_1V; + else + voltage = SW_2_2V; + + switch (sw) { + case MC13783_SW1A: + register1 = REG_SWITCHERS_0; + register_val = BITFVAL(SW1A_STDBY, voltage); + register_mask = BITFMASK(SW1A_STDBY); + break; + case MC13783_SW1B: + register1 = REG_SWITCHERS_1; + register_val = BITFVAL(SW1B_STDBY, voltage); + register_mask = BITFMASK(SW1B_STDBY); + break; + case MC13783_SW2A: + register1 = REG_SWITCHERS_2; + register_val = BITFVAL(SW2A_STDBY, voltage); + register_mask = BITFMASK(SW2A_STDBY); + break; + case MC13783_SW2B: + register1 = REG_SWITCHERS_3; + register_val = BITFVAL(SW2B_STDBY, voltage); + register_mask = BITFMASK(SW2B_STDBY); + break; + default: + return -EINVAL; + } + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13783_sw_set_normal_mode(struct regulator_dev *reg, + unsigned int mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int register1 = 0; + unsigned int l_mode; + int sw = rdev_get_id(reg); + + switch (mode) { + case REGULATOR_MODE_FAST: + /* SYNC RECT mode */ + l_mode = SW_MODE_SYNC_RECT_EN; + break; + case REGULATOR_MODE_NORMAL: + /* PULSE SKIP mode */ + l_mode = SW_MODE_PULSE_SKIP_EN; + break; + case REGULATOR_MODE_IDLE: + /* LOW POWER mode */ + l_mode = SW_MODE_LOW_POWER_EN; + break; + case REGULATOR_MODE_STANDBY: + /* NO PULSE SKIP mode */ + l_mode = SW_MODE_PULSE_NO_SKIP_EN; + break; + default: + return -EINVAL; + } + + switch (sw) { + case MC13783_SW1A: + reg_val = BITFVAL(SW1A_MODE, l_mode); + reg_mask = BITFMASK(SW1A_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW1B: + reg_val = BITFVAL(SW1B_MODE, l_mode); + reg_mask = BITFMASK(SW1B_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW2A: + reg_val = BITFVAL(SW2A_MODE, l_mode); + reg_mask = BITFMASK(SW2A_MODE); + register1 = REG_SWITCHERS_5; + break; + case MC13783_SW2B: + reg_val = BITFVAL(SW2B_MODE, l_mode); + reg_mask = BITFMASK(SW2B_MODE); + register1 = REG_SWITCHERS_5; + break; + default: + return -EINVAL; + } + + return pmic_write_reg(register1, reg_val, reg_mask); +} + +static unsigned int mc13783_sw_get_normal_mode(struct regulator_dev *reg) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int register1 = 0; + unsigned int l_mode = 0; + int sw = rdev_get_id(reg); + int ret = 0; + + switch (sw) { + case MC13783_SW1A: + reg_mask = BITFMASK(SW1A_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW1B: + reg_mask = BITFMASK(SW1B_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW2A: + reg_mask = BITFMASK(SW2A_MODE); + register1 = REG_SWITCHERS_5; + break; + case MC13783_SW2B: + reg_mask = BITFMASK(SW2B_MODE); + register1 = REG_SWITCHERS_5; + break; + default: + return -EINVAL; + } + + ret = pmic_read_reg(register1, ®_val, reg_mask); + if (ret != 0) + return ret; + + switch (sw) { + case MC13783_SW1A: + l_mode = BITFEXT(reg_val, SW1A_MODE); + break; + case MC13783_SW1B: + l_mode = BITFEXT(reg_val, SW1B_MODE); + break; + case MC13783_SW2A: + l_mode = BITFEXT(reg_val, SW2A_MODE); + break; + case MC13783_SW2B: + l_mode = BITFEXT(reg_val, SW2B_MODE); + break; + default: + return -EINVAL; + } + + if (l_mode == SW_MODE_SYNC_RECT_EN) { + return REGULATOR_MODE_FAST; + } else if (l_mode == SW_MODE_PULSE_NO_SKIP_EN) { + return REGULATOR_MODE_STANDBY; + } else if (l_mode == SW_MODE_PULSE_SKIP_EN) { + return REGULATOR_MODE_NORMAL; + } else if (l_mode == SW_MODE_LOW_POWER_EN) { + return REGULATOR_MODE_IDLE; + } else { + return -EINVAL; + } +} + +static int mc13783_sw_set_stby_mode(struct regulator_dev *reg, + unsigned int mode) +{ + unsigned int reg_val = 0, reg_mask = 0; + unsigned int register1 = 0; + unsigned int l_mode; + int sw = rdev_get_id(reg); + + switch (mode) { + case REGULATOR_MODE_FAST: + /* SYNC RECT mode */ + l_mode = SW_MODE_SYNC_RECT_EN; + break; + case REGULATOR_MODE_NORMAL: + /* PULSE SKIP mode */ + l_mode = SW_MODE_PULSE_SKIP_EN; + break; + case REGULATOR_MODE_IDLE: + /* LOW POWER mode */ + l_mode = SW_MODE_LOW_POWER_EN; + break; + case REGULATOR_MODE_STANDBY: + /* NO PULSE SKIP mode */ + l_mode = SW_MODE_PULSE_NO_SKIP_EN; + break; + default: + return -EINVAL; + } + + switch (sw) { + case MC13783_SW1A: + reg_val = BITFVAL(SW1A_STBY_MODE, l_mode); + reg_mask = BITFMASK(SW1A_STBY_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW1B: + reg_val = BITFVAL(SW1B_STBY_MODE, l_mode); + reg_mask = BITFMASK(SW1B_STBY_MODE); + register1 = REG_SWITCHERS_4; + break; + case MC13783_SW2A: + reg_val = BITFVAL(SW2A_STBY_MODE, l_mode); + reg_mask = BITFMASK(SW2A_STBY_MODE); + register1 = REG_SWITCHERS_5; + break; + case MC13783_SW2B: + reg_val = BITFVAL(SW2B_STBY_MODE, l_mode); + reg_mask = BITFMASK(SW2B_STBY_MODE); + register1 = REG_SWITCHERS_5; + break; + default: + return -EINVAL; + } + + return pmic_write_reg(register1, reg_val, reg_mask); +} + +static struct regulator_ops mc13783_vaudio_ops = { + .enable = mc13783_vaudio_enable, + .disable = mc13783_vaudio_disable, +}; + +static struct regulator_ops mc13783_viohi_ops = { + .enable = mc13783_viohi_enable, + .disable = mc13783_viohi_disable, +}; + +static struct regulator_ops mc13783_violo_ops = { + .set_voltage = mc13783_violo_set_voltage, + .get_voltage = mc13783_violo_get_voltage, + .enable = mc13783_violo_enable, + .disable = mc13783_violo_disable, +}; + +static struct regulator_ops mc13783_vdig_ops = { + .set_voltage = mc13783_vdig_set_voltage, + .get_voltage = mc13783_vdig_get_voltage, + .enable = mc13783_vdig_enable, + .disable = mc13783_vdig_disable, +}; + +static struct regulator_ops mc13783_vgen_ops = { + .set_voltage = mc13783_vgen_set_voltage, + .get_voltage = mc13783_vgen_get_voltage, + .enable = mc13783_vgen_enable, + .disable = mc13783_vgen_disable, +}; + +static struct regulator_ops mc13783_vrfdig_ops = { + .set_voltage = mc13783_vrfdig_set_voltage, + .get_voltage = mc13783_vrfdig_get_voltage, + .enable = mc13783_vrfdig_enable, + .disable = mc13783_vrfdig_disable, +}; + +static struct regulator_ops mc13783_vrfref_ops = { + .set_voltage = mc13783_vrfref_set_voltage, + .get_voltage = mc13783_vrfref_get_voltage, + .enable = mc13783_vrfref_enable, + .disable = mc13783_vrfref_disable, +}; + +static struct regulator_ops mc13783_vrfcp_ops = { + .set_voltage = mc13783_vrfcp_set_voltage, + .get_voltage = mc13783_vrfcp_get_voltage, + .enable = mc13783_vrfcp_enable, + .disable = mc13783_vrfcp_disable, +}; + +static struct regulator_ops mc13783_vsim_ops = { + .set_voltage = mc13783_vsim_set_voltage, + .get_voltage = mc13783_vsim_get_voltage, + .enable = mc13783_vsim_enable, + .disable = mc13783_vsim_disable, +}; + +static struct regulator_ops mc13783_vesim_ops = { + .set_voltage = mc13783_vesim_set_voltage, + .get_voltage = mc13783_vesim_get_voltage, + .enable = mc13783_vesim_enable, + .disable = mc13783_vesim_disable, +}; + +static struct regulator_ops mc13783_vcam_ops = { + .set_voltage = mc13783_vcam_set_voltage, + .get_voltage = mc13783_vcam_get_voltage, + .enable = mc13783_vcam_enable, + .disable = mc13783_vcam_disable, +}; + +static struct regulator_ops mc13783_vvib_ops = { + .set_voltage = mc13783_vvib_set_voltage, + .get_voltage = mc13783_vvib_get_voltage, + .enable = mc13783_vvib_enable, + .disable = mc13783_vvib_disable, +}; + +static struct regulator_ops mc13783_vrf_ops = { + .set_voltage = mc13783_vrf_set_voltage, + .get_voltage = mc13783_vrf_get_voltage, + .enable = mc13783_vrf_enable, + .disable = mc13783_vrf_disable, +}; + +static struct regulator_ops mc13783_vmmc_ops = { + .set_voltage = mc13783_vmmc_set_voltage, + .get_voltage = mc13783_vmmc_get_voltage, + .enable = mc13783_vmmc_enable, + .disable = mc13783_vmmc_disable, +}; + +static struct regulator_ops mc13783_gpo_ops = { + .enable = mc13783_gpo_enable, + .disable = mc13783_gpo_disable, +}; + +static struct regulator_ops mc13783_sw3_ops = { + .set_voltage = mc13783_sw3_set_voltage, + .get_voltage = mc13783_sw3_get_voltage, + .enable = mc13783_sw3_enable, + .disable = mc13783_sw3_disable, +}; + +static struct regulator_ops mc13783_sw1_ops = { + .set_voltage = mc13783_sw_set_normal_voltage, + .get_voltage = mc13783_sw_get_normal_voltage, + .get_mode = mc13783_sw_get_normal_mode, + .set_mode = mc13783_sw_set_normal_mode, + .set_suspend_voltage = mc13783_sw_set_stby_voltage, + .set_suspend_enable = mc13783_sw_stby_enable, + .set_suspend_disable = mc13783_sw_stby_disable, + .set_suspend_mode = mc13783_sw_set_stby_mode, +}; + +static struct regulator_ops mc13783_sw_normal_ops = { + .set_voltage = mc13783_sw_set_normal_voltage, + .get_voltage = mc13783_sw_get_normal_voltage, + .get_mode = mc13783_sw_get_normal_mode, + .set_mode = mc13783_sw_set_normal_mode, + .enable = mc13783_sw_normal_enable, + .disable = mc13783_sw_normal_disable, +}; + +static struct regulator_desc reg_mc13783[] = { + { + .name = "SW1A", + .id = MC13783_SW1A, + .ops = &mc13783_sw1_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW1B", + .id = MC13783_SW1B, + .ops = &mc13783_sw_normal_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW2A", + .id = MC13783_SW2A, + .ops = &mc13783_sw_normal_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW2B", + .id = MC13783_SW2B, + .ops = &mc13783_sw_normal_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW3", + .id = MC13783_SW3, + .ops = &mc13783_sw3_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VAUDIO", + .id = MC13783_VAUDIO, + .ops = &mc13783_vaudio_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VIOHI", + .id = MC13783_VIOHI, + .ops = &mc13783_viohi_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VIOLO", + .id = MC13783_VIOLO, + .ops = &mc13783_violo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VDIG", + .id = MC13783_VDIG, + .ops = &mc13783_vdig_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VGEN", + .id = MC13783_VGEN, + .ops = &mc13783_vgen_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRFDIG", + .id = MC13783_VRFDIG, + .ops = &mc13783_vrfdig_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRFREF", + .id = MC13783_VRFREF, + .ops = &mc13783_vrfref_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRFCP", + .id = MC13783_VRFCP, + .ops = &mc13783_vrfcp_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VSIM", + .id = MC13783_VSIM, + .ops = &mc13783_vsim_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VESIM", + .id = MC13783_VESIM, + .ops = &mc13783_vesim_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VCAM", + .id = MC13783_VCAM, + .ops = &mc13783_vcam_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRFBG", + .id = MC13783_VRFBG, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VVIB", + .id = MC13783_VVIB, + .ops = &mc13783_vvib_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRF1", + .id = MC13783_VRF1, + .ops = &mc13783_vrf_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VRF2", + .id = MC13783_VRF2, + .ops = &mc13783_vrf_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VMMC1", + .id = MC13783_VMMC1, + .ops = &mc13783_vmmc_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VMMC2", + .id = MC13783_VMMC2, + .ops = &mc13783_vmmc_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO1", + .id = MC13783_GPO1, + .ops = &mc13783_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO2", + .id = MC13783_GPO2, + .ops = &mc13783_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO3", + .id = MC13783_GPO3, + .ops = &mc13783_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO4", + .id = MC13783_GPO4, + .ops = &mc13783_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, +}; + +/* + * Init and Exit + */ + +static int reg_mc13783_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + + /* register regulator */ + rdev = regulator_register(®_mc13783[pdev->id], &pdev->dev, + pdev->dev.platform_data, + dev_get_drvdata(&pdev->dev)); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + reg_mc13783[pdev->id].name); + return PTR_ERR(rdev); + } + platform_set_drvdata(pdev, rdev); + + return 0; +} + +static int mc13783_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; +} + +int mc13783_register_regulator(struct mc13783 *mc13783, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + + if (mc13783->pmic.pdev[reg]) + return -EBUSY; + + pdev = platform_device_alloc("mc13783-regulatr", reg); + if (!pdev) + return -ENOMEM; + + mc13783->pmic.pdev[reg] = pdev; + + initdata->driver_data = mc13783; + + pdev->dev.platform_data = initdata; + pdev->dev.parent = mc13783->dev; + ret = platform_device_add(pdev); + + if (ret != 0) { + dev_err(mc13783->dev, "Failed to register regulator %d: %d\n", + reg, ret); + platform_device_del(pdev); + mc13783->pmic.pdev[reg] = NULL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(mc13783_register_regulator); + +static struct platform_driver mc13783_regulator_driver = { + .probe = reg_mc13783_probe, + .remove = mc13783_regulator_remove, + .driver = { + .name = "mc13783-regulatr", + /* o left out due to string length */ + }, +}; + +static int __init mc13783_regulator_subsys_init(void) +{ + return platform_driver_register(&mc13783_regulator_driver); +} +subsys_initcall(mc13783_regulator_subsys_init); + +static void __exit mc13783_regulator_exit(void) +{ + platform_driver_unregister(&mc13783_regulator_driver); +} +module_exit(mc13783_regulator_exit); + + +/* Module information */ +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC13783 Regulator driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/reg-mc13892.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/reg-mc13892.c @@ -0,0 +1,1850 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +enum { + VDIG_1_05V = 0, + VDIG_1_25V, + VDIG_1_65V, + VDIG_1_80V, +} regulator_voltage_vdig; + +enum { + VPLL_1_05V = 0, + VPLL_1_25V, + VPLL_1_65V, + VPLL_1_80V, +} regulator_voltage_vpll; + +enum { + VGEN1_1_2V = 0, + VGEN1_1_5V, + VGEN1_2_775V, + VGEN1_3_15V, +} regulator_voltage_vgen1; + +enum { + VGEN2_1_2V = 0, + VGEN2_1_5V, + VGEN2_1_6V, + VGEN2_1_8V, + VGEN2_2_7V, + VGEN2_2_8V, + VGEN2_3_0V, + VGEN2_3_15V, +} regulator_voltage_vgen2; + +enum { + VGEN3_1_8V = 0, + VGEN3_2_9V, +} regulator_voltage_vgen3; + +enum { + VSD_1_8V = 0, + VSD_2_0V, + VSD_2_6V, + VSD_2_7V, + VSD_2_8V, + VSD_2_9V, + VSD_3_0V, + VSD_3_15V, +} regulator_voltage_vsd; + +enum { + VCAM_2_5V, + VCAM_2_6V, + VCAM_2_75V, + VCAM_3_0V, +} regulator_voltage_vcam; + +enum { + VAUDIO_2_3V, + VAUDIO_2_5V, + VAUDIO_2_775V, + VAUDIO_3V, +} regulator_voltage_vaudio; + +enum { + VUSB2_2_4V, + VUSB2_2_6V, + VUSB2_2_7V, + VUSB2_2_775V, +} regulator_voltage_vusb2; + +enum { + VVIDEO_2_7V, + VVIDEO_2_775V, + VVIDEO_2_5V, + VVIDEO_2_6V, +} regulator_voltage_vvideo; + +#define VAUDIO_LSH 4 +#define VAUDIO_WID 2 +#define VAUDIO_EN_LSH 15 +#define VAUDIO_EN_WID 1 +#define VAUDIO_EN_ENABLE 1 +#define VAUDIO_EN_DISABLE 0 + +#define VUSB2_LSH 11 +#define VUSB2_WID 2 +#define VUSB2_EN_LSH 18 +#define VUSB2_EN_WID 1 +#define VUSB2_EN_ENABLE 1 +#define VUSB2_EN_DISABLE 0 + +#define VVIDEO_LSH 2 +#define VVIDEO_WID 2 +#define VVIDEO_EN_LSH 12 +#define VVIDEO_EN_WID 1 +#define VVIDEO_EN_ENABLE 1 +#define VVIDEO_EN_DISABLE 0 + +#define SWBST_EN_LSH 20 +#define SWBST_EN_WID 1 +#define SWBST_EN_ENABLE 1 +#define SWBST_EN_DISABLE 0 + +#define VIOHI_EN_LSH 3 +#define VIOHI_EN_WID 1 +#define VIOHI_EN_ENABLE 1 +#define VIOHI_EN_DISABLE 0 + +#define VDIG_LSH 4 +#define VDIG_WID 2 +#define VDIG_EN_LSH 9 +#define VDIG_EN_WID 1 +#define VDIG_EN_ENABLE 1 +#define VDIG_EN_DISABLE 0 + +#define VPLL_LSH 9 +#define VPLL_WID 2 +#define VPLL_EN_LSH 15 +#define VPLL_EN_WID 1 +#define VPLL_EN_ENABLE 1 +#define VPLL_EN_DISABLE 0 + +#define VGEN1_LSH 0 +#define VGEN1_WID 2 +#define VGEN1_EN_LSH 0 +#define VGEN1_EN_WID 1 +#define VGEN1_EN_ENABLE 1 +#define VGEN1_EN_DISABLE 0 + +#define VGEN2_LSH 6 +#define VGEN2_WID 3 +#define VGEN2_EN_LSH 12 +#define VGEN2_EN_WID 1 +#define VGEN2_EN_ENABLE 1 +#define VGEN2_EN_DISABLE 0 + +#define VGEN3_LSH 14 +#define VGEN3_WID 1 +#define VGEN3_EN_LSH 0 +#define VGEN3_EN_WID 1 +#define VGEN3_EN_ENABLE 1 +#define VGEN3_EN_DISABLE 0 + +#define VSD_LSH 6 +#define VSD_WID 3 +#define VSD_EN_LSH 18 +#define VSD_EN_WID 1 +#define VSD_EN_ENABLE 1 +#define VSD_EN_DISABLE 0 + +#define VCAM_LSH 16 +#define VCAM_WID 2 +#define VCAM_EN_LSH 6 +#define VCAM_EN_WID 1 +#define VCAM_EN_ENABLE 1 +#define VCAM_EN_DISABLE 0 +#define VCAM_CONFIG_LSH 9 +#define VCAM_CONFIG_WID 1 +#define VCAM_CONFIG_EXT 1 +#define VCAM_CONFIG_INT 0 + +#define SW1_LSH 0 +#define SW1_WID 5 +#define SW1_DVS_LSH 5 +#define SW1_DVS_WID 5 +#define SW1_STDBY_LSH 10 +#define SW1_STDBY_WID 5 + +#define SW2_LSH 0 +#define SW2_WID 5 +#define SW2_DVS_LSH 5 +#define SW2_DVS_WID 5 +#define SW2_STDBY_LSH 10 +#define SW2_STDBY_WID 5 + +#define SW3_LSH 0 +#define SW3_WID 5 +#define SW3_STDBY_LSH 10 +#define SW3_STDBY_WID 5 + +#define SW4_LSH 0 +#define SW4_WID 5 +#define SW4_STDBY_LSH 10 +#define SW4_STDBY_WID 5 + +#define VUSB_EN_LSH 3 +#define VUSB_EN_WID 1 +#define VUSB_EN_ENABLE 1 +#define VUSB_EN_DISABLE 0 + +#define GPO1_EN_LSH 6 +#define GPO1_EN_WID 1 +#define GPO1_EN_ENABLE 1 +#define GPO1_EN_DISABLE 0 + +#define GPO2_EN_LSH 8 +#define GPO2_EN_WID 1 +#define GPO2_EN_ENABLE 1 +#define GPO2_EN_DISABLE 0 + +#define GPO3_EN_LSH 10 +#define GPO3_EN_WID 1 +#define GPO3_EN_ENABLE 1 +#define GPO3_EN_DISABLE 0 + +#define GPO4_EN_LSH 12 +#define GPO4_EN_WID 1 +#define GPO4_EN_ENABLE 1 +#define GPO4_EN_DISABLE 0 + +#define GPO4_ADIN_LSH 21 +#define GPO4_ADIN_WID 1 +#define GPO4_ADIN_ENABLE 1 +#define GPO4_ADIN_DISABLE 0 + +#define PWGT1SPI_EN_LSH 15 +#define PWGT1SPI_EN_WID 1 +#define PWGT1SPI_EN_ENABLE 0 +#define PWGT1SPI_EN_DISABLE 1 + +#define PWGT2SPI_EN_LSH 16 +#define PWGT2SPI_EN_WID 1 +#define PWGT2SPI_EN_ENABLE 0 +#define PWGT2SPI_EN_DISABLE 1 + +#define SWXHI_LSH 23 +#define SWXHI_WID 1 +#define SWXHI_ON 1 +#define SWXHI_OFF 0 + +static int mc13892_get_sw_hi_bit(int sw) +{ + unsigned int register_val = 0; + unsigned int reg = 0; + + switch (sw) { + case MC13892_SW1: + reg = REG_SW_0; + break; + case MC13892_SW2: + reg = REG_SW_1; + break; + case MC13892_SW3: + reg = REG_SW_2; + break; + case MC13892_SW4: + reg = REG_SW_3; + break; + default: + return -EINVAL; + } + + CHECK_ERROR(pmic_read_reg(reg, ®ister_val, PMIC_ALL_BITS)); + return (register_val & 0x800000) >> SWXHI_LSH; +} + +static int mc13892_get_voltage_value(int *hi, int mV) +{ + int voltage; + + if (mV < 600) + mV = 600; + if (mV > 1850) + mV = 1850; + + if (mV > 1375) + *hi = 1; + if (mV < 1100) + *hi = 0; + + if (*hi == 0) + voltage = (mV - 600) / 25; + else + voltage = (mV - 1100) / 25; + + return voltage; +} + +static int mc13892_get_voltage_mV(int hi, int voltage) +{ + int mV; + + if (hi == 0) + mV = voltage * 25 + 600; + else + mV = voltage * 25 + 1100; + + return mV; +} + +static int mc13892_sw_set_voltage(struct regulator_dev *reg, int MiniV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1 = 0; + int voltage; + int sw = rdev_get_id(reg); + int mV = uV / 1000; + int hi; + + hi = mc13892_get_sw_hi_bit(sw); + voltage = mc13892_get_voltage_value(&hi, mV); + + switch (sw) { + case MC13892_SW1: + register1 = REG_SW_0; + register_val = BITFVAL(SW1, voltage); + register_mask = BITFMASK(SW1); + break; + case MC13892_SW2: + register1 = REG_SW_1; + register_val = BITFVAL(SW2, voltage); + register_mask = BITFMASK(SW2); + break; + case MC13892_SW3: + register1 = REG_SW_2; + register_val = BITFVAL(SW3, voltage); + register_mask = BITFMASK(SW3); + break; + case MC13892_SW4: + register1 = REG_SW_3; + register_val = BITFVAL(SW4, voltage); + register_mask = BITFMASK(SW4); + break; + default: + return -EINVAL; + } + + register_val |= (hi << SWXHI_LSH); + register_mask |= (1 << SWXHI_LSH); + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_sw_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0; + int mV = 0; + int sw = rdev_get_id(reg); + int hi; + + switch (sw) { + case MC13892_SW1: + CHECK_ERROR(pmic_read_reg(REG_SW_0, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW1); + break; + case MC13892_SW2: + CHECK_ERROR(pmic_read_reg(REG_SW_1, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW2); + break; + case MC13892_SW3: + CHECK_ERROR(pmic_read_reg(REG_SW_2, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW3); + break; + case MC13892_SW4: + CHECK_ERROR(pmic_read_reg(REG_SW_3, + ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, SW4); + break; + default: + return -EINVAL; + } + + hi = mc13892_get_sw_hi_bit(sw); + mV = mc13892_get_voltage_mV(hi, voltage); + + return mV * 1000; +} + +static int mc13892_sw_stby_enable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13892_sw_stby_disable(struct regulator_dev *reg) +{ + return 0; +} + +static int mc13892_sw_stby_set_mode(struct regulator_dev *reg, unsigned int mode) +{ + return 0; +} + +static int mc13892_sw_stby_set_voltage(struct regulator_dev *reg, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1 = 0; + int voltage, mV = uV / 1000, hi; + int sw = rdev_get_id(reg); + + hi = mc13892_get_sw_hi_bit(sw); + voltage = mc13892_get_voltage_value(&hi, mV); + + switch (sw) { + case MC13892_SW1: + register1 = REG_SW_0; + register_val = BITFVAL(SW1_STDBY, voltage); + register_mask = BITFMASK(SW1_STDBY); + break; + case MC13892_SW2: + register1 = REG_SW_1; + register_val = BITFVAL(SW2_STDBY, voltage); + register_mask = BITFMASK(SW2_STDBY); + break; + case MC13892_SW3: + register1 = REG_SW_2; + register_val = BITFVAL(SW3_STDBY, voltage); + register_mask = BITFMASK(SW3_STDBY); + break; + case MC13892_SW4: + register1 = REG_SW_3; + register_val = BITFVAL(SW4_STDBY, voltage); + register_mask = BITFMASK(SW4_STDBY); + break; + default: + return -EINVAL; + } + + register_val |= (hi << SWXHI_LSH); + register_mask |= (1 << SWXHI_LSH); + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_swbst_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(SWBST_EN, SWBST_EN_ENABLE); + register_mask = BITFMASK(SWBST_EN); + register1 = REG_SW_5; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_swbst_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(SWBST_EN, SWBST_EN_DISABLE); + register_mask = BITFMASK(SWBST_EN); + register1 = REG_SW_5; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_viohi_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOHI_EN, VIOHI_EN_ENABLE); + register_mask = BITFMASK(VIOHI_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_viohi_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VIOHI_EN, VIOHI_EN_DISABLE); + register_mask = BITFMASK(VIOHI_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vusb_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VUSB_EN, VUSB_EN_ENABLE); + register_mask = BITFMASK(VUSB_EN); + register1 = REG_USB1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vusb_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VUSB_EN, VUSB_EN_DISABLE); + register_mask = BITFMASK(VUSB_EN); + register1 = REG_USB1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vdig_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1050) && (mV < 1250)) + voltage = VDIG_1_05V; + else if ((mV >= 1250) && (mV < 1650)) + voltage = VDIG_1_25V; + else if ((mV >= 1650) && (mV < 1800)) + voltage = VDIG_1_65V; + else + voltage = VDIG_1_80V; + + register_val = BITFVAL(VDIG, voltage); + register_mask = BITFMASK(VDIG); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vdig_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VDIG); + + switch (voltage) { + case VDIG_1_05V: + mV = 1050; + break; + case VDIG_1_25V: + mV = 1250; + break; + case VDIG_1_65V: + mV = 1650; + break; + case VDIG_1_80V: + mV = 1800; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vdig_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VDIG_EN, VDIG_EN_ENABLE); + register_mask = BITFMASK(VDIG_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vdig_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VDIG_EN, VDIG_EN_DISABLE); + register_mask = BITFMASK(VDIG_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vpll_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1050) && (mV < 1250)) + voltage = VPLL_1_05V; + else if ((mV >= 1250) && (mV < 1650)) + voltage = VPLL_1_25V; + else if ((mV >= 1650) && (mV < 1800)) + voltage = VPLL_1_65V; + else + voltage = VPLL_1_80V; + + register_val = BITFVAL(VPLL, voltage); + register_mask = BITFMASK(VPLL); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vpll_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VPLL); + + switch (voltage) { + case VPLL_1_05V: + mV = 1050; + break; + case VPLL_1_25V: + mV = 1250; + break; + case VPLL_1_65V: + mV = 1650; + break; + case VPLL_1_80V: + mV = 1800; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vpll_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VPLL_EN, VPLL_EN_ENABLE); + register_mask = BITFMASK(VPLL_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vpll_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VPLL_EN, VPLL_EN_DISABLE); + register_mask = BITFMASK(VPLL_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vaudio_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2300) && (mV < 2500)) + voltage = VAUDIO_2_3V; + else if ((mV >= 2500) && (mV < 2775)) + voltage = VAUDIO_2_5V; + else if ((mV >= 2775) && (mV < 3000)) + voltage = VAUDIO_2_775V; + else + voltage = VAUDIO_3V; + + register_val = BITFVAL(VAUDIO, voltage); + register_mask = BITFMASK(VAUDIO); + register1 = REG_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vaudio_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_1, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VAUDIO); + + switch (voltage) { + case VAUDIO_2_3V: + mV = 2300; + break; + case VAUDIO_2_5V: + mV = 2500; + break; + case VAUDIO_2_775V: + mV = 2775; + break; + case VAUDIO_3V: + mV = 3000; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vaudio_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VAUDIO_EN, VAUDIO_EN_ENABLE); + register_mask = BITFMASK(VAUDIO_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vaudio_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VAUDIO_EN, VAUDIO_EN_DISABLE); + register_mask = BITFMASK(VAUDIO_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vusb2_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2400) && (mV < 2600)) + voltage = VUSB2_2_4V; + else if ((mV >= 2600) && (mV < 2700)) + voltage = VUSB2_2_6V; + else if ((mV >= 2700) && (mV < 2775)) + voltage = VUSB2_2_7V; + else + voltage = VUSB2_2_775V; + + register_val = BITFVAL(VUSB2, voltage); + register_mask = BITFMASK(VUSB2); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vusb2_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VUSB2); + + switch (voltage) { + case VUSB2_2_4V: + mV = 2400; + break; + case VUSB2_2_6V: + mV = 2600; + break; + case VUSB2_2_7V: + mV = 2700; + break; + case VUSB2_2_775V: + mV = 2775; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vusb2_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VUSB2_EN, VUSB2_EN_ENABLE); + register_mask = BITFMASK(VUSB2_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vusb2_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VUSB2_EN, VUSB2_EN_DISABLE); + register_mask = BITFMASK(VUSB2_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vvideo_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2500) && (mV < 2600)) + voltage = VVIDEO_2_5V; + else if ((mV >= 2600) && (mV < 2700)) + voltage = VVIDEO_2_6V; + else if ((mV >= 2700) && (mV < 2775)) + voltage = VVIDEO_2_7V; + else + voltage = VVIDEO_2_775V; + + register_val = BITFVAL(VVIDEO, voltage); + register_mask = BITFMASK(VVIDEO); + register1 = REG_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vvideo_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_1, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VVIDEO); + + switch (voltage) { + case VVIDEO_2_5V: + mV = 2500; + break; + case VVIDEO_2_6V: + mV = 2600; + break; + case VVIDEO_2_7V: + mV = 2700; + break; + case VVIDEO_2_775V: + mV = 2775; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vvideo_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VVIDEO_EN, VVIDEO_EN_ENABLE); + register_mask = BITFMASK(VVIDEO_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vvideo_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VVIDEO_EN, VVIDEO_EN_DISABLE); + register_mask = BITFMASK(VVIDEO_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vsd_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1800) && (mV < 2000)) + voltage = VSD_1_8V; + else if ((mV >= 2000) && (mV < 2600)) + voltage = VSD_2_0V; + else if ((mV >= 2600) && (mV < 2700)) + voltage = VSD_2_6V; + else if ((mV >= 2700) && (mV < 2800)) + voltage = VSD_2_7V; + else if ((mV >= 2800) && (mV < 2900)) + voltage = VSD_2_8V; + else if ((mV >= 2900) && (mV < 3000)) + voltage = VSD_2_9V; + else if ((mV >= 3000) && (mV < 3150)) + voltage = VSD_3_0V; + else + voltage = VSD_3_15V; + + register_val = BITFVAL(VSD, voltage); + register_mask = BITFMASK(VSD); + register1 = REG_SETTING_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vsd_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_1, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VSD); + + switch (voltage) { + case VSD_1_8V: + mV = 1800; + break; + case VSD_2_0V: + mV = 2000; + break; + case VSD_2_6V: + mV = 2600; + break; + case VSD_2_7V: + mV = 2700; + break; + case VSD_2_8V: + mV = 2800; + break; + case VSD_2_9V: + mV = 2900; + break; + case VSD_3_0V: + mV = 3000; + break; + case VSD_3_15V: + mV = 3150; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vsd_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VSD_EN, VSD_EN_ENABLE); + register_mask = BITFMASK(VSD_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vsd_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VSD_EN, VSD_EN_DISABLE); + register_mask = BITFMASK(VSD_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vcam_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 2500) && (mV < 2600)) + voltage = VCAM_2_5V; + else if ((mV >= 2600) && (mV < 2750)) + voltage = VCAM_2_6V; + else if ((mV >= 2750) && (mV < 3000)) + voltage = VCAM_2_75V; + else + voltage = VCAM_3_0V; + + register_val = BITFVAL(VCAM, voltage); + register_mask = BITFMASK(VCAM); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vcam_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VCAM); + + switch (voltage) { + case VCAM_2_5V: + mV = 2500; + break; + case VCAM_2_6V: + mV = 2600; + break; + case VCAM_2_75V: + mV = 2750; + break; + case VCAM_3_0V: + mV = 3000; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vcam_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VCAM_EN, VCAM_EN_ENABLE); + register_mask = BITFMASK(VCAM_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vcam_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VCAM_EN, VCAM_EN_DISABLE); + register_mask = BITFMASK(VCAM_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vcam_set_mode(struct regulator_dev *reg, unsigned int mode) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + switch (mode) { + case REGULATOR_MODE_FAST: + register_val = BITFVAL(VCAM_CONFIG, VCAM_CONFIG_EXT); + break; + case REGULATOR_MODE_NORMAL: + register_val = BITFVAL(VCAM_CONFIG, VCAM_CONFIG_INT); + break; + default: + return -EINVAL; + } + register_mask = BITFMASK(VCAM_CONFIG); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +unsigned int mc13892_vcam_get_mode(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int config = 0, mode = VCAM_CONFIG_INT; + + CHECK_ERROR(pmic_read_reg(REG_MODE_1, ®ister_val, PMIC_ALL_BITS)); + config = BITFEXT(register_val, VCAM_CONFIG); + + switch (config) { + case VCAM_CONFIG_EXT: + mode = REGULATOR_MODE_FAST; + break; + case VCAM_CONFIG_INT: + mode = REGULATOR_MODE_NORMAL; + break; + default: + return -EINVAL; + } + return mode; +} + +static int mc13892_vgen1_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1200) && (mV < 1500)) + voltage = VGEN1_1_2V; + else if ((mV >= 1500) && (mV < 2775)) + voltage = VGEN1_1_5V; + else if ((mV >= 2775) && (mV < 3150)) + voltage = VGEN1_2_775V; + else + voltage = VGEN1_3_15V; + + register_val = BITFVAL(VGEN1, voltage); + register_mask = BITFMASK(VGEN1); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen1_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VGEN1); + + switch (voltage) { + case VGEN1_1_2V: + mV = 1200; + break; + case VGEN1_1_5V: + mV = 1500; + break; + case VGEN1_2_775V: + mV = 2775; + break; + case VGEN1_3_15V: + mV = 3150; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vgen1_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN1_EN, VGEN1_EN_ENABLE); + register_mask = BITFMASK(VGEN1_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen1_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN1_EN, VGEN1_EN_DISABLE); + register_mask = BITFMASK(VGEN1_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen2_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1200) && (mV < 1500)) + voltage = VGEN2_1_2V; + else if ((mV >= 1500) && (mV < 1600)) + voltage = VGEN2_1_5V; + else if ((mV >= 1600) && (mV < 1800)) + voltage = VGEN2_1_6V; + else if ((mV >= 1800) && (mV < 2700)) + voltage = VGEN2_1_8V; + else if ((mV >= 2700) && (mV < 2800)) + voltage = VGEN2_2_7V; + else if ((mV >= 2800) && (mV < 3000)) + voltage = VGEN2_2_8V; + else if ((mV >= 3000) && (mV < 3150)) + voltage = VGEN2_3_0V; + else + voltage = VGEN2_3_15V; + + register_val = BITFVAL(VGEN2, voltage); + register_mask = BITFMASK(VGEN2); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen2_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VGEN2); + + switch (voltage) { + case VGEN2_1_2V: + mV = 1200; + break; + case VGEN2_1_5V: + mV = 1500; + break; + case VGEN2_1_6V: + mV = 1600; + break; + case VGEN2_1_8V: + mV = 1800; + break; + case VGEN2_2_7V: + mV = 2700; + break; + case VGEN2_2_8V: + mV = 2800; + break; + case VGEN2_3_0V: + mV = 3000; + break; + case VGEN2_3_15V: + mV = 3150; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vgen2_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN2_EN, VGEN2_EN_ENABLE); + register_mask = BITFMASK(VGEN2_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen2_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN2_EN, VGEN2_EN_DISABLE); + register_mask = BITFMASK(VGEN2_EN); + register1 = REG_MODE_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen3_set_voltage(struct regulator_dev *reg, + int minuV, int uV) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int voltage, mV = uV / 1000; + + if ((mV >= 1800) && (mV < 2900)) + voltage = VGEN3_1_8V; + else + voltage = VGEN3_2_9V; + + register_val = BITFVAL(VGEN3, voltage); + register_mask = BITFMASK(VGEN3); + register1 = REG_SETTING_0; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen3_get_voltage(struct regulator_dev *reg) +{ + unsigned int register_val = 0; + int voltage = 0, mV = 0; + + CHECK_ERROR(pmic_read_reg(REG_SETTING_0, ®ister_val, PMIC_ALL_BITS)); + voltage = BITFEXT(register_val, VGEN3); + + switch (voltage) { + case VGEN3_1_8V: + mV = 1800; + break; + case VGEN3_2_9V: + mV = 2900; + break; + default: + return -EINVAL; + } + + return mV * 1000; +} + +static int mc13892_vgen3_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN3_EN, VGEN3_EN_ENABLE); + register_mask = BITFMASK(VGEN3_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_vgen3_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + + register_val = BITFVAL(VGEN3_EN, VGEN3_EN_DISABLE); + register_mask = BITFMASK(VGEN3_EN); + register1 = REG_MODE_1; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_gpo_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13892_GPO1: + register_val = BITFVAL(GPO1_EN, GPO1_EN_ENABLE); + register_mask = BITFMASK(GPO1_EN); + break; + case MC13892_GPO2: + register_val = BITFVAL(GPO2_EN, GPO2_EN_ENABLE); + register_mask = BITFMASK(GPO2_EN); + break; + case MC13892_GPO3: + register_val = BITFVAL(GPO3_EN, GPO3_EN_ENABLE); + register_mask = BITFMASK(GPO3_EN); + break; + case MC13892_GPO4: + register_val = BITFVAL(GPO4_EN, GPO4_EN_ENABLE) + + BITFVAL(GPO4_ADIN, GPO4_ADIN_DISABLE); + register_mask = BITFMASK(GPO4_EN) + BITFMASK(GPO4_ADIN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISC; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_gpo_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13892_GPO1: + register_val = BITFVAL(GPO1_EN, GPO1_EN_DISABLE); + register_mask = BITFMASK(GPO1_EN); + break; + case MC13892_GPO2: + register_val = BITFVAL(GPO2_EN, GPO2_EN_DISABLE); + register_mask = BITFMASK(GPO2_EN); + break; + case MC13892_GPO3: + register_val = BITFVAL(GPO3_EN, GPO3_EN_DISABLE); + register_mask = BITFMASK(GPO3_EN); + break; + case MC13892_GPO4: + register_val = BITFVAL(GPO4_EN, GPO4_EN_DISABLE); + register_mask = BITFMASK(GPO4_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISC; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_power_gating_enable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13892_PWGT1: + register_val = BITFVAL(PWGT1SPI_EN, PWGT1SPI_EN_ENABLE); + register_mask = BITFMASK(PWGT1SPI_EN); + break; + case MC13892_PWGT2: + register_val = BITFVAL(PWGT2SPI_EN, PWGT2SPI_EN_ENABLE); + register_mask = BITFMASK(PWGT2SPI_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISC; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static int mc13892_power_gating_disable(struct regulator_dev *reg) +{ + unsigned int register_val = 0, register_mask = 0; + unsigned int register1; + int gpo = rdev_get_id(reg); + + switch (gpo) { + case MC13892_PWGT1: + register_val = BITFVAL(PWGT1SPI_EN, PWGT1SPI_EN_DISABLE); + register_mask = BITFMASK(PWGT1SPI_EN); + break; + case MC13892_PWGT2: + register_val = BITFVAL(PWGT2SPI_EN, PWGT2SPI_EN_DISABLE); + register_mask = BITFMASK(PWGT2SPI_EN); + break; + default: + return -EINVAL; + }; + + register1 = REG_POWER_MISC; + + return pmic_write_reg(register1, register_val, register_mask); +} + +static struct regulator_ops mc13892_sw_ops = { + .enable = mc13892_sw_stby_enable, + .disable = mc13892_sw_stby_disable, + .set_voltage = mc13892_sw_set_voltage, + .get_voltage = mc13892_sw_get_voltage, + .set_suspend_voltage = mc13892_sw_stby_set_voltage, + .set_suspend_enable = mc13892_sw_stby_enable, + .set_suspend_disable = mc13892_sw_stby_disable, + .set_suspend_mode = mc13892_sw_stby_set_mode, +}; + +static struct regulator_ops mc13892_swbst_ops = { + .enable = mc13892_swbst_enable, + .disable = mc13892_swbst_disable, +}; + +static struct regulator_ops mc13892_viohi_ops = { + .enable = mc13892_viohi_enable, + .disable = mc13892_viohi_disable, +}; + +static struct regulator_ops mc13892_vusb_ops = { + .enable = mc13892_vusb_enable, + .disable = mc13892_vusb_disable, +}; + +static struct regulator_ops mc13892_vdig_ops = { + .set_voltage = mc13892_vdig_set_voltage, + .get_voltage = mc13892_vdig_get_voltage, + .enable = mc13892_vdig_enable, + .disable = mc13892_vdig_disable, +}; + +static struct regulator_ops mc13892_vpll_ops = { + .set_voltage = mc13892_vpll_set_voltage, + .get_voltage = mc13892_vpll_get_voltage, + .enable = mc13892_vpll_enable, + .disable = mc13892_vpll_disable, +}; + +static struct regulator_ops mc13892_vusb2_ops = { + .set_voltage = mc13892_vusb2_set_voltage, + .get_voltage = mc13892_vusb2_get_voltage, + .enable = mc13892_vusb2_enable, + .disable = mc13892_vusb2_disable, +}; + +static struct regulator_ops mc13892_vvideo_ops = { + .set_voltage = mc13892_vvideo_set_voltage, + .get_voltage = mc13892_vvideo_get_voltage, + .enable = mc13892_vvideo_enable, + .disable = mc13892_vvideo_disable, +}; + +static struct regulator_ops mc13892_vaudio_ops = { + .set_voltage = mc13892_vaudio_set_voltage, + .get_voltage = mc13892_vaudio_get_voltage, + .enable = mc13892_vaudio_enable, + .disable = mc13892_vaudio_disable, +}; + +static struct regulator_ops mc13892_vsd_ops = { + .set_voltage = mc13892_vsd_set_voltage, + .get_voltage = mc13892_vsd_get_voltage, + .enable = mc13892_vsd_enable, + .disable = mc13892_vsd_disable, +}; + +static struct regulator_ops mc13892_vcam_ops = { + .set_voltage = mc13892_vcam_set_voltage, + .get_voltage = mc13892_vcam_get_voltage, + .enable = mc13892_vcam_enable, + .disable = mc13892_vcam_disable, + .set_mode = mc13892_vcam_set_mode, + .get_mode = mc13892_vcam_get_mode, +}; + +static struct regulator_ops mc13892_vgen1_ops = { + .set_voltage = mc13892_vgen1_set_voltage, + .get_voltage = mc13892_vgen1_get_voltage, + .enable = mc13892_vgen1_enable, + .disable = mc13892_vgen1_disable, +}; + +static struct regulator_ops mc13892_vgen2_ops = { + .set_voltage = mc13892_vgen2_set_voltage, + .get_voltage = mc13892_vgen2_get_voltage, + .enable = mc13892_vgen2_enable, + .disable = mc13892_vgen2_disable, +}; + +static struct regulator_ops mc13892_vgen3_ops = { + .set_voltage = mc13892_vgen3_set_voltage, + .get_voltage = mc13892_vgen3_get_voltage, + .enable = mc13892_vgen3_enable, + .disable = mc13892_vgen3_disable, +}; + +static struct regulator_ops mc13892_gpo_ops = { + .enable = mc13892_gpo_enable, + .disable = mc13892_gpo_disable, +}; + +static struct regulator_ops mc13892_power_gating_ops = { + .enable = mc13892_power_gating_enable, + .disable = mc13892_power_gating_disable, + +}; + +static struct regulator_desc mc13892_reg[] = { + { + .name = "SW1", + .id = MC13892_SW1, + .ops = &mc13892_sw_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW2", + .id = MC13892_SW2, + .ops = &mc13892_sw_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW3", + .id = MC13892_SW3, + .ops = &mc13892_sw_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SW4", + .id = MC13892_SW4, + .ops = &mc13892_sw_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SWBST", + .id = MC13892_SWBST, + .ops = &mc13892_swbst_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VIOHI", + .id = MC13892_VIOHI, + .ops = &mc13892_viohi_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VPLL", + .id = MC13892_VPLL, + .ops = &mc13892_vpll_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VDIG", + .id = MC13892_VDIG, + .ops = &mc13892_vdig_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VSD", + .id = MC13892_VSD, + .ops = &mc13892_vsd_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VUSB2", + .id = MC13892_VUSB2, + .ops = &mc13892_vusb2_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VVIDEO", + .id = MC13892_VVIDEO, + .ops = &mc13892_vvideo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VAUDIO", + .id = MC13892_VAUDIO, + .ops = &mc13892_vaudio_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VCAM", + .id = MC13892_VCAM, + .ops = &mc13892_vcam_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VGEN1", + .id = MC13892_VGEN1, + .ops = &mc13892_vgen1_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VGEN2", + .id = MC13892_VGEN2, + .ops = &mc13892_vgen2_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VGEN3", + .id = MC13892_VGEN3, + .ops = &mc13892_vgen3_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "VUSB", + .id = MC13892_VUSB, + .ops = &mc13892_vusb_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO1", + .id = MC13892_GPO1, + .ops = &mc13892_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO2", + .id = MC13892_GPO2, + .ops = &mc13892_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO3", + .id = MC13892_GPO3, + .ops = &mc13892_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPO4", + .id = MC13892_GPO4, + .ops = &mc13892_gpo_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "PWGT1", + .id = MC13892_PWGT1, + .ops = &mc13892_power_gating_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "PWGT2", + .id = MC13892_PWGT2, + .ops = &mc13892_power_gating_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, +}; + +static int mc13892_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + + /* register regulator */ + rdev = regulator_register(&mc13892_reg[pdev->id], &pdev->dev, + pdev->dev.platform_data, + dev_get_drvdata(&pdev->dev)); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mc13892_reg[pdev->id].name); + return PTR_ERR(rdev); + } + + return 0; +} + + +static int mc13892_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; +} + +int mc13892_register_regulator(struct mc13892 *mc13892, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + + if (mc13892->pmic.pdev[reg]) + return -EBUSY; + + pdev = platform_device_alloc("mc13892-regulatr", reg); + if (!pdev) + return -ENOMEM; + + mc13892->pmic.pdev[reg] = pdev; + + initdata->driver_data = mc13892; + + pdev->dev.platform_data = initdata; + pdev->dev.parent = mc13892->dev; + platform_set_drvdata(pdev, mc13892); + ret = platform_device_add(pdev); + + if (ret != 0) { + dev_err(mc13892->dev, "Failed to register regulator %d: %d\n", + reg, ret); + platform_device_del(pdev); + mc13892->pmic.pdev[reg] = NULL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(mc13892_register_regulator); + +static struct platform_driver mc13892_regulator_driver = { + .probe = mc13892_regulator_probe, + .remove = mc13892_regulator_remove, + .driver = { + .name = "mc13892-regulatr", + }, +}; + +static int __init mc13892_regulator_init(void) +{ + return platform_driver_register(&mc13892_regulator_driver); +} +subsys_initcall(mc13892_regulator_init); + +static void __exit mc13892_regulator_exit(void) +{ + platform_driver_unregister(&mc13892_regulator_driver); +} +module_exit(mc13892_regulator_exit); + + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC13892 Regulator driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/reg-mc9s08dz60.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/reg-mc9s08dz60.c @@ -0,0 +1,236 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* lcd */ +static int mc9s08dz60_lcd_enable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 6, 1); +} + +static int mc9s08dz60_lcd_disable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 6, 0); +} + +static struct regulator_ops mc9s08dz60_lcd_ops = { + .enable = mc9s08dz60_lcd_enable, + .disable = mc9s08dz60_lcd_disable, +}; + +/* wifi */ +static int mc9s08dz60_wifi_enable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 1); +} + +static int mc9s08dz60_wifi_disable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 0); +} + +static struct regulator_ops mc9s08dz60_wifi_ops = { + .enable = mc9s08dz60_wifi_enable, + .disable = mc9s08dz60_wifi_disable, +}; + +/* hdd */ +static int mc9s08dz60_hdd_enable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 1); +} + +static int mc9s08dz60_hdd_disable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 0); +} + +static struct regulator_ops mc9s08dz60_hdd_ops = { + .enable = mc9s08dz60_hdd_enable, + .disable = mc9s08dz60_hdd_disable, +}; + +/* gps */ +static int mc9s08dz60_gps_enable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 1); +} + +static int mc9s08dz60_gps_disable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0); +} + +static struct regulator_ops mc9s08dz60_gps_ops = { + .enable = mc9s08dz60_gps_enable, + .disable = mc9s08dz60_gps_disable, +}; + +/* speaker */ +static int mc9s08dz60_speaker_enable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, 1); +} + +static int mc9s08dz60_speaker_disable(struct regulator_dev *reg) +{ + return pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, 0); +} + +static struct regulator_ops mc9s08dz60_speaker_ops = { + .enable = mc9s08dz60_speaker_enable, + .disable = mc9s08dz60_speaker_disable, +}; + +static struct regulator_desc mc9s08dz60_reg[] = { + { + .name = "LCD", + .id = MC9S08DZ60_LCD, + .ops = &mc9s08dz60_lcd_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "WIFI", + .id = MC9S08DZ60_WIFI, + .ops = &mc9s08dz60_wifi_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "HDD", + .id = MC9S08DZ60_HDD, + .ops = &mc9s08dz60_hdd_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "GPS", + .id = MC9S08DZ60_GPS, + .ops = &mc9s08dz60_gps_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "SPKR", + .id = MC9S08DZ60_SPKR, + .ops = &mc9s08dz60_speaker_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + +}; + +static int mc9s08dz60_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + + /* register regulator */ + rdev = regulator_register(&mc9s08dz60_reg[pdev->id], &pdev->dev, + pdev->dev.platform_data, + dev_get_drvdata(&pdev->dev)); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mc9s08dz60_reg[pdev->id].name); + return PTR_ERR(rdev); + } + + return 0; +} + + +static int mc9s08dz60_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; +} + +int mc9s08dz60_register_regulator(struct mc9s08dz60 *mc9s08dz60, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + + if (mc9s08dz60->pmic.pdev[reg]) + return -EBUSY; + + pdev = platform_device_alloc("mc9s08dz60-regu", reg); + if (!pdev) + return -ENOMEM; + + mc9s08dz60->pmic.pdev[reg] = pdev; + + initdata->driver_data = mc9s08dz60; + + pdev->dev.platform_data = initdata; + pdev->dev.parent = mc9s08dz60->dev; + platform_set_drvdata(pdev, mc9s08dz60); + ret = platform_device_add(pdev); + + if (ret != 0) { + dev_err(mc9s08dz60->dev, + "Failed to register regulator %d: %d\n", + reg, ret); + platform_device_del(pdev); + mc9s08dz60->pmic.pdev[reg] = NULL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(mc9s08dz60_register_regulator); + +static struct platform_driver mc9s08dz60_regulator_driver = { + .probe = mc9s08dz60_regulator_probe, + .remove = mc9s08dz60_regulator_remove, + .driver = { + .name = "mc9s08dz60-regu", + }, +}; + +static int __init mc9s08dz60_regulator_init(void) +{ + return platform_driver_register(&mc9s08dz60_regulator_driver); +} +subsys_initcall(mc9s08dz60_regulator_init); + +static void __exit mc9s08dz60_regulator_exit(void) +{ + platform_driver_unregister(&mc9s08dz60_regulator_driver); +} +module_exit(mc9s08dz60_regulator_exit); + + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC9S08DZ60 Regulator driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/reg-mc34704.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/reg-mc34704.c @@ -0,0 +1,289 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MC34704_ONOFFA 0x8 +#define MC34704_ONOFFC 0x4 +#define MC34704_ONOFFD 0x2 +#define MC34704_ONOFFE 0x1 + +/* Private data for MC34704 regulators */ + +struct reg_mc34704_priv { + short enable; /* enable bit, if available */ + short v_default; /* default regulator voltage in mV */ + int dvs_min; /* minimum voltage change in units of 2.5% */ + int dvs_max; /* maximum voltage change in units of 2.5% */ + char i2c_dvs; /* i2c DVS register number */ + char i2c_stat; /* i2c status register number */ +}; +struct reg_mc34704_priv mc34704_reg_priv[] = { + { + .v_default = REG1_V_MV, + .dvs_min = REG1_DVS_MIN_PCT / 2.5, + .dvs_max = REG1_DVS_MAX_PCT / 2.5, + .i2c_dvs = 0x4, + .i2c_stat = 0x5, + .enable = MC34704_ONOFFA, + }, + { + .v_default = REG2_V_MV, + .dvs_min = REG2_DVS_MIN_PCT / 2.5, + .dvs_max = REG2_DVS_MAX_PCT / 2.5, + .i2c_dvs = 0x6, + .i2c_stat = 0x7, + }, + { + .v_default = REG3_V_MV, + .dvs_min = REG3_DVS_MIN_PCT / 2.5, + .dvs_max = REG3_DVS_MAX_PCT / 2.5, + .i2c_dvs = 0x8, + .i2c_stat = 0x9, + }, + { + .v_default = REG4_V_MV, + .dvs_min = REG4_DVS_MIN_PCT / 2.5, + .dvs_max = REG4_DVS_MAX_PCT / 2.5, + .i2c_dvs = 0xA, + .i2c_stat = 0xB, + }, + { + .v_default = REG5_V_MV, + .dvs_min = REG5_DVS_MIN_PCT / 2.5, + .dvs_max = REG5_DVS_MAX_PCT / 2.5, + .i2c_dvs = 0xC, + .i2c_stat = 0xE, + .enable = MC34704_ONOFFE, + }, +}; + +static int mc34704_set_voltage(struct regulator_dev *reg, int MiniV, int uV) +{ + struct reg_mc34704_priv *priv = rdev_get_drvdata(reg); + int mV = uV / 1000; + int dV = mV - priv->v_default; + + /* compute dynamic voltage scaling value */ + int dvs = 1000 * dV / priv->v_default / 25; + + /* clip to regulator limits */ + if (dvs > priv->dvs_max) + dvs = priv->dvs_max; + if (dvs < priv->dvs_min) + dvs = priv->dvs_min; + + return pmic_write_reg(priv->i2c_dvs, dvs << 1, 0x1E); +} + +static int mc34704_get_voltage(struct regulator_dev *reg) +{ + int mV; + struct reg_mc34704_priv *priv = rdev_get_drvdata(reg); + int val, dvs; + + CHECK_ERROR(pmic_read_reg(priv->i2c_dvs, &val, 0xF)); + + dvs = (val >> 1) & 0xF; + + /* dvs is 4-bit 2's complement; sign-extend it */ + if (dvs & 8) + dvs |= -1 & ~0xF; + + /* Regulator voltage is adjusted by (dvs * 2.5%) */ + mV = priv->v_default * (1000 + 25 * dvs) / 1000; + + return 1000 * mV; +} + +static int mc34704_enable_reg(struct regulator_dev *reg) +{ + struct reg_mc34704_priv *priv = rdev_get_drvdata(reg); + + if (priv->enable) + return pmic_write_reg(REG_MC34704_GENERAL2, -1, priv->enable); + + return PMIC_ERROR; +} + +static int mc34704_disable_reg(struct regulator_dev *reg) +{ + struct reg_mc34704_priv *priv = rdev_get_drvdata(reg); + + if (priv->enable) + return pmic_write_reg(REG_MC34704_GENERAL2, 0, priv->enable); + + return PMIC_ERROR; +} + +static int mc34704_is_reg_enabled(struct regulator_dev *reg) +{ + struct reg_mc34704_priv *priv = rdev_get_drvdata(reg); + int val; + + if (priv->enable) { + CHECK_ERROR(pmic_read_reg(REG_MC34704_GENERAL2, &val, + priv->enable)); + return val ? 1 : 0; + } else { + return PMIC_ERROR; + } +} + +static struct regulator_ops mc34704_full_ops = { + .set_voltage = mc34704_set_voltage, + .get_voltage = mc34704_get_voltage, + .enable = mc34704_enable_reg, + .disable = mc34704_disable_reg, + .is_enabled = mc34704_is_reg_enabled, +}; + +static struct regulator_ops mc34704_partial_ops = { + .set_voltage = mc34704_set_voltage, + .get_voltage = mc34704_get_voltage, +}; + +static struct regulator_desc reg_mc34704[] = { + { + .name = "REG1_BKLT", + .id = MC34704_BKLT, + .ops = &mc34704_full_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE}, + { + .name = "REG2_CPU", + .id = MC34704_CPU, + .ops = &mc34704_partial_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE}, + { + .name = "REG3_CORE", + .id = MC34704_CORE, + .ops = &mc34704_partial_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE}, + { + .name = "REG4_DDR", + .id = MC34704_DDR, + .ops = &mc34704_partial_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE}, + { + .name = "REG5_PERS", + .id = MC34704_PERS, + .ops = &mc34704_full_ops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE}, +}; + +static int mc34704_regulator_probe(struct platform_device *pdev) +{ + struct regulator_dev *rdev; + + /* register regulator */ + rdev = regulator_register(®_mc34704[pdev->id], &pdev->dev, + pdev->dev.platform_data, + (void *)&mc34704_reg_priv[pdev->id]); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + reg_mc34704[pdev->id].name); + return PTR_ERR(rdev); + } + + return 0; +} + +static int mc34704_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; +} + +int mc34704_register_regulator(struct mc34704 *mc34704, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + + if (mc34704->pmic.pdev[reg]) + return -EBUSY; + + pdev = platform_device_alloc("mc34704-regulatr", reg); + if (!pdev) + return -ENOMEM; + + mc34704->pmic.pdev[reg] = pdev; + + initdata->driver_data = mc34704; + + pdev->dev.platform_data = initdata; + pdev->dev.driver_data = &mc34704_reg_priv[reg]; + pdev->dev.parent = mc34704->dev; + platform_set_drvdata(pdev, mc34704); + ret = platform_device_add(pdev); + + if (ret != 0) { + dev_err(mc34704->dev, "Failed to register regulator %d: %d\n", + reg, ret); + platform_device_del(pdev); + mc34704->pmic.pdev[reg] = NULL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(mc34704_register_regulator); + +static struct platform_driver mc34704_regulator_driver = { + .probe = mc34704_regulator_probe, + .remove = mc34704_regulator_remove, + .driver = { + .name = "mc34704-regulatr", + }, +}; + +static int __init mc34704_regulator_init(void) +{ + return platform_driver_register(&mc34704_regulator_driver); +} +subsys_initcall(mc34704_regulator_init); + +static void __exit mc34704_regulator_exit(void) +{ + platform_driver_unregister(&mc34704_regulator_driver); +} +module_exit(mc34704_regulator_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC34704 Regulator Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/Makefile +++ linux-fsl-imx51-2.6.31/drivers/regulator/Makefile @@ -2,7 +2,6 @@ # Makefile for regulator drivers. # - obj-$(CONFIG_REGULATOR) += core.o obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o @@ -17,4 +16,11 @@ obj-$(CONFIG_REGULATOR_DA903X) += da903x.o obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o +obj-$(CONFIG_REGULATOR_MC13892) += reg-mc13892.o +obj-$(CONFIG_REGULATOR_MC13783) += reg-mc13783.o +obj-$(CONFIG_REGULATOR_MC34704) += reg-mc34704.o +obj-$(CONFIG_REGULATOR_STMP3XXX) += stmp3xxx.o + +obj-$(CONFIG_REGULATOR_MC9S08DZ60) += reg-mc9s08dz60.o + ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG --- linux-fsl-imx51-2.6.31.orig/drivers/regulator/stmp3xxx.c +++ linux-fsl-imx51-2.6.31/drivers/regulator/stmp3xxx.c @@ -0,0 +1,301 @@ +/* + * Freescale STMP378X voltage regulators + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include + +static int stmp3xxx_set_voltage(struct regulator_dev *reg, int MiniV, int uv) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + if (stmp_reg->rdata->set_voltage) + return stmp_reg->rdata->set_voltage(stmp_reg, uv); + else + return -ENOTSUPP; +} + + +static int stmp3xxx_get_voltage(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + if (stmp_reg->rdata->get_voltage) + return stmp_reg->rdata->get_voltage(stmp_reg); + else + return -ENOTSUPP; +} + +static int stmp3xxx_set_current(struct regulator_dev *reg, int min_uA, int uA) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + if (stmp_reg->rdata->set_current) + return stmp_reg->rdata->set_current(stmp_reg, uA); + else + return -ENOTSUPP; +} + +static int stmp3xxx_get_current(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + if (stmp_reg->rdata->get_current) + return stmp_reg->rdata->get_current(stmp_reg); + else + return -ENOTSUPP; +} + +static int stmp3xxx_enable(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + return stmp_reg->rdata->enable(stmp_reg); +} + +static int stmp3xxx_disable(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + return stmp_reg->rdata->disable(stmp_reg); +} + +static int stmp3xxx_is_enabled(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + return stmp_reg->rdata->is_enabled(stmp_reg); +} + +static int stmp3xxx_set_mode(struct regulator_dev *reg, unsigned int mode) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + return stmp_reg->rdata->set_mode(stmp_reg, mode); +} + +static unsigned int stmp3xxx_get_mode(struct regulator_dev *reg) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + return stmp_reg->rdata->get_mode(stmp_reg); +} + +static unsigned int stmp3xxx_get_optimum_mode(struct regulator_dev *reg, + int input_uV, int output_uV, int load_uA) +{ + struct stmp3xxx_regulator *stmp_reg = rdev_get_drvdata(reg); + + if (stmp_reg->rdata->get_optimum_mode) + return stmp_reg->rdata->get_optimum_mode(stmp_reg, input_uV, + output_uV, load_uA); + else + return -ENOTSUPP; +} + +static struct regulator_ops stmp3xxx_rops = { + .set_voltage = stmp3xxx_set_voltage, + .get_voltage = stmp3xxx_get_voltage, + .set_current_limit = stmp3xxx_set_current, + .get_current_limit = stmp3xxx_get_current, + .enable = stmp3xxx_enable, + .disable = stmp3xxx_disable, + .is_enabled = stmp3xxx_is_enabled, + .set_mode = stmp3xxx_set_mode, + .get_mode = stmp3xxx_get_mode, + .get_optimum_mode = stmp3xxx_get_optimum_mode, +}; + +static struct regulator_desc stmp3xxx_reg_desc[] = { + { + .name = "vddd", + .id = STMP3XXX_VDDD, + .ops = &stmp3xxx_rops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vdda", + .id = STMP3XXX_VDDA, + .ops = &stmp3xxx_rops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vddio", + .id = STMP3XXX_VDDIO, + .ops = &stmp3xxx_rops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "vddd_bo", + .id = STMP3XXX_VDDDBO, + .ops = &stmp3xxx_rops, + .irq = 0, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE + }, + { + .name = "overall_current", + .id = STMP3XXX_OVERALL_CUR, + .ops = &stmp3xxx_rops, + .irq = 0, + .type = REGULATOR_CURRENT, + .owner = THIS_MODULE + }, +}; + +static int reg_callback(struct notifier_block *self, + unsigned long event, void *data) +{ + unsigned long flags; + struct stmp3xxx_regulator *sreg = + container_of(self, struct stmp3xxx_regulator , nb); + + switch (event) { + case STMP3XXX_REG5V_IS_USB: + spin_lock_irqsave(&sreg->lock, flags); + sreg->rdata->max_current = 500000; + spin_unlock_irqrestore(&sreg->lock, flags); + break; + case STMP3XXX_REG5V_NOT_USB: + spin_lock_irqsave(&sreg->lock, flags); + sreg->rdata->max_current = 0x7fffffff; + spin_unlock_irqrestore(&sreg->lock, flags); + break; + } + + return 0; +} + +int stmp3xxx_regulator_probe(struct platform_device *pdev) +{ + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + struct stmp3xxx_regulator *sreg; + struct regulator_init_data *initdata; + + sreg = platform_get_drvdata(pdev); + initdata = pdev->dev.platform_data; + sreg->cur_current = 0; + sreg->next_current = 0; + sreg->cur_voltage = 0; + + init_waitqueue_head(&sreg->wait_q); + spin_lock_init(&sreg->lock); + + if (pdev->id > STMP3XXX_OVERALL_CUR) { + rdesc = kzalloc(sizeof(struct regulator_desc), GFP_KERNEL); + memcpy(rdesc, &stmp3xxx_reg_desc[STMP3XXX_OVERALL_CUR], + sizeof(struct regulator_desc)); + rdesc->name = kstrdup(sreg->rdata->name, GFP_KERNEL); + } else + rdesc = &stmp3xxx_reg_desc[pdev->id]; + + pr_debug("probing regulator %s %s %d\n", + sreg->rdata->name, + rdesc->name, + pdev->id); + + /* register regulator */ + rdev = regulator_register(rdesc, &pdev->dev, + initdata, sreg); + + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + rdesc->name); + return PTR_ERR(rdev); + } + + if (sreg->rdata->max_current) { + struct regulator *regu; + regu = regulator_get(NULL, sreg->rdata->name); + sreg->nb.notifier_call = reg_callback; + regulator_register_notifier(regu, &sreg->nb); + } + + return 0; +} + + +int stmp3xxx_regulator_remove(struct platform_device *pdev) +{ + struct regulator_dev *rdev = platform_get_drvdata(pdev); + + regulator_unregister(rdev); + + return 0; + +} + +int stmp3xxx_register_regulator( + struct stmp3xxx_regulator *reg_data, int reg, + struct regulator_init_data *initdata) +{ + struct platform_device *pdev; + int ret; + + pdev = platform_device_alloc("stmp3xxx_reg", reg); + if (!pdev) + return -ENOMEM; + + pdev->dev.platform_data = initdata; + + platform_set_drvdata(pdev, reg_data); + ret = platform_device_add(pdev); + + if (ret != 0) { + pr_debug("Failed to register regulator %d: %d\n", + reg, ret); + platform_device_del(pdev); + } + pr_debug("register regulator %s, %d: %d\n", + reg_data->rdata->name, reg, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(stmp3xxx_register_regulator); + +struct platform_driver stmp3xxx_reg = { + .driver = { + .name = "stmp3xxx_reg", + }, + .probe = stmp3xxx_regulator_probe, + .remove = stmp3xxx_regulator_remove, +}; + +int stmp3xxx_regulator_init(void) +{ + return platform_driver_register(&stmp3xxx_reg); +} + +void stmp3xxx_regulator_exit(void) +{ + platform_driver_unregister(&stmp3xxx_reg); +} + +postcore_initcall(stmp3xxx_regulator_init); +module_exit(stmp3xxx_regulator_exit); --- linux-fsl-imx51-2.6.31.orig/drivers/dma/at_hdmac.c +++ linux-fsl-imx51-2.6.31/drivers/dma/at_hdmac.c @@ -813,7 +813,7 @@ dev_vdbg(chan2dev(chan), "is_tx_complete: %d (d%d, u%d)\n", cookie, done ? *done : 0, used ? *used : 0); - spin_lock_bh(atchan->lock); + spin_lock_bh(&atchan->lock); last_complete = atchan->completed_cookie; last_used = chan->cookie; @@ -828,7 +828,7 @@ ret = dma_async_is_complete(cookie, last_complete, last_used); } - spin_unlock_bh(atchan->lock); + spin_unlock_bh(&atchan->lock); if (done) *done = last_complete; --- linux-fsl-imx51-2.6.31.orig/drivers/mfd/ab3100-core.c +++ linux-fsl-imx51-2.6.31/drivers/mfd/ab3100-core.c @@ -643,7 +643,7 @@ u8 setting; }; -static const struct ab3100_init_setting __initdata +static const struct ab3100_init_setting __initconst ab3100_init_settings[] = { { .abreg = AB3100_MCA, --- linux-fsl-imx51-2.6.31.orig/drivers/mfd/wm8350-core.c +++ linux-fsl-imx51-2.6.31/drivers/mfd/wm8350-core.c @@ -1466,7 +1466,8 @@ } } - wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0); + /*mask gpio and rtc interrupt*/ + wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x50); wm8350_client_dev_register(wm8350, "wm8350-codec", &(wm8350->codec.pdev)); --- linux-fsl-imx51-2.6.31.orig/drivers/bluetooth/bt3c_cs.c +++ linux-fsl-imx51-2.6.31/drivers/bluetooth/bt3c_cs.c @@ -345,7 +345,10 @@ int iir; irqreturn_t r = IRQ_NONE; - BUG_ON(!info->hdev); + if (!info || !info->hdev) { + BT_ERR("Call of irq %d for unknown device", irq); + return IRQ_NONE; + } iobase = info->p_dev->io.BasePort1; --- linux-fsl-imx51-2.6.31.orig/drivers/bluetooth/dtl1_cs.c +++ linux-fsl-imx51-2.6.31/drivers/bluetooth/dtl1_cs.c @@ -299,7 +299,10 @@ int iir, lsr; irqreturn_t r = IRQ_NONE; - BUG_ON(!info->hdev); + if (!info || !info->hdev) { + BT_ERR("Call of irq %d for unknown device", irq); + return IRQ_NONE; + } iobase = info->p_dev->io.BasePort1; --- linux-fsl-imx51-2.6.31.orig/drivers/bluetooth/btuart_cs.c +++ linux-fsl-imx51-2.6.31/drivers/bluetooth/btuart_cs.c @@ -295,7 +295,10 @@ int iir, lsr; irqreturn_t r = IRQ_NONE; - BUG_ON(!info->hdev); + if (!info || !info->hdev) { + BT_ERR("Call of irq %d for unknown device", irq); + return IRQ_NONE; + } iobase = info->p_dev->io.BasePort1; --- linux-fsl-imx51-2.6.31.orig/drivers/bluetooth/bluecard_cs.c +++ linux-fsl-imx51-2.6.31/drivers/bluetooth/bluecard_cs.c @@ -503,7 +503,10 @@ unsigned int iobase; unsigned char reg; - BUG_ON(!info->hdev); + if (!info || !info->hdev) { + BT_ERR("Call of irq %d for unknown device", irq); + return IRQ_NONE; + } if (!test_bit(CARD_READY, &(info->hw_state))) return IRQ_HANDLED; --- linux-fsl-imx51-2.6.31.orig/drivers/bluetooth/hci_ldisc.c +++ linux-fsl-imx51-2.6.31/drivers/bluetooth/hci_ldisc.c @@ -258,9 +258,16 @@ BT_DBG("tty %p", tty); + /* FIXME: This btw is bogus, nothing requires the old ldisc to clear + the pointer */ if (hu) return -EEXIST; + /* Error if the tty has no write op instead of leaving an exploitable + hole */ + if (tty->ops->write == NULL) + return -EOPNOTSUPP; + if (!(hu = kzalloc(sizeof(struct hci_uart), GFP_KERNEL))) { BT_ERR("Can't allocate control structure"); return -ENFILE; --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_core.c +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_core.c @@ -0,0 +1,358 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include "i2c_slave_device.h" + +int i2c_slave_major; + +static ssize_t i2c_slave_read(struct file *fd, char __user *buf, size_t len, + loff_t *ptr) +{ + i2c_slave_device_t *dev; + void *kbuf; + int ret; + + if (len == 0) + return 0; + + kbuf = kmalloc(len, GFP_KERNEL); + if (!kbuf) { + ret = -ENOMEM; + goto error0; + } + + dev = (i2c_slave_device_t *) fd->private_data; + if (!dev) { + ret = -ENODEV; + goto error1; + } + + ret = i2c_slave_device_read(dev, len, kbuf); + if (ret <= 0 || copy_to_user(buf, kbuf, len)) { + ret = -EFAULT; + } + + error1: + kfree(kbuf); + error0: + return ret; +} + +static ssize_t i2c_slave_write(struct file *fd, const char __user *buf, + size_t len, loff_t *ptr) +{ + i2c_slave_device_t *dev; + void *kbuf; + int ret; + + if (len == 0) + return 0; + + kbuf = kmalloc(len, GFP_KERNEL); + if (!kbuf) { + ret = -ENOMEM; + goto error0; + } + if (copy_from_user(kbuf, buf, len)) { + ret = -EFAULT; + goto error1; + } + + dev = (i2c_slave_device_t *) fd->private_data; + if (!dev) { + ret = -ENODEV; + goto error1; + } + + ret = i2c_slave_device_write(dev, len, (u8 *) kbuf); + + error1: + kfree(kbuf); + error0: + return ret; +} + +static int i2c_slave_ioctl(struct inode *inode, struct file *fd, + unsigned code, unsigned long value) +{ + /*todo */ + return 0; +} + +static int i2c_slave_open(struct inode *inode, struct file *fd) +{ + int ret; + unsigned int id; + i2c_slave_device_t *dev; + id = iminor(inode); + + if (id >= I2C_SLAVE_DEVICE_MAX) { + ret = -ENODEV; + goto error; + } + + dev = i2c_slave_device_find(id); + if (!dev) { + ret = -ENODEV; + goto error; + } + + i2c_slave_rb_clear(dev->receive_buffer); + i2c_slave_rb_clear(dev->send_buffer); + + if (i2c_slave_device_start(dev)) { + ret = -EBUSY; + goto error; + } + + fd->private_data = (void *)dev; + ret = 0; + + error: + return ret; +} + +static int i2c_slave_release(struct inode *inode, struct file *fd) +{ + int ret; + unsigned int id; + i2c_slave_device_t *dev; + id = iminor(inode); + + if (id >= I2C_SLAVE_DEVICE_MAX) { + ret = -ENODEV; + goto error; + } + + dev = i2c_slave_device_find(id); + if (!dev) { + ret = -ENODEV; + goto error; + } + + if (i2c_slave_device_stop(dev)) { + ret = -EBUSY; + goto error; + } + + ret = 0; + + error: + return ret; +} + +static const struct file_operations i2c_slave_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .read = i2c_slave_read, + .write = i2c_slave_write, + .ioctl = i2c_slave_ioctl, + .open = i2c_slave_open, + .release = i2c_slave_release, +}; + +static int i2c_slave_bus_match(struct device *dev, struct device_driver *drv) +{ + return 0; +} + +/* +static int i2c_slave_bus_probe(struct device *dev) +{ + struct device_driver *driver = dev->driver; + + if (driver) { + return driver->probe(dev); + } else { + dev_err(dev, "%s: no driver\n", __func__); + return -ENODEV; + } +} +*/ + +static int i2c_slave_bus_remove(struct device *dev) +{ + struct device_driver *driver = dev->driver; + + if (driver) { + if (!driver->remove) { + return 0; + } else { + return driver->remove(dev); + } + } else { + + dev_err(dev, "%s: no driver\n", __func__); + return -ENODEV; + } +} + +static void i2c_slave_bus_shutdown(struct device *dev) +{ + struct device_driver *driver = dev->driver; + + if (driver) { + + driver->shutdown(dev); + } else { + + dev_err(dev, "%s: no driver\n", __func__); + return; + } +} +static int i2c_slave_bus_suspend(struct device *dev, pm_message_t state) +{ + struct device_driver *driver = dev->driver; + + if (driver) { + + if (!driver->suspend) { + return 0; + } else { + return driver->suspend(dev, state); + } + } else { + + dev_err(dev, "%s: no driver\n", __func__); + return -ENODEV; + } +} + +static int i2c_slave_bus_resume(struct device *dev) +{ + struct device_driver *driver = dev->driver; + + if (driver) { + + if (!driver->resume) { + return 0; + } else { + return driver->resume(dev); + } + } else { + + dev_err(dev, "%s: no driver\n", __func__); + return -ENODEV; + } +} + +struct bus_type i2c_slave_bus_type = { + .name = "i2c-slave", + .match = i2c_slave_bus_match, + .remove = i2c_slave_bus_remove, + .shutdown = i2c_slave_bus_shutdown, + .suspend = i2c_slave_bus_suspend, + .resume = i2c_slave_bus_resume, +}; + +EXPORT_SYMBOL_GPL(i2c_slave_bus_type); + +static int i2c_slave_driver_probe(struct device *dev) +{ + return 0; +} + +static int i2c_slave_driver_remove(struct device *dev) +{ + return 0; +} + +static int i2c_slave_driver_shutdown(struct device *dev) +{ + return 0; +} + +static int i2c_slave_driver_suspend(struct device *dev, pm_message_t state) +{ + return 0; +} + +static int i2c_slave_driver_resume(struct device *dev) +{ + return 0; +} + +extern struct class *i2c_slave_class; + +static struct device_driver i2c_slave_driver = { + .name = "i2c-slave", + .owner = THIS_MODULE, + .bus = &i2c_slave_bus_type, + .probe = i2c_slave_driver_probe, + .remove = i2c_slave_driver_remove, + .shutdown = i2c_slave_driver_shutdown, + .suspend = i2c_slave_driver_suspend, + .resume = i2c_slave_driver_resume, +}; + +static int __init i2c_slave_dev_init(void) +{ + int ret; + + printk(KERN_INFO "i2c slave /dev entries driver\n"); + + ret = bus_register(&i2c_slave_bus_type); + if (ret) { + printk(KERN_ERR "%s: bus_register error\n", __func__); + goto out; + } + + i2c_slave_class = class_create(THIS_MODULE, "i2c-slave"); + if (IS_ERR(i2c_slave_class)) { + pr_err("%s: class_create error\n", __func__); + goto out_unreg_bus; + } + + i2c_slave_major = register_chrdev(0, "i2c-slave", &i2c_slave_fops); + if (i2c_slave_major <= 0) { + pr_err("%s: register_chrdev error\n", __func__); + goto out_unreg_class; + } + + ret = driver_register(&i2c_slave_driver); + if (ret) { + pr_err("%s: driver_register error\n", __func__); + goto out_unreg_chrdev; + } + + return 0; + + out_unreg_chrdev: + unregister_chrdev(i2c_slave_major, "i2c-slave"); + out_unreg_class: + class_destroy(i2c_slave_class); + out_unreg_bus: + bus_unregister(&i2c_slave_bus_type); + out: + pr_err("%s: init error\n", __func__); + return ret; +} + +static void __exit i2c_dev_exit(void) +{ + driver_unregister(&i2c_slave_driver); + class_destroy(i2c_slave_class); + unregister_chrdev(i2c_slave_major, "i2c-slave"); + bus_unregister(&i2c_slave_bus_type); +} + +module_init(i2c_slave_dev_init); +module_exit(i2c_dev_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("I2C Slave Driver Core"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/Kconfig @@ -0,0 +1,39 @@ +# +# I2C slave subsystem configuration +# + +menuconfig I2C_SLAVE + bool "I2C Slave support" + depends on HAS_IOMEM + ---help--- + I2C (pronounce: I-square-C) is a slow serial bus protocol used in + many micro controller applications and developed by Philips. + + If you want I2C Slave support, you should say Y here. + + This I2C Slave support can also be built as a module. If so, the module + will be called i2c-slave. + +if I2C_SLAVE + +config I2C_SLAVE_CORE + tristate "I2C SLAVE CORE" + default y + ---help--- + i2c slave core. + +config MXC_I2C_SLAVE + tristate "MXC I2C SLAVE" + depends on I2C_SLAVE_CORE + default y + ---help--- + mxc i2c slave support. + +config I2C_SLAVE_CLIENT + tristate "I2C SLAVE CLIENT" + default y + ---help--- + i2c slave client that used when the master is on the same board. + this is for i2c master which is on the same board with the slave. + +endif # I2C_SLAVE --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_device.c +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_device.c @@ -0,0 +1,270 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "i2c_slave_device.h" +static i2c_slave_device_t *i2c_slave_devices[I2C_SLAVE_DEVICE_MAX]; +struct class *i2c_slave_class; +static int i2c_slave_device_get_id(void) +{ + int i; + for (i = 0; i < I2C_SLAVE_DEVICE_MAX; i++) { + if (!i2c_slave_devices[i]) + return i; + } + return -1; +} + +i2c_slave_device_t *i2c_slave_device_find(int id) +{ + if (id >= 0 && id < I2C_SLAVE_DEVICE_MAX) + return i2c_slave_devices[id]; + + else + return NULL; +} +void i2c_slave_device_set_name(i2c_slave_device_t *device, char *name) +{ + device->name = name; +} + +void i2c_slave_device_set_address(i2c_slave_device_t *device, u8 address) +{ + device->address = address; +} + +u8 i2c_slave_device_get_addr(i2c_slave_device_t *device) +{ + return device->address; +} + +int i2c_slave_device_set_freq(i2c_slave_device_t *device, u32 freq) +{ + /*TODO: freq check */ + device->scl_freq = freq; + return 0; +} + +u32 i2c_slave_device_get_freq(i2c_slave_device_t *device) +{ + return device->scl_freq; +} + +/*used by the specific i2c device to register itself to the core.*/ +i2c_slave_device_t *i2c_slave_device_alloc(void) +{ + int id; + i2c_slave_device_t *device; + id = i2c_slave_device_get_id(); + if (id < 0) { + goto error; + } + device = + (i2c_slave_device_t *) kzalloc(sizeof(i2c_slave_device_t), + GFP_KERNEL); + if (!device) { + printk(KERN_ERR "%s: alloc device error\n", __func__); + goto error_device; + } + device->receive_buffer = i2c_slave_rb_alloc(PAGE_SIZE); + if (!device->receive_buffer) { + printk(KERN_ERR "%s: alloc receive buffer error\n", __func__); + goto error_receive_buffer; + } + device->send_buffer = i2c_slave_rb_alloc(PAGE_SIZE); + if (!device->send_buffer) { + printk(KERN_ERR "%s: alloc send buffer error\n", __func__); + goto error_send_buffer; + } + device->id = id; + return device; + + error_send_buffer: + kfree(device->receive_buffer); + error_receive_buffer: + kfree((void *)device); + error_device: + pr_debug(KERN_ERR "%s: no memory\n", __func__); + error: + return 0; +} + +void i2c_slave_device_free(i2c_slave_device_t *dev) +{ + i2c_slave_rb_release(dev->receive_buffer); + i2c_slave_rb_release(dev->send_buffer); + kfree(dev); +} + +int i2c_slave_device_register(i2c_slave_device_t *device) +{ + device->dev = device_create(i2c_slave_class, NULL, + MKDEV(i2c_slave_major, device->id), + NULL, "slave-i2c-%d", device->id); + if (!device->dev) { + return -1; + } + i2c_slave_devices[device->id] = device; + return 0; +} + +void i2c_slave_device_unregister(i2c_slave_device_t *device) +{ + device_destroy(i2c_slave_class, MKDEV(i2c_slave_major, device->id)); + i2c_slave_devices[device->id] = 0; + i2c_slave_device_free(device); +} + +/* + this two functions are used by i2c slave core to start or stop the specific i2c device. +*/ +int i2c_slave_device_start(i2c_slave_device_t *device) +{ + return device->start(device); +} + +int i2c_slave_device_stop(i2c_slave_device_t *device) +{ + return device->stop(device); +} + +/* + this two functions are used by i2c slave core to get data by the specific i2c slave device + or send data to it to feed i2c master's need. + + @mod: async(1) or sync(0) mode. +*/ +int i2c_slave_device_read(i2c_slave_device_t *device, int num, u8 *data) +{ + int read_num, read_total = 0; + int step = 1000; + u8 *read_buf = data; + printk(KERN_INFO "%s: device id=%d, num=%d\n", __func__, device->id, + num); + read_num = i2c_slave_rb_consume(device->receive_buffer, num, read_buf); + read_total += read_num; + read_buf += read_num; + step--; + while ((read_total < num) && step) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + if (!signal_pending(current)) { + } else { + /*TODO*/ break; + } + read_num = + i2c_slave_rb_consume(device->receive_buffer, + num - read_total, read_buf); + num -= read_num; + read_buf += read_num; + step--; + } + return read_total; +} +int i2c_slave_device_write(i2c_slave_device_t *device, int num, u8 *data) +{ + int write_num, write_total = 0; + int step = 1000; + u8 *buf_index = data; + write_num = i2c_slave_rb_produce(device->send_buffer, num, buf_index); + write_total += write_num; + buf_index += write_num; + step--; + while (write_total < num && step) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + if (!signal_pending(current)) { + } else { + /*TODO*/ step = 0; + break; + } + write_num = + i2c_slave_rb_produce(device->send_buffer, num - write_total, + buf_index); + write_total += write_num; + buf_index += write_num; + step--; + } + while (step && i2c_slave_rb_num(device->send_buffer)) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + if (!signal_pending(current)) { + step--; + } else { + /*TODO*/ step = 0; + break; + } + } + if (!step) { + write_total -= i2c_slave_rb_num(device->send_buffer); + i2c_slave_rb_clear(device->send_buffer); + } + return write_total; +} + +/* + * this 2 functions used by the specific i2c slave device when they got data from master(produce), + * or is request by master(consume). + */ +int i2c_slave_device_produce(i2c_slave_device_t *device, int num, u8 *data) +{ + int ret; + ret = i2c_slave_rb_produce(device->receive_buffer, num, data); + return ret; +} +int i2c_slave_device_consume(i2c_slave_device_t *device, int num, u8 *data) +{ + return i2c_slave_rb_consume(device->send_buffer, num, data); +} + +EXPORT_SYMBOL(i2c_slave_device_set_name); +EXPORT_SYMBOL(i2c_slave_device_set_address); +EXPORT_SYMBOL(i2c_slave_device_get_addr); +EXPORT_SYMBOL(i2c_slave_device_find); +EXPORT_SYMBOL(i2c_slave_device_set_freq); +EXPORT_SYMBOL(i2c_slave_device_get_freq); + +/* +* used by the specific i2c device to register itself to the core. +*/ +EXPORT_SYMBOL(i2c_slave_device_alloc); +EXPORT_SYMBOL(i2c_slave_device_free); +EXPORT_SYMBOL(i2c_slave_device_register); +EXPORT_SYMBOL(i2c_slave_device_unregister); + +/* + this two functions are used by i2c slave core to start or stop the specific i2c device. +*/ +EXPORT_SYMBOL(i2c_slave_device_start); +EXPORT_SYMBOL(i2c_slave_device_stop); + +/* + this two functions are used by i2c slave core to get data by the specific i2c slave device + or send data to it for it to feed i2c master's need. + + @mod: async(1) or sync(0) mode. +*/ +EXPORT_SYMBOL(i2c_slave_device_read); +EXPORT_SYMBOL(i2c_slave_device_write); + +/* +* this 2 functions used by the specific i2c slave device when they got data from master, +* or is request by master. +*/ +EXPORT_SYMBOL(i2c_slave_device_produce); +EXPORT_SYMBOL(i2c_slave_device_consume); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/mxc_i2c_slave_reg.h +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/mxc_i2c_slave_reg.h @@ -0,0 +1,41 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MXC_I2C_SLAVE_REG_H__ +#define __MXC_I2C_SLAVE_REG_H__ + +/* Address offsets of the I2C registers */ +#define MXC_IADR 0x00 /* Address Register */ +#define MXC_IFDR 0x04 /* Freq div register */ +#define MXC_I2CR 0x08 /* Control regsiter */ +#define MXC_I2SR 0x0C /* Status register */ +#define MXC_I2DR 0x10 /* Data I/O register */ + +/* Bit definitions of I2CR */ +#define MXC_I2CR_IEN 0x0080 +#define MXC_I2CR_IIEN 0x0040 +#define MXC_I2CR_MSTA 0x0020 +#define MXC_I2CR_MTX 0x0010 +#define MXC_I2CR_TXAK 0x0008 +#define MXC_I2CR_RSTA 0x0004 + +/* Bit definitions of I2SR */ +#define MXC_I2SR_ICF 0x0080 +#define MXC_I2SR_IAAS 0x0040 +#define MXC_I2SR_IBB 0x0020 +#define MXC_I2SR_IAL 0x0010 +#define MXC_I2SR_SRW 0x0004 +#define MXC_I2SR_IIF 0x0002 +#define MXC_I2SR_RXAK 0x0001 + +#endif /* __MXC_I2C_REG_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_client.c +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_client.c @@ -0,0 +1,81 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include + +struct i2c_client *i2c_slave_client; +static int i2c_slave_client_probe(struct i2c_client *adapter); +static int i2c_slave_client_remove(struct i2c_client *client); +static struct i2c_driver i2c_slave_client_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "i2c-slave-client", + }, + .probe = i2c_slave_client_probe, + .remove = i2c_slave_client_remove, +}; + +/*! + * ov2640 I2C attach function + * + * @param adapter struct i2c_adapter * + * @return Error code indicating success or failure + */ +static int i2c_slave_client_probe(struct i2c_client *client) +{ + i2c_slave_client = client; + return 0; +} + +/*! + * ov2640 I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int i2c_slave_client_remove(struct i2c_client *client) +{ + return 0; +} + +/*! + * ov2640 init function + * + * @return Error code indicating success or failure + */ +static __init int i2c_slave_client_init(void) +{ + return i2c_add_driver(&i2c_slave_client_driver); +} + +/*! + * OV2640 cleanup function + * + * @return Error code indicating success or failure + */ +static void __exit i2c_slave_client_clean(void) +{ + i2c_del_driver(&i2c_slave_client_driver); +} + +module_init(i2c_slave_client_init); +module_exit(i2c_slave_client_clean); +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("I2c Slave Client Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_ring_buffer.h +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_ring_buffer.h @@ -0,0 +1,39 @@ +#ifndef __BUFFER_MANAGER_H__ +#define __BUFFER_MANAGER_H__ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include + +typedef struct i2c_slave_ring_buffer { + int start; + int end; + int total; + bool full; + char *buffer; + spinlock_t lock; +} i2c_slave_ring_buffer_t; + +i2c_slave_ring_buffer_t *i2c_slave_rb_alloc(int size); + +void i2c_slave_rb_release(i2c_slave_ring_buffer_t *ring); + +int i2c_slave_rb_produce(i2c_slave_ring_buffer_t *ring, int num, char *data); + +int i2c_slave_rb_consume(i2c_slave_ring_buffer_t *ring, int num, char *data); + +int i2c_slave_rb_num(i2c_slave_ring_buffer_t *ring); + +void i2c_slave_rb_clear(i2c_slave_ring_buffer_t *ring); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_device.h +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_device.h @@ -0,0 +1,79 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __I2C_SLAVE_H__ +#define __I2C_SLAVE_H__ + +#include +#include "i2c_slave_ring_buffer.h" + +#define I2C_SLAVE_DEVICE_MAX 256 +extern int i2c_slave_major; + +typedef struct i2c_slave_device { + struct list_head list; + u8 address; + u32 scl_freq; + char *name; + i2c_slave_ring_buffer_t *receive_buffer; + i2c_slave_ring_buffer_t *send_buffer; + int (*start) (struct i2c_slave_device *); + int (*stop) (struct i2c_slave_device *); + /*int (*set_freq)(struct i2c_slave_device*); + int (*set_addr)(struct i2c_slave_device*);*/ + void *private_data; + struct device *dev; + int id; +} i2c_slave_device_t; + +/* + used by the specific device to set some infomations. +*/ +void i2c_slave_device_set_name(i2c_slave_device_t *device, char *name); +void i2c_slave_device_set_address(i2c_slave_device_t *device, u8 address); +i2c_slave_device_t *i2c_slave_device_find(int id); +u8 i2c_slave_device_get_addr(i2c_slave_device_t *device); +int i2c_slave_device_set_freq(i2c_slave_device_t *device, u32 freq); +u32 i2c_slave_device_get_freq(i2c_slave_device_t *device); + +/* +**used by the specific i2c device to register itself to the core. +*/ +i2c_slave_device_t *i2c_slave_device_alloc(void); +void i2c_slave_device_free(i2c_slave_device_t *); +int i2c_slave_device_register(i2c_slave_device_t *device); +void i2c_slave_device_unregister(i2c_slave_device_t *device); + +/* + this two functions are used by i2c slave core to start or stop the specific i2c device. +*/ +int i2c_slave_device_start(i2c_slave_device_t *device); +int i2c_slave_device_stop(i2c_slave_device_t *device); + +/* + this two functions are used by i2c slave core to get data by the specific i2c slave device + or send data to it for it to feed i2c master's need. + + @mod: async(1) or sync(0) mode. +*/ +int i2c_slave_device_read(i2c_slave_device_t *device, int num, u8 *data); +int i2c_slave_device_write(i2c_slave_device_t *device, int num, u8 *data); + +/* +*this 2 functions used by the specific i2c slave device when they got data from master, +*or is requested by master. +*/ +int i2c_slave_device_produce(i2c_slave_device_t *device, int num, u8 *data); +int i2c_slave_device_consume(i2c_slave_device_t *device, int num, u8 *data); + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/Makefile +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the i2c slave. +# + +i2c_slave-objs := i2c_slave_ring_buffer.o i2c_slave_device.o i2c_slave_core.o +obj-$(CONFIG_I2C_SLAVE_CORE) += i2c_slave.o +obj-$(CONFIG_MXC_I2C_SLAVE) += mxc_i2c_slave.o +obj-$(CONFIG_I2C_SLAVE_CLIENT) += i2c_slave_client.o --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/i2c_slave_ring_buffer.c +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/i2c_slave_ring_buffer.c @@ -0,0 +1,185 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include "i2c_slave_ring_buffer.h" + +i2c_slave_ring_buffer_t *i2c_slave_rb_alloc(int size) +{ + i2c_slave_ring_buffer_t *ring_buf; + + ring_buf = + (i2c_slave_ring_buffer_t *) kzalloc(sizeof(i2c_slave_ring_buffer_t), + GFP_KERNEL); + if (!ring_buf) { + pr_debug("%s: alloc ring_buf error\n", __func__); + goto error; + } + + ring_buf->buffer = kmalloc(size, GFP_KERNEL); + if (!ring_buf->buffer) { + pr_debug("%s: alloc buffer error\n", __func__); + goto error1; + } + + ring_buf->total = size; + + ring_buf->lock = __SPIN_LOCK_UNLOCKED(ring_buf->lock); + return ring_buf; + + error1: + kfree(ring_buf); + error: + return NULL; +} + +void i2c_slave_rb_release(i2c_slave_ring_buffer_t *ring) +{ + unsigned long flags; + + spin_lock_irqsave(ring->lock, flags); + kfree(ring->buffer); + spin_unlock_irqrestore(ring->lock, flags); + kfree(ring); +} + +int i2c_slave_rb_produce(i2c_slave_ring_buffer_t *ring, int num, char *data) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(ring->lock, flags); + + if (ring->start < ring->end) { + if ((ring->start + num) < ring->end) { /*have enough space */ + memcpy(&ring->buffer[ring->start], data, num); + ring->start += num; + ret = num; + } else { /*space not enough, just copy part of it. */ + ret = ring->end - ring->start; + memcpy(&ring->buffer[ring->start], data, ret); + ring->start += ret; + ring->full = 1; + } + } else if (ring->start >= ring->end && !ring->full) { + if (ring->start + num <= ring->total) { /*space enough */ + ret = num; + memcpy(&ring->buffer[ring->start], data, ret); + ring->start += ret; + } else { /*turn ring->start around */ + ret = ring->total - ring->start; + memcpy(&ring->buffer[ring->start], data, ret); + ring->start = 0; + num -= ret; + data += ret; + if (num < ring->end) { /*space enough */ + ret += num; + memcpy(&ring->buffer[ring->start], data, num); + } else { /*space not enough, just copy part of it. */ + ret += ring->end; + memcpy(&ring->buffer[ring->start], data, + ring->end); + ring->start = ring->end; + ring->full = 1; + } + } + } else { /*(ring->data == ring->end) && ring->full ) : full */ + ret = 0; + } + + spin_unlock_irqrestore(ring->lock, flags); + return ret; +} + +int i2c_slave_rb_consume(i2c_slave_ring_buffer_t *ring, int num, char *data) +{ + int ret; + unsigned long flags; + spin_lock_irqsave(ring->lock, flags); + if (num <= 0) { + ret = 0; + goto out; + } + + if (ring->start > ring->end) { + if (num <= ring->start - ring->end) { /*enough */ + ret = num; + memcpy(data, &ring->buffer[ring->end], ret); + ring->end += ret; + } else { /*not enough */ + ret = ring->start - ring->end; + memcpy(data, &ring->buffer[ring->end], ret); + ring->end += ret; + } + } else if (ring->start < ring->end || ring->full) { + if (num <= ring->total - ring->end) { + ret = ring->total - ring->end; + memcpy(data, &ring->buffer[ring->end], ret); + ring->end += ret; + } else if (num <= ring->total - ring->end + ring->start) { + ret = ring->total - ring->end; + memcpy(data, &ring->buffer[ring->end], ret); + ring->end = 0; + data += ret; + num -= ret; + memcpy(data, &ring->buffer[ring->end], num); + ring->end = num; + ret += num; + } else { + ret = ring->total - ring->end; + memcpy(data, &ring->buffer[ring->end], ret); + ring->end = 0; + data += ret; + num -= ret; + memcpy(data, &ring->buffer[ring->end], ring->start); + ring->end = ring->start; + ret += ring->start; + } + ring->full = 0; + } else { /*empty */ + ret = 0; + } + + out: + spin_unlock_irqrestore(ring->lock, flags); + + return ret; +} + +int i2c_slave_rb_num(i2c_slave_ring_buffer_t *ring) +{ + int ret; + unsigned long flags; + spin_lock_irqsave(ring->lock, flags); + if (ring->start > ring->end) { + ret = ring->start - ring->end; + } else if (ring->start < ring->end) { + ret = ring->total - ring->end + ring->start; + } else if (ring->full) { + ret = ring->total; + } else { + ret = 0; + } + spin_unlock_irqrestore(ring->lock, flags); + return ret; +} + +void i2c_slave_rb_clear(i2c_slave_ring_buffer_t *ring) +{ + unsigned long flags; + spin_lock_irqsave(ring->lock, flags); + + ring->start = ring->end = 0; + ring->full = 0; + spin_unlock_irqrestore(ring->lock, flags); +} --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/mxc_i2c_slave.c +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/mxc_i2c_slave.c @@ -0,0 +1,329 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c_slave_device.h" +#include "mxc_i2c_slave.h" +#include "mxc_i2c_slave_reg.h" + +struct mxc_i2c_slave_clk { + int reg_value; + int div; +}; + +static const struct mxc_i2c_slave_clk i2c_clk_table[] = { + {0x20, 22}, {0x21, 24}, {0x22, 26}, {0x23, 28}, + {0, 30}, {1, 32}, {0x24, 32}, {2, 36}, + {0x25, 36}, {0x26, 40}, {3, 42}, {0x27, 44}, + {4, 48}, {0x28, 48}, {5, 52}, {0x29, 56}, + {6, 60}, {0x2A, 64}, {7, 72}, {0x2B, 72}, + {8, 80}, {0x2C, 80}, {9, 88}, {0x2D, 96}, + {0xA, 104}, {0x2E, 112}, {0xB, 128}, {0x2F, 128}, + {0xC, 144}, {0xD, 160}, {0x30, 160}, {0xE, 192}, + {0x31, 192}, {0x32, 224}, {0xF, 240}, {0x33, 256}, + {0x10, 288}, {0x11, 320}, {0x34, 320}, {0x12, 384}, + {0x35, 384}, {0x36, 448}, {0x13, 480}, {0x37, 512}, + {0x14, 576}, {0x15, 640}, {0x38, 640}, {0x16, 768}, + {0x39, 768}, {0x3A, 896}, {0x17, 960}, {0x3B, 1024}, + {0x18, 1152}, {0x19, 1280}, {0x3C, 1280}, {0x1A, 1536}, + {0x3D, 1536}, {0x3E, 1792}, {0x1B, 1920}, {0x3F, 2048}, + {0x1C, 2304}, {0x1D, 2560}, {0x1E, 3072}, {0x1F, 3840}, + {0, 0} +}; + +extern void gpio_i2c_active(int i2c_num); +extern void gpio_i2c_inactive(int i2c_num); + +static irqreturn_t interrupt_handler(int irq, void *dev_id) +{ + u16 status, ctl; + int num; + u16 data; + struct mxc_i2c_slave_device *mxc_i2c = + (struct mxc_i2c_slave_device *)dev_id; + + status = readw(mxc_i2c->reg_base + MXC_I2SR); + ctl = readw(mxc_i2c->reg_base + MXC_I2CR); + + dev_dbg(mxc_i2c->dev->dev, "status=%x, ctl=%x\n", status, ctl); + + if (status & MXC_I2SR_IAAS) { + if (status & MXC_I2SR_SRW) { + /*slave send */ + num = + i2c_slave_device_consume(mxc_i2c->dev, 1, + (u8 *) &data); + if (num < 1) { + /*FIXME:not ready to send data */ + printk(KERN_ERR + " i2c-slave:%s:data not ready\n", + __func__); + } else { + ctl |= MXC_I2CR_MTX; + writew(ctl, mxc_i2c->reg_base + MXC_I2CR); + /*send data */ + writew(data, mxc_i2c->reg_base + MXC_I2DR); + } + + } else { + /*slave receive */ + ctl &= ~MXC_I2CR_MTX; + writew(ctl, mxc_i2c->reg_base + MXC_I2CR); + + /*dummy read */ + data = readw(mxc_i2c->reg_base + MXC_I2DR); + } + } else { + /*slave send */ + if (ctl & MXC_I2CR_MTX) { + if (!(status & MXC_I2SR_RXAK)) { /*ACK received */ + num = + i2c_slave_device_consume(mxc_i2c->dev, 1, + (u8 *) &data); + if (num < 1) { + /*FIXME:not ready to send data */ + printk(KERN_ERR + " i2c-slave:%s:data not ready\n", + __func__); + } else { + ctl |= MXC_I2CR_MTX; + writew(ctl, + mxc_i2c->reg_base + MXC_I2CR); + writew(data, + mxc_i2c->reg_base + MXC_I2DR); + } + } else { + /*no ACK. */ + /*dummy read */ + ctl &= ~MXC_I2CR_MTX; + writew(ctl, mxc_i2c->reg_base + MXC_I2CR); + data = readw(mxc_i2c->reg_base + MXC_I2DR); + } + } else { /*read */ + ctl &= ~MXC_I2CR_MTX; + writew(ctl, mxc_i2c->reg_base + MXC_I2CR); + + /*read */ + data = readw(mxc_i2c->reg_base + MXC_I2DR); + i2c_slave_device_produce(mxc_i2c->dev, 1, + (u8 *) &data); + } + + } + + writew(0x0, mxc_i2c->reg_base + MXC_I2SR); + + return IRQ_HANDLED; +} + +static int start(i2c_slave_device_t *device) +{ + volatile unsigned int cr; + unsigned int addr; + struct mxc_i2c_slave_device *mxc_dev; + + mxc_dev = (struct mxc_i2c_slave_device *)device->private_data; + if (!mxc_dev) { + dev_err(device->dev, "%s: get mxc_dev error\n", __func__); + return -ENODEV; + } + + clk_enable(mxc_dev->clk); + /* Set the frequency divider */ + writew(mxc_dev->clkdiv, mxc_dev->reg_base + MXC_IFDR); + + /* Set the Slave bit */ + cr = readw(mxc_dev->reg_base + MXC_I2CR); + cr &= (!MXC_I2CR_MSTA); + writew(cr, mxc_dev->reg_base + MXC_I2CR); + + /*Set Slave Address */ + addr = mxc_dev->dev->address << 1; + writew(addr, mxc_dev->reg_base + MXC_IADR); + + /* Clear the status register */ + writew(0x0, mxc_dev->reg_base + MXC_I2SR); + + /* Enable I2C and its interrupts */ + writew(MXC_I2CR_IEN, mxc_dev->reg_base + MXC_I2CR); + writew(MXC_I2CR_IEN | MXC_I2CR_IIEN, mxc_dev->reg_base + MXC_I2CR); + + return 0; + +} + +static int stop(i2c_slave_device_t *device) +{ + struct mxc_i2c_slave_device *mxc_dev; + + mxc_dev = (struct mxc_i2c_slave_device *)device->private_data; + + writew(0x0, mxc_dev->reg_base + MXC_I2CR); + clk_disable(mxc_dev->clk); + + return 0; +} + +static int mxc_i2c_slave_probe(struct platform_device *pdev) +{ + int i; + u32 clk_freq; + struct resource *res; + struct mxc_i2c_slave_device *mxc_dev; + + mxc_dev = kzalloc(sizeof(struct mxc_i2c_slave_device), GFP_KERNEL); + if (!mxc_dev) { + goto error0; + } + mxc_dev->dev = i2c_slave_device_alloc(); + if (mxc_dev->dev == 0) { + dev_err(&pdev->dev, "%s: i2c_slave_device_alloc error\n", + __func__); + goto error1; + } + + i2c_slave_device_set_address(mxc_dev->dev, MXC_I2C_SLAVE_ADDRESS); + i2c_slave_device_set_freq(mxc_dev->dev, MXC_I2C_SLAVE_FREQ); + i2c_slave_device_set_name(mxc_dev->dev, MXC_I2C_SLAVE_NAME); + mxc_dev->dev->start = start; + mxc_dev->dev->stop = stop; + + mxc_dev->dev->private_data = mxc_dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(&pdev->dev, "%s: get resource error\n", __func__); + goto error2; + } + mxc_dev->reg_base = IO_ADDRESS(res->start); + + mxc_dev->irq = platform_get_irq(pdev, 0); + if (mxc_dev->irq < 0) { + dev_err(&pdev->dev, "%s: get irq error\n", __func__); + goto error2; + } + if (request_irq(mxc_dev->irq, interrupt_handler, + 0, mxc_dev->dev->name, mxc_dev) < 0) { + dev_err(&pdev->dev, "%s: request_irq error\n", __func__); + goto error2; + } + + /*i2c id on soc */ + mxc_dev->id = pdev->id; + + gpio_i2c_active(mxc_dev->id); + + /*clock */ + mxc_dev->clk = clk_get(&pdev->dev, "i2c_clk"); + clk_freq = clk_get_rate(mxc_dev->clk); + mxc_dev->clkdiv = -1; + if (mxc_dev->dev->scl_freq) { + /* Calculate divider and round up any fractional part */ + int div = (clk_freq + mxc_dev->dev->scl_freq - 1) / + mxc_dev->dev->scl_freq; + for (i = 0; i2c_clk_table[i].div != 0; i++) { + if (i2c_clk_table[i].div >= div) { + mxc_dev->clkdiv = i2c_clk_table[i].reg_value; + break; + } + } + } + if (mxc_dev->clkdiv == -1) { + i--; + mxc_dev->clkdiv = 0x1F; /* Use max divider */ + } + dev_dbg(&pdev->dev, + "i2c slave speed is %d/%d = %d bps, reg val = 0x%02X\n", + clk_freq, i2c_clk_table[i].div, clk_freq / i2c_clk_table[i].div, + mxc_dev->clkdiv); + + if (i2c_slave_device_register(mxc_dev->dev) < 0) { + dev_err(&pdev->dev, "%s: i2c_slave_device_register error\n", + __func__); + goto error3; + } + + platform_set_drvdata(pdev, (void *)mxc_dev); + + /*start(mxc_dev->dev); */ + return 0; + + error3: + error2: + i2c_slave_device_free(mxc_dev->dev); + error1: + kfree(mxc_dev); + error0: + return -ENODEV; +} + +static int mxc_i2c_slave_remove(struct platform_device *pdev) +{ + struct mxc_i2c_slave_device *mxc_dev; + mxc_dev = (struct mxc_i2c_slave_device *)platform_get_drvdata(pdev); + + i2c_slave_device_unregister(mxc_dev->dev); + kfree((void *)mxc_dev); + + return 0; +} + +static int mxc_i2c_slave_suspend(struct platform_device *pdev, + pm_message_t state) +{ + return 0; +} + +static int mxc_i2c_slave_resume(struct platform_device *pdev) +{ + return 0; +} + +static struct platform_driver mxci2c_slave_driver = { + .driver = { + .name = "mxc_i2c_slave", + .owner = THIS_MODULE, + }, + .probe = mxc_i2c_slave_probe, + .remove = mxc_i2c_slave_remove, + .suspend = mxc_i2c_slave_suspend, + .resume = mxc_i2c_slave_resume, +}; + +static int __init mxc_i2c_slave_init(void) +{ + /* Register the device driver structure. */ + return platform_driver_register(&mxci2c_slave_driver); +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxc_i2c_slave_exit(void) +{ + platform_driver_unregister(&mxci2c_slave_driver); +} + +module_init(mxc_i2c_slave_init); +module_exit(mxc_i2c_slave_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC I2C Slave Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c-slave/mxc_i2c_slave.h +++ linux-fsl-imx51-2.6.31/drivers/i2c-slave/mxc_i2c_slave.h @@ -0,0 +1,44 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MXC_I2C_SLAVE_H__ +#define __MXC_I2C_SLAVE_H__ + +#include +#include "i2c_slave_device.h" + +#define MXC_I2C_SLAVE_NAME "MXC_I2C_SLAVE" +#define MXC_I2C_SLAVE_ADDRESS 0x55 +#define MXC_I2C_SLAVE_FREQ 1000*100 + +struct mxc_i2c_slave_device { + /*! + * The default clock divider value to be used. + */ + unsigned int clkdiv; + + /*! + * The clock source for the device. + */ + struct clk *clk; + + /*i2c id on soc */ + int id; + + int irq; + unsigned long reg_base; + bool state; /*0:stop, 1:start */ + i2c_slave_device_t *dev; +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/block/nbd.c +++ linux-fsl-imx51-2.6.31/drivers/block/nbd.c @@ -56,7 +56,7 @@ static unsigned int nbds_max = 16; static struct nbd_device *nbd_dev; -static int max_part; +static int max_part = 15; /* * Use just one lock (or at most 1 per NIC). Two arguments for this: --- linux-fsl-imx51-2.6.31.orig/drivers/block/pktcdvd.c +++ linux-fsl-imx51-2.6.31/drivers/block/pktcdvd.c @@ -2408,7 +2408,7 @@ pkt_shrink_pktlist(pd); } -static struct pktcdvd_device *pkt_find_dev_from_minor(int dev_minor) +static struct pktcdvd_device *pkt_find_dev_from_minor(unsigned int dev_minor) { if (dev_minor >= MAX_WRITERS) return NULL; --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/via-pmu.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/via-pmu.c @@ -405,7 +405,11 @@ printk(KERN_ERR "via-pmu: can't map interrupt\n"); return -ENODEV; } - if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) { + /* We set IRQF_TIMER because we don't want the interrupt to be disabled + * between the 2 passes of driver suspend, we control our own disabling + * for that one + */ + if (request_irq(irq, via_pmu_interrupt, IRQF_TIMER, "VIA-PMU", (void *)0)) { printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); return -ENODEV; } @@ -419,7 +423,7 @@ gpio_irq = irq_of_parse_and_map(gpio_node, 0); if (gpio_irq != NO_IRQ) { - if (request_irq(gpio_irq, gpio1_interrupt, 0, + if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER, "GPIO1 ADB", (void *)0)) printk(KERN_ERR "pmu: can't get irq %d" " (GPIO1)\n", gpio_irq); @@ -925,8 +929,7 @@ #ifdef CONFIG_ADB /* Send an ADB command */ -static int -pmu_send_request(struct adb_request *req, int sync) +static int pmu_send_request(struct adb_request *req, int sync) { int i, ret; @@ -1005,16 +1008,11 @@ } /* Enable/disable autopolling */ -static int -pmu_adb_autopoll(int devs) +static int __pmu_adb_autopoll(int devs) { struct adb_request req; - if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) - return -ENXIO; - if (devs) { - adb_dev_map = devs; pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, adb_dev_map >> 8, adb_dev_map); pmu_adb_flags = 2; @@ -1027,9 +1025,17 @@ return 0; } +static int pmu_adb_autopoll(int devs) +{ + if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) + return -ENXIO; + + adb_dev_map = devs; + return __pmu_adb_autopoll(devs); +} + /* Reset the ADB bus */ -static int -pmu_adb_reset_bus(void) +static int pmu_adb_reset_bus(void) { struct adb_request req; int save_autopoll = adb_dev_map; @@ -1038,13 +1044,13 @@ return -ENXIO; /* anyone got a better idea?? */ - pmu_adb_autopoll(0); + __pmu_adb_autopoll(0); - req.nbytes = 5; + req.nbytes = 4; req.done = NULL; req.data[0] = PMU_ADB_CMD; - req.data[1] = 0; - req.data[2] = ADB_BUSRESET; + req.data[1] = ADB_BUSRESET; + req.data[2] = 0; req.data[3] = 0; req.data[4] = 0; req.reply_len = 0; @@ -1056,7 +1062,7 @@ pmu_wait_complete(&req); if (save_autopoll != 0) - pmu_adb_autopoll(save_autopoll); + __pmu_adb_autopoll(save_autopoll); return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/windfarm_lm75_sensor.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/windfarm_lm75_sensor.c @@ -115,6 +115,8 @@ return rc; } +static struct i2c_driver wf_lm75_driver; + static struct i2c_client *wf_lm75_create(struct i2c_adapter *adapter, u8 addr, int ds1775, const char *loc) @@ -157,7 +159,7 @@ * Let i2c-core delete that device on driver removal. * This is safe because i2c-core holds the core_lock mutex for us. */ - list_add_tail(&client->detected, &client->driver->clients); + list_add_tail(&client->detected, &wf_lm75_driver.clients); return client; fail: return NULL; --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/therm_pm72.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/therm_pm72.c @@ -286,6 +286,8 @@ }, }; +static struct i2c_driver therm_pm72_driver; + /* * Utility function to create an i2c_client structure and * attach it to one of u3 adapters @@ -318,7 +320,7 @@ * Let i2c-core delete that device on driver removal. * This is safe because i2c-core holds the core_lock mutex for us. */ - list_add_tail(&clt->detected, &clt->driver->clients); + list_add_tail(&clt->detected, &therm_pm72_driver.clients); return clt; } --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/windfarm_smu_sat.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/windfarm_smu_sat.c @@ -194,6 +194,8 @@ .owner = THIS_MODULE, }; +static struct i2c_driver wf_sat_driver; + static void wf_sat_create(struct i2c_adapter *adapter, struct device_node *dev) { struct i2c_board_info info; @@ -222,7 +224,7 @@ * Let i2c-core delete that device on driver removal. * This is safe because i2c-core holds the core_lock mutex for us. */ - list_add_tail(&client->detected, &client->driver->clients); + list_add_tail(&client->detected, &wf_sat_driver.clients); } static int wf_sat_probe(struct i2c_client *client, --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/therm_adt746x.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/therm_adt746x.c @@ -79,6 +79,7 @@ u8 limits[3]; int last_speed[2]; int last_var[2]; + int pwm_inv[2]; }; static enum {ADT7460, ADT7467} therm_type; @@ -124,6 +125,8 @@ return data; } +static struct i2c_driver thermostat_driver; + static int attach_thermostat(struct i2c_adapter *adapter) { @@ -148,7 +151,7 @@ * Let i2c-core delete that device on driver removal. * This is safe because i2c-core holds the core_lock mutex for us. */ - list_add_tail(&client->detected, &client->driver->clients); + list_add_tail(&client->detected, &thermostat_driver.clients); return 0; } @@ -227,19 +230,23 @@ if (speed >= 0) { manual = read_reg(th, MANUAL_MODE[fan]); + manual &= ~INVERT_MASK; write_reg(th, MANUAL_MODE[fan], - (manual|MANUAL_MASK) & (~INVERT_MASK)); + manual | MANUAL_MASK | th->pwm_inv[fan]); write_reg(th, FAN_SPD_SET[fan], speed); } else { /* back to automatic */ if(therm_type == ADT7460) { manual = read_reg(th, MANUAL_MODE[fan]) & (~MANUAL_MASK); - + manual &= ~INVERT_MASK; + manual |= th->pwm_inv[fan]; write_reg(th, MANUAL_MODE[fan], manual|REM_CONTROL[fan]); } else { manual = read_reg(th, MANUAL_MODE[fan]); + manual &= ~INVERT_MASK; + manual |= th->pwm_inv[fan]; write_reg(th, MANUAL_MODE[fan], manual&(~AUTO_MASK)); } } @@ -416,6 +423,10 @@ thermostat = th; + /* record invert bit status because fw can corrupt it after suspend */ + th->pwm_inv[0] = read_reg(th, MANUAL_MODE[0]) & INVERT_MASK; + th->pwm_inv[1] = read_reg(th, MANUAL_MODE[1]) & INVERT_MASK; + /* be sure to really write fan speed the first time */ th->last_speed[0] = -2; th->last_speed[1] = -2; --- linux-fsl-imx51-2.6.31.orig/drivers/macintosh/windfarm_max6690_sensor.c +++ linux-fsl-imx51-2.6.31/drivers/macintosh/windfarm_max6690_sensor.c @@ -88,6 +88,8 @@ return rc; } +static struct i2c_driver wf_max6690_driver; + static struct i2c_client *wf_max6690_create(struct i2c_adapter *adapter, u8 addr, const char *loc) { @@ -119,7 +121,7 @@ * Let i2c-core delete that device on driver removal. * This is safe because i2c-core holds the core_lock mutex for us. */ - list_add_tail(&client->detected, &client->driver->clients); + list_add_tail(&client->detected, &wf_max6690_driver.clients); return client; fail: --- linux-fsl-imx51-2.6.31.orig/drivers/char/synclink_gt.c +++ linux-fsl-imx51-2.6.31/drivers/char/synclink_gt.c @@ -1057,9 +1057,6 @@ unsigned int cmd, unsigned long arg) { struct slgt_info *info = tty->driver_data; - struct mgsl_icount cnow; /* kernel counter temps */ - struct serial_icounter_struct __user *p_cuser; /* user space */ - unsigned long flags; void __user *argp = (void __user *)arg; int ret; @@ -1068,7 +1065,7 @@ DBGINFO(("%s ioctl() cmd=%08X\n", info->device_name, cmd)); if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + (cmd != TIOCMIWAIT)) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -1121,25 +1118,6 @@ case MGSL_IOCWAITGPIO: ret = wait_gpio(info, argp); break; - case TIOCGICOUNT: - spin_lock_irqsave(&info->lock,flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->lock,flags); - p_cuser = argp; - if (put_user(cnow.cts, &p_cuser->cts) || - put_user(cnow.dsr, &p_cuser->dsr) || - put_user(cnow.rng, &p_cuser->rng) || - put_user(cnow.dcd, &p_cuser->dcd) || - put_user(cnow.rx, &p_cuser->rx) || - put_user(cnow.tx, &p_cuser->tx) || - put_user(cnow.frame, &p_cuser->frame) || - put_user(cnow.overrun, &p_cuser->overrun) || - put_user(cnow.parity, &p_cuser->parity) || - put_user(cnow.brk, &p_cuser->brk) || - put_user(cnow.buf_overrun, &p_cuser->buf_overrun)) - ret = -EFAULT; - ret = 0; - break; default: ret = -ENOIOCTLCMD; } @@ -1147,6 +1125,33 @@ return ret; } +static int get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) + +{ + struct slgt_info *info = tty->driver_data; + struct mgsl_icount cnow; /* kernel counter temps */ + unsigned long flags; + + spin_lock_irqsave(&info->lock,flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->lock,flags); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + + return 0; +} + /* * support for 32 bit ioctl calls on 64 bit systems */ @@ -1236,10 +1241,6 @@ case MGSL_IOCSGPIO: case MGSL_IOCGGPIO: case MGSL_IOCWAITGPIO: - case TIOCGICOUNT: - rc = ioctl(tty, file, cmd, (unsigned long)(compat_ptr(arg))); - break; - case MGSL_IOCSTXIDLE: case MGSL_IOCTXENABLE: case MGSL_IOCRXENABLE: @@ -3640,6 +3641,7 @@ .hangup = hangup, .tiocmget = tiocmget, .tiocmset = tiocmset, + .get_icount = get_icount, .proc_fops = &synclink_gt_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/char/tty_io.c +++ linux-fsl-imx51-2.6.31/drivers/char/tty_io.c @@ -96,6 +96,7 @@ #include #include #include +#include #include #include @@ -1184,6 +1185,7 @@ tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios); return 0; } +EXPORT_SYMBOL_GPL(tty_init_termios); /** * tty_driver_install_tty() - install a tty entry in the driver @@ -1404,6 +1406,8 @@ list_del_init(&tty->tty_files); file_list_unlock(); + put_pid(tty->pgrp); + put_pid(tty->session); free_tty_struct(tty); } @@ -1911,8 +1915,10 @@ pid = task_pid(current); type = PIDTYPE_PID; } + get_pid(pid); spin_unlock_irqrestore(&tty->ctrl_lock, flags); retval = __f_setown(filp, pid, type, 0); + put_pid(pid); if (retval) goto out; } else { @@ -2413,6 +2419,20 @@ return tty->ops->tiocmset(tty, file, set, clear); } +static int tty_tiocgicount(struct tty_struct *tty, void __user *arg) +{ + int retval = -EINVAL; + struct serial_icounter_struct icount; + memset(&icount, 0, sizeof(icount)); + if (tty->ops->get_icount) + retval = tty->ops->get_icount(tty, &icount); + if (retval != 0) + return retval; + if (copy_to_user(arg, &icount, sizeof(icount))) + return -EFAULT; + return 0; +} + struct tty_struct *tty_pair_get_tty(struct tty_struct *tty) { if (tty->driver->type == TTY_DRIVER_TYPE_PTY && @@ -2533,6 +2553,12 @@ case TIOCMBIC: case TIOCMBIS: return tty_tiocmset(tty, file, cmd, p); + case TIOCGICOUNT: + retval = tty_tiocgicount(tty, p); + /* For the moment allow fall through to the old method */ + if (retval != -EINVAL) + return retval; + break; case TCFLSH: switch (arg) { case TCIFLUSH: --- linux-fsl-imx51-2.6.31.orig/drivers/char/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/char/Kconfig @@ -431,6 +431,29 @@ If you have an SGI Altix with an attached SABrick say Y or M here, otherwise say N. +config FM_SI4702 + tristate "SI4702 FM device driver" + depends on (MACH_MX31_3DS || MACH_MX35_3DS || MACH_MX37_3DS || MACH_MX51_3DS) + default n + +config MXC_IIM + tristate "MXC IIM device driver" + depends on ARCH_MXC + help + Support for access to MXC IIM device, most people should say N here. + +config MXS_VIIM + tristate "MXS Virtual IIM device driver" + depends on ARCH_STMP3XXX + help + Support for access to MXS Virtual IIM device, most people should say N here. + +config IMX_SIM + tristate "IMX SIM support" + depends on (ARCH_MX51 || MACH_MX25_3DS) + ---help--- + Say Y to enable the SIM driver support. + source "drivers/serial/Kconfig" config UNIX98_PTYS --- linux-fsl-imx51-2.6.31.orig/drivers/char/mxc_iim.c +++ linux-fsl-imx51-2.6.31/drivers/char/mxc_iim.c @@ -0,0 +1,161 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +static unsigned long iim_reg_base, iim_reg_end, iim_reg_size; +static struct clk *iim_clk; +static struct device *iim_dev; + +/*! + * MXC IIM interface - memory map function + * This function maps 4KB IIM registers from IIM base address. + * + * @param file struct file * + * @param vma structure vm_area_struct * + * + * @return Return 0 on success or negative error code on error + */ +static int mxc_iim_mmap(struct file *file, struct vm_area_struct *vma) +{ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Remap-pfn-range will mark the range VM_IO and VM_RESERVED */ + if (remap_pfn_range(vma, + vma->vm_start, + iim_reg_base >> PAGE_SHIFT, + iim_reg_size, + vma->vm_page_prot)) + return -EAGAIN; + + return 0; +} + +/*! + * MXC IIM interface - open function + * + * @param inode struct inode * + * @param filp struct file * + * + * @return Return 0 on success or negative error code on error + */ +static int mxc_iim_open(struct inode *inode, struct file *filp) +{ + iim_clk = clk_get(NULL, "iim_clk"); + if (IS_ERR(iim_clk)) { + dev_err(iim_dev, "No IIM clock defined\n"); + return -ENODEV; + } + clk_enable(iim_clk); + + return 0; +} + +/*! + * MXC IIM interface - release function + * + * @param inode struct inode * + * @param filp struct file * + * + * @return Return 0 on success or negative error code on error + */ +static int mxc_iim_release(struct inode *inode, struct file *filp) +{ + clk_disable(iim_clk); + clk_put(iim_clk); + return 0; +} + +static const struct file_operations mxc_iim_fops = { + .mmap = mxc_iim_mmap, + .open = mxc_iim_open, + .release = mxc_iim_release, +}; + +static struct miscdevice mxc_iim_miscdev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "mxc_iim", + .fops = &mxc_iim_fops, +}; + +/*! + * This function is called by the driver framework to get iim base/end address + * and register iim misc device. + * + * @param dev The device structure for IIM passed in by the driver + * framework. + * + * @return Returns 0 on success or negative error code on error + */ +static int mxc_iim_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret; + + iim_dev = &pdev->dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) { + dev_err(iim_dev, "Unable to get IIM resource\n"); + return -ENODEV; + } + + iim_reg_base = res->start; + iim_reg_end = res->end; + iim_reg_size = iim_reg_end - iim_reg_base + 1; + + ret = misc_register(&mxc_iim_miscdev); + if (ret) + return ret; + + return 0; +} + +static int mxc_iim_remove(struct platform_device *pdev) +{ + misc_deregister(&mxc_iim_miscdev); + return 0; +} + +static struct platform_driver mxc_iim_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "mxc_iim", + }, + .probe = mxc_iim_probe, + .remove = mxc_iim_remove, +}; + +static int __init mxc_iim_dev_init(void) +{ + return platform_driver_register(&mxc_iim_driver); +} + +static void __exit mxc_iim_dev_cleanup(void) +{ + platform_driver_unregister(&mxc_iim_driver); +} + +module_init(mxc_iim_dev_init); +module_exit(mxc_iim_dev_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC IIM driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(MISC_DYNAMIC_MINOR); --- linux-fsl-imx51-2.6.31.orig/drivers/char/synclinkmp.c +++ linux-fsl-imx51-2.6.31/drivers/char/synclinkmp.c @@ -1255,10 +1255,6 @@ unsigned int cmd, unsigned long arg) { SLMP_INFO *info = tty->driver_data; - int error; - struct mgsl_icount cnow; /* kernel counter temps */ - struct serial_icounter_struct __user *p_cuser; /* user space */ - unsigned long flags; void __user *argp = (void __user *)arg; if (debug_level >= DEBUG_LEVEL_INFO) @@ -1269,7 +1265,7 @@ return -ENODEV; if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + (cmd != TIOCMIWAIT)) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -1307,34 +1303,6 @@ * NB: both 1->0 and 0->1 transitions are counted except for * RI where only 0->1 is counted. */ - case TIOCGICOUNT: - spin_lock_irqsave(&info->lock,flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->lock,flags); - p_cuser = argp; - PUT_USER(error,cnow.cts, &p_cuser->cts); - if (error) return error; - PUT_USER(error,cnow.dsr, &p_cuser->dsr); - if (error) return error; - PUT_USER(error,cnow.rng, &p_cuser->rng); - if (error) return error; - PUT_USER(error,cnow.dcd, &p_cuser->dcd); - if (error) return error; - PUT_USER(error,cnow.rx, &p_cuser->rx); - if (error) return error; - PUT_USER(error,cnow.tx, &p_cuser->tx); - if (error) return error; - PUT_USER(error,cnow.frame, &p_cuser->frame); - if (error) return error; - PUT_USER(error,cnow.overrun, &p_cuser->overrun); - if (error) return error; - PUT_USER(error,cnow.parity, &p_cuser->parity); - if (error) return error; - PUT_USER(error,cnow.brk, &p_cuser->brk); - if (error) return error; - PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun); - if (error) return error; - return 0; default: return -ENOIOCTLCMD; } @@ -1351,6 +1319,32 @@ return ret; } +static int get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + SLMP_INFO *info = tty->driver_data; + struct mgsl_icount cnow; /* kernel counter temps */ + unsigned long flags; + + spin_lock_irqsave(&info->lock,flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->lock,flags); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + + return 0; +} + /* * /proc fs routines.... */ @@ -3909,6 +3903,7 @@ .hangup = hangup, .tiocmget = tiocmget, .tiocmset = tiocmset, + .get_icount = get_icount, .proc_fops = &synclinkmp_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/char/pty.c +++ linux-fsl-imx51-2.6.31/drivers/char/pty.c @@ -120,8 +120,10 @@ /* Stuff the data into the input queue of the other end */ c = tty_insert_flip_string(to, buf, c); /* And shovel */ - tty_flip_buffer_push(to); - tty_wakeup(tty); + if (c) { + tty_flip_buffer_push(to); + tty_wakeup(tty); + } } return c; } --- linux-fsl-imx51-2.6.31.orig/drivers/char/synclink.c +++ linux-fsl-imx51-2.6.31/drivers/char/synclink.c @@ -2920,6 +2920,38 @@ } /* end of mgsl_break() */ +/* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ +static int msgl_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) + +{ + struct mgsl_struct * info = tty->driver_data; + struct mgsl_icount cnow; /* kernel counter temps */ + unsigned long flags; + + spin_lock_irqsave(&info->irq_spinlock,flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->irq_spinlock,flags); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + return 0; +} + /* mgsl_ioctl() Service an IOCTL request * * Arguments: @@ -2945,7 +2977,7 @@ return -ENODEV; if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + (cmd != TIOCMIWAIT)) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -2958,11 +2990,7 @@ static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg) { - int error; - struct mgsl_icount cnow; /* kernel counter temps */ void __user *argp = (void __user *)arg; - struct serial_icounter_struct __user *p_cuser; /* user space */ - unsigned long flags; switch (cmd) { case MGSL_IOCGPARAMS: @@ -2991,40 +3019,6 @@ case TIOCMIWAIT: return modem_input_wait(info,(int)arg); - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - spin_lock_irqsave(&info->irq_spinlock,flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->irq_spinlock,flags); - p_cuser = argp; - PUT_USER(error,cnow.cts, &p_cuser->cts); - if (error) return error; - PUT_USER(error,cnow.dsr, &p_cuser->dsr); - if (error) return error; - PUT_USER(error,cnow.rng, &p_cuser->rng); - if (error) return error; - PUT_USER(error,cnow.dcd, &p_cuser->dcd); - if (error) return error; - PUT_USER(error,cnow.rx, &p_cuser->rx); - if (error) return error; - PUT_USER(error,cnow.tx, &p_cuser->tx); - if (error) return error; - PUT_USER(error,cnow.frame, &p_cuser->frame); - if (error) return error; - PUT_USER(error,cnow.overrun, &p_cuser->overrun); - if (error) return error; - PUT_USER(error,cnow.parity, &p_cuser->parity); - if (error) return error; - PUT_USER(error,cnow.brk, &p_cuser->brk); - if (error) return error; - PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun); - if (error) return error; - return 0; default: return -ENOIOCTLCMD; } @@ -4325,6 +4319,7 @@ .hangup = mgsl_hangup, .tiocmget = tiocmget, .tiocmset = tiocmset, + .get_icount = msgl_get_icount, .proc_fops = &mgsl_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/char/random.c +++ linux-fsl-imx51-2.6.31/drivers/char/random.c @@ -1334,330 +1334,14 @@ }; #endif /* CONFIG_SYSCTL */ -/******************************************************************** - * - * Random funtions for networking - * - ********************************************************************/ +static u32 random_int_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned; -/* - * TCP initial sequence number picking. This uses the random number - * generator to pick an initial secret value. This value is hashed - * along with the TCP endpoint information to provide a unique - * starting point for each pair of TCP endpoints. This defeats - * attacks which rely on guessing the initial TCP sequence number. - * This algorithm was suggested by Steve Bellovin. - * - * Using a very strong hash was taking an appreciable amount of the total - * TCP connection establishment time, so this is a weaker hash, - * compensated for by changing the secret periodically. - */ - -/* F, G and H are basic MD4 functions: selection, majority, parity */ -#define F(x, y, z) ((z) ^ ((x) & ((y) ^ (z)))) -#define G(x, y, z) (((x) & (y)) + (((x) ^ (y)) & (z))) -#define H(x, y, z) ((x) ^ (y) ^ (z)) - -/* - * The generic round function. The application is so specific that - * we don't bother protecting all the arguments with parens, as is generally - * good macro practice, in favor of extra legibility. - * Rotation is separate from addition to prevent recomputation - */ -#define ROUND(f, a, b, c, d, x, s) \ - (a += f(b, c, d) + x, a = (a << s) | (a >> (32 - s))) -#define K1 0 -#define K2 013240474631UL -#define K3 015666365641UL - -#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) - -static __u32 twothirdsMD4Transform(__u32 const buf[4], __u32 const in[12]) +static int __init random_int_secret_init(void) { - __u32 a = buf[0], b = buf[1], c = buf[2], d = buf[3]; - - /* Round 1 */ - ROUND(F, a, b, c, d, in[ 0] + K1, 3); - ROUND(F, d, a, b, c, in[ 1] + K1, 7); - ROUND(F, c, d, a, b, in[ 2] + K1, 11); - ROUND(F, b, c, d, a, in[ 3] + K1, 19); - ROUND(F, a, b, c, d, in[ 4] + K1, 3); - ROUND(F, d, a, b, c, in[ 5] + K1, 7); - ROUND(F, c, d, a, b, in[ 6] + K1, 11); - ROUND(F, b, c, d, a, in[ 7] + K1, 19); - ROUND(F, a, b, c, d, in[ 8] + K1, 3); - ROUND(F, d, a, b, c, in[ 9] + K1, 7); - ROUND(F, c, d, a, b, in[10] + K1, 11); - ROUND(F, b, c, d, a, in[11] + K1, 19); - - /* Round 2 */ - ROUND(G, a, b, c, d, in[ 1] + K2, 3); - ROUND(G, d, a, b, c, in[ 3] + K2, 5); - ROUND(G, c, d, a, b, in[ 5] + K2, 9); - ROUND(G, b, c, d, a, in[ 7] + K2, 13); - ROUND(G, a, b, c, d, in[ 9] + K2, 3); - ROUND(G, d, a, b, c, in[11] + K2, 5); - ROUND(G, c, d, a, b, in[ 0] + K2, 9); - ROUND(G, b, c, d, a, in[ 2] + K2, 13); - ROUND(G, a, b, c, d, in[ 4] + K2, 3); - ROUND(G, d, a, b, c, in[ 6] + K2, 5); - ROUND(G, c, d, a, b, in[ 8] + K2, 9); - ROUND(G, b, c, d, a, in[10] + K2, 13); - - /* Round 3 */ - ROUND(H, a, b, c, d, in[ 3] + K3, 3); - ROUND(H, d, a, b, c, in[ 7] + K3, 9); - ROUND(H, c, d, a, b, in[11] + K3, 11); - ROUND(H, b, c, d, a, in[ 2] + K3, 15); - ROUND(H, a, b, c, d, in[ 6] + K3, 3); - ROUND(H, d, a, b, c, in[10] + K3, 9); - ROUND(H, c, d, a, b, in[ 1] + K3, 11); - ROUND(H, b, c, d, a, in[ 5] + K3, 15); - ROUND(H, a, b, c, d, in[ 9] + K3, 3); - ROUND(H, d, a, b, c, in[ 0] + K3, 9); - ROUND(H, c, d, a, b, in[ 4] + K3, 11); - ROUND(H, b, c, d, a, in[ 8] + K3, 15); - - return buf[1] + b; /* "most hashed" word */ - /* Alternative: return sum of all words? */ -} -#endif - -#undef ROUND -#undef F -#undef G -#undef H -#undef K1 -#undef K2 -#undef K3 - -/* This should not be decreased so low that ISNs wrap too fast. */ -#define REKEY_INTERVAL (300 * HZ) -/* - * Bit layout of the tcp sequence numbers (before adding current time): - * bit 24-31: increased after every key exchange - * bit 0-23: hash(source,dest) - * - * The implementation is similar to the algorithm described - * in the Appendix of RFC 1185, except that - * - it uses a 1 MHz clock instead of a 250 kHz clock - * - it performs a rekey every 5 minutes, which is equivalent - * to a (source,dest) tulple dependent forward jump of the - * clock by 0..2^(HASH_BITS+1) - * - * Thus the average ISN wraparound time is 68 minutes instead of - * 4.55 hours. - * - * SMP cleanup and lock avoidance with poor man's RCU. - * Manfred Spraul - * - */ -#define COUNT_BITS 8 -#define COUNT_MASK ((1 << COUNT_BITS) - 1) -#define HASH_BITS 24 -#define HASH_MASK ((1 << HASH_BITS) - 1) - -static struct keydata { - __u32 count; /* already shifted to the final position */ - __u32 secret[12]; -} ____cacheline_aligned ip_keydata[2]; - -static unsigned int ip_cnt; - -static void rekey_seq_generator(struct work_struct *work); - -static DECLARE_DELAYED_WORK(rekey_work, rekey_seq_generator); - -/* - * Lock avoidance: - * The ISN generation runs lockless - it's just a hash over random data. - * State changes happen every 5 minutes when the random key is replaced. - * Synchronization is performed by having two copies of the hash function - * state and rekey_seq_generator always updates the inactive copy. - * The copy is then activated by updating ip_cnt. - * The implementation breaks down if someone blocks the thread - * that processes SYN requests for more than 5 minutes. Should never - * happen, and even if that happens only a not perfectly compliant - * ISN is generated, nothing fatal. - */ -static void rekey_seq_generator(struct work_struct *work) -{ - struct keydata *keyptr = &ip_keydata[1 ^ (ip_cnt & 1)]; - - get_random_bytes(keyptr->secret, sizeof(keyptr->secret)); - keyptr->count = (ip_cnt & COUNT_MASK) << HASH_BITS; - smp_wmb(); - ip_cnt++; - schedule_delayed_work(&rekey_work, - round_jiffies_relative(REKEY_INTERVAL)); -} - -static inline struct keydata *get_keyptr(void) -{ - struct keydata *keyptr = &ip_keydata[ip_cnt & 1]; - - smp_rmb(); - - return keyptr; -} - -static __init int seqgen_init(void) -{ - rekey_seq_generator(NULL); + get_random_bytes(random_int_secret, sizeof(random_int_secret)); return 0; } -late_initcall(seqgen_init); - -#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -__u32 secure_tcpv6_sequence_number(__be32 *saddr, __be32 *daddr, - __be16 sport, __be16 dport) -{ - __u32 seq; - __u32 hash[12]; - struct keydata *keyptr = get_keyptr(); - - /* The procedure is the same as for IPv4, but addresses are longer. - * Thus we must use twothirdsMD4Transform. - */ - - memcpy(hash, saddr, 16); - hash[4] = ((__force u16)sport << 16) + (__force u16)dport; - memcpy(&hash[5], keyptr->secret, sizeof(__u32) * 7); - - seq = twothirdsMD4Transform((const __u32 *)daddr, hash) & HASH_MASK; - seq += keyptr->count; - - seq += ktime_to_ns(ktime_get_real()); - - return seq; -} -EXPORT_SYMBOL(secure_tcpv6_sequence_number); -#endif - -/* The code below is shamelessly stolen from secure_tcp_sequence_number(). - * All blames to Andrey V. Savochkin . - */ -__u32 secure_ip_id(__be32 daddr) -{ - struct keydata *keyptr; - __u32 hash[4]; - - keyptr = get_keyptr(); - - /* - * Pick a unique starting offset for each IP destination. - * The dest ip address is placed in the starting vector, - * which is then hashed with random data. - */ - hash[0] = (__force __u32)daddr; - hash[1] = keyptr->secret[9]; - hash[2] = keyptr->secret[10]; - hash[3] = keyptr->secret[11]; - - return half_md4_transform(hash, keyptr->secret); -} - -#ifdef CONFIG_INET - -__u32 secure_tcp_sequence_number(__be32 saddr, __be32 daddr, - __be16 sport, __be16 dport) -{ - __u32 seq; - __u32 hash[4]; - struct keydata *keyptr = get_keyptr(); - - /* - * Pick a unique starting offset for each TCP connection endpoints - * (saddr, daddr, sport, dport). - * Note that the words are placed into the starting vector, which is - * then mixed with a partial MD4 over random data. - */ - hash[0] = (__force u32)saddr; - hash[1] = (__force u32)daddr; - hash[2] = ((__force u16)sport << 16) + (__force u16)dport; - hash[3] = keyptr->secret[11]; - - seq = half_md4_transform(hash, keyptr->secret) & HASH_MASK; - seq += keyptr->count; - /* - * As close as possible to RFC 793, which - * suggests using a 250 kHz clock. - * Further reading shows this assumes 2 Mb/s networks. - * For 10 Mb/s Ethernet, a 1 MHz clock is appropriate. - * For 10 Gb/s Ethernet, a 1 GHz clock should be ok, but - * we also need to limit the resolution so that the u32 seq - * overlaps less than one time per MSL (2 minutes). - * Choosing a clock of 64 ns period is OK. (period of 274 s) - */ - seq += ktime_to_ns(ktime_get_real()) >> 6; - - return seq; -} - -/* Generate secure starting point for ephemeral IPV4 transport port search */ -u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport) -{ - struct keydata *keyptr = get_keyptr(); - u32 hash[4]; - - /* - * Pick a unique starting offset for each ephemeral port search - * (saddr, daddr, dport) and 48bits of random data. - */ - hash[0] = (__force u32)saddr; - hash[1] = (__force u32)daddr; - hash[2] = (__force u32)dport ^ keyptr->secret[10]; - hash[3] = keyptr->secret[11]; - - return half_md4_transform(hash, keyptr->secret); -} -EXPORT_SYMBOL_GPL(secure_ipv4_port_ephemeral); - -#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, - __be16 dport) -{ - struct keydata *keyptr = get_keyptr(); - u32 hash[12]; - - memcpy(hash, saddr, 16); - hash[4] = (__force u32)dport; - memcpy(&hash[5], keyptr->secret, sizeof(__u32) * 7); - - return twothirdsMD4Transform((const __u32 *)daddr, hash); -} -#endif - -#if defined(CONFIG_IP_DCCP) || defined(CONFIG_IP_DCCP_MODULE) -/* Similar to secure_tcp_sequence_number but generate a 48 bit value - * bit's 32-47 increase every key exchange - * 0-31 hash(source, dest) - */ -u64 secure_dccp_sequence_number(__be32 saddr, __be32 daddr, - __be16 sport, __be16 dport) -{ - u64 seq; - __u32 hash[4]; - struct keydata *keyptr = get_keyptr(); - - hash[0] = (__force u32)saddr; - hash[1] = (__force u32)daddr; - hash[2] = ((__force u16)sport << 16) + (__force u16)dport; - hash[3] = keyptr->secret[11]; - - seq = half_md4_transform(hash, keyptr->secret); - seq |= ((u64)keyptr->count) << (32 - HASH_BITS); - - seq += ktime_to_ns(ktime_get_real()); - seq &= (1ull << 48) - 1; - - return seq; -} -EXPORT_SYMBOL(secure_dccp_sequence_number); -#endif - -#endif /* CONFIG_INET */ - +late_initcall(random_int_secret_init); /* * Get a random word for internal kernel use only. Similar to urandom but @@ -1665,17 +1349,15 @@ * value is not cryptographically secure but for several uses the cost of * depleting entropy is too high */ -DEFINE_PER_CPU(__u32 [4], get_random_int_hash); +DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash); unsigned int get_random_int(void) { - struct keydata *keyptr; __u32 *hash = get_cpu_var(get_random_int_hash); - int ret; + unsigned int ret; - keyptr = get_keyptr(); hash[0] += current->pid + jiffies + get_cycles(); - - ret = half_md4_transform(hash, keyptr->secret); + md5_transform(hash, random_int_secret); + ret = hash[0]; put_cpu_var(get_random_int_hash); return ret; --- linux-fsl-imx51-2.6.31.orig/drivers/char/mxs_viim.c +++ linux-fsl-imx51-2.6.31/drivers/char/mxs_viim.c @@ -0,0 +1,175 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +static unsigned long iim_reg_base0, iim_reg_end0, iim_reg_size0; +static unsigned long iim_reg_base1, iim_reg_end1, iim_reg_size1; +static struct device *iim_dev; + +/*! + * MXS Virtual IIM interface - memory map function + * This function maps one page size VIIM registers from VIIM base address0 + * if the size of the required virtual memory space is less than or equal to + * one page size, otherwise this function will also map one page size VIIM + * registers from VIIM base address1. + * + * @param file struct file * + * @param vma structure vm_area_struct * + * + * @return Return 0 on success or negative error code on error + */ +static int mxs_viim_mmap(struct file *file, struct vm_area_struct *vma) +{ + size_t size = vma->vm_end - vma->vm_start; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + /* Remap-pfn-range will mark the range VM_IO and VM_RESERVED */ + if (remap_pfn_range(vma, + vma->vm_start, + iim_reg_base0 >> PAGE_SHIFT, + iim_reg_size0, + vma->vm_page_prot)) + return -EAGAIN; + + if (size > iim_reg_size0) { + if (remap_pfn_range(vma, + vma->vm_start + iim_reg_size0, + iim_reg_base1 >> PAGE_SHIFT, + iim_reg_size1, + vma->vm_page_prot)) + return -EAGAIN; + } + + return 0; +} + +/*! + * MXS Virtual IIM interface - open function + * + * @param inode struct inode * + * @param filp struct file * + * + * @return Return 0 on success or negative error code on error + */ +static int mxs_viim_open(struct inode *inode, struct file *filp) +{ + return 0; +} + +/*! + * MXS Virtual IIM interface - release function + * + * @param inode struct inode * + * @param filp struct file * + * + * @return Return 0 on success or negative error code on error + */ +static int mxs_viim_release(struct inode *inode, struct file *filp) +{ + return 0; +} + +static const struct file_operations mxs_viim_fops = { + .mmap = mxs_viim_mmap, + .open = mxs_viim_open, + .release = mxs_viim_release, +}; + +static struct miscdevice mxs_viim_miscdev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "mxs_viim", + .fops = &mxs_viim_fops, +}; + +/*! + * This function is called by the driver framework to get virtual iim base/end + * address and register iim misc device. + * + * @param dev The device structure for Virtual IIM passed in by the + * driver framework. + * + * @return Returns 0 on success or negative error code on error + */ +static int mxs_viim_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret; + + iim_dev = &pdev->dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) { + dev_err(iim_dev, "Unable to get Virtual IIM resource 0\n"); + return -ENODEV; + } + + iim_reg_base0 = res->start; + iim_reg_end0 = res->end; + iim_reg_size0 = iim_reg_end0 - iim_reg_base0 + 1; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (IS_ERR(res)) { + dev_err(iim_dev, "Unable to get Virtual IIM resource 1\n"); + return -ENODEV; + } + + iim_reg_base1 = res->start; + iim_reg_end1 = res->end; + iim_reg_size1 = iim_reg_end1 - iim_reg_base1 + 1; + + ret = misc_register(&mxs_viim_miscdev); + if (ret) + return ret; + + return 0; +} + +static int mxs_viim_remove(struct platform_device *pdev) +{ + misc_deregister(&mxs_viim_miscdev); + return 0; +} + +static struct platform_driver mxs_viim_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "mxs_viim", + }, + .probe = mxs_viim_probe, + .remove = mxs_viim_remove, +}; + +static int __init mxs_viim_dev_init(void) +{ + return platform_driver_register(&mxs_viim_driver); +} + +static void __exit mxs_viim_dev_cleanup(void) +{ + platform_driver_unregister(&mxs_viim_driver); +} + +module_init(mxs_viim_dev_init); +module_exit(mxs_viim_dev_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXS Virtual IIM driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(MISC_DYNAMIC_MINOR); --- linux-fsl-imx51-2.6.31.orig/drivers/char/n_tty.c +++ linux-fsl-imx51-2.6.31/drivers/char/n_tty.c @@ -272,7 +272,8 @@ * * This is a helper function that handles one output character * (including special characters like TAB, CR, LF, etc.), - * putting the results in the tty driver's write buffer. + * doing OPOST processing and putting the results in the + * tty driver's write buffer. * * Note that Linux currently ignores TABDLY, CRDLY, VTDLY, FFDLY * and NLDLY. They simply aren't relevant in the world today. @@ -350,8 +351,9 @@ * @c: character (or partial unicode symbol) * @tty: terminal device * - * Perform OPOST processing. Returns -1 when the output device is - * full and the character must be retried. + * Output one character with OPOST processing. + * Returns -1 when the output device is full and the character + * must be retried. * * Locking: output_lock to protect column state and space left * (also, this is called from n_tty_write under the @@ -377,8 +379,11 @@ /** * process_output_block - block post processor * @tty: terminal device - * @inbuf: user buffer - * @nr: number of bytes + * @buf: character buffer + * @nr: number of bytes to output + * + * Output a block of characters with OPOST processing. + * Returns the number of characters output. * * This path is used to speed up block console writes, among other * things when processing blocks of output data. It handles only @@ -571,33 +576,23 @@ break; default: - if (iscntrl(op)) { - if (L_ECHOCTL(tty)) { - /* - * Ensure there is enough space - * for the whole ctrl pair. - */ - if (space < 2) { - no_space_left = 1; - break; - } - tty_put_char(tty, '^'); - tty_put_char(tty, op ^ 0100); - tty->column += 2; - space -= 2; - } else { - if (!space) { - no_space_left = 1; - break; - } - tty_put_char(tty, op); - space--; - } - } /* - * If above falls through, this was an - * undefined op. + * If the op is not a special byte code, + * it is a ctrl char tagged to be echoed + * as "^X" (where X is the letter + * representing the control char). + * Note that we must ensure there is + * enough space for the whole ctrl pair. + * */ + if (space < 2) { + no_space_left = 1; + break; + } + tty_put_char(tty, '^'); + tty_put_char(tty, op ^ 0100); + tty->column += 2; + space -= 2; cp += 2; nr -= 2; } @@ -605,12 +600,18 @@ if (no_space_left) break; } else { - int retval; - - retval = do_output_char(c, tty, space); - if (retval < 0) - break; - space -= retval; + if (O_OPOST(tty) && + !(test_bit(TTY_HW_COOK_OUT, &tty->flags))) { + int retval = do_output_char(c, tty, space); + if (retval < 0) + break; + space -= retval; + } else { + if (!space) + break; + tty_put_char(tty, c); + space -= 1; + } cp += 1; nr -= 1; } @@ -798,8 +799,8 @@ * Echo user input back onto the screen. This must be called only when * L_ECHO(tty) is true. Called from the driver receive_buf path. * - * This variant tags control characters to be possibly echoed as - * as "^X" (where X is the letter representing the control char). + * This variant tags control characters to be echoed as "^X" + * (where X is the letter representing the control char). * * Locking: echo_lock to protect the echo buffer */ @@ -812,7 +813,7 @@ add_echo_byte(ECHO_OP_START, tty); add_echo_byte(ECHO_OP_START, tty); } else { - if (iscntrl(c) && c != '\t') + if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t') add_echo_byte(ECHO_OP_START, tty); add_echo_byte(c, tty); } --- linux-fsl-imx51-2.6.31.orig/drivers/char/mxc_si4702.c +++ linux-fsl-imx51-2.6.31/drivers/char/mxc_si4702.c @@ -0,0 +1,1221 @@ +/* + * linux/drivers/char/mxc_si4702.c + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SI4702_DEV_NAME "si4702" +#define DEV_MAJOR 0 /* this could be module param */ +#define DEV_MINOR 0 +#define DEV_BASE_MINOR 0 +#define DEV_MINOR_COUNT 256 +#define SI4702_I2C_ADDR 0x10 /* 7bits I2C address */ +#define DELAY_WAIT 0xffff /* loop_counter max value */ +/* register define */ +#define SI4702_DEVICEID 0x00 +#define SI4702_CHIPID 0x01 +#define SI4702_POWERCFG 0x02 +#define SI4702_CHANNEL 0x03 +#define SI4702_SYSCONFIG1 0x04 +#define SI4702_SYSCONFIG2 0x05 +#define SI4702_SYSCONFIG3 0x06 +#define SI4702_TEST1 0x07 +#define SI4702_TEST2 0x08 +#define SI4702_B00TCONFIG 0x09 +#define SI4702_STATUSRSSI 0x0A +#define SI4702_READCHAN 0x0B +#define SI4702_REG_NUM 0x10 +#define SI4702_REG_BYTE (SI4702_REG_NUM * 2) +#define SI4702_DEVICE_ID 0x1242 +#define SI4702_RW_REG_NUM (SI4702_STATUSRSSI - SI4702_POWERCFG) +#define SI4702_RW_OFFSET \ + (SI4702_REG_NUM - SI4702_STATUSRSSI + SI4702_POWERCFG) + +#define SI4702_SPACE_MASK 0x0030 +#define SI4702_SPACE_200K 0x0 +#define SI4702_SPACE_100K 0x10 +#define SI4702_SPACE_50K 0x20 + +#define SI4702_BAND_MASK 0x00c0 +#define SI4702_BAND_LSB 6 + +#define SI4702_SEEKTH_MASK 0xff00 +#define SI4702_SEEKTH_LSB 8 + +#define SI4702_SNR_MASK 0x00f0 +#define SI4702_SNR_LSB 4 + +#define SI4702_CNT_MASK 0x000f +#define SI4702_CNT_LSB 0 + +#define SI4702_VOL_MASK 0x000f +#define SI4702_VOL_LSB 0 + +#define SI4702_CHAN_MASK 0x03ff +#define SI4702_TUNE_BIT 0x8000 +#define SI4702_STC_BIT 0x4000 +#define SI4702_DMUTE_BIT 0x4000 +#define SI4702_SEEKUP_BIT 0x0200 +#define SI4702_SEEK_BIT 0x0100 +#define SI4702_SF_BIT 0x2000 +#define SI4702_ENABLE_BIT 0x0001 +#define SI4702_DISABLE_BIT 0x0040 + +enum { + BAND_USA = 0, + BAND_JAP_W, + BAND_JAP +}; + +struct si4702_info { + int min_band; + int max_band; + int space; + int volume; + int channel; + int mute; +}; + +struct si4702_drvdata { + struct regulator *vio; + struct regulator *vdd; + struct class *radio_class; + struct si4702_info info; + /*by default, dev major is zero, and it's alloc dynamicaly. */ + int major; + int minor; + struct cdev *cdev; + int count; /* open count */ + struct i2c_client *client; + unsigned char reg_rw_buf[SI4702_REG_BYTE]; + struct mxc_fm_platform_data *plat_data; +}; + +static struct si4702_drvdata *si4702_drvdata; + +DEFINE_SPINLOCK(count_lock); + +#ifdef DEBUG +static void si4702_dump_reg(void) +{ + int i, j; + unsigned char *reg_rw_buf; + + if (NULL == si4702_drvdata) + return; + + reg_rw_buf = si4702_drvdata->reg_rw_buf; + + for (i = 0; i < 10; i++) { + j = i * 2 + 12; + pr_debug("reg[%02d] = %04x\n", i, + ((reg_rw_buf[j] << 8) & 0xFF00) + + (reg_rw_buf[j + 1] & 0x00FF)); + } + for (; i < 16; i++) { + j = (i - 10) * 2; + pr_debug("reg[%02d] = %04x\n", i, + ((reg_rw_buf[j] << 8) & 0xFF00) + + (reg_rw_buf[j + 1] & 0x00FF)); + } +} +#else +static void si4702_dump_reg(void) +{ +} +#endif /* DEBUG */ + +/* + *check the si4702 spec for the read/write concequence. + * + *0 2 A F0 A F + *------------------------------- + * buf:0 2 A F + */ +#define REG_to_BUF(reg) (((reg >= 0) && (reg < SI4702_STATUSRSSI))?\ + (reg - SI4702_STATUSRSSI + SI4702_REG_NUM):\ + ((reg >= SI4702_STATUSRSSI) && (reg < SI4702_REG_NUM))?\ + (reg - SI4702_STATUSRSSI) : -1) + +static int si4702_read_reg(const int reg, u16 *value) +{ + int ret, index; + unsigned char *reg_rw_buf; + + if (NULL == si4702_drvdata) + return -1; + + reg_rw_buf = si4702_drvdata->reg_rw_buf; + + index = REG_to_BUF(reg); + + if (-1 == index) + return -1; + + ret = + i2c_master_recv(si4702_drvdata->client, reg_rw_buf, + SI4702_REG_BYTE); + + *value = (reg_rw_buf[index * 2] << 8) & 0xFF00; + *value |= reg_rw_buf[index * 2 + 1] & 0x00FF; + + return ret < 0 ? ret : 0; +} + +static int si4702_write_reg(const int reg, const u16 value) +{ + int index, ret; + unsigned char *reg_rw_buf; + + if (NULL == si4702_drvdata) + return -1; + + reg_rw_buf = si4702_drvdata->reg_rw_buf; + + index = REG_to_BUF(reg); + + if (-1 == index) + return -1; + + reg_rw_buf[index * 2] = (value & 0xFF00) >> 8; + reg_rw_buf[index * 2 + 1] = value & 0x00FF; + + ret = i2c_master_send(si4702_drvdata->client, + ®_rw_buf[SI4702_RW_OFFSET * 2], + (SI4702_STATUSRSSI - SI4702_POWERCFG) * 2); + return ret < 0 ? ret : 0; +} + +static void si4702_gpio_get(void) +{ + if (NULL == si4702_drvdata) + return; + + si4702_drvdata->plat_data->gpio_get(); +} + +static void si4702_gpio_put(void) +{ + if (NULL == si4702_drvdata) + return; + + si4702_drvdata->plat_data->gpio_put(); +} + +static void si4702_reset(void) +{ + if (NULL == si4702_drvdata) + return; + + si4702_drvdata->plat_data->reset(); +} + +static void si4702_clock_en(int flag) +{ + if (NULL == si4702_drvdata) + return; + + si4702_drvdata->plat_data->clock_ctl(flag); +} + +static int si4702_id_detect(struct i2c_client *client) +{ + int ret, index; + unsigned int ID = 0; + unsigned char reg_rw_buf[SI4702_REG_BYTE]; + + si4702_gpio_get(); + si4702_reset(); + si4702_clock_en(1); + + ret = i2c_master_recv(client, (char *)reg_rw_buf, SI4702_REG_BYTE); + + si4702_gpio_put(); + + if (ret < 0) + return ret; + + index = REG_to_BUF(SI4702_DEVICEID); + if (index < 0) + return index; + + ID = (reg_rw_buf[index * 2] << 8) & 0xFF00; + ID |= reg_rw_buf[index * 2 + 1] & 0x00FF; + + return ID; +} + +/* valid args 50/100/200 */ +static int si4702_set_space(int space) +{ + u16 reg; + int ret; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + ret = si4702_read_reg(SI4702_SYSCONFIG2, ®); + if (ret == -1) + return ret; + + reg &= ~SI4702_SPACE_MASK; + switch (space) { + case 50: + reg |= SI4702_SPACE_50K; + break; + case 100: + reg |= SI4702_SPACE_100K; + break; + case 200: + ret |= SI4702_SPACE_200K; + break; + default: + return -1; + } + + ret = si4702_write_reg(SI4702_SYSCONFIG2, reg); + if (ret == -1) + return ret; + + info = &si4702_drvdata->info; + info->space = space; + return 0; +} + +static int si4702_set_band_range(int band) +{ + u16 reg; + int ret, band_min, band_max; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + switch (band) { + case BAND_USA: + band_min = 87500; + band_max = 108000; + break; + case BAND_JAP_W: + band_min = 76000; + band_max = 108000; + break; + case BAND_JAP: + band_min = 76000; + band_max = 90000; + break; + default: + return -1; + } + + ret = si4702_read_reg(SI4702_SYSCONFIG2, ®); + if (ret == -1) + return ret; + + reg = (reg & ~SI4702_BAND_MASK) + | ((band << SI4702_BAND_LSB) & SI4702_BAND_MASK); + ret = si4702_write_reg(SI4702_SYSCONFIG2, reg); + if (ret == -1) + return ret; + + info = &si4702_drvdata->info; + info->min_band = band_min; + info->max_band = band_max; + return 0; +} + +static int si4702_set_seekth(u8 seekth) +{ + u16 reg; + int ret; + + if (NULL == si4702_drvdata) + return -1; + + ret = si4702_read_reg(SI4702_SYSCONFIG2, ®); + if (ret == -1) + return ret; + + reg = + (reg & ~SI4702_SEEKTH_MASK) | ((seekth << SI4702_SEEKTH_LSB) & + SI4702_SEEKTH_MASK); + ret = si4702_write_reg(SI4702_SYSCONFIG2, reg); + if (ret == -1) + return ret; + + return 0; +} + +static int si4702_set_sksnr(u8 sksnr) +{ + u16 reg; + int ret; + + if (NULL == si4702_drvdata) + return -1; + + ret = si4702_read_reg(SI4702_SYSCONFIG3, ®); + if (ret == -1) + return ret; + + reg = + (reg & ~SI4702_SNR_MASK) | ((sksnr << SI4702_SNR_LSB) & + SI4702_SNR_MASK); + ret = si4702_write_reg(SI4702_SYSCONFIG3, reg); + if (ret == -1) + return ret; + + return 0; +} + +static int si4702_set_skcnt(u8 skcnt) +{ + u16 reg; + int ret; + + if (NULL == si4702_drvdata) + return -1; + + ret = si4702_read_reg(SI4702_SYSCONFIG3, ®); + if (ret == -1) + return ret; + + reg = (reg & ~SI4702_CNT_MASK) | (skcnt & SI4702_CNT_MASK); + ret = si4702_write_reg(SI4702_SYSCONFIG3, reg); + if (ret == -1) + return ret; + + return 0; +} + +static int si4702_set_vol(int vol) +{ + u16 reg; + int ret; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + ret = si4702_read_reg(SI4702_SYSCONFIG2, ®); + if (ret == -1) + return ret; + + reg = (reg & ~SI4702_VOL_MASK) | (vol & SI4702_VOL_MASK); + ret = si4702_write_reg(SI4702_SYSCONFIG2, reg); + if (ret == -1) + return ret; + + info = &si4702_drvdata->info; + info->volume = vol; + + return 0; +} + +static u8 si4702_channel_select(u32 freq) +{ + u16 loop_counter = 0; + s16 channel; + u16 si4702_reg_data; + u8 error_ind = 0; + struct i2c_client *client; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + info = &si4702_drvdata->info; + client = si4702_drvdata->client; + + dev_info(&client->dev, "Input frequnce is %d\n", freq); + if (freq < 76000 || freq > 108000) { + dev_err(&client->dev, "Input frequnce is invalid\n"); + return -1; + } + /* convert freq to channel */ + channel = (freq - info->min_band) / info->space; + + si4702_reg_data = SI4702_TUNE_BIT | (channel & SI4702_CHAN_MASK); + /* set channel */ + error_ind = si4702_write_reg(SI4702_CHANNEL, si4702_reg_data); + if (error_ind) { + dev_err(&client->dev, "Failed to set channel\n"); + return -1; + } + dev_info(&client->dev, "Set channel to %d\n", channel); + + /* wait for STC == 1 */ + do { + error_ind = + si4702_read_reg(SI4702_STATUSRSSI, &si4702_reg_data); + + if (error_ind) { + dev_err(&client->dev, "Failed to read setted STC\n"); + return -1; + } + if ((si4702_reg_data & SI4702_STC_BIT) != 0) + break; + } while (++loop_counter < DELAY_WAIT); + + /* check loop_counter */ + if (loop_counter >= DELAY_WAIT) { + dev_err(&client->dev, "Can't wait for STC bit set"); + return -1; + } + dev_info(&client->dev, "loop counter %d\n", loop_counter); + + loop_counter = 0; + /* clear tune bit */ + error_ind = si4702_write_reg(SI4702_CHANNEL, 0); + + if (error_ind) { + dev_err(&client->dev, "Failed to set stop tune\n"); + return -1; + } + + /* wait for STC == 0 */ + do { + error_ind = + si4702_read_reg(SI4702_STATUSRSSI, &si4702_reg_data); + + if (error_ind) { + dev_err(&client->dev, "Failed to set read STC\n"); + return -1; + } + if ((si4702_reg_data & SI4702_STC_BIT) == 0) + break; + } while (++loop_counter < DELAY_WAIT); + + /* check loop_counter */ + if (loop_counter >= DELAY_WAIT) { + dev_err(&client->dev, "Can't wait for STC bit clean"); + return -1; + } + dev_info(&client->dev, "loop counter %d\n", loop_counter); + + /* read RSSI */ + error_ind = si4702_read_reg(SI4702_READCHAN, &si4702_reg_data); + + if (error_ind) { + dev_err(&client->dev, "Failed to read RSSI\n"); + return -1; + } + + channel = si4702_reg_data & SI4702_CHAN_MASK; + dev_info(&client->dev, "seek finish: channel(%d)\n", channel); + + return 0; +} + +static s32 si4702_channel_seek(s16 dir) +{ + u16 loop_counter = 0; + u16 si4702_reg_data, reg_power_cfg; + u8 error_ind = 0; + u32 channel, freq; + struct i2c_client *client; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + info = &si4702_drvdata->info; + client = si4702_drvdata->client; + + error_ind = si4702_read_reg(SI4702_POWERCFG, ®_power_cfg); + + if (info->mute) { + /* check disable mute */ + reg_power_cfg &= ~SI4702_DMUTE_BIT; + } else { + reg_power_cfg |= SI4702_DMUTE_BIT; + } + + if (dir) { + reg_power_cfg |= SI4702_SEEKUP_BIT; + } else { + reg_power_cfg &= ~SI4702_SEEKUP_BIT; + } + /* start seek */ + reg_power_cfg |= SI4702_SEEK_BIT; + error_ind = si4702_write_reg(SI4702_POWERCFG, reg_power_cfg); + + if (error_ind) { + dev_err(&client->dev, "Failed to set seek start bit\n"); + return -1; + } + + /* wait STC == 1 */ + do { + error_ind = + si4702_read_reg(SI4702_STATUSRSSI, &si4702_reg_data); + if (error_ind) { + dev_err(&client->dev, "Failed to read STC bit\n"); + return -1; + } + + if ((si4702_reg_data & SI4702_STC_BIT) != 0) + break; + } while (++loop_counter < DELAY_WAIT); + + /* clear seek bit */ + reg_power_cfg &= ~SI4702_SEEK_BIT; + error_ind = si4702_write_reg(SI4702_POWERCFG, reg_power_cfg); + if (error_ind) { + dev_err(&client->dev, "Failed to stop seek\n"); + return -1; + } + + if (loop_counter >= DELAY_WAIT) { + dev_err(&client->dev, "Can't wait for STC bit set\n"); + return -1; + } + + /* check whether SF==1 (seek failed bit) */ + if ((si4702_reg_data & SI4702_SF_BIT) != 0) { + dev_err(&client->dev, "Failed to seek any channel\n"); + return -1; + } + + loop_counter = 0; + /* wait STC == 0 */ + do { + error_ind = + si4702_read_reg(SI4702_STATUSRSSI, &si4702_reg_data); + + if (error_ind) { + dev_err(&client->dev, + "Failed to wait STC bit to clear\n"); + return -1; + } + if ((si4702_reg_data & SI4702_STC_BIT) == 0) + break; + } while (++loop_counter < DELAY_WAIT); + + /* check loop_counter */ + if (loop_counter >= DELAY_WAIT) { + dev_err(&client->dev, "Can't wait for STC bit clean"); + return -1; + } + + error_ind = si4702_read_reg(SI4702_READCHAN, &si4702_reg_data); + + if (error_ind) { + dev_err(&client->dev, "I2C simulate failed\n"); + return -1; + } + + channel = si4702_reg_data & SI4702_CHAN_MASK; + freq = channel * info->space + info->min_band; + dev_err(&client->dev, + "seek finish: channel(%d), freq(%dKHz)\n", channel, freq); + + return 0; +} + +static int si4702_startup(void) +{ + u16 magic = 0, id; + struct i2c_client *client; + struct mxc_fm_platform_data *data; + + if (NULL == si4702_drvdata) + return -1; + + if (si4702_drvdata->vio) + regulator_enable(si4702_drvdata->vio); + if (si4702_drvdata->vdd) + regulator_enable(si4702_drvdata->vdd); + data = si4702_drvdata->plat_data; + client = si4702_drvdata->client; + + /* read prior to write, otherwise write op will fail */ + si4702_read_reg(SI4702_DEVICEID, &id); + dev_err(&client->dev, "si4702: DEVICEID: 0x%x\n", id); + + si4702_clock_en(1); + msleep(100); + + /* disable mute, stereo, seek down, powerup */ + si4702_write_reg(SI4702_POWERCFG, SI4702_DMUTE_BIT | SI4702_ENABLE_BIT); + msleep(500); + si4702_read_reg(SI4702_TEST1, &magic); + if (magic != 0x3C04) + dev_err(&client->dev, "magic number 0x%x.\n", magic); + /* close tune, set channel to 0 */ + si4702_write_reg(SI4702_CHANNEL, 0); + /* disable interrupt, disable GPIO */ + si4702_write_reg(SI4702_SYSCONFIG1, 0); + /* set volume to middle level */ + si4702_set_vol(0xf); + + si4702_set_space(data->space); + si4702_set_band_range(data->band); + si4702_set_seekth(data->seekth); + si4702_set_skcnt(data->skcnt); + si4702_set_sksnr(data->sksnr); + + return 0; +} + +static void si4702_shutdown(void) +{ + if (NULL == si4702_drvdata) + return; + + si4702_write_reg(SI4702_POWERCFG, SI4702_DMUTE_BIT | + SI4702_ENABLE_BIT | SI4702_DISABLE_BIT); + msleep(100); + si4702_clock_en(0); + + if (si4702_drvdata->vdd) + regulator_disable(si4702_drvdata->vdd); + if (si4702_drvdata->vio) + regulator_disable(si4702_drvdata->vio); +} + +enum { + FM_STARTUP = 0, + FM_SHUTDOWN, + FM_RESET, + FM_VOLUP, + FM_VOLDOWN, + FM_SEEK_UP, + FM_SEEK_DOWN, + FM_MUTEON, + FM_MUTEDIS, + FM_SEL, + FM_SEEKTH, + FM_DL, + FM_CTL_MAX +}; + +static const char *const fm_control[FM_CTL_MAX] = { + [FM_STARTUP] = "start", + [FM_SHUTDOWN] = "halt", + [FM_RESET] = "reset", + [FM_VOLUP] = "volup", + [FM_VOLDOWN] = "voldown", + [FM_SEEK_UP] = "seeku", + [FM_SEEK_DOWN] = "seekd", + [FM_MUTEON] = "mute", + [FM_MUTEDIS] = "muted", + [FM_SEL] = "select", + [FM_SEEKTH] = "seekth", + [FM_DL] = "delay" +}; + +static int cmd(unsigned int index, int arg) +{ + struct i2c_client *client; + struct mxc_fm_platform_data *plat_data; + + if (NULL == si4702_drvdata) + return -1; + + client = si4702_drvdata->client; + plat_data = si4702_drvdata->plat_data; + + switch (index) { + case FM_SHUTDOWN: + dev_err(&client->dev, "FM_SHUTDOWN\n"); + si4702_shutdown(); + break; + case FM_STARTUP: + dev_err(&client->dev, "FM_STARTUP\n"); + si4702_reset(); + si4702_startup(); + break; + case FM_RESET: + dev_err(&client->dev, "FM_RESET\n"); + si4702_reset(); + break; + case FM_SEEK_DOWN: + dev_err(&client->dev, "SEEK DOWN\n"); + si4702_channel_seek(0); + break; + case FM_SEEK_UP: + dev_err(&client->dev, "SEEK UP\n"); + si4702_channel_seek(1); + break; + case FM_SEL: + dev_err(&client->dev, "select %d\n", arg * 100); + si4702_channel_select(arg * 100); + break; + case FM_SEEKTH: + dev_err(&client->dev, "seekth = %d\n", arg); + si4702_set_seekth(arg); + break; + case FM_DL: + dev_err(&client->dev, "delay = %d\n", arg); + break; + default: + dev_err(&client->dev, "error command\n"); + break; + } + return 0; +} + +static ssize_t si4702_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct si4702_drvdata *drv_data = dev_get_drvdata(dev); + u16 device_id; + + dev_err(&(drv_data->client->dev), "si4702 show\n"); + si4702_read_reg(SI4702_DEVICEID, &device_id); + pr_info("device id %x\n", device_id); + si4702_dump_reg(); + return 0; +} + +static ssize_t si4702_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + int state = 0; + const char *const *s; + char *p = NULL; + int error; + int len, arg = 0; + struct si4702_drvdata *drv_data = dev_get_drvdata(dev); + struct i2c_client *client = drv_data->client; + + dev_err(&client->dev, "si4702 store %d\n", count); + + p = memchr(buf, ' ', count); + if (p) { + len = p - buf; + *p = '\0'; + } else + len = count; + + len -= 1; + dev_err(&client->dev, "cmd %s\n", buf); + + for (s = &fm_control[state]; state < FM_CTL_MAX; s++, state++) { + if (*s && !strncmp(buf, *s, len)) { + break; + } + } + if (state < FM_CTL_MAX && *s) { + if (p) + arg = simple_strtoul(p + 1, NULL, 0); + dev_err(&client->dev, "arg = %d\n", arg); + error = cmd(state, arg); + } else { + dev_err(&client->dev, "error cmd\n"); + error = -EINVAL; + } + + return error ? error : count; +} + +static int ioctl_si4702(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + void __user *argp = (void __user *)arg; + int mute = 0; + u16 data; + int error; + u8 volume; + unsigned int freq; + int dir; + struct i2c_client *client; + struct si4702_info *info; + + if (NULL == si4702_drvdata) + return -1; + + info = &si4702_drvdata->info; + client = si4702_drvdata->client; + + dev_err(&client->dev, "ioctl, cmd: 0x%x, arg: 0x%lx\n", cmd, arg); + + switch (cmd) { + case SI4702_SETVOLUME: + /* get volume from user */ + if (copy_from_user(&volume, argp, sizeof(u8))) { + + dev_err(&client->dev, + "ioctl, copy volume value from user failed\n"); + return -EFAULT; + } + dev_err(&client->dev, "volume %d\n", volume); + /* refill the register value */ + volume &= 0x0f; + if (info->mute) + error = si4702_write_reg(SI4702_POWERCFG, 0x0001); + else + error = si4702_write_reg(SI4702_POWERCFG, 0x4001); + + error = si4702_write_reg(SI4702_CHANNEL, 0); + error = si4702_write_reg(SI4702_SYSCONFIG1, 0); + error = si4702_write_reg(SI4702_SYSCONFIG2, 0x0f10 | volume); + if (error) { + dev_err(&client->dev, "ioctl, set volume failed\n"); + return -EFAULT; + } + /* renew the device info */ + info->volume = volume; + + break; + case SI4702_GETVOLUME: + /* just copy volume value to user */ + if (copy_to_user(argp, &(info->volume), sizeof(unsigned int))) { + dev_err(&client->dev, "ioctl, copy to user failed\n"); + return -EFAULT; + } + break; + case SI4702_MUTEON: + mute = 1; + case SI4702_MUTEOFF: + if (mute) { + /* enable mute */ + si4702_read_reg(SI4702_POWERCFG, &data); + data &= 0x00FF; + error = si4702_write_reg(SI4702_POWERCFG, data); + } else { + si4702_read_reg(SI4702_POWERCFG, &data); + data &= 0x00FF; + data |= 0x4000; + error = si4702_write_reg(SI4702_POWERCFG, data); + } + if (error) { + dev_err(&client->dev, "ioctl, set mute failed\n"); + return -EFAULT; + } + break; + case SI4702_SELECT: + if (copy_from_user(&freq, argp, sizeof(unsigned int))) { + + dev_err(&client->dev, + "ioctl, copy frequence from user failed\n"); + return -EFAULT; + } + /* check frequence */ + if (freq > info->max_band || freq < info->min_band) { + dev_err(&client->dev, + "the frequence select is out of band\n"); + return -EINVAL; + } + if (si4702_channel_select(freq)) { + dev_err(&client->dev, + "ioctl, failed to select channel\n"); + return -EFAULT; + } + break; + case SI4702_SEEK: + if (copy_from_user(&dir, argp, sizeof(int))) { + + dev_err(&client->dev, "ioctl, copy from user failed\n"); + return -EFAULT; + } + /* get seeked channel */ + dir = si4702_channel_seek(dir); + if (dir == -1) { + return -EAGAIN; + } else if (dir == -2) { + return -EFAULT; + } + if (copy_to_user(argp, &dir, sizeof(int))) { + + dev_err(&client->dev, + "ioctl, copy seek frequnce to user failed\n"); + return -EFAULT; + } + break; + default: + dev_err(&client->dev, "SI4702: Invalid ioctl command\n"); + return -EINVAL; + + } + return 0; +} + +static int open_si4702(struct inode *inode, struct file *file) +{ + struct i2c_client *client; + + if (NULL == si4702_drvdata) + return -1; + + client = si4702_drvdata->client; + + spin_lock(&count_lock); + if (si4702_drvdata->count != 0) { + dev_err(&client->dev, "device has been open already\n"); + spin_unlock(&count_lock); + return -EBUSY; + } + si4702_drvdata->count++; + spin_unlock(&count_lock); + + /* request and active GPIO */ + si4702_gpio_get(); + /* reset the si4702 from it's reset pin */ + si4702_reset(); + + /* startup si4702 */ + if (si4702_startup()) { + spin_lock(&count_lock); + si4702_drvdata->count--; + spin_unlock(&count_lock); + return -ENODEV; + } + + return 0; +} + +static int release_si4702(struct inode *inode, struct file *file) +{ + struct i2c_client *client; + + if (NULL == si4702_drvdata) + return -1; + + client = si4702_drvdata->client; + + dev_err(&client->dev, "release\n"); + /* software shutdown */ + si4702_shutdown(); + /* inactive, free GPIO, cut power */ + si4702_gpio_put(); + + spin_lock(&count_lock); + si4702_drvdata->count--; + spin_unlock(&count_lock); + + return 0; +} + +static int si4702_suspend(struct i2c_client *client, pm_message_t state) +{ + return 0; +} + +static int si4702_resume(struct i2c_client *client) +{ + return 0; +} + +static struct device_attribute si4702_dev_attr = { + .attr = { + .name = "si4702_ctl", + .mode = S_IRUSR | S_IWUSR, + }, + .show = si4702_show, + .store = si4702_store, +}; + +static struct file_operations si4702_fops = { + .owner = THIS_MODULE, + .open = open_si4702, + .release = release_si4702, + .ioctl = ioctl_si4702, +}; + +static int __devinit si4702_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret = 0; + struct mxc_fm_platform_data *plat_data; + struct si4702_drvdata *drv_data; + struct device *dev; + + dev_info(&client->dev, "si4702 device probe process start.\n"); + + plat_data = (struct mxc_fm_platform_data *)client->dev.platform_data; + if (plat_data == NULL) { + dev_err(&client->dev, "lack of platform data!\n"); + return -ENODEV; + } + + drv_data = kmalloc(sizeof(struct si4702_drvdata), GFP_KERNEL); + if (drv_data == NULL) { + dev_err(&client->dev, "lack of kernel memory!\n"); + return -ENOMEM; + } + memset(drv_data, 0, sizeof(struct si4702_drvdata)); + drv_data->plat_data = plat_data; + drv_data->major = DEV_MAJOR; + drv_data->minor = DEV_MINOR; + drv_data->count = 0; + + /*enable power supply */ + if (plat_data->reg_vio != NULL) { + drv_data->vio = regulator_get(&client->dev, plat_data->reg_vio); + if (drv_data->vio == ERR_PTR(-ENOENT)) + goto free_drv_data; + regulator_enable(drv_data->vio); + } + + /* here, we assume that vio and vdd are not the same */ + if (plat_data->reg_vdd != NULL) { + drv_data->vdd = regulator_get(&client->dev, plat_data->reg_vdd); + if (drv_data->vdd == ERR_PTR(-ENOENT)) + goto disable_vio; + regulator_enable(drv_data->vdd); + } + + /*attach client and check device id */ + if (SI4702_DEVICE_ID != si4702_id_detect(client)) { + dev_err(&client->dev, "id wrong.\n"); + goto disable_vdd; + } + dev_info(&client->dev, "chip id %x detect.\n", SI4702_DEVICE_ID); + drv_data->client = client; + + /*user interface begain */ + /*create device file in sysfs as a user interface, + * also for debug support */ + ret = device_create_file(&client->dev, &si4702_dev_attr); + if (ret) { + dev_err(&client->dev, "create device file failed!\n"); + goto gpio_put; /* shall i use some meanful error code? */ + } + + /*create a char dev for application code access */ + if (drv_data->major) { + ret = register_chrdev(drv_data->major, "si4702", &si4702_fops);; + } else { + ret = register_chrdev(0, "si4702", &si4702_fops); + } + + if (drv_data->major == 0) + drv_data->major = ret; + + /* create class and device for udev information */ + drv_data->radio_class = class_create(THIS_MODULE, "radio"); + if (IS_ERR(drv_data->radio_class)) { + dev_err(&client->dev, "SI4702: failed to create radio class\n"); + goto char_dev_remove; + } + + dev = device_create(drv_data->radio_class, NULL, + MKDEV(drv_data->major, drv_data->minor), NULL, "si4702"); + if (IS_ERR(dev)) { + dev_err(&client->dev, + "SI4702: failed to create radio class device\n"); + goto class_remove; + } + /*User interface end */ + dev_set_drvdata(&client->dev, drv_data); + si4702_drvdata = drv_data; + + si4702_gpio_get(); + dev_info(&client->dev, "si4702 device probe successfully.\n"); + si4702_shutdown(); + + return 0; + +class_remove: + class_destroy(drv_data->radio_class); +char_dev_remove: + unregister_chrdev(drv_data->major, "si4702"); + device_remove_file(&client->dev, &si4702_dev_attr); +gpio_put: + si4702_gpio_put(); +disable_vdd: + if (plat_data->reg_vdd) { + regulator_disable(drv_data->vdd); + regulator_put(drv_data->vdd); + } +disable_vio: + if (plat_data->reg_vio) { + regulator_disable(drv_data->vio); + regulator_put(drv_data->vio); + } + +free_drv_data: + kfree(drv_data); + + return -ENODEV; +} + +static int __devexit si4702_remove(struct i2c_client *client) +{ + struct mxc_fm_platform_data *plat_data; + struct si4702_drvdata *drv_data = dev_get_drvdata(&client->dev); + + plat_data = (struct mxc_fm_platform_data *)client->dev.platform_data; + + device_destroy(drv_data->radio_class, + MKDEV(drv_data->major, drv_data->minor)); + class_destroy(drv_data->radio_class); + + unregister_chrdev(drv_data->major, "si4702"); + device_remove_file(&client->dev, &si4702_dev_attr); + si4702_gpio_put(); + + if (plat_data->reg_vdd) + regulator_put(drv_data->vdd); + + if (plat_data->reg_vio) + regulator_put(drv_data->vio); + + kfree(si4702_drvdata); + si4702_drvdata = NULL; + + return 0; +} + +static const struct i2c_device_id si4702_id[] = { + {"si4702", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, si4702_id); + +static struct i2c_driver i2c_si4702_driver = { + .driver = { + .name = "si4702", + }, + .probe = si4702_probe, + .remove = si4702_remove, + .suspend = si4702_suspend, + .resume = si4702_resume, + .id_table = si4702_id, +}; + +static int __init init_si4702(void) +{ + /*add to i2c driver */ + pr_info("add si4702 i2c driver\n"); + return i2c_add_driver(&i2c_si4702_driver); +} + +static void __exit exit_si4702(void) +{ + i2c_del_driver(&i2c_si4702_driver); +} + +module_init(init_si4702); +module_exit(exit_si4702); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("SI4702 FM driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/char/tty_buffer.c +++ linux-fsl-imx51-2.6.31/drivers/char/tty_buffer.c @@ -402,28 +402,26 @@ container_of(work, struct tty_struct, buf.work.work); unsigned long flags; struct tty_ldisc *disc; - struct tty_buffer *tbuf, *head; - char *char_buf; - unsigned char *flag_buf; disc = tty_ldisc_ref(tty); if (disc == NULL) /* !TTY_LDISC */ return; spin_lock_irqsave(&tty->buf.lock, flags); - /* So we know a flush is running */ - set_bit(TTY_FLUSHING, &tty->flags); - head = tty->buf.head; - if (head != NULL) { - tty->buf.head = NULL; - for (;;) { - int count = head->commit - head->read; + + if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) { + struct tty_buffer *head; + while ((head = tty->buf.head) != NULL) { + int count; + char *char_buf; + unsigned char *flag_buf; + + count = head->commit - head->read; if (!count) { if (head->next == NULL) break; - tbuf = head; - head = head->next; - tty_buffer_free(tty, tbuf); + tty->buf.head = head->next; + tty_buffer_free(tty, head); continue; } /* Ldisc or user is trying to flush the buffers @@ -445,9 +443,9 @@ flag_buf, count); spin_lock_irqsave(&tty->buf.lock, flags); } - /* Restore the queue head */ - tty->buf.head = head; + clear_bit(TTY_FLUSHING, &tty->flags); } + /* We may have a deferred request to flush the input buffer, if so pull the chain under the lock and empty the queue */ if (test_bit(TTY_FLUSHPENDING, &tty->flags)) { @@ -455,7 +453,6 @@ clear_bit(TTY_FLUSHPENDING, &tty->flags); wake_up(&tty->read_wait); } - clear_bit(TTY_FLUSHING, &tty->flags); spin_unlock_irqrestore(&tty->buf.lock, flags); tty_ldisc_deref(disc); --- linux-fsl-imx51-2.6.31.orig/drivers/char/Makefile +++ linux-fsl-imx51-2.6.31/drivers/char/Makefile @@ -9,6 +9,11 @@ obj-y += mem.o random.o tty_io.o n_tty.o tty_ioctl.o tty_ldisc.o tty_buffer.o tty_port.o +obj-$(CONFIG_FM_SI4702) += mxc_si4702.o +obj-$(CONFIG_MXC_IIM) += mxc_iim.o +obj-$(CONFIG_MXS_VIIM) += mxs_viim.o +obj-$(CONFIG_IMX_SIM) += imx_sim.o + obj-$(CONFIG_LEGACY_PTYS) += pty.o obj-$(CONFIG_UNIX98_PTYS) += pty.o obj-y += misc.o @@ -97,7 +102,6 @@ obj-$(CONFIG_CS5535_GPIO) += cs5535_gpio.o obj-$(CONFIG_GPIO_TB0219) += tb0219.o obj-$(CONFIG_TELCLOCK) += tlclk.o - obj-$(CONFIG_MWAVE) += mwave/ obj-$(CONFIG_AGP) += agp/ obj-$(CONFIG_PCMCIA) += pcmcia/ --- linux-fsl-imx51-2.6.31.orig/drivers/char/nozomi.c +++ linux-fsl-imx51-2.6.31/drivers/char/nozomi.c @@ -1782,24 +1782,24 @@ return ret; } -static int ntty_ioctl_tiocgicount(struct port *port, void __user *argp) +static int ntty_tiocgicount(struct tty_struct *tty, + struct serial_icounter_struct *icount) { + struct port *port = tty->driver_data; const struct async_icount cnow = port->tty_icount; - struct serial_icounter_struct icount; - - icount.cts = cnow.cts; - icount.dsr = cnow.dsr; - icount.rng = cnow.rng; - icount.dcd = cnow.dcd; - icount.rx = cnow.rx; - icount.tx = cnow.tx; - icount.frame = cnow.frame; - icount.overrun = cnow.overrun; - icount.parity = cnow.parity; - icount.brk = cnow.brk; - icount.buf_overrun = cnow.buf_overrun; - return copy_to_user(argp, &icount, sizeof(icount)) ? -EFAULT : 0; + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + return 0; } static int ntty_ioctl(struct tty_struct *tty, struct file *file, @@ -1818,9 +1818,7 @@ rval = wait_event_interruptible(port->tty_wait, ntty_cflags_changed(port, arg, &cprev)); break; - } case TIOCGICOUNT: - rval = ntty_ioctl_tiocgicount(port, argp); - break; + } default: DBG1("ERR: 0x%08X, %d", cmd, cmd); break; @@ -1894,6 +1892,7 @@ .chars_in_buffer = ntty_chars_in_buffer, .tiocmget = ntty_tiocmget, .tiocmset = ntty_tiocmset, + .get_icount = ntty_tiocgicount, }; /* Module initialization */ --- linux-fsl-imx51-2.6.31.orig/drivers/char/tty_ldisc.c +++ linux-fsl-imx51-2.6.31/drivers/char/tty_ldisc.c @@ -516,7 +516,7 @@ static int tty_ldisc_halt(struct tty_struct *tty) { clear_bit(TTY_LDISC, &tty->flags); - return cancel_delayed_work(&tty->buf.work); + return cancel_delayed_work_sync(&tty->buf.work); } /** @@ -754,12 +754,9 @@ * N_TTY. */ if (tty->driver->flags & TTY_DRIVER_RESET_TERMIOS) { - /* Make sure the old ldisc is quiescent */ - tty_ldisc_halt(tty); - flush_scheduled_work(); - /* Avoid racing set_ldisc or tty_ldisc_release */ mutex_lock(&tty->ldisc_mutex); + tty_ldisc_halt(tty); if (tty->ldisc) { /* Not yet closed */ /* Switch back to N_TTY */ tty_ldisc_reinit(tty); --- linux-fsl-imx51-2.6.31.orig/drivers/char/keyboard.c +++ linux-fsl-imx51-2.6.31/drivers/char/keyboard.c @@ -1068,6 +1068,8 @@ int code; switch (keycode) { + case KEY_RESERVED: + break; case KEY_PAUSE: put_queue(vc, 0xe1); put_queue(vc, 0x1d | up_flag); @@ -1125,6 +1127,8 @@ static int emulate_raw(struct vc_data *vc, unsigned int keycode, unsigned char up_flag) { + if (keycode == KEY_RESERVED) + return 0; if (keycode > 127) return -1; @@ -1249,7 +1253,7 @@ if (keycode >= NR_KEYS) if (keycode >= KEY_BRL_DOT1 && keycode <= KEY_BRL_DOT8) - keysym = K(KT_BRL, keycode - KEY_BRL_DOT1 + 1); + keysym = U(K(KT_BRL, keycode - KEY_BRL_DOT1 + 1)); else return; else --- linux-fsl-imx51-2.6.31.orig/drivers/char/amiserial.c +++ linux-fsl-imx51-2.6.31/drivers/char/amiserial.c @@ -1262,6 +1262,36 @@ return 0; } +/* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ +static int rs_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + struct async_struct *info = tty->driver_data; + struct async_icount cnow; + unsigned long flags; + + local_irq_save(flags); + cnow = info->state->icount; + local_irq_restore(flags); + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + + return 0; +} static int rs_ioctl(struct tty_struct *tty, struct file * file, unsigned int cmd, unsigned long arg) @@ -1331,31 +1361,6 @@ } /* NOTREACHED */ - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - local_irq_save(flags); - cnow = info->state->icount; - local_irq_restore(flags); - icount.cts = cnow.cts; - icount.dsr = cnow.dsr; - icount.rng = cnow.rng; - icount.dcd = cnow.dcd; - icount.rx = cnow.rx; - icount.tx = cnow.tx; - icount.frame = cnow.frame; - icount.overrun = cnow.overrun; - icount.parity = cnow.parity; - icount.brk = cnow.brk; - icount.buf_overrun = cnow.buf_overrun; - - if (copy_to_user(argp, &icount, sizeof(icount))) - return -EFAULT; - return 0; case TIOCSERGWILD: case TIOCSERSWILD: /* "setserial -W" is called in Debian boot */ @@ -1948,6 +1953,7 @@ .wait_until_sent = rs_wait_until_sent, .tiocmget = rs_tiocmget, .tiocmset = rs_tiocmset, + .get_icount = rs_get_icount, .proc_fops = &rs_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/char/vt_ioctl.c +++ linux-fsl-imx51-2.6.31/drivers/char/vt_ioctl.c @@ -36,6 +36,8 @@ #include #include +#define max_font_size 65536 + char vt_dont_switch; extern struct tty_driver *console_driver; @@ -1262,6 +1264,7 @@ static void complete_change_console(struct vc_data *vc) { unsigned char old_vc_mode; + struct vc_data *oldvc = vc_cons[fg_console].d; last_console = fg_console; @@ -1270,9 +1273,31 @@ * KD_TEXT mode or vice versa, which means we need to blank or * unblank the screen later. */ - old_vc_mode = vc_cons[fg_console].d->vc_mode; + old_vc_mode = oldvc->vc_mode; + +#if defined(CONFIG_VGA_CONSOLE) + if (old_vc_mode == KD_TEXT && oldvc->vc_sw == &vga_con && + oldvc->vc_sw->con_font_get) { + if (!oldvc->vc_font.data) + oldvc->vc_font.data = kmalloc(max_font_size, + GFP_KERNEL); + lock_kernel(); + oldvc->vc_sw->con_font_get(oldvc, &oldvc->vc_font); + unlock_kernel(); + } +#endif switch_screen(vc); +#if defined(CONFIG_VGA_CONSOLE) + if (vc->vc_mode == KD_TEXT && vc->vc_sw == &vga_con && + vc->vc_sw->con_font_set) { + if (vc->vc_font.data) { + lock_kernel(); + vc->vc_sw->con_font_set(vc, &vc->vc_font, 0); + unlock_kernel(); + } + } +#endif /* * This can't appear below a successful kill_pid(). If it did, * then the *blank_screen operation could occur while X, having --- linux-fsl-imx51-2.6.31.orig/drivers/char/hvc_xen.c +++ linux-fsl-imx51-2.6.31/drivers/char/hvc_xen.c @@ -55,7 +55,7 @@ notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); } -static int write_console(uint32_t vtermno, const char *data, int len) +static int __write_console(const char *data, int len) { struct xencons_interface *intf = xencons_interface(); XENCONS_RING_IDX cons, prod; @@ -76,6 +76,29 @@ return sent; } +static int write_console(uint32_t vtermno, const char *data, int len) +{ + int ret = len; + + /* + * Make sure the whole buffer is emitted, polling if + * necessary. We don't ever want to rely on the hvc daemon + * because the most interesting console output is when the + * kernel is crippled. + */ + while (len) { + int sent = __write_console(data, len); + + data += sent; + len -= sent; + + if (unlikely(len)) + HYPERVISOR_sched_op(SCHEDOP_yield, NULL); + } + + return ret; +} + static int read_console(uint32_t vtermno, char *buf, int len) { struct xencons_interface *intf = xencons_interface(); --- linux-fsl-imx51-2.6.31.orig/drivers/char/mxser.c +++ linux-fsl-imx51-2.6.31/drivers/char/mxser.c @@ -1733,7 +1733,7 @@ return 0; } - if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && + if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && test_bit(TTY_IO_ERROR, &tty->flags)) return -EIO; @@ -1763,32 +1763,6 @@ return wait_event_interruptible(info->delta_msr_wait, mxser_cflags_changed(info, arg, &cnow)); - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: { - struct serial_icounter_struct icnt = { 0 }; - spin_lock_irqsave(&info->slock, flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->slock, flags); - - icnt.frame = cnow.frame; - icnt.brk = cnow.brk; - icnt.overrun = cnow.overrun; - icnt.buf_overrun = cnow.buf_overrun; - icnt.parity = cnow.parity; - icnt.rx = cnow.rx; - icnt.tx = cnow.tx; - icnt.cts = cnow.cts; - icnt.dsr = cnow.dsr; - icnt.rng = cnow.rng; - icnt.dcd = cnow.dcd; - - return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0; - } case MOXA_HighSpeedOn: return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); case MOXA_SDS_RSTICOUNTER: @@ -1859,6 +1833,39 @@ return 0; } + /* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ + +static int mxser_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) + +{ + struct mxser_port *info = tty->driver_data; + struct async_icount cnow; + unsigned long flags; + + spin_lock_irqsave(&info->slock, flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->slock, flags); + + icount->frame = cnow.frame; + icount->brk = cnow.brk; + icount->overrun = cnow.overrun; + icount->buf_overrun = cnow.buf_overrun; + icount->parity = cnow.parity; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + return 0; +} + static void mxser_stoprx(struct tty_struct *tty) { struct mxser_port *info = tty->driver_data; @@ -2355,6 +2362,7 @@ .wait_until_sent = mxser_wait_until_sent, .tiocmget = mxser_tiocmget, .tiocmset = mxser_tiocmset, + .get_icount = mxser_get_icount, }; struct tty_port_operations mxser_port_ops = { --- linux-fsl-imx51-2.6.31.orig/drivers/char/imx_sim.c +++ linux-fsl-imx51-2.6.31/drivers/char/imx_sim.c @@ -0,0 +1,1497 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_sim.c + * + * @brief Driver for Freescale IMX SIM interface + * + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define SIM_INTERNAL_CLK 0 +#define SIM_RFU -1 + +/* Default communication parameters: FI=372, DI=1, PI1=5V, II=50mA, WWT=10 */ +#define SIM_PARAM_DEFAULT { 0, 1, 1, 5, 1, 0, 0, 0, 10 } + +/* Transmit and receive buffer sizes */ +#define SIM_XMT_BUFFER_SIZE 256 +#define SIM_RCV_BUFFER_SIZE 256 + +/* Interface character references */ +#define SIM_IFC_TXI(letter, number) (letter + number * 4) +#define SIM_IFC_TA1 SIM_IFC_TXI(0, 0) +#define SIM_IFC_TB1 SIM_IFC_TXI(0, 1) +#define SIM_IFC_TC1 SIM_IFC_TXI(0, 2) +#define SIM_IFC_TD1 SIM_IFC_TXI(0, 3) +#define SIM_IFC_TA2 SIM_IFC_TXI(1, 0) +#define SIM_IFC_TB2 SIM_IFC_TXI(1, 1) +#define SIM_IFC_TC2 SIM_IFC_TXI(1, 2) +#define SIM_IFC_TD2 SIM_IFC_TXI(1, 3) +#define SIM_IFC_TA3 SIM_IFC_TXI(2, 0) +#define SIM_IFC_TB3 SIM_IFC_TXI(2, 1) +#define SIM_IFC_TC3 SIM_IFC_TXI(2, 2) +#define SIM_IFC_TD3 SIM_IFC_TXI(2, 3) +#define SIM_IFC_TA4 SIM_IFC_TXI(3, 0) +#define SIM_IFC_TB4 SIM_IFC_TXI(3, 1) +#define SIM_IFC_TC4 SIM_IFC_TXI(3, 2) +#define SIM_IFC_TD4 SIM_IFC_TXI(3, 3) + +/* ATR and OPS states */ +#define SIM_STATE_REMOVED 0 +#define SIM_STATE_OPERATIONAL_IDLE 1 +#define SIM_STATE_OPERATIONAL_COMMAND 2 +#define SIM_STATE_OPERATIONAL_RESPONSE 3 +#define SIM_STATE_OPERATIONAL_STATUS1 4 +#define SIM_STATE_OPERATIONAL_STATUS2 5 +#define SIM_STATE_OPERATIONAL_PTS 6 +#define SIM_STATE_DETECTED_ATR_T0 7 +#define SIM_STATE_DETECTED_ATR_TS 8 +#define SIM_STATE_DETECTED_ATR_TXI 9 +#define SIM_STATE_DETECTED_ATR_THB 10 +#define SIM_STATE_DETECTED_ATR_TCK 11 + +/* Definitions of the offset of the SIM hardware registers */ +#define PORT1_CNTL 0x00 /* 00 */ +#define SETUP 0x04 /* 04 */ +#define PORT1_DETECT 0x08 /* 08 */ +#define PORT1_XMT_BUF 0x0C /* 0c */ +#define PORT1_RCV_BUF 0x10 /* 10 */ +#define PORT0_CNTL 0x14 /* 14 */ +#define CNTL 0x18 /* 18 */ +#define CLK_PRESCALER 0x1C /* 1c */ +#define RCV_THRESHOLD 0x20 /* 20 */ +#define ENABLE 0x24 /* 24 */ +#define XMT_STATUS 0x28 /* 28 */ +#define RCV_STATUS 0x2C /* 2c */ +#define INT_MASK 0x30 /* 30 */ +#define PORTO_XMT_BUF 0x34 /* 34 */ +#define PORT0_RCV_BUF 0x38 /* 38 */ +#define PORT0_DETECT 0x3C /* 3c */ +#define DATA_FORMAT 0x40 /* 40 */ +#define XMT_THRESHOLD 0x44 /* 44 */ +#define GUARD_CNTL 0x48 /* 48 */ +#define OD_CONFIG 0x4C /* 4c */ +#define RESET_CNTL 0x50 /* 50 */ +#define CHAR_WAIT 0x54 /* 54 */ +#define GPCNT 0x58 /* 58 */ +#define DIVISOR 0x5C /* 5c */ +#define BWT 0x60 /* 60 */ +#define BGT 0x64 /* 64 */ +#define BWT_H 0x68 /* 68 */ +#define XMT_FIFO_STAT 0x6C /* 6c */ +#define RCV_FIFO_CNT 0x70 /* 70 */ +#define RCV_FIFO_WPTR 0x74 /* 74 */ +#define RCV_FIFO_RPTR 0x78 /* 78 */ + +/* SIM port[0|1]_cntl register bits */ +#define SIM_PORT_CNTL_SFPD (1<<7) +#define SIM_PORT_CNTL_3VOLT (1<<6) +#define SIM_PORT_CNTL_SCSP (1<<5) +#define SIM_PORT_CNTL_SCEN (1<<4) +#define SIM_PORT_CNTL_SRST (1<<3) +#define SIM_PORT_CNTL_STEN (1<<2) +#define SIM_PORT_CNTL_SVEN (1<<1) +#define SIM_PORT_CNTL_SAPD (1<<0) + +/* SIM od_config register bits */ +#define SIM_OD_CONFIG_OD_P1 (1<<1) +#define SIM_OD_CONFIG_OD_P0 (1<<0) + +/* SIM enable register bits */ +#define SIM_ENABLE_XMTEN (1<<1) +#define SIM_ENABLE_RCVEN (1<<0) + +/* SIM int_mask register bits */ +#define SIM_INT_MASK_RFEM (1<<13) +#define SIM_INT_MASK_BGTM (1<<12) +#define SIM_INT_MASK_BWTM (1<<11) +#define SIM_INT_MASK_RTM (1<<10) +#define SIM_INT_MASK_CWTM (1<<9) +#define SIM_INT_MASK_GPCM (1<<8) +#define SIM_INT_MASK_TDTFM (1<<7) +#define SIM_INT_MASK_TFOM (1<<6) +#define SIM_INT_MASK_XTM (1<<5) +#define SIM_INT_MASK_TFEIM (1<<4) +#define SIM_INT_MASK_ETCIM (1<<3) +#define SIM_INT_MASK_OIM (1<<2) +#define SIM_INT_MASK_TCIM (1<<1) +#define SIM_INT_MASK_RIM (1<<0) + +/* SIM xmt_status register bits */ +#define SIM_XMT_STATUS_GPCNT (1<<8) +#define SIM_XMT_STATUS_TDTF (1<<7) +#define SIM_XMT_STATUS_TFO (1<<6) +#define SIM_XMT_STATUS_TC (1<<5) +#define SIM_XMT_STATUS_ETC (1<<4) +#define SIM_XMT_STATUS_TFE (1<<3) +#define SIM_XMT_STATUS_XTE (1<<0) + +/* SIM rcv_status register bits */ +#define SIM_RCV_STATUS_BGT (1<<11) +#define SIM_RCV_STATUS_BWT (1<<10) +#define SIM_RCV_STATUS_RTE (1<<9) +#define SIM_RCV_STATUS_CWT (1<<8) +#define SIM_RCV_STATUS_CRCOK (1<<7) +#define SIM_RCV_STATUS_LRCOK (1<<6) +#define SIM_RCV_STATUS_RDRF (1<<5) +#define SIM_RCV_STATUS_RFD (1<<4) +#define SIM_RCV_STATUS_RFE (1<<1) +#define SIM_RCV_STATUS_OEF (1<<0) + +/* SIM cntl register bits */ +#define SIM_CNTL_BWTEN (1<<15) +#define SIM_CNTL_XMT_CRC_LRC (1<<14) +#define SIM_CNTL_CRCEN (1<<13) +#define SIM_CNTL_LRCEN (1<<12) +#define SIM_CNTL_CWTEN (1<<11) +#define SIM_CNTL_SAMPLE12 (1<<4) +#define SIM_CNTL_ONACK (1<<3) +#define SIM_CNTL_ANACK (1<<2) +#define SIM_CNTL_ICM (1<<1) +#define SIM_CNTL_GPCNT_CLK_SEL(x) ((x&0x03)<<9) +#define SIM_CNTL_GPCNT_CLK_SEL_MASK (0x03<<9) +#define SIM_CNTL_BAUD_SEL(x) ((x&0x07)<<6) +#define SIM_CNTL_BAUD_SEL_MASK (0x07<<6) + +/* SIM rcv_threshold register bits */ +#define SIM_RCV_THRESHOLD_RTH(x) ((x&0x0f)<<9) +#define SIM_RCV_THRESHOLD_RTH_MASK (0x0f<<9) +#define SIM_RCV_THRESHOLD_RDT(x) ((x&0x1ff)<<0) +#define SIM_RCV_THRESHOLD_RDT_MASK (0x1ff<<0) + +/* SIM xmt_threshold register bits */ +#define SIM_XMT_THRESHOLD_XTH(x) ((x&0x0f)<<4) +#define SIM_XMT_THRESHOLD_XTH_MASK (0x0f<<4) +#define SIM_XMT_THRESHOLD_TDT(x) ((x&0x0f)<<0) +#define SIM_XMT_THRESHOLD_TDT_MASK (0x0f<<0) + +/* SIM guard_cntl register bits */ +#define SIM_GUARD_CNTL_RCVR11 (1<<8) +#define SIM_GIARD_CNTL_GETU(x) (x&0xff) +#define SIM_GIARD_CNTL_GETU_MASK (0xff) + +/* SIM port[0|]_detect register bits */ +#define SIM_PORT_DETECT_SPDS (1<<3) +#define SIM_PORT_DETECT_SPDP (1<<2) +#define SIM_PORT_DETECT_SDI (1<<1) +#define SIM_PORT_DETECT_SDIM (1<<0) + +/* END of REGS definitions */ + +/* ATR parser data (the parser state is stored in the main device structure) */ +typedef struct { + uint8_t T0; /* ATR T0 */ + uint8_t TS; /* ATR TS */ + /* ATR TA1, TB1, TC1, TD1, TB1, ... , TD4 */ + uint8_t TXI[16]; + uint8_t THB[15]; /* ATR historical bytes */ + uint8_t TCK; /* ATR checksum */ + uint16_t ifc_valid; /* valid interface characters */ + uint8_t ifc_current_valid; /* calid ifcs in the current batch */ + uint8_t cnt; /* number of current batch */ + uint8_t num_hb; /* number of historical bytes */ +} sim_atrparser_t; + +/* Main SIM driver structure */ +typedef struct { + /* card inserted = 1, ATR received = 2, card removed = 0 */ + int present; + /* current ATR or OPS state */ + int state; + /* current power state */ + int power; + /* error code occured during transfer */ + int errval; + struct clk *clk; /* Clock id */ + uint8_t clk_flag; + struct resource *res; /* IO map memory */ + void __iomem *ioaddr; /* Mapped address */ + int ipb_irq; /* sim ipb IRQ num */ + int dat_irq; /* sim dat IRQ num */ + /* parser for incoming ATR stream */ + sim_atrparser_t atrparser; + /* raw ATR stream received */ + sim_atr_t atr; + /* communication parameters according to ATR */ + sim_param_t param_atr; + /* current communication parameters */ + sim_param_t param; + /* current TPDU or PTS transfer */ + sim_xfer_t xfer; + /* transfer is on the way = 1, idle = 2 */ + int xfer_ongoing; + /* remaining bytes to transmit for the current transfer */ + int xmt_remaining; + /* transmit position */ + int xmt_pos; + /* receive position / number of bytes received */ + int rcv_count; + uint8_t rcv_buffer[SIM_RCV_BUFFER_SIZE]; + uint8_t xmt_buffer[SIM_XMT_BUFFER_SIZE]; + /* transfer completion notifier */ + struct completion xfer_done; + /* async notifier for card and ATR detection */ + struct fasync_struct *fasync; + /* Platform specific data */ + struct mxc_sim_platform_data *plat_data; +} sim_t; + +static int sim_param_F[] = { + SIM_INTERNAL_CLK, 372, 558, 744, 1116, 1488, 1860, SIM_RFU, + SIM_RFU, 512, 768, 1024, 1536, 2048, SIM_RFU, SIM_RFU +}; + +static int sim_param_D[] = { + SIM_RFU, 64 * 1, 64 * 2, 64 * 4, 64 * 8, 64 * 16, SIM_RFU, SIM_RFU, + SIM_RFU, SIM_RFU, 64 * 1 / 2, 64 * 1 / 4, 64 * 1 / 8, 64 * 1 / 16, + 64 * 1 / 32, 64 * 1 / 64 +}; + +static struct miscdevice sim_dev; + +/* Function: sim_calc_param + * + * Description: determine register values depending on communication parameters + * + * Parameters: + * uint32_t fi ATR frequency multiplier index + * uint32_t di ATR frequency divider index + * uint32_t* ptr_divisor location to store divisor result + * uint32_t* ptr_sample12 location to store sample12 result + * + * Return Values: + * SIM_OK calculation finished without errors + * -SIM_E_PARAM_DIVISOR_RANGE calculated divisor > 255 + * -SIM_E_PARAM_FBYD_NOTDIVBY8OR12 F/D not divisable by 12 (as required) + * -SIM_E_PARAM_FBYD_WITHFRACTION F/D has a remainder + * -SIM_E_PARAM_DI_INVALID frequency multiplyer index not supported + * -SIM_E_PARAM_FI_INVALID frequency divider index not supported + */ + +static int sim_calc_param(uint32_t fi, uint32_t di, uint32_t *ptr_divisor, + uint32_t *ptr_sample12) +{ + int32_t errval = SIM_OK; + int32_t f = sim_param_F[fi]; + int32_t d = sim_param_D[di]; + int32_t stage2_fra = (64 * f) % d; + int32_t stage2_div = (64 * f) / d; + uint32_t sample12 = 1; + uint32_t divisor = 31; + + pr_debug("%s entering.\n", __func__); + if ((f > 0) || (d > 0)) { + if (stage2_fra == 0) { + if ((stage2_div % 12) == 0) { + sample12 = 1; + divisor = stage2_div / 12; + } else if ((stage2_div % 8) == 0) { + sample12 = 0; + divisor = stage2_div / 8; + } else + sample12 = -1; + if (sample12 >= 0) { + if (divisor < 256) { + pr_debug("fi=%i", fi); + pr_debug("di=%i", di); + pr_debug("f=%i", f); + pr_debug("d=%i/64", d); + pr_debug("div=%i", stage2_div); + pr_debug("divisor=%i", divisor); + pr_debug("sample12=%i\n", sample12); + + *ptr_divisor = divisor; + *ptr_sample12 = sample12; + errval = SIM_OK; + } else + errval = -SIM_E_PARAM_DIVISOR_RANGE; + } else + errval = -SIM_E_PARAM_FBYD_NOTDIVBY8OR12; + } else + errval = -SIM_E_PARAM_FBYD_WITHFRACTION; + } else + errval = -SIM_E_PARAM_FI_INVALID; + + return errval; +}; + +/* Function: sim_set_param + * + * Description: apply communication parameters (setup devisor and sample12) + * + * Parameters: + * sim_t* sim pointer to SIM device handler + * sim_param_t* param pointer to communication parameters + * + * Return Values: + * see function sim_calc_param + */ + +static int sim_set_param(sim_t *sim, sim_param_t *param) +{ + uint32_t divisor, sample12, reg_data; + int errval; + + pr_debug("%s entering.\n", __func__); + errval = sim_calc_param(param->FI, param->DI, &divisor, &sample12); + if (errval == SIM_OK) { + __raw_writel(divisor, sim->ioaddr + DIVISOR); + if (sample12) { + reg_data = __raw_readl(sim->ioaddr + CNTL); + reg_data |= SIM_CNTL_SAMPLE12; + __raw_writel(reg_data, sim->ioaddr + CNTL); + } else { + reg_data = __raw_readl(sim->ioaddr + CNTL); + reg_data &= ~SIM_CNTL_SAMPLE12; + __raw_writel(reg_data, sim->ioaddr + CNTL); + } + } + + return errval; +}; + +/* Function: sim_atr_received + * + * Description: this function is called whenever a valid ATR has been received. + * It determines the communication parameters from the ATR received and notifies + * the user space application with SIGIO. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_atr_received(sim_t *sim) +{ + sim_param_t param_default = SIM_PARAM_DEFAULT; + sim->param_atr = param_default; + + pr_debug("%s entering.\n", __func__); + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TA1))) { + sim->param_atr.FI = sim->atrparser.TXI[SIM_IFC_TA1] >> 4; + sim->param_atr.DI = sim->atrparser.TXI[SIM_IFC_TA1] & 0x0f; + } + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TB1))) { + sim->param_atr.PI1 = (sim->atrparser.TXI[SIM_IFC_TB1] >> 4) + & 0x07; + sim->param_atr.II = sim->atrparser.TXI[SIM_IFC_TB1] & 0x07f; + } + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TC1))) + sim->param_atr.N = sim->atrparser.TXI[SIM_IFC_TC1]; + + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TD1))) + sim->param_atr.T = sim->atrparser.TXI[SIM_IFC_TD1] & 0x0f; + + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TB2))) + sim->param_atr.PI2 = sim->atrparser.TXI[SIM_IFC_TB2]; + + if (sim->atrparser.ifc_valid & (1 << (SIM_IFC_TC2))) + sim->param_atr.WWT = sim->atrparser.TXI[SIM_IFC_TC2]; + + if (sim->fasync) + kill_fasync(&sim->fasync, SIGIO, POLL_IN); + +}; + +/* Function: sim_xmt_fill + * + * Description: fill the transmit FIFO until the FIFO is full or + * the end of the transmission has been reached. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_xmt_fill(sim_t *sim) +{ + uint32_t reg_data; + int bytesleft; + + reg_data = __raw_readl(sim->ioaddr + XMT_FIFO_STAT); + bytesleft = 16 - ((reg_data >> 8) & 0x0f); + + pr_debug("txfill: remaining=%i bytesleft=%i\n", + sim->xmt_remaining, bytesleft); + if (bytesleft > sim->xmt_remaining) + bytesleft = sim->xmt_remaining; + + sim->xmt_remaining -= bytesleft; + for (; bytesleft > 0; bytesleft--) { + __raw_writel(sim->xmt_buffer[sim->xmt_pos], + sim->ioaddr + PORT1_XMT_BUF); + sim->xmt_pos++; + }; +/* FIXME: optimization - keep filling until fifo full */ +}; + +/* Function: sim_xmt_start + * + * Description: initiate a transfer + * + * Parameters: + * sim_t* sim pointer to SIM device handler + * int pos position in the xfer transmit buffer + * int count number of bytes to be transmitted + */ + +static void sim_xmt_start(sim_t *sim, int pos, int count) +{ + uint32_t reg_data; + + pr_debug("tx\n"); + sim->xmt_remaining = count; + sim->xmt_pos = pos; + sim_xmt_fill(sim); + + if (sim->xmt_remaining) { + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data &= ~SIM_INT_MASK_TDTFM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + } else { + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data &= ~SIM_INT_MASK_TCIM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + __raw_writel(SIM_XMT_STATUS_TC | SIM_XMT_STATUS_TDTF, + sim->ioaddr + XMT_STATUS); + reg_data = __raw_readl(sim->ioaddr + ENABLE); + reg_data |= SIM_ENABLE_XMTEN; + __raw_writel(reg_data, sim->ioaddr + ENABLE); + } +}; + +/* Function: sim_atr_add + * + * Description: add a byte to the raw ATR string + * + * Parameters: + * sim_t* sim pointer to SIM device handler + * uint8_t data byte to be added + */ + +static void sim_atr_add(sim_t *sim, uint8_t data) +{ + pr_debug("%s entering.\n", __func__); + if (sim->atr.size < SIM_ATR_LENGTH_MAX) + sim->atr.t[sim->atr.size++] = data; + else + printk(KERN_ERR "sim.c: ATR received is too big!\n"); +}; + +/* Function: sim_fsm + * + * Description: main finite state machine running in ISR context. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + * uint8_t data byte received + */ + +static void sim_fsm(sim_t *sim, uint16_t data) +{ + uint32_t temp, i = 0; + switch (sim->state) { + + pr_debug("%s stat is %d \n", __func__, sim->state); + /* OPS FSM */ + + case SIM_STATE_OPERATIONAL_IDLE: + printk(KERN_INFO "data received unexpectidly (%04x)\n", data); + break; + + case SIM_STATE_OPERATIONAL_COMMAND: + if (data == sim->xmt_buffer[1]) { + if (sim->xfer.rcv_length) { + sim->state = SIM_STATE_OPERATIONAL_RESPONSE; + } else { + sim->state = SIM_STATE_OPERATIONAL_STATUS1; + if (sim->xfer.xmt_length > 5) + sim_xmt_start(sim, 5, + sim->xfer.xmt_length - 5); + }; + } else if (((data & 0xf0) == 0x60) | ((data & 0xf0) == 0x90)) { + sim->xfer.sw1 = data; + sim->state = SIM_STATE_OPERATIONAL_STATUS2; + } else { + sim->errval = -SIM_E_NACK; + complete(&sim->xfer_done); + }; + break; + + case SIM_STATE_OPERATIONAL_RESPONSE: + sim->rcv_buffer[sim->rcv_count] = data; + sim->rcv_count++; + if (sim->rcv_count == sim->xfer.rcv_length) + sim->state = SIM_STATE_OPERATIONAL_STATUS1; + break; + + case SIM_STATE_OPERATIONAL_STATUS1: + sim->xfer.sw1 = data; + sim->state = SIM_STATE_OPERATIONAL_STATUS2; + break; + + case SIM_STATE_OPERATIONAL_STATUS2: + sim->xfer.sw2 = data; + sim->state = SIM_STATE_OPERATIONAL_IDLE; + complete(&sim->xfer_done); + break; + + case SIM_STATE_OPERATIONAL_PTS: + sim->rcv_buffer[sim->rcv_count] = data; + sim->rcv_count++; + if (sim->rcv_count == sim->xfer.rcv_length) + sim->state = SIM_STATE_OPERATIONAL_IDLE; + break; + + /* ATR FSM */ + + case SIM_STATE_DETECTED_ATR_T0: + sim_atr_add(sim, data); + pr_debug("T0 %02x\n", data); + sim->atrparser.T0 = data; + sim->state = SIM_STATE_DETECTED_ATR_TS; + break; + + case SIM_STATE_DETECTED_ATR_TS: + sim_atr_add(sim, data); + pr_debug("TS %02x\n", data); + sim->atrparser.TS = data; + if (data & 0xf0) { + sim->atrparser.ifc_current_valid = (data >> 4) & 0x0f; + sim->atrparser.num_hb = data & 0x0f; + sim->atrparser.ifc_valid = 0; + sim->state = SIM_STATE_DETECTED_ATR_TXI; + sim->atrparser.cnt = 0; + } else { + goto sim_fsm_atr_thb; + }; + break; + + case SIM_STATE_DETECTED_ATR_TXI: + sim_atr_add(sim, data); + i = ffs(sim->atrparser.ifc_current_valid) - 1; + pr_debug("T%c%i %02x\n", 'A' + i, sim->atrparser.cnt + 1, data); + sim->atrparser.TXI[SIM_IFC_TXI(i, sim->atrparser.cnt)] = data; + sim->atrparser.ifc_valid |= 1 << SIM_IFC_TXI(i, + sim->atrparser. + cnt); + sim->atrparser.ifc_current_valid &= ~(1 << i); + + if (sim->atrparser.ifc_current_valid == 0) { + if (i == 3) { + sim->atrparser.ifc_current_valid = (data >> 4) + & 0x0f; + sim->atrparser.cnt++; + + if (sim->atrparser.cnt >= 4) { + /* error */ + printk(KERN_ERR "ERROR !\n"); + break; + }; + + if (sim->atrparser.ifc_current_valid == 0) + goto sim_fsm_atr_thb; + } else { +sim_fsm_atr_thb: + if (sim->atrparser.num_hb) { + sim->state = SIM_STATE_DETECTED_ATR_THB; + sim->atrparser.cnt = 0; + } else { + goto sim_fsm_atr_tck; + }; + }; + }; + break; + + case SIM_STATE_DETECTED_ATR_THB: + sim_atr_add(sim, data); + pr_debug("THB%i %02x\n", i, data); + sim->atrparser.THB[sim->atrparser.cnt] = data; + sim->atrparser.cnt++; + + if (sim->atrparser.cnt == sim->atrparser.num_hb) { +sim_fsm_atr_tck: + i = sim->atrparser.ifc_valid & (1 << (SIM_IFC_TD1)); + temp = sim->atrparser.TXI[SIM_IFC_TD1] & 0x0f; + if ((i && temp) == SIM_PROTOCOL_T1) + sim->state = SIM_STATE_DETECTED_ATR_TCK; + else + goto sim_fsm_atr_received; + }; + break; + + case SIM_STATE_DETECTED_ATR_TCK: + sim_atr_add(sim, data); + /* checksum not required for T=0 */ + sim->atrparser.TCK = data; +sim_fsm_atr_received: + sim->state = SIM_STATE_OPERATIONAL_IDLE; + sim->present = SIM_PRESENT_OPERATIONAL; + sim_atr_received(sim); + break; + }; +}; + +/* Function: sim_irq_handler + * + * Description: interrupt service routine. + * + * Parameters: + * int irq interrupt number + * void *dev_id pointer to SIM device handler + * + * Return values: + * IRQ_HANDLED OS specific + */ + +static irqreturn_t sim_irq_handler(int irq, void *dev_id) +{ + uint32_t reg_data, reg_data0, reg_data1; + + sim_t *sim = (sim_t *) dev_id; + + pr_debug("%s entering\n", __func__); + + reg_data0 = __raw_readl(sim->ioaddr + XMT_STATUS); + reg_data1 = __raw_readl(sim->ioaddr + INT_MASK); + if ((reg_data0 & SIM_XMT_STATUS_TC) + && (!(reg_data1 & SIM_INT_MASK_TCIM))) { + pr_debug("TC_IRQ\n"); + __raw_writel(SIM_XMT_STATUS_TC, sim->ioaddr + XMT_STATUS); + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data |= SIM_INT_MASK_TCIM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + reg_data = __raw_readl(sim->ioaddr + ENABLE); + reg_data &= ~SIM_ENABLE_XMTEN; + __raw_writel(reg_data, sim->ioaddr + ENABLE); + }; + + reg_data0 = __raw_readl(sim->ioaddr + XMT_STATUS); + reg_data1 = __raw_readl(sim->ioaddr + INT_MASK); + if ((reg_data0 & SIM_XMT_STATUS_TDTF) + && (!(reg_data1 & SIM_INT_MASK_TDTFM))) { + pr_debug("TDTF_IRQ\n"); + __raw_writel(SIM_XMT_STATUS_TDTF, sim->ioaddr + XMT_STATUS); + sim_xmt_fill(sim); + + if (sim->xmt_remaining == 0) { + __raw_writel(SIM_XMT_STATUS_TC, + sim->ioaddr + XMT_STATUS); + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data &= ~SIM_INT_MASK_TCIM; + reg_data |= SIM_INT_MASK_TDTFM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + }; + }; + + reg_data0 = __raw_readl(sim->ioaddr + RCV_STATUS); + reg_data1 = __raw_readl(sim->ioaddr + INT_MASK); + if ((reg_data0 & SIM_RCV_STATUS_RDRF) + && (!(reg_data1 & SIM_INT_MASK_RIM))) { + pr_debug("%s RDRF_IRQ\n", __func__); + __raw_writel(SIM_RCV_STATUS_RDRF, sim->ioaddr + RCV_STATUS); + + while (__raw_readl(sim->ioaddr + RCV_FIFO_CNT)) { + uint32_t data; + data = __raw_readl(sim->ioaddr + PORT1_RCV_BUF); + pr_debug("RX = %02x state = %i\n", data, sim->state); + if (data & 0x700) { + if (sim->xfer_ongoing) { + /* error */ + printk(KERN_ERR "ERROR !\n"); + return IRQ_HANDLED; + }; + } else + sim_fsm(sim, data); + }; + }; + + reg_data0 = __raw_readl(sim->ioaddr + PORT0_DETECT); + if (reg_data0 & SIM_PORT_DETECT_SDI) { + pr_debug("%s PD_IRQ\n", __func__); + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data |= SIM_PORT_DETECT_SDI; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + + reg_data0 = __raw_readl(sim->ioaddr + PORT0_DETECT); + if (reg_data0 & SIM_PORT_DETECT_SPDP) { + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data &= ~SIM_PORT_DETECT_SPDS; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + + if (sim->present != SIM_PRESENT_REMOVED) { + pr_debug("Removed sim card\n"); + sim->present = SIM_PRESENT_REMOVED; + sim->state = SIM_STATE_REMOVED; + + if (sim->fasync) + kill_fasync(&sim->fasync, + SIGIO, POLL_IN); + }; + } else { + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data |= SIM_PORT_DETECT_SPDS; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + + if (sim->present == SIM_PRESENT_REMOVED) { + pr_debug("Inserted sim card\n"); + sim->state = SIM_STATE_DETECTED_ATR_T0; + sim->present = SIM_PRESENT_DETECTED; + + if (sim->fasync) + kill_fasync(&sim->fasync, + SIGIO, POLL_IN); + }; + }; + }; + + return IRQ_HANDLED; +}; + +/* Function: sim_power_on + * + * Description: run the power on sequence + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_power_on(sim_t *sim) +{ + uint32_t reg_data; + + /* power on sequence */ + pr_debug("%s Powering on the sim port.\n", __func__); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data |= SIM_PORT_CNTL_SVEN; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + msleep(10); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data |= SIM_PORT_CNTL_SCEN; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + msleep(10); + reg_data = SIM_RCV_THRESHOLD_RTH(0) | SIM_RCV_THRESHOLD_RDT(1); + __raw_writel(reg_data, sim->ioaddr + RCV_THRESHOLD); + __raw_writel(SIM_RCV_STATUS_RDRF, sim->ioaddr + RCV_STATUS); + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data &= ~SIM_INT_MASK_RIM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + __raw_writel(31, sim->ioaddr + DIVISOR); + reg_data = __raw_readl(sim->ioaddr + CNTL); + reg_data |= SIM_CNTL_SAMPLE12; + __raw_writel(reg_data, sim->ioaddr + CNTL); + reg_data = __raw_readl(sim->ioaddr + ENABLE); + reg_data |= SIM_ENABLE_RCVEN; + __raw_writel(reg_data, sim->ioaddr + ENABLE); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data |= SIM_PORT_CNTL_SRST; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + pr_debug("%s port0_ctl is 0x%x.\n", __func__, + __raw_readl(sim->ioaddr + PORT0_CNTL)); + sim->power = SIM_POWER_ON; +}; + +/* Function: sim_power_off + * + * Description: run the power off sequence + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_power_off(sim_t *sim) +{ + uint32_t reg_data; + + pr_debug("%s entering.\n", __func__); + /* sim_power_off sequence */ + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data &= ~SIM_PORT_CNTL_SCEN; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + reg_data = __raw_readl(sim->ioaddr + ENABLE); + reg_data &= ~SIM_ENABLE_RCVEN; + __raw_writel(reg_data, sim->ioaddr + ENABLE); + reg_data = __raw_readl(sim->ioaddr + INT_MASK); + reg_data |= SIM_INT_MASK_RIM; + __raw_writel(reg_data, sim->ioaddr + INT_MASK); + __raw_writel(0, sim->ioaddr + RCV_THRESHOLD); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data &= ~SIM_PORT_CNTL_SRST; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data &= ~SIM_PORT_CNTL_SVEN; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + sim->power = SIM_POWER_OFF; +}; + +/* Function: sim_start + * + * Description: ramp up the SIM interface + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_start(sim_t *sim) +{ + uint32_t reg_data, clk_rate, clk_div = 0; + + pr_debug("%s entering.\n", __func__); + /* Configuring SIM for Operation */ + reg_data = SIM_XMT_THRESHOLD_XTH(0) | SIM_XMT_THRESHOLD_TDT(4); + __raw_writel(reg_data, sim->ioaddr + XMT_THRESHOLD); + __raw_writel(0, sim->ioaddr + SETUP); + /* ~ 4 MHz */ + clk_rate = clk_get_rate(sim->clk); + clk_div = clk_rate / sim->plat_data->clk_rate; + if (clk_rate % sim->plat_data->clk_rate) + clk_div++; + pr_debug("%s prescaler is 0x%x.\n", __func__, clk_div); + __raw_writel(clk_div, sim->ioaddr + CLK_PRESCALER); + + reg_data = SIM_CNTL_GPCNT_CLK_SEL(0) | SIM_CNTL_BAUD_SEL(7) + | SIM_CNTL_SAMPLE12 | SIM_CNTL_ANACK | SIM_CNTL_ICM; + __raw_writel(reg_data, sim->ioaddr + CNTL); + __raw_writel(31, sim->ioaddr + DIVISOR); + reg_data = __raw_readl(sim->ioaddr + OD_CONFIG); + reg_data |= SIM_OD_CONFIG_OD_P0; + __raw_writel(reg_data, sim->ioaddr + OD_CONFIG); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data |= SIM_PORT_CNTL_3VOLT | SIM_PORT_CNTL_STEN; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + + /* presense detect */ + pr_debug("%s p0_det is 0x%x \n", __func__, + __raw_readl(sim->ioaddr + PORT0_DETECT)); + if (__raw_readl(sim->ioaddr + PORT0_DETECT) & SIM_PORT_DETECT_SPDP) { + pr_debug("%s card removed \n", __func__); + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data &= ~SIM_PORT_DETECT_SPDS; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + sim->present = SIM_PRESENT_REMOVED; + sim->state = SIM_STATE_REMOVED; + } else { + pr_debug("%s card inserted \n", __func__); + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data |= SIM_PORT_DETECT_SPDS; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + sim->present = SIM_PRESENT_DETECTED; + sim->state = SIM_STATE_DETECTED_ATR_T0; + }; + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data |= SIM_PORT_DETECT_SDI; + reg_data &= ~SIM_PORT_DETECT_SDIM; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + + /* + * Since there is no PD0 layout on MX51, assume + * that there is a SIM card in slot defaulty. + * */ + if (0 == (sim->plat_data->detect)) { + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + reg_data |= SIM_PORT_DETECT_SPDS; + __raw_writel(reg_data, sim->ioaddr + PORT0_DETECT); + sim->present = SIM_PRESENT_DETECTED; + sim->state = SIM_STATE_DETECTED_ATR_T0; + } + + if (sim->present == SIM_PRESENT_DETECTED) + sim_power_on(sim); + +}; + +/* Function: sim_stop + * + * Description: shut down the SIM interface + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_stop(sim_t *sim) +{ + pr_debug("%s entering.\n", __func__); + __raw_writel(0, sim->ioaddr + SETUP); + __raw_writel(0, sim->ioaddr + ENABLE); + __raw_writel(0, sim->ioaddr + PORT0_CNTL); + __raw_writel(0x06, sim->ioaddr + CNTL); + __raw_writel(0, sim->ioaddr + CLK_PRESCALER); + __raw_writel(0, sim->ioaddr + SETUP); + __raw_writel(0, sim->ioaddr + OD_CONFIG); + __raw_writel(0, sim->ioaddr + XMT_THRESHOLD); + __raw_writel(0xb8, sim->ioaddr + XMT_STATUS); + __raw_writel(4, sim->ioaddr + RESET_CNTL); + mdelay(1); +}; + +/* Function: sim_data_reset + * + * Description: reset a SIM structure to default values + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_data_reset(sim_t *sim) +{ + sim_param_t param_default = SIM_PARAM_DEFAULT; + sim->present = SIM_PRESENT_REMOVED; + sim->state = SIM_STATE_REMOVED; + sim->power = SIM_POWER_OFF; + sim->errval = SIM_OK; + memset(&sim->atrparser, 0, sizeof(sim->atrparser)); + memset(&sim->atr, 0, sizeof(sim->atr)); + sim->param_atr = param_default; + memset(&sim->param, 0, sizeof(sim->param)); + memset(&sim->xfer, 0, sizeof(sim->xfer)); + sim->xfer_ongoing = 0; + sim->xmt_remaining = 0; + sim->xmt_pos = 0; + sim->rcv_count = 0; + memset(sim->rcv_buffer, 0, SIM_RCV_BUFFER_SIZE); + memset(sim->xmt_buffer, 0, SIM_XMT_BUFFER_SIZE); +}; + +/* Function: sim_cold_reset + * + * Description: cold reset the SIM interface, including card + * power down and interface hardware reset. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_cold_reset(sim_t *sim) +{ + pr_debug("%s entering.\n", __func__); + if (sim->present != SIM_PRESENT_REMOVED) { + sim_power_off(sim); + sim_stop(sim); + sim_data_reset(sim); + sim->state = SIM_STATE_DETECTED_ATR_T0; + sim->present = SIM_PRESENT_DETECTED; + msleep(50); + sim_start(sim); + sim_power_on(sim); + }; +}; + +/* Function: sim_warm_reset + * + * Description: warm reset the SIM interface: just invoke the + * reset signal and reset the SIM structure for the interface. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static void sim_warm_reset(sim_t *sim) +{ + uint32_t reg_data; + + pr_debug("%s entering.\n", __func__); + if (sim->present != SIM_PRESENT_REMOVED) { + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data |= SIM_PORT_CNTL_SRST; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + sim_data_reset(sim); + msleep(50); + reg_data = __raw_readl(sim->ioaddr + PORT0_CNTL); + reg_data &= ~SIM_PORT_CNTL_SRST; + __raw_writel(reg_data, sim->ioaddr + PORT0_CNTL); + }; +}; + +/* Function: sim_card_lock + * + * Description: physically lock the SIM card. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static int sim_card_lock(sim_t *sim) +{ + int errval; + + pr_debug("%s entering.\n", __func__); + /* place holder for true physcial locking */ + if (sim->present != SIM_PRESENT_REMOVED) + errval = SIM_OK; + else + errval = -SIM_E_NOCARD; + return errval; +}; + +/* Function: sim_card_eject + * + * Description: physically unlock and eject the SIM card. + * + * Parameters: + * sim_t* sim pointer to SIM device handler + */ + +static int sim_card_eject(sim_t *sim) +{ + int errval; + + pr_debug("%s entering.\n", __func__); + /* place holder for true physcial locking */ + if (sim->present != SIM_PRESENT_REMOVED) + errval = SIM_OK; + else + errval = -SIM_E_NOCARD; + return errval; +}; + +/* Function: sim_ioctl + * + * Description: handle ioctl calls + * + * Parameters: OS specific + */ + +static int sim_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int ret, errval = SIM_OK; + unsigned long timeout; + + sim_t *sim = (sim_t *) file->private_data; + + pr_debug("%s entering.\n", __func__); + switch (cmd) { + pr_debug("ioctl cmd %d is issued...\n", cmd); + + case SIM_IOCTL_GET_ATR: + if (sim->present != SIM_PRESENT_OPERATIONAL) { + errval = -SIM_E_NOCARD; + break; + }; + ret = copy_to_user((sim_atr_t *) arg, &sim->atr, + sizeof(sim_atr_t)); + if (ret) + errval = -SIM_E_ACCESS; + break; + + case SIM_IOCTL_GET_PARAM_ATR: + if (sim->present != SIM_PRESENT_OPERATIONAL) { + errval = -SIM_E_NOCARD; + break; + }; + ret = copy_to_user((sim_param_t *) arg, &sim->param_atr, + sizeof(sim_param_t)); + if (ret) + errval = -SIM_E_ACCESS; + break; + + case SIM_IOCTL_GET_PARAM: + ret = copy_to_user((sim_param_t *) arg, &sim->param, + sizeof(sim_param_t)); + if (ret) + errval = -SIM_E_ACCESS; + break; + + case SIM_IOCTL_SET_PARAM: + ret = copy_from_user(&sim->param, (sim_param_t *) arg, + sizeof(sim_param_t)); + if (ret) + errval = -SIM_E_ACCESS; + else + errval = sim_set_param(sim, &sim->param); + break; + + case SIM_IOCTL_POWER_ON: + if (sim->power == SIM_POWER_ON) { + errval = -SIM_E_POWERED_ON; + break; + }; + sim_power_on(sim); + break; + + case SIM_IOCTL_POWER_OFF: + if (sim->power == SIM_POWER_OFF) { + errval = -SIM_E_POWERED_OFF; + break; + }; + sim_power_off(sim); + break; + + case SIM_IOCTL_COLD_RESET: + if (sim->power == SIM_POWER_OFF) { + errval = -SIM_E_POWERED_OFF; + break; + }; + sim_cold_reset(sim); + break; + + case SIM_IOCTL_WARM_RESET: + sim_warm_reset(sim); + if (sim->power == SIM_POWER_OFF) { + errval = -SIM_E_POWERED_OFF; + break; + }; + break; + + case SIM_IOCTL_XFER: + if (sim->present != SIM_PRESENT_OPERATIONAL) { + errval = -SIM_E_NOCARD; + break; + }; + + ret = copy_from_user(&sim->xfer, (sim_xfer_t *) arg, + sizeof(sim_xfer_t)); + if (ret) { + errval = -SIM_E_ACCESS; + break; + }; + + ret = copy_from_user(sim->xmt_buffer, sim->xfer.xmt_buffer, + sim->xfer.xmt_length); + if (ret) { + errval = -SIM_E_ACCESS; + break; + }; + + sim->rcv_count = 0; + sim->xfer.sw1 = 0; + sim->xfer.sw2 = 0; + + if (sim->xfer.type == SIM_XFER_TYPE_TPDU) { + if (sim->xfer.xmt_length < 5) { + errval = -SIM_E_TPDUSHORT; + break; + } + sim->state = SIM_STATE_OPERATIONAL_COMMAND; + } else if (sim->xfer.type == SIM_XFER_TYPE_PTS) { + if (sim->xfer.xmt_length == 0) { + errval = -SIM_E_PTSEMPTY; + break; + } + sim->state = SIM_STATE_OPERATIONAL_PTS; + } else { + errval = -SIM_E_INVALIDXFERTYPE; + break; + }; + + if (sim->xfer.xmt_length > SIM_XMT_BUFFER_SIZE) { + errval = -SIM_E_INVALIDXMTLENGTH; + break; + }; + + if (sim->xfer.rcv_length > SIM_XMT_BUFFER_SIZE) { + errval = -SIM_E_INVALIDRCVLENGTH; + break; + }; + + sim->errval = 0; + sim->xfer_ongoing = 1; + init_completion(&sim->xfer_done); + sim_xmt_start(sim, 0, 5); + timeout = + wait_for_completion_interruptible_timeout(&sim->xfer_done, + sim->xfer. + timeout); + sim->xfer_ongoing = 0; + + if (sim->errval) { + errval = sim->errval; + break; + }; + + if (timeout == 0) { + errval = -SIM_E_TIMEOUT; + break; + } + + ret = copy_to_user(sim->xfer.rcv_buffer, sim->rcv_buffer, + sim->xfer.rcv_length); + if (ret) { + errval = -SIM_E_ACCESS; + break; + }; + + ret = copy_to_user((sim_xfer_t *) arg, &sim->xfer, + sizeof(sim_xfer_t)); + if (ret) + errval = -SIM_E_ACCESS; + break; + + case SIM_IOCTL_GET_PRESENSE: + if (put_user(sim->present, (int *)arg)) + errval = -SIM_E_ACCESS; + break; + + case SIM_IOCTL_CARD_LOCK: + errval = sim_card_lock(sim); + break; + + case SIM_IOCTL_CARD_EJECT: + errval = sim_card_eject(sim); + break; + + }; + + return errval; +}; + +/* Function: sim_fasync + * + * Description: async handler + * + * Parameters: OS specific + */ + +static int sim_fasync(int fd, struct file *file, int mode) +{ + sim_t *sim = (sim_t *) file->private_data; + pr_debug("%s entering.\n", __func__); + return fasync_helper(fd, file, mode, &sim->fasync); +} + +/* Function: sim_open + * + * Description: ramp up interface when being opened + * + * Parameters: OS specific + */ + +static int sim_open(struct inode *inode, struct file *file) +{ + int errval = SIM_OK; + + sim_t *sim = dev_get_drvdata(sim_dev.parent); + file->private_data = sim; + + pr_debug("%s entering.\n", __func__); + if (!sim->ioaddr) { + errval = -ENOMEM; + return errval; + } + + if (!(sim->clk_flag)) { + pr_debug("\n%s enable the clock\n", __func__); + clk_enable(sim->clk); + sim->clk_flag = 1; + } + + sim_start(sim); + + return errval; +}; + +/* Function: sim_release + * + * Description: shut down interface when being closed + * + * Parameters: OS specific + */ + +static int sim_release(struct inode *inode, struct file *file) +{ + uint32_t reg_data; + + sim_t *sim = (sim_t *) file->private_data; + + pr_debug("%s entering.\n", __func__); + if (sim->clk_flag) { + pr_debug("\n%s disable the clock\n", __func__); + clk_disable(sim->clk); + sim->clk_flag = 0; + } + + /* disable presense detection */ + reg_data = __raw_readl(sim->ioaddr + PORT0_DETECT); + __raw_writel(reg_data | SIM_PORT_DETECT_SDIM, + sim->ioaddr + PORT0_DETECT); + + if (sim->present != SIM_PRESENT_REMOVED) { + sim_power_off(sim); + if (sim->fasync) + kill_fasync(&sim->fasync, SIGIO, POLL_IN); + }; + + sim_stop(sim); + + sim_fasync(-1, file, 0); + + pr_debug("exit\n"); + return 0; +}; + +static const struct file_operations sim_fops = { + .open = sim_open, + .ioctl = sim_ioctl, + .fasync = sim_fasync, + .release = sim_release +}; + +static struct miscdevice sim_dev = { + MISC_DYNAMIC_MINOR, + "mxc_sim", + &sim_fops +}; + +/*****************************************************************************\ + * * + * Driver init/exit * + * * +\*****************************************************************************/ + +static int sim_probe(struct platform_device *pdev) +{ + int ret = 0; + struct mxc_sim_platform_data *sim_plat = pdev->dev.platform_data; + + sim_t *sim = kzalloc(sizeof(sim_t), GFP_KERNEL); + + if (sim == 0) { + ret = -ENOMEM; + printk(KERN_ERR "Can't get the MEMORY\n"); + return ret; + }; + + BUG_ON(pdev == NULL); + + sim->plat_data = sim_plat; + sim->clk_flag = 0; + + sim->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!sim->res) { + ret = -ENOMEM; + printk(KERN_ERR "Can't get the MEMORY\n"); + goto out; + } + + /* request the sim clk and sim_serial_clk */ + sim->clk = clk_get(NULL, sim->plat_data->clock_sim); + if (IS_ERR(sim->clk)) { + ret = PTR_ERR(sim->clk); + printk(KERN_ERR "Get CLK ERROR !\n"); + goto out; + } + pr_debug("sim clock:%lu\n", clk_get_rate(sim->clk)); + + sim->ipb_irq = platform_get_irq(pdev, 0); + sim->dat_irq = platform_get_irq(pdev, 1); + if (!(sim->ipb_irq | sim->dat_irq)) { + ret = -ENOMEM; + goto out1; + } + + if (!request_mem_region(sim->res->start, + sim->res->end - + sim->res->start + 1, pdev->name)) { + printk(KERN_ERR "request_mem_region failed\n"); + ret = -ENOMEM; + goto out1; + } + + sim->ioaddr = (void *)ioremap(sim->res->start, sim->res->end - + sim->res->start + 1); + if (sim->ipb_irq) + ret = request_irq(sim->ipb_irq, sim_irq_handler, + 0, "mxc_sim_ipb", sim); + if (sim->dat_irq) + ret |= request_irq(sim->dat_irq, sim_irq_handler, + 0, "mxc_sim_dat", sim); + + if (ret) { + printk(KERN_ERR "Can't get the irq\n"); + goto out2; + }; + + platform_set_drvdata(pdev, sim); + sim_dev.parent = &(pdev->dev); + + misc_register(&sim_dev); + + return ret; +out2: + if (sim->ipb_irq) + free_irq(sim->ipb_irq, sim); + if (sim->dat_irq) + free_irq(sim->dat_irq, sim); + release_mem_region(sim->res->start, + sim->res->end - sim->res->start + 1); +out1: + clk_put(sim->clk); +out: + kfree(sim); + return ret; +} + +static int sim_remove(struct platform_device *pdev) +{ + sim_t *sim = platform_get_drvdata(pdev); + + clk_put(sim->clk); + + if (sim->ipb_irq) + free_irq(sim->ipb_irq, sim); + if (sim->dat_irq) + free_irq(sim->dat_irq, sim); + + iounmap(sim->ioaddr); + + kfree(sim); + release_mem_region(sim->res->start, + sim->res->end - sim->res->start + 1); + + misc_deregister(&sim_dev); + return 0; +} + +static struct platform_driver sim_driver = { + .driver = { + .name = "mxc_sim", + }, + .probe = sim_probe, + .remove = sim_remove, + .suspend = NULL, + .resume = NULL, +}; + +static int __init sim_drv_init(void) +{ + return platform_driver_register(&sim_driver); +} + +static void __exit sim_drv_exit(void) +{ + platform_driver_unregister(&sim_driver); +} + +module_init(sim_drv_init); +module_exit(sim_drv_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC SIM Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/char/cyclades.c +++ linux-fsl-imx51-2.6.31/drivers/char/cyclades.c @@ -3990,46 +3990,6 @@ * NB: both 1->0 and 0->1 transitions are counted except for * RI where only 0->1 is counted. */ - case TIOCGICOUNT: - spin_lock_irqsave(&info->card->card_lock, flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->card->card_lock, flags); - p_cuser = argp; - ret_val = put_user(cnow.cts, &p_cuser->cts); - if (ret_val) - break; - ret_val = put_user(cnow.dsr, &p_cuser->dsr); - if (ret_val) - break; - ret_val = put_user(cnow.rng, &p_cuser->rng); - if (ret_val) - break; - ret_val = put_user(cnow.dcd, &p_cuser->dcd); - if (ret_val) - break; - ret_val = put_user(cnow.rx, &p_cuser->rx); - if (ret_val) - break; - ret_val = put_user(cnow.tx, &p_cuser->tx); - if (ret_val) - break; - ret_val = put_user(cnow.frame, &p_cuser->frame); - if (ret_val) - break; - ret_val = put_user(cnow.overrun, &p_cuser->overrun); - if (ret_val) - break; - ret_val = put_user(cnow.parity, &p_cuser->parity); - if (ret_val) - break; - ret_val = put_user(cnow.brk, &p_cuser->brk); - if (ret_val) - break; - ret_val = put_user(cnow.buf_overrun, &p_cuser->buf_overrun); - if (ret_val) - break; - ret_val = 0; - break; default: ret_val = -ENOIOCTLCMD; } @@ -4041,6 +4001,31 @@ return ret_val; } /* cy_ioctl */ +static int cy_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *sic) +{ + struct cyclades_port *info = tty->driver_data; + struct cyclades_icount cnow; /* Used to snapshot */ + unsigned long flags; + + spin_lock_irqsave(&info->card->card_lock, flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->card->card_lock, flags); + + sic->cts = cnow.cts; + sic->dsr = cnow.dsr; + sic->rng = cnow.rng; + sic->dcd = cnow.dcd; + sic->rx = cnow.rx; + sic->tx = cnow.tx; + sic->frame = cnow.frame; + sic->overrun = cnow.overrun; + sic->parity = cnow.parity; + sic->brk = cnow.brk; + sic->buf_overrun = cnow.buf_overrun; + return 0; +} + /* * This routine allows the tty driver to be notified when * device's termios settings have changed. Note that a @@ -5261,6 +5246,7 @@ .wait_until_sent = cy_wait_until_sent, .tiocmget = cy_tiocmget, .tiocmset = cy_tiocmset, + .get_icount = cy_get_icount, .proc_fops = &cyclades_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/char/tty_port.c +++ linux-fsl-imx51-2.6.31/drivers/char/tty_port.c @@ -96,6 +96,14 @@ } EXPORT_SYMBOL(tty_port_tty_set); +static void tty_port_shutdown(struct tty_port *port) +{ + if (port->ops->shutdown && + test_and_clear_bit(ASYNCB_INITIALIZED, &port->flags)) + port->ops->shutdown(port); + +} + /** * tty_port_hangup - hangup helper * @port: tty port @@ -116,6 +124,7 @@ port->tty = NULL; spin_unlock_irqrestore(&port->lock, flags); wake_up_interruptible(&port->open_wait); + tty_port_shutdown(port); } EXPORT_SYMBOL(tty_port_hangup); @@ -208,8 +217,14 @@ /* if non-blocking mode is set we can pass directly to open unless the port has just hung up or is in another error state */ - if ((filp->f_flags & O_NONBLOCK) || - (tty->flags & (1 << TTY_IO_ERROR))) { + if (tty->flags & (1 << TTY_IO_ERROR)) { + port->flags |= ASYNC_NORMAL_ACTIVE; + return 0; + } + if (filp->f_flags & O_NONBLOCK) { + /* Indicate we are open */ + if (tty->termios->c_cflag & CBAUD) + tty_port_raise_dtr_rts(port); port->flags |= ASYNC_NORMAL_ACTIVE; return 0; } @@ -296,15 +311,17 @@ if (port->count) { spin_unlock_irqrestore(&port->lock, flags); + if (port->ops->drop) + port->ops->drop(port); return 0; } - port->flags |= ASYNC_CLOSING; + set_bit(ASYNCB_CLOSING, &port->flags); tty->closing = 1; spin_unlock_irqrestore(&port->lock, flags); /* Don't block on a stalled port, just pull the chain */ if (tty->flow_stopped) tty_driver_flush_buffer(tty); - if (port->flags & ASYNC_INITIALIZED && + if (test_bit(ASYNCB_INITIALIZED, &port->flags) && port->closing_wait != ASYNC_CLOSING_WAIT_NONE) tty_wait_until_sent(tty, port->closing_wait); if (port->drain_delay) { @@ -318,6 +335,9 @@ timeout = 2 * HZ; schedule_timeout_interruptible(timeout); } + /* Don't call port->drop for the last reference. Callers will want + to drop the last active reference in ->shutdown() or the tty + shutdown path */ return 1; } EXPORT_SYMBOL(tty_port_close_start); @@ -348,3 +368,14 @@ spin_unlock_irqrestore(&port->lock, flags); } EXPORT_SYMBOL(tty_port_close_end); + +void tty_port_close(struct tty_port *port, struct tty_struct *tty, + struct file *filp) +{ + if (tty_port_close_start(port, tty, filp) == 0) + return; + tty_port_shutdown(port); + tty_port_close_end(port, tty); + tty_port_tty_set(port, NULL); +} +EXPORT_SYMBOL(tty_port_close); --- linux-fsl-imx51-2.6.31.orig/drivers/char/hw_random/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/char/hw_random/Kconfig @@ -60,6 +60,30 @@ If unsure, say Y. +config HW_RANDOM_FSL_RNGA + tristate "Freescale RNGA Random Number Generator" + depends on HW_RANDOM && ARCH_HAS_RNGA && !MXC_SECURITY_RNG + ---help--- + This driver provides kernel-side support for the Random Number + Generator hardware found on Freescale i.MX processors. + + To compile this driver as a module, choose M here: the + module will be called fsl-rnga. + + If unsure, say Y. + +config HW_RANDOM_FSL_RNGC + tristate "Freescale RNGC Random Number Generator" + depends on HW_RANDOM && ARCH_HAS_RNGC && !MXC_SECURITY_RNG + ---help--- + This driver provides kernel-side support for the Random Number + Generator hardware found on Freescale i.MX processors. + + To compile this driver as a module, choose M here: the + module will be called fsl-rngc. + + If unsure, say Y. + config HW_RANDOM_GEODE tristate "AMD Geode HW Random Number Generator support" depends on HW_RANDOM && X86_32 && PCI --- linux-fsl-imx51-2.6.31.orig/drivers/char/hw_random/fsl-rnga.c +++ linux-fsl-imx51-2.6.31/drivers/char/hw_random/fsl-rnga.c @@ -0,0 +1,238 @@ +/* + * RNG driver for Freescale RNGA + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) + * (c) Copyright 2003 Red Hat Inc + * + * derived from + * + * Hardware driver for the AMD 768 Random Number Generator (RNG) + * (c) Copyright 2001 Red Hat Inc + * + * derived from + * + * Hardware driver for Intel i810 Random Number Generator (RNG) + * Copyright 2000,2001 Jeff Garzik + * Copyright 2000,2001 Philipp Rumpf + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* RNGA Registers */ +#define RNGA_CONTROL 0x00 +#define RNGA_STATUS 0x04 +#define RNGA_ENTROPY 0x08 +#define RNGA_OUTPUT_FIFO 0x0c +#define RNGA_MODE 0x10 +#define RNGA_VERIFICATION_CONTROL 0x14 +#define RNGA_OSC_CONTROL_COUNTER 0x18 +#define RNGA_OSC1_COUNTER 0x1c +#define RNGA_OSC2_COUNTER 0x20 +#define RNGA_OSC_COUNTER_STATUS 0x24 + +/* RNGA Registers Range */ +#define RNG_ADDR_RANGE 0x28 + +/* RNGA Control Register */ +#define RNGA_CONTROL_SLEEP 0x00000010 +#define RNGA_CONTROL_CLEAR_INT 0x00000008 +#define RNGA_CONTROL_MASK_INTS 0x00000004 +#define RNGA_CONTROL_HIGH_ASSURANCE 0x00000002 +#define RNGA_CONTROL_GO 0x00000001 + +#define RNGA_STATUS_LEVEL_MASK 0x0000ff00 + +/* RNGA Status Register */ +#define RNGA_STATUS_OSC_DEAD 0x80000000 +#define RNGA_STATUS_SLEEP 0x00000010 +#define RNGA_STATUS_ERROR_INT 0x00000008 +#define RNGA_STATUS_FIFO_UNDERFLOW 0x00000004 +#define RNGA_STATUS_LAST_READ_STATUS 0x00000002 +#define RNGA_STATUS_SECURITY_VIOLATION 0x00000001 + +static struct platform_device *rng_dev; + +static int fsl_rnga_data_present(struct hwrng *rng) +{ + int level; + u32 rng_base = (u32) rng->priv; + + /* how many random numbers is in FIFO? [0-16] */ + level = ((__raw_readl(rng_base + RNGA_STATUS) & + RNGA_STATUS_LEVEL_MASK) >> 8); + + return level > 0 ? 1 : 0; +} + +static int fsl_rnga_data_read(struct hwrng *rng, u32 * data) +{ + int err; + u32 ctrl, rng_base = (u32) rng->priv; + + /* retrieve a random number from FIFO */ + *data = __raw_readl(rng_base + RNGA_OUTPUT_FIFO); + + /* some error while reading this random number? */ + err = __raw_readl(rng_base + RNGA_STATUS) & RNGA_STATUS_ERROR_INT; + + /* if error: clear error interrupt, but doesn't return random number */ + if (err) { + dev_dbg(&rng_dev->dev, "Error while reading random number!\n"); + ctrl = __raw_readl(rng_base + RNGA_CONTROL); + __raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT, + rng_base + RNGA_CONTROL); + return 0; + } else + return 4; +} + +static int fsl_rnga_init(struct hwrng *rng) +{ + u32 ctrl, osc, rng_base = (u32) rng->priv; + + /* wake up */ + ctrl = __raw_readl(rng_base + RNGA_CONTROL); + __raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, rng_base + RNGA_CONTROL); + + /* verify if oscillator is working */ + osc = __raw_readl(rng_base + RNGA_STATUS); + if (osc & RNGA_STATUS_OSC_DEAD) { + dev_err(&rng_dev->dev, "RNGA Oscillator is dead!\n"); + return -ENODEV; + } + + /* go running */ + ctrl = __raw_readl(rng_base + RNGA_CONTROL); + __raw_writel(ctrl | RNGA_CONTROL_GO, rng_base + RNGA_CONTROL); + + return 0; +} + +static void fsl_rnga_cleanup(struct hwrng *rng) +{ + u32 ctrl, rng_base = (u32) rng->priv; + + ctrl = __raw_readl(rng_base + RNGA_CONTROL); + + /* stop rnga */ + __raw_writel(ctrl & ~RNGA_CONTROL_GO, rng_base + RNGA_CONTROL); +} + +static struct hwrng fsl_rnga = { + .name = "fsl-rnga", + .init = fsl_rnga_init, + .cleanup = fsl_rnga_cleanup, + .data_present = fsl_rnga_data_present, + .data_read = fsl_rnga_data_read +}; + +static int __init fsl_rnga_probe(struct platform_device *pdev) +{ + int err = -ENODEV; + struct clk *clk; + struct resource *res, *mem; + void __iomem *rng_base = NULL; + + if (rng_dev) + return -EBUSY; + + clk = clk_get(NULL, "rng_clk"); + + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Could not get rng_clk!\n"); + err = PTR_ERR(clk); + return err; + } + + clk_enable(clk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (!res) + return -ENOENT; + + mem = request_mem_region(res->start, res->end - res->start, pdev->name); + + if (mem == NULL) + return -EBUSY; + + dev_set_drvdata(&pdev->dev, mem); + rng_base = ioremap(res->start, res->end - res->start); + + fsl_rnga.priv = (unsigned long)rng_base; + + err = hwrng_register(&fsl_rnga); + if (err) { + dev_err(&pdev->dev, "FSL RNGA registering failed (%d)\n", err); + return err; + } + + rng_dev = pdev; + + dev_info(&pdev->dev, "FSL RNGA Registered.\n"); + + return 0; +} + +static int __exit fsl_rnga_remove(struct platform_device *pdev) +{ + struct resource *mem = dev_get_drvdata(&pdev->dev); + void __iomem *rng_base = (void __iomem *)fsl_rnga.priv; + + hwrng_unregister(&fsl_rnga); + + release_resource(mem); + + iounmap(rng_base); + + return 0; +} + +static struct platform_driver fsl_rnga_driver = { + .driver = { + .name = "fsl_rnga", + .owner = THIS_MODULE, + }, + .remove = __exit_p(fsl_rnga_remove), +}; + +static int __init mod_init(void) +{ + return platform_driver_probe(&fsl_rnga_driver, fsl_rnga_probe); +} + +static void __exit mod_exit(void) +{ + platform_driver_unregister(&fsl_rnga_driver); +} + +module_init(mod_init); +module_exit(mod_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("H/W RNGA driver for i.MX"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/char/hw_random/Makefile +++ linux-fsl-imx51-2.6.31/drivers/char/hw_random/Makefile @@ -7,6 +7,8 @@ obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o +obj-$(CONFIG_HW_RANDOM_FSL_RNGA) += fsl-rnga.o +obj-$(CONFIG_HW_RANDOM_FSL_RNGC) += fsl-rngc.o obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o n2-rng-y := n2-drv.o n2-asm.o --- linux-fsl-imx51-2.6.31.orig/drivers/char/hw_random/fsl-rngc.c +++ linux-fsl-imx51-2.6.31/drivers/char/hw_random/fsl-rngc.c @@ -0,0 +1,372 @@ +/* + * RNG driver for Freescale RNGC + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) + * (c) Copyright 2003 Red Hat Inc + * + * derived from + * + * Hardware driver for the AMD 768 Random Number Generator (RNG) + * (c) Copyright 2001 Red Hat Inc + * + * derived from + * + * Hardware driver for Intel i810 Random Number Generator (RNG) + * Copyright 2000,2001 Jeff Garzik + * Copyright 2000,2001 Philipp Rumpf + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RNGC_VERSION_MAJOR3 3 + +#define RNGC_VERSION_ID 0x0000 +#define RNGC_COMMAND 0x0004 +#define RNGC_CONTROL 0x0008 +#define RNGC_STATUS 0x000C +#define RNGC_ERROR 0x0010 +#define RNGC_FIFO 0x0014 +#define RNGC_VERIF_CTRL 0x0020 +#define RNGC_OSC_CTRL_COUNT 0x0028 +#define RNGC_OSC_COUNT 0x002C +#define RNGC_OSC_COUNT_STATUS 0x0030 + +#define RNGC_VERID_ZEROS_MASK 0x0f000000 +#define RNGC_VERID_RNG_TYPE_MASK 0xf0000000 +#define RNGC_VERID_RNG_TYPE_SHIFT 28 +#define RNGC_VERID_CHIP_VERSION_MASK 0x00ff0000 +#define RNGC_VERID_CHIP_VERSION_SHIFT 16 +#define RNGC_VERID_VERSION_MAJOR_MASK 0x0000ff00 +#define RNGC_VERID_VERSION_MAJOR_SHIFT 8 +#define RNGC_VERID_VERSION_MINOR_MASK 0x000000ff +#define RNGC_VERID_VERSION_MINOR_SHIFT 0 + +#define RNGC_CMD_ZEROS_MASK 0xffffff8c +#define RNGC_CMD_SW_RST 0x00000040 +#define RNGC_CMD_CLR_ERR 0x00000020 +#define RNGC_CMD_CLR_INT 0x00000010 +#define RNGC_CMD_SEED 0x00000002 +#define RNGC_CMD_SELF_TEST 0x00000001 + +#define RNGC_CTRL_ZEROS_MASK 0xfffffc8c +#define RNGC_CTRL_CTL_ACC 0x00000200 +#define RNGC_CTRL_VERIF_MODE 0x00000100 +#define RNGC_CTRL_MASK_ERROR 0x00000040 + +#define RNGC_CTRL_MASK_DONE 0x00000020 +#define RNGC_CTRL_AUTO_SEED 0x00000010 +#define RNGC_CTRL_FIFO_UFLOW_MASK 0x00000003 +#define RNGC_CTRL_FIFO_UFLOW_SHIFT 0 + +#define RNGC_CTRL_FIFO_UFLOW_ZEROS_ERROR 0 +#define RNGC_CTRL_FIFO_UFLOW_ZEROS_ERROR2 1 +#define RNGC_CTRL_FIFO_UFLOW_BUS_XFR 2 +#define RNGC_CTRL_FIFO_UFLOW_ZEROS_INTR 3 + +#define RNGC_STATUS_ST_PF_MASK 0x00c00000 +#define RNGC_STATUS_ST_PF_SHIFT 22 +#define RNGC_STATUS_ST_PF_TRNG 0x00800000 +#define RNGC_STATUS_ST_PF_PRNG 0x00400000 +#define RNGC_STATUS_ERROR 0x00010000 +#define RNGC_STATUS_FIFO_SIZE_MASK 0x0000f000 +#define RNGC_STATUS_FIFO_SIZE_SHIFT 12 +#define RNGC_STATUS_FIFO_LEVEL_MASK 0x00000f00 +#define RNGC_STATUS_FIFO_LEVEL_SHIFT 8 +#define RNGC_STATUS_NEXT_SEED_DONE 0x00000040 +#define RNGC_STATUS_SEED_DONE 0x00000020 +#define RNGC_STATUS_ST_DONE 0x00000010 +#define RNGC_STATUS_RESEED 0x00000008 +#define RNGC_STATUS_SLEEP 0x00000004 +#define RNGC_STATUS_BUSY 0x00000002 +#define RNGC_STATUS_SEC_STATE 0x00000001 + +#define RNGC_ERROR_STATUS_ZEROS_MASK 0xffffffc0 +#define RNGC_ERROR_STATUS_BAD_KEY 0x00000040 +#define RNGC_ERROR_STATUS_RAND_ERR 0x00000020 +#define RNGC_ERROR_STATUS_FIFO_ERR 0x00000010 +#define RNGC_ERROR_STATUS_STAT_ERR 0x00000008 +#define RNGC_ERROR_STATUS_ST_ERR 0x00000004 +#define RNGC_ERROR_STATUS_OSC_ERR 0x00000002 +#define RNGC_ERROR_STATUS_LFSR_ERR 0x00000001 + +#define RNG_ADDR_RANGE 0x34 + +static DECLARE_COMPLETION(rng_self_testing); +static DECLARE_COMPLETION(rng_seed_done); + +static struct platform_device *rng_dev; + +int irq_rng; + +static int fsl_rngc_data_present(struct hwrng *rng) +{ + int level; + u32 rngc_base = (u32) rng->priv; + + /* how many random numbers are in FIFO? [0-16] */ + level = (__raw_readl(rngc_base + RNGC_STATUS) & + RNGC_STATUS_FIFO_LEVEL_MASK) >> RNGC_STATUS_FIFO_LEVEL_SHIFT; + + return level > 0 ? 1 : 0; +} + +static int fsl_rngc_data_read(struct hwrng *rng, u32 * data) +{ + int err; + u32 rngc_base = (u32) rng->priv; + + /* retrieve a random number from FIFO */ + *data = __raw_readl(rngc_base + RNGC_FIFO); + + /* is there some error while reading this random number? */ + err = __raw_readl(rngc_base + RNGC_STATUS) & RNGC_STATUS_ERROR; + + /* if error happened doesn't return random number */ + return err ? 0 : 4; +} + +static irqreturn_t rngc_irq(int irq, void *dev) +{ + int handled = 0; + u32 rngc_base = (u32) dev; + + /* is the seed creation done? */ + if (__raw_readl(rngc_base + RNGC_STATUS) & RNGC_STATUS_SEED_DONE) { + complete(&rng_seed_done); + __raw_writel(RNGC_CMD_CLR_INT | RNGC_CMD_CLR_ERR, + rngc_base + RNGC_COMMAND); + handled = 1; + } + + /* is the self test done? */ + if (__raw_readl(rngc_base + RNGC_STATUS) & RNGC_STATUS_ST_DONE) { + complete(&rng_self_testing); + __raw_writel(RNGC_CMD_CLR_INT | RNGC_CMD_CLR_ERR, + rngc_base + RNGC_COMMAND); + handled = 1; + } + + /* is there any error? */ + if (__raw_readl(rngc_base + RNGC_STATUS) & RNGC_STATUS_ERROR) { + /* clear interrupt */ + __raw_writel(RNGC_CMD_CLR_INT | RNGC_CMD_CLR_ERR, + rngc_base + RNGC_COMMAND); + handled = 1; + } + + return handled; +} + +static int fsl_rngc_init(struct hwrng *rng) +{ + int err; + u32 cmd, ctrl, osc, rngc_base = (u32) rng->priv; + + INIT_COMPLETION(rng_self_testing); + INIT_COMPLETION(rng_seed_done); + + err = __raw_readl(rngc_base + RNGC_STATUS) & RNGC_STATUS_ERROR; + if (err) { + /* is this a bad keys error ? */ + if (__raw_readl(rngc_base + RNGC_ERROR) & + RNGC_ERROR_STATUS_BAD_KEY) { + dev_err(&rng_dev->dev, "Can't start, Bad Keys.\n"); + return -EIO; + } + } + + /* mask all interrupts, will be unmasked soon */ + ctrl = __raw_readl(rngc_base + RNGC_CONTROL); + __raw_writel(ctrl | RNGC_CTRL_MASK_DONE | RNGC_CTRL_MASK_ERROR, + rngc_base + RNGC_CONTROL); + + /* verify if oscillator is working */ + osc = __raw_readl(rngc_base + RNGC_ERROR); + if (osc & RNGC_ERROR_STATUS_OSC_ERR) { + dev_err(&rng_dev->dev, "RNGC Oscillator is dead!\n"); + return -EIO; + } + + err = request_irq(irq_rng, rngc_irq, 0, "fsl_rngc", (void *)rng->priv); + if (err) { + dev_err(&rng_dev->dev, "Can't get interrupt working.\n"); + return -EIO; + } + + /* do self test, repeat until get success */ + do { + /* clear error */ + cmd = __raw_readl(rngc_base + RNGC_COMMAND); + __raw_writel(cmd | RNGC_CMD_CLR_ERR, rngc_base + RNGC_COMMAND); + + /* unmask all interrupt */ + ctrl = __raw_readl(rngc_base + RNGC_CONTROL); + __raw_writel(ctrl & ~(RNGC_CTRL_MASK_DONE | + RNGC_CTRL_MASK_ERROR), rngc_base + RNGC_CONTROL); + + /* run self test */ + cmd = __raw_readl(rngc_base + RNGC_COMMAND); + __raw_writel(cmd | RNGC_CMD_SELF_TEST, + rngc_base + RNGC_COMMAND); + + wait_for_completion(&rng_self_testing); + + } while (__raw_readl(rngc_base + RNGC_ERROR) & + RNGC_ERROR_STATUS_ST_ERR); + + /* clear interrupt. Is it really necessary here? */ + __raw_writel(RNGC_CMD_CLR_INT | RNGC_CMD_CLR_ERR, + rngc_base + RNGC_COMMAND); + + /* create seed, repeat while there is some statistical error */ + do { + /* clear error */ + cmd = __raw_readl(rngc_base + RNGC_COMMAND); + __raw_writel(cmd | RNGC_CMD_CLR_ERR, rngc_base + RNGC_COMMAND); + + /* seed creation */ + cmd = __raw_readl(rngc_base + RNGC_COMMAND); + __raw_writel(cmd | RNGC_CMD_SEED, rngc_base + RNGC_COMMAND); + + wait_for_completion(&rng_seed_done); + + } while (__raw_readl(rngc_base + RNGC_ERROR) & + RNGC_ERROR_STATUS_STAT_ERR); + + err = __raw_readl(rngc_base + RNGC_ERROR) & + (RNGC_ERROR_STATUS_STAT_ERR | + RNGC_ERROR_STATUS_RAND_ERR | + RNGC_ERROR_STATUS_FIFO_ERR | + RNGC_ERROR_STATUS_ST_ERR | + RNGC_ERROR_STATUS_OSC_ERR | + RNGC_ERROR_STATUS_LFSR_ERR); + + if (err) { + dev_err(&rng_dev->dev, "FSL RNGC appears inoperable.\n"); + return -EIO; + } + + return 0; +} + +static struct hwrng fsl_rngc = { + .name = "fsl-rngc", + .init = fsl_rngc_init, + .data_present = fsl_rngc_data_present, + .data_read = fsl_rngc_data_read +}; + +static int __init fsl_rngc_probe(struct platform_device *pdev) +{ + int err = -ENODEV; + struct clk *clk; + struct resource *res, *mem; + void __iomem *rngc_base = NULL; + + if (rng_dev) + return -EBUSY; + + clk = clk_get(NULL, "rng_clk"); + + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Can not get rng_clk\n"); + err = PTR_ERR(clk); + return err; + } + + clk_enable(clk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (!res) + return -ENOENT; + + mem = request_mem_region(res->start, res->end - res->start, pdev->name); + + if (mem == NULL) + return -EBUSY; + + dev_set_drvdata(&pdev->dev, mem); + rngc_base = ioremap(res->start, res->end - res->start); + + fsl_rngc.priv = (unsigned long)rngc_base; + + irq_rng = platform_get_irq(pdev, 0); + + err = hwrng_register(&fsl_rngc); + if (err) { + dev_err(&pdev->dev, "FSL RNGC registering failed (%d)\n", err); + return err; + } + + rng_dev = pdev; + + dev_info(&pdev->dev, "FSL RNGC Registered.\n"); + + return 0; +} + +static int __exit fsl_rngc_remove(struct platform_device *pdev) +{ + struct resource *mem = dev_get_drvdata(&pdev->dev); + void __iomem *rngc_base = (void __iomem *)fsl_rngc.priv; + + hwrng_unregister(&fsl_rngc); + + release_resource(mem); + + iounmap(rngc_base); + + return 0; +} + +static struct platform_driver fsl_rngc_driver = { + .driver = { + .name = "fsl_rngc", + .owner = THIS_MODULE, + }, + .remove = __exit_p(fsl_rngc_remove), +}; + +static int __init mod_init(void) +{ + return platform_driver_probe(&fsl_rngc_driver, fsl_rngc_probe); +} + +static void __exit mod_exit(void) +{ + platform_driver_unregister(&fsl_rngc_driver); +} + +module_init(mod_init); +module_exit(mod_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("H/W RNGC driver for i.MX"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/char/agp/intel-agp.c +++ linux-fsl-imx51-2.6.31/drivers/char/agp/intel-agp.c @@ -36,6 +36,10 @@ #define PCI_DEVICE_ID_INTEL_Q35_IG 0x29B2 #define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0 #define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2 +#define PCI_DEVICE_ID_INTEL_B43_HB 0x2E40 +#define PCI_DEVICE_ID_INTEL_B43_IG 0x2E42 +#define PCI_DEVICE_ID_INTEL_B43_1_HB 0x2E90 +#define PCI_DEVICE_ID_INTEL_B43_1_IG 0x2E92 #define PCI_DEVICE_ID_INTEL_GM45_HB 0x2A40 #define PCI_DEVICE_ID_INTEL_GM45_IG 0x2A42 #define PCI_DEVICE_ID_INTEL_IGD_E_HB 0x2E00 @@ -50,6 +54,7 @@ #define PCI_DEVICE_ID_INTEL_IGDNG_D_IG 0x0042 #define PCI_DEVICE_ID_INTEL_IGDNG_M_HB 0x0044 #define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB 0x0062 +#define PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB 0x006a #define PCI_DEVICE_ID_INTEL_IGDNG_M_IG 0x0046 /* cover 915 and 945 variants */ @@ -81,9 +86,12 @@ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \ + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \ + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_1_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \ - agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB) + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \ + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB) extern int agp_memory_reserved; @@ -679,23 +687,39 @@ if (!intel_private.i8xx_page) return; - /* make page uncached */ - map_page_into_agp(intel_private.i8xx_page); - intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page); if (!intel_private.i8xx_flush_page) intel_i830_fini_flush(); } +static void +do_wbinvd(void *null) +{ + wbinvd(); +} + +/* The chipset_flush interface needs to get data that has already been + * flushed out of the CPU all the way out to main memory, because the GPU + * doesn't snoop those buffers. + * + * The 8xx series doesn't have the same lovely interface for flushing the + * chipset write buffers that the later chips do. According to the 865 + * specs, it's 64 octwords, or 1KB. So, to get those previous things in + * that buffer out, we just fill 1KB and clflush it out, on the assumption + * that it'll push whatever was in there out. It appears to work. + */ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) { unsigned int *pg = intel_private.i8xx_flush_page; - int i; - for (i = 0; i < 256; i += 2) - *(pg + i) = i; + memset(pg, 0, 1024); - wmb(); + if (cpu_has_clflush) { + clflush_cache_range(pg, 1024); + } else { + if (on_each_cpu(do_wbinvd, NULL, 1) != 0) + printk(KERN_ERR "Timed out waiting for cache flush.\n"); + } } /* The intel i830 automatically initializes the agp aperture during POST. @@ -1216,9 +1240,12 @@ case PCI_DEVICE_ID_INTEL_Q45_HB: case PCI_DEVICE_ID_INTEL_G45_HB: case PCI_DEVICE_ID_INTEL_G41_HB: + case PCI_DEVICE_ID_INTEL_B43_HB: + case PCI_DEVICE_ID_INTEL_B43_1_HB: case PCI_DEVICE_ID_INTEL_IGDNG_D_HB: case PCI_DEVICE_ID_INTEL_IGDNG_M_HB: case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB: + case PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB: *gtt_offset = *gtt_size = MB(2); break; default: @@ -2192,6 +2219,10 @@ "Q45/Q43", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0, "G45/G43", NULL, &intel_i965_driver }, + { PCI_DEVICE_ID_INTEL_B43_HB, PCI_DEVICE_ID_INTEL_B43_IG, 0, + "B43", NULL, &intel_i965_driver }, + { PCI_DEVICE_ID_INTEL_B43_1_HB, PCI_DEVICE_ID_INTEL_B43_1_IG, 0, + "B43", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0, "G41", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_IGDNG_D_HB, PCI_DEVICE_ID_INTEL_IGDNG_D_IG, 0, @@ -2200,6 +2231,8 @@ "IGDNG/M", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0, "IGDNG/MA", NULL, &intel_i965_driver }, + { PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0, + "IGDNG/MC2", NULL, &intel_i965_driver }, { 0, 0, 0, NULL, NULL, NULL } }; @@ -2313,15 +2346,6 @@ struct agp_bridge_data *bridge = pci_get_drvdata(pdev); int ret_val; - pci_restore_state(pdev); - - /* We should restore our graphics device's config space, - * as host bridge (00:00) resumes before graphics device (02:00), - * then our access to its pci space can work right. - */ - if (intel_private.pcidev) - pci_restore_state(intel_private.pcidev); - if (bridge->driver == &intel_generic_driver) intel_configure(); else if (bridge->driver == &intel_850_driver) @@ -2401,9 +2425,12 @@ ID(PCI_DEVICE_ID_INTEL_Q45_HB), ID(PCI_DEVICE_ID_INTEL_G45_HB), ID(PCI_DEVICE_ID_INTEL_G41_HB), + ID(PCI_DEVICE_ID_INTEL_B43_HB), + ID(PCI_DEVICE_ID_INTEL_B43_1_HB), ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB), ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB), ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB), + ID(PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB), { } }; @@ -2434,5 +2461,6 @@ module_init(agp_intel_init); module_exit(agp_intel_cleanup); +MODULE_EXPORT(intel_agp); MODULE_AUTHOR("Dave Jones "); MODULE_LICENSE("GPL and additional rights"); --- linux-fsl-imx51-2.6.31.orig/drivers/char/agp/generic.c +++ linux-fsl-imx51-2.6.31/drivers/char/agp/generic.c @@ -123,6 +123,9 @@ struct agp_memory *new; unsigned long alloc_size = num_agp_pages*sizeof(struct page *); + if (INT_MAX/sizeof(struct page *) < num_agp_pages) + return NULL; + new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL); if (new == NULL) return NULL; @@ -242,11 +245,14 @@ int scratch_pages; struct agp_memory *new; size_t i; + int cur_memory; if (!bridge) return NULL; - if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp) + cur_memory = atomic_read(&bridge->current_memory_agp); + if ((cur_memory + page_count > bridge->max_memory_agp) || + (cur_memory + page_count < page_count)) return NULL; if (type >= AGP_USER_TYPES) { @@ -1114,8 +1120,8 @@ return -EINVAL; } - /* AK: could wrap */ - if ((pg_start + mem->page_count) > num_entries) + if (((pg_start + mem->page_count) > num_entries) || + ((pg_start + mem->page_count) < pg_start)) return -EINVAL; j = pg_start; @@ -1147,7 +1153,7 @@ { size_t i; struct agp_bridge_data *bridge; - int mask_type; + int mask_type, num_entries; bridge = mem->bridge; if (!bridge) @@ -1159,6 +1165,11 @@ if (type != mem->type) return -EINVAL; + num_entries = agp_num_entries(); + if (((pg_start + mem->page_count) > num_entries) || + ((pg_start + mem->page_count) < pg_start)) + return -EINVAL; + mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); if (mask_type != 0) { /* The generic routines know nothing of memory types */ --- linux-fsl-imx51-2.6.31.orig/drivers/char/ip2/ip2main.c +++ linux-fsl-imx51-2.6.31/drivers/char/ip2/ip2main.c @@ -183,6 +183,8 @@ static int ip2_tiocmget(struct tty_struct *tty, struct file *file); static int ip2_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear); +static int ip2_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount); static void set_irq(int, int); static void ip2_interrupt_bh(struct work_struct *work); @@ -448,6 +450,7 @@ .hangup = ip2_hangup, .tiocmget = ip2_tiocmget, .tiocmset = ip2_tiocmset, + .get_icount = ip2_get_icount, .proc_fops = &ip2_proc_fops, }; @@ -2112,7 +2115,6 @@ i2ChanStrPtr pCh = DevTable[tty->index]; i2eBordStrPtr pB; struct async_icount cprev, cnow; /* kernel counter temps */ - struct serial_icounter_struct __user *p_cuser; int rc = 0; unsigned long flags; void __user *argp = (void __user *)arg; @@ -2281,34 +2283,6 @@ break; /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for RI where - * only 0->1 is counted. The controller is quite capable of counting - * both, but this done to preserve compatibility with the standard - * serial driver. - */ - case TIOCGICOUNT: - ip2trace (CHANN, ITRC_IOCTL, 11, 1, rc ); - - write_lock_irqsave(&pB->read_fifo_spinlock, flags); - cnow = pCh->icount; - write_unlock_irqrestore(&pB->read_fifo_spinlock, flags); - p_cuser = argp; - rc = put_user(cnow.cts, &p_cuser->cts); - rc = put_user(cnow.dsr, &p_cuser->dsr); - rc = put_user(cnow.rng, &p_cuser->rng); - rc = put_user(cnow.dcd, &p_cuser->dcd); - rc = put_user(cnow.rx, &p_cuser->rx); - rc = put_user(cnow.tx, &p_cuser->tx); - rc = put_user(cnow.frame, &p_cuser->frame); - rc = put_user(cnow.overrun, &p_cuser->overrun); - rc = put_user(cnow.parity, &p_cuser->parity); - rc = put_user(cnow.brk, &p_cuser->brk); - rc = put_user(cnow.buf_overrun, &p_cuser->buf_overrun); - break; - - /* * The rest are not supported by this driver. By returning -ENOIOCTLCMD they * will be passed to the line discipline for it to handle. */ @@ -2332,6 +2306,46 @@ return rc; } +static int ip2_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + i2ChanStrPtr pCh = DevTable[tty->index]; + i2eBordStrPtr pB; + struct async_icount cnow; /* kernel counter temp */ + unsigned long flags; + + if ( pCh == NULL ) + return -ENODEV; + + pB = pCh->pMyBord; + + /* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for RI where + * only 0->1 is counted. The controller is quite capable of counting + * both, but this done to preserve compatibility with the standard + * serial driver. + */ + + write_lock_irqsave(&pB->read_fifo_spinlock, flags); + cnow = pCh->icount; + write_unlock_irqrestore(&pB->read_fifo_spinlock, flags); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + return 0; +} + /******************************************************************************/ /* Function: GetSerialInfo() */ /* Parameters: Pointer to channel structure */ --- linux-fsl-imx51-2.6.31.orig/drivers/char/tpm/tpm_tis.c +++ linux-fsl-imx51-2.6.31/drivers/char/tpm/tpm_tis.c @@ -450,6 +450,12 @@ goto out_err; } + /* Default timeouts */ + chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); + chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); + chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); + chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); + if (request_locality(chip, 0) != 0) { rc = -ENODEV; goto out_err; @@ -457,12 +463,6 @@ vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); - /* Default timeouts */ - chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); - chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); - chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); - chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); - dev_info(dev, "1.2 TPM (device-id 0x%X, rev-id %d)\n", vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); --- linux-fsl-imx51-2.6.31.orig/drivers/char/tpm/tpm.c +++ linux-fsl-imx51-2.6.31/drivers/char/tpm/tpm.c @@ -696,8 +696,7 @@ cmd.header.in = pcrread_header; cmd.params.pcrread_in.pcr_idx = cpu_to_be32(pcr_idx); - BUILD_BUG_ON(cmd.header.in.length > READ_PCR_RESULT_SIZE); - rc = transmit_cmd(chip, &cmd, cmd.header.in.length, + rc = transmit_cmd(chip, &cmd, READ_PCR_RESULT_SIZE, "attempting to read a pcr value"); if (rc == 0) @@ -742,7 +741,7 @@ * the module usage count. */ #define TPM_ORD_PCR_EXTEND cpu_to_be32(20) -#define EXTEND_PCR_SIZE 34 +#define EXTEND_PCR_RESULT_SIZE 34 static struct tpm_input_header pcrextend_header = { .tag = TPM_TAG_RQU_COMMAND, .length = cpu_to_be32(34), @@ -760,10 +759,9 @@ return -ENODEV; cmd.header.in = pcrextend_header; - BUILD_BUG_ON(be32_to_cpu(cmd.header.in.length) > EXTEND_PCR_SIZE); cmd.params.pcrextend_in.pcr_idx = cpu_to_be32(pcr_idx); memcpy(cmd.params.pcrextend_in.hash, hash, TPM_DIGEST_SIZE); - rc = transmit_cmd(chip, &cmd, cmd.header.in.length, + rc = transmit_cmd(chip, &cmd, EXTEND_PCR_RESULT_SIZE, "attempting extend a PCR value"); module_put(chip->dev->driver->owner); @@ -955,7 +953,7 @@ return -EBUSY; } - chip->data_buffer = kmalloc(TPM_BUFSIZE * sizeof(u8), GFP_KERNEL); + chip->data_buffer = kzalloc(TPM_BUFSIZE, GFP_KERNEL); if (chip->data_buffer == NULL) { clear_bit(0, &chip->is_open); put_device(chip->dev); @@ -1027,6 +1025,7 @@ { struct tpm_chip *chip = file->private_data; ssize_t ret_size; + int rc; del_singleshot_timer_sync(&chip->user_read_timer); flush_scheduled_work(); @@ -1037,8 +1036,11 @@ ret_size = size; mutex_lock(&chip->buffer_mutex); - if (copy_to_user(buf, chip->data_buffer, ret_size)) + rc = copy_to_user(buf, chip->data_buffer, ret_size); + memset(chip->data_buffer, 0, ret_size); + if (rc) ret_size = -EFAULT; + mutex_unlock(&chip->buffer_mutex); } --- linux-fsl-imx51-2.6.31.orig/drivers/char/pcmcia/synclink_cs.c +++ linux-fsl-imx51-2.6.31/drivers/char/pcmcia/synclink_cs.c @@ -2252,6 +2252,32 @@ return 0; } +static int mgslpc_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; + struct mgsl_icount cnow; /* kernel counter temps */ + unsigned long flags; + + spin_lock_irqsave(&info->lock,flags); + cnow = info->icount; + spin_unlock_irqrestore(&info->lock,flags); + + icount->cts = cnow.cts; + icount->dsr = cnow.dsr; + icount->rng = cnow.rng; + icount->dcd = cnow.dcd; + icount->rx = cnow.rx; + icount->tx = cnow.tx; + icount->frame = cnow.frame; + icount->overrun = cnow.overrun; + icount->parity = cnow.parity; + icount->brk = cnow.brk; + icount->buf_overrun = cnow.buf_overrun; + + return 0; +} + /* Service an IOCTL request * * Arguments: @@ -2267,11 +2293,7 @@ unsigned int cmd, unsigned long arg) { MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; - int error; - struct mgsl_icount cnow; /* kernel counter temps */ - struct serial_icounter_struct __user *p_cuser; /* user space */ void __user *argp = (void __user *)arg; - unsigned long flags; if (debug_level >= DEBUG_LEVEL_INFO) printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__, @@ -2281,7 +2303,7 @@ return -ENODEV; if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + (cmd != TIOCMIWAIT)) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -2311,34 +2333,6 @@ return wait_events(info, argp); case TIOCMIWAIT: return modem_input_wait(info,(int)arg); - case TIOCGICOUNT: - spin_lock_irqsave(&info->lock,flags); - cnow = info->icount; - spin_unlock_irqrestore(&info->lock,flags); - p_cuser = argp; - PUT_USER(error,cnow.cts, &p_cuser->cts); - if (error) return error; - PUT_USER(error,cnow.dsr, &p_cuser->dsr); - if (error) return error; - PUT_USER(error,cnow.rng, &p_cuser->rng); - if (error) return error; - PUT_USER(error,cnow.dcd, &p_cuser->dcd); - if (error) return error; - PUT_USER(error,cnow.rx, &p_cuser->rx); - if (error) return error; - PUT_USER(error,cnow.tx, &p_cuser->tx); - if (error) return error; - PUT_USER(error,cnow.frame, &p_cuser->frame); - if (error) return error; - PUT_USER(error,cnow.overrun, &p_cuser->overrun); - if (error) return error; - PUT_USER(error,cnow.parity, &p_cuser->parity); - if (error) return error; - PUT_USER(error,cnow.brk, &p_cuser->brk); - if (error) return error; - PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun); - if (error) return error; - return 0; default: return -ENOIOCTLCMD; } --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/osl.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/osl.c @@ -1182,7 +1182,13 @@ res_list_elem->name, (long long) res_list_elem->start, (long long) res_list_elem->end); - printk(KERN_INFO "ACPI: Device needs an ACPI driver\n"); + if (acpi_enforce_resources == ENFORCE_RESOURCES_LAX) + printk(KERN_NOTICE "ACPI: This conflict may" + " cause random problems and system" + " instability\n"); + printk(KERN_INFO "ACPI: If an ACPI driver is available" + " for this device, you should use it instead of" + " the native driver\n"); } if (acpi_enforce_resources == ENFORCE_RESOURCES_STRICT) return -EBUSY; --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/video_detect.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/video_detect.c @@ -82,7 +82,7 @@ return 0; /* Does this device able to support video switching ? */ - if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOD", &h_dummy)) && + if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOD", &h_dummy)) || ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOS", &h_dummy))) video_caps |= ACPI_VIDEO_OUTPUT_SWITCHING; --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/processor_idle.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/processor_idle.c @@ -104,6 +104,12 @@ /* Actually this shouldn't be __cpuinitdata, would be better to fix the callers to only run once -AK */ static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { + { set_max_cstate, "IBM ThinkPad R40e", { + DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), + DMI_MATCH(DMI_BIOS_VERSION,"1SET")}, (void *)1}, + { set_max_cstate, "Medion 41700", { + DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), + DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, { set_max_cstate, "Clevo 5600D", { DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, @@ -297,6 +303,17 @@ pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency; pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency; + /* + * FADT specified C2 latency must be less than or equal to + * 100 microseconds. + */ + if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { + ACPI_DEBUG_PRINT((ACPI_DB_INFO, + "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency)); + /* invalidate C2 */ + pr->power.states[ACPI_STATE_C2].address = 0; + } + ACPI_DEBUG_PRINT((ACPI_DB_INFO, "lvl2[0x%08x] lvl3[0x%08x]\n", pr->power.states[ACPI_STATE_C2].address, @@ -493,16 +510,6 @@ return; /* - * C2 latency must be less than or equal to 100 - * microseconds. - */ - else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { - ACPI_DEBUG_PRINT((ACPI_DB_INFO, - "latency too large [%d]\n", cx->latency)); - return; - } - - /* * Otherwise we've met all of our C2 requirements. * Normalize the C2 latency to expidite policy */ --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/ac.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/ac.c @@ -243,6 +243,7 @@ acpi_bus_generate_netlink_event(device->pnp.device_class, dev_name(&device->dev), event, (u32) ac->state); + acpi_notifier_call_chain(device, event, (u32) ac->state); #ifdef CONFIG_ACPI_SYSFS_POWER kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE); #endif --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/pci_slot.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/pci_slot.c @@ -57,7 +57,7 @@ MY_NAME , ## arg); \ } while (0) -#define SLOT_NAME_SIZE 20 /* Inspired by #define in acpiphp.h */ +#define SLOT_NAME_SIZE 21 /* Inspired by #define in acpiphp.h */ struct acpi_pci_slot { acpi_handle root_handle; /* handle of the root bridge */ @@ -149,7 +149,7 @@ return AE_OK; } - snprintf(name, sizeof(name), "%u", (u32)sun); + snprintf(name, sizeof(name), "%llu", sun); pci_slot = pci_create_slot(pci_bus, device, name, NULL); if (IS_ERR(pci_slot)) { err("pci_create_slot returned %ld\n", PTR_ERR(pci_slot)); --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/pci_root.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/pci_root.c @@ -400,6 +400,17 @@ pbus = pdev->subordinate; pci_dev_put(pdev); + + /* + * This function may be called for a non-PCI device that has a + * PCI parent (eg. a disk under a PCI SATA controller). In that + * case pdev->subordinate will be NULL for the parent. + */ + if (!pbus) { + dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n"); + pdev = NULL; + break; + } } out: list_for_each_entry_safe(node, tmp, &device_list, node) --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/sleep.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/sleep.c @@ -405,6 +405,46 @@ }, }, { + .callback = init_set_sci_en_on_resume, + .ident = "Hewlett-Packard HP Pavilion dv3 Notebook PC", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv3 Notebook PC"), + }, + }, + { + .callback = init_set_sci_en_on_resume, + .ident = "Hewlett-Packard Pavilion dv4", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"), + }, + }, + { + .callback = init_set_sci_en_on_resume, + .ident = "Hewlett-Packard Pavilion dv7", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"), + }, + }, + { + .callback = init_set_sci_en_on_resume, + .ident = "Hewlett-Packard Compaq Presario C700 Notebook PC", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario C700 Notebook PC"), + }, + }, + { + .callback = init_set_sci_en_on_resume, + .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"), + }, + }, + { .callback = init_old_suspend_ordering, .ident = "Panasonic CF51-2L", .matches = { --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/scan.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/scan.c @@ -1264,16 +1264,6 @@ acpi_device_set_id(device, parent, handle, type); /* - * The ACPI device is attached to acpi handle before getting - * the power/wakeup/peformance flags. Otherwise OS can't get - * the corresponding ACPI device by the acpi handle in the course - * of getting the power/wakeup/performance flags. - */ - result = acpi_device_set_context(device, type); - if (result) - goto end; - - /* * Power Management * ---------------- */ @@ -1303,6 +1293,8 @@ goto end; } + if ((result = acpi_device_set_context(device, type))) + goto end; result = acpi_device_register(device, parent); --- linux-fsl-imx51-2.6.31.orig/drivers/acpi/video.c +++ linux-fsl-imx51-2.6.31/drivers/acpi/video.c @@ -603,6 +603,7 @@ unsigned long long *level) { acpi_status status = AE_OK; + int i; if (device->cap._BQC || device->cap._BCQ) { char *buf = device->cap._BQC ? "_BQC" : "_BCQ"; @@ -618,8 +619,15 @@ } *level += bqc_offset_aml_bug_workaround; - device->brightness->curr = *level; - return 0; + for (i = 2; i < device->brightness->count; i++) + if (device->brightness->levels[i] == *level) { + device->brightness->curr = *level; + return 0; + } + /* BQC returned an invalid level. Stop using it. */ + ACPI_WARNING((AE_INFO, "%s returned an invalid level", + buf)); + device->cap._BQC = device->cap._BCQ = 0; } else { /* Fixme: * should we return an error or ignore this failure? @@ -870,7 +878,7 @@ br->flags._BCM_use_index = br->flags._BCL_use_index; /* _BQC uses INDEX while _BCL uses VALUE in some laptops */ - br->curr = level_old = max_level; + br->curr = level = max_level; if (!device->cap._BQC) goto set_level; @@ -892,15 +900,25 @@ br->flags._BQC_use_index = (level == max_level ? 0 : 1); - if (!br->flags._BQC_use_index) + if (!br->flags._BQC_use_index) { + /* + * Set the backlight to the initial state. + * On some buggy laptops, _BQC returns an uninitialized value + * when invoked for the first time, i.e. level_old is invalid. + * set the backlight to max_level in this case + */ + for (i = 2; i < br->count; i++) + if (level_old == br->levels[i]) + level = level_old; goto set_level; + } if (br->flags._BCL_reversed) level_old = (br->count - 1) - level_old; - level_old = br->levels[level_old]; + level = br->levels[level_old]; set_level: - result = acpi_video_device_lcd_set_level(device, level_old); + result = acpi_video_device_lcd_set_level(device, level); if (result) goto out_free_levels; @@ -1083,7 +1101,12 @@ */ /* Does this device support video switching? */ - if (video->cap._DOS) { + if (video->cap._DOS || video->cap._DOD) { + if (!video->cap._DOS) { + printk(KERN_WARNING FW_BUG + "ACPI(%s) defines _DOD but not _DOS\n", + acpi_device_bid(video->device)); + } video->flags.multihead = 1; status = 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/xen/Makefile +++ linux-fsl-imx51-2.6.31/drivers/xen/Makefile @@ -1,6 +1,9 @@ obj-y += grant-table.o features.o events.o manage.o obj-y += xenbus/ +nostackp := $(call cc-option, -fno-stack-protector) +CFLAGS_features.o := $(nostackp) + obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o obj-$(CONFIG_XEN_XENCOMM) += xencomm.o obj-$(CONFIG_XEN_BALLOON) += balloon.o --- linux-fsl-imx51-2.6.31.orig/drivers/message/fusion/mptbase.c +++ linux-fsl-imx51-2.6.31/drivers/message/fusion/mptbase.c @@ -1015,9 +1015,9 @@ { SGESimple64_t *pSge = (SGESimple64_t *) pAddr; pSge->Address.Low = cpu_to_le32 - (lower_32_bits((unsigned long)(dma_addr))); + (lower_32_bits(dma_addr)); pSge->Address.High = cpu_to_le32 - (upper_32_bits((unsigned long)dma_addr)); + (upper_32_bits(dma_addr)); pSge->FlagsLength = cpu_to_le32 ((flagslength | MPT_SGE_FLAGS_64_BIT_ADDRESSING)); } @@ -1038,8 +1038,8 @@ u32 tmp; pSge->Address.Low = cpu_to_le32 - (lower_32_bits((unsigned long)(dma_addr))); - tmp = (u32)(upper_32_bits((unsigned long)dma_addr)); + (lower_32_bits(dma_addr)); + tmp = (u32)(upper_32_bits(dma_addr)); /* * 1078 errata workaround for the 36GB limitation @@ -1101,7 +1101,7 @@ pChain->NextChainOffset = next; pChain->Address.Low = cpu_to_le32(tmp); - tmp = (u32)(upper_32_bits((unsigned long)dma_addr)); + tmp = (u32)(upper_32_bits(dma_addr)); pChain->Address.High = cpu_to_le32(tmp); } @@ -3266,6 +3266,16 @@ pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus); pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo); pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices); + /* + * VMware emulation is broken, its PortFact's MaxDevices reports value + * programmed by IOC Init, so if you program IOC Init to 256 (which is 0, + * as that field is only 8 bit), it reports back 0 in port facts, instead + * of 256... And unfortunately using 256 triggers another bug in the + * code (parallel SCSI can have only 16 devices). + */ + if (pfacts->MaxDevices == 0) { + pfacts->MaxDevices = 16; + } pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID); pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags); pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers); --- linux-fsl-imx51-2.6.31.orig/drivers/s390/block/dasd_diag.c +++ linux-fsl-imx51-2.6.31/drivers/s390/block/dasd_diag.c @@ -145,6 +145,15 @@ mdsk_term_io(device); rc = mdsk_init_io(device, device->block->bp_block, 0, NULL); + if (rc == 4) { + if (!(device->features & DASD_FEATURE_READONLY)) { + dev_warn(&device->cdev->dev, + "The access mode of a DIAG device changed" + " to read-only"); + device->features |= DASD_FEATURE_READONLY; + } + rc = 0; + } if (rc) dev_warn(&device->cdev->dev, "DIAG ERP failed with " "rc=%d\n", rc); @@ -433,16 +442,20 @@ for (sb = 512; sb < bsize; sb = sb << 1) block->s2b_shift++; rc = mdsk_init_io(device, block->bp_block, 0, NULL); - if (rc) { + if (rc && (rc != 4)) { dev_warn(&device->cdev->dev, "DIAG initialization " "failed with rc=%d\n", rc); rc = -EIO; } else { + if (rc == 4) + device->features |= DASD_FEATURE_READONLY; dev_info(&device->cdev->dev, - "New DASD with %ld byte/block, total size %ld KB\n", + "New DASD with %ld byte/block, total size %ld KB%s\n", (unsigned long) block->bp_block, (unsigned long) (block->blocks << - block->s2b_shift) >> 1); + block->s2b_shift) >> 1, + (rc == 4) ? ", read-only device" : ""); + rc = 0; } out_label: free_page((long) label); --- linux-fsl-imx51-2.6.31.orig/drivers/staging/rt2860/common/cmm_data_2860.c +++ linux-fsl-imx51-2.6.31/drivers/staging/rt2860/common/cmm_data_2860.c @@ -363,6 +363,8 @@ ULONG SwIdx = pAd->MgmtRing.TxCpuIdx; pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[SwIdx].AllocVa; + if (!pTxD) + return 0; pAd->MgmtRing.Cell[SwIdx].pNdisPacket = pPacket; pAd->MgmtRing.Cell[SwIdx].pNextNdisPacket = NULL; --- linux-fsl-imx51-2.6.31.orig/drivers/staging/rt2870/rt2870.h +++ linux-fsl-imx51-2.6.31/drivers/staging/rt2870/rt2870.h @@ -142,6 +142,7 @@ {USB_DEVICE(0x0789,0x0163)}, /* Logitec */ \ {USB_DEVICE(0x0789,0x0164)}, /* Logitec */ \ {USB_DEVICE(0x7392,0x7717)}, /* Edimax */ \ + {USB_DEVICE(0x1737,0x0071)}, /* Linksys */ \ { }/* Terminating entry */ \ } #endif --- linux-fsl-imx51-2.6.31.orig/drivers/staging/rt3070/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/staging/rt3070/Kconfig @@ -1,6 +1,6 @@ config RT3070 tristate "Ralink 3070 wireless support" - depends on USB && X86 && WLAN_80211 + depends on USB && WLAN_80211 ---help--- This is an experimental driver for the Ralink 3070 wireless chip. --- linux-fsl-imx51-2.6.31.orig/drivers/staging/pohmelfs/config.c +++ linux-fsl-imx51-2.6.31/drivers/staging/pohmelfs/config.c @@ -446,11 +446,13 @@ return err; } -static void pohmelfs_cn_callback(void *data) +static void pohmelfs_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { - struct cn_msg *msg = data; int err; + if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) + return; + switch (msg->flags) { case POHMELFS_FLAGS_ADD: case POHMELFS_FLAGS_DEL: --- linux-fsl-imx51-2.6.31.orig/drivers/staging/dst/dcore.c +++ linux-fsl-imx51-2.6.31/drivers/staging/dst/dcore.c @@ -846,15 +846,19 @@ /* * Configuration parser. */ -static void cn_dst_callback(void *data) +static void cn_dst_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { struct dst_ctl *ctl; - struct cn_msg *msg = data; int err; struct dst_ctl_ack ack; struct dst_node *n = NULL, *tmp; unsigned int hash; + if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) { + err = -EPERM; + goto out; + } + if (msg->len < sizeof(struct dst_ctl)) { err = -EBADMSG; goto out; --- linux-fsl-imx51-2.6.31.orig/drivers/staging/comedi/comedi_fops.c +++ linux-fsl-imx51-2.6.31/drivers/staging/comedi/comedi_fops.c @@ -359,8 +359,8 @@ /* fill devinfo structure */ devinfo.version_code = COMEDI_VERSION_CODE; devinfo.n_subdevs = dev->n_subdevices; - memcpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN); - memcpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN); + strlcpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN); + strlcpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN); if (read_subdev) devinfo.read_subdevice = read_subdev - dev->subdevices; --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/i2c-core.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/i2c-core.c @@ -718,6 +718,7 @@ { int res = 0; struct i2c_adapter *found; + struct i2c_client *client, *next; /* First make sure that this adapter was ever added */ mutex_lock(&core_lock); @@ -737,6 +738,16 @@ if (res) return res; + /* Remove devices instantiated from sysfs */ + list_for_each_entry_safe(client, next, &userspace_devices, detected) { + if (client->adapter == adap) { + dev_dbg(&adap->dev, "Removing %s at 0x%x\n", + client->name, client->addr); + list_del(&client->detected); + i2c_unregister_device(client); + } + } + /* Detach any active clients. This can't fail, thus we do not checking the returned value. */ res = device_for_each_child(&adap->dev, NULL, __unregister_client); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/chips/tsl2550.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/chips/tsl2550.c @@ -277,6 +277,7 @@ static ssize_t __tsl2550_show_lux(struct i2c_client *client, char *buf) { + struct tsl2550_data *data = i2c_get_clientdata(client); u8 ch0, ch1; int ret; @@ -296,6 +297,8 @@ ret = tsl2550_calculate_lux(ch0, ch1); if (ret < 0) return ret; + if (data->operating_mode == 1) + ret *= 5; return sprintf(buf, "%d\n", ret); } --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/mxc_i2c_hs.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/mxc_i2c_hs.c @@ -0,0 +1,550 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_i2c_hs_reg.h" + +typedef struct { + struct device *dev; + + void __iomem *reg_base_virt; + unsigned long reg_base_phy; + int irq; + unsigned int speed; + struct clk *ipg_clk; + struct clk *serial_clk; + bool low_power; + + struct i2c_msg *msg; + int index; +} mxc_i2c_hs; + +struct clk_div_table { + int reg_value; + int div; +}; + +static const struct clk_div_table i2c_clk_table[] = { + {0x0, 16}, {0x1, 18}, {0x2, 20}, {0x3, 22}, + {0x20, 24}, {0x21, 26}, {0x22, 28}, {0x23, 30}, + {0x4, 32}, {0x5, 36}, {0x6, 40}, {0x7, 44}, + {0x24, 48}, {0x25, 52}, {0x26, 56}, {0x27, 60}, + {0x8, 64}, {0x9, 72}, {0xa, 80}, {0xb, 88}, + {0x28, 96}, {0x29, 104}, {0x2a, 112}, {0x2b, 120}, + {0xc, 128}, {0xd, 144}, {0xe, 160}, {0xf, 176}, + {0x2c, 192}, {0x2d, 208}, {0x2e, 224}, {0x2f, 240}, + {0x10, 256}, {0x11, 288}, {0x12, 320}, {0x13, 352}, + {0x30, 384}, {0x31, 416}, {0x32, 448}, {0x33, 480}, + {0x14, 512}, {0x15, 576}, {0x16, 640}, {0x17, 704}, + {0x34, 768}, {0x35, 832}, {0x36, 896}, {0x37, 960}, + {0x18, 1024}, {0x19, 1152}, {0x1a, 1280}, {0x1b, 1408}, + {0x38, 1536}, {0x39, 1664}, {0x3a, 1792}, {0x3b, 1920}, + {0x1c, 2048}, {0x1d, 2304}, {0x1e, 2560}, {0x1f, 2816}, + {0x3c, 3072}, {0x3d, 3328}, {0x3E, 3584}, {0x3F, 3840}, + {-1, -1} +}; + +static struct i2c_adapter *adap; + +extern void gpio_i2c_hs_inactive(void); +extern void gpio_i2c_hs_active(void); + +static u16 reg_read(mxc_i2c_hs *i2c_hs, u32 reg_offset) +{ + return __raw_readw(i2c_hs->reg_base_virt + reg_offset); +} + +static void reg_write(mxc_i2c_hs *i2c_hs, u32 reg_offset, u16 data) +{ + __raw_writew(data, i2c_hs->reg_base_virt + reg_offset); +} + +static void reg_set_mask(mxc_i2c_hs *i2c_hs, u32 reg_offset, u16 mask) +{ + u16 value; + + value = reg_read(i2c_hs, reg_offset); + value |= mask; + reg_write(i2c_hs, reg_offset, value); +} +static void reg_clear_mask(mxc_i2c_hs *i2c_hs, u32 reg_offset, u16 mask) +{ + u16 value; + + value = reg_read(i2c_hs, reg_offset); + value &= ~mask; + reg_write(i2c_hs, reg_offset, value); +} + +static void mxci2c_hs_set_div(mxc_i2c_hs *i2c_hs) +{ + unsigned long clk_freq; + int i; + int div = -1;; + + clk_freq = clk_get_rate(i2c_hs->serial_clk); + if (i2c_hs->speed) { + div = (clk_freq + i2c_hs->speed - 1) / i2c_hs->speed; + for (i = 0; i2c_clk_table[i].div >= 0; i++) { + if (i2c_clk_table[i].div >= div) { + div = i2c_clk_table[i].reg_value; + reg_write(i2c_hs, HIFSFDR, div); + break; + } + } + } +} + +static int mxci2c_hs_enable(mxc_i2c_hs *i2c_hs) +{ + gpio_i2c_hs_active(); + clk_enable(i2c_hs->ipg_clk); + clk_enable(i2c_hs->serial_clk); + mxci2c_hs_set_div(i2c_hs); + reg_write(i2c_hs, HICR, reg_read(i2c_hs, HICR) | HICR_HIEN); + + return 0; +} + +static int mxci2c_hs_disable(mxc_i2c_hs *i2c_hs) +{ + reg_write(i2c_hs, HICR, reg_read(i2c_hs, HICR) & (~HICR_HIEN)); + clk_disable(i2c_hs->ipg_clk); + clk_disable(i2c_hs->serial_clk); + + return 0; +} + +static int mxci2c_hs_bus_busy(mxc_i2c_hs *i2c_hs) +{ + u16 value; + int retry = 1000; + + while (retry--) { + value = reg_read(i2c_hs, HISR); + if (value & HISR_HIBB) { + udelay(1); + } else { + break; + } + } + + if (retry <= 0) { + dev_dbg(NULL, "%s: Bus Busy!\n", __func__); + return 1; + } else { + return 0; + } +} + +static int mxci2c_hs_start(mxc_i2c_hs *i2c_hs, int repeat_start, u16 address) +{ + u16 mask; + int ret = 0; + + mxci2c_hs_bus_busy(i2c_hs); + + /*7 bit address */ + reg_clear_mask(i2c_hs, HICR, HICR_ADDR_MODE); + + /*send start */ + if (repeat_start) + mask = HICR_RSTA; + else + mask = HICR_MSTA; + reg_set_mask(i2c_hs, HICR, mask); + + return ret; +} + +static int mxci2c_hs_stop(mxc_i2c_hs *i2c_hs) +{ + reg_clear_mask(i2c_hs, HICR, HICR_MSTA); + reg_clear_mask(i2c_hs, HICR, HICR_HIIEN); + + return 0; +} + +static int mxci2c_wait_writefifo(mxc_i2c_hs *i2c_hs) +{ + int i, num, left; + int retry, ret = 0; + + retry = 10000; + while (retry--) { + udelay(10); + if (reg_read(i2c_hs, HISR) & (HISR_TDE | HISR_TDC_ZERO)) { + if (i2c_hs->index < i2c_hs->msg->len) { + left = i2c_hs->msg->len - i2c_hs->index; + num = + (left > + HITFR_MAX_COUNT) ? HITFR_MAX_COUNT : left; + for (i = 0; i < num; i++) { + reg_write(i2c_hs, HITDR, + i2c_hs->msg->buf[i2c_hs-> + index + i]); + } + i2c_hs->index += num; + } else { + if (reg_read(i2c_hs, HISR) & HISR_TDC_ZERO) { + msleep(1); + break; + } + } + } + } + + if (retry <= 0) { + printk(KERN_ERR "%s:wait error\n", __func__); + ret = -1; + } + + return ret; +} + +static int mxci2c_wait_readfifo(mxc_i2c_hs *i2c_hs) +{ + int i, num, left; + int retry, ret = 0; + u16 value; + + retry = 10000; + while (retry--) { + udelay(10); + value = reg_read(i2c_hs, HISR); + if (value & (HISR_RDF | HISR_RDC_ZERO)) { + if (i2c_hs->index < i2c_hs->msg->len) { + left = i2c_hs->msg->len - i2c_hs->index; + num = + (left > + HITFR_MAX_COUNT) ? HITFR_MAX_COUNT : left; + for (i = 0; i < num; i++) { + i2c_hs->msg->buf[i2c_hs->index + i] = + reg_read(i2c_hs, HIRDR); + } + i2c_hs->index += num; + } else { + if (value & HISR_RDC_ZERO) { + break; + } + } + } + } + + if (retry <= 0) { + printk(KERN_ERR "%s:wait error\n", __func__); + ret = -1; + } + + return ret; +} + +static int mxci2c_hs_read(mxc_i2c_hs *i2c_hs, int repeat_start, + struct i2c_msg *msg) +{ + int ret; + + if (msg->len > HIRDCR_MAX_COUNT) { + printk(KERN_ERR "%s: error: msg too long, max longth 256\n", + __func__); + return -1; + } + + ret = 0; + i2c_hs->msg = msg; + i2c_hs->index = 0; + + /*set address */ + reg_write(i2c_hs, HIMADR, HIMADR_LSB_ADR(msg->addr)); + + /*receive mode */ + reg_clear_mask(i2c_hs, HICR, HICR_MTX); + + reg_clear_mask(i2c_hs, HICR, HICR_HIIEN); + + /*FIFO*/ reg_set_mask(i2c_hs, HIRFR, HIRFR_RFEN | HIRFR_RFWM(7)); + reg_set_mask(i2c_hs, HIRFR, HIRFR_RFLSH); + + /*TDCR*/ + reg_write(i2c_hs, HIRDCR, HIRDCR_RDC_EN | HIRDCR_RDC(msg->len)); + + mxci2c_hs_start(i2c_hs, repeat_start, msg->addr); + + ret = mxci2c_wait_readfifo(i2c_hs); + + if (ret < 0) + return ret; + else + return msg->len; +} + +static int mxci2c_hs_write(mxc_i2c_hs *i2c_hs, int repeat_start, + struct i2c_msg *msg) +{ + int ret, i; + + if (msg->len > HITDCR_MAX_COUNT) { + printk(KERN_ERR "%s: error: msg too long, max longth 256\n", + __func__); + return -1; + } + + ret = 0; + i2c_hs->msg = msg; + i2c_hs->index = 0; + + /*set address */ + reg_write(i2c_hs, HIMADR, HIMADR_LSB_ADR(msg->addr)); + + /*transmit mode */ + reg_set_mask(i2c_hs, HICR, HICR_MTX); + + reg_clear_mask(i2c_hs, HICR, HICR_HIIEN); + + /* TDCR */ + reg_write(i2c_hs, HITDCR, HITDCR_TDC_EN | HITDCR_TDC(msg->len)); + + /* FIFO */ + reg_set_mask(i2c_hs, HITFR, HITFR_TFEN); + reg_set_mask(i2c_hs, HITFR, HITFR_TFLSH); + + if (msg->len > HITFR_MAX_COUNT) + i2c_hs->index = HITFR_MAX_COUNT; + else { + i2c_hs->index = msg->len; + } + + for (i = 0; i < i2c_hs->index; i++) { + reg_write(i2c_hs, HITDR, msg->buf[i]); + } + + mxci2c_hs_start(i2c_hs, repeat_start, msg->addr); + + ret = mxci2c_wait_writefifo(i2c_hs); + + if (ret < 0) + return ret; + else + return msg->len; +} + +static int mxci2c_hs_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], + int num) +{ + int i; + int ret = -EIO; + + mxc_i2c_hs *i2c_hs = (mxc_i2c_hs *) (i2c_get_adapdata(adap)); + + if (i2c_hs->low_power) { + dev_err(&adap->dev, "I2C Device in low power mode\n"); + return -EREMOTEIO; + } + + if (num < 1) { + return 0; + } + + mxci2c_hs_enable(i2c_hs); + + for (i = 0; i < num; i++) { + if (msgs[i].flags & I2C_M_RD) { + ret = mxci2c_hs_read(i2c_hs, 0, &msgs[i]); + if (ret < 0) + break; + } else { + ret = mxci2c_hs_write(i2c_hs, 0, &msgs[i]); + if (ret < 0) + break; + } + mxci2c_hs_stop(i2c_hs); + } + mxci2c_hs_stop(i2c_hs); + + mxci2c_hs_disable(i2c_hs); + + if (ret < 0) + return ret; + + return i; +} + +static u32 mxci2c_hs_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +/*! + * Stores the pointers for the i2c algorithm functions. The algorithm functions + * is used by the i2c bus driver to talk to the i2c bus + */ +static struct i2c_algorithm mxci2c_hs_algorithm = { + .master_xfer = mxci2c_hs_xfer, + .functionality = mxci2c_hs_func +}; + +static int mxci2c_hs_probe(struct platform_device *pdev) +{ + mxc_i2c_hs *i2c_hs; + struct mxc_i2c_platform_data *i2c_plat_data = pdev->dev.platform_data; + struct resource *res; + int id = pdev->id; + int ret = 0; + + i2c_hs = kzalloc(sizeof(mxc_i2c_hs), GFP_KERNEL); + if (!i2c_hs) { + return -ENOMEM; + } + + i2c_hs->dev = &pdev->dev; + + i2c_hs->speed = i2c_plat_data->i2c_clk; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + ret = -ENODEV; + goto err1; + } + i2c_hs->reg_base_virt = IO_ADDRESS(res->start); + i2c_hs->reg_base_phy = res->start; + + i2c_hs->ipg_clk = clk_get(&pdev->dev, "hsi2c_clk"); + i2c_hs->serial_clk = clk_get(&pdev->dev, "hsi2c_serial_clk"); + + /* + * Request the I2C interrupt + */ + i2c_hs->irq = platform_get_irq(pdev, 0); + if (i2c_hs->irq < 0) { + ret = i2c_hs->irq; + goto err1; + } + + i2c_hs->low_power = false; + + /* + * Set the adapter information + */ + adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); + if (!adap) { + ret = -ENODEV; + goto err1; + } + strlcpy(adap->name, pdev->name, 48); + adap->id = adap->nr = id; + adap->algo = &mxci2c_hs_algorithm; + adap->timeout = 1; + platform_set_drvdata(pdev, i2c_hs); + i2c_set_adapdata(adap, i2c_hs); + ret = i2c_add_numbered_adapter(adap); + if (ret < 0) { + goto err2; + } + + printk(KERN_INFO "MXC HS I2C driver\n"); + return 0; + + err2: + kfree(adap); + err1: + dev_err(&pdev->dev, "failed to probe high speed i2c adapter\n"); + kfree(i2c_hs); + return ret; +} + +static int mxci2c_hs_suspend(struct platform_device *pdev, pm_message_t state) +{ + mxc_i2c_hs *i2c_hs = platform_get_drvdata(pdev); + + if (i2c_hs == NULL) { + return -1; + } + + /* Prevent further calls to be processed */ + i2c_hs->low_power = true; + + gpio_i2c_hs_inactive(); + + return 0; +} + +static int mxci2c_hs_resume(struct platform_device *pdev) +{ + mxc_i2c_hs *i2c_hs = platform_get_drvdata(pdev); + + if (i2c_hs == NULL) + return -1; + + i2c_hs->low_power = false; + gpio_i2c_hs_active(); + + return 0; +} + +static int mxci2c_hs_remove(struct platform_device *pdev) +{ + mxc_i2c_hs *i2c_hs = platform_get_drvdata(pdev); + + i2c_del_adapter(adap); + gpio_i2c_hs_inactive(); + platform_set_drvdata(pdev, NULL); + kfree(i2c_hs); + return 0; +} + +static struct platform_driver mxci2c_hs_driver = { + .driver = { + .name = "mxc_i2c_hs", + .owner = THIS_MODULE, + }, + .probe = mxci2c_hs_probe, + .remove = mxci2c_hs_remove, + .suspend = mxci2c_hs_suspend, + .resume = mxci2c_hs_resume, +}; + +/*! + * Function requests the interrupts and registers the i2c adapter structures. + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int __init mxci2c_hs_init(void) +{ + /* Register the device driver structure. */ + return platform_driver_register(&mxci2c_hs_driver); +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxci2c_hs_exit(void) +{ + platform_driver_unregister(&mxci2c_hs_driver); +} + +subsys_initcall(mxci2c_hs_init); +module_exit(mxci2c_hs_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC HIGH SPEED I2C driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/Kconfig @@ -339,6 +339,10 @@ config I2C_GPIO tristate "GPIO-based bitbanging I2C" depends on GENERIC_GPIO + +config I2C_PARPORT + tristate "Parallel port adapter" + depends on PARPORT select I2C_ALGOBIT help This is a very simple bitbanging I2C driver utilizing the @@ -412,9 +416,34 @@ This driver can also be built as a module. If so, the module will be called i2c-mpc. +config I2C_MXC + tristate "MXC I2C support" + depends on I2C && ARCH_MXC + help + If you say yes to this option, support will be included for Freescale + MXC I2C modules. + + This driver can also be built as a module. + +config I2C_MXC_HS + tristate "MXC HIGH SPEED I2C support" + depends on I2C && ARCH_MXC + help + If you say yes to this option, support will be included for Freescale + MXC HIGH SPEED I2C modules. + + This driver can also be built as a module. + +config I2C_STMP378X + tristate "STMP378x I2C adapter" + depends on MACH_STMP378X + help + TBD + config I2C_MV64XXX tristate "Marvell mv64xxx I2C Controller" depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL + help If you say yes to this option, support will be included for the built-in I2C interface on the Marvell 64xxx line of host bridges. --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/mxc_i2c_hs_reg.h +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/mxc_i2c_hs_reg.h @@ -0,0 +1,97 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MXC_I2C_HS_REG_H__ +#define __MXC_I2C_HS_REG_H__ + +#define HISADR 0x00 + +#define HIMADR 0x04 +#define HIMADR_LSB_ADR(x) ((x) << 1) +#define HIMADR_MSB_ADR(x) (((x) & 0x7) << 8) + +#define HICR 0x08 +#define HICR_HIEN 0x1 +#define HICR_DMA_EN_RX 0x2 +#define HICR_DMA_EN_TR 0x4 +#define HICR_RSTA 0x8 +#define HICR_TXAK 0x10 +#define HICR_MTX 0x20 +#define HICR_MSTA 0x40 +#define HICR_HIIEN 0x80 +#define HICR_ADDR_MODE 0x100 +#define HICR_MST_CODE(x) (((x)&0x7) << 9) +#define HICR_HSM_EN 0x1000 +#define HICR_SAMC(x) (((x)&0x3) << 13) +#define SAMC_7_10 0 +#define SMAC_7 1 +#define SMAC_10 2 + +#define HISR 0x0c +#define HISR_RDF 0x1 +#define HISR_TDE 0x2 +#define HISR_HIAAS 0x4 +#define HISR_HIAL 0x8 +#define HISR_BTD 0x10 +#define HISR_RDC_ZERO 0x20 +#define HISR_TDC_ZERO 0x40 +#define HISR_RXAK 0x80 +#define HISR_HIBB 0x100 +#define HISR_SRW 0x200 +#define HISR_SADDR_MODE 0x400 +#define HISR_SHS_MODE 0x800 + +#define HIIMR 0x10 +#define HIIMR_RDF 0x1 +#define HIIMR_TDE 0x2 +#define HIIMR_AAS 0x4 +#define HIIMR_AL 0x8 +#define HIIMR_BTD 0x10 +#define HIIMR_RDC 0x20 +#define HIIMR_TDC 0x40 +#define HIIMR_RXAK 0x80 + +#define HITDR 0x14 + +#define HIRDR 0x18 + +#define HIFSFDR 0x1c + +#define HIHSFDR 0x20 + +#define HITFR 0x24 +#define HITFR_TFEN 0x1 +#define HITFR_TFLSH 0x2 +#define HITFR_TFWM(x) (((x) & 0x7) << 2) +#define HITFR_TFC(x) (((x) >> 8) & 0xF) +#define HITFR_MAX_COUNT 8 + +#define HIRFR 0x28 +#define HIRFR_RFEN 0x1 +#define HIRFR_RFLSH 0x2 +#define HIRFR_RFWM(x) (((x) & 0x7) << 2) +#define HIRFR_RFC(x) (((x) >> 8) & 0xF) +#define HIRFR_MAX_COUNT 8 + +#define HITDCR 0x2c +#define HITDCR_TDC(x) ((x) & 0xFF) +#define HITDCR_TDC_EN 0x100 +#define HITDCR_TDC_RSTA 0x200 +#define HITDCR_MAX_COUNT 0xFF + +#define HIRDCR 0x30 +#define HIRDCR_RDC(x) ((x) & 0xFF) +#define HIRDCR_RDC_EN 0x100 +#define HIRDCR_RDC_RSTA 0x200 +#define HIRDCR_MAX_COUNT 0xFF + +#endif --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-isch.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-isch.c @@ -281,7 +281,7 @@ return -ENODEV; } if (acpi_check_region(sch_smba, SMBIOSIZE, sch_driver.name)) - return -EBUSY; + return -ENODEV; if (!request_region(sch_smba, SMBIOSIZE, sch_driver.name)) { dev_err(&dev->dev, "SMBus region 0x%x already in use!\n", sch_smba); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-stmp378x.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-stmp378x.c @@ -0,0 +1,345 @@ +/* + * Freescale STMP378X I2C bus driver + * + * Author: Dmitrij Frasenyak + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* #define DEBUG */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +static void reset_i2c_module(void) +{ + u32 ctrl; + int count; + count = 1000; + __raw_writel(BM_I2C_CTRL0_SFTRST, REGS_I2C_BASE + HW_I2C_CTRL0_SET); + udelay(10); /* Reseting the module can take multiple clocks.*/ + while (--count && (!(__raw_readl(REGS_I2C_BASE + HW_I2C_CTRL0) & BM_I2C_CTRL0_CLKGATE))) + udelay(1); + + if (!count) { + printk(KERN_ERR "timeout reseting the module\n"); + BUG(); + } + + /* take controller out of reset */ + __raw_writel(BM_I2C_CTRL0_SFTRST | BM_I2C_CTRL0_CLKGATE, + REGS_I2C_BASE + HW_I2C_CTRL0_CLR); + udelay(10); + /* Wil catch all error (IRQ mask) */ + __raw_writel(0x0000FF00, REGS_I2C_BASE + HW_I2C_CTRL1_SET); +} + +/* + * Low level master read/write transaction. + */ +static int stmp378x_i2c_xfer_msg(struct i2c_adapter *adap, + struct i2c_msg *msg, int stop) +{ + struct stmp378x_i2c_dev *dev = i2c_get_adapdata(adap); + int err; + + init_completion(&dev->cmd_complete); + dev->cmd_err = 0; + + dev_dbg(dev->dev, " Start XFER ===>\n"); + dev_dbg(dev->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n", + msg->addr, msg->len, msg->flags, stop); + + if ((msg->len == 0) || (msg->len > (PAGE_SIZE - 1))) + return -EINVAL; + + if (msg->flags & I2C_M_RD) { + hw_i2c_setup_read(msg->addr , + msg->buf , + msg->len, + stop ? BM_I2C_CTRL0_POST_SEND_STOP : 0); + + hw_i2c_run(1); /* read */ + } else { + hw_i2c_setup_write(msg->addr , + msg->buf , + msg->len, + stop ? BM_I2C_CTRL0_POST_SEND_STOP : 0); + + hw_i2c_run(0); /* write */ + } + + err = wait_for_completion_interruptible_timeout( + &dev->cmd_complete, + msecs_to_jiffies(1000) + ); + + if (err < 0) { + dev_dbg(dev->dev, "controler is timed out\n"); + return -ETIMEDOUT; + } + if ((!dev->cmd_err) && (msg->flags & I2C_M_RD)) + hw_i2c_finish_read(msg->buf, msg->len); + + dev_dbg(dev->dev, "<============= Done with err=%d\n", dev->cmd_err); + + + return dev->cmd_err; +} + + +static int +stmp378x_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +{ + int i; + int err; + + if (!msgs->len) + return -EINVAL; + + for (i = 0; i < num; i++) { + err = stmp378x_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1))); + if (err) + break; + } + + if (err == 0) + err = num; + + return err; +} + +static u32 +stmp378x_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); +} + +/* + * Debug. Don't need dma_irq for the final version + */ + +static irqreturn_t +stmp378x_i2c_dma_isr(int this_irq, void *dev_id) +{ + hw_i2c_clear_dma_interrupt(); + return IRQ_HANDLED; + +} + +#define I2C_IRQ_MASK 0x000000FF + +static irqreturn_t +stmp378x_i2c_isr(int this_irq, void *dev_id) +{ + struct stmp378x_i2c_dev *dev = dev_id; + u32 stat, ctrl; + u32 done_mask = + BM_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | + BM_I2C_CTRL1_BUS_FREE_IRQ ; + + stat = __raw_readl(REGS_I2C_BASE + HW_I2C_CTRL1) & I2C_IRQ_MASK; + if (!stat) + return IRQ_NONE; + + if (stat & BM_I2C_CTRL1_NO_SLAVE_ACK_IRQ) { + dev->cmd_err = -EREMOTEIO; + + /* + * Stop DMA + * Clear NAK + */ + __raw_writel(BM_I2C_CTRL1_CLR_GOT_A_NAK, + REGS_I2C_BASE + HW_I2C_CTRL1_SET); + hw_i2c_reset_dma(); + reset_i2c_module(); + + complete(&dev->cmd_complete); + + goto done; + } + +/* Don't care about BM_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ */ + if (stat & ( + BM_I2C_CTRL1_EARLY_TERM_IRQ | + BM_I2C_CTRL1_MASTER_LOSS_IRQ | + BM_I2C_CTRL1_SLAVE_STOP_IRQ | + BM_I2C_CTRL1_SLAVE_IRQ + )) { + dev->cmd_err = -EIO; + complete(&dev->cmd_complete); + goto done; + } + if ((stat & done_mask) == done_mask) + complete(&dev->cmd_complete); + + +done: + __raw_writel(stat, REGS_I2C_BASE + HW_I2C_CTRL1_CLR); + return IRQ_HANDLED; +} + +static const struct i2c_algorithm stmp378x_i2c_algo = { + .master_xfer = stmp378x_i2c_xfer, + .functionality = stmp378x_i2c_func, +}; + + +static int +stmp378x_i2c_probe(struct platform_device *pdev) +{ + struct stmp378x_i2c_dev *dev; + struct i2c_adapter *adap; + struct resource *irq; + u32 ctrl; + int err = 0; + + /* NOTE: driver uses the static register mapping */ + dev = kzalloc(sizeof(struct stmp378x_i2c_dev), GFP_KERNEL); + if (!dev) { + dev_err(&pdev->dev, "no mem \n"); + return -ENOMEM; + } + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); /* Error */ + if (!irq) { + dev_err(&pdev->dev, "no err_irq resource\n"); + err = -ENODEV; + goto nores; + } + dev->irq_err = irq->start; + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1); /* DMA */ + if (!irq) { + dev_err(&pdev->dev, "no dma_irq resource\n"); + err = -ENODEV; + goto nores; + } + + dev->irq_dma = irq->start; + dev->dev = &pdev->dev; + + err = request_irq(dev->irq_err, stmp378x_i2c_isr, 0, pdev->name, dev); + if (err) { + dev_err(&pdev->dev, "Can't get IRQ\n"); + goto no_err_irq; + } + + err = request_irq(dev->irq_dma, + stmp378x_i2c_dma_isr, + 0, pdev->name, dev); + if (err) { + dev_err(&pdev->dev, "Can't get IRQ\n"); + goto no_dma_irq; + } + + err = hw_i2c_init(&pdev->dev); + if (err) { + dev_err(&pdev->dev, "HW Init failed\n"); + goto init_failed; + } + + /* Will catch all error (IRQ mask) */ + __raw_writel(0x0000FF00, + REGS_I2C_BASE + HW_I2C_CTRL1_SET); + + adap = &dev->adapter; + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; + adap->class = I2C_CLASS_HWMON; + strncpy(adap->name, "378x I2C adapter", sizeof(adap->name)); + adap->algo = &stmp378x_i2c_algo; + adap->dev.parent = &pdev->dev; + + adap->nr = pdev->id; + err = i2c_add_numbered_adapter(adap); + if (err) { + dev_err(&pdev->dev, "Failed to add adapter\n"); + goto no_i2c_adapter; + + } + + return 0; + +no_i2c_adapter: + hw_i2c_stop(dev->dev); +init_failed: + free_irq(dev->irq_dma, dev); +no_dma_irq: + free_irq(dev->irq_err, dev); +no_err_irq: +nores: + kfree(dev); + return err; +} + +static int +stmp378x_i2c_remove(struct platform_device *pdev) +{ + struct stmp378x_i2c_dev *dev = platform_get_drvdata(pdev); + int res; + + res = i2c_del_adapter(&dev->adapter); + if (res) + return -EBUSY; + + hw_i2c_stop(dev->dev); + + platform_set_drvdata(pdev, NULL); + + free_irq(dev->irq_err, dev); + free_irq(dev->irq_dma, dev); + + kfree(dev); + return 0; +} + +static struct platform_driver stmp378x_i2c_driver = { + .probe = stmp378x_i2c_probe, + .remove = __devexit_p(stmp378x_i2c_remove), + .driver = { + .name = "i2c_stmp", + .owner = THIS_MODULE, + }, +}; + +/* I2C may be needed to bring up other drivers */ + +static int __init stmp378x_i2c_init_driver(void) +{ + return platform_driver_register(&stmp378x_i2c_driver); +} +subsys_initcall(stmp378x_i2c_init_driver); + +static void __exit stmp378x_i2c_exit_driver(void) +{ + platform_driver_unregister(&stmp378x_i2c_driver); +} +module_exit(stmp378x_i2c_exit_driver); + +MODULE_AUTHOR("old_chap@embeddedalley.com"); +MODULE_DESCRIPTION("IIC for Freescale STMP378x"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-amd756.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-amd756.c @@ -364,7 +364,7 @@ error = acpi_check_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name); if (error) - return error; + return -ENODEV; if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) { dev_err(&pdev->dev, "SMB region 0x%x already in use!\n", --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-viapro.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-viapro.c @@ -365,7 +365,7 @@ found: error = acpi_check_region(vt596_smba, 8, vt596_driver.name); if (error) - return error; + return -ENODEV; if (!request_region(vt596_smba, 8, vt596_driver.name)) { dev_err(&pdev->dev, "SMBus region 0x%x already in use!\n", --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-amd8111.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-amd8111.c @@ -376,8 +376,10 @@ smbus->size = pci_resource_len(dev, 0); error = acpi_check_resource_conflict(&dev->resource[0]); - if (error) + if (error) { + error = -ENODEV; goto out_kfree; + } if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) { error = -EBUSY; --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-piix4.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-piix4.c @@ -168,7 +168,7 @@ } if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) - return -EBUSY; + return -ENODEV; if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", @@ -259,7 +259,7 @@ piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) - return -EBUSY; + return -ENODEV; if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) { dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n", --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/Makefile +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/Makefile @@ -71,6 +71,9 @@ obj-$(CONFIG_I2C_STUB) += i2c-stub.o obj-$(CONFIG_SCx200_ACB) += scx200_acb.o obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o +obj-$(CONFIG_I2C_MXC) += mxc_i2c.o +obj-$(CONFIG_I2C_MXC_HS) += mxc_i2c_hs.o +obj-$(CONFIG_I2C_STMP378X) += i2c-stmp378x.o ifeq ($(CONFIG_I2C_DEBUG_BUS),y) EXTRA_CFLAGS += -DDEBUG --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-i801.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-i801.c @@ -732,8 +732,10 @@ } err = acpi_check_resource_conflict(&dev->resource[SMBBAR]); - if (err) + if (err) { + err = -ENODEV; goto exit; + } err = pci_request_region(dev, SMBBAR, i801_driver.name); if (err) { --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/mxc_i2c.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/mxc_i2c.c @@ -0,0 +1,801 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_i2c.c + * + * @brief Driver for the Freescale Semiconductor MXC I2C buses. + * + * Based on i2c driver algorithm for PCF8584 adapters + * + * @ingroup MXCI2C + */ + +/* + * Include Files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mxc_i2c_reg.h" + +/*! + * In case the MXC device has multiple I2C modules, this structure is used to + * store information specific to each I2C module. + */ +typedef struct { + /*! + * This structure is used to identify the physical i2c bus along with + * the access algorithms necessary to access it. + */ + struct i2c_adapter adap; + + /*! + * This waitqueue is used to wait for the data transfer to complete. + */ + wait_queue_head_t wq; + + /*! + * The base address of the I2C device. + */ + void __iomem *membase; + + /*! + * The interrupt number used by the I2C device. + */ + int irq; + + /*! + * The default clock divider value to be used. + */ + unsigned int clkdiv; + + /*! + * The clock source for the device. + */ + struct clk *clk; + + /*! + * The current power state of the device + */ + bool low_power; + + /*! + * Boolean to indicate if data was transferred + */ + bool transfer_done; + + /*! + * Boolean to indicate if we received an ACK for the data transmitted + */ + bool tx_success; +} mxc_i2c_device; + +struct clk_div_table { + int reg_value; + int div; +}; + +static const struct clk_div_table i2c_clk_table[] = { + {0x20, 22}, {0x21, 24}, {0x22, 26}, {0x23, 28}, + {0, 30}, {1, 32}, {0x24, 32}, {2, 36}, + {0x25, 36}, {0x26, 40}, {3, 42}, {0x27, 44}, + {4, 48}, {0x28, 48}, {5, 52}, {0x29, 56}, + {6, 60}, {0x2A, 64}, {7, 72}, {0x2B, 72}, + {8, 80}, {0x2C, 80}, {9, 88}, {0x2D, 96}, + {0xA, 104}, {0x2E, 112}, {0xB, 128}, {0x2F, 128}, + {0xC, 144}, {0xD, 160}, {0x30, 160}, {0xE, 192}, + {0x31, 192}, {0x32, 224}, {0xF, 240}, {0x33, 256}, + {0x10, 288}, {0x11, 320}, {0x34, 320}, {0x12, 384}, + {0x35, 384}, {0x36, 448}, {0x13, 480}, {0x37, 512}, + {0x14, 576}, {0x15, 640}, {0x38, 640}, {0x16, 768}, + {0x39, 768}, {0x3A, 896}, {0x17, 960}, {0x3B, 1024}, + {0x18, 1152}, {0x19, 1280}, {0x3C, 1280}, {0x1A, 1536}, + {0x3D, 1536}, {0x3E, 1792}, {0x1B, 1920}, {0x3F, 2048}, + {0x1C, 2304}, {0x1D, 2560}, {0x1E, 3072}, {0x1F, 3840}, + {0, 0} +}; + +extern void gpio_i2c_active(int i2c_num); +extern void gpio_i2c_inactive(int i2c_num); + +/*! + * Transmit a \b STOP signal to the slave device. + * + * @param dev the mxc i2c structure used to get to the right i2c device + */ +static void mxc_i2c_stop(mxc_i2c_device * dev) +{ + unsigned int cr, sr; + int retry = 16; + + cr = readw(dev->membase + MXC_I2CR); + cr &= ~(MXC_I2CR_MSTA | MXC_I2CR_MTX); + writew(cr, dev->membase + MXC_I2CR); + + /* Wait till the Bus Busy bit is reset */ + sr = readw(dev->membase + MXC_I2SR); + while (retry-- && ((sr & MXC_I2SR_IBB))) { + udelay(3); + sr = readw(dev->membase + MXC_I2SR); + } + if (retry <= 0) + dev_err(&dev->adap.dev, "Could not set I2C Bus Busy bit" + " to zero.\n"); +} + +/*! + * Wait for the transmission of the data byte to complete. This function waits + * till we get a signal from the interrupt service routine indicating completion + * of the address cycle or we time out. + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param trans_flag transfer flag + * + * + * @return The function returns 0 on success or -1 if an ack was not received + */ + +static int mxc_i2c_wait_for_tc(mxc_i2c_device * dev, int trans_flag) +{ + int retry = 16; + + while (retry-- && !dev->transfer_done) { + wait_event_interruptible_timeout(dev->wq, + dev->transfer_done, + dev->adap.timeout); + } + dev->transfer_done = false; + + if (retry <= 0) { + /* Unable to send data */ + dev_err(&dev->adap.dev, "Data not transmitted\n"); + return -1; + } + + if (!dev->tx_success) { + /* An ACK was not received for transmitted byte */ + dev_err(&dev->adap.dev, "ACK not received \n"); + return -1; + } + + return 0; +} + +/*! + * Transmit a \b START signal to the slave device. + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param *msg pointer to a message structure that contains the slave + * address + * + * @return The function returns EBUSY on failure, 0 on success. + */ +static int mxc_i2c_start(mxc_i2c_device *dev, struct i2c_msg *msg) +{ + volatile unsigned int cr, sr; + unsigned int addr_trans; + int retry = 16; + + /* + * Set the slave address and the requested transfer mode + * in the data register + */ + addr_trans = msg->addr << 1; + if (msg->flags & I2C_M_RD) { + addr_trans |= 0x01; + } + + /* Set the Master bit */ + cr = readw(dev->membase + MXC_I2CR); + cr |= MXC_I2CR_MSTA; + writew(cr, dev->membase + MXC_I2CR); + + /* Wait till the Bus Busy bit is set */ + sr = readw(dev->membase + MXC_I2SR); + while (retry-- && (!(sr & MXC_I2SR_IBB))) { + udelay(3); + sr = readw(dev->membase + MXC_I2SR); + } + if (retry <= 0) { + dev_err(&dev->adap.dev, "Could not grab Bus ownership\n"); + return -EBUSY; + } + + /* Set the Transmit bit */ + cr = readw(dev->membase + MXC_I2CR); + cr |= MXC_I2CR_MTX; + writew(cr, dev->membase + MXC_I2CR); + + writew(addr_trans, dev->membase + MXC_I2DR); + return 0; +} + +/*! + * Transmit a \b REPEAT START to the slave device + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param *msg pointer to a message structure that contains the slave + * address + */ +static int mxc_i2c_repstart(mxc_i2c_device *dev, struct i2c_msg *msg) +{ + volatile unsigned int cr, sr; + unsigned int addr_trans; + int retry = 16; + + /* + * Set the slave address and the requested transfer mode + * in the data register + */ + addr_trans = msg->addr << 1; + if (msg->flags & I2C_M_RD) { + addr_trans |= 0x01; + } + cr = readw(dev->membase + MXC_I2CR); + cr |= MXC_I2CR_RSTA; + writew(cr, dev->membase + MXC_I2CR); + /* Wait till the Bus Busy bit is set */ + sr = readw(dev->membase + MXC_I2SR); + while (retry-- && (!(sr & MXC_I2SR_IBB))) { + udelay(3); + sr = readw(dev->membase + MXC_I2SR); + } + if (retry <= 0) { + dev_err(&dev->adap.dev, "Could not grab Bus ownership\n"); + return -EBUSY; + } + writew(addr_trans, dev->membase + MXC_I2DR); + return 0; +} + +/*! + * Read the received data. The function waits till data is available or times + * out. Generates a stop signal if this is the last message to be received. + * Sends an ack for all the bytes received except the last byte. + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param *msg pointer to a message structure that contains the slave + * address and a pointer to the receive buffer + * @param last indicates that this is the last message to be received + * @param addr_comp flag indicates that we just finished the address cycle + * + * @return The function returns the number of bytes read or -1 on time out. + */ +static int mxc_i2c_readbytes(mxc_i2c_device * dev, struct i2c_msg *msg, + int last, int addr_comp) +{ + int i; + char *buf = msg->buf; + int len = msg->len; + volatile unsigned int cr; + + cr = readw(dev->membase + MXC_I2CR); + /* + * Clear MTX to switch to receive mode. + */ + cr &= ~MXC_I2CR_MTX; + /* + * Clear the TXAK bit to gen an ack when receiving only one byte. + */ + if (len == 1) { + cr |= MXC_I2CR_TXAK; + } else { + cr &= ~MXC_I2CR_TXAK; + } + writew(cr, dev->membase + MXC_I2CR); + /* + * Dummy read only at the end of an address cycle + */ + if (addr_comp > 0) { + readw(dev->membase + MXC_I2DR); + } + + for (i = 0; i < len; i++) { + /* + * Wait for data transmission to complete + */ + if (mxc_i2c_wait_for_tc(dev, msg->flags)) { + mxc_i2c_stop(dev); + return -1; + } + /* + * Do not generate an ACK for the last byte + */ + if (i == (len - 2)) { + cr = readw(dev->membase + MXC_I2CR); + cr |= MXC_I2CR_TXAK; + writew(cr, dev->membase + MXC_I2CR); + } else if (i == (len - 1)) { + if (last) { + mxc_i2c_stop(dev); + } + } + /* Read the data */ + *buf++ = readw(dev->membase + MXC_I2DR); + } + + return i; +} + +/*! + * Write the data to the data register. Generates a stop signal if this is + * the last message to be sent or if no ack was received for the data sent. + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param *msg pointer to a message structure that contains the slave + * address and data to be sent + * @param last indicates that this is the last message to be received + * + * @return The function returns the number of bytes written or -1 on time out + * or if no ack was received for the data that was sent. + */ +static int mxc_i2c_writebytes(mxc_i2c_device * dev, struct i2c_msg *msg, + int last) +{ + int i; + char *buf = msg->buf; + int len = msg->len; + volatile unsigned int cr; + + cr = readw(dev->membase + MXC_I2CR); + /* Set MTX to switch to transmit mode */ + cr |= MXC_I2CR_MTX; + writew(cr, dev->membase + MXC_I2CR); + + for (i = 0; i < len; i++) { + /* + * Write the data + */ + writew(*buf++, dev->membase + MXC_I2DR); + if (mxc_i2c_wait_for_tc(dev, msg->flags)) { + mxc_i2c_stop(dev); + return -1; + } + } + if (last > 0) { + mxc_i2c_stop(dev); + } + + return i; +} + +/*! + * Function enables the I2C module and initializes the registers. + * + * @param dev the mxc i2c structure used to get to the right i2c device + * @param trans_flag transfer flag + */ +static void mxc_i2c_module_en(mxc_i2c_device * dev, int trans_flag) +{ + clk_enable(dev->clk); + /* Set the frequency divider */ + writew(dev->clkdiv, dev->membase + MXC_IFDR); + /* Clear the status register */ + writew(0x0, dev->membase + MXC_I2SR); + /* Enable I2C and its interrupts */ + writew(MXC_I2CR_IEN, dev->membase + MXC_I2CR); + writew(MXC_I2CR_IEN | MXC_I2CR_IIEN, dev->membase + MXC_I2CR); +} + +/*! + * Disables the I2C module. + * + * @param dev the mxc i2c structure used to get to the right i2c device + */ +static void mxc_i2c_module_dis(mxc_i2c_device * dev) +{ + writew(0x0, dev->membase + MXC_I2CR); + clk_disable(dev->clk); +} + +/*! + * The function is registered in the adapter structure. It is called when an MXC + * driver wishes to transfer data to a device connected to the I2C device. + * + * @param adap adapter structure for the MXC i2c device + * @param msgs[] array of messages to be transferred to the device + * @param num number of messages to be transferred to the device + * + * @return The function returns the number of messages transferred, + * \b -EREMOTEIO on I2C failure and a 0 if the num argument is + * less than 0. + */ +static int mxc_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], + int num) +{ + mxc_i2c_device *dev = (mxc_i2c_device *) (i2c_get_adapdata(adap)); + int i, ret = 0, addr_comp = 0; + volatile unsigned int sr; + int retry = 5; + + if (dev->low_power) { + dev_err(&dev->adap.dev, "I2C Device in low power mode\n"); + return -EREMOTEIO; + } + + if (num < 1) { + return 0; + } + + mxc_i2c_module_en(dev, msgs[0].flags); + sr = readw(dev->membase + MXC_I2SR); + /* + * Check bus state + */ + + while ((sr & MXC_I2SR_IBB) && retry--) { + udelay(5); + sr = readw(dev->membase + MXC_I2SR); + } + + if ((sr & MXC_I2SR_IBB) && retry < 0) { + mxc_i2c_module_dis(dev); + dev_err(&dev->adap.dev, "Bus busy\n"); + return -EREMOTEIO; + } + + //gpio_i2c_active(dev->adap.id); + dev->transfer_done = false; + dev->tx_success = false; + for (i = 0; i < num && ret >= 0; i++) { + addr_comp = 0; + /* + * Send the slave address and transfer direction in the + * address cycle + */ + if (i == 0) { + /* + * Send a start or repeat start signal + */ + if (mxc_i2c_start(dev, &msgs[0])) + return -EREMOTEIO; + /* Wait for the address cycle to complete */ + if (mxc_i2c_wait_for_tc(dev, msgs[0].flags)) { + mxc_i2c_stop(dev); + //gpio_i2c_inactive(dev->adap.id); + mxc_i2c_module_dis(dev); + return -EREMOTEIO; + } + addr_comp = 1; + } else { + /* + * Generate repeat start only if required i.e the address + * changed or the transfer direction changed + */ + if ((msgs[i].addr != msgs[i - 1].addr) || + ((msgs[i].flags & I2C_M_RD) != + (msgs[i - 1].flags & I2C_M_RD))) { + mxc_i2c_repstart(dev, &msgs[i]); + /* Wait for the address cycle to complete */ + if (mxc_i2c_wait_for_tc(dev, msgs[i].flags)) { + mxc_i2c_stop(dev); + //gpio_i2c_inactive(dev->adap.id); + mxc_i2c_module_dis(dev); + return -EREMOTEIO; + } + addr_comp = 1; + } + } + + /* Transfer the data */ + if (msgs[i].flags & I2C_M_RD) { + /* Read the data */ + ret = mxc_i2c_readbytes(dev, &msgs[i], (i + 1 == num), + addr_comp); + if (ret < 0) { + dev_err(&dev->adap.dev, "mxc_i2c_readbytes:" + " fail.\n"); + break; + } + } else { + /* Write the data */ + ret = mxc_i2c_writebytes(dev, &msgs[i], (i + 1 == num)); + if (ret < 0) { + dev_err(&dev->adap.dev, "mxc_i2c_writebytes:" + " fail.\n"); + break; + } + } + } + + //gpio_i2c_inactive(dev->adap.id); + mxc_i2c_module_dis(dev); + /* + * Decrease by 1 as we do not want Start message to be included in + * the count + */ + return (i < 0 ? ret : i); +} + +/*! + * Returns the i2c functionality supported by this driver. + * + * @param adap adapter structure for this i2c device + * + * @return Returns the functionality that is supported. + */ +static u32 mxc_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +/*! + * Stores the pointers for the i2c algorithm functions. The algorithm functions + * is used by the i2c bus driver to talk to the i2c bus + */ +static struct i2c_algorithm mxc_i2c_algorithm = { + .master_xfer = mxc_i2c_xfer, + .functionality = mxc_i2c_func +}; + +/*! + * Interrupt Service Routine. It signals to the process about the data transfer + * completion. Also sets a flag if bus arbitration is lost. + * @param irq the interrupt number + * @param dev_id driver private data + * + * @return The function returns \b IRQ_HANDLED. + */ +static irqreturn_t mxc_i2c_handler(int irq, void *dev_id) +{ + mxc_i2c_device *dev = dev_id; + volatile unsigned int sr, cr; + + sr = readw(dev->membase + MXC_I2SR); + cr = readw(dev->membase + MXC_I2CR); + + /* + * Clear the interrupt bit + */ + writew(0x0, dev->membase + MXC_I2SR); + + if (sr & MXC_I2SR_IAL) { + dev_err(&dev->adap.dev, "Bus Arbitration lost\n"); + } else { + /* Interrupt due byte transfer completion */ + dev->tx_success = true; + /* Check if RXAK is received in Transmit mode */ + if ((cr & MXC_I2CR_MTX) && (sr & MXC_I2SR_RXAK)) { + dev->tx_success = false; + } + dev->transfer_done = true; + wake_up_interruptible(&dev->wq); + } + + return IRQ_HANDLED; +} + +/*! + * This function is called to put the I2C adapter in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which I2C + * to suspend + * @param state the power state the device is entering + * + * @return The function returns 0 on success and -1 on failure. + */ +static int mxci2c_suspend(struct platform_device *pdev, pm_message_t state) +{ + mxc_i2c_device *mxcdev = platform_get_drvdata(pdev); + volatile unsigned int sr = 0; + + if (mxcdev == NULL) { + return -1; + } + + /* Prevent further calls to be processed */ + mxcdev->low_power = true; + /* Wait till we finish the current transfer */ + sr = readw(mxcdev->membase + MXC_I2SR); + while (sr & MXC_I2SR_IBB) { + msleep(10); + sr = readw(mxcdev->membase + MXC_I2SR); + } + gpio_i2c_inactive(mxcdev->adap.id); + + return 0; +} + +/*! + * This function is called to bring the I2C adapter back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which I2C + * to resume + * + * @return The function returns 0 on success and -1 on failure + */ +static int mxci2c_resume(struct platform_device *pdev) +{ + mxc_i2c_device *mxcdev = platform_get_drvdata(pdev); + + if (mxcdev == NULL) + return -1; + + mxcdev->low_power = false; + gpio_i2c_active(mxcdev->adap.id); + + return 0; +} + +/*! + * This function is called during the driver binding process. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions + * + * @return The function always returns 0. + */ +static int mxci2c_probe(struct platform_device *pdev) +{ + mxc_i2c_device *mxc_i2c; + struct mxc_i2c_platform_data *i2c_plat_data = pdev->dev.platform_data; + struct resource *res; + int id = pdev->id; + u32 clk_freq; + int ret = 0; + int i; + + mxc_i2c = kzalloc(sizeof(mxc_i2c_device), GFP_KERNEL); + if (!mxc_i2c) { + return -ENOMEM; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + ret = -ENODEV; + goto err1; + } + mxc_i2c->membase = IO_ADDRESS(res->start); + + /* + * Request the I2C interrupt + */ + mxc_i2c->irq = platform_get_irq(pdev, 0); + if (mxc_i2c->irq < 0) { + ret = mxc_i2c->irq; + goto err1; + } + + ret = request_irq(mxc_i2c->irq, mxc_i2c_handler, + 0, pdev->name, mxc_i2c); + if (ret < 0) { + goto err1; + } + + init_waitqueue_head(&mxc_i2c->wq); + + mxc_i2c->low_power = false; + + gpio_i2c_active(id); + + mxc_i2c->clk = clk_get(&pdev->dev, "i2c_clk"); + clk_freq = clk_get_rate(mxc_i2c->clk); + mxc_i2c->clkdiv = -1; + if (i2c_plat_data->i2c_clk) { + /* Calculate divider and round up any fractional part */ + int div = (clk_freq + i2c_plat_data->i2c_clk - 1) / + i2c_plat_data->i2c_clk; + for (i = 0; i2c_clk_table[i].div != 0; i++) { + if (i2c_clk_table[i].div >= div) { + mxc_i2c->clkdiv = i2c_clk_table[i].reg_value; + break; + } + } + } + if (mxc_i2c->clkdiv == -1) { + i--; + mxc_i2c->clkdiv = 0x1F; /* Use max divider */ + } + dev_dbg(&pdev->dev, "i2c speed is %d/%d = %d bps, reg val = 0x%02X\n", + clk_freq, i2c_clk_table[i].div, + clk_freq / i2c_clk_table[i].div, mxc_i2c->clkdiv); + + /* + * Set the adapter information + */ + strlcpy(mxc_i2c->adap.name, pdev->name, 48); + mxc_i2c->adap.id = mxc_i2c->adap.nr = id; + mxc_i2c->adap.algo = &mxc_i2c_algorithm; + mxc_i2c->adap.timeout = 1; + platform_set_drvdata(pdev, mxc_i2c); + i2c_set_adapdata(&mxc_i2c->adap, mxc_i2c); + if ((ret = i2c_add_numbered_adapter(&mxc_i2c->adap)) < 0) { + goto err2; + } + + printk(KERN_INFO "MXC I2C driver\n"); + return 0; + + err2: + free_irq(mxc_i2c->irq, mxc_i2c); + gpio_i2c_inactive(id); + err1: + dev_err(&pdev->dev, "failed to probe i2c adapter\n"); + kfree(mxc_i2c); + return ret; +} + +/*! + * Dissociates the driver from the I2C device. + * + * @param pdev the device structure used to give information on which I2C + * to remove + * + * @return The function always returns 0. + */ +static int mxci2c_remove(struct platform_device *pdev) +{ + mxc_i2c_device *mxc_i2c = platform_get_drvdata(pdev); + int id = pdev->id; + + free_irq(mxc_i2c->irq, mxc_i2c); + i2c_del_adapter(&mxc_i2c->adap); + gpio_i2c_inactive(id); + clk_put(mxc_i2c->clk); + platform_set_drvdata(pdev, NULL); + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxci2c_driver = { + .driver = { + .name = "mxc_i2c", + .owner = THIS_MODULE, + }, + .probe = mxci2c_probe, + .remove = mxci2c_remove, + .suspend_late = mxci2c_suspend, + .resume_early = mxci2c_resume, +}; + +/*! + * Function requests the interrupts and registers the i2c adapter structures. + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int __init mxc_i2c_init(void) +{ + /* Register the device driver structure. */ + return platform_driver_register(&mxci2c_driver); +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxc_i2c_exit(void) +{ + platform_driver_unregister(&mxci2c_driver); +} + +subsys_initcall(mxc_i2c_init); +module_exit(mxc_i2c_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC I2C driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-s6000.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-s6000.c @@ -276,7 +276,7 @@ } iface->res = request_mem_region(iface->res->start, resource_size(iface->res), - dev->dev.bus_id); + dev_name(&dev->dev)); if (!iface->res) { rc = -EBUSY; goto err_out; --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/i2c-sis96x.c +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/i2c-sis96x.c @@ -280,7 +280,7 @@ retval = acpi_check_resource_conflict(&dev->resource[SIS96x_BAR]); if (retval) - return retval; + return -ENODEV; /* Everything is happy, let's grab the memory and set things up. */ if (!request_region(sis96x_smbus_base, SMB_IOSIZE, --- linux-fsl-imx51-2.6.31.orig/drivers/i2c/busses/mxc_i2c_reg.h +++ linux-fsl-imx51-2.6.31/drivers/i2c/busses/mxc_i2c_reg.h @@ -0,0 +1,40 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MXC_I2C_REG_H__ +#define __MXC_I2C_REG_H__ + +/* Address offsets of the I2C registers */ +#define MXC_IADR 0x00 /* Address Register */ +#define MXC_IFDR 0x04 /* Freq div register */ +#define MXC_I2CR 0x08 /* Control regsiter */ +#define MXC_I2SR 0x0C /* Status register */ +#define MXC_I2DR 0x10 /* Data I/O register */ + +/* Bit definitions of I2CR */ +#define MXC_I2CR_IEN 0x0080 +#define MXC_I2CR_IIEN 0x0040 +#define MXC_I2CR_MSTA 0x0020 +#define MXC_I2CR_MTX 0x0010 +#define MXC_I2CR_TXAK 0x0008 +#define MXC_I2CR_RSTA 0x0004 + +/* Bit definitions of I2SR */ +#define MXC_I2SR_ICF 0x0080 +#define MXC_I2SR_IAAS 0x0040 +#define MXC_I2SR_IBB 0x0020 +#define MXC_I2SR_IAL 0x0010 +#define MXC_I2SR_SRW 0x0004 +#define MXC_I2SR_IIF 0x0002 +#define MXC_I2SR_RXAK 0x0001 + +#endif /* __MXC_I2C_REG_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/sht15.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/sht15.c @@ -304,7 +304,7 @@ int d1 = 0; int i; - for (i = 1; i < ARRAY_SIZE(temppoints) - 1; i++) + for (i = 1; i < ARRAY_SIZE(temppoints); i++) /* Find pointer to interpolate */ if (data->supply_uV > temppoints[i - 1].vdd) { d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) @@ -331,12 +331,12 @@ const int c1 = -4; const int c2 = 40500; /* x 10 ^ -6 */ - const int c3 = 2800; /* x10 ^ -9 */ + const int c3 = -2800; /* x10 ^ -9 */ RHlinear = c1*1000 + c2 * data->val_humid/1000 + (data->val_humid * data->val_humid * c3)/1000000; - return (temp - 25000) * (10000 + 800 * data->val_humid) + return (temp - 25000) * (10000 + 80 * data->val_humid) / 1000000 + RHlinear; } --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/it87.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/it87.c @@ -1028,12 +1028,11 @@ chip_type, *address, sio_data->revision); /* Read GPIO config and VID value from LDN 7 (GPIO) */ - if (chip_type != IT8705F_DEVID) { + if (sio_data->type != it87) { int reg; superio_select(GPIO); - if ((chip_type == it8718) || - (chip_type == it8720)) + if (sio_data->type == it8718 || sio_data->type == it8720) sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); reg = superio_inb(IT87_SIO_PINX2_REG); --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/fschmd.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/fschmd.c @@ -819,7 +819,7 @@ static ssize_t watchdog_write(struct file *filp, const char __user *buf, size_t count, loff_t *offset) { - size_t ret; + int ret; struct fschmd_data *data = filp->private_data; if (count) { --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/adt7462.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/adt7462.c @@ -97,7 +97,7 @@ #define ADT7462_PIN24_SHIFT 6 #define ADT7462_PIN26_VOLT_INPUT 0x08 #define ADT7462_PIN25_VOLT_INPUT 0x20 -#define ADT7462_PIN28_SHIFT 6 /* cfg3 */ +#define ADT7462_PIN28_SHIFT 4 /* cfg3 */ #define ADT7462_PIN28_VOLT 0x5 #define ADT7462_REG_ALARM1 0xB8 --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/mxc_mma7450.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/mxc_mma7450.c @@ -0,0 +1,788 @@ +/* + * linux/drivers/hwmon/mma7450.c + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*include file*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/*macro define*/ +#define MMA7450_I2C_ADDR 0x1D +#define DEVICE_NAME "mma7450" +#define POLL_INTERVAL 100 +#define DEBUG + +#define INPUT_FUZZ 4 +#define INPUT_FLAT 4 + +enum { + REG_XOUTL = 0x00, + REG_XOUTH, + REG_YOUTL, + REG_YOUTH, + REG_ZOUTL, + REG_ZOUTH, + REG_XOUT8, + REG_YOUT8, + REG_ZOUT8, + REG_STATUS, + REG_DETSRC, + REG_TOUT, + REG_RESERVED_0, + REG_I2CAD, + REG_USRINF, + REG_WHOAMI, + REG_XOFFL, + REG_XOFFH, + REG_YOFFL, + REG_YOFFH, + REG_ZOFFL, + REG_ZOFFH, + REG_MCTL, + REG_INTRST, + REG_CTL1, + REG_CTL2, + REG_LDTH, + REG_PDTH, + REG_PD, + REG_LT, + REG_TW, + REG_REVERVED_1, +}; + +enum { + MOD_STANDBY = 0, + MOD_MEASURE, + MOD_LEVEL_D, + MOD_PULSE_D, +}; + +enum { + INT_1L_2P = 0, + INT_1P_2L, + INT_1SP_2P, +}; + +struct mma7450_status { + u8 mod; + u8 ctl1; + u8 ctl2; +}; + +/*forward declear*/ +static ssize_t mma7450_show(struct device *dev, + struct device_attribute *attr, char *buf); +static ssize_t mma7450_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count); +static int mma7450_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int mma7450_remove(struct i2c_client *client); +static int mma7450_suspend(struct i2c_client *client, pm_message_t state); +static int mma7450_resume(struct i2c_client *client); +static void mma_bh_handler(struct work_struct *work); + +/*definition*/ +static struct regulator *reg_dvdd_io; +static struct regulator *reg_avdd; +static struct i2c_client *mma7450_client; +static struct device *hwmon_dev; +static struct input_polled_dev *mma7450_idev; +static struct mxc_mma7450_platform_data *plat_data; +static u8 mma7450_mode; +static struct device_attribute mma7450_dev_attr = { + .attr = { + .name = "mma7450_ctl", + .mode = S_IRUSR | S_IWUSR, + }, + .show = mma7450_show, + .store = mma7450_store, +}; + +static const struct i2c_device_id mma7450_id[] = { + {"mma7450", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, mma7450_id); + +static struct i2c_driver i2c_mma7450_driver = { + .driver = { + .name = "mma7450", + }, + .probe = mma7450_probe, + .remove = mma7450_remove, + .suspend = mma7450_suspend, + .resume = mma7450_resume, + .id_table = mma7450_id, +}; + +static struct mma7450_status mma_status = { + .mod = 0, + .ctl1 = 0, + .ctl2 = 0, +}; + +DECLARE_WORK(mma_work, mma_bh_handler); + +#ifdef DEBUG +enum { + MMA_REG_R = 0, + MMA_REG_W, + MMA_SET_MOD, + MMA_SET_L_THR, + MMA_SET_P_THR, + MMA_SET_INTP, + MMA_SET_INTB, + MMA_SET_G, + MMA_I2C_EABLE, + MMA_OFF_X, + MMA_OFF_Y, + MMA_OFF_Z, + MMA_SELF_TEST, + MMA_SET_LDPL, + MMA_SET_PDPL, + MMA_SET_PDV, + MMA_SET_LTV, + MMA_SET_TW, + MMA_CMD_MAX +}; + +static char *command[MMA_CMD_MAX] = { + [MMA_REG_R] = "readreg", + [MMA_REG_W] = "writereg", + [MMA_SET_MOD] = "setmod", + [MMA_SET_L_THR] = "setlt", + [MMA_SET_P_THR] = "setpt", + [MMA_SET_INTP] = "setintp", + [MMA_SET_INTB] = "setintb", + [MMA_SET_G] = "setg", + [MMA_I2C_EABLE] = "setie", + [MMA_OFF_X] = "setxo", + [MMA_OFF_Y] = "setyo", + [MMA_OFF_Z] = "setzo", + [MMA_SELF_TEST] = "selft", + [MMA_SET_LDPL] = "setldp", + [MMA_SET_PDPL] = "setpdp", + [MMA_SET_PDV] = "setpdv", + [MMA_SET_LTV] = "setltv", + [MMA_SET_TW] = "settw", +}; + +static void set_mod(u8 mode) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_MCTL); + /* shall I test the ret value? */ + ret = (ret & ~0x3) | (mode & 0x3); + mma_status.mod = ret; + i2c_smbus_write_byte_data(mma7450_client, REG_MCTL, ret); +} + +static void set_level_thr(u8 lth) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_LDTH, lth); +} + +static void set_pulse_thr(u8 pth) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_PDTH, pth); +} + +static void set_int_pin(u8 pin) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_CTL1); + ret = (ret & ~0x1) | (pin & 0x1); + mma_status.ctl1 = ret; + i2c_smbus_write_byte_data(mma7450_client, REG_CTL1, ret); +} + +static void set_int_bit(u8 bit) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_CTL1); + ret = (ret & ~0x6) | ((bit << 1) & 0x6); + mma_status.ctl1 = ret; + i2c_smbus_write_byte_data(mma7450_client, REG_CTL1, ret); +} + +static void set_g_level(u8 gl) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_MCTL); + ret = (ret & ~0xC) | ((gl << 2) & 0xC); + i2c_smbus_write_byte_data(mma7450_client, REG_MCTL, ret); +} + +static void set_i2c_enable(u8 i2c_e) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_I2CAD); + ret = (ret & ~0x80) | ((i2c_e << 7) & 0x80); + i2c_smbus_write_byte_data(mma7450_client, REG_I2CAD, ret); +} + +static void set_x_offset(u16 xo) +{ + u8 data; + + data = (xo & 0xFF); + i2c_smbus_write_byte_data(mma7450_client, REG_XOFFL, data); + data = (xo & 0xFF00) >> 8; + i2c_smbus_write_byte_data(mma7450_client, REG_XOFFH, data); +} + +static void set_y_offset(u16 yo) +{ + u8 data; + + data = (yo & 0xFF); + i2c_smbus_write_byte_data(mma7450_client, REG_YOFFL, data); + data = (yo & 0xFF00) >> 8; + i2c_smbus_write_byte_data(mma7450_client, REG_YOFFH, data); +} + +static void set_z_offset(u16 zo) +{ + u8 data; + + data = (zo & 0xFF); + i2c_smbus_write_byte_data(mma7450_client, REG_ZOFFL, data); + data = (zo & 0xFF00) >> 8; + i2c_smbus_write_byte_data(mma7450_client, REG_ZOFFH, data); +} + +static void selftest(u8 st) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_MCTL); + ret = (ret & ~0x10) | ((st << 4) & 0x10); + i2c_smbus_write_byte_data(mma7450_client, REG_MCTL, ret); +} + +static void set_level_det_p(u8 ldp) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_CTL2); + ret = (ret & ~0x1) | ((ldp << 0) & 0x1); + mma_status.ctl2 = ret; + i2c_smbus_write_byte_data(mma7450_client, REG_CTL2, ret); +} + +static void set_pulse_det_p(u8 pdp) +{ + int ret; + + ret = i2c_smbus_read_byte_data(mma7450_client, REG_CTL2); + ret = (ret & ~0x2) | ((pdp << 1) & 0x2); + mma_status.ctl2 = ret; + i2c_smbus_write_byte_data(mma7450_client, REG_CTL2, ret); +} + +static void set_pulse_duration(u8 pd) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_PD, pd); +} + +static void set_latency_time(u8 lt) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_LT, lt); +} + +static void set_time_window(u8 tw) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_TW, tw); +} + +static void parse_arg(const char *arg, int *reg, int *value) +{ + const char *p; + + for (p = arg;; p++) { + if (*p == ' ' || *p == '\0') + break; + } + + p++; + + *reg = simple_strtoul(arg, NULL, 16); + *value = simple_strtoul(p, NULL, 16); +} + +static void cmd_read_reg(const char *arg) +{ + int reg, value, ret; + + parse_arg(arg, ®, &value); + ret = i2c_smbus_read_byte_data(mma7450_client, reg); + dev_info(&mma7450_client->dev, "read reg0x%x = %x\n", reg, ret); +} + +static void cmd_write_reg(const char *arg) +{ + int reg, value, ret; + + parse_arg(arg, ®, &value); + ret = i2c_smbus_write_byte_data(mma7450_client, reg, value); + dev_info(&mma7450_client->dev, "write reg result %s\n", + ret ? "failed" : "success"); +} + +static int exec_command(const char *buf, size_t count) +{ + const char *p, *s; + const char *arg; + int i, value = 0; + + for (p = buf;; p++) { + if (*p == ' ' || *p == '\0' || p - buf >= count) + break; + } + arg = p + 1; + + for (i = MMA_REG_R; i < MMA_CMD_MAX; i++) { + s = command[i]; + if (s && !strncmp(buf, s, p - buf)) { + dev_info(&mma7450_client->dev, "command %s\n", s); + goto mma_exec_command; + } + } + + dev_err(&mma7450_client->dev, "command is not found\n"); + return -1; + + mma_exec_command: + if (i != MMA_REG_R && i != MMA_REG_W) + value = simple_strtoul(arg, NULL, 16); + + switch (i) { + case MMA_REG_R: + cmd_read_reg(arg); + break; + case MMA_REG_W: + cmd_write_reg(arg); + break; + case MMA_SET_MOD: + set_mod(value); + break; + case MMA_SET_L_THR: + set_level_thr(value); + break; + case MMA_SET_P_THR: + set_pulse_thr(value); + break; + case MMA_SET_INTP: + set_int_pin(value); + break; + case MMA_SET_INTB: + set_int_bit(value); + break; + case MMA_SET_G: + set_g_level(value); + break; + case MMA_I2C_EABLE: + set_i2c_enable(value); + break; + case MMA_OFF_X: + set_x_offset(value); + break; + case MMA_OFF_Y: + set_y_offset(value); + break; + case MMA_OFF_Z: + set_z_offset(value); + break; + case MMA_SELF_TEST: + selftest(value); + break; + case MMA_SET_LDPL: + set_level_det_p(value); + break; + case MMA_SET_PDPL: + set_pulse_det_p(value); + break; + case MMA_SET_PDV: + set_pulse_duration(value); + break; + case MMA_SET_LTV: + set_latency_time(value); + break; + case MMA_SET_TW: + set_time_window(value); + break; + default: + dev_err(&mma7450_client->dev, "command is not found\n"); + break; + } + + return 0; +} + +static ssize_t mma7450_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int ret, reg; + + for (reg = REG_XOUTL; reg < REG_REVERVED_1; reg++) { + ret = i2c_smbus_read_byte_data(mma7450_client, reg); + dev_info(&mma7450_client->dev, "reg0x%02x:\t%03d\t0x%02x\n", + reg, (s8) ret, ret); + } + + return 0; +} + +static ssize_t mma7450_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + exec_command(buf, count); + + return count; +} + +#else + +static ssize_t mma7450_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return 0; +} + +static ssize_t mma7450_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + return count; +} + +#endif + +static void report_abs(void) +{ + u8 status, mod = mma_status.mod; + s16 x, y, z; + + status = i2c_smbus_read_byte_data(mma7450_client, REG_STATUS); + if (!(status & 0x01)) { /* data ready in measurement mode? */ + return; + } + if ((mod & 0x0c) == 0) { /* 8g range */ + x = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_XOUTL); + x |= 0xFF00 & + (i2c_smbus_read_byte_data(mma7450_client, REG_XOUTH) << 8); + y = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_YOUTL); + y |= 0xFF00 & + (i2c_smbus_read_byte_data(mma7450_client, REG_YOUTH) << 8); + z = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_ZOUTL); + z |= 0xFF00 & + (i2c_smbus_read_byte_data(mma7450_client, REG_ZOUTH) << 8); + } else { /* 2g/4g range */ + x = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_XOUT8); + y = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_YOUT8); + z = 0xFF & i2c_smbus_read_byte_data(mma7450_client, REG_ZOUT8); + } + + status = i2c_smbus_read_byte_data(mma7450_client, REG_STATUS); + if (status & 0x02) { /* data is overwrite */ + return; + } + + /* convert signed 10bits to signed 16bits */ + x = (short)(x << 6) >> 6; + y = (short)(y << 6) >> 6; + z = (short)(z << 6) >> 6; + + input_report_abs(mma7450_idev->input, ABS_X, x); + input_report_abs(mma7450_idev->input, ABS_Y, y); + input_report_abs(mma7450_idev->input, ABS_Z, z); + input_sync(mma7450_idev->input); +} + +static void mma_bh_handler(struct work_struct *work) +{ +} + +static void mma7450_dev_poll(struct input_polled_dev *dev) +{ + report_abs(); +} + +static irqreturn_t mma7450_interrupt(int irq, void *dev_id) +{ + struct input_dev *input_dev = dev_id; + u8 int_bit, int_pin; + + int_bit = mma_status.ctl1 & 0x6; + int_pin = mma_status.ctl1 & 0x1; + + switch (mma_status.mod & 0x03) { + case 1: + /*only int1 report data ready int */ + if (plat_data->int1 != irq) + goto error_bad_int; + schedule_work(&mma_work); + break; + case 2: + /* for level and pulse detection mode, + * choice tasklet to handle interrupt quickly. + * Currently, leave it doing nothing*/ + if (plat_data->int1 == irq) { + if ((int_bit == 0) && (int_pin != 0)) + goto error_bad_int; + if ((int_bit == 0x2) && (int_pin != 0x1)) + goto error_bad_int; + if (int_bit == 0x4) + goto error_bad_int; + } + if (plat_data->int2 == irq) { + if ((int_bit == 0) && (int_pin != 0x1)) + goto error_bad_int; + if ((int_bit == 0x2) && (int_pin != 0)) + goto error_bad_int; + if (int_bit == 0x4) + goto error_bad_int; + } + + dev_info(&input_dev->dev, "motion detected in level mod\n"); + + break; + case 3: + if (plat_data->int1 == irq) { + if ((int_bit == 0) && (int_pin != 0x1)) + goto error_bad_int; + if ((int_bit == 0x2) && (int_pin != 0)) + goto error_bad_int; + if ((int_bit == 0x4) && (int_pin != 0x1)) + goto error_bad_int; + } + if (plat_data->int2 == irq) { + if ((int_bit == 0) && (int_pin != 0)) + goto error_bad_int; + if ((int_bit == 0x2) && (int_pin != 0x1)) + goto error_bad_int; + if ((int_bit == 0x4) && (int_pin != 0)) + goto error_bad_int; + } + + if (mma_status.ctl2 & 0x02) + dev_info(&input_dev->dev, + "freefall detected in pulse mod\n"); + else + dev_info(&input_dev->dev, + "motion detected in pulse mod\n"); + + break; + case 0: + default: + break; + } + error_bad_int: + return IRQ_RETVAL(1); +} + +static int mma7450_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret; + struct input_dev *idev; + + plat_data = + (struct mxc_mma7450_platform_data *)client->dev.platform_data; + if (plat_data == NULL) { + dev_err(&client->dev, "lack of platform data!\n"); + return -ENODEV; + } + + /*enable power supply */ + /*when to power on/off the power is to be considered later */ + /*shall I check the return value */ + reg_dvdd_io = regulator_get(&client->dev, plat_data->reg_dvdd_io); + if (reg_dvdd_io != ERR_PTR(-ENOENT)) + regulator_enable(reg_dvdd_io); + else + return -EINVAL; + + reg_avdd = regulator_get(&client->dev, plat_data->reg_avdd); + if (reg_avdd != ERR_PTR(-ENOENT)) + regulator_enable(reg_avdd); + else { + regulator_put(reg_dvdd_io); + return -EINVAL; + } + + /*bind the right device to the driver */ + ret = i2c_smbus_read_byte_data(client, REG_I2CAD); + if (MMA7450_I2C_ADDR != (0x7F & ret)) { /*compare the address value */ + dev_err(&client->dev, + "read chip ID 0x%x is not equal to 0x%x!\n", ret, + MMA7450_I2C_ADDR); + goto error_disable_power; + } + mma7450_client = client; + + /*interrupt register */ + /*when to register interrupt is to be considered later */ + + /*create device file in sysfs as user interface */ + ret = device_create_file(&client->dev, &mma7450_dev_attr); + if (ret) { + dev_err(&client->dev, "create device file failed!\n"); + goto error_disable_power; + } + + /*register to hwmon device */ + hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(hwmon_dev)) { + dev_err(&client->dev, "hwmon register failed!\n"); + ret = PTR_ERR(hwmon_dev); + goto error_rm_dev_file; + } + + /*input poll device register */ + mma7450_idev = input_allocate_polled_device(); + if (!mma7450_idev) { + dev_err(&client->dev, "alloc poll device failed!\n"); + ret = -ENOMEM; + goto error_rm_hwmon_dev; + } + mma7450_idev->poll = mma7450_dev_poll; + mma7450_idev->poll_interval = POLL_INTERVAL; + idev = mma7450_idev->input; + idev->name = DEVICE_NAME; + idev->id.bustype = BUS_I2C; + idev->dev.parent = &client->dev; + idev->evbit[0] = BIT_MASK(EV_ABS); + + input_set_abs_params(idev, ABS_X, -512, 512, INPUT_FUZZ, INPUT_FLAT); + input_set_abs_params(idev, ABS_Y, -512, 512, INPUT_FUZZ, INPUT_FLAT); + input_set_abs_params(idev, ABS_Z, -512, 512, INPUT_FUZZ, INPUT_FLAT); + ret = input_register_polled_device(mma7450_idev); + if (ret) { + dev_err(&client->dev, "register poll device failed!\n"); + goto error_free_poll_dev; + } + + /* configure gpio as input for interrupt monitor */ + plat_data->gpio_pin_get(); + + set_irq_type(plat_data->int1, IRQF_TRIGGER_RISING); + /* register interrupt handle */ + ret = request_irq(plat_data->int1, mma7450_interrupt, + IRQF_TRIGGER_RISING, DEVICE_NAME, idev); + + if (ret) { + dev_err(&client->dev, "request_irq(%d) returned error %d\n", + plat_data->int1, ret); + goto error_rm_poll_dev; + } + + set_irq_type(plat_data->int2, IRQF_TRIGGER_RISING); + ret = request_irq(plat_data->int2, mma7450_interrupt, + IRQF_TRIGGER_RISING, DEVICE_NAME, idev); + if (ret) { + dev_err(&client->dev, "request_irq(%d) returned error %d\n", + plat_data->int2, ret); + goto error_free_irq1; + } + + dev_info(&client->dev, "mma7450 device is probed successfully.\n"); + + set_mod(1); + return 0; /*what value shall be return */ + + /*error handle */ + error_free_irq1: + free_irq(plat_data->int1, 0); + error_rm_poll_dev: + input_unregister_polled_device(mma7450_idev); + error_free_poll_dev: + input_free_polled_device(mma7450_idev); + error_rm_hwmon_dev: + hwmon_device_unregister(hwmon_dev); + error_rm_dev_file: + device_remove_file(&client->dev, &mma7450_dev_attr); + error_disable_power: + regulator_disable(reg_dvdd_io); /*shall I check the return value */ + regulator_disable(reg_avdd); + regulator_put(reg_dvdd_io); + regulator_put(reg_avdd); + + return ret; +} + +static int mma7450_remove(struct i2c_client *client) +{ + free_irq(plat_data->int2, mma7450_idev->input); + free_irq(plat_data->int1, mma7450_idev->input); + plat_data->gpio_pin_put(); + input_unregister_polled_device(mma7450_idev); + input_free_polled_device(mma7450_idev); + hwmon_device_unregister(hwmon_dev); + device_remove_file(&client->dev, &mma7450_dev_attr); + regulator_disable(reg_dvdd_io); /*shall I check the return value */ + regulator_disable(reg_avdd); + regulator_put(reg_dvdd_io); + regulator_put(reg_avdd); + return 0; +} + +static int mma7450_suspend(struct i2c_client *client, pm_message_t state) +{ + mma7450_mode = i2c_smbus_read_byte_data(mma7450_client, REG_MCTL); + i2c_smbus_write_byte_data(mma7450_client, REG_MCTL, + mma7450_mode & ~0x3); + return 0; +} + +static int mma7450_resume(struct i2c_client *client) +{ + i2c_smbus_write_byte_data(mma7450_client, REG_MCTL, mma7450_mode); + return 0; +} + +static int __init init_mma7450(void) +{ + /*register driver */ + printk(KERN_INFO "add mma i2c driver\n"); + return i2c_add_driver(&i2c_mma7450_driver); +} + +static void __exit exit_mma7450(void) +{ + printk(KERN_INFO "del mma i2c driver.\n"); + return i2c_del_driver(&i2c_mma7450_driver); +} + +module_init(init_mma7450); +module_exit(exit_mma7450); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MMA7450 sensor driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/hwmon/Kconfig @@ -1026,4 +1026,14 @@ a problem with I2C support and want to see more of what is going on. +config MXC_MMA7450 + tristate "MMA7450 device driver" + depends on MACH_MX31_3DS + default n + +config SENSORS_ISL29003 + tristate "ISL29003 Light Sensor" + depends on MACH_MX37_3DS || MACH_MX51_3DS + default y + endif # HWMON --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/Makefile +++ linux-fsl-imx51-2.6.31/drivers/hwmon/Makefile @@ -88,7 +88,9 @@ obj-$(CONFIG_SENSORS_VT8231) += vt8231.o obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o +obj-$(CONFIG_MXC_MMA7450) += mxc_mma7450.o obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o +obj-$(CONFIG_SENSORS_ISL29003) += isl29003.o ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y) EXTRA_CFLAGS += -DDEBUG --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/adt7475.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/adt7475.c @@ -350,8 +350,7 @@ case FAULT: /* Note - only for remote1 and remote2 */ - out = data->alarms & (sattr->index ? 0x8000 : 0x4000); - out = out ? 0 : 1; + out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000)); break; default: @@ -1152,7 +1151,7 @@ } /* Limits and settings, should never change update every 60 seconds */ - if (time_after(jiffies, data->limits_updated + HZ * 2) || + if (time_after(jiffies, data->limits_updated + HZ * 60) || !data->valid) { data->config5 = adt7475_read(REG_CONFIG5); --- linux-fsl-imx51-2.6.31.orig/drivers/hwmon/isl29003.c +++ linux-fsl-imx51-2.6.31/drivers/hwmon/isl29003.c @@ -0,0 +1,438 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drivers/hwmon/isl29003.c + * + * @brief ISL29003 light sensor Driver + * + * @ingroup + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum isl29003_width { + ISL29003_WIDTH_16 = 0, + ISL29003_WIDTH_12, + ISL29003_WIDTH_8, + ISL29003_WIDTH_4, +}; + +enum isl29003_gain { + ISL29003_GAIN_1000 = 0, + ISL29003_GAIN_4000, + ISL29003_GAIN_16000, + ISL29003_GAIN_64000, +}; + +enum isl29003_mode { + ISL29003_MODE_DIODE1 = 0, + ISL29003_MODE_DIODE2, + ISL29003_MODE_DIODE1_2, +}; + +struct isl29003_param { + enum isl29003_width width; + enum isl29003_gain gain; + enum isl29003_mode mode; +}; + +/* bit definition for ISL29003_CMD reg */ +#define ENABLE 7 +#define ADCPD 6 +#define TIMEING_MODE 5 +#define MODE 2 +#define WIDTH 0 + +/* bit definition for ISL29003_CTRL reg */ +#define INT_FLAG 5 +#define GAIN 2 +#define INT_PERSIST 0 + +enum isl29003_reg { + ISL29003_CMD = 0, + ISL29003_CTRL, + ISL29003_THRS_HI, + ISL29003_THRS_LO, + ISL29003_LSB_S, + ISL29003_MSB_S, + ISL29003_LSB_T, + ISL29003_MSB_T, + ISL29003_SYNC_IIC = 0x80, + ISL29003_CLAR_INT = 0x40 +}; + +/* default configure for ISL29003 */ +#define ISL29003_WIDTH_DEFAULT ISL29003_WIDTH_16 +#define ISL29003_GAIN_DEFAULT ISL29003_GAIN_16000 +#define ISL29003_MODE_DEFAULT ISL29003_MODE_DIODE1 + +/* range table for different GAIN settings */ +int range[4] = { 973, 3892, 15568, 62272 }; + +/* width table for different WIDTH settings */ +int width[4] = { 16, 1, 256, 16 }; + +struct isl29003_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct regulator *vdd_reg; + struct isl29003_param param; + int lux_coeff; + unsigned char enable; +}; + +static struct i2c_client *isl29003_client; + +/*! + * This function do the isl29003 register read. + */ +int isl29003_read(struct i2c_client *client, u8 reg) +{ + return i2c_smbus_read_byte_data(client, reg); +} + +/*! + * This function do the isl29003 register write. + */ +int isl29003_write(struct i2c_client *client, u8 reg, char value) +{ + return i2c_smbus_write_byte_data(client, reg, value); +} + +/*! + * This function do the isl29003 config and enable. + */ +static int isl29003_on(void) +{ + unsigned char cmd; + int err = 0; + struct mxc_lightsensor_platform_data *ls_data; + struct isl29003_data *data = i2c_get_clientdata(isl29003_client); + + if (data->enable) + goto exit; + + ls_data = (struct mxc_lightsensor_platform_data *) + (isl29003_client->dev).platform_data; + + /* coeff=range*100k/rext/2^n */ + data->lux_coeff = range[data->param.gain] * 100 / + ls_data->rext / width[data->param.width]; + + if (data->vdd_reg) + regulator_enable(data->vdd_reg); + msleep(100); + + cmd = data->param.gain << GAIN; + if (isl29003_write(isl29003_client, ISL29003_CTRL, cmd)) { + err = -ENODEV; + goto exit; + } + + cmd = (data->param.width << WIDTH) | (data->param.mode << MODE) | + (1 << ENABLE); + if (isl29003_write(isl29003_client, ISL29003_CMD, cmd)) { + err = -ENODEV; + goto exit; + } + + data->enable = 1; + + pr_info("isl29003 on\n"); + return 0; +exit: + return err; +} + +/*! + * This function shut down the isl29003. + */ +static int isl29003_off(void) +{ + struct isl29003_data *data = i2c_get_clientdata(isl29003_client); + int cmd; + + if (!data->enable) + return 0; + + cmd = isl29003_read(isl29003_client, ISL29003_CMD); + if (cmd < 0) + return -ENODEV; + + cmd = ((cmd | (1 << ADCPD)) & (~(1 << ENABLE))); + if (isl29003_write(isl29003_client, ISL29003_CMD, (char)cmd)) + return -ENODEV; + + if (data->vdd_reg) + regulator_disable(data->vdd_reg); + + data->enable = 0; + + pr_info("isl29003 off\n"); + return 0; +} + +/*! + * This function read the isl29003 lux registers and convert them to the lux + * value. + * + * @output buffer this param holds the lux value, when =-1, read fail + * + * @return 0 + */ +static int isl29003_read_lux(void) +{ + int d; + int lux; + struct isl29003_data *data = i2c_get_clientdata(isl29003_client); + + d = isl29003_read(isl29003_client, ISL29003_MSB_S); + if (d < 0) + goto err; + + lux = d; + d = isl29003_read(isl29003_client, ISL29003_LSB_S); + if (d < 0) + goto err; + + lux = (lux << 8) + d; + + if (data->param.width < ISL29003_WIDTH_8) + lux = (data->lux_coeff * lux) >> 12; + else + lux = data->lux_coeff * lux; + + return lux; +err: + return -1; +} + +static ssize_t ls_enable(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + char *endp; + int enable = simple_strtoul(buf, &endp, 0); + size_t size = endp - buf; + + if (*endp && isspace(*endp)) + size++; + if (size != count) + return -EINVAL; + + if (enable == 1) { + if (isl29003_on()) + pr_info("device open fail\n"); + } + if (enable == 0) { + if (isl29003_off()) + pr_info("device powerdown fail\n"); + } + + return count; +} + +static SENSOR_DEVICE_ATTR(enable, S_IWUGO, NULL, ls_enable, 0); + +static ssize_t show_lux(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return snprintf(buf, PAGE_SIZE, "%u\n", isl29003_read_lux()); +} + +static SENSOR_DEVICE_ATTR(lux, S_IRUGO, show_lux, NULL, 0); + +static int isl29003_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *did) +{ + int err = 0; + struct isl29003_data *data; + struct regulator *vdd_reg; + struct mxc_lightsensor_platform_data *ls_data; + + ls_data = (struct mxc_lightsensor_platform_data *) + (client->dev).platform_data; + + if (ls_data && ls_data->vdd_reg) + vdd_reg = regulator_get(&client->dev, ls_data->vdd_reg); + else + vdd_reg = NULL; + + /* check the existence of the device */ + if (vdd_reg) + regulator_enable(vdd_reg); + msleep(100); + + if (isl29003_write(client, ISL29003_CMD, 0)) + err = -ENODEV; + + if (!err) + if (isl29003_read(client, ISL29003_CMD)) + err = -ENODEV; + + if (vdd_reg) + regulator_disable(vdd_reg); + if (err < 0) + goto exit1; + + isl29003_client = client; + data = kzalloc(sizeof(struct isl29003_data), GFP_KERNEL); + if (data == NULL) { + err = -ENOMEM; + goto exit1; + } + + i2c_set_clientdata(client, data); + data->client = client; + + data->param.width = ISL29003_WIDTH_DEFAULT; + data->param.gain = ISL29003_GAIN_DEFAULT; + data->param.mode = ISL29003_MODE_DEFAULT; + + data->enable = 0; + + err = device_create_file(&client->dev, + &sensor_dev_attr_enable.dev_attr); + if (err) + goto exit2; + + err = device_create_file(&client->dev, &sensor_dev_attr_lux.dev_attr); + if (err) + goto exit_remove1; + + /* Register sysfs hooks */ + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove2; + } + + data->vdd_reg = vdd_reg; + return 0; + +exit_remove2: + device_remove_file(&client->dev, &sensor_dev_attr_lux.dev_attr); +exit_remove1: + device_remove_file(&client->dev, &sensor_dev_attr_enable.dev_attr); +exit2: + kfree(data); +exit1: + if (vdd_reg) { + regulator_put(vdd_reg); + vdd_reg = NULL; + } + isl29003_client = NULL; + return err; +} + +static int isl29003_i2c_remove(struct i2c_client *client) +{ + struct isl29003_data *data = i2c_get_clientdata(client); + + if (data->vdd_reg) { + regulator_put(data->vdd_reg); + data->vdd_reg = NULL; + } + hwmon_device_unregister(data->hwmon_dev); + device_remove_file(&client->dev, &sensor_dev_attr_enable.dev_attr); + device_remove_file(&client->dev, &sensor_dev_attr_lux.dev_attr); + kfree(data); + return 0; +} + +static int isl29003_suspend(struct i2c_client *client, pm_message_t message) +{ + int cmd; + + struct isl29003_data *data = i2c_get_clientdata(client); + + if (!data->enable) + goto exit; + + cmd = isl29003_read(client, ISL29003_CMD); + if (cmd < 0) + goto err; + + cmd = (cmd | (1 << ADCPD)); + if (isl29003_write(client, ISL29003_CMD, (char)cmd)) + goto err; +exit: + return 0; +err: + return -ENODEV; +} + +static int isl29003_resume(struct i2c_client *client) +{ + int cmd; + + struct isl29003_data *data = i2c_get_clientdata(client); + + if (!data->enable) + goto exit; + + cmd = isl29003_read(client, ISL29003_CMD); + if (cmd < 0) + goto err; + + cmd = (cmd & (~(1 << ADCPD))); + if (isl29003_write(client, ISL29003_CMD, (char)cmd)) + goto err; +exit: + return 0; +err: + return -ENODEV; +} + +static const struct i2c_device_id isl29003_id[] = { + {"isl29003", 0}, + {} +}; +MODULE_DEVICE_TABLE(i2c, isl29003_id); + +static struct i2c_driver isl29003_driver = { + .driver = { + .name = "isl29003", + }, + .probe = isl29003_i2c_probe, + .remove = isl29003_i2c_remove, + .suspend = isl29003_suspend, + .resume = isl29003_resume, + .id_table = isl29003_id, +}; + +static int __init isl29003_init(void) +{ + return i2c_add_driver(&isl29003_driver);; +} + +static void __exit isl29003_cleanup(void) +{ + i2c_del_driver(&isl29003_driver); +} + +module_init(isl29003_init); +module_exit(isl29003_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("ISL29003 light sensor driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/hid/hid-ids.h +++ linux-fsl-imx51-2.6.31/drivers/hid/hid-ids.h @@ -376,11 +376,8 @@ #define USB_DEVICE_ID_SONY_PS3_CONTROLLER 0x0268 #define USB_VENDOR_ID_SOUNDGRAPH 0x15c2 -#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD 0x0038 -#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2 0x0036 -#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3 0x0034 -#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD4 0x0044 -#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD5 0x0045 +#define USB_DEVICE_ID_SOUNDGRAPH_IMON_FIRST 0x0034 +#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LAST 0x0046 #define USB_VENDOR_ID_SUN 0x0430 #define USB_DEVICE_ID_RARITAN_KVM_DONGLE 0xcdab --- linux-fsl-imx51-2.6.31.orig/drivers/hid/hid-core.c +++ linux-fsl-imx51-2.6.31/drivers/hid/hid-core.c @@ -1319,7 +1319,6 @@ { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) }, { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) }, - { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, 0x030c) }, { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT) }, { } }; @@ -1623,11 +1622,6 @@ { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0003) }, { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0004) }, { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) }, - { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD) }, - { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3) }, - { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD4) }, - { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD5) }, { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY1) }, { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY2) }, { HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_LABPRO) }, @@ -1694,6 +1688,11 @@ hdev->product <= USB_DEVICE_ID_LOGITECH_HARMONY_LAST) return true; break; + case USB_VENDOR_ID_SOUNDGRAPH: + if (hdev->product >= USB_DEVICE_ID_SOUNDGRAPH_IMON_FIRST && + hdev->product <= USB_DEVICE_ID_SOUNDGRAPH_IMON_LAST) + return true; + break; } if (hdev->type == HID_TYPE_USBMOUSE && --- linux-fsl-imx51-2.6.31.orig/drivers/pci/dmar.c +++ linux-fsl-imx51-2.6.31/drivers/pci/dmar.c @@ -632,20 +632,31 @@ iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG); iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG); + if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) { + /* Promote an attitude of violence to a BIOS engineer today */ + WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n" + "BIOS vendor: %s; Ver: %s; Product Version: %s\n", + drhd->reg_base_addr, + dmi_get_system_info(DMI_BIOS_VENDOR), + dmi_get_system_info(DMI_BIOS_VERSION), + dmi_get_system_info(DMI_PRODUCT_VERSION)); + goto err_unmap; + } + #ifdef CONFIG_DMAR agaw = iommu_calculate_agaw(iommu); if (agaw < 0) { printk(KERN_ERR "Cannot get a valid agaw for iommu (seq_id = %d)\n", iommu->seq_id); - goto error; + goto err_unmap; } msagaw = iommu_calculate_max_sagaw(iommu); if (msagaw < 0) { printk(KERN_ERR "Cannot get a valid max agaw for iommu (seq_id = %d)\n", iommu->seq_id); - goto error; + goto err_unmap; } #endif iommu->agaw = agaw; @@ -665,7 +676,7 @@ } ver = readl(iommu->reg + DMAR_VER_REG); - pr_debug("IOMMU %llx: ver %d:%d cap %llx ecap %llx\n", + pr_info("IOMMU %llx: ver %d:%d cap %llx ecap %llx\n", (unsigned long long)drhd->reg_base_addr, DMAR_VER_MAJOR(ver), DMAR_VER_MINOR(ver), (unsigned long long)iommu->cap, @@ -675,7 +686,10 @@ drhd->iommu = iommu; return 0; -error: + + err_unmap: + iounmap(iommu->reg); + error: kfree(iommu); return -1; } --- linux-fsl-imx51-2.6.31.orig/drivers/pci/quirks.c +++ linux-fsl-imx51-2.6.31/drivers/pci/quirks.c @@ -1201,6 +1201,7 @@ switch(dev->subsystem_device) { case 0x00b8: /* Compaq Evo D510 CMT */ case 0x00b9: /* Compaq Evo D510 SFF */ + case 0x00ba: /* Compaq Evo D510 USDT */ /* Motherboard doesn't have Host bridge * subvendor/subdevice IDs and on-board VGA * controller is disabled if an AGP card is @@ -2382,8 +2383,10 @@ } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); static void __devinit quirk_msi_intx_disable_bug(struct pci_dev *dev) { @@ -2492,6 +2495,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov); #endif /* CONFIG_PCI_IOV */ --- linux-fsl-imx51-2.6.31.orig/drivers/pci/pci.c +++ linux-fsl-imx51-2.6.31/drivers/pci/pci.c @@ -591,7 +591,7 @@ */ int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state) { - return state > PCI_D0 ? + return state >= PCI_D0 ? pci_platform_power_transition(dev, state) : -EINVAL; } EXPORT_SYMBOL_GPL(__pci_complete_power_transition); @@ -628,10 +628,6 @@ */ return 0; - /* Check if we're already there */ - if (dev->current_state == state) - return 0; - __pci_start_power_transition(dev, state); /* This device is quirked not to be put into D3, so @@ -2650,6 +2646,11 @@ return 0; } +void __weak pci_fixup_cardbus(struct pci_bus *bus) +{ +} +EXPORT_SYMBOL(pci_fixup_cardbus); + static int __init pci_setup(char *str) { while (str) { --- linux-fsl-imx51-2.6.31.orig/drivers/pci/pcie/aer/aerdrv.c +++ linux-fsl-imx51-2.6.31/drivers/pci/pcie/aer/aerdrv.c @@ -52,7 +52,7 @@ static struct pcie_port_service_driver aerdriver = { .name = "aer", - .port_type = PCIE_ANY_PORT, + .port_type = PCIE_RC_PORT, .service = PCIE_PORT_SERVICE_AER, .probe = aer_probe, --- linux-fsl-imx51-2.6.31.orig/drivers/firewire/ohci.c +++ linux-fsl-imx51-2.6.31/drivers/firewire/ohci.c @@ -2180,6 +2180,13 @@ page = payload >> PAGE_SHIFT; offset = payload & ~PAGE_MASK; rest = p->payload_length; + /* + * The controllers I've tested have not worked correctly when + * second_req_count is zero. Rather than do something we know won't + * work, return an error + */ + if (rest == 0) + return -EINVAL; /* FIXME: make packet-per-buffer/dual-buffer a context option */ while (rest > 0) { @@ -2233,7 +2240,7 @@ unsigned long payload) { struct iso_context *ctx = container_of(base, struct iso_context, base); - struct descriptor *d = NULL, *pd = NULL; + struct descriptor *d, *pd; struct fw_iso_packet *p = packet; dma_addr_t d_bus, page_bus; u32 z, header_z, rest; @@ -2271,8 +2278,9 @@ d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d))); rest = payload_per_buffer; + pd = d; for (j = 1; j < z; j++) { - pd = d + j; + pd++; pd->control = cpu_to_le16(DESCRIPTOR_STATUS | DESCRIPTOR_INPUT_MORE); --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/rtc/Kconfig @@ -717,6 +717,43 @@ This RTC driver uses PXA RTC registers available since pxa27x series (RDxR, RYxR) instead of legacy RCNR, RTAR. +config RTC_MXC + tristate "Freescale MXC Real Time Clock" + depends on ARCH_MXC + depends on RTC_CLASS + help + Support for Freescale RTC MXC + +config RTC_DRV_MXC_V2 + tristate "Freescale MXC Secure Real Time Clock" + depends on ARCH_MXC + depends on RTC_CLASS + help + Support for Freescale SRTC MXC + +config RTC_DRV_IMXDI + tristate "Freescale IMX DryIce Real Time Clock" + depends on ARCH_MXC + depends on RTC_CLASS + help + Support for Freescale IMX DryIce RTC + +config RTC_MC13892 + tristate "Freescale MC13892 Real Time Clock" + depends on ARCH_MXC && MXC_PMIC_MC13892 + depends on RTC_CLASS + help + Support for Freescale MC13892 RTC + +config RTC_DRV_STMP3XXX + tristate "Sigmatel STMP3xxx series SoC RTC" + depends on ARCH_STMP3XXX && RTC_CLASS + help + Say Y here to get support for the real-time clock peripheral + on Sigmatel STMP3xxx series SoCs (tested on STMP3700). + + This driver can also be build as a module. If so, the module + will be called rtc-stmp3xxx. config RTC_DRV_SUN4V bool "SUN4V Hypervisor RTC" --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-stmp3xxx.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-stmp3xxx.c @@ -0,0 +1,292 @@ +/* + * Freescale STMP37XX/STMP378X Real Time Clock driver + * + * Copyright (c) 2007 Sigmatel, Inc. + * Peter Hartley, + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +struct stmp3xxx_rtc_data { + struct rtc_device *rtc; + unsigned irq_count; +}; + +/* Time read/write */ +static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) +{ + while (__raw_readl(REGS_RTC_BASE + HW_RTC_STAT) & BF(0x80, RTC_STAT_STALE_REGS)) + cpu_relax(); + + rtc_time_to_tm(__raw_readl(REGS_RTC_BASE + HW_RTC_SECONDS), rtc_tm); + return 0; +} + +static int stmp3xxx_rtc_settime(struct device *dev, struct rtc_time *rtc_tm) +{ + unsigned long t; + int rc = rtc_tm_to_time(rtc_tm, &t); + + if (rc == 0) { + __raw_writel(t, REGS_RTC_BASE + HW_RTC_SECONDS); + + /* The datasheet doesn't say which way round the + * NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0, + * 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS, + */ + while (__raw_readl(REGS_RTC_BASE + HW_RTC_STAT) & BF(0x80, RTC_STAT_NEW_REGS)) + cpu_relax(); + } + return rc; +} + +static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id) +{ + struct platform_device *pdev = to_platform_device(dev_id); + struct stmp3xxx_rtc_data *data = platform_get_drvdata(pdev); + u32 status; + u32 events = 0; + + status = __raw_readl(REGS_RTC_BASE + HW_RTC_CTRL) & + (BM_RTC_CTRL_ALARM_IRQ | BM_RTC_CTRL_ONEMSEC_IRQ); + if (status & BM_RTC_CTRL_ALARM_IRQ) { + __raw_writel(BM_RTC_CTRL_ALARM_IRQ, + REGS_RTC_BASE + HW_RTC_CTRL_CLR); + events |= RTC_AF | RTC_IRQF; + } + if (status & BM_RTC_CTRL_ONEMSEC_IRQ) { + __raw_writel(BM_RTC_CTRL_ONEMSEC_IRQ, + REGS_RTC_BASE + HW_RTC_CTRL_CLR); + if (++data->irq_count % 1000 == 0) { + events |= RTC_UF | RTC_IRQF; + data->irq_count = 0; + } + } + + if (events) + rtc_update_irq(data->rtc, 1, events); + + return IRQ_HANDLED; +} + +static int stmp3xxx_rtc_open(struct device *dev) +{ + int r; + + r = request_irq(IRQ_RTC_ALARM, stmp3xxx_rtc_interrupt, + IRQF_DISABLED, "RTC alarm", dev); + if (r) { + dev_err(dev, "Cannot claim IRQ%d\n", IRQ_RTC_ALARM); + goto fail_1; + } + r = request_irq(IRQ_RTC_1MSEC, stmp3xxx_rtc_interrupt, + IRQF_DISABLED, "RTC tick", dev); + if (r) { + dev_err(dev, "Cannot claim IRQ%d\n", IRQ_RTC_1MSEC); + goto fail_2; + } + + return 0; +fail_2: + free_irq(IRQ_RTC_ALARM, dev); +fail_1: + return r; +} + +static void stmp3xxx_rtc_release(struct device *dev) +{ + __raw_writel(BM_RTC_CTRL_ALARM_IRQ_EN | BM_RTC_CTRL_ONEMSEC_IRQ_EN, + REGS_RTC_BASE + HW_RTC_CTRL_CLR); + free_irq(IRQ_RTC_ALARM, dev); + free_irq(IRQ_RTC_1MSEC, dev); +} + +static int stmp3xxx_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + struct stmp3xxx_rtc_data *data = dev_get_drvdata(dev); + + switch (cmd) { + case RTC_AIE_OFF: + __raw_writel(BM_RTC_PERSISTENT0_ALARM_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE_EN, + REGS_RTC_BASE + HW_RTC_PERSISTENT0_CLR); + __raw_writel(BM_RTC_CTRL_ALARM_IRQ_EN, + REGS_RTC_BASE + HW_RTC_CTRL_CLR); + break; + case RTC_AIE_ON: + __raw_writel(BM_RTC_PERSISTENT0_ALARM_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE_EN, + REGS_RTC_BASE + HW_RTC_PERSISTENT0_SET); + + __raw_writel(BM_RTC_CTRL_ALARM_IRQ_EN, + REGS_RTC_BASE + HW_RTC_CTRL_SET); + break; + case RTC_UIE_ON: + data->irq_count = 0; + __raw_writel(BM_RTC_CTRL_ONEMSEC_IRQ_EN, + REGS_RTC_BASE + HW_RTC_CTRL_SET); + break; + case RTC_UIE_OFF: + __raw_writel(BM_RTC_CTRL_ONEMSEC_IRQ_EN, + REGS_RTC_BASE + HW_RTC_CTRL_CLR); + break; + default: + return -ENOIOCTLCMD; + } + + return 0; +} +static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + u32 t = __raw_readl(REGS_RTC_BASE + HW_RTC_ALARM); + + rtc_time_to_tm(t, &alm->time); + + return 0; +} + +static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + unsigned long t; + + rtc_tm_to_time(&alm->time, &t); + __raw_writel(t, REGS_RTC_BASE + HW_RTC_ALARM); + return 0; +} + +static struct rtc_class_ops stmp3xxx_rtc_ops = { + .open = stmp3xxx_rtc_open, + .release = stmp3xxx_rtc_release, + .ioctl = stmp3xxx_rtc_ioctl, + .read_time = stmp3xxx_rtc_gettime, + .set_time = stmp3xxx_rtc_settime, + .read_alarm = stmp3xxx_rtc_read_alarm, + .set_alarm = stmp3xxx_rtc_set_alarm, +}; + +static int stmp3xxx_rtc_remove(struct platform_device *dev) +{ + struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(dev); + + if (rtc_data) { + rtc_device_unregister(rtc_data->rtc); + kfree(rtc_data); + } + + return 0; +} + +static int stmp3xxx_rtc_probe(struct platform_device *pdev) +{ + u32 hwversion = __raw_readl(REGS_RTC_BASE + HW_RTC_VERSION); + u32 rtc_stat = __raw_readl(REGS_RTC_BASE + HW_RTC_STAT); + struct stmp3xxx_rtc_data *rtc_data = kzalloc(sizeof *rtc_data, + GFP_KERNEL); + + if ((rtc_stat & BM_RTC_STAT_RTC_PRESENT) == 0) + return -ENODEV; + if (!rtc_data) + return -ENOMEM; + + stmp3xxx_reset_block(REGS_RTC_BASE, 1); + + __raw_writel(BM_RTC_PERSISTENT0_ALARM_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE, + REGS_RTC_BASE + HW_RTC_PERSISTENT0_CLR); + __raw_writel(BM_RTC_PERSISTENT0_AUTO_RESTART, + REGS_RTC_BASE + HW_RTC_PERSISTENT0_SET); + + printk(KERN_INFO "STMP3xxx RTC driver v1.0 hardware v%u.%u.%u\n", + (hwversion >> 24), + (hwversion >> 16) & 0xFF, + hwversion & 0xFFFF); + + rtc_data->rtc = rtc_device_register(pdev->name, &pdev->dev, + &stmp3xxx_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc_data->rtc)) { + kfree(rtc_data); + return PTR_ERR(rtc_data->rtc); + } + + platform_set_drvdata(pdev, rtc_data); + + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxx_rtc_suspend(struct platform_device *dev, pm_message_t state) +{ + return 0; +} + +static int stmp3xxx_rtc_resume(struct platform_device *dev) +{ + stmp3xxx_reset_block(REGS_RTC_BASE, 1); + __raw_writel(BM_RTC_PERSISTENT0_ALARM_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE_EN | + BM_RTC_PERSISTENT0_ALARM_WAKE, + REGS_RTC_BASE + HW_RTC_PERSISTENT0_CLR); + return 0; +} +#else +#define stmp3xxx_rtc_suspend NULL +#define stmp3xxx_rtc_resume NULL +#endif + +static struct platform_driver stmp3xxx_rtcdrv = { + .probe = stmp3xxx_rtc_probe, + .remove = stmp3xxx_rtc_remove, + .suspend = stmp3xxx_rtc_suspend, + .resume = stmp3xxx_rtc_resume, + .driver = { + .name = "stmp3xxx-rtc", + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxx_rtc_init(void) +{ + return platform_driver_register(&stmp3xxx_rtcdrv); +} + +static void __exit stmp3xxx_rtc_exit(void) +{ + platform_driver_unregister(&stmp3xxx_rtcdrv); +} + +module_init(stmp3xxx_rtc_init); +module_exit(stmp3xxx_rtc_exit); + +MODULE_DESCRIPTION("STMP3xxx RTC Driver"); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/Makefile +++ linux-fsl-imx51-2.6.31/drivers/rtc/Makefile @@ -78,3 +78,8 @@ obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o +obj-$(CONFIG_RTC_MXC) += rtc-mxc.o +obj-$(CONFIG_RTC_DRV_MXC_V2) += rtc-mxc_v2.o +obj-$(CONFIG_RTC_DRV_IMXDI) += rtc-imxdi.o +obj-$(CONFIG_RTC_MC13892) += rtc-mc13892.o +obj-$(CONFIG_RTC_DRV_STMP3XXX) += rtc-stmp3xxx.o --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-mxc_v2.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-mxc_v2.c @@ -0,0 +1,719 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* + * Implementation based on rtc-ds1553.c + */ + +/*! + * @defgroup RTC Real Time Clock (RTC) Driver + */ +/*! + * @file rtc-mxc_v2.c + * @brief Real Time Clock interface + * + * This file contains Real Time Clock interface for Linux. + * + * @ingroup RTC + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SRTC_LPPDR_INIT 0x41736166 /* init for glitch detect */ + +#define SRTC_LPCR_SWR_LP (1 << 0) /* lp software reset */ +#define SRTC_LPCR_EN_LP (1 << 3) /* lp enable */ +#define SRTC_LPCR_WAE (1 << 4) /* lp wakeup alarm enable */ +#define SRTC_LPCR_SAE (1 << 5) /* lp security alarm enable */ +#define SRTC_LPCR_SI (1 << 6) /* lp security interrupt enable */ +#define SRTC_LPCR_ALP (1 << 7) /* lp alarm flag */ +#define SRTC_LPCR_LTC (1 << 8) /* lp lock time counter */ +#define SRTC_LPCR_LMC (1 << 9) /* lp lock monotonic counter */ +#define SRTC_LPCR_SV (1 << 10) /* lp security violation */ +#define SRTC_LPCR_NSA (1 << 11) /* lp non secure access */ +#define SRTC_LPCR_NVEIE (1 << 12) /* lp non valid state exit int en */ +#define SRTC_LPCR_IEIE (1 << 13) /* lp init state exit int enable */ +#define SRTC_LPCR_NVE (1 << 14) /* lp non valid state exit bit */ +#define SRTC_LPCR_IE (1 << 15) /* lp init state exit bit */ + +#define SRTC_LPCR_ALL_INT_EN (SRTC_LPCR_WAE | SRTC_LPCR_SAE | \ + SRTC_LPCR_SI | SRTC_LPCR_ALP | \ + SRTC_LPCR_NVEIE | SRTC_LPCR_IEIE) + +#define SRTC_LPSR_TRI (1 << 0) /* lp time read invalidate */ +#define SRTC_LPSR_PGD (1 << 1) /* lp power supply glitc detected */ +#define SRTC_LPSR_CTD (1 << 2) /* lp clock tampering detected */ +#define SRTC_LPSR_ALP (1 << 3) /* lp alarm flag */ +#define SRTC_LPSR_MR (1 << 4) /* lp monotonic counter rollover */ +#define SRTC_LPSR_TR (1 << 5) /* lp time rollover */ +#define SRTC_LPSR_EAD (1 << 6) /* lp external alarm detected */ +#define SRTC_LPSR_IT0 (1 << 7) /* lp IIM throttle */ +#define SRTC_LPSR_IT1 (1 << 8) +#define SRTC_LPSR_IT2 (1 << 9) +#define SRTC_LPSR_SM0 (1 << 10) /* lp security mode */ +#define SRTC_LPSR_SM1 (1 << 11) +#define SRTC_LPSR_STATE_LP0 (1 << 12) /* lp state */ +#define SRTC_LPSR_STATE_LP1 (1 << 13) +#define SRTC_LPSR_NVES (1 << 14) /* lp non-valid state exit status */ +#define SRTC_LPSR_IES (1 << 15) /* lp init state exit status */ + +#define MAX_PIE_NUM 15 +#define MAX_PIE_FREQ 32768 +#define MIN_PIE_FREQ 1 + +#define SRTC_PI0 (1 << 0) +#define SRTC_PI1 (1 << 1) +#define SRTC_PI2 (1 << 2) +#define SRTC_PI3 (1 << 3) +#define SRTC_PI4 (1 << 4) +#define SRTC_PI5 (1 << 5) +#define SRTC_PI6 (1 << 6) +#define SRTC_PI7 (1 << 7) +#define SRTC_PI8 (1 << 8) +#define SRTC_PI9 (1 << 9) +#define SRTC_PI10 (1 << 10) +#define SRTC_PI11 (1 << 11) +#define SRTC_PI12 (1 << 12) +#define SRTC_PI13 (1 << 13) +#define SRTC_PI14 (1 << 14) +#define SRTC_PI15 (1 << 15) + +#define PIT_ALL_ON (SRTC_PI1 | SRTC_PI2 | SRTC_PI3 | \ + SRTC_PI4 | SRTC_PI5 | SRTC_PI6 | SRTC_PI7 | \ + SRTC_PI8 | SRTC_PI9 | SRTC_PI10 | SRTC_PI11 | \ + SRTC_PI12 | SRTC_PI13 | SRTC_PI14 | SRTC_PI15) + +#define SRTC_SWR_HP (1 << 0) /* hp software reset */ +#define SRTC_EN_HP (1 << 3) /* hp enable */ +#define SRTC_TS (1 << 4) /* time syncronize hp with lp */ + +#define SRTC_IE_AHP (1 << 16) /* Alarm HP Interrupt Enable bit */ +#define SRTC_IE_WDHP (1 << 18) /* Write Done HP Interrupt Enable bit */ +#define SRTC_IE_WDLP (1 << 19) /* Write Done LP Interrupt Enable bit */ + +#define SRTC_ISR_AHP (1 << 16) /* interrupt status: alarm hp */ +#define SRTC_ISR_WDHP (1 << 18) /* interrupt status: write done hp */ +#define SRTC_ISR_WDLP (1 << 19) /* interrupt status: write done lp */ +#define SRTC_ISR_WPHP (1 << 20) /* interrupt status: write pending hp */ +#define SRTC_ISR_WPLP (1 << 21) /* interrupt status: write pending lp */ + +#define SRTC_LPSCMR 0x00 /* LP Secure Counter MSB Reg */ +#define SRTC_LPSCLR 0x04 /* LP Secure Counter LSB Reg */ +#define SRTC_LPSAR 0x08 /* LP Secure Alarm Reg */ +#define SRTC_LPSMCR 0x0C /* LP Secure Monotonic Counter Reg */ +#define SRTC_LPCR 0x10 /* LP Control Reg */ +#define SRTC_LPSR 0x14 /* LP Status Reg */ +#define SRTC_LPPDR 0x18 /* LP Power Supply Glitch Detector Reg */ +#define SRTC_LPGR 0x1C /* LP General Purpose Reg */ +#define SRTC_HPCMR 0x20 /* HP Counter MSB Reg */ +#define SRTC_HPCLR 0x24 /* HP Counter LSB Reg */ +#define SRTC_HPAMR 0x28 /* HP Alarm MSB Reg */ +#define SRTC_HPALR 0x2C /* HP Alarm LSB Reg */ +#define SRTC_HPCR 0x30 /* HP Control Reg */ +#define SRTC_HPISR 0x34 /* HP Interrupt Status Reg */ +#define SRTC_HPIENR 0x38 /* HP Interrupt Enable Reg */ + +#define SRTC_SECMODE_MASK 0x3 /* the mask of SRTC security mode */ +#define SRTC_SECMODE_LOW 0x0 /* Low Security */ +#define SRTC_SECMODE_MED 0x1 /* Medium Security */ +#define SRTC_SECMODE_HIGH 0x2 /* High Security */ +#define SRTC_SECMODE_RESERVED 0x3 /* Reserved */ + +struct rtc_drv_data { + struct rtc_device *rtc; + void __iomem *ioaddr; + unsigned long baseaddr; + int irq; + struct clk *clk; + bool irq_enable; +}; + +/*! + * @defgroup RTC Real Time Clock (RTC) Driver + */ +/*! + * @file rtc-mxc.c + * @brief Real Time Clock interface + * + * This file contains Real Time Clock interface for Linux. + * + * @ingroup RTC + */ + +static unsigned long rtc_status; + +static DEFINE_SPINLOCK(rtc_lock); + +/*! + * This function does write synchronization for writes to the lp srtc block. + * To take care of the asynchronous CKIL clock, all writes from the IP domain + * will be synchronized to the CKIL domain. + */ +static inline void rtc_write_sync_lp(void __iomem *ioaddr) +{ + unsigned int i, count; + /* Wait for 3 CKIL cycles */ + for (i = 0; i < 3; i++) { + count = __raw_readl(ioaddr + SRTC_LPSCLR); + while + ((__raw_readl(ioaddr + SRTC_LPSCLR)) == count); + } +} + +/*! + * This function updates the RTC alarm registers and then clears all the + * interrupt status bits. + * + * @param alrm the new alarm value to be updated in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + struct rtc_time alarm_tm, now_tm; + unsigned long now, time; + int ret; + + now = __raw_readl(ioaddr + SRTC_LPSCMR); + rtc_time_to_tm(now, &now_tm); + + alarm_tm.tm_year = now_tm.tm_year; + alarm_tm.tm_mon = now_tm.tm_mon; + alarm_tm.tm_mday = now_tm.tm_mday; + + alarm_tm.tm_hour = alrm->tm_hour; + alarm_tm.tm_min = alrm->tm_min; + alarm_tm.tm_sec = alrm->tm_sec; + + rtc_tm_to_time(&now_tm, &now); + rtc_tm_to_time(&alarm_tm, &time); + + if (time < now) { + time += 60 * 60 * 24; + rtc_time_to_tm(time, &alarm_tm); + } + ret = rtc_tm_to_time(&alarm_tm, &time); + + __raw_writel(time, ioaddr + SRTC_LPSAR); + + /* clear alarm interrupt status bit */ + __raw_writel(SRTC_LPSR_ALP, ioaddr + SRTC_LPSR); + + return ret; +} + +/*! + * This function is the RTC interrupt service routine. + * + * @param irq RTC IRQ number + * @param dev_id device ID which is not used + * + * @return IRQ_HANDLED as defined in the include/linux/interrupt.h file. + */ +static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + u32 lp_status, lp_cr; + u32 events = 0; + + clk_enable(pdata->clk); + lp_status = __raw_readl(ioaddr + SRTC_LPSR); + lp_cr = __raw_readl(ioaddr + SRTC_LPCR); + + /* update irq data & counter */ + if (lp_status & SRTC_LPSR_ALP) { + if (lp_cr & SRTC_LPCR_ALP) + events |= (RTC_AF | RTC_IRQF); + + /* disable further lp alarm interrupts */ + lp_cr &= ~(SRTC_LPCR_ALP | SRTC_LPCR_WAE); + } + + /* Update interrupt enables */ + __raw_writel(lp_cr, ioaddr + SRTC_LPCR); + + /* If no interrupts are enabled, turn off interrupts in kernel */ + if (((lp_cr & SRTC_LPCR_ALL_INT_EN) == 0) && (pdata->irq_enable)) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + + /* clear interrupt status */ + __raw_writel(lp_status, ioaddr + SRTC_LPSR); + clk_disable(pdata->clk); + + rtc_update_irq(pdata->rtc, 1, events); + return IRQ_HANDLED; +} + +/*! + * This function is used to open the RTC driver. + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_open(struct device *dev) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + clk_enable(pdata->clk); + + if (test_and_set_bit(1, &rtc_status)) + return -EBUSY; + return 0; +} + +/*! + * clear all interrupts and release the IRQ + */ +static void mxc_rtc_release(struct device *dev) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + + clk_disable(pdata->clk); + + rtc_status = 0; +} + +/*! + * This function is used to support some ioctl calls directly. + * Other ioctl calls are supported indirectly through the + * arm/common/rtctime.c file. + * + * @param cmd ioctl command as defined in include/linux/rtc.h + * @param arg value for the ioctl command + * + * @return 0 if successful or negative value otherwise. + */ +static int mxc_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long lock_flags = 0; + u32 lp_cr; + + switch (cmd) { + case RTC_AIE_OFF: + spin_lock_irqsave(&rtc_lock, lock_flags); + lp_cr = __raw_readl(ioaddr + SRTC_LPCR); + lp_cr &= ~(SRTC_LPCR_ALP | SRTC_LPCR_WAE); + if (((lp_cr & SRTC_LPCR_ALL_INT_EN) == 0) + && (pdata->irq_enable)) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + __raw_writel(lp_cr, ioaddr + SRTC_LPCR); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + return 0; + + case RTC_AIE_ON: + spin_lock_irqsave(&rtc_lock, lock_flags); + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + lp_cr = __raw_readl(ioaddr + SRTC_LPCR); + lp_cr |= SRTC_LPCR_ALP | SRTC_LPCR_WAE; + __raw_writel(lp_cr, ioaddr + SRTC_LPCR); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + return 0; + } + + return -ENOIOCTLCMD; +} + +/*! + * This function reads the current RTC time into tm in Gregorian date. + * + * @param tm contains the RTC time value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(__raw_readl(ioaddr + SRTC_LPSCMR), tm); + return 0; +} + +/*! + * This function sets the internal RTC time based on tm in Gregorian date. + * + * @param tm the time value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long time; + int ret; + ret = rtc_tm_to_time(tm, &time); + if (ret != 0) + return ret; + + __raw_writel(time, ioaddr + SRTC_LPSCMR); + rtc_write_sync_lp(ioaddr); + + return 0; +} + +/*! + * This function reads the current alarm value into the passed in \b alrm + * argument. It updates the \b alrm's pending field value based on the whether + * an alarm interrupt occurs or not. + * + * @param alrm contains the RTC alarm value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(__raw_readl(ioaddr + SRTC_LPSAR), &alrm->time); + alrm->pending = + ((__raw_readl(ioaddr + SRTC_LPSR) & SRTC_LPSR_ALP) != 0) ? 1 : 0; + + return 0; +} + +/*! + * This function sets the RTC alarm based on passed in alrm. + * + * @param alrm the alarm value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long lock_flags = 0; + u32 lp_cr; + int ret; + + if (rtc_valid_tm(&alrm->time)) { + if (alrm->time.tm_sec > 59 || + alrm->time.tm_hour > 23 || alrm->time.tm_min > 59) { + return -EINVAL; + } + } + + spin_lock_irqsave(&rtc_lock, lock_flags); + lp_cr = __raw_readl(ioaddr + SRTC_LPCR); + + ret = rtc_update_alarm(dev, &alrm->time); + if (ret) + goto out; + + if (alrm->enabled) + lp_cr |= (SRTC_LPCR_ALP | SRTC_LPCR_WAE); + else + lp_cr &= ~(SRTC_LPCR_ALP | SRTC_LPCR_WAE); + + if (lp_cr & SRTC_LPCR_ALL_INT_EN) { + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + } else { + if (pdata->irq_enable) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + __raw_writel(lp_cr, ioaddr + SRTC_LPCR); + +out: + spin_unlock_irqrestore(&rtc_lock, lock_flags); + rtc_write_sync_lp(ioaddr); + return ret; +} + +/*! + * This function is used to provide the content for the /proc/driver/rtc + * file. + * + * @param seq buffer to hold the information that the driver wants to write + * + * @return The number of bytes written into the rtc file. + */ +static int mxc_rtc_proc(struct device *dev, struct seq_file *seq) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + clk_enable(pdata->clk); + seq_printf(seq, "alarm_IRQ\t: %s\n", + (((__raw_readl(ioaddr + SRTC_LPCR)) & SRTC_LPCR_ALP) != + 0) ? "yes" : "no"); + clk_disable(pdata->clk); + + return 0; +} + +/*! + * The RTC driver structure + */ +static struct rtc_class_ops mxc_rtc_ops = { + .open = mxc_rtc_open, + .release = mxc_rtc_release, + .ioctl = mxc_rtc_ioctl, + .read_time = mxc_rtc_read_time, + .set_time = mxc_rtc_set_time, + .read_alarm = mxc_rtc_read_alarm, + .set_alarm = mxc_rtc_set_alarm, + .proc = mxc_rtc_proc, +}; + +/*! MXC RTC Power management control */ +static int mxc_rtc_probe(struct platform_device *pdev) +{ + struct clk *clk; + struct timespec tv; + struct resource *res; + struct rtc_device *rtc; + struct rtc_drv_data *pdata = NULL; + struct mxc_srtc_platform_data *plat_data = NULL; + void __iomem *ioaddr; + void __iomem *srtc_secmode_addr; + int ret = 0; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->clk = clk_get(&pdev->dev, "rtc_clk"); + clk_enable(pdata->clk); + pdata->baseaddr = res->start; + pdata->ioaddr = ioremap(pdata->baseaddr, 0x40); + ioaddr = pdata->ioaddr; + + /* Configure and enable the RTC */ + pdata->irq = platform_get_irq(pdev, 0); + if (pdata->irq >= 0) { + if (request_irq(pdata->irq, mxc_rtc_interrupt, IRQF_SHARED, + pdev->name, pdev) < 0) { + dev_warn(&pdev->dev, "interrupt not available.\n"); + pdata->irq = -1; + } else { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + clk = clk_get(NULL, "rtc_clk"); + if (clk_get_rate(clk) != 32768) { + printk(KERN_ALERT "rtc clock is not valid"); + ret = -EINVAL; + clk_put(clk); + goto err_out; + } + clk_put(clk); + + /* initialize glitch detect */ + __raw_writel(SRTC_LPPDR_INIT, ioaddr + SRTC_LPPDR); + udelay(100); + + /* clear lp interrupt status */ + __raw_writel(0xFFFFFFFF, ioaddr + SRTC_LPSR); + udelay(100);; + + plat_data = (struct mxc_srtc_platform_data *)pdev->dev.platform_data; + clk = clk_get(NULL, "iim_clk"); + clk_enable(clk); + srtc_secmode_addr = ioremap(plat_data->srtc_sec_mode_addr, 1); + + /* Check SRTC security mode */ + if (((__raw_readl(srtc_secmode_addr) & SRTC_SECMODE_MASK) == + SRTC_SECMODE_LOW) && (cpu_is_mx51_rev(CHIP_REV_1_0) == 1)) { + /* Workaround for MX51 TO1 due to inaccurate CKIL clock */ + __raw_writel(SRTC_LPCR_EN_LP, ioaddr + SRTC_LPCR); + udelay(100); + } else { + /* move out of init state */ + __raw_writel((SRTC_LPCR_IE | SRTC_LPCR_NSA), + ioaddr + SRTC_LPCR); + + udelay(100); + + while ((__raw_readl(ioaddr + SRTC_LPSR) & SRTC_LPSR_IES) == 0); + + /* move out of non-valid state */ + __raw_writel((SRTC_LPCR_IE | SRTC_LPCR_NVE | SRTC_LPCR_NSA | + SRTC_LPCR_EN_LP), ioaddr + SRTC_LPCR); + + udelay(100); + + while ((__raw_readl(ioaddr + SRTC_LPSR) & SRTC_LPSR_NVES) == 0); + + __raw_writel(0xFFFFFFFF, ioaddr + SRTC_LPSR); + udelay(100); + } + clk_disable(clk); + clk_put(clk); + + rtc = rtc_device_register(pdev->name, &pdev->dev, + &mxc_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) { + ret = PTR_ERR(rtc); + goto err_out; + } + + pdata->rtc = rtc; + platform_set_drvdata(pdev, pdata); + + tv.tv_nsec = 0; + tv.tv_sec = __raw_readl(ioaddr + SRTC_LPSCMR); + + /* By default, devices should wakeup if they can */ + /* So srtc is set as "should wakeup" as it can */ + device_init_wakeup(&pdev->dev, 1); + + clk_disable(pdata->clk); + + return ret; + +err_out: + clk_disable(pdata->clk); + iounmap(ioaddr); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + kfree(pdata); + return ret; +} + +static int __exit mxc_rtc_remove(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + rtc_device_unregister(pdata->rtc); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + + clk_disable(pdata->clk); + clk_put(pdata->clk); + kfree(pdata); + return 0; +} + +/*! + * This function is called to save the system time delta relative to + * the MXC RTC when enterring a low power state. This time delta is + * then used on resume to adjust the system time to account for time + * loss while suspended. + * + * @param pdev not used + * @param state Power state to enter. + * + * @return The function always returns 0. + */ +static int mxc_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + disable_irq(pdata->irq); + } + + return 0; +} + +/*! + * This function is called to correct the system time based on the + * current MXC RTC time relative to the time delta saved during + * suspend. + * + * @param pdev not used + * + * @return The function always returns 0. + */ +static int mxc_rtc_resume(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + enable_irq(pdata->irq); + } + + return 0; +} + +/*! + * Contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_rtc_driver = { + .driver = { + .name = "mxc_rtc", + }, + .probe = mxc_rtc_probe, + .remove = __exit_p(mxc_rtc_remove), + .suspend = mxc_rtc_suspend, + .resume = mxc_rtc_resume, +}; + +/*! + * This function creates the /proc/driver/rtc file and registers the device RTC + * in the /dev/misc directory. It also reads the RTC value from external source + * and setup the internal RTC properly. + * + * @return -1 if RTC is failed to initialize; 0 is successful. + */ +static int __init mxc_rtc_init(void) +{ + return platform_driver_register(&mxc_rtc_driver); +} + +/*! + * This function removes the /proc/driver/rtc file and un-registers the + * device RTC from the /dev/misc directory. + */ +static void __exit mxc_rtc_exit(void) +{ + platform_driver_unregister(&mxc_rtc_driver); + +} + +module_init(mxc_rtc_init); +module_exit(mxc_rtc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-mxc.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-mxc.c @@ -0,0 +1,736 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* + * Implementation based on rtc-ds1553.c + */ + +/*! + * @defgroup RTC Real Time Clock (RTC) Driver + */ +/*! + * @file rtc-mxc.c + * @brief Real Time Clock interface + * + * This file contains Real Time Clock interface for Linux. + * + * @ingroup RTC + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#define RTC_INPUT_CLK_32768HZ (0x00 << 5) +#define RTC_INPUT_CLK_32000HZ (0x01 << 5) +#define RTC_INPUT_CLK_38400HZ (0x02 << 5) + +#define RTC_SW_BIT (1 << 0) +#define RTC_ALM_BIT (1 << 2) +#define RTC_1HZ_BIT (1 << 4) +#define RTC_2HZ_BIT (1 << 7) +#define RTC_SAM0_BIT (1 << 8) +#define RTC_SAM1_BIT (1 << 9) +#define RTC_SAM2_BIT (1 << 10) +#define RTC_SAM3_BIT (1 << 11) +#define RTC_SAM4_BIT (1 << 12) +#define RTC_SAM5_BIT (1 << 13) +#define RTC_SAM6_BIT (1 << 14) +#define RTC_SAM7_BIT (1 << 15) +#define PIT_ALL_ON (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \ + RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \ + RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT) + +#define RTC_ENABLE_BIT (1 << 7) + +#define MAX_PIE_NUM 9 +#define MAX_PIE_FREQ 512 +const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = { + {2, RTC_2HZ_BIT}, + {4, RTC_SAM0_BIT}, + {8, RTC_SAM1_BIT}, + {16, RTC_SAM2_BIT}, + {32, RTC_SAM3_BIT}, + {64, RTC_SAM4_BIT}, + {128, RTC_SAM5_BIT}, + {256, RTC_SAM6_BIT}, + {MAX_PIE_FREQ, RTC_SAM7_BIT}, +}; + +/* Those are the bits from a classic RTC we want to mimic */ +#define RTC_IRQF 0x80 /* any of the following 3 is active */ +#define RTC_PF 0x40 /* Periodic interrupt */ +#define RTC_AF 0x20 /* Alarm interrupt */ +#define RTC_UF 0x10 /* Update interrupt for 1Hz RTC */ + +#define MXC_RTC_TIME 0 +#define MXC_RTC_ALARM 1 + +#define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */ +#define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */ +#define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */ +#define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */ +#define RTC_RTCCTL 0x10 /* 32bit rtc control reg */ +#define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */ +#define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */ +#define RTC_STPWCH 0x1C /* 32bit rtc stopwatch min reg */ +#define RTC_DAYR 0x20 /* 32bit rtc days counter reg */ +#define RTC_DAYALARM 0x24 /* 32bit rtc day alarm reg */ +#define RTC_TEST1 0x28 /* 32bit rtc test reg 1 */ +#define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */ +#define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */ + +struct rtc_plat_data { + struct rtc_device *rtc; + void __iomem *ioaddr; + unsigned long baseaddr; + int irq; + struct clk *clk; + unsigned int irqen; + int alrm_sec; + int alrm_min; + int alrm_hour; + int alrm_mday; +}; + +/*! + * @defgroup RTC Real Time Clock (RTC) Driver + */ +/*! + * @file rtc-mxc.c + * @brief Real Time Clock interface + * + * This file contains Real Time Clock interface for Linux. + * + * @ingroup RTC + */ + +#define RTC_VERSION "1.0" +#define MXC_EXTERNAL_RTC_OK 0 +#define MXC_EXTERNAL_RTC_ERR -1 +#define MXC_EXTERNAL_RTC_NONE -2 + +static u32 rtc_freq = 2; /* minimun value for PIE */ +static unsigned long rtc_status; + +static struct rtc_time g_rtc_alarm = { + .tm_year = 0, + .tm_mon = 0, + .tm_mday = 0, + .tm_hour = 0, + .tm_mon = 0, + .tm_sec = 0, +}; + +static DEFINE_SPINLOCK(rtc_lock); + +/*! + * This function is used to obtain the RTC time or the alarm value in + * second. + * + * @param time_alarm use MXC_RTC_TIME for RTC time value; MXC_RTC_ALARM for alarm value + * + * @return The RTC time or alarm time in second. + */ +static u32 get_alarm_or_time(struct device *dev, int time_alarm) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + u32 day, hr, min, sec, hr_min; + if (time_alarm == MXC_RTC_TIME) { + day = readw(ioaddr + RTC_DAYR); + hr_min = readw(ioaddr + RTC_HOURMIN); + sec = readw(ioaddr + RTC_SECOND); + } else if (time_alarm == MXC_RTC_ALARM) { + day = readw(ioaddr + RTC_DAYALARM); + hr_min = (0x0000FFFF) & readw(ioaddr + RTC_ALRM_HM); + sec = readw(ioaddr + RTC_ALRM_SEC); + } else { + panic("wrong value for time_alarm=%d\n", time_alarm); + } + + hr = hr_min >> 8; + min = hr_min & 0x00FF; + + return ((((day * 24 + hr) * 60) + min) * 60 + sec); +} + +/*! + * This function sets the RTC alarm value or the time value. + * + * @param time_alarm the new alarm value to be updated in the RTC + * @param time use MXC_RTC_TIME for RTC time value; MXC_RTC_ALARM for alarm value + */ +static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time) +{ + u32 day, hr, min, sec, temp; + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + day = time / 86400; + time -= day * 86400; + /* time is within a day now */ + hr = time / 3600; + time -= hr * 3600; + /* time is within an hour now */ + min = time / 60; + sec = time - min * 60; + + temp = (hr << 8) + min; + + if (time_alarm == MXC_RTC_TIME) { + writew(day, ioaddr + RTC_DAYR); + writew(sec, ioaddr + RTC_SECOND); + writew(temp, ioaddr + RTC_HOURMIN); + } else if (time_alarm == MXC_RTC_ALARM) { + writew(day, ioaddr + RTC_DAYALARM); + writew(sec, ioaddr + RTC_ALRM_SEC); + writew(temp, ioaddr + RTC_ALRM_HM); + } else { + panic("wrong value for time_alarm=%d\n", time_alarm); + } +} + +/*! + * This function updates the RTC alarm registers and then clears all the + * interrupt status bits. + * + * @param alrm the new alarm value to be updated in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm) +{ + struct rtc_time alarm_tm, now_tm; + unsigned long now, time; + int ret; + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + + now = get_alarm_or_time(dev, MXC_RTC_TIME); + rtc_time_to_tm(now, &now_tm); + alarm_tm.tm_year = now_tm.tm_year; + alarm_tm.tm_mon = now_tm.tm_mon; + alarm_tm.tm_mday = now_tm.tm_mday; + alarm_tm.tm_hour = alrm->tm_hour; + alarm_tm.tm_min = alrm->tm_min; + alarm_tm.tm_sec = alrm->tm_sec; + rtc_tm_to_time(&now_tm, &now); + rtc_tm_to_time(&alarm_tm, &time); + if (time < now) { + time += 60 * 60 * 24; + rtc_time_to_tm(time, &alarm_tm); + } + ret = rtc_tm_to_time(&alarm_tm, &time); + + /* clear all the interrupt status bits */ + writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR); + + set_alarm_or_time(dev, MXC_RTC_ALARM, time); + + return ret; +} + +/*! + * This function is the RTC interrupt service routine. + * + * @param irq RTC IRQ number + * @param dev_id device ID which is not used + * + * @return IRQ_HANDLED as defined in the include/linux/interrupt.h file. + */ +static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + u32 status; + u32 events = 0; + spin_lock(&rtc_lock); + status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR); + /* clear interrupt sources */ + writew(status, ioaddr + RTC_RTCISR); + + /* clear alarm interrupt if it has occurred */ + if (status & RTC_ALM_BIT) { + status &= ~RTC_ALM_BIT; + } + + /* update irq data & counter */ + if (status & RTC_ALM_BIT) { + events |= (RTC_AF | RTC_IRQF); + } + if (status & RTC_1HZ_BIT) { + events |= (RTC_UF | RTC_IRQF); + } + if (status & PIT_ALL_ON) { + events |= (RTC_PF | RTC_IRQF); + } + + if ((status & RTC_ALM_BIT) && rtc_valid_tm(&g_rtc_alarm)) { + rtc_update_alarm(&pdev->dev, &g_rtc_alarm); + } + + spin_unlock(&rtc_lock); + rtc_update_irq(pdata->rtc, 1, events); + return IRQ_HANDLED; +} + +/*! + * This function is used to open the RTC driver by registering the RTC + * interrupt service routine. + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_open(struct device *dev) +{ + if (test_and_set_bit(1, &rtc_status)) + return -EBUSY; + return 0; +} + +/*! + * clear all interrupts and release the IRQ + */ +static void mxc_rtc_release(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + + spin_lock_irq(&rtc_lock); + writew(0, ioaddr + RTC_RTCIENR); /* Disable all rtc interrupts */ + writew(0xFFFFFFFF, ioaddr + RTC_RTCISR); /* Clear all interrupt status */ + spin_unlock_irq(&rtc_lock); + rtc_status = 0; +} + +/*! + * This function is used to support some ioctl calls directly. + * Other ioctl calls are supported indirectly through the + * arm/common/rtctime.c file. + * + * @param cmd ioctl command as defined in include/linux/rtc.h + * @param arg value for the ioctl command + * + * @return 0 if successful or negative value otherwise. + */ +static int mxc_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + int i; + switch (cmd) { + case RTC_PIE_OFF: + writew((readw(ioaddr + RTC_RTCIENR) & ~PIT_ALL_ON), + ioaddr + RTC_RTCIENR); + return 0; + case RTC_IRQP_SET: + if (arg < 2 || arg > MAX_PIE_FREQ || (arg % 2) != 0) + return -EINVAL; /* Also make sure a power of 2Hz */ + if ((arg > 64) && (!capable(CAP_SYS_RESOURCE))) + return -EACCES; + rtc_freq = arg; + return 0; + case RTC_IRQP_READ: + return put_user(rtc_freq, (u32 *) arg); + case RTC_PIE_ON: + for (i = 0; i < MAX_PIE_NUM; i++) { + if (PIE_BIT_DEF[i][0] == rtc_freq) { + break; + } + } + if (i == MAX_PIE_NUM) { + return -EACCES; + } + spin_lock_irq(&rtc_lock); + writew((readw(ioaddr + RTC_RTCIENR) | PIE_BIT_DEF[i][1]), + ioaddr + RTC_RTCIENR); + spin_unlock_irq(&rtc_lock); + return 0; + case RTC_AIE_OFF: + spin_lock_irq(&rtc_lock); + writew((readw(ioaddr + RTC_RTCIENR) & ~RTC_ALM_BIT), + ioaddr + RTC_RTCIENR); + spin_unlock_irq(&rtc_lock); + return 0; + + case RTC_AIE_ON: + spin_lock_irq(&rtc_lock); + writew((readw(ioaddr + RTC_RTCIENR) | RTC_ALM_BIT), + ioaddr + RTC_RTCIENR); + spin_unlock_irq(&rtc_lock); + return 0; + + case RTC_UIE_OFF: /* UIE is for the 1Hz interrupt */ + spin_lock_irq(&rtc_lock); + writew((readw(ioaddr + RTC_RTCIENR) & ~RTC_1HZ_BIT), + ioaddr + RTC_RTCIENR); + spin_unlock_irq(&rtc_lock); + return 0; + + case RTC_UIE_ON: + spin_lock_irq(&rtc_lock); + writew((readw(ioaddr + RTC_RTCIENR) | RTC_1HZ_BIT), + ioaddr + RTC_RTCIENR); + spin_unlock_irq(&rtc_lock); + return 0; + } + return -ENOIOCTLCMD; +} + +/*! + * This function reads the current RTC time into tm in Gregorian date. + * + * @param tm contains the RTC time value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + u32 val; + + /* Avoid roll-over from reading the different registers */ + do { + val = get_alarm_or_time(dev, MXC_RTC_TIME); + } while (val != get_alarm_or_time(dev, MXC_RTC_TIME)); + + rtc_time_to_tm(val, tm); + return 0; +} + +/*! + * This function sets the internal RTC time based on tm in Gregorian date. + * + * @param tm the time value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + unsigned long time; + int ret; + ret = rtc_tm_to_time(tm, &time); + if (ret != 0) { + return ret; + } + + /* Avoid roll-over from reading the different registers */ + do { + set_alarm_or_time(dev, MXC_RTC_TIME, time); + } while (time != get_alarm_or_time(dev, MXC_RTC_TIME)); + + return ret; +} + +/*! + * This function reads the current alarm value into the passed in \b alrm + * argument. It updates the \b alrm's pending field value based on the whether + * an alarm interrupt occurs or not. + * + * @param alrm contains the RTC alarm value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time); + alrm->pending = + ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT) != 0) ? 1 : 0; + + return 0; +} + +/*! + * This function sets the RTC alarm based on passed in alrm. + * + * @param alrm the alarm value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + int ret; + + spin_lock_irq(&rtc_lock); + if (rtc_valid_tm(&alrm->time)) { + if (alrm->time.tm_sec > 59 || + alrm->time.tm_hour > 23 || alrm->time.tm_min > 59) { + ret = -EINVAL; + goto out; + } + ret = rtc_update_alarm(dev, &alrm->time); + } else { + if ((ret = rtc_valid_tm(&alrm->time))) + goto out; + ret = rtc_update_alarm(dev, &alrm->time); + } + + if (ret == 0) { + memcpy(&g_rtc_alarm, &alrm->time, sizeof(struct rtc_time)); + + if (alrm->enabled) { + writew((readw(ioaddr + RTC_RTCIENR) | RTC_ALM_BIT), + ioaddr + RTC_RTCIENR); + } else { + writew((readw(ioaddr + RTC_RTCIENR) & ~RTC_ALM_BIT), + ioaddr + RTC_RTCIENR); + } + } + out: + spin_unlock_irq(&rtc_lock); + + return ret; +} + +/*! + * This function is used to provide the content for the /proc/driver/rtc + * file. + * + * @param buf the buffer to hold the information that the driver wants to write + * + * @return The number of bytes written into the rtc file. + */ +static int mxc_rtc_proc(struct device *dev, struct seq_file *sq) +{ + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + char *p = sq->buf; + + p += sprintf(p, "alarm_IRQ\t: %s\n", + (((readw(ioaddr + RTC_RTCIENR)) & RTC_ALM_BIT) != + 0) ? "yes" : "no"); + p += sprintf(p, "update_IRQ\t: %s\n", + (((readw(ioaddr + RTC_RTCIENR)) & RTC_1HZ_BIT) != + 0) ? "yes" : "no"); + p += sprintf(p, "periodic_IRQ\t: %s\n", + (((readw(ioaddr + RTC_RTCIENR)) & PIT_ALL_ON) != + 0) ? "yes" : "no"); + p += sprintf(p, "periodic_freq\t: %d\n", rtc_freq); + + return p - (sq->buf); +} + +/*! + * The RTC driver structure + */ +static struct rtc_class_ops mxc_rtc_ops = { + .open = mxc_rtc_open, + .release = mxc_rtc_release, + .ioctl = mxc_rtc_ioctl, + .read_time = mxc_rtc_read_time, + .set_time = mxc_rtc_set_time, + .read_alarm = mxc_rtc_read_alarm, + .set_alarm = mxc_rtc_set_alarm, + .proc = mxc_rtc_proc, +}; + +/*! MXC RTC Power management control */ + +static struct timespec mxc_rtc_delta; + +static int mxc_rtc_probe(struct platform_device *pdev) +{ + struct clk *clk; + struct timespec tv; + struct resource *res; + struct rtc_device *rtc; + struct rtc_plat_data *pdata = NULL; + u32 reg; + int ret = 0; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->clk = clk_get(&pdev->dev, "rtc_clk"); + clk_enable(pdata->clk); + + pdata->baseaddr = res->start; + pdata->ioaddr = ((void *)(IO_ADDRESS(pdata->baseaddr))); + /* Configure and enable the RTC */ + pdata->irq = platform_get_irq(pdev, 0); + if (pdata->irq >= 0) { + if (request_irq(pdata->irq, mxc_rtc_interrupt, IRQF_SHARED, + pdev->name, pdev) < 0) { + dev_warn(&pdev->dev, "interrupt not available.\n"); + pdata->irq = -1; + } + } + rtc = + rtc_device_register(pdev->name, &pdev->dev, &mxc_rtc_ops, + THIS_MODULE); + if (IS_ERR(rtc)) { + ret = PTR_ERR(rtc); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + kfree(pdata); + return ret; + } + pdata->rtc = rtc; + platform_set_drvdata(pdev, pdata); + tv.tv_nsec = 0; + tv.tv_sec = get_alarm_or_time(&pdev->dev, MXC_RTC_TIME); + clk = clk_get(NULL, "ckil"); + if (clk_get_rate(clk) == 32768) + reg = RTC_INPUT_CLK_32768HZ; + else if (clk_get_rate(clk) == 32000) + reg = RTC_INPUT_CLK_32000HZ; + else if (clk_get_rate(clk) == 38400) + reg = RTC_INPUT_CLK_38400HZ; + else { + printk(KERN_ALERT "rtc clock is not valid"); + return -EINVAL; + } + clk_put(clk); + reg |= RTC_ENABLE_BIT; + writew(reg, (pdata->ioaddr + RTC_RTCCTL)); + if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) { + printk(KERN_ALERT "rtc : hardware module can't be enabled!\n"); + return -EPERM; + } + printk("Real TIme clock Driver v%s \n", RTC_VERSION); + return ret; +} + +static int __exit mxc_rtc_remove(struct platform_device *pdev) +{ + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + rtc_device_unregister(pdata->rtc); + if (pdata->irq >= 0) { + free_irq(pdata->irq, pdev); + } + clk_disable(pdata->clk); + clk_put(pdata->clk); + kfree(pdata); + mxc_rtc_release(NULL); + return 0; +} + +/*! + * This function is called to save the system time delta relative to + * the MXC RTC when enterring a low power state. This time delta is + * then used on resume to adjust the system time to account for time + * loss while suspended. + * + * @param pdev not used + * @param state Power state to enter. + * + * @return The function always returns 0. + */ +static int mxc_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct timespec tv; + + /* calculate time delta for suspend */ + /* RTC precision is 1 second; adjust delta for avg 1/2 sec err */ + tv.tv_nsec = NSEC_PER_SEC >> 1; + tv.tv_sec = get_alarm_or_time(&pdev->dev, MXC_RTC_TIME); + set_normalized_timespec(&mxc_rtc_delta, + xtime.tv_sec - tv.tv_sec, + xtime.tv_nsec - tv.tv_nsec); + + return 0; +} + +/*! + * This function is called to correct the system time based on the + * current MXC RTC time relative to the time delta saved during + * suspend. + * + * @param pdev not used + * + * @return The function always returns 0. + */ +static int mxc_rtc_resume(struct platform_device *pdev) +{ + struct timespec tv; + struct timespec ts; + + tv.tv_nsec = 0; + tv.tv_sec = get_alarm_or_time(&pdev->dev, MXC_RTC_TIME); + + /* restore wall clock using delta against this RTC; + * adjust again for avg 1/2 second RTC sampling error + */ + set_normalized_timespec(&ts, + tv.tv_sec + mxc_rtc_delta.tv_sec, + (NSEC_PER_SEC >> 1) + mxc_rtc_delta.tv_nsec); + do_settimeofday(&ts); + + return 0; +} + +/*! + * Contains pointers to the power management callback functions. + */ +static struct platform_driver mxc_rtc_driver = { + .driver = { + .name = "mxc_rtc", + }, + .probe = mxc_rtc_probe, + .remove = __exit_p(mxc_rtc_remove), + .suspend = mxc_rtc_suspend, + .resume = mxc_rtc_resume, +}; + +/*! + * This function creates the /proc/driver/rtc file and registers the device RTC + * in the /dev/misc directory. It also reads the RTC value from external source + * and setup the internal RTC properly. + * + * @return -1 if RTC is failed to initialize; 0 is successful. + */ +static int __init mxc_rtc_init(void) +{ + return platform_driver_register(&mxc_rtc_driver); +} + +/*! + * This function removes the /proc/driver/rtc file and un-registers the + * device RTC from the /dev/misc directory. + */ +static void __exit mxc_rtc_exit(void) +{ + platform_driver_unregister(&mxc_rtc_driver); + +} + +device_initcall_sync(mxc_rtc_init); +module_exit(mxc_rtc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-v3020.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-v3020.c @@ -96,7 +96,7 @@ static unsigned char v3020_mmio_read_bit(struct v3020 *chip) { - return readl(chip->ioaddress) & (1 << chip->leftshift); + return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); } static struct v3020_chip_ops v3020_mmio_ops = { --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-imxdi.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-imxdi.c @@ -0,0 +1,580 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* based on rtc-mc13892.c */ + +/* + * This driver uses the 47-bit 32 kHz counter in the Freescale DryIce block + * to implement a Linux RTC. Times and alarms are truncated to seconds. + * Since the RTC framework performs API locking via rtc->ops_lock the + * only simultaneous accesses we need to deal with is updating DryIce + * registers while servicing an alarm. + * + * Note that reading the DSR (DryIce Status Register) automatically clears + * the WCF (Write Complete Flag). All DryIce writes are synchronized to the + * LP (Low Power) domain and set the WCF upon completion. Writes to the + * DIER (DryIce Interrupt Enable Register) are the only exception. These + * occur at normal bus speeds and do not set WCF. Periodic interrupts are + * not supported by the hardware. + */ + +/* #define DEBUG */ +/* #define DI_DEBUG_REGIO */ + +#include +#include +#include +#include +#include +#include +#include + +/* DryIce Register Definitions */ + +#define DTCMR 0x00 /* Time Counter MSB Reg */ +#define DTCLR 0x04 /* Time Counter LSB Reg */ + +#define DCAMR 0x08 /* Clock Alarm MSB Reg */ +#define DCALR 0x0c /* Clock Alarm LSB Reg */ +#define DCAMR_UNSET 0xFFFFFFFF /* doomsday - 1 sec */ + +#define DCR 0x10 /* Control Reg */ +#define DCR_TCE (1 << 3) /* Time Counter Enable */ + +#define DSR 0x14 /* Status Reg */ +#define DSR_WBF (1 << 10) /* Write Busy Flag */ +#define DSR_WNF (1 << 9) /* Write Next Flag */ +#define DSR_WCF (1 << 8) /* Write Complete Flag */ +#define DSR_WEF (1 << 7) /* Write Error Flag */ +#define DSR_CAF (1 << 4) /* Clock Alarm Flag */ +#define DSR_NVF (1 << 1) /* Non-Valid Flag */ +#define DSR_SVF (1 << 0) /* Security Violation Flag */ + +#define DIER 0x18 /* Interrupt Enable Reg */ +#define DIER_WNIE (1 << 9) /* Write Next Interrupt Enable */ +#define DIER_WCIE (1 << 8) /* Write Complete Interrupt Enable */ +#define DIER_WEIE (1 << 7) /* Write Error Interrupt Enable */ +#define DIER_CAIE (1 << 4) /* Clock Alarm Interrupt Enable */ + +#ifndef DI_DEBUG_REGIO +/* dryice read register */ +#define di_read(pdata, reg) __raw_readl((pdata)->ioaddr + (reg)) + +/* dryice write register */ +#define di_write(pdata, val, reg) __raw_writel((val), (pdata)->ioaddr + (reg)) +#else +/* dryice read register - debug version */ +static inline u32 di_read(struct rtc_drv_data *pdata, int reg) +{ + u32 val = __raw_readl(pdata->ioaddr + reg); + pr_info("di_read(0x%02x) = 0x%08x\n", reg, val); + return val; +} + +/* dryice write register - debug version */ +static inline void di_write(struct rtc_drv_data *pdata, u32 val, int reg) +{ + printk(KERN_INFO "di_write(0x%08x, 0x%02x)\n", val, reg); + __raw_writel(val, pdata->ioaddr + reg); +} +#endif + +/* + * dryice write register with wait and error handling. + * all registers, except for DIER, should use this method. + */ +#define di_write_wait_err(pdata, val, reg, rc, label) \ + do { \ + if (di_write_wait((pdata), (val), (reg))) { \ + rc = -EIO; \ + goto label; \ + } \ + } while (0) + +struct rtc_drv_data { + struct platform_device *pdev; /* pointer to platform dev */ + struct rtc_device *rtc; /* pointer to rtc struct */ + unsigned long baseaddr; /* physical bass address */ + void __iomem *ioaddr; /* virtual base address */ + int size; /* size of register region */ + int irq; /* dryice normal irq */ + struct clk *clk; /* dryice clock control */ + u32 dsr; /* copy of dsr reg from isr */ + spinlock_t irq_lock; /* irq resource lock */ + wait_queue_head_t write_wait; /* write-complete queue */ + struct mutex write_mutex; /* force reg writes to be sequential */ + struct work_struct work; /* schedule alarm work */ +}; + +/* + * enable a dryice interrupt + */ +static inline void di_int_enable(struct rtc_drv_data *pdata, u32 intr) +{ + unsigned long flags; + + spin_lock_irqsave(&pdata->irq_lock, flags); + di_write(pdata, di_read(pdata, DIER) | intr, DIER); + spin_unlock_irqrestore(&pdata->irq_lock, flags); +} + +/* + * disable a dryice interrupt + */ +static inline void di_int_disable(struct rtc_drv_data *pdata, u32 intr) +{ + unsigned long flags; + + spin_lock_irqsave(&pdata->irq_lock, flags); + di_write(pdata, di_read(pdata, DIER) & ~intr, DIER); + spin_unlock_irqrestore(&pdata->irq_lock, flags); +} + +/* + * This function attempts to clear the dryice write-error flag. + * + * A dryice write error is similar to a bus fault and should not occur in + * normal operation. Clearing the flag requires another write, so the root + * cause of the problem may need to be fixed before the flag can be cleared. + */ +static void clear_write_error(struct rtc_drv_data *pdata) +{ + int cnt; + + dev_warn(&pdata->pdev->dev, "WARNING: Register write error!\n"); + + for (;;) { + /* clear the write error flag */ + di_write(pdata, DSR_WEF, DSR); + + /* wait for it to take effect */ + for (cnt = 0; cnt < 100; cnt++) { + if ((di_read(pdata, DSR) & DSR_WEF) == 0) + return; + udelay(10); + } + dev_err(&pdata->pdev->dev, + "ERROR: Cannot clear write-error flag!\n"); + } +} + +/* + * Write a dryice register and wait until it completes. + * + * This function uses interrupts to determine when the + * write has completed. + */ +static int di_write_wait(struct rtc_drv_data *pdata, u32 val, int reg) +{ + int ret; + int rc = 0; + + /* serialize register writes */ + mutex_lock(&pdata->write_mutex); + + /* enable the write-complete interrupt */ + di_int_enable(pdata, DIER_WCIE); + + pdata->dsr = 0; + + /* do the register write */ + di_write(pdata, val, reg); + + /* wait for the write to finish */ + ret = wait_event_interruptible_timeout(pdata->write_wait, + pdata->dsr & (DSR_WCF | DSR_WEF), + 1 * HZ); + if (ret == 0) + dev_warn(&pdata->pdev->dev, "Write-wait timeout\n"); + + /* check for write error */ + if (pdata->dsr & DSR_WEF) { + clear_write_error(pdata); + rc = -EIO; + } + mutex_unlock(&pdata->write_mutex); + return rc; +} + +/* + * rtc device ioctl + * + * The rtc framework handles the basic rtc ioctls on behalf + * of the driver by calling the functions registered in the + * rtc_ops structure. + */ +static int dryice_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + + dev_dbg(dev, "%s(0x%x)\n", __func__, cmd); + switch (cmd) { + case RTC_AIE_OFF: /* alarm disable */ + di_int_disable(pdata, DIER_CAIE); + return 0; + + case RTC_AIE_ON: /* alarm enable */ + di_int_enable(pdata, DIER_CAIE); + return 0; + } + return -ENOIOCTLCMD; +} + +/* + * read the seconds portion of the current time from the dryice time counter + */ +static int dryice_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + unsigned long now; + + dev_dbg(dev, "%s\n", __func__); + now = di_read(pdata, DTCMR); + rtc_time_to_tm(now, tm); + + return 0; +} + +/* + * set the seconds portion of dryice time counter and clear the + * fractional part. + */ +static int dryice_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + unsigned long now; + int rc; + + dev_dbg(dev, "%s\n", __func__); + rc = rtc_tm_to_time(tm, &now); + if (rc == 0) { + /* zero the fractional part first */ + di_write_wait_err(pdata, 0, DTCLR, rc, err); + di_write_wait_err(pdata, now, DTCMR, rc, err); + } +err: + return rc; +} + +/* + * read the seconds portion of the alarm register. + * the fractional part of the alarm register is always zero. + */ +static int dryice_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + u32 dcamr; + + dev_dbg(dev, "%s\n", __func__); + dcamr = di_read(pdata, DCAMR); + rtc_time_to_tm(dcamr, &alarm->time); + + /* alarm is enabled if the interrupt is enabled */ + alarm->enabled = (di_read(pdata, DIER) & DIER_CAIE) != 0; + + /* don't allow the DSR read to mess up DSR_WCF */ + mutex_lock(&pdata->write_mutex); + + /* alarm is pending if the alarm flag is set */ + alarm->pending = (di_read(pdata, DSR) & DSR_CAF) != 0; + + mutex_unlock(&pdata->write_mutex); + + return 0; +} + +/* + * set the seconds portion of dryice alarm register + */ +static int dryice_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + unsigned long now; + unsigned long alarm_time; + int rc; + + dev_dbg(dev, "%s\n", __func__); + rc = rtc_tm_to_time(&alarm->time, &alarm_time); + if (rc) + return rc; + + /* don't allow setting alarm in the past */ + now = di_read(pdata, DTCMR); + if (alarm_time < now) + return -EINVAL; + + /* write the new alarm time */ + di_write_wait_err(pdata, (u32)alarm_time, DCAMR, rc, err); + + if (alarm->enabled) + di_int_enable(pdata, DIER_CAIE); /* enable alarm intr */ + else + di_int_disable(pdata, DIER_CAIE); /* disable alarm intr */ +err: + return rc; +} + +static struct rtc_class_ops dryice_rtc_ops = { + .ioctl = dryice_rtc_ioctl, + .read_time = dryice_rtc_read_time, + .set_time = dryice_rtc_set_time, + .read_alarm = dryice_rtc_read_alarm, + .set_alarm = dryice_rtc_set_alarm, +}; + +/* + * dryice "normal" interrupt handler + */ +static irqreturn_t dryice_norm_irq(int irq, void *dev_id) +{ + struct rtc_drv_data *pdata = dev_id; + u32 dsr, dier; + irqreturn_t rc = IRQ_NONE; + + dier = di_read(pdata, DIER); + + /* handle write complete and write error cases */ + if ((dier & DIER_WCIE)) { + /*If the write wait queue is empty then there is no pending + operations. It means the interrupt is for DryIce -Security. + IRQ must be returned as none.*/ + if (list_empty_careful(&pdata->write_wait.task_list)) + return rc; + + /* DSR_WCF clears itself on DSR read */ + dsr = di_read(pdata, DSR); + if ((dsr & (DSR_WCF | DSR_WEF))) { + /* mask the interrupt */ + di_int_disable(pdata, DIER_WCIE); + + /* save the dsr value for the wait queue */ + pdata->dsr |= dsr; + + wake_up_interruptible(&pdata->write_wait); + rc = IRQ_HANDLED; + } + } + + /* handle the alarm case */ + if ((dier & DIER_CAIE)) { + /* DSR_WCF clears itself on DSR read */ + dsr = di_read(pdata, DSR); + if (dsr & DSR_CAF) { + /* mask the interrupt */ + di_int_disable(pdata, DIER_CAIE); + + /* finish alarm in user context */ + schedule_work(&pdata->work); + rc = IRQ_HANDLED; + } + } + return rc; +} + +/* + * post the alarm event from user context so it can sleep + * on the write completion. + */ +static void dryice_work(struct work_struct *work) +{ + struct rtc_drv_data *pdata = container_of(work, struct rtc_drv_data, + work); + int rc; + + /* dismiss the interrupt (ignore error) */ + di_write_wait_err(pdata, DSR_CAF, DSR, rc, err); +err: + /* + * pass the alarm event to the rtc framework. note that + * rtc_update_irq expects to be called with interrupts off. + */ + local_irq_disable(); + rtc_update_irq(pdata->rtc, 1, RTC_AF | RTC_IRQF); + local_irq_enable(); +} + +/* + * probe for dryice rtc device + */ +static int dryice_rtc_probe(struct platform_device *pdev) +{ + struct rtc_device *rtc; + struct resource *res; + struct rtc_drv_data *pdata = NULL; + void __iomem *ioaddr = NULL; + int rc = 0; + + dev_dbg(&pdev->dev, "%s\n", __func__); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->pdev = pdev; + pdata->irq = -1; + pdata->size = res->end - res->start + 1; + + if (!request_mem_region(res->start, pdata->size, pdev->name)) { + rc = -EBUSY; + goto err; + } + pdata->baseaddr = res->start; + ioaddr = ioremap(pdata->baseaddr, pdata->size); + if (!ioaddr) { + rc = -ENOMEM; + goto err; + } + pdata->ioaddr = ioaddr; + pdata->irq = platform_get_irq(pdev, 0); + + init_waitqueue_head(&pdata->write_wait); + + INIT_WORK(&pdata->work, dryice_work); + + mutex_init(&pdata->write_mutex); + + pdata->clk = clk_get(NULL, "dryice_clk"); + clk_enable(pdata->clk); + + if (pdata->irq >= 0) { + if (request_irq(pdata->irq, dryice_norm_irq, IRQF_SHARED, + pdev->name, pdata) < 0) { + dev_warn(&pdev->dev, "interrupt not available.\n"); + pdata->irq = -1; + goto err; + } + } + + /* + * Initialize dryice hardware + */ + + /* put dryice into valid state */ + if (di_read(pdata, DSR) & DSR_NVF) + di_write_wait_err(pdata, DSR_NVF | DSR_SVF, DSR, rc, err); + + /* mask alarm interrupt */ + di_int_disable(pdata, DIER_CAIE); + + /* initialize alarm */ + di_write_wait_err(pdata, DCAMR_UNSET, DCAMR, rc, err); + di_write_wait_err(pdata, 0, DCALR, rc, err); + + /* clear alarm flag */ + if (di_read(pdata, DSR) & DSR_CAF) + di_write_wait_err(pdata, DSR_CAF, DSR, rc, err); + + /* the timer won't count if it has never been written to */ + if (!di_read(pdata, DTCMR)) + di_write_wait_err(pdata, 0, DTCMR, rc, err); + + /* start keeping time */ + if (!(di_read(pdata, DCR) & DCR_TCE)) + di_write_wait_err(pdata, di_read(pdata, DCR) | DCR_TCE, DCR, + rc, err); + + rtc = rtc_device_register(pdev->name, &pdev->dev, + &dryice_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) { + rc = PTR_ERR(rtc); + goto err; + } + pdata->rtc = rtc; + platform_set_drvdata(pdev, pdata); + + return 0; +err: + if (pdata->rtc) + rtc_device_unregister(pdata->rtc); + + if (pdata->irq >= 0) + free_irq(pdata->irq, pdata); + + if (pdata->clk) { + clk_disable(pdata->clk); + clk_put(pdata->clk); + } + + if (pdata->ioaddr) + iounmap(pdata->ioaddr); + + if (pdata->baseaddr) + release_mem_region(pdata->baseaddr, pdata->size); + + kfree(pdata); + + return rc; +} + +static int __exit dryice_rtc_remove(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + flush_scheduled_work(); + + if (pdata->rtc) + rtc_device_unregister(pdata->rtc); + + /* mask alarm interrupt */ + di_int_disable(pdata, DIER_CAIE); + + if (pdata->irq >= 0) + free_irq(pdata->irq, pdata); + + if (pdata->clk) { + clk_disable(pdata->clk); + clk_put(pdata->clk); + } + + if (pdata->ioaddr) + iounmap(pdata->ioaddr); + + if (pdata->baseaddr) + release_mem_region(pdata->baseaddr, pdata->size); + + kfree(pdata); + + return 0; +} + +static struct platform_driver dryice_rtc_driver = { + .driver = { + .name = "imxdi_rtc", + .owner = THIS_MODULE, + }, + .probe = dryice_rtc_probe, + .remove = __exit_p(dryice_rtc_remove), +}; + +static int __init dryice_rtc_init(void) +{ + pr_info("IMXDI Realtime Clock Driver (RTC)\n"); + return platform_driver_register(&dryice_rtc_driver); +} + +static void __exit dryice_rtc_exit(void) +{ + platform_driver_unregister(&dryice_rtc_driver); +} + +module_init(dryice_rtc_init); +module_exit(dryice_rtc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("IMXDI Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/rtc/rtc-mc13892.c +++ linux-fsl-imx51-2.6.31/drivers/rtc/rtc-mc13892.c @@ -0,0 +1,256 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include + +#include +#include + +#define RTC_TIME_LSH 0 +#define RTC_DAY_LSH 0 +#define RTCALARM_TIME_LSH 0 +#define RTCALARM_DAY_LSH 0 + +#define RTC_TIME_WID 17 +#define RTC_DAY_WID 15 +#define RTCALARM_TIME_WID 17 +#define RTCALARM_DAY_WID 15 + +static unsigned long rtc_status; + +static int mxc_rtc_open(struct device *dev) +{ + if (test_and_set_bit(1, &rtc_status)) + return -EBUSY; + return 0; +} + +static void mxc_rtc_release(struct device *dev) +{ + clear_bit(1, &rtc_status); +} + +static int mxc_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + switch (cmd) { + case RTC_AIE_OFF: + pr_debug("alarm off\n"); + CHECK_ERROR(pmic_write_reg(REG_RTC_ALARM, 0x100000, 0x100000)); + return 0; + case RTC_AIE_ON: + pr_debug("alarm on\n"); + CHECK_ERROR(pmic_write_reg(REG_RTC_ALARM, 0, 0x100000)); + return 0; + } + + return -ENOIOCTLCMD; +} + +static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0, day_reg_val2; + unsigned int mask, value; + unsigned long time; + + do { + mask = BITFMASK(RTC_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY, &value, mask)); + day_reg_val = BITFEXT(value, RTC_DAY); + + mask = BITFMASK(RTC_TIME); + CHECK_ERROR(pmic_read_reg(REG_RTC_TIME, &value, mask)); + tod_reg_val = BITFEXT(value, RTC_TIME); + + mask = BITFMASK(RTC_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY, &value, mask)); + day_reg_val2 = BITFEXT(value, RTC_DAY); + } while (day_reg_val != day_reg_val2); + + time = (unsigned long)((unsigned long)(tod_reg_val & + 0x0001FFFF) + + (unsigned long)(day_reg_val * 86400)); + + rtc_time_to_tm(time, tm); + + return 0; +} + +static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val, day_reg_val2 = 0; + unsigned int mask, value; + unsigned long time; + + if (rtc_valid_tm(tm)) + return -1; + + rtc_tm_to_time(tm, &time); + + tod_reg_val = time % 86400; + day_reg_val = time / 86400; + + do { + mask = BITFMASK(RTC_DAY); + value = BITFVAL(RTC_DAY, day_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_DAY, value, mask)); + + mask = BITFMASK(RTC_TIME); + value = BITFVAL(RTC_TIME, tod_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_TIME, value, mask)); + + mask = BITFMASK(RTC_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY, &value, mask)); + day_reg_val2 = BITFEXT(value, RTC_DAY); + } while (day_reg_val != day_reg_val2); + + return 0; +} + +static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + unsigned long time; + + mask = BITFMASK(RTCALARM_TIME); + CHECK_ERROR(pmic_read_reg(REG_RTC_ALARM, &value, mask)); + tod_reg_val = BITFEXT(value, RTCALARM_TIME); + + mask = BITFMASK(RTCALARM_DAY); + CHECK_ERROR(pmic_read_reg(REG_RTC_DAY_ALARM, &value, mask)); + day_reg_val = BITFEXT(value, RTCALARM_DAY); + + time = (unsigned long)((unsigned long)(tod_reg_val & + 0x0001FFFF) + + (unsigned long)(day_reg_val * 86400)); + rtc_time_to_tm(time, &(alrm->time)); + + return 0; +} + +static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + unsigned int tod_reg_val = 0; + unsigned int day_reg_val = 0; + unsigned int mask, value; + unsigned long time; + + if (rtc_valid_tm(&alrm->time)) + return -1; + + rtc_tm_to_time(&alrm->time, &time); + + tod_reg_val = time % 86400; + day_reg_val = time / 86400; + + mask = BITFMASK(RTCALARM_TIME); + value = BITFVAL(RTCALARM_TIME, tod_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_ALARM, value, mask)); + + mask = BITFMASK(RTCALARM_DAY); + value = BITFVAL(RTCALARM_DAY, day_reg_val); + CHECK_ERROR(pmic_write_reg(REG_RTC_DAY_ALARM, value, mask)); + + return 0; +} + +struct rtc_drv_data { + struct rtc_device *rtc; + pmic_event_callback_t event; +}; + +static struct rtc_class_ops mxc_rtc_ops = { + .open = mxc_rtc_open, + .release = mxc_rtc_release, + .ioctl = mxc_rtc_ioctl, + .read_time = mxc_rtc_read_time, + .set_time = mxc_rtc_set_time, + .read_alarm = mxc_rtc_read_alarm, + .set_alarm = mxc_rtc_set_alarm, +}; + +static void mxc_rtc_alarm_int(void *data) +{ + struct rtc_drv_data *pdata = data; + + rtc_update_irq(pdata->rtc, 1, RTC_AF | RTC_IRQF); +} + +static int mxc_rtc_probe(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = NULL; + + printk(KERN_INFO "mc13892 rtc probe start\n"); + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + + if (!pdata) + return -ENOMEM; + + pdata->event.func = mxc_rtc_alarm_int; + pdata->event.param = pdata; + CHECK_ERROR(pmic_event_subscribe(EVENT_TODAI, pdata->event)); + + device_init_wakeup(&pdev->dev, 1); + pdata->rtc = rtc_device_register(pdev->name, &pdev->dev, + &mxc_rtc_ops, THIS_MODULE); + + platform_set_drvdata(pdev, pdata); + if (IS_ERR(pdata->rtc)) + return -1; + + printk(KERN_INFO "mc13892 rtc probe succeed\n"); + return 0; +} + +static int __exit mxc_rtc_remove(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + rtc_device_unregister(pdata->rtc); + CHECK_ERROR(pmic_event_unsubscribe(EVENT_TODAI, pdata->event)); + + return 0; +} + +static struct platform_driver mxc_rtc_driver = { + .driver = { + .name = "pmic_rtc", + }, + .probe = mxc_rtc_probe, + .remove = __exit_p(mxc_rtc_remove), +}; + +static int __init mxc_rtc_init(void) +{ + return platform_driver_register(&mxc_rtc_driver); +} + +static void __exit mxc_rtc_exit(void) +{ + platform_driver_unregister(&mxc_rtc_driver); + +} + +module_init(mxc_rtc_init); +module_exit(mxc_rtc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MC13892 Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/pps/kapi.c +++ linux-fsl-imx51-2.6.31/drivers/pps/kapi.c @@ -271,6 +271,7 @@ { struct pps_device *pps; unsigned long flags; + int captured = 0; if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { printk(KERN_ERR "pps: unknown event (%x) for source %d\n", @@ -293,7 +294,8 @@ /* Check the event */ pps->current_mode = pps->params.mode; - if (event & PPS_CAPTUREASSERT) { + if ((event & PPS_CAPTUREASSERT) & + (pps->params.mode & PPS_CAPTUREASSERT)) { /* We have to add an offset? */ if (pps->params.mode & PPS_OFFSETASSERT) pps_add_offset(ts, &pps->params.assert_off_tu); @@ -303,8 +305,11 @@ pps->assert_sequence++; pr_debug("capture assert seq #%u for source %d\n", pps->assert_sequence, source); + + captured = ~0; } - if (event & PPS_CAPTURECLEAR) { + if ((event & PPS_CAPTURECLEAR) & + (pps->params.mode & PPS_CAPTURECLEAR)) { /* We have to add an offset? */ if (pps->params.mode & PPS_OFFSETCLEAR) pps_add_offset(ts, &pps->params.clear_off_tu); @@ -314,12 +319,17 @@ pps->clear_sequence++; pr_debug("capture clear seq #%u for source %d\n", pps->clear_sequence, source); + + captured = ~0; } - pps->go = ~0; - wake_up_interruptible(&pps->queue); + /* Wake up iif captured somthing */ + if (captured) { + pps->go = ~0; + wake_up_interruptible(&pps->queue); - kill_fasync(&pps->async_queue, SIGIO, POLL_IN); + kill_fasync(&pps->async_queue, SIGIO, POLL_IN); + } spin_unlock_irqrestore(&pps->lock, flags); --- linux-fsl-imx51-2.6.31.orig/drivers/pps/pps.c +++ linux-fsl-imx51-2.6.31/drivers/pps/pps.c @@ -71,9 +71,14 @@ case PPS_GETPARAMS: pr_debug("PPS_GETPARAMS: source %d\n", pps->id); - /* Return current parameters */ - err = copy_to_user(uarg, &pps->params, - sizeof(struct pps_kparams)); + spin_lock_irq(&pps->lock); + + /* Get the current parameters */ + params = pps->params; + + spin_unlock_irq(&pps->lock); + + err = copy_to_user(uarg, ¶ms, sizeof(struct pps_kparams)); if (err) return -EFAULT; --- linux-fsl-imx51-2.6.31.orig/drivers/ps3/ps3stor_lib.c +++ linux-fsl-imx51-2.6.31/drivers/ps3/ps3stor_lib.c @@ -23,6 +23,65 @@ #include #include +/* + * A workaround for flash memory I/O errors when the internal hard disk + * has not been formatted for OtherOS use. Delay disk close until flash + * memory is closed. + */ + +static struct ps3_flash_workaround { + int flash_open; + int disk_open; + struct ps3_system_bus_device *disk_sbd; +} ps3_flash_workaround; + +static int ps3stor_open_hv_device(struct ps3_system_bus_device *sbd) +{ + int error = ps3_open_hv_device(sbd); + + if (error) + return error; + + if (sbd->match_id == PS3_MATCH_ID_STOR_FLASH) + ps3_flash_workaround.flash_open = 1; + + if (sbd->match_id == PS3_MATCH_ID_STOR_DISK) + ps3_flash_workaround.disk_open = 1; + + return 0; +} + +static int ps3stor_close_hv_device(struct ps3_system_bus_device *sbd) +{ + int error; + + if (sbd->match_id == PS3_MATCH_ID_STOR_DISK + && ps3_flash_workaround.disk_open + && ps3_flash_workaround.flash_open) { + ps3_flash_workaround.disk_sbd = sbd; + return 0; + } + + error = ps3_close_hv_device(sbd); + + if (error) + return error; + + if (sbd->match_id == PS3_MATCH_ID_STOR_DISK) + ps3_flash_workaround.disk_open = 0; + + if (sbd->match_id == PS3_MATCH_ID_STOR_FLASH) { + ps3_flash_workaround.flash_open = 0; + + if (ps3_flash_workaround.disk_sbd) { + ps3_close_hv_device(ps3_flash_workaround.disk_sbd); + ps3_flash_workaround.disk_open = 0; + ps3_flash_workaround.disk_sbd = NULL; + } + } + + return 0; +} static int ps3stor_probe_access(struct ps3_storage_device *dev) { @@ -90,7 +149,7 @@ int error, res, alignment; enum ps3_dma_page_size page_size; - error = ps3_open_hv_device(&dev->sbd); + error = ps3stor_open_hv_device(&dev->sbd); if (error) { dev_err(&dev->sbd.core, "%s:%u: ps3_open_hv_device failed %d\n", __func__, @@ -166,7 +225,7 @@ fail_sb_event_receive_port_destroy: ps3_sb_event_receive_port_destroy(&dev->sbd, dev->irq); fail_close_device: - ps3_close_hv_device(&dev->sbd); + ps3stor_close_hv_device(&dev->sbd); fail: return error; } @@ -193,7 +252,7 @@ "%s:%u: destroy event receive port failed %d\n", __func__, __LINE__, error); - error = ps3_close_hv_device(&dev->sbd); + error = ps3stor_close_hv_device(&dev->sbd); if (error) dev_err(&dev->sbd.core, "%s:%u: ps3_close_hv_device failed %d\n", __func__, --- linux-fsl-imx51-2.6.31.orig/drivers/net/iseries_veth.c +++ linux-fsl-imx51-2.6.31/drivers/net/iseries_veth.c @@ -495,7 +495,7 @@ cnx->remote_lp); } else { memcpy(&cnx->cap_ack_event, event, - sizeof(&cnx->cap_ack_event)); + sizeof(cnx->cap_ack_event)); cnx->state |= VETH_STATE_GOTCAPACK; veth_kick_statemachine(cnx); } --- linux-fsl-imx51-2.6.31.orig/drivers/net/tg3.c +++ linux-fsl-imx51-2.6.31/drivers/net/tg3.c @@ -223,7 +223,7 @@ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57780)}, {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57760)}, {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57790)}, - {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57720)}, + {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57788)}, {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, @@ -11485,6 +11485,9 @@ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 && tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790) strcpy(tp->board_part_number, "BCM57790"); + else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 && + tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788) + strcpy(tp->board_part_number, "BCM57788"); else strcpy(tp->board_part_number, "none"); } --- linux-fsl-imx51-2.6.31.orig/drivers/net/pppol2tp.c +++ linux-fsl-imx51-2.6.31/drivers/net/pppol2tp.c @@ -1178,7 +1178,8 @@ /* Calculate UDP checksum if configured to do so */ if (sk_tun->sk_no_check == UDP_CSUM_NOXMIT) skb->ip_summed = CHECKSUM_NONE; - else if (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM)) { + else if ((skb_dst(skb) && skb_dst(skb)->dev) && + (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM))) { skb->ip_summed = CHECKSUM_COMPLETE; csum = skb_checksum(skb, 0, udp_len, 0); uh->check = csum_tcpudp_magic(inet->saddr, inet->daddr, --- linux-fsl-imx51-2.6.31.orig/drivers/net/niu.c +++ linux-fsl-imx51-2.6.31/drivers/net/niu.c @@ -7314,33 +7314,28 @@ struct niu_parent *parent = np->parent; struct niu_tcam_entry *tp; int i, idx, cnt; - u16 n_entries; unsigned long flags; - + int ret = 0; /* put the tcam size here */ nfc->data = tcam_get_size(np); niu_lock_parent(np, flags); - n_entries = nfc->rule_cnt; for (cnt = 0, i = 0; i < nfc->data; i++) { idx = tcam_get_index(np, i); tp = &parent->tcam[idx]; if (!tp->valid) continue; + if (cnt == nfc->rule_cnt) { + ret = -EMSGSIZE; + break; + } rule_locs[cnt] = i; cnt++; } niu_unlock_parent(np, flags); - if (n_entries != cnt) { - /* print warning, this should not happen */ - pr_info(PFX "niu%d: %s In niu_get_ethtool_tcam_all, " - "n_entries[%d] != cnt[%d]!!!\n\n", - np->parent->index, np->dev->name, n_entries, cnt); - } - - return 0; + return ret; } static int niu_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd, --- linux-fsl-imx51-2.6.31.orig/drivers/net/fec.h +++ linux-fsl-imx51-2.6.31/drivers/net/fec.h @@ -43,6 +43,8 @@ #define FEC_R_DES_START 0x180 /* Receive descriptor ring */ #define FEC_X_DES_START 0x184 /* Transmit descriptor ring */ #define FEC_R_BUFF_SIZE 0x188 /* Maximum receive buff size */ +#define FEC_MIIGSK_CFGR 0x300 /* MIIGSK config register */ +#define FEC_MIIGSK_ENR 0x308 /* MIIGSK enable register */ #else @@ -69,6 +71,8 @@ #define FEC_X_DES_START 0x3d4 /* Transmit descriptor ring */ #define FEC_R_BUFF_SIZE 0x3d8 /* Maximum receive buff size */ #define FEC_FIFO_RAM 0x400 /* FIFO RAM buffer */ +#define FEC_MIIGSK_CFGR 0x000 /* MIIGSK config register */ +#define FEC_MIIGSK_ENR 0x000 /* MIIGSK enable register */ #endif /* CONFIG_M5272 */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/smsc9420.c +++ linux-fsl-imx51-2.6.31/drivers/net/smsc9420.c @@ -252,6 +252,9 @@ { struct smsc9420_pdata *pd = netdev_priv(dev); + if (!pd->phy_dev) + return -ENODEV; + cmd->maxtxpkt = 1; cmd->maxrxpkt = 1; return phy_ethtool_gset(pd->phy_dev, cmd); @@ -262,6 +265,9 @@ { struct smsc9420_pdata *pd = netdev_priv(dev); + if (!pd->phy_dev) + return -ENODEV; + return phy_ethtool_sset(pd->phy_dev, cmd); } @@ -290,6 +296,10 @@ static int smsc9420_ethtool_nway_reset(struct net_device *netdev) { struct smsc9420_pdata *pd = netdev_priv(netdev); + + if (!pd->phy_dev) + return -ENODEV; + return phy_start_aneg(pd->phy_dev); } @@ -312,6 +322,10 @@ for (i = 0; i < 0x100; i += (sizeof(u32))) data[j++] = smsc9420_reg_read(pd, i); + // cannot read phy registers if the net device is down + if (!phy_dev) + return; + for (i = 0; i <= 31; i++) data[j++] = smsc9420_mii_read(phy_dev->bus, phy_dev->addr, i); } --- linux-fsl-imx51-2.6.31.orig/drivers/net/au1000_eth.c +++ linux-fsl-imx51-2.6.31/drivers/net/au1000_eth.c @@ -1089,7 +1089,14 @@ return NULL; } - if ((err = register_netdev(dev)) != 0) { + dev->base_addr = base; + dev->irq = irq; + dev->netdev_ops = &au1000_netdev_ops; + SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops); + dev->watchdog_timeo = ETH_TX_TIMEOUT; + + err = register_netdev(dev); + if (err != 0) { printk(KERN_ERR "%s: Cannot register net device, error %d\n", DRV_NAME, err); free_netdev(dev); @@ -1207,12 +1214,6 @@ aup->tx_db_inuse[i] = pDB; } - dev->base_addr = base; - dev->irq = irq; - dev->netdev_ops = &au1000_netdev_ops; - SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops); - dev->watchdog_timeo = ETH_TX_TIMEOUT; - /* * The boot code uses the ethernet controller, so reset it to start * fresh. au1000_init() expects that the device is in reset state. --- linux-fsl-imx51-2.6.31.orig/drivers/net/tg3.h +++ linux-fsl-imx51-2.6.31/drivers/net/tg3.h @@ -43,7 +43,7 @@ #define TG3PCI_DEVICE_TIGON3_57780 0x1692 #define TG3PCI_DEVICE_TIGON3_57760 0x1690 #define TG3PCI_DEVICE_TIGON3_57790 0x1694 -#define TG3PCI_DEVICE_TIGON3_57720 0x168c +#define TG3PCI_DEVICE_TIGON3_57788 0x1691 /* 0x04 --> 0x64 unused */ #define TG3PCI_MSI_DATA 0x00000064 /* 0x66 --> 0x68 unused */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/net/Kconfig @@ -1439,7 +1439,7 @@ config CS89x0 tristate "CS89x0 support" depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \ - || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_MX31ADS) + || ARCH_IXDP2X01 || ARCH_PNX010X || ARCH_MXC) ---help--- Support for CS89x0 chipset based Ethernet cards. If you have a network (Ethernet) card of this type, say Y and read the @@ -1453,7 +1453,7 @@ config CS89x0_NONISA_IRQ def_bool y depends on CS89x0 != n - depends on MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_MX31ADS + depends on MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || ARCH_MXC config TC35815 tristate "TOSHIBA TC35815 Ethernet support" @@ -1875,7 +1875,8 @@ config FEC bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)" - depends on M523x || M527x || M5272 || M528x || M520x || M532x || MACH_MX27 || ARCH_MX35 + depends on M523x || M527x || M5272 || M528x || M520x || M532x || ARCH_MX25 || MACH_MX27 || ARCH_MX35 || ARCH_MX51 + select PHYLIB help Say Y here if you want to use the built-in 10/100 Fast ethernet controller on some Motorola ColdFire and Freescale i.MX processors. --- linux-fsl-imx51-2.6.31.orig/drivers/net/eql.c +++ linux-fsl-imx51-2.6.31/drivers/net/eql.c @@ -553,6 +553,8 @@ equalizer_t *eql; master_config_t mc; + memset(&mc, 0, sizeof(master_config_t)); + if (eql_is_master(dev)) { eql = netdev_priv(dev); mc.max_slaves = eql->max_slaves; --- linux-fsl-imx51-2.6.31.orig/drivers/net/sky2.c +++ linux-fsl-imx51-2.6.31/drivers/net/sky2.c @@ -1455,7 +1455,6 @@ if (ramsize > 0) { u32 rxspace; - hw->flags |= SKY2_HW_RAM_BUFFER; pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize); if (ramsize < 16) rxspace = ramsize / 2; @@ -2942,6 +2941,9 @@ ++hw->ports; } + if (sky2_read8(hw, B2_E_0)) + hw->flags |= SKY2_HW_RAM_BUFFER; + return 0; } @@ -4526,6 +4528,8 @@ goto err_out_free_netdev; } + netif_carrier_off(dev); + netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); err = request_irq(pdev->irq, sky2_intr, --- linux-fsl-imx51-2.6.31.orig/drivers/net/tun.c +++ linux-fsl-imx51-2.6.31/drivers/net/tun.c @@ -943,8 +943,6 @@ char *name; unsigned long flags = 0; - err = -EINVAL; - if (!capable(CAP_NET_ADMIN)) return -EPERM; @@ -958,7 +956,7 @@ flags |= TUN_TAP_DEV; name = "tap%d"; } else - goto failed; + return -EINVAL; if (*ifr->ifr_name) name = ifr->ifr_name; --- linux-fsl-imx51-2.6.31.orig/drivers/net/smc91x.c +++ linux-fsl-imx51-2.6.31/drivers/net/smc91x.c @@ -2283,7 +2283,7 @@ ndev->irq = ires->start; - if (ires->flags & IRQF_TRIGGER_MASK) + if (irq_flags == -1 || ires->flags & IRQF_TRIGGER_MASK) irq_flags = ires->flags & IRQF_TRIGGER_MASK; ret = smc_request_attrib(pdev, ndev); --- linux-fsl-imx51-2.6.31.orig/drivers/net/enc28j60.c +++ linux-fsl-imx51-2.6.31/drivers/net/enc28j60.c @@ -30,12 +30,15 @@ #include #include +#include + #include "enc28j60_hw.h" #define DRV_NAME "enc28j60" #define DRV_VERSION "1.01" #define SPI_OPLEN 1 +#define MAX_ENC_CARDS 1 #define ENC28J60_MSG_DEFAULT \ (NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN | NETIF_MSG_LINK) @@ -49,6 +52,10 @@ /* Max TX retries in case of collision as suggested by errata datasheet */ #define MAX_TX_RETRYCOUNT 16 +#ifdef CONFIG_ARCH_STMP3XXX +#include +#include +#endif enum { RXFILTER_NORMAL, RXFILTER_MULTI, @@ -81,6 +88,69 @@ u32 msg_enable; } debug = { -1 }; +static int random_mac; /* = 0 */ +static char *mac[MAX_ENC_CARDS]; + +static int enc28j60_get_mac(unsigned char *dev_addr, int idx) +{ + int i, r; + char *p, *item; + unsigned long v; + unsigned char sv[10]; + + if (idx < 0) + idx = 0; + if (idx > MAX_ENC_CARDS) + return false; + + if (!mac[idx]) { +#ifdef CONFIG_ARCH_STMP3XXX + if (get_evk_board_version() >= 1) { + int mac1 , mac2 , retry = 0; + + stmp3xxx_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, REGS_OCOTP_BASE + HW_OCOTP_CTRL); + while (__raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CTRL) & BM_OCOTP_CTRL_BUSY) { + msleep(10); + retry++; + if (retry > 10) + return false; + } + + mac1 = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTn(0)); + mac2 = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTn(1)); + if (MAX_ADDR_LEN < 6) + return false; + + dev_addr[0] = (mac1 >> 24) & 0xFF; + dev_addr[1] = (mac1 >> 16) & 0xFF; + dev_addr[2] = (mac1 >> 8) & 0xFF; + dev_addr[3] = (mac1 >> 0) & 0xFF; + dev_addr[4] = (mac2 >> 8) & 0xFF; + dev_addr[5] = (mac2 >> 0) & 0xFF; + return true; + } +#endif + return false; + } + + item = mac[idx]; + for (i = 0; i < MAX_ADDR_LEN; i++) { + p = strchr(item, ':'); + if (!p) + sprintf(sv, "0x%s", item); + else + sprintf(sv, "0x%*.*s", p - item, p-item, item); + r = strict_strtoul(sv, 0, &v); + dev_addr[i] = v; + if (p) + item = p + 1; + else + break; + if (r < 0) + return false; + } + return true; +} /* * SPI read buffer * wait for the SPI transfer and copy received data to destination @@ -90,10 +160,13 @@ { u8 *rx_buf = priv->spi_transfer_buf + 4; u8 *tx_buf = priv->spi_transfer_buf; - struct spi_transfer t = { - .tx_buf = tx_buf, - .rx_buf = rx_buf, - .len = SPI_OPLEN + len, + struct spi_transfer tt = { + .tx_buf = tx_buf, + .len = SPI_OPLEN, + }; + struct spi_transfer tr = { + .rx_buf = rx_buf, + .len = len, }; struct spi_message msg; int ret; @@ -102,10 +175,11 @@ tx_buf[1] = tx_buf[2] = tx_buf[3] = 0; /* don't care */ spi_message_init(&msg); - spi_message_add_tail(&t, &msg); + spi_message_add_tail(&tt, &msg); + spi_message_add_tail(&tr, &msg); ret = spi_sync(priv->spi, &msg); if (ret == 0) { - memcpy(data, &rx_buf[SPI_OPLEN], len); + memcpy(data, rx_buf, len); ret = msg.status; } if (ret && netif_msg_drv(priv)) @@ -1108,8 +1182,24 @@ priv->max_pk_counter); } ret = pk_counter; - while (pk_counter-- > 0) + while (pk_counter-- > 0) { + if (!priv->full_duplex) { + /* + * This works only in HALF DUPLEX mode: + * when more than 2 packets are available, start + * transmission of 11111.. frame by setting + * FCON0 (0x01) in EFLOCON + * + * This bit can be cleared either explicitly, or by + * trasmitting the packet in enc28j60_hw_tx. + */ + if (pk_counter > 2) + locked_reg_bfset(priv, EFLOCON, 0x01); + if (pk_counter == 1) + locked_reg_bfclr(priv, EFLOCON, 0x01); + } enc28j60_hw_rx(ndev); + } return ret; } @@ -1235,6 +1325,11 @@ */ static void enc28j60_hw_tx(struct enc28j60_net *priv) { + if (!priv->tx_skb) { + enc28j60_tx_clear(priv->netdev, false); + return; + } + if (netif_msg_tx_queued(priv)) printk(KERN_DEBUG DRV_NAME ": Tx Packet Len:%d\n", priv->tx_skb->len); @@ -1547,6 +1642,7 @@ struct net_device *dev; struct enc28j60_net *priv; int ret = 0; + int set; if (netif_msg_drv(&debug)) dev_info(&spi->dev, DRV_NAME " Ethernet driver %s loaded\n", @@ -1580,7 +1676,11 @@ ret = -EIO; goto error_irq; } - random_ether_addr(dev->dev_addr); + + /* need a counter here, to count instances of enc28j60 devices */ + set = enc28j60_get_mac(dev->dev_addr, -1); + if (!set || random_mac) + random_ether_addr(dev->dev_addr); enc28j60_set_hw_macaddr(dev); /* Board setup must set the relevant edge trigger type; @@ -1635,6 +1735,40 @@ return 0; } +#ifdef CONFIG_PM +static int +enc28j60_suspend(struct spi_device *spi, pm_message_t state) +{ + struct enc28j60_net *priv = dev_get_drvdata(&spi->dev); + struct net_device *net_dev = priv ? priv->netdev : NULL; + + if (net_dev && netif_running(net_dev)) { + netif_stop_queue(net_dev); + netif_device_detach(net_dev); + disable_irq(spi->irq); + } + return 0; +} + +static int +enc28j60_resume(struct spi_device *spi) +{ + struct enc28j60_net *priv = dev_get_drvdata(&spi->dev); + struct net_device *net_dev = priv ? priv->netdev : NULL; + + if (net_dev && netif_running(net_dev)) { + enable_irq(spi->irq); + netif_device_attach(net_dev); + netif_start_queue(net_dev); + schedule_work(&priv->restart_work); + } + return 0; +} +#else +#define enc28j60_resume NULL +#define enc28j60_suspend NULL +#endif + static struct spi_driver enc28j60_driver = { .driver = { .name = DRV_NAME, @@ -1642,6 +1776,8 @@ }, .probe = enc28j60_probe, .remove = __devexit_p(enc28j60_remove), + .suspend = enc28j60_suspend, + .resume = enc28j60_resume, }; static int __init enc28j60_init(void) @@ -1664,4 +1800,6 @@ MODULE_AUTHOR("Claudio Lanconelli "); MODULE_LICENSE("GPL"); module_param_named(debug, debug.msg_enable, int, 0); +module_param(random_mac, int, 0444); +module_param_array(mac, charp, NULL, 0); MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., ffff=all)"); --- linux-fsl-imx51-2.6.31.orig/drivers/net/r8169.c +++ linux-fsl-imx51-2.6.31/drivers/net/r8169.c @@ -182,7 +182,12 @@ MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl); -static int rx_copybreak = 200; +/* + * we set our copybreak very high so that we don't have + * to allocate 16k frames all the time (see note in + * rtl8169_open() + */ +static int rx_copybreak = 16383; static int use_dac; static struct { u32 msg_enable; @@ -2163,6 +2168,13 @@ dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; #endif + /* Ubuntu temporary workaround for bug #76489, disable + * NETIF_F_TSO by default for RTL8111/8168B chipsets. + * People can re-enable if required */ + if (tp->mac_version == RTL_GIGA_MAC_VER_11 + || tp->mac_version == RTL_GIGA_MAC_VER_12) + dev->features &= ~NETIF_F_TSO; + tp->intr_mask = 0xffff; tp->align = cfg->align; tp->hw_start = cfg->hw_start; @@ -2227,11 +2239,15 @@ } static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, - struct net_device *dev) + unsigned int mtu) { - unsigned int mtu = dev->mtu; + unsigned int max_frame = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; - tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; + if (max_frame != 16383) + printk(KERN_WARNING "WARNING! Changing of MTU on this NIC" + "May lead to frame reception errors!\n"); + + tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE; } static int rtl8169_open(struct net_device *dev) @@ -2241,7 +2257,17 @@ int retval = -ENOMEM; - rtl8169_set_rxbufsize(tp, dev); + /* + * Note that we use a magic value here, its wierd I know + * its done because, some subset of rtl8169 hardware suffers from + * a problem in which frames received that are longer than + * the size set in RxMaxSize register return garbage sizes + * when received. To avoid this we need to turn off filtering, + * which is done by setting a value of 16383 in the RxMaxSize register + * and allocating 16k frames to handle the largest possible rx value + * thats what the magic math below does. + */ + rtl8169_set_rxbufsize(tp, 16383 - VLAN_ETH_HLEN - ETH_FCS_LEN); /* * Rx and Tx desscriptors needs 256 bytes alignment. @@ -2892,7 +2918,7 @@ rtl8169_down(dev); - rtl8169_set_rxbufsize(tp, dev); + rtl8169_set_rxbufsize(tp, dev->mtu); ret = rtl8169_init_ring(dev); if (ret < 0) --- linux-fsl-imx51-2.6.31.orig/drivers/net/smsc911x.c +++ linux-fsl-imx51-2.6.31/drivers/net/smsc911x.c @@ -128,6 +128,16 @@ if (pdata->config.flags & SMSC911X_USE_32BIT) return readl(pdata->ioaddr + reg); +#ifdef CONFIG_ARCH_MXC + if (pdata->config.flags & 0x8000) { + u32 data; + unsigned long flags; + spin_lock_irqsave(&pdata->dev_lock, flags); + data = spi_cpld_read(reg); + spin_unlock_irqrestore(&pdata->dev_lock, flags); + return data; + } else +#endif if (pdata->config.flags & SMSC911X_USE_16BIT) { u32 data; unsigned long flags; @@ -155,6 +165,15 @@ return; } +#ifdef CONFIG_ARCH_MXC + if (pdata->config.flags & 0x8000) { + unsigned long flags; + spin_lock_irqsave(&pdata->dev_lock, flags); + spi_cpld_write(reg, val); + spin_unlock_irqrestore(&pdata->dev_lock, flags); + return; + } else +#endif if (pdata->config.flags & SMSC911X_USE_16BIT) { unsigned long flags; @@ -2118,6 +2137,9 @@ { struct net_device *dev = platform_get_drvdata(pdev); struct smsc911x_data *pdata = netdev_priv(dev); + struct phy_device *phy_dev = pdata->phy_dev; + + smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_PDOWN); /* enable wake on LAN, energy detection and the external PME * signal. */ @@ -2132,6 +2154,7 @@ { struct net_device *dev = platform_get_drvdata(pdev); struct smsc911x_data *pdata = netdev_priv(dev); + struct phy_device *phy_dev = pdata->phy_dev; unsigned int to = 100; /* Note 3.11 from the datasheet: @@ -2146,6 +2169,8 @@ while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) udelay(1000); + smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); + return (to == 0) ? -EIO : 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/e100.c +++ linux-fsl-imx51-2.6.31/drivers/net/e100.c @@ -156,6 +156,7 @@ #include #include #include +#include #include #include #include @@ -601,6 +602,7 @@ struct mem *mem; dma_addr_t dma_addr; + struct pci_pool *cbs_pool; dma_addr_t cbs_dma_addr; u8 adaptive_ifs; u8 tx_threshold; @@ -1779,9 +1781,7 @@ nic->cb_to_clean = nic->cb_to_clean->next; nic->cbs_avail++; } - pci_free_consistent(nic->pdev, - sizeof(struct cb) * nic->params.cbs.count, - nic->cbs, nic->cbs_dma_addr); + pci_pool_free(nic->cbs_pool, nic->cbs, nic->cbs_dma_addr); nic->cbs = NULL; nic->cbs_avail = 0; } @@ -1799,10 +1799,11 @@ nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL; nic->cbs_avail = 0; - nic->cbs = pci_alloc_consistent(nic->pdev, - sizeof(struct cb) * count, &nic->cbs_dma_addr); + nic->cbs = pci_pool_alloc(nic->cbs_pool, GFP_KERNEL, + &nic->cbs_dma_addr); if (!nic->cbs) return -ENOMEM; + memset(nic->cbs, 0, count * sizeof(struct cb)); for (cb = nic->cbs, i = 0; i < count; cb++, i++) { cb->next = (i + 1 < count) ? cb + 1 : nic->cbs; @@ -1811,7 +1812,6 @@ cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb); cb->link = cpu_to_le32(nic->cbs_dma_addr + ((i+1) % count) * sizeof(struct cb)); - cb->skb = NULL; } nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs; @@ -2827,7 +2827,11 @@ DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n"); goto err_out_free; } - + nic->cbs_pool = pci_pool_create(netdev->name, + nic->pdev, + nic->params.cbs.count * sizeof(struct cb), + sizeof(u32), + 0); DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, MAC addr %pM\n", (unsigned long long)pci_resource_start(pdev, use_io ? 1 : 0), pdev->irq, netdev->dev_addr); @@ -2857,6 +2861,7 @@ unregister_netdev(netdev); e100_free(nic); pci_iounmap(pdev, nic->csr); + pci_pool_destroy(nic->cbs_pool); free_netdev(netdev); pci_release_regions(pdev); pci_disable_device(pdev); --- linux-fsl-imx51-2.6.31.orig/drivers/net/cs89x0.c +++ linux-fsl-imx51-2.6.31/drivers/net/cs89x0.c @@ -189,12 +189,17 @@ #define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */ static unsigned int netcard_portlist[] __used __initdata = {CIRRUS_DEFAULT_BASE, 0}; static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0}; -#elif defined(CONFIG_MACH_MX31ADS) -#include -static unsigned int netcard_portlist[] __used __initdata = { - PBC_BASE_ADDRESS + PBC_CS8900A_IOBASE + 0x300, 0 -}; -static unsigned cs8900_irq_map[] = {EXPIO_INT_ENET_INT, 0, 0, 0}; +#elif defined(CONFIG_ARCH_MXC) +/*! Null terminated portlist used to probe for the CS8900A device on ISA Bus + * Add 3 to reset the page window before probing (fixes eth probe when deployed + * using nand_boot) + */ +extern unsigned int netcard_portlist[2]; +/*! + * The CS8900A has 4 IRQ pins, which is software selectable, CS8900A interrupt + * pin 0 is used for interrupt generation. + */ +extern unsigned int cs8900_irq_map[4]; #else static unsigned int netcard_portlist[] __used __initdata = { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; @@ -1034,7 +1039,7 @@ static void __init reset_chip(struct net_device *dev) { -#if !defined(CONFIG_MACH_MX31ADS) +#if !defined(CONFIG_ARCH_MXC) #if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) struct net_local *lp = netdev_priv(dev); int ioaddr = dev->base_addr; @@ -1063,7 +1068,7 @@ reset_start_time = jiffies; while( (readreg(dev, PP_SelfST) & INIT_DONE) == 0 && jiffies - reset_start_time < 2) ; -#endif /* !CONFIG_MACH_MX31ADS */ +#endif /* !CONFIG_ARCH_MXC */ } --- linux-fsl-imx51-2.6.31.orig/drivers/net/b44.c +++ linux-fsl-imx51-2.6.31/drivers/net/b44.c @@ -913,9 +913,6 @@ bp->istat = istat; __b44_disable_ints(bp); __napi_schedule(&bp->napi); - } else { - printk(KERN_ERR PFX "%s: Error, poll already scheduled\n", - dev->name); } irq_ack: @@ -1505,8 +1502,7 @@ for (k = 0; k< ethaddr_bytes; k++) { ppattern[offset + magicsync + (j * ETH_ALEN) + k] = macaddr[k]; - len++; - set_bit(len, (unsigned long *) pmask); + set_bit(len++, (unsigned long *) pmask); } } return len - 1; --- linux-fsl-imx51-2.6.31.orig/drivers/net/fec.c +++ linux-fsl-imx51-2.6.31/drivers/net/fec.c @@ -40,6 +40,7 @@ #include #include #include +#include #include @@ -61,7 +62,6 @@ * Define the fixed address of the FEC hardware. */ #if defined(CONFIG_M5272) -#define HAVE_mii_link_interrupt static unsigned char fec_mac_default[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -86,23 +86,6 @@ #endif #endif /* CONFIG_M5272 */ -/* Forward declarations of some structures to support different PHYs */ - -typedef struct { - uint mii_data; - void (*funct)(uint mii_reg, struct net_device *dev); -} phy_cmd_t; - -typedef struct { - uint id; - char *name; - - const phy_cmd_t *config; - const phy_cmd_t *startup; - const phy_cmd_t *ack_int; - const phy_cmd_t *shutdown; -} phy_info_t; - /* The number of Tx and Rx buffers. These are allocated from the page * pool. The code may assume these are power of two, so it it best * to keep them that size. @@ -134,6 +117,19 @@ #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ +/* + * RMII mode to be configured via a gasket + */ +#define FEC_MIIGSK_CFGR_FRCONT (1 << 6) +#define FEC_MIIGSK_CFGR_LBMODE (1 << 4) +#define FEC_MIIGSK_CFGR_EMODE (1 << 3) +#define FEC_MIIGSK_CFGR_IF_MODE_MASK (3 << 0) +#define FEC_MIIGSK_CFGR_IF_MODE_MII (0 << 0) +#define FEC_MIIGSK_CFGR_IF_MODE_RMII (1 << 0) + +#define FEC_MIIGSK_ENR_READY (1 << 2) +#define FEC_MIIGSK_ENR_EN (1 << 1) + /* The FEC stores dest/src/type, data, and checksum for receive packets. */ #define PKT_MAXBUF_SIZE 1518 @@ -189,29 +185,22 @@ uint tx_full; /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */ spinlock_t hw_lock; - /* hold while accessing the mii_list_t() elements */ - spinlock_t mii_lock; - uint phy_id; - uint phy_id_done; - uint phy_status; - uint phy_speed; - phy_info_t const *phy; - struct work_struct phy_task; + struct platform_device *pdev; - uint sequence_done; - uint mii_phy_task_queued; - - uint phy_addr; + int opened; + /* Phylib and MDIO interface */ + struct mii_bus *mii_bus; + struct phy_device *phy_dev; + int mii_timeout; + uint phy_speed; int index; - int opened; int link; - int old_link; int full_duplex; + struct completion mdio_done; }; -static void fec_enet_mii(struct net_device *dev); static irqreturn_t fec_enet_interrupt(int irq, void * dev_id); static void fec_enet_tx(struct net_device *dev); static void fec_enet_rx(struct net_device *dev); @@ -219,67 +208,20 @@ static void fec_restart(struct net_device *dev, int duplex); static void fec_stop(struct net_device *dev); +/* FEC MII MMFR bits definition */ +#define FEC_MMFR_ST (1 << 30) +#define FEC_MMFR_OP_READ (2 << 28) +#define FEC_MMFR_OP_WRITE (1 << 28) +#define FEC_MMFR_PA(v) ((v & 0x1f) << 23) +#define FEC_MMFR_RA(v) ((v & 0x1f) << 18) +#define FEC_MMFR_TA (2 << 16) +#define FEC_MMFR_DATA(v) (v & 0xffff) -/* MII processing. We keep this as simple as possible. Requests are - * placed on the list (if there is room). When the request is finished - * by the MII, an optional function may be called. - */ -typedef struct mii_list { - uint mii_regval; - void (*mii_func)(uint val, struct net_device *dev); - struct mii_list *mii_next; -} mii_list_t; - -#define NMII 20 -static mii_list_t mii_cmds[NMII]; -static mii_list_t *mii_free; -static mii_list_t *mii_head; -static mii_list_t *mii_tail; - -static int mii_queue(struct net_device *dev, int request, - void (*func)(uint, struct net_device *)); - -/* Make MII read/write commands for the FEC */ -#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) -#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ - (VAL & 0xffff)) -#define mk_mii_end 0 +#define FEC_MII_TIMEOUT 1000 /* us */ /* Transmitter timeout */ #define TX_TIMEOUT (2 * HZ) -/* Register definitions for the PHY */ - -#define MII_REG_CR 0 /* Control Register */ -#define MII_REG_SR 1 /* Status Register */ -#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ -#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ -#define MII_REG_ANAR 4 /* A-N Advertisement Register */ -#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ -#define MII_REG_ANER 6 /* A-N Expansion Register */ -#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ -#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */ - -/* values for phy_status */ - -#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ -#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ -#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ -#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ -#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ -#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ -#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ - -#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ -#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ -#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ -#define PHY_STAT_SPMASK 0xf000 /* mask for speed */ -#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ -#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ -#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ -#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ - - static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -409,9 +351,8 @@ if (int_events & FEC_ENET_MII) { ret = IRQ_HANDLED; - fec_enet_mii(dev); + complete(&fep->mdio_done); } - } while (int_events); return ret; @@ -427,7 +368,7 @@ struct sk_buff *skb; fep = netdev_priv(dev); - spin_lock_irq(&fep->hw_lock); + spin_lock(&fep->hw_lock); bdp = fep->dirty_tx; while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) { @@ -486,7 +427,7 @@ } } fep->dirty_tx = bdp; - spin_unlock_irq(&fep->hw_lock); + spin_unlock(&fep->hw_lock); } @@ -509,7 +450,7 @@ flush_cache_all(); #endif - spin_lock_irq(&fep->hw_lock); + spin_lock(&fep->hw_lock); /* First, grab all of the stats for the incoming packet. * These get messed up if we get called due to a busy condition. @@ -604,560 +545,10 @@ } fep->cur_rx = bdp; - spin_unlock_irq(&fep->hw_lock); -} - -/* called from interrupt context */ -static void -fec_enet_mii(struct net_device *dev) -{ - struct fec_enet_private *fep; - mii_list_t *mip; - - fep = netdev_priv(dev); - spin_lock_irq(&fep->mii_lock); - - if ((mip = mii_head) == NULL) { - printk("MII and no head!\n"); - goto unlock; - } - - if (mip->mii_func != NULL) - (*(mip->mii_func))(readl(fep->hwp + FEC_MII_DATA), dev); - - mii_head = mip->mii_next; - mip->mii_next = mii_free; - mii_free = mip; - - if ((mip = mii_head) != NULL) - writel(mip->mii_regval, fep->hwp + FEC_MII_DATA); - -unlock: - spin_unlock_irq(&fep->mii_lock); -} - -static int -mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *)) -{ - struct fec_enet_private *fep; - unsigned long flags; - mii_list_t *mip; - int retval; - - /* Add PHY address to register command */ - fep = netdev_priv(dev); - spin_lock_irqsave(&fep->mii_lock, flags); - - regval |= fep->phy_addr << 23; - retval = 0; - - if ((mip = mii_free) != NULL) { - mii_free = mip->mii_next; - mip->mii_regval = regval; - mip->mii_func = func; - mip->mii_next = NULL; - if (mii_head) { - mii_tail->mii_next = mip; - mii_tail = mip; - } else { - mii_head = mii_tail = mip; - writel(regval, fep->hwp + FEC_MII_DATA); - } - } else { - retval = 1; - } - - spin_unlock_irqrestore(&fep->mii_lock, flags); - return retval; -} - -static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c) -{ - if(!c) - return; - - for (; c->mii_data != mk_mii_end; c++) - mii_queue(dev, c->mii_data, c->funct); -} - -static void mii_parse_sr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC); - - if (mii_reg & 0x0004) - status |= PHY_STAT_LINK; - if (mii_reg & 0x0010) - status |= PHY_STAT_FAULT; - if (mii_reg & 0x0020) - status |= PHY_STAT_ANC; - *s = status; -} - -static void mii_parse_cr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_CONF_ANE | PHY_CONF_LOOP); - - if (mii_reg & 0x1000) - status |= PHY_CONF_ANE; - if (mii_reg & 0x4000) - status |= PHY_CONF_LOOP; - *s = status; -} - -static void mii_parse_anar(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_CONF_SPMASK); - - if (mii_reg & 0x0020) - status |= PHY_CONF_10HDX; - if (mii_reg & 0x0040) - status |= PHY_CONF_10FDX; - if (mii_reg & 0x0080) - status |= PHY_CONF_100HDX; - if (mii_reg & 0x00100) - status |= PHY_CONF_100FDX; - *s = status; -} - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT970 is used by many boards */ - -#define MII_LXT970_MIRROR 16 /* Mirror register */ -#define MII_LXT970_IER 17 /* Interrupt Enable Register */ -#define MII_LXT970_ISR 18 /* Interrupt Status Register */ -#define MII_LXT970_CONFIG 19 /* Configuration Register */ -#define MII_LXT970_CSR 20 /* Chip Status Register */ - -static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_STAT_SPMASK); - if (mii_reg & 0x0800) { - if (mii_reg & 0x1000) - status |= PHY_STAT_100FDX; - else - status |= PHY_STAT_100HDX; - } else { - if (mii_reg & 0x1000) - status |= PHY_STAT_10FDX; - else - status |= PHY_STAT_10HDX; - } - *s = status; -} - -static phy_cmd_t const phy_cmd_lxt970_config[] = { - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt970_startup[] = { /* enable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0002), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt970_ack_int[] = { - /* read SR and ISR to acknowledge */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_LXT970_ISR), NULL }, - - /* find out the current status */ - { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0000), NULL }, - { mk_mii_end, } - }; -static phy_info_t const phy_info_lxt970 = { - .id = 0x07810000, - .name = "LXT970", - .config = phy_cmd_lxt970_config, - .startup = phy_cmd_lxt970_startup, - .ack_int = phy_cmd_lxt970_ack_int, - .shutdown = phy_cmd_lxt970_shutdown -}; - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT971 is used on some of my custom boards */ - -/* register definitions for the 971 */ - -#define MII_LXT971_PCR 16 /* Port Control Register */ -#define MII_LXT971_SR2 17 /* Status Register 2 */ -#define MII_LXT971_IER 18 /* Interrupt Enable Register */ -#define MII_LXT971_ISR 19 /* Interrupt Status Register */ -#define MII_LXT971_LCR 20 /* LED Control Register */ -#define MII_LXT971_TCR 30 /* Transmit Control Register */ - -/* - * I had some nice ideas of running the MDIO faster... - * The 971 should support 8MHz and I tried it, but things acted really - * weird, so 2.5 MHz ought to be enough for anyone... - */ - -static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC); - - if (mii_reg & 0x0400) { - fep->link = 1; - status |= PHY_STAT_LINK; - } else { - fep->link = 0; - } - if (mii_reg & 0x0080) - status |= PHY_STAT_ANC; - if (mii_reg & 0x4000) { - if (mii_reg & 0x0200) - status |= PHY_STAT_100FDX; - else - status |= PHY_STAT_100HDX; - } else { - if (mii_reg & 0x0200) - status |= PHY_STAT_10FDX; - else - status |= PHY_STAT_10HDX; - } - if (mii_reg & 0x0008) - status |= PHY_STAT_FAULT; - - *s = status; + spin_unlock(&fep->hw_lock); } -static phy_cmd_t const phy_cmd_lxt971_config[] = { - /* limit to 10MBit because my prototype board - * doesn't work with 100. */ - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */ - /* Somehow does the 971 tell me that the link is down - * the first read after power-up. - * read here to get a valid value in ack_int */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt971_ack_int[] = { - /* acknowledge the int before reading status ! */ - { mk_mii_read(MII_LXT971_ISR), NULL }, - /* find out the current status */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x0000), NULL }, - { mk_mii_end, } - }; -static phy_info_t const phy_info_lxt971 = { - .id = 0x0001378e, - .name = "LXT971", - .config = phy_cmd_lxt971_config, - .startup = phy_cmd_lxt971_startup, - .ack_int = phy_cmd_lxt971_ack_int, - .shutdown = phy_cmd_lxt971_shutdown -}; - /* ------------------------------------------------------------------------- */ -/* The Quality Semiconductor QS6612 is used on the RPX CLLF */ - -/* register definitions */ - -#define MII_QS6612_MCR 17 /* Mode Control Register */ -#define MII_QS6612_FTR 27 /* Factory Test Register */ -#define MII_QS6612_MCO 28 /* Misc. Control Register */ -#define MII_QS6612_ISR 29 /* Interrupt Source Register */ -#define MII_QS6612_IMR 30 /* Interrupt Mask Register */ -#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ - -static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_STAT_SPMASK); - - switch((mii_reg >> 2) & 7) { - case 1: status |= PHY_STAT_10HDX; break; - case 2: status |= PHY_STAT_100HDX; break; - case 5: status |= PHY_STAT_10FDX; break; - case 6: status |= PHY_STAT_100FDX; break; -} - - *s = status; -} - -static phy_cmd_t const phy_cmd_qs6612_config[] = { - /* The PHY powers up isolated on the RPX, - * so send a command to allow operation. - */ - { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, - - /* parse cr and anar to get some info */ - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_qs6612_startup[] = { /* enable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_qs6612_ack_int[] = { - /* we need to read ISR, SR and ANER to acknowledge */ - { mk_mii_read(MII_QS6612_ISR), NULL }, - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_REG_ANER), NULL }, - - /* read pcr to get info */ - { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL }, - { mk_mii_end, } - }; -static phy_info_t const phy_info_qs6612 = { - .id = 0x00181440, - .name = "QS6612", - .config = phy_cmd_qs6612_config, - .startup = phy_cmd_qs6612_startup, - .ack_int = phy_cmd_qs6612_ack_int, - .shutdown = phy_cmd_qs6612_shutdown -}; - -/* ------------------------------------------------------------------------- */ -/* AMD AM79C874 phy */ - -/* register definitions for the 874 */ - -#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */ -#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */ -#define MII_AM79C874_DR 18 /* Diagnostic Register */ -#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */ -#define MII_AM79C874_MCR 21 /* ModeControl Register */ -#define MII_AM79C874_DC 23 /* Disconnect Counter */ -#define MII_AM79C874_REC 24 /* Recieve Error Counter */ - -static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - uint status; - - status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_ANC); - - if (mii_reg & 0x0080) - status |= PHY_STAT_ANC; - if (mii_reg & 0x0400) - status |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX); - else - status |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX); - - *s = status; -} - -static phy_cmd_t const phy_cmd_am79c874_config[] = { - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */ - { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_am79c874_ack_int[] = { - /* find out the current status */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr }, - /* we only need to read ISR to acknowledge */ - { mk_mii_read(MII_AM79C874_ICSR), NULL }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_am79c874_shutdown[] = { /* disable interrupts */ - { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL }, - { mk_mii_end, } - }; -static phy_info_t const phy_info_am79c874 = { - .id = 0x00022561, - .name = "AM79C874", - .config = phy_cmd_am79c874_config, - .startup = phy_cmd_am79c874_startup, - .ack_int = phy_cmd_am79c874_ack_int, - .shutdown = phy_cmd_am79c874_shutdown -}; - - -/* ------------------------------------------------------------------------- */ -/* Kendin KS8721BL phy */ - -/* register definitions for the 8721 */ - -#define MII_KS8721BL_RXERCR 21 -#define MII_KS8721BL_ICSR 27 -#define MII_KS8721BL_PHYCR 31 - -static phy_cmd_t const phy_cmd_ks8721bl_config[] = { - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */ - { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = { - /* find out the current status */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - /* we only need to read ISR to acknowledge */ - { mk_mii_read(MII_KS8721BL_ICSR), NULL }, - { mk_mii_end, } - }; -static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */ - { mk_mii_write(MII_KS8721BL_ICSR, 0x0000), NULL }, - { mk_mii_end, } - }; -static phy_info_t const phy_info_ks8721bl = { - .id = 0x00022161, - .name = "KS8721BL", - .config = phy_cmd_ks8721bl_config, - .startup = phy_cmd_ks8721bl_startup, - .ack_int = phy_cmd_ks8721bl_ack_int, - .shutdown = phy_cmd_ks8721bl_shutdown -}; - -/* ------------------------------------------------------------------------- */ -/* register definitions for the DP83848 */ - -#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */ - -static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC); - - /* Link up */ - if (mii_reg & 0x0001) { - fep->link = 1; - *s |= PHY_STAT_LINK; - } else - fep->link = 0; - /* Status of link */ - if (mii_reg & 0x0010) /* Autonegotioation complete */ - *s |= PHY_STAT_ANC; - if (mii_reg & 0x0002) { /* 10MBps? */ - if (mii_reg & 0x0004) /* Full Duplex? */ - *s |= PHY_STAT_10FDX; - else - *s |= PHY_STAT_10HDX; - } else { /* 100 Mbps? */ - if (mii_reg & 0x0004) /* Full Duplex? */ - *s |= PHY_STAT_100FDX; - else - *s |= PHY_STAT_100HDX; - } - if (mii_reg & 0x0008) - *s |= PHY_STAT_FAULT; -} - -static phy_info_t phy_info_dp83848= { - 0x020005c9, - "DP83848", - - (const phy_cmd_t []) { /* config */ - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown */ - { mk_mii_end, } - }, -}; - -/* ------------------------------------------------------------------------- */ - -static phy_info_t const * const phy_info[] = { - &phy_info_lxt970, - &phy_info_lxt971, - &phy_info_qs6612, - &phy_info_am79c874, - &phy_info_ks8721bl, - &phy_info_dp83848, - NULL -}; - -/* ------------------------------------------------------------------------- */ -#ifdef HAVE_mii_link_interrupt -static irqreturn_t -mii_link_interrupt(int irq, void * dev_id); - -/* - * This is specific to the MII interrupt setup of the M5272EVB. - */ -static void __inline__ fec_request_mii_intr(struct net_device *dev) -{ - if (request_irq(66, mii_link_interrupt, IRQF_DISABLED, "fec(MII)", dev) != 0) - printk("FEC: Could not allocate fec(MII) IRQ(66)!\n"); -} - -static void __inline__ fec_disable_phy_intr(void) -{ - volatile unsigned long *icrp; - icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); - *icrp = 0x08000000; -} - -static void __inline__ fec_phy_ack_intr(void) -{ - volatile unsigned long *icrp; - /* Acknowledge the interrupt */ - icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); - *icrp = 0x0d000000; -} -#endif - #ifdef CONFIG_M5272 static void __inline__ fec_get_mac(struct net_device *dev) { @@ -1192,221 +583,271 @@ /* ------------------------------------------------------------------------- */ -static void mii_display_status(struct net_device *dev) +/* + * Phy section + */ +static void fec_enet_adjust_link(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); - volatile uint *s = &(fep->phy_status); + struct phy_device *phy_dev = fep->phy_dev; + unsigned long flags; - if (!fep->link && !fep->old_link) { - /* Link is still down - don't print anything */ - return; - } + int status_change = 0; - printk("%s: status: ", dev->name); + spin_lock_irqsave(&fep->hw_lock, flags); - if (!fep->link) { - printk("link down"); - } else { - printk("link up"); + /* Prevent a state halted on mii error */ + if (fep->mii_timeout && phy_dev->state == PHY_HALTED) { + phy_dev->state = PHY_RESUMING; + goto spin_unlock; + } - switch(*s & PHY_STAT_SPMASK) { - case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break; - case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break; - case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break; - case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break; - default: - printk(", Unknown speed/duplex"); + /* Duplex link change */ + if (phy_dev->link) { + if (fep->full_duplex != phy_dev->duplex) { + fec_restart(dev, phy_dev->duplex); + status_change = 1; } + } - if (*s & PHY_STAT_ANC) - printk(", auto-negotiation complete"); + /* Link on or off change */ + if (phy_dev->link != fep->link) { + fep->link = phy_dev->link; + if (phy_dev->link) + fec_restart(dev, phy_dev->duplex); + else + fec_stop(dev); + status_change = 1; } - if (*s & PHY_STAT_FAULT) - printk(", remote fault"); +spin_unlock: + spin_unlock_irqrestore(&fep->hw_lock, flags); - printk(".\n"); + if (status_change) + phy_print_status(phy_dev); } -static void mii_display_config(struct work_struct *work) +static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum) { - struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task); - struct net_device *dev = fep->netdev; - uint status = fep->phy_status; + struct fec_enet_private *fep = bus->priv; + unsigned long time_left; - /* - ** When we get here, phy_task is already removed from - ** the workqueue. It is thus safe to allow to reuse it. - */ - fep->mii_phy_task_queued = 0; - printk("%s: config: auto-negotiation ", dev->name); + fep->mii_timeout = 0; + init_completion(&fep->mdio_done); - if (status & PHY_CONF_ANE) - printk("on"); - else - printk("off"); + /* start a read op */ + writel(FEC_MMFR_ST | FEC_MMFR_OP_READ | + FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) | + FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); + + /* wait for end of transfer */ + time_left = wait_for_completion_timeout(&fep->mdio_done, + usecs_to_jiffies(FEC_MII_TIMEOUT)); + if (time_left == 0) { + fep->mii_timeout = 1; + printk(KERN_ERR "FEC: MDIO read timeout\n"); + return -ETIMEDOUT; + } - if (status & PHY_CONF_100FDX) - printk(", 100FDX"); - if (status & PHY_CONF_100HDX) - printk(", 100HDX"); - if (status & PHY_CONF_10FDX) - printk(", 10FDX"); - if (status & PHY_CONF_10HDX) - printk(", 10HDX"); - if (!(status & PHY_CONF_SPMASK)) - printk(", No speed/duplex selected?"); + /* return value */ + return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); +} + +static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum, + u16 value) +{ + struct fec_enet_private *fep = bus->priv; + unsigned long time_left; - if (status & PHY_CONF_LOOP) - printk(", loopback enabled"); + fep->mii_timeout = 0; + init_completion(&fep->mdio_done); - printk(".\n"); + /* start a read op */ + writel(FEC_MMFR_ST | FEC_MMFR_OP_READ | + FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) | + FEC_MMFR_TA | FEC_MMFR_DATA(value), + fep->hwp + FEC_MII_DATA); - fep->sequence_done = 1; + /* wait for end of transfer */ + time_left = wait_for_completion_timeout(&fep->mdio_done, + usecs_to_jiffies(FEC_MII_TIMEOUT)); + if (time_left == 0) { + fep->mii_timeout = 1; + printk(KERN_ERR "FEC: MDIO write timeout\n"); + return -ETIMEDOUT; + } + + return 0; } -static void mii_relink(struct work_struct *work) +static int fec_enet_mdio_reset(struct mii_bus *bus) { - struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task); - struct net_device *dev = fep->netdev; - int duplex; + return 0; +} - /* - ** When we get here, phy_task is already removed from - ** the workqueue. It is thus safe to allow to reuse it. - */ - fep->mii_phy_task_queued = 0; - fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; - mii_display_status(dev); - fep->old_link = fep->link; +static int fec_enet_mii_probe(struct net_device *dev) +{ + struct fec_enet_private *fep = netdev_priv(dev); + struct phy_device *phy_dev = NULL; + int phy_addr; - if (fep->link) { - duplex = 0; - if (fep->phy_status - & (PHY_STAT_100FDX | PHY_STAT_10FDX)) - duplex = 1; - fec_restart(dev, duplex); - } else - fec_stop(dev); + fep->phy_dev = NULL; + + /* find the first phy */ + for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { + if (fep->mii_bus->phy_map[phy_addr]) { + phy_dev = fep->mii_bus->phy_map[phy_addr]; + break; + } + } + + if (!phy_dev) { + printk(KERN_ERR "%s: no PHY found\n", dev->name); + return -ENODEV; + } + + /* attach the mac to the phy */ + phy_dev = phy_connect(dev, dev_name(&phy_dev->dev), + &fec_enet_adjust_link, 0, + PHY_INTERFACE_MODE_MII); + if (IS_ERR(phy_dev)) { + printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); + return PTR_ERR(phy_dev); + } + + /* mask with MAC supported features */ + phy_dev->supported &= PHY_BASIC_FEATURES; + phy_dev->advertising = phy_dev->supported; + + fep->phy_dev = phy_dev; + fep->link = 0; + fep->full_duplex = 0; + + printk(KERN_INFO "%s: Freescale FEC PHY driver [%s] " + "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name, + fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev), + fep->phy_dev->irq); + + return 0; } -/* mii_queue_relink is called in interrupt context from mii_link_interrupt */ -static void mii_queue_relink(uint mii_reg, struct net_device *dev) +static int fec_enet_mii_init(struct platform_device *pdev) { + struct net_device *dev = platform_get_drvdata(pdev); struct fec_enet_private *fep = netdev_priv(dev); + struct fec_enet_platform_data *pdata; + int err = -ENXIO, i; + + fep->mii_timeout = 0; /* - * We cannot queue phy_task twice in the workqueue. It - * would cause an endless loop in the workqueue. - * Fortunately, if the last mii_relink entry has not yet been - * executed now, it will do the job for the current interrupt, - * which is just what we want. + * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed) */ - if (fep->mii_phy_task_queued) - return; + fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000) << 1; + writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); - fep->mii_phy_task_queued = 1; - INIT_WORK(&fep->phy_task, mii_relink); - schedule_work(&fep->phy_task); -} + fep->mii_bus = mdiobus_alloc(); + if (fep->mii_bus == NULL) { + err = -ENOMEM; + goto err_out; + } + + fep->mii_bus->name = "fec_enet_mii_bus"; + fep->mii_bus->read = fec_enet_mdio_read; + fep->mii_bus->write = fec_enet_mdio_write; + fep->mii_bus->reset = fec_enet_mdio_reset; + snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id); + fep->mii_bus->priv = fep; + fep->mii_bus->parent = &pdev->dev; + pdata = pdev->dev.platform_data; + + fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); + if (!fep->mii_bus->irq) { + err = -ENOMEM; + goto err_out_free_mdiobus; + } -/* mii_queue_config is called in interrupt context from fec_enet_mii */ -static void mii_queue_config(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = netdev_priv(dev); + for (i = 0; i < PHY_MAX_ADDR; i++) + fep->mii_bus->irq[i] = PHY_POLL; - if (fep->mii_phy_task_queued) - return; + platform_set_drvdata(dev, fep->mii_bus); - fep->mii_phy_task_queued = 1; - INIT_WORK(&fep->phy_task, mii_display_config); - schedule_work(&fep->phy_task); -} + if (mdiobus_register(fep->mii_bus)) + goto err_out_free_mdio_irq; -phy_cmd_t const phy_cmd_relink[] = { - { mk_mii_read(MII_REG_CR), mii_queue_relink }, - { mk_mii_end, } - }; -phy_cmd_t const phy_cmd_config[] = { - { mk_mii_read(MII_REG_CR), mii_queue_config }, - { mk_mii_end, } - }; + return 0; -/* Read remainder of PHY ID. */ -static void -mii_discover_phy3(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep; - int i; +err_out_free_mdio_irq: + kfree(fep->mii_bus->irq); +err_out_free_mdiobus: + mdiobus_free(fep->mii_bus); +err_out: + return err; +} - fep = netdev_priv(dev); - fep->phy_id |= (mii_reg & 0xffff); - printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id); +static void fec_enet_mii_remove(struct fec_enet_private *fep) +{ + if (fep->phy_dev) + phy_disconnect(fep->phy_dev); + mdiobus_unregister(fep->mii_bus); + kfree(fep->mii_bus->irq); + mdiobus_free(fep->mii_bus); +} - for(i = 0; phy_info[i]; i++) { - if(phy_info[i]->id == (fep->phy_id >> 4)) - break; - } +static int fec_enet_get_settings(struct net_device *dev, + struct ethtool_cmd *cmd) +{ + struct fec_enet_private *fep = netdev_priv(dev); + struct phy_device *phydev = fep->phy_dev; - if (phy_info[i]) - printk(" -- %s\n", phy_info[i]->name); - else - printk(" -- unknown PHY!\n"); + if (!phydev) + return -ENODEV; - fep->phy = phy_info[i]; - fep->phy_id_done = 1; + return phy_ethtool_gset(phydev, cmd); } -/* Scan all of the MII PHY addresses looking for someone to respond - * with a valid ID. This usually happens quickly. - */ -static void -mii_discover_phy(uint mii_reg, struct net_device *dev) +static int fec_enet_set_settings(struct net_device *dev, + struct ethtool_cmd *cmd) { - struct fec_enet_private *fep; - uint phytype; + struct fec_enet_private *fep = netdev_priv(dev); + struct phy_device *phydev = fep->phy_dev; - fep = netdev_priv(dev); + if (!phydev) + return -ENODEV; - if (fep->phy_addr < 32) { - if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { + return phy_ethtool_sset(phydev, cmd); +} - /* Got first part of ID, now get remainder */ - fep->phy_id = phytype << 16; - mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), - mii_discover_phy3); - } else { - fep->phy_addr++; - mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), - mii_discover_phy); - } - } else { - printk("FEC: No PHY device found.\n"); - /* Disable external MII interface */ - writel(0, fep->hwp + FEC_MII_SPEED); - fep->phy_speed = 0; -#ifdef HAVE_mii_link_interrupt - fec_disable_phy_intr(); -#endif - } +static void fec_enet_get_drvinfo(struct net_device *dev, + struct ethtool_drvinfo *info) +{ + struct fec_enet_private *fep = netdev_priv(dev); + + strcpy(info->driver, fep->pdev->dev.driver->name); + strcpy(info->version, "Revision: 1.0"); + strcpy(info->bus_info, dev_name(&dev->dev)); } -/* This interrupt occurs when the PHY detects a link change */ -#ifdef HAVE_mii_link_interrupt -static irqreturn_t -mii_link_interrupt(int irq, void * dev_id) +static struct ethtool_ops fec_enet_ethtool_ops = { + .get_settings = fec_enet_get_settings, + .set_settings = fec_enet_set_settings, + .get_drvinfo = fec_enet_get_drvinfo, + .get_link = ethtool_op_get_link, +}; + +static int fec_enet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { - struct net_device *dev = dev_id; struct fec_enet_private *fep = netdev_priv(dev); + struct phy_device *phydev = fep->phy_dev; - fec_phy_ack_intr(); + if (!netif_running(dev)) + return -EINVAL; - mii_do_cmd(dev, fep->phy->ack_int); - mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ + if (!phydev) + return -ENODEV; - return IRQ_HANDLED; + return phy_mii_ioctl(phydev, if_mii(rq), cmd); } -#endif static void fec_enet_free_buffers(struct net_device *dev) { @@ -1484,39 +925,18 @@ * a simple way to do that. */ + clk_enable(fep->clk); ret = fec_enet_alloc_buffers(dev); if (ret) return ret; - fep->sequence_done = 0; - fep->link = 0; - - fec_restart(dev, 1); - - if (fep->phy) { - mii_do_cmd(dev, fep->phy->ack_int); - mii_do_cmd(dev, fep->phy->config); - mii_do_cmd(dev, phy_cmd_config); /* display configuration */ - - /* Poll until the PHY tells us its configuration - * (not link state). - * Request is initiated by mii_do_cmd above, but answer - * comes by interrupt. - * This should take about 25 usec per register at 2.5 MHz, - * and we read approximately 5 registers. - */ - while(!fep->sequence_done) - schedule(); - - mii_do_cmd(dev, fep->phy->startup); + /* Probe and connect to PHY when open the interface */ + ret = fec_enet_mii_probe(dev); + if (ret) { + fec_enet_free_buffers(dev); + return ret; } - - /* Set the initial link state to true. A lot of hardware - * based on this device does not implement a PHY interrupt, - * so we are never notified of link change. - */ - fep->link = 1; - + phy_start(fep->phy_dev); netif_start_queue(dev); fep->opened = 1; return 0; @@ -1532,7 +952,11 @@ netif_stop_queue(dev); fec_stop(dev); + if (fep->phy_dev) + phy_disconnect(fep->phy_dev); + fec_enet_free_buffers(dev); + clk_disable(fep->clk); return 0; } @@ -1634,7 +1058,7 @@ (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24), fep->hwp + FEC_ADDR_LOW); writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24), - fep + FEC_ADDR_HIGH); + fep->hwp + FEC_ADDR_HIGH); return 0; } @@ -1647,6 +1071,7 @@ .ndo_validate_addr = eth_validate_addr, .ndo_tx_timeout = fec_timeout, .ndo_set_mac_address = fec_set_mac_address, + .ndo_do_ioctl = fec_enet_ioctl, }; /* @@ -1658,6 +1083,7 @@ { struct fec_enet_private *fep = netdev_priv(dev); struct bufdesc *cbd_base; + struct bufdesc *bdp; int i; /* Allocate memory for buffer descriptors. */ @@ -1669,7 +1095,6 @@ } spin_lock_init(&fep->hw_lock); - spin_lock_init(&fep->mii_lock); fep->index = index; fep->hwp = (void __iomem *)dev->base_addr; @@ -1696,28 +1121,39 @@ fep->rx_bd_base = cbd_base; fep->tx_bd_base = cbd_base + RX_RING_SIZE; -#ifdef HAVE_mii_link_interrupt - fec_request_mii_intr(dev); -#endif /* The FEC Ethernet specific entries in the device structure */ dev->watchdog_timeo = TX_TIMEOUT; dev->netdev_ops = &fec_netdev_ops; + dev->ethtool_ops = &fec_enet_ethtool_ops; - for (i=0; iphy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999) - / 2500000) / 2) & 0x3F) << 1; - fec_restart(dev, 0); + /* Initialize the receive buffer descriptors. */ + bdp = fep->rx_bd_base; + for (i = 0; i < RX_RING_SIZE; i++) { - /* Queue up command to detect the PHY and initialize the - * remainder of the interface. - */ - fep->phy_id_done = 0; - fep->phy_addr = 0; - mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); + /* Initialize the BD for every fragment in the page. */ + bdp->cbd_sc = 0; + bdp++; + } + + /* Set the last buffer to wrap */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + /* ...and the same for transmit */ + bdp = fep->tx_bd_base; + for (i = 0; i < TX_RING_SIZE; i++) { + + /* Initialize the BD for every fragment in the page. */ + bdp->cbd_sc = 0; + bdp->cbd_bufaddr = 0; + bdp++; + } + + /* Set the last buffer to wrap */ + bdp--; + bdp->cbd_sc |= BD_SC_WRAP; + + fec_restart(dev, 0); return 0; } @@ -1730,7 +1166,6 @@ fec_restart(struct net_device *dev, int duplex) { struct fec_enet_private *fep = netdev_priv(dev); - struct bufdesc *bdp; int i; /* Whack a reset. We should wait for this. */ @@ -1748,6 +1183,24 @@ writel(0, fep->hwp + FEC_HASH_TABLE_LOW); #endif + if (cpu_is_mx25()) { + /* + * Set up the MII gasket for RMII mode + */ + printk("%s: enable RMII gasket\n", dev->name); + + /* disable the gasket and wait */ + __raw_writel(0, fep->hwp + FEC_MIIGSK_ENR); + while (__raw_readl(fep->hwp + FEC_MIIGSK_ENR) & FEC_MIIGSK_ENR_READY) + udelay(1); + + /* configure the gasket for RMII, 50 MHz, no loopback, no echo */ + __raw_writel(FEC_MIIGSK_CFGR_IF_MODE_RMII, fep->hwp + FEC_MIIGSK_CFGR); + + /* re-enable the gasket */ + __raw_writel(FEC_MIIGSK_ENR_EN, fep->hwp + FEC_MIIGSK_ENR); + } + /* Set maximum receive buffer size. */ writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE); @@ -1768,33 +1221,6 @@ } } - /* Initialize the receive buffer descriptors. */ - bdp = fep->rx_bd_base; - for (i = 0; i < RX_RING_SIZE; i++) { - - /* Initialize the BD for every fragment in the page. */ - bdp->cbd_sc = BD_ENET_RX_EMPTY; - bdp++; - } - - /* Set the last buffer to wrap */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* ...and the same for transmit */ - bdp = fep->tx_bd_base; - for (i = 0; i < TX_RING_SIZE; i++) { - - /* Initialize the BD for every fragment in the page. */ - bdp->cbd_sc = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - - /* Set the last buffer to wrap */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - /* Enable MII mode */ if (duplex) { /* MII enable / FD enable */ @@ -1836,10 +1262,6 @@ writel(1, fep->hwp + FEC_ECNTRL); udelay(10); - /* Clear outstanding MII command interrupts. */ - writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); - - writel(FEC_ENET_MII, fep->hwp + FEC_IMASK); writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); } @@ -1850,6 +1272,7 @@ struct net_device *ndev; int i, irq, ret = 0; struct resource *r; + struct fec_platform_data *pdata = pdev->dev.platform_data; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) @@ -1871,6 +1294,7 @@ memset(fep, 0, sizeof(*fep)); ndev->base_addr = (unsigned long)ioremap(r->start, resource_size(r)); + fep->pdev = pdev; if (!ndev->base_addr) { ret = -ENOMEM; @@ -1895,6 +1319,10 @@ } } + if (pdata && pdata->init) + if (pdata->init()) + goto failed_platform_init; + fep->clk = clk_get(&pdev->dev, "fec_clk"); if (IS_ERR(fep->clk)) { ret = PTR_ERR(fep->clk); @@ -1906,17 +1334,26 @@ if (ret) goto failed_init; + ret = fec_enet_mii_init(pdev); + if (ret) + goto failed_mii_init; + ret = register_netdev(ndev); if (ret) goto failed_register; + clk_disable(fep->clk); + return 0; failed_register: + fec_enet_mii_remove(fep); +failed_mii_init: failed_init: clk_disable(fep->clk); clk_put(fep->clk); failed_clk: +failed_platform_init: for (i = 0; i < 3; i++) { irq = platform_get_irq(pdev, i); if (irq > 0) @@ -1935,10 +1372,14 @@ { struct net_device *ndev = platform_get_drvdata(pdev); struct fec_enet_private *fep = netdev_priv(ndev); + struct fec_platform_data *pdata = pdev->dev.platform_data; platform_set_drvdata(pdev, NULL); fec_stop(ndev); + fec_enet_mii_remove(fep); + if (pdata && pdata->uninit) + pdata->uninit(); clk_disable(fep->clk); clk_put(fep->clk); iounmap((void __iomem *)ndev->base_addr); @@ -1958,8 +1399,10 @@ if (netif_running(ndev)) { netif_device_detach(ndev); fec_stop(ndev); + clk_disable(fep->clk); } } + return 0; } @@ -1967,10 +1410,13 @@ fec_resume(struct platform_device *dev) { struct net_device *ndev = platform_get_drvdata(dev); + struct fec_enet_private *fep; if (ndev) { + fep = netdev_priv(ndev); if (netif_running(ndev)) { - fec_enet_init(ndev, 0); + clk_enable(fep->clk); + fec_restart(ndev, 1); netif_device_attach(ndev); } } --- linux-fsl-imx51-2.6.31.orig/drivers/net/acenic.c +++ linux-fsl-imx51-2.6.31/drivers/net/acenic.c @@ -1209,7 +1209,8 @@ memset(ap->info, 0, sizeof(struct ace_info)); memset(ap->skb, 0, sizeof(struct ace_skb)); - if (ace_load_firmware(dev)) + ecode = ace_load_firmware(dev); + if (ecode) goto init_error; ap->fw_running = 0; --- linux-fsl-imx51-2.6.31.orig/drivers/net/bonding/bond_main.c +++ linux-fsl-imx51-2.6.31/drivers/net/bonding/bond_main.c @@ -691,7 +691,7 @@ struct net_device *slave_dev, int reporting) { const struct net_device_ops *slave_ops = slave_dev->netdev_ops; - static int (*ioctl)(struct net_device *, struct ifreq *, int); + int (*ioctl)(struct net_device *, struct ifreq *, int); struct ifreq ifr; struct mii_ioctl_data *mii; @@ -3707,10 +3707,10 @@ if (skb->protocol == htons(ETH_P_IP)) { return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ - (data->h_dest[5] ^ bond_dev->dev_addr[5])) % count; + (data->h_dest[5] ^ data->h_source[5])) % count; } - return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; + return (data->h_dest[5] ^ data->h_source[5]) % count; } /* @@ -3737,7 +3737,7 @@ } - return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; + return (data->h_dest[5] ^ data->h_source[5]) % count; } /* @@ -3748,7 +3748,7 @@ { struct ethhdr *data = (struct ethhdr *)skb->data; - return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; + return (data->h_dest[5] ^ data->h_source[5]) % count; } /*-------------------------- Device entry points ----------------------------*/ --- linux-fsl-imx51-2.6.31.orig/drivers/net/sfc/rx.c +++ linux-fsl-imx51-2.6.31/drivers/net/sfc/rx.c @@ -444,7 +444,8 @@ * the appropriate LRO method */ static void efx_rx_packet_lro(struct efx_channel *channel, - struct efx_rx_buffer *rx_buf) + struct efx_rx_buffer *rx_buf, + bool checksummed) { struct napi_struct *napi = &channel->napi_str; @@ -466,7 +467,8 @@ skb->len = rx_buf->len; skb->data_len = rx_buf->len; skb->truesize += rx_buf->len; - skb->ip_summed = CHECKSUM_UNNECESSARY; + skb->ip_summed = + checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE; napi_gro_frags(napi); @@ -475,6 +477,7 @@ rx_buf->page = NULL; } else { EFX_BUG_ON_PARANOID(!rx_buf->skb); + EFX_BUG_ON_PARANOID(!checksummed); napi_gro_receive(napi, rx_buf->skb); rx_buf->skb = NULL; @@ -570,7 +573,7 @@ } if (likely(checksummed || rx_buf->page)) { - efx_rx_packet_lro(channel, rx_buf); + efx_rx_packet_lro(channel, rx_buf, checksummed); goto done; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/cxgb3/cxgb3_main.c +++ linux-fsl-imx51-2.6.31/drivers/net/cxgb3/cxgb3_main.c @@ -2175,6 +2175,8 @@ case CHELSIO_GET_QSET_NUM:{ struct ch_reg edata; + memset(&edata, 0, sizeof(struct ch_reg)); + edata.cmd = CHELSIO_GET_QSET_NUM; edata.val = pi->nqsets; if (copy_to_user(useraddr, &edata, sizeof(edata))) --- linux-fsl-imx51-2.6.31.orig/drivers/net/appletalk/ipddp.c +++ linux-fsl-imx51-2.6.31/drivers/net/appletalk/ipddp.c @@ -176,8 +176,7 @@ dev->stats.tx_packets++; dev->stats.tx_bytes += skb->len; - if(aarp_send_ddp(rt->dev, skb, &rt->at, NULL) < 0) - dev_kfree_skb(skb); + aarp_send_ddp(rt->dev, skb, &rt->at, NULL); spin_unlock(&ipddp_route_lock); --- linux-fsl-imx51-2.6.31.orig/drivers/net/irda/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/net/irda/Kconfig @@ -387,5 +387,9 @@ To compile it as a module, choose M here: the module will be called mcs7780. +config MXC_FIR + tristate "Freescale MXC FIR driver" + depends on ARCH_MXC && IRDA + endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/net/irda/Makefile +++ linux-fsl-imx51-2.6.31/drivers/net/irda/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_VIA_FIR) += via-ircc.o obj-$(CONFIG_PXA_FICP) += pxaficp_ir.o obj-$(CONFIG_MCS_FIR) += mcs7780.o +obj-$(CONFIG_MXC_FIR) += mxc_ir.o obj-$(CONFIG_AU1000_FIR) += au1k_ir.o # SIR drivers obj-$(CONFIG_IRTTY_SIR) += irtty-sir.o sir-dev.o --- linux-fsl-imx51-2.6.31.orig/drivers/net/irda/mxc_ir.c +++ linux-fsl-imx51-2.6.31/drivers/net/irda/mxc_ir.c @@ -0,0 +1,1781 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * Based on sa1100_ir.c - Copyright 2000-2001 Russell King + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mxc_ir.c + * + * @brief Driver for the Freescale Semiconductor MXC FIRI. + * + * This driver is based on drivers/net/irda/sa1100_ir.c, by Russell King. + * + * @ingroup FIRI + */ + +/* + * Include Files + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include "mxc_ir.h" + +#define IS_SIR(mi) ( (mi)->speed <= 115200 ) +#define IS_MIR(mi) ( (mi)->speed < 4000000 && (mi)->speed >= 576000 ) +#define IS_FIR(mi) ( (mi)->speed >= 4000000 ) + +#define SDMA_START_DELAY() { \ + volatile int j,k;\ + int i;\ + for(i=0;i<10000;i++)\ + k=j;\ + } + +#define IRDA_FRAME_SIZE_LIMIT 2047 +#define UART_BUFF_SIZE 14384 + +#define UART4_UFCR_TXTL 16 +#define UART4_UFCR_RXTL 1 + +#define FIRI_SDMA_TX +#define FIRI_SDMA_RX + +/*! + * This structure is a way for the low level driver to define their own + * \b mxc_irda structure. This structure includes SK buffers, DMA buffers. + * and has other elements that are specifically required by this driver. + */ +struct mxc_irda { + /*! + * This keeps track of device is running or not + */ + unsigned char open; + + /*! + * This holds current FIRI communication speed + */ + int speed; + + /*! + * This holds FIRI communication speed for next packet + */ + int newspeed; + + /*! + * SK buffer for transmitter + */ + struct sk_buff *txskb; + + /*! + * SK buffer for receiver + */ + struct sk_buff *rxskb; + +#ifdef FIRI_SDMA_RX + /*! + * SK buffer for tasklet + */ + struct sk_buff *tskb; +#endif + + /*! + * DMA address for transmitter + */ + dma_addr_t dma_rx_buff_phy; + + /*! + * DMA address for receiver + */ + dma_addr_t dma_tx_buff_phy; + + /*! + * DMA Transmit buffer length + */ + unsigned int dma_tx_buff_len; + + /*! + * DMA channel for transmitter + */ + int txdma_ch; + + /*! + * DMA channel for receiver + */ + int rxdma_ch; + + /*! + * IrDA network device statistics + */ + struct net_device_stats stats; + + /*! + * The device structure used to get FIRI information + */ + struct device *dev; + + /*! + * Resource structure for UART, which will maintain base addresses and IRQs. + */ + struct resource *uart_res; + + /*! + * Base address of UART, used in readl and writel. + */ + void *uart_base; + + /*! + * Resource structure for FIRI, which will maintain base addresses and IRQs. + */ + struct resource *firi_res; + + /*! + * Base address of FIRI, used in readl and writel. + */ + void *firi_base; + + /*! + * UART IRQ number. + */ + int uart_irq; + + /*! + * Second UART IRQ number in case the interrupt lines are not muxed. + */ + int uart_irq1; + + /*! + * UART clock needed for baud rate calculations + */ + struct clk *uart_clk; + + /*! + * UART clock needed for baud rate calculations + */ + unsigned long uart_clk_rate; + + /*! + * FIRI clock needed for baud rate calculations + */ + struct clk *firi_clk; + + /*! + * FIRI IRQ number. + */ + int firi_irq; + + /*! + * IrLAP layer instance + */ + struct irlap_cb *irlap; + + /*! + * Driver supported baudrate capabilities + */ + struct qos_info qos; + + /*! + * Temporary transmit buffer used by the driver + */ + iobuff_t tx_buff; + + /*! + * Temporary receive buffer used by the driver + */ + iobuff_t rx_buff; + + /*! + * Pointer to platform specific data structure. + */ + struct mxc_ir_platform_data *mxc_ir_plat; + + /*! + * This holds the power management status of this module. + */ + int suspend; + +}; + +extern void gpio_firi_active(void *, unsigned int); +extern void gpio_firi_inactive(void); +extern void gpio_firi_init(void); + +void mxc_irda_firi_init(struct mxc_irda *si); +#ifdef FIRI_SDMA_RX +static void mxc_irda_fir_dma_rx_irq(void *id, int error_status, + unsigned int count); +#endif +#ifdef FIRI_SDMA_TX +static void mxc_irda_fir_dma_tx_irq(void *id, int error_status, + unsigned int count); +#endif + +/*! + * This function allocates and maps the receive buffer, + * unless it is already allocated. + * + * @param si FIRI device specific structure. + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_rx_alloc(struct mxc_irda *si) +{ +#ifdef FIRI_SDMA_RX + mxc_dma_requestbuf_t dma_request; +#endif + if (si->rxskb) { + return 0; + } + + si->rxskb = alloc_skb(IRDA_FRAME_SIZE_LIMIT + 1, GFP_ATOMIC); + + if (!si->rxskb) { + dev_err(si->dev, "mxc_ir: out of memory for RX SKB\n"); + return -ENOMEM; + } + + /* + * Align any IP headers that may be contained + * within the frame. + */ + skb_reserve(si->rxskb, 1); + +#ifdef FIRI_SDMA_RX + si->dma_rx_buff_phy = + dma_map_single(si->dev, si->rxskb->data, IRDA_FRAME_SIZE_LIMIT, + DMA_FROM_DEVICE); + + dma_request.num_of_bytes = IRDA_FRAME_SIZE_LIMIT; + dma_request.dst_addr = si->dma_rx_buff_phy; + dma_request.src_addr = si->firi_res->start; + + mxc_dma_config(si->rxdma_ch, &dma_request, 1, MXC_DMA_MODE_READ); +#endif + return 0; +} + +/*! + * This function is called to disable the FIRI dma + * + * @param si FIRI port specific structure. + */ +static void mxc_irda_disabledma(struct mxc_irda *si) +{ + /* Stop all DMA activity. */ +#ifdef FIRI_SDMA_TX + mxc_dma_disable(si->txdma_ch); +#endif +#ifdef FIRI_SDMA_RX + mxc_dma_disable(si->rxdma_ch); +#endif +} + +/*! + * This function is called to set the IrDA communications speed. + * + * @param si FIRI specific structure. + * @param speed new Speed to be configured for. + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_set_speed(struct mxc_irda *si, int speed) +{ + unsigned long flags; + int ret = 0; + unsigned int num, denom, baud; + unsigned int cr; + + dev_dbg(si->dev, "speed:%d\n", speed); + switch (speed) { + case 9600: + case 19200: + case 38400: + case 57600: + case 115200: + dev_dbg(si->dev, "starting SIR\n"); + baud = speed; + if (IS_FIR(si)) { +#ifdef FIRI_SDMA_RX + mxc_dma_disable(si->rxdma_ch); +#endif + cr = readl(si->firi_base + FIRITCR); + cr &= ~FIRITCR_TE; + writel(cr, si->firi_base + FIRITCR); + + cr = readl(si->firi_base + FIRIRCR); + cr &= ~FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + + } + local_irq_save(flags); + + /* Disable Tx and Rx */ + cr = readl(si->uart_base + MXC_UARTUCR2); + cr &= ~(MXC_UARTUCR2_RXEN | MXC_UARTUCR2_TXEN); + writel(cr, si->uart_base + MXC_UARTUCR2); + + gpio_firi_inactive(); + + num = baud / 100 - 1; + denom = si->uart_clk_rate / 1600 - 1; + if ((denom < 65536) && (si->uart_clk_rate > 1600)) { + writel(num, si->uart_base + MXC_UARTUBIR); + writel(denom, si->uart_base + MXC_UARTUBMR); + } + + si->speed = speed; + + writel(0xFFFF, si->uart_base + MXC_UARTUSR1); + writel(0xFFFF, si->uart_base + MXC_UARTUSR2); + + /* Enable Receive Overrun and Data Ready interrupts. */ + cr = readl(si->uart_base + MXC_UARTUCR4); + cr |= (MXC_UARTUCR4_OREN | MXC_UARTUCR4_DREN); + writel(cr, si->uart_base + MXC_UARTUCR4); + + cr = readl(si->uart_base + MXC_UARTUCR2); + cr |= (MXC_UARTUCR2_RXEN | MXC_UARTUCR2_TXEN); + writel(cr, si->uart_base + MXC_UARTUCR2); + + local_irq_restore(flags); + break; + case 4000000: + local_irq_save(flags); + + /* Disable Receive Overrun and Data Ready interrupts. */ + cr = readl(si->uart_base + MXC_UARTUCR4); + cr &= ~(MXC_UARTUCR4_OREN | MXC_UARTUCR4_DREN); + writel(cr, si->uart_base + MXC_UARTUCR4); + + /* Disable Tx and Rx */ + cr = readl(si->uart_base + MXC_UARTUCR2); + cr &= ~(MXC_UARTUCR2_RXEN | MXC_UARTUCR2_TXEN); + writel(cr, si->uart_base + MXC_UARTUCR2); + + /* + * FIR configuration + */ + mxc_irda_disabledma(si); + + cr = readl(si->firi_base + FIRITCR); + cr &= ~FIRITCR_TE; + writel(cr, si->firi_base + FIRITCR); + + gpio_firi_active(si->firi_base + FIRITCR, FIRITCR_TPP); + + si->speed = speed; + + cr = readl(si->firi_base + FIRIRCR); + cr |= FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + + dev_dbg(si->dev, "Going for fast IRDA ...\n"); + ret = mxc_irda_rx_alloc(si); + + /* clear RX status register */ + writel(0xFFFF, si->firi_base + FIRIRSR); +#ifdef FIRI_SDMA_RX + if (si->rxskb) { + mxc_dma_enable(si->rxdma_ch); + } +#endif + local_irq_restore(flags); + + break; + default: + dev_err(si->dev, "speed not supported by FIRI\n"); + break; + } + + return ret; +} + +/*! + * This function is called to set the IrDA communications speed. + * + * @param si FIRI specific structure. + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static inline int mxc_irda_fir_error(struct mxc_irda *si) +{ + struct sk_buff *skb = si->rxskb; + unsigned int dd_error, crc_error, overrun_error; + unsigned int sr; + + if (!skb) { + dev_err(si->dev, "no skb!\n"); + return -1; + } + + sr = readl(si->firi_base + FIRIRSR); + dd_error = sr & FIRIRSR_DDE; + crc_error = sr & FIRIRSR_CRCE; + overrun_error = sr & FIRIRSR_RFO; + + if (!(dd_error | crc_error | overrun_error)) { + return 0; + } + dev_err(si->dev, "dde,crce,rfo=%d,%d,%d.\n", dd_error, crc_error, + overrun_error); + si->stats.rx_errors++; + if (crc_error) { + si->stats.rx_crc_errors++; + } + if (dd_error) { + si->stats.rx_frame_errors++; + } + if (overrun_error) { + si->stats.rx_frame_errors++; + } + writel(sr, si->firi_base + FIRIRSR); + + return -1; +} + +#ifndef FIRI_SDMA_RX +/*! + * FIR interrupt service routine to handle receive. + * + * @param dev pointer to the net_device structure + */ +void mxc_irda_fir_irq_rx(struct net_device *dev) +{ + struct mxc_irda *si = dev->priv; + struct sk_buff *skb = si->rxskb; + unsigned int sr, len; + int i; + unsigned char *p = skb->data; + + /* + * Deal with any receive errors. + */ + if (mxc_irda_fir_error(si) != 0) { + return; + } + + sr = readl(si->firi_base + FIRIRSR); + + if (!(sr & FIRIRSR_RPE)) { + return; + } + + /* + * Coming here indicates that fir rx packet has been successfully recieved. + * And No error happened so far. + */ + writel(sr | FIRIRSR_RPE, si->firi_base + FIRIRSR); + + len = (sr & FIRIRSR_RFP) >> 8; + + /* 4 bytes of CRC */ + len -= 4; + + skb_put(skb, len); + + for (i = 0; i < len; i++) { + *p++ = readb(si->firi_base + FIRIRXFIFO); + } + + /* Discard the four CRC bytes */ + for (i = 0; i < 4; i++) { + readb(si->firi_base + FIRIRXFIFO); + } + + /* + * Deal with the case of packet complete. + */ + skb->dev = dev; + skb->mac.raw = skb->data; + skb->protocol = htons(ETH_P_IRDA); + si->stats.rx_packets++; + si->stats.rx_bytes += len; + netif_rx(skb); + + si->rxskb = NULL; + mxc_irda_rx_alloc(si); + + writel(0xFFFF, si->firi_base + FIRIRSR); + +} +#endif + +/*! + * FIR interrupt service routine to handle transmit. + * + * @param dev pointer to the net_device structure + */ +void mxc_irda_fir_irq_tx(struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + struct sk_buff *skb = si->txskb; + unsigned int cr, sr; + + sr = readl(si->firi_base + FIRITSR); + writel(sr, si->firi_base + FIRITSR); + + if (sr & FIRITSR_TC) { + +#ifdef FIRI_SDMA_TX + mxc_dma_disable(si->txdma_ch); +#endif + cr = readl(si->firi_base + FIRITCR); + cr &= ~(FIRITCR_TCIE | FIRITCR_TE); + writel(cr, si->firi_base + FIRITCR); + + if (si->newspeed) { + mxc_irda_set_speed(si, si->newspeed); + si->newspeed = 0; + } + si->txskb = NULL; + + cr = readl(si->firi_base + FIRIRCR); + cr |= FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + + writel(0xFFFF, si->firi_base + FIRIRSR); + /* + * Account and free the packet. + */ + if (skb) { +#ifdef FIRI_SDMA_TX + dma_unmap_single(si->dev, si->dma_tx_buff_phy, skb->len, + DMA_TO_DEVICE); +#endif + si->stats.tx_packets++; + si->stats.tx_bytes += skb->len; + dev_kfree_skb_irq(skb); + } + /* + * Make sure that the TX queue is available for sending + * (for retries). TX has priority over RX at all times. + */ + netif_wake_queue(dev); + } +} + +/*! + * This is FIRI interrupt handler. + * + * @param dev pointer to the net_device structure + */ +void mxc_irda_fir_irq(struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + unsigned int sr1, sr2; + + sr1 = readl(si->firi_base + FIRIRSR); + sr2 = readl(si->firi_base + FIRITSR); + + if (sr2 & FIRITSR_TC) + mxc_irda_fir_irq_tx(dev); +#ifndef FIRI_SDMA_RX + if (sr1 & (FIRIRSR_RPE | FIRIRSR_RFO)) + mxc_irda_fir_irq_rx(dev); +#endif + +} + +/*! + * This is the SIR transmit routine. + * + * @param si FIRI specific structure. + * + * @param dev pointer to the net_device structure + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_sir_txirq(struct mxc_irda *si, struct net_device *dev) +{ + unsigned int sr1, sr2, cr; + unsigned int status; + + sr1 = readl(si->uart_base + MXC_UARTUSR1); + sr2 = readl(si->uart_base + MXC_UARTUSR2); + cr = readl(si->uart_base + MXC_UARTUCR2); + + /* + * Echo cancellation for IRDA Transmit chars + * Disable the receiver and enable Transmit complete. + */ + cr &= ~MXC_UARTUCR2_RXEN; + writel(cr, si->uart_base + MXC_UARTUCR2); + cr = readl(si->uart_base + MXC_UARTUCR4); + cr |= MXC_UARTUCR4_TCEN; + writel(cr, si->uart_base + MXC_UARTUCR4); + + while ((sr1 & MXC_UARTUSR1_TRDY) && si->tx_buff.len) { + + writel(*si->tx_buff.data++, si->uart_base + MXC_UARTUTXD); + si->tx_buff.len -= 1; + sr1 = readl(si->uart_base + MXC_UARTUSR1); + } + + if (si->tx_buff.len == 0) { + si->stats.tx_packets++; + si->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head; + + /*Yoohoo...we are done...Lets stop Tx */ + cr = readl(si->uart_base + MXC_UARTUCR1); + cr &= ~MXC_UARTUCR1_TRDYEN; + writel(cr, si->uart_base + MXC_UARTUCR1); + + do { + status = readl(si->uart_base + MXC_UARTUSR2); + } while (!(status & MXC_UARTUSR2_TXDC)); + + if (si->newspeed) { + mxc_irda_set_speed(si, si->newspeed); + si->newspeed = 0; + } + /* I'm hungry! */ + netif_wake_queue(dev); + + /* Is the transmit complete to reenable the receiver? */ + if (status & MXC_UARTUSR2_TXDC) { + + cr = readl(si->uart_base + MXC_UARTUCR2); + cr |= MXC_UARTUCR2_RXEN; + writel(cr, si->uart_base + MXC_UARTUCR2); + /* Disable the Transmit complete interrupt bit */ + cr = readl(si->uart_base + MXC_UARTUCR4); + cr &= ~MXC_UARTUCR4_TCEN; + writel(cr, si->uart_base + MXC_UARTUCR4); + } + } + + return 0; +} + +/*! + * This is the SIR receive routine. + * + * @param si FIRI specific structure. + * + * @param dev pointer to the net_device structure + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_sir_rxirq(struct mxc_irda *si, struct net_device *dev) +{ + unsigned int data, status; + volatile unsigned int sr2; + + sr2 = readl(si->uart_base + MXC_UARTUSR2); + while ((sr2 & MXC_UARTUSR2_RDR) == 1) { + data = readl(si->uart_base + MXC_UARTURXD); + status = data & 0xf400; + if (status & MXC_UARTURXD_ERR) { + dev_err(si->dev, "Receive an incorrect data =0x%x.\n", + data); + si->stats.rx_errors++; + if (status & MXC_UARTURXD_OVRRUN) { + si->stats.rx_fifo_errors++; + dev_err(si->dev, "Rx overrun.\n"); + } + if (status & MXC_UARTURXD_FRMERR) { + si->stats.rx_frame_errors++; + dev_err(si->dev, "Rx frame error.\n"); + } + if (status & MXC_UARTURXD_PRERR) { + dev_err(si->dev, "Rx parity error.\n"); + } + /* Other: it is the Break char. + * Do nothing for it. throw out the data. + */ + async_unwrap_char(dev, &si->stats, &si->rx_buff, + (data & 0xFF)); + } else { + /* It is correct data. */ + data &= 0xFF; + async_unwrap_char(dev, &si->stats, &si->rx_buff, data); + + dev->last_rx = jiffies; + } + sr2 = readl(si->uart_base + MXC_UARTUSR2); + + writel(0xFFFF, si->uart_base + MXC_UARTUSR1); + writel(0xFFFF, si->uart_base + MXC_UARTUSR2); + } /*while */ + return 0; + +} + +static irqreturn_t mxc_irda_irq(int irq, void *dev_id) +{ + struct net_device *dev = dev_id; + struct mxc_irda *si = netdev_priv(dev); + + if (IS_FIR(si)) { + mxc_irda_fir_irq(dev); + return IRQ_HANDLED; + } + + if (readl(si->uart_base + MXC_UARTUCR2) & MXC_UARTUCR2_RXEN) { + mxc_irda_sir_rxirq(si, dev); + } + if ((readl(si->uart_base + MXC_UARTUCR1) & MXC_UARTUCR1_TRDYEN) && + (readl(si->uart_base + MXC_UARTUSR1) & MXC_UARTUSR1_TRDY)) { + mxc_irda_sir_txirq(si, dev); + } + + return IRQ_HANDLED; +} + +static irqreturn_t mxc_irda_tx_irq(int irq, void *dev_id) +{ + + struct net_device *dev = dev_id; + struct mxc_irda *si = netdev_priv(dev); + + mxc_irda_sir_txirq(si, dev); + + return IRQ_HANDLED; +} + +static irqreturn_t mxc_irda_rx_irq(int irq, void *dev_id) +{ + + struct net_device *dev = dev_id; + struct mxc_irda *si = netdev_priv(dev); + + /* Clear the aging timer bit */ + writel(MXC_UARTUSR1_AGTIM, si->uart_base + MXC_UARTUSR1); + + mxc_irda_sir_rxirq(si, dev); + + return IRQ_HANDLED; +} + +#ifdef FIRI_SDMA_RX +struct tasklet_struct dma_rx_tasklet; + +static void mxc_irda_rx_task(unsigned long tparam) +{ + struct mxc_irda *si = (struct mxc_irda *)tparam; + struct sk_buff *lskb = si->tskb; + + si->tskb = NULL; + if (lskb) { + lskb->mac_header = lskb->data; + lskb->protocol = htons(ETH_P_IRDA); + netif_rx(lskb); + } +} + +/*! + * Receiver DMA callback routine. + * + * @param id pointer to network device structure + * @param error_status used to pass error status to this callback function + * @param count number of bytes received + */ +static void mxc_irda_fir_dma_rx_irq(void *id, int error_status, + unsigned int count) +{ + struct net_device *dev = id; + struct mxc_irda *si = netdev_priv(dev); + struct sk_buff *skb = si->rxskb; + unsigned int cr; + unsigned int len; + + cr = readl(si->firi_base + FIRIRCR); + cr &= ~FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + cr = readl(si->firi_base + FIRIRCR); + cr |= FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + len = count - 4; /* remove 4 bytes for CRC */ + skb_put(skb, len); + skb->dev = dev; + si->tskb = skb; + tasklet_schedule(&dma_rx_tasklet); + + if (si->dma_rx_buff_phy != 0) + dma_unmap_single(si->dev, si->dma_rx_buff_phy, + IRDA_FRAME_SIZE_LIMIT, DMA_FROM_DEVICE); + + si->rxskb = NULL; + mxc_irda_rx_alloc(si); + + SDMA_START_DELAY(); + writel(0xFFFF, si->firi_base + FIRIRSR); + + if (si->rxskb) { + mxc_dma_enable(si->rxdma_ch); + } +} +#endif + +#ifdef FIRI_SDMA_TX +/*! + * This function is called by SDMA Interrupt Service Routine to indicate + * requested DMA transfer is completed. + * + * @param id pointer to network device structure + * @param error_status used to pass error status to this callback function + * @param count number of bytes sent + */ +static void mxc_irda_fir_dma_tx_irq(void *id, int error_status, + unsigned int count) +{ + struct net_device *dev = id; + struct mxc_irda *si = netdev_priv(dev); + + mxc_dma_disable(si->txdma_ch); +} +#endif + +/*! + * This function is called by Linux IrDA network subsystem to + * transmit the Infrared data packet. The TX DMA channel is configured + * to transfer SK buffer data to FIRI TX FIFO along with DMA transfer + * completion routine. + * + * @param skb The packet that is queued to be sent + * @param dev net_device structure. + * + * @return The function returns 0 on success and a negative value on + * failure. + */ +static int mxc_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + int speed = irda_get_next_speed(skb); + unsigned int cr; + + /* + * Does this packet contain a request to change the interface + * speed? If so, remember it until we complete the transmission + * of this frame. + */ + if (speed != si->speed && speed != -1) { + si->newspeed = speed; + } + + /* If this is an empty frame, we can bypass a lot. */ + if (skb->len == 0) { + if (si->newspeed) { + si->newspeed = 0; + mxc_irda_set_speed(si, speed); + } + dev_kfree_skb(skb); + return 0; + } + + /* We must not be transmitting... */ + netif_stop_queue(dev); + if (IS_SIR(si)) { + + si->tx_buff.data = si->tx_buff.head; + si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, + si->tx_buff.truesize); + cr = readl(si->uart_base + MXC_UARTUCR1); + cr |= MXC_UARTUCR1_TRDYEN; + writel(cr, si->uart_base + MXC_UARTUCR1); + dev_kfree_skb(skb); + } else { + unsigned int mtt = irda_get_mtt(skb); + unsigned char *p = skb->data; + unsigned int skb_len = skb->len; +#ifdef FIRI_SDMA_TX + mxc_dma_requestbuf_t dma_request; +#else + unsigned int i, sr; +#endif + + skb_len = skb_len + ((4 - (skb_len % 4)) % 4); + + if (si->txskb) { + BUG(); + } + si->txskb = skb; + + /* + * If we have a mean turn-around time, impose the specified + * specified delay. We could shorten this by timing from + * the point we received the packet. + */ + if (mtt) { + udelay(mtt); + } + + cr = readl(si->firi_base + FIRIRCR); + cr &= ~FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + + writel(skb->len - 1, si->firi_base + FIRITCTR); + +#ifdef FIRI_SDMA_TX + /* + * Configure DMA Tx Channel for source and destination addresses, + * Number of bytes in SK buffer to transfer and Transfer complete + * callback function. + */ + si->dma_tx_buff_len = skb_len; + si->dma_tx_buff_phy = + dma_map_single(si->dev, p, skb_len, DMA_TO_DEVICE); + + dma_request.num_of_bytes = skb_len; + dma_request.dst_addr = si->firi_res->start + FIRITXFIFO; + dma_request.src_addr = si->dma_tx_buff_phy; + + mxc_dma_config(si->txdma_ch, &dma_request, 1, + MXC_DMA_MODE_WRITE); + + mxc_dma_enable(si->txdma_ch); +#endif + cr = readl(si->firi_base + FIRITCR); + cr |= FIRITCR_TCIE; + writel(cr, si->firi_base + FIRITCR); + + cr |= FIRITCR_TE; + writel(cr, si->firi_base + FIRITCR); + +#ifndef FIRI_SDMA_TX + for (i = 0; i < skb->len;) { + sr = readl(si->firi_base + FIRITSR); + /* TFP = number of bytes in the TX FIFO for the + * Transmitter + * */ + if ((sr >> 8) < 128) { + writeb(*p, si->firi_base + FIRITXFIFO); + p++; + i++; + } + } +#endif + } + + dev->trans_start = jiffies; + return 0; +} + +/*! + * This function handles network interface ioctls passed to this driver.. + * + * @param dev net device structure + * @param ifreq user request data + * @param cmd command issued + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) +{ + struct if_irda_req *rq = (struct if_irda_req *)ifreq; + struct mxc_irda *si = netdev_priv(dev); + int ret = -EOPNOTSUPP; + + switch (cmd) { + /* This function will be used by IrLAP to change the speed */ + case SIOCSBANDWIDTH: + dev_dbg(si->dev, "%s:with cmd SIOCSBANDWIDTH\n", __FUNCTION__); + if (capable(CAP_NET_ADMIN)) { + /* + * We are unable to set the speed if the + * device is not running. + */ + if (si->open) { + ret = mxc_irda_set_speed(si, rq->ifr_baudrate); + } else { + dev_err(si->dev, "mxc_ir_ioctl: SIOCSBANDWIDTH:\ + !netif_running\n"); + ret = 0; + } + } + break; + case SIOCSMEDIABUSY: + dev_dbg(si->dev, "%s:with cmd SIOCSMEDIABUSY\n", __FUNCTION__); + ret = -EPERM; + if (capable(CAP_NET_ADMIN)) { + irda_device_set_media_busy(dev, TRUE); + ret = 0; + } + break; + case SIOCGRECEIVING: + rq->ifr_receiving = + IS_SIR(si) ? si->rx_buff.state != OUTSIDE_FRAME : 0; + ret = 0; + break; + default: + break; + } + return ret; +} + +/*! + * Kernel interface routine to get current statistics of the device + * which includes the number bytes/packets transmitted/received, + * receive errors, CRC errors, framing errors etc. + * + * @param dev the net_device structure + * + * @return This function returns IrDA network statistics + */ +static struct net_device_stats *mxc_irda_stats(struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + return &si->stats; +} + +/*! + * FIRI init function + * + * @param si FIRI device specific structure. + */ +void mxc_irda_firi_init(struct mxc_irda *si) +{ + unsigned int firi_baud, osf = 6; + unsigned int tcr, rcr, cr; + + si->firi_clk = clk_get(si->dev, "firi_clk"); + firi_baud = clk_round_rate(si->firi_clk, 48004500); + if ((firi_baud < 47995500) || + (clk_set_rate(si->firi_clk, firi_baud) < 0)) { + dev_err(si->dev, "Unable to set FIR clock to 48MHz.\n"); + return; + } + clk_enable(si->firi_clk); + + writel(0xFFFF, si->firi_base + FIRITSR); + writel(0xFFFF, si->firi_base + FIRIRSR); + writel(0x00, si->firi_base + FIRITCR); + writel(0x00, si->firi_base + FIRIRCR); + + /* set _BL & _OSF */ + cr = (osf - 1) | (16 << 5); + writel(cr, si->firi_base + FIRICR); + +#ifdef FIRI_SDMA_TX + tcr = + FIRITCR_TDT_FIR | FIRITCR_TM_FIR | FIRITCR_TCIE | + FIRITCR_PCF | FIRITCR_PC; +#else + tcr = FIRITCR_TM_FIR | FIRITCR_TCIE | FIRITCR_PCF | FIRITCR_PC; +#endif + +#ifdef FIRI_SDMA_RX + rcr = + FIRIRCR_RPEDE | FIRIRCR_RM_FIR | FIRIRCR_RDT_FIR | + FIRIRCR_RPA | FIRIRCR_RPP; +#else + rcr = + FIRIRCR_RPEDE | FIRIRCR_RM_FIR | FIRIRCR_RDT_FIR | FIRIRCR_RPEIE | + FIRIRCR_RPA | FIRIRCR_PAIE | FIRIRCR_RFOIE | FIRIRCR_RPP; +#endif + + writel(tcr, si->firi_base + FIRITCR); + writel(rcr, si->firi_base + FIRIRCR); + cr = 0; + writel(cr, si->firi_base + FIRITCTR); +} + +/*! + * This function initialises the UART. + * + * @param si FIRI port specific structure. + * + * @return The function returns 0 on success. + */ +static int mxc_irda_uart_init(struct mxc_irda *si) +{ + unsigned int per_clk; + unsigned int num, denom, baud, ufcr = 0; + unsigned int cr; + int d = 1; + int uart_ir_mux = 0; + + if (si->mxc_ir_plat) + uart_ir_mux = si->mxc_ir_plat->uart_ir_mux; + /* + * Clear Status Registers 1 and 2 + **/ + writel(0xFFFF, si->uart_base + MXC_UARTUSR1); + writel(0xFFFF, si->uart_base + MXC_UARTUSR2); + + /* Configure the IOMUX for the UART */ + gpio_firi_init(); + + per_clk = clk_get_rate(si->uart_clk); + baud = per_clk / 16; + if (baud > 1500000) { + baud = 1500000; + d = per_clk / ((baud * 16) + 1000); + if (d > 6) { + d = 6; + } + } + clk_enable(si->uart_clk); + + si->uart_clk_rate = per_clk / d; + writel(si->uart_clk_rate / 1000, si->uart_base + MXC_UARTONEMS); + + writel(si->mxc_ir_plat->ir_rx_invert | MXC_UARTUCR4_IRSC, + si->uart_base + MXC_UARTUCR4); + + if (uart_ir_mux) { + writel(MXC_UARTUCR3_RXDMUXSEL | si->mxc_ir_plat->ir_tx_invert | + MXC_UARTUCR3_DSR, si->uart_base + MXC_UARTUCR3); + } else { + writel(si->mxc_ir_plat->ir_tx_invert | MXC_UARTUCR3_DSR, + si->uart_base + MXC_UARTUCR3); + } + + writel(MXC_UARTUCR2_IRTS | MXC_UARTUCR2_CTS | MXC_UARTUCR2_WS | + MXC_UARTUCR2_ATEN | MXC_UARTUCR2_TXEN | MXC_UARTUCR2_RXEN, + si->uart_base + MXC_UARTUCR2); + /* Wait till we are out of software reset */ + do { + cr = readl(si->uart_base + MXC_UARTUCR2); + } while (!(cr & MXC_UARTUCR2_SRST)); + + ufcr |= (UART4_UFCR_TXTL << MXC_UARTUFCR_TXTL_OFFSET) | + ((6 - d) << MXC_UARTUFCR_RFDIV_OFFSET) | UART4_UFCR_RXTL; + writel(ufcr, si->uart_base + MXC_UARTUFCR); + + writel(MXC_UARTUCR1_UARTEN | MXC_UARTUCR1_IREN, + si->uart_base + MXC_UARTUCR1); + + baud = 9600; + num = baud / 100 - 1; + denom = si->uart_clk_rate / 1600 - 1; + + if ((denom < 65536) && (si->uart_clk_rate > 1600)) { + writel(num, si->uart_base + MXC_UARTUBIR); + writel(denom, si->uart_base + MXC_UARTUBMR); + } + + writel(0x0000, si->uart_base + MXC_UARTUTS); + return 0; + +} + +/*! + * This function enables FIRI port. + * + * @param si FIRI port specific structure. + * + * @return The function returns 0 on success and a non-zero value on + * failure. + */ +static int mxc_irda_startup(struct mxc_irda *si) +{ + int ret = 0; + + mxc_irda_uart_init(si); + mxc_irda_firi_init(si); + + /* configure FIRI device for speed */ + ret = mxc_irda_set_speed(si, si->speed = 9600); + + return ret; +} + +/*! + * When an ifconfig is issued which changes the device flag to include + * IFF_UP this function is called. It is only called when the change + * occurs, not when the interface remains up. The function grabs the interrupt + * resources and registers FIRI interrupt service routines, requests for DMA + * channels, configures the DMA channel. It then initializes the IOMUX + * registers to configure the pins for FIRI signals and finally initializes the + * various FIRI registers and enables the port for reception. + * + * @param dev net device structure that is being opened + * + * @return The function returns 0 for a successful open and non-zero value + * on failure. + */ +static int mxc_irda_start(struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + int err; + int ints_muxed = 0; + mxc_dma_device_t dev_id = 0; + + if (si->uart_irq == si->uart_irq1) + ints_muxed = 1; + + si->speed = 9600; + + if (si->uart_irq == si->firi_irq) { + err = + request_irq(si->uart_irq, mxc_irda_irq, 0, dev->name, dev); + if (err) { + dev_err(si->dev, "%s:Failed to request the IRQ\n", + __FUNCTION__); + return err; + } + /* + * The interrupt must remain disabled for now. + */ + disable_irq(si->uart_irq); + } else { + err = + request_irq(si->firi_irq, mxc_irda_irq, 0, dev->name, dev); + if (err) { + dev_err(si->dev, "%s:Failed to request FIRI IRQ\n", + __FUNCTION__); + return err; + } + /* + * The interrupt must remain disabled for now. + */ + disable_irq(si->firi_irq); + if (ints_muxed) { + + err = request_irq(si->uart_irq, mxc_irda_irq, 0, + dev->name, dev); + if (err) { + dev_err(si->dev, + "%s:Failed to request UART IRQ\n", + __FUNCTION__); + goto err_irq1; + } + /* + * The interrupt must remain disabled for now. + */ + disable_irq(si->uart_irq); + } else { + err = request_irq(si->uart_irq, mxc_irda_tx_irq, 0, + dev->name, dev); + if (err) { + dev_err(si->dev, + "%s:Failed to request UART IRQ\n", + __FUNCTION__); + goto err_irq1; + } + err = request_irq(si->uart_irq1, mxc_irda_rx_irq, 0, + dev->name, dev); + if (err) { + dev_err(si->dev, + "%s:Failed to request UART1 IRQ\n", + __FUNCTION__); + goto err_irq2; + } + /* + * The interrupts must remain disabled for now. + */ + disable_irq(si->uart_irq); + disable_irq(si->uart_irq1); + } + } +#ifdef FIRI_SDMA_RX + dev_id = MXC_DMA_FIR_RX; + si->rxdma_ch = mxc_dma_request(dev_id, "MXC FIRI RX"); + if (si->rxdma_ch < 0) { + dev_err(si->dev, "Cannot allocate FIR DMA channel\n"); + goto err_rx_dma; + } + mxc_dma_callback_set(si->rxdma_ch, mxc_irda_fir_dma_rx_irq, + (void *)dev_get_drvdata(si->dev)); +#endif +#ifdef FIRI_SDMA_TX + + dev_id = MXC_DMA_FIR_TX; + si->txdma_ch = mxc_dma_request(dev_id, "MXC FIRI TX"); + if (si->txdma_ch < 0) { + dev_err(si->dev, "Cannot allocate FIR DMA channel\n"); + goto err_tx_dma; + } + mxc_dma_callback_set(si->txdma_ch, mxc_irda_fir_dma_tx_irq, + (void *)dev_get_drvdata(si->dev)); +#endif + /* Setup the serial port port for the initial speed. */ + err = mxc_irda_startup(si); + if (err) { + goto err_startup; + } + + /* Open a new IrLAP layer instance. */ + si->irlap = irlap_open(dev, &si->qos, "mxc"); + err = -ENOMEM; + if (!si->irlap) { + goto err_irlap; + } + + /* Now enable the interrupt and start the queue */ + si->open = 1; + si->suspend = 0; + + if (si->uart_irq == si->firi_irq) { + enable_irq(si->uart_irq); + } else { + enable_irq(si->firi_irq); + if (ints_muxed == 1) { + enable_irq(si->uart_irq); + } else { + enable_irq(si->uart_irq); + enable_irq(si->uart_irq1); + } + } + + netif_start_queue(dev); + return 0; + + err_irlap: + si->open = 0; + mxc_irda_disabledma(si); + err_startup: +#ifdef FIRI_SDMA_TX + mxc_dma_free(si->txdma_ch); + err_tx_dma: +#endif +#ifdef FIRI_SDMA_RX + mxc_dma_free(si->rxdma_ch); + err_rx_dma: +#endif + if (si->uart_irq1 && !ints_muxed) + free_irq(si->uart_irq1, dev); + err_irq2: + if (si->uart_irq != si->firi_irq) + free_irq(si->uart_irq, dev); + err_irq1: + if (si->firi_irq) + free_irq(si->firi_irq, dev); + return err; +} + +/*! + * This function is called when IFF_UP flag has been cleared by the user via + * the ifconfig irda0 down command. This function stops any further + * transmissions being queued, and then disables the interrupts. + * Finally it resets the device. + * @param dev the net_device structure + * + * @return int the function always returns 0 indicating a success. + */ +static int mxc_irda_stop(struct net_device *dev) +{ + struct mxc_irda *si = netdev_priv(dev); + unsigned long flags; + + /* Stop IrLAP */ + if (si->irlap) { + irlap_close(si->irlap); + si->irlap = NULL; + } + + netif_stop_queue(dev); + + /*Save flags and disable the FIRI interrupts.. */ + if (si->open) { + local_irq_save(flags); + disable_irq(si->uart_irq); + free_irq(si->uart_irq, dev); + if (si->uart_irq != si->firi_irq) { + disable_irq(si->firi_irq); + free_irq(si->firi_irq, dev); + if (si->uart_irq1 != si->uart_irq) { + disable_irq(si->uart_irq1); + free_irq(si->uart_irq1, dev); + } + } + local_irq_restore(flags); + si->open = 0; + } +#ifdef FIRI_SDMA_RX + if (si->rxdma_ch) { + mxc_dma_disable(si->rxdma_ch); + mxc_dma_free(si->rxdma_ch); + if (si->dma_rx_buff_phy) { + dma_unmap_single(si->dev, si->dma_rx_buff_phy, + IRDA_FRAME_SIZE_LIMIT, + DMA_FROM_DEVICE); + si->dma_rx_buff_phy = 0; + } + si->rxdma_ch = 0; + } + tasklet_kill(&dma_rx_tasklet); +#endif +#ifdef FIRI_SDMA_TX + if (si->txdma_ch) { + mxc_dma_disable(si->txdma_ch); + mxc_dma_free(si->txdma_ch); + if (si->dma_tx_buff_phy) { + dma_unmap_single(si->dev, si->dma_tx_buff_phy, + si->dma_tx_buff_len, DMA_TO_DEVICE); + si->dma_tx_buff_phy = 0; + } + si->txdma_ch = 0; + } +#endif + return 0; +} + +#ifdef CONFIG_PM +/*! + * This function is called to put the FIRI in a low power state. Refer to the + * document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which FIRI + * to suspend + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_irda_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct net_device *ndev = platform_get_drvdata(pdev); + struct mxc_irda *si = netdev_priv(ndev); + unsigned int cr; + unsigned long flags; + + if (!si) { + return 0; + } + if (si->suspend == 1) { + dev_err(si->dev, + " suspend - Device is already suspended ... \n"); + return 0; + } + if (si->open) { + + netif_device_detach(ndev); + mxc_irda_disabledma(si); + + /*Save flags and disable the FIRI interrupts.. */ + local_irq_save(flags); + disable_irq(si->uart_irq); + if (si->uart_irq != si->firi_irq) { + disable_irq(si->firi_irq); + if (si->uart_irq != si->uart_irq1) { + disable_irq(si->uart_irq1); + } + } + local_irq_restore(flags); + + /* Disable Tx and Rx and then disable the UART clock */ + cr = readl(si->uart_base + MXC_UARTUCR2); + cr &= ~(MXC_UARTUCR2_TXEN | MXC_UARTUCR2_RXEN); + writel(cr, si->uart_base + MXC_UARTUCR2); + cr = readl(si->uart_base + MXC_UARTUCR1); + cr &= ~MXC_UARTUCR1_UARTEN; + writel(cr, si->uart_base + MXC_UARTUCR1); + clk_disable(si->uart_clk); + + /*Disable Tx and Rx for FIRI and then disable the FIRI clock.. */ + cr = readl(si->firi_base + FIRITCR); + cr &= ~FIRITCR_TE; + writel(cr, si->firi_base + FIRITCR); + cr = readl(si->firi_base + FIRIRCR); + cr &= ~FIRIRCR_RE; + writel(cr, si->firi_base + FIRIRCR); + clk_disable(si->firi_clk); + + gpio_firi_inactive(); + + si->suspend = 1; + si->open = 0; + } + return 0; +} + +/*! + * This function is called to bring the FIRI back from a low power state. Refer + * to the document driver-model/driver.txt in the kernel source tree for more + * information. + * + * @param pdev the device structure used to give information on which FIRI + * to resume + * + * @return The function always returns 0. + */ +static int mxc_irda_resume(struct platform_device *pdev) +{ + struct net_device *ndev = platform_get_drvdata(pdev); + struct mxc_irda *si = netdev_priv(ndev); + unsigned long flags; + + if (!si) { + return 0; + } + + if (si->suspend == 1 && !si->open) { + + /*Initialise the UART first */ + clk_enable(si->uart_clk); + + /*Now init FIRI */ + gpio_firi_active(si->firi_base + FIRITCR, FIRITCR_TPP); + mxc_irda_startup(si); + + /* Enable the UART and FIRI interrupts.. */ + local_irq_save(flags); + enable_irq(si->uart_irq); + if (si->uart_irq != si->firi_irq) { + enable_irq(si->firi_irq); + if (si->uart_irq != si->uart_irq1) { + enable_irq(si->uart_irq1); + } + } + local_irq_restore(flags); + + /* Let the kernel know that we are alive and kicking.. */ + netif_device_attach(ndev); + + si->suspend = 0; + si->open = 1; + } + return 0; +} +#else +#define mxc_irda_suspend NULL +#define mxc_irda_resume NULL +#endif + +static int mxc_irda_init_iobuf(iobuff_t * io, int size) +{ + io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); + if (io->head != NULL) { + io->truesize = size; + io->in_frame = FALSE; + io->state = OUTSIDE_FRAME; + io->data = io->head; + } + return io->head ? 0 : -ENOMEM; + +} + +static struct net_device_ops mxc_irda_ops = { + .ndo_start_xmit = mxc_irda_hard_xmit, + .ndo_open = mxc_irda_start, + .ndo_stop = mxc_irda_stop, + .ndo_do_ioctl = mxc_irda_ioctl, + .ndo_get_stats = mxc_irda_stats, +}; + +/*! + * This function is called during the driver binding process. + * This function requests for memory, initializes net_device structure and + * registers with kernel. + * + * @param pdev the device structure used to store device specific + * information that is used by the suspend, resume and remove + * functions + * + * @return The function returns 0 on success and a non-zero value on failure + */ +static int mxc_irda_probe(struct platform_device *pdev) +{ + struct net_device *dev; + struct mxc_irda *si; + struct resource *uart_res, *firi_res; + int uart_irq, firi_irq, uart_irq1; + unsigned int baudrate_mask = 0; + int err; + + uart_res = &pdev->resource[0]; + uart_irq = pdev->resource[1].start; + + firi_res = &pdev->resource[2]; + firi_irq = pdev->resource[3].start; + + uart_irq1 = pdev->resource[4].start; + + if (!uart_res || uart_irq == NO_IRQ || !firi_res || firi_irq == NO_IRQ) { + dev_err(&pdev->dev, "Unable to find resources\n"); + return -ENXIO; + } + + err = + request_mem_region(uart_res->start, SZ_16K, + "MXC_IRDA") ? 0 : -EBUSY; + if (err) { + dev_err(&pdev->dev, "Failed to request UART memory region\n"); + return -ENOMEM; + } + + err = + request_mem_region(firi_res->start, SZ_16K, + "MXC_IRDA") ? 0 : -EBUSY; + if (err) { + dev_err(&pdev->dev, "Failed to request FIRI memory region\n"); + goto err_mem_1; + } + + dev = alloc_irdadev(sizeof(struct mxc_irda)); + if (!dev) { + goto err_mem_2; + } + + si = netdev_priv(dev); + si->dev = &pdev->dev; + + si->mxc_ir_plat = pdev->dev.platform_data; + si->uart_clk = si->mxc_ir_plat->uart_clk; + + si->uart_res = uart_res; + si->firi_res = firi_res; + si->uart_irq = uart_irq; + si->firi_irq = firi_irq; + si->uart_irq1 = uart_irq1; + + si->uart_base = ioremap(uart_res->start, SZ_16K); + si->firi_base = ioremap(firi_res->start, SZ_16K); + + if (!(si->uart_base || si->firi_base)) { + err = -ENOMEM; + goto err_mem_3; + } + + /* + * Initialise the SIR buffers + */ + err = mxc_irda_init_iobuf(&si->rx_buff, UART_BUFF_SIZE); + if (err) { + goto err_mem_4; + } + + err = mxc_irda_init_iobuf(&si->tx_buff, UART_BUFF_SIZE); + if (err) { + goto err_mem_5; + } + + dev->netdev_ops = &mxc_irda_ops; + + irda_init_max_qos_capabilies(&si->qos); + + /* + * We support + * SIR(9600, 19200,38400, 57600 and 115200 bps) + * FIR(4 Mbps) + * Min Turn Time set to 1ms or greater. + */ + baudrate_mask |= IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200; + baudrate_mask |= IR_4000000 << 8; + + si->qos.baud_rate.bits &= baudrate_mask; + si->qos.min_turn_time.bits = 0x7; + + irda_qos_bits_to_value(&si->qos); + +#ifdef FIRI_SDMA_RX + si->tskb = NULL; + tasklet_init(&dma_rx_tasklet, mxc_irda_rx_task, (unsigned long)si); +#endif + err = register_netdev(dev); + if (err == 0) { + platform_set_drvdata(pdev, dev); + } else { + kfree(si->tx_buff.head); + err_mem_5: + kfree(si->rx_buff.head); + err_mem_4: + iounmap(si->uart_base); + iounmap(si->firi_base); + err_mem_3: + free_netdev(dev); + err_mem_2: + release_mem_region(firi_res->start, SZ_16K); + err_mem_1: + release_mem_region(uart_res->start, SZ_16K); + } + return err; +} + +/*! + * Dissociates the driver from the FIRI device. Removes the appropriate FIRI + * port structure from the kernel. + * + * @param pdev the device structure used to give information on which FIRI + * to remove + * + * @return The function always returns 0. + */ +static int mxc_irda_remove(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct mxc_irda *si = netdev_priv(dev); + + if (si->uart_base) + iounmap(si->uart_base); + if (si->firi_base) + iounmap(si->firi_base); + if (si->firi_res->start) + release_mem_region(si->firi_res->start, SZ_16K); + if (si->uart_res->start) + release_mem_region(si->uart_res->start, SZ_16K); + if (si->tx_buff.head) + kfree(si->tx_buff.head); + if (si->rx_buff.head) + kfree(si->rx_buff.head); + + platform_set_drvdata(pdev, NULL); + unregister_netdev(dev); + free_netdev(dev); + + return 0; +} + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct platform_driver mxcir_driver = { + .driver = { + .name = "mxcir", + }, + .probe = mxc_irda_probe, + .remove = mxc_irda_remove, + .suspend = mxc_irda_suspend, + .resume = mxc_irda_resume, +}; + +/*! + * This function is used to initialize the FIRI driver module. The function + * registers the power management callback functions with the kernel and also + * registers the FIRI callback functions. + * + * @return The function returns 0 on success and a non-zero value on failure. + */ +static int __init mxc_irda_init(void) +{ + return platform_driver_register(&mxcir_driver); +} + +/*! + * This function is used to cleanup all resources before the driver exits. + */ +static void __exit mxc_irda_exit(void) +{ + platform_driver_unregister(&mxcir_driver); +} + +module_init(mxc_irda_init); +module_exit(mxc_irda_exit); + +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_DESCRIPTION("MXC IrDA(SIR/FIR) driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/net/irda/mxc_ir.h +++ linux-fsl-imx51-2.6.31/drivers/net/irda/mxc_ir.h @@ -0,0 +1,133 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __MXC_FIRI_REG_H__ +#define __MXC_FIRI_REG_H__ + +#include + +/*! + * @defgroup FIRI Fast IR Driver + */ + +/*! + * @file mxc_ir.h + * + * @brief MXC FIRI header file + * + * This file defines base address and bits of FIRI registers + * + * @ingroup FIRI + */ + +/*! + * FIRI maximum packet length + */ +#define FIR_MAX_RXLEN 2047 + +/* + * FIRI Transmitter Control Register + */ +#define FIRITCR 0x00 +/* + * FIRI Transmitter Count Register + */ +#define FIRITCTR 0x04 +/* + * FIRI Receiver Control Register + */ +#define FIRIRCR 0x08 +/* + * FIRI Transmitter Status Register + */ +#define FIRITSR 0x0C +/* + * FIRI Receiver Status Register + */ +#define FIRIRSR 0x10 +/* + * FIRI Transmitter FIFO + */ +#define FIRITXFIFO 0x14 +/* + * FIRI Receiver FIFO + */ +#define FIRIRXFIFO 0x18 +/* + * FIRI Control Register + */ +#define FIRICR 0x1C + +/* + * Bit definitions of Transmitter Controller Register + */ +#define FIRITCR_HAG (1<<24) /* H/W address generator */ +#define FIRITCR_SRF_FIR (0<<13) /* Start field repeat factor */ +#define FIRITCR_SRF_MIR (1<<13) /* Start field Repeat Factor */ +#define FIRITCR_TDT_MIR (2<<10) /* TX trigger for MIR is set to 32 bytes) */ +#define FIRITCR_TDT_FIR (1<<10) /* TX trigger for FIR is set to 16 bytes) */ +#define FIRITCR_TCIE (1<<9) /* TX Complete Interrupt Enable */ +#define FIRITCR_TPEIE (1<<8) /* TX Packet End Interrupt Enable */ +#define FIRITCR_TFUIE (1<<7) /* TX FIFO Under-run Interrupt Enable */ +#define FIRITCR_PCF (1<<6) /* Packet Complete by FIFO */ +#define FIRITCR_PC (1<<5) /* Packet Complete */ +#define FIRITCR_SIP (1<<4) /* TX Enable of SIP */ +#define FIRITCR_TPP (1<<3) /* TX Pulse Polarity bit */ +#define FIRITCR_TM_FIR (0<<1) /* TX Mode 4 Mbps */ +#define FIRITCR_TM_MIR1 (1<<1) /* TX Mode 0.576 Mbps */ +#define FIRITCR_TM_MIR2 (1<<2) /* TX Mode 1.152 Mbps */ +#define FIRITCR_TE (1<<0) /* TX Enable */ + +/* + * Bit definitions of Transmitter Count Register + */ +#define FIRITCTR_TPL 511 /* TX Packet Length set to 512 bytes */ + +/* + * Bit definitions of Receiver Control Register + */ +#define FIRIRCR_RAM (1<<24) /* RX Address Match */ +#define FIRIRCR_RPEDE (1<<11) /* Packet End DMA request Enable */ +#define FIRIRCR_RDT_MIR (2<<8) /* DMA Trigger level(64 bytes in RXFIFO) */ +#define FIRIRCR_RDT_FIR (1<<8) /* DMA Trigger level(16 bytes in RXFIFO) */ +#define FIRIRCR_RPA (1<<7) /* RX Packet Abort */ +#define FIRIRCR_RPEIE (1<<6) /* RX Packet End Interrupt Enable */ +#define FIRIRCR_PAIE (1<<5) /* Packet Abort Interrupt Enable */ +#define FIRIRCR_RFOIE (1<<4) /* RX FIFO Overrun Interrupt Enable */ +#define FIRIRCR_RPP (1<<3) /* RX Pulse Polarity bit */ +#define FIRIRCR_RM_FIR (0<<1) /* 4 Mbps */ +#define FIRIRCR_RM_MIR1 (1<<1) /* 0.576 Mbps */ +#define FIRIRCR_RM_MIR2 (1<<2) /* 1.152 Mbps */ +#define FIRIRCR_RE (1<<0) /* RX Enable */ + +/* Transmitter Status Register */ +#define FIRITSR_TFP 0xFF00 /* Mask for available bytes in TX FIFO */ +#define FIRITSR_TC (1<<3) /* Transmit Complete bit */ +#define FIRITSR_SIPE (1<<2) /* SIP End bit */ +#define FIRITSR_TPE (1<<1) /* Transmit Packet End */ +#define FIRITSR_TFU (1<<0) /* TX FIFO Under-run */ + +/* Receiver Status Register */ +#define FIRIRSR_RFP 0xFF00 /* mask for available bytes RX FIFO */ +#define FIRIRSR_PAS (1<<5) /* preamble search */ +#define FIRIRSR_RPE (1<<4) /* RX Packet End */ +#define FIRIRSR_RFO (1<<3) /* RX FIFO Overrun */ +#define FIRIRSR_BAM (1<<2) /* Broadcast Address Match */ +#define FIRIRSR_CRCE (1<<1) /* CRC error */ +#define FIRIRSR_DDE (1<<0) /* Address, control or data field error */ + +/* FIRI Control Register */ +#define FIRICR_BL (32<<5) /* Burst Length is set to 32 */ +#define FIRICR_OSF (0<<1) /* Over Sampling Factor */ + +#endif /* __MXC_FIRI_REG_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/mlx4/main.c +++ linux-fsl-imx51-2.6.31/drivers/net/mlx4/main.c @@ -525,7 +525,10 @@ goto err_unmap_aux; } - err = mlx4_map_eq_icm(dev, init_hca->eqc_base); + err = mlx4_init_icm_table(dev, &priv->eq_table.table, + init_hca->eqc_base, dev_cap->eqc_entry_sz, + dev->caps.num_eqs, dev->caps.num_eqs, + 0, 0); if (err) { mlx4_err(dev, "Failed to map EQ context memory, aborting.\n"); goto err_unmap_cmpt; @@ -668,7 +671,7 @@ mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); err_unmap_eq: - mlx4_unmap_eq_icm(dev); + mlx4_cleanup_icm_table(dev, &priv->eq_table.table); err_unmap_cmpt: mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); @@ -698,11 +701,11 @@ mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); + mlx4_cleanup_icm_table(dev, &priv->eq_table.table); mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); - mlx4_unmap_eq_icm(dev); mlx4_UNMAP_ICM_AUX(dev); mlx4_free_icm(dev, priv->fw.aux_icm, 0); --- linux-fsl-imx51-2.6.31.orig/drivers/net/mlx4/mlx4.h +++ linux-fsl-imx51-2.6.31/drivers/net/mlx4/mlx4.h @@ -205,9 +205,7 @@ void __iomem **uar_map; u32 clr_mask; struct mlx4_eq *eq; - u64 icm_virt; - struct page *icm_page; - dma_addr_t icm_dma; + struct mlx4_icm_table table; struct mlx4_icm_table cmpt_table; int have_irq; u8 inta_pin; @@ -373,9 +371,6 @@ struct mlx4_dev_cap *dev_cap, struct mlx4_init_hca_param *init_hca); -int mlx4_map_eq_icm(struct mlx4_dev *dev, u64 icm_virt); -void mlx4_unmap_eq_icm(struct mlx4_dev *dev); - int mlx4_cmd_init(struct mlx4_dev *dev); void mlx4_cmd_cleanup(struct mlx4_dev *dev); void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param); --- linux-fsl-imx51-2.6.31.orig/drivers/net/mlx4/eq.c +++ linux-fsl-imx51-2.6.31/drivers/net/mlx4/eq.c @@ -526,48 +526,6 @@ iounmap(priv->clr_base); } -int mlx4_map_eq_icm(struct mlx4_dev *dev, u64 icm_virt) -{ - struct mlx4_priv *priv = mlx4_priv(dev); - int ret; - - /* - * We assume that mapping one page is enough for the whole EQ - * context table. This is fine with all current HCAs, because - * we only use 32 EQs and each EQ uses 64 bytes of context - * memory, or 1 KB total. - */ - priv->eq_table.icm_virt = icm_virt; - priv->eq_table.icm_page = alloc_page(GFP_HIGHUSER); - if (!priv->eq_table.icm_page) - return -ENOMEM; - priv->eq_table.icm_dma = pci_map_page(dev->pdev, priv->eq_table.icm_page, 0, - PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(dev->pdev, priv->eq_table.icm_dma)) { - __free_page(priv->eq_table.icm_page); - return -ENOMEM; - } - - ret = mlx4_MAP_ICM_page(dev, priv->eq_table.icm_dma, icm_virt); - if (ret) { - pci_unmap_page(dev->pdev, priv->eq_table.icm_dma, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); - __free_page(priv->eq_table.icm_page); - } - - return ret; -} - -void mlx4_unmap_eq_icm(struct mlx4_dev *dev) -{ - struct mlx4_priv *priv = mlx4_priv(dev); - - mlx4_UNMAP_ICM(dev, priv->eq_table.icm_virt, 1); - pci_unmap_page(dev->pdev, priv->eq_table.icm_dma, PAGE_SIZE, - PCI_DMA_BIDIRECTIONAL); - __free_page(priv->eq_table.icm_page); -} - int mlx4_alloc_eq_table(struct mlx4_dev *dev) { struct mlx4_priv *priv = mlx4_priv(dev); --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000/e1000_main.c +++ linux-fsl-imx51-2.6.31/drivers/net/e1000/e1000_main.c @@ -1924,18 +1924,6 @@ rctl &= ~E1000_RCTL_SZ_4096; rctl |= E1000_RCTL_BSEX; switch (adapter->rx_buffer_len) { - case E1000_RXBUFFER_256: - rctl |= E1000_RCTL_SZ_256; - rctl &= ~E1000_RCTL_BSEX; - break; - case E1000_RXBUFFER_512: - rctl |= E1000_RCTL_SZ_512; - rctl &= ~E1000_RCTL_BSEX; - break; - case E1000_RXBUFFER_1024: - rctl |= E1000_RCTL_SZ_1024; - rctl &= ~E1000_RCTL_BSEX; - break; case E1000_RXBUFFER_2048: default: rctl |= E1000_RCTL_SZ_2048; @@ -3492,13 +3480,7 @@ * larger slab size * i.e. RXBUFFER_2048 --> size-4096 slab */ - if (max_frame <= E1000_RXBUFFER_256) - adapter->rx_buffer_len = E1000_RXBUFFER_256; - else if (max_frame <= E1000_RXBUFFER_512) - adapter->rx_buffer_len = E1000_RXBUFFER_512; - else if (max_frame <= E1000_RXBUFFER_1024) - adapter->rx_buffer_len = E1000_RXBUFFER_1024; - else if (max_frame <= E1000_RXBUFFER_2048) + if (max_frame <= E1000_RXBUFFER_2048) adapter->rx_buffer_len = E1000_RXBUFFER_2048; else if (max_frame <= E1000_RXBUFFER_4096) adapter->rx_buffer_len = E1000_RXBUFFER_4096; @@ -4041,13 +4023,22 @@ length = le16_to_cpu(rx_desc->length); /* !EOP means multiple descriptors were used to store a single - * packet, also make sure the frame isn't just CRC only */ - if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) { + * packet, if thats the case we need to toss it. In fact, we + * to toss every packet with the EOP bit clear and the next + * frame that _does_ have the EOP bit set, as it is by + * definition only a frame fragment + */ + if (unlikely(!(status & E1000_RXD_STAT_EOP))) + adapter->discarding = true; + + if (adapter->discarding) { /* All receives must fit into a single buffer */ E1000_DBG("%s: Receive packet consumed multiple" " buffers\n", netdev->name); /* recycle */ buffer_info->skb = skb; + if (status & E1000_RXD_STAT_EOP) + adapter->discarding = false; goto next_desc; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000/e1000.h +++ linux-fsl-imx51-2.6.31/drivers/net/e1000/e1000.h @@ -324,6 +324,8 @@ /* for ioport free */ int bars; int need_ioport; + + bool discarding; }; enum e1000_state_t { --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ray_cs.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ray_cs.c @@ -2878,7 +2878,7 @@ unsigned long count, void *data) { static char proc_essid[33]; - int len = count; + unsigned int len = count; if (len > 32) len = 32; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/rtl818x/rtl8187_leds.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/rtl818x/rtl8187_leds.c @@ -210,10 +210,10 @@ /* turn the LED off before exiting */ queue_delayed_work(dev->workqueue, &priv->led_off, 0); - cancel_delayed_work_sync(&priv->led_off); - cancel_delayed_work_sync(&priv->led_on); rtl8187_unregister_led(&priv->led_rx); rtl8187_unregister_led(&priv->led_tx); + cancel_delayed_work_sync(&priv->led_off); + cancel_delayed_work_sync(&priv->led_on); } #endif /* def CONFIG_RTL8187_LED */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/hostap/hostap_hw.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/hostap/hostap_hw.c @@ -68,7 +68,7 @@ module_param_string(essid, essid, sizeof(essid), 0444); MODULE_PARM_DESC(essid, "Host AP's ESSID"); -static int iw_mode[MAX_PARM_DEVICES] = { IW_MODE_MASTER, DEF_INTS }; +static int iw_mode[MAX_PARM_DEVICES] = { IW_MODE_INFRA, DEF_INTS }; module_param_array(iw_mode, int, NULL, 0444); MODULE_PARM_DESC(iw_mode, "Initial operation mode"); @@ -2618,6 +2618,15 @@ int events = 0; u16 ev; + /* Detect early interrupt before driver is fully configued */ + if (!dev->base_addr) { + if (net_ratelimit()) { + printk(KERN_DEBUG "%s: Interrupt, but dev not configured\n", + dev->name); + } + return IRQ_HANDLED; + } + iface = netdev_priv(dev); local = iface->local; @@ -3383,6 +3392,7 @@ memset(&wrqu, 0, sizeof(wrqu)); wrqu.ap_addr.sa_family = ARPHRD_ETHER; wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL); + wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL); /* Disable hardware and firmware */ prism2_hw_shutdown(dev, 0); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/hostap/hostap_info.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/hostap/hostap_info.c @@ -237,6 +237,7 @@ wrqu.data.length = 0; wrqu.data.flags = 0; wireless_send_event(local->dev, SIOCGIWSCAN, &wrqu, NULL); + wireless_send_event(local->ddev, SIOCGIWSCAN, &wrqu, NULL); /* Allow SIOCGIWSCAN handling to occur since we have received * scanning result */ @@ -448,8 +449,10 @@ * frames and can confuse wpa_supplicant about the current association * status. */ - if (connected || local->prev_linkstatus_connected) + if (connected || local->prev_linkstatus_connected) { wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL); + wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL); + } local->prev_linkstatus_connected = connected; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/hostap/hostap_main.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/hostap/hostap_main.c @@ -875,15 +875,16 @@ switch(type) { case HOSTAP_INTERFACE_AP: + dev->tx_queue_len = 0; /* use main radio device queue */ dev->netdev_ops = &hostap_mgmt_netdev_ops; dev->type = ARPHRD_IEEE80211; dev->header_ops = &hostap_80211_ops; break; case HOSTAP_INTERFACE_MASTER: - dev->tx_queue_len = 0; /* use main radio device queue */ dev->netdev_ops = &hostap_master_ops; break; default: + dev->tx_queue_len = 0; /* use main radio device queue */ dev->netdev_ops = &hostap_netdev_ops; } @@ -1099,6 +1100,7 @@ (u8 *) &val, 2); memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL); + wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL); return ret; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/p54/p54usb.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/p54/p54usb.c @@ -64,8 +64,9 @@ {USB_DEVICE(0x0915, 0x2002)}, /* Cohiba Proto board */ {USB_DEVICE(0x0baf, 0x0118)}, /* U.S. Robotics U5 802.11g Adapter*/ {USB_DEVICE(0x0bf8, 0x1009)}, /* FUJITSU E-5400 USB D1700*/ - {USB_DEVICE(0x0cde, 0x0006)}, /* Medion MD40900 */ +// DUPE {USB_DEVICE(0x0cde, 0x0006)}, /* Medion MD40900 */ {USB_DEVICE(0x0cde, 0x0008)}, /* Sagem XG703A */ + {USB_DEVICE(0x0cde, 0x0015)}, /* Zcomax XG-705A */ {USB_DEVICE(0x0d8e, 0x3762)}, /* DLink DWL-G120 Cohiba */ {USB_DEVICE(0x124a, 0x4025)}, /* IOGear GWU513 (GW3887IK chip) */ {USB_DEVICE(0x1260, 0xee22)}, /* SMC 2862W-G version 2 */ @@ -426,12 +427,16 @@ static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) { struct p54u_priv *priv = dev->priv; - u8 buf[4]; + u8 *buf; int ret; - memcpy(&buf, p54u_romboot_3887, sizeof(buf)); + buf = kmalloc(4, GFP_KERNEL); + if (!buf) + return -ENOMEM; + memcpy(buf, p54u_romboot_3887, 4); ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, - buf, sizeof(buf)); + buf, 4); + kfree(buf); if (ret) dev_err(&priv->udev->dev, "(p54usb) unable to jump to " "boot ROM (%d)!\n", ret); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ipw2x00/ipw2200.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ipw2x00/ipw2200.c @@ -89,7 +89,7 @@ static u32 ipw_debug_level; static int associate; static int auto_create = 1; -static int led = 0; +static int led = 1; static int disable = 0; static int bt_coexist = 0; static int hwcrypto = 0; @@ -11964,7 +11964,7 @@ MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)"); module_param(led, int, 0444); -MODULE_PARM_DESC(led, "enable led control on some systems (default 0 off)"); +MODULE_PARM_DESC(led, "enable led control on some systems (default 1 on)"); module_param(debug, int, 0444); MODULE_PARM_DESC(debug, "debug output mask"); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ipw2x00/ipw2100.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ipw2x00/ipw2100.c @@ -6487,6 +6487,16 @@ } #endif +static void ipw2100_shutdown(struct pci_dev *pci_dev) +{ + struct ipw2100_priv *priv = pci_get_drvdata(pci_dev); + + /* Take down the device; powers it off, etc. */ + ipw2100_down(priv); + + pci_disable_device(pci_dev); +} + #define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x } static struct pci_device_id ipw2100_pci_id_table[] __devinitdata = { @@ -6550,6 +6560,7 @@ .suspend = ipw2100_suspend, .resume = ipw2100_resume, #endif + .shutdown = ipw2100_shutdown, }; /** --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/b43/rfkill.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/b43/rfkill.c @@ -33,7 +33,8 @@ & B43_MMIO_RADIO_HWENABLED_HI_MASK)) return 1; } else { - if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) + if (b43_status(dev) >= B43_STAT_STARTED && + b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) & B43_MMIO_RADIO_HWENABLED_LO_MASK) return 1; } --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/b43/dma.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/b43/dma.c @@ -1158,8 +1158,9 @@ } static int dma_tx_fragment(struct b43_dmaring *ring, - struct sk_buff *skb) + struct sk_buff **in_skb) { + struct sk_buff *skb = *in_skb; const struct b43_dma_ops *ops = ring->ops; struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); u8 *header; @@ -1225,8 +1226,14 @@ } memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); + memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb)); + bounce_skb->dev = skb->dev; + skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb)); + info = IEEE80211_SKB_CB(bounce_skb); + dev_kfree_skb_any(skb); skb = bounce_skb; + *in_skb = bounce_skb; meta->skb = skb; meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { @@ -1334,13 +1341,22 @@ spin_lock_irqsave(&ring->lock, flags); B43_WARN_ON(!ring->tx); - /* Check if the queue was stopped in mac80211, - * but we got called nevertheless. - * That would be a mac80211 bug. */ - B43_WARN_ON(ring->stopped); - if (unlikely(free_slots(ring) < TX_SLOTS_PER_FRAME)) { - b43warn(dev->wl, "DMA queue overflow\n"); + if (unlikely(ring->stopped)) { + /* We get here only because of a bug in mac80211. + * Because of a race, one packet may be queued after + * the queue is stopped, thus we got called when we shouldn't. + * For now, just refuse the transmit. */ + if (b43_debug(dev, B43_DBG_DMAVERBOSE)) + b43err(dev->wl, "Packet after queue stopped\n"); + err = -ENOSPC; + goto out_unlock; + } + + if (unlikely(WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME))) { + /* If we get here, we have a real error with the queue + * full, but queues not stopped. */ + b43err(dev->wl, "DMA queue overflow\n"); err = -ENOSPC; goto out_unlock; } @@ -1350,7 +1366,11 @@ * static, so we don't need to store it per frame. */ ring->queue_prio = skb_get_queue_mapping(skb); - err = dma_tx_fragment(ring, skb); + /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing + * into the skb data or cb now. */ + hdr = NULL; + info = NULL; + err = dma_tx_fragment(ring, &skb); if (unlikely(err == -ENOKEY)) { /* Drop this packet, as we don't have the encryption key * anymore and must not transmit it unencrypted. */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/libertas/wext.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/libertas/wext.c @@ -1951,10 +1951,8 @@ if (priv->connect_status == LBS_CONNECTED) { memcpy(extra, priv->curbssparams.ssid, priv->curbssparams.ssid_len); - extra[priv->curbssparams.ssid_len] = '\0'; } else { memset(extra, 0, 32); - extra[priv->curbssparams.ssid_len] = '\0'; } /* * If none, we may want to get the one that was set --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/libertas/if_usb.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/libertas/if_usb.c @@ -507,7 +507,7 @@ /* Fill the receive configuration URB and initialise the Rx call back */ usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, usb_rcvbulkpipe(cardp->udev, cardp->ep_in), - (void *) (skb->tail + (size_t) IPFIELD_ALIGN_OFFSET), + skb->data + IPFIELD_ALIGN_OFFSET, MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, cardp); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-rx.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-rx.c @@ -239,33 +239,51 @@ struct iwl_rx_queue *rxq = &priv->rxq; struct list_head *element; struct iwl_rx_mem_buffer *rxb; + struct sk_buff *skb; unsigned long flags; while (1) { spin_lock_irqsave(&rxq->lock, flags); - if (list_empty(&rxq->rx_used)) { spin_unlock_irqrestore(&rxq->lock, flags); return; } - element = rxq->rx_used.next; - rxb = list_entry(element, struct iwl_rx_mem_buffer, list); - list_del(element); - spin_unlock_irqrestore(&rxq->lock, flags); + if (rxq->free_count > RX_LOW_WATERMARK) + priority |= __GFP_NOWARN; /* Alloc a new receive buffer */ - rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256, + skb = alloc_skb(priv->hw_params.rx_buf_size + 256, priority); - if (!rxb->skb) { - IWL_CRIT(priv, "Can not allocate SKB buffers\n"); + if (!skb) { + if (net_ratelimit()) + IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n"); + if ((rxq->free_count <= RX_LOW_WATERMARK) && + net_ratelimit()) + IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", + priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", + rxq->free_count); /* We don't reschedule replenish work here -- we will * call the restock method and if it still needs * more buffers it will schedule replenish */ break; } + spin_lock_irqsave(&rxq->lock, flags); + + if (list_empty(&rxq->rx_used)) { + spin_unlock_irqrestore(&rxq->lock, flags); + dev_kfree_skb_any(skb); + return; + } + element = rxq->rx_used.next; + rxb = list_entry(element, struct iwl_rx_mem_buffer, list); + list_del(element); + + spin_unlock_irqrestore(&rxq->lock, flags); + + rxb->skb = skb; /* Get physical address of RB/SKB */ rxb->real_dma_addr = pci_map_single( priv->pci_dev, --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-6000.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-6000.c @@ -46,8 +46,8 @@ #include "iwl-5000-hw.h" /* Highest firmware API version supported */ -#define IWL6000_UCODE_API_MAX 2 -#define IWL6050_UCODE_API_MAX 2 +#define IWL6000_UCODE_API_MAX 3 +#define IWL6050_UCODE_API_MAX 3 /* Lowest firmware API version supported */ #define IWL6000_UCODE_API_MIN 1 @@ -69,6 +69,7 @@ }; static struct iwl_ops iwl6000_ops = { + .ucode = &iwl5000_ucode, .lib = &iwl5000_lib, .hcmd = &iwl5000_hcmd, .utils = &iwl6000_hcmd_utils, @@ -81,13 +82,15 @@ .ucode_api_min = IWL6000_UCODE_API_MIN, .sku = IWL_SKU_A|IWL_SKU_G, .ops = &iwl6000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_BC, .valid_rx_ant = ANT_BC, .need_pll_cfg = false, + .max_ll_items = OTP_MAX_LL_ITEMS_6x00, + .shadow_ram_support = true, }; struct iwl_cfg iwl6000_2agn_cfg = { @@ -97,13 +100,16 @@ .ucode_api_min = IWL6000_UCODE_API_MIN, .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, .ops = &iwl6000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_AB, .valid_rx_ant = ANT_AB, .need_pll_cfg = false, + .max_ll_items = OTP_MAX_LL_ITEMS_6x00, + .shadow_ram_support = true, + .use_rts_for_ht = true, /* use rts/cts protection */ }; struct iwl_cfg iwl6050_2agn_cfg = { @@ -113,13 +119,16 @@ .ucode_api_min = IWL6050_UCODE_API_MIN, .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, .ops = &iwl6000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_AB, .valid_rx_ant = ANT_AB, .need_pll_cfg = false, + .max_ll_items = OTP_MAX_LL_ITEMS_6x00, + .shadow_ram_support = true, + .use_rts_for_ht = true, /* use rts/cts protection */ }; struct iwl_cfg iwl6000_3agn_cfg = { @@ -129,13 +138,16 @@ .ucode_api_min = IWL6000_UCODE_API_MIN, .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, .ops = &iwl6000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC, .need_pll_cfg = false, + .max_ll_items = OTP_MAX_LL_ITEMS_6x00, + .shadow_ram_support = true, + .use_rts_for_ht = true, /* use rts/cts protection */ }; struct iwl_cfg iwl6050_3agn_cfg = { @@ -145,13 +157,16 @@ .ucode_api_min = IWL6050_UCODE_API_MIN, .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, .ops = &iwl6000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC, .need_pll_cfg = false, + .max_ll_items = OTP_MAX_LL_ITEMS_6x00, + .shadow_ram_support = true, + .use_rts_for_ht = true, /* use rts/cts protection */ }; MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-prph.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-prph.h @@ -80,6 +80,8 @@ #define APMG_RFKILL_REG (APMG_BASE + 0x0014) #define APMG_RTC_INT_STT_REG (APMG_BASE + 0x001c) #define APMG_RTC_INT_MSK_REG (APMG_BASE + 0x0020) +#define APMG_DIGITAL_SVR_REG (APMG_BASE + 0x0058) +#define APMG_ANALOG_SVR_REG (APMG_BASE + 0x006C) #define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200) #define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800) @@ -91,7 +93,8 @@ #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) - +#define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 */ +#define APMG_SVR_DIGITAL_VOLTAGE_1_32 (0x00000060) #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-eeprom.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-eeprom.c @@ -152,6 +152,19 @@ } EXPORT_SYMBOL(iwlcore_eeprom_verify_signature); +static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode) +{ + u32 otpgp; + + otpgp = iwl_read32(priv, CSR_OTP_GP_REG); + if (mode == IWL_OTP_ACCESS_ABSOLUTE) + iwl_clear_bit(priv, CSR_OTP_GP_REG, + CSR_OTP_GP_REG_OTP_ACCESS_MODE); + else + iwl_set_bit(priv, CSR_OTP_GP_REG, + CSR_OTP_GP_REG_OTP_ACCESS_MODE); +} + static int iwlcore_get_nvm_type(struct iwl_priv *priv) { u32 otpgp; @@ -249,6 +262,123 @@ return ret; } +static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data) +{ + int ret = 0; + u32 r; + u32 otpgp; + + _iwl_write32(priv, CSR_EEPROM_REG, + CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); + ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, + CSR_EEPROM_REG_READ_VALID_MSK, + IWL_EEPROM_ACCESS_TIMEOUT); + if (ret < 0) { + IWL_ERR(priv, "Time out reading OTP[%d]\n", addr); + return ret; + } + r = _iwl_read_direct32(priv, CSR_EEPROM_REG); + /* check for ECC errors: */ + otpgp = iwl_read32(priv, CSR_OTP_GP_REG); + if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) { + /* stop in this case */ + /* set the uncorrectable OTP ECC bit for acknowledgement */ + iwl_set_bit(priv, CSR_OTP_GP_REG, + CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); + IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n"); + return -EINVAL; + } + if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) { + /* continue in this case */ + /* set the correctable OTP ECC bit for acknowledgement */ + iwl_set_bit(priv, CSR_OTP_GP_REG, + CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK); + IWL_ERR(priv, "Correctable OTP ECC error, continue read\n"); + } + *eeprom_data = le16_to_cpu((__force __le16)(r >> 16)); + return 0; +} + +/* + * iwl_is_otp_empty: check for empty OTP + */ +static bool iwl_is_otp_empty(struct iwl_priv *priv) +{ + u16 next_link_addr = 0, link_value; + bool is_empty = false; + + /* locate the beginning of OTP link list */ + if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) { + if (!link_value) { + IWL_ERR(priv, "OTP is empty\n"); + is_empty = true; + } + } else { + IWL_ERR(priv, "Unable to read first block of OTP list.\n"); + is_empty = true; + } + + return is_empty; +} + + +/* + * iwl_find_otp_image: find EEPROM image in OTP + * finding the OTP block that contains the EEPROM image. + * the last valid block on the link list (the block _before_ the last block) + * is the block we should read and used to configure the device. + * If all the available OTP blocks are full, the last block will be the block + * we should read and used to configure the device. + * only perform this operation if shadow RAM is disabled + */ +static int iwl_find_otp_image(struct iwl_priv *priv, + u16 *validblockaddr) +{ + u16 next_link_addr = 0, link_value = 0, valid_addr; + int usedblocks = 0; + + /* set addressing mode to absolute to traverse the link list */ + iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE); + + /* checking for empty OTP or error */ + if (iwl_is_otp_empty(priv)) + return -EINVAL; + + /* + * start traverse link list + * until reach the max number of OTP blocks + * different devices have different number of OTP blocks + */ + do { + /* save current valid block address + * check for more block on the link list + */ + valid_addr = next_link_addr; + next_link_addr = link_value * sizeof(u16); + IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n", + usedblocks, next_link_addr); + if (iwl_read_otp_word(priv, next_link_addr, &link_value)) + return -EINVAL; + if (!link_value) { + /* + * reach the end of link list, return success and + * set address point to the starting address + * of the image + */ + *validblockaddr = valid_addr; + /* skip first 2 bytes (link list pointer) */ + *validblockaddr += 2; + return 0; + } + /* more in the link list, continue */ + usedblocks++; + } while (usedblocks <= priv->cfg->max_ll_items); + + /* OTP has no valid blocks */ + IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n"); + return -EINVAL; +} + /** * iwl_eeprom_init - read EEPROM contents * @@ -263,14 +393,13 @@ int sz; int ret; u16 addr; - u32 otpgp; + u16 validblockaddr = 0; + u16 cache_addr = 0; priv->nvm_device_type = iwlcore_get_nvm_type(priv); /* allocate eeprom */ - if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) - priv->cfg->eeprom_size = - OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL; + IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size); sz = priv->cfg->eeprom_size; priv->eeprom = kzalloc(sz, GFP_KERNEL); if (!priv->eeprom) { @@ -298,46 +427,31 @@ if (ret) { IWL_ERR(priv, "Failed to initialize OTP access.\n"); ret = -ENOENT; - goto err; + goto done; } _iwl_write32(priv, CSR_EEPROM_GP, iwl_read32(priv, CSR_EEPROM_GP) & ~CSR_EEPROM_GP_IF_OWNER_MSK); - /* clear */ - _iwl_write32(priv, CSR_OTP_GP_REG, - iwl_read32(priv, CSR_OTP_GP_REG) | + + iwl_set_bit(priv, CSR_OTP_GP_REG, CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK | CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK); - - for (addr = 0; addr < sz; addr += sizeof(u16)) { - u32 r; - - _iwl_write32(priv, CSR_EEPROM_REG, - CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); - - ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, - CSR_EEPROM_REG_READ_VALID_MSK, - IWL_EEPROM_ACCESS_TIMEOUT); - if (ret < 0) { - IWL_ERR(priv, "Time out reading OTP[%d]\n", addr); + /* traversing the linked list if no shadow ram supported */ + if (!priv->cfg->shadow_ram_support) { + if (iwl_find_otp_image(priv, &validblockaddr)) { + ret = -ENOENT; goto done; } - r = _iwl_read_direct32(priv, CSR_EEPROM_REG); - /* check for ECC errors: */ - otpgp = iwl_read32(priv, CSR_OTP_GP_REG); - if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) { - /* stop in this case */ - IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n"); + } + for (addr = validblockaddr; addr < validblockaddr + sz; + addr += sizeof(u16)) { + u16 eeprom_data; + + ret = iwl_read_otp_word(priv, addr, &eeprom_data); + if (ret) goto done; - } - if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) { - /* continue in this case */ - _iwl_write32(priv, CSR_OTP_GP_REG, - iwl_read32(priv, CSR_OTP_GP_REG) | - CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK); - IWL_ERR(priv, "Correctable OTP ECC error, continue read\n"); - } - e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16)); + e[cache_addr / 2] = eeprom_data; + cache_addr += sizeof(u16); } } else { /* eeprom is an array of 16bit values */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-scan.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-scan.c @@ -799,7 +799,8 @@ { struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); - if (!iwl_is_ready(priv)) + if (!test_bit(STATUS_READY, &priv->status) || + !test_bit(STATUS_GEO_CONFIGURED, &priv->status)) return; mutex_lock(&priv->mutex); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-dev.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-dev.h @@ -66,6 +66,7 @@ /* shared structures from iwl-5000.c */ extern struct iwl_mod_params iwl50_mod_params; extern struct iwl_ops iwl5000_ops; +extern struct iwl_ucode_ops iwl5000_ucode; extern struct iwl_lib_ops iwl5000_lib; extern struct iwl_hcmd_ops iwl5000_hcmd; extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils; @@ -525,15 +526,29 @@ }; /* uCode file layout */ -struct iwl_ucode { - __le32 ver; /* major/minor/API/serial */ - __le32 inst_size; /* bytes of runtime instructions */ - __le32 data_size; /* bytes of runtime data */ - __le32 init_size; /* bytes of initialization instructions */ - __le32 init_data_size; /* bytes of initialization data */ - __le32 boot_size; /* bytes of bootstrap instructions */ - u8 data[0]; /* data in same order as "size" elements */ +struct iwl_ucode_header { + __le32 ver; /* major/minor/API/serial */ + union { + struct { + __le32 inst_size; /* bytes of runtime code */ + __le32 data_size; /* bytes of runtime data */ + __le32 init_size; /* bytes of init code */ + __le32 init_data_size; /* bytes of init data */ + __le32 boot_size; /* bytes of bootstrap code */ + u8 data[0]; /* in same order as sizes */ + } v1; + struct { + __le32 build; /* build number */ + __le32 inst_size; /* bytes of runtime code */ + __le32 data_size; /* bytes of runtime data */ + __le32 init_size; /* bytes of init code */ + __le32 init_data_size; /* bytes of init data */ + __le32 boot_size; /* bytes of bootstrap code */ + u8 data[0]; /* in same order as sizes */ + } v2; + } u; }; +#define UCODE_HEADER_SIZE(ver) ((ver) == 1 ? 24 : 28) struct iwl4965_ibss_seq { u8 mac[ETH_ALEN]; @@ -820,6 +835,18 @@ NVM_DEVICE_TYPE_OTP, }; +/* + * Two types of OTP memory access modes + * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, + * based on physical memory addressing + * IWL_OTP_ACCESS_RELATIVE - relative address mode, + * based on logical memory addressing + */ +enum iwl_access_mode { + IWL_OTP_ACCESS_ABSOLUTE, + IWL_OTP_ACCESS_RELATIVE, +}; + /* interrupt statistics */ struct isr_statistics { u32 hw; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-4965.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-4965.c @@ -2221,12 +2221,50 @@ cancel_work_sync(&priv->txpower_work); } +#define IWL4965_UCODE_GET(item) \ +static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\ + u32 api_ver) \ +{ \ + return le32_to_cpu(ucode->u.v1.item); \ +} + +static u32 iwl4965_ucode_get_header_size(u32 api_ver) +{ + return UCODE_HEADER_SIZE(1); +} +static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + return 0; +} +static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + return (u8 *) ucode->u.v1.data; +} + +IWL4965_UCODE_GET(inst_size); +IWL4965_UCODE_GET(data_size); +IWL4965_UCODE_GET(init_size); +IWL4965_UCODE_GET(init_data_size); +IWL4965_UCODE_GET(boot_size); + static struct iwl_hcmd_ops iwl4965_hcmd = { .rxon_assoc = iwl4965_send_rxon_assoc, .commit_rxon = iwl_commit_rxon, .set_rxon_chain = iwl_set_rxon_chain, }; +static struct iwl_ucode_ops iwl4965_ucode = { + .get_header_size = iwl4965_ucode_get_header_size, + .get_build = iwl4965_ucode_get_build, + .get_inst_size = iwl4965_ucode_get_inst_size, + .get_data_size = iwl4965_ucode_get_data_size, + .get_init_size = iwl4965_ucode_get_init_size, + .get_init_data_size = iwl4965_ucode_get_init_data_size, + .get_boot_size = iwl4965_ucode_get_boot_size, + .get_data = iwl4965_ucode_get_data, +}; static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = { .get_hcmd_size = iwl4965_get_hcmd_size, .build_addsta_hcmd = iwl4965_build_addsta_hcmd, @@ -2287,6 +2325,7 @@ }; static struct iwl_ops iwl4965_ops = { + .ucode = &iwl4965_ucode, .lib = &iwl4965_lib, .hcmd = &iwl4965_hcmd, .utils = &iwl4965_hcmd_utils, --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-agn-rs.c @@ -415,6 +415,15 @@ else if (tid == IWL_AGG_ALL_TID) for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); + if (priv->cfg->use_rts_for_ht) { + /* + * switch to RTS/CTS if it is the prefer protection method + * for HT traffic + */ + IWL_DEBUG_HT(priv, "use RTS/CTS protection for HT\n"); + priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN; + iwlcore_commit_rxon(priv); + } } static inline int get_num_of_ant_from_rate(u32 rate_n_flags) --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-eeprom.h @@ -180,8 +180,14 @@ #define EEPROM_5050_EEPROM_VERSION (0x21E) /* OTP */ -#define OTP_LOWER_BLOCKS_TOTAL (3) -#define OTP_BLOCK_SIZE (0x400) +/* lower blocks contain EEPROM image and calibration data */ +#define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */ +/* high blocks contain PAPD data */ +#define OTP_HIGH_IMAGE_SIZE_6x00 (6 * 512 * sizeof(u16)) /* 6 KB */ +#define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */ +#define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */ +#define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */ +#define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */ /* 2.4 GHz */ extern const u8 iwl_eeprom_band_1[14]; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-5000.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-5000.c @@ -239,6 +239,13 @@ APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); + if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_1000) { + /* Setting digital SVR for 1000 card to 1.32V */ + iwl_set_bits_mask_prph(priv, APMG_DIGITAL_SVR_REG, + APMG_SVR_DIGITAL_VOLTAGE_1_32, + ~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK); + } + spin_unlock_irqrestore(&priv->lock, flags); } @@ -1426,6 +1433,44 @@ return max_rssi - agc - IWL49_RSSI_OFFSET; } +#define IWL5000_UCODE_GET(item) \ +static u32 iwl5000_ucode_get_##item(const struct iwl_ucode_header *ucode,\ + u32 api_ver) \ +{ \ + if (api_ver <= 2) \ + return le32_to_cpu(ucode->u.v1.item); \ + return le32_to_cpu(ucode->u.v2.item); \ +} + +static u32 iwl5000_ucode_get_header_size(u32 api_ver) +{ + if (api_ver <= 2) + return UCODE_HEADER_SIZE(1); + return UCODE_HEADER_SIZE(2); +} + +static u32 iwl5000_ucode_get_build(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + if (api_ver <= 2) + return 0; + return le32_to_cpu(ucode->u.v2.build); +} + +static u8 *iwl5000_ucode_get_data(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + if (api_ver <= 2) + return (u8 *) ucode->u.v1.data; + return (u8 *) ucode->u.v2.data; +} + +IWL5000_UCODE_GET(inst_size); +IWL5000_UCODE_GET(data_size); +IWL5000_UCODE_GET(init_size); +IWL5000_UCODE_GET(init_data_size); +IWL5000_UCODE_GET(boot_size); + struct iwl_hcmd_ops iwl5000_hcmd = { .rxon_assoc = iwl5000_send_rxon_assoc, .commit_rxon = iwl_commit_rxon, @@ -1441,6 +1486,17 @@ .calc_rssi = iwl5000_calc_rssi, }; +struct iwl_ucode_ops iwl5000_ucode = { + .get_header_size = iwl5000_ucode_get_header_size, + .get_build = iwl5000_ucode_get_build, + .get_inst_size = iwl5000_ucode_get_inst_size, + .get_data_size = iwl5000_ucode_get_data_size, + .get_init_size = iwl5000_ucode_get_init_size, + .get_init_data_size = iwl5000_ucode_get_init_data_size, + .get_boot_size = iwl5000_ucode_get_boot_size, + .get_data = iwl5000_ucode_get_data, +}; + struct iwl_lib_ops iwl5000_lib = { .set_hw_params = iwl5000_hw_set_hw_params, .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl, @@ -1542,12 +1598,14 @@ }; struct iwl_ops iwl5000_ops = { + .ucode = &iwl5000_ucode, .lib = &iwl5000_lib, .hcmd = &iwl5000_hcmd, .utils = &iwl5000_hcmd_utils, }; static struct iwl_ops iwl5150_ops = { + .ucode = &iwl5000_ucode, .lib = &iwl5150_lib, .hcmd = &iwl5000_hcmd, .utils = &iwl5000_hcmd_utils, --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl3945-base.c @@ -1196,6 +1196,7 @@ struct iwl_rx_queue *rxq = &priv->rxq; struct list_head *element; struct iwl_rx_mem_buffer *rxb; + struct sk_buff *skb; unsigned long flags; while (1) { @@ -1205,25 +1206,39 @@ spin_unlock_irqrestore(&rxq->lock, flags); return; } - - element = rxq->rx_used.next; - rxb = list_entry(element, struct iwl_rx_mem_buffer, list); - list_del(element); spin_unlock_irqrestore(&rxq->lock, flags); + if (rxq->free_count > RX_LOW_WATERMARK) + priority |= __GFP_NOWARN; /* Alloc a new receive buffer */ - rxb->skb = - alloc_skb(priv->hw_params.rx_buf_size, - priority); - if (!rxb->skb) { + skb = alloc_skb(priv->hw_params.rx_buf_size, priority); + if (!skb) { if (net_ratelimit()) - IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); + IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n"); + if ((rxq->free_count <= RX_LOW_WATERMARK) && + net_ratelimit()) + IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", + priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", + rxq->free_count); /* We don't reschedule replenish work here -- we will * call the restock method and if it still needs * more buffers it will schedule replenish */ break; } + spin_lock_irqsave(&rxq->lock, flags); + if (list_empty(&rxq->rx_used)) { + spin_unlock_irqrestore(&rxq->lock, flags); + dev_kfree_skb_any(skb); + return; + } + element = rxq->rx_used.next; + rxb = list_entry(element, struct iwl_rx_mem_buffer, list); + list_del(element); + spin_unlock_irqrestore(&rxq->lock, flags); + + rxb->skb = skb; + /* If radiotap head is required, reserve some headroom here. * The physical head count is a variable rx_stats->phy_count. * We reserve 4 bytes here. Plus these extra bytes, the @@ -2111,7 +2126,7 @@ */ static int iwl3945_read_ucode(struct iwl_priv *priv) { - struct iwl_ucode *ucode; + const struct iwl_ucode_header *ucode; int ret = -EINVAL, index; const struct firmware *ucode_raw; /* firmware file name contains uCode/driver compatibility version */ @@ -2152,22 +2167,24 @@ goto error; /* Make sure that we got at least our header! */ - if (ucode_raw->size < sizeof(*ucode)) { + if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) { IWL_ERR(priv, "File size way too small!\n"); ret = -EINVAL; goto err_release; } /* Data from ucode file: header followed by uCode images */ - ucode = (void *)ucode_raw->data; + ucode = (struct iwl_ucode_header *)ucode_raw->data; priv->ucode_ver = le32_to_cpu(ucode->ver); api_ver = IWL_UCODE_API(priv->ucode_ver); - inst_size = le32_to_cpu(ucode->inst_size); - data_size = le32_to_cpu(ucode->data_size); - init_size = le32_to_cpu(ucode->init_size); - init_data_size = le32_to_cpu(ucode->init_data_size); - boot_size = le32_to_cpu(ucode->boot_size); + inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver); + data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver); + init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver); + init_data_size = + priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver); + boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver); + src = priv->cfg->ops->ucode->get_data(ucode, api_ver); /* api_ver should match the api version forming part of the * firmware filename ... but we don't check for that and only rely @@ -2208,12 +2225,13 @@ /* Verify size of file vs. image size info in file's header */ - if (ucode_raw->size < sizeof(*ucode) + + if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) + inst_size + data_size + init_size + init_data_size + boot_size) { - IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n", - ucode_raw->size); + IWL_DEBUG_INFO(priv, + "uCode file size %zd does not match expected size\n", + ucode_raw->size); ret = -EINVAL; goto err_release; } @@ -2296,44 +2314,44 @@ /* Copy images into buffers for card's bus-master reads ... */ /* Runtime instructions (first block of data in file) */ - src = &ucode->data[0]; - len = priv->ucode_code.len; + len = inst_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %zd\n", len); memcpy(priv->ucode_code.v_addr, src, len); + src += len; + IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); /* Runtime data (2nd block) * NOTE: Copy into backup buffer will be done in iwl3945_up() */ - src = &ucode->data[inst_size]; - len = priv->ucode_data.len; + len = data_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %zd\n", len); memcpy(priv->ucode_data.v_addr, src, len); memcpy(priv->ucode_data_backup.v_addr, src, len); + src += len; /* Initialization instructions (3rd block) */ if (init_size) { - src = &ucode->data[inst_size + data_size]; - len = priv->ucode_init.len; + len = init_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %zd\n", len); memcpy(priv->ucode_init.v_addr, src, len); + src += len; } /* Initialization data (4th block) */ if (init_data_size) { - src = &ucode->data[inst_size + data_size + init_size]; - len = priv->ucode_init_data.len; + len = init_data_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %zd\n", len); memcpy(priv->ucode_init_data.v_addr, src, len); + src += len; } /* Bootstrap instructions (5th block) */ - src = &ucode->data[inst_size + data_size + init_size + init_data_size]; - len = priv->ucode_boot.len; + len = boot_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %zd\n", len); memcpy(priv->ucode_boot.v_addr, src, len); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-1000.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-1000.c @@ -46,7 +46,7 @@ #include "iwl-5000-hw.h" /* Highest firmware API version supported */ -#define IWL1000_UCODE_API_MAX 2 +#define IWL1000_UCODE_API_MAX 3 /* Lowest firmware API version supported */ #define IWL1000_UCODE_API_MIN 1 @@ -62,12 +62,15 @@ .ucode_api_min = IWL1000_UCODE_API_MIN, .sku = IWL_SKU_G|IWL_SKU_N, .ops = &iwl5000_ops, - .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, + .eeprom_size = OTP_LOW_IMAGE_SIZE, .eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, .mod_params = &iwl50_mod_params, .valid_tx_ant = ANT_A, .valid_rx_ant = ANT_AB, .need_pll_cfg = true, + .max_ll_items = OTP_MAX_LL_ITEMS_1000, + .shadow_ram_support = false, + .use_rts_for_ht = true, /* use rts/cts protection */ }; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-core.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-core.h @@ -116,6 +116,17 @@ void (*set_ct_kill)(struct iwl_priv *priv); }; +struct iwl_ucode_ops { + u32 (*get_header_size)(u32); + u32 (*get_build)(const struct iwl_ucode_header *, u32); + u32 (*get_inst_size)(const struct iwl_ucode_header *, u32); + u32 (*get_data_size)(const struct iwl_ucode_header *, u32); + u32 (*get_init_size)(const struct iwl_ucode_header *, u32); + u32 (*get_init_data_size)(const struct iwl_ucode_header *, u32); + u32 (*get_boot_size)(const struct iwl_ucode_header *, u32); + u8 * (*get_data)(const struct iwl_ucode_header *, u32); +}; + struct iwl_lib_ops { /* set hw dependent parameters */ int (*set_hw_params)(struct iwl_priv *priv); @@ -171,6 +182,7 @@ }; struct iwl_ops { + const struct iwl_ucode_ops *ucode; const struct iwl_lib_ops *lib; const struct iwl_hcmd_ops *hcmd; const struct iwl_hcmd_utils_ops *utils; @@ -195,6 +207,9 @@ * filename is constructed as fw_name_pre.ucode. * @ucode_api_max: Highest version of uCode API supported by driver. * @ucode_api_min: Lowest version of uCode API supported by driver. + * @max_ll_items: max number of OTP blocks + * @shadow_ram_support: shadow support for OTP memory + * @use_rts_for_ht: use rts/cts protection for HT traffic * * We enable the driver to be backward compatible wrt API version. The * driver specifies which APIs it supports (with @ucode_api_max being the @@ -231,6 +246,9 @@ u8 valid_rx_ant; bool need_pll_cfg; bool use_isr_legacy; + const u16 max_ll_items; + const bool shadow_ram_support; + bool use_rts_for_ht; }; /*************************** --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-tx.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-tx.c @@ -1233,8 +1233,16 @@ return -ENXIO; } + if (priv->stations[sta_id].tid[tid].agg.state == + IWL_EMPTYING_HW_QUEUE_ADDBA) { + IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); + ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid); + priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; + return 0; + } + if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON) - IWL_WARN(priv, "Stopping AGG while state not IWL_AGG_ON\n"); + IWL_WARN(priv, "Stopping AGG while state not ON or starting\n"); tid_data = &priv->stations[sta_id].tid[tid]; ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-agn.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-agn.c @@ -115,9 +115,6 @@ /* always get timestamp with Rx frame */ priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; - /* allow CTS-to-self if possible. this is relevant only for - * 5000, but will not damage 4965 */ - priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; ret = iwl_check_rxon_cmd(priv); if (ret) { @@ -217,6 +214,13 @@ "Could not send WEP static key.\n"); } + /* + * allow CTS-to-self if possible for new association. + * this is relevant only for 5000 series and up, + * but will not damage 4965 + */ + priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; + /* Apply the new configuration * RXON assoc doesn't clear the station table in uCode, */ @@ -1348,7 +1352,7 @@ */ static int iwl_read_ucode(struct iwl_priv *priv) { - struct iwl_ucode *ucode; + struct iwl_ucode_header *ucode; int ret = -EINVAL, index; const struct firmware *ucode_raw; const char *name_pre = priv->cfg->fw_name_pre; @@ -1357,7 +1361,8 @@ char buf[25]; u8 *src; size_t len; - u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; + u32 api_ver, build; + u32 inst_size, data_size, init_size, init_data_size, boot_size; /* Ask kernel firmware_class module to get the boot firmware off disk. * request_firmware() is synchronous, file is in memory on return. */ @@ -1387,23 +1392,26 @@ if (ret < 0) goto error; - /* Make sure that we got at least our header! */ - if (ucode_raw->size < sizeof(*ucode)) { + /* Make sure that we got at least the v1 header! */ + if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) { IWL_ERR(priv, "File size way too small!\n"); ret = -EINVAL; goto err_release; } /* Data from ucode file: header followed by uCode images */ - ucode = (void *)ucode_raw->data; + ucode = (struct iwl_ucode_header *)ucode_raw->data; priv->ucode_ver = le32_to_cpu(ucode->ver); api_ver = IWL_UCODE_API(priv->ucode_ver); - inst_size = le32_to_cpu(ucode->inst_size); - data_size = le32_to_cpu(ucode->data_size); - init_size = le32_to_cpu(ucode->init_size); - init_data_size = le32_to_cpu(ucode->init_data_size); - boot_size = le32_to_cpu(ucode->boot_size); + build = priv->cfg->ops->ucode->get_build(ucode, api_ver); + inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver); + data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver); + init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver); + init_data_size = + priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver); + boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver); + src = priv->cfg->ops->ucode->get_data(ucode, api_ver); /* api_ver should match the api version forming part of the * firmware filename ... but we don't check for that and only rely @@ -1429,6 +1437,9 @@ IWL_UCODE_API(priv->ucode_ver), IWL_UCODE_SERIAL(priv->ucode_ver)); + if (build) + IWL_DEBUG_INFO(priv, "Build %u\n", build); + IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", priv->ucode_ver); IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n", @@ -1443,12 +1454,14 @@ boot_size); /* Verify size of file vs. image size info in file's header */ - if (ucode_raw->size < sizeof(*ucode) + + if (ucode_raw->size != + priv->cfg->ops->ucode->get_header_size(api_ver) + inst_size + data_size + init_size + init_data_size + boot_size) { - IWL_DEBUG_INFO(priv, "uCode file size %d too small\n", - (int)ucode_raw->size); + IWL_DEBUG_INFO(priv, + "uCode file size %d does not match expected size\n", + (int)ucode_raw->size); ret = -EINVAL; goto err_release; } @@ -1528,42 +1541,42 @@ /* Copy images into buffers for card's bus-master reads ... */ /* Runtime instructions (first block of data in file) */ - src = &ucode->data[0]; - len = priv->ucode_code.len; + len = inst_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len); memcpy(priv->ucode_code.v_addr, src, len); + src += len; + IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); /* Runtime data (2nd block) * NOTE: Copy into backup buffer will be done in iwl_up() */ - src = &ucode->data[inst_size]; - len = priv->ucode_data.len; + len = data_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len); memcpy(priv->ucode_data.v_addr, src, len); memcpy(priv->ucode_data_backup.v_addr, src, len); + src += len; /* Initialization instructions (3rd block) */ if (init_size) { - src = &ucode->data[inst_size + data_size]; - len = priv->ucode_init.len; + len = init_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n", len); memcpy(priv->ucode_init.v_addr, src, len); + src += len; } /* Initialization data (4th block) */ if (init_data_size) { - src = &ucode->data[inst_size + data_size + init_size]; - len = priv->ucode_init_data.len; + len = init_data_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n", len); memcpy(priv->ucode_init_data.v_addr, src, len); + src += len; } /* Bootstrap instructions (5th block) */ - src = &ucode->data[inst_size + data_size + init_size + init_data_size]; - len = priv->ucode_boot.len; + len = boot_size; IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len); memcpy(priv->ucode_boot.v_addr, src, len); @@ -2206,7 +2219,7 @@ priv->is_open = 0; - if (iwl_is_ready_rf(priv)) { + if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) { /* stop mac, cancel any scan request and clear * RXON_FILTER_ASSOC_MSK BIT */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/iwlwifi/iwl-3945.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/iwlwifi/iwl-3945.c @@ -2784,11 +2784,50 @@ return 0; } +#define IWL3945_UCODE_GET(item) \ +static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode,\ + u32 api_ver) \ +{ \ + return le32_to_cpu(ucode->u.v1.item); \ +} + +static u32 iwl3945_ucode_get_header_size(u32 api_ver) +{ + return UCODE_HEADER_SIZE(1); +} +static u32 iwl3945_ucode_get_build(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + return 0; +} +static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode, + u32 api_ver) +{ + return (u8 *) ucode->u.v1.data; +} + +IWL3945_UCODE_GET(inst_size); +IWL3945_UCODE_GET(data_size); +IWL3945_UCODE_GET(init_size); +IWL3945_UCODE_GET(init_data_size); +IWL3945_UCODE_GET(boot_size); + static struct iwl_hcmd_ops iwl3945_hcmd = { .rxon_assoc = iwl3945_send_rxon_assoc, .commit_rxon = iwl3945_commit_rxon, }; +static struct iwl_ucode_ops iwl3945_ucode = { + .get_header_size = iwl3945_ucode_get_header_size, + .get_build = iwl3945_ucode_get_build, + .get_inst_size = iwl3945_ucode_get_inst_size, + .get_data_size = iwl3945_ucode_get_data_size, + .get_init_size = iwl3945_ucode_get_init_size, + .get_init_data_size = iwl3945_ucode_get_init_data_size, + .get_boot_size = iwl3945_ucode_get_boot_size, + .get_data = iwl3945_ucode_get_data, +}; + static struct iwl_lib_ops iwl3945_lib = { .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd, .txq_free_tfd = iwl3945_hw_txq_free_tfd, @@ -2829,6 +2868,7 @@ }; static struct iwl_ops iwl3945_ops = { + .ucode = &iwl3945_ucode, .lib = &iwl3945_lib, .hcmd = &iwl3945_hcmd, .utils = &iwl3945_hcmd_utils, --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/phy.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/phy.c @@ -740,13 +740,22 @@ AR5K_RF_XPD_GAIN, true); } else { - /* TODO: Set high and low gain bits */ - ath5k_hw_rfb_op(ah, rf_regs, - ee->ee_x_gain[ee_mode], + u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; + if (ee->ee_pd_gains[ee_mode] > 1) { + ath5k_hw_rfb_op(ah, rf_regs, + pdg_curve_to_idx[0], AR5K_RF_PD_GAIN_LO, true); - ath5k_hw_rfb_op(ah, rf_regs, - ee->ee_x_gain[ee_mode], + ath5k_hw_rfb_op(ah, rf_regs, + pdg_curve_to_idx[1], AR5K_RF_PD_GAIN_HI, true); + } else { + ath5k_hw_rfb_op(ah, rf_regs, + pdg_curve_to_idx[0], + AR5K_RF_PD_GAIN_LO, true); + ath5k_hw_rfb_op(ah, rf_regs, + pdg_curve_to_idx[0], + AR5K_RF_PD_GAIN_HI, true); + } /* Lower synth voltage on Rev 2 */ ath5k_hw_rfb_op(ah, rf_regs, 2, @@ -1897,8 +1906,9 @@ s16 min_pwrL, min_pwrR; s16 pwr_i; - if (WARN_ON(stepL[0] == stepL[1] || stepR[0] == stepR[1])) - return 0; + /* Some vendors write the same pcdac value twice !!! */ + if (stepL[0] == stepL[1] || stepR[0] == stepR[1]) + return max(pwrL[0], pwrR[0]); if (pwrL[0] == pwrL[1]) min_pwrL = pwrL[0]; @@ -2921,8 +2931,6 @@ ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); return -EINVAL; } - if (txpower == 0) - txpower = AR5K_TUNE_DEFAULT_TXPOWER; /* Reset TX power values */ memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower)); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/eeprom.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/eeprom.h @@ -34,6 +34,14 @@ #define AR5K_EEPROM_RFKILL_POLARITY_S 1 #define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ + +/* FLASH(EEPROM) Defines for AR531X chips */ +#define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */ +#define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */ +#define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0 +#define AR5K_EEPROM_SIZE_UPPER_SHIFT 4 +#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12 + #define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ #define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ #define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE) --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/eeprom.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/eeprom.c @@ -97,6 +97,7 @@ struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; int ret; u16 val; + u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; /* * Read values from EEPROM and store them in the capability structure @@ -111,20 +112,44 @@ if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0) return 0; -#ifdef notyet /* * Validate the checksum of the EEPROM date. There are some * devices with invalid EEPROMs. */ - for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) { + AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val); + if (val) { + eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) << + AR5K_EEPROM_SIZE_ENDLOC_SHIFT; + AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val); + eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE; + + /* + * Fail safe check to prevent stupid loops due + * to busted EEPROMs. XXX: This value is likely too + * big still, waiting on a better value. + */ + if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) { + ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: " + "%d (0x%04x) max expected: %d (0x%04x)\n", + eep_max, eep_max, + 3 * AR5K_EEPROM_INFO_MAX, + 3 * AR5K_EEPROM_INFO_MAX); + return -EIO; + } + } + + for (cksum = 0, offset = 0; offset < eep_max; offset++) { AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); cksum ^= val; } if (cksum != AR5K_EEPROM_INFO_CKSUM) { - ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); + ATH5K_ERR(ah->ah_sc, "Invalid EEPROM " + "checksum: 0x%04x eep_max: 0x%04x (%s)\n", + cksum, eep_max, + eep_max == AR5K_EEPROM_INFO_MAX ? + "default size" : "custom size"); return -EIO; } -#endif AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version), ee_ant_gain); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/reset.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/reset.c @@ -258,29 +258,35 @@ if (!set_chip) goto commit; - /* Preserve sleep duration */ data = ath5k_hw_reg_read(ah, AR5K_SLEEP_CTL); + + /* If card is down we 'll get 0xffff... so we + * need to clean this up before we write the register + */ if (data & 0xffc00000) data = 0; else - data = data & 0xfffcffff; + /* Preserve sleep duration etc */ + data = data & ~AR5K_SLEEP_CTL_SLE; - ath5k_hw_reg_write(ah, data, AR5K_SLEEP_CTL); + ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE, + AR5K_SLEEP_CTL); udelay(15); - for (i = 50; i > 0; i--) { + for (i = 200; i > 0; i--) { /* Check if the chip did wake up */ if ((ath5k_hw_reg_read(ah, AR5K_PCICFG) & AR5K_PCICFG_SPWR_DN) == 0) break; /* Wait a bit and retry */ - udelay(200); - ath5k_hw_reg_write(ah, data, AR5K_SLEEP_CTL); + udelay(50); + ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE, + AR5K_SLEEP_CTL); } /* Fail if the chip didn't wake up */ - if (i <= 0) + if (i == 0) return -EIO; break; @@ -297,6 +303,64 @@ } /* + * Put device on hold + * + * Put MAC and Baseband on warm reset and + * keep that state (don't clean sleep control + * register). After this MAC and Baseband are + * disabled and a full reset is needed to come + * back. This way we save as much power as possible + * without puting the card on full sleep. + */ +int ath5k_hw_on_hold(struct ath5k_hw *ah) +{ + struct pci_dev *pdev = ah->ah_sc->pdev; + u32 bus_flags; + int ret; + + /* Make sure device is awake */ + ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); + if (ret) { + ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); + return ret; + } + + /* + * Put chipset on warm reset... + * + * Note: puting PCI core on warm reset on PCI-E cards + * results card to hang and always return 0xffff... so + * we ingore that flag for PCI-E cards. On PCI cards + * this flag gets cleared after 64 PCI clocks. + */ + bus_flags = (pdev->is_pcie) ? 0 : AR5K_RESET_CTL_PCI; + + if (ah->ah_version == AR5K_AR5210) { + ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | + AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA | + AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI); + mdelay(2); + } else { + ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | + AR5K_RESET_CTL_BASEBAND | bus_flags); + } + + if (ret) { + ATH5K_ERR(ah->ah_sc, "failed to put device on warm reset\n"); + return -EIO; + } + + /* ...wakeup again!*/ + ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); + if (ret) { + ATH5K_ERR(ah->ah_sc, "failed to put device on hold\n"); + return ret; + } + + return ret; +} + +/* * Bring up MAC + PHY Chips and program PLL * TODO: Half/Quarter rate support */ @@ -319,6 +383,50 @@ return ret; } + /* + * Put chipset on warm reset... + * + * Note: puting PCI core on warm reset on PCI-E cards + * results card to hang and always return 0xffff... so + * we ingore that flag for PCI-E cards. On PCI cards + * this flag gets cleared after 64 PCI clocks. + */ + bus_flags = (pdev->is_pcie) ? 0 : AR5K_RESET_CTL_PCI; + + if (ah->ah_version == AR5K_AR5210) { + ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | + AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA | + AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI); + mdelay(2); + } else { + ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | + AR5K_RESET_CTL_BASEBAND | bus_flags); + } + + if (ret) { + ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n"); + return -EIO; + } + + /* ...wakeup again!...*/ + ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); + if (ret) { + ATH5K_ERR(ah->ah_sc, "failed to resume the MAC Chip\n"); + return ret; + } + + /* ...clear reset control register and pull device out of + * warm reset */ + if (ath5k_hw_nic_reset(ah, 0)) { + ATH5K_ERR(ah->ah_sc, "failed to warm reset the MAC Chip\n"); + return -EIO; + } + + /* On initialization skip PLL programming since we don't have + * a channel / mode set yet */ + if (initial) + return 0; + if (ah->ah_version != AR5K_AR5210) { /* * Get channel mode flags @@ -384,39 +492,6 @@ AR5K_PHY_TURBO); } - /* reseting PCI on PCI-E cards results card to hang - * and always return 0xffff... so we ingore that flag - * for PCI-E cards */ - bus_flags = (pdev->is_pcie) ? 0 : AR5K_RESET_CTL_PCI; - - /* Reset chipset */ - if (ah->ah_version == AR5K_AR5210) { - ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | - AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA | - AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI); - mdelay(2); - } else { - ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | - AR5K_RESET_CTL_BASEBAND | bus_flags); - } - if (ret) { - ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n"); - return -EIO; - } - - /* ...wakeup again!*/ - ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); - if (ret) { - ATH5K_ERR(ah->ah_sc, "failed to resume the MAC Chip\n"); - return ret; - } - - /* ...final warm reset */ - if (ath5k_hw_nic_reset(ah, 0)) { - ATH5K_ERR(ah->ah_sc, "failed to warm reset the MAC Chip\n"); - return -EIO; - } - if (ah->ah_version != AR5K_AR5210) { /* ...update PLL if needed */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/ath5k.h +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/ath5k.h @@ -1164,6 +1164,7 @@ /* Reset Functions */ extern int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial); +extern int ath5k_hw_on_hold(struct ath5k_hw *ah); extern int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, struct ieee80211_channel *channel, bool change_channel); /* Power management functions */ extern int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, bool set_chip, u16 sleep_duration); --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/base.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/base.c @@ -666,7 +666,6 @@ ath5k_led_off(sc); - free_irq(pdev->irq, sc); pci_save_state(pdev); pci_disable_device(pdev); pci_set_power_state(pdev, PCI_D3hot); @@ -694,18 +693,8 @@ */ pci_write_config_byte(pdev, 0x41, 0); - err = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); - if (err) { - ATH5K_ERR(sc, "request_irq failed\n"); - goto err_no_irq; - } - ath5k_led_enable(sc); return 0; - -err_no_irq: - pci_disable_device(pdev); - return err; } #endif /* CONFIG_PM */ @@ -2445,27 +2434,29 @@ ret = ath5k_stop_locked(sc); if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) { /* - * Set the chip in full sleep mode. Note that we are - * careful to do this only when bringing the interface - * completely to a stop. When the chip is in this state - * it must be carefully woken up or references to - * registers in the PCI clock domain may freeze the bus - * (and system). This varies by chip and is mostly an - * issue with newer parts that go to sleep more quickly. - */ - if (sc->ah->ah_mac_srev >= 0x78) { - /* - * XXX - * don't put newer MAC revisions > 7.8 to sleep because - * of the above mentioned problems - */ - ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mac version > 7.8, " - "not putting device to sleep\n"); - } else { - ATH5K_DBG(sc, ATH5K_DEBUG_RESET, - "putting device to full sleep\n"); - ath5k_hw_set_power(sc->ah, AR5K_PM_FULL_SLEEP, true, 0); - } + * Don't set the card in full sleep mode! + * + * a) When the device is in this state it must be carefully + * woken up or references to registers in the PCI clock + * domain may freeze the bus (and system). This varies + * by chip and is mostly an issue with newer parts + * (madwifi sources mentioned srev >= 0x78) that go to + * sleep more quickly. + * + * b) On older chips full sleep results a weird behaviour + * during wakeup. I tested various cards with srev < 0x78 + * and they don't wake up after module reload, a second + * module reload is needed to bring the card up again. + * + * Until we figure out what's going on don't enable + * full chip reset on any chip (this is what Legacy HAL + * and Sam's HAL do anyway). Instead Perform a full reset + * on the device (same as initial state after attach) and + * leave it idle (keep MAC/BB on warm reset) */ + ret = ath5k_hw_on_hold(sc->ah); + + ATH5K_DBG(sc, ATH5K_DEBUG_RESET, + "putting device to sleep\n"); } ath5k_txbuf_free(sc, sc->bbuf); @@ -2676,7 +2667,7 @@ sc->curchan = chan; sc->curband = &sc->sbands[chan->band]; } - ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, true); + ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, chan != NULL); if (ret) { ATH5K_ERR(sc, "can't reset hardware (%d)\n", ret); goto err; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ath5k/attach.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ath5k/attach.c @@ -145,7 +145,7 @@ goto err_free; /* Bring device out of sleep and reset it's units */ - ret = ath5k_hw_nic_wakeup(ah, CHANNEL_B, true); + ret = ath5k_hw_nic_wakeup(ah, 0, true); if (ret) goto err_free; --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/ath/ar9170/usb.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/ath/ar9170/usb.c @@ -64,6 +64,8 @@ { USB_DEVICE(0x0cf3, 0x9170) }, /* Atheros TG121N */ { USB_DEVICE(0x0cf3, 0x1001) }, + /* TP-Link TL-WN821N v2 */ + { USB_DEVICE(0x0cf3, 0x1002) }, /* Cace Airpcap NX */ { USB_DEVICE(0xcace, 0x0300) }, /* D-Link DWA 160A */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/wireless/b43legacy/rfkill.c +++ linux-fsl-imx51-2.6.31/drivers/net/wireless/b43legacy/rfkill.c @@ -34,6 +34,13 @@ & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK)) return 1; } else { + /* To prevent CPU fault on PPC, do not read a register + * unless the interface is started; however, on resume + * for hibernation, this routine is entered early. When + * that happens, unconditionally return TRUE. + */ + if (b43legacy_status(dev) < B43legacy_STAT_STARTED) + return 1; if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO) & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK) return 1; --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000e/hw.h +++ linux-fsl-imx51-2.6.31/drivers/net/e1000e/hw.h @@ -368,6 +368,7 @@ #define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 #define E1000_DEV_ID_ICH9_IGP_M 0x10BF #define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB +#define E1000_DEV_ID_ICH9_IGP_M_V_2 0x10BE #define E1000_DEV_ID_ICH9_IGP_C 0x294C #define E1000_DEV_ID_ICH9_IFE 0x10C0 #define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000e/netdev.c +++ linux-fsl-imx51-2.6.31/drivers/net/e1000e/netdev.c @@ -482,14 +482,24 @@ length = le16_to_cpu(rx_desc->length); - /* !EOP means multiple descriptors were used to store a single - * packet, also make sure the frame isn't just CRC only */ - if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) { + /* + * !EOP means multiple descriptors were used to store a single + * packet, if that's the case we need to toss it. In fact, we + * need to toss every packet with the EOP bit clear and the + * next frame that _does_ have the EOP bit set, as it is by + * definition only a frame fragment + */ + if (unlikely(!(status & E1000_RXD_STAT_EOP))) + adapter->flags2 |= FLAG2_IS_DISCARDING; + + if (adapter->flags2 & FLAG2_IS_DISCARDING) { /* All receives must fit into a single buffer */ e_dbg("%s: Receive packet consumed multiple buffers\n", netdev->name); /* recycle */ buffer_info->skb = skb; + if (status & E1000_RXD_STAT_EOP) + adapter->flags2 &= ~FLAG2_IS_DISCARDING; goto next_desc; } @@ -747,10 +757,16 @@ PCI_DMA_FROMDEVICE); buffer_info->dma = 0; - if (!(staterr & E1000_RXD_STAT_EOP)) { + /* see !EOP comment in other rx routine */ + if (!(staterr & E1000_RXD_STAT_EOP)) + adapter->flags2 |= FLAG2_IS_DISCARDING; + + if (adapter->flags2 & FLAG2_IS_DISCARDING) { e_dbg("%s: Packet Split buffers didn't pick up the " "full packet\n", netdev->name); dev_kfree_skb_irq(skb); + if (staterr & E1000_RXD_STAT_EOP) + adapter->flags2 &= ~FLAG2_IS_DISCARDING; goto next_desc; } @@ -1120,6 +1136,7 @@ rx_ring->next_to_clean = 0; rx_ring->next_to_use = 0; + adapter->flags2 &= ~FLAG2_IS_DISCARDING; writel(0, adapter->hw.hw_addr + rx_ring->head); writel(0, adapter->hw.hw_addr + rx_ring->tail); @@ -2330,18 +2347,6 @@ rctl &= ~E1000_RCTL_SZ_4096; rctl |= E1000_RCTL_BSEX; switch (adapter->rx_buffer_len) { - case 256: - rctl |= E1000_RCTL_SZ_256; - rctl &= ~E1000_RCTL_BSEX; - break; - case 512: - rctl |= E1000_RCTL_SZ_512; - rctl &= ~E1000_RCTL_BSEX; - break; - case 1024: - rctl |= E1000_RCTL_SZ_1024; - rctl &= ~E1000_RCTL_BSEX; - break; case 2048: default: rctl |= E1000_RCTL_SZ_2048; @@ -4301,13 +4306,7 @@ * fragmented skbs */ - if (max_frame <= 256) - adapter->rx_buffer_len = 256; - else if (max_frame <= 512) - adapter->rx_buffer_len = 512; - else if (max_frame <= 1024) - adapter->rx_buffer_len = 1024; - else if (max_frame <= 2048) + if (max_frame <= 2048) adapter->rx_buffer_len = 2048; else adapter->rx_buffer_len = 4096; @@ -4985,7 +4984,7 @@ /* AER (Advanced Error Reporting) hooks */ err = pci_enable_pcie_error_reporting(pdev); if (err) { - dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed " + dev_notice(&pdev->dev, "pci_enable_pcie_error_reporting failed " "0x%x\n", err); /* non-fatal, continue */ } @@ -5365,6 +5364,7 @@ { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, + { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V_2), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000e/e1000.h +++ linux-fsl-imx51-2.6.31/drivers/net/e1000e/e1000.h @@ -401,6 +401,7 @@ /* CRC Stripping defines */ #define FLAG2_CRC_STRIPPING (1 << 0) #define FLAG2_HAS_PHY_WAKEUP (1 << 1) +#define FLAG2_IS_DISCARDING (1 << 2) #define E1000_RX_DESC_PS(R, i) \ (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) --- linux-fsl-imx51-2.6.31.orig/drivers/net/e1000e/82571.c +++ linux-fsl-imx51-2.6.31/drivers/net/e1000e/82571.c @@ -1803,7 +1803,7 @@ | FLAG_HAS_AMT | FLAG_HAS_CTRLEXT_ON_LOAD, .pba = 20, - .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, + .max_hw_frame_size = DEFAULT_JUMBO, .get_variants = e1000_get_variants_82571, .mac_ops = &e82571_mac_ops, .phy_ops = &e82_phy_ops_bm, @@ -1820,7 +1820,7 @@ | FLAG_HAS_AMT | FLAG_HAS_CTRLEXT_ON_LOAD, .pba = 20, - .max_hw_frame_size = DEFAULT_JUMBO, + .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, .get_variants = e1000_get_variants_82571, .mac_ops = &e82571_mac_ops, .phy_ops = &e82_phy_ops_bm, --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/net/can/Kconfig @@ -84,4 +84,13 @@ a problem with CAN support and want to see more of what is going on. +config CAN_FLEXCAN + tristate "Freescale FlexCAN" + depends on CAN && (ARCH_MX25 || ARCH_MX35) + default m + ---help--- + This select the support of Freescale CAN(FlexCAN). + This driver can also be built as a module. + If unsure, say N. + endmenu --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/vcan.c +++ linux-fsl-imx51-2.6.31/drivers/net/can/vcan.c @@ -80,7 +80,7 @@ skb->dev = dev; skb->ip_summed = CHECKSUM_UNNECESSARY; - netif_rx(skb); + netif_rx_ni(skb); } static int vcan_tx(struct sk_buff *skb, struct net_device *dev) --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/Makefile +++ linux-fsl-imx51-2.6.31/drivers/net/can/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_CAN_VCAN) += vcan.o +obj-$(CONFIG_CAN_FLEXCAN) += flexcan/ obj-$(CONFIG_CAN_DEV) += can-dev.o can-dev-y := dev.o --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/flexcan/flexcan.h +++ linux-fsl-imx51-2.6.31/drivers/net/can/flexcan/flexcan.h @@ -0,0 +1,223 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file flexcan.h + * + * @brief FlexCan definitions. + * + * @ingroup can + */ + +#ifndef __CAN_FLEXCAN_H__ +#define __CAN_FLEXCAN_H__ + +#include +#include +#include +#include +#include +#include +#include + +#define FLEXCAN_DEVICE_NAME "FlexCAN" + +struct can_mb_cs { + unsigned int time_stamp:16; + unsigned int length:4; + unsigned int rtr:1; + unsigned int ide:1; + unsigned int srr:1; + unsigned int nouse1:1; + unsigned int code:4; + unsigned int nouse2:4; +}; + +#define CAN_MB_RX_INACTIVE 0x0 +#define CAN_MB_RX_EMPTY 0x4 +#define CAN_MB_RX_FULL 0x2 +#define CAN_MB_RX_OVERRUN 0x6 +#define CAN_MB_RX_BUSY 0x1 + +#define CAN_MB_TX_INACTIVE 0x8 +#define CAN_MB_TX_ABORT 0x9 +#define CAN_MB_TX_ONCE 0xC +#define CAN_MB_TX_REMOTE 0xA + +struct can_hw_mb { + union { + struct can_mb_cs cs; + unsigned int data; + } mb_cs; + unsigned int mb_id; + unsigned char mb_data[8]; +}; + +#define CAN_HW_REG_MCR 0x00 +#define CAN_HW_REG_CTRL 0x04 +#define CAN_HW_REG_TIMER 0x08 +#define CAN_HW_REG_RXGMASK 0x10 +#define CAN_HW_REG_RX14MASK 0x14 +#define CAN_HW_REG_RX15MASK 0x18 +#define CAN_HW_REG_ECR 0x1C +#define CAN_HW_REG_ESR 0x20 +#define CAN_HW_REG_IMASK2 0x24 +#define CAN_HW_REG_IMASK1 0x28 +#define CAN_HW_REG_IFLAG2 0x2C +#define CAN_HW_REG_IFLAG1 0x30 + +#define CAN_MB_BASE 0x0080 +#define CAN_RXMASK_BASE 0x0880 +#define CAN_FIFO_BASE 0xE0 + +#define __MCR_MDIS (1 << 31) +#define __MCR_FRZ (1 << 30) +#define __MCR_FEN (1 << 29) +#define __MCR_HALT (1 << 28) +#define __MCR_NOTRDY (1 << 27) +#define __MCR_WAK_MSK (1 << 26) +#define __MCR_SOFT_RST (1 << 25) +#define __MCR_FRZ_ACK (1 << 24) +#define __MCR_SLF_WAK (1 << 22) +#define __MCR_WRN_EN (1 << 21) +#define __MCR_LPM_ACK (1 << 20) +#define __MCR_WAK_SRC (1 << 19) +#define __MCR_DOZE (1 << 18) +#define __MCR_SRX_DIS (1 << 17) +#define __MCR_BCC (1 << 16) +#define __MCR_LPRIO_EN (1 << 13) +#define __MCR_AEN (1 << 12) +#define __MCR_MAX_IDAM_OFFSET 8 +#define __MCR_MAX_IDAM_MASK (0x3 << __MCR_MAX_IDAM_OFFSET) +#define __MCR_MAX_IDAM_A (0x0 << __MCR_MAX_IDAM_OFFSET) +#define __MCR_MAX_IDAM_B (0x1 << __MCR_MAX_IDAM_OFFSET) +#define __MCR_MAX_IDAM_C (0x2 << __MCR_MAX_IDAM_OFFSET) +#define __MCR_MAX_IDAM_D (0x3 << __MCR_MAX_IDAM_OFFSET) +#define __MCR_MAX_MB_OFFSET 0 +#define __MCR_MAX_MB_MASK (0x3F) + +#define __CTRL_PRESDIV_OFFSET 24 +#define __CTRL_PRESDIV_MASK (0xFF << __CTRL_PRESDIV_OFFSET) +#define __CTRL_RJW_OFFSET 22 +#define __CTRL_RJW_MASK (0x3 << __CTRL_RJW_OFFSET) +#define __CTRL_PSEG1_OFFSET 19 +#define __CTRL_PSEG1_MASK (0x7 << __CTRL_PSEG1_OFFSET) +#define __CTRL_PSEG2_OFFSET 16 +#define __CTRL_PSEG2_MASK (0x7 << __CTRL_PSEG2_OFFSET) +#define __CTRL_BOFF_MSK (0x1 << 15) +#define __CTRL_ERR_MSK (0x1 << 14) +#define __CTRL_CLK_SRC (0x1 << 13) +#define __CTRL_LPB (0x1 << 12) +#define __CTRL_TWRN_MSK (0x1 << 11) +#define __CTRL_RWRN_MSK (0x1 << 10) +#define __CTRL_SMP (0x1 << 7) +#define __CTRL_BOFF_REC (0x1 << 6) +#define __CTRL_TSYN (0x1 << 5) +#define __CTRL_LBUF (0x1 << 4) +#define __CTRL_LOM (0x1 << 3) +#define __CTRL_PROPSEG_OFFSET 0 +#define __CTRL_PROPSEG_MASK (0x7) + +#define __ECR_TX_ERR_COUNTER(x) ((x) & 0xFF) +#define __ECR_RX_ERR_COUNTER(x) (((x) >> 8) & 0xFF) +#define __ECR_PASSIVE_THRESHOLD 128 +#define __ECR_ACTIVE_THRESHOLD 96 + +#define __ESR_TWRN_INT (0x1 << 17) +#define __ESR_RWRN_INT (0x1 << 16) +#define __ESR_BIT1_ERR (0x1 << 15) +#define __ESR_BIT0_ERR (0x1 << 14) +#define __ESR_ACK_ERR (0x1 << 13) +#define __ESR_CRC_ERR (0x1 << 12) +#define __ESR_FRM_ERR (0x1 << 11) +#define __ESR_STF_ERR (0x1 << 10) +#define __ESR_TX_WRN (0x1 << 9) +#define __ESR_RX_WRN (0x1 << 8) +#define __ESR_IDLE (0x1 << 7) +#define __ESR_TXRX (0x1 << 6) +#define __ESR_FLT_CONF_OFF 4 +#define __ESR_FLT_CONF_MASK (0x3 << __ESR_FLT_CONF_OFF) +#define __ESR_BOFF_INT (0x1 << 2) +#define __ESR_ERR_INT (0x1 << 1) +#define __ESR_WAK_INT (0x1) + +#define __ESR_INTERRUPTS (__ESR_WAK_INT | __ESR_ERR_INT | \ + __ESR_BOFF_INT | __ESR_TWRN_INT | \ + __ESR_RWRN_INT) + +#define __FIFO_OV_INT 0x0080 +#define __FIFO_WARN_INT 0x0040 +#define __FIFO_RDY_INT 0x0020 + +struct flexcan_device { + struct mutex mutex; + void *io_base; + struct can_hw_mb *hwmb; + unsigned int *rx_mask; + unsigned int xmit_mb; + unsigned int bitrate; + /* word 1 */ + unsigned int br_presdiv:8; + unsigned int br_rjw:2; + unsigned int br_propseg:3; + unsigned int br_pseg1:3; + unsigned int br_pseg2:3; + unsigned int maxmb:6; + unsigned int xmit_maxmb:6; + unsigned int wd1_resv:1; + + /* word 2 */ + unsigned int fifo:1; + unsigned int wakeup:1; + unsigned int srx_dis:1; + unsigned int wak_src:1; + unsigned int bcc:1; + unsigned int lprio:1; + unsigned int abort:1; + unsigned int br_clksrc:1; + unsigned int loopback:1; + unsigned int smp:1; + unsigned int boff_rec:1; + unsigned int tsyn:1; + unsigned int listen:1; + + unsigned int ext_msg:1; + unsigned int std_msg:1; + + struct timer_list timer; + struct platform_device *dev; + struct regulator *core_reg; + struct regulator *io_reg; + struct clk *clk; + int irq; +}; + +#define FLEXCAN_MAX_FIFO_MB 8 +#define FLEXCAN_MAX_MB 64 +#define FLEXCAN_MAX_PRESDIV 256 +#define FLEXCAN_MAX_RJW 4 +#define FLEXCAN_MAX_PSEG1 8 +#define FLEXCAN_MAX_PSEG2 8 +#define FLEXCAN_MAX_PROPSEG 8 +#define FLEXCAN_MAX_BITRATE 1000000 + +extern struct net_device *flexcan_device_alloc(struct platform_device *pdev, + void (*setup) (struct net_device + *dev)); +extern void flexcan_device_free(struct platform_device *pdev); + +extern void flexcan_mbm_init(struct flexcan_device *flexcan); +extern void flexcan_mbm_isr(struct net_device *dev); +extern int flexcan_mbm_xmit(struct flexcan_device *flexcan, + struct can_frame *frame); +#endif /* __CAN_FLEXCAN_H__ */ --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/flexcan/mbm.c +++ linux-fsl-imx51-2.6.31/drivers/net/can/flexcan/mbm.c @@ -0,0 +1,347 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mbm.c + * + * @brief Driver for Freescale CAN Controller FlexCAN. + * + * @ingroup can + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "flexcan.h" + +#define flexcan_swab32(x) \ + (((x) << 24) | ((x) >> 24) |\ + (((x) & (__u32)0x0000ff00UL) << 8) |\ + (((x) & (__u32)0x00ff0000UL) >> 8)) + +static inline void flexcan_memcpy(void *dst, void *src, int len) +{ + int i; + unsigned int *d = (unsigned int *)dst, *s = (unsigned int *)src; + len = (len + 3) >> 2; + for (i = 0; i < len; i++, s++, d++) + *d = flexcan_swab32(*s); +} + +static void flexcan_mb_bottom(struct net_device *dev, int index) +{ + struct flexcan_device *flexcan = netdev_priv(dev); + struct net_device_stats *stats = &dev->stats; + struct can_hw_mb *hwmb; + struct can_frame *frame; + struct sk_buff *skb; + unsigned int tmp; + + hwmb = flexcan->hwmb + index; + if (flexcan->fifo || (index >= (flexcan->maxmb - flexcan->xmit_maxmb))) { + if (hwmb->mb_cs.cs.code == CAN_MB_TX_ABORT) + hwmb->mb_cs.cs.code = CAN_MB_TX_INACTIVE; + + if (hwmb->mb_cs.cs.code & CAN_MB_TX_INACTIVE) { + if (netif_queue_stopped(dev)) + netif_start_queue(dev); + return; + } + } + skb = dev_alloc_skb(sizeof(struct can_frame)); + if (skb) { + frame = (struct can_frame *)skb_put(skb, sizeof(*frame)); + memset(frame, 0, sizeof(*frame)); + if (hwmb->mb_cs.cs.ide) + frame->can_id = + (hwmb->mb_id & CAN_EFF_MASK) | CAN_EFF_FLAG; + else + frame->can_id = (hwmb->mb_id >> 18) & CAN_SFF_MASK; + + if (hwmb->mb_cs.cs.rtr) + frame->can_id |= CAN_RTR_FLAG; + + frame->can_dlc = hwmb->mb_cs.cs.length; + + if (frame->can_dlc && frame->can_dlc) + flexcan_memcpy(frame->data, hwmb->mb_data, + frame->can_dlc); + + if (flexcan->fifo + || (index >= (flexcan->maxmb - flexcan->xmit_maxmb))) { + hwmb->mb_cs.cs.code = CAN_MB_TX_INACTIVE; + if (netif_queue_stopped(dev)) + netif_start_queue(dev); + } + + tmp = __raw_readl(flexcan->io_base + CAN_HW_REG_TIMER); + + dev->last_rx = jiffies; + stats->rx_packets++; + stats->rx_bytes += frame->can_dlc; + + skb->dev = dev; + skb->protocol = __constant_htons(ETH_P_CAN); + skb->ip_summed = CHECKSUM_UNNECESSARY; + netif_rx(skb); + } else { + tmp = hwmb->mb_cs.data; + tmp = hwmb->mb_id; + tmp = hwmb->mb_data[0]; + if (flexcan->fifo + || (index >= (flexcan->maxmb - flexcan->xmit_maxmb))) { + + hwmb->mb_cs.cs.code = CAN_MB_TX_INACTIVE; + if (netif_queue_stopped(dev)) + netif_start_queue(dev); + } + tmp = __raw_readl(flexcan->io_base + CAN_HW_REG_TIMER); + stats->rx_dropped++; + } +} + +static void flexcan_fifo_isr(struct net_device *dev, unsigned int iflag1) +{ + struct flexcan_device *flexcan = dev ? netdev_priv(dev) : NULL; + struct net_device_stats *stats = &dev->stats; + struct sk_buff *skb; + struct can_hw_mb *hwmb = flexcan->hwmb; + struct can_frame *frame; + unsigned int tmp; + + if (iflag1 & __FIFO_RDY_INT) { + skb = dev_alloc_skb(sizeof(struct can_frame)); + if (skb) { + frame = + (struct can_frame *)skb_put(skb, sizeof(*frame)); + memset(frame, 0, sizeof(*frame)); + if (hwmb->mb_cs.cs.ide) + frame->can_id = + (hwmb->mb_id & CAN_EFF_MASK) | CAN_EFF_FLAG; + else + frame->can_id = + (hwmb->mb_id >> 18) & CAN_SFF_MASK; + + if (hwmb->mb_cs.cs.rtr) + frame->can_id |= CAN_RTR_FLAG; + + frame->can_dlc = hwmb->mb_cs.cs.length; + + if (frame->can_dlc && (frame->can_dlc <= 8)) + flexcan_memcpy(frame->data, hwmb->mb_data, + frame->can_dlc); + tmp = __raw_readl(flexcan->io_base + CAN_HW_REG_TIMER); + + dev->last_rx = jiffies; + + stats->rx_packets++; + stats->rx_bytes += frame->can_dlc; + + skb->dev = dev; + skb->protocol = __constant_htons(ETH_P_CAN); + skb->ip_summed = CHECKSUM_UNNECESSARY; + netif_rx(skb); + } else { + tmp = hwmb->mb_cs.data; + tmp = hwmb->mb_id; + tmp = hwmb->mb_data[0]; + tmp = __raw_readl(flexcan->io_base + CAN_HW_REG_TIMER); + } + } + + if (iflag1 & (__FIFO_OV_INT | __FIFO_WARN_INT)) { + skb = dev_alloc_skb(sizeof(struct can_frame)); + if (skb) { + frame = + (struct can_frame *)skb_put(skb, sizeof(*frame)); + memset(frame, 0, sizeof(*frame)); + frame->can_id = CAN_ERR_FLAG | CAN_ERR_CRTL; + frame->can_dlc = CAN_ERR_DLC; + if (iflag1 & __FIFO_WARN_INT) + frame->data[1] |= + CAN_ERR_CRTL_TX_WARNING | + CAN_ERR_CRTL_RX_WARNING; + if (iflag1 & __FIFO_OV_INT) + frame->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW; + + skb->dev = dev; + skb->protocol = __constant_htons(ETH_P_CAN); + skb->ip_summed = CHECKSUM_UNNECESSARY; + netif_rx(skb); + } + } +} + +/*! + * @brief The function call by CAN ISR to handle mb events. + * + * @param dev the pointer of network device. + * + * @return none + */ +void flexcan_mbm_isr(struct net_device *dev) +{ + int i, iflag1, iflag2, maxmb; + struct flexcan_device *flexcan = dev ? netdev_priv(dev) : NULL; + + if (flexcan->maxmb > 31) { + maxmb = flexcan->maxmb + 1 - 32; + iflag1 = __raw_readl(flexcan->io_base + CAN_HW_REG_IFLAG1) & + __raw_readl(flexcan->io_base + CAN_HW_REG_IMASK1); + iflag2 = __raw_readl(flexcan->io_base + CAN_HW_REG_IFLAG2) & + __raw_readl(flexcan->io_base + CAN_HW_REG_IMASK2); + iflag2 &= (1 << maxmb) - 1; + maxmb = 32; + } else { + maxmb = flexcan->maxmb + 1; + iflag1 = __raw_readl(flexcan->io_base + CAN_HW_REG_IFLAG1) & + __raw_readl(flexcan->io_base + CAN_HW_REG_IMASK1); + iflag1 &= (1 << maxmb) - 1; + iflag2 = 0; + } + + __raw_writel(iflag1, flexcan->io_base + CAN_HW_REG_IFLAG1); + __raw_writel(iflag2, flexcan->io_base + CAN_HW_REG_IFLAG2); + + if (flexcan->fifo) { + flexcan_fifo_isr(dev, iflag1); + iflag1 &= 0xFFFFFF00; + } + for (i = 0; iflag1 && (i < maxmb); i++) { + if (iflag1 & (1 << i)) { + iflag1 &= ~(1 << i); + flexcan_mb_bottom(dev, i); + } + } + + for (i = maxmb; iflag2 && (i <= flexcan->maxmb); i++) { + if (iflag2 & (1 << (i - 32))) { + iflag2 &= ~(1 << (i - 32)); + flexcan_mb_bottom(dev, i); + } + } +} + +/*! + * @brief function to xmit message buffer + * + * @param flexcan the pointer of can hardware device. + * @param frame the pointer of can message frame. + * + * @return Returns 0 if xmit is success. otherwise returns non-zero. + */ +int flexcan_mbm_xmit(struct flexcan_device *flexcan, struct can_frame *frame) +{ + int i = flexcan->xmit_mb; + struct can_hw_mb *hwmb = flexcan->hwmb; + + do { + if (hwmb[i].mb_cs.cs.code == CAN_MB_TX_INACTIVE) + break; + if ((++i) > flexcan->maxmb) { + if (flexcan->fifo) + i = FLEXCAN_MAX_FIFO_MB; + else + i = flexcan->xmit_maxmb + 1; + } + if (i == flexcan->xmit_mb) + return -1; + } while (1); + + flexcan->xmit_mb = i + 1; + if (flexcan->xmit_mb > flexcan->maxmb) { + if (flexcan->fifo) + flexcan->xmit_mb = FLEXCAN_MAX_FIFO_MB; + else + flexcan->xmit_mb = flexcan->xmit_maxmb + 1; + } + + if (frame->can_id & CAN_RTR_FLAG) + hwmb[i].mb_cs.cs.rtr = 1; + else + hwmb[i].mb_cs.cs.rtr = 0; + + if (frame->can_id & CAN_EFF_FLAG) { + hwmb[i].mb_cs.cs.ide = 1; + hwmb[i].mb_cs.cs.srr = 1; + hwmb[i].mb_id = frame->can_id & CAN_EFF_MASK; + } else { + hwmb[i].mb_cs.cs.ide = 0; + hwmb[i].mb_id = (frame->can_id & CAN_SFF_MASK) << 18; + } + + hwmb[i].mb_cs.cs.length = frame->can_dlc; + flexcan_memcpy(hwmb[i].mb_data, frame->data, frame->can_dlc); + hwmb[i].mb_cs.cs.code = CAN_MB_TX_ONCE; + return 0; +} + +/*! + * @brief function to initial message buffer + * + * @param flexcan the pointer of can hardware device. + * + * @return none + */ +void flexcan_mbm_init(struct flexcan_device *flexcan) +{ + struct can_hw_mb *hwmb; + int rx_mb, i; + + /* Set global mask to receive all messages */ + __raw_writel(0, flexcan->io_base + CAN_HW_REG_RXGMASK); + __raw_writel(0, flexcan->io_base + CAN_HW_REG_RX14MASK); + __raw_writel(0, flexcan->io_base + CAN_HW_REG_RX15MASK); + + memset(flexcan->hwmb, 0, sizeof(*hwmb) * FLEXCAN_MAX_MB); + /* Set individual mask to receive all messages */ + memset(flexcan->rx_mask, 0, sizeof(unsigned int) * FLEXCAN_MAX_MB); + + if (flexcan->fifo) + rx_mb = FLEXCAN_MAX_FIFO_MB; + else + rx_mb = flexcan->maxmb - flexcan->xmit_maxmb; + + hwmb = flexcan->hwmb; + if (flexcan->fifo) { + unsigned long *id_table = flexcan->io_base + CAN_FIFO_BASE; + for (i = 0; i < rx_mb; i++) + id_table[i] = 0; + } else { + for (i = 0; i < rx_mb; i++) { + hwmb[i].mb_cs.cs.code = CAN_MB_RX_EMPTY; + /* + * IDE bit can not control by mask registers + * So set message buffer to receive extend + * or standard message. + */ + if (flexcan->ext_msg && flexcan->std_msg) + hwmb[i].mb_cs.cs.ide = i & 1; + else { + if (flexcan->ext_msg) + hwmb[i].mb_cs.cs.ide = 1; + } + } + } + + for (; i <= flexcan->maxmb; i++) + hwmb[i].mb_cs.cs.code = CAN_MB_TX_INACTIVE; + + flexcan->xmit_mb = rx_mb; +} --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/flexcan/dev.c +++ linux-fsl-imx51-2.6.31/drivers/net/can/flexcan/dev.c @@ -0,0 +1,619 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dev.c + * + * @brief Driver for Freescale CAN Controller FlexCAN. + * + * @ingroup can + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "flexcan.h" + +enum { + FLEXCAN_ATTR_STATE = 0, + FLEXCAN_ATTR_BITRATE, + FLEXCAN_ATTR_BR_PRESDIV, + FLEXCAN_ATTR_BR_RJW, + FLEXCAN_ATTR_BR_PROPSEG, + FLEXCAN_ATTR_BR_PSEG1, + FLEXCAN_ATTR_BR_PSEG2, + FLEXCAN_ATTR_BR_CLKSRC, + FLEXCAN_ATTR_MAXMB, + FLEXCAN_ATTR_XMIT_MAXMB, + FLEXCAN_ATTR_FIFO, + FLEXCAN_ATTR_WAKEUP, + FLEXCAN_ATTR_SRX_DIS, + FLEXCAN_ATTR_WAK_SRC, + FLEXCAN_ATTR_BCC, + FLEXCAN_ATTR_LOCAL_PRIORITY, + FLEXCAN_ATTR_ABORT, + FLEXCAN_ATTR_LOOPBACK, + FLEXCAN_ATTR_SMP, + FLEXCAN_ATTR_BOFF_REC, + FLEXCAN_ATTR_TSYN, + FLEXCAN_ATTR_LISTEN, + FLEXCAN_ATTR_EXTEND_MSG, + FLEXCAN_ATTR_STANDARD_MSG, +#ifdef CONFIG_CAN_DEBUG_DEVICES + FLEXCAN_ATTR_DUMP_REG, + FLEXCAN_ATTR_DUMP_XMIT_MB, + FLEXCAN_ATTR_DUMP_RX_MB, +#endif + FLEXCAN_ATTR_MAX +}; + +static ssize_t flexcan_show_attr(struct device *dev, + struct device_attribute *attr, char *buf); +static ssize_t flexcan_set_attr(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count); + +static struct device_attribute flexcan_dev_attr[FLEXCAN_ATTR_MAX] = { + [FLEXCAN_ATTR_STATE] = __ATTR(state, 0444, flexcan_show_attr, NULL), + [FLEXCAN_ATTR_BITRATE] = + __ATTR(bitrate, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_PRESDIV] = + __ATTR(br_presdiv, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_RJW] = + __ATTR(br_rjw, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_PROPSEG] = + __ATTR(br_propseg, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_PSEG1] = + __ATTR(br_pseg1, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_PSEG2] = + __ATTR(br_pseg2, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BR_CLKSRC] = + __ATTR(br_clksrc, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_MAXMB] = + __ATTR(maxmb, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_XMIT_MAXMB] = + __ATTR(xmit_maxmb, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_FIFO] = + __ATTR(fifo, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_WAKEUP] = + __ATTR(wakeup, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_SRX_DIS] = + __ATTR(srx_dis, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_WAK_SRC] = + __ATTR(wak_src, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BCC] = + __ATTR(bcc, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_LOCAL_PRIORITY] = + __ATTR(local_priority, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_ABORT] = + __ATTR(abort, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_LOOPBACK] = + __ATTR(loopback, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_SMP] = + __ATTR(smp, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_BOFF_REC] = + __ATTR(boff_rec, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_TSYN] = + __ATTR(tsyn, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_LISTEN] = + __ATTR(listen, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_EXTEND_MSG] = + __ATTR(ext_msg, 0644, flexcan_show_attr, flexcan_set_attr), + [FLEXCAN_ATTR_STANDARD_MSG] = + __ATTR(std_msg, 0644, flexcan_show_attr, flexcan_set_attr), +#ifdef CONFIG_CAN_DEBUG_DEVICES + [FLEXCAN_ATTR_DUMP_REG] = + __ATTR(dump_reg, 0444, flexcan_show_attr, NULL), + [FLEXCAN_ATTR_DUMP_XMIT_MB] = + __ATTR(dump_xmit_mb, 0444, flexcan_show_attr, NULL), + [FLEXCAN_ATTR_DUMP_RX_MB] = + __ATTR(dump_rx_mb, 0444, flexcan_show_attr, NULL), +#endif +}; + +static void flexcan_set_bitrate(struct flexcan_device *flexcan, int bitrate) +{ + /* TODO:: implement in future + * based on the bitrate to get the timing of + * presdiv, pseg1, pseg2, propseg + */ +} + +static void flexcan_update_bitrate(struct flexcan_device *flexcan) +{ + int rate, div; + + if (flexcan->br_clksrc) + rate = clk_get_rate(flexcan->clk); + else { + struct clk *clk; + clk = clk_get(NULL, "ckih"); + if (!clk) + return; + rate = clk_get_rate(clk); + clk_put(clk); + } + if (!rate) + return; + + div = (flexcan->br_presdiv + 1); + div *= + (flexcan->br_propseg + flexcan->br_pseg1 + flexcan->br_pseg2 + 4); + flexcan->bitrate = (rate + div - 1) / div; +} + +#ifdef CONFIG_CAN_DEBUG_DEVICES +static int flexcan_dump_reg(struct flexcan_device *flexcan, char *buf) +{ + int ret = 0; + unsigned int reg; + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + ret += sprintf(buf + ret, "MCR::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_CTRL); + ret += sprintf(buf + ret, "CTRL::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_RXGMASK); + ret += sprintf(buf + ret, "RXGMASK::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_RX14MASK); + ret += sprintf(buf + ret, "RX14MASK::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_RX15MASK); + ret += sprintf(buf + ret, "RX15MASK::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_ECR); + ret += sprintf(buf + ret, "ECR::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_ESR); + ret += sprintf(buf + ret, "ESR::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_IMASK2); + ret += sprintf(buf + ret, "IMASK2::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_IMASK1); + ret += sprintf(buf + ret, "IMASK1::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_IFLAG2); + ret += sprintf(buf + ret, "IFLAG2::0x%x\n", reg); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_IFLAG1); + ret += sprintf(buf + ret, "IFLAG1::0x%x\n", reg); + return ret; +} + +static int flexcan_dump_xmit_mb(struct flexcan_device *flexcan, char *buf) +{ + int ret = 0, i; + i = flexcan->xmit_maxmb + 1; + for (; i <= flexcan->maxmb; i++) + ret += + sprintf(buf + ret, + "mb[%d]::CS:0x%x ID:0x%x DATA[1~2]:0x%02x,0x%02x\n", + i, flexcan->hwmb[i].mb_cs.data, + flexcan->hwmb[i].mb_id, flexcan->hwmb[i].mb_data[1], + flexcan->hwmb[i].mb_data[2]); + return ret; +} + +static int flexcan_dump_rx_mb(struct flexcan_device *flexcan, char *buf) +{ + int ret = 0, i; + for (i = 0; i <= flexcan->xmit_maxmb; i++) + ret += + sprintf(buf + ret, + "mb[%d]::CS:0x%x ID:0x%x DATA[1~2]:0x%02x,0x%02x\n", + i, flexcan->hwmb[i].mb_cs.data, + flexcan->hwmb[i].mb_id, flexcan->hwmb[i].mb_data[1], + flexcan->hwmb[i].mb_data[2]); + return ret; +} +#endif + +static ssize_t flexcan_show_state(struct net_device *net, char *buf) +{ + int ret, esr; + struct flexcan_device *flexcan = netdev_priv(net); + ret = sprintf(buf, "%s::", netif_running(net) ? "Start" : "Stop"); + if (netif_carrier_ok(net)) { + esr = __raw_readl(flexcan->io_base + CAN_HW_REG_ESR); + switch ((esr & __ESR_FLT_CONF_MASK) >> __ESR_FLT_CONF_OFF) { + case 0: + ret += sprintf(buf + ret, "normal\n"); + break; + case 1: + ret += sprintf(buf + ret, "error passive\n"); + break; + default: + ret += sprintf(buf + ret, "bus off\n"); + } + } else + ret += sprintf(buf + ret, "bus off\n"); + return ret; +} + +static ssize_t flexcan_show_attr(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int attr_id; + struct net_device *net; + struct flexcan_device *flexcan; + + net = dev_get_drvdata(dev); + BUG_ON(!net); + flexcan = netdev_priv(net); + BUG_ON(!flexcan); + + attr_id = attr - flexcan_dev_attr; + switch (attr_id) { + case FLEXCAN_ATTR_STATE: + return flexcan_show_state(net, buf); + case FLEXCAN_ATTR_BITRATE: + return sprintf(buf, "%d\n", flexcan->bitrate); + case FLEXCAN_ATTR_BR_PRESDIV: + return sprintf(buf, "%d\n", flexcan->br_presdiv + 1); + case FLEXCAN_ATTR_BR_RJW: + return sprintf(buf, "%d\n", flexcan->br_rjw); + case FLEXCAN_ATTR_BR_PROPSEG: + return sprintf(buf, "%d\n", flexcan->br_propseg + 1); + case FLEXCAN_ATTR_BR_PSEG1: + return sprintf(buf, "%d\n", flexcan->br_pseg1 + 1); + case FLEXCAN_ATTR_BR_PSEG2: + return sprintf(buf, "%d\n", flexcan->br_pseg2 + 1); + case FLEXCAN_ATTR_BR_CLKSRC: + return sprintf(buf, "%s\n", flexcan->br_clksrc ? "bus" : "osc"); + case FLEXCAN_ATTR_MAXMB: + return sprintf(buf, "%d\n", flexcan->maxmb + 1); + case FLEXCAN_ATTR_XMIT_MAXMB: + return sprintf(buf, "%d\n", flexcan->xmit_maxmb + 1); + case FLEXCAN_ATTR_FIFO: + return sprintf(buf, "%d\n", flexcan->fifo); + case FLEXCAN_ATTR_WAKEUP: + return sprintf(buf, "%d\n", flexcan->wakeup); + case FLEXCAN_ATTR_SRX_DIS: + return sprintf(buf, "%d\n", flexcan->srx_dis); + case FLEXCAN_ATTR_WAK_SRC: + return sprintf(buf, "%d\n", flexcan->wak_src); + case FLEXCAN_ATTR_BCC: + return sprintf(buf, "%d\n", flexcan->bcc); + case FLEXCAN_ATTR_LOCAL_PRIORITY: + return sprintf(buf, "%d\n", flexcan->lprio); + case FLEXCAN_ATTR_ABORT: + return sprintf(buf, "%d\n", flexcan->abort); + case FLEXCAN_ATTR_LOOPBACK: + return sprintf(buf, "%d\n", flexcan->loopback); + case FLEXCAN_ATTR_SMP: + return sprintf(buf, "%d\n", flexcan->smp); + case FLEXCAN_ATTR_BOFF_REC: + return sprintf(buf, "%d\n", flexcan->boff_rec); + case FLEXCAN_ATTR_TSYN: + return sprintf(buf, "%d\n", flexcan->tsyn); + case FLEXCAN_ATTR_LISTEN: + return sprintf(buf, "%d\n", flexcan->listen); + case FLEXCAN_ATTR_EXTEND_MSG: + return sprintf(buf, "%d\n", flexcan->ext_msg); + case FLEXCAN_ATTR_STANDARD_MSG: + return sprintf(buf, "%d\n", flexcan->std_msg); +#ifdef CONFIG_CAN_DEBUG_DEVICES + case FLEXCAN_ATTR_DUMP_REG: + return flexcan_dump_reg(flexcan, buf); + case FLEXCAN_ATTR_DUMP_XMIT_MB: + return flexcan_dump_xmit_mb(flexcan, buf); + case FLEXCAN_ATTR_DUMP_RX_MB: + return flexcan_dump_rx_mb(flexcan, buf); +#endif + default: + return sprintf(buf, "%s:%p->%p\n", __func__, flexcan_dev_attr, + attr); + } +} + +static ssize_t flexcan_set_attr(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + int attr_id, tmp; + struct net_device *net; + struct flexcan_device *flexcan; + + net = dev_get_drvdata(dev); + BUG_ON(!net); + flexcan = netdev_priv(net); + BUG_ON(!flexcan); + + attr_id = attr - flexcan_dev_attr; + + if (mutex_lock_interruptible(&flexcan->mutex)) + return count; + + if (netif_running(net)) + goto set_finish; + + if (attr_id == FLEXCAN_ATTR_BR_CLKSRC) { + if (!strcasecmp(buf, "bus")) + flexcan->br_clksrc = 1; + else if (!strcasecmp(buf, "osc")) + flexcan->br_clksrc = 0; + goto set_finish; + } + + tmp = simple_strtoul(buf, NULL, 0); + switch (attr_id) { + case FLEXCAN_ATTR_BITRATE: + flexcan_set_bitrate(flexcan, tmp); + break; + case FLEXCAN_ATTR_BR_PRESDIV: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_PRESDIV)) { + flexcan->br_presdiv = tmp - 1; + flexcan_update_bitrate(flexcan); + } + break; + case FLEXCAN_ATTR_BR_RJW: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_RJW)) + flexcan->br_rjw = tmp - 1; + break; + case FLEXCAN_ATTR_BR_PROPSEG: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_PROPSEG)) { + flexcan->br_propseg = tmp - 1; + flexcan_update_bitrate(flexcan); + } + break; + case FLEXCAN_ATTR_BR_PSEG1: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_PSEG1)) { + flexcan->br_pseg1 = tmp - 1; + flexcan_update_bitrate(flexcan); + } + break; + case FLEXCAN_ATTR_BR_PSEG2: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_PSEG2)) { + flexcan->br_pseg2 = tmp - 1; + flexcan_update_bitrate(flexcan); + } + break; + case FLEXCAN_ATTR_MAXMB: + if ((tmp > 0) && (tmp <= FLEXCAN_MAX_MB)) { + if (flexcan->maxmb != (tmp - 1)) { + flexcan->maxmb = tmp - 1; + if (flexcan->xmit_maxmb < flexcan->maxmb) + flexcan->xmit_maxmb = flexcan->maxmb; + } + } + break; + case FLEXCAN_ATTR_XMIT_MAXMB: + if ((tmp > 0) && (tmp <= (flexcan->maxmb + 1))) { + if (flexcan->xmit_maxmb != (tmp - 1)) + flexcan->xmit_maxmb = tmp - 1; + } + break; + case FLEXCAN_ATTR_FIFO: + flexcan->fifo = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_WAKEUP: + flexcan->wakeup = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_SRX_DIS: + flexcan->srx_dis = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_WAK_SRC: + flexcan->wak_src = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_BCC: + flexcan->bcc = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_LOCAL_PRIORITY: + flexcan->lprio = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_ABORT: + flexcan->abort = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_LOOPBACK: + flexcan->loopback = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_SMP: + flexcan->smp = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_BOFF_REC: + flexcan->boff_rec = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_TSYN: + flexcan->tsyn = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_LISTEN: + flexcan->listen = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_EXTEND_MSG: + flexcan->ext_msg = tmp ? 1 : 0; + break; + case FLEXCAN_ATTR_STANDARD_MSG: + flexcan->std_msg = tmp ? 1 : 0; + break; + } + set_finish: + mutex_unlock(&flexcan->mutex); + return count; +} + +static void flexcan_device_default(struct flexcan_device *dev) +{ + dev->br_clksrc = 1; + dev->br_rjw = 2; + dev->br_presdiv = 6; + dev->br_propseg = 4; + dev->br_pseg1 = 4; + dev->br_pseg2 = 7; + + dev->bcc = 1; + dev->srx_dis = 1; + dev->smp = 1; + dev->boff_rec = 1; + + dev->maxmb = FLEXCAN_MAX_MB - 1; + dev->xmit_maxmb = (FLEXCAN_MAX_MB >> 1) - 1; + dev->xmit_mb = dev->maxmb - dev->xmit_maxmb; + + dev->ext_msg = 1; + dev->std_msg = 1; +} + +static int flexcan_device_attach(struct flexcan_device *flexcan) +{ + int ret; + struct resource *res; + struct platform_device *pdev = flexcan->dev; + struct flexcan_platform_data *plat_data = (pdev->dev).platform_data; + + res = platform_get_resource(flexcan->dev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + flexcan->io_base = ioremap(res->start, res->end - res->start + 1); + if (!flexcan->io_base) + return -ENOMEM; + + flexcan->irq = platform_get_irq(flexcan->dev, 0); + if (!flexcan->irq) { + ret = -ENODEV; + goto no_irq_err; + } + + ret = -EINVAL; + if (plat_data) { + if (plat_data->core_reg) { + flexcan->core_reg = regulator_get(&pdev->dev, + plat_data->core_reg); + if (!flexcan->core_reg) + goto plat_err; + } + + if (plat_data->io_reg) { + flexcan->io_reg = regulator_get(&pdev->dev, + plat_data->io_reg); + if (!flexcan->io_reg) + goto plat_err; + } + } + flexcan->clk = clk_get(&(flexcan->dev)->dev, "can_clk"); + flexcan->hwmb = (struct can_hw_mb *)(flexcan->io_base + CAN_MB_BASE); + flexcan->rx_mask = (unsigned int *)(flexcan->io_base + CAN_RXMASK_BASE); + + return 0; + plat_err: + if (flexcan->core_reg) { + regulator_put(flexcan->core_reg); + flexcan->core_reg = NULL; + } + no_irq_err: + if (flexcan->io_base) + iounmap(flexcan->io_base); + return ret; +} + +static void flexcan_device_detach(struct flexcan_device *flexcan) +{ + if (flexcan->clk) { + clk_put(flexcan->clk); + flexcan->clk = NULL; + } + + if (flexcan->io_reg) { + regulator_put(flexcan->io_reg); + flexcan->io_reg = NULL; + } + + if (flexcan->core_reg) { + regulator_put(flexcan->core_reg); + flexcan->core_reg = NULL; + } + + if (flexcan->io_base) + iounmap(flexcan->io_base); +} + +/*! + * @brief The function allocates can device. + * + * @param pdev the pointer of platform device. + * @param setup the initial function pointer of network device. + * + * @return none + */ +struct net_device *flexcan_device_alloc(struct platform_device *pdev, + void (*setup) (struct net_device *dev)) +{ + struct flexcan_device *flexcan; + struct net_device *net; + int i, num; + + net = alloc_netdev(sizeof(*flexcan), "can%d", setup); + if (net == NULL) { + printk(KERN_ERR "Allocate netdevice for FlexCAN fail!\n"); + return NULL; + } + flexcan = netdev_priv(net); + memset(flexcan, 0, sizeof(*flexcan)); + + mutex_init(&flexcan->mutex); + init_timer(&flexcan->timer); + + flexcan->dev = pdev; + if (flexcan_device_attach(flexcan)) { + printk(KERN_ERR "Attach FlexCAN fail!\n"); + free_netdev(net); + return NULL; + } + flexcan_device_default(flexcan); + flexcan_update_bitrate(flexcan); + + num = ARRAY_SIZE(flexcan_dev_attr); + + for (i = 0; i < num; i++) { + if (device_create_file(&pdev->dev, flexcan_dev_attr + i)) { + printk(KERN_ERR "Create attribute file fail!\n"); + break; + } + } + + if (i != num) { + for (; i >= 0; i--) + device_remove_file(&pdev->dev, flexcan_dev_attr + i); + free_netdev(net); + return NULL; + } + dev_set_drvdata(&pdev->dev, net); + return net; +} + +/*! + * @brief The function frees can device. + * + * @param pdev the pointer of platform device. + * + * @return none + */ +void flexcan_device_free(struct platform_device *pdev) +{ + struct net_device *net; + struct flexcan_device *flexcan; + int i, num; + net = (struct net_device *)dev_get_drvdata(&pdev->dev); + + unregister_netdev(net); + flexcan = netdev_priv(net); + del_timer(&flexcan->timer); + + num = ARRAY_SIZE(flexcan_dev_attr); + + for (i = 0; i < num; i++) + device_remove_file(&pdev->dev, flexcan_dev_attr + i); + + flexcan_device_detach(netdev_priv(net)); + free_netdev(net); +} --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/flexcan/Makefile +++ linux-fsl-imx51-2.6.31/drivers/net/can/flexcan/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o + +flexcan-y := dev.o drv.o mbm.o --- linux-fsl-imx51-2.6.31.orig/drivers/net/can/flexcan/drv.c +++ linux-fsl-imx51-2.6.31/drivers/net/can/flexcan/drv.c @@ -0,0 +1,628 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file drv.c + * + * @brief Driver for Freescale CAN Controller FlexCAN. + * + * @ingroup can + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include "flexcan.h" + +static void flexcan_hw_start(struct flexcan_device *flexcan) +{ + unsigned int reg; + if ((flexcan->maxmb + 1) > 32) { + __raw_writel(0xFFFFFFFF, flexcan->io_base + CAN_HW_REG_IMASK1); + reg = (1 << (flexcan->maxmb - 31)) - 1; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_IMASK2); + } else { + reg = (1 << (flexcan->maxmb + 1)) - 1; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_IMASK1); + __raw_writel(0, flexcan->io_base + CAN_HW_REG_IMASK2); + } + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR) & (~__MCR_HALT); + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_MCR); +} + +static void flexcan_hw_stop(struct flexcan_device *flexcan) +{ + unsigned int reg; + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + __raw_writel(reg | __MCR_HALT, flexcan->io_base + CAN_HW_REG_MCR); +} + +static int flexcan_hw_reset(struct flexcan_device *flexcan) +{ + unsigned int reg; + int timeout = 100000; + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + __raw_writel(reg | __MCR_MDIS, flexcan->io_base + CAN_HW_REG_MCR); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_CTRL); + if (flexcan->br_clksrc) + reg |= __CTRL_CLK_SRC; + else + reg &= ~__CTRL_CLK_SRC; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_CTRL); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR) & (~__MCR_MDIS); + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_MCR); + reg |= __MCR_SOFT_RST; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_MCR); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + while (reg & __MCR_SOFT_RST) { + if (--timeout <= 0) { + printk(KERN_ERR "Flexcan software Reset Timeouted\n"); + return -1; + } + udelay(10); + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + } + return 0; +} + +static inline void flexcan_mcr_setup(struct flexcan_device *flexcan) +{ + unsigned int reg; + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + reg &= ~(__MCR_MAX_MB_MASK | __MCR_WAK_MSK | __MCR_MAX_IDAM_MASK); + + if (flexcan->fifo) + reg |= __MCR_FEN; + else + reg &= ~__MCR_FEN; + + if (flexcan->wakeup) + reg |= __MCR_SLF_WAK | __MCR_WAK_MSK; + else + reg &= ~(__MCR_SLF_WAK | __MCR_WAK_MSK); + + if (flexcan->wak_src) + reg |= __MCR_WAK_SRC; + else + reg &= ~__MCR_WAK_SRC; + + if (flexcan->srx_dis) + reg |= __MCR_SRX_DIS; + else + reg &= ~__MCR_SRX_DIS; + + if (flexcan->bcc) + reg |= __MCR_BCC; + else + reg &= ~__MCR_BCC; + + if (flexcan->lprio) + reg |= __MCR_LPRIO_EN; + else + reg &= ~__MCR_LPRIO_EN; + + if (flexcan->abort) + reg |= __MCR_AEN; + else + reg &= ~__MCR_AEN; + + reg |= (flexcan->maxmb << __MCR_MAX_MB_OFFSET); + reg |= __MCR_DOZE | __MCR_MAX_IDAM_C; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_MCR); +} + +static inline void flexcan_ctrl_setup(struct flexcan_device *flexcan) +{ + unsigned int reg; + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_CTRL); + reg &= ~(__CTRL_PRESDIV_MASK | __CTRL_RJW_MASK | __CTRL_PSEG1_MASK | + __CTRL_PSEG2_MASK | __CTRL_PROPSEG_MASK); + + if (flexcan->loopback) + reg |= __CTRL_LPB; + else + reg &= ~__CTRL_LPB; + + if (flexcan->smp) + reg |= __CTRL_SMP; + else + reg &= ~__CTRL_SMP; + + if (flexcan->boff_rec) + reg |= __CTRL_BOFF_REC; + else + reg &= ~__CTRL_BOFF_REC; + + if (flexcan->tsyn) + reg |= __CTRL_TSYN; + else + reg &= ~__CTRL_TSYN; + + if (flexcan->listen) + reg |= __CTRL_LOM; + else + reg &= ~__CTRL_LOM; + + reg |= (flexcan->br_presdiv << __CTRL_PRESDIV_OFFSET) | + (flexcan->br_rjw << __CTRL_RJW_OFFSET) | + (flexcan->br_pseg1 << __CTRL_PSEG1_OFFSET) | + (flexcan->br_pseg2 << __CTRL_PSEG2_OFFSET) | + (flexcan->br_propseg << __CTRL_PROPSEG_OFFSET); + + reg &= ~__CTRL_LBUF; + + reg |= __CTRL_TWRN_MSK | __CTRL_RWRN_MSK | __CTRL_BOFF_MSK | + __CTRL_ERR_MSK; + + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_CTRL); +} + +static int flexcan_hw_restart(struct net_device *dev) +{ + unsigned int reg; + struct flexcan_device *flexcan = netdev_priv(dev); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + if (reg & __MCR_SOFT_RST) + return 1; + + flexcan_mcr_setup(flexcan); + + __raw_writel(0, flexcan->io_base + CAN_HW_REG_IMASK2); + __raw_writel(0, flexcan->io_base + CAN_HW_REG_IMASK1); + + __raw_writel(0xFFFFFFFF, flexcan->io_base + CAN_HW_REG_IFLAG2); + __raw_writel(0xFFFFFFFF, flexcan->io_base + CAN_HW_REG_IFLAG1); + + __raw_writel(0, flexcan->io_base + CAN_HW_REG_ECR); + + flexcan_mbm_init(flexcan); + netif_carrier_on(dev); + flexcan_hw_start(flexcan); + + if (netif_queue_stopped(dev)) + netif_start_queue(dev); + + return 0; +} + +static void flexcan_hw_watch(unsigned long data) +{ + unsigned int reg, ecr; + struct net_device *dev = (struct net_device *)data; + struct flexcan_device *flexcan = dev ? netdev_priv(dev) : NULL; + + BUG_ON(!flexcan); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + if (reg & __MCR_MDIS) { + if (flexcan_hw_restart(dev)) + mod_timer(&flexcan->timer, HZ / 20); + return; + } + ecr = __raw_readl(flexcan->io_base + CAN_HW_REG_ECR); + if (flexcan->boff_rec) { + if (((reg & __ESR_FLT_CONF_MASK) >> __ESR_FLT_CONF_OFF) > 1) { + reg |= __MCR_SOFT_RST; + __raw_writel(reg, flexcan->io_base + CAN_HW_REG_MCR); + mod_timer(&flexcan->timer, HZ / 20); + return; + } + netif_carrier_on(dev); + } +} + +static void flexcan_hw_busoff(struct net_device *dev) +{ + struct flexcan_device *flexcan = netdev_priv(dev); + unsigned int reg; + + netif_carrier_off(dev); + + flexcan->timer.function = flexcan_hw_watch; + flexcan->timer.data = (unsigned long)dev; + + if (flexcan->boff_rec) { + mod_timer(&flexcan->timer, HZ / 10); + return; + } + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_MCR); + __raw_writel(reg | __MCR_SOFT_RST, flexcan->io_base + CAN_HW_REG_MCR); + mod_timer(&flexcan->timer, HZ / 20); +} + +static int flexcan_hw_open(struct flexcan_device *flexcan) +{ + if (flexcan_hw_reset(flexcan)) + return -EFAULT; + + flexcan_mcr_setup(flexcan); + flexcan_ctrl_setup(flexcan); + + __raw_writel(0, flexcan->io_base + CAN_HW_REG_IMASK2); + __raw_writel(0, flexcan->io_base + CAN_HW_REG_IMASK1); + + __raw_writel(0xFFFFFFFF, flexcan->io_base + CAN_HW_REG_IFLAG2); + __raw_writel(0xFFFFFFFF, flexcan->io_base + CAN_HW_REG_IFLAG1); + + __raw_writel(0, flexcan->io_base + CAN_HW_REG_ECR); + return 0; +} + +static void flexcan_err_handler(struct net_device *dev) +{ + struct flexcan_device *flexcan = netdev_priv(dev); + struct sk_buff *skb; + struct can_frame *frame; + unsigned int esr, ecr; + + esr = __raw_readl(flexcan->io_base + CAN_HW_REG_ESR); + __raw_writel(esr & __ESR_INTERRUPTS, flexcan->io_base + CAN_HW_REG_ESR); + + if (esr & __ESR_WAK_INT) + return; + + skb = dev_alloc_skb(sizeof(struct can_frame)); + if (!skb) { + printk(KERN_ERR "%s: allocates skb fail in\n", __func__); + return; + } + frame = (struct can_frame *)skb_put(skb, sizeof(*frame)); + memset(frame, 0, sizeof(*frame)); + frame->can_id = CAN_ERR_FLAG | CAN_ERR_CRTL; + frame->can_dlc = CAN_ERR_DLC; + + if (esr & __ESR_TWRN_INT) + frame->data[1] |= CAN_ERR_CRTL_TX_WARNING; + + if (esr & __ESR_RWRN_INT) + frame->data[1] |= CAN_ERR_CRTL_RX_WARNING; + + if (esr & __ESR_BOFF_INT) + frame->can_id |= CAN_ERR_BUSOFF; + + if (esr & __ESR_ERR_INT) { + if (esr & __ESR_BIT1_ERR) + frame->data[2] |= CAN_ERR_PROT_BIT1; + + if (esr & __ESR_BIT0_ERR) + frame->data[2] |= CAN_ERR_PROT_BIT0; + + if (esr & __ESR_ACK_ERR) + frame->can_id |= CAN_ERR_ACK; + + /*TODO:// if (esr & __ESR_CRC_ERR) */ + + if (esr & __ESR_FRM_ERR) + frame->data[2] |= CAN_ERR_PROT_FORM; + + if (esr & __ESR_STF_ERR) + frame->data[2] |= CAN_ERR_PROT_STUFF; + + ecr = __raw_readl(flexcan->io_base + CAN_HW_REG_ECR); + switch ((esr & __ESR_FLT_CONF_MASK) >> __ESR_FLT_CONF_OFF) { + case 0: + if (__ECR_TX_ERR_COUNTER(ecr) >= __ECR_ACTIVE_THRESHOLD) + frame->data[1] |= CAN_ERR_CRTL_TX_WARNING; + if (__ECR_RX_ERR_COUNTER(ecr) >= __ECR_ACTIVE_THRESHOLD) + frame->data[1] |= CAN_ERR_CRTL_RX_WARNING; + break; + case 1: + if (__ECR_TX_ERR_COUNTER(ecr) >= + __ECR_PASSIVE_THRESHOLD) + frame->data[1] |= CAN_ERR_CRTL_TX_PASSIVE; + + if (__ECR_RX_ERR_COUNTER(ecr) >= + __ECR_PASSIVE_THRESHOLD) + frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; + break; + default: + frame->can_id |= CAN_ERR_BUSOFF; + } + } + + if (frame->can_id & CAN_ERR_BUSOFF) + flexcan_hw_busoff(dev); + + skb->dev = dev; + skb->ip_summed = CHECKSUM_UNNECESSARY; + netif_receive_skb(skb); +} + +static irqreturn_t flexcan_irq_handler(int irq, void *data) +{ + struct net_device *dev = (struct net_device *)data; + struct flexcan_device *flexcan = dev ? netdev_priv(dev) : NULL; + unsigned int reg; + + BUG_ON(!flexcan); + + reg = __raw_readl(flexcan->io_base + CAN_HW_REG_ESR); + if (reg & __ESR_INTERRUPTS) { + flexcan_err_handler(dev); + return IRQ_HANDLED; + } + + flexcan_mbm_isr(dev); + return IRQ_HANDLED; +} + +static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct can_frame *frame = (struct can_frame *)skb->data; + struct flexcan_device *flexcan = netdev_priv(dev); + struct net_device_stats *stats = &dev->stats; + + BUG_ON(!flexcan); + + if (frame->can_dlc > 8) + return -EINVAL; + + if (!flexcan_mbm_xmit(flexcan, frame)) { + dev_kfree_skb(skb); + stats->tx_bytes += frame->can_dlc; + stats->tx_packets++; + dev->trans_start = jiffies; + return NETDEV_TX_OK; + } + netif_stop_queue(dev); + return NETDEV_TX_BUSY; +} + +static int flexcan_open(struct net_device *dev) +{ + struct flexcan_device *flexcan; + struct platform_device *pdev; + struct flexcan_platform_data *plat_data; + + flexcan = netdev_priv(dev); + BUG_ON(!flexcan); + + pdev = flexcan->dev; + plat_data = (pdev->dev).platform_data; + if (plat_data && plat_data->active) + plat_data->active(pdev->id); + + if (flexcan->clk) + if (clk_enable(flexcan->clk)) + goto clk_err; + + if (flexcan->core_reg) + if (regulator_enable(flexcan->core_reg)) + goto core_reg_err; + + if (flexcan->io_reg) + if (regulator_enable(flexcan->io_reg)) + goto io_reg_err; + + if (plat_data && plat_data->xcvr_enable) + plat_data->xcvr_enable(pdev->id, 1); + + if (request_irq(flexcan->irq, flexcan_irq_handler, IRQF_SAMPLE_RANDOM, + dev->name, dev)) + goto irq_err; + + if (flexcan_hw_open(flexcan)) + goto open_err; + + flexcan_mbm_init(flexcan); + netif_carrier_on(dev); + flexcan_hw_start(flexcan); + return 0; + open_err: + free_irq(flexcan->irq, dev); + irq_err: + if (plat_data && plat_data->xcvr_enable) + plat_data->xcvr_enable(pdev->id, 0); + + if (flexcan->io_reg) + regulator_disable(flexcan->io_reg); + io_reg_err: + if (flexcan->core_reg) + regulator_disable(flexcan->core_reg); + core_reg_err: + if (flexcan->clk) + clk_disable(flexcan->clk); + clk_err: + if (plat_data && plat_data->inactive) + plat_data->inactive(pdev->id); + return -ENODEV; +} + +static int flexcan_stop(struct net_device *dev) +{ + struct flexcan_device *flexcan; + struct platform_device *pdev; + struct flexcan_platform_data *plat_data; + + flexcan = netdev_priv(dev); + + BUG_ON(!flexcan); + + pdev = flexcan->dev; + plat_data = (pdev->dev).platform_data; + + flexcan_hw_stop(flexcan); + + free_irq(flexcan->irq, dev); + + if (plat_data && plat_data->xcvr_enable) + plat_data->xcvr_enable(pdev->id, 0); + + if (flexcan->io_reg) + regulator_disable(flexcan->io_reg); + if (flexcan->core_reg) + regulator_disable(flexcan->core_reg); + if (flexcan->clk) + clk_disable(flexcan->clk); + if (plat_data && plat_data->inactive) + plat_data->inactive(pdev->id); + return 0; +} + +static struct net_device_ops flexcan_netdev_ops = { + .ndo_open = flexcan_open, + .ndo_stop = flexcan_stop, + .ndo_start_xmit = flexcan_start_xmit, +}; + +static void flexcan_setup(struct net_device *dev) +{ + dev->type = ARPHRD_CAN; + dev->mtu = sizeof(struct can_frame); + dev->hard_header_len = 0; + dev->addr_len = 0; + dev->tx_queue_len = FLEXCAN_MAX_MB; + dev->flags = IFF_NOARP; + dev->features = NETIF_F_NO_CSUM; + + dev->netdev_ops = &flexcan_netdev_ops; +} + +static int flexcan_probe(struct platform_device *pdev) +{ + struct net_device *net; + net = flexcan_device_alloc(pdev, flexcan_setup); + if (!net) + return -ENOMEM; + + if (register_netdev(net)) { + flexcan_device_free(pdev); + return -ENODEV; + } + return 0; +} + +static int flexcan_remove(struct platform_device *pdev) +{ + flexcan_device_free(pdev); + return 0; +} + +static int flexcan_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct net_device *net; + struct flexcan_device *flexcan; + struct flexcan_platform_data *plat_data; + net = (struct net_device *)dev_get_drvdata(&pdev->dev); + flexcan = netdev_priv(net); + + BUG_ON(!flexcan); + + if (!(net->flags & IFF_UP)) + return 0; + if (flexcan->wakeup) + set_irq_wake(flexcan->irq, 1); + else { + plat_data = (pdev->dev).platform_data; + + if (plat_data && plat_data->xcvr_enable) + plat_data->xcvr_enable(pdev->id, 0); + + if (flexcan->io_reg) + regulator_disable(flexcan->io_reg); + if (flexcan->core_reg) + regulator_disable(flexcan->core_reg); + if (flexcan->clk) + clk_disable(flexcan->clk); + if (plat_data && plat_data->inactive) + plat_data->inactive(pdev->id); + } + return 0; +} + +static int flexcan_resume(struct platform_device *pdev) +{ + struct net_device *net; + struct flexcan_device *flexcan; + struct flexcan_platform_data *plat_data; + net = (struct net_device *)dev_get_drvdata(&pdev->dev); + flexcan = netdev_priv(net); + + BUG_ON(!flexcan); + + if (!(net->flags & IFF_UP)) + return 0; + + if (flexcan->wakeup) + set_irq_wake(flexcan->irq, 0); + else { + plat_data = (pdev->dev).platform_data; + if (plat_data && plat_data->active) + plat_data->active(pdev->id); + + if (flexcan->clk) { + if (clk_enable(flexcan->clk)) + printk(KERN_ERR "%s:enable clock fail\n", + __func__); + } + + if (flexcan->core_reg) { + if (regulator_enable(flexcan->core_reg)) + printk(KERN_ERR "%s:enable core voltage\n", + __func__); + } + if (flexcan->io_reg) { + if (regulator_enable(flexcan->io_reg)) + printk(KERN_ERR "%s:enable io voltage\n", + __func__); + } + + if (plat_data && plat_data->xcvr_enable) + plat_data->xcvr_enable(pdev->id, 1); + } + return 0; +} + +static struct platform_driver flexcan_driver = { + .driver = { + .name = FLEXCAN_DEVICE_NAME, + }, + .probe = flexcan_probe, + .remove = flexcan_remove, + .suspend = flexcan_suspend, + .resume = flexcan_resume, +}; + +static __init int flexcan_init(void) +{ + pr_info("Freescale FlexCAN Driver \n"); + return platform_driver_register(&flexcan_driver); +} + +static __exit void flexcan_exit(void) +{ + return platform_driver_unregister(&flexcan_driver); +} + +module_init(flexcan_init); +module_exit(flexcan_exit); + +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/net/tulip/tulip.h +++ linux-fsl-imx51-2.6.31/drivers/net/tulip/tulip.h @@ -38,7 +38,10 @@ #define TULIP_BAR 0 /* CBIO */ #endif - +#ifndef PCI_ULI5261_ID +#define PCI_ULI5261_ID 0x526110B9 /* ULi M5261 ID*/ +#define PCI_ULI5263_ID 0x526310B9 /* ULi M5263 ID*/ +#endif struct tulip_chip_table { char *chip_name; --- linux-fsl-imx51-2.6.31.orig/drivers/net/tulip/tulip_core.c +++ linux-fsl-imx51-2.6.31/drivers/net/tulip/tulip_core.c @@ -228,8 +228,12 @@ { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 }, { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 }, + /* Ubuntu: On non-sparc, this seems to be handled better by the + * dmfe driver. */ +#ifdef __sparc__ { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, +#endif { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 }, { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, @@ -393,6 +397,11 @@ goto media_picked; } } + if (tp->chip_id == PCI_ULI5261_ID || tp->chip_id == PCI_ULI5263_ID) { + for (i = tp->mtable->leafcount - 1; i >= 0; i--) + if (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaIsMII) + goto media_picked; + } /* Start sensing first non-full-duplex media. */ for (i = tp->mtable->leafcount - 1; (tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--) --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/hso.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/hso.c @@ -1362,7 +1362,7 @@ /* reset the rts and dtr */ /* do the actual close */ serial->open_count--; - kref_put(&serial->parent->ref, hso_serial_ref_free); + if (serial->open_count <= 0) { serial->open_count = 0; spin_lock_irq(&serial->serial_lock); @@ -1382,6 +1382,8 @@ usb_autopm_put_interface(serial->parent->interface); mutex_unlock(&serial->parent->mutex); + + kref_put(&serial->parent->ref, hso_serial_ref_free); } /* close the requested serial port */ @@ -1631,6 +1633,8 @@ struct uart_icount cnow; struct hso_tiocmget *tiocmget = serial->tiocmget; + memset(&icount, 0, sizeof(struct serial_icounter_struct)); + if (!tiocmget) return -ENOENT; spin_lock_irq(&serial->serial_lock); --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/rtl8150.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/rtl8150.c @@ -324,7 +324,7 @@ dbg("%02X:", netdev->dev_addr[i]); dbg("%02X\n", netdev->dev_addr[i]); /* Set the IDR registers. */ - set_registers(dev, IDR, sizeof(netdev->dev_addr), netdev->dev_addr); + set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr); #ifdef EEPROM_WRITE { u8 cr; --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/net/usb/Kconfig @@ -174,7 +174,7 @@ * Ericsson Mobile Broadband Module (all variants) * Motorola (DM100 and SB4100) * Broadcom Cable Modem (reference design) - * Toshiba (PCX1100U and F3507g) + * Toshiba (PCX1100U and F3507g/F3607gw) * ... This driver creates an interface named "ethX", where X depends on --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/smsc95xx.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/smsc95xx.c @@ -1232,7 +1232,7 @@ .rx_fixup = smsc95xx_rx_fixup, .tx_fixup = smsc95xx_tx_fixup, .status = smsc95xx_status, - .flags = FLAG_ETHER, + .flags = FLAG_ETHER | FLAG_SEND_ZLP, }; static const struct usb_device_id products[] = { --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/cdc_ether.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/cdc_ether.c @@ -544,20 +544,60 @@ USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), .driver_info = (unsigned long) &cdc_info, }, { - /* Ericsson F3307 */ + /* Ericsson F3607gw ver 2 */ + USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { + /* Ericsson F3607gw ver 3 */ USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), .driver_info = (unsigned long) &cdc_info, }, { + /* Ericsson F3307 */ + USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { + /* Ericsson F3307 ver 2 */ + USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { + /* Ericsson C3607w */ + USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { /* Toshiba F3507g */ USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), .driver_info = (unsigned long) &cdc_info, }, { + /* Toshiba F3607gw */ + USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { + /* Toshiba F3607gw ver 2 */ + USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { /* Dell F3507g */ USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), .driver_info = (unsigned long) &cdc_info, +}, { + /* Dell F3607gw */ + USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +}, { + /* Dell F3607gw ver 2 */ + USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM, + USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, }, { }, // END }; --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/usbnet.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/usbnet.c @@ -988,7 +988,7 @@ * NOTE: strictly conforming cdc-ether devices should expect * the ZLP here, but ignore the one-byte packet. */ - if ((length % dev->maxpacket) == 0) { + if (!(info->flags & FLAG_SEND_ZLP) && (length % dev->maxpacket) == 0) { urb->transfer_buffer_length++; if (skb_tailroom(skb)) { skb->data[skb->len] = 0; --- linux-fsl-imx51-2.6.31.orig/drivers/net/usb/kaweth.c +++ linux-fsl-imx51-2.6.31/drivers/net/usb/kaweth.c @@ -263,6 +263,7 @@ int timeout) { struct usb_ctrlrequest *dr; + int retval; dbg("kaweth_control()"); @@ -278,18 +279,21 @@ return -ENOMEM; } - dr->bRequestType= requesttype; + dr->bRequestType = requesttype; dr->bRequest = request; dr->wValue = cpu_to_le16(value); dr->wIndex = cpu_to_le16(index); dr->wLength = cpu_to_le16(size); - return kaweth_internal_control_msg(kaweth->dev, - pipe, - dr, - data, - size, - timeout); + retval = kaweth_internal_control_msg(kaweth->dev, + pipe, + dr, + data, + size, + timeout); + + kfree(dr); + return retval; } /**************************************************************** --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/hosts.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/hosts.c @@ -180,14 +180,20 @@ EXPORT_SYMBOL(scsi_remove_host); /** - * scsi_add_host - add a scsi host + * scsi_add_host_with_dma - add a scsi host with dma device * @shost: scsi host pointer to add * @dev: a struct device of type scsi class + * @dma_dev: dma device for the host + * + * Note: You rarely need to worry about this unless you're in a + * virtualised host environments, so use the simpler scsi_add_host() + * function instead. * * Return value: * 0 on success / != 0 for error **/ -int scsi_add_host(struct Scsi_Host *shost, struct device *dev) +int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev, + struct device *dma_dev) { struct scsi_host_template *sht = shost->hostt; int error = -EINVAL; @@ -207,6 +213,7 @@ if (!shost->shost_gendev.parent) shost->shost_gendev.parent = dev ? dev : &platform_bus; + shost->dma_dev = dma_dev; error = device_add(&shost->shost_gendev); if (error) @@ -262,7 +269,7 @@ fail: return error; } -EXPORT_SYMBOL(scsi_add_host); +EXPORT_SYMBOL(scsi_add_host_with_dma); static void scsi_host_dev_release(struct device *dev) { --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/sg.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/sg.c @@ -1708,11 +1708,6 @@ Sg_scatter_hold *req_schp = &srp->data; SCSI_LOG_TIMEOUT(4, printk("sg_finish_rem_req: res_used=%d\n", (int) srp->res_used)); - if (srp->res_used) - sg_unlink_reserve(sfp, srp); - else - sg_remove_scat(req_schp); - if (srp->rq) { if (srp->bio) ret = blk_rq_unmap_user(srp->bio); @@ -1720,6 +1715,11 @@ blk_put_request(srp->rq); } + if (srp->res_used) + sg_unlink_reserve(sfp, srp); + else + sg_remove_scat(req_schp); + sg_remove_request(sfp, srp); return ret; @@ -1811,7 +1811,7 @@ return 0; out: for (i = 0; i < k; i++) - __free_pages(schp->pages[k], order); + __free_pages(schp->pages[i], order); if (--order >= 0) goto retry; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/libsrp.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/libsrp.c @@ -124,6 +124,7 @@ dma_free_coherent(dev, size, ring[i]->buf, ring[i]->dma); kfree(ring[i]); } + kfree(ring); } int srp_target_alloc(struct srp_target *target, struct device *dev, --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/scsi_lib_dma.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/scsi_lib_dma.c @@ -23,7 +23,7 @@ int nseg = 0; if (scsi_sg_count(cmd)) { - struct device *dev = cmd->device->host->shost_gendev.parent; + struct device *dev = cmd->device->host->dma_dev; nseg = dma_map_sg(dev, scsi_sglist(cmd), scsi_sg_count(cmd), cmd->sc_data_direction); @@ -41,7 +41,7 @@ void scsi_dma_unmap(struct scsi_cmnd *cmd) { if (scsi_sg_count(cmd)) { - struct device *dev = cmd->device->host->shost_gendev.parent; + struct device *dev = cmd->device->host->dma_dev; dma_unmap_sg(dev, scsi_sglist(cmd), scsi_sg_count(cmd), cmd->sc_data_direction); --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/scsi_error.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/scsi_error.c @@ -721,6 +721,9 @@ case NEEDS_RETRY: case FAILED: break; + case ADD_TO_MLQUEUE: + rtn = NEEDS_RETRY; + break; default: rtn = FAILED; break; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/scsi.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/scsi.c @@ -241,10 +241,7 @@ */ struct scsi_cmnd *__scsi_get_command(struct Scsi_Host *shost, gfp_t gfp_mask) { - struct scsi_cmnd *cmd; - unsigned char *buf; - - cmd = scsi_host_alloc_command(shost, gfp_mask); + struct scsi_cmnd *cmd = scsi_host_alloc_command(shost, gfp_mask); if (unlikely(!cmd)) { unsigned long flags; @@ -258,9 +255,15 @@ spin_unlock_irqrestore(&shost->free_list_lock, flags); if (cmd) { + void *buf, *prot; + buf = cmd->sense_buffer; + prot = cmd->prot_sdb; + memset(cmd, 0, sizeof(*cmd)); + cmd->sense_buffer = buf; + cmd->prot_sdb = prot; } } --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/scsi_transport_fc.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/scsi_transport_fc.c @@ -473,10 +473,30 @@ MODULE_PARM_DESC(dev_loss_tmo, "Maximum number of seconds that the FC transport should" " insulate the loss of a remote port. Once this value is" - " exceeded, the scsi target is removed. Value should be" + " exceeded, the scsi target may be removed. Reference the" + " remove_on_dev_loss module parameter. Value should be" " between 1 and SCSI_DEVICE_BLOCK_MAX_TIMEOUT."); /* + * remove_on_dev_loss: controls whether the transport will + * remove a scsi target after the device loss timer expires. + * Removal on disconnect is modeled after the USB subsystem + * and expects subsystems layered on SCSI to be aware of + * potential device loss and handle it appropriately. However, + * many subsystems do not support device removal, leaving situations + * where structure references may remain, causing new device + * name assignments, etc., if the target returns. + */ +static unsigned int fc_remove_on_dev_loss = 0; +module_param_named(remove_on_dev_loss, fc_remove_on_dev_loss, + int, S_IRUGO|S_IWUSR); +MODULE_PARM_DESC(remove_on_dev_loss, + "Boolean. When the device loss timer fires, this variable" + " controls whether the scsi infrastructure for the target" + " device is removed. Values: zero means do not remove," + " non-zero means remove. Default is zero."); + +/* * Netlink Infrastructure */ @@ -648,11 +668,22 @@ return error; error = transport_class_register(&fc_vport_class); if (error) - return error; + goto unreg_host_class; error = transport_class_register(&fc_rport_class); if (error) - return error; - return transport_class_register(&fc_transport_class); + goto unreg_vport_class; + error = transport_class_register(&fc_transport_class); + if (error) + goto unreg_rport_class; + return 0; + +unreg_rport_class: + transport_class_unregister(&fc_rport_class); +unreg_vport_class: + transport_class_unregister(&fc_vport_class); +unreg_host_class: + transport_class_unregister(&fc_host_class); + return error; } static void __exit fc_transport_exit(void) @@ -2367,7 +2398,8 @@ container_of(work, struct fc_rport, stgt_delete_work); fc_terminate_rport_io(rport); - scsi_remove_target(&rport->dev); + if (fc_remove_on_dev_loss) + scsi_remove_target(&rport->dev); } @@ -3015,9 +3047,13 @@ return; } - dev_printk(KERN_ERR, &rport->dev, - "blocked FC remote port time out: removing target and " - "saving binding\n"); + if (fc_remove_on_dev_loss) + dev_printk(KERN_ERR, &rport->dev, + "blocked FC remote port time out: removing target and " + "saving binding\n"); + else + dev_printk(KERN_ERR, &rport->dev, + "blocked FC remote port time out: saving binding\n"); list_move_tail(&rport->peers, &fc_host->rport_bindings); --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/gdth.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/gdth.c @@ -2900,7 +2900,7 @@ eindex = handle; estr->event_source = 0; - if (eindex >= MAX_EVENTS) { + if (eindex < 0 || eindex >= MAX_EVENTS) { spin_unlock_irqrestore(&ha->smp_lock, flags); return eindex; } @@ -4174,6 +4174,14 @@ ha = gdth_find_ha(gen.ionode); if (!ha) return -EFAULT; + + if (gen.data_len > INT_MAX) + return -EINVAL; + if (gen.sense_len > INT_MAX) + return -EINVAL; + if (gen.data_len + gen.sense_len > INT_MAX) + return -EINVAL; + if (gen.data_len + gen.sense_len != 0) { if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len, FALSE, &paddr))) --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/dpt_i2o.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/dpt_i2o.c @@ -1918,6 +1918,10 @@ } size = size>>16; size *= 4; + if (size > MAX_MESSAGE_SIZE) { + rcode = -EINVAL; + goto cleanup; + } /* Copy in the user's I2O command */ if (copy_from_user (msg, user_msg, size)) { rcode = -EFAULT; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/sd.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/sd.c @@ -2021,6 +2021,7 @@ sd_printk(KERN_NOTICE, sdkp, "Attached SCSI %sdisk\n", sdp->removable ? "removable " : ""); + put_device(&sdkp->dev); } /** @@ -2106,6 +2107,7 @@ get_device(&sdp->sdev_gendev); + get_device(&sdkp->dev); /* prevent release before async_schedule */ async_schedule(sd_probe_async, sdkp); return 0; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_transport.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_transport.c @@ -140,11 +140,18 @@ u32 device_info; u32 ioc_status; + if (ioc->shost_recovery) { + printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n", + __func__, ioc->name); + return -EFAULT; + } + if ((mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0, MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle))) { printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", + ioc->name, __FILE__, __LINE__, __func__); - return -1; + return -ENXIO; } ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & @@ -153,7 +160,7 @@ printk(MPT2SAS_ERR_FMT "handle(0x%04x), ioc_status(0x%04x)" "\nfailure at %s:%d/%s()!\n", ioc->name, handle, ioc_status, __FILE__, __LINE__, __func__); - return -1; + return -EIO; } memset(identify, 0, sizeof(identify)); @@ -288,21 +295,17 @@ void *psge; u32 sgl_flags; u8 issue_reset = 0; - unsigned long flags; void *data_out = NULL; dma_addr_t data_out_dma; u32 sz; u64 *sas_address_le; u16 wait_state_count; - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->ioc_reset_in_progress) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); + if (ioc->shost_recovery) { printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n", __func__, ioc->name); return -EFAULT; } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); mutex_lock(&ioc->transport_cmds.mutex); @@ -806,6 +809,12 @@ struct _sas_node *sas_node; struct _sas_phy *mpt2sas_phy; + if (ioc->shost_recovery) { + printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n", + __func__, ioc->name); + return; + } + spin_lock_irqsave(&ioc->sas_node_lock, flags); sas_node = _transport_sas_node_find_by_handle(ioc, handle); spin_unlock_irqrestore(&ioc->sas_node_lock, flags); @@ -1025,7 +1034,6 @@ void *psge; u32 sgl_flags; u8 issue_reset = 0; - unsigned long flags; dma_addr_t dma_addr_in = 0; dma_addr_t dma_addr_out = 0; u16 wait_state_count; @@ -1045,14 +1053,11 @@ return -EINVAL; } - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->ioc_reset_in_progress) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); + if (ioc->shost_recovery) { printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n", __func__, ioc->name); return -EFAULT; } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); rc = mutex_lock_interruptible(&ioc->transport_cmds.mutex); if (rc) --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_base.h +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_base.h @@ -119,6 +119,7 @@ #define MPT2_IOC_PRE_RESET 1 /* prior to host reset */ #define MPT2_IOC_AFTER_RESET 2 /* just after host reset */ #define MPT2_IOC_DONE_RESET 3 /* links re-initialized */ +#define MPT2_IOC_RUNNING 4 /* shost running */ /* * logging format @@ -196,6 +197,38 @@ * @block: device is in SDEV_BLOCK state * @tlr_snoop_check: flag used in determining whether to disable TLR */ + +/* OEM Identifiers */ +#define MFG10_OEM_ID_INVALID (0x00000000) +#define MFG10_OEM_ID_DELL (0x00000001) +#define MFG10_OEM_ID_FSC (0x00000002) +#define MFG10_OEM_ID_SUN (0x00000003) +#define MFG10_OEM_ID_IBM (0x00000004) + +/* GENERIC Flags 0*/ +#define MFG10_GF0_OCE_DISABLED (0x00000001) +#define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) +#define MFG10_GF0_R10_DISPLAY (0x00000004) +#define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) +#define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) + +/* OEM Specific Flags will come from OEM specific header files */ +typedef struct _MPI2_CONFIG_PAGE_MAN_10 { + MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ + U8 OEMIdentifier; /* 04h */ + U8 Reserved1; /* 05h */ + U16 Reserved2; /* 08h */ + U32 Reserved3; /* 0Ch */ + U32 GenericFlags0; /* 10h */ + U32 GenericFlags1; /* 14h */ + U32 Reserved4; /* 18h */ + U32 OEMSpecificFlags0; /* 1Ch */ + U32 OEMSpecificFlags1; /* 20h */ + U32 Reserved5[18]; /* 24h-60h*/ +} MPI2_CONFIG_PAGE_MAN_10, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_10, + Mpi2ManufacturingPage10_t, MPI2_POINTER pMpi2ManufacturingPage10_t; + struct MPT2SAS_DEVICE { struct MPT2SAS_TARGET *sas_target; unsigned int lun; @@ -431,7 +464,7 @@ * @fw_event_list: list of fw events * @aen_event_read_flag: event log was read * @broadcast_aen_busy: broadcast aen waiting to be serviced - * @ioc_reset_in_progress: host reset in progress + * @shost_recovery: host reset in progress * @ioc_reset_in_progress_lock: * @ioc_link_reset_in_progress: phy/hard reset in progress * @ignore_loginfos: ignore loginfos during task managment @@ -460,6 +493,7 @@ * @facts: static facts data * @pfacts: static port facts data * @manu_pg0: static manufacturing page 0 + * @manu_pg10: static manufacturing page 10 * @bios_pg2: static bios page 2 * @bios_pg3: static bios page 3 * @ioc_pg8: static ioc page 8 @@ -544,7 +578,6 @@ /* misc flags */ int aen_event_read_flag; u8 broadcast_aen_busy; - u8 ioc_reset_in_progress; u8 shost_recovery; spinlock_t ioc_reset_in_progress_lock; u8 ioc_link_reset_in_progress; @@ -663,6 +696,7 @@ dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; + Mpi2ManufacturingPage10_t manu_pg10; u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; }; @@ -734,6 +768,8 @@ int mpt2sas_config_get_number_hba_phys(struct MPT2SAS_ADAPTER *ioc, u8 *num_phys); int mpt2sas_config_get_manufacturing_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); +int mpt2sas_config_get_manufacturing_pg10(struct MPT2SAS_ADAPTER *ioc, + Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage10_t *config_page); int mpt2sas_config_get_bios_pg2(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage2_t *config_page); int mpt2sas_config_get_bios_pg3(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t @@ -776,7 +812,6 @@ u16 *volume_handle); int mpt2sas_config_get_volume_wwid(struct MPT2SAS_ADAPTER *ioc, u16 volume_handle, u64 *wwid); - /* ctl shared API */ extern struct device_attribute *mpt2sas_host_attrs[]; extern struct device_attribute *mpt2sas_dev_attrs[]; @@ -802,5 +837,7 @@ u16 attached_handle, u8 phy_number, u8 link_rate); extern struct sas_function_template mpt2sas_transport_functions; extern struct scsi_transport_template *mpt2sas_transport_template; +extern int scsi_internal_device_block(struct scsi_device *sdev); +extern int scsi_internal_device_unblock(struct scsi_device *sdev); #endif /* MPT2SAS_BASE_H_INCLUDED */ --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_ctl.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_ctl.c @@ -630,6 +630,13 @@ data_out_sz = karg.data_out_size; data_in_sz = karg.data_in_size; + /* Check for overflow and wraparound */ + if (karg.data_sge_offset * 4 > ioc->request_sz || + karg.data_sge_offset > (UINT_MAX / 4)) { + ret = -EINVAL; + goto out; + } + /* copy in request message frame from user */ if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) { printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__, __LINE__, @@ -1797,7 +1804,7 @@ Mpi2DiagBufferPostReply_t *mpi_reply; int rc, i; u8 buffer_type; - unsigned long timeleft; + unsigned long timeleft, request_size, copy_size; u16 smid; u16 ioc_status; u8 issue_reset = 0; @@ -1833,6 +1840,8 @@ return -ENOMEM; } + request_size = ioc->diag_buffer_sz[buffer_type]; + if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) { printk(MPT2SAS_ERR_FMT "%s: either the starting_offset " "or bytes_to_read are not 4 byte aligned\n", ioc->name, @@ -1840,13 +1849,23 @@ return -EINVAL; } + if (karg.starting_offset > request_size) + return -EINVAL; + diag_data = (void *)(request_data + karg.starting_offset); dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: diag_buffer(%p), " "offset(%d), sz(%d)\n", ioc->name, __func__, diag_data, karg.starting_offset, karg.bytes_to_read)); + /* Truncate data on requests that are too large */ + if ((diag_data + karg.bytes_to_read < diag_data) || + (diag_data + karg.bytes_to_read > request_data + request_size)) + copy_size = request_size - karg.starting_offset; + else + copy_size = karg.bytes_to_read; + if (copy_to_user((void __user *)uarg->diagnostic_data, - diag_data, karg.bytes_to_read)) { + diag_data, copy_size)) { printk(MPT2SAS_ERR_FMT "%s: Unable to write " "mpt_diag_read_buffer_t data @ %p\n", ioc->name, __func__, diag_data); @@ -1963,7 +1982,6 @@ { enum block_state state; long ret = -EINVAL; - unsigned long flags; state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING : BLOCKING; @@ -1989,13 +2007,8 @@ !ioc) return -ENODEV; - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->shost_recovery) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, - flags); + if (ioc->shost_recovery) return -EAGAIN; - } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_command)) { uarg = arg; @@ -2098,7 +2111,6 @@ struct mpt2_ioctl_command karg; struct MPT2SAS_ADAPTER *ioc; enum block_state state; - unsigned long flags; if (_IOC_SIZE(cmd) != sizeof(struct mpt2_ioctl_command32)) return -EINVAL; @@ -2113,13 +2125,8 @@ if (_ctl_verify_adapter(karg32.hdr.ioc_number, &ioc) == -1 || !ioc) return -ENODEV; - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->shost_recovery) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, - flags); + if (ioc->shost_recovery) return -EAGAIN; - } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); memset(&karg, 0, sizeof(struct mpt2_ioctl_command)); karg.hdr.ioc_number = karg32.hdr.ioc_number; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_scsih.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_scsih.c @@ -103,7 +103,6 @@ }; -#define MPT2SAS_RESCAN_AFTER_HOST_RESET (0xFFFF) /** * struct fw_event_work - firmware event struct * @list: link list framework @@ -1502,7 +1501,13 @@ break; case MPI2_RAID_VOL_TYPE_RAID1E: qdepth = MPT2SAS_RAID_QUEUE_DEPTH; - r_level = "RAID1E"; + if (ioc->manu_pg10.OEMIdentifier && + (ioc->manu_pg10.GenericFlags0 & + MFG10_GF0_R10_DISPLAY) && + !(raid_device->num_pds % 2)) + r_level = "RAID10"; + else + r_level = "RAID1E"; break; case MPI2_RAID_VOL_TYPE_RAID1: qdepth = MPT2SAS_RAID_QUEUE_DEPTH; @@ -1786,17 +1791,18 @@ u32 ioc_state; unsigned long timeleft; u8 VF_ID = 0; - unsigned long flags; - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->tm_cmds.status != MPT2_CMD_NOT_USED || - ioc->shost_recovery) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); + if (ioc->tm_cmds.status != MPT2_CMD_NOT_USED) { + printk(MPT2SAS_INFO_FMT "%s: tm_cmd busy!!!\n", + __func__, ioc->name); + return; + } + + if (ioc->shost_recovery) { printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n", __func__, ioc->name); return; } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); ioc_state = mpt2sas_base_get_iocstate(ioc, 0); if (ioc_state & MPI2_DOORBELL_USED) { @@ -2222,7 +2228,7 @@ MPT2SAS_INFO_FMT "SDEV_RUNNING: " "handle(0x%04x)\n", ioc->name, handle)); sas_device_priv_data->block = 0; - scsi_device_set_state(sdev, SDEV_RUNNING); + scsi_internal_device_unblock(sdev); } } } @@ -2251,7 +2257,7 @@ MPT2SAS_INFO_FMT "SDEV_BLOCK: " "handle(0x%04x)\n", ioc->name, handle)); sas_device_priv_data->block = 1; - scsi_device_set_state(sdev, SDEV_BLOCK); + scsi_internal_device_block(sdev); } } } @@ -2327,6 +2333,7 @@ u16 handle; u16 reason_code; u8 phy_number; + u8 link_rate; for (i = 0; i < event_data->NumEntries; i++) { handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle); @@ -2337,6 +2344,11 @@ MPI2_EVENT_SAS_TOPO_RC_MASK; if (reason_code == MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING) _scsih_block_io_device(ioc, handle); + if (reason_code == MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED) { + link_rate = event_data->PHY[i].LinkRate >> 4; + if (link_rate >= MPI2_SAS_NEG_LINK_RATE_1_5) + _scsih_ublock_io_device(ioc, handle); + } } } @@ -2405,27 +2417,6 @@ } /** - * _scsih_queue_rescan - queue a topology rescan from user context - * @ioc: per adapter object - * - * Return nothing. - */ -static void -_scsih_queue_rescan(struct MPT2SAS_ADAPTER *ioc) -{ - struct fw_event_work *fw_event; - - if (ioc->wait_for_port_enable_to_complete) - return; - fw_event = kzalloc(sizeof(struct fw_event_work), GFP_ATOMIC); - if (!fw_event) - return; - fw_event->event = MPT2SAS_RESCAN_AFTER_HOST_RESET; - fw_event->ioc = ioc; - _scsih_fw_event_add(ioc, fw_event); -} - -/** * _scsih_flush_running_cmds - completing outstanding commands. * @ioc: per adapter object * @@ -2456,46 +2447,6 @@ } /** - * mpt2sas_scsih_reset_handler - reset callback handler (for scsih) - * @ioc: per adapter object - * @reset_phase: phase - * - * The handler for doing any required cleanup or initialization. - * - * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, - * MPT2_IOC_DONE_RESET - * - * Return nothing. - */ -void -mpt2sas_scsih_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) -{ - switch (reset_phase) { - case MPT2_IOC_PRE_RESET: - dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " - "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); - _scsih_fw_event_off(ioc); - break; - case MPT2_IOC_AFTER_RESET: - dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " - "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); - if (ioc->tm_cmds.status & MPT2_CMD_PENDING) { - ioc->tm_cmds.status |= MPT2_CMD_RESET; - mpt2sas_base_free_smid(ioc, ioc->tm_cmds.smid); - complete(&ioc->tm_cmds.done); - } - _scsih_fw_event_on(ioc); - _scsih_flush_running_cmds(ioc); - break; - case MPT2_IOC_DONE_RESET: - dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " - "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); - _scsih_queue_rescan(ioc); - break; - } -} - -/** * _scsih_setup_eedp - setup MPI request for EEDP transfer * @scmd: pointer to scsi command object * @mpi_request: pointer to the SCSI_IO reqest message frame @@ -2615,7 +2566,6 @@ Mpi2SCSIIORequest_t *mpi_request; u32 mpi_control; u16 smid; - unsigned long flags; scmd->scsi_done = done; sas_device_priv_data = scmd->device->hostdata; @@ -2634,13 +2584,10 @@ } /* see if we are busy with task managment stuff */ - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (sas_target_priv_data->tm_busy || - ioc->shost_recovery || ioc->ioc_link_reset_in_progress) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); + if (sas_target_priv_data->tm_busy) + return SCSI_MLQUEUE_DEVICE_BUSY; + else if (ioc->shost_recovery || ioc->ioc_link_reset_in_progress) return SCSI_MLQUEUE_HOST_BUSY; - } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); if (scmd->sc_data_direction == DMA_FROM_DEVICE) mpi_control = MPI2_SCSIIO_CONTROL_READ; @@ -3436,6 +3383,9 @@ if (!handle) return -1; + if (ioc->shost_recovery) + return -1; + if ((mpt2sas_config_get_expander_pg0(ioc, &mpi_reply, &expander_pg0, MPI2_SAS_EXPAND_PGAD_FORM_HNDL, handle))) { printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", @@ -3572,6 +3522,9 @@ struct _sas_node *sas_expander; unsigned long flags; + if (ioc->shost_recovery) + return; + spin_lock_irqsave(&ioc->sas_node_lock, flags); sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc, handle); spin_unlock_irqrestore(&ioc->sas_node_lock, flags); @@ -3743,6 +3696,8 @@ mutex_unlock(&ioc->tm_cmds.mutex); dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "issue target reset " "done: handle(0x%04x)\n", ioc->name, device_handle)); + if (ioc->shost_recovery) + goto out; } /* SAS_IO_UNIT_CNTR - send REMOVE_DEVICE */ @@ -3765,6 +3720,9 @@ le32_to_cpu(mpi_reply.IOCLogInfo))); out: + + _scsih_ublock_io_device(ioc, handle); + mpt2sas_transport_port_remove(ioc, sas_device->sas_address, sas_device->parent_handle); @@ -3908,6 +3866,8 @@ "expander event\n", ioc->name)); return; } + if (ioc->shost_recovery) + return; if (event_data->PHY[i].PhyStatus & MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) continue; @@ -3942,10 +3902,6 @@ link_rate_); } } - if (reason_code == MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED) { - if (link_rate_ >= MPI2_SAS_NEG_LINK_RATE_1_5) - _scsih_ublock_io_device(ioc, handle); - } if (reason_code == MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED) { if (link_rate_ < MPI2_SAS_NEG_LINK_RATE_1_5) break; @@ -5156,22 +5112,9 @@ _scsih_remove_unresponding_devices(struct MPT2SAS_ADAPTER *ioc) { struct _sas_device *sas_device, *sas_device_next; - struct _sas_node *sas_expander, *sas_expander_next; + struct _sas_node *sas_expander; struct _raid_device *raid_device, *raid_device_next; - unsigned long flags; - _scsih_search_responding_sas_devices(ioc); - _scsih_search_responding_raid_devices(ioc); - _scsih_search_responding_expanders(ioc); - - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - ioc->shost_recovery = 0; - if (ioc->shost->shost_state == SHOST_RECOVERY) { - printk(MPT2SAS_INFO_FMT "putting controller into " - "SHOST_RUNNING\n", ioc->name); - scsi_host_set_state(ioc->shost, SHOST_RUNNING); - } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); list_for_each_entry_safe(sas_device, sas_device_next, &ioc->sas_device_list, list) { @@ -5207,16 +5150,63 @@ _scsih_raid_device_remove(ioc, raid_device); } - list_for_each_entry_safe(sas_expander, sas_expander_next, - &ioc->sas_expander_list, list) { + retry_expander_search: + sas_expander = NULL; + list_for_each_entry(sas_expander, &ioc->sas_expander_list, list) { if (sas_expander->responding) { sas_expander->responding = 0; continue; } - printk("\tremoving expander: handle(0x%04x), " - " sas_addr(0x%016llx)\n", sas_expander->handle, - (unsigned long long)sas_expander->sas_address); _scsih_expander_remove(ioc, sas_expander->handle); + goto retry_expander_search; + } +} + +/** + * mpt2sas_scsih_reset_handler - reset callback handler (for scsih) + * @ioc: per adapter object + * @reset_phase: phase + * + * The handler for doing any required cleanup or initialization. + * + * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, + * MPT2_IOC_DONE_RESET + * + * Return nothing. + */ +void +mpt2sas_scsih_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) +{ + switch (reset_phase) { + case MPT2_IOC_PRE_RESET: + dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " + "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); + _scsih_fw_event_off(ioc); + break; + case MPT2_IOC_AFTER_RESET: + dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " + "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); + if (ioc->tm_cmds.status & MPT2_CMD_PENDING) { + ioc->tm_cmds.status |= MPT2_CMD_RESET; + mpt2sas_base_free_smid(ioc, ioc->tm_cmds.smid); + complete(&ioc->tm_cmds.done); + } + _scsih_fw_event_on(ioc); + _scsih_flush_running_cmds(ioc); + break; + case MPT2_IOC_DONE_RESET: + dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " + "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); + _scsih_sas_host_refresh(ioc, 0); + _scsih_search_responding_sas_devices(ioc); + _scsih_search_responding_raid_devices(ioc); + _scsih_search_responding_expanders(ioc); + break; + case MPT2_IOC_RUNNING: + dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " + "MPT2_IOC_RUNNING\n", ioc->name, __func__)); + _scsih_remove_unresponding_devices(ioc); + break; } } @@ -5236,14 +5226,6 @@ unsigned long flags; struct MPT2SAS_ADAPTER *ioc = fw_event->ioc; - /* This is invoked by calling _scsih_queue_rescan(). */ - if (fw_event->event == MPT2SAS_RESCAN_AFTER_HOST_RESET) { - _scsih_fw_event_free(ioc, fw_event); - _scsih_sas_host_refresh(ioc, 1); - _scsih_remove_unresponding_devices(ioc); - return; - } - /* the queue is being flushed so ignore this event */ spin_lock_irqsave(&ioc->fw_event_lock, flags); if (ioc->fw_events_off || ioc->remove_host) { @@ -5253,13 +5235,10 @@ } spin_unlock_irqrestore(&ioc->fw_event_lock, flags); - spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); if (ioc->shost_recovery) { - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); _scsih_fw_event_requeue(ioc, fw_event, 1000); return; } - spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); switch (fw_event->event) { case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: @@ -5461,6 +5440,8 @@ if (!sas_device) continue; _scsih_remove_device(ioc, sas_device->handle); + if (ioc->shost_recovery) + return; goto retry_device_search; } } @@ -5482,6 +5463,8 @@ if (!expander_sibling) continue; _scsih_expander_remove(ioc, expander_sibling->handle); + if (ioc->shost_recovery) + return; goto retry_expander_search; } } --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_config.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_config.c @@ -426,6 +426,67 @@ } /** + * mpt2sas_config_get_manufacturing_pg10 - obtain manufacturing page 10 + * @ioc: per adapter object + * @mpi_reply: reply mf payload returned from firmware + * @config_page: contents of the config page + * Context: sleep. + * + * Returns 0 for success, non-zero for failure. + */ +int +mpt2sas_config_get_manufacturing_pg10(struct MPT2SAS_ADAPTER *ioc, + Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage10_t *config_page) +{ + Mpi2ConfigRequest_t mpi_request; + int r; + struct config_request mem; + + memset(config_page, 0, sizeof(Mpi2ManufacturingPage10_t)); + memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t)); + mpi_request.Function = MPI2_FUNCTION_CONFIG; + mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER; + mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING; + mpi_request.Header.PageNumber = 10; + mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION; + mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE); + r = _config_request(ioc, &mpi_request, mpi_reply, + MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT); + if (r) + goto out; + + mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; + mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion; + mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber; + mpi_request.Header.PageType = mpi_reply->Header.PageType; + mpi_request.Header.PageLength = mpi_reply->Header.PageLength; + mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4; + if (mem.config_page_sz > ioc->config_page_sz) { + r = _config_alloc_config_dma_memory(ioc, &mem); + if (r) + goto out; + } else { + mem.config_page_dma = ioc->config_page_dma; + mem.config_page = ioc->config_page; + } + ioc->base_add_sg_single(&mpi_request.PageBufferSGE, + MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz, + mem.config_page_dma); + r = _config_request(ioc, &mpi_request, mpi_reply, + MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT); + if (!r) + memcpy(config_page, mem.config_page, + min_t(u16, mem.config_page_sz, + sizeof(Mpi2ManufacturingPage10_t))); + + if (mem.config_page_sz > ioc->config_page_sz) + _config_free_config_dma_memory(ioc, &mem); + + out: + return r; +} + +/** * mpt2sas_config_get_bios_pg2 - obtain bios page 2 * @ioc: per adapter object * @mpi_reply: reply mf payload returned from firmware --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/mpt2sas/mpt2sas_base.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/mpt2sas/mpt2sas_base.c @@ -94,7 +94,7 @@ int rc; spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->ioc_reset_in_progress) + if (ioc->shost_recovery) goto rearm_timer; spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); @@ -1542,6 +1542,8 @@ (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, ioc->bios_pg3.BiosVersion & 0x000000FF); + _base_display_dell_branding(ioc); + printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { @@ -1554,8 +1556,6 @@ i++; } - _base_display_dell_branding(ioc); - i = 0; printk("), "); printk("Capabilities=("); @@ -1627,6 +1627,9 @@ u32 iounit_pg1_flags; mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); + if (ioc->ir_firmware) + mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, + &ioc->manu_pg10); mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); @@ -3501,20 +3504,13 @@ __func__)); spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - if (ioc->ioc_reset_in_progress) { + if (ioc->shost_recovery) { spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); printk(MPT2SAS_ERR_FMT "%s: busy\n", ioc->name, __func__); return -EBUSY; } - ioc->ioc_reset_in_progress = 1; ioc->shost_recovery = 1; - if (ioc->shost->shost_state == SHOST_RUNNING) { - /* set back to SHOST_RUNNING in mpt2sas_scsih.c */ - scsi_host_set_state(ioc->shost, SHOST_RECOVERY); - printk(MPT2SAS_INFO_FMT "putting controller into " - "SHOST_RECOVERY\n", ioc->name); - } spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); @@ -3534,7 +3530,10 @@ ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); - ioc->ioc_reset_in_progress = 0; + ioc->shost_recovery = 0; spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); + + if (!r) + _base_reset_handler(ioc, MPT2_IOC_RUNNING); return r; } --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/qla2xxx/qla_attr.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/qla2xxx/qla_attr.c @@ -1654,7 +1654,8 @@ fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN); } - if (scsi_add_host(vha->host, &fc_vport->dev)) { + if (scsi_add_host_with_dma(vha->host, &fc_vport->dev, + &ha->pdev->dev)) { DEBUG15(printk("scsi(%ld): scsi_add_host failure for VP[%d].\n", vha->host_no, vha->vp_idx)); goto vport_create_failed_2; --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/megaraid/megaraid_sas.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/megaraid/megaraid_sas.c @@ -3032,7 +3032,7 @@ int error = 0, i; void *sense = NULL; dma_addr_t sense_handle; - u32 *sense_ptr; + unsigned long *sense_ptr; memset(kbuff_arr, 0, sizeof(kbuff_arr)); @@ -3109,7 +3109,7 @@ } sense_ptr = - (u32 *) ((unsigned long)cmd->frame + ioc->sense_off); + (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off); *sense_ptr = sense_handle; } @@ -3140,8 +3140,8 @@ * sense_ptr points to the location that has the user * sense buffer address */ - sense_ptr = (u32 *) ((unsigned long)ioc->frame.raw + - ioc->sense_off); + sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw + + ioc->sense_off); if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)), sense, ioc->sense_len)) { @@ -3451,7 +3451,7 @@ return retval; } -static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUGO, +static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUSR, megasas_sysfs_show_poll_mode_io, megasas_sysfs_set_poll_mode_io); --- linux-fsl-imx51-2.6.31.orig/drivers/scsi/lpfc/lpfc_init.c +++ linux-fsl-imx51-2.6.31/drivers/scsi/lpfc/lpfc_init.c @@ -2384,7 +2384,7 @@ vport->els_tmofunc.function = lpfc_els_timeout; vport->els_tmofunc.data = (unsigned long)vport; - error = scsi_add_host(shost, dev); + error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); if (error) goto out_put_shost; --- linux-fsl-imx51-2.6.31.orig/drivers/connector/connector.c +++ linux-fsl-imx51-2.6.31/drivers/connector/connector.c @@ -36,17 +36,6 @@ MODULE_AUTHOR("Evgeniy Polyakov "); MODULE_DESCRIPTION("Generic userspace <-> kernelspace connector."); -static u32 cn_idx = CN_IDX_CONNECTOR; -static u32 cn_val = CN_VAL_CONNECTOR; - -module_param(cn_idx, uint, 0); -module_param(cn_val, uint, 0); -MODULE_PARM_DESC(cn_idx, "Connector's main device idx."); -MODULE_PARM_DESC(cn_val, "Connector's main device val."); - -static DEFINE_MUTEX(notify_lock); -static LIST_HEAD(notify_list); - static struct cn_dev cdev; static int cn_already_initialized; @@ -129,21 +118,19 @@ /* * Callback helper - queues work and setup destructor for given data. */ -static int cn_call_callback(struct cn_msg *msg, void (*destruct_data)(void *), void *data) +static int cn_call_callback(struct sk_buff *skb) { struct cn_callback_entry *__cbq, *__new_cbq; struct cn_dev *dev = &cdev; + struct cn_msg *msg = NLMSG_DATA(nlmsg_hdr(skb)); int err = -ENODEV; spin_lock_bh(&dev->cbdev->queue_lock); list_for_each_entry(__cbq, &dev->cbdev->queue_list, callback_entry) { if (cn_cb_equal(&__cbq->id.id, &msg->id)) { if (likely(!work_pending(&__cbq->work) && - __cbq->data.ddata == NULL)) { - __cbq->data.callback_priv = msg; - - __cbq->data.ddata = data; - __cbq->data.destruct_data = destruct_data; + __cbq->data.skb == NULL)) { + __cbq->data.skb = skb; if (queue_cn_work(__cbq, &__cbq->work)) err = 0; @@ -156,10 +143,8 @@ __new_cbq = kzalloc(sizeof(struct cn_callback_entry), GFP_ATOMIC); if (__new_cbq) { d = &__new_cbq->data; - d->callback_priv = msg; + d->skb = skb; d->callback = __cbq->data.callback; - d->ddata = data; - d->destruct_data = destruct_data; d->free = __new_cbq; __new_cbq->pdev = __cbq->pdev; @@ -191,7 +176,6 @@ */ static void cn_rx_skb(struct sk_buff *__skb) { - struct cn_msg *msg; struct nlmsghdr *nlh; int err; struct sk_buff *skb; @@ -208,68 +192,20 @@ return; } - msg = NLMSG_DATA(nlh); - err = cn_call_callback(msg, (void (*)(void *))kfree_skb, skb); + err = cn_call_callback(skb); if (err < 0) kfree_skb(skb); } } /* - * Notification routing. - * - * Gets id and checks if there are notification request for it's idx - * and val. If there are such requests notify the listeners with the - * given notify event. - * - */ -static void cn_notify(struct cb_id *id, u32 notify_event) -{ - struct cn_ctl_entry *ent; - - mutex_lock(¬ify_lock); - list_for_each_entry(ent, ¬ify_list, notify_entry) { - int i; - struct cn_notify_req *req; - struct cn_ctl_msg *ctl = ent->msg; - int idx_found, val_found; - - idx_found = val_found = 0; - - req = (struct cn_notify_req *)ctl->data; - for (i = 0; i < ctl->idx_notify_num; ++i, ++req) { - if (id->idx >= req->first && - id->idx < req->first + req->range) { - idx_found = 1; - break; - } - } - - for (i = 0; i < ctl->val_notify_num; ++i, ++req) { - if (id->val >= req->first && - id->val < req->first + req->range) { - val_found = 1; - break; - } - } - - if (idx_found && val_found) { - struct cn_msg m = { .ack = notify_event, }; - - memcpy(&m.id, id, sizeof(m.id)); - cn_netlink_send(&m, ctl->group, GFP_KERNEL); - } - } - mutex_unlock(¬ify_lock); -} - -/* * Callback add routing - adds callback with given ID and name. * If there is registered callback with the same ID it will not be added. * * May sleep. */ -int cn_add_callback(struct cb_id *id, char *name, void (*callback)(void *)) +int cn_add_callback(struct cb_id *id, char *name, + void (*callback)(struct cn_msg *, struct netlink_skb_parms *)) { int err; struct cn_dev *dev = &cdev; @@ -281,8 +217,6 @@ if (err) return err; - cn_notify(id, 0); - return 0; } EXPORT_SYMBOL_GPL(cn_add_callback); @@ -300,112 +234,9 @@ struct cn_dev *dev = &cdev; cn_queue_del_callback(dev->cbdev, id); - cn_notify(id, 1); } EXPORT_SYMBOL_GPL(cn_del_callback); -/* - * Checks two connector's control messages to be the same. - * Returns 1 if they are the same or if the first one is corrupted. - */ -static int cn_ctl_msg_equals(struct cn_ctl_msg *m1, struct cn_ctl_msg *m2) -{ - int i; - struct cn_notify_req *req1, *req2; - - if (m1->idx_notify_num != m2->idx_notify_num) - return 0; - - if (m1->val_notify_num != m2->val_notify_num) - return 0; - - if (m1->len != m2->len) - return 0; - - if ((m1->idx_notify_num + m1->val_notify_num) * sizeof(*req1) != - m1->len) - return 1; - - req1 = (struct cn_notify_req *)m1->data; - req2 = (struct cn_notify_req *)m2->data; - - for (i = 0; i < m1->idx_notify_num; ++i) { - if (req1->first != req2->first || req1->range != req2->range) - return 0; - req1++; - req2++; - } - - for (i = 0; i < m1->val_notify_num; ++i) { - if (req1->first != req2->first || req1->range != req2->range) - return 0; - req1++; - req2++; - } - - return 1; -} - -/* - * Main connector device's callback. - * - * Used for notification of a request's processing. - */ -static void cn_callback(void *data) -{ - struct cn_msg *msg = data; - struct cn_ctl_msg *ctl; - struct cn_ctl_entry *ent; - u32 size; - - if (msg->len < sizeof(*ctl)) - return; - - ctl = (struct cn_ctl_msg *)msg->data; - - size = (sizeof(*ctl) + ((ctl->idx_notify_num + - ctl->val_notify_num) * - sizeof(struct cn_notify_req))); - - if (msg->len != size) - return; - - if (ctl->len + sizeof(*ctl) != msg->len) - return; - - /* - * Remove notification. - */ - if (ctl->group == 0) { - struct cn_ctl_entry *n; - - mutex_lock(¬ify_lock); - list_for_each_entry_safe(ent, n, ¬ify_list, notify_entry) { - if (cn_ctl_msg_equals(ent->msg, ctl)) { - list_del(&ent->notify_entry); - kfree(ent); - } - } - mutex_unlock(¬ify_lock); - - return; - } - - size += sizeof(*ent); - - ent = kzalloc(size, GFP_KERNEL); - if (!ent) - return; - - ent->msg = (struct cn_ctl_msg *)(ent + 1); - - memcpy(ent->msg, ctl, size - sizeof(*ent)); - - mutex_lock(¬ify_lock); - list_add(&ent->notify_entry, ¬ify_list); - mutex_unlock(¬ify_lock); -} - static int cn_proc_show(struct seq_file *m, void *v) { struct cn_queue_dev *dev = cdev.cbdev; @@ -443,11 +274,8 @@ static int __devinit cn_init(void) { struct cn_dev *dev = &cdev; - int err; dev->input = cn_rx_skb; - dev->id.idx = cn_idx; - dev->id.val = cn_val; dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR, CN_NETLINK_USERS + 0xf, @@ -463,14 +291,6 @@ cn_already_initialized = 1; - err = cn_add_callback(&dev->id, "connector", &cn_callback); - if (err) { - cn_already_initialized = 0; - cn_queue_free_dev(dev->cbdev); - netlink_kernel_release(dev->nls); - return -EINVAL; - } - proc_net_fops_create(&init_net, "connector", S_IRUGO, &cn_file_ops); return 0; @@ -484,7 +304,6 @@ proc_net_remove(&init_net, "connector"); - cn_del_callback(&dev->id); cn_queue_free_dev(dev->cbdev); netlink_kernel_release(dev->nls); } --- linux-fsl-imx51-2.6.31.orig/drivers/connector/cn_proc.c +++ linux-fsl-imx51-2.6.31/drivers/connector/cn_proc.c @@ -202,9 +202,9 @@ * cn_proc_mcast_ctl * @data: message sent from userspace via the connector */ -static void cn_proc_mcast_ctl(void *data) +static void cn_proc_mcast_ctl(struct cn_msg *msg, + struct netlink_skb_parms *nsp) { - struct cn_msg *msg = data; enum proc_cn_mcast_op *mc_op = NULL; int err = 0; --- linux-fsl-imx51-2.6.31.orig/drivers/connector/cn_queue.c +++ linux-fsl-imx51-2.6.31/drivers/connector/cn_queue.c @@ -78,16 +78,20 @@ struct cn_callback_entry *cbq = container_of(work, struct cn_callback_entry, work); struct cn_callback_data *d = &cbq->data; + struct cn_msg *msg = NLMSG_DATA(nlmsg_hdr(d->skb)); + struct netlink_skb_parms *nsp = &NETLINK_CB(d->skb); - d->callback(d->callback_priv); + d->callback(msg, nsp); - d->destruct_data(d->ddata); - d->ddata = NULL; + kfree_skb(d->skb); + d->skb = NULL; kfree(d->free); } -static struct cn_callback_entry *cn_queue_alloc_callback_entry(char *name, struct cb_id *id, void (*callback)(void *)) +static struct cn_callback_entry * +cn_queue_alloc_callback_entry(char *name, struct cb_id *id, + void (*callback)(struct cn_msg *, struct netlink_skb_parms *)) { struct cn_callback_entry *cbq; @@ -120,7 +124,8 @@ return ((i1->idx == i2->idx) && (i1->val == i2->val)); } -int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(void *)) +int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, + void (*callback)(struct cn_msg *, struct netlink_skb_parms *)) { struct cn_callback_entry *cbq, *__cbq; int found = 0; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/Makefile +++ linux-fsl-imx51-2.6.31/drivers/usb/Makefile @@ -42,3 +42,5 @@ obj-$(CONFIG_USB_ATM) += atm/ obj-$(CONFIG_USB_SPEEDTOUCH) += atm/ + +obj-$(CONFIG_USB_OTG) += otg/ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/otg_fsm.h +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/otg_fsm.h @@ -0,0 +1,151 @@ +/* Copyright (C) 2006-2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#if 0 +#define DEBUG 1 +#define VERBOSE 1 +#endif + +#ifdef DEBUG +#define DBG(fmt, args...) printk(KERN_DEBUG "j=%lu [%s] " fmt "\n", jiffies, \ + __func__, ## args) +#else +#define DBG(fmt, args...) do {} while (0) +#endif + +#ifdef VERBOSE +#define VDBG DBG +#else +#define VDBG(stuff...) do {} while (0) +#endif + +#ifdef VERBOSE +#define MPC_LOC printk("Current Location [%s]:[%d]\n", __FILE__, __LINE__) +#else +#define MPC_LOC do {} while (0) +#endif + +#define PROTO_UNDEF (0) +#define PROTO_HOST (1) +#define PROTO_GADGET (2) + +/* OTG state machine according to the OTG spec */ +struct otg_fsm { + /* Input */ + int a_bus_resume; + int a_bus_suspend; + int a_conn; + int a_sess_vld; + int a_srp_det; + int a_vbus_vld; + int b_bus_resume; + int b_bus_suspend; + int b_conn; + int b_se0_srp; + int b_sess_end; + int b_sess_vld; + int id; + + /* Internal variables */ + int a_set_b_hnp_en; + int b_srp_done; + int b_hnp_enable; + + /* Timeout indicator for timers */ + int a_wait_vrise_tmout; + int a_wait_bcon_tmout; + int a_aidl_bdis_tmout; + int b_ase0_brst_tmout; + + /* Informative variables */ + int a_bus_drop; + int a_bus_req; + int a_clr_err; + int a_suspend_req; + int b_bus_req; + + /* Output */ + int drv_vbus; + int loc_conn; + int loc_sof; + + struct otg_fsm_ops *ops; + struct otg_transceiver *transceiver; + + /* Current usb protocol used: 0:undefine; 1:host; 2:client */ + int protocol; + spinlock_t lock; +}; + +struct otg_fsm_ops { + void (*chrg_vbus)(int on); + void (*drv_vbus)(int on); + void (*loc_conn)(int on); + void (*loc_sof)(int on); + void (*start_pulse)(void); + void (*add_timer)(void *timer); + void (*del_timer)(void *timer); + int (*start_host)(struct otg_fsm *fsm, int on); + int (*start_gadget)(struct otg_fsm *fsm, int on); +}; + + +static inline void otg_chrg_vbus(struct otg_fsm *fsm, int on) +{ + fsm->ops->chrg_vbus(on); +} + +static inline void otg_drv_vbus(struct otg_fsm *fsm, int on) +{ + if (fsm->drv_vbus != on) { + fsm->drv_vbus = on; + fsm->ops->drv_vbus(on); + } +} + +static inline void otg_loc_conn(struct otg_fsm *fsm, int on) +{ + if (fsm->loc_conn != on) { + fsm->loc_conn = on; + fsm->ops->loc_conn(on); + } +} + +static inline void otg_loc_sof(struct otg_fsm *fsm, int on) +{ + if (fsm->loc_sof != on) { + fsm->loc_sof = on; + fsm->ops->loc_sof(on); + } +} + +static inline void otg_start_pulse(struct otg_fsm *fsm) +{ + fsm->ops->start_pulse(); +} + +static inline void otg_add_timer(struct otg_fsm *fsm, void *timer) +{ + fsm->ops->add_timer(timer); +} + +static inline void otg_del_timer(struct otg_fsm *fsm, void *timer) +{ + fsm->ops->del_timer(timer); +} + +int otg_statemachine(struct otg_fsm *fsm); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/fsl_otg.c +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/fsl_otg.c @@ -0,0 +1,1210 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Author: Li Yang + * Jerry Huang + * + * Initialization based on code from Shlomi Gridish. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "fsl_otg.h" + +#define CONFIG_USB_OTG_DEBUG_FILES +#define DRIVER_VERSION "$Revision: 1.55 $" +#define DRIVER_AUTHOR "Jerry Huang/Li Yang" +#define DRIVER_DESC "Freescale USB OTG Driver" +#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC + +MODULE_DESCRIPTION("Freescale USB OTG Transceiver Driver"); + +static const char driver_name[] = "fsl-usb2-otg"; + +const pm_message_t otg_suspend_state = { + .event = 1, +}; + +#define HA_DATA_PULSE 1 + +volatile static struct usb_dr_mmap *usb_dr_regs; +static struct fsl_otg *fsl_otg_dev; +static int srp_wait_done; + +/* FSM timers */ +struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, + *b_ase0_brst_tmr, *b_se0_srp_tmr; + +/* Driver specific timers */ +struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr, + *b_srp_wait_tmr, *a_wait_enum_tmr; + +static struct list_head active_timers; + +static struct fsl_otg_config fsl_otg_initdata = { + .otg_port = 1, +}; + +int write_ulpi(u8 addr, u8 data) +{ + u32 temp; + temp = 0x60000000 | (addr << 16) | data; + temp = cpu_to_le32(temp); + usb_dr_regs->ulpiview = temp; + return 0; +} + +/* prototype declaration */ +void fsl_otg_add_timer(void *timer); +void fsl_otg_del_timer(void *timer); + +/* -------------------------------------------------------------*/ +/* Operations that will be called from OTG Finite State Machine */ + +/* Charge vbus for vbus pulsing in SRP */ +void fsl_otg_chrg_vbus(int on) +{ + if (on) + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK & + ~OTGSC_CTRL_VBUS_DISCHARGE) | + OTGSC_CTRL_VBUS_CHARGE); + else + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK & ~OTGSC_CTRL_VBUS_CHARGE)); +} + +/* Discharge vbus through a resistor to ground */ +void fsl_otg_dischrg_vbus(int on) +{ + if (on) + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK) + | OTGSC_CTRL_VBUS_DISCHARGE); + else + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK & + ~OTGSC_CTRL_VBUS_DISCHARGE)); +} + +/* A-device driver vbus, controlled through PP bit in PORTSC */ +void fsl_otg_drv_vbus(int on) +{ +/* if (on) + usb_dr_regs->portsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->portsc) & + ~PORTSC_W1C_BITS) | PORTSC_PORT_POWER); + else + usb_dr_regs->portsc = + cpu_to_le32(le32_to_cpu(usb_dr_regs->portsc) & + ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER); +*/ +} + +/* + * Pull-up D+, signalling connect by periperal. Also used in + * data-line pulsing in SRP + */ +void fsl_otg_loc_conn(int on) +{ + if (on) + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK) | OTGSC_CTRL_DATA_PULSING); + else + usb_dr_regs->otgsc = + cpu_to_le32(le32_to_cpu(usb_dr_regs->otgsc) & + ~OTGSC_INTSTS_MASK & ~OTGSC_CTRL_DATA_PULSING); +} + +/* Generate SOF by host. This is controlled through suspend/resume the + * port. In host mode, controller will automatically send SOF. + * Suspend will block the data on the port. + */ +void fsl_otg_loc_sof(int on) +{ + u32 tmpval; + + tmpval = readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS; + if (on) + tmpval |= PORTSC_PORT_FORCE_RESUME; + else + tmpval |= PORTSC_PORT_SUSPEND; + writel(tmpval, &fsl_otg_dev->dr_mem_map->portsc); + +} + +/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */ +void fsl_otg_start_pulse(void) +{ + srp_wait_done = 0; +#ifdef HA_DATA_PULSE + usb_dr_regs->otgsc = + cpu_to_le32((le32_to_cpu(usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK) + | OTGSC_HA_DATA_PULSE); +#else + fsl_otg_loc_conn(1); +#endif + + fsl_otg_add_timer(b_data_pulse_tmr); +} + +void fsl_otg_pulse_vbus(void); + +void b_data_pulse_end(unsigned long foo) +{ +#ifdef HA_DATA_PULSE +#else + fsl_otg_loc_conn(0); +#endif + + /* Do VBUS pulse after data pulse */ + fsl_otg_pulse_vbus(); +} + +void fsl_otg_pulse_vbus(void) +{ + srp_wait_done = 0; + fsl_otg_chrg_vbus(1); + /* start the timer to end vbus charge */ + fsl_otg_add_timer(b_vbus_pulse_tmr); +} + +void b_vbus_pulse_end(unsigned long foo) +{ + fsl_otg_chrg_vbus(0); + + /* As USB3300 using the same a_sess_vld and b_sess_vld voltage + * we need to discharge the bus for a while to distinguish + * residual voltage of vbus pulsing and A device pull up */ + fsl_otg_dischrg_vbus(1); + fsl_otg_add_timer(b_srp_wait_tmr); +} + +void b_srp_end(unsigned long foo) +{ + fsl_otg_dischrg_vbus(0); + srp_wait_done = 1; + + if ((fsl_otg_dev->otg.state == OTG_STATE_B_SRP_INIT) && + fsl_otg_dev->fsm.b_sess_vld) + fsl_otg_dev->fsm.b_srp_done = 1; +} + +/* Workaround for a_host suspending too fast. When a_bus_req=0, + * a_host will start by SRP. It needs to set b_hnp_enable before + * actually suspending to start HNP + */ +void a_wait_enum(unsigned long foo) +{ + VDBG("a_wait_enum timeout\n"); + if (!fsl_otg_dev->otg.host->b_hnp_enable) + fsl_otg_add_timer(a_wait_enum_tmr); + else + otg_statemachine(&fsl_otg_dev->fsm); +} + +/* ------------------------------------------------------*/ + +/* The timeout callback function to set time out bit */ +void set_tmout(unsigned long indicator) +{ + *(int *)indicator = 1; +} + +/* Initialize timers */ +int fsl_otg_init_timers(struct otg_fsm *fsm) +{ + /* FSM used timers */ + a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, + (unsigned long)&fsm->a_wait_vrise_tmout); + if (a_wait_vrise_tmr == NULL) + return -ENOMEM; + + a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON, + (unsigned long)&fsm->a_wait_bcon_tmout); + if (a_wait_bcon_tmr == NULL) + return -ENOMEM; + + a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, + (unsigned long)&fsm->a_aidl_bdis_tmout); + if (a_aidl_bdis_tmr == NULL) + return -ENOMEM; + + b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST, + (unsigned long)&fsm->b_ase0_brst_tmout); + if (b_ase0_brst_tmr == NULL) + return -ENOMEM; + + b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, + (unsigned long)&fsm->b_se0_srp); + if (b_se0_srp_tmr == NULL) + return -ENOMEM; + + b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL, + (unsigned long)&fsm->b_srp_done); + if (b_srp_fail_tmr == NULL) + return -ENOMEM; + + a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10, + (unsigned long)&fsm); + if (a_wait_enum_tmr == NULL) + return -ENOMEM; + + /* device driver used timers */ + b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0); + if (b_srp_wait_tmr == NULL) + return -ENOMEM; + + b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end, + TB_DATA_PLS, 0); + if (b_data_pulse_tmr == NULL) + return -ENOMEM; + + b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end, + TB_VBUS_PLS, 0); + if (b_vbus_pulse_tmr == NULL) + return -ENOMEM; + + return 0; +} + +/* Uninitialize timers */ +void fsl_otg_uninit_timers(void) +{ + /* FSM used timers */ + if (a_wait_vrise_tmr != NULL) + kfree(a_wait_vrise_tmr); + if (a_wait_bcon_tmr != NULL) + kfree(a_wait_bcon_tmr); + if (a_aidl_bdis_tmr != NULL) + kfree(a_aidl_bdis_tmr); + if (b_ase0_brst_tmr != NULL) + kfree(b_ase0_brst_tmr); + if (b_se0_srp_tmr != NULL) + kfree(b_se0_srp_tmr); + if (b_srp_fail_tmr != NULL) + kfree(b_srp_fail_tmr); + if (a_wait_enum_tmr != NULL) + kfree(a_wait_enum_tmr); + + /* device driver used timers */ + if (b_srp_wait_tmr != NULL) + kfree(b_srp_wait_tmr); + if (b_data_pulse_tmr != NULL) + kfree(b_data_pulse_tmr); + if (b_vbus_pulse_tmr != NULL) + kfree(b_vbus_pulse_tmr); +} + +/* Add timer to timer list */ +void fsl_otg_add_timer(void *gtimer) +{ + struct fsl_otg_timer *timer = (struct fsl_otg_timer *)gtimer; + struct fsl_otg_timer *tmp_timer; + + /* Check if the timer is already in the active list, + * if so update timer count + */ + list_for_each_entry(tmp_timer, &active_timers, list) + if (tmp_timer == timer) { + timer->count = timer->expires; + return; + } + timer->count = timer->expires; + list_add_tail(&timer->list, &active_timers); +} + +/* Remove timer from the timer list; clear timeout status */ +void fsl_otg_del_timer(void *gtimer) +{ + struct fsl_otg_timer *timer = (struct fsl_otg_timer *)gtimer; + struct fsl_otg_timer *tmp_timer, *del_tmp; + + list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) + if (tmp_timer == timer) + list_del(&timer->list); +} + +/* Reduce timer count by 1, and find timeout conditions. + * Called by fsl_otg 1ms timer interrupt + */ +int fsl_otg_tick_timer(void) +{ + struct fsl_otg_timer *tmp_timer, *del_tmp; + int expired = 0; + + list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) { + tmp_timer->count--; + /* check if timer expires */ + if (!tmp_timer->count) { + list_del(&tmp_timer->list); + tmp_timer->function(tmp_timer->data); + expired = 1; + } + } + + return expired; +} + +/* Reset controller, not reset the bus */ +void otg_reset_controller(void) +{ + u32 command; + + command = readl(&usb_dr_regs->usbcmd); + command |= (1 << 1); + writel(command, &usb_dr_regs->usbcmd); + while (readl(&usb_dr_regs->usbcmd) & (1 << 1)) ; +} + +/* Call suspend/resume routines in host driver */ +int fsl_otg_start_host(struct otg_fsm *fsm, int on) +{ + struct otg_transceiver *xceiv = fsm->transceiver; + struct device *dev; + struct fsl_otg *otg_dev = container_of(xceiv, struct fsl_otg, otg); + struct platform_driver *host_pdrv; + struct platform_device *host_pdev; + u32 retval = 0; + + if (!xceiv->host) + return -ENODEV; + dev = xceiv->host->controller; + host_pdrv = container_of((dev->driver), struct platform_driver, driver); + host_pdev = to_platform_device(dev); + + /* Update a_vbus_vld state as a_vbus_vld int is disabled + * in device mode + */ + fsm->a_vbus_vld = + (le32_to_cpu(usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID) ? 1 : 0; + if (on) { + /* start fsl usb host controller */ + if (otg_dev->host_working) + goto end; + else { + otg_reset_controller(); + VDBG("host on......\n"); + if (host_pdrv->resume) { + retval = host_pdrv->resume(host_pdev); + if (fsm->id) { + /* default-b */ + fsl_otg_drv_vbus(1); + /* Workaround: b_host can't driver + * vbus, but PP in PORTSC needs to + * be 1 for host to work. + * So we set drv_vbus bit in + * transceiver to 0 thru ULPI. */ +#if defined(CONFIG_ISP1504_MXC) + write_ulpi(0x0c, 0x20); +#endif + } + } + + otg_dev->host_working = 1; + } + } else { + /* stop fsl usb host controller */ + if (!otg_dev->host_working) + goto end; + else { + VDBG("host off......\n"); + if (host_pdrv->suspend) { + retval = host_pdrv->suspend(host_pdev, + otg_suspend_state); + if (fsm->id) + /* default-b */ + fsl_otg_drv_vbus(0); + } + otg_dev->host_working = 0; + } + } +end: + return retval; +} + +/* Call suspend and resume function in udc driver + * to stop and start udc driver. + */ +int fsl_otg_start_gadget(struct otg_fsm *fsm, int on) +{ + struct otg_transceiver *xceiv = fsm->transceiver; + struct device *dev; + struct platform_driver *gadget_pdrv; + struct platform_device *gadget_pdev; + + if (!xceiv->gadget || !xceiv->gadget->dev.parent) + return -ENODEV; + + VDBG("gadget %s \n", on ? "on" : "off"); + dev = xceiv->gadget->dev.parent; + + gadget_pdrv = container_of((dev->driver), + struct platform_driver, driver); + gadget_pdev = to_platform_device(dev); + + if (on) + gadget_pdrv->resume(gadget_pdev); + else + gadget_pdrv->suspend(gadget_pdev, otg_suspend_state); + + return 0; +} + +/* Called by initialization code of host driver. Register host controller + * to the OTG. Suspend host for OTG role detection. + */ +static int fsl_otg_set_host(struct otg_transceiver *otg_p, struct usb_bus *host) +{ + struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg); + + if (!otg_p || otg_dev != fsl_otg_dev) + return -ENODEV; + + otg_p->host = host; + + otg_dev->fsm.a_bus_drop = 0; + otg_dev->fsm.a_bus_req = 1; + + if (host) { + VDBG("host off......\n"); + + otg_p->host->otg_port = fsl_otg_initdata.otg_port; + otg_p->host->is_b_host = otg_dev->fsm.id; + /* must leave time for khubd to finish its thing + * before yanking the host driver out from under it, + * so suspend the host after a short delay. + */ + otg_dev->host_working = 1; + schedule_delayed_work(&otg_dev->otg_event, 100); + return 0; + } else { /* host driver going away */ + + if (!(le32_to_cpu(otg_dev->dr_mem_map->otgsc) & + OTGSC_STS_USB_ID)) { + /* Mini-A cable connected */ + struct otg_fsm *fsm = &otg_dev->fsm; + + otg_p->state = OTG_STATE_UNDEFINED; + fsm->protocol = PROTO_UNDEF; + } + } + + otg_dev->host_working = 0; + + otg_statemachine(&otg_dev->fsm); + + return 0; +} + +/* Called by initialization code of udc. Register udc to OTG.*/ +static int fsl_otg_set_peripheral(struct otg_transceiver *otg_p, + struct usb_gadget *gadget) +{ + struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg); + + VDBG("otg_dev 0x%x\n", (int)otg_dev); + VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); + + if (!otg_p || otg_dev != fsl_otg_dev) + return -ENODEV; + + if (!gadget) { + if (!otg_dev->otg.default_a) + otg_p->gadget->ops->vbus_draw(otg_p->gadget, 0); + usb_gadget_vbus_disconnect(otg_dev->otg.gadget); + otg_dev->otg.gadget = 0; + otg_dev->fsm.b_bus_req = 0; + otg_statemachine(&otg_dev->fsm); + return 0; + } +#ifdef DEBUG + /* + * debug the initial state of the ID pin when only + * the gadget driver is loaded and no cable is connected. + * sometimes, we get an ID irq right + * after the udc driver's otg_get_transceiver() call + * that indicates that IDpin=0, which means a Mini-A + * connector is attached. not good. + */ + DBG("before: fsm.id ID pin=%d", otg_dev->fsm.id); + otg_dev->fsm.id = (otg_dev->dr_mem_map->otgsc & OTGSC_STS_USB_ID) ? + 1 : 0; + DBG("after: fsm.id ID pin=%d", otg_dev->fsm.id); + /*if (!otg_dev->fsm.id) { + printk("OTG Control = 0x%x\n", + isp1504_read(ISP1504_OTGCTL, + &otg_dev->dr_mem_map->ulpiview)); + } */ +#endif + + otg_p->gadget = gadget; + otg_p->gadget->is_a_peripheral = !otg_dev->fsm.id; + + otg_dev->fsm.b_bus_req = 1; + + /* start the gadget right away if the ID pin says Mini-B */ + DBG("ID pin=%d\n", otg_dev->fsm.id); + if (otg_dev->fsm.id == 1) { + fsl_otg_start_host(&otg_dev->fsm, 0); + otg_drv_vbus(&otg_dev->fsm, 0); + fsl_otg_start_gadget(&otg_dev->fsm, 1); + } + + return 0; +} + +/* Set OTG port power, only for B-device */ +static int fsl_otg_set_power(struct otg_transceiver *otg_p, unsigned mA) +{ + if (!fsl_otg_dev) + return -ENODEV; + if (otg_p->state == OTG_STATE_B_PERIPHERAL) + printk(KERN_INFO "FSL OTG:Draw %d mA\n", mA); + + return 0; +} + +/* Delayed pin detect interrupt processing. + * + * When the Mini-A cable is disconnected from the board, + * the pin-detect interrupt happens before the disconnnect + * interrupts for the connected device(s). In order to + * process the disconnect interrupt(s) prior to switching + * roles, the pin-detect interrupts are delayed, and handled + * by this routine. + */ +static void fsl_otg_event(struct work_struct *work) +{ + struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work); + struct otg_fsm *fsm = &og->fsm; + + if (fsm->id) { /* switch to gadget */ + fsl_otg_start_host(fsm, 0); + otg_drv_vbus(fsm, 0); + fsl_otg_start_gadget(fsm, 1); + } +} + +/* B-device start SRP */ +static int fsl_otg_start_srp(struct otg_transceiver *otg_p) +{ + struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg); + + if (!otg_p || otg_dev != fsl_otg_dev + || otg_p->state != OTG_STATE_B_IDLE) + return -ENODEV; + + otg_dev->fsm.b_bus_req = 1; + otg_statemachine(&otg_dev->fsm); + + return 0; +} + +/* A_host suspend will call this function to start hnp */ +static int fsl_otg_start_hnp(struct otg_transceiver *otg_p) +{ + struct fsl_otg *otg_dev = container_of(otg_p, struct fsl_otg, otg); + + if (!otg_p || otg_dev != fsl_otg_dev) + return -ENODEV; + + /* printk("start_hnp.............\n"); */ + /* clear a_bus_req to enter a_suspend state */ + otg_dev->fsm.a_bus_req = 0; + otg_statemachine(&otg_dev->fsm); + + return 0; +} + +/* Interrupt handler. OTG/host/peripheral share the same int line. + * OTG driver clears OTGSC interrupts and leaves USB interrupts + * intact. It needs to have knowledge of some USB interrupts + * such as port change. + */ +irqreturn_t fsl_otg_isr(int irq, void *dev_id) +{ + struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm; + struct otg_transceiver *otg = &((struct fsl_otg *)dev_id)->otg; + u32 otg_int_src, otg_sc; + + otg_sc = le32_to_cpu(usb_dr_regs->otgsc); + otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8); + + /* Only clear otg interrupts */ + usb_dr_regs->otgsc |= cpu_to_le32(otg_sc & OTGSC_INTSTS_MASK); + + /*FIXME: ID change not generate when init to 0 */ + fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; + otg->default_a = (fsm->id == 0); + + /* process OTG interrupts */ + if (otg_int_src) { + if (otg_int_src & OTGSC_INTSTS_USB_ID) { + fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; + otg->default_a = (fsm->id == 0); + /* clear conn information */ + if (fsm->id) + fsm->b_conn = 0; + else + fsm->a_conn = 0; + + if (otg->host) + otg->host->is_b_host = fsm->id; + if (otg->gadget) + otg->gadget->is_a_peripheral = !fsm->id; + VDBG("ID int (ID is %d)\n", fsm->id); + + if (fsm->id) { /* switch to gadget */ + schedule_delayed_work(&((struct fsl_otg *) + dev_id)->otg_event, + 100); + } else { /* switch to host */ + cancel_delayed_work(& + ((struct fsl_otg *)dev_id)-> + otg_event); + fsl_otg_start_gadget(fsm, 0); + otg_drv_vbus(fsm, 1); + fsl_otg_start_host(fsm, 1); + } + + return IRQ_HANDLED; + } + } + + return IRQ_NONE; +} + +static struct otg_fsm_ops fsl_otg_ops = { + .chrg_vbus = fsl_otg_chrg_vbus, + .drv_vbus = fsl_otg_drv_vbus, + .loc_conn = fsl_otg_loc_conn, + .loc_sof = fsl_otg_loc_sof, + .start_pulse = fsl_otg_start_pulse, + + .add_timer = fsl_otg_add_timer, + .del_timer = fsl_otg_del_timer, + + .start_host = fsl_otg_start_host, + .start_gadget = fsl_otg_start_gadget, +}; + +/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */ +static int fsl_otg_conf(struct platform_device *pdev) +{ + int status; + struct fsl_otg *fsl_otg_tc; + struct fsl_usb2_platform_data *pdata; + + pdata = pdev->dev.platform_data; + + DBG(); + + if (fsl_otg_dev) + return 0; + + /* allocate space to fsl otg device */ + fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL); + if (!fsl_otg_tc) + return -ENODEV; + + INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event); + + INIT_LIST_HEAD(&active_timers); + status = fsl_otg_init_timers(&fsl_otg_tc->fsm); + if (status) { + printk(KERN_INFO "Couldn't init OTG timers\n"); + fsl_otg_uninit_timers(); + kfree(fsl_otg_tc); + return status; + } + spin_lock_init(&fsl_otg_tc->fsm.lock); + + /* Set OTG state machine operations */ + fsl_otg_tc->fsm.ops = &fsl_otg_ops; + + /* initialize the otg structure */ + fsl_otg_tc->otg.label = DRIVER_DESC; + fsl_otg_tc->otg.set_host = fsl_otg_set_host; + fsl_otg_tc->otg.set_peripheral = fsl_otg_set_peripheral; + fsl_otg_tc->otg.set_power = fsl_otg_set_power; + fsl_otg_tc->otg.start_hnp = fsl_otg_start_hnp; + fsl_otg_tc->otg.start_srp = fsl_otg_start_srp; + + fsl_otg_dev = fsl_otg_tc; + + /* Store the otg transceiver */ + status = otg_set_transceiver(&fsl_otg_tc->otg); + if (status) { + printk(KERN_WARNING ": unable to register OTG transceiver.\n"); + return status; + } + + return 0; +} + +/* OTG Initialization*/ +int usb_otg_start(struct platform_device *pdev) +{ + struct fsl_otg *p_otg; + struct otg_transceiver *otg_trans = otg_get_transceiver(); + struct otg_fsm *fsm; + volatile unsigned long *p; + int status; + struct resource *res; + u32 temp; + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + + p_otg = container_of(otg_trans, struct fsl_otg, otg); + fsm = &p_otg->fsm; + + /* Initialize the state machine structure with default values */ + SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED); + fsm->transceiver = &p_otg->otg; + + /* We don't require predefined MEM/IRQ resource index */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; + + /* We don't request_mem_region here to enable resource sharing + * with host/device */ + + usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap)); + p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs; + pdata->regs = (void *)usb_dr_regs; + + /* request irq */ + p_otg->irq = platform_get_irq(pdev, 0); + status = request_irq(p_otg->irq, fsl_otg_isr, + IRQF_SHARED, driver_name, p_otg); + if (status) { + dev_dbg(p_otg->otg.dev, "can't get IRQ %d, error %d\n", + p_otg->irq, status); + iounmap(p_otg->dr_mem_map); + kfree(p_otg); + return status; + } + + if (pdata->platform_init && pdata->platform_init(pdev) != 0) + return -EINVAL; + + + /* Export DR controller resources */ + otg_set_resources(pdev->resource); + + /* stop the controller */ + temp = readl(&p_otg->dr_mem_map->usbcmd); + temp &= ~USB_CMD_RUN_STOP; + writel(temp, &p_otg->dr_mem_map->usbcmd); + + /* reset the controller */ + temp = readl(&p_otg->dr_mem_map->usbcmd); + temp |= USB_CMD_CTRL_RESET; + writel(temp, &p_otg->dr_mem_map->usbcmd); + + /* wait reset completed */ + while (readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET) ; + + /* configure the VBUSHS as IDLE(both host and device) */ + temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0); + writel(temp, &p_otg->dr_mem_map->usbmode); + + /* configure PHY interface */ + temp = readl(&p_otg->dr_mem_map->portsc); + temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW); + switch (pdata->phy_mode) { + case FSL_USB2_PHY_ULPI: + temp |= PORTSC_PTS_ULPI; + break; + case FSL_USB2_PHY_UTMI_WIDE: + temp |= PORTSC_PTW_16BIT; + /* fall through */ + case FSL_USB2_PHY_UTMI: + temp |= PORTSC_PTS_UTMI; + /* fall through */ + default: + break; + } + writel(temp, &p_otg->dr_mem_map->portsc); + + if (pdata->have_sysif_regs) { + /* configure control enable IO output, big endian register */ + p = (volatile unsigned long *)(&p_otg->dr_mem_map->control); + temp = *p; + temp |= USB_CTRL_IOENB; + *p = temp; + } + + /* disable all interrupt and clear all OTGSC status */ + temp = readl(&p_otg->dr_mem_map->otgsc); + temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK; + temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE; + writel(temp, &p_otg->dr_mem_map->otgsc); + + + /* + * The identification (id) input is FALSE when a Mini-A plug is inserted + * in the devices Mini-AB receptacle. Otherwise, this input is TRUE. + * Also: record initial state of ID pin + */ + if (le32_to_cpu(p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { + p_otg->otg.state = OTG_STATE_UNDEFINED; + p_otg->fsm.id = 1; + } else { + p_otg->otg.state = OTG_STATE_A_IDLE; + p_otg->fsm.id = 0; + } + + DBG("initial ID pin=%d\n", p_otg->fsm.id); + + /* enable OTG ID pin interrupt */ + temp = readl(&p_otg->dr_mem_map->otgsc); + temp |= OTGSC_INTR_USB_ID_EN; + temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN); + writel(temp, &p_otg->dr_mem_map->otgsc); + + return 0; +} + +/*------------------------------------------------------------------------- + PROC File System Support +-------------------------------------------------------------------------*/ +#ifdef CONFIG_USB_OTG_DEBUG_FILES + +#include + +static const char proc_filename[] = "driver/isp1504_otg"; + +static int otg_proc_read(char *page, char **start, off_t off, int count, + int *eof, void *_dev) +{ + struct otg_fsm *fsm = &fsl_otg_dev->fsm; + char *buf = page; + char *next = buf; + unsigned size = count; + unsigned long flags; + int t; + u32 tmp_reg; + + if (off != 0) + return 0; + + spin_lock_irqsave(&fsm->lock, flags); + + /* ------basic driver infomation ---- */ + t = scnprintf(next, size, + DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n", + DRIVER_VERSION); + size -= t; + next += t; + + /* ------ Registers ----- */ + tmp_reg = le32_to_cpu(usb_dr_regs->otgsc); + t = scnprintf(next, size, "OTGSC reg: %08x\n", tmp_reg); + size -= t; + next += t; + + tmp_reg = le32_to_cpu(usb_dr_regs->portsc); + t = scnprintf(next, size, "PORTSC reg: %08x\n", tmp_reg); + size -= t; + next += t; + + tmp_reg = le32_to_cpu(usb_dr_regs->usbmode); + t = scnprintf(next, size, "USBMODE reg: %08x\n", tmp_reg); + size -= t; + next += t; + + tmp_reg = le32_to_cpu(usb_dr_regs->usbcmd); + t = scnprintf(next, size, "USBCMD reg: %08x\n", tmp_reg); + size -= t; + next += t; + + tmp_reg = le32_to_cpu(usb_dr_regs->usbsts); + t = scnprintf(next, size, "USBSTS reg: %08x\n", tmp_reg); + size -= t; + next += t; + + /* ------ State ----- */ + t = scnprintf(next, size, + "OTG state: %s\n\n", + state_string(fsl_otg_dev->otg.state)); + size -= t; + next += t; + +#if 1 || defined DEBUG + /* ------ State Machine Variables ----- */ + t = scnprintf(next, size, "a_bus_req: %d\n", fsm->a_bus_req); + size -= t; + next += t; + + t = scnprintf(next, size, "b_bus_req: %d\n", fsm->b_bus_req); + size -= t; + next += t; + + t = scnprintf(next, size, "a_bus_resume: %d\n", fsm->a_bus_resume); + size -= t; + next += t; + + t = scnprintf(next, size, "a_bus_suspend: %d\n", fsm->a_bus_suspend); + size -= t; + next += t; + + t = scnprintf(next, size, "a_conn: %d\n", fsm->a_conn); + size -= t; + next += t; + + t = scnprintf(next, size, "a_sess_vld: %d\n", fsm->a_sess_vld); + size -= t; + next += t; + + t = scnprintf(next, size, "a_srp_det: %d\n", fsm->a_srp_det); + size -= t; + next += t; + + t = scnprintf(next, size, "a_vbus_vld: %d\n", fsm->a_vbus_vld); + size -= t; + next += t; + + t = scnprintf(next, size, "b_bus_resume: %d\n", fsm->b_bus_resume); + size -= t; + next += t; + + t = scnprintf(next, size, "b_bus_suspend: %d\n", fsm->b_bus_suspend); + size -= t; + next += t; + + t = scnprintf(next, size, "b_conn: %d\n", fsm->b_conn); + size -= t; + next += t; + + t = scnprintf(next, size, "b_se0_srp: %d\n", fsm->b_se0_srp); + size -= t; + next += t; + + t = scnprintf(next, size, "b_sess_end: %d\n", fsm->b_sess_end); + size -= t; + next += t; + + t = scnprintf(next, size, "b_sess_vld: %d\n", fsm->b_sess_vld); + size -= t; + next += t; + + t = scnprintf(next, size, "id: %d\n", fsm->id); + size -= t; + next += t; +#endif + + spin_unlock_irqrestore(&fsm->lock, flags); + + *eof = 1; + return count - size; +} + +#define create_proc_file() create_proc_read_entry(proc_filename, \ + 0, NULL, otg_proc_read, NULL) + +#define remove_proc_file() remove_proc_entry(proc_filename, NULL) + +#else /* !CONFIG_USB_OTG_DEBUG_FILES */ + +#define create_proc_file() do {} while (0) +#define remove_proc_file() do {} while (0) + +#endif /*CONFIG_USB_OTG_DEBUG_FILES */ + +/*----------------------------------------------------------*/ +/* Char driver interface to control some OTG input */ + +/* This function handle some ioctl command,such as get otg + * status and set host suspend + */ +static int fsl_otg_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + u32 retval = 0; + + switch (cmd) { + case GET_OTG_STATUS: + retval = fsl_otg_dev->host_working; + break; + + case SET_A_SUSPEND_REQ: + fsl_otg_dev->fsm.a_suspend_req = arg; + break; + + case SET_A_BUS_DROP: + fsl_otg_dev->fsm.a_bus_drop = arg; + break; + + case SET_A_BUS_REQ: + fsl_otg_dev->fsm.a_bus_req = arg; + break; + + case SET_B_BUS_REQ: + fsl_otg_dev->fsm.b_bus_req = arg; + break; + + default: + break; + } + + otg_statemachine(&fsl_otg_dev->fsm); + + return retval; +} + +static int fsl_otg_open(struct inode *inode, struct file *file) +{ + + return 0; +} + +static int fsl_otg_release(struct inode *inode, struct file *file) +{ + + return 0; +} + +static struct file_operations otg_fops = { + .owner = THIS_MODULE, + .llseek = NULL, + .read = NULL, + .write = NULL, + .ioctl = fsl_otg_ioctl, + .open = fsl_otg_open, + .release = fsl_otg_release, +}; + +static int __init fsl_otg_probe(struct platform_device *pdev) +{ + int status; + struct fsl_usb2_platform_data *pdata; + + DBG("pdev=0x%p\n", pdev); + + if (!pdev) + return -ENODEV; + + if (!pdev->dev.platform_data) + return -ENOMEM; + + pdata = pdev->dev.platform_data; + + /* configure the OTG */ + status = fsl_otg_conf(pdev); + if (status) { + printk(KERN_INFO "Couldn't init OTG module\n"); + return -status; + } + + /* start OTG */ + status = usb_otg_start(pdev); + + if (register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops)) { + printk(KERN_WARNING FSL_OTG_NAME + ": unable to register FSL OTG device\n"); + return -EIO; + } + + create_proc_file(); + return status; +} + +static int fsl_otg_remove(struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + + otg_set_transceiver(NULL); + free_irq(fsl_otg_dev->irq, fsl_otg_dev); + + iounmap((void *)usb_dr_regs); + + kfree(fsl_otg_dev); + + remove_proc_file(); + + unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME); + + if (pdata->platform_uninit) + pdata->platform_uninit(pdata); + + return 0; +} + +struct platform_driver fsl_otg_driver = { + .probe = fsl_otg_probe, + .remove = fsl_otg_remove, + .driver = { + .name = driver_name, + .owner = THIS_MODULE, + }, +}; + +/*-------------------------------------------------------------------------*/ + +static int __init fsl_usb_otg_init(void) +{ + printk(KERN_INFO DRIVER_DESC " loaded, %s\n", DRIVER_VERSION); + return platform_driver_register(&fsl_otg_driver); +} + +static void __exit fsl_usb_otg_exit(void) +{ + platform_driver_unregister(&fsl_otg_driver); + printk(KERN_INFO DRIVER_DESC " unloaded\n"); +} + +module_init(fsl_usb_otg_init); +module_exit(fsl_usb_otg_exit); + +MODULE_DESCRIPTION(DRIVER_INFO); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/Kconfig @@ -59,4 +59,16 @@ built-in with usb ip or which are autonomous and doesn't require any phy programming such as ISP1x04 etc. +config TRANSCEIVER_MXC_OTG + tristate "USB OTG pin detect support" + depends on (MC13783_MXC || ISP1504_MXC) && USB_GADGET && USB_EHCI_HCD && USB_OTG + help + Support for USB OTG PIN detect on MXC platforms. + +config UTMI_MXC_OTG + tristate "USB OTG pin detect support for UTMI PHY" + depends on USB_EHCI_FSL_UTMI && USB_GADGET && USB_EHCI_HCD && USB_OTG + help + Support for USB OTG PIN detect for UTMI PHY on MXC platforms. + endif # USB || OTG --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/otg_fsm.c +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/otg_fsm.c @@ -0,0 +1,371 @@ +/* OTG Finite State Machine from OTG spec + * + * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. + * + * Author: Li Yang + * Jerry Huang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include "otg_fsm.h" + + +/* Defined by device specific driver, for different timer implementation */ +extern void *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, + *b_ase0_brst_tmr, *b_se0_srp_tmr, *b_srp_fail_tmr, *a_wait_enum_tmr; + +const char *state_string(enum usb_otg_state state) +{ + switch (state) { + case OTG_STATE_A_IDLE: return "a_idle"; + case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise"; + case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon"; + case OTG_STATE_A_HOST: return "a_host"; + case OTG_STATE_A_SUSPEND: return "a_suspend"; + case OTG_STATE_A_PERIPHERAL: return "a_peripheral"; + case OTG_STATE_A_WAIT_VFALL: return "a_wait_vfall"; + case OTG_STATE_A_VBUS_ERR: return "a_vbus_err"; + case OTG_STATE_B_IDLE: return "b_idle"; + case OTG_STATE_B_SRP_INIT: return "b_srp_init"; + case OTG_STATE_B_PERIPHERAL: return "b_peripheral"; + case OTG_STATE_B_WAIT_ACON: return "b_wait_acon"; + case OTG_STATE_B_HOST: return "b_host"; + default: return "UNDEFINED"; + } +} + +/* Change USB protocol when there is a protocol change */ +static int otg_set_protocol(struct otg_fsm *fsm, int protocol) +{ + int ret = 0; + + if (fsm->protocol != protocol) { + VDBG("Changing role fsm->protocol= %d; new protocol= %d\n", + fsm->protocol, protocol); + /* stop old protocol */ + if (fsm->protocol == PROTO_HOST) + ret = fsm->ops->start_host(fsm, 0); + else if (fsm->protocol == PROTO_GADGET) + ret = fsm->ops->start_gadget(fsm, 0); + if (ret) + return ret; + + /* start new protocol */ + if (protocol == PROTO_HOST) + ret = fsm->ops->start_host(fsm, 1); + else if (protocol == PROTO_GADGET) + ret = fsm->ops->start_gadget(fsm, 1); + if (ret) + return ret; + + fsm->protocol = protocol; + return 0; + } + + return 0; +} + +static int state_changed; + +/* Called when leaving a state. Do state clean up jobs here */ +void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state) +{ + switch (old_state) { + case OTG_STATE_B_IDLE: + otg_del_timer(fsm, b_se0_srp_tmr); + fsm->b_se0_srp = 0; + break; + case OTG_STATE_B_SRP_INIT: + fsm->b_srp_done = 0; + break; + case OTG_STATE_B_PERIPHERAL: + break; + case OTG_STATE_B_WAIT_ACON: + otg_del_timer(fsm, b_ase0_brst_tmr); + fsm->b_ase0_brst_tmout = 0; + break; + case OTG_STATE_B_HOST: + break; + case OTG_STATE_A_IDLE: + break; + case OTG_STATE_A_WAIT_VRISE: + otg_del_timer(fsm, a_wait_vrise_tmr); + fsm->a_wait_vrise_tmout = 0; + break; + case OTG_STATE_A_WAIT_BCON: + otg_del_timer(fsm, a_wait_bcon_tmr); + fsm->a_wait_bcon_tmout = 0; + break; + case OTG_STATE_A_HOST: + otg_del_timer(fsm, a_wait_enum_tmr); + break; + case OTG_STATE_A_SUSPEND: + otg_del_timer(fsm, a_aidl_bdis_tmr); + fsm->a_aidl_bdis_tmout = 0; + fsm->a_suspend_req = 0; + break; + case OTG_STATE_A_PERIPHERAL: + break; + case OTG_STATE_A_WAIT_VFALL: + otg_del_timer(fsm, a_wait_vrise_tmr); + break; + case OTG_STATE_A_VBUS_ERR: + break; + default: + break; + } +} + +/* Called when entering a state */ +int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state) +{ + state_changed = 1; + if (fsm->transceiver->state == new_state) + return 0; + VDBG("Set state: %s \n", state_string(new_state)); + otg_leave_state(fsm, fsm->transceiver->state); + switch (new_state) { + case OTG_STATE_B_IDLE: + otg_drv_vbus(fsm, 0); + otg_chrg_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_UNDEF); + otg_add_timer(fsm, b_se0_srp_tmr); + break; + case OTG_STATE_B_SRP_INIT: + otg_start_pulse(fsm); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_UNDEF); + otg_add_timer(fsm, b_srp_fail_tmr); + break; + case OTG_STATE_B_PERIPHERAL: + otg_chrg_vbus(fsm, 0); + otg_loc_conn(fsm, 1); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_GADGET); + break; + case OTG_STATE_B_WAIT_ACON: + otg_chrg_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + otg_add_timer(fsm, b_ase0_brst_tmr); + fsm->a_bus_suspend = 0; + break; + case OTG_STATE_B_HOST: + otg_chrg_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 1); + otg_set_protocol(fsm, PROTO_HOST); + usb_bus_start_enum(fsm->transceiver->host, + fsm->transceiver->host->otg_port); + break; + case OTG_STATE_A_IDLE: + otg_drv_vbus(fsm, 0); + otg_chrg_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + break; + case OTG_STATE_A_WAIT_VRISE: + otg_drv_vbus(fsm, 1); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + otg_add_timer(fsm, a_wait_vrise_tmr); + break; + case OTG_STATE_A_WAIT_BCON: + otg_drv_vbus(fsm, 1); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + otg_add_timer(fsm, a_wait_bcon_tmr); + break; + case OTG_STATE_A_HOST: + otg_drv_vbus(fsm, 1); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 1); + otg_set_protocol(fsm, PROTO_HOST); + /* When HNP is triggered while a_bus_req = 0, a_host will + * suspend too fast to complete a_set_b_hnp_en */ + if (!fsm->a_bus_req || fsm->a_suspend_req) + otg_add_timer(fsm, a_wait_enum_tmr); + break; + case OTG_STATE_A_SUSPEND: + otg_drv_vbus(fsm, 1); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + otg_add_timer(fsm, a_aidl_bdis_tmr); + + break; + case OTG_STATE_A_PERIPHERAL: + otg_loc_conn(fsm, 1); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_GADGET); + otg_drv_vbus(fsm, 1); + break; + case OTG_STATE_A_WAIT_VFALL: + otg_drv_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_HOST); + break; + case OTG_STATE_A_VBUS_ERR: + otg_drv_vbus(fsm, 0); + otg_loc_conn(fsm, 0); + otg_loc_sof(fsm, 0); + otg_set_protocol(fsm, PROTO_UNDEF); + break; + default: + break; + } + + fsm->transceiver->state = new_state; + return 0; +} + +/* State change judgement */ +int otg_statemachine(struct otg_fsm *fsm) +{ + enum usb_otg_state state; + unsigned long flags; + + spin_lock_irqsave(&fsm->lock, flags); + + state = fsm->transceiver->state; + state_changed = 0; + /* State machine state change judgement */ + + switch (state) { + case OTG_STATE_UNDEFINED: + VDBG("fsm->id = %d \n", fsm->id); + if (fsm->id) + otg_set_state(fsm, OTG_STATE_B_IDLE); + else + otg_set_state(fsm, OTG_STATE_A_IDLE); + break; + case OTG_STATE_B_IDLE: + if (!fsm->id) + otg_set_state(fsm, OTG_STATE_A_IDLE); + else if (fsm->b_sess_vld && fsm->transceiver->gadget) + otg_set_state(fsm, OTG_STATE_B_PERIPHERAL); + else if (fsm->b_bus_req && fsm->b_sess_end && fsm->b_se0_srp) + otg_set_state(fsm, OTG_STATE_B_SRP_INIT); + break; + case OTG_STATE_B_SRP_INIT: + if (!fsm->id || fsm->b_srp_done) + otg_set_state(fsm, OTG_STATE_B_IDLE); + break; + case OTG_STATE_B_PERIPHERAL: + if (!fsm->id || !fsm->b_sess_vld) + otg_set_state(fsm, OTG_STATE_B_IDLE); + else if (fsm->b_bus_req && fsm->transceiver-> + gadget->b_hnp_enable && fsm->a_bus_suspend) + otg_set_state(fsm, OTG_STATE_B_WAIT_ACON); + break; + case OTG_STATE_B_WAIT_ACON: + if (fsm->a_conn) + otg_set_state(fsm, OTG_STATE_B_HOST); + else if (!fsm->id || !fsm->b_sess_vld) + otg_set_state(fsm, OTG_STATE_B_IDLE); + else if (fsm->a_bus_resume || fsm->b_ase0_brst_tmout) { + fsm->b_ase0_brst_tmout = 0; + otg_set_state(fsm, OTG_STATE_B_PERIPHERAL); + } + break; + case OTG_STATE_B_HOST: + if (!fsm->id || !fsm->b_sess_vld) + otg_set_state(fsm, OTG_STATE_B_IDLE); + else if (!fsm->b_bus_req || !fsm->a_conn) + otg_set_state(fsm, OTG_STATE_B_PERIPHERAL); + break; + case OTG_STATE_A_IDLE: + if (fsm->id) + otg_set_state(fsm, OTG_STATE_B_IDLE); + else if (!fsm->a_bus_drop && (fsm->a_bus_req || fsm->a_srp_det)) + otg_set_state(fsm, OTG_STATE_A_WAIT_VRISE); + break; + case OTG_STATE_A_WAIT_VRISE: + if (fsm->id || fsm->a_bus_drop || fsm->a_vbus_vld || + fsm->a_wait_vrise_tmout) { + otg_set_state(fsm, OTG_STATE_A_WAIT_BCON); + } + break; + case OTG_STATE_A_WAIT_BCON: + if (!fsm->a_vbus_vld) + otg_set_state(fsm, OTG_STATE_A_VBUS_ERR); + else if (fsm->b_conn) + otg_set_state(fsm, OTG_STATE_A_HOST); + else if (fsm->id | fsm->a_bus_drop | fsm->a_wait_bcon_tmout) + otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL); + break; + case OTG_STATE_A_HOST: + if ((!fsm->a_bus_req || fsm->a_suspend_req) && + fsm->transceiver->host->b_hnp_enable) + otg_set_state(fsm, OTG_STATE_A_SUSPEND); + else if (fsm->id || !fsm->b_conn || fsm->a_bus_drop) + otg_set_state(fsm, OTG_STATE_A_WAIT_BCON); + else if (!fsm->a_vbus_vld) + otg_set_state(fsm, OTG_STATE_A_VBUS_ERR); + break; + case OTG_STATE_A_SUSPEND: + if (!fsm->b_conn && fsm->transceiver->host->b_hnp_enable) + otg_set_state(fsm, OTG_STATE_A_PERIPHERAL); + else if (!fsm->b_conn && !fsm->transceiver->host->b_hnp_enable) + otg_set_state(fsm, OTG_STATE_A_WAIT_BCON); + else if (fsm->a_bus_req || fsm->b_bus_resume) + otg_set_state(fsm, OTG_STATE_A_HOST); + else if (fsm->id || fsm->a_bus_drop || fsm->a_aidl_bdis_tmout) + otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL); + else if (!fsm->a_vbus_vld) + otg_set_state(fsm, OTG_STATE_A_VBUS_ERR); + break; + case OTG_STATE_A_PERIPHERAL: + if (fsm->id || fsm->a_bus_drop) + otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL); + else if (fsm->b_bus_suspend) + otg_set_state(fsm, OTG_STATE_A_WAIT_BCON); + else if (!fsm->a_vbus_vld) + otg_set_state(fsm, OTG_STATE_A_VBUS_ERR); + break; + case OTG_STATE_A_WAIT_VFALL: + if (fsm->id || fsm->a_bus_req || (!fsm->a_sess_vld && + !fsm->b_conn)) + otg_set_state(fsm, OTG_STATE_A_IDLE); + break; + case OTG_STATE_A_VBUS_ERR: + if (fsm->id || fsm->a_bus_drop || fsm->a_clr_err) + otg_set_state(fsm, OTG_STATE_A_WAIT_VFALL); + break; + default: + break; + } + spin_unlock_irqrestore(&fsm->lock, flags); + + /* VDBG("quit statemachine, changed = %d \n", state_changed); */ + return state_changed; +} --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/Makefile +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/Makefile @@ -10,6 +10,9 @@ obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o +fsl_otg_arc-objs := fsl_otg.o otg_fsm.o +obj-$(CONFIG_ISP1504_MXC_OTG) += fsl_otg_arc.o +obj-$(CONFIG_UTMI_MXC_OTG) += fsl_otg_arc.o ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG ccflags-$(CONFIG_USB_GADGET_DEBUG) += -DDEBUG --- linux-fsl-imx51-2.6.31.orig/drivers/usb/otg/fsl_otg.h +++ linux-fsl-imx51-2.6.31/drivers/usb/otg/fsl_otg.h @@ -0,0 +1,413 @@ +/* Copyright 2005-2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include "otg_fsm.h" +#include +#include + + /* USB Command Register Bit Masks */ +#define USB_CMD_RUN_STOP (0x1<<0 ) +#define USB_CMD_CTRL_RESET (0x1<<1 ) +#define USB_CMD_PERIODIC_SCHEDULE_EN (0x1<<4 ) +#define USB_CMD_ASYNC_SCHEDULE_EN (0x1<<5 ) +#define USB_CMD_INT_AA_DOORBELL (0x1<<6 ) +#define USB_CMD_ASP (0x3<<8 ) +#define USB_CMD_ASYNC_SCH_PARK_EN (0x1<<11 ) +#define USB_CMD_SUTW (0x1<<13 ) +#define USB_CMD_ATDTW (0x1<<14 ) +#define USB_CMD_ITC (0xFF<<16) + +/* bit 15,3,2 are frame list size */ +#define USB_CMD_FRAME_SIZE_1024 (0x0<<15 | 0x0<<2) +#define USB_CMD_FRAME_SIZE_512 (0x0<<15 | 0x1<<2) +#define USB_CMD_FRAME_SIZE_256 (0x0<<15 | 0x2<<2) +#define USB_CMD_FRAME_SIZE_128 (0x0<<15 | 0x3<<2) +#define USB_CMD_FRAME_SIZE_64 (0x1<<15 | 0x0<<2) +#define USB_CMD_FRAME_SIZE_32 (0x1<<15 | 0x1<<2) +#define USB_CMD_FRAME_SIZE_16 (0x1<<15 | 0x2<<2) +#define USB_CMD_FRAME_SIZE_8 (0x1<<15 | 0x3<<2) + +/* bit 9-8 are async schedule park mode count */ +#define USB_CMD_ASP_00 (0x0<<8) +#define USB_CMD_ASP_01 (0x1<<8) +#define USB_CMD_ASP_10 (0x2<<8) +#define USB_CMD_ASP_11 (0x3<<8) +#define USB_CMD_ASP_BIT_POS (8) + +/* bit 23-16 are interrupt threshold control */ +#define USB_CMD_ITC_NO_THRESHOLD (0x00<<16) +#define USB_CMD_ITC_1_MICRO_FRM (0x01<<16) +#define USB_CMD_ITC_2_MICRO_FRM (0x02<<16) +#define USB_CMD_ITC_4_MICRO_FRM (0x04<<16) +#define USB_CMD_ITC_8_MICRO_FRM (0x08<<16) +#define USB_CMD_ITC_16_MICRO_FRM (0x10<<16) +#define USB_CMD_ITC_32_MICRO_FRM (0x20<<16) +#define USB_CMD_ITC_64_MICRO_FRM (0x40<<16) +#define USB_CMD_ITC_BIT_POS (16) + +/* USB Status Register Bit Masks */ +#define USB_STS_INT (0x1<<0 ) +#define USB_STS_ERR (0x1<<1 ) +#define USB_STS_PORT_CHANGE (0x1<<2 ) +#define USB_STS_FRM_LST_ROLL (0x1<<3 ) +#define USB_STS_SYS_ERR (0x1<<4 ) +#define USB_STS_IAA (0x1<<5 ) +#define USB_STS_RESET_RECEIVED (0x1<<6 ) +#define USB_STS_SOF (0x1<<7 ) +#define USB_STS_DCSUSPEND (0x1<<8 ) +#define USB_STS_HC_HALTED (0x1<<12) +#define USB_STS_RCL (0x1<<13) +#define USB_STS_PERIODIC_SCHEDULE (0x1<<14) +#define USB_STS_ASYNC_SCHEDULE (0x1<<15) + +/* USB Interrupt Enable Register Bit Masks */ +#define USB_INTR_INT_EN (0x1<<0 ) +#define USB_INTR_ERR_INT_EN (0x1<<1 ) +#define USB_INTR_PC_DETECT_EN (0x1<<2 ) +#define USB_INTR_FRM_LST_ROLL_EN (0x1<<3 ) +#define USB_INTR_SYS_ERR_EN (0x1<<4 ) +#define USB_INTR_ASYN_ADV_EN (0x1<<5 ) +#define USB_INTR_RESET_EN (0x1<<6 ) +#define USB_INTR_SOF_EN (0x1<<7 ) +#define USB_INTR_DEVICE_SUSPEND (0x1<<8 ) + +/* Device Address bit masks */ +#define USB_DEVICE_ADDRESS_MASK (0x7F<<25) +#define USB_DEVICE_ADDRESS_BIT_POS (25) +/* PORTSC Register Bit Masks,Only one PORT in OTG mode*/ +#define PORTSC_CURRENT_CONNECT_STATUS (0x1<<0) +#define PORTSC_CONNECT_STATUS_CHANGE (0x1<<1) +#define PORTSC_PORT_ENABLE (0x1<<2) +#define PORTSC_PORT_EN_DIS_CHANGE (0x1<<3) +#define PORTSC_OVER_CURRENT_ACT (0x1<<4) +#define PORTSC_OVER_CUURENT_CHG (0x1<<5) +#define PORTSC_PORT_FORCE_RESUME (0x1<<6) +#define PORTSC_PORT_SUSPEND (0x1<<7) +#define PORTSC_PORT_RESET (0x1<<8) +#define PORTSC_LINE_STATUS_BITS (0x3<<10) +#define PORTSC_PORT_POWER (0x1<<12) +#define PORTSC_PORT_INDICTOR_CTRL (0x3<<14) +#define PORTSC_PORT_TEST_CTRL (0xF<<16) +#define PORTSC_WAKE_ON_CONNECT_EN (0x1<<20) +#define PORTSC_WAKE_ON_CONNECT_DIS (0x1<<21) +#define PORTSC_WAKE_ON_OVER_CURRENT (0x1<<22) +#define PORTSC_PHY_LOW_POWER_SPD (0x1<<23) +#define PORTSC_PORT_FORCE_FULL_SPEED (0x1<<24) +#define PORTSC_PORT_SPEED_MASK (0x3<<26) +#define PORTSC_TRANSCEIVER_WIDTH (0x1<<28) +#define PORTSC_PHY_TYPE_SEL (0x3<<30) +/* bit 11-10 are line status */ +#define PORTSC_LINE_STATUS_SE0 (0x0<<10) +#define PORTSC_LINE_STATUS_JSTATE (0x1<<10) +#define PORTSC_LINE_STATUS_KSTATE (0x2<<10) +#define PORTSC_LINE_STATUS_UNDEF (0x3<<10) +#define PORTSC_LINE_STATUS_BIT_POS (10) + +/* bit 15-14 are port indicator control */ +#define PORTSC_PIC_OFF (0x0<<14) +#define PORTSC_PIC_AMBER (0x1<<14) +#define PORTSC_PIC_GREEN (0x2<<14) +#define PORTSC_PIC_UNDEF (0x3<<14) +#define PORTSC_PIC_BIT_POS (14) + +/* bit 19-16 are port test control */ +#define PORTSC_PTC_DISABLE (0x0<<16) +#define PORTSC_PTC_JSTATE (0x1<<16) +#define PORTSC_PTC_KSTATE (0x2<<16) +#define PORTSC_PTC_SEQNAK (0x3<<16) +#define PORTSC_PTC_PACKET (0x4<<16) +#define PORTSC_PTC_FORCE_EN (0x5<<16) +#define PORTSC_PTC_BIT_POS (16) + +/* bit 27-26 are port speed */ +#define PORTSC_PORT_SPEED_FULL (0x0<<26) +#define PORTSC_PORT_SPEED_LOW (0x1<<26) +#define PORTSC_PORT_SPEED_HIGH (0x2<<26) +#define PORTSC_PORT_SPEED_UNDEF (0x3<<26) +#define PORTSC_SPEED_BIT_POS (26) + +/* bit 28 is parallel transceiver width for UTMI interface */ +#define PORTSC_PTW (0x1<<28) +#define PORTSC_PTW_8BIT (0x0<<28) +#define PORTSC_PTW_16BIT (0x1<<28) + +/* bit 31-30 are port transceiver select */ +#define PORTSC_PTS_UTMI (0x0<<30) +#define PORTSC_PTS_ULPI (0x2<<30) +#define PORTSC_PTS_FSLS_SERIAL (0x3<<30) +#define PORTSC_PTS_BIT_POS (30) + +#define PORTSC_W1C_BITS \ + (PORTSC_CONNECT_STATUS_CHANGE | \ + PORTSC_PORT_EN_DIS_CHANGE | \ + PORTSC_OVER_CUURENT_CHG) + +/* OTG Status Control Register Bit Masks */ +#define OTGSC_CTRL_VBUS_DISCHARGE (0x1<<0) +#define OTGSC_CTRL_VBUS_CHARGE (0x1<<1) +#define OTGSC_CTRL_OTG_TERMINATION (0x1<<3) +#define OTGSC_CTRL_DATA_PULSING (0x1<<4) +#define OTGSC_CTRL_ID_PULL_EN (0x1<<5) +#define OTGSC_HA_DATA_PULSE (0x1<<6) +#define OTGSC_HA_BA (0x1<<7) +#define OTGSC_STS_USB_ID (0x1<<8) +#define OTGSC_STS_A_VBUS_VALID (0x1<<9) +#define OTGSC_STS_A_SESSION_VALID (0x1<<10) +#define OTGSC_STS_B_SESSION_VALID (0x1<<11) +#define OTGSC_STS_B_SESSION_END (0x1<<12) +#define OTGSC_STS_1MS_TOGGLE (0x1<<13) +#define OTGSC_STS_DATA_PULSING (0x1<<14) +#define OTGSC_INTSTS_USB_ID (0x1<<16) +#define OTGSC_INTSTS_A_VBUS_VALID (0x1<<17) +#define OTGSC_INTSTS_A_SESSION_VALID (0x1<<18) +#define OTGSC_INTSTS_B_SESSION_VALID (0x1<<19) +#define OTGSC_INTSTS_B_SESSION_END (0x1<<20) +#define OTGSC_INTSTS_1MS (0x1<<21) +#define OTGSC_INTSTS_DATA_PULSING (0x1<<22) +#define OTGSC_INTR_USB_ID_EN (0x1<<24) +#define OTGSC_INTR_A_VBUS_VALID_EN (0x1<<25) +#define OTGSC_INTR_A_SESSION_VALID_EN (0x1<<26) +#define OTGSC_INTR_B_SESSION_VALID_EN (0x1<<27) +#define OTGSC_INTR_B_SESSION_END_EN (0x1<<28) +#define OTGSC_INTR_1MS_TIMER_EN (0x1<<29) +#define OTGSC_INTR_DATA_PULSING_EN (0x1<<30) +#define OTGSC_INTSTS_MASK (0x00ff0000) + +/* USB MODE Register Bit Masks */ +#define USB_MODE_CTRL_MODE_IDLE (0x0<<0) +#define USB_MODE_CTRL_MODE_DEVICE (0x2<<0) +#define USB_MODE_CTRL_MODE_HOST (0x3<<0) +#define USB_MODE_CTRL_MODE_RSV (0x1<<0) +#define USB_MODE_SETUP_LOCK_OFF (0x1<<3) +#define USB_MODE_STREAM_DISABLE (0x1<<4) +#define USB_MODE_ES (0x1<<2) /* (big) Endian Select */ + +#define MPC8349_OTG_IRQ (38) +#define CFG_IMMR_BASE (0xfe000000) +#define MPC83xx_USB_DR_BASE (CFG_IMMR_BASE + 0x23000) + +/* control Register Bit Masks */ +#define USB_CTRL_IOENB (0x1<<2) +#define USB_CTRL_ULPI_INT0EN (0x1<<0) + +/* BCSR5 */ +#define BCSR5_INT_USB (0x02) + +/* USB module clk cfg */ +#define SCCR_OFFS (0xA08) +#define SCCR_USB_CLK_DISABLE (0x00000000) /* USB clk disable */ +#define SCCR_USB_MPHCM_11 (0x00c00000) +#define SCCR_USB_MPHCM_01 (0x00400000) +#define SCCR_USB_MPHCM_10 (0x00800000) +#define SCCR_USB_DRCM_11 (0x00300000) +#define SCCR_USB_DRCM_01 (0x00100000) +#define SCCR_USB_DRCM_10 (0x00200000) + +#define SICRL_OFFS (0x114) +#define SICRL_USB0 (0x40000000) +#define SICRL_USB1 (0x20000000) + +#define SICRH_OFFS (0x118) +#define SICRH_USB_UTMI (0x00020000) + +/* OTG interrupt enable bit masks */ +#define OTGSC_INTERRUPT_ENABLE_BITS_MASK \ + (OTGSC_INTR_USB_ID_EN | \ + OTGSC_INTR_1MS_TIMER_EN | \ + OTGSC_INTR_A_VBUS_VALID_EN | \ + OTGSC_INTR_A_SESSION_VALID_EN | \ + OTGSC_INTR_B_SESSION_VALID_EN | \ + OTGSC_INTR_B_SESSION_END_EN | \ + OTGSC_INTR_DATA_PULSING_EN) + +/* OTG interrupt status bit masks */ +#define OTGSC_INTERRUPT_STATUS_BITS_MASK \ + (OTGSC_INTSTS_USB_ID | \ + OTGSC_INTR_1MS_TIMER_EN | \ + OTGSC_INTSTS_A_VBUS_VALID | \ + OTGSC_INTSTS_A_SESSION_VALID | \ + OTGSC_INTSTS_B_SESSION_VALID | \ + OTGSC_INTSTS_B_SESSION_END | \ + OTGSC_INTSTS_DATA_PULSING) + +/* + * A-DEVICE timing constants + */ + +/* Wait for VBUS Rise */ +#define TA_WAIT_VRISE (100) /* a_wait_vrise 100 ms, section: 6.6.5.1 */ + +/* Wait for B-Connect */ +#define TA_WAIT_BCON (10000) /* a_wait_bcon > 1 sec, section: 6.6.5.2 + * This is only used to get out of + * OTG_STATE_A_WAIT_BCON state if there was + * no connection for these many milliseconds + */ + +/* A-Idle to B-Disconnect */ +/* It is necessary for this timer to be more than 750 ms because of a bug in OPT + * test 5.4 in which B OPT disconnects after 750 ms instead of 75ms as stated + * in the test description + */ +#define TA_AIDL_BDIS (5000) /* a_suspend minimum 200 ms, section: 6.6.5.3 */ + +/* B-Idle to A-Disconnect */ +#define TA_BIDL_ADIS (12) /* 3 to 200 ms */ + +/* B-device timing constants */ + + +/* Data-Line Pulse Time*/ +#define TB_DATA_PLS (10) /* b_srp_init,continue 5~10ms, section:5.3.3 */ +#define TB_DATA_PLS_MIN (5) /* minimum 5 ms */ +#define TB_DATA_PLS_MAX (10) /* maximum 10 ms */ + +/* SRP Initiate Time */ +#define TB_SRP_INIT (100) /* b_srp_init,maximum 100 ms, section:5.3.8 */ + +/* SRP Fail Time */ +#define TB_SRP_FAIL (7000) /* b_srp_init,Fail time 5~30s, section:6.8.2.2*/ + +/* SRP result wait time */ +#define TB_SRP_WAIT (60) + +/* VBus time */ +#define TB_VBUS_PLS (30) /* time to keep vbus pulsing asserted */ + +/* Discharge time */ +/* This time should be less than 10ms. It varies from system to system. */ +#define TB_VBUS_DSCHRG (8) + +/* A-SE0 to B-Reset */ +#define TB_ASE0_BRST (20) /* b_wait_acon, mini 3.125 ms,section:6.8.2.4 */ + +/* A bus suspend timer before we can switch to b_wait_aconn */ +#define TB_A_SUSPEND (7) +#define TB_BUS_RESUME (12) + +/* SE0 Time Before SRP */ +#define TB_SE0_SRP (2) /* b_idle,minimum 2 ms, section:5.3.2 */ + + +#define SET_OTG_STATE(otg_ptr, newstate) ((otg_ptr)->state=newstate) + +struct usb_dr_mmap { + /* Capability register */ + u8 res1[256]; + u16 caplength; /* Capability Register Length */ + u16 hciversion; /* Host Controller Interface Version */ + u32 hcsparams; /* Host Controller Structual Parameters */ + u32 hccparams; /* Host Controller Capability Parameters */ + u8 res2[20]; + u32 dciversion; /* Device Controller Interface Version */ + u32 dccparams; /* Device Controller Capability Parameters */ + u8 res3[24]; + /* Operation register */ + u32 usbcmd; /* USB Command Register */ + u32 usbsts; /* USB Status Register */ + u32 usbintr; /* USB Interrupt Enable Register */ + u32 frindex; /* Frame Index Register */ + u8 res4[4]; + u32 deviceaddr; /* Device Address */ + u32 endpointlistaddr; /* Endpoint List Address Register */ + u8 res5[4]; + u32 burstsize; /* Master Interface Data Burst Size Register */ + u32 txttfilltuning; /* Transmit FIFO Tuning Controls Register */ + u8 res6[8]; + u32 ulpiview; /* ULPI register access */ + u8 res7[12]; + u32 configflag; /* Configure Flag Register */ + u32 portsc; /* Port 1 Status and Control Register */ + u8 res8[28]; + u32 otgsc; /* On-The-Go Status and Control */ + u32 usbmode; /* USB Mode Register */ + u32 endptsetupstat; /* Endpoint Setup Status Register */ + u32 endpointprime; /* Endpoint Initialization Register */ + u32 endptflush; /* Endpoint Flush Register */ + u32 endptstatus; /* Endpoint Status Register */ + u32 endptcomplete; /* Endpoint Complete Register */ + u32 endptctrl[6]; /* Endpoint Control Registers */ + u8 res9[552]; + u32 snoop1; + u32 snoop2; + u32 age_cnt_thresh; /* Age Count Threshold Register */ + u32 pri_ctrl; /* Priority Control Register */ + u32 si_ctrl; /* System Interface Control Register */ + u8 res10[236]; +#ifdef CONFIG_ARCH_MX51 + u32 res11[128]; +#endif + u32 control; /* General Purpose Control Register */ +}; + + +struct fsl_otg_timer { + unsigned long expires; /* Number of count increase to timeout */ + unsigned long count; /* Tick counter */ + void (*function)(unsigned long); /* Timeout function */ + unsigned long data; /* Data passed to function */ + struct list_head list; +}; + +struct fsl_otg_timer inline *otg_timer_initializer +(void (*function)(unsigned long), unsigned long expires, unsigned long data) +{ + struct fsl_otg_timer *timer; + timer = kmalloc(sizeof(struct fsl_otg_timer), GFP_KERNEL); + if (timer == NULL) + return NULL; + timer->function = function; + timer->expires = expires; + timer->data = data; + return timer; +} + +struct fsl_otg { + struct otg_transceiver otg; + struct otg_fsm fsm; + struct usb_dr_mmap *dr_mem_map; + struct delayed_work otg_event; + + /*used for usb host */ + struct work_struct work_wq; + u8 host_working; + + int irq; +}; + +struct fsl_otg_config { + u8 otg_port; +}; + +/*For SRP and HNP handle*/ +#define FSL_OTG_MAJOR 66 +#define FSL_OTG_NAME "fsl-usb2-otg" +/*Command to OTG driver(ioctl)*/ +#define OTG_IOCTL_MAGIC FSL_OTG_MAJOR +/*if otg work as host,it should return 1,otherwise it return 0*/ +#define GET_OTG_STATUS _IOR(OTG_IOCTL_MAGIC, 1, int) +#define SET_A_SUSPEND_REQ _IOW(OTG_IOCTL_MAGIC, 2, int) +#define SET_A_BUS_DROP _IOW(OTG_IOCTL_MAGIC, 3, int) +#define SET_A_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 4, int) +#define SET_B_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 5, int) +#define GET_A_SUSPEND_REQ _IOR(OTG_IOCTL_MAGIC, 6, int) +#define GET_A_BUS_DROP _IOR(OTG_IOCTL_MAGIC, 7, int) +#define GET_A_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 8, int) +#define GET_B_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 9, int) + +extern const char *state_string(enum usb_otg_state state); +extern int otg_set_resources(struct resource *resources); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/misc/emi62.c +++ linux-fsl-imx51-2.6.31/drivers/usb/misc/emi62.c @@ -167,7 +167,7 @@ err("%s - error loading firmware: error = %d", __func__, err); goto wraperr; } - } while (i > 0); + } while (rec); /* Assert reset (stop the CPU in the EMI) */ err = emi62_set_reset(dev,1); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/misc/appledisplay.c +++ linux-fsl-imx51-2.6.31/drivers/usb/misc/appledisplay.c @@ -72,8 +72,8 @@ struct usb_device *udev; /* usb device */ struct urb *urb; /* usb request block */ struct backlight_device *bd; /* backlight device */ - char *urbdata; /* interrupt URB data buffer */ - char *msgdata; /* control message data buffer */ + u8 *urbdata; /* interrupt URB data buffer */ + u8 *msgdata; /* control message data buffer */ struct delayed_work work; int button_pressed; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/misc/iowarrior.c +++ linux-fsl-imx51-2.6.31/drivers/usb/misc/iowarrior.c @@ -373,7 +373,7 @@ case USB_DEVICE_ID_CODEMERCS_IOWPV2: case USB_DEVICE_ID_CODEMERCS_IOW40: /* IOW24 and IOW40 use a synchronous call */ - buf = kmalloc(8, GFP_KERNEL); /* 8 bytes are enough for both products */ + buf = kmalloc(count, GFP_KERNEL); if (!buf) { retval = -ENOMEM; goto exit; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/cp210x.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/cp210x.c @@ -51,6 +51,8 @@ static void cp210x_break_ctl(struct tty_struct *, int); static int cp210x_startup(struct usb_serial *); static void cp210x_disconnect(struct usb_serial *); +static void cp210x_dtr_rts(struct usb_serial_port *p, int on); +static int cp210x_carrier_raised(struct usb_serial_port *p); static int debug; @@ -114,6 +116,7 @@ { USB_DEVICE(0x166A, 0x0303) }, /* Clipsal 5500PCU C-Bus USB interface */ { USB_DEVICE(0x16D6, 0x0001) }, /* Jablotron serial interface */ { USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */ + { USB_DEVICE(0x413C, 0x9500) }, /* DW700 GPS USB interface */ { } /* Terminating Entry */ }; @@ -143,6 +146,8 @@ .tiocmset = cp210x_tiocmset, .attach = cp210x_startup, .disconnect = cp210x_disconnect, + .dtr_rts = cp210x_dtr_rts, + .carrier_raised = cp210x_carrier_raised }; /* Config request types */ @@ -399,12 +404,6 @@ /* Configure the termios structure */ cp210x_get_termios(tty, port); - - /* Set the DTR and RTS pins low */ - cp210x_tiocmset_port(tty ? (struct usb_serial_port *) tty->driver_data - : port, - NULL, TIOCM_DTR | TIOCM_RTS, 0); - return 0; } @@ -753,6 +752,14 @@ return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); } +static void cp210x_dtr_rts(struct usb_serial_port *p, int on) +{ + if (on) + cp210x_tiocmset_port(p, NULL, TIOCM_DTR|TIOCM_RTS, 0); + else + cp210x_tiocmset_port(p, NULL, 0, TIOCM_DTR|TIOCM_RTS); +} + static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) { struct usb_serial_port *port = tty->driver_data; @@ -775,6 +782,15 @@ return result; } +static int cp210x_carrier_raised(struct usb_serial_port *p) +{ + unsigned int control; + cp210x_get_config(p, CP210X_GET_MDMSTS, &control, 1); + if (control & CONTROL_DCD) + return 1; + return 0; +} + static void cp210x_break_ctl (struct tty_struct *tty, int break_state) { struct usb_serial_port *port = tty->driver_data; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/mos7720.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/mos7720.c @@ -1431,6 +1431,9 @@ case TIOCGICOUNT: cnow = mos7720_port->icount; + + memset(&icount, 0, sizeof(struct serial_icounter_struct)); + icount.cts = cnow.cts; icount.dsr = cnow.dsr; icount.rng = cnow.rng; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/cypress_m8.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/cypress_m8.c @@ -659,15 +659,7 @@ spin_unlock_irqrestore(&priv->lock, flags); /* Set termios */ - result = cypress_write(tty, port, NULL, 0); - - if (result) { - dev_err(&port->dev, - "%s - failed setting the control lines - error %d\n", - __func__, result); - return result; - } else - dbg("%s - success setting the control lines", __func__); + cypress_send(port); if (tty) cypress_set_termios(tty, port, &priv->tmp_termios); @@ -1005,6 +997,8 @@ dbg("%s - port %d", __func__, port->number); spin_lock_irqsave(&priv->lock, flags); + /* We can't clean this one up as we don't know the device type + early enough */ if (!priv->termios_initialized) { if (priv->chiptype == CT_EARTHMATE) { *(tty->termios) = tty_std_termios; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/ftdi_sio.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/ftdi_sio.c @@ -76,13 +76,7 @@ unsigned long last_dtr_rts; /* saved modem control outputs */ wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ char prev_status, diff_status; /* Used for TIOCMIWAIT */ - __u8 rx_flags; /* receive state flags (throttling) */ - spinlock_t rx_lock; /* spinlock for receive state */ - struct delayed_work rx_work; struct usb_serial_port *port; - int rx_processed; - unsigned long rx_bytes; - __u16 interface; /* FT2232C, FT2232H or FT4232H port interface (0 for FT232/245) */ @@ -176,6 +170,9 @@ { USB_DEVICE(FTDI_VID, FTDI_MICRO_CHAMELEON_PID) }, { USB_DEVICE(FTDI_VID, FTDI_RELAIS_PID) }, { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_PID) }, + { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_SNIFFER_PID) }, + { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_THROTTLE_PID) }, + { USB_DEVICE(FTDI_VID, FTDI_OPENDCC_GATEWAY_PID) }, { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_IOBOARD_PID) }, { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_MINI_IOBOARD_PID) }, { USB_DEVICE(FTDI_VID, FTDI_SPROG_II) }, @@ -694,6 +691,8 @@ { USB_DEVICE(DE_VID, WHT_PID) }, { USB_DEVICE(ADI_VID, ADI_GNICE_PID), .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, + { USB_DEVICE(ADI_VID, ADI_GNICEPLUS_PID), + .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, { USB_DEVICE(JETI_VID, JETI_SPC1201_PID) }, { USB_DEVICE(MARVELL_VID, MARVELL_SHEEVAPLUG_PID), .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, @@ -702,6 +701,8 @@ { USB_DEVICE(BAYER_VID, BAYER_CONTOUR_CABLE_PID) }, { USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID), .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, + { USB_DEVICE(FTDI_VID, HAMEG_HO820_PID) }, + { USB_DEVICE(FTDI_VID, HAMEG_HO870_PID) }, { }, /* Optional parameter entry */ { } /* Terminating entry */ }; @@ -730,10 +731,6 @@ /* Constants for read urb and write urb */ #define BUFSZ 512 -/* rx_flags */ -#define THROTTLED 0x01 -#define ACTUALLY_THROTTLED 0x02 - /* Used for TIOCMIWAIT */ #define FTDI_STATUS_B0_MASK (FTDI_RS0_CTS | FTDI_RS0_DSR | FTDI_RS0_RI | FTDI_RS0_RLSD) #define FTDI_STATUS_B1_MASK (FTDI_RS_BI) @@ -757,7 +754,7 @@ static int ftdi_chars_in_buffer(struct tty_struct *tty); static void ftdi_write_bulk_callback(struct urb *urb); static void ftdi_read_bulk_callback(struct urb *urb); -static void ftdi_process_read(struct work_struct *work); +static void ftdi_process_read(struct usb_serial_port *port); static void ftdi_set_termios(struct tty_struct *tty, struct usb_serial_port *port, struct ktermios *old); static int ftdi_tiocmget(struct tty_struct *tty, struct file *file); @@ -1228,7 +1225,6 @@ (new_serial.flags & ASYNC_FLAGS)); priv->custom_divisor = new_serial.custom_divisor; - tty->low_latency = (priv->flags & ASYNC_LOW_LATENCY) ? 1 : 0; write_latency_timer(port); check_and_exit: @@ -1521,7 +1517,6 @@ } kref_init(&priv->kref); - spin_lock_init(&priv->rx_lock); spin_lock_init(&priv->tx_lock); init_waitqueue_head(&priv->delta_msr_wait); /* This will push the characters through immediately rather @@ -1543,7 +1538,6 @@ port->read_urb->transfer_buffer_length = BUFSZ; } - INIT_DELAYED_WORK(&priv->rx_work, ftdi_process_read); priv->port = port; /* Free port's existing write urb and transfer buffer. */ @@ -1680,6 +1674,26 @@ return 0; } +static int ftdi_submit_read_urb(struct usb_serial_port *port, gfp_t mem_flags) +{ + struct urb *urb = port->read_urb; + struct usb_serial *serial = port->serial; + int result; + + usb_fill_bulk_urb(urb, serial->dev, + usb_rcvbulkpipe(serial->dev, + port->bulk_in_endpointAddress), + urb->transfer_buffer, + urb->transfer_buffer_length, + ftdi_read_bulk_callback, port); + result = usb_submit_urb(urb, mem_flags); + if (result) + dev_err(&port->dev, + "%s - failed submitting read urb, error %d\n", + __func__, result); + return result; +} + static int ftdi_open(struct tty_struct *tty, struct usb_serial_port *port, struct file *filp) { /* ftdi_open */ @@ -1695,12 +1709,6 @@ spin_lock_irqsave(&priv->tx_lock, flags); priv->tx_bytes = 0; spin_unlock_irqrestore(&priv->tx_lock, flags); - spin_lock_irqsave(&priv->rx_lock, flags); - priv->rx_bytes = 0; - spin_unlock_irqrestore(&priv->rx_lock, flags); - - if (tty) - tty->low_latency = (priv->flags & ASYNC_LOW_LATENCY) ? 1 : 0; write_latency_timer(port); @@ -1720,23 +1728,14 @@ ftdi_set_termios(tty, port, tty->termios); /* Not throttled */ - spin_lock_irqsave(&priv->rx_lock, flags); - priv->rx_flags &= ~(THROTTLED | ACTUALLY_THROTTLED); - spin_unlock_irqrestore(&priv->rx_lock, flags); + spin_lock_irqsave(&port->lock, flags); + port->throttled = 0; + port->throttle_req = 0; + spin_unlock_irqrestore(&port->lock, flags); /* Start reading from the device */ - priv->rx_processed = 0; - usb_fill_bulk_urb(port->read_urb, dev, - usb_rcvbulkpipe(dev, port->bulk_in_endpointAddress), - port->read_urb->transfer_buffer, - port->read_urb->transfer_buffer_length, - ftdi_read_bulk_callback, port); - result = usb_submit_urb(port->read_urb, GFP_KERNEL); - if (result) - dev_err(&port->dev, - "%s - failed submitting read urb, error %d\n", - __func__, result); - else + result = ftdi_submit_read_urb(port, GFP_KERNEL); + if (!result) kref_get(&priv->kref); return result; @@ -1782,10 +1781,6 @@ dbg("%s", __func__); - - /* cancel any scheduled reading */ - cancel_delayed_work_sync(&priv->rx_work); - /* shutdown our bulk read */ usb_kill_urb(port->read_urb); kref_put(&priv->kref, ftdi_sio_priv_release); @@ -1944,7 +1939,7 @@ return; } /* account for transferred data */ - countback = urb->actual_length; + countback = urb->transfer_buffer_length; data_offset = priv->write_offset; if (data_offset > 0) { /* Subtract the control bytes */ @@ -1957,7 +1952,6 @@ if (status) { dbg("nonzero write bulk status received: %d", status); - return; } usb_serial_port_softint(port); @@ -2008,271 +2002,121 @@ return buffered; } -static void ftdi_read_bulk_callback(struct urb *urb) +static int ftdi_process_packet(struct tty_struct *tty, + struct usb_serial_port *port, struct ftdi_private *priv, + char *packet, int len) { - struct usb_serial_port *port = urb->context; - struct tty_struct *tty; - struct ftdi_private *priv; - unsigned long countread; - unsigned long flags; - int status = urb->status; - - if (urb->number_of_packets > 0) { - dev_err(&port->dev, "%s transfer_buffer_length %d " - "actual_length %d number of packets %d\n", __func__, - urb->transfer_buffer_length, - urb->actual_length, urb->number_of_packets); - dev_err(&port->dev, "%s transfer_flags %x\n", __func__, - urb->transfer_flags); - } + int i; + char status; + char flag; + char *ch; dbg("%s - port %d", __func__, port->number); - if (port->port.count <= 0) - return; - - tty = tty_port_tty_get(&port->port); - if (!tty) { - dbg("%s - bad tty pointer - exiting", __func__); - return; + if (len < 2) { + dbg("malformed packet"); + return 0; } - priv = usb_get_serial_port_data(port); - if (!priv) { - dbg("%s - bad port private data pointer - exiting", __func__); - goto out; + /* Compare new line status to the old one, signal if different/ + N.B. packet may be processed more than once, but differences + are only processed once. */ + status = packet[0] & FTDI_STATUS_B0_MASK; + if (status != priv->prev_status) { + priv->diff_status |= status ^ priv->prev_status; + wake_up_interruptible(&priv->delta_msr_wait); + priv->prev_status = status; } - if (urb != port->read_urb) - dev_err(&port->dev, "%s - Not my urb!\n", __func__); - - if (status) { - /* This will happen at close every time so it is a dbg not an - err */ - dbg("(this is ok on close) nonzero read bulk status received: %d", status); - goto out; + /* + * Although the device uses a bitmask and hence can have multiple + * errors on a packet - the order here sets the priority the error is + * returned to the tty layer. + */ + flag = TTY_NORMAL; + if (packet[1] & FTDI_RS_OE) { + flag = TTY_OVERRUN; + dbg("OVERRRUN error"); + } + if (packet[1] & FTDI_RS_BI) { + flag = TTY_BREAK; + dbg("BREAK received"); + usb_serial_handle_break(port); + } + if (packet[1] & FTDI_RS_PE) { + flag = TTY_PARITY; + dbg("PARITY error"); + } + if (packet[1] & FTDI_RS_FE) { + flag = TTY_FRAME; + dbg("FRAMING error"); } - /* count data bytes, but not status bytes */ - countread = urb->actual_length; - countread -= 2 * DIV_ROUND_UP(countread, priv->max_packet_size); - spin_lock_irqsave(&priv->rx_lock, flags); - priv->rx_bytes += countread; - spin_unlock_irqrestore(&priv->rx_lock, flags); - - ftdi_process_read(&priv->rx_work.work); -out: - tty_kref_put(tty); -} /* ftdi_read_bulk_callback */ + len -= 2; + if (!len) + return 0; /* status only */ + ch = packet + 2; + if (!(port->console && port->sysrq) && flag == TTY_NORMAL) + tty_insert_flip_string(tty, ch, len); + else { + for (i = 0; i < len; i++, ch++) { + if (!usb_serial_handle_sysrq_char(tty, port, *ch)) + tty_insert_flip_char(tty, *ch, flag); + } + } + return len; +} -static void ftdi_process_read(struct work_struct *work) -{ /* ftdi_process_read */ - struct ftdi_private *priv = - container_of(work, struct ftdi_private, rx_work.work); - struct usb_serial_port *port = priv->port; - struct urb *urb; +static void ftdi_process_read(struct usb_serial_port *port) +{ + struct urb *urb = port->read_urb; struct tty_struct *tty; - char error_flag; - unsigned char *data; - + struct ftdi_private *priv = usb_get_serial_port_data(port); + char *data = (char *)urb->transfer_buffer; int i; - int result; - int need_flip; - int packet_offset; - unsigned long flags; - - dbg("%s - port %d", __func__, port->number); - - if (port->port.count <= 0) - return; + int len; + int count = 0; tty = tty_port_tty_get(&port->port); - if (!tty) { - dbg("%s - bad tty pointer - exiting", __func__); + if (!tty) return; - } - priv = usb_get_serial_port_data(port); - if (!priv) { - dbg("%s - bad port private data pointer - exiting", __func__); - goto out; + for (i = 0; i < urb->actual_length; i += priv->max_packet_size) { + len = min_t(int, urb->actual_length - i, priv->max_packet_size); + count += ftdi_process_packet(tty, port, priv, &data[i], len); } - urb = port->read_urb; - if (!urb) { - dbg("%s - bad read_urb pointer - exiting", __func__); - goto out; - } - - data = urb->transfer_buffer; - - if (priv->rx_processed) { - dbg("%s - already processed: %d bytes, %d remain", __func__, - priv->rx_processed, - urb->actual_length - priv->rx_processed); - } else { - /* The first two bytes of every read packet are status */ - if (urb->actual_length > 2) - usb_serial_debug_data(debug, &port->dev, __func__, - urb->actual_length, data); - else - dbg("Status only: %03oo %03oo", data[0], data[1]); - } - - - /* TO DO -- check for hung up line and handle appropriately: */ - /* send hangup */ - /* See acm.c - you do a tty_hangup - eg tty_hangup(tty) */ - /* if CD is dropped and the line is not CLOCAL then we should hangup */ - - need_flip = 0; - for (packet_offset = priv->rx_processed; - packet_offset < urb->actual_length; packet_offset += priv->max_packet_size) { - int length; - - /* Compare new line status to the old one, signal if different/ - N.B. packet may be processed more than once, but differences - are only processed once. */ - char new_status = data[packet_offset + 0] & - FTDI_STATUS_B0_MASK; - if (new_status != priv->prev_status) { - priv->diff_status |= - new_status ^ priv->prev_status; - wake_up_interruptible(&priv->delta_msr_wait); - priv->prev_status = new_status; - } - - length = min_t(u32, priv->max_packet_size, urb->actual_length-packet_offset)-2; - if (length < 0) { - dev_err(&port->dev, "%s - bad packet length: %d\n", - __func__, length+2); - length = 0; - } - - if (priv->rx_flags & THROTTLED) { - dbg("%s - throttled", __func__); - break; - } - if (tty_buffer_request_room(tty, length) < length) { - /* break out & wait for throttling/unthrottling to - happen */ - dbg("%s - receive room low", __func__); - break; - } - - /* Handle errors and break */ - error_flag = TTY_NORMAL; - /* Although the device uses a bitmask and hence can have - multiple errors on a packet - the order here sets the - priority the error is returned to the tty layer */ - - if (data[packet_offset+1] & FTDI_RS_OE) { - error_flag = TTY_OVERRUN; - dbg("OVERRRUN error"); - } - if (data[packet_offset+1] & FTDI_RS_BI) { - error_flag = TTY_BREAK; - dbg("BREAK received"); - usb_serial_handle_break(port); - } - if (data[packet_offset+1] & FTDI_RS_PE) { - error_flag = TTY_PARITY; - dbg("PARITY error"); - } - if (data[packet_offset+1] & FTDI_RS_FE) { - error_flag = TTY_FRAME; - dbg("FRAMING error"); - } - if (length > 0) { - for (i = 2; i < length+2; i++) { - /* Note that the error flag is duplicated for - every character received since we don't know - which character it applied to */ - if (!usb_serial_handle_sysrq_char(tty, port, - data[packet_offset + i])) - tty_insert_flip_char(tty, - data[packet_offset + i], - error_flag); - } - need_flip = 1; - } - -#ifdef NOT_CORRECT_BUT_KEEPING_IT_FOR_NOW - /* if a parity error is detected you get status packets forever - until a character is sent without a parity error. - This doesn't work well since the application receives a - never ending stream of bad data - even though new data - hasn't been sent. Therefore I (bill) have taken this out. - However - this might make sense for framing errors and so on - so I am leaving the code in for now. - */ - else { - if (error_flag != TTY_NORMAL) { - dbg("error_flag is not normal"); - /* In this case it is just status - if that is - an error send a bad character */ - if (tty->flip.count >= TTY_FLIPBUF_SIZE) - tty_flip_buffer_push(tty); - tty_insert_flip_char(tty, 0xff, error_flag); - need_flip = 1; - } - } -#endif - } /* "for(packet_offset=0..." */ - - /* Low latency */ - if (need_flip) + if (count) tty_flip_buffer_push(tty); + tty_kref_put(tty); +} - if (packet_offset < urb->actual_length) { - /* not completely processed - record progress */ - priv->rx_processed = packet_offset; - dbg("%s - incomplete, %d bytes processed, %d remain", - __func__, packet_offset, - urb->actual_length - packet_offset); - /* check if we were throttled while processing */ - spin_lock_irqsave(&priv->rx_lock, flags); - if (priv->rx_flags & THROTTLED) { - priv->rx_flags |= ACTUALLY_THROTTLED; - spin_unlock_irqrestore(&priv->rx_lock, flags); - dbg("%s - deferring remainder until unthrottled", - __func__); - goto out; - } - spin_unlock_irqrestore(&priv->rx_lock, flags); - /* if the port is closed stop trying to read */ - if (port->port.count > 0) - /* delay processing of remainder */ - schedule_delayed_work(&priv->rx_work, 1); - else - dbg("%s - port is closed", __func__); - goto out; - } - - /* urb is completely processed */ - priv->rx_processed = 0; +static void ftdi_read_bulk_callback(struct urb *urb) +{ + struct usb_serial_port *port = urb->context; + unsigned long flags; - /* if the port is closed stop trying to read */ - if (port->port.count > 0) { - /* Continue trying to always read */ - usb_fill_bulk_urb(port->read_urb, port->serial->dev, - usb_rcvbulkpipe(port->serial->dev, - port->bulk_in_endpointAddress), - port->read_urb->transfer_buffer, - port->read_urb->transfer_buffer_length, - ftdi_read_bulk_callback, port); + dbg("%s - port %d", __func__, port->number); - result = usb_submit_urb(port->read_urb, GFP_ATOMIC); - if (result) - dev_err(&port->dev, - "%s - failed resubmitting read urb, error %d\n", - __func__, result); + if (urb->status) { + dbg("%s - nonzero read bulk status received: %d", + __func__, urb->status); + return; } -out: - tty_kref_put(tty); -} /* ftdi_process_read */ + usb_serial_debug_data(debug, &port->dev, __func__, + urb->actual_length, urb->transfer_buffer); + ftdi_process_read(port); + + spin_lock_irqsave(&port->lock, flags); + port->throttled = port->throttle_req; + if (!port->throttled) { + spin_unlock_irqrestore(&port->lock, flags); + ftdi_submit_read_urb(port, GFP_ATOMIC); + } else + spin_unlock_irqrestore(&port->lock, flags); +} static void ftdi_break_ctl(struct tty_struct *tty, int break_state) { @@ -2604,33 +2448,31 @@ static void ftdi_throttle(struct tty_struct *tty) { struct usb_serial_port *port = tty->driver_data; - struct ftdi_private *priv = usb_get_serial_port_data(port); unsigned long flags; dbg("%s - port %d", __func__, port->number); - spin_lock_irqsave(&priv->rx_lock, flags); - priv->rx_flags |= THROTTLED; - spin_unlock_irqrestore(&priv->rx_lock, flags); + spin_lock_irqsave(&port->lock, flags); + port->throttle_req = 1; + spin_unlock_irqrestore(&port->lock, flags); } - -static void ftdi_unthrottle(struct tty_struct *tty) +void ftdi_unthrottle(struct tty_struct *tty) { struct usb_serial_port *port = tty->driver_data; - struct ftdi_private *priv = usb_get_serial_port_data(port); - int actually_throttled; + int was_throttled; unsigned long flags; dbg("%s - port %d", __func__, port->number); - spin_lock_irqsave(&priv->rx_lock, flags); - actually_throttled = priv->rx_flags & ACTUALLY_THROTTLED; - priv->rx_flags &= ~(THROTTLED | ACTUALLY_THROTTLED); - spin_unlock_irqrestore(&priv->rx_lock, flags); - - if (actually_throttled) - schedule_delayed_work(&priv->rx_work, 0); + spin_lock_irqsave(&port->lock, flags); + was_throttled = port->throttled; + port->throttled = port->throttle_req = 0; + spin_unlock_irqrestore(&port->lock, flags); + + /* Resubmit urb if throttled and open. */ + if (was_throttled && test_bit(ASYNCB_INITIALIZED, &port->port.flags)) + ftdi_submit_read_urb(port, GFP_KERNEL); } static int __init ftdi_init(void) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/empeg.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/empeg.c @@ -90,8 +90,7 @@ static void empeg_throttle(struct tty_struct *tty); static void empeg_unthrottle(struct tty_struct *tty); static int empeg_startup(struct usb_serial *serial); -static void empeg_set_termios(struct tty_struct *tty, - struct usb_serial_port *port, struct ktermios *old_termios); +static void empeg_init_termios(struct tty_struct *tty); static void empeg_write_bulk_callback(struct urb *urb); static void empeg_read_bulk_callback(struct urb *urb); @@ -123,7 +122,7 @@ .throttle = empeg_throttle, .unthrottle = empeg_unthrottle, .attach = empeg_startup, - .set_termios = empeg_set_termios, + .init_termios = empeg_init_termios, .write = empeg_write, .write_room = empeg_write_room, .chars_in_buffer = empeg_chars_in_buffer, @@ -150,9 +149,6 @@ dbg("%s - port %d", __func__, port->number); - /* Force default termio settings */ - empeg_set_termios(tty, port, NULL) ; - bytes_in = 0; bytes_out = 0; @@ -425,11 +421,9 @@ } -static void empeg_set_termios(struct tty_struct *tty, - struct usb_serial_port *port, struct ktermios *old_termios) +static void empeg_init_termios(struct tty_struct *tty) { struct ktermios *termios = tty->termios; - dbg("%s - port %d", __func__, port->number); /* * The empeg-car player wants these particular tty settings. --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/pl2303.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/pl2303.c @@ -96,6 +96,7 @@ { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) }, + { USB_DEVICE(SANWA_VENDOR_ID, SANWA_PRODUCT_ID) }, { } /* Terminating entry */ }; @@ -994,13 +995,15 @@ /* overrun is special, not associated with a char */ if (line_status & UART_OVERRUN_ERROR) tty_insert_flip_char(tty, 0, TTY_OVERRUN); - if (port->console && port->sysrq) { + + if (tty_flag == TTY_NORMAL && !(port->console && port->sysrq)) + tty_insert_flip_string(tty, data, urb->actual_length); + else { int i; for (i = 0; i < urb->actual_length; ++i) if (!usb_serial_handle_sysrq_char(tty, port, data[i])) tty_insert_flip_char(tty, data[i], tty_flag); - } else - tty_insert_flip_string(tty, data, urb->actual_length); + } tty_flip_buffer_push(tty); } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/digi_acceleport.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/digi_acceleport.c @@ -899,16 +899,16 @@ spin_lock_irqsave(&priv->dp_port_lock, flags); - /* turn throttle off */ - priv->dp_throttled = 0; - priv->dp_throttle_restart = 0; - /* restart read chain */ if (priv->dp_throttle_restart) { port->read_urb->dev = port->serial->dev; ret = usb_submit_urb(port->read_urb, GFP_ATOMIC); } + /* turn throttle off */ + priv->dp_throttled = 0; + priv->dp_throttle_restart = 0; + spin_unlock_irqrestore(&priv->dp_port_lock, flags); if (ret) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/whiteheat.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/whiteheat.c @@ -259,7 +259,7 @@ __u8 *data, __u8 datasize); static int firm_open(struct usb_serial_port *port); static int firm_close(struct usb_serial_port *port); -static int firm_setup_port(struct tty_struct *tty); +static void firm_setup_port(struct tty_struct *tty); static int firm_set_rts(struct usb_serial_port *port, __u8 onoff); static int firm_set_dtr(struct usb_serial_port *port, __u8 onoff); static int firm_set_break(struct usb_serial_port *port, __u8 onoff); @@ -1211,7 +1211,7 @@ } -static int firm_setup_port(struct tty_struct *tty) +static void firm_setup_port(struct tty_struct *tty) { struct usb_serial_port *port = tty->driver_data; struct whiteheat_port_settings port_settings; @@ -1286,7 +1286,7 @@ port_settings.lloop = 0; /* now send the message to the device */ - return firm_send_command(port, WHITEHEAT_SETUP_PORT, + firm_send_command(port, WHITEHEAT_SETUP_PORT, (__u8 *)&port_settings, sizeof(port_settings)); } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/pl2303.h +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/pl2303.h @@ -130,3 +130,7 @@ /* Sony, USB data cable for CMD-Jxx mobile phones */ #define SONY_VENDOR_ID 0x054c #define SONY_QN3USB_PRODUCT_ID 0x0437 + +/* Sanwa KB-USB2 multimeter cable (ID: 11ad:0001) */ +#define SANWA_VENDOR_ID 0x11ad +#define SANWA_PRODUCT_ID 0x0001 --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/spcp8x5.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/spcp8x5.c @@ -299,7 +299,6 @@ wait_queue_head_t delta_msr_wait; u8 line_control; u8 line_status; - u8 termios_initialized; }; /* desc : when device plug in,this function would be called. @@ -498,6 +497,15 @@ dev_dbg(&port->dev, "usb_unlink_urb(read_urb) = %d\n", result); } +static void spcp8x5_init_termios(struct tty_struct *tty) +{ + /* for the 1st time call this function */ + *(tty->termios) = tty_std_termios; + tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL; + tty->termios->c_ispeed = 115200; + tty->termios->c_ospeed = 115200; +} + /* set the serial param for transfer. we should check if we really need to * transfer. if we set flow control we should do this too. */ static void spcp8x5_set_termios(struct tty_struct *tty, @@ -514,16 +522,6 @@ int i; u8 control; - /* for the 1st time call this function */ - spin_lock_irqsave(&priv->lock, flags); - if (!priv->termios_initialized) { - *(tty->termios) = tty_std_termios; - tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL; - tty->termios->c_ispeed = 115200; - tty->termios->c_ospeed = 115200; - priv->termios_initialized = 1; - } - spin_unlock_irqrestore(&priv->lock, flags); /* check that they really want us to change something */ if (!tty_termios_hw_change(tty->termios, old_termios)) @@ -1011,6 +1009,7 @@ .carrier_raised = spcp8x5_carrier_raised, .write = spcp8x5_write, .set_termios = spcp8x5_set_termios, + .init_termios = spcp8x5_init_termios, .ioctl = spcp8x5_ioctl, .tiocmget = spcp8x5_tiocmget, .tiocmset = spcp8x5_tiocmset, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/ipaq.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/ipaq.c @@ -547,7 +547,6 @@ { USB_DEVICE(0x413C, 0x4009) }, /* Dell Axim USB Sync */ { USB_DEVICE(0x4505, 0x0010) }, /* Smartphone */ { USB_DEVICE(0x5E04, 0xCE00) }, /* SAGEM Wireless Assistant */ - { USB_DEVICE(0x0BB4, 0x00CF) }, /* HTC smartphone modems */ { } /* Terminating entry */ }; @@ -971,6 +970,15 @@ static int ipaq_startup(struct usb_serial *serial) { dbg("%s", __func__); + + /* Some of the devices in ipaq_id_table[] are composite, and we + * shouldn't bind to all the interfaces. This test will rule out + * some obviously invalid possibilities. + */ + if (serial->num_bulk_in < serial->num_ports || + serial->num_bulk_out < serial->num_ports) + return -ENODEV; + if (serial->dev->actconfig->desc.bConfigurationValue != 1) { /* * FIXME: HP iPaq rx3715, possibly others, have 1 config that --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/sierra.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/sierra.c @@ -287,6 +287,8 @@ struct sierra_port_private *portdata; __u16 interface = 0; int val = 0; + int do_send = 0; + int retval; dev_dbg(&port->dev, "%s\n", __func__); @@ -305,10 +307,7 @@ */ if (port->interrupt_in_urb) { /* send control message */ - return usb_control_msg(serial->dev, - usb_rcvctrlpipe(serial->dev, 0), - 0x22, 0x21, val, interface, - NULL, 0, USB_CTRL_SET_TIMEOUT); + do_send = 1; } } @@ -320,12 +319,18 @@ interface = 1; else if (port->bulk_out_endpointAddress == 5) interface = 2; - return usb_control_msg(serial->dev, - usb_rcvctrlpipe(serial->dev, 0), - 0x22, 0x21, val, interface, - NULL, 0, USB_CTRL_SET_TIMEOUT); + + do_send = 1; } - return 0; + if (!do_send) + return 0; + + usb_autopm_get_interface(serial->interface); + retval = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), + 0x22, 0x21, val, interface, NULL, 0, USB_CTRL_SET_TIMEOUT); + usb_autopm_put_interface(serial->interface); + + return retval; } static void sierra_set_termios(struct tty_struct *tty, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/oti6858.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/oti6858.c @@ -146,6 +146,7 @@ static void oti6858_close(struct usb_serial_port *port); static void oti6858_set_termios(struct tty_struct *tty, struct usb_serial_port *port, struct ktermios *old); +static void oti6858_init_termios(struct tty_struct *tty); static int oti6858_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg); static void oti6858_read_int_callback(struct urb *urb); @@ -186,6 +187,7 @@ .write = oti6858_write, .ioctl = oti6858_ioctl, .set_termios = oti6858_set_termios, + .init_termios = oti6858_init_termios, .tiocmget = oti6858_tiocmget, .tiocmset = oti6858_tiocmset, .read_bulk_callback = oti6858_read_bulk_callback, @@ -206,7 +208,6 @@ struct { u8 read_urb_in_use; u8 write_urb_in_use; - u8 termios_initialized; } flags; struct delayed_work delayed_write_work; @@ -447,6 +448,14 @@ return chars; } +static void oti6858_init_termios(struct tty_struct *tty) +{ + *(tty->termios) = tty_std_termios; + tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL; + tty->termios->c_ispeed = 38400; + tty->termios->c_ospeed = 38400; +} + static void oti6858_set_termios(struct tty_struct *tty, struct usb_serial_port *port, struct ktermios *old_termios) { @@ -464,16 +473,6 @@ return; } - spin_lock_irqsave(&priv->lock, flags); - if (!priv->flags.termios_initialized) { - *(tty->termios) = tty_std_termios; - tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL; - tty->termios->c_ispeed = 38400; - tty->termios->c_ospeed = 38400; - priv->flags.termios_initialized = 1; - } - spin_unlock_irqrestore(&priv->lock, flags); - cflag = tty->termios->c_cflag; spin_lock_irqsave(&priv->lock, flags); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/ark3116.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/ark3116.c @@ -35,11 +35,6 @@ }; MODULE_DEVICE_TABLE(usb, id_table); -struct ark3116_private { - spinlock_t lock; - u8 termios_initialized; -}; - static inline void ARK3116_SND(struct usb_serial *serial, int seq, __u8 request, __u8 requesttype, __u16 value, __u16 index) @@ -82,22 +77,11 @@ static int ark3116_attach(struct usb_serial *serial) { char *buf; - struct ark3116_private *priv; - int i; - - for (i = 0; i < serial->num_ports; ++i) { - priv = kzalloc(sizeof(struct ark3116_private), GFP_KERNEL); - if (!priv) - goto cleanup; - spin_lock_init(&priv->lock); - - usb_set_serial_port_data(serial->port[i], priv); - } buf = kmalloc(1, GFP_KERNEL); if (!buf) { dbg("error kmalloc -> out of mem?"); - goto cleanup; + return -ENOMEM; } /* 3 */ @@ -149,13 +133,16 @@ kfree(buf); return 0; +} -cleanup: - for (--i; i >= 0; --i) { - kfree(usb_get_serial_port_data(serial->port[i])); - usb_set_serial_port_data(serial->port[i], NULL); - } - return -ENOMEM; +static void ark3116_init_termios(struct tty_struct *tty) +{ + struct ktermios *termios = tty->termios; + *termios = tty_std_termios; + termios->c_cflag = B9600 | CS8 + | CREAD | HUPCL | CLOCAL; + termios->c_ispeed = 9600; + termios->c_ospeed = 9600; } static void ark3116_set_termios(struct tty_struct *tty, @@ -163,10 +150,8 @@ struct ktermios *old_termios) { struct usb_serial *serial = port->serial; - struct ark3116_private *priv = usb_get_serial_port_data(port); struct ktermios *termios = tty->termios; unsigned int cflag = termios->c_cflag; - unsigned long flags; int baud; int ark3116_baud; char *buf; @@ -176,16 +161,6 @@ dbg("%s - port %d", __func__, port->number); - spin_lock_irqsave(&priv->lock, flags); - if (!priv->termios_initialized) { - *termios = tty_std_termios; - termios->c_cflag = B9600 | CS8 - | CREAD | HUPCL | CLOCAL; - termios->c_ispeed = 9600; - termios->c_ospeed = 9600; - priv->termios_initialized = 1; - } - spin_unlock_irqrestore(&priv->lock, flags); cflag = termios->c_cflag; termios->c_cflag &= ~(CMSPAR|CRTSCTS); @@ -455,6 +430,7 @@ .num_ports = 1, .attach = ark3116_attach, .set_termios = ark3116_set_termios, + .init_termios = ark3116_init_termios, .ioctl = ark3116_ioctl, .tiocmget = ark3116_tiocmget, .open = ark3116_open, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/usb-serial.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/usb-serial.c @@ -43,8 +43,6 @@ #define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/" #define DRIVER_DESC "USB Serial Driver core" -static void port_free(struct usb_serial_port *port); - /* Driver structure we register with the USB core */ static struct usb_driver usb_serial_driver = { .name = "usbserial", @@ -68,6 +66,11 @@ static DEFINE_MUTEX(table_lock); static LIST_HEAD(usb_serial_driver_list); +/* + * Look up the serial structure. If it is found and it hasn't been + * disconnected, return with its disc_mutex held and its refcount + * incremented. Otherwise return NULL. + */ struct usb_serial *usb_serial_get_by_index(unsigned index) { struct usb_serial *serial; @@ -75,8 +78,15 @@ mutex_lock(&table_lock); serial = serial_table[index]; - if (serial) - kref_get(&serial->kref); + if (serial) { + mutex_lock(&serial->disc_mutex); + if (serial->disconnected) { + mutex_unlock(&serial->disc_mutex); + serial = NULL; + } else { + kref_get(&serial->kref); + } + } mutex_unlock(&table_lock); return serial; } @@ -125,8 +135,10 @@ dbg("%s", __func__); + mutex_lock(&table_lock); for (i = 0; i < serial->num_ports; ++i) serial_table[serial->minor + i] = NULL; + mutex_unlock(&table_lock); } static void destroy_serial(struct kref *kref) @@ -143,163 +155,160 @@ if (serial->minor != SERIAL_TTY_NO_MINOR) return_serial(serial); - serial->type->release(serial); + if (serial->attached) + serial->type->release(serial); - for (i = 0; i < serial->num_ports; ++i) { + /* Now that nothing is using the ports, they can be freed */ + for (i = 0; i < serial->num_port_pointers; ++i) { port = serial->port[i]; - if (port) + if (port) { + port->serial = NULL; put_device(&port->dev); - } - - /* If this is a "fake" port, we have to clean it up here, as it will - * not get cleaned up in port_release() as it was never registered with - * the driver core */ - if (serial->num_ports < serial->num_port_pointers) { - for (i = serial->num_ports; - i < serial->num_port_pointers; ++i) { - port = serial->port[i]; - if (port) - port_free(port); } } usb_put_dev(serial->dev); - - /* free up any memory that we allocated */ kfree(serial); } void usb_serial_put(struct usb_serial *serial) { - mutex_lock(&table_lock); kref_put(&serial->kref, destroy_serial); - mutex_unlock(&table_lock); } /***************************************************************************** * Driver tty interface functions *****************************************************************************/ -static int serial_open (struct tty_struct *tty, struct file *filp) + +/** + * serial_install - install tty + * @driver: the driver (USB in our case) + * @tty: the tty being created + * + * Create the termios objects for this tty. We use the default + * USB serial settings but permit them to be overridden by + * serial->type->init_termios. + * + * This is the first place a new tty gets used. Hence this is where we + * acquire references to the usb_serial structure and the driver module, + * where we store a pointer to the port, and where we do an autoresume. + * All these actions are reversed in serial_release(). + */ +static int serial_install(struct tty_driver *driver, struct tty_struct *tty) { + int idx = tty->index; struct usb_serial *serial; struct usb_serial_port *port; - unsigned int portNumber; - int retval = 0; - int first = 0; + int retval = -ENODEV; dbg("%s", __func__); - /* get the serial object associated with this tty pointer */ - serial = usb_serial_get_by_index(tty->index); - if (!serial) { - tty->driver_data = NULL; - return -ENODEV; - } + serial = usb_serial_get_by_index(idx); + if (!serial) + return retval; - mutex_lock(&serial->disc_mutex); - portNumber = tty->index - serial->minor; - port = serial->port[portNumber]; - if (!port || serial->disconnected) - retval = -ENODEV; - else - get_device(&port->dev); - /* - * Note: Our locking order requirement does not allow port->mutex - * to be acquired while serial->disc_mutex is held. - */ - mutex_unlock(&serial->disc_mutex); + port = serial->port[idx - serial->minor]; + if (!port) + goto error_no_port; + if (!try_module_get(serial->type->driver.owner)) + goto error_module_get; + + /* perform the standard setup */ + retval = tty_init_termios(tty); if (retval) - goto bailout_serial_put; + goto error_init_termios; - if (mutex_lock_interruptible(&port->mutex)) { - retval = -ERESTARTSYS; - goto bailout_port_put; - } + retval = usb_autopm_get_interface(serial->interface); + if (retval) + goto error_get_interface; - ++port->port.count; + mutex_unlock(&serial->disc_mutex); + + /* allow the driver to update the settings */ + if (serial->type->init_termios) + serial->type->init_termios(tty); - /* set up our port structure making the tty driver - * remember our port object, and us it */ tty->driver_data = port; - tty_port_tty_set(&port->port, tty); - /* If the console is attached, the device is already open */ - if (port->port.count == 1 && !port->console) { - first = 1; - /* lock this module before we call it - * this may fail, which means we must bail out, - * safe because we are called with BKL held */ - if (!try_module_get(serial->type->driver.owner)) { - retval = -ENODEV; - goto bailout_mutex_unlock; - } + /* Final install (we use the default method) */ + tty_driver_kref_get(driver); + tty->count++; + driver->ttys[idx] = tty; + return retval; + error_get_interface: + error_init_termios: + module_put(serial->type->driver.owner); + error_module_get: + error_no_port: + usb_serial_put(serial); + mutex_unlock(&serial->disc_mutex); + return retval; +} + +static int serial_open(struct tty_struct *tty, struct file *filp) +{ + struct usb_serial_port *port = tty->driver_data; + struct usb_serial *serial = port->serial; + int retval; + + dbg("%s - port %d", __func__, port->number); + + spin_lock_irq(&port->port.lock); + if (!tty_hung_up_p(filp)) + ++port->port.count; + spin_unlock_irq(&port->port.lock); + tty_port_tty_set(&port->port, tty); + + /* Do the device-specific open only if the hardware isn't + * already initialized. + */ + if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) { + if (mutex_lock_interruptible(&port->mutex)) + return -ERESTARTSYS; mutex_lock(&serial->disc_mutex); if (serial->disconnected) retval = -ENODEV; else - retval = usb_autopm_get_interface(serial->interface); - if (retval) - goto bailout_module_put; - - /* only call the device specific open if this - * is the first time the port is opened */ - retval = serial->type->open(tty, port, filp); - if (retval) - goto bailout_interface_put; + retval = port->serial->type->open(tty, port, filp); mutex_unlock(&serial->disc_mutex); + mutex_unlock(&port->mutex); + if (retval) + return retval; set_bit(ASYNCB_INITIALIZED, &port->port.flags); } - mutex_unlock(&port->mutex); + /* Now do the correct tty layer semantics */ retval = tty_port_block_til_ready(&port->port, tty, filp); - if (retval == 0) { - if (!first) - usb_serial_put(serial); - return 0; - } - mutex_lock(&port->mutex); - if (first == 0) - goto bailout_mutex_unlock; - /* Undo the initial port actions */ - mutex_lock(&serial->disc_mutex); -bailout_interface_put: - usb_autopm_put_interface(serial->interface); -bailout_module_put: - mutex_unlock(&serial->disc_mutex); - module_put(serial->type->driver.owner); -bailout_mutex_unlock: - port->port.count = 0; - tty->driver_data = NULL; - tty_port_tty_set(&port->port, NULL); - mutex_unlock(&port->mutex); -bailout_port_put: - put_device(&port->dev); -bailout_serial_put: - usb_serial_put(serial); return retval; } /** - * serial_do_down - shut down hardware - * @port: port to shut down - * - * Shut down a USB port unless it is the console. We never shut down the - * console hardware as it will always be in use. + * serial_down - shut down hardware + * @port: port to shut down * - * Don't free any resources at this point + * Shut down a USB serial port unless it is the console. We never + * shut down the console hardware as it will always be in use. */ -static void serial_do_down(struct usb_serial_port *port) +static void serial_down(struct usb_serial_port *port) { struct usb_serial_driver *drv = port->serial->type; struct usb_serial *serial; struct module *owner; - /* The console is magical, do not hang up the console hardware - or there will be tears */ + /* + * The console is magical. Do not hang up the console hardware + * or there will be tears. + */ if (port->console) return; + /* Don't call the close method if the hardware hasn't been + * initialized. + */ + if (!test_and_clear_bit(ASYNCB_INITIALIZED, &port->port.flags)) + return; + mutex_lock(&port->mutex); serial = port->serial; owner = serial->type->driver.owner; @@ -310,79 +319,69 @@ mutex_unlock(&port->mutex); } -/** - * serial_do_free - free resources post close/hangup - * @port: port to free up - * - * Do the resource freeing and refcount dropping for the port. We must - * be careful about ordering and we must avoid freeing up the console. - */ - -static void serial_do_free(struct usb_serial_port *port) +static void serial_hangup(struct tty_struct *tty) { - struct usb_serial *serial; - struct module *owner; + struct usb_serial_port *port = tty->driver_data; - /* The console is magical, do not hang up the console hardware - or there will be tears */ - if (port->console) - return; + dbg("%s - port %d", __func__, port->number); - serial = port->serial; - owner = serial->type->driver.owner; - put_device(&port->dev); - /* Mustn't dereference port any more */ - mutex_lock(&serial->disc_mutex); - if (!serial->disconnected) - usb_autopm_put_interface(serial->interface); - mutex_unlock(&serial->disc_mutex); - usb_serial_put(serial); - /* Mustn't dereference serial any more */ - module_put(owner); + serial_down(port); + tty_port_hangup(&port->port); } static void serial_close(struct tty_struct *tty, struct file *filp) { struct usb_serial_port *port = tty->driver_data; - if (!port) - return; - dbg("%s - port %d", __func__, port->number); - /* FIXME: - This leaves a very narrow race. Really we should do the - serial_do_free() on tty->shutdown(), but tty->shutdown can - be called from IRQ context and serial_do_free can sleep. - - The right fix is probably to make the tty free (which is rare) - and thus tty->shutdown() occur via a work queue and simplify all - the drivers that use it. - */ - if (tty_hung_up_p(filp)) { - /* serial_hangup already called serial_down at this point. - Another user may have already reopened the port but - serial_do_free is refcounted */ - serial_do_free(port); + if (tty_hung_up_p(filp)) return; - } - if (tty_port_close_start(&port->port, tty, filp) == 0) return; - - serial_do_down(port); + serial_down(port); tty_port_close_end(&port->port, tty); tty_port_tty_set(&port->port, NULL); - serial_do_free(port); } -static void serial_hangup(struct tty_struct *tty) +/** + * serial_release - free resources post close/hangup + * @port: port to free up + * + * Do the resource freeing and refcount dropping for the port. + * Avoid freeing the console. + * + * Called when the last tty kref is dropped. + */ +static void serial_release(struct tty_struct *tty) { struct usb_serial_port *port = tty->driver_data; - serial_do_down(port); - tty_port_hangup(&port->port); - /* We must not free port yet - the USB serial layer depends on it's - continued existence */ + struct usb_serial *serial; + struct module *owner; + + /* The console is magical. Do not hang up the console hardware + * or there will be tears. + */ + if (port->console) + return; + + dbg("%s - port %d", __func__, port->number); + + /* Standard shutdown processing */ + tty_shutdown(tty); + + tty->driver_data = NULL; + + serial = port->serial; + owner = serial->type->driver.owner; + + mutex_lock(&serial->disc_mutex); + if (!serial->disconnected) + usb_autopm_put_interface(serial->interface); + mutex_unlock(&serial->disc_mutex); + + usb_serial_put(serial); + module_put(owner); } static int serial_write(struct tty_struct *tty, const unsigned char *buf, @@ -527,6 +526,7 @@ seq_putc(m, '\n'); usb_serial_put(serial); + mutex_unlock(&serial->disc_mutex); } return 0; } @@ -569,6 +569,18 @@ return -EINVAL; } +static int serial_get_icount(struct tty_struct *tty, + struct serial_icounter_struct *icount) +{ + struct usb_serial_port *port = tty->driver_data; + + dbg("%s - port %d", __func__, port->number); + + if (port->serial->type->get_icount) + return port->serial->type->get_icount(tty, icount); + return -EINVAL; +} + /* * We would be calling tty_wakeup here, but unfortunately some line * disciplines have an annoying habit of calling tty->write from @@ -596,14 +608,6 @@ tty_kref_put(tty); } -static void port_release(struct device *dev) -{ - struct usb_serial_port *port = to_usb_serial_port(dev); - - dbg ("%s - %s", __func__, dev_name(dev)); - port_free(port); -} - static void kill_traffic(struct usb_serial_port *port) { usb_kill_urb(port->read_urb); @@ -623,8 +627,12 @@ usb_kill_urb(port->interrupt_out_urb); } -static void port_free(struct usb_serial_port *port) +static void port_release(struct device *dev) { + struct usb_serial_port *port = to_usb_serial_port(dev); + + dbg ("%s - %s", __func__, dev_name(dev)); + /* * Stop all the traffic before cancelling the work, so that * nobody will restart it by calling usb_serial_port_softint. @@ -935,6 +943,11 @@ mutex_init(&port->mutex); INIT_WORK(&port->work, usb_serial_port_work); serial->port[i] = port; + port->dev.parent = &interface->dev; + port->dev.driver = NULL; + port->dev.bus = &usb_serial_bus_type; + port->dev.release = &port_release; + device_initialize(&port->dev); } /* set up the endpoint information */ @@ -1060,12 +1073,15 @@ module_put(type->driver.owner); if (retval < 0) goto probe_error; + serial->attached = 1; if (retval > 0) { /* quietly accept this device, but don't bind to a serial port as it's about to disappear */ serial->num_ports = 0; goto exit; } + } else { + serial->attached = 1; } if (get_free_serial(serial, num_ports, &minor) == NULL) { @@ -1077,15 +1093,10 @@ /* register all of the individual ports with the driver core */ for (i = 0; i < num_ports; ++i) { port = serial->port[i]; - port->dev.parent = &interface->dev; - port->dev.driver = NULL; - port->dev.bus = &usb_serial_bus_type; - port->dev.release = &port_release; - dev_set_name(&port->dev, "ttyUSB%d", port->number); dbg ("%s - registering %s", __func__, dev_name(&port->dev)); port->dev_state = PORT_REGISTERING; - retval = device_register(&port->dev); + retval = device_add(&port->dev); if (retval) { dev_err(&port->dev, "Error registering port device, " "continuing\n"); @@ -1103,39 +1114,7 @@ return 0; probe_error: - for (i = 0; i < num_bulk_in; ++i) { - port = serial->port[i]; - if (!port) - continue; - usb_free_urb(port->read_urb); - kfree(port->bulk_in_buffer); - } - for (i = 0; i < num_bulk_out; ++i) { - port = serial->port[i]; - if (!port) - continue; - usb_free_urb(port->write_urb); - kfree(port->bulk_out_buffer); - } - for (i = 0; i < num_interrupt_in; ++i) { - port = serial->port[i]; - if (!port) - continue; - usb_free_urb(port->interrupt_in_urb); - kfree(port->interrupt_in_buffer); - } - for (i = 0; i < num_interrupt_out; ++i) { - port = serial->port[i]; - if (!port) - continue; - usb_free_urb(port->interrupt_out_urb); - kfree(port->interrupt_out_buffer); - } - - /* free up any memory that we allocated */ - for (i = 0; i < serial->num_port_pointers; ++i) - kfree(serial->port[i]); - kfree(serial); + usb_serial_put(serial); return -EIO; } EXPORT_SYMBOL_GPL(usb_serial_probe); @@ -1161,10 +1140,7 @@ if (port) { struct tty_struct *tty = tty_port_tty_get(&port->port); if (tty) { - /* The hangup will occur asynchronously but - the object refcounts will sort out all the - cleanup */ - tty_hangup(tty); + tty_vhangup(tty); tty_kref_put(tty); } kill_traffic(port); @@ -1189,8 +1165,7 @@ } serial->type->disconnect(serial); - /* let the last holder of this object - * cause it to be cleaned up */ + /* let the last holder of this object cause it to be cleaned up */ usb_serial_put(serial); dev_info(dev, "device disconnected\n"); } @@ -1246,6 +1221,9 @@ .chars_in_buffer = serial_chars_in_buffer, .tiocmget = serial_tiocmget, .tiocmset = serial_tiocmset, + .shutdown = serial_release, + .get_icount = serial_get_icount, + .install = serial_install, .proc_fops = &serial_proc_fops, }; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/generic.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/generic.c @@ -530,7 +530,7 @@ if (was_throttled) { /* Resume reading from device */ - usb_serial_generic_resubmit_read_urb(port, GFP_KERNEL); + flush_and_resubmit_read_urb(port); } } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/mos7840.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/mos7840.c @@ -2357,6 +2357,9 @@ case TIOCGICOUNT: cnow = mos7840_port->icount; smp_rmb(); + + memset(&icount, 0, sizeof(struct serial_icounter_struct)); + icount.cts = cnow.cts; icount.dsr = cnow.dsr; icount.rng = cnow.rng; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/option.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/option.c @@ -166,6 +166,7 @@ #define HUAWEI_PRODUCT_E143D 0x143D #define HUAWEI_PRODUCT_E143E 0x143E #define HUAWEI_PRODUCT_E143F 0x143F +#define HUAWEI_PRODUCT_E14AC 0x14AC #define QUANTA_VENDOR_ID 0x0408 #define QUANTA_PRODUCT_Q101 0xEA02 @@ -225,6 +226,7 @@ #define AMOI_VENDOR_ID 0x1614 #define AMOI_PRODUCT_H01 0x0800 #define AMOI_PRODUCT_H01A 0x7002 +#define AMOI_PRODUCT_9508 0x0800 #define AMOI_PRODUCT_H02 0x0802 #define DELL_VENDOR_ID 0x413C @@ -283,15 +285,13 @@ #define BANDRICH_PRODUCT_1011 0x1011 #define BANDRICH_PRODUCT_1012 0x1012 -#define AMOI_VENDOR_ID 0x1614 -#define AMOI_PRODUCT_9508 0x0800 - #define QUALCOMM_VENDOR_ID 0x05C6 #define MAXON_VENDOR_ID 0x16d8 #define TELIT_VENDOR_ID 0x1bc7 #define TELIT_PRODUCT_UC864E 0x1003 +#define TELIT_PRODUCT_UC864G 0x1004 /* ZTE PRODUCTS */ #define ZTE_VENDOR_ID 0x19d2 @@ -300,12 +300,14 @@ #define ZTE_PRODUCT_MF626 0x0031 #define ZTE_PRODUCT_CDMA_TECH 0xfffe #define ZTE_PRODUCT_AC8710 0xfff1 +#define ZTE_PRODUCT_AC2726 0xfff5 #define BENQ_VENDOR_ID 0x04a5 #define BENQ_PRODUCT_H10 0x4068 #define DLINK_VENDOR_ID 0x1186 #define DLINK_PRODUCT_DWM_652 0x3e04 +#define DLINK_PRODUCT_DWM_652_U5 0xce16 #define QISDA_VENDOR_ID 0x1da5 #define QISDA_PRODUCT_H21_4512 0x4512 @@ -313,10 +315,14 @@ #define QISDA_PRODUCT_H20_4515 0x4515 #define QISDA_PRODUCT_H20_4519 0x4519 +/* TLAYTECH PRODUCTS */ +#define TLAYTECH_VENDOR_ID 0x20B9 +#define TLAYTECH_PRODUCT_TEU800 0x1682 /* TOSHIBA PRODUCTS */ #define TOSHIBA_VENDOR_ID 0x0930 #define TOSHIBA_PRODUCT_HSDPA_MINICARD 0x1302 +#define TOSHIBA_PRODUCT_G450 0x0d45 #define ALINK_VENDOR_ID 0x1e0e #define ALINK_PRODUCT_3GU 0x9200 @@ -325,6 +331,13 @@ #define ALCATEL_VENDOR_ID 0x1bbb #define ALCATEL_PRODUCT_X060S 0x0000 +/* Airplus products */ +#define AIRPLUS_VENDOR_ID 0x1011 +#define AIRPLUS_PRODUCT_MCD650 0x3198 + +/* Haier products */ +#define HAIER_VENDOR_ID 0x201e +#define HAIER_PRODUCT_CE100 0x2009 static struct usb_device_id option_ids[] = { { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, @@ -423,6 +436,7 @@ { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143D, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143E, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143F, 0xff, 0xff, 0xff) }, + { USB_DEVICE(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E14AC) }, { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_9508) }, { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V640) }, /* Novatel Merlin V640/XV620 */ { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V620) }, /* Novatel Merlin V620/S620 */ @@ -503,6 +517,7 @@ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ { USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */ { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) }, + { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0002, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0003, 0xff, 0xff, 0xff) }, @@ -564,24 +579,67 @@ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0086, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0104, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0106, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0108, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0113, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0117, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0118, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0121, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0122, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0123, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0124, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0125, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0126, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0128, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0142, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0143, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0144, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0145, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0146, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0147, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0148, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0149, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0150, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0151, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0152, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0153, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0154, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0155, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0156, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0157, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0158, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0159, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0160, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0161, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0162, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) }, /* ZTE CDMA products */ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0027, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0060, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0130, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0141, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, + { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */ { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) }, { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) }, { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4519) }, + { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_G450) }, { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */ { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) }, + { USB_DEVICE(ALINK_VENDOR_ID, 0xce16) }, { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) }, + { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, + { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, + { USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) }, { } /* Terminating entry */ }; MODULE_DEVICE_TABLE(usb, option_ids); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/kobil_sct.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/kobil_sct.c @@ -85,7 +85,7 @@ static void kobil_write_callback(struct urb *purb); static void kobil_set_termios(struct tty_struct *tty, struct usb_serial_port *port, struct ktermios *old); - +static void kobil_init_termios(struct tty_struct *tty); static struct usb_device_id id_table [] = { { USB_DEVICE(KOBIL_VENDOR_ID, KOBIL_ADAPTER_B_PRODUCT_ID) }, @@ -120,6 +120,7 @@ .release = kobil_release, .ioctl = kobil_ioctl, .set_termios = kobil_set_termios, + .init_termios = kobil_init_termios, .tiocmget = kobil_tiocmget, .tiocmset = kobil_tiocmset, .open = kobil_open, @@ -210,6 +211,15 @@ kfree(usb_get_serial_port_data(serial->port[i])); } +static void kobil_init_termios(struct tty_struct *tty) +{ + /* Default to echo off and other sane device settings */ + tty->termios->c_lflag = 0; + tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN | XCASE); + tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF; + /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */ + tty->termios->c_oflag &= ~ONLCR; +} static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port, struct file *filp) @@ -226,16 +236,6 @@ /* someone sets the dev to 0 if the close method has been called */ port->interrupt_in_urb->dev = port->serial->dev; - if (tty) { - - /* Default to echo off and other sane device settings */ - tty->termios->c_lflag = 0; - tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN | - XCASE); - tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF; - /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */ - tty->termios->c_oflag &= ~ONLCR; - } /* allocate memory for transfer buffer */ transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL); if (!transfer_buffer) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/ftdi_sio.h +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/ftdi_sio.h @@ -81,6 +81,9 @@ /* OpenDCC (www.opendcc.de) product id */ #define FTDI_OPENDCC_PID 0xBFD8 +#define FTDI_OPENDCC_SNIFFER_PID 0xBFD9 +#define FTDI_OPENDCC_THROTTLE_PID 0xBFDA +#define FTDI_OPENDCC_GATEWAY_PID 0xBFDB /* Sprog II (Andrew Crosland's SprogII DCC interface) */ #define FTDI_SPROG_II 0xF0C8 @@ -930,6 +933,7 @@ */ #define ADI_VID 0x0456 #define ADI_GNICE_PID 0xF000 +#define ADI_GNICEPLUS_PID 0xF001 /* * JETI SPECTROMETER SPECBOS 1201 @@ -968,6 +972,12 @@ #define MARVELL_OPENRD_PID 0x9e90 /* + * Hameg HO820 and HO870 interface (using VID 0x0403) + */ +#define HAMEG_HO820_PID 0xed74 +#define HAMEG_HO870_PID 0xed71 + +/* * BmRequestType: 1100 0000b * bRequest: FTDI_E2_READ * wValue: 0 --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/iuu_phoenix.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/iuu_phoenix.c @@ -71,7 +71,6 @@ spinlock_t lock; /* store irq state */ wait_queue_head_t delta_msr_wait; u8 line_status; - u8 termios_initialized; int tiostatus; /* store IUART SIGNAL for tiocmget call */ u8 reset; /* if 1 reset is needed */ int poll; /* number of poll */ @@ -1018,6 +1017,18 @@ } } +static void iuu_init_termios(struct tty_struct *tty) +{ + *(tty->termios) = tty_std_termios; + tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600 + | TIOCM_CTS | CSTOPB | PARENB; + tty->termios->c_ispeed = 9600; + tty->termios->c_ospeed = 9600; + tty->termios->c_lflag = 0; + tty->termios->c_oflag = 0; + tty->termios->c_iflag = 0; +} + static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port, struct file *filp) { @@ -1025,7 +1036,6 @@ u8 *buf; int result; u32 actual; - unsigned long flags; struct iuu_private *priv = usb_get_serial_port_data(port); dbg("%s - port %d", __func__, port->number); @@ -1064,21 +1074,7 @@ port->bulk_in_buffer, 512, NULL, NULL); - /* set the termios structure */ - spin_lock_irqsave(&priv->lock, flags); - if (tty && !priv->termios_initialized) { - *(tty->termios) = tty_std_termios; - tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600 - | TIOCM_CTS | CSTOPB | PARENB; - tty->termios->c_ispeed = 9600; - tty->termios->c_ospeed = 9600; - tty->termios->c_lflag = 0; - tty->termios->c_oflag = 0; - tty->termios->c_iflag = 0; - priv->termios_initialized = 1; - priv->poll = 0; - } - spin_unlock_irqrestore(&priv->lock, flags); + priv->poll = 0; /* initialize writebuf */ #define FISH(a, b, c, d) do { \ @@ -1201,6 +1197,7 @@ .tiocmget = iuu_tiocmget, .tiocmset = iuu_tiocmset, .set_termios = iuu_set_termios, + .init_termios = iuu_init_termios, .attach = iuu_startup, .release = iuu_release, }; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/serial/console.c +++ linux-fsl-imx51-2.6.31/drivers/usb/serial/console.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -63,7 +64,7 @@ char *s; struct usb_serial *serial; struct usb_serial_port *port; - int retval = 0; + int retval; struct tty_struct *tty = NULL; struct ktermios *termios = NULL, dummy; @@ -116,13 +117,17 @@ return -ENODEV; } - port = serial->port[0]; + retval = usb_autopm_get_interface(serial->interface); + if (retval) + goto error_get_interface; + + port = serial->port[co->index - serial->minor]; tty_port_tty_set(&port->port, NULL); info->port = port; ++port->port.count; - if (port->port.count == 1) { + if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) { if (serial->type->set_termios) { /* * allocate a fake tty so the driver can initialize @@ -168,6 +173,7 @@ kfree(termios); kfree(tty); } + set_bit(ASYNCB_INITIALIZED, &port->port.flags); } /* Now that any required fake tty operations are completed restore * the tty port count */ @@ -175,18 +181,22 @@ /* The console is special in terms of closing the device so * indicate this port is now acting as a system console. */ port->console = 1; - retval = 0; -out: + mutex_unlock(&serial->disc_mutex); return retval; -free_termios: + + free_termios: kfree(termios); tty_port_tty_set(&port->port, NULL); -free_tty: + free_tty: kfree(tty); -reset_open_count: + reset_open_count: port->port.count = 0; - goto out; + usb_autopm_put_interface(serial->interface); + error_get_interface: + usb_serial_put(serial); + mutex_unlock(&serial->disc_mutex); + return retval; } static void usb_console_write(struct console *co, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/storage/transport.c +++ linux-fsl-imx51-2.6.31/drivers/usb/storage/transport.c @@ -666,10 +666,11 @@ * to wait for at least one CHECK_CONDITION to determine * SANE_SENSE support */ - if ((srb->cmnd[0] == ATA_16 || srb->cmnd[0] == ATA_12) && + if (unlikely((srb->cmnd[0] == ATA_16 || srb->cmnd[0] == ATA_12) && result == USB_STOR_TRANSPORT_GOOD && !(us->fflags & US_FL_SANE_SENSE) && - !(srb->cmnd[2] & 0x20)) { + !(us->fflags & US_FL_BAD_SENSE) && + !(srb->cmnd[2] & 0x20))) { US_DEBUGP("-- SAT supported, increasing auto-sense\n"); us->fflags |= US_FL_SANE_SENSE; } @@ -696,7 +697,7 @@ /* device supports and needs bigger sense buffer */ if (us->fflags & US_FL_SANE_SENSE) sense_size = ~0; - +Retry_Sense: US_DEBUGP("Issuing auto-REQUEST_SENSE\n"); scsi_eh_prep_cmnd(srb, &ses, NULL, 0, sense_size); @@ -718,8 +719,30 @@ if (test_bit(US_FLIDX_TIMED_OUT, &us->dflags)) { US_DEBUGP("-- auto-sense aborted\n"); srb->result = DID_ABORT << 16; + + /* If SANE_SENSE caused this problem, disable it */ + if (sense_size != US_SENSE_SIZE) { + us->fflags &= ~US_FL_SANE_SENSE; + us->fflags |= US_FL_BAD_SENSE; + } goto Handle_Errors; } + + /* Some devices claim to support larger sense but fail when + * trying to request it. When a transport failure happens + * using US_FS_SANE_SENSE, we always retry with a standard + * (small) sense request. This fixes some USB GSM modems + */ + if (temp_result == USB_STOR_TRANSPORT_FAILED && + sense_size != US_SENSE_SIZE) { + US_DEBUGP("-- auto-sense failure, retry small sense\n"); + sense_size = US_SENSE_SIZE; + us->fflags &= ~US_FL_SANE_SENSE; + us->fflags |= US_FL_BAD_SENSE; + goto Retry_Sense; + } + + /* Other failures */ if (temp_result != USB_STOR_TRANSPORT_GOOD) { US_DEBUGP("-- auto-sense failure\n"); @@ -739,6 +762,7 @@ */ if (srb->sense_buffer[7] > (US_SENSE_SIZE - 8) && !(us->fflags & US_FL_SANE_SENSE) && + !(us->fflags & US_FL_BAD_SENSE) && (srb->sense_buffer[0] & 0x7C) == 0x70) { US_DEBUGP("-- SANE_SENSE support enabled\n"); us->fflags |= US_FL_SANE_SENSE; @@ -768,17 +792,32 @@ /* set the result so the higher layers expect this data */ srb->result = SAM_STAT_CHECK_CONDITION; - /* If things are really okay, then let's show that. Zero - * out the sense buffer so the higher layers won't realize - * we did an unsolicited auto-sense. */ - if (result == USB_STOR_TRANSPORT_GOOD && - /* Filemark 0, ignore EOM, ILI 0, no sense */ + /* We often get empty sense data. This could indicate that + * everything worked or that there was an unspecified + * problem. We have to decide which. + */ + if ( /* Filemark 0, ignore EOM, ILI 0, no sense */ (srb->sense_buffer[2] & 0xaf) == 0 && /* No ASC or ASCQ */ srb->sense_buffer[12] == 0 && srb->sense_buffer[13] == 0) { - srb->result = SAM_STAT_GOOD; - srb->sense_buffer[0] = 0x0; + + /* If things are really okay, then let's show that. + * Zero out the sense buffer so the higher layers + * won't realize we did an unsolicited auto-sense. + */ + if (result == USB_STOR_TRANSPORT_GOOD) { + srb->result = SAM_STAT_GOOD; + srb->sense_buffer[0] = 0x0; + + /* If there was a problem, report an unspecified + * hardware error to prevent the higher layers from + * entering an infinite retry loop. + */ + } else { + srb->result = DID_ERROR << 16; + srb->sense_buffer[2] = HARDWARE_ERROR; + } } } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/storage/onetouch.c +++ linux-fsl-imx51-2.6.31/drivers/usb/storage/onetouch.c @@ -163,7 +163,7 @@ usb_kill_urb(onetouch->irq); break; case US_RESUME: - if (usb_submit_urb(onetouch->irq, GFP_KERNEL) != 0) + if (usb_submit_urb(onetouch->irq, GFP_NOIO) != 0) dev_err(&onetouch->irq->dev->dev, "usb_submit_urb failed\n"); break; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/storage/unusual_devs.h +++ linux-fsl-imx51-2.6.31/drivers/usb/storage/unusual_devs.h @@ -838,6 +838,13 @@ US_SC_DEVICE, US_PR_DEVICE, NULL, US_FL_FIX_CAPACITY ), +/* Reported by Daniel Kukula */ +UNUSUAL_DEV( 0x067b, 0x1063, 0x0100, 0x0100, + "Prolific Technology, Inc.", + "Prolific Storage Gadget", + US_SC_DEVICE, US_PR_DEVICE, NULL, + US_FL_BAD_SENSE ), + /* Reported by Rogerio Brito */ UNUSUAL_DEV( 0x067b, 0x2317, 0x0001, 0x001, "Prolific Technology, Inc.", @@ -1149,6 +1156,13 @@ US_SC_DEVICE, US_PR_DEVICE, option_ms_init, 0), +/* Reported by Timo Aaltonen */ +UNUSUAL_DEV( 0x0af0, 0x7011, 0x0000, 0x9999, + "Option", + "Mass Storage", + US_SC_DEVICE, US_PR_DEVICE, option_ms_init, + 0 ), + /* Reported by F. Aben * This device (wrongly) has a vendor-specific device descriptor. * The entry is needed so usb-storage can bind to it's mass-storage --- linux-fsl-imx51-2.6.31.orig/drivers/usb/storage/usb.c +++ linux-fsl-imx51-2.6.31/drivers/usb/storage/usb.c @@ -228,6 +228,7 @@ if (data_len<36) // You lose. return; + memset(data+8, ' ', 28); if(data[0]&0x20) { /* USB device currently not connected. Return peripheral qualifier 001b ("...however, the physical device is not currently connected @@ -237,15 +238,15 @@ device, it may return zeros or ASCII spaces (20h) in those fields until the data is available from the device."). */ - memset(data+8,0,28); } else { u16 bcdDevice = le16_to_cpu(us->pusb_dev->descriptor.bcdDevice); - memcpy(data+8, us->unusual_dev->vendorName, - strlen(us->unusual_dev->vendorName) > 8 ? 8 : - strlen(us->unusual_dev->vendorName)); - memcpy(data+16, us->unusual_dev->productName, - strlen(us->unusual_dev->productName) > 16 ? 16 : - strlen(us->unusual_dev->productName)); + int n; + + n = strlen(us->unusual_dev->vendorName); + memcpy(data+8, us->unusual_dev->vendorName, min(8, n)); + n = strlen(us->unusual_dev->productName); + memcpy(data+16, us->unusual_dev->productName, min(16, n)); + data[32] = 0x30 + ((bcdDevice>>12) & 0x0F); data[33] = 0x30 + ((bcdDevice>>8) & 0x0F); data[34] = 0x30 + ((bcdDevice>>4) & 0x0F); @@ -256,6 +257,17 @@ } EXPORT_SYMBOL_GPL(fill_inquiry_response); +#ifdef CONFIG_MACH_MX51_BABBAGE +static int skip_ata_passthrough(struct us_data *us) +{ + int v = le16_to_cpu(us->pusb_dev->descriptor.idVendor); + int p = le16_to_cpu(us->pusb_dev->descriptor.idProduct); + + /* GL830 || JMicron */ + return (v == 0x05e3 && p == 0x0718) || (v == 0x152d && p == 0x2329); +} +#endif + static int usb_stor_control_thread(void * __us) { struct us_data *us = (struct us_data *)__us; @@ -330,6 +342,12 @@ /* we've got a command, let's do it! */ else { US_DEBUG(usb_stor_show_command(us->srb)); +#ifdef CONFIG_MACH_MX51_BABBAGE + if ((us->srb->cmnd[0] == 0x85) && + skip_ata_passthrough(us)) + US_DEBUGP("Skip ATA PASS-THROUGH command\n"); + else +#endif us->proto_handler(us->srb, us); } @@ -459,6 +477,9 @@ case 'a': f |= US_FL_SANE_SENSE; break; + case 'b': + f |= US_FL_BAD_SENSE; + break; case 'c': f |= US_FL_FIX_CAPACITY; break; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/storage/initializers.c +++ linux-fsl-imx51-2.6.31/drivers/usb/storage/initializers.c @@ -102,5 +102,5 @@ USB_TYPE_STANDARD | USB_RECIP_DEVICE, 0x01, 0x0, NULL, 0x0, 1000); US_DEBUGP("Huawei mode set result is %d\n", result); - return (result ? 0 : -ENODEV); + return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/mon/mon_bin.c +++ linux-fsl-imx51-2.6.31/drivers/usb/mon/mon_bin.c @@ -350,12 +350,12 @@ /* * Return a few (kilo-)bytes to the head of the buffer. - * This is used if a DMA fetch fails. + * This is used if a data fetch fails. */ static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size) { - size = (size + PKT_ALIGN-1) & ~(PKT_ALIGN-1); + /* size &= ~(PKT_ALIGN-1); -- we're called with aligned size */ rp->b_cnt -= size; if (rp->b_in < size) rp->b_in += rp->b_size; @@ -442,6 +442,7 @@ unsigned int urb_length; unsigned int offset; unsigned int length; + unsigned int delta; unsigned int ndesc, lendesc; unsigned char dir; struct mon_bin_hdr *ep; @@ -546,8 +547,10 @@ if (length != 0) { ep->flag_data = mon_bin_get_data(rp, offset, urb, length); if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */ - ep->len_cap = 0; - mon_buff_area_shrink(rp, length); + delta = (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1); + ep->len_cap -= length; + delta -= (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1); + mon_buff_area_shrink(rp, delta); } } else { ep->flag_data = data_tag; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/class/cdc-acm.c +++ linux-fsl-imx51-2.6.31/drivers/usb/class/cdc-acm.c @@ -59,6 +59,7 @@ #include #include #include +#include #include #include #include @@ -608,8 +609,9 @@ acm->throttle = 0; - tasklet_schedule(&acm->urb_task); + set_bit(ASYNCB_INITIALIZED, &acm->port.flags); rv = tty_port_block_til_ready(&acm->port, tty, filp); + tasklet_schedule(&acm->urb_task); done: mutex_unlock(&acm->mutex); err_out: @@ -858,10 +860,7 @@ if (!ACM_READY(acm)) return; - /* FIXME: Needs to support the tty_baud interface */ - /* FIXME: Broken on sparc */ - newline.dwDTERate = cpu_to_le32p(acm_tty_speed + - (termios->c_cflag & CBAUD & ~CBAUDEX) + (termios->c_cflag & CBAUDEX ? 15 : 0)); + newline.dwDTERate = cpu_to_le32(tty_get_baud_rate(tty)); newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0; newline.bParityType = termios->c_cflag & PARENB ? (termios->c_cflag & PARODD ? 1 : 2) + --- linux-fsl-imx51-2.6.31.orig/drivers/usb/class/cdc-wdm.c +++ linux-fsl-imx51-2.6.31/drivers/usb/class/cdc-wdm.c @@ -313,8 +313,13 @@ r = usb_autopm_get_interface(desc->intf); if (r < 0) goto outnp; - r = wait_event_interruptible(desc->wait, !test_bit(WDM_IN_USE, - &desc->flags)); + + if (!file->f_flags && O_NONBLOCK) + r = wait_event_interruptible(desc->wait, !test_bit(WDM_IN_USE, + &desc->flags)); + else + if (test_bit(WDM_IN_USE, &desc->flags)) + r = -EAGAIN; if (r < 0) goto out; @@ -377,7 +382,7 @@ static ssize_t wdm_read (struct file *file, char __user *buffer, size_t count, loff_t *ppos) { - int rv, cntr; + int rv, cntr = 0; int i = 0; struct wdm_device *desc = file->private_data; @@ -389,10 +394,23 @@ if (desc->length == 0) { desc->read = 0; retry: + if (test_bit(WDM_DISCONNECTING, &desc->flags)) { + rv = -ENODEV; + goto err; + } i++; - rv = wait_event_interruptible(desc->wait, - test_bit(WDM_READ, &desc->flags)); + if (file->f_flags & O_NONBLOCK) { + if (!test_bit(WDM_READ, &desc->flags)) { + rv = cntr ? cntr : -EAGAIN; + goto err; + } + rv = 0; + } else { + rv = wait_event_interruptible(desc->wait, + test_bit(WDM_READ, &desc->flags)); + } + /* may have happened while we slept */ if (test_bit(WDM_DISCONNECTING, &desc->flags)) { rv = -ENODEV; goto err; @@ -448,7 +466,7 @@ err: mutex_unlock(&desc->rlock); - if (rv < 0) + if (rv < 0 && rv != -EAGAIN) dev_err(&desc->intf->dev, "wdm_read: exit error\n"); return rv; } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/class/usbtmc.c +++ linux-fsl-imx51-2.6.31/drivers/usb/class/usbtmc.c @@ -367,13 +367,13 @@ { struct usbtmc_device_data *data; struct device *dev; - unsigned long int n_characters; + u32 n_characters; u8 *buffer; int actual; - int done; - int remaining; + size_t done; + size_t remaining; int retval; - int this_part; + size_t this_part; /* Get pointer to private data structure */ data = filp->private_data; @@ -455,6 +455,18 @@ (buffer[6] << 16) + (buffer[7] << 24); + /* Ensure the instrument doesn't lie about it */ + if(n_characters > actual - 12) { + dev_err(dev, "Device lies about message size: %zu > %zu\n", n_characters, actual - 12); + n_characters = actual - 12; + } + + /* Ensure the instrument doesn't send more back than requested */ + if(n_characters > this_part) { + dev_err(dev, "Device returns more than requested: %zu > %zu\n", done + n_characters, done + this_part); + n_characters = this_part; + } + /* Copy buffer to user space */ if (copy_to_user(buf + done, &buffer[12], n_characters)) { /* There must have been an addressing problem */ @@ -465,6 +477,8 @@ done += n_characters; if (n_characters < USBTMC_SIZE_IOBUFFER) remaining = 0; + else + remaining -= n_characters; } /* Update file position value */ @@ -531,10 +545,16 @@ n_bytes = roundup(12 + this_part, 4); memset(buffer + 12 + this_part, 0, n_bytes - (12 + this_part)); - retval = usb_bulk_msg(data->usb_dev, - usb_sndbulkpipe(data->usb_dev, - data->bulk_out), - buffer, n_bytes, &actual, USBTMC_TIMEOUT); + do { + retval = usb_bulk_msg(data->usb_dev, + usb_sndbulkpipe(data->usb_dev, + data->bulk_out), + buffer, n_bytes, + &actual, USBTMC_TIMEOUT); + if (retval != 0) + break; + n_bytes -= actual; + } while (n_bytes); data->bTag_last_write = data->bTag; data->bTag++; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/arcotg_udc.h +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/arcotg_udc.h @@ -0,0 +1,705 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file arcotg_udc.h + * @brief Freescale USB device/endpoint management registers + * @ingroup USB + */ + +#ifndef __ARCOTG_UDC_H +#define __ARCOTG_UDC_H + +#include + +#define TRUE 1 +#define FALSE 0 + +#define MSC_BULK_CB_WRAP_LEN 31 +#ifdef CONFIG_ARCH_MXC +#define USE_MSC_WR(len) (((cpu_is_mx37_rev(CHIP_REV_1_0) == 1) ||\ + (cpu_is_mx51_rev(CHIP_REV_2_0) < 0)) && ((len) == MSC_BULK_CB_WRAP_LEN)) +#else +#define USE_MSC_WR(len) false +#endif + +/* Iram patch */ +#ifdef CONFIG_USB_STATIC_IRAM_PPH +/* size of 1 qTD's buffer,one is for BULK IN and other is BULK OUT */ +#define IRAM_TD_PPH_SIZE (USB_IRAM_SIZE / 2) +#define IRAM_PPH_NTD 2 /* number of TDs in IRAM */ +#else +#define IRAM_TD_PPH_SIZE 0 +#define IRAM_PPH_NTD 0 +#endif + +#ifndef USB_IRAM_BASE_ADDR +#define USB_IRAM_BASE_ADDR 0 +#endif + +#define NEED_IRAM(ep) ((g_iram_size) && \ + ((ep)->desc->bmAttributes == USB_ENDPOINT_XFER_BULK)) + +#ifdef CONFIG_ARCH_MX51 +#define POSTPONE_FREE_LAST_DTD +#else +#undef POSTPONE_FREE_LAST_DTD +#endif + +/* ### define USB registers here + */ +#define USB_MAX_ENDPOINTS 8 +#define USB_MAX_PIPES (USB_MAX_ENDPOINTS*2) +#define USB_MAX_CTRL_PAYLOAD 64 +#define USB_DR_SYS_OFFSET 0x400 + +#define USB_DR_OFFSET 0x3100 + +struct usb_dr_device { + /* Capability register */ + u32 id; + u32 res1[35]; + u32 sbuscfg; /* sbuscfg ahb burst */ + u32 res11[27]; + u16 caplength; /* Capability Register Length */ + u16 hciversion; /* Host Controller Interface Version */ + u32 hcsparams; /* Host Controller Structual Parameters */ + u32 hccparams; /* Host Controller Capability Parameters */ + u32 res2[5]; + u32 dciversion; /* Device Controller Interface Version */ + u32 dccparams; /* Device Controller Capability Parameters */ + u32 res3[6]; + /* Operation register */ + u32 usbcmd; /* USB Command Register */ + u32 usbsts; /* USB Status Register */ + u32 usbintr; /* USB Interrupt Enable Register */ + u32 frindex; /* Frame Index Register */ + u32 res4; + u32 deviceaddr; /* Device Address */ + u32 endpointlistaddr; /* Endpoint List Address Register */ + u32 res5; + u32 burstsize; /* Master Interface Data Burst Size Register */ + u32 txttfilltuning; /* Transmit FIFO Tuning Controls Register */ + u32 res6[6]; + u32 configflag; /* Configure Flag Register */ + u32 portsc1; /* Port 1 Status and Control Register */ + u32 res7[7]; + u32 otgsc; /* On-The-Go Status and Control */ + u32 usbmode; /* USB Mode Register */ + u32 endptsetupstat; /* Endpoint Setup Status Register */ + u32 endpointprime; /* Endpoint Initialization Register */ + u32 endptflush; /* Endpoint Flush Register */ + u32 endptstatus; /* Endpoint Status Register */ + u32 endptcomplete; /* Endpoint Complete Register */ + u32 endptctrl[8 * 2]; /* Endpoint Control Registers */ + u32 res8[256]; +#ifdef CONFIG_ARCH_MX51 + u32 res9[128]; /* i.MX51 start from 0x800 */ +#endif + u32 usbctrl; + u32 otgmirror; + u32 phyctrl0; + u32 phyctrl1; + u32 ctrl1; + u32 uh2ctrl; +}; + + /* non-EHCI USB system interface registers (Big Endian) */ +struct usb_sys_interface { + u32 snoop1; + u32 snoop2; + u32 age_cnt_thresh; /* Age Count Threshold Register */ + u32 pri_ctrl; /* Priority Control Register */ + u32 si_ctrl; /* System Interface Control Register */ + u8 res[236]; + u32 control; /* General Purpose Control Register */ +}; + +/* ep0 transfer state */ +#define WAIT_FOR_SETUP 0 +#define DATA_STATE_XMIT 1 +#define DATA_STATE_NEED_ZLP 2 +#define WAIT_FOR_OUT_STATUS 3 +#define DATA_STATE_RECV 4 + +/* Device Controller Capability Parameter register */ +#define DCCPARAMS_DC 0x00000080 +#define DCCPARAMS_DEN_MASK 0x0000001f + +/* Frame Index Register Bit Masks */ +#define USB_FRINDEX_MASKS (0x3fff) +/* USB CMD Register Bit Masks */ +#define USB_CMD_RUN_STOP (0x00000001) +#define USB_CMD_CTRL_RESET (0x00000002) +#define USB_CMD_PERIODIC_SCHEDULE_EN (0x00000010) +#define USB_CMD_ASYNC_SCHEDULE_EN (0x00000020) +#define USB_CMD_INT_AA_DOORBELL (0x00000040) +#define USB_CMD_ASP (0x00000300) +#define USB_CMD_ASYNC_SCH_PARK_EN (0x00000800) +#define USB_CMD_SUTW (0x00002000) +#define USB_CMD_ATDTW (0x00004000) +#define USB_CMD_ITC (0x00FF0000) + +/* bit 15,3,2 are frame list size */ +#define USB_CMD_FRAME_SIZE_1024 (0x00000000) +#define USB_CMD_FRAME_SIZE_512 (0x00000004) +#define USB_CMD_FRAME_SIZE_256 (0x00000008) +#define USB_CMD_FRAME_SIZE_128 (0x0000000C) +#define USB_CMD_FRAME_SIZE_64 (0x00008000) +#define USB_CMD_FRAME_SIZE_32 (0x00008004) +#define USB_CMD_FRAME_SIZE_16 (0x00008008) +#define USB_CMD_FRAME_SIZE_8 (0x0000800C) + +/* bit 9-8 are async schedule park mode count */ +#define USB_CMD_ASP_00 (0x00000000) +#define USB_CMD_ASP_01 (0x00000100) +#define USB_CMD_ASP_10 (0x00000200) +#define USB_CMD_ASP_11 (0x00000300) +#define USB_CMD_ASP_BIT_POS (8) + +/* bit 23-16 are interrupt threshold control */ +#define USB_CMD_ITC_NO_THRESHOLD (0x00000000) +#define USB_CMD_ITC_1_MICRO_FRM (0x00010000) +#define USB_CMD_ITC_2_MICRO_FRM (0x00020000) +#define USB_CMD_ITC_4_MICRO_FRM (0x00040000) +#define USB_CMD_ITC_8_MICRO_FRM (0x00080000) +#define USB_CMD_ITC_16_MICRO_FRM (0x00100000) +#define USB_CMD_ITC_32_MICRO_FRM (0x00200000) +#define USB_CMD_ITC_64_MICRO_FRM (0x00400000) +#define USB_CMD_ITC_BIT_POS (16) + +/* USB STS Register Bit Masks */ +#define USB_STS_INT (0x00000001) +#define USB_STS_ERR (0x00000002) +#define USB_STS_PORT_CHANGE (0x00000004) +#define USB_STS_FRM_LST_ROLL (0x00000008) +#define USB_STS_SYS_ERR (0x00000010) +#define USB_STS_IAA (0x00000020) +#define USB_STS_RESET (0x00000040) +#define USB_STS_SOF (0x00000080) +#define USB_STS_SUSPEND (0x00000100) +#define USB_STS_HC_HALTED (0x00001000) +#define USB_STS_RCL (0x00002000) +#define USB_STS_PERIODIC_SCHEDULE (0x00004000) +#define USB_STS_ASYNC_SCHEDULE (0x00008000) + +/* USB INTR Register Bit Masks */ +#define USB_INTR_INT_EN (0x00000001) +#define USB_INTR_ERR_INT_EN (0x00000002) +#define USB_INTR_PTC_DETECT_EN (0x00000004) +#define USB_INTR_FRM_LST_ROLL_EN (0x00000008) +#define USB_INTR_SYS_ERR_EN (0x00000010) +#define USB_INTR_ASYN_ADV_EN (0x00000020) +#define USB_INTR_RESET_EN (0x00000040) +#define USB_INTR_SOF_EN (0x00000080) +#define USB_INTR_DEVICE_SUSPEND (0x00000100) + +/* Device Address bit masks */ +#define USB_DEVICE_ADDRESS_MASK (0xFE000000) +#define USB_DEVICE_ADDRESS_BIT_POS (25) + +/* endpoint list address bit masks */ +#define USB_EP_LIST_ADDRESS_MASK (0xfffff800) + +/* PORTSCX Register Bit Masks */ +#define PORTSCX_CURRENT_CONNECT_STATUS (0x00000001) +#define PORTSCX_CONNECT_STATUS_CHANGE (0x00000002) +#define PORTSCX_PORT_ENABLE (0x00000004) +#define PORTSCX_PORT_EN_DIS_CHANGE (0x00000008) +#define PORTSCX_OVER_CURRENT_ACT (0x00000010) +#define PORTSCX_OVER_CURRENT_CHG (0x00000020) +#define PORTSCX_PORT_FORCE_RESUME (0x00000040) +#define PORTSCX_PORT_SUSPEND (0x00000080) +#define PORTSCX_PORT_RESET (0x00000100) +#define PORTSCX_LINE_STATUS_BITS (0x00000C00) +#define PORTSCX_PORT_POWER (0x00001000) +#define PORTSCX_PORT_INDICTOR_CTRL (0x0000C000) +#define PORTSCX_PORT_TEST_CTRL (0x000F0000) +#define PORTSCX_WAKE_ON_CONNECT_EN (0x00100000) +#define PORTSCX_WAKE_ON_CONNECT_DIS (0x00200000) +#define PORTSCX_WAKE_ON_OVER_CURRENT (0x00400000) +#define PORTSCX_PHY_LOW_POWER_SPD (0x00800000) +#define PORTSCX_PORT_FORCE_FULL_SPEED (0x01000000) +#define PORTSCX_PORT_SPEED_MASK (0x0C000000) +#define PORTSCX_PORT_WIDTH (0x10000000) +#define PORTSCX_PHY_TYPE_SEL (0xC0000000) + +/* bit 11-10 are line status */ +#define PORTSCX_LINE_STATUS_SE0 (0x00000000) +#define PORTSCX_LINE_STATUS_JSTATE (0x00000400) +#define PORTSCX_LINE_STATUS_KSTATE (0x00000800) +#define PORTSCX_LINE_STATUS_UNDEF (0x00000C00) +#define PORTSCX_LINE_STATUS_BIT_POS (10) + +/* bit 15-14 are port indicator control */ +#define PORTSCX_PIC_OFF (0x00000000) +#define PORTSCX_PIC_AMBER (0x00004000) +#define PORTSCX_PIC_GREEN (0x00008000) +#define PORTSCX_PIC_UNDEF (0x0000C000) +#define PORTSCX_PIC_BIT_POS (14) + +/* bit 19-16 are port test control */ +#define PORTSCX_PTC_DISABLE (0x00000000) +#define PORTSCX_PTC_JSTATE (0x00010000) +#define PORTSCX_PTC_KSTATE (0x00020000) +#define PORTSCX_PTC_SEQNAK (0x00030000) +#define PORTSCX_PTC_PACKET (0x00040000) +#define PORTSCX_PTC_FORCE_EN (0x00050000) +#define PORTSCX_PTC_BIT_POS (16) + +/* bit 27-26 are port speed */ +#define PORTSCX_PORT_SPEED_FULL (0x00000000) +#define PORTSCX_PORT_SPEED_LOW (0x04000000) +#define PORTSCX_PORT_SPEED_HIGH (0x08000000) +#define PORTSCX_PORT_SPEED_UNDEF (0x0C000000) +#define PORTSCX_SPEED_BIT_POS (26) + +/* OTGSC Register Bit Masks */ +#define OTGSC_B_SESSION_VALID_IRQ_EN (1 << 27) +#define OTGSC_B_SESSION_VALID_IRQ_STS (1 << 19) +#define OTGSC_B_SESSION_VALID (1 << 11) + +/* bit 28 is parallel transceiver width for UTMI interface */ +#define PORTSCX_PTW (0x10000000) +#define PORTSCX_PTW_8BIT (0x00000000) +#define PORTSCX_PTW_16BIT (0x10000000) + +/* bit 31-30 are port transceiver select */ +#define PORTSCX_PTS_UTMI (0x00000000) +#define PORTSCX_PTS_ULPI (0x80000000) +#define PORTSCX_PTS_FSLS (0xC0000000) +#define PORTSCX_PTS_BIT_POS (30) + +/* USB MODE Register Bit Masks */ +#define USB_MODE_CTRL_MODE_IDLE (0x00000000) +#define USB_MODE_CTRL_MODE_DEVICE (0x00000002) +#define USB_MODE_CTRL_MODE_HOST (0x00000003) +#define USB_MODE_CTRL_MODE_MASK 0x00000003 +#define USB_MODE_CTRL_MODE_RSV (0x00000001) +#define USB_MODE_ES 0x00000004 /* (big) Endian Sel */ +#define USB_MODE_SETUP_LOCK_OFF (0x00000008) +#define USB_MODE_STREAM_DISABLE (0x00000010) +/* Endpoint Flush Register */ +#define EPFLUSH_TX_OFFSET (0x00010000) +#define EPFLUSH_RX_OFFSET (0x00000000) + +/* Endpoint Setup Status bit masks */ +#define EP_SETUP_STATUS_MASK (0x0000003F) +#define EP_SETUP_STATUS_EP0 (0x00000001) + +/* ENDPOINTCTRLx Register Bit Masks */ +#define EPCTRL_TX_ENABLE (0x00800000) +#define EPCTRL_TX_DATA_TOGGLE_RST (0x00400000) /* Not EP0 */ +#define EPCTRL_TX_DATA_TOGGLE_INH (0x00200000) /* Not EP0 */ +#define EPCTRL_TX_TYPE (0x000C0000) +#define EPCTRL_TX_DATA_SOURCE (0x00020000) /* Not EP0 */ +#define EPCTRL_TX_EP_STALL (0x00010000) +#define EPCTRL_RX_ENABLE (0x00000080) +#define EPCTRL_RX_DATA_TOGGLE_RST (0x00000040) /* Not EP0 */ +#define EPCTRL_RX_DATA_TOGGLE_INH (0x00000020) /* Not EP0 */ +#define EPCTRL_RX_TYPE (0x0000000C) +#define EPCTRL_RX_DATA_SINK (0x00000002) /* Not EP0 */ +#define EPCTRL_RX_EP_STALL (0x00000001) + +/* bit 19-18 and 3-2 are endpoint type */ +#define EPCTRL_EP_TYPE_CONTROL (0) +#define EPCTRL_EP_TYPE_ISO (1) +#define EPCTRL_EP_TYPE_BULK (2) +#define EPCTRL_EP_TYPE_INTERRUPT (3) +#define EPCTRL_TX_EP_TYPE_SHIFT (18) +#define EPCTRL_RX_EP_TYPE_SHIFT (2) + +/* SNOOPn Register Bit Masks */ +#define SNOOP_ADDRESS_MASK (0xFFFFF000) +#define SNOOP_SIZE_ZERO (0x00) /* snooping disable */ +#define SNOOP_SIZE_4KB (0x0B) /* 4KB snoop size */ +#define SNOOP_SIZE_8KB (0x0C) +#define SNOOP_SIZE_16KB (0x0D) +#define SNOOP_SIZE_32KB (0x0E) +#define SNOOP_SIZE_64KB (0x0F) +#define SNOOP_SIZE_128KB (0x10) +#define SNOOP_SIZE_256KB (0x11) +#define SNOOP_SIZE_512KB (0x12) +#define SNOOP_SIZE_1MB (0x13) +#define SNOOP_SIZE_2MB (0x14) +#define SNOOP_SIZE_4MB (0x15) +#define SNOOP_SIZE_8MB (0x16) +#define SNOOP_SIZE_16MB (0x17) +#define SNOOP_SIZE_32MB (0x18) +#define SNOOP_SIZE_64MB (0x19) +#define SNOOP_SIZE_128MB (0x1A) +#define SNOOP_SIZE_256MB (0x1B) +#define SNOOP_SIZE_512MB (0x1C) +#define SNOOP_SIZE_1GB (0x1D) +#define SNOOP_SIZE_2GB (0x1E) /* 2GB snoop size */ + +/* pri_ctrl Register Bit Masks */ +#define PRI_CTRL_PRI_LVL1 (0x0000000C) +#define PRI_CTRL_PRI_LVL0 (0x00000003) + +/* si_ctrl Register Bit Masks */ +#define SI_CTRL_ERR_DISABLE (0x00000010) +#define SI_CTRL_IDRC_DISABLE (0x00000008) +#define SI_CTRL_RD_SAFE_EN (0x00000004) +#define SI_CTRL_RD_PREFETCH_DISABLE (0x00000002) +#define SI_CTRL_RD_PREFEFETCH_VAL (0x00000001) + +/* control Register Bit Masks */ +#define USB_CTRL_IOENB (0x00000004) +#define USB_CTRL_ULPI_INT0EN (0x00000001) +#define USB_CTRL_OTG_WUIR (0x80000000) +#define USB_CTRL_OTG_WUIE (0x08000000) +#define USB_CTRL_OTG_VWUE (0x00001000) +#define USB_CTRL_OTG_IWUE (0x00100000) + +/* PHY control0 Register Bit Masks */ +#define PHY_CTRL0_CONF2 (1 << 26) + +/* USB UH2 CTRL Register Bits */ +#define USB_UH2_OVBWK_EN (1 << 6) /* OTG VBUS Wakeup Enable */ +#define USB_UH2_OIDWK_EN (1 << 5) /* OTG ID Wakeup Enable */ +/*! + * Endpoint Queue Head data struct + * Rem: all the variables of qh are LittleEndian Mode + * and NEXT_POINTER_MASK should operate on a LittleEndian, Phy Addr + */ +struct ep_queue_head { + /*! + * Mult(31-30) , Zlt(29) , Max Pkt len and IOS(15) + */ + u32 max_pkt_length; + + /*! + * Current dTD Pointer(31-5) + */ + u32 curr_dtd_ptr; + + /*! + * Next dTD Pointer(31-5), T(0) + */ + u32 next_dtd_ptr; + + /*! + * Total bytes (30-16), IOC (15), MultO(11-10), STS (7-0) + */ + u32 size_ioc_int_sts; + + /*! + * Buffer pointer Page 0 (31-12) + */ + u32 buff_ptr0; + + /*! + * Buffer pointer Page 1 (31-12) + */ + u32 buff_ptr1; + + /*! + * Buffer pointer Page 2 (31-12) + */ + u32 buff_ptr2; + + /*! + * Buffer pointer Page 3 (31-12) + */ + u32 buff_ptr3; + + /*! + * Buffer pointer Page 4 (31-12) + */ + u32 buff_ptr4; + + /*! + * reserved field 1 + */ + u32 res1; + /*! + * Setup data 8 bytes + */ + u8 setup_buffer[8]; /* Setup data 8 bytes */ + + /*! + * reserved field 2,pad out to 64 bytes + */ + u32 res2[4]; +}; + +/* Endpoint Queue Head Bit Masks */ +#define EP_QUEUE_HEAD_MULT_POS (30) +#define EP_QUEUE_HEAD_ZLT_SEL (0x20000000) +#define EP_QUEUE_HEAD_MAX_PKT_LEN_POS (16) +#define EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) (((ep_info)>>16)&0x07ff) +#define EP_QUEUE_HEAD_IOS (0x00008000) +#define EP_QUEUE_HEAD_NEXT_TERMINATE (0x00000001) +#define EP_QUEUE_HEAD_IOC (0x00008000) +#define EP_QUEUE_HEAD_MULTO (0x00000C00) +#define EP_QUEUE_HEAD_STATUS_HALT (0x00000040) +#define EP_QUEUE_HEAD_STATUS_ACTIVE (0x00000080) +#define EP_QUEUE_CURRENT_OFFSET_MASK (0x00000FFF) +#define EP_QUEUE_HEAD_NEXT_POINTER_MASK 0xFFFFFFE0 +#define EP_QUEUE_FRINDEX_MASK (0x000007FF) +#define EP_MAX_LENGTH_TRANSFER (0x4000) + +/*! + * Endpoint Transfer Descriptor data struct + * Rem: all the variables of td are LittleEndian Mode + * must be 32-byte aligned + */ +struct ep_td_struct { + /*! + * Next TD pointer(31-5), T(0) set indicate invalid + */ + u32 next_td_ptr; + + /*! + * Total bytes (30-16), IOC (15),MultO(11-10), STS (7-0) + */ + u32 size_ioc_sts; + + /*! + * Buffer pointer Page 0 + */ + u32 buff_ptr0; + + /*! + * Buffer pointer Page 1 + */ + u32 buff_ptr1; + + /*! + * Buffer pointer Page 2 + */ + u32 buff_ptr2; + + /*! + * Buffer pointer Page 3 + */ + u32 buff_ptr3; + + /*! + * Buffer pointer Page 4 + */ + u32 buff_ptr4; + + /*! + * dma address of this td + * */ + dma_addr_t td_dma; + + /*! + * virtual address of next td + * */ + struct ep_td_struct *next_td_virt; + + /*! + * make it an even 16 words + * */ + u32 res[7]; +}; + +/*! + * Endpoint Transfer Descriptor bit Masks + */ +#define DTD_NEXT_TERMINATE (0x00000001) +#define DTD_IOC (0x00008000) +#define DTD_STATUS_ACTIVE (0x00000080) +#define DTD_STATUS_HALTED (0x00000040) +#define DTD_STATUS_DATA_BUFF_ERR (0x00000020) +#define DTD_STATUS_TRANSACTION_ERR (0x00000008) +#define DTD_RESERVED_FIELDS (0x80007300) +#define DTD_ADDR_MASK 0xFFFFFFE0 +#define DTD_PACKET_SIZE (0x7FFF0000) +#define DTD_LENGTH_BIT_POS (16) +#define DTD_ERROR_MASK (DTD_STATUS_HALTED | \ + DTD_STATUS_DATA_BUFF_ERR | \ + DTD_STATUS_TRANSACTION_ERR) +/* Alignment requirements; must be a power of two */ +#define DTD_ALIGNMENT 0x20 +#define QH_ALIGNMENT 2048 + +/* Controller dma boundary */ +#define UDC_DMA_BOUNDARY 0x1000 + +/* -----------------------------------------------------------------------*/ +/* ##### enum data +*/ +typedef enum { + e_ULPI, + e_UTMI_8BIT, + e_UTMI_16BIT, + e_SERIAL +} e_PhyInterface; + +/*-------------------------------------------------------------------------*/ + +struct fsl_req { + struct usb_request req; + struct list_head queue; + /* ep_queue() func will add + a request->queue into a udc_ep->queue 'd tail */ + struct fsl_ep *ep; + unsigned mapped; + + struct ep_td_struct *head, *tail; /* For dTD List + this is a BigEndian Virtual addr */ + unsigned int dtd_count; + /* just for IRAM patch */ + dma_addr_t oridma; /* original dma */ + size_t buffer_offset; /* offset of user buffer */ + int last_one; /* mark if reach to last packet */ + struct ep_td_struct *cur; /* current tranfer dtd */ +}; + +#define REQ_UNCOMPLETE (1) + +struct fsl_ep { + struct usb_ep ep; + struct list_head queue; + struct fsl_udc *udc; + struct ep_queue_head *qh; + const struct usb_endpoint_descriptor *desc; + struct usb_gadget *gadget; + + char name[14]; + unsigned stopped:1; +}; + +#define EP_DIR_IN 1 +#define EP_DIR_OUT 0 + +struct fsl_udc { + struct usb_gadget gadget; + struct usb_gadget_driver *driver; + struct fsl_usb2_platform_data *pdata; + struct fsl_ep *eps; + unsigned int max_ep; + unsigned int irq; + + struct usb_ctrlrequest local_setup_buff; + spinlock_t lock; + u32 xcvr_type; + struct otg_transceiver *transceiver; + unsigned softconnect:1; + unsigned vbus_active:1; + unsigned stopped:1; + unsigned remote_wakeup:1; + unsigned already_stopped:1; + + struct ep_queue_head *ep_qh; /* Endpoints Queue-Head */ + struct fsl_req *status_req; /* ep0 status request */ + struct fsl_req *data_req; /* ep0 data request */ + struct dma_pool *td_pool; /* dma pool for DTD */ + enum fsl_usb2_phy_modes phy_mode; + + size_t ep_qh_size; /* size after alignment adjustment*/ + dma_addr_t ep_qh_dma; /* dma address of QH */ + + u32 max_pipes; /* Device max pipes */ + u32 max_use_endpts; /* Max endpointes to be used */ + u32 bus_reset; /* Device is bus reseting */ + u32 resume_state; /* USB state to resume */ + u32 usb_state; /* USB current state */ + u32 usb_next_state; /* USB next state */ + u32 ep0_dir; /* Endpoint zero direction: can be + USB_DIR_IN or USB_DIR_OUT */ + u32 usb_sof_count; /* SOF count */ + u32 errors; /* USB ERRORs count */ + u8 device_address; /* Device USB address */ + + struct completion *done; /* to make sure release() is done */ + u32 iram_buffer[IRAM_PPH_NTD]; + void *iram_buffer_v[IRAM_PPH_NTD]; +}; + +/*-------------------------------------------------------------------------*/ + +#ifdef DEBUG +#define DBG(fmt, args...) printk(KERN_DEBUG "[%s] " fmt "\n", \ + __func__, ## args) +#else +#define DBG(fmt, args...) do {} while (0) +#endif + +#if 0 +static void dump_msg(const char *label, const u8 * buf, unsigned int length) +{ + unsigned int start, num, i; + char line[52], *p; + + if (length >= 512) + return; + pr_debug("udc: %s, length %u:\n", label, length); + start = 0; + while (length > 0) { + num = min(length, 16u); + p = line; + for (i = 0; i < num; ++i) { + if (i == 8) + *p++ = ' '; + sprintf(p, " %02x", buf[i]); + p += 3; + } + *p = 0; + printk(KERN_DEBUG "%6x: %s\n", start, line); + buf += num; + start += num; + length -= num; + } +} +#endif + +#ifdef VERBOSE +#define VDBG DBG +#else +#define VDBG(stuff...) do {} while (0) +#endif + +#define ERR(stuff...) printk(KERN_ERR "udc: " stuff) +#define INFO(stuff...) printk(KERN_INFO "udc: " stuff) + +/*-------------------------------------------------------------------------*/ + +/* ### Add board specific defines here + */ + +/* + * ### pipe direction macro from device view + */ +#define USB_RECV (0) /* OUT EP */ +#define USB_SEND (1) /* IN EP */ + +/* + * ### internal used help routines. + */ +#define ep_index(EP) ((EP)->desc->bEndpointAddress&0xF) +#define ep_maxpacket(EP) ((EP)->ep.maxpacket) + +#define ep_is_in(EP) ( (ep_index(EP) == 0) ? (EP->udc->ep0_dir == \ + USB_DIR_IN ):((EP)->desc->bEndpointAddress \ + & USB_DIR_IN)==USB_DIR_IN) + +#define get_ep_by_pipe(udc, pipe) ((pipe == 1)? &udc->eps[0]: \ + &udc->eps[pipe]) +#define get_pipe_by_windex(windex) ((windex & USB_ENDPOINT_NUMBER_MASK) \ + * 2 + ((windex & USB_DIR_IN) ? 1 : 0)) + +/* Bulk only class request */ +#define USB_BULK_RESET_REQUEST 0xff + +#if defined(CONFIG_ARCH_MXC) || defined(CONFIG_ARCH_STMP3XXX) +#include +#elif CONFIG_PPC32 +#include +#endif + +#endif /* __ARCOTG_UDC_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/Kconfig @@ -209,17 +209,6 @@ default USB_GADGET select USB_GADGET_SELECTED -config USB_OTG - boolean "OTG Support" - depends on USB_GADGET_OMAP && ARCH_OMAP_OTG && USB_OHCI_HCD - help - The most notable feature of USB OTG is support for a - "Dual-Role" device, which can act as either a device - or a host. The initial role choice can be changed - later, when two dual-role devices talk to each other. - - Select this only if your OMAP board has a Mini-AB connector. - config USB_GADGET_PXA25X boolean "PXA 25x or IXP 4xx" depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX @@ -474,6 +463,30 @@ default USB_GADGET select USB_GADGET_SELECTED +config USB_GADGET_ARC + boolean "Freescale USB Device Controller" + depends on ARCH_MXC || ARCH_STMP3XXX + select USB_GADGET_DUALSPEED if USB_GADGET_FSL_1504 || USB_GADGET_FSL_UTMI + help + Some Freescale processors have a USBOTG controller, + which supports device mode. + + Say "y" to link the driver statically, or "m" to build a + dynamically linked module called "arc_udc" and force all + gadget drivers to also be dynamically linked. + +config USB_STATIC_IRAM_PPH + bool "Apply static IRAM patch" + depends on USB_GADGET_ARC && (ARCH_MX37 || ARCH_MX3 || ARCH_MX25) + help + Apply static IRAM patch to peripheral driver. + +config USB_ARC + tristate + depends on USB_GADGET_ARC + default USB_GADGET + select USB_GADGET_SELECTED + config USB_GADGET_LANGWELL boolean "Intel Langwell USB Device Controller" depends on PCI @@ -542,6 +555,69 @@ Means that gadget drivers should include extra descriptors and code to handle dual-speed controllers. +config USB_GADGET_ARC_OTG + bool "Support for DR peripheral port on Freescale controller" + depends on USB_GADGET_ARC + default y + help + Enable support for the Freescale Dual Role port in peripheral mode. + +choice + prompt "Select transceiver for DR port" + depends on USB_GADGET_ARC_OTG + help + Choose the transceiver to use with the Freescale DR port. + +config USB_GADGET_FSL_MC13783 + bool "Freescale MC13783" + depends on !USB_EHCI_FSL_1301 && !USB_EHCI_FSL_1504 && !USB_EHCI_FSL_UTMI && !MACH_MX25_3DS + ---help--- + Enable support for the Full Speed Freescale MC13783 transceiver. + + The mx27ads, mx31ads and mx32ads boards require modifications + to support this transceiver. + +config USB_GADGET_FSL_1301 + bool "Philips ISP1301" + depends on !USB_EHCI_FSL_MC13783 && !USB_EHCI_FSL_1504 && !USB_EHCI_FSL_UTMI && !MACH_MX25_3DS + ---help--- + Enable support for the Full Speed Philips ISP1301 transceiver. + + This is the factory default for the mx27ads board. + The mx31ads and mx32ads boards require modifications + to support this transceiver. + +config USB_GADGET_FSL_1504 + bool "Philips ISP1504" + depends on !USB_EHCI_FSL_MC13783 && !USB_EHCI_FSL_1301 && !USB_EHCI_FSL_UTMI && !MACH_MX25_3DS + ---help--- + Enable support for the High Speed Philips ISP1504 transceiver. + + This is the factory default for the mx31ads and mx32ads boards. + The mx27ads board requires modifications to support this transceiver. + +config USB_GADGET_FSL_UTMI + bool "On-chip UTMI" + depends on !USB_EHCI_FSL_MC13783 && !USB_EHCI_FSL_1301 && !USB_EHCI_FSL_1504 + ---help--- + Enable support for the High Speed Philips ISP1504 transceiver. + + This is the factory default for the mx35 board. + +endchoice + +config USB_OTG + boolean "OTG Support" + depends on (USB_GADGET_OMAP && ARCH_OMAP_OTG && USB_OHCI_HCD) || \ + (USB_GADGET_ARC && (ARCH_MXC || ARCH_STMP3XXX) && USB_EHCI_HCD) + help + The most notable feature of USB OTG is support for a + "Dual-Role" device, which can act as either a device + or a host. The initial role choice can be changed + later, when two dual-role devices talk to each other. + + Select this only if your OMAP board has a Mini-AB connector. + # # USB Gadget Drivers # @@ -692,6 +768,12 @@ Say "y" to link the driver statically, or "m" to build a dynamically linked module called "g_file_storage". +config STMP_UTP + bool "UTP over Storage Gadget" + depends on USB_FILE_STORAGE && ARCH_STMP3XXX + help + Freescale's extension to MSC protocol + config USB_FILE_STORAGE_TEST bool "File-backed Storage Gadget testing version" depends on USB_FILE_STORAGE --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/amd5536udc.c +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/amd5536udc.c @@ -1213,7 +1213,12 @@ tmp &= AMD_UNMASK_BIT(ep->num); writel(tmp, &dev->regs->ep_irqmsk); } - } + } else if (ep->in) { + /* enable ep irq */ + tmp = readl(&dev->regs->ep_irqmsk); + tmp &= AMD_UNMASK_BIT(ep->num); + writel(tmp, &dev->regs->ep_irqmsk); + } } else if (ep->dma) { @@ -2005,18 +2010,17 @@ { int tmp; - /* empty queues and init hardware */ - udc_basic_init(dev); - for (tmp = 0; tmp < UDC_EP_NUM; tmp++) { - empty_req_queue(&dev->ep[tmp]); - } - if (dev->gadget.speed != USB_SPEED_UNKNOWN) { spin_unlock(&dev->lock); driver->disconnect(&dev->gadget); spin_lock(&dev->lock); } - /* init */ + + /* empty queues and init hardware */ + udc_basic_init(dev); + for (tmp = 0; tmp < UDC_EP_NUM; tmp++) + empty_req_queue(&dev->ep[tmp]); + udc_setup_endpoints(dev); } @@ -2478,6 +2482,13 @@ } } + } else if (!use_dma && ep->in) { + /* disable interrupt */ + tmp = readl( + &dev->regs->ep_irqmsk); + tmp |= AMD_BIT(ep->num); + writel(tmp, + &dev->regs->ep_irqmsk); } } /* clear status bits */ @@ -3285,6 +3296,17 @@ goto finished; } + spin_lock_init(&dev->lock); + /* udc csr registers base */ + dev->csr = dev->virt_addr + UDC_CSR_ADDR; + /* dev registers base */ + dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR; + /* ep registers base */ + dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR; + /* fifo's base */ + dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR); + dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR); + if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) { dev_dbg(&dev->pdev->dev, "request_irq(%d) fail\n", pdev->irq); kfree(dev); @@ -3337,7 +3359,6 @@ udc_pollstall_timer.data = 0; /* device struct setup */ - spin_lock_init(&dev->lock); dev->gadget.ops = &udc_ops; dev_set_name(&dev->gadget.dev, "gadget"); @@ -3346,16 +3367,6 @@ dev->gadget.name = name; dev->gadget.is_dualspeed = 1; - /* udc csr registers base */ - dev->csr = dev->virt_addr + UDC_CSR_ADDR; - /* dev registers base */ - dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR; - /* ep registers base */ - dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR; - /* fifo's base */ - dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR); - dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR); - /* init registers, interrupts, ... */ startup_registers(dev); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/gadget_chips.h +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/gadget_chips.h @@ -92,6 +92,12 @@ #define gadget_is_pxa27x(g) 0 #endif +#ifdef CONFIG_USB_GADGET_ARC +#define gadget_is_arcotg(g) !strcmp("fsl-usb2-udc", (g)->name) +#else +#define gadget_is_arcotg(g) 0 +#endif + #ifdef CONFIG_USB_GADGET_ATMEL_USBA #define gadget_is_atmel_usba(g) !strcmp("atmel_usba_udc", (g)->name) #else @@ -239,6 +245,8 @@ return 0x23; else if (gadget_is_langwell(gadget)) return 0x24; + else if (gadget_is_arcotg(gadget)) + return 0x25; return -ENOENT; } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/stmp_updater.c +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/stmp_updater.c @@ -0,0 +1,479 @@ +/* + * Freescale STMP378X UUT driver + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +static u64 get_be64(u8 *buf) +{ + return ((u64)get_unaligned_be32(buf) << 32) | get_unaligned_be32(buf + 4); +} + +static int utp_init(struct fsg_dev *fsg) +{ + init_waitqueue_head(&utp_context.wq); + INIT_LIST_HEAD(&utp_context.read); + INIT_LIST_HEAD(&utp_context.write); + mutex_init(&utp_context.lock); + utp_context.buffer = vmalloc(0x10000); + if (!utp_context.buffer) + return -EIO; + utp_context.utp_version = 0x1ull; + fsg->utp = &utp_context; + return misc_register(&utp_dev); +} + +static void utp_exit(struct fsg_dev *fsg) +{ + vfree(utp_context.buffer); + misc_deregister(&utp_dev); +} + +static struct utp_user_data *utp_user_data_alloc(size_t size) +{ + struct utp_user_data *uud; + + uud = kzalloc(size + sizeof(*uud), GFP_KERNEL); + if (!uud) + return uud; + uud->data.size = size + sizeof(uud->data); + INIT_LIST_HEAD(&uud->link); + return uud; +} + +static void utp_user_data_free(struct utp_user_data *uud) +{ + list_del(&uud->link); + kfree(uud); +} + +#define WAIT_ACTIVITY(queue) \ + wait_event_interruptible(utp_context.wq, !list_empty(&utp_context.queue)) + +static ssize_t utp_file_read(struct file *file, + char __user *buf, + size_t size, + loff_t *off) +{ + struct utp_user_data *uud; + size_t size_to_put; + int free = 0; + + WAIT_ACTIVITY(read); + + mutex_lock(&utp_context.lock); + uud = list_first_entry(&utp_context.read, struct utp_user_data, link); + mutex_unlock(&utp_context.lock); + size_to_put = uud->data.size; + if (size >= size_to_put) + free = !0; + if (copy_to_user(buf, &uud->data, size_to_put)) + return -EACCES; + if (free) + utp_user_data_free(uud); + else { + pr_info("sizeof = %d, size = %d\n", + sizeof(uud->data), + uud->data.size); + + pr_err("Will not free utp_user_data, because buffer size = %d," + "need to put %d\n", size, size_to_put); + } + + return size_to_put; +} + + +static ssize_t utp_file_write(struct file *file, const char __user *buf, + size_t size, loff_t *off) +{ + struct utp_user_data *uud; + + if (size < sizeof(uud->data)) + return -EINVAL; + uud = utp_user_data_alloc(size); + if (copy_from_user(&uud->data, buf, size)) + return -EACCES; + mutex_lock(&utp_context.lock); + list_add_tail(&uud->link, &utp_context.write); + wake_up(&utp_context.wq); + mutex_unlock(&utp_context.lock); + return size; +} + +static int utp_get_sense(struct fsg_dev *fsg) +{ + if (UTP_CTX(fsg)->processed == 0) + return -1; + + UTP_CTX(fsg)->processed = 0; + return 0; +} + +static int utp_do_read(struct fsg_dev *fsg, void *data, size_t size) +{ + struct fsg_buffhd *bh; + int rc; + u32 amount_left; + unsigned int amount; + + /* Get the starting Logical Block Address and check that it's + * not too big */ + + amount_left = size; + if (unlikely(amount_left == 0)) + return -EIO; /* No default reply*/ + + pr_debug("%s: sending %d\n", __func__, size); + for (;;) { + /* Figure out how much we need to read: + * Try to read the remaining amount. + * But don't read more than the buffer size. + * And don't try to read past the end of the file. + * Finally, if we're not at a page boundary, don't read past + * the next page. + * If this means reading 0 then we were asked to read past + * the end of file. */ + amount = min((unsigned int) amount_left, mod_data.buflen); + + /* Wait for the next buffer to become available */ + bh = fsg->next_buffhd_to_fill; + while (bh->state != BUF_STATE_EMPTY) { + rc = sleep_thread(fsg); + if (rc) + return rc; + } + + /* If we were asked to read past the end of file, + * end with an empty buffer. */ + if (amount == 0) { + bh->inreq->length = 0; + bh->state = BUF_STATE_FULL; + break; + } + + /* Perform the read */ + pr_info("Copied to %p, %d bytes started from %d\n", + bh->buf, amount, size - amount_left); + memcpy(bh->buf, data + size - amount_left, amount); + amount_left -= amount; + fsg->residue -= amount; + + bh->inreq->length = amount; + bh->state = BUF_STATE_FULL; + + /* Send this buffer and go read some more */ + bh->inreq->zero = 0; + + start_transfer(fsg, fsg->bulk_in, bh->inreq, + &bh->inreq_busy, &bh->state); + + fsg->next_buffhd_to_fill = bh->next; + + if (amount_left <= 0) + break; + } + + return size - amount_left; +} + +static int utp_do_write(struct fsg_dev *fsg, void *data, size_t size) +{ + struct fsg_buffhd *bh; + int get_some_more; + u32 amount_left_to_req, amount_left_to_write; + unsigned int amount; + int rc; + loff_t offset; + + /* Carry out the file writes */ + get_some_more = 1; + amount_left_to_req = amount_left_to_write = size; + + if (unlikely(amount_left_to_write == 0)) + return -EIO; + + offset = 0; + while (amount_left_to_write > 0) { + + /* Queue a request for more data from the host */ + bh = fsg->next_buffhd_to_fill; + if (bh->state == BUF_STATE_EMPTY && get_some_more) { + + /* Figure out how much we want to get: + * Try to get the remaining amount. + * But don't get more than the buffer size. + * And don't try to go past the end of the file. + * If we're not at a page boundary, + * don't go past the next page. + * If this means getting 0, then we were asked + * to write past the end of file. + * Finally, round down to a block boundary. */ + amount = min(amount_left_to_req, mod_data.buflen); + + if (amount == 0) { + get_some_more = 0; + /* cry now */ + continue; + } + + /* Get the next buffer */ + amount_left_to_req -= amount; + if (amount_left_to_req == 0) + get_some_more = 0; + + /* amount is always divisible by 512, hence by + * the bulk-out maxpacket size */ + bh->outreq->length = bh->bulk_out_intended_length = + amount; + bh->outreq->short_not_ok = 1; + start_transfer(fsg, fsg->bulk_out, bh->outreq, + &bh->outreq_busy, &bh->state); + fsg->next_buffhd_to_fill = bh->next; + continue; + } + + /* Write the received data to the backing file */ + bh = fsg->next_buffhd_to_drain; + if (bh->state == BUF_STATE_EMPTY && !get_some_more) + break; /* We stopped early */ + if (bh->state == BUF_STATE_FULL) { + smp_rmb(); + fsg->next_buffhd_to_drain = bh->next; + bh->state = BUF_STATE_EMPTY; + + /* Did something go wrong with the transfer? */ + if (bh->outreq->status != 0) + /* cry again, COMMUNICATION_FAILURE */ + break; + + amount = bh->outreq->actual; + + /* Perform the write */ + memcpy(data + offset, bh->buf, amount); + + offset += amount; + if (signal_pending(current)) + return -EINTR; /* Interrupted!*/ + amount_left_to_write -= amount; + fsg->residue -= amount; + + /* Did the host decide to stop early? */ + if (bh->outreq->actual != bh->outreq->length) { + fsg->short_packet_received = 1; + break; + } + continue; + } + + /* Wait for something to happen */ + rc = sleep_thread(fsg); + if (rc) + return rc; + } + + return -EIO; +} + +static inline void utp_set_sense(struct fsg_dev *fsg, u16 code, u64 reply) +{ + UTP_CTX(fsg)->processed = true; + UTP_CTX(fsg)->sdinfo = reply & 0xFFFFFFFF; + UTP_CTX(fsg)->sdinfo_h = (reply >> 32) & 0xFFFFFFFF; + UTP_CTX(fsg)->sd = (UTP_SENSE_KEY << 16) | code; +} + +static void utp_poll(struct fsg_dev *fsg) +{ + struct utp_context *ctx = UTP_CTX(fsg); + struct utp_user_data *uud = NULL; + + mutex_lock(&ctx->lock); + if (!list_empty(&ctx->write)) + uud = list_first_entry(&ctx->write, struct utp_user_data, link); + mutex_unlock(&ctx->lock); + + if (uud) { + if (uud->data.flags & UTP_FLAG_STATUS) { + pr_debug("%s: exit with status %d\n", __func__, + uud->data.status); + UTP_SS_EXIT(fsg, uud->data.status); + } else { + pr_debug("%s: pass\n", __func__); + UTP_SS_PASS(fsg); + } + utp_user_data_free(uud); + } else { + pr_debug("%s: still busy...\n", __func__); + UTP_SS_BUSY(fsg, --ctx->counter); + } +} + +static int utp_exec(struct fsg_dev *fsg, + char *command, + int cmdsize, + unsigned long long payload) +{ + struct utp_user_data *uud = NULL, *uud2r; + struct utp_context *ctx = UTP_CTX(fsg); + + uud2r = utp_user_data_alloc(cmdsize + 1); + uud2r->data.flags = UTP_FLAG_COMMAND; + uud2r->data.payload = payload; + strncpy(uud2r->data.command, command, cmdsize); + + mutex_lock(&ctx->lock); + list_add_tail(&uud2r->link, &ctx->read); + mutex_unlock(&ctx->lock); + wake_up(&ctx->wq); + + if (command[0] == '!') /* there will be no response */ + return 0; + + WAIT_ACTIVITY(write); + + mutex_lock(&ctx->lock); + if (!list_empty(&ctx->write)) { + uud = list_first_entry(&ctx->write, struct utp_user_data, link); +#ifdef DEBUG + pr_info("UUD:\n\tFlags = %02X\n", uud->data.flags); + if (uud->data.flags & UTP_FLAG_DATA) { + pr_info("\tbufsize = %d\n", uud->data.bufsize); + print_hex_dump(KERN_DEBUG, "\t", DUMP_PREFIX_NONE, + 16, 2, uud->data.data, uud->data.bufsize, true); + } + if (uud->data.flags & UTP_FLAG_REPORT_BUSY) + pr_info("\tBUSY\n"); +#endif + } + mutex_unlock(&ctx->lock); + + if (uud->data.flags & UTP_FLAG_DATA) { + memcpy(ctx->buffer, uud->data.data, uud->data.bufsize); + UTP_SS_SIZE(fsg, uud->data.bufsize); + utp_user_data_free(uud); + return 0; + } + + if (uud->data.flags & UTP_FLAG_REPORT_BUSY) { + utp_user_data_free(uud); + ctx->counter = 0xFFFF; + UTP_SS_BUSY(fsg, ctx->counter); + return 0; + } + + utp_user_data_free(uud); + UTP_SS_PASS(fsg); + + return -1; +} + +static int utp_send_status(struct fsg_dev *fsg) +{ + struct fsg_buffhd *bh; + u8 status = USB_STATUS_PASS; + struct bulk_cs_wrap *csw; + int rc; + + /* Wait for the next buffer to become available */ + bh = fsg->next_buffhd_to_fill; + while (bh->state != BUF_STATE_EMPTY) { + rc = sleep_thread(fsg); + if (rc) + return rc; + } + + if (fsg->phase_error) { + DBG(fsg, "sending phase-error status\n"); + status = USB_STATUS_PHASE_ERROR; + + } else if ((UTP_CTX(fsg)->sd & 0xFFFF) != UTP_REPLY_PASS) { + status = USB_STATUS_FAIL; + } + + csw = bh->buf; + + /* Store and send the Bulk-only CSW */ + csw->Signature = __constant_cpu_to_le32(USB_BULK_CS_SIG); + csw->Tag = fsg->tag; + csw->Residue = cpu_to_le32(fsg->residue); + csw->Status = status; + + bh->inreq->length = USB_BULK_CS_WRAP_LEN; + bh->inreq->zero = 0; + start_transfer(fsg, fsg->bulk_in, bh->inreq, + &bh->inreq_busy, &bh->state); + fsg->next_buffhd_to_fill = bh->next; + return 0; +} + +static int utp_handle_message(struct fsg_dev *fsg, + char *cdb_data, + int default_reply) +{ + struct utp_msg *m = (struct utp_msg *)cdb_data; + void *data = NULL; + int r; + struct utp_user_data *uud2r; + unsigned long long param; + unsigned long tag; + + if (m->f0 != 0xF0) + return default_reply; + + tag = get_unaligned_be32((void *)&m->utp_msg_tag); + param = get_be64((void *)&m->param); + pr_debug("Type 0x%x, tag 0x%08lx, param %llx\n", + m->utp_msg_type, tag, param); + + switch ((enum utp_msg_type)m->utp_msg_type) { + + case UTP_POLL: + if (get_be64((void *)&m->param) == 1) { + pr_debug("%s: version request\n", __func__); + UTP_SS_EXIT(fsg, UTP_CTX(fsg)->utp_version); + break; + } + utp_poll(fsg); + break; + case UTP_EXEC: + pr_debug("%s: EXEC\n", __func__); + data = kzalloc(fsg->data_size, GFP_KERNEL); + utp_do_write(fsg, data, fsg->data_size); + utp_exec(fsg, data, fsg->data_size, param); + kfree(data); + break; + case UTP_GET: + pr_debug("%s: GET, %d bytes\n", __func__, fsg->data_size); + r = utp_do_read(fsg, UTP_CTX(fsg)->buffer, fsg->data_size); + UTP_SS_PASS(fsg); + break; + case UTP_PUT: + pr_debug("%s: PUT, %d bytes\n", __func__, fsg->data_size); + uud2r = utp_user_data_alloc(fsg->data_size); + uud2r->data.bufsize = fsg->data_size; + uud2r->data.flags = UTP_FLAG_DATA; + utp_do_write(fsg, uud2r->data.data, fsg->data_size); + /* don't know what will be written */ + mutex_lock(&UTP_CTX(fsg)->lock); + list_add_tail(&uud2r->link, &UTP_CTX(fsg)->read); + mutex_unlock(&UTP_CTX(fsg)->lock); + wake_up(&UTP_CTX(fsg)->wq); + UTP_SS_PASS(fsg); + break; + } + + utp_send_status(fsg); + return -1; +} + --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/inode.c +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/inode.c @@ -40,6 +40,8 @@ #include #include +#include +#include /* * The gadgetfs API maps each endpoint to a file descriptor so that you @@ -81,6 +83,9 @@ MODULE_AUTHOR ("David Brownell"); MODULE_LICENSE ("GPL"); +/* Cancel IO, To store the bulkin and bulkout ep data. */ +static struct ep_data *gp_ep_bulkin_data; +static struct ep_data *gp_ep_bulkout_data; /*----------------------------------------------------------------------*/ @@ -265,6 +270,10 @@ #define INFO(dev,fmt,args...) \ xprintk(dev , KERN_INFO , fmt , ## args) +/* Cancel IO */ +static int mtp_ctrl_cmd; +static int gbCancelFlag; +static unsigned long mtptimestamp; /*----------------------------------------------------------------------*/ @@ -275,6 +284,17 @@ * precise FIFO status when recovering from cancellation. */ +/* Cancel IO */ +static void cancel_io_process(struct work_struct *work) +{ + if (gp_ep_bulkout_data->req->status == -EINPROGRESS) + usb_ep_dequeue(gp_ep_bulkout_data->ep, gp_ep_bulkout_data->req); + + if (gp_ep_bulkin_data->req->status == -EINPROGRESS) + usb_ep_dequeue(gp_ep_bulkin_data->ep, gp_ep_bulkin_data->req); +} +static DECLARE_DELAYED_WORK(cancel_work, cancel_io_process); + static void epio_complete (struct usb_ep *ep, struct usb_request *req) { struct ep_data *epdata = ep->driver_data; @@ -868,6 +888,8 @@ { struct ep_data *data = inode->i_private; int value = -EBUSY; + char *epin = "ep1in"; + char *epout = "ep1out"; if (down_interruptible (&data->lock) != 0) return -EINTR; @@ -880,6 +902,12 @@ get_ep (data); fd->private_data = data; VDEBUG (data->dev, "%s ready\n", data->name); + /* Cancel IO */ + if (0 == strcmp(data->name, epin)) + gp_ep_bulkin_data = fd->private_data; + + if (0 == strcmp(data->name, epout)) + gp_ep_bulkout_data = fd->private_data; } else DBG (data->dev, "%s state %d\n", data->name, data->state); @@ -1043,8 +1071,12 @@ // FIXME don't call this with the spinlock held ... if (copy_to_user (buf, dev->req->buf, len)) retval = -EFAULT; + else + /* Bug of Cancel IO 6 bytes read. */ + retval = len; clean_req (dev->gadget->ep0, dev->req); /* NOTE userspace can't yet choose to stall */ + dev->state = STATE_DEV_CONNECTED; /* Cancel IO */ } } goto done; @@ -1058,6 +1090,12 @@ len -= len % sizeof (struct usb_gadgetfs_event); dev->usermode_setup = 1; + /* Cancel IO, signal abort blocked IO. */ + if (mtp_ctrl_cmd == 1) { + mtp_ctrl_cmd = 0; + schedule_delayed_work(&cancel_work, HZ / 100); + } + scan: /* return queued events right away */ if (dev->ev_next != 0) { @@ -1384,6 +1422,16 @@ struct usb_gadgetfs_event *event; u16 w_value = le16_to_cpu(ctrl->wValue); u16 w_length = le16_to_cpu(ctrl->wLength); + struct timeval tv; + + /* Cancel IO */ + if (0x67 == ctrl->bRequest && 1 == gbCancelFlag + && dev->state == STATE_DEV_SETUP) + dev->state = STATE_DEV_CONNECTED; + + if (0x67 == ctrl->bRequest && 2 == mtp_ctrl_cmd + && dev->state == STATE_DEV_SETUP) + dev->state = STATE_DEV_CONNECTED; spin_lock (&dev->lock); dev->setup_abort = 0; @@ -1411,6 +1459,11 @@ */ } else if (dev->state == STATE_DEV_SETUP) dev->setup_abort = 1; + /*Cancel IO */ + if (mtp_ctrl_cmd == 1 && gbCancelFlag == 1 && dev->setup_abort == 1) { + INFO(dev, "0x64->setup\n"); + dev->setup_abort = 0; + } req->buf = dev->rbuf; req->dma = DMA_ADDR_INVALID; @@ -1543,11 +1596,63 @@ /* we can't currently stall these */ dev->setup_can_stall = 0; } + /* Cancel IO */ + if (0x67 == ctrl->bRequest && 1 == gbCancelFlag) { + gbCancelFlag = 0; + + setup_req(gadget->ep0, dev->req, 4); + *(unsigned long *)dev->req->buf = 0x20190004; + usb_ep_queue(gadget->ep0, dev->req, GFP_ATOMIC); + + spin_unlock(&dev->lock); + return 0; + } + if (ctrl->bRequest == 0x67 && mtp_ctrl_cmd == 2) { + /* get status */ + mtp_ctrl_cmd = 0; + } /* state changes when reader collects event */ event = next_event (dev, GADGETFS_SETUP); event->u.setup = *ctrl; + /* Cancel IO */ + if (0x64 == ctrl->bRequest) { + mtp_ctrl_cmd = 1; + gbCancelFlag = 1; + + /* get the timestamp */ + do_gettimeofday(&tv); + mtptimestamp = tv.tv_usec; + event->u.setup.wValue = + (unsigned short)tv.tv_usec; + } + if (0x66 == ctrl->bRequest) { + /* get the timestamp */ + do_gettimeofday(&tv); + mtptimestamp = tv.tv_usec; + event->u.setup.wValue = + (unsigned short)tv.tv_usec; + } + ep0_readable (dev); + /* Reset request. */ + if (ctrl->bRequest == 0x66) { /* reset ,send ZLP */ + mtp_ctrl_cmd = 2; + + if (gp_ep_bulkout_data->req->status == + -EINPROGRESS) { + usb_ep_dequeue(gp_ep_bulkout_data->ep, + gp_ep_bulkout_data->req); + } + if (gp_ep_bulkin_data->req->status == + -EINPROGRESS) { + usb_ep_dequeue(gp_ep_bulkin_data->ep, + gp_ep_bulkin_data->req); + } + } + if (ctrl->bRequest == 0x65) + pr_debug("i:0x65,not supported\n"); + spin_unlock (&dev->lock); return 0; } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/Makefile +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o obj-$(CONFIG_USB_LANGWELL) += langwell_udc.o +obj-$(CONFIG_USB_ARC) += arcotg_udc.o # # USB gadget drivers --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/file_storage.c +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/file_storage.c @@ -714,8 +714,16 @@ unsigned int nluns; struct lun *luns; struct lun *curlun; + +#ifdef CONFIG_STMP_UTP + void *utp; +#endif }; +#ifdef CONFIG_STMP_UTP +#include "stmp_updater.h" +#endif + typedef void (*fsg_routine_t)(struct fsg_dev *); static int exception_in_progress(struct fsg_dev *fsg) @@ -752,7 +760,7 @@ if (length < 512) { DBG(fsg, "%s, length %u:\n", label, length); print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, - 16, 1, buf, length, 0); + 16, 1, buf, length, !0); } } @@ -838,7 +846,11 @@ .iManufacturer = STRING_MANUFACTURER, .iProduct = STRING_PRODUCT, +#ifdef CONFIG_STMP_UTP + .iSerialNumber = 0, +#else .iSerialNumber = STRING_SERIAL, +#endif .bNumConfigurations = 1, }; @@ -2068,6 +2080,13 @@ } #endif +#ifdef CONFIG_STMP_UTP + if (utp_get_sense(fsg) == 0) { /* got the sense from the UTP */ + sd = UTP_CTX(fsg)->sd; + sdinfo = UTP_CTX(fsg)->sdinfo; + valid = 0; + } else +#endif if (!curlun) { // Unsupported LUNs are okay fsg->bad_lun_okay = 1; sd = SS_LOGICAL_UNIT_NOT_SUPPORTED; @@ -2089,6 +2108,9 @@ buf[7] = 18 - 8; // Additional sense length buf[12] = ASC(sd); buf[13] = ASCQ(sd); +#ifdef CONFIG_STMP_UTP + put_unaligned_be32(UTP_CTX(fsg)->sdinfo_h, &buf[8]); +#endif return 18; } @@ -2849,6 +2871,13 @@ fsg->phase_error = 0; fsg->short_packet_received = 0; +#ifdef CONFIG_STMP_UTP + reply = utp_handle_message(fsg, fsg->cmnd, reply); + + if (reply != -EINVAL) + return reply; +#endif + down_read(&fsg->filesem); // We're using the backing file switch (fsg->cmnd[0]) { @@ -3537,10 +3566,12 @@ /* Allow the thread to be frozen */ set_freezable(); +#ifndef CONFIG_STMP_UTP /* Arrange for userspace references to be interpreted as kernel * pointers. That way we can pass a kernel pointer to a routine * that expects a __user pointer and it will work okay. */ set_fs(get_ds()); +#endif /* The main loop */ while (fsg->state != FSG_STATE_TERMINATED) { @@ -3851,6 +3882,9 @@ } set_gadget_data(gadget, NULL); +#ifdef CONFIG_STMP_UTP + utp_exit(fsg); +#endif } @@ -3889,6 +3923,17 @@ prot = simple_strtol(mod_data.protocol_parm, NULL, 0); +#ifdef CONFIG_STMP_UTP + mod_data.can_stall = 0; + mod_data.removable = 1; + mod_data.nluns = 1; + mod_data.file[0] = NULL; + mod_data.vendor = 0x066F; + mod_data.product = 0x37FF; + pr_info("%s:UTP settings are in place now, overriding defaults\n", + __func__); +#endif + #ifdef CONFIG_USB_FILE_STORAGE_TEST if (strnicmp(mod_data.transport_parm, "BBB", 10) == 0) { ; // Use default setting @@ -3941,8 +3986,9 @@ return 0; } - - +#ifdef CONFIG_STMP_UTP +#include "stmp_updater.c" +#endif static int __init fsg_bind(struct usb_gadget *gadget) { struct fsg_dev *fsg = the_fsg; @@ -3970,6 +4016,10 @@ } } +#ifdef CONFIG_STMP_UTP + utp_init(fsg); +#endif + /* Find out how many LUNs there should be */ i = mod_data.nluns; if (i == 0) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/arcotg_udc.c +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/arcotg_udc.c @@ -0,0 +1,3078 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#undef DEBUG +#undef VERBOSE + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "arcotg_udc.h" +#include + +#define DRIVER_DESC "ARC USBOTG Device Controller driver" +#define DRIVER_AUTHOR "Freescale Semiconductor" +#define DRIVER_VERSION "1 August 2005" + +#ifdef CONFIG_PPC_MPC512x +#define BIG_ENDIAN_DESC +#endif + +#ifdef BIG_ENDIAN_DESC +#define cpu_to_hc32(x) (x) +#define hc32_to_cpu(x) (x) +#else +#define cpu_to_hc32(x) cpu_to_le32((x)) +#define hc32_to_cpu(x) le32_to_cpu((x)) +#endif + +#define DMA_ADDR_INVALID (~(dma_addr_t)0) + +static const char driver_name[] = "fsl-usb2-udc"; +static const char driver_desc[] = DRIVER_DESC; + +volatile static struct usb_dr_device *dr_regs; +volatile static struct usb_sys_interface *usb_sys_regs; + +/* it is initialized in probe() */ +static struct fsl_udc *udc_controller; + +#ifdef POSTPONE_FREE_LAST_DTD +static struct ep_td_struct *last_free_td; +#endif +static const struct usb_endpoint_descriptor +fsl_ep0_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = 0, + .bmAttributes = USB_ENDPOINT_XFER_CONTROL, + .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD, +}; +static const size_t g_iram_size = IRAM_TD_PPH_SIZE; + +typedef int (*dev_sus)(struct device *dev, pm_message_t state); +typedef int (*dev_res) (struct device *dev); +static int udc_suspend(struct fsl_udc *udc); +static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state); +static int fsl_udc_resume(struct platform_device *pdev); +static void fsl_ep_fifo_flush(struct usb_ep *_ep); + +#ifdef CONFIG_USB_OTG +/* Get platform resource from OTG driver */ +extern struct resource *otg_get_resources(void); +#endif + +extern void fsl_platform_set_test_mode(struct fsl_usb2_platform_data *pdata, enum usb_test_mode mode); + +static inline void +dr_wake_up_enable(struct fsl_udc *udc, bool enable) +{ + struct fsl_usb2_platform_data *pdata; + pdata = udc->pdata; + + if (enable && (!device_may_wakeup(udc_controller->gadget.dev.parent))) + return; + + if (pdata->wake_up_enable) + pdata->wake_up_enable(pdata, enable); +} + +#ifdef CONFIG_PPC32 +#define fsl_readl(addr) in_le32((addr)) +#define fsl_writel(addr, val32) out_le32((val32), (addr)) +#else +#define fsl_readl(addr) readl((addr)) +#define fsl_writel(addr, val32) writel((addr), (val32)) +#endif + +/******************************************************************** + * Internal Used Function +********************************************************************/ + +#ifdef DUMP_QUEUES +static void dump_ep_queue(struct fsl_ep *ep) +{ + int ep_index; + struct fsl_req *req; + struct ep_td_struct *dtd; + + if (list_empty(&ep->queue)) { + pr_debug("udc: empty\n"); + return; + } + + ep_index = ep_index(ep) * 2 + ep_is_in(ep); + pr_debug("udc: ep=0x%p index=%d\n", ep, ep_index); + + list_for_each_entry(req, &ep->queue, queue) { + pr_debug("udc: req=0x%p dTD count=%d\n", req, req->dtd_count); + pr_debug("udc: dTD head=0x%p tail=0x%p\n", req->head, + req->tail); + + dtd = req->head; + + while (dtd) { + if (le32_to_cpu(dtd->next_td_ptr) & DTD_NEXT_TERMINATE) + break; /* end of dTD list */ + + dtd = dtd->next_td_virt; + } + } +} +#else +static inline void dump_ep_queue(struct fsl_ep *ep) +{ +} +#endif + +/*----------------------------------------------------------------- + * done() - retire a request; caller blocked irqs + * @status : request status to be set, only works when + * request is still in progress. + *--------------------------------------------------------------*/ +static void done(struct fsl_ep *ep, struct fsl_req *req, int status) +{ + struct fsl_udc *udc = NULL; + unsigned char stopped = ep->stopped; + struct ep_td_struct *curr_td, *next_td; + int j; + + udc = (struct fsl_udc *)ep->udc; + /* Removed the req from fsl_ep->queue */ + list_del_init(&req->queue); + + /* req.status should be set as -EINPROGRESS in ep_queue() */ + if (req->req.status == -EINPROGRESS) + req->req.status = status; + else + status = req->req.status; + + /* Free dtd for the request */ + next_td = req->head; + for (j = 0; j < req->dtd_count; j++) { + curr_td = next_td; + if (j != req->dtd_count - 1) { + next_td = curr_td->next_td_virt; +#ifdef POSTPONE_FREE_LAST_DTD + dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma); + } else { + if (last_free_td != NULL) + dma_pool_free(udc->td_pool, last_free_td, + last_free_td->td_dma); + last_free_td = curr_td; + } +#else + } + + dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma); +#endif + } + + if (USE_MSC_WR(req->req.length)) { + req->req.dma -= 1; + memmove(req->req.buf, req->req.buf + 1, MSC_BULK_CB_WRAP_LEN); + } + + if (req->mapped) { + dma_unmap_single(ep->udc->gadget.dev.parent, + req->req.dma, req->req.length, + ep_is_in(ep) + ? DMA_TO_DEVICE + : DMA_FROM_DEVICE); + req->req.dma = DMA_ADDR_INVALID; + req->mapped = 0; + } else + dma_sync_single_for_cpu(ep->udc->gadget.dev.parent, + req->req.dma, req->req.length, + ep_is_in(ep) + ? DMA_TO_DEVICE + : DMA_FROM_DEVICE); + + if (status && (status != -ESHUTDOWN)) + VDBG("complete %s req %p stat %d len %u/%u", + ep->ep.name, &req->req, status, + req->req.actual, req->req.length); + + ep->stopped = 1; + + spin_unlock(&ep->udc->lock); + /* complete() is from gadget layer, + * eg fsg->bulk_in_complete() */ + if (req->req.complete) + req->req.complete(&ep->ep, &req->req); + + spin_lock(&ep->udc->lock); + ep->stopped = stopped; +} + +/*----------------------------------------------------------------- + * nuke(): delete all requests related to this ep + * called with spinlock held + *--------------------------------------------------------------*/ +static void nuke(struct fsl_ep *ep, int status) +{ + ep->stopped = 1; + + /* Flush fifo */ + fsl_ep_fifo_flush(&ep->ep); + + /* Whether this eq has request linked */ + while (!list_empty(&ep->queue)) { + struct fsl_req *req = NULL; + + req = list_entry(ep->queue.next, struct fsl_req, queue); + done(ep, req, status); + } + dump_ep_queue(ep); +} + +/*------------------------------------------------------------------ + Internal Hardware related function + ------------------------------------------------------------------*/ + +static void dr_phy_low_power_mode(struct fsl_udc *udc, bool enable) +{ + u32 temp; + + if (!device_may_wakeup(udc_controller->gadget.dev.parent)) + return; + + if (enable) { + temp = fsl_readl(&dr_regs->portsc1); + temp |= PORTSCX_PHY_LOW_POWER_SPD; + fsl_writel(temp, &dr_regs->portsc1); + + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(false); + } else { + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(true); + + temp = fsl_readl(&dr_regs->portsc1); + temp &= ~PORTSCX_PHY_LOW_POWER_SPD; + fsl_writel(temp, &dr_regs->portsc1); + } +} + +static int dr_controller_setup(struct fsl_udc *udc) +{ + unsigned int tmp = 0, portctrl = 0; + unsigned int __attribute((unused)) ctrl = 0; + unsigned long timeout; + struct fsl_usb2_platform_data *pdata; + +#define FSL_UDC_RESET_TIMEOUT 1000 + + /* before here, make sure dr_regs has been initialized */ + if (!udc) + return -EINVAL; + pdata = udc->pdata; + + /* Stop and reset the usb controller */ + tmp = fsl_readl(&dr_regs->usbcmd); + tmp &= ~USB_CMD_RUN_STOP; + fsl_writel(tmp, &dr_regs->usbcmd); + + tmp = fsl_readl(&dr_regs->usbcmd); + tmp |= USB_CMD_CTRL_RESET; + fsl_writel(tmp, &dr_regs->usbcmd); + + /* Wait for reset to complete */ + timeout = jiffies + FSL_UDC_RESET_TIMEOUT; + while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) { + if (time_after(jiffies, timeout)) { + ERR("udc reset timeout! \n"); + return -ETIMEDOUT; + } + cpu_relax(); + } + + /* Set the controller as device mode */ + tmp = fsl_readl(&dr_regs->usbmode); + tmp &= ~USB_MODE_CTRL_MODE_MASK; /* clear mode bits */ + tmp |= USB_MODE_CTRL_MODE_DEVICE; + /* Disable Setup Lockout */ + tmp |= USB_MODE_SETUP_LOCK_OFF; + if (pdata->es) + tmp |= USB_MODE_ES; + fsl_writel(tmp, &dr_regs->usbmode); + + fsl_platform_set_device_mode(pdata); + + /* Clear the setup status */ + fsl_writel(0, &dr_regs->usbsts); + + tmp = udc->ep_qh_dma; + tmp &= USB_EP_LIST_ADDRESS_MASK; + fsl_writel(tmp, &dr_regs->endpointlistaddr); + + VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x", + (int)udc->ep_qh, (int)tmp, + fsl_readl(&dr_regs->endpointlistaddr)); + + /* Config PHY interface */ + portctrl = fsl_readl(&dr_regs->portsc1); + portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH); + switch (udc->phy_mode) { + case FSL_USB2_PHY_ULPI: + portctrl |= PORTSCX_PTS_ULPI; + break; + case FSL_USB2_PHY_UTMI_WIDE: + portctrl |= PORTSCX_PTW_16BIT; + /* fall through */ + case FSL_USB2_PHY_UTMI: + portctrl |= PORTSCX_PTS_UTMI; + break; + case FSL_USB2_PHY_SERIAL: + portctrl |= PORTSCX_PTS_FSLS; + break; + default: + return -EINVAL; + } + fsl_writel(portctrl, &dr_regs->portsc1); + + if (pdata->change_ahb_burst) { + /* if usb should not work in default INCRx mode */ + tmp = fsl_readl(&dr_regs->sbuscfg); + tmp = (tmp & ~0x07) | pdata->ahb_burst_mode; + fsl_writel(tmp, &dr_regs->sbuscfg); + } + + if (pdata->have_sysif_regs) { + /* Config control enable i/o output, cpu endian register */ + ctrl = __raw_readl(&usb_sys_regs->control); + ctrl |= USB_CTRL_IOENB; + __raw_writel(ctrl, &usb_sys_regs->control); + } + +#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) + /* Turn on cache snooping hardware, since some PowerPC platforms + * wholly rely on hardware to deal with cache coherent. */ + + if (pdata->have_sysif_regs) { + /* Setup Snooping for all the 4GB space */ + tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */ + __raw_writel(tmp, &usb_sys_regs->snoop1); + tmp |= 0x80000000; /* starts from 0x8000000, size 2G */ + __raw_writel(tmp, &usb_sys_regs->snoop2); + } +#endif + + return 0; +} + +/* Enable DR irq and set controller to run state */ +static void dr_controller_run(struct fsl_udc *udc) +{ + u32 temp; + + fsl_platform_pullup_enable(udc->pdata); + + /* Enable DR irq reg */ + temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN + | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN + | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN; + + fsl_writel(temp, &dr_regs->usbintr); + + if (device_may_wakeup(udc_controller->gadget.dev.parent)) { + /* enable BSV irq */ + temp = fsl_readl(&dr_regs->otgsc); + temp |= OTGSC_B_SESSION_VALID_IRQ_EN; + fsl_writel(temp, &dr_regs->otgsc); + } + + /* If vbus not on and used low power mode */ + if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_B_SESSION_VALID) + && device_may_wakeup(udc_controller->gadget.dev.parent)) { + /* enable wake up */ + dr_wake_up_enable(udc, true); + /* Set stopped before low power mode */ + udc->stopped = 1; + /* close PHY clock */ + dr_phy_low_power_mode(udc, true); + printk(KERN_INFO "udc enter low power mode \n"); + } else { + /* + add some delay for USB timing issue. USB may be + recognize as FS device + during USB gadget remote wake up function + */ + mdelay(100); + /* Clear stopped bit */ + udc->stopped = 0; + /* Set controller to Run */ + temp = fsl_readl(&dr_regs->usbcmd); + temp |= USB_CMD_RUN_STOP; + fsl_writel(temp, &dr_regs->usbcmd); + printk(KERN_INFO "udc run \n"); + } + + return; +} + +static void dr_controller_stop(struct fsl_udc *udc) +{ + unsigned int tmp; + + pr_debug("%s\n", __func__); + + /* if we're in OTG mode, and the Host is currently using the port, + * stop now and don't rip the controller out from under the + * ehci driver + */ + if (udc->gadget.is_otg) { + if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) { + pr_debug("udc: Leaving early\n"); + return; + } + } + + /* disable all INTR */ + fsl_writel(0, &dr_regs->usbintr); + + /* disable wake up */ + dr_wake_up_enable(udc, false); + /* disable BSV irq */ + tmp = fsl_readl(&dr_regs->otgsc); + tmp &= ~OTGSC_B_SESSION_VALID_IRQ_EN; + fsl_writel(tmp, &dr_regs->otgsc); + + /* Set stopped bit for isr */ + udc->stopped = 1; + + /* disable IO output */ +/* usb_sys_regs->control = 0; */ + + fsl_platform_pullup_disable(udc->pdata); + + /* set controller to Stop */ + tmp = fsl_readl(&dr_regs->usbcmd); + tmp &= ~USB_CMD_RUN_STOP; + fsl_writel(tmp, &dr_regs->usbcmd); + + return; +} + +void dr_ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type) +{ + unsigned int tmp_epctrl = 0; + + tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + if (dir) { + if (ep_num) + tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST; + tmp_epctrl |= EPCTRL_TX_ENABLE; + tmp_epctrl |= ((unsigned int)(ep_type) + << EPCTRL_TX_EP_TYPE_SHIFT); + } else { + if (ep_num) + tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST; + tmp_epctrl |= EPCTRL_RX_ENABLE; + tmp_epctrl |= ((unsigned int)(ep_type) + << EPCTRL_RX_EP_TYPE_SHIFT); + } + + fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]); +} + +static void +dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value) +{ + u32 tmp_epctrl = 0; + + tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + + if (value) { + /* set the stall bit */ + if (dir) + tmp_epctrl |= EPCTRL_TX_EP_STALL; + else + tmp_epctrl |= EPCTRL_RX_EP_STALL; + } else { + /* clear the stall bit and reset data toggle */ + if (dir) { + tmp_epctrl &= ~EPCTRL_TX_EP_STALL; + tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST; + } else { + tmp_epctrl &= ~EPCTRL_RX_EP_STALL; + tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST; + } + } + fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]); +} + +/* Get stall status of a specific ep + Return: 0: not stalled; 1:stalled */ +static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir) +{ + u32 epctrl; + + epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + if (dir) + return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0; + else + return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0; +} + +/******************************************************************** + Internal Structure Build up functions +********************************************************************/ + +/*------------------------------------------------------------------ +* struct_ep_qh_setup(): set the Endpoint Capabilites field of QH + * @zlt: Zero Length Termination Select (1: disable; 0: enable) + * @mult: Mult field + ------------------------------------------------------------------*/ +static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num, + unsigned char dir, unsigned char ep_type, + unsigned int max_pkt_len, + unsigned int zlt, unsigned char mult) +{ + struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir]; + unsigned int tmp = 0; + + /* set the Endpoint Capabilites in QH */ + switch (ep_type) { + case USB_ENDPOINT_XFER_CONTROL: + /* Interrupt On Setup (IOS). for control ep */ + tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS) + | EP_QUEUE_HEAD_IOS; + break; + case USB_ENDPOINT_XFER_ISOC: + tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS) + | (mult << EP_QUEUE_HEAD_MULT_POS); + break; + case USB_ENDPOINT_XFER_BULK: + case USB_ENDPOINT_XFER_INT: + tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS; + break; + default: + VDBG("error ep type is %d", ep_type); + return; + } + if (zlt) + tmp |= EP_QUEUE_HEAD_ZLT_SEL; + p_QH->max_pkt_length = cpu_to_hc32(tmp); + + return; +} + +/* Setup qh structure and ep register for ep0. */ +static void ep0_setup(struct fsl_udc *udc) +{ + /* the intialization of an ep includes: fields in QH, Regs, + * fsl_ep struct */ + struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL, + USB_MAX_CTRL_PAYLOAD, 0, 0); + struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL, + USB_MAX_CTRL_PAYLOAD, 0, 0); + dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL); + dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL); + + return; + +} + +/*********************************************************************** + Endpoint Management Functions +***********************************************************************/ + +/*------------------------------------------------------------------------- + * when configurations are set, or when interface settings change + * for example the do_set_interface() in gadget layer, + * the driver will enable or disable the relevant endpoints + * ep0 doesn't use this routine. It is always enabled. +-------------------------------------------------------------------------*/ +static int fsl_ep_enable(struct usb_ep *_ep, + const struct usb_endpoint_descriptor *desc) +{ + struct fsl_udc *udc = NULL; + struct fsl_ep *ep = NULL; + unsigned short max = 0; + unsigned char mult = 0, zlt; + int retval = -EINVAL; + unsigned long flags = 0; + + ep = container_of(_ep, struct fsl_ep, ep); + + pr_debug("udc: %s ep.name=%s\n", __func__, ep->ep.name); + /* catch various bogus parameters */ + if (!_ep || !desc || ep->desc + || (desc->bDescriptorType != USB_DT_ENDPOINT)) + return -EINVAL; + + udc = ep->udc; + + if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN)) + return -ESHUTDOWN; + + max = le16_to_cpu(desc->wMaxPacketSize); + + /* Disable automatic zlp generation. Driver is reponsible to indicate + * explicitly through req->req.zero. This is needed to enable multi-td + * request. */ + zlt = 1; + + /* Assume the max packet size from gadget is always correct */ + switch (desc->bmAttributes & 0x03) { + case USB_ENDPOINT_XFER_CONTROL: + case USB_ENDPOINT_XFER_BULK: + case USB_ENDPOINT_XFER_INT: + /* mult = 0. Execute N Transactions as demonstrated by + * the USB variable length packet protocol where N is + * computed using the Maximum Packet Length (dQH) and + * the Total Bytes field (dTD) */ + mult = 0; + break; + case USB_ENDPOINT_XFER_ISOC: + /* Calculate transactions needed for high bandwidth iso */ + mult = (unsigned char)(1 + ((max >> 11) & 0x03)); + max = max & 0x8ff; /* bit 0~10 */ + /* 3 transactions at most */ + if (mult > 3) + goto en_done; + break; + default: + goto en_done; + } + + spin_lock_irqsave(&udc->lock, flags); + ep->ep.maxpacket = max; + ep->desc = desc; + ep->stopped = 0; + + /* Controller related setup */ + /* Init EPx Queue Head (Ep Capabilites field in QH + * according to max, zlt, mult) */ + struct_ep_qh_setup(udc, (unsigned char) ep_index(ep), + (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN) + ? USB_SEND : USB_RECV), + (unsigned char) (desc->bmAttributes + & USB_ENDPOINT_XFERTYPE_MASK), + max, zlt, mult); + + /* Init endpoint ctrl register */ + dr_ep_setup((unsigned char) ep_index(ep), + (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN) + ? USB_SEND : USB_RECV), + (unsigned char) (desc->bmAttributes + & USB_ENDPOINT_XFERTYPE_MASK)); + + spin_unlock_irqrestore(&udc->lock, flags); + retval = 0; + + VDBG("enabled %s (ep%d%s) maxpacket %d", ep->ep.name, + ep->desc->bEndpointAddress & 0x0f, + (desc->bEndpointAddress & USB_DIR_IN) + ? "in" : "out", max); +en_done: + return retval; +} + +/*--------------------------------------------------------------------- + * @ep : the ep being unconfigured. May not be ep0 + * Any pending and uncomplete req will complete with status (-ESHUTDOWN) +*---------------------------------------------------------------------*/ +static int fsl_ep_disable(struct usb_ep *_ep) +{ + struct fsl_udc *udc = NULL; + struct fsl_ep *ep = NULL; + unsigned long flags = 0; + u32 epctrl; + int ep_num; + + ep = container_of(_ep, struct fsl_ep, ep); + if (!_ep || !ep->desc) { + VDBG("%s not enabled", _ep ? ep->ep.name : NULL); + return -EINVAL; + } + + /* disable ep on controller */ + ep_num = ep_index(ep); + epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + if (ep_is_in(ep)) + epctrl &= ~EPCTRL_TX_ENABLE; + else + epctrl &= ~EPCTRL_RX_ENABLE; + fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]); + + udc = (struct fsl_udc *)ep->udc; + spin_lock_irqsave(&udc->lock, flags); + + /* nuke all pending requests (does flush) */ + nuke(ep, -ESHUTDOWN); + + ep->desc = 0; + ep->stopped = 1; + spin_unlock_irqrestore(&udc->lock, flags); + + VDBG("disabled %s OK", _ep->name); + return 0; +} + +/*--------------------------------------------------------------------- + * allocate a request object used by this endpoint + * the main operation is to insert the req->queue to the eq->queue + * Returns the request, or null if one could not be allocated +*---------------------------------------------------------------------*/ +static struct usb_request * +fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) +{ + struct fsl_req *req = NULL; + + req = kzalloc(sizeof *req, gfp_flags); + if (!req) + return NULL; + + req->req.dma = DMA_ADDR_INVALID; + pr_debug("udc: req=0x%p set req.dma=0x%x\n", req, req->req.dma); + INIT_LIST_HEAD(&req->queue); + + return &req->req; +} + +static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req) +{ + struct fsl_req *req = NULL; + + req = container_of(_req, struct fsl_req, req); + + if (_req) + kfree(req); +} + +static void update_qh(struct fsl_req *req) +{ + struct fsl_ep *ep = req->ep; + int i = ep_index(ep) * 2 + ep_is_in(ep); + u32 temp; + struct ep_queue_head *dQH = &ep->udc->ep_qh[i]; + + /* Write dQH next pointer and terminate bit to 0 */ + temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK; + if (NEED_IRAM(req->ep)) { + /* set next dtd stop bit,ensure only one dtd in this list */ + req->cur->next_td_ptr |= cpu_to_hc32(DTD_NEXT_TERMINATE); + temp = req->cur->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK; + } + dQH->next_dtd_ptr = cpu_to_hc32(temp); + /* Clear active and halt bit */ + temp = cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE + | EP_QUEUE_HEAD_STATUS_HALT)); + dQH->size_ioc_int_sts &= temp; + + /* Prime endpoint by writing 1 to ENDPTPRIME */ + temp = ep_is_in(ep) + ? (1 << (ep_index(ep) + 16)) + : (1 << (ep_index(ep))); + fsl_writel(temp, &dr_regs->endpointprime); +} + +/*-------------------------------------------------------------------------*/ +static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req) +{ + u32 temp, bitmask, tmp_stat; + + /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr); + VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */ + + bitmask = ep_is_in(ep) + ? (1 << (ep_index(ep) + 16)) + : (1 << (ep_index(ep))); + + /* check if the pipe is empty */ + if (!(list_empty(&ep->queue))) { + /* Add td to the end */ + struct fsl_req *lastreq; + lastreq = list_entry(ep->queue.prev, struct fsl_req, queue); + if (NEED_IRAM(ep)) { + /* only one dtd in dqh */ + lastreq->tail->next_td_ptr = + cpu_to_hc32(req->head->td_dma | DTD_NEXT_TERMINATE); + goto out; + } else { + lastreq->tail->next_td_ptr = + cpu_to_hc32(req->head->td_dma & DTD_ADDR_MASK); + } + /* Read prime bit, if 1 goto done */ + if (fsl_readl(&dr_regs->endpointprime) & bitmask) + goto out; + do { + /* Set ATDTW bit in USBCMD */ + temp = fsl_readl(&dr_regs->usbcmd); + fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd); + + /* Read correct status bit */ + tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask; + + } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW)); + + /* Write ATDTW bit to 0 */ + temp = fsl_readl(&dr_regs->usbcmd); + fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd); + + if (tmp_stat) + goto out; + } + update_qh(req); +out: + return 0; +} + +/* Fill in the dTD structure + * @req: request that the transfer belongs to + * @length: return actually data length of the dTD + * @dma: return dma address of the dTD + * @is_last: return flag if it is the last dTD of the request + * return: pointer to the built dTD */ +static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length, + dma_addr_t *dma, int *is_last) +{ + u32 swap_temp; + struct ep_td_struct *dtd; + + /* how big will this transfer be? */ + *length = min(req->req.length - req->req.actual, + (unsigned)EP_MAX_LENGTH_TRANSFER); + if (NEED_IRAM(req->ep)) + *length = min(*length, g_iram_size); + dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma); + if (dtd == NULL) + return dtd; + + dtd->td_dma = *dma; + /* Clear reserved field */ + swap_temp = hc32_to_cpu(dtd->size_ioc_sts); + swap_temp &= ~DTD_RESERVED_FIELDS; + dtd->size_ioc_sts = cpu_to_hc32(swap_temp); + + /* Init all of buffer page pointers */ + swap_temp = (u32) (req->req.dma + req->req.actual); + if (NEED_IRAM(req->ep)) + swap_temp = (u32) (req->req.dma); + dtd->buff_ptr0 = cpu_to_hc32(swap_temp); + dtd->buff_ptr1 = cpu_to_hc32(swap_temp + 0x1000); + dtd->buff_ptr2 = cpu_to_hc32(swap_temp + 0x2000); + dtd->buff_ptr3 = cpu_to_hc32(swap_temp + 0x3000); + dtd->buff_ptr4 = cpu_to_hc32(swap_temp + 0x4000); + + req->req.actual += *length; + + /* zlp is needed if req->req.zero is set */ + if (req->req.zero) { + if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0) + *is_last = 1; + else + *is_last = 0; + } else if (req->req.length == req->req.actual) + *is_last = 1; + else + *is_last = 0; + + if ((*is_last) == 0) + VDBG("multi-dtd request!\n"); + /* Fill in the transfer size; set active bit */ + swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE); + + /* Enable interrupt for the last dtd of a request */ + if (*is_last && !req->req.no_interrupt) + swap_temp |= DTD_IOC; + if (NEED_IRAM(req->ep)) + swap_temp |= DTD_IOC; + + dtd->size_ioc_sts = cpu_to_hc32(swap_temp); + + mb(); + + VDBG("length = %d address= 0x%x", *length, (int)*dma); + + return dtd; +} + +/* Generate dtd chain for a request */ +static int fsl_req_to_dtd(struct fsl_req *req) +{ + unsigned count; + int is_last; + int is_first = 1; + struct ep_td_struct *last_dtd = NULL, *dtd; + dma_addr_t dma; + + if (NEED_IRAM(req->ep)) { + req->oridma = req->req.dma; + /* here, replace user buffer to iram buffer */ + if (ep_is_in(req->ep)) { + req->req.dma = req->ep->udc->iram_buffer[1]; + if ((list_empty(&req->ep->queue))) { + /* copy data only when no bulk in transfer is + running */ + memcpy((char *)req->ep->udc->iram_buffer_v[1], + req->req.buf, min(req->req.length, + g_iram_size)); + } + } else { + req->req.dma = req->ep->udc->iram_buffer[0]; + } + } + + if (USE_MSC_WR(req->req.length)) + req->req.dma += 1; + + do { + dtd = fsl_build_dtd(req, &count, &dma, &is_last); + if (dtd == NULL) + return -ENOMEM; + + if (is_first) { + is_first = 0; + req->head = dtd; + } else { + last_dtd->next_td_ptr = cpu_to_hc32(dma); + last_dtd->next_td_virt = dtd; + } + last_dtd = dtd; + + req->dtd_count++; + } while (!is_last); + + dtd->next_td_ptr = cpu_to_hc32(DTD_NEXT_TERMINATE); + req->cur = req->head; + req->tail = dtd; + + return 0; +} + +/* queues (submits) an I/O request to an endpoint */ +static int +fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) +{ + struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep); + struct fsl_req *req = container_of(_req, struct fsl_req, req); + struct fsl_udc *udc; + unsigned long flags; + int is_iso = 0; + + /* catch various bogus parameters */ + if (!_req || !req->req.buf || (ep_index(ep) + && !list_empty(&req->queue))) { + VDBG("%s, bad params\n", __func__); + return -EINVAL; + } + if (!_ep || (!ep->desc && ep_index(ep))) { + VDBG("%s, bad ep\n", __func__); + return -EINVAL; + } + if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) { + if (req->req.length > ep->ep.maxpacket) + return -EMSGSIZE; + is_iso = 1; + } + + udc = ep->udc; + if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + req->ep = ep; + + /* map virtual address to hardware */ + if (req->req.dma == DMA_ADDR_INVALID) { + req->req.dma = dma_map_single(ep->udc->gadget.dev.parent, + req->req.buf, + req->req.length, ep_is_in(ep) + ? DMA_TO_DEVICE + : DMA_FROM_DEVICE); + req->mapped = 1; + } else { + dma_sync_single_for_device(ep->udc->gadget.dev.parent, + req->req.dma, req->req.length, + ep_is_in(ep) + ? DMA_TO_DEVICE + : DMA_FROM_DEVICE); + req->mapped = 0; + } + + req->req.status = -EINPROGRESS; + req->req.actual = 0; + req->dtd_count = 0; + if (NEED_IRAM(ep)) { + req->last_one = 0; + req->buffer_offset = 0; + } + + spin_lock_irqsave(&udc->lock, flags); + + /* build dtds and push them to device queue */ + if (!fsl_req_to_dtd(req)) { + fsl_queue_td(ep, req); + } else { + spin_unlock_irqrestore(&udc->lock, flags); + return -ENOMEM; + } + + /* irq handler advances the queue */ + if (req != NULL) + list_add_tail(&req->queue, &ep->queue); + spin_unlock_irqrestore(&udc->lock, flags); + + return 0; +} + +/* dequeues (cancels, unlinks) an I/O request from an endpoint */ +static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) +{ + struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep); + struct fsl_req *req; + unsigned long flags; + int ep_num, stopped, ret = 0; + u32 epctrl; + + if (!_ep || !_req) + return -EINVAL; + + spin_lock_irqsave(&ep->udc->lock, flags); + stopped = ep->stopped; + + /* Stop the ep before we deal with the queue */ + ep->stopped = 1; + ep_num = ep_index(ep); + epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + if (ep_is_in(ep)) + epctrl &= ~EPCTRL_TX_ENABLE; + else + epctrl &= ~EPCTRL_RX_ENABLE; + fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]); + + /* make sure it's actually queued on this endpoint */ + list_for_each_entry(req, &ep->queue, queue) { + if (&req->req == _req) + break; + } + if (&req->req != _req) { + ret = -EINVAL; + goto out; + } + + /* The request is in progress, or completed but not dequeued */ + if (ep->queue.next == &req->queue) { + _req->status = -ECONNRESET; + fsl_ep_fifo_flush(_ep); /* flush current transfer */ + + /* The request isn't the last request in this ep queue */ + if (req->queue.next != &ep->queue) { + struct ep_queue_head *qh; + struct fsl_req *next_req; + + qh = ep->qh; + next_req = list_entry(req->queue.next, struct fsl_req, + queue); + + /* Point the QH to the first TD of next request */ + fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr); + } + + /* The request hasn't been processed, patch up the TD chain */ + } else { + struct fsl_req *prev_req; + + prev_req = list_entry(req->queue.prev, struct fsl_req, queue); + fsl_writel(fsl_readl(&req->tail->next_td_ptr), + &prev_req->tail->next_td_ptr); + + } + + done(ep, req, -ECONNRESET); + + /* Enable EP */ +out: epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]); + if (ep_is_in(ep)) + epctrl |= EPCTRL_TX_ENABLE; + else + epctrl |= EPCTRL_RX_ENABLE; + fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]); + ep->stopped = stopped; + + spin_unlock_irqrestore(&ep->udc->lock, flags); + return ret; +} + +/*-------------------------------------------------------------------------*/ + +/*----------------------------------------------------------------- + * modify the endpoint halt feature + * @ep: the non-isochronous endpoint being stalled + * @value: 1--set halt 0--clear halt + * Returns zero, or a negative error code. +*----------------------------------------------------------------*/ +static int fsl_ep_set_halt(struct usb_ep *_ep, int value) +{ + struct fsl_ep *ep = NULL; + unsigned long flags = 0; + int status = -EOPNOTSUPP; /* operation not supported */ + unsigned char ep_dir = 0, ep_num = 0; + struct fsl_udc *udc = NULL; + + ep = container_of(_ep, struct fsl_ep, ep); + udc = ep->udc; + if (!_ep || !ep->desc) { + status = -EINVAL; + goto out; + } + + if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) { + status = -EOPNOTSUPP; + goto out; + } + + /* Attempt to halt IN ep will fail if any transfer requests + * are still queue */ + if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { + status = -EAGAIN; + goto out; + } + + status = 0; + ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV; + ep_num = (unsigned char)(ep_index(ep)); + spin_lock_irqsave(&ep->udc->lock, flags); + dr_ep_change_stall(ep_num, ep_dir, value); + spin_unlock_irqrestore(&ep->udc->lock, flags); + + if (ep_index(ep) == 0) { + udc->ep0_dir = 0; + } +out: + VDBG(" %s %s halt stat %d", ep->ep.name, + value ? "set" : "clear", status); + + return status; +} + +static int arcotg_fifo_status(struct usb_ep *_ep) +{ + struct fsl_ep *ep; + struct fsl_udc *udc; + int size = 0; + u32 bitmask; + struct ep_queue_head *d_qh; + + ep = container_of(_ep, struct fsl_ep, ep); + if (!_ep || (!ep->desc && ep_index(ep) != 0)) + return -ENODEV; + + udc = (struct fsl_udc *)ep->udc; + + if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) + return -ESHUTDOWN; + + d_qh = &ep->udc->ep_qh[ep_index(ep) * 2 + ep_is_in(ep)]; + + bitmask = (ep_is_in(ep)) ? (1 << (ep_index(ep) + 16)) : + (1 << (ep_index(ep))); + + if (fsl_readl(&dr_regs->endptstatus) & bitmask) + size = (d_qh->size_ioc_int_sts & DTD_PACKET_SIZE) + >> DTD_LENGTH_BIT_POS; + + pr_debug("%s %u\n", __func__, size); + return size; +} + +static void fsl_ep_fifo_flush(struct usb_ep *_ep) +{ + struct fsl_ep *ep; + int ep_num, ep_dir; + u32 bits; + unsigned long timeout; +#define FSL_UDC_FLUSH_TIMEOUT 1000 + + if (!_ep) { + return; + } else { + ep = container_of(_ep, struct fsl_ep, ep); + if (!ep->desc) + return; + } + ep_num = ep_index(ep); + ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV; + + if (ep_num == 0) + bits = (1 << 16) | 1; + else if (ep_dir == USB_SEND) + bits = 1 << (16 + ep_num); + else + bits = 1 << ep_num; + + timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT; + do { + fsl_writel(bits, &dr_regs->endptflush); + + /* Wait until flush complete */ + while (fsl_readl(&dr_regs->endptflush)) { + if (time_after(jiffies, timeout)) { + ERR("ep flush timeout\n"); + return; + } + cpu_relax(); + } + /* See if we need to flush again */ + } while (fsl_readl(&dr_regs->endptstatus) & bits); +} + +static struct usb_ep_ops fsl_ep_ops = { + .enable = fsl_ep_enable, + .disable = fsl_ep_disable, + + .alloc_request = fsl_alloc_request, + .free_request = fsl_free_request, + + .queue = fsl_ep_queue, + .dequeue = fsl_ep_dequeue, + + .set_halt = fsl_ep_set_halt, + .fifo_status = arcotg_fifo_status, + .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */ +}; + +/*------------------------------------------------------------------------- + Gadget Driver Layer Operations +-------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------- + * Get the current frame number (from DR frame_index Reg ) + *----------------------------------------------------------------------*/ +static int fsl_get_frame(struct usb_gadget *gadget) +{ + return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS); +} + +/*----------------------------------------------------------------------- + * Tries to wake up the host connected to this gadget + -----------------------------------------------------------------------*/ +static int fsl_wakeup(struct usb_gadget *gadget) +{ + struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget); + u32 portsc; + + /* Remote wakeup feature not enabled by host */ + if (!udc->remote_wakeup) + return -ENOTSUPP; + + portsc = fsl_readl(&dr_regs->portsc1); + /* not suspended? */ + if (!(portsc & PORTSCX_PORT_SUSPEND)) + return 0; + /* trigger force resume */ + portsc |= PORTSCX_PORT_FORCE_RESUME; + fsl_writel(portsc, &dr_regs->portsc1); + return 0; +} + +static int can_pullup(struct fsl_udc *udc) +{ + return udc->driver && udc->softconnect && udc->vbus_active; +} + +/* Notify controller that VBUS is powered, Called by whatever + detects VBUS sessions */ +static int fsl_vbus_session(struct usb_gadget *gadget, int is_active) +{ + struct fsl_udc *udc; + unsigned long flags; + + udc = container_of(gadget, struct fsl_udc, gadget); + spin_lock_irqsave(&udc->lock, flags); + VDBG("VBUS %s\n", is_active ? "on" : "off"); + udc->vbus_active = (is_active != 0); + if (can_pullup(udc)) + fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP), + &dr_regs->usbcmd); + else + fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP), + &dr_regs->usbcmd); + spin_unlock_irqrestore(&udc->lock, flags); + return 0; +} + +/* constrain controller's VBUS power usage + * This call is used by gadget drivers during SET_CONFIGURATION calls, + * reporting how much power the device may consume. For example, this + * could affect how quickly batteries are recharged. + * + * Returns zero on success, else negative errno. + */ +static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA) +{ + struct fsl_udc *udc; + + udc = container_of(gadget, struct fsl_udc, gadget); + if (udc->transceiver) + return otg_set_power(udc->transceiver, mA); + return -ENOTSUPP; +} + +/* Change Data+ pullup status + * this func is used by usb_gadget_connect/disconnet + */ +static int fsl_pullup(struct usb_gadget *gadget, int is_on) +{ + struct fsl_udc *udc; + + udc = container_of(gadget, struct fsl_udc, gadget); + udc->softconnect = (is_on != 0); + if (can_pullup(udc)) + fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP), + &dr_regs->usbcmd); + else + fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP), + &dr_regs->usbcmd); + + return 0; +} + +/* defined in gadget.h */ +static struct usb_gadget_ops fsl_gadget_ops = { + .get_frame = fsl_get_frame, + .wakeup = fsl_wakeup, +/* .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */ + .vbus_session = fsl_vbus_session, + .vbus_draw = fsl_vbus_draw, + .pullup = fsl_pullup, +}; + +/* Set protocol stall on ep0, protocol stall will automatically be cleared + on new transaction */ +static void ep0stall(struct fsl_udc *udc) +{ + u32 tmp; + + /* must set tx and rx to stall at the same time */ + tmp = fsl_readl(&dr_regs->endptctrl[0]); + tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL; + fsl_writel(tmp, &dr_regs->endptctrl[0]); + udc->ep0_dir = 0; +} + +/* Prime a status phase for ep0 */ +static int ep0_prime_status(struct fsl_udc *udc, int direction) +{ + struct fsl_req *req = udc->status_req; + struct fsl_ep *ep; + int status = 0; + + if (direction == EP_DIR_IN) + udc->ep0_dir = USB_DIR_IN; + else + udc->ep0_dir = USB_DIR_OUT; + + ep = &udc->eps[0]; + + req->ep = ep; + req->req.length = 0; + req->req.status = -EINPROGRESS; + + status = fsl_ep_queue(&ep->ep, &req->req, GFP_ATOMIC); + return status; +} + +static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe) +{ + struct fsl_ep *ep = get_ep_by_pipe(udc, pipe); + + if (!ep->name) + return 0; + + nuke(ep, -ESHUTDOWN); + + return 0; +} + +/* + * ch9 Set address + */ +static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length) +{ + /* Save the new address to device struct */ + udc->device_address = (u8) value; + /* Update usb state */ + udc->usb_state = USB_STATE_ADDRESS; + /* Status phase */ + if (ep0_prime_status(udc, EP_DIR_IN)) + ep0stall(udc); +} + +/* + * ch9 Get status + */ +static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value, + u16 index, u16 length) +{ + u16 tmp = 0; /* Status, cpu endian */ + + struct fsl_req *req; + struct fsl_ep *ep; + int status = 0; + + ep = &udc->eps[0]; + + if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) { + /* Get device status */ + tmp = 1 << USB_DEVICE_SELF_POWERED; + tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP; + } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) { + /* Get interface status */ + /* We don't have interface information in udc driver */ + tmp = 0; + } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) { + /* Get endpoint status */ + struct fsl_ep *target_ep; + + target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index)); + + /* stall if endpoint doesn't exist */ + if (!target_ep->desc) + goto stall; + tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep)) + << USB_ENDPOINT_HALT; + } + + udc->ep0_dir = USB_DIR_IN; + /* Borrow the per device data_req */ + /* status_req had been used to prime status */ + req = udc->data_req; + /* Fill in the reqest structure */ + *((u16 *) req->req.buf) = cpu_to_le16(tmp); + req->ep = ep; + req->req.length = 2; + + status = fsl_ep_queue(&ep->ep, &req->req, GFP_ATOMIC); + if (status) { + udc_reset_ep_queue(udc, 0); + ERR("Can't respond to getstatus request \n"); + goto stall; + } + return; +stall: + ep0stall(udc); + +} + +static void setup_received_irq(struct fsl_udc *udc, + struct usb_ctrlrequest *setup) +{ + u16 wValue = le16_to_cpu(setup->wValue); + u16 wIndex = le16_to_cpu(setup->wIndex); + u16 wLength = le16_to_cpu(setup->wLength); + + udc_reset_ep_queue(udc, 0); + + if (wLength) { + int dir; + dir = EP_DIR_IN; + if (setup->bRequestType & USB_DIR_IN) { + dir = EP_DIR_OUT; + } + if (ep0_prime_status(udc, dir)) + ep0stall(udc); + } + /* We process some stardard setup requests here */ + switch (setup->bRequest) { + case USB_REQ_GET_STATUS: + /* Data+Status phase from udc */ + if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK)) + != (USB_DIR_IN | USB_TYPE_STANDARD)) + break; + ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength); + return; + + case USB_REQ_SET_ADDRESS: + /* Status phase from udc */ + if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD + | USB_RECIP_DEVICE)) + break; + ch9setaddress(udc, wValue, wIndex, wLength); + return; + + case USB_REQ_CLEAR_FEATURE: + case USB_REQ_SET_FEATURE: + /* Status phase from udc */ + { + int rc = -EOPNOTSUPP; + u16 ptc = 0; + + if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK)) + == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) { + int pipe = get_pipe_by_windex(wIndex); + struct fsl_ep *ep; + + if (wValue != 0 || wLength != 0 || pipe > udc->max_ep) + break; + ep = get_ep_by_pipe(udc, pipe); + + spin_unlock(&udc->lock); + rc = fsl_ep_set_halt(&ep->ep, + (setup->bRequest == USB_REQ_SET_FEATURE) + ? 1 : 0); + spin_lock(&udc->lock); + + } else if ((setup->bRequestType & (USB_RECIP_MASK + | USB_TYPE_MASK)) == (USB_RECIP_DEVICE + | USB_TYPE_STANDARD)) { + /* Note: The driver has not include OTG support yet. + * This will be set when OTG support is added */ + if (setup->wValue == USB_DEVICE_TEST_MODE) + ptc = setup->wIndex >> 8; + else if (gadget_is_otg(&udc->gadget)) { + if (setup->bRequest == + USB_DEVICE_B_HNP_ENABLE) + udc->gadget.b_hnp_enable = 1; + else if (setup->bRequest == + USB_DEVICE_A_HNP_SUPPORT) + udc->gadget.a_hnp_support = 1; + else if (setup->bRequest == + USB_DEVICE_A_ALT_HNP_SUPPORT) + udc->gadget.a_alt_hnp_support = 1; + } + rc = 0; + } else + break; + + if (rc == 0) { + if (ep0_prime_status(udc, EP_DIR_IN)) + ep0stall(udc); + } + if (ptc) { + u32 tmp; + + mdelay(10); + fsl_platform_set_test_mode(udc->pdata, ptc); + tmp = fsl_readl(&dr_regs->portsc1) | (ptc << 16); + fsl_writel(tmp, &dr_regs->portsc1); + printk(KERN_INFO "udc: switch to test mode 0x%x.\n", ptc); + } + + return; + } + + default: + break; + } + + /* Requests handled by gadget */ + if (wLength) { + /* Data phase from gadget, status phase from udc */ + udc->ep0_dir = (setup->bRequestType & USB_DIR_IN) + ? USB_DIR_IN : USB_DIR_OUT; + spin_unlock(&udc->lock); + if (udc->driver->setup(&udc->gadget, + &udc->local_setup_buff) < 0) { + /* cancel status phase */ + udc_reset_ep_queue(udc, 0); + ep0stall(udc); + } + } else { + /* No data phase, IN status from gadget */ + udc->ep0_dir = USB_DIR_IN; + spin_unlock(&udc->lock); + if (udc->driver->setup(&udc->gadget, + &udc->local_setup_buff) < 0) + ep0stall(udc); + } + spin_lock(&udc->lock); +} + +/* Process request for Data or Status phase of ep0 + * prime status phase if needed */ +static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0, + struct fsl_req *req) +{ + if (udc->usb_state == USB_STATE_ADDRESS) { + /* Set the new address */ + u32 new_address = (u32) udc->device_address; + fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS, + &dr_regs->deviceaddr); + } + + done(ep0, req, 0); +} + +/* Tripwire mechanism to ensure a setup packet payload is extracted without + * being corrupted by another incoming setup packet */ +static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr) +{ + u32 temp; + struct ep_queue_head *qh; + struct fsl_usb2_platform_data *pdata = udc->pdata; + + qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT]; + + /* Clear bit in ENDPTSETUPSTAT */ + temp = fsl_readl(&dr_regs->endptsetupstat); + fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat); + + /* while a hazard exists when setup package arrives */ + do { + /* Set Setup Tripwire */ + temp = fsl_readl(&dr_regs->usbcmd); + fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd); + + /* Copy the setup packet to local buffer */ + if (pdata->le_setup_buf) { + u32 *p = (u32 *)buffer_ptr; + u32 *s = (u32 *)qh->setup_buffer; + + /* Convert little endian setup buffer to CPU endian */ + *p++ = le32_to_cpu(*s++); + *p = le32_to_cpu(*s); + } else { + memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8); + } + } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW)); + + /* Clear Setup Tripwire */ + temp = fsl_readl(&dr_regs->usbcmd); + fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd); +} + +static void iram_process_ep_complete(struct fsl_req *curr_req, + int cur_transfer) +{ + char *buf; + u32 len; + int in = ep_is_in(curr_req->ep); + + if (in) + buf = (char *)udc_controller->iram_buffer_v[1]; + else + buf = (char *)udc_controller->iram_buffer_v[0]; + + if (curr_req->cur->next_td_ptr == cpu_to_hc32(DTD_NEXT_TERMINATE) + || (cur_transfer < g_iram_size) + || (curr_req->req.length == curr_req->req.actual)) + curr_req->last_one = 1; + + if (curr_req->last_one) { + /* the last transfer */ + if (!in) { + memcpy(curr_req->req.buf + curr_req->buffer_offset, buf, + cur_transfer); + } + if (curr_req->tail->next_td_ptr != + cpu_to_hc32(DTD_NEXT_TERMINATE)) { + /* have next request,queue it */ + struct fsl_req *next_req; + next_req = + list_entry(curr_req->queue.next, + struct fsl_req, queue); + if (in) + memcpy(buf, next_req->req.buf, + min(g_iram_size, next_req->req.length)); + update_qh(next_req); + } + curr_req->req.dma = curr_req->oridma; + } else { + /* queue next dtd */ + /* because had next dtd, so should finish */ + /* tranferring g_iram_size data */ + curr_req->buffer_offset += g_iram_size; + /* pervious set stop bit,now clear it */ + curr_req->cur->next_td_ptr &= ~cpu_to_hc32(DTD_NEXT_TERMINATE); + curr_req->cur = curr_req->cur->next_td_virt; + if (in) { + len = + min(curr_req->req.length - curr_req->buffer_offset, + g_iram_size); + memcpy(buf, curr_req->req.buf + curr_req->buffer_offset, + len); + } else { + memcpy(curr_req->req.buf + curr_req->buffer_offset - + g_iram_size, buf, g_iram_size); + } + update_qh(curr_req); + } +} + +/* process-ep_req(): free the completed Tds for this req */ +static int process_ep_req(struct fsl_udc *udc, int pipe, + struct fsl_req *curr_req) +{ + struct ep_td_struct *curr_td; + int td_complete, actual, remaining_length, j, tmp; + int status = 0; + int errors = 0; + struct ep_queue_head *curr_qh = &udc->ep_qh[pipe]; + int direction = pipe % 2; + int total = 0, real_len; + + curr_td = curr_req->head; + td_complete = 0; + actual = curr_req->req.length; + real_len = curr_req->req.length; + + for (j = 0; j < curr_req->dtd_count; j++) { + remaining_length = (hc32_to_cpu(curr_td->size_ioc_sts) + & DTD_PACKET_SIZE) + >> DTD_LENGTH_BIT_POS; + if (NEED_IRAM(curr_req->ep)) { + if (real_len >= g_iram_size) { + actual = g_iram_size; + real_len -= g_iram_size; + } else { /* the last packet */ + actual = real_len; + curr_req->last_one = 1; + } + } + actual -= remaining_length; + total += actual; + + errors = hc32_to_cpu(curr_td->size_ioc_sts) & DTD_ERROR_MASK; + if (errors) { + if (errors & DTD_STATUS_HALTED) { + ERR("dTD error %08x QH=%d\n", errors, pipe); + /* Clear the errors and Halt condition */ + tmp = hc32_to_cpu(curr_qh->size_ioc_int_sts); + tmp &= ~errors; + curr_qh->size_ioc_int_sts = cpu_to_hc32(tmp); + status = -EPIPE; + /* FIXME: continue with next queued TD? */ + + break; + } + if (errors & DTD_STATUS_DATA_BUFF_ERR) { + VDBG("Transfer overflow"); + status = -EPROTO; + break; + } else if (errors & DTD_STATUS_TRANSACTION_ERR) { + VDBG("ISO error"); + status = -EILSEQ; + break; + } else + ERR("Unknown error has occured (0x%x)!\r\n", + errors); + + } else if (hc32_to_cpu(curr_td->size_ioc_sts) + & DTD_STATUS_ACTIVE) { + VDBG("Request not complete"); + status = REQ_UNCOMPLETE; + return status; + } else if (remaining_length) { + if (direction) { + VDBG("Transmit dTD remaining length not zero"); + status = -EPROTO; + break; + } else { + td_complete++; + break; + } + } else { + td_complete++; + VDBG("dTD transmitted successful "); + } + if (NEED_IRAM(curr_req->ep)) + if (curr_td-> + next_td_ptr & cpu_to_hc32(DTD_NEXT_TERMINATE)) + break; + if (j != curr_req->dtd_count - 1) + curr_td = (struct ep_td_struct *)curr_td->next_td_virt; + } + + if (status) + return status; + curr_req->req.actual = total; + if (NEED_IRAM(curr_req->ep)) + iram_process_ep_complete(curr_req, actual); + return 0; +} + +/* Process a DTD completion interrupt */ +static void dtd_complete_irq(struct fsl_udc *udc) +{ + u32 bit_pos; + int i, ep_num, direction, bit_mask, status; + struct fsl_ep *curr_ep; + struct fsl_req *curr_req, *temp_req; + + /* Clear the bits in the register */ + bit_pos = fsl_readl(&dr_regs->endptcomplete); + fsl_writel(bit_pos, &dr_regs->endptcomplete); + + if (!bit_pos) + return; + + for (i = 0; i < udc->max_ep * 2; i++) { + ep_num = i >> 1; + direction = i % 2; + + bit_mask = 1 << (ep_num + 16 * direction); + + if (!(bit_pos & bit_mask)) + continue; + + curr_ep = get_ep_by_pipe(udc, i); + + /* If the ep is configured */ + if (curr_ep->name == NULL) { + INFO("Invalid EP?"); + continue; + } + + /* process the req queue until an uncomplete request */ + list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue, + queue) { + status = process_ep_req(udc, i, curr_req); + + VDBG("status of process_ep_req= %d, ep = %d", + status, ep_num); + if (status == REQ_UNCOMPLETE) + break; + /* write back status to req */ + curr_req->req.status = status; + + if (ep_num == 0) { + ep0_req_complete(udc, curr_ep, curr_req); + break; + } else { + if (NEED_IRAM(curr_ep)) { + if (curr_req->last_one) + done(curr_ep, curr_req, status); + /* only check the 1th req */ + break; + } else + done(curr_ep, curr_req, status); + } + } + dump_ep_queue(curr_ep); + } +} + +/* Process a port change interrupt */ +static void port_change_irq(struct fsl_udc *udc) +{ + u32 speed; + + if (udc->bus_reset) + udc->bus_reset = 0; + + /* Bus resetting is finished */ + if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) { + /* Get the speed */ + speed = (fsl_readl(&dr_regs->portsc1) + & PORTSCX_PORT_SPEED_MASK); + switch (speed) { + case PORTSCX_PORT_SPEED_HIGH: + udc->gadget.speed = USB_SPEED_HIGH; + break; + case PORTSCX_PORT_SPEED_FULL: + udc->gadget.speed = USB_SPEED_FULL; + break; + case PORTSCX_PORT_SPEED_LOW: + udc->gadget.speed = USB_SPEED_LOW; + break; + default: + udc->gadget.speed = USB_SPEED_UNKNOWN; + break; + } + } + + /* Update USB state */ + if (!udc->resume_state) + udc->usb_state = USB_STATE_DEFAULT; +} + +/* Process suspend interrupt */ +static void suspend_irq(struct fsl_udc *udc) +{ + pr_debug("%s\n", __func__); + + udc->resume_state = udc->usb_state; + udc->usb_state = USB_STATE_SUSPENDED; + + /* report suspend to the driver, serial.c does not support this */ + if (udc->driver->suspend) + udc->driver->suspend(&udc->gadget); +} + +/* Process Wake up interrupt */ +static void wake_up_irq(struct fsl_udc *udc) +{ + pr_debug("%s\n", __func__); + + /* disable wake up irq */ + dr_wake_up_enable(udc_controller, false); + + udc->stopped = 0; +} + +static void bus_resume(struct fsl_udc *udc) +{ + udc->usb_state = udc->resume_state; + udc->resume_state = 0; + + /* report resume to the driver, serial.c does not support this */ + if (udc->driver->resume) + udc->driver->resume(&udc->gadget); +} + +/* Clear up all ep queues */ +static int reset_queues(struct fsl_udc *udc) +{ + u8 pipe; + + for (pipe = 0; pipe < udc->max_pipes; pipe++) + udc_reset_ep_queue(udc, pipe); + + /* report disconnect; the driver is already quiesced */ + udc->driver->disconnect(&udc->gadget); + + return 0; +} + +/* Process reset interrupt */ +static void reset_irq(struct fsl_udc *udc) +{ + u32 temp; + + /* Clear the device address */ + temp = fsl_readl(&dr_regs->deviceaddr); + fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr); + + udc->device_address = 0; + + /* Clear usb state */ + udc->resume_state = 0; + udc->ep0_dir = 0; + udc->remote_wakeup = 0; /* default to 0 on reset */ + udc->gadget.b_hnp_enable = 0; + udc->gadget.a_hnp_support = 0; + udc->gadget.a_alt_hnp_support = 0; + + /* Clear all the setup token semaphores */ + temp = fsl_readl(&dr_regs->endptsetupstat); + fsl_writel(temp, &dr_regs->endptsetupstat); + + /* Clear all the endpoint complete status bits */ + temp = fsl_readl(&dr_regs->endptcomplete); + fsl_writel(temp, &dr_regs->endptcomplete); + + /* Write 1s to the flush register */ + fsl_writel(0xffffffff, &dr_regs->endptflush); + + if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) { + VDBG("Bus reset"); + /* Bus is reseting */ + udc->bus_reset = 1; + /* Reset all the queues, include XD, dTD, EP queue + * head and TR Queue */ + reset_queues(udc); + udc->usb_state = USB_STATE_DEFAULT; + } else { + VDBG("Controller reset"); + /* initialize usb hw reg except for regs for EP, not + * touch usbintr reg */ + dr_controller_setup(udc); + + /* Reset all internal used Queues */ + reset_queues(udc); + + ep0_setup(udc); + + /* Enable DR IRQ reg, Set Run bit, change udc state */ + dr_controller_run(udc); + udc->usb_state = USB_STATE_ATTACHED; + } +} + +/* if wakup udc, return true; else return false*/ +bool try_wake_up_udc(struct fsl_udc *udc) +{ + u32 irq_src; + + /* when udc is stopped, only handle wake up irq */ + if (udc->stopped) { + if (!device_may_wakeup(&(udc->pdata->pdev->dev))) + return false; + + dr_phy_low_power_mode(udc_controller, false); + + /* check to see if wake up irq */ + irq_src = fsl_readl(&dr_regs->usbctrl); + if (irq_src & USB_CTRL_OTG_WUIR) { + wake_up_irq(udc); + } else { + dr_phy_low_power_mode(udc_controller, true); + } + } + + if (!device_may_wakeup(udc_controller->gadget.dev.parent)) + return true; + + /* check if Vbus change irq */ + irq_src = fsl_readl(&dr_regs->otgsc); + if (irq_src & OTGSC_B_SESSION_VALID_IRQ_STS) { + u32 tmp; + fsl_writel(irq_src, &dr_regs->otgsc); + tmp = fsl_readl(&dr_regs->usbcmd); + /* check BSV bit to see if fall or rise */ + if (irq_src & OTGSC_B_SESSION_VALID) { + udc->stopped = 0; + fsl_writel(tmp | USB_CMD_RUN_STOP, &dr_regs->usbcmd); + printk(KERN_INFO "udc out low power mode\n"); + } else { + printk(KERN_INFO "udc enter low power mode \n"); + fsl_writel(tmp & ~USB_CMD_RUN_STOP, &dr_regs->usbcmd); + /* enable wake up */ + dr_wake_up_enable(udc, true); + udc->stopped = 1; + /* close USB PHY clock */ + dr_phy_low_power_mode(udc, true); + return false; + } + } + + return true; +} + +/* + * USB device controller interrupt handler + */ +static irqreturn_t fsl_udc_irq(int irq, void *_udc) +{ + struct fsl_udc *udc = _udc; + u32 irq_src; + irqreturn_t status = IRQ_NONE; + unsigned long flags; + + if (try_wake_up_udc(udc) == false) + return IRQ_NONE; + + spin_lock_irqsave(&udc->lock, flags); + irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr); + /* Clear notification bits */ + fsl_writel(irq_src, &dr_regs->usbsts); + + /* VDBG("irq_src [0x%8x]", irq_src); */ + + /* Need to resume? */ + if (udc->usb_state == USB_STATE_SUSPENDED) + if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0) + bus_resume(udc); + + /* USB Interrupt */ + if (irq_src & USB_STS_INT) { + VDBG("Packet int"); + /* Setup package, we only support ep0 as control ep */ + if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) { + tripwire_handler(udc, 0, + (u8 *) (&udc->local_setup_buff)); + setup_received_irq(udc, &udc->local_setup_buff); + status = IRQ_HANDLED; + } + + /* completion of dtd */ + if (fsl_readl(&dr_regs->endptcomplete)) { + dtd_complete_irq(udc); + status = IRQ_HANDLED; + } + } + + /* SOF (for ISO transfer) */ + if (irq_src & USB_STS_SOF) { + status = IRQ_HANDLED; + } + + /* Port Change */ + if (irq_src & USB_STS_PORT_CHANGE) { + port_change_irq(udc); + status = IRQ_HANDLED; + } + + /* Reset Received */ + if (irq_src & USB_STS_RESET) { + VDBG("reset int"); + reset_irq(udc); + status = IRQ_HANDLED; + } + + /* Sleep Enable (Suspend) */ + if (irq_src & USB_STS_SUSPEND) { + suspend_irq(udc); + status = IRQ_HANDLED; + } + + if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) { + VDBG("Error IRQ %x ", irq_src); + } + + spin_unlock_irqrestore(&udc->lock, flags); + return status; +} + +/*----------------------------------------------------------------* + * Hook to gadget drivers + * Called by initialization code of gadget drivers +*----------------------------------------------------------------*/ +int usb_gadget_register_driver(struct usb_gadget_driver *driver) +{ + int retval = -ENODEV; + unsigned long flags = 0; + u32 portsc; + + if (!udc_controller) + return -ENODEV; + + if (!driver || (driver->speed != USB_SPEED_FULL + && driver->speed != USB_SPEED_HIGH) + || !driver->bind || !driver->disconnect + || !driver->setup) + return -EINVAL; + + if (udc_controller->driver) + return -EBUSY; + + /* lock is needed but whether should use this lock or another */ + spin_lock_irqsave(&udc_controller->lock, flags); + + driver->driver.bus = 0; + /* hook up the driver */ + udc_controller->driver = driver; + udc_controller->gadget.dev.driver = &driver->driver; + spin_unlock_irqrestore(&udc_controller->lock, flags); + + portsc = fsl_readl(&dr_regs->portsc1); + portsc &= ~PORTSCX_PHY_LOW_POWER_SPD; + fsl_writel(portsc, &dr_regs->portsc1); + + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(true); + + /* bind udc driver to gadget driver */ + retval = driver->bind(&udc_controller->gadget); + if (retval) { + VDBG("bind to %s --> %d", driver->driver.name, retval); + udc_controller->gadget.dev.driver = 0; + udc_controller->driver = 0; + goto out; + } + + if (udc_controller->transceiver) { + /* Suspend the controller until OTG enable it */ + udc_controller->stopped = 1; + printk(KERN_INFO "Suspend udc for OTG auto detect\n"); + dr_wake_up_enable(udc_controller, true); + dr_phy_low_power_mode(udc_controller, true); + + /* export udc suspend/resume call to OTG */ + udc_controller->gadget.dev.driver->suspend = (dev_sus)fsl_udc_suspend; + udc_controller->gadget.dev.driver->resume = (dev_res)fsl_udc_resume; + + /* connect to bus through transceiver */ + if (udc_controller->transceiver) { + retval = otg_set_peripheral(udc_controller->transceiver, + &udc_controller->gadget); + if (retval < 0) { + ERR("can't bind to transceiver\n"); + driver->unbind(&udc_controller->gadget); + udc_controller->gadget.dev.driver = 0; + udc_controller->driver = 0; + return retval; + } + } + } else { + /* Enable DR IRQ reg and Set usbcmd reg Run bit */ + dr_controller_run(udc_controller); + udc_controller->usb_state = USB_STATE_ATTACHED; + udc_controller->ep0_dir = 0; + } + printk(KERN_INFO "%s: bind to driver %s \n", + udc_controller->gadget.name, driver->driver.name); + +out: + if (retval) + printk(KERN_DEBUG "retval %d \n", retval); + return retval; +} +EXPORT_SYMBOL(usb_gadget_register_driver); + +/* Disconnect from gadget driver */ +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) +{ + struct fsl_ep *loop_ep; + unsigned long flags; + u32 portsc; + + if (!udc_controller) + return -ENODEV; + + if (!driver || driver != udc_controller->driver || !driver->unbind) + return -EINVAL; + + if (udc_controller->transceiver) + (void)otg_set_peripheral(udc_controller->transceiver, 0); + + /* open phy clock for following operation */ + dr_phy_low_power_mode(udc_controller, false); + + /* stop DR, disable intr */ + dr_controller_stop(udc_controller); + + /* in fact, no needed */ + udc_controller->usb_state = USB_STATE_ATTACHED; + udc_controller->ep0_dir = 0; + + /* stand operation */ + spin_lock_irqsave(&udc_controller->lock, flags); + udc_controller->gadget.speed = USB_SPEED_UNKNOWN; + nuke(&udc_controller->eps[0], -ESHUTDOWN); + list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list, + ep.ep_list) + nuke(loop_ep, -ESHUTDOWN); + spin_unlock_irqrestore(&udc_controller->lock, flags); + + /* disconnect gadget before unbinding */ + driver->disconnect(&udc_controller->gadget); + + /* unbind gadget and unhook driver. */ + driver->unbind(&udc_controller->gadget); + udc_controller->gadget.dev.driver = 0; + udc_controller->driver = 0; + + dr_wake_up_enable(udc_controller, false); + + portsc = fsl_readl(&dr_regs->portsc1); + portsc |= PORTSCX_PHY_LOW_POWER_SPD; + fsl_writel(portsc, &dr_regs->portsc1); + + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(false); + + printk(KERN_INFO "unregistered gadget driver '%s'\r\n", + driver->driver.name); + return 0; +} +EXPORT_SYMBOL(usb_gadget_unregister_driver); + +/*------------------------------------------------------------------------- + PROC File System Support +-------------------------------------------------------------------------*/ +#ifdef CONFIG_USB_GADGET_DEBUG_FILES + +#include + +static const char proc_filename[] = "driver/fsl_usb2_udc"; + +static int fsl_proc_read(char *page, char **start, off_t off, int count, + int *eof, void *_dev) +{ + char *buf = page; + char *next = buf; + unsigned size = count; + unsigned long flags; + int t, i; + u32 tmp_reg; + struct fsl_ep *ep = NULL; + struct fsl_req *req; + struct fsl_usb2_platform_data *pdata; + + struct fsl_udc *udc = udc_controller; + pdata = udc->pdata; + if (off != 0) + return 0; + + spin_lock_irqsave(&udc->lock, flags); + + /* ------basic driver infomation ---- */ + t = scnprintf(next, size, + DRIVER_DESC "\n" + "%s version: %s\n" + "Gadget driver: %s\n\n", + driver_name, DRIVER_VERSION, + udc->driver ? udc->driver->driver.name : "(none)"); + size -= t; + next += t; + + /* ------ DR Registers ----- */ + tmp_reg = fsl_readl(&dr_regs->usbcmd); + t = scnprintf(next, size, + "USBCMD reg:\n" + "SetupTW: %d\n" + "Run/Stop: %s\n\n", + (tmp_reg & USB_CMD_SUTW) ? 1 : 0, + (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop"); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->usbsts); + t = scnprintf(next, size, + "USB Status Reg:\n" + "Dr Suspend: %d" "Reset Received: %d" "System Error: %s" + "USB Error Interrupt: %s\n\n", + (tmp_reg & USB_STS_SUSPEND) ? 1 : 0, + (tmp_reg & USB_STS_RESET) ? 1 : 0, + (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal", + (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err"); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->usbintr); + t = scnprintf(next, size, + "USB Intrrupt Enable Reg:\n" + "Sleep Enable: %d" "SOF Received Enable: %d" + "Reset Enable: %d\n" + "System Error Enable: %d" + "Port Change Dectected Enable: %d\n" + "USB Error Intr Enable: %d" "USB Intr Enable: %d\n\n", + (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0, + (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0, + (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0, + (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0, + (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0, + (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0, + (tmp_reg & USB_INTR_INT_EN) ? 1 : 0); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->frindex); + t = scnprintf(next, size, + "USB Frame Index Reg:" "Frame Number is 0x%x\n\n", + (tmp_reg & USB_FRINDEX_MASKS)); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->deviceaddr); + t = scnprintf(next, size, + "USB Device Address Reg:" "Device Addr is 0x%x\n\n", + (tmp_reg & USB_DEVICE_ADDRESS_MASK)); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->endpointlistaddr); + t = scnprintf(next, size, + "USB Endpoint List Address Reg:" + "Device Addr is 0x%x\n\n", + (tmp_reg & USB_EP_LIST_ADDRESS_MASK)); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->portsc1); + t = scnprintf(next, size, + "USB Port Status&Control Reg:\n" + "Port Transceiver Type : %s" "Port Speed: %s \n" + "PHY Low Power Suspend: %s" "Port Reset: %s" + "Port Suspend Mode: %s \n" "Over-current Change: %s" + "Port Enable/Disable Change: %s\n" + "Port Enabled/Disabled: %s" + "Current Connect Status: %s\n\n", ({ + char *s; + switch (tmp_reg & PORTSCX_PTS_FSLS) { + case PORTSCX_PTS_UTMI: + s = "UTMI"; break; + case PORTSCX_PTS_ULPI: + s = "ULPI "; break; + case PORTSCX_PTS_FSLS: + s = "FS/LS Serial"; break; + default: + s = "None"; break; + } + s; }), ({ + char *s; + switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) { + case PORTSCX_PORT_SPEED_FULL: + s = "Full Speed"; break; + case PORTSCX_PORT_SPEED_LOW: + s = "Low Speed"; break; + case PORTSCX_PORT_SPEED_HIGH: + s = "High Speed"; break; + default: + s = "Undefined"; break; + } + s; + }), + (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ? + "Normal PHY mode" : "Low power mode", + (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" : + "Not in Reset", + (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in", + (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" : + "No", + (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" : + "Not change", + (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" : + "Not correct", + (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ? + "Attached" : "Not-Att"); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->usbmode); + t = scnprintf(next, size, + "USB Mode Reg:" "Controller Mode is : %s\n\n", ({ + char *s; + switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) { + case USB_MODE_CTRL_MODE_IDLE: + s = "Idle"; break; + case USB_MODE_CTRL_MODE_DEVICE: + s = "Device Controller"; break; + case USB_MODE_CTRL_MODE_HOST: + s = "Host Controller"; break; + default: + s = "None"; break; + } + s; + })); + size -= t; + next += t; + + tmp_reg = fsl_readl(&dr_regs->endptsetupstat); + t = scnprintf(next, size, + "Endpoint Setup Status Reg:" "SETUP on ep 0x%x\n\n", + (tmp_reg & EP_SETUP_STATUS_MASK)); + size -= t; + next += t; + + for (i = 0; i < udc->max_ep / 2; i++) { + tmp_reg = fsl_readl(&dr_regs->endptctrl[i]); + t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n", + i, tmp_reg); + size -= t; + next += t; + } + tmp_reg = fsl_readl(&dr_regs->endpointprime); + t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n", tmp_reg); + size -= t; + next += t; + + if (pdata->have_sysif_regs) { + tmp_reg = usb_sys_regs->snoop1; + t = scnprintf(next, size, "\nSnoop1 Reg = [0x%x]\n\n", tmp_reg); + size -= t; + next += t; + + tmp_reg = usb_sys_regs->control; + t = scnprintf(next, size, "General Control Reg = [0x%x]\n\n", + tmp_reg); + size -= t; + next += t; + } + + /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */ + ep = &udc->eps[0]; + t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n", + ep->ep.name, ep_maxpacket(ep), ep_index(ep)); + size -= t; + next += t; + + if (list_empty(&ep->queue)) { + t = scnprintf(next, size, "its req queue is empty\n\n"); + size -= t; + next += t; + } else { + list_for_each_entry(req, &ep->queue, queue) { + t = scnprintf(next, size, + "req %p actual 0x%x length 0x%x buf %p\n", + &req->req, req->req.actual, + req->req.length, req->req.buf); + size -= t; + next += t; + } + } + /* other gadget->eplist ep */ + list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { + if (ep->desc) { + t = scnprintf(next, size, + "\nFor %s Maxpkt is 0x%x " + "index is 0x%x\n", + ep->ep.name, ep_maxpacket(ep), + ep_index(ep)); + size -= t; + next += t; + + if (list_empty(&ep->queue)) { + t = scnprintf(next, size, + "its req queue is empty\n\n"); + size -= t; + next += t; + } else { + list_for_each_entry(req, &ep->queue, queue) { + t = scnprintf(next, size, + "req %p actual 0x%x length" + "0x%x buf %p\n", + &req->req, req->req.actual, + req->req.length, req->req.buf); + size -= t; + next += t; + } /* end for each_entry of ep req */ + } /* end for else */ + } /* end for if(ep->queue) */ + } /* end (ep->desc) */ + + spin_unlock_irqrestore(&udc->lock, flags); + + *eof = 1; + return count - size; +} + +#define create_proc_file() create_proc_read_entry(proc_filename, \ + 0, NULL, fsl_proc_read, NULL) + +#define remove_proc_file() remove_proc_entry(proc_filename, NULL) + +#else /* !CONFIG_USB_GADGET_DEBUG_FILES */ + +#define create_proc_file() do {} while (0) +#define remove_proc_file() do {} while (0) + +#endif /* CONFIG_USB_GADGET_DEBUG_FILES */ + +/*-------------------------------------------------------------------------*/ + +/* Release udc structures */ +static void fsl_udc_release(struct device *dev) +{ + complete(udc_controller->done); + dma_free_coherent(dev, udc_controller->ep_qh_size, + udc_controller->ep_qh, udc_controller->ep_qh_dma); + kfree(udc_controller); +} + +/****************************************************************** + Internal structure setup functions +*******************************************************************/ +/*------------------------------------------------------------------ + * init resource for globle controller + * Return the udc handle on success or NULL on failure + ------------------------------------------------------------------*/ +static int __init struct_udc_setup(struct fsl_udc *udc, + struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata; + size_t size; + + pdata = pdev->dev.platform_data; + udc->phy_mode = pdata->phy_mode; + + udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL); + if (!udc->eps) { + ERR("malloc fsl_ep failed\n"); + return -1; + } + + /* initialized QHs, take care of alignment */ + size = udc->max_ep * sizeof(struct ep_queue_head); + if (size < QH_ALIGNMENT) + size = QH_ALIGNMENT; + else if ((size % QH_ALIGNMENT) != 0) { + size += QH_ALIGNMENT + 1; + size &= ~(QH_ALIGNMENT - 1); + } + udc->ep_qh = dma_alloc_coherent(&pdev->dev, size, + &udc->ep_qh_dma, GFP_KERNEL); + if (!udc->ep_qh) { + ERR("malloc QHs for udc failed\n"); + kfree(udc->eps); + return -1; + } + + udc->ep_qh_size = size; + + /* Initialize ep0 status request structure */ + /* FIXME: fsl_alloc_request() ignores ep argument */ + udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL), + struct fsl_req, req); + /* allocate a small amount of memory to get valid address */ + udc->status_req->req.buf = kmalloc(8, GFP_KERNEL); + udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf); + /* Initialize ep0 data request structure */ + udc->data_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL), + struct fsl_req, req); + udc->data_req->req.buf = kmalloc(8, GFP_KERNEL); + udc->data_req->req.dma = virt_to_phys(udc->data_req->req.buf); + + udc->resume_state = USB_STATE_NOTATTACHED; + udc->usb_state = USB_STATE_POWERED; + udc->ep0_dir = 0; + udc->remote_wakeup = 0; /* default to 0 on reset */ + spin_lock_init(&udc->lock); + + return 0; +} + +/*---------------------------------------------------------------- + * Setup the fsl_ep struct for eps + * Link fsl_ep->ep to gadget->ep_list + * ep0out is not used so do nothing here + * ep0in should be taken care + *--------------------------------------------------------------*/ +static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index, + char *name, int link) +{ + struct fsl_ep *ep = &udc->eps[index]; + + ep->udc = udc; + strcpy(ep->name, name); + ep->ep.name = ep->name; + + ep->ep.ops = &fsl_ep_ops; + ep->stopped = 0; + + /* for ep0: maxP defined in desc + * for other eps, maxP is set by epautoconfig() called by gadget layer + */ + ep->ep.maxpacket = (unsigned short) ~0; + + /* the queue lists any req for this ep */ + INIT_LIST_HEAD(&ep->queue); + + /* gagdet.ep_list used for ep_autoconfig so no ep0 */ + if (link) + list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); + ep->gadget = &udc->gadget; + ep->qh = &udc->ep_qh[index]; + + return 0; +} + +/* Driver probe function + * all intialization operations implemented here except enabling usb_intr reg + * board setup should have been done in the platform code + */ +static int __init fsl_udc_probe(struct platform_device *pdev) +{ + struct resource *res; + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + int ret = -ENODEV; + unsigned int i; + u32 dccparams, portsc; + + if (strcmp(pdev->name, driver_name)) { + VDBG("Wrong device\n"); + return -ENODEV; + } + + udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL); + if (udc_controller == NULL) { + ERR("malloc udc failed\n"); + return -ENOMEM; + } + udc_controller->pdata = pdata; + +#ifdef CONFIG_USB_OTG + /* Memory and interrupt resources will be passed from OTG */ + udc_controller->transceiver = otg_get_transceiver(); + if (!udc_controller->transceiver) { + printk(KERN_ERR "Can't find OTG driver!\n"); + ret = -ENODEV; + goto err1a; + } + + res = otg_get_resources(); + if (!res) { + DBG("resource not registered!\n"); + return -ENODEV; + } +#else + if ((pdev->dev.parent) && + (to_platform_device(pdev->dev.parent)->resource)) { + pdev->resource = + to_platform_device(pdev->dev.parent)->resource; + pdev->num_resources = + to_platform_device(pdev->dev.parent)->num_resources; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + ret = -ENXIO; + goto err1a; + } + + if (!request_mem_region(res->start, resource_size(res), + driver_name)) { + ERR("request mem region for %s failed \n", pdev->name); + ret = -EBUSY; + goto err1a; + } +#endif + + dr_regs = ioremap(res->start, resource_size(res)); + if (!dr_regs) { + ret = -ENOMEM; + goto err1; + } + pdata->regs = (void *)dr_regs; + /* + * do platform specific init: check the clock, grab/config pins, etc. + */ + if (pdata->platform_init && pdata->platform_init(pdev)) { + ret = -ENODEV; + goto err2a; + } + + if (pdata->have_sysif_regs) + usb_sys_regs = (struct usb_sys_interface *) + ((u32)dr_regs + USB_DR_SYS_OFFSET); + + /* Read Device Controller Capability Parameters register */ + dccparams = fsl_readl(&dr_regs->dccparams); + if (!(dccparams & DCCPARAMS_DC)) { + ERR("This SOC doesn't support device role\n"); + ret = -ENODEV; + goto err2; + } + /* Get max device endpoints */ + /* DEN is bidirectional ep number, max_ep doubles the number */ + udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2; + +#ifdef CONFIG_USB_OTG + res++; + udc_controller->irq = res->start; +#else + udc_controller->irq = platform_get_irq(pdev, 0); +#endif + if (!udc_controller->irq) { + ret = -ENODEV; + goto err2; + } + + ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED, + driver_name, udc_controller); + if (ret != 0) { + ERR("cannot request irq %d err %d \n", + udc_controller->irq, ret); + goto err2; + } + + /* Initialize the udc structure including QH member and other member */ + if (struct_udc_setup(udc_controller, pdev)) { + ERR("Can't initialize udc data structure\n"); + ret = -ENOMEM; + goto err3; + } + + if (!udc_controller->transceiver) { + /* initialize usb hw reg except for regs for EP, + * leave usbintr reg untouched */ + dr_controller_setup(udc_controller); + } + + /* Setup gadget structure */ + udc_controller->gadget.ops = &fsl_gadget_ops; + udc_controller->gadget.is_dualspeed = 1; + udc_controller->gadget.ep0 = &udc_controller->eps[0].ep; + INIT_LIST_HEAD(&udc_controller->gadget.ep_list); + udc_controller->gadget.speed = USB_SPEED_UNKNOWN; + udc_controller->gadget.name = driver_name; + + /* Setup gadget.dev and register with kernel */ + dev_set_name(&udc_controller->gadget.dev, "gadget"); + udc_controller->gadget.dev.release = fsl_udc_release; + udc_controller->gadget.dev.parent = &pdev->dev; + ret = device_register(&udc_controller->gadget.dev); + if (ret < 0) + goto err3; + + if (udc_controller->transceiver) { + udc_controller->gadget.is_otg = 1; + /* now didn't support lpm in OTG mode*/ + device_set_wakeup_capable(&pdev->dev, 0); + } + + /* setup QH and epctrl for ep0 */ + ep0_setup(udc_controller); + + /* setup udc->eps[] for ep0 */ + struct_ep_setup(udc_controller, 0, "ep0", 0); + /* for ep0: the desc defined here; + * for other eps, gadget layer called ep_enable with defined desc + */ + udc_controller->eps[0].desc = &fsl_ep0_desc; + udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD; + + /* setup the udc->eps[] for non-control endpoints and link + * to gadget.ep_list */ + for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) { + char name[14]; + + sprintf(name, "ep%dout", i); + struct_ep_setup(udc_controller, i * 2, name, 1); + sprintf(name, "ep%din", i); + struct_ep_setup(udc_controller, i * 2 + 1, name, 1); + } + + /* use dma_pool for TD management */ + udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev, + sizeof(struct ep_td_struct), + DTD_ALIGNMENT, UDC_DMA_BOUNDARY); + if (udc_controller->td_pool == NULL) { + ret = -ENOMEM; + goto err4; + } + if (g_iram_size) { + for (i = 0; i < IRAM_PPH_NTD; i++) { + udc_controller->iram_buffer[i] = + USB_IRAM_BASE_ADDR + i * g_iram_size; + udc_controller->iram_buffer_v[i] = + IO_ADDRESS(udc_controller->iram_buffer[i]); + } + } +#ifdef POSTPONE_FREE_LAST_DTD + last_free_td = NULL; +#endif + + /* disable all INTR */ + fsl_writel(0, &dr_regs->usbintr); + + dr_wake_up_enable(udc_controller, false); + udc_controller->stopped = 1; + + portsc = fsl_readl(&dr_regs->portsc1); + portsc |= PORTSCX_PHY_LOW_POWER_SPD; + fsl_writel(portsc, &dr_regs->portsc1); + + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(false); + + create_proc_file(); + return 0; + +err4: + device_unregister(&udc_controller->gadget.dev); +err3: + free_irq(udc_controller->irq, udc_controller); +err2: + if (pdata->platform_uninit) + pdata->platform_uninit(pdata); +err2a: + iounmap((u8 __iomem *)dr_regs); +err1: + if (!udc_controller->transceiver) + release_mem_region(res->start, resource_size(res)); +err1a: + kfree(udc_controller); + udc_controller = NULL; + return ret; +} + +/* Driver removal function + * Free resources and finish pending transactions + */ +static int __exit fsl_udc_remove(struct platform_device *pdev) +{ + struct resource *res; + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + + DECLARE_COMPLETION(done); + + if (!udc_controller) + return -ENODEV; + udc_controller->done = &done; + /* open USB PHY clock */ + dr_phy_low_power_mode(udc_controller, false); + + /* DR has been stopped in usb_gadget_unregister_driver() */ + remove_proc_file(); + + /* Free allocated memory */ + kfree(udc_controller->status_req->req.buf); + kfree(udc_controller->status_req); + kfree(udc_controller->data_req->req.buf); + kfree(udc_controller->data_req); + kfree(udc_controller->eps); +#ifdef POSTPONE_FREE_LAST_DTD + if (last_free_td != NULL) + dma_pool_free(udc_controller->td_pool, last_free_td, + last_free_td->td_dma); +#endif + dma_pool_destroy(udc_controller->td_pool); + free_irq(udc_controller->irq, udc_controller); + iounmap((u8 __iomem *)dr_regs); + +#ifndef CONFIG_USB_OTG + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(res->start, resource_size(res)); +#endif + + device_unregister(&udc_controller->gadget.dev); + /* free udc --wait for the release() finished */ + wait_for_completion(&done); + + /* + * do platform specific un-initialization: + * release iomux pins, etc. + */ + if (pdata->platform_uninit) + pdata->platform_uninit(pdata); + + return 0; +} + +static int udc_suspend(struct fsl_udc *udc) +{ + u32 mode, usbcmd; + + /* open clock for register access */ + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(true); + + mode = fsl_readl(&dr_regs->usbmode) & USB_MODE_CTRL_MODE_MASK; + usbcmd = fsl_readl(&dr_regs->usbcmd); + + pr_debug("%s(): mode 0x%x stopped %d\n", __func__, mode, udc->stopped); + + /* + * If the controller is already stopped, then this must be a + * PM suspend. Remember this fact, so that we will leave the + * controller stopped at PM resume time. + */ + if (udc->stopped) { + pr_debug("gadget already stopped, leaving early\n"); + udc->already_stopped = 1; + goto out; + } + + if (mode != USB_MODE_CTRL_MODE_DEVICE) { + pr_debug("gadget not in device mode, leaving early\n"); + goto out; + } + + udc->stopped = 1; + /* if the suspend is not for switch to host in otg mode */ + if ((!(udc->gadget.is_otg)) || + (fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) { + dr_wake_up_enable(udc, true); + dr_phy_low_power_mode(udc, true); + } + + /* stop the controller */ + usbcmd = fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP; + fsl_writel(usbcmd, &dr_regs->usbcmd); + + printk(KERN_INFO "USB Gadget suspended\n"); +out: + if (udc_controller->pdata->usb_clock_for_pm) + udc_controller->pdata->usb_clock_for_pm(false); + return 0; +} + +/*----------------------------------------------------------------- + * Modify Power management attributes + * Used by OTG statemachine to disable gadget temporarily + -----------------------------------------------------------------*/ +static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state) +{ + if (((!(udc_controller->gadget.is_otg)) || + (fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) && + (udc_controller->usb_state > USB_STATE_POWERED) && + (udc_controller->usb_state < USB_STATE_SUSPENDED)) + return -EBUSY; + + return udc_suspend(udc_controller); +} + +/*----------------------------------------------------------------- + * Invoked on USB resume. May be called in_interrupt. + * Here we start the DR controller and enable the irq + *-----------------------------------------------------------------*/ +static int fsl_udc_resume(struct platform_device *pdev) +{ + pr_debug("%s(): stopped %d already_stopped %d\n", __func__, + udc_controller->stopped, udc_controller->already_stopped); + + /* + * If the controller was stopped at suspend time, then + * don't resume it now. + */ + if (udc_controller->already_stopped) { + udc_controller->already_stopped = 0; + pr_debug("gadget was already stopped, leaving early\n"); + return 0; + } + + /* Enable DR irq reg and set controller Run */ + if (udc_controller->stopped) { + dr_wake_up_enable(udc_controller, false); + dr_phy_low_power_mode(udc_controller, false); + mdelay(1); + + dr_controller_setup(udc_controller); + dr_controller_run(udc_controller); + } + udc_controller->usb_state = USB_STATE_ATTACHED; + udc_controller->ep0_dir = 0; + + printk(KERN_INFO "USB Gadget resumed\n"); + return 0; +} + +/*------------------------------------------------------------------------- + Register entry point for the peripheral controller driver +--------------------------------------------------------------------------*/ + +static struct platform_driver udc_driver = { + .remove = __exit_p(fsl_udc_remove), + /* these suspend and resume are not usb suspend and resume */ + .suspend = fsl_udc_suspend, + .resume = fsl_udc_resume, + .probe = fsl_udc_probe, + .driver = { + .name = driver_name, + .owner = THIS_MODULE, + }, +}; + +static int __init udc_init(void) +{ + printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION); + return platform_driver_register(&udc_driver); +} + +module_init(udc_init); + +static void __exit udc_exit(void) +{ + platform_driver_unregister(&udc_driver); + printk(KERN_INFO "%s unregistered \n", driver_desc); +} + +module_exit(udc_exit); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/gadget/stmp_updater.h +++ linux-fsl-imx51-2.6.31/drivers/usb/gadget/stmp_updater.h @@ -0,0 +1,139 @@ +/* + * Freescale STMP378X UUT driver + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __STMP_UPDATER_H +#define __STMP_UPDATER_H + +#include +#include +#include + +static int utp_init(struct fsg_dev *fsg); +static void utp_exit(struct fsg_dev *fsg); +static ssize_t utp_file_read(struct file *file, + char __user *buf, + size_t size, + loff_t *off); + +static ssize_t utp_file_write(struct file *file, + const char __user *buf, + size_t size, + loff_t *off); + +static struct utp_user_data *utp_user_data_alloc(size_t size); +static void utp_user_data_free(struct utp_user_data *uud); +static int utp_get_sense(struct fsg_dev *fsg); +static int utp_do_read(struct fsg_dev *fsg, void *data, size_t size); +static int utp_do_write(struct fsg_dev *fsg, void *data, size_t size); +static inline void utp_set_sense(struct fsg_dev *fsg, u16 code, u64 reply); +static int utp_handle_message(struct fsg_dev *fsg, + char *cdb_data, + int default_reply); + +#define UTP_REPLY_PASS 0 +#define UTP_REPLY_EXIT 0x8001 +#define UTP_REPLY_BUSY 0x8002 +#define UTP_REPLY_SIZE 0x8003 +#define UTP_SENSE_KEY 9 + +#define UTP_MINOR 222 +/* MISC_DYNAMIC_MINOR would be better, but... */ + +#define UTP_COMMAND_SIZE 80 + +#define UTP_SS_EXIT(fsg, r) utp_set_sense(fsg, UTP_REPLY_EXIT, (u64)r) +#define UTP_SS_PASS(fsg) utp_set_sense(fsg, UTP_REPLY_PASS, 0) +#define UTP_SS_BUSY(fsg, r) utp_set_sense(fsg, UTP_REPLY_BUSY, (u64)r) +#define UTP_SS_SIZE(fsg, r) utp_set_sense(fsg, UTP_REPLY_SIZE, (u64)r) + +#pragma pack(1) +struct utp_msg { + u8 f0; + u8 utp_msg_type; + u32 utp_msg_tag; + union { + struct { + u32 param_lsb; + u32 param_msb; + }; + u64 param; + }; +}; + +enum utp_msg_type { + UTP_POLL = 0, + UTP_EXEC, + UTP_GET, + UTP_PUT, +}; + +static struct utp_context { + wait_queue_head_t wq; + struct mutex lock; + struct list_head read; + struct list_head write; + u32 sd, sdinfo, sdinfo_h; /* sense data */ + int processed; + u8 *buffer; + u32 counter; + u64 utp_version; +} utp_context; + +static const struct file_operations utp_fops = { + .open = nonseekable_open, + .read = utp_file_read, + .write = utp_file_write, +}; + +static struct miscdevice utp_dev = { + .minor = UTP_MINOR, + .name = "utp", + .fops = &utp_fops, +}; + +#define UTP_FLAG_COMMAND 0x00000001 +#define UTP_FLAG_DATA 0x00000002 +#define UTP_FLAG_STATUS 0x00000004 +#define UTP_FLAG_REPORT_BUSY 0x10000000 +struct utp_message { + u32 flags; + size_t size; + union { + struct { + u64 payload; + char command[1]; + }; + struct { + size_t bufsize; + u8 data[1]; + }; + u32 status; + }; +}; + +struct utp_user_data { + struct list_head link; + struct utp_message data; +}; +#pragma pack() + +static inline struct utp_context *UTP_CTX(struct fsg_dev *fsg) +{ + return (struct utp_context *)fsg->utp; +} + +#endif /* __STMP_UPDATER_H */ + --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ohci.h +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ohci.h @@ -402,6 +402,7 @@ #define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ #define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ +#define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */ // there are also chip quirks/bugs in init logic struct work_struct nec_work; /* Worker for NEC quirk */ @@ -433,6 +434,10 @@ { return ohci->flags & OHCI_QUIRK_AMD_ISO; } +static inline int quirk_amdprefetch(struct ohci_hcd *ohci) +{ + return ohci->flags & OHCI_QUIRK_AMD_PREFETCH; +} #else static inline int quirk_nec(struct ohci_hcd *ohci) { @@ -446,6 +451,10 @@ { return 0; } +static inline int quirk_amdprefetch(struct ohci_hcd *ohci) +{ + return 0; +} #endif /* convert between an hcd pointer and the corresponding ohci_hcd */ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci-ring.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci-ring.c @@ -172,8 +172,9 @@ * have their chain bit cleared (so that each Link TRB is a separate TD). * * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit - * set, but other sections talk about dealing with the chain bit set. - * Assume section 6.4.4.1 is wrong, and the chain bit can be set in a Link TRB. + * set, but other sections talk about dealing with the chain bit set. This was + * fixed in the 0.96 specification errata, but we have to assume that all 0.95 + * xHCI hardware can't handle the chain bit being cleared on a link TRB. */ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer) { @@ -191,8 +192,14 @@ while (last_trb(xhci, ring, ring->enq_seg, next)) { if (!consumer) { if (ring != xhci->event_ring) { - next->link.control &= ~TRB_CHAIN; - next->link.control |= chain; + /* If we're not dealing with 0.95 hardware, + * carry over the chain bit of the previous TRB + * (which may mean the chain bit is cleared). + */ + if (!xhci_link_trb_quirk(xhci)) { + next->link.control &= ~TRB_CHAIN; + next->link.control |= chain; + } /* Give this link TRB to the hardware */ wmb(); if (next->link.control & TRB_CYCLE) @@ -462,7 +469,6 @@ * ring running. */ ep_ring->state |= SET_DEQ_PENDING; - xhci_ring_cmd_db(xhci); } /* @@ -531,6 +537,7 @@ if (deq_state.new_deq_ptr && deq_state.new_deq_seg) { xhci_queue_new_dequeue_state(xhci, ep_ring, slot_id, ep_index, &deq_state); + xhci_ring_cmd_db(xhci); } else { /* Otherwise just ring the doorbell to restart the ring */ ring_ep_doorbell(xhci, slot_id, ep_index); @@ -644,18 +651,31 @@ { int slot_id; unsigned int ep_index; + struct xhci_ring *ep_ring; slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]); ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]); + ep_ring = xhci->devs[slot_id]->ep_rings[ep_index]; /* This command will only fail if the endpoint wasn't halted, * but we don't care. */ xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n", (unsigned int) GET_COMP_CODE(event->status)); - /* Clear our internal halted state and restart the ring */ - xhci->devs[slot_id]->ep_rings[ep_index]->state &= ~EP_HALTED; - ring_ep_doorbell(xhci, slot_id, ep_index); + /* HW with the reset endpoint quirk needs to have a configure endpoint + * command complete before the endpoint can be used. Queue that here + * because the HW can't handle two commands being queued in a row. + */ + if (xhci->quirks & XHCI_RESET_EP_QUIRK) { + xhci_dbg(xhci, "Queueing configure endpoint command\n"); + xhci_queue_configure_endpoint(xhci, + xhci->devs[slot_id]->in_ctx->dma, slot_id); + xhci_ring_cmd_db(xhci); + } else { + /* Clear our internal halted state and restart the ring */ + ep_ring->state &= ~EP_HALTED; + ring_ep_doorbell(xhci, slot_id, ep_index); + } } static void handle_cmd_completion(struct xhci_hcd *xhci, @@ -664,6 +684,10 @@ int slot_id = TRB_TO_SLOT_ID(event->flags); u64 cmd_dma; dma_addr_t cmd_dequeue_dma; + struct xhci_input_control_ctx *ctrl_ctx; + unsigned int ep_index; + struct xhci_ring *ep_ring; + unsigned int ep_state; cmd_dma = event->cmd_trb; cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, @@ -691,6 +715,41 @@ xhci_free_virt_device(xhci, slot_id); break; case TRB_TYPE(TRB_CONFIG_EP): + /* + * Configure endpoint commands can come from the USB core + * configuration or alt setting changes, or because the HW + * needed an extra configure endpoint command after a reset + * endpoint command. In the latter case, the xHCI driver is + * not waiting on the configure endpoint command. + */ + ctrl_ctx = xhci_get_input_control_ctx(xhci, + xhci->devs[slot_id]->in_ctx); + /* Input ctx add_flags are the endpoint index plus one */ + ep_index = xhci_last_valid_endpoint(ctrl_ctx->add_flags) - 1; + ep_ring = xhci->devs[slot_id]->ep_rings[ep_index]; + if (!ep_ring) { + /* This must have been an initial configure endpoint */ + xhci->devs[slot_id]->cmd_status = + GET_COMP_CODE(event->status); + complete(&xhci->devs[slot_id]->cmd_completion); + break; + } + ep_state = ep_ring->state; + xhci_dbg(xhci, "Completed config ep cmd - last ep index = %d, " + "state = %d\n", ep_index, ep_state); + if (xhci->quirks & XHCI_RESET_EP_QUIRK && + ep_state & EP_HALTED) { + /* Clear our internal halted state and restart ring */ + xhci->devs[slot_id]->ep_rings[ep_index]->state &= + ~EP_HALTED; + ring_ep_doorbell(xhci, slot_id, ep_index); + } else { + xhci->devs[slot_id]->cmd_status = + GET_COMP_CODE(event->status); + complete(&xhci->devs[slot_id]->cmd_completion); + } + break; + case TRB_TYPE(TRB_EVAL_CONTEXT): xhci->devs[slot_id]->cmd_status = GET_COMP_CODE(event->status); complete(&xhci->devs[slot_id]->cmd_completion); break; @@ -763,9 +822,11 @@ cur_seg = start_seg; do { + if (start_dma == 0) + return 0; /* We may get an event for a Link TRB in the middle of a TD */ end_seg_dma = xhci_trb_virt_to_dma(cur_seg, - &start_seg->trbs[TRBS_PER_SEGMENT - 1]); + &cur_seg->trbs[TRBS_PER_SEGMENT - 1]); /* If the end TRB isn't in this segment, this is set to 0 */ end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); @@ -792,8 +853,9 @@ } cur_seg = cur_seg->next; start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); - } while (1); + } while (cur_seg != start_seg); + return 0; } /* @@ -806,6 +868,7 @@ { struct xhci_virt_device *xdev; struct xhci_ring *ep_ring; + unsigned int slot_id; int ep_index; struct xhci_td *td = 0; dma_addr_t event_dma; @@ -814,9 +877,11 @@ struct urb *urb = 0; int status = -EINPROGRESS; struct xhci_ep_ctx *ep_ctx; + u32 trb_comp_code; xhci_dbg(xhci, "In %s\n", __func__); - xdev = xhci->devs[TRB_TO_SLOT_ID(event->flags)]; + slot_id = TRB_TO_SLOT_ID(event->flags); + xdev = xhci->devs[slot_id]; if (!xdev) { xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n"); return -ENODEV; @@ -870,7 +935,8 @@ (unsigned int) event->flags); /* Look for common error cases */ - switch (GET_COMP_CODE(event->transfer_len)) { + trb_comp_code = GET_COMP_CODE(event->transfer_len); + switch (trb_comp_code) { /* Skip codes that require special handling depending on * transfer type */ @@ -913,7 +979,7 @@ /* Was this a control transfer? */ if (usb_endpoint_xfer_control(&td->urb->ep->desc)) { xhci_debug_trb(xhci, xhci->event_ring->dequeue); - switch (GET_COMP_CODE(event->transfer_len)) { + switch (trb_comp_code) { case COMP_SUCCESS: if (event_trb == ep_ring->dequeue) { xhci_warn(xhci, "WARN: Success on ctrl setup TRB without IOC set??\n"); @@ -928,8 +994,39 @@ break; case COMP_SHORT_TX: xhci_warn(xhci, "WARN: short transfer on control ep\n"); - status = -EREMOTEIO; + if (td->urb->transfer_flags & URB_SHORT_NOT_OK) + status = -EREMOTEIO; + else + status = 0; break; + case COMP_BABBLE: + /* The 0.96 spec says a babbling control endpoint + * is not halted. The 0.96 spec says it is. Some HW + * claims to be 0.95 compliant, but it halts the control + * endpoint anyway. Check if a babble halted the + * endpoint. + */ + if (ep_ctx->ep_info != EP_STATE_HALTED) + break; + /* else fall through */ + case COMP_STALL: + /* Did we transfer part of the data (middle) phase? */ + if (event_trb != ep_ring->dequeue && + event_trb != td->last_trb) + td->urb->actual_length = + td->urb->transfer_buffer_length + - TRB_LEN(event->transfer_len); + else + td->urb->actual_length = 0; + + ep_ring->stopped_td = td; + ep_ring->stopped_trb = event_trb; + xhci_queue_reset_ep(xhci, slot_id, ep_index); + xhci_cleanup_stalled_ring(xhci, + td->urb->dev, + ep_index, ep_ring); + xhci_ring_cmd_db(xhci); + goto td_cleanup; default: /* Others already handled above */ break; @@ -943,7 +1040,10 @@ if (event_trb == td->last_trb) { if (td->urb->actual_length != 0) { /* Don't overwrite a previously set error code */ - if (status == -EINPROGRESS || status == 0) + if ((status == -EINPROGRESS || + status == 0) && + (td->urb->transfer_flags + & URB_SHORT_NOT_OK)) /* Did we already see a short data stage? */ status = -EREMOTEIO; } else { @@ -952,7 +1052,7 @@ } } else { /* Maybe the event was for the data stage? */ - if (GET_COMP_CODE(event->transfer_len) != COMP_STOP_INVAL) { + if (trb_comp_code != COMP_STOP_INVAL) { /* We didn't stop on a link TRB in the middle */ td->urb->actual_length = td->urb->transfer_buffer_length - @@ -964,7 +1064,7 @@ } } } else { - switch (GET_COMP_CODE(event->transfer_len)) { + switch (trb_comp_code) { case COMP_SUCCESS: /* Double check that the HW transferred everything. */ if (event_trb != td->last_trb) { @@ -975,7 +1075,12 @@ else status = 0; } else { - xhci_dbg(xhci, "Successful bulk transfer!\n"); + if (usb_endpoint_xfer_bulk(&td->urb->ep->desc)) + xhci_dbg(xhci, "Successful bulk " + "transfer!\n"); + else + xhci_dbg(xhci, "Successful interrupt " + "transfer!\n"); status = 0; } break; @@ -1001,11 +1106,17 @@ td->urb->actual_length = td->urb->transfer_buffer_length - TRB_LEN(event->transfer_len); - if (td->urb->actual_length < 0) { + if (td->urb->transfer_buffer_length < + td->urb->actual_length) { xhci_warn(xhci, "HC gave bad length " "of %d bytes left\n", TRB_LEN(event->transfer_len)); td->urb->actual_length = 0; + if (td->urb->transfer_flags & + URB_SHORT_NOT_OK) + status = -EREMOTEIO; + else + status = 0; } /* Don't overwrite a previously set error code */ if (status == -EINPROGRESS) { @@ -1041,14 +1152,14 @@ /* If the ring didn't stop on a Link or No-op TRB, add * in the actual bytes transferred from the Normal TRB */ - if (GET_COMP_CODE(event->transfer_len) != COMP_STOP_INVAL) + if (trb_comp_code != COMP_STOP_INVAL) td->urb->actual_length += TRB_LEN(cur_trb->generic.field[2]) - TRB_LEN(event->transfer_len); } } - if (GET_COMP_CODE(event->transfer_len) == COMP_STOP_INVAL || - GET_COMP_CODE(event->transfer_len) == COMP_STOP) { + if (trb_comp_code == COMP_STOP_INVAL || + trb_comp_code == COMP_STOP) { /* The Endpoint Stop Command completion will take care of any * stopped TDs. A stopped TD may be restarted, so don't update * the ring dequeue pointer or take this TD off any lists yet. @@ -1056,7 +1167,8 @@ ep_ring->stopped_td = td; ep_ring->stopped_trb = event_trb; } else { - if (GET_COMP_CODE(event->transfer_len) == COMP_STALL) { + if (trb_comp_code == COMP_STALL || + trb_comp_code == COMP_BABBLE) { /* The transfer is completed from the driver's * perspective, but we need to issue a set dequeue * command for this stalled endpoint to move the dequeue @@ -1072,16 +1184,41 @@ inc_deq(xhci, ep_ring, false); } +td_cleanup: /* Clean up the endpoint's TD list */ urb = td->urb; + /* Do one last check of the actual transfer length. + * If the host controller said we transferred more data than + * the buffer length, urb->actual_length will be a very big + * number (since it's unsigned). Play it safe and say we didn't + * transfer anything. + */ + if (urb->actual_length > urb->transfer_buffer_length) { + xhci_warn(xhci, "URB transfer length is wrong, " + "xHC issue? req. len = %u, " + "act. len = %u\n", + urb->transfer_buffer_length, + urb->actual_length); + urb->actual_length = 0; + if (td->urb->transfer_flags & URB_SHORT_NOT_OK) + status = -EREMOTEIO; + else + status = 0; + } list_del(&td->td_list); /* Was this TD slated to be cancelled but completed anyway? */ if (!list_empty(&td->cancelled_td_list)) { list_del(&td->cancelled_td_list); ep_ring->cancels_pending--; } - /* Leave the TD around for the reset endpoint function to use */ - if (GET_COMP_CODE(event->transfer_len) != COMP_STALL) { + /* Leave the TD around for the reset endpoint function to use + * (but only if it's not a control endpoint, since we already + * queued the Set TR dequeue pointer command for stalled + * control endpoints). + */ + if (usb_endpoint_xfer_control(&urb->ep->desc) || + (trb_comp_code != COMP_STALL && + trb_comp_code != COMP_BABBLE)) { kfree(td); } urb->hcpriv = NULL; @@ -1094,7 +1231,7 @@ if (urb) { usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), urb); xhci_dbg(xhci, "Giveback URB %p, len = %d, status = %d\n", - urb, td->urb->actual_length, status); + urb, urb->actual_length, status); spin_unlock(&xhci->lock); usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, status); spin_lock(&xhci->lock); @@ -1335,6 +1472,47 @@ ring_ep_doorbell(xhci, slot_id, ep_index); } +/* + * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt + * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD + * (comprised of sg list entries) can take several service intervals to + * transmit. + */ +int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags, + struct urb *urb, int slot_id, unsigned int ep_index) +{ + struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, + xhci->devs[slot_id]->out_ctx, ep_index); + int xhci_interval; + int ep_interval; + + xhci_interval = EP_INTERVAL_TO_UFRAMES(ep_ctx->ep_info); + ep_interval = urb->interval; + /* Convert to microframes */ + if (urb->dev->speed == USB_SPEED_LOW || + urb->dev->speed == USB_SPEED_FULL) + ep_interval *= 8; + /* FIXME change this to a warning and a suggestion to use the new API + * to set the polling interval (once the API is added). + */ + if (xhci_interval != ep_interval) { + if (!printk_ratelimit()) + dev_dbg(&urb->dev->dev, "Driver uses different interval" + " (%d microframe%s) than xHCI " + "(%d microframe%s)\n", + ep_interval, + ep_interval == 1 ? "" : "s", + xhci_interval, + xhci_interval == 1 ? "" : "s"); + urb->interval = xhci_interval; + /* Convert back to frames for LS/FS devices */ + if (urb->dev->speed == USB_SPEED_LOW || + urb->dev->speed == USB_SPEED_FULL) + urb->interval /= 8; + } + return xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, slot_id, ep_index); +} + static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index) { @@ -1733,6 +1911,15 @@ TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id)); } +/* Queue an evaluate context command TRB */ +int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, + u32 slot_id) +{ + return queue_command(xhci, lower_32_bits(in_ctx_ptr), + upper_32_bits(in_ctx_ptr), 0, + TRB_TYPE(TRB_EVAL_CONTEXT) | SLOT_ID_FOR_TRB(slot_id)); +} + int xhci_queue_stop_endpoint(struct xhci_hcd *xhci, int slot_id, unsigned int ep_index) { --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci-mem.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci-mem.c @@ -94,6 +94,9 @@ val = prev->trbs[TRBS_PER_SEGMENT-1].link.control; val &= ~TRB_TYPE_BITMASK; val |= TRB_TYPE(TRB_LINK); + /* Always set the chain bit with 0.95 hardware */ + if (xhci_link_trb_quirk(xhci)) + val |= TRB_CHAIN; prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; } xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", @@ -398,15 +401,28 @@ /* Step 5 */ ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP); /* - * See section 4.3 bullet 6: - * The default Max Packet size for ep0 is "8 bytes for a USB2 - * LS/FS/HS device or 512 bytes for a USB3 SS device" * XXX: Not sure about wireless USB devices. */ - if (udev->speed == USB_SPEED_SUPER) + switch (udev->speed) { + case USB_SPEED_SUPER: ep0_ctx->ep_info2 |= MAX_PACKET(512); - else + break; + case USB_SPEED_HIGH: + /* USB core guesses at a 64-byte max packet first for FS devices */ + case USB_SPEED_FULL: + ep0_ctx->ep_info2 |= MAX_PACKET(64); + break; + case USB_SPEED_LOW: ep0_ctx->ep_info2 |= MAX_PACKET(8); + break; + case USB_SPEED_VARIABLE: + xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); + return -EINVAL; + break; + default: + /* New speed? */ + BUG(); + } /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ ep0_ctx->ep_info2 |= MAX_BURST(0); ep0_ctx->ep_info2 |= ERROR_COUNT(3); @@ -598,6 +614,44 @@ */ } +/* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy. + * Useful when you want to change one particular aspect of the endpoint and then + * issue a configure endpoint command. + */ +void xhci_endpoint_copy(struct xhci_hcd *xhci, + struct xhci_virt_device *vdev, unsigned int ep_index) +{ + struct xhci_ep_ctx *out_ep_ctx; + struct xhci_ep_ctx *in_ep_ctx; + + out_ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index); + in_ep_ctx = xhci_get_ep_ctx(xhci, vdev->in_ctx, ep_index); + + in_ep_ctx->ep_info = out_ep_ctx->ep_info; + in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2; + in_ep_ctx->deq = out_ep_ctx->deq; + in_ep_ctx->tx_info = out_ep_ctx->tx_info; +} + +/* Copy output xhci_slot_ctx to the input xhci_slot_ctx. + * Useful when you want to change one particular aspect of the endpoint and then + * issue a configure endpoint command. Only the context entries field matters, + * but we'll copy the whole thing anyway. + */ +void xhci_slot_copy(struct xhci_hcd *xhci, struct xhci_virt_device *vdev) +{ + struct xhci_slot_ctx *in_slot_ctx; + struct xhci_slot_ctx *out_slot_ctx; + + in_slot_ctx = xhci_get_slot_ctx(xhci, vdev->in_ctx); + out_slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); + + in_slot_ctx->dev_info = out_slot_ctx->dev_info; + in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2; + in_slot_ctx->tt_info = out_slot_ctx->tt_info; + in_slot_ctx->dev_state = out_slot_ctx->dev_state; +} + /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */ static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags) { @@ -702,9 +756,11 @@ int i; /* Free the Event Ring Segment Table and the actual Event Ring */ - xhci_writel(xhci, 0, &xhci->ir_set->erst_size); - xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); - xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); + if (xhci->ir_set) { + xhci_writel(xhci, 0, &xhci->ir_set->erst_size); + xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); + xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); + } size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); if (xhci->erst.entries) pci_free_consistent(pdev, size, @@ -741,9 +797,9 @@ xhci->dcbaa, xhci->dcbaa->dma); xhci->dcbaa = NULL; + scratchpad_free(xhci); xhci->page_size = 0; xhci->page_shift = 0; - scratchpad_free(xhci); } int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/Kconfig +++ linux-fsl-imx51-2.6.31/drivers/usb/host/Kconfig @@ -59,9 +59,100 @@ To compile this driver as a module, choose M here: the module will be called ehci-hcd. +config USB_EHCI_ARC + bool "Support for Freescale controller" + depends on USB_EHCI_HCD && (ARCH_MXC || ARCH_STMP3XXX) + ---help--- + Some Freescale processors have an integrated High Speed + USBOTG controller, which supports EHCI host mode. + + Say "y" here to add support for this controller + to the EHCI HCD driver. + +config USB_EHCI_ARC_H1 + bool "Support for Host1 port on Freescale controller" + depends on USB_EHCI_ARC && (ARCH_MX27 || ARCH_MX3 || ARCH_MX51) + ---help--- + Enable support for the USB Host1 port. + +config USB_EHCI_ARC_H2 + bool "Support for Host2 port on Freescale controller" + depends on USB_EHCI_ARC && \ + (ARCH_MX25 || ARCH_MX27 || ARCH_MX3 || ARCH_MX35 || ARCH_MX51) + ---help--- + Enable support for the USB Host2 port. + +config USB_EHCI_ARC_OTG + bool "Support for DR host port on Freescale controller" + depends on USB_EHCI_ARC + default y + ---help--- + Enable support for the USB OTG port in HS/FS Host mode. + +config USB_STATIC_IRAM + bool "Use IRAM for USB" + depends on USB_EHCI_ARC + ---help--- + Enable this option to use IRAM instead of DRAM for USB + structures and buffers. This option will reduce bus + contention on systems with large (VGA+) framebuffer + devices and heavy USB activity. There are performance + penalties and usage restrictions when using this option. + + If in doubt, say N. + +choice + prompt "Select transceiver for DR port" + depends on USB_EHCI_ARC_OTG + default USB_EHCI_FSL_1504 if ARCH_MX3 + default USB_EHCI_FSL_1301 if ARCH_MX27 + default USB_EHCI_FSL_UTMI if (ARCH_MX25 || ARCH_MX35 || ARCH_MX37 || ARCH_MX51 || ARCH_STMP3XXX) + ---help--- + Choose the transceiver to use with the Freescale DR port. + +config USB_EHCI_FSL_MC13783 + bool "Freescale MC13783" + depends on !MACH_MX25_3DS + ---help--- + Enable support for the Full Speed Freescale MC13783 transceiver. + + The mx27ads, mx31ads and mx32ads boards require modifications + to support this transceiver. + +config USB_EHCI_FSL_1301 + bool "Philips ISP1301" + depends on !MACH_MX25_3DS + ---help--- + Enable support for the Full Speed Philips ISP1301 transceiver. + + This is the factory default for the mx27ads board. + The mx31ads and mx32ads boards require modifications + to support this transceiver. + +config USB_EHCI_FSL_1504 + bool "Philips ISP1504" + depends on MACH_MX27ADS || MACH_MX31ADS || MACH_MX32ADS ||MACH_MX31_3DS + ---help--- + Enable support for the High Speed Philips ISP1504 transceiver. + + This is the factory default for the mx31ads and mx32ads boards. + The mx27ads board requires modifications to support this transceiver. + +config USB_EHCI_FSL_UTMI + bool "Internal UTMI" + depends on (ARCH_MX25 || ARCH_MX35 || ARCH_MX37 || ARCH_MX51 || ARCH_STMP3XXX) + ---help--- + Enable support for the on-chip High Speed UTMI transceiver. + + This is the factory default for the mx35ads board. + +endchoice + + config USB_EHCI_ROOT_HUB_TT bool "Root Hub Transaction Translators" depends on USB_EHCI_HCD + default y if USB_EHCI_ARC ---help--- Some EHCI chips have vendor-specific extensions to integrate transaction translators, so that no OHCI or UHCI companion --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-arc.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-arc.c @@ -0,0 +1,639 @@ +/* + * Copyright (c) 2005 MontaVista Software + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Ported to 834x by Randy Vinson using code provided + * by Hunter Wu. + */ + +#include +#include +#include + +#include "ehci-fsl.h" +#include + +extern struct resource *otg_get_resources(void); + +#undef EHCI_PROC_PTC +#ifdef EHCI_PROC_PTC /* /proc PORTSC:PTC support */ +/* + * write a PORTSC:PTC value to /proc/driver/ehci-ptc + * to put the controller into test mode. + */ +#include +#include +#define EFPSL 3 /* ehci fsl proc string length */ + +static int ehci_fsl_proc_read(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + return 0; +} + +static int ehci_fsl_proc_write(struct file *file, const char __user *buffer, + unsigned long count, void *data) +{ + int ptc; + u32 portsc; + struct ehci_hcd *ehci = (struct ehci_hcd *) data; + char str[EFPSL] = {0}; + + if (count > EFPSL-1) + return -EINVAL; + + if (copy_from_user(str, buffer, count)) + return -EFAULT; + + str[count] = '\0'; + + ptc = simple_strtoul(str, NULL, 0); + + portsc = ehci_readl(ehci, &ehci->regs->port_status[0]); + portsc &= ~(0xf << 16); + portsc |= (ptc << 16); + printk(KERN_INFO "PTC %x portsc %08x\n", ptc, portsc); + + ehci_writel(ehci, portsc, &ehci->regs->port_status[0]); + + return count; +} + +static int ehci_testmode_init(struct ehci_hcd *ehci) +{ + struct proc_dir_entry *entry; + + entry = create_proc_read_entry("driver/ehci-ptc", 0644, NULL, + ehci_fsl_proc_read, ehci); + if (!entry) + return -ENODEV; + + entry->write_proc = ehci_fsl_proc_write; + return 0; +} +#else +static int ehci_testmode_init(struct ehci_hcd *ehci) +{ + return 0; +} +#endif /* /proc PORTSC:PTC support */ + + +/* configure so an HC device and id are always provided */ +/* always called with process context; sleeping is OK */ + +/** + * usb_hcd_fsl_probe - initialize FSL-based HCDs + * @drvier: Driver to be used for this HCD + * @pdev: USB Host Controller being probed + * Context: !in_interrupt() + * + * Allocates basic resources for this USB host controller. + * + */ +int usb_hcd_fsl_probe(const struct hc_driver *driver, + struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata; + struct usb_hcd *hcd; + struct resource *res; + int irq; + int retval; + + pr_debug("initializing FSL-SOC USB Controller\n"); + + /* Need platform data for setup */ + pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, + "No platform data for %s.\n", dev_name(&pdev->dev)); + return -ENODEV; + } + + /* + * This is a host mode driver, verify that we're supposed to be + * in host mode. + */ + if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || + (pdata->operating_mode == FSL_USB2_MPH_HOST) || + (pdata->operating_mode == FSL_USB2_DR_OTG))) { + dev_err(&pdev->dev, + "Non Host Mode configured for %s. Wrong driver linked.\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + + hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); + if (!hcd) { + retval = -ENOMEM; + goto err1; + } + +#if defined(CONFIG_USB_OTG) + if (pdata->operating_mode == FSL_USB2_DR_OTG) { + res = otg_get_resources(); + if (!res) { + dev_err(&pdev->dev, + "Found HC with no IRQ. Check %s setup!\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + irq = res[1].start; + hcd->rsrc_start = res[0].start; + hcd->rsrc_len = res[0].end - res[0].start + 1; + } else +#endif + { + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(&pdev->dev, + "Found HC with no IRQ. Check %s setup!\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + irq = res->start; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + hcd->rsrc_start = res->start; + hcd->rsrc_len = resource_size(res); + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, + driver->description)) { + dev_dbg(&pdev->dev, "controller already in use\n"); + retval = -EBUSY; + goto err2; + } + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + + if (hcd->regs == NULL) { + dev_dbg(&pdev->dev, "error mapping memory\n"); + retval = -EFAULT; + goto err3; + } + pdata->regs = hcd->regs; + + /* + * do platform specific init: check the clock, grab/config pins, etc. + */ + if (pdata->platform_init && pdata->platform_init(pdev)) { + retval = -ENODEV; + goto err3; + } + + fsl_platform_set_host_mode(hcd); + hcd->power_budget = pdata->power_budget; + + retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); + if (retval != 0) + goto err4; + + fsl_platform_set_vbus_power(pdata, 1); + +#ifdef CONFIG_USB_OTG + if (pdata->operating_mode == FSL_USB2_DR_OTG) { + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + + dbg("pdev=0x%p hcd=0x%p ehci=0x%p\n", pdev, hcd, ehci); + + ehci->transceiver = otg_get_transceiver(); + dbg("ehci->transceiver=0x%p\n", ehci->transceiver); + + if (ehci->transceiver) { + retval = otg_set_host(ehci->transceiver, + &ehci_to_hcd(ehci)->self); + if (retval) { + if (ehci->transceiver) + put_device(ehci->transceiver->dev); + goto err4; + } + } else { + printk(KERN_ERR "can't find transceiver\n"); + retval = -ENODEV; + goto err4; + } + } +#endif + + if (pdata->suspended) { + pdata->suspended = 0; + if (pdata->already_suspended) + pdata->already_suspended = 0; + } + + fsl_platform_set_ahb_burst(hcd); + ehci_testmode_init(hcd_to_ehci(hcd)); + return retval; + +err4: + iounmap(hcd->regs); +err3: + if (pdata->operating_mode != FSL_USB2_DR_OTG) + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); +err2: + usb_put_hcd(hcd); +err1: + dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); + if (pdata->platform_uninit) + pdata->platform_uninit(pdata); + return retval; +} + +/* may be called without controller electrically present */ +/* may be called with controller, bus, and devices active */ + +/** + * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs + * @dev: USB Host Controller being removed + * Context: !in_interrupt() + * + * Reverses the effect of usb_hcd_fsl_probe(). + * + */ +static void usb_hcd_fsl_remove(struct usb_hcd *hcd, + struct platform_device *pdev) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + u32 tmp; + + if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { + /* Need open clock for register access */ + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(true); + + tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); + if (tmp & PORT_PHCD) { + tmp &= ~PORT_PHCD; + ehci_writel(ehci, tmp, &ehci->regs->port_status[0]); + msleep(100); + + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(false); + } + } + + /* DDD shouldn't we turn off the power here? */ + fsl_platform_set_vbus_power(pdata, 0); + + if (ehci->transceiver) { + (void)otg_set_host(ehci->transceiver, 0); + put_device(ehci->transceiver->dev); + } else { + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + } + + usb_remove_hcd(hcd); + usb_put_hcd(hcd); + + /* + * do platform specific un-initialization: + * release iomux pins, etc. + */ + if (pdata->platform_uninit) + pdata->platform_uninit(pdata); + + iounmap(hcd->regs); +} + +static void fsl_setup_phy(struct ehci_hcd *ehci, + enum fsl_usb2_phy_modes phy_mode, int port_offset) +{ + u32 portsc; + + portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); + portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); + + switch (phy_mode) { + case FSL_USB2_PHY_ULPI: + portsc |= PORT_PTS_ULPI; + break; + case FSL_USB2_PHY_SERIAL: + portsc |= PORT_PTS_SERIAL; + break; + case FSL_USB2_PHY_UTMI_WIDE: + portsc |= PORT_PTS_PTW; + /* fall through */ + case FSL_USB2_PHY_UTMI: + portsc |= PORT_PTS_UTMI; + break; + case FSL_USB2_PHY_NONE: + break; + } + ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); +} + +/* called after powerup, by probe or system-pm "wakeup" */ +static int ehci_fsl_reinit(struct ehci_hcd *ehci) +{ + fsl_platform_usb_setup(ehci); + ehci_port_power(ehci, 0); + + return 0; +} + +/* called during probe() after chip reset completes */ +static int ehci_fsl_setup(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + int retval; + + /* EHCI registers start at offset 0x100 */ + ehci->caps = hcd->regs + 0x100; + ehci->regs = hcd->regs + 0x100 + + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); + dbg_hcs_params(ehci, "reset"); + dbg_hcc_params(ehci, "reset"); + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + + retval = ehci_halt(ehci); + if (retval) + return retval; + + /* data structure init */ + retval = ehci_init(hcd); + if (retval) + return retval; + + hcd->has_tt = 1; + + ehci->sbrn = 0x20; + + ehci_reset(ehci); + + retval = ehci_fsl_reinit(ehci); + return retval; +} + +static const struct hc_driver ehci_fsl_hc_driver = { + .description = hcd_name, + .product_desc = "Freescale On-Chip EHCI Host Controller", + .hcd_priv_size = sizeof(struct ehci_hcd), + + /* + * generic hardware linkage + */ + .irq = ehci_irq, + .flags = HCD_USB2, + + /* + * basic lifecycle operations + */ + .reset = ehci_fsl_setup, + .start = ehci_run, + .stop = ehci_stop, + .shutdown = ehci_shutdown, + + /* + * managing i/o requests and associated device resources + */ + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + .endpoint_reset = ehci_endpoint_reset, + + /* + * scheduling support + */ + .get_frame_number = ehci_get_frame, + + /* + * root hub support + */ + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, + .bus_suspend = ehci_bus_suspend, + .bus_resume = ehci_bus_resume, + .start_port_reset = ehci_start_port_reset, + .relinquish_port = ehci_relinquish_port, + .port_handed_over = ehci_port_handed_over, + + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, +}; + +static int ehci_fsl_drv_probe(struct platform_device *pdev) +{ + if (usb_disabled()) + return -ENODEV; + + /* FIXME we only want one one probe() not two */ + return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); +} + +static int ehci_fsl_drv_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + + /* FIXME we only want one one remove() not two */ + usb_hcd_fsl_remove(hcd, pdev); + return 0; +} + +#ifdef CONFIG_PM +/* suspend/resume, section 4.3 */ + +/* These routines rely on the bus (pci, platform, etc) + * to handle powerdown and wakeup, and currently also on + * transceivers that don't need any software attention to set up + * the right sort of wakeup. + * + * They're also used for turning on/off the port when doing OTG. + */ +static int ehci_fsl_drv_suspend(struct platform_device *pdev, + pm_message_t message) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 tmp, port_status; + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + + if (device_may_wakeup(&(pdev->dev))) { + /* Need open clock for register access */ + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(true); + } + +#ifdef DEBUG + u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE); + mode &= USBMODE_CM_MASK; + tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */ + + printk(KERN_DEBUG "%s('%s'): suspend=%d already_suspended=%d " + "mode=%d usbcmd %08x\n", __func__, pdata->name, + pdata->suspended, pdata->already_suspended, mode, tmp); +#endif + + /* + * If the controller is already suspended, then this must be a + * PM suspend. Remember this fact, so that we will leave the + * controller suspended at PM resume time. + */ + if (pdata->suspended) { + pr_debug("%s: already suspended, leaving early\n", __func__); + pdata->already_suspended = 1; + goto err1; + } + + pr_debug("%s: suspending...\n", __func__); + + printk(KERN_INFO "USB Host suspended\n"); + + port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); + pdev->dev.power.power_state = PMSG_SUSPEND; + + /* ignore non-host interrupts */ + clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + + /* save EHCI registers */ + pdata->pm_command = ehci_readl(ehci, &ehci->regs->command); + pdata->pm_command &= ~CMD_RUN; + pdata->pm_status = ehci_readl(ehci, &ehci->regs->status); + pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable); + pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index); + pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment); + pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list); + pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next); + pdata->pm_configured_flag = + ehci_readl(ehci, &ehci->regs->configured_flag); + pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]); + + /* clear the W1C bits */ + pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS); + + /* clear PHCD bit */ + pdata->pm_portsc &= ~PORT_PHCD; + + pdata->suspended = 1; + + if (!device_may_wakeup(&(pdev->dev))) { + /* clear PP to cut power to the port */ + tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); + tmp &= ~PORT_POWER; + ehci_writel(ehci, tmp, &ehci->regs->port_status[0]); + goto err1; + } + + tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); + + if (pdata->platform_suspend) + pdata->platform_suspend(pdata); +err1: + if (device_may_wakeup(&(pdev->dev))) { + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(false); + } + return 0; +} + +static int ehci_fsl_drv_resume(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 tmp; + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + + pr_debug("%s('%s'): suspend=%d already_suspended=%d\n", __func__, + pdata->name, pdata->suspended, pdata->already_suspended); + + /* + * If the controller was already suspended at suspend time, + * then don't resume it now. + */ + if (pdata->already_suspended) { + pr_debug("already suspended, leaving early\n"); + pdata->already_suspended = 0; + return 0; + } + + if (!pdata->suspended) { + pr_debug("not suspended, leaving early\n"); + return 0; + } + + /* If hcd is resumed by non-usb wakeup events, + * then usb clocks are still not open when come here */ + if (device_may_wakeup(&(pdev->dev))) { + /* Need open clock for register access */ + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(true); + } + + tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); + + pdata->suspended = 0; + + pr_debug("%s resuming...\n", __func__); + + /* set host mode */ + fsl_platform_set_host_mode(hcd); + + if (pdata->platform_resume) + pdata->platform_resume(pdata); + + /* restore EHCI registers */ + ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]); + ehci_writel(ehci, pdata->pm_command, &ehci->regs->command); + ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable); + ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index); + ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment); + ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list); + ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next); + ehci_writel(ehci, pdata->pm_configured_flag, + &ehci->regs->configured_flag); + + /* set bit should be done by wakeup irq routine if may wakeup */ + if (!device_may_wakeup(&(pdev->dev))) + set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + else + while (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) + msleep(1); + + pdev->dev.power.power_state = PMSG_ON; + + tmp = ehci_readl(ehci, &ehci->regs->command); + tmp |= CMD_RUN; + ehci_writel(ehci, tmp, &ehci->regs->command); + + usb_hcd_resume_root_hub(hcd); + + printk(KERN_INFO "USB Host resumed\n"); + + if (device_may_wakeup(&(pdev->dev))) { + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(false); + } + + return 0; +} +#endif /* CONFIG_USB_OTG */ + +MODULE_ALIAS("platform:fsl-ehci"); + +static struct platform_driver ehci_fsl_driver = { + .probe = ehci_fsl_drv_probe, + .remove = ehci_fsl_drv_remove, + .shutdown = usb_hcd_platform_shutdown, +#ifdef CONFIG_PM + .suspend = ehci_fsl_drv_suspend, + .resume = ehci_fsl_drv_resume, +#endif + .driver = { + .name = "fsl-ehci", + }, +}; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ohci-pci.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ohci-pci.c @@ -177,6 +177,13 @@ return 0; pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); + + /* SB800 needs pre-fetch fix */ + if ((rev >= 0x40) && (rev <= 0x4f)) { + ohci->flags |= OHCI_QUIRK_AMD_PREFETCH; + ohci_dbg(ohci, "enabled AMD prefetch quirk\n"); + } + if ((rev > 0x3b) || (rev < 0x30)) { pci_dev_put(amd_smbus_dev); amd_smbus_dev = NULL; @@ -262,6 +269,19 @@ } +static void sb800_prefetch(struct ohci_hcd *ohci, int on) +{ + struct pci_dev *pdev; + u16 misc; + + pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller); + pci_read_config_word(pdev, 0x50, &misc); + if (on == 0) + pci_write_config_word(pdev, 0x50, misc & 0xfcff); + else + pci_write_config_word(pdev, 0x50, misc | 0x0300); +} + /* List of quirks for OHCI */ static const struct pci_device_id ohci_pci_quirks[] = { { --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci-dbg.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci-dbg.c @@ -413,7 +413,8 @@ int i; struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); - dma_addr_t dma = ctx->dma + ((unsigned long)slot_ctx - (unsigned long)ctx); + dma_addr_t dma = ctx->dma + + ((unsigned long)slot_ctx - (unsigned long)ctx->bytes); int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params); xhci_dbg(xhci, "Slot Context:\n"); @@ -459,7 +460,7 @@ for (i = 0; i < last_ep_ctx; ++i) { struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i); dma_addr_t dma = ctx->dma + - ((unsigned long)ep_ctx - (unsigned long)ctx); + ((unsigned long)ep_ctx - (unsigned long)ctx->bytes); xhci_dbg(xhci, "Endpoint %02d Context:\n", i); xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n", --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci.h +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci.h @@ -581,6 +581,7 @@ /* bit 15 is Linear Stream Array */ /* Interval - period between requests to an endpoint - 125u increments. */ #define EP_INTERVAL(p) ((p & 0xff) << 16) +#define EP_INTERVAL_TO_UFRAMES(p) (1 << (((p) >> 16) & 0xff)) /* ep_info2 bitmasks */ /* @@ -589,6 +590,7 @@ */ #define FORCE_EVENT (0x1) #define ERROR_COUNT(p) (((p) & 0x3) << 1) +#define CTX_TO_EP_TYPE(p) (((p) >> 3) & 0x7) #define EP_TYPE(p) ((p) << 3) #define ISOC_OUT_EP 1 #define BULK_OUT_EP 2 @@ -601,6 +603,8 @@ /* bit 7 is Host Initiate Disable - for disabling stream selection */ #define MAX_BURST(p) (((p)&0xff) << 8) #define MAX_PACKET(p) (((p)&0xffff) << 16) +#define MAX_PACKET_MASK (0xffff << 16) +#define MAX_PACKET_DECODED(p) (((p) >> 16) & 0xffff) /** @@ -926,6 +930,12 @@ union xhci_trb *last_trb; }; +struct xhci_dequeue_state { + struct xhci_segment *new_deq_seg; + union xhci_trb *new_deq_ptr; + int new_cycle_state; +}; + struct xhci_ring { struct xhci_segment *first_seg; union xhci_trb *enqueue; @@ -952,12 +962,6 @@ u32 cycle_state; }; -struct xhci_dequeue_state { - struct xhci_segment *new_deq_seg; - union xhci_trb *new_deq_ptr; - int new_cycle_state; -}; - struct xhci_erst_entry { /* 64-bit event ring segment address */ u64 seg_addr; @@ -1058,6 +1062,9 @@ int noops_submitted; int noops_handled; int error_bitmask; + unsigned int quirks; +#define XHCI_LINK_TRB_QUIRK (1 << 0) +#define XHCI_RESET_EP_QUIRK (1 << 1) }; /* For testing purposes */ @@ -1136,6 +1143,13 @@ writel(val_hi, ptr + 1); } +static inline int xhci_link_trb_quirk(struct xhci_hcd *xhci) +{ + u32 temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); + return ((HC_VERSION(temp) == 0x95) && + (xhci->quirks & XHCI_LINK_TRB_QUIRK)); +} + /* xHCI debugging */ void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num); void xhci_print_registers(struct xhci_hcd *xhci); @@ -1158,7 +1172,12 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev); unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc); unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc); +unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index); +unsigned int xhci_last_valid_endpoint(u32 added_ctxs); void xhci_endpoint_zero(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev, struct usb_host_endpoint *ep); +void xhci_endpoint_copy(struct xhci_hcd *xhci, + struct xhci_virt_device *vdev, unsigned int ep_index); +void xhci_slot_copy(struct xhci_hcd *xhci, struct xhci_virt_device *vdev); int xhci_endpoint_init(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev, struct usb_device *udev, struct usb_host_endpoint *ep, gfp_t mem_flags); @@ -1205,8 +1224,12 @@ int slot_id, unsigned int ep_index); int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index); +int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, + int slot_id, unsigned int ep_index); int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, u32 slot_id); +int xhci_queue_evaluate_context(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, + u32 slot_id); int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id, unsigned int ep_index); void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, @@ -1215,6 +1238,12 @@ void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, unsigned int slot_id, unsigned int ep_index, struct xhci_dequeue_state *deq_state); +void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, + struct usb_device *udev, + unsigned int ep_index, struct xhci_ring *ep_ring); +void xhci_queue_config_ep_quirk(struct xhci_hcd *xhci, + unsigned int slot_id, unsigned int ep_index, + struct xhci_dequeue_state *deq_state); /* xHCI roothub code */ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-pci.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-pci.c @@ -72,6 +72,12 @@ int retval; switch (pdev->vendor) { + case PCI_VENDOR_ID_INTEL: + if (pdev->device == 0x27cc) { + ehci->broken_periodic = 1; + ehci_info(ehci, "using broken periodic workaround\n"); + } + break; case PCI_VENDOR_ID_TOSHIBA_2: /* celleb's companion chip */ if (pdev->device == 0x01b5) { --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-q-iram.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-q-iram.c @@ -0,0 +1,1345 @@ +/* + * Copyright (C) 2001-2004 by David Brownell + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#undef EHCI_NO_ERR_COUNT +static size_t g_iram_size = IRAM_TD_SIZE; + +/* this file is part of ehci-hcd.c */ + +/*-------------------------------------------------------------------------*/ + +/* + * EHCI hardware queue manipulation ... the core. QH/QTD manipulation. + * + * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd" + * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned + * buffers needed for the larger number). We use one QH per endpoint, queue + * multiple urbs (all three types) per endpoint. URBs may need several qtds. + * + * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with + * interrupts) needs careful scheduling. Performance improvements can be + * an ongoing challenge. That's in "ehci-sched.c". + * + * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs, + * or otherwise through transaction translators (TTs) in USB 2.0 hubs using + * (b) special fields in qh entries or (c) split iso entries. TTs will + * buffer low/full speed data so the host collects it at high speed. + */ + +/*-------------------------------------------------------------------------*/ +/* fill a qtd, returning how much of the buffer we were able to queue up */ +static int qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf, + size_t len, int token, int maxpacket) +{ + int i, count; + u64 addr = buf; + struct urb *urb = qtd->urb; + + if (usb_pipebulk(urb->pipe) && + (address_to_buffer(ehci, usb_pipedevice(urb->pipe)) != 2)) { + urb->use_iram = 1; + qtd->buffer_offset = (size_t) (buf - urb->transfer_dma); + token |= QTD_IOC; + if (usb_pipeout(urb->pipe)) { + addr = ehci->iram_buffer[address_to_buffer(ehci, + usb_pipedevice(urb->pipe))]; + } else if (usb_pipein(urb->pipe)) { + addr = ehci->iram_buffer[address_to_buffer(ehci, + usb_pipedevice(urb->pipe))] + + g_iram_size; + } + } else { + urb->use_iram = 0; + addr = buf; + } + len = min(g_iram_size, len); + + /* one buffer entry per 4K ... first might be short or unaligned */ + qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32) addr); + qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32) (addr >> 32)); + count = 0x1000 - (buf & 0x0fff); /* rest of that page */ + if (likely(len < count)) /* ... iff needed */ + count = len; + else { + buf += 0x1000; + buf &= ~0x0fff; + + /* per-qtd limit: from 16K to 20K (best alignment) */ + for (i = 1; count < len && i < 5; i++) { + addr = buf; + qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32) addr); + qtd->hw_buf_hi[i] = + cpu_to_hc32(ehci, (u32) (addr >> 32)); + buf += 0x1000; + if ((count + 0x1000) < len) + count += 0x1000; + else + count = len; + } + + /* short packets may only terminate transfers */ + if (count != len) + count -= (count % maxpacket); + } + qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token); + qtd->length = count; + + return count; +} + +/*-------------------------------------------------------------------------*/ + +static inline void +qh_update(struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) +{ + /* writes to an active overlay are unsafe */ + BUG_ON(qh->qh_state != QH_STATE_IDLE); + + qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma); + qh->hw_alt_next = EHCI_LIST_END(ehci); + + /* Except for control endpoints, we make hardware maintain data + * toggle (like OHCI) ... here (re)initialize the toggle in the QH, + * and set the pseudo-toggle in udev. Only usb_clear_halt() will + * ever clear it. + */ + if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) { + unsigned is_out, epnum; + + is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8)); + epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f; + if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) { + qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE); + usb_settoggle(qh->dev, epnum, is_out, 1); + } + } + + /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ + wmb(); + qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING); +} + +/* if it weren't for a common silicon quirk (writing the dummy into the qh + * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault + * recovery (including urb dequeue) would need software changes to a QH... + */ +static void qh_refresh(struct ehci_hcd *ehci, struct ehci_qh *qh) +{ + struct ehci_qtd *qtd; + + if (list_empty(&qh->qtd_list)) + qtd = qh->dummy; + else { + qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list); + /* first qtd may already be partially processed */ + if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current) + qtd = NULL; + } + + if (qtd) + qh_update(ehci, qh, qtd); +} + +/*-------------------------------------------------------------------------*/ + +static int qtd_copy_status(struct ehci_hcd *ehci, + struct urb *urb, size_t length, u32 token) +{ + int status = -EINPROGRESS; + + /* count IN/OUT bytes, not SETUP (even short packets) */ + if (likely(QTD_PID(token) != 2)) + urb->actual_length += length - QTD_LENGTH(token); + + /* don't modify error codes */ + if (unlikely(urb->unlinked)) + return status; + + /* force cleanup after short read; not always an error */ + if (unlikely(IS_SHORT_READ(token))) + status = -EREMOTEIO; + + /* serious "can't proceed" faults reported by the hardware */ + if (token & QTD_STS_HALT) { + if (token & QTD_STS_BABBLE) { + /* FIXME "must" disable babbling device's port too */ + status = -EOVERFLOW; + } else if (token & QTD_STS_MMF) { + /* fs/ls interrupt xfer missed the complete-split */ + status = -EPROTO; + } else if (token & QTD_STS_DBE) { + status = (QTD_PID(token) == 1) /* IN ? */ + ? -ENOSR /* hc couldn't read data */ + : -ECOMM; /* hc couldn't write data */ + } else if (token & QTD_STS_XACT) { + /* timeout, bad crc, wrong PID, etc; retried */ + if (QTD_CERR(token)) + status = -EPIPE; + else { + ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n", + urb->dev->devpath, + usb_pipeendpoint(urb->pipe), + usb_pipein(urb->pipe) ? "in" : "out"); + status = -EPROTO; + } + /* CERR nonzero + no errors + halt --> stall */ + } else if (QTD_CERR(token)) + status = -EPIPE; + else /* unknown */ + status = -EPROTO; + + ehci_vdbg(ehci, + "dev%d ep%d%s qtd token %08x --> status %d\n", + usb_pipedevice(urb->pipe), + usb_pipeendpoint(urb->pipe), + usb_pipein(urb->pipe) ? "in" : "out", token, status); + + /* if async CSPLIT failed, try cleaning out the TT buffer */ + if (status != -EPIPE && urb->dev->tt && !usb_pipeint(urb->pipe) + && ((token & QTD_STS_MMF) != 0 || QTD_CERR(token) == 0) + && (!ehci_is_TDI(ehci) + || urb->dev->tt->hub != + ehci_to_hcd(ehci)->self.root_hub)) { +#ifdef DEBUG + struct usb_device *tt = urb->dev->tt->hub; + dev_dbg(&tt->dev, + "clear tt buffer port %d, a%d ep%d t%08x\n", + urb->dev->ttport, urb->dev->devnum, + usb_pipeendpoint(urb->pipe), token); +#endif /* DEBUG */ + /* REVISIT ARC-derived cores don't clear the root + * hub TT buffer in this way... + */ + usb_hub_tt_clear_buffer(urb->dev, urb->pipe); + } + } + + return status; +} + +static void +ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status) +__releases(ehci->lock) __acquires(ehci->lock) +{ + if (likely(urb->hcpriv != NULL)) { + struct ehci_qh *qh = (struct ehci_qh *)urb->hcpriv; + + /* S-mask in a QH means it's an interrupt urb */ + if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) { + + /* ... update hc-wide periodic stats (for usbfs) */ + ehci_to_hcd(ehci)->self.bandwidth_int_reqs--; + } + qh_put(qh); + } + + if (unlikely(urb->unlinked)) { + COUNT(ehci->stats.unlink); + } else { + /* report non-error and short read status as zero */ + if (status == -EINPROGRESS || status == -EREMOTEIO) + status = 0; + COUNT(ehci->stats.complete); + } + +#ifdef EHCI_URB_TRACE + ehci_dbg(ehci, + "%s %s urb %p ep%d%s status %d len %d/%d\n", + __func__, urb->dev->devpath, urb, + usb_pipeendpoint(urb->pipe), + usb_pipein(urb->pipe) ? "in" : "out", + status, urb->actual_length, urb->transfer_buffer_length); +#endif + + /* complete() can reenter this HCD */ + usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); + spin_unlock(&ehci->lock); + usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status); + spin_lock(&ehci->lock); +} + +static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh); +static void unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh); + +static void intr_deschedule(struct ehci_hcd *ehci, struct ehci_qh *qh); +static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh); + +/* + * Process and free completed qtds for a qh, returning URBs to drivers. + * Chases up to qh->hw_current. Returns number of completions called, + * indicating how much "real" work we did. + */ +static unsigned qh_completions(struct ehci_hcd *ehci, struct ehci_qh *qh) +{ + struct ehci_qtd *last = NULL, *end = qh->dummy; + struct list_head *entry, *tmp; + int last_status = -EINPROGRESS; + int stopped; + unsigned count = 0; + u8 state; + __le32 halt = HALT_BIT(ehci); + __hc32 temp_hw_qtd_next = 0; + + if (unlikely(list_empty(&qh->qtd_list))) + return count; + + /* completions (or tasks on other cpus) must never clobber HALT + * till we've gone through and cleaned everything up, even when + * they add urbs to this qh's queue or mark them for unlinking. + * + * NOTE: unlinking expects to be done in queue order. + */ + state = qh->qh_state; + qh->qh_state = QH_STATE_COMPLETING; + stopped = (state == QH_STATE_IDLE); + + /* remove de-activated QTDs from front of queue. + * after faults (including short reads), cleanup this urb + * then let the queue advance. + * if queue is stopped, handles unlinks. + */ + list_for_each_safe(entry, tmp, &qh->qtd_list) { + struct ehci_qtd *qtd; + struct urb *urb; + struct ehci_qtd *qtd2; + struct urb *urb2; + + u32 token = 0; + + qtd = list_entry(entry, struct ehci_qtd, qtd_list); + urb = qtd->urb; + + /* clean up any state from previous QTD ... */ + if (last) { + if (likely(last->urb != urb)) { + ehci_urb_done(ehci, last->urb, last_status); + count++; + last_status = -EINPROGRESS; + } + ehci_qtd_free(ehci, last); + last = NULL; + } + + /* ignore urbs submitted during completions we reported */ + if (qtd == end) + break; + + /* hardware copies qtd out of qh overlay */ + rmb(); + token = hc32_to_cpu(ehci, qtd->hw_token); + + /* always clean up qtds the hc de-activated */ + if ((token & QTD_STS_ACTIVE) == 0) { + + /* on STALL, error, and short reads this urb must + * complete and all its qtds must be recycled. + */ + if ((token & QTD_STS_HALT) != 0) { + stopped = 1; + + /* magic dummy for some short reads; qh won't advance. + * that silicon quirk can kick in with this dummy too. + * + * other short reads won't stop the queue, including + * control transfers (status stage handles that) or + * most other single-qtd reads ... the queue stops if + * URB_SHORT_NOT_OK was set so the driver submitting + * the urbs could clean it up. + */ + } else if (IS_SHORT_READ(token) + && !(qtd->hw_alt_next & EHCI_LIST_END(ehci))) { + if (urb->use_iram && usb_pipein(urb->pipe)) { + if (urb->transfer_buffer == NULL) { + memcpy(phys_to_virt + (urb->transfer_dma) + + qtd->buffer_offset, + ehci-> + iram_buffer_v + [address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))] + + g_iram_size, + min(g_iram_size, + qtd->length)); + } else { + memcpy(urb->transfer_buffer + + qtd->buffer_offset, + ehci-> + iram_buffer_v + [address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))] + + g_iram_size, + min(g_iram_size, + qtd->length)); + } + } + stopped = 1; + goto halt; + } else if (urb->use_iram && (!qtd->last_one) + && usb_pipeout(urb->pipe)) { + ehci-> + iram_in_use[address_to_buffer + (ehci, + usb_pipedevice(urb->pipe))] = + 1; + qtd2 = + list_entry(tmp, struct ehci_qtd, qtd_list); + if (urb->transfer_buffer == NULL) { + memcpy(ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))], + phys_to_virt(urb->transfer_dma) + + qtd->buffer_offset + qtd->length, + min(g_iram_size, qtd2->length)); + } else { + memcpy(ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))], + urb->transfer_buffer + + qtd->buffer_offset + qtd->length, + min(g_iram_size, qtd2->length)); + } + temp_hw_qtd_next = + QTD_NEXT(ehci, qtd->hw_next) & 0xFFFFFFFE; + } else if (urb->use_iram && (qtd->last_one) + && usb_pipeout(urb->pipe)) { + urb->use_iram = 0; + qtd2 = + list_entry(tmp, struct ehci_qtd, qtd_list); + if (tmp != &qh->qtd_list) { + urb2 = qtd2->urb; + if (urb2 && urb2->use_iram == 1) { + ehci-> + iram_in_use + [address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))] = + 1; + if (urb2->transfer_buffer == + NULL) { + memcpy(ehci-> + iram_buffer_v + [address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))], + phys_to_virt + (urb2-> + transfer_dma), + min(g_iram_size, + qtd2-> + length)); + } else { + memcpy(ehci-> + iram_buffer_v + [address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))], + urb2-> + transfer_buffer, + min(g_iram_size, + qtd2-> + length)); + } + } else { + ehci-> + iram_in_use + [address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))] = + 0; + } + } else { + ehci-> + iram_in_use[address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))] + = 0; + } + temp_hw_qtd_next = + QTD_NEXT(ehci, qtd->hw_next) & 0xFFFFFFFE; + } else if (urb->use_iram && usb_pipein(urb->pipe)) { + if (urb->transfer_buffer == NULL) { + memcpy(phys_to_virt(urb->transfer_dma) + + qtd->buffer_offset, + ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))] + + g_iram_size, min(g_iram_size, + qtd->length)); + } else { + memcpy(urb->transfer_buffer + + qtd->buffer_offset, + ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice + (urb->pipe))] + + g_iram_size, min(g_iram_size, + qtd->length)); + } + temp_hw_qtd_next = + QTD_NEXT(ehci, qtd->hw_next) & 0xFFFFFFFE; + } + /* stop scanning when we reach qtds the hc is using */ + } else if (likely(!stopped + && HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) { + break; + + /* scan the whole queue for unlinks whenever it stops */ + } else { + stopped = 1; + + /* cancel everything if we halt, suspend, etc */ + if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) + last_status = -ESHUTDOWN; + + /* this qtd is active; skip it unless a previous qtd + * for its urb faulted, or its urb was canceled. + */ + else if (last_status == -EINPROGRESS && !urb->unlinked) + continue; + + /* qh unlinked; token in overlay may be most current */ + if (state == QH_STATE_IDLE + && cpu_to_hc32(ehci, qtd->qtd_dma) + == qh->hw_current) + token = hc32_to_cpu(ehci, qh->hw_token); + + /* qh unlinked; token in overlay may be most current */ + if (state == QH_STATE_IDLE + && cpu_to_hc32(ehci, qtd->qtd_dma) + == qh->hw_current) + token = hc32_to_cpu(ehci, qh->hw_token); + + /* force halt for unlinked or blocked qh, so we'll + * patch the qh later and so that completions can't + * activate it while we "know" it's stopped. + */ + if ((halt & qh->hw_token) == 0) { +halt: + qh->hw_token |= halt; + wmb(); + } + } + + /* unless we already know the urb's status, collect qtd status + * and update count of bytes transferred. in common short read + * cases with only one data qtd (including control transfers), + * queue processing won't halt. but with two or more qtds (for + * example, with a 32 KB transfer), when the first qtd gets a + * short read the second must be removed by hand. + */ + if (last_status == -EINPROGRESS) { + last_status = qtd_copy_status(ehci, urb, + qtd->length, token); + if (last_status == -EREMOTEIO + && (qtd->hw_alt_next + & EHCI_LIST_END(ehci))) + last_status = -EINPROGRESS; + } + + /* if we're removing something not at the queue head, + * patch the hardware queue pointer. + */ + + if (stopped && qtd->qtd_list.prev != &qh->qtd_list) { + last = list_entry(qtd->qtd_list.prev, + struct ehci_qtd, qtd_list); + last->hw_next = qtd->hw_next; + } + +/* remove qtd; it's recycled after possible urb completion */ + list_del(&qtd->qtd_list); + last = qtd; + } + + /* last urb's completion might still need calling */ + if (likely(last != NULL)) { + ehci_urb_done(ehci, last->urb, last_status); + count++; + ehci_qtd_free(ehci, last); + } + + /* restore original state; caller must unlink or relink */ + qh->qh_state = state; + + /* be sure the hardware's done with the qh before refreshing + * it after fault cleanup, or recovering from silicon wrongly + * overlaying the dummy qtd (which reduces DMA chatter). + */ + if ((stopped != 0) || (qh->hw_qtd_next == EHCI_LIST_END(ehci)) + && (temp_hw_qtd_next == 0)) { + switch (state) { + case QH_STATE_IDLE: + qh_refresh(ehci, qh); + break; + case QH_STATE_LINKED: + /* We won't refresh a QH that's linked (after the HC + * stopped the queue). That avoids a race: + * - HC reads first part of QH; + * - CPU updates that first part and the token; + * - HC reads rest of that QH, including token + * Result: HC gets an inconsistent image, and then + * DMAs to/from the wrong memory (corrupting it). + * + * That should be rare for interrupt transfers, + * except maybe high bandwidth ... + */ + if ((cpu_to_hc32(ehci, QH_SMASK) + & qh->hw_info2) != 0) { + intr_deschedule(ehci, qh); + (void)qh_schedule(ehci, qh); + } else + unlink_async(ehci, qh); + break; + /* otherwise, unlink already started */ + } + } + if (temp_hw_qtd_next) + qh->hw_qtd_next = temp_hw_qtd_next; + + return count; +} + +/*-------------------------------------------------------------------------*/ + +/* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */ +#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03)) +/* ... and packet size, for any kind of endpoint descriptor */ +#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff) + +/* + * reverse of qh_urb_transaction: free a list of TDs. + * used for cleanup after errors, before HC sees an URB's TDs. + */ +static void qtd_list_free(struct ehci_hcd *ehci, + struct urb *urb, struct list_head *qtd_list) +{ + struct list_head *entry, *temp; + + list_for_each_safe(entry, temp, qtd_list) { + struct ehci_qtd *qtd; + + qtd = list_entry(entry, struct ehci_qtd, qtd_list); + list_del(&qtd->qtd_list); + ehci_qtd_free(ehci, qtd); + } +} + +/* + * create a list of filled qtds for this URB; won't link into qh. + */ +static struct list_head *qh_urb_transaction(struct ehci_hcd *ehci, + struct urb *urb, + struct list_head *head, gfp_t flags) +{ + struct ehci_qtd *qtd, *qtd_prev; + dma_addr_t buf; + int len, maxpacket; + int is_input; + u32 token; + + /* + * URBs map to sequences of QTDs: one logical transaction + */ + qtd = ehci_qtd_alloc(ehci, flags); + if (unlikely(!qtd)) + return NULL; + list_add_tail(&qtd->qtd_list, head); + qtd->urb = urb; + + token = QTD_STS_ACTIVE; + token |= (EHCI_TUNE_CERR << 10); + /* for split transactions, SplitXState initialized to zero */ + + len = urb->transfer_buffer_length; + is_input = usb_pipein(urb->pipe); + if (usb_pipecontrol(urb->pipe)) { + /* SETUP pid */ + qtd_fill(ehci, qtd, urb->setup_dma, + sizeof(struct usb_ctrlrequest), + token | (2 /* "setup" */ << 8), 8); + + /* ... and always at least one more pid */ + token ^= QTD_TOGGLE; + qtd_prev = qtd; + qtd = ehci_qtd_alloc(ehci, flags); + if (unlikely(!qtd)) + goto cleanup; + qtd->urb = urb; + qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma); + list_add_tail(&qtd->qtd_list, head); + + /* for zero length DATA stages, STATUS is always IN */ + if (len == 0) + token |= (1 /* "in" */ << 8); + } + + /* + * data transfer stage: buffer setup + */ + buf = urb->transfer_dma; + + if (is_input) + token |= (1 /* "in" */ << 8); + /* else it's already initted to "out" pid (0 << 8) */ + + maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input)); + + /* + * buffer gets wrapped in one or more qtds; + * last one may be "short" (including zero len) + * and may serve as a control status ack + */ + for (;;) { + int this_qtd_len; + this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket); + if (urb->use_iram && (!qtd->buffer_offset) + && usb_pipeout(urb->pipe) + && (ehci-> + iram_in_use[address_to_buffer + (ehci, usb_pipedevice(urb->pipe))] == 0)) { + ehci-> + iram_in_use[address_to_buffer + (ehci, usb_pipedevice(urb->pipe))] = 1; + if (urb->transfer_buffer == NULL) { + memcpy(ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))], + phys_to_virt(urb->transfer_dma), + min((int)g_iram_size, len)); + } else { + memcpy(ehci-> + iram_buffer_v[address_to_buffer + (ehci, + usb_pipedevice(urb-> + pipe))], + urb->transfer_buffer, + min((int)g_iram_size, len)); + } + } + len -= this_qtd_len; + buf += this_qtd_len; + + /* + * short reads advance to a "magic" dummy instead of the next + * qtd ... that forces the queue to stop, for manual cleanup. + * (this will usually be overridden later.) + */ + if (is_input) + qtd->hw_alt_next = ehci->async->hw_alt_next; + + /* qh makes control packets use qtd toggle; maybe switch it */ + if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0) + token ^= QTD_TOGGLE; + + if (likely(len <= 0)) { + qtd->last_one = 1; + break; + } + qtd_prev = qtd; + qtd = ehci_qtd_alloc(ehci, flags); + if (unlikely(!qtd)) + goto cleanup; + qtd->urb = urb; + if (urb->use_iram) + qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma) | 0x1; + else + qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma); + + list_add_tail(&qtd->qtd_list, head); + } + + /* + * unless the caller requires manual cleanup after short reads, + * have the alt_next mechanism keep the queue running after the + * last data qtd (the only one, for control and most other cases). + */ + if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0 + || usb_pipecontrol(urb->pipe))) + qtd->hw_alt_next = EHCI_LIST_END(ehci); + + /* + * control requests may need a terminating data "status" ack; + * bulk ones may need a terminating short packet (zero length). + */ + if (likely(urb->transfer_buffer_length != 0)) { + int one_more = 0; + + if (usb_pipecontrol(urb->pipe)) { + one_more = 1; + token ^= 0x0100; /* "in" <--> "out" */ + token |= QTD_TOGGLE; /* force DATA1 */ + } else if (usb_pipebulk(urb->pipe) + && (urb->transfer_flags & URB_ZERO_PACKET) + && !(urb->transfer_buffer_length % maxpacket)) + one_more = 1; + if (one_more) { + qtd_prev = qtd; + qtd = ehci_qtd_alloc(ehci, flags); + if (unlikely(!qtd)) + goto cleanup; + qtd->urb = urb; + qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma); + list_add_tail(&qtd->qtd_list, head); + + /* never any data in such packets */ + qtd_fill(ehci, qtd, 0, 0, token, 0); + } + } + + /* by default, enable interrupt on urb completion */ + if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT))) + qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC); + return head; + +cleanup: + qtd_list_free(ehci, urb, head); + return NULL; +} + +/*-------------------------------------------------------------------------*/ + +/* Would be best to create all qh's from config descriptors, + * when each interface/altsetting is established. Unlink + * any previous qh and cancel its urbs first; endpoints are + * implicitly reset then (data toggle too). + * That'd mean updating how usbcore talks to HCDs. (2.7?) + */ + +/* + * Each QH holds a qtd list; a QH is used for everything except iso. + * + * For interrupt urbs, the scheduler must set the microframe scheduling + * mask(s) each time the QH gets scheduled. For highspeed, that's + * just one microframe in the s-mask. For split interrupt transactions + * there are additional complications: c-mask, maybe FSTNs. + */ +static struct ehci_qh *qh_make(struct ehci_hcd *ehci, + struct urb *urb, gfp_t flags) +{ + struct ehci_qh *qh = ehci_qh_alloc(ehci, flags); + u32 info1 = 0, info2 = 0; + int is_input, type; + int maxp = 0; + struct usb_tt *tt = urb->dev->tt; + + if (!qh) + return qh; + + /* + * init endpoint/device data for this QH + */ + info1 |= usb_pipeendpoint(urb->pipe) << 8; + info1 |= usb_pipedevice(urb->pipe) << 0; + + is_input = usb_pipein(urb->pipe); + type = usb_pipetype(urb->pipe); + maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input); + + /* 1024 byte maxpacket is a hardware ceiling. High bandwidth + * acts like up to 3KB, but is built from smaller packets. + */ + if (max_packet(maxp) > 1024) { + ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp)); + goto done; + } + + /* Compute interrupt scheduling parameters just once, and save. + * - allowing for high bandwidth, how many nsec/uframe are used? + * - split transactions need a second CSPLIT uframe; same question + * - splits also need a schedule gap (for full/low speed I/O) + * - qh has a polling interval + * + * For control/bulk requests, the HC or TT handles these. + */ + if (type == PIPE_INTERRUPT) { + qh->usecs = + NS_TO_US(usb_calc_bus_time + (USB_SPEED_HIGH, is_input, 0, + hb_mult(maxp) * max_packet(maxp))); + qh->start = NO_FRAME; + + if (urb->dev->speed == USB_SPEED_HIGH) { + qh->c_usecs = 0; + qh->gap_uf = 0; + + qh->period = urb->interval >> 3; + if (qh->period == 0 && urb->interval != 1) { + /* NOTE interval 2 or 4 uframes could work. + * But interval 1 scheduling is simpler, and + * includes high bandwidth. + */ + dbg("intr period %d uframes, NYET!", + urb->interval); + goto done; + } + } else { + int think_time; + + /* gap is f(FS/LS transfer times) */ + qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed, + is_input, 0, + maxp) / (125 * 1000); + + /* FIXME this just approximates SPLIT/CSPLIT times */ + if (is_input) { + qh->c_usecs = qh->usecs + HS_USECS(0); + qh->usecs = HS_USECS(1); + } else { + qh->usecs += HS_USECS(1); + qh->c_usecs = HS_USECS(0); + } + + think_time = tt ? tt->think_time : 0; + qh->tt_usecs = NS_TO_US(think_time + + usb_calc_bus_time(urb->dev-> + speed, + is_input, 0, + max_packet + (maxp))); + qh->period = urb->interval; + } + } + + /* support for tt scheduling, and access to toggles */ + qh->dev = urb->dev; + + /* using TT? */ + switch (urb->dev->speed) { + case USB_SPEED_LOW: + info1 |= (1 << 12); /* EPS "low" */ + /* FALL THROUGH */ + + case USB_SPEED_FULL: + /* EPS 0 means "full" */ + if (type != PIPE_INTERRUPT) + info1 |= (EHCI_TUNE_RL_TT << 28); + if (type == PIPE_CONTROL) { + info1 |= (1 << 27); /* for TT */ + info1 |= 1 << 14; /* toggle from qtd */ + } + info1 |= maxp << 16; + + info2 |= (EHCI_TUNE_MULT_TT << 30); + + /* Some Freescale processors have an erratum in which the + * port number in the queue head was 0..N-1 instead of 1..N. + */ + if (ehci_has_fsl_portno_bug(ehci)) + info2 |= (urb->dev->ttport - 1) << 23; + else + info2 |= urb->dev->ttport << 23; + + /* set the address of the TT; for TDI's integrated + * root hub tt, leave it zeroed. + */ + if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub) + info2 |= tt->hub->devnum << 16; + + /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */ + + break; + + case USB_SPEED_HIGH: /* no TT involved */ + info1 |= (2 << 12); /* EPS "high" */ + if (type == PIPE_CONTROL) { + info1 |= (EHCI_TUNE_RL_HS << 28); + info1 |= 64 << 16; /* usb2 fixed maxpacket */ + info1 |= 1 << 14; /* toggle from qtd */ + info2 |= (EHCI_TUNE_MULT_HS << 30); + } else if (type == PIPE_BULK) { + info1 |= (EHCI_TUNE_RL_HS << 28); + /* The USB spec says that high speed bulk endpoints + * always use 512 byte maxpacket. But some device + * vendors decided to ignore that, and MSFT is happy + * to help them do so. So now people expect to use + * such nonconformant devices with Linux too; sigh. + */ + info1 |= max_packet(maxp) << 16; + info2 |= (EHCI_TUNE_MULT_HS << 30); + use_buffer(ehci, usb_pipedevice(urb->pipe)); + } else { /* PIPE_INTERRUPT */ + info1 |= max_packet(maxp) << 16; + info2 |= hb_mult(maxp) << 30; + } + break; + default: + dbg("bogus dev %p speed %d", urb->dev, urb->dev->speed); +done: + qh_put(qh); + return NULL; + } + + /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */ + + /* init as live, toggle clear, advance to dummy */ + qh->qh_state = QH_STATE_IDLE; + qh->hw_info1 = cpu_to_hc32(ehci, info1); + qh->hw_info2 = cpu_to_hc32(ehci, info2); + usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1); + qh_refresh(ehci, qh); + return qh; +} + +/*-------------------------------------------------------------------------*/ + +/* move qh (and its qtds) onto async queue; maybe enable queue. */ + +static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh) +{ + __hc32 dma = QH_NEXT(ehci, qh->qh_dma); + struct ehci_qh *head; + + /* (re)start the async schedule? */ + head = ehci->async; + timer_action_done(ehci, TIMER_ASYNC_OFF); + if (!head->qh_next.qh) { + u32 cmd = ehci_readl(ehci, &ehci->regs->command); + + if (!(cmd & CMD_ASE)) { + /* in case a clear of CMD_ASE didn't take yet */ + (void)handshake(ehci, &ehci->regs->status, + STS_ASS, 0, 150); + cmd |= CMD_ASE | CMD_RUN; + ehci_writel(ehci, cmd, &ehci->regs->command); + ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; + /* posted write need not be known to HC yet ... */ + } + } + + /* clear halt and/or toggle; and maybe recover from silicon quirk */ + if (qh->qh_state == QH_STATE_IDLE) + qh_refresh(ehci, qh); + + /* splice right after start */ + qh->qh_next = head->qh_next; + qh->hw_next = head->hw_next; + wmb(); + + head->qh_next.qh = qh; + head->hw_next = dma; + + qh->qh_state = QH_STATE_LINKED; + /* qtd completions reported later by interrupt */ +} + +/*-------------------------------------------------------------------------*/ + +/* + * For control/bulk/interrupt, return QH with these TDs appended. + * Allocates and initializes the QH if necessary. + * Returns null if it can't allocate a QH it needs to. + * If the QH has TDs (urbs) already, that's great. + */ +static struct ehci_qh *qh_append_tds(struct ehci_hcd *ehci, + struct urb *urb, + struct list_head *qtd_list, + int epnum, void **ptr) +{ + struct ehci_qh *qh = NULL; + __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f); + + qh = (struct ehci_qh *)*ptr; + if (unlikely(qh == NULL)) { + /* can't sleep here, we have ehci->lock... */ + qh = qh_make(ehci, urb, GFP_ATOMIC); + *ptr = qh; + } + if (likely(qh != NULL)) { + struct ehci_qtd *qtd; + + if (unlikely(list_empty(qtd_list))) + qtd = NULL; + else + qtd = list_entry(qtd_list->next, struct ehci_qtd, + qtd_list); + + /* control qh may need patching ... */ + if (unlikely(epnum == 0)) { + + /* usb_reset_device() briefly reverts to address 0 */ + if (usb_pipedevice(urb->pipe) == 0) + qh->hw_info1 &= ~qh_addr_mask; + } + + /* just one way to queue requests: swap with the dummy qtd. + * only hc or qh_refresh() ever modify the overlay. + */ + if (likely(qtd != NULL)) { + struct ehci_qtd *dummy; + dma_addr_t dma; + __hc32 token; + + /* to avoid racing the HC, use the dummy td instead of + * the first td of our list (becomes new dummy). both + * tds stay deactivated until we're done, when the + * HC is allowed to fetch the old dummy (4.10.2). + */ + token = qtd->hw_token; + qtd->hw_token = HALT_BIT(ehci); + wmb(); + dummy = qh->dummy; + + dma = dummy->qtd_dma; + *dummy = *qtd; + dummy->qtd_dma = dma; + + list_del(&qtd->qtd_list); + list_add(&dummy->qtd_list, qtd_list); + __list_splice(qtd_list, qh->qtd_list.prev); + + ehci_qtd_init(ehci, qtd, qtd->qtd_dma); + qh->dummy = qtd; + + /* hc must see the new dummy at list end */ + dma = qtd->qtd_dma; + qtd = list_entry(qh->qtd_list.prev, + struct ehci_qtd, qtd_list); + if (urb->use_iram) + qtd->hw_next = QTD_NEXT(ehci, dma) | 0x1; + else + qtd->hw_next = QTD_NEXT(ehci, dma); + + /* let the hc process these next qtds */ + wmb(); + dummy->hw_token = token; + + urb->hcpriv = qh_get(qh); + } + } + return qh; +} + +/*-------------------------------------------------------------------------*/ + +static int +submit_async(struct ehci_hcd *ehci, + struct urb *urb, struct list_head *qtd_list, gfp_t mem_flags) +{ + struct ehci_qtd *qtd; + int epnum; + unsigned long flags; + struct ehci_qh *qh = NULL; + int rc; + + qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list); + epnum = urb->ep->desc.bEndpointAddress; + +#ifdef EHCI_URB_TRACE + ehci_dbg(ehci, + "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n", + __func__, urb->dev->devpath, urb, + epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out", + urb->transfer_buffer_length, qtd, urb->ep->hcpriv); +#endif + + spin_lock_irqsave(&ehci->lock, flags); + if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, + &ehci_to_hcd(ehci)->flags))) { + rc = -ESHUTDOWN; + goto done; + } + rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb); + if (unlikely(rc)) + goto done; + + qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv); + if (unlikely(qh == NULL)) { + usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); + rc = -ENOMEM; + goto done; + } + + /* Control/bulk operations through TTs don't need scheduling, + * the HC and TT handle it when the TT has a buffer ready. + */ + if (likely(qh->qh_state == QH_STATE_IDLE)) + qh_link_async(ehci, qh_get(qh)); +done: + spin_unlock_irqrestore(&ehci->lock, flags); + if (unlikely(qh == NULL)) + qtd_list_free(ehci, urb, qtd_list); + return rc; +} + +/*-------------------------------------------------------------------------*/ + +/* the async qh for the qtds being reclaimed are now unlinked from the HC */ + +static void end_unlink_async(struct ehci_hcd *ehci) +{ + struct ehci_qh *qh = ehci->reclaim; + struct ehci_qh *next; + + iaa_watchdog_done(ehci); + + qh->qh_state = QH_STATE_IDLE; + qh->qh_next.qh = NULL; + qh_put(qh); /* refcount from reclaim */ + + /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */ + next = qh->reclaim; + ehci->reclaim = next; + qh->reclaim = NULL; + + qh_completions(ehci, qh); + + if (!list_empty(&qh->qtd_list) + && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) + qh_link_async(ehci, qh); + else { + qh_put(qh); /* refcount from async list */ + + /* it's not free to turn the async schedule on/off; leave it + * active but idle for a while once it empties. + */ + if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state) + && ehci->async->qh_next.qh == NULL) + timer_action(ehci, TIMER_ASYNC_OFF); + } + + if (next) { + ehci->reclaim = NULL; + start_unlink_async(ehci, next); + } +} + +/* makes sure the async qh will become idle */ +/* caller must own ehci->lock */ + +static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh) +{ + int cmd = ehci_readl(ehci, &ehci->regs->command); + struct ehci_qh *prev; + +#ifdef DEBUG + assert_spin_locked(&ehci->lock); + if (ehci->reclaim + || (qh->qh_state != QH_STATE_LINKED + && qh->qh_state != QH_STATE_UNLINK_WAIT) + ) + BUG(); +#endif + + /* stop async schedule right now? */ + if (unlikely(qh == ehci->async)) { + /* can't get here without STS_ASS set */ + if (ehci_to_hcd(ehci)->state != HC_STATE_HALT && + !ehci->reclaim) { + /* ... and CMD_IAAD clear */ + ehci_writel(ehci, cmd & ~CMD_ASE, &ehci->regs->command); + wmb(); + /* handshake later, if we need to */ + timer_action_done(ehci, TIMER_ASYNC_OFF); + } + return; + } + + qh->qh_state = QH_STATE_UNLINK; + ehci->reclaim = qh = qh_get(qh); + + prev = ehci->async; + while (prev->qh_next.qh != qh) + prev = prev->qh_next.qh; + + prev->hw_next = qh->hw_next; + prev->qh_next = qh->qh_next; + wmb(); + + if (unlikely(ehci_to_hcd(ehci)->state == HC_STATE_HALT)) { + /* if (unlikely (qh->reclaim != 0)) + * this will recurse, probably not much + */ + end_unlink_async(ehci); + return; + } + + cmd |= CMD_IAAD; + ehci_writel(ehci, cmd, &ehci->regs->command); + (void)ehci_readl(ehci, &ehci->regs->command); + iaa_watchdog_start(ehci); +} + +/*-------------------------------------------------------------------------*/ + +static void scan_async(struct ehci_hcd *ehci) +{ + struct ehci_qh *qh; + enum ehci_timer_action action = TIMER_IO_WATCHDOG; + + if (!++(ehci->stamp)) + ehci->stamp++; + timer_action_done(ehci, TIMER_ASYNC_SHRINK); +rescan: + qh = ehci->async->qh_next.qh; + if (likely(qh != NULL)) { + do { + /* clean any finished work for this qh */ + if (!list_empty(&qh->qtd_list) + && qh->stamp != ehci->stamp) { + int temp; + + /* unlinks could happen here; completion + * reporting drops the lock. rescan using + * the latest schedule, but don't rescan + * qhs we already finished (no looping). + */ + qh = qh_get(qh); + qh->stamp = ehci->stamp; + temp = qh_completions(ehci, qh); + qh_put(qh); + if (temp != 0) + goto rescan; + } + + /* unlink idle entries, reducing HC PCI usage as well + * as HCD schedule-scanning costs. delay for any qh + * we just scanned, there's a not-unusual case that it + * doesn't stay idle for long. + * (plus, avoids some kind of re-activation race.) + */ + if (list_empty(&qh->qtd_list)) { + if (qh->stamp == ehci->stamp) + action = TIMER_ASYNC_SHRINK; + else if (!ehci->reclaim + && qh->qh_state == QH_STATE_LINKED) + start_unlink_async(ehci, qh); + } + + qh = qh->qh_next.qh; + } while (qh); + } + if (action == TIMER_ASYNC_SHRINK) + timer_action(ehci, TIMER_ASYNC_SHRINK); +} --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-mem-iram.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-mem-iram.c @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2001 by David Brownell + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software Foundation, + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* this file is part of ehci-hcd.c */ + +/*-------------------------------------------------------------------------*/ + +/* + * There's basically three types of memory: + * - data used only by the HCD ... kmalloc is fine + * - async and periodic schedules, shared by HC and HCD ... these + * need to use dma_pool or dma_alloc_coherent + * - driver buffers, read/written by HC ... single shot DMA mapped + * + * There's also "register" data (e.g. PCI or SOC), which is memory mapped. + * No memory seen by this driver is pageable. + */ + +/*-------------------------------------------------------------------------*/ + +/* Allocate the key transfer structures from the previously allocated pool */ +#include + +bool use_iram_qtd; + +struct memDesc { + u32 start; + u32 end; + struct memDesc *next; +} ; + +static u32 g_usb_pool_start; +static s32 g_usb_pool_count; +static u32 g_total_pages; +static u32 g_alignment = 32; +struct memDesc *g_allocated_desc; +static spinlock_t g_usb_sema; +static u32 g_debug_qtd_allocated; +static u32 g_debug_qH_allocated; +static int g_alloc_map; + +/*! + * usb_pool_initialize + * + * @param memPool start address of the pool + * @param poolSize memory pool size + * @param alignment alignment for example page alignmnet will be 4K + * + * @return 0 for success -1 for errors + */ +static int usb_pool_initialize(u32 memPool, u32 poolSize, u32 alignment) +{ + if (g_usb_pool_count) { + printk(KERN_INFO "usb_pool_initialize : already initialzed.\n"); + return 0; + } + + g_alignment = alignment; + if (g_alignment == 0) { + printk(KERN_INFO + "usb_pool_initialize : g_alignment can not be zero.\n"); + g_alignment = 32; + } + + g_total_pages = poolSize / g_alignment; + g_usb_pool_start = (u32) memPool; + + g_allocated_desc = kmalloc(sizeof(struct memDesc), GFP_KERNEL); + if (!g_allocated_desc) { + printk(KERN_ALERT "usb_pool_initialize : kmalloc failed \n"); + return (-1); + } + + g_allocated_desc->start = 0; + g_allocated_desc->end = 0; + g_allocated_desc->next = NULL; + + spin_lock_init(&g_usb_sema); + g_usb_pool_count++; + return (0); +} + +static void usb_pool_deinit() +{ + if (--g_usb_pool_count < 0) + g_usb_pool_count = 0; +} + +/*! + * usb_malloc + * + * @param size memory pool size + * + * @return physical address, 0 for error + */ +static u32 usb_malloc(u32 size, gfp_t mem_flags) +{ + unsigned long flags; + struct memDesc *prevDesc = NULL; + struct memDesc *nextDesc = NULL; + struct memDesc *currentDesc = NULL; + u32 pages = (size + g_alignment - 1) / g_alignment; + + if ((size == 0) || (pages > g_total_pages)) + return 0; + + currentDesc = kmalloc(sizeof(struct memDesc), mem_flags); + if (!currentDesc) { + printk(KERN_ALERT "usb_malloc: kmalloc failed \n"); + return 0; + } + + spin_lock_irqsave(&g_usb_sema, flags); + + /* Create the first Allocated descriptor */ + if (!g_allocated_desc->next) { + g_allocated_desc->next = currentDesc; + currentDesc->start = 0; + currentDesc->end = pages; + currentDesc->next = NULL; + spin_unlock_irqrestore(&g_usb_sema, flags); + return (g_usb_pool_start + currentDesc->start * g_alignment); + } + + /* Find the free spot */ + prevDesc = g_allocated_desc; + while (prevDesc->next) { + nextDesc = prevDesc->next; + if (pages <= nextDesc->start - prevDesc->end) { + currentDesc->start = prevDesc->end; + currentDesc->end = currentDesc->start + pages; + currentDesc->next = nextDesc; + prevDesc->next = currentDesc; + break; + } + prevDesc = nextDesc; + } + + /* Do not find the free spot inside the chain, append to the end */ + if (!prevDesc->next) { + if (pages > (g_total_pages - prevDesc->end)) { + spin_unlock_irqrestore(&g_usb_sema, flags); + kfree(currentDesc); + return 0; + } else { + currentDesc->start = prevDesc->end; + currentDesc->end = currentDesc->start + pages; + currentDesc->next = NULL; + prevDesc->next = currentDesc; + } + } + + spin_unlock_irqrestore(&g_usb_sema, flags); + return (g_usb_pool_start + currentDesc->start * g_alignment); +} + +/*! + * usb_free + * + * @param physical physical address try to free + * + */ +static void usb_free(u32 physical) +{ + unsigned long flags; + struct memDesc *prevDesc = NULL; + struct memDesc *nextDesc = NULL; + u32 pages = (physical - g_usb_pool_start) / g_alignment; + + /* Protect the memory pool data structures. */ + spin_lock_irqsave(&g_usb_sema, flags); + + prevDesc = g_allocated_desc; + while (prevDesc->next) { + nextDesc = prevDesc->next; + if (nextDesc->start == pages) { + prevDesc->next = nextDesc->next; + kfree(nextDesc); + break; + } + prevDesc = prevDesc->next; + } + /* All done with memory pool data structures. */ + spin_unlock_irqrestore(&g_usb_sema, flags); +} + +static int address_to_buffer(struct ehci_hcd *ehci, int address) +{ + int i; + + for (i = 0; i < IRAM_NTD; i++) { + if (ehci->usb_address[i] == address) + return i; + } + return IRAM_NTD; +} + +static void use_buffer(struct ehci_hcd *ehci, int address) +{ + int i; + + for (i = 0; i < IRAM_NTD; i++) { + if (ehci->usb_address[i] == address) + return; + } + + if (ehci->usb_address[0] == 0) { + ehci->usb_address[0] = address; + printk(KERN_INFO "usb_address[0] %x\n", address); + return; + } else if (ehci->usb_address[1] == 0) { + ehci->usb_address[1] = address; + printk(KERN_INFO "usb_address[1] %x\n", address); + return; + } else + printk(KERN_ALERT "qh_make run out of iRAM, already be used"); +} + +static u32 alloc_iram_buf(void) +{ + int i; + + for (i = 0; i < IRAM_NTD; i++) { + if (!(g_alloc_map & (1 << i))) { + g_alloc_map |= (1 << i); + return USB_IRAM_BASE_ADDR + i * (IRAM_TD_SIZE * 2); + } + } + panic("Out of IRAM buffers\n"); +} + +void free_iram_buf(u32 buf) +{ + int i = (buf - USB_IRAM_BASE_ADDR) / (IRAM_TD_SIZE * 2); + + g_alloc_map &= ~(1 << i); +} + +static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd, + dma_addr_t dma) +{ + memset(qtd, 0, sizeof *qtd); + qtd->qtd_dma = dma; + qtd->hw_token = cpu_to_le32(QTD_STS_HALT); + qtd->hw_next = EHCI_LIST_END(ehci); + qtd->hw_alt_next = EHCI_LIST_END(ehci); + INIT_LIST_HEAD(&qtd->qtd_list); +} + +static struct ehci_qtd *ehci_qtd_alloc(struct ehci_hcd *ehci, gfp_t flags) +{ + struct ehci_qtd *qtd; + dma_addr_t dma; + + if (use_iram_qtd) { + dma = usb_malloc(sizeof(struct ehci_qtd), flags); + if (dma != 0) + qtd = (struct ehci_qtd *)IO_ADDRESS(dma); + else + qtd = dma_pool_alloc(ehci->qtd_pool, flags, &dma); + } + else + qtd = dma_pool_alloc(ehci->qtd_pool, flags, &dma); + + if (qtd != NULL) { + ehci_qtd_init(ehci, qtd, dma); + ++g_debug_qtd_allocated; + } else { + panic + ("out of i-ram for qtd allocation g_debug_qtd_allocated %d \ + size%d \n", g_debug_qtd_allocated, + sizeof(struct ehci_qtd)); + } + return qtd; +} + +static inline void ehci_qtd_free(struct ehci_hcd *ehci, struct ehci_qtd *qtd) +{ + if ((qtd->qtd_dma & (USB_IRAM_BASE_ADDR & 0xFFF00000)) == + (USB_IRAM_BASE_ADDR & 0xFFF00000)) + usb_free(qtd->qtd_dma); + else + dma_pool_free(ehci->qtd_pool, qtd, qtd->qtd_dma); + --g_debug_qtd_allocated; +} + +static void qh_destroy(struct ehci_qh *qh) +{ + struct ehci_hcd *ehci = qh->ehci; + + /* clean qtds first, and know this is not linked */ + if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) { + ehci_dbg(ehci, "unused qh not empty!\n"); + BUG(); + } + if (qh->dummy) + ehci_qtd_free(ehci, qh->dummy); + int i; + for (i = 0; i < IRAM_NTD; i++) { + if (ehci->usb_address[i] == (qh->hw_info1 & 0x7F)) + ehci->usb_address[i] = 0; + } + + if ((qh->qh_dma & (USB_IRAM_BASE_ADDR & 0xFFF00000)) == + (USB_IRAM_BASE_ADDR & 0xFFF00000)) + usb_free(qh->qh_dma); + else + dma_pool_free(ehci->qh_pool, qh, qh->qh_dma); + --g_debug_qH_allocated; +} + +static struct ehci_qh *ehci_qh_alloc(struct ehci_hcd *ehci, gfp_t flags) +{ + struct ehci_qh *qh; + dma_addr_t dma; + + dma = usb_malloc(sizeof(struct ehci_qh), flags); + if (dma != 0) + qh = (struct ehci_qh *)IO_ADDRESS(dma); + else + qh = (struct ehci_qh *) + dma_pool_alloc(ehci->qh_pool, flags, &dma); + ++g_debug_qH_allocated; + if (qh == NULL) { + panic("run out of i-ram for qH allocation\n"); + return qh; + } + + memset(qh, 0, sizeof *qh); + qh->refcount = 1; + qh->ehci = ehci; + qh->qh_dma = dma; + INIT_LIST_HEAD(&qh->qtd_list); + + /* dummy td enables safe urb queuing */ + qh->dummy = ehci_qtd_alloc(ehci, flags); + if (qh->dummy == NULL) { + ehci_dbg(ehci, "no dummy td\n"); + dma_pool_free(ehci->qh_pool, qh, qh->qh_dma); + qh = NULL; + } + return qh; +} + +/* to share a qh (cpu threads, or hc) */ +static inline struct ehci_qh *qh_get(struct ehci_qh *qh) +{ + WARN_ON(!qh->refcount); + qh->refcount++; + return qh; +} + +static inline void qh_put(struct ehci_qh *qh) +{ + if (!--qh->refcount) + qh_destroy(qh); +} + +/*-------------------------------------------------------------------------*/ + +/* The queue heads and transfer descriptors are managed from pools tied + * to each of the "per device" structures. + * This is the initialisation and cleanup code. + */ + +static void ehci_mem_cleanup(struct ehci_hcd *ehci) +{ + if (ehci->async) + qh_put(ehci->async); + ehci->async = NULL; + + /* DMA consistent memory and pools */ + if (ehci->qtd_pool) + dma_pool_destroy(ehci->qtd_pool); + ehci->qtd_pool = NULL; + + if (ehci->qh_pool) { + dma_pool_destroy(ehci->qh_pool); + ehci->qh_pool = NULL; + } + + if (ehci->itd_pool) + dma_pool_destroy(ehci->itd_pool); + ehci->itd_pool = NULL; + + if (ehci->sitd_pool) + dma_pool_destroy(ehci->sitd_pool); + ehci->sitd_pool = NULL; + + if (ehci->periodic) + dma_free_coherent(ehci_to_hcd(ehci)->self.controller, + ehci->periodic_size * sizeof(u32), + ehci->periodic, ehci->periodic_dma); + ehci->periodic = NULL; + + if (ehci->iram_buffer[0]) + free_iram_buf(ehci->iram_buffer[0]); + if (ehci->iram_buffer[1]) + free_iram_buf(ehci->iram_buffer[1]); + + /* shadow periodic table */ + kfree(ehci->pshadow); + ehci->pshadow = NULL; + usb_pool_deinit(); +} + +/* remember to add cleanup code (above) if you add anything here */ +static int ehci_mem_init(struct ehci_hcd *ehci, gfp_t flags) +{ + int i; + g_usb_pool_count = 0; + g_debug_qtd_allocated = 0; + g_debug_qH_allocated = 0; + g_alloc_map = 0; + + if (cpu_is_mx37()) + use_iram_qtd = 0; + else + use_iram_qtd = 1; + + usb_pool_initialize(USB_IRAM_BASE_ADDR + IRAM_TD_SIZE * IRAM_NTD * 2, + USB_IRAM_SIZE - IRAM_TD_SIZE * IRAM_NTD * 2, 32); + + if (!ehci->iram_buffer[0]) { + ehci->iram_buffer[0] = alloc_iram_buf(); + ehci->iram_buffer_v[0] = IO_ADDRESS(ehci->iram_buffer[0]); + ehci->iram_buffer[1] = alloc_iram_buf(); + ehci->iram_buffer_v[1] = IO_ADDRESS(ehci->iram_buffer[1]); + } + + /* QTDs for control/bulk/intr transfers */ + ehci->qtd_pool = dma_pool_create("ehci_qtd", + ehci_to_hcd(ehci)->self.controller, + sizeof(struct ehci_qtd), + 32/* byte alignment (for hw parts) */ + , 4096 /* can't cross 4K */); + if (!ehci->qtd_pool) + goto fail; + + /* QHs for control/bulk/intr transfers */ + ehci->qh_pool = dma_pool_create("ehci_qh", + ehci_to_hcd(ehci)->self.controller, + sizeof(struct ehci_qh), + 32 /* byte alignment (for hw parts) */ , + 4096 /* can't cross 4K */); + if (!ehci->qh_pool) + goto fail; + + ehci->async = ehci_qh_alloc(ehci, flags); + if (!ehci->async) + goto fail; + + /* ITD for high speed ISO transfers */ + ehci->itd_pool = dma_pool_create("ehci_itd", + ehci_to_hcd(ehci)->self.controller, + sizeof(struct ehci_itd), + 32/* byte alignment (for hw parts) */ + , 4096 /* can't cross 4K */); + if (!ehci->itd_pool) + goto fail; + + /* SITD for full/low speed split ISO transfers */ + ehci->sitd_pool = dma_pool_create("ehci_sitd", + ehci_to_hcd(ehci)->self.controller, + sizeof(struct ehci_sitd), + 32/* byte alignment (for hw parts) */ + , 4096 /* can't cross 4K */); + if (!ehci->sitd_pool) + goto fail; + + ehci->periodic = (__le32 *) + dma_alloc_coherent(ehci_to_hcd(ehci)->self.controller, + ehci->periodic_size * sizeof(__le32), + &ehci->periodic_dma, 0); + + if (ehci->periodic == NULL) + goto fail; + + for (i = 0; i < ehci->periodic_size; i++) + ehci->periodic[i] = EHCI_LIST_END(ehci); + + /* software shadow of hardware table */ + ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags); + if (ehci->pshadow != NULL) + return 0; + +fail: + ehci_dbg(ehci, "couldn't init memory\n"); + ehci_mem_cleanup(ehci); + return -ENOMEM; +} --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-hub.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-hub.c @@ -151,9 +151,12 @@ } /* enable remote wakeup on all ports */ - if (hcd->self.root_hub->do_remote_wakeup) - t2 |= PORT_WAKE_BITS; - else + if (hcd->self.root_hub->do_remote_wakeup) { + if (t1 & PORT_CONNECT) + t2 |= PORT_WKOC_E|PORT_WKDISC_E; + else + t2 |= PORT_WKOC_E|PORT_WKCONN_E; + } else t2 &= ~PORT_WAKE_BITS; if (t1 != t2) { @@ -549,6 +552,37 @@ desc->wHubCharacteristics = cpu_to_le16(temp); } +#ifdef CONFIG_USB_OTG +static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + u32 status; + + if (!port) + return -EINVAL; + port--; + + /* start port reset before HNP protocol time out */ + status = readl(&ehci->regs->port_status[port]); + if (!(status & PORT_CONNECT)) + return -ENODEV; + + /* khubd will finish the reset later */ + if (ehci_is_TDI(ehci)) + writel(PORT_RESET | (status & ~(PORT_CSC | PORT_PEC + | PORT_OCC)), &ehci->regs->port_status[port]); + else + writel(PORT_RESET, &ehci->regs->port_status[port]); + + return 0; +} +#else +static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) +{ + return 0; +} +#endif /* CONFIG_USB_OTG */ + /*-------------------------------------------------------------------------*/ static int ehci_hub_control ( --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-sched.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-sched.c @@ -456,6 +456,8 @@ /* make sure ehci_work scans these */ ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index) % (ehci->periodic_size << 3); + if (unlikely(ehci->broken_periodic)) + ehci->last_periodic_enable = ktime_get_real(); return 0; } @@ -467,6 +469,16 @@ if (--ehci->periodic_sched) return 0; + if (unlikely(ehci->broken_periodic)) { + /* delay experimentally determined */ + ktime_t safe = ktime_add_us(ehci->last_periodic_enable, 1000); + ktime_t now = ktime_get_real(); + s64 delay = ktime_us_delta(safe, now); + + if (unlikely(delay > 0)) + udelay(delay); + } + /* did setting PSE not take effect yet? * takes effect only at frame boundaries... */ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-fsl.h +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-fsl.h @@ -19,6 +19,9 @@ #define _EHCI_FSL_H /* offsets for the non-ehci registers in the FSL SOC USB controller */ +#define FSL_SOC_USB_SBUSCFG 0x90 +#define FSL_SOC_USB_BURSTSIZE 0x160 +#define FSL_SOC_USB_TXFILLTUNING 0x164 #define FSL_SOC_USB_ULPIVP 0x170 #define FSL_SOC_USB_PORTSC1 0x184 #define PORT_PTS_MSK (3<<30) @@ -26,8 +29,12 @@ #define PORT_PTS_ULPI (2<<30) #define PORT_PTS_SERIAL (3<<30) #define PORT_PTS_PTW (1<<28) +#define PORT_PTS_PHCD (1<<23) #define FSL_SOC_USB_PORTSC2 0x188 #define FSL_SOC_USB_USBMODE 0x1a8 +#define USBMODE_CM_HOST (3 << 0) /* controller mode: host */ +#define USBMODE_ES (1 << 2) /* (Big) Endian Select */ + #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-hcd.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-hcd.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -289,8 +290,13 @@ static void ehci_work(struct ehci_hcd *ehci); #include "ehci-hub.c" +#ifdef CONFIG_USB_STATIC_IRAM +#include "ehci-mem-iram.c" +#include "ehci-q-iram.c" +#else #include "ehci-mem.c" #include "ehci-q.c" +#endif #include "ehci-sched.c" /*-------------------------------------------------------------------------*/ @@ -655,6 +661,7 @@ ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ msleep(5); up_write(&ehci_cf_port_reset_rwsem); + ehci->last_periodic_enable = ktime_get_real(); temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); ehci_info (ehci, @@ -1097,6 +1104,11 @@ #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver #endif +#ifdef CONFIG_USB_EHCI_ARC +#include "ehci-arc.c" +#define PLATFORM_DRIVER ehci_fsl_driver +#endif + #ifdef CONFIG_PPC_PS3 #include "ehci-ps3.c" #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ohci-q.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ohci-q.c @@ -49,9 +49,12 @@ switch (usb_pipetype (urb->pipe)) { case PIPE_ISOCHRONOUS: ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--; - if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 - && quirk_amdiso(ohci)) - quirk_amd_pll(1); + if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) { + if (quirk_amdiso(ohci)) + quirk_amd_pll(1); + if (quirk_amdprefetch(ohci)) + sb800_prefetch(ohci, 0); + } break; case PIPE_INTERRUPT: ohci_to_hcd(ohci)->self.bandwidth_int_reqs--; @@ -680,9 +683,12 @@ data + urb->iso_frame_desc [cnt].offset, urb->iso_frame_desc [cnt].length, urb, cnt); } - if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 - && quirk_amdiso(ohci)) - quirk_amd_pll(0); + if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) { + if (quirk_amdiso(ohci)) + quirk_amd_pll(0); + if (quirk_amdprefetch(ohci)) + sb800_prefetch(ohci, 1); + } periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0; break; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ohci-hcd.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ohci-hcd.c @@ -88,6 +88,7 @@ #ifdef CONFIG_PCI static void quirk_amd_pll(int state); static void amd_iso_dev_put(void); +static void sb800_prefetch(struct ohci_hcd *ohci, int on); #else static inline void quirk_amd_pll(int state) { @@ -97,6 +98,10 @@ { return; } +static inline void sb800_prefetch(struct ohci_hcd *ohci, int on) +{ + return; +} #endif --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci-hcd.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci-hcd.c @@ -22,12 +22,18 @@ #include #include +#include #include "xhci.h" #define DRIVER_AUTHOR "Sarah Sharp" #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" +/* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ +static int link_quirk; +module_param(link_quirk, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); + /* TODO: copied from ehci-hcd.c - can this be refactored? */ /* * handshake - spin reading hc until handshake completes or fails @@ -214,6 +220,12 @@ xhci_dbg(xhci, "xhci_init\n"); spin_lock_init(&xhci->lock); + if (link_quirk) { + xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n"); + xhci->quirks |= XHCI_LINK_TRB_QUIRK; + } else { + xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n"); + } retval = xhci_mem_init(xhci, GFP_KERNEL); xhci_dbg(xhci, "Finished xhci_init\n"); @@ -555,13 +567,22 @@ return 1 << (xhci_get_endpoint_index(desc) + 1); } +/* Find the flag for this endpoint (for use in the control context). Use the + * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is + * bit 1, etc. + */ +unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index) +{ + return 1 << (ep_index + 1); +} + /* Compute the last valid endpoint context index. Basically, this is the * endpoint index plus one. For slot contexts with more than valid endpoint, * we find the most significant bit set in the added contexts flags. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one. */ -static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs) +unsigned int xhci_last_valid_endpoint(u32 added_ctxs) { return fls(added_ctxs) - 1; } @@ -589,6 +610,70 @@ return 1; } +static int xhci_configure_endpoint(struct xhci_hcd *xhci, + struct usb_device *udev, struct xhci_virt_device *virt_dev, + bool ctx_change); + +/* + * Full speed devices may have a max packet size greater than 8 bytes, but the + * USB core doesn't know that until it reads the first 8 bytes of the + * descriptor. If the usb_device's max packet size changes after that point, + * we need to issue an evaluate context command and wait on it. + */ +static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id, + unsigned int ep_index, struct urb *urb) +{ + struct xhci_container_ctx *in_ctx; + struct xhci_container_ctx *out_ctx; + struct xhci_input_control_ctx *ctrl_ctx; + struct xhci_ep_ctx *ep_ctx; + int max_packet_size; + int hw_max_packet_size; + int ret = 0; + + out_ctx = xhci->devs[slot_id]->out_ctx; + ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); + hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2); + max_packet_size = urb->dev->ep0.desc.wMaxPacketSize; + if (hw_max_packet_size != max_packet_size) { + xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n"); + xhci_dbg(xhci, "Max packet size in usb_device = %d\n", + max_packet_size); + xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n", + hw_max_packet_size); + xhci_dbg(xhci, "Issuing evaluate context command.\n"); + + /* Set up the modified control endpoint 0 */ + xhci_endpoint_copy(xhci, xhci->devs[slot_id], ep_index); + in_ctx = xhci->devs[slot_id]->in_ctx; + ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); + ep_ctx->ep_info2 &= ~MAX_PACKET_MASK; + ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size); + + /* Set up the input context flags for the command */ + /* FIXME: This won't work if a non-default control endpoint + * changes max packet sizes. + */ + ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); + ctrl_ctx->add_flags = EP0_FLAG; + ctrl_ctx->drop_flags = 0; + + xhci_dbg(xhci, "Slot %d input context\n", slot_id); + xhci_dbg_ctx(xhci, in_ctx, ep_index); + xhci_dbg(xhci, "Slot %d output context\n", slot_id); + xhci_dbg_ctx(xhci, out_ctx, ep_index); + + ret = xhci_configure_endpoint(xhci, urb->dev, + xhci->devs[slot_id], true); + + /* Clean up the input context for later use by bandwidth + * functions. + */ + ctrl_ctx->add_flags = SLOT_FLAG; + } + return ret; +} + /* * non-error returns are a promise to giveback() the urb later * we drop ownership so next owner (or urb unlink) can get it @@ -600,13 +685,13 @@ int ret = 0; unsigned int slot_id, ep_index; + if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0) return -EINVAL; slot_id = urb->dev->slot_id; ep_index = xhci_get_endpoint_index(&urb->ep->desc); - spin_lock_irqsave(&xhci->lock, flags); if (!xhci->devs || !xhci->devs[slot_id]) { if (!in_interrupt()) dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n"); @@ -619,19 +704,38 @@ ret = -ESHUTDOWN; goto exit; } - if (usb_endpoint_xfer_control(&urb->ep->desc)) + if (usb_endpoint_xfer_control(&urb->ep->desc)) { + /* Check to see if the max packet size for the default control + * endpoint changed during FS device enumeration + */ + if (urb->dev->speed == USB_SPEED_FULL) { + ret = xhci_check_maxpacket(xhci, slot_id, + ep_index, urb); + if (ret < 0) + return ret; + } + /* We have a spinlock and interrupts disabled, so we must pass * atomic context to this function, which may allocate memory. */ + spin_lock_irqsave(&xhci->lock, flags); ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, slot_id, ep_index); - else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) + spin_unlock_irqrestore(&xhci->lock, flags); + } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { + spin_lock_irqsave(&xhci->lock, flags); ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, slot_id, ep_index); - else + spin_unlock_irqrestore(&xhci->lock, flags); + } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { + spin_lock_irqsave(&xhci->lock, flags); + ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, + slot_id, ep_index); + spin_unlock_irqrestore(&xhci->lock, flags); + } else { ret = -EINVAL; + } exit: - spin_unlock_irqrestore(&xhci->lock, flags); return ret; } @@ -930,6 +1034,122 @@ } } +static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, + struct usb_device *udev, struct xhci_virt_device *virt_dev) +{ + int ret; + + switch (virt_dev->cmd_status) { + case COMP_ENOMEM: + dev_warn(&udev->dev, "Not enough host controller resources " + "for new device state.\n"); + ret = -ENOMEM; + /* FIXME: can we allocate more resources for the HC? */ + break; + case COMP_BW_ERR: + dev_warn(&udev->dev, "Not enough bandwidth " + "for new device state.\n"); + ret = -ENOSPC; + /* FIXME: can we go back to the old state? */ + break; + case COMP_TRB_ERR: + /* the HCD set up something wrong */ + dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " + "add flag = 1, " + "and endpoint is not disabled.\n"); + ret = -EINVAL; + break; + case COMP_SUCCESS: + dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); + ret = 0; + break; + default: + xhci_err(xhci, "ERROR: unexpected command completion " + "code 0x%x.\n", virt_dev->cmd_status); + ret = -EINVAL; + break; + } + return ret; +} + +static int xhci_evaluate_context_result(struct xhci_hcd *xhci, + struct usb_device *udev, struct xhci_virt_device *virt_dev) +{ + int ret; + + switch (virt_dev->cmd_status) { + case COMP_EINVAL: + dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate " + "context command.\n"); + ret = -EINVAL; + break; + case COMP_EBADSLT: + dev_warn(&udev->dev, "WARN: slot not enabled for" + "evaluate context command.\n"); + case COMP_CTX_STATE: + dev_warn(&udev->dev, "WARN: invalid context state for " + "evaluate context command.\n"); + xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); + ret = -EINVAL; + break; + case COMP_SUCCESS: + dev_dbg(&udev->dev, "Successful evaluate context command\n"); + ret = 0; + break; + default: + xhci_err(xhci, "ERROR: unexpected command completion " + "code 0x%x.\n", virt_dev->cmd_status); + ret = -EINVAL; + break; + } + return ret; +} + +/* Issue a configure endpoint command or evaluate context command + * and wait for it to finish. + */ +static int xhci_configure_endpoint(struct xhci_hcd *xhci, + struct usb_device *udev, struct xhci_virt_device *virt_dev, + bool ctx_change) +{ + int ret; + int timeleft; + unsigned long flags; + + spin_lock_irqsave(&xhci->lock, flags); + if (!ctx_change) + ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx->dma, + udev->slot_id); + else + ret = xhci_queue_evaluate_context(xhci, virt_dev->in_ctx->dma, + udev->slot_id); + if (ret < 0) { + spin_unlock_irqrestore(&xhci->lock, flags); + xhci_dbg(xhci, "FIXME allocate a new ring segment\n"); + return -ENOMEM; + } + xhci_ring_cmd_db(xhci); + spin_unlock_irqrestore(&xhci->lock, flags); + + /* Wait for the configure endpoint command to complete */ + timeleft = wait_for_completion_interruptible_timeout( + &virt_dev->cmd_completion, + USB_CTRL_SET_TIMEOUT); + if (timeleft <= 0) { + xhci_warn(xhci, "%s while waiting for %s command\n", + timeleft == 0 ? "Timeout" : "Signal", + ctx_change == 0 ? + "configure endpoint" : + "evaluate context"); + /* FIXME cancel the configure endpoint command */ + return -ETIME; + } + + if (!ctx_change) + return xhci_configure_endpoint_result(xhci, udev, virt_dev); + return xhci_evaluate_context_result(xhci, udev, virt_dev); +} + /* Called after one or more calls to xhci_add_endpoint() or * xhci_drop_endpoint(). If this call fails, the USB core is expected * to call xhci_reset_bandwidth(). @@ -944,8 +1164,6 @@ { int i; int ret = 0; - int timeleft; - unsigned long flags; struct xhci_hcd *xhci; struct xhci_virt_device *virt_dev; struct xhci_input_control_ctx *ctrl_ctx; @@ -975,56 +1193,7 @@ xhci_dbg_ctx(xhci, virt_dev->in_ctx, LAST_CTX_TO_EP_NUM(slot_ctx->dev_info)); - spin_lock_irqsave(&xhci->lock, flags); - ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx->dma, - udev->slot_id); - if (ret < 0) { - spin_unlock_irqrestore(&xhci->lock, flags); - xhci_dbg(xhci, "FIXME allocate a new ring segment\n"); - return -ENOMEM; - } - xhci_ring_cmd_db(xhci); - spin_unlock_irqrestore(&xhci->lock, flags); - - /* Wait for the configure endpoint command to complete */ - timeleft = wait_for_completion_interruptible_timeout( - &virt_dev->cmd_completion, - USB_CTRL_SET_TIMEOUT); - if (timeleft <= 0) { - xhci_warn(xhci, "%s while waiting for configure endpoint command\n", - timeleft == 0 ? "Timeout" : "Signal"); - /* FIXME cancel the configure endpoint command */ - return -ETIME; - } - - switch (virt_dev->cmd_status) { - case COMP_ENOMEM: - dev_warn(&udev->dev, "Not enough host controller resources " - "for new device state.\n"); - ret = -ENOMEM; - /* FIXME: can we allocate more resources for the HC? */ - break; - case COMP_BW_ERR: - dev_warn(&udev->dev, "Not enough bandwidth " - "for new device state.\n"); - ret = -ENOSPC; - /* FIXME: can we go back to the old state? */ - break; - case COMP_TRB_ERR: - /* the HCD set up something wrong */ - dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, " - "and endpoint is not disabled.\n"); - ret = -EINVAL; - break; - case COMP_SUCCESS: - dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); - break; - default: - xhci_err(xhci, "ERROR: unexpected command completion " - "code 0x%x.\n", virt_dev->cmd_status); - ret = -EINVAL; - break; - } + ret = xhci_configure_endpoint(xhci, udev, virt_dev, false); if (ret) { /* Callee should call reset_bandwidth() */ return ret; @@ -1075,6 +1244,75 @@ xhci_zero_in_ctx(xhci, virt_dev); } +void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, + unsigned int slot_id, unsigned int ep_index, + struct xhci_dequeue_state *deq_state) +{ + struct xhci_container_ctx *in_ctx; + struct xhci_input_control_ctx *ctrl_ctx; + struct xhci_ep_ctx *ep_ctx; + u32 added_ctxs; + dma_addr_t addr; + + xhci_endpoint_copy(xhci, xhci->devs[slot_id], ep_index); + in_ctx = xhci->devs[slot_id]->in_ctx; + ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); + addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg, + deq_state->new_deq_ptr); + if (addr == 0) { + xhci_warn(xhci, "WARN Cannot submit config ep after " + "reset ep command\n"); + xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n", + deq_state->new_deq_seg, + deq_state->new_deq_ptr); + return; + } + ep_ctx->deq = addr | deq_state->new_cycle_state; + + xhci_slot_copy(xhci, xhci->devs[slot_id]); + + ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); + added_ctxs = xhci_get_endpoint_flag_from_index(ep_index); + ctrl_ctx->add_flags = added_ctxs | SLOT_FLAG; + ctrl_ctx->drop_flags = added_ctxs; + + xhci_dbg(xhci, "Slot ID %d Input Context:\n", slot_id); + xhci_dbg_ctx(xhci, in_ctx, ep_index); +} + +void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, + struct usb_device *udev, + unsigned int ep_index, struct xhci_ring *ep_ring) +{ + struct xhci_dequeue_state deq_state; + + xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n"); + /* We need to move the HW's dequeue pointer past this TD, + * or it will attempt to resend it on the next doorbell ring. + */ + xhci_find_new_dequeue_state(xhci, udev->slot_id, + ep_index, ep_ring->stopped_td, + &deq_state); + + /* HW with the reset endpoint quirk will use the saved dequeue state to + * issue a configure endpoint command later. + */ + if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { + xhci_dbg(xhci, "Queueing new dequeue state\n"); + xhci_queue_new_dequeue_state(xhci, ep_ring, + udev->slot_id, + ep_index, &deq_state); + } else { + /* Better hope no one uses the input context between now and the + * reset endpoint completion! + */ + xhci_dbg(xhci, "Setting up input context for " + "configure endpoint command\n"); + xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id, + ep_index, &deq_state); + } +} + /* Deal with stalled endpoints. The core should have sent the control message * to clear the halt condition. However, we need to make the xHCI hardware * reset its sequence number, since a device will expect a sequence number of @@ -1089,7 +1327,6 @@ unsigned int ep_index; unsigned long flags; int ret; - struct xhci_dequeue_state deq_state; struct xhci_ring *ep_ring; xhci = hcd_to_xhci(hcd); @@ -1106,6 +1343,10 @@ ep->desc.bEndpointAddress); return; } + if (usb_endpoint_xfer_control(&ep->desc)) { + xhci_dbg(xhci, "Control endpoint stall already handled.\n"); + return; + } xhci_dbg(xhci, "Queueing reset endpoint command\n"); spin_lock_irqsave(&xhci->lock, flags); @@ -1116,16 +1357,7 @@ * command. Better hope that last command worked! */ if (!ret) { - xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n"); - /* We need to move the HW's dequeue pointer past this TD, - * or it will attempt to resend it on the next doorbell ring. - */ - xhci_find_new_dequeue_state(xhci, udev->slot_id, - ep_index, ep_ring->stopped_td, &deq_state); - xhci_dbg(xhci, "Queueing new dequeue state\n"); - xhci_queue_new_dequeue_state(xhci, ep_ring, - udev->slot_id, - ep_index, &deq_state); + xhci_cleanup_stalled_ring(xhci, udev, ep_index, ep_ring); kfree(ep_ring->stopped_td); xhci_ring_cmd_db(xhci); } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci.h +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci.h @@ -118,6 +118,7 @@ unsigned stamp; unsigned random_frame; unsigned long next_statechange; + ktime_t last_periodic_enable; u32 command; /* SILICON QUIRKS */ @@ -126,6 +127,7 @@ unsigned big_endian_mmio:1; unsigned big_endian_desc:1; unsigned has_amcc_usb23:1; + unsigned broken_periodic:1; /* required for usb32 quirk */ #define OHCI_CTRL_HCFS (3 << 6) @@ -138,6 +140,18 @@ u8 sbrn; /* packed release number */ + /* + * OTG controllers and transceivers need software interaction; + * other external transceivers should be software-transparent + */ + struct otg_transceiver *transceiver; +#ifdef CONFIG_USB_STATIC_IRAM + u32 iram_buffer[2]; + u32 iram_buffer_v[2]; + int iram_in_use[2]; + int usb_address[2]; +#endif + /* irq statistics */ #ifdef EHCI_STATS struct ehci_stats stats; @@ -240,6 +254,10 @@ struct list_head qtd_list; /* sw qtd list */ struct urb *urb; /* qtd's urb */ size_t length; /* length of buffer */ +#ifdef CONFIG_USB_STATIC_IRAM + size_t buffer_offset; + int last_one; +#endif } __attribute__ ((aligned (32))); /* mask NakCnt+T in qh->hw_alt_next */ @@ -710,6 +728,10 @@ #define STUB_DEBUG_FILES #endif /* DEBUG */ +#ifdef CONFIG_USB_STATIC_IRAM +#define IRAM_TD_SIZE 1024 /* size of 1 qTD's buffer */ +#define IRAM_NTD 2 /* number of TDs in IRAM */ +#endif /*-------------------------------------------------------------------------*/ #endif /* __LINUX_EHCI_HCD_H */ --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/sl811-hcd.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/sl811-hcd.c @@ -719,8 +719,12 @@ /* port status seems weird until after reset, so * force the reset and make khubd clean up later. */ - sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) - | (1 << USB_PORT_FEAT_CONNECTION); + if (sl811->stat_insrmv & 1) + sl811->port1 |= 1 << USB_PORT_FEAT_CONNECTION; + else + sl811->port1 &= ~(1 << USB_PORT_FEAT_CONNECTION); + + sl811->port1 |= 1 << USB_PORT_FEAT_C_CONNECTION; } else if (irqstat & SL11H_INTMASK_RD) { if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) { --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/xhci-pci.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/xhci-pci.c @@ -24,6 +24,10 @@ #include "xhci.h" +/* Device for a quirk */ +#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 +#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 + static const char hcd_name[] = "xhci_hcd"; /* called after powerup, by probe or system-pm "wakeup" */ @@ -62,6 +66,15 @@ xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params); xhci_print_registers(xhci); + /* Look for vendor-specific quirks */ + if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && + pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && + pdev->revision == 0x0) { + xhci->quirks |= XHCI_RESET_EP_QUIRK; + xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure" + " endpoint cmd after reset endpoint\n"); + } + /* Make sure the HC is halted. */ retval = xhci_halt(xhci); if (retval) --- linux-fsl-imx51-2.6.31.orig/drivers/usb/host/ehci-q.c +++ linux-fsl-imx51-2.6.31/drivers/usb/host/ehci-q.c @@ -475,8 +475,20 @@ * we must clear the TT buffer (11.17.5). */ if (unlikely(last_status != -EINPROGRESS && - last_status != -EREMOTEIO)) - ehci_clear_tt_buffer(ehci, qh, urb, token); + last_status != -EREMOTEIO)) { + /* The TT's in some hubs malfunction when they + * receive this request following a STALL (they + * stop sending isochronous packets). Since a + * STALL can't leave the TT buffer in a busy + * state (if you believe Figures 11-48 - 11-51 + * in the USB 2.0 spec), we won't clear the TT + * buffer in this case. Strictly speaking this + * is a violation of the spec. + */ + if (last_status != -EPIPE) + ehci_clear_tt_buffer(ehci, qh, urb, + token); + } } /* if we're removing something not at the queue head, --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/driver.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/driver.c @@ -976,6 +976,11 @@ return status; } +#ifdef CONFIG_X86_LPIA +struct usb_hub; +void hub_port_logical_disconnect(struct usb_hub *hub, int port1); +#endif + /* Caller has locked intf's usb_device's pm_mutex */ static int usb_resume_interface(struct usb_device *udev, struct usb_interface *intf, pm_message_t msg, int reset_resume) @@ -1015,9 +1020,19 @@ dev_err(&intf->dev, "%s error %d\n", "reset_resume", status); } else { +#ifdef CONFIG_X86_LPIA + struct usb_device *udev = interface_to_usbdev(intf); + struct usb_device *pdev = udev->parent; +#endif intf->needs_binding = 1; dev_warn(&intf->dev, "no %s for driver %s?\n", "reset_resume", driver->name); +#ifdef CONFIG_X86_LPIA + if (pdev) { + struct usb_hub *phub = usb_get_intfdata(pdev->actconfig->interface[0]); + hub_port_logical_disconnect(phub, udev->portnum); + } +#endif } } else { if (driver->resume) { --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/hcd.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/hcd.c @@ -40,6 +40,7 @@ #include #include +#include #include "usb.h" #include "hcd.h" @@ -117,6 +118,8 @@ return (udev->parent == NULL); } +extern int usb_host_wakeup_irq(struct device *wkup_dev); +extern void usb_host_set_wakeup(struct device *wkup_dev, bool para); /*-------------------------------------------------------------------------*/ /* @@ -1873,6 +1876,7 @@ irqreturn_t usb_hcd_irq (int irq, void *__hcd) { struct usb_hcd *hcd = __hcd; + struct fsl_usb2_platform_data *pdata; unsigned long flags; irqreturn_t rc; @@ -1882,8 +1886,23 @@ */ local_irq_save(flags); - if (unlikely(hcd->state == HC_STATE_HALT || - !test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))) { + if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { + /* Need open clock for register access */ + pdata = hcd->self.controller->platform_data; + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(true); + + /* if receive a remote wakeup interrrupt after suspend */ + if (usb_host_wakeup_irq(hcd->self.controller)) { + /* disable remote wake up irq */ + usb_host_set_wakeup(hcd->self.controller, false); + + set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + hcd->driver->irq(hcd); + rc = IRQ_HANDLED; + } else + rc = IRQ_NONE; + } else if (unlikely(hcd->state == HC_STATE_HALT)) { rc = IRQ_NONE; } else if (hcd->driver->irq(hcd) == IRQ_NONE) { rc = IRQ_NONE; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/config.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/config.c @@ -105,7 +105,7 @@ ep->ss_ep_comp->extralen = i; buffer += i; size -= i; - retval = buffer - buffer_start + i; + retval = buffer - buffer_start; if (num_skipped > 0) dev_dbg(ddev, "skipped %d descriptor%s after %s\n", num_skipped, plural(num_skipped), --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/hub.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/hub.c @@ -37,6 +37,16 @@ #endif #endif +#ifdef CONFIG_ARCH_STMP3XXX +#define STMP3XXX_USB_HOST_HACK +#endif + +#ifdef STMP3XXX_USB_HOST_HACK +#include +#include +#include +#endif + struct usb_hub { struct device *intfdev; /* the "interface" device */ struct usb_device *hdev; @@ -439,7 +449,7 @@ static inline int hub_clear_tt_buffer (struct usb_device *hdev, u16 devinfo, u16 tt) { - return usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), + return usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), HUB_CLEAR_TT_BUFFER, USB_RT_PORT, devinfo, tt, NULL, 0, 1000); } @@ -613,7 +623,7 @@ * time later khubd will disconnect() any existing usb_device on the port * and will re-enumerate if there actually is a device attached. */ -static void hub_port_logical_disconnect(struct usb_hub *hub, int port1) +void hub_port_logical_disconnect(struct usb_hub *hub, int port1) { dev_dbg(hub->intfdev, "logical disconnect on port %d\n", port1); hub_port_disable(hub, port1, 1); @@ -630,6 +640,7 @@ set_bit(port1, hub->change_bits); kick_khubd(hub); } +EXPORT_SYMBOL(hub_port_logical_disconnect); enum hub_activation_type { HUB_INIT, HUB_INIT2, HUB_INIT3, @@ -1160,6 +1171,11 @@ return -E2BIG; } + /* Defaultly disable autosuspend for hub and reley on sys + * to enable it. + */ + hdev->autosuspend_disabled = 1; + #ifdef CONFIG_USB_OTG_BLACKLIST_HUB if (hdev->parent) { dev_warn(&intf->dev, "ignoring external hub\n"); @@ -2696,6 +2712,19 @@ break; } } + +#ifdef STMP3XXX_USB_HOST_HACK + { /*Must enable HOSTDISCONDETECT after second reset*/ + if (port1 == 1) { + if (udev->speed == USB_SPEED_HIGH) { + stmp3xxx_setl( + BM_USBPHY_CTRL_ENHOSTDISCONDETECT, + REGS_USBPHY_BASE + HW_USBPHY_CTRL); + } + } + } +#endif + if (retval) goto fail; @@ -2823,6 +2852,35 @@ "port %d, status %04x, change %04x, %s\n", port1, portstatus, portchange, portspeed (portstatus)); +#ifdef STMP3XXX_USB_HOST_HACK + { + /* + * FIXME: the USBPHY of STMP3xxx SoC has bug. The usb port power + * is never enabled during standard ehci reset procedure if the + * external device once passed plug/unplug procedure. This work- + * around resets and reinitiates USBPHY before the ehci port reset + * sequence started. + */ + struct device *dev = hcd->self.controller; + struct fsl_usb2_platform_data *pdata; + + pdata = (struct fsl_usb2_platform_data *)dev->platform_data; + if (dev->parent && dev->type) { + if (port1 == 1 && pdata->platform_init) + pdata->platform_init(NULL); + } + if (port1 == 1) { + if (!(portstatus&USB_PORT_STAT_CONNECTION)) { + /* Must clear HOSTDISCONDETECT when disconnect*/ + stmp3xxx_clearl( + BM_USBPHY_CTRL_ENHOSTDISCONDETECT, + REGS_USBPHY_BASE + HW_USBPHY_CTRL); + } + } + } +#endif + + if (hub->has_indicators) { set_port_led(hub, port1, HUB_LED_AUTO); hub->indicator[port1-1] = INDICATOR_AUTO; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/usb.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/usb.c @@ -132,7 +132,7 @@ struct find_interface_arg { int minor; - struct usb_interface *interface; + struct device_driver *drv; }; static int __find_interface(struct device *dev, void *data) @@ -143,12 +143,10 @@ if (!is_usb_interface(dev)) return 0; + if (dev->driver != arg->drv) + return 0; intf = to_usb_interface(dev); - if (intf->minor != -1 && intf->minor == arg->minor) { - arg->interface = intf; - return 1; - } - return 0; + return intf->minor == arg->minor; } /** @@ -156,21 +154,24 @@ * @drv: the driver whose current configuration is considered * @minor: the minor number of the desired device * - * This walks the driver device list and returns a pointer to the interface - * with the matching minor. Note, this only works for devices that share the - * USB major number. + * This walks the bus device list and returns a pointer to the interface + * with the matching minor and driver. Note, this only works for devices + * that share the USB major number. */ struct usb_interface *usb_find_interface(struct usb_driver *drv, int minor) { struct find_interface_arg argb; - int retval; + struct device *dev; argb.minor = minor; - argb.interface = NULL; - /* eat the error, it will be in argb.interface */ - retval = driver_for_each_device(&drv->drvwrap.driver, NULL, &argb, - __find_interface); - return argb.interface; + argb.drv = &drv->drvwrap.driver; + + dev = bus_find_device(&usb_bus_type, NULL, &argb, __find_interface); + + /* Drop reference count from bus_find_device */ + put_device(dev); + + return dev ? to_usb_interface(dev) : NULL; } EXPORT_SYMBOL_GPL(usb_find_interface); --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/quirks.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/quirks.c @@ -74,6 +74,10 @@ /* INTEL VALUE SSD */ { USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME }, +#ifdef CONFIG_X86_LPIA + /* ASIX Ethernet Device */ + { USB_DEVICE(0x0b95, 0x1720), .driver_info = USB_QUIRK_RESET_RESUME }, +#endif { } /* terminating entry must be last */ }; --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/generic.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/generic.c @@ -20,6 +20,8 @@ #include #include "usb.h" #include "hcd.h" +#include +#include static inline const char *plural(int n) { @@ -190,20 +192,40 @@ #ifdef CONFIG_PM +extern void usb_host_set_wakeup(struct device *wkup_dev, bool para); static int generic_suspend(struct usb_device *udev, pm_message_t msg) { int rc; + u32 temp; /* Normal USB devices suspend through their upstream port. * Root hubs don't have upstream ports to suspend, * so we have to shut down their downstream HC-to-USB * interfaces manually by doing a bus (or "global") suspend. */ - if (!udev->parent) + if (!udev->parent) { + struct usb_hcd *hcd = + container_of(udev->bus, struct usb_hcd, self); + struct fsl_usb2_platform_data *pdata; + pdata = hcd->self.controller->platform_data; + rc = hcd_bus_suspend(udev, msg); + if (device_may_wakeup(hcd->self.controller)) { + clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); + /* enable remote wake up irq */ + usb_host_set_wakeup(hcd->self.controller, true); + + /* Put PHY into low power mode */ + temp = readl(hcd->regs + 0x184); + writel(temp | (1 << 23), (hcd->regs + 0x184)); + + if (pdata->usb_clock_for_pm) + pdata->usb_clock_for_pm(false); + } /* Non-root devices don't need to do anything for FREEZE or PRETHAW */ - else if (msg.event == PM_EVENT_FREEZE || msg.event == PM_EVENT_PRETHAW) + } else if (msg.event == PM_EVENT_FREEZE || + msg.event == PM_EVENT_PRETHAW) rc = 0; else rc = usb_port_suspend(udev, msg); @@ -214,15 +236,23 @@ static int generic_resume(struct usb_device *udev, pm_message_t msg) { int rc; + u32 temp; /* Normal USB devices resume/reset through their upstream port. * Root hubs don't have upstream ports to resume or reset, * so we have to start up their downstream HC-to-USB * interfaces manually by doing a bus (or "global") resume. */ - if (!udev->parent) + if (!udev->parent) { + struct usb_hcd *hcd = + container_of(udev->bus, struct usb_hcd, self); + + if (device_may_wakeup(hcd->self.controller)) { + temp = readl(hcd->regs + 0x184); + writel(temp & (~(1 << 23)), (hcd->regs + 0x184)); + } rc = hcd_bus_resume(udev, msg); - else + } else rc = usb_port_resume(udev, msg); return rc; } --- linux-fsl-imx51-2.6.31.orig/drivers/usb/core/devio.c +++ linux-fsl-imx51-2.6.31/drivers/usb/core/devio.c @@ -1262,14 +1262,11 @@ } } - free_async(as); - if (put_user(addr, (void __user * __user *)arg)) return -EFAULT; return 0; err_out: - free_async(as); return -EFAULT; } @@ -1299,8 +1296,11 @@ static int proc_reapurb(struct dev_state *ps, void __user *arg) { struct async *as = reap_as(ps); - if (as) - return processcompl(as, (void __user * __user *)arg); + if (as) { + int retval = processcompl(as, (void __user * __user *)arg); + free_async(as); + return retval; + } if (signal_pending(current)) return -EINTR; return -EIO; @@ -1308,11 +1308,16 @@ static int proc_reapurbnonblock(struct dev_state *ps, void __user *arg) { + int retval; struct async *as; - if (!(as = async_getcompleted(ps))) - return -EAGAIN; - return processcompl(as, (void __user * __user *)arg); + as = async_getcompleted(ps); + retval = -EAGAIN; + if (as) { + retval = processcompl(as, (void __user * __user *)arg); + free_async(as); + } + return retval; } #ifdef CONFIG_COMPAT @@ -1385,7 +1390,6 @@ } } - free_async(as); if (put_user(ptr_to_compat(addr), (u32 __user *)arg)) return -EFAULT; return 0; @@ -1394,8 +1398,11 @@ static int proc_reapurb_compat(struct dev_state *ps, void __user *arg) { struct async *as = reap_as(ps); - if (as) - return processcompl_compat(as, (void __user * __user *)arg); + if (as) { + int retval = processcompl_compat(as, (void __user * __user *)arg); + free_async(as); + return retval; + } if (signal_pending(current)) return -EINTR; return -EIO; @@ -1403,11 +1410,16 @@ static int proc_reapurbnonblock_compat(struct dev_state *ps, void __user *arg) { + int retval; struct async *as; - if (!(as = async_getcompleted(ps))) - return -EAGAIN; - return processcompl_compat(as, (void __user * __user *)arg); + retval = -EAGAIN; + as = async_getcompleted(ps); + if (as) { + retval = processcompl_compat(as, (void __user * __user *)arg); + free_async(as); + } + return retval; } #endif --- linux-fsl-imx51-2.6.31.orig/drivers/usb/musb/musb_gadget_ep0.c +++ linux-fsl-imx51-2.6.31/drivers/usb/musb/musb_gadget_ep0.c @@ -199,7 +199,6 @@ static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req) { musb_g_giveback(&musb->endpoints[0].ep_in, req, 0); - musb->ep0_state = MUSB_EP0_STAGE_SETUP; } /* @@ -647,7 +646,7 @@ musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; break; default: - ERR("SetupEnd came in a wrong ep0stage %s", + ERR("SetupEnd came in a wrong ep0stage %s\n", decode_ep0stage(musb->ep0_state)); } csr = musb_readw(regs, MUSB_CSR0); @@ -770,12 +769,18 @@ handled = service_zero_data_request( musb, &setup); + /* + * We're expecting no data in any case, so + * always set the DATAEND bit -- doing this + * here helps avoid SetupEnd interrupt coming + * in the idle stage when we're stalling... + */ + musb->ackpend |= MUSB_CSR0_P_DATAEND; + /* status stage might be immediate */ - if (handled > 0) { - musb->ackpend |= MUSB_CSR0_P_DATAEND; + if (handled > 0) musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; - } break; /* sequence #1 (IN to host), includes GET_STATUS --- linux-fsl-imx51-2.6.31.orig/drivers/usb/musb/musb_gadget.c +++ linux-fsl-imx51-2.6.31/drivers/usb/musb/musb_gadget.c @@ -4,6 +4,7 @@ * Copyright 2005 Mentor Graphics Corporation * Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2006-2007 Nokia Corporation + * Copyright (C) 2009 MontaVista Software, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -436,14 +437,6 @@ csr |= MUSB_TXCSR_P_WZC_BITS; csr &= ~MUSB_TXCSR_P_SENTSTALL; musb_writew(epio, MUSB_TXCSR, csr); - if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) { - dma->status = MUSB_DMA_STATUS_CORE_ABORT; - musb->dma_controller->channel_abort(dma); - } - - if (request) - musb_g_giveback(musb_ep, request, -EPIPE); - break; } @@ -582,15 +575,25 @@ */ static void rxstate(struct musb *musb, struct musb_request *req) { - u16 csr = 0; const u8 epnum = req->epnum; struct usb_request *request = &req->request; struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out; void __iomem *epio = musb->endpoints[epnum].regs; unsigned fifo_count = 0; u16 len = musb_ep->packet_sz; + u16 csr = musb_readw(epio, MUSB_RXCSR); - csr = musb_readw(epio, MUSB_RXCSR); + /* We shouldn't get here while DMA is active, but we do... */ + if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) { + DBG(4, "DMA pending...\n"); + return; + } + + if (csr & MUSB_RXCSR_P_SENDSTALL) { + DBG(5, "%s stalling, RXCSR %04x\n", + musb_ep->end_point.name, csr); + return; + } if (is_cppi_enabled() && musb_ep->dma) { struct dma_controller *c = musb->dma_controller; @@ -761,19 +764,10 @@ csr, dma ? " (dma)" : "", request); if (csr & MUSB_RXCSR_P_SENTSTALL) { - if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) { - dma->status = MUSB_DMA_STATUS_CORE_ABORT; - (void) musb->dma_controller->channel_abort(dma); - request->actual += musb_ep->dma->actual_len; - } - csr |= MUSB_RXCSR_P_WZC_BITS; csr &= ~MUSB_RXCSR_P_SENTSTALL; musb_writew(epio, MUSB_RXCSR, csr); - - if (request) - musb_g_giveback(musb_ep, request, -EPIPE); - goto done; + return; } if (csr & MUSB_RXCSR_P_OVERRUN) { @@ -795,7 +789,7 @@ DBG((csr & MUSB_RXCSR_DMAENAB) ? 4 : 1, "%s busy, csr %04x\n", musb_ep->end_point.name, csr); - goto done; + return; } if (dma && (csr & MUSB_RXCSR_DMAENAB)) { @@ -826,22 +820,15 @@ if ((request->actual < request->length) && (musb_ep->dma->actual_len == musb_ep->packet_sz)) - goto done; + return; #endif musb_g_giveback(musb_ep, request, 0); request = next_request(musb_ep); if (!request) - goto done; - - /* don't start more i/o till the stall clears */ - musb_ep_select(mbase, epnum); - csr = musb_readw(epio, MUSB_RXCSR); - if (csr & MUSB_RXCSR_P_SENDSTALL) - goto done; + return; } - /* analyze request if the ep is hot */ if (request) rxstate(musb, to_musb_request(request)); @@ -849,8 +836,6 @@ DBG(3, "packet waiting for %s%s request\n", musb_ep->desc ? "" : "inactive ", musb_ep->end_point.name); - -done: return; } @@ -1244,7 +1229,7 @@ void __iomem *mbase; unsigned long flags; u16 csr; - struct musb_request *request = NULL; + struct musb_request *request; int status = 0; if (!ep) @@ -1260,24 +1245,29 @@ musb_ep_select(mbase, epnum); - /* cannot portably stall with non-empty FIFO */ request = to_musb_request(next_request(musb_ep)); - if (value && musb_ep->is_in) { - csr = musb_readw(epio, MUSB_TXCSR); - if (csr & MUSB_TXCSR_FIFONOTEMPTY) { - DBG(3, "%s fifo busy, cannot halt\n", ep->name); - spin_unlock_irqrestore(&musb->lock, flags); - return -EAGAIN; + if (value) { + if (request) { + DBG(3, "request in progress, cannot halt %s\n", + ep->name); + status = -EAGAIN; + goto done; + } + /* Cannot portably stall with non-empty FIFO */ + if (musb_ep->is_in) { + csr = musb_readw(epio, MUSB_TXCSR); + if (csr & MUSB_TXCSR_FIFONOTEMPTY) { + DBG(3, "FIFO busy, cannot halt %s\n", ep->name); + status = -EAGAIN; + goto done; + } } - } /* set/clear the stall and toggle bits */ DBG(2, "%s: %s stall\n", ep->name, value ? "set" : "clear"); if (musb_ep->is_in) { csr = musb_readw(epio, MUSB_TXCSR); - if (csr & MUSB_TXCSR_FIFONOTEMPTY) - csr |= MUSB_TXCSR_FLUSHFIFO; csr |= MUSB_TXCSR_P_WZC_BITS | MUSB_TXCSR_CLRDATATOG; if (value) @@ -1300,14 +1290,13 @@ musb_writew(epio, MUSB_RXCSR, csr); } -done: - /* maybe start the first request in the queue */ if (!musb_ep->busy && !value && request) { DBG(3, "restarting the request\n"); musb_ep_restart(musb, request); } +done: spin_unlock_irqrestore(&musb->lock, flags); return status; } --- linux-fsl-imx51-2.6.31.orig/debian/control.stub +++ linux-fsl-imx51-2.6.31/debian/control.stub @@ -0,0 +1,48 @@ +Source: linux-fsl-imx51 +Section: devel +Priority: optional +Maintainer: Ubuntu Kernel Team +Standards-Version: 3.6.1 +Build-Depends: debhelper (>= 3), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync +Build-Depends-Indep: xmlto, docbook-utils, gs, transfig, bzip2, sharutils +Build-Conflicts: findutils (= 4.4.1-1ubuntu1) +Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-karmic.git + + +Package: linux-image-2.6.31-612-imx51 +Architecture: armel +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda +Conflicts: hotplug (<< 0.0.20040105-1) +Recommends: flash-kernel +Suggests: fdutils, linux-fsl-imx51-doc-2.6.31 | linux-fsl-imx51-source-2.6.31 +Description: Linux kernel image for version 2.6.31 on I.MX51-based systems + This package contains the Linux kernel image for version 2.6.31 on + I.MX51-based systems. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports I.MX51 processors. + . + Babbage boards + . + You likely do not want to install this package directly. Instead, install + the linux-imx51 meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. + +Package: linux-headers-2.6.31-612-imx51 +Architecture: armel +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0), ${shlibs:Depends} +Description: Linux kernel headers for version 2.6.31 on I.MX51-based systems + This package provides kernel header files for version 2.6.31 on + I.MX51-based systems. + . + This is for sites that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-2.6.31-612/debian.README.gz for details. + --- linux-fsl-imx51-2.6.31.orig/debian/copyright +++ linux-fsl-imx51-2.6.31/debian/copyright @@ -0,0 +1,30 @@ +This is the Ubuntu prepackaged version of the Linux kernel. +Linux was written by Linus Torvalds +and others. + +This package was put together by the Ubuntu Kernel Team, from +sources retrieved from upstream linux git. +The sources may be found at most Linux ftp sites, including +ftp://ftp.kernel.org/pub/linux/kernel/ + +This package is currently maintained by the +Ubuntu Kernel Team + +Linux is copyrighted by Linus Torvalds and others. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 dated June, 1991. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. + +On Ubuntu Linux systems, the complete text of the GNU General +Public License v2 can be found in `/usr/share/common-licenses/GPL-2'. --- linux-fsl-imx51-2.6.31.orig/debian/changelog +++ linux-fsl-imx51-2.6.31/debian/changelog @@ -0,0 +1,3907 @@ +linux-fsl-imx51 (2.6.31-612.33) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #931913 + + [ Upstream Kernel Changes ] + + * Fix for buffer overflow in ldm_frag_add not sufficient + - LP: #922371 + - CVE-2011-2182 + + -- Paolo Pisati Tue, 14 Feb 2012 19:55:37 +0100 + +linux-fsl-imx51 (2.6.31-612.32) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #906939 + + [ Upstream Kernel Changes ] + + * Revert "core: Fix memory leak/corruption on VLAN GRO_DROP, + CVE-2011-1576" + * resource: add helpers for fetching rlimits + * use cache type functions for arch_get_unmapped_area + * topdown mmap support + * TPM: Zero buffer after copying to userspace, CVE-2011-1162 + - LP: #899463 + - CVE-2011-1162 + * hfs: fix hfs_find_init() sb->ext_tree NULL ptr oops, CVE-2011-2203 + - LP: #899466 + - CVE-2011-2203 + * KEYS: Fix a NULL pointer deref in the user-defined key type, + CVE-2011-4110 + - LP: #894369, #unable to handle kernel NULL pointer dereference at 0000000000000008 + - CVE-2011-4110 + * gro: reset vlan_tci on reuse + - LP: #844361, #902317 + - CVE-2011-1576 + + -- Andy Whitcroft Tue, 20 Dec 2011 15:31:26 +0000 + +linux-fsl-imx51 (2.6.31-612.31) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #899736 + + [ Upstream Kernel Changes ] + + * xfs: Fix possible memory corruption in xfs_readlink, CVE-2011-4077 + - LP: #887298 + - CVE-2011-4077 + * jbd/jbd2: validate sb->s_first in journal_get_superblock() + - LP: #893148 + - CVE-2011-4132 + * hfs: add sanity check for file name length, CVE-2011-4330 + - LP: #894374 + - CVE-2011-4330 + + -- Paolo Pisati Mon, 05 Dec 2011 09:32:22 +0100 + +linux-fsl-imx51 (2.6.31-612.30) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #888698 + + [ Herton Ronaldo Krzesinski ] + + * [Config] Use debian.env earlier + + [ Upstream Kernel Changes ] + + * NLM: Don't hang forever on NLM unlock requests - CVE-2011-2491 + - LP: #869237 + - CVE-2011-2491 + * cifs: clean up cifs_find_smb_ses (try #2), CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * cifs: fix NULL pointer dereference in cifs_find_smb_ses, CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * cifs: check for NULL session password, CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * gre: fix netns vs proto registration ordering, CVE-2011-1767 + - LP: #869213 + - CVE-2011-1767 + * netns xfrm: fixup xfrm6_tunnel error propagation, CVE-2011-1768 + - LP: #869215, #823296 + - CVE-2011-1768 + * tunnels: fix netns vs proto registration ordering, CVE-2011-1768 + - LP: #869215 + - CVE-2011-1768 + + -- Paolo Pisati Fri, 11 Nov 2011 12:34:18 +0100 + +linux-fsl-imx51 (2.6.31-611.29) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #873059 + + [ Upstream Kernel Changes ] + + * cifs: fix possible memory corruption in CIFSFindNext, CVE-2011-3191 + - LP: #834135 + - CVE-2011-3191 + * befs: Validate length of long symbolic links, CVE-2011-2928 + - LP: #834124 + - CVE-2011-2928 + * gro: Only reset frag0 when skb can be pulled, CVE-2011-2723 + - LP: #844371 + - CVE-2011-2723 + * Validate size of EFI GUID partition entries, CVE-2011-1776 + - LP: #844365 + - CVE-2011-1776 + * inet_diag: fix inet_diag_bc_audit(), CVE-2011-2213 + - LP: #838421 + - CVE-2011-2213 + * Bluetooth: Prevent buffer overflow in l2cap config request, + CVE-2011-2497 + - LP: #838423 + - CVE-2011-2497 + * core: Fix memory leak/corruption on VLAN GRO_DROP, CVE-2011-1576 + - LP: #844361 + - CVE-2011-1576 + * crypto: Move md5_transform to lib/md5.c, CVE-2011-3188 + - LP: #827462, #834129 + - CVE-2011-3188 + * net: Compute protocol sequence numbers and fragment IDs using MD5, + CVE-2011-3188 + - LP: #827462, #834129 + - CVE-2011-3188 + * ext4: correctly calculate number of blocks for fiemap, CVE-2011-2695 + - LP: #474597, #583414, #819574 + - CVE-2011-2695 + * ext4: Fix max file size and logical block counting of extent format + file, CVE-2011-2695 + - LP: #819574 + - CVE-2011-2695 + * cifs: always do is_path_accessible check in cifs_mount, CVE-2011-3363 + - LP: #866034 + - CVE-2011-3363 + * cifs: add fallback in is_path_accessible for old servers, CVE-2011-3363 + - LP: #866034 + - CVE-2011-3363 + * Make TASKSTATS require root access, CVE-2011-2494 + - LP: #866021 + - CVE-2011-2494 + * proc: restrict access to /proc/PID/io, CVE-2011-2495 + - LP: #866025 + - CVE-2011-2495 + * proc: fix a race in do_io_accounting(), CVE-2011-2495 + - LP: #866025 + - CVE-2011-2495 + * staging: comedi: fix infoleak to userspace, CVE-2011-2909 + - LP: #869261 + - CVE-2011-2909 + * sctp: fix to calc the INIT/INIT-ACK chunk length correctly is set, + CVE-2011-1573 + - LP: #869205 + - CVE-2011-1573 + * perf tools: do not look at ./config for configuration, CVE-2011-2905 + - LP: #869259 + - CVE-2011-2905 + * net_sched: Fix qdisc_notify() - CVE-2011-2525 + - LP: #869250 + - CVE-2011-2525 + * nl80211: fix overflow in ssid_len - CVE-2011-2517 + - LP: #869245 + - CVE-2011-2517 + * mm: avoid wrapping vm_pgoff in mremap() - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + * vm: fix vm_pgoff wrap in stack expansion - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + * vm: fix vm_pgoff wrap in upward expansion - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + + -- Paolo Pisati Thu, 13 Oct 2011 12:19:09 +0200 + +linux-fsl-imx51 (2.6.31-610.28) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #837802 + + [ Upstream Kernel Changes ] + + * ipv6: make fragment identifications less predictable, CVE-2011-2699 + - LP: #827685 + - CVE-2011-2699 + * perf: Fix software event overflow, CVE-2011-2918 + - LP: #834121 + - CVE-2011-2918 + * proc: fix oops on invalid /proc//maps access, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + + -- Paolo Pisati Wed, 31 Aug 2011 10:26:26 +0200 + +linux-fsl-imx51 (2.6.31-610.27) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #829160 + + [ Upstream Kernel Changes ] + + * fs/partitions/efi.c: corrupted GUID partition tables can cause kernel + oops + - LP: #795418 + - CVE-2011-1577 + * Fix corrupted OSF partition table parsing + - LP: #796606 + - CVE-2011-1163 + * can: Add missing socket check in can/bcm release. + - LP: #796502 + - CVE-2011-1598 + * proc: protect mm start_code/end_code in /proc/pid/stat + - LP: #799906 + - CVE-2011-0726 + * sctp: Fix a race between ICMP protocol unreachable and connect() + * tty: Make tiocgicount a handler, CVE-2010-4076, CVE-2010-4077 + - LP: #794034 + - CVE-2010-4077 + * filter: make sure filters dont read uninitialized memory CVE-2010-4158 + - LP: #721282 + - CVE-2010-4158 + * bio: take care not overflow page count when mapping/copying user data + CVE-2010-4162 + - LP: #721441 + - CVE-2010-4162 + * block: check for proper length of iov entries in blk_rq_map_user_iov() + - LP: #721504 + - CVE-2010-4163 + * block: check for proper length of iov entries earlier in + blk_rq_map_user_iov(), CVE-2010-4163 + - LP: #721504 + - CVE-2010-4163 + * rds: Integer overflow in RDS cmsg handling, CVE-2010-4175 + - LP: #721455 + - CVE-2010-4175 + * bluetooth: Fix missing NULL check CVE-2010-4242 + - LP: #714846 + - CVE-2010-4242 + * IB/uverbs: Handle large number of entries in poll CQ CVE-2010-4649 + - LP: #800121 + - CVE-2010-4649 + * epoll: prevent creating circular epoll structures CVE-2011-1082 + - LP: #800758 + - CVE-2011-1082 + * nfs4: Ensure that ACL pages sent over NFS were not allocated from the + slab (v3) CVE-2011-1090 + - LP: #800775 + * ldm: corrupted partition table can cause kernel oops CVE-2011-1012 + - LP: #801083 + - CVE-2011-1012 + * netfilter: ipt_CLUSTERIP: fix buffer overflow CVE-2011-2534 + - LP: #801473 + - CVE-2011-2534 + * netfilter: arp_tables: fix infoleak to userspace CVE-2011-1170 + - LP: #801480 + - CVE-2011-1170 + * netfilter: ip_tables: fix infoleak to userspace CVE-2011-1171 + - LP: #801482 + - CVE-2011-1171 + * ipv6: netfilter: ip6_tables: fix infoleak to userspace CVE-2011-1172 + - LP: #801483 + - CVE-2011-1172 + * econet: 4 byte infoleak to the network CVE-2011-1173 + - LP: #801484 + - CVE-2011-1173 + * net: Limit socket I/O iovec total length to INT_MAX. + - LP: #708839 + * fs/partitions: Validate map_count in Mac partition tables - + CVE-2011-1010 + - LP: #804225 + - CVE-2011-1010 + * drm: fix unsigned vs signed comparison issue in modeset ctl ioctl, + CVE-2011-1013 + - LP: #804229 + - CVE-2011-1013 + * exec: copy-and-paste the fixes into compat_do_execve() paths - + CVE-2010-4243 + - LP: #804234 + - CVE-2010-4243 + * taskstats: don't allow duplicate entries in listener mode, + CVE-2011-2484 + - LP: #806390 + - CVE-2011-2484 + * dccp: handle invalid feature options length, CVE-2011-1770 + - LP: #806375 + - CVE-2011-1770 + * pagemap: close races with suid execve, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * report errors in /proc/*/*map* sanely, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * close race in /proc/*/environ, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * auxv: require the target to be tracable (or yourself), CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * deal with races in /proc/*/{syscall, stack, personality}, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * dccp: fix oops on Reset after close, CVE-2011-1093 + - LP: #814087 + - CVE-2011-1093 + * net: add limit for socket backlog CVE-2010-4251 + - LP: #807462 + * tcp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * ipv6: udp: Optimise multicast reception + - LP: #807462 + * ipv4: udp: Optimise multicast reception + - LP: #807462 + * udp: multicast RX should increment SNMP/sk_drops counter in allocation + failures CVE-2010-4251 + - LP: #807462 + * udp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * llc: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * sctp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * tipc: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * x25: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * net: backlog functions rename CVE-2010-4251 + - LP: #807462 + * net: sk_add_backlog() take rmem_alloc into account CVE-2010-4805 + - LP: #809318 + * Bluetooth: sco: fix information leak to userspace, CVE-2011-1078 + - LP: #816542 + - CVE-2011-1078 + * Bluetooth: bnep: fix buffer overflow, CVE-2011-1079 + - LP: #816544 + - CVE-2011-1079 + * bridge: netfilter: fix information leak, CVE-2011-1080 + - LP: #816545 + - CVE-2011-1080 + * char/tpm: Fix unitialized usage of data buffer, CVE-2011-1160 + - LP: #816546 + - CVE-2011-1160 + * irda: validate peer name and attribute lengths, CVE-2011-1180 + - LP: #816547 + - CVE-2011-1180 + * gro: Reset dev pointer on reuse, CVE-2011-1478 + - LP: #816549 + - CVE-2011-1478 + * gro: reset skb_iif on reuse, CVE-2011-1478 + - LP: #816549 + - CVE-2011-1478 + * rose_loopback_timer sets VC number <= ROSE_DEFAULT_MAXVC, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * ROSE: prevent heap corruption with bad facilities, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * rose: Add length checks to CALL_REQUEST parsing, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * Bluetooth: l2cap and rfcomm: fix 1 byte infoleak to userspace. + - LP: #819569 + - CVE-2011-2492 + * Add mount option to check uid of device being mounted = expect uid, + CVE-2011-1833 + - LP: #732628 + - CVE-2011-1833 + + -- Paolo Pisati Mon, 20 Jun 2011 11:09:38 +0200 + +linux-fsl-imx51 (2.6.31-609.26) lucid; urgency=low + + [ Paolo Pisati ] + + * Tracking bug + - LP: #795219 + * [Config] Disable parport_pc on fsl-imx51 + - LP: #601226 + + [ Upstream Kernel Changes ] + + * ALSA: sound/pci/rme9652: prevent reading uninitialized stack memory + - LP: #712723, #712737 + * can-bcm: fix minor heap overflow + - LP: #710680 + * drivers/video/via/ioctl.c: prevent reading uninitialized stack memory + - LP: #712744 + * gdth: integer overflow in ioctl + - LP: #711797 + * inet_diag: Make sure we actually run the same bytecode we audited, CVE-2010-3880 + - LP: #711865 + - CVE-2010-3880 + * net: fix rds_iovec page count overflow, CVE-2010-3865 + - LP: #709153 + - CVE-2010-3865 + * net: packet: fix information leak to userland, CVE-2010-3876 + - LP: #711045 + - CVE-2010-3876 + * net: tipc: fix information leak to userland, CVE-2010-3877 + - LP: #711291 + - CVE-2010-3877 + * net: Truncate recvfrom and sendto length to INT_MAX. + - LP: #708839 + * posix-cpu-timers: workaround to suppress the problems with mt exec + - LP: #712609 + * sys_semctl: fix kernel stack leakage + - LP: #712749 + * x25: Patch to fix bug 15678 - x25 accesses fields beyond end of packet. + - LP: #709372 + * memory corruption in X.25 facilities parsing + - LP: #709372 + * net: ax25: fix information leak to userland, CVE-2010-3875 + - LP: #710714 + - CVE-2010-3875 + * net: ax25: fix information leak to userland harder, CVE-2010-3875 + - LP: #710714 + - CVE-2010-3875 + * fs/partitions/ldm.c: fix oops caused by corrupted partition table, CVE-2011-1017 + - LP: #771382 + - CVE-2011-1017 + * net: clear heap allocations for privileged ethtool actions + - LP: #771445 + * Prevent rt_sigqueueinfo and rt_tgsigqueueinfo from spoofing the signal code + - LP: #772543 + * Relax si_code check in rt_sigqueueinfo and rt_tgsigqueueinfo + - LP: #772543 + * exec: make argv/envp memory visible to oom-killer + - LP: #768408 + * next_pidmap: fix overflow condition + - LP: #784727 + * proc: do proper range check on readdir offset + - LP: #784727 + * mpt2sas: prevent heap overflows and unchecked reads + - LP: #787145 + * agp: fix arbitrary kernel memory writes + - LP: #788684 + * can: add missing socket check in can/raw release + - LP: #788694 + * agp: fix OOM and buffer overflow + - LP: #788700 + * do_exit(): make sure that we run with get_fs() == USER_DS - CVE-2010-4258 + - LP: #723945 + - CVE-2010-4258 + * x25: Prevent crashing when parsing bad X.25 facilities - CVE-2010-4164 + - LP: #731199 + - CVE-2010-4164 + * install_special_mapping skips security_file_mmap check - CVE-2010-4346 + - LP: #731971 + - CVE-2010-4346 + * econet: Fix crash in aun_incoming() - CVE-2010-4342 + - LP: #736394 + - CVE-2010-4342 + * sound: Prevent buffer overflow in OSS load_mixer_volumes - CVE-2010-4527 + - LP: #737073 + - CVE-2010-4527 + * irda: prevent integer underflow in IRLMP_ENUMDEVICES, CVE-2010-4529 + - LP: #737823 + - CVE-2010-4529 + * CAN: Use inode instead of kernel address for /proc file - CVE-2010-4565 + - LP: #765007 + - CVE-2010-4565 + * av7110: check for negative array offset - CVE-2011-0521 + - LP: #767526 + - CVE-2011-0521 + * xfs: prevent leaking uninitialized stack memory in FSGEOMETRY_V1 - CVE-2011-0711 + - LP: #767740 + - CVE-2011-0711 + * xfs: zero proper structure size for geometry calls - CVE-2011-0711 + - LP: #767740 + - CVE-2011-0711 + * ALSA: caiaq - Fix possible string-buffer overflow - CVE-2011-0712 + - LP: #768448 + - CVE-2011-0712 + * RDMA/cma: Fix crash in request handlers - CVE-2011-0695 + - LP: #770369 + - CVE-2011-0695 + * IB/cm: Bump reference count on cm_id before invoking callback - CVE-2011-0695 + - LP: #770369 + - CVE-2011-0695 + * Treat writes as new when holes span across page boundaries - CVE-2011-0463 + - LP: #770483 + - CVE-2011-0463 + * usb: iowarrior: don't trust report_size for buffer size - CVE-2010-4656 + - LP: #771484 + - CVE-2010-4656 + * tty: icount changeover for other main devices, CVE-2010-4076, CVE-2010-4077 + - LP: #720189 + - CVE-2010-4077 + + -- Paolo Pisati Fri, 27 May 2011 18:09:53 +0200 + +linux-fsl-imx51 (2.6.31-608.25) lucid; urgency=low + + * No change rebuild, package with proper debdiff. + + -- Tim Gardner Thu, 10 Mar 2011 01:53:53 -0700 + +linux-fsl-imx51 (2.6.31-608.24) lucid; urgency=low + + * Fix packaging FTBS + + -- Tim Gardner Wed, 09 Mar 2011 02:19:20 -0700 + +linux-fsl-imx51 (2.6.31-608.23) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * ARM: 5746/1: Handle possible translation errors in ARMv6/v7 + coherent_user_range + - LP: #605042 + + -- Tim Gardner Tue, 08 Mar 2011 06:27:45 -0700 + +linux-fsl-imx51 (2.6.31-608.22) lucid; urgency=low + + [ Tim Gardner ] + + * rebased to 2.6.31-22.72 + * Tracking bug + - LP: #713266 + + [ Upstream Kernel Changes ] + + * Karmic SRU: thinkpad-acpi: lock down video output state access, CVE-2010-3448 + - LP: #706999 + - CVE-2010-3448 + * USB: serial/mos*: prevent reading uninitialized stack memory, + CVE-2010-4074 + - LP: #706149 + - CVE-2010-4074 + * KVM: Fix fs/gs reload oops with invalid ldt + - LP: #707000 + - CVE-2010-3698 + * drivers/video/sis/sis_main.c: prevent reading uninitialized stack + memory, CVE-2010-4078 + - LP: #707579 + - CVE-2010-4078 + * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory, + CVE-2010-4079 + - LP: #707649 + - CVE-2010-4079 + + [ Upstream Kernel Changes ] + + * ipc: initialize structure memory to zero for compat functions + * tcp: Increase TCP_MAXSEG socket option minimum. + - CVE-2010-4165 + * perf_events: Fix perf_counter_mmap() hook in mprotect() + - CVE-2010-4169 + * af_unix: limit unix_tot_inflight + - CVE-2010-4249 + + -- Tim Gardner Fri, 04 Feb 2011 11:39:27 -0700 + +linux-fsl-imx51 (2.6.31-608.21) lucid-proposed; urgency=low + + [ Leann Ogasawara ] + + * Rebased to 2.6.31-22.70 + + [ Ubuntu: 2.6.31-22.70 ] + + - LP: #683474 + * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer + dereference" + * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges" + * Revert "SAUCE: AF_ECONET prevent kernel stack overflow" + * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE + - CVE-2010-2538 + * xfs: validate untrusted inode numbers during lookup + - CVE-2010-2943 + * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED + - CVE-2010-2943 + * xfs: remove block number from inode lookup code + - CVE-2010-2943 + * xfs: fix untrusted inode number lookup + - CVE-2010-2943 + * drm/i915: Sanity check pread/pwrite + - CVE-2010-2962 + * drm/i915: Rephrase pwrite bounds checking to avoid any potential overflow + - CVE-2010-2962 + * tracing: Do not allow llseek to set_ftrace_filter + - CVE-2010-3079 + * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack memory + - CVE-2010-3296 + * drivers/net/eql.c: prevent reading uninitialized stack memory + - CVE-2010-3297 + * drivers/net/usb/hso.c: prevent reading uninitialized memory + - CVE-2010-3298 + * setup_arg_pages: diagnose excessive argument size + - CVE-2010-3858 + * net: clear heap allocation for ETHTOOL_GRXCLSRLALL + - CVE-2010-3861 + * ipc: shm: fix information leak to userland + - CVE-2010-4072 + * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849 + - CVE-2010-3849 + * econet: fix CVE-2010-3850 + - CVE-2010-3850 + * econet: fix CVE-2010-3848 + - CVE-2010-3848 + + [ Ubuntu: 2.6.31-22.69 ] + + * SAUCE: AF_ECONET prevent kernel stack overflow + - CVE-2010-3848 + * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges + - CVE-2010-3850 + * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference + - CVE-2010-3849 + + [ Ubuntu: 2.6.31-22.68 ] + + * SAUCE: docs -- fix doc strings for fc_event_seq + * SAUCE: (no-up) Modularize vesafb -- fix initialization + - LP: #611471 + * SAUCE: sched: update load count only once per cpu in 10 tick update window + - LP: #513848 + * SAUCE: agp/intel: Add second set of PCI-IDs for B43 + - LP: #640214 + * SAUCE: drm/i915: Add second set of PCI-IDs for B43 + - LP: #640214 + * SAUCE: Fix compile error on ia64, powerpc, and sparc + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + [ Ubuntu: 2.6.31-22.67 ] + + * Local privilege escalation vulnerability in RDS sockets + - CVE-2010-3904 + * v4l: disable dangerous buggy compat function + - CVE-2010-2963 + * mm: Do not assume ENOMEM when looking at a split stack vma + - LP: #646114 + * mm: Use helper to find real vma with stack guard page + - LP: #646114 + * Fix race in tty_fasync() properly + - CVE-2009-4895 + * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files + - CVE-2010-2066 + * xfs: prevent swapext from operating on write-only files + - CVE-2010-2226 + * cifs: Fix a kernel BUG with remote OS/2 server (try #3) + - CVE-2010-2248 + * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH + - CVE-2010-2478 + * l2tp: Fix oops in pppol2tp_xmit + - CVE-2010-2495 + * nfsd4: bug in read_buf + - CVE-2010-2521 + * CIFS: Fix a malicious redirect problem in the DNS lookup code + - CVE-2010-2524 + * GFS2: rename causes kernel Oops + - CVE-2010-2798 + * net sched: fix some kernel memory leaks + - CVE-2010-2942 + * jfs: don't allow os2 xattr namespace overlap with others + - CVE-2010-2946 + * irda: Correctly clean up self->ias_obj on irda_bind() failure. + - CVE-2010-2954 + * wireless extensions: fix kernel heap content leak + - CVE-2010-2955 + * ext4: consolidate in_range() definitions + - CVE-2010-3015 + * aio: check for multiplication overflow in do_io_submit + - CVE-2010-3067 + * xfs: prevent reading uninitialized stack memory + - CVE-2010-3078 + * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open() + - CVE-2010-3080 + * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL + - CVE-2010-3084 + * rose: Fix signedness issues wrt. digi count. + - CVE-2010-3310 + * sctp: Do not reset the packet during sctp_packet_config(). + - CVE-2010-3432 + * Fix pktcdvd ioctl dev_minor range check + - CVE-2010-3437 + * ALSA: prevent heap corruption in snd_ctl_new() + - CVE-2010-3442 + * net sched: fix kernel leak in act_police + - CVE-2010-3477 + * Fix out-of-bounds reading in sctp_asoc_get_hmac() + - CVE-2010-3705 + * ocfs2: Don't walk off the end of fast symlinks. + - CVE-2010-NNN2 + + -- Leann Ogasawara Thu, 02 Dec 2010 10:08:36 -0800 + +linux-fsl-imx51 (2.6.31-608.20) lucid-proposed; urgency=low + + [ Brad Figg ] + + * Rebased to 2.6.31-22.66 + + [ Ubuntu: 2.6.31-22.66 ] + + * SAUCE: (no-up) Modularize vesafb -- fix initialization + - LP: #611471 + * SAUCE: sched: update load count only once per cpu in 10 tick update + window + - LP: #513848 + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + [ Ubuntu: 2.6.31-22.65 ] + + * x86-64, compat: Test %rax for the syscall number, not %eax + - CVE-2010-3301 + * x86-64, compat: Retruncate rax after ia32 syscall entry tracing + - CVE-2010-3301 + * compat: Make compat_alloc_user_space() incorporate the access_ok() + - CVE-2010-3081 + + -- Brad Figg Wed, 22 Sep 2010 10:49:56 -0700 + +linux-fsl-imx51 (2.6.31-608.19) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebased to 2.6.31-22.63 + + [ Ubuntu: 2.6.31-22.63 ] + + * drm: Initialize ioctl struct when no user data is present + - CVE-2010-2803 + * can: add limit for nframes and clean up signed/unsigned variables + - CVE-2010-2959 + * mm: keep a guard page below a grow-down stack segment + - CVE-2010-2240 + * mm: fix missing page table unmap for stack guard page failure case + - CVE-2010-2240 + * mm: fix page table unmap for stack guard page properly + - CVE-2010-2240 + * mm: fix up some user-visible effects of the stack guard page + - CVE-2010-2240 + * x86: don't send SIGBUS for kernel page faults + - CVE-2010-2240 + + -- Stefan Bader Wed, 18 Aug 2010 17:04:18 +0200 + +linux-fsl-imx51 (2.6.31-608.18) lucid-proposed; urgency=low + + [ Bryan Wu ] + + * SAUCE: revert commit 41e74a1f7f90b0c092e9e153f7d8b685af2a980e + - LP: #546649, #457878 + + [ Upstream Kernel Changes ] + + * fec: use interrupt for MDIO completion indication + - LP: #546649, #457878 + * ENGR00121057 switch low power mode only support in mc13892 2.0a + - LP: #615722 + + -- Stefan Bader Wed, 11 Aug 2010 13:58:02 +0200 + +linux-fsl-imx51 (2.6.31-608.17) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebased to 2.6.31-22.61 (security) + + [ Ubuntu: 2.6.31-22.61 ] + + * sctp: Fix skb_over_panic resulting from multiple invalid parameter + errors (CVE-2010-1173) (v4) + - CVE-2010-1173 + * sctp: fix append error cause to ERROR chunk correctly + - CVE-2010-1173 + * GFS2: Fix writing to non-page aligned gfs2_quota structures + - CVE-2010-1436 + * KEYS: find_keyring_by_name() can gain access to a freed keyring + - CVE-2010-1437 + * sparc64: Fix sun4u execute bit check in TSB I-TLB load. + - CVE-2010-1451 + * Btrfs: check for read permission on src file in the clone ioctl + - CVE-2010-1636 + * GFS2: Fix permissions checking for setflags ioctl() + - CVE-2010-1641 + * Btrfs: should add a permission check for setfacl + - CVE-2010-2071 + * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets + - CVE-2010-2492 + + -- Stefan Bader Sat, 31 Jul 2010 11:39:31 +0200 + +linux-fsl-imx51 (2.6.31-608.15) lucid-proposed; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-22.61 + * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958 + - LP: #570500, #576274 + + [ Bryan Wu ] + + * SAUCE: IMX51: fix stgl5000 regulator_get failing error + - LP: #567157 + + [ Mattias Walstrom ] + + * (pre-upstream) FEC: Fix kernel panic in fec_set_mac_address. + - LP: #575558 + + [ Upstream Kernel Changes ] + + * ENGR00120510 atlas switch mode control + * ENGR00120456 mx51: set VIOHI always on + * ENGR00121069: MX51: Complete the constraints for the various + regulators. + * ENGR00121385 MX51: Leave MC13892 VUSB Turned on for USB OTG to work + * netdev/fec: fix ifconfig eth0 down hang issue + - LP: #559065 + + [ Ubuntu: 2.6.31-22.61 ] + + * SAUCE: docs -- fix doc strings for fc_event_seq + * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958 + - LP: #570500, #576274 + * SAUCE: sched: update load count only once per cpu in 10 tick update + window + - LP: #513848 + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + -- Stefan Bader Mon, 14 Jun 2010 11:58:42 +0200 + +linux-fsl-imx51 (2.6.31-608.14) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebase to 2.6.31-22.60 + + [ Ubuntu: 2.6.31-22.60 ] + + * kvm: restrict writing of segment selectors to segment registers + - CVE-2010-0419 + * USB: usbfs: properly clean up the as structure on error paths + - CVE-2010-1083 + * Bluetooth: Fix potential bad memory access with sysfs files + - CVE-2010-1084 + * ALSA: hda-intel: Avoid divide by zero crash + - CVE-2010-1085 + * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered + by an invalid Payload Pointer + - CVE-2010-1086 + * GFS2: Skip check for mandatory locks when unlocking + - CVE-2010-0727 + * tipc: Fix oops on send prior to entering networked mode (v3) + - CVE-2010-1187 + * inotify: do not reuse watch descriptors + - LP: #485556 + * idr: fix a critical misallocation bug, take#2 + - LP: #485556 + * tty: release_one_tty() forgets to put pids + - CVE-2010-1162 + * reiserfs: fix permissions on .reiserfs_priv + - CVE-2010-1146 + * fix LOOKUP_FOLLOW on automount "symlinks" + - CVE-2010-1088 + * NFS: Fix an Oops when truncating a file + - CVE-2010-1087 + * Attempt #2 to handle null nameidata + - CVE-2010-1148 + * r8169: Fix receive buffer length when MTU is between 1515 and 1536 + - CVE-2009-4537 + * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs) + - CVE-2009-4537 + * KVM: Use kvm_{read,write}_guest_virt() to read and write segment + descriptors + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check CPL level during privilege instruction + emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Add Virtual-8086 mode of emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: fix memory access during x86 emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check IOPL level during io instruction emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Fix popf emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: VMX: Use macros instead of hex value on cr0 initialization + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: SVM: Reset cr0 properly on vcpu reset + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86: disable paravirt mmu reporting + - CVE-2010-0298 + - CVE-2010-0306 + + -- Stefan Bader Tue, 25 May 2010 17:54:29 +0000 + +linux-fsl-imx51 (2.6.31-607.13) lucid; urgency=low + + [ Bryan Wu ] + + * SAUCE: (upstream) netdev/fec: fix phy_speed caculating + - LP: #546649, #457878 + * SAUCE: (upstream) netdev/fec: fix performance impact from mdio poll + operation + - LP: #546649, #457878 + + -- Andy Whitcroft Wed, 14 Apr 2010 12:08:46 +0100 + +linux-fsl-imx51 (2.6.31-607.12) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-21.59 + + [ Ubuntu: 2.6.31-21.59 ] + + * [Config] generic-pae switch to M586TSC + - LP: #519448 + * (pre-stable) drm/i915: Increase fb alignment to 64k + - LP: #404064 + * Input: i8042 - bypass AUX IRQ delivery test on laptops + - LP: #534448 + * SAUCE: Fix volume hotkeys for Dell Studio 1557 + - LP: #465250 + * SAUCE: aufs: Fix header files inclusion in debug.h + - LP: #517151 + * [Config] Enable all CGROUP configuration options + - LP: #480739 + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + - LP: #509730 + * [Config] ext3 defaults to ordered mode + - LP: #510067 + * [Config] Fix sub-flavours package conflicts + - LP: #454827 + * PCI/cardbus: Add a fixup hook and fix powerpc + - LP: #455723 + * fnctl: f_modown should call write_lock_irqsave/restore + - LP: #519436 + * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C + - LP: #516325 + * tg3: Add 57788, remove 57720 + - LP: #515390 + * HID: ignore all recent SoundGraph iMON devices + - LP: #488443 + * Input: ALPS - add interleaved protocol support (Dell E6x00 series) + - LP: #296610 + * acerhdf: limit modalias matching to supported + - LP: #509730 + * ASoC: Do not write to invalid registers on the wm9712. + - LP: #509730 + * cifs: NULL out tcon, pSesInfo, and srvTcp pointers when chasing DFS + referrals + - LP: #509730 + * clockevents: Prevent clockevent_devices list corruption on cpu hotplug + - LP: #509730 + * dma: at_hdmac: correct incompatible type for argument 1 of + 'spin_lock_bh' + - LP: #509730 + * drivers/net/usb: Correct code taking the size of a pointer + - LP: #509730 + * Libertas: fix buffer overflow in lbs_get_essid() + - LP: #509730 + * md: Fix unfortunate interaction with evms + - LP: #509730 + * pata_cmd64x: fix overclocking of UDMA0-2 modes + - LP: #509730 + * pata_hpt3x2n: fix clock turnaround + - LP: #509730 + * SCSI: fc class: fix fc_transport_init error handling + - LP: #509730 + * sound: sgio2audio/pdaudiocf/usb-audio: initialize PCM buffer + - LP: #509730 + * USB: emi62: fix crash when trying to load EMI 6|2 firmware + - LP: #509730 + * USB: Fix a bug on appledisplay.c regarding signedness + - LP: #509730 + * USB: musb: gadget_ep0: avoid SetupEnd interrupt + - LP: #509730 + * USB: option: support hi speed for modem Haier CE100 + - LP: #490068, #509730 + * x86, cpuid: Add "volatile" to asm in native_cpuid() + - LP: #509730 + * e100: Use pci pool to work around GFP_ATOMIC order 5 memory allocation + failure + - LP: #509730 + * e100: Fix broken cbs accounting due to missing memset. + - LP: #509730 + * hostap: Revert a toxic part of the conversion to net_device_ops + - LP: #509730 + * hwmon: (fschmd) Fix check on unsigned in watchdog_write() + - LP: #509730 + * hwmon: (sht15) Off-by-one error in array index + incorrect constants + - LP: #509730 + * i2c/tsl2550: Fix lux value in extended mode + - LP: #509730 + * ipv6: reassembly: use seperate reassembly queues for conntrack and + local delivery + - LP: #509730 + * S390: dasd: support DIAG access for read-only devices + - LP: #509730 + * udf: Try harder when looking for VAT inode + - LP: #509730 + * V4L/DVB (13596): ov511.c typo: lock => unlock + - LP: #509730 + * x86/ptrace: make genregs[32]_get/set more robust + - LP: #509730 + * XFS bug in log recover with quota (bugzilla id 855) + - LP: #509730 + * generic_permission: MAY_OPEN is not write access + - LP: #509730 + * memcg: avoid oom-killing innocent task in case of use_hierarchy + - LP: #509730 + * Input: atkbd - add force relese key quirk for Samsung R59P/R60P/R61P + - LP: #253874, #509730 + * Add unlocked version of inode_add_bytes() function + - LP: #509730 + * ext4: fix sleep inside spinlock issue with quota and dealloc (#14739) + - LP: #509730 + * Linux 2.6.31.10 + - LP: #509730 + * Linux 2.6.31.11 + - LP: #509730 + * quota: decouple fs reserved space from quota reservation + - LP: #510674 + * ext4: Convert to generic reserved quota's space management. + - LP: #510674 + * hwmon: (adt7462) Fix pin 28 monitoring + - LP: #510674 + * netfilter: nf_ct_ftp: fix out of bounds read in update_nl_seq() + - LP: #510674 + * quota: Fix dquot_transfer for filesystems different from ext4 + - LP: #510674 + * fix braindamage in audit_tree.c untag_chunk() + - LP: #510674 + * fix more leaks in audit_tree.c tag_chunk() + - LP: #510674 + * ACPI: sleep: another HP DMI entry for init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: add DMI entry for SCI_EN resume quirk on HP dv4 + - LP: #453963, #510674 + * ACPI: sleep: another HP/Compaq DMI entries for + init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: DMI init_set_sci_en_on_resume for HP-Compaq C700 + - LP: #453963, #510674 + * Linux 2.6.31.12 + - LP: #510674 + + [ Ubuntu: 2.6.31-20.58 ] + + * Revert "[Upstream] e1000: enhance frame fragment detection" + - CVE-2009-4536 + * Revert "[Upstream] e1000e: enhance frame fragment detection" + - CVE-2009-4538 + * e1000: enhance frame fragment detection + - CVE-2009-4536 + * e1000/e1000e: don't use small hardware rx buffers + - CVE-2009-4536 + * e1000e: enhance frame fragment detection + - CVE-2009-4538 + * KVM: PIT: control word is write-only + - CVE-2010-0309 + * connector: Delete buggy notification code. + - CVE-2010-0410 + * Fix potential crash with sys_move_pages + - CVE-2010-0415 + * futex: Handle user space corruption gracefully + - CVE-2010-0622 + * futex_lock_pi() key refcnt fix + - CVE-2010-0623 + * Split 'flush_old_exec' into two functions + - CVE-2010-0307 + * Fix 'flush_old_exec()/setup_new_exec()' split + - CVE-2010-0307 + * x86: get rid of the insane TIF_ABI_PENDING bit + - CVE-2010-0307 + * powerpc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * sparc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * x86: set_personality_ia32() misses force_personality32 + - CVE-2010-0307 + + -- Andy Whitcroft Wed, 31 Mar 2010 21:44:01 +0100 + +linux-fsl-imx51 (2.6.31-606.11) lucid; urgency=low + + [ Bryan Wu ] + + * [Config]: turn off CONFIG_FIXED_PHY for fsl-imx51 + - LP: #457878 + * [Config] built in SMSC_PHY driver for fsl-imx51 + - LP: #457878 + + [ Upstream Kernel Changes ] + + * netdev/fec.c: add phylib supporting to enable carrier detection + - LP: #457878 + * netdev/fec: fix compiling warning + - LP: #457878 + + -- Stefan Bader Fri, 26 Mar 2010 22:00:03 +0100 + +linux-fsl-imx51 (2.6.31-605.10) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * leds-mc13892: fix suspend/resume + - LP: #537083 + + -- Andy Whitcroft Fri, 19 Mar 2010 19:43:08 +0000 + +linux-fsl-imx51 (2.6.31-605.9) lucid; urgency=low + + [ Andy Whitcroft ] + + * Revert "include modules.builtin in the binary debs" + * include modules.builtin in the binary debs + + [ Bryan Wu ] + + * SAUCE: IMX51: skip ATA PASS THROUGH command for USB storage disk from + JMicron + - LP: #499881 + + [ Upstream Kernel Changes ] + + * ARM: 5677/1: ARM support for + TIF_RESTORE_SIGMASK/pselect6/ppoll/epoll_pwait + - LP: #319729 + * leds/mc13892: Use workqueue for setting LED brightness + - LP: #531696 + * ARM: 5882/1: ARM: Fix uncompress code compile for different defines of + flush(void) + - LP: #319240 + * ARM: 5884/1: arm: Fix DCC console for v7 + - LP: #319240 + * ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot() + - LP: #319240 + * ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work + - LP: #319240 + * ARM: 5888/1: arm: Update comments in cacheflush.h and remove + unnecessary V6 and V7 comments + - LP: #319240 + * arm: disable L2 cache in the v7 finish function + * arm: invalidate TLBs when enabling mmu + + -- Andy Whitcroft Tue, 09 Mar 2010 13:52:16 +0000 + +linux-fsl-imx51 (2.6.31-605.8) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * ARM: VFP: add support to sync the VFP state of the current thread + - LP: #507503 + * ARM: VFP: preserve the HW context when calling signal handlers + - LP: #507503 + + -- Andy Whitcroft Tue, 23 Feb 2010 10:51:17 +0000 + +linux-fsl-imx51 (2.6.31-605.7) lucid; urgency=low + + [ Bryan Wu ] + + * Add 3 missing files to prerm remove file list + - LP: #345623, #415832 + + [ Loïc Minier ] + + * Add modules.builtin.bin to prerm rm list + - LP: #516584 + + [ Upstream Kernel Changes ] + + * Ubuntu: SAUCE: IMX51: Revert a BSP kernel ENGR00115370 patch which was + changed in latest BSP + * ENGR00119582 V4L2 capture:Fix race condition for accessing kernel + resource + * ENGR00119635 MX23 fix wrong state transition of enable lcd controller + * ENGR00119578 v4l2 output: fix fb setting for display 5 + * ENGR00116787 change pmic event handling method + * ENGR00119693 Uniform handling NFC INT bit clearance + * ENGR00119720 IPUv3:Fix wrong UV offset set in CPMEM when idmac crops + * ENGR00119847 [MX23_BSP] Support polled read/write for debug UART + * ENGR00119583 MX35: Add regulators' standby control + * ENGR00119710 MXC V4L2 output:Support YUYV and UYVY input pixel format + * ENGR00119034 V4L2 overlay:Use DP to do CSC for preview on DPFG + * ENGR00119899 Add FEC iomux config and PHY reset. + * ENGR00119975 IPUv3:Inform user when IDMAC UV-offset overflows + * ENGR00120126 mx51: add mem resources in platform device for gpu2d and + gpu3d. + * ENGR00120054 MX51: Increase VPU IRAM size to support decoder + * ENGR00116049-1 [imx23] Addition of FIQ system for chip errata/bo's + * ENGR00116049-2 [imx23] Addition of FIQ system for chip errata/bo's + * ENGR00119976 v4l2 output: use mannual buffer select for display channel + * ENGR00120370 v4l2 output: fix display fail for blank fb during video + play + * Ubuntu: SAUCE: IMX51: export symbol of ipu_clear_buffer_ready function + * syslog: distinguish between /proc/kmsg and syscalls + - LP: #515623 + + -- Andy Whitcroft Mon, 22 Feb 2010 15:52:35 +0000 + +linux-fsl-imx51 (2.6.31-604.6) lucid; urgency=low + + [ Andy Whitcroft ] + + * kbuild: generate modules.builtin + * include modules.builtin in the binary debs + * SAUCE: async_populate_rootfs: move rootfs init earlier + * rebase to Ubuntu-2.6.31-20.57 + + [ Bryan Wu ] + + * [Config] Enable CONFIG_THUMBEE for fsl-imx51 branch + * [Config] Enable CONFIG_DEBUG_KERNEL for ARM branch + - LP: #513241 + * [Config] Enable CONFIG_TIMER_STATS for fsl-imx51 kernel + - LP: #513241 + + [ Surbhi Palande ] + + * SAUCE: Make populate_rootfs asynchronous + + [ Ubuntu: 2.6.31-20.57 ] + + * SAUCE: x86: brk away from exec rand area + - LP: #452175 + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Samsung + Q210/P210 laptops + - LP: #385683 + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Fujitsu Amilo + 1848+u + - LP: #458503 + * Revert "[Upstream] (drop after 2.6.31) acerhdf: fix fan control for + AOA150 model" + - LP: #494633 + * [Config] Disable CONFIG_USB_DEVICEFS + - LP: #488274 + * Revert "ext4: Don't update superblock write time when filesystem is + read-only" + - LP: #496816 + * Revert "ide: try to use PIO Mode 0 during probe if possible" + - LP: #503430 + * Revert "isdn: isdn_ppp: Use SKB list facilities instead of home-grown + implementation." + - LP: #503430 + * nilfs2: fix kernel oops in error case of nilfs_ioctl_move_blocks + - LP: #494633 + * cifs: don't use CIFSGetSrvInodeNumber in is_path_accessible + - LP: #494633 + * cifs: clean up handling when server doesn't consistently support inode + numbers + - LP: #494633 + * cifs: clear server inode number flag while autodisabling + - LP: #494633 + * CIFS: fix oops in cifs_lookup during net boot + - LP: #494633 + * CIFS: Duplicate data on appending to some Samba servers + - LP: #494633 + * rtl8187: Fix kernel oops when device is removed when LEDS enabled + - LP: #494633 + * md: don't clear endpoint for resync when resync is interrupted. + - LP: #494633 + * md/raid5: make sure curr_sync_completes is uptodate when reshape starts + - LP: #494633 + * md/raid1/raid10: add a cond_resched + - LP: #494633 + * ALSA: usb-audio: fix combine_word problem + - LP: #494633 + * ALSA: hda - Dell Studio 1557 hd-audio quirk + - LP: #494633 + * ALSA: AACI: fix AC97 multiple-open bug + - LP: #494633 + * ALSA: AACI: fix recording bug + - LP: #494633 + * jffs2: Fix memory corruption in jffs2_read_inode_range() + - LP: #494633 + * sound: rawmidi: disable active-sensing-on-close by default + - LP: #494633 + * sound: rawmidi: fix checking of O_APPEND when opening MIDI device + - LP: #494633 + * sound: rawmidi: fix double init when opening MIDI device with O_APPEND + - LP: #494633 + * sound: rawmidi: fix MIDI device O_APPEND error handling + - LP: #494633 + * highmem: Fix race in debug_kmap_atomic() which could cause warn_count + to underflow + - LP: #494633 + * highmem: Fix debug_kmap_atomic() to also handle KM_IRQ_PTE, KM_NMI, and + KM_NMI_PTE + - LP: #494633 + * powerpc: Fix DEBUG_HIGHMEM build break from d4515646699 + - LP: #494633 + * kmap: fix build errors with DEBUG_HIGHMEM enabled + - LP: #494633 + * V4L/DVB (13169): bttv: Fix potential out-of-order field processing + - LP: #494633 + * V4L/DVB (13170): bttv: Fix reversed polarity error when switching video + standard + - LP: #494633 + * V4L/DVB (13109): tda18271: fix signedness issue in + tda18271_rf_tracking_filters_init + - LP: #494633 + * V4L/DVB (13107): tda18271: fix overflow in FM radio frequency + calculation + - LP: #494633 + * V4L/DVB (13190): em28xx: fix panic that can occur when starting audio + streaming + - LP: #494633 + * V4L/DVB (13079): dib0700: fixed xc2028 firmware loading kernel oops + - LP: #494633 + * V4L/DVB (13230): s2255drv: Don't conditionalize video buffer completion + on waiting processes + - LP: #494633 + * uids: Prevent tear down race + - LP: #494633 + * pps: events reporting fix up + - LP: #494633 + * pps: locking scheme fix up for PPS_GETPARAMS + - LP: #494633 + * rtc: v3020: fix v3020_mmio_read_bit() + - LP: #494633 + * fs: add missing compat_ptr handling for FS_IOC_RESVSP ioctl + - LP: #494633 + * memcg: fix wrong pointer initialization at page migration when memcg is + disabled. + - LP: #494633 + * pidns: fix a leak in /proc dentries and inodes with pid namespaces. + - LP: #494633 + * page allocator: Do not allow interrupts to use ALLOC_HARDER + - LP: #494633 + * page allocator: always wake kswapd when restarting an allocation + attempt after direct reclaim failed + - LP: #494633 + * tty_port: If we are opened non blocking we still need to raise the + carrier + - LP: #494633 + * tty: cp210x: Fix carrier handling + - LP: #494633 + * USB: ohci: quirk AMD prefetch for USB 1.1 ISO transfer + - LP: #494633 + * USB: usbmon: fix bug in mon_buff_area_shrink + - LP: #494633 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #494633 + * USB: cdc_acm: Fix race condition when opening tty + - LP: #494633 + * USB: xhci: Fix bug memory free after failed initialization. + - LP: #494633 + * USB: xhci: Fix TRB physical to virtual address translation. + - LP: #494633 + * USB: xhci: Fix scratchpad deallocation. + - LP: #494633 + * iwlwifi: Use RTS/CTS as the preferred protection mechanism for 6000 + series + - LP: #494633 + * iwlwifi: Fix issue on file transfer stalled in HT mode + - LP: #494633 + * ima: replace GFP_KERNEL with GFP_NOFS + - LP: #494633 + * NFSv4: Fix a cache validation bug which causes getcwd() to return + ENOENT + - LP: #494633 + * fuse: reject O_DIRECT flag also in fuse_create + - LP: #494633 + * ASoC: Fix suspend with active audio streams + - LP: #494633 + * ASoC: AIC23: Fixing infinite loop in resume path + - LP: #494633 + * b43: Work around mac80211 race condition + - LP: #494633 + * rfkill: fix miscdev ops + - LP: #494633 + * thinkpad-acpi: fix sign of ERESTARTSYS return + - LP: #494633 + * Enable ACPI PDC handshake for VIA/Centaur CPUs + - LP: #494633 + * V4L/DVB (13436): cxusb: Fix hang on DViCO FusionHDTV DVB-T Dual Digital + 4 (rev 1) + - LP: #494633 + * V4L/DVB (13321): radio-gemtek-pci: fix double mutex_lock + - LP: #494633 + * V4L/DVB (12948): v4l1-compat: fix VIDIOC_G_STD handling + - LP: #494633 + * V4L/DVB (12280): gspca - sonixj: Remove auto gain/wb/expo for the + ov7660 sensor. + - LP: #494633 + * V4L/DVB (12356): gspca - sonixj: Webcam 0c45:6148 added + - LP: #494633 + * V4L/DVB (12501): gspca - sonixj: Do the ov7660 sensor work again. + - LP: #494633 + * V4L/DVB (12691): gspca - sonixj: Don't use mdelay(). + - LP: #494633 + * V4L/DVB (12696): gspca - sonixj / sn9c102: Two drivers for 0c45:60fc + and 0c45:613e. + - LP: #494633 + * drm/i915: Select CONFIG_SHMEM + - LP: #494633 + * drm: work around EDIDs with bad htotal/vtotal values + - LP: #494633, #460664 + * drm/i915: Fix IRQ stall issue on Ironlake + - LP: #494633 + * udp: Fix udp_poll() and ioctl() + - LP: #494633 + * acenic: Pass up error code from ace_load_firmware() + - LP: #494633 + * pkt_sched: pedit use proper struct + - LP: #494633 + * net: fix sk_forward_alloc corruption + - LP: #494633 + * bonding: Modify hash transmit policies to use the packet's source MAC + address + - LP: #494633 + * sfc: Set ip_summed correctly for page buffers passed to GRO + - LP: #494633 + * sparc64: replace parentheses in pmul() + - LP: #494633 + * sparc: Move of_set_property_mutex acquisition outside of devtree_lock + grab. + - LP: #494633 + * sched: Fix boot crash by zalloc()ing most of the cpu masks + - LP: #494633 + * sched: Fix isolcpus boot option + - LP: #494633 + * V4L/DVB (13202): smsusb: add autodetection support for three additional + Hauppauge USB IDs + - LP: #494633 + * V4L/DVB (13313): saa7134: add support for FORCE_TS_VALID mode for mpeg + ts input + - LP: #494633 + * V4L/DVB (13314): saa7134: set ts_force_val for the Hauppauge WinTV + HVR-1150 + - LP: #494633 + * speedstep-ich: fix error caused by + 394122ab144dae4b276d74644a2f11c44a60ac5c + - LP: #494633 + * USB: EHCI: don't send Clear-TT-Buffer following a STALL + - LP: #494633 + * USB: musb_gadget: fix STALL handling + - LP: #494633 + * usb: amd5536udc: fixed shared interrupt bug and warning oops + - LP: #494633 + * USB: ftdi_sio: Keep going when write errors are encountered. + - LP: #494633 + * USB: work around for EHCI with quirky periodic schedules + - LP: #435352, #494633 + * tty_port: handle the nonblocking open of a dead port corner case + - LP: #494633 + * pxamci: call mmc_remove_host() before freeing resources + - LP: #494633 + * param: don't complain about unused module parameters. + - LP: #494633 + * modules: don't export section names of empty sections via sysfs + - LP: #494633 + * md: revert incorrect fix for read error handling in raid1. + - LP: #494633 + * perf_event: Adjust frequency and unthrottle for non-group-leader events + - LP: #494633 + * hso: fix soft-lockup + - LP: #494633 + * block: use after free bug in __blkdev_get + - LP: #494633 + * hwmon: (adt7475) Fix temperature fault flags + - LP: #494633 + * hwmon: (adt7475) Cache limits for 60 seconds + - LP: #494633 + * agp/intel: new host bridge support + - LP: #494633 + * netfilter: nf_nat: fix NAT issue in 2.6.30.4+ + - LP: #494633 + * netfilter: xt_connlimit: fix regression caused by zero family value + - LP: #494633 + * b43: Fix DMA TX bounce buffer copying + - LP: #494633 + * crypto: padlock-aes - Use the correct mask when checking whether + copying is required + - LP: #494633 + * sky2: set carrier off in probe + - LP: #494633 + * ath5k: Linear PCDAC code fixes + - LP: #494633 + * i2c: Fix userspace_device list corruption + - LP: #494633 + * acerhdf: fix fan control for AOA150 model + - LP: #494633 + * drm/fb: fix FBIOGET/PUT_VSCREENINFO pixel clock handling + - LP: #494633 + * tty/of_serial: add missing ns16550a id + - LP: #494633 + * V4L/DVB (13255): gspca - m5602-s5k4aa: Add vflip quirk for the + Bruneinit laptop + - LP: #494633 + * V4L/DVB (13256): gspca - m5602-s5k4aa: Add another MSI GX700 vflip + quirk + - LP: #494633 + * V4L/DVB (13257): gspca - m5602-s5k4aa: Add vflip for Fujitsu Amilo Xi + 2528 + - LP: #494633 + * PCI: Prevent AER driver from being loaded on non-root port PCIE devices + - LP: #494633 + * acerhdf: additional BIOS versions + - LP: #494633 + * acerhdf: return temperature in milidegree instead of degree + - LP: #494633 + * Input: keyboard - fix braille keyboard keysym generation + - LP: #494633 + * Linux 2.6.31.7 + - LP: #494633 + * ext4: Fix memory leak fix when mounting an ext4 filesystem + - LP: #496816 + * jbd2: Fail to load a journal if it is too short + - LP: #496816 + * jbd2: round commit timer up to avoid uncommitted transaction + - LP: #496816 + * ext4: fix journal ref count in move_extent_par_page + - LP: #496816 + * ext4: Fix bugs in mballoc's stream allocation mode + - LP: #496816 + * ext4: Avoid group preallocation for closed files + - LP: #496816 + * jbd2: Annotate transaction start also for jbd2_journal_restart() + - LP: #496816 + * ext4: Fix possible deadlock between ext4_truncate() and + ext4_get_blocks() + - LP: #496816 + * ext4: reject too-large filesystems on 32-bit kernels + - LP: #496816 + * ext4: Add feature set check helper for mount & remount paths + - LP: #496816 + * ext4: Add missing unlock_new_inode() call in extent migration code + - LP: #496816 + * ext4: Allow rename to create more than EXT4_LINK_MAX subdirectories + - LP: #496816 + * ext4: Limit number of links that can be created by ext4_link() + - LP: #496816 + * ext4: Restore wbc->range_start in ext4_da_writepages() + - LP: #496816 + * ext4: fix cache flush in ext4_sync_file + - LP: #496816 + * ext4: Fix wrong comparisons in mext_check_arguments() + - LP: #496816 + * ext4: Remove unneeded BUG_ON() in ext4_move_extents() + - LP: #496816 + * ext4: Return exchanged blocks count to user space in failure + - LP: #496816 + * ext4: Take page lock before looking at attached buffer_heads flags + - LP: #496816 + * ext4: print more sysadmin-friendly message in check_block_validity() + - LP: #496816 + * ext4: Use bforget() in no journal mode for + ext4_journal_{forget,revoke}() + - LP: #496816 + * ext4: Assure that metadata blocks are written during fsync in no + journal mode + - LP: #496816 + * ext4: Make non-journal fsync work properly + - LP: #496816 + * ext4: move ext4_mb_init_group() function earlier in the mballoc.c + - LP: #496816 + * ext4: check for need init flag in ext4_mb_load_buddy + - LP: #496816 + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #496816 + * ext4: Always set dx_node's fake_dirent explicitly. + - LP: #496816 + * ext4: Fix initalization of s_flex_groups + - LP: #496816 + * ext4: Fix include/trace/events/ext4.h to work with Systemtap + - LP: #496816 + * ext4: Fix small typo for move_extent_per_page() + - LP: #496816 + * ext4: Replace get_ext_path macro with an inline funciton + - LP: #496816 + * ext4: Replace BUG_ON() with ext4_error() in move_extents.c + - LP: #496816 + * ext4: Add null extent check to ext_get_path + - LP: #496816 + * ext4: Fix different block exchange issue in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: limit block allocations for indirect-block files to < 2^32 + - LP: #496816 + * ext4: store EXT4_EXT_MIGRATE in i_state instead of i_flags + - LP: #496816 + * ext4: Fix the alloc on close after a truncate hueristic + - LP: #496816 + * ext4: Fix hueristic which avoids group preallocation for closed files + - LP: #496816 + * ext4: Adjust ext4_da_writepages() to write out larger contiguous chunks + - LP: #496816 + * ext4: release reserved quota when block reservation for delalloc retry + - LP: #496816 + * ext4: Split uninitialized extents for direct I/O + - LP: #496816 + * ext4: Use end_io callback to avoid direct I/O fallback to buffered I/O + - LP: #496816 + * ext4: async direct IO for holes and fallocate support + - LP: #496816 + * ext4: EXT4_IOC_MOVE_EXT: Check for different original and donor inodes + first + - LP: #496816 + * ext4: Avoid updating the inode table bh twice in no journal mode + - LP: #496816 + * ext4: Make sure ext4_dirty_inode() updates the inode in no journal mode + - LP: #496816 + * ext4: Handle nested ext4_journal_start/stop calls without a journal + - LP: #496816 + * ext4: Fix time encoding with extra epoch bits + - LP: #496816 + * ext4: fix a BUG_ON crash by checking that page has buffers attached to + it + - LP: #496816 + * ext4: retry failed direct IO allocations + - LP: #496816 + * ext4: discard preallocation when restarting a transaction during + truncate + - LP: #496816 + * ext4: fix ext4_ext_direct_IO()'s return value after converting uninit + extents + - LP: #496816 + * ext4: skip conversion of uninit extents after direct IO if there isn't + any + - LP: #496816 + * ext4: code clean up for dio fallocate handling + - LP: #496816 + * ext4: Fix return value of ext4_split_unwritten_extents() to fix direct + I/O + - LP: #496816 + * ext4: fix potential buffer head leak when add_dirent_to_buf() returns + ENOSPC + - LP: #496816 + * ext4: avoid divide by zero when trying to mount a corrupted file system + - LP: #496816 + * ext4: fix the returned block count if EXT4_IOC_MOVE_EXT fails + - LP: #496816 + * ext4: fix lock order problem in ext4_move_extents() + - LP: #496816 + * ext4: fix possible recursive locking warning in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: plug a buffer_head leak in an error path of ext4_iget() + - LP: #496816 + * ext4: make sure directory and symlink blocks are revoked + - LP: #496816 + * ext4: fix i_flags access in ext4_da_writepages_trans_blocks() + - LP: #496816 + * ext4: journal all modifications in ext4_xattr_set_handle + - LP: #496816 + * ext4: don't update the superblock in ext4_statfs() + - LP: #496816 + * ext4: fix uninit block bitmap initialization when s_meta_first_bg is + non-zero + - LP: #496816 + * ext4: fix block validity checks so they work correctly with meta_bg + - LP: #496816 + * ext4: avoid issuing unnecessary barriers + - LP: #496816 + * ext4: fix error handling in ext4_ind_get_blocks() + - LP: #496816 + * ext4: make trim/discard optional (and off by default) + - LP: #496816 + * ext4: make "norecovery" an alias for "noload" + - LP: #496816 + * ext4: Fix double-free of blocks with EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: initialize moved_len before calling ext4_move_extents() + - LP: #496816 + * ext4: move_extent_per_page() cleanup + - LP: #496816 + * jbd2: Add ENOMEM checking in and for + jbd2_journal_write_metadata_buffer() + - LP: #496816 + * ext4: Return the PTR_ERR of the correct pointer in + setup_new_group_blocks() + - LP: #496816 + * ext4: Avoid data / filesystem corruption when write fails to copy data + - LP: #496816 + * ext4: wait for log to commit when umounting + - LP: #496816 + * ext4: remove blocks from inode prealloc list on failure + - LP: #496816 + * ext4: ext4_get_reserved_space() must return bytes instead of blocks + - LP: #496816 + * ext4: quota macros cleanup + - LP: #496816 + * ext4: fix incorrect block reservation on quota transfer. + - LP: #496816 + * ext4: Wait for proper transaction commit on fsync + - LP: #496816 + * SCSI: megaraid_sas: fix 64 bit sense pointer truncation + - LP: #496816 + * SCSI: osd_protocol.h: Add missing #include + - LP: #496816 + * SCSI: scsi_lib_dma: fix bug with dma maps on nested scsi objects + - LP: #496816 + * signal: Fix alternate signal stack check + - LP: #496816 + * ext4: Fix potential fiemap deadlock (mmap_sem vs. i_data_sem) + - LP: #496816 + * Linux 2.6.31.8 + - LP: #496816 + * USB: option: add pid for ZTE + - LP: #503430 + * USB: usb-storage: fix bug in fill_inquiry + - LP: #503430 + * firewire: ohci: handle receive packets with a data length of zero + - LP: #503430 + * ALSA: hda - Terradici HDA controllers does not support 64-bit mode + - LP: #503430 + * ALSA: hrtimer - Fix lock-up + - LP: #503430 + * ath5k: allow setting txpower to 0 + - LP: #503430 + * ath5k: enable EEPROM checksum check + - LP: #503430 + * bsdacct: fix uid/gid misreporting + - LP: #503430 + * debugfs: fix create mutex racy fops and private data + - LP: #503430 + * devpts_get_tty() should validate inode + - LP: #503430 + * futex: Take mmap_sem for get_user_pages in fault_in_user_writeable + - LP: #503430 + * hfs: fix a potential buffer overflow + - LP: #503430 + * hrtimer: Fix /proc/timer_list regression + - LP: #503430 + * jbd2: don't wipe the journal on a failed journal checksum + - LP: #503430 + * KVM: s390: Make psw available on all exits, not just a subset + - LP: #503430 + * md/bitmap: protect against bitmap removal while being updated. + - LP: #503430 + * pata_hpt{37x|3x2n}: fix timing register masks (take 2) + - LP: #503430 + * pxa/em-x270: fix usb hub power up/reset sequence + - LP: #503430 + * ssb: Fix range check in sprom write + - LP: #503430 + * SUNRPC: IS_ERR/PTR_ERR confusion + - LP: #503430 + * USB: Close usb_find_interface race v3 + - LP: #503430 + * USB: musb_gadget_ep0: fix unhandled endpoint 0 IRQs, again + - LP: #503430 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #503430 + * USB: usb-storage: add BAD_SENSE flag + - LP: #503430 + * USB: usbtmc: repeat usb_bulk_msg until whole message is transfered + - LP: #503430 + * V4L/DVB: Fix test in copy_reg_bits() + - LP: #503430 + * x86: Add new Intel CPU cache size descriptors + - LP: #503430 + * x86/amd-iommu: attach devices to pre-allocated domains early + - LP: #503430 + * x86/amd-iommu: un__init iommu_setup_msi + - LP: #503430 + * x86, apic: Enable lapic nmi watchdog on AMD Family 11h + - LP: #503430 + * x86: ASUS P4S800 reboot=bios quirk + - LP: #366682, #503430 + * x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking + up the PCI tree + - LP: #503430 + * x86: Fix iommu=nodac parameter handling + - LP: #503430 + * x86: Fix typo in Intel CPU cache size descriptor + - LP: #503430 + * x86: GART: pci-gart_64.c: Use correct length in strncmp + - LP: #503430 + * drm/radeon/kms: Add quirk for HIS X1300 board + - LP: #503430 + * drm/radeon/kms: fix legacy crtc2 dpms + - LP: #503430 + * mac80211: Fix bug in computing crc over dynamic IEs in beacon + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in mincore() + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in walk_page_range() + - LP: #503430 + * powerpc: Fix usage of 64-bit instruction in 32-bit altivec code + - LP: #503430 + * Serial: Do not read IIR in serial8250_start_tx when UART_BUG_TXEN + - LP: #503430 + * ide: Serialize CMD643 and CMD646 to fix a hardware bug with SSD + - LP: #503430 + * ide: fix ioctl to pass requested transfer mode to ide_find_dma_mode + instead of UDMA6 + - LP: #503430 + * slc90e66: fix UDMA handling + - LP: #503430 + * Au1x00: fix crash when trying register_netdev() + - LP: #503430 + * b44 WOL setup: one-bit-off stack corruption kernel panic fix + - LP: #503430 + * b44: Fix wedge when using netconsole. + - LP: #503430 + * gro: Fix illegal merging of trailer trash + - LP: #503430 + * ip_fragment: also adjust skb->truesize for packets not owned by a + socket + - LP: #503430 + * net: Fix the rollback test in dev_change_name() + - LP: #503430 + * NET: smc91x: Fix irq flags + - LP: #503430 + * smsc9420: prevent BUG() if ethtool is called with interface down + - LP: #503430 + * vlan: Fix register_vlan_dev() error path + - LP: #503430 + * sparc64: Fix definition of VMEMMAP_SIZE. + - LP: #503430 + * sunsab: Do not set sunsab_reg.cons right before registering minors. + - LP: #503430 + * sunsu: Fix detection of SU ports which are RSC console or control. + - LP: #503430 + * serial: suncore: Add 'ignore_line' argument to + sunserial_console_match(). + - LP: #503430 + * serial: suncore: Fix RSC/LOM handling in sunserial_console_termios(). + - LP: #503430 + * sunsu: Pass true 'ignore_line' to console match when RSC or LOM + console. + - LP: #503430 + * sunsu: Use sunserial_console_termios() in sunsu_console_setup(). + - LP: #503430 + * sparc64: Don't specify IRQF_SHARED for LDC interrupts. + - LP: #503430 + * sparc64: Fix overly strict range type matching for PCI devices. + - LP: #503430 + * sparc64: Fix stack debugging IRQ stack regression. + - LP: #503430 + * sparc: Set UTS_MACHINE correctly. + - LP: #503430 + * x86/mce: Set up timer unconditionally + - LP: #503430 + * b43legacy: avoid PPC fault during resume + - LP: #503430 + * p54usb: Remove DMA buffer from stack + - LP: #503430 + * x86: Under BIOS control, restore AP's APIC_LVTTHMR to the BSP value + - LP: #503430 + * ACPI: Use the ARB_DISABLE for the CPU which model id is less than 0x0f. + - LP: #503430, #481765 + * asus-laptop: change light sens default values. + - LP: #503430 + * backlight: lcd - Fix wrong sizeof + - LP: #503430 + * drm/i915: Avoid NULL dereference with component_only tv_modes + - LP: #503430, #494045 + * drm/i915: Fix CRT hotplug detect by checking really no channels + attached + - LP: #503430 + * drm/i915: Fix LVDS stability issue on Ironlake + - LP: #503430 + * drm/i915: save/restore BLC histogram control reg across suspend/resume + - LP: #503430, #292256 + * drm/i915: PineView only has LVDS and CRT ports + - LP: #503430 + * ext3: Fix data / filesystem corruption when write fails to copy data + - LP: #503430 + * ipvs: zero usvc and udest + - LP: #503430 + * ipw2100: fix rebooting hang with driver loaded + - LP: #503430 + * jffs2: Fix long-standing bug with symlink garbage collection. + - LP: #503430 + * matroxfb: fix problems with display stability + - LP: #503430 + * net: Fix userspace RTM_NEWLINK notifications. + - LP: #503430 + * thinkpad-acpi: fix default brightness_mode for R50e/R51 + - LP: #503430 + * thinkpad-acpi: preserve rfkill state across suspend/resume + - LP: #503430 + * V4L/DVB (13116): gspca - ov519: Webcam 041e:4067 added. + - LP: #503430 + * powerpc/therm_adt746x: Record pwm invert bit at module load time] + - LP: #503430 + * drm/i915: Fix sync to vblank when VGA output is turned off + - LP: #503430, #494461 + * Linux 2.6.31.9 + - LP: #503430 + * drm/i915: Refactor save/restore code + - LP: #504273 + * drm/i915: Ironlake suspend/resume support + - LP: #504273 + * drm/i915: Fix and cleanup DPLL calculation for Ironlake + - LP: #504273 + * drm/i915: HDMI hardware workaround for Ironlake + - LP: #504273 + * drm/i915: Add more registers save/restore for Ironlake suspend + - LP: #504273 + * drm/i915: Add ACPI OpRegion support for Ironlake + - LP: #504273 + * drm/i915: Add display hotplug event on Ironlake + - LP: #504273 + * cdc_ether: additional Ericsson MBM PID's to the whitelist + - LP: #476071 + * drm/i915: remove loop in Ironlake interrupt handler + - LP: #510722 + * modules: Skip empty sections when exporting section notes + - LP: #511129 + * ath5k: Fix eeprom checksum check for custom sized eeproms + - LP: #506180 + + [ Ubuntu: 2.6.31-19.56 ] + + * [Upstream] e1000: enhance frame fragment detection + - CVE-2009-4536 + * [Upstream] e1000e: enhance frame fragment detection + - CVE-2009-4538 + * hfs: fix a potential buffer overflow + - CVE-2009-4020 + * KVM: x86 emulator: limit instructions to 15 bytes + - CVE-2009-4031 + * ext4: Avoid null pointer dereference when decoding EROFS w/o a journal + - CVE-2009-4308 + * firewire: ohci: handle receive packets with a data length of zero + - CVE-2009-4138 + * fasync: split 'fasync_helper()' into separate add/remove functions + - CVE-2009-4141 + * ipv6: skb_dst() can be NULL in ipv6_hop_jumbo(). + - CVE-2010-0006 + * kernel/signal.c: fix kernel information leak with print-fatal-signals=1 + - CVE-2010-0003 + * netfilter: ebtables: enforce CAP_NET_ADMIN + - CVE-2010-0007 + * untangle the do_mremap() mess + - CVE-2010-0291 + + -- Andy Whitcroft Tue, 09 Feb 2010 10:44:08 +0000 + +linux-fsl-imx51 (2.6.31-603.5) lucid; urgency=low + + [ Bryan Wu ] + + * [Config] Enable devtmpfs for fsl-imx51 kernel + - LP: #512321 + * SAUCE: IMX51: only export NEON flag to userspace on Freescale iMX51 + rev3.x or later silicon + - LP: #507416 + + [ Heiko Carstens ] + + * (pre-stable) driver-core: fix devtmpfs crash on s390 + - LP: #512370 + + [ Kay Sievers ] + + * (pre-stable) Driver-Core: devtmpfs - set root directory mode to 0755 + - LP: #512370 + + [ Upstream Kernel Changes ] + + * ENGR00119069 V4L2 capture: Do not change current crop setting for tvin. + * ENGR00118830 Update NAND driver scan scheme to support new nand type + * ENGR00118946 imx23: enable wake up from USB 5V + * ENGR00119150 Bluetooth: Handsfree audio has noise + * ENGR00118610 MX23: Add double buffering for PXP + * ENGR00118872 Write bootstream to kernel by kobs with BCH ECC + * ENGR00119199: ipu: add clock nodes for pixel clocks + * ENGR00119202: Fix DVFS-PER related bugs. + * ENGR00119203 MX23: Correct VDDD value for CPU frequency 360 MHz + * ENGR00119004 v4l2 output: fix kernel dump + * ENGR00119242 Add wait timeout support to void dead loop in NAND driver + * ENGR00119263: MX51 : Fix pll_set_rate function + * ENGR00119075 fix iMX23 USB initialization cause wrong power status + * ENGR00118892 MX23: iMX233 disable lcd clock when LCD off + * ENGR00119063 MX23: fix system halt rather than reboot when watchdog + timeout + * ENGR00119324 Put GPMI NAND flash scan scheme code to the common NAND + directory + * ENGR00114151 800x600-16@60 video not play correctly + * ENGR00119275 ipuv3: dmfc size control + * ENGR00119443 [MX23_BSP] GPMI driver computes wrong block size for + K9GAG08U0D + * ENGR00119136 ipuv3: support 720p for ipu lib + * ENGR00119274 TVE: HDTV can not work + * ENGR00119104 MX23 ALSA: Resolve the problem of record from line-in + * ENGR00119081 V4l2 capture:Support NV12 output pixel format for still + capture + * ENGR00119179 TVE: fix system hang for tvout + * ENGR00119070 IPUv3 FB:Support DP local alpha in pixel + * ENGR00119432 MX35 system can't re-boot up when SD/MMC boot is used. + * ENGR00119296 Fix iMX23 display abnormal when change frequency + * ENGR00119484 Update NFC INT wait timeout value to 1s + * ENGR00119504 MX25: Change nand partition for bootloader to 3M byte + * ENGR00119532 MX35: Change nand partition for bootloader to 3M bytes + * ENGR00119305 imx23: fix ethernet standby issue + * ENGR00115370 ipuv3: add display control + * ENGR00119531 ipuv3: dmfc setting restore during resume + * Driver Core: devtmpfs - kernel-maintained tmpfs-based /dev + - LP: #512321 + + -- Andy Whitcroft Wed, 27 Jan 2010 10:30:45 +0000 + +linux-fsl-imx51 (2.6.31-602.4) lucid; urgency=low + + [ Amit Kucheria ] + + * Update to official 2.6.31 BSP release from Freescale + + [ Andy Whitcroft ] + + * drop a number of modules no longer built + + [ Bryan Wu ] + + * [Config] Update configs after applying .31 patchset from Freescale + * [Config] Sync with imx51_defconfig from Freescale BSP + + [ Upstream Kernel Changes ] + + * Update to official 2.6.31 BSP release from Freescale. + + -- Andy Whitcroft Mon, 11 Jan 2010 16:26:27 +0000 + +linux-fsl-imx51 (2.6.31-601.3) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-17.54 + + [ Dinh Nguyen ] + + * SAUCE: Workaround for SATA drive failure on Ubuntu installation + - LP: #431963 + + [ Ubuntu: 2.6.31-17.54 ] + + * security merge of Ubuntu-2.6.31-16.53 + + [ Ubuntu: 2.6.31-16.53 ] + + * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT + - LP: #492659 + - CVE-2009-4131 + + -- Andy Whitcroft Wed, 16 Dec 2009 11:59:38 +0000 + +linux-fsl-imx51 (2.6.31-601.2) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-17.53 + + [ Ubuntu: 2.6.31-17.53 ] + + * SAUCE: AppArmor: Fix oops after profile removal + - LP: #475619 + * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds + - LP: #437258 + * SAUCE: AppArmor: Fix cap audit_caching preemption disabling + - LP: #479102 + * SAUCE: AppArmor: Fix refcounting bug causing leak of creds + - LP: #479115 + * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe + transition. + - LP: #480112 + * Revert "[Upstream] (drop after 2.6.31) usb-storage: Workaround devices + with bogus sense size" + - LP: #461556 + * Revert "[Upstream] (drop after 2.6.31) Input: synaptics - add another + Protege M300 to rate blacklist" + - LP: #480144 + * [Config] udeb: Add squashfs to fs-core-modules + - LP: #352615 + * Revert "e1000e: swap max hw supported frame size between 82574 and + 82583" + - LP: #461556 + * Revert "drm/i915: Fix FDI M/N setting according with correct color + depth" + - LP: #480144 + * Revert "agp/intel: Add B43 chipset support" + - LP: #480144 + * Revert "drm/i915: add B43 chipset support" + - LP: #480144 + * Revert "ACPI: Attach the ACPI device to the ACPI handle as early as + possible" + - LP: #327499, #480144 + * SCSI: Retry ADD_TO_MLQUEUE return value for EH commands + - LP: #461556 + * SCSI: Fix protection scsi_data_buffer leak + - LP: #461556 + * SCSI: sg: Free data buffers after calling blk_rq_unmap_user + - LP: #461556 + * ARM: pxa: workaround errata #37 by not using half turbo switching + - LP: #461556 + * tracing/filters: Fix memory leak when setting a filter + - LP: #461556 + * x86/paravirt: Use normal calling sequences for irq enable/disable + - LP: #461556 + * USB: ftdi_sio: remove tty->low_latency + - LP: #461556 + * USB: ftdi_sio: remove unused rx_byte counter + - LP: #461556 + * USB: ftdi_sio: clean up read completion handler + - LP: #461556 + * USB: ftdi_sio: re-implement read processing + - LP: #461556 + * USB: pl2303: fix error characters not being reported to ldisc + - LP: #461556 + * USB: digi_acceleport: Fix broken unthrottle. + - LP: #461556 + * USB: serial: don't call release without attach + - LP: #461556 + * USB: option: Toshiba G450 device id + - LP: #461556 + * USB: ipaq: fix oops when device is plugged in + - LP: #461556 + * USB: cp210x: Add support for the DW700 UART + - LP: #461556 + * USB: Fix throttling in generic usbserial driver + - LP: #461556 + * USB: storage: When a device returns no sense data, call it a Hardware + Error + - LP: #400652, #461556 + * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 + - LP: #461556 + * intel-iommu: Cope with broken HP DC7900 BIOS + - LP: #461556 + * futex: Detect mismatched requeue targets + - LP: #461556 + * futex: Fix wakeup race by setting TASK_INTERRUPTIBLE before queue_me() + - LP: #461556 + * tpm-fixup-pcrs-sysfs-file-update + - LP: #461556 + * TPM: fix pcrread + - LP: #461556 + * Bluetooth: Disconnect HIDRAW devices on disconnect + - LP: #461556 + * Bluetooth: Add extra device reference counting for connections + - LP: #461556 + * Bluetooth: Let HIDP grab the device reference for connections + - LP: #461556 + * connector: Keep the skb in cn_callback_data + - LP: #461556 + * connector: Provide the sender's credentials to the callback + - LP: #461556 + * connector: Removed the destruct_data callback since it is always + kfree_skb() + - LP: #461556 + * dm/connector: Only process connector packages from privileged processes + - LP: #461556 + * dst/connector: Disallow unpliviged users to configure dst + - LP: #461556 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - LP: #461556 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - LP: #461556 + * e1000e: swap max hw supported frame size between 82574 and 82583 + - LP: #461556, #445572 + * MAINTAINERS: Fix Riku Voipio's address + - LP: #461556 + * macintosh: Don't assume i2c device probing always succeeds + - LP: #461556 + * i2c: Hide probe errors caused by ACPI resource conflicts + - LP: #461556 + * ALSA: Don't assume i2c device probing always succeeds + - LP: #461556 + * bsdacct: switch credentials for writing to the accounting file + - LP: #461556 + * sysfs: Allow sysfs_notify_dirent to be called from interrupt context. + - LP: #461556 + * Staging: rt2860sta: prevent a panic when disabling when associated + - LP: #461556, #404626 + * usb-storage: Workaround devices with bogus sense size + - LP: #461556, #446146 + * iwlwifi: incorrect method used for finding valid OTP blocks + - LP: #461556 + * mac80211: fix vlan and optimise RX + - LP: #461556 + * tty: Make flush_to_ldisc() locking more robust + - LP: #461556 + * Linux 2.6.31.5 + - LP: #461556 + * fs: pipe.c null pointer dereference + - LP: #480144 + * pci: increase alignment to make more space for hidden code + - LP: #407824, #480144, #474577 + * libata: fix internal command failure handling + - LP: #480144 + * libata: fix PMP initialization + - LP: #480144 + * sata_nv: make sure link is brough up online when skipping hardreset + - LP: #480144 + * nfs: Fix nfs_parse_mount_options() kfree() leak + - LP: #480144 + * KVM: use proper hrtimer function to retrieve expiration time + - LP: #480144 + * KVM: ignore reads from AMDs C1E enabled MSR + - LP: #480144 + * futex: Handle spurious wake up + - LP: #480144 + * futex: Check for NULL keys in match_futex + - LP: #480144 + * futex: Move drop_futex_key_refs out of spinlock'ed region + - LP: #480144 + * futex: Fix spurious wakeup for requeue_pi really + - LP: #480144 + * ahci: revert "Restore SB600 sata controller 64 bit DMA" + - LP: #480144 + * sparc64: Set IRQF_DISABLED on LDC channel IRQs. + - LP: #480144 + * watchdog: Fix rio watchdog probe function + - LP: #480144 + * Input: synaptics - add another Protege M300 to rate blacklist + - LP: #480144 + * dm snapshot: free exception store on init failure + - LP: #480144 + * dm snapshot: sort by chunk size to fix race + - LP: #480144 + * dm log: userspace fix incorrect luid cast in userspace_ctr + - LP: #480144 + * dm: add missing del_gendisk to alloc_dev error path + - LP: #480144 + * dm: dec_pending needs locking to save error value + - LP: #480144 + * dm exception store: fix failed set_chunk_size error path + - LP: #480144 + * dm snapshot: lock snapshot while supplying status + - LP: #480144 + * dm snapshot: require non zero chunk size by end of ctr + - LP: #480144 + * dm snapshot: use unsigned integer chunk size + - LP: #480144 + * ray_cs: Fix copy_from_user handling + - LP: #480144 + * mbind(): fix leak of never putback pages + - LP: #480144 + * do_mbind(): fix memory leak + - LP: #480144 + * 8250_pci: add IBM Saturn serial card + - LP: #480144 + * dpt_i2o: Fix up copy*user + - LP: #480144 + * dpt_i2o: Fix typo of EINVAL + - LP: #480144 + * hfsplus: refuse to mount volumes larger than 2TB + - LP: #480144 + * Driver core: fix driver_register() return value + - LP: #480144 + * param: fix lots of bugs with writing charp params from sysfs, by + leaking mem. + - LP: #480144 + * param: fix NULL comparison on oom + - LP: #480144 + * param: fix setting arrays of bool + - LP: #480144 + * USB: serial: sierra driver send_setup() autopm fix + - LP: #480144 + * USB: option: Patch for Huawei Mobile Broadband E270+ Modem + - LP: #480144 + * USB: option: Support for AIRPLUS MCD650 Datacard + - LP: #480144 + * USB: option: TLAYTECH TUE800 support + - LP: #456264, #480144 + * libertas if_usb: Fix crash on 64-bit machines + - LP: #480144 + * cpuidle: always return with interrupts enabled + - LP: #480144 + * virtio: order used ring after used index read + - LP: #480144 + * CIFS: Fixing to avoid invalid kfree() in cifs_get_tcp_session() + - LP: #480144 + * mac80211: fix for incorrect sequence number on hostapd injected frames + - LP: #480144 + * mac80211: check interface is down before type change + - LP: #480144 + * x86, UV: Fix information in __uv_hub_info structure + - LP: #480144 + * x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi() + - LP: #480144 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - LP: #480144 + * mm: remove incorrect swap_count() from try_to_unuse() + - LP: #480144 + * x86-64: Fix register leak in 32-bit syscall audting + - LP: #480144 + * nilfs2: fix dirty page accounting leak causing hang at write + - LP: #480144 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #480144 + * drm/i915: fix to setup display reference clock control on Ironlake + - LP: #480144 + * drm/i915: fix panel fitting filter coefficient select for Ironlake + - LP: #480144 + * agp/intel: Add B43 chipset support + - LP: #480144 + * drm/i915: add B43 chipset support + - LP: #480144 + * xen/hvc: make sure console output is always emitted, with explicit + polling + - LP: #480144 + * xen: mask extended topology info in cpuid + - LP: #480144 + * sgi-gru: decrapfiy options_write() function + - LP: #480144 + * KVM: get_tss_base_addr() should return a gpa_t + - LP: #480144 + * fuse: prevent fuse_put_request on invalid pointer + - LP: #480144 + * fuse: fix kunmap in fuse_ioctl_copy_user + - LP: #480144 + * x86/amd-iommu: Workaround for erratum 63 + - LP: #480144 + * fsnotify: do not set group for a mark before it is on the i_list + - LP: #480144 + * mips: fix build of vmlinux.lds + - LP: #480144 + * alpha: fix build after vmlinux.lds.S cleanup + - LP: #480144 + * ACPI / PCI: Fix NULL pointer dereference in acpi_get_pci_dev() (rev. 2) + - LP: #480144 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - LP: #480144 + * b43: Fix Bugzilla #14181 and the bug from the previous 'fix' + - LP: #476154, #480144 + * pata_sc1200: Fix crash on boot + - LP: #480144 + * AF_UNIX: Fix deadlock on connecting to shutdown socket (CVE-2009-3621) + - LP: #480144 + * ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@ + - LP: #480144 + * bonding: fix a race condition in calls to slave MII ioctls + - LP: #480144 + * hwmon: (it87) Fix VID reading on IT8718F/IT8720F + - LP: #480144 + * netlink: fix typo in initialization (CVE-2009-3612) + - LP: #480144 + * nfs: Avoid overrun when copying client IP address string + - LP: #480144 + * nfs: Panic when commit fails + - LP: #480144 + * NFSv4: Fix a bug when the server returns NFS4ERR_RESOURCE + - LP: #480144 + * NFSv4: Fix two unbalanced put_rpccred() issues. + - LP: #459265, #480144 + * NFSv4: Kill nfs4_renewd_prepare_shutdown() + - LP: #480144 + * NFSv4: The link() operation should return any delegation on the file + - LP: #480144 + * powerpc: Remove SMP warning from PowerMac cpufreq + - LP: #480144 + * vmscan: limit VM_EXEC protection to file pages + - LP: #480144 + * x86: mce: Clean up thermal throttling state tracking code + - LP: #480144 + * x86: mce: Fix thermal throttling message storm + - LP: #453444, #480144 + * iwlwifi: fix potential rx buffer loss + - LP: #480144 + * iwlwifi: reduce noise when skb allocation fails + - LP: #480144 + * x86/amd-iommu: Un__init function required on shutdown + - LP: #480144 + * KVM: Prevent kvm_init from corrupting debugfs structures + - LP: #480144 + * powerpc/pmac: Fix PowerSurge SMP IPI allocation + - LP: #480144 + * powerpc/pmac: Fix issues with sleep on some powerbooks + - LP: #480144 + * powerpc/pci: Fix regression in powerpc MSI-X + - LP: #480144 + * powerpc: Fix some late PowerMac G5 with PCIe ATI graphics + - LP: #480144 + * sata_via: Remove redundant device ID for VIA VT8261 + - LP: #480144 + * pata_via: extend the rev_max for VT6330 + - LP: #480144 + * PM / yenta: Split resume into early and late parts (rev. 4) + - LP: #480144 + * Linux 2.6.31.6 + - LP: #480144 + + [ Ubuntu: 2.6.31-16.52 ] + + * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable + permissions + - CVE-2009-3939 + * fs: pipe.c null pointer dereference + - CVE-2009-3547 + * netlink: fix typo in initialization + - CVE-2009-3612 + * drm/r128: Add test for initialisation to all ioctls that require it + - CVE-2009-3620 + * AF_UNIX: Fix deadlock on connecting to shutdown socket + - CVE-2009-3621 + * nfsd4: use common rpc_cred for all callbacks + - CVE-2009-3623 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - CVE-2009-3624 + * connector: Keep the skb in cn_callback_data + - CVE-2009-3725 + * connector: Provide the sender's credentials to the callback + - CVE-2009-3725 + * connector: Fix incompatible pointer type warning + - CVE-2009-3725 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - CVE-2009-3725 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - CVE-2009-3725 + * dst/connector: Disallow unpliviged users to configure dst + - CVE-2009-3725 + * dm/connector: Only process connector packages from privileged processes + - CVE-2009-3725 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - CVE-2009-3888 + * isdn: hfc_usb: Fix read buffer overflow + - CVE-2009-4005 + * gdth: Prevent negative offsets in ioctl CVE-2009-3080 + - CVE-2009-3080 + * mac80211: fix spurious delBA handling + - LP: #491301 + * mac80211: fix two remote exploits + - LP: #491301 + * ipv4: additional update of dev_net(dev) to struct *net in ip_fragment.c + - LP: #491301 + + [ Ubuntu: 2.6.31-15.50 ] + + * SAUCE: Fix nx_enable reporting + - LP: #454285 + + -- Andy Whitcroft Fri, 04 Dec 2009 20:48:31 +0000 + +linux-fsl-imx51 (2.6.31-600.1) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-15.49 + + [ Ubuntu: 2.6.31-15.49 ] + + * [Upstream] (drop after 2.6.31) usb-storage: Workaround devices with + bogus sense size + - LP: #446146 + * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied + - LP: #453335 + * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem + - LP: #458299 + * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly + - LP: #462824 + * SAUCE: AppArmor: AppArmor disallows truncate of deleted files. + - LP: #451375 + * SAUCE: [x86] fix report of cs-limit nx-emulation + - LP: #454285 + * Revert "SAUCE: trace: add trace_event for the open() syscall" + * SAUCE: trace: add trace events for open(), exec() and uselib() + - LP: #462111 + * SAUCE: Fix sub-flavour script to not stop on missing directories + - LP: #453073 + * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege + M300 to rate blacklist + - LP: #433801 + * PM: Make warning in suspend_test_finish() less likely to happen + - LP: #464552 + + [ Ubuntu: 2.6.31-14.48 ] + + * Add more e100 firmware to nic-modules + - LP: #451872 + * Add qla1280 firmware to scsi-modules + - LP: #381037 + + [ Ubuntu: 2.6.31-14.47 ] + + * SAUCE: dell-laptop: Store the HW switch status internally rather than + requerying every time + - LP: #430809 + * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop + - LP: #430809 + + -- Andy Whitcroft Tue, 03 Nov 2009 11:20:59 +0000 + +linux-fsl-imx51 (2.6.31-105.14) karmic; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-14.46 + * [Config] update configs since rebase to Ubuntu-2.6.31-14.46 + * lirc update dropped module lirc_mceusb2 + + [ Upstream Kernel Changes ] + + * mxc spi: fix spi driver for 2.6.31 + - LP: #427289, #446140 + + [ Ubuntu: 2.6.31-14.46 ] + + * reinstate armel.mk with no flavours + - LP: #449637 + * [Upstream] elevator: fix fastfail checks to allow merge of readahead + requests + - LP: #444915 + * [Upstream] block: silently error unsupported empty barriers too + - LP: #420423 + * SAUCE: AppArmor: Fix mediation of "deleted" paths + - LP: #415632 + * [Config] CONFIG_X86_MCE + https://lists.ubuntu.com/archives/kernel-team/2009-October/007584.html + * Revert "appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903" - Use patch from 2.6.31.4 which is slightly different. + * x86: fix csum_ipv6_magic asm memory clobber + * tty: Avoid dropping ldisc_mutex over hangup tty re-initialization + * x86: Don't leak 64-bit kernel register values to 32-bit processes + * tracing: correct module boundaries for ftrace_release + * ftrace: check for failure for all conversions + * futex: fix requeue_pi key imbalance + * futex: Move exit_pi_state() call to release_mm() + * futex: Nullify robust lists after cleanup + * futex: Fix locking imbalance + * NOHZ: update idle state also when NOHZ is inactive + * ima: ecryptfs fix imbalance message + * libata: fix incorrect link online check during probe + * sound: via82xx: move DXS volume controls to PCM interface + * ASoC: WM8350 capture PGA mutes are inverted + * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID + * KVM: VMX: flush TLB with INVEPT on cpu migration + * KVM: fix LAPIC timer period overflow + * KVM: SVM: Fix tsc offset adjustment when running nested + * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly + * net: Fix wrong sizeof + * mm: add_to_swap_cache() must not sleep + * sis5513: fix PIO setup for ATAPI devices + * PIT fixes to unbreak suspend/resume (bug #14222) + * IMA: open new file for read + * ACPI: Clarify resource conflict message + * ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression + * net: restore tx timestamping for accelerated vlans + * net: unix: fix sending fds in multiple buffers + * tun: Return -EINVAL if neither IFF_TUN nor IFF_TAP is set. + * tcp: fix CONFIG_TCP_MD5SIG + CONFIG_PREEMPT timer BUG() + * net: Fix sock_wfree() race + * smsc95xx: fix transmission where ZLP is expected + * sky2: Set SKY2_HW_RAM_BUFFER in sky2_init + * appletalk: Fix skb leak when ipddp interface is not loaded + * ax25: Fix possible oops in ax25_make_new + * ax25: Fix SIOCAX25GETINFO ioctl + * sit: fix off-by-one in ipip6_tunnel_get_prl + * Linux 2.6.31.4 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #416792 + + [ Ubuntu: 2.6.31-13.45 ] + + * [Config] Add sd_mod to scsi-modules udeb for powerpc + * SAUCE: Update to LIRC 0.8.6 + - LP: #432678 + * [Config] CONFIG_X86_PAT=y + https://lists.ubuntu.com/archives/kernel-team/2009-October/007477.html + https://lists.ubuntu.com/archives/kernel-team/2009-October/007534.html + * [Config] Add armel arch to linux-libc-dev arches. + - LP: #449637 + * e1000e: swap max hw supported frame size between 82574 and 82583 + * drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI. + - LP: #392017 + * ALSA: hda - Add quirks for some HP laptops + - LP: #449742 + * ALSA: hda - Add support for HP dv6 + - LP: #449742 + + [ Ubuntu: 2.6.31-13.44 ] + + * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584 + * appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903 + Note - This patch causes an ABI change in the symbol aarp_send_ddp + which I'm ignoring. + + -- Andy Whitcroft Tue, 13 Oct 2009 15:59:33 +0100 + +linux-fsl-imx51 (2.6.31-104.13) karmic; urgency=low + + [ Andy Whitcroft ] + + * fix FTBFS due to sound being built in + + -- Andy Whitcroft Sat, 10 Oct 2009 18:58:18 +0100 + +linux-fsl-imx51 (2.6.31-104.12) karmic; urgency=low + + [ Alan Tull ] + + * SAUCE: IMX51: A hack which allows the sound driver to initialize. + + [ Amit Kucheria ] + + * Disable CONFIG_UEVENT_HELPER_PATH + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-13.42 + * rebase to Ubuntu-2.6.31-13.43 + + [ Brad Figg ] + + * CONFIG: IMX51: change SGTL5000 driver to be builtin instead of a + module. + + [ Colin Watson ] + + * Use section 'admin' rather than 'base' + + [ Jeremy Kerr ] + + * SAUCE: drivers/net/fec: Convert to a platform bus driver + - LP: #438687 + + [ Tim Gardner ] + + * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y + - LP: #416325 + + [ Upstream Kernel Changes ] + + * ENGR00107785 sgtl5000: adc power savings + * sgtl5000 audio: more porting to 2.6.31 + * sgtl5000: add line in function + + [ Ubuntu: 2.6.31-13.43 ] + + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + * Use section 'admin' rather than 'base' + * SAUCE: AppArmor: Set error code after structure initialization. + - LP: #427948 + * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation + - LP: #446595 + * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc + * [Upstream] acerhdf: Limit modalias matching to supported boards + (supersedes previous revert made by Andy Whitcroft) + - LP: #435958 + + [ Ubuntu: 2.6.31-13.42 ] + + * SAUCE: (drop after 2.6.31) input: Add support for filtering input + events + - LP: #430809 + * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi + toggle switch press + - LP: #430809 + * SAUCE: Raise the default console 'quiet' level to 2 + This supresses all but critical and emergency level messages. + https://lists.ubuntu.com/archives/kernel-team/2009-October/007476.html + * TTY: fix typos + * Linux 2.6.31.3 + * V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J + - LP: #433904 + + [ Ubuntu: 2.6.31-12.41 ] + + * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y + - LP: #416325 + * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT + The original patch failed to work for amd64. + - LP: #430694 + * ALSA: hda - Add a white-list for MSI option + Upstream cherry-pick: Infrastructure support for #445580 + * ALSA: hda - Add HP Pavilion dv4t-1300 to MSI whitelist + - LP: #445580 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-T350P + - LP: #410933 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-B1VP + - LP: #410933 + + [ Ubuntu: 2.6.31-12.40 ] + + * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros + - LP: #430694 + * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915 + - LP: #430694 + * V4L/DVB (12352): gspca - vc032x: Fix mi1310_soc preview and LED + - LP: #310760 + + -- Andy Whitcroft Fri, 09 Oct 2009 14:50:27 +0100 + +linux-fsl-imx51 (2.6.31-103.11) karmic; urgency=low + + [ Amit Kucheria ] + + * [Config] Disable LMPCM_USB + * [Config] Disable rt3070sta in staging + - LP: #423767 + * [Config] Add asix to d-i modules + - LP: #431283 + * [Config] Enable MXC_SAHARA + * ARM: IMX51: Change default_bpp to 32 + - LP: #440104 + + [ Andy Whitcroft ] + + * SAUCE: ubuntu-insert-changes -- follow abstracted debian + * rebase to Ubuntu-2.6.31-12.39 + * rt3070sta has been disabled + + [ Tim Gardner ] + + * [Config] Added cpio as a build dependency. + + [ Upstream Kernel Changes ] + + * ABI + + [ Ubuntu: 2.6.31-12.39 ] + + * install the full changelog with the binary package + * changelog -- explicitly note rebases and clean history + * Revert "SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless + adapters" + * Revert "SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from + going negative during unlink" + * Revert "SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object" + * Revert "SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs + a persistent object" + * Revert "drm/i915: Check that the relocation points to within the + target" + * Revert "drm/i915: fix tiling on IGDNG" + * Revert "Driver core: add new device to bus's list before probing" + * Revert "HID: completely remove apple mightymouse from blacklist" + * Revert "KVM: x86: check for cr3 validity in ioctl_set_sregs" + All reverts superseded by corresponding v2.6.31.2 patches + * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules + - LP: #439456 + * [Config] Enabled CONFIG_SND_HDA_HWDEP + - LP: #443117 + * [Config] Add cpio as a build dependency. + * [Config] Set default I/O scheduler back to CFQ for desktop flavours + - LP: #381300 + * KVM: VMX: Fix EPT with WP bit change during paging + * pata_amd: do not filter out valid modes in nv_mode_filter + * p54usb: add Zcomax XG-705A usbid + * x86: Increase MIN_GAP to include randomized stack + * serial: bfin_5xx: fix building as module when early printk is enabled + * USB: option.c Add support for ZTE AC2726 EVDO modem + * USB: option: TELIT UC864G support + * video: s3c_fb.c: fix build with CONFIG_HOTPLUG=n + * kbuild: fix cc1 options check to ensure we do not use -fPIC when + compiling + * drivers/mfd/ab3100-core.c: fix powerpc build error + * thinkpad-acpi: don't ask about brightness_mode for fw. 1V and 1R + * ACPI: pci_slot.ko wants a 64-bit _SUN + * fbcon: only unbind from console if successfully registered + * kallsyms: fix segfault in prefix_underscores_count() + * sisfb: change SiS_DDC_Port type to SISIOADDRESS + * mmc_spi: fail gracefully if host or card do not support the switch + command + * alpha: AGP update (fixes compile failure) + * fs: make sure data stored into inode is properly seen before unlocking + new inode + * eCryptfs: Handle unrecognized tag 3 cipher codes + * eCryptfs: Check for O_RDONLY lower inodes when opening lower files + * eCryptfs: Filename encryption only supports password auth tokens + * eCryptfs: Validate global auth tok keys + * eCryptfs: Prevent lower dentry from going negative during unlink + * Re-enable Lanman security + * xen: make -fstack-protector work under Xen + * xen: only enable interrupts while actually blocking for spinlock + * xen: use stronger barrier after unlocking lock + * xen: check EFER for NX before setting up GDT mapping + * perf_counter: Fix perf_copy_attr() pointer arithmetic + * perf tools: Fix buffer allocation + * tty: serial/pcmcia: add ID for Advantech card + * PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend() + * PM / yenta: Fix cardbus suspend/resume regression + * sony-laptop: check for rfkill hard block at load time + * nilfs2: fix missing zero-fill initialization of btree node cache + * ar9170usb: add usbid for TP-Link TL-WN821N v2 + * mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver + * mtd: ofpart: Check availability of reg property instead of name + property + * mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G + * USB: serial: ftdi_sio: new hardware support - hameg power supply + * USB: add PIDs for FTDI based OpenDCC hardware + * USB: serial: ftdi: handle gnICE+ JTAG adaptors + * USB: CDC WDM driver doesn't support non-blocking reads + * USB: fix cdc-acm regression in open + * cdc_acm: Fix to use modern speed interfaces + * tty: remove dtr/rts use from the driver open methods + * tty: gigaset: really fix chars_in_buffer + * kaweth: Fix memory leak in kaweth_control() + * x86: SGI UV: Fix IPI macros + * USB: serial: pl2303: new hardware support - sanwa multimeter + * USB: storage: fix a resume path GFP_NOIO must be used + * USB: usb-storage fails to attach to Huawei Datacard cdrom device + * USB: usbtmc: sanity checks for DEV_DEP_MSG_IN urbs + * USB: sl811-hcd: Fix device disconnect: + * drm/i915: remove restore in resume + * drm/i915: Only destroy a constructed mmap offset + * drm/i915: prevent FIFO calculation overflows on 32 bits with high + dotclocks + * drm/i915: Add buffer to inactive list immediately during fault + * drm/i915: Check that the relocation points to within the target + * drm/i915: Fix typo for wrong LVDS clock setting on IGDNG + * drm/i915: Fix SSC frequence for IGDNG + * drm/i915: Remove DAC disable in CRT force detect on IGDNG + * drm/i915: Fix LVDS panel fitting on Arrandale + * drm/I915: Use the CRT DDC to get the EDID for DVI-connector on Mac + * drm/i915: fix tiling on IGDNG + * agp/intel: Fix the pre-9xx chipset flush. + * nfsd4: fix null dereference creating nfsv4 callback client + * can: fix NOHZ local_softirq_pending 08 warning + * ahci: restore pci_intx() handling + * pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume + * net ax25: Fix signed comparison in the sockopt handler + * net: Make the copy length in af_packet sockopt handler unsigned + * pty_write: don't do a tty_wakeup() when the buffers are full + * KVM: fix cpuid E2BIG handling for extended request types + * KVM: MMU: fix missing locking in alloc_mmu_pages + * KVM: MMU: fix bogus alloc_mmu_pages assignment + * KVM: Protect update_cr8_intercept() when running without an apic + * Fix NULL ptr regression in powernow-k8 + * perf tools: do not complain if root is owning perf.data + * netfilter: nf_nat: fix inverted logic for persistent NAT mappings + * netfilter: nf_conntrack: netns fix re reliable conntrack event delivery + * netfilter: bridge: refcount fix + * netfilter: ebt_ulog: fix checkentry return value + * ath5k: Wakeup fixes + * ath5k: do not release irq across suspend/resume + * Driver core: add new device to bus's list before probing + * tty: Add a full port_close function + * tty: USB hangup is racy + * tty: USB can now use the shutdown method for kref based freeing of + ports + * hwmon: (asus_atk0110) Add maintainer information + * tty: USB serial termios bits + * usb-serial: change referencing of port and serial structures + * usb-serial: put subroutines in logical order + * usb-serial: change logic of serial lookups + * usb-serial: acquire references when a new tty is installed + * usb-serial: fix termios initialization logic + * usb-serial: rename subroutines + * usb-serial: add missing tests and debug lines + * usb-serial: straighten out serial_open + * USB serial: update the console driver + * USB: xhci: Work around for chain bit in link TRBs. + * USB: xhci: Fix slot and endpoint context debugging. + * USB: xhci: Configure endpoint code refactoring. + * USB: xhci: Set correct max packet size for HS/FS control endpoints. + * USB: xhci: Support full speed devices. + * USB: xhci: Handle stalled control endpoints. + * USB: xhci: Add quirk for Fresco Logic xHCI hardware. + * USB: xhci: Make TRB completion code comparison readable. + * USB: xhci: Handle babbling endpoints correctly. + * USB: xhci: Don't touch xhci_td after it's freed. + * USB: xhci: Check URB's actual transfer buffer size. + * USB: xhci: Check URB_SHORT_NOT_OK before setting short packet status. + * USB: xhci: Set -EREMOTEIO when xHC gives bad transfer length. + * USB: xhci: Support interrupt transfers. + * USB: Fix SS endpoint companion descriptor parsing. + * /proc/kcore: work around a BUG() + * hugetlb: restore interleaving of bootmem huge pages (2.6.31) + * page-allocator: limit the number of MIGRATE_RESERVE pageblocks per zone + * mm: munlock use follow_page + * mm: fix anonymous dirtying + * mmap: avoid unnecessary anon_vma lock acquisition in vma_adjust() + * Fix idle time field in /proc/uptime + * drm/i915: Handle ERESTARTSYS during page fault + * em28xx: ir-kbd-i2c init data needs a persistent object + * saa7134: ir-kbd-i2c init data needs a persistent object + * powerpc/8xx: Fix regression introduced by cache coherency rewrite + * powerpc: Fix incorrect setting of __HAVE_ARCH_PTE_SPECIAL + * HID: completely remove apple mightymouse from blacklist + * mptsas : PAE Kernel more than 4 GB kernel panic + * NOMMU: Fix MAP_PRIVATE mmap() of objects where the data can be mapped + directly + * iwlwifi: Handle new firmware file with ucode build number in header + * iwlwifi: update 1000 series API version to match firmware + * iwlagn: modify digital SVR for 1000 + * iwlwifi: traverse linklist to find the valid OTP block + * iwlwifi: fix unloading driver while scanning + * Linux 2.6.31.2 + + [ Ubuntu: 2.6.31-11.38 ] + + * [Upstream] acerhdf: Limit modalias matching to supported boards + - LP: #435958 + * [Config] Added sata_via to d-i/modules/sata-modules + - LP: #434827 + * SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless adapters + - LP: #439285 + * [Upstream] i915: Fix i2c init message + - LP: #409361 + * [Config] Add sym53c8xx.ko to virtual sub-flavour + - LP: #439415 + * sched: Disable NEW_FAIR_SLEEPERS for now + - LP: #436342 + * ACPI video: ignore buggy _BQC + * ACPI video: work-around BIOS AML bug in _BQC + - LP: #428910 + * ALSA: hda - Added quirk to enable sound on Toshiba NB200 + - LP: #438318 + + [ Ubuntu: 2.6.31-11.37 ] + + * [Config] Increase kernel log buffer to 256K for amd64 flavours + - LP: #424810 + * [Config] Set HZ=100 for amd64 flavours + - LP: #438234 + * [Upstream] e1000e: Emit notice instead of an error when + pci_enable_pcie_error_reporting() fails + - LP: #436370 + * n_tty: honor opost flag for echoes + * n_tty: move echoctl check and clean up logic + - LP: #438310 + * Revert "[Upstream] drm/i915: Check that the relocation points to within + the target" - Use upstream cherry-pick. + * drm/i915: Check that the relocation points to within the target + - LP: #429241 + * drm/i915: fix tiling on IGDNG + * drm/i915: add B43 chipset support + * agp/intel: Add B43 chipset support + Intel request from kernel team mailing list. + * HID: completely remove apple mightymouse from blacklist + - LP: #428111 + + -- Andy Whitcroft Tue, 06 Oct 2009 20:42:17 +0100 + +linux-fsl-imx51 (2.6.31-102.10) karmic; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-11.36 + + [ Ubuntu: 2.6.31-11.36 ] + + * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object + * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a + persistent object + * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device + - LP: #416482 + * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going + negative during unlink + * sg: fix oops in the error path in sg_build_indirect() + * mpt2sas : Rescan topology from Interrupt context instead of work thread + * mpt2sas: Prevent sending command to FW while Host Reset + * mpt2sas: setting SDEV into RUNNING state from Interrupt context + * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg + * SCSI: fix oops during scsi scanning + * SCSI: libsrp: fix memory leak in srp_ring_free() + * cfg80211: fix looping soft lockup in find_ie() + * ath5k: write PCU registers on initial reset + * binfmt_elf: fix PT_INTERP bss handling + * TPM: Fixup boot probe timeout for tpm_tis driver + * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined! + * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices + * fix undefined reference to user_shm_unlock + * perf_counter: Fix buffer overflow in perf_copy_attr() + * perf_counter: Start counting time enabled when group leader gets + enabled + * powerpc/perf_counters: Reduce stack usage of power_check_constraints + * powerpc: Fix bug where perf_counters breaks oprofile + * powerpc/ps3: Workaround for flash memory I/O error + * block: don't assume device has a request list backing in nr_requests + store + * agp/intel: remove restore in resume + * ALSA: cs46xx - Fix minimum period size + * ASoC: Fix WM835x Out4 capture enumeration + * sound: oxygen: work around MCE when changing volume + * mlx4_core: Allocate and map sufficient ICM memory for EQ context + * perf stat: Change noise calculation to use stddev + * x86: Fix x86_model test in es7000_apic_is_cluster() + * x86/i386: Make sure stack-protector segment base is cache aligned + * PCI: apply nv_msi_ht_cap_quirk on resume too + * x86, pat: Fix cacheflush address in change_page_attr_set_clr() + * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() + with highmem + * KVM guest: do not batch pte updates from interrupt context + * KVM: Fix coalesced interrupt reporting in IOAPIC + * KVM: VMX: Check cpl before emulating debug register access + * KVM guest: fix bogus wallclock physical address calculation + * KVM: x86: Disallow hypercalls for guest callers in rings > 0 + * KVM: VMX: Fix cr8 exiting control clobbering by EPT + * KVM: x86 emulator: Implement zero-extended immediate decoding + * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list + * KVM: x86 emulator: fix jmp far decoding (opcode 0xea) + * KVM: limit lapic periodic timer frequency + * libata: fix off-by-one error in ata_tf_read_block() + * PCI quirk: update 82576 device ids in SR-IOV quirks list + * PCI: Unhide the SMBus on the Compaq Evo D510 USDT + * powerpc/pseries: Fix to handle slb resize across migration + * Linux 2.6.31.1 + + [ Ubuntu: 2.6.31-10.35 ] + + * Disable CONFIG_UEVENT_HELPER_PATH + * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD + * remove the tlsup driver + * remove lmpcm logitech driver support + * Add 3 missing files to prerm remove file list + - LP: #345623, #415832 + * [Upstream] drm/i915: Check that the relocation points to within the + target + - LP: #429241 + * [Config] Set CONFIG_EXT4_FS=y on ports architectures + * SAUCE: Added quirk to recognize GE0301 3G modem as an interface. + - LP: #348861 + * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list" + Upstream suggests that this is not the right approach. + * [Config] Set default I/O scheduler to DEADLINE + CFQ seems to have some load related problems which are often exacerbated by sreadahead. + - LP: #381300 + * SAUCE: ipw2200: Enable LED by default + - LP: #21367 + * ALSA: hda - Add support for new AMD HD audio devices + - LP: #430564 + + -- Andy Whitcroft Fri, 25 Sep 2009 13:27:17 -0700 + +linux-fsl-imx51 (2.6.31-101.9) karmic; urgency=low + + [ Amit Kucheria ] + + * ARM: IMX51: Fix USB errors + * ARM: IMX51: Copy over the 2.6.28 version of fec.c + - LP: #418238 + * ARM: IMX51: Make fec ethernet driver compile + * [Config] Disable FEC2 for imx51 + + -- Andy Whitcroft Tue, 22 Sep 2009 17:16:14 -0700 + +linux-fsl-imx51 (2.6.31-101.8) karmic; urgency=low + + [ Alan Tull ] + + * ARM: IMX51: ENGR00114681 pcm: set minimum period to 2k + * ARM: IMX51: ENGR00114820-1 Revert SGTL5000: Enable amixer controls + Jack/Speaker Function + * ARM: IMX51: ENGR00114820-2 sgtl5000: pop fixes + * ARM: IMX51: ENGR00114867 MX51: tristate i2c levelshifter + * ARM: IMX51: ENGR00115688 dvi: disable edid read + * ARM: IMX51: ENGR00115618-1 sgtl5000: power reduction pop fix + * ARM: IMX51: ENGR00115618-2 sgtl5000: power savings + * ARM: IMX51: ENGR00115754 sgtl5000: power mic bias earlier + + [ Amit Kucheria ] + + * [Config] Run updateconfigs after rebasing to 2.6.31-rc8 + * ARM: IMX51: Make sgt5000 driver compile + * [Upstream] Remove X86 dependency for the rt3070 driver + - LP: #423767 + * [Config] Enable rt3070 from staging for imx51 + - LP: #423767 + * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR to 0 + * [Config] imx51: Enable APM_EMULATION as per imx51_defconfig + * ARM: IMX51: Fix compile of mxc_dataflash.c by replacing bus_id + * ARM: IMX51: Don't let the dataflash driver hitch a ride on CONFIG_MTD + * [Config] imx51: disable MTD_MXC_DATAFLASH + * [Config] Run updateconfigs after rebasing to 2.6.31 final + * [Config] imx51: updateconfigs after applying sdk-1.6 patches + * ARM: IMX51: Remove cpu_is_mx2/cpu_is_mx3 definition from hardware.h + * ARM: IMX51: Paramters to module_param_call should be NULL + + [ Ann Thornton ] + + * ARM: IMX51: ENGR00113055-1 Add ability to read and user EDID info + * ARM: IMX51: ENGR00113055-2 Added ability to read EDID data and use it + to set monitor. + * ARM: IMX51: ENGR00114026 MX51 Prevent 2nd initialization of + framebuffer. + * ARM: IMX51: ENGR00114023-1 Support for dual monitors. + * ARM: IMX51: ENGR00114023-2 MX51: Add support for dual monitors. + * ARM: IMX51: ENGR00114024 Enable 720p via HDMI + + [ Arik Gubeskys ] + + * ARM: IMX51: ENGR00114210 IPU IC bypass mode: move display configuration + to the FB driver + + [ b00984 ] + + * ARM: IMX51: ENGR00113773 Add apm support for mc13892 battery + * ARM: IMX51: ENGR00114655 mitsubishi lvds xga lcd support for babbage + 2.5 + + [ Dinh Nguyen ] + + * ARM: IMX51: ENGR00114282 MX51: Disable L2 SRPG + * ARM: IMX51: ENGR00114453 MX51: Add support for keypad on Babbage 2.5 + board + + [ Guoqing Jiang ] + + * ARM: IMX51: ENGR00113618 Audio: Workaround for sgtl5000 codec suspend + failure issue on MX25 + + [ Jason ] + + * ARM: IMX51: ENGR00114157-1 Add SPI data flash driver support + * ARM: IMX51: ENGR00114157-2 Add SPI data flash support for MX51 + babbage2.5 + * ARM: IMX51: ENGR00114189 Enlarge the rootfs partition to accommodate + Gnome-mobile + * ARM: IMX51: ENGR00113990 Fix for mtd_oobtest test failure + * ARM: IMX51: ENGR00114882 Reset NFC delay line register + * ARM: IMX51: ENGR00114880 Data abort on NFC memory byte access + * ARM: IMX51: ENGR00115329 Enable NFC symmetric mode on MX51 + * ARM: IMX51: ENGR00115330 Fix ECC mode setting for MX51TO3 + * ARM: IMX51: ENGR00115336 Fix setting NFC FW for 16bit nand flash + support on MX51 + + [ JasonHua ] + + * ARM: IMX51: ENGR00113106 MX25 Camera: Some kernel message dumped when + remove ov2640_camera + + [ Katherine Lu ] + + * ARM: IMX51: ENGR00114097 MX51 Babbage: Register backlight device only + display card attached + * ARM: IMX51: ENGR00113546 MX51: set PLL2 as UART parent clk + * ARM: IMX51: ENGR00114139 MX51 Babbage: remove MC13892 backlight device + * ARM: IMX51: ENGR00114166 MX51 Babbage: can not reboot from SPI NOR + * ARM: IMX51: ENGR00114037 MX31: LCD can not resume after entering + standby + * ARM: IMX51: ENGR00114881 MX51: Disable SAHARA by default + * ARM: IMX51: ENGR00114803 eCSPI Hang when acessing from multi modules + + [ Lily Zhang ] + + * ARM: IMX51: ENGR00113197-1 Fix Write pending issue with hwclock + function + * ARM: IMX51: ENGR00113197-2 disable RTC clock when it's not active + * ARM: IMX51: ENGR00110228 Fix GPT timer stop issue + * ARM: IMX51: ENGR00113662 enable coin cell charger + * ARM: IMX51: ENGR00114328-1 SRTC: Change wait time for write operations + * ARM: IMX51: ENGR00114328-2 BBG: Keep VRTC and CKIL active for SRTC + * ARM: IMX51: ENGR00114345 Set MC13892 irq as wakeup resource + * ARM: IMX51: ENGR00114738 MX51 BBG: Add OneWire support + + [ Lionel.Xu ] + + * ARM: IMX51: ENGR00107200 MX25: The SW workaround for left/right channel + random swap issue + * ARM: IMX51: ENGR00113470 MX37 ALSA ADC: Resolve the issue that arecord + can't work + * ARM: IMX51: ENGR00115113 SGTL5000: Jack Function/Speaker Function + + [ Liu Ying ] + + * ARM: IMX51: ENGR00113541 IPUv3:Support IC combing with local alpha + contained in pixel + * ARM: IMX51: ENGR00113673 IPUv3:Fix RGB to RGB pixel format changing + with IC PRP_VF + * ARM: IMX51: ENGR00114324-1 Enhance mmap implement of IIM driver + * ARM: IMX51: ENGR00114611 Support RGB565 pixel format for WVGA panel on + BBG2.5 + * ARM: IMX51: ENGR00114617 Support OV3640 camera on BBG2.5 accessory + board + * ARM: IMX51: ENGR00114663-1 Add function comments for mmap function of + IIM driver + + [ Nancy Chen ] + + * ARM: IMX51: ENGR00114374 USB: Failed to unload USB host module + * ARM: IMX51: ENGR00114685 MX51: Change the GP voltages for 167MHz and + 800MHz + * ARM: IMX51: ENGR00114689 CPUFREQ: Add conservative governor support + * ARM: IMX51: ENGR00114686 DVFS-CORE: Use GPC STRT bit to control DVFS + * ARM: IMX51: ENGR00114686-1 MX51: Enable other CPUFREQ governors + * ARM: IMX51: ENGR00114736 Fix build break by adding mxc_dvfs.h + * ARM: IMX51: ENGR00114871 MX51: Add command line to enable peripheral SW + Freq scaling + * ARM: IMX51: ENGR00114963 MX51: CPUFREQ is not trigged if DVFS CORE is + enabled + * ARM: IMX51: ENGR00115013 MX51: System doesn't enter APM mode if DVFS + CORE enabled + + [ Patrick Turley ] + + * ARM: IMX51: ENGR00107929 /proc/cpu/clocks Corrupts memory + * ARM: IMX51: ENGR00103310 Initial imx_nfc NAND Flash MTD driver + * ARM: IMX51: ENGR00115700: mxc_nd2 driver panics the kernel when booting + on i.MX25 + + [ Raj Rajasekaran ] + + * ARM: IMX51: ENGR00107366 DryIce: DryIce unit test failed with RTC + enabled. + + [ Ranjani Vaidyanathan-RA5478 ] + + * ARM: IMX51: ENGR00114937: MX51: Move USBOH3 and USB-PHY to source from + PLL2 and 24MHz. + * ARM: IMX51: ENGR00115321: MX51: Change STOP mode voltage based on DS0.3 + datasheet. + * ARM: IMX51: ENGR00115334: MX51: Donot scale arm_axi_clk in peripheral + bus scaling. + + [ Richard Zhu ] + + * ARM: IMX51: ENGR00113376 [MX37] SD can't detected after fast + removal/insertion + * ARM: IMX51: ENGR00113607 Refine and unify the definitions of the two + mmc host + * ARM: IMX51: ENGR00114325-1: SIM: Add MX25 support + + [ Rob Herring ] + + * ARM: IMX51: ENGR00114598 mx51: add missing fb memory resource setup + * ARM: IMX51: ENGR00114599 mx51: Add gpu2d uio driver + * ARM: IMX51: ENGR00115613 ipuv3: enable DMFC watermark for sync channels + + [ Robby Cai ] + + * ARM: IMX51: ENGR00114911 make video buffer cacheable to improve video + performance + + [ Tim Gardner ] + + * [Config] Don't include ABI or version in vmlinuz name in kernel-image + - LP: #359049 + + [ Wallace Wang ] + + * ARM: IMX51: ENGR00114140 SSI: TX fail if RX is enabled before TX + * ARM: IMX51: ENGR00114625 BABBAGE: Add spdif support + * ARM: IMX51: ENGR00114851 MX51: Fix SSI1 SDMA data transfer failure + + [ William Lai ] + + * ARM: IMX51: ENGR00114609 MX35 ASRC: Support SPDIF in/out + * ARM: IMX51: ENGR00114644-1 MX51 PWM: Add pwm and backlight devices + * ARM: IMX51: ENGR00114644-2 MX51 PWM: Correction for the PWM + + [ Wu Guoxing ] + + * ARM: IMX51: ENGR00114622 GPU: add platform device + * ARM: IMX51: ENGR00114692 GPU: use axi_a_clk for both 2d and 3d + * ARM: IMX51: ENGR00114962 : change gpu UIO driver to module + + [ Xinyu Chen ] + + * ARM: IMX51: ENGR00114989 MX35 SPDIF driver failed to play 48KHz audio + + [ Zhou Jingyu ] + + * ARM: IMX51: ENGR00114145 disable pmic charger on Babbage + * ARM: IMX51: ENGR00113543 fix bug in mc13892 ADC suspend + + [ Ubuntu: 2.6.31-10.34 ] + + * [Upstream] ext3: Don't update superblock write time when filesystem is + read-only + - LP: #427622 + + [ Ubuntu: 2.6.31-10.33 ] + + * [Upstream] dvb-usb: fix tuning with Cinergy T2 + - LP: #421258 + * [Config] Unconditionally copy files from sub-flavours lists. + (really, really fix it this time) + - LP: #423426 + * [Config] Set CONFIG_CACHEFILES=m for all flavours + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #427822 + + [ Ubuntu: 2.6.31-10.32 ] + + * [Config] enable module support for memory stick + - LP: #159951 + * [Config] Unconditionally copy files from sub-flavours lists. + - LP: #423426 + + [ Ubuntu: 2.6.31-10.31 ] + + * rebase to v2.6.31 final + * [Config] Recommend grub-pc in linux-image + - LP: #385741 + * [Upstream] Pull latest update of lenovo-sl-laptop + * [Upstream] (drop after 2.6.31) acerhdf: fix fan control for AOA150 + model + - LP: #426691 + * [Config] De-macro some package names. + * rebase to 2.6.31 final. + + [ Ubuntu: 2.6.31-10.30 ] + + * [Config] Enable CONFIG_USB_DEVICEFS + - LP: #417748 + * [Config] Populate the config-update template a bit more + * rebase to v2.6.31-rc9 + * [Config] update configs following rebase to v2.6.31-rc9 + * [Config] update ports configs following rebase to v2.6.31-rc9 + * SAUCE: wireless: hostap, fix oops due to early probing interrupt + - LP: #254837 + * [Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) + white-list + - LP: #281732 + * SAUCE: AppArmor: Fix profile attachment for regexp based profile names + - LP: #419308 + * SAUCE: AppArmor: Return the correct error codes on profile + addition/removal + - LP: #408473 + * SAUCE: AppArmor: Fix OOPS in profile listing, and display full list + - LP: #408454 + * SAUCE: AppArmor: Fix mapping of pux to new internal permission format + - LP: #419222 + * SAUCE: AppArmor: Fix change_profile failure + - LP: #401931 + * SAUCE: AppArmor: Tell git to ignore generated include files + - LP: #419505 + * [Upstream] acpi: video: Loosen strictness of video bus detection code + - LP: #333386 + * SAUCE: Remove ov511 driver from ubuntu subdirectory + * [Config] Exclude char-modules from non-x86 udeb creation + * SAUCE: Notify the ACPI call chain of AC events + * [Config] CONFIG_SATA_VIA=m + - LP: #403385 + * [Config] Build in all phylib support modules. + * [Config] Don't fail when sub-flavour files are missing + - LP: #423426 + * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR=0 + - LP: #423513 + * Rebased against v2.6.31-rc9 + + [ Ubuntu: 2.6.31-9.29 ] + + * [Upstream] agp/intel: support for new chip variant of IGDNG mobile + - LP: #419993 + * [Config] d-i/modules: Add new char-modules file, initialize with + intel-agp + - LP: #420605 + * Rebased against 2.6.31-rc8 plus some inotify regression patches: + up through git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git + adda766193ea1cf3137484a9521972d080d0b7af. + + [ Ubuntu: 2.6.31-8.28 ] + + * [Config] Let nic-shared-modules depends on crypto-modules + - LP: #360966 + * [Upstream] (drop after 2.6.31) drm/i915: increase default latency + constant + - LP: #412492 + * [Upstream]: (drop after 2.6.31) dell-laptop: don't change softblock + status if HW switch is disabled + - LP: #418721 + * [Upstream]: (drop after 2.6.31) compal-laptop: Add support for known + Compal made Dell laptops + * [Upstream]: (drop after 2.6.31) compal-laptop: Replace sysfs support + with rfkill support + * [Config] Add acpiphp to virtual sub-flavour + - LP: #364916 + * Drop KSM patch set for now because of instabilities with encrypted swap. + - LP: #418781 + + [ Ubuntu: 2.6.31-7.27 ] + + * [Config] updateconfigs updateportsconfigs after 2.6.31-rc7 rebase + * SAUCE: (drop after 2.6.31) Added KSM from mmotm-2009-08-20-19-18 + Replaces previous ksm patches from 2.6.31-6.25 + * [Config] KSM=y + + [ Ubuntu: 2.6.31-6.26 ] + + * [Config] enable CONFIG_AUFS_BR_RAMFS + - LP: #414738 + * split out debian directory ready for abstraction + * add printdebian target to find branch target + * abstracted debian -- debian/files is not abstracted + * abstracted debian -- packages must be built in debian/ + * abstracted debian -- kernel-wedge needs to work in debian/ + * abstracted debian -- ensure we install the copyright file + * abstracted-debian -- drop the debian directories from headers + * abstracted-debian -- drop the debian directories from headers part 2 + * SAUCE: ubuntu-insert-changes -- follow abstracted debian + * [Upstream] aoe: ensure we initialise the request_queue correctly V2 + - LP: #410198 + * [Config] Ports: Disable CONFIG_CPU_FREQ_DEBUG on powerpc-smp + * [Config] Ports: Re-enable windfarm modules on powerpc64-smp + - LP: #413150 + * [Config] Ports: Build all cpu frequency scaling governors into ports + kernels + * [Config] Ports: Build ext2 and ext3 modules into ports kernels + * [Config] Ports: CONFIG_PACKET=y for all ports kernels + * [Config] Ports: Enable PS3 network driver + * abstracted debian -- call $(DEBIAN)/rules using make + * [Config] Abstract the debian directory + * SAUCE: Improve error reporting in postinst + - LP: #358564 + + -- Andy Whitcroft Fri, 18 Sep 2009 13:10:41 +0100 + +linux-fsl-imx51 (2.6.31-100.7) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Removed debug package rules + + -- Tim Gardner Mon, 24 Aug 2009 06:43:24 -0600 + +linux-fsl-imx51 (2.6.31-100.6) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Add rsync as a build dependency + + -- Tim Gardner Sun, 23 Aug 2009 18:09:36 -0600 + +linux-fsl-imx51 (2.6.31-100.5) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Do not generate a doc package + * [Config] Do not produce a source package + * [Config] Only create one headers package + - LP: #417264 + + -- Tim Gardner Sun, 23 Aug 2009 12:09:28 -0600 + +linux-fsl-imx51 (2.6.31-100.4) karmic; urgency=low + + [ Andy Whitcroft ] + + * abstracted debian -- kernel-wedge needs to work in debian/ + * abstracted debian -- ensure we install the copyright file + * abstracted-debian -- drop the debian directories from headers + * abstracted-debian -- drop the debian directories from headers part 2 + + -- Tim Gardner Thu, 20 Aug 2009 10:13:41 -0600 + +linux-fsl-imx51 (2.6.31-100.3) karmic; urgency=low + + * UBUNTU: [Config] Produce headers packages of the form linux-headers-2.6.31-ABI + * UBUNTU: Bump ABI to 100 in order to avoid collisions with other kernel packages + * UBUNTU: [Config] Removed libc-dev from the control file + * UBUNTU: [Config] Implement abstracted debian build for fsl-imx51 + + -- Tim Gardner Mon, 17 Aug 2009 08:29:47 -0600 + +linux-fsl-imx51 (2.6.31-99.2) karmic; urgency=low + + * Dummy entry + + -- Tim Gardner Mon, 10 Aug 2009 12:33:47 -0600 + +linux-fsl-imx51 (2.6.31-0.1) karmic; urgency=low + + [ Alan Tull ] + + * ARM: IMX51: ENGR00109149 mx51 sgtl5000: correct platform data to vddd + 1.2v + - LP: #396601 + * ARM: IMX51: ENGR00109155 sgtl5000: add reg_cache + - LP: #396601 + * ARM: IMX51: ENGR00110076 sgtl5000: fix audio pops + - LP: #396601 + * ARM: IMX51: ENGR00111670-3 sgtl5000: Use internal vddd reg for sgtl5000 + rev 0x11 + - LP: #396601 + * ARM: IMX51: ENGR00112020 sgtl5000: resume fixes + - LP: #396601 + * ARM: IMX51: ENGR00112462 sgtl5000: don't mute adc in digital mute + - LP: #396601 + + [ Amit Kucheria ] + + * AUTO: Delete unncessary ABI/arch/flavours + * AUTO: Start new changelog and revert to known abi + * ARM: IMX51: Add SoC and board support for Freescale mx51 platform + * ARM: IMX51: Move board-mx51* header files to the correct location + * ARM: IMX51: Clean-up the craziness of including mxc_uart.h _everywhere_ + * ARM: IMX51: Make it compile. + * ARM: IMX51: Unconditionally disable CONFIG_GPIOLIB + * ARM: IMX51: Make ARCH_MXC auto-enable ARCH_MXC_CANONICAL + * ARM: IMX51: Enable ZONE_DMA for ARCH_MXC + * ARM: IMX51: Compile-in the IMX51 cpufreq driver by default + * ARM: IMX51: Fix isl29003 HWMON driver for i2c changes + * ARM: IMX51: Make video capture drivers compile + * ARM: Make ARM arch aware of ubuntu/ drivers + * ARM: IMX51: #include io.h to access __raw_writel and family + * ARM: IMX51: Fix compile of pmix_battery.c by replacing bus_id + * SAUCE: Add the rebase-branch script to this branch + * SAUCE: Customize rebase-branch script for this branch + * [Config] Make package name a variable for rebase-branch script + * [Config] rebase-branch script: We don't store generated files anymore + * [Config] Changed package name to linux-fsl-imx51 + * [Config] Add babbage flavour and only deal with armel arch + * [Config] Commmit Babbage kernel configs + * [Config] Put dummy -0.0 ABI to skip abi check + + [ Ann Thornton ] + + * ARM: IMX51: ENGR00109027-1 MX51 3-stack Fix suspend mode for regulator. + - LP: #396601 + * ARM: IMX51: ENGR00109244-1 MX51 Add GPO* regulators. + - LP: #396601 + * ARM: IMX51: ENGR00110536-1 Made files less regulator specific. + - LP: #396601 + * ARM: IMX51: ENGR00110536-4 mc13892: Added pmic_alloc_data function + - LP: #396601 + * ARM: IMX51: ENGR00110536-5 MX51: Got rid of compiler warning. + - LP: #396601 + + [ Arik Gubeskys ] + + * ARM: IMX51: ENGR00110765 Support of 720p in IPU/TVE + - LP: #396601 + + [ b02550 ] + + * ARM: IMX51: ENGR00112566 IPUv3: Reduce waiting time of ipu interrupt. + - LP: #396601 + * ARM: IMX51: ENGR00113242 IPUv3: Add new ioctl to get ipu channel type + of fb. + - LP: #396601 + + [ Brad Figg ] + + * ARM: IMX51: Add defines for DMA_MODE_READ/WRITE/MASK for pata_fsl + * ARM: IMX51: codec structure was moved to the card structure + * ARM: IMX51: snd_soc_machine structure replaced with snd_soc_card. + * ARM: IMX51: Get to bus_id by calling dev_name. + * ARM: IMX51: Added external declaration for mxc_map_io. + * ARM: IMX51: Removed the mxc_gpio_port structure. + * ARM: IMX51: mxc_timer_init prototype + * ARM: IMX51: Fix up merge error in Kconfig + * ARM: IMX51: Changed from snd_card_new to snd_card_create + * ARM: IMX51: ENGR00109027-2 API changes for new regulator interface. + - LP: #396601 + * ARM: IMX51: ENGR00107699 ipu: support new ipu device lib + - LP: #396601 + * ARM: IMX51: ENGR00108699 [MX51] eMMC4.3 card support + - LP: #396601 + * ARM: IMX51: ENGR00109146 DVFS: System can not go to APM if DVFS core is + enabled + - LP: #396601 + * ARM: IMX51: ENGR00111297 Fix vpu compiling error on mx31 + - LP: #396601 + * ARM: IMX51: ENGR00110257 unifi_fs: re-initialize chip every time insert + module + - LP: #396601 + * ARM: IMX51: ENGR00111670-5 MX51: Add Babbage2 platform support + - LP: #396601 + * ARM: IMX51: ENGR00106025-1 RTC: Add IMX DryIce RTC driver + - LP: #396601 + * ARM: IMX51: Add pmic_battery.h include file. + - LP: #396601 + * ARM: IMX51: ENGR00070770 MX51 SIM driver + - LP: #396601 + * ARM: IMX51: ENGR00112611 use resource_size instead of 'r->end - + r->start + 1' in usb dirver. + - LP: #396601 + * ARM: IMX51: ENGR00112081 Host mode not detecting device when OTG port + is in OTG mode + - LP: #396601 + * ARM: IMX51: ENGR00112509 : [MX37] failed to test our MSC driver with + USBCV 1.3. + - LP: #396601 + * ARM: IMX51: Added fsl_devices.h which is now a required file. + - LP: #396601 + * ARM: IMX51: Added gps_ioctrl/Kconfig and gps_ioctrl/agpsgpiodev.c + - LP: #396601 + * ARM: IMX51: ENGR00112121 eSDHC driver enhancementes + - LP: #396601 + * ARM: IMX51: ENGR00113154 TZIC: Correct Wakeup registers + - LP: #396601 + * ARM: IMX51: Adding missing file drivers/mxc/asrc/mxc_asrc.c + - LP: #396601 + * ARM: IMX51: Adding missing file include/linux/mxc_asrc.h + - LP: #396601 + * ARM: IMX51: ENGR00112918-1: Add support for SW controlled frequency + scaling. + - LP: #396601 + * ARM: IMX51: ENGR00093265 Add ASRC script and ASRC p2p script support in + SDMA driver + - LP: #396601 + * ARM: IMX51: ENGR00096014-1 ASRC-ESAI per_2_per transfer + - LP: #396601 + * ARM: IMX51: ENGR00096014-2 ASRC-SSI per_2_per transfer + - LP: #396601 + * ARM: IMX51: ENGR00113464 Fix compiling error for MX31-ads, MX31-3stack + and MX35-3stack + - LP: #396601 + + [ Ding Qiang ] + + * ARM: IMX51: ENGR00111976 Fix IPUv3 U/V offset setting issue + - LP: #396601 + + [ Dinh Nguyen ] + + * ARM: IMX51: Fix plat-mxc/timer.c to handle imx51 + * ARM: IMX51: IPU irq handler deadlock fix + * ARM: IMX51: ENGR00111670-4 ehci: move machine specific host2 init + - LP: #396601 + * ARM: IMX51: ENGR00112269 MX51: Warning is reported when rmmod g_ether + - LP: #396601 + + [ Jason ] + + * ARM: IMX51: ENGR00113505 Disable NAND driver interleave mode support + - LP: #396601 + + [ Jason Chen ] + + * ARM: IMX51: ENGR00109264 ipuv3 : CSC not correct for PP task + - LP: #396601 + * ARM: IMX51: ENGR00108639 ipuv3: add IC overlay support + - LP: #396601 + + [ Jason Liu ] + + * ARM: IMX51: UPSTREAM: FENCE: Do not use OOB with MLC NAND + + [ JasonHua ] + + * ARM: IMX51: ENGR00112920 MX51: Add GPS to support 2.6.28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00113294 GPS:Make gps driver default menuconfig to be + module config + - LP: #396601 + + [ Jun Li ] + + * ARM: IMX51: ENGR00111644 i.MX51 usb gadget mass storage data in failure + - LP: #396601 + * ARM: IMX51: ENGR00113254 build in usb drivers in default for i.MX51 + - LP: #396601 + * ARM: IMX51: ENGR00112832 fix copyright problem with Huashan USB gadget + patch + - LP: #396601 + + [ Katherine Lu ] + + * ARM: IMX51: ENGR00108533 Fix isl29003 may not be recognized after + system reboot + - LP: #396601 + * ARM: IMX51: ENGR00108706 Fix _ipu_dp_set_csc_coefficients can not set + the right csc value + - LP: #396601 + * ARM: IMX51: ENGR00108078 SPI: fail when spi IRQ number is zero + - LP: #396601 + * ARM: IMX51: ENGR00112870 SPI: workaround for chipselect pin may not + keep correct level + - LP: #396601 + * ARM: IMX51: ENGR00113473 MX51: Bluetooth not work when lp_apm be the + parent clk of uart + - LP: #396601 + + [ Lily Zhang ] + + * ARM: IMX51: ENGR00108339 Add TV Encoder V2 support for MX51 TO2 + - LP: #396601 + * ARM: IMX51: ENGR00107483 Revert [MX37] failed to test our MSC driver + with USBCV 1.3." + - LP: #396601 + * ARM: IMX51: ENGR00107688 ASOC: Resolve 24/32-bit mono wav playing + problem on sgtl5000 + - LP: #396601 + * ARM: IMX51: ENGR00111294 Not enter suspend state when the keypad is + pressed + - LP: #396601 + * ARM: IMX51: ENGR00111028 Fix boot failure on MX51 MC13892 1.1 board + with VBAT 4.2v + - LP: #396601 + * ARM: IMX51: ENGR00111996 Fix camera suspend issue in MX51 + - LP: #396601 + * ARM: IMX51: ENGR00112014 Add ATA support for MX51 3DS in 28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00112237 Add FM support in MX51 28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00112275 fix break in imx51_defconfig + - LP: #396601 + * ARM: IMX51: ENGR00112841 MX51 BBG2: Add Power Key support + - LP: #396601 + * ARM: IMX51: ENGR00112977 Support the removal of debug board in MX51 + 3Stack + - LP: #396601 + + [ Lionel.Xu ] + + * ARM: IMX51: ENGR00110748 SGTL5000: Shut down i2s sclk/lrclk after audio + playback stops + - LP: #396601 + * ARM: IMX51: ENGR00111918 SGTL5000: Enable amixer controls Jack + Function/Speaker Function + - LP: #396601 + + [ Liu Ying ] + + * ARM: IMX51: ENGR00109084 IPUv3: Add DP SRM updates when + enabling/disabling DP_FG + - LP: #396601 + * ARM: IMX51: ENGR00106026-4 MX51: Add IIM platform device + - LP: #396601 + * ARM: IMX51: ENGR00109633 V4L2 capture: Fix enable/disable ov3640 + camera's mclk issue + - LP: #396601 + * ARM: IMX51: ENGR00109721 IPUv3:Fix the issue of resizing from 1280*720 + to 800*480 + - LP: #396601 + * ARM: IMX51: ENGR00110740-4 MX51:Build-in IIM driver + - LP: #396601 + * ARM: IMX51: ENGR00112265 MX51:GPIO change to enable CLAA WVGA panel + - LP: #396601 + * ARM: IMX51: ENGR00112184 IPUv3:Correct resersed input/output IRT EOF + bits + - LP: #396601 + * ARM: IMX51: ENGR00112716 MX51:Change CSI1 HSYNC and CSI1 VSYNC pads to + be GPIO pins + - LP: #396601 + * ARM: IMX51: ENGR00111687 IPUv3:Support IC local alpha blending + - LP: #396601 + * ARM: IMX51: ENGR00113088 MX51:Fix artifacts display issue on CLAA WVGA + panel + - LP: #396601 + * ARM: IMX51: ENGR00113302 MX51 Babbage:Support CLAA WVGA lcd panel + - LP: #396601 + * ARM: IMX51: ENGR00113478 IPUv1:Fix video play break without resizing + and rotation + - LP: #396601 + * ARM: IMX51: ENGR00106026-5 Add mxc IIM driver support + + [ Michal Ludvig ] + + * ARM: IMX51: ENGR00112200 Add cryptodev device + - LP: #396601 + + [ Nancy Chen ] + + * ARM: IMX51: ENGR00108856 Fix DVFS core can not be resumed from low + power mode + - LP: #396601 + * ARM: IMX51: ENGR00112279 DVFS CORE: Frequency and voltage keep changing + up and down + - LP: #396601 + + [ Raj Rajasekaran ] + + * ARM: IMX51: ENGR00104641: scc2_internals.h license info incorrect + - LP: #396601 + + [ Ran ] + + * ARM: IMX51: ENGR00113176: MX51:Add IPU vdi support + - LP: #396601 + + [ Ranjani Vaidyanathan-RA5478 ] + + * ARM: IMX51: ENGR00112123: MX51:Core at incorrect frequency at the lower + GP voltage. + - LP: #396601 + * ARM: IMX51: ENGR00108842-1 : Enable booting with CPU frequency set in + redboot. + - LP: #396601 + * ARM: IMX51: ENGR00108842-2 : MX51: Add support for CPU freq at 1GHz. + - LP: #396601 + * ARM: IMX51: ENGR00113058: MX51: BBG2 does not boot if freq in redboot + is not set to 1GHz. + - LP: #396601 + * ARM: IMX51: ENGR00112918-2: MX51: Add support for SW controlled + frequency scaling. + - LP: #396601 + + [ Richard Zhao ] + + * ARM: IMX51: ENGR00108905 sgtl5000: remove unneeded check of + spk_amp_event + - LP: #396601 + * ARM: IMX51: ENGR00109268 unifi_fs: don't reset chip if power is on by + default + - LP: #396601 + * ARM: IMX51: ENGR00109685 sgtl5000: fix headphone detect + - LP: #396601 + * ARM: IMX51: ENGR00111296: sgtl5000: fix Playback Volume min not 0 + - LP: #396601 + * ARM: IMX51: ENGR00112374 Make unifi v6 work + - LP: #396601 + + [ Richard Zhu ] + + * ARM: IMX51: ENGR00110144 [MX51]Two esdhc port can't work + simultaneously. + - LP: #396601 + * ARM: IMX51: ENGR00111242-2-MX51-3DS Enable the CONFIG_MMC_UNSAFE_RESUME + - LP: #396601 + * ARM: IMX51: ENGR00111242-3-MX51-DEF Enable the CONFIG_MMC_UNSAFE_RESUME + option + - LP: #396601 + * ARM: IMX51: ENGR00113061 [MX51] Enable the eSDHC slot2 on 2.6.28 + - LP: #396601 + + [ Rob Herring ] + + * ARM: IMX51: UPSTREAM: Add more cache memory types macros + * ARM: IMX51: ENGR00111670-1 ch7026: Return error when not present + - LP: #396601 + * ARM: IMX51: ENGR00111670-2 mxcfb: support mode string on command line + - LP: #396601 + * ARM: IMX51: ENGR00112201 mtd: export nand_do_read/write_ops functions + - LP: #396601 + + [ Robby Cai ] + + * ARM: IMX51: ENGR00111086 Add SYS SW Reset control for VPU + - LP: #396601 + + [ Sam Yang ] + + * ARM: IMX51: ENGR00111733 Onewire: Kernel dump when inserted mxc_w1 + module + - LP: #396601 + * ARM: IMX51: ENGR00112155 Error bool definition in ipu.h for user space + c++ compiler + - LP: #396601 + + [ Sammy He ] + + * ARM: IMX51: ENGR00108541 fix system crash issue due to trying to + display 1 frame on the LCD + - LP: #396601 + + [ Tim Gardner ] + + * [Config] Default arch is armel + + [ Wallace Wang ] + + * ARM: IMX51: ENGR00109285 SD/MMC: The SD card interrupt can't be + detected after system resume + - LP: #396601 + * ARM: IMX51: ENGR00111746 Sgtl5000: Bug fix + - LP: #396601 + * ARM: IMX51: ENGR00111751 Fix bug in the I2S Master mode + - LP: #396601 + * ARM: IMX51: ENGR00111946 Watchdog: oops when watchdog resume + - LP: #396601 + + [ William Lai ] + + * ARM: IMX51: ENGR00112889 ASRC driver multi-instance support + - LP: #396601 + + [ Wu Guoxing ] + + * ARM: IMX51: ENGR00111499 mx51:GPU 2D Clock Support + - LP: #396601 + * ARM: IMX51: ENGR00112010 mx51:set gpu3d clock parent to ahb clock + - LP: #396601 + * ARM: IMX51: ENGR00112203-2 mx51:CONFIG_FORCE_MAX_ZONEORDER Support + - LP: #396601 + * ARM: IMX51: ENGR00112238-2 mx51: change CONFIG_FORCE_MAX_ZONEORDER + - LP: #396601 + + [ Xiexiaobo ] + + * ARM: IMX51: ENGR00112477 SDHC: Remove GPIO pin inactive/active on + suspend/resume + - LP: #396601 + + [ Xinyu Chen ] + + * ARM: IMX51: ENGR00111681 MX51 Enable oprofile for L1 + - LP: #396601 + + [ Zhou Jingyu ] + + * ARM: IMX51: ENGR00109543 Sets mc13892 CHRGRAW scaling to divide by 5 + - LP: #396601 + * ARM: IMX51: ENGR00101496 MC13892 battery driver + - LP: #396601 + * ARM: IMX51: ENGR00111992 Support multiple ADC channel co-work + - LP: #396601 + + -- Amit Kucheria Fri, 07 Aug 2009 09:35:53 +0100 --- linux-fsl-imx51-2.6.31.orig/debian/debian.env +++ linux-fsl-imx51-2.6.31/debian/debian.env @@ -0,0 +1 @@ +DEBIAN=debian.fsl-imx51 --- linux-fsl-imx51-2.6.31.orig/debian/rules +++ linux-fsl-imx51-2.6.31/debian/rules @@ -0,0 +1,19 @@ +#!/usr/bin/make -f +# +# $(DEBIAN)/rules for Ubuntu linux +# +# Use this however you want, just give credit where credit is due. +# +# Copyright (c) 2007 Ben Collins +# + +ifeq ($(DEBIAN),) +DEBIAN=$(shell awk -F= '($$1 == "DEBIAN") { print $$2 }' +Standards-Version: 3.6.1 +Build-Depends: debhelper (>= 3), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync +Build-Depends-Indep: xmlto, docbook-utils, gs, transfig, bzip2, sharutils +Build-Conflicts: findutils (= 4.4.1-1ubuntu1) +Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-karmic.git + + +Package: linux-image-2.6.31-612-imx51 +Architecture: armel +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda +Conflicts: hotplug (<< 0.0.20040105-1) +Recommends: flash-kernel +Suggests: fdutils, linux-fsl-imx51-doc-2.6.31 | linux-fsl-imx51-source-2.6.31 +Description: Linux kernel image for version 2.6.31 on I.MX51-based systems + This package contains the Linux kernel image for version 2.6.31 on + I.MX51-based systems. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports I.MX51 processors. + . + Babbage boards + . + You likely do not want to install this package directly. Instead, install + the linux-imx51 meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. + +Package: linux-headers-2.6.31-612-imx51 +Architecture: armel +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0), ${shlibs:Depends} +Description: Linux kernel headers for version 2.6.31 on I.MX51-based systems + This package provides kernel header files for version 2.6.31 on + I.MX51-based systems. + . + This is for sites that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-2.6.31-612/debian.README.gz for details. + + +Package: kernel-image-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: kernel-image +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: extra +Description: Linux kernel binary image for the Debian installer + This package contains the kernel image for the Debian installer + boot images. It does _not_ provide a usable kernel for your full + Debian system. + +Package: nic-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: nic-modules +Depends: kernel-image-2.6.31-612-imx51-di, nic-shared-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Network interface support + +Package: nic-shared-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: nic-shared-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Shared NIC drivers + This package contains NIC drivers needed by combinations of nic-modules, + nic-extra-modules, nic-pcmcia-modules, and nic-wireless-modules. + +Package: serial-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: serial-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Serial port support + +Package: ppp-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: ppp-modules +Depends: kernel-image-2.6.31-612-imx51-di, nic-shared-modules-2.6.31-612-imx51-di, serial-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: PPP (serial port) networking support + +Package: scsi-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: scsi-modules +Depends: kernel-image-2.6.31-612-imx51-di, storage-core-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: SCSI storage support + +Package: plip-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: plip-modules +Depends: kernel-image-2.6.31-612-imx51-di, nic-shared-modules-2.6.31-612-imx51-di, parport-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: PLIP (parallel port) networking support + +Package: fat-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: fat-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: FAT filesystem support + This includes Windows FAT and VFAT support. + +Package: nfs-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: nfs-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: NFS filesystem drivers + Includes the NFS client driver, and supporting modules. + +Package: md-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: md-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Multi-device support (raid, device-mapper, lvm) + +Package: usb-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: usb-modules +Depends: kernel-image-2.6.31-612-imx51-di, storage-core-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Core USB support + +Package: input-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: input-modules +Depends: kernel-image-2.6.31-612-imx51-di, usb-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Support for various input methods + +Package: mouse-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: mouse-modules +Depends: kernel-image-2.6.31-612-imx51-di, input-modules-2.6.31-612-imx51-di, usb-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: extra +Description: Mouse support + This package contains mouse drivers for the Linux kernel. + +Package: irda-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: irda-modules +Depends: kernel-image-2.6.31-612-imx51-di, nic-shared-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Support for Infrared protocols + +Package: parport-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: parport-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Parallel port support + +Package: nic-usb-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: nic-usb-modules +Depends: kernel-image-2.6.31-612-imx51-di, nic-shared-modules-2.6.31-612-imx51-di, usb-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: USB network interface support + +Package: sata-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: sata-modules +Depends: kernel-image-2.6.31-612-imx51-di, storage-core-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: SATA storage support + +Package: crypto-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: crypto-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: extra +Description: crypto modules + This package contains crypto modules. + +Package: fs-core-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: fs-core-modules, jfs-modules, reiserfs-modules, xfs-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Base filesystem modules + This includes jfs, reiserfs and xfs. + +Package: fs-secondary-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: fs-secondary-modules, ntfs-modules, hfs-modules +Depends: kernel-image-2.6.31-612-imx51-di, fat-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Extra filesystem modules + This includes support for Windows NTFS and MacOS HFS/HFSPlus + +Package: storage-core-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: storage-core-modules, loop-modules +Depends: kernel-image-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Core storage support + Includes core SCSI, LibATA, USB-Storage. Also includes related block + devices for CD, Disk and Tape medium (and IDE Floppy). + +Package: block-modules-2.6.31-612-imx51-di +XC-Package-Type: udeb +Provides: block-modules +Depends: kernel-image-2.6.31-612-imx51-di, storage-core-modules-2.6.31-612-imx51-di, parport-modules-2.6.31-612-imx51-di +Architecture: armel +XB-Kernel-Version: 2.6.31-612-imx51 +Section: debian-installer +Priority: standard +Description: Block storage devices + This package contains the block storage devices, including DAC960 and + paraide. --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/external-driver +++ linux-fsl-imx51-2.6.31/debian/commit-templates/external-driver @@ -0,0 +1,20 @@ +# Ubuntu external driver commit. +# +# NOTE: This gets reformatted for README.Ubuntu-External-Drivers and +# debian/changelog. +# +# This is only needed when a driver is added, updated or removed. It is +# not needed when patches or fixes are applied to the driver. If the +# driver is being removed, add the line: +# +# Removing: yes +# +# to the commit, and you can remove all other tags (except UBUNTU:). +# +UBUNTU: + +ExternalDriver: +Description: +Url: +Mask: +Version: --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/bumpabi +++ linux-fsl-imx51-2.6.31/debian/commit-templates/bumpabi @@ -0,0 +1,3 @@ +UBUNTU: Bump ABI + +Ignore: yes --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/upstream-patch +++ linux-fsl-imx51-2.6.31/debian/commit-templates/upstream-patch @@ -0,0 +1,27 @@ +# Ubuntu commit template. +# +# NOTE: This gets reformatted for debian/changelog +# +# The initial UBUNTU is a flag that this is an Ubuntu commit. It will be +# referenced to the Author in the debian/changelog entry. +# +# The text following is the short message that will be placed in the +# changelog. Extra text on the following lines will be ignored, but left +# in the git commit. Lines with # will be ignored in the commit. +# +# OriginalAuthor allows for alternate attribution. +# +# OriginalLocation allows for a URL or description of where the patch came +# from. +# +# BugLink is a URL to a Malone bug. +# +# Ignore: yes will keep this commit from showing up in the changelog. +# +UBUNTU: [Upstream] + +# OriginalAuthor: +# OriginalLocation: +# BugLink: http://bugs.launchpad.net/bugs/ +# Ignore: yes +# Other text below here. --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/newrelease +++ linux-fsl-imx51-2.6.31/debian/commit-templates/newrelease @@ -0,0 +1,3 @@ +UBUNTU: Start new release + +Ignore: yes --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/sauce-patch +++ linux-fsl-imx51-2.6.31/debian/commit-templates/sauce-patch @@ -0,0 +1,40 @@ +# Ubuntu commit template. +# +# NOTE: This gets reformatted for debian/changelog +# +# +# SAUCE refers to the fact that this patch might not go upstream, but we need to +# carry it to successive releases. In most cases you DONOT want to use this +# template. +# +# An example of a SAUCE patch is the ACPI DSDT-in-initramfs patch which has been +# refused upstream, but still provides useful functionality to users with broken +# BIOSes. +# +#------------------------------------------------------------------------- +# +# The initial UBUNTU is a flag that this is an Ubuntu commit. It will be +# referenced to the Author in the debian/changelog entry. +# +# The text following is the short message that will be placed in the +# changelog. Extra text on the following lines will be ignored, but left +# in the git commit. Lines with # will be ignored in the commit. +# +# OriginalAuthor allows for alternate attribution. +# +# OriginalLocation allows for a URL or description of where the patch came +# from. +# +# BugLink is a URL to a Malone bug. +# +# Ignore: yes will keep this commit from showing up in the changelog. +# +UBUNTU: SAUCE: + + + +# OriginalAuthor: +# OriginalLocation: +# BugLink: http://bugs.launchpad.net/bugs/ +# Ignore: yes +# Other text below here. --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/config-updates +++ linux-fsl-imx51-2.6.31/debian/commit-templates/config-updates @@ -0,0 +1,15 @@ +# +# This template is used for commit messages that don't need to +# show up in debian/changelog. Administrative stuff like config +# updates, ABI bumps, etc. Setting 'Ignore: yes' prevents +# 'debian/rules insertchanges' from inserting this commit meesage +# as a changelog entry. +# +# Please give a one-line description of the config change followed +# by a detailed explanation if necessary + +UBUNTU: [Config] XXXX + +# BugLink: http://bugs.launchpad.net/bugs/ +# Ignore: yes +# Other text below here. --- linux-fsl-imx51-2.6.31.orig/debian/commit-templates/missing-modules +++ linux-fsl-imx51-2.6.31/debian/commit-templates/missing-modules @@ -0,0 +1,3 @@ +UBUNTU: build/modules: Add modules that have intentionally gone missing + +Ignore: yes --- linux-fsl-imx51-2.6.31.orig/debian/stamps/keep-dir +++ linux-fsl-imx51-2.6.31/debian/stamps/keep-dir @@ -0,0 +1 @@ +Place holder --- linux-fsl-imx51-2.6.31.orig/Documentation/imx_nfc.txt +++ linux-fsl-imx51-2.6.31/Documentation/imx_nfc.txt @@ -0,0 +1,369 @@ +i.MX NAND Flash Controller Driver Documentation +=============================================== + + +Definitions of Terms +==================== + +To avoid confusion, let's carefully define some of the terms we'll be using: + + "NAND Flash Chip" or "Chip" + A NAND Flash storage array and controller (including a chip select + signal, ready/busy signal, data register, etc.). + + "NAND Flash Package" or "Package" + A hardware package containing one or more NAND Flash chips that share + data lines and most control signals, but with separate chip select + and ready/busy signals. Package "boundaries" are unimportant to MTD. + + "NAND Flash Medium" or "Medium" + A collection of one or more NAND Flash chips that the system views as + logically contiguous. + + "Memory Technology Device" or "MTD" + An abstraction of underlying memory hardware, represented by a single + struct mtd_info. + + "NAND Flash MTD" + An abstraction of a NAND Flash medium that is represented by a single + struct nand_chip (the name of this structure is misleading because it + has evolved to represent an entire medium, not just a single chip). + All the physical chips in a NAND Flash MTD medium have answered the + "Read ID" command with the same manufacturer code and device code and + are presumed to have identical characteristics. + + "NAND Flash MTD Hardware-independent Layer" or "HIL" + The code that implements an MTD interface and drives all NAND Flash + MTDs. + + "NAND Flash MTD Hardware Abstraction Layer" or "HAL" + Code that implements the internal NAND Flash hardware model and + matches it to specific hardware. + + "NAND Flash MTD Reference Implementation" + A reference implementation of a HAL "stack." + + "Out-of-Band" or "OOB" + An adjective describing information that is not part of the "data" in + a NAND Flash page. NAND Flash pages are generally described in terms + of the amount of data they can hold (e.g., "2K pages" or "4K pages"). + The physical page size is actually larger than this and the + additional bytes are called "out-of-band." + + + +The Structure of the MTD NAND Flash System +========================================== + +The following figure illustrates how control flows down from the system's +MTD interface into the NAND Flash MTD system and down to the hardware- +specific implementation (this driver): + + + + / +---------------------------------------+ + | | MTD | + | +---------------------------------------+ + MTD | | + | | +----------+ + | | | | + | v v | + \ ======================================== | + - struct mtd_info | + / ======================================== | + | | | + | v | + | +---------------------------------------+ | + | | NAND Flash MTD | | + NAND Flash | | Interface Functions | | + Hardware- | +---------------------------------------+ | + Independent | | | | + Layer | | v | + (HIL) | +-------------+ | +-------------+ +-------------+ + | | Init | | | Support | | Reference | + | | Functions | | | Functions | |BBT Functions| + | +-------------+ | +-------------+ +-------------+ + | | | | ^ + | v v v | + \ ======================================== | + - struct nand_chip | + / ======================================== | + | | ^ | ^ | | + NAND Flash | | | | | | | + Hardware | v | v | | | + Abstraction | +--------------+ +---------------+ | | + Layer | | Hardware- | | Reference | +-----------+ + (HAL) | | Specific | | | + | |Implementation| |Implementations| + \ +--------------+ +---------------+ + + + +The function pointers and attributes in struct mtd_info embody an abstract +model of memory technology devices. + +The struct nand_chip is an aggregation of two categories of function pointers +and attributes: + + - Function pointers and attributes used by the HIL. These members embody + an abstract model of NAND Flash media, or a hardware abstraction + layer (HAL). + + - Function pointers and attributes used by the reference implementations. + +The single most confusing thing about the MTD NAND Flash system is that +struct nand_chip contains all the main HAL members mixed up with all the +members used only by the reference implementation, without any clear +distinction. Recognizing the distinction is critical for understanding the +relationship between the HIL and HAL, and can greatly simplify driver +implementation. + +The fundamental operations represented by the function pointers in +struct nand_chip fall into the following categories (from conceptually +"low-level" to "high-level"): + + - Signal Control + - Chip Control + - Low-level I/O + - ECC Control + - ECC-aware I/O + - Error Recovery + - High-level I/O + - Bad Block Management + +The HIL uses only the following "Replaceable" function pointers in +struct nand_chip: + + - Signal Control + - None + - Chip Control + - dev_ready + - select_chip + - cmdfunc + - waitfunc + - Low-level I/O + - read_byte + - ECC Control + - None + - ECC-aware I/O + - ecc.read_page + - ecc.read_page_raw + - Error Recovery + - None + - High-level I/O + - write_page + - ecc.read_oob + - ecc.write_oob + - Bad Block Management + - block_bad + - block_markbad + - scan_bbt + +Note that the HIL calls erase_cmd, but this member is marked "Internal." + +The HIL uses only the following commands with cmdfunc: + + * NAND_CMD_STATUS + - nand_check_wp() - Checks if the current chip is + write-protected. + * NAND_CMD_READID + - nand_get_flash_type() - Gets information about the first chip. + - nand_scan_ident() - Scans for additional chips. + * NAND_CMD_RESET + - nand_do_write_oob() - Clears a bug observed on the + Toshiba TC5832DC and DiskOnChip 2000. + * NAND_CMD_READ0 + - nand_do_read_ops() - Used to begin a full page read (both with + and without ECC). + * NAND_CMD_ERASE1 + - single_erase_cmd() - Starts a block erase operation. + - multi_erase_cmd() - Starts a block erase operation. + * NAND_CMD_ERASE2 + - single_erase_cmd() - Finishes a block erase operation. + - multi_erase_cmd() - Finishes a block erase operation. + + +Since this is all the HIL uses, this is all a driver needs to implement. + + + +The Structure of the imx_nfc Driver +=================================== + +This driver supports many different versions of underlying controller, and +also supports higher-level abstractions like interleaving. To facilitate this +versatility, the code is layered as shown in the following diagram: + + + +--------------------------------------+ + | MTD | + +--------------------------------------+ + | NAND Flash MTD | + ======================================== <-- struct nand_chip + / | MTD Interface Layer (mil_*) | + | | +----------------------------------+ + | | | Medium Abstraction Layer (mal_*) | + imx_nfc | | | | + driver | | | +------------------------+ + | | | | NFC Utils (nfc_util_*) | + | ======================================== <-- struct nfc_hal + \ | NFC HAL (nfc_x_y_*) | + ======================================== <-- Hardware Interface + | NFC Hardware | + +--------------------------------------+ + + +MTD Interface Layer +------------------- +This layer includes functions that the NAND Flash MTD system calls directly. +In a manner of speaking, this layer "parses" the function calls made by MTD +and translates them into fundamental operations understood by the Medium +Abstraction Layer. Some simple operations don't need any abstraction, so code +in this layer can sometimes use the NFC HAL directly. + + +Medium Abstraction Layer +------------------------ +This layer implements the abstract model of the NAND Flash medium and hides +details that shouldn't concern higher layers (e.g., interleaving). + + +NFC Utilities +------------- +These functions make it easier to use the NFC HAL. Even though this layer +is shown above the NFC HAL in the diagram, it's actually possible for the +NFC HAL to call some of these functions. + + +NFC HAL +------- +This layer implements the abstract model of an i.MX NAND Flash controller. + + +Other Collections of Functions +------------------------------ + +- System Interface + - imx_nfc_* + +- sysfs Interface + - get_module_* + - set_module_* + - show_device_* + - store_device_* + + + + +i.MX NAND Flash Controller Versions +=================================== + +The i.MX NAND Flash controller (NFC) has evolved over time. Both its memory +layout and behaviors have changed. In this driver, we use major and minor +version numbers to label these stages in the NFC's evolution. These version +numbers are very useful, but they are entirely a figment of this driver's +imagination -- you will never find them in Freescale hardware reference +manuals. + +When the platform code instantiates an i.MX NFC device, it provides a struct +imx_nfc_platform_data that contains platform-specific information. This +includes the major and minor version numbers for the NFC. This driver uses +the version numbers to select an appopriate NFC HAL structure. + + + +i.MX NFC Memory Map +=================== + +While many things have changed during the evolution of the NFC, much has +remained the same. All i.MX NFCs have two or three essential memory-mapped +regions: a set of buffers, and one or two sets of registers (one on the AXI +bus and perhaps a second on the IP bus). + +The buffer area contains the captive memory to which the NFC writes data +received from the NAND Flash medium. This area is subdivided into several +contiguous "main" buffers that hold 512-byte chunks of data, and several +"spare" buffers that hold varying-size chunks of out-of-band bytes. The +number of main buffers is always the same as the number of spare buffers, but +the exact count and the size of the spare buffers varies across NFC versions. + +The register areas contain the NFC's control interface. Some versions have +only one set of registers, and some have two. + +The platform-specific resources passed to this driver include the starting +and ending physical addresses of the buffer and register areas. This driver +maps those physical addresses to virtual addresses, and then uses version- +specific offsets and bit masks to operate the NFC. + + + +Matching the NAND Flash MTD Page Model with the i.MX NFC +======================================================== + +The NAND Flash MTD HAL model views a page as containing two essentially +independent groups of bytes: "data" bytes and "out-of-band" bytes. If the +underlying physical format has data and out-of-band bytes distributed across +the page, they must be reassembled before being delivered to the caller +(e.g., see the function nand_read_page_syndrome(), which is part of the +reference implementation). + +The i.MX NFC hardware imposes both a physical page layout and a layout in its +memory buffer that differ from the HAL model. The following figure shows how +all these layouts relate to each other: + + + i.MX NFC i.MX NFC + Physical Memory NAND Flash + Page Buffers MTD Model + + +--------+ +--------+ +--------+ + |OOB[N-1]| |OOB[N-1]| |OOB[N-1]| + +--------+ +--------+ +--------+ + | | |OOB[ 1 ]| + | Data | +--------+ +--------+ + | [N-1] | |OOB[ 1 ]| |OOB[ 0 ]| + | | +--------+ +--------+ + +--------+ + ... +--------+ +--------+ + +--------+ |OOB[ 0 ]| | | + |OOB[ 1 ]| +--------+ | Data | + +--------+ | | | [N-1] | + | | | Data | | | + | Data | | [N-1] | +--------+ + | [ 1 ] | | | | | + | | +--------+ | Data | + +--------+ ... | [ 1 ] | + |OOB[ 0 ]| +--------+ | | + +--------+ | | +--------+ + | | | Data | | | + | Data | | [ 1 ] | | Data | + | [ 0 ] | | | | [ 0 ] | + | | +--------+ | | + +--------+ | | +--------+ + | Data | + | [ 0 ] | + | | + +--------+ + + +The NFC memory is *almost* what we want, but not quite. The problems are: + + 1) There are gaps between the out-of-band fragments. + + 2) The NFC memory responds only to 16-byte or 32-byte reads and writes. + +To resolve these problems, we've encapsulated the NFC memory behind these +functions: + + nfc_util_copy_from_the_nfc() - Copies data to main memory from the the NFC. + nfc_util_copy_to_the_nfc() - Copies data from main memory to the NFC. + +These functions don't take pointers to locations within the NFC memory - they +take a "column address." These functions know how to skip over the gaps and +handle the NFC memory such that it looks like all the data and out-of-band +bytes are completely contiguous. They also handle copying arbitrary bytes +from/to a memory that only responds to 16- or 32-byte reads/writes. If you're +accessing the NFC memory without these functions, you're *probably* doing +something wrong. + + --- linux-fsl-imx51-2.6.31.orig/Documentation/kernel-parameters.txt +++ linux-fsl-imx51-2.6.31/Documentation/kernel-parameters.txt @@ -90,6 +90,7 @@ A lot of drivers has their options described inside of Documentation/scsi/. SECURITY Different security models are enabled. + SECURITY_DEFAULT set a default security module SELINUX SELinux support is enabled. SERIAL Serial support is enabled. SH SuperH architecture is enabled. @@ -2561,6 +2562,8 @@ to a common usb-storage quirk flag as follows: a = SANE_SENSE (collect more than 18 bytes of sense data); + b = BAD_SENSE (don't collect more than 18 + bytes of sense data); c = FIX_CAPACITY (decrease the reported device capacity by one sector); h = CAPACITY_HEURISTICS (decrease the --- linux-fsl-imx51-2.6.31.orig/Documentation/laptops/thinkpad-acpi.txt +++ linux-fsl-imx51-2.6.31/Documentation/laptops/thinkpad-acpi.txt @@ -674,6 +674,10 @@ echo expand_toggle > /proc/acpi/ibm/video echo video_switch > /proc/acpi/ibm/video +NOTE: Access to this feature is restricted to processes owning the +CAP_SYS_ADMIN capability for safety reasons, as it can interact badly +enough with some versions of X.org to crash it. + Each video output device can be enabled or disabled individually. Reading /proc/acpi/ibm/video shows the status of each device. --- linux-fsl-imx51-2.6.31.orig/Documentation/video4linux/CARDLIST.cx88 +++ linux-fsl-imx51-2.6.31/Documentation/video4linux/CARDLIST.cx88 @@ -80,3 +80,4 @@ 79 -> Terratec Cinergy HT PCI MKII [153b:1177] 80 -> Hauppauge WinTV-IR Only [0070:9290] 81 -> Leadtek WinFast DTV1800 Hybrid [107d:6654] + 82 -> WinFast DTV2000 H rev. J [107d:6f2b] --- linux-fsl-imx51-2.6.31.orig/Documentation/video4linux/gspca.txt +++ linux-fsl-imx51-2.6.31/Documentation/video4linux/gspca.txt @@ -37,6 +37,7 @@ ov519 041e:4060 Creative Live! VISTA VF0350 ov519 041e:4061 Creative Live! VISTA VF0400 ov519 041e:4064 Creative Live! VISTA VF0420 +ov519 041e:4067 Creative Live! Cam Video IM (VF0350) ov519 041e:4068 Creative Live! VISTA VF0470 spca561 0458:7004 Genius VideoCAM Express V2 sunplus 0458:7006 Genius Dsc 1.3 Smart @@ -284,6 +285,7 @@ sonixj 0c45:613b Surfer SN-206 sonixj 0c45:613c Sonix Pccam168 sonixj 0c45:6143 Sonix Pccam168 +sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) --- linux-fsl-imx51-2.6.31.orig/Documentation/kbuild/kconfig.txt +++ linux-fsl-imx51-2.6.31/Documentation/kbuild/kconfig.txt @@ -103,6 +103,11 @@ This environment variable can be set to specify the path & name of the "auto.conf" file. Its default value is "include/config/auto.conf". +KCONFIG_TRISTATE +-------------------------------------------------- +This environment variable can be set to specify the path & name of the +"tristate.conf" file. Its default value is "include/config/tristate.conf". + KCONFIG_AUTOHEADER -------------------------------------------------- This environment variable can be set to specify the path & name of the --- linux-fsl-imx51-2.6.31.orig/Documentation/kbuild/kbuild.txt +++ linux-fsl-imx51-2.6.31/Documentation/kbuild/kbuild.txt @@ -1,3 +1,17 @@ +Output files + +modules.order +-------------------------------------------------- +This file records the order in which modules appear in Makefiles. This +is used by modprobe to deterministically resolve aliases that match +multiple modules. + +modules.builtin +-------------------------------------------------- +This file lists all modules that are built into the kernel. This is used +by modprobe to not fail when trying to load something builtin. + + Environment variables KCPPFLAGS --- linux-fsl-imx51-2.6.31.orig/Documentation/filesystems/ext4.txt +++ linux-fsl-imx51-2.6.31/Documentation/filesystems/ext4.txt @@ -153,8 +153,8 @@ identified through its new major/minor numbers encoded in devnum. -noload Don't load the journal on mounting. Note that - if the filesystem was not unmounted cleanly, +norecovery Don't load the journal on mounting. Note that +noload if the filesystem was not unmounted cleanly, skipping the journal replay will lead to the filesystem containing inconsistencies that can lead to any number of problems. @@ -338,6 +338,12 @@ system crashes before the delayed allocation blocks are forced to disk. +discard Controls whether ext4 should issue discard/TRIM +nodiscard(*) commands to the underlying block device when + blocks are freed. This is useful for SSD devices + and sparse/thinly-provisioned LUNs, but it is off + by default until sufficient testing has been done. + Data Mode ========= There are 3 different data modes: --- linux-fsl-imx51-2.6.31.orig/Documentation/networking/README.ipw2200 +++ linux-fsl-imx51-2.6.31/Documentation/networking/README.ipw2200 @@ -171,7 +171,7 @@ led Can be used to turn on experimental LED code. - 0 = Off, 1 = On. Default is 0. + 0 = Off, 1 = On. Default is 1. mode Can be used to set the default mode of the adapter. --- linux-fsl-imx51-2.6.31.orig/Documentation/networking/timestamping/timestamping.c +++ linux-fsl-imx51-2.6.31/Documentation/networking/timestamping/timestamping.c @@ -381,7 +381,7 @@ memset(&hwtstamp, 0, sizeof(hwtstamp)); strncpy(hwtstamp.ifr_name, interface, sizeof(hwtstamp.ifr_name)); hwtstamp.ifr_data = (void *)&hwconfig; - memset(&hwconfig, 0, sizeof(&hwconfig)); + memset(&hwconfig, 0, sizeof(hwconfig)); hwconfig.tx_type = (so_timestamping_flags & SOF_TIMESTAMPING_TX_HARDWARE) ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; --- linux-fsl-imx51-2.6.31.orig/Documentation/connector/cn_test.c +++ linux-fsl-imx51-2.6.31/Documentation/connector/cn_test.c @@ -32,10 +32,8 @@ static struct sock *nls; static struct timer_list cn_test_timer; -void cn_test_callback(void *data) +static void cn_test_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp) { - struct cn_msg *msg = (struct cn_msg *)data; - printk("%s: %lu: idx=%x, val=%x, seq=%u, ack=%u, len=%d: %s.\n", __func__, jiffies, msg->id.idx, msg->id.val, msg->seq, msg->ack, msg->len, (char *)msg->data); --- linux-fsl-imx51-2.6.31.orig/Documentation/connector/connector.txt +++ linux-fsl-imx51-2.6.31/Documentation/connector/connector.txt @@ -23,7 +23,7 @@ based networking for inter-process communication in a significantly easier way: -int cn_add_callback(struct cb_id *id, char *name, void (*callback) (void *)); +int cn_add_callback(struct cb_id *id, char *name, void (*callback) (struct cn_msg *, struct netlink_skb_parms *)); void cn_netlink_send(struct cn_msg *msg, u32 __group, int gfp_mask); struct cb_id @@ -53,15 +53,15 @@ Connector interfaces. /*****************************************/ -int cn_add_callback(struct cb_id *id, char *name, void (*callback) (void *)); +int cn_add_callback(struct cb_id *id, char *name, void (*callback) (struct cn_msg *, struct netlink_skb_parms *)); Registers new callback with connector core. -struct cb_id *id - unique connector's user identifier. - It must be registered in connector.h for legal in-kernel users. -char *name - connector's callback symbolic name. -void (*callback) (void *) - connector's callback. - Argument must be dereferenced to struct cn_msg *. + struct cb_id *id - unique connector's user identifier. + It must be registered in connector.h for legal in-kernel users. + char *name - connector's callback symbolic name. + void (*callback) (struct cn..) - connector's callback. + cn_msg and the sender's credentials void cn_del_callback(struct cb_id *id); --- linux-fsl-imx51-2.6.31.orig/lib/idr.c +++ linux-fsl-imx51-2.6.31/lib/idr.c @@ -156,10 +156,12 @@ id = (id | ((1 << (IDR_BITS * l)) - 1)) + 1; /* if already at the top layer, we need to grow */ - if (!(p = pa[l])) { + if (id >= 1 << (idp->layers * IDR_BITS)) { *starting_id = id; return IDR_NEED_TO_GROW; } + p = pa[l]; + BUG_ON(!p); /* If we need to go up one layer, continue the * loop; otherwise, restart from the top. --- linux-fsl-imx51-2.6.31.orig/lib/md5.c +++ linux-fsl-imx51-2.6.31/lib/md5.c @@ -0,0 +1,95 @@ +#include +#include +#include + +#define F1(x, y, z) (z ^ (x & (y ^ z))) +#define F2(x, y, z) F1(z, x, y) +#define F3(x, y, z) (x ^ y ^ z) +#define F4(x, y, z) (y ^ (x | ~z)) + +#define MD5STEP(f, w, x, y, z, in, s) \ + (w += f(x, y, z) + in, w = (w<>(32-s)) + x) + +void md5_transform(__u32 *hash, __u32 const *in) +{ + u32 a, b, c, d; + + a = hash[0]; + b = hash[1]; + c = hash[2]; + d = hash[3]; + + MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); + MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12); + MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17); + MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22); + MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); + MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12); + MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17); + MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22); + MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7); + MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12); + MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17); + MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22); + MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7); + MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12); + MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17); + MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22); + + MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5); + MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9); + MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14); + MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20); + MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5); + MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9); + MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14); + MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20); + MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5); + MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9); + MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14); + MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20); + MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5); + MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9); + MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14); + MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20); + + MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4); + MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11); + MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16); + MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23); + MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4); + MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11); + MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16); + MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23); + MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4); + MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11); + MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16); + MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23); + MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4); + MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11); + MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16); + MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23); + + MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6); + MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10); + MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); + MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21); + MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6); + MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10); + MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); + MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21); + MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6); + MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10); + MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15); + MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21); + MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6); + MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10); + MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15); + MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21); + + hash[0] += a; + hash[1] += b; + hash[2] += c; + hash[3] += d; +} +EXPORT_SYMBOL(md5_transform); --- linux-fsl-imx51-2.6.31.orig/lib/Makefile +++ linux-fsl-imx51-2.6.31/lib/Makefile @@ -10,7 +10,7 @@ lib-y := ctype.o string.o vsprintf.o cmdline.o \ rbtree.o radix-tree.o dump_stack.o \ idr.o int_sqrt.o extable.o prio_tree.o \ - sha1.o irq_regs.o reciprocal_div.o argv_split.o \ + sha1.o md5.o irq_regs.o reciprocal_div.o argv_split.o \ proportions.o prio_heap.o ratelimit.o show_mem.o \ is_single_threaded.o plist.o decompress.o flex_array.o --- linux-fsl-imx51-2.6.31.orig/debian.master/control.stub.in +++ linux-fsl-imx51-2.6.31/debian.master/control.stub.in @@ -0,0 +1,67 @@ +Source: linux +Section: devel +Priority: optional +Maintainer: Ubuntu Kernel Team +Standards-Version: 3.6.1 +Build-Depends: debhelper (>= 3), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), makedumpfile [amd64 i386 lpia], device-tree-compiler [powerpc] +Build-Depends-Indep: xmlto, docbook-utils, gs, transfig, bzip2, sharutils +Build-Conflicts: findutils (= 4.4.1-1ubuntu1) +Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-karmic.git + +Package: SRCPKGNAME-source-PKGVER +Architecture: all +Section: devel +Priority: optional +Provides: SRCPKGNAME-source, SRCPKGNAME-source-2.6 +Depends: binutils, bzip2, coreutils | fileutils (>= 4.0) +Recommends: libc-dev, gcc, make +Suggests: libncurses-dev | ncurses-dev, kernel-package, libqt3-dev +Description: Linux kernel source for version PKGVER with Ubuntu patches + This package provides the source code for the Linux kernel version + PKGVER. + . + This package is mainly meant for other packages to use, in order to build + custom flavours. + . + If you wish to use this package to create a custom Linux kernel, then it + is suggested that you investigate the package kernel-package, which has + been designed to ease the task of creating kernel image packages. + . + If you are simply trying to build third-party modules for your kernel, + you do not want this package. Install the appropriate linux-headers + package instead. + +Package: SRCPKGNAME-doc +Architecture: all +Section: doc +Priority: optional +Conflicts: SRCPKGNAME-doc-2.6 +Replaces: SRCPKGNAME-doc-2.6 +Description: Linux kernel specific documentation for version PKGVER + This package provides the various documents in the PKGVER kernel + Documentation/ subdirectory. These document kernel subsystems, APIs, device + drivers, and so on. See + /usr/share/doc/SRCPKGNAME-doc/00-INDEX for a list of what is + contained in each file. + +Package: linux-headers-PKGVER-ABINUM +Architecture: all +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0) +Provides: linux-headers, linux-headers-2.6 +Description: Header files related to Linux kernel version PKGVER + This package provides kernel header files for version PKGVER, for sites + that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-PKGVER-ABINUM/debian.README.gz for details + +Package: SRCPKGNAME-libc-dev +Architecture: i386 amd64 lpia ia64 powerpc sparc armel +Conflicts: libc6-dev (<< 2.3.2.ds1-6), libc6.1-dev (<< 2.3.2.ds1-6), dvb-dev (<< 1.0.1-6), amd64-libs-dev (<= 1.1), SRCPKGNAME-kernel-headers +Replaces: libc6-dev (<< 2.3.2.ds1-6), libc6.1-dev (<< 2.3.2.ds1-6), dvb-dev (<< 1.0.1-6), SRCPKGNAME-kernel-headers, libdrm-dev +Provides: SRCPKGNAME-kernel-headers +Description: Linux Kernel Headers for development + This package provides headers from the Linux kernel. These headers + are used by the installed headers for GNU glibc and other system + libraries. They are NOT meant to be used to build third-party modules for + your kernel. Use linux-headers-* packages for that. --- linux-fsl-imx51-2.6.31.orig/debian.master/copyright +++ linux-fsl-imx51-2.6.31/debian.master/copyright @@ -0,0 +1,30 @@ +This is the Ubuntu prepackaged version of the Linux kernel. +Linux was written by Linus Torvalds +and others. + +This package was put together by the Ubuntu Kernel Team, from +sources retrieved from upstream linux git. +The sources may be found at most Linux ftp sites, including +ftp://ftp.kernel.org/pub/linux/kernel/ + +This package is currently maintained by the +Ubuntu Kernel Team + +Linux is copyrighted by Linus Torvalds and others. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 dated June, 1991. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. + +On Ubuntu Linux systems, the complete text of the GNU General +Public License v2 can be found in `/usr/share/common-licenses/GPL-2'. --- linux-fsl-imx51-2.6.31.orig/debian.master/NOTES +++ linux-fsl-imx51-2.6.31/debian.master/NOTES @@ -0,0 +1,4 @@ +eSCO patch removed. Replaced upstream with a disable_esco module parm. +airprime: Module gone, use option driver instead +AppArmor: Patch is all there and ported. Ooops when enabled, so default + off (still can be enabled apparmor=1) --- linux-fsl-imx51-2.6.31.orig/debian.master/changelog +++ linux-fsl-imx51-2.6.31/debian.master/changelog @@ -0,0 +1,3321 @@ +linux (2.6.31-22.72) karmic-proposed; urgency=low + + [ Brad Figg ] + + * Tracking Bug + - LP: #708860 + + [ Upstream Kernel Changes ] + + * Karmic SRU: thinkpad-acpi: lock down video output state access, CVE-2010-3448 + - LP: #706999 + - CVE-2010-3448 + * USB: serial/mos*: prevent reading uninitialized stack memory, + CVE-2010-4074 + - LP: #706149 + - CVE-2010-4074 + * KVM: Fix fs/gs reload oops with invalid ldt + - LP: #707000 + - CVE-2010-3698 + * drivers/video/sis/sis_main.c: prevent reading uninitialized stack + memory, CVE-2010-4078 + - LP: #707579 + - CVE-2010-4078 + * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory, + CVE-2010-4079 + - LP: #707649 + - CVE-2010-4079 + + -- Brad Figg Thu, 27 Jan 2011 09:25:32 -0800 + +linux (2.6.31-22.71) karmic-proposed; urgency=low + + [ Brad Figg ] + + - LP: #698214 + + [ Upstream Kernel Changes ] + + * ipc: initialize structure memory to zero for compat functions + * tcp: Increase TCP_MAXSEG socket option minimum. + - CVE-2010-4165 + * perf_events: Fix perf_counter_mmap() hook in mprotect() + - CVE-2010-4169 + * af_unix: limit unix_tot_inflight + - CVE-2010-4249 + + -- Brad Figg Thu, 06 Jan 2011 10:09:34 -0800 + +linux (2.6.31-22.70) karmic-proposed; urgency=low + + [ Leann Ogasawara ] + + - LP: #683474 + * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer + dereference" + * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges" + * Revert "SAUCE: AF_ECONET prevent kernel stack overflow" + + [ Upstream Kernel Changes ] + + * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE + - CVE-2010-2538 + * xfs: validate untrusted inode numbers during lookup + - CVE-2010-2943 + * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED + - CVE-2010-2943 + * xfs: remove block number from inode lookup code + - CVE-2010-2943 + * xfs: fix untrusted inode number lookup + - CVE-2010-2943 + * drm/i915: Sanity check pread/pwrite + - CVE-2010-2962 + * drm/i915: Rephrase pwrite bounds checking to avoid any potential + overflow + - CVE-2010-2962 + * tracing: Do not allow llseek to set_ftrace_filter + - CVE-2010-3079 + * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack + memory + - CVE-2010-3296 + * drivers/net/eql.c: prevent reading uninitialized stack memory + - CVE-2010-3297 + * drivers/net/usb/hso.c: prevent reading uninitialized memory + - CVE-2010-3298 + * setup_arg_pages: diagnose excessive argument size + - CVE-2010-3858 + * net: clear heap allocation for ETHTOOL_GRXCLSRLALL + - CVE-2010-3861 + * ipc: shm: fix information leak to userland + - CVE-2010-4072 + * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849 + - CVE-2010-3849 + * econet: fix CVE-2010-3850 + - CVE-2010-3850 + * econet: fix CVE-2010-3848 + - CVE-2010-3848 + + -- Leann Ogasawara Tue, 30 Nov 2010 20:16:51 -0800 + +linux (2.6.31-22.69) karmic-security; urgency=low + + [ Leann Ogasawara ] + + * SAUCE: AF_ECONET prevent kernel stack overflow + - CVE-2010-3848 + * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges + - CVE-2010-3850 + * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference + - CVE-2010-3849 + + -- Leann Ogasawara Fri, 19 Nov 2010 16:16:23 -0800 + +linux (2.6.31-22.68) karmic-proposed; urgency=low + + [ Andy Whitcroft ] + + * SAUCE: docs -- fix doc strings for fc_event_seq + + [ Brad Figg ] + + * SAUCE: (no-up) Modularize vesafb -- fix initialization + - LP: #611471 + + [ Chase Douglas ] + + * SAUCE: sched: update load count only once per cpu in 10 tick update + window + - LP: #513848 + + [ Ike Panhc ] + + * SAUCE: agp/intel: Add second set of PCI-IDs for B43 + - LP: #640214 + * SAUCE: drm/i915: Add second set of PCI-IDs for B43 + - LP: #640214 + + [ Steve Conklin ] + + * SAUCE: Fix compile error on ia64, powerpc, and sparc + + [ Upstream Kernel Changes ] + + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + -- Steve Conklin Fri, 22 Oct 2010 09:05:13 -0500 + +linux (2.6.31-22.67) karmic-security; urgency=low + + [ Upstream Kernel Changes ] + + * Local privilege escalation vulnerability in RDS sockets + - CVE-2010-3904 + * v4l: disable dangerous buggy compat function + - CVE-2010-2963 + * mm: Do not assume ENOMEM when looking at a split stack vma + - LP: #646114 + * mm: Use helper to find real vma with stack guard page + - LP: #646114 + * Fix race in tty_fasync() properly + - CVE-2009-4895 + * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files + - CVE-2010-2066 + * xfs: prevent swapext from operating on write-only files + - CVE-2010-2226 + * cifs: Fix a kernel BUG with remote OS/2 server (try #3) + - CVE-2010-2248 + * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH + - CVE-2010-2478 + * l2tp: Fix oops in pppol2tp_xmit + - CVE-2010-2495 + * nfsd4: bug in read_buf + - CVE-2010-2521 + * CIFS: Fix a malicious redirect problem in the DNS lookup code + - CVE-2010-2524 + * GFS2: rename causes kernel Oops + - CVE-2010-2798 + * net sched: fix some kernel memory leaks + - CVE-2010-2942 + * jfs: don't allow os2 xattr namespace overlap with others + - CVE-2010-2946 + * irda: Correctly clean up self->ias_obj on irda_bind() failure. + - CVE-2010-2954 + * wireless extensions: fix kernel heap content leak + - CVE-2010-2955 + * ext4: consolidate in_range() definitions + - CVE-2010-3015 + * aio: check for multiplication overflow in do_io_submit + - CVE-2010-3067 + * xfs: prevent reading uninitialized stack memory + - CVE-2010-3078 + * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open() + - CVE-2010-3080 + * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL + - CVE-2010-3084 + * rose: Fix signedness issues wrt. digi count. + - CVE-2010-3310 + * sctp: Do not reset the packet during sctp_packet_config(). + - CVE-2010-3432 + * Fix pktcdvd ioctl dev_minor range check + - CVE-2010-3437 + * ALSA: prevent heap corruption in snd_ctl_new() + - CVE-2010-3442 + * net sched: fix kernel leak in act_police + - CVE-2010-3477 + * Fix out-of-bounds reading in sctp_asoc_get_hmac() + - CVE-2010-3705 + * ocfs2: Don't walk off the end of fast symlinks. + - CVE-2010-NNN2 + + -- Steve Conklin Wed, 06 Oct 2010 16:05:21 +0100 + +linux (2.6.31-22.65) karmic-security; urgency=low + + [ Upstream Kernel Changes ] + + * x86-64, compat: Test %rax for the syscall number, not %eax + - CVE-2010-3301 + * x86-64, compat: Retruncate rax after ia32 syscall entry tracing + - CVE-2010-3301 + * compat: Make compat_alloc_user_space() incorporate the access_ok() + - CVE-2010-3081 + + -- Stefan Bader Thu, 16 Sep 2010 11:54:54 +0200 + +linux (2.6.31-22.63) karmic-security; urgency=low + + [ Upstream Kernel Changes ] + + * drm: Initialize ioctl struct when no user data is present + - CVE-2010-2803 + * can: add limit for nframes and clean up signed/unsigned variables + - CVE-2010-2959 + * mm: keep a guard page below a grow-down stack segment + - CVE-2010-2240 + * mm: fix missing page table unmap for stack guard page failure case + - CVE-2010-2240 + * mm: fix page table unmap for stack guard page properly + - CVE-2010-2240 + * mm: fix up some user-visible effects of the stack guard page + - CVE-2010-2240 + * x86: don't send SIGBUS for kernel page faults + - CVE-2010-2240 + + -- Stefan Bader Wed, 18 Aug 2010 11:58:06 +0200 + +linux (2.6.31-22.61) karmic-security; urgency=low + + [ Upstream Kernel Changes ] + + * sctp: Fix skb_over_panic resulting from multiple invalid parameter + errors (CVE-2010-1173) (v4) + - CVE-2010-1173 + * sctp: fix append error cause to ERROR chunk correctly + - CVE-2010-1173 + * GFS2: Fix writing to non-page aligned gfs2_quota structures + - CVE-2010-1436 + * KEYS: find_keyring_by_name() can gain access to a freed keyring + - CVE-2010-1437 + * sparc64: Fix sun4u execute bit check in TSB I-TLB load. + - CVE-2010-1451 + * Btrfs: check for read permission on src file in the clone ioctl + - CVE-2010-1636 + * GFS2: Fix permissions checking for setflags ioctl() + - CVE-2010-1641 + * Btrfs: should add a permission check for setfacl + - CVE-2010-2071 + * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets + - CVE-2010-2492 + + -- Stefan Bader Tue, 20 Jul 2010 18:09:28 +0200 + +linux (2.6.31-22.60) karmic-security; urgency=low + + [ Leann Ogasawara ] + + * kvm: restrict writing of segment selectors to segment registers + - CVE-2010-0419 + + [ Upstream Kernel Changes ] + + * USB: usbfs: properly clean up the as structure on error paths + - CVE-2010-1083 + * Bluetooth: Fix potential bad memory access with sysfs files + - CVE-2010-1084 + * ALSA: hda-intel: Avoid divide by zero crash + - CVE-2010-1085 + * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered + by an invalid Payload Pointer + - CVE-2010-1086 + * GFS2: Skip check for mandatory locks when unlocking + - CVE-2010-0727 + * tipc: Fix oops on send prior to entering networked mode (v3) + - CVE-2010-1187 + * inotify: do not reuse watch descriptors + - LP: #485556 + * idr: fix a critical misallocation bug, take#2 + - LP: #485556 + * tty: release_one_tty() forgets to put pids + - CVE-2010-1162 + * reiserfs: fix permissions on .reiserfs_priv + - CVE-2010-1146 + * fix LOOKUP_FOLLOW on automount "symlinks" + - CVE-2010-1088 + * NFS: Fix an Oops when truncating a file + - CVE-2010-1087 + * Attempt #2 to handle null nameidata + - CVE-2010-1148 + * r8169: Fix receive buffer length when MTU is between 1515 and 1536 + - CVE-2009-4537 + * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs) + - CVE-2009-4537 + * KVM: Use kvm_{read,write}_guest_virt() to read and write segment + descriptors + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check CPL level during privilege instruction + emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Add Virtual-8086 mode of emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: fix memory access during x86 emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check IOPL level during io instruction emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Fix popf emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: VMX: Use macros instead of hex value on cr0 initialization + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: SVM: Reset cr0 properly on vcpu reset + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86: disable paravirt mmu reporting + - CVE-2010-0298 + - CVE-2010-0306 + + -- Stefan Bader Tue, 25 May 2010 14:01:30 +0200 + +linux (2.6.31-21.59) karmic-proposed; urgency=low + + [ Andy Whitcroft ] + + * [Config] generic-pae switch to M586TSC + - LP: #519448 + + [ Chris Wilson ] + + * (pre-stable) drm/i915: Increase fb alignment to 64k + - LP: #404064 + + [ Colin Ian King ] + + * Input: i8042 - bypass AUX IRQ delivery test on laptops + - LP: #534448 + + [ Jerone Young ] + + * SAUCE: Fix volume hotkeys for Dell Studio 1557 + - LP: #465250 + + [ Mirsal Ennaime ] + + * SAUCE: aufs: Fix header files inclusion in debug.h + - LP: #517151 + + [ Stefan Bader ] + + * [Config] Enable all CGROUP configuration options + - LP: #480739 + + [ Surbhi Palande ] + + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + - LP: #509730 + * [Config] ext3 defaults to ordered mode + - LP: #510067 + + [ Tim Gardner ] + + * [Config] Fix sub-flavours package conflicts + - LP: #454827 + + [ Upstream Kernel Changes ] + + * PCI/cardbus: Add a fixup hook and fix powerpc + - LP: #455723 + * fnctl: f_modown should call write_lock_irqsave/restore + - LP: #519436 + * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C + - LP: #516325 + * tg3: Add 57788, remove 57720 + - LP: #515390 + * HID: ignore all recent SoundGraph iMON devices + - LP: #488443 + * Input: ALPS - add interleaved protocol support (Dell E6x00 series) + - LP: #296610 + * acerhdf: limit modalias matching to supported + - LP: #509730 + * ASoC: Do not write to invalid registers on the wm9712. + - LP: #509730 + * cifs: NULL out tcon, pSesInfo, and srvTcp pointers when chasing DFS + referrals + - LP: #509730 + * clockevents: Prevent clockevent_devices list corruption on cpu hotplug + - LP: #509730 + * dma: at_hdmac: correct incompatible type for argument 1 of + 'spin_lock_bh' + - LP: #509730 + * drivers/net/usb: Correct code taking the size of a pointer + - LP: #509730 + * Libertas: fix buffer overflow in lbs_get_essid() + - LP: #509730 + * md: Fix unfortunate interaction with evms + - LP: #509730 + * pata_cmd64x: fix overclocking of UDMA0-2 modes + - LP: #509730 + * pata_hpt3x2n: fix clock turnaround + - LP: #509730 + * SCSI: fc class: fix fc_transport_init error handling + - LP: #509730 + * sound: sgio2audio/pdaudiocf/usb-audio: initialize PCM buffer + - LP: #509730 + * USB: emi62: fix crash when trying to load EMI 6|2 firmware + - LP: #509730 + * USB: Fix a bug on appledisplay.c regarding signedness + - LP: #509730 + * USB: musb: gadget_ep0: avoid SetupEnd interrupt + - LP: #509730 + * USB: option: support hi speed for modem Haier CE100 + - LP: #490068, #509730 + * x86, cpuid: Add "volatile" to asm in native_cpuid() + - LP: #509730 + * e100: Use pci pool to work around GFP_ATOMIC order 5 memory allocation + failure + - LP: #509730 + * e100: Fix broken cbs accounting due to missing memset. + - LP: #509730 + * hostap: Revert a toxic part of the conversion to net_device_ops + - LP: #509730 + * hwmon: (fschmd) Fix check on unsigned in watchdog_write() + - LP: #509730 + * hwmon: (sht15) Off-by-one error in array index + incorrect constants + - LP: #509730 + * i2c/tsl2550: Fix lux value in extended mode + - LP: #509730 + * ipv6: reassembly: use seperate reassembly queues for conntrack and + local delivery + - LP: #509730 + * S390: dasd: support DIAG access for read-only devices + - LP: #509730 + * udf: Try harder when looking for VAT inode + - LP: #509730 + * V4L/DVB (13596): ov511.c typo: lock => unlock + - LP: #509730 + * x86/ptrace: make genregs[32]_get/set more robust + - LP: #509730 + * XFS bug in log recover with quota (bugzilla id 855) + - LP: #509730 + * generic_permission: MAY_OPEN is not write access + - LP: #509730 + * memcg: avoid oom-killing innocent task in case of use_hierarchy + - LP: #509730 + * Input: atkbd - add force relese key quirk for Samsung R59P/R60P/R61P + - LP: #253874, #509730 + * Add unlocked version of inode_add_bytes() function + - LP: #509730 + * ext4: fix sleep inside spinlock issue with quota and dealloc (#14739) + - LP: #509730 + * Linux 2.6.31.10 + - LP: #509730 + * Linux 2.6.31.11 + - LP: #509730 + * quota: decouple fs reserved space from quota reservation + - LP: #510674 + * ext4: Convert to generic reserved quota's space management. + - LP: #510674 + * hwmon: (adt7462) Fix pin 28 monitoring + - LP: #510674 + * netfilter: nf_ct_ftp: fix out of bounds read in update_nl_seq() + - LP: #510674 + * quota: Fix dquot_transfer for filesystems different from ext4 + - LP: #510674 + * fix braindamage in audit_tree.c untag_chunk() + - LP: #510674 + * fix more leaks in audit_tree.c tag_chunk() + - LP: #510674 + * ACPI: sleep: another HP DMI entry for init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: add DMI entry for SCI_EN resume quirk on HP dv4 + - LP: #453963, #510674 + * ACPI: sleep: another HP/Compaq DMI entries for + init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: DMI init_set_sci_en_on_resume for HP-Compaq C700 + - LP: #453963, #510674 + * Linux 2.6.31.12 + - LP: #510674 + + -- Stefan Bader Mon, 15 Mar 2010 19:31:37 +0100 + +linux (2.6.31-20.58) karmic-security; urgency=low + + [ Surbhi Palande ] + + * Revert "[Upstream] e1000: enhance frame fragment detection" + - CVE-2009-4536 + * Revert "[Upstream] e1000e: enhance frame fragment detection" + - CVE-2009-4538 + + [ Upstream Kernel Changes ] + + * e1000: enhance frame fragment detection + - CVE-2009-4536 + * e1000/e1000e: don't use small hardware rx buffers + - CVE-2009-4536 + * e1000e: enhance frame fragment detection + - CVE-2009-4538 + * KVM: PIT: control word is write-only + - CVE-2010-0309 + * connector: Delete buggy notification code. + - CVE-2010-0410 + * Fix potential crash with sys_move_pages + - CVE-2010-0415 + * futex: Handle user space corruption gracefully + - CVE-2010-0622 + * futex_lock_pi() key refcnt fix + - CVE-2010-0623 + * Split 'flush_old_exec' into two functions + - CVE-2010-0307 + * Fix 'flush_old_exec()/setup_new_exec()' split + - CVE-2010-0307 + * x86: get rid of the insane TIF_ABI_PENDING bit + - CVE-2010-0307 + * powerpc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * sparc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * x86: set_personality_ia32() misses force_personality32 + - CVE-2010-0307 + + -- Stefan Bader Tue, 09 Mar 2010 21:37:25 +0100 + +linux (2.6.31-20.57) karmic-proposed; urgency=low + + [ Kees Cook ] + + * SAUCE: x86: brk away from exec rand area + - LP: #452175 + + [ Keng-Yu Lin ] + + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Samsung + Q210/P210 laptops + - LP: #385683 + + [ Pascal Bach ] + + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Fujitsu Amilo + 1848+u + - LP: #458503 + + [ Stefan Bader ] + + * Revert "[Upstream] (drop after 2.6.31) acerhdf: fix fan control for + AOA150 model" + - LP: #494633 + * [Config] Disable CONFIG_USB_DEVICEFS + - LP: #488274 + + [ Upstream Kernel Changes ] + + * Revert "ext4: Don't update superblock write time when filesystem is + read-only" + - LP: #496816 + * Revert "ide: try to use PIO Mode 0 during probe if possible" + - LP: #503430 + * Revert "isdn: isdn_ppp: Use SKB list facilities instead of home-grown + implementation." + - LP: #503430 + * nilfs2: fix kernel oops in error case of nilfs_ioctl_move_blocks + - LP: #494633 + * cifs: don't use CIFSGetSrvInodeNumber in is_path_accessible + - LP: #494633 + * cifs: clean up handling when server doesn't consistently support inode + numbers + - LP: #494633 + * cifs: clear server inode number flag while autodisabling + - LP: #494633 + * CIFS: fix oops in cifs_lookup during net boot + - LP: #494633 + * CIFS: Duplicate data on appending to some Samba servers + - LP: #494633 + * rtl8187: Fix kernel oops when device is removed when LEDS enabled + - LP: #494633 + * md: don't clear endpoint for resync when resync is interrupted. + - LP: #494633 + * md/raid5: make sure curr_sync_completes is uptodate when reshape starts + - LP: #494633 + * md/raid1/raid10: add a cond_resched + - LP: #494633 + * ALSA: usb-audio: fix combine_word problem + - LP: #494633 + * ALSA: hda - Dell Studio 1557 hd-audio quirk + - LP: #494633 + * ALSA: AACI: fix AC97 multiple-open bug + - LP: #494633 + * ALSA: AACI: fix recording bug + - LP: #494633 + * jffs2: Fix memory corruption in jffs2_read_inode_range() + - LP: #494633 + * sound: rawmidi: disable active-sensing-on-close by default + - LP: #494633 + * sound: rawmidi: fix checking of O_APPEND when opening MIDI device + - LP: #494633 + * sound: rawmidi: fix double init when opening MIDI device with O_APPEND + - LP: #494633 + * sound: rawmidi: fix MIDI device O_APPEND error handling + - LP: #494633 + * highmem: Fix race in debug_kmap_atomic() which could cause warn_count + to underflow + - LP: #494633 + * highmem: Fix debug_kmap_atomic() to also handle KM_IRQ_PTE, KM_NMI, and + KM_NMI_PTE + - LP: #494633 + * powerpc: Fix DEBUG_HIGHMEM build break from d4515646699 + - LP: #494633 + * kmap: fix build errors with DEBUG_HIGHMEM enabled + - LP: #494633 + * V4L/DVB (13169): bttv: Fix potential out-of-order field processing + - LP: #494633 + * V4L/DVB (13170): bttv: Fix reversed polarity error when switching video + standard + - LP: #494633 + * V4L/DVB (13109): tda18271: fix signedness issue in + tda18271_rf_tracking_filters_init + - LP: #494633 + * V4L/DVB (13107): tda18271: fix overflow in FM radio frequency + calculation + - LP: #494633 + * V4L/DVB (13190): em28xx: fix panic that can occur when starting audio + streaming + - LP: #494633 + * V4L/DVB (13079): dib0700: fixed xc2028 firmware loading kernel oops + - LP: #494633 + * V4L/DVB (13230): s2255drv: Don't conditionalize video buffer completion + on waiting processes + - LP: #494633 + * uids: Prevent tear down race + - LP: #494633 + * pps: events reporting fix up + - LP: #494633 + * pps: locking scheme fix up for PPS_GETPARAMS + - LP: #494633 + * rtc: v3020: fix v3020_mmio_read_bit() + - LP: #494633 + * fs: add missing compat_ptr handling for FS_IOC_RESVSP ioctl + - LP: #494633 + * memcg: fix wrong pointer initialization at page migration when memcg is + disabled. + - LP: #494633 + * pidns: fix a leak in /proc dentries and inodes with pid namespaces. + - LP: #494633 + * page allocator: Do not allow interrupts to use ALLOC_HARDER + - LP: #494633 + * page allocator: always wake kswapd when restarting an allocation + attempt after direct reclaim failed + - LP: #494633 + * tty_port: If we are opened non blocking we still need to raise the + carrier + - LP: #494633 + * tty: cp210x: Fix carrier handling + - LP: #494633 + * USB: ohci: quirk AMD prefetch for USB 1.1 ISO transfer + - LP: #494633 + * USB: usbmon: fix bug in mon_buff_area_shrink + - LP: #494633 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #494633 + * USB: cdc_acm: Fix race condition when opening tty + - LP: #494633 + * USB: xhci: Fix bug memory free after failed initialization. + - LP: #494633 + * USB: xhci: Fix TRB physical to virtual address translation. + - LP: #494633 + * USB: xhci: Fix scratchpad deallocation. + - LP: #494633 + * iwlwifi: Use RTS/CTS as the preferred protection mechanism for 6000 + series + - LP: #494633 + * iwlwifi: Fix issue on file transfer stalled in HT mode + - LP: #494633 + * ima: replace GFP_KERNEL with GFP_NOFS + - LP: #494633 + * NFSv4: Fix a cache validation bug which causes getcwd() to return + ENOENT + - LP: #494633 + * fuse: reject O_DIRECT flag also in fuse_create + - LP: #494633 + * ASoC: Fix suspend with active audio streams + - LP: #494633 + * ASoC: AIC23: Fixing infinite loop in resume path + - LP: #494633 + * b43: Work around mac80211 race condition + - LP: #494633 + * rfkill: fix miscdev ops + - LP: #494633 + * thinkpad-acpi: fix sign of ERESTARTSYS return + - LP: #494633 + * Enable ACPI PDC handshake for VIA/Centaur CPUs + - LP: #494633 + * V4L/DVB (13436): cxusb: Fix hang on DViCO FusionHDTV DVB-T Dual Digital + 4 (rev 1) + - LP: #494633 + * V4L/DVB (13321): radio-gemtek-pci: fix double mutex_lock + - LP: #494633 + * V4L/DVB (12948): v4l1-compat: fix VIDIOC_G_STD handling + - LP: #494633 + * V4L/DVB (12280): gspca - sonixj: Remove auto gain/wb/expo for the + ov7660 sensor. + - LP: #494633 + * V4L/DVB (12356): gspca - sonixj: Webcam 0c45:6148 added + - LP: #494633 + * V4L/DVB (12501): gspca - sonixj: Do the ov7660 sensor work again. + - LP: #494633 + * V4L/DVB (12691): gspca - sonixj: Don't use mdelay(). + - LP: #494633 + * V4L/DVB (12696): gspca - sonixj / sn9c102: Two drivers for 0c45:60fc + and 0c45:613e. + - LP: #494633 + * drm/i915: Select CONFIG_SHMEM + - LP: #494633 + * drm: work around EDIDs with bad htotal/vtotal values + - LP: #494633, #460664 + * drm/i915: Fix IRQ stall issue on Ironlake + - LP: #494633 + * udp: Fix udp_poll() and ioctl() + - LP: #494633 + * acenic: Pass up error code from ace_load_firmware() + - LP: #494633 + * pkt_sched: pedit use proper struct + - LP: #494633 + * net: fix sk_forward_alloc corruption + - LP: #494633 + * bonding: Modify hash transmit policies to use the packet's source MAC + address + - LP: #494633 + * sfc: Set ip_summed correctly for page buffers passed to GRO + - LP: #494633 + * sparc64: replace parentheses in pmul() + - LP: #494633 + * sparc: Move of_set_property_mutex acquisition outside of devtree_lock + grab. + - LP: #494633 + * sched: Fix boot crash by zalloc()ing most of the cpu masks + - LP: #494633 + * sched: Fix isolcpus boot option + - LP: #494633 + * V4L/DVB (13202): smsusb: add autodetection support for three additional + Hauppauge USB IDs + - LP: #494633 + * V4L/DVB (13313): saa7134: add support for FORCE_TS_VALID mode for mpeg + ts input + - LP: #494633 + * V4L/DVB (13314): saa7134: set ts_force_val for the Hauppauge WinTV + HVR-1150 + - LP: #494633 + * speedstep-ich: fix error caused by + 394122ab144dae4b276d74644a2f11c44a60ac5c + - LP: #494633 + * USB: EHCI: don't send Clear-TT-Buffer following a STALL + - LP: #494633 + * USB: musb_gadget: fix STALL handling + - LP: #494633 + * usb: amd5536udc: fixed shared interrupt bug and warning oops + - LP: #494633 + * USB: ftdi_sio: Keep going when write errors are encountered. + - LP: #494633 + * USB: work around for EHCI with quirky periodic schedules + - LP: #435352, #494633 + * tty_port: handle the nonblocking open of a dead port corner case + - LP: #494633 + * pxamci: call mmc_remove_host() before freeing resources + - LP: #494633 + * param: don't complain about unused module parameters. + - LP: #494633 + * modules: don't export section names of empty sections via sysfs + - LP: #494633 + * md: revert incorrect fix for read error handling in raid1. + - LP: #494633 + * perf_event: Adjust frequency and unthrottle for non-group-leader events + - LP: #494633 + * hso: fix soft-lockup + - LP: #494633 + * block: use after free bug in __blkdev_get + - LP: #494633 + * hwmon: (adt7475) Fix temperature fault flags + - LP: #494633 + * hwmon: (adt7475) Cache limits for 60 seconds + - LP: #494633 + * agp/intel: new host bridge support + - LP: #494633 + * netfilter: nf_nat: fix NAT issue in 2.6.30.4+ + - LP: #494633 + * netfilter: xt_connlimit: fix regression caused by zero family value + - LP: #494633 + * b43: Fix DMA TX bounce buffer copying + - LP: #494633 + * crypto: padlock-aes - Use the correct mask when checking whether + copying is required + - LP: #494633 + * sky2: set carrier off in probe + - LP: #494633 + * ath5k: Linear PCDAC code fixes + - LP: #494633 + * i2c: Fix userspace_device list corruption + - LP: #494633 + * acerhdf: fix fan control for AOA150 model + - LP: #494633 + * drm/fb: fix FBIOGET/PUT_VSCREENINFO pixel clock handling + - LP: #494633 + * tty/of_serial: add missing ns16550a id + - LP: #494633 + * V4L/DVB (13255): gspca - m5602-s5k4aa: Add vflip quirk for the + Bruneinit laptop + - LP: #494633 + * V4L/DVB (13256): gspca - m5602-s5k4aa: Add another MSI GX700 vflip + quirk + - LP: #494633 + * V4L/DVB (13257): gspca - m5602-s5k4aa: Add vflip for Fujitsu Amilo Xi + 2528 + - LP: #494633 + * PCI: Prevent AER driver from being loaded on non-root port PCIE devices + - LP: #494633 + * acerhdf: additional BIOS versions + - LP: #494633 + * acerhdf: return temperature in milidegree instead of degree + - LP: #494633 + * Input: keyboard - fix braille keyboard keysym generation + - LP: #494633 + * Linux 2.6.31.7 + - LP: #494633 + * ext4: Fix memory leak fix when mounting an ext4 filesystem + - LP: #496816 + * jbd2: Fail to load a journal if it is too short + - LP: #496816 + * jbd2: round commit timer up to avoid uncommitted transaction + - LP: #496816 + * ext4: fix journal ref count in move_extent_par_page + - LP: #496816 + * ext4: Fix bugs in mballoc's stream allocation mode + - LP: #496816 + * ext4: Avoid group preallocation for closed files + - LP: #496816 + * jbd2: Annotate transaction start also for jbd2_journal_restart() + - LP: #496816 + * ext4: Fix possible deadlock between ext4_truncate() and + ext4_get_blocks() + - LP: #496816 + * ext4: reject too-large filesystems on 32-bit kernels + - LP: #496816 + * ext4: Add feature set check helper for mount & remount paths + - LP: #496816 + * ext4: Add missing unlock_new_inode() call in extent migration code + - LP: #496816 + * ext4: Allow rename to create more than EXT4_LINK_MAX subdirectories + - LP: #496816 + * ext4: Limit number of links that can be created by ext4_link() + - LP: #496816 + * ext4: Restore wbc->range_start in ext4_da_writepages() + - LP: #496816 + * ext4: fix cache flush in ext4_sync_file + - LP: #496816 + * ext4: Fix wrong comparisons in mext_check_arguments() + - LP: #496816 + * ext4: Remove unneeded BUG_ON() in ext4_move_extents() + - LP: #496816 + * ext4: Return exchanged blocks count to user space in failure + - LP: #496816 + * ext4: Take page lock before looking at attached buffer_heads flags + - LP: #496816 + * ext4: print more sysadmin-friendly message in check_block_validity() + - LP: #496816 + * ext4: Use bforget() in no journal mode for + ext4_journal_{forget,revoke}() + - LP: #496816 + * ext4: Assure that metadata blocks are written during fsync in no + journal mode + - LP: #496816 + * ext4: Make non-journal fsync work properly + - LP: #496816 + * ext4: move ext4_mb_init_group() function earlier in the mballoc.c + - LP: #496816 + * ext4: check for need init flag in ext4_mb_load_buddy + - LP: #496816 + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #496816 + * ext4: Always set dx_node's fake_dirent explicitly. + - LP: #496816 + * ext4: Fix initalization of s_flex_groups + - LP: #496816 + * ext4: Fix include/trace/events/ext4.h to work with Systemtap + - LP: #496816 + * ext4: Fix small typo for move_extent_per_page() + - LP: #496816 + * ext4: Replace get_ext_path macro with an inline funciton + - LP: #496816 + * ext4: Replace BUG_ON() with ext4_error() in move_extents.c + - LP: #496816 + * ext4: Add null extent check to ext_get_path + - LP: #496816 + * ext4: Fix different block exchange issue in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: limit block allocations for indirect-block files to < 2^32 + - LP: #496816 + * ext4: store EXT4_EXT_MIGRATE in i_state instead of i_flags + - LP: #496816 + * ext4: Fix the alloc on close after a truncate hueristic + - LP: #496816 + * ext4: Fix hueristic which avoids group preallocation for closed files + - LP: #496816 + * ext4: Adjust ext4_da_writepages() to write out larger contiguous chunks + - LP: #496816 + * ext4: release reserved quota when block reservation for delalloc retry + - LP: #496816 + * ext4: Split uninitialized extents for direct I/O + - LP: #496816 + * ext4: Use end_io callback to avoid direct I/O fallback to buffered I/O + - LP: #496816 + * ext4: async direct IO for holes and fallocate support + - LP: #496816 + * ext4: EXT4_IOC_MOVE_EXT: Check for different original and donor inodes + first + - LP: #496816 + * ext4: Avoid updating the inode table bh twice in no journal mode + - LP: #496816 + * ext4: Make sure ext4_dirty_inode() updates the inode in no journal mode + - LP: #496816 + * ext4: Handle nested ext4_journal_start/stop calls without a journal + - LP: #496816 + * ext4: Fix time encoding with extra epoch bits + - LP: #496816 + * ext4: fix a BUG_ON crash by checking that page has buffers attached to + it + - LP: #496816 + * ext4: retry failed direct IO allocations + - LP: #496816 + * ext4: discard preallocation when restarting a transaction during + truncate + - LP: #496816 + * ext4: fix ext4_ext_direct_IO()'s return value after converting uninit + extents + - LP: #496816 + * ext4: skip conversion of uninit extents after direct IO if there isn't + any + - LP: #496816 + * ext4: code clean up for dio fallocate handling + - LP: #496816 + * ext4: Fix return value of ext4_split_unwritten_extents() to fix direct + I/O + - LP: #496816 + * ext4: fix potential buffer head leak when add_dirent_to_buf() returns + ENOSPC + - LP: #496816 + * ext4: avoid divide by zero when trying to mount a corrupted file system + - LP: #496816 + * ext4: fix the returned block count if EXT4_IOC_MOVE_EXT fails + - LP: #496816 + * ext4: fix lock order problem in ext4_move_extents() + - LP: #496816 + * ext4: fix possible recursive locking warning in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: plug a buffer_head leak in an error path of ext4_iget() + - LP: #496816 + * ext4: make sure directory and symlink blocks are revoked + - LP: #496816 + * ext4: fix i_flags access in ext4_da_writepages_trans_blocks() + - LP: #496816 + * ext4: journal all modifications in ext4_xattr_set_handle + - LP: #496816 + * ext4: don't update the superblock in ext4_statfs() + - LP: #496816 + * ext4: fix uninit block bitmap initialization when s_meta_first_bg is + non-zero + - LP: #496816 + * ext4: fix block validity checks so they work correctly with meta_bg + - LP: #496816 + * ext4: avoid issuing unnecessary barriers + - LP: #496816 + * ext4: fix error handling in ext4_ind_get_blocks() + - LP: #496816 + * ext4: make trim/discard optional (and off by default) + - LP: #496816 + * ext4: make "norecovery" an alias for "noload" + - LP: #496816 + * ext4: Fix double-free of blocks with EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: initialize moved_len before calling ext4_move_extents() + - LP: #496816 + * ext4: move_extent_per_page() cleanup + - LP: #496816 + * jbd2: Add ENOMEM checking in and for + jbd2_journal_write_metadata_buffer() + - LP: #496816 + * ext4: Return the PTR_ERR of the correct pointer in + setup_new_group_blocks() + - LP: #496816 + * ext4: Avoid data / filesystem corruption when write fails to copy data + - LP: #496816 + * ext4: wait for log to commit when umounting + - LP: #496816 + * ext4: remove blocks from inode prealloc list on failure + - LP: #496816 + * ext4: ext4_get_reserved_space() must return bytes instead of blocks + - LP: #496816 + * ext4: quota macros cleanup + - LP: #496816 + * ext4: fix incorrect block reservation on quota transfer. + - LP: #496816 + * ext4: Wait for proper transaction commit on fsync + - LP: #496816 + * SCSI: megaraid_sas: fix 64 bit sense pointer truncation + - LP: #496816 + * SCSI: osd_protocol.h: Add missing #include + - LP: #496816 + * SCSI: scsi_lib_dma: fix bug with dma maps on nested scsi objects + - LP: #496816 + * signal: Fix alternate signal stack check + - LP: #496816 + * ext4: Fix potential fiemap deadlock (mmap_sem vs. i_data_sem) + - LP: #496816 + * Linux 2.6.31.8 + - LP: #496816 + * USB: option: add pid for ZTE + - LP: #503430 + * USB: usb-storage: fix bug in fill_inquiry + - LP: #503430 + * firewire: ohci: handle receive packets with a data length of zero + - LP: #503430 + * ALSA: hda - Terradici HDA controllers does not support 64-bit mode + - LP: #503430 + * ALSA: hrtimer - Fix lock-up + - LP: #503430 + * ath5k: allow setting txpower to 0 + - LP: #503430 + * ath5k: enable EEPROM checksum check + - LP: #503430 + * bsdacct: fix uid/gid misreporting + - LP: #503430 + * debugfs: fix create mutex racy fops and private data + - LP: #503430 + * devpts_get_tty() should validate inode + - LP: #503430 + * futex: Take mmap_sem for get_user_pages in fault_in_user_writeable + - LP: #503430 + * hfs: fix a potential buffer overflow + - LP: #503430 + * hrtimer: Fix /proc/timer_list regression + - LP: #503430 + * jbd2: don't wipe the journal on a failed journal checksum + - LP: #503430 + * KVM: s390: Make psw available on all exits, not just a subset + - LP: #503430 + * md/bitmap: protect against bitmap removal while being updated. + - LP: #503430 + * pata_hpt{37x|3x2n}: fix timing register masks (take 2) + - LP: #503430 + * pxa/em-x270: fix usb hub power up/reset sequence + - LP: #503430 + * ssb: Fix range check in sprom write + - LP: #503430 + * SUNRPC: IS_ERR/PTR_ERR confusion + - LP: #503430 + * USB: Close usb_find_interface race v3 + - LP: #503430 + * USB: musb_gadget_ep0: fix unhandled endpoint 0 IRQs, again + - LP: #503430 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #503430 + * USB: usb-storage: add BAD_SENSE flag + - LP: #503430 + * USB: usbtmc: repeat usb_bulk_msg until whole message is transfered + - LP: #503430 + * V4L/DVB: Fix test in copy_reg_bits() + - LP: #503430 + * x86: Add new Intel CPU cache size descriptors + - LP: #503430 + * x86/amd-iommu: attach devices to pre-allocated domains early + - LP: #503430 + * x86/amd-iommu: un__init iommu_setup_msi + - LP: #503430 + * x86, apic: Enable lapic nmi watchdog on AMD Family 11h + - LP: #503430 + * x86: ASUS P4S800 reboot=bios quirk + - LP: #366682, #503430 + * x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking + up the PCI tree + - LP: #503430 + * x86: Fix iommu=nodac parameter handling + - LP: #503430 + * x86: Fix typo in Intel CPU cache size descriptor + - LP: #503430 + * x86: GART: pci-gart_64.c: Use correct length in strncmp + - LP: #503430 + * drm/radeon/kms: Add quirk for HIS X1300 board + - LP: #503430 + * drm/radeon/kms: fix legacy crtc2 dpms + - LP: #503430 + * mac80211: Fix bug in computing crc over dynamic IEs in beacon + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in mincore() + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in walk_page_range() + - LP: #503430 + * powerpc: Fix usage of 64-bit instruction in 32-bit altivec code + - LP: #503430 + * Serial: Do not read IIR in serial8250_start_tx when UART_BUG_TXEN + - LP: #503430 + * ide: Serialize CMD643 and CMD646 to fix a hardware bug with SSD + - LP: #503430 + * ide: fix ioctl to pass requested transfer mode to ide_find_dma_mode + instead of UDMA6 + - LP: #503430 + * slc90e66: fix UDMA handling + - LP: #503430 + * Au1x00: fix crash when trying register_netdev() + - LP: #503430 + * b44 WOL setup: one-bit-off stack corruption kernel panic fix + - LP: #503430 + * b44: Fix wedge when using netconsole. + - LP: #503430 + * gro: Fix illegal merging of trailer trash + - LP: #503430 + * ip_fragment: also adjust skb->truesize for packets not owned by a + socket + - LP: #503430 + * net: Fix the rollback test in dev_change_name() + - LP: #503430 + * NET: smc91x: Fix irq flags + - LP: #503430 + * smsc9420: prevent BUG() if ethtool is called with interface down + - LP: #503430 + * vlan: Fix register_vlan_dev() error path + - LP: #503430 + * sparc64: Fix definition of VMEMMAP_SIZE. + - LP: #503430 + * sunsab: Do not set sunsab_reg.cons right before registering minors. + - LP: #503430 + * sunsu: Fix detection of SU ports which are RSC console or control. + - LP: #503430 + * serial: suncore: Add 'ignore_line' argument to + sunserial_console_match(). + - LP: #503430 + * serial: suncore: Fix RSC/LOM handling in sunserial_console_termios(). + - LP: #503430 + * sunsu: Pass true 'ignore_line' to console match when RSC or LOM + console. + - LP: #503430 + * sunsu: Use sunserial_console_termios() in sunsu_console_setup(). + - LP: #503430 + * sparc64: Don't specify IRQF_SHARED for LDC interrupts. + - LP: #503430 + * sparc64: Fix overly strict range type matching for PCI devices. + - LP: #503430 + * sparc64: Fix stack debugging IRQ stack regression. + - LP: #503430 + * sparc: Set UTS_MACHINE correctly. + - LP: #503430 + * x86/mce: Set up timer unconditionally + - LP: #503430 + * b43legacy: avoid PPC fault during resume + - LP: #503430 + * p54usb: Remove DMA buffer from stack + - LP: #503430 + * x86: Under BIOS control, restore AP's APIC_LVTTHMR to the BSP value + - LP: #503430 + * ACPI: Use the ARB_DISABLE for the CPU which model id is less than 0x0f. + - LP: #503430, #481765 + * asus-laptop: change light sens default values. + - LP: #503430 + * backlight: lcd - Fix wrong sizeof + - LP: #503430 + * drm/i915: Avoid NULL dereference with component_only tv_modes + - LP: #503430, #494045 + * drm/i915: Fix CRT hotplug detect by checking really no channels + attached + - LP: #503430 + * drm/i915: Fix LVDS stability issue on Ironlake + - LP: #503430 + * drm/i915: save/restore BLC histogram control reg across suspend/resume + - LP: #503430, #292256 + * drm/i915: PineView only has LVDS and CRT ports + - LP: #503430 + * ext3: Fix data / filesystem corruption when write fails to copy data + - LP: #503430 + * ipvs: zero usvc and udest + - LP: #503430 + * ipw2100: fix rebooting hang with driver loaded + - LP: #503430 + * jffs2: Fix long-standing bug with symlink garbage collection. + - LP: #503430 + * matroxfb: fix problems with display stability + - LP: #503430 + * net: Fix userspace RTM_NEWLINK notifications. + - LP: #503430 + * thinkpad-acpi: fix default brightness_mode for R50e/R51 + - LP: #503430 + * thinkpad-acpi: preserve rfkill state across suspend/resume + - LP: #503430 + * V4L/DVB (13116): gspca - ov519: Webcam 041e:4067 added. + - LP: #503430 + * powerpc/therm_adt746x: Record pwm invert bit at module load time] + - LP: #503430 + * drm/i915: Fix sync to vblank when VGA output is turned off + - LP: #503430, #494461 + * Linux 2.6.31.9 + - LP: #503430 + * drm/i915: Refactor save/restore code + - LP: #504273 + * drm/i915: Ironlake suspend/resume support + - LP: #504273 + * drm/i915: Fix and cleanup DPLL calculation for Ironlake + - LP: #504273 + * drm/i915: HDMI hardware workaround for Ironlake + - LP: #504273 + * drm/i915: Add more registers save/restore for Ironlake suspend + - LP: #504273 + * drm/i915: Add ACPI OpRegion support for Ironlake + - LP: #504273 + * drm/i915: Add display hotplug event on Ironlake + - LP: #504273 + * cdc_ether: additional Ericsson MBM PID's to the whitelist + - LP: #476071 + * drm/i915: remove loop in Ironlake interrupt handler + - LP: #510722 + * modules: Skip empty sections when exporting section notes + - LP: #511129 + * ath5k: Fix eeprom checksum check for custom sized eeproms + - LP: #506180 + + -- Leann Ogasawara Mon, 01 Feb 2010 09:51:37 -0800 + +linux (2.6.31-19.56) karmic-security; urgency=low + + [ Leann Ogasawara ] + + * [Upstream] e1000: enhance frame fragment detection + - CVE-2009-4536 + * [Upstream] e1000e: enhance frame fragment detection + - CVE-2009-4538 + + [ Upstream Kernel Changes ] + + * hfs: fix a potential buffer overflow + - CVE-2009-4020 + * KVM: x86 emulator: limit instructions to 15 bytes + - CVE-2009-4031 + * ext4: Avoid null pointer dereference when decoding EROFS w/o a journal + - CVE-2009-4308 + * firewire: ohci: handle receive packets with a data length of zero + - CVE-2009-4138 + * fasync: split 'fasync_helper()' into separate add/remove functions + - CVE-2009-4141 + * ipv6: skb_dst() can be NULL in ipv6_hop_jumbo(). + - CVE-2010-0006 + * kernel/signal.c: fix kernel information leak with print-fatal-signals=1 + - CVE-2010-0003 + * netfilter: ebtables: enforce CAP_NET_ADMIN + - CVE-2010-0007 + * untangle the do_mremap() mess + - CVE-2010-0291 + + -- Leann Ogasawara Tue, 19 Jan 2010 09:45:58 -0800 + +linux (2.6.31-17.54) karmic-proposed; urgency=low + + [ John Johansen ] + + * SAUCE: AppArmor: Fix oops after profile removal + - LP: #475619 + * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds + - LP: #437258 + * SAUCE: AppArmor: Fix cap audit_caching preemption disabling + - LP: #479102 + * SAUCE: AppArmor: Fix refcounting bug causing leak of creds + - LP: #479115 + * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe + transition. + - LP: #480112 + + [ Leann Ogasawara ] + + * Revert "[Upstream] (drop after 2.6.31) usb-storage: Workaround devices + with bogus sense size" + - LP: #461556 + * Revert "[Upstream] (drop after 2.6.31) Input: synaptics - add another + Protege M300 to rate blacklist" + - LP: #480144 + + [ Tim Gardner ] + + * [Config] udeb: Add squashfs to fs-core-modules + - LP: #352615 + + [ Upstream Kernel Changes ] + + * Revert "e1000e: swap max hw supported frame size between 82574 and + 82583" + - LP: #461556 + * Revert "drm/i915: Fix FDI M/N setting according with correct color + depth" + - LP: #480144 + * Revert "agp/intel: Add B43 chipset support" + - LP: #480144 + * Revert "drm/i915: add B43 chipset support" + - LP: #480144 + * Revert "ACPI: Attach the ACPI device to the ACPI handle as early as + possible" + - LP: #327499, #480144 + * SCSI: Retry ADD_TO_MLQUEUE return value for EH commands + - LP: #461556 + * SCSI: Fix protection scsi_data_buffer leak + - LP: #461556 + * SCSI: sg: Free data buffers after calling blk_rq_unmap_user + - LP: #461556 + * ARM: pxa: workaround errata #37 by not using half turbo switching + - LP: #461556 + * tracing/filters: Fix memory leak when setting a filter + - LP: #461556 + * x86/paravirt: Use normal calling sequences for irq enable/disable + - LP: #461556 + * USB: ftdi_sio: remove tty->low_latency + - LP: #461556 + * USB: ftdi_sio: remove unused rx_byte counter + - LP: #461556 + * USB: ftdi_sio: clean up read completion handler + - LP: #461556 + * USB: ftdi_sio: re-implement read processing + - LP: #461556 + * USB: pl2303: fix error characters not being reported to ldisc + - LP: #461556 + * USB: digi_acceleport: Fix broken unthrottle. + - LP: #461556 + * USB: serial: don't call release without attach + - LP: #461556 + * USB: option: Toshiba G450 device id + - LP: #461556 + * USB: ipaq: fix oops when device is plugged in + - LP: #461556 + * USB: cp210x: Add support for the DW700 UART + - LP: #461556 + * USB: Fix throttling in generic usbserial driver + - LP: #461556 + * USB: storage: When a device returns no sense data, call it a Hardware + Error + - LP: #400652, #461556 + * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 + - LP: #461556 + * intel-iommu: Cope with broken HP DC7900 BIOS + - LP: #461556 + * futex: Detect mismatched requeue targets + - LP: #461556 + * futex: Fix wakeup race by setting TASK_INTERRUPTIBLE before queue_me() + - LP: #461556 + * tpm-fixup-pcrs-sysfs-file-update + - LP: #461556 + * TPM: fix pcrread + - LP: #461556 + * Bluetooth: Disconnect HIDRAW devices on disconnect + - LP: #461556 + * Bluetooth: Add extra device reference counting for connections + - LP: #461556 + * Bluetooth: Let HIDP grab the device reference for connections + - LP: #461556 + * connector: Keep the skb in cn_callback_data + - LP: #461556 + * connector: Provide the sender's credentials to the callback + - LP: #461556 + * connector: Removed the destruct_data callback since it is always + kfree_skb() + - LP: #461556 + * dm/connector: Only process connector packages from privileged processes + - LP: #461556 + * dst/connector: Disallow unpliviged users to configure dst + - LP: #461556 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - LP: #461556 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - LP: #461556 + * e1000e: swap max hw supported frame size between 82574 and 82583 + - LP: #461556, #445572 + * MAINTAINERS: Fix Riku Voipio's address + - LP: #461556 + * macintosh: Don't assume i2c device probing always succeeds + - LP: #461556 + * i2c: Hide probe errors caused by ACPI resource conflicts + - LP: #461556 + * ALSA: Don't assume i2c device probing always succeeds + - LP: #461556 + * bsdacct: switch credentials for writing to the accounting file + - LP: #461556 + * sysfs: Allow sysfs_notify_dirent to be called from interrupt context. + - LP: #461556 + * Staging: rt2860sta: prevent a panic when disabling when associated + - LP: #461556, #404626 + * usb-storage: Workaround devices with bogus sense size + - LP: #461556, #446146 + * iwlwifi: incorrect method used for finding valid OTP blocks + - LP: #461556 + * mac80211: fix vlan and optimise RX + - LP: #461556 + * tty: Make flush_to_ldisc() locking more robust + - LP: #461556 + * Linux 2.6.31.5 + - LP: #461556 + * fs: pipe.c null pointer dereference + - LP: #480144 + * pci: increase alignment to make more space for hidden code + - LP: #407824, #480144, #474577 + * libata: fix internal command failure handling + - LP: #480144 + * libata: fix PMP initialization + - LP: #480144 + * sata_nv: make sure link is brough up online when skipping hardreset + - LP: #480144 + * nfs: Fix nfs_parse_mount_options() kfree() leak + - LP: #480144 + * KVM: use proper hrtimer function to retrieve expiration time + - LP: #480144 + * KVM: ignore reads from AMDs C1E enabled MSR + - LP: #480144 + * futex: Handle spurious wake up + - LP: #480144 + * futex: Check for NULL keys in match_futex + - LP: #480144 + * futex: Move drop_futex_key_refs out of spinlock'ed region + - LP: #480144 + * futex: Fix spurious wakeup for requeue_pi really + - LP: #480144 + * ahci: revert "Restore SB600 sata controller 64 bit DMA" + - LP: #480144 + * sparc64: Set IRQF_DISABLED on LDC channel IRQs. + - LP: #480144 + * watchdog: Fix rio watchdog probe function + - LP: #480144 + * Input: synaptics - add another Protege M300 to rate blacklist + - LP: #480144 + * dm snapshot: free exception store on init failure + - LP: #480144 + * dm snapshot: sort by chunk size to fix race + - LP: #480144 + * dm log: userspace fix incorrect luid cast in userspace_ctr + - LP: #480144 + * dm: add missing del_gendisk to alloc_dev error path + - LP: #480144 + * dm: dec_pending needs locking to save error value + - LP: #480144 + * dm exception store: fix failed set_chunk_size error path + - LP: #480144 + * dm snapshot: lock snapshot while supplying status + - LP: #480144 + * dm snapshot: require non zero chunk size by end of ctr + - LP: #480144 + * dm snapshot: use unsigned integer chunk size + - LP: #480144 + * ray_cs: Fix copy_from_user handling + - LP: #480144 + * mbind(): fix leak of never putback pages + - LP: #480144 + * do_mbind(): fix memory leak + - LP: #480144 + * 8250_pci: add IBM Saturn serial card + - LP: #480144 + * dpt_i2o: Fix up copy*user + - LP: #480144 + * dpt_i2o: Fix typo of EINVAL + - LP: #480144 + * hfsplus: refuse to mount volumes larger than 2TB + - LP: #480144 + * Driver core: fix driver_register() return value + - LP: #480144 + * param: fix lots of bugs with writing charp params from sysfs, by + leaking mem. + - LP: #480144 + * param: fix NULL comparison on oom + - LP: #480144 + * param: fix setting arrays of bool + - LP: #480144 + * USB: serial: sierra driver send_setup() autopm fix + - LP: #480144 + * USB: option: Patch for Huawei Mobile Broadband E270+ Modem + - LP: #480144 + * USB: option: Support for AIRPLUS MCD650 Datacard + - LP: #480144 + * USB: option: TLAYTECH TUE800 support + - LP: #456264, #480144 + * libertas if_usb: Fix crash on 64-bit machines + - LP: #480144 + * cpuidle: always return with interrupts enabled + - LP: #480144 + * virtio: order used ring after used index read + - LP: #480144 + * CIFS: Fixing to avoid invalid kfree() in cifs_get_tcp_session() + - LP: #480144 + * mac80211: fix for incorrect sequence number on hostapd injected frames + - LP: #480144 + * mac80211: check interface is down before type change + - LP: #480144 + * x86, UV: Fix information in __uv_hub_info structure + - LP: #480144 + * x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi() + - LP: #480144 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - LP: #480144 + * mm: remove incorrect swap_count() from try_to_unuse() + - LP: #480144 + * x86-64: Fix register leak in 32-bit syscall audting + - LP: #480144 + * nilfs2: fix dirty page accounting leak causing hang at write + - LP: #480144 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #480144 + * drm/i915: fix to setup display reference clock control on Ironlake + - LP: #480144 + * drm/i915: fix panel fitting filter coefficient select for Ironlake + - LP: #480144 + * agp/intel: Add B43 chipset support + - LP: #480144 + * drm/i915: add B43 chipset support + - LP: #480144 + * xen/hvc: make sure console output is always emitted, with explicit + polling + - LP: #480144 + * xen: mask extended topology info in cpuid + - LP: #480144 + * sgi-gru: decrapfiy options_write() function + - LP: #480144 + * KVM: get_tss_base_addr() should return a gpa_t + - LP: #480144 + * fuse: prevent fuse_put_request on invalid pointer + - LP: #480144 + * fuse: fix kunmap in fuse_ioctl_copy_user + - LP: #480144 + * x86/amd-iommu: Workaround for erratum 63 + - LP: #480144 + * fsnotify: do not set group for a mark before it is on the i_list + - LP: #480144 + * mips: fix build of vmlinux.lds + - LP: #480144 + * alpha: fix build after vmlinux.lds.S cleanup + - LP: #480144 + * ACPI / PCI: Fix NULL pointer dereference in acpi_get_pci_dev() (rev. 2) + - LP: #480144 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - LP: #480144 + * b43: Fix Bugzilla #14181 and the bug from the previous 'fix' + - LP: #476154, #480144 + * pata_sc1200: Fix crash on boot + - LP: #480144 + * AF_UNIX: Fix deadlock on connecting to shutdown socket (CVE-2009-3621) + - LP: #480144 + * ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@ + - LP: #480144 + * bonding: fix a race condition in calls to slave MII ioctls + - LP: #480144 + * hwmon: (it87) Fix VID reading on IT8718F/IT8720F + - LP: #480144 + * netlink: fix typo in initialization (CVE-2009-3612) + - LP: #480144 + * nfs: Avoid overrun when copying client IP address string + - LP: #480144 + * nfs: Panic when commit fails + - LP: #480144 + * NFSv4: Fix a bug when the server returns NFS4ERR_RESOURCE + - LP: #480144 + * NFSv4: Fix two unbalanced put_rpccred() issues. + - LP: #459265, #480144 + * NFSv4: Kill nfs4_renewd_prepare_shutdown() + - LP: #480144 + * NFSv4: The link() operation should return any delegation on the file + - LP: #480144 + * powerpc: Remove SMP warning from PowerMac cpufreq + - LP: #480144 + * vmscan: limit VM_EXEC protection to file pages + - LP: #480144 + * x86: mce: Clean up thermal throttling state tracking code + - LP: #480144 + * x86: mce: Fix thermal throttling message storm + - LP: #453444, #480144 + * iwlwifi: fix potential rx buffer loss + - LP: #480144 + * iwlwifi: reduce noise when skb allocation fails + - LP: #480144 + * x86/amd-iommu: Un__init function required on shutdown + - LP: #480144 + * KVM: Prevent kvm_init from corrupting debugfs structures + - LP: #480144 + * powerpc/pmac: Fix PowerSurge SMP IPI allocation + - LP: #480144 + * powerpc/pmac: Fix issues with sleep on some powerbooks + - LP: #480144 + * powerpc/pci: Fix regression in powerpc MSI-X + - LP: #480144 + * powerpc: Fix some late PowerMac G5 with PCIe ATI graphics + - LP: #480144 + * sata_via: Remove redundant device ID for VIA VT8261 + - LP: #480144 + * pata_via: extend the rev_max for VT6330 + - LP: #480144 + * PM / yenta: Split resume into early and late parts (rev. 4) + - LP: #480144 + * Linux 2.6.31.6 + - LP: #480144 + + -- Stefan Bader Thu, 03 Dec 2009 22:57:36 +0100 + +linux (2.6.31-16.53) karmic-security; urgency=low + + [ Upstream Kernel Changes ] + + * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT + - LP: #492659 + - CVE-2009-4131 + + -- Leann Ogasawara Mon, 07 Dec 2009 08:52:07 -0800 + +linux (2.6.31-16.52) karmic-security; urgency=low + + [ Leann Ogasawara ] + + * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable + permissions + - CVE-2009-3939 + + [ Upstream Kernel Changes ] + + * fs: pipe.c null pointer dereference + - CVE-2009-3547 + * netlink: fix typo in initialization + - CVE-2009-3612 + * drm/r128: Add test for initialisation to all ioctls that require it + - CVE-2009-3620 + * AF_UNIX: Fix deadlock on connecting to shutdown socket + - CVE-2009-3621 + * nfsd4: use common rpc_cred for all callbacks + - CVE-2009-3623 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - CVE-2009-3624 + * connector: Keep the skb in cn_callback_data + - CVE-2009-3725 + * connector: Provide the sender's credentials to the callback + - CVE-2009-3725 + * connector: Fix incompatible pointer type warning + - CVE-2009-3725 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - CVE-2009-3725 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - CVE-2009-3725 + * dst/connector: Disallow unpliviged users to configure dst + - CVE-2009-3725 + * dm/connector: Only process connector packages from privileged processes + - CVE-2009-3725 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - CVE-2009-3888 + * isdn: hfc_usb: Fix read buffer overflow + - CVE-2009-4005 + * gdth: Prevent negative offsets in ioctl CVE-2009-3080 + - CVE-2009-3080 + * mac80211: fix spurious delBA handling + - LP: #491301 + * mac80211: fix two remote exploits + - LP: #491301 + * ipv4: additional update of dev_net(dev) to struct *net in ip_fragment.c + - LP: #491301 + + -- Leann Ogasawara Mon, 23 Nov 2009 13:57:30 -0800 + +linux (2.6.31-15.50) karmic-proposed; urgency=low + + [ Kees Cook ] + + * SAUCE: Fix nx_enable reporting + - LP: #454285 + + -- Stefan Bader Tue, 10 Nov 2009 14:31:52 +0100 + +linux (2.6.31-15.49) karmic-proposed; urgency=low + + [ Benjamin Herrenschmidt ] + + * [Upstream] (drop after 2.6.31) usb-storage: Workaround devices with + bogus sense size + - LP: #446146 + + [ John Johansen ] + + * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied + - LP: #453335 + * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem + - LP: #458299 + * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly + - LP: #462824 + * SAUCE: AppArmor: AppArmor disallows truncate of deleted files. + - LP: #451375 + + [ Kees Cook ] + + * SAUCE: [x86] fix report of cs-limit nx-emulation + - LP: #454285 + + [ Scott James Remnant ] + + * Revert "SAUCE: trace: add trace_event for the open() syscall" + * SAUCE: trace: add trace events for open(), exec() and uselib() + - LP: #462111 + + [ Stefan Bader ] + + * SAUCE: Fix sub-flavour script to not stop on missing directories + - LP: #453073 + + [ Tim Gardner ] + + * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege + M300 to rate blacklist + - LP: #433801 + + [ Upstream Kernel Changes ] + + * PM: Make warning in suspend_test_finish() less likely to happen + - LP: #464552 + + -- Stefan Bader Wed, 28 Oct 2009 21:21:02 +0000 + +linux (2.6.31-14.48) karmic; urgency=low + + [ Colin Watson ] + + * Add more e100 firmware to nic-modules + - LP: #451872 + * Add qla1280 firmware to scsi-modules + - LP: #381037 + + -- Andy Whitcroft Fri, 16 Oct 2009 09:31:45 +0100 + +linux (2.6.31-14.47) karmic; urgency=low + + [ Mario Limonciello ] + + * SAUCE: dell-laptop: Store the HW switch status internally rather than + requerying every time + - LP: #430809 + * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop + - LP: #430809 + + -- Tim Gardner Wed, 14 Oct 2009 15:05:39 -0600 + +linux (2.6.31-14.46) karmic; urgency=low + + [ Andy Whitcroft ] + + * reinstate armel.mk with no flavours + - LP: #449637 + * [Upstream] elevator: fix fastfail checks to allow merge of readahead + requests + - LP: #444915 + * [Upstream] block: silently error unsupported empty barriers too + - LP: #420423 + + [ John Johansen ] + + * SAUCE: AppArmor: Fix mediation of "deleted" paths + - LP: #415632 + + [ Tim Gardner ] + + * [Config] CONFIG_X86_MCE + https://lists.ubuntu.com/archives/kernel-team/2009-October/007584.html + * Revert "appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903" - Use patch from 2.6.31.4 which is slightly different. + + [ Upstream Kernel Changes ] + + * x86: fix csum_ipv6_magic asm memory clobber + * tty: Avoid dropping ldisc_mutex over hangup tty re-initialization + * x86: Don't leak 64-bit kernel register values to 32-bit processes + * tracing: correct module boundaries for ftrace_release + * ftrace: check for failure for all conversions + * futex: fix requeue_pi key imbalance + * futex: Move exit_pi_state() call to release_mm() + * futex: Nullify robust lists after cleanup + * futex: Fix locking imbalance + * NOHZ: update idle state also when NOHZ is inactive + * ima: ecryptfs fix imbalance message + * libata: fix incorrect link online check during probe + * sound: via82xx: move DXS volume controls to PCM interface + * ASoC: WM8350 capture PGA mutes are inverted + * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID + * KVM: VMX: flush TLB with INVEPT on cpu migration + * KVM: fix LAPIC timer period overflow + * KVM: SVM: Fix tsc offset adjustment when running nested + * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly + * net: Fix wrong sizeof + * mm: add_to_swap_cache() must not sleep + * sis5513: fix PIO setup for ATAPI devices + * PIT fixes to unbreak suspend/resume (bug #14222) + * IMA: open new file for read + * ACPI: Clarify resource conflict message + * ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression + * net: restore tx timestamping for accelerated vlans + * net: unix: fix sending fds in multiple buffers + * tun: Return -EINVAL if neither IFF_TUN nor IFF_TAP is set. + * tcp: fix CONFIG_TCP_MD5SIG + CONFIG_PREEMPT timer BUG() + * net: Fix sock_wfree() race + * smsc95xx: fix transmission where ZLP is expected + * sky2: Set SKY2_HW_RAM_BUFFER in sky2_init + * appletalk: Fix skb leak when ipddp interface is not loaded + * ax25: Fix possible oops in ax25_make_new + * ax25: Fix SIOCAX25GETINFO ioctl + * sit: fix off-by-one in ipip6_tunnel_get_prl + * Linux 2.6.31.4 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #416792 + + -- Andy Whitcroft Tue, 13 Oct 2009 12:06:59 +0100 + +linux (2.6.31-13.45) karmic; urgency=low + + [ Luke Yelavich ] + + * [Config] Add sd_mod to scsi-modules udeb for powerpc + + [ Mario Limonciello ] + + * SAUCE: Update to LIRC 0.8.6 + - LP: #432678 + + [ Tim Gardner ] + + * [Config] CONFIG_X86_PAT=y + https://lists.ubuntu.com/archives/kernel-team/2009-October/007477.html + https://lists.ubuntu.com/archives/kernel-team/2009-October/007534.html + + * [Config] Add armel arch to linux-libc-dev arches. + - LP: #449637 + + [ Upstream Kernel Changes ] + + * e1000e: swap max hw supported frame size between 82574 and 82583 + * drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI. + - LP: #392017 + * ALSA: hda - Add quirks for some HP laptops + - LP: #449742 + * ALSA: hda - Add support for HP dv6 + - LP: #449742 + + -- Tim Gardner Mon, 12 Oct 2009 11:27:10 -0600 + +linux (2.6.31-13.44) karmic; urgency=low + + [ Upstream Kernel Changes ] + + * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584 + * appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903 + Note - This patch causes an ABI change in the symbol aarp_send_ddp + which I'm ignoring. + + -- Tim Gardner Sat, 10 Oct 2009 08:27:46 -0600 + +linux (2.6.31-13.43) karmic; urgency=low + + [ Andy Whitcroft ] + + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + + [ Colin Watson ] + + * Use section 'admin' rather than 'base' + + [ John Johansen ] + + * SAUCE: AppArmor: Set error code after structure initialization. + - LP: #427948 + * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation + - LP: #446595 + + [ Luke Yelavich ] + + * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc + + [ Stefan Bader ] + + * [Upstream] acerhdf: Limit modalias matching to supported boards + (supersedes previous revert made by Andy Whitcroft) + - LP: #435958 + + -- Tim Gardner Fri, 09 Oct 2009 10:08:16 -0600 + +linux (2.6.31-13.42) karmic; urgency=low + + [ Leann Ogasawara ] + + * SAUCE: (drop after 2.6.31) input: Add support for filtering input + events + - LP: #430809 + * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi + toggle switch press + - LP: #430809 + + [ Tim Gardner ] + + * SAUCE: Raise the default console 'quiet' level to 2 + This supresses all but critical and emergency level messages. + https://lists.ubuntu.com/archives/kernel-team/2009-October/007476.html + + [ Upstream Kernel Changes ] + + * TTY: fix typos + * Linux 2.6.31.3 + * V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J + - LP: #433904 + + -- Tim Gardner Thu, 08 Oct 2009 10:42:07 -0600 + +linux (2.6.31-12.41) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y + - LP: #416325 + * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT + The original patch failed to work for amd64. + - LP: #430694 + + [ Upstream Kernel Changes ] + + * ALSA: hda - Add a white-list for MSI option + Upstream cherry-pick: Infrastructure support for #445580 + * ALSA: hda - Add HP Pavilion dv4t-1300 to MSI whitelist + - LP: #445580 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-T350P + - LP: #410933 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-B1VP + - LP: #410933 + + -- Tim Gardner Wed, 07 Oct 2009 11:59:35 -0600 + +linux (2.6.31-12.40) karmic; urgency=low + + [ Tim Gardner ] + + * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros + - LP: #430694 + * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915 + - LP: #430694 + + [ Upstream Kernel Changes ] + + * V4L/DVB (12352): gspca - vc032x: Fix mi1310_soc preview and LED + - LP: #310760 + + -- Tim Gardner Tue, 06 Oct 2009 20:25:36 -0600 + +linux (2.6.31-12.39) karmic; urgency=low + + [ Andy Whitcroft ] + + * install the full changelog with the binary package + * changelog -- explicitly note rebases and clean history + + [ Tim Gardner ] + + * Revert "SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless + adapters" + * Revert "SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from + going negative during unlink" + * Revert "SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object" + * Revert "SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs + a persistent object" + * Revert "drm/i915: Check that the relocation points to within the + target" + * Revert "drm/i915: fix tiling on IGDNG" + * Revert "Driver core: add new device to bus's list before probing" + * Revert "HID: completely remove apple mightymouse from blacklist" + * Revert "KVM: x86: check for cr3 validity in ioctl_set_sregs" + + All reverts superseded by corresponding v2.6.31.2 patches + + * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules + - LP: #439456 + * [Config] Enabled CONFIG_SND_HDA_HWDEP + - LP: #443117 + * [Config] Add cpio as a build dependency. + * [Config] Set default I/O scheduler back to CFQ for desktop flavours + - LP: #381300 + + [ Upstream Kernel Changes ] + + * KVM: VMX: Fix EPT with WP bit change during paging + * pata_amd: do not filter out valid modes in nv_mode_filter + * p54usb: add Zcomax XG-705A usbid + * x86: Increase MIN_GAP to include randomized stack + * serial: bfin_5xx: fix building as module when early printk is enabled + * USB: option.c Add support for ZTE AC2726 EVDO modem + * USB: option: TELIT UC864G support + * video: s3c_fb.c: fix build with CONFIG_HOTPLUG=n + * kbuild: fix cc1 options check to ensure we do not use -fPIC when + compiling + * drivers/mfd/ab3100-core.c: fix powerpc build error + * thinkpad-acpi: don't ask about brightness_mode for fw. 1V and 1R + * ACPI: pci_slot.ko wants a 64-bit _SUN + * fbcon: only unbind from console if successfully registered + * kallsyms: fix segfault in prefix_underscores_count() + * sisfb: change SiS_DDC_Port type to SISIOADDRESS + * mmc_spi: fail gracefully if host or card do not support the switch + command + * alpha: AGP update (fixes compile failure) + * fs: make sure data stored into inode is properly seen before unlocking + new inode + * eCryptfs: Handle unrecognized tag 3 cipher codes + * eCryptfs: Check for O_RDONLY lower inodes when opening lower files + * eCryptfs: Filename encryption only supports password auth tokens + * eCryptfs: Validate global auth tok keys + * eCryptfs: Prevent lower dentry from going negative during unlink + * Re-enable Lanman security + * xen: make -fstack-protector work under Xen + * xen: only enable interrupts while actually blocking for spinlock + * xen: use stronger barrier after unlocking lock + * xen: check EFER for NX before setting up GDT mapping + * perf_counter: Fix perf_copy_attr() pointer arithmetic + * perf tools: Fix buffer allocation + * tty: serial/pcmcia: add ID for Advantech card + * PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend() + * PM / yenta: Fix cardbus suspend/resume regression + * sony-laptop: check for rfkill hard block at load time + * nilfs2: fix missing zero-fill initialization of btree node cache + * ar9170usb: add usbid for TP-Link TL-WN821N v2 + * mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver + * mtd: ofpart: Check availability of reg property instead of name + property + * mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G + * USB: serial: ftdi_sio: new hardware support - hameg power supply + * USB: add PIDs for FTDI based OpenDCC hardware + * USB: serial: ftdi: handle gnICE+ JTAG adaptors + * USB: CDC WDM driver doesn't support non-blocking reads + * USB: fix cdc-acm regression in open + * cdc_acm: Fix to use modern speed interfaces + * tty: remove dtr/rts use from the driver open methods + * tty: gigaset: really fix chars_in_buffer + * kaweth: Fix memory leak in kaweth_control() + * x86: SGI UV: Fix IPI macros + * USB: serial: pl2303: new hardware support - sanwa multimeter + * USB: storage: fix a resume path GFP_NOIO must be used + * USB: usb-storage fails to attach to Huawei Datacard cdrom device + * USB: usbtmc: sanity checks for DEV_DEP_MSG_IN urbs + * USB: sl811-hcd: Fix device disconnect: + * drm/i915: remove restore in resume + * drm/i915: Only destroy a constructed mmap offset + * drm/i915: prevent FIFO calculation overflows on 32 bits with high + dotclocks + * drm/i915: Add buffer to inactive list immediately during fault + * drm/i915: Check that the relocation points to within the target + * drm/i915: Fix typo for wrong LVDS clock setting on IGDNG + * drm/i915: Fix SSC frequence for IGDNG + * drm/i915: Remove DAC disable in CRT force detect on IGDNG + * drm/i915: Fix LVDS panel fitting on Arrandale + * drm/I915: Use the CRT DDC to get the EDID for DVI-connector on Mac + * drm/i915: fix tiling on IGDNG + * agp/intel: Fix the pre-9xx chipset flush. + * nfsd4: fix null dereference creating nfsv4 callback client + * can: fix NOHZ local_softirq_pending 08 warning + * ahci: restore pci_intx() handling + * pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume + * net ax25: Fix signed comparison in the sockopt handler + * net: Make the copy length in af_packet sockopt handler unsigned + * pty_write: don't do a tty_wakeup() when the buffers are full + * KVM: fix cpuid E2BIG handling for extended request types + * KVM: MMU: fix missing locking in alloc_mmu_pages + * KVM: MMU: fix bogus alloc_mmu_pages assignment + * KVM: Protect update_cr8_intercept() when running without an apic + * Fix NULL ptr regression in powernow-k8 + * perf tools: do not complain if root is owning perf.data + * netfilter: nf_nat: fix inverted logic for persistent NAT mappings + * netfilter: nf_conntrack: netns fix re reliable conntrack event delivery + * netfilter: bridge: refcount fix + * netfilter: ebt_ulog: fix checkentry return value + * ath5k: Wakeup fixes + * ath5k: do not release irq across suspend/resume + * Driver core: add new device to bus's list before probing + * tty: Add a full port_close function + * tty: USB hangup is racy + * tty: USB can now use the shutdown method for kref based freeing of + ports + * hwmon: (asus_atk0110) Add maintainer information + * tty: USB serial termios bits + * usb-serial: change referencing of port and serial structures + * usb-serial: put subroutines in logical order + * usb-serial: change logic of serial lookups + * usb-serial: acquire references when a new tty is installed + * usb-serial: fix termios initialization logic + * usb-serial: rename subroutines + * usb-serial: add missing tests and debug lines + * usb-serial: straighten out serial_open + * USB serial: update the console driver + * USB: xhci: Work around for chain bit in link TRBs. + * USB: xhci: Fix slot and endpoint context debugging. + * USB: xhci: Configure endpoint code refactoring. + * USB: xhci: Set correct max packet size for HS/FS control endpoints. + * USB: xhci: Support full speed devices. + * USB: xhci: Handle stalled control endpoints. + * USB: xhci: Add quirk for Fresco Logic xHCI hardware. + * USB: xhci: Make TRB completion code comparison readable. + * USB: xhci: Handle babbling endpoints correctly. + * USB: xhci: Don't touch xhci_td after it's freed. + * USB: xhci: Check URB's actual transfer buffer size. + * USB: xhci: Check URB_SHORT_NOT_OK before setting short packet status. + * USB: xhci: Set -EREMOTEIO when xHC gives bad transfer length. + * USB: xhci: Support interrupt transfers. + * USB: Fix SS endpoint companion descriptor parsing. + * /proc/kcore: work around a BUG() + * hugetlb: restore interleaving of bootmem huge pages (2.6.31) + * page-allocator: limit the number of MIGRATE_RESERVE pageblocks per zone + * mm: munlock use follow_page + * mm: fix anonymous dirtying + * mmap: avoid unnecessary anon_vma lock acquisition in vma_adjust() + * Fix idle time field in /proc/uptime + * drm/i915: Handle ERESTARTSYS during page fault + * em28xx: ir-kbd-i2c init data needs a persistent object + * saa7134: ir-kbd-i2c init data needs a persistent object + * powerpc/8xx: Fix regression introduced by cache coherency rewrite + * powerpc: Fix incorrect setting of __HAVE_ARCH_PTE_SPECIAL + * HID: completely remove apple mightymouse from blacklist + * mptsas : PAE Kernel more than 4 GB kernel panic + * NOMMU: Fix MAP_PRIVATE mmap() of objects where the data can be mapped + directly + * iwlwifi: Handle new firmware file with ucode build number in header + * iwlwifi: update 1000 series API version to match firmware + * iwlagn: modify digital SVR for 1000 + * iwlwifi: traverse linklist to find the valid OTP block + * iwlwifi: fix unloading driver while scanning + * Linux 2.6.31.2 + + -- Tim Gardner Mon, 05 Oct 2009 09:39:35 -0600 + +linux (2.6.31-11.38) karmic; urgency=low + + [ Stefan Bader ] + + * [Upstream] acerhdf: Limit modalias matching to supported boards + - LP: #435958 + + [ Tim Gardner ] + + * [Config] Added sata_via to d-i/modules/sata-modules + - LP: #434827 + * SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless adapters + - LP: #439285 + * [Upstream] i915: Fix i2c init message + - LP: #409361 + * [Config] Add sym53c8xx.ko to virtual sub-flavour + - LP: #439415 + + [ Upstream Kernel Changes ] + + * sched: Disable NEW_FAIR_SLEEPERS for now + - LP: #436342 + + * ACPI video: ignore buggy _BQC + * ACPI video: work-around BIOS AML bug in _BQC + - LP: #428910 + * ALSA: hda - Added quirk to enable sound on Toshiba NB200 + - LP: #438318 + + -- Tim Gardner Thu, 01 Oct 2009 13:52:09 -0600 + +linux (2.6.31-11.37) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Increase kernel log buffer to 256K for amd64 flavours + - LP: #424810 + * [Config] Set HZ=100 for amd64 flavours + - LP: #438234 + * [Upstream] e1000e: Emit notice instead of an error when + pci_enable_pcie_error_reporting() fails + - LP: #436370 + + [ Upstream Kernel Changes ] + + * n_tty: honor opost flag for echoes + * n_tty: move echoctl check and clean up logic + - LP: #438310 + + * Revert "[Upstream] drm/i915: Check that the relocation points to within + the target" - Use upstream cherry-pick. + * drm/i915: Check that the relocation points to within the target + - LP: #429241 + + * drm/i915: fix tiling on IGDNG + * drm/i915: add B43 chipset support + * agp/intel: Add B43 chipset support + Intel request from kernel team mailing list. + + * HID: completely remove apple mightymouse from blacklist + - LP: #428111 + + -- Tim Gardner Mon, 28 Sep 2009 11:47:29 -0600 + +linux (2.6.31-11.36) karmic; urgency=low + + [ Brian Rogers ] + + * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object + * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a + persistent object + + [ Takashi Iwai ] + + * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device + - LP: #416482 + + [ Tyler Hicks ] + + * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going + negative during unlink + + [ Upstream Kernel Changes ] + + * sg: fix oops in the error path in sg_build_indirect() + * mpt2sas : Rescan topology from Interrupt context instead of work thread + * mpt2sas: Prevent sending command to FW while Host Reset + * mpt2sas: setting SDEV into RUNNING state from Interrupt context + * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg + * SCSI: fix oops during scsi scanning + * SCSI: libsrp: fix memory leak in srp_ring_free() + * cfg80211: fix looping soft lockup in find_ie() + * ath5k: write PCU registers on initial reset + * binfmt_elf: fix PT_INTERP bss handling + * TPM: Fixup boot probe timeout for tpm_tis driver + * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined! + * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices + * fix undefined reference to user_shm_unlock + * perf_counter: Fix buffer overflow in perf_copy_attr() + * perf_counter: Start counting time enabled when group leader gets + enabled + * powerpc/perf_counters: Reduce stack usage of power_check_constraints + * powerpc: Fix bug where perf_counters breaks oprofile + * powerpc/ps3: Workaround for flash memory I/O error + * block: don't assume device has a request list backing in nr_requests + store + * agp/intel: remove restore in resume + * ALSA: cs46xx - Fix minimum period size + * ASoC: Fix WM835x Out4 capture enumeration + * sound: oxygen: work around MCE when changing volume + * mlx4_core: Allocate and map sufficient ICM memory for EQ context + * perf stat: Change noise calculation to use stddev + * x86: Fix x86_model test in es7000_apic_is_cluster() + * x86/i386: Make sure stack-protector segment base is cache aligned + * PCI: apply nv_msi_ht_cap_quirk on resume too + * x86, pat: Fix cacheflush address in change_page_attr_set_clr() + * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() + with highmem + * KVM guest: do not batch pte updates from interrupt context + * KVM: Fix coalesced interrupt reporting in IOAPIC + * KVM: VMX: Check cpl before emulating debug register access + * KVM guest: fix bogus wallclock physical address calculation + * KVM: x86: Disallow hypercalls for guest callers in rings > 0 + * KVM: VMX: Fix cr8 exiting control clobbering by EPT + * KVM: x86 emulator: Implement zero-extended immediate decoding + * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list + * KVM: x86 emulator: fix jmp far decoding (opcode 0xea) + * KVM: limit lapic periodic timer frequency + * libata: fix off-by-one error in ata_tf_read_block() + * PCI quirk: update 82576 device ids in SR-IOV quirks list + * PCI: Unhide the SMBus on the Compaq Evo D510 USDT + * powerpc/pseries: Fix to handle slb resize across migration + * Linux 2.6.31.1 + + -- Tim Gardner Thu, 24 Sep 2009 13:04:28 -0600 + +linux (2.6.31-10.35) karmic; urgency=low + + [ Amit Kucheria ] + + * Disable CONFIG_UEVENT_HELPER_PATH + + [ Andy Whitcroft ] + + * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD + * remove the tlsup driver + * remove lmpcm logitech driver support + + [ Bryan Wu ] + + * Add 3 missing files to prerm remove file list + - LP: #345623, #415832 + + [ Chris Wilson ] + + * [Upstream] drm/i915: Check that the relocation points to within the + target + - LP: #429241 + + [ Luke Yelavich ] + + * [Config] Set CONFIG_EXT4_FS=y on ports architectures + + [ Manoj Iyer ] + + * SAUCE: Added quirk to recognize GE0301 3G modem as an interface. + - LP: #348861 + + [ Tim Gardner ] + + * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list" + Upstream suggests that this is not the right approach. + + * [Config] Set default I/O scheduler to DEADLINE + CFQ seems to have some load related problems which are often exacerbated by sreadahead. + - LP: #381300 + + [ ubuntu@tjworld.net ] + + * SAUCE: ipw2200: Enable LED by default + - LP: #21367 + + [ Upstream Kernel Changes ] + + * ALSA: hda - Add support for new AMD HD audio devices + - LP: #430564 + + -- Andy Whitcroft Wed, 16 Sep 2009 15:37:49 +0100 + +linux (2.6.31-10.34) karmic; urgency=low + + [ Ted Tso ] + + * [Upstream] ext3: Don't update superblock write time when filesystem is + read-only + - LP: #427822 + + -- Tim Gardner Tue, 15 Sep 2009 16:00:45 -0600 + +linux (2.6.31-10.33) karmic; urgency=low + + [ Leann Ogasawara ] + + * [Upstream] dvb-usb: fix tuning with Cinergy T2 + - LP: #421258 + + [ Tim Gardner ] + + * [Config] Unconditionally copy files from sub-flavours lists. + (really, really fix it this time) + - LP: #423426 + * [Config] Set CONFIG_CACHEFILES=m for all flavours + + [ Upstream Kernel Changes ] + + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #427822 + + -- Tim Gardner Tue, 15 Sep 2009 07:50:21 -0600 + +linux (2.6.31-10.32) karmic; urgency=low + + [ Eric Miao ] + + * [Config] enable module support for memory stick + - LP: #159951 + + [ Tim Gardner ] + + * [Config] Unconditionally copy files from sub-flavours lists. + - LP: #423426 + + -- Tim Gardner Thu, 10 Sep 2009 15:57:55 -0600 + +linux (2.6.31-10.31) karmic; urgency=low + + [ Andy Whitcroft ] + + * rebase to v2.6.31 final + + [ Colin Watson ] + + * [Config] Recommend grub-pc in linux-image + - LP: #385741 + + [ Ike Panhc ] + + * [Upstream] Pull latest update of lenovo-sl-laptop + + [ Peter Feuerer ] + + * [Upstream] (drop after 2.6.31) acerhdf: fix fan control for AOA150 + model + - LP: #426691 + + [ Tim Gardner ] + + * [Config] De-macro some package names. + + [ Upstream Changes ] + + * rebase to 2.6.31 final. + + -- Andy Whitcroft Thu, 10 Sep 2009 09:38:10 +0100 + +linux (2.6.31-10.30) karmic; urgency=low + + [ Amit Kucheria ] + + * [Config] Enable CONFIG_USB_DEVICEFS + - LP: #417748 + * [Config] Populate the config-update template a bit more + + [ Andy Whitcroft ] + + * rebase to v2.6.31-rc9 + * [Config] update configs following rebase to v2.6.31-rc9 + * [Config] update ports configs following rebase to v2.6.31-rc9 + + [ Colin Ian King ] + + * SAUCE: wireless: hostap, fix oops due to early probing interrupt + - LP: #254837 + + [ Jerone Young ] + + * [Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) + white-list + - LP: #281732 + + [ John Johansen ] + + * SAUCE: AppArmor: Fix profile attachment for regexp based profile names + - LP: #419308 + * SAUCE: AppArmor: Return the correct error codes on profile + addition/removal + - LP: #408473 + * SAUCE: AppArmor: Fix OOPS in profile listing, and display full list + - LP: #408454 + * SAUCE: AppArmor: Fix mapping of pux to new internal permission format + - LP: #419222 + * SAUCE: AppArmor: Fix change_profile failure + - LP: #401931 + * SAUCE: AppArmor: Tell git to ignore generated include files + - LP: #419505 + + [ Stefan Bader ] + + * [Upstream] acpi: video: Loosen strictness of video bus detection code + - LP: #333386 + * SAUCE: Remove ov511 driver from ubuntu subdirectory + + [ Tim Gardner ] + + * [Config] Exclude char-modules from non-x86 udeb creation + * SAUCE: Notify the ACPI call chain of AC events + * [Config] CONFIG_SATA_VIA=m + - LP: #403385 + * [Config] Build in all phylib support modules. + * [Config] Don't fail when sub-flavour files are missing + - LP: #423426 + * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR=0 + - LP: #423513 + + [ Upstream ] + + * Rebased against v2.6.31-rc9 + + -- Andy Whitcroft Mon, 07 Sep 2009 11:33:45 +0100 + +linux (2.6.31-9.29) karmic; urgency=low + + [ Leann Ogasawara ] + + * [Upstream] agp/intel: support for new chip variant of IGDNG mobile + - LP: #419993 + * [Config] d-i/modules: Add new char-modules file, initialize with + intel-agp + - LP: #420605 + + [ Upstream ] + + * Rebased against 2.6.31-rc8 plus some inotify regression patches: + up through git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git + adda766193ea1cf3137484a9521972d080d0b7af. + + -- Tim Gardner Fri, 28 Aug 2009 06:31:30 -0600 + +linux (2.6.31-8.28) karmic; urgency=low + + [ Ike Panhc ] + + * [Config] Let nic-shared-modules depends on crypto-modules + - LP: #360966 + + [ Leann Ogasawara ] + + * [Upstream] (drop after 2.6.31) drm/i915: increase default latency + constant + - LP: #412492 + + [ Mario Limonciello ] + + * [Upstream]: (drop after 2.6.31) dell-laptop: don't change softblock + status if HW switch is disabled + - LP: #418721 + * [Upstream]: (drop after 2.6.31) compal-laptop: Add support for known + Compal made Dell laptops + * [Upstream]: (drop after 2.6.31) compal-laptop: Replace sysfs support + with rfkill support + + [ Tim Gardner ] + + * [Config] Add acpiphp to virtual sub-flavour + - LP: #364916 + * Drop KSM patch set for now because of instabilities with encrypted swap. + - LP: #418781 + + -- Tim Gardner Wed, 26 Aug 2009 08:14:26 -0600 + +linux (2.6.31-7.27) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] updateconfigs updateportsconfigs after 2.6.31-rc7 rebase + * SAUCE: (drop after 2.6.31) Added KSM from mmotm-2009-08-20-19-18 + Replaces previous ksm patches from 2.6.31-6.25 + * [Config] KSM=y + + [ Upstream ] + + * Rebased against v2.6.31-rc7 + + -- Tim Gardner Sat, 22 Aug 2009 20:32:11 -0600 + +linux (2.6.31-6.26) karmic; urgency=low + + [ Andy Whitcroft ] + + * [Config] enable CONFIG_AUFS_BR_RAMFS + - LP: #414738 + * split out debian directory ready for abstraction + * add printdebian target to find branch target + * abstracted debian -- debian/files is not abstracted + * abstracted debian -- packages must be built in debian/ + * abstracted debian -- kernel-wedge needs to work in debian/ + * abstracted debian -- ensure we install the copyright file + * abstracted-debian -- drop the debian directories from headers + * abstracted-debian -- drop the debian directories from headers part 2 + * SAUCE: ubuntu-insert-changes -- follow abstracted debian + * [Upstream] aoe: ensure we initialise the request_queue correctly V2 + - LP: #410198 + + [ Luke Yelavich ] + + * [Config] Ports: Disable CONFIG_CPU_FREQ_DEBUG on powerpc-smp + * [Config] Ports: Re-enable windfarm modules on powerpc64-smp + - LP: #413150 + * [Config] Ports: Build all cpu frequency scaling governors into ports + kernels + * [Config] Ports: Build ext2 and ext3 modules into ports kernels + * [Config] Ports: CONFIG_PACKET=y for all ports kernels + * [Config] Ports: Enable PS3 network driver + + [ Stefan Bader ] + + * abstracted debian -- call $(DEBIAN)/rules using make + + [ Tim Gardner ] + + * [Config] Abstract the debian directory + * SAUCE: Improve error reporting in postinst + - LP: #358564 + + -- Tim Gardner Sun, 16 Aug 2009 20:33:28 -0600 + +linux (2.6.31-6.25) karmic; urgency=low + + [ Andy Whitcroft ] + + * script to generate Ubuntu changes from changelog + * [Config] standardise ANDROID options + * [Config] standardise CONFIG_ATM as module + * [Config] standardise CONFIG_LIB80211 as module + * [Config] disable CONFIG_PRINT_QUOTA_WARNING + * [Config] set CONFIG_CRAMFS as module + * [Config] enable CONFIG_DAB and modules + * [Config] set CONFIG_MAC80211_HWSIM as module + * [Config] set CONFIG_NET_CLS_FLOW as module + * [Config] set CONFIG_NF_CONNTRACK_SANE as module + * [Config] set CONFIG_NF_CT_PROTO_DCCP as module + * [Config] set CONFIG_RTC_DRV_DS1511 as module + * [Config] set CONFIG_RTC_DRV_R9701 as module + * [Config] set CONFIG_RTC_DRV_S35390A as module + * [Config] set CONFIG_TOIM3232_DONGLE as module + * [Config] standardise CONFIG_USB_MIDI_GADGET as module + * [Config] standardise CONFIG_USB_G_PRINTER as module + * [Config] standardise CONFIG_USB_SERIAL_IR as module + * [Config] set CONFIG_USB_SERIAL_IUU as module + * [Config] standardise CONFIG_USB_STORAGE_CYPRESS_ATACB as module + * [Config] standardise CONFIG_USB_STORAGE_ONETOUCH as module + * cleanup remains of dm-loop + * drop thinkpad ec and smapi support + * drop appleir + * [Config] update configs following rebase to v2.6.31-rc6 + * rebase to v2.6.31-rc6 + + [ Hugh Dickins ] + + * SAUCE: ksm patch 1, drop after 2.6.31 + * SAUCE: ksm patch 2, drop after 2.6.31 + * SAUCE: ksm patch 3, drop after 2.6.31 + * SAUCE: ksm patch 4, drop after 2.6.31 + * SAUCE: ksm patch 5, drop after 2.6.31 + * SAUCE: ksm patch 7, drop after 2.6.31 + + [ Izik Eidus ] + + * SAUCE: ksm patch 0, drop after 2.6.31 + * SAUCE: ksm patch 6, drop after 2.6.31 + * SAUCE: ksm patch 8, drop after 2.6.31 + * SAUCE: ksm patch 9, drop after 2.6.31 + + [ Luke Yelavich ] + + * [Config] Ports: Re-add PS3 modules to udebs + + [ Michael Casadevall ] + + * [Config] Update SPARC config and d-i files to reflect what can be built + + [ Tim Gardner ] + + * [Config] Removed armel package support + * [Config] Enabled CONFIG_KSM=y + + [ Upstream Kernel Changes ] + + * Rebased against v2.6.31-rc6 + * ARM: Cleanup: Revert "ARM: Add more cache memory types macros" + * ARM: Cleanup: Revert "Do not use OOB with MLC NAND" + * ARM: Cleanup: Revert "ARM: Make ARM arch aware of ubuntu/ drivers" + * ARM: Cleanup: Revert "ARM: IMX51: Make video capture drivers compile" + * ARM: Cleanup: Revert "ARM: IMX51: Fix isl29003 HWMON driver for i2c + changes" + * ARM: Cleanup: Revert "ARM: IMX51: IPU irq handler deadlock fix" + * ARM: Cleanup: Revert "ARM: IMX51: Babbage 2.5 needs a different system + revision" + * ARM: Cleanup: Revert "ARM: IMX51: Compile-in the IMX51 cpufreq driver + by default" + * ARM: Cleanup: Revert "ARM: IMX51: Enable ZONE_DMA for ARCH_MXC" + * ARM: Cleanup: Revert "ARM: IMX51: Make ARCH_MXC auto-enable + ARCH_MXC_CANONICAL" + * ARM: Cleanup: Revert "ARM: IMX51: Unconditionally disable + CONFIG_GPIOLIB" + * ARM: Cleanup: Revert "ARM: IMX51: Minimal changes for USB to work on + 2.6.31" + * ARM: Cleanup: Revert "ARM: IMX51: Fix plat-mxc/timer.c to handle imx51" + * ARM: Cleanup: Revert "ARM: IMX51: Make it compile." + * ARM: Cleanup: Revert "ARM: IMX51: Clean-up the craziness of including + mxc_uart.h _everywhere_" + * ARM: Cleanup: Revert "ARM: IMX51: Move board-mx51* header files to the + correct location" + * ARM: Cleanup: Revert "ARM: IMX51: Changed from snd_card_new to + snd_card_create" + * ARM: Cleanup: Revert "ARM: IMX51: Fix up merge error in Kconfig" + * ARM: Cleanup: Revert "ARM: IMX51: mxc_timer_init prototype" + * ARM: Cleanup: Revert "ARM: IMX51: Removed the mxc_gpio_port structure." + * ARM: Cleanup: Revert "ARM: IMX51: Added external declaration for + mxc_map_io." + * ARM: Cleanup: Revert "ARM: IMX51: Get to bus_id by calling dev_name." + * ARM: Cleanup: Revert "ARM: IMX51: Get to bus_id by calling dev_name." + * ARM: Cleanup: Revert "ARM: IMX51: snd_soc_machine structure replaced + with snd_soc_card." + * ARM: Cleanup: Revert "ARM: IMX51: codec structure was moved to the card + structure" + * ARM: Cleanup: Revert "ARM: IMX51: Hack to add defines for + DMA_MODE_READ/WRITE/MASK" + * ARM: Cleanup: Revert "ARM: IMX51: Add SoC and board support for + Freescale mx51 platform" + * Driver core: add new device to bus's list before probing + * [Upstream] (drop after 2.6.31) ALSA: hda - Reduce click noise at + power-saving + - LP: #381693, #399750, #380892 + + -- Andy Whitcroft Fri, 14 Aug 2009 11:32:23 +0100 + +linux (2.6.31-5.24) karmic; urgency=low + + [ Amit Kucheria ] + + * ARM: IMX51: Make video capture drivers compile + * [Config] IMX51: Config updates + + [ Andy Whitcroft ] + + * remove leftovers of dm-bbr + + [ Leann Ogasawara ] + + * Add pata_cs5535 to pata-modules + - LP: #318805 + + [ Luke Yelavich ] + + * [Config] CONFIG_PPC64=y for powerpc64-smp + * [Config] Set the maximum number of CPUs to 1024 for powerpc64-smp + * [Config] CONFIG_PPC_PS3=y for powerpc64-smp + * [Config] CONFIG_PPC_MAPLE=y on powerpc64-smp + * [Config] CONFIG_PPC_PASEMI=y on powerpc64-smp + * [Config] CONFIG_CPU_FREQ_PMAC64=y on powerpc64-smp + * [Config] Enable all PS3 drivers in powerpc64-smp + + [ Mario Limonciello ] + + * LIRC -- fix lirc-i2c 2.6.31 compilation + + [ Matthew Garrett ] + + * [Upstream] dell-laptop: Fix rfkill state queries + + [ Tim Gardner ] + + * [Config] Ignore armel ABI and module changes + * [Config] Update configs after rebase against 2.6.31-rc5 + + [ Upstream ] + + * Rebased to 2.6.31-rc5 + + -- Andy Whitcroft Tue, 28 Jul 2009 10:10:09 +0100 + +linux (2.6.31-4.23) karmic; urgency=low + + [ Andy Whitcroft ] + + * AUFS -- update to aufs2-30 20090727 + * [Config] enable AUFS FUSE support + + [ Luke Yelavich ] + + * [Config] CONFIG_JFS_FS=m on sparc + + [ Tim Gardner ] + + * [Upstream] dell-laptop: Fix rfkill state setting. + + -- Andy Whitcroft Mon, 27 Jul 2009 11:11:47 +0100 + +linux (2.6.31-4.22) karmic; urgency=low + + [ Amit Kucheria ] + + * ARM: IMX51: Add SoC and board support for Freescale mx51 platform + * ARM: IMX51: Move board-mx51* header files to the correct location + * ARM: IMX51: Clean-up the craziness of including mxc_uart.h _everywhere_ + * ARM: IMX51: Make it compile. + * ARM: IMX51: Unconditionally disable CONFIG_GPIOLIB + * ARM: IMX51: Make ARCH_MXC auto-enable ARCH_MXC_CANONICAL + * ARM: IMX51: Enable ZONE_DMA for ARCH_MXC + * ARM: IMX51: Compile-in the IMX51 cpufreq driver by default + * ARM: IMX51: Fix isl29003 HWMON driver for i2c changes + * ARM: USB: musb: Refer to musb_otg_timer_func under correct #ifdef + * ARM: staging: udlfb: Add vmalloc.h include + * UBUNTU [Config]: Bring imx51 config upto date with other flavours + + [ Brad Figg ] + + * ARM: IMX51: Hack to add defines for DMA_MODE_READ/WRITE/MASK + * ARM: IMX51: codec structure was moved to the card structure + * ARM: IMX51: snd_soc_machine structure replaced with snd_soc_card. + * ARM: IMX51: Get to bus_id by calling dev_name. + * ARM: IMX51: Get to bus_id by calling dev_name. + * ARM: IMX51: Added external declaration for mxc_map_io. + * ARM: IMX51: Removed the mxc_gpio_port structure. + * ARM: IMX51: mxc_timer_init prototype + * ARM: IMX51: Fix up merge error in Kconfig + * ARM: IMX51: Changed from snd_card_new to snd_card_create + + [ Dinh Nguyen ] + + * ARM: IMX51: Fix plat-mxc/timer.c to handle imx51 + * ARM: IMX51: Minimal changes for USB to work on 2.6.31 + * ARM: IMX51: Babbage 2.5 needs a different system revision + * ARM: IMX51: IPU irq handler deadlock fix + + [ Tim Gardner ] + + * [Config] Enabled CONFIG_CAN=m + - LP: #327243 + * [Config] Enabled CONFIG_SERIAL=m + - LP: #397189 + + -- Tim Gardner Fri, 24 Jul 2009 06:19:10 -0600 + +linux (2.6.31-4.21) karmic; urgency=low + + [ Amit Kucheria ] + + * dm-raid-4-5: Add missing brackets around test_bit() + + [ John Johansen ] + + * AppArmor: Fix change_profile failing lpn401931 + * AppArmor: Fix determination of forced AUDIT messages. + * AppArmor: Fix oops in auditing of the policy interface offset + + -- Andy Whitcroft Thu, 23 Jul 2009 19:18:30 +0100 + +linux (2.6.31-4.20) karmic; urgency=low + + [ Andy Whitcroft ] + + * SAUCE: iscsitarget -- update to SVN revision r214 + * SAUCE: iscsitarget -- renable driver + * [Config] consolidate lpia/lpia and i386/generic configs + * [Config] enable CRYPTO modules for all architectures + * [Config] enable cryptoloop + * [Config] enable various filesystems for armel + * [Config] sync i386 generic and generic-pae + * [Config] add the 386 (486 processors and above) flavour + * [Config] re-set DEFAULT_MMAP_MIN_ADDR + - LP: #399914 + * add genconfigs/genportsconfigs to extract the built configs + * updateconfigs -- alter concatenation order allow easier updates + * intelfb -- INTELFB now conflicts with DRM_I915 + * printchanges -- rebase tree does not have stable tags use changelog + * AppArmor: fix argument size missmatch on 64 bit builds + + [ Ike Panhc ] + + * Ship bnx2x firmware in nic-modules udeb + - LP: #360966 + + [ Jeff Mahoney ] + + * AppArmor: fix build failure on ia64 + + [ John Johansen ] + + * AppArmour: ensure apparmor enabled parmater is off if AppArmor fails to + initialize. + * AppArmour: fix auditing of domain transitions to include target profile + information + * AppArmor: fix C99 violation + * AppArmor: revert reporting of create to write permission. + * SAUCE: Add config option to set a default LSM + * [Config] enable AppArmor by default + * AppArmor: Fix NULL pointer dereference oops in profile attachment. + + [ Keith Packard ] + + * SAUCE: drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class + hardware + - LP: #351756 + + [ Luke Yelavich ] + + * [Config] add .o files found in arch/powerpc/lib to all powerpc kernel + header packages + - LP: #355344 + + [ Michael Casadevall ] + + * [Config] update SPARC config files to allow success build + + [ Scott James Remnant ] + + * SAUCE: trace: add trace_event for the open() syscall + + [ Stefan Bader ] + + * SAUCE: jfs: Fix early release of acl in jfs_get_acl + - LP: #396780 + + [ Tim Gardner ] + + * [Upstream] Fix Soltech TA12 volume hotkeys not sending key release + - LP: #397499 + * [Upstream] USB Option driver - Add USB ID for Novatel MC727/U727/USB727 + refresh + - LP: #365291 + * [Config] SSB/B44 are common across all arches/flavours. + + [ Upstream ] + + * Rebased to 2.6.31-rc4 + + -- Andy Whitcroft Thu, 23 Jul 2009 08:41:39 +0100 + +linux (2.6.31-3.19) karmic; urgency=low + + [ Andy Whitcroft ] + + * Revert "[Config] Disabled NDISWRAPPER" + * ndiswrapper -- fix i386 compilation failures on cmpxchg8b + * AUFS -- export various core functions + * AUFS -- export various core functions -- fixes + * AUFS -- core filesystem + * AUFS -- track changes in v2.6.31 + * [Config] Enable AUFS + * droppped 'iwl3945: do not send scan command if channel count zero' as it + is already upstream but failed to auto-drop on rebase. + + [ Eric Paris ] + + * SAUCE: fsnotify: use def_bool in kconfig instead of letting the user + choose + * SAUCE: inotify: check filename before dropping repeat events + * SAUCE: fsnotify: fix inotify tail drop check with path entries + + -- Andy Whitcroft Tue, 14 Jul 2009 12:52:55 +0100 + +linux (2.6.31-3.18) karmic; urgency=low + + [ Andy Whitcroft ] + + * Revert "Add splice-2.6.23.patch from AUFS to export a symbol needed by + AUFS" + * Revert "Add put_filp.patch from AUFS to export a symbol needed by AUFS" + * Revert "Add sec_perm-2.6.24.patch from AUFS - export + security_inode_permission" + * clear out left over AUFS files and modifications + + [ Luke Yelavich ] + + * [Config] Enable CONFIG_USB_ISP116X_HCD on sparc + * SAUCE: Explicitly include header files to allow apparmor to build on + powerpc + * [Config] Enable CONFIG_BLK_DEV_IDECD on powerpc + + [ Tim Gardner ] + + * [Config] Dropped ubuntu/misc/wireless/acx + * [Config] Disabled NDISWRAPPER until the compile issues are fixed. + + [ Upstream ] + + * Rebased to 2.6.31-rc3 + + -- Andy Whitcroft Fri, 10 Jul 2009 18:59:33 +0100 + +linux (2.6.31-2.17) karmic; urgency=low + + [ Andy Whitcroft ] + + * [Config] CONFIG_BLK_DEV_CRYPTOLOOP=m for sparc + * compcache -- remove redundant Kconfig entries part 2 + * compcache -- clean up CCFLAGS declarations + * [Config] enable AppArmor + * AppArmor: fix operator precidence issue in as_path_link + + [ John Johansen ] + + * AppArmor security module + * AppArmor: Correct mapping of file permissions. + * AppArmor: Turn auditing of ptrace on + + [ Luke Yelavich ] + + * [Config] disable CONFIG_DM_RAID45 on powerpc + + -- Andy Whitcroft Fri, 10 Jul 2009 15:02:05 +0100 + +linux (2.6.31-2.16) karmic; urgency=low + + [ Andy Whitcroft ] + + * compcache -- remove redundant Kconfig entries + added ignore and ignore.modules for all arches since the compcache update + changes the modules names as well as some compcache ABI values. + + [ Manoj Iyer ] + + * SAUCE: updated dm-raid45 module version to 2009.04.24 (2.6.30-rc3) + * SAUCE: update compcache version to 0.5.3 + + [ Tim Gardner ] + + * [Config]: Fix sparc FTBS by adding ignore.modules + + -- Tim Gardner Mon, 06 Jul 2009 13:35:29 -0600 + +linux (2.6.31-2.15) karmic; urgency=low + + [ Andy Whitcroft ] + + * SAUCE: default ATI Radeon KMS to off until userspace catches up + * [Config] Update configs following rebase to 2.6.31-rc2 + * [Config] update ports configs following update to 2.6.31-rc2 + + [ Luke Yelavich ] + + * [Config] powerpc - Disable CONFIG_RDS + + [ Matt Zimmerman ] + + * Rename linux-doc-PKGVER to linux-doc and clean up its description + - LP: #382115 + + [ Upstream Kernel Changes ] + + * rebased to mainline 2.6.31-rc2 + + -- Andy Whitcroft Sat, 04 Jul 2009 17:39:13 +0100 + +linux (2.6.31-1.14) karmic; urgency=low + + [ Andy Whitcroft ] + + * update ndiswrapper to 1.55 + * remove leftovers of gfs + * [Config] powerpc: enable CONFIG_PPC_DISABLE_WERROR + + [ Luke Yelavich ] + + * [Config] re-enable and build the ide-pmac driver into powerpc kernels + * [Config] Build the ServerWorks Frodo / Apple K2 SATA driver into the + kernel + + [ Manoj Iyer ] + + * Remove snd-bt-sco ubuntu driver + + [ Michael Casadevall ] + + * [Config] updates ia64 config and d-i folders to allow succesful build + * [Config] Update powerpc and sparc for 2.6.31 + + [ Upstream Kernel Changes ] + + * intel-iommu: fix Identity Mapping to be arch independent + - LP: #384695 + * ACPI: video: prevent NULL deref in acpi_get_pci_dev() + + -- Andy Whitcroft Tue, 30 Jun 2009 17:47:32 +0100 + +linux (2.6.31-1.13) karmic; urgency=low + + [ Andy Whitcroft ] + + * REBASE: rebased to mainline 2.6.31-rc1 + - "UBUNTU: SAUCE: UHCI USB quirk for resume" + no longer applies, using deprecated interfaces, LPIA only, dropped + - "UBUNTU: SAUCE: Mask off garbage in Dell WMI scan code data" + changes now upstream, dropped + * [Config] Update configs following rebase to 2.6.31-rc1 + * [Config] update ports configs following update to 2.6.31-rc1 + + * [Config] disable broken staging driver CONFIG_STLC45XX + * SAUCE: fix compcache to use updates accessors + * [Config] disable staging driver CONFIG_VT6655 + * SAUCE: fix DRDB to use updates accessors + * [Disable] ndiswrapper needs update + * [Disable] LIRC I2C needs update + * [Disable] CONFIG_LENOVO_SL_LAPTOP needs update + * [Config] disable I2C_DESIGNWARE does not compile + * [Config] disable CONFIG_TLSUP for lpia + * [Config] disable CONFIG_FB_UDL for arm + * SAUCE: disable adding scsi headers to linux-libc-dev + + [ Mario Limonciello ] + + * SAUCE: Add LIRC drivers + + -- Andy Whitcroft Thu, 25 Jun 2009 12:06:22 +0100 + +linux (2.6.30-10.12) karmic; urgency=low + + [ Andy Whitcroft ] + + * [Config] split out the ports configs into their own family + * [Config] update configs following introduction of ports family + + [ Upstream Kernel Changes ] + + * Revert "Rename linux-doc-PKGVER to linux-doc and clean up its + description". Fixes linux-doc package name conflicts for now. + - LP: #382115 + + -- Tim Gardner Mon, 22 Jun 2009 09:17:14 -0600 + +linux (2.6.30-10.11) karmic; urgency=low + + [ Amit Kucheria ] + + * [Config] Comment splitconfig.pl and misc cleanup + * [Config] Rename all configs to the new naming scheme + * [Config] Splitconfig rework + * [Config] Rename scripts/misc/oldconfig to kernelconfig + * [Config] Fix build system for new config split + * [Config] Run updateconfigs after the splitconfig rework + + [ Andy Whitcroft ] + + * Revert "SAUCE: Default to i915.modeset=0 if CONFIG_DRM_I915_KMS=y" + * [Config] standardise CONFIG_STAGING=y + * [Config] standardise CONFIG_RD_LZMA=y + * [Config] CONFIG_PCI_IOV=y + * [Config] CONFIG_PCI_STUB=m + * [Config] merge kernel configs more agressively + + [ Colin Watson ] + + * [Config] Run kernel-wedge in $(builddir) rather than at the top level + * [Config] Add support for including firmware in udebs + * [Config] Ship bnx2 firmware in nic-modules udeb + - LP: #384861 + + [ Luke Yelavich ] + + * [Config] ports - Import of ports architectures into kernel packaging + infrastructure + * [Config] ports - Do not update ports kernel configurations by default + * [Config] ports - Disable ABI checking for ports architectures + * [Config] ports - Build drivers in ubuntu sub-directory on powerpc + * [Config] ports - Add control.d/vars.* files for ports architectures + * [Config] ports - Add ports architectures for linux-libc-dev + * [Config] ports - Create powerpc specific message-modules and + block-modules udebs + * [Config] ports - Add configuration files for ports architectures + + [ Manoj Iyer ] + + * [Config] Enable CONFIG_BLK_DEV_AEC62XX=m for amd64 and i386 + - LP: #329864 + + [ Michael Casadevall ] + + * [Config] ports - Fix compression of kernels + + [ Stefan Bader ] + + * [Upstream] mmc: prevent dangling block device from accessing stale + queues + - LP: #383668 + + [ Tim Gardner ] + + * [Config] Recommend grub-pc in linux-image + - LP: #385741 + * [Config] Implement i386 generic and generic-pae flavours + * [Config] ports - Add control info after integrating ports arches + * [Config] Removed auto-generated files from git + * [Config] Added netxen_nic to nic-modules + - LP: #389603 + + [ Matt Zimmerman ] + + * Rename linux-doc-PKGVER to linux-doc and clean up its description + - LP: #382115 + + -- Tim Gardner Mon, 15 Jun 2009 14:38:26 -0600 + +linux (2.6.30-9.10) karmic; urgency=low + + [ Andy Whitcroft ] + + * [Config] CONFIG_SECURITY_TOMOYO=y (amd64, i386, lpia) + * [Config] CONFIG_KEXEC_JUMP=y (amd64, lpia) + * [Config] CONFIG_LENOVO_SL_LAPTOP=m (amd64, lpia) + * [Config] CONFIG_POHMELFS_CRYPTO=y (i386, amd64) + * [Config] CONFIG_SERIAL_MAX3100=m (i386, amd64, lpia) + * [Config] CONFIG_VIDEO_GO7007=m (amd64, i386) + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30 final + + -- Andy Whitcroft Fri, 05 Jun 2009 11:42:53 +0100 + +linux (2.6.30-8.9) karmic; urgency=low + + [ Andy Whitcroft ] + + * Config update removed the following options: + CONFIG_EDAC_AMD8111=m + CONFIG_EDAC_AMD8131=m + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30-rc8 + + -- Andy Whitcroft Wed, 03 Jun 2009 09:21:13 +0100 + +linux (2.6.30-7.8) karmic; urgency=low + + [ Andy Whitcroft ] + + * Enabled NEW configration options: + Paravirtualization layer for spinlocks (PARAVIRT_SPINLOCKS) [N/y/?] Y + Cisco FNIC Driver (FCOE_FNIC) [N/m/y/?] M + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30-rc7 + + -- Andy Whitcroft Sat, 23 May 2009 23:47:24 +0100 + +linux (2.6.30-6.7) karmic; urgency=low + + [ Andy Whitcroft ] + + * Dropped: UBUNTU: SAUCE: input: Blacklist digitizers from joydev.c (now + upstream) + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30-rc6 + + -- Andy Whitcroft Mon, 18 May 2009 18:05:54 +0100 + +linux (2.6.30-5.6) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Enable Keyspan USB serial device firmware in kernel module + - LP: #334285 + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30-rc5 + + -- Tim Gardner Mon, 11 May 2009 12:02:16 -0600 + +linux (2.6.30-4.5) karmic; urgency=low + + [ Colin Watson ] + + * Build-Conflict with findutils (= 4.4.1-1ubuntu1), to avoid + /usr/include/asm/* going missing + - LP: #373214 + + -- Stefan Bader Fri, 08 May 2009 11:09:08 +0200 + +linux (2.6.30-3.4) karmic; urgency=low + + [ Kees Cook ] + + * SAUCE: [x86] implement cs-limit nx-emulation for ia32 + - LP: #369978 + + [ Stefan Bader ] + + * SAUCE: input: Blacklist digitizers from joydev.c + - LP: #300143 + + -- Tim Gardner Fri, 01 May 2009 14:00:42 -0600 + +linux (2.6.30-2.3) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Enabled CC_STACKPROTECTOR=y for all x86en + - LP: #369152 + * SAUCE: Default to i915_modeset=0 if CONFIG_DRM_I915_KMS=y + * [Config] CONFIG_DRM_I915_KMS=y + * [Config] Set CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR to appropriate ARCH + minimums + + [ Upstream Kernel Changes ] + + * rebased to 2.6.30-rc4 + + -- Tim Gardner Thu, 30 Apr 2009 09:17:05 -0600 + +linux (2.6.30-1.2) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] armel: disable staging drivers, fixes FTBS + * [Config] armel imx51: Disable CONFIG_MTD_NAND_MXC, fixes FTBS + + [ Upstream Kernel Changes ] + + * mpt2sas: Change reset_type enum to avoid namespace collision. + Submitted upstream. + + -- Tim Gardner Tue, 28 Apr 2009 16:54:41 -0600 + +linux (2.6.30-1.1) karmic; urgency=low + + * Initial release after rebasing against v2.6.30-rc3 + + -- Tim Gardner Thu, 12 Mar 2009 19:16:07 -0600 --- linux-fsl-imx51-2.6.31.orig/debian.master/rules +++ linux-fsl-imx51-2.6.31/debian.master/rules @@ -0,0 +1,228 @@ +#!/usr/bin/make -f +# +# $(DEBIAN)/rules for Ubuntu linux +# +# Use this however you want, just give credit where credit is due. +# +# Copyright (c) 2007 Ben Collins +# + +ifeq ($(DEBIAN),) +DEBIAN=debian.master +endif + +# dpkg-buildpackage passes options that are incomptatible +# with the kernel build. +unexport CFLAGS +unexport LDFLAGS + +# This is the debhelper compatability version to use. +export DH_COMPAT=4 +export LC_ALL=C +export SHELL=/bin/bash -e + +# Common variables for all architectures +include $(DEBIAN)/rules.d/0-common-vars.mk + +# Pull in some arch specific stuff +include $(DEBIAN)/rules.d/$(arch).mk + +# Maintainer targets +include $(DEBIAN)/rules.d/1-maintainer.mk + +# Debian Build System targets +binary: binary-indep binary-arch + +build: build-arch build-indep + +clean: debian/control + dh_testdir + dh_testroot + dh_clean + + # d-i stuff + rm -rf $(DEBIAN)/d-i-$(arch) + + # normal build junk + rm -rf $(DEBIAN)/abi/$(release)-$(revision) + rm -rf $(builddir) + rm -f $(stampdir)/stamp-* + rm -rf $(DEBIAN)/linux-* + + # This gets rid of the d-i packages in control + cp -f $(DEBIAN)/control.stub $(DEBIAN)/control + cp $(DEBIAN)/changelog debian/changelog + + # Install the copyright information. + cp $(DEBIAN)/copyright debian/copyright + +distclean: clean + rm -rf debian.master/control debian.master/control.stub \ + debian.master/d-i/kernel-versions debian/changelog \ + debian/control debian/control.stub debian/copyright \ + debian/debian.env + +# Builds the image, arch headers and debug packages +include $(DEBIAN)/rules.d/2-binary-arch.mk + +# Rules for building the udebs ($(DEBIAN)-installer) +include $(DEBIAN)/rules.d/5-udebs.mk + +# Builds the source, doc and linux-headers indep packages +include $(DEBIAN)/rules.d/3-binary-indep.mk + +# Various checks to be performed on builds +include $(DEBIAN)/rules.d/4-checks.mk + +# Misc stuff +$(DEBIAN)/control.stub: $(DEBIAN)/d-i/kernel-versions.in \ + $(DEBIAN)/scripts/control-create \ + $(DEBIAN)/control.stub.in \ + $(DEBIAN)/changelog \ + $(wildcard $(DEBIAN)/control.d/* $(DEBIAN)/sub-flavours/*.vars) + for i in $(DEBIAN)/d-i/kernel-versions.in $(DEBIAN)/control.stub.in; do \ + new=`echo $$i | sed 's/\.in$$//'`; \ + cat $$i | sed -e 's/PKGVER/$(release)/g' \ + -e 's/ABINUM/$(abinum)/g' \ + -e 's/SRCPKGNAME/$(src_pkg_name)/g' \ + > $$new; \ + done + flavours="$(wildcard $(DEBIAN)/control.d/vars.* $(DEBIAN)/sub-flavours/*.vars)";\ + for i in $$flavours; do \ + $(SHELL) $(DEBIAN)/scripts/control-create $$i | \ + sed -e 's/PKGVER/$(release)/g' \ + -e 's/ABINUM/$(abinum)/g' \ + -e 's/SRCPKGNAME/$(src_pkg_name)/g' \ + >> $(DEBIAN)/control.stub; \ + done + cp $(DEBIAN)/control.stub $(DEBIAN)/control + +.PHONY: debian/control +debian/control: $(DEBIAN)/control.stub + rm -rf $(builddir)/modules $(builddir)/firmware \ + $(builddir)/kernel-versions $(builddir)/package-list \ + $(builddir)/$(DEBIAN) + mkdir -p $(builddir)/modules/$(arch)/ + cp $(DEBIAN)/d-i/modules/* $(builddir)/modules/$(arch)/ + mkdir -p $(builddir)/firmware/$(arch)/ + cp $(DEBIAN)/d-i/firmware/* $(builddir)/firmware/$(arch)/ + cp $(DEBIAN)/d-i/package-list $(DEBIAN)/d-i/kernel-versions $(builddir)/ + touch $(builddir)/modules/$(arch)/kernel-image + # kernel-wedge needs to poke around in $(DEBIAN)/ + ln -nsf $(CURDIR)/debian $(builddir)/debian + + # Some files may need to differ between architectures + if [ -d $(DEBIAN)/d-i/modules-$(arch) ]; then \ + cp $(DEBIAN)/d-i/modules-$(arch)/* \ + $(builddir)/modules/$(arch)/; \ + fi + if [ -d $(DEBIAN)/d-i/firmware-$(arch) ]; then \ + cp $(DEBIAN)/d-i/firmware-$(arch)/* \ + $(builddir)/firmware/$(arch)/; \ + fi + + # Remove unwanted stuff for this architecture + if [ -r "$(DEBIAN)/d-i/exclude-modules.$(arch)" ]; then \ + (cat $(DEBIAN)/d-i/exclude-modules.$(arch); \ + ls $(builddir)/modules/$(arch)/) | sort | uniq -d | \ + (cd $(builddir)/modules/$(arch)/; xargs rm -f); \ + fi + if [ -r "$(DEBIAN)/d-i/exclude-firmware.$(arch)" ]; then \ + (cat $(DEBIAN)/d-i/exclude-firmware.$(arch); \ + ls $(builddir)/firmware/$(arch)/) | sort | uniq -d | \ + (cd $(builddir)/firmware/$(arch)/; xargs rm -f); \ + fi + + # Per flavour module lists + flavour_modules=`ls $(DEBIAN)/d-i/modules.$(arch)-* 2>/dev/null` \ + || true; \ + if [ "$$flavour_modules" != "" ]; then \ + for flav in $$flavour_modules; do \ + name=`echo $$flav | sed 's/.*\/modules.$(arch)-//'`; \ + mkdir $(builddir)/modules/$(arch)-$$name; \ + (cd $(builddir)/modules/; tar cf - `cat ../$$flav`) | \ + (cd $(builddir)/modules/$(arch)-$$name/; tar xf -); \ + touch $(builddir)/modules/$(arch)-$$name/kernel-image; \ + done; \ + fi + flavour_firmware=`ls $(DEBIAN)/d-i/firmware.$(arch)-* 2>/dev/null` \ + || true; \ + if [ "$$flavour_firmware" != "" ]; then \ + for flav in $$flavour_firmware; do \ + name=`echo $$flav | sed 's/.*\/firmware.$(arch)-//'`; \ + mkdir $(builddir)/firmware/$(arch)-$$name; \ + (cd $(builddir)/firmware/; tar cf - `cat ../$$flav`) | \ + (cd $(builddir)/firmware/$(arch)-$$name/; tar xf -);\ + touch $(builddir)/firmware/$(arch)-$$name/kernel-image; \ + done; \ + fi + + # Some files may need to differ between flavours + flavour_module_dirs=`ls -d $(DEBIAN)/d-i/modules-$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_module_dirs" ]; then \ + for flav in $$flavour_module_dirs; do \ + name=`echo $$flav | sed 's/.*\/modules-$(arch)-//'`; \ + [ -d $(builddir)/modules/$(arch)-$$name ] || \ + cp -a $(builddir)/modules/$(arch) \ + modules/$(arch)-$$name; \ + cp $$flav/* $(builddir)/modules/$(arch)-$$name/; \ + done; \ + fi + flavour_firmware_dirs=`ls -d $(DEBIAN)/d-i/firmware-$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_firmware_dirs" ]; then \ + for flav in $$flavour_firmware_dirs; do \ + name=`echo $$flav | sed 's/.*\/firmware-$(arch)-//'`; \ + [ -d $(builddir)/firmware/$(arch)-$$name ] || \ + cp -a $(builddir)/firmware/$(arch) \ + firmware/$(arch)-$$name; \ + cp $$flav/* $(builddir)/firmware/$(arch)-$$name/; \ + done; \ + fi + + # Remove unwanted stuff for each flavour + flavour_exclude=`ls $(DEBIAN)/d-i/exclude-modules.$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_exclude" ]; then \ + for flav in $$flavour_exclude; do \ + name=`echo $$flav | sed 's/.*\/exclude-modules.$(arch)-//'`;\ + [ -d $(builddir)/modules/$(arch)-$$name ] || \ + cp -a $(builddir)/modules/$(arch) \ + $(builddir)/modules/$(arch)-$$name; \ + (cat $$flav; \ + ls $(builddir)/modules/$(arch)-$$name) | \ + sort | uniq -d | \ + (cd $(builddir)/modules/$(arch)-$$name/; \ + xargs rm -f); \ + done; \ + fi + flavour_exclude=`ls $(DEBIAN)/d-i/exclude-firmware.$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_exclude" ]; then \ + for flav in $$flavour_exclude; do \ + name=`echo $$flav | sed 's/.*\/exclude-firmware.$(arch)-//'`;\ + [ -d $(builddir)/firmware/$(arch)-$$name ] || \ + cp -a $(builddir)/firmware/$(arch) \ + $(builddir)/firmware/$(arch)-$$name; \ + (cat $$flav; \ + ls $(builddir)/firmware/$(arch)-$$name) | \ + sort | uniq -d | \ + (cd $(builddir)/firmware/$(arch)-$$name/; \ + xargs rm -f); \ + done; \ + fi + + if [ ! -d $(builddir)/modules/$(build_arch) ]; then \ + mkdir -p $(builddir)/modules/$(build_arch); \ + cp $(builddir)/modules/$(arch)/* \ + $(builddir)/modules/$(build_arch); \ + fi + if [ ! -d $(builddir)/firmware/$(build_arch) ]; then \ + mkdir -p $(builddir)/firmware/$(build_arch); \ + cp $(builddir)/firmware/$(arch)/* \ + $(builddir)/firmware/$(build_arch); \ + fi + + cp $(DEBIAN)/control.stub debian/control.stub + cd $(builddir) && kernel-wedge gen-control > $(CURDIR)/debian/control --- linux-fsl-imx51-2.6.31.orig/debian.master/changelog.historical +++ linux-fsl-imx51-2.6.31/debian.master/changelog.historical @@ -0,0 +1,4171 @@ + +linux (2.6.28-9.31) jaunty; urgency=low + + [ Andy Whitcroft ] + + * SAUCE: cpufreq-nforce2: probe failures are not errors + - LP: #332170 + * SAUCE: mmc: add MODALIAS linkage for MMC/SD devices + - LP: #30335 + * remove test-suspend script + - LP: #333856 + + [ Kees Cook ] + + * handle relative paths in modules.dep + Fixes 2.6.28-9.30 FTBS. + + [ Upstream Kernel Changes ] + + * ricoh_mmc: Handle newer models of Ricoh controllers + + -- Tim Gardner Wed, 11 Mar 2009 08:19:24 -0600 + +linux (2.6.28-9.30) jaunty; urgency=low + + [ Amit Kucheria ] + + * ARM:mx51 Add SoC and board support for mx51 platforms + * ARM:mx51 Add CONFIG_ARCH_MXC_CANONICAL to disable parts of Freescale's + code + * MMC: Add support for 8-bit cards + * Add ARM:MX51 SoC support to the build system + * ARM: Make ARM arch aware of ubuntu/ drivers + * ARM: Add imx51 configuration + * Disable d-i modules for imx51 and mv78xx0 + * Disable Apparmor on boot for ARM + * Updating imx51 config + + [ Jason Liu ] + + * Do not use OOB with MLC NAND + + [ Richard Zhu ] + + * Support the eMMC4.3 card + + [ Rob Herring ] + + * ARM: Add more cache memory types macros + + [ Tim Gardner ] + + * Set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y for i386/amd64/lpia + + [ Manoj Iyer ] + + * Enable CONFIG_RTL8187SE=m + + [ Upstream Kernel Changes ] + + * USB: EHCI: slow down ITD reuse + - LP: #329437 + + -- Tim Gardner Sun, 08 Mar 2009 14:14:15 -0600 + +linux (2.6.28-9.29) jaunty; urgency=low + + [ Andy Whitcroft ] + + * link-headers -- only link directories which do not already exist + - LP: #315252 + + [ Daniel Marjamäki ] + + * SAUCE: (drop after 2.6.28) netxen: fix memory leak in + drivers/net/netxen_nic_init.c + - LP: #330813 + + [ Dhananjay Phadke ] + + * SAUCE: (drop after 2.6.28) netxen: fix endianness in firmware commands + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: fix ipv6 offload and tx cleanup + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: fix link speed reporting for some + boards + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: firmware init fix + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: cleanup mac list on driver unload + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: hold tx lock while sending firmware + commands + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: handle dma mapping failures + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: avoid invalid iounmap + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: include ipv6.h (fixes build failure) + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: fix vlan tso/checksum offload + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: reduce memory footprint + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: revert jumbo ringsize + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: fix msi-x interrupt handling + - LP: #330813 + * SAUCE: (drop after 2.6.28) netxen: remove pcie workaround + - LP: #330813 + + [ Hannes Eder ] + + * SAUCE: (drop after 2.6.28) drivers/net/netxen: fix sparse warnings: use + NULL pointer instead of plain integer + - LP: #330813 + + [ Huaxu Wan ] + + * SAUCE: report rfkill changes event if interface is down + - LP: #193970 + + [ Tim Gardner ] + + * MV78XX0 must specify a target in the vars definition. + + [ Upstream Kernel Changes ] + + * Revert "ext4: wait on all pending commits in ext4_sync_fs()" + * jbd2: Fix return value of jbd2_journal_start_commit() + * jbd2: Avoid possible NULL dereference in + jbd2_journal_begin_ordered_truncate() + * ext4: Fix to read empty directory blocks correctly in 64k + * ext4: Fix lockdep warning + * ext4: Initialize preallocation list_head's properly + * ext4: Implement range_cyclic in ext4_da_writepages instead of + write_cache_pages + * ext4: Fix NULL dereference in ext4_ext_migrate()'s error handling + * ext4: Add fallback for find_group_flex + * ext4: Fix deadlock in ext4_write_begin() and ext4_da_write_begin() + * Added mv78xx0 flavor + + -- Tim Gardner Fri, 06 Mar 2009 06:13:31 -0700 + +linux (2.6.28-8.28) jaunty; urgency=low + + [ Alexey Starikovskiy ] + + * SAUCE: ACPI: EC: Limit workaround for ASUS notebooks even more + - LP: #288385 + + [ Scott James Remnant ] + + * SAUCE: Auto-load esp module when device opened. + * SAUCE: Auto-load bridge module when socket opened. + * SAUCE: Auto-load af_netlink module when socket opened. + * SAUCE: Auto-load wanrouter module when socket opened. + * SAUCE: Auto-load ip_queue module when socket opened. + * SAUCE: Auto-load ip6_queue module when socket opened. + * SAUCE: Auto-load cn module when socket opened. + * SAUCE: Auto-load scsi_transport_iscsi module when socket opened. + * SAUCE: Auto-load ftl module when device opened. + * SAUCE: Auto-load pcd module when device opened. + * SAUCE: Auto-load pf module when device opened. + * SAUCE: Auto-load nftl module when device opened. + * SAUCE: Auto-load mousedev module when psaux device opened. + * SAUCE: Auto-load mousedev module when /dev/input/mice opened. + * SAUCE: Auto-load rng-core module when device opened. + * SAUCE: Auto-load openprom module when device opened. + * SAUCE: Auto-load applicom module when device opened. + * SAUCE: Auto-load toshiba module when device opened. + * SAUCE: Auto-load cyclades module when device opened. + * SAUCE: Auto-load riscom8 module when device opened. + * SAUCE: Auto-load specialix module when device opened. + * SAUCE: Auto-load videodev module when device opened. + * SAUCE: Auto-load i2c_dev module when device opened. + * SAUCE: Auto-load mtdchar module when device opened. + * SAUCE: Auto-load pt module when device opened. + * SAUCE: Auto-load pg module when device opened. + * SAUCE: Auto-load cdc_acm module when device opened. + * SAUCE: Auto-load msr module when device opened. + * SAUCE: Auto-load cpuid module when device opened. + * SAUCE: quickcam: Enable double-buffering by default + * SAUCE: libata: Ignore HPA by default. + * SAUCE: hostap: Change initial operation mode to managed (infra) + * SAUCE: floppy: Provide a PnP device table in the module. + - LP: #255651 + * SAUCE: Auto-load mwave module when device opened. + * Build CONFIG_FUSE_FS into kernel, not as module. + + [ Stefan Bader ] + + * Enable build of ext4 as a module on LPIA + - LP: #331848 + + [ Tim Gardner ] + + * Update configs to fix LPIA FTBS + + -- Tim Gardner Thu, 05 Mar 2009 10:43:24 -0700 + +linux (2.6.28-8.27) jaunty; urgency=low + + [ Amit Kucheria ] + + * Updating configs (arm:ixp4xx) + + [ Andy Whitcroft ] + + * SAUCE: enable Intel HDMI output + + [ Manoj Iyer ] + + * SAUCE: Added quirk for Linksys WUSB600N USB wifi-n networking adapter + - LP: #323473 + + [ Steve Beattie ] + + * fix apparmor memory leak on unlinked file ops + - LP: #329489 + + [ Tim Gardner ] + + * SAUCE: Dell XPS710 reboot quirk + - LP: #323592 + * SAUCE: (drop after 2.6.28) ieee80211: Add infrastructure to obsolete + scan results + - LP: #336055 + * Add modules.order to the linux-image package. + + [ Upstream Kernel Changes ] + + * iwlwifi: fix time interval misuse in iwl_poll_{direct_}bit + * x86: only scan the root bus in early PCI quirks + - LP: #267295 + * ALSA: hda - Intel HDMI audio support + * ALSA: hda - Fix unused function in patch_intelhdmi.c + * ALSA: handle SiI1392 HDMI codec in patch_intelhdmi.c + * ALSA: hda-intel: reorder HDMI audio enabling sequence + * ALSA: introduce snd_print_pcm_rates() + * ALSA: create hda_eld.c for ELD routines and proc interface + * ALSA: ELD proc interface for HDMI sinks + * ALSA: hda: make standalone hdmi_fill_audio_infoframe() + * ALSA: hda: make global snd_print_channel_allocation() + * ALSA: hda: HDMI channel allocations for audio infoframe + * ALSA: hda: HDMI channel mapping cleanups + * ALSA: hda: minor code cleanups + * ALSA: hda: rename sink_eld to hdmi_eld + * ALSA: hda - Release ELD proc file + * ALSA: hda - minor HDMI code cleanups + * ALSA: hda - report selected CA index for Audio InfoFrame + * ALSA: hda - Add Intel vendor id string + + -- Tim Gardner Wed, 25 Feb 2009 14:23:46 -0700 + +linux (2.6.28-8.26) jaunty; urgency=low + + [ Amit Kucheria ] + + * Updating configs (armel:ixp4xx) + - LP: #331510 + + [ Tim Gardner ] + + * Add more missing modules + + -- Tim Gardner Tue, 24 Feb 2009 06:58:53 -0700 + +linux (2.6.28-8.25) jaunty; urgency=low + + [ Scott James Remnant ] + + * SAUCE: Prefer powernow-k8 to acpi-cpufreq + * Change CONFIG_X86_P4_CLOCKMOD to be a module again. + + [ Tim Gardner ] + + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Initialize the new + group descriptor when resizing the filesystem" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add sanity check + to make_indexed_dir" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: only use + i_size_high for regular files" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add sanity checks + for the superblock before mounting the filesystem" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix + s_dirty_blocks_counter if block allocation failed with nodelalloc" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Init the complete + page while building buddy cache" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Don't allow new + groups to be added during block allocation" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: mark the + blocks/inode bitmap beyond end of group as used" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Use new + buffer_head flag to check uninit group bitmaps initialization" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix the race + between read_inode_bitmap() and ext4_new_inode()" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix race between + read_block_bitmap() and mark_diskspace_used()" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: don't use blocks + freed but not yet committed in buddy cache init" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: cleanup mballoc + header files" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Use + EXT4_GROUP_INFO_NEED_INIT_BIT during resize" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add blocks added + during resize to bitmap" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Don't overwrite + allocation_context ac_status" + * Revert "SAUCE: (revert before 2.6.28.y update) jbd2: Add barrier not + supported test to journal_wait_on_commit_record" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Widen type of + ext4_sb_info.s_mb_maxs[]" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: avoid ext4_error + when mounting a fs with a single bg" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix the delalloc + writepages to allocate blocks at the right offset." + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: tone down + ext4_da_writepages warnings" + * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add support for + non-native signed/unsigned htree hash algorithms" + * Enabled X86_ACPI_CPUFREQ=y + + [ Upstream Kernel Changes ] + + * ath9k: quiet harmless ForceXPAon messages + - LP: #321474 + * [WATCHDOG] iTCO_wdt: fix SMI_EN regression 2 + - LP: #314050 + * pid: implement ns_of_pid + * mqueue: fix si_pid value in mqueue do_notify() + * powerpc/vsx: Fix VSX alignment handler for regs 32-63 + * sata_nv: give up hardreset on nf2 + * Fix Intel IOMMU write-buffer flushing + * SCSI: libiscsi: fix iscsi pool leak + * x86/cpa: make sure cpa is safe to call in lazy mmu mode + * sched: SCHED_OTHER vs SCHED_IDLE isolation + * x86, vm86: fix preemption bug + * Add support for VT6415 PCIE PATA IDE Host Controller + * ext2/xip: refuse to change xip flag during remount with busy inodes + * 3c505: do not set pcb->data.raw beyond its size + * Bluetooth: Fix TX error path in btsdio driver + * ext4: Add support for non-native signed/unsigned htree hash algorithms + * ext4: tone down ext4_da_writepages warnings + * ext4: Fix the delalloc writepages to allocate blocks at the right + offset. + * ext4: avoid ext4_error when mounting a fs with a single bg + * ext4: Widen type of ext4_sb_info.s_mb_maxs[] + * jbd2: Add barrier not supported test to journal_wait_on_commit_record + * ext4: Don't overwrite allocation_context ac_status + * ext4: Add blocks added during resize to bitmap + * ext4: Use EXT4_GROUP_INFO_NEED_INIT_BIT during resize + * ext4: cleanup mballoc header files + * ext4: don't use blocks freed but not yet committed in buddy cache init + * ext4: Fix race between read_block_bitmap() and mark_diskspace_used() + * ext4: Fix the race between read_inode_bitmap() and ext4_new_inode() + * ext4: Use new buffer_head flag to check uninit group bitmaps + initialization + * ext4: mark the blocks/inode bitmap beyond end of group as used + * ext4: Don't allow new groups to be added during block allocation + * ext4: Init the complete page while building buddy cache + * ext4: Fix s_dirty_blocks_counter if block allocation failed with + nodelalloc + * ext4: Add sanity checks for the superblock before mounting the + filesystem + * ext4: only use i_size_high for regular files + * ext4: Add sanity check to make_indexed_dir + * ext4: Initialize the new group descriptor when resizing the filesystem + * Fix longstanding "error: storage size of '__mod_dmi_device_table' isn't + known" + * Linux 2.6.28.7 + + -- Tim Gardner Thu, 19 Feb 2009 06:45:55 -0700 + +linux (2.6.28-8.24) jaunty; urgency=low + + [ Scott James Remnant ] + + * Change CPU_FREQ_DEFAULT_GOV_ONDEMAND to y + * SAUCE: Link acpi-cpufreq.o first + + [ Tim Gardner ] + + * Build in CPU Frequency scaling drivers + + -- Tim Gardner Wed, 18 Feb 2009 06:12:24 -0700 + +linux (2.6.28-8.23) jaunty; urgency=low + + [ Andy Whitcroft ] + + * include the kernel configuration in the sub-flavour images + - LP: #328859 + + [ Tim Gardner ] + + * Revert "SAUCE: (drop after 2.6.28) [eCryptfs] Regression in unencrypted + filename symlinks" in favor of upstream commit. + * Fix compile issues with qc-usb + * SAUCE: (remove after 2.6.28) V4L/DVB (10216): saa7127: fix broken + S-Video with saa7129 + - LP: #329267 + + [ Upstream Kernel Changes ] + + * Subject:SAUCE: LP#193970 iwlagn: fix hw-rfkill while the interface is + down + - LP: #193970 + * x86, vmi: put a missing paravirt_release_pmd in pgd_dtor + * nbd: fix I/O hang on disconnected nbds + * mac80211: restrict to AP in outgoing interface heuristic + * w1: w1 temp calculation overflow fix + * zd1211rw: adding 0ace:0xa211 as a ZD1211 device + * zd1211rw: treat MAXIM_NEW_RF(0x08) as UW2453_RF(0x09) for TP-Link + WN322/422G + * parport: parport_serial, don't bind netmos ibm 0299 + * syscall define: fix uml compile bug + * kernel-doc: fix syscall wrapper processing + * Fix page writeback thinko, causing Berkeley DB slowdown + * write-back: fix nr_to_write counter + * writeback: fix break condition + * mm: rearrange exit_mmap() to unlock before arch_exit_mmap + * powerpc/fsl-booke: Fix mapping functions to use phys_addr_t + * lockd: fix regression in lockd's handling of blocked locks + * sctp: Fix crc32c calculations on big-endian arhes. + * sctp: Correctly start rtx timer on new packet transmissions. + * sctp: Properly timestamp outgoing data chunks for rtx purposes + * net: Fix frag_list handling in skb_seq_read + * net: Fix OOPS in skb_seq_read(). + * drivers/net/skfp: if !capable(CAP_NET_ADMIN): inverted logic + * ipv4: fix infinite retry loop in IP-Config + * net: Fix userland breakage wrt. linux/if_tunnel.h + * net: packet socket packet_lookup_frame fix + * packet: Avoid lock_sock in mmap handler + * sungem: Soft lockup in sungem on Netra AC200 when switching interface + up + * udp: Fix UDP short packet false positive + * udp: increments sk_drops in __udp_queue_rcv_skb() + * ipv6: Disallow rediculious flowlabel option sizes. + * ipv6: Copy cork options in ip6_append_data + * net: 4 bytes kernel memory disclosure in SO_BSDCOMPAT gsopt try #2 + * sky2: fix hard hang with netconsoling and iface going up + * tun: Add some missing TUN compat ioctl translations. + * tun: Fix unicast filter overflow + * virtio_net: Fix MAX_PACKET_LEN to support 802.1Q VLANs + * tcp: splice as many packets as possible at once + * tcp: Fix length tcp_splice_data_recv passes to skb_splice_bits. + * sparc: Enable syscall wrappers for 64-bit (CVE-2009-0029) + * sparc64: Annotate sparc64 specific syscalls with SYSCALL_DEFINEx() + * ALSA: hda - Add missing terminator in slave dig-out array + * ALSA: mtpav - Fix initial value for input hwport + * HID: adjust report descriptor fixup for MS 1028 receiver + * ide/libata: fix ata_id_is_cfa() (take 4) + * libata: fix EH device failure handling + * netfilter: fix tuple inversion for Node information request + * netfilter: xt_sctp: sctp chunk mapping doesn't work + * x86: microcode_amd: fix wrong handling of equivalent CPU id + * ide-cd: fix DMA for non bio-backed requests + * net: Fix data corruption when splicing from sockets. + * Linux 2.6.28.6 + * eCryptfs: Regression in unencrypted filename symlinks + + -- Tim Gardner Mon, 16 Feb 2009 06:43:51 -0700 + +linux (2.6.28-8.22) jaunty; urgency=low + + [ Amit Kucheria ] + + * Remove perm-blacklist + + [ Andy Whitcroft ] + + * SAUCE: psmouse/synaptics: ensure we reset the device on resume + - LP: #317270 + + [ Tim Gardner ] + + * Add lpia to getabi script + * SAUCE: tracer for sreadahead + + -- Amit Kucheria Fri, 13 Feb 2009 15:23:21 +0200 + +linux (2.6.28-8.21) jaunty; urgency=low + + [ Andy Whitcroft ] + + * SAUCE: switch the Asus Pundit P1-AH2 to old acpi sleep ordering + - LP: #327267 + + [ Tim Gardner ] + + * Added LPIA arch support + * Added libdrm-dev as a 'Replaces' to linux-libc-dev + * SAUCE: LPIA support for 9202 HDA Sigmatel codec + * SAUCE: Add an X86_LPIA Kconfig option + * SAUCE: UHCI USB quirk for resume + * SAUCE: LPIA Reboot fix for Intel Crownbeach development boards + * SAUCE: LPIA Logical reset of USB port on resume + * Set CONFIG_WIRELESS_OLD_REGULATORY=n, added wireless-crda + as an install dependency. + + [ Upstream Kernel Changes ] + + * Revert "Revert "x86, early_ioremap: fix fencepost error"" + - LP: #312554 + * drm/i915: capture last_vblank count at IRQ uninstall time too + - LP: #320813 + * drm/i915: add get_vblank_counter function for GM45 + - LP: #320813 + * Staging: comedi: fix Kbuild + * Staging: meilhaus: fix Kbuild + * Staging: android: binder: fix arm build errors + * Staging: android: timed_gpio: Fix build to build on kernels after + 2.6.25. + * Staging: android: fix build error on 64bit boxes + * Staging: android: Add lowmemorykiller documentation. + * Staging: android: task_get_unused_fd_flags: fix the wrong usage of + tsk->signal + * staging: agnx: drivers/staging/agnx/agnx.h needs + * Staging: usbip: usbip_start_threads(): handle kernel_thread failure + * Staging: poch: fix verification of memory area + * Documentation: move DMA-mapping.txt to Doc/PCI/ + * sgi-xp: fix writing past the end of kzalloc()'d space + * do_wp_page: fix regression with execute in place + * wait: prevent exclusive waiter starvation + * shm: fix shmctl(SHM_INFO) lockup with !CONFIG_SHMEM + * revert "rlimit: permit setting RLIMIT_NOFILE to RLIM_INFINITY" + * prevent kprobes from catching spurious page faults + * sound: usb-audio: handle wMaxPacketSize for FIXED_ENDPOINT devices + * md: Ensure an md array never has too many devices. + * md: Fix a bug in linear.c causing which_dev() to return the wrong + device. + * ACPI: Enable bit 11 in _PDC to advertise hw coord + * ACPI: dock: Don't eval _STA on every show_docked sysfs read + * ieee1394: ohci1394: increase AT req. retries, fix ack_busy_X from + Panasonic camcorders and others + * firewire: ohci: increase AT req. retries, fix ack_busy_X from Panasonic + camcorders and others + * firewire: sbp2: fix DMA mapping leak on the failure path + * firewire: sbp2: add workarounds for 2nd and 3rd generation iPods + * ieee1394: sbp2: add workarounds for 2nd and 3rd generation iPods + * module: remove over-zealous check in __module_get() + * x86: APIC: enable workaround on AMD Fam10h CPUs + * eeepc-laptop: fix oops when changing backlight brightness during + eeepc-laptop init + * eeepc-laptop: Add support for extended hotkeys + * e1000: fix bug with shared interrupt during reset + * e1000: Fix PCI enable to honor the need_ioport flag + * agp/intel: Fix broken ® symbol in device name. + * ALSA: hda - Add quirk for FSC Amilo Xi2550 + * ALSA: hda - Add missing COEF initialization for ALC887 + * ALSA: hda - Add missing initialization for ALC272 + * asus_acpi: Add R1F support + * panasonic-laptop: fix X[ ARRAY_SIZE(X) ] + * ACPI: Skip the first two elements in the _BCL package + * ACPI: proc_dir_entry 'video/VGA' already registered + * ACPI: disable ACPI cleanly when bad RSDP found + * ACPICA: Fix table entry truncation calculation + * PCI: properly clean up ASPM link state on device remove + * PCI: return error on failure to read PCI ROMs + * seq_file: move traverse so it can be used from seq_read + * seq_file: fix big-enough lseek() + read() + * serial: set correct baud_base for Oxford Semiconductor Ltd EXSYS + EX-41092 Dual 16950 Serial adapter + * Add support for '8-port RS-232 MIC-3620 from advantech' + * mm: fix error case in mlock downgrade reversion + * elf core dump: fix get_user use + * ACPI: video: Fix reversed brightness behavior on ThinkPad SL series + * ipw2200: fix scanning while associated + * XFS: set b_error from bio error in xfs_buf_bio_end_io + * Revert USB: option: add Pantech cards + * USB: option: New mobile broadband modems to be supported + * USB: new id for ti_usb_3410_5052 driver + * USB: two more usb ids for ti_usb_3410_5052 + * USB: usb-storage: add Pentax to the bad-vendor list + * sata_via: Add VT8261 support + * nbd: do not allow two clients at the same time + * sctp: Fix another socket race during accept/peeloff + * Linux 2.6.28.5 + + -- Tim Gardner Mon, 09 Feb 2009 16:11:28 -0700 + +linux (2.6.28-7.20) jaunty; urgency=low + + [ Tim Gardner ] + + * SAUCE: Input: atkbd - Samsung NC10 key repeat fix + + [ Upstream Kernel Changes ] + + * Manually revert "mlock: downgrade mmap sem while populating mlocked + regions" + * xen: make sysfs files behave as their names suggest + * sata_mv: fix 8-port timeouts on 508x/6081 chips + * m68knommu: set NO_DMA + * PCI/MSI: bugfix/utilize for msi_capability_init() + * x86: use early clobbers in usercopy*.c + * netfilter: ctnetlink: fix scheduling while atomic + * orinoco: move kmalloc(..., GFP_KERNEL) outside spinlock in + orinoco_ioctl_set_genie + * fbdev/atyfb: Fix DSP config on some PowerMacs & PowerBooks + * kmalloc: return NULL instead of link failure + * sata_nv: rename nv_nf2_hardreset() + * sata_nv: fix MCP5x reset + * sata_nv: ck804 has borked hardreset too + * Fix memory corruption in console selection + * Add enable_ms to jsm driver + * nfsd: only set file_lock.fl_lmops in nfsd4_lockt if a stateowner is + found + * nfsd: Ensure nfsv4 calls the underlying filesystem on LOCKT + * iwlwifi: fix rs_get_rate WARN_ON() + * p54: fix lm87 checksum endianness + * p54: fix p54_read_eeprom to cope with tx_hdr_len + * p54usb: rewriting rx/tx routines to make use of usb_anchor's facilities + * minstrel: fix warning if lowest supported rate index is not 0 + * PCI: irq and pci_ids patch for Intel Tigerpoint DeviceIDs + * cpuidle: Add decaying history logic to menu idle predictor + * ACPI: Avoid array address overflow when _CST MWAIT hint bits are set + * video: always update the brightness when poking "brightness" + * Newly inserted battery might differ from one just removed, so update of + battery info fields is required. + * ACPI: Do not modify SCI_EN directly + * dlm: initialize file_lock struct in GETLK before copying conflicting + lock + * sata_mv: Fix chip type for Hightpoint RocketRaid 1740/1742 + * ACPICA: Allow multiple backslash prefix in namepaths + * Linux 2.6.28.4 + + -- Tim Gardner Sat, 07 Feb 2009 18:53:42 -0700 + +linux (2.6.28-7.19) jaunty; urgency=low + + * Fix missing modules FTBS + + -- Tim Gardner Thu, 05 Feb 2009 15:28:15 -0700 + +linux (2.6.28-7.18) jaunty; urgency=low + + [ Alok Kataria ] + + * SAUCE: (drop after 2.6.29) x86: add a synthetic TSC_RELIABLE feature + bit + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: add X86_FEATURE_HYPERVISOR feature bit + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: Hypervisor detection and get tsc_freq + from hypervisor + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: Add a synthetic TSC_RELIABLE feature + bit. + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: Skip verification by the watchdog for + TSC clocksource. + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: VMware: Fix vmware_get_tsc code + - LP: #319945 + * SAUCE: (drop after 2.6.29) x86: vmware: look for DMI string in the + product serial key + - LP: #319945 + + [ Andy Whitcroft ] + + * SAUCE: toshiba_acpi -- pull in current -dev version of driver + - LP: #269831 + * SAUCE: toshiba_acpi -- add acpi hotkey kernel thread + - LP: #269831 + * move toshiba laptops back from tlsup to toshiba_acpi + - LP: #269831 + + [ Aneesh Kumar K.V ] + + * SAUCE: (revert before 2.6.28.y update) ext4: Fix the delalloc + writepages to allocate blocks at the right offset. + * SAUCE: (revert before 2.6.28.y update) ext4: avoid ext4_error when + mounting a fs with a single bg + * SAUCE: (revert before 2.6.28.y update) ext4: Don't overwrite + allocation_context ac_status + * SAUCE: (revert before 2.6.28.y update) ext4: Add blocks added during + resize to bitmap + * SAUCE: (revert before 2.6.28.y update) ext4: Use + EXT4_GROUP_INFO_NEED_INIT_BIT during resize + * SAUCE: (revert before 2.6.28.y update) ext4: cleanup mballoc header + files + * SAUCE: (revert before 2.6.28.y update) ext4: don't use blocks freed but + not yet committed in buddy cache init + * SAUCE: (revert before 2.6.28.y update) ext4: Fix race between + read_block_bitmap() and mark_diskspace_used() + * SAUCE: (revert before 2.6.28.y update) ext4: Fix the race between + read_inode_bitmap() and ext4_new_inode() + * SAUCE: (revert before 2.6.28.y update) ext4: Use new buffer_head flag + to check uninit group bitmaps initialization + * SAUCE: (revert before 2.6.28.y update) ext4: mark the blocks/inode + bitmap beyond end of group as used + * SAUCE: (revert before 2.6.28.y update) ext4: Don't allow new groups to + be added during block allocation + * SAUCE: (revert before 2.6.28.y update) ext4: Init the complete page + while building buddy cache + * SAUCE: (revert before 2.6.28.y update) ext4: Fix s_dirty_blocks_counter + if block allocation failed with nodelalloc + + [ Hannes Eder ] + + * SAUCE: (drop after 2.6.29) x86: vmware - fix sparse warnings + - LP: #319945 + + [ Luke Yelavich ] + + * hid modules have hyphens instead of underscores in their names + + [ Mark Fasheh ] + + * SAUCE: (revert before 2.6.28.y update) jbd2: Add BH_JBDPrivateStart + + [ Theodore Ts'o ] + + * SAUCE: (revert before 2.6.28.y update) ext4: Add support for non-native + signed/unsigned htree hash algorithms + * SAUCE: (revert before 2.6.28.y update) ext4: tone down + ext4_da_writepages warnings + * SAUCE: (revert before 2.6.28.y update) jbd2: Add barrier not supported + test to journal_wait_on_commit_record + * SAUCE: (revert before 2.6.28.y update) ext4: Add sanity checks for the + superblock before mounting the filesystem + * SAUCE: (revert before 2.6.28.y update) ext4: only use i_size_high for + regular files + * SAUCE: (revert before 2.6.28.y update) ext4: Add sanity check to + make_indexed_dir + * SAUCE: (revert before 2.6.28.y update) jbd2: On a __journal_expect() + assertion failure printk "JBD2", not "EXT3-fs" + * SAUCE: (revert before 2.6.28.y update) ext4: Initialize the new group + descriptor when resizing the filesystem + + [ Tyler Hicks ] + + * SAUCE: (drop after 2.6.28) [eCryptfs] Regression in unencrypted + filename symlinks + - LP: #322532 + + [ Upstream Kernel Changes ] + + * Input: atkbd - broaden the Dell DMI signatures + - LP: #261721 + * ti_usb_3410_5052: support alternate firmware + * ath5k: fix mesh point operation + * mac80211: decrement ref count to netdev after launching mesh discovery + * inotify: clean up inotify_read and fix locking problems + * fuse: destroy bdi on umount + * fuse: fix missing fput on error + * fuse: fix NULL deref in fuse_file_alloc() + * x86, mm: fix pte_free() + * klist.c: bit 0 in pointer can't be used as flag + * sysfs: fix problems with binary files + * x86: fix page attribute corruption with cpa() + * USB: fix toggle mismatch in disable_endpoint paths + * sound: virtuoso: enable UART on Xonar HDAV1.3 + * USB: usbmon: Implement compat_ioctl + * USB: fix char-device disconnect handling + * USB: storage: add unusual devs entry + * alpha: nautilus - fix compile failure with gcc-4.3 + * alpha: fix vmalloc breakage + * resources: skip sanity check of busy resources + * rtl8187: Add termination packet to prevent stall + * it821x: Add ultra_mask quirk for Vortex86SX + * libata: pata_via: support VX855, future chips whose IDE controller use + 0x0571 + * serial_8250: support for Sealevel Systems Model 7803 COMM+8 + * drm: stash AGP include under the do-we-have-AGP ifdef + * Fix OOPS in mmap_region() when merging adjacent VM_LOCKED file segments + * bnx2x: Block nvram access when the device is inactive + * ext3: Add sanity check to make_indexed_dir + * rtl8187: Fix error in setting OFDM power settings for RTL8187L + * epoll: drop max_user_instances and rely only on max_user_watches + * gpiolib: fix request related issue + * sgi-xpc: Remove NULL pointer dereference. + * sgi-xpc: ensure flags are updated before bte_copy + * include/linux: Add bsg.h to the Kernel exported headers + * ALSA: hda - Fix PCM reference NID for STAC/IDT analog outputs + * ALSA: hda - add another MacBook Pro 4, 1 subsystem ID + * ALSA: hda - Add quirk for HP DV6700 laptop + * crypto: authenc - Fix zero-length IV crash + * crypto: ccm - Fix handling of null assoc data + * x86, pat: fix reserve_memtype() for legacy 1MB range + * x86, pat: fix PTE corruption issue while mapping RAM using /dev/mem + * PCI hotplug: fix lock imbalance in pciehp + * dmaengine: fix dependency chaining + * NET: net_namespace, fix lock imbalance + * relay: fix lock imbalance in relay_late_setup_files + * Linux 2.6.28.3 + * ALSA: Enable SPDIF output on ALC655 + * ALSA: hda - Add ASUS V1Sn support + * ALSA: hda - support detecting HD Audio devices with PCI class code + * ALSA: hda: alc883 model for ASUS P5Q-EM boards + * ALSA: hda - Add quirk for MSI 7260 mobo + * ALSA: hda - Add quirk for Sony VAIO VGN-SR19XN + * ALSA: oxygen: add Claro halo support + * ALSA: hda - Add a new function to seek for a codec ID + * ALSA: patch_sigmatel: Add missing Gateway entries and autodetection + * ALSA: hda - More fixes on Gateway entries + * ALSA: hda - Add MCP67 HDMI support + * ALSA: hda - fix name for ALC1200 + * LSA: hda - Add HP Acacia detection + * ALSA: hda - Add quirk for HP 2230s + * ALSA: hda - Add quirk for Dell Inspiron Mini9 + * ALSA: hda - add support for Intel DX58SO board + * ALSA: hda - Fix silent headphone output on Panasonic CF-74 + * ALSA: USB quirk for Logitech Quickcam Pro 9000 name + * ALSA: hda - add quirks for some 82801H variants to use ALC883_MITAC + + [ Yasunori Goto ] + + * SAUCE: (revert before 2.6.28.y update) ext4: Widen type of + ext4_sb_info.s_mb_maxs[] + + -- Tim Gardner Mon, 02 Feb 2009 23:07:13 -0700 + +linux (2.6.28-6.17) jaunty; urgency=low + + [ Amit Kucheria ] + + * Updating configs: ARMEL/versatile + + -- Amit Kucheria Fri, 30 Jan 2009 13:36:59 +0200 + +linux (2.6.28-6.16) jaunty; urgency=low + + [ Luke Yelavich ] + + * Add hid quirks to input-modules udeb + + [ Tim Gardner ] + + * Revert "[arm] Fix kexec on ARM by properly calling the relocation + function". This patch was deemed 'bogus' by Russell King on the + ARM mailing list. + + [ Upstream Kernel Changes ] + + * PCI: keep ASPM link state consistent throughout PCIe hierarchy + * security: introduce missing kfree + * rt2x00: add USB ID for the Linksys WUSB200. + * p54usb: Add USB ID for Thomson Speedtouch 121g + * lib/idr.c: use kmem_cache_zalloc() for the idr_layer cache + * sgi-xp: eliminate false detection of no heartbeat + * sched: fix update_min_vruntime + * IA64: Turn on CONFIG_HAVE_UNSTABLE_CLOCK + * sound: virtuoso: do not overwrite EEPROM on Xonar D2/D2X + * ALSA: hda - Add quirk for another HP dv5 + * ALSA: hda - Fix HP dv5 mic input + * ALSA: hda - Don't reset HP pinctl in patch_sigmatel.c + * ALSA: hda - make laptop-eapd model back for AD1986A + * drivers/net/irda/irda-usb.c: fix buffer overflow + * usb-storage: add last-sector hacks + * usb-storage: set CAPACITY_HEURISTICS flag for bad vendors + * pkt_sched: sch_htb: Fix deadlock in hrtimers triggered by HTB + * ipv6: Fix fib6_dump_table walker leak + * sctp: Avoid memory overflow while FWD-TSN chunk is received with bad + stream ID + * pkt_sched: cls_u32: Fix locking in u32_change() + * r6040: fix wrong logic in mdio code + * r6040: save and restore MIER correctly in the interrupt routine + * r6040: bump release number to 0.19 + * tcp: don't mask EOF and socket errors on nonblocking splice receive + * p54usb: fix traffic stalls / packet drop + * netfilter: x_tables: fix match/target revision lookup + * netfilter: ebtables: fix inversion in match code + * netfilter: nf_conntrack: fix ICMP/ICMPv6 timeout sysctls on big-endian + * dell_rbu: use scnprintf() instead of less secure sprintf() + * powerpc: is_hugepage_only_range() must account for both 4kB and 64kB + slices + * hwmon: (abituguru3) Fix CONFIG_DMI=n fallback to probe + * mm: write_cache_pages cyclic fix + * mm: write_cache_pages early loop termination + * mm: write_cache_pages writepage error fix + * mm: write_cache_pages integrity fix + * mm: write_cache_pages cleanups + * mm: write_cache_pages optimise page cleaning + * mm: write_cache_pages terminate quickly + * mm: write_cache_pages more terminate quickly + * mm: do_sync_mapping_range integrity fix + * mm: direct IO starvation improvement + * fs: remove WB_SYNC_HOLD + * fs: sync_sb_inodes fix + * fs: sys_sync fix + * Linux 2.6.28.2 + + -- Tim Gardner Sun, 25 Jan 2009 13:36:16 -0700 + +linux (2.6.28-5.15) jaunty; urgency=low + + [ Tim Gardner ] + + * Revert "Enabled CONFIG_PID_NS=y for i386/amd64" + Somehow this commit also reverted the 7 prior commits (which is bad). + * Enabled CONFIG_PID_NS=y for i386/amd64 (version 2) + + -- Tim Gardner Thu, 22 Jan 2009 13:48:34 -0700 + +linux (2.6.28-5.14) jaunty; urgency=low + + [ Ben Collins ] + + * lirc_gpio: Forward ported to current kernel (jaunty) + * configs: Enable LIRC_GPIO on 64-bit/32-bit x86 + - LP: #298791 + + [ Jeff Layton ] + + * SAUCE: cifs: make sure we allocate enough storage for socket address + - LP: #318565 + + [ Tim Gardner ] + + * check-abi: Return success when ABI skip is requested and no ABI files exist. + This ought to fix the armel FTBS. + + -- Tim Gardner Thu, 22 Jan 2009 06:42:49 -0700 + +linux (2.6.28-5.13) jaunty; urgency=low + + [ Andy Whitcroft ] + + * Revert "SAUCE: don't use buggy _BCL/_BCM/_BQC for backlight control" + + [ Tim Gardner ] + + * Fix udeb generation breakage caused by the previous armel versatile + flavour config update. + + -- Tim Gardner Wed, 21 Jan 2009 12:38:35 -0700 + +linux (2.6.28-5.12) jaunty; urgency=low + + [ Ante ] + + * Update drbd to 8.3.0 + + [ Dave Airlie ] + + * i915/drm: provide compat defines for userspace for certain struct + + [ Eric Anholt ] + + * drm/i915: Don't double-unpin buffers if we take a signal in + * drm/i915: Don't complain when interrupted while pinning in execbuffers. + * drm/i915: Don't allow objects to get bound while VT switched. + + [ Jani Monoses ] + + * Fix webcam having USB ID 0ac8:303b + - LP: #292086 + + [ Jesse Barnes ] + + * drm/i915: set vblank enabled flag correctly across IRQ + * drm/i915: don't enable vblanks on disabled pipes + + [ Michael Casadevall ] + + * [arm] Fix kexec on ARM by properly calling the relocation function + + [ Tim Gardner ] + + * Enabled CONFIG_PID_NS=y for i386/amd64 + * SAUCE: Increase ATA_TMOUT_PMP_SRST_WAIT to 5 seconds. + - LP: #318978 + * Update armel versatile config + - LP: #314789 + * Enabled CONFIG_RT2860=m for i386/amd64 + * Enabled CONFIG_RT2870=m for i386/amd64 + + [ Upstream Kernel Changes ] + + * Input: atkbd - add keyboard quirk for HP Pavilion ZV6100 laptop + - LP: #291878 + * ALSA: hda - Add quirk for another HP dv7 + * ALSA: hda - Add quirk for HP6730B laptop + * ALSA: caiaq - Fix Oops with MIDI + * ALSA: hda - Fix typos for AD1882 codecs + * x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies + * x86: default to SWIOTLB=y on x86_64 + * CIFS: make sure that DFS pathnames are properly formed + * ring-buffer: prevent false positive warning + * ring-buffer: fix dangling commit race + * iwlwifi: use GFP_KERNEL to allocate Rx SKB memory + * tx493[89]ide: Fix length for __ide_flush_dcache_range + * tx4939ide: Do not use zero count PRD entry + * SCSI: eata: fix the data buffer accessors conversion regression + * USB: emi26: fix oops on load + * x86, UV: remove erroneous BAU initialization + * x86: fix incorrect __read_mostly on _boot_cpu_pda + * vmalloc.c: fix flushing in vmap_page_range() + * fs: symlink write_begin allocation context fix + * cgroups: fix a race between cgroup_clone and umount + * dm raid1: fix error count + * dm log: fix dm_io_client leak on error paths + * minix: fix add link's wrong position calculation + * md: fix bitmap-on-external-file bug. + * sched_clock: prevent scd->clock from moving backwards, take #2 + * devices cgroup: allow mkfifo + * SCSI: aha152x_cs: Fix regression that keeps driver from using shared + interrupts + * ioat: fix self test for multi-channel case + * USB: isp1760: use a specific PLX bridge instead of any bdridge + * USB: isp1760: Fix probe in PCI glue code + * USB: unusual_devs.h additions for Pentax K10D + * inotify: fix type errors in interfaces + * Move compat system call declarations to compat header file + * Convert all system calls to return a long + * Rename old_readdir to sys_old_readdir + * Remove __attribute__((weak)) from sys_pipe/sys_pipe2 + * Make sys_pselect7 static + * Make sys_syslog a conditional system call + * System call wrapper infrastructure + * powerpc: Enable syscall wrappers for 64-bit + * s390: enable system call wrappers + * System call wrapper special cases + * System call wrappers part 01 + * System call wrappers part 02 + * System call wrappers part 03 + * System call wrappers part 04 + * System call wrappers part 05 + * System call wrappers part 06 + * System call wrappers part 07 + * System call wrappers part 08 + * System call wrappers part 09 + * System call wrappers part 10 + * System call wrappers part 11 + * System call wrappers part 12 + * System call wrappers part 13 + * System call wrappers part 14 + * System call wrappers part 15 + * System call wrappers part 16 + * System call wrappers part 17 + * System call wrappers part 18 + * System call wrappers part 19 + * System call wrappers part 20 + * System call wrappers part 21 + * System call wrappers part 22 + * System call wrappers part 23 + * System call wrappers part 24 + * System call wrappers part 25 + * System call wrappers part 26 + * System call wrappers part 27 + * System call wrappers part 28 + * System call wrappers part 29 + * System call wrappers part 30 + * System call wrappers part 31 + * System call wrappers part 32 + * System call wrappers part 33 + * s390 specific system call wrappers + * x86: fix RIP printout in early_idt_handler + * Fix timeouts in sys_pselect7 + * USB: another unusual_devs entry for another bad Argosy storage device + * USB: storage: extend unusual range for 067b:3507 + * USB: storage: recognizing and enabling Nokia 5200 cell phoes + * HID: fix error condition propagation in hid-sony driver + * fix switch_names() breakage in short-to-short case + * nfs: remove redundant tests on reading new pages + * eCryptfs: check readlink result was not an error before using it + * mvsas: increase port type detection delay to suit Seagate's 10k6 drive ST3450856SS 0003 + * x86: avoid theoretical vmalloc fault loop + * ath9k: enable RXing of beacons on STA/IBSS + * mm lockless pagecache barrier fix + * powerpc: Disable Collaborative Memory Manager for kdump + * ibmvfc: Delay NPIV login retry and add retries + * ibmvfc: Improve async event handling + * getrusage: RUSAGE_THREAD should return ru_utime and ru_stime + * ath5k: ignore the return value of ath5k_hw_noise_floor_calibration + * mm: fix assertion + * XFS: truncate readdir offsets to signed 32 bit values + * Linux 2.6.28.1 + * eCryptfs: Filename Encryption: Tag 70 packets + * eCryptfs: Filename Encryption: Header updates + * eCryptfs: Filename Encryption: Encoding and encryption functions + * eCryptfs: Filename Encryption: filldir, lookup, and readlink + * eCryptfs: Filename Encryption: mount option + * eCryptfs: Replace %Z with %z + * eCryptfs: Fix data types (int/size_t) + * eCryptfs: kerneldoc for ecryptfs_parse_tag_70_packet() + * eCryptfs: Clean up ecryptfs_decode_from_filename() + * fs/ecryptfs/inode.c: cleanup kerneldoc + * staging-p80211: Kill directly reference of netdev->priv + * staging-slicoss: Kill directly reference of netdev->priv + * staging-winbond: Kill directly reference of netdev->priv + * Staging: go7007: fixes due to video_usercopy api change + * Staging: go7007: fixes due v4l2_file_operations api change + * staging: correct dubious use of !x & y + * Staging: w35und: make wb35_probe() and wb35_disconnect() funtions static + * Staging: w35und: remove unused wb35_open() and wb35_close() functions + * Staging: w35und: use msleep() and udelay() + * Staging: w35und: remove the no-op pa_stall_execution macro + * Staging: w35und: purb typedef removal + * Staging: w35und: reg queue struct typedef removal + * Staging: w35und: wb35reg struct typedef removal + * Staging: w35und: padapter struct typedef removal + * Staging: w35und: merge wblinux struct to adapter + * Staging: w35und: wb35_probe() cleanup + * Staging: w35und: remove usb_submit_urb wrapper function + * Staging: w35und: remove usb_alloc_urb wrapper function + * w35und: remove dead code from wbusb_f.h + * Staging: w35und: remove true/false boolean macros + * Staging: w35und: OS_MEMORY_ALLOC wrapper removal + * Staging: w35und: usb_put_dev() is missing from wb35_disconnect() + * Staging: w35und: remove macro magic from MLME_GetNextPacket() + * Staging: w35und: plug memory leak in wbsoft_tx() + * Staging: w35und: move supported band initialization out of wb35_probe() + * Staging: w35und: remove timer wrappers + * Staging: w35und: remove atomic op wrappers + * Staging: w35und: remove memcpy/memcmp wrappers + * Staging: w35und: remove abs() and BIT() macros + * Staging: w35und: remove unused macros from common.h + * Staging: w35und: remove unused link status code + * Staging: w35und: #include cleanup + * Staging: w35und: remove some dead code + * Staging: w35und: move source files to one directory + * Staging: w35und: move struct wbsoft_priv to core.h and use it + * Staging: w35und: remove ->adapter from struct _HW_DATA_T + * Staging: w35und: clean up adapter.h a bit + * Staging: w35und: merge struct wb35_adapter to struct wbsoft_priv + * Staging: w35und: remove global struct ieee80211_hw + * Staging: w35und: inline DRIVER_AUTHOR and DRIVER_DESC macros + * Staging: w35und: clean up wblinux.c a bit + * Staging: w35und: remove unused ->ShutDowned member from struct + LOCAL_PARA + * Staging: w35und: move global wbsoft_enabled to struct wbsoft_priv + * Staging: w35und: move packet_came() to wb35rx.c + * Staging: w35und: remove ->skb_array from struct wbsoft_priv + * Staging: w35und: remove ->shutdown from struct wbsoft_priv + * Staging: w35und: make functions local to mds.c static + * Staging: w35und: make functions local to mlmetxrx.c static + * Staging: w35und: remove dead code from mto.c + * Staging: w35und: make functions local to wb35rx.c static + * Staging: w35und: make functions local to wb35tx.c static + * Staging: w35und: remove dead code from wbhal.c + * Staging: w35und: remove rxisr.c as dead code + * Staging: w35und: fix Kconfig + * Staging: w35und: fix config build warnings + * Staging: wlan-ng: Remove PCI/PLX/PCMCIA files. + * Staging: wlan-ng: Update Help text to mention prism3 devices. + * Staging: wlan-ng: Delete PCI/PLX/PCMCIA-specific code. + * Staging: wlan-ng: Make wlan-ng use WEXT mode by default. + * Staging: wlan-ng: Eliminate more <2.6 kernel support. + * Staging: wlan-ng: Eliminate all backwards-compatibility for <2.6.13 kernels. + * Staging: wlan-ng: Eliminate a boatload of tertiaryAP-only code. + * Staging: wlan-ng: Remove AP-only code from MLME functions. + * Staging: wlan-ng: Get rid of the MTU tests in the rx conversion path. + * Staging: wlan-ng: Eliminate one more rx mtu test. + * Staging: wlan-ng: Eliminate local 'version.h' + * Staging: wlan-ng: Eliminate usage of procfs. + * Staging: wlan-ng: Use standard kernel integer (u32/s32/etc) types. + * Staging: wlan-ng: Eliminate all backwards-compatible kernel code. + * Staging: wlan-ng: Wireless Extension support is mandatory. + * Staging: wlan-ng: use WIRELESS_EXT, not CONFIG_WIRELESS_EXT + * Staging: wlan-ng: Delete a large pile of now-unused code. + * Staging: wlan-ng: Delete a pile of unused mibs. And fix WEXT SET_TXPOWER. + * Staging: wlan-ng: Consolidate wlan-ng into a single module. + * Staging: wlan-ng: Purge all MIBs not used internally. + * Staging: wlan-ng: p80211netdev.c fix netdev alloc to prevent oops on device start + * Staging: wlan-ng: prism2_usb.c always enable the card in probe_usb + * Staging: wlan-ng: hfa384x_usb.c use newest version of 384x_drvr_start + * Staging: wlan-ng: p80211wext.c add latest changes & remove extra nulls from wext_handlers + * Staging: wlan-ng: p80211wext don't set default key id twice + * Staging: wlan-ng: hfa384x_usbin_callback: check for hardware removed + * Staging: wlan-ng: p80211conv.c copy code from wlan-ng-devel branch to not drop packets + * Staging: wlan-ng: remove unused #include + * Staging: wlan-ng: p80211wext.c: use ARRAY_SIZE + * Staging: wlan-ng: fix compiler warnings + * Staging: wlan-ng: skb_p80211_to_ether() - payload_length is unsigned, check before subtraction + * Staging: at76_usb: update drivers/staging/at76_usb w/ mac80211 port + * Staging: at76_usb: fix build breakage + * Staging: at76_usb: remove compiler warnings + * Staging: at76_usb: fix up all remaining checkpatch.pl warnings + * Staging: at76_usb: cleanup dma on stack issues + * Staging: poch: Block size bug fix + * Staging: poch: Update TODO list + * Staging: poch: Correct pages from bytes. + * Staging: poch: minor fixes + * Staging: poch: Fix build warnings + * Staging: poch: Rx control register init + * Staging: poch: Fix user space protocol syncing + * Staging: poch: Fine grained locking + * Staging: sxg: remove typedefs + * Staging: sxg: break the build in a cleaner way when !x86 + * Staging: sxg: update README + * staging: struct device - replace bus_id with dev_name(), dev_set_name() + * Staging: echo: remove typedefs + * Staging: echo: Lindent drivers/staging/echo + * Staging: go7007: saa7134 updates + * Staging: go7007: add sensoray 2250/2251 support + * Staging: go7007: Convert driver to use video_ioctl2 + * Staging: go7007: annotate code pointers + * Staging: go7007: fix minor build warnings + * Staging: go7007: small cleanup + * Staging: go7007: add some more v4l2 ioctls + * Staging: et131x: Cleanup et131x_debug.h defines + * Staging: et131x: fix build failure + * Staging: et131x: remove unused variable in et1310_tx.c + * Staging: usbip: cleanup kerneldoc + * Staging: slicoss: use kzalloc + * Staging: slicoss: use correct type for memory allcations + * Staging: slicoss: use request_firmware + * Staging: add agnx wireless driver + * Staging: agnx: fix build errors due to ssid removal + * Staging: agnx: fix build errors due to rate control API changes + * Staging: agnx: fix build warnings + * Staging: add otus Atheros wireless network driver + * Staging: otus: fix netdev->priv usage + * Staging: otus: fix name clash + * Staging: otus: fix urb callback function type + * Staging: otus: remove dependence on kernel version + * Staging: add rt2860 wireless driver + * Staging: rt2860: disable root hack for reading files + * Staging: rt2860: fix up netdev->priv usage + * Staging: rt2860: use standard bit-reverse function + * Staging: rt2860: Fix minor compiler warnings + * Staging: rt2860: enable WPA_SUPPLICANT support + * Staging: Add ServerEngines benet 10Gb ethernet driver + * Staging: benet: fix netif api breakage + * Staging: benet: fix up netdev->priv change + * Staging: benet: build is broken unless CONFIG_NETPOLL is enabled + * Staging: benet: patch to remove subdirectories + * Staging: benet: fix build errors when CONFIG_NETPOLL is off + * Staging: benet: fix build error. + * Staging: benet: patch to use offsetof() instead of AMAP_BYTE_OFFSET() + * Staging: benet: fix problems reported by checkpatch + * Staging: benet: cleanup a check while posting rx buffers + * Staging: add comedi core + * Staging: comedi: fix up a lot of checkpatch.pl warnings + * Staging: comedi: fix checkpatch.pl errors in comedi_fops.c + * Staging: comedi: fix build error in comedilib.h + * Staging: comedi: add kcomedilib to the tree + * Staging: comedi: set up infrastructure for individual drivers + * Staging: comedi: add local copy of interrupt.h + * Staging: comedi: add pci and usb wrapper header files + * Staging: comedi: comedi driver common function module + * Staging: comedi: add mite comedi pci driver + * Staging: comedi: add usb usbdux driver + * Staging: comedi: add usb usbduxfast driver + * Staging: comedi: add usb dt9812 driver + * Staging: comedi: add comedi_bond driver + * Staging: comedi: add comedi_test driver + * Staging: comedi: add comedi_parport driver + * Staging: comedi: dt9812: fix up a lot of coding style issues + * Staging: comedi: dt9812: remove dt9812.h + * Staging: comedi: dt9812: remove typedefs + * Staging: comedi: dt9812: fix sparse warnings + * Staging: comedi: usbdux: remove kernel version checks + * Staging: comedi: usbdux: code style cleanups + * Staging: comedi: usbdux: remove // comments + * Staging: comedi: usbdux: fix up printk calls + * Staging: comedi: usbdux: remove checkpatch.pl warnings + * Staging: comedi: usbdux: remove typedef + * Staging: comedi: usbdux: remove comedi usb wrappers + * Staging: comedi: usbduxfast: remove comedi usb wrappers + * Staging: comedi: dt9812: remove #ifdef that is not needed + * Staging: comedi: remove usb wrappers + * Staging: comedi: remove PCI wrappers + * Staging: comedi: add icp_multi driver + * Staging: comedi: add me4000 driver + * Staging: comedi: fix checkpatch.pl issues in comedi_bond.c + * Staging: comedi: fix checkpatch.pl issues in comedi_fc.c + * Staging: comedi: remove typedefs from comedi_bond.c + * Staging: comedi: fix sparse issues in comedi_bond.c + * Staging: comedi: fix checkpatch.pl issues in comedi_test.c + * Staging: comedi: fix sparse issues in comedi_test.c + * Staging: comedi: remove typedefs from comedi_test.c + * Staging: comedi: fix comedi_parport.c checkpatch.pl issues. + * Staging: comedi: fix comedi_fc.h checkpatch.pl issues. + * Staging: comedi: fix comedi_pci.h checkpatch.pl issues. + * Staging: comedi: comedi_pci.h: remove unneeded wrapper + * Staging: comedi: comedi_pci.h: remove comedi_pci_enable_no_regions + * Staging: comedi: comedi_pci.h: remove comedi_pci_disable_no_regions + * Staging: comedi: add s626 driver + * Staging: comedi: add rtd520 driver + * Staging: comedi: add me_daq driver + * Staging: comedi: me_daq: fix checkpatch.pl issues + * Staging: comedi: me_daq: remove typedefs + * Staging: comedi: me_daq: fix sparse issues + * Staging: comedi: fix checkpatch.pl warning in interrupt.h + * Staging: comedi: fix build if CONFIG_PROC_FS is not set + * Staging: add asus_oled driver + * Staging: asus_oled: fix build dependancy + * Staging: Add the Meilhaus ME-IDS driver package + * Staging: meilhaus: fix __symbol_get problems + * Staging: add lcd-panel driver + * Staging: panel: major checkpatch cleanup + * Staging: panel: remove ifdefs and code for pre-2.6 kernels + * Staging: panel: remove support for smartcards + * Staging: add Driver for Altera PCI Express Chaining DMA reference design + * Staging: add rtl8187se driver + * Staging: rtl8187se: remove unneeded files + * Staging: rtl8187se: make the built module be the proper name + * Staging: rtl8187se: remove duplicate pci ids + * Staging: me4000: switch to list_for_each*() + * Staging: usbip: switch to list_for_each_entry() + * Staging: add princeton instruments usb camera driver + * Staging: add mimio xi driver + * Staging: add rt2870 wireless driver + * Staging: rt2870: disable root hack for reading files + * Staging: rt2870: fix up netdev->priv usage + * Staging: add frontier tranzport and alphatrack drivers + * Staging: frontier: remove unused alphatrack_sysfs.c file + * Staging: frontier: fix compiler warnings + * Staging: add epl stack + * Staging: epl: run Lindent on all kernel/*.h files + * Staging: epl: run Lindent on all user/*.h files + * Staging: epl: run Lindent on *.h files + * Staging: epl: run Lindent on *.c files + * Staging: epl: hr timers all run in hard irq context now + * Staging: epl: fix netdev->priv b0rkage + * Staging: add android framework + * Staging: android: add binder driver + * Staging: android: binder: Fix gcc warnings about improper format specifiers for size_t in printk + * staging: android: binder: Fix use of euid + * Staging: android: add logging driver + * Staging: android: add ram_console driver + * Staging: android: add timed_gpio driver + * Staging: android: timed_gpio: Rename android_timed_gpio to timed_gpio + * Staging: android: remove dummy android.c driver + * Staging: android: add lowmemorykiller driver + * Staging: android: binder: fix build errors + * staging: __FUNCTION__ is gcc-specific, use __func__ + * V4L/DVB (10176a): Switch remaining clear_user_page users over to + clear_user_highpage + + [ Zhenyu Wang ] + + * agp/intel: add support for G41 chipset + + -- Tim Gardner Sun, 18 Jan 2009 20:22:54 -0700 + +linux (2.6.28-4.11) jaunty; urgency=low + + [ Mario Limonciello ] + + * SAUCE: Enable HDMI audio codec on Studio XPS 1340 + - LP: #309508 + + [ Tim Gardner ] + + * Fix armel d-i FTBSs + + [ Upstream Kernel Changes ] + + * USB: re-enable interface after driver unbinds + + -- Tim Gardner Tue, 13 Jan 2009 16:33:08 -0700 + +linux (2.6.28-4.10) jaunty; urgency=low + + [ Andy Whitcroft ] + + * update kernel bootloader recommends: to prefer grub + - LP: #314004 + * SAUCE: don't use buggy _BCL/_BCM/_BQC for backlight control + - LP: #311716 + * SAUCE: test-suspend -- add the suspend test scripts + - LP: #316419 + + [ Colin Watson ] + + * Enable udebs for armel + + [ Tim Gardner ] + + * SAUCE: Dell laptop digital mic does not work, PCI 1028:0271 + - LP: #309508 + * Enable CIFS_XATTR=y and CONFIG_CIFS_POSIX=y + - LP: #220658 + + -- Tim Gardner Thu, 08 Jan 2009 10:38:22 -0700 + +linux (2.6.28-4.9) jaunty; urgency=low + + [ Tim Gardner ] + + * Restore DM_CRYPT, AES, ECB, and CBC as modules. This fixes + some installer issues with encrypted /home and Private directories. + * Take one more stab at building armel without module or ABI errors. + + -- Tim Gardner Tue, 06 Jan 2009 08:38:23 -0700 + +linux (2.6.28-4.8) jaunty; urgency=low + + * Fix i386/amd64 FTBS by ignoring all module and ABI changes, + not something you would normally do, but I'm sure the ABI + has not changed. This will probably also allow the ARM builds to complete. + + -- Tim Gardner Mon, 05 Jan 2009 14:42:58 -0700 + +linux (2.6.28-4.7) jaunty; urgency=low + + [ Tim Gardner ] + + * Enable CONFIG_ATH5K=m for i386/amd64 + - LP: #306719 + * Build all i386/amd64 AGP/DRM components as modules. + - LP: #312721 + * git commands are now installed outside the default $PATH + Use 'git CMD' instead of 'git-CMD'. + * Build in most PATA/SATA drivers. This should allow most i386/amd64 systems to boot + without an initramfs, though some support work is still required in initramfs-tools + and grub. + - LP: #311730 + + -- Tim Gardner Fri, 02 Jan 2009 07:33:09 -0700 + +linux (2.6.28-4.6) jaunty; urgency=low + + [ Tim Gardner ] + + * Enable CONFIG_X86_E_POWERSAVER=m for i386 generic + - LP: #237405 + * Build i386 AGP drivers as modules + - LP: #312721 + * Build i386 DRM as a module + - LP: #312721 + + [ Upstream Kernel Changes ] + + * drm/i915: Add missing userland definitions for gem init/execbuffer. + - LP: #308387 + + -- Tim Gardner Mon, 29 Dec 2008 09:16:47 -0700 + +linux (2.6.28-4.5) jaunty; urgency=low + + [ Andy Whitcroft ] + + * clean up module dependancy information on package removal/purge + - LP: #300773 + + [ Tim Gardner ] + + * Update iscsitarget to 0.4.17 + * Build in ext{234} + * Build in Crypto modules AES, CBC, ECB + * Build in ACPI AC,BATTERY,BUTTON,FAN,PCI_SLOT,PROCESSOR,SBS,THERMAL,WMI + * Build in AGP intel,via,sis,ali,amd,amd64,efficeon,nvidia,sworks + * Build in ata,dev_dm,dev_loop,dev_md,dev_sd,dev_sr + * Build in BT l2cap,rfcomm,sco + * Reduce CONFIG_LEGACY_PTY_COUNT to 0 + * Build in CDROM_PKTCDVD and CHR_DEV_SG + * Build in CPU_FREQ + GOV_CONSERVATIVE,GOV_ONDEMAND,GOV_POWERSAVE,GOV_USERSPACE,STAT,TABLE + * Build in DM CRYPT,MIRROR,MULTIPATH,SNAPSHOT + * Build in DRM + * Build in HID + * Build in HOTPLUG PCI,PCIE + * Build in I2C + * Build in IEEE1394 OHCI1394 + * Build in INPUT EVDEV + * Build in IPV6 + * Build in MMC + * Build in PACKET + * Enable both IEEE1394 (Firewire) stacks as modules + - LP: #276463 + * Disable SUNRPC_REGISTER_V4 + - LP: #306016 + * Enable dm-raid4-5 + - LP: #309378 + * Build in PPP + * Build in RFKILL + * Build in USB SERIAL + + [ Upstream Kernel Changes ] + + * Rebased to v2.6.28 + + -- Tim Gardner Thu, 18 Dec 2008 21:18:44 -0700 + +linux (2.6.28-3.4) jaunty; urgency=low + + [ Tim Gardner ] + + * Build ecryptfs into the kernel + - LP: #302870 + * Deprecated gnbd + + [ Upstream Kernel Changes ] + + * Rebased to v2.6.28-rc8 + + -- Tim Gardner Wed, 10 Dec 2008 22:45:13 -0700 + +linux (2.6.28-2.3) jaunty; urgency=low + + [ Andy Whitcroft ] + + * update the templates so that we have spaces following the title line + + [ Tim Gardner ] + + * Add upload number to kernel version signature. This has the side effect + of renaming kernel packages back to the original way, e.g., without '-ub' + in the name. + + -- Tim Gardner Thu, 04 Dec 2008 12:18:31 -0700 + +linux (2.6.28-2.2) jaunty; urgency=low + + [ Andy Whitcroft ] + + * Revert "SAUCE: (no-up) version: Implement version_signature proc file." + * SAUCE: (no-up) version: Implement version_signature proc file. + * SAUCE: serial: RS485 ioctl structure uses __u32 include linux/types.h + - LP: #303711 + + [ Tim Gardner ] + + * UBUNTU: Removed CONFIG_DRM_VIA_CHROME9 since it is upstream. + * UBUNTU: Removed ubuntu/via_chrome9 + + [ Upstream Kernel Changes ] + + * Rebased to v2.6.28-rc7 + + -- Tim Gardner Tue, 02 Dec 2008 07:33:32 -0700 + +linux (2.6.28-1.1) jaunty; urgency=low + + [ Amit Kucheria ] + + * SAUCE: make fc transport removal of target configurable + * SAUCE: pm: Config option to disable handling of console during + suspend/resume + * SAUCE: Adds support for COMPAL JHL90 webcam + * Map armel to arm to all editconfigs to work correctly + * Add armel to getabis for completeness sake + * Add -ub to our versioning to allow kerneloops.org to identify us + + [ Andy Whitcroft ] + + * Fix Vcs-Git path for the kernel repository. + - LP: #296915 + + [ Ben Collins ] + + * SAUCE: Lower warning level of some PCI messages + - LP: #159241 + * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps + * SAUCE: tulip: Let dmfe handle davicom on non-sparc + * SAUCE: tulip: Define ULI PCI ID's + * SAUCE: (no-up) version: Implement version_signature proc file. + * SAUCE: (no-up) connector.h: Add idx/val for drbd + * SAUCE: (no-up) swap: Add notify_swap_entry_free callback for compcache + * SAUCE: drivers: Remove some duplicate device entries in various modules + * SAUCE: (no-up) [AppArmor] merge with upstream subversion r1291 + * SAUCE: (no-up) Enable ubuntu extra subdirectory + * SAUCE: (no-up) ACPI: initramfs DSDT override support + * ubuntu: Add drbd module + * ubuntu: Add iscsitarget module + * ubuntu: Add BOM for iscsitarget + * ubuntu: Add squashfs driver + * SAUCE: (no-up) Check for squashfs superblock in initramfs mounting. + * ubuntu: Add aufs module + * ubuntu: Added atl2 driver + * ubuntu: Added et131x driver + * ubuntu: Add dm-raid4-5 driver + * ubuntu: Add ndiswrapper driver + * ubuntu: Added ram backed compressed swap module (compcache) + * ubuntu: Add misc drivers from hardy lum + * ubuntu: Add heci driver 3.2.0.24 + * ubuntu: Add ov511 and bt-sco drivers + * ubuntu: Add acx, prism2_usb wireless drivers + * ubuntu: Add at76 driver to build + * ubuntu: Add fsam7400 sw kill switch driver + * ubuntu: Added qc-usb driver + * ubuntu: e1000e: Upgraded module to 0.4.1.7 + * ubuntu: Added rfkill drivers + * ubuntu: VIA - Add VIA DRM Chrome9 3D engine + * ubuntu: unionfs: Added v1.4 module from hardy + * ubuntu: Add LIRC driver + * ubuntu: Add GFS driver + * ubuntu: New tlsup driver for toshiba laptops + * SAUCE: (no-up) Export lookup_has for aufs + * SAUCE: (no-up) Modularize vesafb + * ubuntu: Config files + * Disable some modules that need porting to 2.6.28 + * ubuntu: Fixup headers creation to include arch/*/include + * ubuntu/module-check: Ignore comment lines + + [ Chuck Short ] + + * SAUCE: ata: blacklist FUJITSU MHW2160BH PL + + [ cking ] + + * SAUCE: Enable speedstep for sonoma processors. + + [ Colin Ian King ] + + * ubuntu: Add dm-loop + * SAUCE: cx88: Support Leadtek WinFast DTV2000 H version J. + * SAUCE: fix kernel oops in VirtualBox during paravirt patching + * SAUCE: qc-usb: Enable Logitech QuickCam Messenger + * SAUCE: appleir: Enable driver for new MacBook Pro + + [ Colin Watson ] + + * Enable configfs, fuse, jfs, reiserfs, and xfs for armel + * Extend debian/d-i/ modules handling to make armel easier to support + * Create udebs for armel + + [ Fabio M. Di Nitto ] + + * ubuntu: update GFS Cluster File System + + [ Kees Cook ] + + * SAUCE: AppArmor: update to upstream subversion r1302 + + [ Leann Ogasawara ] + + * Add automatic model setting for Samsung Q45 + * Add Dell Dimension 9200 reboot quirk + + [ Mackenzie Morgan ] + + * SAUCE: Add quirk for ASUS Z37E to make sound audible after resume + + [ Matthew Garrett ] + + * SAUCE: hostap: send events on data interface as well as master + interface + + [ Michael Frey (Senior Manager, MID ] + + * SAUCE: Send HCI_RESET for Broadcomm 2046 + + [ Michael Haas ] + + * add proper aufs source tree from 20080922 + * Fix AUFS compilation in vfsub.c + * Add splice-2.6.23.patch from AUFS to export a symbol needed by AUFS + * Add put_filp.patch from AUFS to export a symbol needed by AUFS + * Add deny_write_access.patch from AUFS - export deny_write_access + * Add sec_perm-2.6.24.patch from AUFS - export security_inode_permission + * make sure TMPFS_MAGIC is defined in AUFS Makefile + * SAUCE: Revert aufs changes from AppArmor merge + + [ Mohamed Abbas ] + + * SAUCE: iwlagn -- fix rfkill when on when driver loaded + + [ Phillip Lougher ] + + * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets. + + [ Stefan Bader ] + + * SAUCE: (no-up) Export dm_disk function of device-mapper + * SAUCE: Restore VT fonts on switch + * SAUCE: mmc: Increase power_up deleay to fix TI readers + * gfs1: GFS1 can't create more than 4kb file + * uvcvideo: Commit streaming parameters when enabling the video stream. + + [ Tim Gardner ] + + * SAUCE: Add extra headers to linux-libc-dev + * SAUCE: Catch nonsense keycodes and silently ignore + * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM + * SAUCE: Guest OS does not recognize a lun with non zero target id on + Vmware ESX Server + * SAUCE: (no-up) Take care of orinoco_cs overlap with hostap_cs + * ubuntu: Add GNBD driver + * SAUCE: e1000e: Map NV RAM dynamically only when needed. + * SAUCE: Correctly blacklist Thinkpad r40e in ACPI + * SAUCE: Update Wacom tablet driver to 1.49 + * SAUCE: Fix Wacom tablet 1.49 porting errors + * SAUCE: Enable an e1000e Intel Corporation 82567 Gigabit controller + * SAUCE: Fix Oops in wlan_setup + * SAUCE: ipw2200: change default policy for auto-associate + * Dell Wireless 365 needs BTUSB_RESET quirk. + * ndiswrapper remote buffer overflows on long ESSIDs (CVE 2008-4395) + * Disabled ubuntu/e1000e config + + [ Upstream Kernel Changes ] + + * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ + handler" + * Revert "x86, early_ioremap: fix fencepost error" + * mac80211: fix two issues in debugfs + * iwl3945: do not send scan command if channel count zero + + -- Ben Collins Fri, 07 Nov 2008 09:37:42 -0700 + +linux (2.6.27-8.17) intrepid-proposed; urgency=low + + [ John W. Linville ] + + * SAUCE: iwlagn: avoid sleep in softirq context + -LP: #286285 + + [ Tim Gardner ] + + * Dell Wireless 365 needs BTUSB_RESET quirk. + - LP: #293670 + * SAUCE: ALSA: hda: make a STAC_DELL_EQ option (version 2) + - LP: #293271 + + [ Upstream Kernel Changes ] + + * iwlagn: downgrade BUG_ON in interrupt + * Input: atkbd - expand Latitude's force release quirk to other Dells + * fbcon_set_all_vcs: fix kernel crash when switching the rotated consoles + * modules: fix module "notes" kobject leak + * Driver core: Fix cleanup in device_create_vargs(). + * Driver core: Clarify device cleanup. + * ath9k/mac80211: disallow fragmentation in ath9k, report to userspace + * md: Fix rdev_size_store with size == 0 + * xfs: fix remount rw with unrecognized options + * OHCI: Allow broken controllers to auto-stop + * USB: OHCI: fix endless polling behavior + * USB: Fix s3c2410_udc usb speed handling + * USB: EHCI: log a warning if ehci-hcd is not loaded first + * usb gadget: cdc ethernet notification bugfix + * usb: musb_hdrc build fixes + * drm/i915: fix ioremap of a user address for non-root (CVE-2008-3831) + * DVB: au0828: add support for another USB id for Hauppauge HVR950Q + * DVB: sms1xxx: support two new revisions of the Hauppauge WinTV + MiniStick + * security: avoid calling a NULL function pointer in + drivers/video/tvaudio.c + * Linux 2.6.27.3 + -LP: #294152 + + * gpiolib: fix oops in gpio_get_value_cansleep() + * edac cell: fix incorrect edac_mode + * x86 ACPI: fix breakage of resume on 64-bit UP systems with SMP kernel + * sched: fix the wrong mask_len + * USB: cdc-wdm: make module autoload work + * USB: don't rebind drivers after failed resume or reset + * USB: fix memory leak in cdc-acm + * USB: Speedtouch: add pre_reset and post_reset routines + * dm kcopyd: avoid queue shuffle + * dm snapshot: fix primary_pe race + * amd_iommu: fix nasty bug that caused ILLEGAL_DEVICE_TABLE_ENTRY errors + * CIFS: fix saving of resume key before CIFSFindNext + * netfilter: xt_iprange: fix range inversion match + * netfilter: snmp nat leaks memory in case of failure + * netfilter: restore lost ifdef guarding defrag exception + * anon_vma_prepare: properly lock even newly allocated entries + * hvc_console: Fix free_irq in spinlocked section + * ACPI Suspend: Enable ACPI during resume if SCI_EN is not set + * ACPI suspend: Blacklist HP xw4600 Workstation for old code ordering + * ACPI suspend: Always use the 32-bit waking vector + * proc: fix vma display mismatch between /proc/pid/{maps,smaps} + * SCSI: scsi_dh: add Dell product information into rdac device handler + * PCI hotplug: cpqphp: fix kernel NULL pointer dereference + * V4L/DVB (9300): pvrusb2: Fix deadlock problem + * Linux 2.6.27.4 + -LP: #294155 + + -- Tim Gardner Tue, 04 Nov 2008 12:16:07 -0700 + +linux (2.6.27-7.16) intrepid-security; urgency=low + + [ Tim Gardner ] + + * ndiswrapper remote buffer overflows on long ESSIDs (CVE 2008-4395) + - LP: #275860 + + [ Upstream Kernel Changes ] + + * ext[234]: Avoid printk floods in the face of directory corruption + (CVE-2008-3528) + + -- Tim Gardner Mon, 03 Nov 2008 13:34:42 -0700 + +linux (2.6.27-7.15) intrepid-security; urgency=low + + [ Upstream Kernel Changes ] + + * tcp: Restore ordering of TCP options for the sake of inter-operability + - LP: #264019 + + -- Tim Gardner Mon, 27 Oct 2008 19:28:06 -0600 + +linux (2.6.27-7.14) intrepid; urgency=low + + [ Tim Gardner ] + + * Disable ath5k in 2.6.27 + - LP: #288148 + + -- Tim Gardner Thu, 23 Oct 2008 07:40:43 -0600 + +linux (2.6.27-7.13) intrepid; urgency=low + + [ Stefan Bader ] + + * gfs1: GFS1 can't create more than 4kb file + + [ Tim Gardner ] + + * Revert "SAUCE: x86: Reserve FIRST_DEVICE_VECTOR in used_vectors + bitmap.". Use upstream commit to avoid future conflicts. + * Revert "STABLE queue: mac80211: fix two issues in debugfs". + Use upstream commit to avoid future conflicts. + * Revert "x86, early_ioremap: fix fencepost error" + Use upstream commit to avoid future conflicts. + + [ Upstream Kernel Changes ] + + * sched_rt.c: resch needed in rt_rq_enqueue() for the root rt_rq + * x86: Reserve FIRST_DEVICE_VECTOR in used_vectors bitmap. + * mac80211: fix two issues in debugfs + * Fix barrier fail detection in XFS + * tty: Termios locking - sort out real_tty confusions and lock reads + * CIFS: make sure we have the right resume info before calling + CIFSFindNext + * rfkill: update LEDs for all state changes + * libertas: clear current command on card removal + * b43legacy: Fix failure in rate-adjustment mechanism + * x86, early_ioremap: fix fencepost error + * x86: SB450: skip IRQ0 override if it is not routed to INT2 of IOAPIC + * x86: improve UP kernel when CPU-hotplug and SMP is enabled + * sky2: Fix WOL regression + * netdrvr: atl1e: Don't take the mdio_lock in atl1e_probe + * Linux 2.6.27.2 + + [ Amit Kucheria ] + + * Ubuntu: agp: Fix stolen memory counting on G4X. + -LP: 285572 + + [ Scott Remnant ] + + * add MODULE_ALIAS to load ipmi_devintf with ipmi_si + + -- Tim Gardner Sun, 19 Oct 2008 10:06:21 -0600 + +linux (2.6.27-7.12) intrepid; urgency=low + + [ Chuck Short ] + + * xen: Add xen modules to virtual flavours. + + [ Mario Limonciello ] + + * SAUCE: Add back in lost commit for Apple BT Wireless Keyboard + - LP: #162083 + + [ Tim Gardner ] + + * Remove depmod created files from packages. + - LP: #250511 + * Changed default TCP congestion algorithm to 'cubic' (again) + - LP: #278801 + * Update configs for 'disable CONFIG_DYNAMIC_FTRACE' + - LP: #263555 + + [ Upstream Kernel Changes ] + + * x86: register a platform RTC device if PNP doesn't describe it + * disable CONFIG_DYNAMIC_FTRACE due to possible memory corruption on + module unload + + -- Tim Gardner Fri, 17 Oct 2008 11:25:39 -0600 + +linux (2.6.27-7.11) intrepid; urgency=low + + [ Amit Kucheria ] + + * STABLE queue: mac80211: fix two issues in debugfs + - LP: #275227 + * SAUCE: Adds support for COMPAL JHL90 webcam + + [ Ben Collins ] + + * SAUCE: (no-up) x86: Quiet "Kernel alive" messages + - LP: #39985 + * SAUCE: (no-up) Modularize vesafb + * build/config: Enable vesafb module + * build: Switch to vesafb as preferred. + + [ Leann Ogasawara ] + + * Add Dell Dimension 9200 reboot quirk + - LP: #271370 + + [ Michael Haas ] + + * SAUCE: Revert aufs changes from AppArmor merge + + [ Tim Gardner ] + + * fix virtio udeb layout + - LP: #257739 + * Enabled CONFIG_EXT4DEV_FS=m + * Changed default TCP congestion algorithm to 'cubic' + - LP: #278801 + * SAUCE: ipw2200: change default policy for auto-associate + - LP: #264104 + + [ Upstream Kernel Changes ] + + * x86, early_ioremap: fix fencepost error + - LP: #263543 + + -- Tim Gardner Sat, 11 Oct 2008 08:07:42 -0600 + +linux (2.6.27-7.10) intrepid; urgency=low + + [ Alexey Starikovskiy ] + + * SAUCE: ACPI: EC: do transaction from interrupt context + - LP: #277802 + + [ Ben Collins ] + + * build/d-i: Change virtio-modules udeb to prio standard + + [ Colin Ian King ] + + * SAUCE: Blacklist IBM 2656 in serio/i8042 + - LP: #21558 + + [ Henrik Rydberg ] + + * Revert "SAUCE: applesmc: Add MacBookAir" + * SAUCE: [PATCH 1/5] hwmon: applesmc: Specified number of bytes to read + should match actual + * SAUCE: [PATCH 2/5] hwmon: applesmc: Fix the 'wait status failed: c != + 8' problem + * SAUCE: [PATCH 3/5] hwmon: applesmc: Prolong status wait + * SAUCE: [PATCH 4/5] hwmon: applesmc: Allow for variable ALV0 and ALV1 + package length + * SAUCE: [PATCH 5/5] hwmon: applesmc: Add support for Macbook Air + * SAUCE: hwmon: applesmc: Add support for Macbook Pro 4 + * SAUCE: hwmon: applesmc: Add support for Macbook Pro 3 + * SAUCE: hwmon: applesmc: Lighter wait mechanism, drastic improvement + + [ Leann Ogasawara ] + + * Add automatic model setting for Samsung Q45 + - LP: #200210 + + [ Tim Gardner ] + + * SAUCE: Correctly blacklist Thinkpad r40e in ACPI + - LP: #278794 + * SAUCE: Update Wacom tablet driver to 1.49 + - LP: #260675 + * SAUCE: ALPS touchpad for Dell Latitude E6500/E6400 + - LP: #270643 + * SAUCE: Fix Wacom tablet 1.49 porting errors + * SAUCE: Enable an e1000e Intel Corporation 82567 Gigabit controller + * SAUCE: Fix Oops in wlan_setup + - LP: #263309 + + [ Upstream Kernel Changes ] + + * ath9k: fix oops on trying to hold the wrong spinlock + * [Bluetooth] Fix double frees on error paths of btusb and bpa10x drivers + * [Bluetooth] Add reset quirk for new Targus and Belkin dongles + * [Bluetooth] Add reset quirk for A-Link BlueUSB21 dongle + * Revert "ax25: Fix std timer socket destroy handling." + * ax25: Quick fix for making sure unaccepted sockets get destroyed. + * netrom: Fix sock_orphan() use in nr_release + * Revert "V4L/DVB (8904): cx88: add missing unlock_kernel" + * SLOB: fix bogus ksize calculation + * net: only invoke dev->change_rx_flags when device is UP + * tcp: Fix possible double-ack w/ user dma + * net: Fix netdev_run_todo dead-lock + * tcp: Fix tcp_hybla zero congestion window growth with small rho and large cwnd. + * [MIPS] Sibyte: Register PIO PATA device only for Swarm and Litte Sur + * eeepc-laptop: Fix hwmon interface + * hwmon: (it87) Prevent power-off on Shuttle SN68PT + * hwmon: Define sysfs interface for energy consumption register + * hwmon: (adt7473) Fix some bogosity in documentation file + * hwmon: (abituguru3) Enable reading from AUX3 fan on Abit AT8 32X + * hwmon: (abituguru3) Enable DMI probing feature on Abit AT8 32X + * [CPUFREQ] correct broken links and email addresses + * SLOB: fix bogus ksize calculation fix + * Don't allow splice() to files opened with O_APPEND + * Linux 2.6.27 + + -- Tim Gardner Wed, 08 Oct 2008 21:19:34 -0600 + +linux (2.6.27-6.9) intrepid; urgency=low + + [ Kees Cook ] + + * SAUCE: AppArmor: update to upstream subversion r1302 + - LP: #269921 + + [ Stefan Bader ] + + * Update configuration files to be compliant to desktop specs + - LP: #279019 + + [ Tim Gardner ] + + * Add support in e1000e for a couple of ICH10 PCI IDs + * Enable CONFIG_INPUT_PCSPKR=m + - LP: #275453 + + [ Upstream Kernel Changes ] + + * V4L/DVB (8559a): Fix a merge conflict at gspca/sonixb + * V4L/DVB (8789): wm8739: remove wrong kfree + * V4L/DVB (8883): w9968cf: Fix order of usb_alloc_urb validation + * V4L/DVB (8884): em28xx-audio: fix memory leak + * V4L/DVB (8885): cpia2_usb: fix memory leak + * V4L/DVB (8886): ov511: fix memory leak + * V4L/DVB (8887): gspca: fix memory leak + * V4L/DVB (8892): pvrusb2: Handle USB ID 2040:2950 same as 2040:2900 + * V4L/DVB (8904): cx88: add missing unlock_kernel + * V4L/DVB (8905): ov511: fix exposure sysfs attribute bug + * V4L/DVB (8909): gspca: PAC 7302 webcam 093a:262a added. + * hrtimer: migrate pending list on cpu offline + * hrtimer: fix migration of CB_IRQSAFE_NO_SOFTIRQ hrtimers + * hrtimer: mark migration state + * hrtimer: prevent migration of per CPU hrtimers + * [IA64] Put the space for cpu0 per-cpu area into .data section + * powerpc: Fix PCI in Holly device tree + * powerpc: Fix failure to shutdown with CPU hotplug + * mfd: Fix Kconfig accroding to the new gpiolib symbols + * mfd: Fix asic3 compilation + * x86: fix typo in enable_mtrr_cleanup early parameter + * ipsec: Fix pskb_expand_head corruption in xfrm_state_check_space + * iucv: Fix mismerge again. + * ALSA: ASoC: Fix cs4270 error path + * ALSA: hda - Fix model for Dell Inspiron 1525 + * sctp: Fix kernel panic while process protocol violation parameter + * x86: Fix broken LDT access in VMI + * x86, vmi: fix broken LDT access + * tcp: Fix NULL dereference in tcp_4_send_ack() + * ipv6: NULL pointer dereferrence in tcp_v6_send_ack + * XFRM,IPv6: initialize ip6_dst_blackhole_ops.kmem_cachep + * af_key: Free dumping state on socket close + * dm: always allow one page in dm_merge_bvec + * dm: cope with access beyond end of device in dm_merge_bvec + * dm mpath: add missing path switching locking + * MN10300: Fix IRQ handling + * pxa2xx_spi: fix build breakage + * e1000e: write protect ICHx NVM to prevent malicious write/erase + * powerpc: Fix boot hang regression on MPC8544DS + * ASoC: Set correct name for WM8753 rec mixer output + * ALSA: snd-powermac: mixers for PowerMac G4 AGP + * ALSA: snd-powermac: HP detection for 1st iMac G3 SL + * fbcon: fix monochrome color value calculation + * inotify: fix lock ordering wrt do_page_fault's mmap_sem + * braille_console: only register notifiers when the braille console is used + * fix error-path NULL deref in alloc_posix_timer() + * memory hotplug: missing zone->lock in test_pages_isolated() + * mm: tiny-shmem nommu fix + * mm: handle initialising compound pages at orders greater than MAX_ORDER + * e1000e: reset swflag after resetting hardware + * e1000e: do not ever sleep in interrupt context + * e1000e: remove phy read from inside spinlock + * e1000e: drop stats lock + * e1000e: debug contention on NVM SWFLAG + * e1000e: update version from k4 to k6 + * Check mapped ranges on sysfs resource files + * e1000e: Fix incorrect debug warning + * [MIPS] Build fix: Fix irq flags type + * [MIPS] SMTC: Build fix: Fix filename in Makefile + * [MIPS] SMTC: Fix holes in SMTC and FPU affinity support. + * [MIPS] SMTC: Close tiny holes in the SMTC IPI replay system. + * [MIPS] SMTC: Fix SMTC dyntick support. + * [S390] nohz: Fix __udelay. + * [S390] qdio: prevent stack clobber + * Fix init/main.c to use regular printk with '%pF' for initcall fn + * x86 setup: correct segfault in generation of 32-bit reloc kernel + * selinux: Fix an uninitialized variable BUG/panic in selinux_secattr_to_sid() + * rtc: fix kernel panic on second use of SIGIO nofitication + * fbdev: fix recursive notifier and locking when fbdev console is blanked + * orion_spi: fix handling of default transfer speed + * include/linux/stacktrace.h: declare struct task_struct + * cpusets: remove pj from cpuset maintainers + * MAINTAINERS: add mailing list for man-pages + * SubmitChecklist: interfaces changes should CC linux-api@ + * Documentation/HOWTO: info about interface changes should CC linux-api@vger + * dw_dmac: fix copy/paste bug in tasklet + * leds-fsg: change order of initialization and deinitialization + * leds-pca955x: add proper error handling and fix bogus memory handling + * ACPI: Make /proc/acpi/wakeup interface handle PCI devices (again) + * clockevents: check broadcast tick device not the clock events device + * V4L/DVB (8919): cx18: Fix tuner audio input for Compro H900 cards + * V4L/DVB (8926): gspca: Bad fix of leak memory (changeset 43d2ead315b1). + * V4L/DVB (8933): gspca: Disable light frquency for zc3xx cs2102 Kokom. + * V4L/DVB (8935): em28xx-cards: Remove duplicate entry (EM2800_BOARD_KWORLD_USB2800) + * V4L/DVB (8955): bttv: Prevent NULL pointer dereference in radio_open + * V4L/DVB (8957): zr36067: Restore the default pixel format + * V4L/DVB (8958): zr36067: Return proper bytes-per-line value + * V4L/DVB (8960): drivers/media/video/cafe_ccic.c needs mm.h + * V4L/DVB (8961): zr36067: Fix RGBR pixel format + * V4L/DVB (8963): s2255drv field count fix + * V4L/DVB (8967): Use correct XC3028L firmware for AMD ATI TV Wonder 600 + * V4L/DVB (8978): sms1xxx: fix product name for Hauppauge WinTV MiniStick + * V4L/DVB (8979): sms1xxx: Add new USB product ID for Hauppauge WinTV MiniStick + * V4L/DVB (9029): Fix deadlock in demux code + * V4L/DVB (9037): Fix support for Hauppauge Nova-S SE + * V4L/DVB (9043): S5H1420: Fix size of shadow-array to avoid overflow + * V4L/DVB (9053): fix buffer overflow in uvc-video + * V4L/DVB (9075): gspca: Bad check of returned status in i2c_read() spca561. + * V4L/DVB (9080): gspca: Add a delay after writing to the sonixj sensors. + * V4L/DVB (9092): gspca: Bad init values for sonixj ov7660. + * V4L/DVB (9099): em28xx: Add detection for K-WORLD DVB-T 310U + * V4L/DVB (9103): em28xx: HVR-900 B3C0 - fix audio clicking issue + * x86: gart iommu have direct mapping when agp is present too + * ide-cd: temporary tray close fix + * ide-dma: fix ide_build_dmatable() for TRM290 + * IDE: Fix platform device registration in Swarm IDE driver (v2) + * ide-cd: Optiarc DVD RW AD-7200A does play audio + * ide: workaround for bogus gcc warning in ide_sysfs_register_port() + * [MIPS] Fix CMP Kconfig configuration and mark as broken. + * [MIPS] IP27: Fix build errors if CONFIG_MAPPED_KERNEL=y + * x86 ACPI: Blacklist two HP machines with buggy BIOSes + * kgdb, x86: Avoid invoking kgdb_nmicallback twice per NMI + * kgdb: call touch_softlockup_watchdog on resume + * atmel-mci: Initialize BLKR before sending data transfer command + * Marker depmod fix core kernel list + * Linux 2.6.27-rc9 + + -- Tim Gardner Sun, 05 Oct 2008 21:27:49 -0600 + +linux (2.6.27-5.8) intrepid; urgency=low + + [ Amit Kucheria ] + + * Update AUFS-related Kconfig + - LP: #264048 + + [ Michael Haas ] + + * add proper aufs source tree from 20080922 + * Fix AUFS compilation in vfsub.c + * Add splice-2.6.23.patch from AUFS to export a symbol needed by AUFS + * Add put_filp.patch from AUFS to export a symbol needed by AUFS + * apply (modified) lhash.patch from AUFS to export __lookup_hash() + * Add deny_write_access.patch from AUFS - export deny_write_access + * Add sec_perm-2.6.24.patch from AUFS - export security_inode_permission + * make sure TMPFS_MAGIC is defined in AUFS Makefile + + [ Tim Gardner ] + + * Enabled CONFIG_IPWIRELESS + - LP: #274748 + * Enabled CONFIG_E1000E, disabled CONFIG_E1000E_NEW + This takes advantage of the upstream NVM protection fix in + commit 4a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7. + + [ Upstream Kernel Changes ] + + * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ + handler" + * [SCSI] qla2xxx: Defer enablement of RISC interrupts until ISP + initialization completes. + * PCI: Fix pcie_aspm=force + * PCI: fix compiler warnings in pci_get_subsys() + * UBIFS: create the name of the background thread in every case + * UBIFS: TNC / GC race fixes + * UBIFS: remove incorrect assert + * UBIFS: fix printk format warnings + * AMD IOMMU: set iommu sunc flag after command queuing + * AMD IOMMU: protect completion wait loop with iommu lock + * sparc64: Fix disappearing PCI devices on e3500. + * x86, oprofile: BUG scheduling while atomic + * ALSA: ASoC: Fix at32-pcm build breakage with PM enabled + * ath9k: connectivity is lost after Group rekeying is done + * wireless: zd1211rw: add device ID fix wifi dongle "trust nw-3100" + * [IA64] Ski simulator doesn't need check_sal_cache_flush + * [IA64] kexec fails on systems with blocks of uncached memory + * ath9k: Fix IRQ nobody cared issue with ath9k + * [Bluetooth] Fix I/O errors on MacBooks with Broadcom chips + * [Bluetooth] Fix wrong URB handling of btusb driver + * [Bluetooth] Fix USB disconnect handling of btusb driver + * sparc64: Fix missing devices due to PCI bridge test in + of_create_pci_dev(). + * [WATCHDOG] ibmasr: remove unnecessary spin_unlock() + * [WATCHDOG] wdt285: fix sparse warnings + * [WATCHDOG] unlocked_ioctl changes + * x86: fix 27-rc crash on vsmp due to paravirt during module load + * sched: fix init_hrtick() section mismatch warning + * clockevents: prevent cpu online to interfere with nohz + * x86: prevent stale state of c1e_mask across CPU offline/online + * clockevents: prevent stale tick_next_period for onlining CPUs + * clockevents: check broadcast device not tick device + * clockevents: prevent mode mismatch on cpu online + * x86: prevent C-states hang on AMD C1E enabled machines + * x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC + * timers: fix build error in !oneshot case + * ALSA: ASoC: maintainers - update email address for Liam Girdwood + * ibmasr: remove unnecessary spin_unlock() + * smb.h: do not include linux/time.h in userspace + * kernel-doc: allow structs whose members are all private + * kexec: fix segmentation fault in kimage_add_entry + * Documentation/DMA-mapping.txt: update for pci_dma_mapping_error() + changes + * sys_paccept: disable paccept() until API design is resolved + * mm: tiny-shmem fix lock ordering: mmap_sem vs i_mutex + * Documentation/sysctl/kernel.txt: fix softlockup_thresh description + * memcg: check under limit at shrink_usage + * atmel_serial: update the powersave handler to match serial core + * [SCSI] Fix hang with split requests + * USB Storage: Sierra: Non-configurable TRU-Install + * USB Serial: Sierra: Device addition & version rev + * USB: ehci: fix some ehci hangs and crashes + * USB: Fix the Nokia 6300 storage-mode. + * USB: Correct Sierra Wireless USB EVDO Modem Device ID + * USB: fix hcd interrupt disabling + * USB: update of Documentation/usb/anchors.txt + * usb gadget: fix omap_udc DMA regression + * USB: Fixing Nokia 3310c in storage mode + * usb: musb: fix include path + * USB: fix EHCI periodic transfers + * usb-serial: Add Siemens EF81 to PL-2303 hack triggers + * USB: SERIAL CP2101 add device IDs + * USB: unusual_devs addition for RockChip MP3 player + * USB: fsl_usb2_udc: fix VDBG() format string + * usb serial: ti_usb_3410_5052 obviously broken by firmware changes + * USB: ftdi_sio: Add 0x5050/0x0900 USB IDs (Papouch Quido USB 4/4) + * USB: serial: add ZTE CDMA Tech id to option driver + * USB Serial: Sierra: Add MC8785 VID/PID + * USB: drivers/usb/musb/: disable it on SuperH + * usb: ftdi_sio: add support for Domintell devices + * usb: unusual devs patch for Nokia 5310 Music Xpress + * USB: revert recovery from transient errors + * [MIPS] au1000: Fix gpio direction + * [MIPS] Fixe the definition of PTRS_PER_PGD + * x86: prevent stale state of c1e_mask across CPU offline/online, fix + * x86: disable apm on the olpc + * i2c-powermac: Fix section for probe and remove functions + * i2c-dev: Return correct error code on class_create() failure + * i2c: Fix mailing lists in two MAINTAINERS entries + * ath9k: disable MIB interrupts to fix interrupt storm + * 9p: implement proper trans module refcounting and unregistration + * 9p-trans_fd: fix trans_fd::p9_conn_destroy() + * 9p-trans_fd: clean up p9_conn_create() + * 9p-trans_fd: don't do fs segment mangling in p9_fd_poll() + * 9p-trans_fd: fix and clean up module init/exit paths + * 9p: introduce missing kfree + * 9p: use an IS_ERR test rather than a NULL test + * 9p: fix put_data error handling + * netfilter: ip6t_{hbh,dst}: Rejects not-strict mode on rule insertion + * MN10300: Move asm-arm/cnt32_to_63.h to include/linux/ + * MN10300: Make sched_clock() report time since boot + * ALSA: fix locking in snd_pcm_open*() and snd_rawmidi_open*() + * ALSA: remove unneeded power_mutex lock in snd_pcm_drop + * IPoIB: Fix crash when path record fails after path flush + * [XFS] Fix extent list corruption in xfs_iext_irec_compact_full(). + * [XFS] Remove xfs_iext_irec_compact_full() + * kgdb: could not write to the last of valid memory with kgdb + * kgdb, x86, arm, mips, powerpc: ignore user space single stepping + * kgdb, x86_64: gdb serial has BX and DX reversed + * kgdb, x86_64: fix PS CS SS registers in gdb serial + * kgdboc,tty: Fix tty polling search to use name correctly + * ARM: Delete ARM's own cnt32_to_63.h + * m32r: remove the unused NOHIGHMEM option + * m32r: don't offer CONFIG_ISA + * m32r: export empty_zero_page + * m32r: export __ndelay + * m32r/kernel/: cleanups + * [MIPS] au1000: Make sure GPIO value is zero or one + * [MIPS] IP27: Switch to dynamic interrupt routing avoding panic on + error. + * [MIPS] BCM47xx: Fix build error due to missing PCI functions + * [SSB] Initialise dma_mask for SSB_BUSTYPE_SSB devices + * Swarm: Fix crash due to missing initialization + * ide-tape: fix vendor strings + * ide: note that IDE generic may prevent other drivers from attaching + * cdrom: update ioctl documentation + * [SCSI] qlogicpti: fix sg list traversal error in continuation entries + * sata_nv: reinstate nv_hardreset() for non generic controllers + * scsi: fix fall out of sg-chaining patch in qlogicpti + * ALSA: make the CS4270 driver a new-style I2C driver + * ALSA: ASoC: Fix another cs4270 error path + * Fix NULL pointer dereference in proc_sys_compare + * kconfig: fix silentoldconfig + * kconfig: readd lost change count + * mm owner: fix race between swapoff and exit + * Linux 2.6.27-rc8 + * e1000e: write protect ICHx NVM to prevent malicious write/erase + + -- Amit Kucheria Tue, 30 Sep 2008 18:22:35 +0300 + +linux (2.6.27-4.7) intrepid; urgency=low + + [ Ben Collins ] + + * build/abi: Add gfs1 to perm blacklist + * build/abi: Ignored changes in gfs2 symbols + + [ Fabio M. Di Nitto ] + + * Revert "SAUCE: Export gfs2 symbols required for gfs1 kernel module" + * ubuntu: update GFS Cluster File System + + [ Stefan Bader ] + + * SAUCE: x86: Reserve FIRST_DEVICE_VECTOR in used_vectors bitmap. + - LP: #276334 + + [ Tim Gardner ] + + * Revert "Disable e1000e until the NVRAM corruption problem is found." + * Add atl1e and atl2 to Debian installer bits + - LP: #273904 + * SAUCE: e1000e: Map NV RAM dynamically only when needed. + - LP: #263555 + + -- Tim Gardner Fri, 26 Sep 2008 20:51:22 -0600 + +linux (2.6.27-4.6) intrepid; urgency=low + + [ Tim Gardner ] + + * Disable e1000e until the NVRAM corruption problem is found. + - LP: #263555 + + [ Upstream Kernel Changes ] + + * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ + handler" + + -- Ben Collins Tue, 23 Sep 2008 09:53:57 -0400 + +linux (2.6.27-4.5) intrepid; urgency=low + + [ Upstream Kernel Changes ] + + * Revert "b43/b43legacy: add RFKILL_STATE_HARD_BLOCKED support" + * udf: Fix lock inversion between iprune_mutex and alloc_mutex (v2) + * udf: Fix error paths in udf_new_inode() + * [SCSI] sd: select CRC_T10DIF only when necessary + * [SCSI] zfcp: Fix request queue locking + * [SCSI] zfcp: Correctly query end flag in gpn_ft response + * [SCSI] zfcp: Simplify ccw notify handler + * [SCSI] zfcp: Fix reference counter for remote ports + * [SCSI] zfcp: channel cannot be detached due to refcount imbalance + * [SCSI] zfcp: Remove duplicated unlikely() macros. + * [SCSI] scsi_dh: make check_sense return ADD_TO_MLQUEUE + * [SCSI] make scsi_check_sense HARDWARE_ERROR return ADD_TO_MLQUEUE on + retry + * [SCSI] fix check of PQ and PDT bits for WLUNs + * pcm037: add rts/cts support for serial port + * i.MX serial: fix init failure + * imx serial: set RXD mux bit on i.MX27 and i.MX31 + * imx serial: fix rts handling for non imx1 based hardware + * mlx4_core: Set RAE and init mtt_sz field in FRMR MPT entries + * udf: add llseek method + * PCI/iommu: blacklist DMAR on Intel G31/G33 chipsets + * PCI: Fix printk warnings in probe.c + * PCI: Fix printk warnings in setup-bus.c + * PCI Hotplug: fakephp: fix deadlock... again + * clockevents: remove WARN_ON which was used to gather information + * ocfs2: Fix a bug in direct IO read. + * arch/x86/kernel/kdebugfs.c: introduce missing kfree + * [IA64] fix compile failure with non modular builds + * [IA64] fix up bte.h + * [IA64] arch/ia64/sn/pci/tioca_provider.c: introduce missing kfree + * PCI: fix pciehp_free_irq() + * [IA64] prevent ia64 from invoking irq handlers on offline CPUs + * ide: Fix pointer arithmetic in hpt3xx driver code (3rd try) + * add deprecated ide-scsi to feature-removal-schedule.txt + * swiotlb: fix back-off path when memory allocation fails + * sparc64: Fix interrupt register calculations on Psycho and Sabre. + * VIDEO_SH_MOBILE_CEU should depend on HAS_DMA + * m68k: Update defconfigs for 2.6.27-rc6 + * sparc32: Fix function signature of of_bus_sbus_get_flags(). + * sched: fix 2.6.27-rc5 couldn't boot on tulsa machine randomly + * sched: fix deadlock in setting scheduler parameter to zero + * KVM: SVM: fix random segfaults with NPT enabled + * KVM: SVM: fix guest global tlb flushes with NPT + * KVM: VMX: Always return old for clear_flush_young() when using EPT + * clocksource, acpi_pm.c: fix check for monotonicity + * [ARM] OMAP: Fix MMC device data + * block: disable sysfs parts of the disk command filter + * ath9k: Assign seq# when mac80211 requests this + * sg: disable interrupts inside sg_copy_buffer + * MN10300: Change the fault handler to check in_atomic() not + in_interrupt() + * [Bluetooth] Fix regression from using default link policy + * netlink: fix overrun in attribute iteration + * x86: fix possible x86_64 and EFI regression + * sparc64: Fix PCI error interrupt registry on PSYCHO. + * sparc: Fix user_regset 'n' field values. + * niu: panic on reset + * PCI: re-add debug prints for unmodified BARs + * [ARM] 5245/1: Fix warning about unused return value in drivers/pcmcia + * [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clock + * [ARM] 5247/1: tosa: SW_EAR_IN support + * [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARM + * ata: duplicate variable sparse warning + * sata_inic162x: enable LED blinking + * [libata] LBA28/LBA48 off-by-one bug in ata.h + * proc: more debugging for "already registered" case + * include/linux/ioport.h: add missing macro argument for devm_release_* + family + * cpuset: avoid changing cpuset's cpus when -errno returned + * cpuset: hotplug documentation fix + * coredump_filter: add description of bit 4 + * bfs: fix Lockdep warning + * mm: ifdef Quicklists in /proc/meminfo + * spi_mpc83xx: fix clockrate calculation for low speed + * spi_mpc83xx: reject invalid transfer sizes + * pxa2xx_spi: chipselect bugfixes + * pxa2xx_spi: dma bugfixes + * mm: mark the correct zone as full when scanning zonelists + * Documentation/ABI: /sys/class/gpio + * MAINTAINERS: fix USB VIDEO CLASS mail list address + * ia64: fix panic during `modprobe -r xpc' + * atmel_lcdfb: disable LCD and DMA engines when suspending + * spi_s3c24xx: fix section warning + * rescan_partitions(): make device capacity errors non-fatal + * memstick: fix MSProHG 8-bit interface mode support + * Add Uwe Kleine-König to .mailmap + * xen: fix for xen guest with mem > 3.7G + * x86/paravirt: Remove duplicate paravirt_pagetable_setup_{start, done}() + * crypto: talitos - Avoid consecutive packets going out with same IV + * slub: fixed uninitialized counter in struct kmem_cache_node + * udp: Fix rcv socket locking + * IB/mlx4: Fix up fast register page list format + * [MIPS] VR41xx: unsigned irq cannot be negative + * x86: completely disable NOPL on 32 bits + * [S390] cio: Fix driver_data handling for ccwgroup devices. + * [S390] cio: fix orb initialization in cio_start_key + * sparc64: Fix OOPS in psycho_pcierr_intr_other(). + * sparc64: Fix SMP bootup with CONFIG_STACK_DEBUG or ftrace. + * RDMA/nes: Fix client side QP destroy + * IPoIB: Fix deadlock on RTNL between bcast join comp and ipoib_stop() + * clockevents: make device shutdown robust + * powerpc: Fix interrupt values for DMA2 in MPC8610 HPCD device tree + * hpplus: fix build regression + * Fix PNP build failure, bugzilla #11276 + * warn: Turn the netdev timeout WARN_ON() into a WARN() + * [XFS] Move memory allocations for log tracing out of the critical path + * [XFS] Fix regression introduced by remount fixup + * [XFS] Prevent direct I/O from mapping extents beyond eof + * [XFS] Fix barrier status change detection. + * [XFS] Prevent lockdep false positives when locking two inodes. + * [XFS] Fix use-after-free with buffers + * [XFS] Don't do I/O beyond eof when unreserving space + * powerpc: Holly board needs dtbImage target + * Fix compile failure with non modular builds + * [ARM] 5249/1: davinci: remove redundant check in davinci_psc_config() + * [ARM] omap: back out 'internal_clock' support + * sctp: set the skb->ip_summed correctly when sending over loopback. + * [ARM] 5255/1: Update jornada ssp to remove build errors/warnings + * sctp: do not enable peer features if we can't do them. + * sctp: Fix oops when INIT-ACK indicates that peer doesn't support AUTH + * bnx2: Promote vector field in bnx2_irq structure from u16 to unsigned + int + * forcedeth: call restore mac addr in nv_shutdown path + * e1000: prevent corruption of EEPROM/NVM + * e100: Use pci_pme_active to clear PME_Status and disable PME# + * md: Don't wait UNINTERRUPTIBLE for other resync to finish + * atstk1000: fix build breakage with BOARD_ATSTK100X_SW2_CUSTOM=y + * avr32: add .gitignore files + * avr32: add generic_find_next_le_bit bit function + * avr32: fix sys_sync_file_range() call convention + * avr32: nmi_enter() without nmi_exit() + * KVM: ia64: 'struct fdesc' build fix + * hwmon: (atxp1) Fix device detection logic + * hwmon: (it87) Fix fan tachometer reading in IT8712F rev 0x7 (I) + * hwmon: (ad7414) Make ad7414_update_device() static + * tmio_mmc: fix compilation with debug enabled + * atmel-mci: debugfs: enable clock before dumping regs + * atmel-mci: Fix memory leak in atmci_regs_show + * atmel-mci: Fix bogus debugfs file size + * atmel-mci: Set MMC_CAP_NEEDS_POLL if no detect_pin + * mmc_block: handle error from mmc_register_driver() + * mmc_test: initialize mmc_test_lock statically + * [MIPS] Fix 64-bit IP checksum code + * [MIPS] SMTC: Clear TIF_FPUBOUND on clone / fork. + * [MIPS] Fix potential latency problem due to non-atomic cpu_wait. + * [MIPS] vmlinux.lds.S: handle .text.* + * MAINTAINERS: Trivial whitespace cleanups + * MAINTAINERS: Various fixes + * Linux 2.6.27-rc7 + + -- Tim Gardner Sun, 21 Sep 2008 21:49:28 -0600 + +linux (2.6.27-3.4) intrepid; urgency=low + + [ Colin Ian King ] + + * SAUCE: fix kernel oops in VirtualBox during paravirt patching + - LP: #246067 + * SAUCE: qc-usb: Enable Logitech QuickCam Messenger + - LP: #209901 + * SAUCE: appleir: Enable driver for new MacBook Pro + - LP: #157919 + + [ Tim Gardner ] + + * Enabled CONFIG_DEBUG_RODATA=y + + [ Upstream Kernel Changes ] + + * Revert "ALSA: hda - Added model selection for iMac 24"" + * Revert "x86: fix HPET regression in 2.6.26 versus 2.6.25, check hpet + against BAR, v3" + * Revert "[ARM] use the new byteorder headers" + * Revert "mac80211: Use IWEVASSOCREQIE instead of IWEVCUSTOM" + * Revert "crypto: camellia - Use kernel-provided bitops, unaligned access + helpers" + * svcrdma: Fix race between svc_rdma_recvfrom thread and the dto_tasklet + * sched, cpuset: rework sched domains and CPU hotplug handling (v4) + * ACPI: Fix now signed module parameter. + * ACPI: Change package length error to warning + * ACPI: Fix now signed module parameter. + * ACPI: Fix typo in "Disable MWAIT via DMI on broken Compal board" + * acpi: add checking for NULL early param + * UBIFS: fix zero-length truncations + * Input: bcm5974 - add maintainer entry + * sh64: re-add the __strnlen_user() prototype + * sh: fix ptrace_64.c:user_disable_single_step() + * PNPACPI: ignore the producer/consumer bit for extended IRQ descriptors + * UBIFS: always read hashed-key nodes under TNC mutex + * UBIFS: allow for racing between GC and TNC + * [CIFS] Fix plaintext authentication + * sparc32: Implement smp_call_function_single(). + * sh: crash kernel resource fix + * sh: fix kexec entry point for crash kernels + * sh: fix platform_resource_setup_memory() section mismatch + * sh: update Migo-R defconfig + * sh: update AP325RXA defconfig + * sh: fix semtimedop syscall + * cifs: fix O_APPEND on directio mounts + * [CIFS] update cifs change log + * [CIFS] Turn off Unicode during session establishment for plaintext + authentication + * ACPI: thinkpad-acpi: wan radio control is not experimental + * sparc: Fix resource flags for PCI children in OF device tree. + * remove blk_register_filter and blk_unregister_filter in gendisk + * ALSA: oxygen: fix distorted output on AK4396-based cards + * ipv6: When we droped a packet, we should return NET_RX_DROP instead of + 0 + * pkt_sched: Fix locking of qdisc_root with qdisc_root_sleeping_lock() + * net: Unbreak userspace usage of linux/mroute.h + * Don't trigger softlockup detector on network fs blocked tasks + * Resource handling: add 'insert_resource_expand_to_fit()' function + * sparc64: setup_valid_addr_bitmap_from_pavail() should be __init + * UBIFS: do not update min_idx_lebs in stafs + * UBIFS: push empty flash hack down + * UBIFS: remove incorrect index space check + * UBIFS: improve statfs reporting + * UBIFS: fix assertion + * UBIFS: add forgotten gc_idx_lebs component + * UBIFS: introduce LEB overhead + * UBIFS: improve statfs reporting even more + * UBIFS: fill f_fsid + * drm/radeon: downgrade debug message from info to debug. + * Remove invalidate_partition call from do_md_stop. + * Fix problem with waiting while holding rcu read lock in md/bitmap.c + * ALSA: hda: Distortion fix for dell_m6_core_init + * ALSA: ASoC: fix pxa2xx-i2s clk_get call + * block: restore original behavior of /proc/partition when there's no + partition + * debugobjects: fix lockdep warning + * avr32: Fix lockup after Java stack underflow in user mode + * avr32: pm_standby low-power ram bug fix + * nfsd: fix compound state allocation error handling + * sunrpc: fix possible overrun on read of /proc/sys/sunrpc/transports + * nfsd: fix buffer overrun decoding NFSv4 acl + * audit: Moved variable declaration to beginning of function + * Fix modules_install on RO nfs-exported trees. + * Remove '#include ' from mm/page_isolation.c + * dabusb_fpga_download(): fix a memory leak + * [MTD] mtdchar.c: Fix regression in MEMGETREGIONINFO ioctl() + * ALSA: hda - Fix ALC663 auto-probe + * ALSA: hda - Add mic-boost controls to ALC662/663 auto configuration + * Un-break printk strings in x86 PCI probing code + * kernel/resource.c: fix new kernel-doc warning + * softlockup: minor cleanup, don't check task->state twice + * fix typo in arch/parisc/hpux/fs.c + * m68k: atari_keyb_init operator precedence fix + * ACPI: Fix typo in "Disable MWAIT via DMI on broken Compal board" + * don't diff generated firmware files + * IDE: compile fix for sff_dma_ops + * IDE: palm_bk3710: fix compile warning for unused variable + * ide: fix hwif_to_node() + * palm_bk3710: improve IDE registration + * ide-disk: remove stale init_idedisk_capacity() documentation + * ide/Kconfig: mark ide-scsi as deprecated + * net/wireless/Kconfig: clarify the description for + CONFIG_WIRELESS_EXT_SYSFS + * iwlwifi: do not use GFP_DMA in iwl_tx_queue_init + * iwlwifi: workaround interrupt handling no some platforms + * iwlwifi: fix apm_stop (wrong bit polarity for FLAG_INIT_DONE) + * iwlwifi: fix 64bit platform firmware loading + * orinoco: Multicast to the specified addresses + * wireless/libertas/if_cs.c: fix memory leaks + * mac80211: Fix debugfs union misuse and pointer corruption + * rt2x00: Compiler warning unmasked by fix of BUILD_BUG_ON + * ath9k: Incorrect key used when group and pairwise ciphers are + different. + * ath9: Fix ath_rx_flush_tid() for IRQs disabled kernel warning message. + * net/xfrm: Use an IS_ERR test rather than a NULL test + * ipv: Re-enable IP when MTU > 68 + * NTFS: update homepage + * mm: make setup_zone_migrate_reserve() aware of overlapping nodes + * VFS: fix dio write returning EIO when try_to_release_page fails + * acer-wmi: remove debugfs entries upon unloading + * mm/bootmem: silence section mismatch warning - + contig_page_data/bootmem_node_data + * MAINTAINERS: add a maintainer for the BCM5974 multitouch driver + * 8250: improve workaround for UARTs that don't re-assert THRE correctly + * mmc: at91_mci: don't use coherent dma buffers + * pid_ns: zap_pid_ns_processes: fix the ->child_reaper changing + * pid_ns: (BUG 11391) change ->child_reaper when init->group_leader exits + * cirrusfb: check_par fixes + * devcgroup: fix race against rmdir() + * mm: show quicklist usage in /proc/meminfo + * mm: size of quicklists shouldn't be proportional to the number of CPUs + * ipc: document the new auto_msgmni proc file + * hp-wmi: update to match current rfkill semantics + * hp-wmi: add proper hotkey support + * tdfxfb: fix SDRAM memory size detection + * tdfxfb: fix frame buffer name overrun + * rtc_time_to_tm: fix signed/unsigned arithmetic + * ibft: fix target info parsing in ibft module + * sysfs: document files in /sys/firmware/sgi_uv/ + * rtc-cmos: wake again from S5 + * pm_qos_requirement might sleep + * drivers/char/random.c: fix a race which can lead to a bogus BUG() + * ipsec: Fix deadlock in xfrm_state management. + * [x86] Fix TSC calibration issues + * tipc: Don't use structure names which easily globally conflict. + * sparc64: Fix IPI call locking. + * [ARM] omap: fix gpio.c build error + * sparc64: Prevent sparc64 from invoking irq handlers on offline CPUs + * powerpc: Fix uninitialised variable in VSX alignment code + * powerpc: Only make kernel text pages of linear mapping executable + * powerpc: Make sure _etext is after all kernel text + * powerpc: Work around gcc's -fno-omit-frame-pointer bug + * powerpc: Fix build error with 64K pages and !hugetlbfs + * powerpc: Fix for getting CPU number in power_save_ppc32_restore() + * UBIFS: amend f_fsid + * net/usb/pegasus: avoid hundreds of diagnostics + * ixgbe: initialize interrupt throttle rate + * pcnet-cs, axnet_cs: add new IDs, remove dup ID with less info + * netxen: Remove workaround for chipset quirk + * Split up PIT part of TSC calibration from native_calibrate_tsc + * iwlwifi: W/A for the TSF correction in IBSS + * iwlwifi: fix hidden ssid discovery in passive channels + * iwlwifi: remove false rxon if rx chain changes + * iwlwifi: fix station mimo power save values + * iwlwifi: fix rx_chain computation + * iwlwifi: fix Tx cmd memory allocation failure handling + * iwlwifi: call apm stop on exit + * iwlwifi: fix STATUS_EXIT_PENDING is not set on pci_remove + * ath9k: Fix TX status reporting + * ath9k: Fix TX control flag use for no ACK and RTS/CTS + * V4L/DVB (8555): au8522: add mechanism to configure IF frequency for vsb + and qam + * V4L/DVB (8556): au0828: add support for Hauppauge Woodbury + * V4L/DVB (8598): au8522: clean up function au8522_set_if + * V4L/DVB (8599): au8522: remove if frequency settings from vsb/qam + modulation tables + * V4L/DVB (8600): au0828: explicitly set 6 MHz IF frequency in + hauppauge_hvr950q_config + * V4L/DVB (8629): v4l2-ioctl: do not try to handle private V4L1 ioctls + * V4L/DVB (8633): ivtv: update ivtv version number + * V4L/DVB (8648): ivtv: improve CC support + * V4L/DVB (8660): gspca: Simplify the scan of URB packets in pac7311. + * V4L/DVB (8661): gspca: Bug in the previous changeset about pac7311. + * V4L/DVB (8663): gspca: Webcam 0c45:6128 added in sonixj. + * V4L/DVB (8664): gspca: The bridge/sensor of the webcam 093a:2621 is a + PAC 7302. + * V4L/DVB (8665): gspca: Fix the 640x480 resolution of the webcam + 093a:2621. + * V4L/DVB (8666): gspca: Bad scanning of frames in pac7311. + * V4L/DVB (8667): gspca: Bad probe of Z-Star/Vimicro webcams with pas106 + sensor. + * V4L/DVB (8668): gspca: Conflict GSPCA / ET61X251 for the webcam + 102c:6251. + * V4L/DVB (8669): gspca: Add white balance control for spca561 rev 012A. + * V4L/DVB (8671): gspca: Remove the unused field 'dev_name' of the device + structure. + * V4L/DVB (8672): gspca: Big rewrite of spca561. + * V4L/DVB (8673): gspca: Bad frame scanning again and bad init in + pac7311. + * V4L/DVB (8674): gspca: Webcam 0c45:612e added in sonixj. + * V4L/DVB (8675): gspca: Pixmap PJPG (Pixart 73xx JPEG) added, generated + by pac7311. + * V4L/DVB (8678): Remove the dead CONFIG_RADIO_MIROPCM20{,_RDS} code + * V4L/DVB (8681): v4l2-ioctl.c: fix warning + * V4L/DVB (8682): V4L: fix return value of register video func + * V4L/DVB (8701): cx18: Add missing lock for when the irq handler + manipulates the queues + * V4L/DVB (8703): gspca: Do controls work for spca561 revision 12a. + * V4L/DVB (8705): gspca: Adjust some control limits in spca561. + * V4L/DVB (8706): Make contrast and brightness work for pac7302. + * V4L/DVB (8707): gspca: Colors, hflip and vflip controls added for + pac7302. + * V4L/DVB (8709): gspca: Fix initialization and controls of sn9x110 - + ov7630. + * V4L/DVB (8710): gspca: Bad color control in sonixj. + * V4L/DVB (8711): gspca: Bad controls and quantization table of pac7311. + * V4L/DVB (8712): gspca: Bad start of sonixj webcams since changeset + a8779025e7e8. + * V4L/DVB (8713): gspca: Bad color control again in sonixj. + * V4L/DVB (8714): gspca: Bad start of sn9c110 and sensor om6802. + * V4L/DVB (8715): gspca: Change the name of some webcam in the gspca doc. + * V4L/DVB (8716): gspca: Bad start of sn9c110 and sensor ov7630. + * V4L/DVB (8717): gspca: Frame buffer too small for small resolutions + (sonixj and t613). + * V4L/DVB (8718): gspca: suspend/resume added. + * V4L/DVB (8719): gspca: Have VIDIOC_QUERYCTRL more compliant to the + spec. + * V4L/DVB (8720): gspca: V4L2_CAP_SENSOR_UPSIDE_DOWN added as a cap for + some webcams. + * V4L/DVB (8722): sms1xxx: fix typo in license header + * V4L/DVB (8726): link tuner before saa7134 + * V4L/DVB (8727): V4L1: make PMS not autoprobe when builtin. + * V4L/DVB (8728): 1-make-pms-not-autoprobe-when-builtin update + * V4L/DVB (8749): Fix error code, when camera is not turned on by sonypi + * V4L/DVB (8750): V4L: check inval in video_register_device_index() + * V4L/DVB (8751): vivi: Fix some issues at vivi register routine + * V4L/DVB (8757): v4l-dvb: fix a bunch of sparse warnings + * V4L/DVB (8769): cx18: Simplify queue flush logic to prevent oops in + cx18_flush_queues() + * V4L/DVB (8778): radio: fix incorrect video_register_device result check + * V4L/DVB (8779): v4l: fix more incorrect video_register_device result + checks + * V4L/DVB (8790): saa7115: call i2c_set_clientdata only when state != + NULL + * V4L/DVB (8803): s5h1409: Enable QAM_AUTO mode + * V4L/DVB (8804): s5h1411: Enable QAM_AUTO mode + * V4L/DVB (8805): Steven Toth email address change + * V4L/DVB (8809): gspca: Revert commit + 9a9335776548d01525141c6e8f0c12e86bbde982 + * V4L/DVB (8810): gspca: Compile error when CONFIG_PM not defined. + * V4L/DVB (8812): gspca: Do pac73xx webcams work. + * V4L/DVB (8813): gspca: Adjust SOF detection for pac73xx. + * V4L/DVB (8814): gspca: Set DISABLED the disabled controls at query + control time. + * V4L/DVB (8815): gspca: Fix problems with disabled controls. + * V4L/DVB (8816): gspca: Set disabled ctrls and fix a register pb with + ovxxxx in sonixb. + * V4L/DVB (8817): gspca: LED and proble changes in sonixb. + * V4L/DVB (8818): gspca: Reinitialize the device on resume. + * V4L/DVB (8819): gspca: Initialize the ov519 at open time and source + cleanup. + * V4L/DVB (8820): gspca: Change initialization and gamma of zc3xx - + pas106. + * V4L/DVB (8822): gspca: Change some subdriver functions for + suspend/resume. + * V4L/DVB (8823): gspca: H and V flips work for ov7670 only in ov519. + * V4L/DVB (8824): gspca: Too much code removed in the suspend/resume + changeset. + * V4L/DVB (8825): gspca: More controls for pac73xx and new webcam + 093a:2624. + * V4L/DVB (8826): gspca: Webcam Labtec 2200 (093a:2626) added in pac7311. + * V4L/DVB (8827): gspca: Stop pac7302 autogain oscillation. + * V4L/DVB (8828): gspca: Set the clock at the end of initialization in + sonixj. + * V4L/DVB (8829): gspca: Have a clean kmalloc-ated buffer for USB + exchanges. + * V4L/DVB (8830): gspca: Move some probe code to the new init function. + * V4L/DVB (8831): gspca: Resolve webcam conflicts between some drivers. + * V4L/DVB (8832): gspca: Bad pixelformat of vc0321 webcams. + * V4L/DVB (8833): gspca: Cleanup the sonixb code. + * V4L/DVB (8834): gspca: Have a bigger buffer for sn9c10x compressed + images. + * V4L/DVB (8835): gspca: Same pixfmt as the sn9c102 driver and raw Bayer + added in sonixb. + * V4L/DVB (8837): dvb: fix I2C adapters name size + * V4L/DVB (8839): dib0700: add comment to identify 35th USB id pair + * V4L/DVB (8840): dib0700: add basic support for Hauppauge Nova-TD-500 + (84xxx) + * V4L/DVB (8842): vivi_release(): fix use-after-free + * V4L/DVB (8843): tda10048_firmware_upload(): fix a memory leak + * V4L/DVB (8844): dabusb_fpga_download(): fix a memory leak + * bnx2x: Accessing un-mapped page + * SELinux: memory leak in security_context_to_sid_core + * x86: add io delay quirk for Presario F700 + * mmap: fix petty bug in anonymous shared mmap offset handling + * x86: Change warning message in TSC calibration. + * PCI: fix pbus_size_mem() resource alignment for CardBus controllers + * [ARM] omap: fix build error in ohci-omap.c + * [ARM] remove unused #include + * ACPI: Make Len Brown the ACPI maintainer again + * fujitsu-laptop: fix regression for P8010 in 2.6.27-rc + * ACPI: Avoid bogus timeout about SMbus check + * acer-wmi: remove debugfs entries upon unloading + * forgotten refcount on sysctl root table + * V4L/DVB (8868): gspca: Support for vga modes with sif sensors in + sonixb. + * V4L/DVB (8869): gspca: Move the Sonix webcams with TAS5110C1B from + sn9c102 to gspca. + * V4L/DVB (8870): gspca: Fix dark room problem with sonixb. + * V4L/DVB (8872): gspca: Bad image format and offset with rev072a of + spca561. + * V4L/DVB (8873): gspca: Bad image offset with rev012a of spca561 and + adjust exposure. + * V4L/DVB (8874): gspca: Adjust hstart for sn9c103/ov7630 and update + usb-id's. + * [ARM] omap: fix virtual vs physical address space confusions + * V4L/DVB (8876): budget: udelay changed to mdelay + * V4L/DVB (8877): b2c2 and bt8xx: udelay to mdelay + * V4L/DVB (8880): PATCH: Fix parents on some webcam drivers + * V4L/DVB (8881): gspca: After 'while (retry--) {...}', retry will be -1 + but not 0. + * powerpc/spufs: Fix multiple get_spu_context() + * powerpc/spufs: Fix race for a free SPU + * Input: bcm5974 - small formatting cleanup + * Input: bcm5974 - improve finger tracking and counting + * Input: bcm5974 - add BTN_TOUCH event for mousedev benefit + * Input: i8042 - make Lenovo 3000 N100 blacklist entry more specific + * sh: resume_kernel fix for kernel oops built with CONFIG_BKL_PREEMPT=y. + * sh64: resume_kernel fix for kernel oops built with + CONFIG_BKL_PREEMPT=y. + * i2c: fix i2c-sh_mobile timing issues + * clockevents: prevent clockevent event_handler ending up handler_noop + * clockevents: prevent endless loop in periodic broadcast handler + * clockevents: enforce reprogram in oneshot setup + * clockevents: prevent multiple init/shutdown + * clockevents: prevent endless loop lockup + * HPET: make minimum reprogramming delta useful + * [MTD] [NAND] tmio_nand: fix base address programming + * Fix conditional export of kvh.h and a.out.h to userspace. + * async_tx: fix the bug in async_tx_run_dependencies + * sched_clock: fix NOHZ interaction + * sched: fix process time monotonicity + * UBIFS: fix division by zero + * UBIFS: make minimum fanout 3 + * [MIPS] Fix data bus error recovery + * [MIPS] Fix WARNING: at kernel/smp.c:290 + * [MIPS] TXx9: Fix txx9_pcode initialization + * [MIPS] TX39xx: Add missing local_flush_icache_range initialization + * [MIPS] Probe initrd header only if explicitly specified + * res_counter: fix off-by-one bug in setting limit + * forcedeth: fix kexec regression + * atmel_lcdfb: fix oops in rmmod when framebuffer fails to register + * tracehook: comment pasto fixes + * drivers/mmc/card/block.c: fix refcount leak in mmc_block_open() + * x86: boot: stub out unimplemented CPU feature words + * x86: add NOPL as a synthetic CPU feature bit + * x86: use X86_FEATURE_NOPL in alternatives + * clockevents: broadcast fixup possible waiters + * x86: HPET fix moronic 32/64bit thinko + * x86: HPET: read back compare register before reading counter + * Fix CONFIG_AC97_BUS dependency + * [ARM] 5241/1: provide ioremap_wc() + * ntp: fix calculation of the next jiffie to trigger RTC sync + * clocksource, acpi_pm.c: use proper read function also in errata mode + * clocksource, acpi_pm.c: check for monotonicity + * x86: delay early cpu initialization until cpuid is done + * x86: move mtrr cpu cap setting early in early_init_xxxx + * sched: arch_reinit_sched_domains() must destroy domains to force + rebuild + * x86, xen: Use native_pte_flags instead of native_pte_val for .pte_flags + * x86: pda_init(): fix memory leak when using CPU hotplug + * x86: cpu_init(): fix memory leak when using CPU hotplug + * powerpc/spufs: Fix possible scheduling of a context to multiple SPEs + * netfilter: nf_conntrack_sip: de-static helper pointers + * netfilter: nf_conntrack_gre: more locking around keymap list + * netfilter: nf_conntrack_gre: nf_ct_gre_keymap_flush() fixlet + * netfilter: nf_conntrack_irc: make sure string is terminated before + calling simple_strtoul + * pkt_sched: Fix qdisc state in net_tx_action() + * powerpc: Fix rare boot build breakage + * ahci, pata_marvell: play nicely together + * sata_mv: add RocketRaid 1720 PCI ID to driver + * ahci: disable PMP for marvell ahcis + * sata_nv: disable hardreset for generic + * libata-sff: kill spurious WARN_ON() in ata_hsm_move() + * pata_sil680: remove duplicate pcim_enable_device + * ahci: RAID mode SATA patch for Intel Ibex Peak DeviceIDs + * [MIPS] IP22: Fix detection of second HPC3 on Challenge S + * xen: fix 2.6.27-rc5 xen balloon driver warnings + * x86: disable static NOPLs on 32 bits + * netns : fix kernel panic in timewait socket destruction + * bridge: don't allow setting hello time to zero + * NFS: Restore missing hunk in NFS mount option parser + * usb: fix null deferences in low level usb serial + * Fix format of MAINTAINERS + * sparc64: Disable timer interrupts in fixup_irqs(). + * [Bluetooth] Fix reference counting during ACL config stage + * [Bluetooth] Enforce correct authentication requirements + * [Bluetooth] Reject L2CAP connections on an insecure ACL link + * [S390] CVE-2008-1514: prevent ptrace padding area read/write in 31-bit + mode + * [S390] cio: Correct cleanup on error. + * [S390] cio: handle ssch() return codes correctly. + * [S390] cio: allow offline processing for disconnected devices + * ipsec: Restore larval states and socket policies in dump + * update Documentation/filesystems/Locking for 2.6.27 changes + * MAINTAINERS: add Atheros maintainer for atlx + * lib: Correct printk %pF to work on all architectures + * x86: fix memmap=exactmap boot argument + * clockevents: remove WARN_ON which was used to gather information + * ipv6: Fix OOPS in ip6_dst_lookup_tail(). + * Linux 2.6.27-rc6 + + -- Ben Collins Tue, 02 Sep 2008 12:45:56 -0400 + +linux (2.6.27-2.3) intrepid; urgency=low + + [ Ben Collins ] + + * build/retag: Make script save .orig of tags for later use + * ubuntu/lirc: Fix device_create call + * build/firmware: Put in-kernel firmware into version specific subdir + - LP: #262115 + * Rebase on linux-2.6 git. + * ABI bump + + [ Herton Ronaldo Krzesinski ] + + * SAUCE: (no-up) Apparmor warning fixes + + [ John Johansen ] + + * SAUCE: (no-up) Proper AppArmor ptrace updates for newer lsm API + + [ Mackenzie Morgan ] + + * SAUCE: Add quirk for ASUS Z37E to make sound audible after resume + - LP: #25896 + + -- Ben Collins Wed, 27 Aug 2008 14:03:05 -0400 + +linux (2.6.27-1.2) intrepid; urgency=low + + [ Amit Kucheria ] + + * SAUCE: make fc transport removal of target configurable + * SAUCE: pm: Config option to disable handling of console during + suspend/resume + + [ Ben Collins ] + + * SAUCE: Lower warning level of some PCI messages + * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps + * SAUCE: tulip: Let dmfe handle davicom on non-sparc + * SAUCE: tulip: Define ULI PCI ID's + * SAUCE: (no-up) version: Implement version_signature proc file. + * SAUCE: (no-up) connector.h: Add idx/val for drbd + * SAUCE: (no-up) swap: Add notify_swap_entry_free callback for compcache + * SAUCE: drivers: Remove some duplicate device entries in various modules + * SAUCE: (no-up) [AppArmor] merge with upstream subversion r1291 + * SAUCE: apparmor: Update for changes to ptrace lsm hooks + * SAUCE: (no-up) Enable ubuntu extra subdirectory + * SAUCE: applesmc: Add MacBookAir + * SAUCE: (no-up) ACPI: initramfs DSDT override support + * ubuntu: Add drbd module + * ubuntu: Add iscsitarget module + * ubuntu: Add BOM for iscsitarget + * ubuntu: Add squashfs driver + * SAUCE: (no-up) Check for squashfs superblock in initramfs mounting. + * ubuntu: Add aufs module + * ubuntu: Added atl2 driver + * ubuntu: Added et131x driver + * ubuntu: Add dm-raid4-5 driver + * ubuntu: Add ndiswrapper driver + * ubuntu: Added ram backed compressed swap module (compcache) + * ubuntu: Add misc drivers from hardy lum + * ubuntu: Add heci driver 3.2.0.24 + * ubuntu: Add ov511 and bt-sco drivers + * ubuntu: Add acx, prism2_usb wireless drivers + * ubuntu: Add at76 driver to build + * ubuntu: Add fsam7400 sw kill switch driver + * ubuntu: Added qc-usb driver + * ubuntu: e1000e: Upgraded module to 0.4.1.7 + * ubuntu: Added rfkill drivers + * ubuntu: VIA - Add VIA DRM Chrome9 3D engine + * ubuntu: unionfs: Added v1.4 module from hardy + * ubuntu: Add LIRC driver + * ubuntu: Add GFS driver + * ubuntu: New tlsup driver for toshiba laptops + * Update config files + * build/d-i: Remove obsolete dm modules + + [ Chuck Short ] + + * SAUCE: ata: blacklist FUJITSU MHW2160BH PL + + [ Colin Ian King ] + + * ubuntu: Add dm-loop + * SAUCE: Enable speedstep for sonoma processors. + + [ Dennis Noordsij ] + + * SAUCE: Work around ACPI corruption upon suspend on some Dell machines. + + [ Fabio M. Di Nitto ] + + * SAUCE: Export gfs2 symbols required for gfs1 kernel module + + [ Matthew Garrett ] + + * SAUCE: hostap: send events on data interface as well as master + interface + + [ Michael Frey (Senior Manager, MID ] + + * SAUCE: Send HCI_RESET for Broadcomm 2046 + + [ Phillip Lougher ] + + * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets. + + [ Stefan Bader ] + + * SAUCE: (no-up) Export dm_disk function of device-mapper + * SAUCE: Restore VT fonts on switch + * SAUCE: mmc: Increase power_up deleay to fix TI readers + + [ Tim Gardner ] + + * SAUCE: Add extra headers to linux-libc-dev + * SAUCE: Catch nonsense keycodes and silently ignore + * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM + * SAUCE: Guest OS does not recognize a lun with non zero target id on + Vmware ESX Server + * SAUCE: (no-up) Take care of orinoco_cs overlap with hostap_cs + * ubuntu: Add GNBD driver + + -- Ben Collins Sat, 23 Aug 2008 15:48:35 -0400 + +linux (2.6.27-0.0) intrepid; urgency=low + + * Not uploaded, placeholder for new release + + -- Ben Collins Sat, 23 Aug 2008 15:48:35 -0400 + +linux (2.6.26-5.17) intrepid; urgency=low + + [ Ben Collins ] + + * build/abi: Add tosh_smm symbol to blacklist + + -- Ben Collins Fri, 15 Aug 2008 09:29:34 -0400 + +linux (2.6.26-5.16) intrepid; urgency=low + + [ Ben Collins ] + + * Revert "SAUCE: toshiba_acpi: Rewrote most of the proc entry bits." + * Revert "SAUCE: Update toshiba_acpi.c to version 0.19a" + * build/config: Disable in-kernel toshiba driver(s) + * ubuntu/tlsup: New driver for toshiba laptops + * build/config: Enable TLSUP driver + * SAUCE: e1000e: Fix E1000E_ENABLED logic to check for our E1000E_NEW + driver as well + * ubuntu/e1000e: Remove E1000E_ENABLED option in local config + * build/config: Update configs to have E1000E_ENABLED set + * ubuntu/prism2: Remove duplicate device + + [ Fabio M. Di Nitto ] + + * SAUCE: Export gfs2 symbols required for gfs1 kernel module + + [ Stefan Bader ] + + * SAUCE: x86: HPET rework for SB700 + - LP: #255910 + + [ Tim Gardner ] + + * Add GNBD driver + * Enable GNBD driver + * SAUCE: Add GFS driver + * SAUCE: Enable gfs driver configs + * b43: Linksys WMP54G (BCM4306/3) card in a PCI format has an SPROM + coding + + [ Upstream Kernel Changes ] + + * KVM: x86 emulator: emulate clflush + * USB: quirk PLL power down mode + + -- Ben Collins Mon, 11 Aug 2008 13:19:28 -0400 + +linux (2.6.26-5.15) intrepid; urgency=low + + [ Ben Collins ] + + * Revert "SAUCE: Add blacklist support to fix Belkin bluetooth dongle." + - Superceded by upstream changes. + * build/config: New option enabled for uvcvideo + * build/control: Add Vcs-Git meta data to control file + * SAUCE: toshiba_acpi: Rewrote most of the new code + * abi/perm-blacklist: Add emu10k1 driver to blacklist + + [ Upstream Kernel Changes ] + + * pxamci: trivial fix of DMA alignment register bit clearing + * udplite: Protection against coverage value wrap-around + * ipv6: use timer pending + * ipv6: __KERNEL__ ifdef struct ipv6_devconf + * hdlcdrv: Fix CRC calculation. + * quota: fix possible infinite loop in quota code + * isofs: fix minor filesystem corruption + * KVM: VMX: Fix a wrong usage of vmcs_config + * KVM: SVM: fix suspend/resume support + * KVM: mmu_shrink: kvm_mmu_zap_page requires slots_lock to be held + * KVM: VMX: Add ept_sync_context in flush_tlb + * KVM: x86 emulator: Fix HLT instruction + * KVM: MMU: nuke shadowed pgtable pages and ptes on memslot destruction + * KVM: MMU: Fix potential race setting upper shadow ptes on nonpae hosts + * Patch Upstream: x86 ptrace: fix PTRACE_GETFPXREGS error + * rcu: fix rcu_try_flip_waitack_needed() to prevent grace-period stall + * Fix typos from signal_32/64.h merge + * x86 reboot quirks: add Dell Precision WorkStation T5400 + * USB: fix usb serial pm counter decrement for disconnected interfaces + * x86, suspend, acpi: enter Big Real Mode + * markers: fix duplicate modpost entry + * Fix build on COMPAT platforms when CONFIG_EPOLL is disabled + * proc: fix /proc/*/pagemap some more + * cpusets: fix wrong domain attr updates + * x86: fix crash due to missing debugctlmsr on AMD K6-3 + * ide-cd: fix oops when using growisofs + * rtc-at91rm9200: avoid spurious irqs + * vmlinux.lds: move __attribute__((__cold__)) functions back into final + .text section + * ARM: fix fls() for 64-bit arguments + * tcp: Clear probes_out more aggressively in tcp_ack(). + * sparc64: Fix lockdep issues in LDC protocol layer. + * sparc64: Fix cpufreq notifier registry. + * sparc64: Do not define BIO_VMERGE_BOUNDARY. + * iop-adma: fix platform driver hotplug/coldplug + * myri10ge: do not forget to setup the single slice pointers + * myri10ge: do not use mgp->max_intr_slots before loading the firmware + * ALSA: trident - pause s/pdif output + * V4L: cx18: Upgrade to newer firmware & update documentation + * DVB: dib0700: add support for Hauppauge Nova-TD Stick 52009 + * V4L: uvcvideo: Fix a buffer overflow in format descriptor parsing + * V4L: uvcvideo: Use GFP_NOIO when allocating memory during resume + * V4L: uvcvideo: Don't free URB buffers on suspend + * V4L: uvcvideo: Make input device support optional + * V4L: uvcvideo: Add support for Medion Akoya Mini E1210 integrated + webcam + * V4L: saa7134: Copy tuner data earlier to avoid overwriting manual tuner + type + * V4L: cx23885: Bugfix for concurrent use of /dev/video0 and /dev/video1 + * DVB: cx23885: Ensure PAD_CTRL is always reset to a sensible default + * DVB: cx23885: DVB Transport cards using DVB port VIDB/TS1 did not + stream + * DVB: cx23885: Reallocated the sram to avoid concurrent VIDB/C issues + * DVB: cx23885: SRAM changes for the 885 and 887 silicon parts + * x86: fix kernel_physical_mapping_init() for large x86 systems + * eCryptfs: use page_alloc not kmalloc to get a page of memory + * UML - Fix boot crash + * ixgbe: remove device ID for unsupported device + * mpc52xx_psc_spi: fix block transfer + * tmpfs: fix kernel BUG in shmem_delete_inode + * markers: fix markers read barrier for multiple probes + * VFS: increase pseudo-filesystem block size to PAGE_SIZE + * cpufreq acpi: only call _PPC after cpufreq ACPI init funcs got called + already + * b43legacy: Release mutex in error handling code + * ath5k: don't enable MSI, we cannot handle it yet + * Fix off-by-one error in iov_iter_advance() + * Linux 2.6.26.1 + * ftrace: remove unneeded documentation + * romfs_readpage: don't report errors for pages beyond i_size + * netfilter: nf_nat_sip: c= is optional for session + * SCSI: bsg: fix bsg_mutex hang with device removal + * x86: idle process - add checking for NULL early param + * x86: io delay - add checking for NULL early param + * Close race in md_probe + * Kprobe smoke test lockdep warning + * netfilter: xt_time: fix time's time_mt()'s use of do_div() + * linear: correct disk numbering error check + * SCSI: ch: fix ch_remove oops + * NFS: Ensure we zap only the access and acl caches when setting new acls + * jbd: fix race between free buffer and commit transaction + * Input: i8042 - add Intel D845PESV to nopnp list + * Input: i8042 - add Gericom Bellagio to nomux blacklist + * Input: i8042 - add Acer Aspire 1360 to nomux blacklist + * Bluetooth: Signal user-space for HIDP and BNEP socket errors + * Add compat handler for PTRACE_GETSIGINFO + * ALSA: hda - Fix wrong volumes in AD1988 auto-probe mode + * ALSA: hda - Fix DMA position inaccuracy + * ALSA: hda - Add missing Thinkpad Z60m support + * ALSA: emu10k1 - Fix inverted Analog/Digital mixer switch on Audigy2 + * vfs: fix lookup on deleted directory + * Ath5k: fix memory corruption + * Ath5k: kill tasklets on shutdown + * sound: ensure device number is valid in snd_seq_oss_synth_make_info + * Linux 2.6.26.2 + + -- Ben Collins Sun, 03 Aug 2008 13:25:02 -0400 + +linux (2.6.26-5.14) intrepid; urgency=low + + [ Ben Collins ] + + * SAUCE: applesmc: Add MacBookAir + * build: Do not build ddeb unless we are on the buildd + * build: control: Consistency in arch fields. + * SAUCE: Update toshiba_acpi.c to version 0.19a + - LP: #77026 + * build: Added perm blacklist support and per-module support to abi-check + - Blacklist p80211 module from abi checks + * ubuntu/lirc: Get rid of drivers symlink and use real include stuff + + + [ Colin Ian King ] + + * SAUCE: acerhk module - add support for Amilo A1650g keyboard + - LP: #84159 + * SAUCE: rt2x00: Fix OOPS on failed creation of rt2x00lib workqueue + - LP: #249242 + + [ Mario Limonciello ] + + * Add LIRC back in + + [ Tim Gardner ] + + * Makefile race condition can lead to ndiswrapper build failure + - LP: #241547 + * update linux-wlan-ng (prism2_usb) to upstream version 1861 + - LP: #245026 + + [ Upstream Kernel Changes ] + + * Fix typos from signal_32/64.h merge + + -- Ben Collins Fri, 01 Aug 2008 00:05:01 -0400 + +linux (2.6.26-5.13) intrepid; urgency=low + + [ Ben Collins ] + + * build: Make makedumpfile an amd64/i386 only build-dep + * ubuntu/acerhk: Fixup assembly to compile with newer binutils + + -- Ben Collins Sat, 26 Jul 2008 16:41:50 -0400 + +linux (2.6.26-4.12) intrepid; urgency=low + + [ Ben Collins ] + + * e1000e: Upgraded module to 0.4.1.7 upstream. Placed in ubuntu/, + in-kernel driver disabled + * config: Disable e1000e in-kernel, and enable newer driver in ubuntu/ + * rfkill: Update to 1.3 drivers, and move to common location + * ubuntu: Actually link kconfig/kbuild into rfkill subdir + * config: Enable loading dsdt from initramfs + - LP: #246222 + * ubuntu: [compcache] Update to fix crashes in improper BUG() + * build: Create a retag scripts to recover tags from rebases + * build: Updates for dbg pkg + * build: Make sure no empty lines show up in debian/files + * ubuntu: atl1e: Add new driver from 2.6.27-pre-rc1 + - LP: #243894 + * sys_getcwd: Fix some brokeness introduced by AppArmor __d_path + changes + - LP: #251223 + * ubuntu: unionfs: Added v1.4 module from hardy + * build: Add sub-flavour infrastructure, and virtual subflav + + [ Eric Piel ] + + * ACPI: Allow custom DSDT tables to be loaded from initramfs + + [ Kees Cook ] + + * AppArmor: Smack VFS patches + + [ Mario Limonciello ] + + * Work around ACPI corruption upon suspend on some Dell machines. + - LP: #183033 + + [ Tim Gardner ] + + * Export usbhid_modify_dquirk for LBM module bcm5974 + - LP: #250838 + * VIA - Add VIA DRM Chrome9 3D engine + - LP: #251862 + * Define TRUE/FALSE for VIA DRM driver. + + -- Ben Collins Tue, 15 Jul 2008 12:51:39 -0400 + +linux (2.6.26-4.11) intrepid; urgency=low + + [ Ben Collins ] + + * config: Enable bcm5974 driver in all configs + + [ 2.6.26-4.10 ] + + [ Amit Kucheria ] + + * Fix typo in GSPCA Makefile and make it compile + + [ Ben Collins ] + + * ubuntu: Remove UVC driver in favor of in-kernel one (-rc9) + * config: Updates for -rc9 + * ubuntu: Add acx, prism2_usb wireless drivers + * config: Enable prism2_usb and acx drivers. + * ubuntu: Add at76 driver to build + * config: Enable at76_usb driver. + * iscsitarget: Fix prototype for bi_end_io callback. + * acx: Fix section type mismatch warnings + * fsam7400: Add sw kill switch driver + * config: Enable fsam7400 driver + * qc-usb: Added new driver + * config: Enable qc-usb driver + * drbd: Remove built-in connector usage + * drbd: Do not define idx/val for connector here + * connector.h: Add idx/val for drbd + * bcm5974: Added new driver + + [ Kees Cook ] + + * SAUCE: [AppArmor] merge with upstream subversion r1291 + * SAUCE: [AppArmor] fix typo in selinux_inode_link + * SAUCE: [AppArmor] aufs patches + + [ Michael Frey (Senior Manager, MID ] + + * SAUCE: Send HCI_RESET for Broadcomm 2046 + - LP: #241749 + + [ Tim Gardner ] + + * SAUCE: Medion Akoya Mini E1210 + + [ Upstream Kernel Changes ] + + * Revert "BAST: Remove old IDE driver" + * ARM: OMAP: DMA: Don't mark channel active in omap_enable_channel_irq + * ARM: OMAP: Correcting the gpmc prefetch control register address + * debugobjects: fix lockdep warning + * [ARM] 5115/1: pxafb: fix ifdef for command line option handling + * [ARM] 5116/1: pxafb: cleanup and fix order of failure handling + * [ARM] 5109/1: Mark rtc sa1100 driver as wakeup source before + registering it + * [ARM] Export dma_sync_sg_for_device() + * fix cgroup-inflicted breakage in block_dev.c + * [patch for 2.6.26 2/4] vfs: utimensat(): be consistent with utime() for + immutable and append-only files + * [patch for 2.6.26 1/4] vfs: utimensat(): ignore tv_sec if tv_nsec == + UTIME_OMIT or UTIME_NOW + * [patch for 2.6.26 3/4] vfs: utimensat(): fix error checking for + {UTIME_NOW,UTIME_OMIT} case + * [patch for 2.6.26 4/4] vfs: utimensat(): fix write access check for + futimens() + * [patch 1/4] vfs: path_{get,put}() cleanups + * [patch 2/4] fs: make struct file arg to d_path const + * [patch 3/4] vfs: fix ERR_PTR abuse in generic_readlink + * [patch 4/4] flock: remove unused fields from file_lock_operations + * [patch 3/3] vfs: make d_path() consistent across mount operations + * [patch 1/3] vfs: dcache sparse fixes + * [patch 2/3] vfs: dcache cleanups + * udf: Fix regression in UDF anchor block detection + * [SCSI] ses: Fix timeout + * netfilter: ip6table_mangle: don't reroute in LOCAL_IN + * [SCSI] esp: Fix OOPS in esp_reset_cleanup(). + * kernel/audit.c: nlh->nlmsg_type is gotten more than once + * audit: fix kernel-doc parameter notation + * remove useless argument type in audit_filter_user() + * Blackfin arch: fix bug - kernel boot fails when Spinlock and rw-lock + debugging enabled + * Blackfin arch: fix up section mismatch warning + * mac80211: implement EU regulatory domain + * b43: Do not return TX_BUSY from op_tx + * b43legacy: Do not return TX_BUSY from op_tx + * b43: Fix possible MMIO access while device is down + * b43legacy: Fix possible NULL pointer dereference in DMA code + * rt2x00: Fix unbalanced mutex locking + * iwlwifi: improve scanning band selection management + * [SCSI] esp: tidy up target reference counting + * [ARM] 5117/1: pxafb: fix __devinit/exit annotations + * thermal: Create CONFIG_THERMAL_HWMON=n + * ACPI: don't walk tables if ACPI was disabled + * dock: bay: Don't call acpi_walk_namespace() when ACPI is disabled. + * x86: shift bits the right way in native_read_tscp + * x86: section/warning fixes + * V4L/DVB (8004): Fix INPUT dependency at budget-ci + * V4L/DVB (8005): Fix OOPS if frontend is null + * V4L/DVB (8007): cx18/cx25840: the S-Video LUMA input can use all + In1-In8 inputs + * V4L/DVB (8008): cx18: remove duplicate audio and video input enums + * V4L/DVB (8010): em28xx: Properly register extensions for already + attached devices + * V4L/DVB (8011): em28xx: enable DVB for HVR-900 + * V4L/DVB (8012): gl861: sleep a little to avoid I2C errors + * V4L/DVB (8013): gl861: remove useless identify_state + * V4L/DVB (8015): gl861: replace non critical msleep(0) with msleep(1) to + be on the safe side + * V4L/DVB (8017): Ensure em28xx extensions only get run against devs that + support them + * V4L/DVB (8018): Add em2860 chip ID + * V4L/DVB (8020): Fix callbacks functions of saa7134_empress + * V4L/DVB (8022): saa7134: fix race between opening and closing the + device + * V4L/DVB (8026): Avoids an OOPS if dev struct can't be successfully + recovered + * V4L/DVB (8027): saa7134: Avermedia A700: only s-video and composite + input are working + * V4L/DVB (8028): Improve error messages for tda1004x attach + * V4L/DVB (8029): Improve error message at tda1004x_attach + * V4L/DVB (8034): tda18271: fix IF notch frequency handling + * V4L/DVB (8035): tda18271: dont touch EB14 if rf_cal lookup is out of + range + * V4L/DVB (8036): tda18271: toggle rf agc speed mode on TDA18271HD/C2 + only + * V4L/DVB (8037): tda18271: ensure that the thermometer is off during + channel configuration + * V4L/DVB (8039): pxa-camera: fix platform_get_irq() error handling. + * V4L/DVB (8040): soc-camera: remove soc_camera_host_class class + * V4L/DVB (8042): DVB-USB UMT-010 channel scan oops + * V4L/DVB (8043): au0828: add support for additional USB device id's + * V4L/DVB (8044): au8522: tuning optimizations + * V4L/DVB (8048): saa7134: Fix entries for Avermedia A16d and Avermedia + E506 + * V4L/DVB (8061): cx18: only select tuner / frontend modules if + !DVB_FE_CUSTOMISE + * V4L/DVB (8063): cx18: Fix unintended auto configurations in + cx18-av-core + * V4L/DVB (8066): cx18: Fix audio mux input definitions for HVR-1600 Line + In 2 and FM radio + * V4L/DVB (8067): cx18: Fix firmware load for case when digital capture + happens first + * V4L/DVB (8068): cx18: Add I2C slave reset via GPIO upon initialization + * V4L/DVB (8069): cx18: Fix S-Video and Compsite inputs for the Yuan + MPC718 and enable card entry + * V4L/DVB (8071): tda10023: Fix possible kernel oops during + initialisation + * V4L/DVB (8073): av7110: Catch another type of ARM crash + * V4L/DVB (8074): av7110: OSD transfers should not be interrupted + * V4L/DVB (8075): stv0299: Uncorrected block count and bit error rate + fixed + * V4L/DVB (8092): videodev: simplify and fix standard enumeration + * V4L/DVB (8096): au8522: prevent false-positive lock status + * V4L/DVB (8097): xc5000: check device hardware state to determine if + firmware download is needed + * V4L/DVB (8100): V4L/vivi: fix possible memory leak in vivi_fillbuff + * V4L/DVB (8108): Fix open/close race in saa7134 + * s2io: fix documentation about intr_type + * tc35815: Mark carrier-off before starting PHY + * tc35815: Fix receiver hangup on Rx FIFO overflow + * ixgbe: fix EEH recovery during reset on PPC + * igb: fix EEH recovery during reset on PPC + * e1000e: fix EEH recovery during reset on PPC + * pcnet_cs, axnet_cs: clear bogus interrupt before request_irq + * drivers/net/r6040.c: Eliminate double sizeof + * ipg: fix jumbo frame compilation + * ipg: use NULL, not zero, for pointers + * [netdrvr] 3c59x: remove irqs_disabled warning from local_bh_enable + * [netdrvr] netxen: fix netxen_pci_tbl[] breakage + * e100: Do pci_dma_sync after skb_alloc for proper operation on ixp4xx + * e1000: only enable TSO6 via ethtool when using correct hardware + * [netdrvr] Fix IOMMU overflow checking in s2io.c + * qla3xxx: Hold RTNL while calling dev_close() + * Hold RTNL while calling dev_close() + * sata_uli: hardreset is broken + * rt2x00: Fix lock dependency errror + * prism: islpci_eth.c endianness fix + * mac80211: fix an oops in several failure paths in key allocation + * firewire: fw-sbp2: fix parsing of logical unit directories + * kbuild: fix a.out.h export to userspace with O= build. + * Ensure interrupted recovery completed properly (v1 metadata plus + bitmap) + * Don't acknowlege that stripe-expand is complete until it really is. + * Fix error paths if md_probe fails. + * hamradio: remove unused variable + * tcp: calculate tcp_mem based on low memory instead of all memory + * tcp: fix for splice receive when used with software LRO + * af_unix: fix 'poll for write'/connected DGRAM sockets + * netdevice: Fix typo of dev_unicast_add() comment + * pkt_sched: ERR_PTR() ususally encodes an negative errno, not positive. + * pkt_sched: Remove CONFIG_NET_SCH_RR + * include/linux/netdevice.h: don't export MAX_HEADER to userspace + * tcp: /proc/net/tcp rto,ato values not scaled properly (v2) + * netlink: Fix some doc comments in net/netlink/attr.c + * CONNECTOR: add a proc entry to list connectors + * inet fragments: fix race between inet_frag_find and + inet_frag_secret_rebuild + * net/inet_lro: remove setting skb->ip_summed when not LRO-able + * netlabel: Fix a problem when dumping the default IPv6 static labels + * ipv6 route: Convert rt6_device_match() to use RT6_LOOKUP_F_xxx flags. + * sched: fix cpu hotplug + * Fix and clean top .gitignore + * x86: fix cpu hotplug crash + * ptrace GET/SET FPXREGS broken + * Input: add KEY_MEDIA_REPEAT definition + * Input: fix locking in force-feedback core + * [ARM] 5131/1: Annotate platform_secondary_init with trace_hardirqs_off + * ide: fix /proc/ide/ide?/mate reporting + * netfilter: nf_conntrack_tcp: fixing to check the lower bound of valid + ACK + * textsearch: fix Boyer-Moore text search bug + * hostap: don't report useless WDS frames by default + * hostap: fix sparse warnings + * mac80211: don't accept WEP keys other than WEP40 and WEP104 + * V4L/DVB (8145a): USB Video Class driver + * [IA64] Bugfix for system with 32 cpus + * [IA64] export account_system_vtime + * sched: fix divide error when trying to configure rt_period to zero + * x86: fix NODES_SHIFT Kconfig range + * block: Fix the starving writes bug in the anticipatory IO scheduler + * Properly notify block layer of sync writes + * rcu: fix hotplug vs rcu race + * I2C: S3C2410: Check ACK on byte transmission + * I2C: S3C2410: Fixup error codes returned rom a transfer. + * I2C: S3C2410: Add MODULE_ALIAS() for s3c2440 device. + * PCI: Restrict VPD read permission to root + * powerpc/bootwrapper: update for initrd with simpleImage + * i2c: Documentation: fix device matching description + * i2c: Fix bad hint about irqs in i2c.h + * powerpc/legacy_serial: Bail if reg-offset/shift properties are present + * powerpc/mpc5200: Fix lite5200b suspend/resume + * ipv4: fix sysctl documentation of time related values + * net-sched: change tcf_destroy_chain() to clear start of filter list + * net-sched: fix filter destruction in atm/hfsc qdisc destruction + * netlink: Unneeded local variable + * net: Tyop of sk_filter() comment + * netdevice: Fix wrong string handle in kernel command line parsing + * net: fib_rules: fix error code for unsupported families + * dm crypt: use cond_resched + * V4L/DVB (8178): uvc: Fix compilation breakage for the other drivers, if + uvc is selected + * PCI: Limit VPD read/write lengths for Broadcom 5706, 5708, 5709 rev. + * PCI: acpiphp: cleanup notify handler on all root bridges + * drivers/input/ff-core.c needs + * DRM/i915: only use tiled blits on 965+ + * tty: Fix inverted logic in send_break + * x86: fix Intel Mac booting with EFI + * arch/x86/mm/init_64.c: early_memtest(): fix types + * 9p: fix O_APPEND in legacy mode + * slub: Do not use 192 byte sized cache if minimum alignment is 128 byte + * Do not overwrite nr_zones on !NUMA when initialising zlcache_ptr + * [MIPS] IP32: Fix unexpected irq 71 + * [MIPS] IP22: Fix crashes due to wrong L1_CACHE_BYTES + * [MIPS] cevt-txx9: Reset timer counter on initialization + * hrtimer: prevent migration for raising softirq + * svcrpc: fix handling of garbage args + * OHCI: Fix problem if SM501 and another platform driver is selected + * USB: fix cdc-acm resume() + * USB: ehci - fix timer regression + * USB: ohci - record data toggle after unlink + * USB: mass storage: new id for US_SC_CYP_ATACB + * sisusbvga: Fix oops on disconnect. + * USB: New device ID for ftdi_sio driver + * USB: fix interrupt disabling for HCDs with shared interrupt handlers + * USB: don't lose disconnections during suspend + * USB: another option device id + * USB: add a pl2303 device id + * USB: fix Oops on loading ipaq module since 2.6.26 + * USB: adding comment for ipaq forcing number of ports + * [MIPS] Fix bug in atomic_sub_if_positive. + * xen: fix address truncation in pte mfn<->pfn conversion + * sata_sil24: add DID for another adaptec flavor + * ahci: always clear all bits in irq_stat + * libata-sff: improve HSM violation reporting + * sata_mv: safer logic for limit_warnings + * Update maintainers for powerpc + * Christoph has moved + * mm: dirty page accounting vs VM_MIXEDMAP + * rtc: rtc_read_alarm() handles wraparound + * firmware: fix the request_firmware() dummy + * serial: fix serial_match_port() for dynamic major tty-device numbers + * get_user_pages(): fix possible page leak on oom + * rtc-x1205: Fix alarm set + * rtc: fix CMOS time error after writing /proc/acpi/alarm + * pci: VT3336 can't do MSI either + * Miguel Ojeda has moved + * ext3: add missing unlock to error path in ext3_quota_write() + * ext4: add missing unlock to an error path in ext4_quota_write() + * reiserfs: add missing unlock to an error path in reiserfs_quota_write() + * ecryptfs: remove unnecessary mux from ecryptfs_init_ecryptfs_miscdev() + * lib: taint kernel in common report_bug() WARN path. + * gpio: pca953x (i2c) handles max7310 too + * fsl_diu_fb: fix build with CONFIG_PM=y, plus fix some warnings + * Update taskstats-struct document for scaled time accounting + * cciss: fix regression that no device nodes are created if no logical + drives are configured. + * delay accounting: maintainer update + * Doc*/kernel-parameters.txt: fix stale references + * hdaps: add support for various newer Lenovo thinkpads + * mn10300: export certain arch symbols required to build allmodconfig + * mn10300: provide __ucmpdi2() for MN10300 + * Introduce rculist.h + * man-pages is supported + * ntfs: update help text + * add kernel-doc for simple_read_from_buffer and memory_read_from_buffer + * w100fb: do not depend on SHARPSL + * w100fb: add 80 MHz modeline + * MFD maintainer + * cgroups: document the effect of attaching PID 0 to a cgroup + * spi: fix the read path in spidev + * doc: doc maintainers + * security: filesystem capabilities: fix fragile setuid fixup code + * security: filesystem capabilities: fix CAP_SETPCAP handling + * Alpha Linux kernel fails with inconsistent kallsyms data + * cpusets: document proc status cpus and mems allowed lists + * MAINTAINERS: update the email address of Andreas Dilger + * cciss: read config to obtain max outstanding commands per controller + * olpc: sdhci: add quirk for the Marvell CaFe's vdd/powerup issue + * olpc: sdhci: add quirk for the Marvell CaFe's interrupt timeout + * cpumask: introduce new APIs + * mm: switch node meminfo Active & Inactive pages to Kbytes + * Update MAINTAINERS file for the TPM device driver + * devcgroup: fix odd behaviour when writing 'a' to devices.allow + * doc: document the relax_domain_level kernel boot argument + * mmc: don't use DMA on newer ENE controllers + * mempolicy: mask off internal flags for userspace API + * x86 ACPI: normalize segment descriptor register on resume + * x86 ACPI: fix resume from suspend to RAM on uniprocessor x86-64 + * softlockup: print a module list on being stuck + * ide: fix hwif->gendev refcounting + * ide: ide_unregister() warm-plug bugfix + * ide: ide_unregister() locking bugfix + * ahci: give another shot at clearing all bits in irq_stat + * Fix clear_refs_write() use of struct mm_walk + * Move _RET_IP_ and _THIS_IP_ to include/linux/kernel.h + * Fix pagemap_read() use of struct mm_walk + * Linux 2.6.26-rc9 + * Revert "USB: don't explicitly reenable root-hub status interrupts" + * Revert "PCI: Correct last two HP entries in the bfsort whitelist" + * iwlwifi: fix incorrect 5GHz rates reported in monitor mode + * iwlwifi: drop skb silently for Tx request in monitor mode + * libertas: support USB persistence on suspend/resume (resend) + * tcp: net/ipv4/tcp.c needs linux/scatterlist.h + * tcp: fix a size_t < 0 comparison in tcp_read_sock + * bridge: fix use-after-free in br_cleanup_bridges() + * Add missing skb->dev assignment in Frame Relay RX code + * forcedeth: fix lockdep warning on ethtool -s + * ehea: fix might sleep problem + * ehea: add MODULE_DEVICE_TABLE + * ehea: fix race condition + * ehea: Access iph->tot_len with correct endianness + * pasemi_mac: Access iph->tot_len with correct endianness + * ibm_newemac: Fixes kernel crashes when speed of cable connected changes + * ibm_newemac: Fixes entry of short packets + * fs_enet: restore promiscuous and multicast settings in restart() + * can: add sanity checks + * x86: KVM guest: Add memory clobber to hypercalls + * KVM: IOAPIC: Fix level-triggered irq injection hang + * [SCSI] erase invalid data returned by device + * pxamci: fix byte aligned DMA transfers + * vsprintf: split out '%s' handling logic + * vsprintf: split out '%p' handling logic + * vsprintf: add infrastructure support for extended '%p' specifiers + * vsprintf: add support for '%pS' and '%pF' pointer formats + * powerpc: Fix unterminated of_device_id array in legacy_serial.c + * [UML] fix gcc ICEs and unresolved externs + * ocfs2/dlm: Fixes oops in dlm_new_lockres() + * hostap_cs: correct poor NULL checks in suspend/resume routines + * drivers/net/wireless/iwlwifi/iwl-3945.c Fix type issue on 64bit + * mac80211: move netif_carrier_on to after + ieee80211_bss_info_change_notify + * mac80211: Only flush workqueue when last interface was removed + * zd1211rw: add ID for AirTies WUS-201 + * ssb-pcicore: Fix IRQ-vector init on embedded devices + * mac80211: don't report selected IBSS when not found + * crypto: tcrypt - Fix memory leak in test_cipher + * sctp: Mark the tsn as received after all allocations finish + * [S390] protect _PAGE_SPECIAL bit against mprotect + * irda: via-ircc proper dma freeing + * irda: New device ID for nsc-ircc + * irda: Fix netlink error path return value + * [SCSI] mptspi: fix oops in mptspi_dv_renegotiate_work() + * Correct hash flushing from huge_ptep_set_wrprotect() + * ide: add __ide_default_irq() inline helper + * palm_bk3710: fix IDECLK period calculation + * it8213: fix return value in it8213_init_one() + * [MIPS] Atlas, decstation: Fix section mismatches triggered by + defconfigs + * [MIPS] Fix 32bit kernels on R4k with 128 byte cache line size + * NFS: Fix readdir cache invalidation + * SUNRPC: Fix a double-free in rpcbind + * SUNRPC: Fix an rpcbind breakage for the case of IPv6 lookups + * reiserfs: discard prealloc in reiserfs_delete_inode + * Fix broken fix for fsl-diu-db + * RDMA/cxgb3: Fix regression caused by class_device -> device conversion + * ipv6: fix race between ipv6_del_addr and DAD timer + * sctp: Add documentation for sctp sysctl variable + * kernel/printk.c: Made printk_recursion_bug_msg static. + * powerpc: Add missing reference to coherent_dma_mask + * rc80211_pid: Fix fast_start parameter handling + * rt2x00: Disable synchronization during initialization + * zd1211rw: stop beacons on remove_interface + * libertas: fix memory alignment problems on the blackfin + * netfilter: nf_conntrack_tcp: fix endless loop + * netfilter: nf_nat_snmp_basic: fix a range check in NAT for SNMP + * md: ensure all blocks are uptodate or locked when syncing + * sched: fix cpu hotplug + * x86: fix /dev/mem compatibility under PAT + * crypto: chainiv - Invoke completion function + * ocfs2: Fix flags in ocfs2_file_lock + * kernel/kprobes.c: Made kprobe_blacklist static. + * arch/x86/kernel/.gitignore: Added vmlinux.lds to .gitignore file + because it shouldn't be tracked. + * ftrace: Documentation + * Fix PREEMPT_RCU without HOTPLUG_CPU + * sched: fix cpu hotplug, cleanup + * exec: fix stack excutability without PT_GNU_STACK + * slub: Fix use-after-preempt of per-CPU data structure + * Documentation: clarify tcp_{r,w}mem sysctl docs + * ip: sysctl documentation cleanup + * tcp: correct kcalloc usage + * ipv4: fib_trie: Fix lookup error return + * netlabel: netlink_unicast calls kfree_skb on error path by itself + * ipv6: missed namespace context in ipv6_rthdr_rcv + * xfrm: Add a XFRM_STATE_AF_UNSPEC flag to xfrm_usersa_info + * tun: Persistent devices can get stuck in xoff state + * tpm: add Intel TPM TIS device HID + * rapidio: fix device reference counting + * Fix name of Russell King in various comments + * rtc: fix reported IRQ rate for when HPET is enabled + * libata-acpi: filter out DIPM enable + * Added Targa Visionary 1000 IDE adapter to pata_sis.c + * libata-acpi: don't call sleeping function from invalid context + * Fix reference counting race on log buffers + * [SCSI] ipr: Fix HDIO_GET_IDENTITY oops for SATA devices + * IPMI: return correct value from ipmi_write + * x86: fix ldt limit for 64 bit + * [SCSI] fusion: default MSI to disabled for SPI and FC controllers + * [SCSI] bsg: fix oops on remove + * drivers/char/pcmcia/ipwireless/hardware.c fix resource leak + * drivers/isdn/i4l/isdn_common.c fix small resource leak + * fbdev: bugfix for multiprocess defio + * serial8250: sanity check nr_uarts on all paths. + * ov7670: clean up ov7670_read semantics + * rtc-fm3130: fix chip naming + * rtc-pcf8563: add chip id + * OProfile kernel maintainership changes + * frv: fix irqs_disabled() to return an int, not an unsigned long + * cifs: fix inode leak in cifs_get_inode_info_unix + * cifs: fix wksidarr declaration to be big-endian friendly + * cpusets, hotplug, scheduler: fix scheduler domain breakage + * Documentation/HOWTO: correct wrong kernel bugzilla FAQ URL + * devcgroup: always show positive major/minor num + * devcgroup: fix permission check when adding entry to child cgroup + * Linux 2.6.26 + + -- Ben Collins Mon, 14 Jul 2008 13:41:50 -0400 + +linux (2.6.26-3.9) intrepid; urgency=low + + * abi: Add dca and ioatdma to modules.ignore + + [ 2.6.26-3.8 ] + + [ Ben Collins ] + + * ubuntu: Add heci driver 3.2.0.24 + * ubuntu: Add heci to kconfig/kbuild + * config: Enable heci module on all flavours + * dm-bbr: Update to get it to compile with 2.6.26 + * config: Enable dm-bbr + * ubuntu: Add some media drivers + * config: Enable misc media drivers + * udeb: Switch to uvesafb in fb-modules + * abi: Add more modules to ignore (known) + + [ 2.6.26-3.7 ] + + [Amit Kucheria] + + * SAUCE: make fc transport removal of target configurable + - LP: #163075 + * SAUCE: pm: Config option to disable handling of console during + suspend/resume + + [Ben Collins] + + * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps + * SAUCE: irda: Default to dongle type 9 on IBM hardware + * SAUCE: tulip: Let dmfe handle davicom on non-sparc + * SAUCE: tulip: Define ULI PCI ID's + * SAUCE: version: Implement version_signature proc file. + * build: Cleanup arches + * build: Remove remnants of unused binary-custom infrastructure + * build: Remove disable_d_i (not needed) and cleanup ppa build stuff + * ubuntu: New modules, acer-acpi + * build: Remove -virtual, and rebuild configs + * ubuntu: Add drbd module + * acer-acpi: Fix makefile + * x86/Kconfig: Fix missing quote for ubuntu Kconfig source + * ubuntu: Add iscsitarget module + * ubuntu: Added Amiga FS driver + * ubuntu: Add squashfs driver + * ubuntu: Remove asfs (Amiga FS). Need to be in linux-ports instead + * squashfs: Move headers to real include directory + * build/configs: The Great Config Consistency Check of 2008 + * ubuntu: Move third-party includes to ubuntu/include + * ubuntu: Add aufs module + * ubuntu: Added atl2 driver + * ubuntu: Add dm-radi4-5 driver + * build: Add CONFIG_DEBUG_SECTION_MISMATCH=y to get old style warnings + from build + * ubuntu/Makefile: Fixup dm-raid4-5 and add kludge for kbuild + * squashfs: Fixes for VFS changes + * ubuntu/dm-raid4-5: Fixups for moved/renamed headers/functions in core + md + * ubuntu: Add ndiswrapper driver + * d-i: Update module listings + * build: Disable xd block device (ancient) + * ndiswrapper: Fixup makefile + * d-i: Remove efi-modules. The only module, efivars, is built-in + * build: Remove install-source, obsolete and caused build failure + * Ubuntu-2.6.26-1.3 + * build: linux-doc rules got broken when disabling html side. Fixed now. + * Ubuntu-2.6.26-1.4 + * x86: Update to -rc6 allows CONFIG_PCI_OLPC to work with PCI_GOANY + * d-i: Make virtio-ring optional (it's built-in on i386) + * Ubuntu-2.6.26-1.4 + * Ubuntu-2.6.26-1.5 + * config: Enable DVB devices + * ubuntu/aufs: Make aufs a bool config, since it needs to be built-in + * config: Build aufs into the kernels + * build: Fix arguments passed to link-headers script + * config: Disable early printk + * d-i: Move isofs to storage-core and kill st (scsi tape) from list + * config: Enable non-promiscuous access to /dev/mem + * x86: Add option to disable decompression info messages + * config: Enable no-bz-chatter config options + * build: Re-add linux-source package + * d-i: Re-add socket-modules. Accidentally removed + - LP: #241295 + * Ubuntu-2.6.26-2.6 + * Use makedumpfile to generate a vmcoreinfo file. + * build: Build-Depend on makedumpfile for vmcoreinfo generation + * build: Remove debug print from git-ubuntu-log + * Updated configs for -rc7 + * build: postinst, do not call depmod with -F + * config: Enable rtc-cmos as a built-in driver. + * control: Provide ndiswrapper-modules-1.9 + * build: Generate vmcoreinfo in image build for crashdumps without debug + image + * config: Disable vesafb, since we'll prefer uvesafb + * build: Copy uvesafb module to initrd mod directory + * abi-check: New, more robust script + * config: Enable heap randomization by default + * abi-check: Cleanup output and call with perl (not $SHELL) + * abi: Ignore missing vesafb (known) + * config: Disable pcspkr (in favor of snd-pcsp) + * swap: Add notify_swap_entry_free callback for compcache + * compcache: Added ram backed compressed swap module + * ubuntu: Enable kbuild and kconfig for compcache + * config: Enable compcache and tlsf allocator as modules + * config: Updated for -rc8. Disables XEN on i386 + * config: Switch i386-server to 64G, enable PAE, 64-bit res, and XEN + * ubuntu: Add misc drivers from hardy lum + * ubuntu: Enable build of misc/ subdir + * config: Enable misc drivers + * aufs: Fix warning about single non-string-literal arg to printf style + function + * drivers: Remove some duplicate device entries in various modules + * config: Disable some duplicate drivers + * keyspan: Remove duplicate device ID's + * check-aliases: Cleanup output, and fix rolling checks + * ubuntu: Disable dm-bbr for now + * dm-bbr: First cut at forward portiong. Still needs work. + * ubuntu: Disable dm-bbr in kbuild/kconfig + + [Chuck Short] + + * SAUCE: ata: blacklist FUJITSU MHW2160BH PL + - LP: #175834 + * SAUCE: [USB]: add ASUS LCM to the blacklist + + [Colin Ian King] + + * SAUCE: airprime.c supports more devices + - LP: #208250 + * SAUCE: Enable speedstep for sonoma processors. + - LP: #132271 + * Add dm-loop + * Add dm-loop BOM + + [Kyle McMartin] + + * SAUCE: fix orinoco_cs oops + + [Mario Limonciello] + + * SAUCE: Enable Reset and SCO workaround on Dell 410 BT adapter + + [Matthew Garrett] + + * SAUCE: hostap: send events on data interface as well as master + interface + + [Phillip Lougher] + + * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets. + + [Stefan Bader] + + * SAUCE: Export dm_disk function of device-mapper + * SAUCE: Restore VT fonts on switch + * SAUCE: Always use SCO protocol (disable eSCO support) Bug: #39414 + * SAUCE: mmc: Increase power_up deleay to fix TI readers OriginalAuthor: + Pascal Terjan Bug: #137686 + * SAUCE: Add blacklist support to fix Belkin bluetooth dongle. Bug: + #140511 + * SAUCE: Lower warning level of pci resource allocation messages. Bug: + 159241 + * SAUCE: Lower message level for PCI memory and I/O allocation. + - LP: #159241 + * Modify log generation to catch bug numbers when adding with git-am. + + [Tim Gardner] + + * Added the debian directory. Ignore: yes + * Add support for UBUNTUINCLUDE Ignore: yes + * LUM headers go in /usr/src Ignore: yes + * First pass at 2.6.25 configs Ignore: yes + * i386 -generic builds. Ignore: yes + * SAUCE: Increase CONFIG_IDE_MAX_HWIFS to 8 (from 4) + * SAUCE: Add extra headers to linux-libc-dev OriginalAuthor: Soren Hansen + OriginalLocation: + https://lists.ubuntu.com/archives/kernel-team/2007-November/001891.html + * Set CONFIG_DEVKMEM=n Ignore: yes + * Enabled ALSA and CGROUPS for i386 Ignore: yes + * Enabled amd64 configs. Ignore: yes + * CONFIG_STANDALONE=n Ignore: yes + * CONFIG_BLK_DEV_4DRIVES=n for i386 Ignore: yes + * CONFIG: CONFIG_DEFAULT_RELATIME=y for all flavours. Ignore: yes + * Set CONFIG_EDD_OFF=y Ignore: yes + * SAUCE: Blacklist Bluetooth Dell Wireless 370 for SCO MTU + OriginalAuthor: Mario Limonciello Bug: + #209715 + * SAUCE: Catch nonsense keycodes and silently ignore + * SAUCE: frame buffer regression - screen blank except for blinking + cursor after fbcon vtswitch OriginalAuthor: Matthew Garrett + Bug: #201591 + * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM + OriginalAuthor: Klaus S. Madsen + OriginalAuthor: Chuck Short + * SAUCE: Guest OS does not recognize a lun with non zero target id on + Vmware ESX Server + * SAUCE: orinoco_cs.ko missing + * Set CONFIG_FB_VESA=m for i386/amd64 Ignore: yes + * Set CONFIG_PM_DISABLE_CONSOLE=y for all flavours Ignore: yes + * Thorough review of amd64 -generic config Ignore: yes + * Build PPA packages for Hardy until the Intrepid archive is opened. + * Deleted obsolete flavours Ignore: yes + * Don't build docs for PPA Ignore: yes + * Build all standard packages in PPA. Ignore: yes + * Remove duplicate USB ids + * SAUCE: DVB-USB UMT-010 driver oops on install Bug: #115284 + * Update configs after rebase to 2.6.26-rc1 Ignore: yes + * Update configs after rebase Ignore: yes + * Disable V4L until the build issues get ironed out. Ignore: yes + * Update configs after rebase. Ignore: yes + * Another device enable pass Ignore: yes + * Update configs after merge. Ignore: yes + * SAUCE: fn key doesn't work in hardy with macbook pro fourth generation + (4,1) + - LP: #207127 + * Enabled CONFIG_CIFS_DFS_UPCALL=y and CONFIG_CIFS_UPCALL=y + - LP: #236830 + + [Upstream Kernel Changes] + + * Revert "[WATCHDOG] hpwdt: Add CFLAGS to get driver working" + * mac80211: detect driver tx bugs + * hwmon: (lm85) Fix function RANGE_TO_REG() + * hwmon: (adt7473) Initialize max_duty_at_overheat before use + * hwmon: Update the sysfs interface documentation + * hwmon: (abituguru3) Identify Abit AW8D board as such + * hwmon: (w83791d) new maintainer + * hwmon: (abituguru3) update driver detection + * hwmon: (lm75) sensor reading bugfix + * ipv6: Remove options header when setsockopt's optlen is 0 + * ipv6: Drop packets for loopback address from outside of the box. + * sched: rt: dont stop the period timer when there are tasks wanting to + run + * sched: fix wait_for_completion_timeout() spurious failure under heavy + load + * x86: fix NULL pointer deref in __switch_to + * xen: Use wmb instead of rmb in xen_evtchn_do_upcall(). + * xen: mask unwanted pte bits in __supported_pte_mask + * xen: don't drop NX bit + * sched: refactor wait_for_completion_timeout() + * Ext4: Fix online resize block group descriptor corruption + * [IA64] SN2: security hole in sn2_ptc_proc_write + * alpha: fix module load failures on smp (bug #10926) + * alpha: link failure fix + * alpha: fix compile failures with gcc-4.3 (bug #10438) + * alpha: resurrect Cypress IDE quirk + * pppoe: warning fix + * sctp: Make sure N * sizeof(union sctp_addr) does not overflow. + * netns: Don't receive new packets in a dead network namespace. + * Add return value to reserve_bootmem_node() + * Slab: Fix memory leak in fallback_alloc() + * Fix performance regression on lmbench select benchmark + * ALSA: aw2 - Fix Oops at initialization + * ALSA: sb - Fix wrong assertions + * futexes: fix fault handling in futex_lock_pi + * IB/mthca: Clear ICM pages before handing to FW + * tty_driver: Update required method documentation + * removed unused var real_tty on n_tty_ioctl() + * Fix ZERO_PAGE breakage with vmware + * mm: fix race in COW logic + * NFS: Reduce the NFS mount code stack usage. + * NFS: Fix filehandle size comparisons in the mount code + * NFS: nfs_updatepage(): don't mark page as dirty if an error occurred + * alpha: fix compile error in arch/alpha/mm/init.c + * KVM: Fix race between timer migration and vcpu migration + * KVM: close timer injection race window in __vcpu_run + * KVM: MMU: Fix rmap_write_protect() hugepage iteration bug + * KVM: MMU: large page update_pte issue with non-PAE 32-bit guests + (resend) + * KVM: MMU: Fix oops on guest userspace access to guest pagetable + * KVM: ioapic: fix lost interrupt when changing a device's irq + * KVM: VMX: Fix host msr corruption with preemption enabled + * [GFS2] BUG: unable to handle kernel paging request at ffff81002690e000 + * xen: remove support for non-PAE 32-bit + * kgdb: documentation update - remove kgdboe + * kgdb: sparse fix + * [IA64] Fix boot failure on ia64/sn2 + * [IA64] Handle count==0 in sn2_ptc_proc_write() + * [IA64] Eliminate NULL test after alloc_bootmem in iosapic_alloc_rte() + * [GFS2] fix gfs2 block allocation (cleaned up) + * x86: Add structs and functions for paravirt clocksource + * x86: Make xen use the paravirt clocksource structs and functions + * KVM: Make kvm host use the paravirt clocksource structs + * x86: KVM guest: Use the paravirt clocksource structs and functions + * KVM: Remove now unused structs from kvm_para.h + * enable bus mastering on i915 at resume time + * Linux 2.6.26-rc8 + * # Ubuntu external driver commit. + * # Ubuntu commit template. + + -- Ben Collins Sat, 21 Jun 2008 09:05:15 -0400 + +linux (2.6.26-2.6) intrepid; urgency=low + + [Ben Collins] + + * Revert "SAUCE: Export symbols for aufs (in lum) (not needed) + * config: Enable DVB devices + * ubuntu/aufs: Make aufs a bool config, since it needs to be built-in + * config: Build aufs into the kernels + * build: Fix arguments passed to link-headers script + * config: Disable early printk + * d-i: Move isofs to storage-core and kill st (scsi tape) from list + * config: Enable non-promiscuous access to /dev/mem + * x86: Add option to disable decompression info messages + * config: Enable no-bz-chatter config options + * build: Re-add linux-source package + * d-i: Re-add socket-modules. Accidentally removed + - LP: #241295 + + [Colin Ian King] + + * Add dm-loop + + [Tim Gardner] + + * Revert "SAUCE: USB bluetooth device 0x0e5e:0x6622 floods errors to + syslog (merged upstream) + + -- Ben Collins Mon, 16 Jun 2008 10:56:01 -0400 + +linux (2.6.26-1.5) intrepid; urgency=low + + * d-i: Make virtio-ring optional (it's built-in on i386) + * Rebased on 2.6.26-rc6 + + [Ubuntu-2.6.26-1.4 Changes below] + + * build: linux-doc rules got broken when disabling html side. Fixed now. + + [Ubuntu-2.6.26-1.3 Changes below] + + * build: Remove install-source, obsolete and caused build failure + + [Ubuntu-2.6.26-1.2 Changes below] + + * Remove efi-modules from d-i module list (efivars is built-in). Caused a + build failure. + * Patch to arch/x86/xen/time.c to remove __divdi3 usage (build failure on + i386). + + [Ubuntu-2.6.26-1.1 Changes below] + + [Amit Kucheria] + + * SAUCE: make fc transport removal of target configurable + * SAUCE: Add AGP support for Radeon Mobility 9000 chipset + * SAUCE: pm: Config option to disable handling of console during + suspend/resume + + [Ben Collins] + + * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps + * SAUCE: irda: Default to dongle type 9 on IBM hardware + * SAUCE: tulip: Let dmfe handle davicom on non-sparc + * SAUCE: tulip: Define ULI PCI ID's + * SAUCE: version: Implement version_signature proc file. + * build: Remove remnants of unused binary-custom infrastructure + * mmc_block: Fix bad allocation on 64-bit (zero len array) + * ubuntu: New modules, acer-acpi + * build: Remove -virtual, and rebuild configs + * ubuntu: Add drbd module + * ubuntu: Add iscsitarget module + * ubuntu: Add squashfs driver + * build/configs: The Great Config Consistency Check of 2008 + * ubuntu: Add aufs module + * ubuntu: Added atl2 driver + * ubuntu: Add dm-radi4-5 driver + * build: Add CONFIG_DEBUG_SECTION_MISMATCH=y to get old style warnings + from build + * squashfs: Fixes for VFS changes + * ubuntu/dm-raid4-5: Fixups for moved/renamed headers/functions in core + md + * ubuntu: Add ndiswrapper driver + * d-i: Update module listings + + [Chuck Short] + + * SAUCE: ata: blacklist FUJITSU MHW2160BH PL + * SAUCE: [USB]: add ASUS LCM to the blacklist + + [Colin Ian King] + + * SAUCE: Enable speedstep for sonoma processors. + * SAUCE: airprime.c supports more devices + + [Kyle McMartin] + + * SAUCE: fix orinoco_cs oops + + [Mario Limonciello] + + * SAUCE: Enable Reset and SCO workaround on Dell 410 BT adapter + + [Matthew Garrett] + + * SAUCE: hostap: send events on data interface as well as master + interface + + [Phillip Lougher] + + * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets. + + [Stefan Bader] + + * SAUCE: Export dm_disk function of device-mapper + * SAUCE: Restore VT fonts on switch + * SAUCE: Always use SCO protocol (disable eSCO support) Bug: #39414 + * SAUCE: mmc: Increase power_up deleay to fix TI readers + * SAUCE: Add blacklist support to fix Belkin bluetooth dongle. + * SAUCE: Lower warning level of pci resource allocation messages. + * SAUCE: Lower message level for PCI memory and I/O allocation. + - LP: #159241 + * Modify log generation to catch bug numbers when adding with git-am. + + [Tim Gardner] + + * SAUCE: hdaps module does not load on Thinkpad T61P + * SAUCE: Add extra headers to linux-libc-dev + * SAUCE: Export symbols for aufs (in lum). + * SAUCE: USB bluetooth device 0x0e5e:0x6622 floods errors to syslog + * SAUCE: Blacklist Bluetooth Dell Wireless 370 for SCO MTU + * SAUCE: Catch nonsense keycodes and silently ignore + * SAUCE: frame buffer regression - screen blank except for blinking + cursor after fbcon vtswitch + * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM + * SAUCE: Guest OS does not recognize a lun with non zero target id on + Vmware ESX Server + * SAUCE: Modualrize vesafb + * SAUCE: DVB-USB UMT-010 driver oops on install + * SAUCE: fn key doesn't work in hardy with macbook pro fourth generation + (4,1) + - LP: #207127 + + -- Ben Collins Wed, 11 Jun 2008 05:28:35 -0400 --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/exclude-modules.sparc +++ linux-fsl-imx51-2.6.31/debian.master/d-i/exclude-modules.sparc @@ -0,0 +1,10 @@ +efi-modules +nic-pcmcia-modules +pcmcia-modules +pcmcia-storage-modules +irda-modules +floppy-modules +fb-modules +acpi-modules +virtio-modules +char-modules --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/package-list +++ linux-fsl-imx51-2.6.31/debian.master/d-i/package-list @@ -0,0 +1,177 @@ +Package: kernel-image + +Package: char-modules +Depends: kernel-image +Priority: standard +Description: Character module support + +Package: fat-modules +Depends: kernel-image +Priority: standard +Description: FAT filesystem support + This includes Windows FAT and VFAT support. + +Package: fb-modules +Depends: kernel-image +Priority: standard +Description: Framebuffer modules + +Package: firewire-core-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: Firewire (IEEE-1394) Support + +Package: floppy-modules +Depends: kernel-image +Priority: standard +Description: Floppy driver support + +Package: fs-core-modules +Depends: kernel-image +Priority: standard +Provides: jfs-modules, reiserfs-modules, xfs-modules +Description: Base filesystem modules + This includes jfs, reiserfs and xfs. + +Package: fs-secondary-modules +Depends: kernel-image, fat-modules +Priority: standard +Provides: ntfs-modules, hfs-modules +Description: Extra filesystem modules + This includes support for Windows NTFS and MacOS HFS/HFSPlus + +Package: input-modules +Depends: kernel-image, usb-modules +Priority: standard +Description: Support for various input methods + +Package: irda-modules +Depends: kernel-image, nic-shared-modules +Priority: standard +Description: Support for Infrared protocols + +Package: md-modules +Depends: kernel-image +Priority: standard +Description: Multi-device support (raid, device-mapper, lvm) + +Package: nic-modules +Depends: kernel-image, nic-shared-modules, virtio-modules +Priority: standard +Description: Network interface support + +Package: nic-pcmcia-modules +Depends: kernel-image, nic-shared-modules, nic-modules +Priority: standard +Description: PCMCIA network interface support + +Package: nic-usb-modules +Depends: kernel-image, nic-shared-modules, usb-modules +Priority: standard +Description: USB network interface support + +Package: nic-shared-modules +Depends: kernel-image, crypto-modules +Priority: standard +Description: nic shared modules + This package contains modules which support nic modules + +Package: parport-modules +Depends: kernel-image +Priority: standard +Description: Parallel port support + +Package: pata-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: PATA support modules + +Package: pcmcia-modules +Depends: kernel-image +Priority: standard +Description: PCMCIA Modules + +Package: pcmcia-storage-modules +Depends: kernel-image, scsi-modules +Priority: standard +Description: PCMCIA storage support + +Package: plip-modules +Depends: kernel-image, nic-shared-modules, parport-modules +Priority: standard +Description: PLIP (parallel port) networking support + +Package: ppp-modules +Depends: kernel-image, nic-shared-modules, serial-modules +Priority: standard +Description: PPP (serial port) networking support + +Package: sata-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: SATA storage support + +Package: scsi-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: SCSI storage support + +Package: serial-modules +Depends: kernel-image +Priority: standard +Description: Serial port support + +Package: storage-core-modules +Depends: kernel-image +Priority: standard +Provides: loop-modules +Description: Core storage support + Includes core SCSI, LibATA, USB-Storage. Also includes related block + devices for CD, Disk and Tape medium (and IDE Floppy). + +Package: usb-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: Core USB support + +Package: nfs-modules +Priority: standard +Depends: kernel-image +Description: NFS filesystem drivers + Includes the NFS client driver, and supporting modules. + +Package: block-modules +Priority: standard +Depends: kernel-image, storage-core-modules, parport-modules, virtio-modules +Description: Block storage devices + This package contains the block storage devices, including DAC960 and + paraide. + +Package: message-modules +Priority: standard +Depends: kernel-image, storage-core-modules, scsi-modules +Description: Fusion and i2o storage modules + This package containes the fusion and i2o storage modules. + +Package: crypto-modules +Priority: extra +Depends: kernel-image +Description: crypto modules + This package contains crypto modules. + +Package: virtio-modules +Priority: standard +Depends: kernel-image +Description: VirtIO Modules + Includes modules for VirtIO (virtual machine, generally kvm guests) + +Package: socket-modules +Depends: kernel-image +Priority: standard +Description: Unix socket support + +Package: mouse-modules +Depends: kernel-image, input-modules, usb-modules +Priority: extra +Description: Mouse support + This package contains mouse drivers for the Linux kernel. --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/exclude-modules.powerpc +++ linux-fsl-imx51-2.6.31/debian.master/d-i/exclude-modules.powerpc @@ -0,0 +1,5 @@ +efi-modules +fb-modules +acpi-modules +virtio-modules +char-modules --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/kernel-versions.in +++ linux-fsl-imx51-2.6.31/debian.master/d-i/kernel-versions.in @@ -0,0 +1,15 @@ +# arch version flavour installedname suffix bdep +amd64 PKGVER-ABINUM generic PKGVER-ABINUM-generic - + +i386 PKGVER-ABINUM generic PKGVER-ABINUM-generic - + +lpia PKGVER-ABINUM lpia PKGVER-ABINUM-lpia + +# Ports +# arch version flavour installedname suffix bdep +ia64 PKGVER-ABINUM ia64 PKGVER-ABINUM-ia64 - + +powerpc PKGVER-ABINUM powerpc PKGVER-ABINUM-powerpc - +powerpc PKGVER-ABINUM powerpc64-smp PKGVER-ABINUM-powerpc64-smp - + +sparc PKGVER-ABINUM sparc64 PKGVER-ABINUM-sparc64 - --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/exclude-modules.ia64 +++ linux-fsl-imx51-2.6.31/debian.master/d-i/exclude-modules.ia64 @@ -0,0 +1,5 @@ +irda-modules +floppy-modules +fb-modules +virtio-modules +char-modules --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-sparc/block-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-sparc/block-modules @@ -0,0 +1,9 @@ +aoe +cciss +comm +cpqarray ? +DAC960 +nbd +sx8 +umem +virtio_blk ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-sparc/message-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-sparc/message-modules @@ -0,0 +1,13 @@ +mptbase +mptctl +mptfc +mptlan +mptsas +mptscsih +mptspi +i2o_block +i2o_bus +i2o_config ? +i2o_core +i2o_proc +i2o_scsi --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-powerpc/scsi-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-powerpc/scsi-modules @@ -0,0 +1,116 @@ +# SCSI +raid_class ? +scsi_transport_spi ? +scsi_transport_fc ? +scsi_transport_iscsi ? +scsi_transport_sas ? +iscsi_tcp ? +libiscsi ? +amiga7xx ? +a3000 ? +a2091 ? +gvp11 ? +mvme147 ? +sgiwd93 ? +cyberstorm ? +cyberstormII ? +blz2060 ? +blz1230 ? +fastlane ? +oktagon_esp_mod ? +atari_scsi ? +mac_scsi ? +mac_esp ? +sun3_scsi ? +mvme16x ? +bvme6000 ? +sim710 ? +advansys ? +psi240i ? +BusLogic ? +dpt_i2o ? +u14-34f ? +ultrastor ? +aha152x ? +aha1542 ? +aha1740 ? +aic7xxx_old ? +ips ? +fd_mcs ? +fdomain ? +in2000 ? +g_NCR5380 ? +g_NCR5380_mmio ? +NCR53c406a ? +NCR_D700 ? +NCR_Q720_mod ? +sym53c416 ? +qlogicfas408 ? +qla1280 ? +pas16 ? +seagate ? +seagate ? +t128 ? +dmx3191d ? +dtc ? +zalon7xx ? +eata_pio ? +wd7000 ? +mca_53c9x ? +ibmmca ? +eata ? +dc395x ? +tmscsim ? +megaraid ? +atp870u ? +esp ? +gdth ? +initio ? +a100u2w ? +qlogicpti ? +ide-scsi ? +mesh ? +mac53c94 ? +pluto ? +dec_esp ? +3w-xxxx ? +3w-9xxx ? +ppa ? +imm ? +jazz_esp ? +sun3x_esp ? +fcal ? +lasi700 ? +nsp32 ? +ipr ? +hptiop ? +stex ? +osst ? +sg ? +ch ? +scsi_debug ? +aacraid ? +aic7xxx ? +aic79xx ? +aic94xx ? +arcmsr ? +acornscsi_mod ? +arxescsi ? +cumana_1 ? +cumana_2 ? +ecoscsi ? +oak ? +powertec ? +eesox ? +ibmvscsic ? +libsas ? +lpfc ? +megaraid_mm ? +megaraid_mbox ? +megaraid_sas ? +qla2xxx ? +sym53c8xx ? +qla4xxx ? +mvsas ? +sr_mod ? +sd_mod ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-powerpc/storage-core-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-powerpc/storage-core-modules @@ -0,0 +1,13 @@ +# Core stacks +usb-storage ? + +# Block level + +# Loop modules +cryptoloop + +# Needs to be here for better cdrom initrd layout +isofs + +ps3stor_lib ? +ps3rom ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-powerpc/block-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-powerpc/block-modules @@ -0,0 +1,31 @@ +aoe +aten +bpck +bpck6 ? +cciss +comm +cpqarray ? +DAC960 +dstr +epat +epia +fit2 +fit3 +friq +frpw +kbic +ktti +nbd +on20 +on26 +paride +pcd +pd +pf +pg +ps3disk ? +ps3vram ? +pt +sx8 +umem +virtio_blk ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-powerpc/message-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-powerpc/message-modules @@ -0,0 +1,13 @@ +mptbase +mptctl +mptfc +mptlan +mptsas +mptscsih +mptspi +i2o_block +i2o_bus +i2o_config ? +i2o_core +i2o_proc +i2o_scsi --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules-powerpc/nic-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules-powerpc/nic-modules @@ -0,0 +1,152 @@ +3c359 ? +3c501 ? +3c503 ? +3c505 ? +3c507 ? +3c509 ? +3c515 ? +3c523 ? +3c527 ? +3c59x ? +8139cp ? +8139too ? +82596 ? +abyss ? +ac3200 ? +adm8211 ? +airo ? +airport ? +amd8111e ? +arc4 ? +arcnet ? +arc-rawmode ? +arc-rimi ? +arlan ? +at1700 ? +atl1 ? +atl1e ? +atl2 ? +atmel ? +atmel_pci ? +b44 ? +bcm43xx ? +bcm43xx-mac80211 ? +bmac ? +bnx2 ? +bnx2x ? +bonding ? +cassini ? +com20020 ? +com20020-pci ? +com90io ? +com90xx ? +cs89x0 ? +de2104x ? +de4x5 ? +de600 ? +de620 ? +defxx ? +depca ? +dl2k ? +dmfe ? +dummy ? +e100 ? +e1000 ? +e1000e ? +e2100 ? +eepro ? +eepro100 ? +eexpress ? +epic100 ? +eql ? +es3210 ? +eth16i ? +ewrk3 ? +fealnx ? +forcedeth ? +igb ? +hamachi ? +hermes ? +hp ? +hp100 ? +hp-plus ? +ibmtr ? +ipddp ? +ipw2100 ? +ipw2200 ? +ipw3945 ? +ixgb ? +lance ? +lanstreamer ? +lasi_82596 ? +lne390 ? +lp486e ? +mace ? +mv643xx_eth ? +myri_sbus ? +natsemi ? +ne ? +ne2 ? +ne2k-pci ? +ne3210 ? +netconsole ? +netxen_nic ? +ni5010 ? +ni52 ? +ni65 ? +niu ? +ns83820 ? +olympic ? +orinoco ? +orinoco_pci ? +orinoco_plx ? +orinoco_tmd ? +pcnet32 ? +prism54 ? +ps3_gelic ? +r8169 ? +rate_control ? +rfc1051 ? +rfc1201 ? +rrunner ? +rt2400 ? +rt2500 ? +rt61pci ? +s2io ? +shaper ? +sis190 ? +sis900 ? +spidernet ? +skfp ? +skge ? +sk98lin ? +sky2 ? +smc9194 ? +smc-ultra ? +smc-ultra32 ? +starfire ? +strip ? +sunbmac ? +sundance ? +sungem ? +sungem_phy ? +sunhme ? +sunlance ? +sunqe ? +sunvnet ? +tg3 ? +tlan ? +tms380tr ? +tmspci ? +tulip ? +tun ? +typhoon ? +uli526x ? +via-rhine ? +via-velocity ? +virtio_net ? +wavelan ? +wd ? +winbond-840 ? +yellowfin ? +znet ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/fb-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/fb-modules @@ -0,0 +1,3 @@ +fbcon +vesafb +vga16fb --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/pata-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/pata-modules @@ -0,0 +1,3 @@ +pata_cs5535 ? +pata_it8213 +pata_ninja32 --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/nic-pcmcia-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/nic-pcmcia-modules @@ -0,0 +1,19 @@ +3c574_cs ? +3c589_cs ? +airo_cs ? +atmel_cs ? +axnet_cs ? +com20020_cs ? +fmvj18x_cs ? +ibmtr_cs ? +netwave_cs ? +nmclan_cs ? +orinoco_cs ? +pcnet_cs ? +ray_cs ? +smc91c92_cs ? +wavelan_cs ? +wl3501_cs ? +xirc2ps_cs ? +xircom_cb ? +xircom_tulip_cb ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/sata-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/sata-modules @@ -0,0 +1,2 @@ +sata_via +sata_mv --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/usb-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/usb-modules @@ -0,0 +1,9 @@ +ehci-hcd ? +isp116x-hcd +isp1760 +ohci-hcd ? +r8a66597-hcd +sl811_cs +sl811-hcd +u132-hcd +uhci-hcd ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/crypto-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/crypto-modules @@ -0,0 +1,8 @@ +aes_generic +blowfish +twofish +serpent +sha256_generic +cbc +ecb +crc32c --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/scsi-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/scsi-modules @@ -0,0 +1,114 @@ +# SCSI +raid_class ? +scsi_transport_spi ? +scsi_transport_fc ? +scsi_transport_iscsi ? +scsi_transport_sas ? +iscsi_tcp ? +libiscsi ? +amiga7xx ? +a3000 ? +a2091 ? +gvp11 ? +mvme147 ? +sgiwd93 ? +cyberstorm ? +cyberstormII ? +blz2060 ? +blz1230 ? +fastlane ? +oktagon_esp_mod ? +atari_scsi ? +mac_scsi ? +mac_esp ? +sun3_scsi ? +mvme16x ? +bvme6000 ? +sim710 ? +advansys ? +psi240i ? +BusLogic ? +dpt_i2o ? +u14-34f ? +ultrastor ? +aha152x ? +aha1542 ? +aha1740 ? +aic7xxx_old ? +ips ? +fd_mcs ? +fdomain ? +in2000 ? +g_NCR5380 ? +g_NCR5380_mmio ? +NCR53c406a ? +NCR_D700 ? +NCR_Q720_mod ? +sym53c416 ? +qlogicfas408 ? +qla1280 ? +pas16 ? +seagate ? +seagate ? +t128 ? +dmx3191d ? +dtc ? +zalon7xx ? +eata_pio ? +wd7000 ? +mca_53c9x ? +ibmmca ? +eata ? +dc395x ? +tmscsim ? +megaraid ? +atp870u ? +esp ? +gdth ? +initio ? +a100u2w ? +qlogicpti ? +ide-scsi ? +mesh ? +mac53c94 ? +pluto ? +dec_esp ? +3w-xxxx ? +3w-9xxx ? +ppa ? +imm ? +jazz_esp ? +sun3x_esp ? +fcal ? +lasi700 ? +nsp32 ? +ipr ? +hptiop ? +stex ? +osst ? +sg ? +ch ? +scsi_debug ? +aacraid ? +aic7xxx ? +aic79xx ? +aic94xx ? +arcmsr ? +acornscsi_mod ? +arxescsi ? +cumana_1 ? +cumana_2 ? +ecoscsi ? +oak ? +powertec ? +eesox ? +ibmvscsic ? +libsas ? +lpfc ? +megaraid_mm ? +megaraid_mbox ? +megaraid_sas ? +qla2xxx ? +sym53c8xx ? +qla4xxx ? +mvsas ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/fat-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/fat-modules @@ -0,0 +1,7 @@ +fat +vfat + +# Supporting modules ? +nls_cp437 ? +nls_iso8859-1 ? +nls_utf8 ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/storage-core-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/storage-core-modules @@ -0,0 +1,10 @@ +# Core stacks +usb-storage ? + +# Block level + +# Loop modules +cryptoloop + +# Needs to be here for better cdrom initrd layout +isofs --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/pcmcia-storage-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/pcmcia-storage-modules @@ -0,0 +1,6 @@ +pata_pcmcia +qlogic_cs +fdomain_cs +aha152x_cs ? +nsp_cs ? +sym53c500_cs --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/firewire-core-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/firewire-core-modules @@ -0,0 +1,4 @@ +ieee1394 +ohci1394 +sbp2 +eth1394 --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/irda-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/irda-modules @@ -0,0 +1,30 @@ +act200l-sir +actisys-sir +ali-ircc +donauboe ? +esi-sir +girbil-sir +ircomm +ircomm-tty +irda +irda-usb +irlan +irnet +irport ? +irtty-sir +kingsun-sir +ks959-sir +ksdazzle-sir +litelink-sir +ma600-sir +mcp2120-sir +mcs7780 +nsc-ircc +old_belkin-sir +sir-dev +smsc-ircc2 +stir4200 +tekram-sir +via-ircc +vlsi_ir +w83977af_ir --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/block-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/block-modules @@ -0,0 +1,29 @@ +aoe +aten +bpck +bpck6 ? +cciss +comm +cpqarray +DAC960 +dstr +epat +epia +fit2 +fit3 +friq +frpw +kbic +ktti +nbd +on20 +on26 +paride +pcd +pd +pf +pg +pt +sx8 +umem +virtio_blk ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/mouse-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/mouse-modules @@ -0,0 +1,2 @@ +psmouse +usbmouse ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/floppy-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/floppy-modules @@ -0,0 +1 @@ +floppy --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/plip-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/plip-modules @@ -0,0 +1 @@ +plip --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/ppp-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/ppp-modules @@ -0,0 +1,6 @@ +ppp_async +ppp_deflate +ppp_mppe +pppoe +pppox +ppp_synctty --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/fs-core-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/fs-core-modules @@ -0,0 +1,4 @@ +jfs +reiserfs +xfs +squashfs --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/char-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/char-modules @@ -0,0 +1 @@ +intel-agp --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/input-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/input-modules @@ -0,0 +1,21 @@ +hid-a4tech ? +hid-apple ? +hid-belkin ? +hid-bright ? +hid-cherry ? +hid-chicony ? +hid-cypress ? +hid-dell ? +hid-ezkey ? +hid-gyration ? +hid-logitech ? +hid-microsoft ? +hid-monterey ? +hid-petalynx ? +hid-pl ? +hid-samsung ? +hid-sony ? +hid-sunplus ? +hid-tmff ? +hid-zpff ? +usbhid --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/message-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/message-modules @@ -0,0 +1,13 @@ +mptbase +mptctl +mptfc +mptlan +mptsas +mptscsih +mptspi +i2o_block +i2o_bus +i2o_config +i2o_core +i2o_proc +i2o_scsi --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/serial-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/serial-modules @@ -0,0 +1,3 @@ +generic_serial +serial_cs +synclink_cs --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/nic-usb-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/nic-usb-modules @@ -0,0 +1,11 @@ +catc ? +kaweth ? +pegasus ? +prism2_usb ? +rtl8150 ? +usbnet ? +zd1211rw ? +zd1201 ? +rt2500usb ? +rt73usb ? +rt2570 ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/nfs-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/nfs-modules @@ -0,0 +1,4 @@ +nfs +nfs_acl ? +lockd +sunrpc --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/virtio-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/virtio-modules @@ -0,0 +1,4 @@ +virtio_balloon +virtio_pci +virtio_ring ? +virtio-rng --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/md-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/md-modules @@ -0,0 +1,13 @@ +dm-crypt +dm-zero +faulty +linear +multipath +raid0 +raid1 +raid10 +raid456 + +# Extras +dm-raid4-5 ? +dm-loop ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/nic-shared-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/nic-shared-modules @@ -0,0 +1,22 @@ +# PHY +8390 +mii + +# CRC modules +crc-ccitt +crc-itu-t +libcrc32c + +# mac80211 stuff +mac80211 +cfg80211 + +# rt2x00 lib (since rt2x00 is split across usb/pci/cb +rt2x00lib + +# Wireless 802.11 modules +lib80211 +cfg80211 +lib80211_crypt_ccmp +lib80211_crypt_tkip +lib80211_crypt_wep --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/nic-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/nic-modules @@ -0,0 +1,152 @@ +3c359 ? +3c501 ? +3c503 ? +3c505 ? +3c507 ? +3c509 ? +3c515 ? +3c523 ? +3c527 ? +3c59x ? +8139cp ? +8139too ? +82596 ? +abyss ? +ac3200 ? +adm8211 ? +airo ? +airport ? +amd8111e ? +arc4 ? +arcnet ? +arc-rawmode ? +arc-rimi ? +arlan ? +at1700 ? +atl1 ? +atl1e ? +atl2 ? +atmel ? +atmel_pci ? +b44 ? +bcm43xx ? +bcm43xx-mac80211 ? +bmac ? +bnx2 ? +bnx2x ? +bonding ? +cassini ? +com20020 ? +com20020-pci ? +com90io ? +com90xx ? +cs89x0 ? +de2104x ? +de4x5 ? +de600 ? +de620 ? +defxx ? +depca ? +dl2k ? +dmfe ? +dummy ? +e100 ? +e1000 ? +e1000e ? +e2100 ? +eepro ? +eepro100 ? +eexpress ? +epic100 ? +eql ? +es3210 ? +eth16i ? +ewrk3 ? +fealnx ? +forcedeth ? +igb ? +ps3_gelic ? +hamachi ? +hermes ? +hp ? +hp100 ? +hp-plus ? +ibmtr ? +ipddp ? +ipw2100 ? +ipw2200 ? +ipw3945 ? +ixgb ? +lance ? +lanstreamer ? +lasi_82596 ? +lne390 ? +lp486e ? +mace ? +mv643xx_eth ? +myri_sbus ? +natsemi ? +ne ? +ne2 ? +ne2k-pci ? +ne3210 ? +netconsole ? +netxen_nic ? +ni5010 ? +ni52 ? +ni65 ? +niu ? +ns83820 ? +olympic ? +orinoco ? +orinoco_pci ? +orinoco_plx ? +orinoco_tmd ? +pcnet32 ? +prism54 ? +r8169 ? +rate_control ? +rfc1051 ? +rfc1201 ? +rrunner ? +rt2400 ? +rt2500 ? +rt61pci ? +s2io ? +shaper ? +sis190 ? +sis900 ? +spidernet ? +skfp ? +skge ? +sk98lin ? +sky2 ? +smc9194 ? +smc-ultra ? +smc-ultra32 ? +starfire ? +strip ? +sunbmac ? +sundance ? +sungem ? +sungem_phy ? +sunhme ? +sunlance ? +sunqe ? +sunvnet ? +tg3 ? +tlan ? +tms380tr ? +tmspci ? +tulip ? +tun ? +typhoon ? +uli526x ? +via-rhine ? +via-velocity ? +virtio_net ? +wavelan ? +wd ? +winbond-840 ? +yellowfin ? +znet ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/pcmcia-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/pcmcia-modules @@ -0,0 +1,8 @@ +i82092 +i82365 ? +pcmcia +pcmcia_core +pd6729 +rsrc_nonstatic +tcic ? +yenta_socket --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/parport-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/parport-modules @@ -0,0 +1,2 @@ +parport +parport_pc --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/modules/fs-secondary-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/modules/fs-secondary-modules @@ -0,0 +1,4 @@ +fuse ? +ntfs ? +hfs ? +hfsplus ? --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/firmware/scsi-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/firmware/scsi-modules @@ -0,0 +1,3 @@ +qlogic/1040.bin +qlogic/12160.bin +qlogic/1280.bin --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/firmware/README.txt +++ linux-fsl-imx51-2.6.31/debian.master/d-i/firmware/README.txt @@ -0,0 +1,4 @@ +# +# Place the names of udeb modules into this directory that require +# runtime firmware. +# --- linux-fsl-imx51-2.6.31.orig/debian.master/d-i/firmware/nic-modules +++ linux-fsl-imx51-2.6.31/debian.master/d-i/firmware/nic-modules @@ -0,0 +1,9 @@ +bnx2/bnx2-mips-06-4.6.16.fw ? +bnx2/bnx2-mips-09-4.6.17.fw ? +bnx2/bnx2-rv2p-06-4.6.16.fw ? +bnx2/bnx2-rv2p-09-4.6.15.fw ? +bnx2x-e1-4.8.53.0.fw ? +bnx2x-e1h-4.8.53.0.fw ? +e100/d101m_ucode.bin +e100/d101s_ucode.bin +e100/d102e_ucode.bin --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/i386.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/i386.mk @@ -0,0 +1,12 @@ +build_arch = i386 +header_arch = x86_64 +asm_link = x86 +defconfig = defconfig +flavours = generic generic-pae 386 +build_image = bzImage +kernel_file = arch/$(build_arch)/boot/bzImage +install_file = vmlinuz + +generic-pae_sub = virtual + +loader = grub --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/ia64.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/ia64.mk @@ -0,0 +1,18 @@ +build_arch = ia64 +header_arch = $(build_arch) +asm_link = $(build_arch) +defconfig = defconfig +flavours = ia64 +build_image = vmlinux +kernel_file = $(build_image) +install_file = vmlinuz +compress_file = yes + +loader = elilo + +skipdbg = true +no_dumpfile = true +skipabi = true +skipmodule = true + +family=ports --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/2-binary-arch.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/2-binary-arch.mk @@ -0,0 +1,313 @@ +# We don't want make removing intermediary stamps +.SECONDARY : + +# Prepare the out-of-tree build directory + +prepare-%: $(stampdir)/stamp-prepare-% + @# Empty for make to be happy +$(stampdir)/stamp-prepare-%: target_flavour = $* +$(stampdir)/stamp-prepare-%: $(commonconfdir)/config.common.$(family) $(archconfdir)/config.common.$(arch) $(archconfdir)/config.flavour.% + @echo "Preparing $*..." + install -d $(builddir)/build-$* + touch $(builddir)/build-$*/ubuntu-build + cat $^ | sed -e 's/.*CONFIG_VERSION_SIGNATURE.*/CONFIG_VERSION_SIGNATURE="Ubuntu $(release)-$(revision)-$*"/' > $(builddir)/build-$*/.config + find $(builddir)/build-$* -name "*.ko" | xargs rm -f + $(kmake) O=$(builddir)/build-$* silentoldconfig prepare scripts + touch $@ + + +# Do the actual build, including image and modules +build-%: $(stampdir)/stamp-build-% + @# Empty for make to be happy +$(stampdir)/stamp-build-%: target_flavour = $* +$(stampdir)/stamp-build-%: $(stampdir)/stamp-prepare-% + @echo "Building $*..." + $(kmake) O=$(builddir)/build-$* $(conc_level) $(build_image) + $(kmake) O=$(builddir)/build-$* $(conc_level) modules + @touch $@ + +# Install the finished build +install-%: pkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$* +install-%: bindoc = $(pkgdir)/usr/share/doc/$(bin_pkg_name)-$* +install-%: dbgpkgdir = $(CURDIR)/debian/$(dbg_pkg_name)-$* +install-%: basepkg = $(hdrs_pkg_name) +install-%: hdrdir = $(CURDIR)/debian/$(basepkg)-$*/usr/src/$(basepkg)-$* +install-%: target_flavour = $* +install-%: $(stampdir)/stamp-build-% checks-% + dh_testdir + dh_testroot + dh_clean -k -p$(bin_pkg_name)-$* + dh_clean -k -p$(hdrs_pkg_name)-$* + dh_clean -k -p$(dbg_pkg_name)-$* + + # The main image + # compress_file logic required because not all architectures + # generate a zImage automatically out of the box +ifeq ($(compress_file),) + install -m644 -D $(builddir)/build-$*/$(kernel_file) \ + $(pkgdir)/boot/$(install_file)-$(abi_release)-$* +else + install -d $(pkgdir)/boot + gzip -c9v $(builddir)/build-$*/$(kernel_file) > \ + $(pkgdir)/boot/$(install_file)-$(abi_release)-$* + chmod 644 $(pkgdir)/boot/$(install_file)-$(abi_release)-$* +endif + + install -m644 $(builddir)/build-$*/.config \ + $(pkgdir)/boot/config-$(abi_release)-$* + install -m644 $(abidir)/$* \ + $(pkgdir)/boot/abi-$(abi_release)-$* + install -m644 $(builddir)/build-$*/System.map \ + $(pkgdir)/boot/System.map-$(abi_release)-$* +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux +endif + + $(kmake) O=$(builddir)/build-$* modules_install \ + INSTALL_MOD_STRIP=1 INSTALL_MOD_PATH=$(pkgdir)/ \ + INSTALL_FW_PATH=$(pkgdir)/lib/firmware/$(abi_release)-$* + +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux +endif + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/build + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/source + + # Some initramfs-tools specific modules + install -d $(pkgdir)/lib/modules/$(abi_release)-$*/initrd + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko ]; then\ + ln -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko \ + $(pkgdir)/lib/modules/$(abi_release)-$*/initrd/; \ + fi + + # Now the image scripts + install -d $(pkgdir)/DEBIAN + for script in postinst postrm preinst prerm; do \ + sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g' \ + -e 's/=L/$(loader)/g' -e 's@=B@$(build_arch)@g' \ + $(DEBIAN)/control-scripts/$$script > $(pkgdir)/DEBIAN/$$script; \ + chmod 755 $(pkgdir)/DEBIAN/$$script; \ + done + + # Install the full changelog. + install -d $(bindoc) + cat $(DEBIAN)/changelog $(DEBIAN)/changelog.historical | \ + gzip -9 >$(bindoc)/changelog.Debian.old.gz + chmod 644 $(bindoc)/changelog.Debian.old.gz + +ifneq ($(skipsub),true) + for sub in $($(*)_sub); do \ + if ! (TO=$$sub FROM=$* ABI_RELEASE=$(abi_release) $(SHELL) \ + $(DEBIAN)/scripts/sub-flavour); then exit 1; fi; \ + /sbin/depmod -b debian/$(bin_pkg_name)-$$sub \ + -ea -F debian/$(bin_pkg_name)-$$sub/boot/System.map-$(abi_release)-$* \ + $(abi_release)-$*; \ + install -d debian/$(bin_pkg_name)-$$sub/DEBIAN; \ + for script in postinst postrm preinst prerm; do \ + sed -e 's/=V/$(abi_release)-$*/g' \ + -e 's/=K/$(install_file)/g' \ + -e 's/=L/$(loader)/g' \ + -e 's@=B@$(build_arch)@g' \ + $(DEBIAN)/control-scripts/$$script > \ + debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\ + chmod 755 debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\ + done; \ + done +endif + +ifneq ($(skipdbg),true) + # Debug image is simple + install -m644 -D $(builddir)/build-$*/vmlinux \ + $(dbgpkgdir)/usr/lib/debug/boot/vmlinux-$(abi_release)-$* + $(kmake) O=$(builddir)/build-$* modules_install \ + INSTALL_MOD_PATH=$(dbgpkgdir)/usr/lib/debug + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/build + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/source + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/modules.* + rm -fr $(dbgpkgdir)/usr/lib/debug/lib/firmware +endif + + # The flavour specific headers image + # TODO: Would be nice if we didn't have to dupe the original builddir + install -d -m755 $(hdrdir) + cat $(builddir)/build-$*/.config | \ + sed -e 's/.*CONFIG_DEBUG_INFO=.*/# CONFIG_DEBUG_INFO is not set/g' > \ + $(hdrdir)/.config + chmod 644 $(hdrdir)/.config + $(kmake) O=$(hdrdir) silentoldconfig prepare scripts + # We'll symlink this stuff + rm -f $(hdrdir)/Makefile + rm -rf $(hdrdir)/include2 + # powerpc seems to need some .o files for external module linking. Add them in. +ifeq ($(arch),powerpc) + mkdir -p $(hdrdir)/arch/powerpc/lib + cp $(builddir)/build-$*/arch/powerpc/lib/*.o $(hdrdir)/arch/powerpc/lib +endif + # Script to symlink everything up + $(SHELL) $(DEBIAN)/scripts/link-headers "$(hdrdir)" "$(basepkg)" "$*" + # Setup the proper asm symlink + rm -f $(hdrdir)/include/asm + ln -s asm-$(asm_link) $(hdrdir)/include/asm + # The build symlink + install -d debian/$(basepkg)-$*/lib/modules/$(abi_release)-$* + ln -s /usr/src/$(basepkg)-$* \ + debian/$(basepkg)-$*/lib/modules/$(abi_release)-$*/build + # And finally the symvers + install -m644 $(builddir)/build-$*/Module.symvers \ + $(hdrdir)/Module.symvers + + # Now the header scripts + install -d $(CURDIR)/debian/$(basepkg)-$*/DEBIAN + for script in postinst; do \ + sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g' \ + $(DEBIAN)/control-scripts/headers-$$script > \ + $(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script; \ + chmod 755 $(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script; \ + done + + # At the end of the package prep, call the tests + DPKG_ARCH="$(arch)" KERN_ARCH="$(build_arch)" FLAVOUR="$*" \ + VERSION="$(abi_release)" REVISION="$(revision)" \ + PREV_REVISION="$(prev_revision)" ABI_NUM="$(abinum)" \ + PREV_ABI_NUM="$(prev_abinum)" BUILD_DIR="$(builddir)/build-$*" \ + INSTALL_DIR="$(pkgdir)" SOURCE_DIR="$(CURDIR)" \ + run-parts -v $(DEBIAN)/tests + + # + # Remove files which are generated at installation by postinst, except for + # modules.order. + # + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.order + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.* + mv $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.order \ + $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order + +headers_tmp := $(CURDIR)/debian/tmp-headers +headers_dir := $(CURDIR)/debian/linux-libc-dev + +hmake := $(MAKE) -C $(CURDIR) O=$(headers_tmp) SUBLEVEL=$(SUBLEVEL) \ + EXTRAVERSION=-$(abinum) INSTALL_HDR_PATH=$(headers_tmp)/install \ + SHELL="$(SHELL)" ARCH=$(header_arch) + +install-arch-headers: + dh_testdir + dh_testroot + dh_clean -k -plinux-libc-dev + + rm -rf $(headers_tmp) + install -d $(headers_tmp) $(headers_dir)/usr/include/ + + $(hmake) $(defconfig) + mv $(headers_tmp)/.config $(headers_tmp)/.config.old + sed -e 's/^# \(CONFIG_MODVERSIONS\) is not set$$/\1=y/' \ + -e 's/.*CONFIG_LOCALVERSION_AUTO.*/# CONFIG_LOCALVERSION_AUTO is not set/' \ + $(headers_tmp)/.config.old > $(headers_tmp)/.config + $(hmake) silentoldconfig + $(hmake) headers_install + + ( cd $(headers_tmp)/install/include/ && \ + find . -name '.' -o -name '.*' -prune -o -print | \ + cpio -pvd --preserve-modification-time \ + $(headers_dir)/usr/include/ ) + + rm -rf $(headers_tmp) + +binary-arch-headers: install-arch-headers + dh_testdir + dh_testroot + + dh_installchangelogs -plinux-libc-dev + dh_installdocs -plinux-libc-dev + dh_compress -plinux-libc-dev + dh_fixperms -plinux-libc-dev + dh_installdeb -plinux-libc-dev + dh_gencontrol -plinux-libc-dev + dh_md5sums -plinux-libc-dev + dh_builddeb -plinux-libc-dev + +binary-%: pkgimg = $(bin_pkg_name)-$* +binary-%: pkghdr = $(hdrs_pkg_name)-$* +binary-%: dbgpkg = $(dbg_pkg_name)-$* +binary-%: install-% + dh_testdir + dh_testroot + + dh_installchangelogs -p$(pkgimg) + dh_installdocs -p$(pkgimg) + dh_compress -p$(pkgimg) + dh_fixperms -p$(pkgimg) + dh_installdeb -p$(pkgimg) + dh_gencontrol -p$(pkgimg) + dh_md5sums -p$(pkgimg) + dh_builddeb -p$(pkgimg) -- -Zbzip2 -z9 + + dh_installchangelogs -p$(pkghdr) + dh_installdocs -p$(pkghdr) + dh_compress -p$(pkghdr) + dh_fixperms -p$(pkghdr) + dh_shlibdeps -p$(pkghdr) + dh_installdeb -p$(pkghdr) + dh_gencontrol -p$(pkghdr) + dh_md5sums -p$(pkghdr) + dh_builddeb -p$(pkghdr) + +ifneq ($(skipsub),true) + @set -e; for sub in $($(*)_sub); do \ + pkg=$(bin_pkg_name)-$$sub; \ + dh_installchangelogs -p$$pkg; \ + dh_installdocs -p$$pkg; \ + dh_compress -p$$pkg; \ + dh_fixperms -p$$pkg; \ + dh_shlibdeps -p$$pkg; \ + dh_installdeb -p$$pkg; \ + dh_gencontrol -p$$pkg; \ + dh_md5sums -p$$pkg; \ + dh_builddeb -p$$pkg; \ + done +endif + +ifneq ($(skipdbg),true) + dh_installchangelogs -p$(dbgpkg) + dh_installdocs -p$(dbgpkg) + dh_compress -p$(dbgpkg) + dh_fixperms -p$(dbgpkg) + dh_installdeb -p$(dbgpkg) + dh_gencontrol -p$(dbgpkg) + dh_md5sums -p$(dbgpkg) + dh_builddeb -p$(dbgpkg) + + # Hokay...here's where we do a little twiddling... + # Renaming the debug package prevents it from getting into + # the primary archive, and therefore prevents this very large + # package from being mirrored. It is instead, through some + # archive admin hackery, copied to http://ddebs.ubuntu.com. + # + mv ../$(dbgpkg)_$(release)-$(revision)_$(arch).deb \ + ../$(dbgpkg)_$(release)-$(revision)_$(arch).ddeb + set -e; \ + if grep -qs '^Build-Debug-Symbols: yes$$' /CurrentlyBuilding; then \ + sed -i '/^$(dbgpkg)_/s/\.deb /.ddeb /' debian/files; \ + else \ + grep -v '^$(dbgpkg)_.*$$' debian/files > debian/files.new; \ + mv debian/files.new debian/files; \ + fi + # Now, the package wont get into the archive, but it will get put + # into the debug system. +endif + +$(stampdir)/stamp-flavours: + @echo $(flavours) > $@ + +binary-debs: $(stampdir)/stamp-flavours $(addprefix binary-,$(flavours)) \ + binary-arch-headers + +build-arch: $(addprefix build-,$(flavours)) + +binary-arch-deps = binary-debs +ifeq ($(AUTOBUILD),) +binary-arch-deps += binary-udebs +endif +binary-arch: $(binary-arch-deps) --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/0-common-vars.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/0-common-vars.mk @@ -0,0 +1,147 @@ +# +# The source package name will be the first token from $(DEBIAN)/changelog +# +src_pkg_name=$(shell sed -n '1s/^\(.*\) (.*).*$$/\1/p' $(DEBIAN)/changelog) + +# Get some version info +release := $(shell sed -n '1s/^$(src_pkg_name).*(\(.*\)-.*).*$$/\1/p' $(DEBIAN)/changelog) +revisions := $(shell sed -n 's/^$(src_pkg_name)\ .*($(release)-\(.*\)).*$$/\1/p' $(DEBIAN)/changelog | tac) +revision ?= $(word $(words $(revisions)),$(revisions)) +prev_revisions := $(filter-out $(revision),0.0 $(revisions)) +prev_revision := $(word $(words $(prev_revisions)),$(prev_revisions)) + +family=ubuntu + +# This is an internally used mechanism for the daily kernel builds. It +# creates packages whose ABI is suffixed with a minimal representation of +# the current git HEAD sha. If .git/HEAD is not present, then it uses the +# uuidgen program, +# +# AUTOBUILD can also be used by anyone wanting to build a custom kernel +# image, or rebuild the entire set of Ubuntu packages using custom patches +# or configs. +AUTOBUILD= + +# +# This is a way to support some external variables. A good example is +# a local setup for ccache and distcc See LOCAL_ENV_CC and +# LOCAL_ENV_DISTCC_HOSTS in the definition of kmake. +# For example: +# LOCAL_ENV_CC="ccache distcc" +# LOCAL_ENV_DISTCC_HOSTS="localhost 10.0.2.5 10.0.2.221" +# +-include $(CURDIR)/../.karmic-env + +ifneq ($(AUTOBUILD),) +skipabi = true +skipmodule = true +skipdbg = true +gitver=$(shell if test -f .git/HEAD; then cat .git/HEAD; else uuidgen; fi) +gitverpre=$(shell echo $(gitver) | cut -b -3) +gitverpost=$(shell echo $(gitver) | cut -b 38-40) +abi_suffix = -$(gitverpre)$(gitverpost) +endif + +ifneq ($(NOKERNLOG),) +ubuntu_log_opts += --no-kern-log +endif +ifneq ($(PRINTSHAS),) +ubuntu_log_opts += --print-shas +endif + +# +# The debug packages are ginormous, so you probably want to skip +# building them (as a developer). +# +ifeq ($(wildcard /CurrentlyBuilding),) +skipdbg=true +endif + +abinum := $(shell echo $(revision) | sed -e 's/\..*//')$(abi_suffix) +prev_abinum := $(shell echo $(prev_revision) | sed -e 's/\..*//')$(abi_suffix) +abi_release := $(release)-$(abinum) + +uploadnum := $(shell echo $(revision) | sed -e 's/.*\.//') +ifneq ($(wildcard /CurrentlyBuilding),) + uploadnum := $(uploadnum)-Ubuntu +endif + +# We force the sublevel to be exactly what we want. The actual source may +# be an in development git tree. We want to force it here instead of +# committing changes to the top level Makefile +SUBLEVEL := $(shell echo $(release) | awk -F. '{print $$3}') + +arch := $(shell dpkg-architecture -qDEB_HOST_ARCH) +abidir := $(CURDIR)/$(DEBIAN)/abi/$(release)-$(revision)/$(arch) +prev_abidir := $(CURDIR)/$(DEBIAN)/abi/$(release)-$(prev_revision)/$(arch) +commonconfdir := $(CURDIR)/$(DEBIAN)/config +archconfdir := $(CURDIR)/$(DEBIAN)/config/$(arch) +builddir := $(CURDIR)/debian/build +stampdir := $(CURDIR)/debian/stamps + +# +# The binary package name always starts with linux-image-$KVER-$ABI.$UPLOAD_NUM. There +# are places that you'll find linux-image hard coded, but I guess thats OK since the +# assumption that the binary package always starts with linux-image will never change. +# +bin_base_pkg_name=linux-image +bin_pkg_name=$(bin_base_pkg_name)-$(abi_release) +dbg_pkg_name=$(bin_base_pkg_name)-debug-$(abi_release) +hdrs_pkg_name=$(src_pkg_name)-headers-$(abi_release) +# +# The generation of content in the doc package depends on both 'AUTOBUILD=' and +# 'do_doc_package_content=true'. There are usually build errors during the development +# cycle, so its OK to leave 'do_doc_package_content=false' until those build +# failures get sorted out. Finally, the doc package doesn't really need to be built +# for developer testing (its kind of slow), so only do it if on a buildd. +ifeq ($(wildcard /CurrentlyBuilding),) +do_doc_package_content=false +endif +doc_pkg_name=$(src_pkg_name)-doc + +# +# Similarly with the linux-source package, you need not build it as a developer. Its +# somewhat I/O intensive and utterly useless. +# +ifneq ($(wildcard /CurrentlyBuilding),) +do_linux_source_content=true +endif + +# Support parallel= in DEB_BUILD_OPTIONS (see #209008) +# +# These 2 environment variables set the -j value of the kernel build. For example, +# CONCURRENCY_LEVEL=16 fakeroot $(DEBIAN)/rules binary-debs +# or +# DEB_BUILD_OPTIONS=parallel=16 fakeroot $(DEBIAN)/rules binary-debs +# +# The default is to use the number of CPUs. +# +COMMA=, +DEB_BUILD_OPTIONS_PARA = $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS)))) +ifneq (,$(DEB_BUILD_OPTIONS_PARA)) + CONCURRENCY_LEVEL := $(DEB_BUILD_OPTIONS_PARA) +endif + +ifeq ($(CONCURRENCY_LEVEL),) + # Check the environment + CONCURRENCY_LEVEL := $(shell echo $$CONCURRENCY_LEVEL) + # No? Then build with the number of CPUs on the host. + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := $(shell expr `getconf _NPROCESSORS_ONLN` \* 1) + endif + # Oh hell, give 'em one + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := 1 + endif +endif + +conc_level = -j$(CONCURRENCY_LEVEL) + +# target_flavour is filled in for each step +kmake = make ARCH=$(build_arch) \ + EXTRAVERSION=-$(abinum)-$(target_flavour) \ + CONFIG_DEBUG_SECTION_MISMATCH=y SUBLEVEL=$(SUBLEVEL) \ + KBUILD_BUILD_VERSION="$(uploadnum)" +ifneq ($(LOCAL_ENV_CC),) +kmake += CC=$(LOCAL_ENV_CC) DISTCC_HOSTS=$(LOCAL_ENV_DISTCC_HOSTS) +endif --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/1-maintainer.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/1-maintainer.mk @@ -0,0 +1,121 @@ +# The following targets are for the maintainer only! do not run if you don't +# know what they do. + +.PHONY: printenv updateconfigs printchanges insertchanges startnewrelease diffupstream help updateportsconfigs editportsconfigs + +help: + @echo "These are the targets in addition to the normal $(DEBIAN) ones:" + @echo + @echo " printenv : Print some variables used in the build" + @echo + @echo " updateconfigs : Update core arch configs" + @echo + @echo " editconfigs : Update core arch configs interractively" + @echo " genconfigs : Generate core arch configs in CONFIGS/*" + @echo + @echo " updateportsconfigs : Update ports arch configs" + @echo + @echo " editportsconfigs : Update ports arch configs interactivly" + @echo " genportconfigs : Generate ports arch configs in CONFIGS/*" + @echo + @echo " printchanges : Print the current changelog entries (from git)" + @echo + @echo " insertchanges : Insert current changelog entries (from git)" + @echo + @echo " startnewrelease : Start a new changelog set" + @echo + @echo " diffupstream : Diff stock kernel code against upstream (git)" + @echo + @echo " help : If you are kernel hacking, you need the professional" + @echo " version of this" + @echo + @echo "Environment variables:" + @echo + @echo " NOKERNLOG : Do not add upstream kernel commits to changelog" + @echo " CONCURRENCY_LEVEL=X" + @echo " : Use -jX for kernel compile" + @echo " PRINTSHAS : Include SHAs for commits in changelog" + +updateconfigs: + dh_testdir; + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig oldconfig + rm -rf build + +editconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig editconfig + rm -rf build + +genconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig genconfig + rm -rf build + +updateportsconfigs: + dh_testdir; + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig oldconfig ports + rm -rf build + +editportsconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig editconfig ports + rm -rf build + +genportsconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig genconfig ports + rm -rf build + +printenv: + dh_testdir + @echo "src package name = $(src_pkg_name)" + @echo "release = $(release)" + @echo "revisions = $(revisions)" + @echo "revision = $(revision)" + @echo "uploadnum = $(uploadnum)" + @echo "prev_revisions = $(prev_revisions)" + @echo "prev_revision = $(prev_revision)" + @echo "abinum = $(abinum)" + @echo "gitver = $(gitver)" + @echo "flavours = $(flavours)" + @echo "skipabi = $(skipabi)" + @echo "skipmodule = $(skipmodule)" + @echo "skipdbg = $(skipdbg)" + @echo "ubuntu_log_opts = $(ubuntu_log_opts)" +ifneq ($(SUBLEVEL),) + @echo "SUBLEVEL = $(SUBLEVEL)" +endif + @echo "CONCURRENCY_LEVEL = $(CONCURRENCY_LEVEL)" + @echo "bin package name = $(bin_pkg_name)" + @echo "hdr package name = $(hdrs_pkg_name)" + @echo "doc package name = $(doc_pkg_name)" + +printchanges: + @baseCommit=$$(git log --pretty=format:'%H %s' | \ + awk '/UBUNTU: '".*Ubuntu-$(release)-$(prev_revision)"'$$/ { print $$1; exit }'); \ + git log "$$baseCommit"..HEAD | \ + perl -w -f $(DEBIAN)/scripts/misc/git-ubuntu-log $(ubuntu_log_opts) + +insertchanges: + @perl -w -f $(DEBIAN)/scripts/misc/insert-changes.pl $(DEBIAN) + +diffupstream: + @git diff-tree -p refs/remotes/linux-2.6/master..HEAD $(shell ls | grep -vE '^(ubuntu|$(DEBIAN)|\.git.*)') + +startnewrelease: + dh_testdir + @nextminor=$(shell expr `echo $(revision) | awk -F. '{print $$2}'` + 1); \ + now="$(shell date -R)"; \ + echo "Creating new changelog set for $(abi_release).$$nextminor..."; \ + echo -e "$(src_pkg_name) ($(abi_release).$$nextminor) UNRELEASED; urgency=low\n" > $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Do not edit directly. Autogenerated at release." >> \ + $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Use the printchanges target to see the curent changes." \ + >> $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Use the insertchanges target to create the final log." \ + >> $(DEBIAN)/changelog.new; \ + echo -e "\n -- $$DEBFULLNAME <$$DEBEMAIL> $$now\n" >> \ + $(DEBIAN)/changelog.new ; \ + cat $(DEBIAN)/changelog >> $(DEBIAN)/changelog.new; \ + mv $(DEBIAN)/changelog.new $(DEBIAN)/changelog + --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/lpia.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/lpia.mk @@ -0,0 +1,10 @@ +build_arch = i386 +header_arch = i386 +asm_link = x86 +defconfig = defconfig +flavours = lpia +build_image = bzImage +kernel_file = arch/$(build_arch)/boot/bzImage +install_file = vmlinuz +do_debug_image = true +loader = grub --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/powerpc.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/powerpc.mk @@ -0,0 +1,19 @@ +build_arch = powerpc +header_arch = $(build_arch) +asm_link = $(build_arch) +defconfig = pmac32_defconfig +flavours = powerpc powerpc-smp powerpc64-smp +build_image = vmlinux +kernel_file = $(build_image) +install_file = $(build_image) + +loader = yaboot + +custom_flavours = + +no_dumpfile = true +skipdbg = true +skipabi = true +skipmodule = true + +family=ports --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/5-udebs.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/5-udebs.mk @@ -0,0 +1,35 @@ +# Do udebs if not disabled in the arch-specific makefile +binary-udebs: binary-debs debian/control +ifeq ($(disable_d_i),) + @$(MAKE) --no-print-directory -f $(DEBIAN)/rules DEBIAN=$(DEBIAN) \ + do-binary-udebs +endif + +do-binary-udebs: + dh_testdir + dh_testroot + + # unpack the kernels into a temporary directory + mkdir -p debian/d-i-${arch} + + imagelist=$$(cat $(builddir)/kernel-versions | grep ^${arch} | awk '{print $$4}') && \ + for i in $$imagelist; do \ + dpkg -x $$(ls ../$(bin_base_pkg_name)-$$i\_$(release)-$(revision)_${arch}.deb) \ + debian/d-i-${arch}; \ + /sbin/depmod -b debian/d-i-${arch} $$i; \ + done + + touch ignore-dups + export SOURCEDIR=$(CURDIR)/debian/d-i-${arch} && \ + cd $(builddir) && \ + kernel-wedge install-files && \ + kernel-wedge check + + # Build just the udebs + dilist=$$(dh_listpackages -s | grep "\-di$$") && \ + [ -z "$dilist" ] || \ + for i in $$dilist; do \ + dh_fixperms -p$$i; \ + dh_gencontrol -p$$i; \ + dh_builddeb -p$$i; \ + done --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/armel.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/armel.mk @@ -0,0 +1,11 @@ +build_arch = arm +header_arch = arm +asm_link = arm +defconfig = defconfig +flavours = +build_image = zImage +kernel_file = arch/$(build_arch)/boot/zImage +install_file = vmlinuz +no_dumpfile = true + +loader = grub --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/3-binary-indep.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/3-binary-indep.mk @@ -0,0 +1,92 @@ +build-indep: + +docpkg = $(doc_pkg_name) +docdir = $(CURDIR)/debian/$(docpkg)/usr/share/doc/$(docpkg) +install-doc: + dh_testdir + dh_testroot + dh_clean -k -p$(docpkg) + + install -d $(docdir) +ifeq ($(do_doc_package_content),true) + # First the html docs. We skip these for autobuilds + if [ -z "$(AUTOBUILD)" ]; then \ + install -d $(docdir)/$(doc_pkg_name)-tmp; \ + $(kmake) O=$(docdir)/$(doc_pkg_name)-tmp htmldocs; \ + mv $(docdir)/$(doc_pkg_name)-tmp/Documentation/DocBook \ + $(docdir)/html; \ + rm -rf $(docdir)/$(doc_pkg_name)-tmp; \ + fi +endif + # Copy the rest + cp -a Documentation/* $(docdir) + rm -rf $(docdir)/DocBook + find $(docdir) -name .gitignore | xargs rm -f + +indep_hdrpkg = $(hdrs_pkg_name) +indep_hdrdir = $(CURDIR)/debian/$(indep_hdrpkg)/usr/src/$(indep_hdrpkg) +install-headers: + dh_testdir + dh_testroot + dh_clean -k -p$(indep_hdrpkg) + + install -d $(indep_hdrdir) + find . -path './debian' -prune -o -path './$(DEBIAN)' -prune \ + -o -path './include/*' -prune \ + -o -path './scripts/*' -prune -o -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) \ + -print | cpio -pd --preserve-modification-time $(indep_hdrdir) + cp -a drivers/media/dvb/dvb-core/*.h $(indep_hdrdir)/drivers/media/dvb/dvb-core + cp -a drivers/media/video/*.h $(indep_hdrdir)/drivers/media/video + cp -a drivers/media/dvb/frontends/*.h $(indep_hdrdir)/drivers/media/dvb/frontends + cp -a scripts include $(indep_hdrdir) + (find arch -name include -type d -print | \ + xargs -n1 -i: find : -type f) | \ + cpio -pd --preserve-modification-time $(indep_hdrdir) + +srcpkg = $(src_pkg_name)-source-$(release) +srcdir = $(CURDIR)/debian/$(srcpkg)/usr/src/$(srcpkg) +install-source: + dh_testdir + dh_testroot + dh_clean -k -p$(srcpkg) + + install -d $(srcdir) +ifeq ($(do_linux_source_content),true) + find . -path './debian' -prune -o -path './$(DEBIAN)' -prune -o \ + -path './.*' -prune -o -print | \ + cpio -pd --preserve-modification-time $(srcdir) + (cd $(srcdir)/..; tar cf - $(srcpkg)) | bzip2 -9c > \ + $(srcdir).tar.bz2 + rm -rf $(srcdir) +endif + +install-indep: install-headers install-doc install-source + +# This is just to make it easy to call manually. Normally done in +# binary-indep target during builds. +binary-headers: install-headers + dh_testdir + dh_testroot + dh_installchangelogs -p$(indep_hdrpkg) + dh_installdocs -p$(indep_hdrpkg) + dh_compress -p$(indep_hdrpkg) + dh_fixperms -p$(indep_hdrpkg) + dh_installdeb -p$(indep_hdrpkg) + dh_gencontrol -p$(indep_hdrpkg) + dh_md5sums -p$(indep_hdrpkg) + dh_builddeb -p$(indep_hdrpkg) + +binary-indep: install-indep + dh_testdir + dh_testroot + + dh_installchangelogs -i + dh_installdocs -i + dh_compress -i + dh_fixperms -i + dh_installdeb -i + dh_gencontrol -i + dh_md5sums -i + dh_builddeb -i --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/sparc.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/sparc.mk @@ -0,0 +1,18 @@ +build_arch = sparc64 +header_arch = $(build_arch) +asm_link = $(build_arch) +defconfig = defconfig +flavours = sparc64 sparc64-smp +build_image = image +kernel_file = arch/sparc/boot/image +install_file = vmlinuz +compress_file = Yes + +loader = silo + +skipdbg = true +no_dumpfile = true +skipabi = true +skipmodule = true + +family=ports --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/amd64.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/amd64.mk @@ -0,0 +1,12 @@ +build_arch = x86_64 +header_arch = $(build_arch) +asm_link = x86 +defconfig = defconfig +flavours = generic server +build_image = bzImage +kernel_file = arch/$(build_arch)/boot/bzImage +install_file = vmlinuz + +server_sub = virtual + +loader = grub --- linux-fsl-imx51-2.6.31.orig/debian.master/rules.d/4-checks.mk +++ linux-fsl-imx51-2.6.31/debian.master/rules.d/4-checks.mk @@ -0,0 +1,26 @@ +# Check ABI for package against last release (if not same abinum) +abi-%: $(abidir)/% + @# Empty for make to be happy +$(abidir)/%: $(stampdir)/stamp-build-% + install -d $(abidir) + sed -e 's/^\(.\+\)[[:space:]]\+\(.\+\)[[:space:]]\(.\+\)$$/\3 \2 \1/' \ + $(builddir)/build-$*/Module.symvers | sort > $@ + +abi-check-%: $(abidir)/% + @perl -f $(DEBIAN)/scripts/abi-check "$*" "$(prev_abinum)" "$(abinum)" \ + "$(prev_abidir)" "$(abidir)" "$(skipabi)" + +# Check the module list against the last release (always) +module-%: $(abidir)/%.modules + @# Empty for make to be happy +$(abidir)/%.modules: $(stampdir)/stamp-build-% + install -d $(abidir) + find $(builddir)/build-$*/ -name \*.ko | \ + sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > $@ + +module-check-%: $(abidir)/%.modules + @perl -f $(DEBIAN)/scripts/module-check "$*" \ + "$(prev_abidir)" "$(abidir)" $(skipmodule) + +checks-%: abi-check-% module-check-% + @# Will be calling more stuff later --- linux-fsl-imx51-2.6.31.orig/debian.master/control-scripts/postrm +++ linux-fsl-imx51-2.6.31/debian.master/control-scripts/postrm @@ -0,0 +1,353 @@ +#! /usr/bin/perl +# -*- Mode: Cperl -*- +# image.postrm --- +# Author : Manoj Srivastava ( srivasta@glaurung.green-gryphon.com ) +# Created On : Sat May 15 11:05:13 1999 +# Created On Node : glaurung.green-gryphon.com +# Last Modified By : Manoj Srivastava +# Last Modified On : Wed Sep 13 11:26:19 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 57 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# $Id: image.postrm,v 1.31 2003/10/07 16:24:20 srivasta Exp $ +# + + +# +#use strict; #for debugging +use Cwd 'abs_path'; + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, or nettrom +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $initrd = "YES"; # initrd kernel +my $do_initrd = ''; # Normally, we don't +my $warn_initrd = 'YES'; # Normally we do +my $use_hard_links = ''; # hardlinks do not work across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # we shall not create a dangling link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my @boilerplate = (); +my @silotemplate = (); +my @quiktemplate = (); +my @palotemplate = (); +my @vmelilotemplate = (); +my $bootdevice = ''; +my $rootdevice = ''; +my $rootdisk = ''; +my $rootpartition = ''; +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_modules = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +chdir('/') or die "could not chdir to /:$!\n"; +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $warn_initrd = '' if /^\s*warn_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_modules = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $warn_initrd = "Yes" if /^\s*warn_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_modules = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + +if ($link_in_boot) { + $image_dest = "/$image_dir/"; + $image_dest =~ s|^/*|/|o; +} + +$image_dest = "$image_dest/"; +$image_dest =~ s|/+$|/|o; + +# The destdir may be gone by now. +if (-d "$image_dest") { + chdir("$image_dest") or die "could not chdir to $image_dest:$!\n"; +} + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) {$kimage = "vmlinuz"} # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) {$kimage = "vmlinuz"} # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage;} +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage;} +else {$kimage = "vmlinuz"} # default + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +sub remove_sym_link { + my $bad_image = $_[0]; + + warn "Removing symbolic link $bad_image \n"; + if ($loader =~ /lilo/i) + { + warn "Unless you used the optional flag in lilo, \n"; + } + warn " you may need to re-run your boot loader" . ($loader ? "[$loader]":"") + . "\n"; + # Remove the dangling link + unlink "$bad_image"; +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +sub CanonicalizePath { + my $path = join '/', @_; + my @work = split '/', $path; + my @out; + my $is_absolute; + + if (@work && $work[0] eq "") { $is_absolute = 1; shift @work; } + + while (@work) { + my $seg = shift @work; + if ($seg eq "." || $seg eq "") { + } elsif ($seg eq "..") { + if (@out && $out[-1] ne "..") { + pop @out; + } else { + # Leading "..", or "../..", etc. + push @out, $seg; + } + } else { + push @out, $seg; + } + } + + unshift @out, "" if $is_absolute; + return join('/', @out); +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +# This removes dangling symlinks. What do we do about hard links? Surely a +# something with the nane $image_dest . "$kimage" ought not to be left behind? +sub image_magic { + my $kimage = $_[0]; + my $image_dest = $_[1]; + + if (-l "$kimage") { + # There is a symbolic link + my $force_move = 0; + my $vmlinuz_target = readlink "$kimage"; + my $real_target = ''; + $real_target = abs_path($vmlinuz_target) if defined ($vmlinuz_target); + if (!defined($vmlinuz_target) || ! -f "$real_target") { + # what, a dangling symlink? + warn "The link " . $image_dest . "$kimage is a damaged link\n"; + # Remove the dangling link + &remove_sym_link("$kimage"); + } + else { + my $canonical_target = CanonicalizePath("$vmlinuz_target"); + if (! -e $canonical_target) { + warn "The link " . $image_dest . "$kimage is a dangling link\n"; + &remove_sym_link("$kimage"); + } + } + } +} + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + warn "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + warn "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if ($postrm_hook) { + &run_hook("postrm", $postrm_hook); +} +if (-d "/etc/kernel/postrm.d") { + warn "Examining /etc/kernel/postrm.d .\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postrm.d") && + die "Failed to process /etc/kernel/postrm.d"; +} +if (-d "/etc/kernel/postrm.d/$version") { + warn "Examining /etc/kernel/postrm.d/$version .\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postrm.d/$version") && + die "Failed to process /etc/kernel/postrm.d/$version"; +} + +# check and remove damaged and dangling symlinks +if ($ARGV[0] !~ /upgrade/) { + system("$ramdisk -d -k " . $version . " > /dev/null 2>&1"); + if (-f $realimageloc . "initrd.img-$version.bak") { + unlink $realimageloc . "initrd.img-$version.bak"; + } + image_magic($kimage, $image_dest); + image_magic($kimage . ".old", $image_dest); + image_magic("initrd.img", $image_dest) if $initrd; + image_magic("initrd.img.old", $image_dest) if $initrd; +} + +exit 0; + +__END__ + + + + + + --- linux-fsl-imx51-2.6.31.orig/debian.master/control-scripts/postinst +++ linux-fsl-imx51-2.6.31/debian.master/control-scripts/postinst @@ -0,0 +1,1087 @@ +#! /usr/bin/perl +# OriginalAuthor : Manoj Srivastava ( srivasta@pilgrim.umass.edu ) +# +# Customized for Ubuntu by: Ben Collins + +#use strict; #for debugging +use Cwd 'abs_path'; + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, nettrom, arcboot or delo +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $relative_links = ""; # target machine defined +my $initrd = "YES"; # initrd kernel +my $do_initrd = ''; # Normally we do not +my $use_hard_links = ''; # hardlinks do not work across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; # List of tools to create initial ram fs. +my $notifier = "/usr/share/update-notifier/notify-reboot-required"; +my $package_name = "linux-image-$version"; +my $explicit_do_loader = 'Yes'; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; +$Loader = "ARCBOOT" if $loader =~ /^arcboot/io; +$Loader = "DELO" if $loader =~ /^delo/io; + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $silent_modules = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +my $modules_base = '/lib/modules'; +my $CONF_LOC = '/etc/kernel-img.conf'; + +# Ignore all invocations except when called on to configure. +exit 0 unless $ARGV[0] =~ /configure/; + +my $DEBUG = 0; + +# Do some preliminary sanity checks here to ensure we actually have an +# valid image dir +chdir('/') or die "could not chdir to /:$!\n"; +die "Internal Error: ($image_dir) is not a directory!\n" + unless -d $image_dir; + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; +die "Internal Error: ($realimageloc) is not a directory!\n" + unless -d $realimageloc; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlink\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $explicit_do_loader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_modules = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $explicit_do_loader = "YES" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_modules = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + + + +# For some versions of kernel-package, we had this warning in the +# postinst, but the rules did not really interpolate the value in. +# Here is a sanity check. +my $pattern = "=" . "I"; +$initrd=~ s/^$pattern$//; + +if ($link_in_boot) { + $image_dest = "/$image_dir/"; # same as realimageloc +} + +# Tack on at least one trainling / +$image_dest = "$image_dest/"; +$image_dest =~ s|^/*|/|o; +$image_dest =~ s|/+$|/|o; + +if (! -d "$image_dest") { + die "Expected Image Destination dir ($image_dest) to be a valid directory!\n"; +} + +# sanity +if (!($do_bootfloppy || $do_bootloader)) { + $do_boot_enable = ''; +} +if ($do_symlink && $no_symlink) { + warn "Both do_symlinks and no_symlinks options enabled; disabling no_symlinks\n"; + $no_symlink = 0; +} + +# most of our work is done in $image_dest (nominally /) +chdir("$image_dest") or die "could not chdir to $image_dest:$!\n"; + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) { $kimage = "vmlinuz"; } # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz"; } # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage; } +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage; } +else { $kimage = "vmlinuz"; } # Default + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + + +die "Internal Error: Could not find image (" . $realimageloc + . "$kimage-$version)\n" unless -e $realimageloc + . "$kimage-$version"; + +# search for the boot loader in the path +my $loader_exec; +($loader_exec = $loader) =~ s|.*/||; +my ($loaderloc) = grep -x, map "$_/$loader_exec", + map { length($_) ? $_ : "." } split /:/, $ENV{PATH}; + + +###################################################################### +###################################################################### +########### Test whether a relative symlinkwould be OK ####### +###################################################################### +###################################################################### +sub test_relative { + my %params = @_; + my $cwd; + + die "Internal Error: Missing Required paramater 'Old Dir' " + unless $params{'Old Dir'}; + die "Internal Error: Missing Required paramater New Dir' " + unless $params{'New Dir'}; + + + die "Internal Error: No such dir $params{'Old Dir'} " + unless -d $params{'Old Dir'}; + die "Internal Error: No such dir $params{'New Dir'} " + unless -d $params{'New Dir'}; + + warn "Test relative: testing $params{'Old Dir'} -> $params{'New Dir'}" + if $DEBUG; + chomp($cwd = `pwd`); + chdir ($params{'New Dir'}) or die "Could not chdir to $params{'New Dir'}:$!"; + my $ok = 0; + $params{'Old Dir'} =~ s|^/*||o; + if (-d $params{'Old Dir'} ) { + if (defined $params{'Test File'}) { + if (-e $params{'Old Dir'} . $params{'Test File'}) { + $ok = 1; + } + } else { + $ok = 1; # well, backward compatibility + } + } + chdir ($cwd) or die "Could not chdir to $params{'New Dir'}:$!"; + return $ok; +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +# sub CanonicalizePath { +# my $path = join '/', @_; +# my @work = split '/', $path; +# my @out; +# my $is_absolute; + +# if (@work && $work[0] eq "") { +# $is_absolute = 1; shift @work; +# } + +# while (@work) { +# my $seg = shift @work; +# if ($seg eq "." || $seg eq "") { +# } +# elsif ($seg eq "..") { +# if (@out && $out[-1] ne "..") { +# pop @out; +# } +# else { +# # Leading "..", or "../..", etc. +# push @out, $seg; +# } +# } +# else { +# push @out, $seg; +# } +# } + +# unshift @out, "" if $is_absolute; +# return join('/', @out); +# } +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### + +sub spath { + my %params = @_; + + die "Missing Required paramater 'Old'" unless $params{'Old'}; + die "Missing Required paramater 'New'" unless $params{'New'}; + + my @olddir = split '/', `readlink -q -m $params{'Old'}`; + my @newdir = split '/', `readlink -q -m $params{'New'}`; + my @outdir = @olddir; + + my $out = ''; + my $i; + for ($i = 0; $i <= $#olddir && $i <= $#newdir; $i++) { + $out++ if ($olddir[$i] ne $newdir[$i]); + shift @outdir unless $out; + unshift @outdir, ".." if $out; + } + if ($#newdir > $#olddir) { + for ($i=0; $i < $#newdir; $i++) { + unshift @outdir, ".."; + } + } + return join ('/', @outdir); +} +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### + + +# This routine actually moves the kernel image +# From: $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12) +# To: $image_dest/$kimage-$version (/vmlinuz-2.6.12) +# Note that the image is moved to a versioned destination, but ordinary +# symlinks we create otherwise are not normally versioned +sub really_move_image { + my $src_dir = $_[0]; + my $target = $_[1]; + my $dest_dir = $_[2]; + + warn "Really move image: src_dir=$src_dir, target=$target,\n destdir=$dest_dir" + if $DEBUG; + if (-e "$target") { + # we should be in dir $dest_dir == $image_dest /, normally + rename("$target", "$target.$$") || + die "failed to move " . $dest_dir . "$target:$!"; + warn "mv $target $target.$$" if $DEBUG; + } + warn "mv -f $src_dir$target $target" if $DEBUG; + my $ret = system("mv -f " . $src_dir . "$target " . + " $target"); + if ($ret) { + die("Failed to move " . $src_dir . "$target to " + . $dest_dir . "$target.\n"); + } + # Ok, now we may clobber the previous .old files + if (-e "$target.$$") { + rename("$target.$$", "$target.old") || + die "failed to move " . $dest_dir . "$target:$!"; + warn "mv $target.$$ $target " if $DEBUG; + } +} + +# Normally called after really_move_image; and only called if we asked for +# reversed link this routine reverses the symbolic link that is notmally +# created. Since the real kernel image has been moved over to +# $image_dest/$kimage-$version. So, this routine links +# From: $image_dest/$kimage-$version (/vmlinuz-2.6.12) +# To: $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12) +sub really_reverse_link { + my $src_dir = $_[0]; + my $link_name = $_[1]; + my $dest_dir = $_[2]; + warn "Really reverse link: src_dir=$src_dir, link name=$link_name\n" . + "\tdestdir=$dest_dir" if $DEBUG; + + my $Old = $dest_dir; + if (test_relative ('Old Dir' => $Old, 'New Dir' => $src_dir, + 'Test File' => "$link_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$src_dir" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + link($Old . "$link_name", $src_dir . "$link_name") || + die("Failed to link " . $dest_dir . "$link_name to " . $src_dir . + "$link_name .\n"); + warn "ln " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG; + } + else { + symlink($Old . "$link_name", $src_dir . "$link_name") || + die("Failed to symbolic-link " . $dest_dir . "$link_name to " . $src_dir + . "$link_name : $!\n"); + warn "ln -s " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG; + } +} + +# This routine is invoked if there is a symbolic link in place +# in $image_dest/$kimage -- so a symlink exists in the destination. +# What we are trying to determine is if we need to move the symbolic link over +# to the the .old location +sub move_p { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + my $force_move = 0; + warn "Move?: kimage=$kimage, image_dest=$image_dest, \n" . + "\timage_name=$image_name, src_dir=$src_dir" if $DEBUG; + + if ($no_symlink || $reverse_symlink) { + # we do not want links, yet we have a symbolic link here! + warn "found a symbolic link in " . $image_dest . "$kimage \n" . + "even though no_symlink is defined\n" if $no_symlink; + warn "found a symbolic link in " . $image_dest . "$kimage \n" . + "even though reverse_symlink is defined\n" if $reverse_symlink; + # make sure we change this state of affairs + $force_move = 1; + return $force_move; + } + + warn "DEBUG: OK. We found symlink, and we should have a symlink here.\n" + if $DEBUG; + my $vmlinuz_target = readlink "$kimage"; + my $real_target = ''; + my $target = `readlink -q -m "${realimageloc}${kimage-$version}"`; + $real_target = abs_path($vmlinuz_target) if defined($vmlinuz_target); + + if (!defined($vmlinuz_target) || ! -f "$real_target") { + # what, a dangling symlink? + warn "The link " . $image_dest . "$kimage is a dangling link" . + "to $real_target\n"; + $force_move = 1; + return $force_move; + } + + + warn "DEBUG: The link $kimage points to ($vmlinuz_target)\n" if $DEBUG; + warn "DEBUG: ($vmlinuz_target) is really ($real_target)\n" if $DEBUG; + my $cwd; + chomp ($cwd=`pwd`); + if ($vmlinuz_target !~ m|^/|o) { + $vmlinuz_target = $cwd . "/" . $vmlinuz_target; + $vmlinuz_target =~ s|/+|/|o; + } + $vmlinuz_target = `readlink -q -m $vmlinuz_target`; + + if ("$vmlinuz_target" ne "$target") { + warn "DEBUG: We need to handle this.\n" if $DEBUG; + if ($minimal_swap) { + warn "DEBUG: Minimal swap.\n" if $DEBUG; + if (-l "$kimage.old") { + warn "DEBUG: There is an old link at $kimage.old\n" if $DEBUG; + my $old_target = readlink "$kimage.old"; + my $real_old_target = ''; + $real_old_target=abs_path($old_target) if defined ($old_target); + + if ($real_old_target && -f "$real_old_target") { + if ($old_target !~ m|^/|o) { + $old_target = $cwd . "/" . $old_target; + $old_target =~ s|/+|/|o; + } + $old_target = `readlink -q -m $old_target`; + if ("$old_target" ne "$target") { + $force_move = 1; + warn "DEBUG: Old link ($old_target) does not point to us ($target)\n" + if $DEBUG; + } + else { # The .old points to the current + warn "$kimage.old --> $target -- doing nothing"; + $force_move = 0; + } + } + else { + warn "DEBUG: Well, the old link does not exist -- so we move\n" + if $DEBUG; + $force_move = 1; + } + } + else { + warn "DEBUG: No .old link -- OK to move\n" + if $DEBUG; + $force_move = 1; + } + } + else { + warn "DEBUG: ok, minimal swap is no-- so we move.\n" + if $DEBUG; + $force_move = 1; + } + } + else { # already have proper link + warn "$kimage($vmlinuz_target) points to $target ($real_target) -- doing nothing"; + $force_move = 0; + } + return $force_move; +} + + +# This routine moves the symbolic link around (/vmlinuz -> /vmlinuz.old) +# It pays attention to whether we should the fact whether we should be using +# hard links or not. +sub really_move_link { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "really_move_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # don't clobber $kimage.old quite yet + rename("$kimage", "$kimage.$$") || + die "failed to move " . $image_dest . "$kimage:$!"; + warn "mv $kimage $kimage.$$" if $DEBUG; + my $Old = $src_dir; + my $cwd; + + chomp($cwd=`pwd`); + if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd, + 'Test File' => "$image_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + warn "ln ${Old}${image_name} $kimage" if $DEBUG; + if (! link("${Old}${image_name}", "$kimage")) { + rename("$kimage.$$", "$kimage"); + die("Failed to link ${Old}${image_name} to " . + "${image_dest}${kimage}.\n"); + } + } + else { + warn "ln -s ${Old}${image_name} $kimage" if $DEBUG; + if (! symlink("${Old}${image_name}", "$kimage")) { + rename("$kimage.$$", "$kimage"); + die("Failed to symbolic-link ${Old}${image_name} to " . + "${image_dest}${kimage}: $!\n"); + } + } + + # Ok, now we may clobber the previous .old file + if (-l "$kimage.old" || ! -e "$kimage.old" ) { + rename("$kimage.$$", "$kimage.old"); + warn "mv $kimage.$$ $kimage.old" if $DEBUG; + } + else { + warn "$kimage.old is not a symlink, not clobbering\n"; + warn "rm $kimage.$$"; + unlink "$kimage.$$" if $DEBUG; + } +} + +# This routine handles a request to do symlinks, but there is no +# symlink file already there. Either we are supposed to use copy, or we are +# installing on a pristine system, or the user does not want symbolic links at +# all. We use a configuration file to tell the last two cases apart, creating +# a config file if needed. +sub handle_missing_link { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "handle_missing_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + if ($no_symlink) { + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc . + "$image_name " . " $kimage"); + if ($ret) { + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + elsif ($reverse_symlink) { + warn "mv -f $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("mv -f " . $realimageloc . "$image_name " + . "$kimage"); + if ($ret) { + die("Failed to move " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + else { + if (! $have_conffile) { + my $ret; + my $answer=''; + $do_symlink = "Yes"; + + if (open(CONF, ">$CONF_LOC")) { + print CONF "# Kernel Image management overrides\n"; + print CONF "# See kernel-img.conf(5) for details\n"; + if ($loader =~ /palo/i) { + print CONF "link_in_boot = Yes\n"; + print CONF "do_symlinks = Yes\n"; + print CONF "relative_links = Yes\n"; + print CONF "do_bootloader = No\n"; + } else { + print CONF "do_symlinks = $do_symlink\n"; + } + close CONF; + } + $have_conffile = "Yes"; + } + } + + if (! $no_symlink && $do_symlink =~ /Yes/i) { + my $Old = $realimageloc; + my $New = $image_dest; + my $Name = "$image_name"; + my $Link_Dest = "$kimage"; + + if ($reverse_symlink) { + $Old = $image_dest; + $New = $realimageloc; + $Name = "$kimage"; + $Link_Dest = $realimageloc . "$image_name"; + } + if (test_relative ('Old Dir' => $Old, + 'New Dir' => $New, + 'Test File' => $Name)) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$New" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + symlink($Old . "$Name", "$Link_Dest") || + die("Failed to symbolic-link ${Old}$Name to $Link_Dest: $!\n"); + warn "ln -s ${Old}$Name $Link_Dest" if $DEBUG; + + } +} + +# This routine handles the rest of the cases, where the user has requested +# non-traditional handling, like using cp, or reverse symlinks, or hard links. +sub handle_non_symlinks { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "handle_non_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # Save the current image. We do this in all four cases + rename("$kimage", "$kimage.$$") || + die "failed to move " . $image_dest . "$kimage:$!"; + warn "mv $kimage $kimage.$$" if $DEBUG; + + ##,#### + # case One + #`#### + if ($no_symlink) { + # Maybe /$image_dest is on a dos system? + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc + . "$image_name " . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + rename("$kimage.$$", "$kimage"); + warn "mv $kimage.$$ $kimage" if $DEBUG; + } + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + ##,#### + # case Two + #`#### + elsif ($reverse_symlink) { # Maybe /$image_dest is on a dos system? + warn "mv -f $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("mv -f " . $realimageloc . "$image_name " + . $image_dest . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + rename("$kimage.$$", "$kimage"); + warn "mv $kimage.$$ $kimage" if $DEBUG; + } + die("Failed to move " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + my $Old = $image_dest; + if (test_relative ('Old Dir' => $Old, 'New Dir' => $realimageloc, + 'Test File' => "$kimage")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$realimageloc" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + warn "ln " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG; + if (! link($Old . "$kimage", $realimageloc . "$image_name")) { + warn "Could not link " . $image_dest . + "$kimage to $image_name :$!"; + } + } + else { + warn "ln -s " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG; + if (! symlink($Old . "$kimage", $realimageloc . "$image_name")) { + warn "Could not symlink " . $image_dest . + "$kimage to $image_name :$!"; + } + } + } + ##,#### + # case Three + #`#### + elsif ($use_hard_links =~ m/YES/i ) { + # Ok then. this ought to be a hard link, and hence fair game + # don't clobber $kimage.old quite yet + my $Old = $realimageloc; + my $cwd; + chomp($cwd=`pwd`); + if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd, + 'Test File' => "$image_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + warn "ln " . $Old . "$image_name " . "$kimage" if $DEBUG; + if (! link($Old . "$image_name", "$kimage")) { + warn "mv $kimage.$$ $kimage" if $DEBUG; + rename("$kimage.$$", "$kimage"); + die("Failed to link " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + ##,#### + # case Four + #`#### + else { + # We just use cp + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc + . "$image_name " . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + warn "mv $kimage.$$ $kimage" if $DEBUG; + rename("$kimage.$$", "$kimage"); + } + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + # Ok, now we may clobber the previous .old file + warn "mv $kimage.$$ $kimage.old if -e $kimage.$$" if $DEBUG; + rename("$kimage.$$", "$kimage.old") if -e "$kimage.$$"; +} + +# This routine is responsible for setting up the symbolic links +# So, the actual kernel image lives in +# $realimageloc/$image_name (/boot/vmlinuz-2.6.12). +# This routine creates symbolic links in $image_dest/$kimage (/vmlinuz) +sub image_magic { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = "$kimage-$version"; + my $src_dir = $realimageloc; + warn "image_magic: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # Well, in any case, if the destination (the symlink we are trying + # to create) is a directory, we should do nothing, except throw a + # diagnostic. + if (-d "$kimage" ) { + die ("Hmm. $kimage is a directory, which I did not expect. I am\n" . + "trying to create a symbolic link with that name linked to \n" . + "$image_dest . Since a directory exists here, my assumptions \n" . + "are way off, and I am aborting.\n" ); + exit (3); + } + + if ($move_image) { # Maybe $image_dest is in on dos, or something? + # source dir, link name, dest dir + really_move_image( $realimageloc, $image_name, $image_dest); + really_reverse_link($realimageloc, $image_name, $image_dest) + if $reverse_symlink; + return; + } + + if (-l "$kimage") { # There is a symbolic link + warn "DEBUG: There is a symlink for $kimage\n" if $DEBUG; + my $force_move = move_p($kimage, $image_dest, $image_name, $src_dir); + + if ($force_move) { + really_move_link($kimage, $image_dest, $image_name, $src_dir); + } + } + elsif (! -e "$kimage") { + # Hmm. Pristine system? How can that be? Installing from scratch? + # Or maybe the user does not want a symbolic link here. + # Possibly they do not want a link here. (we should be in / + # here[$image_dest, really] + handle_missing_link($kimage, $image_dest, $image_name, $src_dir); + } + elsif (-e "$kimage" ) { + # OK, $kimage exists -- but is not a link + handle_non_symlinks($kimage, $image_dest, $image_name, $src_dir); + } +} + +###################################################################### +###################################################################### +###################################################################### +###################################################################### + +# We may not have any modules installed +if ( -d "$modules_base/$version" ) { + print STDERR "Running depmod.\n"; + my $ret = system("depmod -a $version"); + if ($ret) { + print STDERR "Failed to run depmod\n"; + exit(1); + } +} + + + +sub find_initrd_tool { + my $hostversion = shift; + my $version = shift; + print STDERR "Finding valid ramdisk creators.\n"; + my @ramdisks = + grep { + my $args = + "$_ " . + "--supported-host-version=$hostversion " . + "--supported-target-version=$version " . + "1>/dev/null 2>&1" + ; + system($args) == 0; + } + split (/[:,\s]+/, $ramdisk); +} + +# The initrd symlink should probably be in the same dir that the +# symlinks are in +if ($initrd) { + my $success = 0; + + # Update-initramfs is called slightly different than mkinitrd and + # mkinitramfs. XXX It should really be made compatible with this stuff + # some how. + my $upgrading = 1; + if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + $upgrading = 0; + } + my $ret = system("$ramdisk " . ($upgrading ? "-u" : "-c") . " -k " . $version . " >&2"); + $success = 1 unless $ret; + die "Failed to create initrd image.\n" unless $success; + if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + image_magic("initrd.img", $image_dest); + } + else { + if (! -e "initrd.img") { + handle_missing_link("initrd.img", $image_dest, "initrd.img-$version", + $realimageloc); + } + else { + print STDERR + "Not updating initrd symbolic links since we are being updated/reinstalled \n"; + print STDERR + "($ARGV[1] was configured last, according to dpkg)\n"; + } + } + + if ($initrd && -l "initrd" ) { + unlink "initrd"; + } + + if ($initrd && -l "$image_dir/initrd" && ! $link_in_boot) { + unlink "$image_dir/initrd"; + } +} +else { # Not making an initrd emage + if (-l "initrd.img") { + # Ooh, last image was an initrd image? in any case, we should move it. + my $target = readlink "initrd.img"; + my $real_target = ''; + $real_target = abs_path($target) if defined ($target); + + if (!defined($target) || ! -f "$real_target") { + # Eh. dangling link. can safely be removed. + unlink("initrd.img"); + } else { + if (-l "initrd.img.old" || ! -e "initrd.img.old" ) { + rename("initrd.img", "initrd.img.old"); + } else { + warn "initrd.img.old is not a symlink, not clobbering\n"; + unlink("initrd.img"); + } + } + } +} + +# Warn of a reboot +if (-x $notifier) { + system($notifier); +} + +# Let programs know not to hibernate if the kernel that would be used for +# resume-from-hibernate is likely to differ from the currently running kernel. +system("mountpoint -q /var/run"); +if ($? eq 0) { + system("touch /var/run/do-not-hibernate"); +} + +# Only change the symlinks if we are not being upgraded +if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + image_magic($kimage, $image_dest); +} +else { + if (! -e "$kimage") { + handle_missing_link($kimage, $image_dest, "$kimage-$version", + $realimageloc); + } + else { + print STDERR + "Not updating image symbolic links since we are being updated/reinstalled \n"; + print STDERR + "($ARGV[1] was configured last, according to dpkg)\n"; + } +} + +# We used to have System.* files in / +if (-e "/System.map" || -e "/System.old") { + unlink '/System.map' if -e '/System.map'; + unlink '/System.old' if -e '/System.old'; +} + +# creating some info about kernel and initrd +if ($DEBUG) { + my $ksize=sprintf("%.0f",(stat($realimageloc . + "$kimage-$version"))[7]/1024)."kB"; + my $initrdsize=''; + if ($initrd) { + $initrdsize=sprintf("%.0f",(stat($realimageloc . + "initrd.img-$version"))[7]/1024)."kB"; + } + + print STDERR <<"EOMSG"; +A new kernel image has been installed at $realimageloc$kimage-$version + (Size: $ksize) + +Symbolic links, unless otherwise specified, can be found in $image_dest + +EOMSG + ; + + if ($initrd) { + print STDERR <<"EOMSGA"; + + Initial rootdisk image: ${realimageloc}initrd.img-$version (Size: $initrdsize) +EOMSGA + ; + } +} + +# set the env var stem +$ENV{'STEM'} = "linux"; +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if ($postinst_hook) { + &run_hook("postinst", $postinst_hook); +} + +if (-d "/etc/kernel/postinst.d") { + print STDERR "Examining /etc/kernel/postinst.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postinst.d") && + die "Failed to process /etc/kernel/postinst.d"; +} + +if (-d "/etc/kernel/postinst.d/$version") { + print STDERR "Examining /etc/kernel/postinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postinst.d/$version") && + die "Failed to process /etc/kernel/postinst.d/$version"; +} + +LOADER: { + last unless $do_boot_enable; # Exit if explicitly asked to + + last if $loader =~ /silo/i; # SILO does not have to be executed. + last if $loader =~ /yaboot/i; # yaboot does not have to be executed. + last if $loader =~ /milo/i; # MILO does not have to be executed. + last if $loader =~ /nettrom/i; # NETTROM does not have to be executed. + last if $loader =~ /arcboot/i; # ARCBOOT does not have to be executed. + last if $loader =~ /delo/i; # DELO does not have to be executed. + last if $loader =~ /quik/i; # maintainer asked quik invocation to be ignored + + last unless $loaderloc; + last unless -x $loaderloc; + last unless $do_bootloader; + + if (-T "/etc/$loader.conf") { + # Trust and use the existing lilo.conf. + print STDERR "You already have a $Loader configuration in /etc/$loader.conf\n"; + my $ret = &run_lilo(); + exit $ret if $ret; + } +} + + +sub run_lilo (){ + my $ret; + # Try and figure out if the user really wants lilo to be run -- + # since the default is to run the boot laoder, which is ! grub -- but + # the user may be using grub now, and not changed the default. + + # So, if the user has explicitly asked for the loader to be run, or + # if there is no postinst hook, or if there is no grub installed -- + # we are OK. Or else, we ask. + if ($explicit_do_loader || (! ($postinst_hook && -x '/usr/sbin/grub'))) { + print STDERR "Running boot loader as requested\n"; + } else { + print STDERR "Ok, not running $loader\n"; + } + if ($loader =~ /^lilo/io or $loader =~ /vmelilo/io) { + print STDERR "Testing $loader.conf ... \n"; + unlink $temp_file_name; # security + $ret = system("$loaderloc -t >$temp_file_name 2>&1"); + if ($ret) { + print STDERR "Boot loader test failed\n"; + return $ret; + } + unlink "$temp_file_name"; + print STDERR "Testing successful.\n"; + print STDERR "Installing the "; + print STDERR "partition " if $loader =~ /^lilo/io; + print STDERR "boot sector... \n"; + } + + print STDERR "Running $loaderloc ... \n"; + if ($loader =~ /^elilo/io) { + $ret = system("$loaderloc 2>&1 | tee $temp_file_name"); + } else { + $ret = system("$loaderloc >$temp_file_name 2>&1"); + } + if ($ret) { + print STDERR "Boot loader failed to run\n"; + return $ret; + } + unlink $temp_file_name; + print STDERR "Installation successful.\n"; + return 0; +} + +exit 0; + +__END__ + --- linux-fsl-imx51-2.6.31.orig/debian.master/control-scripts/prerm +++ linux-fsl-imx51-2.6.31/debian.master/control-scripts/prerm @@ -0,0 +1,307 @@ +#! /usr/bin/perl +# -*- Mode: Perl -*- +# image.prerm --- +# Author : root ( root@melkor.pilgrim.umass.edu ) +# Created On : Fri May 17 03:28:59 1996 +# Created On Node : melkor.pilgrim.umass.edu +# Last Modified By : Manoj Srivastava +# Last Modified On : Sat Aug 5 13:14:17 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 85 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# +# $Id: image.prerm,v 1.22 2003/10/07 16:24:20 srivasta Exp $ +# +# +#use strict; + +$|=1; +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlinks = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, or nettrom +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $initrd = "YES"; # initrd kernel +my $use_hard_links = ''; # hardlinks do not wirk across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # There is no harm in checking the link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +my $DEBUG = 0; + +# Variables used +my $image=''; +my $ret=0; +my $seen=''; +my $answer=''; +my $running = ''; +my $WouldInvalidate = 0; + +if ($ARGV[0] && ($ARGV[0] =~ /remove/ || $ARGV[0] =~ /upgrade/)) { + if (-l "/usr/doc/linux-image-$version") { + unlink "/usr/doc/linux-image-$version"; + } +} + +# Ignore all invocations uxcept when called on to remove +exit 0 unless ($ARGV[0] && $ARGV[0] =~ /remove/) ; + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) { $kimage = "vmlinuz";} # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz";} # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage; } +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage; } +else { $kimage = "vmlinuz";} # Default + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + +#check to see if we are trying to remove a running kernel +# if so we abort right now. +chop($running=`uname -r`); +if ($running eq $version) { + print STDERR "WARN: Proceeding with removing running kernel image.\n"; +} + +#Now, they have an alternate kernel which they are currently running + +# This is just us being nice to lilo users. + +chdir("/") or die "could not chdir to /:$!\n"; + +if (-f "/etc/$loader.conf") { #I know, could be a link, but .. + open (LILO, "/etc/$loader.conf") || &success(); # this is not critical + while () { + chop; + s/\#.*//; # nix the comments + next unless /^\s*image\s*=\s(\S+)/o; + $image = $1; + if ($image && -e $image) { + while (defined($image) && -l $image) { + $image = readlink ($image); + } + if (defined($image) && -e $image) { + $WouldInvalidate |= $image =~ /$kimage-$version/; + } + else { + &success(); # invalid $loader.conf file + } + } + else { + &success(); # invalid $loader.conf file + } + } + close (LILO); + if ($WouldInvalidate) { + print STFERR "WARN: Proceeding with removing running kernel image.\n"; + &success(); + } +} + + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + + +## Run user hook script here, if any +if (-x "$prerm_hook") { + &run_hook("prerm", $prerm_hook); +} +if (-d "/etc/kernel/prerm.d") { + print STDERR "Examining /etc/kernel/prerm.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version /etc/kernel/prerm.d") && + die "Failed to process /etc/kernel/prerm.d"; +} +if (-d "/etc/kernel/prerm.d/$version") { + print STDERR "Examining /etc/kernel/prerm.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version " . + "/etc/kernel/prerm.d/$version") && + die "Failed to process /etc/kernel/prerm.d/$version"; +} + +sub success () { + my @files_to_remove = qw{ + modules.dep modules.isapnpmap modules.pcimap + modules.usbmap modules.parportmap + modules.generic_string modules.ieee1394map + modules.ieee1394map modules.pnpbiosmap + modules.alias modules.ccwmap modules.inputmap + modules.symbols modules.ofmap modules.seriomap + modules.alias.bin modules.dep.bin modules.symbols.bin + }; + + foreach my $extra_file (@files_to_remove) { + if (-f "/lib/modules/$version/$extra_file") { + unlink "/lib/modules/$version/$extra_file"; + } + } + exit 0; +} + + + +&success(); +exit 0; +__END__ + + + + + --- linux-fsl-imx51-2.6.31.orig/debian.master/control-scripts/headers-postinst +++ linux-fsl-imx51-2.6.31/debian.master/control-scripts/headers-postinst @@ -0,0 +1,126 @@ +#!/usr/bin/perl +# -*- Mode: Cperl -*- +# debian.postinst --- +# Author : Manoj Srivastava ( srivasta@pilgrim.umass.edu ) +# Created On : Sat Apr 27 05:42:43 1996 +# Created On Node : melkor.pilgrim.umass.edu +# Last Modified By : Manoj Srivastava +# Last Modified On : Sat Aug 5 13:20:22 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 45 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# +# +# arch-tag: 1c716174-2f0a-476d-a626-a1322e62503a +# + + +$|=1; + +# Predefined values: +my $version = "=V"; +my $kimage = "=K"; +my $package_name = "linux-image-$version"; + + +# Ignore all invocations uxcept when called on to configure. +exit 0 unless ($ARGV[0] && $ARGV[0] =~ /configure/); + +#known variables +my $image_dest = "/"; +my $realimageloc = "/boot/"; +my $silent_modules = ''; +my $modules_base = '/lib/modules'; +my $CONF_LOC = '/etc/kernel-img.conf'; +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +chdir '/usr/src' or die "Could not chdir to /usr/src:$!"; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $header_postinst_hook = "$1" if /^\s*header_postinst_hook\s*=\s*(\S+)/ig; + } + close CONF; + } +} + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if (-x "$header_postinst_hook") { + &run_hook("postinst", $header_postinst_hook); +} + +if (-d "/etc/kernel/header_postinst.d") { + print STDERR "Examining /etc/kernel/header_postinst.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/header_postinst.d") && + die "Failed to process /etc/kernel/header_postinst.d"; +} + +if (-d "/etc/kernel/header_postinst.d/$version") { + print STDERR "Examining /etc/kernel/header_postinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/header_postinst.d/$version") && + die "Failed to process /etc/kernel/header_postinst.d/$version"; +} + +exit 0; + +__END__ --- linux-fsl-imx51-2.6.31.orig/debian.master/control-scripts/preinst +++ linux-fsl-imx51-2.6.31/debian.master/control-scripts/preinst @@ -0,0 +1,299 @@ +#! /usr/bin/perl +# -*- Mode: Cperl -*- +# image.preinst --- +# Author : Manoj Srivastava ( srivasta@tiamat.datasync.com ) +# Created On : Sun Jun 14 03:38:02 1998 +# Created On Node : tiamat.datasync.com +# Last Modified By : Manoj Srivastava +# Last Modified On : Sun Sep 24 14:04:42 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 99 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# + +# +#use strict; #for debugging + +use Debconf::Client::ConfModule qw(:all); +version('2.0'); +my $capb=capb("backup"); + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, nettrom + # or elilo +my $image_dir = "/boot"; # where the image is located +my $initrd = "YES"; # initrd kernel +my $use_hard_links = ''; # hardlinks do not wirk across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_src_link = 'YES'; # There is no harm in checking the link +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # There is no harm in checking the link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; # List of tools to create initial ram fs. +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +#known variables +my @boilerplate = (); +my @silotemplate = (); +my @quiktemplate = (); +my @palotemplate = (); +my @vmelilotemplate = (); +my $bootdevice = ''; +my $rootdevice = ''; +my $rootdisk = ''; +my $rootpartition = ''; +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_loader = ''; +my $warn_reboot = ''; # Warn that we are installing a version of + # the kernel we are running + +my $modules_base = '/lib/modules'; + +die "Pre inst Internal error. Aborting." unless $version; + +exit 0 if $ARGV[0] =~ /abort-upgrade/; +exit 1 unless $ARGV[0] =~ /(install|upgrade)/; + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_src_link = '' if /^\s*relink_src_link\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_src_link = 'Yes' if /^\s*relink_src_link\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + $have_conffile = "Yes"; # stop perl complaining + } +} + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + +# About to upgrade this package from version $2 TO THIS VERSION. +# "prerm upgrade" has already been called for the old version of +# this package. + +sub find_initrd_tool { + my $hostversion = shift; + my $version = shift; + my @ramdisks = + grep { + my $args = + "$_ " . + "--supported-host-version=$hostversion " . + "--supported-target-version=$version " . + "1>/dev/null 2>&1" + ; + system($args) == 0; + } + split (/[:,\s]+/, $ramdisk); +} + +sub check { + my $version = shift; + my $lib_modules="$modules_base/$version"; + my $message = ''; + + if (-d "$lib_modules") { + opendir(DIR, $lib_modules) || die "can’t opendir $lib_modules: $!"; + my @children = readdir(DIR); + if ($#children > 1) { + my @dirs = grep { -d "$lib_modules/$_" } @children; + if ($#dirs > 1) { # we have subdirs + my $dir_message=''; + for my $dir (@dirs) { + if ($dir =~/kernel$/) { + $dir_message="An older install was detected.\n"; + } + else { + $dir_message="Module sub-directories were detected.\n" + unless $dir_message; + } + } + $message += $dir_message if $dir_message; + } + + my @links = grep { -l "$lib_modules/$_" } @children; + if ($#links > -1) { + my $links_message = ''; + for my $link (@links) { + next if ($link =~ /^build$/); + next if ($link =~ /^source$/); + $links_message = "Symbolic links were detected in $modules_base/$version.\n"; + } + $message += $links_message if $links_message; + } + my @files = grep { -f "$lib_modules/$_" } @children; + $message += "Additional files also exist in $modules_base/$version.\n" + if ($#files > -1); + } + } + else { $message .= "$lib_modules does not exist. ";} + return $message; +} + +if (-d "$modules_base/$version") { + my $errors=check($version); + warn "Info:\n$errors\n" if $errors; +} + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + + +## Run user hook script here, if any +if (-x "$preinst_hook") { + &run_hook("preinst", $preinst_hook); +} +if (-d "/etc/kernel/preinst.d") { + print STDERR "Examining /etc/kernel/preinst.d/\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version" . + " /etc/kernel/preinst.d") && + die "Failed to process /etc/kernel/preinst.d"; +} +if (-d "/etc/kernel/preinst.d/$version") { + print STDERR "Examining /etc/kernel/preinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version" . + " /etc/kernel/preinst.d/$version") && + die "Failed to process /etc/kernel/preinst.d/$version"; +} +print STDERR "Done.\n"; + +exit 0; + +__END__ + + --- linux-fsl-imx51-2.6.31.orig/debian.master/tests/check-aliases +++ linux-fsl-imx51-2.6.31/debian.master/tests/check-aliases @@ -0,0 +1,24 @@ +#!/usr/bin/perl -w + +my %map; + +print "Checking for dupe aliases in $ENV{'FLAVOUR'}...\n"; + +$aliases = + "$ENV{'INSTALL_DIR'}/lib/modules/$ENV{'VERSION'}-$ENV{'FLAVOUR'}/modules.alias"; + +open(ALIASES, "< $aliases") or die "Could not open $aliases"; + +while () { + chomp; + my ($junk, $alias, $module) = split; + + if (defined($map{$alias})) { + printf("%s %20s / %-20s : %s \n", ("$map{$alias}" eq "$module") + ? "INT" : " ", $map{$alias}, $module, $alias); + } else { + $map{$alias} = $module; + } +} + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.master/tests/README +++ linux-fsl-imx51-2.6.31/debian.master/tests/README @@ -0,0 +1,21 @@ +Scripts placed in this directory get called one at a time by run-parts(8). +The scripts are expected to perform some sort of sanity checks on the +finished build. Scripts will be called once for each flavour. + +Some environment variables are exported to make life a little easier: + +DPKG_ARCH : The dpkg architecture (e.g. "amd64") +KERN_ARCH : The kernel architecture (e.g. "x86_64") +FLAVOUR : The specific flavour for this run (e.g. "generic") +VERSION : The full version of this build (e.g. 2.6.22-1) +REVISION : The exact revision of this build (e.g. 1.3) +PREV_REVISION : The revision prior to this one +ABI_NUM : The specific ABI number for this build (e.g. 2) +PREV_ABI_NUM : The previous ABI number. Can be the same as ABI_NUM. +BUILD_DIR : The directory where this build took place +INSTALL_DIR : The directory where the package is prepared +SOURCE_DIR : Where the main kernel source is + +Scripts are expected to have a zero exit status when no problems occur, +and non-zero when an error occurs that should stop the build. Scripts +should print whatever info they deem needed to deduce the problem. --- linux-fsl-imx51-2.6.31.orig/debian.master/config/config.common.ubuntu +++ linux-fsl-imx51-2.6.31/debian.master/config/config.common.ubuntu @@ -0,0 +1,4358 @@ +# +# Common config options automatically generated by splitconfig.pl +# +CONFIG_3C359=m +CONFIG_3C515=m +# CONFIG_4KSTACKS is not set +CONFIG_60XX_WDT=m +CONFIG_6PACK=m +CONFIG_8139CP=m +CONFIG_8139TOO=m +CONFIG_8139TOO_8129=y +CONFIG_8139TOO_PIO=y +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_9P_FS=m +CONFIG_AB3100_CORE=m +CONFIG_ABYSS=m +CONFIG_AC3200=m +CONFIG_AC97_BUS=m +# CONFIG_ACCESSIBILITY is not set +CONFIG_ACENIC=m +# CONFIG_ACENIC_OMIT_TIGON_I is not set +CONFIG_ACERHDF=m +CONFIG_ACER_WMI=m +CONFIG_ACORN_PARTITION=y +# CONFIG_ACORN_PARTITION_ADFS is not set +# CONFIG_ACORN_PARTITION_CUMANA is not set +# CONFIG_ACORN_PARTITION_EESOX is not set +CONFIG_ACORN_PARTITION_ICS=y +# CONFIG_ACORN_PARTITION_POWERTEC is not set +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_ACPI=y +CONFIG_ACPI_AC=y +# CONFIG_ACPI_ASUS is not set +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_CONTAINER=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ACPI_CUSTOM_DSDT_FILE="" +# CONFIG_ACPI_DEBUG is not set +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_FAN=y +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_NUMA=y +CONFIG_ACPI_PCI_SLOT=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y +CONFIG_ACPI_SBS=y +CONFIG_ACPI_SLEEP=y +CONFIG_ACPI_SYSFS_POWER=y +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_TOSHIBA=m +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_WMI=y +CONFIG_ACQUIRE_WDT=m +CONFIG_ACT200L_DONGLE=m +CONFIG_ACTISYS_DONGLE=m +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_ADM8211=m +CONFIG_ADVANTECH_WDT=m +CONFIG_AFFS_FS=m +# CONFIG_AFS_DEBUG is not set +CONFIG_AFS_FS=m +# CONFIG_AFS_FSCACHE is not set +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +CONFIG_AGNX=m +CONFIG_AGP_ALI=m +CONFIG_AGP_AMD=m +CONFIG_AGP_ATI=m +CONFIG_AGP_EFFICEON=m +CONFIG_AGP_INTEL=m +CONFIG_AGP_NVIDIA=m +CONFIG_AGP_SIS=m +CONFIG_AGP_SWORKS=m +CONFIG_AGP_VIA=m +CONFIG_AIC79XX_CMDS_PER_DEVICE=32 +CONFIG_AIC79XX_DEBUG_ENABLE=y +CONFIG_AIC79XX_DEBUG_MASK=0 +CONFIG_AIC79XX_REG_PRETTY_PRINT=y +CONFIG_AIC79XX_RESET_DELAY_MS=5000 +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 +CONFIG_AIC7XXX_DEBUG_ENABLE=y +CONFIG_AIC7XXX_DEBUG_MASK=0 +CONFIG_AIC7XXX_REG_PRETTY_PRINT=y +CONFIG_AIC7XXX_RESET_DELAY_MS=15000 +# CONFIG_AIC94XX_DEBUG is not set +CONFIG_AIO=y +CONFIG_AIRO=m +CONFIG_AIRO_CS=m +CONFIG_ALIM1535_WDT=m +CONFIG_ALIM7101_WDT=m +CONFIG_ALI_FIR=m +CONFIG_ALTERA_PCIE_CHDMA=m +CONFIG_AMD8111_ETH=m +CONFIG_AMD_IOMMU=y +CONFIG_AMD_IOMMU_STATS=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=m +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +# CONFIG_ANDROID_RAM_CONSOLE is not set +CONFIG_ANDROID_TIMED_GPIO=m +CONFIG_ANDROID_TIMED_OUTPUT=y +CONFIG_ANON_INODES=y +CONFIG_APM=m +# CONFIG_APM_ALLOW_INTS is not set +# CONFIG_APM_CPU_IDLE is not set +# CONFIG_APM_DISPLAY_BLANK is not set +# CONFIG_APM_DO_ENABLE is not set +# CONFIG_APM_IGNORE_USER_SUSPEND is not set +CONFIG_APPLICOM=m +CONFIG_APRICOT=m +CONFIG_AR9170_LEDS=y +CONFIG_AR9170_USB=m +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_DEFAULT_IDLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCNET=m +CONFIG_ARCNET_1051=m +CONFIG_ARCNET_1201=m +CONFIG_ARCNET_CAP=m +CONFIG_ARCNET_COM20020=m +CONFIG_ARCNET_COM20020_CS=m +CONFIG_ARCNET_COM20020_ISA=m +CONFIG_ARCNET_COM20020_PCI=m +CONFIG_ARCNET_COM90xx=m +CONFIG_ARCNET_COM90xxIO=m +CONFIG_ARCNET_RAW=m +CONFIG_ARCNET_RIM_I=m +CONFIG_ARLAN=m +# CONFIG_ARPD is not set +CONFIG_ASK_IP_FIB_HASH=y +CONFIG_ASUS_LAPTOP=m +CONFIG_ASUS_OLED=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_AT1700=m +CONFIG_AT76C50X_USB=m +CONFIG_ATA=y +CONFIG_ATALK=m +CONFIG_ATARI_PARTITION=y +CONFIG_ATA_ACPI=y +CONFIG_ATA_GENERIC=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_OVER_ETH=m +CONFIG_ATA_PIIX=y +CONFIG_ATA_SFF=y +CONFIG_ATH5K=m +# CONFIG_ATH5K_DEBUG is not set +CONFIG_ATH9K=m +CONFIG_ATH9K_DEBUG=y +CONFIG_ATH_COMMON=m +CONFIG_ATL1=m +CONFIG_ATL1C=m +CONFIG_ATL1E=m +CONFIG_ATL2=m +CONFIG_ATM=m +CONFIG_ATMEL=m +CONFIG_ATM_AMBASSADOR=m +# CONFIG_ATM_AMBASSADOR_DEBUG is not set +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_ATM_CLIP=m +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_DRIVERS=y +# CONFIG_ATM_DUMMY is not set +CONFIG_ATM_ENI=m +# CONFIG_ATM_ENI_DEBUG is not set +# CONFIG_ATM_ENI_TUNE_BURST is not set +CONFIG_ATM_FIRESTREAM=m +CONFIG_ATM_FORE200E=m +CONFIG_ATM_FORE200E_DEBUG=0 +CONFIG_ATM_FORE200E_TX_RETRY=16 +# CONFIG_ATM_FORE200E_USE_TASKLET is not set +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_ATM_HORIZON=m +# CONFIG_ATM_HORIZON_DEBUG is not set +CONFIG_ATM_IA=m +# CONFIG_ATM_IA_DEBUG is not set +CONFIG_ATM_IDT77252=m +# CONFIG_ATM_IDT77252_DEBUG is not set +# CONFIG_ATM_IDT77252_RCV_ALL is not set +CONFIG_ATM_IDT77252_USE_SUNI=y +CONFIG_ATM_LANAI=m +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_NICSTAR=m +# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set +# CONFIG_ATM_NICSTAR_USE_SUNI is not set +CONFIG_ATM_SOLOS=m +CONFIG_ATM_TCP=m +CONFIG_ATM_ZATM=m +# CONFIG_ATM_ZATM_DEBUG is not set +CONFIG_ATP=m +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_TREE=y +CONFIG_AUFS_BDEV_LOOP=y +# CONFIG_AUFS_BRANCH_MAX_1023 is not set +CONFIG_AUFS_BRANCH_MAX_127=y +# CONFIG_AUFS_BRANCH_MAX_32767 is not set +# CONFIG_AUFS_BRANCH_MAX_511 is not set +CONFIG_AUFS_BR_FUSE=y +CONFIG_AUFS_BR_RAMFS=y +# CONFIG_AUFS_DEBUG is not set +# CONFIG_AUFS_EXPORT is not set +CONFIG_AUFS_FS=m +CONFIG_AUFS_HINOTIFY=y +CONFIG_AUFS_POLL=y +# CONFIG_AUFS_SHWH is not set +CONFIG_AUTOFS4_FS=m +CONFIG_AUTOFS_FS=m +CONFIG_AUXDISPLAY=y +CONFIG_AVERATEC_5100P=m +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +CONFIG_B3DFG=m +CONFIG_B43=m +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +CONFIG_B43LEGACY_HWRNG=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PIO=y +# CONFIG_B43LEGACY_PIO_MODE is not set +# CONFIG_B43_DEBUG is not set +CONFIG_B43_HWRNG=y +CONFIG_B43_LEDS=y +CONFIG_B43_PCICORE_AUTOSELECT=y +CONFIG_B43_PCI_AUTOSELECT=y +# CONFIG_B43_PCMCIA is not set +CONFIG_B44=m +CONFIG_B44_PCI=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_BACKLIGHT_CARILLO_RANCH=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_DA903X=m +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_MBP_NVIDIA=m +CONFIG_BACKLIGHT_PROGEAR=m +CONFIG_BACKLIGHT_SAHARA=m +# CONFIG_BACKTRACE_SELF_TEST is not set +CONFIG_BASE_FULL=y +CONFIG_BASE_SMALL=0 +CONFIG_BATTERY_BQ27x00=m +CONFIG_BATTERY_DA9030=m +CONFIG_BATTERY_DS2760=m +CONFIG_BATTERY_DS2782=m +CONFIG_BATTERY_MAX17040=m +CONFIG_BATTERY_OLPC=m +CONFIG_BAYCOM_EPP=m +CONFIG_BAYCOM_PAR=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_BE2NET=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BEFS_FS=m +CONFIG_BFS_FS=m +CONFIG_BINARY_PRINTF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=m +CONFIG_BITREVERSE=y +CONFIG_BLK_CPQ_CISS_DA=m +CONFIG_BLK_CPQ_DA=m +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_3W_XXXX_RAID=m +# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_DEV_COMPCACHE=m +# CONFIG_BLK_DEV_COMPCACHE_DEBUG is not set +# CONFIG_BLK_DEV_COMPCACHE_STATS is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_DAC960=m +CONFIG_BLK_DEV_DM=y +CONFIG_BLK_DEV_DRBD=m +CONFIG_BLK_DEV_FD=m +# CONFIG_BLK_DEV_HD is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_MD=y +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_OSD=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BLK_DEV_SX8=m +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_UMEM=m +# CONFIG_BLK_DEV_XD is not set +# CONFIG_BLK_DEV_XIP is not set +CONFIG_BLOCK=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BNX2=m +CONFIG_BNX2X=m +CONFIG_BONDING=m +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BOUNCE=y +CONFIG_BPQETHER=m +CONFIG_BRANCH_PROFILE_NONE=y +CONFIG_BRIDGE=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_NETFILTER=y +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BROADCOM_PHY=y +CONFIG_BSD_DISKLABEL=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_BT=y +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIBTUART=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIVHCI=m +CONFIG_BT_HIDP=m +CONFIG_BT_L2CAP=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_SCO=y +CONFIG_BUG=y +CONFIG_C101=m +CONFIG_C2PORT=m +CONFIG_C2PORT_DURAMAR_2150=m +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set +CONFIG_CALGARY_IOMMU=y +CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y +CONFIG_CAN=m +CONFIG_CAN_BCM=m +# CONFIG_CAN_CALC_BITTIMING is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_EMS_PCI=m +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PM_TRACE=y +CONFIG_CAN_RAW=m +CONFIG_CAN_SJA1000=m +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_VCAN=m +CONFIG_CAPI_AVM=y +CONFIG_CAPI_EICON=y +CONFIG_CAPI_TRACE=y +CONFIG_CARDBUS=y +CONFIG_CARDMAN_4000=m +CONFIG_CARDMAN_4040=m +# CONFIG_CARMINE_DRAM_CUSTOM is not set +CONFIG_CASSINI=m +CONFIG_CB710_CORE=m +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_CC_STACKPROTECTOR=y +CONFIG_CC_STACKPROTECTOR_ALL=y +CONFIG_CDROM_PKTCDVD=y +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_CFAG12864B=m +CONFIG_CFAG12864B_RATE=20 +CONFIG_CFG80211=m +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_REG_DEBUG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CHARGER_PCF50633=m +CONFIG_CHECK_SIGNATURE=y +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T3=m +CONFIG_CHELSIO_T3_DEPENDS=y +CONFIG_CHR_DEV_OSST=m +CONFIG_CHR_DEV_SCH=m +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_ST=m +CONFIG_CICADA_PHY=y +CONFIG_CIFS=m +# CONFIG_CIFS_DEBUG2 is not set +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_CIFS_EXPERIMENTAL=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CISS_SCSI_TAPE=y +CONFIG_CLASSIC_RCU=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_CLS_U32_MARK=y +# CONFIG_CLS_U32_PERF is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_CNIC=m +CONFIG_CODA_FS=m +CONFIG_COMEDI=m +# CONFIG_COMEDI_DEBUG is not set +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_PCMCIA_DRIVERS=m +CONFIG_COMEDI_USB_DRIVERS=m +CONFIG_COMPAL_LAPTOP=m +CONFIG_COMPAT=y +CONFIG_COMPAT_BINFMT_ELF=y +# CONFIG_COMPAT_BRK is not set +CONFIG_COMPAT_FOR_U64_ALIGNMENT=y +# CONFIG_COMPAT_VDSO is not set +CONFIG_COMPUTONE=m +CONFIG_CONFIGFS_FS=m +CONFIG_CONNECTOR=y +CONFIG_CONSOLE_POLL=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONSTRUCTORS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +# CONFIG_COPS is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_COSA=m +# CONFIG_CPA_DEBUG is not set +CONFIG_CPU5_WDT=m +CONFIG_CPUSETS=y +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEBUG is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +CONFIG_CRAMFS=m +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_CRC_CCITT=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_AES_586=m +CONFIG_CRYPTO_AES_NI_INTEL=m +CONFIG_CRYPTO_AES_X86_64=m +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_DEV_GEODE=m +CONFIG_CRYPTO_DEV_HIFN_795X=m +CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y +CONFIG_CRYPTO_DEV_PADLOCK=y +CONFIG_CRYPTO_DEV_PADLOCK_AES=m +CONFIG_CRYPTO_DEV_PADLOCK_SHA=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_FPU=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SALSA20_586=m +CONFIG_CRYPTO_SALSA20_X86_64=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_586=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_TWOFISH_X86_64=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_ZLIB=m +CONFIG_CS5535_GPIO=m +CONFIG_CS89x0=m +CONFIG_CUSE=m +CONFIG_CYCLADES=m +CONFIG_CYCLADES_SYNC=m +CONFIG_CYCLOMX_X25=y +# CONFIG_CYZ_INTR is not set +CONFIG_DAB=y +CONFIG_DAVICOM_PHY=y +CONFIG_DCA=m +CONFIG_DCB=y +CONFIG_DCDBAS=m +CONFIG_DE2104X=m +CONFIG_DE2104X_DSL=0 +CONFIG_DE4X5=m +CONFIG_DE600=m +CONFIG_DE620=m +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_BOOT_PARAMS is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_NX_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DECNET=m +CONFIG_DECNET_NF_GRABULATOR=m +# CONFIG_DECNET_ROUTER is not set +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_HTCP is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=1 +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +# CONFIG_DEFAULT_NOOP is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_DEFXX=m +# CONFIG_DEFXX_MMIO is not set +CONFIG_DELL_LAPTOP=m +CONFIG_DELL_RBU=m +CONFIG_DELL_WMI=m +CONFIG_DEPCA=m +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_DEVKMEM is not set +CONFIG_DEVPORT=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +CONFIG_DEV_APPLETALK=m +CONFIG_DE_AOC=y +CONFIG_DIGIEPCA=m +CONFIG_DIRECT_GBPAGES=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_DISPLAY_SUPPORT=m +# CONFIG_DL2K is not set +CONFIG_DLCI=m +CONFIG_DLCI_MAX=8 +CONFIG_DLM=m +# CONFIG_DLM_DEBUG is not set +CONFIG_DM9102=m +CONFIG_DMADEVICES=y +# CONFIG_DMAR is not set +# CONFIG_DMATEST is not set +# CONFIG_DMA_API_DEBUG is not set +CONFIG_DMA_ENGINE=y +CONFIG_DMI=y +CONFIG_DMIID=y +CONFIG_DM_CRYPT=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_LOG_USERSPACE is not set +CONFIG_DM_MIRROR=y +CONFIG_DM_MULTIPATH=y +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +CONFIG_DM_RAID45=m +CONFIG_DM_SNAPSHOT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_ZERO=m +CONFIG_DNET=m +CONFIG_DNOTIFY=y +CONFIG_DONGLE=y +CONFIG_DOUBLEFAULT=y +CONFIG_DRAGONRISE_FF=y +CONFIG_DRM=m +CONFIG_DRM_I810=m +CONFIG_DRM_I830=m +CONFIG_DRM_I915=m +CONFIG_DRM_I915_KMS=y +CONFIG_DRM_MGA=m +CONFIG_DRM_R128=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_RADEON_KMS=y +CONFIG_DRM_SAVAGE=m +CONFIG_DRM_SIS=m +CONFIG_DRM_TDFX=m +CONFIG_DRM_TTM=m +CONFIG_DRM_VIA=m +CONFIG_DS1682=m +CONFIG_DSCC4=m +CONFIG_DSCC4_PCISYNC=y +CONFIG_DSCC4_PCI_RST=y +CONFIG_DST=m +# CONFIG_DST_DEBUG is not set +CONFIG_DTLK=m +CONFIG_DUMMY=m +CONFIG_DUMMY_CONSOLE=y +CONFIG_DVB_AF9013=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AV7110=m +CONFIG_DVB_AV7110_OSD=y +CONFIG_DVB_B2C2_FLEXCOP=m +# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_BT8XX=m +CONFIG_DVB_BUDGET=m +CONFIG_DVB_BUDGET_AV=m +CONFIG_DVB_BUDGET_CI=m +CONFIG_DVB_BUDGET_CORE=m +CONFIG_DVB_BUDGET_PATCH=m +CONFIG_DVB_CAPTURE_DRIVERS=y +CONFIG_DVB_CORE=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DM1105=m +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_FE_CUSTOMISE is not set +CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_IEEE1394=y +CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_L64781=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_MT312=m +CONFIG_DVB_MT352=m +CONFIG_DVB_NXT200X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_PLL=m +CONFIG_DVB_PLUTO2=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_S5H1411=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_STB0899=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STB6100=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STV0297=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_USB=m +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_VES1820=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10353=m +# CONFIG_DYNAMIC_DEBUG is not set +CONFIG_E100=m +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_E2100=m +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +CONFIG_ECHO=m +CONFIG_ECONET=m +CONFIG_ECONET_AUNUDP=y +CONFIG_ECONET_NATIVE=y +CONFIG_ECRYPT_FS=y +CONFIG_EDAC=y +CONFIG_EDAC_AMD64=m +# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set +CONFIG_EDAC_AMD76X=m +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_E752X=m +CONFIG_EDAC_E7XXX=m +CONFIG_EDAC_I3000=m +CONFIG_EDAC_I5000=m +CONFIG_EDAC_I5100=m +CONFIG_EDAC_I5400=m +CONFIG_EDAC_I82860=m +CONFIG_EDAC_I82875P=m +CONFIG_EDAC_I82975X=m +CONFIG_EDAC_MM_EDAC=m +CONFIG_EDAC_R82600=m +CONFIG_EDAC_X38=m +CONFIG_EDD=y +CONFIG_EDD_OFF=y +CONFIG_EEEPC_LAPTOP=m +CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EEXPRESS=m +CONFIG_EEXPRESS_PRO=m +CONFIG_EFI=y +CONFIG_EFI_PARTITION=y +CONFIG_EFI_VARS=y +CONFIG_EFS_FS=m +CONFIG_EISA=y +CONFIG_EISA_NAMES=y +CONFIG_EISA_PCI_EISA=y +CONFIG_EISA_VIRTUAL_ROOT=y +CONFIG_EISA_VLB_PRIMING=y +CONFIG_EL1=m +CONFIG_EL16=m +CONFIG_EL2=m +CONFIG_EL3=m +CONFIG_ELF_CORE=y +CONFIG_ELMC=m +CONFIG_ELMC_II=m +CONFIG_ELPLUS=m +# CONFIG_EMBEDDED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENC28J60 is not set +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_ENIC=m +CONFIG_EPIC100=m +CONFIG_EPL=m +CONFIG_EPOLL=y +CONFIG_EQUALIZER=m +CONFIG_ES3210=m +CONFIG_ESI_DONGLE=m +CONFIG_ET131X=m +# CONFIG_ET131X_DEBUG is not set +CONFIG_ETH16I=m +CONFIG_ETHOC=m +CONFIG_EUROTECH_WDT=m +CONFIG_EVENTFD=y +CONFIG_EVENT_PROFILE=y +CONFIG_EVENT_TRACING=y +CONFIG_EWRK3=m +# CONFIG_EXOFS_DEBUG is not set +CONFIG_EXOFS_FS=m +CONFIG_EXPERIMENTAL=y +CONFIG_EXPORTFS=m +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_DEFAULTS_TO_ORDERED=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_EZX_PCAP is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FARSYNC=m +CONFIG_FAST_CMPXCHG_LOCAL=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_FAT_FS=m +# CONFIG_FAULT_INJECTION is not set +CONFIG_FB=y +CONFIG_FB_3DFX=m +# CONFIG_FB_3DFX_ACCEL is not set +CONFIG_FB_3DFX_I2C=y +CONFIG_FB_ARC=m +CONFIG_FB_ARK=m +CONFIG_FB_ASILIANT=y +CONFIG_FB_ATY=m +CONFIG_FB_ATY128=m +CONFIG_FB_ATY128_BACKLIGHT=y +CONFIG_FB_ATY_BACKLIGHT=y +CONFIG_FB_ATY_CT=y +CONFIG_FB_ATY_GENERIC_LCD=y +CONFIG_FB_ATY_GX=y +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_BOOT_VESA_SUPPORT=y +CONFIG_FB_BROADSHEET=m +CONFIG_FB_CARILLO_RANCH=m +CONFIG_FB_CARMINE=m +CONFIG_FB_CARMINE_DRAM_EVAL=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_CIRRUS=m +CONFIG_FB_CYBER2000=m +CONFIG_FB_DDC=m +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_EFI=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_GEODE=y +CONFIG_FB_GEODE_GX=m +CONFIG_FB_GEODE_GX1=m +CONFIG_FB_GEODE_LX=m +CONFIG_FB_HECUBA=m +CONFIG_FB_HGA=m +# CONFIG_FB_HGA_ACCEL is not set +CONFIG_FB_I810=m +# CONFIG_FB_I810_GTF is not set +CONFIG_FB_IMSTT=y +CONFIG_FB_KYRO=m +CONFIG_FB_LE80578=m +# CONFIG_FB_MACMODES is not set +CONFIG_FB_MATROX=m +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MULTIHEAD=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MB862XX=m +CONFIG_FB_MB862XX_PCI_GDC=y +CONFIG_FB_METRONOME=m +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_N411=m +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_NVIDIA=m +CONFIG_FB_NVIDIA_BACKLIGHT=y +# CONFIG_FB_NVIDIA_DEBUG is not set +CONFIG_FB_NVIDIA_I2C=y +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +CONFIG_FB_PM3=m +CONFIG_FB_RADEON=m +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RIVA=m +CONFIG_FB_RIVA_BACKLIGHT=y +# CONFIG_FB_RIVA_DEBUG is not set +CONFIG_FB_RIVA_I2C=y +CONFIG_FB_S1D13XXX=m +CONFIG_FB_S3=m +CONFIG_FB_SAVAGE=m +CONFIG_FB_SAVAGE_ACCEL=y +CONFIG_FB_SAVAGE_I2C=y +CONFIG_FB_SIS=m +CONFIG_FB_SIS_300=y +CONFIG_FB_SIS_315=y +CONFIG_FB_SM501=m +CONFIG_FB_SVGALIB=m +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +CONFIG_FB_TILEBLITTING=y +CONFIG_FB_TMIO=m +CONFIG_FB_TMIO_ACCELL=y +CONFIG_FB_TRIDENT=m +CONFIG_FB_UDL=m +CONFIG_FB_UVESA=m +CONFIG_FB_VESA=m +CONFIG_FB_VGA16=m +CONFIG_FB_VIA=m +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_VOODOO1=m +CONFIG_FB_VT8623=m +CONFIG_FCOE=m +CONFIG_FCOE_FNIC=m +CONFIG_FDDI=y +CONFIG_FEALNX=m +CONFIG_FIB_RULES=y +CONFIG_FILE_LOCKING=y +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_NET=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_OHCI_DEBUG=y +# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set +CONFIG_FIREWIRE_SBP2=m +CONFIG_FIRMWARE_EDID=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FORCEDETH=m +# CONFIG_FORCEDETH_NAPI is not set +CONFIG_FRAMEBUFFER_CONSOLE=m +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FRAME_WARN=1024 +CONFIG_FREEZER=y +CONFIG_FSAM7400=m +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_STATS is not set +CONFIG_FSNOTIFY=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FTL=m +CONFIG_FTRACE=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_FUJITSU_LAPTOP=m +# CONFIG_FUJITSU_LAPTOP_DEBUG is not set +# CONFIG_FUNCTION_TRACER is not set +CONFIG_FUSE_FS=y +CONFIG_FUSION=y +CONFIG_FUSION_CTL=m +CONFIG_FUSION_FC=m +CONFIG_FUSION_LAN=m +CONFIG_FUSION_LOGGING=y +CONFIG_FUSION_MAX_SGE=128 +CONFIG_FUSION_SAS=m +CONFIG_FUSION_SPI=m +CONFIG_FUTEX=y +CONFIG_FW_LOADER=y +CONFIG_GACT_PROB=y +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GARP=m +CONFIG_GART_IOMMU=y +# CONFIG_GCOV_KERNEL is not set +CONFIG_GENERIC_ACL=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TRACER=y +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +CONFIG_GIGASET_BASE=m +# CONFIG_GIGASET_DEBUG is not set +CONFIG_GIGASET_M101=m +CONFIG_GIGASET_M105=m +CONFIG_GIRBIL_DONGLE=m +CONFIG_GPIOLIB=y +CONFIG_GPIO_MAX7301=m +CONFIG_GPIO_MAX732X=m +CONFIG_GPIO_MCP23S08=m +CONFIG_GPIO_PCA953X=m +CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_TWL4030=m +CONFIG_GREENASIA_FF=y +CONFIG_GROUP_SCHED=y +CONFIG_HAMACHI=m +CONFIG_HAMRADIO=y +CONFIG_HANGCHECK_TIMER=m +CONFIG_HAPPYMEAL=m +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_KMEMCHECK=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ATOMIC_IOMAP=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FTRACE_SYSCALLS=y +CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +CONFIG_HAVE_MTD_OTP=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_COUNTERS=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_HDLC=m +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +CONFIG_HDLC_RAW=m +CONFIG_HDLC_RAW_ETH=m +CONFIG_HDLC_X25=m +# CONFIG_HEADERS_CHECK is not set +CONFIG_HECI=m +CONFIG_HERMES=m +CONFIG_HERMES_CACHE_FW_ON_INIT=y +CONFIG_HFSPLUS_FS=m +CONFIG_HFS_FS=m +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_NVS=y +CONFIG_HID=y +CONFIG_HIDRAW=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DEBUG is not set +CONFIG_HID_DRAGONRISE=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GREENASIA=m +CONFIG_HID_GYRATION=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_KYE=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PID=y +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID_THRUSTMASTER=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_WACOM=m +CONFIG_HID_ZEROPLUS=m +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_HIPPI=y +CONFIG_HISAX_16_0=y +CONFIG_HISAX_16_3=y +CONFIG_HISAX_1TR6=y +CONFIG_HISAX_ASUSCOM=y +CONFIG_HISAX_AVM_A1=y +CONFIG_HISAX_AVM_A1_CS=m +CONFIG_HISAX_AVM_A1_PCMCIA=y +CONFIG_HISAX_BKM_A4T=y +# CONFIG_HISAX_DEBUG is not set +CONFIG_HISAX_DIEHLDIVA=y +CONFIG_HISAX_ELSA=y +CONFIG_HISAX_ELSA_CS=m +CONFIG_HISAX_ENTERNOW_PCI=y +CONFIG_HISAX_EURO=y +CONFIG_HISAX_FRITZPCI=y +CONFIG_HISAX_FRITZ_PCIPNP=m +CONFIG_HISAX_GAZEL=y +CONFIG_HISAX_HDLC=y +CONFIG_HISAX_HFC4S8S=m +CONFIG_HISAX_HFCS=y +CONFIG_HISAX_HFCUSB=m +CONFIG_HISAX_HFC_PCI=y +CONFIG_HISAX_HFC_SX=y +CONFIG_HISAX_HSTSAPHIR=y +CONFIG_HISAX_ISURF=y +CONFIG_HISAX_IX1MICROR2=y +CONFIG_HISAX_MAX_CARDS=8 +CONFIG_HISAX_MIC=y +CONFIG_HISAX_NETJET=y +CONFIG_HISAX_NETJET_U=y +CONFIG_HISAX_NI1=y +CONFIG_HISAX_NICCY=y +# CONFIG_HISAX_NO_KEYPAD is not set +# CONFIG_HISAX_NO_LLC is not set +# CONFIG_HISAX_NO_SENDCOMPLETE is not set +CONFIG_HISAX_S0BOX=y +CONFIG_HISAX_SCT_QUADRO=y +CONFIG_HISAX_SEDLBAUER=y +CONFIG_HISAX_SEDLBAUER_CS=m +CONFIG_HISAX_SPORTSTER=y +CONFIG_HISAX_ST5481=m +CONFIG_HISAX_TELEINT=y +CONFIG_HISAX_TELESPCI=y +CONFIG_HISAX_TELES_CS=m +CONFIG_HISAX_W6692=y +CONFIG_HOSTAP=m +CONFIG_HOSTAP_CS=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_PCI=m +CONFIG_HOSTAP_PLX=m +CONFIG_HOSTESS_SV11=m +CONFIG_HOTPLUG=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=m +CONFIG_HOTPLUG_PCI_ACPI_IBM=m +CONFIG_HOTPLUG_PCI_COMPAQ=m +CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM=y +CONFIG_HOTPLUG_PCI_CPCI=y +CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m +CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m +CONFIG_HOTPLUG_PCI_FAKE=m +CONFIG_HOTPLUG_PCI_IBM=m +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_HOTPLUG_PCI_SHPC=m +CONFIG_HP100=m +CONFIG_HPET=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_HPET_MMAP=y +CONFIG_HPET_TIMER=y +CONFIG_HPFS_FS=m +CONFIG_HPLAN=m +CONFIG_HPLAN_PLUS=m +CONFIG_HP_ILO=m +# CONFIG_HP_WATCHDOG is not set +CONFIG_HP_WMI=m +CONFIG_HTC_PASIC3=m +CONFIG_HT_IRQ=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_HWMON_VID=m +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_AMD=m +CONFIG_HW_RANDOM_GEODE=m +CONFIG_HW_RANDOM_INTEL=m +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HW_RANDOM_VIA=m +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_HYSDN=m +CONFIG_HYSDN_CAPI=y +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_300 is not set +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD756_S4882=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_DEBUG_CORE is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_I801=m +CONFIG_I2C_ISCH=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_NFORCE2_S4985=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_PARPORT=m +CONFIG_I2C_PARPORT_LIGHT=m +CONFIG_I2C_PCA_ISA=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_PIIX4=m +CONFIG_I2C_SIMTEC=m +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_STUB=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m +CONFIG_I2C_VOODOO3=m +CONFIG_I2O=m +CONFIG_I2O_BLOCK=m +CONFIG_I2O_BUS=m +CONFIG_I2O_CONFIG=m +CONFIG_I2O_CONFIG_OLD_IOCTL=y +CONFIG_I2O_EXT_ADAPTEC=y +CONFIG_I2O_EXT_ADAPTEC_DMA64=y +CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y +CONFIG_I2O_PROC=m +CONFIG_I2O_SCSI=m +CONFIG_I6300ESB_WDT=m +CONFIG_I7300_IDLE=m +CONFIG_I7300_IDLE_IOAT_CHANNEL=y +CONFIG_I82092=m +CONFIG_I82365=m +CONFIG_I8K=m +# CONFIG_IA32_AOUT is not set +CONFIG_IA32_EMULATION=y +CONFIG_IB700_WDT=m +CONFIG_IBMASR=m +CONFIG_IBMLANA=m +CONFIG_IBMLS=m +# CONFIG_IBMMCA_SCSI_DEV_RESET is not set +CONFIG_IBMMCA_SCSI_ORDER_STANDARD=y +CONFIG_IBMOL=m +CONFIG_IBMTR=m +CONFIG_IBM_ASM=m +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +CONFIG_ICPLUS_PHY=y +CONFIG_ICS932S401=m +# CONFIG_IDE is not set +CONFIG_IDE_PHISON=m +CONFIG_IEEE1394=m +CONFIG_IEEE1394_DV1394=m +CONFIG_IEEE1394_ETH1394=m +CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y +CONFIG_IEEE1394_OHCI1394=m +CONFIG_IEEE1394_PCILYNX=m +CONFIG_IEEE1394_RAWIO=m +CONFIG_IEEE1394_SBP2=m +# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set +# CONFIG_IEEE1394_VERBOSEDEBUG is not set +CONFIG_IEEE1394_VIDEO1394=m +CONFIG_IEEE802154=m +CONFIG_IEEE802154_DRIVERS=m +# CONFIG_IEEE802154_FAKEHARD is not set +CONFIG_IFB=m +CONFIG_IGB=m +CONFIG_IGBVF=m +CONFIG_IGB_DCA=y +# CONFIG_IKCONFIG is not set +# CONFIG_IMA is not set +CONFIG_INET=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET_AH=m +CONFIG_INET_DCCP_DIAG=m +CONFIG_INET_DIAG=y +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_LRO=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_AMSO1100=m +CONFIG_INFINIBAND_AMSO1100_DEBUG=y +CONFIG_INFINIBAND_CXGB3=m +# CONFIG_INFINIBAND_CXGB3_DEBUG is not set +CONFIG_INFINIBAND_IPATH=m +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_MTHCA=m +CONFIG_INFINIBAND_MTHCA_DEBUG=y +# CONFIG_INFINIBAND_NES is not set +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INFTL=m +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=y +# CONFIG_INPUT_APANEL is not set +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_ATLAS_BTNS=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_EVBUG=m +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_MIMIO=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_PCF50633_PMU=m +CONFIG_INPUT_PCSPKR=m +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_TABLET=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_TWL4030_PWRBUTTON=m +CONFIG_INPUT_UINPUT=m +CONFIG_INPUT_WISTRON_BTNS=m +CONFIG_INPUT_YEALINK=m +CONFIG_INTEL_IOATDMA=m +CONFIG_INTEL_MENLOW=m +# CONFIG_INTR_REMAP is not set +# CONFIG_IOMMU_DEBUG is not set +# CONFIG_IOMMU_STRESS is not set +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_CFQ=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_NOOP=y +# CONFIG_IO_DELAY_0X80 is not set +CONFIG_IO_DELAY_0XED=y +# CONFIG_IO_DELAY_NONE is not set +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +# CONFIG_IO_DELAY_UDELAY is not set +CONFIG_IP1000=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IPC_NS=y +CONFIG_IPDDP=m +CONFIG_IPDDP_DECAP=y +CONFIG_IPDDP_ENCAP=y +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_HANDLER=m +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_POWEROFF=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPPP_FILTER=y +CONFIG_IPV6=y +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_MROUTE is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_IPV6_PRIVACY=y +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SUBTREES is not set +CONFIG_IPV6_TUNNEL=m +CONFIG_IPW2100=m +# CONFIG_IPW2100_DEBUG is not set +CONFIG_IPW2100_MONITOR=y +CONFIG_IPW2200=m +# CONFIG_IPW2200_DEBUG is not set +CONFIG_IPW2200_MONITOR=y +CONFIG_IPW2200_PROMISCUOUS=y +CONFIG_IPW2200_QOS=y +CONFIG_IPW2200_RADIOTAP=y +CONFIG_IPWIRELESS=m +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_DCCP=m +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=y +# CONFIG_IP_DCCP_CCID3_DEBUG is not set +CONFIG_IP_DCCP_CCID3_RTO=100 +# CONFIG_IP_DCCP_DEBUG is not set +CONFIG_IP_DCCP_TFRC_LIB=y +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_IP_PNP is not set +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_SCTP=m +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_IPV6=y +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_TAB_BITS=12 +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_WRR=m +CONFIG_IRCOMM=m +CONFIG_IRDA=m +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_DEBUG=y +CONFIG_IRDA_FAST_RR=y +CONFIG_IRDA_ULTRA=y +CONFIG_IRLAN=m +CONFIG_IRNET=m +# CONFIG_IRQSOFF_TRACER is not set +CONFIG_IRTTY_SIR=m +CONFIG_ISA=y +CONFIG_ISAPNP=y +CONFIG_ISA_DMA_API=y +CONFIG_ISCSI_IBFT=m +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_TCP=m +CONFIG_ISDN=y +CONFIG_ISDN_AUDIO=y +CONFIG_ISDN_CAPI=m +CONFIG_ISDN_CAPI_CAPI20=m +CONFIG_ISDN_CAPI_CAPIDRV=m +CONFIG_ISDN_CAPI_CAPIFS=m +CONFIG_ISDN_CAPI_CAPIFS_BOOL=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_ISDN_DIVAS=m +CONFIG_ISDN_DIVAS_BRIPCI=y +CONFIG_ISDN_DIVAS_DIVACAPI=m +CONFIG_ISDN_DIVAS_MAINT=m +CONFIG_ISDN_DIVAS_PRIPCI=y +CONFIG_ISDN_DIVAS_USERIDI=m +CONFIG_ISDN_DIVERSION=m +CONFIG_ISDN_DRV_ACT2000=m +CONFIG_ISDN_DRV_AVMB1_AVM_CS=m +CONFIG_ISDN_DRV_AVMB1_B1ISA=m +CONFIG_ISDN_DRV_AVMB1_B1PCI=m +CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y +CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m +CONFIG_ISDN_DRV_AVMB1_C4=m +CONFIG_ISDN_DRV_AVMB1_T1ISA=m +CONFIG_ISDN_DRV_AVMB1_T1PCI=m +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +CONFIG_ISDN_DRV_GIGASET=m +CONFIG_ISDN_DRV_HISAX=m +CONFIG_ISDN_DRV_ICN=m +CONFIG_ISDN_DRV_PCBIT=m +CONFIG_ISDN_DRV_SC=m +CONFIG_ISDN_I4L=m +CONFIG_ISDN_MPP=y +CONFIG_ISDN_PPP=y +CONFIG_ISDN_PPP_BSDCOMP=m +CONFIG_ISDN_PPP_VJ=y +CONFIG_ISDN_TTY_FAX=y +CONFIG_ISDN_X25=y +# CONFIG_ISI is not set +CONFIG_ISL29003=m +CONFIG_ISO9660_FS=m +CONFIG_ISTALLION=m +CONFIG_IT8712F_WDT=m +CONFIG_IT87_WDT=m +CONFIG_ITCO_VENDOR_SUPPORT=y +CONFIG_ITCO_WDT=m +CONFIG_IWL3945=m +CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y +CONFIG_IWL4965=y +CONFIG_IWL5000=y +CONFIG_IWLAGN=m +CONFIG_IWLWIFI=m +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLWIFI_LEDS=y +# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set +CONFIG_IWM=m +# CONFIG_IWM_DEBUG is not set +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_DCA=y +CONFIG_IXGBE_DCB=y +CONFIG_JBD=y +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +# CONFIG_JBD_DEBUG is not set +CONFIG_JFFS2_CMODE_FAVOURLZO=y +# CONFIG_JFFS2_CMODE_NONE is not set +# CONFIG_JFFS2_CMODE_PRIORITY is not set +# CONFIG_JFFS2_CMODE_SIZE is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFS_DEBUG is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +CONFIG_JFS_STATISTICS=y +CONFIG_JME=m +CONFIG_JOLIET=y +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_WALKERA0701=m +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_K8_NB=y +CONFIG_K8_NUMA=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_KARMA_PARTITION=y +# CONFIG_KERNEL_BZIP2 is not set +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_JUMP=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_LM8323=m +CONFIG_KEYBOARD_MATRIX=m +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYS=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +CONFIG_KGDB=y +CONFIG_KGDB_SERIAL_CONSOLE=y +# CONFIG_KGDB_TESTS is not set +CONFIG_KINGSUN_DONGLE=m +# CONFIG_KMEMCHECK is not set +# CONFIG_KMEMTRACE is not set +CONFIG_KPROBES=y +# CONFIG_KPROBES_SANITY_TEST is not set +CONFIG_KRETPROBES=y +CONFIG_KS0108=m +CONFIG_KS0108_DELAY=2 +CONFIG_KS0108_PORT=0x378 +CONFIG_KS8842=m +CONFIG_KS8851=m +CONFIG_KS959_DONGLE=m +CONFIG_KSDAZZLE_DONGLE=m +CONFIG_KVM=m +CONFIG_KVM_AMD=m +CONFIG_KVM_CLOCK=y +CONFIG_KVM_GUEST=y +CONFIG_KVM_INTEL=m +# CONFIG_KVM_TRACE is not set +CONFIG_LANCE=m +CONFIG_LANMEDIA=m +CONFIG_LAPB=m +CONFIG_LAPBETHER=m +CONFIG_LATENCYTOP=y +CONFIG_LBDAF=y +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_LCD_ILI9320=m +CONFIG_LCD_LTV350QV=m +CONFIG_LCD_PLATFORM=m +CONFIG_LCD_TDO24M=m +CONFIG_LCD_VGG2432A4=m +# CONFIG_LDM_DEBUG is not set +CONFIG_LDM_PARTITION=y +CONFIG_LEDS_ALIX2=m +CONFIG_LEDS_BD2802=m +CONFIG_LEDS_CLASS=m +# CONFIG_LEDS_CLEVO_MAIL is not set +CONFIG_LEDS_DA903X=m +CONFIG_LEDS_DAC124S085=m +CONFIG_LEDS_GPIO=m +CONFIG_LEDS_GPIO_PLATFORM=y +CONFIG_LEDS_LP3944=m +CONFIG_LEDS_NET48XX=m +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_PCA955X=m +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_LEDS_TRIGGER_GPIO=m +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_WM8350=m +CONFIG_LEDS_WRAP=m +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=0 +CONFIG_LENOVO_SL_LAPTOP=m +# CONFIG_LGUEST is not set +# CONFIG_LGUEST_GUEST is not set +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +CONFIG_LIB80211_CRYPT_WEP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_LIBCRC32C=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_CS=m +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_SPI=m +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_LIBIPW=m +CONFIG_LIBIPW_DEBUG=y +CONFIG_LINE6_USB=m +CONFIG_LIRC_ATIUSB=m +CONFIG_LIRC_BT829=m +CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m +CONFIG_LIRC_DEV=m +CONFIG_LIRC_ENE0100=m +# CONFIG_LIRC_GPIO is not set +CONFIG_LIRC_I2C=m +CONFIG_LIRC_IGORPLUGUSB=m +CONFIG_LIRC_IMON=m +CONFIG_LIRC_IT87=m +CONFIG_LIRC_ITE8709=m +CONFIG_LIRC_MCEUSB=m +# CONFIG_LIRC_PARALLEL is not set +CONFIG_LIRC_SASEM=m +CONFIG_LIRC_SERIAL=m +CONFIG_LIRC_SIR=m +CONFIG_LIRC_STREAMZAP=m +CONFIG_LIRC_TTUSBIR=m +CONFIG_LITELINK_DONGLE=m +# CONFIG_LKDTM is not set +CONFIG_LLC=y +CONFIG_LLC2=m +CONFIG_LNE390=m +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_LOCKD=m +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_LOCKD_V4=y +CONFIG_LOCK_KERNEL=y +# CONFIG_LOCK_STAT is not set +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGITECH_FF=y +# CONFIG_LOGO is not set +CONFIG_LP486E=m +# CONFIG_LP_CONSOLE is not set +CONFIG_LSI_ET1011C_PHY=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_LTPC=m +CONFIG_LXT_PHY=y +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_M386 is not set +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +CONFIG_MA600_DONGLE=m +CONFIG_MAC80211=m +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_DEFAULT_PS=y +CONFIG_MAC80211_DEFAULT_PS_VALUE=1 +CONFIG_MAC80211_HWSIM=m +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MACHZ_WDT=m +CONFIG_MACINTOSH_DRIVERS=y +CONFIG_MACVLAN=m +CONFIG_MAC_EMUMOUSEBTN=y +CONFIG_MAC_PARTITION=y +CONFIG_MADGEMC=m +CONFIG_MAGIC_SYSRQ=y +CONFIG_MARKERS=y +CONFIG_MARVELL_PHY=y +# CONFIG_MATH_EMULATION is not set +# CONFIG_MAXSMP is not set +CONFIG_MAX_RAW_DEVS=256 +CONFIG_MCA=y +CONFIG_MCA_LEGACY=y +# CONFIG_MCA_PROC_FS is not set +# CONFIG_MCORE2 is not set +CONFIG_MCP2120_DONGLE=m +# CONFIG_MCRUSOE is not set +CONFIG_MCS_FIR=m +# CONFIG_MCYRIXIII is not set +CONFIG_MD=y +CONFIG_MDA_CONSOLE=m +CONFIG_MDIO=m +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_GPIO=y +CONFIG_MD_AUTODETECT=y +CONFIG_MD_FAULTY=m +CONFIG_MD_LINEAR=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +CONFIG_ME0600=m +CONFIG_ME0900=m +CONFIG_ME1000=m +CONFIG_ME1400=m +CONFIG_ME1600=m +CONFIG_ME4000=m +CONFIG_ME4600=m +CONFIG_ME6000=m +CONFIG_ME8100=m +CONFIG_ME8200=m +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDUMMY=m +# CONFIG_MEFFICEON is not set +CONFIG_MEGARAID_LEGACY=m +CONFIG_MEGARAID_MAILBOX=m +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_SAS=m +CONFIG_MEILHAUS=m +CONFIG_MEMSTICK=m +# CONFIG_MEMSTICK_DEBUG is not set +CONFIG_MEMSTICK_JMICRON_38X=m +CONFIG_MEMSTICK_TIFM_MS=m +# CONFIG_MEMSTICK_UNSAFE_RESUME is not set +# CONFIG_MEMTEST is not set +CONFIG_MFD_CORE=m +CONFIG_MFD_PCF50633=m +CONFIG_MFD_SM501=m +# CONFIG_MFD_SM501_GPIO is not set +# CONFIG_MFD_TMIO is not set +CONFIG_MFD_WM8350=m +CONFIG_MFD_WM8350_I2C=m +CONFIG_MFD_WM8400=m +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +CONFIG_MICROCODE=m +CONFIG_MICROCODE_AMD=y +CONFIG_MICROCODE_INTEL=y +CONFIG_MICROCODE_OLD_INTERFACE=y +CONFIG_MIGRATION=y +CONFIG_MII=m +CONFIG_MINIX_FS=m +CONFIG_MINIX_SUBPARTITION=y +CONFIG_MISC_DEVICES=y +CONFIG_MISC_FILESYSTEMS=y +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_HFCMULTI=m +CONFIG_MISDN_HFCPCI=m +CONFIG_MISDN_HFCUSB=m +CONFIG_MISDN_L1OIP=m +CONFIG_MIXCOMWD=m +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +CONFIG_MKISS=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_INFINIBAND=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_MMC_CB710=m +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_RICOH_MMC=m +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_SDHCI_PLTFM=m +CONFIG_MMC_SDRICOH_CS=m +CONFIG_MMC_SPI=m +# CONFIG_MMC_TEST is not set +CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_UNSAFE_RESUME is not set +CONFIG_MMC_VIA_SDMMC=m +CONFIG_MMC_WBSD=m +# CONFIG_MMIOTRACE is not set +CONFIG_MMU=y +CONFIG_MMU_NOTIFIER=y +CONFIG_MM_OWNER=y +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MOUSE_APPLETOUCH=m +# CONFIG_MOUSE_ATIXL is not set +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_GPIO=m +CONFIG_MOUSE_INPORT=m +CONFIG_MOUSE_LOGIBM=m +CONFIG_MOUSE_PC110PAD=m +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_OLPC=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_VSXXXAA=m +CONFIG_MOXA_INTELLIO=m +CONFIG_MOXA_SMARTIO=m +# CONFIG_MPENTIUM4 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPSC is not set +CONFIG_MSDOS_FS=m +CONFIG_MSDOS_PARTITION=y +CONFIG_MSI_LAPTOP=m +CONFIG_MSNDCLAS_INIT_FILE="/etc/sound/msndinit.bin" +CONFIG_MSNDCLAS_PERM_FILE="/etc/sound/msndperm.bin" +CONFIG_MSNDPIN_INIT_FILE="/etc/sound/pndspini.bin" +CONFIG_MSNDPIN_PERM_FILE="/etc/sound/pndsperm.bin" +CONFIG_MSPRO_BLOCK=m +CONFIG_MTD=m +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTD_ABSENT=m +CONFIG_MTD_ALAUDA=m +CONFIG_MTD_AMD76XROM=m +CONFIG_MTD_AR7_PARTS=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK2MTD=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_MTD_CFI=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_CHAR=m +CONFIG_MTD_CK804XROM=m +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_CONCAT=m +CONFIG_MTD_DATAFLASH=m +CONFIG_MTD_DATAFLASH_OTP=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_DOC2000=m +CONFIG_MTD_DOC2001=m +CONFIG_MTD_DOC2001PLUS=m +CONFIG_MTD_DOCECC=m +CONFIG_MTD_DOCPROBE=m +CONFIG_MTD_DOCPROBE_ADDRESS=0 +# CONFIG_MTD_DOCPROBE_ADVANCED is not set +CONFIG_MTD_ESB2ROM=m +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_ICHXROM=m +CONFIG_MTD_INTEL_VR_NOR=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_L440GX=m +CONFIG_MTD_LPDDR=m +CONFIG_MTD_M25P80=m +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MTDRAM=m +CONFIG_MTD_NAND=m +CONFIG_MTD_NAND_CAFE=m +CONFIG_MTD_NAND_CS553X=m +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND_IDS=m +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_NANDSIM=m +CONFIG_MTD_NAND_PLATFORM=m +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NETSC520=m +CONFIG_MTD_NETtel=m +CONFIG_MTD_ONENAND=m +CONFIG_MTD_ONENAND_2X_PROGRAM=y +# CONFIG_MTD_ONENAND_OTP is not set +CONFIG_MTD_ONENAND_SIM=m +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +CONFIG_MTD_OOPS=m +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_PCI=m +CONFIG_MTD_PHRAM=m +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PLATRAM=m +CONFIG_MTD_PMC551=m +# CONFIG_MTD_PMC551_BUGFIX is not set +# CONFIG_MTD_PMC551_DEBUG is not set +CONFIG_MTD_QINFO_PROBE=m +CONFIG_MTD_RAM=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS=m +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +CONFIG_MTD_ROM=m +CONFIG_MTD_SBC_GXX=m +CONFIG_MTD_SC520CDP=m +CONFIG_MTD_SCB2_FLASH=m +CONFIG_MTD_SCx200_DOCFLASH=m +CONFIG_MTD_SLRAM=m +CONFIG_MTD_TESTS=m +CONFIG_MTD_TS5500=m +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_DEBUG is not set +CONFIG_MTD_UBI_GLUEBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +CONFIG_MWAVE=m +# CONFIG_MWINCHIP3D is not set +# CONFIG_MWINCHIPC6 is not set +CONFIG_MWL8K=m +CONFIG_MYRI10GE=m +CONFIG_MYRI10GE_DCA=y +CONFIG_N2=m +CONFIG_NAMESPACES=y +CONFIG_NATIONAL_PHY=y +CONFIG_NATSEMI=m +CONFIG_NCPFS_EXTRAS=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_PACKET_SIGNING=y +# CONFIG_NCPFS_SMALLDOS is not set +CONFIG_NCPFS_STRONG=y +CONFIG_NCP_FS=m +CONFIG_NDISWRAPPER=m +CONFIG_NE2000=m +CONFIG_NE2K_PCI=m +CONFIG_NE2_MCA=m +CONFIG_NE3210=m +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_NET=y +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETDEVICES=y +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_TPROXY=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETLABEL=y +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NETROM=m +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETXEN_NIC=m +CONFIG_NET_9P=m +# CONFIG_NET_9P_DEBUG is not set +CONFIG_NET_9P_RDMA=m +CONFIG_NET_9P_VIRTIO=m +CONFIG_NET_ACT_GACT=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_CLS=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_CGROUP=y +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_FW=m +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_U32=m +CONFIG_NET_DCCPPROBE=m +CONFIG_NET_DMA=y +# CONFIG_NET_DROP_MONITOR is not set +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6060=y +CONFIG_NET_DSA_MV88E6123_61_65=y +CONFIG_NET_DSA_MV88E6131=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_DSA_TAG_TRAILER=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_ETHERNET=y +CONFIG_NET_FC=y +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_NET_IPIP=m +CONFIG_NET_ISA=y +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_NET_NS=y +CONFIG_NET_PCI=y +CONFIG_NET_PCMCIA=y +CONFIG_NET_PKTGEN=m +CONFIG_NET_POCKET=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_NET_SB1000=m +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_FIFO=y +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_TCPPROBE=m +CONFIG_NET_TULIP=y +CONFIG_NET_VENDOR_3COM=y +CONFIG_NET_VENDOR_RACAL=y +CONFIG_NET_VENDOR_SMC=y +CONFIG_NEW_LEDS=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_NFS_FS=m +# CONFIG_NFS_FSCACHE is not set +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_V4_1 is not set +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_PROTO_DCCP=m +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_PROTO_DCCP=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NI52=m +CONFIG_NI65=m +CONFIG_NILFS2_FS=m +CONFIG_NIU=m +CONFIG_NLATTR=y +CONFIG_NLS=y +CONFIG_NLS_ASCII=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +CONFIG_NODES_SHIFT=6 +CONFIG_NODES_SPAN_OTHER_NODES=y +# CONFIG_NOHIGHMEM is not set +CONFIG_NOP_TRACER=y +CONFIG_NOP_USB_XCEIV=m +CONFIG_NORTEL_HERMES=m +CONFIG_NOZOMI=m +CONFIG_NO_HZ=y +CONFIG_NS83820=m +CONFIG_NSC_FIR=m +CONFIG_NSC_GPIO=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_FS=m +# CONFIG_NTFS_RW is not set +CONFIG_NUMA=y +# CONFIG_NUMA_EMU is not set +CONFIG_NUMA_IRQ_DESC=y +CONFIG_NVRAM=m +CONFIG_N_HDLC=m +# CONFIG_OCFS2_DEBUG_FS is not set +CONFIG_OCFS2_DEBUG_MASKLOG=y +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_POSIX_ACL=y +CONFIG_OCFS2_FS_STATS=y +CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m +CONFIG_OLD_BELKIN_DONGLE=m +CONFIG_OLPC=y +CONFIG_OMFS_FS=m +CONFIG_OPROFILE=m +CONFIG_OPROFILE_IBS=y +CONFIG_OPTIMIZE_INLINING=y +CONFIG_OSF_PARTITION=y +# CONFIG_OTUS is not set +CONFIG_P54_COMMON=m +CONFIG_P54_LEDS=y +CONFIG_P54_PCI=m +CONFIG_P54_SPI=m +CONFIG_P54_USB=m +CONFIG_PACKARDBELL_E5=m +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PANASONIC_LAPTOP=m +CONFIG_PANEL=m +# CONFIG_PANEL_CHANGE_MESSAGE is not set +CONFIG_PANEL_PARPORT=0 +CONFIG_PANEL_PROFILE=5 +CONFIG_PANTHERLORD_FF=y +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_CLOCK=y +# CONFIG_PARAVIRT_DEBUG is not set +CONFIG_PARAVIRT_GUEST=y +CONFIG_PARAVIRT_SPINLOCKS=y +CONFIG_PARIDE=m +CONFIG_PARIDE_ATEN=m +CONFIG_PARIDE_BPCK=m +CONFIG_PARIDE_BPCK6=m +CONFIG_PARIDE_COMM=m +CONFIG_PARIDE_DSTR=m +CONFIG_PARIDE_EPAT=m +# CONFIG_PARIDE_EPATC8 is not set +CONFIG_PARIDE_EPIA=m +CONFIG_PARIDE_FIT2=m +CONFIG_PARIDE_FIT3=m +CONFIG_PARIDE_FRIQ=m +CONFIG_PARIDE_FRPW=m +CONFIG_PARIDE_KBIC=m +CONFIG_PARIDE_KTTI=m +CONFIG_PARIDE_ON20=m +CONFIG_PARIDE_ON26=m +CONFIG_PARIDE_PCD=m +CONFIG_PARIDE_PD=m +CONFIG_PARIDE_PF=m +CONFIG_PARIDE_PG=m +CONFIG_PARIDE_PT=m +CONFIG_PARPORT=m +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_AX88796=m +# CONFIG_PARPORT_GSC is not set +CONFIG_PARPORT_NOT_PC=y +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_PC_FIFO=y +CONFIG_PARPORT_PC_PCMCIA=m +# CONFIG_PARPORT_PC_SUPERIO is not set +CONFIG_PARPORT_SERIAL=m +CONFIG_PARTITION_ADVANCED=y +CONFIG_PATA_ACPI=y +CONFIG_PATA_ALI=y +CONFIG_PATA_AMD=y +CONFIG_PATA_ARTOP=y +CONFIG_PATA_ATIIXP=y +CONFIG_PATA_CMD64X=y +CONFIG_PATA_CS5520=y +CONFIG_PATA_CS5530=y +CONFIG_PATA_CS5535=m +CONFIG_PATA_CS5536=y +CONFIG_PATA_CYPRESS=m +CONFIG_PATA_EFAR=y +CONFIG_PATA_HPT366=y +CONFIG_PATA_HPT3X3=y +# CONFIG_PATA_HPT3X3_DMA is not set +CONFIG_PATA_ISAPNP=m +CONFIG_PATA_IT8213=m +CONFIG_PATA_IT821X=y +CONFIG_PATA_JMICRON=y +CONFIG_PATA_LEGACY=m +CONFIG_PATA_MARVELL=y +CONFIG_PATA_MPIIX=y +CONFIG_PATA_NETCELL=y +CONFIG_PATA_NINJA32=m +CONFIG_PATA_NS87410=y +CONFIG_PATA_NS87415=y +CONFIG_PATA_OPTI=m +CONFIG_PATA_OPTIDMA=m +CONFIG_PATA_PCMCIA=m +CONFIG_PATA_PDC2027X=y +CONFIG_PATA_PDC_OLD=y +CONFIG_PATA_QDI=y +CONFIG_PATA_RADISYS=m +CONFIG_PATA_RZ1000=y +CONFIG_PATA_SC1200=y +CONFIG_PATA_SCH=y +CONFIG_PATA_SERVERWORKS=y +CONFIG_PATA_SIL680=y +CONFIG_PATA_SIS=y +CONFIG_PATA_TRIFLEX=y +CONFIG_PATA_VIA=y +CONFIG_PATA_WINBOND=y +CONFIG_PATA_WINBOND_VLB=m +# CONFIG_PC300TOO is not set +CONFIG_PC8736x_GPIO=m +CONFIG_PC87413_WDT=m +CONFIG_PCCARD=m +CONFIG_PCCARD_NONSTATIC=m +CONFIG_PCF50633_ADC=m +CONFIG_PCF50633_GPIO=m +CONFIG_PCI=y +CONFIG_PCI200SYN=m +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIEASPM is not set +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIPCWATCHDOG=m +CONFIG_PCI_ATMEL=m +CONFIG_PCI_BIOS=y +# CONFIG_PCI_DEBUG is not set +CONFIG_PCI_DIRECT=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_GOANY=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GODIRECT is not set +# CONFIG_PCI_GOMMCONFIG is not set +# CONFIG_PCI_GOOLPC is not set +CONFIG_PCI_HERMES=m +CONFIG_PCI_IOV=y +CONFIG_PCI_LEGACY=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_MSI=y +CONFIG_PCI_OLPC=y +CONFIG_PCI_QUIRKS=y +CONFIG_PCI_STUB=m +CONFIG_PCMCIA=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_AHA152X=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA_FDOMAIN=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_IBMTR=m +CONFIG_PCMCIA_IOCTL=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_NETWAVE=m +CONFIG_PCMCIA_NINJA_SCSI=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_PROBE=y +CONFIG_PCMCIA_QLOGIC=m +CONFIG_PCMCIA_RAYCS=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_PCMCIA_SYM53C500=m +CONFIG_PCMCIA_WAVELAN=m +CONFIG_PCMCIA_WL3501=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_XIRCOM=m +CONFIG_PCNET32=m +CONFIG_PCSPKR_PLATFORM=y +CONFIG_PCWATCHDOG=m +CONFIG_PD6729=m +CONFIG_PDA_POWER=m +CONFIG_PDC_ADMA=y +CONFIG_PERF_COUNTERS=y +CONFIG_PHANTOM=m +CONFIG_PHONE=m +CONFIG_PHONET=m +CONFIG_PHONE_IXJ=m +CONFIG_PHONE_IXJ_PCMCIA=m +CONFIG_PHYLIB=y +CONFIG_PID_NS=y +CONFIG_PLAN9AUTH=m +CONFIG_PLIP=m +CONFIG_PLX_HERMES=m +CONFIG_PM=y +CONFIG_PMIC_DA903X=y +CONFIG_PM_DEBUG=y +CONFIG_PM_DISABLE_CONSOLE=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_TEST_SUSPEND=y +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +# CONFIG_PM_VERBOSE is not set +CONFIG_PNP=y +CONFIG_PNPACPI=y +CONFIG_PNPBIOS=y +CONFIG_PNPBIOS_PROC_FS=y +CONFIG_PNP_DEBUG_MESSAGES=y +CONFIG_POCH=m +CONFIG_POHMELFS=m +CONFIG_POHMELFS_CRYPTO=y +# CONFIG_POHMELFS_DEBUG is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_POWER_TRACER is not set +CONFIG_PPDEV=m +CONFIG_PPP=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPS=m +# CONFIG_PPS_DEBUG is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_NOTIFIERS=y +# CONFIG_PREEMPT_RCU is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_PRINTER=m +CONFIG_PRINTK=y +CONFIG_PRINTK_TIME=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_PRISM2_USB=m +CONFIG_PRISM54=m +CONFIG_PROC_EVENTS=y +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_VMCORE=y +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +CONFIG_PROFILING=y +CONFIG_PROTEON=m +# CONFIG_PROVE_LOCKING is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_PSS_HAVE_BOOT is not set +CONFIG_PSS_MIXER=y +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QLA3XXX=m +CONFIG_QLGE=m +CONFIG_QNX4FS_FS=m +CONFIG_QSEMI_PHY=y +CONFIG_QUOTA=y +CONFIG_QUOTACTL=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_QUOTA_TREE=m +CONFIG_R3964=m +# CONFIG_R6040 is not set +CONFIG_R8169=m +CONFIG_R8169_VLAN=y +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_AZTECH=m +CONFIG_RADIO_CADET=m +CONFIG_RADIO_GEMTEK=m +CONFIG_RADIO_GEMTEK_PCI=m +CONFIG_RADIO_MAESTRO=m +CONFIG_RADIO_MAXIRADIO=m +CONFIG_RADIO_RTRACK=m +CONFIG_RADIO_RTRACK2=m +CONFIG_RADIO_SF16FMI=m +CONFIG_RADIO_SF16FMR2=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_TERRATEC=m +CONFIG_RADIO_TRUST=m +CONFIG_RADIO_TYPHOON=m +CONFIG_RADIO_TYPHOON_PROC_FS=y +CONFIG_RADIO_ZOLTRIX=m +CONFIG_RAID_ATTRS=m +CONFIG_RAW_DRIVER=m +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RDC_17F3101X=m +CONFIG_RDS=m +# CONFIG_RDS_DEBUG is not set +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RD_LZMA=y +CONFIG_REALTEK_PHY=y +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_BQ24022=m +CONFIG_REGULATOR_DA903X=m +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +CONFIG_REGULATOR_LP3971=m +CONFIG_REGULATOR_MAX1586=m +CONFIG_REGULATOR_PCF50633=m +CONFIG_REGULATOR_TWL4030=y +CONFIG_REGULATOR_USERSPACE_CONSUMER=m +CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +CONFIG_REGULATOR_WM8350=m +CONFIG_REGULATOR_WM8400=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_FS=m +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_REISERFS_FS_XATTR=y +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_RELAY=y +CONFIG_RELOCATABLE=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_RFD_FTL=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_LEDS=y +CONFIG_RING_BUFFER=y +# CONFIG_RING_BUFFER_BENCHMARK is not set +CONFIG_RIO=m +# CONFIG_RIO_OLDPCI is not set +CONFIG_RISCOM8=m +CONFIG_ROADRUNNER=m +# CONFIG_ROADRUNNER_LARGE_RINGS is not set +CONFIG_ROCKETPORT=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +# CONFIG_ROMFS_BACKED_BY_MTD is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_ON_BLOCK=y +CONFIG_ROSE=m +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_SPKM3=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT2500USB=m +CONFIG_RT2800USB=m +CONFIG_RT2860=m +CONFIG_RT2870=m +CONFIG_RT2X00=m +# CONFIG_RT2X00_DEBUG is not set +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_CRYPTO=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_HT=y +CONFIG_RT2X00_LIB_LEDS=y +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_RFKILL=y +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT3070=m +CONFIG_RT61PCI=m +CONFIG_RT73USB=m +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_CMOS=y +CONFIG_RTC_DRV_DS1286=m +CONFIG_RTC_DRV_DS1305=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1390=m +CONFIG_RTC_DRV_DS1511=m +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_DS3234=m +CONFIG_RTC_DRV_FM3130=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_M41T94=m +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_M48T86=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_MAX6902=m +CONFIG_RTC_DRV_PCF50633=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_R9701=m +CONFIG_RTC_DRV_RS5C348=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_RX8581=m +CONFIG_RTC_DRV_S35390A=m +CONFIG_RTC_DRV_STK17TA8=m +CONFIG_RTC_DRV_TEST=m +CONFIG_RTC_DRV_TWL4030=m +CONFIG_RTC_DRV_V3020=m +CONFIG_RTC_DRV_WM8350=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_LIB=y +CONFIG_RTL8180=m +CONFIG_RTL8187=m +CONFIG_RTL8187SE=m +CONFIG_RTL8187_LEDS=y +CONFIG_RTL8192SU=m +CONFIG_RT_GROUP_SCHED=y +CONFIG_RT_MUTEXES=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_RXKAD=m +CONFIG_S2IO=m +# CONFIG_SAMPLES is not set +CONFIG_SATA_AHCI=y +CONFIG_SATA_INIC162X=y +CONFIG_SATA_MV=m +CONFIG_SATA_NV=y +CONFIG_SATA_PMP=y +CONFIG_SATA_PROMISE=y +CONFIG_SATA_QSTOR=y +CONFIG_SATA_SIL=y +CONFIG_SATA_SIL24=y +CONFIG_SATA_SIS=y +CONFIG_SATA_SVW=y +CONFIG_SATA_ULI=y +CONFIG_SATA_VIA=m +CONFIG_SATA_VITESSE=y +CONFIG_SBC7240_WDT=m +CONFIG_SBC8360_WDT=m +CONFIG_SBC_EPX_C3_WATCHDOG=m +CONFIG_SBNI=m +# CONFIG_SBNI_MULTILINE is not set +CONFIG_SC1200_WDT=m +CONFIG_SC520_WDT=m +CONFIG_SC6600=y +CONFIG_SC6600_CDROM=4 +CONFIG_SC6600_CDROMBASE=0 +CONFIG_SC6600_JOY=y +CONFIG_SC92031=m +CONFIG_SCC=m +# CONFIG_SCC_DELAY is not set +# CONFIG_SCC_TRXECHO is not set +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_HRTICK=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_SCHED_SMT=y +# CONFIG_SCHED_TRACER is not set +CONFIG_SCSI=y +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_7000FASST=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_ADVANSYS=m +CONFIG_SCSI_AHA152X=m +CONFIG_SCSI_AHA1542=m +CONFIG_SCSI_AHA1740=m +CONFIG_SCSI_AIC79XX=m +CONFIG_SCSI_AIC7XXX=m +# CONFIG_SCSI_AIC7XXX_OLD is not set +CONFIG_SCSI_AIC94XX=m +CONFIG_SCSI_ARCMSR=m +CONFIG_SCSI_ARCMSR_AER=y +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_SCSI_BUSLOGIC=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_CXGB3_ISCSI=m +CONFIG_SCSI_DC390T=m +CONFIG_SCSI_DC395x=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_ALUA=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DMA=y +CONFIG_SCSI_DMX3191D=m +CONFIG_SCSI_DPT_I2O=m +CONFIG_SCSI_DTC3280=m +CONFIG_SCSI_EATA=m +CONFIG_SCSI_EATA_LINKED_COMMANDS=y +CONFIG_SCSI_EATA_MAX_TAGS=16 +CONFIG_SCSI_EATA_TAGGED_QUEUE=y +CONFIG_SCSI_ENCLOSURE=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_FC_TGT_ATTRS=y +CONFIG_SCSI_FD_MCS=m +# CONFIG_SCSI_FLASHPOINT is not set +CONFIG_SCSI_FUTURE_DOMAIN=m +CONFIG_SCSI_GDTH=m +CONFIG_SCSI_GENERIC_NCR5380=m +CONFIG_SCSI_GENERIC_NCR5380_MMIO=m +CONFIG_SCSI_GENERIC_NCR53C400=y +CONFIG_SCSI_HPTIOP=m +CONFIG_SCSI_IBMMCA=m +CONFIG_SCSI_IMM=m +CONFIG_SCSI_IN2000=m +CONFIG_SCSI_INIA100=m +CONFIG_SCSI_INITIO=m +CONFIG_SCSI_IPR=m +# CONFIG_SCSI_IPR_DUMP is not set +# CONFIG_SCSI_IPR_TRACE is not set +CONFIG_SCSI_IPS=m +CONFIG_SCSI_ISCSITARGET=m +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_IZIP_EPP16 is not set +# CONFIG_SCSI_IZIP_SLOW_CTR is not set +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_LOWLEVEL=y +CONFIG_SCSI_LOWLEVEL_PCMCIA=y +CONFIG_SCSI_LPFC=m +CONFIG_SCSI_LPFC_DEBUG_FS=y +CONFIG_SCSI_MPT2SAS=m +# CONFIG_SCSI_MPT2SAS_LOGGING is not set +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_MVSAS=m +CONFIG_SCSI_MVSAS_DEBUG=y +CONFIG_SCSI_NCR53C406A=m +CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=8 +CONFIG_SCSI_NCR53C8XX_MAX_TAGS=4 +CONFIG_SCSI_NCR53C8XX_SYNC=5 +CONFIG_SCSI_NCR_D700=m +CONFIG_SCSI_NCR_Q720=m +CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_NSP32=m +# CONFIG_SCSI_OSD_DEBUG is not set +CONFIG_SCSI_OSD_DPRINT_SENSE=1 +CONFIG_SCSI_OSD_INITIATOR=m +CONFIG_SCSI_OSD_ULD=m +CONFIG_SCSI_PAS16=m +CONFIG_SCSI_PPA=m +CONFIG_SCSI_PROC_FS=y +CONFIG_SCSI_QLA_FC=m +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_QLOGIC_FAS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=m +# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_SIM710=m +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_SRP=m +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_SRP_TGT_ATTRS=y +CONFIG_SCSI_STEX=m +CONFIG_SCSI_SYM53C416=m +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 +CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 +CONFIG_SCSI_SYM53C8XX_MMIO=y +CONFIG_SCSI_T128=m +CONFIG_SCSI_TGT=m +CONFIG_SCSI_U14_34F=m +CONFIG_SCSI_U14_34F_LINKED_COMMANDS=y +CONFIG_SCSI_U14_34F_MAX_TAGS=8 +CONFIG_SCSI_U14_34F_TAGGED_QUEUE=y +CONFIG_SCSI_ULTRASTOR=m +CONFIG_SCSI_WAIT_SCAN=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCx200=m +CONFIG_SCx200HR_TIMER=m +CONFIG_SCx200_ACB=m +CONFIG_SCx200_GPIO=m +CONFIG_SCx200_I2C=m +CONFIG_SCx200_I2C_SCL=12 +CONFIG_SCx200_I2C_SDA=13 +CONFIG_SCx200_WDT=m +CONFIG_SDIO_UART=m +CONFIG_SDLA=m +CONFIG_SEALEVEL_4021=m +CONFIG_SECCOMP=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 +# CONFIG_SECURITY_APPARMOR_DISABLE is not set +CONFIG_SECURITY_APPARMOR_NETWORK=y +CONFIG_SECURITY_DEFAULT="apparmor" +CONFIG_SECURITY_FILE_CAPABILITIES=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_PATH=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_DISABLE=y +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_TOMOYO=y +CONFIG_SEEQ8005=m +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SENSORS_ABITUGURU=m +CONFIG_SENSORS_ABITUGURU3=m +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7473=m +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_APPLESMC=m +CONFIG_SENSORS_ASB100=m +CONFIG_SENSORS_ATK0110=m +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_CORETEMP=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_FSCHER=m +CONFIG_SENSORS_FSCHMD=m +CONFIG_SENSORS_FSCPOS=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_HDAPS=m +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_K8TEMP=m +CONFIG_SENSORS_LIS3LV02D=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_MAX1111=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_ACCENT=m +CONFIG_SERIAL_8250_BOCA=m +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_CS=m +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_EXAR_ST16C554=m +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FOURPORT=m +CONFIG_SERIAL_8250_HUB6=m +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_MCA=m +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_JSM=m +CONFIG_SERIAL_MAX3100=m +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_SERIO=y +CONFIG_SERIO_CT82C710=m +CONFIG_SERIO_I8042=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SERIO_RAW=m +CONFIG_SERIO_SERPORT=m +CONFIG_SFC=m +CONFIG_SFC_MTD=y +CONFIG_SGI_IOC4=m +CONFIG_SGI_PARTITION=y +CONFIG_SHMEM=y +CONFIG_SIGMATEL_FIR=m +CONFIG_SIGNALFD=y +CONFIG_SIS190=m +CONFIG_SIS900=m +CONFIG_SKFP=m +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +CONFIG_SKISA=m +CONFIG_SKY2=m +# CONFIG_SKY2_DEBUG is not set +# CONFIG_SLAB is not set +CONFIG_SLABINFO=y +CONFIG_SLHC=y +CONFIG_SLICOSS=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_SLIP_SMART=y +# CONFIG_SLOB is not set +CONFIG_SLOW_WORK=y +CONFIG_SLUB=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_SMC9194=m +CONFIG_SMCTR=m +CONFIG_SMC_IRCC_FIR=m +CONFIG_SMP=y +CONFIG_SMSC37B787_WDT=m +CONFIG_SMSC9420=m +CONFIG_SMSC_PHY=y +CONFIG_SMSC_SCH311X_WDT=m +CONFIG_SMS_SDIO_DRV=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_USB_DRV=m +CONFIG_SND=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 +CONFIG_SND_AD1816A=m +CONFIG_SND_AD1848=m +CONFIG_SND_AD1889=m +CONFIG_SND_ADLIB=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ALS100=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_AZT2320=m +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +# CONFIG_SND_BT87X_OVERCLOCK is not set +CONFIG_SND_CA0106=m +CONFIG_SND_CMI8330=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_CS4231=m +CONFIG_SND_CS4236=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CS5530=m +CONFIG_SND_CS5535AUDIO=m +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_DARLA24=m +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +CONFIG_SND_DT019X=m +CONFIG_SND_DUMMY=m +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_ECHO3G=m +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_EMU10K1_SEQ=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1688=m +CONFIG_SND_ES18XX=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +CONFIG_SND_ES968=m +CONFIG_SND_FM801=m +CONFIG_SND_FM801_TEA575X=m +CONFIG_SND_FM801_TEA575X_BOOL=y +CONFIG_SND_GINA20=m +CONFIG_SND_GINA24=m +CONFIG_SND_GUSCLASSIC=m +CONFIG_SND_GUSEXTREME=m +CONFIG_SND_GUSMAX=m +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_INTELHDMI=y +CONFIG_SND_HDA_CODEC_NVHDMI=y +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_ELD=y +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_JACK=y +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_POWER_SAVE=y +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +CONFIG_SND_HDA_RECONFIG=y +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_HIFIER=m +CONFIG_SND_HRTIMER=m +CONFIG_SND_HWDEP=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGODJX=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_INTERWAVE=m +CONFIG_SND_INTERWAVE_STB=m +CONFIG_SND_ISA=y +CONFIG_SND_JACK=y +CONFIG_SND_KORG1212=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_LX6464ES=m +CONFIG_SND_MAESTRO3=m +CONFIG_SND_MIA=m +CONFIG_SND_MIRO=m +CONFIG_SND_MIXART=m +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_MONA=m +CONFIG_SND_MPU401=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_MSND_CLASSIC=m +CONFIG_SND_MSND_PINNACLE=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_NM256=m +CONFIG_SND_OPL3SA2=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL3_LIB_SEQ=m +CONFIG_SND_OPL4_LIB=m +CONFIG_SND_OPTI92X_AD1848=m +CONFIG_SND_OPTI92X_CS4231=m +CONFIG_SND_OPTI93X=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_OXYGEN=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_PCI=y +CONFIG_SND_PCM=m +CONFIG_SND_PCMCIA=y +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_PCSP=m +CONFIG_SND_PCXHR=m +CONFIG_SND_PDAUDIOCF=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_RAWMIDI_SEQ=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SB16=m +CONFIG_SND_SB16_CSP=y +CONFIG_SND_SB16_DSP=m +CONFIG_SND_SB8=m +CONFIG_SND_SB8_DSP=m +CONFIG_SND_SBAWE=m +CONFIG_SND_SB_COMMON=m +CONFIG_SND_SC6000=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_SGALAXY=m +CONFIG_SND_SIS7019=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_AD73311=m +CONFIG_SND_SOC_AK4104=m +CONFIG_SND_SOC_AK4535=m +CONFIG_SND_SOC_ALL_CODECS=m +CONFIG_SND_SOC_CS4270=m +CONFIG_SND_SOC_I2C_AND_SPI=m +CONFIG_SND_SOC_L3=m +CONFIG_SND_SOC_PCM3008=m +CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_SSM2602=m +CONFIG_SND_SOC_TLV320AIC23=m +CONFIG_SND_SOC_TLV320AIC26=m +CONFIG_SND_SOC_TLV320AIC3X=m +CONFIG_SND_SOC_TWL4030=m +CONFIG_SND_SOC_UDA134X=m +CONFIG_SND_SOC_UDA1380=m +CONFIG_SND_SOC_WM8350=m +CONFIG_SND_SOC_WM8400=m +CONFIG_SND_SOC_WM8510=m +CONFIG_SND_SOC_WM8580=m +CONFIG_SND_SOC_WM8728=m +CONFIG_SND_SOC_WM8731=m +CONFIG_SND_SOC_WM8750=m +CONFIG_SND_SOC_WM8753=m +CONFIG_SND_SOC_WM8900=m +CONFIG_SND_SOC_WM8903=m +CONFIG_SND_SOC_WM8940=m +CONFIG_SND_SOC_WM8960=m +CONFIG_SND_SOC_WM8971=m +CONFIG_SND_SOC_WM8988=m +CONFIG_SND_SOC_WM8990=m +CONFIG_SND_SOC_WM9081=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_SPI=y +CONFIG_SND_SSCAPE=m +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_TIMER=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_US122L=m +CONFIG_SND_USB_USX2Y=m +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VMASTER=y +CONFIG_SND_VX222=m +CONFIG_SND_VXPOCKET=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_WAVEFRONT=m +CONFIG_SND_WSS_LIB=m +CONFIG_SND_YMFPCI=m +CONFIG_SOC_CAMERA=m +CONFIG_SOC_CAMERA_MT9M001=m +CONFIG_SOC_CAMERA_MT9M111=m +CONFIG_SOC_CAMERA_MT9T031=m +CONFIG_SOC_CAMERA_MT9V022=m +CONFIG_SOC_CAMERA_OV772X=m +CONFIG_SOC_CAMERA_PLATFORM=m +CONFIG_SOC_CAMERA_TW9910=m +CONFIG_SOFT_WATCHDOG=m +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_SONYPI=m +CONFIG_SONYPI_COMPAT=y +CONFIG_SONY_LAPTOP=m +CONFIG_SOUND=m +CONFIG_SOUND_AEDSP16=m +CONFIG_SOUND_DMAP=y +CONFIG_SOUND_KAHLUA=m +CONFIG_SOUND_MPU401=m +CONFIG_SOUND_MSNDCLAS=m +CONFIG_SOUND_MSNDPIN=m +CONFIG_SOUND_MSS=m +CONFIG_SOUND_OSS=m +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_PAS=m +CONFIG_SOUND_PRIME=m +CONFIG_SOUND_PSS=m +CONFIG_SOUND_SB=m +CONFIG_SOUND_SSCAPE=m +# CONFIG_SOUND_TRACEINIT is not set +CONFIG_SOUND_TRIX=m +CONFIG_SOUND_UART6850=m +CONFIG_SOUND_VMIDI=m +CONFIG_SOUND_YM3812=m +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPECIALIX=m +CONFIG_SPI=y +CONFIG_SPI_BITBANG=m +CONFIG_SPI_BUTTERFLY=m +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_GPIO=m +CONFIG_SPI_LM70_LLP=m +CONFIG_SPI_MASTER=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPI_TLE62X0=m +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_SSB=m +CONFIG_SSB_B43_PCI_BRIDGE=y +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB_SPROM=y +CONFIG_SSFDC=m +CONFIG_STACKTRACE=y +CONFIG_STACKTRACE_SUPPORT=y +# CONFIG_STACK_TRACER is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +CONFIG_STALDRV=y +CONFIG_STALLION=m +# CONFIG_STANDALONE is not set +CONFIG_STE10XP=y +# CONFIG_STLC45XX is not set +CONFIG_STOP_MACHINE=y +CONFIG_STP=m +CONFIG_STRICT_DEVMEM=y +CONFIG_STRIP=m +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_SUNDANCE=m +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_SUNGEM=m +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_XPRT_RDMA=m +CONFIG_SUN_PARTITION=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWAP=y +CONFIG_SWIOTLB=y +CONFIG_SX=m +CONFIG_SXG=m +CONFIG_SYNCLINK=m +CONFIG_SYNCLINKMP=m +CONFIG_SYNCLINK_CS=m +CONFIG_SYNCLINK_GT=m +CONFIG_SYN_COOKIES=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_SYSFS=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_SYSPROF_TRACER is not set +CONFIG_SYSV68_PARTITION=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSV_FS=m +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_WACOM=m +CONFIG_TASKSTATS=y +# CONFIG_TASK_DELAY_ACCT is not set +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_XACCT=y +CONFIG_TC1100_WMI=m +CONFIG_TCG_ATMEL=m +CONFIG_TCG_INFINEON=m +CONFIG_TCG_NSC=m +CONFIG_TCG_TIS=m +CONFIG_TCG_TPM=m +CONFIG_TCIC=m +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_MD5SIG=y +CONFIG_TEHUTI=m +CONFIG_TEKRAM_DONGLE=m +CONFIG_TELCLOCK=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_TEXTSEARCH_KMP=m +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_THINKPAD_ACPI=m +# CONFIG_THINKPAD_ACPI_DEBUG is not set +CONFIG_THINKPAD_ACPI_DEBUGFACILITIES=y +CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y +# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set +CONFIG_THINKPAD_ACPI_VIDEO=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_TICK_ONESHOT=y +CONFIG_TIFM_7XX1=m +CONFIG_TIFM_CORE=m +CONFIG_TIGON3=m +CONFIG_TIMERFD=y +CONFIG_TIMER_STATS=y +CONFIG_TIPC=m +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +CONFIG_TLAN=m +CONFIG_TMD_HERMES=m +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMS380TR=m +CONFIG_TMSPCI=m +CONFIG_TOIM3232_DONGLE=m +# CONFIG_TOSHIBA is not set +CONFIG_TOSHIBA_FIR=m +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_DA9034=m +CONFIG_TOUCHSCREEN_EETI=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_HTCPEN=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_UCB1400=m +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_W90X900=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TPS65010=m +CONFIG_TR=y +CONFIG_TRACEPOINTS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +CONFIG_TRANZPORT=m +# CONFIG_TREE_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_TTPCI_EEPROM=m +CONFIG_TULIP=m +# CONFIG_TULIP_MMIO is not set +# CONFIG_TULIP_MWI is not set +# CONFIG_TULIP_NAPI is not set +CONFIG_TUN=m +CONFIG_TWL4030_CORE=y +CONFIG_TWL4030_USB=m +CONFIG_TWL4030_WATCHDOG=m +CONFIG_TYPHOON=m +CONFIG_UBIFS_FS=m +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +# CONFIG_UBIFS_FS_DEBUG is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UCB1400_CORE=m +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_UFS_DEBUG is not set +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +CONFIG_UID16=y +CONFIG_UIO=m +CONFIG_UIO_AEC=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_SMX=m +CONFIG_ULI526X=m +CONFIG_ULTRA=m +CONFIG_ULTRA32=m +CONFIG_ULTRAMCA=m +CONFIG_ULTRIX_PARTITION=y +CONFIG_UNIX=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_UNUSED_SYMBOLS=y +CONFIG_USB=y +CONFIG_USBPCWATCHDOG=m +CONFIG_USB_ACM=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_ATM=m +CONFIG_USB_ATMEL=m +CONFIG_USB_AUDIO=m +CONFIG_USB_BELKIN=y +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_C67X00_HCD=m +CONFIG_USB_CATC=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_CDC_PHONET=m +CONFIG_USB_CPC=m +CONFIG_USB_CXACRU=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_DABUSB=m +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_DSBR=m +CONFIG_USB_DUMMY_HCD=m +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EMI26=m +CONFIG_USB_EMI62=m +CONFIG_USB_EPSON2888=y +CONFIG_USB_ET61X251=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_EZUSB=y +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_GADGET=m +CONFIG_USB_GADGETFS=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_DUMMY_HCD=y +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GPIO_VBUS=m +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SN9C20X=m +# CONFIG_USB_GSPCA_SN9C20X_EVDEV is not set +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_HID=m +CONFIG_USB_HIDDEV=y +CONFIG_USB_HSO=m +CONFIG_USB_HWA_HCD=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_IP_COMMON=m +CONFIG_USB_IP_HOST=m +CONFIG_USB_IP_VHCI_HCD=m +CONFIG_USB_IRDA=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_ISP116X_HCD=m +CONFIG_USB_ISP1760_HCD=m +CONFIG_USB_KAWETH=m +CONFIG_USB_KC2190=y +CONFIG_USB_KONICAWC=m +CONFIG_USB_LCD=m +CONFIG_USB_LD=m +CONFIG_USB_LED=m +CONFIG_USB_LEGOTOWER=m +# CONFIG_USB_LIBUSUAL is not set +CONFIG_USB_M5602=m +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_MON=y +CONFIG_USB_MR800=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_OTG is not set +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_OV511 is not set +CONFIG_USB_OXU210HP_HCD=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_PRINTER=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_RIO500=m +CONFIG_USB_RTL8150=m +CONFIG_USB_S2255=m +CONFIG_USB_SE401=m +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_DEBUG=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MOTOROLA=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_QUATECH2=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIEMENS_MPI=m +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_SI470X=m +CONFIG_USB_SISUSBVGA=m +# CONFIG_USB_SISUSBVGA_CON is not set +CONFIG_USB_SL811_CS=m +CONFIG_USB_SL811_HCD=m +CONFIG_USB_SN9C102=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_STORAGE=m +CONFIG_USB_STORAGE_ALAUDA=m +CONFIG_USB_STORAGE_CYPRESS_ATACB=m +CONFIG_USB_STORAGE_DATAFAB=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_KARMA=m +CONFIG_USB_STORAGE_ONETOUCH=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STV06XX=m +CONFIG_USB_STV680=m +CONFIG_USB_SUPPORT=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_TEST=m +CONFIG_USB_TMC=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_U132_HCD=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_USBNET=m +CONFIG_USB_USS720=m +CONFIG_USB_VICAM=m +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_VST=m +CONFIG_USB_W9968CF=m +CONFIG_USB_WDM=m +CONFIG_USB_WHCI_HCD=m +CONFIG_USB_WUSB=m +CONFIG_USB_WUSB_CBAF=m +# CONFIG_USB_WUSB_CBAF_DEBUG is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_HCD_DEBUGGING is not set +CONFIG_USB_XUSBATM=m +CONFIG_USB_ZC0301=m +CONFIG_USB_ZD1201=m +CONFIG_USB_ZERO=m +CONFIG_USB_ZR364XX=m +# CONFIG_USER_NS is not set +# CONFIG_USER_SCHED is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_UTS_NS=y +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_I1480U=m +CONFIG_UWB_I1480U_WLP=m +CONFIG_UWB_WHCI=m +CONFIG_UWB_WLP=m +CONFIG_V4L_USB_DRIVERS=y +CONFIG_VERSION_SIGNATURE="" +CONFIG_VETH=m +CONFIG_VFAT_FS=m +# CONFIG_VGACON_SOFT_SCROLLBACK is not set +CONFIG_VGASTATE=m +CONFIG_VGA_CONSOLE=y +CONFIG_VIA_FIR=m +CONFIG_VIA_RHINE=m +CONFIG_VIA_RHINE_MMIO=y +CONFIG_VIA_VELOCITY=m +CONFIG_VIDEOBUF_DMA_SG=m +CONFIG_VIDEOBUF_DVB=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT848=m +CONFIG_VIDEO_BT848_DVB=y +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_BT866=m +CONFIG_VIDEO_BTCX=m +CONFIG_VIDEO_BWQCAM=m +CONFIG_VIDEO_CAFE_CCIC=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +CONFIG_VIDEO_CPIA=m +CONFIG_VIDEO_CPIA2=m +CONFIG_VIDEO_CPIA_PP=m +CONFIG_VIDEO_CPIA_USB=m +CONFIG_VIDEO_CQCAM=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_CX18=m +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_CX23885=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +CONFIG_VIDEO_CX88_MPEG=m +CONFIG_VIDEO_CX88_VP3054=m +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_FB_IVTV=m +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_GO7007=m +CONFIG_VIDEO_GO7007_USB=m +CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_HEXIUM_GEMINI=m +CONFIG_VIDEO_HEXIUM_ORION=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_KS0127=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_MEDIA=m +CONFIG_VIDEO_MEYE=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_MT9V011=m +CONFIG_VIDEO_MXB=m +CONFIG_VIDEO_OUTPUT_CONTROL=m +CONFIG_VIDEO_OV7670=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_VIDEO_PMS=m +CONFIG_VIDEO_PVRUSB2=m +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_PVRUSB2_DVB=y +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_SAA5246A=m +CONFIG_VIDEO_SAA5249=m +CONFIG_VIDEO_SAA6588=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_SAA7127=m +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_VIDEO_SAA717X=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_STRADIS=m +CONFIG_VIDEO_TDA7432=m +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_TVAUDIO=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_VIVI=m +CONFIG_VIDEO_VP27SMPX=m +CONFIG_VIDEO_VPX3220=m +CONFIG_VIDEO_W9966=m +CONFIG_VIDEO_WM8739=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_ZORAN=m +CONFIG_VIDEO_ZORAN_AVS6EYES=m +CONFIG_VIDEO_ZORAN_BUZ=m +CONFIG_VIDEO_ZORAN_DC10=m +CONFIG_VIDEO_ZORAN_DC30=m +CONFIG_VIDEO_ZORAN_LML33=m +CONFIG_VIDEO_ZORAN_LML33R10=m +CONFIG_VIDEO_ZORAN_ZR36060=m +CONFIG_VIRTIO=m +CONFIG_VIRTIO_BALLOON=m +CONFIG_VIRTIO_BLK=m +CONFIG_VIRTIO_CONSOLE=m +CONFIG_VIRTIO_NET=m +CONFIG_VIRTIO_PCI=m +CONFIG_VIRTIO_RING=m +CONFIG_VIRTUALIZATION=y +CONFIG_VIRT_TO_BUS=y +CONFIG_VITESSE_PHY=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLSI_FIR=m +CONFIG_VM86=y +CONFIG_VMI=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VORTEX=m +CONFIG_VT=y +# CONFIG_VT6655 is not set +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_VXFS_FS=m +CONFIG_VXGE=m +# CONFIG_VXGE_DEBUG_TRACE_ALL is not set +CONFIG_W1=m +CONFIG_W1_CON=y +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_MASTER_MATROX=m +CONFIG_W1_SLAVE_BQ27000=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +CONFIG_W1_SLAVE_DS2760=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_W35UND=m +CONFIG_W83627HF_WDT=m +CONFIG_W83697HF_WDT=m +CONFIG_W83697UG_WDT=m +CONFIG_W83877F_WDT=m +CONFIG_W83977F_WDT=m +CONFIG_WAFER_WDT=m +CONFIG_WAN=y +CONFIG_WANXL=m +CONFIG_WAN_ROUTER=m +CONFIG_WAN_ROUTER_DRIVERS=m +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WAVELAN=m +CONFIG_WD80x3=m +CONFIG_WDT=m +CONFIG_WDTPCI=m +CONFIG_WIMAX=m +CONFIG_WIMAX_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M=m +CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M_SDIO=m +CONFIG_WIMAX_I2400M_USB=m +CONFIG_WINBOND_840=m +CONFIG_WINBOND_FIR=m +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_WIRELESS_OLD_REGULATORY is not set +CONFIG_WL12XX=m +CONFIG_WLAN_80211=y +CONFIG_WLAN_PRE80211=y +CONFIG_WM8350_POWER=m +CONFIG_WM8350_WATCHDOG=m +# CONFIG_WORKQUEUE_TRACER is not set +CONFIG_X25=m +CONFIG_X25_ASY=m +CONFIG_X86=y +# CONFIG_X86_32_NON_STANDARD is not set +CONFIG_X86_32_SMP=y +CONFIG_X86_64_ACPI_NUMA=y +CONFIG_X86_64_SMP=y +CONFIG_X86_ACPI_CPUFREQ=y +CONFIG_X86_ALIGNMENT_16=y +# CONFIG_X86_ANCIENT_MCE is not set +CONFIG_X86_APM_BOOT=y +# CONFIG_X86_BIGSMP is not set +CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y +CONFIG_X86_BSWAP=y +CONFIG_X86_CHECK_BIOS_CORRUPTION=y +CONFIG_X86_CMOV=y +CONFIG_X86_CMPXCHG=y +CONFIG_X86_CMPXCHG64=y +CONFIG_X86_CPU=y +CONFIG_X86_CPUFREQ_NFORCE2=y +CONFIG_X86_CPUID=m +CONFIG_X86_DEBUGCTLMSR=y +# CONFIG_X86_DS is not set +# CONFIG_X86_ELAN is not set +CONFIG_X86_EXTENDED_PLATFORM=y +CONFIG_X86_E_POWERSAVER=m +CONFIG_X86_F00F_BUG=y +CONFIG_X86_GENERIC=y +CONFIG_X86_GX_SUSPMOD=y +CONFIG_X86_HT=y +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_INVLPG=y +CONFIG_X86_IO_APIC=y +CONFIG_X86_L1_CACHE_BYTES=64 +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_LONGHAUL=y +CONFIG_X86_LONGRUN=y +CONFIG_X86_MCE=y +CONFIG_X86_MCE_AMD=y +CONFIG_X86_MCE_INJECT=m +CONFIG_X86_MCE_INTEL=y +CONFIG_X86_MCE_THRESHOLD=y +CONFIG_X86_MPPARSE=y +CONFIG_X86_MSR=m +CONFIG_X86_NEED_RELOCS=y +CONFIG_X86_NEW_MCE=y +# CONFIG_X86_OLD_MCE is not set +CONFIG_X86_P4_CLOCKMOD=m +CONFIG_X86_PAE=y +CONFIG_X86_PAT=y +CONFIG_X86_PLATFORM_DEVICES=y +CONFIG_X86_PM_TIMER=y +CONFIG_X86_POPAD_OK=y +CONFIG_X86_POWERNOW_K6=y +CONFIG_X86_POWERNOW_K7=y +CONFIG_X86_POWERNOW_K7_ACPI=y +CONFIG_X86_POWERNOW_K8=y +CONFIG_X86_PPRO_FENCE=y +# CONFIG_X86_PTDUMP is not set +# CONFIG_X86_RDC321X is not set +CONFIG_X86_REBOOTFIXUPS=y +CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y +CONFIG_X86_RESERVE_LOW_64K=y +CONFIG_X86_SPEEDSTEP_CENTRINO=y +CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE=y +CONFIG_X86_SPEEDSTEP_ICH=y +CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK=y +CONFIG_X86_SPEEDSTEP_SMI=y +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_X86_TRAMPOLINE=y +CONFIG_X86_TSC=y +# CONFIG_X86_VERBOSE_BOOTUP is not set +# CONFIG_X86_VSMP is not set +CONFIG_X86_WP_WORKS_OK=y +CONFIG_X86_XADD=y +CONFIG_XEN=y +CONFIG_XENFS=m +CONFIG_XEN_BALLOON=y +CONFIG_XEN_BLKDEV_FRONTEND=m +CONFIG_XEN_COMPAT_XENFS=y +# CONFIG_XEN_DEBUG_FS is not set +CONFIG_XEN_DEV_EVTCHN=m +CONFIG_XEN_FBDEV_FRONTEND=m +CONFIG_XEN_KBDDEV_FRONTEND=m +CONFIG_XEN_MAX_DOMAIN_MEMORY=32 +CONFIG_XEN_NETDEV_FRONTEND=m +CONFIG_XEN_SAVE_RESTORE=y +CONFIG_XEN_SCRUB_PAGES=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XFRM=y +CONFIG_XFRM_IPCOMP=m +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_USER=m +# CONFIG_XFS_DEBUG is not set +CONFIG_XFS_FS=m +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_RT=y +CONFIG_XOR_BLOCKS=m +CONFIG_YAM=m +CONFIG_YELLOWFIN=m +CONFIG_YENTA=m +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_ZEROPLUS_FF=y +CONFIG_ZISOFS=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZNET=m +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA_FLAG=1 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/config.common.ports +++ linux-fsl-imx51-2.6.31/debian.master/config/config.common.ports @@ -0,0 +1,3752 @@ +# +# Common config options automatically generated by splitconfig.pl +# +CONFIG_3C359=m +# CONFIG_40x is not set +# CONFIG_44x is not set +CONFIG_64BIT=y +CONFIG_6PACK=m +CONFIG_6xx=y +CONFIG_8139CP=m +CONFIG_8139TOO=m +CONFIG_8139TOO_8129=y +CONFIG_8139TOO_PIO=y +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_9P_FS=m +CONFIG_A11Y_BRAILLE_CONSOLE=y +CONFIG_AB3100_CORE=m +CONFIG_ABYSS=m +CONFIG_AC97_BUS=m +CONFIG_ACENIC=m +# CONFIG_ACENIC_OMIT_TIGON_I is not set +# CONFIG_ACORN_PARTITION_ADFS is not set +# CONFIG_ACORN_PARTITION_CUMANA is not set +# CONFIG_ACORN_PARTITION_EESOX is not set +CONFIG_ACORN_PARTITION_ICS=y +# CONFIG_ACORN_PARTITION_POWERTEC is not set +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_ACPI=y +CONFIG_ACPI_BLACKLIST_YEAR=0 +CONFIG_ACPI_BUTTON=m +CONFIG_ACPI_CONTAINER=m +# CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_DEBUG is not set +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_FAN=m +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_NUMA=y +CONFIG_ACPI_PCI_SLOT=m +CONFIG_ACPI_PROCESSOR=m +CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y +CONFIG_ACPI_SYSFS_POWER=y +CONFIG_ACPI_THERMAL=m +CONFIG_ACT200L_DONGLE=m +CONFIG_ACTISYS_DONGLE=m +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_ADB=y +CONFIG_ADB_CUDA=y +CONFIG_ADB_MACIO=y +CONFIG_ADB_PMU=y +CONFIG_ADB_PMU_LED=y +# CONFIG_ADB_PMU_LED_IDE is not set +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_ADM8211=m +# CONFIG_ADVANCED_OPTIONS is not set +CONFIG_AFFS_FS=m +# CONFIG_AFS_DEBUG is not set +CONFIG_AFS_FS=m +# CONFIG_AFS_FSCACHE is not set +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +CONFIG_AGP=m +# CONFIG_AGP_HP_ZX1 is not set +# CONFIG_AGP_I460 is not set +# CONFIG_AGP_SGI_TIOCA is not set +CONFIG_AGP_UNINORTH=m +CONFIG_AIC79XX_CMDS_PER_DEVICE=32 +CONFIG_AIC79XX_DEBUG_MASK=0 +CONFIG_AIC79XX_RESET_DELAY_MS=15000 +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 +CONFIG_AIC7XXX_DEBUG_ENABLE=y +CONFIG_AIC7XXX_DEBUG_MASK=0 +CONFIG_AIC7XXX_REG_PRETTY_PRINT=y +CONFIG_AIC7XXX_RESET_DELAY_MS=15000 +# CONFIG_AIC94XX_DEBUG is not set +CONFIG_AIO=y +CONFIG_AIRO=m +CONFIG_AIRO_CS=m +CONFIG_ALI_FIR=m +CONFIG_ALTIVEC=y +# CONFIG_AMIGAONE is not set +CONFIG_ANON_INODES=y +CONFIG_ANSLCD=m +CONFIG_APM_EMULATION=m +CONFIG_APM_POWER=m +CONFIG_APPLE_AIRPORT=m +CONFIG_APPLICOM=m +CONFIG_AR9170_LEDS=y +CONFIG_AR9170_USB=m +CONFIG_ARCH_DEFCONFIG="arch/sparc/configs/sparc64_defconfig" +CONFIG_ARCH_DISCONTIGMEM_DEFAULT=y +CONFIG_ARCH_DISCONTIGMEM_ENABLE=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_ARCH_HAS_ILOG2_U64=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_ARCH_MEMORY_PROBE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_WANTS_FREEZER_CONTROL=y +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCNET_1051=m +CONFIG_ARCNET_1201=m +CONFIG_ARCNET_CAP=m +CONFIG_ARCNET_COM20020=m +CONFIG_ARCNET_COM20020_CS=m +CONFIG_ARCNET_COM20020_PCI=m +CONFIG_ARCNET_COM90xx=m +CONFIG_ARCNET_COM90xxIO=m +CONFIG_ARCNET_RAW=m +CONFIG_ARCNET_RIM_I=m +# CONFIG_ARPD is not set +CONFIG_ASK_IP_FIB_HASH=y +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_AT76C50X_USB=m +CONFIG_ATALK=m +CONFIG_ATA_ACPI=y +CONFIG_ATA_GENERIC=m +CONFIG_ATA_OVER_ETH=m +CONFIG_ATA_PIIX=m +CONFIG_ATA_SFF=y +# CONFIG_ATH5K is not set +CONFIG_ATH9K=m +CONFIG_ATH9K_DEBUG=y +CONFIG_ATH_COMMON=m +CONFIG_ATL1=m +CONFIG_ATL1C=m +CONFIG_ATL1E=m +CONFIG_ATL2=m +CONFIG_ATM=m +CONFIG_ATMEL=m +CONFIG_ATM_AMBASSADOR=m +# CONFIG_ATM_AMBASSADOR_DEBUG is not set +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_ATM_CLIP=m +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_DRIVERS=y +# CONFIG_ATM_DUMMY is not set +CONFIG_ATM_ENI=m +# CONFIG_ATM_ENI_DEBUG is not set +# CONFIG_ATM_ENI_TUNE_BURST is not set +CONFIG_ATM_FIRESTREAM=m +CONFIG_ATM_FORE200E=m +CONFIG_ATM_FORE200E_DEBUG=0 +CONFIG_ATM_FORE200E_TX_RETRY=16 +# CONFIG_ATM_FORE200E_USE_TASKLET is not set +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_ATM_HORIZON=m +# CONFIG_ATM_HORIZON_DEBUG is not set +CONFIG_ATM_IA=m +# CONFIG_ATM_IA_DEBUG is not set +CONFIG_ATM_IDT77252=m +# CONFIG_ATM_IDT77252_DEBUG is not set +# CONFIG_ATM_IDT77252_RCV_ALL is not set +CONFIG_ATM_IDT77252_USE_SUNI=y +CONFIG_ATM_LANAI=m +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_NICSTAR=m +# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set +# CONFIG_ATM_NICSTAR_USE_SUNI is not set +CONFIG_ATM_SOLOS=m +CONFIG_ATM_TCP=m +CONFIG_ATM_ZATM=m +# CONFIG_ATM_ZATM_DEBUG is not set +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_ARCH=y +CONFIG_AUDIT_TREE=y +CONFIG_AUFS_BDEV_LOOP=y +# CONFIG_AUFS_BRANCH_MAX_1023 is not set +CONFIG_AUFS_BRANCH_MAX_127=y +# CONFIG_AUFS_BRANCH_MAX_32767 is not set +# CONFIG_AUFS_BRANCH_MAX_511 is not set +CONFIG_AUFS_BR_FUSE=y +CONFIG_AUFS_BR_RAMFS=y +# CONFIG_AUFS_DEBUG is not set +# CONFIG_AUFS_EXPORT is not set +CONFIG_AUFS_FS=m +CONFIG_AUFS_HINOTIFY=y +CONFIG_AUFS_POLL=y +# CONFIG_AUFS_SHWH is not set +CONFIG_AUTOFS4_FS=m +CONFIG_AUTOFS_FS=m +CONFIG_AUXDISPLAY=y +CONFIG_AVERATEC_5100P=m +CONFIG_AX25=m +# CONFIG_AX25_DAMA_SLAVE is not set +CONFIG_B43=m +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +CONFIG_B43LEGACY_HWRNG=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y +CONFIG_B43LEGACY_PCI_AUTOSELECT=y +CONFIG_B43LEGACY_PIO=y +# CONFIG_B43LEGACY_PIO_MODE is not set +# CONFIG_B43_DEBUG is not set +CONFIG_B43_HWRNG=y +CONFIG_B43_LEDS=y +CONFIG_B43_PCICORE_AUTOSELECT=y +CONFIG_B43_PCI_AUTOSELECT=y +# CONFIG_B43_PCMCIA is not set +CONFIG_B44=m +CONFIG_B44_PCI=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_DA903X=m +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_BACKTRACE_SELF_TEST is not set +CONFIG_BASE_FULL=y +CONFIG_BASE_SMALL=0 +CONFIG_BATTERY_BQ27x00=m +CONFIG_BATTERY_DA9030=m +CONFIG_BATTERY_DS2760=m +CONFIG_BATTERY_DS2782=m +CONFIG_BATTERY_MAX17040=m +CONFIG_BATTERY_PMU=m +CONFIG_BAYCOM_EPP=m +CONFIG_BAYCOM_PAR=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_BBC_I2C=m +# CONFIG_BDI_SWITCH is not set +CONFIG_BE2NET=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BEFS_FS=m +CONFIG_BFS_FS=m +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=m +CONFIG_BITREVERSE=y +CONFIG_BITS=64 +CONFIG_BLK_CPQ_CISS_DA=m +CONFIG_BLK_CPQ_DA=m +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_3W_XXXX_RAID=m +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_CMD64X is not set +CONFIG_BLK_DEV_COMPCACHE=m +# CONFIG_BLK_DEV_COMPCACHE_DEBUG is not set +# CONFIG_BLK_DEV_COMPCACHE_STATS is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +CONFIG_BLK_DEV_DAC960=m +# CONFIG_BLK_DEV_DELKIN is not set +CONFIG_BLK_DEV_DM=m +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_GENERIC is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_HPT366 is not set +CONFIG_BLK_DEV_IDECD=y +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y +# CONFIG_BLK_DEV_IDECS is not set +CONFIG_BLK_DEV_IDEDMA=y +CONFIG_BLK_DEV_IDEDMA_PCI=y +CONFIG_BLK_DEV_IDEDMA_SFF=y +CONFIG_BLK_DEV_IDEPCI=y +# CONFIG_BLK_DEV_IDETAPE is not set +CONFIG_BLK_DEV_IDE_PMAC=y +CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_BLK_DEV_IT8172 is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_JMICRON is not set +CONFIG_BLK_DEV_MD=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_OSD=m +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_PLATFORM is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +# CONFIG_BLK_DEV_SC1200 is not set +CONFIG_BLK_DEV_SD=m +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SL82C105 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SVWKS is not set +CONFIG_BLK_DEV_SX8=m +# CONFIG_BLK_DEV_TC86C001 is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_UMEM=m +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_BLK_DEV_XIP is not set +CONFIG_BLOCK=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BMAC=m +CONFIG_BNX2=m +# CONFIG_BNX2X is not set +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +# CONFIG_BOOTX_TEXT is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BOUNCE=y +CONFIG_BPQETHER=m +CONFIG_BRANCH_PROFILE_NONE=y +CONFIG_BRIDGE=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_NETFILTER=y +CONFIG_BRIQ_PANEL=m +CONFIG_BROADCOM_PHY=m +CONFIG_BROKEN_ON_SMP=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +# CONFIG_BT_CMTP is not set +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIBTUART=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIVHCI=m +CONFIG_BT_HIDP=m +CONFIG_BT_L2CAP=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_SCO=m +CONFIG_BUG=y +CONFIG_C2PORT=m +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set +CONFIG_CAN=m +CONFIG_CAN_BCM=m +# CONFIG_CAN_CALC_BITTIMING is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_EMS_PCI=m +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_RAW=m +CONFIG_CAN_SJA1000=m +CONFIG_CAN_SJA1000_OF_PLATFORM=m +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_VCAN=m +# CONFIG_CAPI_AVM is not set +# CONFIG_CAPI_EICON is not set +CONFIG_CAPI_TRACE=y +CONFIG_CARDBUS=y +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_CARMINE_DRAM_CUSTOM is not set +CONFIG_CASSINI=m +CONFIG_CB710_CORE=m +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y +CONFIG_CBE_CPUFREQ_SPU_GOVERNOR=m +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_CFG80211=m +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_MEM_RES_CTLR=y +CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y +CONFIG_CGROUP_NS=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_CHARGER_PCF50633=m +CONFIG_CHECK_SIGNATURE=y +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T3=m +CONFIG_CHELSIO_T3_DEPENDS=y +CONFIG_CHR_DEV_OSST=m +CONFIG_CHR_DEV_SG=m +CONFIG_CHR_DEV_ST=m +CONFIG_CICADA_PHY=m +CONFIG_CIFS=m +# CONFIG_CIFS_DEBUG2 is not set +CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_WEAK_PW_HASH=y +# CONFIG_CIFS_XATTR is not set +CONFIG_CISS_SCSI_TAPE=y +CONFIG_CLASSIC_RCU=y +CONFIG_CLS_U32_MARK=y +# CONFIG_CLS_U32_PERF is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_CNIC=m +CONFIG_CODA_FS=m +# CONFIG_CODE_PATCHING_SELFTEST is not set +CONFIG_COMPAT=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_COMPAT_BRK=y +CONFIG_COMPAT_FOR_U64_ALIGNMENT=y +CONFIG_COMPUTONE=m +CONFIG_CONFIGFS_FS=m +CONFIG_CONNECTOR=m +CONFIG_CONSOLE_POLL=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONSTRUCTORS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_CPUSETS=y +# CONFIG_CPU_FREQ_DEBUG is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_PMAC=y +CONFIG_CPU_FREQ_STAT=m +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CRAMFS=m +# CONFIG_CRASH_DUMP is not set +CONFIG_CRC16=y +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_CRC_CCITT=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC_T10DIF=m +CONFIG_CRYPTO=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CCM is not set +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CRYPTD=m +# CONFIG_CRYPTO_CTR is not set +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_FIPS=y +# CONFIG_CRYPTO_GCM is not set +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_SEED=m +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_ZLIB=m +CONFIG_CUSE=m +CONFIG_CYCLADES=m +CONFIG_CYCLADES_SYNC=m +CONFIG_CYCLOMX_X25=y +# CONFIG_CYZ_INTR is not set +CONFIG_DAVICOM_PHY=m +CONFIG_DCB=y +CONFIG_DE2104X_DSL=0 +CONFIG_DE600=m +CONFIG_DE620=m +CONFIG_DEBUGGER=y +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_DCFLUSH is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_INFO is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DECNET=m +CONFIG_DECNET_NF_GRABULATOR=m +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CFQ=y +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_HTCP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_DEFAULT_NOOP is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_DEFAULT_UIMAGE is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +# CONFIG_DEFXX_MMIO is not set +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_DEVKMEM is not set +CONFIG_DEVPORT=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +CONFIG_DIGIEPCA=m +# CONFIG_DISABLE_VHPT is not set +CONFIG_DISCONTIGMEM=y +CONFIG_DISPLAY7SEG=m +CONFIG_DISPLAY_SUPPORT=m +CONFIG_DL2K=m +CONFIG_DLCI=m +CONFIG_DLCI_MAX=8 +CONFIG_DLM=m +# CONFIG_DLM_DEBUG is not set +CONFIG_DMAR=y +# CONFIG_DMAR_DEFAULT_ON is not set +# CONFIG_DMA_API_DEBUG is not set +CONFIG_DMI=y +CONFIG_DMIID=y +CONFIG_DM_CRYPT=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_LOG_USERSPACE is not set +CONFIG_DM_MIRROR=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +# CONFIG_DM_RAID45 is not set +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_UEVENT=y +CONFIG_DM_ZERO=m +CONFIG_DNET=m +CONFIG_DNOTIFY=y +CONFIG_DONGLE=y +CONFIG_DRAGONRISE_FF=y +CONFIG_DRM_MGA=m +CONFIG_DRM_R128=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_SAVAGE=m +CONFIG_DRM_SIS=m +CONFIG_DRM_TDFX=m +CONFIG_DRM_VIA=m +CONFIG_DS1682=m +CONFIG_DSCC4=m +CONFIG_DSCC4_PCISYNC=y +CONFIG_DSCC4_PCI_RST=y +CONFIG_DTC=y +CONFIG_DUMMY=m +CONFIG_DUMMY_CONSOLE=y +CONFIG_DVB_AF9013=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_AV7110=m +CONFIG_DVB_AV7110_OSD=y +CONFIG_DVB_B2C2_FLEXCOP=m +# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_BT8XX=m +# CONFIG_DVB_BUDGET_CORE is not set +CONFIG_DVB_CAPTURE_DRIVERS=y +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DM1105=m +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_FE_CUSTOMISE is not set +CONFIG_DVB_FIREDTV=m +CONFIG_DVB_FIREDTV_IEEE1394=y +CONFIG_DVB_FIREDTV_INPUT=y +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DVB_L64781=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_MT312=m +CONFIG_DVB_MT352=m +CONFIG_DVB_NXT200X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_PLL=m +CONFIG_DVB_PLUTO2=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_S5H1411=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STV0297=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_STV0900=m +CONFIG_DVB_STV6110=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_USB=m +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIBUSB_MB=m +CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_VES1820=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_ZL10353=m +# CONFIG_DYNAMIC_DEBUG is not set +CONFIG_E100=m +CONFIG_E1000=m +CONFIG_E1000E=m +# CONFIG_E200 is not set +CONFIG_EARLY_PRINTK=y +CONFIG_ECONET_AUNUDP=y +CONFIG_ECONET_NATIVE=y +CONFIG_ECRYPT_FS=m +CONFIG_EDAC=y +# CONFIG_EDAC_AMD8111 is not set +# CONFIG_EDAC_AMD8131 is not set +# CONFIG_EDAC_CPC925 is not set +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_MM_EDAC=m +# CONFIG_EDAC_PASEMI is not set +CONFIG_EEH=y +CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EFI=y +CONFIG_EFI_PARTITION=y +CONFIG_EFI_PCDP=y +CONFIG_EFI_VARS=m +CONFIG_EFS_FS=m +# CONFIG_ELECTRA_CF is not set +CONFIG_ELF_CORE=y +# CONFIG_EMBEDDED is not set +# CONFIG_EMBEDDED6xx is not set +# CONFIG_ENABLE_MUST_CHECK is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_ENIC=m +CONFIG_ENVCTRL=m +CONFIG_EPIC100=m +CONFIG_EPOLL=y +CONFIG_EQUALIZER=m +CONFIG_ESI_DONGLE=m +CONFIG_ETHOC=m +CONFIG_EVENTFD=y +CONFIG_EVENT_PROFILE=y +CONFIG_EVENT_TRACING=y +# CONFIG_EXOFS_DEBUG is not set +CONFIG_EXOFS_FS=m +CONFIG_EXPERIMENTAL=y +CONFIG_EXPORTFS=m +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_DEFAULTS_TO_ORDERED=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_EXTRA_TARGETS="" +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FARSYNC=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_FAT_FS=m +# CONFIG_FAULT_INJECTION is not set +CONFIG_FB=y +# CONFIG_FB_3DFX_ACCEL is not set +CONFIG_FB_3DFX_I2C=y +CONFIG_FB_ARK=m +CONFIG_FB_ATY128_BACKLIGHT=y +CONFIG_FB_ATY_BACKLIGHT=y +CONFIG_FB_ATY_CT=y +CONFIG_FB_ATY_GENERIC_LCD=y +CONFIG_FB_ATY_GX=y +CONFIG_FB_BACKLIGHT=y +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_BROADSHEET=m +# CONFIG_FB_BW2 is not set +CONFIG_FB_CARMINE=m +CONFIG_FB_CARMINE_DRAM_EVAL=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_CG14 is not set +# CONFIG_FB_CG3 is not set +CONFIG_FB_CG6=y +CONFIG_FB_CONTROL=y +CONFIG_FB_CT65550=y +CONFIG_FB_CYBER2000=m +CONFIG_FB_DDC=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_FFB=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_IBM_GXT4500=m +# CONFIG_FB_LEO is not set +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MULTIHEAD=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MB862XX=m +CONFIG_FB_MB862XX_PCI_GDC=y +CONFIG_FB_METRONOME=m +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_NVIDIA=m +CONFIG_FB_NVIDIA_BACKLIGHT=y +# CONFIG_FB_NVIDIA_DEBUG is not set +CONFIG_FB_NVIDIA_I2C=y +CONFIG_FB_OF=y +# CONFIG_FB_P9100 is not set +CONFIG_FB_PLATINUM=y +CONFIG_FB_PM3=m +CONFIG_FB_PS3_DEFAULT_SIZE_M=9 +CONFIG_FB_RADEON=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RIVA_BACKLIGHT=y +# CONFIG_FB_RIVA_DEBUG is not set +CONFIG_FB_RIVA_I2C=y +CONFIG_FB_S1D13XXX=m +CONFIG_FB_S3=m +CONFIG_FB_SAVAGE=m +CONFIG_FB_SAVAGE_ACCEL=y +CONFIG_FB_SAVAGE_I2C=y +CONFIG_FB_SBUS=y +CONFIG_FB_SIS_300=y +CONFIG_FB_SIS_315=y +CONFIG_FB_SM501=m +CONFIG_FB_SVGALIB=m +# CONFIG_FB_TCX is not set +CONFIG_FB_TILEBLITTING=y +CONFIG_FB_TMIO=m +CONFIG_FB_TMIO_ACCELL=y +CONFIG_FB_UVESA=m +CONFIG_FB_VALKYRIE=y +# CONFIG_FB_VGA16 is not set +CONFIG_FB_VIA=m +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_VT8623=m +CONFIG_FB_XVR2500=y +CONFIG_FB_XVR500=y +CONFIG_FCOE=m +CONFIG_FDDI=y +CONFIG_FEALNX=m +CONFIG_FIB_RULES=y +CONFIG_FILE_LOCKING=y +# CONFIG_FIREWIRE is not set +CONFIG_FIRMWARE_EDID=y +CONFIG_FIRMWARE_IN_KERNEL=y +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_FIXED_PHY=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_SUN12x22 is not set +CONFIG_FONT_SUN8x16=y +# CONFIG_FORCEDETH_NAPI is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_WARN=1024 +CONFIG_FREEZER=y +# CONFIG_FSAM7400 is not set +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_STATS is not set +# CONFIG_FSL_ULI1575 is not set +CONFIG_FSNOTIFY=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FTL=m +CONFIG_FTRACE=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set +# CONFIG_FUNCTION_TRACER is not set +CONFIG_FUSE_FS=y +CONFIG_FUSION=y +CONFIG_FUSION_CTL=m +CONFIG_FUSION_FC=m +CONFIG_FUSION_LAN=m +CONFIG_FUSION_LOGGING=y +CONFIG_FUSION_SAS=m +CONFIG_FUSION_SPI=m +CONFIG_FUTEX=y +CONFIG_FW_LOADER=y +CONFIG_GACT_PROB=y +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GARP=m +# CONFIG_GCOV_KERNEL is not set +CONFIG_GELIC_WIRELESS=y +# CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE is not set +CONFIG_GENERIC_ACL=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_NVRAM=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_TRACER=y +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +# CONFIG_GIGASET_BASE is not set +# CONFIG_GIGASET_DEBUG is not set +# CONFIG_GIGASET_M101 is not set +# CONFIG_GIGASET_M105 is not set +CONFIG_GIRBIL_DONGLE=m +CONFIG_GPIOLIB=y +CONFIG_GPIO_BT8XX=m +CONFIG_GPIO_MAX7301=m +CONFIG_GPIO_MAX732X=m +CONFIG_GPIO_MCP23S08=m +CONFIG_GPIO_PCA953X=m +CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_TWL4030=m +CONFIG_GPIO_XILINX=y +CONFIG_GREENASIA_FF=y +CONFIG_GROUP_SCHED=y +CONFIG_HANGCHECK_TIMER=m +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +# CONFIG_HAS_RAPIDIO is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_NODEDATA_EXTENSION=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_LMB=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_HAVE_MTD_OTP=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_COUNTERS=y +CONFIG_HAVE_SYSCALL_WRAPPERS=y +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +# CONFIG_HCALL_STATS is not set +CONFIG_HDLC=m +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +CONFIG_HDLC_RAW=m +CONFIG_HDLC_RAW_ETH=m +CONFIG_HDLC_X25=m +# CONFIG_HEADERS_CHECK is not set +CONFIG_HERMES=m +CONFIG_HERMES_CACHE_FW_ON_INIT=y +CONFIG_HFSPLUS_FS=m +CONFIG_HFS_FS=m +CONFIG_HIBERNATE_32=y +CONFIG_HIBERNATE_64=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_NVS=y +CONFIG_HID=m +CONFIG_HIDRAW=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DEBUG is not set +CONFIG_HID_DRAGONRISE=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GREENASIA=m +CONFIG_HID_GYRATION=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_KYE=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PID=y +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID_THRUSTMASTER=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_WACOM=m +CONFIG_HID_ZEROPLUS=m +CONFIG_HIGHMEM=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_HOSTAP=m +CONFIG_HOSTAP_CS=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_PCI=m +CONFIG_HOSTAP_PLX=m +CONFIG_HOTPLUG=y +CONFIG_HOTPLUG_CPU=y +# CONFIG_HOTPLUG_PCI is not set +CONFIG_HPET=y +CONFIG_HPET_MMAP=y +CONFIG_HPFS_FS=m +# CONFIG_HP_SIMETH is not set +# CONFIG_HP_SIMSERIAL is not set +CONFIG_HTC_PASIC3=m +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE_SIZE_4MB=y +# CONFIG_HUGETLB_PAGE_SIZE_512K is not set +# CONFIG_HUGETLB_PAGE_SIZE_64K is not set +CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y +# CONFIG_HVCS is not set +# CONFIG_HVC_CONSOLE is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_RTAS=y +CONFIG_HVC_UDBG=y +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_HWMON_VID=m +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_INTEL=m +CONFIG_HW_RANDOM_N2RNG=y +CONFIG_HW_RANDOM_PASEMI=y +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HW_RANDOM_VIRTIO=m +# CONFIG_HYSDN is not set +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_DEBUG_CORE is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_HYDRA=m +CONFIG_I2C_ISCH=m +CONFIG_I2C_MPC=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_PARPORT=m +CONFIG_I2C_PARPORT_LIGHT=m +# CONFIG_I2C_PASEMI is not set +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_PIIX4=m +CONFIG_I2C_POWERMAC=y +CONFIG_I2C_SIMTEC=m +CONFIG_I2C_STUB=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m +CONFIG_I2O=m +CONFIG_I2O_BLOCK=m +CONFIG_I2O_BUS=m +CONFIG_I2O_CONFIG=m +CONFIG_I2O_CONFIG_OLD_IOCTL=y +CONFIG_I2O_EXT_ADAPTEC=y +CONFIG_I2O_EXT_ADAPTEC_DMA64=y +CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y +CONFIG_I2O_PROC=m +CONFIG_I2O_SCSI=m +CONFIG_I82092=m +CONFIG_IA32_SUPPORT=y +CONFIG_IA64=y +# CONFIG_IA64_ACPI_CPUFREQ is not set +# CONFIG_IA64_CYCLONE is not set +# CONFIG_IA64_DEBUG_CMPXCHG is not set +# CONFIG_IA64_DEBUG_IRQ is not set +# CONFIG_IA64_DIG is not set +# CONFIG_IA64_DIG_VTD is not set +# CONFIG_IA64_ESI is not set +CONFIG_IA64_GENERIC=y +CONFIG_IA64_GRANULE_16MB=y +# CONFIG_IA64_GRANULE_64MB is not set +# CONFIG_IA64_HP_AML_NFW is not set +# CONFIG_IA64_HP_SIM is not set +# CONFIG_IA64_HP_ZX1 is not set +# CONFIG_IA64_HP_ZX1_SWIOTLB is not set +CONFIG_IA64_L1_CACHE_SHIFT=7 +# CONFIG_IA64_MCA_RECOVERY is not set +# CONFIG_IA64_MC_ERR_INJECT is not set +CONFIG_IA64_PAGE_SIZE_16KB=y +# CONFIG_IA64_PAGE_SIZE_4KB is not set +# CONFIG_IA64_PAGE_SIZE_64KB is not set +# CONFIG_IA64_PAGE_SIZE_8KB is not set +# CONFIG_IA64_PALINFO is not set +# CONFIG_IA64_PRINT_HAZARDS is not set +# CONFIG_IA64_SGI_SN2 is not set +# CONFIG_IA64_SGI_UV is not set +CONFIG_IA64_UNCACHED_ALLOCATOR=y +# CONFIG_IA64_XEN_GUEST is not set +# CONFIG_IBMEBUS is not set +CONFIG_IBMLS=m +CONFIG_IBMOL=m +# CONFIG_IBMVETH is not set +CONFIG_IBMVIO=y +# CONFIG_IBM_BSR is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +CONFIG_ICPLUS_PHY=m +CONFIG_ICS932S401=m +CONFIG_IDEPCI_PCIBUS_ORDER=y +CONFIG_IDE_ATAPI=y +CONFIG_IDE_GD=y +CONFIG_IDE_GD_ATA=y +# CONFIG_IDE_GD_ATAPI is not set +CONFIG_IDE_PROC_FS=y +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_TIMINGS=y +CONFIG_IDE_XFER_MODE=y +CONFIG_IEEE1394=m +CONFIG_IEEE1394_DV1394=m +CONFIG_IEEE1394_ETH1394=m +CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y +CONFIG_IEEE1394_OHCI1394=m +CONFIG_IEEE1394_RAWIO=m +CONFIG_IEEE1394_SBP2=m +# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set +# CONFIG_IEEE1394_VERBOSEDEBUG is not set +CONFIG_IEEE1394_VIDEO1394=m +CONFIG_IEEE802154=m +CONFIG_IEEE802154_DRIVERS=m +# CONFIG_IEEE802154_FAKEHARD is not set +CONFIG_IFB=m +# CONFIG_IGB is not set +CONFIG_IGBVF=m +# CONFIG_IKCONFIG_PROC is not set +# CONFIG_IMA is not set +CONFIG_INET=y +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET_AH=m +CONFIG_INET_DCCP_DIAG=m +CONFIG_INET_DIAG=y +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_LRO=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_AMSO1100_DEBUG=y +CONFIG_INFINIBAND_CXGB3=m +# CONFIG_INFINIBAND_CXGB3_DEBUG is not set +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_MTHCA=m +CONFIG_INFINIBAND_MTHCA_DEBUG=y +# CONFIG_INFINIBAND_NES is not set +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=y +CONFIG_INPUT_ADBHID=y +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_EVDEV=m +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_PCF50633_PMU=m +CONFIG_INPUT_PCSPKR=m +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_SPARCSPKR=y +CONFIG_INPUT_TABLET=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_TWL4030_PWRBUTTON=m +CONFIG_INPUT_YEALINK=m +CONFIG_IOMMU_API=y +CONFIG_IOMMU_HELPER=y +CONFIG_IOMMU_VMERGE=y +CONFIG_IOSAPIC=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_CFQ=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IPC_NS is not set +CONFIG_IPDDP=m +CONFIG_IPDDP_DECAP=y +CONFIG_IPDDP_ENCAP=y +# CONFIG_IPIC is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_SI=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPV6=m +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_IPV6_SIT=m +CONFIG_IPW2100=m +# CONFIG_IPW2100_DEBUG is not set +CONFIG_IPW2100_MONITOR=y +CONFIG_IPW2200=m +# CONFIG_IPW2200_DEBUG is not set +CONFIG_IPW2200_MONITOR=y +CONFIG_IPW2200_PROMISCUOUS=y +CONFIG_IPW2200_QOS=y +CONFIG_IPW2200_RADIOTAP=y +# CONFIG_IPWIRELESS is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=y +# CONFIG_IP_DCCP_CCID3_DEBUG is not set +CONFIG_IP_DCCP_CCID3_RTO=100 +# CONFIG_IP_DCCP_DEBUG is not set +CONFIG_IP_DCCP_TFRC_LIB=y +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_MULTICAST=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_RARP=y +CONFIG_IP_SCTP=m +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_IPV6=y +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_TAB_BITS=12 +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_WRR=m +CONFIG_IRCOMM=m +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_DEBUG=y +CONFIG_IRDA_FAST_RR=y +CONFIG_IRDA_ULTRA=y +CONFIG_IRLAN=m +CONFIG_IRNET=m +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_IRQ_ALL_CPUS is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_IRTTY_SIR=m +# CONFIG_ISA is not set +CONFIG_ISA_DMA_API=y +CONFIG_ISCSI_TCP=m +# CONFIG_ISDN_AUDIO is not set +CONFIG_ISDN_CAPI=m +# CONFIG_ISDN_CAPI_CAPI20 is not set +# CONFIG_ISDN_CAPI_CAPIDRV is not set +# CONFIG_ISDN_CAPI_MIDDLEWARE is not set +# CONFIG_ISDN_DIVERSION is not set +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +# CONFIG_ISDN_DRV_HISAX is not set +# CONFIG_ISDN_DRV_LOOP is not set +CONFIG_ISDN_I4L=m +# CONFIG_ISDN_PPP is not set +# CONFIG_ISDN_X25 is not set +# CONFIG_ISI is not set +CONFIG_ISL29003=m +CONFIG_ISO9660_FS=m +CONFIG_ISTALLION=m +# CONFIG_ITANIUM is not set +CONFIG_ITCO_VENDOR_SUPPORT=y +CONFIG_ITCO_WDT=m +# CONFIG_IWL3945 is not set +# CONFIG_IWL4965 is not set +CONFIG_IWL5000=y +CONFIG_IWLAGN=m +CONFIG_IWLWIFI=m +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLWIFI_LEDS=y +# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set +CONFIG_IWM=m +# CONFIG_IWM_DEBUG is not set +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_DCB=y +CONFIG_JBD=y +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +# CONFIG_JBD_DEBUG is not set +CONFIG_JFFS2_CMODE_FAVOURLZO=y +# CONFIG_JFFS2_CMODE_NONE is not set +# CONFIG_JFFS2_CMODE_PRIORITY is not set +# CONFIG_JFFS2_CMODE_SIZE is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFS_DEBUG is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +CONFIG_JFS_STATISTICS=y +CONFIG_JME=m +CONFIG_JOLIET=y +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_WALKERA0701=m +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_KARMA_PARTITION=y +CONFIG_KEXEC=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_LM8323=m +CONFIG_KEYBOARD_MATRIX=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +CONFIG_KGDB_SERIAL_CONSOLE=y +# CONFIG_KGDB_TESTS is not set +CONFIG_KINGSUN_DONGLE=m +# CONFIG_KMEMCHECK is not set +# CONFIG_KMEMTRACE is not set +CONFIG_KPROBES=y +# CONFIG_KPROBES_SANITY_TEST is not set +CONFIG_KRETPROBES=y +CONFIG_KS0108=m +CONFIG_KS0108_DELAY=2 +CONFIG_KS0108_PORT=0x378 +CONFIG_KS8842=m +CONFIG_KS8851=m +CONFIG_KS959_DONGLE=m +CONFIG_KSDAZZLE_DONGLE=m +CONFIG_LANMEDIA=m +CONFIG_LAPBETHER=m +CONFIG_LBDAF=y +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_LCD_ILI9320=m +CONFIG_LCD_LTV350QV=m +CONFIG_LCD_PLATFORM=m +CONFIG_LCD_TDO24M=m +CONFIG_LCD_VGG2432A4=m +# CONFIG_LDM_DEBUG is not set +CONFIG_LEDS_BD2802=m +CONFIG_LEDS_DA903X=m +CONFIG_LEDS_DAC124S085=m +# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_LP3944=m +CONFIG_LEDS_SUNFIRE=m +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_GPIO=m +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +CONFIG_LEDS_WM8350=m +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=0 +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +CONFIG_LIB80211_CRYPT_WEP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_LIBCRC32C=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_CS=m +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_SPI=m +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_LIBIPW=m +# CONFIG_LIBIPW_DEBUG is not set +CONFIG_LIRC_ATIUSB=m +CONFIG_LIRC_BT829=m +CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m +CONFIG_LIRC_DEV=m +CONFIG_LIRC_ENE0100=m +# CONFIG_LIRC_GPIO is not set +CONFIG_LIRC_I2C=m +CONFIG_LIRC_IGORPLUGUSB=m +CONFIG_LIRC_IMON=m +CONFIG_LIRC_IT87=m +CONFIG_LIRC_ITE8709=m +CONFIG_LIRC_MCEUSB=m +# CONFIG_LIRC_PARALLEL is not set +CONFIG_LIRC_SASEM=m +CONFIG_LIRC_SERIAL=m +CONFIG_LIRC_SIR=m +CONFIG_LIRC_STREAMZAP=m +CONFIG_LIRC_TTUSBIR=m +CONFIG_LITELINK_DONGLE=m +# CONFIG_LKDTM is not set +CONFIG_LLC2=m +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_LOCKD=m +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_LOCKD_V4=y +CONFIG_LOCK_KERNEL=y +# CONFIG_LOCK_STAT is not set +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGITECH_FF=y +# CONFIG_LOGO is not set +CONFIG_LOWMEM_SIZE=0x30000000 +# CONFIG_LPARCFG is not set +# CONFIG_LP_CONSOLE is not set +CONFIG_LSI_ET1011C_PHY=m +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_LXT_PHY=m +CONFIG_M25PXX_USE_FAST_READ=y +CONFIG_MA600_DONGLE=m +CONFIG_MAC80211=m +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_DEFAULT_PS=y +CONFIG_MAC80211_DEFAULT_PS_VALUE=1 +CONFIG_MAC80211_HWSIM=m +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MACE=m +# CONFIG_MACE_AAUI_PORT is not set +CONFIG_MACINTOSH_DRIVERS=y +CONFIG_MAC_EMUMOUSEBTN=y +CONFIG_MAC_FLOPPY=m +CONFIG_MAGIC_SYSRQ=y +CONFIG_MARVELL_PHY=m +CONFIG_MAX_RAW_DEVS=256 +CONFIG_MCKINLEY=y +CONFIG_MCP2120_DONGLE=m +CONFIG_MCS_FIR=m +CONFIG_MD=y +CONFIG_MDIO=m +CONFIG_MDIO_BITBANG=m +CONFIG_MDIO_GPIO=m +CONFIG_MD_FAULTY=m +CONFIG_MD_LINEAR=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEGARAID_LEGACY=m +CONFIG_MEGARAID_MAILBOX=m +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_SAS=m +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_SPARSE=y +# CONFIG_MEMORY_HOTREMOVE is not set +# CONFIG_MEMSTICK is not set +CONFIG_MFD_CORE=m +CONFIG_MFD_PCF50633=m +CONFIG_MFD_SM501=m +# CONFIG_MFD_TMIO is not set +CONFIG_MFD_WM8350=m +CONFIG_MFD_WM8350_I2C=m +CONFIG_MFD_WM8400=m +CONFIG_MIGRATION=y +CONFIG_MII=m +CONFIG_MINIX_FS=m +CONFIG_MISC_DEVICES=y +CONFIG_MISC_FILESYSTEMS=y +CONFIG_MISDN=m +# CONFIG_MISDN_DSP is not set +# CONFIG_MISDN_HFCMULTI is not set +# CONFIG_MISDN_HFCPCI is not set +# CONFIG_MISDN_HFCUSB is not set +# CONFIG_MISDN_L1OIP is not set +CONFIG_MKISS=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_INFINIBAND=m +CONFIG_MMC=m +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_MMC_CB710=m +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_RICOH_MMC=m +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_OF=m +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_SDHCI_PLTFM=m +CONFIG_MMC_SDRICOH_CS=m +CONFIG_MMC_SPI=m +# CONFIG_MMC_TEST is not set +CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_UNSAFE_RESUME is not set +CONFIG_MMC_VIA_SDMMC=m +CONFIG_MMC_WBSD=m +CONFIG_MMTIMER=y +CONFIG_MMU=y +CONFIG_MM_OWNER=y +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_GPIO=m +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOXA_INTELLIO=m +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_MPC5121_ADS is not set +# CONFIG_MPC5121_GENERIC is not set +CONFIG_MPIC=y +CONFIG_MPIC_BROKEN_REGREAD=y +CONFIG_MPIC_U3_HT_IRQS=y +# CONFIG_MPIC_WEIRD is not set +CONFIG_MSDOS_FS=m +CONFIG_MSDOS_PARTITION=y +# CONFIG_MSI_BITMAP_SELFTEST is not set +# CONFIG_MSPEC is not set +CONFIG_MTD=m +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTD_ABSENT=m +CONFIG_MTD_ALAUDA=m +CONFIG_MTD_AR7_PARTS=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK2MTD=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_MTD_CFI=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=m +CONFIG_MTD_CHAR=m +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_CONCAT=m +CONFIG_MTD_DATAFLASH=m +CONFIG_MTD_DATAFLASH_OTP=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_DOC2000=m +CONFIG_MTD_DOC2001=m +CONFIG_MTD_DOC2001PLUS=m +CONFIG_MTD_DOCECC=m +CONFIG_MTD_DOCPROBE=m +CONFIG_MTD_DOCPROBE_ADDRESS=0 +# CONFIG_MTD_DOCPROBE_ADVANCED is not set +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_INTEL_VR_NOR=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_LPDDR=m +CONFIG_MTD_M25P80=m +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MTDRAM=m +CONFIG_MTD_NAND=m +CONFIG_MTD_NAND_CAFE=m +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_FSL_ELBC is not set +CONFIG_MTD_NAND_IDS=m +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_NANDSIM=m +# CONFIG_MTD_NAND_PASEMI is not set +CONFIG_MTD_NAND_PLATFORM=m +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_OF_PARTS is not set +CONFIG_MTD_ONENAND=m +CONFIG_MTD_ONENAND_2X_PROGRAM=y +# CONFIG_MTD_ONENAND_OTP is not set +CONFIG_MTD_ONENAND_SIM=m +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +CONFIG_MTD_OOPS=m +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_PCI=m +CONFIG_MTD_PHRAM=m +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_OF=m +CONFIG_MTD_PLATRAM=m +CONFIG_MTD_PMC551=m +# CONFIG_MTD_PMC551_BUGFIX is not set +# CONFIG_MTD_PMC551_DEBUG is not set +CONFIG_MTD_QINFO_PROBE=m +CONFIG_MTD_RAM=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS=m +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_ROM=m +CONFIG_MTD_SLRAM=m +CONFIG_MTD_SUN_UFLASH=m +CONFIG_MTD_TESTS=m +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_DEBUG is not set +CONFIG_MTD_UBI_GLUEBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MV643XX_ETH=m +CONFIG_MWL8K=m +CONFIG_MYRI10GE=m +CONFIG_MYRI_SBUS=m +CONFIG_NAMESPACES=y +CONFIG_NATIONAL_PHY=m +CONFIG_NATSEMI=m +CONFIG_NCPFS_EXTRAS=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_PACKET_SIGNING=y +CONFIG_NCPFS_STRONG=y +CONFIG_NCP_FS=m +# CONFIG_NDISWRAPPER is not set +CONFIG_NE2K_PCI=m +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_NET=y +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETDEVICES=y +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_TPROXY=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +# CONFIG_NETLABEL is not set +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NETROM=m +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETXEN_NIC=m +CONFIG_NET_9P=m +# CONFIG_NET_9P_DEBUG is not set +CONFIG_NET_9P_RDMA=m +CONFIG_NET_9P_VIRTIO=m +CONFIG_NET_ACT_GACT=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_CLS=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_CGROUP=y +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_FW=m +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_U32=m +CONFIG_NET_DCCPPROBE=m +# CONFIG_NET_DROP_MONITOR is not set +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6060=y +CONFIG_NET_DSA_MV88E6123_61_65=y +CONFIG_NET_DSA_MV88E6131=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_DSA_TAG_TRAILER=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_ETHERNET=y +CONFIG_NET_FC=y +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_NET_IPIP=m +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_NET_NS=y +CONFIG_NET_PCI=y +CONFIG_NET_PCMCIA=y +CONFIG_NET_POCKET=y +CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_NET_SB1000 is not set +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_FIFO=y +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_TCPPROBE=m +CONFIG_NET_TULIP=y +CONFIG_NET_VENDOR_3COM=y +CONFIG_NEW_LEDS=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_NFS_FS=m +# CONFIG_NFS_FSCACHE is not set +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_V4_1 is not set +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_PROTO_DCCP=m +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_PROTO_DCCP=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NILFS2_FS=m +CONFIG_NLATTR=y +CONFIG_NLS=y +CONFIG_NLS_ASCII=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +CONFIG_NODES_SHIFT=4 +CONFIG_NODES_SPAN_OTHER_NODES=y +CONFIG_NOP_TRACER=y +CONFIG_NOP_USB_XCEIV=m +# CONFIG_NORTEL_HERMES is not set +# CONFIG_NOZOMI is not set +CONFIG_NO_HZ=y +CONFIG_NR_QUICK=1 +CONFIG_NS83820=m +CONFIG_NSC_FIR=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_FS=m +# CONFIG_NTFS_RW is not set +CONFIG_NUMA=y +CONFIG_NVRAM=y +CONFIG_N_HDLC=m +CONFIG_OBP_FLASH=m +# CONFIG_OCFS2_DEBUG_FS is not set +CONFIG_OCFS2_DEBUG_MASKLOG=y +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_POSIX_ACL=y +CONFIG_OCFS2_FS_STATS=y +CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m +CONFIG_OF=y +CONFIG_OF_DEVICE=y +CONFIG_OF_GPIO=y +CONFIG_OF_I2C=y +CONFIG_OF_MDIO=y +CONFIG_OF_SPI=y +CONFIG_OLD_BELKIN_DONGLE=m +CONFIG_OMFS_FS=m +CONFIG_OPROFILE=m +CONFIG_P54_COMMON=m +CONFIG_P54_LEDS=y +CONFIG_P54_PCI=m +CONFIG_P54_SPI=m +CONFIG_P54_USB=m +# CONFIG_PACKARDBELL_E5 is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +# CONFIG_PAGE_POISONING is not set +CONFIG_PANTHERLORD_FF=y +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_GUEST=y +CONFIG_PARIDE=m +CONFIG_PARIDE_ATEN=m +CONFIG_PARIDE_BPCK=m +CONFIG_PARIDE_BPCK6=m +CONFIG_PARIDE_COMM=m +CONFIG_PARIDE_DSTR=m +CONFIG_PARIDE_EPAT=m +# CONFIG_PARIDE_EPATC8 is not set +CONFIG_PARIDE_EPIA=m +CONFIG_PARIDE_FIT2=m +CONFIG_PARIDE_FIT3=m +CONFIG_PARIDE_FRIQ=m +CONFIG_PARIDE_FRPW=m +CONFIG_PARIDE_KBIC=m +CONFIG_PARIDE_KTTI=m +CONFIG_PARIDE_ON20=m +CONFIG_PARIDE_ON26=m +CONFIG_PARIDE_PCD=m +CONFIG_PARIDE_PD=m +CONFIG_PARIDE_PF=m +CONFIG_PARIDE_PG=m +CONFIG_PARIDE_PT=m +CONFIG_PARPORT=m +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_AX88796=m +# CONFIG_PARPORT_GSC is not set +CONFIG_PARPORT_NOT_PC=y +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_PC_FIFO=y +CONFIG_PARPORT_PC_PCMCIA=m +# CONFIG_PARPORT_PC_SUPERIO is not set +CONFIG_PARPORT_SERIAL=m +CONFIG_PARPORT_SUNBPP=m +CONFIG_PARTITION_ADVANCED=y +# CONFIG_PASEMI_MAC is not set +CONFIG_PATA_ACPI=m +# CONFIG_PATA_ALI is not set +CONFIG_PATA_AMD=m +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +CONFIG_PATA_CS5520=m +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +CONFIG_PATA_EFAR=m +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +CONFIG_PATA_IT8213=m +CONFIG_PATA_IT821X=m +CONFIG_PATA_JMICRON=m +CONFIG_PATA_MARVELL=m +CONFIG_PATA_MPIIX=m +CONFIG_PATA_NETCELL=m +CONFIG_PATA_NINJA32=m +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +CONFIG_PATA_OF_PLATFORM=m +CONFIG_PATA_OLDPIIX=m +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +CONFIG_PATA_PCMCIA=m +CONFIG_PATA_PDC2027X=m +# CONFIG_PATA_PDC_OLD is not set +CONFIG_PATA_PLATFORM=m +# CONFIG_PATA_RADISYS is not set +CONFIG_PATA_RZ1000=m +# CONFIG_PATA_SC1200 is not set +CONFIG_PATA_SCH=m +CONFIG_PATA_SERVERWORKS=m +CONFIG_PATA_SIL680=m +CONFIG_PATA_SIS=m +CONFIG_PATA_TRIFLEX=m +CONFIG_PATA_VIA=m +CONFIG_PATA_WINBOND=m +# CONFIG_PC300TOO is not set +CONFIG_PCCARD=m +CONFIG_PCCARD_NONSTATIC=m +CONFIG_PCF50633_ADC=m +CONFIG_PCF50633_GPIO=m +CONFIG_PCF8575=m +CONFIG_PCI=y +CONFIG_PCI200SYN=m +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIPCWATCHDOG=m +CONFIG_PCI_ATMEL=m +# CONFIG_PCI_DEBUG is not set +CONFIG_PCI_DOMAINS=y +# CONFIG_PCI_HERMES is not set +# CONFIG_PCI_IOV is not set +CONFIG_PCI_LEGACY=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_STUB is not set +CONFIG_PCI_SYSCALL=y +CONFIG_PCMCIA=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_AHA152X=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA_FDOMAIN=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_IBMTR=m +CONFIG_PCMCIA_IOCTL=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_NETWAVE=m +CONFIG_PCMCIA_NINJA_SCSI=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_QLOGIC=m +CONFIG_PCMCIA_RAYCS=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_PCMCIA_SYM53C500=m +CONFIG_PCMCIA_WAVELAN=m +CONFIG_PCMCIA_WL3501=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_XIRCOM=m +CONFIG_PCNET32=m +CONFIG_PCSPKR_PLATFORM=y +CONFIG_PD6729=m +CONFIG_PDA_POWER=m +CONFIG_PDC_ADMA=m +# CONFIG_PERFMON is not set +CONFIG_PERF_COUNTERS=y +# CONFIG_PERMIT_BSP_REMOVE is not set +CONFIG_PGTABLE_3=y +# CONFIG_PGTABLE_4 is not set +CONFIG_PHANTOM=m +CONFIG_PHONE=m +CONFIG_PHONET=m +CONFIG_PHONE_IXJ=m +CONFIG_PHONE_IXJ_PCMCIA=m +CONFIG_PHYLIB=y +# CONFIG_PHYP_DUMP is not set +CONFIG_PHYSICAL_START=0x00000000 +# CONFIG_PID_NS is not set +CONFIG_PLIP=m +# CONFIG_PLX_HERMES is not set +CONFIG_PM=y +CONFIG_PMAC_APM_EMU=m +CONFIG_PMAC_BACKLIGHT=y +CONFIG_PMAC_BACKLIGHT_LEGACY=y +CONFIG_PMAC_MEDIABAY=y +CONFIG_PMAC_RACKMETER=m +CONFIG_PMIC_DA903X=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_DISABLE_CONSOLE=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PNP=y +CONFIG_PNPACPI=y +# CONFIG_PNP_DEBUG_MESSAGES is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER3=y +CONFIG_POWER4=y +# CONFIG_POWER4_ONLY is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PPC=y +CONFIG_PPC32=y +# CONFIG_PPC601_SYNC_FIX is not set +# CONFIG_PPC_16K_PAGES is not set +# CONFIG_PPC_256K_PAGES is not set +CONFIG_PPC_4K_PAGES=y +# CONFIG_PPC_64K_PAGES is not set +# CONFIG_PPC_82xx is not set +# CONFIG_PPC_83xx is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_86xx is not set +# CONFIG_PPC_8xx is not set +CONFIG_PPC_BOOK3S=y +CONFIG_PPC_BOOK3S_32=y +CONFIG_PPC_BOOK3S_64=y +# CONFIG_PPC_CELLEB is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PPC_CELL_QPACE is not set +CONFIG_PPC_CHRP=y +# CONFIG_PPC_CLOCK is not set +# CONFIG_PPC_DCR_MMIO is not set +# CONFIG_PPC_DCR_NATIVE is not set +CONFIG_PPC_DISABLE_WERROR=y +# CONFIG_PPC_EARLY_DEBUG is not set +# CONFIG_PPC_EMULATED_STATS is not set +CONFIG_PPC_FPU=y +CONFIG_PPC_HAVE_PMU_SUPPORT=y +CONFIG_PPC_I8259=y +# CONFIG_PPC_IBM_CELL_BLADE is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_PPC_ISERIES is not set +# CONFIG_PPC_MPC52xx is not set +CONFIG_PPC_MSI_BITMAP=y +CONFIG_PPC_NATIVE=y +CONFIG_PPC_NEED_DMA_SYNC_OPS=y +CONFIG_PPC_OF=y +CONFIG_PPC_OF_BOOT_TRAMPOLINE=y +# CONFIG_PPC_OF_PLATFORM_PCI is not set +CONFIG_PPC_PASEMI_CPUFREQ=y +CONFIG_PPC_PASEMI_IOMMU=y +# CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE is not set +CONFIG_PPC_PASEMI_MDIO=y +CONFIG_PPC_PCI_CHOICE=y +CONFIG_PPC_PERF_CTRS=y +CONFIG_PPC_PMAC=y +CONFIG_PPC_PMAC64=y +CONFIG_PPC_PSERIES=y +CONFIG_PPC_RTAS=y +# CONFIG_PPC_SMLPAR is not set +# CONFIG_PPC_SPLPAR is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +CONFIG_PPC_STD_MMU_64=y +CONFIG_PPC_UDBG_16550=y +CONFIG_PPDEV=m +CONFIG_PPP=m +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPS=m +# CONFIG_PPS_DEBUG is not set +# CONFIG_PQ2ADS is not set +# CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_PRINTER=m +CONFIG_PRINTK=y +CONFIG_PRINTK_TIME=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_PRINT_STACK_DEPTH=64 +CONFIG_PROC_DEVICETREE=y +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROC_SYSCTL=y +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +CONFIG_PROM_CONSOLE=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_PS3_ADVANCED is not set +CONFIG_PS3_DISK=m +# CONFIG_PS3_DYNAMIC_DMA is not set +CONFIG_PS3_FLASH=m +CONFIG_PS3_HTAB_SIZE=20 +CONFIG_PS3_LPM=m +CONFIG_PS3_PS3AV=y +CONFIG_PS3_ROM=m +CONFIG_PS3_STORAGE=m +CONFIG_PS3_SYS_MANAGER=y +CONFIG_PS3_VUART=y +CONFIG_PSERIES_MSI=y +CONFIG_PSS_MIXER=y +CONFIG_QFMT_V2=m +CONFIG_QLA3XXX=m +CONFIG_QLGE=m +CONFIG_QNX4FS_FS=m +CONFIG_QSEMI_PHY=m +CONFIG_QUICKLIST=y +CONFIG_QUOTA=y +CONFIG_QUOTACTL=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_QUOTA_TREE=m +CONFIG_R3964=m +# CONFIG_R6040 is not set +CONFIG_R8169_VLAN=y +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_GEMTEK_PCI=m +CONFIG_RADIO_MAESTRO=m +CONFIG_RADIO_MAXIRADIO=m +CONFIG_RADIO_TEA5764=m +CONFIG_RAID_ATTRS=m +CONFIG_RAW_DRIVER=m +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RDS_DEBUG is not set +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RD_LZMA=y +# CONFIG_REALTEK_PHY is not set +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_BQ24022=m +CONFIG_REGULATOR_DA903X=m +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +CONFIG_REGULATOR_LP3971=m +CONFIG_REGULATOR_MAX1586=m +CONFIG_REGULATOR_PCF50633=m +CONFIG_REGULATOR_TWL4030=y +CONFIG_REGULATOR_USERSPACE_CONSUMER=m +CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +CONFIG_REGULATOR_WM8350=m +CONFIG_REGULATOR_WM8400=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_FS=m +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_REISERFS_FS_XATTR=y +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_RELAY=y +# CONFIG_RELOCATABLE is not set +CONFIG_RESOURCE_COUNTERS=y +CONFIG_RFD_FTL=m +CONFIG_RFKILL=m +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_LEDS=y +CONFIG_RING_BUFFER=y +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_RIO is not set +CONFIG_ROADRUNNER=m +# CONFIG_ROADRUNNER_LARGE_RINGS is not set +CONFIG_ROCKETPORT=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +# CONFIG_ROMFS_BACKED_BY_MTD is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_ON_BLOCK=y +CONFIG_ROSE=m +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_SPKM3=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT2500USB=m +CONFIG_RT2800USB=m +CONFIG_RT2X00=m +# CONFIG_RT2X00_DEBUG is not set +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_CRYPTO=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_HT=y +CONFIG_RT2X00_LIB_LEDS=y +CONFIG_RT2X00_LIB_PCI=m +CONFIG_RT2X00_LIB_RFKILL=y +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT61PCI=m +CONFIG_RT73USB=m +# CONFIG_RTAS_FLASH is not set +CONFIG_RTAS_PROC=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_DRV_DS1286=m +CONFIG_RTC_DRV_DS1305=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1390=m +CONFIG_RTC_DRV_DS1511=m +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_DS3234=m +CONFIG_RTC_DRV_EFI=m +CONFIG_RTC_DRV_FM3130=m +CONFIG_RTC_DRV_GENERIC=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_M41T94=m +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T86=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_MAX6902=m +CONFIG_RTC_DRV_PCF50633=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_R9701=m +CONFIG_RTC_DRV_RS5C348=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_RX8581=m +CONFIG_RTC_DRV_S35390A=m +CONFIG_RTC_DRV_STARFIRE=y +CONFIG_RTC_DRV_STK17TA8=m +CONFIG_RTC_DRV_SUN4V=y +CONFIG_RTC_DRV_TWL4030=m +CONFIG_RTC_DRV_V3020=m +CONFIG_RTC_DRV_WM8350=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_LIB=y +# CONFIG_RTL8180 is not set +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_RT_MUTEXES=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_RXKAD=m +CONFIG_S2IO=m +# CONFIG_SAMPLES is not set +CONFIG_SATA_AHCI=m +CONFIG_SATA_INIC162X=m +CONFIG_SATA_MV=m +CONFIG_SATA_NV=m +CONFIG_SATA_PMP=y +CONFIG_SATA_PROMISE=m +CONFIG_SATA_QSTOR=m +CONFIG_SATA_SIL=m +CONFIG_SATA_SIL24=m +CONFIG_SATA_SIS=m +CONFIG_SATA_SX4=m +CONFIG_SATA_ULI=m +CONFIG_SATA_VIA=m +CONFIG_SATA_VITESSE=m +CONFIG_SBUS=y +CONFIG_SBUSCHAR=y +CONFIG_SC6600=y +CONFIG_SC6600_CDROM=4 +CONFIG_SC6600_CDROMBASE=0 +CONFIG_SC6600_JOY=y +CONFIG_SC92031=m +# CONFIG_SCANLOG is not set +CONFIG_SCHED_DEBUG=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_SCHED_SMT=y +# CONFIG_SCHED_TRACER is not set +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_ADVANSYS=m +CONFIG_SCSI_AIC79XX=m +# CONFIG_SCSI_AIC7XXX_OLD is not set +CONFIG_SCSI_AIC94XX=m +CONFIG_SCSI_ARCMSR=m +CONFIG_SCSI_ARCMSR_AER=y +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_SCSI_BUSLOGIC=m +CONFIG_SCSI_CXGB3_ISCSI=m +CONFIG_SCSI_DC395x=m +CONFIG_SCSI_DH=m +CONFIG_SCSI_DH_ALUA=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DMA=y +CONFIG_SCSI_DMX3191D=m +CONFIG_SCSI_DPT_I2O=m +CONFIG_SCSI_EATA=m +CONFIG_SCSI_EATA_LINKED_COMMANDS=y +CONFIG_SCSI_EATA_MAX_TAGS=16 +CONFIG_SCSI_EATA_TAGGED_QUEUE=y +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_FC_TGT_ATTRS=y +CONFIG_SCSI_GDTH=m +CONFIG_SCSI_HPTIOP=m +# CONFIG_SCSI_IBMVFC is not set +# CONFIG_SCSI_IBMVSCSI is not set +# CONFIG_SCSI_IBMVSCSIS is not set +CONFIG_SCSI_IMM=m +CONFIG_SCSI_INIA100=m +CONFIG_SCSI_INITIO=m +CONFIG_SCSI_IPR=m +# CONFIG_SCSI_IPR_DUMP is not set +# CONFIG_SCSI_IPR_TRACE is not set +CONFIG_SCSI_ISCSITARGET=m +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_IZIP_EPP16 is not set +# CONFIG_SCSI_IZIP_SLOW_CTR is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_SCSI_LOWLEVEL_PCMCIA=y +CONFIG_SCSI_LPFC=m +CONFIG_SCSI_MAC53C94=m +CONFIG_SCSI_MESH=m +CONFIG_SCSI_MESH_RESET_DELAY_MS=4000 +CONFIG_SCSI_MESH_SYNC_RATE=5 +CONFIG_SCSI_MPT2SAS=m +# CONFIG_SCSI_MPT2SAS_LOGGING is not set +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_MVSAS is not set +CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_NSP32=m +# CONFIG_SCSI_OSD_DEBUG is not set +CONFIG_SCSI_OSD_DPRINT_SENSE=1 +CONFIG_SCSI_OSD_INITIATOR=m +CONFIG_SCSI_OSD_ULD=m +CONFIG_SCSI_PPA=m +CONFIG_SCSI_PROC_FS=y +CONFIG_SCSI_QLA_FC=m +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_SCSI_QLOGICPTI=m +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=m +# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_SRP=m +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_SRP_TGT_ATTRS=y +CONFIG_SCSI_STEX=m +CONFIG_SCSI_SUNESP=m +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 +CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 +CONFIG_SCSI_SYM53C8XX_MMIO=y +CONFIG_SCSI_TGT=m +CONFIG_SCSI_WAIT_SCAN=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SDIO_UART=m +CONFIG_SECCOMP=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 +# CONFIG_SECURITY_APPARMOR_DISABLE is not set +CONFIG_SECURITY_APPARMOR_NETWORK=y +CONFIG_SECURITY_DEFAULT="apparmor" +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_PATH=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_DISABLE=y +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +CONFIG_SECURITY_TOMOYO=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM9240=m +# CONFIG_SENSORS_ADS7828 is not set +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +# CONFIG_SENSORS_ADT7473 is not set +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_AMS=m +CONFIG_SENSORS_AMS_I2C=y +CONFIG_SENSORS_AMS_PMU=y +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +CONFIG_SENSORS_LIS3LV02D=m +CONFIG_SENSORS_LIS3_SPI=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_MAX1111=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_PCA9539=m +CONFIG_SENSORS_PCF8574=m +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_ULTRA45=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +# CONFIG_SENSORS_W83L786NG is not set +CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250_CS=m +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_PCI=m +CONFIG_SERIAL_8250_PNP=m +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_ICOM is not set +CONFIG_SERIAL_JSM=m +CONFIG_SERIAL_MAX3100=m +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_SERIAL_OF_PLATFORM=m +CONFIG_SERIAL_PMACZILOG=m +# CONFIG_SERIAL_PMACZILOG_TTYS is not set +# CONFIG_SERIAL_SGI_IOC3 is not set +# CONFIG_SERIAL_SGI_IOC4 is not set +# CONFIG_SERIAL_SGI_L1_CONSOLE is not set +CONFIG_SERIAL_SUNCORE=y +CONFIG_SERIAL_SUNHV=y +CONFIG_SERIAL_SUNSAB=y +CONFIG_SERIAL_SUNSAB_CONSOLE=y +CONFIG_SERIAL_SUNSU=y +CONFIG_SERIAL_SUNSU_CONSOLE=y +CONFIG_SERIAL_SUNZILOG=y +CONFIG_SERIAL_SUNZILOG_CONSOLE=y +CONFIG_SERIAL_UARTLITE=m +CONFIG_SERIO=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_XILINX_XPS_PS2=m +CONFIG_SFC=m +CONFIG_SFC_MTD=y +CONFIG_SGI_IOC3=m +CONFIG_SGI_IOC4=m +CONFIG_SGI_SN=y +# CONFIG_SGI_SNSC is not set +# CONFIG_SGI_TIOCX is not set +CONFIG_SGI_XP=m +CONFIG_SHMEM=y +CONFIG_SIGMATEL_FIR=m +CONFIG_SIGNALFD=y +CONFIG_SIMPLE_GPIO=y +CONFIG_SIS190=m +CONFIG_SIS900=m +CONFIG_SKFP=m +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +CONFIG_SKY2=m +# CONFIG_SKY2_DEBUG is not set +# CONFIG_SLAB is not set +CONFIG_SLABINFO=y +CONFIG_SLHC=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +# CONFIG_SLOB is not set +CONFIG_SLOW_WORK=y +CONFIG_SLUB=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_SMC_IRCC_FIR=m +CONFIG_SMSC9420=m +CONFIG_SMSC_PHY=m +CONFIG_SMS_SDIO_DRV=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_USB_DRV=m +CONFIG_SND=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 +CONFIG_SND_AD1889=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_AOA=m +CONFIG_SND_AOA_FABRIC_LAYOUT=m +CONFIG_SND_AOA_ONYX=m +CONFIG_SND_AOA_SOUNDBUS=m +CONFIG_SND_AOA_SOUNDBUS_I2S=m +CONFIG_SND_AOA_TAS=m +CONFIG_SND_AOA_TOONIE=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +CONFIG_SND_BT87X_OVERCLOCK=y +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CS5530=m +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_DARLA24=m +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_ECHO3G=m +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_EMU10K1_SEQ=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +CONFIG_SND_FM801=m +CONFIG_SND_FM801_TEA575X=m +CONFIG_SND_FM801_TEA575X_BOOL=y +CONFIG_SND_GINA20=m +CONFIG_SND_GINA24=m +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_INTELHDMI=y +CONFIG_SND_HDA_CODEC_NVHDMI=y +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_ELD=y +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_JACK=y +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_POWER_SAVE=y +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +# CONFIG_SND_HDA_RECONFIG is not set +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +# CONFIG_SND_HIFIER is not set +CONFIG_SND_HRTIMER=m +CONFIG_SND_HWDEP=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGODJX=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_JACK=y +CONFIG_SND_KORG1212=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_LX6464ES=m +CONFIG_SND_MAESTRO3=m +CONFIG_SND_MIA=m +CONFIG_SND_MIXART=m +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_MONA=m +CONFIG_SND_MPU401=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_NM256=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL3_LIB_SEQ=m +# CONFIG_SND_OPL4_LIB_SEQ is not set +CONFIG_SND_OSSEMUL=y +# CONFIG_SND_OXYGEN is not set +CONFIG_SND_PCI=y +CONFIG_SND_PCM=m +CONFIG_SND_PCMCIA=y +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_PCXHR=m +CONFIG_SND_PDAUDIOCF=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_POWERMAC=m +CONFIG_SND_POWERMAC_AUTO_DRC=y +CONFIG_SND_PPC=y +CONFIG_SND_PS3=m +CONFIG_SND_PS3_DEFAULT_START_DELAY=2000 +CONFIG_SND_RAWMIDI=m +CONFIG_SND_RAWMIDI_SEQ=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SB16_DSP=m +# CONFIG_SND_SBAWE_SEQ is not set +CONFIG_SND_SB_COMMON=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_AD73311=m +CONFIG_SND_SOC_AK4104=m +CONFIG_SND_SOC_AK4535=m +CONFIG_SND_SOC_ALL_CODECS=m +CONFIG_SND_SOC_CS4270=m +CONFIG_SND_SOC_I2C_AND_SPI=m +CONFIG_SND_SOC_L3=m +CONFIG_SND_SOC_PCM3008=m +CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_SSM2602=m +CONFIG_SND_SOC_TLV320AIC23=m +CONFIG_SND_SOC_TLV320AIC26=m +CONFIG_SND_SOC_TLV320AIC3X=m +CONFIG_SND_SOC_TWL4030=m +CONFIG_SND_SOC_UDA134X=m +CONFIG_SND_SOC_UDA1380=m +CONFIG_SND_SOC_WM8350=m +CONFIG_SND_SOC_WM8400=m +CONFIG_SND_SOC_WM8510=m +CONFIG_SND_SOC_WM8580=m +CONFIG_SND_SOC_WM8728=m +CONFIG_SND_SOC_WM8731=m +CONFIG_SND_SOC_WM8750=m +CONFIG_SND_SOC_WM8753=m +CONFIG_SND_SOC_WM8900=m +CONFIG_SND_SOC_WM8903=m +CONFIG_SND_SOC_WM8940=m +CONFIG_SND_SOC_WM8960=m +CONFIG_SND_SOC_WM8971=m +CONFIG_SND_SOC_WM8988=m +CONFIG_SND_SOC_WM8990=m +CONFIG_SND_SOC_WM9081=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_SPARC=y +CONFIG_SND_SPI=y +CONFIG_SND_SUN_AMD7930=m +CONFIG_SND_SUN_CS4231=m +CONFIG_SND_SUN_DBRI=m +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_TIMER=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_USX2Y=m +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRMIDI=m +# CONFIG_SND_VIRTUOSO is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_VX222=m +CONFIG_SND_VXPOCKET=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_YMFPCI=m +CONFIG_SOC_CAMERA=m +CONFIG_SOC_CAMERA_MT9M001=m +CONFIG_SOC_CAMERA_MT9M111=m +CONFIG_SOC_CAMERA_MT9T031=m +CONFIG_SOC_CAMERA_MT9V022=m +CONFIG_SOC_CAMERA_OV772X=m +CONFIG_SOC_CAMERA_PLATFORM=m +CONFIG_SOC_CAMERA_TW9910=m +CONFIG_SOFT_WATCHDOG=m +CONFIG_SOUND=m +CONFIG_SOUND_AEDSP16=m +CONFIG_SOUND_DMAP=y +CONFIG_SOUND_KAHLUA=m +CONFIG_SOUND_MPU401=m +CONFIG_SOUND_MSS=m +CONFIG_SOUND_OSS=m +CONFIG_SOUND_OSS_CORE=y +CONFIG_SOUND_PAS=m +CONFIG_SOUND_PRIME=m +CONFIG_SOUND_PSS=m +CONFIG_SOUND_SB=m +CONFIG_SOUND_SSCAPE=m +# CONFIG_SOUND_TRACEINIT is not set +CONFIG_SOUND_TRIX=m +CONFIG_SOUND_UART6850=m +CONFIG_SOUND_VMIDI=m +CONFIG_SOUND_YM3812=m +CONFIG_SPARC=y +# CONFIG_SPARC32 is not set +CONFIG_SPARC64=y +# CONFIG_SPARC64_PAGE_SIZE_64KB is not set +CONFIG_SPARC64_PAGE_SIZE_8KB=y +CONFIG_SPARC64_PCI=y +CONFIG_SPARC64_SMP=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=m +CONFIG_SPI_BUTTERFLY=m +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_GPIO=m +CONFIG_SPI_LM70_LLP=m +CONFIG_SPI_MASTER=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPI_TLE62X0=m +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPU_BASE=y +CONFIG_SPU_FS=m +CONFIG_SPU_FS_64K_LS=y +# CONFIG_SPU_TRACE is not set +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_SSB=m +CONFIG_SSB_B43_PCI_BRIDGE=y +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB_SPROM=y +CONFIG_SSFDC=m +CONFIG_STACKTRACE=y +CONFIG_STACKTRACE_SUPPORT=y +# CONFIG_STACK_DEBUG is not set +# CONFIG_STACK_TRACER is not set +CONFIG_STAGING=y +CONFIG_STAGING_EXCLUDE_BUILD=y +CONFIG_STALDRV=y +CONFIG_STALLION=m +CONFIG_STANDALONE=y +CONFIG_STE10XP=m +CONFIG_STOP_MACHINE=y +CONFIG_STP=m +CONFIG_STRIP=m +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_SUNBMAC=m +CONFIG_SUNDANCE=m +CONFIG_SUNLANCE=m +CONFIG_SUNQE=m +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_XPRT_RDMA=m +CONFIG_SUNVDC=m +CONFIG_SUNVNET=m +CONFIG_SUN_LDOMS=y +CONFIG_SUN_OPENPROMFS=m +CONFIG_SUN_OPENPROMIO=y +CONFIG_SUN_PARTITION=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWAP=y +CONFIG_SWIOTLB=y +CONFIG_SX=m +CONFIG_SYNCLINK=m +CONFIG_SYNCLINKMP=m +CONFIG_SYNCLINK_CS=m +CONFIG_SYNCLINK_GT=m +CONFIG_SYN_COOKIES=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_SYSFS=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_SYSV68_PARTITION=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSV_FS=m +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TADPOLE_TS102_UCTRL=m +CONFIG_TASKSTATS=y +# CONFIG_TASK_DELAY_ACCT is not set +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_TASK_XACCT=y +CONFIG_TAU=y +# CONFIG_TAU_AVERAGE is not set +# CONFIG_TAU_INT is not set +CONFIG_TCG_ATMEL=m +# CONFIG_TCG_INFINEON is not set +CONFIG_TCG_NSC=m +# CONFIG_TCG_TIS is not set +CONFIG_TCG_TPM=m +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_MD5SIG=y +CONFIG_TEHUTI=m +CONFIG_TEKRAM_DONGLE=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_TEXTSEARCH_KMP=m +CONFIG_THERMAL_HWMON=y +CONFIG_THERM_ADT746X=m +CONFIG_THERM_WINDTUNNEL=m +CONFIG_THRUSTMASTER_FF=y +CONFIG_TICK_ONESHOT=y +CONFIG_TIFM_7XX1=m +CONFIG_TIFM_CORE=m +CONFIG_TIGON3=m +CONFIG_TIMERFD=y +CONFIG_TIMER_STATS=y +CONFIG_TIPC=m +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +CONFIG_TLAN=m +# CONFIG_TMD_HERMES is not set +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMS380TR=m +CONFIG_TMSPCI=m +CONFIG_TOIM3232_DONGLE=m +CONFIG_TOSHIBA_FIR=m +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_DA9034=m +CONFIG_TOUCHSCREEN_EETI=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_UCB1400=m +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_W90X900=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TRACEPOINTS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_TREE_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_TTPCI_EEPROM=m +CONFIG_TULIP=m +# CONFIG_TULIP_MMIO is not set +# CONFIG_TULIP_MWI is not set +CONFIG_TULIP_NAPI_HW_MITIGATION=y +# CONFIG_TUNE_CELL is not set +CONFIG_TWL4030_CORE=y +CONFIG_TWL4030_USB=m +CONFIG_TWL4030_WATCHDOG=m +CONFIG_TYPHOON=m +CONFIG_U3_DART=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +# CONFIG_UBIFS_FS_DEBUG is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UCB1400_CORE=m +CONFIG_UDBG_RTAS_CONSOLE=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_UFS_DEBUG is not set +# CONFIG_UFS_FS_WRITE is not set +CONFIG_UID16=y +CONFIG_UIO=m +CONFIG_UIO_AEC=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_SMX=m +CONFIG_ULI526X=m +CONFIG_UNIX=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNUSED_SYMBOLS=y +CONFIG_US3_MC=m +CONFIG_USBPCWATCHDOG=m +CONFIG_USB_ACM=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_ATM=m +CONFIG_USB_AUDIO=m +CONFIG_USB_BELKIN=y +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_C67X00_HCD=m +CONFIG_USB_CATC=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_CDC_PHONET=m +CONFIG_USB_CXACRU=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +# CONFIG_USB_DABUSB is not set +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_DSBR=m +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_EHCI_HCD_PPC_OF=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EMI26=m +CONFIG_USB_EMI62=m +CONFIG_USB_EPSON2888=y +CONFIG_USB_ET61X251=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_EZUSB=y +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_GADGETFS=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GOKU=m +CONFIG_USB_GPIO_VBUS=m +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SN9C20X=m +# CONFIG_USB_GSPCA_SN9C20X_EVDEV is not set +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_HID=m +CONFIG_USB_HSO=m +CONFIG_USB_HWA_HCD=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_IRDA=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_ISP116X_HCD=m +CONFIG_USB_ISP1760_HCD=m +CONFIG_USB_KAWETH=m +CONFIG_USB_KC2190=y +CONFIG_USB_LCD=m +CONFIG_USB_LD=m +CONFIG_USB_LED=m +CONFIG_USB_LEGOTOWER=m +# CONFIG_USB_LIBUSUAL is not set +CONFIG_USB_M5602=m +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_MR800=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_RNDIS_HOST=m +# CONFIG_USB_NET_RNDIS_WLAN is not set +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PPC_OF=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set +# CONFIG_USB_OHCI_HCD_SSB is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_OTG is not set +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_OV511 is not set +CONFIG_USB_OXU210HP_HCD=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_PRINTER=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_RIO500=m +CONFIG_USB_RTL8150=m +CONFIG_USB_S2255=m +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_DEBUG=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MOTOROLA=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIEMENS_MPI=m +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SEVSEG=m +# CONFIG_USB_SI470X is not set +CONFIG_USB_SISUSBVGA=m +# CONFIG_USB_SISUSBVGA_CON is not set +CONFIG_USB_SL811_CS=m +CONFIG_USB_SL811_HCD=m +CONFIG_USB_SN9C102=m +CONFIG_USB_SPEEDTOUCH=m +# CONFIG_USB_STKWEBCAM is not set +CONFIG_USB_STORAGE=m +CONFIG_USB_STORAGE_ALAUDA=m +CONFIG_USB_STORAGE_CYPRESS_ATACB=m +CONFIG_USB_STORAGE_DATAFAB=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_KARMA=m +CONFIG_USB_STORAGE_ONETOUCH=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STV06XX=m +CONFIG_USB_SUPPORT=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_TEST=m +CONFIG_USB_TMC=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_U132_HCD=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_USBNET=m +CONFIG_USB_USS720=m +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_VST=m +CONFIG_USB_W9968CF=m +CONFIG_USB_WDM=m +CONFIG_USB_WHCI_HCD=m +CONFIG_USB_WUSB=m +CONFIG_USB_WUSB_CBAF=m +# CONFIG_USB_WUSB_CBAF_DEBUG is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_HCD_DEBUGGING is not set +CONFIG_USB_XUSBATM=m +CONFIG_USB_ZC0301=m +CONFIG_USB_ZD1201=m +CONFIG_USB_ZERO=m +CONFIG_USB_ZR364XX=m +# CONFIG_USER_NS is not set +CONFIG_USER_SCHED=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +# CONFIG_UTS_NS is not set +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_I1480U=m +CONFIG_UWB_I1480U_WLP=m +CONFIG_UWB_WHCI=m +CONFIG_UWB_WLP=m +CONFIG_V4L_USB_DRIVERS=y +CONFIG_VERSION_SIGNATURE="" +CONFIG_VETH=m +CONFIG_VFAT_FS=m +CONFIG_VGASTATE=m +# CONFIG_VGA_CONSOLE is not set +CONFIG_VIA_FIR=m +CONFIG_VIA_RHINE=m +CONFIG_VIA_RHINE_MMIO=y +CONFIG_VIA_VELOCITY=m +CONFIG_VIDEOBUF_DMA_SG=m +CONFIG_VIDEOBUF_DVB=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_ADV7343=m +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_BT848_DVB=y +CONFIG_VIDEO_BTCX=m +CONFIG_VIDEO_CAFE_CCIC=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +CONFIG_VIDEO_CPIA_PP=m +CONFIG_VIDEO_CPIA_USB=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_CX18=m +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_CX23885=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +CONFIG_VIDEO_CX88_MPEG=m +CONFIG_VIDEO_CX88_VP3054=m +CONFIG_VIDEO_DEV=m +# CONFIG_VIDEO_EM28XX_ALSA is not set +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_FB_IVTV=m +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HDPVR=m +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set +CONFIG_VIDEO_HEXIUM_GEMINI=m +CONFIG_VIDEO_HEXIUM_ORION=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_MEDIA=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_MT9V011=m +# CONFIG_VIDEO_MXB is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +CONFIG_VIDEO_OV7670=m +CONFIG_VIDEO_PVRUSB2=m +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_PVRUSB2_DVB=y +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_SAA5246A=m +CONFIG_VIDEO_SAA6588=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_SAA7127=m +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_VIDEO_SAA717X=m +CONFIG_VIDEO_STRADIS=m +CONFIG_VIDEO_TCM825X=m +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_THS7303=m +CONFIG_VIDEO_TLV320AIC23B=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TVP514X=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_VIVI=m +CONFIG_VIDEO_VP27SMPX=m +CONFIG_VIDEO_WM8739=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_ZORAN=m +CONFIG_VIDEO_ZORAN_AVS6EYES=m +CONFIG_VIDEO_ZORAN_BUZ=m +CONFIG_VIDEO_ZORAN_DC10=m +CONFIG_VIDEO_ZORAN_DC30=m +CONFIG_VIDEO_ZORAN_LML33=m +CONFIG_VIDEO_ZORAN_LML33R10=m +CONFIG_VIDEO_ZORAN_ZR36060=m +# CONFIG_VIRQ_DEBUG is not set +CONFIG_VIRTIO=m +CONFIG_VIRTIO_BALLOON=m +CONFIG_VIRTIO_BLK=m +CONFIG_VIRTIO_CONSOLE=m +CONFIG_VIRTIO_NET=m +CONFIG_VIRTIO_PCI=m +CONFIG_VIRTIO_RING=m +CONFIG_VIRTUAL_MEM_MAP=y +CONFIG_VIRT_CPU_ACCOUNTING=y +CONFIG_VIRT_TO_BUS=y +CONFIG_VITESSE_PHY=m +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLSI_FIR=m +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VORTEX=m +# CONFIG_VSX is not set +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_VXFS_FS=m +CONFIG_VXGE=m +# CONFIG_VXGE_DEBUG_TRACE_ALL is not set +CONFIG_W1=m +CONFIG_W1_CON=y +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_MASTER_MATROX=m +CONFIG_W1_SLAVE_BQ27000=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +CONFIG_W1_SLAVE_DS2760=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_WANXL=m +CONFIG_WAN_ROUTER_DRIVERS=m +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CP1XXX=m +CONFIG_WATCHDOG_RIO=m +CONFIG_WATCHDOG_RTAS=m +CONFIG_WDTPCI=m +CONFIG_WIMAX=m +CONFIG_WIMAX_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M=m +CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M_SDIO=m +CONFIG_WIMAX_I2400M_USB=m +CONFIG_WINBOND_840=m +CONFIG_WINBOND_FIR=m +CONFIG_WINDFARM=m +CONFIG_WINDFARM_PM112=m +CONFIG_WINDFARM_PM121=m +CONFIG_WINDFARM_PM81=m +CONFIG_WINDFARM_PM91=m +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_WIRELESS_OLD_REGULATORY is not set +CONFIG_WL12XX=m +CONFIG_WLAN_80211=y +CONFIG_WLAN_PRE80211=y +CONFIG_WM8350_POWER=m +CONFIG_WM8350_WATCHDOG=m +# CONFIG_WORKQUEUE_TRACER is not set +CONFIG_X25_ASY=m +# CONFIG_XEN is not set +CONFIG_XFRM=y +CONFIG_XFRM_IPCOMP=m +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_USER=m +# CONFIG_XFS_DEBUG is not set +CONFIG_XFS_FS=m +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_RT=y +CONFIG_XICS=y +# CONFIG_XMON is not set +CONFIG_XOR_BLOCKS=m +CONFIG_YAM=m +CONFIG_YELLOWFIN=m +CONFIG_YENTA=m +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_ZEROPLUS_FF=y +CONFIG_ZISOFS=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA=y --- linux-fsl-imx51-2.6.31.orig/debian.master/config/powerpc/config.flavour.powerpc-smp +++ linux-fsl-imx51-2.6.31/debian.master/config/powerpc/config.flavour.powerpc-smp @@ -0,0 +1,49 @@ +# +# Config options for config.flavour.powerpc-smp automatically generated by splitconfig.pl +# +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_CFG80211_REG_DEBUG=y +# CONFIG_CRYPTO_LZO is not set +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +CONFIG_FLATMEM_MANUAL=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_GENERIC_TBSYNC=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +# CONFIG_HP_ILO is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_I2C_GPIO=m +CONFIG_KERNEL_START=0xc0000000 +# CONFIG_KGDB is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +# CONFIG_MMIO_NVRAM is not set +CONFIG_NR_CPUS=4 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_PCIEASPM=y +# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_PPC64 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_CELL is not set +CONFIG_PPC_INDIRECT_PCI=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC_MPC106=y +# CONFIG_RISCOM8 is not set +# CONFIG_RTAS_ERROR_LOGGING is not set +# CONFIG_SCHEDSTATS is not set +CONFIG_SCSI_LPFC_DEBUG_FS=y +CONFIG_SERIO_I8042=y +CONFIG_SMP=y +# CONFIG_SPARSEMEM_MANUAL is not set +# CONFIG_TPS65010 is not set +# CONFIG_UBIFS_FS is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_GADGET_GOKU=y +# CONFIG_USB_GADGET_NET2280 is not set +CONFIG_WORD_SIZE=32 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/powerpc/config.flavour.powerpc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/config/powerpc/config.flavour.powerpc64-smp @@ -0,0 +1,49 @@ +# +# Config options for config.flavour.powerpc64-smp automatically generated by splitconfig.pl +# +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ATA_NONSTANDARD=y +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CRYPTO_LZO=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_FORCE_MAX_ZONEORDER=13 +CONFIG_GENERIC_TBSYNC=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HP_ILO=m +CONFIG_HUGETLB_PAGE=y +# CONFIG_I2C_GPIO is not set +CONFIG_KERNEL_START=0xc000000000000000 +CONFIG_KGDB=y +CONFIG_LATENCYTOP=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MMIO_NVRAM=y +CONFIG_NR_CPUS=1024 +CONFIG_PAGE_OFFSET=0xc000000000000000 +# CONFIG_PCIEASPM is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PPC64=y +CONFIG_PPC_970_NAP=y +CONFIG_PPC_CELL=y +# CONFIG_PPC_INDIRECT_PCI is not set +CONFIG_PPC_MM_SLICES=y +# CONFIG_PPC_MPC106 is not set +CONFIG_RISCOM8=m +CONFIG_RTAS_ERROR_LOGGING=y +CONFIG_SCHEDSTATS=y +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +CONFIG_SERIO_I8042=m +CONFIG_SMP=y +CONFIG_SPARSEMEM_MANUAL=y +# CONFIG_TPS65010 is not set +CONFIG_UBIFS_FS=m +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_NET2280=y +CONFIG_WORD_SIZE=64 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/powerpc/config.flavour.powerpc +++ linux-fsl-imx51-2.6.31/debian.master/config/powerpc/config.flavour.powerpc @@ -0,0 +1,48 @@ +# +# Config options for config.flavour.powerpc automatically generated by splitconfig.pl +# +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CRYPTO_LZO=m +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +CONFIG_FLATMEM_MANUAL=y +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_GENERIC_TBSYNC is not set +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_HP_ILO=m +# CONFIG_HUGETLB_PAGE is not set +CONFIG_I2C_GPIO=m +CONFIG_KERNEL_START=0xc0000000 +CONFIG_KGDB=y +CONFIG_LATENCYTOP=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +# CONFIG_MMIO_NVRAM is not set +CONFIG_PAGE_OFFSET=0xc0000000 +# CONFIG_PCIEASPM is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_PPC64 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_CELL is not set +CONFIG_PPC_INDIRECT_PCI=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC_MPC106=y +CONFIG_RISCOM8=m +# CONFIG_RTAS_ERROR_LOGGING is not set +CONFIG_SCHEDSTATS=y +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +CONFIG_SERIO_I8042=m +# CONFIG_SMP is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_TPS65010=m +CONFIG_UBIFS_FS=m +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_NET2280=y +CONFIG_WORD_SIZE=32 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/powerpc/config.common.powerpc +++ linux-fsl-imx51-2.6.31/debian.master/config/powerpc/config.common.powerpc @@ -0,0 +1,259 @@ +# +# Config options for config.common.powerpc automatically generated by splitconfig.pl +# +# CONFIG_ACCESSIBILITY is not set +CONFIG_ACORN_PARTITION=y +CONFIG_AIC79XX_DEBUG_ENABLE=y +CONFIG_AIC79XX_REG_PRETTY_PRINT=y +# CONFIG_ALIM7101_WDT is not set +CONFIG_AMD8111_ETH=m +CONFIG_AMIGA_PARTITION=y +CONFIG_ARCNET=m +CONFIG_ATA=y +CONFIG_ATARI_PARTITION=y +CONFIG_BINARY_PRINTF=y +CONFIG_BLK_DEV_FD=m +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BONDING=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BSD_DISKLABEL=y +CONFIG_BT=m +CONFIG_CHR_DEV_SCH=m +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_PMAC64=y +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_TEST=m +# CONFIG_DAB is not set +CONFIG_DE2104X=m +CONFIG_DE4X5=m +# CONFIG_DECNET_ROUTER is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_DEFXX=m +CONFIG_DEV_APPLETALK=m +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_DM9102=m +# CONFIG_DMADEVICES is not set +CONFIG_DRM=m +CONFIG_DVB_CORE=m +CONFIG_ECONET=m +# CONFIG_EZX_PCAP is not set +CONFIG_FB_3DFX=y +CONFIG_FB_ASILIANT=y +CONFIG_FB_ATY=y +CONFIG_FB_ATY128=y +CONFIG_FB_CIRRUS=m +CONFIG_FB_IMSTT=y +CONFIG_FB_KYRO=m +CONFIG_FB_MACMODES=y +CONFIG_FB_MATROX=y +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +CONFIG_FB_PS3=y +CONFIG_FB_RIVA=m +CONFIG_FB_SIS=m +CONFIG_FB_TRIDENT=m +CONFIG_FB_VOODOO1=y +CONFIG_FORCEDETH=m +CONFIG_FUSION_MAX_SGE=128 +CONFIG_GAMEPORT=m +CONFIG_GELIC_NET=m +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_GPIO_SYSFS is not set +CONFIG_HAMACHI=m +CONFIG_HAMRADIO=y +CONFIG_HAPPYMEAL=m +CONFIG_HIPPI=y +CONFIG_HP100=m +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_I801=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m +CONFIG_I2C_VOODOO3=m +CONFIG_IDE=y +CONFIG_IEEE1394_PCILYNX=m +# CONFIG_IKCONFIG is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INFINIBAND_AMSO1100=m +# CONFIG_INFINIBAND_IPATH is not set +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFTL=m +CONFIG_INPUT_EVBUG=m +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_UINPUT=m +CONFIG_IP1000=m +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_POWEROFF=m +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IP_DCCP=m +CONFIG_IP_MROUTE=y +CONFIG_IP_NF_QUEUE=m +# CONFIG_IP_PNP is not set +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IRDA=m +# CONFIG_ISDN is not set +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_LAPB=m +CONFIG_LDM_PARTITION=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_PCA955X is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LLC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_MAC80211_MESH=y +CONFIG_MACVLAN=m +CONFIG_MAC_PARTITION=y +CONFIG_MARKERS=y +# CONFIG_MFD_SM501_GPIO is not set +CONFIG_MINIX_SUBPARTITION=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_VSXXXAA=m +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_NCPFS_SMALLDOS is not set +CONFIG_NET_IPGRE=m +CONFIG_NET_PKTGEN=m +# CONFIG_NIU is not set +CONFIG_NLS_DEFAULT="cp437" +CONFIG_OSF_PARTITION=y +CONFIG_PCI_MSI=y +CONFIG_PMAC_SMU=y +CONFIG_PPC_HAS_HASH_64K=y +CONFIG_PPC_MAPLE=y +CONFIG_PPC_PASEMI=y +CONFIG_PPC_PS3=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_PRISM54=m +CONFIG_PROFILING=y +CONFIG_PS3_VRAM=m +CONFIG_QFMT_V1=m +CONFIG_R8169=m +# CONFIG_RDS is not set +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_CMOS=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_PS3=m +# CONFIG_RTC_DRV_TEST is not set +CONFIG_SATA_SVW=y +CONFIG_SCHED_HRTICK=y +CONFIG_SCSI=y +CONFIG_SCSI_AIC7XXX=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_DC390T=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_FUTURE_DOMAIN=m +CONFIG_SCSI_IPS=m +CONFIG_SCSI_LOGGING=y +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83L785TS=m +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_CORE=m +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SGI_PARTITION=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_SPECIALIX=m +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_SUNGEM=m +# CONFIG_TABLET_USB_WACOM is not set +# CONFIG_THERMAL is not set +CONFIG_THERM_PM72=m +CONFIG_TR=y +# CONFIG_TULIP_NAPI is not set +CONFIG_TUN=m +CONFIG_UFS_FS=m +CONFIG_ULTRIX_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=m +CONFIG_USB_HIDDEV=y +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_MON=y +CONFIG_USB_NET2280=m +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_PWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_SE401=m +CONFIG_USB_STV680=m +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_VICAM=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT848=m +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_BT866=m +CONFIG_VIDEO_BWQCAM=m +CONFIG_VIDEO_CPIA=m +CONFIG_VIDEO_CPIA2=m +CONFIG_VIDEO_CQCAM=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_KS0127=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_VIDEO_SAA5249=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_SAA7191=m +CONFIG_VIDEO_TDA7432=m +CONFIG_VIDEO_TDA9875=m +CONFIG_VIDEO_TVAUDIO=m +CONFIG_VIDEO_VPX3220=m +CONFIG_VIDEO_W9966=m +CONFIG_VIRTUALIZATION=y +CONFIG_WAN=y +CONFIG_WAN_ROUTER=m +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_X25=m +CONFIG_ZONE_DMA_FLAG=1 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/sparc/config.flavour.sparc64 +++ linux-fsl-imx51-2.6.31/debian.master/config/sparc/config.flavour.sparc64 @@ -0,0 +1,4 @@ +# +# Config options for config.flavour.sparc64 automatically generated by splitconfig.pl +# +# CONFIG_SMP is not set --- linux-fsl-imx51-2.6.31.orig/debian.master/config/sparc/config.flavour.sparc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/config/sparc/config.flavour.sparc64-smp @@ -0,0 +1,4 @@ +# +# Config options for config.flavour.sparc64-smp automatically generated by splitconfig.pl +# +CONFIG_SMP=y --- linux-fsl-imx51-2.6.31.orig/debian.master/config/sparc/config.common.sparc +++ linux-fsl-imx51-2.6.31/debian.master/config/sparc/config.common.sparc @@ -0,0 +1,300 @@ +# +# Config options for config.common.sparc automatically generated by splitconfig.pl +# +CONFIG_ACCESSIBILITY=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIC79XX_DEBUG_ENABLE is not set +# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set +CONFIG_ALIM7101_WDT=m +# CONFIG_AMD8111_ETH is not set +# CONFIG_AMIGA_PARTITION is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +# CONFIG_ARCNET is not set +CONFIG_ATA=m +# CONFIG_ATARI_PARTITION is not set +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_BINARY_PRINTF=y +CONFIG_BLK_DEV_FD=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_BONDING=m +CONFIG_BRIDGE_NF_EBTABLES=m +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_BT is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_FREQ_PMAC64 is not set +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_LZO=m +# CONFIG_CRYPTO_TEST is not set +# CONFIG_DAB is not set +# CONFIG_DE2104X is not set +# CONFIG_DE4X5 is not set +CONFIG_DECNET_ROUTER=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_DEFXX is not set +# CONFIG_DEV_APPLETALK is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_DM9102 is not set +CONFIG_DMADEVICES=y +CONFIG_DRM=y +# CONFIG_DVB_CORE is not set +# CONFIG_ECONET is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_ASILIANT is not set +CONFIG_FB_ATY=y +CONFIG_FB_ATY128=y +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_NEOMAGIC is not set +CONFIG_FB_PM2=y +# CONFIG_FB_PM2_FIFO_DISCONNECT is not set +# CONFIG_FB_PS3 is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_SIS is not set +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_FORCEDETH is not set +CONFIG_FUSION_MAX_SGE=40 +# CONFIG_GAMEPORT is not set +# CONFIG_GELIC_NET is not set +CONFIG_GPIO_SYSFS=y +# CONFIG_HAMACHI is not set +# CONFIG_HAMRADIO is not set +CONFIG_HAPPYMEAL=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_HIPPI is not set +# CONFIG_HP100 is not set +# CONFIG_HP_ILO is not set +CONFIG_HUGETLB_PAGE=y +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_IDE is not set +CONFIG_IEEE1394_PCILYNX=m +# CONFIG_IKCONFIG is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INFINIBAND_AMSO1100=m +CONFIG_INFINIBAND_IPATH=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFTL=m +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_UINPUT is not set +CONFIG_IP1000=m +CONFIG_IPMI_HANDLER=m +# CONFIG_IPMI_POWEROFF is not set +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IP_DCCP=m +# CONFIG_IP_MROUTE is not set +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_PNP=y +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_IRDA is not set +CONFIG_ISDN=y +CONFIG_ISDN_DRV_GIGASET=m +CONFIG_KERNEL_START=0xc0000000 +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_KEYBOARD_SUNKBD=y +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KGDB is not set +# CONFIG_LAPB is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_LDM_PARTITION is not set +CONFIG_LEDS_CLASS=m +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_PCA955X=m +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LLC=m +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +# CONFIG_MAC80211_MESH is not set +CONFIG_MACVLAN=m +# CONFIG_MAC_PARTITION is not set +CONFIG_MARKERS=y +CONFIG_MFD_SM501_GPIO=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_MMIO_NVRAM is not set +CONFIG_MOUSE_SERIAL=y +# CONFIG_MOUSE_VSXXXAA is not set +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_NCPFS_SMALLDOS=y +# CONFIG_NET_IPGRE is not set +# CONFIG_NET_PKTGEN is not set +CONFIG_NIU=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NR_CPUS=256 +# CONFIG_OSF_PARTITION is not set +CONFIG_PAGE_OFFSET=0xc0000000 +# CONFIG_PCI_MSI is not set +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PMAC_SMU is not set +# CONFIG_PPC64 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_HAS_HASH_64K is not set +CONFIG_PPC_INDIRECT_PCI=y +# CONFIG_PPC_MAPLE is not set +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC_MPC106=y +# CONFIG_PPC_PASEMI is not set +# CONFIG_PPC_PS3 is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PRISM54 is not set +# CONFIG_PROFILING is not set +# CONFIG_PS3_VRAM is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_R8169 is not set +CONFIG_RDS=m +# CONFIG_RISCOM8 is not set +# CONFIG_RTAS_ERROR_LOGGING is not set +CONFIG_RTC_DRV_BQ4802=y +CONFIG_RTC_DRV_CMOS=y +CONFIG_RTC_DRV_M48T59=y +# CONFIG_RTC_DRV_PS3 is not set +CONFIG_RTC_DRV_TEST=m +CONFIG_SATA_SVW=m +# CONFIG_SCHEDSTATS is not set +CONFIG_SCHED_HRTICK=y +CONFIG_SCSI=m +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83L785TS is not set +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_CORE=y +CONFIG_SERIO_I8042=y +# CONFIG_SERIO_PARKBD is not set +CONFIG_SERIO_PCIPS2=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_SLIP_MODE_SLIP6 is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +CONFIG_SPARSEMEM_MANUAL=y +# CONFIG_SPECIALIX is not set +CONFIG_SUNDANCE_MMIO=y +CONFIG_SUNGEM=y +# CONFIG_TABLET_USB_WACOM is not set +# CONFIG_THERMAL is not set +# CONFIG_THERM_PM72 is not set +CONFIG_TPS65010=m +# CONFIG_TR is not set +CONFIG_TULIP_NAPI=y +CONFIG_TUN=m +CONFIG_UBIFS_FS=m +CONFIG_UFS_FS=m +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +CONFIG_USB=m +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_NET2280=y +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +CONFIG_USB_MON=m +CONFIG_USB_NET2280=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_PWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_STV680 is not set +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_VICAM is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_BWQCAM is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_CQCAM is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_VPX3220 is not set +# CONFIG_VIDEO_W9966 is not set +# CONFIG_WAN is not set +# CONFIG_WAN_ROUTER is not set +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WORD_SIZE=32 +# CONFIG_X25 is not set +CONFIG_ZONE_DMA_FLAG=0 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/amd64/config.common.amd64 +++ linux-fsl-imx51-2.6.31/debian.master/config/amd64/config.common.amd64 @@ -0,0 +1,51 @@ +# +# Config options for config.common.amd64 automatically generated by splitconfig.pl +# +CONFIG_64BIT=y +CONFIG_ACPI_BLACKLIST_YEAR=0 +CONFIG_AGP=y +CONFIG_AGP_AMD64=y +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +# CONFIG_ASYNC_TX_DMA is not set +CONFIG_AUDIT_ARCH=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_GENERIC_CPU=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_HAVE_AOUT is not set +CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_HZ=100 +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_HELPER=y +# CONFIG_KTIME_SCALAR is not set +CONFIG_LOG_BUF_SHIFT=18 +# CONFIG_M486 is not set +# CONFIG_M586 is not set +# CONFIG_M586TSC is not set +CONFIG_NR_CPUS=64 +CONFIG_OUTPUT_FORMAT="elf64-x86-64" +CONFIG_PATA_CMD640_PCI=m +CONFIG_PATA_HPT37X=y +CONFIG_PATA_HPT3X2N=m +CONFIG_PATA_OLDPIIX=y +CONFIG_PHYSICAL_ALIGN=0x1000000 +CONFIG_PHYSICAL_START=0x200000 +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_SATA_SX4=y +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SYS_HYPERVISOR=y +# CONFIG_X86_32 is not set +CONFIG_X86_64=y +CONFIG_X86_CPU_DEBUG=m +CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_MINIMUM_CPU_FAMILY=64 +CONFIG_X86_SPEEDSTEP_LIB=m +CONFIG_ZONE_DMA32=y --- linux-fsl-imx51-2.6.31.orig/debian.master/config/amd64/config.flavour.server +++ linux-fsl-imx51-2.6.31/debian.master/config/amd64/config.flavour.server @@ -0,0 +1,8 @@ +# +# Config options for config.flavour.server automatically generated by splitconfig.pl +# +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_DEADLINE=y +CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set --- linux-fsl-imx51-2.6.31.orig/debian.master/config/amd64/config.flavour.generic +++ linux-fsl-imx51-2.6.31/debian.master/config/amd64/config.flavour.generic @@ -0,0 +1,8 @@ +# +# Config options for config.flavour.generic automatically generated by splitconfig.pl +# +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y --- linux-fsl-imx51-2.6.31.orig/debian.master/config/i386/config.flavour.generic +++ linux-fsl-imx51-2.6.31/debian.master/config/i386/config.flavour.generic @@ -0,0 +1,15 @@ +# +# Config options for config.flavour.generic automatically generated by splitconfig.pl +# +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_HIGHMEM4G=y +# CONFIG_HIGHMEM64G is not set +# CONFIG_M486 is not set +CONFIG_M586=y +# CONFIG_M586TSC is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_X86_L1_CACHE_SHIFT=5 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/i386/config.common.i386 +++ linux-fsl-imx51-2.6.31/debian.master/config/i386/config.common.i386 @@ -0,0 +1,46 @@ +# +# Config options for config.common.i386 automatically generated by splitconfig.pl +# +# CONFIG_64BIT is not set +CONFIG_ACPI_BLACKLIST_YEAR=2000 +CONFIG_AGP=m +CONFIG_AGP_AMD64=m +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +CONFIG_ASYNC_TX_DMA=y +# CONFIG_AUDIT_ARCH is not set +CONFIG_FLATMEM_MANUAL=y +# CONFIG_GENERIC_CPU is not set +# CONFIG_GENERIC_TIME_VSYSCALL is not set +CONFIG_HAVE_AOUT=y +# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_IOMMU_API is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_KTIME_SCALAR=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_NR_CPUS=8 +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_PATA_CMD640_PCI=y +CONFIG_PATA_HPT37X=m +CONFIG_PATA_HPT3X2N=y +CONFIG_PATA_OLDPIIX=m +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_PHYSICAL_START=0x100000 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_REGULATOR_DEBUG=y +# CONFIG_RWSEM_GENERIC_SPINLOCK is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SATA_SX4=m +CONFIG_SND_OPL4_LIB_SEQ=m +CONFIG_SND_SBAWE_SEQ=m +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_X86_32=y +# CONFIG_X86_64 is not set +# CONFIG_X86_CPU_DEBUG is not set +CONFIG_X86_MINIMUM_CPU_FAMILY=4 +CONFIG_X86_SPEEDSTEP_LIB=y +# CONFIG_ZONE_DMA32 is not set --- linux-fsl-imx51-2.6.31.orig/debian.master/config/i386/config.flavour.generic-pae +++ linux-fsl-imx51-2.6.31/debian.master/config/i386/config.flavour.generic-pae @@ -0,0 +1,15 @@ +# +# Config options for config.flavour.generic-pae automatically generated by splitconfig.pl +# +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_HIGHMEM4G is not set +CONFIG_HIGHMEM64G=y +# CONFIG_M486 is not set +# CONFIG_M586 is not set +CONFIG_M586TSC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_SYS_HYPERVISOR=y +CONFIG_X86_L1_CACHE_SHIFT=5 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/i386/config.flavour.386 +++ linux-fsl-imx51-2.6.31/debian.master/config/i386/config.flavour.386 @@ -0,0 +1,15 @@ +# +# Config options for config.flavour.386 automatically generated by splitconfig.pl +# +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_DEADLINE=y +CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_HIGHMEM4G=y +# CONFIG_HIGHMEM64G is not set +CONFIG_M486=y +# CONFIG_M586 is not set +# CONFIG_M586TSC is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_X86_L1_CACHE_SHIFT=4 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/lpia/config.flavour.lpia +++ linux-fsl-imx51-2.6.31/debian.master/config/lpia/config.flavour.lpia @@ -0,0 +1,3 @@ +# +# Config options for config.flavour.lpia automatically generated by splitconfig.pl +# --- linux-fsl-imx51-2.6.31.orig/debian.master/config/lpia/config.common.lpia +++ linux-fsl-imx51-2.6.31/debian.master/config/lpia/config.common.lpia @@ -0,0 +1,58 @@ +# +# Config options for config.common.lpia automatically generated by splitconfig.pl +# +# CONFIG_64BIT is not set +CONFIG_ACPI_BLACKLIST_YEAR=2000 +CONFIG_AGP=m +CONFIG_AGP_AMD64=m +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ASYNC_TX_DMA=y +# CONFIG_AUDIT_ARCH is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FLATMEM_MANUAL=y +# CONFIG_GENERIC_CPU is not set +# CONFIG_GENERIC_TIME_VSYSCALL is not set +CONFIG_HAVE_AOUT=y +# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HIGHMEM4G=y +# CONFIG_HIGHMEM64G is not set +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_IOMMU_API is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_KTIME_SCALAR=y +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_M486 is not set +CONFIG_M586=y +# CONFIG_M586TSC is not set +CONFIG_NR_CPUS=8 +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_PATA_CMD640_PCI=y +CONFIG_PATA_HPT37X=m +CONFIG_PATA_HPT3X2N=y +CONFIG_PATA_OLDPIIX=m +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_PHYSICAL_START=0x100000 +# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_REGULATOR_DEBUG=y +# CONFIG_RWSEM_GENERIC_SPINLOCK is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SATA_SX4=m +CONFIG_SND_OPL4_LIB_SEQ=m +CONFIG_SND_SBAWE_SEQ=m +# CONFIG_SPARSEMEM_MANUAL is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_X86_32=y +# CONFIG_X86_64 is not set +# CONFIG_X86_CPU_DEBUG is not set +CONFIG_X86_L1_CACHE_SHIFT=5 +CONFIG_X86_MINIMUM_CPU_FAMILY=4 +CONFIG_X86_SPEEDSTEP_LIB=y +# CONFIG_ZONE_DMA32 is not set --- linux-fsl-imx51-2.6.31.orig/debian.master/config/ia64/config.common.ia64 +++ linux-fsl-imx51-2.6.31/debian.master/config/ia64/config.common.ia64 @@ -0,0 +1,293 @@ +# +# Config options for config.common.ia64 automatically generated by splitconfig.pl +# +CONFIG_ACCESSIBILITY=y +CONFIG_ACORN_PARTITION=y +CONFIG_AIC79XX_DEBUG_ENABLE=y +CONFIG_AIC79XX_REG_PRETTY_PRINT=y +# CONFIG_ALIM7101_WDT is not set +CONFIG_AMD8111_ETH=m +CONFIG_AMIGA_PARTITION=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARCNET=m +CONFIG_ATA=m +CONFIG_ATARI_PARTITION=y +CONFIG_ATA_NONSTANDARD=y +# CONFIG_BINARY_PRINTF is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_BONDING is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +CONFIG_BSD_DISKLABEL=y +CONFIG_BT=m +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CHR_DEV_SCH=m +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_PMAC64 is not set +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_TEST=m +CONFIG_DAB=y +CONFIG_DE2104X=m +CONFIG_DE4X5=m +# CONFIG_DECNET_ROUTER is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_DEFXX=m +CONFIG_DEV_APPLETALK=m +CONFIG_DISCONTIGMEM_MANUAL=y +CONFIG_DM9102=m +CONFIG_DMADEVICES=y +CONFIG_DRM=m +CONFIG_DVB_CORE=m +CONFIG_ECONET=m +CONFIG_EZX_PCAP=y +CONFIG_FB_3DFX=y +CONFIG_FB_ASILIANT=y +CONFIG_FB_ATY=m +CONFIG_FB_ATY128=m +CONFIG_FB_CIRRUS=m +CONFIG_FB_IMSTT=y +CONFIG_FB_KYRO=m +# CONFIG_FB_MACMODES is not set +CONFIG_FB_MATROX=y +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +# CONFIG_FB_PS3 is not set +CONFIG_FB_RIVA=m +CONFIG_FB_SIS=m +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +CONFIG_FB_TRIDENT=m +CONFIG_FB_VOODOO1=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_FORCEDETH=m +CONFIG_FORCE_MAX_ZONEORDER=17 +CONFIG_FUSION_MAX_SGE=128 +CONFIG_GAMEPORT=m +# CONFIG_GELIC_NET is not set +CONFIG_GENERIC_IOMAP=y +CONFIG_HAMACHI=m +CONFIG_HAMRADIO=y +CONFIG_HAPPYMEAL=m +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HIPPI=y +CONFIG_HP100=m +CONFIG_HP_ILO=m +CONFIG_HUGETLB_PAGE=y +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_I801=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m +CONFIG_I2C_VOODOO3=m +# CONFIG_IDE is not set +# CONFIG_IEEE1394_PCILYNX is not set +CONFIG_IKCONFIG=y +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INFINIBAND_AMSO1100 is not set +# CONFIG_INFINIBAND_IPATH is not set +# CONFIG_INFINIBAND_IPOIB_CM is not set +# CONFIG_INFINIBAND_ISER is not set +# CONFIG_INFINIBAND_SRP is not set +# CONFIG_INFINIBAND_USER_ACCESS is not set +# CONFIG_INFINIBAND_USER_MAD is not set +# CONFIG_INFTL is not set +CONFIG_INPUT_EVBUG=m +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_UINPUT=m +# CONFIG_IP1000 is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_MROUTE=y +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_PNP is not set +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IRDA=m +CONFIG_ISDN=y +# CONFIG_ISDN_DRV_GIGASET is not set +CONFIG_KERNEL_START=0xc0000000 +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_LAPB=m +CONFIG_LDM_PARTITION=y +CONFIG_LEDS_CLASS=m +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_PCA955X=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LLC=y +CONFIG_LOG_BUF_SHIFT=20 +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_MAC80211_MESH=y +# CONFIG_MACVLAN is not set +CONFIG_MAC_PARTITION=y +# CONFIG_MARKERS is not set +CONFIG_MINIX_SUBPARTITION=y +# CONFIG_MMIO_NVRAM is not set +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_VSXXXAA=m +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_NCPFS_SMALLDOS is not set +CONFIG_NET_IPGRE=m +CONFIG_NET_PKTGEN=m +# CONFIG_NIU is not set +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NR_CPUS=4096 +CONFIG_OSF_PARTITION=y +CONFIG_PAGE_OFFSET=0xc0000000 +# CONFIG_PCIEASPM is not set +CONFIG_PCI_MSI=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PPC64 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_HAS_HASH_64K is not set +CONFIG_PPC_INDIRECT_PCI=y +# CONFIG_PPC_MAPLE is not set +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC_MPC106=y +# CONFIG_PPC_PASEMI is not set +# CONFIG_PPC_PS3 is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_PRISM54=m +CONFIG_PROFILING=y +# CONFIG_PS3_VRAM is not set +CONFIG_QFMT_V1=m +CONFIG_R8169=m +CONFIG_RDS=m +CONFIG_RISCOM8=m +# CONFIG_RTAS_ERROR_LOGGING is not set +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_M48T59=m +# CONFIG_RTC_DRV_PS3 is not set +# CONFIG_RTC_DRV_TEST is not set +CONFIG_SATA_SVW=m +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_HRTICK is not set +CONFIG_SCSI=m +CONFIG_SCSI_AIC7XXX=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_DC390T=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_FUTURE_DOMAIN=m +CONFIG_SCSI_IPS=m +CONFIG_SCSI_LOGGING=y +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83L785TS=m +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_CORE=m +CONFIG_SERIO_I8042=y +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SGI_PARTITION=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_SMP=y +CONFIG_SOLARIS_X86_PARTITION=y +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_SPECIALIX=m +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_SUNGEM=m +CONFIG_TABLET_USB_WACOM=m +CONFIG_THERMAL=m +CONFIG_TR=y +# CONFIG_TULIP_NAPI is not set +# CONFIG_TUN is not set +CONFIG_UBIFS_FS=m +# CONFIG_UFS_FS is not set +CONFIG_ULTRIX_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=m +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_NET2280=y +CONFIG_USB_HIDDEV=y +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_MON=y +CONFIG_USB_NET2280=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_PWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_SE401=m +CONFIG_USB_STV680=m +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_VICAM=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT848=m +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_BT866=m +CONFIG_VIDEO_BWQCAM=m +CONFIG_VIDEO_CPIA=m +CONFIG_VIDEO_CPIA2=m +CONFIG_VIDEO_CQCAM=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_KS0127=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_VIDEO_SAA5249=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_SAA7191=m +CONFIG_VIDEO_TDA7432=m +CONFIG_VIDEO_TDA9875=m +CONFIG_VIDEO_TVAUDIO=m +CONFIG_VIDEO_VPX3220=m +CONFIG_VIDEO_W9966=m +# CONFIG_VIRTUALIZATION is not set +CONFIG_WAN=y +CONFIG_WAN_ROUTER=m +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WORD_SIZE=32 +CONFIG_X25=m +CONFIG_ZONE_DMA_FLAG=1 --- linux-fsl-imx51-2.6.31.orig/debian.master/config/ia64/config.flavour.ia64 +++ linux-fsl-imx51-2.6.31/debian.master/config/ia64/config.flavour.ia64 @@ -0,0 +1,3 @@ +# +# Config options for config.flavour.ia64 automatically generated by splitconfig.pl +# --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.powerpc +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.powerpc @@ -0,0 +1,6 @@ +supported="32-bit PowerPC" +target="Geared toward desktop or server systems." +desc="32-bit PowerPC" +bootloader="yaboot" +provides="redhat-cluster-modules, ivtv-modules" +arch="powerpc" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.386 +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.386 @@ -0,0 +1,6 @@ +arch="i386" +supported="Alternate x86 (486 and better)" +target="Geared toward desktop systems." +desc="i386" +bootloader="grub-pc | grub | lilo (>= 19.1)" +provides="kvm-api-4, ivtv-modules" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.generic-pae +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.generic-pae @@ -0,0 +1,6 @@ +arch="i386" +supported="Generic" +target="Geared toward 32 bit desktop systems with more then 4GB RAM." +desc="x86" +bootloader="grub-pc | grub | lilo (>= 19.1)" +provides="kvm-api-4, redhat-cluster-modules, ivtv-modules, ndiswrapper-modules-1.9" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.generic +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.generic @@ -0,0 +1,6 @@ +arch="i386 amd64" +supported="Generic" +target="Geared toward desktop systems." +desc="x86/x86_64" +bootloader="grub-pc | grub | lilo (>= 19.1)" +provides="kvm-api-4, redhat-cluster-modules, ivtv-modules, ndiswrapper-modules-1.9" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.sparc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.sparc64-smp @@ -0,0 +1,6 @@ +supported="64-bit UltraSPARC SMP" +target="Geared toward desktop or server systems." +desc="64-bit UltraSPARC SMP" +bootloader="silo" +provides="redhat-cluster-modules, ivtv-modules" +arch="sparc" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/flavour-control.stub +++ linux-fsl-imx51-2.6.31/debian.master/control.d/flavour-control.stub @@ -0,0 +1,76 @@ +# Items that get replaced: +# FLAVOUR +# DESC +# ARCH +# SUPPORTED +# TARGET +# BOOTLOADER +# =PROVIDES= +# +# Items marked with =FOO= are optional +# +# This file describes the template for packages that are created for each flavour +# in debian/control.d/vars.* +# +# This file gets edited in a couple of places. See the debian/control.stub rule in +# debian/rules. PGGVER, ABINUM, and SRCPKGNAME are all converted in the +# process of creating debian/control. +# +# The flavour specific strings (ARCH, DESC, etc) are converted using values from the various +# flavour files in debian/control.d/vars.* +# +# XXX: Leave the blank line before the first package!! + +Package: linux-image-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES= +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda +Conflicts: hotplug (<< 0.0.20040105-1) +Recommends: BOOTLOADER +Suggests: fdutils, SRCPKGNAME-doc-PKGVER | SRCPKGNAME-source-PKGVER +Description: Linux kernel image for version PKGVER on DESC + This package contains the Linux kernel image for version PKGVER on + DESC. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports SUPPORTED processors. + . + TARGET + . + You likely do not want to install this package directly. Instead, install + the linux-FLAVOUR meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. + +Package: linux-headers-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0), linux-headers-PKGVER-ABINUM, ${shlibs:Depends} +Provides: linux-headers, linux-headers-2.6 +Description: Linux kernel headers for version PKGVER on DESC + This package provides kernel header files for version PKGVER on + DESC. + . + This is for sites that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-PKGVER-ABINUM/debian.README.gz for details. + +Package: linux-image-debug-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: devel +Priority: optional +Provides: linux-debug +Description: Linux kernel debug image for version PKGVER on DESC + This package provides a kernel debug image for version PKGVER on + DESC. + . + This is for sites that wish to debug the kernel. + . + The kernel image contained in this package is NOT meant to boot from. It + is uncompressed, and unstripped. This package also includes the + unstripped modules. --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.sparc64 +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.sparc64 @@ -0,0 +1,6 @@ +supported="64-bit UltraSPARC" +target="Geared toward desktop or server systems." +desc="64-bit UltraSPARC" +bootloader="silo" +provides="redhat-cluster-modules, ivtv-modules" +arch="sparc" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.powerpc-smp +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.powerpc-smp @@ -0,0 +1,6 @@ +supported="32-bit PowerPC SMP" +target="Geared toward desktop or server systems." +desc="32-bit PowerPC SMP" +bootloader="yaboot" +provides="redhat-cluster-modules, ivtv-modules" +arch="powerpc" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.ia64 +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.ia64 @@ -0,0 +1,6 @@ +supported="IA-64 SMP" +target="Geared toward desktop or server systems." +desc="IA-64 SMP" +bootloader="elilo (>= 3.6-1)" +provides="redhat-cluster-modules, ivtv-modules" +arch="ia64" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.lpia +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.lpia @@ -0,0 +1,8 @@ +arch="lpia" +supported="Intel Atom" +desc="Intel Atom processors" +target="Geared toward LPIA-based mobile devices" +bootloader="grub-pc | grub | lilo (>= 19.1)" +provides="kvm-api-4, redhat-cluster-modules" +section_image="universe/admin" +do_debug="Yes" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.powerpc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.powerpc64-smp @@ -0,0 +1,6 @@ +supported="64-bit PowerPC SMP" +target="Geared toward desktop or server systems." +desc="64-bit PowerPC SMP" +bootloader="yaboot" +provides="redhat-cluster-modules, ivtv-modules" +arch="powerpc" --- linux-fsl-imx51-2.6.31.orig/debian.master/control.d/vars.server +++ linux-fsl-imx51-2.6.31/debian.master/control.d/vars.server @@ -0,0 +1,6 @@ +arch="amd64" +supported="Server" +target="Geared toward 64 bit server systems." +desc="x86_64" +bootloader="grub-pc | grub | lilo (>= 19.1)" +provides="redhat-cluster-modules, kvm-api-4, ivtv-modules, ndiswrapper-modules-1.9" --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/control-create +++ linux-fsl-imx51-2.6.31/debian.master/scripts/control-create @@ -0,0 +1,25 @@ +#!/bin/bash + +. debian/debian.env + +vars=$1 + +. $vars + +if [ "$is_sub" = "" ]; then + flavour=$(basename $vars | sed 's/.*\.//') + stub=${DEBIAN}/control.d/flavour-control.stub +else + flavour=$(basename $vars .vars) + stub=${DEBIAN}/sub-flavours/control.stub +fi + +cat $stub | grep -v '^#' | sed \ + -e "s#FLAVOUR#$flavour#g" \ + -e "s#DESC#$desc#g" \ + -e "s#ARCH#$arch#g" \ + -e "s#SUPPORTED#$supported#g" \ + -e "s#TARGET#$target#g" \ + -e "s#BOOTLOADER#$bootloader#g" \ + -e "s#=PROVIDES=#$provides#g" \ + -e "s#=CONFLICTS=#$conflicts#g" --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/abi-check +++ linux-fsl-imx51-2.6.31/debian.master/scripts/abi-check @@ -0,0 +1,210 @@ +#!/usr/bin/perl -w + +my $flavour = shift; +my $prev_abinum = shift; +my $abinum = shift; +my $prev_abidir = shift; +my $abidir = shift; +my $skipabi = shift; + +my $fail_exit = 1; +my $EE = "EE:"; +my $errors = 0; +my $abiskip = 0; + +my $count; + +print "II: Checking ABI for $flavour...\n"; + +if (-f "$prev_abidir/ignore" + or -f "$prev_abidir/$flavour.ignore" or "$skipabi" eq "true") { + print "WW: Explicitly asked to ignore ABI, running in no-fail mode\n"; + $fail_exit = 0; + $abiskip = 1; + $EE = "WW:"; +} + +if ($prev_abinum != $abinum) { + print "II: Different ABI's, running in no-fail mode\n"; + $fail_exit = 0; + $EE = "WW:"; +} + +if (not -f "$abidir/$flavour" or not -f "$prev_abidir/$flavour") { + print "EE: Previous or current ABI file missing!\n"; + print " $abidir/$flavour\n" if not -f "$abidir/$flavour"; + print " $prev_abidir/$flavour\n" if not -f "$prev_abidir/$flavour"; + + # Exit if the ABI files are missing, but return status based on whether + # skip ABI was indicated. + if ("$abiskip" eq "1") { + exit(0); + } else { + exit(1); + } +} + +my %symbols; +my %symbols_ignore; +my %modules_ignore; +my %module_syms; + +# See if we have any ignores +my $ignore = 0; +print " Reading symbols/modules to ignore..."; + +for $file ("$prev_abidir/../blacklist", "$prev_abidir/../../perm-blacklist") { + if (-f $file) { + open(IGNORE, "< $file") or + die "Could not open $file"; + while () { + chomp; + if ($_ =~ m/M: (.*)/) { + $modules_ignore{$1} = 1; + } else { + $symbols_ignore{$_} = 1; + } + $ignore++; + } + close(IGNORE); + } +} +print "read $ignore symbols/modules.\n"; + +sub is_ignored($$) { + my ($mod, $sym) = @_; + + die "Missing module name in is_ignored()" if not defined($mod); + die "Missing symbol name in is_ignored()" if not defined($sym); + + if (defined($symbols_ignore{$sym}) or defined($modules_ignore{$mod})) { + return 1; + } + return 0; +} + +# Read new syms first +print " Reading new symbols ($abinum)..."; +$count = 0; +open(NEW, "< $abidir/$flavour") or + die "Could not open $abidir/$flavour"; +while () { + chomp; + m/^(EXPORT_.+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/; + $symbols{$4}{'type'} = $1; + $symbols{$4}{'loc'} = $2; + $symbols{$4}{'hash'} = $3; + $module_syms{$2} = 0; + $count++; +} +close(NEW); +print "read $count symbols.\n"; + +# Now the old symbols, checking for missing ones +print " Reading old symbols ($prev_abinum)..."; +$count = 0; +open(OLD, "< $prev_abidir/$flavour") or + die "Could not open $prev_abidir/$flavour"; +while () { + chomp; + m/^(EXPORT_.+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/; + $symbols{$4}{'old_type'} = $1; + $symbols{$4}{'old_loc'} = $2; + $symbols{$4}{'old_hash'} = $3; + $count++; +} +close(OLD); + +print "read $count symbols.\n"; + +print "II: Checking for missing symbols in new ABI..."; +$count = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'type'})) { + print "\n" if not $count; + printf(" MISS : %s%s\n", $sym, + is_ignored($symbols{$sym}{'old_loc'}, $sym) ? " (ignored)" : ""); + $count++ if !is_ignored($symbols{$sym}{'old_loc'}, $sym); + } +} +print " " if $count; +print "found $count missing symbols\n"; +if ($count) { + print "$EE Symbols gone missing (what did you do!?!)\n"; + $errors++; +} + + +print "II: Checking for new symbols in new ABI..."; +$count = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'old_type'})) { + print "\n" if not $count; + print " NEW : $sym\n"; + $count++; + } +} +print " " if $count; +print "found $count new symbols\n"; +if ($count and $prev_abinum == $abinum) { + print "WW: Found new symbols within same ABI. Not recommended\n"; +} + +print "II: Checking for changes to ABI...\n"; +$count = 0; +my $moved = 0; +my $changed_type = 0; +my $changed_hash = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'old_type'}) or + !defined($symbols{$sym}{'type'})) { + next; + } + + # Changes in location don't hurt us, but log it anyway + if ($symbols{$sym}{'loc'} ne $symbols{$sym}{'old_loc'}) { + printf(" MOVE : %-40s : %s => %s\n", $sym, $symbols{$sym}{'old_loc'}, + $symbols{$sym}{'loc'}); + $moved++; + } + + # Changes to export type are only bad if new type isn't + # EXPORT_SYMBOL. Changing things to GPL are bad. + if ($symbols{$sym}{'type'} ne $symbols{$sym}{'old_type'}) { + printf(" TYPE : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_type'}. + $symbols{$sym}{'type'}, is_ignored($symbols{$sym}{'loc'}, $sym) + ? " (ignored)" : ""); + $changed_type++ if $symbols{$sym}{'type'} ne "EXPORT_SYMBOL" + and !is_ignored($symbols{$sym}{'loc'}, $sym); + } + + # Changes to the hash are always bad + if ($symbols{$sym}{'hash'} ne $symbols{$sym}{'old_hash'}) { + printf(" HASH : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_hash'}, + $symbols{$sym}{'hash'}, is_ignored($symbols{$sym}{'loc'}, $sym) + ? " (ignored)" : ""); + $changed_hash++ if !is_ignored($symbols{$sym}{'loc'}, $sym); + $module_syms{$symbols{$sym}{'loc'}}++; + } +} + +print "WW: $moved symbols changed location\n" if $moved; +print "$EE $changed_type symbols changed export type and weren't ignored\n" if $changed_type; +print "$EE $changed_hash symbols changed hash and weren't ignored\n" if $changed_hash; + +$errors++ if $changed_hash or $changed_type; +if ($changed_hash) { + print "II: Module hash change summary...\n"; + foreach $mod (sort { $module_syms{$b} <=> $module_syms{$a} } keys %module_syms) { + next if ! $module_syms{$mod}; + printf(" %-40s: %d\n", $mod, $module_syms{$mod}); + } +} + +print "II: Done\n"; + +if ($errors) { + exit($fail_exit); +} else { + exit(0); +} --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/module-check +++ linux-fsl-imx51-2.6.31/debian.master/scripts/module-check @@ -0,0 +1,120 @@ +#!/usr/bin/perl -w + +$flavour = shift; +$prev_abidir = shift; +$abidir = shift; +$skipmodule = shift; + +print "II: Checking modules for $flavour..."; + +if (-f "$prev_abidir/ignore.modules" + or -f "$prev_abidir/$flavour.ignore.modules") { + print "explicitly ignoring modules\n"; + exit(0); +} + +if (not -f "$abidir/$flavour.modules" or not -f + "$prev_abidir/$flavour.modules") { + print "previous or current modules file missing!\n"; + print " $abidir/$flavour.modules\n"; + print " $prev_abidir/$flavour.modules\n"; + if (defined($skipmodule)) { + exit(0); + } else { + exit(1); + } +} + +print "\n"; + +my %modules; +my %modules_ignore; +my $missing = 0; +my $new = 0; +my $errors = 0; + +# See if we have any ignores +if (-f "$prev_abidir/../modules.ignore") { + my $ignore = 0; + open(IGNORE, "< $prev_abidir/../modules.ignore") or + die "Could not open $prev_abidir/../modules.ignore"; + print " reading modules to ignore..."; + while () { + chomp; + next if /\s*#/; + $modules_ignore{$_} = 1; + $ignore++; + } + close(IGNORE); + print "read $ignore modules.\n"; +} + +# Read new modules first +print " reading new modules..."; +$new_count = 0; +open(NEW, "< $abidir/$flavour.modules") or + die "Could not open $abidir/$flavour.modules"; +while () { + chomp; + $modules{$_} = 1; + $new_count++; +} +close(NEW); +print "read $new_count modules.\n"; + +# Now the old modules, checking for missing ones +print " reading old modules..."; +$old_count = 0; +open(OLD, "< $prev_abidir/$flavour.modules") or + die "Could not open $prev_abidir/$flavour.modules"; +while () { + chomp; + if (not defined($modules{$_})) { + print "\n" if not $missing; + $missing++; + if (not defined($modules_ignore{$_})) { + print " MISS: $_\n"; + $errors++; + } else { + print " MISS: $_ (ignored)\n"; + } + } else { + $modules{$_}++; + } + $old_count++; +} +close(OLD); +# Check for new modules +foreach $mod (keys(%modules)) { + if ($modules{$mod} < 2) { + print "\n" if not $missing and not $new; + print " NEW : $mod\n"; + $new++; + } +} +if ($new or $missing) { + print " read $old_count modules : new($new) missing($missing)\n"; +} else { + print "read $old_count modules.\n"; +} + + +# Let's see where we stand... +if ($errors) { + if (defined($skipmodule)) { + print "WW: Explicitly asked to ignore failures (probably not good)\n"; + } else { + print "EE: Missing modules (start begging for mercy)\n"; + exit 1 + } +} + +if ($new) { + print "II: New modules (you've been busy, wipe the poop off your nose)\n"; +} else { + print "II: No new modules (hope you're happy, slacker)\n"; +} + +print "II: Done\n"; + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/sub-flavour +++ linux-fsl-imx51-2.6.31/debian.master/scripts/sub-flavour @@ -0,0 +1,67 @@ +#!/bin/bash + +. debian/debian.env + +echo "SUB_PROCESS $FROM => $TO" + +export from_pkg="linux-image-$ABI_RELEASE-$FROM" +export to_pkg="linux-image-$ABI_RELEASE-$TO" + +from_moddir="debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM" +to_moddir="debian/$to_pkg/lib/modules/$ABI_RELEASE-$FROM" + +install -d "debian/$to_pkg/boot" +install -m644 debian/$from_pkg/boot/{vmlinuz,System.map,config}-$ABI_RELEASE-$FROM \ + debian/$to_pkg/boot/ + +# +# Print some warnings if there are files in the sub-flavours list +# that do not actually exist. +# +cat ${DEBIAN}/sub-flavours/$TO.list | while read line +do +( + cd debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM/kernel; + # + # If its a wildcard, then check that there are files that match. + # + if echo "$line" | grep '\*' > /dev/null + then + if [ `eval find "$line" -name '*.ko' 2>/dev/null|wc -l` -lt 1 ] + then + echo SUB_INST Warning - No files in $line + fi + # + # Else it should be a single file reference. + # + elif [ ! -f "$line" ] + then + echo SUB_INST Warning - could not find "$line" + fi +) +done + +cat ${DEBIAN}/sub-flavours/$TO.list | while read line; do + ( + cd debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM/kernel; + if echo "$line" | grep '\*' > /dev/null + then + eval find "$line" -name '*.ko' 2>/dev/null || true + elif [ -f "$line" ] + then + echo "$line" + fi + ); +done | while read mod; do + echo "SUB_INST checking: $mod" + fromdir="/lib/modules/$ABI_RELEASE-$FROM/" + egrep "^($fromdir)?kernel/$mod:" \ + $from_moddir/modules.dep | sed -e "s|^$fromdir||" -e 's/://' -e 's/ /\n/g' | \ + while read m; do + m="${fromdir}$m" + test -f debian/$to_pkg/$m && continue + echo "SUB_INST installing: $m" + install -D -m644 debian/$from_pkg/$m \ + debian/$to_pkg/$m + done +done --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/link-headers +++ linux-fsl-imx51-2.6.31/debian.master/scripts/link-headers @@ -0,0 +1,42 @@ +#!/bin/bash -e + +. debian/debian.env + +hdrdir="$1" +symdir="$2" +flavour="$3" + +echo "Symlinking and copying headers for $flavour..." + +excludes="( -path ./debian -prune -o -path ./${DEBIAN} -prune -o -path ./.git ) -prune -o" + +( +find . $excludes -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) -print +find ./include ./scripts -name .gitignore -prune -o -type f -print +find ./include -mindepth 1 -maxdepth 1 $excludes -type d -print +) | ( +while read file; do + dir=$file + lastdir=$file + + if [ -e "$hdrdir/$file" -o -L "$hdrdir/$file" ]; then + continue + fi + + while [ ! -e "$hdrdir/$dir" -a ! -L "$hdrdir/$dir" ]; do + lastdir=$dir + dir=`dirname $dir` + done + # If the last item to exist is a symlink we assume all is good + if [ ! -L "$hdrdir/$dir" ]; then + # Turns things like "./foo" into "../" + deref="`echo -n $lastdir | sed -e 's/^\.//' -e's,/[^/]*,../,g'`" + item="`echo -n $lastdir | sed -e 's/^\.\///'`" + ln -s $deref$symdir/$item $hdrdir/$item + fi +done +) + +exit --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/getabis +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/getabis @@ -0,0 +1,86 @@ +#!/bin/bash + +if [ "$#" != "2" ]; then + echo "Usage: $0 " 1>&2 + exit 1 +fi + +ver=$1 +revision=$2 +abi=$(echo $revision | awk -F. '{print $1}') + +verabi=$ver-$abi +verfull=$ver-$revision + +repo="http://archive.ubuntu.com/ubuntu/pool/main/l" +repo_ports="http://ports.ubuntu.com/ubuntu-ports/pool/main/l" +repo_uni="http://archive.ubuntu.com/ubuntu/pool/universe/l" +repo_ports_uni="http://ports.ubuntu.com/ubuntu-ports/pool/universe/l" + +WGET="wget --quiet -c" + +abidir="`pwd`/debian/abi/$verfull" +tmpdir="`pwd`/abi-tmp-$verfull" +origdir="`pwd`" + +test -d $tmpdir || mkdir $tmpdir + +getall() { + arch=$1 + shift + + mkdir -p $abidir/$arch + + for sub in $@; do + if [ -f $abidir/$arch/$sub ]; then + echo "Exists: $sub" + continue + fi + echo -n "Fetching $sub..." + filename=linux-image-${verabi}-${sub}_${verfull}_${arch}.deb + cd $tmpdir + for r in $repo $repo_ports $repo_uni $repo_ports_uni + do + if ! [ -f $filename ]; then + $WGET $r/linux/$filename + fi + done + if [ "$?" = "0" ]; then + echo -n "extracting..." + dpkg-deb --extract $filename tmp + if [ -f tmp/boot/abi-* ]; then + mv tmp/boot/abi-* $abidir/$arch/$sub + else + echo -n "NO ABI FILE..." + fi + (cd tmp; find lib/modules/$verabi-$sub/kernel -name '*.ko') | \ + sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > \ + $abidir/$arch/$sub.modules + rm -rf tmp $filename + echo "done." + else + echo "FAILED." + fi + cd $origdir + done +} + +# MAIN + +# Setup abi directory +mkdir -p $abidir +echo $abi > $abidir/abiname + +# NOTE: The flavours are hardcoded, because they may have changed from the +# current build. + +getall lpia lpia +getall amd64 generic server +getall i386 generic generic-pae 386 + +# Ports arches and flavours. +getall powerpc powerpc powerpc-smp powerpc64-smp +getall ia64 ia64 +getall sparc sparc64 sparc64-smp + +rmdir $tmpdir --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/insert-ubuntu-changes +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/insert-ubuntu-changes @@ -0,0 +1,58 @@ +#!/usr/bin/perl + +if ($#ARGV != 2) { + die "Usage: $0 \n"; +} +my ($changelog, $end, $start) = @ARGV; + +$end =~ s/.*\.//; +$start =~ s/.*\.//; + +my @changes = (); +my $output = 0; +open(CHG, ") { + if (/^\S+\s+\((.*\.(\d+))\)/) { + if ($2 <= $end) { + last; + } + if ($2 == $start) { + $output = 1; + } + if ($output) { + push(@changes, "\n [ Ubuntu: $1 ]\n\n"); + next; + } + } + next if ($output == 0); + + next if (/^\s*$/); + next if (/^\s--/); + next if (/^\s\s[^\*\s]/); + + push(@changes, $_); +} +close(CHG); + +open(CHANGELOG, "< $changelog") or die "Cannot open changelog"; +open(NEW, "> $changelog.new") or die "Cannot open new changelog"; + +$printed = 3; +while () { + if (/^ CHANGELOG: /) { + $printed--; + print NEW; + if ($printed == 0) { + print NEW @changes; + } + next; + } + print NEW; +} + +close(NEW); +close(CHANGELOG); + +rename("$changelog.new", "$changelog"); --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/insert-changes.pl +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/insert-changes.pl @@ -0,0 +1,34 @@ +#!/usr/bin/perl -w + +my $debian; +$debian = $ARGV[0] if (defined $ARGV[0]); +$debian = 'debian.master' if (!defined $debian); + +system("make -s -f $debian/rules printchanges > $debian/changes"); + +open(CHANGELOG, "< $debian/changelog") or die "Cannot open changelog"; +open(CHANGES, "< $debian/changes") or die "Cannot open new changes"; +open(NEW, "> $debian/changelog.new") or die "Cannot open new changelog"; + +$printed = 0; + +while () { + if (/^ CHANGELOG: /) { + next if $printed; + + while () { + print NEW; + } + + $printed = 1; + } else { + print NEW; + } +} + +close(NEW); +close(CHANGES); +close(CHANGELOG); + +rename("$debian/changelog.new", "$debian/changelog"); +unlink("$debian/changes"); --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/kernelconfig +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/kernelconfig @@ -0,0 +1,129 @@ +#!/bin/bash + +. debian/debian.env + +# Script to merge all configs and run 'make silentoldconfig' on it to wade out bad juju. +# Then split the configs into distro-commmon and flavour-specific parts + +# We have to be in the top level kernel source directory +if [ ! -f MAINTAINERS ] || [ ! -f Makefile ]; then + echo "This does not appear to be the kernel source directory." 1>&2 + exit 1 +fi + +mode=${1:?"Usage: $0 [oldconfig|editconfig]"} +case "$mode" in + oldconfig) ;; # All is good + editconfig) ;; # All is good + genconfig) ;; # All is good + *) echo "$0 called with invalid mode" 1>&2 + exit 1 ;; +esac +kerneldir="`pwd`" +confdir="$kerneldir/${DEBIAN}/config" +ports=$2 +if [ "$ports" = "ports" ]; then + archs="sparc powerpc ia64" + family='ports' +else + archs="amd64 i386 lpia" + family='ubuntu' +fi +bindir="`pwd`/${DEBIAN}/scripts/misc" +common_conf="$confdir/config.common.$family" +tmpdir=`mktemp -d` + +if [ "$mode" = "genconfig" ]; then + keep=1 + mode="oldconfig" + test -d CONFIGS || mkdir CONFIGS +fi + +test -d build || mkdir build + +for arch in $archs; do + # Map debian archs to kernel archs + case "$arch" in + amd64) kernarch="x86_64" ;; + lpia) kernarch="x86" ;; + sparc) kernarch="sparc64" ;; + *) kernarch="$arch" ;; + esac + + echo "" + echo "***************************************" + echo "* Processing $arch ($kernarch) ... " + archconfdir=$confdir/$arch + flavourconfigs=$(cd $archconfdir && ls config.flavour.*) + + # Merge configs + # We merge config.common.ubuntu + config.common. + + # config.flavour. + + for config in $flavourconfigs; do + fullconf="$tmpdir/$arch-$config-full" + case $config in + *) + : >"$fullconf" + if [ -f $common_conf ]; then + cat $common_conf >> "$fullconf" + fi + if [ -f $archconfdir/config.common.$arch ]; then + cat $archconfdir/config.common.$arch >> "$fullconf" + fi + cat "$archconfdir/$config" >>"$fullconf" + ;; + esac + done + + for config in $flavourconfigs; do + if [ -f $archconfdir/$config ]; then + fullconf="$tmpdir/$arch-$config-full" + cat "$fullconf" > build/.config + # Call oldconfig or menuconfig + case "$mode" in + oldconfig) + # Weed out incorrect config parameters + echo "* Run silentoldconfig on $arch/$config ..." + make O=`pwd`/build ARCH=$kernarch silentoldconfig ;; + editconfig) + # Interactively edit config parameters + echo " * Run menuconfig on $arch/$config... Press a key." + read + make O=`pwd`/build ARCH=$kernarch menuconfig ;; + *) # Bad! + exit 1 ;; + esac + cat build/.config > $archconfdir/$config + if [ "$keep" = "1" ]; then + cat build/.config > CONFIGS/$arch-$config + fi + else + echo "!! Config not found $archconfdir/$config..." + fi + done + + echo "Running splitconfig.pl for $arch" + echo + + # Can we make this more robust by avoiding $tmpdir completely? + # This approach was used for now because I didn't want to change + # splitconfig.pl + (cd $archconfdir; $bindir/splitconfig.pl; mv config.common \ + config.common.$arch; cp config.common.$arch $tmpdir) +done + +rm -f $common_conf + +# Now run splitconfig.pl on all the config.common. copied to +# $tmpdir +(cd $tmpdir; $bindir/splitconfig.pl) +( + cd $confdir; + rm -f *-full + grep -v 'is UNMERGABLE' <$tmpdir/config.common >$common_conf + for arch in $archs; do + grep -v 'is UNMERGABLE' <$tmpdir/config.common.$arch \ + >$arch/config.common.$arch + done +) --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/splitconfig.pl +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/splitconfig.pl @@ -0,0 +1,111 @@ +#!/usr/bin/perl -w + +%allconfigs = (); +%common = (); + +print "Reading config's ...\n"; + +opendir(DIR, "."); + +while (defined($config = readdir(DIR))) { + # Only config.* + next if $config !~ /^config\..*/; + # Nothing that is disabled, or remnant + next if $config =~ /.*\.(default|disabled|stub)$/; + + %{$allconfigs{$config}} = (); + + print " processing $config ... "; + + open(CONFIG, "< $config"); + + while () { + # Skip comments + /^#*\s*CONFIG_(\w+)[\s=](.*)$/ or next; + + ${$allconfigs{$config}}{$1} = $2; + + $common{$1} = $2; + } + + close(CONFIG); + + print "done.\n"; +} + +closedir(DIR); + +print "\n"; + +print "Merging lists ... \n"; + +# %options - pointer to flavour config inside the allconfigs array +for $config (keys(%allconfigs)) { + my %options = %{$allconfigs{$config}}; + + print " processing $config ... "; + + for $key (keys(%common)) { + next if not defined $common{$key}; + + # If we don't have the common option, then it isn't + # common. If we do have that option, it must have the same + # value. EXCEPT where this file does not have a value at all + # which may safely be merged with any other value; the value + # will be elided during recombination of the parts. + if (!defined($options{$key})) { + # Its ok really ... let it merge + } elsif (not defined($options{$key})) { + undef $common{$key}; + } elsif ($common{$key} ne $options{$key}) { + undef $common{$key}; + } + } + + print "done.\n"; +} + +print "\n"; + +print "Creating common config ... "; + +open(COMMON, "> config.common"); +print COMMON "#\n# Common config options automatically generated by splitconfig.pl\n#\n"; + +for $key (sort(keys(%common))) { + if (not defined $common{$key}) { + print COMMON "# CONFIG_$key is UNMERGABLE\n"; + } elsif ($common{$key} eq "is not set") { + print COMMON "# CONFIG_$key is not set\n"; + } else { + print COMMON "CONFIG_$key=$common{$key}\n"; + } +} +close(COMMON); + +print "done.\n\n"; + +print "Creating stub configs ...\n"; + +for $config (keys(%allconfigs)) { + my %options = %{$allconfigs{$config}}; + + print " processing $config ... "; + + open(STUB, "> $config"); + print STUB "#\n# Config options for $config automatically generated by splitconfig.pl\n#\n"; + + for $key (sort(keys(%options))) { + next if defined $common{$key}; + + if ($options{$key} =~ /^is /) { + print STUB "# CONFIG_$key $options{$key}\n"; + } else { + print STUB "CONFIG_$key=$options{$key}\n"; + } + } + + close(STUB); + + print "done.\n"; +} --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/git-ubuntu-log +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/git-ubuntu-log @@ -0,0 +1,232 @@ +#!/usr/bin/perl -w + +use strict; +use Text::Wrap; + +my $kernel_auth = "Upstream Kernel Changes"; + +my (%map, @reverts); +my $pstate = 1; +my $no_kern_log = 0; +my $print_shas = 0; +my $first_print = 1; + +while (@ARGV) { + my $opt = $ARGV[0]; + shift; + if ($opt eq "--no-kern-log") { + $no_kern_log = 1; + } elsif ($opt eq "--print-shas") { + $print_shas = 1; + } else { + print STDERR "Unknown options: $opt\n"; + exit(1); + } +} + +sub check_reverts($) { + my ($entry) = @_; + my ($check); + + foreach $check (reverse @reverts) { + my $desc = "Revert \"" . $entry->{'desc'} . "\""; + if ($check->{'desc'} eq $desc) { + @reverts = grep($_->{'desc'} ne $desc, @reverts); + return 1; + } + } + + return 0; +} + +sub add_entry($) { + my ($entry) = @_; + my $key = $entry->{'author'}; + + # store description in array, in email->{desc list} map + if (exists $map{$key}) { + # grab ref + my $obj = $map{$key}; + + # add desc to array + push(@$obj, $entry); + } else { + # create new array, containing 1 item + my @arr = ($entry); + + # store ref to array + $map{$key} = \@arr; + } +} + +sub shortlog_entry($$$$$) { + my ($name, $desc, $bug, $cve, $commit) = @_; + my $entry; + + $desc =~ s#/pub/scm/linux/kernel/git/#/.../#g; + $desc =~ s#\[PATCH\] ##g; + + $desc =~ s#^\s*##g; + $desc =~ s# *UBUNTU: ##g; + + $entry->{'desc'} = $desc; + if ($bug ne '') { + $entry->{'bugno'} = $bug; + } + $entry->{'cve'} = $cve; + $entry->{'commit'} = $commit; + $entry->{'author'} = $name; + + if ($desc =~ /^Revert "/) { + push(@reverts, $entry); + return; + } + + return if check_reverts($entry); + + add_entry($entry); +} + +# sort comparison function +sub by_name($$) { + my ($a, $b) = @_; + + uc($a) cmp uc($b); +} + +sub shortlog_output { + my ($obj, $key, $entry); + + foreach $key (sort by_name keys %map) { + next if $key eq $kernel_auth and $no_kern_log; + + print "\n" unless $first_print; + $first_print = 0; + + # output author + printf " [ %s ]\n\n", $key; + + # output author's 1-line summaries + $obj = $map{$key}; + foreach $entry (reverse @$obj) { + print wrap(" * ", " ", $entry->{'desc'}) . "\n"; + # For non upstream changes, add other info. + if ($key ne $kernel_auth) { + if ($print_shas) { + print " - GIT-SHA " . $entry->{'commit'} . + "\n"; + } + } + if (defined($entry->{'bugno'})) { + print " - LP: #" . $entry->{'bugno'} . "\n"; + } + if (defined($entry->{'cve'})) { + print " - " . $entry->{'cve'} . "\n"; + } + } + } +} + +sub changelog_input { + my ($author, $desc, $commit, $entry, $cve); + + while () { + # get commit + if ($pstate == 1) { + next unless /^commit (.*)/; + + $commit = $1; + + $pstate++; + } + + # get author and email + elsif ($pstate == 2) { + my ($email); + + next unless /^[Aa]uthor:?\s*(.*?)\s*<(.*)>/; + + $author = $1; + $email = $2; + $desc = undef; + $cve = undef; + + # cset author fixups + if (!$author) { + $author = $email; + } + $pstate++; + } + + # skip to blank line + elsif ($pstate == 3) { + next unless /^\s*$/; + $pstate++; + } + + # skip to non-blank line + elsif ($pstate == 4) { + next unless /^\s*?(.*)/; + my $ignore = 0; + my $do_ignore = 0; + my $bug = undef; + my %bugz = (); + my $k; + + # skip lines that are obviously not + # a 1-line cset description + next if /^\s*From: /; + + chomp; + $desc = $1; + + if ($desc =~ /^ *(Revert "|)UBUNTU:/) { + $do_ignore = 1; + } else { + $do_ignore = 0; + $author = $kernel_auth; + $ignore = 1 if $desc =~ /Merge /; + } + while () { + $ignore = 1 if ($do_ignore && /^ *Ignore: yes/i); + if (/^ *Bug: *(#|)([0-9#,\s]*)\s*$/i) { + foreach $k (split('(,|\s)\s*(#|)', $2)) { + $bugz{$k} = 1 if (($k ne '') and ($k =~ /[0-9]+/)); + } + } + elsif (/^ *BugLink: *http.*:\/\/.*\/([0-9]+)/i) { + $bugz{$1} = 1; + } + elsif (/^ *(CVE-.*)/) { + $cve = $1 + } + last if /^commit /; + } + + $bug = join(", #", sort keys(%bugz)); + if (!$ignore) { + &shortlog_entry($author, $desc, $bug, + $cve, $commit, 0); + } + + $pstate = 1; + if ($_ && /^commit (.*)/) { + $commit = $1; + $pstate++; + } + } + + else { + die "invalid parse state $pstate"; + } + } + + foreach $entry (@reverts) { + add_entry($entry); + } +} + +&changelog_input; +&shortlog_output; + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.master/scripts/misc/retag +++ linux-fsl-imx51-2.6.31/debian.master/scripts/misc/retag @@ -0,0 +1,34 @@ +#!/usr/bin/perl -w + +open(TAGS, "git tag -l |") or die "Could not get list of tags"; +@tags = ; +close(TAGS); + +open(LOGS, "git log --pretty=short |") or die "ERROR: Calling git log"; +my $commit = ""; + +while () { + my $origtag; + + if (m|^commit (.*)$|) { + $commit = $1; + next; + } + + m|\s*UBUNTU: (Ubuntu-2\.6\..*)| or next; + + $tag = $1; + + ($origtag) = grep(/^$tag.orig$/, @tags); + + if (!defined($origtag)) { + print "I: Adding original tag for $tag\n"; + system("git tag -m $tag $tag.orig $tag"); + } + + print "I: Tagging $tag => $commit\n"; + + system("git tag -f -m $tag $tag $commit"); +} + +close(LOGS); --- linux-fsl-imx51-2.6.31.orig/debian.master/sub-flavours/control.stub +++ linux-fsl-imx51-2.6.31/debian.master/sub-flavours/control.stub @@ -0,0 +1,39 @@ +# Items that get replaced: +# FLAVOUR +# DESC +# ARCH +# SUPPORTED +# TARGET +# BOOTLOADER +# =PROVIDES= +# =CONFLICTS= +# +# Items marked with =FOO= are optional +# +# XXX: Leave the blank line before the first package!! + +Package: linux-image-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES= +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3) +Conflicts: hotplug (<< 0.0.20040105-1), =CONFLICTS= +Recommends: BOOTLOADER +Suggests: fdutils, linux-doc-PKGVER | linux-source-PKGVER +Description: Linux kernel image for version PKGVER on DESC + This package contains the Linux kernel image for version PKGVER on + DESC. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports SUPPORTED processors. + . + TARGET + . + You likely do not want to install this package directly. Instead, install + the linux-FLAVOUR meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. --- linux-fsl-imx51-2.6.31.orig/debian.master/sub-flavours/virtual.list +++ linux-fsl-imx51-2.6.31/debian.master/sub-flavours/virtual.list @@ -0,0 +1,111 @@ +arch/*/{crypto,kernel,oprofile} +crypto/* +drivers/acpi/* +drivers/ata/ata_generic.ko +drivers/ata/ata_piix.ko +drivers/ata/libata.ko +drivers/block/virtio_blk.ko +drivers/block/nbd.ko +drivers/block/loop.ko +drivers/block/floppy.ko +drivers/block/cryptoloop.ko +drivers/block/xen-blkfront.ko +drivers/cdrom/cdrom.ko +drivers/char/hangcheck-timer.ko +drivers/char/lp.ko +drivers/char/nvram.ko +drivers/char/ppdev.ko +drivers/char/raw.ko +drivers/input/evbug.ko +drivers/input/evdev.ko +drivers/input/gameport/gameport.ko +drivers/input/mouse/psmouse.ko +drivers/input/serio/serio_raw.ko +drivers/input/serio/serport.ko +drivers/input/joydev.ko +drivers/input/misc/uinput.ko +drivers/input/touchscreen/usbtouchscreen.ko +drivers/input/xen-kbdfront.ko +drivers/md/* +drivers/message/fusion* +drivers/misc/eeprom_93cx6.ko +drivers/net/8139too.ko +drivers/net/8139cp.ko +drivers/net/appletalk/ipddp.ko +drivers/net/bonding/bonding.ko +drivers/net/bsd_comp.ko +drivers/net/dummy.ko +drivers/net/e1000/e1000.ko +drivers/net/eql.ko +drivers/net/ifb.ko +drivers/net/mii.ko +drivers/net/ne2k-pci.ko +drivers/net/netconsole.ko +drivers/net/pcnet32.ko +drivers/net/ppp_async.ko +drivers/net/ppp_deflate.ko +drivers/net/ppp_generic.ko +drivers/net/ppp_mppe.ko +drivers/net/pppoe.ko +drivers/net/pppol2tp.ko +drivers/net/pppox.ko +drivers/net/ppp_synctty.ko +drivers/net/slhc.ko +drivers/net/slip.ko +drivers/net/tun.ko +drivers/net/veth.ko +drivers/net/virtio_net.ko +drivers/net/xen-netfront.ko +drivers/parport/parport.ko +drivers/parport/parport_pc.ko +drivers/pci/hotplug/acpiphp.ko +drivers/net/tulip/tulip.ko +drivers/net/virtio_net.ko +drivers/scsi/BusLogic.ko +drivers/scsi/iscsi_tcp.ko +drivers/scsi/libiscsi.ko +drivers/scsi/libsas/* +drivers/scsi/libsas/libsas.ko +drivers/scsi/qla1280.ko +drivers/scsi/raid_class.ko +drivers/scsi/scsi_mod.ko +drivers/scsi/scsi_transport_fc.ko +drivers/scsi/scsi_transport_iscsi.ko +drivers/scsi/scsi_transport_sas.ko +drivers/scsi/scsi_transport_spi.ko +drivers/scsi/scsi_wait_scan.ko +drivers/scsi/sd_mod.ko +drivers/scsi/sg.ko +drivers/scsi/sr_mod.ko +drivers/scsi/sym53c8xx_2/sym53c8xx.ko +drivers/usb/core/usbcore.ko +drivers/usb/storage/usb-storage.ko +drivers/video/cirrusfb.ko +drivers/video/console/bitblit.ko +drivers/video/console/fbcon.ko +drivers/video/console/font.ko +drivers/video/console/softcursor.ko +drivers/video/console/tileblit.ko +drivers/video/output.ko +drivers/video/syscopyarea.ko +drivers/video/sysfillrect.ko +drivers/video/sysimgblt.ko +drivers/video/vesafb.ko +drivers/video/vga16fb.ko +drivers/video/vgastate.ko +drivers/video/xen-fbfront.ko +drivers/virtio/virtio_balloon.ko +drivers/virtio/virtio.ko +drivers/virtio/virtio_pci.ko +drivers/virtio/virtio_ring.ko +drivers/watchdog/softdog.ko +drivers/xen/* +fs/* +lib/* +net/* +sound/core/* +sound/pci/snd-ens1370.ko +sound/drivers/pcsp/snd-pcsp.ko +ubuntu/e1000e/e1000e.ko +ubuntu/squashfs/squashfs.ko +ubuntu/iscsitarget/iscsi_trgt.ko --- linux-fsl-imx51-2.6.31.orig/debian.master/sub-flavours/virtual.vars +++ linux-fsl-imx51-2.6.31/debian.master/sub-flavours/virtual.vars @@ -0,0 +1,10 @@ +# Based on server flavour +arch="i386 amd64" +supported="Virtual" +target="Geared toward virtual machine guests." +desc="x86/x86_64" +bootloader="grub-pc | grub | lilo (>= 19.1)" +is_sub="true" +# The provides and conflicts are REQUIRED +provides="redhat-cluster-modules" +conflicts="linux-image-PKGVER-ABINUM-generic-pae, linux-image-PKGVER-ABINUM-server" --- linux-fsl-imx51-2.6.31.orig/debian.master/sub-flavours/README +++ linux-fsl-imx51-2.6.31/debian.master/sub-flavours/README @@ -0,0 +1,12 @@ +Sub flavours are flavours that are built based on other builds. IOW, they +are usually a subset of something else. + +Requirements: + +debian/sub-flavours/.list : The file list, uses glob syntax +debian/sub-flavours/.vars : The make vars, similar to normal flavours +debian/rules.d/.mk : Add _sub var listing the , e.g. + server_sub = virtual would mean virtual is + based on the server flavour. + +Note, the vars must include a conflicts with the flavour it was built on. --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/abiname +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/abiname @@ -0,0 +1 @@ +22 --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/powerpc/powerpc64-smp.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/powerpc/powerpc64-smp.modules @@ -0,0 +1,2083 @@ +3c359 +3c574_cs +3c589_cs +3c59x +3w-9xxx +3w-xxxx +6pack +8021q +8139cp +8139too +8250 +8250_pci +8390 +9p +9pnet +9pnet_rdma +9pnet_virtio +a100u2w +a3d +aacraid +ab3100-core +abyss +ac97_bus +acecad +acenic +act200l-sir +act_gact +act_ipt +actisys-sir +act_mirred +act_nat +act_pedit +act_police +act_simple +act_skbedit +ad7414 +ad7418 +ad7877 +ad7879 +adcxx +adfs +adi +adm1021 +adm1025 +adm1026 +adm1029 +adm1031 +adm8211 +adm9240 +ads7846 +adt7462 +adt7470 +adt7475 +adutux +adv7170 +adv7175 +adv7343 +aes_generic +af_802154 +af9013 +affs +af_key +af-rxrpc +agpgart +ah4 +ah6 +ahci +aic79xx +aic7xxx +aic94xx +aiptek +aircable +airo +airo_cs +airport +alauda +ali-ircc +amd8111e +analog +ansi_cprng +anubis +aoe +appledisplay +appletalk +appletouch +applicom +ar7part +ar9170usb +arc4 +arcmsr +arcnet +arc-rawmode +arc-rimi +ark3116 +arkfb +arptable_filter +arp_tables +arpt_mangle +asix +async_memcpy +async_tx +async_xor +at24 +at25 +at76c50x-usb +ata_generic +ata_piix +aten +ath +ath9k +ati_remote +ati_remote2 +atl1 +atl1c +atl1e +atl2 +atm +atmel +atmel_cs +atmel_pci +atmtcp +atp870u +atxp1 +au0828 +au8522 +aufs +authenc +auth_rpcgss +autofs +autofs4 +av5100 +ax25 +axnet_cs +b2c2-flexcop +b2c2-flexcop-pci +b2c2-flexcop-usb +b43 +b43legacy +b44 +baycom_par +baycom_ser_fdx +baycom_ser_hdx +bcm203x +bcm3510 +bcm5974 +be2net +befs +belkin_sa +berry_charge +bfs +bfusb +binfmt_misc +block2mtd +blowfish +bluecard_cs +bluetooth +bnep +bnx2 +bnx2i +bonding +bpa10x +bpck +bpqether +bq24022 +bq27x00_battery +br2684 +bridge +broadcom +broadsheetfb +bsd_comp +bt3c_cs +bt819 +bt856 +bt866 +bt878 +btcx-risc +btrfs +btsdio +bttv +btuart_cs +btusb +bw-qcam +c67x00 +cachefiles +cafe_ccic +cafe_nand +camellia +can +can-bcm +can-dev +can-raw +capmode +carminefb +cassini +cast5 +cast6 +catc +cb710 +cb710-mmc +cbc +cciss +cdc-acm +cdc_eem +cdc_ether +cdc-phonet +cdc_subset +cdc-wdm +cfg80211 +cfi_cmdset_0001 +cfi_cmdset_0002 +cfi_cmdset_0020 +cfi_probe +cfi_util +ch +ch341 +chipreg +cicada +cifs +cirrusfb +clip +cls_basic +cls_flow +cls_fw +cls_route +cls_rsvp +cls_rsvp6 +cls_tcindex +cls_u32 +cm109 +cn +cnic +cobra +coda +com20020 +com20020_cs +com20020-pci +com90io +com90xx +comm +configfs +core +cp210x +cpia +cpia2 +cpia_pp +cpia_usb +cpufreq_spudemand +cpufreq_stats +c-qcam +cramfs +crc32c +crc7 +crc-ccitt +crc-itu-t +crc-t10dif +cryptd +cryptoloop +crypto_null +cs5345 +cs53l32a +cts +cuse +cx18 +cx22700 +cx22702 +cx231xx +cx231xx-alsa +cx231xx-dvb +cx2341x +cx23885 +cx24110 +cx24113 +cx24116 +cx24123 +cx25840 +cx8800 +cx8802 +cx88-alsa +cx88-blackbird +cx88-dvb +cx88-vp3054-i2c +cx88xx +cxacru +cxgb +cxgb3 +cxgb3i +cyber2000fb +cyberjack +cyclades +cyclomx +cycx_drv +cypress_cy7c63 +cypress_m8 +cytherm +da9030_battery +da9034-ts +da903x +da903x_bl +DAC960 +davicom +db9 +dc395x +dccp +dccp_diag +dccp_ipv4 +dccp_ipv6 +dccp_probe +de2104x +de4x5 +de600 +de620 +decnet +deflate +defxx +des_generic +dib0070 +dib3000mb +dib3000mc +dib7000m +dib7000p +dibx000_common +digi_acceleport +diskonchip +display +dl2k +dlci +dlm +dm1105 +dm9601 +dm-crypt +dme1737 +dmfe +dm-log +dm-mirror +dm-mod +dm-multipath +dm-queue-length +dm-region-hash +dm-round-robin +dm-service-time +dm-snapshot +dmx3191d +dm-zero +dnet +dn_rtmsg +doc2000 +doc2001 +doc2001plus +docecc +docprobe +drm +ds1621 +ds1682 +ds2482 +ds2490 +ds2760_battery +ds2782_battery +dsbr100 +dscc4 +dst +dst_ca +dstr +dtl1_cs +dummy +dv1394 +dvb-bt8xx +dvb-core +dvb-pll +dvb-ttpci +dvb-ttusb-budget +dvb-usb +dvb-usb-a800 +dvb-usb-af9005 +dvb-usb-af9005-remote +dvb-usb-af9015 +dvb-usb-anysee +dvb-usb-au6610 +dvb-usb-ce6230 +dvb-usb-cinergyT2 +dvb-usb-cxusb +dvb-usb-dib0700 +dvb-usb-dibusb-common +dvb-usb-dibusb-mb +dvb-usb-dibusb-mc +dvb-usb-digitv +dvb-usb-dtt200u +dvb-usb-dtv5100 +dvb-usb-dw2102 +dvb-usb-gl861 +dvb-usb-gp8psk +dvb-usb-m920x +dvb-usb-nova-t-usb2 +dvb-usb-opera +dvb-usb-ttusb2 +dvb-usb-umt-010 +dvb-usb-vp702x +dvb-usb-vp7045 +e100 +e1000 +e1000e +eata +ebt_802_3 +ebtable_broute +ebtable_filter +ebtable_nat +ebtables +ebt_among +ebt_arp +ebt_arpreply +ebt_dnat +ebt_ip +ebt_ip6 +ebt_limit +ebt_log +ebt_mark +ebt_mark_m +ebt_nflog +ebt_pkttype +ebt_redirect +ebt_snat +ebt_stp +ebt_ulog +ebt_vlan +ecb +econet +ecryptfs +edac_core +eeprom +eeprom_93cx6 +eeti_ts +efs +elo +em28xx +em28xx-dvb +em_cmp +emi26 +emi62 +em_meta +em_nbyte +empeg +ems_pci +em_text +emu10k1-gp +em_u32 +eni +enic +epat +epca +epia +epic100 +eql +esi-sir +esp4 +esp6 +et1011c +et61x251 +eth1394 +ethoc +evbug +evdev +exofs +exportfs +f71805f +f71882fg +f75375s +farsync +fat +faulty +fcoe +fcrypt +fdomain +fdomain_cs +fealnx +ff-memless +firedtv +fit2 +fit3 +floppy +fm801-gp +fmvj18x_cs +forcedeth +fore_200e +freevxfs +friq +frpw +fscache +ftdi-elan +ftdi_sio +ftl +fujitsu_ts +funsoft +g760a +gadgetfs +gamecon +gameport +garmin_gps +garp +g_audio +g_cdc +gdth +generic_bl +generic_serial +gen_probe +g_ether +gf128mul +gf2k +g_file_storage +gfs2 +girbil-sir +gl518sm +gl520sm +gl620a +gluebi +g_midi +gpio_keys +gpio_mouse +gpio_vbus +g_printer +grip +grip_mp +g_serial +gspca_conex +gspca_etoms +gspca_finepix +gspca_m5602 +gspca_main +gspca_mars +gspca_mr97310a +gspca_ov519 +gspca_ov534 +gspca_pac207 +gspca_pac7311 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+userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-compat-ioctl32 +v4l2-int-device +vcan +ves1820 +ves1x93 +veth +vfat +vgastate +vgg2432a4 +via +via686a +viafb +via-ircc +via-rhine +via-sdmmc +via-velocity +vicam +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vitesse +vivi +vlsi_ir +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w83627ehf +w83627hf +w83781d +w83791d +w83792d +w83793 +w83977af_ir +w83l785ts +w90p910_ts +w9966 +w9968cf +wacom_w8001 +walkera0701 +wanrouter +wanxl +warrior +wavelan_cs +wbsd +wdrtas +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +windfarm_core +windfarm_cpufreq_clamp +windfarm_lm75_sensor +windfarm_max6690_sensor +windfarm_pid +windfarm_pm112 +windfarm_pm121 +windfarm_pm81 +windfarm_pm91 +windfarm_smu_controls +windfarm_smu_sat +windfarm_smu_sensors +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xilinx_ps2 +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/powerpc/powerpc +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/powerpc/powerpc @@ -0,0 +1,9142 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/atm/suni 0x9f32a8df suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0xed9806d1 uPD98402_init +EXPORT_SYMBOL drivers/block/loop 0x9ad243a4 loop_register_transfer +EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL drivers/block/paride/paride 0x2bd0df26 pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x405b373a pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x7dc87819 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x9e5e86e1 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x9eac8c64 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xaa7788a9 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0xad18123f pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0xb695b60a pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0xbec92007 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xc3735d06 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0xc446bd16 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xd6f7f761 paride_unregister +EXPORT_SYMBOL drivers/char/agp/agpgart 0x01eb4b0f agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0c0c8a27 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x161f4d06 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x1aee6699 agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2691868a agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2a02cded agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2f7c47df get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3454bd87 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x361e912b agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3c699b42 agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x50a981f9 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x55a64a3c agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x5fa8de1d agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x633dd7d0 agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7516c83a agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7a35d904 agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x846df831 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x86324ddf agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xaff00585 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb4e0e8c9 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb926e424 agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbb791cc6 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbf75222d agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc048ff8d agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc53b4d6e agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xcac1b2ab agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xdc820533 agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0xdcdfeb22 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe46a3710 agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xebc43f6d agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf07db8b7 agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xfaaba39c agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0xfbe5b29a agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/apm-emulation 0x129e74f2 apm_get_power_status +EXPORT_SYMBOL drivers/char/apm-emulation 0xdf3329b8 apm_queue_event +EXPORT_SYMBOL drivers/char/generic_serial 0x03fce69f gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x292edfa9 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x307c3c6a gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x35d3f8b3 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0x3926eb1b gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x44eba8d1 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x4884c097 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x554366aa gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x57ac06ec gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x71514e55 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0x81882d1e gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x83df11be gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x8afa5935 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0xbcbd94ef gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0xeaa68b0e gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xf306e968 gs_flush_chars +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x115004c8 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x181085d3 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x35c2f457 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3e23ca75 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x43d54c60 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x59f91597 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5fb1c376 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x651fcf15 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x76b6f86d ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7700d3e9 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7b1d1325 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x917db139 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa16decf7 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa5ad5afa ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa5f9ab62 ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xaed57db1 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc5c80e90 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdd7a2003 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdedad129 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe0ba7098 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf05b148c ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf2f9a72b ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf5bbd3e3 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/edac/edac_core 0x326cd76c edac_mc_find +EXPORT_SYMBOL drivers/edac/edac_core 0xb68202b3 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0xd0037b3e edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x043907fa drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0612f667 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f3a233 drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x090f8b25 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0b354813 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x10889d74 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x137f1373 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1761006c drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1a165826 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ab9290f drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b090d4a drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d744605 drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f929f80 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x24569c12 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x284ef198 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2927baf7 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2b3cd7b5 drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2b66681e drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x31aeba7e drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0x31e35c0f drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x38505c1b drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x38d6d293 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x391755da drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x391b5be2 drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3bd61e6c drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3cac74a4 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e2cc2c4 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x40a244fd drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x425a3303 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x435c4e31 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x436d86cc drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x48c1db30 drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4940b824 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49cc50e8 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4c64021c drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4fa3c6e3 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x50d2d80a drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53d3b0e0 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a5a4e77 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b351e16 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b74547c drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5c25046e drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5c74ddb5 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5c7d4c49 drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x649c2441 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0x65251641 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x65a8c11b drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x69d28175 drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7042ae32 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7062e361 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x72d95b84 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x76360a28 drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b302b90 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7dc4e62c drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e1000b9 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x80e5738e drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8113d8f2 drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x81526d3e drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8321a6ee drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a333bd drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x86060679 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x86f8fb53 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88c3f825 drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8be4c55e drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8c615ce6 drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x90348d4e drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x915ee3e3 drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x91b87218 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94c750a4 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9901fc9e drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x994af995 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b825da7 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9bb7a0c5 drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9c46a04d drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9c6c1b06 drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e27717d drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9f04a8b5 drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa00e69d9 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa08c9c1e drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1a55c85 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4be4a50 drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4ec17c7 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xac4f447f drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xad0c4775 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xae701541 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb0a869d3 drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb59ce80f drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb94627fb drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb9caa03b drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe45f4ee drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf23ddd7 drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf7aaa10 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbfa8544d drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc178b7d8 drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc360377d drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc437d5d0 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6271676 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcab242d9 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcba077a4 drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0xce1dc6a8 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcf0a8b28 drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd22648b5 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2d955d0 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3e60ee1 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4613cbc drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8d4034c drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd925965e drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9578bc8 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9dacc40 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb473cdb drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xde3604fa drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xde769d0e drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf1878a7 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf5a8df8 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe0953b5b drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe09f8b51 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1ab50b5 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7b6b6bc drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe830b00c drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xea58fd66 drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeaac21da drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2bfd945 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf41d4c40 drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf867208e drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf88c8dfb drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfab1ff drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x0fa26933 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xdbfdd3e4 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xdc507c85 amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06ddb972 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0782c2de hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07ccaed4 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0aaccedd hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b1e7424 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x12396b0f hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x20a02098 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x25fabbd0 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2603b398 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x37e2f80c hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3a051fa3 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3f7dc1d6 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40884681 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x45210107 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4b468754 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4e27643c hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x546fb124 hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57974f04 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d3b7a08 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d5a694d hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62e847c5 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68843599 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x69785a92 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6d450d22 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6fbb9da5 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7c803e04 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7e96acf4 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ecfe480 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80842699 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80e76b6c hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x85946adc hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8bf7c0d0 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x932de8b2 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94262054 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9b229b60 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa206907a hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa6589bc6 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7e24a89 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacd749be hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb0555044 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb46dd301 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb52649b4 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb97e1b3b hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc777dc6e hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xce4e85de hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xceaa3429 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xceb40dd0 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0bc296e hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd13bab17 hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd38ab36f hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd5bab748 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd70f6aa4 hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd8aac10c hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdb034af2 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdcfd6b92 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xddb31d2d hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf23dcdf hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe67d2425 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xedafd213 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef11c0d5 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf2af3a2f hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf78fe3cf hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfaf95f09 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x7dff18e6 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcd12a972 ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xfae0fc12 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x08a37740 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x31688ea5 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x31ef7805 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x433ee63c rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x88c32394 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb0900f14 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x075b2d39 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x08ac1a67 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2c2596d1 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x37286315 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x66cb9240 ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6c6a10aa ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x82a1380c ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8cea47cf ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8f5bc482 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9e1f8780 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xaaafed54 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb91ce412 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc57b9900 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdbfc647b ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe42944df ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe5006f6a ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe65789e2 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x012d31f9 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x060d382f ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09ed9ff7 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1127a057 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1316b999 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x15a4d302 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e4eca0a ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2045075c ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x22e0a647 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2583b717 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x27bbe130 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x28436852 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2a6b6869 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x34a34ed1 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x390a8553 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x39dfec4c ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x42d3e967 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x45f8a67a ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4918c284 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4f90081b ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x501fd388 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55159b06 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x585b79c4 ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5ac17069 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c7cba2b ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5e688d74 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x61cbd1de ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x687d2ead ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6fa9dcc6 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x721474d2 ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74ae1298 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7751a527 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x776ef5dc ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7bf693c1 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7e809795 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8103a0e1 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x88037c0a ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x90a444b7 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x914ab3d3 ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d4a4251 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9ffff9e5 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5409266 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaa542a88 ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xac4cc8dc ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xace2d405 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad2da6a4 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbe940753 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc0d12189 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc212862f ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc2f028b4 ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc78662ef ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc840c50a ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd0fcebe2 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd3d4a404 ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd4e395ba ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd53952fb ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9fc6690 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdc1ffd82 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdc4da077 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde16904b ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe3487814 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf231c06e ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf2e8af4a ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf40f9e7f ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf605c756 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6654ec9 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x021c4691 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1657af8b ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x353e2d29 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x523f7bd2 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x72cf5c69 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7ce636bc ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x969a2cc8 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa7e211b8 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa97dba0e ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xda212490 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xefd53207 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf6212022 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2a58db8f ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3651b515 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3dc3bb5d ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4c4f4627 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d72dabc ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6174593e ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6c973d96 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x73a64cb5 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9722aee2 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0a876511 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0f6f062e iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x25eca31d iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x608b7e6a iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x820ca14b iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbf0d13bf iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xcbb1d092 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xcf1846b1 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x11457d20 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x414256b6 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4151d66d rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x43438853 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4486a73c rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x484000be rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4d65c96e rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4f0b818b rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9f515857 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa22eccc8 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaaa014e0 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xae21c458 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb090aa42 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb8ec3119 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbb4a8c58 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbbe9c6d8 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xce611aac rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xeaa8310d rdma_destroy_qp +EXPORT_SYMBOL drivers/input/gameport/gameport 0x02a24fe6 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x04718b90 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x2c0ce962 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x41e62d71 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x4f21b6f8 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x7265ed47 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0xcf72b23f gameport_start_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0xdd8b729b __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xf4c29d3e gameport_unregister_driver +EXPORT_SYMBOL drivers/input/input-polldev 0x217fed5f input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x2477cb95 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xa1fe6348 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xafb5da43 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/serio/i8042 0x4fdee897 i8042_command +EXPORT_SYMBOL drivers/md/dm-log 0x343db26e dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-log 0x4c5faceb dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-log 0x7763f175 dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-log 0xc8871cee dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-mod 0x0cce7780 dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0x189c7e00 dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-mod 0x1a85ce2f dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x23d1f995 dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0x48e3f450 dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x4fdca81f dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0x596638c5 dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x6e0eb5a8 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x7faa5b63 dm_register_target +EXPORT_SYMBOL drivers/md/dm-mod 0x810d3b0a dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x93ec5088 dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0x95627fb6 dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0xa31ec6ee dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-mod 0xb2ba7f2a dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xdd2f9e34 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0xe47d9893 dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0xe821b9a6 dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0xe94e90b9 dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0xfed2c5d8 dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-snapshot 0x79994399 dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0xb3cd9c5b dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/dm-snapshot 0xd87769bd dm_exception_store_create +EXPORT_SYMBOL drivers/md/dm-snapshot 0xf92319fe dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/md-mod 0x06cdef8a md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0x2101b126 md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x24451ff3 md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x245a0883 md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0x2d1a7354 unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x51f09edb bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0x5c164e66 bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0x6a3f99d0 md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x7b60e780 register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x7f2a5e86 md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0x99ad686e md_wakeup_thread +EXPORT_SYMBOL drivers/md/md-mod 0x9afb7dd8 md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0xa5e254b9 md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0xaf88eebd bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0xafa620a5 bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0xc3686d7d bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0xcf03c066 bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0xd31021b3 md_error +EXPORT_SYMBOL drivers/md/md-mod 0xd74cb888 md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0xeb181110 md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0xedde437c bitmap_endwrite +EXPORT_SYMBOL drivers/md/md-mod 0xffb8c119 md_write_start +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x1841aae2 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0xdf6dbf7e mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0xc4e5d29e mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xf6fc67da mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x35ca944d mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xbfdd8d33 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xaf510c62 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x06d7e4a6 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1167eaaf flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x14beaa82 flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x15752f3d flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2988a76c flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x38f95888 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x40014088 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4559155b flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4a1b9e63 flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x547b9134 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x902bbee9 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9f6a2966 flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa9df798d flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb02597a5 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb350ceda flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb3fede5b flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbf672da2 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc13414d7 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe202b684 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf3c1b512 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf7eb8d3b flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x148c9413 bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x3638f594 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7f915a3c bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf31b1e2e bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0be038e3 rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x11117f17 dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4266d0d1 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x503c9122 dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9931be56 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9c56ad0c dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xbac69be2 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf11e57b3 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xfd920d57 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x67072640 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00cbdc37 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x09ba1998 dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0f9a7de4 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee8494 dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14beabdf dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c136db dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e60b7a1 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29bbf7a8 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x48a4306c dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a5ad2b0 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4df5b246 dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4f7260c4 dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5908fe37 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6b00c62c dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7656708f dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7878003e dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7e8ebd4e dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x84813a02 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8b0331b4 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x920e7616 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9faa884d dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa56a9981 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc3b57a2c dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc41083f dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd9c49af8 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe164303e dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe20c965c dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe54b83ca dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe8074fa5 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf02058f1 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2031ad9 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf6080e23 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf61ff828 dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x228c9573 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x5c11dd2f dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6605a902 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6c1eb55f dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa975bca3 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xb6d5fcdc dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x96032a4e af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x213508e8 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x226ee046 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5d1d746b dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7a8e254a dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x88b248e1 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x986f1edf dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9bb9d52d dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb4b26a47 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xca07e1b0 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4e76e99 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf5eaa11b dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x1074224b af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x8dafad9a au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x922dcc40 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x7d2a76b3 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x9fdaee24 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x8f9ba47c cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xbfe55e2f cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xf036521d cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x00c06059 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x1cfb2ec7 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x434ac753 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x9a161e80 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xc1aa4b92 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x98c009b0 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x2094aee5 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5701469b dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x629b6e50 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6aec1db0 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x94426a0d dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe248496d dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x3352683c dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x99b521dd dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0aaf9444 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x29866652 dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x56d83370 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x947f4990 dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd46fb96a dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xfbba5b46 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x16b9c6b9 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x50c1f76a dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xbf19d045 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x4a71d682 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xf3a0f8a5 isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x7ab954c6 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xe82bf2c9 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xd77a536f l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xffb6f796 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xda789cb4 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x83ebc593 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x0a95551b lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xdc5d79a5 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x7acf8798 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x0d199f3b mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x99b4b48b nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x4df766da nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x89fd1fca or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xe220e2c6 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x39727e76 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xe5d5e1b7 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x9858b0a4 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x9a1b45a5 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x9106438f si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x9f4667dc sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x49ce2fa0 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x642b41b0 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x9cfbaa73 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xecaf8dd4 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x73d439ad stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x1482e25e stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x16d79929 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xb91d2830 tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x7263afd5 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xa2fa9659 tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x8741c338 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x8dfa3658 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x311b00fd tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x52ec7f86 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x1cad9e19 tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x69516eb2 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x7f0265de ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0xce7eb904 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xb19e566a zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x8107bc2a ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x188ad60c ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x334dd7c6 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x03953811 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x1ae8bceb bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xc013b865 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x5c75cdee btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xf9359c34 btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/cpia 0x3b3e0d14 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xbf571c7f cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x743e7fb1 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf150ee75 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x106492f5 vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xaa7bb5a4 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x254aad87 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x67b023c8 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x93ec36db cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb4ecf0a6 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xbb6f44ac cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xc8f24c3c cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x50793a27 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x528c1815 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x59be1792 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x603da95e cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x793d5a42 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf5fcd71d cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf984e167 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x07cf2ec9 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x08454118 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x08fb014d cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x33d89775 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x381baa4f cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x463aa1bf cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4cbd2855 cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6ea7dea0 cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6eafb4e3 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7842c148 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8e996c19 cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x99296e38 cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b2d6f97 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xadef1c46 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb7dfd296 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbcddef92 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc10eaf91 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc190021b cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc52dc518 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd5d8b36e cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdf7e8baf cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xee40cf15 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x3a6224c0 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x407076b2 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x005d187f gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x010ae2bb gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1ba54ebf gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x33afd47e gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x5fb7e5a0 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc2f7bb4a gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf8b39a4d gspca_disconnect +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x04fb7173 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3a0ac5cf ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3fa1b10d ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4608efb4 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4d9cc94b ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4e7ca1bb ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x6d2ba72f ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x92745e71 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xca302713 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd3b89cdf ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xefcc26e9 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x06ca5785 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x06ec3e73 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27fd8a0a saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2e5c9dcb saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6f52b08b saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x71661ca1 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x98c6365a saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa0e562bc saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd17ec76f saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xeca69230 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xee5b038a saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xff5847b1 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x031f1999 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x05fb0709 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x1cbda453 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x38780929 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x565af5c2 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x569bbe7b soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x8b811ec9 soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcb748dbf soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe40475af soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/tveeprom 0x43742857 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0x83126a26 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x26af5b87 RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x540533bd usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x706a76f9 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x70fa62fe usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa3d20aed usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa8caef21 RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xb3f01b51 RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xbc4a757d RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xc43dd857 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xff0ca7a6 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xa463ba10 v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x6f3efc00 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xca489f3b v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x04559efc videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0cb0e64f videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x44f98e30 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4a273cbe videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4eaad5b6 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x9afd211a videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x35bca22b video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x7414be79 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x76deafb1 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x86ec06ad video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x973d0e34 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0xa9bd8888 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0xbd6dd2d2 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xda3cff53 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xebc00878 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x043d045a videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x53aa7dcd videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x76d2d02d videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xa10933d7 videocodec_unregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x101e55c7 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1d7c5f4c mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2db48dc8 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2f78218e mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x300f7732 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x30fd587a mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3162099e mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x32d87fa3 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x40403aef mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4297e2f9 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x464652ec mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4db2b745 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4fb413cf mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x598ceffc mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5df19328 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x60e6d615 mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6f928aee mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x76cd1b7d mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x770008e0 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x93e3e102 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x98b0f2ee mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9fe37a4a mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa323117f mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xab6f1a73 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb1328c01 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0bfd9b6 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdcb3f568 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe883f3ec mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x111b908d mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2a41c7ce mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2b10bbde mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x32808814 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x32a29cf6 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3ffc397b mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x665094d4 mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7bcac1d4 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7e80a0d6 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x821cf010 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8536e076 mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x872d8be6 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8f70ea59 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa3c5b06c mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa40b4b8a mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa71d320e mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbb6f31fc mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbbd685de mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbbf086c3 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbe91b785 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd504a1c4 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xef36f8cd mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf1334655 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf2e71709 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf9e87f65 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xff1b58bf mptscsih_proc_info +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x11e00f47 i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2105c0db i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x23460fc6 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4472f37e i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x463a58d4 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x47922b9f i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4e5918f8 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5c4d6015 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x71908130 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x72e7d6fa i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x839806d8 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8b878fae i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc5191540 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xcac757e5 i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xce2dd701 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdbcd00b6 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdc2a9df2 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe1e5d335 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x26daf6fa ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x337b6a03 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x34e764db ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x87b3b8a7 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa3222119 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa8d49617 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xabeb8d90 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf7ddb8a9 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x03e59371 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xfe6c07d5 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x3798b477 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xb47b28f6 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x163db38e c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0x6110b215 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0x4ab001b1 ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0x9929ee51 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x1bc09ebc tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x1eefd1a0 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x2142e711 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0x2c55802b tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x37997e8d tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0x5d2c29ff tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x5ecc6b51 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xabb2bba5 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xb0dbd642 tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xb266ce00 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xdd7f642f tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xebc64680 tifm_register_driver +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x9c0a9381 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x12df0ddd mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1ed9d980 mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x31639bc8 mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x46d802c2 __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x632c0c5d mmc_resume_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x6c0028d9 mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x767f9262 mmc_suspend_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7db1c6b4 mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8b77ebab mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9068b2ce mmc_alloc_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9c789ea9 mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xade74fe5 mmc_add_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb7ceaee3 mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb92cc1d5 mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xbf833397 mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xdcc8d941 mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf3aa6862 mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x1206b82b cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x4079eef1 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xddf90baf cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x0324b937 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x282330c1 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb20329a6 unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xfcd96b1b do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x8847605e mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x0c56120b lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x1b9dbb65 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x7ff9e8b3 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf8376c3a add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xba070ae6 mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xe406cd24 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0x1ae9beec nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0x6e2a74e8 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x234970ca nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x2bbdae63 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x27eefba5 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x489eb6ba onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x549d1392 flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd5415049 onenand_scan_bbt +EXPORT_SYMBOL drivers/net/8390 0x0fe3799f __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0x185a3aa8 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x2483465b ei_poll +EXPORT_SYMBOL drivers/net/8390 0x3424d639 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x39c0c857 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0x3e1b5664 ei_open +EXPORT_SYMBOL drivers/net/8390 0x51bcda0b ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x701f0140 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x780170ed ei_close +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xfd69535b ei_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x0c04e24e arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x22f7f065 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x277b6725 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2e33a538 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x449ff6eb arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x632e4ae6 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6650ca00 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd20f8f25 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf55b6648 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf679ed24 arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x78207292 com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xbf44b18a com20020_found +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf32fd3b4 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/bnx2 0xedc2eed2 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x5a6b2071 cnic_register_driver +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0a74bb52 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x176b61ca t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1bce5cd6 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x21b3d19a t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x291cafcd cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x405490ba cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x499651e3 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x51b20e0c dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x63cdbbcd cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7c10f7c8 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xad394431 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb103e638 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb9123262 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc8799ca6 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xed77c484 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf7d73cd0 t3_l2e_free +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x0d932a0a hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x834070b6 hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb3514fe8 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xc0fe6d92 hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xd5279c19 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x48f8eda6 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4fa8cbf6 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x65a11886 sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x670249e4 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb130afb1 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xbdf91562 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xea733e1b sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf8504435 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf90141c8 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf974ce1a irda_unregister_dongle +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x25921a71 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x3870734a generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0x9e93cfd1 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xbacb66cb mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0xc9216551 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xcbd3112e mii_check_media +EXPORT_SYMBOL drivers/net/mii 0xda2b4d2f mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xeb46ac9a mii_ethtool_sset +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x2a284f79 free_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x6e9526ee alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x091a36ae ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0x230c1f27 ppp_input_error +EXPORT_SYMBOL drivers/net/ppp_generic 0x73e4dfb3 ppp_register_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x7faa0318 ppp_input +EXPORT_SYMBOL drivers/net/ppp_generic 0x8bf9e247 ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0xb5fce144 ppp_register_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0xcc0e1974 ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0xdc87852f ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xe6f28570 ppp_output_wakeup +EXPORT_SYMBOL drivers/net/ppp_generic 0xeaa41eda ppp_unregister_channel +EXPORT_SYMBOL drivers/net/pppox 0x19ade2d1 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x68e7225b register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x9746221a pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x2278e94b slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0x26b760c4 slhc_init +EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0x62538167 slhc_toss +EXPORT_SYMBOL drivers/net/slhc 0x7e87227e slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7 slhc_uncompress +EXPORT_SYMBOL drivers/net/sungem_phy 0xadf34075 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x153e6011 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x21885ac9 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x5a1b31b6 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xdcef4171 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xed50f769 tmsdev_term +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x0b21a26e hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0x0d876e79 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x0ee633bc hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x59a6d724 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7364d8a6 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9ca00888 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xaac84215 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xabb6b310 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0xd1808590 hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0xefa77d71 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0xfd6a67c6 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wireless/airo 0x39b03632 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x62001b38 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x9df587ed init_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x7aac253c ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xb903dfb3 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x907576c1 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xcfe4364f atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xe611ffe3 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0e031352 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0ff29be3 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2664423b hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2b5f7aba hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x43359dcd hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x45eb6702 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x53e76401 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x58a37b35 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5e6d530c hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x66172afd hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7fa2ec81 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x81f46a61 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x84c44a0b hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x88d18261 hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x93a8a4d9 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x98b15ad1 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb5d8611b hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb9755e06 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc154c94d hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc27ab14d hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcab58871 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd82d5fa2 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd8443e80 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf8e8a93a hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf8feb9a7 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x005e6669 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x08e22a9d ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0a5d4a16 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1951cfe6 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1d9adea7 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x21624db4 ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x31916710 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3b8ec138 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4dc91d2c ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x508bb1cc ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x58fc0791 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5966411b ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6a67a986 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x72926bb6 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7a05e504 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x86540113 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x87da780e ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x915e3ea5 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9ab22f1a ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xad1dd7ae ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd42149d0 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x010b97a3 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x032c6cd4 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x039a1f3f iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05838179 iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07df623b iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a196c41 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0aca2c68 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0aed3368 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c5fa42c iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11c19390 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x121ddd03 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1321f178 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x146b9ea4 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15b5b6ae iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x161b19eb iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x16af031e iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c675b22 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d4599ad iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e5f08e9 iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21eb2d26 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22a182a2 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25445dca iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25e9e738 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x305dacb7 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3177e610 iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x31f4754e iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x323e15e0 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33e209de iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x340b4312 iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35483ed3 iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38326c3c iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38df728e iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x397a01c0 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3c93933d iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d2695de iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41b8ca2c iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x447ed787 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4642e876 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46e4b7ae iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x477bb4dc iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48a2cca8 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48f2555a iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x491ecb9a iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4afa9bb8 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b9765c4 iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50ed3bb3 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x563c2d68 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56e49b67 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59ad0aa7 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b4cbb4c iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cd47cbc iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ff40a96 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61265b94 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62a9dd46 iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6389fb4d iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x638cce0e iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x65649d90 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6888dee0 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c947462 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70095a00 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72b34944 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7439a141 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x75414cd2 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x75aa3e06 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77f46f6f iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7884ec7b iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79821ead iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ba4b801 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c48c135 iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f5dea7b iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8271384e iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82afe8fa iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83caf94f iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83f667e7 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8573b1af iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85898a36 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a3b59a2 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a4e8f41 iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b57416b iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8de82299 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e521791 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x90396674 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93d906ac iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93db6d1e iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95d30ece iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa134d5a1 iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3afa1b5 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa5309c8d iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa76ac50c iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad7bbd77 iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad8b6a4c iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xadd0fda7 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaedc7048 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb648b18c iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6537ef0 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb7207713 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb77f2c1d iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb945395c iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xba46fd4d iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbaf74908 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd14c2cb iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe1863e7 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc171ffd5 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3cc4a33 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc95be193 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcc0a7f63 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xce4fc2dc iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcea2982d iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcecdb159 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf081d54 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1c4e405 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd40567e9 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd491eead iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd691c6ed iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdaa5d01d iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcff63b6 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xde3453df iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdfae640d iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1080b18 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe21ceed6 iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4484e42 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4804359 iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea3cb037 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeadd7a27 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebc3e8f7 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xecbc8dd8 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed10c7ed iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef0303a5 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1864bb0 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf4223fe1 iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf55a5b7d iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf62da39d iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6e88430 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf76d302d iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf83bdf35 iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9828cb3 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb13be38 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff55456e iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xffee2d69 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x04cdff55 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x1d4fb459 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xdba0de61 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf12cd7b0 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xfd2a78d7 alloc_orinocodev +EXPORT_SYMBOL drivers/parport/parport 0x054ed339 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x18a03476 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x1b9f768a parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x1d748ce7 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x264e984b parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x2f118e1b parport_read +EXPORT_SYMBOL drivers/parport/parport 0x3528d736 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x39621dfd parport_release +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4ef6dc41 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x57627a3d parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x63325de8 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x787e2cce parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x8024e8f0 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x80b4bbf6 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x8158d3ef parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x85c11118 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa25168f8 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xa4c8d3aa parport_write +EXPORT_SYMBOL drivers/parport/parport 0xaa1572d1 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0xb2d0934a parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xbba0f869 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0xc12e0292 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0xc9fb9134 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xd093861a parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xda4b4b81 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0xe74c3088 parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xe8a163ab parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xed0bb7eb parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0xf5d38281 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0xfd8e91d0 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport_pc 0xa359ef32 parport_pc_unregister_port +EXPORT_SYMBOL drivers/parport/parport_pc 0xee962663 parport_pc_probe_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x05665693 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1109dbab pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x30afc194 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4ad4f772 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5084a745 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5793b937 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5ce322b2 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x631208a1 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8029ffd1 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa3199ce9 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa3883c5f pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc058a006 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xccd1167c pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe8dba1f3 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf5403e28 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x067ad1f2 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x076d7f37 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0787401b pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0aa2b33e pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x18820638 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f5b7fdd pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33f691ac pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x35359931 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x35bafbaf pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x45220f9b pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x476b9bcb pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x482c35ae pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x50c23b25 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x556e7a09 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5e689c82 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6470cc5a pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x64c981e7 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x65dde7fb pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6d17f385 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x79535b48 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7a3d12ad destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x88c47673 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x994557da pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa42564ea pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb9c3a5d2 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbfb773a9 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc319f3dd pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc3cc2097 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc66615dd pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xca815069 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcd17d532 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd8fec119 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xec4a7116 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xf32b662f pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x110f7ada pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2762d023 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3f540633 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x986306e3 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xac64e3b3 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd0f24cb4 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf202ecfe fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xfd9fc9a1 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x08690cbc fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x150f431b fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1d08e9d1 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x275991b1 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2a413ceb fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2a76bf10 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2ee3a7fe fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3108bce4 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x418c317a fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x44981389 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x45e4cee2 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x465e7805 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4b773cae fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4bfede5f fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5f0bff3f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x632b38c5 __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x63526471 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6a9a8f44 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x748e7543 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x83051777 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x85d3551d fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa5442bc1 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xab17bdbc fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xab63135b fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xafc2d3c6 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb227bda3 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb39205db fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbbceeb1d fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbfc120ca fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc0f3f61a fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc251ed68 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc675f0da fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd49941d2 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd54af8d1 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdb43eb32 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe401890d fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf4cc9ca8 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf5966a1d fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf9c085a7 fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfaddade7 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xff7543f1 fc_rport_init +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x4b8cf3ac mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x04805af2 osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1204bf56 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x21037093 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x23a525b5 osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2484139a osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x28d287eb osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3238a027 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4f68caaa osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x51304488 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5d17d4c0 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5f1644cc osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x632786a0 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6ba9605c osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x74b34fd2 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7a0dd818 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8dee2776 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8f5ce000 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa024fa47 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb1309d26 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbdbcda4e osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc38bb44a osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd1a55a3b osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd2693a52 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd3318b93 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd92d7c07 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xda7fef06 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdd15f172 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdee9a15c osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe68dc434 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe7325bb9 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec9b5041 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf418d24d osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xb3a6f8af osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xed0cff18 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf11418b7 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x80cea573 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x9a8c4471 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb808cef1 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb85427bb qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd7a332c1 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xfa421b95 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/raid_class 0x0b9b477c raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xbe2a20b9 raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0xf6f8cf31 raid_class_release +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x02439fa8 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0f429fc4 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2a0fd40a fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x61b67c71 fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x82a6c3b3 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x86ee236e fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x87101839 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8e548e33 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x95c65dea fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa658e3a2 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xce8f8723 fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfb407d94 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1afb3687 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1ccdc620 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2174b01f sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x292cd1e7 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2c672748 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2cf39f9d sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3a616dec sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3c40f90c sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3ddb596b sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x51f9f4f1 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x65e7f283 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6f78a740 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x709d4389 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x863146d6 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8cb39c0c sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9db1d0e8 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa5011d5b sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xab4ac3ee sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc98e28f4 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd3762833 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdc394146 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe3b21f7f sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe71d159a sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf241c0a4 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfc0f5342 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfd981edf sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x0be2def2 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x31a02f70 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7d3243d3 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x9bdf888b spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xe9951b6b spi_dv_device +EXPORT_SYMBOL drivers/serial/8250 0x20477e5e serial8250_register_port +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/serial/serial_core 0x594ba6ac uart_update_timeout +EXPORT_SYMBOL drivers/serial/serial_core 0x7464a6f8 uart_get_baud_rate +EXPORT_SYMBOL drivers/serial/serial_core 0x81e66287 uart_resume_port +EXPORT_SYMBOL drivers/serial/serial_core 0x95dc8608 uart_unregister_driver +EXPORT_SYMBOL drivers/serial/serial_core 0x9924d07e uart_add_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0xb9f64eff uart_match_port +EXPORT_SYMBOL drivers/serial/serial_core 0xdca553b5 uart_write_wakeup +EXPORT_SYMBOL drivers/serial/serial_core 0xde2c230b uart_get_divisor +EXPORT_SYMBOL drivers/serial/serial_core 0xde380ec3 uart_remove_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0xebb1a673 uart_suspend_port +EXPORT_SYMBOL drivers/serial/serial_core 0xedfd3fc6 uart_register_driver +EXPORT_SYMBOL drivers/ssb/ssb 0x1414a83d ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0x1e9a2b72 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x208e4709 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x45602269 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x5fb9e52b ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0x87bc8737 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x8ab54a9a ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0x9e94a37a ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xa2e752f4 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xa458a5bd ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xae9e1c82 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0xbb60d903 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0xc03bfa53 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xcab9cdd8 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xcba6319c __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0xcdc909f8 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xdca56fec ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xde5edbb7 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xe7389ce7 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/telephony/ixj 0x4099aac4 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x4f700092 phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xcb9f4b5b phone_unregister_device +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x3e12aa2c usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x417b930f net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/gadget/net2280 0xa15f49bf usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xa58ca973 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x18a7109b usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xd6602e12 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x22d6574f lcd_device_register +EXPORT_SYMBOL drivers/video/backlight/lcd 0x81745556 lcd_device_unregister +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0f27973b cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x2fcaf42c cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x5c0bc346 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0xd11be9b3 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/display/display 0x0888482c display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0x4130f63a display_device_register +EXPORT_SYMBOL drivers/video/output 0xc9356017 video_output_register +EXPORT_SYMBOL drivers/video/output 0xfdf29ce8 video_output_unregister +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x77e54f10 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x939ffab6 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0xaaf8ef21 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xcffad897 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xe9a69cef svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf318debf svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0xfbe79f6f svga_tilecursor +EXPORT_SYMBOL drivers/video/syscopyarea 0x9d6b58f6 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x5a76c798 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x9b5f3b77 sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x2b4b6dfe w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x96c644bb w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x172b27a5 w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x81e7eb9e w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x925a5562 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xf829bd27 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x856d9eec w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xa1935174 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0xaa1f4bba w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xb9874708 w1_register_family +EXPORT_SYMBOL fs/configfs/configfs 0x21492b61 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0x5ae39e7c config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0x5c2cf4cb config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x5da7d9fb configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x7b6d264a config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0xb49c7507 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xb98175b6 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xc0522483 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xc5eb645c config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xd36d15aa configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0xed3a281f config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xf0365435 config_group_find_item +EXPORT_SYMBOL fs/fscache/fscache 0x0675defd fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0bad7ebb __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x17f92145 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x2187cdba fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x2ab1a832 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x31e67e3c fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x3d128c31 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x3e4e504f __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4a1c0c29 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x5225d15f fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x58ea0ef0 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x6da43904 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x74ee7206 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x7d2d7579 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x916581f1 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xa6420459 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb0486e12 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0xb5319a1b __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xb9aab73b __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xbfbc3e9d fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0xcd12dfb7 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xd6a86651 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0xed4e7bd0 __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xfc3b885b __fscache_check_page_write +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x15ce5791 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x1a538de6 qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x44675851 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0xea0b63b5 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xfb63515a qtree_write_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc-t10dif 0xb6896671 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x01ba2100 make_8023_client +EXPORT_SYMBOL net/802/p8023 0xa660f1d4 destroy_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0b11ff5a p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x160dba0f p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x2d9fd945 v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x2f23a897 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x39653968 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x3993e959 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x43605695 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x5124cfa8 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x58498de9 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x5859dbd1 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x67d7baf9 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x68fd1429 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x7310a66f p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x8178be59 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x8f34fe15 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x99a7f30f p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x99aa7841 p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa024046c p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0xb21b2dca p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xcb46c73d p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0xcf3c2c6e p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xd439540f p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe6036b7e p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0xf4fa4799 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0xfca9e1ec p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xfe9e481e v9fs_unregister_trans +EXPORT_SYMBOL net/appletalk/appletalk 0x152cb0d2 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x88d50bc2 atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0x94f10f7f alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0xf1fac8c8 aarp_send_ddp +EXPORT_SYMBOL net/atm/atm 0x07d917c5 atm_charge +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x31eb46b9 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x4eb32d3f vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x5b6afa79 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x7baab4af vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x7dffb76d register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x82a5f164 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8a1366b8 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0xbbf04321 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xe704fd9a atm_dev_register +EXPORT_SYMBOL net/atm/atm 0xf21022d4 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0xf359d198 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x11d353f0 ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x44a82843 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x4897243b ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x573b20af ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xb5122cc7 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0xb9e9e3e7 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xcbe12192 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xd0c57095 ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xf712d4ea ax25_hard_header +EXPORT_SYMBOL net/bluetooth/bluetooth 0x02674c06 hci_send_acl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x03e34766 hci_unregister_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x0540871d bt_sock_ioctl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x09b75287 bt_sock_recvmsg +EXPORT_SYMBOL net/bluetooth/bluetooth 0x0bf02864 bt_sock_poll +EXPORT_SYMBOL net/bluetooth/bluetooth 0x1b383d16 bt_accept_dequeue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x2e9b182f hci_register_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0x34b7a27a hci_unregister_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0x49d97070 hci_resume_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4ae7c64e hci_conn_hold_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4d93bb25 bt_accept_enqueue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x56849837 bt_sock_link +EXPORT_SYMBOL net/bluetooth/bluetooth 0x610d7589 hci_connect +EXPORT_SYMBOL net/bluetooth/bluetooth 0x6960e4b9 hci_recv_fragment +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae bt_err +EXPORT_SYMBOL net/bluetooth/bluetooth 0x78c6525d bt_sock_wait_state +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7ca38ad3 hci_conn_change_link_key +EXPORT_SYMBOL net/bluetooth/bluetooth 0x85f9da06 bt_sock_register +EXPORT_SYMBOL net/bluetooth/bluetooth 0x895f42f5 hci_conn_switch_role +EXPORT_SYMBOL net/bluetooth/bluetooth 0x965a6b50 bt_accept_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x96d3b82d hci_alloc_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x9c114447 hci_conn_security +EXPORT_SYMBOL net/bluetooth/bluetooth 0xa867229c hci_register_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0xae245633 hci_unregister_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0xb5df8899 hci_send_sco +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0 batostr +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc38bff99 hci_free_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551 baswap +EXPORT_SYMBOL net/bluetooth/bluetooth 0xce176520 hci_conn_check_link_mode +EXPORT_SYMBOL net/bluetooth/bluetooth 0xdd28c349 hci_suspend_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xdd7b62fb hci_register_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xe23487e3 hci_get_route +EXPORT_SYMBOL net/bluetooth/bluetooth 0xe8032991 bt_sock_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0xeaa8aca7 hci_conn_put_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db bt_sock_unregister +EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88 l2cap_load +EXPORT_SYMBOL net/bridge/bridge 0x0d010efe br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x3253b52d ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x998600e3 ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xa20312a0 ebt_register_table +EXPORT_SYMBOL net/can/can 0x50063c92 can_rx_register +EXPORT_SYMBOL net/can/can 0x5d7e7711 can_proto_register +EXPORT_SYMBOL net/can/can 0x81ef6067 can_proto_unregister +EXPORT_SYMBOL net/can/can 0xe2c1b4fd can_rx_unregister +EXPORT_SYMBOL net/can/can 0xf1c90c95 can_send +EXPORT_SYMBOL net/ieee802154/nl802154 0x0046af91 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x2798d2de ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x8e79b06e ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xa62f8064 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xa953d663 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xe9d89276 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x5970a7af arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xa08f0fa2 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xa9c41258 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x2749e687 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xcffb3d1e ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd8775d8e ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x20fe318c nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x6f672f02 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7a20cba9 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbf5d3c55 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xc9350667 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd47863df nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xe1388624 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/tunnel4 0xe4c0052e xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv4/tunnel4 0xfdd6f06c xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv6/ipv6 0x09419ca0 ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x0c0ac1ad in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0x0e409c76 ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0x120f4055 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0x187c6589 xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0x1b8e2b41 ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x1c82d656 nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/ipv6 0x243827ee ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0x2a2e7dde ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x2ba41e11 ip6_frag_match +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x35752291 inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x49088a7f rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0x498882e9 ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x67273198 ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0x68412b4a inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0x68a46ecc ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x6ee0945d ndisc_build_skb +EXPORT_SYMBOL net/ipv6/ipv6 0x7b1519c3 inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0xa417949e inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0xaa2470e6 ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0xb2e6397f xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0xbfb35642 inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0xc1802d39 inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xc63f72cf ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xcb5ee6f0 xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xd6ad5489 ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0xd7c8a4f6 ip6_route_output +EXPORT_SYMBOL net/ipv6/ipv6 0xe197fc4f inet6_del_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xedccb557 ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0xf45fc821 xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0xf4b5fefa inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xf94c717e icmpv6_send +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x16f2c0b7 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6c60f7a5 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xc4f99f35 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xcd2789c2 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/tunnel6 0x51631874 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xf3e7a06a xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4775e437 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x70981648 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa6839a9b ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xbf9e5281 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc141fd87 ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd204a7ad ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd6e2499d ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xee1f115d ircomm_flow_request +EXPORT_SYMBOL net/irda/irda 0x0562256f async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x05d7cfe5 irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x13919a2b irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0x19d79c82 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0x1c51e992 hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x1ed20177 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x22b0f52d hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x2c024100 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x2cc830d1 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0x30827e1c irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3b2e9df9 hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x3d69bdd3 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x3e17554f irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x42c7c5ce irias_find_object +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4c1a243a irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x519118cc irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0x5327f875 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x538fe1e0 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0x5504cf7c hashbin_new +EXPORT_SYMBOL net/irda/irda 0x57fb1ed2 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x5aad87aa irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x5d609063 irias_new_object +EXPORT_SYMBOL net/irda/irda 0x5eb99127 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x62802d87 iriap_close +EXPORT_SYMBOL net/irda/irda 0x6621aa8a hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x6c3a0468 iriap_open +EXPORT_SYMBOL net/irda/irda 0x701e028e irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7998cfa8 irttp_dup +EXPORT_SYMBOL net/irda/irda 0x7ef72604 async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x7f2e59d1 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x910323ec irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0xa284fee6 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0xaa4bc885 irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0xb62c96ef irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xba6fdfa7 irlap_open +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xbf36347a irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xdb7c11a8 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0xde38f29f irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe2f84c82 hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xe955eddf alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf25fd0e2 irlap_close +EXPORT_SYMBOL net/irda/irda 0xf39b7fe0 irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xf73f315c proc_irda +EXPORT_SYMBOL net/lapb/lapb 0x6a046b73 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x7df70601 lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0x7f4b2591 lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x9d6ed76d lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0xaea8683c lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xf8b8b192 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0xf8b8bb13 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0xfea9daaf lapb_setparms +EXPORT_SYMBOL net/mac80211/mac80211 0x019eb7ac ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x01f40b1f ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x036d8b7a ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x045888e3 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x0dced19f ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x10febbfb __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x27ec3991 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x330424dd ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x3833e9d2 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x4f0196c4 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x638ce139 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x665fc7ac ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x68193356 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x69d487fe ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x6ad10bf6 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x6f3cc738 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x71037a3a ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x7ed1796f ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0x82fb66dc ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x8e5c67e4 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x9bd4c12d ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xb018706a __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xb1c0fc84 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0xc3ccdbfc ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xcb822e9d ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xce8f9a33 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xd09a69df ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0xda7c5e89 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe0b23a5b ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xe1df7e86 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe82447d1 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xe9b436c9 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xf0b94506 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xf3478bf5 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xf6d1558c ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xfc22956f ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xff2bbaa2 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0dcd0d60 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x13441c11 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2d7130bc unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x36eb459e unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x508abad4 register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x594c52e9 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xba48c123 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xba76921b ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xbf8fc72a ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd293eb50 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd7c8e67c register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9af0fce5 __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xfedca1be __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x4d4737ed nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x1f69a3ed xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x2d55d3a8 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x3c2be0b1 xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x56ee4715 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x693f89ca xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x74fbb0b4 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x97639ad2 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xb7734db7 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xed81305a xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xff8405b0 xt_register_matches +EXPORT_SYMBOL net/phonet/phonet 0x06928307 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0x1e9cedef pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x5644cdf6 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x7213ddd2 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x755460ad phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0xb6cf31b4 pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0xedfb052d phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0xf420d2b5 phonet_proto_register +EXPORT_SYMBOL net/rfkill/rfkill 0x06555fb9 rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x0c66ece5 rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0x1588332d rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0x22815735 rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0x57e33a27 rfkill_set_hw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x66903729 rfkill_blocked +EXPORT_SYMBOL net/rfkill/rfkill 0x938459a6 rfkill_resume_polling +EXPORT_SYMBOL net/rfkill/rfkill 0x9f5f8280 rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xd0ba1515 rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0xd6249c20 rfkill_set_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xe1e650f0 rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0xe68ce9c2 rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0xf49a4e30 rfkill_unregister +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x228df807 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x26ddf0e4 rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x43bf83ef key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x44c284a2 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7c6566c9 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7e6f6fb0 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x877f6c48 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x88773ca9 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9043bb96 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9d2bb8cf rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xab1cb709 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbe29096e rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc32cc345 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd64e4a33 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf3ad37c9 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/sunrpc/sunrpc 0x679ebb97 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b824e6b tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3e93b677 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x4e796163 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0x52e308c7 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x5e438f35 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x6f2577f0 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x7f8cf7c2 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x96ad248b tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa96b3771 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0xacb8454f tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xd95a2e15 tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xe8e4dbeb tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef3eafbc tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x5c5999ea register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x8d1364ab wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xa901cec0 wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x03b0e7f1 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1ac5cef4 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x249a3ef1 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x26b03c4b ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x2ab7ecbc regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x31d6e86a cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x36e58ce2 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x3703b8d3 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x50cba2d7 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x51d5aa76 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x5b8b43ca cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x65fca692 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x66e4655a wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x68bda738 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x70bf899b cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x7115d4d7 ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x804bae8a wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x86d264e6 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x87ccd6e4 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x96c27025 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x97caa744 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xb1465242 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xb3a43ceb cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xdad094a6 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xf2c669ff cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xf3586f33 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0xf748514f ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xf852c954 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0xf933da54 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xfcc0c298 wiphy_new +EXPORT_SYMBOL net/wireless/lib80211 0x1603e815 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x57eb0c8d lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6067cbed lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x613abd26 lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0xb36c8bf9 lib80211_unregister_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xbb76db3e lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0xcd6b45b0 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xec36853f lib80211_crypt_quiescing +EXPORT_SYMBOL sound/ac97_bus 0xce67c06f ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x87e2c2e9 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7e22d819 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe4081c5f snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe697aad2 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xfe5afd59 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xbd827aee snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xee8f2851 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x3b55d387 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x68b9bd07 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7adfa053 snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x998f2126 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9b1825a9 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb6327286 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbc51650a snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe58d6519 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x9e53d711 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x059f0c83 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x09125954 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x0c585e1b snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x12c187d4 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x18f4fd33 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x25c5a145 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x2ac0da48 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x2c29f69e snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x2e630863 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3fbfa16a snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x43e33fb0 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x477d0ed6 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x4918d7bc snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x4a1f0a10 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4c40138e snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x513da905 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x535e5860 snd_power_wait +EXPORT_SYMBOL sound/core/snd 0x5b8614ae snd_device_new +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x64fb67a1 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x760e40df snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x7fd4173a snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x7fef8090 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x85d1a609 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8dffd1e7 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x9b71e090 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x9dfe60b5 snd_cards +EXPORT_SYMBOL sound/core/snd 0xa355e129 snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xa3b87de1 snd_card_free +EXPORT_SYMBOL sound/core/snd 0xa9912903 snd_card_create +EXPORT_SYMBOL sound/core/snd 0xafa0fa92 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0xb20f4df7 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xbd666771 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0xbf5633ca snd_device_free +EXPORT_SYMBOL sound/core/snd 0xc9138948 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xd1157735 release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0xe0485d4e snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0xe2f0cce7 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe9102522 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0xe918ebe3 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0xeb468ff2 snd_card_register +EXPORT_SYMBOL sound/core/snd 0xed808384 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xf5c5f203 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xf98461b1 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xfe2a3c77 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0xfe94cf31 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xff0d0288 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd-hwdep 0xd0c44f64 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x08be7ffe snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x11109b06 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x141be75f snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x249000f5 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xa21e2c1a snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x066ecfa2 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x0f8c727a snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x162e0743 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1f5a197a snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x24812ce5 snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x255fe552 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x2a600d06 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x33720a52 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x395e287f snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3e06afb2 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x47d0ecf7 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x4a4a433d snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x597ccc3d snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x61fc1fb8 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x69410bd8 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x6ccfe6df snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x7433f3bc snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x75f1267f snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x811a8452 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x8edd72da snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x906fc9ae snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x94011dd4 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x9bd64005 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xa68dc5c6 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc5223a43 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd3804cc9 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0xd4a04355 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0xdab964d5 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0xe0219604 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xe0ddd154 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xe35c566d snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xe368259a snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xe550d9a7 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xec2ac44c snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf3846182 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xfa4cbb84 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0xfad0531e snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0xfb28f0c4 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xfca38bda snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xfe8bb771 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-rawmidi 0x09a92f5c snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0d3dc52e snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x2828b74b snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x2b67600e snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x46f1156f snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4baa8582 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7746dade snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7fe8e296 snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0x809d169c snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x86c51caa snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x8f026ba1 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x974d0af1 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb32f8f9f snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb7f62c0d snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xc8fecc26 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xcf5a865a snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe07ea601 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-timer 0x12f061b4 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x13cec768 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0x17c5488b snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x1bb1adcc snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0x27376f76 snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x34273599 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x550d378e snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x68caa251 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x8bfd89a8 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0xba7cdafe snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xc44ae872 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0xe2ce8e0f snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xfd41ab9b snd_timer_stop +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xbeb11301 snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3c2468fe snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x66c9092c snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6ea7ced1 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x78a4303e snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9a2a0c5a snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xb148e2de snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd785c5d6 snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe7d0f55f snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xfd25e268 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0685c1de snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1cc7efb0 snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x33b2eda7 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x50264dd2 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x51dccc68 snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7179bf3c snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x77adaa74 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd566f3a4 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf4535873 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x46acd692 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x77beb004 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x884a64f2 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x94bac8bc snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa90eea1e snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xda644235 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3bc00537 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x782830a4 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc51b06e9 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xde28b419 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe108759e snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xef4a2ee3 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x2cccee00 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x3d759079 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x99ff603a snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xee1dbda3 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2625c95a snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xf1869b28 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x65dac817 snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xad4cd15b snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0a818211 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3f7d0d1b snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x7d0b42ab snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa7f82543 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd1e1cbca snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x03e60ede snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x14a80ac3 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x5b0bf70b snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x70e461fb snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x7c8d51e4 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xd5c9b000 snd_i2c_readbytes +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x13f43e9f snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x2ee511bb snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x33d187aa snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x47bc53fa snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x49e107f7 snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x51eaf426 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9c7a457c snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc769226b snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe61c87cc snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xf553103c snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x21d89f26 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xce1b2ff5 snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xdfd4928c snd_sb16dsp_configure +EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x67765fc9 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xbcc14f77 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x61641749 probe_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x88c15405 attach_mpu401 +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xaffd8208 sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0xb6a54f00 probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x1675c69f audio_devs +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2269a6fd midi_devs +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x2ca65737 synth_devs +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x67906e88 sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x830bb0ea sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd82d29e0 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xdd56192e sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0x24dc3352 probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x08036898 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x10ed5463 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x22e1c149 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3603962d snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x47b4c6e5 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x495a5f64 snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5286bc0c snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x55d21e56 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5f4492b7 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x802f955c snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x869fb715 snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x891ac61a snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x946f5057 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9735288f snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa3fbd29d snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xcb0b9301 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfa5e707f snd_ac97_mixer +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x28039be2 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2f67b6ea snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x385831f0 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x4ba53a06 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x539b48aa snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x5e5876be snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc8d3d7d6 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd75c1186 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd99bcff1 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x1fa75b35 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x4d91f453 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x7a4052b0 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x8b680174 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x13b4d251 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x26e1a4fd snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x45a976c7 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xbe044390 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd3e0fa5f snd_trident_free_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xe76677c8 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x0e046638 register_sound_special +EXPORT_SYMBOL sound/soundcore 0x36f989ba register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x3d4deed2 sound_class +EXPORT_SYMBOL sound/soundcore 0x691aa4be register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x79117061 register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xade7fb5e register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1767e61d snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x4ce844a9 snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x56bb6873 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x93f40d2a snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa9599c71 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xabb948e8 snd_emux_register +EXPORT_SYMBOL sound/synth/snd-util-mem 0x01e234f2 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x0895e1a9 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x15cfaea4 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x2ba29873 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x45c2abb1 snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x5d2130f4 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xab810f2e __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2676a58 snd_util_mem_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x4d5c2995 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x57cac336 lirc_get_pdata +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xcbb1996c lirc_register_driver +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00273d7d del_gendisk +EXPORT_SYMBOL vmlinux 0x0031ff21 scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x004264f4 pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x008ef8ce dev_get_flags +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00cbe883 per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0x00d6aab7 dst_alloc +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x01206dc1 audit_log_end +EXPORT_SYMBOL vmlinux 0x01268a2e blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x013dbce9 tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01aeaf6e generic_delete_inode +EXPORT_SYMBOL vmlinux 0x0201e357 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0x0210d155 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x02384e8d ioremap_flags +EXPORT_SYMBOL vmlinux 0x02578e70 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x025bd903 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x02a3e50c inet_stream_ops +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02b73566 new_inode +EXPORT_SYMBOL vmlinux 0x02c7b75d blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x030e52d0 rtas +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x03665325 of_find_device_by_node +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x0390daf4 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x03942227 bmap +EXPORT_SYMBOL vmlinux 0x03bfa159 scsi_execute_req +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c9dd5e security_file_permission +EXPORT_SYMBOL vmlinux 0x03d33ab7 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x03e032ca elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x03f32cc0 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x042dd447 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x043b8483 __kfifo_get +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04f46eb6 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x05030e04 request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x05360cb0 of_iomap +EXPORT_SYMBOL vmlinux 0x0558ed3d __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x0559742c unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x05629614 module_put +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x05a514a1 _insl_ns +EXPORT_SYMBOL vmlinux 0x05c14084 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x05de0f55 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x062aba95 mempool_free +EXPORT_SYMBOL vmlinux 0x066d8a66 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0x0675c7eb atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0x0677f807 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x067aa8c8 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x068b365c pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x0697dd54 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x06c3b281 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x06d8bae1 idr_get_new +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x070c8aa7 matroxfb_register_driver +EXPORT_SYMBOL vmlinux 0x071cb447 skb_checksum +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x0751b6d5 tr_type_trans +EXPORT_SYMBOL vmlinux 0x0776804e blk_stop_queue +EXPORT_SYMBOL vmlinux 0x0795576a pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07a9a611 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x07cae8bc register_cdrom +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07e1b0d8 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x07ea489d tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x083e5786 cdrom_media_changed +EXPORT_SYMBOL vmlinux 0x0844f0db rtnl_notify +EXPORT_SYMBOL vmlinux 0x086ad2dc simple_transaction_read +EXPORT_SYMBOL vmlinux 0x08830940 security_path_rename +EXPORT_SYMBOL vmlinux 0x088e91e9 request_key +EXPORT_SYMBOL vmlinux 0x08c91775 genphy_update_link +EXPORT_SYMBOL vmlinux 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL vmlinux 0x08ff63ef nf_log_unregister +EXPORT_SYMBOL vmlinux 0x0907168f bdi_register +EXPORT_SYMBOL vmlinux 0x090f0478 alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x091a755c pci_bus_type +EXPORT_SYMBOL vmlinux 0x092b007a sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x095b0f49 generic_file_open +EXPORT_SYMBOL vmlinux 0x095bb830 down_interruptible +EXPORT_SYMBOL vmlinux 0x097ece4d directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x0987eeb2 alloc_disk +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x09934256 xfrm_state_update +EXPORT_SYMBOL vmlinux 0x099c3cd7 eth_header_cache +EXPORT_SYMBOL vmlinux 0x09a6b4d5 alloc_trdev +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09cd3f78 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x09ebae88 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a2cd020 otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a3824c8 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a6015ba phy_start +EXPORT_SYMBOL vmlinux 0x0a63506f wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x0a6a3682 of_dev_put +EXPORT_SYMBOL vmlinux 0x0a70df12 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x0ab38d1a bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x0ac5023f simple_empty +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf51e5 simple_pin_fs +EXPORT_SYMBOL vmlinux 0x0ae01312 bdev_read_only +EXPORT_SYMBOL vmlinux 0x0aeb13ce disk_stack_limits +EXPORT_SYMBOL vmlinux 0x0afebf41 km_policy_notify +EXPORT_SYMBOL vmlinux 0x0b0e9d77 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x0b121aef dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b5c5643 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x0b655e20 input_inject_event +EXPORT_SYMBOL vmlinux 0x0b6bda9a prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b8f37ed dcache_readdir +EXPORT_SYMBOL vmlinux 0x0bb2b67b blk_end_request_all +EXPORT_SYMBOL vmlinux 0x0bb2b8a4 skb_seq_read +EXPORT_SYMBOL vmlinux 0x0bb533fa unlock_rename +EXPORT_SYMBOL vmlinux 0x0bbb3c88 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x0bc06d5a rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x0bcf0374 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x0bd5f139 do_sync_read +EXPORT_SYMBOL vmlinux 0x0bdc463f mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x0bde43f8 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x0c112bb2 kmap_high +EXPORT_SYMBOL vmlinux 0x0c12e626 __debugger_bpt +EXPORT_SYMBOL vmlinux 0x0c1dbff3 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x0c24082c cfb_copyarea +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0c8f6f37 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x0ca0aa7b jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x0ca0e4e4 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x0cad9931 check_media_bay +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cb7a8c9 clear_user_page +EXPORT_SYMBOL vmlinux 0x0cee9e4f skb_store_bits +EXPORT_SYMBOL vmlinux 0x0d0fe2f4 down_trylock +EXPORT_SYMBOL vmlinux 0x0d3def21 idr_pre_get +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d5fd070 dev_open +EXPORT_SYMBOL vmlinux 0x0d7d51e2 simple_statfs +EXPORT_SYMBOL vmlinux 0x0d9115ed inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dbf38b8 mol_trampoline +EXPORT_SYMBOL vmlinux 0x0dc63b6b bdi_destroy +EXPORT_SYMBOL vmlinux 0x0dec2df2 console_start +EXPORT_SYMBOL vmlinux 0x0e026cdf of_find_compatible_node +EXPORT_SYMBOL vmlinux 0x0e161bf6 journal_dirty_data +EXPORT_SYMBOL vmlinux 0x0e17c36f arp_tbl +EXPORT_SYMBOL vmlinux 0x0e3b7981 single_release +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0ea5111f ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x0ec3a119 journal_ack_err +EXPORT_SYMBOL vmlinux 0x0ec3c9dd kernel_listen +EXPORT_SYMBOL vmlinux 0x0ef20db1 kernstart_addr +EXPORT_SYMBOL vmlinux 0x0ef49a2d dev_trans_start +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL vmlinux 0x0f49677a blk_end_request +EXPORT_SYMBOL vmlinux 0x0f653b51 genphy_suspend +EXPORT_SYMBOL vmlinux 0x0f70b4d8 pmac_suspend_agp_for_card +EXPORT_SYMBOL vmlinux 0x0f90cf7b pci_device_to_OF_node +EXPORT_SYMBOL vmlinux 0x0f9bb90f clocksource_register +EXPORT_SYMBOL vmlinux 0x0fac1eec try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x0fc19cc0 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x0fc89c8b get_write_access +EXPORT_SYMBOL vmlinux 0x0fcde513 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x10179b1a alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x103c423a __register_binfmt +EXPORT_SYMBOL vmlinux 0x105869bc journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x1070ca78 dev_get_stats +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10bccda5 eth_type_trans +EXPORT_SYMBOL vmlinux 0x10dd268c proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x10ddc161 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10fd4d02 ide_proc_register_driver +EXPORT_SYMBOL vmlinux 0x110525fd dquot_acquire +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x113f336c ppc_md +EXPORT_SYMBOL vmlinux 0x116263ce xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x11663cec adb_register +EXPORT_SYMBOL vmlinux 0x116c992f call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118ae764 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a60053 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x11ba3976 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x11d72778 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x11f44004 thaw_bdev +EXPORT_SYMBOL vmlinux 0x11f8e83b __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x11fd9f65 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x1209cea2 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x120f9e8c __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x120fd654 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x123b86d3 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x12bd27c1 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12e5ef0c rtas_set_power_level +EXPORT_SYMBOL vmlinux 0x1305c41d eth_header_parse +EXPORT_SYMBOL vmlinux 0x1312f506 __nla_put +EXPORT_SYMBOL vmlinux 0x1326e502 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x134173b9 of_phy_find_device +EXPORT_SYMBOL vmlinux 0x1348e7cd cfb_imageblit +EXPORT_SYMBOL vmlinux 0x13771364 tc_classify +EXPORT_SYMBOL vmlinux 0x13b881a4 do_truncate +EXPORT_SYMBOL vmlinux 0x13c8af69 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x13dc6ba0 mach_powermac +EXPORT_SYMBOL vmlinux 0x13e1eb7f bio_phys_segments +EXPORT_SYMBOL vmlinux 0x13e2d66f tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x13fec71e pci_enable_wake +EXPORT_SYMBOL vmlinux 0x1407c6e7 kmap_prot +EXPORT_SYMBOL vmlinux 0x144ed3a1 dev_base_lock +EXPORT_SYMBOL vmlinux 0x14555789 of_find_node_by_name +EXPORT_SYMBOL vmlinux 0x145be56f journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x145ed45f deny_write_access +EXPORT_SYMBOL vmlinux 0x14607fe7 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x14a32987 pci_find_capability +EXPORT_SYMBOL vmlinux 0x14a40656 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x14cc0e2e tty_check_change +EXPORT_SYMBOL vmlinux 0x14e405fe d_genocide +EXPORT_SYMBOL vmlinux 0x14f40f8b tty_port_init +EXPORT_SYMBOL vmlinux 0x150586df xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x15422a77 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x156b23c4 input_filter_device +EXPORT_SYMBOL vmlinux 0x159f9fa4 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x15aeac9f dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x15b82f85 security_inode_readlink +EXPORT_SYMBOL vmlinux 0x15c1c06e nf_hook_slow +EXPORT_SYMBOL vmlinux 0x15ce5a1f inet_release +EXPORT_SYMBOL vmlinux 0x15dc1c1c proto_register +EXPORT_SYMBOL vmlinux 0x160bd45c rtas_token +EXPORT_SYMBOL vmlinux 0x162a3bed matroxfb_read_pins +EXPORT_SYMBOL vmlinux 0x162ddcf5 simple_write_end +EXPORT_SYMBOL vmlinux 0x163301be igrab +EXPORT_SYMBOL vmlinux 0x163677eb ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x16479e8f panic_notifier_list +EXPORT_SYMBOL vmlinux 0x166dde82 input_release_device +EXPORT_SYMBOL vmlinux 0x167f63cf nf_log_packet +EXPORT_SYMBOL vmlinux 0x16a0f4b9 __kill_fasync +EXPORT_SYMBOL vmlinux 0x16ab2c45 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x16d86666 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x16db3360 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16e911d4 down_write +EXPORT_SYMBOL vmlinux 0x173598b0 may_umount_tree +EXPORT_SYMBOL vmlinux 0x174dadcf open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x1766dea2 cdrom_mode_select +EXPORT_SYMBOL vmlinux 0x177f7812 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x17aa156a __ucmpdi2 +EXPORT_SYMBOL vmlinux 0x17d29a81 of_translate_address +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x18724515 pci_release_region +EXPORT_SYMBOL vmlinux 0x18835092 dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x18df425e page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x18eb1bce fget +EXPORT_SYMBOL vmlinux 0x18fd8694 unregister_filesystem +EXPORT_SYMBOL vmlinux 0x190471fe nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x193be4f9 pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0x19537e35 current_fs_time +EXPORT_SYMBOL vmlinux 0x1966bf16 down_read_trylock +EXPORT_SYMBOL vmlinux 0x19759bed simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19c61017 kset_register +EXPORT_SYMBOL vmlinux 0x19cd69b9 get_disk +EXPORT_SYMBOL vmlinux 0x19dfce00 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0x19fe654a bd_set_size +EXPORT_SYMBOL vmlinux 0x1a187530 netlink_ack +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a802fb1 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0x1ab2a5da skb_under_panic +EXPORT_SYMBOL vmlinux 0x1abfedb3 lookup_bdev +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1acea4ee invalidate_bdev +EXPORT_SYMBOL vmlinux 0x1ae04f98 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0x1ae10967 inet_getname +EXPORT_SYMBOL vmlinux 0x1ae7ae0e scsi_print_result +EXPORT_SYMBOL vmlinux 0x1ae8afea abort_creds +EXPORT_SYMBOL vmlinux 0x1afa00c5 of_n_addr_cells +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0d1322 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x1b2fc62e ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x1b4e0d2d jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b6f4bbb bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x1b85ea80 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x1b8dd614 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x1b979eea xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bc4ff03 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0x1bce99f0 tty_throttle +EXPORT_SYMBOL vmlinux 0x1c324357 idr_replace +EXPORT_SYMBOL vmlinux 0x1c333ea4 con_copy_unimap +EXPORT_SYMBOL vmlinux 0x1c5b1a96 mdiobus_register +EXPORT_SYMBOL vmlinux 0x1c5b2c15 pmu_wait_complete +EXPORT_SYMBOL vmlinux 0x1c6e8b1c tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x1c80de9c ip_send_check +EXPORT_SYMBOL vmlinux 0x1cb130f3 request_firmware +EXPORT_SYMBOL vmlinux 0x1cc54d83 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x1cc5b690 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1d0de0a3 llc_sap_find +EXPORT_SYMBOL vmlinux 0x1d1cea54 skb_copy_bits +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d4848e2 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x1d9804c2 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x1d9932d4 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x1da55f9a seq_lseek +EXPORT_SYMBOL vmlinux 0x1da7f62e flush_tlb_mm +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd2462c call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1de91045 of_find_property +EXPORT_SYMBOL vmlinux 0x1e4a80d1 sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x1e4a9824 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x1e4dd498 simple_getattr +EXPORT_SYMBOL vmlinux 0x1e59b76f pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e82c90e read_cache_pages +EXPORT_SYMBOL vmlinux 0x1e8aa7c0 irq_stat +EXPORT_SYMBOL vmlinux 0x1e8fae69 validate_sp +EXPORT_SYMBOL vmlinux 0x1e91bbd5 __napi_complete +EXPORT_SYMBOL vmlinux 0x1e972ef3 skb_queue_head +EXPORT_SYMBOL vmlinux 0x1eba38da xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1ed8aa12 elevator_init +EXPORT_SYMBOL vmlinux 0x1eda4554 dev_addr_add +EXPORT_SYMBOL vmlinux 0x1edc9598 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x1efbe4f5 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f2d40a7 netlink_dump_start +EXPORT_SYMBOL vmlinux 0x1f7cc628 mempool_create +EXPORT_SYMBOL vmlinux 0x1f94ba85 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x1f978e42 bio_add_page +EXPORT_SYMBOL vmlinux 0x1fa1e09f scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x1fa3aec3 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x1fae7a0b wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x1fc12b6b vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x1fe29ec4 tty_write_room +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x1ffb9160 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x20030ecd ioremap +EXPORT_SYMBOL vmlinux 0x202edf7b pci_dev_driver +EXPORT_SYMBOL vmlinux 0x206484af sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x20861ba8 scsi_host_get +EXPORT_SYMBOL vmlinux 0x20b5ac43 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x20c42045 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x21223d78 ide_stall_queue +EXPORT_SYMBOL vmlinux 0x2122764e neigh_lookup +EXPORT_SYMBOL vmlinux 0x213a32b4 inet_accept +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x21834d49 pci_pme_active +EXPORT_SYMBOL vmlinux 0x21cda906 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x21e6bbb1 do_splice_from +EXPORT_SYMBOL vmlinux 0x2221b83c eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x228570a1 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x2299a75c hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22bd2bec save_mount_options +EXPORT_SYMBOL vmlinux 0x22e99190 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x22ea1309 sync_page_range +EXPORT_SYMBOL vmlinux 0x2309012f mod_timer +EXPORT_SYMBOL vmlinux 0x230adfab bio_free +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2346ebb3 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x23959b70 inet_frag_find +EXPORT_SYMBOL vmlinux 0x239bc67a pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x239ccdff take_over_console +EXPORT_SYMBOL vmlinux 0x23bae229 skb_copy_expand +EXPORT_SYMBOL vmlinux 0x23c02e9f xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x23e95706 lro_flush_all +EXPORT_SYMBOL vmlinux 0x23ee67d5 pci_get_slot +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x2407893b read_dev_sector +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24612566 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x246cb682 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x246d5be5 tty_name +EXPORT_SYMBOL vmlinux 0x24945760 add_disk +EXPORT_SYMBOL vmlinux 0x24978bf4 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x24d0b07c insert_inode_locked +EXPORT_SYMBOL vmlinux 0x24e7ec4a i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x24e85d7b arp_find +EXPORT_SYMBOL vmlinux 0x24f8539a dqput +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x25097db6 devm_ioremap_prot +EXPORT_SYMBOL vmlinux 0x252ae6b0 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x2587c183 release_sock +EXPORT_SYMBOL vmlinux 0x258c669a drop_super +EXPORT_SYMBOL vmlinux 0x25924588 flush_tlb_range +EXPORT_SYMBOL vmlinux 0x25ba121c mempool_resize +EXPORT_SYMBOL vmlinux 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL vmlinux 0x25f3bd2e atomic64_xchg +EXPORT_SYMBOL vmlinux 0x25fa6f17 wait_for_completion +EXPORT_SYMBOL vmlinux 0x26093dc4 udp_disconnect +EXPORT_SYMBOL vmlinux 0x260e56c3 aio_complete +EXPORT_SYMBOL vmlinux 0x261e6f55 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x26269f2b kunmap_atomic +EXPORT_SYMBOL vmlinux 0x2639421e cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x2641cc11 scsi_execute +EXPORT_SYMBOL vmlinux 0x26477c07 __vmalloc +EXPORT_SYMBOL vmlinux 0x267d9459 skb_pull +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26c09afd posix_test_lock +EXPORT_SYMBOL vmlinux 0x26c758cc d_path +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26fad6c1 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x26ff9a3f mark_page_accessed +EXPORT_SYMBOL vmlinux 0x272c9acd pmu_battery_count +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x2754ef56 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x2765b034 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x2769e9f8 bd_release +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27cf3f88 netif_napi_add +EXPORT_SYMBOL vmlinux 0x27d048ef dquot_drop +EXPORT_SYMBOL vmlinux 0x27ee3775 __init_rwsem +EXPORT_SYMBOL vmlinux 0x2822c09a dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x2852a336 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x285bf6cb mnt_pin +EXPORT_SYMBOL vmlinux 0x286f2d16 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x287026a6 skb_put +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28afa61d __destroy_inode +EXPORT_SYMBOL vmlinux 0x28be03ff inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x28ccad0b neigh_create +EXPORT_SYMBOL vmlinux 0x28cfffd4 of_get_property +EXPORT_SYMBOL vmlinux 0x28ff9ec2 bio_alloc +EXPORT_SYMBOL vmlinux 0x291470f0 __blk_end_request +EXPORT_SYMBOL vmlinux 0x2923d271 __sk_dst_check +EXPORT_SYMBOL vmlinux 0x2936f6fc ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x2946d893 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x2961c401 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x2962015b security_inode_init_security +EXPORT_SYMBOL vmlinux 0x297ebb8a blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29d3cb58 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0x2a193864 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x2a2cac73 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a40f297 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x2a427716 tcf_hash_create +EXPORT_SYMBOL vmlinux 0x2a7d2842 scsi_get_command +EXPORT_SYMBOL vmlinux 0x2a93cae9 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x2a942a67 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2ab91501 vfs_writev +EXPORT_SYMBOL vmlinux 0x2ab9f1c9 __elv_add_request +EXPORT_SYMBOL vmlinux 0x2ae8bd58 neigh_table_init +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b34d831 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x2b456a76 cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0x2b51e779 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x2b570dc0 ida_pre_get +EXPORT_SYMBOL vmlinux 0x2b67d659 key_task_permission +EXPORT_SYMBOL vmlinux 0x2b6defb0 kick_iocb +EXPORT_SYMBOL vmlinux 0x2b700747 file_remove_suid +EXPORT_SYMBOL vmlinux 0x2b70d773 register_key_type +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bc492e9 serio_close +EXPORT_SYMBOL vmlinux 0x2bc61da1 program_check_exception +EXPORT_SYMBOL vmlinux 0x2bc9bf56 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x2be85788 key_revoke +EXPORT_SYMBOL vmlinux 0x2c0545a8 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x2c16e684 of_find_node_by_phandle +EXPORT_SYMBOL vmlinux 0x2c17851f swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0x2c2ff92f dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x2c4199ba input_set_keycode +EXPORT_SYMBOL vmlinux 0x2c6ab2c4 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x2c6d67fb tty_register_device +EXPORT_SYMBOL vmlinux 0x2ca4b499 netdev_set_master +EXPORT_SYMBOL vmlinux 0x2d02c9bd lookup_hash +EXPORT_SYMBOL vmlinux 0x2d0387a5 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x2d14bd65 scsi_dma_map +EXPORT_SYMBOL vmlinux 0x2d2c5af4 module_layout +EXPORT_SYMBOL vmlinux 0x2d2ce2f6 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x2d3fbff8 inode_set_bytes +EXPORT_SYMBOL vmlinux 0x2d460792 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x2d621241 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x2d7b0e1a mpage_readpages +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2da605da sock_recvmsg +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dcc091f vfs_llseek +EXPORT_SYMBOL vmlinux 0x2de04498 scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x2e25ea45 sock_no_accept +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e3e3b1f netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x2e479979 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e7ce199 get_io_context +EXPORT_SYMBOL vmlinux 0x2e825a30 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x2eeb1027 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x2ef1adb3 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x2f038b82 journal_update_format +EXPORT_SYMBOL vmlinux 0x2f120de8 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x2f344dd7 journal_destroy +EXPORT_SYMBOL vmlinux 0x2f540b5d napi_complete +EXPORT_SYMBOL vmlinux 0x2f70738e pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x2f7e7819 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x2fd4a8f7 dev_driver_string +EXPORT_SYMBOL vmlinux 0x2fd8cc73 unregister_8022_client +EXPORT_SYMBOL vmlinux 0x2fe4c239 generic_removexattr +EXPORT_SYMBOL vmlinux 0x30222226 bdi_init +EXPORT_SYMBOL vmlinux 0x303219dd pagevec_lookup +EXPORT_SYMBOL vmlinux 0x304745bd tcp_poll +EXPORT_SYMBOL vmlinux 0x30588244 matroxfb_g450_setpll_cond +EXPORT_SYMBOL vmlinux 0x306a2d6b simple_sync_file +EXPORT_SYMBOL vmlinux 0x307722c0 kthread_create +EXPORT_SYMBOL vmlinux 0x30a7fdba xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x30bb5143 vfs_create +EXPORT_SYMBOL vmlinux 0x30cea353 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x30e2b72d generic_show_options +EXPORT_SYMBOL vmlinux 0x30f69bdc elv_abort_queue +EXPORT_SYMBOL vmlinux 0x30ff1eab deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x31289697 mpage_writepage +EXPORT_SYMBOL vmlinux 0x3131f895 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x31329310 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x3136d90a dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x313d5abf d_splice_alias +EXPORT_SYMBOL vmlinux 0x3140fcd1 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x314c9e2c inet_csk_accept +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x3195b7fa neigh_ifdown +EXPORT_SYMBOL vmlinux 0x31bf20a9 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x32158e0e xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x321aee88 neigh_table_clear +EXPORT_SYMBOL vmlinux 0x321fec7d request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x323222ba mutex_unlock +EXPORT_SYMBOL vmlinux 0x325194b9 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x327348f7 dquot_initialize +EXPORT_SYMBOL vmlinux 0x327b9c1b pmu_poll_adb +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x328a05f1 strncpy +EXPORT_SYMBOL vmlinux 0x32af7afa filemap_flush +EXPORT_SYMBOL vmlinux 0x32d30091 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x32ec6e5a inet_add_protocol +EXPORT_SYMBOL vmlinux 0x33335874 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x3338c818 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x33417be3 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x33a8a8cd genl_sock +EXPORT_SYMBOL vmlinux 0x33b84f74 copy_page +EXPORT_SYMBOL vmlinux 0x33be6b79 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x33dbc348 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x342c9685 neigh_destroy +EXPORT_SYMBOL vmlinux 0x3441aa82 unregister_netdevice +EXPORT_SYMBOL vmlinux 0x344adbd5 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x346364bb poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x346a4a35 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x34861ed1 elv_rb_del +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x3498b658 journal_set_features +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a46889 lro_receive_skb +EXPORT_SYMBOL vmlinux 0x34aa46e1 unregister_con_driver +EXPORT_SYMBOL vmlinux 0x34aabaed sock_no_bind +EXPORT_SYMBOL vmlinux 0x34ab59e0 bdget_disk +EXPORT_SYMBOL vmlinux 0x34ddcde8 deactivate_super +EXPORT_SYMBOL vmlinux 0x35164ef1 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x352cfbf2 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35ee95b7 blk_start_queue +EXPORT_SYMBOL vmlinux 0x363be96d pskb_expand_head +EXPORT_SYMBOL vmlinux 0x366d802d skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x3679f788 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x368016e8 bh_submit_read +EXPORT_SYMBOL vmlinux 0x36e47222 remove_wait_queue +EXPORT_SYMBOL vmlinux 0x36e5329a key_put +EXPORT_SYMBOL vmlinux 0x36f4955f sg_next +EXPORT_SYMBOL vmlinux 0x371d2130 check_legacy_ioport +EXPORT_SYMBOL vmlinux 0x37383edd rtas_get_power_level +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x3746b022 nlmsg_notify +EXPORT_SYMBOL vmlinux 0x374e0f3a xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x37af6a0a abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x37b229d0 register_console +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37c04f5f matrox_mystique +EXPORT_SYMBOL vmlinux 0x37df8397 register_netdev +EXPORT_SYMBOL vmlinux 0x37e1a4cf cad_pid +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x38055e10 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x38287f4a kobject_set_name +EXPORT_SYMBOL vmlinux 0x38499e98 genphy_config_advert +EXPORT_SYMBOL vmlinux 0x386014c9 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x3878150f pci_device_from_OF_node +EXPORT_SYMBOL vmlinux 0x3888671a macio_dev_get +EXPORT_SYMBOL vmlinux 0x388e4c56 generic_getxattr +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x3893dbbd kernel_getpeername +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cf4e25 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x38d45b43 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x38f1c1cf scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x38fb9933 tty_std_termios +EXPORT_SYMBOL vmlinux 0x392546b5 do_splice_to +EXPORT_SYMBOL vmlinux 0x3942040b elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0x3953c232 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x39729f2f blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x397de0df generic_unplug_device +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x398fc1da ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x39959a47 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x39a3d75d note_scsi_host +EXPORT_SYMBOL vmlinux 0x39c905ca netif_carrier_off +EXPORT_SYMBOL vmlinux 0x39cbca77 scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x39d56be5 generic_ide_ioctl +EXPORT_SYMBOL vmlinux 0x39eea9e1 of_translate_dma_address +EXPORT_SYMBOL vmlinux 0x39f7abcf tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3db2e5 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x3a6c156a jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x3a777742 block_write_full_page +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3ace5c7c xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x3ad06abc put_page +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3ae86e9e blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x3b02aebd bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x3b0bfc03 ilookup5 +EXPORT_SYMBOL vmlinux 0x3b111fb6 bio_put +EXPORT_SYMBOL vmlinux 0x3b1ece29 kill_litter_super +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b6bbeff clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x3b6eccec netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bc17892 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3c04cb5e xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x3c108603 tcf_hash_search +EXPORT_SYMBOL vmlinux 0x3c1f7cd5 set_device_ro +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c356f1e atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x3c44cde5 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0x3c4e2102 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x3c50a065 register_quota_format +EXPORT_SYMBOL vmlinux 0x3c6575d7 vm_map_ram +EXPORT_SYMBOL vmlinux 0x3c66d19f seq_release +EXPORT_SYMBOL vmlinux 0x3c69351b sk_release_kernel +EXPORT_SYMBOL vmlinux 0x3c717694 d_alloc +EXPORT_SYMBOL vmlinux 0x3c8c7154 tty_kref_put +EXPORT_SYMBOL vmlinux 0x3c985978 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cb50d04 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cd18acf register_framebuffer +EXPORT_SYMBOL vmlinux 0x3cd1a156 inet_ioctl +EXPORT_SYMBOL vmlinux 0x3cde82f7 dst_release +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3d04fc50 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x3d20674c clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x3d23399e netlink_broadcast +EXPORT_SYMBOL vmlinux 0x3d2a1b08 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x3d2d75a0 of_get_cpu_node +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8a3185 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3db5e73c init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x3db78c04 giveup_altivec +EXPORT_SYMBOL vmlinux 0x3de09134 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x3dfd080b load_nls_default +EXPORT_SYMBOL vmlinux 0x3e14e7df scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x3e1dc20d d_validate +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e3cf8dd fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e56516b tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x3e6caebd add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x3e942af5 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x3eb009d4 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x3ec45e0a __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x3ec6b340 get_sb_single +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ed9d7ce bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x3ef56d03 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0x3efb82f0 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f37c3fd tcf_exts_change +EXPORT_SYMBOL vmlinux 0x3f406a3b enable_kernel_altivec +EXPORT_SYMBOL vmlinux 0x3f415739 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f45f5aa lock_may_read +EXPORT_SYMBOL vmlinux 0x3f47d0f7 prepare_creds +EXPORT_SYMBOL vmlinux 0x3f6c325f key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x3f7af115 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x3f8e84b8 napi_frags_skb +EXPORT_SYMBOL vmlinux 0x3fb59f58 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x3fbecbaa bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x3fc55ca9 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x3fc8907b pci_reenable_device +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x400b6d86 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x40123aeb idr_for_each +EXPORT_SYMBOL vmlinux 0x401690b1 brioctl_set +EXPORT_SYMBOL vmlinux 0x4016d1a7 dev_mc_add +EXPORT_SYMBOL vmlinux 0x4029c22d i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x40488124 sg_last +EXPORT_SYMBOL vmlinux 0x405930e9 block_write_begin +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4089d1b5 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40f1ad10 tb_ticks_per_jiffy +EXPORT_SYMBOL vmlinux 0x410030f5 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x4101a975 ide_fixstring +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x412ddc0c dcache_lock +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x4152e869 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x41869bb2 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41e665ee fb_set_var +EXPORT_SYMBOL vmlinux 0x42108f9f of_get_gpio_flags +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x424399a3 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x42664680 default_llseek +EXPORT_SYMBOL vmlinux 0x4277f9cf handle_sysrq +EXPORT_SYMBOL vmlinux 0x429b3540 cdrom_release +EXPORT_SYMBOL vmlinux 0x42d7153c netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x42e72d49 framebuffer_release +EXPORT_SYMBOL vmlinux 0x42fba6fa pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x431a79f2 macio_unregister_driver +EXPORT_SYMBOL vmlinux 0x432faf67 flush_icache_user_range +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x433c1269 __nla_reserve +EXPORT_SYMBOL vmlinux 0x434f23cd jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4355f761 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x436781b5 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x43789e7e pci_free_consistent +EXPORT_SYMBOL vmlinux 0x43966588 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0x4398681a set_anon_super +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43e6fbe9 nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x43f94b9b sk_wait_data +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x44414164 matroxfb_g450_setclk +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x444fbe8e fb_find_mode +EXPORT_SYMBOL vmlinux 0x448ea4ba xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x44b7175c simple_readpage +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44c214d1 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x44d642b8 fsync_bdev +EXPORT_SYMBOL vmlinux 0x44df768b sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x450afa95 keyring_search +EXPORT_SYMBOL vmlinux 0x4514c8d6 kern_path +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x45568bc4 set_irq_chip +EXPORT_SYMBOL vmlinux 0x455b0fdb of_mm_gpiochip_add +EXPORT_SYMBOL vmlinux 0x456d41e2 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x458b7b5d dst_discard +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x4596db6a sys_sigreturn +EXPORT_SYMBOL vmlinux 0x45ab0488 bio_copy_user +EXPORT_SYMBOL vmlinux 0x45b74cea call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x45c42348 __break_lease +EXPORT_SYMBOL vmlinux 0x4603f919 read_cache_page_async +EXPORT_SYMBOL vmlinux 0x4608d751 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x461ebfa0 __copy_tofrom_user +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x463c40ce dma_pool_free +EXPORT_SYMBOL vmlinux 0x464f3484 skb_dequeue +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x4699c373 __page_symlink +EXPORT_SYMBOL vmlinux 0x469db222 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x46ab31d6 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x46bcdc69 kernel_bind +EXPORT_SYMBOL vmlinux 0x46f321f4 adb_client_list +EXPORT_SYMBOL vmlinux 0x470b0201 journal_abort +EXPORT_SYMBOL vmlinux 0x4719ba4e kfifo_free +EXPORT_SYMBOL vmlinux 0x4725953b journal_release_buffer +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x47346b89 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x4741fd32 __scm_destroy +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x4781efe2 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x479419fa down_read +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47f39433 generic_make_request +EXPORT_SYMBOL vmlinux 0x482a1d75 put_disk +EXPORT_SYMBOL vmlinux 0x48419f7c send_sig_info +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x486c9a3a ide_dma_off +EXPORT_SYMBOL vmlinux 0x4877460d scsi_device_put +EXPORT_SYMBOL vmlinux 0x4881efab pmac_get_partition +EXPORT_SYMBOL vmlinux 0x48c1d080 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x48e1255f jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x48e15ae2 blkdev_get +EXPORT_SYMBOL vmlinux 0x48e28b26 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x48f55f7c filemap_fault +EXPORT_SYMBOL vmlinux 0x48f9f12d complete_all +EXPORT_SYMBOL vmlinux 0x49147589 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x493b2d29 fb_get_mode +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49638efd phy_start_aneg +EXPORT_SYMBOL vmlinux 0x497f91fa seq_open_private +EXPORT_SYMBOL vmlinux 0x49a80198 ip_ct_attach +EXPORT_SYMBOL vmlinux 0x49dde3f5 default_file_splice_read +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49e3f101 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x49ed3acf security_path_mkdir +EXPORT_SYMBOL vmlinux 0x49f3c5d1 pci_get_subsys +EXPORT_SYMBOL vmlinux 0x4a043d9f tcp_read_sock +EXPORT_SYMBOL vmlinux 0x4a1b0f88 pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x4a1def46 km_report +EXPORT_SYMBOL vmlinux 0x4a290d4d cur_cpu_spec +EXPORT_SYMBOL vmlinux 0x4a3332ea follow_pfn +EXPORT_SYMBOL vmlinux 0x4a33bbec journal_flush +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a5f4c80 phy_connect +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4ab74688 mdiobus_free +EXPORT_SYMBOL vmlinux 0x4ac18f4e blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x4acd0f1e cdrom_open +EXPORT_SYMBOL vmlinux 0x4ad75f74 kill_block_super +EXPORT_SYMBOL vmlinux 0x4ad99560 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b02b8f0 pci_pme_capable +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b3de49a phys_mem_access_prot +EXPORT_SYMBOL vmlinux 0x4b77a0da macio_release_resources +EXPORT_SYMBOL vmlinux 0x4b77f95b nf_getsockopt +EXPORT_SYMBOL vmlinux 0x4b7cd409 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x4b8edde9 complete_and_exit +EXPORT_SYMBOL vmlinux 0x4b9bf351 dentry_open +EXPORT_SYMBOL vmlinux 0x4b9f3684 kfifo_init +EXPORT_SYMBOL vmlinux 0x4bbacc22 bdget +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4be0f666 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x4c0499e1 blk_complete_request +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c61a9fc textsearch_prepare +EXPORT_SYMBOL vmlinux 0x4c776c9d skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x4c81811d iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x4c89ec5a scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x4cb8e0e9 sock_wake_async +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4ccdf6ef iunique +EXPORT_SYMBOL vmlinux 0x4ce696da pipe_to_file +EXPORT_SYMBOL vmlinux 0x4d31a95d fasync_helper +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d61e52d file_permission +EXPORT_SYMBOL vmlinux 0x4d90f05d scsi_print_command +EXPORT_SYMBOL vmlinux 0x4d918c3c cdev_init +EXPORT_SYMBOL vmlinux 0x4da5c71c per_cpu__kstat +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4de1916b serio_open +EXPORT_SYMBOL vmlinux 0x4de55770 dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x4dec6038 memscan +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e0009da idr_get_new_above +EXPORT_SYMBOL vmlinux 0x4e0b39c1 swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x4e1ddca9 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x4e307827 cdev_index +EXPORT_SYMBOL vmlinux 0x4e354b0a pcim_iomap +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e41c847 gen_pool_create +EXPORT_SYMBOL vmlinux 0x4e4c45eb mb_cache_create +EXPORT_SYMBOL vmlinux 0x4e534ab5 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4e8f64e6 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4ec9953e bio_pair_release +EXPORT_SYMBOL vmlinux 0x4ee4f9d7 seq_bitmap +EXPORT_SYMBOL vmlinux 0x4eebfebb kernel_getsockname +EXPORT_SYMBOL vmlinux 0x4f0ea0c0 up +EXPORT_SYMBOL vmlinux 0x4f14e428 simple_transaction_set +EXPORT_SYMBOL vmlinux 0x4f481de2 seq_read +EXPORT_SYMBOL vmlinux 0x4f5e4062 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x4f626a19 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4fbf2663 inode_add_bytes +EXPORT_SYMBOL vmlinux 0x4fe99583 atomic64_dec_if_positive +EXPORT_SYMBOL vmlinux 0x4ff62057 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x50016b12 security_path_link +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x50225f0d sysctl_data +EXPORT_SYMBOL vmlinux 0x5030a92e blk_requeue_request +EXPORT_SYMBOL vmlinux 0x504342c3 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x504a833c n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x50a03130 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x50a8dda4 dev_add_pack +EXPORT_SYMBOL vmlinux 0x50d0761b devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50d92002 vmtruncate +EXPORT_SYMBOL vmlinux 0x50fdfb04 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x50fed6f7 proc_ide_read_geometry +EXPORT_SYMBOL vmlinux 0x51039b41 sysctl_intvec +EXPORT_SYMBOL vmlinux 0x5107a5c4 seq_write +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x513fa41d end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x51411071 scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x51493d94 finish_wait +EXPORT_SYMBOL vmlinux 0x515e24a7 flush_instruction_cache +EXPORT_SYMBOL vmlinux 0x517cc675 input_open_device +EXPORT_SYMBOL vmlinux 0x51b5773c pci_assign_resource +EXPORT_SYMBOL vmlinux 0x51cd91cd pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ebb771 lock_sock_nested +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52098402 bdi_unregister +EXPORT_SYMBOL vmlinux 0x52354a0b mutex_trylock +EXPORT_SYMBOL vmlinux 0x52537b9d __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x525d4e37 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x527829f4 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x527830ff pmac_xpram_read +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52cb821c add_timer +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x52fd7d3a sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x52febefe dev_remove_pack +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x531a3d17 arp_create +EXPORT_SYMBOL vmlinux 0x5324954b qdisc_reset +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x53328790 free_netdev +EXPORT_SYMBOL vmlinux 0x5354a8be tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x5365d087 skb_copy +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x53ae5bd6 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x53be9885 pci_select_bars +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53e37f8a xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x53ebab1b _outsl_ns +EXPORT_SYMBOL vmlinux 0x54005b9e soft_cursor +EXPORT_SYMBOL vmlinux 0x54031139 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x54081892 flush_dcache_page +EXPORT_SYMBOL vmlinux 0x54087ec6 vfs_unlink +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x542d4414 datagram_poll +EXPORT_SYMBOL vmlinux 0x543501f1 boot_tvec_bases +EXPORT_SYMBOL vmlinux 0x543dab56 tcp_connect +EXPORT_SYMBOL vmlinux 0x547425cd devm_ioport_map +EXPORT_SYMBOL vmlinux 0x547aaf52 pci_get_class +EXPORT_SYMBOL vmlinux 0x547fdedd journal_force_commit +EXPORT_SYMBOL vmlinux 0x54aca2cc kernel_read +EXPORT_SYMBOL vmlinux 0x54d42936 seq_printf +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54f96034 path_put +EXPORT_SYMBOL vmlinux 0x5500f044 skb_recycle_check +EXPORT_SYMBOL vmlinux 0x5504790e jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0x5518cebf vfs_write +EXPORT_SYMBOL vmlinux 0x55264182 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x55396eff fddi_type_trans +EXPORT_SYMBOL vmlinux 0x55472782 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x556643e3 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0x5577b426 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55d3c5fb mpage_readpage +EXPORT_SYMBOL vmlinux 0x55ee9811 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x55fa0243 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x56028a7e netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0x56033a7c tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5619e42f read_cache_page +EXPORT_SYMBOL vmlinux 0x56289d24 of_node_put +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x567699d2 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x56811238 phy_register_fixup +EXPORT_SYMBOL vmlinux 0x5681ce38 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x5682aa64 pci_disable_msix +EXPORT_SYMBOL vmlinux 0x5683ef3f pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x56a10763 csum_tcpudp_magic +EXPORT_SYMBOL vmlinux 0x56a8863e swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0x56c2b95b rtas_progress +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56dd483a init_task +EXPORT_SYMBOL vmlinux 0x5729461e kobject_get +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x573a43fa submit_bh +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x5764d15d pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x576d8337 pci_set_master +EXPORT_SYMBOL vmlinux 0x5779df18 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x5785e8b7 tty_hangup +EXPORT_SYMBOL vmlinux 0x57940837 skb_checksum_help +EXPORT_SYMBOL vmlinux 0x579b0e14 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57ab13af pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57c3c2dd user_path_at +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57dd25a8 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x57e8ee3d audit_log_start +EXPORT_SYMBOL vmlinux 0x58031f98 journal_start +EXPORT_SYMBOL vmlinux 0x582a4747 cacheable_memcpy +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5840e845 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x5842e702 scsi_put_command +EXPORT_SYMBOL vmlinux 0x5842ec6c qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x587426ed phy_print_status +EXPORT_SYMBOL vmlinux 0x587d257c sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x587e6508 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x5882aa07 sock_no_connect +EXPORT_SYMBOL vmlinux 0x5888ca22 posix_lock_file +EXPORT_SYMBOL vmlinux 0x589a7073 register_gifconf +EXPORT_SYMBOL vmlinux 0x58aed558 mapping_tagged +EXPORT_SYMBOL vmlinux 0x58b38b69 locks_init_lock +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c65bcf jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x58d0d88c cont_write_begin +EXPORT_SYMBOL vmlinux 0x58d2128d skb_over_panic +EXPORT_SYMBOL vmlinux 0x58f067bd shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x58fb4438 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x58fbe569 of_device_register +EXPORT_SYMBOL vmlinux 0x592a10cd vfs_symlink +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x593a438a page_readlink +EXPORT_SYMBOL vmlinux 0x5945db7a pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x594c4076 proc_mkdir +EXPORT_SYMBOL vmlinux 0x5952e256 arp_send +EXPORT_SYMBOL vmlinux 0x595d0946 empty_zero_page +EXPORT_SYMBOL vmlinux 0x5962859f sg_init_table +EXPORT_SYMBOL vmlinux 0x599ae68b tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x59cc2a35 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x59eebc57 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x5a32343c ps2_command +EXPORT_SYMBOL vmlinux 0x5a5e5529 blk_make_request +EXPORT_SYMBOL vmlinux 0x5a685daa tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a7f0c75 km_query +EXPORT_SYMBOL vmlinux 0x5ab67931 do_IRQ +EXPORT_SYMBOL vmlinux 0x5af38559 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b43f1f1 rtas_service_present +EXPORT_SYMBOL vmlinux 0x5b5f98b7 scsi_ioctl +EXPORT_SYMBOL vmlinux 0x5b882497 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x5b8c1969 kill_pid +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b987e7f vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x5bb158d1 of_dev_get +EXPORT_SYMBOL vmlinux 0x5bc31604 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x5beee9d5 nobh_write_begin +EXPORT_SYMBOL vmlinux 0x5c1a10c8 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x5c454217 of_register_spi_devices +EXPORT_SYMBOL vmlinux 0x5c4feb66 dst_destroy +EXPORT_SYMBOL vmlinux 0x5c556938 skb_split +EXPORT_SYMBOL vmlinux 0x5c58cd1b pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x5c5f32a0 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x5c673bc8 tty_mutex +EXPORT_SYMBOL vmlinux 0x5c9c19b7 seq_open +EXPORT_SYMBOL vmlinux 0x5ca2c8f5 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0x5cb93b31 input_set_capability +EXPORT_SYMBOL vmlinux 0x5cbf6eec make_EII_client +EXPORT_SYMBOL vmlinux 0x5cd6a92c jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x5ce43550 tty_unthrottle +EXPORT_SYMBOL vmlinux 0x5cfda371 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x5d127b82 set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d1fd2e0 module_refcount +EXPORT_SYMBOL vmlinux 0x5d45daef netif_device_detach +EXPORT_SYMBOL vmlinux 0x5d578927 pci_alloc_consistent +EXPORT_SYMBOL vmlinux 0x5d74655e napi_get_frags +EXPORT_SYMBOL vmlinux 0x5d9c8946 km_state_expired +EXPORT_SYMBOL vmlinux 0x5dae54b4 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x5e266b01 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x5e36ba9f dev_load +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea4b6bd xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ea5caa4 migrate_page +EXPORT_SYMBOL vmlinux 0x5eca984e generic_permission +EXPORT_SYMBOL vmlinux 0x5eccf81a pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5f00938b sock_map_fd +EXPORT_SYMBOL vmlinux 0x5f0893dc generic_setlease +EXPORT_SYMBOL vmlinux 0x5f138b46 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x5f2e0970 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x5f38dfeb journal_restart +EXPORT_SYMBOL vmlinux 0x5f754e5a memset +EXPORT_SYMBOL vmlinux 0x5f8a2728 isa_io_base +EXPORT_SYMBOL vmlinux 0x5fc865ce inet_bind +EXPORT_SYMBOL vmlinux 0x5fdcdcc8 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x5ff0fbc7 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x5ffa164c kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x6012655d skb_trim +EXPORT_SYMBOL vmlinux 0x601408ab skb_queue_tail +EXPORT_SYMBOL vmlinux 0x6014431e ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x6028033c dev_close +EXPORT_SYMBOL vmlinux 0x603c1771 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x6047c4da gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a4efe2 ida_get_new +EXPORT_SYMBOL vmlinux 0x60a794b1 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x60cb0051 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x60e04bac neigh_parms_release +EXPORT_SYMBOL vmlinux 0x6107459d filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x610b2ea2 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x6117f59f block_write_end +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x612608a2 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61b1b970 dev_addr_del +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61c54f3d hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x61c57f09 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x61eb1ebb tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x61eef2c9 _insb +EXPORT_SYMBOL vmlinux 0x623d7182 _chrp_type +EXPORT_SYMBOL vmlinux 0x62682919 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x62698b18 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x628332e8 pmu_power_flags +EXPORT_SYMBOL vmlinux 0x628640c3 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x62a04ae3 poll_initwait +EXPORT_SYMBOL vmlinux 0x62ada80b jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x62bd5835 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x62cc569e cpu_present_mask +EXPORT_SYMBOL vmlinux 0x62d87fb9 ps2_init +EXPORT_SYMBOL vmlinux 0x62fe05c5 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x63030c61 __pagevec_release +EXPORT_SYMBOL vmlinux 0x630bd739 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0x630efdb1 __scsi_add_device +EXPORT_SYMBOL vmlinux 0x632a3c39 console_stop +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x6398be6d DAC1064_global_init +EXPORT_SYMBOL vmlinux 0x63a73c2c icmp_send +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x63f2731c generic_setxattr +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x6424a192 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x646cc6ab pmu_poll +EXPORT_SYMBOL vmlinux 0x648eca16 netlink_unicast +EXPORT_SYMBOL vmlinux 0x6496fda5 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64af6e10 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x64b325dd pci_enable_msix +EXPORT_SYMBOL vmlinux 0x64c37b41 vfs_statfs +EXPORT_SYMBOL vmlinux 0x64ca1966 pci_choose_state +EXPORT_SYMBOL vmlinux 0x64d0a9ce generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x64d54889 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x6510d2df cdev_add +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x651c679c of_get_address +EXPORT_SYMBOL vmlinux 0x65398254 tty_set_operations +EXPORT_SYMBOL vmlinux 0x65400222 __irq_offset_value +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x6569dfbe elv_rb_add +EXPORT_SYMBOL vmlinux 0x659ec4fb nf_register_hook +EXPORT_SYMBOL vmlinux 0x65c4fdb5 bio_integrity_free +EXPORT_SYMBOL vmlinux 0x65c657c2 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x65d0ffc5 swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x65d31c99 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x65e51b08 touch_atime +EXPORT_SYMBOL vmlinux 0x66033a93 __bforget +EXPORT_SYMBOL vmlinux 0x662d3f34 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x66444f60 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x664b36be jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66978f26 iget_locked +EXPORT_SYMBOL vmlinux 0x66a8ad99 phy_stop +EXPORT_SYMBOL vmlinux 0x66c0377d pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x66cbf14b pmac_xpram_write +EXPORT_SYMBOL vmlinux 0x66e445f8 bdevname +EXPORT_SYMBOL vmlinux 0x66f5939f fb_class +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x6722d69b xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x67383cc2 sock_no_mmap +EXPORT_SYMBOL vmlinux 0x6746f788 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x6749753e pci_iomap +EXPORT_SYMBOL vmlinux 0x674ce446 block_commit_write +EXPORT_SYMBOL vmlinux 0x6769ec48 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x679ec6b0 ip_fragment +EXPORT_SYMBOL vmlinux 0x67b47b67 netpoll_poll +EXPORT_SYMBOL vmlinux 0x67be1d3d cpu_active_mask +EXPORT_SYMBOL vmlinux 0x67d7e0db netpoll_setup +EXPORT_SYMBOL vmlinux 0x67f2cee5 udp_table +EXPORT_SYMBOL vmlinux 0x67f88950 macio_release_resource +EXPORT_SYMBOL vmlinux 0x680b5236 llc_add_pack +EXPORT_SYMBOL vmlinux 0x681eddeb pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x685f69d3 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x686418a8 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x68712542 ide_wait_stat +EXPORT_SYMBOL vmlinux 0x687e8894 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x68a5b44a key_type_keyring +EXPORT_SYMBOL vmlinux 0x68cd429a phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x690c2ba9 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x6915d728 swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0x692191b9 pci_dev_put +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x699d6556 proc_create_data +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69af2327 idr_init +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69d7e5b8 __debugger_ipi +EXPORT_SYMBOL vmlinux 0x69daf87b serio_unregister_port +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69e882d3 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x69eda65a of_register_driver +EXPORT_SYMBOL vmlinux 0x69f02b99 genphy_resume +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a20fb0d blk_start_request +EXPORT_SYMBOL vmlinux 0x6a3814fb xfrm_register_type +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a61f874 to_tm +EXPORT_SYMBOL vmlinux 0x6a880201 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0x6ac50c7a of_device_is_available +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6aeb4eca netif_device_attach +EXPORT_SYMBOL vmlinux 0x6aed9464 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x6b173b3d tcf_action_exec +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6bd63ab7 switch_mmu_context +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6c06f835 security_inode_permission +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c36a5c1 __mutex_init +EXPORT_SYMBOL vmlinux 0x6c3b242e sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6f1ea5 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c930c20 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x6ca1d1a4 atomic64_read +EXPORT_SYMBOL vmlinux 0x6ca6269d kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0x6cbd4a72 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce493f4 secpath_dup +EXPORT_SYMBOL vmlinux 0x6ce5f339 scsi_host_put +EXPORT_SYMBOL vmlinux 0x6cf26520 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x6d1d8ebb matrox_G100 +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d3c2fce blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x6d4e2557 tcp_sendpage +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d774aad create_proc_entry +EXPORT_SYMBOL vmlinux 0x6d7993e8 unregister_qdisc +EXPORT_SYMBOL vmlinux 0x6da508d3 rwsem_wake +EXPORT_SYMBOL vmlinux 0x6da928f4 _insw_ns +EXPORT_SYMBOL vmlinux 0x6dcaab22 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6df67073 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x6df968d3 proto_unregister +EXPORT_SYMBOL vmlinux 0x6dfcf889 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x6e1e3638 inode_change_ok +EXPORT_SYMBOL vmlinux 0x6e319023 ide_dma_off_quietly +EXPORT_SYMBOL vmlinux 0x6e4cbeb1 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x6e522015 sg_init_one +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e7a2d8c journal_stop +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6eb9995e journal_clear_err +EXPORT_SYMBOL vmlinux 0x6ebeb741 set_bh_page +EXPORT_SYMBOL vmlinux 0x6ef2ec51 of_parse_phandles_with_args +EXPORT_SYMBOL vmlinux 0x6f261d6d rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x6f52672f __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x6f838aa1 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0x6f8a6159 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x700becce kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x706badf0 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x70a62b12 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d12b4d udp_prot +EXPORT_SYMBOL vmlinux 0x70d888b7 __debugger_fault_handler +EXPORT_SYMBOL vmlinux 0x70e9c66a security_path_unlink +EXPORT_SYMBOL vmlinux 0x70f86c70 pmu_queue_request +EXPORT_SYMBOL vmlinux 0x7129e125 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x7161d19c vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x7165d717 dma_pool_create +EXPORT_SYMBOL vmlinux 0x7166db26 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x7179d044 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x717d571e key_validate +EXPORT_SYMBOL vmlinux 0x7190c20f pneigh_lookup +EXPORT_SYMBOL vmlinux 0x71a32b12 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71a60053 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x71c6f6cb macio_request_resources +EXPORT_SYMBOL vmlinux 0x71c90087 memcmp +EXPORT_SYMBOL vmlinux 0x71e306c3 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x71e89a41 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x7206945f request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x721bac3c swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0x722d992e eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x723c497e nonseekable_open +EXPORT_SYMBOL vmlinux 0x7243115a backlight_device_register +EXPORT_SYMBOL vmlinux 0x7280a7a0 sock_register +EXPORT_SYMBOL vmlinux 0x728f57e3 file_update_time +EXPORT_SYMBOL vmlinux 0x7292beb2 pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x72b1c38d __bio_clone +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72b684b3 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x72bc0445 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72c7ca73 sk_free +EXPORT_SYMBOL vmlinux 0x72d5af61 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x72da2e0c aio_put_req +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x734645ad get_fs_type +EXPORT_SYMBOL vmlinux 0x73564277 __timecompare_update +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x73a7cb38 bio_integrity_split +EXPORT_SYMBOL vmlinux 0x73c9361c scsi_finish_command +EXPORT_SYMBOL vmlinux 0x73dcf901 poll_freewait +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x740435f8 pci_domain_nr +EXPORT_SYMBOL vmlinux 0x740d1d70 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0x741ff9e4 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7475020a set_disk_ro +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748616ba i2c_del_driver +EXPORT_SYMBOL vmlinux 0x7491b91a mpage_writepages +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74c2f05e of_find_node_by_path +EXPORT_SYMBOL vmlinux 0x74db7682 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x74dce070 d_alloc_name +EXPORT_SYMBOL vmlinux 0x74fd6c07 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x74fe8730 sys_ctrler +EXPORT_SYMBOL vmlinux 0x754ed3e5 tty_port_close_end +EXPORT_SYMBOL vmlinux 0x75503899 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x7559e8bc lro_receive_frags +EXPORT_SYMBOL vmlinux 0x7561c18c __dst_free +EXPORT_SYMBOL vmlinux 0x756c4239 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0x756c8f08 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x756dd160 start_thread +EXPORT_SYMBOL vmlinux 0x757e16e2 machine_id +EXPORT_SYMBOL vmlinux 0x7585b75a skb_find_text +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75e9574c register_con_driver +EXPORT_SYMBOL vmlinux 0x75f91356 pipe_lock +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x7618b900 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x762a7ccf scsi_remove_host +EXPORT_SYMBOL vmlinux 0x765216e8 unregister_snap_client +EXPORT_SYMBOL vmlinux 0x7654fc8c pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x7672c5eb unregister_key_type +EXPORT_SYMBOL vmlinux 0x76a297d4 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x76b42e8a ip_route_output_key +EXPORT_SYMBOL vmlinux 0x76bb7bc3 vmap +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76c34e5c udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x76c7bb05 __alloc_skb +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76daaa4c llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x76ee0ff9 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x76fcc8cf ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x7710ae67 inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x77399323 of_unregister_driver +EXPORT_SYMBOL vmlinux 0x77473f0f sg_miter_stop +EXPORT_SYMBOL vmlinux 0x7748e2aa nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x77929d13 set_binfmt +EXPORT_SYMBOL vmlinux 0x779af255 journal_wipe +EXPORT_SYMBOL vmlinux 0x77b851c4 cacheable_memzero +EXPORT_SYMBOL vmlinux 0x77bde92f tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x77d5fe6d __invalidate_device +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77f207d9 tcp_check_req +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x781fdd81 pci_disable_device +EXPORT_SYMBOL vmlinux 0x782cf331 scm_detach_fds +EXPORT_SYMBOL vmlinux 0x783fda3b log_wait_commit +EXPORT_SYMBOL vmlinux 0x7871f12f xfrm_state_add +EXPORT_SYMBOL vmlinux 0x7883c82d journal_check_used_features +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x78bc2416 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78ebaf25 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x79047ee7 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x790df6f4 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x792712c4 find_vma +EXPORT_SYMBOL vmlinux 0x793a93f9 tcf_register_action +EXPORT_SYMBOL vmlinux 0x79595d83 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x79600d4a wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797c8194 of_mdiobus_register +EXPORT_SYMBOL vmlinux 0x79a2e5a3 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79cfc8ea udp_proc_register +EXPORT_SYMBOL vmlinux 0x7a16f39d iget5_locked +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a373031 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a5dea4b sock_no_getname +EXPORT_SYMBOL vmlinux 0x7a776457 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x7a849474 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x7abb15ed call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x7ac79133 unlock_buffer +EXPORT_SYMBOL vmlinux 0x7ad3c183 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x7af57b29 inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x7afefb1b task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x7b013b22 misc_register +EXPORT_SYMBOL vmlinux 0x7b3dde9f blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x7b414329 phy_device_register +EXPORT_SYMBOL vmlinux 0x7b7a5288 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x7ba21c80 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x7ba4e3d1 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x7babb03a per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0x7bb9d313 block_truncate_page +EXPORT_SYMBOL vmlinux 0x7bbee1fb swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0x7be2af53 get_phy_device +EXPORT_SYMBOL vmlinux 0x7be2fe03 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x7be4827c pci_dram_offset +EXPORT_SYMBOL vmlinux 0x7be75913 zero_fill_bio +EXPORT_SYMBOL vmlinux 0x7bf2031c ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x7bf33d86 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x7c052291 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x7c1fb0c5 blk_get_request +EXPORT_SYMBOL vmlinux 0x7c416f57 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c6013e5 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c751eb9 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c9291d1 csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x7ca341af kernel_thread +EXPORT_SYMBOL vmlinux 0x7ccf09f5 setup_arg_pages +EXPORT_SYMBOL vmlinux 0x7cd104a6 pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x7cda5c78 lease_modify +EXPORT_SYMBOL vmlinux 0x7cf475a7 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x7cfee76a __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d42aad6 scsi_remove_device +EXPORT_SYMBOL vmlinux 0x7d615641 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0x7d7c57bc __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x7d7eb270 write_inode_now +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7dec0833 page_address +EXPORT_SYMBOL vmlinux 0x7e0496b9 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x7e08c9b1 block_sync_page +EXPORT_SYMBOL vmlinux 0x7e0d8529 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x7e147431 inet_select_addr +EXPORT_SYMBOL vmlinux 0x7e2084a8 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x7e3538ee i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x7e3b496e inet_register_protosw +EXPORT_SYMBOL vmlinux 0x7e57b83b find_inode_number +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e933d3f bd_claim +EXPORT_SYMBOL vmlinux 0x7e951765 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x7ecb4617 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x7ee0f70a gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x7ee1377c dquot_commit +EXPORT_SYMBOL vmlinux 0x7efd0664 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x7f1426d1 blk_init_tags +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f6cc120 scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x7f86f12f force_sig +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f943130 neigh_for_each +EXPORT_SYMBOL vmlinux 0x7fa36500 seq_release_private +EXPORT_SYMBOL vmlinux 0x7fbf7811 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x800c3bbe tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x801134fc scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x801726a6 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x8018917c of_device_uevent +EXPORT_SYMBOL vmlinux 0x801f5a3f __strncpy_from_user +EXPORT_SYMBOL vmlinux 0x802b6ccd skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x8051c5b2 sock_create_kern +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x8085c7b1 prepare_to_wait +EXPORT_SYMBOL vmlinux 0x80a5df37 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x80dddab5 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x811847b7 __lock_page +EXPORT_SYMBOL vmlinux 0x812dbb37 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x81a18435 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x81beb104 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x81c0a84f rtas_set_indicator +EXPORT_SYMBOL vmlinux 0x81d66a02 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x81f47cac ide_dump_status +EXPORT_SYMBOL vmlinux 0x81f676b2 pci_release_regions +EXPORT_SYMBOL vmlinux 0x81fc188a dquot_destroy +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x8210ec7a filp_close +EXPORT_SYMBOL vmlinux 0x8225b78c journal_create +EXPORT_SYMBOL vmlinux 0x822c64f4 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x82489330 inode_init_always +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x8262f64b tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x829934de devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x82a0bfb8 pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x82a3b5f8 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x82a89dc5 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x82ba8ea8 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x82c7219b eth_validate_addr +EXPORT_SYMBOL vmlinux 0x82d54ca0 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x82e31840 sg_miter_next +EXPORT_SYMBOL vmlinux 0x82e5a238 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x82eadf77 complete_request_key +EXPORT_SYMBOL vmlinux 0x82ee388e sock_wfree +EXPORT_SYMBOL vmlinux 0x830bc27a fifo_create_dflt +EXPORT_SYMBOL vmlinux 0x83357dec bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x833f34c4 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x8341a4e9 lease_get_mtime +EXPORT_SYMBOL vmlinux 0x8371c993 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0x83801321 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x8381598f blk_init_queue +EXPORT_SYMBOL vmlinux 0x8388ec44 pskb_copy +EXPORT_SYMBOL vmlinux 0x839b1708 get_super +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83d64f5d dquot_commit_info +EXPORT_SYMBOL vmlinux 0x83dc6dd4 pci_scan_slot +EXPORT_SYMBOL vmlinux 0x83f36305 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x840a24bf scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x8430c683 fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x844404cf ISA_DMA_THRESHOLD +EXPORT_SYMBOL vmlinux 0x8467ce4a find_get_page +EXPORT_SYMBOL vmlinux 0x84b183ae strncmp +EXPORT_SYMBOL vmlinux 0x84efe00a tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x84f997bc netif_rx_ni +EXPORT_SYMBOL vmlinux 0x851d64cd jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x8541bccc intercept_table +EXPORT_SYMBOL vmlinux 0x855d8037 netif_rx +EXPORT_SYMBOL vmlinux 0x8561a37f i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x856d08da dquot_free_space +EXPORT_SYMBOL vmlinux 0x85849890 security_path_truncate +EXPORT_SYMBOL vmlinux 0x85a1b80e make_bad_inode +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b764eb fb_validate_mode +EXPORT_SYMBOL vmlinux 0x85b9edd0 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x8614e9eb generic_block_bmap +EXPORT_SYMBOL vmlinux 0x861a3bcd pci_request_regions +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866bfe36 cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0x86799cdc bio_init +EXPORT_SYMBOL vmlinux 0x867fb24b pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0x8684df37 nla_put +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x869c57b4 inode_permission +EXPORT_SYMBOL vmlinux 0x86b58e0a ___pskb_trim +EXPORT_SYMBOL vmlinux 0x86bd6913 of_get_pci_address +EXPORT_SYMBOL vmlinux 0x86d16f0c vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x86db1cbb rtas_flash_term_hook +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x8707df3a alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x87198f96 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x872927b8 down_timeout +EXPORT_SYMBOL vmlinux 0x8744ea8d kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x875daf7c mac_find_mode +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x878b9d5d journal_errno +EXPORT_SYMBOL vmlinux 0x87a44442 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x87af55f2 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x87bbab13 d_add_ci +EXPORT_SYMBOL vmlinux 0x87e3d59c inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x87fc24ca pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x88150448 llc_sap_open +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x88892b9b elv_queue_empty +EXPORT_SYMBOL vmlinux 0x889c041b matrox_millennium +EXPORT_SYMBOL vmlinux 0x88adb463 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x88b0e584 ip_route_input +EXPORT_SYMBOL vmlinux 0x88b802c9 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x88d27898 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x88ebf66c vfs_mkdir +EXPORT_SYMBOL vmlinux 0x890e9ef6 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x89151e2e generic_fillattr +EXPORT_SYMBOL vmlinux 0x891d5f2f per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0x891e32b8 wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0x893dd1e1 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x894da7b9 scsi_remove_target +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89b3107b isa_mem_base +EXPORT_SYMBOL vmlinux 0x89d0c1d6 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a16072b dqget +EXPORT_SYMBOL vmlinux 0x8a1d9e1d ps2_handle_response +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a44a27d jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x8a51821d block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x8a544652 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x8a62d978 da903x_query_status +EXPORT_SYMBOL vmlinux 0x8a683484 scsi_register +EXPORT_SYMBOL vmlinux 0x8a6911c3 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab4079e atomic64_add +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8b1468ab nf_afinfo +EXPORT_SYMBOL vmlinux 0x8b587f91 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0x8b6233a2 pci_disable_msi +EXPORT_SYMBOL vmlinux 0x8b695925 invalidate_partition +EXPORT_SYMBOL vmlinux 0x8b71e9e7 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x8b7c8a0d have_submounts +EXPORT_SYMBOL vmlinux 0x8b9a4149 ida_destroy +EXPORT_SYMBOL vmlinux 0x8baf3386 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x8bb360df serio_reconnect +EXPORT_SYMBOL vmlinux 0x8bc71553 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bd66424 register_snap_client +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c359d4c wireless_send_event +EXPORT_SYMBOL vmlinux 0x8c46259b __breadahead +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c590bbd alloc_fddidev +EXPORT_SYMBOL vmlinux 0x8c7bc348 ida_remove +EXPORT_SYMBOL vmlinux 0x8c8c4985 ether_setup +EXPORT_SYMBOL vmlinux 0x8c99a577 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x8ca1913e of_find_matching_node +EXPORT_SYMBOL vmlinux 0x8ca316d3 __free_pages +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8ccb3e3f __find_get_block +EXPORT_SYMBOL vmlinux 0x8ccbf514 blk_run_queue +EXPORT_SYMBOL vmlinux 0x8cd19199 kset_unregister +EXPORT_SYMBOL vmlinux 0x8d1d9e62 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d5642fc wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0x8d63ace2 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x8d8d0439 d_alloc_root +EXPORT_SYMBOL vmlinux 0x8d8fc4e3 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0x8dcb5c27 idr_remove +EXPORT_SYMBOL vmlinux 0x8dd18254 try_to_release_page +EXPORT_SYMBOL vmlinux 0x8df5da63 memstart_addr +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e0bc668 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x8e32291d scsi_device_get +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e441c3c skb_make_writable +EXPORT_SYMBOL vmlinux 0x8e5a3bc4 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x8e5e18c4 register_filesystem +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e79ea74 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x8e8a76f3 of_find_all_nodes +EXPORT_SYMBOL vmlinux 0x8e90087d pci_fixup_device +EXPORT_SYMBOL vmlinux 0x8ea17b6b scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x8ee4d6ec udplite_prot +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8ef611ac wake_up_process +EXPORT_SYMBOL vmlinux 0x8f07d8ca __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8f2be940 arp_xmit +EXPORT_SYMBOL vmlinux 0x8f334a61 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f77cc91 nla_append +EXPORT_SYMBOL vmlinux 0x8f93518b of_gpio_count +EXPORT_SYMBOL vmlinux 0x8f9b86b2 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x8fcb7143 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x9010b56f security_task_getsecid +EXPORT_SYMBOL vmlinux 0x9018f96b unload_nls +EXPORT_SYMBOL vmlinux 0x90463713 vc_resize +EXPORT_SYMBOL vmlinux 0x9047337d pci_save_state +EXPORT_SYMBOL vmlinux 0x90501868 transfer_to_handler +EXPORT_SYMBOL vmlinux 0x9090cf12 pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x90b50379 km_new_mapping +EXPORT_SYMBOL vmlinux 0x90e0c5b0 page_symlink +EXPORT_SYMBOL vmlinux 0x90ed6f1e thaw_process +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x912557ce rtas_busy_delay +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x914821f5 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x9148c7ae dma_spin_lock +EXPORT_SYMBOL vmlinux 0x915e1208 tb_ticks_per_usec +EXPORT_SYMBOL vmlinux 0x9168c033 rtas_get_sensor +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x919d1163 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x91ae52fe dcache_dir_close +EXPORT_SYMBOL vmlinux 0x91aeec9a sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x91c1d89d macio_register_driver +EXPORT_SYMBOL vmlinux 0x91d88e48 __debugger_dabr_match +EXPORT_SYMBOL vmlinux 0x9200b444 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x920409c2 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x922228aa inet_frags_init +EXPORT_SYMBOL vmlinux 0x9240f61e journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x928dcd49 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x92aeeebc i2c_transfer +EXPORT_SYMBOL vmlinux 0x92c00de5 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x9309de94 cuda_request +EXPORT_SYMBOL vmlinux 0x933453e2 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x9335c130 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x93515cc0 key_unlink +EXPORT_SYMBOL vmlinux 0x93637a99 of_node_get +EXPORT_SYMBOL vmlinux 0x9371865a udp_poll +EXPORT_SYMBOL vmlinux 0x93921081 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0x9395f34b pci_get_device +EXPORT_SYMBOL vmlinux 0x939980a9 d_lookup +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93ae72ba tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9411466c wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x941682b3 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x9445d2c6 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x944ca22e sk_run_filter +EXPORT_SYMBOL vmlinux 0x946509bd scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94bb7f90 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x94bd64ad open_exec +EXPORT_SYMBOL vmlinux 0x94d3e8d7 in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x94fb2287 tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x9501ceba update_region +EXPORT_SYMBOL vmlinux 0x9501d078 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x951efd75 ip_dev_find +EXPORT_SYMBOL vmlinux 0x9524b0ae _outsb +EXPORT_SYMBOL vmlinux 0x952e843b machine_is_compatible +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x9554261f input_register_handler +EXPORT_SYMBOL vmlinux 0x956e410d tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x959cd92e scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0x95ad2708 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0x95ded72f devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x95fe2673 d_instantiate +EXPORT_SYMBOL vmlinux 0x9632b69c journal_forget +EXPORT_SYMBOL vmlinux 0x96357079 matroxfb_g450_shutdown +EXPORT_SYMBOL vmlinux 0x9637d15e of_phy_connect_fixed_link +EXPORT_SYMBOL vmlinux 0x9643897c sk_common_release +EXPORT_SYMBOL vmlinux 0x964935be blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x964e1713 prepare_binprm +EXPORT_SYMBOL vmlinux 0x967479d1 scsi_init_io +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x9699b8e6 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x96b9c7a7 inet_listen +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x97255bdf strlen +EXPORT_SYMBOL vmlinux 0x97321feb free_task +EXPORT_SYMBOL vmlinux 0x973a5670 of_find_node_by_type +EXPORT_SYMBOL vmlinux 0x9748927f _outsw_ns +EXPORT_SYMBOL vmlinux 0x9754d20c __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9788cd7c noop_qdisc +EXPORT_SYMBOL vmlinux 0x97a56470 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x97c09035 vfs_quota_on +EXPORT_SYMBOL vmlinux 0x97c3a0c4 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x98910a16 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x989516e3 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x98a9b1c1 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x98f92e4c tcf_hash_check +EXPORT_SYMBOL vmlinux 0x98fe7882 DMA_MODE_READ +EXPORT_SYMBOL vmlinux 0x99898422 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99b20d31 pci_set_power_state +EXPORT_SYMBOL vmlinux 0x99b9bd58 setup_new_exec +EXPORT_SYMBOL vmlinux 0x99bb8806 memmove +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a432885 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x9ae315f1 of_get_next_child +EXPORT_SYMBOL vmlinux 0x9ae62b96 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x9aeb4e00 unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x9af93f81 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x9afd9dfc starget_for_each_device +EXPORT_SYMBOL vmlinux 0x9b086deb i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x9b19ef6d tcp_proc_register +EXPORT_SYMBOL vmlinux 0x9b2e6544 d_rehash +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b49d6b1 scm_fp_dup +EXPORT_SYMBOL vmlinux 0x9b5dab55 skb_unlink +EXPORT_SYMBOL vmlinux 0x9b5eb716 dev_change_flags +EXPORT_SYMBOL vmlinux 0x9b5f459d kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b790a23 scsi_block_requests +EXPORT_SYMBOL vmlinux 0x9b846e16 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x9ba5460b bio_sector_offset +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bea315d netlink_set_err +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c05354b __napi_schedule +EXPORT_SYMBOL vmlinux 0x9c2c05c2 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x9c364e44 register_nls +EXPORT_SYMBOL vmlinux 0x9c5834a9 rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x9c5e754c is_bad_inode +EXPORT_SYMBOL vmlinux 0x9c9fb791 kthread_stop +EXPORT_SYMBOL vmlinux 0x9ca4e56b scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x9cafff08 pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cbd9443 should_remove_suid +EXPORT_SYMBOL vmlinux 0x9cdcfd10 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cec3865 matroxfb_g450_connect +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9cffcbf2 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x9d14983a ppc_enable_pmcs +EXPORT_SYMBOL vmlinux 0x9d492543 kfree_skb +EXPORT_SYMBOL vmlinux 0x9d52a324 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x9d645972 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x9d669763 memcpy +EXPORT_SYMBOL vmlinux 0x9d6cbb6c matroxfb_DAC_in +EXPORT_SYMBOL vmlinux 0x9d72bfb6 follow_up +EXPORT_SYMBOL vmlinux 0x9d7f37eb filp_open +EXPORT_SYMBOL vmlinux 0x9d81c423 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x9d8c3cc1 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x9db4f1fe pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x9db6c5fa register_exec_domain +EXPORT_SYMBOL vmlinux 0x9db96631 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x9dd7f83b genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x9decccd9 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x9dfff55e skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x9e120414 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x9e16e730 neigh_event_ns +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e537280 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x9e6e1b56 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x9e8fbbfa tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0x9e97375d rtas_busy_delay_time +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea26c4c down_write_trylock +EXPORT_SYMBOL vmlinux 0x9ed2a88b bio_clone +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9eed423f simple_lookup +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f224d24 set_create_files_as +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f4615be nf_register_hooks +EXPORT_SYMBOL vmlinux 0x9f489375 get_sb_ns +EXPORT_SYMBOL vmlinux 0x9f648172 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x9f7f4b62 lock_rename +EXPORT_SYMBOL vmlinux 0x9f84c0bc sock_wmalloc +EXPORT_SYMBOL vmlinux 0x9f850092 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa325c0 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x9fac5df2 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x9fe3400c get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x9fe6fa56 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x9fe8deca udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xa0140b7d scsi_rescan_device +EXPORT_SYMBOL vmlinux 0xa024ffa5 __sg_free_table +EXPORT_SYMBOL vmlinux 0xa033d05a up_read +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa036870a __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa062e237 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0xa06ecb92 xfrm_register_km +EXPORT_SYMBOL vmlinux 0xa07a8d22 sleep_on +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa0fec844 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa161c694 kobject_put +EXPORT_SYMBOL vmlinux 0xa17c1ebb remove_inode_hash +EXPORT_SYMBOL vmlinux 0xa1a9b1ee inet_sendmsg +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1c24304 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1ce28cc __neigh_event_send +EXPORT_SYMBOL vmlinux 0xa1d4eedc xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xa1e839ed rtnl_unicast +EXPORT_SYMBOL vmlinux 0xa204b915 unlock_page +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa218bf61 complete +EXPORT_SYMBOL vmlinux 0xa21e2e87 tcp_parse_options +EXPORT_SYMBOL vmlinux 0xa21e67e6 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0xa231d224 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xa255306d tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0xa27542c5 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a478c2 contig_page_data +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2bbed37 crash_shutdown_register +EXPORT_SYMBOL vmlinux 0xa2bd92bd install_exec_creds +EXPORT_SYMBOL vmlinux 0xa2d57731 tcp_make_synack +EXPORT_SYMBOL vmlinux 0xa2f50636 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0xa2fd1eb4 block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0xa323e4b9 inode_init_once +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa3389ef6 unregister_nls +EXPORT_SYMBOL vmlinux 0xa344b3d2 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xa344ec4d vfs_follow_link +EXPORT_SYMBOL vmlinux 0xa346ccc3 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xa3494e2b ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa38b0abf register_chrdev +EXPORT_SYMBOL vmlinux 0xa38e691a ioremap_bot +EXPORT_SYMBOL vmlinux 0xa394275d i2c_add_adapter +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa3a4ed03 cond_resched_lock +EXPORT_SYMBOL vmlinux 0xa3c7816a of_get_parent +EXPORT_SYMBOL vmlinux 0xa3e75545 flush_tlb_kernel_range +EXPORT_SYMBOL vmlinux 0xa3f9864e __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xa4141ee8 lock_may_write +EXPORT_SYMBOL vmlinux 0xa41db5ce notify_change +EXPORT_SYMBOL vmlinux 0xa42be452 i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xa42fd49c init_special_inode +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa478187e g450_mnp2f +EXPORT_SYMBOL vmlinux 0xa4961ba9 wireless_spy_update +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4c81e18 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xa4d84bf2 __inet6_hash +EXPORT_SYMBOL vmlinux 0xa4fde3e5 blk_plug_device +EXPORT_SYMBOL vmlinux 0xa5362c60 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xa5373ab7 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xa54506fc gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0xa54698fe remove_arg_zero +EXPORT_SYMBOL vmlinux 0xa54b6a12 simple_unlink +EXPORT_SYMBOL vmlinux 0xa56f3522 generic_writepages +EXPORT_SYMBOL vmlinux 0xa5703a67 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xa576c263 generic_find_next_le_bit +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5b00659 ppc_proc_freq +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa6380aa7 set_blocksize +EXPORT_SYMBOL vmlinux 0xa64eddb1 key_payload_reserve +EXPORT_SYMBOL vmlinux 0xa65972b8 _memcpy_toio +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6a0ae6a nla_reserve +EXPORT_SYMBOL vmlinux 0xa6d311c2 put_tty_driver +EXPORT_SYMBOL vmlinux 0xa6d7709c tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0xa6d79799 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6f980e8 skb_pad +EXPORT_SYMBOL vmlinux 0xa724fd79 pci_request_region +EXPORT_SYMBOL vmlinux 0xa7515fe5 xfrm_lookup +EXPORT_SYMBOL vmlinux 0xa7a5bba6 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0xa7edcb3e get_phy_id +EXPORT_SYMBOL vmlinux 0xa80b3b79 gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xa811ad35 sock_create +EXPORT_SYMBOL vmlinux 0xa81bd3de tcp_v4_connect +EXPORT_SYMBOL vmlinux 0xa85284e8 replace_mount_options +EXPORT_SYMBOL vmlinux 0xa859c9b8 napi_gro_receive +EXPORT_SYMBOL vmlinux 0xa85ffc51 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0xa861ab6e __ioremap +EXPORT_SYMBOL vmlinux 0xa876a45f vfs_rename +EXPORT_SYMBOL vmlinux 0xa87729de cancel_dirty_page +EXPORT_SYMBOL vmlinux 0xa88bfaf5 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xa88daaab tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xa89464b7 __ashldi3 +EXPORT_SYMBOL vmlinux 0xa8ac4d52 copy_io_context +EXPORT_SYMBOL vmlinux 0xa8ae39c8 __scsi_put_command +EXPORT_SYMBOL vmlinux 0xa8cb7026 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xa8dc82b9 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xa8ec4356 find_lock_page +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa911b5a3 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0xa95609f5 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xa956cf03 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xa9571d6d DMA_MODE_WRITE +EXPORT_SYMBOL vmlinux 0xa9bd4188 journal_lock_updates +EXPORT_SYMBOL vmlinux 0xa9f1ed23 bit_waitqueue +EXPORT_SYMBOL vmlinux 0xaa0106a6 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0xaa0b4de3 pci_clear_master +EXPORT_SYMBOL vmlinux 0xaa1ee917 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0xaa3e39f9 irq_desc +EXPORT_SYMBOL vmlinux 0xaa4df512 pmu_batteries +EXPORT_SYMBOL vmlinux 0xaa527612 __kfifo_put +EXPORT_SYMBOL vmlinux 0xaa8483bf neigh_resolve_output +EXPORT_SYMBOL vmlinux 0xaa898cba __brelse +EXPORT_SYMBOL vmlinux 0xaaa2b2c8 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0xaae5615b xrlim_allow +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xab04564e names_cachep +EXPORT_SYMBOL vmlinux 0xab1bdbf2 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xab3a057c i2c_use_client +EXPORT_SYMBOL vmlinux 0xab53b0a8 mempool_alloc +EXPORT_SYMBOL vmlinux 0xab65393d pci_read_vpd +EXPORT_SYMBOL vmlinux 0xab7010ab ipv4_specific +EXPORT_SYMBOL vmlinux 0xab7dfc48 d_move +EXPORT_SYMBOL vmlinux 0xaba46966 input_allocate_device +EXPORT_SYMBOL vmlinux 0xabbf93af netpoll_print_options +EXPORT_SYMBOL vmlinux 0xabcd54b5 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd47787 down_killable +EXPORT_SYMBOL vmlinux 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL vmlinux 0xabdd8bc0 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xac0b9c10 mnt_unpin +EXPORT_SYMBOL vmlinux 0xac26d9f9 ide_raw_taskfile +EXPORT_SYMBOL vmlinux 0xac45fdfb skb_clone +EXPORT_SYMBOL vmlinux 0xac54fc9f mempool_destroy +EXPORT_SYMBOL vmlinux 0xac5f113d cpu_all_bits +EXPORT_SYMBOL vmlinux 0xac5f8ec5 pci_enable_device +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xacca9176 seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacd3d7d9 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad1f57cc kobject_add +EXPORT_SYMBOL vmlinux 0xad277cb7 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0xad287d1d dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xad417f30 proc_dostring +EXPORT_SYMBOL vmlinux 0xad4da90b nf_ip_checksum +EXPORT_SYMBOL vmlinux 0xad96b180 send_sig +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadb1f2c3 pci_busdev_to_OF_node +EXPORT_SYMBOL vmlinux 0xadb792c2 prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0xadd1e971 alignment_exception +EXPORT_SYMBOL vmlinux 0xaddd4770 __debugger_iabr_match +EXPORT_SYMBOL vmlinux 0xadeef801 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xadff0af6 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0xae288d8c security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xae33568c netlink_kernel_create +EXPORT_SYMBOL vmlinux 0xae3fbd7e sk_alloc +EXPORT_SYMBOL vmlinux 0xae5a027f mem_map +EXPORT_SYMBOL vmlinux 0xaea59ac6 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xaeabeb08 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xaec4789a scsi_print_sense +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaeef6396 kthread_bind +EXPORT_SYMBOL vmlinux 0xaf28e9d7 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf448fbd blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xafa1ff3d clear_inode +EXPORT_SYMBOL vmlinux 0xafbacadb tcf_hash_release +EXPORT_SYMBOL vmlinux 0xafbf25e1 __getblk +EXPORT_SYMBOL vmlinux 0xafe2496c jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xb006159b sock_kfree_s +EXPORT_SYMBOL vmlinux 0xb00cd998 d_invalidate +EXPORT_SYMBOL vmlinux 0xb015af2a blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xb0230d7b of_device_alloc +EXPORT_SYMBOL vmlinux 0xb03121d4 textsearch_destroy +EXPORT_SYMBOL vmlinux 0xb04501a2 invalidate_inodes +EXPORT_SYMBOL vmlinux 0xb0592d60 stop_tty +EXPORT_SYMBOL vmlinux 0xb076c7f8 vfs_link +EXPORT_SYMBOL vmlinux 0xb0ae6859 inode_get_bytes +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb11e82a8 sock_no_poll +EXPORT_SYMBOL vmlinux 0xb14fc3f9 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0xb150e35e con_is_bound +EXPORT_SYMBOL vmlinux 0xb1523fb9 give_up_console +EXPORT_SYMBOL vmlinux 0xb15bd8fa tb_ticks_per_sec +EXPORT_SYMBOL vmlinux 0xb168b20d __kfree_skb +EXPORT_SYMBOL vmlinux 0xb16de4d8 devm_free_irq +EXPORT_SYMBOL vmlinux 0xb17d389e sk_stop_timer +EXPORT_SYMBOL vmlinux 0xb1851142 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0xb18f3f06 ide_xfer_verbose +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1af099c flush_old_exec +EXPORT_SYMBOL vmlinux 0xb1b62f3c kmalloc_caches +EXPORT_SYMBOL vmlinux 0xb1b768c5 __serio_register_driver +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1df5694 vfs_readlink +EXPORT_SYMBOL vmlinux 0xb1e95ccd blk_sync_queue +EXPORT_SYMBOL vmlinux 0xb201743e scsi_target_resume +EXPORT_SYMBOL vmlinux 0xb20d0ff7 simple_link +EXPORT_SYMBOL vmlinux 0xb21da523 dev_alloc_name +EXPORT_SYMBOL vmlinux 0xb21ec82d vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb233762c atomic64_set +EXPORT_SYMBOL vmlinux 0xb25c808c kobject_del +EXPORT_SYMBOL vmlinux 0xb263bf9f iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0xb2668bcd seq_puts +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb26e76f3 ip_setsockopt +EXPORT_SYMBOL vmlinux 0xb2775bd3 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0xb27bf5e3 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xb29908b1 blk_register_region +EXPORT_SYMBOL vmlinux 0xb29b7c26 ide_set_handler +EXPORT_SYMBOL vmlinux 0xb2ac6645 get_user_pages +EXPORT_SYMBOL vmlinux 0xb2d72cc7 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0xb315773b iput +EXPORT_SYMBOL vmlinux 0xb3263631 path_get +EXPORT_SYMBOL vmlinux 0xb32fdcc6 security_d_instantiate +EXPORT_SYMBOL vmlinux 0xb338898b request_key_async +EXPORT_SYMBOL vmlinux 0xb35e30a0 of_n_size_cells +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb386b115 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3d10656 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb4554faf sg_miter_start +EXPORT_SYMBOL vmlinux 0xb464042d phy_detach +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb47acc03 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0xb48ae27e scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xb4c107b5 of_gpio_simple_xlate +EXPORT_SYMBOL vmlinux 0xb4d033a7 generic_readlink +EXPORT_SYMBOL vmlinux 0xb4efedac mdiobus_alloc +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb51c239a invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0xb52db6aa revert_creds +EXPORT_SYMBOL vmlinux 0xb53a4336 kmap_pte +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb555f024 genl_register_ops +EXPORT_SYMBOL vmlinux 0xb564a190 i2c_master_send +EXPORT_SYMBOL vmlinux 0xb588d8d5 mdio_bus_type +EXPORT_SYMBOL vmlinux 0xb5960618 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xb5993637 skb_gso_segment +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5a862e8 udp_sendmsg +EXPORT_SYMBOL vmlinux 0xb5facad8 unregister_quota_format +EXPORT_SYMBOL vmlinux 0xb637d378 input_close_device +EXPORT_SYMBOL vmlinux 0xb6599b9a machine_check_exception +EXPORT_SYMBOL vmlinux 0xb661c497 __devm_request_region +EXPORT_SYMBOL vmlinux 0xb663f9dc qdisc_destroy +EXPORT_SYMBOL vmlinux 0xb6642c55 scsi_device_resume +EXPORT_SYMBOL vmlinux 0xb6683c36 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bc2f00 file_fsync +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6c70a7d __wake_up +EXPORT_SYMBOL vmlinux 0xb6dde5fa pcibios_fixup_bus +EXPORT_SYMBOL vmlinux 0xb701d72e blk_free_tags +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb70f3c74 blk_peek_request +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb71ba34d blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0xb7510e99 pipe_unlock +EXPORT_SYMBOL vmlinux 0xb753bcc8 __ashrdi3 +EXPORT_SYMBOL vmlinux 0xb768f093 i2c_register_driver +EXPORT_SYMBOL vmlinux 0xb7710674 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0xb7788e1d test_set_page_writeback +EXPORT_SYMBOL vmlinux 0xb78a44e3 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7a40879 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xb7ad3321 ida_init +EXPORT_SYMBOL vmlinux 0xb7b11df7 sock_release +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7bc182d dquot_alloc_space +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7d7259f scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xb85cb43e generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb8732a9d init_net +EXPORT_SYMBOL vmlinux 0xb883cea7 __bread +EXPORT_SYMBOL vmlinux 0xb8969051 tty_unregister_device +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb93c45a8 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0xb97d4c9c mutex_lock +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9c6e3fb i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xb9f4f7f3 phy_device_create +EXPORT_SYMBOL vmlinux 0xb9f8c1aa proc_dointvec +EXPORT_SYMBOL vmlinux 0xb9fd53a5 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0xba0b3472 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xba0e4601 ll_rw_block +EXPORT_SYMBOL vmlinux 0xba40548f mb_cache_shrink +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba8ae88d fb_blank +EXPORT_SYMBOL vmlinux 0xba8f8b68 completion_done +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb19a591 end_page_writeback +EXPORT_SYMBOL vmlinux 0xbb1ef86b inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xbb20b2e1 elevator_exit +EXPORT_SYMBOL vmlinux 0xbb2140b9 del_timer +EXPORT_SYMBOL vmlinux 0xbb255596 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb5f01ea tcp_prot +EXPORT_SYMBOL vmlinux 0xbb618a38 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0xbb741357 vfs_readdir +EXPORT_SYMBOL vmlinux 0xbb829e06 pci_find_bus +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbb03933 unregister_cdrom +EXPORT_SYMBOL vmlinux 0xbbb3caf3 sock_no_listen +EXPORT_SYMBOL vmlinux 0xbbe6c8ff ide_complete_rq +EXPORT_SYMBOL vmlinux 0xbc316de4 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0xbc321321 of_platform_bus_probe +EXPORT_SYMBOL vmlinux 0xbc928cee put_mnt_ns +EXPORT_SYMBOL vmlinux 0xbcefe22f journal_init_dev +EXPORT_SYMBOL vmlinux 0xbd2b78fb dget_locked +EXPORT_SYMBOL vmlinux 0xbd36eea3 skb_tx_hash +EXPORT_SYMBOL vmlinux 0xbd37c406 sockfd_lookup +EXPORT_SYMBOL vmlinux 0xbd4438f1 destroy_EII_client +EXPORT_SYMBOL vmlinux 0xbd567bfc security_path_mknod +EXPORT_SYMBOL vmlinux 0xbd682dc3 tty_devnum +EXPORT_SYMBOL vmlinux 0xbd8d541d flush_hash_pages +EXPORT_SYMBOL vmlinux 0xbd9667ce journal_extend +EXPORT_SYMBOL vmlinux 0xbd9e5d49 __lshrdi3 +EXPORT_SYMBOL vmlinux 0xbdc9fb11 proc_symlink +EXPORT_SYMBOL vmlinux 0xbdeead7d pci_target_state +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe2b6f99 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0xbe2c0cbb blkdev_put +EXPORT_SYMBOL vmlinux 0xbe35ffce serio_rescan +EXPORT_SYMBOL vmlinux 0xbe473536 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe775643 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xbe7c48a6 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0xbe8e4742 flush_hash_entry +EXPORT_SYMBOL vmlinux 0xbea02c62 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf25e1d7 nobh_writepage +EXPORT_SYMBOL vmlinux 0xbf4fa4f3 scsi_host_lookup +EXPORT_SYMBOL vmlinux 0xbf5a05f8 fifo_set_limit +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbf9f03a6 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0xbfa5b3bb unlock_super +EXPORT_SYMBOL vmlinux 0xbfb00f44 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0xbfb6464d block_read_full_page +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfd6a181 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0xbfe29e4a blk_remove_plug +EXPORT_SYMBOL vmlinux 0xbff00f1a tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0xc00a7d0b i2c_release_client +EXPORT_SYMBOL vmlinux 0xc0557a94 skb_push +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc0594a9c llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0xc0771fcf journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xc0846150 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xc08a3f50 genphy_read_status +EXPORT_SYMBOL vmlinux 0xc090ce11 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0a9a13f serio_interrupt +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0c80d6b dev_unicast_add +EXPORT_SYMBOL vmlinux 0xc0d815f5 up_write +EXPORT_SYMBOL vmlinux 0xc0d84ced cuda_poll +EXPORT_SYMBOL vmlinux 0xc0e60574 generic_file_llseek +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc14d7bd4 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xc15e073c generic_find_next_zero_le_bit +EXPORT_SYMBOL vmlinux 0xc18326e1 path_lookup +EXPORT_SYMBOL vmlinux 0xc1a6fe4d pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xc1c50802 follow_down +EXPORT_SYMBOL vmlinux 0xc1c6513e write_cache_pages +EXPORT_SYMBOL vmlinux 0xc1dd4a7f adb_request +EXPORT_SYMBOL vmlinux 0xc1f2c5a6 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xc20a8dad tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc2857e69 pci_dev_get +EXPORT_SYMBOL vmlinux 0xc2983b6e swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0xc2a65b33 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0xc2c0b995 blk_put_request +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2ee0e44 dquot_release +EXPORT_SYMBOL vmlinux 0xc32a7108 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0xc342ce85 start_tty +EXPORT_SYMBOL vmlinux 0xc34e00ea __ide_dma_bad_drive +EXPORT_SYMBOL vmlinux 0xc368849f nvram_sync +EXPORT_SYMBOL vmlinux 0xc389db66 no_llseek +EXPORT_SYMBOL vmlinux 0xc3994956 inet_addr_type +EXPORT_SYMBOL vmlinux 0xc3c19d02 seq_putc +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3d7175a __f_setown +EXPORT_SYMBOL vmlinux 0xc3dd11b5 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xc417d66a pci_enable_bridges +EXPORT_SYMBOL vmlinux 0xc41b6a7e matroxfb_enable_irq +EXPORT_SYMBOL vmlinux 0xc43f7e24 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xc43fbb6b input_register_handle +EXPORT_SYMBOL vmlinux 0xc451ffcc pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0xc4540376 kill_pgrp +EXPORT_SYMBOL vmlinux 0xc458b2ea gen_pool_add +EXPORT_SYMBOL vmlinux 0xc4937ded pci_map_rom +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4cf506b unregister_framebuffer +EXPORT_SYMBOL vmlinux 0xc4ee90fa tty_vhangup +EXPORT_SYMBOL vmlinux 0xc4ef8ab7 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0xc5237c9f blk_unplug +EXPORT_SYMBOL vmlinux 0xc52ad3eb matroxfb_DAC_out +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc539ef64 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0xc53ac9e4 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0xc53ef267 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0xc542f02f generic_file_mmap +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc5641e5d simple_release_fs +EXPORT_SYMBOL vmlinux 0xc56cb130 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0xc575771e sg_free_table +EXPORT_SYMBOL vmlinux 0xc5c34f13 dquot_transfer +EXPORT_SYMBOL vmlinux 0xc5cc05c3 set_groups +EXPORT_SYMBOL vmlinux 0xc605dc1f phy_attach +EXPORT_SYMBOL vmlinux 0xc6184045 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xc61fa9c2 bio_endio +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc6378a2e cdev_alloc +EXPORT_SYMBOL vmlinux 0xc64db307 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xc64ec40c pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xc679f5b3 skb_append +EXPORT_SYMBOL vmlinux 0xc6d17854 of_release_dev +EXPORT_SYMBOL vmlinux 0xc7131591 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc760c3fa scsi_unregister +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7c37f5b con_set_default_unimap +EXPORT_SYMBOL vmlinux 0xc7c45320 lookup_one_len +EXPORT_SYMBOL vmlinux 0xc7e107c3 consume_skb +EXPORT_SYMBOL vmlinux 0xc7ea8ac8 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc7f8874b seq_escape +EXPORT_SYMBOL vmlinux 0xc8083b87 pci_iounmap +EXPORT_SYMBOL vmlinux 0xc834b7ca unregister_netdev +EXPORT_SYMBOL vmlinux 0xc8481a17 pci_find_device +EXPORT_SYMBOL vmlinux 0xc86d50b9 sync_blockdev +EXPORT_SYMBOL vmlinux 0xc87b4f23 mntput_no_expire +EXPORT_SYMBOL vmlinux 0xc8818c8b find_get_pages_contig +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8c778f6 netif_napi_del +EXPORT_SYMBOL vmlinux 0xc923c23e sock_no_socketpair +EXPORT_SYMBOL vmlinux 0xc927408d lock_fb_info +EXPORT_SYMBOL vmlinux 0xc92c602a input_register_device +EXPORT_SYMBOL vmlinux 0xc952c1c4 nf_log_register +EXPORT_SYMBOL vmlinux 0xc967bea1 pci_remove_bus +EXPORT_SYMBOL vmlinux 0xc98c959f pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xc996b7be __put_cred +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xca34814e tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0xca5c0387 pmac_register_agp_pm +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca825895 pmu_suspend +EXPORT_SYMBOL vmlinux 0xca8aa082 generic_read_dir +EXPORT_SYMBOL vmlinux 0xcacd272d atomic64_sub_return +EXPORT_SYMBOL vmlinux 0xcafec968 skb_insert +EXPORT_SYMBOL vmlinux 0xcb0419d4 pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xcb385185 pci_write_vpd +EXPORT_SYMBOL vmlinux 0xcb399742 cfb_fillrect +EXPORT_SYMBOL vmlinux 0xcb477372 __secpath_destroy +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcbc29f4e gen_new_estimator +EXPORT_SYMBOL vmlinux 0xcbc933c5 of_register_i2c_devices +EXPORT_SYMBOL vmlinux 0xcbe650d5 bio_copy_kern +EXPORT_SYMBOL vmlinux 0xcc15f2f5 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0xcc299643 phy_disconnect +EXPORT_SYMBOL vmlinux 0xcc3612d2 skb_free_datagram +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc37b931 set_bdi_congested +EXPORT_SYMBOL vmlinux 0xcc395ea1 textsearch_register +EXPORT_SYMBOL vmlinux 0xcc404f44 fput +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcceb15f6 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xccf59cb5 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0xcd025155 iget_failed +EXPORT_SYMBOL vmlinux 0xcd346c6f register_qdisc +EXPORT_SYMBOL vmlinux 0xcd536cfb audit_log_format +EXPORT_SYMBOL vmlinux 0xcd78e127 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xcd80c67c keyring_clear +EXPORT_SYMBOL vmlinux 0xcd88618b blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0xcdaef888 find_or_create_page +EXPORT_SYMBOL vmlinux 0xcdcae428 pcim_pin_device +EXPORT_SYMBOL vmlinux 0xcdec8ba7 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3f64dc hippi_type_trans +EXPORT_SYMBOL vmlinux 0xce409cda pmac_set_early_video_resume +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce802ab3 cdev_del +EXPORT_SYMBOL vmlinux 0xce8037f8 unregister_binfmt +EXPORT_SYMBOL vmlinux 0xce80e588 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xcea08d89 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xced95f22 dquot_alloc +EXPORT_SYMBOL vmlinux 0xcee4dea8 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xcee64441 journal_load +EXPORT_SYMBOL vmlinux 0xcef278ba I_BDEV +EXPORT_SYMBOL vmlinux 0xcf13918e of_device_get_modalias +EXPORT_SYMBOL vmlinux 0xcf3b9d46 write_one_page +EXPORT_SYMBOL vmlinux 0xcf3c9fb6 scsi_register_driver +EXPORT_SYMBOL vmlinux 0xcf46f971 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0xcf4cb593 key_alloc +EXPORT_SYMBOL vmlinux 0xcf4d4e2c fb_pan_display +EXPORT_SYMBOL vmlinux 0xcf4faaa2 simple_transaction_get +EXPORT_SYMBOL vmlinux 0xcf691ac4 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xcf901697 __strnlen_user +EXPORT_SYMBOL vmlinux 0xcfa24fd0 sock_kmalloc +EXPORT_SYMBOL vmlinux 0xcfadcf11 inetdev_by_index +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfd491b4 fd_install +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xcffce333 __ip_select_ident +EXPORT_SYMBOL vmlinux 0xd0017cfb llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xd00652f3 timecompare_offset +EXPORT_SYMBOL vmlinux 0xd006da34 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd0304a73 security_path_rmdir +EXPORT_SYMBOL vmlinux 0xd08a9f4a end_buffer_async_write +EXPORT_SYMBOL vmlinux 0xd0a45fa5 pmu_enable_irled +EXPORT_SYMBOL vmlinux 0xd0b8850c ps2_drain +EXPORT_SYMBOL vmlinux 0xd0e197e3 bioset_free +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0fb07a4 simple_set_mnt +EXPORT_SYMBOL vmlinux 0xd10297bb macio_request_resource +EXPORT_SYMBOL vmlinux 0xd106cce8 km_policy_expired +EXPORT_SYMBOL vmlinux 0xd1119ce7 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xd125b8a3 block_prepare_write +EXPORT_SYMBOL vmlinux 0xd1262886 rtas_data_buf +EXPORT_SYMBOL vmlinux 0xd18bb025 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xd194d954 key_negate_and_link +EXPORT_SYMBOL vmlinux 0xd1a63409 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0xd1ddde4f kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0xd1efe594 nobh_write_end +EXPORT_SYMBOL vmlinux 0xd2042aaf generic_listxattr +EXPORT_SYMBOL vmlinux 0xd234181b alloc_file +EXPORT_SYMBOL vmlinux 0xd23b9cdb dcache_dir_open +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd275f722 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xd27fc9da tcf_em_register +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd296cb3a inode_setattr +EXPORT_SYMBOL vmlinux 0xd2a8235e gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xd2c9db9f lock_super +EXPORT_SYMBOL vmlinux 0xd2d71805 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0xd30a2509 tcp_ioctl +EXPORT_SYMBOL vmlinux 0xd33458bf sock_setsockopt +EXPORT_SYMBOL vmlinux 0xd336d3ed sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0xd3427f73 mempool_create_node +EXPORT_SYMBOL vmlinux 0xd3c325b3 sock_i_uid +EXPORT_SYMBOL vmlinux 0xd3cd2951 mdiobus_read +EXPORT_SYMBOL vmlinux 0xd3f34ace unregister_console +EXPORT_SYMBOL vmlinux 0xd3f4c1d0 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0xd3f9cf8b registered_fb +EXPORT_SYMBOL vmlinux 0xd409383c pmu_request +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd4380b34 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0xd4435052 page_put_link +EXPORT_SYMBOL vmlinux 0xd455b584 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0xd47f4f3b phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0xd494c4c1 ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0xd4b98b91 napi_gro_frags +EXPORT_SYMBOL vmlinux 0xd4c9a9b9 matroxfb_wait_for_sync +EXPORT_SYMBOL vmlinux 0xd4cc1068 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xd5138901 llc_sap_close +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd57251b5 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd5a1bd05 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xd5a6e632 put_io_context +EXPORT_SYMBOL vmlinux 0xd5b2e52a single_step_exception +EXPORT_SYMBOL vmlinux 0xd5cf408a elv_add_request +EXPORT_SYMBOL vmlinux 0xd5db00ac DAC1064_global_restore +EXPORT_SYMBOL vmlinux 0xd5e8444a __div64_32 +EXPORT_SYMBOL vmlinux 0xd5fdf4b6 vfs_quota_off +EXPORT_SYMBOL vmlinux 0xd6186e0c blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0xd61bc699 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xd627480b strncat +EXPORT_SYMBOL vmlinux 0xd62ba277 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd639bc8e pmac_resume_agp_for_card +EXPORT_SYMBOL vmlinux 0xd63b3bbe kill_anon_super +EXPORT_SYMBOL vmlinux 0xd63d1f55 get_empty_filp +EXPORT_SYMBOL vmlinux 0xd63feb37 of_find_i2c_device_by_node +EXPORT_SYMBOL vmlinux 0xd65012f3 vfs_quota_sync +EXPORT_SYMBOL vmlinux 0xd65a50a4 vfs_read +EXPORT_SYMBOL vmlinux 0xd665c4b0 bdput +EXPORT_SYMBOL vmlinux 0xd6799cbb sget +EXPORT_SYMBOL vmlinux 0xd69b30e0 atomic64_add_unless +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd736b0a2 bioset_create +EXPORT_SYMBOL vmlinux 0xd75609e2 tty_register_driver +EXPORT_SYMBOL vmlinux 0xd766b4ab swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd78b37e5 i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0xd78ccf8b neigh_seq_next +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7b69fae idr_find +EXPORT_SYMBOL vmlinux 0xd7cf6c46 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xd7d5264c get_sb_bdev +EXPORT_SYMBOL vmlinux 0xd82051b4 tty_port_close +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd84be4d7 set_page_dirty +EXPORT_SYMBOL vmlinux 0xd863d82d ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0xd870a610 blk_insert_request +EXPORT_SYMBOL vmlinux 0xd8792e6b input_get_keycode +EXPORT_SYMBOL vmlinux 0xd88f22f2 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8b5e95a mach_chrp +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8e822b0 pci_read_irq_line +EXPORT_SYMBOL vmlinux 0xd909b5b2 __lock_buffer +EXPORT_SYMBOL vmlinux 0xd915c68c pci_match_id +EXPORT_SYMBOL vmlinux 0xd9232aca sk_dst_check +EXPORT_SYMBOL vmlinux 0xd92514ca agp_special_page +EXPORT_SYMBOL vmlinux 0xd927d55c __netif_schedule +EXPORT_SYMBOL vmlinux 0xd9314d4a ilookup +EXPORT_SYMBOL vmlinux 0xd956f3fb skb_queue_purge +EXPORT_SYMBOL vmlinux 0xd95f3bab xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xd97610df kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9ac48fe d_find_alias +EXPORT_SYMBOL vmlinux 0xd9bac924 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0xd9c1016e scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xd9ce8f0c strnlen +EXPORT_SYMBOL vmlinux 0xd9f3635b phy_driver_register +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda3cb8b1 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xda51ed2e arp_broken_ops +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8aedfb generic_shutdown_super +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8b5096 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdb02c365 matroxfb_vgaHWrestore +EXPORT_SYMBOL vmlinux 0xdb05bce8 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xdb099dec i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0xdb0eb386 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xdb1f974e ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xdb3d2916 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb766146 vc_cons +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdbab017c pci_set_mwi +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbe38721 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xdbf1c1bc register_sysctl_table +EXPORT_SYMBOL vmlinux 0xdbf72f99 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc0b6bbf blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc41d333 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc77a511 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xdc8cf65a sk_stream_error +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcc3d6aa dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0xdcc7ffac journal_init_inode +EXPORT_SYMBOL vmlinux 0xdcd7df99 register_netdevice +EXPORT_SYMBOL vmlinux 0xdce2b966 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0xdcefb9a5 pmu_resume +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd27fa87 memchr +EXPORT_SYMBOL vmlinux 0xdd638b59 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xdd78ba8c netdev_state_change +EXPORT_SYMBOL vmlinux 0xdd903aec kernel_sendmsg +EXPORT_SYMBOL vmlinux 0xdd9341d4 __scm_send +EXPORT_SYMBOL vmlinux 0xdda27370 sock_rfree +EXPORT_SYMBOL vmlinux 0xdda28d07 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0xddbf0b5c giveup_fpu +EXPORT_SYMBOL vmlinux 0xddd8d433 redraw_screen +EXPORT_SYMBOL vmlinux 0xddefa206 check_disk_change +EXPORT_SYMBOL vmlinux 0xde106f9e blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0xde16ab15 tty_free_termios +EXPORT_SYMBOL vmlinux 0xde22e8db kunmap_high +EXPORT_SYMBOL vmlinux 0xde337612 kernel_accept +EXPORT_SYMBOL vmlinux 0xde3c68a6 cpu_online_mask +EXPORT_SYMBOL vmlinux 0xde5cb022 devm_ioremap +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde850cd2 xfrm_init_state +EXPORT_SYMBOL vmlinux 0xde893edb simple_fill_super +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde9f4ccd dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0xdecf2bf1 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xded5f57e __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xdee075ba gen_pool_free +EXPORT_SYMBOL vmlinux 0xdee0e9ba simple_fsync +EXPORT_SYMBOL vmlinux 0xdeebf5b5 misc_deregister +EXPORT_SYMBOL vmlinux 0xdf122a2e tcp_disconnect +EXPORT_SYMBOL vmlinux 0xdf16efc2 vfsmount_lock +EXPORT_SYMBOL vmlinux 0xdf29552f xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0xdf2d5918 kobject_init +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf5fe77c elv_rb_find +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfb4dd13 napi_frags_finish +EXPORT_SYMBOL vmlinux 0xdfdd4216 do_munmap +EXPORT_SYMBOL vmlinux 0xdfe3e1b0 sysctl_string +EXPORT_SYMBOL vmlinux 0xdfead1c6 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xdff43ed4 __debugger +EXPORT_SYMBOL vmlinux 0xdff56e64 adb_poll +EXPORT_SYMBOL vmlinux 0xe0464133 input_unregister_device +EXPORT_SYMBOL vmlinux 0xe05d7748 set_security_override +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe08e3e22 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xe09ede6c sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0xe0a77092 bio_unmap_user +EXPORT_SYMBOL vmlinux 0xe0ab1c92 kill_fasync +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0f9bf12 __splice_from_pipe +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe114bed0 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xe125e776 i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0xe12ccaaa input_unregister_handler +EXPORT_SYMBOL vmlinux 0xe1574f37 blk_rq_init +EXPORT_SYMBOL vmlinux 0xe15da217 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0xe16f36a4 bio_map_user +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe187f3e4 sync_inode +EXPORT_SYMBOL vmlinux 0xe198e401 scsi_add_device +EXPORT_SYMBOL vmlinux 0xe1db4985 init_timer_key +EXPORT_SYMBOL vmlinux 0xe1df7949 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xe1e69b1f sk_filter +EXPORT_SYMBOL vmlinux 0xe204fd2c generic_write_end +EXPORT_SYMBOL vmlinux 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL vmlinux 0xe238fc1f flush_signals +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe274e23c i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xe293e000 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0xe299d164 fail_migrate_page +EXPORT_SYMBOL vmlinux 0xe2be58ea devm_iounmap +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e0c7c6 __flush_icache_range +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2f32b86 neigh_seq_start +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe305ebd1 ip_getsockopt +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe375a717 open_by_devnum +EXPORT_SYMBOL vmlinux 0xe3c627b9 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0xe3fd447f sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xe40ab3dd journal_start_commit +EXPORT_SYMBOL vmlinux 0xe459b15e blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0xe460b906 search_binary_handler +EXPORT_SYMBOL vmlinux 0xe4650298 matroxfb_unregister_driver +EXPORT_SYMBOL vmlinux 0xe46c7a32 nf_ct_attach +EXPORT_SYMBOL vmlinux 0xe48171c1 is_container_init +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4be8891 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xe4d37a0e nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe4f71692 key_link +EXPORT_SYMBOL vmlinux 0xe5019cce create_empty_buffers +EXPORT_SYMBOL vmlinux 0xe50fcf69 of_phy_connect +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe523cf4f tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0xe5356d4b scsi_free_command +EXPORT_SYMBOL vmlinux 0xe5577b7f tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xe572a7ab genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe580ad3f sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5952e7c skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xe59a525a neigh_update +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5cb8ce4 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0xe5ce7d9d posix_acl_permission +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe614ff3e ide_proc_unregister_driver +EXPORT_SYMBOL vmlinux 0xe6562614 udplite_table +EXPORT_SYMBOL vmlinux 0xe68f3120 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0xe6a1c4a6 of_match_node +EXPORT_SYMBOL vmlinux 0xe6ae7cf6 tty_shutdown +EXPORT_SYMBOL vmlinux 0xe6b16eb7 fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0xe6d11692 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xe6dd236d clear_pages +EXPORT_SYMBOL vmlinux 0xe6e0f96b blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe6feca82 may_umount +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe760ce90 __rta_fill +EXPORT_SYMBOL vmlinux 0xe7955d6d remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xe7ce7439 _memcpy_fromio +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7dd90b3 nf_reinject +EXPORT_SYMBOL vmlinux 0xe7eb334b alloc_fcdev +EXPORT_SYMBOL vmlinux 0xe7f5384e bio_kmalloc +EXPORT_SYMBOL vmlinux 0xe80679ea jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0xe82544b3 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0xe857e93f tty_port_close_start +EXPORT_SYMBOL vmlinux 0xe86e5fc1 downgrade_write +EXPORT_SYMBOL vmlinux 0xe891d28f input_event +EXPORT_SYMBOL vmlinux 0xe898f0b0 scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xe8a98a52 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8cfeebd xfrm_register_mode +EXPORT_SYMBOL vmlinux 0xe8d1eb57 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xe8f63d78 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe98a5b28 freeze_bdev +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea091751 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea70c13e bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xea85b6ae bdi_register_dev +EXPORT_SYMBOL vmlinux 0xea8e3351 sock_i_ino +EXPORT_SYMBOL vmlinux 0xeaf6572d napi_skb_finish +EXPORT_SYMBOL vmlinux 0xeaf85bb1 of_find_node_with_property +EXPORT_SYMBOL vmlinux 0xeb07dfe3 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0xeb230576 ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0xeb57e96f pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xeb665ff6 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8d1ba0 free_buffer_head +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb9afa00 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xeba2a1f7 rtas_indicator_present +EXPORT_SYMBOL vmlinux 0xebc89ba1 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xec09f1b5 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xec15ce2c bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0xec17f763 __devm_release_region +EXPORT_SYMBOL vmlinux 0xec198342 swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0xec319134 eth_header +EXPORT_SYMBOL vmlinux 0xec6d9e0c init_file +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xeca24513 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xecc4b072 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xecd1d057 sock_init_data +EXPORT_SYMBOL vmlinux 0xecd60476 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0xece8b254 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0xecebe08f udp_ioctl +EXPORT_SYMBOL vmlinux 0xed01c08a generic_write_checks +EXPORT_SYMBOL vmlinux 0xed03500e sock_create_lite +EXPORT_SYMBOL vmlinux 0xed0a6f29 do_SAK +EXPORT_SYMBOL vmlinux 0xed51999c ip_defrag +EXPORT_SYMBOL vmlinux 0xed5e39f4 mod_timer_pending +EXPORT_SYMBOL vmlinux 0xed702354 vfs_fsync +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedbbe51d scsicam_bios_param +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedc2ccb0 __serio_register_port +EXPORT_SYMBOL vmlinux 0xedc8947a neigh_compat_output +EXPORT_SYMBOL vmlinux 0xee0db7f4 generic_ro_fops +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee584e48 register_sysrq_key +EXPORT_SYMBOL vmlinux 0xee59412f adb_try_handler_change +EXPORT_SYMBOL vmlinux 0xee79860c blk_fetch_request +EXPORT_SYMBOL vmlinux 0xee8b7735 load_nls +EXPORT_SYMBOL vmlinux 0xee8f564b scsi_register_interface +EXPORT_SYMBOL vmlinux 0xee90884e dq_data_lock +EXPORT_SYMBOL vmlinux 0xee910eeb dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0xee9fe14c simple_write_begin +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeec5b578 vm_insert_page +EXPORT_SYMBOL vmlinux 0xeecf5d0f do_sync_write +EXPORT_SYMBOL vmlinux 0xeee90f87 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xef0baa8e netdev_features_change +EXPORT_SYMBOL vmlinux 0xef1338ac register_8022_client +EXPORT_SYMBOL vmlinux 0xef139b0d nf_setsockopt +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef9c1d32 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0xef9e577d d_delete +EXPORT_SYMBOL vmlinux 0xefbbeac1 submit_bio +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefde1bbe flush_dcache_range +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf03d71ad jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xf0508170 input_flush_device +EXPORT_SYMBOL vmlinux 0xf065f274 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf0a86909 task_nice +EXPORT_SYMBOL vmlinux 0xf0d2ca6d tcp_shutdown +EXPORT_SYMBOL vmlinux 0xf0d93ed3 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0xf0e25eb8 matrox_cfbX_init +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf101a15c fb_show_logo +EXPORT_SYMBOL vmlinux 0xf1069336 f_setown +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11b7252 dma_direct_ops +EXPORT_SYMBOL vmlinux 0xf15aa43a seq_path +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1a0104e fb_set_cmap +EXPORT_SYMBOL vmlinux 0xf1a4b765 skb_dma_map +EXPORT_SYMBOL vmlinux 0xf1da11a8 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf2156ace of_parse_phandle +EXPORT_SYMBOL vmlinux 0xf23b0e45 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xf24f6ea9 input_grab_device +EXPORT_SYMBOL vmlinux 0xf25d29aa of_find_device_by_phandle +EXPORT_SYMBOL vmlinux 0xf26ed3da balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xf27260dc jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0xf2ee425d get_pci_dma_ops +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3cc8b18 rtas_data_buf_lock +EXPORT_SYMBOL vmlinux 0xf3d41598 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0xf404da95 tty_hung_up_p +EXPORT_SYMBOL vmlinux 0xf42cfee6 inet_put_port +EXPORT_SYMBOL vmlinux 0xf43506ae sock_sendmsg +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4449388 timer_interrupt +EXPORT_SYMBOL vmlinux 0xf489ef9b matroxfb_vgaHWinit +EXPORT_SYMBOL vmlinux 0xf49eb230 phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0xf4b02293 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xf4b0cbcf km_state_notify +EXPORT_SYMBOL vmlinux 0xf4c34f17 input_free_device +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f3ab57 of_platform_device_create +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf50d5a71 revalidate_disk +EXPORT_SYMBOL vmlinux 0xf517fb94 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0xf51c639f interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xf52321e0 atomic64_sub +EXPORT_SYMBOL vmlinux 0xf53625d5 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf56daa49 pagecache_write_end +EXPORT_SYMBOL vmlinux 0xf595c0d7 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xf5a62ecc _memset_io +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5cf5239 sk_reset_timer +EXPORT_SYMBOL vmlinux 0xf5e1558d crash_shutdown_unregister +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf62b2301 __seq_open_private +EXPORT_SYMBOL vmlinux 0xf62c5329 phy_device_free +EXPORT_SYMBOL vmlinux 0xf630be18 input_unregister_handle +EXPORT_SYMBOL vmlinux 0xf6404249 dentry_unhash +EXPORT_SYMBOL vmlinux 0xf65e1f0b xfrm_input +EXPORT_SYMBOL vmlinux 0xf695a5c9 mdiobus_write +EXPORT_SYMBOL vmlinux 0xf6a66537 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xf6ac90bd d_obtain_alias +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6eff219 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xf70384d7 __debugger_sstep +EXPORT_SYMBOL vmlinux 0xf71521ba atomic64_add_return +EXPORT_SYMBOL vmlinux 0xf7389980 napi_gro_flush +EXPORT_SYMBOL vmlinux 0xf7488b7c ide_do_reset +EXPORT_SYMBOL vmlinux 0xf74d98cc commit_creds +EXPORT_SYMBOL vmlinux 0xf751d20f inet_dgram_ops +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf77fbb46 idr_remove_all +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7910d0a single_open +EXPORT_SYMBOL vmlinux 0xf7adaeca blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0xf7f0241f swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf831bd28 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xf848de10 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0xf8545233 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xf85eae85 eth_mac_addr +EXPORT_SYMBOL vmlinux 0xf87f2b5f __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xf8991103 kmem_cache_name +EXPORT_SYMBOL vmlinux 0xf899a2f0 security_path_symlink +EXPORT_SYMBOL vmlinux 0xf8d2fb36 bio_map_kern +EXPORT_SYMBOL vmlinux 0xf95ab4b9 macio_dev_put +EXPORT_SYMBOL vmlinux 0xf96285d0 flush_tlb_page +EXPORT_SYMBOL vmlinux 0xf96c4424 override_creds +EXPORT_SYMBOL vmlinux 0xf986c942 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0xf99be498 dev_mc_sync +EXPORT_SYMBOL vmlinux 0xf9a200c6 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b28bac interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xf9e7d2e3 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0xf9ed0e27 inet_shutdown +EXPORT_SYMBOL vmlinux 0xfa2109be locks_remove_posix +EXPORT_SYMBOL vmlinux 0xfa4229a5 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xfa9dd504 timecompare_transform +EXPORT_SYMBOL vmlinux 0xfaaed677 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xfacf21b1 kernel_connect +EXPORT_SYMBOL vmlinux 0xfadb5750 pmu_unlock +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb171f77 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0xfb17ba8c of_platform_bus_type +EXPORT_SYMBOL vmlinux 0xfb326a5d down +EXPORT_SYMBOL vmlinux 0xfb395bb0 vfs_mknod +EXPORT_SYMBOL vmlinux 0xfb3a2889 vfs_readv +EXPORT_SYMBOL vmlinux 0xfb459802 kmem_cache_create +EXPORT_SYMBOL vmlinux 0xfb4825bb init_buffer +EXPORT_SYMBOL vmlinux 0xfb58121b __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb7dc30d vfs_getattr +EXPORT_SYMBOL vmlinux 0xfb9106bc pcim_iounmap +EXPORT_SYMBOL vmlinux 0xfbadc637 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xfbdd6f03 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc35a322 qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc782545 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd0c5038 adb_unregister +EXPORT_SYMBOL vmlinux 0xfd2e2787 simple_rmdir +EXPORT_SYMBOL vmlinux 0xfd31a79f set_user_nice +EXPORT_SYMBOL vmlinux 0xfd37d05b ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0xfd4b29cf tcp_child_process +EXPORT_SYMBOL vmlinux 0xfd537135 dev_gro_receive +EXPORT_SYMBOL vmlinux 0xfd6772d6 of_match_device +EXPORT_SYMBOL vmlinux 0xfd817c00 pid_task +EXPORT_SYMBOL vmlinux 0xfd8dba4c add_wait_queue +EXPORT_SYMBOL vmlinux 0xfda57153 scsi_prep_return +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfded48ed enable_kernel_fp +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe002b13 of_device_unregister +EXPORT_SYMBOL vmlinux 0xfe12dfc6 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xfe16775f idr_destroy +EXPORT_SYMBOL vmlinux 0xfe345dcf journal_revoke +EXPORT_SYMBOL vmlinux 0xfe393bea bio_split +EXPORT_SYMBOL vmlinux 0xfe3f6688 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0xfe515864 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe8fba55 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0xfec0df54 simple_rename +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee67f95 user_revoke +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xfefc8181 pci_restore_state +EXPORT_SYMBOL vmlinux 0xff09312a of_device_is_compatible +EXPORT_SYMBOL vmlinux 0xff0e2f57 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0xff105dee simple_transaction_release +EXPORT_SYMBOL vmlinux 0xff1765c7 rtas_call +EXPORT_SYMBOL vmlinux 0xff1844d4 tcp_close +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff5ff5dc __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff790a13 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0xff8ac1c1 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffc6439a dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xffcd0d97 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xfff13926 of_get_mac_address +EXPORT_SYMBOL vmlinux 0xfff72659 dput +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x6cb8dff8 crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x9425ed44 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x23cdd58c async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xc9b2253d async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xf00bd69e async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x996832c8 async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xec8eb017 async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0x2e397c0e cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0x68237fc7 cryptd_ablkcipher_child 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agp_remove_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x58de5f27 agp_add_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5 agp_num_entries +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0f96a6a8 tpm_gen_interrupt +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x13e2b806 tpm_show_caps +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1be7ac20 tpm_open +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2da90a8a tpm_store_cancel +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x36131014 tpm_show_pubek +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3e2dd063 tpm_pm_suspend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4043f750 tpm_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x47accf06 tpm_dev_vendor_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4f3c4833 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5135d5f5 tpm_remove_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x69b6d32e tpm_show_active +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7c4b1339 tpm_show_pcrs +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x85cf2b71 tpm_pm_resume +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x98cf08d0 tpm_show_enabled +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9bbf1a70 tpm_show_caps_1_2 +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9d6cc80d tpm_write +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d tpm_pcr_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbf4e6acf tpm_show_owned +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5 tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd7aeb377 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe43ec6be tpm_register_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe5a36b94 tpm_calc_ordinal_duration +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf331bf54 tpm_get_timeouts +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf737571b tpm_continue_selftest +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfeffa2c3 tpm_dev_release +EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc cn_netlink_send +EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e cn_add_callback +EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0b1906a9 edac_pci_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a edac_pci_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x19feb69d edac_mc_handle_ce_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x383955a7 edac_device_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3a875d70 edac_device_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x44b0d1eb edac_device_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4b406457 edac_pci_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4ea760dc edac_mc_add_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5718d7c2 edac_mc_find_csrow_by_page +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5af56973 edac_mc_alloc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5ead3241 edac_pci_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a edac_device_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x712134be edac_device_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7559901f edac_mc_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x78282f12 edac_pci_handle_npe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7a45a3e6 edac_pci_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x87a3c87e edac_pci_create_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x94866e16 edac_mc_handle_ue_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xa2edb671 edac_mc_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xa6ea56f6 edac_pci_reset_delay_period +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcf0fb2ea edac_mc_del_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd121588f edac_device_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdc489eaa edac_mc_free +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe1c58b53 edac_pci_handle_pe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe39d5fcc edac_pci_release_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf0c310cd edac_device_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/hid/hid 0x1e44f46a hid_report_raw_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0x211b5d66 hid_parse_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x3879c101 hid_input_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x45981654 hidraw_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x46b5a78e hid_set_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0x4bccbf78 hidraw_report_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0x4d438e06 hid_output_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x6e6f7da5 hid_check_keys_pressed +EXPORT_SYMBOL_GPL drivers/hid/hid 0x6f9de41e hidinput_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x7334b069 __hid_register_driver +EXPORT_SYMBOL_GPL drivers/hid/hid 0x756e726a hidinput_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x9e139809 hidinput_report_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0xaba0081e hid_destroy_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xb0148380 hidraw_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xbd14948f hid_allocate_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xdf647fd1 hid_add_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xf715e3ff hid_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xf797df02 hidinput_find_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0xfabdba91 hid_unregister_driver +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e usbhid_lookup_quirk +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x1395059a usbhid_submit_report +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xed7efda8 hiddev_hid_event +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xee6e7e91 usbhid_set_leds +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x23a4ab7a lis3_dev +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4c489191 lis3lv02d_poweron +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494 lis3lv02d_joystick_disable +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xc88ea70f lis3lv02d_init_device +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xcb6d3fe9 lis3lv02d_remove_fs +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xd7349c31 lis3lv02d_poweroff +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8 lis3lv02d_joystick_enable +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x4e096a5d hpsb_config_rom_ip1394_add +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xbcad4404 hpsb_config_rom_ip1394_remove +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf hpsb_disable_irm +EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xe3afaec4 input_ff_create_memless +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x012c7256 wm97xx_get_gpio +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x02666f3c wm9712_codec +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1c4ceee2 wm97xx_set_gpio +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1fd87266 wm9705_codec +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x49f8ea46 wm97xx_unregister_mach_ops +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x5a17e0f4 wm97xx_register_mach_ops +EXPORT_SYMBOL_GPL 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drivers/macintosh/windfarm_core 0xa2f19a49 wf_is_overtemp +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xa7236556 wf_get_sensor +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xaf15726f wf_unregister_client +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xb496b61e wf_find_control +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xbd3d7e7f wf_unregister_control +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xc165b9e9 wf_register_control +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xd782332e wf_find_sensor +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xdb7e8499 wf_register_client +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xed82a14f wf_clear_overtemp +EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xef875380 wf_get_control +EXPORT_SYMBOL_GPL drivers/md/dm-mod 0x0f1fd3e4 dm_path_uevent +EXPORT_SYMBOL_GPL drivers/md/dm-mod 0x1fc3dc96 dm_set_device_limits +EXPORT_SYMBOL_GPL drivers/md/dm-mod 0x22642a71 dm_send_uevents +EXPORT_SYMBOL_GPL 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drivers/md/dm-region-hash 0x2447074b dm_rh_dirty_log +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x2583f524 dm_rh_recovery_in_flight +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x26a9ee46 dm_rh_mark_nosync +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5a91e9b0 dm_rh_get_region_size +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5b95f979 dm_rh_start_recovery +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x664034cd dm_rh_recovery_start +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x665c268f dm_rh_flush +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6bfdb9e7 dm_rh_recovery_end +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x932a60b1 dm_rh_inc_pending +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x95611397 dm_rh_delay +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x98d16f37 dm_rh_region_to_sector +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xaa8329c7 dm_rh_update_states +EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb08f5d28 dm_region_hash_destroy +EXPORT_SYMBOL_GPL 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drivers/mfd/wm8400-core 0x25bb2022 wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x6a9a7e25 wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x84b714f7 wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xea049fdd wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x12402d7b cb710_sg_dwiter_write_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x75be4652 cb710_set_irq_handler +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x9484e18e cb710_sg_dwiter_read_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xc86d7e4b cb710_pci_update_config_reg +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0222c494 sdio_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x1395608d sdio_unregister_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2058762a sdio_writesb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x208c4b07 sdio_memcpy_fromio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x302e079a sdio_claim_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x487142fe sdio_release_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x497d2b86 sdio_writew +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x4e4594e0 sdio_readw +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x598e9d11 sdio_readsb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x6ac1db29 sdio_memcpy_toio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x6d759d07 sdio_align_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x81381d9b sdio_disable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x85abb84b sdio_register_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x940cb06a sdio_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x955feb59 sdio_release_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x992a70ed sdio_f0_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xac89c071 sdio_claim_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xbbc73443 sdio_enable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xbebecbbb sdio_set_block_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xdd9b8be6 sdio_f0_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe749fd05 sdio_writel +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfa917619 sdio_readl +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x4f30a5b8 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x74843e79 sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x83c2d6de sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa1c8c8c7 sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xab8162f2 sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xbe8e4fb1 sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x9e06a482 cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xb71c5f21 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xe16c4c74 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x67335a73 cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x01df4979 cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x052c1338 cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xa40dc779 cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xdf21f791 cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x20b2430c DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x1d0b1971 DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xbcfe0661 DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x05ded37c register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x086464d7 get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x125bb5cc mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x19e02984 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2a2103ef default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2c45e1de get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3781652d deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x57ab2856 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x68afd095 get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x801a9358 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x876b7ff6 kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8e004ebc register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb4070fe7 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb449ed11 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcaf2aa78 parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd4be7c77 put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x2d0c8d06 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa90156ae deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xf4a3d67d add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xffe54ba6 register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x4a0b1250 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x6099c9d7 nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x6be60011 nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xb91664b9 nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xcb828801 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x117de8f9 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x882c9c6b onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x34eb144b ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x400b8b25 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x586f2f81 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5ff038bd ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x62f037fa ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x74cecddd ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7e6a2a4d ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x8afc0a33 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa7ae6c8a ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe247c2e7 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xea1bb6ad ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfaa8ff4d ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x435cc104 free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5f08bdf7 close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x75fd2fde can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7e355657 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9bfe3bb8 open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xce011be9 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe4915aed unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe5844032 can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xfb7d22f5 can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x6c0f7371 unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x72cff183 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xaac836b5 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xbd97b4f1 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x027b95ab mlx4_mtt_addr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x03a2fe8e mlx4_CLOSE_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x046cbf1d mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f600645 mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f663af0 mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1107fced mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1216c020 mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x17abda56 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x224f9fad mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x29207ed7 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x29c82852 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2d601a9b mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2debbe50 mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x313a8511 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x371c19b6 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3f21d22b mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x412b3157 mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e95bc31 mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4f4ee02d mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5041db98 mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x59a2281e mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x666b93fc mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x680cb8d1 __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6c76b669 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6c7d219e mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x700f18d6 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x75ae97fc mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7873bfd6 mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7b33eb96 mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x82df0348 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8d2f472e mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8de983a0 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x946b7892 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x964fff6a mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x982d5bee mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9b17df18 mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9b5022a2 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9cf859b7 mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa5a76b40 mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xab52c688 mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbc45b21e mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbeed1b76 mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbf277ac1 mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc04d399a mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd0ea9361 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdb1dfcd2 mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdeafe560 mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe517cced mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe5887c7c mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea7b8fa5 mlx4_fmr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xed12d71d mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xee262996 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf4225d57 mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x79563fe3 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x79afb25a usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x04fc332d rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x5bbc43c5 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8160cc86 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9c61679e rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa3f46584 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xdb528e19 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x00369a22 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x057adf44 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0c18207d usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0eb7a7e2 usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x23202d9d usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x25869f60 usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x364e8705 usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3adc9cc4 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6aed6978 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6d020741 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6f44c7c3 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x96d7cef3 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa97de7a4 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbb984d51 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc4a28b3f usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc7031b61 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd5ae962d usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe90c346e usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xed12e5b8 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf282dc69 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf93776ae usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0675a251 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0b4f747a i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2dc94ae0 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3a975610 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4243bf09 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4496b4b5 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4516397d i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x50c81f88 i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x59141272 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x654cfcee i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7076b2df i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe6ed64cf i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf7bd26f9 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x8f5fad67 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1570eec2 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2de398f3 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2e8a2279 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x345afdb0 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x38f1974f lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3e9e9f80 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x540cb74e lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x75912292 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x96ddd098 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb2d66b58 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb43f5c1a lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdf1c8c6a lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe6163b6a __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xeecf7aa1 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfa0d5e11 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0322c575 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0c9d259b lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x277cca15 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x55af274a lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x749b0f8e lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd1ead11f lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd82428fc lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xfc64fd7f lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x5cc34689 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xa2c5890f if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0cc7dd6f p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0cc84607 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x2289c1e3 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x306b1fd6 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5c170a2e p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc1b0926d p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd2cdf3be p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf2c7162a p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0224f0e2 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x05c805a3 rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0abf62f5 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1b2eff1e rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x25ff96d0 rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2ad3be41 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3545d311 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x42f53a36 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x64dd055a rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6ee45dce rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x75fd2cf6 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8c87c1b1 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9f1fd90a rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xabfc43d9 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbcc58c28 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc1b38368 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc3262ee2 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xde55efdb rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe5259264 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe6b158a8 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xeed6d1a0 rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfc76e075 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x17caec1a rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x1d9fecae rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6b3a64cc rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x73dfcb6f rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x78afece5 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x9d168f73 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb8e724eb rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd2899a88 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xfd3376a2 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0635804b rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0e5cecff rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2d4b163f rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3999eb2f rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3dad29d5 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5d839ef2 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x83c6e3c5 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8892e489 rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8cd84cba rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x96103f93 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x994e0e41 rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9b5944f6 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbc4142bd rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbe8f8981 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xcd32a028 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf0d3a37d rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x11d42dee pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x5330963e pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x58f882ba wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x768e6eab wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x86939010 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa79ac2d7 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb77fd4b7 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xed4abb1f wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x75e478aa wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x40c380d8 scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x7d22511f scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xc1754a07 scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xde019e08 scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xe7f144ad scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x3620687c fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x06423979 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0e9359d3 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0efe3575 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0fa25de4 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x214de985 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x25f4653f iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2927de48 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x319c2ca5 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x32189e03 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x33c7ae3d iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3c6a9adc iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3ca852be iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3cb70694 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4dfbf2cc iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4fbdf538 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x55a4b20e __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x56a2600f iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5a8984fe iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x63104727 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7debca2c iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8cc5e6f0 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x966e7006 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa32771a0 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb07db859 iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5583fd9 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbf0b8e3d iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbfc80e4c iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xce05a66d iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcee644a7 iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd3385e66 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd59b31f9 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd6ccddc1 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdf8ba190 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdfe9ffd0 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe5e48c56 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeae5298a iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xed4dcfb4 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff9509fa iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0660e157 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1ebbc23d iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x30c601b1 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3bded68a iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x447d472c iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x47f93b9f iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5a65422a iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5d8ab348 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x667817a4 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x753efde0 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x82da163e iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x925edbdc iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb599abe2 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc15212e7 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd3a5152f iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe79cf1f7 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1ca1cced sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x379293f4 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3ced7686 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3f6b0a70 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x42a643b5 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4ef4052f sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x55160506 __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x88ffe75a sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8c6366b0 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9805a201 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa22bd2ba sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa337839b sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab7fb8c8 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xacc16149 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xace56442 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb71081de sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc7072160 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc7da9cf1 sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdf1d03da sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xeae44608 sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xeb549da1 sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf61f3fad sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf898a517 sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0c6f2f6c srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x15dde62b srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2d846637 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xbab18705 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe7ff37c9 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xeb37230f srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x1845ca63 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2b7f4376 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2cc2aca5 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x37e36f81 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5099a6a8 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x61b242fb scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x752281fa scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd6072ec2 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xeac6e0b0 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0ae63476 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3c9c496b iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3f1af1d7 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x403a1610 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x454c8f7f iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x51aa9511 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x609a3fee iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7ca0a49f iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x84de37a8 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8bd5b70c iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa5017fb3 iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaed6f11e iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb0ba0c6b iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbf020099 iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc514ed0d iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd0a1a08a iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd3690e7e iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd75802c0 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd8ffb194 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe089e0cc iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe83aba4b iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe93f515e iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x603803de srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x9507f1e1 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xb4a5a464 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd472099a srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd537d2c3 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x0ba179f8 pciserial_remove_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x4fb1ff81 pciserial_init_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x7c2ae0ad pciserial_resume_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xc6653e32 pciserial_suspend_ports +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x40c0d2f7 uart_set_options +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x69872eca uart_console_write +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x3142cb73 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x4a076997 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x609ac60c spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x6f652fe8 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdce191e1 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xf12c7a19 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/uio/uio 0x962f591e uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0xa9ffb14d uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0xf5374445 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x9b428052 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xe2e8ab2a usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x02f5f78f usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x220fe554 usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x5039cdce usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x554089c7 usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x90962b33 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xae06c4fa usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xaef90201 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd98febf8 usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf7b5d8d7 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0ad071da usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x162ac35f usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x19d62fae usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1a59c44b usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1f33485b usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3053268e usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x56af0d8d usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x586b1638 usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x64a775e2 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x67bbb8b3 ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9ae24a52 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd31ea704 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xda395190 usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf5528db1 usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf6fadcc7 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1690d683 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2844c7a0 usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x36713b11 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x395e91f9 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3a6fbeb7 usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x42ac9a69 usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x52d50353 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x620c3814 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6878ede2 usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7445a003 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9867fc12 usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9cbc8514 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb11ef2f2 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb5a31ce4 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb7d35820 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb88e81cb fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbbcf0d6f usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc4aa1ea6 usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xcf6066e1 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd8aaf727 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xea822c12 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf437c7f9 usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf5e2b761 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x11d94a9e wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x20bb776d rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x69762ef9 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9e3ff52f __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xd62d86bc wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x241bea02 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5708f06f wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6973fcd0 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6b4e106f wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x75ff4cc1 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7898c247 wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8973e532 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x95e40c1c wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x96df5748 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xad76fbe3 wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb51ad969 wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc7823483 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc8c3f5b2 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe004ed6a wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe24c0e4c wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe471346c wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x70dbf482 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x7b2e9964 i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xda98a62b i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1885a194 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x268be260 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x943bec09 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x96f9997a uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa768d07f uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb3aa3381 uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd001a229 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xefde0736 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0efd79e7 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x12106a50 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x13587dd9 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x174d2f36 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa4f3529e umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb7ceb84c umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd7c9cca9 __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xe329c4cf umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1170a84a uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1e590736 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1ff5a080 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22534530 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2cea4d83 uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2d6ef9ca uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x422c2e62 uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x44f56dc5 uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x60b37486 uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6e4c7f95 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x76821d87 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x78abaabd uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x79559fe6 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x801f2adc uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x855b3606 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8618e43a uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8fcfca9a uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x976d48cd uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9a2ce2ab uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9e72efb5 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa43c03b7 uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa43cefb8 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa97881dd uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaa4ddc50 uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaaa532a8 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaef6b9c7 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaf0ad277 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb4532f29 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbd1cfaf0 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc38d2ae6 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd4208217 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd541ab4b uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdf866673 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xec668736 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xefda68b8 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf75842c6 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf76dc9db uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/whci 0x82772746 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x01e7d2a5 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x03d7dab0 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0494c040 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x11583470 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x16c3d481 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x254d9281 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2ba13f7f wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2cda4596 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x30c07c28 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3361dd0b wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x33677e99 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3907de9c wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3aee172e wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x40bea655 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5c164d04 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5f65a785 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x65d5e4cd wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x83d044f6 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x83e49a1a wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8675cc63 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x92f655a0 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xaacd5318 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbeb75eac wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbf132dc7 wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2c635ec wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc4cf66c9 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcbe718cb wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcc9cdeb2 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd24c92dd wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd318d706 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd43a3f9b wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfea26780 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1108634e ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x43b26cc9 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x887a4e21 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa11d26a0 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc02b3c89 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf177f407 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfe270eba ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x2527ce72 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x49e107ab fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x0b53d093 sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x887d397e sis_malloc_new +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x1bbd4ea1 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x38f43926 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x6680e3d8 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xa2e9ff01 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xde488113 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x2c53b979 vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x893c7428 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xd55674d1 vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x1cd6b94a w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2ab8a2fe w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x3844411f w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x401fe1dc w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x8e712044 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0x99f605df w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xb750f765 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xd0bd29b7 w1_write_block +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x7806f8dc dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xd0607fec dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xe8347170 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x35ad67bb exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x8a3b19e9 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x04a900ee fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x20728607 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0x2152da8a fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0x2b6ea3d8 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0x3d520171 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0x459710f6 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0x45e7f7da fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x6440284d fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x6fd83723 fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x7ae1f408 fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x895b7bbc fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0xadbd3bac fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xadd2ce62 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xc6900770 fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xdc26f7b0 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xe9a9dbb1 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xf318feec fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xf7a9f577 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7ed6b871 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7f73c992 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x90b8d358 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x90e838af nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xc6cb5ea4 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x0e92e19e nfsacl_decode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xbb61eb04 nfsacl_encode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x263bb404 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4d43504e o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4ff18e63 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x5f86a5dd o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7feffd42 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa44ba89e o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbdbe0f8c o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x281be4a3 dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x5fd698f8 dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7794f962 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9f3960d9 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xbdbbae0f dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 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+EXPORT_SYMBOL_GPL net/dccp/dccp 0x275d4490 dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0x34629f90 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3653499b dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4 dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x47007234 dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0x49596d3c dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x55de8ab7 dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x625bd5ed dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6f2d583a dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x825c8d26 dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x88054e30 dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8f40b1da dccp_sync_mss +EXPORT_SYMBOL_GPL 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+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x2a1d3033 dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x8562fd7f dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xda7bd295 dccp_invalid_packet +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xed234850 dccp_v4_do_rcv +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921 need_ipv4_conntrack +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xd73e3003 nf_nat_seq_adjust_hook +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10 nf_defrag_ipv4_enable +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6 nf_nat_proto_in_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x095c6993 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0a0b2f4d nf_nat_proto_put +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0e20e97e nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x12edf09a nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x2fa9d0a9 nf_nat_proto_unique_tuple +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x706f5464 nf_nat_proto_range_to_nlattr +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134 nf_nat_proto_nlattr_to_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xc63d0e51 nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x642771ef tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x94028153 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xbf737611 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf103e770 tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf845c024 tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1 net_ipv6_ctl_path +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x09597bfd inet6_destroy_sock +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x24ee33fd inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x25766d21 inet6_csk_xmit +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x2df4022e ip6_sk_dst_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x31f05da0 ip6_dst_blackhole +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x4e7f462c ip6_dst_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x765b607f ip6_local_out +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b inet6_hash_frag +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x95cd48e7 inet6_csk_bind_conflict +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xa1ab103c ipv6_dup_options +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xaa53c835 fl6_sock_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb2f3c200 inet6_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb5129b95 ipv6_opt_accepted +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb51977f5 inet6_csk_addr2sockaddr +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xdfe4047a ipv6_find_tlv +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe6b51912 inet6_csk_search_req +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x62a3c1fa ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x92355278 ieee80211_iterate_active_interfaces +EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a net_vs_ctl_path +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0261eef6 __nf_ct_refresh_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd nf_ct_port_nla_policy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04ccc250 print_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x13c82611 __nf_conntrack_helper_find_byname +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x19b92cf3 nf_ct_extend_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1d2329b5 nf_conntrack_l4proto_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d6f1748 nf_conntrack_in +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415 nf_ct_port_nlattr_to_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3ff9d474 nf_ct_expect_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x41542532 nf_ct_expect_init +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x42560bc2 nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9 nf_ct_alloc_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4c8b588c nf_conntrack_free +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4fc1d2b4 nf_conntrack_l4proto_udp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x50141e3e nf_ct_nat_offset +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x57c1b8a1 nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33 nf_conntrack_set_hashsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x596d0b30 nf_ct_deliver_cached_events +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59c71efd nf_conntrack_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59e97037 nf_ct_iterate_cleanup +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5d1a2ce7 __nf_ct_l4proto_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c nf_ct_port_nlattr_tuple_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x629375a7 nf_ct_l3proto_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x64bbe0c4 nf_ct_get_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x66ebc818 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net/netfilter/nf_conntrack 0x9425105f nf_conntrack_l3proto_generic +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x95d7d5ce nf_conntrack_l3proto_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x98f10877 nf_ct_expect_related_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1 nf_ct_free_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9bcc5879 nf_ct_expect_register_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9cbf4627 nf_conntrack_l4proto_tcp4 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9f17f115 nf_ct_helper_ext_add +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa055b591 nf_conntrack_helper_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa22fa007 nf_conntrack_untracked +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa90da9f4 nf_conntrack_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaba36531 nf_ct_port_tuple_to_nlattr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xac64a0a6 nf_expect_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xae85d930 nf_conntrack_helper_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xae8924a5 nf_conntrack_l4proto_tcp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb2deb61a nf_ct_l3protos +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4d4a691 nf_ct_extend_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e nf_ct_l3proto_module_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbb46baf5 __nf_conntrack_confirm +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbec10a66 nf_ct_invert_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc08a5572 nf_ct_insert_dying_list +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d nf_ct_expect_hsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc54affa2 nf_conntrack_unregister_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc5d6c45a nf_ct_delete_from_lists +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd3c5a529 __nf_conntrack_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd41cdf79 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nf_conntrack_l3proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x9282012d nf_nat_amanda_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0xb673cffc nf_nat_ftp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x17a85f4d set_ras_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x23a32867 get_h225_addr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x317b0b9e nat_callforwarding_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x31e92353 set_sig_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3c1618d6 nat_q931_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x5f2efd7e nat_t120_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x68424729 nat_h245_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xbe326e07 set_h245_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd726ea95 nat_rtp_rtcp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe10cec9e set_h225_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xeca9e0ee nf_nat_irc_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x5fcc6cc9 nf_nat_pptp_hook_exp_gre +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x7e1ad0b5 nf_nat_pptp_hook_expectfn +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xf95eb6bc nf_nat_pptp_hook_outbound +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xfc9013f0 nf_nat_pptp_hook_inbound +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x4ce07afa nf_ct_gre_keymap_add +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x725ebe5e nf_ct_gre_keymap_destroy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x08e9b060 ct_sip_parse_address_param +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x2c34fd69 ct_sip_get_header +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x437bcc2b ct_sip_parse_header_uri +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xa189e84a nf_nat_sip_expect_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 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+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a nfnl_unlock +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xb0e5a140 nfnetlink_subsys_unregister +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xceb633f4 nfnetlink_send +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329 nfnetlink_has_listeners +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xecb5e77e nfnetlink_subsys_register +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd nfnetlink_set_err +EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x99924a4a nfulnl_log_packet +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0a167c05 xt_unregister_table +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0ce8a02c per_cpu__xt_info_locks +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1fb4d845 xt_request_find_target +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2f408071 xt_find_table_lock +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63 xt_find_revision +EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x520eb2de xt_table_unlock +EXPORT_SYMBOL_GPL net/netfilter/x_tables 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wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0xe1fbdc57 wimax_msg +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2ccc7836 cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3017903a cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3e39370c cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x43012181 cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x44bd522d cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4a163868 cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6a153ac6 cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x71176329 cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7546645c cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x794f537b cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7d82d1eb cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8802dd1f cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8fbeaeb3 cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9c818201 cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xab67030b cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc4154996 cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcc493f5b cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xce7a765f cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe3ae6cd3 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe792c983 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xefcaf9d1 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf03d8b91 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf32f8fa2 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf61bd43f cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf622d903 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x1e8cbe7f ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x2c10acc1 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x3b3d4793 ipcomp_init_state +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x442aebc5 ipcomp_destroy +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x193b31c2 aoa_codec_register +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x21c82da0 aoa_fabric_unregister +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x54c5d713 ftr_gpio_methods +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x867ddc99 aoa_codec_unregister +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x9d72ea8d aoa_fabric_unlink_codec +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xadbc62d0 aoa_get_card +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xc9c613fb pmf_gpio_methods +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xd4b59ee3 aoa_snd_ctl_add +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xeaac9e16 aoa_fabric_register +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xef943985 aoa_snd_device_new +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x5385c9a6 soundbus_add_one +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x6f52a222 soundbus_remove_one +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x8c8ebf0f soundbus_dev_put +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xc34d7763 soundbus_dev_get +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xd464fe22 soundbus_register_driver +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xeabb1fbe soundbus_unregister_driver +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x00d92d93 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0162cfc8 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01ee76f4 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x022ce91b snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07c27fde snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0c30188f snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11639713 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1724a73a snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x195ff32e snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2256eef3 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2258d22b snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2cb7d711 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x395db476 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39850a7d snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x405b7003 snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41837fe2 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42244fa4 snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4275d9fb snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x49cd6fd2 snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4d67033a snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4f2e0ffe snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4f9c249c snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x57e6cb74 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x585845a9 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5965fed5 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x59c4f439 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5bdee3b8 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5cb7bc2c snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5e0c526a snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5e534c25 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x684ba92d snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6e4d1d39 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6e590d3a snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6f82e076 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7273b9bd snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7846ab84 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d628c18 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7fa199f9 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x81fec99a snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x833989e9 snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x88507865 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8897e8d4 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8d26589c snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x92215e2f snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9604d1c6 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b5db3b0 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa0fed4b8 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa32a4bff snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa935525e snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae6f73f8 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb40f70db snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb927a388 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbae78ab2 snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbc22f0d1 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbff446f6 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc13710c7 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc58ff946 snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce3ebde4 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd136481c snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd9b6f153 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe1046545 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe3a0ae35 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe61fc49d snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe677443a snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6b2446c snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7f377eb snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8fd6b18 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeab1009f snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeb5e342c snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf447103e snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfacfcfae query_amp_caps +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x08eb0bc1 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x144c4f80 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x4c73b1ed soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xdc1eb7c9 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xdf38cd35 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x1e4c73ad cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x47ff5c5d soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x0e5a15ba soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x17acf4cf pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x05ef1071 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xbe4bdc56 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x5c047597 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xdd8b1965 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x1615aad7 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xdd347c7c aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x018fec46 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x2a577572 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x66222b12 aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8530ca7f aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xaed4cbca aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd03562e9 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xdf0ae7a4 aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xaa629879 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xe2dea733 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x6bdafe7c soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x509ed2e4 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x5a60c215 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x80d92994 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xc15909a4 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xe0ad537d wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x1bc5d3c6 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x99a42f1a wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xb625ba88 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xb66c4af6 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x60e60f47 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xb9bd7179 soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x29bb2505 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xd6fab62c soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x06fa6752 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xa8c37f79 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x004f99e6 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x1b6c2aa1 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x30417962 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xe8bc24ed wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x47fda473 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xfd789f79 soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xc169d6dd wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xd655ccba soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xb3b28060 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xfa7137a5 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x242d9149 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xf9f5e3cb soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x49064958 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xe12cb8bd soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x3bb244c9 soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x98416879 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd265e1a0 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xf2a9a4f6 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xaa1899ba soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xb77a36d9 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x052cc9fc snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0693eecf snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0a73c6d9 snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x14040ad6 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1589ace7 snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x158ac32a snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17ce2360 snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1ac205ad snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1f43eeff snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2260d209 snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2b955717 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2c3050e7 snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32487c91 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32d4ee4c snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x338cc41b snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x343aee32 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x39e61bb9 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3df7360f dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4729f4d5 snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ba22ebc snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4cd7a835 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d8b135d snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4de7c64b snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53345f5a snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5fc2f525 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x625059e7 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62982a8c snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65621256 snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6cec4839 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6de57335 snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x707dd8b9 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x70fc1842 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x724780aa snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7277d86d snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x76704368 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7ddff42b snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7dfc7a03 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x853ecdd9 snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e5ecdbe snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x949bde83 snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x953319e2 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9774ea63 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa052cf23 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa2bd060e snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa353b977 snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa74b49b snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xabc6581a snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xac2f7f96 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae9a18a7 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb35e6d4c snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 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tasklet_hrtimer_init +EXPORT_SYMBOL_GPL vmlinux 0xd6d787c5 check_media_bay_by_base +EXPORT_SYMBOL_GPL vmlinux 0xd702fe59 ata_sg_init +EXPORT_SYMBOL_GPL vmlinux 0xd7261368 register_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd7b75693 ata_sas_queuecmd +EXPORT_SYMBOL_GPL vmlinux 0xd7c7d987 __mnt_is_readonly +EXPORT_SYMBOL_GPL vmlinux 0xd7d48d87 ata_sff_qc_issue +EXPORT_SYMBOL_GPL vmlinux 0xd843e3f6 ata_eh_thaw_port +EXPORT_SYMBOL_GPL vmlinux 0xd861788b ring_buffer_alloc_read_page +EXPORT_SYMBOL_GPL vmlinux 0xd877c7e1 aead_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0xd889807d usb_hcd_pci_shutdown +EXPORT_SYMBOL_GPL vmlinux 0xd942959f pci_unblock_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xd95b0867 ide_no_data_taskfile +EXPORT_SYMBOL_GPL vmlinux 0xd9648226 sysfs_update_group +EXPORT_SYMBOL_GPL vmlinux 0xd9789e2b usb_hcd_pci_probe +EXPORT_SYMBOL_GPL vmlinux 0xd9b1fdae led_trigger_register +EXPORT_SYMBOL_GPL vmlinux 0xd9d2116d crypto_grab_skcipher +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda202b31 ring_buffer_empty_cpu +EXPORT_SYMBOL_GPL vmlinux 0xdaf18463 anon_transport_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdafea1e0 transport_remove_device +EXPORT_SYMBOL_GPL vmlinux 0xdb37803b macvlan_handle_frame_hook +EXPORT_SYMBOL_GPL vmlinux 0xdb9e59cf attribute_container_register +EXPORT_SYMBOL_GPL vmlinux 0xdba84d01 dev_attr_em_message +EXPORT_SYMBOL_GPL vmlinux 0xdbff26cc shmem_file_setup +EXPORT_SYMBOL_GPL vmlinux 0xdcd7ea44 crypto_ahash_type +EXPORT_SYMBOL_GPL vmlinux 0xdd18a779 class_destroy +EXPORT_SYMBOL_GPL vmlinux 0xdd49639e usb_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xdd8b2333 spi_alloc_device +EXPORT_SYMBOL_GPL vmlinux 0xdde2869a ata_cable_40wire +EXPORT_SYMBOL_GPL vmlinux 0xde0925e5 mm_kobj +EXPORT_SYMBOL_GPL vmlinux 0xde27f012 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+EXPORT_SYMBOL_GPL vmlinux 0xe07054b5 tcp_cong_avoid_ai +EXPORT_SYMBOL_GPL vmlinux 0xe0953cf5 sysfs_create_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xe0c20ea8 crypto_ahash_import +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe12aa3e9 device_add +EXPORT_SYMBOL_GPL vmlinux 0xe1393fbc ata_cable_sata +EXPORT_SYMBOL_GPL vmlinux 0xe1abe0d5 spi_new_device +EXPORT_SYMBOL_GPL vmlinux 0xe1d76294 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0xe1d850db crypto_alloc_base +EXPORT_SYMBOL_GPL vmlinux 0xe1f28518 vfs_setxattr +EXPORT_SYMBOL_GPL vmlinux 0xe244f5be fb_ddc_read +EXPORT_SYMBOL_GPL vmlinux 0xe24bac27 ata_sff_dev_classify +EXPORT_SYMBOL_GPL vmlinux 0xe2743e0c regulator_set_current_limit +EXPORT_SYMBOL_GPL vmlinux 0xe27c5de3 device_create +EXPORT_SYMBOL_GPL vmlinux 0xe298c2ad ring_buffer_swap_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe29aa6ba ata_host_init +EXPORT_SYMBOL_GPL vmlinux 0xe2cbd62d class_dev_iter_next +EXPORT_SYMBOL_GPL vmlinux 0xe2d7ae9e ide_pci_check_simplex +EXPORT_SYMBOL_GPL vmlinux 0xe2e88ec4 gpiochip_remove +EXPORT_SYMBOL_GPL vmlinux 0xe35ce15f led_trigger_unregister +EXPORT_SYMBOL_GPL vmlinux 0xe3792cd0 pmac_i2c_get_controller +EXPORT_SYMBOL_GPL vmlinux 0xe37ca780 pci_enable_pcie_error_reporting +EXPORT_SYMBOL_GPL vmlinux 0xe39a95d9 skcipher_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0xe3dfe938 ata_qc_complete +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4e3f37f sata_pmp_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe4f37e70 platform_device_add_data +EXPORT_SYMBOL_GPL vmlinux 0xe5234724 inet_hash +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe536e903 platform_device_alloc +EXPORT_SYMBOL_GPL vmlinux 0xe5e3e3f7 irq_find_host +EXPORT_SYMBOL_GPL vmlinux 0xe60af115 rt_mutex_unlock +EXPORT_SYMBOL_GPL vmlinux 0xe60cd0ec usb_autopm_get_interface +EXPORT_SYMBOL_GPL vmlinux 0xe6360256 save_stack_trace_tsk +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe6738f69 debugfs_create_u64 +EXPORT_SYMBOL_GPL vmlinux 0xe67604b7 hrtimer_start +EXPORT_SYMBOL_GPL vmlinux 0xe67ebfc7 ide_read_bcount_and_ireason +EXPORT_SYMBOL_GPL vmlinux 0xe6ad51b3 rtnl_kill_links +EXPORT_SYMBOL_GPL vmlinux 0xe6e0a79b pmac_low_i2c_lock +EXPORT_SYMBOL_GPL vmlinux 0xe721d3b2 simple_attr_release +EXPORT_SYMBOL_GPL vmlinux 0xe72942f1 devres_find +EXPORT_SYMBOL_GPL vmlinux 0xe7554745 inotify_init +EXPORT_SYMBOL_GPL vmlinux 0xe77ed748 ide_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xe7be0966 __inet_twsk_hashdance +EXPORT_SYMBOL_GPL vmlinux 0xe8259227 ring_buffer_entries +EXPORT_SYMBOL_GPL vmlinux 0xe82b3042 scsi_queue_work +EXPORT_SYMBOL_GPL vmlinux 0xe84f89ab tty_buffer_request_room +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe8774f5d scsi_nl_add_driver +EXPORT_SYMBOL_GPL vmlinux 0xe8789a12 eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xe8b307da do_add_mount +EXPORT_SYMBOL_GPL vmlinux 0xe8efb658 usb_set_interface +EXPORT_SYMBOL_GPL vmlinux 0xe8f973b2 scsi_mode_select +EXPORT_SYMBOL_GPL vmlinux 0xe92556d0 ata_host_activate +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe94ff87b sched_setscheduler +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea1750f2 crypto_alg_mod_lookup +EXPORT_SYMBOL_GPL vmlinux 0xea1acbab sata_link_hardreset +EXPORT_SYMBOL_GPL vmlinux 0xea23f11e tcp_reno_cong_avoid +EXPORT_SYMBOL_GPL vmlinux 0xea418e0f atapi_cmd_type +EXPORT_SYMBOL_GPL vmlinux 0xea83a262 rtc_set_time +EXPORT_SYMBOL_GPL vmlinux 0xea989ca5 register_posix_clock +EXPORT_SYMBOL_GPL vmlinux 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL vmlinux 0xeaef9940 register_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0xeb3a9a43 ata_bmdma_start +EXPORT_SYMBOL_GPL vmlinux 0xeb8766ec tracepoint_iter_next +EXPORT_SYMBOL_GPL vmlinux 0xeba22b67 ide_setting_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xebe561d6 ata_host_resume +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec2888d5 usb_clear_halt +EXPORT_SYMBOL_GPL vmlinux 0xec56c7e2 crypto_rng_type +EXPORT_SYMBOL_GPL vmlinux 0xec933985 usb_autopm_put_interface_async +EXPORT_SYMBOL_GPL vmlinux 0xecea75d0 enable_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xed1357a4 usb_sg_wait +EXPORT_SYMBOL_GPL vmlinux 0xed2520b0 relay_subbufs_consumed +EXPORT_SYMBOL_GPL vmlinux 0xed884763 cpufreq_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xedc2994d ktime_get_real +EXPORT_SYMBOL_GPL vmlinux 0xedcfba71 disk_map_sector_rcu +EXPORT_SYMBOL_GPL vmlinux 0xedd220bb crypto_alloc_instance +EXPORT_SYMBOL_GPL vmlinux 0xedfc1d1e fuse_do_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xee0ac73d regulator_get +EXPORT_SYMBOL_GPL vmlinux 0xee3c5cff ata_pci_device_do_resume +EXPORT_SYMBOL_GPL vmlinux 0xee42b066 device_release_driver +EXPORT_SYMBOL_GPL vmlinux 0xeeb4498c tty_prepare_flip_string +EXPORT_SYMBOL_GPL vmlinux 0xeebe4100 queue_work +EXPORT_SYMBOL_GPL vmlinux 0xef1764dd firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0xef220c24 swiotlb_sync_single_range_for_device +EXPORT_SYMBOL_GPL vmlinux 0xef3cf5d3 ata_pci_bmdma_init +EXPORT_SYMBOL_GPL vmlinux 0xef4e963e __atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xef51de2a vfs_cancel_lock +EXPORT_SYMBOL_GPL vmlinux 0xef659a03 ide_dev_select +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xef82fdba srcu_init_notifier_head +EXPORT_SYMBOL_GPL vmlinux 0xefa6e1a2 blkdev_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefe21106 snmp_mib_init +EXPORT_SYMBOL_GPL vmlinux 0xeff2608c fuse_request_alloc +EXPORT_SYMBOL_GPL vmlinux 0xeffb550f device_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xf00ee8f5 tty_init_termios +EXPORT_SYMBOL_GPL vmlinux 0xf03fa84d usb_put_intf +EXPORT_SYMBOL_GPL vmlinux 0xf09a0d9b usb_init_urb +EXPORT_SYMBOL_GPL vmlinux 0xf09c5fd9 class_dev_iter_init +EXPORT_SYMBOL_GPL vmlinux 0xf0a95196 simple_attr_read +EXPORT_SYMBOL_GPL vmlinux 0xf0c0d6fa debugfs_rename +EXPORT_SYMBOL_GPL vmlinux 0xf0e9bb10 relay_reset +EXPORT_SYMBOL_GPL vmlinux 0xf105d00d ide_in_drive_list +EXPORT_SYMBOL_GPL vmlinux 0xf12bb8dd blk_update_request +EXPORT_SYMBOL_GPL vmlinux 0xf1463412 execute_in_process_context +EXPORT_SYMBOL_GPL vmlinux 0xf150d3f9 blkcipher_walk_virt +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf19fc18a generic_drop_inode +EXPORT_SYMBOL_GPL vmlinux 0xf1a8a22c ata_dev_next +EXPORT_SYMBOL_GPL vmlinux 0xf1c7463a regulator_set_voltage +EXPORT_SYMBOL_GPL vmlinux 0xf1d7fbef usb_hcd_unlink_urb_from_ep +EXPORT_SYMBOL_GPL vmlinux 0xf25ebad6 regulator_enable +EXPORT_SYMBOL_GPL vmlinux 0xf26e70c0 sata_scr_write +EXPORT_SYMBOL_GPL vmlinux 0xf2744e06 blk_abort_request +EXPORT_SYMBOL_GPL vmlinux 0xf2a0eed3 usb_driver_claim_interface +EXPORT_SYMBOL_GPL vmlinux 0xf2a5364f blk_rq_check_limits +EXPORT_SYMBOL_GPL vmlinux 0xf2ef49a8 input_class +EXPORT_SYMBOL_GPL vmlinux 0xf326e775 single_release_net +EXPORT_SYMBOL_GPL vmlinux 0xf33ccd90 ring_buffer_read +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf36f943b pci_disable_rom +EXPORT_SYMBOL_GPL vmlinux 0xf3a2c3ac ide_intr +EXPORT_SYMBOL_GPL vmlinux 0xf41a2e77 pmf_call_one +EXPORT_SYMBOL_GPL vmlinux 0xf431272d fib_rules_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5c725f1 usb_set_device_state +EXPORT_SYMBOL_GPL vmlinux 0xf60d362c sysfs_create_link +EXPORT_SYMBOL_GPL vmlinux 0xf624a6d6 rt_mutex_timed_lock +EXPORT_SYMBOL_GPL vmlinux 0xf65b01ea ring_buffer_iter_empty +EXPORT_SYMBOL_GPL vmlinux 0xf69030bf pmf_find_function +EXPORT_SYMBOL_GPL vmlinux 0xf6baf792 scatterwalk_map +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf7d01029 ide_device_get +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf86c7926 crypto_nivaead_type +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf98f09b2 crypto_alg_lookup +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xf9ecb661 crypto_tfm_in_queue +EXPORT_SYMBOL_GPL vmlinux 0xf9ed5cb1 inet6_lookup +EXPORT_SYMBOL_GPL vmlinux 0xf9f12466 ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0xf9ffaf79 scsi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xfa073982 crypto_alloc_shash +EXPORT_SYMBOL_GPL vmlinux 0xfa3306cb devm_kfree +EXPORT_SYMBOL_GPL vmlinux 0xfa947146 get_driver +EXPORT_SYMBOL_GPL vmlinux 0xfaf0ddd8 pci_renumber_slot +EXPORT_SYMBOL_GPL vmlinux 0xfafa3fd1 i2c_new_device +EXPORT_SYMBOL_GPL vmlinux 0xfb5bb903 usb_sg_init +EXPORT_SYMBOL_GPL vmlinux 0xfb62a2a2 da903x_reads +EXPORT_SYMBOL_GPL vmlinux 0xfb7188df usb_get_descriptor +EXPORT_SYMBOL_GPL vmlinux 0xfb7cdb98 led_classdev_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc7072b3 spi_sync +EXPORT_SYMBOL_GPL vmlinux 0xfc87b20d sata_scr_valid +EXPORT_SYMBOL_GPL vmlinux 0xfc8b93c5 ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfd2ddcbf __inet_hash_nolisten +EXPORT_SYMBOL_GPL vmlinux 0xfd38234c scatterwalk_copychunks +EXPORT_SYMBOL_GPL vmlinux 0xfdb66b59 part_round_stats +EXPORT_SYMBOL_GPL vmlinux 0xfdc3bb55 bd_claim_by_disk +EXPORT_SYMBOL_GPL vmlinux 0xfdc51eaa sysdev_create_file +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfe2f0d41 usb_queue_reset_device +EXPORT_SYMBOL_GPL vmlinux 0xfe74c1d4 ide_do_test_unit_ready +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfeae8d8b proc_net_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xff0456c3 ata_link_abort +EXPORT_SYMBOL_GPL vmlinux 0xff394b37 __fsnotify_parent +EXPORT_SYMBOL_GPL vmlinux 0xff3c7944 security_inode_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xff66a9dd ata_sff_softreset +EXPORT_SYMBOL_GPL vmlinux 0xff8aac3b regulator_count_voltages +EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb __wake_up_sync +EXPORT_SYMBOL_GPL vmlinux 0xffe0b40c platform_driver_register +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/powerpc/powerpc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/powerpc/powerpc64-smp @@ -0,0 +1,9406 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/atm/suni 0xfe86b5c6 suni_init +EXPORT_SYMBOL drivers/block/loop 0x83d7e36a loop_register_transfer +EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL drivers/block/paride/paride 0x04e762b6 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x26fa4e8b pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x526e89f5 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x59360ce8 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x6a6bea3e pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x97632de4 paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0x985eb7c8 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0xc3d08524 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xd1ec22cf pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xe6f53ea2 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xea9531b5 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0xf54e3740 pi_read_block +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0526fced agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x1b25fb66 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2a5d3bec agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x32c3103f agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x354a382d agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x37fce645 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3d1aff73 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x42690f0e agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4657ecd3 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x499dabc8 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x49fcce6b agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x50d060d2 agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x52a256a0 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x556f4ef9 agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x58981982 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x5b303b66 agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x5bd3608f agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x618a5793 get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x6ad357d6 agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x789358a5 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7bfbe0ad agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7c5b1d2f agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7f501b6c agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0x91573529 agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x93b88f1b agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb3914cef agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb7a14192 agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc26dd773 agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc4a99c0a agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe3a52b3e agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe4b9d141 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xfadf3510 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xfd5e528d agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/generic_serial 0x0599657a gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x0f85be37 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x16eb692e gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x4ef9e034 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x53b2e042 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x5c5e5a67 gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x5db7939b gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x5f7b8eb2 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x6f643655 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x7cb6da9b gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x8289cbf5 gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x86604b20 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xc1933936 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0xc530a13a gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xd62dd1f0 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0xf4715acc gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1b14fe18 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26dab61c ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x37c62d4c ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3a02d6ed ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4ddda79a ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x590ff71e ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6c49a6b1 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8b37b526 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa33ab38a ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa43da630 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa6031897 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa70131d0 ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbba22647 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbcc1e3aa ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc5391919 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc6a04944 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xce53e7d9 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd49f37d3 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd4a8fbd4 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdcbba151 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe24bc993 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe8a1f545 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xee89ceec ipmi_set_gets_events +EXPORT_SYMBOL drivers/edac/edac_core 0xb8abf5c6 edac_mc_find +EXPORT_SYMBOL drivers/edac/edac_core 0xc9e7463f edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0xd612d6fe edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x004fe816 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x02b1ed1a drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0602013d drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x075348bb drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0908f8d7 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0be5ad72 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c3077ce drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x125f5dbb drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x144c78e1 drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x163f9f47 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x17c9e3b9 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1c8fb78c drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1daea939 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20754624 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20797892 drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20c7acfb drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x23b4d96c drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0x240747cc drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x258736d4 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2614d218 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a1fc9cc drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a2dd372 drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2d1d9676 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2d500d73 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2e7c3360 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2f19235c drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x34f1fc3c drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x359b1209 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3b7d31e5 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3b9831a3 drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3dd4932e drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x414bd139 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x44a66eae drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49b9f674 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a9956c9 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d5eefb4 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4df72c1f drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5177f0c8 drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x52569fd1 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x52805d8c drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x539fc238 drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5508110f drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5726e610 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58cd3653 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58ce5b95 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a909b9b drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f27b8fa drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x610c9b4d drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x686d0d93 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6887e8c9 drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6db9edc9 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x767be8c9 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x77097e77 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79745be4 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7974f331 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79e36f94 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a8e4b53 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7aea3307 drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c146ee6 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7caf6c0a drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7cd93cf3 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7eaf1bd8 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8202da91 drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x831e160d drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x85c64d3f drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x869a6fca drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8bc05561 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d3edc36 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x962864db drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x97cf38ea drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x97d10a0d drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x983d468a drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x989855e9 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x98d22fbb drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a21e3e6 drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b22d3c9 drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b7f0a36 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9cab71f9 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dd4c9bf drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa16d34eb drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa219e27d drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2f2defd drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9fbbca8 drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0xad06449c drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaed155e3 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb05744cb drm_compat_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb137eee1 drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb32531ea drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb3e51a63 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb5b7dc8d drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb63a6edc drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb67205b1 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb78c5b8e drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8d6d193 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbade694d drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe0bd77b drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe2703a1 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe6652c5 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbed8af05 drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbef1d98d drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc200eb2c drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc219cac1 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc22632c0 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2e6ee7b drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc62115ee drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc7e277af drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcab6f03b drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcc57a422 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd503ada drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf26fe7 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfdff29b drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd32e7bcb drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3f69976 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd720f5db drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdabd6ffb drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xde97681d drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe0146ac2 drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe758296c drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8915f74 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb913396 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xec5ba735 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf24849e9 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf24abc79 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2b6f37d drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfcfcbb2e drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfed0656b drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff016f76 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x392a90d7 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc6e7a4c5 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x429c44da amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0301c148 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x05932b5e hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0bcd5586 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0cb0a192 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x10206ca8 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x14e6ef1e hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548 dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x16b0cd78 hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x191679e8 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a47c037 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x25eafe73 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2af8cab6 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2cb3adc3 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2fb0e2a4 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3452f878 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x34c1afba hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x39de97d6 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x401bc490 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40a886ed hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x45ae6bec hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4e0ab8c4 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x511ac8e7 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51976fdc hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54f31030 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x570758ca hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x587bd3e8 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ecb248d hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f9784a1 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x60bb3d99 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62aa010e hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672473bf hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x699b65a5 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c00005d hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c71b802 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6e04bc6a hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x70075592 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x739f11af hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7cc690d0 hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7e8a56cb hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x800d7b18 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8532f4c2 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8a60a1d7 hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8b691ba4 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa19cef12 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa667c766 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb8383b48 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xba66f0a7 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd6f6f92 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc20bea10 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc5825f7f hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc66083bf hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc92ecf7e hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcaa927fb hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcafd0a7e hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9fe35cc hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf329cdf hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe698cd9e hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe9e7c015 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea51b85a hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xee8f9839 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf48ff8f7 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfa4d9044 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfce40a4e hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfe95b2b5 hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2569da0c ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2b9890ff ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6c7ce5b0 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x30493041 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x3bfff55e rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6e7a5651 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x77556bfe rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xa5e50b1c rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xee867448 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0de4710a ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1f5e2caf ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x22765c4c ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x23d78bb2 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2d7111f5 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2f0b5d11 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x31efb3e9 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6e51723e ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x84b2167c ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9290113f ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9533ac73 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x970e53a5 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa43da185 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xaf3373fe ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbb31ed26 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfc84d3f6 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfec10724 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x00667a91 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0456748b ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06157d55 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x064d2f1c ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07b1c0fb ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0a71bbc8 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ed432dd ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x11ce43d3 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1439c526 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x193b8c12 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1fa48d7c ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x219e7b45 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26ab2214 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x285387a3 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x285ec28b ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2c408155 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2cd950c2 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x35b67c5c ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x40e3f44d ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x45f3890b ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4b3dc76f ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4cc59219 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4cfa1c08 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4fa43ca2 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56ad119a ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x593ee040 ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x594c9c19 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5b768ccb ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x601417c4 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6a5a11ea ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6a7eacec ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b13544d ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c6daef6 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72961cfe ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74c1a428 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x764ad65d ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x76a7cd7d ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x778600a6 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7b8bc069 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x88c7470d ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x903bbed3 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9b9b985f ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9da6348b ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9fa8596a ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa05133b0 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa1c7f379 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa3023266 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa450b0af ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa719543e ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa7f7e9ba ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaad341c6 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaedc6bfc ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb06fe84a ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb2a10516 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb55fc712 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb671c5fe ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc72aaba6 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcbc4f2a2 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd91e78a ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd3c73e48 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd5048dab ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe0251894 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe1926c82 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeb2018af ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed627c6e ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xefd3d8ea ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0fbdf7e1 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x24fabb64 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x259c96ea ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2febdce1 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x32b1f713 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8c4e67e7 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb5cf258f ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xba473514 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc01c8510 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd429841c ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe35a7da9 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf8c79da7 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x0954bff2 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x466fba17 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6043324f ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7dbb28d7 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8bf56429 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xcbc95b56 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xdb97e95b ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xdbd1a515 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf6a5def7 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x08b02d06 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x4dc92de4 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x61aa07c6 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa87732c6 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xb6cd52c9 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xb6fb9faf iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xb918c513 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xead15668 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x05029fd4 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x05f740fb rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1369623b rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1e894b1d rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x20bb6c6d rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x25f69f6c rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x30284ad2 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x32a742da rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3df2d187 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x496839d3 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x67a14b75 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x80746ab6 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa58e5075 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb8d09533 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbf80504f rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xebd7b9ad rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xed83fd0b rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfa83a2e4 rdma_bind_addr +EXPORT_SYMBOL drivers/input/gameport/gameport 0x13c07b78 gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x214f0f5c gameport_start_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x35c75a34 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x5ac063a7 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x68558bc7 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x8300f47d gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x91d27df5 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0xa52f49d5 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0xfd5b0f74 gameport_close +EXPORT_SYMBOL drivers/input/input-polldev 0x39ecbf70 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x84162a50 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x950537db input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xe743902d input_unregister_polled_device +EXPORT_SYMBOL drivers/input/serio/i8042 0x4fdee897 i8042_command +EXPORT_SYMBOL drivers/md/dm-log 0x60435fef dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-log 0xaa8ed916 dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-log 0xde977cc2 dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-log 0xedb02801 dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-mod 0x018e1a79 dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0x08058c18 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0x0f0c9b1f dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0x140c4e08 dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x4d2064be dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x5949fcdb dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0x6384b474 dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x79483025 dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x86ff58e6 dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0x97b63f84 dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-mod 0x9c6f18f9 dm_register_target +EXPORT_SYMBOL drivers/md/dm-mod 0xa1a1bbbc dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0xa4cfe017 dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-mod 0xc1cea460 dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xcd38138e dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0xcea44b08 dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0xeb861974 dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0xf3ccbf67 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0xf461e366 dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-snapshot 0x53867303 dm_exception_store_create +EXPORT_SYMBOL drivers/md/dm-snapshot 0x5e63f621 dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/dm-snapshot 0xd7e47fc7 dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0xfabd6e49 dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/md-mod 0x033fc8f1 unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x0705132a bitmap_endwrite +EXPORT_SYMBOL drivers/md/md-mod 0x1794709d bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0x19bd5037 md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x31339dcf md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0x3789fc27 bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x3e37062f md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x40c93bac md_wakeup_thread +EXPORT_SYMBOL drivers/md/md-mod 0x48a79bfe bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x49dfa310 md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0x59e0136e md_write_start +EXPORT_SYMBOL drivers/md/md-mod 0x74ba4c84 register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x7ebf9363 bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0x94bc837b md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xac8be233 bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0xb4685ea7 md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0xc5e07e8d md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0xc63ea0e4 md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0xd52b2793 bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0xd820d12f md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0xe628e53a md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0xed7cf44b md_error +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xa3a704d9 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x7f368eda mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x64bee33a mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xea5ceecc mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xa7ac1af8 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xa37d0425 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x11a035eb xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x23b413fe xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x08cddf1f flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0946f794 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x20b884df flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x21efe90d flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x243ffef8 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x33d69b12 flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x41d259fc flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4cb0e6db flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x524566d6 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5e39957d flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x67e031c6 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6e46846e flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6fcc5d33 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7bee0012 flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x81459a23 flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x96db3a1a flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa3c5c87b flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbb09b620 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd30d4812 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe7ea36e0 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x0069bb62 bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x62c439e4 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7d782449 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd1998e13 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x328d992e dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x51b0a70f dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x83c667f7 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8994ed1c rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9c0842b8 dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xacf27005 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc8d4d4ff dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe71a2f36 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xee02f7b8 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x03c51be7 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1da4eea2 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x22cbb1c1 dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x25ee78ee dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x28448d9b dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4011d18e dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x41cba280 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x458adf82 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x49573e53 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4d59e975 dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4f089e5e dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5419c9b3 dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5f46b460 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x64bc6376 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6d54f72e dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x789c1349 dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7b531f86 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x829c2085 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8efd4614 dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8f8634e8 dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x915ca1a8 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x983dca2a dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x98b80996 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa2daea20 dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac2cbd55 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb644a298 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb956c556 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbb256f90 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcd1558b9 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd25bcb43 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe3d22b9b dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf3baca40 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf5ebbce2 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf8e8bc40 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x65638cf0 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8a412dc2 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x9de29840 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xb4206ada dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xc6f68945 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xd5700535 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xf55b0759 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x83c3cf6c af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x00c22472 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x13c4374d dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2623b757 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3c0817ca dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x49f96dd8 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4a36bd4a dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc148e8b4 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc211407a dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd414a267 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xdda446b1 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe326efa9 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x84b57d68 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x2e07bcb0 au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x77f7e2fb bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xb18f905c cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xbbe6b110 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x433e4293 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x978ecf53 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xee3682cf cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x6f379847 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x324148b4 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x80e2df41 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x3f6fc3c3 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xc8f29029 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x610a8e67 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x15285199 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6ffa8111 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x7bfd0250 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x8603c933 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbdf814f6 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xd8bdf141 dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x898ca34f dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xf7bbc787 dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x26f93836 dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3f53f4fd dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x52556d84 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x75e46879 dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x7e62b809 dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x9ac38b26 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1be08696 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xc8d2a820 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xdb326ad4 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x5a107d67 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xec2296fe isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x653b3a9d isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x60d7603a itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xfaaeb483 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x4449e518 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x050e70cb lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x4f4e237c lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x527860c8 lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xac4660af lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xcb7f8812 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x9f5ca7fb mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x363d530d nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xde14ec11 nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x2674f84c or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x1bea6511 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xf6486d70 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x8157a5bc s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x6c247753 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xeb10ca42 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xb53a1cbb si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x0f099e95 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xd981d6e9 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xd7cd010b stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x4e1f8311 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x6f53477d stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x638a60be stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x4352ebd0 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x2717f1e8 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xf9e3b39e tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xd10d4b88 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x9670ccaf tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x022c8185 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x089774e5 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xa909a698 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x9e499969 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x005f7b4b tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x5e158a5a ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x92eb5d6b ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x1860fbc0 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xc87a96fd zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x10fc7c2a ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x5f5b765a ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x749c7790 ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x5e3ce418 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xdbd4153d bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xde6cca19 bttv_sub_register +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x0a73d6df btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x6dd80c13 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x3f2312af cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0x3ff2b85d cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x6d35c848 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xc5b2711a cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x6b5b834a vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x762e879f vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x025c57ee cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x1f5ea0c1 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x33707cca cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3d6814e2 cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4d3f8cda cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x56d6d129 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x12780902 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x27d15ed6 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3510a3c1 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9a41379e cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb861a413 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xe02cb805 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xfbd3f642 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0960749f cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1fbce218 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2da4e26b cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x395ee344 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x46e27d1d cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x488e38b8 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4972d9c4 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5a210b20 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5f0cd60f cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x618cb0c1 cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7d336b2a cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x862885cf cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x917bb604 cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9ba4b062 cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa157c1b7 cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa2c378a9 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd9992f00 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xde57b0a1 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xebada1af cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf11eb68b cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf8a1c65d cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfb0beffe cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x263fedff em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x285d8c5f em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6c0daa50 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x794c5269 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7d45e9e3 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc1e1001c gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc4bbf270 gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc8d7ed2a gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xd9813dcb gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0037de31 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x141e04b1 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3ad7a133 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x6be1603a ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7ed6f9b2 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x81509f19 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x86a18e36 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x98f42daa ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xad99cfc3 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfab19104 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfc62f587 ivtv_api +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1d766e68 saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x258dc523 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2a37c288 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x548b0d8e saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6829e84d saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6cae0793 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8c5d3882 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xad99efb8 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xaf1cedb6 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd273fb2b saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd5fe24cc saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdabf5adc saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/soc_camera 0x1f1fbbc2 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3887904d soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3fde25b3 soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x621e6cbb soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x638e9335 soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x9379c52b soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x999e0401 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0xa2480511 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xca010bf1 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/tveeprom 0x71614f18 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0x716b8337 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x224cb4d0 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x2a65a8f4 usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x2e269a62 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5293ede2 RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x54ded406 RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9203a882 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9778abda RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa7668bc4 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xdf605c59 RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf7a33c33 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x98a488f5 v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x989a2593 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x98b7b358 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0f380969 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x136167dd videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x75a13125 videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x90c2c5bf videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa8fd9eda videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xacbd8833 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x143d2ef7 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x4edfab98 video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x5a81071b video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0xb0e88a46 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0xbf273920 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0xc4e67607 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xeec6ecb5 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf7b1ab0e video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xfaf8d8d2 video_devdata +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x162c9703 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1f1ab23b mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2e2434c9 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x313654aa mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3505189a mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4411c3cf mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x47d376c8 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4a931600 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4f834a08 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x524813dc mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x64303ee4 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x65f306be mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6759425b mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72127117 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7dc910ca mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8dac2d40 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x91c1001c mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x94c04941 mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa0a895ae mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa107b63b mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa87ef438 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbd819ad1 mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc500d6e4 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcbdfed72 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd6da3a4b mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd88e5dff mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe31f3bbb mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfeb4a635 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x185c559d mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1c53d4e6 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2b3b9ee4 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3eef6976 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4bf61864 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5263a9c3 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x54618330 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x71485f96 mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x749c9f2d mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x78792b57 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x800a957a mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x869dc651 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8f9ebcaa mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9100e325 mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x970a1556 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9b874157 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa18be947 mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb0926e10 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb1ba31b3 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc3c715a7 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xca90b3d1 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd31097c4 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd58c30c5 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf07ae11a mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf42653fc mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xffa7a922 mptscsih_info +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0dca1fdb i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x14597bd6 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x16b1010d i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1e760283 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2e2bb8d1 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x36f7b0fa i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x38469701 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x442fd171 i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4c6a677d i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6fa76411 i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x70a04938 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7193bcc9 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x759cda0f i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7aa88a8d i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7ef04085 i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99fa1405 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb788a51c i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb9dd5dbc i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdb8a4e2d i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe6d0187c i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe6fa69ad i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe86b7dfb i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2469150d ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x376d3b07 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6c20e572 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x85ce72c2 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9655416d ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9e9e7561 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa46415e6 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfd6ee33b ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x462ae5c7 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x6d8c63c4 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x50ad9fb8 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0x755d98e8 mfd_add_devices +EXPORT_SYMBOL drivers/misc/c2port/core 0x9d07d374 c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0xd8dc6e23 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0x2e45276f ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xb3744503 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x03eed3bb tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x0dac8cc2 tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x3425e691 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0x4323cbda tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x6b5b38f6 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x7e5aef05 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x8e9c88eb tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x992bf680 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x9950c999 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xbf4493e1 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0xf6abfb04 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xfa408efc tifm_eject +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x7db87b04 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x206c0ed9 __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x22f3035e mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x272ba0bc mmc_resume_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2cb57ace mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x425933b8 mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4783b00a mmc_alloc_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x543d6271 mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x6ed97612 mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x88c0544e mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8cdfa77e mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8f38fd7a mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa817eab4 mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xdffb7777 mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe11c4737 mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe2642f82 mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf6007cc7 mmc_suspend_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf852f839 mmc_add_host +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0xa4143390 mmc_spi_get_pdata +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0xa472619e mmc_spi_put_pdata +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0f49ae08 cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x424a6371 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xd0112d9a cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x016890c3 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x76c7dd4c unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xd2a5a9fa do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xfdfd21eb map_destroy +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x7f23b15a mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xb5b79918 lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xf84eb42c simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0xaf8a1b46 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xecd68f76 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x550f34b1 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x84cf84d1 mtd_concat_create +EXPORT_SYMBOL drivers/mtd/nand/nand 0x1f4777dc nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xa23bb607 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x3c6a3327 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xdb996410 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x102d8992 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x7c074b5d flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x9e07b1c9 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa04d5cfd onenand_addr +EXPORT_SYMBOL drivers/net/8390 0x1c888698 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x55b79913 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0x5d31bad0 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x6ea77a02 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x77a67e55 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x9f9b36f1 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xab076fcf ei_open +EXPORT_SYMBOL drivers/net/8390 0xaf9cd24b ei_poll +EXPORT_SYMBOL drivers/net/8390 0xbbbe033a ei_close +EXPORT_SYMBOL drivers/net/8390 0xc849d342 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1fe75a43 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x325aefc8 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x3a9f4c12 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x4213483a arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x59a07df6 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x89099e70 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb91843a9 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc35e0cbf arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe967a1f4 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xffd0431e arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x125dc721 com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x32f83977 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf6701cb0 com20020_found +EXPORT_SYMBOL drivers/net/bnx2 0xdb95a82c bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0x8a5b5414 cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2253c70a t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2b016683 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3e8229d5 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4c01dd91 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7ab1d66e cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x81332803 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x91f4505a t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x97ce3aaa cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa45b4802 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xac1e04f4 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb2ad1c89 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xcf988f07 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xde966ab6 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe006cdc7 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf4da0993 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfdfafb54 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x10c36a83 hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x383a0e3c hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x72b9ce28 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe11e947c hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe85b052a hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x17bc5dae sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x28bba032 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x37719ee0 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3de3de93 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5ed44f26 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x774beb38 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa3411bbb sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb8414fed sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf417f3a9 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf73fa6d0 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x4df040a5 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x7d78b4b3 mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0x8a39d474 mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0x8e2fb8e8 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xb4d4bf59 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xe56d6bc7 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0xfcaaee62 mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0xfd87b25c mii_check_link +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x8f869d4e alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x99aac7a9 free_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x06790b32 ppp_register_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x536f3374 ppp_register_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x69ceab2e ppp_input_error +EXPORT_SYMBOL drivers/net/ppp_generic 0x7c8f74c8 ppp_output_wakeup +EXPORT_SYMBOL drivers/net/ppp_generic 0x80096a0f ppp_unregister_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x9db9d0de ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xa10628fe ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0xcb6adebd ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0xf46b7d0a ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0xf48e9d00 ppp_input +EXPORT_SYMBOL drivers/net/pppox 0x62e8ce9c pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xbeb3c3ef pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xea463d8b register_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x2278e94b slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0x26b760c4 slhc_init +EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0x62538167 slhc_toss +EXPORT_SYMBOL drivers/net/slhc 0x7e87227e slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7 slhc_uncompress +EXPORT_SYMBOL drivers/net/sungem_phy 0xea6bb345 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x5167b760 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x617b91bc tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xe05fb00a tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xe8ee4ae6 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xfd2ddd9b tms380tr_close +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x11d211ba detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x194e1a20 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x366105ad attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7446a130 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x75ea78b8 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x83ae5bd8 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9c054d40 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa68584af hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa9d9fc1b hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0xc16abb6e hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0xfdc198cc hdlc_close +EXPORT_SYMBOL drivers/net/wireless/airo 0x2bcccf79 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x9555bcf8 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xaa958ea3 init_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x9de02dfe ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd4b7ae16 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/atmel 0x979b84f9 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x9c8e3e64 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xdfb10d2b atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x01d1b84b hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x17b17659 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1a154482 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1fdd22aa hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x361724e7 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3626586c hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x46fcf155 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4e9c0031 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x571f77f3 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x59fb39a4 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5e08bdb3 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x666fef1d hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6c8cae9b hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x72ee3ad6 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x77d6af99 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x899ab113 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x93111bde hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9d1d7565 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa17af33e hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xab70e6a6 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaf3aef87 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb3661fc1 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbce3fe7f hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdc1ec621 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf980ea78 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0cdd50fc ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x20befcd1 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x21af251d ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x29071111 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x47b87388 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4b4f048d ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5c8624f8 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x67493c54 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8647fbaf ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8ebd5e21 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x945de36c alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb68545d9 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb9610f58 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcb6dc00c ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xda75c1a7 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdd0cb016 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdefa19d5 ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe5a04066 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed8fcf7a free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf481db23 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfe5e55d8 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0042e570 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x027abb1e iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x054e21c0 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08b80774 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c0f2602 iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0db2c215 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0df5d810 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e98739d iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15ede6f3 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d82875a iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1fad9dd3 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21e7a5f4 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2356427a iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x244d8515 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26799d09 iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x268fee09 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x28569687 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x28797dac iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a0c3ce3 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2bc8e7cd iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d8ac33e iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2eca193c iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ff12a14 iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30ddcdf7 iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x362293e1 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x362620c9 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36d24d64 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3964bede iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b5a4ea1 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3bd24d98 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3cce4036 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d884c5d iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3da6a592 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4292c5d1 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42c9f88a iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44640881 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4476878e iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44cd0b14 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x453e9363 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46d22a5a iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48762fff iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x495e64e4 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a7bc058 iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f251c3a iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5311c80a iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x556f24b2 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57644a1f iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58349f48 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59357ffc iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ab0e77e iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d2c64cb iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e6e83a8 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f50461b iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f6c21d3 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60300e49 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60f432a5 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x670be790 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cc146a3 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cd3debb iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6fd63fa6 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x702150bb iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70fbac4a iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x727d2701 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x73d0437e iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x75b343df iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78bc48ae iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b5fe2cd iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d6d6c29 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f3c9080 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84ac77c0 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8847123f iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x890dd376 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a17590f iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a98176b iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ae8a455 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8de21922 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f9361b5 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9470d445 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9541477f iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x96de1849 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x98428205 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c52b47e iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d7ea8d4 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e3e3a9b iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f3e6583 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa080c8ec iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa22eb3b4 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3c96860 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa618d22e iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7b87fc2 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8e1d214 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab40ed9f iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xabbc73e8 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad2b7503 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb10c0c96 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb212953c iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb513b43c iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6e3f825 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6ebd7e4 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb78321ae iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8258ac8 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb981f3ed iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9e6585f iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb6e46e0 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe3a0f12 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbf663b02 iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbf8e8754 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0bfe82d iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc17c0e17 iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1f8d152 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3383d32 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3845d00 iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc40e4f87 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7ea6f4d iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9176919 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0b466e6 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3566c53 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd39878b4 iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5787fd4 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd586e42f iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbe0613e iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2a097db iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4d5ee06 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe528a4e7 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7684dfd iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8971657 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8979f05 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe95a641d iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebf2a54b iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed3b159c iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee57d3b4 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf372f65a iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf3c3467d iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5f838ea iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf78b3dc6 iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8490b45 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9c03172 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc09f5e5 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff53ed6e iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x39d97433 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3eaf141b free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x73f2c5a3 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x9bf0da6c orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xb7d75a34 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x12268681 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x122bd5cf parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x1be96612 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x2714a509 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x2da4c98e parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x2e06363d parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x332f6c4a parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x4a46d2ae parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x4a5eb74a parport_release +EXPORT_SYMBOL drivers/parport/parport 0x4cc7f1ab parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4fc75d11 parport_write +EXPORT_SYMBOL drivers/parport/parport 0x599a93f5 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x65e456ae parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x6936a34b parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x6fbb2211 parport_read +EXPORT_SYMBOL drivers/parport/parport 0x81eb3256 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0x96b3050a parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x96bb3de7 parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa49eee71 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xa970a53d parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0xc8d49b93 parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0xe174be86 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xe1d9e463 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0xe4d4cc92 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0xe7c79494 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xe92849e2 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xea4e1612 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xeda32eaa parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xf75bd712 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0xff94ca16 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport_pc 0x11915eb4 parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x16fc6c2e parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x06e1a5b5 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1596e07e pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2d485783 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3d66d4b6 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4bc33de2 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x52003a9c pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5a320c5e pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x74e0867e pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x82bdabf0 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8328df16 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8c3b90ab pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xabc432e4 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe1d3dc98 pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xedfeb553 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xefebb0fa pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x19c5fa02 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f187a1b pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x202da3f2 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x229bdba6 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x278c6c59 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33e3ec3e pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x38fa3ffe pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x408b8cd1 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x47afdfcc pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4c8e969d pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5ddc59ef pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x764013d3 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x79101c0a pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x79a23454 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7a089524 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7d3bc4a5 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7d87ef7d pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x88bb5290 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x899c05da destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x938c9ba0 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x94a2c019 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9615f259 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x99a295a5 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa386c2fe release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xabfa9220 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb152d3dc pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb59da9ee pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc8a4d2a2 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcd3757b9 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd905150a pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe44afe58 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe82216bc pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xed8755ed pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x18518140 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0x6fe7a99f pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2ccf310b fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2fd3d520 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x39d46fa0 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x823af816 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd6ab6415 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xe368c635 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xe64a01d8 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02dd974e fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x046dfe41 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0476ba6d fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x09975680 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0d06413c fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f348a5b fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x125b1f01 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x130bc24f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2169e55c fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x25ace0f7 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e3bbc29 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3824ff04 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x39a85267 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x471e3310 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x49bc8b69 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4ea73752 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6121c065 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x66e134b6 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x696f121a fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6a1c1332 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x70a99333 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x72f248cf fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7488bad4 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75f2c3b4 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x766bd0d3 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7a1cb1bf __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8c0eb135 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9232a8a6 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x972be980 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9e905ca3 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1ca3e41 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xadc206db fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb7cbd628 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd5169eed fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd56a5e5f fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe4eee24e fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf21bc74f fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf29e828c fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf96729ca fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf9b4fb3d fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd56050a fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0xc93b0ced mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0f768caa osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12d15c4d osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18b205e8 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x20224af7 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x27f79129 osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x366d493c osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3d269c0b osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x42d5dabc osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44b1a1bb osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x454d4ddd osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x507bf2d1 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x530e5702 osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x533da978 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x66b38a13 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x66bfbc5d osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x765087c8 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x793a0674 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7b0634aa osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7d3724bf osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x824ac941 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8537a244 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8665ab40 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x896be852 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8994d4a5 osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x97affd38 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x97d194b5 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x98c42412 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa2c763eb osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xab94db8e osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xabf6e14e osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbdd4afc6 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc67111b8 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5bc95c06 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5f047bea osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x74bad5cf osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x2a3f37ef qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7bf5e5b6 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8f33703c qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x991b0442 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc3255f4c qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe9f46d89 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x40b437f8 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x809e6303 raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0xe3aba5e5 raid_class_attach +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x001a3948 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x041c9f51 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x200ab0da fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3476a64e fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5dc94985 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x96e06477 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9980361e scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xad045125 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xaffb0f1d fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb1606aee fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe00686d0 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe82adfaf fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x01c7f743 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0ab4fd37 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x210b9704 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x235aa6a0 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2490f556 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x276f9263 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x27c4c19d sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2b11e0e0 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2c13b42d sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x41d35853 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x63a23c1d scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x646662ea sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6f82c4e5 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7a32b926 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8ad014ad sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8c98b4cb sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9d5e327a sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb0dce0bd sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbff95160 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4de2dee sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcd5536b3 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd6a87bbd sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdf97d29a sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe573b35e sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe815602b sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xeb1f3c9c sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x02497d6c spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x286d0c63 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8d287d7e spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xc36aebbd spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xd4aaf912 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/serial/8250 0x12883243 serial8250_register_port +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/serial/serial_core 0x01fa2638 uart_get_divisor +EXPORT_SYMBOL drivers/serial/serial_core 0x0d044284 uart_write_wakeup +EXPORT_SYMBOL drivers/serial/serial_core 0x4e60cc6b uart_remove_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0x4fb93c4b uart_register_driver +EXPORT_SYMBOL drivers/serial/serial_core 0x5ebc3512 uart_get_baud_rate +EXPORT_SYMBOL drivers/serial/serial_core 0x5fee927e uart_resume_port +EXPORT_SYMBOL drivers/serial/serial_core 0xb7e1b167 uart_add_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0xd85f60aa uart_update_timeout +EXPORT_SYMBOL drivers/serial/serial_core 0xda5bbae6 uart_match_port +EXPORT_SYMBOL drivers/serial/serial_core 0xf1c8fdb0 uart_suspend_port +EXPORT_SYMBOL drivers/serial/serial_core 0xfe93895a uart_unregister_driver +EXPORT_SYMBOL drivers/ssb/ssb 0x22889486 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0x2b8da3c5 ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x3a7b9812 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x48841eb2 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0x574b7746 __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x65f51b1d ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x69ee9280 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x7346084b ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x83f2e907 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x8fdae0be ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x9551989c ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x991222f5 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0xb0bfc84b ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xb275b1ad ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xb3b4cf25 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xb74ba6f0 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc8c453e1 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xe50bcef2 ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xeb0c8629 ssb_pcihost_register +EXPORT_SYMBOL drivers/telephony/ixj 0x332d91b9 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x3dfceb8f phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xe808051a phone_register_device +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x1ef9ba1c usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x89a2726a net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/gadget/net2280 0xf30df5b1 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xa2c0f6bd sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2d50742a usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xbe3631ff usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x3587da64 lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xbe3a9235 lcd_device_register +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0e4150f3 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x1beafa09 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x37b1df6a cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0xabc611c5 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/display/display 0x04eb0597 display_device_register +EXPORT_SYMBOL drivers/video/display/display 0x534f0bc3 display_device_unregister +EXPORT_SYMBOL drivers/video/output 0x454f4d1d video_output_register +EXPORT_SYMBOL drivers/video/output 0x8713e1b1 video_output_unregister +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x17a2d096 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x3479a89d svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x5e1ee0ed svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x6bc5cb67 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8a536aef svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x91345024 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec25f50a svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x60cf53f6 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xf4bf4008 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x387f5c39 w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x622301b0 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x729b3bfb w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x8456a523 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x208c8988 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0x8cf65650 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xb2c2d1f0 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xf017fd71 w1_remove_master_device +EXPORT_SYMBOL fs/configfs/configfs 0x0f6ee23c config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x1eb25a6b configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x36aac984 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0x3f6bc753 config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x3f9674f0 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x4023931c configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x4483c2b7 config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x49ddebbe config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x7f2cb017 configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x8b0c0c84 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0xaeeebe56 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xf0d43b53 config_item_init +EXPORT_SYMBOL fs/fscache/fscache 0x00001815 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x14718608 __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x38e5672f fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x3b3834b7 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x46a52862 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x531e2b9d __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x5fe58c20 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x6822e76d fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x71c2cc5d fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x755cd2ea __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x90f2738d __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x9308a330 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x97680f8e fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x9a72ec6f __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xa199caa1 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0xaa1f4bef __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xaaf930e2 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb19b313d __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xb33b5bc4 fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xc2357a92 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xdef96837 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xe7a9e286 fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xeb76ec0b fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xf367286c __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xf62b7424 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x3b6156de qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x81dece2a qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x9194a727 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x919ca7e1 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xcf17085d qtree_read_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-t10dif 0x782acba5 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0xcf54e44c make_8023_client +EXPORT_SYMBOL net/802/p8023 0xebaa43ae destroy_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x03656564 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x0fa6d9eb p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x12c8cc52 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x2295de87 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x3255786e p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3a4f2cf3 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x43e3b34b v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x4bca3c0d p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x4eb94197 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x6c182a63 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x76f1e096 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x77dbe8f7 p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x7ef8a021 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x8015d28b p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x81d1457c p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x8446dec9 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x8527df90 p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0x944c1fff p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x9a56818f p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x9ac43257 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0x9d5c5bd2 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0xb51d2aad v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0xb8beac26 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xb9e94ccf p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0xc1be6e40 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xe2606fa6 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/appletalk/appletalk 0x0dad2634 alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x56b953bd atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0x59fd9e9a aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xd7a6a123 atalk_find_dev_addr +EXPORT_SYMBOL net/atm/atm 0x0795344c vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x09597c01 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x13f45333 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x18de9a9d register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x47fc6a97 vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x5e0e5ff8 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x6a18d7fb atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0xad530682 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0xd1f03992 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0xd96f39a5 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0xe9e8631f vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/atm/atm 0xf642a50f atm_charge +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x28dbe447 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x40f707ec ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x77e1c18b ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x81f8a9ed ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xa0a6569b ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0xb0437c69 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xcb578461 ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0xcc674972 ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xeff366be ax25_send_frame +EXPORT_SYMBOL net/bluetooth/bluetooth 0x01c930de hci_recv_fragment +EXPORT_SYMBOL net/bluetooth/bluetooth 0x07b200da hci_alloc_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x0eef008f hci_register_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x1560373c hci_conn_check_link_mode +EXPORT_SYMBOL net/bluetooth/bluetooth 0x22e67fe5 bt_accept_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x28731c76 hci_send_sco +EXPORT_SYMBOL net/bluetooth/bluetooth 0x31a3666a bt_sock_register +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4060992e bt_accept_dequeue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x486aa7d0 hci_free_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4a321d36 hci_suspend_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4b817144 hci_unregister_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x52a3e83b hci_conn_put_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0x5d222a82 bt_sock_recvmsg +EXPORT_SYMBOL net/bluetooth/bluetooth 0x60fb07dd hci_get_route +EXPORT_SYMBOL net/bluetooth/bluetooth 0x6faa456a hci_conn_security +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae bt_err +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7285cdcb hci_conn_hold_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0x828faef5 bt_sock_wait_state +EXPORT_SYMBOL net/bluetooth/bluetooth 0x973f196f hci_register_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0x98cd3456 hci_unregister_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0xa40d913e hci_send_acl +EXPORT_SYMBOL net/bluetooth/bluetooth 0xaa3f5220 hci_conn_change_link_key +EXPORT_SYMBOL net/bluetooth/bluetooth 0xb0ebad80 hci_connect +EXPORT_SYMBOL net/bluetooth/bluetooth 0xb9e7cec5 hci_resume_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0 batostr +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc89ccb4c hci_register_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc9a4c1c2 bt_sock_ioctl +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcaafbd21 hci_conn_switch_role +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551 baswap +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcf38eca5 hci_unregister_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0xd8f748e8 bt_sock_link +EXPORT_SYMBOL net/bluetooth/bluetooth 0xe2246743 bt_sock_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db bt_sock_unregister +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf3fb7a73 bt_accept_enqueue +EXPORT_SYMBOL net/bluetooth/bluetooth 0xfa8addea bt_sock_poll +EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88 l2cap_load +EXPORT_SYMBOL net/bridge/bridge 0x3f4e0e7a br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xbda0f2dc ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xcbd37b63 ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xd4fee907 ebt_do_table +EXPORT_SYMBOL net/can/can 0x326f64fc can_rx_unregister +EXPORT_SYMBOL net/can/can 0xb740ef99 can_rx_register +EXPORT_SYMBOL net/can/can 0xd8da8da5 can_proto_register +EXPORT_SYMBOL net/can/can 0xf1e5d7a5 can_proto_unregister +EXPORT_SYMBOL net/can/can 0xf981b62a can_send +EXPORT_SYMBOL net/ieee802154/nl802154 0x1d09fede ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x3b38daf9 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xb9e17799 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xc11a6559 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xdcc7b9b1 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xf6c0a7b8 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x254cc0aa arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x5371c652 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x64ba2b38 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x3c69a669 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x9e9501df ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xf0700182 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x2aa92e03 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7e2df2ba nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa444a9e4 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaef96ea3 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbc6bb282 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcd292864 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xf05536c1 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/tunnel4 0x0c0be576 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xdd7432db xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x1435e9b8 ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0x21de198a ip6_frag_match +EXPORT_SYMBOL net/ipv6/ipv6 0x2f9a6d70 xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x3037b123 inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0x3dde465a ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0x40a0caac ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0x46fddab9 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0x4f1f2334 ip6_route_output +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x6227fb85 nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/ipv6 0x6579d8a3 compat_ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x67947a3e inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x70974a65 ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x7aa8918c ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0x85c42758 xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0x87331daa ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x8897c584 inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0x8f1d078a inet6_del_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x92b33e55 ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0x952f7c82 icmpv6_send +EXPORT_SYMBOL net/ipv6/ipv6 0x9aa7d9c7 inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0xa04995af ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0xa2cd3ce0 inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xae25e261 compat_ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xb530bb6f ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xbef707d0 xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0xc1f9cee5 xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0xc50fa81f rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0xc612d99a in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0xcc7a3f42 inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xdcd34d52 ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xe94d0768 ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xec619e4b ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0xf6a427b8 inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xf6d0a680 ndisc_build_skb +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x24a2865c ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x9c1e8cb0 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xbe7a2c01 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xd0636d8a ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x25a5a11b xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/tunnel6 0x6ac26d5d xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x32f53912 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4d46c0c5 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6a88a732 ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x7b8844d4 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xb6fa998d ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xcd4cea9f ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd5834f65 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xf0ae602e ircomm_control_request +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x0d4369b6 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0x12663a24 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x18edd399 irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0x1b6182bc irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x29783db6 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0x2af2ecf5 irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0x2d88f993 irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x2fff60e2 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x45bcb902 proc_irda +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4b11cbad irlap_open +EXPORT_SYMBOL net/irda/irda 0x543a6db5 hashbin_new +EXPORT_SYMBOL net/irda/irda 0x550a5e27 irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x5861b834 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x5f261aef hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0x615c4c7f irlap_close +EXPORT_SYMBOL net/irda/irda 0x63949174 irttp_dup +EXPORT_SYMBOL net/irda/irda 0x661e0e3e irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x668cb182 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x73cf72df async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x744f58f2 async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7c918f14 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x7f933922 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x85513ffd irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x89136cd1 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x8ae4cc25 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x94a8156e hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x980fe568 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0xa1080291 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xa1ab7667 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xa26f32f8 irias_find_object +EXPORT_SYMBOL net/irda/irda 0xa830e3c6 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0xa9c69aa7 iriap_open +EXPORT_SYMBOL net/irda/irda 0xb3b97c2d iriap_close +EXPORT_SYMBOL net/irda/irda 0xb7884205 hashbin_remove +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xba6298c0 irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc10a5281 irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xce4db6c3 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0xd627dc1a hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd6deeaae irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xd8f35e43 irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe0acf0d4 hashbin_find +EXPORT_SYMBOL net/irda/irda 0xe1a50c6f irias_new_object +EXPORT_SYMBOL net/irda/irda 0xe8ff8117 alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/lapb/lapb 0x0b83effc lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0x41aa61d2 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x7497c17f lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0x7c707907 lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0xc3bb79ea lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0xc9cd1209 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xccba3c3b lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0xe050c3af lapb_register +EXPORT_SYMBOL net/mac80211/mac80211 0x0e8f8bd2 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x0f21c210 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x1554cab1 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x180f360c ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0x2b4508c6 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x2ba51b35 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x2c7df7c5 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x2eaeca7b ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x35abd619 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x4645ac86 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x4f26ef4d ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x517b0480 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x5e6d6146 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x619662cc ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x6cc75847 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x826a47b0 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x8894f046 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x8e752f17 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x8f24cdc9 ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x9092d3ee ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x94478458 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x9ab180f7 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x9db1cab9 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0xa27decb5 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xa2d42460 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xa4e8d32d ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xa732686d ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xb10ed757 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xb85f6c9c __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xbb467e5e ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xc1d35320 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xcf613f15 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe5c80f8c ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xed863fde ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xf1a6f024 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xf9e00d5e ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0xfc23bc18 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0ab6f746 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2a512b73 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x44147d8e register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7361fbd2 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x75c1f4eb unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8aa9fa71 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa7fc9d16 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xacd981ea unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb6f7d2e8 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xbeef07d5 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xef4e1e67 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x2563a641 __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xcedaf425 __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x1e59612b nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x06b08703 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x0bc4377d xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x1bded726 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x7e5eab00 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x8050a462 xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x8195d002 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x8410d685 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xd2325a21 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xe277f8f0 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xfb6a02c3 xt_register_match +EXPORT_SYMBOL net/phonet/phonet 0x0baec5ad pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0x14e6e31b phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x289787bb pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0x29cfd397 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x4390e57b phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x6447fb80 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x69bce454 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0xd861ad1a phonet_proto_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0x0b42873f rfkill_set_hw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x18a01ec4 rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x44cc505e rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x64a7ea45 rfkill_blocked +EXPORT_SYMBOL net/rfkill/rfkill 0x72188b54 rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0x90dcf5ef rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0x918a6646 rfkill_resume_polling +EXPORT_SYMBOL net/rfkill/rfkill 0x9d43ab16 rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xa56e8613 rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0xa9a1573b rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0xb738c940 rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0xd2f85c41 rfkill_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0xef61aee8 rfkill_set_sw_state +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x058b42c2 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0609b4d2 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x13f0319e rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3eaaf8ae rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x45aa9bea rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x47152cef rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4df56830 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x71284a07 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7d26ec9f rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x91251fe4 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9b452be3 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc807eb0b rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd13b33ca rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe9e456b6 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf5652561 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/sunrpc/sunrpc 0xc85d6091 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x167ba6e6 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x1eaee81b tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x207bf435 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x6d205df8 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x6ecc9e28 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x73ab41e6 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa151b98f tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb27ac4a7 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xb9f2d126 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xbbfe141e tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0xca67d120 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xcdc6e909 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd12aa1dc tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x96552a31 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x205c7062 wimax_reset +EXPORT_SYMBOL net/wimax/wimax 0x62f57238 wimax_rfkill +EXPORT_SYMBOL net/wireless/cfg80211 0x0431655b regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x143708eb ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1e06afd5 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x21086a13 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x29c2eb14 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x2c8bcfb6 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x2d76e9dc freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x33c10ac1 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x3f5198b4 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6e06d729 ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x77d5eafa wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x7aa8901b wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x7d4d9b81 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x7e716c1e cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x83ff2ae5 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x8552ba65 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x8d83e791 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x964710da wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x98d0dd56 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x9d1e692f cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x9f965771 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xa16b2d22 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0xa587e182 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xa8577bfc regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0xaec746f8 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc490a462 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd54b2791 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xe34a8a5c cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xedec24cf cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xf75ddc02 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x629a1e83 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6e36d594 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x9f2a1de5 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xb122089f lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xb29c0a83 lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0xd644f24b lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0xde847193 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xecca8d1e lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x389fa0ad ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x548eb452 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x25b4a3c4 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5e61441f snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xc60f473d snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xfe6c6bb6 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x73c63e96 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xd91d309f snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x326911b6 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7cb19049 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb389aad4 snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb401ffd7 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb5d25358 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbf834054 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe03c0c74 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe8755241 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x52fc07d0 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x00f6a3fc snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x055032f1 snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x0a0ec227 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x0b060b0d snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x0c341853 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x0ebe9bd9 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0x101b56e6 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x11117ca5 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x168dfa6c snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x190a1a66 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1a531b25 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x1dd331ad snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x1f1de197 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0x23551621 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x2373f799 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x27581933 snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x2c5295e1 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x2d925068 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x30bec00d snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0x329143b9 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x334e0d85 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x38da37f3 snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3f2792d7 snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x475b7db5 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4cbfcc3f snd_card_free +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x519fc226 snd_device_free +EXPORT_SYMBOL sound/core/snd 0x523f930b snd_cards +EXPORT_SYMBOL sound/core/snd 0x6b41299e snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x6c8bd77c snd_card_create +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x9125d156 snd_device_new +EXPORT_SYMBOL sound/core/snd 0x92106f47 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0x9b1edff9 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x9faed32f snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xa5d9d043 snd_component_add +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xba516ce0 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0xba7ee757 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0xbf3d727a snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0xccc1f1f0 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xdcb0a01f snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe5873e25 snd_card_register +EXPORT_SYMBOL sound/core/snd 0xea362b3f snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xf3cbc2a5 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0xf5c49b1f snd_jack_report +EXPORT_SYMBOL sound/core/snd 0xf7ed0b4c snd_device_register +EXPORT_SYMBOL sound/core/snd 0xf80d5ebf snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0xfc6fc4a7 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0xfd61bfaf snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd-hwdep 0x4fa9dcfa snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x46c25658 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x5284808b snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x67b5e6c2 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x7cdbe87e snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xf8c9ed0a snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x031aace2 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x0a933a56 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x16a608f0 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x292f0bbe snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x2dd0c610 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x34d52e5d snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x4451e182 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x552ee442 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x58042071 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x5fb02727 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x62caaf25 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x6378e02e snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x7695e1ce snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x835be448 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x8833cdde snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x89c6a6d9 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0x8a38548f snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x90ca1e11 snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x916118c8 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x9184cac4 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x94980fbf snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x9573595e snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x9a7600f6 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0xa232fe9b snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xa523c25c snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xa9c696db snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xace45c21 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0xaf1ac2e7 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0xb474b5a4 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc0d80937 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xcceaaf5e snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xccfde388 snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xe25a3716 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xe3bae49b snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xe74f05d1 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0xe84f0a58 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xeae4a446 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xf23f45f5 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf419db1b snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xfcd21062 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-rawmidi 0x02f5c6da snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0b017aa0 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x182afd15 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1943e19f snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x3ebb9887 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x40dceb7f snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x42829343 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x45b5aaf2 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4b45da40 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5f0e27ff snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x6931b222 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0x78d6a975 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x956e5147 snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa67d74b2 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb0023d3e snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd5f73bf4 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf78f7231 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-timer 0x0bf01c0d snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x2be1a845 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x414c3b50 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0x5c0b6232 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0x690f0beb snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0x73934863 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x9b4923ab snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0xab8f7f73 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xd503286a snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xd98997b0 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0xda18d367 snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0xdf46b705 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0xfea11a9e snd_timer_global_register +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xb999225f snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x301a1065 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x32ea765f snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x441c4b1a snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7e718d7f snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8c9e4fb3 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8e7a25d6 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xac9d5754 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xb405def0 snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xdbfd869b snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0d0f7b78 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x15dfd921 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x35b7af7c snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4de4ec0b snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x73231e98 snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99a54a00 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xa9bf7726 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xc9db44dd snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xeba93bf6 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x00bdb0f6 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x58cc639a snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xc1ebf472 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xedc47d81 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf0bfdf11 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xfeaf5d94 snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x07003cea snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x085392e6 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x18cb90f4 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x43b8d72c snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb20ea950 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc1fdf29f snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x874e9eb0 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb37f3fa2 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xe4c9d4eb snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xe750d396 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x3090464c snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x73a565f8 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x41ad129b snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x815a917e snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2b92bc1b snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x485f31af snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa2d8e76e snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb637f808 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xca0d1387 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-i2c 0x52a95eff snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x5dd07b8c snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x62d11b70 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x7070bd56 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x724c8d7f snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xdee53b05 snd_i2c_device_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0c4c8b5c snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x298d20a5 snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x418d5943 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x47c7b726 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x61778ba6 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x747bf8fd snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x92c91066 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9e45294a snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa8850608 snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd4851c66 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x40c3602b snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa10c58f2 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xbc6e4125 snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x004e3bbe snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x20acd329 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x245c07af snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x28321204 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4257a2ae snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x448df8e6 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x495701f4 snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4a1d6047 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6fec10d2 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x860d7784 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb686e481 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbcf4fd55 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc5801947 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd0a3a7ef snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe598ce31 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xedffff2e snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf598ae8a snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x4a72c873 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x66178f80 snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x866a69ef snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8cb99eb2 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8fe57473 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9a39983b snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc7c92c50 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf8537f32 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfa34c985 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x4c5d1722 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x2858f9de snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf412d22a snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xff707f81 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x34f228f4 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x5b84dd16 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x73cfcb7d snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf6603f73 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xfc22cb4f snd_trident_free_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xc496000b uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x3d5ac4bc register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x5a93dcfd sound_class +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x86039506 register_sound_special +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xb00320c3 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xbe77c1f9 register_sound_midi +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xcd1f391e register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x34e4166b snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7288e506 snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x73b46cbb snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xbf036d8e snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf8aee849 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xfb402809 snd_emux_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x1b64331f snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x27509d99 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x5ea88c42 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x64c68d79 snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x7afcd67a snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x8785a15c snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xa5beaed3 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xe6d051a1 __snd_util_memblk_new +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x7d05dac7 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x0170c2c9 lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x0b2f0882 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00006b97 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x00347561 file_update_time +EXPORT_SYMBOL vmlinux 0x00370141 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x003d57fe fail_migrate_page +EXPORT_SYMBOL vmlinux 0x0047af71 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x004a775b of_device_get_modalias +EXPORT_SYMBOL vmlinux 0x00571987 sock_recvmsg +EXPORT_SYMBOL vmlinux 0x005a4975 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x006984c4 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x007ef05d netif_carrier_on +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00abad9d create_empty_buffers +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00d2aca4 simple_rmdir +EXPORT_SYMBOL vmlinux 0x00ea4d68 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x00fea306 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x0108db9c i2c_master_send +EXPORT_SYMBOL vmlinux 0x0122f95e _lv1_get_spe_irq_outlet +EXPORT_SYMBOL vmlinux 0x0166eefd input_flush_device +EXPORT_SYMBOL vmlinux 0x018d9919 _lv1_set_lpm_interrupt_mask +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01dc7196 arp_broken_ops +EXPORT_SYMBOL vmlinux 0x01e9f0ee _spin_unlock +EXPORT_SYMBOL vmlinux 0x01f654a9 set_binfmt +EXPORT_SYMBOL vmlinux 0x01fdb6de macio_request_resources +EXPORT_SYMBOL vmlinux 0x02001497 get_pci_dma_ops +EXPORT_SYMBOL vmlinux 0x020d18d7 _lv1_set_lpm_debug_bus_control +EXPORT_SYMBOL vmlinux 0x022f5e0c request_key_async +EXPORT_SYMBOL vmlinux 0x023289d8 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x027d5499 _lv1_did_update_interrupt_mask +EXPORT_SYMBOL vmlinux 0x028d62f7 dma_spin_lock +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02b53f0a dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02f2ebb1 register_cdrom +EXPORT_SYMBOL vmlinux 0x0300d42f of_find_node_by_type +EXPORT_SYMBOL vmlinux 0x031dc65e pasemi_dma_free_chan +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x035fd7e6 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x0364712a sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x036b9bd5 __free_pages +EXPORT_SYMBOL vmlinux 0x036f1691 __dst_free +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x0385609c filemap_fdatawait +EXPORT_SYMBOL vmlinux 0x038b0c46 find_vma +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c49aca jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x03d44646 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x03f069ab bio_init +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x04074f48 ioremap +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x043f73cc tty_set_operations +EXPORT_SYMBOL vmlinux 0x0440a533 _lv1_net_remove_multicast_address +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04c05dcb pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x04c51ef5 load_nls +EXPORT_SYMBOL vmlinux 0x04ebc658 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x04fc1e39 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x052f7d60 generic_getxattr +EXPORT_SYMBOL vmlinux 0x054b759e generic_removexattr +EXPORT_SYMBOL vmlinux 0x05598ee9 kfree_skb +EXPORT_SYMBOL vmlinux 0x056616cd __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x0566f865 otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x057b8589 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x05a0549b phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x05a514a1 _insl_ns +EXPORT_SYMBOL vmlinux 0x05b4e835 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x061afbe4 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x062acf11 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0x064fb196 vm_insert_page +EXPORT_SYMBOL vmlinux 0x065bef80 migrate_page +EXPORT_SYMBOL vmlinux 0x065e2b7b inode_init_once +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x067da7e7 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06d6aef4 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x074c8870 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x07527e0d __kfifo_get +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cb00f4 g450_mnp2f +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07ef213a pasemi_dma_free_fun +EXPORT_SYMBOL vmlinux 0x07f2f795 follow_up +EXPORT_SYMBOL vmlinux 0x07f8ee15 _lv1_unmap_device_dma_region +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x086b7df1 matrox_G100 +EXPORT_SYMBOL vmlinux 0x089e5b6c __init_rwsem +EXPORT_SYMBOL vmlinux 0x08a64e7c kfifo_free +EXPORT_SYMBOL vmlinux 0x08aa5903 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL vmlinux 0x090719f2 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x090afa86 tcp_parse_options +EXPORT_SYMBOL vmlinux 0x090f117d per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x0910bccd inet_shutdown +EXPORT_SYMBOL vmlinux 0x093afbe9 sock_no_mmap +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x09599535 sysctl_data +EXPORT_SYMBOL vmlinux 0x095f3da0 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x096341c2 _lv1_connect_irq_plug_ext +EXPORT_SYMBOL vmlinux 0x0985da55 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x09997c70 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x099f105f inet_stream_ops +EXPORT_SYMBOL vmlinux 0x09b4302c __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09d1021f pneigh_lookup +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09d693e6 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x09f2809b blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x0a21b40d security_inode_permission +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a3ba663 release_sock +EXPORT_SYMBOL vmlinux 0x0a3d0644 cpu_online_mask +EXPORT_SYMBOL vmlinux 0x0a4f650f of_find_all_nodes +EXPORT_SYMBOL vmlinux 0x0a698076 gen_pool_free +EXPORT_SYMBOL vmlinux 0x0a97f8bb __find_get_block +EXPORT_SYMBOL vmlinux 0x0aa5ce6f bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x0ac05d3d devm_iounmap +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b1cfd6e page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x0b1fb94c compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x0b3c7953 tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x0b4faba5 mdiobus_free +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b81c247 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x0b8973e4 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x0b8c81ab __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x0b9f82aa dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0x0bba0ccf mem_section +EXPORT_SYMBOL vmlinux 0x0bc8b49c blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x0c1ad162 _lv1_net_start_rx_dma +EXPORT_SYMBOL vmlinux 0x0c625bab pci_save_state +EXPORT_SYMBOL vmlinux 0x0c6583f7 sys_fillrect +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca8de1f path_lookup +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cd3cf92 _write_unlock +EXPORT_SYMBOL vmlinux 0x0cdb6bec xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x0cde7329 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x0d1755ee sock_setsockopt +EXPORT_SYMBOL vmlinux 0x0d42ffb8 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d56a7b1 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0x0d6c963c copy_from_user +EXPORT_SYMBOL vmlinux 0x0d70ece3 unlock_super +EXPORT_SYMBOL vmlinux 0x0d92c612 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0db605fc tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x0dd3c9ec skb_checksum +EXPORT_SYMBOL vmlinux 0x0dd53d45 kernel_bind +EXPORT_SYMBOL vmlinux 0x0de63e50 __napi_schedule +EXPORT_SYMBOL vmlinux 0x0df15005 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x0e1c8dd9 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e59192a get_sb_nodev +EXPORT_SYMBOL vmlinux 0x0e729db5 thaw_bdev +EXPORT_SYMBOL vmlinux 0x0ec404f5 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x0ec9fd73 llc_add_pack +EXPORT_SYMBOL vmlinux 0x0ed7ffce xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x0edb43bd ps2_handle_response +EXPORT_SYMBOL vmlinux 0x0ee6ee5a blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x0eefc9d6 blk_plug_device +EXPORT_SYMBOL vmlinux 0x0ef22ade remove_wait_queue +EXPORT_SYMBOL vmlinux 0x0ef37ae2 __rta_fill +EXPORT_SYMBOL vmlinux 0x0efa0398 sock_no_getname +EXPORT_SYMBOL vmlinux 0x0efaaf16 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x0f021a6a end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x0f0314e7 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x0f048bf9 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f33f203 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x0f3a0f3f __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x0f57d5ae _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x0f95df95 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x0f9dc67b inet_addr_type +EXPORT_SYMBOL vmlinux 0x0f9e05c6 vc_cons +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x0fdc4858 compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x101dd3f8 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x101fb18f vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x1040b29e eth_header_cache +EXPORT_SYMBOL vmlinux 0x1040b480 handle_sysrq +EXPORT_SYMBOL vmlinux 0x105c5985 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x105e0a53 register_qdisc +EXPORT_SYMBOL vmlinux 0x10605b39 vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x10626fb8 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x107ba0c0 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x109ceb1e mac_find_mode +EXPORT_SYMBOL vmlinux 0x10a03113 block_sync_page +EXPORT_SYMBOL vmlinux 0x10a06718 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0x10d2bd12 ide_proc_unregister_driver +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x11139ff6 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x117136a1 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x1171b635 _lv1_delete_lpm_event_bookmark +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a41041 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0x11c45f5d sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x11cdcd56 i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0x11d66fc3 tty_hangup +EXPORT_SYMBOL vmlinux 0x12015102 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x1213d037 secpath_dup +EXPORT_SYMBOL vmlinux 0x1289605e matroxfb_unregister_driver +EXPORT_SYMBOL vmlinux 0x128db890 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x12a0a263 generic_write_checks +EXPORT_SYMBOL vmlinux 0x12cb6622 _lv1_map_device_dma_region +EXPORT_SYMBOL vmlinux 0x12e5ef0c rtas_set_power_level +EXPORT_SYMBOL vmlinux 0x1342a92d mark_info_dirty +EXPORT_SYMBOL vmlinux 0x1348b3e8 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0x1374c9e0 of_device_alloc +EXPORT_SYMBOL vmlinux 0x137a8526 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x137be6a1 kernel_connect +EXPORT_SYMBOL vmlinux 0x13c984a5 vfs_create +EXPORT_SYMBOL vmlinux 0x13e2b11d dev_open +EXPORT_SYMBOL vmlinux 0x13f2252c pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x13f53da6 CMO_PageSize +EXPORT_SYMBOL vmlinux 0x1411c362 sys_imageblit +EXPORT_SYMBOL vmlinux 0x141fe5fd pasemi_read_iob_reg +EXPORT_SYMBOL vmlinux 0x14268628 dst_release +EXPORT_SYMBOL vmlinux 0x142aeef4 phy_detach +EXPORT_SYMBOL vmlinux 0x149fb93c scsi_register_driver +EXPORT_SYMBOL vmlinux 0x14b90cad path_put +EXPORT_SYMBOL vmlinux 0x14c14194 of_find_property +EXPORT_SYMBOL vmlinux 0x151592c4 _lv1_invalidate_htab_entries +EXPORT_SYMBOL vmlinux 0x1540668c phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x15579e3a tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x159aa589 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x15a9b38a tty_write_room +EXPORT_SYMBOL vmlinux 0x15aaab0a abort_creds +EXPORT_SYMBOL vmlinux 0x15bef29c xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x15ed95d3 _read_lock +EXPORT_SYMBOL vmlinux 0x160181a2 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x160bd45c rtas_token +EXPORT_SYMBOL vmlinux 0x161a211a __page_symlink +EXPORT_SYMBOL vmlinux 0x16250200 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x1639a387 submit_bh +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x1640d7b1 fb_class +EXPORT_SYMBOL vmlinux 0x166b47e0 of_device_is_compatible +EXPORT_SYMBOL vmlinux 0x1673ee5d netif_napi_add +EXPORT_SYMBOL vmlinux 0x16c4f254 bdevname +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x171a6393 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x1743414f __debugger_fault_handler +EXPORT_SYMBOL vmlinux 0x1768fa29 input_grab_device +EXPORT_SYMBOL vmlinux 0x177a342f unregister_con_driver +EXPORT_SYMBOL vmlinux 0x177b8f4e __lookup_one_len +EXPORT_SYMBOL vmlinux 0x178d6f1f simple_write_end +EXPORT_SYMBOL vmlinux 0x17941060 vfs_statfs +EXPORT_SYMBOL vmlinux 0x179ec4b8 dcache_lock +EXPORT_SYMBOL vmlinux 0x17aa9fe3 set_page_dirty +EXPORT_SYMBOL vmlinux 0x17abd33f seq_write +EXPORT_SYMBOL vmlinux 0x17c2dc07 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17cb8c79 _lv1_read_htab_entries +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x182e0e53 scsi_host_get +EXPORT_SYMBOL vmlinux 0x182f50af _lv1_open_device +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x184c25c4 scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x185b7dd6 _lv1_modify_repository_node_value +EXPORT_SYMBOL vmlinux 0x185c11e9 vfs_quota_on +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x186caced of_get_parent +EXPORT_SYMBOL vmlinux 0x187745e7 con_is_bound +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18a85495 matroxfb_wait_for_sync +EXPORT_SYMBOL vmlinux 0x18b113f4 tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x18bd642e dquot_initialize +EXPORT_SYMBOL vmlinux 0x18c875b9 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x18c9379e init_task +EXPORT_SYMBOL vmlinux 0x18c98205 _lv1_destruct_virtual_address_space +EXPORT_SYMBOL vmlinux 0x18e4b1b1 napi_complete +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x193d27e6 bdi_register +EXPORT_SYMBOL vmlinux 0x194783be ida_pre_get +EXPORT_SYMBOL vmlinux 0x195f7ff3 make_bad_inode +EXPORT_SYMBOL vmlinux 0x196ee0f9 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x19899be8 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x198e35da arp_tbl +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19c749ff seq_open_private +EXPORT_SYMBOL vmlinux 0x19c968d1 pasemi_dma_start_chan +EXPORT_SYMBOL vmlinux 0x19cbb4b5 down_timeout +EXPORT_SYMBOL vmlinux 0x19da47f6 __register_binfmt +EXPORT_SYMBOL vmlinux 0x1a0d2fe3 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x1a2808d6 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x1a2f6945 __next_cpu +EXPORT_SYMBOL vmlinux 0x1a33ab1a vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a54d44d boot_tvec_bases +EXPORT_SYMBOL vmlinux 0x1a91663d pasemi_dma_free_buf +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1ae81280 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b3e3aa6 inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x1b3f1779 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b80d583 scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x1b881203 blk_peek_request +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bb3f8ff kobject_add +EXPORT_SYMBOL vmlinux 0x1bb68c99 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0x1bc4ff03 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0x1bcbc3e6 set_anon_super +EXPORT_SYMBOL vmlinux 0x1bdba6fb jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x1bdd8c18 serio_reconnect +EXPORT_SYMBOL vmlinux 0x1be63769 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x1bfec830 __iounmap_at +EXPORT_SYMBOL vmlinux 0x1c13a14a mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x1c200a7d pasemi_dma_stop_chan +EXPORT_SYMBOL vmlinux 0x1c4a9347 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x1c4dab93 _lv1_connect_irq_plug +EXPORT_SYMBOL vmlinux 0x1c5b2c15 pmu_wait_complete +EXPORT_SYMBOL vmlinux 0x1c66904e pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x1c675298 input_free_device +EXPORT_SYMBOL vmlinux 0x1c80de9c ip_send_check +EXPORT_SYMBOL vmlinux 0x1ca6caaa generic_writepages +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1ce861f8 d_find_alias +EXPORT_SYMBOL vmlinux 0x1ced1326 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x1cfcfb1f vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x1d0f2a34 skb_split +EXPORT_SYMBOL vmlinux 0x1d11435b scm_detach_fds +EXPORT_SYMBOL vmlinux 0x1d114d27 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x1d18e850 pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d3eb65c security_d_instantiate +EXPORT_SYMBOL vmlinux 0x1d4750bc _lv1_stop_lpm +EXPORT_SYMBOL vmlinux 0x1d8588fd phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x1da1a9b1 pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x1dae6f53 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x1dbe4899 invalidate_bdev +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dcf6571 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1ddf86bd alloc_disk +EXPORT_SYMBOL vmlinux 0x1e0dc8d9 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x1e1cb773 llc_sap_find +EXPORT_SYMBOL vmlinux 0x1e2a73ac ps2_init +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1ea9aa18 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x1eab0c17 km_report +EXPORT_SYMBOL vmlinux 0x1ec9923b neigh_seq_start +EXPORT_SYMBOL vmlinux 0x1ed5bb22 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x1ed62fef sock_rfree +EXPORT_SYMBOL vmlinux 0x1ef59e1f key_revoke +EXPORT_SYMBOL vmlinux 0x1efc740f do_splice_to +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f04d20d __break_lease +EXPORT_SYMBOL vmlinux 0x1f2e2179 input_set_keycode +EXPORT_SYMBOL vmlinux 0x1f4ac4c9 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x1f5549cd up_write +EXPORT_SYMBOL vmlinux 0x1f6321c1 sock_no_accept +EXPORT_SYMBOL vmlinux 0x1fb5d520 seq_release +EXPORT_SYMBOL vmlinux 0x1fdb1fe1 nf_log_packet +EXPORT_SYMBOL vmlinux 0x1fe5162b mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x1fe7b4ab pasemi_write_dma_reg +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x1ff45a1a register_sysrq_key +EXPORT_SYMBOL vmlinux 0x1ffbd573 free_buffer_head +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x201494ee _lv1_net_set_interrupt_mask +EXPORT_SYMBOL vmlinux 0x2043e818 ida_destroy +EXPORT_SYMBOL vmlinux 0x206b8b60 dqput +EXPORT_SYMBOL vmlinux 0x20708efb bio_integrity_free +EXPORT_SYMBOL vmlinux 0x2070f4f3 __bforget +EXPORT_SYMBOL vmlinux 0x20936cc0 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x20b4e5bd blk_fetch_request +EXPORT_SYMBOL vmlinux 0x20ccdc4a tcp_child_process +EXPORT_SYMBOL vmlinux 0x20d8b61d i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x210dcc15 blk_insert_request +EXPORT_SYMBOL vmlinux 0x21114cfa blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x2112a4ba proc_dostring +EXPORT_SYMBOL vmlinux 0x213603bf pasemi_dma_free_ring +EXPORT_SYMBOL vmlinux 0x213b6c42 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x214483f1 security_path_link +EXPORT_SYMBOL vmlinux 0x21487f97 bdget +EXPORT_SYMBOL vmlinux 0x215dd1aa filp_open +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x21a7055d i2c_del_driver +EXPORT_SYMBOL vmlinux 0x21ac658b tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x21e5d200 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x21e699e5 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x21e92c79 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x21f91f6c revert_creds +EXPORT_SYMBOL vmlinux 0x2203ed68 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x2208323a sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x22246eed idr_find +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2235d6af xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x224a1d0b per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x224e0d2c mdio_bus_type +EXPORT_SYMBOL vmlinux 0x225c59cd macio_request_resource +EXPORT_SYMBOL vmlinux 0x225ebee6 _lv1_destruct_lpm +EXPORT_SYMBOL vmlinux 0x226dd166 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x228da600 kern_path +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22b6ac52 bio_integrity_split +EXPORT_SYMBOL vmlinux 0x22ca4cc3 dq_data_lock +EXPORT_SYMBOL vmlinux 0x22e2b9dc fb_set_cmap +EXPORT_SYMBOL vmlinux 0x23030821 __lock_buffer +EXPORT_SYMBOL vmlinux 0x230c3841 napi_gro_receive +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x23485e62 nf_reinject +EXPORT_SYMBOL vmlinux 0x236aa7ad pci_get_device +EXPORT_SYMBOL vmlinux 0x2377da25 ide_dma_off +EXPORT_SYMBOL vmlinux 0x238d34bf mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x23b7e521 genphy_config_advert +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x2430dc1e simple_set_mnt +EXPORT_SYMBOL vmlinux 0x244a2411 __first_cpu +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24623b0d tty_kref_put +EXPORT_SYMBOL vmlinux 0x247b1054 pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0x2485dda4 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x24cfd438 _lv1_copy_lpm_trace_buffer +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x25040784 generic_fillattr +EXPORT_SYMBOL vmlinux 0x25147501 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x2526c109 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x252c19e5 alloc_fcdev +EXPORT_SYMBOL vmlinux 0x25331818 ll_rw_block +EXPORT_SYMBOL vmlinux 0x2533f3d9 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x253d02af keyring_clear +EXPORT_SYMBOL vmlinux 0x2581543c complete +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x25860097 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x25b6b8f7 _lv1_set_spe_transition_notifier +EXPORT_SYMBOL vmlinux 0x25b929cd request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL vmlinux 0x25dd4be1 bioset_free +EXPORT_SYMBOL vmlinux 0x26477c07 __vmalloc +EXPORT_SYMBOL vmlinux 0x26670bf1 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26ab9cb2 read_cache_pages +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x27019467 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x271f4d2a finish_wait +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x2741967a __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x27646df3 start_thread +EXPORT_SYMBOL vmlinux 0x276dc732 of_phy_connect_fixed_link +EXPORT_SYMBOL vmlinux 0x27797507 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x2783b431 bh_submit_read +EXPORT_SYMBOL vmlinux 0x2784797f clocksource_register +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x2788e5dd __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27cdb3ef inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x27e93213 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x27fe63fa skb_store_bits +EXPORT_SYMBOL vmlinux 0x280ba336 d_validate +EXPORT_SYMBOL vmlinux 0x280c5dbd xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x280fc0da phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x28218f9f sock_sendmsg +EXPORT_SYMBOL vmlinux 0x28293dd3 ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x283615bd lro_receive_skb +EXPORT_SYMBOL vmlinux 0x28419785 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x284e23d0 scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x286b9fa1 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x2883d24f bmap +EXPORT_SYMBOL vmlinux 0x289bd467 unregister_cdrom +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28b3561c freeze_bdev +EXPORT_SYMBOL vmlinux 0x28c48944 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x28cf3e70 up +EXPORT_SYMBOL vmlinux 0x28df4aa4 simple_unlink +EXPORT_SYMBOL vmlinux 0x28ea79de register_netdev +EXPORT_SYMBOL vmlinux 0x28fd7fde tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0x29204590 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x292d3a12 sock_no_connect +EXPORT_SYMBOL vmlinux 0x293386d7 del_gendisk +EXPORT_SYMBOL vmlinux 0x294fe4cb of_get_mac_address +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x295c1b09 neigh_seq_next +EXPORT_SYMBOL vmlinux 0x295f7834 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x2960019b eeh_check_failure +EXPORT_SYMBOL vmlinux 0x296c3c1c blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x29766a93 down_killable +EXPORT_SYMBOL vmlinux 0x2983f117 matrox_millennium +EXPORT_SYMBOL vmlinux 0x2987d280 dev_alloc_name +EXPORT_SYMBOL vmlinux 0x299843aa eth_validate_addr +EXPORT_SYMBOL vmlinux 0x29acfaa3 journal_extend +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a089db5 pcim_iomap +EXPORT_SYMBOL vmlinux 0x2a16e6d0 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x2a184a6b dquot_commit +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a352bb4 nla_append +EXPORT_SYMBOL vmlinux 0x2a60d234 dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x2aa71a99 rtnl_notify +EXPORT_SYMBOL vmlinux 0x2ab42e23 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x2aebb5ae skb_under_panic +EXPORT_SYMBOL vmlinux 0x2af97659 register_con_driver +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b1a2550 thaw_process +EXPORT_SYMBOL vmlinux 0x2b50ce81 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x2b5e6c69 __any_online_cpu +EXPORT_SYMBOL vmlinux 0x2b6153d9 block_write_begin +EXPORT_SYMBOL vmlinux 0x2b7239de ps3_dma_region_free +EXPORT_SYMBOL vmlinux 0x2b975309 tcf_register_action +EXPORT_SYMBOL vmlinux 0x2b98e906 inet_put_port +EXPORT_SYMBOL vmlinux 0x2b9a61a5 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2ba8b646 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x2bb00349 genl_register_ops +EXPORT_SYMBOL vmlinux 0x2c1cd4a4 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x2c3733ff tcf_hash_check +EXPORT_SYMBOL vmlinux 0x2c49e2dd jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0x2c4c7997 _lv1_construct_lpm +EXPORT_SYMBOL vmlinux 0x2c57a871 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0x2c930fe3 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x2cbc1dc9 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x2cc226c1 tcf_em_register +EXPORT_SYMBOL vmlinux 0x2cc46896 get_super +EXPORT_SYMBOL vmlinux 0x2ce03d60 do_sync_read +EXPORT_SYMBOL vmlinux 0x2ce29b57 bd_release +EXPORT_SYMBOL vmlinux 0x2ceb1073 simple_fsync +EXPORT_SYMBOL vmlinux 0x2cec6dd7 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x2cfecc94 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x2d0367c4 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x2d13b32e unregister_qdisc +EXPORT_SYMBOL vmlinux 0x2d2632bc scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x2d7d2767 _lv1_set_lpm_group_control +EXPORT_SYMBOL vmlinux 0x2d7d2fe1 in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2db0f183 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x2dbafbe3 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0x2e1bef92 eeh_subsystem_enabled +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e35365e dev_unicast_add +EXPORT_SYMBOL vmlinux 0x2e36a480 pci_disable_msi +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e85c8ac ps3_sb_event_receive_port_setup +EXPORT_SYMBOL vmlinux 0x2e93495e _lv1_write_htab_entry +EXPORT_SYMBOL vmlinux 0x2e9fd7c6 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x2ecb21da mpage_readpage +EXPORT_SYMBOL vmlinux 0x2ee4337f smu_queue_cmd +EXPORT_SYMBOL vmlinux 0x2ef0b3fc pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x2ef2b718 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x2efe7eb1 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x2f1874ff proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x2f1c5539 udp_disconnect +EXPORT_SYMBOL vmlinux 0x2f284949 kill_litter_super +EXPORT_SYMBOL vmlinux 0x2f287f0d copy_to_user +EXPORT_SYMBOL vmlinux 0x2f45048b mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x2f5dff7c find_get_page +EXPORT_SYMBOL vmlinux 0x2f6a1013 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x2f993581 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x2fb1f05b genphy_suspend +EXPORT_SYMBOL vmlinux 0x2fcf2159 sync_blockdev +EXPORT_SYMBOL vmlinux 0x2fd178a9 nf_log_register +EXPORT_SYMBOL vmlinux 0x2fd2a9b6 journal_restart +EXPORT_SYMBOL vmlinux 0x303352e2 pci_clear_master +EXPORT_SYMBOL vmlinux 0x30567128 matrox_mystique +EXPORT_SYMBOL vmlinux 0x30647b4b unregister_console +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x309aec91 of_release_dev +EXPORT_SYMBOL vmlinux 0x30acf306 d_alloc +EXPORT_SYMBOL vmlinux 0x30d69125 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x310412b0 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x312cfaf2 _lv1_disable_logical_spe +EXPORT_SYMBOL vmlinux 0x313c3263 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x31448a4a mempool_create_node +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x31786f8d pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x31911ef2 jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x3192917c proc_symlink +EXPORT_SYMBOL vmlinux 0x31a06f3c serio_close +EXPORT_SYMBOL vmlinux 0x31b7f300 _lv1_set_lpm_signal +EXPORT_SYMBOL vmlinux 0x31cd509a _lv1_net_control +EXPORT_SYMBOL vmlinux 0x32031377 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0x3227c12a swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0x32289381 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x32346f5f skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x323f9c73 sk_release_kernel +EXPORT_SYMBOL vmlinux 0x3240cf05 pci_request_region +EXPORT_SYMBOL vmlinux 0x3249bc6c bio_add_page +EXPORT_SYMBOL vmlinux 0x326be370 ilookup +EXPORT_SYMBOL vmlinux 0x327b9c1b pmu_poll_adb +EXPORT_SYMBOL vmlinux 0x327eeec0 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x328fe23d pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x329224cf pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x3295a4df scsi_print_sense +EXPORT_SYMBOL vmlinux 0x32da26cb input_register_handle +EXPORT_SYMBOL vmlinux 0x32ffa083 phy_driver_register +EXPORT_SYMBOL vmlinux 0x3324642e textsearch_unregister +EXPORT_SYMBOL vmlinux 0x3332d0a6 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x33496a15 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x336b61fe alloc_pages_current +EXPORT_SYMBOL vmlinux 0x3398f798 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x339d4841 prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x33b3949a add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x33ca6e93 scsi_remove_host +EXPORT_SYMBOL vmlinux 0x33ccc474 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x33d2b67a unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x33f3565a input_unregister_handle +EXPORT_SYMBOL vmlinux 0x34233454 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x34308636 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x3433b6cc arp_xmit +EXPORT_SYMBOL vmlinux 0x344adbd5 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x347b27f3 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a0b045 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x34a5f322 of_get_gpio_flags +EXPORT_SYMBOL vmlinux 0x34ad9b45 __breadahead +EXPORT_SYMBOL vmlinux 0x34c33f50 find_inode_number +EXPORT_SYMBOL vmlinux 0x34d5e41e scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x34ef788b hippi_mac_addr +EXPORT_SYMBOL vmlinux 0x34f94dcc kobject_put +EXPORT_SYMBOL vmlinux 0x35031f6c matroxfb_DAC_in +EXPORT_SYMBOL vmlinux 0x35072804 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x35185fa4 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x3518aa19 bio_free +EXPORT_SYMBOL vmlinux 0x35213682 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x354bfdf6 flush_icache_user_range +EXPORT_SYMBOL vmlinux 0x35510588 of_node_put +EXPORT_SYMBOL vmlinux 0x355c772f pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0x3573f697 ide_set_handler +EXPORT_SYMBOL vmlinux 0x3585b3fe tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35b3b1f6 module_put +EXPORT_SYMBOL vmlinux 0x35bac4f5 aio_put_req +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35db1d4e lock_super +EXPORT_SYMBOL vmlinux 0x35e8fb2f ida_get_new +EXPORT_SYMBOL vmlinux 0x35f994d0 set_groups +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x36261f11 __kill_fasync +EXPORT_SYMBOL vmlinux 0x3646854e generic_make_request +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x366fa48d xfrm_state_add +EXPORT_SYMBOL vmlinux 0x367cca8d n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x368d3842 page_put_link +EXPORT_SYMBOL vmlinux 0x3696aadd tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0x369dea27 sock_init_data +EXPORT_SYMBOL vmlinux 0x3706e529 inode_setattr +EXPORT_SYMBOL vmlinux 0x37171535 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x371902e9 _lv1_get_lpm_interrupt_status +EXPORT_SYMBOL vmlinux 0x371d2130 check_legacy_ioport +EXPORT_SYMBOL vmlinux 0x372e9960 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x37383edd rtas_get_power_level +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374e67f0 ___pskb_trim +EXPORT_SYMBOL vmlinux 0x37541e6b vio_register_driver +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x37690254 netlink_unicast +EXPORT_SYMBOL vmlinux 0x376f20fc unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x3780c772 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x3782f82c filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x37a76fc8 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x37a79c5d scsi_print_command +EXPORT_SYMBOL vmlinux 0x37a9798f mempool_free +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37db932c km_policy_expired +EXPORT_SYMBOL vmlinux 0x37dc5308 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x37e988ef skb_dequeue +EXPORT_SYMBOL vmlinux 0x38023d19 sg_init_one +EXPORT_SYMBOL vmlinux 0x3809dfe1 mutex_trylock +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381031e0 netpoll_print_options +EXPORT_SYMBOL vmlinux 0x3820a7ce inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x382777ab _lv1_gpu_context_allocate +EXPORT_SYMBOL vmlinux 0x382b680b pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x3839d363 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x3851228e cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0x38697d0d blkdev_get +EXPORT_SYMBOL vmlinux 0x388959b5 _lv1_net_stop_tx_dma +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38a01cb7 register_nls +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cd3800 vfs_write +EXPORT_SYMBOL vmlinux 0x38d8d41e current_fs_time +EXPORT_SYMBOL vmlinux 0x38dca29a jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x38e3ad5c tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x38fb9933 tty_std_termios +EXPORT_SYMBOL vmlinux 0x3906b93c _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x390f5d68 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x3922d605 _spin_trylock +EXPORT_SYMBOL vmlinux 0x392735bc set_disk_ro +EXPORT_SYMBOL vmlinux 0x396d09f3 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x398c7f81 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x398fc1da ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x39a61542 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39ca9d24 DAC1064_global_restore +EXPORT_SYMBOL vmlinux 0x39e63754 skb_gso_segment +EXPORT_SYMBOL vmlinux 0x39eddf23 eth_header +EXPORT_SYMBOL vmlinux 0x3a185930 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a271295 gen_pool_add +EXPORT_SYMBOL vmlinux 0x3a2cbd00 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x3a593cf6 put_io_context +EXPORT_SYMBOL vmlinux 0x3a7f3f9e dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3ac1bff3 tcp_disconnect +EXPORT_SYMBOL vmlinux 0x3ad70c0c devm_ioremap_prot +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af859f6 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x3b1d75d3 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b3bad64 journal_start +EXPORT_SYMBOL vmlinux 0x3b479c3c journal_init_dev +EXPORT_SYMBOL vmlinux 0x3b5681b7 input_filter_device +EXPORT_SYMBOL vmlinux 0x3b762b33 swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x3b7a0758 ide_proc_register_driver +EXPORT_SYMBOL vmlinux 0x3ba5155b cfb_imageblit +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3bf71be0 genl_sock +EXPORT_SYMBOL vmlinux 0x3c01f390 fb_pan_display +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c468ee3 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0x3c509564 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x3c5a4ec7 brioctl_set +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ccfecd2 f_setown +EXPORT_SYMBOL vmlinux 0x3cd9bb76 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cf00d0b generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x3d0ae762 set_blocksize +EXPORT_SYMBOL vmlinux 0x3d2d556f sysctl_intvec +EXPORT_SYMBOL vmlinux 0x3d40f2bd arp_find +EXPORT_SYMBOL vmlinux 0x3d54ac01 _lv1_net_stop_rx_dma +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3d888f10 simple_link +EXPORT_SYMBOL vmlinux 0x3d98549a tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x3d9cd78b seq_lseek +EXPORT_SYMBOL vmlinux 0x3db05771 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3dd8ab99 swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x3e0e53d0 vfs_link +EXPORT_SYMBOL vmlinux 0x3e286dca _lv1_get_rtc +EXPORT_SYMBOL vmlinux 0x3e307b0b commit_creds +EXPORT_SYMBOL vmlinux 0x3e309a66 input_allocate_device +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e584823 cdrom_open +EXPORT_SYMBOL vmlinux 0x3e62591d phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f06a656 _lv1_construct_event_receive_port +EXPORT_SYMBOL vmlinux 0x3f09efd1 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x3f1eb4dd cdev_add +EXPORT_SYMBOL vmlinux 0x3f2851c1 dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x3f37c401 scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x3f3b1447 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x3f406a3b enable_kernel_altivec +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f59f3c0 add_disk +EXPORT_SYMBOL vmlinux 0x3f93c04a udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x3fa03a97 memset +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3fbd50d1 __destroy_inode +EXPORT_SYMBOL vmlinux 0x3fbfd6ed _lv1_gpu_open +EXPORT_SYMBOL vmlinux 0x3fd78f81 keyring_search +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x401cd534 of_find_i2c_device_by_node +EXPORT_SYMBOL vmlinux 0x40216c2c pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x402e8486 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x402f3968 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x405031a2 pci_get_subsys +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4061fe44 blk_complete_request +EXPORT_SYMBOL vmlinux 0x406320d7 dev_change_flags +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40b96278 validate_sp +EXPORT_SYMBOL vmlinux 0x4101a975 ide_fixstring +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4107a8ec vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41361807 _lv1_get_logical_ppe_id +EXPORT_SYMBOL vmlinux 0x41411330 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x4147fcdf __bread +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x415714b6 down_read +EXPORT_SYMBOL vmlinux 0x4167f66b of_register_i2c_devices +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x416e9a92 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x418c09b1 prepare_binprm +EXPORT_SYMBOL vmlinux 0x41dbf4de _lv1_start_lpm +EXPORT_SYMBOL vmlinux 0x4204e22c blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x42347de1 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4250f1a1 __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x429328d9 _spin_lock +EXPORT_SYMBOL vmlinux 0x42a3ff28 idr_get_new_above +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42b68ba3 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x42dbe084 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x42e17846 journal_load +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x430958c5 ps3_dma_region_create +EXPORT_SYMBOL vmlinux 0x43168873 fd_install +EXPORT_SYMBOL vmlinux 0x432802c6 free_task +EXPORT_SYMBOL vmlinux 0x432a65e0 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x4339293e sk_common_release +EXPORT_SYMBOL vmlinux 0x434db988 seq_release_private +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4353a169 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x437301da skb_copy_bits +EXPORT_SYMBOL vmlinux 0x439c059a iput +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x4444eb33 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x444a7539 tty_vhangup +EXPORT_SYMBOL vmlinux 0x445a5fc6 simple_lookup +EXPORT_SYMBOL vmlinux 0x445b8e77 end_page_writeback +EXPORT_SYMBOL vmlinux 0x44758177 of_iomap +EXPORT_SYMBOL vmlinux 0x447c15db tcf_exts_change +EXPORT_SYMBOL vmlinux 0x448931a7 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x448d60de __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x44951131 ps2_drain +EXPORT_SYMBOL vmlinux 0x44b0d2fa inode_get_bytes +EXPORT_SYMBOL vmlinux 0x44b787cb km_state_expired +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44bca288 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x44d12b87 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44f3533a security_task_getsecid +EXPORT_SYMBOL vmlinux 0x4527883a generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x452dd269 serio_interrupt +EXPORT_SYMBOL vmlinux 0x453153fe jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x45412c99 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0x454cc403 I_BDEV +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x4564459b _lv1_set_virtual_uart_param +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x459999d1 seq_escape +EXPORT_SYMBOL vmlinux 0x45a55ec8 __iounmap +EXPORT_SYMBOL vmlinux 0x45c46f60 napi_frags_finish +EXPORT_SYMBOL vmlinux 0x45cfe80b pasemi_dma_free_flag +EXPORT_SYMBOL vmlinux 0x45d84fce filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x461db055 matroxfb_DAC_out +EXPORT_SYMBOL vmlinux 0x461ebfa0 __copy_tofrom_user +EXPORT_SYMBOL vmlinux 0x46202796 module_refcount +EXPORT_SYMBOL vmlinux 0x462497d9 of_register_driver +EXPORT_SYMBOL vmlinux 0x4632528c i2c_clients_command +EXPORT_SYMBOL vmlinux 0x465f4e12 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x4679786d inode_set_bytes +EXPORT_SYMBOL vmlinux 0x46bb1051 ps3_dma_region_init +EXPORT_SYMBOL vmlinux 0x46d52723 udp_prot +EXPORT_SYMBOL vmlinux 0x46d86884 tcp_poll +EXPORT_SYMBOL vmlinux 0x46e83c2e blk_start_request +EXPORT_SYMBOL vmlinux 0x47068269 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x47247405 rtas +EXPORT_SYMBOL vmlinux 0x472d4dfa inet_frag_find +EXPORT_SYMBOL vmlinux 0x4733e8d0 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47e93b15 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x47fe149b neigh_create +EXPORT_SYMBOL vmlinux 0x480ab42a __next_cpu_nr +EXPORT_SYMBOL vmlinux 0x4833bfb8 ide_do_reset +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x487cf71d alloc_file +EXPORT_SYMBOL vmlinux 0x4881efab pmac_get_partition +EXPORT_SYMBOL vmlinux 0x48bc2ef0 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x48c1d080 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x48c8543b fb_blank +EXPORT_SYMBOL vmlinux 0x48c92d3f d_alloc_root +EXPORT_SYMBOL vmlinux 0x48c9c778 simple_fill_super +EXPORT_SYMBOL vmlinux 0x48da0f81 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x48ef64f9 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x491c31c2 page_readlink +EXPORT_SYMBOL vmlinux 0x4939b056 lock_may_write +EXPORT_SYMBOL vmlinux 0x495ec6eb pasemi_dma_alloc_buf +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x4960fbae splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x4977e37f tc_classify_compat +EXPORT_SYMBOL vmlinux 0x498c2c94 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x4994f94e sock_i_ino +EXPORT_SYMBOL vmlinux 0x49a8cbaf i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x49afd275 bio_sector_offset +EXPORT_SYMBOL vmlinux 0x49d75c26 set_irq_chip +EXPORT_SYMBOL vmlinux 0x49db08fc vio_get_attribute +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49ee8fc3 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x4a0726b9 tty_port_init +EXPORT_SYMBOL vmlinux 0x4a105639 matroxfb_enable_irq +EXPORT_SYMBOL vmlinux 0x4a172097 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x4a2a5033 alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a59688d __scsi_put_command +EXPORT_SYMBOL vmlinux 0x4a6338b9 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x4a685f09 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x4a6f1feb dquot_alloc +EXPORT_SYMBOL vmlinux 0x4a8702be panic_notifier_list +EXPORT_SYMBOL vmlinux 0x4aa61ba3 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x4ab9566a proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x4abd559e unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x4ac563c4 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x4ac64da4 _lv1_select_virtual_address_space +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4aec0194 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b17de47 _read_lock_bh +EXPORT_SYMBOL vmlinux 0x4b1ec628 cdev_alloc +EXPORT_SYMBOL vmlinux 0x4b23df86 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x4b2fd19e module_layout +EXPORT_SYMBOL vmlinux 0x4b3cb349 _lv1_destruct_io_irq_outlet +EXPORT_SYMBOL vmlinux 0x4b65a3dc tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x4b6fcddc _lv1_set_spe_interrupt_mask +EXPORT_SYMBOL vmlinux 0x4b8e7c0b textsearch_register +EXPORT_SYMBOL vmlinux 0x4bb3f0a8 audit_log_end +EXPORT_SYMBOL vmlinux 0x4bb58843 phy_attach +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bcc3381 dst_destroy +EXPORT_SYMBOL vmlinux 0x4be31b99 flush_signals +EXPORT_SYMBOL vmlinux 0x4bf2e782 dma_pool_create +EXPORT_SYMBOL vmlinux 0x4bfd8815 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c3d00d7 vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c686093 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x4ca30b28 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x4cab8e80 vio_enable_interrupts +EXPORT_SYMBOL vmlinux 0x4cabf18e skb_checksum_help +EXPORT_SYMBOL vmlinux 0x4cb0619d pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cd34a9b vfsmount_lock +EXPORT_SYMBOL vmlinux 0x4ceeeca5 phy_attach_direct +EXPORT_SYMBOL vmlinux 0x4cf76674 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x4d2a5c19 rwsem_wake +EXPORT_SYMBOL vmlinux 0x4d32d9a0 d_add_ci +EXPORT_SYMBOL vmlinux 0x4db2518a unregister_key_type +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dd3a747 security_file_permission +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e10cfde neigh_lookup +EXPORT_SYMBOL vmlinux 0x4e19c871 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e41302e hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0x4e5c96dd i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e75486e vfs_mkdir +EXPORT_SYMBOL vmlinux 0x4e76d981 override_creds +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4ea80b99 vio_find_node +EXPORT_SYMBOL vmlinux 0x4eb13aae of_mm_gpiochip_add +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4ee31195 d_lookup +EXPORT_SYMBOL vmlinux 0x4eed0bee pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x4ef69997 dma_iommu_ops +EXPORT_SYMBOL vmlinux 0x4f664db6 _lv1_insert_htab_entry +EXPORT_SYMBOL vmlinux 0x4fe43993 init_file +EXPORT_SYMBOL vmlinux 0x4ff75c5e tty_throttle +EXPORT_SYMBOL vmlinux 0x5017bae4 read_cache_page_async +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x50946acc framebuffer_release +EXPORT_SYMBOL vmlinux 0x50a3820e check_disk_change +EXPORT_SYMBOL vmlinux 0x50a52112 pci_match_id +EXPORT_SYMBOL vmlinux 0x50ae3c54 _lv1_gpu_attribute +EXPORT_SYMBOL vmlinux 0x50b15c53 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50f5da06 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x50f877d3 of_platform_bus_type +EXPORT_SYMBOL vmlinux 0x50fed6f7 proc_ide_read_geometry +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x512daa25 scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x512fc9fa __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x513957e9 vfs_symlink +EXPORT_SYMBOL vmlinux 0x513c8b0f skb_make_writable +EXPORT_SYMBOL vmlinux 0x516330cb dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x51863af9 ipv4_specific +EXPORT_SYMBOL vmlinux 0x519b2371 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x51a25c69 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x51a4b65c rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x51bc076c bio_endio +EXPORT_SYMBOL vmlinux 0x51bd699f kernel_listen +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51e96296 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52028b3a generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x52400106 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x524093c8 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x525c05ea vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x52615b6a pcibios_fixup_bus +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x527830ff pmac_xpram_read +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52a6715f pci_release_region +EXPORT_SYMBOL vmlinux 0x52b81320 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x52c04082 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x52cc92fc proto_register +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52df830e vfs_mknod +EXPORT_SYMBOL vmlinux 0x52e3fa05 _lv1_allocate_memory +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x52f668d9 journal_forget +EXPORT_SYMBOL vmlinux 0x52fc6587 file_fsync +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x53119da8 journal_lock_updates +EXPORT_SYMBOL vmlinux 0x5315f750 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x5324db4c jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x532c6e0d fetch_dev_dn +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x5339f5f8 _lv1_read_virtual_uart +EXPORT_SYMBOL vmlinux 0x534dbe61 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x536fbf3b generic_read_dir +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x5387dc36 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53d91e59 _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x53ea4ebd generic_show_options +EXPORT_SYMBOL vmlinux 0x53ebab1b _outsl_ns +EXPORT_SYMBOL vmlinux 0x53f17fed ether_setup +EXPORT_SYMBOL vmlinux 0x541a9384 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54470367 down +EXPORT_SYMBOL vmlinux 0x545118b9 get_sb_single +EXPORT_SYMBOL vmlinux 0x54664ac4 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x546873c6 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0x5478d018 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x548f6b16 copy_4K_page +EXPORT_SYMBOL vmlinux 0x5494c466 scsi_block_requests +EXPORT_SYMBOL vmlinux 0x54bf8421 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x54c6479c __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x54defdf8 udp_proc_register +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54fdfef1 of_get_address +EXPORT_SYMBOL vmlinux 0x550453d9 sys_copyarea +EXPORT_SYMBOL vmlinux 0x5507c373 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x5516a4e4 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x551d7822 pci_get_class +EXPORT_SYMBOL vmlinux 0x55780b27 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x557b3dd8 _lv1_gpu_close +EXPORT_SYMBOL vmlinux 0x5587a931 bio_put +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x559b79e2 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x55ad1ab2 pci_iounmap +EXPORT_SYMBOL vmlinux 0x55dc2f6f try_to_release_page +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cb01 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x560dab0c unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5626f896 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x562a5a2d update_region +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x564fff24 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x565d1de2 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x56686570 nonseekable_open +EXPORT_SYMBOL vmlinux 0x567af433 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0x568804ee _lv1_destruct_event_receive_port +EXPORT_SYMBOL vmlinux 0x56938119 phys_mem_access_prot +EXPORT_SYMBOL vmlinux 0x56a10763 csum_tcpudp_magic +EXPORT_SYMBOL vmlinux 0x56b36dca unregister_binfmt +EXPORT_SYMBOL vmlinux 0x56b8d529 d_path +EXPORT_SYMBOL vmlinux 0x56c2b95b rtas_progress +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56ca90d2 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x570d7279 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x573d69d0 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x5749247c tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x578b6161 vfs_readv +EXPORT_SYMBOL vmlinux 0x579bab50 _lv1_gpu_memory_free +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57c0eb7b pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x58129dde blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x5830ada5 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x58468f56 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0x584df163 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x58586eca mach_powermac +EXPORT_SYMBOL vmlinux 0x585f32c2 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x58683d9c alloc_fddidev +EXPORT_SYMBOL vmlinux 0x58697154 is_bad_inode +EXPORT_SYMBOL vmlinux 0x586b609a vfs_lstat +EXPORT_SYMBOL vmlinux 0x5878fb55 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x588157e5 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c18ee4 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x58ce2d84 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x58ee6b7b of_node_get +EXPORT_SYMBOL vmlinux 0x592b2263 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x595d0946 empty_zero_page +EXPORT_SYMBOL vmlinux 0x597a2cd1 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0x59853856 mach_pasemi +EXPORT_SYMBOL vmlinux 0x598e4bf5 block_write_end +EXPORT_SYMBOL vmlinux 0x5999f228 pskb_copy +EXPORT_SYMBOL vmlinux 0x599c17a6 __nla_put +EXPORT_SYMBOL vmlinux 0x59ad1426 unlock_page +EXPORT_SYMBOL vmlinux 0x59bd7243 give_up_console +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59fa1a10 compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x5a345ddc scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a578f7f sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a82d66e key_alloc +EXPORT_SYMBOL vmlinux 0x5a9dd26c __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x5a9ebb31 vfs_rename +EXPORT_SYMBOL vmlinux 0x5ad109fe get_disk +EXPORT_SYMBOL vmlinux 0x5aec9d50 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x5b21da32 __scm_destroy +EXPORT_SYMBOL vmlinux 0x5b2ac650 del_timer_sync +EXPORT_SYMBOL vmlinux 0x5b3491ed key_put +EXPORT_SYMBOL vmlinux 0x5b3e441f tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x5b43f1f1 rtas_service_present +EXPORT_SYMBOL vmlinux 0x5b4a8d57 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x5b700dde mpage_writepage +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5bc16b8a inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x5bcd6501 tty_port_close_end +EXPORT_SYMBOL vmlinux 0x5bd955e1 security_path_mkdir +EXPORT_SYMBOL vmlinux 0x5bdf9d11 devm_free_irq +EXPORT_SYMBOL vmlinux 0x5c0ddad4 install_exec_creds +EXPORT_SYMBOL vmlinux 0x5c13ccf2 generic_ide_ioctl +EXPORT_SYMBOL vmlinux 0x5c3700c8 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x5c4f629b rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x5c58daeb posix_test_lock +EXPORT_SYMBOL vmlinux 0x5c880276 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x5ca22aa8 kobject_set_name +EXPORT_SYMBOL vmlinux 0x5cb27079 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0x5cb7a0e1 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x5cc5b658 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5cc9b585 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x5ccc9045 _lv1_close_device +EXPORT_SYMBOL vmlinux 0x5cce71be blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0x5ce6801e fb_get_mode +EXPORT_SYMBOL vmlinux 0x5cf30e10 __debugger_ipi +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d4c9472 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x5d6b69a7 iget_locked +EXPORT_SYMBOL vmlinux 0x5dbbe98e memmove +EXPORT_SYMBOL vmlinux 0x5dd39cfd vfs_fstatat +EXPORT_SYMBOL vmlinux 0x5e1875fd wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x5e1c8e00 journal_dirty_data +EXPORT_SYMBOL vmlinux 0x5e662ba8 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x5e8ad293 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x5e92427c dquot_drop +EXPORT_SYMBOL vmlinux 0x5e93eed5 unregister_filesystem +EXPORT_SYMBOL vmlinux 0x5e94bc22 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea01912 compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x5ea03aa2 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ece211c idr_replace +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5ee28746 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0x5ee43dda xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x5ee51723 skb_copy_expand +EXPORT_SYMBOL vmlinux 0x5ef682c0 vfs_llseek +EXPORT_SYMBOL vmlinux 0x5f0c5570 cond_resched_lock +EXPORT_SYMBOL vmlinux 0x5f111d0e default_llseek +EXPORT_SYMBOL vmlinux 0x5f280cc6 wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x5f3c357f send_sig +EXPORT_SYMBOL vmlinux 0x5f6d7a2e netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x5f6f0d20 __blk_end_request +EXPORT_SYMBOL vmlinux 0x5f7d5460 key_link +EXPORT_SYMBOL vmlinux 0x5f8a260c fsync_bdev +EXPORT_SYMBOL vmlinux 0x5f8a2728 isa_io_base +EXPORT_SYMBOL vmlinux 0x5f971760 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0x5fabe2a6 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x5fd90cff tcf_action_exec +EXPORT_SYMBOL vmlinux 0x5fed7605 poll_initwait +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x6013cbe0 swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0x601414a8 inet_csk_accept +EXPORT_SYMBOL vmlinux 0x60210009 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x6023a8ab jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x60273e4e bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x60405bfc skb_trim +EXPORT_SYMBOL vmlinux 0x604b7750 user_path_at +EXPORT_SYMBOL vmlinux 0x60569b8e pci_select_bars +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x6067a146 memcpy +EXPORT_SYMBOL vmlinux 0x607bb2f3 of_platform_bus_probe +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60b561cf of_dev_get +EXPORT_SYMBOL vmlinux 0x60b59af3 set_security_override +EXPORT_SYMBOL vmlinux 0x60b6e8b0 sk_dst_check +EXPORT_SYMBOL vmlinux 0x60c3f558 dquot_commit_info +EXPORT_SYMBOL vmlinux 0x60dcdb53 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x60fcdfd1 elv_queue_empty +EXPORT_SYMBOL vmlinux 0x611d1fcb add_timer +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x613396f7 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x61409d11 bdev_read_only +EXPORT_SYMBOL vmlinux 0x615471c4 mod_timer_pending +EXPORT_SYMBOL vmlinux 0x61601ff9 i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61a4487c _lv1_gpu_device_unmap +EXPORT_SYMBOL vmlinux 0x61a4f3f7 seq_open +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61cd7d8a drop_super +EXPORT_SYMBOL vmlinux 0x61dcdcd3 _lv1_pause +EXPORT_SYMBOL vmlinux 0x61eef2c9 _insb +EXPORT_SYMBOL vmlinux 0x6207dee0 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x6220b988 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0x62316e11 dquot_destroy +EXPORT_SYMBOL vmlinux 0x62393b65 pmac_register_agp_pm +EXPORT_SYMBOL vmlinux 0x623ac9af pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x6240ae25 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x624178ce rtnl_create_link +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x629a399b scsi_dma_map +EXPORT_SYMBOL vmlinux 0x62c53d6d input_event +EXPORT_SYMBOL vmlinux 0x62d2ef1c ide_complete_rq +EXPORT_SYMBOL vmlinux 0x62e7911e kmem_cache_free +EXPORT_SYMBOL vmlinux 0x63501487 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x6360d639 cpu_all_bits +EXPORT_SYMBOL vmlinux 0x63649524 names_cachep +EXPORT_SYMBOL vmlinux 0x638c172e vfs_fstat +EXPORT_SYMBOL vmlinux 0x639cf202 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x63b97e65 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x63bf30ec ppc_md +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63f75920 _lv1_construct_virtual_address_space +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x64324b7e of_device_is_available +EXPORT_SYMBOL vmlinux 0x6438229f bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x643a8cfe bdi_unregister +EXPORT_SYMBOL vmlinux 0x644c5d39 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x6452b30c blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x6456b62b sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x645bce08 netlink_ack +EXPORT_SYMBOL vmlinux 0x646cc6ab pmu_poll +EXPORT_SYMBOL vmlinux 0x6491b2f2 __nla_reserve +EXPORT_SYMBOL vmlinux 0x6495a351 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64b345c0 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x64deb80c invalidate_partition +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x659529f0 tcf_hash_search +EXPORT_SYMBOL vmlinux 0x65a5950d input_unregister_device +EXPORT_SYMBOL vmlinux 0x65ba59bb nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x65f4af5f prepare_to_wait +EXPORT_SYMBOL vmlinux 0x6607ad56 request_key +EXPORT_SYMBOL vmlinux 0x660a6402 of_scan_pci_bridge +EXPORT_SYMBOL vmlinux 0x6635d56f textsearch_prepare +EXPORT_SYMBOL vmlinux 0x6658b426 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x66602780 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66982c97 journal_stop +EXPORT_SYMBOL vmlinux 0x66ad1cb3 _lv1_set_lpm_general_control +EXPORT_SYMBOL vmlinux 0x66bcaba6 __alloc_skb +EXPORT_SYMBOL vmlinux 0x66c39759 journal_create +EXPORT_SYMBOL vmlinux 0x66cbf14b pmac_xpram_write +EXPORT_SYMBOL vmlinux 0x66fecaf0 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x670c968c ip_dev_find +EXPORT_SYMBOL vmlinux 0x671f2a08 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x674262d1 pcibus_to_node +EXPORT_SYMBOL vmlinux 0x676decba journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x676e3291 down_write +EXPORT_SYMBOL vmlinux 0x678979fb load_nls_default +EXPORT_SYMBOL vmlinux 0x6794edf4 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x6798f380 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x67d8acdd sock_no_bind +EXPORT_SYMBOL vmlinux 0x67eff190 init_special_inode +EXPORT_SYMBOL vmlinux 0x67f3ab2d scsi_register_interface +EXPORT_SYMBOL vmlinux 0x67fdecfe find_lock_page +EXPORT_SYMBOL vmlinux 0x68172049 find_or_create_page +EXPORT_SYMBOL vmlinux 0x681a153d dput +EXPORT_SYMBOL vmlinux 0x684e53ca pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x685fd09c cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x68628e77 _write_lock_bh +EXPORT_SYMBOL vmlinux 0x686f764d free_netdev +EXPORT_SYMBOL vmlinux 0x688594c0 blkdev_put +EXPORT_SYMBOL vmlinux 0x68a0ba8d simple_empty +EXPORT_SYMBOL vmlinux 0x68a87e35 of_dev_put +EXPORT_SYMBOL vmlinux 0x68e1ef51 smu_present +EXPORT_SYMBOL vmlinux 0x68e850c1 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x68f38d7e dev_mc_sync +EXPORT_SYMBOL vmlinux 0x690da496 ida_init +EXPORT_SYMBOL vmlinux 0x693376a4 input_open_device +EXPORT_SYMBOL vmlinux 0x6934ccd5 dentry_unhash +EXPORT_SYMBOL vmlinux 0x6944d933 kthread_create +EXPORT_SYMBOL vmlinux 0x696754db qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x6989875b add_wait_queue +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x699764dd generic_listxattr +EXPORT_SYMBOL vmlinux 0x699ccbf8 _lv1_deconfigure_virtual_uart_irq +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69a49ae2 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x69b4208d complete_and_exit +EXPORT_SYMBOL vmlinux 0x69c3c7e7 i2c_use_client +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69e8c308 misc_deregister +EXPORT_SYMBOL vmlinux 0x69f32610 __cputime_msec_factor +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a202216 scsi_init_io +EXPORT_SYMBOL vmlinux 0x6a2290a7 of_gpio_simple_xlate +EXPORT_SYMBOL vmlinux 0x6a2f7a8c bio_copy_kern +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a61f874 to_tm +EXPORT_SYMBOL vmlinux 0x6a740f94 eth_type_trans +EXPORT_SYMBOL vmlinux 0x6a8000f8 dev_get_flags +EXPORT_SYMBOL vmlinux 0x6a806422 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x6a9541a7 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x6ab7d26a scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6aef8057 nla_put +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2580e1 vfs_fsync +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b31c144 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x6b32e8d1 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x6b387694 _lv1_end_of_interrupt_ext +EXPORT_SYMBOL vmlinux 0x6b4b9bfa bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b589a6e _lv1_net_add_multicast_address +EXPORT_SYMBOL vmlinux 0x6b5dfe73 __debugger_bpt +EXPORT_SYMBOL vmlinux 0x6b6f0c4b _lv1_create_repository_node +EXPORT_SYMBOL vmlinux 0x6b90a29c skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6c5bcb75 pid_task +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c7a9c2c inet_bind +EXPORT_SYMBOL vmlinux 0x6c88e9ed clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x6c9fd566 do_truncate +EXPORT_SYMBOL vmlinux 0x6ca637d2 blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x6cbf2baf tcp_prot +EXPORT_SYMBOL vmlinux 0x6d1743eb _lv1_get_total_execution_time +EXPORT_SYMBOL vmlinux 0x6d1f0ea4 matroxfb_g450_setpll_cond +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d327435 km_state_notify +EXPORT_SYMBOL vmlinux 0x6d515618 cfb_fillrect +EXPORT_SYMBOL vmlinux 0x6d625f3b rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d7097c2 macio_dev_put +EXPORT_SYMBOL vmlinux 0x6d98991e __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x6d9d5e8c ip_fragment +EXPORT_SYMBOL vmlinux 0x6da928f4 _insw_ns +EXPORT_SYMBOL vmlinux 0x6db90642 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x6dc3f270 dquot_free_space +EXPORT_SYMBOL vmlinux 0x6dd0f445 register_framebuffer +EXPORT_SYMBOL vmlinux 0x6de1c2e3 dma_pool_free +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e15db0b fb_show_logo +EXPORT_SYMBOL vmlinux 0x6e1903d4 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x6e365438 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x6e562339 phy_device_create +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9d6ebd sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6eaeadd8 skb_find_text +EXPORT_SYMBOL vmlinux 0x6eec71d5 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x6eff77c7 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x6f3d69a2 dev_addr_add +EXPORT_SYMBOL vmlinux 0x6f4bb72f generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x6f549a0f splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x6f709344 nobh_write_end +EXPORT_SYMBOL vmlinux 0x6f7ef11a d_instantiate +EXPORT_SYMBOL vmlinux 0x6fa2f6f4 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0x6fa331ed _lv1_construct_io_irq_outlet +EXPORT_SYMBOL vmlinux 0x6fbae960 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x6fc17f2d bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x6fc96513 matroxfb_g450_setclk +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x701069ad dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x701699b2 _lv1_set_spe_privilege_state_area_1_register +EXPORT_SYMBOL vmlinux 0x704c4365 __cputime_sec_factor +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x705c1260 kill_fasync +EXPORT_SYMBOL vmlinux 0x7070c4fb qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x7071b36c jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x70b0e897 _read_unlock_irq +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70f86c70 pmu_queue_request +EXPORT_SYMBOL vmlinux 0x71209914 neigh_table_clear +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x71438bc9 genphy_resume +EXPORT_SYMBOL vmlinux 0x716b5c81 dqget +EXPORT_SYMBOL vmlinux 0x717242e7 rtas_data_buf_lock +EXPORT_SYMBOL vmlinux 0x71828d6f tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x71908b4a task_nice +EXPORT_SYMBOL vmlinux 0x7192d874 macio_unregister_driver +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71b75155 arp_create +EXPORT_SYMBOL vmlinux 0x71c06f45 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x71c1a6fc llc_sap_close +EXPORT_SYMBOL vmlinux 0x71c6cfea pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0x71c84d9f tcf_hash_create +EXPORT_SYMBOL vmlinux 0x71e40225 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x7272be28 pci_dev_get +EXPORT_SYMBOL vmlinux 0x729b4a83 _lv1_get_spe_all_interrupt_statuses +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72babd63 generic_unplug_device +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72c47db6 no_llseek +EXPORT_SYMBOL vmlinux 0x72cccfdf ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x72e4e614 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x72ea3d36 pci_set_mwi +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x72eb8d67 journal_force_commit +EXPORT_SYMBOL vmlinux 0x72fccaea __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x731a747a pci_io_base +EXPORT_SYMBOL vmlinux 0x73278818 simple_release_fs +EXPORT_SYMBOL vmlinux 0x7334d67d vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x735712f7 bdi_init +EXPORT_SYMBOL vmlinux 0x735a4bac kill_anon_super +EXPORT_SYMBOL vmlinux 0x73776fa2 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x739a14e5 console_stop +EXPORT_SYMBOL vmlinux 0x73a09b2c seq_printf +EXPORT_SYMBOL vmlinux 0x73a83b61 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x73bce3ba ide_dma_off_quietly +EXPORT_SYMBOL vmlinux 0x73da4e11 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x73f21995 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x742f22e5 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x743c9e7b block_write_full_page +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x74796ee0 tty_mutex +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x7496d257 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x749b3cb3 mdiobus_write +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74d59ca7 flush_old_exec +EXPORT_SYMBOL vmlinux 0x74fe8730 sys_ctrler +EXPORT_SYMBOL vmlinux 0x752b6f32 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x756c786e _lv1_connect_interrupt_event_receive_port +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x75754995 _lv1_storage_check_async_status +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75c5629d fb_set_var +EXPORT_SYMBOL vmlinux 0x75d57661 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x75d97da1 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x75e4f5aa pasemi_read_mac_reg +EXPORT_SYMBOL vmlinux 0x75f7c964 insert_inode_locked +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x764016a0 sg_free_table +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x764e2224 _lv1_disconnect_irq_plug_ext +EXPORT_SYMBOL vmlinux 0x7654e397 skb_clone +EXPORT_SYMBOL vmlinux 0x765fd09e inode_add_bytes +EXPORT_SYMBOL vmlinux 0x7684d6cc invalidate_inodes +EXPORT_SYMBOL vmlinux 0x769b25d2 _lv1_get_version_info +EXPORT_SYMBOL vmlinux 0x76ae829f input_inject_event +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76d58c9f ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x76d65107 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x76f3b2aa pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x76fd1a9f ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x77144936 _lv1_disconnect_irq_plug +EXPORT_SYMBOL vmlinux 0x7742b831 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x77529876 blk_free_tags +EXPORT_SYMBOL vmlinux 0x775ad5f2 destroy_EII_client +EXPORT_SYMBOL vmlinux 0x77db3288 of_get_property +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x78301916 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x78481e3b pci_bus_type +EXPORT_SYMBOL vmlinux 0x7849226d idr_destroy +EXPORT_SYMBOL vmlinux 0x78686de8 start_tty +EXPORT_SYMBOL vmlinux 0x786d5c51 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x786f51fd dget_locked +EXPORT_SYMBOL vmlinux 0x787988c8 blk_unplug +EXPORT_SYMBOL vmlinux 0x78943cc9 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x789a17f7 _lv1_destruct_logical_spe +EXPORT_SYMBOL vmlinux 0x78a0b02e blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x78a1d576 matroxfb_g450_connect +EXPORT_SYMBOL vmlinux 0x78d9b204 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78e21f6d phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x78e552d2 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x78f46206 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x79100aba jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x7913adac __percpu_counter_add +EXPORT_SYMBOL vmlinux 0x7945ba84 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x796f23e8 locks_init_lock +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x79979f78 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ab3426 neigh_table_init +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79cc15b4 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x79d1cd46 __inet6_hash +EXPORT_SYMBOL vmlinux 0x79d6c54a sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x79e1ddf6 kset_unregister +EXPORT_SYMBOL vmlinux 0x79fc46b4 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x7a0ac292 datagram_poll +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a4ce97f journal_release_buffer +EXPORT_SYMBOL vmlinux 0x7aa9e259 _lv1_map_htab +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7afb36fc journal_ack_err +EXPORT_SYMBOL vmlinux 0x7b152037 eth_header_parse +EXPORT_SYMBOL vmlinux 0x7b201b83 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x7b3f8cc1 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7ba274e0 generic_setlease +EXPORT_SYMBOL vmlinux 0x7ba8347f set_user_nice +EXPORT_SYMBOL vmlinux 0x7bcd40ed genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c0639fb input_close_device +EXPORT_SYMBOL vmlinux 0x7c1c8a29 mach_ps3 +EXPORT_SYMBOL vmlinux 0x7c2d4c03 sg_miter_start +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c63b3b1 phy_stop +EXPORT_SYMBOL vmlinux 0x7c69996c tcp_ioctl +EXPORT_SYMBOL vmlinux 0x7c775173 __kfifo_put +EXPORT_SYMBOL vmlinux 0x7c813236 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c9291d1 csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x7ca341af kernel_thread +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cc785ea __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x7ce4a153 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x7d06e18b pcim_iounmap +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d24d92a bio_alloc +EXPORT_SYMBOL vmlinux 0x7d24f103 mdiobus_read +EXPORT_SYMBOL vmlinux 0x7d4e6abf init_buffer +EXPORT_SYMBOL vmlinux 0x7d83fd6f scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0x7dc97879 rtas_get_error_log_max +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7de5eafe up_read +EXPORT_SYMBOL vmlinux 0x7e24a583 pci_write_vpd +EXPORT_SYMBOL vmlinux 0x7e2ce926 key_unlink +EXPORT_SYMBOL vmlinux 0x7e613127 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7ea38daf ide_stall_queue +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7edf6f8d pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x7eef59e7 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x7f1bd641 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f3c6b91 security_path_unlink +EXPORT_SYMBOL vmlinux 0x7f46cdcf skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f8f8b76 completion_done +EXPORT_SYMBOL vmlinux 0x7fa55cb3 sk_wait_data +EXPORT_SYMBOL vmlinux 0x7fa780cd of_n_size_cells +EXPORT_SYMBOL vmlinux 0x7fcde69c inet_frags_init +EXPORT_SYMBOL vmlinux 0x7fd0a0c7 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x7fda9760 sk_free +EXPORT_SYMBOL vmlinux 0x7fdecc7b skb_pull +EXPORT_SYMBOL vmlinux 0x801d66cb __raw_spin_unlock_wait +EXPORT_SYMBOL vmlinux 0x801f5a3f __strncpy_from_user +EXPORT_SYMBOL vmlinux 0x80428c80 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x806fd5d6 of_find_node_by_name +EXPORT_SYMBOL vmlinux 0x80702388 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x8075639a idr_remove +EXPORT_SYMBOL vmlinux 0x807ddd3d matroxfb_register_driver +EXPORT_SYMBOL vmlinux 0x807f3f8e block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x809509ad sk_alloc +EXPORT_SYMBOL vmlinux 0x8096aa09 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x80a2eade blk_sync_queue +EXPORT_SYMBOL vmlinux 0x80d23842 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x8131aa73 netpoll_poll +EXPORT_SYMBOL vmlinux 0x8135dd35 vfs_getattr +EXPORT_SYMBOL vmlinux 0x813bce47 input_set_capability +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815f4ceb iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x8182aa26 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x8191a20e pci_find_device +EXPORT_SYMBOL vmlinux 0x81c0a84f rtas_set_indicator +EXPORT_SYMBOL vmlinux 0x81d033d7 __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x81d9f7f2 _lv1_put_iopte +EXPORT_SYMBOL vmlinux 0x81dbe5ab sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x81de9b56 bio_unmap_user +EXPORT_SYMBOL vmlinux 0x81ea8f4b gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x81f79648 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x8219f344 journal_clear_err +EXPORT_SYMBOL vmlinux 0x82334b00 poll_freewait +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x8293725f __devm_request_region +EXPORT_SYMBOL vmlinux 0x82944881 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x82aa3c30 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x82b29d7b __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x82c6bc83 matroxfb_vgaHWinit +EXPORT_SYMBOL vmlinux 0x82cbc837 blk_requeue_request +EXPORT_SYMBOL vmlinux 0x82d6c2df open_by_devnum +EXPORT_SYMBOL vmlinux 0x82e5a238 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x82f10de9 del_timer +EXPORT_SYMBOL vmlinux 0x82f5754f of_find_device_by_phandle +EXPORT_SYMBOL vmlinux 0x82fdff28 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x83269cdb directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x832bd5b6 of_translate_address +EXPORT_SYMBOL vmlinux 0x8340a71c jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x836b3062 new_inode +EXPORT_SYMBOL vmlinux 0x83707ebb kernel_read +EXPORT_SYMBOL vmlinux 0x837af671 simple_sync_file +EXPORT_SYMBOL vmlinux 0x83801568 of_get_next_child +EXPORT_SYMBOL vmlinux 0x83a24119 skb_insert +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83dfa012 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x83f37a17 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x8420c1d0 sg_next +EXPORT_SYMBOL vmlinux 0x844958c8 pci_iomap +EXPORT_SYMBOL vmlinux 0x844af943 pci_set_master +EXPORT_SYMBOL vmlinux 0x845124e0 ps3_mm_phys_to_lpar +EXPORT_SYMBOL vmlinux 0x8489f01a inet_del_protocol +EXPORT_SYMBOL vmlinux 0x84ace65e copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x84cc8877 __scsi_add_device +EXPORT_SYMBOL vmlinux 0x84d1c677 lock_sock_nested +EXPORT_SYMBOL vmlinux 0x84e5c86f bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x8513d196 tty_register_driver +EXPORT_SYMBOL vmlinux 0x8540b5be sleep_on +EXPORT_SYMBOL vmlinux 0x855907ae neigh_compat_output +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x85689b5a pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x85857a4d pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x8597eb47 plpar_hcall +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85b069ad tty_devnum +EXPORT_SYMBOL vmlinux 0x85cdcfb4 request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x85d8b394 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85f4a0fc pci_scan_slot +EXPORT_SYMBOL vmlinux 0x86137bae pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x8636dbe0 igrab +EXPORT_SYMBOL vmlinux 0x86601166 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866f3d00 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86a3ef24 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0x86a6cdf7 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x86c81a43 down_trylock +EXPORT_SYMBOL vmlinux 0x86db1cbb rtas_flash_term_hook +EXPORT_SYMBOL vmlinux 0x86e28707 request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x86f2cd2a blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x874e0b9d idr_init +EXPORT_SYMBOL vmlinux 0x87562d65 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x8764b034 tty_check_change +EXPORT_SYMBOL vmlinux 0x876f2bcd netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x878ab3f8 audit_log_format +EXPORT_SYMBOL vmlinux 0x87b0d1a2 sock_register +EXPORT_SYMBOL vmlinux 0x87b2737d write_cache_pages +EXPORT_SYMBOL vmlinux 0x87d14ab8 of_find_compatible_node +EXPORT_SYMBOL vmlinux 0x87d21c9e pci_pme_active +EXPORT_SYMBOL vmlinux 0x880da1b1 _lv1_get_logical_partition_id +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x88251015 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x8828eb05 get_write_access +EXPORT_SYMBOL vmlinux 0x8846a703 unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x8853b754 vio_disable_interrupts +EXPORT_SYMBOL vmlinux 0x885c17b5 tty_shutdown +EXPORT_SYMBOL vmlinux 0x885d877d llc_sap_open +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x88807800 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x88810efc sock_create_lite +EXPORT_SYMBOL vmlinux 0x8899faef pci_set_power_state +EXPORT_SYMBOL vmlinux 0x889b25a2 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0x889ecf4e pipe_lock +EXPORT_SYMBOL vmlinux 0x88d6815e cad_pid +EXPORT_SYMBOL vmlinux 0x88d8efa4 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x88dfff9b scsi_ioctl +EXPORT_SYMBOL vmlinux 0x8904f2b7 register_8022_client +EXPORT_SYMBOL vmlinux 0x893bad8b request_firmware +EXPORT_SYMBOL vmlinux 0x8953176d kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x895577b0 numa_cpu_lookup_table +EXPORT_SYMBOL vmlinux 0x8960551d follow_down +EXPORT_SYMBOL vmlinux 0x896bde69 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x897fb143 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x8994b78a have_submounts +EXPORT_SYMBOL vmlinux 0x89995904 __sk_dst_check +EXPORT_SYMBOL vmlinux 0x89b32ffe matroxfb_g450_shutdown +EXPORT_SYMBOL vmlinux 0x89c5a8be smu_get_sdb_partition +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89ddb660 udplite_prot +EXPORT_SYMBOL vmlinux 0x89e634ef read_dev_sector +EXPORT_SYMBOL vmlinux 0x89e84159 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x89f00b16 skb_dma_map +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a2ac192 fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0x8a34f6ac blk_integrity_register +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a87ac77 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x8a8d5713 vio_cmo_set_dev_desired +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8a9cef2a _lv1_allocate_device_dma_region +EXPORT_SYMBOL vmlinux 0x8ab0fd13 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x8ab16260 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x8abe2d18 mod_timer +EXPORT_SYMBOL vmlinux 0x8abe7e29 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x8ac2c6f5 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8af23807 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x8b01fb8c i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x8b09357a sock_wake_async +EXPORT_SYMBOL vmlinux 0x8b2e57ba vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x8b57f902 elv_rb_del +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8bcaa052 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x8bcc3a3a _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bdb1585 netlink_dump_start +EXPORT_SYMBOL vmlinux 0x8be2b371 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x8bfd0747 tty_unregister_device +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c1e1183 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c58fb98 serio_open +EXPORT_SYMBOL vmlinux 0x8c6b8b05 fb_validate_mode +EXPORT_SYMBOL vmlinux 0x8c738587 kill_block_super +EXPORT_SYMBOL vmlinux 0x8c8d79c0 _lv1_gpu_context_iomap +EXPORT_SYMBOL vmlinux 0x8c970ed6 cdev_init +EXPORT_SYMBOL vmlinux 0x8ca67e8b pci_dev_put +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cca28c4 vmap +EXPORT_SYMBOL vmlinux 0x8cdf7cf5 may_umount_tree +EXPORT_SYMBOL vmlinux 0x8cff8656 macio_release_resource +EXPORT_SYMBOL vmlinux 0x8d1c3c3e ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4c63b1 scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6906d4 unregister_memory_notifier +EXPORT_SYMBOL vmlinux 0x8d6ef862 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x8d6f6938 force_sig +EXPORT_SYMBOL vmlinux 0x8d944cbb copy_in_user +EXPORT_SYMBOL vmlinux 0x8daa4f7b tcp_proc_register +EXPORT_SYMBOL vmlinux 0x8dcb8213 ida_remove +EXPORT_SYMBOL vmlinux 0x8de2fbc5 _lv1_get_virtual_uart_param +EXPORT_SYMBOL vmlinux 0x8de52942 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x8deaa9b4 block_truncate_page +EXPORT_SYMBOL vmlinux 0x8e0ab6b4 inode_init_always +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e3dd751 default_file_splice_read +EXPORT_SYMBOL vmlinux 0x8e475e3b sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x8e61a503 nla_reserve +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8ea7f01d nf_log_unregister +EXPORT_SYMBOL vmlinux 0x8ea97661 pci_reenable_device +EXPORT_SYMBOL vmlinux 0x8edfeac3 __scm_send +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8eea1bc9 smu_poll +EXPORT_SYMBOL vmlinux 0x8f181511 hippi_type_trans +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f4e038e serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x8f63050f llc_set_station_handler +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8fd6de7f mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x8fd8b7bc _write_lock_irq +EXPORT_SYMBOL vmlinux 0x8fef0d6e of_register_spi_devices +EXPORT_SYMBOL vmlinux 0x8fefd538 journal_set_features +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x900f1921 path_get +EXPORT_SYMBOL vmlinux 0x90295940 i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0x9029f6e6 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x903d3789 block_prepare_write +EXPORT_SYMBOL vmlinux 0x904e51fb tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x907ed22c compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x90809751 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0x909bc571 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x90bcbb9b phy_print_status +EXPORT_SYMBOL vmlinux 0x90c00830 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x90c61b3c bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x90cea9eb dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x90e5a39d prepare_creds +EXPORT_SYMBOL vmlinux 0x90e5b555 sock_create_kern +EXPORT_SYMBOL vmlinux 0x90f31334 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x90f88617 blk_make_request +EXPORT_SYMBOL vmlinux 0x91201cef _lv1_enable_logical_spe +EXPORT_SYMBOL vmlinux 0x912557ce rtas_busy_delay +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x91588012 serio_unregister_port +EXPORT_SYMBOL vmlinux 0x915d82d2 of_find_node_by_path +EXPORT_SYMBOL vmlinux 0x915e1208 tb_ticks_per_usec +EXPORT_SYMBOL vmlinux 0x9162bf4a alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x9168c033 rtas_get_sensor +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x917f37b5 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x9186ec9c xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x9192ab48 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0x919d1163 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x91c4feca _lv1_unmap_htab +EXPORT_SYMBOL vmlinux 0x91d0bb2c pci_dev_driver +EXPORT_SYMBOL vmlinux 0x91dc80ca dst_discard +EXPORT_SYMBOL vmlinux 0x91efca2a call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x9206d6c5 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921ac1da kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x92294d31 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x922ba860 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x922dd115 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x9235135e nobh_writepage +EXPORT_SYMBOL vmlinux 0x92357813 scsi_add_device +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x92724b28 matrox_cfbX_init +EXPORT_SYMBOL vmlinux 0x9296c93d udp_table +EXPORT_SYMBOL vmlinux 0x92af2f64 netif_napi_del +EXPORT_SYMBOL vmlinux 0x92b431ac skb_put +EXPORT_SYMBOL vmlinux 0x92d2f865 clear_user_page +EXPORT_SYMBOL vmlinux 0x92e385fa disk_stack_limits +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x930d8bf5 pci_enable_device +EXPORT_SYMBOL vmlinux 0x93186d26 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x931d2521 mempool_resize +EXPORT_SYMBOL vmlinux 0x9339f126 phy_device_register +EXPORT_SYMBOL vmlinux 0x93507f1c _lv1_gpu_memory_allocate +EXPORT_SYMBOL vmlinux 0x93645610 tcp_shutdown +EXPORT_SYMBOL vmlinux 0x9368ed5c sock_no_listen +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93b65f36 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9414f44a pci_find_bus +EXPORT_SYMBOL vmlinux 0x9427c1e1 blk_init_queue +EXPORT_SYMBOL vmlinux 0x9436fb55 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x94402c39 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x947e03cf set_device_ro +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94922630 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94b8a3b8 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x94cd2db0 percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x95063bb2 idr_remove_all +EXPORT_SYMBOL vmlinux 0x9507ba11 netif_rx +EXPORT_SYMBOL vmlinux 0x9524b0ae _outsb +EXPORT_SYMBOL vmlinux 0x952e843b machine_is_compatible +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x956537b2 nlmsg_notify +EXPORT_SYMBOL vmlinux 0x956c490f sg_last +EXPORT_SYMBOL vmlinux 0x95b64aa1 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x95be7437 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x95dd711d get_phy_id +EXPORT_SYMBOL vmlinux 0x95e9d925 inode_permission +EXPORT_SYMBOL vmlinux 0x95ec5c0f lookup_one_len +EXPORT_SYMBOL vmlinux 0x95fc8771 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x960853e9 d_alloc_name +EXPORT_SYMBOL vmlinux 0x9625e82d inet_accept +EXPORT_SYMBOL vmlinux 0x9626bb2b vmtruncate +EXPORT_SYMBOL vmlinux 0x964272ef machine_id +EXPORT_SYMBOL vmlinux 0x9653b045 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x9662fdde setup_new_exec +EXPORT_SYMBOL vmlinux 0x96836836 neigh_destroy +EXPORT_SYMBOL vmlinux 0x968f15c1 setup_arg_pages +EXPORT_SYMBOL vmlinux 0x968ff85e neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x9690f9f7 smp_call_function_many +EXPORT_SYMBOL vmlinux 0x96ae7869 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96d56018 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x96ee601e pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x96fd96fa blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x96fde709 sock_release +EXPORT_SYMBOL vmlinux 0x97187b16 get_sb_bdev +EXPORT_SYMBOL vmlinux 0x9748927f _outsw_ns +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x976e014f _lv1_map_device_mmio_region +EXPORT_SYMBOL vmlinux 0x978c2e6a tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x978f519d giveup_fpu +EXPORT_SYMBOL vmlinux 0x979507f0 security_path_mknod +EXPORT_SYMBOL vmlinux 0x97977e28 pci_read_irq_line +EXPORT_SYMBOL vmlinux 0x97b7ce2a irq_desc +EXPORT_SYMBOL vmlinux 0x97e6ca3a blk_recount_segments +EXPORT_SYMBOL vmlinux 0x980b0c6d kthread_stop +EXPORT_SYMBOL vmlinux 0x98177648 _lv1_set_lpm_interval +EXPORT_SYMBOL vmlinux 0x9826f9ca lease_get_mtime +EXPORT_SYMBOL vmlinux 0x984b2402 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x985edc46 blk_run_queue +EXPORT_SYMBOL vmlinux 0x986db213 get_phy_device +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x987a1b13 redraw_screen +EXPORT_SYMBOL vmlinux 0x988263e4 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0x988326ea dev_get_by_name +EXPORT_SYMBOL vmlinux 0x989d4082 _write_trylock +EXPORT_SYMBOL vmlinux 0x98eb8fa7 phy_start +EXPORT_SYMBOL vmlinux 0x98f8ced7 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x990615de netlink_broadcast +EXPORT_SYMBOL vmlinux 0x997485c5 skb_over_panic +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99ae31a1 __ip_select_ident +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c24cfe _lv1_free_device_dma_region +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99dd1451 rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x99de3093 mdiobus_register +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x99eac042 bio_kmalloc +EXPORT_SYMBOL vmlinux 0x99fa3534 simple_rename +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a1ffb92 _lv1_clear_spe_interrupt_status +EXPORT_SYMBOL vmlinux 0x9a31cccb compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x9a364b25 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x9a51b23f scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x9a6c2531 pasemi_dma_init +EXPORT_SYMBOL vmlinux 0x9a807c50 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x9a8508cd single_open +EXPORT_SYMBOL vmlinux 0x9a884c67 dquot_release +EXPORT_SYMBOL vmlinux 0x9a99a4fd napi_skb_finish +EXPORT_SYMBOL vmlinux 0x9a9f6885 bdi_destroy +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9acd34b1 tcp_check_req +EXPORT_SYMBOL vmlinux 0x9ace2114 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x9b0c6e81 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x9b173e6b tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x9b3699c8 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b6aa864 skb_append +EXPORT_SYMBOL vmlinux 0x9b86b78e unregister_8022_client +EXPORT_SYMBOL vmlinux 0x9ba15e52 bio_map_kern +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bdeab32 scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c287cd4 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x9c318db4 backlight_device_register +EXPORT_SYMBOL vmlinux 0x9c366996 inet_listen +EXPORT_SYMBOL vmlinux 0x9c484f3d iget_failed +EXPORT_SYMBOL vmlinux 0x9c6e29bb register_exec_domain +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cbea6eb swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0x9cc158ad block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x9cc8bacd vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x9ce103a0 down_write_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9d0c3f33 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x9d14983a ppc_enable_pmcs +EXPORT_SYMBOL vmlinux 0x9d295796 pci_remove_bus +EXPORT_SYMBOL vmlinux 0x9d31a6f6 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x9d3cf786 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x9d88fa11 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x9d91190c jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x9daa416e filp_close +EXPORT_SYMBOL vmlinux 0x9db18a32 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9ddf43be mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x9dfa7b10 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x9e514660 scsi_put_command +EXPORT_SYMBOL vmlinux 0x9e7bbfb7 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x9e8a90bf llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x9e97375d rtas_busy_delay_time +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea9b9bc jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9ebff585 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x9ed51bde neigh_event_ns +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9ee78669 _lv1_write_virtual_uart +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9efe0b01 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f1c1ece jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x9f1fe8d3 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f481194 pci_get_slot +EXPORT_SYMBOL vmlinux 0x9f772045 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x9f94f62c fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9f9f2b0b __sg_free_table +EXPORT_SYMBOL vmlinux 0x9fa06fd9 take_over_console +EXPORT_SYMBOL vmlinux 0x9fca25f5 ide_raw_taskfile +EXPORT_SYMBOL vmlinux 0x9fdf143c __ide_dma_bad_drive +EXPORT_SYMBOL vmlinux 0x9fe6fa56 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x9ff301bf d_genocide +EXPORT_SYMBOL vmlinux 0xa0137915 skb_recycle_check +EXPORT_SYMBOL vmlinux 0xa01e4b9b wireless_send_event +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa054467c sock_map_fd +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa079228b tcp_gro_complete +EXPORT_SYMBOL vmlinux 0xa0a8e4df phy_start_aneg +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0b2156a ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0e44065 _read_unlock +EXPORT_SYMBOL vmlinux 0xa0ebe0e1 should_remove_suid +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa109cef4 of_find_matching_node +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa131827c __kfree_skb +EXPORT_SYMBOL vmlinux 0xa13296c0 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa152842d write_one_page +EXPORT_SYMBOL vmlinux 0xa19575b8 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1bd3a15 unbind_con_driver +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1cabc97 scsi_device_put +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa2127cdc pasemi_dma_alloc_flag +EXPORT_SYMBOL vmlinux 0xa2280222 neigh_for_each +EXPORT_SYMBOL vmlinux 0xa24977c7 key_validate +EXPORT_SYMBOL vmlinux 0xa24ee0c8 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0xa2849e3e nobh_write_begin +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2ac28d8 replace_mount_options +EXPORT_SYMBOL vmlinux 0xa2adf9be ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xa2b21f62 km_query +EXPORT_SYMBOL vmlinux 0xa2bbed37 crash_shutdown_register +EXPORT_SYMBOL vmlinux 0xa2cb1db3 fget +EXPORT_SYMBOL vmlinux 0xa2d4c119 complete_all +EXPORT_SYMBOL vmlinux 0xa2f207e1 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0xa3249c03 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0xa324c9e4 search_binary_handler +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa34c96d5 bio_phys_segments +EXPORT_SYMBOL vmlinux 0xa35267e7 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0xa359458f skb_queue_tail +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa3896981 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa3aff7ca devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0xa3bd2000 __serio_register_port +EXPORT_SYMBOL vmlinux 0xa3c1d1f3 security_inode_init_security +EXPORT_SYMBOL vmlinux 0xa3c82e46 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xa3e80204 dev_get_by_flags +EXPORT_SYMBOL vmlinux 0xa3f80121 open_exec +EXPORT_SYMBOL vmlinux 0xa3fc3dd4 cdrom_mode_select +EXPORT_SYMBOL vmlinux 0xa4177846 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0xa44160a3 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0xa4418453 write_inode_now +EXPORT_SYMBOL vmlinux 0xa480c04b _lv1_gpu_context_attribute +EXPORT_SYMBOL vmlinux 0xa4941008 cont_write_begin +EXPORT_SYMBOL vmlinux 0xa4a4237c jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xa4a6c169 journal_errno +EXPORT_SYMBOL vmlinux 0xa4b13f38 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4bdd447 __cputime_clockt_factor +EXPORT_SYMBOL vmlinux 0xa4e14dc5 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xa5001118 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xa5076271 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0xa53fc4b6 security_path_symlink +EXPORT_SYMBOL vmlinux 0xa5433c1b netif_device_detach +EXPORT_SYMBOL vmlinux 0xa544e489 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xa5606c5c scsi_unregister +EXPORT_SYMBOL vmlinux 0xa5641719 scsi_register +EXPORT_SYMBOL vmlinux 0xa576c263 generic_find_next_le_bit +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5b00659 ppc_proc_freq +EXPORT_SYMBOL vmlinux 0xa5b10f30 blk_put_request +EXPORT_SYMBOL vmlinux 0xa5c91fe6 clear_inode +EXPORT_SYMBOL vmlinux 0xa5cf07fb get_empty_filp +EXPORT_SYMBOL vmlinux 0xa601bf1b lease_modify +EXPORT_SYMBOL vmlinux 0xa618c6b4 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0xa65972b8 _memcpy_toio +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6b1c24b nobh_truncate_page +EXPORT_SYMBOL vmlinux 0xa6b2df86 elevator_init +EXPORT_SYMBOL vmlinux 0xa6b53a1b dev_queue_xmit +EXPORT_SYMBOL vmlinux 0xa6b946ed blk_init_tags +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6de94a4 xfrm_lookup +EXPORT_SYMBOL vmlinux 0xa6f0a59c sg_miter_next +EXPORT_SYMBOL vmlinux 0xa6f4735e tc_classify +EXPORT_SYMBOL vmlinux 0xa6f669a4 proc_dointvec +EXPORT_SYMBOL vmlinux 0xa6f773e2 bio_split +EXPORT_SYMBOL vmlinux 0xa708dd23 elevator_exit +EXPORT_SYMBOL vmlinux 0xa72608bc blk_get_request +EXPORT_SYMBOL vmlinux 0xa72a0f5b nr_online_nodes +EXPORT_SYMBOL vmlinux 0xa73d821b swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0xa7509adf pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xa7ccb475 pci_find_capability +EXPORT_SYMBOL vmlinux 0xa83409e0 textsearch_destroy +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8ced546 _lv1_net_set_interrupt_status_indicator +EXPORT_SYMBOL vmlinux 0xa8db02c8 pmac_suspend_agp_for_card +EXPORT_SYMBOL vmlinux 0xa8dd673e swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa90148f3 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xa901cfce mod_timer_pinned +EXPORT_SYMBOL vmlinux 0xa9121522 unlock_buffer +EXPORT_SYMBOL vmlinux 0xa91c77b6 _lv1_end_of_interrupt +EXPORT_SYMBOL vmlinux 0xa922f240 _read_lock_irq +EXPORT_SYMBOL vmlinux 0xa934b5d3 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xa953d408 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xa969a88c of_phy_connect +EXPORT_SYMBOL vmlinux 0xa96cc7b9 km_policy_notify +EXPORT_SYMBOL vmlinux 0xa971d998 bd_set_size +EXPORT_SYMBOL vmlinux 0xa9771e2b i2c_register_driver +EXPORT_SYMBOL vmlinux 0xa983ca7d tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0xa98632b5 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0xa9909535 soft_cursor +EXPORT_SYMBOL vmlinux 0xa99b8dd6 pipe_to_file +EXPORT_SYMBOL vmlinux 0xa9b75d8c dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0xa9ba7709 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0xa9cd8698 noop_qdisc +EXPORT_SYMBOL vmlinux 0xa9e26ea7 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0xa9ff46d4 flush_dcache_page +EXPORT_SYMBOL vmlinux 0xa9ffd481 generic_permission +EXPORT_SYMBOL vmlinux 0xaa0edca8 pasemi_dma_alloc_fun +EXPORT_SYMBOL vmlinux 0xaa184e52 skb_seq_read +EXPORT_SYMBOL vmlinux 0xaa1abcd1 xfrm_register_type +EXPORT_SYMBOL vmlinux 0xaa388266 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xaa859a64 __f_setown +EXPORT_SYMBOL vmlinux 0xaa90560c simple_getattr +EXPORT_SYMBOL vmlinux 0xaa90a5e9 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0xaa91e97b fddi_type_trans +EXPORT_SYMBOL vmlinux 0xaa931380 cdev_del +EXPORT_SYMBOL vmlinux 0xaaae2462 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xaadc1b7d bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xaaf2fb2b tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xaaf39740 bioset_create +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xab2138e5 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0xab374c61 __lock_page +EXPORT_SYMBOL vmlinux 0xab3bd9e8 DAC1064_global_init +EXPORT_SYMBOL vmlinux 0xab66f611 _lv1_set_lpm_trigger_control +EXPORT_SYMBOL vmlinux 0xab6edf64 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xab7dfe64 simple_readpage +EXPORT_SYMBOL vmlinux 0xab87a5e6 sget +EXPORT_SYMBOL vmlinux 0xab8cc04b dma_direct_ops +EXPORT_SYMBOL vmlinux 0xab90bfab jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabb20986 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0xabc45886 key_payload_reserve +EXPORT_SYMBOL vmlinux 0xabd0808a register_sysctl_table +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL vmlinux 0xabe8684d generic_block_bmap +EXPORT_SYMBOL vmlinux 0xabf4e8fd __devm_release_region +EXPORT_SYMBOL vmlinux 0xabfaca4e jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0xac02674a elv_rb_add +EXPORT_SYMBOL vmlinux 0xac1bb4ea i2c_release_client +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac64a200 deny_write_access +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac6ee4c7 __mutex_init +EXPORT_SYMBOL vmlinux 0xac871aa3 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xacadcf31 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0xacb3a374 pci_disable_msix +EXPORT_SYMBOL vmlinux 0xacbc63cd bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xaccbfb1d inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0xacd14ab8 _lv1_construct_logical_spe +EXPORT_SYMBOL vmlinux 0xacea69be d_invalidate +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad002198 block_commit_write +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad2396ac pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0xad31dd85 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0xad44e156 pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0xad4ebe22 _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0xad75a577 nf_getsockopt +EXPORT_SYMBOL vmlinux 0xad7d7a75 vfs_writev +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadea7662 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xadeffe25 _lv1_gpu_context_intr +EXPORT_SYMBOL vmlinux 0xadf418c1 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xae086971 inet_register_protosw +EXPORT_SYMBOL vmlinux 0xae3ce602 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xae82f39e unregister_snap_client +EXPORT_SYMBOL vmlinux 0xaeba174a mapping_tagged +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaef04256 seq_putc +EXPORT_SYMBOL vmlinux 0xaf35b93e lookup_hash +EXPORT_SYMBOL vmlinux 0xaf3c8f29 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf438d65 _lv1_get_repository_node_value +EXPORT_SYMBOL vmlinux 0xaf5ec0fc elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0xaf7019dc lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xafa7bd33 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xafa81add phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0xafbcb036 scsi_host_put +EXPORT_SYMBOL vmlinux 0xafc0ff33 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xafc1e16c flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0xafd27c52 may_umount +EXPORT_SYMBOL vmlinux 0xafdb286c simple_transaction_read +EXPORT_SYMBOL vmlinux 0xafe0a2a9 journal_get_write_access +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xafef8fa9 register_memory_notifier +EXPORT_SYMBOL vmlinux 0xaff5b31c generic_file_splice_read +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb07e5bb1 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0d0b805 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xb0d0dd20 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0eb65e4 napi_gro_flush +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb12b4b6e sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0xb133b29e icmp_send +EXPORT_SYMBOL vmlinux 0xb134c09b __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xb13cab50 proc_mkdir +EXPORT_SYMBOL vmlinux 0xb15bd8fa tb_ticks_per_sec +EXPORT_SYMBOL vmlinux 0xb175d2f5 udp_ioctl +EXPORT_SYMBOL vmlinux 0xb1848d8c vio_unregister_driver +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb18f3f06 ide_xfer_verbose +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1b31359 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cbaf5f ps2_command +EXPORT_SYMBOL vmlinux 0xb1d37aae register_console +EXPORT_SYMBOL vmlinux 0xb1e07fc1 mutex_unlock +EXPORT_SYMBOL vmlinux 0xb1e4d793 single_release +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb21d7e7d kick_iocb +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb29109e3 deactivate_super +EXPORT_SYMBOL vmlinux 0xb29f4f3b blk_rq_init +EXPORT_SYMBOL vmlinux 0xb2a0fdb9 of_match_device +EXPORT_SYMBOL vmlinux 0xb2b645eb swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0xb2ba62b5 __wait_on_bit +EXPORT_SYMBOL vmlinux 0xb2c91dde unregister_netdevice +EXPORT_SYMBOL vmlinux 0xb2c969cb gen_pool_create +EXPORT_SYMBOL vmlinux 0xb3341a5b llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3be7aac alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xb3bf73df cpu_active_mask +EXPORT_SYMBOL vmlinux 0xb3cabc5c sock_no_poll +EXPORT_SYMBOL vmlinux 0xb3cd2f9e sysctl_string +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb43b7243 simple_transaction_set +EXPORT_SYMBOL vmlinux 0xb45adc9b udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb47bf1cd pci_find_next_bus +EXPORT_SYMBOL vmlinux 0xb4916ff9 seq_bitmap +EXPORT_SYMBOL vmlinux 0xb4995798 lookup_bdev +EXPORT_SYMBOL vmlinux 0xb4f6ef44 genphy_update_link +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb50b0f6f dev_addr_del +EXPORT_SYMBOL vmlinux 0xb541705c call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb56bfd9e smu_spinwait_cmd +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb58634eb blk_register_region +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5d195da pci_domain_nr +EXPORT_SYMBOL vmlinux 0xb609bff9 scsi_scan_host +EXPORT_SYMBOL vmlinux 0xb60e2ea7 block_invalidatepage +EXPORT_SYMBOL vmlinux 0xb62d9db0 kill_pid +EXPORT_SYMBOL vmlinux 0xb6439c4e _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb67eaf14 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xb69f8615 cdev_index +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6ab70d6 alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xb6b54994 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6ca32c5 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0xb6f75454 __neigh_event_send +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb72d6a55 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xb74688bb kmalloc_caches +EXPORT_SYMBOL vmlinux 0xb747b331 km_new_mapping +EXPORT_SYMBOL vmlinux 0xb77f34f9 simple_pin_fs +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7b2e671 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0xb7c2fed9 scsi_execute_req +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7cee25f generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xb7f17ae7 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0xb7f371a4 eth_mac_addr +EXPORT_SYMBOL vmlinux 0xb80206f4 security_path_rmdir +EXPORT_SYMBOL vmlinux 0xb810890c blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb86101f6 scsi_target_resume +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb8827318 idr_pre_get +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8a30c7e _lv1_add_lpm_event_bookmark +EXPORT_SYMBOL vmlinux 0xb8f39ecc jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xb920bd86 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0xb929840e register_quota_format +EXPORT_SYMBOL vmlinux 0xb95c17de sock_kmalloc +EXPORT_SYMBOL vmlinux 0xb97a41de __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xb97f384d security_path_truncate +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98a0a88 of_find_node_with_property +EXPORT_SYMBOL vmlinux 0xb99c568d fb_find_mode +EXPORT_SYMBOL vmlinux 0xb99e579a scsi_free_command +EXPORT_SYMBOL vmlinux 0xb9c87ba4 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0xb9ca04a0 qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0xba122a2c smu_done_complete +EXPORT_SYMBOL vmlinux 0xba36b100 wireless_spy_update +EXPORT_SYMBOL vmlinux 0xba3ae9e5 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xba4065a8 phy_register_fixup +EXPORT_SYMBOL vmlinux 0xba43ff24 netif_rx_ni +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba7b7ad5 set_create_files_as +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaa4faf9 __bio_clone +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbad21549 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xbad2d49f simple_write_begin +EXPORT_SYMBOL vmlinux 0xbae1d907 napi_frags_skb +EXPORT_SYMBOL vmlinux 0xbb01da25 lro_receive_frags +EXPORT_SYMBOL vmlinux 0xbb077aa2 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xbb0a5ff8 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb342bcf neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb683f86 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0xbb7a91dc _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xbb7fa01b idr_get_new +EXPORT_SYMBOL vmlinux 0xbb85b6cd of_device_uevent +EXPORT_SYMBOL vmlinux 0xbb89c00b tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbb9b90d0 kthread_bind +EXPORT_SYMBOL vmlinux 0xbbca365d devm_ioremap +EXPORT_SYMBOL vmlinux 0xbbce8e4b __seq_open_private +EXPORT_SYMBOL vmlinux 0xbc316de4 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0xbc5dd420 register_key_type +EXPORT_SYMBOL vmlinux 0xbcf466a1 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xbd0e4553 cdrom_release +EXPORT_SYMBOL vmlinux 0xbd295f4e inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0xbd71801b vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xbd8cfa15 pasemi_write_mac_reg +EXPORT_SYMBOL vmlinux 0xbd92f187 file_remove_suid +EXPORT_SYMBOL vmlinux 0xbda71feb ps3_sb_event_receive_port_destroy +EXPORT_SYMBOL vmlinux 0xbdaa75c9 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe0387ea ilookup5 +EXPORT_SYMBOL vmlinux 0xbe221b87 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xbe345a30 tty_free_termios +EXPORT_SYMBOL vmlinux 0xbe6d5655 dev_add_pack +EXPORT_SYMBOL vmlinux 0xbe813fa5 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0xbe8a1485 mempool_create +EXPORT_SYMBOL vmlinux 0xbe8c23fc ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0xbebaee59 seq_read +EXPORT_SYMBOL vmlinux 0xbed2116f consume_skb +EXPORT_SYMBOL vmlinux 0xbee1dfe5 paca +EXPORT_SYMBOL vmlinux 0xbeebc1c5 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0xbef32d1f backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf133431 save_mount_options +EXPORT_SYMBOL vmlinux 0xbf6d1055 __brelse +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf82ea61 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xbf942838 stop_tty +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbf9f760e tr_type_trans +EXPORT_SYMBOL vmlinux 0xbfabfe59 __debugger_iabr_match +EXPORT_SYMBOL vmlinux 0xbfb0d0ae kmem_cache_name +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfe92d2e dquot_transfer +EXPORT_SYMBOL vmlinux 0xbff8182c plpar_hcall_norets +EXPORT_SYMBOL vmlinux 0xc0237583 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0xc04ebe74 pci_enable_msix +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc08634c9 generic_file_open +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0b48834 of_find_node_by_phandle +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0dbe32d skb_unlink +EXPORT_SYMBOL vmlinux 0xc0e5fc03 swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0xc0fc5628 kobject_del +EXPORT_SYMBOL vmlinux 0xc0fd7b5f scsi_execute +EXPORT_SYMBOL vmlinux 0xc1008ddb qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xc11dbe5c neigh_parms_release +EXPORT_SYMBOL vmlinux 0xc13511d7 cpumask_next_and +EXPORT_SYMBOL vmlinux 0xc15e073c generic_find_next_zero_le_bit +EXPORT_SYMBOL vmlinux 0xc187e613 kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0xc1a4c53f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0xc1b8b928 tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xc1ba49a9 dev_base_lock +EXPORT_SYMBOL vmlinux 0xc1e5b3ac kernel_accept +EXPORT_SYMBOL vmlinux 0xc20ca385 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0xc20d43d5 put_disk +EXPORT_SYMBOL vmlinux 0xc22a9f9c skb_queue_head +EXPORT_SYMBOL vmlinux 0xc238caff ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0xc251ad6d do_munmap +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc295345c blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xc2ae1e1e dquot_acquire +EXPORT_SYMBOL vmlinux 0xc2b1bac7 set_bh_page +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f4d6a4 kobject_get +EXPORT_SYMBOL vmlinux 0xc2fb9ee1 _lv1_shutdown_logical_partition +EXPORT_SYMBOL vmlinux 0xc301cc7f jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xc301e2e2 pci_request_regions +EXPORT_SYMBOL vmlinux 0xc30b5946 of_parse_phandles_with_args +EXPORT_SYMBOL vmlinux 0xc314c3d2 __cputime_jiffies_factor +EXPORT_SYMBOL vmlinux 0xc3314229 __napi_complete +EXPORT_SYMBOL vmlinux 0xc33a6e04 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc3427c9a d_delete +EXPORT_SYMBOL vmlinux 0xc36f05d8 cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0xc38f1902 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0xc39baaa2 vfs_rmdir +EXPORT_SYMBOL vmlinux 0xc39c47af __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xc3aa0a50 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3d78d48 seq_puts +EXPORT_SYMBOL vmlinux 0xc3e668a6 i2c_transfer +EXPORT_SYMBOL vmlinux 0xc3e736fb nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xc3f5e13f seq_path +EXPORT_SYMBOL vmlinux 0xc41b8fbf irq_stat +EXPORT_SYMBOL vmlinux 0xc41f1696 _lv1_configure_virtual_uart_irq +EXPORT_SYMBOL vmlinux 0xc44da98d ip_route_input +EXPORT_SYMBOL vmlinux 0xc469460a dst_alloc +EXPORT_SYMBOL vmlinux 0xc4796ce9 proto_unregister +EXPORT_SYMBOL vmlinux 0xc4885402 dev_trans_start +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4afabf2 bio_map_user +EXPORT_SYMBOL vmlinux 0xc4cf21c3 input_release_device +EXPORT_SYMBOL vmlinux 0xc4d076c2 bio_copy_user +EXPORT_SYMBOL vmlinux 0xc5089620 _lv1_stop_ppe_periodic_tracer +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc5b584aa journal_wipe +EXPORT_SYMBOL vmlinux 0xc5bd5c18 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0xc5d16655 unlock_rename +EXPORT_SYMBOL vmlinux 0xc5e9a568 filemap_flush +EXPORT_SYMBOL vmlinux 0xc63de5a2 key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xc644e31f page_symlink +EXPORT_SYMBOL vmlinux 0xc663b075 __ioremap +EXPORT_SYMBOL vmlinux 0xc66f0edd call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0xc67b8677 mntput_no_expire +EXPORT_SYMBOL vmlinux 0xc68bc535 of_match_node +EXPORT_SYMBOL vmlinux 0xc68da7e5 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0xc6b6d78c wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0xc6de075a scsi_print_result +EXPORT_SYMBOL vmlinux 0xc6e7f699 tcp_close +EXPORT_SYMBOL vmlinux 0xc6e81cc1 scsi_finish_command +EXPORT_SYMBOL vmlinux 0xc7188403 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc755eb5a audit_log_start +EXPORT_SYMBOL vmlinux 0xc75efd41 file_permission +EXPORT_SYMBOL vmlinux 0xc76f4d5c tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xc77b922e journal_get_create_access +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7ad2fb8 wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xc7e6b788 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0xc7ec28b0 memcmp +EXPORT_SYMBOL vmlinux 0xc89332cc jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0xc89ead21 inode_change_ok +EXPORT_SYMBOL vmlinux 0xc8a96e04 xfrm_input +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8c3b21f sync_inode +EXPORT_SYMBOL vmlinux 0xc8d98795 of_translate_dma_address +EXPORT_SYMBOL vmlinux 0xc8e31d75 _lv1_configure_irq_state_bitmap +EXPORT_SYMBOL vmlinux 0xc8f71530 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0xc903b695 wake_up_process +EXPORT_SYMBOL vmlinux 0xc9369aad inet_release +EXPORT_SYMBOL vmlinux 0xc9411971 ide_wait_stat +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9a7ce55 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xc9aff87f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xc9b32219 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xc9cb4dd6 of_device_register +EXPORT_SYMBOL vmlinux 0xc9d15b7c skb_pad +EXPORT_SYMBOL vmlinux 0xc9d8c1a1 bdget_disk +EXPORT_SYMBOL vmlinux 0xc9e38e77 bio_clone +EXPORT_SYMBOL vmlinux 0xc9e74c8c ide_dump_status +EXPORT_SYMBOL vmlinux 0xc9ed7a2b proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xc9f470cf netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xc9f51c24 simple_statfs +EXPORT_SYMBOL vmlinux 0xc9fc598d pasemi_read_dma_reg +EXPORT_SYMBOL vmlinux 0xca2f0cb5 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca6edd6e blk_execute_rq +EXPORT_SYMBOL vmlinux 0xca825895 pmu_suspend +EXPORT_SYMBOL vmlinux 0xca92ce0b register_gifconf +EXPORT_SYMBOL vmlinux 0xca9d9c8b scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xcaabf3f9 pasemi_write_iob_reg +EXPORT_SYMBOL vmlinux 0xcacb3952 register_snap_client +EXPORT_SYMBOL vmlinux 0xcacbcbd6 pci_assign_resource +EXPORT_SYMBOL vmlinux 0xcadd9b99 compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xcaefd124 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0xcb0eeb7f sk_run_filter +EXPORT_SYMBOL vmlinux 0xcb236837 filemap_fault +EXPORT_SYMBOL vmlinux 0xcb5ee50c locks_copy_lock +EXPORT_SYMBOL vmlinux 0xcb619e7b alloc_trdev +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb7bc48a bit_waitqueue +EXPORT_SYMBOL vmlinux 0xcb8ac6bc dev_mc_delete +EXPORT_SYMBOL vmlinux 0xcb96cf4d udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xcba55ac2 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0xcbc38537 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0xcbe07571 iunique +EXPORT_SYMBOL vmlinux 0xcbe1f985 starget_for_each_device +EXPORT_SYMBOL vmlinux 0xcbe4a598 lock_may_read +EXPORT_SYMBOL vmlinux 0xcbe8b038 _lv1_configure_execution_time_variable +EXPORT_SYMBOL vmlinux 0xcbfe4bfb mpage_readpages +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc473b87 scsi_prep_return +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc509c25 security_inode_readlink +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc805d63 of_parse_phandle +EXPORT_SYMBOL vmlinux 0xcc89c246 pasemi_dma_alloc_chan +EXPORT_SYMBOL vmlinux 0xcc9624f4 get_user_pages +EXPORT_SYMBOL vmlinux 0xcca441a9 __blk_run_queue +EXPORT_SYMBOL vmlinux 0xccba166e pci_choose_state +EXPORT_SYMBOL vmlinux 0xccbf09d7 udplite_table +EXPORT_SYMBOL vmlinux 0xccca6502 bio_pair_release +EXPORT_SYMBOL vmlinux 0xcceda2c4 fput +EXPORT_SYMBOL vmlinux 0xcd4d3e6f pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0xcd5da081 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xcd769f62 _lv1_gpu_device_map +EXPORT_SYMBOL vmlinux 0xcdb475b4 unregister_netdev +EXPORT_SYMBOL vmlinux 0xcdcfc350 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xcdec3f63 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0xce0fd5c3 _write_unlock_irq +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3b3f09 profile_pc +EXPORT_SYMBOL vmlinux 0xce409cda pmac_set_early_video_resume +EXPORT_SYMBOL vmlinux 0xce484344 vfs_readdir +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce76f92f tcp_sendmsg +EXPORT_SYMBOL vmlinux 0xce94b362 mach_pseries +EXPORT_SYMBOL vmlinux 0xce98b105 sockfd_lookup +EXPORT_SYMBOL vmlinux 0xcebca003 __elv_add_request +EXPORT_SYMBOL vmlinux 0xceef9dbd neigh_connected_output +EXPORT_SYMBOL vmlinux 0xcf131c52 journal_destroy +EXPORT_SYMBOL vmlinux 0xcf2e32cf netlink_kernel_release +EXPORT_SYMBOL vmlinux 0xcf37144f phy_device_free +EXPORT_SYMBOL vmlinux 0xcf5d8be3 tty_port_close +EXPORT_SYMBOL vmlinux 0xcf6527f2 dcache_readdir +EXPORT_SYMBOL vmlinux 0xcf6dd3fd tty_register_device +EXPORT_SYMBOL vmlinux 0xcf808f2b ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0xcf901697 __strnlen_user +EXPORT_SYMBOL vmlinux 0xcf989b51 scsi_host_lookup +EXPORT_SYMBOL vmlinux 0xcfa2eb20 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0xcfaa0662 input_unregister_handler +EXPORT_SYMBOL vmlinux 0xcfaf79ba mempool_alloc +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfba7b4b blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0xcff3bf14 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd034cc94 unregister_nls +EXPORT_SYMBOL vmlinux 0xd04ebe79 dquot_free_inode +EXPORT_SYMBOL vmlinux 0xd05931ec _lv1_set_lpm_counter_control +EXPORT_SYMBOL vmlinux 0xd0af0788 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0xd0c5f5e4 skb_push +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd1115a13 ip_defrag +EXPORT_SYMBOL vmlinux 0xd1262886 rtas_data_buf +EXPORT_SYMBOL vmlinux 0xd146e97e skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0xd149d955 generic_write_end +EXPORT_SYMBOL vmlinux 0xd1658de0 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xd1689125 note_scsi_host +EXPORT_SYMBOL vmlinux 0xd17f302d vm_map_ram +EXPORT_SYMBOL vmlinux 0xd1b83db7 scsi_device_get +EXPORT_SYMBOL vmlinux 0xd1fe8ebb _lv1_get_spe_interrupt_status +EXPORT_SYMBOL vmlinux 0xd20e49a9 xrlim_allow +EXPORT_SYMBOL vmlinux 0xd21466d1 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0xd2298c06 netif_device_attach +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a0c073 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xd2b66689 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xd2ef2638 smu_cmdbuf_abs +EXPORT_SYMBOL vmlinux 0xd30b0b60 of_find_device_by_node +EXPORT_SYMBOL vmlinux 0xd30b8036 do_SAK +EXPORT_SYMBOL vmlinux 0xd31c9e0d qdisc_reset +EXPORT_SYMBOL vmlinux 0xd338f73b ip_route_me_harder +EXPORT_SYMBOL vmlinux 0xd356f975 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0xd3942d24 generic_readlink +EXPORT_SYMBOL vmlinux 0xd39ebd9b make_EII_client +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd409383c pmu_request +EXPORT_SYMBOL vmlinux 0xd41d8c0e jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xd43d709f generic_ro_fops +EXPORT_SYMBOL vmlinux 0xd45ce1c2 dmam_pool_create +EXPORT_SYMBOL vmlinux 0xd46d0968 ioremap_flags +EXPORT_SYMBOL vmlinux 0xd4895945 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0xd48ef1c5 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0xd48f0288 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0xd492f2a7 vfs_readlink +EXPORT_SYMBOL vmlinux 0xd496bc8b mb_cache_shrink +EXPORT_SYMBOL vmlinux 0xd4cb0efb __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xd4d7e80e dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xd4da695c da903x_query_status +EXPORT_SYMBOL vmlinux 0xd4e08638 kernel_getpeername +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd544ed8b nf_hook_slow +EXPORT_SYMBOL vmlinux 0xd546862a __invalidate_device +EXPORT_SYMBOL vmlinux 0xd54edcc7 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xd55935b2 dev_get_stats +EXPORT_SYMBOL vmlinux 0xd55f3209 _lv1_remove_repository_node +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd583a065 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0xd5bab772 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0xd5c22027 __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xd5e1d719 _lv1_set_ppe_periodic_tracer_frequency +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd65e7a04 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0xd6688a6b jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xd680c9a5 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0xd6919af4 tcp_sendpage +EXPORT_SYMBOL vmlinux 0xd69ebc51 _read_trylock +EXPORT_SYMBOL vmlinux 0xd6a334ea ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6c80f8e phy_disconnect +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6da14b0 journal_abort +EXPORT_SYMBOL vmlinux 0xd6edf811 _lv1_release_memory +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6f85756 macio_release_resources +EXPORT_SYMBOL vmlinux 0xd6fc7e6b sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xd70c8ab8 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0xd7154121 down_interruptible +EXPORT_SYMBOL vmlinux 0xd72b4750 netdev_state_change +EXPORT_SYMBOL vmlinux 0xd72e1cfc _lv1_set_lpm_spr_trigger +EXPORT_SYMBOL vmlinux 0xd770ecdd locks_remove_posix +EXPORT_SYMBOL vmlinux 0xd77833d3 __pagevec_release +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd78598b6 log_wait_commit +EXPORT_SYMBOL vmlinux 0xd786c0ea plpar_hcall9 +EXPORT_SYMBOL vmlinux 0xd78809bb misc_register +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a45aeb input_get_keycode +EXPORT_SYMBOL vmlinux 0xd7c069e5 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xd7d05a95 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0xd7e3bd22 generic_file_llseek +EXPORT_SYMBOL vmlinux 0xd7ef6032 register_netdevice +EXPORT_SYMBOL vmlinux 0xd81b38e1 napi_get_frags +EXPORT_SYMBOL vmlinux 0xd81f2d2b kmem_cache_create +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8533bfb compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0xd8539deb dev_mc_unsync +EXPORT_SYMBOL vmlinux 0xd8666417 scsi_remove_device +EXPORT_SYMBOL vmlinux 0xd88fa09c i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a08f9d pcim_enable_device +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8c68ef4 d_move +EXPORT_SYMBOL vmlinux 0xd8cc24fc netpoll_send_udp +EXPORT_SYMBOL vmlinux 0xd8d9e6d5 pipe_unlock +EXPORT_SYMBOL vmlinux 0xd8e1ef60 mnt_pin +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8e8b453 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xd90172f8 do_sync_write +EXPORT_SYMBOL vmlinux 0xd91335f7 journal_init_inode +EXPORT_SYMBOL vmlinux 0xd9528eb5 skb_copy +EXPORT_SYMBOL vmlinux 0xd95b110c xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0xd96c8608 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd9749350 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0xd97ea959 touch_atime +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9985d30 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xd99e77a6 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0xd9a46dba posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xd9bac924 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0xd9d4d09d _lv1_release_io_segment +EXPORT_SYMBOL vmlinux 0xd9fea4a5 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0xda0e9f4f follow_pfn +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda342b93 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda6949fa otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xda7c3aa3 put_mnt_ns +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda972614 pci_disable_device +EXPORT_SYMBOL vmlinux 0xdaa28f2f kill_pgrp +EXPORT_SYMBOL vmlinux 0xdaaa3d06 console_start +EXPORT_SYMBOL vmlinux 0xdaaf5645 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0xdae3c3da __serio_register_driver +EXPORT_SYMBOL vmlinux 0xdae636b8 generic_setxattr +EXPORT_SYMBOL vmlinux 0xdaea71e9 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xdb09708f __wake_up +EXPORT_SYMBOL vmlinux 0xdb14fdd1 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0xdb154de8 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xdb31a8bf dma_pool_alloc +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb8777c2 nf_ct_attach +EXPORT_SYMBOL vmlinux 0xdbb3b03c dev_load +EXPORT_SYMBOL vmlinux 0xdbc643bf remove_proc_entry +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbe1c44d tty_name +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc1065e5 tcp_connect +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc166ff3 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0xdc1c78ed lock_rename +EXPORT_SYMBOL vmlinux 0xdc25752e nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc2c01cb sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc487acd kernel_getsockname +EXPORT_SYMBOL vmlinux 0xdc75e0de xfrm_register_km +EXPORT_SYMBOL vmlinux 0xdc78bc46 user_revoke +EXPORT_SYMBOL vmlinux 0xdc8d902b elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xdc9a25e1 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0xdca3ea69 of_phy_find_device +EXPORT_SYMBOL vmlinux 0xdcaffc55 sg_alloc_table +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcb5671d strlen +EXPORT_SYMBOL vmlinux 0xdcda7711 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0xdcefb9a5 pmu_resume +EXPORT_SYMBOL vmlinux 0xdd0f6757 __secpath_destroy +EXPORT_SYMBOL vmlinux 0xdd12fe23 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0xdd2d65df lro_flush_all +EXPORT_SYMBOL vmlinux 0xdd5a37a7 _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0xdd7dfa71 register_filesystem +EXPORT_SYMBOL vmlinux 0xdd947b9c of_mdiobus_register +EXPORT_SYMBOL vmlinux 0xdd955144 __debugger +EXPORT_SYMBOL vmlinux 0xddb5ff49 vc_resize +EXPORT_SYMBOL vmlinux 0xddd015f9 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xdde25489 _write_lock +EXPORT_SYMBOL vmlinux 0xde24c86a of_get_cpu_node +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde7a324b dentry_open +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdea49bd6 compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0xdea9e3ab do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xdf3a3c9b blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0xdf3fce99 sock_i_uid +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf60fc83 _lv1_net_start_tx_dma +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdf991211 elv_rb_find +EXPORT_SYMBOL vmlinux 0xdfa06d82 sock_wmalloc +EXPORT_SYMBOL vmlinux 0xdfb10773 raw_local_irq_restore +EXPORT_SYMBOL vmlinux 0xdfb6bc6f d_rehash +EXPORT_SYMBOL vmlinux 0xdfb7c842 node_states +EXPORT_SYMBOL vmlinux 0xe04b862b pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0877dd0 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0xe094235b elv_abort_queue +EXPORT_SYMBOL vmlinux 0xe09feef5 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bbca39 cpu_mask_all +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c2dc78 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0xe0d28955 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe129468f compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xe1590170 tty_port_close_start +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe179c093 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xe17e8d9f tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0xe19ae4dc add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xe1aa1e80 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xe1e67fd8 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xe20c63e7 _lv1_unmap_device_mmio_region +EXPORT_SYMBOL vmlinux 0xe21bc39b sk_stop_timer +EXPORT_SYMBOL vmlinux 0xe220ceb8 __debugger_sstep +EXPORT_SYMBOL vmlinux 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL vmlinux 0xe23bbc81 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe2446a13 d_obtain_alias +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe255e18f serio_rescan +EXPORT_SYMBOL vmlinux 0xe25e7576 blk_start_queue +EXPORT_SYMBOL vmlinux 0xe2624ba2 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0xe269e567 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0xe286a36a ip_ct_attach +EXPORT_SYMBOL vmlinux 0xe2b8afc7 do_splice_from +EXPORT_SYMBOL vmlinux 0xe2c8e102 inet_getname +EXPORT_SYMBOL vmlinux 0xe2cb77e4 posix_lock_file +EXPORT_SYMBOL vmlinux 0xe2cd7869 pmac_resume_agp_for_card +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e0c7c6 __flush_icache_range +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe36320a7 d_prune_aliases +EXPORT_SYMBOL vmlinux 0xe36abc4f giveup_altivec +EXPORT_SYMBOL vmlinux 0xe3720ba2 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3e839ea journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe4370f17 elv_add_request +EXPORT_SYMBOL vmlinux 0xe44dc5d0 security_path_rename +EXPORT_SYMBOL vmlinux 0xe45cf318 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0xe4686981 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xe475e24f jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0xe4778aa0 mnt_unpin +EXPORT_SYMBOL vmlinux 0xe47f8bd9 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe49c6b3b pci_restore_state +EXPORT_SYMBOL vmlinux 0xe4ba872d neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe5077a8f mempool_destroy +EXPORT_SYMBOL vmlinux 0xe50a1a07 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe528045a vio_unregister_device +EXPORT_SYMBOL vmlinux 0xe553438a tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xe559df35 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0xe561d4f3 create_proc_entry +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5872a09 complete_request_key +EXPORT_SYMBOL vmlinux 0xe5af419b of_get_pci_address +EXPORT_SYMBOL vmlinux 0xe5b7086f macio_dev_get +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5f500bb kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xe5fc552d vfs_quota_disable +EXPORT_SYMBOL vmlinux 0xe60988ac _lv1_query_logical_partition_address_region_info +EXPORT_SYMBOL vmlinux 0xe63f4ad9 kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0xe63f54c8 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xe66896d6 copy_io_context +EXPORT_SYMBOL vmlinux 0xe67bcb29 pci_map_rom +EXPORT_SYMBOL vmlinux 0xe69bd102 lock_fb_info +EXPORT_SYMBOL vmlinux 0xe6cc9de1 vfs_stat +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716c52d sock_kfree_s +EXPORT_SYMBOL vmlinux 0xe73902b5 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xe74aa406 _lv1_set_dabr +EXPORT_SYMBOL vmlinux 0xe758b139 put_tty_driver +EXPORT_SYMBOL vmlinux 0xe7b5f8f9 nf_afinfo +EXPORT_SYMBOL vmlinux 0xe7cd99b7 smu_queue_simple +EXPORT_SYMBOL vmlinux 0xe7ce7439 _memcpy_fromio +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe810a7dd tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xe8116e08 __kmalloc_node +EXPORT_SYMBOL vmlinux 0xe84c5b28 vio_register_device_node +EXPORT_SYMBOL vmlinux 0xe8550abe generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xe8631b34 inet_frags_fini +EXPORT_SYMBOL vmlinux 0xe863675e phy_connect_direct +EXPORT_SYMBOL vmlinux 0xe8a4c285 sock_wfree +EXPORT_SYMBOL vmlinux 0xe8ca4794 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8da7d6f of_create_pci_dev +EXPORT_SYMBOL vmlinux 0xe8f8e282 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0xe905f58b inet_select_addr +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe91fa400 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xe922394c i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0xe927cc4c of_device_unregister +EXPORT_SYMBOL vmlinux 0xe96d23dc journal_update_format +EXPORT_SYMBOL vmlinux 0xe9d7b674 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xe9f51618 dev_close +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea12e3be dev_remove_pack +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea179204 matroxfb_read_pins +EXPORT_SYMBOL vmlinux 0xea6868b0 tcp_make_synack +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea71ba7f iget5_locked +EXPORT_SYMBOL vmlinux 0xeac1c288 dev_driver_string +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeadf4d35 bd_claim +EXPORT_SYMBOL vmlinux 0xeaf07318 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0xeb27d56a kmem_cache_size +EXPORT_SYMBOL vmlinux 0xeb4c5d65 dev_gro_receive +EXPORT_SYMBOL vmlinux 0xeb4c8382 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xeb526a42 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb96ae6a macio_register_driver +EXPORT_SYMBOL vmlinux 0xeb9a0124 scsi_device_resume +EXPORT_SYMBOL vmlinux 0xeba2a1f7 rtas_indicator_present +EXPORT_SYMBOL vmlinux 0xebbeb54b scm_fp_dup +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebc5e117 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xec07ed97 idr_for_each +EXPORT_SYMBOL vmlinux 0xec30765a _lv1_allocate_io_segment +EXPORT_SYMBOL vmlinux 0xec3c75b1 revalidate_disk +EXPORT_SYMBOL vmlinux 0xec406d73 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0xec4a4023 sk_receive_skb +EXPORT_SYMBOL vmlinux 0xec4a4bae sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec8ab802 of_gpio_count +EXPORT_SYMBOL vmlinux 0xec946ba5 inetdev_by_index +EXPORT_SYMBOL vmlinux 0xec9bc8f0 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0xecb77ace inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xecf99086 genphy_read_status +EXPORT_SYMBOL vmlinux 0xed00fe42 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0xed34125f blk_end_request +EXPORT_SYMBOL vmlinux 0xed38d8a5 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xed49ba48 downgrade_write +EXPORT_SYMBOL vmlinux 0xed5b9624 journal_check_available_features +EXPORT_SYMBOL vmlinux 0xed652427 _lv1_set_interrupt_mask +EXPORT_SYMBOL vmlinux 0xed8ed8ec vfs_read +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xeda52f19 init_net +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedc60c08 dev_mc_add +EXPORT_SYMBOL vmlinux 0xedf0b48c _lv1_storage_get_async_status +EXPORT_SYMBOL vmlinux 0xee0faec6 submit_bio +EXPORT_SYMBOL vmlinux 0xee28aaf9 sk_stream_error +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee3e8328 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0xee5bb20b _lv1_panic +EXPORT_SYMBOL vmlinux 0xee9174c5 _lv1_storage_read +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeefd0a22 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xef0612f4 put_page +EXPORT_SYMBOL vmlinux 0xef30e98b i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xef4d1873 kobject_init +EXPORT_SYMBOL vmlinux 0xef6624a0 con_copy_unimap +EXPORT_SYMBOL vmlinux 0xef69ec5f xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef98c955 d_splice_alias +EXPORT_SYMBOL vmlinux 0xef9966a7 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0xefa79c7c of_platform_device_create +EXPORT_SYMBOL vmlinux 0xefaef94c xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xefc2e54d _lv1_storage_send_device_command +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefde1bbe flush_dcache_range +EXPORT_SYMBOL vmlinux 0xefe6eeb1 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xefece4d3 compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf01e2ceb pci_scan_single_device +EXPORT_SYMBOL vmlinux 0xf02ce72f node_data +EXPORT_SYMBOL vmlinux 0xf03d6ec8 skb_tx_hash +EXPORT_SYMBOL vmlinux 0xf0576e7f xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf0709801 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0xf0813fc7 pci_release_regions +EXPORT_SYMBOL vmlinux 0xf08faad5 read_cache_page +EXPORT_SYMBOL vmlinux 0xf0c85055 registered_fb +EXPORT_SYMBOL vmlinux 0xf0d2f84a _lv1_gpu_context_free +EXPORT_SYMBOL vmlinux 0xf0dc464b blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f876ce get_io_context +EXPORT_SYMBOL vmlinux 0xf0fe7b29 get_sb_ns +EXPORT_SYMBOL vmlinux 0xf0ffe0f3 mb_cache_create +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf1643843 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf17f1340 of_unregister_driver +EXPORT_SYMBOL vmlinux 0xf17ff2ca set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xf183189b __ioremap_at +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf19818dd __getblk +EXPORT_SYMBOL vmlinux 0xf1aa7ea1 netdev_set_master +EXPORT_SYMBOL vmlinux 0xf1d630b7 scsi_get_command +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1dd9fb3 down_read_trylock +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf2212d1d balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xf2254996 numa_cpumask_lookup_table +EXPORT_SYMBOL vmlinux 0xf2564ea2 netlink_set_err +EXPORT_SYMBOL vmlinux 0xf27ac913 pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xf2ae8770 mutex_lock +EXPORT_SYMBOL vmlinux 0xf2b6eb5a dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xf2bbd97c skb_free_datagram +EXPORT_SYMBOL vmlinux 0xf2da6630 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xf2ed571e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0xf3007ac3 block_read_full_page +EXPORT_SYMBOL vmlinux 0xf305c505 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0xf309e9ee cur_cpu_spec +EXPORT_SYMBOL vmlinux 0xf30d1036 _lv1_start_ppe_periodic_tracer +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf340e917 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf357db8d pasemi_dma_set_flag +EXPORT_SYMBOL vmlinux 0xf35ab762 mark_page_accessed +EXPORT_SYMBOL vmlinux 0xf37b3ffa aio_complete +EXPORT_SYMBOL vmlinux 0xf37e97eb __put_cred +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39a5222 _lv1_get_virtual_address_space_id_of_ppe +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3c4a2d7 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0xf3cb0bde init_timer_key +EXPORT_SYMBOL vmlinux 0xf40b0870 zero_fill_bio +EXPORT_SYMBOL vmlinux 0xf4108863 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xf42ea05e __wait_on_buffer +EXPORT_SYMBOL vmlinux 0xf436cb03 neigh_update +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf45b5615 swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0xf4bb04e4 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0xf4c61f10 input_register_device +EXPORT_SYMBOL vmlinux 0xf4d337ab splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf50de753 pcim_pin_device +EXPORT_SYMBOL vmlinux 0xf513e9ad skb_queue_purge +EXPORT_SYMBOL vmlinux 0xf534ee9e udp_poll +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf53f68ed page_follow_link_light +EXPORT_SYMBOL vmlinux 0xf55f8690 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0xf55fa877 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0xf56c887d fasync_helper +EXPORT_SYMBOL vmlinux 0xf590750c compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0xf5a62ecc _memset_io +EXPORT_SYMBOL vmlinux 0xf5b4cc2d sg_init_table +EXPORT_SYMBOL vmlinux 0xf5b509ca tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5d487c7 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0xf5e1558d crash_shutdown_unregister +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf608e45b posix_acl_permission +EXPORT_SYMBOL vmlinux 0xf6213e12 pasemi_dma_clear_flag +EXPORT_SYMBOL vmlinux 0xf62ad41b alloc_disk_node +EXPORT_SYMBOL vmlinux 0xf630f4c7 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xf65a334b tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0xf68104a0 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xf6866aa2 remap_pfn_range +EXPORT_SYMBOL vmlinux 0xf6950b06 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xf69be488 wait_for_completion +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6be4e8d deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xf6c68088 swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0xf6d0a4d3 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0xf6e675e3 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6ecb763 _lv1_send_event_locally +EXPORT_SYMBOL vmlinux 0xf702491b proc_create_data +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf75cbed1 journal_revoke +EXPORT_SYMBOL vmlinux 0xf75d279d cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xf76d2adc unload_nls +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7b3db1e key_task_permission +EXPORT_SYMBOL vmlinux 0xf7bac0ec _lv1_set_lpm_counter +EXPORT_SYMBOL vmlinux 0xf7cc335f gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf7d35568 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0xf7f5cd2c input_register_handler +EXPORT_SYMBOL vmlinux 0xf7f66745 phy_connect +EXPORT_SYMBOL vmlinux 0xf8004bfd _lv1_disconnect_interrupt_event_receive_port +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf812dea7 arp_send +EXPORT_SYMBOL vmlinux 0xf8181330 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0xf819b4e7 of_n_addr_cells +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf83666aa framebuffer_alloc +EXPORT_SYMBOL vmlinux 0xf867e302 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xf8765d89 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0xf8906870 vio_cmo_entitlement_update +EXPORT_SYMBOL vmlinux 0xf89673f2 notify_change +EXPORT_SYMBOL vmlinux 0xf8caf559 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0xf8ead6eb neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0xf8f5c94e try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xf8fda569 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf9641ad9 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9cdcfec journal_flush +EXPORT_SYMBOL vmlinux 0xf9e27190 pci_read_vpd +EXPORT_SYMBOL vmlinux 0xf9e9b988 inet_stream_connect +EXPORT_SYMBOL vmlinux 0xfa0a029e inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xfa28c972 journal_start_commit +EXPORT_SYMBOL vmlinux 0xfa31cd3b kfifo_init +EXPORT_SYMBOL vmlinux 0xfa3871d4 is_container_init +EXPORT_SYMBOL vmlinux 0xfa42079e inet_ioctl +EXPORT_SYMBOL vmlinux 0xfa59c3e8 nf_register_hook +EXPORT_SYMBOL vmlinux 0xfa642da7 scsi_remove_target +EXPORT_SYMBOL vmlinux 0xfa6d020a matroxfb_vgaHWrestore +EXPORT_SYMBOL vmlinux 0xfa7f9b01 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xfa9605ae send_sig_info +EXPORT_SYMBOL vmlinux 0xfadb5750 pmu_unlock +EXPORT_SYMBOL vmlinux 0xfadb8e93 pci_pme_capable +EXPORT_SYMBOL vmlinux 0xfae8399a skb_kill_datagram +EXPORT_SYMBOL vmlinux 0xfaef4bfa qdisc_destroy +EXPORT_SYMBOL vmlinux 0xfaf5a401 pci_target_state +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb1ba8e8 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xfb375203 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0xfb662b3b sk_filter +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb788c9b gen_pool_alloc +EXPORT_SYMBOL vmlinux 0xfb9311b0 netpoll_setup +EXPORT_SYMBOL vmlinux 0xfbcbbdb3 __page_cache_alloc +EXPORT_SYMBOL vmlinux 0xfbe170c6 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc02c6d1 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xfc29e5cc nf_register_hooks +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc5528fc tcp_read_sock +EXPORT_SYMBOL vmlinux 0xfc671350 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xfc6be996 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcbc1014 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd57dd61 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xfd9fd933 register_chrdev +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfdbd7672 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0xfdbfb0db netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xfdc9f4e2 get_fs_type +EXPORT_SYMBOL vmlinux 0xfdcfb7a0 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0xfdd28a0f sock_create +EXPORT_SYMBOL vmlinux 0xfdec6996 nf_setsockopt +EXPORT_SYMBOL vmlinux 0xfded48ed enable_kernel_fp +EXPORT_SYMBOL vmlinux 0xfdf13bb2 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0xfdf9e226 sync_page_range +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe1d486e bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xfe20fd96 mach_maple +EXPORT_SYMBOL vmlinux 0xfe26fc7c nr_node_ids +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe4cb4b5 _lv1_storage_write +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe606c7a __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0xfe68212b bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xfe73811e __netif_schedule +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfea2e7a9 pagevec_lookup +EXPORT_SYMBOL vmlinux 0xfeb4646c nvram_find_partition +EXPORT_SYMBOL vmlinux 0xfeb63559 netdev_features_change +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfed221d9 pasemi_dma_alloc_ring +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfeeb7e4a key_type_keyring +EXPORT_SYMBOL vmlinux 0xfeefde10 bdput +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xff1765c7 rtas_call +EXPORT_SYMBOL vmlinux 0xff1e4301 kset_register +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff289f7d vfs_unlink +EXPORT_SYMBOL vmlinux 0xff50bdad shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff81d2c5 __debugger_dabr_match +EXPORT_SYMBOL vmlinux 0xff90592e mpage_writepages +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9a844e xfrm_state_update +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffc8be90 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0x206b8c6c spu_restore +EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0x5e48e764 spu_save +EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0xfa064658 spufs_context_fops +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x29d72a13 crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x5d6105b7 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x248994da async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x81165dd0 async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xfbf93c11 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x37137c8a async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x8b54f1d6 async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0x17893148 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0xdade0183 cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0xec827363 cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0x1a78c105 twofish_setkey +EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x9e840801 __pata_platform_remove +EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0xccade4f9 __pata_platform_probe +EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0x78f5f866 sis_info133_for_sata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23 ks0108_displaystate +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518 ks0108_writedata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333 ks0108_startline +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968 ks0108_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db ks0108_writecontrol +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2 ks0108_page +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b ks0108_address +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x0ebc6dc3 agp_add_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x6e60fab9 agp_remove_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5 agp_num_entries +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x05772c77 tpm_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x07e5239f tpm_remove_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x08a09230 tpm_show_pcrs +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1a478540 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x23118a0a tpm_dev_vendor_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4691e85c tpm_show_caps +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x49661354 tpm_show_caps_1_2 +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5bdcae77 tpm_pm_resume +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x68a245be tpm_calc_ordinal_duration +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6d464c77 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6e67e429 tpm_get_timeouts +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x79057a85 tpm_store_cancel +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7a67816d tpm_register_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x85ed01f5 tpm_show_enabled +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x925060d6 tpm_pm_suspend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa15e57f3 tpm_show_owned +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d tpm_pcr_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb3d29d7c tpm_dev_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb446fc73 tpm_write +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5 tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc86ce7aa tpm_show_pubek +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc93d66d2 tpm_continue_selftest +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd7fd6544 tpm_gen_interrupt +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe72c6031 tpm_show_active +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xee131c18 tpm_open +EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc cn_netlink_send +EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e cn_add_callback +EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x07c6a4e5 edac_mc_alloc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a edac_pci_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1327b7ba edac_mc_add_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x21964908 edac_device_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2941919b edac_pci_reset_delay_period +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x317f5d71 edac_mc_del_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x392e3098 edac_mc_handle_ue_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x39cf46d9 edac_device_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5883770b edac_device_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x59d4fc32 edac_pci_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5dbfa3ab edac_pci_handle_npe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a edac_device_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8395e75b edac_pci_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x892046d8 edac_mc_free +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8b27eb8d edac_mc_handle_ce_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x987321f3 edac_pci_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9b0ee863 edac_device_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9c3e014d edac_pci_handle_pe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xa1db5f1c edac_pci_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xaa9e9e92 edac_mc_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb9b270fd edac_pci_create_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdff93ad6 edac_mc_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe466f93d edac_pci_release_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xefd2c594 edac_device_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf0661fb8 edac_mc_find_csrow_by_page +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf94fd89f edac_device_add_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0x142d23bb hid_input_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x3c911c4f hid_set_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0x537732a0 hidinput_report_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0x53f61cbe hid_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x5ef80095 hidinput_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x852ab5d5 hid_allocate_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0x8f0b290d hid_check_keys_pressed +EXPORT_SYMBOL_GPL drivers/hid/hid 0x987d6058 __hid_register_driver +EXPORT_SYMBOL_GPL drivers/hid/hid 0x98a17609 hidraw_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xa574547b hid_parse_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0xa6e7d19e hid_unregister_driver +EXPORT_SYMBOL_GPL drivers/hid/hid 0xb710a5e2 hidraw_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xc3c34c38 hid_output_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0xc8a799e4 hidinput_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xd48bed3b hid_report_raw_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0xdedbeca7 hidinput_find_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0xdf0421f1 hid_destroy_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xea4dee76 hid_add_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xf7a15922 hidraw_report_event +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e usbhid_lookup_quirk +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x24abd477 usbhid_submit_report +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x3e3fbb63 usbhid_set_leds +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x98bc5510 hiddev_hid_event +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x07fc3df5 lis3lv02d_poweron +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x56e6a15f lis3_dev +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494 lis3lv02d_joystick_disable +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x88c261f6 lis3lv02d_remove_fs +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x9e369ad2 lis3lv02d_init_device +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8 lis3lv02d_joystick_enable +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xeed78505 lis3lv02d_poweroff +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x89761498 hpsb_config_rom_ip1394_remove +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xd3c79316 hpsb_config_rom_ip1394_add +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf hpsb_disable_irm +EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x6e8db08d input_ff_create_memless +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3fba4fdc wm97xx_unregister_mach_ops +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x45f069bb wm97xx_reg_write +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x509d0244 wm9713_codec +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x687e81e5 wm97xx_config_gpio +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6ba145f8 wm97xx_set_gpio +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x70fa59c7 wm97xx_read_aux_adc +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x7b0dbadf wm97xx_get_gpio +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x81891f80 wm9705_codec +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x84bf361b wm97xx_reg_read +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x9c3702da wm9712_codec +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xad219478 wm97xx_register_mach_ops +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xea8e5f3a wm97xx_set_suspend_mode +EXPORT_SYMBOL_GPL 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mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb83488c8 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbbd08568 mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbfa13712 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc501bc41 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc8da3919 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd108654f mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdd6475f6 mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdf2899d6 mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe1ed8372 mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe4bed984 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe7bac937 mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe8ad4f23 mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe8d6fdc6 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xedc0e54d mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf06f4329 mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf5a072da mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf70bfa4a mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf904024a mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfce2d796 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x01499d45 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x1d62a22b usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x386dbdbc rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x50acea83 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x811b4689 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xbfc310c5 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc5ed35ed rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe8197096 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x34ccd803 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x43b1f8df usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4b4a5d88 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4f64dfe9 usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6ecd3954 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x874995b4 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8d3fc49f usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x943be7da usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9cd1e46f usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9ea8ae40 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa4e005e2 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xaeb81d47 usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb7dcc8e3 usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbc406f7c usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbcfa0e7b usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbd8c972e usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc4c7f452 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc8efd8a2 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xce498604 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdfe86e18 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe5c1535e usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1e02fa2f i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1e1cf0e5 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2e668ee8 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x463283a4 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5fad9c8a i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x68aba281 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x72f68897 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x88c15810 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x935971e2 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa1229bc6 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa39a85b0 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa9aea9fb i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb2e59414 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x40f5de0b ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x08362fe9 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0a1c21c0 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1b845623 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x44d66299 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x71ced7eb lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7985247e lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8ac92b76 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8f749a9e lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa55c1c04 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa8e51332 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb956d400 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbe90969d lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcbe7227e lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd479e3e8 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd7a56ffc lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0be4cfc9 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x1d523c66 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3a6ebbc3 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x58faea77 lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x886c1d1f lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9dcc6065 lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa8387171 lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd8553a4f lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x8d01882b if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xb7dbd7f5 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0db3cbbb p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x30d0381d p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x382dd1e8 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3ac918e1 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x7f20c84c p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x84ee422b p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb23e2cd4 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc3f80e5a p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x008bd02e rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0b64fbd9 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x29172ca5 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2af7c7d7 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3de6d38a rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4c59d84a rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4ef0922c rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x53422d47 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x538362d3 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x768bf6b2 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7692794a rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x820baeb8 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8996695c rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9d771c2e rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9d8057a6 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa984f8f2 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbc88d883 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd03cbb13 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd23b4b10 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe0f73cc2 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf573071f rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf5d77b5d rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x58182aaf rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x73ac61d5 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x7e22a9fb rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8705eafc rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8819c426 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8cc62098 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x9e197d2b rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd8b28fd2 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xda269da4 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3d1a1efe rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3ee56be4 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4d5296a5 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x53a58f07 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5dbd8ee1 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6bf24c60 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6fa8f3af rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x95c45921 rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa0fd570d rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xae987ff0 rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbb0c2c67 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xda9f5d4d rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe5157b56 rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xec2109e2 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf4e87cb9 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xffc2555b rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x0721c119 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x36c1f1f6 pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x003998ab ps3_write_ctr +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x0bdf50c4 ps3_disable_pm_interrupts +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x0e622920 ps3_write_pm07_control +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x181e55ab ps3_read_phys_ctr +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x1bcb88c1 ps3_write_pm +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x2abf1471 ps3_get_hw_thread_id +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x2b339635 ps3_disable_pm +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x3c71a6b2 ps3_set_ctr_size +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x4a24996f ps3_lpm_copy_tb_to_user +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x50488f64 ps3_lpm_close +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x58e642c1 ps3_lpm_copy_tb +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x59c54782 ps3_set_bookmark +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x5eca6711 ps3_get_ctr_size +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x60e3f0d7 ps3_read_ctr +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x6702a28c ps3_get_and_clear_pm_interrupts +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x69010c19 ps3_set_signal +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x70177200 ps3_write_phys_ctr +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xa76ee01d ps3_read_pm07_control +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xaa190bc1 ps3_read_pm +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xbb72a01c ps3_enable_pm_interrupts +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xce72c9c0 ps3_lpm_open +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xdddfc980 ps3_set_pm_bookmark +EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xfae0ab68 ps3_enable_pm +EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0x0499abad ps3stor_read_write_sectors +EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0x455423ab ps3stor_teardown +EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0xb17e691d ps3stor_setup +EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0xc7c4cfc3 ps3stor_send_command +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x03fe62c6 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x3b0767ba wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x7373e742 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x975ca0a4 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb930dfef wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xbc0cf3fd wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xe73687ec wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x02e831aa scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x03bebf2f scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x81eaf083 scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xae8afefb scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xc9019659 scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x62f3b5b6 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x04c7a13c iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x07c4a103 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0e632200 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0fdda34d iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x13d55090 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x19459a97 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1c85a609 iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2101cb28 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2b6e5e24 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3ae4b86d iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x42e39e58 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x46bb4bcd iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x474da0c8 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b4338e7 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5cb50c81 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5d72df0f iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5fad3e94 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6855f3c3 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6cf81406 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76449a5b iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7a64baee iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x85ef36a7 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8ed51f74 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x90e1ffd0 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x94f767fe iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x96ca4371 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa17dcb05 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa222dfb1 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa24c9ac9 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa27cd0ea iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5459c11 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb7c6a3c5 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe193b26d iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe969bbdc iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeb4686d9 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xefa93898 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf1684551 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf2fc60d8 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf3a0ddcc iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfe3f9098 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x02455175 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x07f06558 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x09202b4d iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0a557f41 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x19055a4d iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3d182bf7 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3d4472e3 iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x52bc9b5d iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x661dee69 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x696068c5 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x895af22b iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc121e4ee iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xccf614e3 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcd855180 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd2f1f286 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf798e965 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x13ddccd4 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1cf6d432 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1dacb8c4 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2155094e sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3ea627eb sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x44f511d0 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x53aee83b sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5bcff3e1 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8068f692 sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x933d852b __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x95193c23 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xac5762dd sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb31337fc sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb541bced sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbe73c668 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc4326c01 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd3d24eb4 sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe2f23411 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe946a358 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xee0c4365 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf1536d9b sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf58d8536 sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfb3c13cd sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2f455c46 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x547c5aaf srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x905873e3 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa53d52eb srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xb843e412 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe5dd41b5 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x028ad2b7 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x270c7ca9 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5f8b6cda scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6ab2f922 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6db75401 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x87f82075 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa1ca83dc scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb147ae4e scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd8f01275 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x15cb0982 iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x17c69c97 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x20316799 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x22301b90 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2859b5d0 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x293f51e3 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2d073ffa iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3202799f iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3452faa0 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x380807b2 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x39d14be4 iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3c11c276 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x437e84c3 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x610bf2ce iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x765060da iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9679cd3d iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9a93fe02 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa06db65c iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xadb93e51 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb44a0bee iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcfc2f381 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xed0e8ce9 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x0d30c8bd srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x2010990c srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x592f9357 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa766830d srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd8f56214 srp_rport_del +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x2a0a9731 pciserial_init_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xb27c2071 pciserial_suspend_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xd1c55083 pciserial_remove_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xe7fec40c pciserial_resume_ports +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x648e5b03 uart_set_options +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xc58b9661 uart_console_write +EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x281ce114 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x5d38dfd2 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xe1375919 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xebe7c147 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xeee5b056 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xf2402db8 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/uio/uio 0x57ce81a0 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x5954d2bd uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0xbec94ed4 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x13c437b4 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x5d967d35 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x03b96da9 usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3e2a94df usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4b3d80ca usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x74932a12 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x93328300 usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xbc92dea5 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd0cc0138 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe4ef39db ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf1d87015 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1317c2d6 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x28efb22d usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4de2e61e ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7577c9ed usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7d0917bc usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x98f7351e usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x997eb54d usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9bc48595 usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9c9644ee usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa8cf25cc usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xaffc8112 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc3450588 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc8c06884 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xef39b7d0 usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf15f2999 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0249ba89 usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0cb7c079 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1a000da5 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1aca8e9f usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x22213952 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3340f8af usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x373c92a5 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x374e9823 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x395ad02b usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3b8f62b0 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4202e3a4 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x646f61f2 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x706a949c usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8c174d52 usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9703804c fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x97e59600 usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9910a22b usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9e31430c usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa9f5f9fc usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb2b01821 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdb68fc49 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe593c319 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf0441719 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x15e64ecd wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x4fc8c5f1 __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x99384319 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xcbce4a81 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xe1a29211 rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x13494f0d wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x435d779c wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7ae7ed85 wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7f6f99f2 wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x859d7c1c wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x883052e6 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x94f1ff7b wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9fe03c08 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb8af2442 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc43ff997 wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xce9b7154 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd22e6f1d wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd53749cf wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd6abe266 wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfb6bcfb8 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xffe664ca wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xeb25a4a9 i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xed5659e7 i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xf1d51017 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1ce6f195 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x3a891af1 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x3d18fc4e uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4fac0d9e uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x78fcb239 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8a650813 uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd8c80e06 uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xfd051483 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0c926af6 umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x164acc21 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2a10854e __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x683a5eb1 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x7b1df155 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa44e10dc umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xba950da7 umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xdb39ce12 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x042f79d0 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0438f39e uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x067e389e uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x09e8c68b uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x12ae28b1 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15377d59 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x162ab7bc uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d782110 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2650dbf1 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x26690c0a uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2787d4a9 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3af13dcc uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58defc90 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5bcf25e3 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e3211be uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x90e461d0 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x92caada8 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x95a5de10 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9a132c91 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9cb9279e uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa04281e6 uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaa2a3f30 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaaece2b6 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb1e117ad uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb8d04cca uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbb0d3fa1 uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc23a9413 uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc51d15e8 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc9a751d0 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd1899aee uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd726a7a0 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe88a69e3 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xecdc5ef1 uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf6a3c22f uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf92bb261 uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf9bbe4cd uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfb070cca uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xb1d7902c whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0373c444 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x03fe0688 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0526bfeb wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x10681b19 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x10fcc021 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x11db65c6 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2a092ce8 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2c40ac7a wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x37ea92bd wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3adeb317 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3b56a321 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3cc208d1 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x509ed452 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5220d538 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x69678538 wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6ebcd09d wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x883a5e0a wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8951d263 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x89b99c76 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x89d8746d wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa688cc6a wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa80cea4c wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa8d9859b wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb2a5f02c wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb784b36b wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc043e0f3 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2e4615f wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc89f60d9 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdb329baf wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xddba7631 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf769680f wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfef3d48e wlp_reset_all +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0411b56a ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x6724e67c ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x7f0158cf ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x94534756 ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xabab4b77 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb02b0fca ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xefbfb940 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xe2fa34be sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xf8af8697 sis_malloc_new +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x831d7ac5 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x83497b21 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xa2c34e9c unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xc4d29569 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xe38f3742 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x27f2af40 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x2ced59d7 vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xf4b01f0c vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x1aae928d w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x24f5ef95 w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x39dbfbfe w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x417558b4 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x8843183b w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xc82a6608 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xcac23a00 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xf796574a w1_next_pullup +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x25e01cf2 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa50769e0 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa6b8c972 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x468771ad exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x5f60e74a exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x1d1edcbc fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x1d3e394a fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0x215585d5 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0x3794fffc fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x38c2ebc7 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x3924cc5c fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x4076600d fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x42115012 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x51a85930 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0x5e04166b fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x86320e32 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0x978c8f7e fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0xb6f990f7 fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0xb742cc67 fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xde40a6f2 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xe0d3402c fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xf24274c2 fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xf412befb fat_search_long +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x20e854a7 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3783dbb9 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3f1b11ff nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xb83004e0 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xfda88674 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x42427c47 nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xfd56f1aa nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1c45b152 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2c85f817 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x40be72b4 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726 o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7e6dcf05 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9a1684f6 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9c84c10d o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xdc7f1c58 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x1e97febd dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x2214516c dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x24b2dc0c dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xce1754a6 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xcec4d97e dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe298377f dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc5a98838 ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xe030bd61 ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xed018de9 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x0e420351 garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0x40924bce garp_request_join +EXPORT_SYMBOL_GPL net/802/garp 0x8e97445a garp_unregister_application +EXPORT_SYMBOL_GPL net/802/garp 0xac49f420 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0xba0d8200 garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0xc61357f0 garp_init_applicant +EXPORT_SYMBOL_GPL net/802/stp 0x3febccaa stp_proto_register +EXPORT_SYMBOL_GPL net/802/stp 0xf007f489 stp_proto_unregister +EXPORT_SYMBOL_GPL net/ax25/ax25 0xa6edfce8 ax25_register_pid +EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05 ax25_bcast +EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e ax25_defaddr +EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x3d591113 bt_class +EXPORT_SYMBOL_GPL net/dccp/dccp 0x08373a20 dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0969ac4b dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0e15e9a5 dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d84f408 dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x23aa0d0e dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0x42d297fb dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4e8531d9 dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x595a1d1c dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a2a7b0d dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5eb2db37 dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5efe88a6 dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6c175c7b dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0x75250c36 dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7a0acfe0 compat_dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7ff3068b dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9b880621 dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa1d218d9 dccp_create_openreq_child +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa64bddd9 dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa8c1024e dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xada319eb dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb27f8281 dccp_sendmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb2ec0bae dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc17af03c dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc44663ab dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc744d92f dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc8467001 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0xcdaf9d8a dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 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sound/pci/hda/snd-hda-codec 0x093d6c1f snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x094834a2 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11a38372 snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1334b4d9 snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x17226651 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x176a923b snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d3308fe snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e0aab91 snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e8422f7 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2ecdf8b6 snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2f819e08 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32c2fe58 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x35a93adb snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39067650 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3e48807e snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41ba6380 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42272d51 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x452bab44 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4a556ef5 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4cd0fd51 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x504aa7fe snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x512a8979 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x61c8d81e snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x61d6d6bb snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6503dddb snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6d27f226 snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7b650321 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7cc1a9c7 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x82a7bcf3 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x83f2a011 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x882968bc snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x899ea4c8 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8a53bf6f snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x932ca9ed snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x93a2208b snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x96026d3c snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a14520a snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a4ee284 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ac06be2 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9dbb5ca0 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f3ed088 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2614d5c snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa40f98fd snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa5912c3c snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa71448b7 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa75574a9 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xab7884f0 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xade35af2 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb0786de7 snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb242a68d snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb30a233a snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb48ea67f snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4f9e83f snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb66812c5 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb6e69ba3 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb9130b00 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc62d5f4a snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc866edb6 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd12a8010 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd3cb5d6f snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd5f5f118 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd8030265 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd9dc3ec2 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd8d7799 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe69bdb2f snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7a284bd snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf777e66e snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfb3bbfb6 snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfedd5ab3 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xffea2c99 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x2b1b7c02 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x81d4f2f1 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xcf87a3f3 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf50ecb3e ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf8cf3efd soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x375c0f5a cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xc40b4e43 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x345c830c pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x9bc2a8cb soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x9077ad00 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x9dbbab95 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x5e16b697 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x7bfcb8f4 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x28861e0d aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xdfa0c5ae aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x474c7f55 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x4c85a506 aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x66413d27 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x836f6650 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x982d8e84 aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xf43d8e37 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xf4f84a6d aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x3ffa2508 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x823d19e8 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xfe42430d soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x307d6c3f uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xcff87f64 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x0888593b soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x17ea392f wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x94f8a8c1 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x4f171f91 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x9394a369 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x919bb93e soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x9f35c67f wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x2ecc3a50 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x9e4a82b1 soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x00ab59f2 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xf10d45e4 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x210d949a soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x81d3038e wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x295fe511 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3c9bd969 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x17b68aaa soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xbb8c2a72 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x6eedd884 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xda8f6cb1 soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xe879aa2a wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xf1a23f72 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x9aa2fc97 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xdd86c46d soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x0d3dedbe wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xde021003 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x601635af wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc6db4b75 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1c45b701 soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xb151148e wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd55e573e soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xfb759d57 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x8def6a72 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x9e6a4a2e wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x003e9591 snd_soc_jack_new +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x017a3989 snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x036c10c3 snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1102eca9 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x14e45151 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x191646ef snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1cd42518 snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1dd831de snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x20800cd7 snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2998256a snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32de8f7e snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3430785f snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x347f03d4 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3636528d snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x383d5378 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3aeea766 snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3f0ca9e0 snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3f39cad6 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x428bdd9c snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x449caaad snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x508aab38 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x57031edc snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5f805516 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x604839d1 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65ac4db1 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65b67be9 snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x67eae14c snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x69f6888e snd_soc_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x71a8cc1f snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x74782d49 snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x78950ebf snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7bb49cb2 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7e08e18a snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8606e0b5 snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8962d2a0 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8d5adc36 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8f931629 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x90092841 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa01eb418 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa2301472 snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa2528193 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa757d9c5 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa8c0927 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaca96aca snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb129d269 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb5b92807 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb83c2a22 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8d9f498 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb9c7f8fd snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbfa56b63 snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc003a1cc snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc3cd9809 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc4df9da6 snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc66f746b snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc80b010e snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcab31128 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2ba1f87 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2f34a30 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd3dedb8b snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd5912f12 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdab2b501 snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdea974ed snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe2d1a210 snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe2efff0d snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe34b647d snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe93b1523 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfec5fdc4 snd_soc_jack_report +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x1f621eea xv_free +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x6a874429 xv_destroy_pool +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x9c6a0365 xv_create_pool +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e xv_get_object_size +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xd85f1692 xv_get_total_size_bytes +EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe0cf8249 xv_malloc +EXPORT_SYMBOL_GPL vmlinux 0x005591f8 input_ff_upload +EXPORT_SYMBOL_GPL vmlinux 0x00566d8f inotify_get_cookie +EXPORT_SYMBOL_GPL vmlinux 0x00573591 pmac_i2c_get_flags +EXPORT_SYMBOL_GPL vmlinux 0x0067df75 ata_tf_from_fis +EXPORT_SYMBOL_GPL vmlinux 0x0099f2f2 __pci_reset_function +EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8 __iowrite32_copy +EXPORT_SYMBOL_GPL vmlinux 0x00c7f8c1 usb_hcd_pci_pm_ops +EXPORT_SYMBOL_GPL vmlinux 0x00d5be99 tty_mode_ioctl +EXPORT_SYMBOL_GPL vmlinux 0x00eb7476 pmac_low_i2c_lock +EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d ata_id_string +EXPORT_SYMBOL_GPL vmlinux 0x00f5b5b4 sata_async_notification +EXPORT_SYMBOL_GPL vmlinux 0x0112c64d blk_rq_unprep_clone +EXPORT_SYMBOL_GPL vmlinux 0x011cb8e4 usb_reset_device +EXPORT_SYMBOL_GPL vmlinux 0x013bb2a3 page_cache_sync_readahead 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ide_set_media_lock +EXPORT_SYMBOL_GPL vmlinux 0x35766197 rtc_update_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0x35ae854f of_rescan_bus +EXPORT_SYMBOL_GPL vmlinux 0x35b64595 power_supply_register +EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a sdev_evt_alloc +EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc save_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0x361ff366 ide_dma_sff_read_status +EXPORT_SYMBOL_GPL vmlinux 0x362e23ec call_rcu_bh +EXPORT_SYMBOL_GPL vmlinux 0x36c7f496 ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0x37388583 eeh_remove_bus_device +EXPORT_SYMBOL_GPL vmlinux 0x375e5b5a unregister_kretprobes +EXPORT_SYMBOL_GPL vmlinux 0x37643118 rtc_set_mmss +EXPORT_SYMBOL_GPL vmlinux 0x37741743 inet6_hash_connect +EXPORT_SYMBOL_GPL vmlinux 0x378012d6 spi_new_device +EXPORT_SYMBOL_GPL vmlinux 0x378d1366 ata_sg_init +EXPORT_SYMBOL_GPL vmlinux 0x37acbe46 ata_sff_host_intr +EXPORT_SYMBOL_GPL vmlinux 0x37df189d ata_sff_check_status +EXPORT_SYMBOL_GPL vmlinux 0x37eb6baf fsstack_copy_attr_all +EXPORT_SYMBOL_GPL vmlinux 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vmlinux 0x432fd7f6 __gpio_set_value +EXPORT_SYMBOL_GPL vmlinux 0x43416632 ata_dev_next +EXPORT_SYMBOL_GPL vmlinux 0x435b2081 inet_ctl_sock_create +EXPORT_SYMBOL_GPL vmlinux 0x4394a208 ps3_vuart_write +EXPORT_SYMBOL_GPL vmlinux 0x43f56e82 ata_xfer_mode2shift +EXPORT_SYMBOL_GPL vmlinux 0x43f7e731 sysdev_class_register +EXPORT_SYMBOL_GPL vmlinux 0x4469c034 rt_mutex_timed_lock +EXPORT_SYMBOL_GPL vmlinux 0x44784667 trace_nowake_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4 wait_for_device_probe +EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c lock_policy_rwsem_read +EXPORT_SYMBOL_GPL vmlinux 0x451aab14 ip_local_out +EXPORT_SYMBOL_GPL vmlinux 0x455e844d device_for_each_child +EXPORT_SYMBOL_GPL vmlinux 0x45690df0 ata_sff_port_start +EXPORT_SYMBOL_GPL vmlinux 0x457594fa crypto_alg_list +EXPORT_SYMBOL_GPL vmlinux 0x459473dc pci_slots_kset +EXPORT_SYMBOL_GPL vmlinux 0x45b7d85e __srcu_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3 crypto_inc +EXPORT_SYMBOL_GPL vmlinux 0x45e92283 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sata_scr_write +EXPORT_SYMBOL_GPL vmlinux 0xf838498f tty_encode_baud_rate +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8c4e225 bus_get_device_klist +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf91ebab2 cpu_add_sysdev_attr +EXPORT_SYMBOL_GPL vmlinux 0xf95bb431 blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xf977b1e3 ata_sas_queuecmd +EXPORT_SYMBOL_GPL vmlinux 0xf9955933 fsnotify +EXPORT_SYMBOL_GPL vmlinux 0xf99acc37 ide_setup_pci_noise +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9a158cf usb_hcd_pci_remove +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xfa2b2831 set_task_ioprio +EXPORT_SYMBOL_GPL vmlinux 0xfa9597dc usb_buffer_map_sg +EXPORT_SYMBOL_GPL vmlinux 0xfae96de1 klist_iter_init_node +EXPORT_SYMBOL_GPL vmlinux 0xfb4b20c1 ata_pci_device_do_suspend +EXPORT_SYMBOL_GPL vmlinux 0xfb64cf0b fuse_conn_init +EXPORT_SYMBOL_GPL vmlinux 0xfba4f373 rtc_irq_set_state +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfbfcdc2b ps3_sys_manager_get_wol +EXPORT_SYMBOL_GPL vmlinux 0xfc13d2fe ide_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xfc2335ce ide_read_bcount_and_ireason +EXPORT_SYMBOL_GPL vmlinux 0xfc57b261 register_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xfc68ff90 platform_device_add_resources +EXPORT_SYMBOL_GPL vmlinux 0xfc71bca5 gpiochip_remove +EXPORT_SYMBOL_GPL vmlinux 0xfc83bc03 ata_host_start +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcdc6a52 da903x_read +EXPORT_SYMBOL_GPL vmlinux 0xfd091fd6 tcp_reno_cong_avoid +EXPORT_SYMBOL_GPL vmlinux 0xfd8de7b1 ata_sff_dev_select +EXPORT_SYMBOL_GPL vmlinux 0xfde070ad led_trigger_store +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfde9e5e4 get_current_tty +EXPORT_SYMBOL_GPL vmlinux 0xfdeff9c0 rtnl_register +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfea0f868 regulator_register +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xfee361ee ring_buffer_reset_cpu +EXPORT_SYMBOL_GPL vmlinux 0xfef17cd2 bus_get_kset +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff058c61 __module_text_address +EXPORT_SYMBOL_GPL vmlinux 0xff0dacff ps3av_video_mute +EXPORT_SYMBOL_GPL vmlinux 0xff21845a ps3_vuart_read_async +EXPORT_SYMBOL_GPL vmlinux 0xff32a451 proc_net_fops_create +EXPORT_SYMBOL_GPL vmlinux 0xff4969c6 ide_read_status +EXPORT_SYMBOL_GPL vmlinux 0xff647b1a ata_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xff6bd333 init_preds +EXPORT_SYMBOL_GPL vmlinux 0xff9d49c0 ata_link_abort +EXPORT_SYMBOL_GPL vmlinux 0xffbaea67 class_find_device +EXPORT_SYMBOL_GPL vmlinux 0xffc53c74 pcibios_map_io_space +EXPORT_SYMBOL_GPL vmlinux 0xffc8bbc3 da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0xffd6d5ae simple_attr_open +EXPORT_SYMBOL_GPL vmlinux 0xfffb02c5 ata_bmdma_stop +EXPORT_SYMBOL_GPL vmlinux 0xfffe2531 ata_dummy_port_ops +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/powerpc/powerpc.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/powerpc/powerpc.modules @@ -0,0 +1,2122 @@ +3c359 +3c574_cs +3c589_cs +3c59x +3w-9xxx +3w-xxxx +6pack +8021q +8139cp +8139too +8250 +8250_pci +8390 +9p +9pnet +9pnet_rdma +9pnet_virtio +a100u2w +a3d +aacraid +ab3100-core +abyss +ac97_bus +acecad +acenic +act200l-sir +act_gact +act_ipt +actisys-sir +act_mirred +act_nat +act_pedit +act_police +act_simple +act_skbedit +ad1848 +ad7414 +ad7418 +ad7877 +ad7879 +adcxx +adfs +adi +adm1021 +adm1025 +adm1026 +adm1029 +adm1031 +adm8211 +adm9240 +ads7846 +adt7462 +adt7470 +adt7475 +adutux +adv7170 +adv7175 +adv7343 +advansys +aedsp16 +aes_generic +af_802154 +af9013 +affs +af_key +af-rxrpc +agpgart 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+snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-tea575x-tuner +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-usb-usx2y +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-ymfpci +soc_camera +soc_camera_platform +softdog +solos-pci +sound +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +sr_mod +ssb +sscape +ssfdc +st +stallion +starfire +stb6000 +ste10Xp +stex +stinger +stir4200 +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +swim3 +sx +sx8 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +tcm825x +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda826x +tda827x +tda8290 +tda9840 +tda9875 +tda9887 +tdfx +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +tg3 +tgr192 +therm_adt746x +therm_windtunnel +thmc50 +ths7303 +tifm_7xx1 +tifm_core +tifm_sd +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tle62x0 +tlv320aic23b +tmdc +tmiofb +tmp401 +tms380tr +tmscsim +tmspci +toim3232-sir +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_nsc +trancevibrator +tridentfb +trix +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +ttpci-eeprom +ttusb_dec +ttusbdecfe +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tvaudio +tveeprom +tvp514x +tvp5150 +tw9910 +twidjoy +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +typhoon +u132-hcd +uart401 +uart6850 +uartlite +ubi +ucb1400_core +ucb1400_ts +udf +ueagle-atm +ufs +uinput +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultracam +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +uninorth-agp +upd64031a +upd64083 +uPD98402 +usb8xxx +usbatm +usb_debug +usbhid +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-int-device +vcan +ves1820 +ves1x93 +veth +vfat +vgastate +vgg2432a4 +via +via686a +viafb +via-ircc +via-rhine +via-sdmmc +via-velocity +vicam +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vitesse +vivi +vlsi_ir +v_midi +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w83627ehf +w83627hf +w83781d +w83791d +w83792d +w83793 +w83977af_ir +w83l785ts +w90p910_ts +w9966 +w9968cf +wacom_w8001 +walkera0701 +wanrouter +wanxl +warrior +wavelan_cs +wbsd +wdrtas +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +windfarm_core +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xilinx_ps2 +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +zatm +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/powerpc/powerpc-smp +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/powerpc/powerpc-smp @@ -0,0 +1,9200 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/atm/suni 0x82cd0948 suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0xee263213 uPD98402_init +EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL drivers/block/loop 0xee204103 loop_register_transfer +EXPORT_SYMBOL drivers/block/paride/paride 0x047b3d93 pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x04a39b7a pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x1a91e5cb pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x308ade76 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x37dd32cc paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0x5ee0bf42 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x78e1128c pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x99b8815b pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xbeb4a529 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xf26fe597 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0xf8fe0ad3 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xfd05725f pi_connect +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0d57c969 agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x16486168 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x18d0110c agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0x227a8af7 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x262a79b5 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x294eb401 agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2a177952 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x348ae075 agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3a95dde9 agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3b8967c9 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3e9c119f agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x473c6816 agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4ba87119 get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4d9a8ff8 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4e243177 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x51363ec3 agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x636ce15d agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x66820272 agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x69d42e60 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x6bfb903f agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x6eb26cf8 agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7b3a8fd1 agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8d389812 agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x93ebfc67 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb1711210 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb75f83db agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb83600e5 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb912528d agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2a9245a agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xce595dc5 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd1f3689e agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe014a1c9 agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf33925eb agp_collect_device_status +EXPORT_SYMBOL drivers/char/apm-emulation 0x129e74f2 apm_get_power_status +EXPORT_SYMBOL drivers/char/apm-emulation 0xdf3329b8 apm_queue_event +EXPORT_SYMBOL drivers/char/generic_serial 0x09820a21 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x0f061b9c gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x2f13b67b gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x4c135080 gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x9a437a2c gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x9de57bf6 gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x9e0d122a gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0xad1da66e gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xae9e221c gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0xbeb5300d gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xcc416819 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xcda7a288 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xe703e0c5 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0xec821f82 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0xf78666c3 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0xfce5ffc6 gs_start +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x10b97fac ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x22e723e0 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2414ddcd ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26c89bb6 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2b080aa7 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2c8d1d1a ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x339c312f ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3c05e372 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4017749e ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4bba2bee ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x58fc0c83 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x64bbba8a ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x67475db2 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7a3924a5 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7a4e2747 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa1e98840 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa350e512 ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa9028b59 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb4ed5c8e ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb9913f9f ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd7a76556 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xeabc1a55 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf1ddff88 ipmi_request_settime +EXPORT_SYMBOL drivers/edac/edac_core 0x31710585 edac_mc_find +EXPORT_SYMBOL drivers/edac/edac_core 0x72ba7c7a edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xaf9cdb94 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x004ff18e drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x01602860 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x01c73314 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x01d1799b drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x04aaffef drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x050089be drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0766103d drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x077c03b6 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x09ab50b8 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0badde8f drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0bc56796 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0be5ad72 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c6c5659 drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e574727 drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0ed3dd01 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x113fd35a drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x12a9ad3c drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x167d82fa drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x17faae4f drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x18601fab drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1fafa2e0 drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2360545b drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2729df65 drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x27724706 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x29516532 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ada5f31 drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x33b79aec drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x38e5ccfb drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3b003be5 drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d1a42c8 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d990c47 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f69f2db drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x40e477a5 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x412b4f8e drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x414d2450 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x41620ef1 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x42a9f78b drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x44851e89 drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x46100f43 drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x46d65ee8 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4df72c1f drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x51d8c4d0 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53ad6556 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d1d4208 drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6167d9f0 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x625168b7 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6341e2da drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x635d34d8 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x636ac29d drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6595044a drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x659c5966 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a3c1157 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ba9532e drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e56d13f drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ece858f drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ed112fd drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7189c4b6 drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x75ac7b8a drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b132f5f drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x801af5cd drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x80476489 drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8378c028 drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x869affd4 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88b5a119 drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8be3da74 drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d80c0f8 drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8dceba30 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x923d19e2 drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x93120e3f drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0x957dcf41 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9945f6cb drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a0971ee drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a7f7dce drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b22d3c9 drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9bb6756f drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9cab71f9 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e61df2f drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9f477d3d drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9fbc166e drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa16d34eb drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4d802f0 drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa58ebee3 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa7570ef1 drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa796b1df drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa8c7f239 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa97f1da6 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xae00982b drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1e9fa0b drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb26c90be drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2976109 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb313c5c6 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb52b220f drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb54cd5fa drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb7658648 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0xba124f7c drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe2703a1 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbff25b25 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1486405 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2435dde drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3efaced drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc9242a68 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb4e7168 drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdbe332d drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xce28c1f3 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfc227f1 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfdff29b drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd395b574 drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd5350144 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd6092896 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9280626 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc25d000 drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdde7c033 drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdff0b3f5 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7b009dc drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe91f7a89 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xea2b2652 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0xec4ea354 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xed72e560 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf082a7bc drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf0cb62a0 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf28097d1 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf37cee64 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfad8cc97 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfbbb8aff drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe071d64 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff25bd60 drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x2311ec22 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x6d673c4e i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x2cfecace amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07169e8d hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0986cec1 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0f6811fc hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x113e4a09 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x18bbcc08 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2169e787 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2267ead2 hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x22c2a672 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x276da14d hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2867340e hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3285169c dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x32bf3d07 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x35632a4b hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x43444be1 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x43c64d4d hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x448213a4 hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x470ace51 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4bd397c1 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d930d10 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x538b6db5 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x55c96324 hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x589c68d7 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5983df9e hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5fd1b235 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x65523693 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6806dccf hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6d754d1e hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x715f09b5 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71ffd99b hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74a9d61a hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x758e813e hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d0a4a3e hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86b50806 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8b033f11 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8e39fa15 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8e8b05b0 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x907509a5 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9543071c hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9a6cbe19 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9ae3a94f hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9e8fbcbd hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1dfe4d9 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2ee365f hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa37a2ec9 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa39a5650 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7413e7f hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa9dbc460 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xae273869 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xafb35c01 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb1e0e455 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb8140efc hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccadbdaf hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xced53a0a __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd4ae01db hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd58a9885 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd62de9a8 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd841d2c2 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf4a8a18 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf8d15ef hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe881ea72 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf1d1bc78 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf5d5f7e8 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf738ac8c hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2eb40e1c ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x975a4bc0 ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xa87daca0 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6e7a5651 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x72922cdf rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x94cad99b rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb12d8f7a rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xe96d516e rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xee867448 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x079ce9ca ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x320157e8 ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3d4f1aa6 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x44647bfc ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4f689c12 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5b702dfb ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6cb182b0 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x72f60570 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7de0b248 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7e44c48b ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8aab3c48 ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9e33e368 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb500016b ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc41ca86b ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdc881d1b ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xded6582b ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf2c6bacb ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x048c6d78 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0f12ba8d ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x165ff055 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x17ffefc9 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1d3a81e8 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2a598100 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2a9dd7f3 ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31910762 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x33f92db6 ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x383c9b91 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3d0c0e19 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3ec449ea ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3eeced84 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3efa1db5 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x446cd981 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x50bac490 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a76a897 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a8244d6 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5b6dfab1 ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c6b39df ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5e5254da ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6139f8c0 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x63c14b5f ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x674583c5 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x682e5cf5 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6a90c727 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b1992f2 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6fa70293 ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70fe1f3c ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x78fc740c ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7946b6bd ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7a34be4a ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x83b87b06 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x85404589 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8e324f2c ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8f0918be ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96331ead ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x97f525b5 ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9c4f3018 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa1829a22 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xac093bba ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad4356af ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xafe84d80 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb726ae8e ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb94e48a2 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9618e32 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbac2f859 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbe522fd2 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc05cc5c1 ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcad3d54e ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcb8c51f2 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd6379909 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdbdc7bde ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdca7ff2d ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdee29fa3 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdf093827 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe19b429d ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe343d34e ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe6bc3b97 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe8e37cbb ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf3030759 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf33e5098 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf72a6ad1 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf740a8e3 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf8d11e7d ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xff524c7f ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1f1c2508 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x21cd5401 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4c3ffa72 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x717c6603 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7e981327 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8c92d0be ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8d26bdd5 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x92c6b4b6 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x933a82ad ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9e512e07 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd4abad8c ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf0ae76ff ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x18dd439c ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x307bad1c ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4679cde0 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6043324f ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x679e2cdb ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa0dcfc54 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb458dfdf ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe1431a95 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf6a5def7 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x11b9648e iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x22bf32a5 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3ca32051 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5cf29ee6 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6a215971 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7022503d iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xd4eee77b iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xe0b49e63 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x02222359 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2496e27f rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x29f2b495 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2e4410f6 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x651db99c rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x69a9b0cb rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6a15ff58 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x800ed1e2 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8efbe3f4 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8feae0a1 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9aa40342 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9cf20b92 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa0764194 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa8fed202 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc39f147d rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd172418e rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe591dab0 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfc8cb72d rdma_init_qp_attr +EXPORT_SYMBOL drivers/input/gameport/gameport 0x21274670 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x2f259398 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x456f79ec gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x7eeed93d gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x9a06421c gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x9fff7839 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xa54a6a06 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0xeaaf5120 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xf2413427 gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x1ab91ce1 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x2f85d96e input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x90f8aba1 input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xc42cbb4c input_allocate_polled_device +EXPORT_SYMBOL drivers/md/dm-log 0x15b10669 dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-log 0x47d3a5a8 dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-log 0xddc00721 dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-log 0xdf3b12fe dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-mod 0x059fa645 dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-mod 0x1bf3d765 dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x1e2285ba dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x2816c9a5 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0x2c6144da dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x402bb599 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x6990c0b2 dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0x6b43e87b dm_register_target +EXPORT_SYMBOL drivers/md/dm-mod 0x71c5cf2b dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0x79f17497 dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-mod 0x852c074f dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0x88a414f1 dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x8d9f4b81 dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0xa0b4920a dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0xaa445277 dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0xc29b644d dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0xc58d9453 dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xd0939b3e dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0xf8055540 dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-snapshot 0x25c25b76 dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/dm-snapshot 0xbec51dd1 dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/dm-snapshot 0xc49ca4a6 dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0xf1fb1e91 dm_exception_store_create +EXPORT_SYMBOL drivers/md/md-mod 0x134bd473 md_write_start +EXPORT_SYMBOL drivers/md/md-mod 0x199173f0 md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x2f3c9ecb md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0x3003924a md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0x392acb28 bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x39ea5197 md_error +EXPORT_SYMBOL drivers/md/md-mod 0x44799e6c register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x479c3921 md_wakeup_thread +EXPORT_SYMBOL drivers/md/md-mod 0x491fc9fb md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x50377123 md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0x6f026e80 md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0x7c03af3e md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x7d71554a bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0x81205e1a bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0x983baf56 md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0x986a16ad md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0xa313402e bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0xafc235a2 unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0xc566a850 bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0xcc49aa0b md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0xe720dfac bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0xf65b565f bitmap_endwrite +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x85d2fc4e mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x64337de1 mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x7fbb1001 mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xe12b8afb mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xb1ca819b mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xa80a6012 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x5359b9c2 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x5d131379 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0abe9dc5 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1129aead flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x15cad5d6 flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1b183994 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x25ee1803 flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x287a8e18 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2967e9f2 flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2ce39423 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2ed1cf5d flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2eeee68a flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3ae87eb8 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4ef47232 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x51d3798f flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x65412f46 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x677c95fb flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x685d965b flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6bd04894 flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaeb50723 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe29d2ed4 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xee4f2e7b flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x505b7ee5 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x82becbe5 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xdbe82f03 bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xe82ec7e7 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x11d72ebd dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x227e1279 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3f8c3ebc rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x443b3b0e write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x46a4983d dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x51e4efa5 dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9032193f dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x99014cdd dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xceac6c97 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x5b1a0f64 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0387db7e dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0a98ca16 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c08b896 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x11a17270 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c6487c dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1d6df58c dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x227785dd dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x230fb51a dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x26eb4103 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2fe06246 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3089aaa2 dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x33954be7 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x440ef3bd dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4594554b dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5206d8cc dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x53897e32 dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x54c13d46 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5d909012 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x65edb0a8 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x68b8246a dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6ef69874 dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f334f24 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7d8da240 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x81be8f46 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8365a0e1 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x95e68ea0 dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x99ec5759 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb03eed3b dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2cafb53 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdd57603c dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe3a99830 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe787ea8d dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xff4839e4 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x0b445435 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x4a2f5465 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x9bfc7c26 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa354baab dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xd6a8be76 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xe8f891fb dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2104ce09 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x0e33173d dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1bb21a3f dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x37028cca dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3708ffb4 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7864bc93 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x86108eb4 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x911fa1c7 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb005e1cd dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc2770a2d dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xdd30d368 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf43fb267 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x2cf94f23 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x6dae51cf au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x6d95e17c bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x10b3286f cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x55320832 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xe202faa0 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x11895793 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xea60c29a cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x5de88e13 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x0f061243 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xfe7b5e6b cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x22122af0 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf14be34f dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x986b1c95 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x04c4492c dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x1f75a482 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x30f4e2a2 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x34c65219 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x622aa850 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb14c8e81 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xbfb20e2e dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xd13e6d00 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0f9956ae dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3f4b0cd3 dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x775a3d54 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xce902f93 dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd1f8f984 dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf5c63ea4 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x8a2b90bf dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x917ec71e dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x944056cf dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x66a4ed36 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xeef9903b isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x67e03c58 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xba0f6e38 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x69603503 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xe8a70355 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xd402db31 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0xee729b4f lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xce0748ab lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xe4edaf0b lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xa532fb0d mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x36ba9eac mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x81d20370 nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xcee1a4ce nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x919ba831 or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xe28bf7e3 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x2c06cb52 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x138c5242 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x22f226b0 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x272adc9d s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x5beea599 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x655685a2 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xb3decdde sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x09dc142f stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xd61819a2 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x3d5f0103 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x0ac7ae54 stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xdeca5851 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x71d98f73 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xecec1042 tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x83fdae24 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x828a1f8e tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x04b6cb53 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x0e0d3e33 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x21ed64b7 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x3f75215a tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x5bd00c59 tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xe3330ed5 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x3e23665b ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x0a31bb00 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x3f783b81 zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xe1e5ffae ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xd8348449 ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xf3f38583 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x22941120 bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x335850a3 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xd6849a38 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x1391fb92 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x9ddacf63 btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0xd3d677d3 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xf1b60199 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x11717684 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x51f052c0 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x6a6ba3a3 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x9e83482b vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x0775664f cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x25b1a902 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa3d5b192 cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb1d5b598 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xdfd1bb8a cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xf1e893c1 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x02b22352 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x49b5de61 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x71e29093 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xa4734303 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xab0f5b86 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb14eb9d9 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xc9b193f9 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x00ae20ae cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0e0e0511 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1e5112fb cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2b35bb26 cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3b34d21a cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x502c2c6c cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5fefe8f0 cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x600f9a8c cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x647eacd9 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x83cd431f cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x85eac076 cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x89075399 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa8e94906 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xac2a3574 cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xae982fe1 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb89c0f66 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd37ddbb0 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc35265e cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc5cff29 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xeb102640 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xef636505 cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xff932fa4 cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x88c6aec1 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xffb42679 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x073463eb gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x10751087 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1cc8075e gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x84a6e77c gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb613367e gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xbefd2ec7 gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf17d5758 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2146f487 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4230bb35 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4286a0b4 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x45f318f7 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x65a9b2d9 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x81a6b241 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x867e00fc ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9ebcf903 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb6df7347 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe677efa2 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xeb87f0fc ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x01453414 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2a743704 saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x41c0c40a saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x47898929 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4b9449b8 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4e9405fe saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x66e32750 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6889123a saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x83f7d28e saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb99cbbcf saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc07307c4 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xea97e3f2 saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/soc_camera 0x1592c5f8 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3a22219d soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x40bb97ab soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x92b19d46 soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x95356b93 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xb0035489 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xbcb63b01 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe62ccadf soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xf5bea419 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/tveeprom 0x60d6af52 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0xf0892a14 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x0db371fb usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x32bf2750 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x34f65b18 usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x3f03aad3 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5293ede2 RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x54ded406 RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x8acd8f30 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9778abda RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x997c64a5 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xdf605c59 RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xf25c12be v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x36153078 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xccb67d4a v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x36937bd5 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6b757178 videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa7001abd videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xb4713498 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xbdd9b529 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xd9ec46b7 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x620b8a9c video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x68dd3f01 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x735a3312 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x789d37b5 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0xa636762f video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xb4ffe795 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0xd84edcf7 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xe24573a3 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xe77ac18f video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xb41a5e06 videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcc79e5f9 videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcf431f30 videocodec_unregister +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xe5287149 videocodec_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0a3c69cf mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0f826253 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x17a942c3 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x17d0c079 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2433a111 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x26c87911 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2a862a21 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3042b823 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x359d3911 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4015f834 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x42b9d7b4 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x477ae64e mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x49b70671 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4be32144 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x54544477 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x61f34f11 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x693ae82b mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x870ec93b mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8ddf6eef mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9601ec21 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc49ea887 mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcc1795a1 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcc3c66f0 mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd7878f48 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe0aa8bff mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe5d24ccf mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xee8a82d2 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf429c39b mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0f23c116 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x13e3b798 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1743ee78 mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2301121c mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x25492126 mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x371f812e mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3bc92013 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3df7853d mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x42234944 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4d2010c7 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x67145352 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7af098ce mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7c8c7170 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x83d2e8e0 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x846d0d5e mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x857f3a6e mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8a54763a mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8d482bcf mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x90adb757 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb19a1106 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb385d6d3 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbb926e28 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdda369c4 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe41094bd mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeec92a5a mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf9fb70bb mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x13f6526e i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1d445a1c i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x23c18ff6 i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x281c0d58 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x31fa1c92 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3cc38de4 i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x52bb7339 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5c6e53ec i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x630844ce i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6b431f14 i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x81258d39 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa2f455fc i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xac58f9c3 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc2ab16c6 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xcb372f60 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe64f289b i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf3cb1f34 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf6850e62 i2o_driver_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x04cfb827 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x13dae844 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x392e88f7 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x43c7d7ce ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x71b91862 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xca387a45 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe7a93b82 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf9b38913 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x0abc1dd2 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x4326be93 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x3e86c750 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0x79442858 mfd_remove_devices +EXPORT_SYMBOL drivers/misc/c2port/core 0x658d9e05 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0xcb050b60 c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x7793c425 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xf12df27c ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x07d3b33c tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x0c560211 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x0fc118f7 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x228d18c4 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x5f6bcffc tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x92280fdc tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0xbeee6e50 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xc3a1669b tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xf05148e2 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xf425acd0 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xf7208892 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xfcbd9fb4 tifm_has_ms_pif +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x875548ca mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x07943eb2 mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0db3a0e5 mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2f3f54c9 mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x31083c29 mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3f51132e __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3f79fd1d mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x570326b7 mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7cc7665e mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7d4cfd2e mmc_add_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa4d1f17d mmc_suspend_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc293ad28 mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xcd19d702 mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe3f84621 mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe8ff1135 mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xec8e964d mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf032e801 mmc_resume_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf5a4ef8a mmc_alloc_host +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x02470702 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x1fdf0621 cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xe4945cb6 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x0bc0cd9e do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4788f4e7 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x58e43138 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xa201524d unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x0144faa0 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xf97a807b lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xdef34625 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x1556ca9c del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0x8906b633 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xa1820b75 mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xf7875afa mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0xd16895c1 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xda55c0ba nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x54c2155c nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xa8c7758a nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x1b5acfe1 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3e2b9fb2 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x71326a8a onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xda3a0b2d flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x0508aec2 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x0836751f NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x3a0a285e ei_close +EXPORT_SYMBOL drivers/net/8390 0x4a290b57 ei_open +EXPORT_SYMBOL drivers/net/8390 0x52937680 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x945139a7 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0xa21b70f7 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xaba28084 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0xad661dee ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xb472c4cb ei_poll +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1f425793 arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2dc1db7e arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5507947d arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x66ccac27 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x8c2535d9 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x8d3dec6c arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbc61434e arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc24d61f6 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd09312b8 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xec4f82ca arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x05dac411 com20020_found +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x41afb2dd com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc1e64be3 com20020_check +EXPORT_SYMBOL drivers/net/bnx2 0x0a4f6f0d bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0xfbe3c226 cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x043ad6e6 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x10777344 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3ecb2f77 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x57ec5d91 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x58990fed cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5a66a0c6 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x67630a66 t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6a75f7e0 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x77a75cb4 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x85306c00 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb4402f0e cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb6d7abf9 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xdbf385ea cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xdde3496b cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe53dc35c t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfb26b210 dev2t3cdev +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x23fff70a hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xcd7a76a0 hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xcdefd6b1 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xd53bb2ce hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xdf4d96a2 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x100f12f7 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x310b88ad sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x387017b7 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4842aa12 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6d9ebb39 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x8ebdbe19 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x92df7e4a sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x93f9f337 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9a318572 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc655d4a1 sirdev_write_complete +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x28b03e83 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0x3508c862 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0x43096dd9 mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x592a73ba mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0x7436a626 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x94d73f6c mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xa0548744 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0xe45d1425 mii_nway_restart +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xa2647314 free_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xf0de023e alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x038d24fd ppp_register_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x209840b1 ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0x42e3d6e5 ppp_output_wakeup +EXPORT_SYMBOL drivers/net/ppp_generic 0x4ff1288a ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0x6f9ac4cc ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x99a9ef04 ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0xb70eb747 ppp_unregister_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xd00be4de ppp_input +EXPORT_SYMBOL drivers/net/ppp_generic 0xd601b516 ppp_register_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xd883406d ppp_input_error +EXPORT_SYMBOL drivers/net/pppox 0x5be9c5fe register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x60978c9b pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xdb83c052 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x2278e94b slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0x26b760c4 slhc_init +EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0x62538167 slhc_toss +EXPORT_SYMBOL drivers/net/slhc 0x7e87227e slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7 slhc_uncompress +EXPORT_SYMBOL drivers/net/sungem_phy 0xac7c6071 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x188a76fe tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x57b23b95 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x93083ba0 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x9552906f tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xb65b44c8 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x1f178f2b register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x328194fd detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x4cacfe13 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x6572d573 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x71d74cb5 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7be8d465 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0xb48bafeb attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xbccd6e51 hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0xc961814a hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0xec840a66 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0xfcc9d7c3 hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wireless/airo 0x239ac469 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xb518bf1b init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xb5719710 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x6aa73a0b ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xfd9d2ec8 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/atmel 0x07ab29ce stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x63462a5f atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xb4a8e13a init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x136f076b hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x147ecae8 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x16e518a9 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x285c7983 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4109ff3a hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x592f3b70 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5b9390db hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6b536486 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x77646d02 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7ff12761 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x88d69880 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8a92ca02 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8ea88614 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x90abb4bd hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x97459cb1 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa2eefff4 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa353eb96 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa6c04118 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xba0da919 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc8b9d687 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcff7df67 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf026c3a9 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf6594db3 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf6706ae9 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf73a67e0 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0a74593d ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1106fef6 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x11cd72d1 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x23c83708 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x23cf3ae7 ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x41e233ab ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x476e2e93 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5b9a80f3 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x60e02d1e alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6eef2ac5 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x78ff5457 ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x81f48db1 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x82f6173d ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x938376ef free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb10603de ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc1438bf2 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc517de10 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcb8360cf ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xde05852c ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xeb5c1f69 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf4c5100f ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00e4146e iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03d0b5d6 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0430a735 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x073936d1 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07884700 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x083774f6 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a81a147 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0b5df132 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0be3dfe4 iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e6316d0 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f52beff iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b97da5a iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1bfb0f37 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d1f92b4 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1fb88498 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24c3e5a3 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25e3f78f iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26591efe iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a75318c iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b0e216c iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b8cf93c iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b92999c iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2bd1a8f1 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2de77a05 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2f4d24cb iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3514fe03 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x358858ce iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3875fe48 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3af1cd1f iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3cdebfc9 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3df83970 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4017fe2d iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x423bd4a3 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x424b2894 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x430026c9 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x447b477d iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x496c8225 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b8129e2 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e91607e iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x545cd191 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x547bd296 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54a65dcd iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56f047e5 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cf5e597 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6068050c iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6084fab6 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6091e1d8 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6243548d iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x64ea63ba iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66fa4fdb iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x673479cc iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6882bbc1 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6de599ad iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e49053d iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x701cd11e iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x741577a3 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x743e9306 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7511ad83 iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x785ce805 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79d54204 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d5df23c iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d6d6b4b iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f4db6ca iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x80091d6c iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x80b27d65 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83ad4c68 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85224938 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85681c68 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x856febcb iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x86a8eea9 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x892d84c6 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b4adb3e iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b671768 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cdf07d9 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e656f02 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e9dad28 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f0d4804 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x90065412 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9145a974 iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9552485a iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x965283d7 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x976ff779 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ae51953 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b92c526 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d3e9f45 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ed79dff iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa217aec9 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa23bc470 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2cdb8b1 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa321499f iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa35006ba iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa35ba6de iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa846738f iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa897b978 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa9851dea iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaaf712d9 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaca09683 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad9dd746 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb62c1878 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb78ceffc iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8032edb iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8e8e76e iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9045dee iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb951b92a iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc394ff9 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd75fd8a iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc17fb6fe iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc2c12e3b iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc61e91f7 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc77e953d iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc91a5d54 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb786a36 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xced2da89 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd34bcfd4 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd719fc3f iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd756afc5 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd95e8fff iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd19f670 iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd9738eb iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdff1642b iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe110730e iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe292966f iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2d0f79a iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe35328b6 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4bc476c iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe6ee5bf5 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe72faa92 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe861a817 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8645add iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe9a28eb4 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea71b09a iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf05984c8 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0ba181c iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf564e9eb iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf63f787b iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf79225c3 iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8a19bc7 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe1e9d0d iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe808793 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x046a3750 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x05b684c9 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2fd51354 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3015c79b __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x80791bea free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x0b70af01 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x124d6b46 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x1acebf15 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x266a22b3 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x384e5216 parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x4115fcb9 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4f5b6b9c parport_release +EXPORT_SYMBOL drivers/parport/parport 0x580690ff parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x787acebf parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x78ad35c0 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x7992684b parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x7f2e13cf parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x82983960 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x88784cc5 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x94434fb2 parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x996345e2 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x996c4d0b parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0x9e3cd598 parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x9f3d0353 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0xacb34ed6 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xb1f79638 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xb6a80642 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xc3376017 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0xd78fec1c parport_claim +EXPORT_SYMBOL drivers/parport/parport 0xd7ed4aa0 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0xdfc5b6cc parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xe0810dc2 parport_read +EXPORT_SYMBOL drivers/parport/parport 0xe8488cf7 parport_write +EXPORT_SYMBOL drivers/parport/parport 0xeaa39463 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0xffdb6cc9 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport_pc 0x89c5eb9d parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0xac1969cc parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x03f53de0 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x10902bf3 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1f8a92c4 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x31182655 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x329a0833 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x44427049 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4e3a919c pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x61606cf9 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x83a25796 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x934ffa9a pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa6f63c97 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa74ea63b pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbfb06f34 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc86f7445 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xfaa3afaf pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x08a7493c pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x11bba1f5 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1a5696d9 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1aca93f8 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1c2da5db pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f57bff5 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2220f810 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2ae59855 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2c6e563d pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x378e7cd4 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x38c38418 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x46665d8e pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4ca75fc9 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4e2c4193 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f460a65 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6f96b2f8 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6fac09ca pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6fe7576c pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7cfba87c release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x810b30c8 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x82ff6de3 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x86bd6852 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8f8f6d21 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x98b2cc15 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa4c2ea5b pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xacb68548 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc789f67c pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd21a3b19 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd905150a pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdf005ff7 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe7ac574c pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe96d03bb pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfdde6986 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xa5cd8c38 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x19374023 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x24143c39 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2c6d046d fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x725de7d1 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8143f04d fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x90d4c298 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x935ccebc fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x967e02fb fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x027ca084 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x09556b5b fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0a5c48e2 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0d7874e3 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f63293e fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1bb681e3 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1d453b8d fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x25768548 fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x273a19e5 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e72372a fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x35ebd4c1 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x38468898 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x39ad2aa0 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x461c17c3 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4d1e1575 fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5163e8e1 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5f0bff3f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x632b38c5 __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x72347e16 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x775a4b08 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x79bc8301 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x815a70da fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x81744073 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8d51264c fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x936b6987 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ab2f54e fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa885121b fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa9a26027 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xab8b1324 fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xba4751ba fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc430cf63 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc6d77996 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc83e92db fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd5c2b512 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc5c9822 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe3b4a87f fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe4d641bf fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf4cc9ca8 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf8e62827 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfa3752f5 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfbac78eb fc_linkup +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x9507949a mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x03495567 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x07fbba6d osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1147c031 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x190756e7 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1ab281b0 osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x20a63d2d osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x20d3c1b1 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x24240cfa osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x27cc96bf osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x308960d7 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4ebe921c osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x539f0ba4 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5ad7c2ac osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x706d6ca1 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8473e117 osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8627e375 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x905b9272 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x98b5f34a osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaef948fe osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xafaee841 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb35b1247 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbed194c7 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbf019f32 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc6564c02 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xca636a32 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd0df946e osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd3fd06a1 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd6158ee3 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdf229414 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe4182384 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec14cb27 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xef66a0f7 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x8e6562aa osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0xbaedc2da osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf3c47a60 osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x2bb57a5e qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x60de61ae qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8d68afe2 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc739bbe7 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xebd6b488 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2d66fdc qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/raid_class 0x3876764c raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x7dc89601 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0x88b752b0 raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x08515249 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x27d0533a fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x40036f87 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4c28db89 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6355771d fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x812a1a9e fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa1e413f4 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa44efc72 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xca4c3a6c scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd3b2d8aa fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf2f5c0e9 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf6c50f31 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x03e11631 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x04f8ff11 sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1292b4fa sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1d78fa51 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x20d94b86 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3777aa67 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x38d7af41 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3cd9f36a sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4719b7b5 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x619f434e scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7095000b scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x76de5749 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7c6bb2ec sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f02c325 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x931d9db9 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x938a630e sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x97f6a014 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa4e11dbb sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xab81cfa4 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaf8427ba sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb14db98a sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbb3712f1 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdd70a7ac sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xea075ee8 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xead14376 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xec67d6ba scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x0bd77d2e spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x2ab45208 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3b23bc15 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8680ec55 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xad426766 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/serial/8250 0xed46ffbd serial8250_register_port +EXPORT_SYMBOL drivers/serial/serial_core 0x2c47a7ec uart_unregister_driver +EXPORT_SYMBOL drivers/serial/serial_core 0x3539810c uart_add_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0x3b21e856 uart_update_timeout +EXPORT_SYMBOL drivers/serial/serial_core 0x6fef6afd uart_resume_port +EXPORT_SYMBOL drivers/serial/serial_core 0x8112dab0 uart_get_baud_rate +EXPORT_SYMBOL drivers/serial/serial_core 0x82bf15fd uart_suspend_port +EXPORT_SYMBOL drivers/serial/serial_core 0x83fd5b59 uart_remove_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0x9d33834b uart_register_driver +EXPORT_SYMBOL drivers/serial/serial_core 0xb389d1b3 uart_match_port +EXPORT_SYMBOL drivers/serial/serial_core 0xd63f9b4e uart_write_wakeup +EXPORT_SYMBOL drivers/serial/serial_core 0xf24e3302 uart_get_divisor +EXPORT_SYMBOL drivers/ssb/ssb 0x0e8203ec ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0x0ffc4f5d ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x1c018ce7 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x1ef1f90c ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x2beb9b31 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x344f06bc ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x6cbaa6e7 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x6e6e6efd ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x6f58bd6a ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x8e51b5a5 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x92c51707 __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x9a86c6f6 ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0x9d49dbb0 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xa07e62e1 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0xb665b8d6 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0xb91cb441 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xbb7f126a ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc220a604 ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xcace9ac7 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/telephony/ixj 0x8e2273e2 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0xc340b6ef phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xcd217549 phone_unregister_device +EXPORT_SYMBOL drivers/usb/gadget/goku_udc 0x0c696ce6 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/goku_udc 0x6f68176c usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x3563335c sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x8be75ee1 usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xec71d584 usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x490f55ea lcd_device_register +EXPORT_SYMBOL drivers/video/backlight/lcd 0xcd7d00a3 lcd_device_unregister +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0f4547d0 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0x35c3adea cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xa0125c8b cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xaf9cbd42 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/display/display 0x0c171710 display_device_register +EXPORT_SYMBOL drivers/video/display/display 0xa58bee2f display_device_unregister +EXPORT_SYMBOL drivers/video/output 0x4f3d734c video_output_unregister +EXPORT_SYMBOL drivers/video/output 0x55b5a8b0 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x083b8875 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x521e9d52 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x67c181dc svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x6b14f90c svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x700e1f39 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x956bc596 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xe8b515bd svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/syscopyarea 0x503a1ba6 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x2019452a sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x81a055c7 sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x1ccacbfb w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xba34c961 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1a2f39f8 w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1ae104c9 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xa489da83 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xf683684c w1_ds2760_write +EXPORT_SYMBOL drivers/w1/wire 0x989276f1 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xb1fbb894 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xb83ae2d2 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0xcf4a80d0 w1_unregister_family +EXPORT_SYMBOL fs/configfs/configfs 0x0487b2ae config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x1adc2259 config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x494260a2 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x56c7436e configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x672d7223 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x70e560a8 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0x77d525ef configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x7bc2cfa9 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xa8a27936 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xb1f460be config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xb513bb21 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xb87e9a6e configfs_unregister_subsystem +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0ff6f536 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x1289b9ad __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x1bd30721 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x2e699af5 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x471bb33e __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x5fe58c20 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x61c35edb fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x6538a177 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x68dc8f40 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x76156cf8 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x77297fa9 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x7e4bfbf0 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8a2210e4 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x90b91e91 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x95bf78b6 fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x9b10d0e3 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xaf77aa5c fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0xb195cf6d fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbbeffe2f fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xd071bdda fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0xdc0dfba1 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xdd10fd52 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xde3a7773 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xf9f2b2ba __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xfb536b55 __fscache_alloc_page +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x1ad6b7cf qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x6d447c59 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0xc6316064 qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xd5e1f8e9 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xe0c92a25 qtree_write_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc-t10dif 0xb6896671 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0xa9b482f9 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0xc530adba make_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0785ac84 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x086b9714 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x0f254f26 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x22e413de p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x371d4695 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x3b966f52 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x3d7169c5 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x49132699 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x62d451e3 v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x649d8936 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x762c46e4 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x8110108a p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x850cc99b p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x8a31f631 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x99ade071 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa5b53eb9 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0xaac2bd4d p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0xbca17234 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0xc23cd964 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xd4133800 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0xd9fabf4d v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xed726162 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xf8025e30 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xf92fe2ad p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0xfaa4d8fe p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xfd95be53 p9_client_destroy +EXPORT_SYMBOL net/appletalk/appletalk 0x30499298 alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x347cdb60 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x7a1ea1ea aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xd5334068 atrtr_get_dev +EXPORT_SYMBOL net/atm/atm 0x09bbafed atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x28f76b99 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x31076303 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x3bc14733 vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x46381b03 atm_charge +EXPORT_SYMBOL net/atm/atm 0x472a1f8e atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x56d9c278 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x58f12639 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x867b3c15 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0xa5f93e57 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0xd20ae9b4 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xe9e8631f vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x06d97369 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x21ee039f ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3642a692 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x3a93e9da ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x6336cf92 ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x771777be ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0x95c63f5f ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0x9dc547d9 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xe3bf4ef7 ax25_listen_release +EXPORT_SYMBOL net/bluetooth/bluetooth 0x02d1beee hci_unregister_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0x10e803d4 hci_connect +EXPORT_SYMBOL net/bluetooth/bluetooth 0x12d041f6 hci_alloc_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x1778830e hci_conn_change_link_key +EXPORT_SYMBOL net/bluetooth/bluetooth 0x243c3489 hci_free_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x34a0ef86 bt_sock_poll +EXPORT_SYMBOL net/bluetooth/bluetooth 0x3b7f03d2 hci_suspend_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x43f47359 bt_sock_recvmsg +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4c2900c4 hci_register_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0x4d6786cc hci_conn_switch_role +EXPORT_SYMBOL net/bluetooth/bluetooth 0x504cc594 bt_sock_ioctl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x5796314a bt_accept_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x5963c7a1 hci_resume_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x634646b6 bt_accept_dequeue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x634e2ec5 hci_conn_security +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7028f87d bt_sock_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae bt_err +EXPORT_SYMBOL net/bluetooth/bluetooth 0x81ce359b bt_sock_wait_state +EXPORT_SYMBOL net/bluetooth/bluetooth 0x86a08f2f bt_accept_enqueue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x89914678 hci_unregister_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x8bccc1c1 hci_register_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x8c40c382 bt_sock_register +EXPORT_SYMBOL net/bluetooth/bluetooth 0x93e34209 hci_send_acl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x9caba848 hci_unregister_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0x9f5db5f7 hci_recv_fragment +EXPORT_SYMBOL net/bluetooth/bluetooth 0xa9df050c hci_conn_hold_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0xb666bfe2 hci_conn_put_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0 batostr +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc674f927 hci_conn_check_link_mode +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc8ce836e hci_get_route +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551 baswap +EXPORT_SYMBOL net/bluetooth/bluetooth 0xe16be8dc hci_register_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db bt_sock_unregister +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf747b5f2 bt_sock_link +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf83ea365 hci_send_sco +EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88 l2cap_load +EXPORT_SYMBOL net/bridge/bridge 0xc23c27a5 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x1a1ce34b ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x2a402c4a ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xdcce4cb3 ebt_do_table +EXPORT_SYMBOL net/can/can 0x14612c2d can_proto_register +EXPORT_SYMBOL net/can/can 0x2071bb6c can_rx_register +EXPORT_SYMBOL net/can/can 0x2db9e336 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x32441d34 can_rx_unregister +EXPORT_SYMBOL net/can/can 0xf21b5257 can_send +EXPORT_SYMBOL net/ieee802154/nl802154 0x3121ba55 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x3aea0644 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x72ccba5e ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x9a58ed8b ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xbfef0ab3 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xf6d90662 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x00f89df1 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x03f65d9f arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x8e2864e8 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0ec52ccd ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x23b5bd8a ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x5918f9e5 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x00a398ed nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x8e10e4cc nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x9e5dbee2 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa7a52cf7 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xacf4be07 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd35a0033 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xf0915bd7 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/tunnel4 0x8cb30858 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xed46ef80 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/ipv6 0x0523bc32 inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x1738ae55 ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x1fc7fcbd in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0x268734ae inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0x280eeb91 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x36fcf1cd xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0x415be1d1 ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0x4bad5b54 inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x4f388ff1 ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x4f53bea7 ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x614f34af ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x64875ffd ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0x6ae5a57a inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0x7bac09f1 ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0x80da904f ip6_frag_match +EXPORT_SYMBOL net/ipv6/ipv6 0x8f5ee0c2 icmpv6_send +EXPORT_SYMBOL net/ipv6/ipv6 0xa30103ca ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0xa3dbde41 inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xa750490b ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xb04c77ad inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0xb7d4c923 xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0xc2997ff2 nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/ipv6 0xc3d6c474 ip6_route_output +EXPORT_SYMBOL net/ipv6/ipv6 0xca0f5d30 ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xdb473b79 ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0xdf50be9d xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe1f7d95a ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xed2c9a7c xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0xed3d4184 rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0xf38a8283 ndisc_build_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xf8f4f66d inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0xf9029abb inet6_del_protocol +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x2046015c ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x3a437ca2 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xae22551d ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xc745dc22 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x0c5bd321 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xd79ca324 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1287e0ec ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2765c1f7 ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2776c028 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x60ddc38d ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6ca50f4e ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x70c0d1b4 ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x92561ca3 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xaadbec9b ircomm_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x0279de32 irlap_open +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x12420ddc irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x18edd399 irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0x1f721eca irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x29783db6 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0x337948c1 iriap_close +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x416e9172 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x5018c3e4 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x516d1c7a irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0x543a6db5 hashbin_new +EXPORT_SYMBOL net/irda/irda 0x550a5e27 irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x557a0b3d irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x5861b834 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x5f261aef hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0x60a1b98e alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x68018ac5 irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x70570196 iriap_open +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7d250d33 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0x7f933922 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x87fdaa54 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x886d117a async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x89136cd1 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x89f7526a irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0x8adcbf2c irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x8c8b86ee irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x94a8156e hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x9784a060 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0x97e6e5fc irlap_close +EXPORT_SYMBOL net/irda/irda 0x980fe568 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0xa26f32f8 irias_find_object +EXPORT_SYMBOL net/irda/irda 0xb1351762 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0xb7884205 hashbin_remove +EXPORT_SYMBOL net/irda/irda 0xb92cf8d7 proc_irda +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc10a5281 irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xcb27658b irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xd627dc1a hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd7640b51 irttp_dup +EXPORT_SYMBOL net/irda/irda 0xd9c6fa3c irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe09355aa irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xe0acf0d4 hashbin_find +EXPORT_SYMBOL net/irda/irda 0xe1a50c6f irias_new_object +EXPORT_SYMBOL net/irda/irda 0xe5344caa iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf39b7fe0 irda_setup_dma +EXPORT_SYMBOL net/lapb/lapb 0x23d3c034 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x47da1e0f lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x5f9bd9e9 lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0x7cd620da lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0x8f24e092 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0x8febbe1b lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0xafe8bd69 lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0xf5b2ab87 lapb_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x00cb59b9 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x0263dcd6 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x078a7d3a ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x240058d1 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x2452e180 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x567317d3 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x5b89c96f __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x6288336f ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x67ea0604 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x6c6c373d ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x6fb27063 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x763e9192 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x76e1de7e ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x7c52cca3 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x7db06e41 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x83965dbf ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x871292f5 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x8dcaaa9a __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x9eb252b6 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x9f505f7f __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xa05a6141 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xa24bc65b ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xa706bf62 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xb35db261 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xb3e4b5df ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xc9e214fb ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xcc32490a ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xccaf15cd ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xd4ac214a ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xd4cf1913 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xdbfa687e ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xe1b0a012 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xe5bf30a6 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xe7e17f06 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xeb1d0a07 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xedda6adc ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xeea74736 ieee80211_scan_completed +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x37683281 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5237eea7 unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x523e5bdf ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8130a532 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x912c4300 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc3c45565 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc8b0b153 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd0896cf7 register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd7186edd register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe6e822ea unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe72eedc7 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x7aadedf0 __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xa5d44651 __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x187e66a9 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x0be12768 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x0dd26191 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x20e50578 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x3b6a4f58 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x5483385d xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x7598e441 xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x8a60bb38 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x9f425127 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xdbce2227 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0xf6ff1e6b xt_unregister_match +EXPORT_SYMBOL net/phonet/phonet 0x12278d63 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x1fe591ec pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0x3f1cd8bb phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x4f3939b7 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0x628f673d phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0xa662dec6 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0xcb464ef6 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0xcff09362 phonet_stream_ops +EXPORT_SYMBOL net/rfkill/rfkill 0x259293d9 rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x280d315a rfkill_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0x312ace25 rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0x42c34c11 rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x4a2e3b8a rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x71335849 rfkill_set_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x81649f0c rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0x933f7135 rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0xa5f29b6b rfkill_resume_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xa931b4c1 rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0xd81342f5 rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0xe0815b01 rfkill_set_hw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xe2ffb4bd rfkill_blocked +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1a351818 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2161d7ae rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x34838895 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4551f000 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x74cba6a8 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7ee47428 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x984525a5 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xad907c73 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb71c9b16 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc2bab021 rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe282d12a key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xeada6c11 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xed4dc28b rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf0b63822 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf5300ea7 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/sunrpc/sunrpc 0xc70ae619 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x0030d700 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x13464c81 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x1fa01d94 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x2137d75e tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x250e8b59 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x26bd2137 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x73e0d336 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x7ad5e8c3 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x96f48302 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0x9dc858cc tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb27ac4a7 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xba6a8f66 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xcdc6e909 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0xc68af8a9 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x0b656bd7 wimax_reset +EXPORT_SYMBOL net/wimax/wimax 0xa2a7d5c2 wimax_rfkill +EXPORT_SYMBOL net/wireless/cfg80211 0x031ca6e0 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0ac92613 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x176e0916 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1d67a31f cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x245cf6c5 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x24efc41b wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x2b04dcb2 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x315b1d7f regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3fb4bdd6 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x50da37df wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x51934143 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x5abaf82f cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x6017fb81 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0x624bf5ce cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x642f1a75 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x66787790 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6a99b773 ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x726f813b wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x827a0b60 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x8ac81622 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x8b6f44ad cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x9b988f0f cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x9c398930 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xa2c9773d ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xb17bbf3f cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xb63abddd ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xb6fbbcf3 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc49cf7cc cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd4d14448 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xf8a98588 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/lib80211 0x07c3cd0e lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0x15fc3773 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x262951de lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x7c4fc298 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x8fe2f812 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x911d0a89 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xccb6dc18 lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0xf3bce38c lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x5077b3cf ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xf7484bef snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x2e539823 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x530dfbe8 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7a66c0ff snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xd718e710 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xce756f2e snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xd2510b6e snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x326911b6 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7cb19049 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb389aad4 snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb401ffd7 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb5d25358 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbf834054 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe03c0c74 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe8755241 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x9d9496e1 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x00575bb7 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x08cba609 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x08de2ae0 snd_card_register +EXPORT_SYMBOL sound/core/snd 0x09891e17 snd_cards +EXPORT_SYMBOL sound/core/snd 0x0f424f6b snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x17f43301 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1abe425e snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x2a48f0b8 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x2c475dbc _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x2f593337 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x3395510c snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3f7215d8 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x405dd0f2 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0x40d31cfa snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x53827552 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x574989e9 snd_device_new +EXPORT_SYMBOL sound/core/snd 0x5a629934 snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x6bdaae8c snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x6d7afe26 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x71ab618c snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x750f7e2f snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x7516db00 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x78740046 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x791ee247 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x83de298d snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x84acfd26 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x90298608 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x9eae92c9 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0x9ed9bbed snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0xa1892aa3 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0xaf2e51f0 snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xb1c9870a snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb319f145 snd_card_create +EXPORT_SYMBOL sound/core/snd 0xb4aaae78 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0xb972520e snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0xbea034c4 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0xc850c615 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xd1157735 release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0xdf624f09 snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xdf64b711 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xe0929315 snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0xe1cc180c snd_device_free +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe91148a3 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0xeaee9d35 snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xf1c15592 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0xfedbe913 snd_card_file_add +EXPORT_SYMBOL sound/core/snd-hwdep 0xa5da4368 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x141e73b7 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x162a3d33 snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb9889332 snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xcb54df19 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0xf88eb4da snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x0309f9cb snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x078961cc snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x092c48c8 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0x0e2ee319 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x0fa6b6e7 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x1522b9f1 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1fcaff4e snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x2325ec92 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x277a64c9 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x28db22b3 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0x3050498a snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x34aa6e96 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x42eb1225 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5467ffbd snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x5528070a snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x568e6d8a snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x596c5a52 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x63df3510 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x655dc609 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x7304b360 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x7e0bd169 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x857c2657 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x86360451 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x88d4be90 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x8a267936 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x8d6c7c8e snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x92b21820 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x998c08ef snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xa1055053 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xb2560b03 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0xb2743ae3 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xb27b9842 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc4bd0d08 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0xccfde388 snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd9a062f5 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xd9b1fcba snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xe2230659 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xec3c0b24 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xf33f9c9e snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf85f2cf1 snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0b3c1fea snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0e64016c snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1509bf0e snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0x15af8710 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0x40b71f4c snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4954643b snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5157980f snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x58cc9c5c snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x80f8e86d snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x876c914d snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa848ad96 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaed2f6a6 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb1e6d833 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0xbd2ff19d snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe2c44137 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xef56e523 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf30ba538 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-timer 0x00650bfc snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x011dcd89 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x035b49ca snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x4f3ed1ec snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x537b298b snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x55810a03 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0x90a09d96 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0x976b8650 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0xb594db66 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0xb73d63b0 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xc3771350 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xed2f3ce9 snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0xfdbb70a3 snd_timer_pause +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x187c31f0 snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x14d5a871 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1a593c04 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x51d9277c snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x5ba4e5ba snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x68ac1b11 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9281a4fd snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe7169b06 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe9312aca snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf4641cfa snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x2628ef94 snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x506622eb snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x56795b57 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb5d737a7 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb7fd51df snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbb090630 snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbfdc622a snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcce076ec snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xea01479d snd_vx_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x188dc04e snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x29d5b7ae snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x3886afb0 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x6da41141 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x967b5942 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xddbe4f5e snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x4a09f1db snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x91a92c5b snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xce808793 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe0b54a11 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe751d787 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xed63573c snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x2f31f28f snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x32fc4d61 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x732f230a snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa3eaaa65 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x714e3063 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xb6988df8 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x2c84d5c2 snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xa00ca888 snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x1e33dcfc snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2878a751 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x4a483df9 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x56a2b56a snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb11c2f38 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-i2c 0x0fec5cc5 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x6a94a658 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x73e36a6c snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x9ab776a6 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0x9e2ad31d snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xc20ee236 snd_i2c_sendbytes +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x09f226d3 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x30e30bfa snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x60b94260 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7115166e snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7fbfdda5 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xb9c77632 snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc8134774 snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc8cab222 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe15bc8b2 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xff5c8fe3 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x5be799eb snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xd3ad5170 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xd93913de snd_sb16dsp_configure +EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x8a619585 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/ad1848 0xe431d2ca ad1848_init +EXPORT_SYMBOL sound/oss/mpu401 0x565c1cfe attach_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x61641749 probe_mpu401 +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x9d0ed9f0 probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xa9e14ebf sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x3652ecbb sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x56f1eed8 synth_devs +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x8e602f50 midi_devs +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xa9724898 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb1e02e7f sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xdc0d3224 audio_devs +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xeeeeacba sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0x5bec2171 probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x13f0aa78 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x17545bc2 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2a7c6dbe snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x375779e5 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5bb243b7 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5cbed12d snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x627856a2 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7d0e8936 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8fcd0a98 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x97a53733 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa3e6d260 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa4ddd3e3 snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xad27d170 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbbd2481c snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbd64644a snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc7f7a5f3 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd9c1a787 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2128c8ff snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x3073bc9e snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x384802a0 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x515572f1 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6f0da2c1 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x76b0355b snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xbcd5cf5f snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xcdf59fba snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd87be2c3 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x8e2fc22a snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x43c325ec snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x8ddea587 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xfea7ab71 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x26c56410 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x5c32ea6f snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd8cb5e8b snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xda90b947 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xe4418eda snd_trident_stop_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x2181cd7b uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x01c4e169 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x411dfb32 register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x680a61dc register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x8c0aebd8 sound_class +EXPORT_SYMBOL sound/soundcore 0x9529ad8e register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xefa8aa4e register_sound_special +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x200647a0 snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x470e5fca snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x72c4ec86 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa0c227eb snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xda375b7d snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe436ddc8 snd_emux_register +EXPORT_SYMBOL sound/synth/snd-util-mem 0x205c58e7 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x4519a08c snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x474167c0 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x4df8c35f __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x5f409fde snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xbcc022ab __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xda6b3b47 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xe79e2a98 snd_util_mem_avail +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x727f1b1a snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x060c0955 lirc_get_pdata +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xd2ab09ea lirc_register_driver +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00160b99 fb_get_mode +EXPORT_SYMBOL vmlinux 0x00213550 irq_desc +EXPORT_SYMBOL vmlinux 0x002b6d30 genphy_update_link +EXPORT_SYMBOL vmlinux 0x00336864 pipe_lock +EXPORT_SYMBOL vmlinux 0x003b551d netif_napi_del +EXPORT_SYMBOL vmlinux 0x0058ffb8 register_con_driver +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x009d5b00 pci_disable_link_state +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00c80931 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x00d38a8e jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x00fbed11 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x0101f5b6 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x01116315 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x01188d5c phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x0126e5b0 dev_trans_start +EXPORT_SYMBOL vmlinux 0x0155be5f pci_iomap +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019104c2 module_layout +EXPORT_SYMBOL vmlinux 0x019606a1 udp_ioctl +EXPORT_SYMBOL vmlinux 0x01a0a27e end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x01a0f8ae __ide_dma_bad_drive +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01b86dc7 pcim_pin_device +EXPORT_SYMBOL vmlinux 0x01e9f0ee _spin_unlock +EXPORT_SYMBOL vmlinux 0x01ea5142 __lock_page +EXPORT_SYMBOL vmlinux 0x01fec898 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0x0222f427 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x02384e8d ioremap_flags +EXPORT_SYMBOL vmlinux 0x02614c82 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x02746392 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x0274bb4f __pci_register_driver +EXPORT_SYMBOL vmlinux 0x028d62f7 dma_spin_lock +EXPORT_SYMBOL vmlinux 0x02a161c0 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02b38905 pci_clear_master +EXPORT_SYMBOL vmlinux 0x02be7fd7 force_sig +EXPORT_SYMBOL vmlinux 0x02d591d6 of_get_next_child +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02dab199 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x034e4950 tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x03714b82 __secpath_destroy +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x03a752ce pci_release_regions +EXPORT_SYMBOL vmlinux 0x03b4b841 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x03b52d6a scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03e28ddd d_genocide +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x04121264 revert_creds +EXPORT_SYMBOL vmlinux 0x0413920c sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x0414a263 names_cachep +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x044692fc do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04c05412 do_munmap +EXPORT_SYMBOL vmlinux 0x04dab6fc i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0x04dda680 kset_register +EXPORT_SYMBOL vmlinux 0x050918ce xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x052867bf dquot_destroy +EXPORT_SYMBOL vmlinux 0x054f1ba1 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0x0558188c blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x058269f6 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x05a1fe21 skb_checksum_help +EXPORT_SYMBOL vmlinux 0x05a514a1 _insl_ns +EXPORT_SYMBOL vmlinux 0x05b2178e jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x05b435b4 init_buffer +EXPORT_SYMBOL vmlinux 0x05b4e835 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x05bf8cf1 simple_fsync +EXPORT_SYMBOL vmlinux 0x0607aea1 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x06107a97 may_umount_tree +EXPORT_SYMBOL vmlinux 0x06136b47 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x062c0481 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x062d05a9 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x063d249c __bread +EXPORT_SYMBOL vmlinux 0x063f9f63 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x066352dd bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x0675c7eb atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0x06775521 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x069dccef phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x06a1ac3d generic_delete_inode +EXPORT_SYMBOL vmlinux 0x06a5faaa generic_ide_ioctl +EXPORT_SYMBOL vmlinux 0x06b45e93 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x06c9ac43 __devm_release_region +EXPORT_SYMBOL vmlinux 0x06dd976f dev_unicast_sync +EXPORT_SYMBOL vmlinux 0x06e244eb blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x06e76c2f bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x06ef6b9a dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0706b0b6 request_key_async +EXPORT_SYMBOL vmlinux 0x0708bf9e security_task_getsecid +EXPORT_SYMBOL vmlinux 0x0727412d macio_request_resources +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x0734c226 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x074f3199 pci_map_rom +EXPORT_SYMBOL vmlinux 0x07527e0d __kfifo_get +EXPORT_SYMBOL vmlinux 0x075c5a89 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x07852234 block_commit_write +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x079ca14a nonseekable_open +EXPORT_SYMBOL vmlinux 0x079e22d4 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07b686e3 release_sock +EXPORT_SYMBOL vmlinux 0x07c508b3 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x07c79c5d seq_escape +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07e6c082 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x08007b4e tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x082ab593 get_sb_ns +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0850451e tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x08705421 switch_mmu_context +EXPORT_SYMBOL vmlinux 0x089e5b6c __init_rwsem +EXPORT_SYMBOL vmlinux 0x08a64e7c kfifo_free +EXPORT_SYMBOL vmlinux 0x08cbaf9e pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x08df0493 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL vmlinux 0x0936f760 tcp_disconnect +EXPORT_SYMBOL vmlinux 0x093dca3d i2c_master_send +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x09639192 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x09857489 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x0985da55 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x09935920 of_device_uevent +EXPORT_SYMBOL vmlinux 0x09bb165a setup_arg_pages +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09dd3791 of_find_device_by_phandle +EXPORT_SYMBOL vmlinux 0x0a179db6 pci_pme_capable +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a5b40ed xfrm_state_update +EXPORT_SYMBOL vmlinux 0x0a8e0783 mpage_readpages +EXPORT_SYMBOL vmlinux 0x0a922772 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x0aadcc49 mdiobus_free +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0ad981c2 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x0ae3b2ec dcache_dir_open +EXPORT_SYMBOL vmlinux 0x0b1243c7 keyring_clear +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b451a42 bd_claim +EXPORT_SYMBOL vmlinux 0x0b4f3fde skb_under_panic +EXPORT_SYMBOL vmlinux 0x0b55dc23 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b77f63b free_task +EXPORT_SYMBOL vmlinux 0x0b7f2c46 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x0ba07ba4 pci_release_region +EXPORT_SYMBOL vmlinux 0x0ba69502 block_write_begin +EXPORT_SYMBOL vmlinux 0x0bb3438d bmap +EXPORT_SYMBOL vmlinux 0x0be79ab3 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x0beea1d9 set_create_files_as +EXPORT_SYMBOL vmlinux 0x0c03ccee __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x0c12e626 __debugger_bpt +EXPORT_SYMBOL vmlinux 0x0c3b49ae unregister_filesystem +EXPORT_SYMBOL vmlinux 0x0c4648a3 inet_addr_type +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cd3cf92 _write_unlock +EXPORT_SYMBOL vmlinux 0x0cd93500 d_find_alias +EXPORT_SYMBOL vmlinux 0x0ce6011a sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x0cfe2ef5 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x0d0af8d3 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x0d4bb9cc pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d550127 pci_pme_active +EXPORT_SYMBOL vmlinux 0x0d84301a netdev_set_master +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dabd6de netpoll_print_options +EXPORT_SYMBOL vmlinux 0x0dbf38b8 mol_trampoline +EXPORT_SYMBOL vmlinux 0x0ddda71e nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x0de27ce8 path_put +EXPORT_SYMBOL vmlinux 0x0de65184 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x0ded10ff __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x0df15005 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x0e1906d3 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x0e2378e1 flush_tlb_range +EXPORT_SYMBOL vmlinux 0x0e2c26c8 pipe_to_file +EXPORT_SYMBOL vmlinux 0x0e42aaf8 scsi_unregister +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e584d36 get_sb_single +EXPORT_SYMBOL vmlinux 0x0e5d0f13 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0x0e7715e7 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x0eac7232 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x0eb037bc blkdev_get +EXPORT_SYMBOL vmlinux 0x0eb3dc4e phy_device_register +EXPORT_SYMBOL vmlinux 0x0eb48999 pci_find_bus +EXPORT_SYMBOL vmlinux 0x0ecb65da deactivate_super +EXPORT_SYMBOL vmlinux 0x0ed78f3a tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x0ee0d35c journal_update_format +EXPORT_SYMBOL vmlinux 0x0ee83d0c sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x0eeba535 macio_release_resources +EXPORT_SYMBOL vmlinux 0x0eed84d3 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x0ef1e824 send_sig +EXPORT_SYMBOL vmlinux 0x0ef20db1 kernstart_addr +EXPORT_SYMBOL vmlinux 0x0ef22ade remove_wait_queue +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL vmlinux 0x0f400077 udp_poll +EXPORT_SYMBOL vmlinux 0x0f4285f3 generic_file_llseek +EXPORT_SYMBOL vmlinux 0x0f57d5ae _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x0f60ecf7 dquot_commit_info +EXPORT_SYMBOL vmlinux 0x0f84e477 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x0fa90921 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x0fac891c pcim_iomap +EXPORT_SYMBOL vmlinux 0x0fd1a893 skb_make_writable +EXPORT_SYMBOL vmlinux 0x0fd764ff vfs_follow_link +EXPORT_SYMBOL vmlinux 0x0fd83260 sock_kfree_s +EXPORT_SYMBOL vmlinux 0x0fdc01f3 single_open +EXPORT_SYMBOL vmlinux 0x10314fc8 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x1034f5f0 journal_create +EXPORT_SYMBOL vmlinux 0x1038dc6e tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x10485224 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x1055898a eth_header_cache +EXPORT_SYMBOL vmlinux 0x105df24b tty_register_device +EXPORT_SYMBOL vmlinux 0x105e62df __kill_fasync +EXPORT_SYMBOL vmlinux 0x1082647e ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x108ee62e journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x10bd6e2c pci_free_consistent +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10ee7f0e tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x111984ff get_empty_filp +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x11363eb8 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x113d3436 idr_pre_get +EXPORT_SYMBOL vmlinux 0x11576f0f lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x115e5145 bio_sector_offset +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x11663cec adb_register +EXPORT_SYMBOL vmlinux 0x116b2fa9 get_phy_id +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118e4fdb bio_init +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a41041 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0x11a8d792 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x11b1495e phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x11b293a9 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0x11b55744 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x11c2291e unlock_buffer +EXPORT_SYMBOL vmlinux 0x11df34d6 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x11e1642c skb_copy_expand +EXPORT_SYMBOL vmlinux 0x11e982ac posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x1207a9ca matroxfb_DAC_in +EXPORT_SYMBOL vmlinux 0x121e8014 skb_checksum +EXPORT_SYMBOL vmlinux 0x122b9d83 ida_pre_get +EXPORT_SYMBOL vmlinux 0x129adde7 pci_match_id +EXPORT_SYMBOL vmlinux 0x12a9213d kobject_put +EXPORT_SYMBOL vmlinux 0x12b7d025 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x12bfd73c lock_may_write +EXPORT_SYMBOL vmlinux 0x12cb7a4a __alloc_skb +EXPORT_SYMBOL vmlinux 0x12d028f3 balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0x12d06339 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12e1de15 task_nice +EXPORT_SYMBOL vmlinux 0x12e5ef0c rtas_set_power_level +EXPORT_SYMBOL vmlinux 0x133cf9ed get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x1354261f mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x13ad08dd kfree_skb +EXPORT_SYMBOL vmlinux 0x13ad3686 fd_install +EXPORT_SYMBOL vmlinux 0x13bca5c8 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x1407c6e7 kmap_prot +EXPORT_SYMBOL vmlinux 0x144f63bf gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x148f4b45 bio_copy_user +EXPORT_SYMBOL vmlinux 0x149a804a scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x14da33a1 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x14dbd9ca scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x14e6c312 da903x_query_status +EXPORT_SYMBOL vmlinux 0x14efbac0 blk_run_queue +EXPORT_SYMBOL vmlinux 0x1526803f do_truncate +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x1556cf4a dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0x155b5998 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x159914ce i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0x1599da8e vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x15ed95d3 _read_lock +EXPORT_SYMBOL vmlinux 0x1609a16d ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x160bd45c rtas_token +EXPORT_SYMBOL vmlinux 0x1610c3b4 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x16177dd9 elevator_exit +EXPORT_SYMBOL vmlinux 0x16250200 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x163d4f1b __blk_run_queue +EXPORT_SYMBOL vmlinux 0x164b3331 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x166b5c73 neigh_event_ns +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x17226e9e audit_log_format +EXPORT_SYMBOL vmlinux 0x173ad8fa udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x1746dacf filp_close +EXPORT_SYMBOL vmlinux 0x17513ace elevator_init +EXPORT_SYMBOL vmlinux 0x176eb146 inode_init_once +EXPORT_SYMBOL vmlinux 0x179b55de rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x179ec4b8 dcache_lock +EXPORT_SYMBOL vmlinux 0x179fbdb7 contig_page_data +EXPORT_SYMBOL vmlinux 0x17aa156a __ucmpdi2 +EXPORT_SYMBOL vmlinux 0x17d0632d journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x17d9952e seq_printf +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17e84529 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x17ea684f dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x18046c47 d_add_ci +EXPORT_SYMBOL vmlinux 0x180a0896 wireless_spy_update +EXPORT_SYMBOL vmlinux 0x18323d5a dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x183c0c07 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1850e3f8 pci_get_device +EXPORT_SYMBOL vmlinux 0x185993a2 cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x186133e6 pipe_unlock +EXPORT_SYMBOL vmlinux 0x18721e2b pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x18af99f4 dev_mc_add +EXPORT_SYMBOL vmlinux 0x18b0db16 phy_disconnect +EXPORT_SYMBOL vmlinux 0x19142bf6 kset_unregister +EXPORT_SYMBOL vmlinux 0x193fca6b swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0x194941fe cfb_imageblit +EXPORT_SYMBOL vmlinux 0x19557b94 file_fsync +EXPORT_SYMBOL vmlinux 0x19600062 pci_reenable_device +EXPORT_SYMBOL vmlinux 0x19610e1f cpu_all_bits +EXPORT_SYMBOL vmlinux 0x197ea3b0 do_splice_from +EXPORT_SYMBOL vmlinux 0x199c957b ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19aecbbf dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x19b82d80 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x19cbb4b5 down_timeout +EXPORT_SYMBOL vmlinux 0x19eff644 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x1a1c1033 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x1a2fe892 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a54d44d boot_tvec_bases +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b01df7a pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x1b0d1322 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x1b3441fe jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x1b442f36 pci_bus_type +EXPORT_SYMBOL vmlinux 0x1b5fdff2 of_get_cpu_node +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b95f6c8 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1ba88009 skb_copy +EXPORT_SYMBOL vmlinux 0x1baab424 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x1bbdccd2 devm_ioremap_prot +EXPORT_SYMBOL vmlinux 0x1bc4ff03 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0x1bcc9408 km_state_expired +EXPORT_SYMBOL vmlinux 0x1bee55e4 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x1bff57f7 filemap_fault +EXPORT_SYMBOL vmlinux 0x1c33b23c is_container_init +EXPORT_SYMBOL vmlinux 0x1c3ffd1b register_8022_client +EXPORT_SYMBOL vmlinux 0x1c459aa2 input_free_device +EXPORT_SYMBOL vmlinux 0x1c5b2c15 pmu_wait_complete +EXPORT_SYMBOL vmlinux 0x1c6af446 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x1c80de9c ip_send_check +EXPORT_SYMBOL vmlinux 0x1c9257f8 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x1c9921b3 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x1cba5efd find_get_page +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cd88dbb skb_seq_read +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d3c1faa idr_get_new_above +EXPORT_SYMBOL vmlinux 0x1d3f7e2e give_up_console +EXPORT_SYMBOL vmlinux 0x1d3fe5f7 clocksource_register +EXPORT_SYMBOL vmlinux 0x1d884d04 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x1d92ebec mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x1dbebbb7 __napi_schedule +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1df6eaaf __scm_destroy +EXPORT_SYMBOL vmlinux 0x1dfaca4f dev_add_pack +EXPORT_SYMBOL vmlinux 0x1e06d68b fb_find_mode +EXPORT_SYMBOL vmlinux 0x1e0a722f __getblk +EXPORT_SYMBOL vmlinux 0x1e255553 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x1e28079c bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x1e41ada3 register_framebuffer +EXPORT_SYMBOL vmlinux 0x1e6377e1 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e78f3f9 inode_change_ok +EXPORT_SYMBOL vmlinux 0x1e8aa7c0 irq_stat +EXPORT_SYMBOL vmlinux 0x1e8eac6b kill_pid +EXPORT_SYMBOL vmlinux 0x1e9258f0 tc_classify +EXPORT_SYMBOL vmlinux 0x1ebc0920 scsi_prep_return +EXPORT_SYMBOL vmlinux 0x1ebf0e81 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x1ec43b80 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1ed3ecaf devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x1ede0fe1 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x1eebf04d tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x1ef5c1d8 eth_header_parse +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f0a7f17 tcf_hash_search +EXPORT_SYMBOL vmlinux 0x1f5549cd up_write +EXPORT_SYMBOL vmlinux 0x1f75501a disk_stack_limits +EXPORT_SYMBOL vmlinux 0x1f7b0208 pci_device_from_OF_node +EXPORT_SYMBOL vmlinux 0x1fbf0258 lock_fb_info +EXPORT_SYMBOL vmlinux 0x1fcfcee1 put_disk +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x20030ecd ioremap +EXPORT_SYMBOL vmlinux 0x20217bed blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x202c5832 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x204d5c45 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x206484af sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x20bb94f2 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x20cb40b1 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x21033415 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x2109337e machine_id +EXPORT_SYMBOL vmlinux 0x212202c0 mdiobus_register +EXPORT_SYMBOL vmlinux 0x21290a3e filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x2129c28d ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x212ac186 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x2157cf68 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x215ba92a send_sig_info +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x217b85bf matroxfb_wait_for_sync +EXPORT_SYMBOL vmlinux 0x217c75b8 d_path +EXPORT_SYMBOL vmlinux 0x2182dd2e kmem_cache_size +EXPORT_SYMBOL vmlinux 0x21b5bb15 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x21c6badc cdev_del +EXPORT_SYMBOL vmlinux 0x21c803d4 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x21cd1cc7 abort_creds +EXPORT_SYMBOL vmlinux 0x21e0f650 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x2206f5b6 security_path_link +EXPORT_SYMBOL vmlinux 0x2215b122 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2240f560 pci_read_irq_line +EXPORT_SYMBOL vmlinux 0x2253986e tcp_parse_options +EXPORT_SYMBOL vmlinux 0x225a00d4 pci_set_mwi +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2283a1ab blk_fetch_request +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22c20a33 flush_tlb_mm +EXPORT_SYMBOL vmlinux 0x22c47006 request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x22ca4cc3 dq_data_lock +EXPORT_SYMBOL vmlinux 0x22fe8ce3 skb_find_text +EXPORT_SYMBOL vmlinux 0x230024f1 skb_put +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x23354075 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x233fd459 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x23493e6a end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x238ac800 blk_start_request +EXPORT_SYMBOL vmlinux 0x238d92c5 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x23adf749 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x23c94c06 posix_acl_permission +EXPORT_SYMBOL vmlinux 0x23f7a117 revalidate_disk +EXPORT_SYMBOL vmlinux 0x23fa7c3a tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x23fcd92e input_register_device +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x2422e363 elv_rb_find +EXPORT_SYMBOL vmlinux 0x24434815 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24642374 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x2464b603 save_mount_options +EXPORT_SYMBOL vmlinux 0x2483e4da sock_no_accept +EXPORT_SYMBOL vmlinux 0x24d49bd3 swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0x24d84366 pmac_suspend_agp_for_card +EXPORT_SYMBOL vmlinux 0x24da53af vfs_writev +EXPORT_SYMBOL vmlinux 0x24dcedf6 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x24e7a0fe sock_create_lite +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x250d6636 sock_no_poll +EXPORT_SYMBOL vmlinux 0x25240757 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x25453672 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x2559187e cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x256b7c23 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x257eaff8 of_gpio_simple_xlate +EXPORT_SYMBOL vmlinux 0x2581543c complete +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x25aea10b __serio_register_driver +EXPORT_SYMBOL vmlinux 0x25bc8c3a proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x25c918de call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL vmlinux 0x25f3bd2e atomic64_xchg +EXPORT_SYMBOL vmlinux 0x26269f2b kunmap_atomic +EXPORT_SYMBOL vmlinux 0x26322777 scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x26362395 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x26477c07 __vmalloc +EXPORT_SYMBOL vmlinux 0x267c83f6 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x269053ea sock_no_bind +EXPORT_SYMBOL vmlinux 0x26bb043c in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26fb1a83 bio_pair_release +EXPORT_SYMBOL vmlinux 0x270689bc tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x2706978c pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0x271f4d2a finish_wait +EXPORT_SYMBOL vmlinux 0x2727a8c3 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x272c9acd pmu_battery_count +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x274fcab5 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x277b2818 pci_iounmap +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x28026999 nla_reserve +EXPORT_SYMBOL vmlinux 0x28353afc scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x2856062d matroxfb_unregister_driver +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x2896b1c3 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28cb3a8a fput +EXPORT_SYMBOL vmlinux 0x28cf3e70 up +EXPORT_SYMBOL vmlinux 0x28e44003 vfs_write +EXPORT_SYMBOL vmlinux 0x29024a4f blk_end_request_all +EXPORT_SYMBOL vmlinux 0x29062b9f prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x29067883 wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x29280803 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29766a93 down_killable +EXPORT_SYMBOL vmlinux 0x29a76759 security_path_mknod +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29c9b4dc scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x29ec4a6f register_exec_domain +EXPORT_SYMBOL vmlinux 0x29f274d5 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x29f2a2b3 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x29f714e5 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x2a16e6d0 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x2a2a96ca xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a30a8ce get_fs_type +EXPORT_SYMBOL vmlinux 0x2a67ceef tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x2a9a2913 generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x2a9ccdf0 register_qdisc +EXPORT_SYMBOL vmlinux 0x2aa042b7 scsi_device_put +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2acc1281 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x2acdc16c filp_open +EXPORT_SYMBOL vmlinux 0x2afcb47e cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x2b03e3b5 fddi_type_trans +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b12925d cpumask_next_and +EXPORT_SYMBOL vmlinux 0x2b1e62d7 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x2b6fd689 load_nls +EXPORT_SYMBOL vmlinux 0x2b8a0a15 swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x2b9888ea __scsi_put_command +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bc61da1 program_check_exception +EXPORT_SYMBOL vmlinux 0x2be096aa vm_map_ram +EXPORT_SYMBOL vmlinux 0x2c1b3cb8 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x2c6bf54c seq_putc +EXPORT_SYMBOL vmlinux 0x2c89dc15 pci_restore_state +EXPORT_SYMBOL vmlinux 0x2cb9a329 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x2cc5d5a4 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x2cd587b2 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x2d00ad13 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x2d18a2e1 blk_rq_init +EXPORT_SYMBOL vmlinux 0x2d5e2b75 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x2d740469 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2da97364 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x2dad9dfc scsi_print_result +EXPORT_SYMBOL vmlinux 0x2db374e8 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dd69d84 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x2de3cfd4 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x2dff1af0 neigh_compat_output +EXPORT_SYMBOL vmlinux 0x2e02aff5 of_translate_address +EXPORT_SYMBOL vmlinux 0x2e081625 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x2e1d4040 __scm_send +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e2d2ada set_device_ro +EXPORT_SYMBOL vmlinux 0x2e2d6707 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e64f943 udp_proc_register +EXPORT_SYMBOL vmlinux 0x2e844804 sync_page_range +EXPORT_SYMBOL vmlinux 0x2e900daf tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x2eb7bebf qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x2ecf0ea0 km_new_mapping +EXPORT_SYMBOL vmlinux 0x2ed27abf __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x2ee3a7d9 dev_addr_add +EXPORT_SYMBOL vmlinux 0x2f1a48b9 blk_register_region +EXPORT_SYMBOL vmlinux 0x2f248ac9 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x2f249744 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0x2f3ca7e0 inet_put_port +EXPORT_SYMBOL vmlinux 0x2f444c3c phy_connect +EXPORT_SYMBOL vmlinux 0x2f49e7b2 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x2f53e21d register_chrdev +EXPORT_SYMBOL vmlinux 0x2fd0f986 swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x2fe18611 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x2ff0adef splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x2ff4c989 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x300425a1 of_find_all_nodes +EXPORT_SYMBOL vmlinux 0x3026bf56 complete_request_key +EXPORT_SYMBOL vmlinux 0x30522585 pci_disable_device +EXPORT_SYMBOL vmlinux 0x30acf2ba ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x30afaa5a rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x30e25c93 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x30e78b7b skb_split +EXPORT_SYMBOL vmlinux 0x3103de0e generic_unplug_device +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x310c68fb unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x31284305 bdget_disk +EXPORT_SYMBOL vmlinux 0x31448a4a mempool_create_node +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x316ea56c get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x31712231 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x318810b9 idr_find +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x3197d626 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x31a49605 vmtruncate +EXPORT_SYMBOL vmlinux 0x31c0bd8c blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x31cb676a unlock_page +EXPORT_SYMBOL vmlinux 0x31dfd0de pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x3233ce06 smp_call_function_many +EXPORT_SYMBOL vmlinux 0x3234d401 scsi_dma_map +EXPORT_SYMBOL vmlinux 0x32694faa inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x327994e5 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x327b9c1b pmu_poll_adb +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x328a05f1 strncpy +EXPORT_SYMBOL vmlinux 0x32a00982 scsi_device_get +EXPORT_SYMBOL vmlinux 0x32a5daac jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x32b510a7 pcibios_fixup_bus +EXPORT_SYMBOL vmlinux 0x32d5345a qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x32fa0f4b lease_get_mtime +EXPORT_SYMBOL vmlinux 0x331ccf98 con_copy_unimap +EXPORT_SYMBOL vmlinux 0x33330ed0 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x3334872b i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0x3339311f tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x339d4841 prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x33b3949a add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x33b84f74 copy_page +EXPORT_SYMBOL vmlinux 0x33efc536 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x33fa42c3 journal_forget +EXPORT_SYMBOL vmlinux 0x33fd896c kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x33ff7a90 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x3413690b tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x341972ca init_task +EXPORT_SYMBOL vmlinux 0x341dbfa3 __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x34478404 cfb_fillrect +EXPORT_SYMBOL vmlinux 0x344adbd5 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x344b646d clear_user_page +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x348fc71c phy_register_fixup +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349a0f5c pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a53fb7 fb_set_cmap +EXPORT_SYMBOL vmlinux 0x34b4f1b9 create_empty_buffers +EXPORT_SYMBOL vmlinux 0x34d3f90c kthread_create +EXPORT_SYMBOL vmlinux 0x34f8a40c qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x34ff6327 do_sync_write +EXPORT_SYMBOL vmlinux 0x35038676 register_key_type +EXPORT_SYMBOL vmlinux 0x35148962 __neigh_event_send +EXPORT_SYMBOL vmlinux 0x354c7132 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0x35505a25 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x35571ca3 hippi_type_trans +EXPORT_SYMBOL vmlinux 0x356c5ec0 find_or_create_page +EXPORT_SYMBOL vmlinux 0x3588f853 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x360c55b1 proc_mkdir +EXPORT_SYMBOL vmlinux 0x361b3f83 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x3647b220 kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x365fe5c6 matroxfb_vgaHWrestore +EXPORT_SYMBOL vmlinux 0x36730920 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x36742e50 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0x367b872b generic_read_dir +EXPORT_SYMBOL vmlinux 0x36a37f1e fb_class +EXPORT_SYMBOL vmlinux 0x36b2d000 pci_dev_put +EXPORT_SYMBOL vmlinux 0x36b9a7da write_cache_pages +EXPORT_SYMBOL vmlinux 0x36d4e69e br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x36e9580f textsearch_destroy +EXPORT_SYMBOL vmlinux 0x36f4955f sg_next +EXPORT_SYMBOL vmlinux 0x37030ed2 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x3706a7eb inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x370b97cf tty_port_close +EXPORT_SYMBOL vmlinux 0x371d2130 check_legacy_ioport +EXPORT_SYMBOL vmlinux 0x37383edd rtas_get_power_level +EXPORT_SYMBOL vmlinux 0x374286df key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374aaddc ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x374b9f66 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x37a3fac2 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x37a9798f mempool_free +EXPORT_SYMBOL vmlinux 0x37af78e2 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37e69601 vc_cons +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37ec5d20 sock_create +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381420d4 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0x3819a719 simple_rmdir +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x3846d6eb vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x38886a9c submit_bio +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38964363 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x389d172f inet_sendmsg +EXPORT_SYMBOL vmlinux 0x38b75781 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38fb9933 tty_std_termios +EXPORT_SYMBOL vmlinux 0x3906b93c _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x3922d605 _spin_trylock +EXPORT_SYMBOL vmlinux 0x393879c8 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x3957af95 scsi_finish_command +EXPORT_SYMBOL vmlinux 0x395a491f blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x3962f2a6 tty_check_change +EXPORT_SYMBOL vmlinux 0x39651836 bd_release +EXPORT_SYMBOL vmlinux 0x396d09f3 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x397371b8 inode_permission +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x398fc1da ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x3997a397 eth_validate_addr +EXPORT_SYMBOL vmlinux 0x39b0ee56 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x39b780d0 __register_binfmt +EXPORT_SYMBOL vmlinux 0x39bdff60 phy_print_status +EXPORT_SYMBOL vmlinux 0x39ca3ce4 swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0x39d57c42 generic_make_request +EXPORT_SYMBOL vmlinux 0x39f21209 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x3a16a8b0 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x3a20ee14 ide_wait_stat +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a4fbf1b bio_alloc +EXPORT_SYMBOL vmlinux 0x3a69ee24 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0x3a8e0e8f gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af52c39 nobh_write_begin +EXPORT_SYMBOL vmlinux 0x3b125119 of_find_property +EXPORT_SYMBOL vmlinux 0x3b14f1b1 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b3a36d6 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x3b56da9b pci_find_capability +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bca3c2c xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c6b781c per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cd9bb76 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3d1c7c70 blk_complete_request +EXPORT_SYMBOL vmlinux 0x3d3ade66 of_release_dev +EXPORT_SYMBOL vmlinux 0x3d3b6be4 of_phy_connect +EXPORT_SYMBOL vmlinux 0x3d4f0139 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x3d624573 touch_atime +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d6f2dda __pagevec_release +EXPORT_SYMBOL vmlinux 0x3d9115cf nobh_write_end +EXPORT_SYMBOL vmlinux 0x3d9507ca seq_bitmap +EXPORT_SYMBOL vmlinux 0x3da99e2d dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3ddf46c9 kill_pgrp +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e468353 ilookup5 +EXPORT_SYMBOL vmlinux 0x3e50a148 do_splice_to +EXPORT_SYMBOL vmlinux 0x3e71f409 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x3e78fa62 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ef97c38 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f18f244 get_user_pages +EXPORT_SYMBOL vmlinux 0x3f406a3b enable_kernel_altivec +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f4bc457 elv_rb_add +EXPORT_SYMBOL vmlinux 0x3f87a446 of_match_device +EXPORT_SYMBOL vmlinux 0x3f972b5a blk_put_request +EXPORT_SYMBOL vmlinux 0x3fe29181 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x3ff74ba5 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x4030b4e5 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x4040cfb2 devm_free_irq +EXPORT_SYMBOL vmlinux 0x4042836e prepare_binprm +EXPORT_SYMBOL vmlinux 0x40488124 sg_last +EXPORT_SYMBOL vmlinux 0x404e4bcb ide_dma_off +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x40630c9a request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x40633d1b security_file_permission +EXPORT_SYMBOL vmlinux 0x409c962d xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40af2852 of_dev_put +EXPORT_SYMBOL vmlinux 0x40b53fea alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x40dca771 take_over_console +EXPORT_SYMBOL vmlinux 0x40e83e25 dquot_commit +EXPORT_SYMBOL vmlinux 0x40f1ad10 tb_ticks_per_jiffy +EXPORT_SYMBOL vmlinux 0x40f31a5e napi_complete +EXPORT_SYMBOL vmlinux 0x4101a975 ide_fixstring +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41304058 check_media_bay +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x415714b6 down_read +EXPORT_SYMBOL vmlinux 0x415a20ee __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x415f0ec0 blk_peek_request +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41b8d213 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x41ba3259 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x41d271e9 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x41fe059f llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x420d6c32 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x4214cff2 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x4215cbcd vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x42347de1 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x426d7e6e file_permission +EXPORT_SYMBOL vmlinux 0x427953a5 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x429328d9 _spin_lock +EXPORT_SYMBOL vmlinux 0x42d341b8 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x42fa0ce3 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x43051c79 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x430c68f0 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4359f03c input_unregister_device +EXPORT_SYMBOL vmlinux 0x435c85b3 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x436a97fb kobject_init +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x43737974 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x4464da88 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x4469e928 thaw_process +EXPORT_SYMBOL vmlinux 0x44811138 kill_block_super +EXPORT_SYMBOL vmlinux 0x4485382b key_negate_and_link +EXPORT_SYMBOL vmlinux 0x448aec31 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x448b5a5d i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x4495ea20 sock_register +EXPORT_SYMBOL vmlinux 0x44a79dd3 netif_device_detach +EXPORT_SYMBOL vmlinux 0x44b47ffe alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44bbae86 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x44e31664 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x45221260 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x4534259f journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x453cb0e1 simple_unlink +EXPORT_SYMBOL vmlinux 0x453da644 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x45746e5a jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45816446 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x4596db6a sys_sigreturn +EXPORT_SYMBOL vmlinux 0x45fdc3c4 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x4607b640 nla_put +EXPORT_SYMBOL vmlinux 0x460a46ba pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x461ebfa0 __copy_tofrom_user +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x465126e9 ppc_md +EXPORT_SYMBOL vmlinux 0x465757c3 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x4665248a vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x466f6fb9 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x4683f081 simple_write_end +EXPORT_SYMBOL vmlinux 0x4690f063 journal_errno +EXPORT_SYMBOL vmlinux 0x46b1f5e8 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x46cb9c09 dev_gro_receive +EXPORT_SYMBOL vmlinux 0x46fb916c sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x471217a8 simple_readpage +EXPORT_SYMBOL vmlinux 0x47272d5d unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x476ebeb6 ip_fragment +EXPORT_SYMBOL vmlinux 0x477a87dc block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47cb824e ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x47cc5442 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x47feef7a dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x4803dec7 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0x481ce6ce cpu_active_mask +EXPORT_SYMBOL vmlinux 0x4842cf51 dev_get_stats +EXPORT_SYMBOL vmlinux 0x48535fc0 alloc_fcdev +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x4881efab pmac_get_partition +EXPORT_SYMBOL vmlinux 0x4890eba2 lro_flush_all +EXPORT_SYMBOL vmlinux 0x48976a4e __scsi_add_device +EXPORT_SYMBOL vmlinux 0x48b99b9c dmam_pool_create +EXPORT_SYMBOL vmlinux 0x48bad003 consume_skb +EXPORT_SYMBOL vmlinux 0x48c1d080 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x48d3c4ac mnt_pin +EXPORT_SYMBOL vmlinux 0x490ac3a5 d_invalidate +EXPORT_SYMBOL vmlinux 0x4939da4d generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x496b4072 nf_reinject +EXPORT_SYMBOL vmlinux 0x49cd6286 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0x49dcd7ba journal_force_commit +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x4a144f1a neigh_connected_output +EXPORT_SYMBOL vmlinux 0x4a172097 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x4a290d4d cur_cpu_spec +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a77bac2 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x4a7eeadb __brelse +EXPORT_SYMBOL vmlinux 0x4a8702be panic_notifier_list +EXPORT_SYMBOL vmlinux 0x4a943660 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4afa494c udplite_prot +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b17de47 _read_lock_bh +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b5f8d33 prepare_creds +EXPORT_SYMBOL vmlinux 0x4b65a3dc tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x4b731b3c netif_rx +EXPORT_SYMBOL vmlinux 0x4b75356e unregister_snap_client +EXPORT_SYMBOL vmlinux 0x4b8052fd netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x4b81d205 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bdf1717 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0x4c10a543 xfrm_lookup +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c161c6a flush_hash_entry +EXPORT_SYMBOL vmlinux 0x4c16fa0c inet_getname +EXPORT_SYMBOL vmlinux 0x4c2f6fd1 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x4c56efeb xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x4c61fc9d iget_locked +EXPORT_SYMBOL vmlinux 0x4caec980 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cc4e228 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x4cd34a9b vfsmount_lock +EXPORT_SYMBOL vmlinux 0x4cfae95a bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x4d2a5c19 rwsem_wake +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d3f29d2 __bforget +EXPORT_SYMBOL vmlinux 0x4d4d1973 fsync_bdev +EXPORT_SYMBOL vmlinux 0x4d53b826 security_path_unlink +EXPORT_SYMBOL vmlinux 0x4d679d46 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x4d694072 init_net +EXPORT_SYMBOL vmlinux 0x4d93bef4 read_cache_pages +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dec6038 memscan +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e122429 tty_name +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e588c24 dst_discard +EXPORT_SYMBOL vmlinux 0x4e6353e9 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e7321ed dqget +EXPORT_SYMBOL vmlinux 0x4e7f572d km_policy_notify +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4ee5f6f6 fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x4f0431ca of_register_driver +EXPORT_SYMBOL vmlinux 0x4f11d60d inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x4f435a84 nf_register_hook +EXPORT_SYMBOL vmlinux 0x4f6702ae block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4fb2c600 kern_path +EXPORT_SYMBOL vmlinux 0x4fc5e51d inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fe99583 atomic64_dec_if_positive +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x503835eb journal_destroy +EXPORT_SYMBOL vmlinux 0x50523eda dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x50680387 posix_test_lock +EXPORT_SYMBOL vmlinux 0x508224da pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0x50ad6f58 generic_ro_fops +EXPORT_SYMBOL vmlinux 0x50b15c53 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x50b55cf2 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50fc8296 mark_page_accessed +EXPORT_SYMBOL vmlinux 0x50fed6f7 proc_ide_read_geometry +EXPORT_SYMBOL vmlinux 0x51071d45 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x513179f6 of_dev_get +EXPORT_SYMBOL vmlinux 0x5157152f simple_set_mnt +EXPORT_SYMBOL vmlinux 0x5157302d destroy_EII_client +EXPORT_SYMBOL vmlinux 0x515e24a7 flush_instruction_cache +EXPORT_SYMBOL vmlinux 0x515ef0e0 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x516fb601 unlock_super +EXPORT_SYMBOL vmlinux 0x5187dd51 mapping_tagged +EXPORT_SYMBOL vmlinux 0x51a25c69 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x51cab7ff __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x51f81728 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x5223b0b8 free_buffer_head +EXPORT_SYMBOL vmlinux 0x5227847a d_obtain_alias +EXPORT_SYMBOL vmlinux 0x52604520 tty_hangup +EXPORT_SYMBOL vmlinux 0x527152c7 matroxfb_DAC_out +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x527830ff pmac_xpram_read +EXPORT_SYMBOL vmlinux 0x527b0b82 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x5286c632 key_task_permission +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x529b0c09 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x52a13812 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52a94b88 dev_addr_del +EXPORT_SYMBOL vmlinux 0x52c2eb64 soft_cursor +EXPORT_SYMBOL vmlinux 0x52d03814 scsi_ioctl +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x52eeeee2 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x5315f750 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x531715bf phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x5332a02d devm_ioremap +EXPORT_SYMBOL vmlinux 0x5348ea9e skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x53557b26 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x53a95484 vfs_statfs +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53d91e59 _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x53ebab1b _outsl_ns +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x5432e505 __nla_put +EXPORT_SYMBOL vmlinux 0x54470367 down +EXPORT_SYMBOL vmlinux 0x544f0cd2 page_address +EXPORT_SYMBOL vmlinux 0x54547b0f unregister_qdisc +EXPORT_SYMBOL vmlinux 0x547bb9ba end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x54c6479c __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x54d4f625 kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0x54dfad86 matroxfb_vgaHWinit +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x5504a1f3 ide_proc_register_driver +EXPORT_SYMBOL vmlinux 0x554cca23 eth_header +EXPORT_SYMBOL vmlinux 0x55523f01 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x55737557 bio_split +EXPORT_SYMBOL vmlinux 0x5592a8ec qdisc_destroy +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55ae9044 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x55db1bc2 scsi_register_driver +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x56181e42 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x564c87bc block_write_full_page +EXPORT_SYMBOL vmlinux 0x56815a1b input_open_device +EXPORT_SYMBOL vmlinux 0x568b6480 locks_remove_posix +EXPORT_SYMBOL vmlinux 0x56a10763 csum_tcpudp_magic +EXPORT_SYMBOL vmlinux 0x56a7c4f7 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x56aa86b2 sock_no_getname +EXPORT_SYMBOL vmlinux 0x56c2b95b rtas_progress +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x56fb4c53 journal_init_inode +EXPORT_SYMBOL vmlinux 0x572b2cf3 matroxfb_read_pins +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x5741c60f flush_signals +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57fca41d eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x57ffeea6 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x582a4747 cacheable_memcpy +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5855bfda fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x5858f7be notify_change +EXPORT_SYMBOL vmlinux 0x5869f9f0 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x587d2a9b invalidate_inodes +EXPORT_SYMBOL vmlinux 0x58a35369 genphy_suspend +EXPORT_SYMBOL vmlinux 0x58b44ffb follow_down +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c6d9f6 sock_map_fd +EXPORT_SYMBOL vmlinux 0x58e45f73 __breadahead +EXPORT_SYMBOL vmlinux 0x58f879c7 d_alloc_root +EXPORT_SYMBOL vmlinux 0x5906415f sget +EXPORT_SYMBOL vmlinux 0x590ce237 sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x5913741e tcp_shutdown +EXPORT_SYMBOL vmlinux 0x591a177c single_release +EXPORT_SYMBOL vmlinux 0x592949d8 tcp_child_process +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x59451e43 bdput +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x595b7fca nf_hook_slow +EXPORT_SYMBOL vmlinux 0x595d0946 empty_zero_page +EXPORT_SYMBOL vmlinux 0x5962859f sg_init_table +EXPORT_SYMBOL vmlinux 0x596ad0cf rtas +EXPORT_SYMBOL vmlinux 0x598537e2 audit_log_end +EXPORT_SYMBOL vmlinux 0x598d5f2c inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x59bc8a10 poll_initwait +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x59e88050 datagram_poll +EXPORT_SYMBOL vmlinux 0x59eee24c of_phy_connect_fixed_link +EXPORT_SYMBOL vmlinux 0x5a028abc flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x5a30bce4 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x5a3a09f8 deny_write_access +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a7a3df8 of_find_node_by_name +EXPORT_SYMBOL vmlinux 0x5ab67931 do_IRQ +EXPORT_SYMBOL vmlinux 0x5aff1ed8 skb_over_panic +EXPORT_SYMBOL vmlinux 0x5b14f050 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b2ac650 del_timer_sync +EXPORT_SYMBOL vmlinux 0x5b2f38b4 update_region +EXPORT_SYMBOL vmlinux 0x5b337ef5 blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x5b3fe4dd skb_copy_bits +EXPORT_SYMBOL vmlinux 0x5b43f1f1 rtas_service_present +EXPORT_SYMBOL vmlinux 0x5b45e749 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0x5b672224 simple_release_fs +EXPORT_SYMBOL vmlinux 0x5b706259 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b9acffc d_rehash +EXPORT_SYMBOL vmlinux 0x5bc3dc03 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x5bd0e2fe blk_plug_device +EXPORT_SYMBOL vmlinux 0x5bd75f1a generic_removexattr +EXPORT_SYMBOL vmlinux 0x5c03f630 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x5c201ca2 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x5c631c17 neigh_table_clear +EXPORT_SYMBOL vmlinux 0x5c825948 unregister_netdev +EXPORT_SYMBOL vmlinux 0x5c8391ec inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x5ca1660b block_sync_page +EXPORT_SYMBOL vmlinux 0x5ca61138 fb_validate_mode +EXPORT_SYMBOL vmlinux 0x5ca76f95 of_find_node_by_phandle +EXPORT_SYMBOL vmlinux 0x5cb15dd4 matroxfb_g450_setclk +EXPORT_SYMBOL vmlinux 0x5cc5b658 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x5cc7540b __kfree_skb +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d31a390 napi_frags_finish +EXPORT_SYMBOL vmlinux 0x5d4fa3f3 phys_mem_access_prot +EXPORT_SYMBOL vmlinux 0x5d9663bf dev_get_flags +EXPORT_SYMBOL vmlinux 0x5da3226f input_register_handle +EXPORT_SYMBOL vmlinux 0x5dbb0262 vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x5dc3b109 matroxfb_enable_irq +EXPORT_SYMBOL vmlinux 0x5dd0f465 dquot_acquire +EXPORT_SYMBOL vmlinux 0x5ddab35f unload_nls +EXPORT_SYMBOL vmlinux 0x5df7634c input_close_device +EXPORT_SYMBOL vmlinux 0x5dfd50c0 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x5e070c2f __devm_request_region +EXPORT_SYMBOL vmlinux 0x5e0734be vfs_mkdir +EXPORT_SYMBOL vmlinux 0x5e345ad8 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x5e39d402 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x5e3a1a22 __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x5e3b058e scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x5e6d6354 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x5e6e6b6e jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x5e86f44f blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5e9f2c6b __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eb755f7 of_get_parent +EXPORT_SYMBOL vmlinux 0x5eba36ec sockfd_lookup +EXPORT_SYMBOL vmlinux 0x5ecb706b ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x5ecf05ea cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5eda622c ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5ef6dcf2 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x5f0c5570 cond_resched_lock +EXPORT_SYMBOL vmlinux 0x5f2c457d netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x5f32190f of_mm_gpiochip_add +EXPORT_SYMBOL vmlinux 0x5f3faa42 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x5f4607c6 of_gpio_count +EXPORT_SYMBOL vmlinux 0x5f5e6d4a scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x5f6d73a4 fail_migrate_page +EXPORT_SYMBOL vmlinux 0x5f714aea journal_start_commit +EXPORT_SYMBOL vmlinux 0x5f754e5a memset +EXPORT_SYMBOL vmlinux 0x5f8a2728 isa_io_base +EXPORT_SYMBOL vmlinux 0x5fdc268c security_inode_permission +EXPORT_SYMBOL vmlinux 0x6004be17 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x600db8a3 vfs_symlink +EXPORT_SYMBOL vmlinux 0x600dbd58 drop_super +EXPORT_SYMBOL vmlinux 0x6015a8f8 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x6023a1c0 pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x60396e82 pci_dev_driver +EXPORT_SYMBOL vmlinux 0x603e9f03 generic_write_end +EXPORT_SYMBOL vmlinux 0x60773634 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x60943f32 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60b81520 swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0x60e99041 journal_clear_err +EXPORT_SYMBOL vmlinux 0x60f82e6d ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x60fdc160 ip_route_input +EXPORT_SYMBOL vmlinux 0x611d1fcb add_timer +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x6127603b of_get_gpio_flags +EXPORT_SYMBOL vmlinux 0x612782a0 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x613117a1 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x615471c4 mod_timer_pending +EXPORT_SYMBOL vmlinux 0x617c9f29 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61bc0c18 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x61c7e872 pci_target_state +EXPORT_SYMBOL vmlinux 0x61ec7c5e xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x61eef2c9 _insb +EXPORT_SYMBOL vmlinux 0x61f8f352 bdi_register +EXPORT_SYMBOL vmlinux 0x6218fd3c vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x6220b988 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0x6220d38c of_node_put +EXPORT_SYMBOL vmlinux 0x62351f61 __find_get_block +EXPORT_SYMBOL vmlinux 0x623a3a3c idr_remove_all +EXPORT_SYMBOL vmlinux 0x623d7182 _chrp_type +EXPORT_SYMBOL vmlinux 0x623db1c1 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x62694a90 unregister_8022_client +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x627baa55 sk_filter +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x628332e8 pmu_power_flags +EXPORT_SYMBOL vmlinux 0x62b105f6 sysctl_string +EXPORT_SYMBOL vmlinux 0x62c3b8da submit_bh +EXPORT_SYMBOL vmlinux 0x62def9d4 register_sysrq_key +EXPORT_SYMBOL vmlinux 0x62f3bfb8 d_alloc +EXPORT_SYMBOL vmlinux 0x6331637a vc_resize +EXPORT_SYMBOL vmlinux 0x63471f54 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x63688db7 __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x636d9572 new_inode +EXPORT_SYMBOL vmlinux 0x63b6303b simple_rename +EXPORT_SYMBOL vmlinux 0x63da00c7 skb_tx_hash +EXPORT_SYMBOL vmlinux 0x63e5c90f __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63ed87d6 generic_permission +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x6403957e inet_stream_connect +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x642b2eaf pci_remove_bus +EXPORT_SYMBOL vmlinux 0x64504654 generic_listxattr +EXPORT_SYMBOL vmlinux 0x646cc6ab pmu_poll +EXPORT_SYMBOL vmlinux 0x64766a37 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x6497d95c ll_rw_block +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64c315c9 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x64d8e13e __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x64ea6eeb eth_mac_addr +EXPORT_SYMBOL vmlinux 0x64eab935 lock_super +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65400222 __irq_offset_value +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x65811d57 tcp_check_req +EXPORT_SYMBOL vmlinux 0x65839a85 module_put +EXPORT_SYMBOL vmlinux 0x658a8155 bio_add_page +EXPORT_SYMBOL vmlinux 0x65f4af5f prepare_to_wait +EXPORT_SYMBOL vmlinux 0x660aff83 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x662aa938 simple_transaction_set +EXPORT_SYMBOL vmlinux 0x66399416 vfs_llseek +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66aa7096 netif_napi_add +EXPORT_SYMBOL vmlinux 0x66ad447d shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x66cbf14b pmac_xpram_write +EXPORT_SYMBOL vmlinux 0x66cf9b38 simple_empty +EXPORT_SYMBOL vmlinux 0x66d43107 unlock_rename +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x671bf0a0 adb_client_list +EXPORT_SYMBOL vmlinux 0x676e3291 down_write +EXPORT_SYMBOL vmlinux 0x680779cd inet_release +EXPORT_SYMBOL vmlinux 0x680ae7b8 unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x68389d4c __destroy_inode +EXPORT_SYMBOL vmlinux 0x684d8897 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x685e0505 dget_locked +EXPORT_SYMBOL vmlinux 0x68628e77 _write_lock_bh +EXPORT_SYMBOL vmlinux 0x686b40ca fb_set_var +EXPORT_SYMBOL vmlinux 0x686f1751 scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x68735935 register_netdev +EXPORT_SYMBOL vmlinux 0x68740ede noop_qdisc +EXPORT_SYMBOL vmlinux 0x6895e4cf lock_sock_nested +EXPORT_SYMBOL vmlinux 0x68ab6456 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x68ee26a4 pci_busdev_to_OF_node +EXPORT_SYMBOL vmlinux 0x691eb4b7 neigh_destroy +EXPORT_SYMBOL vmlinux 0x6956e410 of_parse_phandle +EXPORT_SYMBOL vmlinux 0x69587c97 seq_bitmap_list +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6971c3df __any_online_cpu +EXPORT_SYMBOL vmlinux 0x6975f738 scsi_put_command +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x6987684d netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x6989875b add_wait_queue +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x6998ecb5 inode_setattr +EXPORT_SYMBOL vmlinux 0x699a40ec put_page +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69b4208d complete_and_exit +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69c944d8 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69d71df7 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x69d7e5b8 __debugger_ipi +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69ffa384 blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a35beab kmalloc_caches +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a4a2f83 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x6a51c558 f_setown +EXPORT_SYMBOL vmlinux 0x6a61f874 to_tm +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6b0111f0 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b3cfca6 idr_get_new +EXPORT_SYMBOL vmlinux 0x6b7c73f1 bd_set_size +EXPORT_SYMBOL vmlinux 0x6b7e50df open_by_devnum +EXPORT_SYMBOL vmlinux 0x6b7fc2ef input_event +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6be3bb7e per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0x6c047d3e read_cache_page_async +EXPORT_SYMBOL vmlinux 0x6c0ecdc2 module_refcount +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c3b242e sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x6c434330 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6ca1d1a4 atomic64_read +EXPORT_SYMBOL vmlinux 0x6ca81b9c nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x6cd36fce km_policy_expired +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ceacbec tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x6d09d1e4 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x6d0b2f8f invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x6d208dad mach_chrp +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d3a56bd xfrm_register_km +EXPORT_SYMBOL vmlinux 0x6d625f3b rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6da928f4 _insw_ns +EXPORT_SYMBOL vmlinux 0x6dbe5e85 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6df66c9c add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x6df8347a kobject_set_name +EXPORT_SYMBOL vmlinux 0x6e0ae7c4 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x6e0b7f2e get_write_access +EXPORT_SYMBOL vmlinux 0x6e13c2d2 i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0x6e522015 sg_init_one +EXPORT_SYMBOL vmlinux 0x6e56bebe tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6eaf6c4e search_binary_handler +EXPORT_SYMBOL vmlinux 0x6eb01954 generic_readlink +EXPORT_SYMBOL vmlinux 0x6eb8901e scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x6f25f0be dev_alloc_name +EXPORT_SYMBOL vmlinux 0x6f3e1615 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x6f733388 set_blocksize +EXPORT_SYMBOL vmlinux 0x6f7e9f4e cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x6f8dc65b mutex_lock +EXPORT_SYMBOL vmlinux 0x6f9dbc2c tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x6fc4f9d7 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x6fc564a8 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x6fef7499 pci_request_regions +EXPORT_SYMBOL vmlinux 0x6ff255f3 pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x6ff70955 pci_alloc_consistent +EXPORT_SYMBOL vmlinux 0x700c0c55 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x70138e5f seq_open_private +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x70668f5b inode_set_bytes +EXPORT_SYMBOL vmlinux 0x70720a13 idr_init +EXPORT_SYMBOL vmlinux 0x708ce50d framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x70b0e897 _read_unlock_irq +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70c35a95 __f_setown +EXPORT_SYMBOL vmlinux 0x70c37d64 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x70d888b7 __debugger_fault_handler +EXPORT_SYMBOL vmlinux 0x70f6b2dc otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x70f86c70 pmu_queue_request +EXPORT_SYMBOL vmlinux 0x71061056 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x7152ec7e inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x717242e7 rtas_data_buf_lock +EXPORT_SYMBOL vmlinux 0x7175cae3 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x7189ba8c swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71c90087 memcmp +EXPORT_SYMBOL vmlinux 0x71db41ca scsi_free_command +EXPORT_SYMBOL vmlinux 0x7249887f nf_ct_attach +EXPORT_SYMBOL vmlinux 0x728af5f8 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72b36d38 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x72b71076 default_llseek +EXPORT_SYMBOL vmlinux 0x72be4db9 dcache_readdir +EXPORT_SYMBOL vmlinux 0x72c1224f serio_rescan +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72e87d38 setup_new_exec +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x72eccb1a i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x72ed9834 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x7352ceb5 install_exec_creds +EXPORT_SYMBOL vmlinux 0x73564277 __timecompare_update +EXPORT_SYMBOL vmlinux 0x7360ffad i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x738e31a1 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x73b7ad39 open_exec +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x74407387 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x744eb199 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x7465c4ba fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748f1149 scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74a20db7 genl_register_ops +EXPORT_SYMBOL vmlinux 0x74ab4371 inet_ioctl +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74eeaed3 pci_get_subsys +EXPORT_SYMBOL vmlinux 0x74f62096 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x74fc48eb ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0x74fe8730 sys_ctrler +EXPORT_SYMBOL vmlinux 0x75151401 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x751ce546 tcp_prot +EXPORT_SYMBOL vmlinux 0x754f81bf phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x755ee834 vmap +EXPORT_SYMBOL vmlinux 0x75654db0 cdev_add +EXPORT_SYMBOL vmlinux 0x756dd160 start_thread +EXPORT_SYMBOL vmlinux 0x75b6d8a3 scsi_init_io +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x762cbc01 of_unregister_driver +EXPORT_SYMBOL vmlinux 0x76423ad3 cdrom_release +EXPORT_SYMBOL vmlinux 0x76786512 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x7679ec13 skb_dequeue +EXPORT_SYMBOL vmlinux 0x76923e57 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x76b3c602 seq_puts +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76c1c68a tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x76c733ed sock_setsockopt +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76edb27b nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x76f5f6ef __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x770d6d18 devm_iounmap +EXPORT_SYMBOL vmlinux 0x774eddad scsi_add_device +EXPORT_SYMBOL vmlinux 0x77504a51 set_anon_super +EXPORT_SYMBOL vmlinux 0x775f8687 sock_i_uid +EXPORT_SYMBOL vmlinux 0x777a8d6f override_creds +EXPORT_SYMBOL vmlinux 0x77a70ebd blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x77a983f6 iget5_locked +EXPORT_SYMBOL vmlinux 0x77b851c4 cacheable_memzero +EXPORT_SYMBOL vmlinux 0x77bf2a4e lro_receive_frags +EXPORT_SYMBOL vmlinux 0x77ce9562 __page_symlink +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77f16482 tty_kref_put +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x77fe40d4 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x78458cd8 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x78690995 bdi_init +EXPORT_SYMBOL vmlinux 0x78698b34 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x786b57e0 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x786bedb7 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x788d1dfb llc_sap_close +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x78c257f4 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x78c67193 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78ec4eb4 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x78eeba17 register_netdevice +EXPORT_SYMBOL vmlinux 0x790c1437 __lookup_one_len +EXPORT_SYMBOL vmlinux 0x790dcfdf blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x7913adac __percpu_counter_add +EXPORT_SYMBOL vmlinux 0x7917c48c jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x791d697f tty_port_init +EXPORT_SYMBOL vmlinux 0x7922dec5 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x793b7089 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x79436182 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x79938b5e km_state_notify +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79ba4009 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x79c0701e proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0x7a23a4c5 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a3928ad nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x7a439082 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a53110e iunique +EXPORT_SYMBOL vmlinux 0x7a5afff0 journal_extend +EXPORT_SYMBOL vmlinux 0x7a6ba325 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x7a75e328 skb_store_bits +EXPORT_SYMBOL vmlinux 0x7ae08460 pci_enable_msix +EXPORT_SYMBOL vmlinux 0x7b51f59b of_find_node_with_property +EXPORT_SYMBOL vmlinux 0x7be0170e blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x7be4827c pci_dram_offset +EXPORT_SYMBOL vmlinux 0x7be96323 unregister_cdrom +EXPORT_SYMBOL vmlinux 0x7c0012c2 netdev_state_change +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c4cc7e0 kernel_bind +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c775173 __kfifo_put +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c91eeec phy_device_free +EXPORT_SYMBOL vmlinux 0x7c9291d1 csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x7ca341af kernel_thread +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7ce4a153 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x7d069cba mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d210239 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x7d23e4d5 seq_read +EXPORT_SYMBOL vmlinux 0x7d308028 kick_iocb +EXPORT_SYMBOL vmlinux 0x7d348441 of_find_i2c_device_by_node +EXPORT_SYMBOL vmlinux 0x7d5e8a8d bio_put +EXPORT_SYMBOL vmlinux 0x7d683672 unregister_key_type +EXPORT_SYMBOL vmlinux 0x7d772ab4 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x7dbe4934 netpoll_setup +EXPORT_SYMBOL vmlinux 0x7dc1d111 bio_clone +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7de5eafe up_read +EXPORT_SYMBOL vmlinux 0x7df6d2b8 kthread_bind +EXPORT_SYMBOL vmlinux 0x7e05685e vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x7e08e841 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x7e1370c4 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x7e23af3c blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x7e613127 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0x7e70e4f3 pci_get_slot +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e80a885 register_nls +EXPORT_SYMBOL vmlinux 0x7e83f364 iput +EXPORT_SYMBOL vmlinux 0x7e953bb2 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x7ec143e7 cont_write_begin +EXPORT_SYMBOL vmlinux 0x7edd3a6c matroxfb_register_driver +EXPORT_SYMBOL vmlinux 0x7eeaf48f netif_device_attach +EXPORT_SYMBOL vmlinux 0x7ef64e69 sg_miter_next +EXPORT_SYMBOL vmlinux 0x7f18f875 proc_dostring +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f39192f page_follow_link_light +EXPORT_SYMBOL vmlinux 0x7f4952eb ide_dma_off_quietly +EXPORT_SYMBOL vmlinux 0x7f75c90c cdrom_mode_select +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f8f8b76 completion_done +EXPORT_SYMBOL vmlinux 0x7f94357f dquot_free_space +EXPORT_SYMBOL vmlinux 0x7fa0bf17 netlink_unicast +EXPORT_SYMBOL vmlinux 0x7fb20311 vfs_read +EXPORT_SYMBOL vmlinux 0x7fd1e97f pci_select_bars +EXPORT_SYMBOL vmlinux 0x7fd2acc5 lock_may_read +EXPORT_SYMBOL vmlinux 0x80141cf7 pmac_register_agp_pm +EXPORT_SYMBOL vmlinux 0x801f5a3f __strncpy_from_user +EXPORT_SYMBOL vmlinux 0x8026b9a2 security_path_truncate +EXPORT_SYMBOL vmlinux 0x80428c80 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x80916839 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x809ae131 inet_select_addr +EXPORT_SYMBOL vmlinux 0x80b59e1e xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x80b78547 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x80d87163 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x80f76976 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x81003d0e sock_release +EXPORT_SYMBOL vmlinux 0x81052fe2 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x810f705f nf_afinfo +EXPORT_SYMBOL vmlinux 0x811eb58c fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0x8139f0ba simple_dir_operations +EXPORT_SYMBOL vmlinux 0x814c7d40 bh_submit_read +EXPORT_SYMBOL vmlinux 0x81581488 macio_dev_put +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x81a47578 dma_direct_ops +EXPORT_SYMBOL vmlinux 0x81c0a84f rtas_set_indicator +EXPORT_SYMBOL vmlinux 0x81d4c4b6 ide_proc_unregister_driver +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x825d1ea5 nf_register_hooks +EXPORT_SYMBOL vmlinux 0x82629870 ida_init +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x82a15bea blk_requeue_request +EXPORT_SYMBOL vmlinux 0x82a2be05 lock_rename +EXPORT_SYMBOL vmlinux 0x82c12b25 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0x82c2c80a of_register_spi_devices +EXPORT_SYMBOL vmlinux 0x82e5a238 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x82effaae icmp_send +EXPORT_SYMBOL vmlinux 0x82f10de9 del_timer +EXPORT_SYMBOL vmlinux 0x835d8b37 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x83634c1b dentry_open +EXPORT_SYMBOL vmlinux 0x836decba jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x83741339 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x838bd283 register_sysctl_table +EXPORT_SYMBOL vmlinux 0x83941a17 put_io_context +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83b0e31e dev_mc_sync +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83c9e7f2 mb_cache_create +EXPORT_SYMBOL vmlinux 0x83cbc7e3 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x844404cf ISA_DMA_THRESHOLD +EXPORT_SYMBOL vmlinux 0x8453ca03 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x84795629 pci_scan_slot +EXPORT_SYMBOL vmlinux 0x8481f614 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x84b144ae skb_free_datagram +EXPORT_SYMBOL vmlinux 0x84b183ae strncmp +EXPORT_SYMBOL vmlinux 0x84cafcef invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x84d14ad7 ps2_drain +EXPORT_SYMBOL vmlinux 0x84e91d8a netlink_dump_start +EXPORT_SYMBOL vmlinux 0x8507ab09 kobject_del +EXPORT_SYMBOL vmlinux 0x8540b5be sleep_on +EXPORT_SYMBOL vmlinux 0x8541bccc intercept_table +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x8581b144 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b55360 ___pskb_trim +EXPORT_SYMBOL vmlinux 0x85c2ed78 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x862ab42c pci_get_class +EXPORT_SYMBOL vmlinux 0x864b9b0a blk_get_request +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866ab044 input_inject_event +EXPORT_SYMBOL vmlinux 0x8681a4a0 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x868e871f blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x86bf5332 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0x86c81a43 down_trylock +EXPORT_SYMBOL vmlinux 0x86db1cbb rtas_flash_term_hook +EXPORT_SYMBOL vmlinux 0x86eb3a17 skb_queue_tail +EXPORT_SYMBOL vmlinux 0x86ee51b5 vfs_getattr +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x87352844 page_readlink +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87910f94 unregister_console +EXPORT_SYMBOL vmlinux 0x879b0dd0 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x879c1322 tcf_em_register +EXPORT_SYMBOL vmlinux 0x87b1dc97 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x87b28972 phy_device_create +EXPORT_SYMBOL vmlinux 0x87b42fcf phy_detach +EXPORT_SYMBOL vmlinux 0x87c2a865 log_wait_commit +EXPORT_SYMBOL vmlinux 0x87f450de neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x880f0069 inet_register_protosw +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x883a4545 vfs_quota_on +EXPORT_SYMBOL vmlinux 0x8848b0fa input_register_handler +EXPORT_SYMBOL vmlinux 0x8854602a dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x88614f63 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x88759d67 nf_setsockopt +EXPORT_SYMBOL vmlinux 0x887b2afc pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x88b2eac7 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x88c33d8c phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x88ee326e kill_litter_super +EXPORT_SYMBOL vmlinux 0x890b4e39 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x893b503b dput +EXPORT_SYMBOL vmlinux 0x89456f07 file_remove_suid +EXPORT_SYMBOL vmlinux 0x894d9d13 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x894ec546 scsi_target_resume +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x898927f4 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x8992ec6d jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x8999b35b __invalidate_device +EXPORT_SYMBOL vmlinux 0x89b3107b isa_mem_base +EXPORT_SYMBOL vmlinux 0x89c91170 read_dev_sector +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89f50a49 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x8a096dac wireless_send_event +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a18933c aio_complete +EXPORT_SYMBOL vmlinux 0x8a2aa577 tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a380574 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x8a397dde pagevec_lookup +EXPORT_SYMBOL vmlinux 0x8a5d7f89 journal_ack_err +EXPORT_SYMBOL vmlinux 0x8a6edfd7 try_to_release_page +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab258dc pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x8ab4079e atomic64_add +EXPORT_SYMBOL vmlinux 0x8ab546c9 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x8abe2d18 mod_timer +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8ae378f4 bio_map_user +EXPORT_SYMBOL vmlinux 0x8ae94671 user_revoke +EXPORT_SYMBOL vmlinux 0x8afe0d39 find_inode_number +EXPORT_SYMBOL vmlinux 0x8b0989be giveup_altivec +EXPORT_SYMBOL vmlinux 0x8b1a7a66 pcie_aspm_enabled +EXPORT_SYMBOL vmlinux 0x8b69cf67 dquot_alloc +EXPORT_SYMBOL vmlinux 0x8b7963f4 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0x8b800319 arp_send +EXPORT_SYMBOL vmlinux 0x8b96f234 mdiobus_read +EXPORT_SYMBOL vmlinux 0x8ba4070a proto_unregister +EXPORT_SYMBOL vmlinux 0x8bc3236e xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x8bcc3a3a _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8c149a6e security_path_mkdir +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c73610a blk_integrity_register +EXPORT_SYMBOL vmlinux 0x8c76a854 bdi_unregister +EXPORT_SYMBOL vmlinux 0x8c8701cd mnt_unpin +EXPORT_SYMBOL vmlinux 0x8cb927b1 sk_stream_error +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8ccc240f of_iomap +EXPORT_SYMBOL vmlinux 0x8ccd89ae matroxfb_g450_connect +EXPORT_SYMBOL vmlinux 0x8d0012e1 proc_create_data +EXPORT_SYMBOL vmlinux 0x8d2ab9c9 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d446f78 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0x8d514c10 get_super +EXPORT_SYMBOL vmlinux 0x8d54f705 current_fs_time +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6ef862 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x8d8c0323 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x8dbdb0ed register_cdrom +EXPORT_SYMBOL vmlinux 0x8df5da63 memstart_addr +EXPORT_SYMBOL vmlinux 0x8e04cb5e dquot_drop +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e0bc668 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e3d142e scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0x8e5c65dc dst_alloc +EXPORT_SYMBOL vmlinux 0x8e63fc66 blk_free_tags +EXPORT_SYMBOL vmlinux 0x8e66665e alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x8e6e9222 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e8163ba matrox_G100 +EXPORT_SYMBOL vmlinux 0x8e995f37 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x8ea5b307 tcf_exts_change +EXPORT_SYMBOL vmlinux 0x8ec4a30e tcf_register_action +EXPORT_SYMBOL vmlinux 0x8ed24473 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0x8edb71ce console_start +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8f23525a pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x8f374528 key_validate +EXPORT_SYMBOL vmlinux 0x8f377b68 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f48feb4 follow_up +EXPORT_SYMBOL vmlinux 0x8f4cac74 mpage_readpage +EXPORT_SYMBOL vmlinux 0x8f5e72f7 __blk_end_request +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f7523e3 idr_destroy +EXPORT_SYMBOL vmlinux 0x8f7a4e59 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x8fbf37e0 profile_pc +EXPORT_SYMBOL vmlinux 0x8fbffb74 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x8fd3e7bf atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x8fd8b7bc _write_lock_irq +EXPORT_SYMBOL vmlinux 0x8fe33c89 key_alloc +EXPORT_SYMBOL vmlinux 0x8fe562c2 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x9029f6e6 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x90308551 neigh_create +EXPORT_SYMBOL vmlinux 0x90501868 transfer_to_handler +EXPORT_SYMBOL vmlinux 0x90696940 serio_unregister_port +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x910ffb7c jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x911d39b3 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x912557ce rtas_busy_delay +EXPORT_SYMBOL vmlinux 0x912faced scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0x91466012 __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x915e1208 tb_ticks_per_usec +EXPORT_SYMBOL vmlinux 0x9168c033 rtas_get_sensor +EXPORT_SYMBOL vmlinux 0x91692708 tcf_hash_create +EXPORT_SYMBOL vmlinux 0x917251f4 flush_tlb_page +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x919d1163 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x91b009fc of_get_address +EXPORT_SYMBOL vmlinux 0x91d88e48 __debugger_dabr_match +EXPORT_SYMBOL vmlinux 0x91f8385a scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x920a3b81 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921b4335 key_link +EXPORT_SYMBOL vmlinux 0x9221e288 lookup_one_len +EXPORT_SYMBOL vmlinux 0x928011cc kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x928428dc fget +EXPORT_SYMBOL vmlinux 0x9296c93d udp_table +EXPORT_SYMBOL vmlinux 0x92ac9c77 sk_wait_data +EXPORT_SYMBOL vmlinux 0x92bbd2c9 d_validate +EXPORT_SYMBOL vmlinux 0x92ea04aa ilookup +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x9309de94 cuda_request +EXPORT_SYMBOL vmlinux 0x931d2521 mempool_resize +EXPORT_SYMBOL vmlinux 0x9368854e sysctl_data +EXPORT_SYMBOL vmlinux 0x9374d943 skb_trim +EXPORT_SYMBOL vmlinux 0x93a5f37a set_page_dirty +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c823db sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x93ccc831 __serio_register_port +EXPORT_SYMBOL vmlinux 0x93d91dce idr_remove +EXPORT_SYMBOL vmlinux 0x93e90bdb pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x93ed6dfe tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x93fe1c43 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x940716e4 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x9434d030 I_BDEV +EXPORT_SYMBOL vmlinux 0x946228c8 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x948728ce block_prepare_write +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94a904a3 scm_fp_dup +EXPORT_SYMBOL vmlinux 0x94b8178e pci_read_vpd +EXPORT_SYMBOL vmlinux 0x94c14975 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x94c916d9 netlink_broadcast +EXPORT_SYMBOL vmlinux 0x94cd2db0 percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x94ee5357 swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x9506a3f5 genphy_read_status +EXPORT_SYMBOL vmlinux 0x950f7cc6 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x9524b0ae _outsb +EXPORT_SYMBOL vmlinux 0x952df939 rtnl_notify +EXPORT_SYMBOL vmlinux 0x952e843b machine_is_compatible +EXPORT_SYMBOL vmlinux 0x953b193c scsi_get_command +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x957f37e5 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x95a16953 nf_log_register +EXPORT_SYMBOL vmlinux 0x95a90c3e input_flush_device +EXPORT_SYMBOL vmlinux 0x95d186ec inet_bind +EXPORT_SYMBOL vmlinux 0x95f55ad5 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x968daa1f i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x96c26ea9 seq_path +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96d56018 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x97019dcc of_get_property +EXPORT_SYMBOL vmlinux 0x97255bdf strlen +EXPORT_SYMBOL vmlinux 0x9748927f _outsw_ns +EXPORT_SYMBOL vmlinux 0x974c01c5 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x97558abc i2c_register_driver +EXPORT_SYMBOL vmlinux 0x97687b10 phy_attach +EXPORT_SYMBOL vmlinux 0x97869c97 bio_map_kern +EXPORT_SYMBOL vmlinux 0x981a982a flush_old_exec +EXPORT_SYMBOL vmlinux 0x98380e6f copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x983a8fcb request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x984b2402 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x984d4c90 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x9868ce6d inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x98980e85 blk_sync_queue +EXPORT_SYMBOL vmlinux 0x989d4082 _write_trylock +EXPORT_SYMBOL vmlinux 0x98ac1f19 seq_release +EXPORT_SYMBOL vmlinux 0x98fe7882 DMA_MODE_READ +EXPORT_SYMBOL vmlinux 0x99038f74 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x991d3e92 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x9921fc54 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0x9945febc pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x994da34d tty_shutdown +EXPORT_SYMBOL vmlinux 0x994ff576 dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x99640d3a input_set_capability +EXPORT_SYMBOL vmlinux 0x996cf12a pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x9973a270 sock_wake_async +EXPORT_SYMBOL vmlinux 0x99818359 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x998285b3 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x998f6e96 misc_register +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99bb8806 memmove +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99dd1451 rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x99de5e14 neigh_lookup +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a2192d0 mutex_trylock +EXPORT_SYMBOL vmlinux 0x9a237e6c generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x9a2864a2 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x9a97d4d5 __free_pages +EXPORT_SYMBOL vmlinux 0x9aab3d31 pci_find_device +EXPORT_SYMBOL vmlinux 0x9aade2a3 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x9ae4c3fd ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x9af95b61 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x9afd4810 vfs_readlink +EXPORT_SYMBOL vmlinux 0x9b0c5744 mac_find_mode +EXPORT_SYMBOL vmlinux 0x9b18f3bf of_device_register +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b6f7f6a commit_creds +EXPORT_SYMBOL vmlinux 0x9b70bc1d bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bd54d79 kill_fasync +EXPORT_SYMBOL vmlinux 0x9be92afc __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c25a626 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x9cad5f37 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9ce103a0 down_write_trylock +EXPORT_SYMBOL vmlinux 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9d07cecc pci_set_master +EXPORT_SYMBOL vmlinux 0x9d0c3f33 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x9d14983a ppc_enable_pmcs +EXPORT_SYMBOL vmlinux 0x9d3c4451 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x9d3ef74d blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x9d441874 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x9d669763 memcpy +EXPORT_SYMBOL vmlinux 0x9d6cd0ed blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x9dab012e cad_pid +EXPORT_SYMBOL vmlinux 0x9dac4f21 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x9db9213c xfrm_state_add +EXPORT_SYMBOL vmlinux 0x9dd3697f ps2_init +EXPORT_SYMBOL vmlinux 0x9dd9fd58 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x9ddc90f2 set_user_nice +EXPORT_SYMBOL vmlinux 0x9de40936 tty_throttle +EXPORT_SYMBOL vmlinux 0x9dffdce9 vfs_fsync +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e27be7a pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x9e574f5c aio_put_req +EXPORT_SYMBOL vmlinux 0x9e8dec08 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x9e97375d rtas_busy_delay_time +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea44e21 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0x9ebe58ce kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9ed700a5 path_lookup +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f04169f skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f18daa7 put_tty_driver +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f5676a9 pci_set_power_state +EXPORT_SYMBOL vmlinux 0x9f5e44fa simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fabe3f1 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x9faf768f scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x9fc9e252 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x9fe6f05d llc_add_pack +EXPORT_SYMBOL vmlinux 0x9fe6fa56 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0xa0206a4b skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0xa024ffa5 __sg_free_table +EXPORT_SYMBOL vmlinux 0xa02ce191 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0xa02dec26 starget_for_each_device +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa04bbd35 mutex_unlock +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa07d71e9 unlock_new_inode +EXPORT_SYMBOL vmlinux 0xa09d2d73 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0xa0a09ee6 pci_domain_nr +EXPORT_SYMBOL vmlinux 0xa0af5220 remove_arg_zero +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d9216d matroxfb_g450_setpll_cond +EXPORT_SYMBOL vmlinux 0xa0e44065 _read_unlock +EXPORT_SYMBOL vmlinux 0xa0fb9d9d input_unregister_handle +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa12e2ba0 sock_kmalloc +EXPORT_SYMBOL vmlinux 0xa13301a3 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa150c9f9 nla_append +EXPORT_SYMBOL vmlinux 0xa15e67a6 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xa1b22a00 dquot_release +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1c1cd6b dquot_claim_space +EXPORT_SYMBOL vmlinux 0xa1c3174d pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1eeeb34 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xa20580d2 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0xa2093bb9 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa21a0883 try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xa2252871 del_gendisk +EXPORT_SYMBOL vmlinux 0xa2466649 ide_set_handler +EXPORT_SYMBOL vmlinux 0xa2571acd open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xa2724940 flush_icache_user_range +EXPORT_SYMBOL vmlinux 0xa2858cee scsi_device_resume +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2b85e8c register_console +EXPORT_SYMBOL vmlinux 0xa2bbed37 crash_shutdown_register +EXPORT_SYMBOL vmlinux 0xa2d4c119 complete_all +EXPORT_SYMBOL vmlinux 0xa2d4fbed pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0xa3060249 simple_statfs +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa3387710 pci_disable_msix +EXPORT_SYMBOL vmlinux 0xa3417048 pci_dev_get +EXPORT_SYMBOL vmlinux 0xa344259e sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0xa34bea64 free_netdev +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa38e691a ioremap_bot +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa39f57c0 sock_wfree +EXPORT_SYMBOL vmlinux 0xa3a69449 phy_driver_register +EXPORT_SYMBOL vmlinux 0xa3b26fd9 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xa3bbf93a init_special_inode +EXPORT_SYMBOL vmlinux 0xa3e75545 flush_tlb_kernel_range +EXPORT_SYMBOL vmlinux 0xa3eb24c1 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa4460348 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0xa4975133 security_inode_readlink +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4bae84a __seq_open_private +EXPORT_SYMBOL vmlinux 0xa4d5c7ca kill_anon_super +EXPORT_SYMBOL vmlinux 0xa4d8fefa ip_defrag +EXPORT_SYMBOL vmlinux 0xa50c21ba input_allocate_device +EXPORT_SYMBOL vmlinux 0xa53d2fe8 neigh_seq_next +EXPORT_SYMBOL vmlinux 0xa54c4892 ip_getsockopt +EXPORT_SYMBOL vmlinux 0xa557307c neigh_table_init +EXPORT_SYMBOL vmlinux 0xa576c263 generic_find_next_le_bit +EXPORT_SYMBOL vmlinux 0xa57d0669 brioctl_set +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5b00659 ppc_proc_freq +EXPORT_SYMBOL vmlinux 0xa5b25be1 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa5f042f6 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xa61ed85e alloc_trdev +EXPORT_SYMBOL vmlinux 0xa651f813 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xa65972b8 _memcpy_toio +EXPORT_SYMBOL vmlinux 0xa66b57e4 pci_choose_state +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6ce85b7 __nla_reserve +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6f35317 write_inode_now +EXPORT_SYMBOL vmlinux 0xa701c97b insert_inode_locked +EXPORT_SYMBOL vmlinux 0xa73650a6 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0xa73fbe97 seq_write +EXPORT_SYMBOL vmlinux 0xa76cf8c0 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0xa77035d0 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xa7716715 __break_lease +EXPORT_SYMBOL vmlinux 0xa789f1d2 i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xa78e1046 dma_pool_create +EXPORT_SYMBOL vmlinux 0xa7b24724 simple_fill_super +EXPORT_SYMBOL vmlinux 0xa7b3b7ce generic_file_aio_write +EXPORT_SYMBOL vmlinux 0xa7b9dbb0 scsi_execute +EXPORT_SYMBOL vmlinux 0xa7c31ab1 tcp_ioctl +EXPORT_SYMBOL vmlinux 0xa7c43fce ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xa7e4b25b get_io_context +EXPORT_SYMBOL vmlinux 0xa80210e0 xfrm_register_type +EXPORT_SYMBOL vmlinux 0xa83cd7e6 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0xa861ab6e __ioremap +EXPORT_SYMBOL vmlinux 0xa86d3cf8 dqput +EXPORT_SYMBOL vmlinux 0xa87c7ebc scsi_scan_target +EXPORT_SYMBOL vmlinux 0xa87ed691 nf_log_packet +EXPORT_SYMBOL vmlinux 0xa89464b7 __ashldi3 +EXPORT_SYMBOL vmlinux 0xa8951204 block_invalidatepage +EXPORT_SYMBOL vmlinux 0xa8babe15 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa901cfce mod_timer_pinned +EXPORT_SYMBOL vmlinux 0xa9101c17 dentry_unhash +EXPORT_SYMBOL vmlinux 0xa911af1c bdev_read_only +EXPORT_SYMBOL vmlinux 0xa9178346 vfs_unlink +EXPORT_SYMBOL vmlinux 0xa922f240 _read_lock_irq +EXPORT_SYMBOL vmlinux 0xa9571d6d DMA_MODE_WRITE +EXPORT_SYMBOL vmlinux 0xa99c4efd scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xa9a72fc3 freeze_bdev +EXPORT_SYMBOL vmlinux 0xa9b3ad25 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xa9bca577 inet_frag_find +EXPORT_SYMBOL vmlinux 0xa9effda5 __first_cpu +EXPORT_SYMBOL vmlinux 0xa9ff1123 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0xaa005eed tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0xaa254f09 journal_release_buffer +EXPORT_SYMBOL vmlinux 0xaa2772f4 dev_close +EXPORT_SYMBOL vmlinux 0xaa419977 blk_insert_request +EXPORT_SYMBOL vmlinux 0xaa4df512 pmu_batteries +EXPORT_SYMBOL vmlinux 0xaa54ee5e mem_map +EXPORT_SYMBOL vmlinux 0xaa7f06d7 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xaa91e122 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0xaab958e5 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0xaad4a6fd blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0xaadb1a05 console_stop +EXPORT_SYMBOL vmlinux 0xaae4489d read_cache_page +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xab0335e0 bio_integrity_split +EXPORT_SYMBOL vmlinux 0xab207a88 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0xab210054 netdev_features_change +EXPORT_SYMBOL vmlinux 0xab4ee586 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xab7b40f6 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xab8ed46e skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0xabb1304f rtnl_create_link +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL vmlinux 0xabf32a01 tcf_hash_check +EXPORT_SYMBOL vmlinux 0xac0ff3dc __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xac13e79b elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0xac3d9eaf sock_i_ino +EXPORT_SYMBOL vmlinux 0xac422bdf locks_copy_lock +EXPORT_SYMBOL vmlinux 0xac4a836b tty_write_room +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac90d349 set_binfmt +EXPORT_SYMBOL vmlinux 0xac990aa4 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xacb472b1 may_umount +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacdaaa78 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad0f1c30 swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0xad205295 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0xad4ebe22 _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0xad501ebd journal_init_dev +EXPORT_SYMBOL vmlinux 0xad542e80 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xad8a969b pagecache_write_end +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadae87e9 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xadd1e971 alignment_exception +EXPORT_SYMBOL vmlinux 0xaddd4770 __debugger_iabr_match +EXPORT_SYMBOL vmlinux 0xade4246e netlink_ack +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xae58c234 xfrm_input +EXPORT_SYMBOL vmlinux 0xae64b138 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0xae7c0829 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xaea388a8 skb_queue_head +EXPORT_SYMBOL vmlinux 0xaea3f705 user_path_at +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaece4b8a scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaee40d87 __rta_fill +EXPORT_SYMBOL vmlinux 0xaeeafa65 should_remove_suid +EXPORT_SYMBOL vmlinux 0xaeffedeb jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xaf0b28a4 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0xaf14a5f4 vfs_readdir +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf41416e tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0xaf4f2741 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xaf56b58b skb_pad +EXPORT_SYMBOL vmlinux 0xaf92ff44 km_query +EXPORT_SYMBOL vmlinux 0xaf9d6c8a dst_destroy +EXPORT_SYMBOL vmlinux 0xafa7bd33 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xafbc5c0d mpage_writepages +EXPORT_SYMBOL vmlinux 0xafcc7877 scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xafd4e03f d_instantiate +EXPORT_SYMBOL vmlinux 0xafdf9b04 simple_transaction_read +EXPORT_SYMBOL vmlinux 0xb00c89ab inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0xb0130ac5 generic_writepages +EXPORT_SYMBOL vmlinux 0xb0396851 kthread_stop +EXPORT_SYMBOL vmlinux 0xb043fdbd scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0xb046c48c sync_inode +EXPORT_SYMBOL vmlinux 0xb091541d sk_stop_timer +EXPORT_SYMBOL vmlinux 0xb0ae7ca7 scsi_host_get +EXPORT_SYMBOL vmlinux 0xb0b5bcb4 tcp_proc_register +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0c5ac28 skb_queue_purge +EXPORT_SYMBOL vmlinux 0xb0cf7565 skb_push +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb10cfdc1 vfs_rename +EXPORT_SYMBOL vmlinux 0xb12d758e __lock_buffer +EXPORT_SYMBOL vmlinux 0xb14fc3f9 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0xb15bd8fa tb_ticks_per_sec +EXPORT_SYMBOL vmlinux 0xb17e3bd9 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0xb18f3f06 ide_xfer_verbose +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb2267f63 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0xb22c2b6d lease_modify +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb233762c atomic64_set +EXPORT_SYMBOL vmlinux 0xb252c874 scsi_register +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb27cedce generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0xb2ba62b5 __wait_on_bit +EXPORT_SYMBOL vmlinux 0xb2becbfe __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xb2c225a2 mdiobus_scan +EXPORT_SYMBOL vmlinux 0xb2c969cb gen_pool_create +EXPORT_SYMBOL vmlinux 0xb2ca4645 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xb325f2ea directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0xb35b0c46 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0xb3608c01 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3b54394 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0xb3d51476 get_sb_nodev +EXPORT_SYMBOL vmlinux 0xb40b5cc5 blk_end_request +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb4365c4f vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0xb444ef28 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb488fbfb skb_insert +EXPORT_SYMBOL vmlinux 0xb4cb1c9e scsi_register_interface +EXPORT_SYMBOL vmlinux 0xb4f8eaaa bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb52b4363 of_register_i2c_devices +EXPORT_SYMBOL vmlinux 0xb52bf826 pci_disable_msi +EXPORT_SYMBOL vmlinux 0xb53a4336 kmap_pte +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb546af81 register_quota_format +EXPORT_SYMBOL vmlinux 0xb55652a1 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0xb55772e7 simple_lookup +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb58c2c8b neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5a502fd jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xb5b56d53 llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0xb5f9952e vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0xb634c18e pci_write_vpd +EXPORT_SYMBOL vmlinux 0xb63ae476 register_snap_client +EXPORT_SYMBOL vmlinux 0xb6439c4e _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0xb6599b9a machine_check_exception +EXPORT_SYMBOL vmlinux 0xb661f751 d_move +EXPORT_SYMBOL vmlinux 0xb66bf8ac tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xb66e9ace tty_port_tty_set +EXPORT_SYMBOL vmlinux 0xb677cffa scsi_remove_target +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6ac44f7 security_path_symlink +EXPORT_SYMBOL vmlinux 0xb6adbd4c phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6e0b225 block_write_end +EXPORT_SYMBOL vmlinux 0xb6ef3459 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb715fa05 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0xb71c857e mdio_bus_type +EXPORT_SYMBOL vmlinux 0xb721bcba audit_log_start +EXPORT_SYMBOL vmlinux 0xb7386ed9 __bio_clone +EXPORT_SYMBOL vmlinux 0xb74a663f otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xb753bcc8 __ashrdi3 +EXPORT_SYMBOL vmlinux 0xb7796c15 make_EII_client +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7d76a43 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xb7e7ddfd iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0xb8117a5f pid_task +EXPORT_SYMBOL vmlinux 0xb82d6997 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0xb865058c tcp_connect +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb8b48194 textsearch_prepare +EXPORT_SYMBOL vmlinux 0xb8b4ca2f vfs_readv +EXPORT_SYMBOL vmlinux 0xb8f3c870 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xb912ac0c ip_route_output_key +EXPORT_SYMBOL vmlinux 0xb91653d0 journal_check_available_features +EXPORT_SYMBOL vmlinux 0xb93253ae ida_get_new +EXPORT_SYMBOL vmlinux 0xb932ee54 handle_sysrq +EXPORT_SYMBOL vmlinux 0xb9664546 ide_stall_queue +EXPORT_SYMBOL vmlinux 0xb980879b napi_get_frags +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9907791 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0xb9a0af44 kobject_add +EXPORT_SYMBOL vmlinux 0xb9aec177 sock_recvmsg +EXPORT_SYMBOL vmlinux 0xb9d05ff4 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xba07a770 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0xba0bfa83 pci_request_region +EXPORT_SYMBOL vmlinux 0xba125e30 nf_getsockopt +EXPORT_SYMBOL vmlinux 0xba1a963d fb_pan_display +EXPORT_SYMBOL vmlinux 0xba216d7f cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0xba31db34 lookup_hash +EXPORT_SYMBOL vmlinux 0xba339809 copy_io_context +EXPORT_SYMBOL vmlinux 0xba3bd43a inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba4accd0 pmac_resume_agp_for_card +EXPORT_SYMBOL vmlinux 0xba6e9302 simple_link +EXPORT_SYMBOL vmlinux 0xba70d1ca elv_rb_del +EXPORT_SYMBOL vmlinux 0xbaa19138 journal_dirty_data +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbac66e20 validate_sp +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb4106e6 dev_unicast_add +EXPORT_SYMBOL vmlinux 0xbb4c8e0f pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xbb5a7e8e sk_dst_check +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb72cb1e set_groups +EXPORT_SYMBOL vmlinux 0xbb7a91dc _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbd4bb73 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xbbfa6ef1 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xbbfaecaf blk_recount_segments +EXPORT_SYMBOL vmlinux 0xbc0e2474 pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xbc1ad3f9 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0xbc316de4 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0xbc4b2dc0 blk_init_tags +EXPORT_SYMBOL vmlinux 0xbc7b19be vfs_link +EXPORT_SYMBOL vmlinux 0xbc8c5bbb pskb_expand_head +EXPORT_SYMBOL vmlinux 0xbc982b30 ipv4_specific +EXPORT_SYMBOL vmlinux 0xbcb9e9c4 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xbcd229e8 tcp_close +EXPORT_SYMBOL vmlinux 0xbce585e5 sg_miter_start +EXPORT_SYMBOL vmlinux 0xbd3d0ace tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0xbd51f165 no_llseek +EXPORT_SYMBOL vmlinux 0xbd8883d2 of_translate_dma_address +EXPORT_SYMBOL vmlinux 0xbd8d541d flush_hash_pages +EXPORT_SYMBOL vmlinux 0xbd9e5d49 __lshrdi3 +EXPORT_SYMBOL vmlinux 0xbdae30c7 idr_for_each +EXPORT_SYMBOL vmlinux 0xbdb48184 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbdfaae68 get_pci_dma_ops +EXPORT_SYMBOL vmlinux 0xbdfe0c76 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xbe0b0c15 pci_unmap_rom +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe0fe59f neigh_parms_release +EXPORT_SYMBOL vmlinux 0xbe227207 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xbe44bc92 macio_release_resource +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe84c012 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xbe8a1485 mempool_create +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf2db505 DAC1064_global_restore +EXPORT_SYMBOL vmlinux 0xbf362e6e tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0xbf51e70b __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xbf5e60d3 i2c_master_recv +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf82ea61 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfd852a4 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xbfe44081 mdiobus_write +EXPORT_SYMBOL vmlinux 0xbfe68372 of_device_is_compatible +EXPORT_SYMBOL vmlinux 0xbfe924b8 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xc02ffa1f set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc0606107 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0d84ced cuda_poll +EXPORT_SYMBOL vmlinux 0xc0fdf9bb pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xc1015d26 macio_unregister_driver +EXPORT_SYMBOL vmlinux 0xc1090e36 filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0xc11abf61 skb_pull +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc129e11d xrlim_allow +EXPORT_SYMBOL vmlinux 0xc15e073c generic_find_next_zero_le_bit +EXPORT_SYMBOL vmlinux 0xc1654a81 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xc1a0769c tty_port_tty_get +EXPORT_SYMBOL vmlinux 0xc1a4c53f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0xc1a99b97 block_truncate_page +EXPORT_SYMBOL vmlinux 0xc1ba49a9 dev_base_lock +EXPORT_SYMBOL vmlinux 0xc1dad126 dma_pool_free +EXPORT_SYMBOL vmlinux 0xc1dd4a7f adb_request +EXPORT_SYMBOL vmlinux 0xc1e8d22b kmem_cache_name +EXPORT_SYMBOL vmlinux 0xc1f12338 generic_block_bmap +EXPORT_SYMBOL vmlinux 0xc21ecdc4 skb_clone +EXPORT_SYMBOL vmlinux 0xc22524e3 i2c_transfer +EXPORT_SYMBOL vmlinux 0xc22c84d0 blk_make_request +EXPORT_SYMBOL vmlinux 0xc22df2ca flush_dcache_page +EXPORT_SYMBOL vmlinux 0xc23558f0 of_find_device_by_node +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc270d75c start_tty +EXPORT_SYMBOL vmlinux 0xc2adc651 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0xc2bca1db elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2fc3a05 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0xc3140ac6 dquot_initialize +EXPORT_SYMBOL vmlinux 0xc3309cb6 netlink_set_err +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc3541da7 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xc3602e05 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0xc368849f nvram_sync +EXPORT_SYMBOL vmlinux 0xc37a2437 set_security_override +EXPORT_SYMBOL vmlinux 0xc37c998d blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0xc39c47af __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xc3a2747c find_vma +EXPORT_SYMBOL vmlinux 0xc3b04cde __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3d27f69 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0xc3d76bb8 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xc402430d sock_rfree +EXPORT_SYMBOL vmlinux 0xc437e6eb pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0xc4434209 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0xc4496090 thaw_bdev +EXPORT_SYMBOL vmlinux 0xc45aaaa1 registered_fb +EXPORT_SYMBOL vmlinux 0xc47ff15e jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4bb3bb6 km_report +EXPORT_SYMBOL vmlinux 0xc4dc3b3e poll_freewait +EXPORT_SYMBOL vmlinux 0xc4de0e7b blkdev_put +EXPORT_SYMBOL vmlinux 0xc4de9cff page_symlink +EXPORT_SYMBOL vmlinux 0xc4e77583 seq_lseek +EXPORT_SYMBOL vmlinux 0xc50c0c8c tr_type_trans +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc575771e sg_free_table +EXPORT_SYMBOL vmlinux 0xc5783238 qdisc_reset +EXPORT_SYMBOL vmlinux 0xc5788f5f bio_phys_segments +EXPORT_SYMBOL vmlinux 0xc57b79af request_firmware +EXPORT_SYMBOL vmlinux 0xc57daed0 i2c_release_client +EXPORT_SYMBOL vmlinux 0xc58e2da2 of_find_matching_node +EXPORT_SYMBOL vmlinux 0xc59aabbe proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0xc5c6f658 matrox_cfbX_init +EXPORT_SYMBOL vmlinux 0xc5cae79f jbd2_journal_load +EXPORT_SYMBOL vmlinux 0xc5e6e913 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xc61c5dd5 textsearch_register +EXPORT_SYMBOL vmlinux 0xc6280985 arp_create +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc681f99c __put_cred +EXPORT_SYMBOL vmlinux 0xc6b6d78c wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0xc6c965e3 giveup_fpu +EXPORT_SYMBOL vmlinux 0xc6e128a2 d_delete +EXPORT_SYMBOL vmlinux 0xc6ece6b0 serio_reconnect +EXPORT_SYMBOL vmlinux 0xc6ecf809 tty_unregister_device +EXPORT_SYMBOL vmlinux 0xc7131591 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc77e58b9 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7accd9c __dev_remove_pack +EXPORT_SYMBOL vmlinux 0xc7ad2fb8 wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xc7cf904b skb_unlink +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc8223c31 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xc82d2c95 rtnl_unicast +EXPORT_SYMBOL vmlinux 0xc831a928 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xc856d044 simple_pin_fs +EXPORT_SYMBOL vmlinux 0xc86fc5f7 mpage_writepage +EXPORT_SYMBOL vmlinux 0xc8792f65 journal_set_features +EXPORT_SYMBOL vmlinux 0xc879927f grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xc8b57629 of_find_node_by_path +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8bdb8ea get_sb_bdev +EXPORT_SYMBOL vmlinux 0xc8d28374 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xc8dc52de inet_csk_accept +EXPORT_SYMBOL vmlinux 0xc8de6951 ide_raw_taskfile +EXPORT_SYMBOL vmlinux 0xc8eafde8 sync_blockdev +EXPORT_SYMBOL vmlinux 0xc8f87a9b g450_mnp2f +EXPORT_SYMBOL vmlinux 0xc9670801 of_n_size_cells +EXPORT_SYMBOL vmlinux 0xc982fc3b ps2_handle_response +EXPORT_SYMBOL vmlinux 0xc99237f2 note_scsi_host +EXPORT_SYMBOL vmlinux 0xc994f3a4 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9acb956 kmem_cache_create +EXPORT_SYMBOL vmlinux 0xc9e7bafc fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xca2ac335 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xca2b02e9 i2c_clients_command +EXPORT_SYMBOL vmlinux 0xca300a9b d_alloc_name +EXPORT_SYMBOL vmlinux 0xca4a12f4 kernel_connect +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca75483d do_sync_read +EXPORT_SYMBOL vmlinux 0xca825895 pmu_suspend +EXPORT_SYMBOL vmlinux 0xca9782f9 igrab +EXPORT_SYMBOL vmlinux 0xcab11d1d matrox_mystique +EXPORT_SYMBOL vmlinux 0xcacd272d atomic64_sub_return +EXPORT_SYMBOL vmlinux 0xcad08e48 mmu_hash_lock +EXPORT_SYMBOL vmlinux 0xcae8d4c1 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xcb2cd4fe ida_destroy +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb7bc48a bit_waitqueue +EXPORT_SYMBOL vmlinux 0xcb996167 migrate_page +EXPORT_SYMBOL vmlinux 0xcbc201d0 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xcc272669 __napi_complete +EXPORT_SYMBOL vmlinux 0xcc324d9d unregister_nls +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc4afcf3 inode_get_bytes +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc564a45 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0xcc798e6c jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xccb092ac inet_stream_ops +EXPORT_SYMBOL vmlinux 0xccbf09d7 udplite_table +EXPORT_SYMBOL vmlinux 0xccc5db2e bio_integrity_free +EXPORT_SYMBOL vmlinux 0xccc83540 pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0xcce90cee of_parse_phandles_with_args +EXPORT_SYMBOL vmlinux 0xccf5a113 neigh_for_each +EXPORT_SYMBOL vmlinux 0xcd0166ae qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0xcd2e2389 kernel_getsockname +EXPORT_SYMBOL vmlinux 0xcd3f32e0 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0xcd463dfd mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xcd4c1d38 file_update_time +EXPORT_SYMBOL vmlinux 0xcd89b080 framebuffer_release +EXPORT_SYMBOL vmlinux 0xcdac988c write_one_page +EXPORT_SYMBOL vmlinux 0xcde37beb idr_replace +EXPORT_SYMBOL vmlinux 0xcdffcb7b sysctl_jiffies +EXPORT_SYMBOL vmlinux 0xce09a411 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0xce0cf2f6 follow_pfn +EXPORT_SYMBOL vmlinux 0xce0fb5f1 generic_setlease +EXPORT_SYMBOL vmlinux 0xce0fd5c3 _write_unlock_irq +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce409cda pmac_set_early_video_resume +EXPORT_SYMBOL vmlinux 0xce450f23 ip_ct_attach +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce7b8142 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xce9c584f __starget_for_each_device +EXPORT_SYMBOL vmlinux 0xcebd30b5 DAC1064_global_init +EXPORT_SYMBOL vmlinux 0xcecc2575 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0xcecd8855 ide_do_reset +EXPORT_SYMBOL vmlinux 0xcedf3a27 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0xceef037a remove_proc_entry +EXPORT_SYMBOL vmlinux 0xcf21a682 con_is_bound +EXPORT_SYMBOL vmlinux 0xcf3c2b10 inet_frags_init +EXPORT_SYMBOL vmlinux 0xcf50374d key_payload_reserve +EXPORT_SYMBOL vmlinux 0xcf6288ff invalidate_bdev +EXPORT_SYMBOL vmlinux 0xcf6ac145 tty_set_operations +EXPORT_SYMBOL vmlinux 0xcf721c65 default_file_splice_read +EXPORT_SYMBOL vmlinux 0xcf901697 __strnlen_user +EXPORT_SYMBOL vmlinux 0xcf9d00a0 cdev_init +EXPORT_SYMBOL vmlinux 0xcfaf79ba mempool_alloc +EXPORT_SYMBOL vmlinux 0xcfb55232 input_set_keycode +EXPORT_SYMBOL vmlinux 0xcfb6e435 matrox_millennium +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfc6973d skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0xcfca08f3 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xcfcab3b4 vfs_mknod +EXPORT_SYMBOL vmlinux 0xcfd945b5 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0xcfdaaf5e journal_lock_updates +EXPORT_SYMBOL vmlinux 0xcff40351 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd00652f3 timecompare_offset +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd0200837 journal_load +EXPORT_SYMBOL vmlinux 0xd02a2e5b macio_dev_get +EXPORT_SYMBOL vmlinux 0xd02b3a37 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0xd045c852 pci_device_to_OF_node +EXPORT_SYMBOL vmlinux 0xd06a536a generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xd0941c3c inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0xd09b18c0 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0xd0a45fa5 pmu_enable_irled +EXPORT_SYMBOL vmlinux 0xd0b28fb8 qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd10eae74 do_SAK +EXPORT_SYMBOL vmlinux 0xd12378ca sock_init_data +EXPORT_SYMBOL vmlinux 0xd1262886 rtas_data_buf +EXPORT_SYMBOL vmlinux 0xd12a6fb9 nf_log_unregister +EXPORT_SYMBOL vmlinux 0xd130afe4 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xd135821f xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0xd2004d66 input_grab_device +EXPORT_SYMBOL vmlinux 0xd208e2ed eth_type_trans +EXPORT_SYMBOL vmlinux 0xd23e2e65 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd288592f get_phy_device +EXPORT_SYMBOL vmlinux 0xd289768a bdi_destroy +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd296c637 blk_remove_plug +EXPORT_SYMBOL vmlinux 0xd3308eb4 swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0xd349ca84 bio_free +EXPORT_SYMBOL vmlinux 0xd34db407 __ip_select_ident +EXPORT_SYMBOL vmlinux 0xd3605ed8 netpoll_poll +EXPORT_SYMBOL vmlinux 0xd364e9e3 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xd37a1bd4 of_n_addr_cells +EXPORT_SYMBOL vmlinux 0xd37e213c scsi_remove_host +EXPORT_SYMBOL vmlinux 0xd3bef864 filemap_flush +EXPORT_SYMBOL vmlinux 0xd3c4538e napi_gro_receive +EXPORT_SYMBOL vmlinux 0xd3cbefe7 load_nls_default +EXPORT_SYMBOL vmlinux 0xd3e6f60d cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xd409383c pmu_request +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd44ca16d of_match_node +EXPORT_SYMBOL vmlinux 0xd4635a1c pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0xd471520a unregister_quota_format +EXPORT_SYMBOL vmlinux 0xd4aa9577 set_bh_page +EXPORT_SYMBOL vmlinux 0xd4b2155c jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xd4bfa3f2 serio_open +EXPORT_SYMBOL vmlinux 0xd4cc3b9c sock_no_socketpair +EXPORT_SYMBOL vmlinux 0xd4d6beeb per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0xd4dd3d52 is_bad_inode +EXPORT_SYMBOL vmlinux 0xd4e5e4a1 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0xd4e9bd17 dev_change_flags +EXPORT_SYMBOL vmlinux 0xd4eef864 alloc_disk +EXPORT_SYMBOL vmlinux 0xd523e89d check_disk_change +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd535d6a3 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0xd5449e33 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xd55076d8 qdisc_list_del +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd57430c6 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd58e6fa9 vfs_create +EXPORT_SYMBOL vmlinux 0xd5a10d1f pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0xd5a6dfb5 llc_sap_open +EXPORT_SYMBOL vmlinux 0xd5aa9443 cdev_index +EXPORT_SYMBOL vmlinux 0xd5b2e52a single_step_exception +EXPORT_SYMBOL vmlinux 0xd5e0b5fd gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xd5e41620 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xd5e8444a __div64_32 +EXPORT_SYMBOL vmlinux 0xd618b22d bio_endio +EXPORT_SYMBOL vmlinux 0xd620902e inet_shutdown +EXPORT_SYMBOL vmlinux 0xd627480b strncat +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd63fd608 skb_recycle_check +EXPORT_SYMBOL vmlinux 0xd645e068 key_put +EXPORT_SYMBOL vmlinux 0xd68e1ea4 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0xd69b30e0 atomic64_add_unless +EXPORT_SYMBOL vmlinux 0xd69ebc51 _read_trylock +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6c04c49 scsi_scan_host +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6f7f3c6 ide_complete_rq +EXPORT_SYMBOL vmlinux 0xd7154121 down_interruptible +EXPORT_SYMBOL vmlinux 0xd731c459 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0xd76d467a tty_port_hangup +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd78033e1 request_key +EXPORT_SYMBOL vmlinux 0xd78ba6df sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xd79911f0 blk_unplug +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7acb96e of_find_compatible_node +EXPORT_SYMBOL vmlinux 0xd7b5bc45 genphy_config_advert +EXPORT_SYMBOL vmlinux 0xd8157b00 of_device_is_available +EXPORT_SYMBOL vmlinux 0xd8263cfc pci_save_state +EXPORT_SYMBOL vmlinux 0xd82869f1 pcim_iounmap +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd87235c8 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xd8814703 scsi_host_put +EXPORT_SYMBOL vmlinux 0xd89cbfe7 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8be0ec5 pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xd8d64c3e simple_write_begin +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8f7fad5 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xd90cc538 set_disk_ro +EXPORT_SYMBOL vmlinux 0xd9153c01 of_find_node_by_type +EXPORT_SYMBOL vmlinux 0xd92514ca agp_special_page +EXPORT_SYMBOL vmlinux 0xd96848f4 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0xd96c8608 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd98afd24 key_type_keyring +EXPORT_SYMBOL vmlinux 0xd9bac924 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0xd9c30bec register_filesystem +EXPORT_SYMBOL vmlinux 0xd9ce8f0c strnlen +EXPORT_SYMBOL vmlinux 0xda1872e6 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda3bfee1 pneigh_lookup +EXPORT_SYMBOL vmlinux 0xda7b0da7 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda89359a serio_close +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda984d66 udp_sendmsg +EXPORT_SYMBOL vmlinux 0xdaa50326 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdaae5cff security_d_instantiate +EXPORT_SYMBOL vmlinux 0xdb01eb70 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0xdb09708f __wake_up +EXPORT_SYMBOL vmlinux 0xdb397f48 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xdb485e36 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb4cd5c0 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xdb4f65a2 input_filter_device +EXPORT_SYMBOL vmlinux 0xdb7a667d napi_frags_skb +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdbcc8857 get_disk +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbce89ed journal_revoke +EXPORT_SYMBOL vmlinux 0xdbf55da7 nobh_writepage +EXPORT_SYMBOL vmlinux 0xdbfc481e i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc061e85 netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc92fc1e tcp_read_sock +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcbc86ee dev_open +EXPORT_SYMBOL vmlinux 0xdcea638e of_device_get_modalias +EXPORT_SYMBOL vmlinux 0xdcefb9a5 pmu_resume +EXPORT_SYMBOL vmlinux 0xdcfcae8a vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd1e6b91 arp_find +EXPORT_SYMBOL vmlinux 0xdd1f3934 dquot_transfer +EXPORT_SYMBOL vmlinux 0xdd27fa87 memchr +EXPORT_SYMBOL vmlinux 0xdd2a72a8 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xdd460e9e backlight_device_register +EXPORT_SYMBOL vmlinux 0xdd5a37a7 _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xdd6c29d6 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xdd9e4183 generic_setxattr +EXPORT_SYMBOL vmlinux 0xddbc6c20 scm_detach_fds +EXPORT_SYMBOL vmlinux 0xdde25489 _write_lock +EXPORT_SYMBOL vmlinux 0xddfc8251 gen_pool_add +EXPORT_SYMBOL vmlinux 0xde02a49e __netif_schedule +EXPORT_SYMBOL vmlinux 0xde2f7dc2 security_path_rename +EXPORT_SYMBOL vmlinux 0xde45868a cdev_alloc +EXPORT_SYMBOL vmlinux 0xde540861 cdrom_open +EXPORT_SYMBOL vmlinux 0xde57cc6d invalidate_partition +EXPORT_SYMBOL vmlinux 0xde5faee3 put_mnt_ns +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdec6ce79 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0xdee3b096 security_inode_init_security +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf8146dd skb_gso_segment +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfa4c42e simple_getattr +EXPORT_SYMBOL vmlinux 0xdfa8bc4c tcp_gro_receive +EXPORT_SYMBOL vmlinux 0xdfda9ec8 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xdff43ed4 __debugger +EXPORT_SYMBOL vmlinux 0xdff56e64 adb_poll +EXPORT_SYMBOL vmlinux 0xe018717f tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0xe02eb5dc dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0xe02f5f9b tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0xe0475e6f mutex_lock_killable +EXPORT_SYMBOL vmlinux 0xe04ad1c9 path_get +EXPORT_SYMBOL vmlinux 0xe04b54ab bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe07b8e7f llc_sap_find +EXPORT_SYMBOL vmlinux 0xe0a635a1 tty_vhangup +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0b50b70 inet_add_protocol +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0e14fc6 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xe0e76990 misc_deregister +EXPORT_SYMBOL vmlinux 0xe0f72b2c tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xe10178df pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xe11042de __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xe110517f sock_no_listen +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe11ce144 skb_append +EXPORT_SYMBOL vmlinux 0xe131d8d2 secpath_dup +EXPORT_SYMBOL vmlinux 0xe164238c dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0xe16ad1da scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe183c435 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xe184d884 sock_sendmsg +EXPORT_SYMBOL vmlinux 0xe18586b2 journal_wipe +EXPORT_SYMBOL vmlinux 0xe19c3012 elv_queue_empty +EXPORT_SYMBOL vmlinux 0xe1e97ee1 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0xe203d352 mntput_no_expire +EXPORT_SYMBOL vmlinux 0xe208a330 inode_add_bytes +EXPORT_SYMBOL vmlinux 0xe2127a4b blk_queue_bounce +EXPORT_SYMBOL vmlinux 0xe21794dc pci_enable_bridges +EXPORT_SYMBOL vmlinux 0xe228f8f9 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0xe22d1bf1 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe26efb2b dev_set_mtu +EXPORT_SYMBOL vmlinux 0xe27c7cbe mach_powermac +EXPORT_SYMBOL vmlinux 0xe2969489 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0xe2abc99f ps2_command +EXPORT_SYMBOL vmlinux 0xe2b297c2 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xe2ba0460 neigh_seq_start +EXPORT_SYMBOL vmlinux 0xe2c422db lookup_bdev +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e0c7c6 __flush_icache_range +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2f032f9 end_page_writeback +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe3086bea block_read_full_page +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe3f16330 scsi_remove_device +EXPORT_SYMBOL vmlinux 0xe41339bb udp_disconnect +EXPORT_SYMBOL vmlinux 0xe44397b5 register_gifconf +EXPORT_SYMBOL vmlinux 0xe47a8837 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4ac715c d_prune_aliases +EXPORT_SYMBOL vmlinux 0xe4d96fec alloc_file +EXPORT_SYMBOL vmlinux 0xe4e2bb67 matroxfb_g450_shutdown +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe5077a8f mempool_destroy +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe531f0ea journal_abort +EXPORT_SYMBOL vmlinux 0xe571f649 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe58cfabd kmap_high +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5f7ab34 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0xe5f8db4c generic_file_open +EXPORT_SYMBOL vmlinux 0xe6352bc1 pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0xe63f54c8 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xe65abe48 genl_sock +EXPORT_SYMBOL vmlinux 0xe6633af7 sk_alloc +EXPORT_SYMBOL vmlinux 0xe6a422b9 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xe6dd236d clear_pages +EXPORT_SYMBOL vmlinux 0xe6e34439 bioset_create +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe72d7a9a scsi_execute_req +EXPORT_SYMBOL vmlinux 0xe7460e07 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0xe74a3c40 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xe7ce7439 _memcpy_fromio +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe80188d7 tty_port_close_start +EXPORT_SYMBOL vmlinux 0xe81e8473 tty_free_termios +EXPORT_SYMBOL vmlinux 0xe831c2c8 generic_show_options +EXPORT_SYMBOL vmlinux 0xe8686e4e xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0xe8cd2f7e have_submounts +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe905b7b7 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0xe9082394 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0xe90ab506 netif_rx_ni +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe9178fa4 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xe91c260a skb_dma_map +EXPORT_SYMBOL vmlinux 0xe931bffa key_revoke +EXPORT_SYMBOL vmlinux 0xe9568768 dev_load +EXPORT_SYMBOL vmlinux 0xe9b68e82 inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xe9cf82f2 nlmsg_notify +EXPORT_SYMBOL vmlinux 0xe9d247ff bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0xe9f7df21 stop_tty +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea1393a4 page_put_link +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea788b95 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xeab41587 d_splice_alias +EXPORT_SYMBOL vmlinux 0xeae36f1a serio_interrupt +EXPORT_SYMBOL vmlinux 0xeaeecc86 __mutex_init +EXPORT_SYMBOL vmlinux 0xeb062981 ether_setup +EXPORT_SYMBOL vmlinux 0xeb32ca67 pci_enable_device +EXPORT_SYMBOL vmlinux 0xeb460269 dev_remove_pack +EXPORT_SYMBOL vmlinux 0xeb7cde71 macio_request_resource +EXPORT_SYMBOL vmlinux 0xeb7d0121 inet_listen +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb957dd0 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xeba2a1f7 rtas_indicator_present +EXPORT_SYMBOL vmlinux 0xebac0957 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0xebbc2957 textsearch_unregister +EXPORT_SYMBOL vmlinux 0xebc3bb34 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebddda27 phy_stop +EXPORT_SYMBOL vmlinux 0xebee0fb5 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xebf984d1 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0xec0ef4f4 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xec106d86 sg_miter_stop +EXPORT_SYMBOL vmlinux 0xec15481a of_platform_device_create +EXPORT_SYMBOL vmlinux 0xec1f9d2d scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xec3857b0 seq_open +EXPORT_SYMBOL vmlinux 0xec39374e redraw_screen +EXPORT_SYMBOL vmlinux 0xec517f07 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xec52af7f inet_accept +EXPORT_SYMBOL vmlinux 0xec569dea wake_up_process +EXPORT_SYMBOL vmlinux 0xec7907c7 tcp_poll +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec95858a i2c_use_client +EXPORT_SYMBOL vmlinux 0xecb4c5dd add_disk +EXPORT_SYMBOL vmlinux 0xecd50d1d __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xed02a9a5 cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xed43a835 kernel_read +EXPORT_SYMBOL vmlinux 0xed49ba48 downgrade_write +EXPORT_SYMBOL vmlinux 0xed545c0f set_irq_chip +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xeda5d102 of_mdiobus_register +EXPORT_SYMBOL vmlinux 0xeda721d6 dev_driver_string +EXPORT_SYMBOL vmlinux 0xedb23a26 key_unlink +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedd3dc7b pskb_copy +EXPORT_SYMBOL vmlinux 0xedd4d459 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xede90f1a scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0xedebb93d arp_broken_ops +EXPORT_SYMBOL vmlinux 0xee052d38 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0xee16220c generic_write_checks +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee507701 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xee5490ac phy_start +EXPORT_SYMBOL vmlinux 0xee59412f adb_try_handler_change +EXPORT_SYMBOL vmlinux 0xee7d83aa unregister_netdevice +EXPORT_SYMBOL vmlinux 0xee890cf1 generic_fillattr +EXPORT_SYMBOL vmlinux 0xeea63125 vfs_quota_off +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeef6d0a9 bdevname +EXPORT_SYMBOL vmlinux 0xef628fcb blk_start_queue +EXPORT_SYMBOL vmlinux 0xef674190 journal_start +EXPORT_SYMBOL vmlinux 0xef6811fd pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefde1bbe flush_dcache_range +EXPORT_SYMBOL vmlinux 0xefe95b9b bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0xeff5f71f ida_remove +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf005d758 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0xf02b2244 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0xf040f662 tty_register_driver +EXPORT_SYMBOL vmlinux 0xf0519b67 kunmap_high +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf07f5cfc unbind_con_driver +EXPORT_SYMBOL vmlinux 0xf087baaf xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xf090d966 genphy_resume +EXPORT_SYMBOL vmlinux 0xf0b08b1d devm_ioport_map +EXPORT_SYMBOL vmlinux 0xf0cb21a7 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xf0e731f8 swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf1093964 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xf109f98f vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xf10ac4ee journal_restart +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf1132bda tty_mutex +EXPORT_SYMBOL vmlinux 0xf13f559d fb_blank +EXPORT_SYMBOL vmlinux 0xf149bda5 bioset_free +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf1853bc2 posix_lock_file +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf19e9355 cpu_online_mask +EXPORT_SYMBOL vmlinux 0xf1da11a8 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1dd9fb3 down_read_trylock +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1dfaa5e sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf228d719 of_platform_bus_probe +EXPORT_SYMBOL vmlinux 0xf25a543a sk_free +EXPORT_SYMBOL vmlinux 0xf2810724 bdget +EXPORT_SYMBOL vmlinux 0xf28756fa br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0xf29f6df8 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0xf2a530b7 gen_pool_free +EXPORT_SYMBOL vmlinux 0xf2c8bf75 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xf2ea2987 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0xf2ed571e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3295dde bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0xf32c2ac2 kernel_listen +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf34ebc6d scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0xf35bfa74 udp_prot +EXPORT_SYMBOL vmlinux 0xf3746b6a ide_dump_status +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3cb0bde init_timer_key +EXPORT_SYMBOL vmlinux 0xf3ecfdf9 kobject_get +EXPORT_SYMBOL vmlinux 0xf40d18bf tty_hung_up_p +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4449388 timer_interrupt +EXPORT_SYMBOL vmlinux 0xf462d18b wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xf495d289 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xf4bcba84 macio_register_driver +EXPORT_SYMBOL vmlinux 0xf4e37063 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0xf4e940be unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf50ecbf8 make_bad_inode +EXPORT_SYMBOL vmlinux 0xf50ff94c proc_dointvec +EXPORT_SYMBOL vmlinux 0xf51c6080 input_unregister_handler +EXPORT_SYMBOL vmlinux 0xf51e5036 arp_xmit +EXPORT_SYMBOL vmlinux 0xf52321e0 atomic64_sub +EXPORT_SYMBOL vmlinux 0xf53d41e2 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf55e089a __dst_free +EXPORT_SYMBOL vmlinux 0xf56d2e9a input_release_device +EXPORT_SYMBOL vmlinux 0xf57702bd check_disk_size_change +EXPORT_SYMBOL vmlinux 0xf585fcbb sock_create_kern +EXPORT_SYMBOL vmlinux 0xf58e13e8 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xf5a62ecc _memset_io +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5e1558d crash_shutdown_unregister +EXPORT_SYMBOL vmlinux 0xf5e35e54 of_phy_find_device +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf615a2a2 unregister_con_driver +EXPORT_SYMBOL vmlinux 0xf646ed10 sk_release_kernel +EXPORT_SYMBOL vmlinux 0xf65d8a6c proc_symlink +EXPORT_SYMBOL vmlinux 0xf669c5ce init_file +EXPORT_SYMBOL vmlinux 0xf672cbd2 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0xf6867bee of_platform_bus_type +EXPORT_SYMBOL vmlinux 0xf693fd71 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xf69be488 wait_for_completion +EXPORT_SYMBOL vmlinux 0xf6ada2ff inet_frag_kill +EXPORT_SYMBOL vmlinux 0xf6b19084 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6ecb6ae dev_get_by_index +EXPORT_SYMBOL vmlinux 0xf70384d7 __debugger_sstep +EXPORT_SYMBOL vmlinux 0xf71521ba atomic64_add_return +EXPORT_SYMBOL vmlinux 0xf7239546 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf7661175 journal_stop +EXPORT_SYMBOL vmlinux 0xf7723219 journal_flush +EXPORT_SYMBOL vmlinux 0xf780eb8d tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7b12aee __next_cpu +EXPORT_SYMBOL vmlinux 0xf7b4a7c7 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0xf7bf7126 replace_mount_options +EXPORT_SYMBOL vmlinux 0xf7cc335f gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf7e7a4d3 of_device_unregister +EXPORT_SYMBOL vmlinux 0xf810b5b5 elv_add_request +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf81738f6 __elv_add_request +EXPORT_SYMBOL vmlinux 0xf81e971a elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf85dff06 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0xf872d341 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xf88814d9 fb_show_logo +EXPORT_SYMBOL vmlinux 0xf88841f1 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0xf8d287e5 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0xf8de40a6 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0xf8fda569 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0xf920ce37 tty_devnum +EXPORT_SYMBOL vmlinux 0xf9283d81 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf97f61c3 iget_failed +EXPORT_SYMBOL vmlinux 0xf9a3ebe2 of_node_get +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xfa2e39f7 neigh_ifdown +EXPORT_SYMBOL vmlinux 0xfa31cd3b kfifo_init +EXPORT_SYMBOL vmlinux 0xfa32ac90 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xfa748b1c scsi_block_requests +EXPORT_SYMBOL vmlinux 0xfa82d41e netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xfa8698c7 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0xfa8834c1 locks_init_lock +EXPORT_SYMBOL vmlinux 0xfa9dd504 timecompare_transform +EXPORT_SYMBOL vmlinux 0xfab0a8c5 __inet6_hash +EXPORT_SYMBOL vmlinux 0xfab2a7ba of_device_alloc +EXPORT_SYMBOL vmlinux 0xfabffd55 of_get_mac_address +EXPORT_SYMBOL vmlinux 0xfadb5750 pmu_unlock +EXPORT_SYMBOL vmlinux 0xfaf3d82d blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0xfaf7a7e0 pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb1e5be0 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xfb3d473b ip_dev_find +EXPORT_SYMBOL vmlinux 0xfb63706e inet_frags_fini +EXPORT_SYMBOL vmlinux 0xfb6644f6 bio_kmalloc +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb6e8d06 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xfb9cd194 blk_init_queue +EXPORT_SYMBOL vmlinux 0xfbb1c230 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xfbc667d3 bio_unmap_user +EXPORT_SYMBOL vmlinux 0xfbd00108 scsi_print_command +EXPORT_SYMBOL vmlinux 0xfbd6dbf5 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc1ae190 fasync_helper +EXPORT_SYMBOL vmlinux 0xfc25b123 zero_fill_bio +EXPORT_SYMBOL vmlinux 0xfc312ff6 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc434728 sk_run_filter +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc6dc28f hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0xfc92f997 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xfc9a1fd0 vm_insert_page +EXPORT_SYMBOL vmlinux 0xfca52a63 generic_getxattr +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcac8cbe cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfce6470b clear_inode +EXPORT_SYMBOL vmlinux 0xfce6c560 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd0c5038 adb_unregister +EXPORT_SYMBOL vmlinux 0xfd2b44b5 sk_common_release +EXPORT_SYMBOL vmlinux 0xfd3a19d5 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0xfd626099 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xfd71b8e9 find_lock_page +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfdc0ce7e sock_no_connect +EXPORT_SYMBOL vmlinux 0xfdc0d19c simple_sync_file +EXPORT_SYMBOL vmlinux 0xfdd27088 create_proc_entry +EXPORT_SYMBOL vmlinux 0xfded48ed enable_kernel_fp +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe1406a5 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xfe42f6bb inode_init_always +EXPORT_SYMBOL vmlinux 0xfe466f7f vfs_rmdir +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfeaae30d sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xfeac839e __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfedffaeb tcp_sendpage +EXPORT_SYMBOL vmlinux 0xfeeb86fa xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xfef17ae5 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xff08fd2b proto_register +EXPORT_SYMBOL vmlinux 0xff1765c7 rtas_call +EXPORT_SYMBOL vmlinux 0xff1dd0dd keyring_search +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff2ae131 seq_release_private +EXPORT_SYMBOL vmlinux 0xff30f7b7 input_get_keycode +EXPORT_SYMBOL vmlinux 0xff49ef2c d_lookup +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff6dea25 smp_hw_index +EXPORT_SYMBOL vmlinux 0xff739809 kernel_accept +EXPORT_SYMBOL vmlinux 0xff78f0a3 dst_release +EXPORT_SYMBOL vmlinux 0xff87d65e of_get_pci_address +EXPORT_SYMBOL vmlinux 0xff90338f pci_unregister_driver +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffaffce8 arp_tbl +EXPORT_SYMBOL vmlinux 0xffc99ed0 neigh_update +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0xb9a52c55 crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x42095770 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x7e33d200 async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x8ea1d63f async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xa77ae1a5 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x480e9235 async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x53d578e0 async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0xa731b369 cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0xc5196b13 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0xffbad6e3 cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0x862e3fd0 twofish_setkey +EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x35666783 __pata_platform_probe +EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0xc48d0b6b __pata_platform_remove +EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0xd41497f6 sis_info133_for_sata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23 ks0108_displaystate +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518 ks0108_writedata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333 ks0108_startline +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968 ks0108_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db ks0108_writecontrol +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2 ks0108_page +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b ks0108_address +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x2eb57746 agp_add_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x69ce6568 agp_remove_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5 agp_num_entries +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0291a3e8 tpm_show_pubek +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0f01b7cc tpm_gen_interrupt +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x18b30259 tpm_dev_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x28eb04d7 tpm_get_timeouts +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x303cf165 tpm_pm_resume +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x305e5047 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f61e1b4 tpm_write +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x41913d91 tpm_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x429a582d tpm_show_owned +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x45f0a7c3 tpm_show_caps_1_2 +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4a2251c0 tpm_pm_suspend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x638c4e6c tpm_continue_selftest +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x76f9261a tpm_calc_ordinal_duration +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x88a8c41a tpm_open +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa4eea8a6 tpm_show_pcrs +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa50de1b4 tpm_dev_vendor_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa538edb7 tpm_register_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xab66d0b4 tpm_store_cancel +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xad2176ad tpm_show_enabled +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d tpm_pcr_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xae867680 tpm_show_caps +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbb5f0f2c tpm_remove_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbc06ce84 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5 tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf41529a7 tpm_show_active +EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc cn_netlink_send +EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e cn_add_callback +EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x09e0e348 edac_device_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a edac_pci_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x23489585 edac_device_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2ed796cf edac_pci_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3f912b1e edac_pci_reset_delay_period +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x520a1690 edac_mc_handle_ce_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5494f29a edac_pci_create_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a edac_device_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x73f74c9e edac_pci_release_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x82d0f590 edac_pci_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x849acc7f edac_mc_find_csrow_by_page +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x87f65f96 edac_device_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xac1e005f edac_mc_del_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbf99c6bd edac_device_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc7d4514b edac_device_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc9ffbcfd edac_mc_free +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcb7a2a0e edac_pci_handle_npe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd3605ab1 edac_mc_handle_ue_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd623bfd9 edac_pci_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xda5977a2 edac_mc_alloc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe039026e edac_device_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe5cbca40 edac_mc_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xefc05653 edac_mc_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf0deac6e edac_mc_add_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf7597d7c edac_pci_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xfc6d03e9 edac_pci_handle_pe +EXPORT_SYMBOL_GPL drivers/hid/hid 0x02fb83c9 hidinput_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x03cfac5d hid_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x3d943251 hidraw_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0x450e60fa hid_add_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0x4be61f0a hidinput_find_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0x5deac4d1 hid_input_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x5fe76eb3 hid_report_raw_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0x69a2257e __hid_register_driver +EXPORT_SYMBOL_GPL drivers/hid/hid 0x7aa69c3b hidinput_report_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0x7cae43d8 hid_check_keys_pressed +EXPORT_SYMBOL_GPL drivers/hid/hid 0x932fff8d hid_output_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0x9fdfe640 hidraw_report_event +EXPORT_SYMBOL_GPL drivers/hid/hid 0xa9020381 hid_allocate_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xd01bcdff hid_destroy_device +EXPORT_SYMBOL_GPL drivers/hid/hid 0xda394aa5 hidraw_connect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xec2c2596 hid_parse_report +EXPORT_SYMBOL_GPL drivers/hid/hid 0xecd56d97 hidinput_disconnect +EXPORT_SYMBOL_GPL drivers/hid/hid 0xedd4928a hid_set_field +EXPORT_SYMBOL_GPL drivers/hid/hid 0xfc190936 hid_unregister_driver +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e usbhid_lookup_quirk +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x1ae365e7 usbhid_submit_report +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xa3891f62 hiddev_hid_event +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xbae44727 usbhid_set_leds +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x032af72f lis3lv02d_init_device +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x5e753456 lis3lv02d_poweroff +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494 lis3lv02d_joystick_disable +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c737cd2 lis3lv02d_poweron +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x944d717d lis3lv02d_remove_fs +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xa77ea0ad lis3_dev +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8 lis3lv02d_joystick_enable +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x1fd506e6 hpsb_config_rom_ip1394_add +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb5f7725f hpsb_config_rom_ip1394_remove +EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf hpsb_disable_irm +EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xc28cf9ca input_ff_create_memless +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1ed80720 wm97xx_read_aux_adc +EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x226a202d wm97xx_config_gpio +EXPORT_SYMBOL_GPL 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drivers/net/usb/rndis_host 0x0b18fabc rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2d33893f rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x90a6056e rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xd07c06c1 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xeb649551 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xed49a48d generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x02867a8f usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x07983840 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x33cb45a2 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x36261e34 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3772fa2c usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x432b2335 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4586873b usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5335eb2e usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6797c08b usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7d96eb38 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7e89d41b usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7f8eb760 usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8b4d073b usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x944d2834 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x95ff0ab9 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xca4b3b70 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcc3867ee usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcece7a00 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe9f4be40 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xed1f3238 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf3fd1b69 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x00cd065c i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1c5f5f99 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x49067f91 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x52c72e4f i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5e393459 i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9bb4333a i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa4d48419 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc13634f7 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcc70901c i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd9d4bf2e i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xde5a0d92 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe079deef i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe4d0fbcd i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xcef7f114 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1b7012cf lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x27eaa96b lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x476c4c71 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6bbc4e99 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7802ec57 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x841f7b4e lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8c43689b lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x99f44aca lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa023d4ec lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa4b8ff42 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa6af524e lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xac7cc922 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb7b76916 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbb588270 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xec8f8b33 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2b96a94a lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x34f8b6ce lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x41eaa3a5 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x5f746ccd __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x86b15c87 lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x87bd6bc2 lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa572060b lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb3ddc68a lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x3165a154 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xba209f84 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0c39b85d p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x76414ee9 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xaf350100 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb16f47ff p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd29e59a5 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe225cb23 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xec6d64df p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf53db8b7 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x048bb276 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x073faaf4 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0cd708a3 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3dc6c3fa rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x52498c95 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x656d2cd3 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x70d19a8f rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x713deb69 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7339d277 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x73c82fe8 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7dcc68a8 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x832e5124 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x85df092b rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x85efcdb1 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa55e0758 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa950a4ac rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xac70c4f0 rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb8825559 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc2a98e59 rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd6d8d1af rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe5c2757b rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xec317bc9 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x086a3f47 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x21e0983e rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2d82b92a rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6cbf4aae rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6f91ea89 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x76975791 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x89f890ca rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x9f0894f1 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc59d2f33 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0ea901cf rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x13921809 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x13f87331 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x27333159 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4222f22d rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x46f0ef02 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x50df4735 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6f0c98cd rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x789c7ee8 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa74277c4 rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xae32f1f4 rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb1f55a73 rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbc2d7115 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbe8b4553 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd30888d9 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf9114762 rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x2f5a8c53 pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xe005216b pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0c6bdb35 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x82b8a045 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb5180f36 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xcf42731c wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xdddd1d91 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf38917d7 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x388dfb8c wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x150f336c scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x2e917255 scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x670864e6 scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xc39cecd6 scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xc4201c4e scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x10cad4ed fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x03e97fad iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0c87db4d iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1284a929 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x214c2638 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x25b5cf1d iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2c41baac iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f88d369 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2fc76412 iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3267e6f3 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3e004738 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f3e6c68 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f6b0f4d iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x557ea238 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x57d2a0f5 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x57ee2f93 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x58cad70f iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7117356e iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7421aafb iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x75b429f4 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76449a5b iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76686c2b iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7912de18 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x842b10de iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8bab6e5e iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x98080cd3 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9923c0ea iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x997721f8 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa06270c9 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa1ae3e0c iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa825ee69 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb483ce74 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5459c11 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8ad1695 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbc302aaf iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc99acffb iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc961249 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd7df4c54 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdfaca272 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeae3d127 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xffb785e6 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x093dbdcb iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0bfb0256 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x161e5b92 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1710fcb8 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x19a43507 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1e47bae8 iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x49d6e413 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4ca67397 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5b921661 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7d6ab552 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8a24dd6f iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8aa9e7cb iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa861f67d iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbbe8e297 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd7002433 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xea50f78f iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x04dbf5d1 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0be9d827 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x194784b6 __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1ac6cc94 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x274da2ab sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2fe5993d sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x349df570 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x67031511 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6dda9078 sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x90bf6388 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3a415d8 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa5cc0027 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xabca977a sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaec6b19c sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb639b7b0 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbdcfd463 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc55b585c sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc89c9a86 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcfd35c84 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd286d160 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd9ce0472 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xddf81351 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe92e9ff3 sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x053b6fc1 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x1485a034 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x4b6ab038 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x66b73447 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x86c2a891 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xcd8823ca srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x1782724c scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x408b479c scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x72eeb6d8 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x82ce6067 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9e04fad4 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9faa73f3 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa9cf48d9 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd2a5922b scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe54eeb9b scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x027a309e iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1111b2bd iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x17c4a5ee iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x203b061e iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x36b85c87 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3962fc5e iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3afb71eb iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4f37760e iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x51b36610 iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5aa6f57d iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x61d0676e iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x76ab7385 iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x866088b5 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x879d6c2c iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x910943f3 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xac8ebc18 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaf1f67e3 iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd8569f5c iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe031c422 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe81a1a81 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeb6846a9 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xece0072d iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1c79ede3 srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x28d9428e srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x760ef619 srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x795acf38 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa4cdb8c4 srp_remove_host +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x1082d01c pciserial_remove_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x48b36f8a pciserial_resume_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x6f5d4d01 pciserial_init_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x924f0b80 pciserial_suspend_ports +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x38f979b5 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x914ae5cb spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x973083e1 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xbaad3af4 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc3fab2d0 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xd372314f spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/uio/uio 0xa3f4c41e __uio_register_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0xb10b1281 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0xf0faa26c uio_event_notify +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x81731338 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xcd61c025 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0233c741 usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x07df3504 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4bba0919 usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x596b7331 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x5f720b37 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7cde1504 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xac5f1277 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb7ad984a usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc00fb412 usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x03d6764b ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0e7e7b79 usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x171a9fb4 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1c1c7926 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x24de5b0a usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2bd21e22 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3813a271 usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x54c9b4f0 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x85a1bc56 usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x91e24670 usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa1c16a0b usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xec9bf1bb usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xeea793c0 usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfe378786 usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfe99d9f3 usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x033faa4b usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x07edfcb8 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0954075e usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2268c055 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3b84a97b fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7992ba4f usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7ece0292 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x842a0c36 usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8aacff1d usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x98583e76 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9bf2c9da usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa2515d3c usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa79b3cc3 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb48f2ee4 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb4e04039 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb86b2dbb usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd3d8ce47 usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdf7d0166 usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe1bd584b usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe63ce07d usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xef91f90f usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfb50f1e5 usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfe8c7861 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x6c64fd75 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x72129ade wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x82c9bb5c rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 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drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb9c96d78 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc7019388 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xcb12575d wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe262fc6f wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe46fbaa7 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf05dd0f6 wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb40ad6dd i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xd2ae87bf i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xfc2c454c i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x0dcf8ba0 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x2c84e7f5 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x55ee1f41 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x66d62017 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x93aa7d72 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa1283211 uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xcc1a599b uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf7e07c1f uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0d69f7ef __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x5032586c umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x5e035c8a umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x9b79fbcb umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xdb0b3658 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xdc61eb90 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xe84ce5e4 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xfe157405 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x06726463 uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x13e59a33 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x161a6775 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1cc39d11 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x20825bd5 uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x280379fa uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x28e27dae uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x336c2cc7 uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3943d7d5 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3e8f5715 uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3f93c8c4 uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4a00dc5d uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x57c3ddb8 uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x59613ae4 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5a17c82f uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6211aded uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x633c0bbd uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x71361316 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x719618d6 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x76de12a5 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x82ac9e70 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x94504320 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x97bd2c91 uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x999da4ff uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c4979da uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc01dd677 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc08ba38b uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc1944e22 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcc06458f uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd975c328 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe2ef8864 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4dd219a uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea4baf71 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xed974bd7 uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xee9ee2ab uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xefdd52d7 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfbf78e36 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/whci 0x2db01855 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x04080980 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0421e11c wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0b5440c4 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x112bf310 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x23c938c0 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2e6647cf wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x32c8250a wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3ded274b wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x422e1e25 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4ab99528 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4cee58ec wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x54056df2 wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x641f3187 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x649fa184 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6978ca3f wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x85e66e55 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x85e7afc3 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x945bf788 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb083983d wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc72e06c8 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc7db1d29 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd305b79f wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd67d279f wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xde72fcc4 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe018b70b wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe1bafba7 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe4125721 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe5092b15 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe6a29578 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xebf22beb wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd60af6f wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfe7e36d6 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x220d5128 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4d5210bd ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x6d5f5251 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x8524051c ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa9fc901f ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xd9e4eb1a ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf20265ee ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x5c889967 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xd13b20bd fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xa208f2ff sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xdffc0edb sis_free_new +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x02093c7b virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x35945b21 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x3d197cff register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x4512efc2 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xb95dedfa register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x79b1597a vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x954914ca vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x9eefc6a0 vring_transport_features +EXPORT_SYMBOL_GPL drivers/w1/wire 0x34f56199 w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x413789cb w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x468b9e7e w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x531ecd16 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x93a73b5c w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x94fb8ce2 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbb0c635a w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbbe597a9 w1_read_8 +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x04a156f7 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x736c1726 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xf8d56e80 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x74af95c7 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x85bf1d9a exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x1647ee53 fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x1cea14e3 fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x33eedc22 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0x3425470f fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x6a8483bf fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x73383f73 fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x7c207358 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xaaafe683 fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0xb57239b7 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xba158300 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xbfc6a58f fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0xc37fef41 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0xc4ff8aca fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xca0bc8c1 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xddb32e9f fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xe3b5d8d4 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xe54c4b70 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xe62aa613 fat_attach +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3aad6c06 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4ff3326d nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6d293167 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xbfe2372b nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe5165325 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x28ce98fe nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x9fc8dd5e nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0ee1bdcb o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0f7e08fc o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2b344734 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x5475e276 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x59a76aea o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6055bd98 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xda4b6b0d o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x009fc9c3 dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x033fbf9e dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xc92f6549 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd6542076 dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xeea7eae3 dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xf3370487 dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x3af44513 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x643ebd9d ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbcc07a07 ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670 lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27 lzo1x_decompress_safe +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x02c8f357 garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0x41d7741e garp_unregister_application +EXPORT_SYMBOL_GPL net/802/garp 0x491476e1 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x54d97ae8 garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0x5ff6049b garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x84e5ef2e garp_request_join +EXPORT_SYMBOL_GPL net/802/stp 0x4bbaa476 stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 0xaa52353e stp_proto_register +EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05 ax25_bcast +EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e ax25_defaddr +EXPORT_SYMBOL_GPL net/ax25/ax25 0xde4bc6af ax25_register_pid +EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0xcedc00f9 bt_class +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0045d69a inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0a1ee88e dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0e84b53c dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0fbd653a dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x134c483a dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x14a872dd dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0x152149cb dccp_send_sync +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x211884c3 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x2f911f8c dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x564f6b79 dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a81d101 dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5e58a9f4 dccp_sendmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x63bae0c0 dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x64820d33 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0x65f13e2f dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6a37b29b dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6dc67fd3 dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7645797c dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7f55e846 dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0x804b7df8 dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x80b7cd6d dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8badabb1 dccp_create_openreq_child +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8d3918e5 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa66212d3 dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0xaa08436a dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb1830cbb dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb29a9c97 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb7a672d5 dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbb829b6f dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc17af03c dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc9275f1a dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0xdbc9cc6a dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0xec943168 dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xf371e297 dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x0f3d3586 dccp_v4_do_rcv +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3c39c40c dccp_v4_request_recv_sock +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x8e875e9e dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x96d0682a dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa31a4b5b dccp_v4_conn_request +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc97b80bb dccp_invalid_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921 need_ipv4_conntrack +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x72de46f7 nf_nat_seq_adjust_hook +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10 nf_defrag_ipv4_enable +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6 nf_nat_proto_in_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0b873f4d nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x4511a4f2 nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x53bf3c12 nf_nat_proto_unique_tuple +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x8a9cb1d8 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134 nf_nat_proto_nlattr_to_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xa1808b65 nf_nat_proto_range_to_nlattr +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xcd6a7494 nf_nat_proto_put +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xfc09089c nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x34c4bc87 tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x4b9f0692 tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x5a0dc2a9 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x902edf58 tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc280173f tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x0755b270 inet6_csk_search_req +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1 net_ipv6_ctl_path +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6423df1d ip6_dst_blackhole +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6aa9c7ab inet6_csk_addr2sockaddr +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6c38851e ipv6_dup_options +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6d3664cb inet6_csk_bind_conflict +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x7683eeae ipv6_opt_accepted +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x80dcad9f inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b inet6_hash_frag +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x97ac65b8 inet6_csk_xmit +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xa3018c9f ipv6_find_tlv +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb6ffdd71 fl6_sock_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xc4d7c3a1 ip6_sk_dst_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xcf4a925a inet6_destroy_sock +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xd06a27f8 ip6_local_out +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xdb6e58b4 ip6_dst_lookup +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe775d0ed inet6_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x9f54f699 ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xa9914668 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net/sunrpc/sunrpc 0xb44a9116 svc_addsock +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb7673eb1 svc_find_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb8790e20 rpc_call_null +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb90f1a31 rpc_init_wait_queue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba1e13f1 xdr_reserve_space +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96 nfsd_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3 rpc_calc_rto +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc148de4f rpc_put_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc1b80fbe rpcb_getport_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc24072a7 rpc_print_iostats +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471 xdr_decode_netobj +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea qword_addhex +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc9229661 svc_reserve +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbec7575 xdr_decode_array2 +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3 xprt_load_transport +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd05ed567 rpc_clone_client +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0fbe995 xdr_inline_decode +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1f1f8be rpc_queue_upcall +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2c05352 svc_auth_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd35d363a rpc_wake_up_next +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd383b4a4 svc_xprt_init +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd59a151c xdr_encode_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd5b24eed rpcauth_lookup_credcache +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd61bbe72 svc_create +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd98bbd49 svc_process +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc1145fb xdr_buf_from_iov +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdcabbbf0 svc_reg_xprt_class +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd11211f rpc_run_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd332a62 rpc_restart_call +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe126efcc rpc_mkpipe +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe1ec82ed xprt_release_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe32b1fb4 xprt_lookup_rqst +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe3669069 sunrpc_cache_update +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe53d676e rpc_restart_call_prepare +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1 xdr_encode_opaque +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe846d7a8 svc_sock_names +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5 qword_get +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe99a5f48 rpcauth_destroy_credcache +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebe62dd6 rpc_destroy_wait_queue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed8f16d3 rpcauth_init_credcache +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4 qword_add +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69 rpc_update_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf1f6f7ee read_bytes_from_xdr_buf +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf27bf7f3 svc_exit_thread +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf292a093 xprt_set_retrans_timeout_def +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf37eeb1c xprt_complete_rqst +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf499f036 rpc_unlink +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf6108ce2 svc_xprt_names +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf8a2b0d5 rpc_sleep_on +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c rpc_free +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa4222c3 rpcauth_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfad95f60 svc_drop +EXPORT_SYMBOL_GPL net/wimax/wimax 0x033075e4 wimax_msg_data_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x034e9103 wimax_dev_add +EXPORT_SYMBOL_GPL net/wimax/wimax 0x067c2359 wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0x1adb1d13 wimax_msg_alloc +EXPORT_SYMBOL_GPL net/wimax/wimax 0x219832e2 wimax_msg_data +EXPORT_SYMBOL_GPL net/wimax/wimax 0x5551f86f wimax_state_get +EXPORT_SYMBOL_GPL net/wimax/wimax 0x9449e700 wimax_msg +EXPORT_SYMBOL_GPL net/wimax/wimax 0x95e7dc76 wimax_state_change +EXPORT_SYMBOL_GPL net/wimax/wimax 0xa9b032ba wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0xbc7c0e8a wimax_report_rfkill_sw +EXPORT_SYMBOL_GPL net/wimax/wimax 0xce32eb55 wimax_dev_rm +EXPORT_SYMBOL_GPL net/wimax/wimax 0xd2993525 wimax_msg_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0xe104e4cc wimax_report_rfkill_hw +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0ec12f52 cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1469d7ca cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1817e174 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x256ad983 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2ce13e86 cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2ce391fa cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ddb5f45 cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x440fabf5 cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4cc1dee9 cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x503be49f cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x59e33af2 cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6d15e500 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x80350928 cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x88a4ffdc cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x89cf1bc3 cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x91ba15da cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa2a81d10 cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xac1e5878 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xac2a198b cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb003c9f4 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb4ae4d5e cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb9b041e3 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbd2a932d cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd0777f86 cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xde706875 cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x18b635c9 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x70efe158 ipcomp_destroy +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x898b34d5 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xeb419b26 ipcomp_init_state +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x2a64bbae pmf_gpio_methods +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x4de7f01b aoa_get_card +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x62458d2b aoa_fabric_register +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x83eccdcf aoa_snd_device_new +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x8dd0ad96 aoa_fabric_unregister +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x90b09574 aoa_fabric_unlink_codec +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x919857f1 aoa_codec_unregister +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xadd7d995 ftr_gpio_methods +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xcadd3901 aoa_codec_register +EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xf6757df3 aoa_snd_ctl_add +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x0ad97761 soundbus_dev_put +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x2fccc006 soundbus_dev_get +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x65cb2185 soundbus_remove_one +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x83641ac3 soundbus_unregister_driver +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xcdc18f6d soundbus_add_one +EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xdbffc0a0 soundbus_register_driver +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x00860551 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01756993 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x08030e35 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f9d7621 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11bff498 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1602d23b snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a7d9abb snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b217dc5 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1c19042c snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d3bab1f snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x208721f4 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x211f8572 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2197aef2 snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x243210ea snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x289ce645 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x29b2ae8a snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2ceb7826 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2d6b10bd snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e5438d2 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32c47186 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x38343db7 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x40e3f688 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x417f9517 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x43ad875b snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x43f29c4c snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x45d1d98e snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x475cc628 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x47deb42b snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x486207e3 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4bae7155 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4f391d99 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x61e41131 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x637fcf9f snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x63ce1d7e snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x653a46f2 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68b4c171 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6d61e3a2 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6facbe3c snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6feba2b0 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x706b8cd7 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x71cac1f7 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x75b48e81 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7bd0524f snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e5b5aa6 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ebc7e43 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8f970214 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x943a59bc snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f4634f7 snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9fb73576 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae06b836 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb866427f snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xba7f4e4e snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc065a069 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc2efe17b snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc407323a snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc55ccce5 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9134e81 snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xca2e7f8a snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcc156517 snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd2fc3f7 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce1ebd04 snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe117426d snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe38c637c snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6aa329e snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeba0bfb3 snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeef197ce snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf2708008 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf29dcd0a snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf5340bd5 snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfc132321 snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfc8e6974 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xbf7afe15 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xce0cb172 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xfc23e79e soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x377db6f3 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x38b4011a soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xf52f7297 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xf7af0a2e soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xa56ca42f soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xd14b4e7c pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x78ac66e5 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xaed9a1e4 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x79bd8179 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xda1e1b33 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x7b22af12 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xe9d55472 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x356ec448 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x36d18a7c aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x66212d3b aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8b52b34b aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8b6285cd aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe807cfba aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xeb3e5a8c aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x015429ec soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xfa7d452e twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xc0ec4fe9 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x483d30f9 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xf1567380 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x2d99761b wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x53c95494 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x8f3ce819 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x756450a5 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xc8d5aec6 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x51e086d9 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x5d46bbb2 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x5e31bd56 soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x87ba7e21 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x31767a03 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xc2d8243f wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x43a07e43 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe176ab7d soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xeb2c98dc wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xfce0e68e soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xd7cdb54d soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xfc194e3a wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x1af45356 soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xac9ea549 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x2a0ad7e7 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x31d90095 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x1dfdfb8a soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x58d1815a wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x1e792fe4 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xcf4e9073 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x06a07492 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xa2654862 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x73226943 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xdc3e88e6 soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x152568d9 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x3906e09a wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x4d945595 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x5c1937e3 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x027d4f07 snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x02bf5c64 snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x08444ce9 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x085172ab snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0a859861 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0d6996a4 snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e583173 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1bf918f3 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1e8cf6be snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x20500a1b snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x237f1452 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x288dfe8b snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ea19990 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ec760e5 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x30281777 snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x386a767c snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3f61eb9e snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c329189 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5e5cc370 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x612e573b snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6184b6e9 snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62edaec1 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62f9f431 snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65cdf154 snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x69a4c57f snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6aec15b3 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c1c3ed5 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c4f6245 snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c718a06 snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6e91d3ad snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6ef046c1 snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x701faf0e snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x71a3f884 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x79393a78 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x808e7656 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8d1173fc snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8ea80e1f snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x90c3017e snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x92578ec9 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x98d5ea21 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9c85e428 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d3b8af6 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa160ba61 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa3c64bc1 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xacea8eb3 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb011bb1d snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb0769f91 snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb446860a snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4a1361f 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add_to_page_cache_lru +EXPORT_SYMBOL_GPL vmlinux 0xafa3e3d5 dma_get_required_mask +EXPORT_SYMBOL_GPL vmlinux 0xafb419cc usb_reset_endpoint +EXPORT_SYMBOL_GPL vmlinux 0xafb56f7c device_create_vargs +EXPORT_SYMBOL_GPL vmlinux 0xafd67f3a rt_mutex_destroy +EXPORT_SYMBOL_GPL vmlinux 0xb05aa4fa rtc_irq_set_state +EXPORT_SYMBOL_GPL vmlinux 0xb05cd2a7 mnt_want_write_file +EXPORT_SYMBOL_GPL vmlinux 0xb0950ec5 invalidate_inode_pages2_range +EXPORT_SYMBOL_GPL vmlinux 0xb098f6fb part_round_stats +EXPORT_SYMBOL_GPL vmlinux 0xb0a7e1bb __put_net +EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e fips_enabled +EXPORT_SYMBOL_GPL vmlinux 0xb0e9c4f2 ata_dev_next +EXPORT_SYMBOL_GPL vmlinux 0xb116f433 ide_queue_pc_tail +EXPORT_SYMBOL_GPL vmlinux 0xb18429eb suspend_device_irqs +EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce rcu_barrier_sched +EXPORT_SYMBOL_GPL vmlinux 0xb2152fc4 of_irq_to_resource +EXPORT_SYMBOL_GPL vmlinux 0xb24e59ed __root_device_register +EXPORT_SYMBOL_GPL vmlinux 0xb24ea0b1 find_symbol +EXPORT_SYMBOL_GPL vmlinux 0xb262cec8 crypto_alg_mod_lookup +EXPORT_SYMBOL_GPL vmlinux 0xb2e64eeb usb_get_current_frame_number +EXPORT_SYMBOL_GPL vmlinux 0xb2fb1875 usb_lock_device_for_reset +EXPORT_SYMBOL_GPL vmlinux 0xb30a26db irq_find_mapping +EXPORT_SYMBOL_GPL vmlinux 0xb337e335 eventfd_ctx_fdget +EXPORT_SYMBOL_GPL vmlinux 0xb3925ff9 ata_cable_80wire +EXPORT_SYMBOL_GPL vmlinux 0xb3ba19ed generic_sync_sb_inodes +EXPORT_SYMBOL_GPL vmlinux 0xb3f20c11 i2c_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xb424572f ide_init_pc +EXPORT_SYMBOL_GPL vmlinux 0xb466d472 crypto_larval_alloc +EXPORT_SYMBOL_GPL vmlinux 0xb4b50b7b unregister_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xb5050adc usb_set_device_state +EXPORT_SYMBOL_GPL vmlinux 0xb511b8b2 cpufreq_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64 edac_op_state +EXPORT_SYMBOL_GPL vmlinux 0xb5240147 platform_device_alloc +EXPORT_SYMBOL_GPL vmlinux 0xb54c8d9b crypto_register_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xb585ee41 scsi_flush_work +EXPORT_SYMBOL_GPL vmlinux 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+EXPORT_SYMBOL_GPL vmlinux 0xb8344740 transport_destroy_device +EXPORT_SYMBOL_GPL vmlinux 0xb8362e69 usb_match_id +EXPORT_SYMBOL_GPL vmlinux 0xb8848177 da903x_update +EXPORT_SYMBOL_GPL vmlinux 0xb8aef7fc pmac_i2c_xfer +EXPORT_SYMBOL_GPL vmlinux 0xb8fb489d usb_put_dev +EXPORT_SYMBOL_GPL vmlinux 0xb91cd175 tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0xb94b7188 simple_attr_read +EXPORT_SYMBOL_GPL vmlinux 0xb9591ba8 filter_match_preds +EXPORT_SYMBOL_GPL vmlinux 0xb9e44bf5 hrtimer_cancel +EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9 add_uevent_var +EXPORT_SYMBOL_GPL vmlinux 0xb9f84070 ide_release_dma_engine +EXPORT_SYMBOL_GPL vmlinux 0xba2191aa __get_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xbaaf8a3a ide_read_error +EXPORT_SYMBOL_GPL vmlinux 0xbab7eae6 register_kprobes +EXPORT_SYMBOL_GPL vmlinux 0xbae34c27 scsi_nl_remove_transport +EXPORT_SYMBOL_GPL vmlinux 0xbb65a9f6 driver_register +EXPORT_SYMBOL_GPL vmlinux 0xbc74e2b4 inet_diag_unregister +EXPORT_SYMBOL_GPL vmlinux 0xbc79fc81 rt_mutex_lock_interruptible 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+EXPORT_SYMBOL_GPL vmlinux 0xc0278970 __inet_lookup_established +EXPORT_SYMBOL_GPL vmlinux 0xc05ac540 spi_write_then_read +EXPORT_SYMBOL_GPL vmlinux 0xc07aa67e __module_address +EXPORT_SYMBOL_GPL vmlinux 0xc0e60af6 fsstack_copy_inode_size +EXPORT_SYMBOL_GPL vmlinux 0xc0fae966 crypto_shash_update +EXPORT_SYMBOL_GPL vmlinux 0xc0fce15a transport_class_register +EXPORT_SYMBOL_GPL vmlinux 0xc126e890 klist_del +EXPORT_SYMBOL_GPL vmlinux 0xc14d6f9e vfs_removexattr +EXPORT_SYMBOL_GPL vmlinux 0xc17515d7 usb_hcds_loaded +EXPORT_SYMBOL_GPL vmlinux 0xc1fd33d9 ata_sff_softreset +EXPORT_SYMBOL_GPL vmlinux 0xc20ac46c crypto_destroy_tfm +EXPORT_SYMBOL_GPL vmlinux 0xc20e18f8 set_task_ioprio +EXPORT_SYMBOL_GPL vmlinux 0xc22a3091 vm_unmap_aliases +EXPORT_SYMBOL_GPL vmlinux 0xc26ebbc4 fuse_dev_release +EXPORT_SYMBOL_GPL vmlinux 0xc2db91c8 media_bay_set_ide_infos +EXPORT_SYMBOL_GPL vmlinux 0xc2fbaf1f regulator_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc3125944 fuse_put_request +EXPORT_SYMBOL_GPL vmlinux 0xc314f48e fb_deferred_io_init +EXPORT_SYMBOL_GPL vmlinux 0xc3180804 ata_bmdma32_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xc332d28d of_irq_map_pci +EXPORT_SYMBOL_GPL vmlinux 0xc34efe27 snmp_fold_field +EXPORT_SYMBOL_GPL vmlinux 0xc398cee2 do_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xc399468f scsi_nl_remove_driver +EXPORT_SYMBOL_GPL vmlinux 0xc415f27d irq_find_host +EXPORT_SYMBOL_GPL vmlinux 0xc428068d sata_deb_timing_long +EXPORT_SYMBOL_GPL vmlinux 0xc42919fa transport_setup_device +EXPORT_SYMBOL_GPL vmlinux 0xc46d877e schedule_hrtimeout +EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf ata_mode_string +EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6 tracepoint_probe_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc4e75326 __rtnl_link_register +EXPORT_SYMBOL_GPL vmlinux 0xc54b81a3 sysfs_remove_file_from_group +EXPORT_SYMBOL_GPL vmlinux 0xc555dea7 ata_port_schedule_eh +EXPORT_SYMBOL_GPL vmlinux 0xc586ec5c spi_unregister_master +EXPORT_SYMBOL_GPL vmlinux 0xc5a79fab unregister_jprobes +EXPORT_SYMBOL_GPL vmlinux 0xc5b18c00 ide_device_get +EXPORT_SYMBOL_GPL vmlinux 0xc5e05a64 cpufreq_register_governor +EXPORT_SYMBOL_GPL vmlinux 0xc606cd3c boot_cpuid +EXPORT_SYMBOL_GPL vmlinux 0xc608d552 alloc_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec __ftrace_vprintk +EXPORT_SYMBOL_GPL vmlinux 0xc673e23e ata_scsi_change_queue_depth +EXPORT_SYMBOL_GPL vmlinux 0xc699ed43 sysdev_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc6a3f250 ide_read_status +EXPORT_SYMBOL_GPL vmlinux 0xc6e97435 user_update +EXPORT_SYMBOL_GPL vmlinux 0xc6eb08c7 ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0xc7430d29 generic_fh_to_dentry +EXPORT_SYMBOL_GPL vmlinux 0xc7504484 tracepoint_get_iter_range +EXPORT_SYMBOL_GPL vmlinux 0xc7673399 invalidate_inode_pages2 +EXPORT_SYMBOL_GPL vmlinux 0xc7e1bbe8 crypto_alg_lookup +EXPORT_SYMBOL_GPL vmlinux 0xc8258c7f rdev_get_id +EXPORT_SYMBOL_GPL vmlinux 0xc88bedfd platform_device_put +EXPORT_SYMBOL_GPL vmlinux 0xc89e9395 ring_buffer_lock_reserve +EXPORT_SYMBOL_GPL vmlinux 0xc8bc43fe ide_pio_cycle_time +EXPORT_SYMBOL_GPL vmlinux 0xc8fb34ce power_supply_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc94d9e37 cleanup_srcu_struct +EXPORT_SYMBOL_GPL vmlinux 0xc9561772 fb_destroy_modelist +EXPORT_SYMBOL_GPL vmlinux 0xc9641537 get_dcookie +EXPORT_SYMBOL_GPL vmlinux 0xc970c348 ata_port_disable +EXPORT_SYMBOL_GPL vmlinux 0xc973637b ata_pci_remove_one +EXPORT_SYMBOL_GPL vmlinux 0xc977cb61 ata_do_eh +EXPORT_SYMBOL_GPL vmlinux 0xc9d022a3 usb_register_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xc9dabc51 inet_csk_bind_conflict +EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21 free_percpu +EXPORT_SYMBOL_GPL vmlinux 0xca0df0f6 tty_perform_flush +EXPORT_SYMBOL_GPL vmlinux 0xca1214aa blk_add_driver_data +EXPORT_SYMBOL_GPL vmlinux 0xca17b607 crypto_hash_walk_first +EXPORT_SYMBOL_GPL vmlinux 0xca2b0bd3 vfs_lock_file +EXPORT_SYMBOL_GPL vmlinux 0xca32a2aa ide_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xca39b3ef rtc_irq_unregister +EXPORT_SYMBOL_GPL vmlinux 0xca3d39bf devres_alloc +EXPORT_SYMBOL_GPL vmlinux 0xca6c4d19 ide_host_register +EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf tracepoint_probe_update_all +EXPORT_SYMBOL_GPL vmlinux 0xcabdf5c6 shmem_file_setup +EXPORT_SYMBOL_GPL vmlinux 0xcaf11b43 tcp_init_congestion_ops +EXPORT_SYMBOL_GPL vmlinux 0xcb720fc6 bdi_writeout_inc +EXPORT_SYMBOL_GPL vmlinux 0xcbdae3a0 __create_workqueue_key +EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d inet_twdr_hangman +EXPORT_SYMBOL_GPL vmlinux 0xcc20a60a spi_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xcc7a2564 usb_anchor_empty +EXPORT_SYMBOL_GPL vmlinux 0xccb17aab ata_bus_reset +EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa sata_deb_timing_hotplug +EXPORT_SYMBOL_GPL vmlinux 0xcd6a927a disk_part_iter_next +EXPORT_SYMBOL_GPL vmlinux 0xcda242c0 ide_pci_init_two +EXPORT_SYMBOL_GPL vmlinux 0xcdb01877 ktime_add_ns +EXPORT_SYMBOL_GPL vmlinux 0xcdca3691 nr_irqs +EXPORT_SYMBOL_GPL vmlinux 0xcde859d6 devres_get +EXPORT_SYMBOL_GPL vmlinux 0xcdfb93b4 ide_retry_pc +EXPORT_SYMBOL_GPL vmlinux 0xce3acc42 pmf_call_function +EXPORT_SYMBOL_GPL vmlinux 0xce515eee xfrm_audit_state_icvfail +EXPORT_SYMBOL_GPL vmlinux 0xce648beb regulator_get_current_limit +EXPORT_SYMBOL_GPL vmlinux 0xcf06cf80 init_srcu_struct +EXPORT_SYMBOL_GPL vmlinux 0xcf4deeb1 ring_buffer_entries_cpu +EXPORT_SYMBOL_GPL vmlinux 0xcf58910d ide_dma_end +EXPORT_SYMBOL_GPL vmlinux 0xcf8129ac rtc_irq_register +EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad register_vt_notifier +EXPORT_SYMBOL_GPL vmlinux 0xd007a068 fb_bl_default_curve +EXPORT_SYMBOL_GPL vmlinux 0xd027a07d marker_probe_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd03c7700 secure_ipv4_port_ephemeral +EXPORT_SYMBOL_GPL vmlinux 0xd05a8d15 ata_std_postreset +EXPORT_SYMBOL_GPL vmlinux 0xd070b1bc udp4_lib_lookup +EXPORT_SYMBOL_GPL vmlinux 0xd0c05159 emergency_restart +EXPORT_SYMBOL_GPL vmlinux 0xd0d363fa ata_sas_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xd0f2fb2c klist_next +EXPORT_SYMBOL_GPL vmlinux 0xd0f76f96 debugfs_create_x16 +EXPORT_SYMBOL_GPL vmlinux 0xd0f878df ide_dma_setup +EXPORT_SYMBOL_GPL vmlinux 0xd1287f3e hrtimer_start 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usb_string +EXPORT_SYMBOL_GPL vmlinux 0xd4ae0ff8 crypto_shash_finup +EXPORT_SYMBOL_GPL vmlinux 0xd4e93708 usb_hcd_pci_pm_ops +EXPORT_SYMBOL_GPL vmlinux 0xd500b442 ring_buffer_reset +EXPORT_SYMBOL_GPL vmlinux 0xd5173e3a get_user_pages_fast +EXPORT_SYMBOL_GPL vmlinux 0xd55f568f ide_pci_check_simplex +EXPORT_SYMBOL_GPL vmlinux 0xd5c69feb usb_autopm_set_interface +EXPORT_SYMBOL_GPL vmlinux 0xd5c949d3 sata_sff_hardreset +EXPORT_SYMBOL_GPL vmlinux 0xd60f088a blk_rq_unprep_clone +EXPORT_SYMBOL_GPL vmlinux 0xd6599cc8 aead_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xd66729b2 da903x_unregister_notifier +EXPORT_SYMBOL_GPL vmlinux 0xd66cc885 usb_hcd_platform_shutdown +EXPORT_SYMBOL_GPL vmlinux 0xd68bbb2f ide_device_put +EXPORT_SYMBOL_GPL vmlinux 0xd6d56ff7 debugfs_create_bool +EXPORT_SYMBOL_GPL vmlinux 0xd6d787c5 check_media_bay_by_base +EXPORT_SYMBOL_GPL vmlinux 0xd70d6921 debugfs_rename +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd76d17b5 raw_unhash_sk +EXPORT_SYMBOL_GPL vmlinux 0xd78f4621 eventfd_fget +EXPORT_SYMBOL_GPL vmlinux 0xd7d79132 put_online_cpus +EXPORT_SYMBOL_GPL vmlinux 0xd8245f1e ide_pci_resume +EXPORT_SYMBOL_GPL vmlinux 0xd8324771 ata_port_abort +EXPORT_SYMBOL_GPL vmlinux 0xd8390204 led_trigger_register +EXPORT_SYMBOL_GPL vmlinux 0xd86e15ba eventfd_signal +EXPORT_SYMBOL_GPL vmlinux 0xd881229a devres_add +EXPORT_SYMBOL_GPL vmlinux 0xd8df0039 platform_get_irq +EXPORT_SYMBOL_GPL vmlinux 0xd8fdbc65 scsi_schedule_eh +EXPORT_SYMBOL_GPL vmlinux 0xd92b43f6 sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xd9651ec2 pskb_put +EXPORT_SYMBOL_GPL vmlinux 0xd9af3146 inotify_rm_wd +EXPORT_SYMBOL_GPL vmlinux 0xd9c26aef fuse_conn_put +EXPORT_SYMBOL_GPL vmlinux 0xd9ea8200 tty_buffer_request_room +EXPORT_SYMBOL_GPL vmlinux 0xda04c7da pci_find_ext_capability +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda1d2a07 platform_driver_register +EXPORT_SYMBOL_GPL vmlinux 0xda710c02 regulator_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xdaba72cf cpufreq_cpu_get +EXPORT_SYMBOL_GPL vmlinux 0xdae743aa sock_prot_inuse_add +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdb4ad659 seq_open_net +EXPORT_SYMBOL_GPL vmlinux 0xdb688938 inet_csk_listen_stop +EXPORT_SYMBOL_GPL vmlinux 0xdbddd085 usb_hcd_check_unlink_urb +EXPORT_SYMBOL_GPL vmlinux 0xdc0622fa fuse_conn_get +EXPORT_SYMBOL_GPL vmlinux 0xdc07f8fe atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xdc0ab763 ide_dma_test_irq +EXPORT_SYMBOL_GPL vmlinux 0xdc24a16a ata_pci_device_do_resume +EXPORT_SYMBOL_GPL vmlinux 0xdc473a65 ide_output_data +EXPORT_SYMBOL_GPL vmlinux 0xdc6d223a spi_alloc_device +EXPORT_SYMBOL_GPL vmlinux 0xdcea8e9c usb_deregister_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xdd27ad09 skcipher_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0xddf15d96 da903x_register_notifier +EXPORT_SYMBOL_GPL vmlinux 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+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe1053ba9 scsi_target_unblock +EXPORT_SYMBOL_GPL vmlinux 0xe151c2ae unregister_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xe16591ab stop_machine +EXPORT_SYMBOL_GPL vmlinux 0xe2088281 page_cache_sync_readahead +EXPORT_SYMBOL_GPL vmlinux 0xe20ee226 user_instantiate +EXPORT_SYMBOL_GPL vmlinux 0xe3390c25 platform_get_resource +EXPORT_SYMBOL_GPL vmlinux 0xe3923cb4 spi_sync +EXPORT_SYMBOL_GPL vmlinux 0xe3e4feae ata_std_qc_defer +EXPORT_SYMBOL_GPL vmlinux 0xe41ef1ab zap_vma_ptes +EXPORT_SYMBOL_GPL vmlinux 0xe44119ce blk_queue_rq_timed_out +EXPORT_SYMBOL_GPL vmlinux 0xe442be0a ata_eh_qc_complete +EXPORT_SYMBOL_GPL vmlinux 0xe45070c6 crypto_ahash_import +EXPORT_SYMBOL_GPL vmlinux 0xe481d8d9 sysdev_class_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xe494f28a ata_sff_data_xfer_noirq +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4c1e24b inotify_remove_watch_locked +EXPORT_SYMBOL_GPL vmlinux 0xe4d43bee driver_create_file +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe557e097 debugfs_remove_recursive +EXPORT_SYMBOL_GPL vmlinux 0xe595a096 ata_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xe6012d27 bus_for_each_dev +EXPORT_SYMBOL_GPL vmlinux 0xe60dd22d inverse_translate +EXPORT_SYMBOL_GPL vmlinux 0xe61461cd kick_process +EXPORT_SYMBOL_GPL vmlinux 0xe6147efd ide_check_ireason +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe66bc9d8 crypto_shoot_alg +EXPORT_SYMBOL_GPL vmlinux 0xe715acef inet_hashinfo_init +EXPORT_SYMBOL_GPL vmlinux 0xe729c467 usb_bus_list_lock +EXPORT_SYMBOL_GPL vmlinux 0xe7358909 rtc_irq_set_freq +EXPORT_SYMBOL_GPL vmlinux 0xe79bf12e ata_pci_device_do_suspend +EXPORT_SYMBOL_GPL vmlinux 0xe7b08068 usb_unpoison_anchored_urbs +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe8e47332 crypto_alloc_tfm +EXPORT_SYMBOL_GPL vmlinux 0xe8fb84fd sata_scr_read +EXPORT_SYMBOL_GPL vmlinux 0xe90113ca __class_create +EXPORT_SYMBOL_GPL vmlinux 0xe93685d2 device_register +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xe9e1f6f9 init_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0xe9f03642 usb_deregister_dev +EXPORT_SYMBOL_GPL vmlinux 0xe9f18e05 xfrm_audit_state_replay_overflow +EXPORT_SYMBOL_GPL vmlinux 0xea05f467 ata_dummy_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea15a821 ring_buffer_normalize_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xea197a40 screen_glyph +EXPORT_SYMBOL_GPL vmlinux 0xea3bc4c9 __rt_mutex_init +EXPORT_SYMBOL_GPL vmlinux 0xea418e0f atapi_cmd_type +EXPORT_SYMBOL_GPL vmlinux 0xea60b57d debugfs_create_size_t +EXPORT_SYMBOL_GPL vmlinux 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL vmlinux 0xeb668940 rdev_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xeb803d25 hrtimer_init +EXPORT_SYMBOL_GPL vmlinux 0xeb98f054 pmf_register_irq_client +EXPORT_SYMBOL_GPL vmlinux 0xebdb8052 ring_buffer_record_disable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xecea75d0 enable_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xecfa89ae tracepoint_iter_reset +EXPORT_SYMBOL_GPL vmlinux 0xed1527d0 ide_write_devctl +EXPORT_SYMBOL_GPL vmlinux 0xed242ba9 register_pernet_gen_device +EXPORT_SYMBOL_GPL vmlinux 0xed4e4b34 get_cpu_sysdev +EXPORT_SYMBOL_GPL vmlinux 0xed5aa3df ata_do_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xed7a6b7a xfrm_audit_state_notfound_simple +EXPORT_SYMBOL_GPL vmlinux 0xedb7a051 inotify_rm_watch +EXPORT_SYMBOL_GPL vmlinux 0xedc2994d ktime_get_real +EXPORT_SYMBOL_GPL vmlinux 0xede74815 atomic_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0xee59fae3 regulator_disable +EXPORT_SYMBOL_GPL vmlinux 0xeea71435 pci_disable_rom +EXPORT_SYMBOL_GPL vmlinux 0xeec31013 spi_new_device +EXPORT_SYMBOL_GPL vmlinux 0xeecac530 klist_add_tail +EXPORT_SYMBOL_GPL vmlinux 0xef232d41 usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL vmlinux 0xef5ce665 __blk_put_request +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xefc97a10 crypto_enqueue_request +EXPORT_SYMBOL_GPL vmlinux 0xefd48c05 regulator_get +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefe21106 snmp_mib_init +EXPORT_SYMBOL_GPL vmlinux 0xf01a079d usb_autopm_put_interface_async +EXPORT_SYMBOL_GPL vmlinux 0xf105d00d ide_in_drive_list +EXPORT_SYMBOL_GPL vmlinux 0xf10b8941 ata_sas_slave_configure +EXPORT_SYMBOL_GPL vmlinux 0xf112e461 rt_mutex_timed_lock +EXPORT_SYMBOL_GPL vmlinux 0xf1463412 execute_in_process_context +EXPORT_SYMBOL_GPL vmlinux 0xf1767eeb usb_sg_init +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf1ecfe36 bus_get_device_klist +EXPORT_SYMBOL_GPL vmlinux 0xf1fe2734 inet_csk_clone +EXPORT_SYMBOL_GPL vmlinux 0xf20d5459 tty_ldisc_ref_wait +EXPORT_SYMBOL_GPL vmlinux 0xf229e019 crypto_tfm_in_queue +EXPORT_SYMBOL_GPL vmlinux 0xf22fcc4c synchronize_srcu +EXPORT_SYMBOL_GPL vmlinux 0xf23aabab ata_eh_qc_retry +EXPORT_SYMBOL_GPL vmlinux 0xf26ddaf3 cpu_add_sysdev_attr_group +EXPORT_SYMBOL_GPL vmlinux 0xf2bd59b8 tcp_reno_ssthresh +EXPORT_SYMBOL_GPL vmlinux 0xf2c7659c pci_find_next_capability +EXPORT_SYMBOL_GPL vmlinux 0xf2c99060 disk_get_part +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf3a2c3ac ide_intr +EXPORT_SYMBOL_GPL vmlinux 0xf3f585e4 da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0xf415390b ata_cable_40wire +EXPORT_SYMBOL_GPL vmlinux 0xf4488540 __wake_up_sync +EXPORT_SYMBOL_GPL vmlinux 0xf45686fd ide_pci_suspend +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4fcea33 ring_buffer_resize +EXPORT_SYMBOL_GPL vmlinux 0xf5142373 pmac_backlight +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5f8e261 regulator_bulk_free +EXPORT_SYMBOL_GPL vmlinux 0xf6415339 __mmdrop +EXPORT_SYMBOL_GPL vmlinux 0xf6447f34 tcp_set_state +EXPORT_SYMBOL_GPL vmlinux 0xf6586b9e rtc_update_irq +EXPORT_SYMBOL_GPL vmlinux 0xf6baf792 scatterwalk_map +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6c9d9b8 clockevents_register_device +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf721f57d sysdev_driver_register +EXPORT_SYMBOL_GPL vmlinux 0xf75ee60c alloc_page_buffers +EXPORT_SYMBOL_GPL vmlinux 0xf7a2ef20 ring_buffer_nmi_dropped_cpu +EXPORT_SYMBOL_GPL vmlinux 0xf7e9ceca usb_scuttle_anchored_urbs +EXPORT_SYMBOL_GPL vmlinux 0xf820cc8e __blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xf82d00e2 sysdev_driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf8641989 proc_net_remove +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8b3a14a ata_sff_busy_sleep +EXPORT_SYMBOL_GPL vmlinux 0xf8d1768a dev_attr_sw_activity +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf9069692 pci_test_config_bits +EXPORT_SYMBOL_GPL vmlinux 0xf95bb431 blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ae5101 skcipher_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xfa0d0410 ata_host_resume +EXPORT_SYMBOL_GPL vmlinux 0xfa6c6cfa ide_cd_get_xferlen +EXPORT_SYMBOL_GPL vmlinux 0xfa75c0e5 aead_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xfaa1d767 blkcipher_walk_virt_block +EXPORT_SYMBOL_GPL vmlinux 0xfac5d7b2 securityfs_create_dir +EXPORT_SYMBOL_GPL vmlinux 0xface2f50 rtc_device_register +EXPORT_SYMBOL_GPL vmlinux 0xfae91857 ata_cable_sata +EXPORT_SYMBOL_GPL vmlinux 0xfae96de1 klist_iter_init_node +EXPORT_SYMBOL_GPL vmlinux 0xfb0e7776 fuse_direct_io +EXPORT_SYMBOL_GPL vmlinux 0xfb4177dd net_assign_generic +EXPORT_SYMBOL_GPL vmlinux 0xfb533f50 ata_sff_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xfb9b7321 usb_autopm_put_interface +EXPORT_SYMBOL_GPL vmlinux 0xfbbca4d4 usb_get_dev +EXPORT_SYMBOL_GPL vmlinux 0xfbc1bd8c inet6_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0xfbecfc59 regulator_put +EXPORT_SYMBOL_GPL vmlinux 0xfbed19a3 pmac_i2c_attach_adapter +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc0384c2 regulator_count_voltages +EXPORT_SYMBOL_GPL vmlinux 0xfc4e3305 usb_submit_urb +EXPORT_SYMBOL_GPL vmlinux 0xfca0988e srcu_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcc52955 isa_bridge_pcidev +EXPORT_SYMBOL_GPL vmlinux 0xfcd00dc6 fsstack_copy_attr_all +EXPORT_SYMBOL_GPL vmlinux 0xfd1baa22 blk_queue_lld_busy +EXPORT_SYMBOL_GPL vmlinux 0xfd38234c scatterwalk_copychunks +EXPORT_SYMBOL_GPL vmlinux 0xfd433159 rt_mutex_trylock +EXPORT_SYMBOL_GPL vmlinux 0xfd5b1906 simple_attr_release +EXPORT_SYMBOL_GPL vmlinux 0xfd5d39b0 fuse_get_req +EXPORT_SYMBOL_GPL vmlinux 0xfd6d34d2 rtc_set_mmss +EXPORT_SYMBOL_GPL vmlinux 0xfd91ff25 dev_attr_unload_heads +EXPORT_SYMBOL_GPL vmlinux 0xfdbf9e11 ata_sff_port_start +EXPORT_SYMBOL_GPL vmlinux 0xfdc26304 driver_add_kobj +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfe7bb98f usb_reset_configuration +EXPORT_SYMBOL_GPL vmlinux 0xfe81dd33 register_posix_clock +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xff5f1d6a ide_error +EXPORT_SYMBOL_GPL vmlinux 0xff833ab9 pmf_unregister_irq_client +EXPORT_SYMBOL_GPL vmlinux 0xffb8331a crypto_spawn_tfm +EXPORT_SYMBOL_GPL vmlinux 0xffc51e7b kobject_get_path +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/sparc/sparc64 +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/sparc/sparc64 @@ -0,0 +1,8159 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/atm/suni 0x56ee6524 suni_init +EXPORT_SYMBOL drivers/block/paride/paride 0x143ebf6c pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x29e94fc7 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x490d988d pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x49567226 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x4f4926cd paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x59278f2f pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x6875f0c6 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x6efcac03 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xbc4d13e7 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xdb030814 paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0xdd116454 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xe44b9dc4 pi_do_claimed +EXPORT_SYMBOL drivers/cdrom/cdrom 0x11933b2d cdrom_get_last_written +EXPORT_SYMBOL drivers/cdrom/cdrom 0x344adbd5 init_cdrom_command +EXPORT_SYMBOL drivers/cdrom/cdrom 0x43efb61b cdrom_media_changed +EXPORT_SYMBOL drivers/cdrom/cdrom 0x748affa3 cdrom_mode_select +EXPORT_SYMBOL drivers/cdrom/cdrom 0x7702a7eb cdrom_ioctl +EXPORT_SYMBOL drivers/cdrom/cdrom 0xb9af7df8 unregister_cdrom +EXPORT_SYMBOL drivers/cdrom/cdrom 0xbe0dc3ac cdrom_release +EXPORT_SYMBOL drivers/cdrom/cdrom 0xd021c49c cdrom_mode_sense +EXPORT_SYMBOL drivers/cdrom/cdrom 0xd5bd8512 cdrom_open +EXPORT_SYMBOL drivers/cdrom/cdrom 0xddb309a9 cdrom_get_media_event +EXPORT_SYMBOL drivers/cdrom/cdrom 0xe5a84a5b cdrom_number_of_slots +EXPORT_SYMBOL drivers/cdrom/cdrom 0xfd6950d9 register_cdrom +EXPORT_SYMBOL drivers/char/generic_serial 0x03c85cd8 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x08bc3c30 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x2da6af28 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x2ee08984 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x3765f6c1 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x3ba94fa2 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x56b8ae58 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x65acfa2c gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x672e42d9 gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x8c3e65fc gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x99f08eba gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xbd3e8e09 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0xc9b65b88 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0xca08ee08 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xe19eca0c gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xfbeb19b6 gs_setserial +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x03e65c0f ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x08d9b8e0 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0c62a665 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x10cfb2a9 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x14a6bcee ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x201242b3 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x21472db6 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2df4ee5d ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3e36fc92 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4f13baa6 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x76fa381c ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x77455558 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8341e762 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x91209091 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9451039d ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9815194e ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9b142694 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9fa04c60 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb9e29b1c ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc0aea3b6 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd0384b98 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd6966338 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdd1bed52 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x42632cdd i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xcb1227b7 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x02cf5638 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06d1d121 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07ea5fe6 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x08588a13 hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0ea8edf9 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x14e88ea2 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1dace1fa hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x22ba4c90 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x24c2d022 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2753cd6b hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x35a1ea75 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x382c359d hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x39547112 hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ebcb979 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40d2bb27 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40d78aab hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x42272ef8 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4968966b hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4ae4a2ff hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4af2e23f hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4c8e0296 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4ce696ef hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d4ebef3 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f1db460 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x50e3b75d hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51f3d30e hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x538aeff3 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x58ca19c9 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5c001ffa hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e4294c8 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x656481df __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6a5c9ec7 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6d5372d8 hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6eb3e25d hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x743eaca4 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74847ee6 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74ee4471 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78772496 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x82497c1b hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8a4a811a hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x93f1f89a hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98c80dad hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9a31c473 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9d52ca2b hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9e3b43ee hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9fb7daf1 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaf944132 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3c38acf hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb6cbe6df hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb80beb42 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbefbeb05 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc05a6146 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc1447197 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcdc87ce9 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9119f06 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdcf845d2 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe52e6e67 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe93086b8 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xec23f9fe hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef92435f hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf3378de1 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf3870936 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfa129153 hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x15b08e17 ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x249d3a7f ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xb4a78e36 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x08a37740 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x47c69b14 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x4e136d3c rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9c53a0c8 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb0900f14 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xfd100e99 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1a5e7495 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1ee451ca ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2288fba0 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x27918add ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x28938ed6 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2c72bb88 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x365d507b ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x45eadaf2 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5973e004 ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8712dd99 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x90b57d94 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa0a4d0cb ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbe8fa398 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc28e278a ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xcdeac7e8 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xcf25368a ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf9a20115 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x016bf049 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x03bfe8aa ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x04121a19 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x04e227b2 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0936cf5a ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x11f192fd ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14d9bee4 ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x16c7f581 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x19b250ab ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b0f8f5a ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1ee9785f ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2107c124 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x21484926 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26b26a51 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x273208f7 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x275e3fd4 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d3cab33 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d83dc4a ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x378a1c27 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x37fa06bf ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x383e6c72 ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x39a9a2dc ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47a1490e ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x51ae14d5 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55fb7d4a ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5853b632 ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5933d17e ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c3228b7 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x633ef66a ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x76716cf7 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x778b7271 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77ac8442 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x78537f65 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7af88df3 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7b413d91 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x844b9a03 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8ad30c9c ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8cd96f9e ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9054b0c0 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x99c28fdf ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9fe72b34 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa8c37c4a ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb5fa44aa ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb6dc9321 ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb75396b2 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb8f6d033 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba0ec990 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbee22082 ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbf5b4c71 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbfda86d8 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc0297eed ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc299214e ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc8931f65 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc958a3c9 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcb654cb4 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcbe655b6 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd0389e10 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd6757045 ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd8a8a7af ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9430e68 ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdaf80d63 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdf7fedf1 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe2749588 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xece9a006 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeced5c94 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf001ed29 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0e884cd0 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3beb58ce ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3d9e74fe ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x52397f04 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x61dc55a5 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x62b02c0c ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa176db6b ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa7931ccf ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc1947360 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdd3caaee ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdeceeb96 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf565f281 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1ff1c120 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x41b7a948 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d72dabc ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x65bfeb5f ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x73a64cb5 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x793afd44 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa808b814 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe41b60f1 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xeda47007 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x107f22fc iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x57ac249a iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x730b009f iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7d6c5073 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9e7255e3 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbeab6206 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xe075e017 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf91f8a32 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x152b5879 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1a024bc8 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2fedd3bc rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x38ee7a3b rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3ee7c679 rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3fab992b rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4a9bbe17 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4b0d4459 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x58cd352e rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8d6b95dd rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8f628483 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x97773458 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9f306d38 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xac8cd756 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc14afc54 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xead23445 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf7fa0781 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfcdd50bb rdma_reject +EXPORT_SYMBOL drivers/input/input-polldev 0x5311e30d input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x8a752e2f input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x8abf882d input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x947e83c3 input_free_polled_device +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0dd2514d capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x109cc80f capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47b5e5e8 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x85c25ab7 capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7f03cd7 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xbbf58a08 detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xce18741a capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd351a1a9 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdbde76a5 capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdf3ea767 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xff272ab0 capi20_release +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xc8de88c0 register_isdn +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x14883617 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2ca8eb5a mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x499d0dd7 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5a6bd75b recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5be72532 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6730a8a1 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x71754de1 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x71a10a50 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x76344fcd mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x773088f7 get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x88b23327 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9c68a7ea mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9ec31abf queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9fddb0ad mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xab74bf13 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb9fb0443 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbe071405 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc69cdc83 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd078a947 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xebd3a58b mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xed26470f mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf3a0edb5 recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/md/dm-log 0x0b3e0625 dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-log 0x32ca40c2 dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-log 0x52de39fc dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-log 0xa63741cc dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x0083a4d5 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x0280970f dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0x1f650431 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0x272d65b7 dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x3070f7df dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x34cc6c34 dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0x41b4965f dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0x41cf4844 dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0x4e58746c dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0x6048dd87 dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0x66034fe0 dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x859d377c dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-mod 0x8d7be98a dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0x9b4e26a9 dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0x9e70abda dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0xb38b756c dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0xbc2b0163 dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xdd5a2daf dm_register_target +EXPORT_SYMBOL drivers/md/dm-mod 0xdd777904 dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-snapshot 0x2fdf73aa dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0x31014ded dm_exception_store_create +EXPORT_SYMBOL drivers/md/dm-snapshot 0x7c4ab5be dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/dm-snapshot 0xdb5c1965 dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/md-mod 0x0ff600ba register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x1327c3f8 md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0x189b04d9 md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0x2d50708f md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0x33bfbb34 md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0x36fb775d bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x3ccdcb1d md_error +EXPORT_SYMBOL drivers/md/md-mod 0x3fe68208 md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0x4f999f05 md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0x52e50186 bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0x54106c91 bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0x5e74cbdb md_write_start +EXPORT_SYMBOL drivers/md/md-mod 0x5fbc7ad1 md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0x6514c952 md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x6d662bff bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0x781b3b30 unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x78d80518 bitmap_endwrite +EXPORT_SYMBOL drivers/md/md-mod 0x84c34d6f md_wakeup_thread +EXPORT_SYMBOL drivers/md/md-mod 0x84e9fc9b bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0x85ad0b4f md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xba0762a0 md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xd55587dd bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0x7b85d712 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x306b9e6e mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x58aec9a4 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x4e4a36ba xc5000_attach +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x0d2e04dc cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x4ac49e9b cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2315cd18 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x694f5ce1 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9829115c gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb581abc0 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xbdacb4b7 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x25e953cc saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27fd8a0a saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x282f9b1d saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6eb088bf saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x76320cf3 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7a9062b8 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9c81d992 saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa75f6074 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xac922a3b saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xeb6f3431 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xee31f191 saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfbb5694a saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x0dcc5d77 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x45f1b829 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xa576a85a soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xb6ea79e8 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0xbc24eeb6 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xd93cdc0f soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdb764d38 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe7e5ab8f soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xfb79fd5f soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x08317216 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0xf885cdf3 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xa63fc771 v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x5e470ee0 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xed94af08 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/videodev 0x01c1bd2f video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x0970344d video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x22f1617b video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x3ce1f2b4 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x81fe24a4 video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0xb129d9fb video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xe44f644c video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe63e4a4b video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xff03f6f5 video_unregister_device +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2189b74a mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2e15154a mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x34a71aa7 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3b033d25 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x497cf257 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5d063b50 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5da28640 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5e44cffb mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6776f0eb mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x75a61d59 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x86b56bf6 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x871ea6e1 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8727fd4d mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9097a325 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9fefd030 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa8ec88f2 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaab9799d mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xac1ef61b mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb57c998f mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc234a338 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc635c6e5 mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc7c1fe5f mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcbdff783 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd3edc261 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd4fddd8 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf703ea24 mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x02e701b3 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0d244348 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x10ec4301 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x279ae22d mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x386189da mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x566105fd mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6314bf60 mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x65ccb2ac mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x69544c83 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6bf826f9 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x77688462 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x79805ecb mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x81880051 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8208d6df mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8ed89650 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x97bf54f8 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x992fad1c mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb27fd4cd mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xcab50432 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xcd08194e mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf3212293 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf4588590 mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf698989f mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfc0bbcb5 mptscsih_info +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1c8a289e i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x21a7d60e i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2f04e823 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3c6d11f6 i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x419e2d42 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7d234867 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x801b0642 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x82d09778 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8635e46e i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8778e6fd i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9806e40f i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaa06684f i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb208f91e i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb432246c i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd807193e i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdc8d1e77 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xded39f42 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe08f3711 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe14c6ba5 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xeacca881 i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf04f3a27 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf8ed20d0 i2o_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x05bd7da7 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2875c952 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2d91cde1 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5b7acc5b ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5cf662c9 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x63f9820a ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6758f1af ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x791dcb9d ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x051590b4 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x852b5c13 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x67db3050 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xdfe359ae mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x9ba41c16 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0xe6f5511a c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x261be089 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0x8b6883f0 ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x38d4f9ed tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x3e2db572 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x4cc7c044 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x53f24362 tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0x59ffc057 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x5a35df5e tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x6d39a93c tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x6eee895e tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x6ffbd7ad tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x77add9ef tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x8d400342 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0xd4bfeecc tifm_unregister_driver +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xa0d517c8 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0d350d79 mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x13e191ff mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x157b20ce mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x386632f9 mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3a9730f4 mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x707c35fb mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7d2d6311 mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x840ee897 mmc_alloc_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8b60a82d mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8f084506 mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa441757c __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xac52e389 mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc8317f5a mmc_add_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd7f887eb mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xde9004ac mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x800f7550 mmc_spi_put_pdata +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0xd15192e3 mmc_spi_get_pdata +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x035e8b4c cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x5f1d3db9 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xae716981 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x37a451c6 unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xdcc765cc register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xde871987 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xf806a489 do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x0ae9b4d4 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xe4f7fbbf lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xaf7af2e7 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0xc7937015 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf13e0f65 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x99de924b mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xdf0301aa mtd_concat_create +EXPORT_SYMBOL drivers/mtd/nand/nand 0x5a18c1c5 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xc93c43f8 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf4c33f95 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf9364fa0 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x36e9a2d5 flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa04774a9 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xaf8657b3 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd0c69398 onenand_scan_bbt +EXPORT_SYMBOL drivers/net/8390 0x54ed6f6e ei_close +EXPORT_SYMBOL drivers/net/8390 0x6471db6c ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0x68c31e37 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x763c5ba2 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x89e6a74c ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x8dca1314 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xbeb0f8ab ei_poll +EXPORT_SYMBOL drivers/net/8390 0xcc9d8d3e ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0xcfab4007 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xdd8a45cb ei_open +EXPORT_SYMBOL drivers/net/bnx2 0x495b99c9 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0x6bdafb85 cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0fadaeae cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x10223437 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x135e798b t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x21f35d9d cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2e017443 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x32967913 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x47a3fab5 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4c40b07a cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6a28b9d0 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xae44bf23 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd6ec7d20 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xddc34d20 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xea8b91f9 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf27a88db t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf99aeb27 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfb7a386f cxgb3_free_atid +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x133d5bea mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x32c21255 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0x722d4acd mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xaecbfd5a mii_check_media +EXPORT_SYMBOL drivers/net/mii 0xb882f4a8 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0xba3c7b30 mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xd24dc191 mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0xf9ec227d mii_check_gmii_support +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x66809872 alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xff903f6d free_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x62533a15 ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x7e5ee2c1 ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0x80a2c9a9 ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0x87ff1120 ppp_output_wakeup +EXPORT_SYMBOL drivers/net/ppp_generic 0x8b58e743 ppp_input +EXPORT_SYMBOL drivers/net/ppp_generic 0x972afb1f ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x995f62ff ppp_unregister_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xc5272777 ppp_input_error +EXPORT_SYMBOL drivers/net/ppp_generic 0xd16e8e1a ppp_register_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0xde87ddeb ppp_register_channel +EXPORT_SYMBOL drivers/net/pppox 0x1af94842 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x3770d654 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xb03b09d1 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x2278e94b slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0x26b760c4 slhc_init +EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0x62538167 slhc_toss +EXPORT_SYMBOL drivers/net/slhc 0x7e87227e slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7 slhc_uncompress +EXPORT_SYMBOL drivers/net/wireless/airo 0x36731fec stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x8e736aee init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xedcc18d0 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x9ebcdc40 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xf419674b ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/atmel 0x4a92a382 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x8e5d5649 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xc8ce83d7 atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x19973635 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2ab84e55 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x31fb9cd4 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3f1f6333 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5173f54a hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5dd2116f hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x764fd11d hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7e03dde3 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x84ccb64e hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x860957d4 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x886b1839 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x90cabe09 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9ed3ab30 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaac7320d hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb3c26ec5 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb52f8115 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc2973135 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd5a68777 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdbd5bb19 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe3835d91 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe3c27bcb hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xef83662d hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xeffb3e74 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf678b29e hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf77db1e3 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1dc2fb6f ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1eaef4e2 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x25838b40 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x500c58cb ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x52979092 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5f6d28c6 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x60eaa3e1 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7d45b690 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9e240609 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9e82023e ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa7a1c072 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaac67641 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xac9c6c9e ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaee7ab03 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc245ab8a ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc2955657 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc3b4cfb7 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc6a10a77 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc7ff3586 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf048eb51 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf5c1ca9f ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0691f0ca iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07cd8a40 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x081dc1e9 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09ab99a4 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0b0b2a2d iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bd0be5a iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e2d95e5 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e90d924 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0eabda3c iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10cc38b8 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1105c1a4 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x122bd5e9 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1401b747 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x179023e0 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18bc9b1f iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d08d41d iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d10dfcf iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e6645f4 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f3f088e iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20ec8521 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20ef52b0 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x221f44f8 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x229dad8a iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26357fbc iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x284eea3f iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x29f04782 iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cdff952 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cef8ac2 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cfd530b iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d1f5107 iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2dedcdf5 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2e9131e6 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ee911fe iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x31da6f7f iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x352c16d0 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37256462 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38731c92 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38d0d854 iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d717e1c iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f67dce3 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43e3df28 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x465d09e4 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x468c5467 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4742446d iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f31aabd iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50763138 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x52925926 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x52a789d1 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x531a7a0b iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5697732f iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57b28740 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ecc2fee iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x601b9db4 iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x645be2a9 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67881162 iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x680283ff iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x68c93f28 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6b435d28 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d7d7156 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e2626c3 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e53eb1a iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6f270e81 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x732a0307 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a8241e9 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7af7de19 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b020b8b iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b784b4c iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c5bfabe iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7edfc4c5 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7fa4b9b0 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x837c3e39 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ae59a47 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c4d292c iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f7bd5f9 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x905867d8 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91f93e4e iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9261ea58 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94ac0e07 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x966bac1a iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9796851a iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x983f5bd7 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x99472849 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a6e35b8 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ab267be iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9fe2ecd1 iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa19540e0 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1ca93e6 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1f621bf iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2869e3e iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6a5dc47 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab626ed3 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae1e7135 iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf408630 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1774f27 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb622f50d iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9c44ae8 iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xba4faa1f iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb360402 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbec4a660 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc02f09df iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc03eaa75 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc04d5650 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3c20879 iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4a7c06d iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb955678 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1824198 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4655267 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd66a94c6 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8204696 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda665422 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdabee220 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdb28cfff iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdb3a10e1 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbf944e7 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xde77299f iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf1ce222 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe02a8c47 iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe03737ba iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe083752e iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1c57f00 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2265611 iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4e6dfaf iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebde9f27 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefecfa93 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeff1ef6a iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0356397 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1af66f0 iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf22d350b iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf58579b7 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf58e5022 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5b5c8ca iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf66e1779 iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf69ab62f iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6a54fbd iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6c41025 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8030ea9 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfae9fdbb iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2669e14c __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x780601ec orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc21408a8 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc35542f5 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc39df8d1 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x0596205c parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x06f9443e parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x0c195b88 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x125b52be parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x13c46a25 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x164068ec parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0x1baf3a80 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x26331505 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x45feabc8 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x5542dc18 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x57bd9ff9 parport_write +EXPORT_SYMBOL drivers/parport/parport 0x72bd468b parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x78087892 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x7b323d5f parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x7d3487ee parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x8f97745b parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x976ded0e parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x9c93a2c1 parport_release +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa0d3ace8 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0xa272d192 parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0xa7e66d7e parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xa9e88e58 parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0xad110190 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0xc12b104a parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0xc2c87254 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0xc9cfde9c parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xd34cde0c parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0xd63d3443 parport_read +EXPORT_SYMBOL drivers/parport/parport 0xd6bf92ee parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0xed7b66ed parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport_pc 0x2ddea0b9 parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0xfef59c9a parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0fe20a9b pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x284fcce8 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x31f8ca0c pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x54d4cbd8 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x556303b3 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x56ea108a pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x60e5d4f1 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8575fefc pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x874c3021 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8ae868e1 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa0c0fb39 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xac268532 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xae1350ee pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbe5133f7 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe3a1cbaf pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0a5eb430 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0eb5fe14 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x186520dc pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1d4802f5 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33f691ac pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x347dbc9a pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x359e51c9 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4ed17d4d pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x506b48ec pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6a31c7d8 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6a43c148 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6cc3a097 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6d2009ca pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6d3b4cd7 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x753edb88 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7c37a6f3 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x83692e48 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8583a202 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x859a3230 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9c855dc9 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaa3f7c28 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaa6c1ff6 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaa9f228f pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaeedc850 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb5089480 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbc9c71dd pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbe989c82 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc051d9af pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc4b75532 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xea16f2c9 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfcd0e78a pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfde56f61 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfedd7a03 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xca3aaa4a pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xa77bf9c2 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/sbus/char/bbc 0x2e349e6d bbc_i2c_getdev +EXPORT_SYMBOL drivers/sbus/char/bbc 0x3e2524d2 bbc_i2c_writeb +EXPORT_SYMBOL drivers/sbus/char/bbc 0x54c3553b bbc_i2c_detach +EXPORT_SYMBOL drivers/sbus/char/bbc 0x9f9b6754 bbc_i2c_attach +EXPORT_SYMBOL drivers/sbus/char/bbc 0xa9416326 bbc_i2c_write_buf +EXPORT_SYMBOL drivers/sbus/char/bbc 0xf2abd7e6 bbc_i2c_read_buf +EXPORT_SYMBOL drivers/sbus/char/bbc 0xf3adf68d bbc_i2c_readb +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x45159a9c scsi_esp_cmd +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x658a76c9 scsi_esp_intr +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x8480d969 scsi_esp_unregister +EXPORT_SYMBOL drivers/scsi/esp_scsi 0xcf0d729a scsi_esp_register +EXPORT_SYMBOL drivers/scsi/esp_scsi 0xf7741cc2 scsi_esp_template +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x04928ffd fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2883481f fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2f552a7b fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x495d6c4e fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x7f67a83a fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x83529afc fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xaf403276 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05f1780b fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x10341289 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1108080a fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x130bc24f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1bef74d7 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1fb47fb2 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2c48e6ec fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3f55692d fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x44d1ed0b fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4a3458f1 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5346df8a fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5cb389aa fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6c1bc459 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6d7d095a fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x71907349 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x721d64bc fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x79d0a35e fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7a1cb1bf __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7ae41855 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7f0fff83 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7f4a295b fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8284fc6f fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x88bbef6a fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x907e1925 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa0658029 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1ca3e41 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa4516e13 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb5dc9db9 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbce762e6 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc9b486b7 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcab81c60 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcab8929b fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcc121035 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd4258365 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd655a0d6 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd7d2b013 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdb511617 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe5a27cca fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe853fb2d fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf6c46506 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf8b11e63 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x350ff6bf mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x020524f6 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x127ebfbd osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x189c5614 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18f7b914 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1eab14c4 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2686e827 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2b716393 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x368b1b2f osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5b57a71b osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x62031336 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x62d2adaf osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6965aa85 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6a6375ef osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x784002bb osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x78d20149 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x800802f6 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x84eed06c osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8acb6e36 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x901c8fc3 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x999c6c57 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa0846944 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa9d3776f osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb3c23b1e osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbe001772 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc2fd82e1 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe1849570 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe96407fb osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe9d0c006 osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf38eae30 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf52d016b osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf71bd9d8 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xff49dfdf osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/osd 0x4fd3cf72 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x7db227cf osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf89fbfe9 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1690e9c6 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x43957c9e qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x4d5b978e qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x78569909 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8ad58ada qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf477c8c3 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/raid_class 0x97b538b7 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0xe2f45248 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xf91297f9 raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0317e91f scsi_block_when_processing_errors +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0bf2c376 scsi_get_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0e60e45b scsi_scan_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0e899bcc scsi_prep_fn +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11d5b317 scsi_device_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x13b8e86d scsi_track_queue_full +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2047529f scsi_device_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x24436ffd scsi_unblock_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x294788ec scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2bd6de77 scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d98c1dc scsi_bios_ptable +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2ec48f87 scsi_host_alloc +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2efe5c1f scsi_adjust_queue_depth +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x34ded882 scsi_host_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3ee08f82 scsi_remove_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3fc6b6b9 scsi_reset_provider +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40e3d2bb scsi_release_buffers +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x43925d25 scsi_device_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4abc83b5 __scsi_iterate_devices +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x552706bc scsi_free_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5692ccbf scsi_free_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x57f4782b scsi_host_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x59130569 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6102be61 scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x67125ca4 scsi_target_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6896fb07 __scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x714072e2 scsi_is_sdev_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x717da0b4 scsicam_bios_param +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x727a03ae scsi_rescan_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x77cd14f0 scsi_calculate_bounce_limit +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7a106617 scsi_prep_state_check +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7a3c8689 scsi_unregister +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7b338fa9 scsi_register +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7cbe2536 scsi_eh_prep_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7d314775 scsi_eh_restore_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x806fef6a scsi_register_interface +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x907506db scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9166b856 scsi_is_target_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9186bd75 __starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x92dda7a8 scsi_allocate_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x971e32a4 scsi_prep_return +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x97547816 __scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9bb4d855 __scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9c78d062 scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa03a54a5 scsi_test_unit_ready +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa16e06b6 scsi_device_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa27d99e7 scsi_finish_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa34db3d6 starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa481d230 scsi_execute_req +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa866fa92 scsi_host_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa969a0c8 __scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa96a4021 scsi_target_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa98a606e scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaa67dfe0 scsi_block_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xadbdb565 scsi_eh_finish_cmd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xae280d1d scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb12ba0d7 scsi_host_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbd3aa505 scsi_get_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbfadb9b4 scsi_register_driver +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc6164a8f scsi_init_io +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc7a03731 scsi_remove_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc9a75d24 scsi_mode_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca04f5c5 scsi_device_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd32bbef9 scsi_nonblockable_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd5710441 scsi_add_host_with_dma +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd9589e59 scsi_print_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd9ec1701 scsi_scan_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdd3acee0 scsi_report_device_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe035c53b scsi_set_medium_removal +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe2bbd809 __scsi_alloc_queue +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe4252f81 scsi_dma_map +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe6e8d223 scsi_is_host_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe920554b scsi_execute +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a int_to_scsilun +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea58cd89 scsi_setup_fs_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xebbf84a3 scsi_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xec79c03d scsi_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf1654967 scsi_get_device_flags_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf7371f8a scsi_dma_unmap +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf7a80260 scsi_report_bus_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfabff38c scsi_command_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfbaa41e3 scsi_kmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0e95f9df fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x137ecca4 fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x676d5c7e fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7e8c27ba fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8664c9bd fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x95cd8d24 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb3feddc5 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb8465f86 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdc88f5fc fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdd958d94 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xee579329 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfe3aad8c fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x071c8ed2 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0c1c98e5 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1d7fee89 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2e6a5df1 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3dbcb9fd sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4a4b25ab sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x50546072 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5327e2d2 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5d0d1081 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5f7ef12f sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x71cfbae5 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7b4cb3c7 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x82463494 sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8268529b sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x876b9feb sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88f27b44 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8943d955 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8e4cfce7 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8e61a36d scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9fd31440 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa52552f3 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaa5ee8e3 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbbe40c0c sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc11dba22 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdefd839d sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfa556b62 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x19ab2356 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x30db59c9 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x326ea601 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8397fd55 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xfa114b6d spi_release_transport +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/serial/8250 0xd9f64dec serial8250_register_port +EXPORT_SYMBOL drivers/ssb/ssb 0x19ae07e3 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0x2329507d ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x37cd0590 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x46d60cb3 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x53582f5c ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0x666cea4b __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x68930c32 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x821e43ba ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x864731a1 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x93f427c7 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x9defd248 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xb3116aa7 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0xbf0135dd ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc0731db0 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xc9241bee ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xe442f55c ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0xe6578c1c ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xe743171d ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xfc8c473d ssb_device_disable +EXPORT_SYMBOL drivers/telephony/ixj 0x9dfcb42c ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x2a8e9c8a phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xc49cba12 phone_unregister_device +EXPORT_SYMBOL drivers/usb/core/usbcore 0x61618d4d hub_port_logical_disconnect +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xd308b62d sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2ab6d27f usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x9cba0c01 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x290d26ec lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xae36f821 lcd_device_register +EXPORT_SYMBOL drivers/video/display/display 0x887e2689 display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0xd736a774 display_device_register +EXPORT_SYMBOL drivers/video/output 0x0079a9ad video_output_unregister +EXPORT_SYMBOL drivers/video/output 0xa211617a video_output_register +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x03b4a482 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x0761d59e svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x3c4f4bb8 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x4549af83 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8bf4361d svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x9a4d2a05 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf2f5bd0f svga_tilecursor +EXPORT_SYMBOL drivers/video/syscopyarea 0xacc80940 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x1fc65e78 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0xbd0dcb0f sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x709ca63c w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x7ccbc620 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1ee5ec92 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x43c306ac w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x976ac4ea w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xf2dcb608 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x6185d014 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0x704ef2c9 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xe4006eaf w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xe4eff123 w1_remove_master_device +EXPORT_SYMBOL fs/configfs/configfs 0x08ac049d configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x13cba7c3 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0x22a22aad configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x3f88ab73 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x437c7f47 config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x4ad07fd9 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xb2f1250a config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xb50c51cb configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0xc9a35f95 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xe0401274 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xf7dc5310 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xf9f6ee6d config_group_init +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x2a884714 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x2de810f1 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x321c33c0 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x44d21e22 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4e286639 __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x5303ebec __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0x5c77d39f fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x5f9668ae __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x68c5991c fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7e8c1d14 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x861cc294 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8e1e3a2b fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x8fae733e __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x9b25dedb fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0xa2d8ff98 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xacb56aea __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xb04dc206 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbd58d1c6 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xc9bf7530 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0xd53c4504 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xdb75021f fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0xe29299d1 fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xea8a7bea __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0xf2851d34 fscache_object_lookup_negative +EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533 nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4 nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/quota/quota_tree 0x13e0439c qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x1d574123 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x325edfd0 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4e369be5 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x723afe76 qtree_write_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-t10dif 0x782acba5 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8022 0x026d16fc unregister_8022_client +EXPORT_SYMBOL net/802/p8022 0x7a8b8f74 register_8022_client +EXPORT_SYMBOL net/802/p8023 0x21987b47 make_8023_client +EXPORT_SYMBOL net/802/p8023 0xcf1fd06b destroy_8023_client +EXPORT_SYMBOL net/802/psnap 0x0458cf1c unregister_snap_client +EXPORT_SYMBOL net/802/psnap 0x532f44ed register_snap_client +EXPORT_SYMBOL net/9p/9pnet 0x01c0f44f p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x0471101f v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x092e4bbe v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x11f675e7 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x1753f955 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x175e721b p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x31618724 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x42cfc5c1 p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0x5ccb07c2 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x66d4d229 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7a44eb72 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x7d86fc79 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x85e5f500 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x934f8a3a p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x958a8a47 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x970ed5f8 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x99744f90 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa3ebe363 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xb09a2662 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xc28b956c p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xd376e649 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0xd5a8fb00 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xd612437e p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe71575d4 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0xf681f078 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0xf95f1ff8 v9fs_register_trans +EXPORT_SYMBOL net/appletalk/appletalk 0x22f6ebb5 aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0x4539af84 alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x5e428deb atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x8ae576bd atrtr_get_dev +EXPORT_SYMBOL net/atm/atm 0x0378c820 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x15e063b8 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x1e82e6a6 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x2e3bcc63 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x31eb46b9 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x3343b3e3 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x4b623ade atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x5b09f0f2 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x6dc66bec vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x79bbc5c8 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8b4b6a9c atm_charge +EXPORT_SYMBOL net/atm/atm 0xa2308ce7 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/bridge/bridge 0x393c68cf br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x9d9fe98c ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xa0ff1959 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xcae814d4 ebt_do_table +EXPORT_SYMBOL net/can/can 0x0ba09880 can_proto_register +EXPORT_SYMBOL net/can/can 0x0df4c112 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x21034510 can_send +EXPORT_SYMBOL net/can/can 0x5bbad80c can_rx_register +EXPORT_SYMBOL net/can/can 0xa8d72751 can_rx_unregister +EXPORT_SYMBOL net/ieee802154/nl802154 0x1ef5a965 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x2821a91d ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x3828f78e ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x643fd0d9 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x79fb3a4a ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xe306ce74 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x2fa5883f arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x63b5f02b arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x78c44ab7 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x40bf3df1 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x59f253cb ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x72054bd0 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x0b9d2fb0 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1c50f5eb nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x27ce7940 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x2a13866f nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x79dca359 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x9e1100bf nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xac2170e8 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/tunnel4 0xa5e34775 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv4/tunnel4 0xd2646825 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv6/ipv6 0x01f531a2 ip6_frag_match +EXPORT_SYMBOL net/ipv6/ipv6 0x02bdc554 compat_ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x02d19cab ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x14da6a36 xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0x1b6903e4 inet6_del_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x2335d5c8 ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x27fcd88b ndisc_build_skb +EXPORT_SYMBOL net/ipv6/ipv6 0x2b7fc52b nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/ipv6 0x2d04044c inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0x2ddae92b ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x366d71ab ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x45f6081b inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0x4cb03dee ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0x4e6e01c2 compat_ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x5bb90de7 inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0x65130c0c ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0x6990cc3b inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0x75b94226 ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x7ef336c3 xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0x8858d0e2 inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0x8f05f44d ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0x8f1b6458 xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x92b55543 icmpv6_send +EXPORT_SYMBOL net/ipv6/ipv6 0x9ff6f673 ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0xa964ec67 in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0xc0ce8f29 rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0xcaf350aa inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0xcbee1498 inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xe0950fc4 ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xe18e0484 ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xe76d6af4 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0xeb7f0159 xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0xf82ac080 ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0xfbf9e907 ip6_route_output +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x17ab3ad9 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x221e65cf ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xa13ac1f2 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xd5a26c9b ip6t_register_table +EXPORT_SYMBOL net/ipv6/tunnel6 0x05e46d22 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0x57a879b7 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/llc/llc 0x38b92846 llc_remove_pack +EXPORT_SYMBOL net/llc/llc 0x49c1fea6 llc_mac_hdr_init +EXPORT_SYMBOL net/llc/llc 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL net/llc/llc 0x556643e3 llc_sap_list_lock +EXPORT_SYMBOL net/llc/llc 0x6510fb77 llc_build_and_send_ui_pkt +EXPORT_SYMBOL net/llc/llc 0x79f11ea6 llc_add_pack +EXPORT_SYMBOL net/llc/llc 0x7a85437d llc_sap_close +EXPORT_SYMBOL net/llc/llc 0xcad8900c llc_sap_open +EXPORT_SYMBOL net/llc/llc 0xe4751f13 llc_set_station_handler +EXPORT_SYMBOL net/llc/llc 0xe9ae2e1f llc_sap_find +EXPORT_SYMBOL net/mac80211/mac80211 0x0283a575 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x0510885d ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x0634a95e ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x0f50242d ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x11443624 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x17f16b3e ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x1c655c11 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x1cdc2cc6 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x22b1dc70 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x24022532 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x309579c2 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x3795cbbc ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x3b0235e5 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x51ebe983 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x643361d0 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x674885b2 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x6af35826 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0x6cdcd395 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x8114a6e2 ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0x97610b0d __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x9b7f525c ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x9fd6d0d9 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xa38039c4 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xabf4383f ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xac1d9f98 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xace789dd ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xaff28b1d ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0xb5f92784 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xb941e9ec ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xbfeaf3a8 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xc48b5372 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xc4cc6a25 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xcc034ef2 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xce80c652 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xda752f86 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xe76170c1 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xec066d1a ieee80211_alloc_hw +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x342e4014 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x3f5fd18a register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x633ad02a register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x732dc569 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa7de3521 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc7c07f7a unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc97da942 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xcaf4071d unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xcbdc7c75 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd74bffe7 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xea1b2a8d ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x77bf7e6d __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x78d9de46 __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xfe3a5351 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x087b2665 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x228e7220 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x499de935 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x690c3e73 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x6964bcc3 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x9447ddb0 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xb48ae082 xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xd41cbd67 xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0xdc7efcf9 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xf677fc5b xt_unregister_match +EXPORT_SYMBOL net/phonet/phonet 0x13b654e6 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x184b428f phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x1ff6bdff pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0x272f114b phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x55cfcd9c pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x5bc54dab pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x844dd980 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x8d5628b5 pn_skb_send +EXPORT_SYMBOL net/rfkill/rfkill 0x36f61c9c rfkill_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0x61fe498b rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0x68fd9e2d rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x904e5f38 rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0xa4e8d6ff rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xa68159f2 rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xb60c9b60 rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0xd1a40d98 rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0xed9c8777 rfkill_blocked +EXPORT_SYMBOL net/rfkill/rfkill 0xefbc69f6 rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0xfd9a1657 rfkill_resume_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xfe275faf rfkill_set_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xff2c2dc4 rfkill_set_hw_state +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0114e0ec rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x07b8be7a rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0c16b8a7 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1265e820 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3b95e57e rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x74939b4b rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7dfafb4d rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa298d713 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa9b20002 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbea51ce8 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xcbb20029 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xde996771 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf5e5ebd6 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfba9b272 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfd538d8e rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/sunrpc/sunrpc 0xf1f8be03 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x03b844cf tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x34f7467c tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3dbacab4 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x3e93b677 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4e796163 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x63713a3a tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x69e2572d tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x80ad59db tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x81b091d3 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x993bd0f9 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xc4a3b056 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xca270638 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xf579f8e2 tipc_send_buf2name +EXPORT_SYMBOL net/wimax/wimax 0x3564e4c1 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0x86212d72 wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x09eec1fb wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1050e053 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x11c27ccc wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x26132c89 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x28f2724f regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x3805ec03 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x3c2698ce cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x3d5b327c wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x43d41339 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x5028987f ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x5572619a wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x5e4578bd cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5eead50a cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x77ec37d2 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x812db032 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x81d42043 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x8b7c2f4e cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x98c707bd wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x9a61dcc8 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0xacc5918f freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0xaee86e31 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xbacc83fa cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0xbf284035 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xcb29a9af ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd47b80e2 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0xdb9d1f6d wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0xe92b96a5 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xece62ba9 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0xf45f0547 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0xf847796d cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/lib80211 0x1bd9d061 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2740d5f5 lib80211_unregister_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x5abccfe8 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x61d5131d lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x71937cf0 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x73514162 lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x84c80c03 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xf10ecd15 lib80211_register_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x4f690852 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x33f4a5cd snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x0cdf14ee snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x622ba4d0 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x79294e2f snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xce4cd1c0 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xa6efc93d snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xe64c7d0f snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x3b55d387 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x68b9bd07 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7adfa053 snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x998f2126 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9b1825a9 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb6327286 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbc51650a snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe58d6519 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xf5d9eed5 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x12fb2add snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x17afdf96 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x28c6bcb6 snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x323b576e snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x367ae1f7 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x382d6457 snd_device_new +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3b6aa959 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x3b7c53de snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x401e3a1e snd_cards +EXPORT_SYMBOL sound/core/snd 0x41725bf2 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x4370417f snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x48be6937 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4ad18bc3 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x5c25d7ba snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x5c569047 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x5d6c8592 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x61e5bd31 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x634849fc snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x64eb5349 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x65993491 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0x6a3593da snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x6eae2045 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x7649939c snd_card_register +EXPORT_SYMBOL sound/core/snd 0x7776326d snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x79f5cecb snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x7efad524 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x8792a93c snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x8aa92344 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x92f5af8f snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x97a1b6a0 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x9ad1cb83 snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0x9fd08736 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0xaa20dc11 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xad9403e6 snd_component_add +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb28aa1b5 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0xb2c12184 snd_card_create +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb3cfa73a snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xba69fd88 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0xc5416a35 snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xcc35160e snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xd5e6ee85 snd_card_free +EXPORT_SYMBOL sound/core/snd 0xdb91a3de snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0xde8ccca6 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe8a50d8d snd_device_register +EXPORT_SYMBOL sound/core/snd 0xfa6bb153 snd_device_free +EXPORT_SYMBOL sound/core/snd 0xff7257f2 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd-hwdep 0x1ac6a51c snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x07561ce9 snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x32c184e4 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x4f181ae4 snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x9671b6e2 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xec9eca3a snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x0d489bf1 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x0f94af32 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x15b69333 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x18bcd3c1 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x19781351 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1f843e3d snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x23b164b6 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0x2436e72e snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x27b02853 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x29c555d0 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x3228bfc2 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x3881e62a snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x395e287f snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x40b8367a snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x5fb1809c snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x64863491 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x69f37579 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x6fdf9a42 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x86ba56fe snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0x87ef6e48 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x8dd8241a snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x904a4217 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x91d01392 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x93cb4fd9 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x96b6657e snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xab1ee5a1 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc5b113d3 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0xc7eab455 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0xcb2da20b snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0xcfa50e60 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd6cc8782 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xdd1e8587 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xe04c19d9 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xe96b6c13 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0xecdb5592 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf3c9b7e8 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xfe965182 snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-rawmidi 0x001a9dff snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0dc797ca snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x20a19851 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x2313bf3b snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x2356e382 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x298b5550 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x529e1790 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x79dcb0e1 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x805ed0c4 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x8e428de8 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa745c03d snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb14b95d5 snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd6e3e382 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xde70ded7 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xeaa22987 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0xfbef2b58 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0xff9853e0 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-timer 0x3b8eb14e snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x55b32d89 snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x76811908 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0x998b8236 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xa6d19ad9 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xbeadcd01 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0xd0c92ac2 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0xebcd0bd9 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xed4c275e snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xed8f6d76 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0xf3eef94a snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0xf713ec7f snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0xfcd79e00 snd_timer_interrupt +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x9d4d8593 snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x36650a44 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x75b6e679 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8f7dc80c snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa5f6a1ed snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd237bfa8 snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xdcfb083d snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf5354256 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xfa34f876 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xff56a35a snd_opl3_new +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1057cdc3 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x133c54c7 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x38e190c2 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6219e29e snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6a3fcc9e snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x717d456b snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcbe8bdb4 snd_vx_dsp_load +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x166bc75e snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1a77a33b snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x32909a94 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xafff4a4e snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xb900f4c6 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf3bf7dca snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x011976b9 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x25c6b751 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3e27e44c snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x4bce6f12 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa16f6ae3 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcfcb3546 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x33c7ae40 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x4df7d98c snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x8065e35a snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xd0eadcae snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x5e893a83 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x928fda6a snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x0ecbcd65 snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x9a7e1e2b snd_tea575x_init +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x105acc97 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb75fe0d9 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc02f76d1 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd9c0bdcb snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xeff70323 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-i2c 0x0cdbc90c snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x51b70fe0 snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x7006a2a3 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x985c4b8e snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xa1a5ecd7 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xbfa925ed snd_i2c_device_free +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x13923ea8 snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x17c05485 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1aa26a44 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1db4e4b1 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x34b1e85f snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x48dfd9cc snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5820ab7a snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7d6839f2 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x90fd9851 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9cabcbd7 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa696e043 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc338576a snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xceb3fa93 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xcf0b3d62 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd024b476 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x06a27fa6 snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x762f2f95 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9bf686cb snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xaf1454b2 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xb7af725d snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xb8bb1acc snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd816fcb5 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd8300281 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfba6dd3e snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x2a439dfe snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x3f641dbc snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xcf8d0ac8 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf51c0e29 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x1373a939 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x1d3b6c84 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x59ee845b snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x710d69ea snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf78fb154 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xb1f79d66 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x65e13ddf register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x8f69881a register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x92264ba0 sound_class +EXPORT_SYMBOL sound/soundcore 0x969cada4 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xecf79061 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xed23468c register_sound_special +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1650de21 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5706d89d snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x58732210 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5f3d38f5 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa5234701 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xdf0f7c3f snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/snd-util-mem 0x01e234f2 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x0895e1a9 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x15cfaea4 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x2ba29873 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x45c2abb1 snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x5d2130f4 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xab810f2e __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2676a58 snd_util_mem_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x60fce2f1 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00391d12 arp_send +EXPORT_SYMBOL vmlinux 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL vmlinux 0x0058170e pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x005db841 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x006238b6 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x0075d2a9 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00b31c12 mdiobus_free +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00cbe883 per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0x00cc06e2 __break_lease +EXPORT_SYMBOL vmlinux 0x00f5837a drm_helper_resume_force_mode +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x0119af02 fget +EXPORT_SYMBOL vmlinux 0x0142e07f pci_write_vpd +EXPORT_SYMBOL vmlinux 0x016d3b82 bdput +EXPORT_SYMBOL vmlinux 0x018b5cd0 serio_open +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01b9b1d2 kernel_connect +EXPORT_SYMBOL vmlinux 0x01c1616a tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x01eb7d75 elevator_init +EXPORT_SYMBOL vmlinux 0x01f67911 ___copy_in_user +EXPORT_SYMBOL vmlinux 0x023597b2 destroy_EII_client +EXPORT_SYMBOL vmlinux 0x02394660 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x0241403e revalidate_disk +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x026d0c05 d_alloc_root +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02cc6d1d bio_copy_user +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x030358d4 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x0308f275 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x031a3376 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x031e1613 __inet6_hash +EXPORT_SYMBOL vmlinux 0x031ee678 xor_niagara_2 +EXPORT_SYMBOL vmlinux 0x0320f0c5 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x03425003 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x0343aec9 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x0365b426 lock_may_write +EXPORT_SYMBOL vmlinux 0x03720130 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x0372bf86 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x03adb9bd find_vma +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03dfd82e br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x03ea9cf3 sun4v_hvapi_get +EXPORT_SYMBOL vmlinux 0x03fb691d vfs_read +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x041f05da genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x04205f87 seq_release +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x043504e3 generic_make_request +EXPORT_SYMBOL vmlinux 0x043b8483 __kfifo_get +EXPORT_SYMBOL vmlinux 0x044c4fba drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0467440f __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x046ee767 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x047989d8 uart_resume_port +EXPORT_SYMBOL vmlinux 0x0479f47c register_gifconf +EXPORT_SYMBOL vmlinux 0x04832de4 uart_register_driver +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04c100b6 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0x04ecf009 pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x05186ca4 flush_icache_range +EXPORT_SYMBOL vmlinux 0x052eb179 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x054df01a qdisc_destroy +EXPORT_SYMBOL vmlinux 0x0560fd8f atomic_sub_ret +EXPORT_SYMBOL vmlinux 0x05799442 sock_no_accept +EXPORT_SYMBOL vmlinux 0x05932b21 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x05befa55 netif_device_detach +EXPORT_SYMBOL vmlinux 0x05c49ef8 init_special_inode +EXPORT_SYMBOL vmlinux 0x05cff603 prepare_binprm +EXPORT_SYMBOL vmlinux 0x05daf399 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x05dc94a9 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x05dde697 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0x05fd5713 skb_insert +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x062aba95 mempool_free +EXPORT_SYMBOL vmlinux 0x062e1137 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x062fcb78 i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0x06696783 phy_stop +EXPORT_SYMBOL vmlinux 0x066a1a9e drm_helper_initial_config +EXPORT_SYMBOL vmlinux 0x0672fda2 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x06feeee5 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x070d0e9f tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x071961f9 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x07253ac8 drm_mode_validate_size +EXPORT_SYMBOL vmlinux 0x072a21d1 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x074d0f76 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x074df4f8 set_create_files_as +EXPORT_SYMBOL vmlinux 0x077e9c97 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x0790c34b fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a39fff of_n_size_cells +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07b08152 bio_map_kern +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07e14850 get_super +EXPORT_SYMBOL vmlinux 0x07e62db7 ps2_command +EXPORT_SYMBOL vmlinux 0x0825b9ee kill_block_super +EXPORT_SYMBOL vmlinux 0x0826b0dc __flush_dcache_range +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x08304fd4 i2c_release_client +EXPORT_SYMBOL vmlinux 0x0836695c drm_sman_takedown +EXPORT_SYMBOL vmlinux 0x0855dfbb kthread_stop +EXPORT_SYMBOL vmlinux 0x085b2c8f udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0x0878b981 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x087be0ac sg_miter_stop +EXPORT_SYMBOL vmlinux 0x088af600 drm_gem_object_lookup +EXPORT_SYMBOL vmlinux 0x08956e7b trap_block +EXPORT_SYMBOL vmlinux 0x08cbb565 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL vmlinux 0x092b007a sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x095bb830 down_interruptible +EXPORT_SYMBOL vmlinux 0x0983f448 sbus_set_sbus64 +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x098bd2bb sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09cd1603 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x09ef76e2 dquot_commit_info +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a62de37 atomic64_add_ret +EXPORT_SYMBOL vmlinux 0x0ab46f6b i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0x0ab528ab sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0ade0ddf bio_alloc +EXPORT_SYMBOL vmlinux 0x0b0dcd9c del_gendisk +EXPORT_SYMBOL vmlinux 0x0b1698f9 neigh_seq_next +EXPORT_SYMBOL vmlinux 0x0b18c0d6 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x0b18de7f compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b43bab4 netpoll_setup +EXPORT_SYMBOL vmlinux 0x0b60835a netdev_features_change +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b9079fc udp_proc_register +EXPORT_SYMBOL vmlinux 0x0bb36cfb dqget +EXPORT_SYMBOL vmlinux 0x0c06308a jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0x0c10410c udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x0c7a01c2 mnt_unpin +EXPORT_SYMBOL vmlinux 0x0c7dd569 drm_encoder_init +EXPORT_SYMBOL vmlinux 0x0c85b19e cad_pid +EXPORT_SYMBOL vmlinux 0x0c92897a console_start +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cbc3def pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x0d08a06b aio_complete +EXPORT_SYMBOL vmlinux 0x0d0fe2f4 down_trylock +EXPORT_SYMBOL vmlinux 0x0d37c91a sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x0d4b1c74 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d9abd2a skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x0d9bfee3 blk_init_queue +EXPORT_SYMBOL vmlinux 0x0d9e58dd of_platform_bus_type +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dbabff0 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x0deee139 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x0e071169 do_munmap +EXPORT_SYMBOL vmlinux 0x0e16d486 phy_disconnect +EXPORT_SYMBOL vmlinux 0x0e2177e5 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e5fe8c1 mpage_writepage +EXPORT_SYMBOL vmlinux 0x0e690cd8 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x0e713337 sg_init_table +EXPORT_SYMBOL vmlinux 0x0eabe1b0 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f333319 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x0f378a1e ___copy_from_user +EXPORT_SYMBOL vmlinux 0x0f426404 nf_log_packet +EXPORT_SYMBOL vmlinux 0x0f714f66 open_by_devnum +EXPORT_SYMBOL vmlinux 0x0f9bb90f clocksource_register +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x1002ff0c drm_connector_property_set_value +EXPORT_SYMBOL vmlinux 0x1004a27d blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x100c8ab0 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x100d378d setup_new_exec +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x108f8306 __breadahead +EXPORT_SYMBOL vmlinux 0x10902bf7 insb +EXPORT_SYMBOL vmlinux 0x10b0179d free_netdev +EXPORT_SYMBOL vmlinux 0x10b04284 ida_get_new +EXPORT_SYMBOL vmlinux 0x10c33843 blk_complete_request +EXPORT_SYMBOL vmlinux 0x10d42264 idr_get_new +EXPORT_SYMBOL vmlinux 0x10dfc989 sysctl_string +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x11056202 register_sysctl_table +EXPORT_SYMBOL vmlinux 0x112b2121 unregister_key_type +EXPORT_SYMBOL vmlinux 0x113eb3f8 kill_pgrp +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x11609a99 make_EII_client +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x116a9806 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x1203934d read_dev_sector +EXPORT_SYMBOL vmlinux 0x12067821 block_read_full_page +EXPORT_SYMBOL vmlinux 0x1224a49d dput +EXPORT_SYMBOL vmlinux 0x129e9ae9 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x12c1a5ee bdget +EXPORT_SYMBOL vmlinux 0x12d09a67 sun4v_hvapi_unregister +EXPORT_SYMBOL vmlinux 0x12d32c63 pskb_copy +EXPORT_SYMBOL vmlinux 0x12ea337e outsb +EXPORT_SYMBOL vmlinux 0x1312adc8 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x131dfef2 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x131f49e4 set_anon_super +EXPORT_SYMBOL vmlinux 0x133d79fa tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x134d0d65 write_inode_now +EXPORT_SYMBOL vmlinux 0x13694880 key_validate +EXPORT_SYMBOL vmlinux 0x137364f0 pci_domain_nr +EXPORT_SYMBOL vmlinux 0x138a78d1 set_current_groups +EXPORT_SYMBOL vmlinux 0x138c35a3 send_sig +EXPORT_SYMBOL vmlinux 0x13ba9fcb sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x13c59f03 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x13cb59ad devm_iounmap +EXPORT_SYMBOL vmlinux 0x13d891ee kill_anon_super +EXPORT_SYMBOL vmlinux 0x13efddbf bio_split +EXPORT_SYMBOL vmlinux 0x13f38ff1 blk_get_request +EXPORT_SYMBOL vmlinux 0x14001880 proc_symlink +EXPORT_SYMBOL vmlinux 0x14093339 simple_transaction_set +EXPORT_SYMBOL vmlinux 0x1445ea21 prepare_creds +EXPORT_SYMBOL vmlinux 0x144ed3a1 dev_base_lock +EXPORT_SYMBOL vmlinux 0x146113fd ps2_handle_response +EXPORT_SYMBOL vmlinux 0x1464ea9d jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x146dacae block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x14721ca4 blk_unplug +EXPORT_SYMBOL vmlinux 0x14c0eb3a kernel_read +EXPORT_SYMBOL vmlinux 0x14ca47cc ldc_read +EXPORT_SYMBOL vmlinux 0x14fd0f58 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x1506a542 netif_napi_add +EXPORT_SYMBOL vmlinux 0x15084aa8 dma_set_mask +EXPORT_SYMBOL vmlinux 0x151c2331 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x1526683e bdi_destroy +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x157f75d3 vfs_writev +EXPORT_SYMBOL vmlinux 0x15e303ff unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x15ec4af7 key_link +EXPORT_SYMBOL vmlinux 0x16158f7f pci_request_regions +EXPORT_SYMBOL vmlinux 0x16237519 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x16479e8f panic_notifier_list +EXPORT_SYMBOL vmlinux 0x1664ee77 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x167c09a2 sbusfb_ioctl_helper +EXPORT_SYMBOL vmlinux 0x16a1957f qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x16a4e943 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16e911d4 down_write +EXPORT_SYMBOL vmlinux 0x16f30b5f kobject_init +EXPORT_SYMBOL vmlinux 0x17043806 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x1729ee41 nonseekable_open +EXPORT_SYMBOL vmlinux 0x177a8852 skb_seq_read +EXPORT_SYMBOL vmlinux 0x17a0780c neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x17b3844d fb_class +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17e778af jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x17ed90a3 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x18008043 lock_sock_nested +EXPORT_SYMBOL vmlinux 0x183a8841 create_proc_entry +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x1879912a pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x18863bec xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x188bf2c1 ip_dev_find +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18bef9d9 mdesc_node_by_name +EXPORT_SYMBOL vmlinux 0x1907df21 pci_bus_type +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x1950fa80 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x1966bf16 down_read_trylock +EXPORT_SYMBOL vmlinux 0x197ae02d ___pskb_trim +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19a8b1b6 drm_get_resource_len +EXPORT_SYMBOL vmlinux 0x19ae411d kfree_skb +EXPORT_SYMBOL vmlinux 0x19dc80b8 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x19e8d94a i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0x1a2236b4 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x1a35bcbc VISenter +EXPORT_SYMBOL vmlinux 0x1a3851c2 bmap +EXPORT_SYMBOL vmlinux 0x1a3f1b04 security_path_unlink +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1aa759d0 ns_to_timeval +EXPORT_SYMBOL vmlinux 0x1aac96d2 bio_add_page +EXPORT_SYMBOL vmlinux 0x1ab756ee dmam_pool_create +EXPORT_SYMBOL vmlinux 0x1abf00d4 key_type_keyring +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1ad9f95a prom_finddevice +EXPORT_SYMBOL vmlinux 0x1add9b5f mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b04f227 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x1b0685c5 block_sync_page +EXPORT_SYMBOL vmlinux 0x1b113513 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b768ef0 register_netdevice +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9f6641 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x1baef442 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x1bb24a33 d_alloc_name +EXPORT_SYMBOL vmlinux 0x1bc680c8 I_BDEV +EXPORT_SYMBOL vmlinux 0x1bfd7deb igrab +EXPORT_SYMBOL vmlinux 0x1c0320ea drm_connector_attach_property +EXPORT_SYMBOL vmlinux 0x1c05cb7c xfrm_register_km +EXPORT_SYMBOL vmlinux 0x1c19631d touch_atime +EXPORT_SYMBOL vmlinux 0x1c2c4db6 pci_device_to_OF_node +EXPORT_SYMBOL vmlinux 0x1c477e04 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0x1c500d2c of_dev_get +EXPORT_SYMBOL vmlinux 0x1c65767e blk_free_tags +EXPORT_SYMBOL vmlinux 0x1c7d257c sunserial_register_minors +EXPORT_SYMBOL vmlinux 0x1c80de9c ip_send_check +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1ccb652c ip_getsockopt +EXPORT_SYMBOL vmlinux 0x1cdda0b6 journal_revoke +EXPORT_SYMBOL vmlinux 0x1cee15b1 sock_wake_async +EXPORT_SYMBOL vmlinux 0x1cf5cbc9 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x1d03e9c0 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x1d32752a input_flush_device +EXPORT_SYMBOL vmlinux 0x1d373be7 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x1d3e411e dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x1d650293 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL vmlinux 0x1d744605 drm_mm_search_free +EXPORT_SYMBOL vmlinux 0x1d76a5ee neigh_destroy +EXPORT_SYMBOL vmlinux 0x1d776a4f dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x1d7b242f drm_mode_object_find +EXPORT_SYMBOL vmlinux 0x1dc1dc7b jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1ddc638f journal_forget +EXPORT_SYMBOL vmlinux 0x1ddcf1f0 phy_print_status +EXPORT_SYMBOL vmlinux 0x1e348041 journal_abort +EXPORT_SYMBOL vmlinux 0x1e3a9f1c drm_mode_connector_list_update +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e720434 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0x1e91e50f blk_run_queue +EXPORT_SYMBOL vmlinux 0x1eabed09 pci_map_rom +EXPORT_SYMBOL vmlinux 0x1edc9598 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x1ef14605 pci_disable_device +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f010544 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x1f0242fb xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL vmlinux 0x1f2d79c7 request_key_async +EXPORT_SYMBOL vmlinux 0x1f587ab7 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x1f7cc628 mempool_create +EXPORT_SYMBOL vmlinux 0x1f8e1d47 drm_mmap +EXPORT_SYMBOL vmlinux 0x1f973fab lock_super +EXPORT_SYMBOL vmlinux 0x1f9d78df tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x1fae7a0b wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x1ffbea11 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2001f674 serio_rescan +EXPORT_SYMBOL vmlinux 0x2002e515 skb_make_writable +EXPORT_SYMBOL vmlinux 0x204eddf7 skb_free_datagram +EXPORT_SYMBOL vmlinux 0x205628f2 pci_read_vpd +EXPORT_SYMBOL vmlinux 0x20645642 drm_debug +EXPORT_SYMBOL vmlinux 0x206d991f sk_wait_data +EXPORT_SYMBOL vmlinux 0x2084241e bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x20c632d4 drop_super +EXPORT_SYMBOL vmlinux 0x20ca1470 drm_mode_config_cleanup +EXPORT_SYMBOL vmlinux 0x20e8a55c kset_register +EXPORT_SYMBOL vmlinux 0x20f3b1c6 sock_create +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x210364fa tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0x210b4965 set_bh_page +EXPORT_SYMBOL vmlinux 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x21745ced __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x21afe23d ldc_map_single +EXPORT_SYMBOL vmlinux 0x21c1cae7 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x21c94766 d_validate +EXPORT_SYMBOL vmlinux 0x21dedfa5 page_put_link +EXPORT_SYMBOL vmlinux 0x22081e9e inet_csk_accept +EXPORT_SYMBOL vmlinux 0x221a452b __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x22492d73 sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x227232fc __alloc_skb +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22a113cb get_fs_type +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22d4693f uart_update_timeout +EXPORT_SYMBOL vmlinux 0x22e30a1b filemap_flush +EXPORT_SYMBOL vmlinux 0x22e8d4d6 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x2309012f mod_timer +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x23408a02 fput +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x2345fc24 module_layout +EXPORT_SYMBOL vmlinux 0x23513458 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x23680926 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x23b6df4b drm_rmmap +EXPORT_SYMBOL vmlinux 0x23b8cf97 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x23bd09c0 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x23d337ee journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x23e9288a request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x23ee8544 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x23f4fa3c pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x23f832f6 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x2405f8be pci_find_device +EXPORT_SYMBOL vmlinux 0x2432d781 lro_receive_frags +EXPORT_SYMBOL vmlinux 0x243e5713 d_splice_alias +EXPORT_SYMBOL vmlinux 0x244c330f generic_block_bmap +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x247f916e mpage_writepages +EXPORT_SYMBOL vmlinux 0x248fb92a wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x249c4853 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x249e893f ebus_dma_prepare +EXPORT_SYMBOL vmlinux 0x24a79922 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x24bd930a outsl +EXPORT_SYMBOL vmlinux 0x24d5dfe0 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0x24e2736d xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x24f7b485 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x25338508 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x25596e26 net2280_set_fifo_mode +EXPORT_SYMBOL vmlinux 0x257f662a blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x259d3f3b pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x25ab195d input_grab_device +EXPORT_SYMBOL vmlinux 0x25b246af neigh_event_ns +EXPORT_SYMBOL vmlinux 0x25ba121c mempool_resize +EXPORT_SYMBOL vmlinux 0x25c3dbca prom_nextprop +EXPORT_SYMBOL vmlinux 0x25ce7fe9 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x25db74e7 mdesc_node_name +EXPORT_SYMBOL vmlinux 0x25f28ffb tcp_ioctl +EXPORT_SYMBOL vmlinux 0x25fa6f17 wait_for_completion +EXPORT_SYMBOL vmlinux 0x25ffe8e9 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0x2610abc2 block_write_end +EXPORT_SYMBOL vmlinux 0x261e6f55 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x261e8cb6 file_remove_suid +EXPORT_SYMBOL vmlinux 0x262eea91 __up_read +EXPORT_SYMBOL vmlinux 0x263ee19b sg_init_one +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26ab3258 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x26d0cdac vio_register_driver +EXPORT_SYMBOL vmlinux 0x26e04d1d clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26eec615 pci_scan_slot +EXPORT_SYMBOL vmlinux 0x26f51285 dev_add_pack +EXPORT_SYMBOL vmlinux 0x270f188c tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x274c15a4 consume_skb +EXPORT_SYMBOL vmlinux 0x2766e9dd xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x2788dfa5 dev_addr_del +EXPORT_SYMBOL vmlinux 0x2795b26d tty_name +EXPORT_SYMBOL vmlinux 0x279a3430 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x27a6afe6 bdi_unregister +EXPORT_SYMBOL vmlinux 0x27b81daa xor_niagara_3 +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c47889 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27cdf161 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x27d036af of_unregister_driver +EXPORT_SYMBOL vmlinux 0x27e5720d atomic64_sub +EXPORT_SYMBOL vmlinux 0x27ee3775 __init_rwsem +EXPORT_SYMBOL vmlinux 0x280a7b39 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x28454ce2 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x285a8bb5 km_state_notify +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x287a3b7d fifo_set_limit +EXPORT_SYMBOL vmlinux 0x287f8302 mem_section +EXPORT_SYMBOL vmlinux 0x28c57a48 single_release +EXPORT_SYMBOL vmlinux 0x28e1ec7c should_remove_suid +EXPORT_SYMBOL vmlinux 0x28e86583 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x290eabdf xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x295d1788 sk_stream_error +EXPORT_SYMBOL vmlinux 0x297dacdb kobject_put +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29d58584 tcp_child_process +EXPORT_SYMBOL vmlinux 0x29dc4be7 of_console_options +EXPORT_SYMBOL vmlinux 0x29f0c9a6 drm_open +EXPORT_SYMBOL vmlinux 0x2a119a14 input_event +EXPORT_SYMBOL vmlinux 0x2a1e0c8d tcp_disconnect +EXPORT_SYMBOL vmlinux 0x2a23b79e vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x2a5242a1 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x2a63aacb dcache_readdir +EXPORT_SYMBOL vmlinux 0x2a8b4a8b journal_set_features +EXPORT_SYMBOL vmlinux 0x2a9b3f90 nf_reinject +EXPORT_SYMBOL vmlinux 0x2b2f242f sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x2b32c3ff current_fs_time +EXPORT_SYMBOL vmlinux 0x2b7c00f8 bdev_read_only +EXPORT_SYMBOL vmlinux 0x2b834471 napi_get_frags +EXPORT_SYMBOL vmlinux 0x2b937a6f __ret_efault +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2be5204b skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x2beeac2e inet_getname +EXPORT_SYMBOL vmlinux 0x2c11691c sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x2c22a46c drm_helper_probe_connector_modes +EXPORT_SYMBOL vmlinux 0x2c34d161 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x2c43eea7 sk_run_filter +EXPORT_SYMBOL vmlinux 0x2c57bc55 dquot_drop +EXPORT_SYMBOL vmlinux 0x2c5a4880 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x2c70ae05 single_open +EXPORT_SYMBOL vmlinux 0x2c7663e3 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x2c8b012e sg_miter_next +EXPORT_SYMBOL vmlinux 0x2cb51f58 generic_file_open +EXPORT_SYMBOL vmlinux 0x2cc647b0 put_tty_driver +EXPORT_SYMBOL vmlinux 0x2cd8e4c8 get_phy_device +EXPORT_SYMBOL vmlinux 0x2d1e0524 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x2d222fec __rta_fill +EXPORT_SYMBOL vmlinux 0x2d22e88f simple_getattr +EXPORT_SYMBOL vmlinux 0x2d452f5e journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x2d476bf8 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x2d61fc8e unregister_netdev +EXPORT_SYMBOL vmlinux 0x2d66d98a skb_gso_segment +EXPORT_SYMBOL vmlinux 0x2d913e0a kobject_del +EXPORT_SYMBOL vmlinux 0x2daa7939 xor_vis_4 +EXPORT_SYMBOL vmlinux 0x2dc1d8e0 may_umount_tree +EXPORT_SYMBOL vmlinux 0x2df43379 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x2e134614 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x2e155fa3 arp_xmit +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e3dd13e tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e52f177 mpage_readpage +EXPORT_SYMBOL vmlinux 0x2e67d3e5 read_cache_pages +EXPORT_SYMBOL vmlinux 0x2e73117c tcf_hash_check +EXPORT_SYMBOL vmlinux 0x2e9467ef xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL vmlinux 0x2ee9e2de kset_unregister +EXPORT_SYMBOL vmlinux 0x2f1ac759 lookup_hash +EXPORT_SYMBOL vmlinux 0x2f398696 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x2f47a582 pcim_iounmap +EXPORT_SYMBOL vmlinux 0x2f5130ed d_rehash +EXPORT_SYMBOL vmlinux 0x2f572beb keyring_search +EXPORT_SYMBOL vmlinux 0x2f683614 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x2f88b891 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x2f921465 fb_validate_mode +EXPORT_SYMBOL vmlinux 0x2fb40deb i2c_use_client +EXPORT_SYMBOL vmlinux 0x2fc04179 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x2fccaa6d ip_fragment +EXPORT_SYMBOL vmlinux 0x2fe09212 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0x300b2000 of_find_in_proplist +EXPORT_SYMBOL vmlinux 0x3027961b __lookup_one_len +EXPORT_SYMBOL vmlinux 0x3031a8f7 posix_acl_permission +EXPORT_SYMBOL vmlinux 0x3033987f xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x30558003 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x305d51af phy_connect +EXPORT_SYMBOL vmlinux 0x3074f033 drm_order +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30a08047 contig_page_data +EXPORT_SYMBOL vmlinux 0x30afefcf pci_dev_put +EXPORT_SYMBOL vmlinux 0x30dd1ac4 tcp_check_req +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x3105d2c2 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x3178c92f phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x3181d702 tty_unregister_device +EXPORT_SYMBOL vmlinux 0x31a1f90b tty_write_room +EXPORT_SYMBOL vmlinux 0x31a2e826 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x31aeba7e drm_mm_put_block +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31d0a0cf drm_helper_encoder_in_use +EXPORT_SYMBOL vmlinux 0x31ebadcd in_group_p +EXPORT_SYMBOL vmlinux 0x31f10cfd pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x32065f08 __lock_page +EXPORT_SYMBOL vmlinux 0x323222ba mutex_unlock +EXPORT_SYMBOL vmlinux 0x323cefec copy_from_user_fixup +EXPORT_SYMBOL vmlinux 0x32569e90 key_unlink +EXPORT_SYMBOL vmlinux 0x325a69b3 pci_match_id +EXPORT_SYMBOL vmlinux 0x3280d5cd genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x32937400 block_prepare_write +EXPORT_SYMBOL vmlinux 0x32b908fa __kill_fasync +EXPORT_SYMBOL vmlinux 0x32cb70c7 dget_locked +EXPORT_SYMBOL vmlinux 0x32e32762 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x32e73c63 drm_addbufs_pci +EXPORT_SYMBOL vmlinux 0x32f7a45d security_path_rename +EXPORT_SYMBOL vmlinux 0x32ff5586 inet_bind +EXPORT_SYMBOL vmlinux 0x3309e90d nf_getsockopt +EXPORT_SYMBOL vmlinux 0x330e70e4 sg_free_table +EXPORT_SYMBOL vmlinux 0x33134f61 jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0x3352b363 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x336ee548 bioset_create +EXPORT_SYMBOL vmlinux 0x3393bdb8 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x33b99ea5 drm_mode_config_init +EXPORT_SYMBOL vmlinux 0x33d1251c bdi_init +EXPORT_SYMBOL vmlinux 0x33fbc501 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x3423c6cc __lock_buffer +EXPORT_SYMBOL vmlinux 0x3424b786 set_page_dirty +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x3460d0a3 bio_init +EXPORT_SYMBOL vmlinux 0x34648184 pci_get_subsys +EXPORT_SYMBOL vmlinux 0x3480f6c6 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34d33844 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x34de98d3 iget5_locked +EXPORT_SYMBOL vmlinux 0x34f99b8b genl_register_ops +EXPORT_SYMBOL vmlinux 0x35068da5 vfs_mkdir +EXPORT_SYMBOL vmlinux 0x351332a7 vm_insert_page +EXPORT_SYMBOL vmlinux 0x3549818e input_register_handler +EXPORT_SYMBOL vmlinux 0x35597f91 seq_path +EXPORT_SYMBOL vmlinux 0x3567d771 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x3573f0c9 of_find_node_by_path +EXPORT_SYMBOL vmlinux 0x3574b3a9 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x3574fe97 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x3582ed17 vfs_stat +EXPORT_SYMBOL vmlinux 0x359d54f7 security_inode_init_security +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35bccdd8 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35c86851 bdget_disk +EXPORT_SYMBOL vmlinux 0x35cdb1c6 ebus_dma_addr +EXPORT_SYMBOL vmlinux 0x35eeb355 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x360b96ba __sk_dst_check +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x368c95e5 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x36d65e09 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x36e077e8 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x36e47222 remove_wait_queue +EXPORT_SYMBOL vmlinux 0x36ffa268 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x3754583d audit_log_format +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x375d23ef tcp_parse_options +EXPORT_SYMBOL vmlinux 0x37af6a0a abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37e702bf dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x37fb93b9 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x380397af skb_pull +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381b14df neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x3822dc00 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x3826a500 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x3837f234 mii_phy_probe +EXPORT_SYMBOL vmlinux 0x386d53a8 d_lookup +EXPORT_SYMBOL vmlinux 0x3872eeeb of_getintprop_default +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38ca3ee1 cfb_fillrect +EXPORT_SYMBOL vmlinux 0x39172f08 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x39205c7a vfs_readlink +EXPORT_SYMBOL vmlinux 0x3925455e eth_validate_addr +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x3995a6e9 sock_no_listen +EXPORT_SYMBOL vmlinux 0x399bb3d7 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39c4ff8e ldc_free_exp_dring +EXPORT_SYMBOL vmlinux 0x39cd6f71 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x39eb6952 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x39f7aaf5 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a8599c3 drm_sysfs_hotplug_event +EXPORT_SYMBOL vmlinux 0x3a9aa54d clear_bit +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa87926 sock_map_fd +EXPORT_SYMBOL vmlinux 0x3ae7b943 blk_fetch_request +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3b3fe8cb prom_getsibling +EXPORT_SYMBOL vmlinux 0x3b61bb89 bio_put +EXPORT_SYMBOL vmlinux 0x3bc17fe3 uart_add_one_port +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3bd42c84 sock_create_kern +EXPORT_SYMBOL vmlinux 0x3beda982 seq_bitmap_list +EXPORT_SYMBOL vmlinux 0x3bf3a0ea drm_get_edid +EXPORT_SYMBOL vmlinux 0x3c284036 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c356f1e atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x3c52e241 km_new_mapping +EXPORT_SYMBOL vmlinux 0x3c72cc76 ldc_alloc_exp_dring +EXPORT_SYMBOL vmlinux 0x3c75dca7 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0x3c90564b splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cc4c47b __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x3cc62e09 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x3cda1da9 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cfbddcd pipe_to_file +EXPORT_SYMBOL vmlinux 0x3d1e3ddc skb_clone +EXPORT_SYMBOL vmlinux 0x3d276214 vio_driver_init +EXPORT_SYMBOL vmlinux 0x3d2eab40 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3db5e73c init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x3e0014fe ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0x3e0b6d20 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x3e2f31fe is_bad_inode +EXPORT_SYMBOL vmlinux 0x3e33ecb8 directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x3e355452 i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e50bddd sysctl_data +EXPORT_SYMBOL vmlinux 0x3e50e420 kmalloc_caches +EXPORT_SYMBOL vmlinux 0x3e6caebd add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x3e6e567f shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x3e8a91fb drm_connector_property_get_value +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3efd9ecb tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x3f0e0f48 get_sb_ns +EXPORT_SYMBOL vmlinux 0x3f0f0684 drm_compat_ioctl +EXPORT_SYMBOL vmlinux 0x3f14f70c qdisc_reset +EXPORT_SYMBOL vmlinux 0x3f364766 nla_put +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5fe9b6 key_revoke +EXPORT_SYMBOL vmlinux 0x3f7187d0 textsearch_prepare +EXPORT_SYMBOL vmlinux 0x3f7bc9fc blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x3f80c63a dev_mc_delete +EXPORT_SYMBOL vmlinux 0x3fa03a97 memset +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3fec54af call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x400dc07f journal_get_create_access +EXPORT_SYMBOL vmlinux 0x402693e0 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x404e6535 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x40651990 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x40a244fd drm_mm_get_block_generic +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x412ddc0c dcache_lock +EXPORT_SYMBOL vmlinux 0x41325d52 key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x41340222 d_instantiate +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41f2f700 kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x41fc28aa bio_clone +EXPORT_SYMBOL vmlinux 0x41fd235a security_file_permission +EXPORT_SYMBOL vmlinux 0x42028ba4 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x425ee391 dev_open +EXPORT_SYMBOL vmlinux 0x425faacb __downgrade_write +EXPORT_SYMBOL vmlinux 0x42a4bdf2 in_egroup_p +EXPORT_SYMBOL vmlinux 0x42a76a8b __dst_free +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42d4d5c6 of_find_node_with_property +EXPORT_SYMBOL vmlinux 0x42eec3b1 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x43766d2d pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x43821bec ida_get_new_above +EXPORT_SYMBOL vmlinux 0x43830fee journal_flush +EXPORT_SYMBOL vmlinux 0x439090b9 kernel_thread +EXPORT_SYMBOL vmlinux 0x43a4938f vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43bea045 auxio_register +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x43ff30cd sg_alloc_table +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44178c33 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x4433b713 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x445adbe7 netdev_state_change +EXPORT_SYMBOL vmlinux 0x447f7e18 sun4v_niagara2_getperf +EXPORT_SYMBOL vmlinux 0x448bd727 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44c214d1 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x44c4456a vfs_llseek +EXPORT_SYMBOL vmlinux 0x44d872a1 per_cpu____cpu_data +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44eba6d0 key_payload_reserve +EXPORT_SYMBOL vmlinux 0x44ec90bf get_sb_nodev +EXPORT_SYMBOL vmlinux 0x44f8f860 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x4517dbfb __serio_register_port +EXPORT_SYMBOL vmlinux 0x4537b2e2 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x453d4cef generic_permission +EXPORT_SYMBOL vmlinux 0x454cbd8e mdesc_release +EXPORT_SYMBOL vmlinux 0x45568bc4 set_irq_chip +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x458d177d neigh_compat_output +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45b99e31 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x45e67c6e new_inode +EXPORT_SYMBOL vmlinux 0x45ef9f1a ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x45f78c1b pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x46720c37 lro_flush_all +EXPORT_SYMBOL vmlinux 0x46b8edf7 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x46ccafc8 block_commit_write +EXPORT_SYMBOL vmlinux 0x46cf40a5 drm_encoder_cleanup +EXPORT_SYMBOL vmlinux 0x46d7632d ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x46ed0437 arp_tbl +EXPORT_SYMBOL vmlinux 0x46ee6e7b vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x4719ba4e kfifo_free +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x476ae434 simple_rmdir +EXPORT_SYMBOL vmlinux 0x479419fa down_read +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47aae912 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x47b68807 cfb_imageblit +EXPORT_SYMBOL vmlinux 0x47be8fcb posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x47dd39f9 tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x47dd8de8 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x480e1871 vmap +EXPORT_SYMBOL vmlinux 0x48132d2a security_path_mknod +EXPORT_SYMBOL vmlinux 0x481ff0e1 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x48332b2e bio_pair_release +EXPORT_SYMBOL vmlinux 0x48458a49 mapping_tagged +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x4867f7ee dma_supported +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x486f54ce ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x48b474ac dentry_unhash +EXPORT_SYMBOL vmlinux 0x48c1d080 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x48d7f2af splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x48dc6ba7 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x48f3e0b9 inode_setattr +EXPORT_SYMBOL vmlinux 0x48f9f12d complete_all +EXPORT_SYMBOL vmlinux 0x490d3ef3 napi_complete +EXPORT_SYMBOL vmlinux 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL vmlinux 0x494792d9 free_buffer_head +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x496348a1 uart_suspend_port +EXPORT_SYMBOL vmlinux 0x4968c271 drm_mode_connector_attach_encoder +EXPORT_SYMBOL vmlinux 0x4972fa55 mac_find_mode +EXPORT_SYMBOL vmlinux 0x4979a597 napi_frags_skb +EXPORT_SYMBOL vmlinux 0x49b1f1e3 thaw_process +EXPORT_SYMBOL vmlinux 0x49d0c952 of_find_node_by_name +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49fa887b drm_vblank_init +EXPORT_SYMBOL vmlinux 0x4a15ae23 prom_node_has_property +EXPORT_SYMBOL vmlinux 0x4a31601e xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a383975 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x4a3a5d6a pci_enable_device +EXPORT_SYMBOL vmlinux 0x4a85b117 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x4a9b7733 drm_idlelock_release +EXPORT_SYMBOL vmlinux 0x4abc8a67 generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4ad09e6a iget_failed +EXPORT_SYMBOL vmlinux 0x4af2ee0c unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x4b2aff74 netlink_unicast +EXPORT_SYMBOL vmlinux 0x4b49e84d generic_readlink +EXPORT_SYMBOL vmlinux 0x4b8edde9 complete_and_exit +EXPORT_SYMBOL vmlinux 0x4b96ab74 input_set_keycode +EXPORT_SYMBOL vmlinux 0x4b9f3684 kfifo_init +EXPORT_SYMBOL vmlinux 0x4ba436f1 nf_ct_attach +EXPORT_SYMBOL vmlinux 0x4baf73b6 generic_ro_fops +EXPORT_SYMBOL vmlinux 0x4bba2dee phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x4bba6ef8 scm_fp_dup +EXPORT_SYMBOL vmlinux 0x4be00f22 phy_detach +EXPORT_SYMBOL vmlinux 0x4bfc3bc6 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1d8b4c of_dev_put +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c6b7a5c vio_conn_reset +EXPORT_SYMBOL vmlinux 0x4c86c2d2 free_task +EXPORT_SYMBOL vmlinux 0x4c8850dc input_unregister_handle +EXPORT_SYMBOL vmlinux 0x4c9d87a7 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x4ca58b15 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cbda2bf prom_setprop +EXPORT_SYMBOL vmlinux 0x4ce277f7 security_d_instantiate +EXPORT_SYMBOL vmlinux 0x4ce788b9 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x4d1f396b journal_force_commit +EXPORT_SYMBOL vmlinux 0x4d4a4920 of_find_property +EXPORT_SYMBOL vmlinux 0x4d670aac __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x4d6bc72e default_llseek +EXPORT_SYMBOL vmlinux 0x4da5c71c per_cpu__kstat +EXPORT_SYMBOL vmlinux 0x4dc3a8fe fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dd02f80 datagram_poll +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4df75ad9 skb_store_bits +EXPORT_SYMBOL vmlinux 0x4e02764c blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x4e0a6eaa journal_ack_err +EXPORT_SYMBOL vmlinux 0x4e11b836 drm_addmap +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e41c847 gen_pool_create +EXPORT_SYMBOL vmlinux 0x4e6a5255 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4ebd5fef tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x4ebd9a36 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x4ed03247 ebus_dma_enable +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4eea762b flush_old_exec +EXPORT_SYMBOL vmlinux 0x4ef81513 drm_lock_free +EXPORT_SYMBOL vmlinux 0x4f0ea0c0 up +EXPORT_SYMBOL vmlinux 0x4f19e411 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0x4f207631 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x4f47da11 __nla_put +EXPORT_SYMBOL vmlinux 0x4f4e783e soft_cursor +EXPORT_SYMBOL vmlinux 0x4f5bd933 simple_link +EXPORT_SYMBOL vmlinux 0x4f9a033d drm_get_resource_start +EXPORT_SYMBOL vmlinux 0x4f9bc2c4 misc_deregister +EXPORT_SYMBOL vmlinux 0x4fce6b21 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x4fd0eff9 netif_device_attach +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fe59cb3 drm_ati_pcigart_init +EXPORT_SYMBOL vmlinux 0x50061a25 proc_dointvec +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x50218b31 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x5069a2ab __brelse +EXPORT_SYMBOL vmlinux 0x50715725 drm_rmmap_locked +EXPORT_SYMBOL vmlinux 0x507f5ce3 drm_mode_destroy +EXPORT_SYMBOL vmlinux 0x50980f3d i2c_master_send +EXPORT_SYMBOL vmlinux 0x509e74e1 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x509f5cc8 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x50d2d80a drm_mm_init +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50e5a48e sunserial_unregister_minors +EXPORT_SYMBOL vmlinux 0x50ea4a1a inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x50f82755 register_console +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x512150cc inet_addr_type +EXPORT_SYMBOL vmlinux 0x51493d94 finish_wait +EXPORT_SYMBOL vmlinux 0x5198da59 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x519cfde3 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x51c9bb25 drm_handle_vblank +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51e0c1f6 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0x51f6c633 flush_signals +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52046e13 atomic_sub +EXPORT_SYMBOL vmlinux 0x520b812c sunserial_console_match +EXPORT_SYMBOL vmlinux 0x52201827 inet_listen +EXPORT_SYMBOL vmlinux 0x5220fb9d skb_tx_hash +EXPORT_SYMBOL vmlinux 0x522aeb0b simple_write_begin +EXPORT_SYMBOL vmlinux 0x52354a0b mutex_trylock +EXPORT_SYMBOL vmlinux 0x5251cae4 prom_getbool +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x52a3fe9d idr_pre_get +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52a8e072 netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x52c1f818 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x52cb821c add_timer +EXPORT_SYMBOL vmlinux 0x52d4708a kern_path +EXPORT_SYMBOL vmlinux 0x52d6efab vfs_readv +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x53028edd security_inode_readlink +EXPORT_SYMBOL vmlinux 0x53155f52 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x5318b3a0 sock_sendmsg +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x53381509 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x533903d8 outsw +EXPORT_SYMBOL vmlinux 0x53633125 xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x537c2a96 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x53821bd3 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x5389af81 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53d4373a drm_property_create +EXPORT_SYMBOL vmlinux 0x5405e5d2 lock_fb_info +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x543501f1 boot_tvec_bases +EXPORT_SYMBOL vmlinux 0x545ce77f dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x545e946d inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x5489e388 pci_clear_master +EXPORT_SYMBOL vmlinux 0x54a1cc86 journal_init_inode +EXPORT_SYMBOL vmlinux 0x54a95cfa setup_arg_pages +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54fc83f2 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0x5507c373 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x550c6960 sock_no_connect +EXPORT_SYMBOL vmlinux 0x551db49d con_is_bound +EXPORT_SYMBOL vmlinux 0x552b32d1 bdi_register +EXPORT_SYMBOL vmlinux 0x55364052 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x554f0a48 groups_alloc +EXPORT_SYMBOL vmlinux 0x556db901 xor_vis_5 +EXPORT_SYMBOL vmlinux 0x557a34bf write_one_page +EXPORT_SYMBOL vmlinux 0x55922ba9 usb_gadget_register_driver +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55a68beb proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x55cd902a ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x55d19cc0 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5601937e ns87303_lock +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x560e8f23 kill_litter_super +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5627c5fd tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x564c40c2 d_find_alias +EXPORT_SYMBOL vmlinux 0x56665a1f generic_file_mmap +EXPORT_SYMBOL vmlinux 0x567d0875 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x568ff739 compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x56cda35a sun4v_niagara2_setperf +EXPORT_SYMBOL vmlinux 0x56d232bc ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x570baa5b drm_release +EXPORT_SYMBOL vmlinux 0x571092d0 seq_lseek +EXPORT_SYMBOL vmlinux 0x5712b649 register_filesystem +EXPORT_SYMBOL vmlinux 0x57261417 set_user_nice +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x57586a43 vc_cons +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x577f4bff do_BUG +EXPORT_SYMBOL vmlinux 0x5785f464 init_net +EXPORT_SYMBOL vmlinux 0x579f9db7 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x57a225f7 ldc_alloc +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57bff3a9 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL vmlinux 0x57cf1bd4 irq_of_parse_and_map +EXPORT_SYMBOL vmlinux 0x57da3194 drm_mode_remove +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57f7c686 sparc64_valid_addr_bitmap +EXPORT_SYMBOL vmlinux 0x582fef16 auxio_set_lte +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x585f903f skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x586c72af pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x5870fe6b __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x5881f201 pci_target_state +EXPORT_SYMBOL vmlinux 0x58884db4 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x58aa465a con_copy_unimap +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c4ae20 input_unregister_handler +EXPORT_SYMBOL vmlinux 0x58dec00e genphy_config_advert +EXPORT_SYMBOL vmlinux 0x58e66d0d rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x58f94152 inode_add_bytes +EXPORT_SYMBOL vmlinux 0x59037eeb put_io_context +EXPORT_SYMBOL vmlinux 0x592a6d07 drm_sysfs_connector_remove +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x5948ffa7 end_page_writeback +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x59606a75 idr_init +EXPORT_SYMBOL vmlinux 0x59704108 handle_sysrq +EXPORT_SYMBOL vmlinux 0x597d29c4 unregister_console +EXPORT_SYMBOL vmlinux 0x598149ff wake_up_process +EXPORT_SYMBOL vmlinux 0x59936124 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x59b3c29d of_device_unregister +EXPORT_SYMBOL vmlinux 0x59d46891 sock_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59f6ee21 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a3a2f66 pci_set_master +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a9163ee pci_dma_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x5a9e8b0b neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x5ac1782d compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x5b3c04f6 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0x5b47032c tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x5b4ebf59 input_inject_event +EXPORT_SYMBOL vmlinux 0x5b67bec5 kick_iocb +EXPORT_SYMBOL vmlinux 0x5b882497 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5baa5800 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x5bc082a2 dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x5bc29a8a dquot_transfer +EXPORT_SYMBOL vmlinux 0x5bc4fe87 flush_dcache_page +EXPORT_SYMBOL vmlinux 0x5c237f63 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0x5c2ce3a7 vfs_rename +EXPORT_SYMBOL vmlinux 0x5c3875b6 key_task_permission +EXPORT_SYMBOL vmlinux 0x5c407fc0 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x5c5a25cd mdiobus_write +EXPORT_SYMBOL vmlinux 0x5c673bc8 tty_mutex +EXPORT_SYMBOL vmlinux 0x5c74759c devm_ioport_map +EXPORT_SYMBOL vmlinux 0x5c7d4c49 drm_mm_takedown +EXPORT_SYMBOL vmlinux 0x5ca4a0a8 dump_fpu +EXPORT_SYMBOL vmlinux 0x5ca87fa7 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5ce487e7 fsync_bdev +EXPORT_SYMBOL vmlinux 0x5ce875cf prom_root_node +EXPORT_SYMBOL vmlinux 0x5cef9260 genphy_resume +EXPORT_SYMBOL vmlinux 0x5cf6e6b9 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d24d862 kthread_bind +EXPORT_SYMBOL vmlinux 0x5d4d0e26 __csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x5d62c101 vio_ldc_free +EXPORT_SYMBOL vmlinux 0x5d950afb lease_get_mtime +EXPORT_SYMBOL vmlinux 0x5da02bfa pci_dev_get +EXPORT_SYMBOL vmlinux 0x5dae54b4 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x5dbbe98e memmove +EXPORT_SYMBOL vmlinux 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL vmlinux 0x5e2acc86 compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x5e3f653e tty_port_hangup +EXPORT_SYMBOL vmlinux 0x5e7ab79f skb_copy +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ec0e2a4 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x5ec8ca85 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5ee0a984 prom_getchild +EXPORT_SYMBOL vmlinux 0x5ee12b9e phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x5ee89f6d textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x5eef5897 drm_put_dev +EXPORT_SYMBOL vmlinux 0x5f03ae3d jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x5f6edf13 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x5fbc6818 skb_checksum +EXPORT_SYMBOL vmlinux 0x5fc29ee4 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x5fea4b45 zero_fill_bio +EXPORT_SYMBOL vmlinux 0x5ff15a0e jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x5fff9786 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x6047c4da gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x604b1d65 cdev_init +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x606579bc simple_empty +EXPORT_SYMBOL vmlinux 0x6067a146 memcpy +EXPORT_SYMBOL vmlinux 0x6069b2e4 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x6083d86e filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x6083e0d4 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60ad27f2 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x60b3e4c0 ipv4_specific +EXPORT_SYMBOL vmlinux 0x60bcac6a xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x60efa0bc __scm_send +EXPORT_SYMBOL vmlinux 0x6117d784 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x61240d43 __sg_free_table +EXPORT_SYMBOL vmlinux 0x6170527d dentry_open +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61a76472 eth_mac_addr +EXPORT_SYMBOL vmlinux 0x61b41a08 unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x61b7a3d2 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61bd0092 arp_broken_ops +EXPORT_SYMBOL vmlinux 0x61c310a1 mpage_readpages +EXPORT_SYMBOL vmlinux 0x622fb764 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0x6234134c jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x6279c215 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62a9293f _clear_page +EXPORT_SYMBOL vmlinux 0x62ae9437 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x62cbcdc2 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x62cc569e cpu_present_mask +EXPORT_SYMBOL vmlinux 0x630175a8 kill_fasync +EXPORT_SYMBOL vmlinux 0x630b390b pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x630bdbfd tcp_close +EXPORT_SYMBOL vmlinux 0x631a5870 skb_put +EXPORT_SYMBOL vmlinux 0x63231891 dst_release +EXPORT_SYMBOL vmlinux 0x634f744a blk_make_request +EXPORT_SYMBOL vmlinux 0x635034c9 drm_do_probe_ddc_edid +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x637350bf filemap_fdatawait +EXPORT_SYMBOL vmlinux 0x637b6512 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x639cceb9 of_release_dev +EXPORT_SYMBOL vmlinux 0x63af9faf bio_map_user +EXPORT_SYMBOL vmlinux 0x63d887e0 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x6405b73c dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x6406482d pci_iomap +EXPORT_SYMBOL vmlinux 0x640adb9e inode_get_bytes +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x649d907d blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x64b4b8d4 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x64e15db0 drm_vblank_post_modeset +EXPORT_SYMBOL vmlinux 0x64ee7b45 ida_remove +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x657bc782 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x65814dcd blk_end_request_all +EXPORT_SYMBOL vmlinux 0x6586acaa genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x6589fee8 xfrm_input +EXPORT_SYMBOL vmlinux 0x658dc137 drm_getsarea +EXPORT_SYMBOL vmlinux 0x6596ecd5 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x65b0a97e _PAGE_IE +EXPORT_SYMBOL vmlinux 0x65b86512 journal_errno +EXPORT_SYMBOL vmlinux 0x65e3c845 default_file_splice_read +EXPORT_SYMBOL vmlinux 0x65e75e3d neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x66045d27 genphy_update_link +EXPORT_SYMBOL vmlinux 0x662e4429 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x664f2832 submit_bio +EXPORT_SYMBOL vmlinux 0x66846e0f skb_queue_purge +EXPORT_SYMBOL vmlinux 0x668bf865 seq_write +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x668ddca1 gen_pool_add +EXPORT_SYMBOL vmlinux 0x6692c99f ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x669817e9 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x66cae227 stop_a_enabled +EXPORT_SYMBOL vmlinux 0x66dfa4c5 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x66e1c06f phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x67be1d3d cpu_active_mask +EXPORT_SYMBOL vmlinux 0x67c429c0 elv_queue_empty +EXPORT_SYMBOL vmlinux 0x67d10223 security_path_link +EXPORT_SYMBOL vmlinux 0x67ed6fe3 napi_gro_receive +EXPORT_SYMBOL vmlinux 0x67f2cee5 udp_table +EXPORT_SYMBOL vmlinux 0x68208fac ldc_map_sg +EXPORT_SYMBOL vmlinux 0x683003b1 blk_put_request +EXPORT_SYMBOL vmlinux 0x68307e2b sock_no_mmap +EXPORT_SYMBOL vmlinux 0x683cf40b arp_create +EXPORT_SYMBOL vmlinux 0x68442c4f mem_map +EXPORT_SYMBOL vmlinux 0x68513a77 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x6855b3b5 journal_clear_err +EXPORT_SYMBOL vmlinux 0x6863ee1c bd_set_size +EXPORT_SYMBOL vmlinux 0x68821f71 compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x68899126 ldc_copy +EXPORT_SYMBOL vmlinux 0x68fb74ca timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x68fcec64 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x69010b06 insw +EXPORT_SYMBOL vmlinux 0x693bdfad inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x694f6911 iput +EXPORT_SYMBOL vmlinux 0x696822ae neigh_table_clear +EXPORT_SYMBOL vmlinux 0x696fb409 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x69779789 pci_fixup_device +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x6984db74 mdesc_get_property +EXPORT_SYMBOL vmlinux 0x69856e34 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d37025 atomic64_sub_ret +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a0d75e3 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x6a247672 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x6a3533c4 vio_port_up +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a7839ee drm_vblank_off +EXPORT_SYMBOL vmlinux 0x6a859770 xfrm_lookup +EXPORT_SYMBOL vmlinux 0x6a8dee5c pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x6a8e54e7 da903x_query_status +EXPORT_SYMBOL vmlinux 0x6ab07fd6 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x6aba7bd8 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6af721da drm_connector_cleanup +EXPORT_SYMBOL vmlinux 0x6afadc39 journal_release_buffer +EXPORT_SYMBOL vmlinux 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b271cb2 simple_pin_fs +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b43648f __bread +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b5668fa abort_creds +EXPORT_SYMBOL vmlinux 0x6b921410 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x6bb7cbca tc_classify_compat +EXPORT_SYMBOL vmlinux 0x6bbc0b2a proc_mkdir +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bc76843 ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x6bcb120d register_exec_domain +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6c26947f kmem_cache_name +EXPORT_SYMBOL vmlinux 0x6c34a101 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x6c36a5c1 __mutex_init +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c66bc57 dev_load +EXPORT_SYMBOL vmlinux 0x6c67b8ce tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c778597 inet_frags_init +EXPORT_SYMBOL vmlinux 0x6c930c20 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x6ca94560 mb_cache_create +EXPORT_SYMBOL vmlinux 0x6cad3d03 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x6ce3cedc ldc_connect +EXPORT_SYMBOL vmlinux 0x6d0aba57 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x6d0e3039 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x6d273585 generic_listxattr +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6da508d3 rwsem_wake +EXPORT_SYMBOL vmlinux 0x6ddc7c63 pci_dev_driver +EXPORT_SYMBOL vmlinux 0x6de375c1 xor_niagara_5 +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e092b17 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x6e2cd1b1 register_con_driver +EXPORT_SYMBOL vmlinux 0x6e37ff9d ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x6e489566 vfs_mknod +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e774980 do_sync_read +EXPORT_SYMBOL vmlinux 0x6e8758fa task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x6e942678 blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6eb07498 names_cachep +EXPORT_SYMBOL vmlinux 0x6ec4081e pci_choose_state +EXPORT_SYMBOL vmlinux 0x6ed94417 atomic64_add +EXPORT_SYMBOL vmlinux 0x6f178276 __devm_request_region +EXPORT_SYMBOL vmlinux 0x6f565bd9 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x6f67babf xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x6f70588f jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x6f8d987d of_find_device_by_node +EXPORT_SYMBOL vmlinux 0x6f9ed6ed simple_dir_operations +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x700d4dcd tty_register_driver +EXPORT_SYMBOL vmlinux 0x70289758 of_get_property +EXPORT_SYMBOL vmlinux 0x702f162c __memscan_generic +EXPORT_SYMBOL vmlinux 0x702febff blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x7052569d path_lookup +EXPORT_SYMBOL vmlinux 0x70536ca7 clear_user_page +EXPORT_SYMBOL vmlinux 0x706807f0 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x70765d1c vfs_lstat +EXPORT_SYMBOL vmlinux 0x7081f926 drm_sg_alloc +EXPORT_SYMBOL vmlinux 0x70a6c72a phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x70b5a794 ldc_write +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70cd39b2 alloc_disk +EXPORT_SYMBOL vmlinux 0x70e38c33 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x70e65366 sock_rfree +EXPORT_SYMBOL vmlinux 0x7125e0f5 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x712730a7 __flushw_user +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x715ad997 of_find_compatible_node +EXPORT_SYMBOL vmlinux 0x7164a78d ldc_free +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71811287 freeze_bdev +EXPORT_SYMBOL vmlinux 0x719fb48d bio_kmalloc +EXPORT_SYMBOL vmlinux 0x71a0ec82 of_match_device +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71a6e8ca generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x71b07167 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x71bc75ca tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x71c02438 sg_next +EXPORT_SYMBOL vmlinux 0x71d68b9e sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x71d7a4b4 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x71da9f29 dev_trans_start +EXPORT_SYMBOL vmlinux 0x71e5f2a0 of_find_node_by_phandle +EXPORT_SYMBOL vmlinux 0x71f5b780 fasync_helper +EXPORT_SYMBOL vmlinux 0x72000bdb of_set_property_mutex +EXPORT_SYMBOL vmlinux 0x7205e05e of_find_matching_node +EXPORT_SYMBOL vmlinux 0x7216d6cb con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x722d3b9f put_disk +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x7251260b follow_pfn +EXPORT_SYMBOL vmlinux 0x726e4be3 journal_load +EXPORT_SYMBOL vmlinux 0x7276aa73 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x72989719 bio_free +EXPORT_SYMBOL vmlinux 0x72b3487b tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72c55b20 drm_helper_hotplug_stage_two +EXPORT_SYMBOL vmlinux 0x72d5af61 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x732938fb bio_integrity_split +EXPORT_SYMBOL vmlinux 0x73588a4b unregister_nls +EXPORT_SYMBOL vmlinux 0x7380d11a __napi_complete +EXPORT_SYMBOL vmlinux 0x738f11d9 drm_property_destroy +EXPORT_SYMBOL vmlinux 0x73a53ad8 pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x73bc0084 kernel_accept +EXPORT_SYMBOL vmlinux 0x73e0877a insl +EXPORT_SYMBOL vmlinux 0x7402d6d7 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x741538dd ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7454038d i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x7468639b __pci_register_driver +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x749b21fe remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0x749b5949 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x749c19ea km_query +EXPORT_SYMBOL vmlinux 0x74e7250a skb_over_panic +EXPORT_SYMBOL vmlinux 0x74f4b98e gen_pool_free +EXPORT_SYMBOL vmlinux 0x74facaa8 register_key_type +EXPORT_SYMBOL vmlinux 0x7526ed7e load_nls +EXPORT_SYMBOL vmlinux 0x753b449f filp_open +EXPORT_SYMBOL vmlinux 0x755abea2 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x757c31cd blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x757e9de9 get_phy_id +EXPORT_SYMBOL vmlinux 0x7582a842 pci_remove_bus +EXPORT_SYMBOL vmlinux 0x75a9590d serio_reconnect +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75f7e514 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x7611b956 tty_free_termios +EXPORT_SYMBOL vmlinux 0x76465568 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x76502599 check_disk_change +EXPORT_SYMBOL vmlinux 0x765f08db bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x7674c66f dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x767e7a3b mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x7689d28d jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x769b8326 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x76a296c8 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL vmlinux 0x76b91077 tcp_prot +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76ca16ee misc_register +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x77079099 ldc_unmap +EXPORT_SYMBOL vmlinux 0x773c6f79 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0x773fef24 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x774ffda8 tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x775b1478 ldc_disconnect +EXPORT_SYMBOL vmlinux 0x775eae53 nf_register_hooks +EXPORT_SYMBOL vmlinux 0x777df3f6 seq_release_private +EXPORT_SYMBOL vmlinux 0x7782f5d9 drm_irq_install +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x785eb08e netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x78942f79 disk_stack_limits +EXPORT_SYMBOL vmlinux 0x78952a6f dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x78c53095 __ip_select_ident +EXPORT_SYMBOL vmlinux 0x78cf4a60 of_mdiobus_register +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78e2482f pci_dma_supported +EXPORT_SYMBOL vmlinux 0x7920e48e replace_mount_options +EXPORT_SYMBOL vmlinux 0x7938fb76 security_path_mkdir +EXPORT_SYMBOL vmlinux 0x79600d4a wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x798d6407 register_netdev +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79b17bba dma_pool_free +EXPORT_SYMBOL vmlinux 0x79d070a6 proto_register +EXPORT_SYMBOL vmlinux 0x79e384ca skb_dequeue +EXPORT_SYMBOL vmlinux 0x7a26e36d blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a431b5a of_device_is_compatible +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a6c40cb vfs_follow_link +EXPORT_SYMBOL vmlinux 0x7a803f04 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x7a9da0f7 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7afded91 iget_locked +EXPORT_SYMBOL vmlinux 0x7b00d83a start_tty +EXPORT_SYMBOL vmlinux 0x7b0a3c40 unlock_buffer +EXPORT_SYMBOL vmlinux 0x7b24c478 register_quota_format +EXPORT_SYMBOL vmlinux 0x7b317932 pci_request_region +EXPORT_SYMBOL vmlinux 0x7b822dad inode_needs_sync +EXPORT_SYMBOL vmlinux 0x7b8d07a2 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7ba30ecd remove_proc_entry +EXPORT_SYMBOL vmlinux 0x7baeddd6 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x7bcf4f33 put_mnt_ns +EXPORT_SYMBOL vmlinux 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c1d3100 of_device_register +EXPORT_SYMBOL vmlinux 0x7c26d20a i2c_register_driver +EXPORT_SYMBOL vmlinux 0x7c31842b find_lock_page +EXPORT_SYMBOL vmlinux 0x7c3af138 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x7c3b4b6b sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x7c40641c __neigh_event_send +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c70db62 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x7c85eb5c override_creds +EXPORT_SYMBOL vmlinux 0x7c86b799 sk_dst_check +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7cb43c5e netif_rx +EXPORT_SYMBOL vmlinux 0x7ccaad01 pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x7cd3658c pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x7cd641da invalidate_inodes +EXPORT_SYMBOL vmlinux 0x7cdd4236 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d2fffab tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x7d790f9f generic_write_checks +EXPORT_SYMBOL vmlinux 0x7d7ee970 get_empty_filp +EXPORT_SYMBOL vmlinux 0x7d82a884 block_truncate_page +EXPORT_SYMBOL vmlinux 0x7d8f85cb input_filter_device +EXPORT_SYMBOL vmlinux 0x7d958a56 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x7d98a132 drm_helper_disable_unused_functions +EXPORT_SYMBOL vmlinux 0x7da042d2 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x7daa016c sock_wmalloc +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7dffc451 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x7e022127 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0x7e0d8fde pci_get_slot +EXPORT_SYMBOL vmlinux 0x7e1000b9 drm_mm_clean +EXPORT_SYMBOL vmlinux 0x7e51cd57 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x7e645604 pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e90b7d2 of_match_node +EXPORT_SYMBOL vmlinux 0x7ea6c5f1 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7ef91291 d_add_ci +EXPORT_SYMBOL vmlinux 0x7f09a24f drm_poll +EXPORT_SYMBOL vmlinux 0x7f1d5aa5 __serio_register_driver +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f311b44 journal_update_format +EXPORT_SYMBOL vmlinux 0x7f47d5fe get_sb_bdev +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f8f8efd journal_check_available_features +EXPORT_SYMBOL vmlinux 0x7fae842b rtnl_notify +EXPORT_SYMBOL vmlinux 0x7faea93c register_sysrq_key +EXPORT_SYMBOL vmlinux 0x7fbd49db of_n_addr_cells +EXPORT_SYMBOL vmlinux 0x7fd86854 journal_dirty_data +EXPORT_SYMBOL vmlinux 0x7ff568a8 module_put +EXPORT_SYMBOL vmlinux 0x80054ad3 drm_mode_validate_clocks +EXPORT_SYMBOL vmlinux 0x8008a752 phy_device_register +EXPORT_SYMBOL vmlinux 0x8011297e pskb_expand_head +EXPORT_SYMBOL vmlinux 0x804ad991 blkdev_put +EXPORT_SYMBOL vmlinux 0x804fea01 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x8055d991 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x80732317 key_put +EXPORT_SYMBOL vmlinux 0x807b7089 prom_firstprop +EXPORT_SYMBOL vmlinux 0x8085c7b1 prepare_to_wait +EXPORT_SYMBOL vmlinux 0x809b2602 take_over_console +EXPORT_SYMBOL vmlinux 0x80a17f34 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x80b34843 inode_permission +EXPORT_SYMBOL vmlinux 0x80b7a6d8 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x80bef7ff inet_ioctl +EXPORT_SYMBOL vmlinux 0x80bf3bc5 sun4v_niagara_getperf +EXPORT_SYMBOL vmlinux 0x80c11de8 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x810efaa0 blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x811f0beb nf_hook_slow +EXPORT_SYMBOL vmlinux 0x81209242 generic_setxattr +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x8169d801 generic_read_dir +EXPORT_SYMBOL vmlinux 0x817b1b63 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x81824d78 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x818edf5f __page_symlink +EXPORT_SYMBOL vmlinux 0x818ee9dc pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x8194b906 blk_rq_init +EXPORT_SYMBOL vmlinux 0x81b1239c install_exec_creds +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x8212deb8 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x82498fd1 simple_write_end +EXPORT_SYMBOL vmlinux 0x824d3880 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x825e1472 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x8262f64b tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x8268a47a lookup_one_len +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826a026b km_report +EXPORT_SYMBOL vmlinux 0x8292d4a9 nf_log_unregister +EXPORT_SYMBOL vmlinux 0x82a492d5 dqput +EXPORT_SYMBOL vmlinux 0x82b52cb7 textsearch_destroy +EXPORT_SYMBOL vmlinux 0x82b5301d fb_get_mode +EXPORT_SYMBOL vmlinux 0x82bc79ac input_register_handle +EXPORT_SYMBOL vmlinux 0x82d41859 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x82ffc216 inet_put_port +EXPORT_SYMBOL vmlinux 0x8308881b register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x8308e69e serio_unregister_port +EXPORT_SYMBOL vmlinux 0x83303255 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83bf9c53 seq_escape +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83e1bf67 simple_unlink +EXPORT_SYMBOL vmlinux 0x83f3ac53 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x83f3d724 sbusfb_compat_ioctl +EXPORT_SYMBOL vmlinux 0x84382e89 pci_find_bus +EXPORT_SYMBOL vmlinux 0x843873ec i2c_transfer +EXPORT_SYMBOL vmlinux 0x844f6354 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x847bb8b3 sync_page_range +EXPORT_SYMBOL vmlinux 0x849f39d3 kernel_listen +EXPORT_SYMBOL vmlinux 0x84d8b7ac blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x84ddc2da sock_init_data +EXPORT_SYMBOL vmlinux 0x85017132 sock_wfree +EXPORT_SYMBOL vmlinux 0x850fde91 register_framebuffer +EXPORT_SYMBOL vmlinux 0x852e477f input_open_device +EXPORT_SYMBOL vmlinux 0x853a9464 cont_write_begin +EXPORT_SYMBOL vmlinux 0x85533349 compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x855e4b17 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x85668875 bd_claim +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x856a3446 journal_stop +EXPORT_SYMBOL vmlinux 0x858b7e9e netlink_ack +EXPORT_SYMBOL vmlinux 0x859c5db7 phy_register_fixup +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85fe4171 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x860a0078 unlock_page +EXPORT_SYMBOL vmlinux 0x862c5466 drm_core_ioremap +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x86682b52 drm_crtc_helper_set_config +EXPORT_SYMBOL vmlinux 0x866e1e7c locks_copy_lock +EXPORT_SYMBOL vmlinux 0x867b5f62 find_or_create_page +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x869f739a blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x86b06183 tty_vhangup +EXPORT_SYMBOL vmlinux 0x86c7146d vfs_fstat +EXPORT_SYMBOL vmlinux 0x86cb7e87 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x86ce6e8c sockfd_lookup +EXPORT_SYMBOL vmlinux 0x86cf7a01 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x86e776b4 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x8717d861 ilookup5 +EXPORT_SYMBOL vmlinux 0x87198f96 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x872927b8 down_timeout +EXPORT_SYMBOL vmlinux 0x872bd087 suncore_mouse_baud_detection +EXPORT_SYMBOL vmlinux 0x875f0f13 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x876de8be set_security_override +EXPORT_SYMBOL vmlinux 0x876e95dc of_parse_phandle +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87a7d724 of_get_parent +EXPORT_SYMBOL vmlinux 0x87b710bd fb_pan_display +EXPORT_SYMBOL vmlinux 0x87ec1860 vfs_unlink +EXPORT_SYMBOL vmlinux 0x880a9691 user_path_at +EXPORT_SYMBOL vmlinux 0x880caff5 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x8831efa7 skb_queue_head +EXPORT_SYMBOL vmlinux 0x883b24fb sun4v_niagara_setperf +EXPORT_SYMBOL vmlinux 0x883d4a36 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x885e37c7 vc_resize +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x8881a4be drm_mode_prune_invalid +EXPORT_SYMBOL vmlinux 0x88c8de43 skb_pad +EXPORT_SYMBOL vmlinux 0x88ddd230 ilookup +EXPORT_SYMBOL vmlinux 0x88df6544 dquot_alloc +EXPORT_SYMBOL vmlinux 0x8902f1af of_console_path +EXPORT_SYMBOL vmlinux 0x8919a2c6 vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x891e32b8 wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0x896484b7 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x896be114 udplite_prot +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x899b004c filp_close +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89f2645f mdiobus_register +EXPORT_SYMBOL vmlinux 0x89fe5a90 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a36f8d8 put_page +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab4b373 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8b0403e6 prom_getproperty +EXPORT_SYMBOL vmlinux 0x8b1e6143 of_get_next_child +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b772895 inet_accept +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8b84ee90 d_obtain_alias +EXPORT_SYMBOL vmlinux 0x8b8c23c5 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x8b922c0f __strnlen_user +EXPORT_SYMBOL vmlinux 0x8b98c41b inode_init_always +EXPORT_SYMBOL vmlinux 0x8bab83a1 seq_open_private +EXPORT_SYMBOL vmlinux 0x8babc02d f_setown +EXPORT_SYMBOL vmlinux 0x8bc469d9 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8beeb77e in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x8bf87169 __bzero +EXPORT_SYMBOL vmlinux 0x8c0bb843 fb_show_logo +EXPORT_SYMBOL vmlinux 0x8c146452 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x8c3ebc72 saved_command_line +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c545876 follow_down +EXPORT_SYMBOL vmlinux 0x8c672b3c do_truncate +EXPORT_SYMBOL vmlinux 0x8c689170 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x8c7b02b9 simple_statfs +EXPORT_SYMBOL vmlinux 0x8c84e402 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x8c9aa902 vfs_create +EXPORT_SYMBOL vmlinux 0x8cb1f52e skb_find_text +EXPORT_SYMBOL vmlinux 0x8cb92126 register_chrdev +EXPORT_SYMBOL vmlinux 0x8cd15381 arp_find +EXPORT_SYMBOL vmlinux 0x8ce95b2d neigh_table_init +EXPORT_SYMBOL vmlinux 0x8cfcbebc drm_framebuffer_cleanup +EXPORT_SYMBOL vmlinux 0x8d03f3c1 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x8d054733 tty_shutdown +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4299cf drm_mode_height +EXPORT_SYMBOL vmlinux 0x8d43f2ac pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0x8d50d064 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d5642fc wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0x8d602ebb sget +EXPORT_SYMBOL vmlinux 0x8d70de91 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x8d720a34 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x8d7e4989 sock_i_ino +EXPORT_SYMBOL vmlinux 0x8d7e8316 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x8d935bdc load_nls_default +EXPORT_SYMBOL vmlinux 0x8d93a059 devm_free_irq +EXPORT_SYMBOL vmlinux 0x8db9b741 simple_fill_super +EXPORT_SYMBOL vmlinux 0x8dbd8ca2 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x8dfbee21 stop_tty +EXPORT_SYMBOL vmlinux 0x8dfc6ddf kmem_cache_create +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e879bb7 __vmalloc +EXPORT_SYMBOL vmlinux 0x8ed91b1d deactivate_super +EXPORT_SYMBOL vmlinux 0x8edbf87c bh_submit_read +EXPORT_SYMBOL vmlinux 0x8f07d8ca __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8f1da288 set_groups +EXPORT_SYMBOL vmlinux 0x8f2761d2 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x8f2d28f2 __free_pages +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f787ce7 kobject_set_name +EXPORT_SYMBOL vmlinux 0x8f91501c d_move +EXPORT_SYMBOL vmlinux 0x8f9b86b2 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x8fbab7a7 notify_change +EXPORT_SYMBOL vmlinux 0x8fd3bc04 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x8ff2d025 drm_mode_connector_detach_encoder +EXPORT_SYMBOL vmlinux 0x8ff749de nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x90225e67 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x90367949 create_empty_buffers +EXPORT_SYMBOL vmlinux 0x903861fd pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x904aa3f0 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x90516656 idr_for_each +EXPORT_SYMBOL vmlinux 0x90524b24 of_console_device +EXPORT_SYMBOL vmlinux 0x90606b8d rtnl_create_link +EXPORT_SYMBOL vmlinux 0x908e5ac0 drm_gem_vm_open +EXPORT_SYMBOL vmlinux 0x908f35ce loop_register_transfer +EXPORT_SYMBOL vmlinux 0x90cdd52c security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x90dd58c5 request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x90eedd79 sk_free +EXPORT_SYMBOL vmlinux 0x9117a881 prom_getstring +EXPORT_SYMBOL vmlinux 0x914645f3 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x917533a8 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x919da64c inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x91a9e375 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x91ec6ee1 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x91ed5b2c fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x91f88e8f netpoll_poll +EXPORT_SYMBOL vmlinux 0x91f9cca2 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x92009117 blk_peek_request +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921f4390 atomic_add +EXPORT_SYMBOL vmlinux 0x922da99c xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x922e4049 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x92312087 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x925474b5 drm_crtc_init +EXPORT_SYMBOL vmlinux 0x92764daf drm_gem_vm_close +EXPORT_SYMBOL vmlinux 0x9278af08 search_binary_handler +EXPORT_SYMBOL vmlinux 0x92dd7179 of_phy_find_device +EXPORT_SYMBOL vmlinux 0x92df5c06 pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x92ed0d78 drm_fasync +EXPORT_SYMBOL vmlinux 0x93065c52 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x932bd423 idr_remove +EXPORT_SYMBOL vmlinux 0x93526093 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0x9367434c sk_filter +EXPORT_SYMBOL vmlinux 0x93937bd6 pci_set_power_state +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93e2cdf6 tty_check_change +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x94156a51 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x9423ae4e skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x9430106e udp_prot +EXPORT_SYMBOL vmlinux 0x9443289e set_bit +EXPORT_SYMBOL vmlinux 0x9443f60a get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x94772bd4 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94f10d8d fb_set_var +EXPORT_SYMBOL vmlinux 0x94f7be21 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x9501d078 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x95067396 secpath_dup +EXPORT_SYMBOL vmlinux 0x950b0b51 test_and_set_bit +EXPORT_SYMBOL vmlinux 0x950cdebf drm_core_reclaim_buffers +EXPORT_SYMBOL vmlinux 0x952c5642 tcp_poll +EXPORT_SYMBOL vmlinux 0x9534abd5 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x953ff552 ps2_init +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954be922 udp_disconnect +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x957b383a bioset_free +EXPORT_SYMBOL vmlinux 0x958fddc1 __bforget +EXPORT_SYMBOL vmlinux 0x9591a9bc vio_ldc_alloc +EXPORT_SYMBOL vmlinux 0x95af1c7b vfs_quota_on +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x95d19196 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x95d66ca4 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x95e38708 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x9608f69a pci_map_sg +EXPORT_SYMBOL vmlinux 0x9609fd2d fddi_type_trans +EXPORT_SYMBOL vmlinux 0x9624c0dd serio_close +EXPORT_SYMBOL vmlinux 0x965e8165 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x965ee8d8 __elv_add_request +EXPORT_SYMBOL vmlinux 0x9683a1e2 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x968d304f journal_init_dev +EXPORT_SYMBOL vmlinux 0x96a1b502 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x96af809a redraw_screen +EXPORT_SYMBOL vmlinux 0x96d99a05 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x96f76611 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x970ec99f dquot_commit +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x97632678 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x977ea791 neigh_update +EXPORT_SYMBOL vmlinux 0x9793ab24 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x97ba2edf gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x97ce75be sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x97dd2b51 __nla_reserve +EXPORT_SYMBOL vmlinux 0x97e1bc56 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x981af77e ip_ct_attach +EXPORT_SYMBOL vmlinux 0x9826a51e mark_page_accessed +EXPORT_SYMBOL vmlinux 0x98386c32 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x9839169f blk_recount_segments +EXPORT_SYMBOL vmlinux 0x984d096a bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x985b37f8 phy_device_create +EXPORT_SYMBOL vmlinux 0x9860961e uart_get_divisor +EXPORT_SYMBOL vmlinux 0x9866c2dd pci_pme_capable +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x9872d116 cmos_regs +EXPORT_SYMBOL vmlinux 0x987b8f68 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x98a7c857 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x98ba6df3 vio_unregister_driver +EXPORT_SYMBOL vmlinux 0x98db9b57 revert_creds +EXPORT_SYMBOL vmlinux 0x99020969 generic_fillattr +EXPORT_SYMBOL vmlinux 0x9907a6fe vfs_fsync +EXPORT_SYMBOL vmlinux 0x990df8e0 vio_send_sid +EXPORT_SYMBOL vmlinux 0x9918a4c7 unlock_super +EXPORT_SYMBOL vmlinux 0x99402e56 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x99558ca0 __blk_end_request +EXPORT_SYMBOL vmlinux 0x997f707f ida_pre_get +EXPORT_SYMBOL vmlinux 0x998c1971 proto_unregister +EXPORT_SYMBOL vmlinux 0x998daab9 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x99958da0 netif_napi_del +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x99f4c748 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x9a10dddd phy_driver_register +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a2b755d pagevec_lookup +EXPORT_SYMBOL vmlinux 0x9a4ce684 tty_set_operations +EXPORT_SYMBOL vmlinux 0x9a516c18 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x9a85fe63 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9aacd62b prom_getintdefault +EXPORT_SYMBOL vmlinux 0x9ad94db1 __getblk +EXPORT_SYMBOL vmlinux 0x9ade1494 seq_bitmap +EXPORT_SYMBOL vmlinux 0x9b0facf1 io_remap_pfn_range +EXPORT_SYMBOL vmlinux 0x9b18002b sg_miter_start +EXPORT_SYMBOL vmlinux 0x9b2269f3 eth_type_trans +EXPORT_SYMBOL vmlinux 0x9b312124 locks_remove_posix +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b3e7310 drm_irq_uninstall +EXPORT_SYMBOL vmlinux 0x9b4a8ba9 of_set_property +EXPORT_SYMBOL vmlinux 0x9b7fcfdc drm_pci_alloc +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c436938 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x9c4d304a pci_map_single +EXPORT_SYMBOL vmlinux 0x9c5834a9 rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9cad13ab proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cbbdec9 dquot_free_space +EXPORT_SYMBOL vmlinux 0x9cbd8970 try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x9cc4ba07 __down_read_trylock +EXPORT_SYMBOL vmlinux 0x9cd2abf1 skb_queue_tail +EXPORT_SYMBOL vmlinux 0x9d0bc167 simple_rename +EXPORT_SYMBOL vmlinux 0x9d14d38d save_mount_options +EXPORT_SYMBOL vmlinux 0x9d1c97fe pcim_enable_device +EXPORT_SYMBOL vmlinux 0x9d28fa42 netlink_dump_start +EXPORT_SYMBOL vmlinux 0x9d609b7b pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x9d8c4519 compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9db37875 change_bit +EXPORT_SYMBOL vmlinux 0x9dbcb760 tcf_exts_change +EXPORT_SYMBOL vmlinux 0x9dbdb441 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0x9de002d8 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x9e13e79e phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x9e1c86b0 tcf_register_action +EXPORT_SYMBOL vmlinux 0x9e335520 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x9e3e31e8 mntput_no_expire +EXPORT_SYMBOL vmlinux 0x9e3fb378 sysctl_intvec +EXPORT_SYMBOL vmlinux 0x9e4a3ca9 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x9e6789f2 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x9e771285 _PAGE_E +EXPORT_SYMBOL vmlinux 0x9e943307 drm_mode_create_dithering_property +EXPORT_SYMBOL vmlinux 0x9e9f0389 blk_plug_device +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea26c4c down_write_trylock +EXPORT_SYMBOL vmlinux 0x9ea30227 tcf_em_register +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef6a614 kernel_getsockname +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9eff9af7 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f5b8e54 eth_header_parse +EXPORT_SYMBOL vmlinux 0x9f6e06c8 input_release_device +EXPORT_SYMBOL vmlinux 0x9f842a5d drm_gem_object_alloc +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa325c0 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x9fca6de0 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x9fd2905c nf_log_register +EXPORT_SYMBOL vmlinux 0x9fd9390d __devm_release_region +EXPORT_SYMBOL vmlinux 0xa0053c55 inet_select_addr +EXPORT_SYMBOL vmlinux 0xa02b3cb0 generic_show_options +EXPORT_SYMBOL vmlinux 0xa02f6000 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0xa031de34 tcp_make_synack +EXPORT_SYMBOL vmlinux 0xa033d05a up_read +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa05db549 tty_port_init +EXPORT_SYMBOL vmlinux 0xa07a8d22 sleep_on +EXPORT_SYMBOL vmlinux 0xa07b4b3f sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xa0a53967 drm_mode_probed_add +EXPORT_SYMBOL vmlinux 0xa0ab4aba udp_ioctl +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0d4dba0 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0xa0d5e5e7 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0xa0ebb2ba _PAGE_CACHE +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa1164eea km_policy_notify +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa13bb374 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0xa173a3f2 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0xa17919a6 dquot_initialize +EXPORT_SYMBOL vmlinux 0xa187e278 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xa18cdd6f drm_idlelock_take +EXPORT_SYMBOL vmlinux 0xa19d9108 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1c37ef4 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1d43821 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xa1e5da6d serio_interrupt +EXPORT_SYMBOL vmlinux 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL vmlinux 0xa1f33c2a pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xa206b570 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa218bf61 complete +EXPORT_SYMBOL vmlinux 0xa22e9516 simple_lookup +EXPORT_SYMBOL vmlinux 0xa267e7c2 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0xa2867e4a journal_destroy +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2a76d93 drm_debugfs_remove_files +EXPORT_SYMBOL vmlinux 0xa2dfef89 seq_puts +EXPORT_SYMBOL vmlinux 0xa2e5621e bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xa2f305f1 ether_setup +EXPORT_SYMBOL vmlinux 0xa30f9814 phy_attach +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa34a4aa7 ___copy_to_user +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa36b684c pci_free_consistent +EXPORT_SYMBOL vmlinux 0xa3980cb6 drm_mode_connector_update_edid_property +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa3a4ed03 cond_resched_lock +EXPORT_SYMBOL vmlinux 0xa3a750e6 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xa3afafb4 eth_change_mtu +EXPORT_SYMBOL vmlinux 0xa4071508 cdev_alloc +EXPORT_SYMBOL vmlinux 0xa4253b13 mnt_pin +EXPORT_SYMBOL vmlinux 0xa444111b ebus_dma_unregister +EXPORT_SYMBOL vmlinux 0xa44799aa file_fsync +EXPORT_SYMBOL vmlinux 0xa461e5b1 send_sig_info +EXPORT_SYMBOL vmlinux 0xa497ebbd rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0xa4ab43ca create_mnt_ns +EXPORT_SYMBOL vmlinux 0xa4b967b4 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0xa4bcf54c drm_ati_pcigart_cleanup +EXPORT_SYMBOL vmlinux 0xa4f26bd4 xfrm_init_state +EXPORT_SYMBOL vmlinux 0xa516fbeb journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xa5299652 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0xa56ec366 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0xa576c263 generic_find_next_le_bit +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa582392f phy_start +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa59e3b7c seq_read +EXPORT_SYMBOL vmlinux 0xa5baea48 compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0xa5ca2c7c drm_mode_detachmode_crtc +EXPORT_SYMBOL vmlinux 0xa5e68673 tlb_type +EXPORT_SYMBOL vmlinux 0xa61368a5 drm_helper_crtc_in_use +EXPORT_SYMBOL vmlinux 0xa6328ed2 set_blocksize +EXPORT_SYMBOL vmlinux 0xa636b5a2 simple_release_fs +EXPORT_SYMBOL vmlinux 0xa645e5a3 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0xa646cb00 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xa65038af dev_get_by_index +EXPORT_SYMBOL vmlinux 0xa6567444 drm_connector_init +EXPORT_SYMBOL vmlinux 0xa65c025b vfs_symlink +EXPORT_SYMBOL vmlinux 0xa678a009 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0xa67fe0c8 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6935664 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0xa6a2de2c registered_fb +EXPORT_SYMBOL vmlinux 0xa6c0ac31 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa70dc62c tcp_tso_segment +EXPORT_SYMBOL vmlinux 0xa7169591 tty_port_close_start +EXPORT_SYMBOL vmlinux 0xa7175cec netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0xa71f8280 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xa74dc0a7 dev_gro_receive +EXPORT_SYMBOL vmlinux 0xa76bfd99 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xa77992fe wireless_send_event +EXPORT_SYMBOL vmlinux 0xa79d900e jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xa7b17781 simple_set_mnt +EXPORT_SYMBOL vmlinux 0xa7bce8f5 nf_setsockopt +EXPORT_SYMBOL vmlinux 0xa7d6d6e9 locks_init_lock +EXPORT_SYMBOL vmlinux 0xa80ae097 bio_unmap_user +EXPORT_SYMBOL vmlinux 0xa839685f __scm_destroy +EXPORT_SYMBOL vmlinux 0xa84a4ec8 skb_recycle_check +EXPORT_SYMBOL vmlinux 0xa866a512 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0xa88424bf generic_write_end +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa88c4ca6 elevator_exit +EXPORT_SYMBOL vmlinux 0xa8a611ea netlink_broadcast +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa9111a47 do_gettimeofday +EXPORT_SYMBOL vmlinux 0xa91834af __secpath_destroy +EXPORT_SYMBOL vmlinux 0xa91c64f3 no_llseek +EXPORT_SYMBOL vmlinux 0xa954e13c simple_transaction_release +EXPORT_SYMBOL vmlinux 0xa9676716 unregister_con_driver +EXPORT_SYMBOL vmlinux 0xa9696c2d tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xa99648d0 __down_read +EXPORT_SYMBOL vmlinux 0xa9989e55 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xa9b928f1 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xa9c66912 dquot_acquire +EXPORT_SYMBOL vmlinux 0xa9e66b1c posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xa9f1ed23 bit_waitqueue +EXPORT_SYMBOL vmlinux 0xa9feee30 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0xaa1263b1 mdiobus_scan +EXPORT_SYMBOL vmlinux 0xaa3c5aa1 drm_crtc_helper_set_mode +EXPORT_SYMBOL vmlinux 0xaa4012e2 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0xaa527612 __kfifo_put +EXPORT_SYMBOL vmlinux 0xaa5403fc lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xaa6a2db7 pcim_iomap +EXPORT_SYMBOL vmlinux 0xaa776c65 nlmsg_notify +EXPORT_SYMBOL vmlinux 0xaa80c115 task_nice +EXPORT_SYMBOL vmlinux 0xaab045d1 unregister_qdisc +EXPORT_SYMBOL vmlinux 0xaacd53fa input_set_capability +EXPORT_SYMBOL vmlinux 0xaad0f14f xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaafed61c invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xab01aea4 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xab3c31d9 try_to_release_page +EXPORT_SYMBOL vmlinux 0xab48cd68 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0xab53b0a8 mempool_alloc +EXPORT_SYMBOL vmlinux 0xab64af7b generic_file_llseek +EXPORT_SYMBOL vmlinux 0xab653515 follow_up +EXPORT_SYMBOL vmlinux 0xab71ceaf drm_i_have_hw_lock +EXPORT_SYMBOL vmlinux 0xab7d0518 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabb4c3c4 of_device_is_available +EXPORT_SYMBOL vmlinux 0xabb877fe copy_io_context +EXPORT_SYMBOL vmlinux 0xabbbf072 ps2_drain +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd47787 down_killable +EXPORT_SYMBOL vmlinux 0xabe42590 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xac2dab09 prom_getint +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac4100f3 dquot_destroy +EXPORT_SYMBOL vmlinux 0xac4aa43e pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0xac54fc9f mempool_destroy +EXPORT_SYMBOL vmlinux 0xac5f113d cpu_all_bits +EXPORT_SYMBOL vmlinux 0xac62a83e tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac704a20 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xac734bd7 poll_initwait +EXPORT_SYMBOL vmlinux 0xaca3cca2 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xace4c8ed tick_ops +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad273516 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0xad46c594 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0xad499336 user_revoke +EXPORT_SYMBOL vmlinux 0xad63f8bf vfs_quota_sync +EXPORT_SYMBOL vmlinux 0xadb792c2 prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0xadd93684 km_state_expired +EXPORT_SYMBOL vmlinux 0xade304e2 make_bad_inode +EXPORT_SYMBOL vmlinux 0xadf38b4e file_update_time +EXPORT_SYMBOL vmlinux 0xae54cb21 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0xae5cf2af skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xae90f1e0 sk_alloc +EXPORT_SYMBOL vmlinux 0xaea75c10 nobh_write_end +EXPORT_SYMBOL vmlinux 0xaeaaa850 scm_detach_fds +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaf29788e drm_sman_init +EXPORT_SYMBOL vmlinux 0xaf3b8439 request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0xaf59f539 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0xaf9d6dd8 xfrm_state_add +EXPORT_SYMBOL vmlinux 0xafbacadb tcf_hash_release +EXPORT_SYMBOL vmlinux 0xafbe9859 tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xafe6583b sg_last +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xb01bce58 lookup_bdev +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb0683622 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xb072dba7 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xb0738e1c pipe_lock +EXPORT_SYMBOL vmlinux 0xb0893c17 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0f98666 request_key +EXPORT_SYMBOL vmlinux 0xb103dcec dev_set_mtu +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb13255b8 mdiobus_read +EXPORT_SYMBOL vmlinux 0xb163fa26 get_write_access +EXPORT_SYMBOL vmlinux 0xb164b168 register_nls +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb198ec6f clear_inode +EXPORT_SYMBOL vmlinux 0xb1b1e308 do_splice_to +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1d26bd9 dst_discard +EXPORT_SYMBOL vmlinux 0xb1d7ca98 qdisc_list_del +EXPORT_SYMBOL vmlinux 0xb204282a drm_get_drawable_info +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb24aa355 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0xb2660c0f generic_setlease +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb2b89e20 inet_stream_connect +EXPORT_SYMBOL vmlinux 0xb2cd8092 ip_defrag +EXPORT_SYMBOL vmlinux 0xb2d72cc7 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0xb33fc69f sock_create_lite +EXPORT_SYMBOL vmlinux 0xb372f8be pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xb376801a idr_get_new_above +EXPORT_SYMBOL vmlinux 0xb39a8c9b __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3bc969c vio_control_pkt_engine +EXPORT_SYMBOL vmlinux 0xb3cf0ecc d_prune_aliases +EXPORT_SYMBOL vmlinux 0xb3eb0237 pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0xb3fee3e5 is_container_init +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb4002e25 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0xb4064668 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb42aa571 neigh_seq_start +EXPORT_SYMBOL vmlinux 0xb435bd66 mdesc_next_arc +EXPORT_SYMBOL vmlinux 0xb4465df2 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xb4468f80 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0xb44a672f cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xb458c2e2 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xb476e853 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0xb47b3664 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0xb48f3d8c tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xb5023617 pci_pme_active +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb51a1baf tty_devnum +EXPORT_SYMBOL vmlinux 0xb544236e nla_reserve +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb546dd7c input_unfilter_device +EXPORT_SYMBOL vmlinux 0xb560c63b tcp_shutdown +EXPORT_SYMBOL vmlinux 0xb59b5d6c drm_get_dev +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5aeb019 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xb5c95ee3 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0xb5d4715a drm_vblank_get +EXPORT_SYMBOL vmlinux 0xb5dd8581 nobh_writepage +EXPORT_SYMBOL vmlinux 0xb5f9116d drm_vblank_count +EXPORT_SYMBOL vmlinux 0xb6056c96 neigh_for_each +EXPORT_SYMBOL vmlinux 0xb617e5ad kthread_create +EXPORT_SYMBOL vmlinux 0xb62496dc tty_port_close +EXPORT_SYMBOL vmlinux 0xb6591253 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0xb67425ac sbusfb_fill_var +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6a59787 bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c70a7d __wake_up +EXPORT_SYMBOL vmlinux 0xb6f48d3e do_SAK +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb74c2015 vio_link_state_change +EXPORT_SYMBOL vmlinux 0xb76ab02a xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7cc3da9 posix_test_lock +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7d8065c ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xb7f5036e brioctl_set +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb8465f52 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0xb864bd45 dquot_release +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb877657d pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8ac4f8a km_policy_expired +EXPORT_SYMBOL vmlinux 0xb8eff1e5 get_io_context +EXPORT_SYMBOL vmlinux 0xb97d4c9c mutex_lock +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb9ad7422 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0xba0fd977 dev_mc_sync +EXPORT_SYMBOL vmlinux 0xba1538be __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xba242eab __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba4ce522 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0xba7243c4 blk_init_tags +EXPORT_SYMBOL vmlinux 0xba8f8b68 completion_done +EXPORT_SYMBOL vmlinux 0xba928c9f inet_register_protosw +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaa884a9 journal_lock_updates +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbacab679 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb2140b9 del_timer +EXPORT_SYMBOL vmlinux 0xbb4ebff3 dev_change_flags +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbc77974 __register_binfmt +EXPORT_SYMBOL vmlinux 0xbbd4bdf0 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0xbbe51dc2 pci_select_bars +EXPORT_SYMBOL vmlinux 0xbbf09e4a audit_log_end +EXPORT_SYMBOL vmlinux 0xbbf86551 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xbc0ca297 insert_inode_locked +EXPORT_SYMBOL vmlinux 0xbc611ed4 release_sock +EXPORT_SYMBOL vmlinux 0xbc7fa3bc set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0xbd044a36 pci_save_state +EXPORT_SYMBOL vmlinux 0xbd446449 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0xbd585e6e skb_trim +EXPORT_SYMBOL vmlinux 0xbd613ccb blk_start_request +EXPORT_SYMBOL vmlinux 0xbd857c8a pci_get_device +EXPORT_SYMBOL vmlinux 0xbd94bdda pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xbdef16d5 mem_map_zero +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe1065f5 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0xbe268d45 force_sig +EXPORT_SYMBOL vmlinux 0xbea04c8f drm_vblank_put +EXPORT_SYMBOL vmlinux 0xbebc5416 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xbed97a49 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbef99405 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xbf190bb2 ll_rw_block +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf82b724 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xbf94baa4 elv_rb_add +EXPORT_SYMBOL vmlinux 0xbf993764 __memscan_zero +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfd93e45 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0xbfe3d841 set_binfmt +EXPORT_SYMBOL vmlinux 0xbfeac832 fb_find_mode +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbff53650 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc0196411 mdio_bus_type +EXPORT_SYMBOL vmlinux 0xc030b050 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0xc03268b1 otg_set_transceiver +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc064ac71 drm_core_ioremap_wc +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc098fbf0 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0a3fe21 __netif_schedule +EXPORT_SYMBOL vmlinux 0xc0b4df0a have_submounts +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0d815f5 up_write +EXPORT_SYMBOL vmlinux 0xc0df9f6d inet_frag_kill +EXPORT_SYMBOL vmlinux 0xc11b4ca9 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xc11f11e5 drm_pci_free +EXPORT_SYMBOL vmlinux 0xc14df3ed dev_addr_add +EXPORT_SYMBOL vmlinux 0xc15c1443 nobh_truncate_page +EXPORT_SYMBOL vmlinux 0xc15e073c generic_find_next_zero_le_bit +EXPORT_SYMBOL vmlinux 0xc1794979 keyring_clear +EXPORT_SYMBOL vmlinux 0xc17c3f79 __bio_clone +EXPORT_SYMBOL vmlinux 0xc19c52b9 skb_append +EXPORT_SYMBOL vmlinux 0xc19db1f3 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0xc19fd94d fd_install +EXPORT_SYMBOL vmlinux 0xc1a154f5 dma_pool_create +EXPORT_SYMBOL vmlinux 0xc1bae17a backlight_device_register +EXPORT_SYMBOL vmlinux 0xc1c609b4 may_umount +EXPORT_SYMBOL vmlinux 0xc1d01e37 inode_set_bytes +EXPORT_SYMBOL vmlinux 0xc1dfe432 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0xc1ee17ca test_and_change_bit +EXPORT_SYMBOL vmlinux 0xc1f784f5 alloc_file +EXPORT_SYMBOL vmlinux 0xc220e8ee page_follow_link_light +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc2762e12 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xc29ca145 bio_sector_offset +EXPORT_SYMBOL vmlinux 0xc29eb981 noop_qdisc +EXPORT_SYMBOL vmlinux 0xc2b647eb bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f0834f mb_cache_shrink +EXPORT_SYMBOL vmlinux 0xc2fbc76f jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xc3389dfe kobject_add +EXPORT_SYMBOL vmlinux 0xc33c61e8 simple_fsync +EXPORT_SYMBOL vmlinux 0xc37fa5c5 blk_execute_rq +EXPORT_SYMBOL vmlinux 0xc38b2a7c vio_validate_sid +EXPORT_SYMBOL vmlinux 0xc38c4ca2 PAGE_SHARED +EXPORT_SYMBOL vmlinux 0xc3d382aa filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xc3f19c3e ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0xc3f540a3 pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xc3f59532 pci_get_class +EXPORT_SYMBOL vmlinux 0xc40a4647 vmtruncate +EXPORT_SYMBOL vmlinux 0xc41dcc9c d_path +EXPORT_SYMBOL vmlinux 0xc4406b4f drm_debugfs_create_files +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc49f5ff7 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xc4a3436a audit_log_start +EXPORT_SYMBOL vmlinux 0xc4a3cfe2 drm_exit +EXPORT_SYMBOL vmlinux 0xc4e2fa07 lease_modify +EXPORT_SYMBOL vmlinux 0xc4f1b02a i2c_master_recv +EXPORT_SYMBOL vmlinux 0xc4f7a36b udp_poll +EXPORT_SYMBOL vmlinux 0xc5070a78 blk_sync_queue +EXPORT_SYMBOL vmlinux 0xc516f66d textsearch_register +EXPORT_SYMBOL vmlinux 0xc5207d6e vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xc529f98f neigh_lookup +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5357549 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0xc5384740 pci_iounmap +EXPORT_SYMBOL vmlinux 0xc545682e open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xc58c396d blk_end_request +EXPORT_SYMBOL vmlinux 0xc597bca2 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0xc5e8ea0c skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0xc5ed6691 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0xc605c3d9 ip_route_input +EXPORT_SYMBOL vmlinux 0xc6105c2e blk_alloc_queue +EXPORT_SYMBOL vmlinux 0xc6184045 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xc6327b65 sun4v_chip_type +EXPORT_SYMBOL vmlinux 0xc6624940 block_write_full_page +EXPORT_SYMBOL vmlinux 0xc698bce9 dquot_free_inode +EXPORT_SYMBOL vmlinux 0xc6a4802d vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0xc6dffe33 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0xc6e00db9 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc7251cba uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0xc7319b2f tty_throttle +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc79264eb sk_stop_timer +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7b0f214 idr_remove_all +EXPORT_SYMBOL vmlinux 0xc7ec28b0 memcmp +EXPORT_SYMBOL vmlinux 0xc821e201 drm_vblank_pre_modeset +EXPORT_SYMBOL vmlinux 0xc83fc462 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xc88e85c6 compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xc8a635fc find_get_pages_tag +EXPORT_SYMBOL vmlinux 0xc8b16eb5 unbind_con_driver +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8c4ec12 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xc8cb8111 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0xc8fd1d8f elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xc8ff471e xrlim_allow +EXPORT_SYMBOL vmlinux 0xc90730dc inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xc9163c10 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0xc92735df give_up_console +EXPORT_SYMBOL vmlinux 0xc949ce96 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xc95617aa idr_find +EXPORT_SYMBOL vmlinux 0xc972a5fb pci_enable_device_io +EXPORT_SYMBOL vmlinux 0xc9794ee0 napi_frags_finish +EXPORT_SYMBOL vmlinux 0xc9811424 inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9b058b7 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xca21551e pci_reenable_device +EXPORT_SYMBOL vmlinux 0xca4a4167 of_parse_phandles_with_args +EXPORT_SYMBOL vmlinux 0xca5c5706 kernel_sendpage +EXPORT_SYMBOL vmlinux 0xca5d5b21 bdevname +EXPORT_SYMBOL vmlinux 0xca8f1bb4 netdev_set_master +EXPORT_SYMBOL vmlinux 0xca947c60 ida_destroy +EXPORT_SYMBOL vmlinux 0xcaacde7a pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xcabfc8ab of_find_node_by_type +EXPORT_SYMBOL vmlinux 0xcacef77d d_alloc +EXPORT_SYMBOL vmlinux 0xcad1efd2 sock_kfree_s +EXPORT_SYMBOL vmlinux 0xcaec015a drm_lock_take +EXPORT_SYMBOL vmlinux 0xcb3784b7 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb8e147c __splice_from_pipe +EXPORT_SYMBOL vmlinux 0xcba355be init_file +EXPORT_SYMBOL vmlinux 0xcbb9d7db groups_free +EXPORT_SYMBOL vmlinux 0xcbc29f4e gen_new_estimator +EXPORT_SYMBOL vmlinux 0xcbdbd9b5 deny_write_access +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc128be5 invalidate_bdev +EXPORT_SYMBOL vmlinux 0xcc333626 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc755d71 kmem_cache_free +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc81537a input_close_device +EXPORT_SYMBOL vmlinux 0xcca572ab tty_std_termios +EXPORT_SYMBOL vmlinux 0xccc722ca neigh_create +EXPORT_SYMBOL vmlinux 0xcce813f7 __up_write +EXPORT_SYMBOL vmlinux 0xccef3480 drm_ioctl +EXPORT_SYMBOL vmlinux 0xccf3c24a tcp_read_sock +EXPORT_SYMBOL vmlinux 0xcd0020ed xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xcd0345e3 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0xcd07eec7 path_put +EXPORT_SYMBOL vmlinux 0xcd4a7fec dev_close +EXPORT_SYMBOL vmlinux 0xcd4f5c9f sock_release +EXPORT_SYMBOL vmlinux 0xcdb75203 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xcdbcda53 __down_write +EXPORT_SYMBOL vmlinux 0xcdf70759 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcdfca592 tcp_connect +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce38a58a skb_copy_bits +EXPORT_SYMBOL vmlinux 0xce3a5510 inode_init_once +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce8c216f file_permission +EXPORT_SYMBOL vmlinux 0xcecf369f dev_set_allmulti +EXPORT_SYMBOL vmlinux 0xced93e0d idr_destroy +EXPORT_SYMBOL vmlinux 0xcedb6bf4 update_region +EXPORT_SYMBOL vmlinux 0xcf176a54 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xcf220127 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xcf48c454 drm_crtc_cleanup +EXPORT_SYMBOL vmlinux 0xcf56116a vfs_write +EXPORT_SYMBOL vmlinux 0xcf77dece inet_shutdown +EXPORT_SYMBOL vmlinux 0xcfb552ec request_firmware +EXPORT_SYMBOL vmlinux 0xcfbf4f03 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0xcfe13710 sparc64_get_clock_tick +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd00bacbe drm_mode_attachmode_crtc +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd01e25f1 lock_rename +EXPORT_SYMBOL vmlinux 0xd03155f0 log_wait_commit +EXPORT_SYMBOL vmlinux 0xd0654a9b tc_classify +EXPORT_SYMBOL vmlinux 0xd07fd861 netlink_set_err +EXPORT_SYMBOL vmlinux 0xd08e6fd3 drm_get_connector_name +EXPORT_SYMBOL vmlinux 0xd0be1a2e __memset +EXPORT_SYMBOL vmlinux 0xd0cb4416 posix_lock_file +EXPORT_SYMBOL vmlinux 0xd0d8374c tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0ee925a tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xd0f52956 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xd11a73c9 ebus_dma_register +EXPORT_SYMBOL vmlinux 0xd1534a42 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xd158d930 journal_check_used_features +EXPORT_SYMBOL vmlinux 0xd1c31557 pci_alloc_consistent +EXPORT_SYMBOL vmlinux 0xd1d435a1 alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xd24448db simple_transaction_get +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd253dd2d nf_afinfo +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd272aefa dma_ops +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a7773a tty_register_device +EXPORT_SYMBOL vmlinux 0xd2ba24d6 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL vmlinux 0xd310f098 drm_framebuffer_init +EXPORT_SYMBOL vmlinux 0xd321fdb1 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0xd323c6f6 unload_nls +EXPORT_SYMBOL vmlinux 0xd3427f73 mempool_create_node +EXPORT_SYMBOL vmlinux 0xd374d4bb tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xd3759c14 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd3c6fa72 drm_mode_create_tv_properties +EXPORT_SYMBOL vmlinux 0xd3c847fa simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0xd3d48003 security_inode_permission +EXPORT_SYMBOL vmlinux 0xd3f72ff4 alloc_disk_node +EXPORT_SYMBOL vmlinux 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL vmlinux 0xd4135d4e balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xd443bdd3 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0xd47551a2 drm_core_ioremapfree +EXPORT_SYMBOL vmlinux 0xd4875bbe sock_no_poll +EXPORT_SYMBOL vmlinux 0xd48f7e0f __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0xd4984f8c get_sb_single +EXPORT_SYMBOL vmlinux 0xd49c81e8 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0xd49f1ef6 test_and_clear_bit +EXPORT_SYMBOL vmlinux 0xd4c039e5 journal_restart +EXPORT_SYMBOL vmlinux 0xd4cb2112 sock_no_bind +EXPORT_SYMBOL vmlinux 0xd4dcc4f4 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xd4e70922 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xd4ee7781 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xd4f55590 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL vmlinux 0xd51a626d compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0xd5259caa netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd52c183a journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xd56ba0a0 sun4v_hvapi_register +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd59219a2 pci_unmap_single +EXPORT_SYMBOL vmlinux 0xd5d12668 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xd5d7e7b3 genl_sock +EXPORT_SYMBOL vmlinux 0xd5d8a2ec tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xd5e62dc3 compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0xd5fa4beb vm_map_ram +EXPORT_SYMBOL vmlinux 0xd6049ea7 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xd60c12e8 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0xd628305b blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd62e09b8 dst_alloc +EXPORT_SYMBOL vmlinux 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL vmlinux 0xd6521856 thaw_bdev +EXPORT_SYMBOL vmlinux 0xd6545978 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0xd69532ef ebus_dma_request +EXPORT_SYMBOL vmlinux 0xd6a63915 devm_ioremap +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6d814ca __find_get_block +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6f0f559 idprom +EXPORT_SYMBOL vmlinux 0xd714d41f __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xd71fbfe7 of_phy_connect_fixed_link +EXPORT_SYMBOL vmlinux 0xd7252aee drm_add_edid_modes +EXPORT_SYMBOL vmlinux 0xd74b0e1a insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xd775d0b8 proc_create_data +EXPORT_SYMBOL vmlinux 0xd7783811 pci_restore_state +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7b18fc4 seq_open +EXPORT_SYMBOL vmlinux 0xd7c9622e mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0xd7e25952 wireless_spy_update +EXPORT_SYMBOL vmlinux 0xd7f0270d rtnl_unicast +EXPORT_SYMBOL vmlinux 0xd81a7524 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd843d9ee pcim_pin_device +EXPORT_SYMBOL vmlinux 0xd8523b3a tcf_hash_search +EXPORT_SYMBOL vmlinux 0xd85c9d07 open_exec +EXPORT_SYMBOL vmlinux 0xd886d6b4 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xd88cfa09 vfs_link +EXPORT_SYMBOL vmlinux 0xd8927c8a generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xd8959f23 auxio_set_led +EXPORT_SYMBOL vmlinux 0xd896c5f4 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8ef3cf5 set_device_ro +EXPORT_SYMBOL vmlinux 0xd90736d8 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xd936bb3a bioset_integrity_create +EXPORT_SYMBOL vmlinux 0xd9782c6d call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xd9797a39 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9c75229 sk_reset_timer +EXPORT_SYMBOL vmlinux 0xd9ce1720 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0xd9dacc40 drm_mm_pre_get +EXPORT_SYMBOL vmlinux 0xd9f20c94 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xda05377b inet_stream_ops +EXPORT_SYMBOL vmlinux 0xda14226e netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda1a9539 d_delete +EXPORT_SYMBOL vmlinux 0xda266af8 submit_bh +EXPORT_SYMBOL vmlinux 0xda3453c4 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0xda3cb8b1 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xda3d2c3c prom_feval +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda492553 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0xda50e8b9 elv_rb_find +EXPORT_SYMBOL vmlinux 0xda7c9a20 bd_release +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8720b2 blk_remove_plug +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8b5096 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0xda971bc4 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0xdacede48 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xdae8794c skb_split +EXPORT_SYMBOL vmlinux 0xdaec90b1 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xdaeda5d6 xfrm_register_type +EXPORT_SYMBOL vmlinux 0xdb2c543b sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xdb55646f simple_sync_file +EXPORT_SYMBOL vmlinux 0xdb6af83c cdev_index +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdc0386da sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc1341b1 mdesc_arc_target +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc18adc4 genphy_suspend +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc95e888 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcb5671d strlen +EXPORT_SYMBOL vmlinux 0xdcc72cb6 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0xdccad75b journal_create +EXPORT_SYMBOL vmlinux 0xdce765c1 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xdcf9c6b8 compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0xdcfc8b82 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0xdcfdc263 input_allocate_device +EXPORT_SYMBOL vmlinux 0xdd1197c8 xor_vis_3 +EXPORT_SYMBOL vmlinux 0xdd20c7f2 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL vmlinux 0xdd3ae26d tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL vmlinux 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL vmlinux 0xdd6ad58d uart_match_port +EXPORT_SYMBOL vmlinux 0xdd6c5358 skb_unlink +EXPORT_SYMBOL vmlinux 0xdd6c8526 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xdd729d90 find_inode_number +EXPORT_SYMBOL vmlinux 0xdd8d71ae netdev_bonding_change +EXPORT_SYMBOL vmlinux 0xdd9e1529 generic_delete_inode +EXPORT_SYMBOL vmlinux 0xddb88eea ldc_state +EXPORT_SYMBOL vmlinux 0xddd1ee8b ldc_bind +EXPORT_SYMBOL vmlinux 0xddfcbaf3 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xde075cad pid_task +EXPORT_SYMBOL vmlinux 0xde3c68a6 cpu_online_mask +EXPORT_SYMBOL vmlinux 0xde589e60 xor_vis_2 +EXPORT_SYMBOL vmlinux 0xde7502a8 PAGE_KERNEL +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde92a44b generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdf16efc2 vfsmount_lock +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf6772c9 __invalidate_device +EXPORT_SYMBOL vmlinux 0xdf8fef53 prom_getproplen +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfe13064 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0xe045705d d_genocide +EXPORT_SYMBOL vmlinux 0xe050957d path_get +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c0c481 journal_extend +EXPORT_SYMBOL vmlinux 0xe0d81218 eth_header +EXPORT_SYMBOL vmlinux 0xe109e31a skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe120f784 blk_insert_request +EXPORT_SYMBOL vmlinux 0xe1394634 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL vmlinux 0xe155e869 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xe175bd3a ebus_dma_residue +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe185f123 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xe1990787 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0xe1a26bb1 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xe1db4985 init_timer_key +EXPORT_SYMBOL vmlinux 0xe1f9d110 pneigh_lookup +EXPORT_SYMBOL vmlinux 0xe20d7c04 tty_kref_put +EXPORT_SYMBOL vmlinux 0xe21aa896 dev_mc_add +EXPORT_SYMBOL vmlinux 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe24d46ca __napi_schedule +EXPORT_SYMBOL vmlinux 0xe2903ac3 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0xe2905129 find_get_page +EXPORT_SYMBOL vmlinux 0xe2b1edd3 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe306590d tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xe3220262 pci_find_capability +EXPORT_SYMBOL vmlinux 0xe3258ac6 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xe32c70d9 eth_header_cache +EXPORT_SYMBOL vmlinux 0xe34761e8 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe3558347 __pagevec_release +EXPORT_SYMBOL vmlinux 0xe3afe705 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe3ee73d4 add_disk +EXPORT_SYMBOL vmlinux 0xe4480c83 netif_rx_ni +EXPORT_SYMBOL vmlinux 0xe44881a0 tcp_sendpage +EXPORT_SYMBOL vmlinux 0xe4555f9b inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0xe46762a5 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0xe4996da8 genphy_read_status +EXPORT_SYMBOL vmlinux 0xe49e80a9 console_stop +EXPORT_SYMBOL vmlinux 0xe4b7f35f get_fb_unmapped_area +EXPORT_SYMBOL vmlinux 0xe4e6dfc2 inode_change_ok +EXPORT_SYMBOL vmlinux 0xe4ebd473 aio_put_req +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe52bbf9f skb_dma_map +EXPORT_SYMBOL vmlinux 0xe52de7a3 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0xe53b2131 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0xe5583818 page_symlink +EXPORT_SYMBOL vmlinux 0xe55f3634 kernel_bind +EXPORT_SYMBOL vmlinux 0xe56f3e12 of_phy_connect +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5b4612f input_register_device +EXPORT_SYMBOL vmlinux 0xe5b600ea unregister_netdevice +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe61510ce unlock_rename +EXPORT_SYMBOL vmlinux 0xe64cdae5 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0xe6512544 seq_printf +EXPORT_SYMBOL vmlinux 0xe6562614 udplite_table +EXPORT_SYMBOL vmlinux 0xe67a42e0 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0xe682cde0 dev_alloc_name +EXPORT_SYMBOL vmlinux 0xe6a31d1c inet_del_protocol +EXPORT_SYMBOL vmlinux 0xe6b07de9 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0xe6d0db98 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0xe6fb449e input_get_keycode +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe703fbc9 skb_under_panic +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe725ee63 skb_copy_expand +EXPORT_SYMBOL vmlinux 0xe731cfe4 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xe782899e prom_searchsiblings +EXPORT_SYMBOL vmlinux 0xe7a05446 set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7f57a11 simple_readpage +EXPORT_SYMBOL vmlinux 0xe7f624b6 __kfree_skb +EXPORT_SYMBOL vmlinux 0xe821cab0 inet_add_protocol +EXPORT_SYMBOL vmlinux 0xe8246b33 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0xe8593d90 sock_kmalloc +EXPORT_SYMBOL vmlinux 0xe86e5fc1 downgrade_write +EXPORT_SYMBOL vmlinux 0xe8727cfd vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xe89d494b nf_register_hook +EXPORT_SYMBOL vmlinux 0xe89db36e xfrm_state_update +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8dfcdf9 __csum_partial_copy_to_user +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL vmlinux 0xe92d538f kobject_get +EXPORT_SYMBOL vmlinux 0xe93d9546 filemap_fault +EXPORT_SYMBOL vmlinux 0xe963514c __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0xe964ac7b set_disk_ro +EXPORT_SYMBOL vmlinux 0xe9690c66 input_free_device +EXPORT_SYMBOL vmlinux 0xe99082d2 blk_requeue_request +EXPORT_SYMBOL vmlinux 0xe99f14c2 __f_setown +EXPORT_SYMBOL vmlinux 0xe9df2d63 tcf_hash_create +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea073b7c pci_release_region +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea2cc60e invalidate_partition +EXPORT_SYMBOL vmlinux 0xea366320 dev_remove_pack +EXPORT_SYMBOL vmlinux 0xea585baf vio_ldc_send +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7eba45 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xea8bcf1f fb_set_suspend +EXPORT_SYMBOL vmlinux 0xea9957a1 journal_wipe +EXPORT_SYMBOL vmlinux 0xeaaacc34 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0xead1d491 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeaf0a5ba bio_endio +EXPORT_SYMBOL vmlinux 0xeb096e4c journal_start +EXPORT_SYMBOL vmlinux 0xeb3df34f generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xeb58991c inet_release +EXPORT_SYMBOL vmlinux 0xeb6fa1de dev_unicast_add +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb99d612 drm_core_get_reg_ofs +EXPORT_SYMBOL vmlinux 0xeb9b5b96 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xebab7437 block_write_begin +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebe2d92e d_invalidate +EXPORT_SYMBOL vmlinux 0xec00b1ab kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0xec188405 cdev_del +EXPORT_SYMBOL vmlinux 0xec76ec6e dquot_claim_space +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec7df0cb nobh_write_begin +EXPORT_SYMBOL vmlinux 0xec94042f sock_recvmsg +EXPORT_SYMBOL vmlinux 0xec95cd08 drm_gem_mmap +EXPORT_SYMBOL vmlinux 0xeca4d19f vfs_statfs +EXPORT_SYMBOL vmlinux 0xeccf7887 drm_gem_handle_create +EXPORT_SYMBOL vmlinux 0xecf054f7 sock_i_uid +EXPORT_SYMBOL vmlinux 0xed3355a5 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0xed51bfb0 init_buffer +EXPORT_SYMBOL vmlinux 0xed5e39f4 mod_timer_pending +EXPORT_SYMBOL vmlinux 0xed776876 drm_clflush_pages +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xeda9fc2b inet_frag_find +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedbf33d9 poll_freewait +EXPORT_SYMBOL vmlinux 0xedcfb920 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0xedd250f9 blkdev_get +EXPORT_SYMBOL vmlinux 0xede13536 generic_writepages +EXPORT_SYMBOL vmlinux 0xedf148d3 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee2ffe2d usb_gadget_unregister_driver +EXPORT_SYMBOL vmlinux 0xee519b0d kmem_cache_size +EXPORT_SYMBOL vmlinux 0xee5772be jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0xee6082f4 dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0xee6f4dca tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xee718d7b sync_inode +EXPORT_SYMBOL vmlinux 0xee8fe2c2 security_path_truncate +EXPORT_SYMBOL vmlinux 0xee90884e dq_data_lock +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeecaa7ae blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0xef06df8a phy_device_free +EXPORT_SYMBOL vmlinux 0xef32fd90 write_cache_pages +EXPORT_SYMBOL vmlinux 0xef335d40 mdesc_grab +EXPORT_SYMBOL vmlinux 0xef5b51f0 drm_mode_duplicate +EXPORT_SYMBOL vmlinux 0xef692239 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef88cabe sock_no_getname +EXPORT_SYMBOL vmlinux 0xef8ff1ff ebus_dma_irq_enable +EXPORT_SYMBOL vmlinux 0xefbf0830 key_alloc +EXPORT_SYMBOL vmlinux 0xefc15581 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf0348e19 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xf03e0ab1 bdi_register_dev +EXPORT_SYMBOL vmlinux 0xf0713412 pci_dma_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0xf075bd48 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0xf0798ce1 of_ioremap +EXPORT_SYMBOL vmlinux 0xf089ca17 do_splice_from +EXPORT_SYMBOL vmlinux 0xf0929dfc skb_checksum_help +EXPORT_SYMBOL vmlinux 0xf095f484 proc_dostring +EXPORT_SYMBOL vmlinux 0xf09e308b pipe_unlock +EXPORT_SYMBOL vmlinux 0xf0b776fe tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf1399163 dev_get_flags +EXPORT_SYMBOL vmlinux 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf1833cf3 tty_hangup +EXPORT_SYMBOL vmlinux 0xf187fd2f fb_blank +EXPORT_SYMBOL vmlinux 0xf18d6b67 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1c3b00e copy_in_user_fixup +EXPORT_SYMBOL vmlinux 0xf1c9034b vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0xf1c95323 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf1f2e42d generic_removexattr +EXPORT_SYMBOL vmlinux 0xf1f8e66f register_qdisc +EXPORT_SYMBOL vmlinux 0xf1fc1a89 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf2295acf pci_release_regions +EXPORT_SYMBOL vmlinux 0xf23d8af1 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0xf26ed19f genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0xf29f32ec sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf31a89df per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf36a8f45 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0xf3792d64 framebuffer_release +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3e13156 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xf41fbe32 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL vmlinux 0xf42ebb88 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0xf487a9f7 block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0xf497eebb __down_write_trylock +EXPORT_SYMBOL vmlinux 0xf49a8b9c pci_set_mwi +EXPORT_SYMBOL vmlinux 0xf4cb1ec0 drm_sysfs_connector_add +EXPORT_SYMBOL vmlinux 0xf4cf9d68 sbusfb_mmap_helper +EXPORT_SYMBOL vmlinux 0xf4debd12 __destroy_inode +EXPORT_SYMBOL vmlinux 0xf4eb989e security_path_symlink +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf4f68d6b alloc_fcdev +EXPORT_SYMBOL vmlinux 0xf4fe5413 dst_destroy +EXPORT_SYMBOL vmlinux 0xf5031220 icmp_send +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf51c639f interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf552f9e6 seq_putc +EXPORT_SYMBOL vmlinux 0xf575346f bioset_integrity_free +EXPORT_SYMBOL vmlinux 0xf57e38d8 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0xf58d4138 get_disk +EXPORT_SYMBOL vmlinux 0xf5abcd2f n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0xf5b9e434 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5e442ab get_user_pages +EXPORT_SYMBOL vmlinux 0xf5e932a1 page_readlink +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf6056b5b tcf_exts_validate +EXPORT_SYMBOL vmlinux 0xf60efa23 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0xf625d3c1 commit_creds +EXPORT_SYMBOL vmlinux 0xf632f5e6 of_iounmap +EXPORT_SYMBOL vmlinux 0xf6899235 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0xf6a30e08 ida_init +EXPORT_SYMBOL vmlinux 0xf6aeeb15 suncore_mouse_baud_cflag_next +EXPORT_SYMBOL vmlinux 0xf6b0f1ae vfs_readdir +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6be48a9 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xf6c07186 vfs_getattr +EXPORT_SYMBOL vmlinux 0xf6c0f260 drm_mode_create +EXPORT_SYMBOL vmlinux 0xf6d45356 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0xf6d92c6b bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf7191b22 nla_append +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf761c3ae copy_to_user_fixup +EXPORT_SYMBOL vmlinux 0xf7759a0f phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xf779bd6e phy_start_aneg +EXPORT_SYMBOL vmlinux 0xf7838a4e dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf790bcf9 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xf791ec48 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0xf797f95b dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0xf7a3c3db i2c_verify_client +EXPORT_SYMBOL vmlinux 0xf7a4dc1a tcf_action_exec +EXPORT_SYMBOL vmlinux 0xf7d94e7d fb_set_cmap +EXPORT_SYMBOL vmlinux 0xf80c69d2 __strlen_user +EXPORT_SYMBOL vmlinux 0xf80fa0ba journal_start_commit +EXPORT_SYMBOL vmlinux 0xf81c97bc complete_request_key +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf83103ad of_register_driver +EXPORT_SYMBOL vmlinux 0xf840d6fa sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0xf84b38c3 atomic_add_ret +EXPORT_SYMBOL vmlinux 0xf85533ac copy_user_page +EXPORT_SYMBOL vmlinux 0xf88695fc end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0xf8b5bfa0 gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xf8e486f3 unregister_filesystem +EXPORT_SYMBOL vmlinux 0xf8fb2f92 module_refcount +EXPORT_SYMBOL vmlinux 0xf914e702 skb_push +EXPORT_SYMBOL vmlinux 0xf92f2bb2 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xf93c5d0c sk_common_release +EXPORT_SYMBOL vmlinux 0xf94a79d5 cdev_add +EXPORT_SYMBOL vmlinux 0xf94fe78e unlock_new_inode +EXPORT_SYMBOL vmlinux 0xf9539948 dev_get_stats +EXPORT_SYMBOL vmlinux 0xf98afc2e die_if_kernel +EXPORT_SYMBOL vmlinux 0xf9907ff1 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b28bac interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xfa40ae03 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0xfa7de961 lock_may_read +EXPORT_SYMBOL vmlinux 0xfa83bfc3 blk_register_region +EXPORT_SYMBOL vmlinux 0xfa918099 elv_add_request +EXPORT_SYMBOL vmlinux 0xfa94fd19 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0xfa97e535 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xfab08fd2 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xfad18ffe elv_rb_del +EXPORT_SYMBOL vmlinux 0xfad9ca18 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb13c0de generic_getxattr +EXPORT_SYMBOL vmlinux 0xfb326a5d down +EXPORT_SYMBOL vmlinux 0xfb523edf default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xfb58121b __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb740d8d drm_helper_connector_dpms +EXPORT_SYMBOL vmlinux 0xfb7c49c8 idr_replace +EXPORT_SYMBOL vmlinux 0xfb7f7512 read_cache_page +EXPORT_SYMBOL vmlinux 0xfbbd561d input_unregister_device +EXPORT_SYMBOL vmlinux 0xfbbf71ed do_sync_write +EXPORT_SYMBOL vmlinux 0xfbbfa826 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0xfbd24d1c kill_pid +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc1626b4 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0xfc271ecf generic_unplug_device +EXPORT_SYMBOL vmlinux 0xfc2a11a8 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc4dab96 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xfc8c5b82 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0xfca9eb63 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfce535a8 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0xfce542bb tcp_sendmsg +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcefa0de splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd8dba4c add_wait_queue +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb62162 iunique +EXPORT_SYMBOL vmlinux 0xfdf29771 __seq_open_private +EXPORT_SYMBOL vmlinux 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe019fe9 pci_unmap_sg +EXPORT_SYMBOL vmlinux 0xfe293adc __wait_on_buffer +EXPORT_SYMBOL vmlinux 0xfe2956bf do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe6632fb dcache_dir_close +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe78010d xor_niagara_4 +EXPORT_SYMBOL vmlinux 0xfeadf074 uart_unregister_driver +EXPORT_SYMBOL vmlinux 0xfeb39cc2 drm_init +EXPORT_SYMBOL vmlinux 0xfeb836f6 sync_blockdev +EXPORT_SYMBOL vmlinux 0xfeba0504 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0xfec05366 sun_do_break +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfec54b61 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xfec71465 vfs_rmdir +EXPORT_SYMBOL vmlinux 0xfec78f42 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0xfed7ab4f dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee70d46 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff23e433 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xff2d768f i2c_clients_command +EXPORT_SYMBOL vmlinux 0xff420674 drm_mode_set_name +EXPORT_SYMBOL vmlinux 0xff44d653 blk_start_queue +EXPORT_SYMBOL vmlinux 0xff61a11d sb_set_blocksize +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL 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drivers/media/video/videobuf-dma-sg 0xeb1ee151 videobuf_vmalloc_to_sg +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x107150c5 videobuf_queue_vmalloc_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x250b201c videobuf_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x9be8c109 videobuf_vmalloc_free +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x0b14dbe1 v4l2_device_set_name +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x2aee9818 v4l2_device_unregister_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x5787c0c1 v4l2_device_register +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa481ee64 v4l2_device_register_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xd2312c7f v4l2_device_unregister +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xd7d728f8 v4l2_device_disconnect +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x18cf757c i2o_pool_free +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x26374f5b i2o_dma_map_sg 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+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x34ce0f19 sm501_find_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x9743d7ea sm501_set_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xa55a0440 sm501_misc_control +EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x921d3d8a ucb1400_adc_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0619bab1 wm8350_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0dd7bcd3 wm8350_device_init +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1e570b98 wm8350_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x209916eb wm8350_gpio_config +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3d994571 wm8350_mask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x40217db2 wm8350_reg_lock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x59b057ac wm8350_read_auxadc +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5e335c8c wm8350_block_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x63996d3e wm8350_unmask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x719ea0e0 wm8350_reg_unlock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8a1fc913 wm8350_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x95ad6114 wm8350_device_exit +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x97c767fc wm8350_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9dbf4baa wm8350_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa3d5b9be wm8350_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa6b4bf0e wm8350_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x13d7302e wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x671165c3 wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xadea29a1 wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xdf209ae1 wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x725c5b75 cb710_set_irq_handler +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xccfac9c8 cb710_sg_dwiter_read_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xcf5c71ef cb710_sg_dwiter_write_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xe1653971 cb710_pci_update_config_reg +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0554164e sdio_f0_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0fc75a10 sdio_set_block_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x119b1833 sdio_release_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x151ce522 sdio_claim_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2113d448 sdio_f0_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x26a76e18 sdio_writesb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3d6f4e83 sdio_readl +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x407bba5a sdio_memcpy_toio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x45882824 sdio_release_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x472e4c8e sdio_unregister_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x4dfd0e72 sdio_disable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x6abf9f0f sdio_readsb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x86d0f16b sdio_enable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x8c6d3b7d sdio_readw +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa08d9d0d sdio_writew +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa69e8566 sdio_memcpy_fromio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa84e40f7 sdio_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc5582a45 sdio_writel +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd2ec353c sdio_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe0572b9c sdio_register_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf9bd9d3f sdio_claim_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfb2773bc sdio_align_size +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2175d8a0 sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x41dfccfd sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x62cbcf56 sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xc61523e8 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x9810eb02 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xce60f857 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xe77a03f4 cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x1e4ffd05 cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x78a3ee0f cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x66ccb810 cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x67e5867e cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xbbceb654 cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x5b8f1a9b DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x04cc1363 DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x8d927a30 DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x061a7987 get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0da61f7b mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x184c295d mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x346b9a44 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x413dff05 get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x49545585 deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5d2d7c14 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7040a686 register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x972116c3 kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9cd0e854 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xac8bc87b default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xae3851fd parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb449ed11 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd3be3a37 put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd4e47f89 get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe8cffa1f add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x2231b937 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x6aca2f80 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x8fca8533 register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xb482fef3 deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x2c6b3cbb nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x569958dc nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x9df95d5f nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa12012c6 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xd95a6b4e nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x2d556a98 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xd74cde9c onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x1578de99 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4fb91bb8 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5ed1517f ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6e9046eb ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7d2b69d6 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7e7c6509 ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9bf82178 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xb8f44b16 ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xcc729d22 ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xccef09bf ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd9033f53 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe42810eb ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4b58fc48 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x75811d4e free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa6c922b6 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb1ede2f1 open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc86afe66 can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd11b60d5 can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd8a6bf7f close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xdf12f225 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf1b3cb1f can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x041d1697 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x268c2f2e unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x4848fb79 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x8b567ce3 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0b3b40b4 mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0b6bb1ec mlx4_CLOSE_PORT +EXPORT_SYMBOL_GPL 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mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67c0464c mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x72478633 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x76233df4 mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8002c103 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x87fdf3d6 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x88332d21 mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x89b6363e mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8a355315 mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8c9ab7cd mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x909ab9ae mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9ae458de mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa161bcc6 mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xad89e9ae mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xadc6a71c mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xae858f63 mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaea54275 mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb7bafa47 mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xba4c7f3a mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbb2adcf3 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbd928e6a mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbdb03e46 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc54f8fe2 mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc703230d mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc76fc918 mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc817eb83 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcd8cc133 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd527b9e5 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd57c5ecd mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd7a83f1a mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdf40645c mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe159959c mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe4e3b5ea __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe69c4aaf mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe7cdf47d mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xec5d1ccc mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf8e83ffe mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfe3089c2 mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x0110d83d usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xdf450338 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x1a7d69ea rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2669fe01 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8a5a675b rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8f4689d9 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa2f607d6 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe1fa0cc8 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x26d6c5e2 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x328c6daa usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x38c6da0b usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3ca31618 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3e113bf8 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x575eab21 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5bfd8f4c usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x601c8a99 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x71cc46a5 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8900fff8 usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa955d203 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb517de25 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb9f81693 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcdf56fdb usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd8b910c1 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdd17450e usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xddd82c16 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe70f8955 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xee49ba97 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf0a7a142 usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfedf360f usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x08f8e22d i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x17d2b3ef i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x19f0e95a i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2f2cc39b i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x34da943c i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x59401442 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x714078e5 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8577d419 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9c7b1faf i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xae073617 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd6a15ee0 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xee7cd512 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf8729479 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x3a0083f9 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x05480ef6 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x21d1180e lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2e7146b8 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3826027d lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3dceba6e lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x472aaa38 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7a1ee18e lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x806b2d8b lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9fa2774e lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa959386e lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xaab4a1bb lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc11fd462 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd54be80b lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf11dcaaf lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf7ef2047 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2ff1dd41 lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3361a2dd lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x67fbb50e lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x83ab36a5 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8423ff60 lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8d347952 lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x900fb25f lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc2746f4b lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xf679deb7 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xfe483dcf if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x7672898f p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x79624a98 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc459bf33 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc62eb29c p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd5809ec8 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd5cf40ea p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf8e03d19 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xfed95b30 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x13700472 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x199a84b3 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1db9b1c9 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x41894653 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4ff546ea rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x63cdaff0 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8bbffbe3 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8e55c5d0 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa28f4008 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb90696a5 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc1b22d46 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc88730d3 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcad3bb4b rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd7d3a02a rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe14759ee rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe394ac5b rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe4382c0f rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe9e80f85 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xec8a181d rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf9523650 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x172bb9d9 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4b117658 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa1ae4735 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc2b895ca rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc59ad7e7 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd562ebff rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xec8d6dfa rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0c7fd3cd rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2b38ba64 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2ee5238e rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x37c2e0cf rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x423846ad rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4e9df5d0 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x667f5943 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x76010ede rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x80ec8668 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9edacefc rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa010036b rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa877bee0 rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd1964d5e rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe06ae3f0 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x773c03ee pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd6b74c0e pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0eb3e347 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x162b0621 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x3d751197 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x4791e54a wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x91610ad8 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xecbf04aa wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xd7cea87a wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x05b324f1 scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x5ba99e52 scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x5ecaf2fa scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x868d660a scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x9825fd05 scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xca107248 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0599e400 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x12cae646 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3264c4bd iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4c24b0c0 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4cd061f4 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4d8968e1 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x514fa236 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x51fcdf81 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x638aef35 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x78a9360c iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x855088d9 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8ccc79c5 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x97df8b2a iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x97e8e3e3 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x986e9a9a iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9e69aff0 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa4592c77 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa8ca9c36 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa9758bd4 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xae77c1c9 iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaf1f19fc iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb49ad784 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5700588 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbd013037 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc31d23be iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd75953fe iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd782a487 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdff82102 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe68dc257 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xedcba497 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xee4fd8b1 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf14fb0e9 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf289eed4 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf55990a9 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf6aca2ec iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfde0c044 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff083aef iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff76e251 iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x07c5ab00 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0b36221d iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x108e18f9 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x29079bfe iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2c23e448 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2e272d44 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x36e5aa5b iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4793b681 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x77266fbf iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7be7e444 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa07ff6c2 iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb5f0852f iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb73993dc iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc61ab253 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe577d9e7 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf06e6b60 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x03a462a9 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x12e012a6 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x20323d8f sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x24f15dae sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3533c251 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x386a165c sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x387a4e68 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x40a36e60 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5a037737 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5c3d51fc sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x94c54340 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9fa74a09 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9ff6c140 sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab039242 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xacbdec64 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaf345c93 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc3a5c910 sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc7160d4c sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcd3c47f1 __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdd5a45cd sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xea3218f3 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xeaf195af sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfee5547f sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x49fca3b4 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6cd7ab06 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x712c7f53 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7485689a srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x752a54fc srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xfd19dc36 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x014eb3cf scsi_internal_device_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x02f81235 scsi_schedule_eh +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x1ae875ea sdev_evt_send_simple +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x1f9ff235 scsi_bus_type +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4 scsi_eh_get_sense +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a sdev_evt_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x416245da scsi_internal_device_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x4c702125 scsi_flush_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x58fc59ca scsi_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x6e8d0667 sdev_evt_send +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x71ad92e9 scsi_eh_ready_devs +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7c8782de scsi_target_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8 scsi_complete_async_scans +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x8148d3a7 scsi_nl_add_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x9ee68367 scsi_get_vpd_page +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xb68b9aae __scsi_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27 scsi_nl_remove_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f scsi_nl_remove_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc52c1420 scsi_mode_select +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xcfa4adbc scsi_nl_add_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd8a321a1 scsi_target_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xe8e61ab2 scsi_nl_sock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x07d4e2ac scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x101831f8 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x26fad41a scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2fef3bfd scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x45e65a12 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x86feb84d scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x8b98153c scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9c20381a scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfeb10697 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x25c0c6a4 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3b90d172 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4916e851 iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4c5bc8b3 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5086a98c iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x70a4dd7c iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x72c9a4ea iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7aa752e0 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d747152 iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x887ce3df iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x88beff5b iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x88d7421b iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8d707084 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8fec5217 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaa27e3a0 iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcbece5aa iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdfeee14e iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe27fc915 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe8b4cb3a iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf2d155a4 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf2e2d6bb iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xfff05ae2 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1a6c13fb srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x34574b2f srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x72b8faf5 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xae0d02bc srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xb42a9370 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x2550f077 pciserial_init_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xd5a82baa pciserial_remove_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xdf869fbd pciserial_resume_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xf86bba2d pciserial_suspend_ports +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x11783813 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x305611cd spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x87e3c187 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x9627747e spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa6661d9f spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc0141666 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/uio/uio 0x4c5f10a7 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x89e10fad uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0x93285d92 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x0bb541c1 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xad01bf81 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x00c2ea12 usb_hcd_pci_probe +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x07109890 usb_ifnum_to_if +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0aedab86 usb_deregister_device_driver +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0b4b042d usb_sg_wait +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x12eb047a usb_interrupt_msg +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x197573d9 usb_buffer_map_sg +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x19a304ba usb_disabled +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x1a6388ea usb_queue_reset_device +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x20596565 usb_wait_anchor_empty_timeout +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x248be09d usb_create_hcd +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x290b7228 usb_set_device_state +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x297d3ae6 usb_anchor_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2f0554f3 usb_unanchor_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2f69548f usb_match_one_id +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x37931883 usb_buffer_alloc +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3a32cd39 usb_driver_release_interface +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3be89d3c usb_register_notify +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3ca5ce64 usb_register_driver +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3cd1f726 usb_string +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3faba789 usb_driver_claim_interface +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x40dfc3e2 usb_hcd_link_urb_to_ep +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x41a5c98e usb_alloc_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x41e615b0 usb_hcd_check_unlink_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x46c72860 usb_bus_list_lock +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x472ad481 usb_altnum_to_altsetting +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4d110104 usb_hcd_poll_rh_status +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x573139a4 usb_hcd_pci_remove +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5b1127fd usb_put_intf +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5c82bd98 usb_mon_register +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6512e670 usb_free_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x655d95cd usb_put_dev +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x65da1bc3 usb_hub_clear_tt_buffer +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x66aec0c2 usb_hcd_pci_shutdown +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6ed1362a usb_reset_device +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x732e25e2 usb_buffer_unmap_sg +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x73472ba4 usb_unpoison_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x76107bf7 usb_put_hcd +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x762f64bf ehci_cf_port_reset_rwsem +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x79d2f8a1 usb_anchor_empty +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7e64181d usb_calc_bus_time +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7e8d5aba usb_sg_cancel +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x82e90c5f usb_get_hcd +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8561cbe9 usb_poison_anchored_urbs +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8571fe77 usb_get_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x86324505 usb_debug_root +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x872a8419 usb_driver_set_configuration +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8d2831ad usb_unlink_anchored_urbs +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x916222a0 usb_add_hcd +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x943078cb usb_reset_configuration +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x94bf2c1d usb_register_dev +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9542a964 usb_reset_endpoint +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x98f5ad26 usb_lock_device_for_reset +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9924c496 __usb_get_extra_descriptor +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x99cdde23 usb_unlink_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9b331d32 usb_store_new_id +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9d092fbc usb_init_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa29a1214 usb_scuttle_anchored_urbs +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa6881c70 usb_hc_died +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xace5c0fc usb_bus_list +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xafaf4849 usb_remove_hcd +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xafe26f18 usb_submit_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb5c461af usb_get_current_frame_number +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xba0780e0 usb_sg_init +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbaf6b57c usb_get_dev +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbcf6952c usb_hcd_platform_shutdown +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbfe7385b usb_kill_anchored_urbs +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc17515d7 usb_hcds_loaded +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc68e6139 usb_hcd_unlink_urb_from_ep +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc74cf1ac usb_set_interface +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc903e4ce usb_find_interface +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xca08cb61 usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcee7d67b usb_ep0_reinit +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcefa1ef2 usb_match_id +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcfcaeab4 usb_unpoison_anchored_urbs +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd0faaf82 usb_buffer_free +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd286fb57 usb_control_msg +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd3808dbe usb_deregister_dev +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd4094ebb usb_get_from_anchor +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd6efe7fa usb_bulk_msg +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe2dae741 usb_get_descriptor +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe85cc815 usb_get_intf +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xeaf50e14 usb_poison_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xec9dc5bf usb_deregister +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf01a08f2 usb_get_status +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf46b2cab usb_kill_urb +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfabde023 usb_register_device_driver +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xffcc432d usb_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2b7241ad usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3340bd55 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x42497224 usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x882b920f usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x94b4bab1 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xdaac6967 usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xec77b434 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xef5f2a56 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf8ca62e2 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0f2ed14f usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0f887183 usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2302b030 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5a57ece7 usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6775fd91 usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x75280261 usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x758c6757 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb5bc8a01 usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbe381e18 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc2f3a6d9 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc34afc44 ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc4db197e usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcf848f1e usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd2be3cb5 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdb5cdfca usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0623d671 usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x12f89139 fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x25d47da7 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3ce9bd26 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x63eab882 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x70ba470b usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x87bcb44d usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8aea3687 usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x93c3d32f usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa43522c3 usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa5b63bcf usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb04d9826 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb818fef8 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbc468545 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc1f0500d usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc9a6c1bb usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd30cae60 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xeb28a252 usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xecd1f4c1 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xed2c8632 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x07a37c44 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x3bb90218 __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xbcf6a693 rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc6388d92 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf05c7299 wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x00d3b5eb wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x102ab0f7 wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x165033b3 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x218a07a9 wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x82e2035a wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x84b00d3c wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8cad0c01 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x92b6b096 wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9d51cf9f wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa26d43c7 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbe100f31 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xcc32a3bd wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd96bb6b7 wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xeadad5e2 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xeebe1e84 wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf1c2595a wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2ea69b97 i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x45f8a290 i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x7f1a7ded i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x76b413fc uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x79c561b5 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x91b6ddf4 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa3d55124 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xafab5c2a uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbae79a9b uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbbba65da uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbe252446 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x148b6902 umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x23f7c8ea umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8b036869 __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8cc2ef07 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa9ada58c umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb948c2e8 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xe4f1e46e umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xff295c73 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x02bd56bb uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x05616c7f uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x062479f3 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x08e3b2f3 uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0aad2828 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15383924 uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15e731b1 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x33acdacc uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x390586de uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d2e2dc9 uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x53060c12 uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5bf8d662 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x73ecff80 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x79383c48 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7bbe03e3 uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x80d971b5 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x82d35671 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x85017a90 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x87523e66 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x89d1290b uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8d3fdbe2 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8ef65290 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x908a1bab uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98e2b815 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa4459574 uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa49cea84 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa6d1ced8 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc746a6f2 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc9bc2c8c uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xca18b892 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcfe79085 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2ae883d uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd53f49e7 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xece24478 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf4301563 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf48d966f uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7937a3d uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/whci 0x9efb52cb whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x00cb5765 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x03c19b31 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x06df67eb wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x07cc3afb wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x140d9d01 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x200b8b8f wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x24fa7c50 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x28215746 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2d308245 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x33f64032 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x36cdf6c1 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x49838be1 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x62fc0198 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x68efecdf wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6de539e2 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6e609fae wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6fa618c0 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7888b0c2 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x810fbae3 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x840a3f0a wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8f140fdf wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9e174a99 wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9e34f3cb wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9f249594 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9fa50d1b wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa0084cb3 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd5a3efb9 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xda2b3a42 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xec0df346 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf08168eb wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd1a2ed0 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfe78e114 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x22c278f9 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x928b259a ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa182bc69 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xab7ad215 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc8a47b5a ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x24a65444 fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xa801d8c4 fb_sys_write +EXPORT_SYMBOL_GPL drivers/w1/wire 0x08bdceba w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x0be486e4 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x8a071b80 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd0f8634 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xc7c2788f w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xd48669e6 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xd969dd59 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xfd079ca7 w1_reset_select_slave +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x4d4b7f7d dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x591dcc85 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x8c485199 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x46d1c8e1 exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x922ceba5 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x12614211 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0x17e72916 fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x18640468 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0x3ea32384 fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x43b7fd19 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0x5e41a74e fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x600085c9 fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x66bfe949 fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x692862ce fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0x8f11f0ef fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xa801ced2 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xc01f57fc fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xc5e22843 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xcc6b320d fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xe1efe63c fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0xe2fad90c fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xfba2d6ea fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xfc7b9732 fat_remove_entries +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7fb347fc nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa216cf68 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xb66a5ef6 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xd6714f85 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xea18b7f4 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x65e6d1b7 nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xb1d98028 nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x06a08e02 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0cbbafd0 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2e7bce12 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x430ea89f o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726 o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6541c8e2 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xfc6f21a9 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xff0b3ef8 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x1965a592 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x28b587fa dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x352b0d1a dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x762bdda0 dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9fcdfe8a dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xbd7e6222 dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x3e22d062 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x90408181 ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xe62e7e28 ocfs2_plock +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca lzo1x_decompress_safe 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+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7e5ec0be dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8d2f3415 dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8d30979e dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x91199720 dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa149601c inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa3367e89 dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa921e0aa dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0xaa06d382 dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb24dd463 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb88c0b2d compat_dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbe82abc7 dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc35bdd93 dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd7707a86 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0xdad7b64b dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 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+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3357965d svc_max_payload +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x34dfbca3 sunrpc_cache_update +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x35ac26e9 svc_xprt_put +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36835627 xdr_write_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3aa61228 rpc_delay +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4230f2ad svc_proc_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x44b4a2b5 xprt_set_retrans_timeout_def +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x45149a09 auth_unix_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x467aff4c xprt_adjust_cwnd +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4a76588e svc_reg_xprt_class +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b7fd9d7 rpc_peeraddr2str +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b9de6de rpc_wake_up +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x520e9d41 rpc_killall_tasks +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68 nlm_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5646dbe0 svc_reserve +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 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+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x41774414 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5eaff14f cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x62527a45 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7ff77a29 cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8eac9564 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa342c97f cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb2c82632 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcc4e4b20 cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd0010f7c cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdc940e9e cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdcdcbf4c cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe6fdae07 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xeacc615a cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL 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sound/pci/hda/snd-hda-codec 0x190c6c39 snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b4b8cb3 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1fcc3808 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x22eed5c1 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x274502c9 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a58ea83 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2b7eb087 snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2be26f6c snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2eb65a5d snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2f92e2a1 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x31c7ea35 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x31e58d83 snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3341d355 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b2a1a89 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b404185 snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3c5bfcd9 snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3cba65dd snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d9b818d snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4a7e0107 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4e33b073 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x58488f93 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5f067183 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x60bd07c3 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x60f3b74b snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x63315255 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x67261844 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x67f62e3f snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68b06cd6 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x69bcc13e snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6b187e13 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7284993c snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7960ee24 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d0b7625 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8351d7d2 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8698e3e3 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a93cccf snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9c43e7e2 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9fec221b snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2423781 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa4ef7cc4 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa8b09c82 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaa709aec snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xadfa4b14 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaecd7798 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb20c1229 snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbb59fa54 snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbd4c185a snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc2b47489 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652d166 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce661f04 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd124bb1a snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd51a64d9 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xde2d4ea2 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4ede058 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe68cc1f7 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf26f08a4 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf557b5e9 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf729ac36 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf7c4dfac snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf96ace7a snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfa66fbff snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe2489d4 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe516ef3 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff5e5a95 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x5e7ae16f ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x612b1967 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xdf445560 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xd2cdb6f7 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xfe303afc ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x3c62fe98 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xd4c8b8d0 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x413d1e61 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x7b3d435d soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x70884696 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xe8da36f8 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x3e186dbf tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x754e26c7 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x3a8e2661 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x452580f6 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x19895b0a aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x26316cb2 aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x2703f91b aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x4deed705 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x999e10cc soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa9ab46c9 aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xaf48e68c aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xce61dc10 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xdf05ce9e soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x1ebda89b soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x2f0794f2 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x7c21a9c7 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x40b9113d wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x55673314 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x8b30f4c7 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0d9a15aa wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x102c0e95 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x940b37bd wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xbb993134 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x9099c7cf wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xb4480abb soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x0b95a830 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xdb0fcdee soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x0b0f1c90 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x8aedf24c wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x16995163 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x226114d3 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x3db402a0 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x8e598c53 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x65d32946 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xf08de4bb soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xdba0b778 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xe3475be8 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x919c0d55 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xf7844c67 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x06031c7c wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xf4009809 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x6b28c46d wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xecd9c37f soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x36473f0b soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xba6fe54c wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xf04b6c95 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xff5cdf34 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x9554bbec wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xa7ede278 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x021c31d1 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x04c329a4 snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x06deee5b snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x070b8621 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x07868f9d snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0d72464c snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e7e1fb1 snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e8889fe snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x13089623 snd_soc_jack_new +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x191f5a32 snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x19b99769 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1bc70f25 snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c24b778 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1d17a694 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2bcbd3d3 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2cd92688 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x30f0dcc5 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x37c3c217 snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3f614ef5 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x421fa6ea snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4528340c snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x467c0fee snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x472fc7ab snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x47d61b0f snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ad536ec snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4b9ca935 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50da5263 snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5a5c6d43 snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6220bbff snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x637fae46 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x68a5e284 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6dff4c94 snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6e3bb374 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x72b0aaeb snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x72cdb7d4 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7322520a snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7356b0f3 snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73e0350b snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7fcdd8b0 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x930518b4 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x93c80c7c snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96092516 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9a3cfd28 snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d105483 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9ecbacfc snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa0f847d9 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa4e0005e snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa5b437ae snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa559032 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb506003a snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb5bdc918 snd_soc_info_volsw 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ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0x284e5839 __put_net +EXPORT_SYMBOL_GPL vmlinux 0x2884a9ff debugfs_create_u64 +EXPORT_SYMBOL_GPL vmlinux 0x28b2cc80 atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0x28d664ff __raw_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0x28e23139 xfrm_probe_algs +EXPORT_SYMBOL_GPL vmlinux 0x29080e80 ring_buffer_reset +EXPORT_SYMBOL_GPL vmlinux 0x292c3d65 each_symbol +EXPORT_SYMBOL_GPL vmlinux 0x2971bd8e device_attach +EXPORT_SYMBOL_GPL vmlinux 0x29900b6c device_for_each_child +EXPORT_SYMBOL_GPL vmlinux 0x29a0b4b7 sysfs_notify +EXPORT_SYMBOL_GPL vmlinux 0x29b2fafe kobject_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0x29b6268e tcp_init_congestion_ops +EXPORT_SYMBOL_GPL vmlinux 0x29bd4ab2 ring_buffer_record_disable +EXPORT_SYMBOL_GPL vmlinux 0x29e2de80 da903x_clr_bits +EXPORT_SYMBOL_GPL vmlinux 0x29f57bde crypto_register_alg +EXPORT_SYMBOL_GPL vmlinux 0x2a84f640 ring_buffer_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0x2af274bf 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0x4ba31096 kobject_get_path +EXPORT_SYMBOL_GPL vmlinux 0x4c72c022 leds_list_lock +EXPORT_SYMBOL_GPL vmlinux 0x4c759827 byte_rev_table +EXPORT_SYMBOL_GPL vmlinux 0x4c848371 tcp_orphan_count +EXPORT_SYMBOL_GPL vmlinux 0x4cbffd50 invalidate_inode_pages2_range +EXPORT_SYMBOL_GPL vmlinux 0x4d1d21c5 rtc_update_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0x4d4cc1a6 transport_remove_device +EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15 klist_add_before +EXPORT_SYMBOL_GPL vmlinux 0x4d90a486 init_user_ns +EXPORT_SYMBOL_GPL vmlinux 0x4daa7c66 debugfs_create_u16 +EXPORT_SYMBOL_GPL vmlinux 0x4de29b08 relay_buf_full +EXPORT_SYMBOL_GPL vmlinux 0x4df76851 tcp_cong_avoid_ai +EXPORT_SYMBOL_GPL vmlinux 0x4ef359cd register_pernet_gen_subsys +EXPORT_SYMBOL_GPL vmlinux 0x4efbd1fd blocking_notifier_chain_cond_register +EXPORT_SYMBOL_GPL vmlinux 0x4f910ae1 inet_hashinfo_init +EXPORT_SYMBOL_GPL vmlinux 0x4f9c8f88 inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0x4fa0b95f vfs_setxattr +EXPORT_SYMBOL_GPL vmlinux 0x5085acfe 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pci_rescan_bus +EXPORT_SYMBOL_GPL vmlinux 0x5324d04f bstr_printf +EXPORT_SYMBOL_GPL vmlinux 0x53406fd1 dma_get_required_mask +EXPORT_SYMBOL_GPL vmlinux 0x53614269 get_cpu_idle_time_us +EXPORT_SYMBOL_GPL vmlinux 0x5396d6d8 inotify_remove_watch_locked +EXPORT_SYMBOL_GPL vmlinux 0x53986488 register_die_notifier +EXPORT_SYMBOL_GPL vmlinux 0x53d5aab3 trace_current_buffer_lock_reserve +EXPORT_SYMBOL_GPL vmlinux 0x54202df0 aead_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0x542cb771 crypto_alloc_shash +EXPORT_SYMBOL_GPL vmlinux 0x54367287 rtnl_link_register +EXPORT_SYMBOL_GPL vmlinux 0x54557bb4 tracepoint_iter_next +EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8 fsnotify_get_cookie +EXPORT_SYMBOL_GPL vmlinux 0x5473e3d6 ring_buffer_size +EXPORT_SYMBOL_GPL vmlinux 0x54b293f7 blkcipher_walk_virt_block +EXPORT_SYMBOL_GPL vmlinux 0x55b1e7e1 synchronize_srcu +EXPORT_SYMBOL_GPL vmlinux 0x55dcb2bc crypto_blkcipher_type +EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8 __trace_bprintk +EXPORT_SYMBOL_GPL vmlinux 0x56780928 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0xa89d1915 input_event_to_user +EXPORT_SYMBOL_GPL vmlinux 0xa8ae01b9 do_add_mount +EXPORT_SYMBOL_GPL vmlinux 0xa8f59416 gpio_direction_output +EXPORT_SYMBOL_GPL vmlinux 0xa9204318 da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8 unregister_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xa9eec001 device_initialize +EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696 cpu_clock +EXPORT_SYMBOL_GPL vmlinux 0xab26bfe6 device_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xab57e311 tracepoint_probe_register +EXPORT_SYMBOL_GPL vmlinux 0xab630f76 crypto_larval_kill +EXPORT_SYMBOL_GPL vmlinux 0xac0f7a85 fuse_do_open +EXPORT_SYMBOL_GPL vmlinux 0xacbb16bf regulator_set_optimum_mode +EXPORT_SYMBOL_GPL vmlinux 0xadc14108 led_trigger_store +EXPORT_SYMBOL_GPL vmlinux 0xadd7ece6 bus_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee pm_qos_remove_notifier +EXPORT_SYMBOL_GPL vmlinux 0xaefae876 alloc_page_buffers +EXPORT_SYMBOL_GPL vmlinux 0xaf1faa73 xfrm_audit_state_notfound_simple +EXPORT_SYMBOL_GPL vmlinux 0xaf227d76 rtc_irq_unregister +EXPORT_SYMBOL_GPL vmlinux 0xaf3ab770 __fsnotify_parent +EXPORT_SYMBOL_GPL vmlinux 0xaf65121d blk_lld_busy +EXPORT_SYMBOL_GPL vmlinux 0xaf936173 pci_set_pcie_reset_state +EXPORT_SYMBOL_GPL vmlinux 0xafe0af7d __wake_up_sync_key +EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e fips_enabled +EXPORT_SYMBOL_GPL vmlinux 0xb142b8f8 __rt_mutex_init +EXPORT_SYMBOL_GPL vmlinux 0xb1873648 hrtimer_start +EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce rcu_barrier_sched +EXPORT_SYMBOL_GPL vmlinux 0xb1d4ae72 proc_net_fops_create +EXPORT_SYMBOL_GPL vmlinux 0xb1e5ecad fb_deferred_io_cleanup +EXPORT_SYMBOL_GPL vmlinux 0xb23f57d9 inotify_init_watch +EXPORT_SYMBOL_GPL vmlinux 0xb24b46e1 uart_set_options +EXPORT_SYMBOL_GPL vmlinux 0xb28c9006 ring_buffer_read_page +EXPORT_SYMBOL_GPL vmlinux 0xb2a86ea6 fuse_request_send +EXPORT_SYMBOL_GPL vmlinux 0xb37ebb83 locks_release_private +EXPORT_SYMBOL_GPL vmlinux 0xb3956c96 remove_irq +EXPORT_SYMBOL_GPL vmlinux 0xb3acfcfe sysfs_add_file_to_group +EXPORT_SYMBOL_GPL vmlinux 0xb3e5db48 fuse_do_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xb3fa3dd1 vfs_setlease +EXPORT_SYMBOL_GPL vmlinux 0xb4990e73 aead_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xb49b48fc spi_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xb4e49832 ring_buffer_alloc_read_page +EXPORT_SYMBOL_GPL vmlinux 0xb5aa1cec rt_mutex_timed_lock +EXPORT_SYMBOL_GPL vmlinux 0xb5cc0904 relay_file_operations +EXPORT_SYMBOL_GPL vmlinux 0xb5e15d54 relay_reset +EXPORT_SYMBOL_GPL vmlinux 0xb60703be pci_create_slot +EXPORT_SYMBOL_GPL vmlinux 0xb612444d snmp_mib_init +EXPORT_SYMBOL_GPL vmlinux 0xb62e642a unregister_jprobe +EXPORT_SYMBOL_GPL vmlinux 0xb65091b3 selinux_secmark_refcount_dec +EXPORT_SYMBOL_GPL vmlinux 0xb6771d27 device_remove_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xb6cc4646 inotify_find_update_watch +EXPORT_SYMBOL_GPL vmlinux 0xb744fa43 xfrm_ealg_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xb74add63 i2c_new_device +EXPORT_SYMBOL_GPL vmlinux 0xb75265b9 transport_destroy_device +EXPORT_SYMBOL_GPL vmlinux 0xb78f3fa0 debugfs_create_x8 +EXPORT_SYMBOL_GPL vmlinux 0xb84f2116 relay_flush +EXPORT_SYMBOL_GPL vmlinux 0xb85340cb key_type_user +EXPORT_SYMBOL_GPL vmlinux 0xb8759c2c srcu_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0xb881cd16 fuse_put_request +EXPORT_SYMBOL_GPL vmlinux 0xb8a4d530 unregister_kretprobes +EXPORT_SYMBOL_GPL vmlinux 0xb8da8bc5 pci_find_ht_capability +EXPORT_SYMBOL_GPL vmlinux 0xb8ef3ab9 __pci_reset_function +EXPORT_SYMBOL_GPL vmlinux 0xb922d4e8 led_trigger_set +EXPORT_SYMBOL_GPL vmlinux 0xb92a293a __module_address +EXPORT_SYMBOL_GPL vmlinux 0xb9562902 blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xb9844feb devres_release_group +EXPORT_SYMBOL_GPL vmlinux 0xb9a80b64 driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xb9e48ca4 inet_hash_connect +EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9 add_uevent_var +EXPORT_SYMBOL_GPL vmlinux 0xb9ef844e tasklet_hrtimer_init +EXPORT_SYMBOL_GPL vmlinux 0xbace4a39 class_dev_iter_init +EXPORT_SYMBOL_GPL vmlinux 0xbb16ffe7 real_hard_smp_processor_id +EXPORT_SYMBOL_GPL vmlinux 0xbb180559 sysfs_remove_link +EXPORT_SYMBOL_GPL vmlinux 0xbb410017 inet_csk_clone +EXPORT_SYMBOL_GPL vmlinux 0xbbad4c6b unregister_pernet_gen_device +EXPORT_SYMBOL_GPL vmlinux 0xbbcb244e __fsnotify_inode_delete +EXPORT_SYMBOL_GPL vmlinux 0xbbcc1756 find_vpid +EXPORT_SYMBOL_GPL vmlinux 0xbbcdac78 get_current_tty +EXPORT_SYMBOL_GPL vmlinux 0xbd37434b inet_csk_get_port +EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0 trace_vprintk +EXPORT_SYMBOL_GPL vmlinux 0xbdd5d61e udp4_lib_lookup +EXPORT_SYMBOL_GPL vmlinux 0xbe116723 do_posix_clock_nosettime +EXPORT_SYMBOL_GPL vmlinux 0xbe11f787 rt_mutex_unlock +EXPORT_SYMBOL_GPL vmlinux 0xbea0c6f6 rtc_alarm_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0xbea4b335 inet_diag_unregister +EXPORT_SYMBOL_GPL vmlinux 0xbedaf644 input_ff_event +EXPORT_SYMBOL_GPL vmlinux 0xbeea7a2b srcu_notifier_chain_unregister +EXPORT_SYMBOL_GPL vmlinux 0xbf0b17a3 pci_reset_function +EXPORT_SYMBOL_GPL vmlinux 0xbf176d8f raw_seq_stop +EXPORT_SYMBOL_GPL vmlinux 0xbf49112a anon_transport_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xbf71a53f relay_subbufs_consumed +EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20 probe_kernel_write +EXPORT_SYMBOL_GPL vmlinux 0xbfdcf035 macvlan_handle_frame_hook +EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec compat_alloc_user_space +EXPORT_SYMBOL_GPL vmlinux 0xc126e890 klist_del +EXPORT_SYMBOL_GPL vmlinux 0xc13f6f3a crypto_create_tfm +EXPORT_SYMBOL_GPL vmlinux 0xc19c5595 tty_ldisc_deref +EXPORT_SYMBOL_GPL vmlinux 0xc22a3091 vm_unmap_aliases +EXPORT_SYMBOL_GPL vmlinux 0xc2a55bfe scatterwalk_map +EXPORT_SYMBOL_GPL vmlinux 0xc3111506 transport_add_device +EXPORT_SYMBOL_GPL vmlinux 0xc32f9071 input_ff_create +EXPORT_SYMBOL_GPL vmlinux 0xc34efe27 snmp_fold_field +EXPORT_SYMBOL_GPL vmlinux 0xc36e7738 fb_deferred_io_init +EXPORT_SYMBOL_GPL vmlinux 0xc3adf0a8 user_update +EXPORT_SYMBOL_GPL vmlinux 0xc3d63656 device_rename +EXPORT_SYMBOL_GPL vmlinux 0xc4308be7 bdi_writeout_inc +EXPORT_SYMBOL_GPL vmlinux 0xc43a244e sysfs_put +EXPORT_SYMBOL_GPL vmlinux 0xc467dcd3 debugfs_create_u8 +EXPORT_SYMBOL_GPL vmlinux 0xc468971f class_interface_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc4704be1 screen_glyph +EXPORT_SYMBOL_GPL vmlinux 0xc48cae1e regulator_list_voltage +EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6 tracepoint_probe_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc4c411b4 fs_kobj +EXPORT_SYMBOL_GPL vmlinux 0xc519ba14 inotify_inode_is_dead +EXPORT_SYMBOL_GPL vmlinux 0xc51d11ea class_destroy +EXPORT_SYMBOL_GPL vmlinux 0xc521491f xfrm_audit_state_add +EXPORT_SYMBOL_GPL vmlinux 0xc524ade5 mnt_want_write_file +EXPORT_SYMBOL_GPL vmlinux 0xc55dc4fb unregister_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xc55fa297 debugfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0xc5656f97 kobject_uevent +EXPORT_SYMBOL_GPL vmlinux 0xc577518e ring_buffer_entries +EXPORT_SYMBOL_GPL vmlinux 0xc5cffc34 bus_rescan_devices +EXPORT_SYMBOL_GPL vmlinux 0xc5dac300 sysdev_create_file +EXPORT_SYMBOL_GPL vmlinux 0xc5fa7722 crypto_rng_type +EXPORT_SYMBOL_GPL vmlinux 0xc5fbba28 skcipher_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec __ftrace_vprintk +EXPORT_SYMBOL_GPL vmlinux 0xc6440c4a dequeue_signal +EXPORT_SYMBOL_GPL vmlinux 0xc654797c debugfs_create_symlink +EXPORT_SYMBOL_GPL vmlinux 0xc6886bd4 init_preds +EXPORT_SYMBOL_GPL vmlinux 0xc7504484 tracepoint_get_iter_range +EXPORT_SYMBOL_GPL vmlinux 0xc76939ed proc_net_remove +EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84 ktime_get +EXPORT_SYMBOL_GPL vmlinux 0xc9187a11 crypto_nivaead_type +EXPORT_SYMBOL_GPL vmlinux 0xc93344da device_release_driver +EXPORT_SYMBOL_GPL vmlinux 0xc9561772 fb_destroy_modelist +EXPORT_SYMBOL_GPL vmlinux 0xc959215d xattr_getsecurity +EXPORT_SYMBOL_GPL vmlinux 0xc9e5d4fc register_dimm_printer +EXPORT_SYMBOL_GPL vmlinux 0xca039706 sysfs_remove_file_from_group +EXPORT_SYMBOL_GPL vmlinux 0xca4b8f92 fuse_dev_release +EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf tracepoint_probe_update_all +EXPORT_SYMBOL_GPL vmlinux 0xca8d5c94 devres_remove_group +EXPORT_SYMBOL_GPL vmlinux 0xca99b14c fb_bl_default_curve +EXPORT_SYMBOL_GPL vmlinux 0xcab198d8 elv_unregister +EXPORT_SYMBOL_GPL vmlinux 0xcac3be55 debugfs_create_x16 +EXPORT_SYMBOL_GPL vmlinux 0xcaf46641 securityfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0xcb0c2ebf __srcu_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xcb0fb454 ring_buffer_empty +EXPORT_SYMBOL_GPL vmlinux 0xcb22ff41 driver_find +EXPORT_SYMBOL_GPL vmlinux 0xcb375a1f vfs_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xcb3dd17b crypto_hash_walk_first +EXPORT_SYMBOL_GPL vmlinux 0xcb51cabe klist_iter_exit +EXPORT_SYMBOL_GPL vmlinux 0xcbbde8be uhci_reset_hc +EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d inet_twdr_hangman +EXPORT_SYMBOL_GPL vmlinux 0xcc5193a4 platform_driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xcda4c22b console_drivers +EXPORT_SYMBOL_GPL vmlinux 0xcdc98ddd get_task_mm +EXPORT_SYMBOL_GPL vmlinux 0xcdca3691 nr_irqs +EXPORT_SYMBOL_GPL vmlinux 0xcdfed241 blocking_notifier_chain_unregister +EXPORT_SYMBOL_GPL vmlinux 0xce18920a transport_setup_device +EXPORT_SYMBOL_GPL vmlinux 0xce235fc3 kernel_kobj +EXPORT_SYMBOL_GPL vmlinux 0xce984067 add_timer_on +EXPORT_SYMBOL_GPL vmlinux 0xcefeeda3 simple_attr_write +EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad register_vt_notifier +EXPORT_SYMBOL_GPL vmlinux 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL vmlinux 0xd027a07d marker_probe_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd03c7700 secure_ipv4_port_ephemeral +EXPORT_SYMBOL_GPL vmlinux 0xd0c05159 emergency_restart +EXPORT_SYMBOL_GPL vmlinux 0xd0d8f8a0 inet_hash +EXPORT_SYMBOL_GPL vmlinux 0xd1401ae0 inet6_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0xd14c44fa fuse_sync_release +EXPORT_SYMBOL_GPL vmlinux 0xd15b0840 fuse_dev_operations +EXPORT_SYMBOL_GPL vmlinux 0xd16712f3 crypto_check_attr_type +EXPORT_SYMBOL_GPL vmlinux 0xd17384e8 register_kretprobe +EXPORT_SYMBOL_GPL vmlinux 0xd216b682 page_cache_async_readahead +EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1 __round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xd28fb061 rdev_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xd2c7bb20 handle_level_irq +EXPORT_SYMBOL_GPL vmlinux 0xd3052479 blk_queue_rq_timeout +EXPORT_SYMBOL_GPL vmlinux 0xd3617c1e free_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xd3754990 map_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xd37b717d tcp_reno_min_cwnd +EXPORT_SYMBOL_GPL vmlinux 0xd38dcab7 rdev_get_id +EXPORT_SYMBOL_GPL vmlinux 0xd3e12a9b __rtnl_link_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd413ff4c drop_file_write_access +EXPORT_SYMBOL_GPL vmlinux 0xd42de15a device_reprobe +EXPORT_SYMBOL_GPL vmlinux 0xd488fe25 inet_csk_bind_conflict +EXPORT_SYMBOL_GPL vmlinux 0xd4a2c82c debugfs_create_bool +EXPORT_SYMBOL_GPL vmlinux 0xd4bcb2d0 __rtnl_register +EXPORT_SYMBOL_GPL vmlinux 0xd57e83e9 ring_buffer_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xd5c6b65b inotify_add_watch +EXPORT_SYMBOL_GPL vmlinux 0xd65d34a5 spi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xd6bfb2c1 skcipher_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7 schedule_hrtimeout +EXPORT_SYMBOL_GPL vmlinux 0xd7321ae6 xfrm_audit_policy_delete +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd7b4334c blk_rq_unprep_clone +EXPORT_SYMBOL_GPL vmlinux 0xd7cb5c33 regulator_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xd7ce0c21 skcipher_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0xd8333723 inet_ctl_sock_create +EXPORT_SYMBOL_GPL vmlinux 0xd83ef5dc power_supply_class +EXPORT_SYMBOL_GPL vmlinux 0xd85e4a28 skb_segment +EXPORT_SYMBOL_GPL vmlinux 0xd86059b7 disk_part_iter_next +EXPORT_SYMBOL_GPL vmlinux 0xd8a45f55 blk_queue_dma_drain +EXPORT_SYMBOL_GPL vmlinux 0xd8bac97e __mnt_is_readonly +EXPORT_SYMBOL_GPL vmlinux 0xd8f4304a alloc_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xd916a6f0 use_module +EXPORT_SYMBOL_GPL vmlinux 0xd9707bb3 devres_close_group +EXPORT_SYMBOL_GPL vmlinux 0xd9b0580f tcp_done +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda22d8be ip_route_output_flow +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdb4ebfe9 sysdev_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdba9a003 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xdbd231e7 device_create +EXPORT_SYMBOL_GPL vmlinux 0xdc3ac5f4 rtc_set_time +EXPORT_SYMBOL_GPL vmlinux 0xdc5afd34 crypto_register_template +EXPORT_SYMBOL_GPL vmlinux 0xdc82bb74 hrtimer_cancel +EXPORT_SYMBOL_GPL vmlinux 0xdc86fde3 crypto_grab_skcipher +EXPORT_SYMBOL_GPL vmlinux 0xdcbe6dde device_find_child +EXPORT_SYMBOL_GPL vmlinux 0xdcbee0f9 crypto_hash_walk_done +EXPORT_SYMBOL_GPL vmlinux 0xdcfd4424 sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xdd047510 crypto_ahash_import +EXPORT_SYMBOL_GPL vmlinux 0xdd8fe227 add_to_page_cache_lru +EXPORT_SYMBOL_GPL vmlinux 0xdda02801 register_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xddc5052a unregister_kretprobe +EXPORT_SYMBOL_GPL vmlinux 0xddda3fdc ring_buffer_read +EXPORT_SYMBOL_GPL vmlinux 0xde417b81 async_schedule_domain +EXPORT_SYMBOL_GPL vmlinux 0xde9f3373 spi_new_device +EXPORT_SYMBOL_GPL vmlinux 0xdf8374dd fuse_conn_kill +EXPORT_SYMBOL_GPL vmlinux 0xdfd6ac63 register_jprobe +EXPORT_SYMBOL_GPL vmlinux 0xdfdf6cc0 platform_device_alloc +EXPORT_SYMBOL_GPL vmlinux 0xdfe18ed0 pci_find_ext_capability +EXPORT_SYMBOL_GPL vmlinux 0xe02bb7a7 ring_buffer_record_enable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe042a391 devres_open_group +EXPORT_SYMBOL_GPL vmlinux 0xe0537706 blk_queue_lld_busy +EXPORT_SYMBOL_GPL vmlinux 0xe082c6b5 unregister_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xe08d4714 led_trigger_register +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe0db044b crypto_shash_update +EXPORT_SYMBOL_GPL vmlinux 0xe0e39728 __sock_recv_timestamp +EXPORT_SYMBOL_GPL vmlinux 0xe12eb938 blk_abort_queue +EXPORT_SYMBOL_GPL vmlinux 0xe22bf114 ring_buffer_lock_reserve +EXPORT_SYMBOL_GPL vmlinux 0xe262197d fuse_direct_io +EXPORT_SYMBOL_GPL vmlinux 0xe306066a scatterwalk_map_and_copy +EXPORT_SYMBOL_GPL vmlinux 0xe331c678 fuse_conn_put +EXPORT_SYMBOL_GPL vmlinux 0xe380a023 led_trigger_unregister_simple +EXPORT_SYMBOL_GPL vmlinux 0xe3e6ab9d attribute_container_classdev_to_container +EXPORT_SYMBOL_GPL vmlinux 0xe41e832a platform_add_devices +EXPORT_SYMBOL_GPL vmlinux 0xe420b3bb tty_prepare_flip_string +EXPORT_SYMBOL_GPL vmlinux 0xe47994fd crypto_alloc_ablkcipher +EXPORT_SYMBOL_GPL vmlinux 0xe4bb196e pci_destroy_slot +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe4f1402c bus_find_device_by_name +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe54c3c2c sysdev_register +EXPORT_SYMBOL_GPL vmlinux 0xe5696bc2 fib_rules_unregister +EXPORT_SYMBOL_GPL vmlinux 0xe581816f __ip_route_output_key +EXPORT_SYMBOL_GPL vmlinux 0xe5badded __blkdev_driver_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xe5fbc230 queue_work +EXPORT_SYMBOL_GPL vmlinux 0xe5fd3db4 crypto_spawn_tfm +EXPORT_SYMBOL_GPL vmlinux 0xe608f794 fib_rules_cleanup_ops +EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f gpio_unexport +EXPORT_SYMBOL_GPL vmlinux 0xe683732d fuse_request_send_background +EXPORT_SYMBOL_GPL vmlinux 0xe7915935 clockevent_delta2ns +EXPORT_SYMBOL_GPL vmlinux 0xe7b99939 spi_alloc_master +EXPORT_SYMBOL_GPL vmlinux 0xe7f66e68 firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0xe8789a12 eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xe8ffe790 task_current_syscall +EXPORT_SYMBOL_GPL vmlinux 0xe91fb61a regulator_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe966b750 sysdev_class_create_file +EXPORT_SYMBOL_GPL vmlinux 0xe97701a8 platform_get_irq_byname +EXPORT_SYMBOL_GPL vmlinux 0xe9cc6b95 skcipher_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea6d4e20 lookup_create +EXPORT_SYMBOL_GPL vmlinux 0xea881bae regulator_set_voltage +EXPORT_SYMBOL_GPL vmlinux 0xebcdb9b1 crypto_shash_setkey +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec371b56 trace_seq_printf +EXPORT_SYMBOL_GPL vmlinux 0xed308243 platform_device_add_data +EXPORT_SYMBOL_GPL vmlinux 0xed8102f6 __class_register +EXPORT_SYMBOL_GPL vmlinux 0xeda0f163 ring_buffer_free_read_page +EXPORT_SYMBOL_GPL vmlinux 0xedad8149 bus_sort_breadthfirst +EXPORT_SYMBOL_GPL vmlinux 0xee0aa848 spi_write_then_read +EXPORT_SYMBOL_GPL vmlinux 0xee2e3083 __module_text_address +EXPORT_SYMBOL_GPL vmlinux 0xeeb0ac19 regulator_enable +EXPORT_SYMBOL_GPL vmlinux 0xeedf4875 __audit_inode_child +EXPORT_SYMBOL_GPL vmlinux 0xef44650f bus_create_file +EXPORT_SYMBOL_GPL vmlinux 0xef4c61e2 crypto_mod_get +EXPORT_SYMBOL_GPL vmlinux 0xef4e963e __atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xef82fdba srcu_init_notifier_head +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xf01dba56 pci_scan_child_bus +EXPORT_SYMBOL_GPL vmlinux 0xf0477114 pci_bus_max_busnr +EXPORT_SYMBOL_GPL vmlinux 0xf04fa752 of_modalias_node +EXPORT_SYMBOL_GPL vmlinux 0xf06e1853 regulator_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xf102721e skb_icv_walk +EXPORT_SYMBOL_GPL vmlinux 0xf180e765 regulator_force_disable +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf1d2a42b hrtimer_get_remaining +EXPORT_SYMBOL_GPL vmlinux 0xf231a75a crypto_lookup_template +EXPORT_SYMBOL_GPL vmlinux 0xf23cf559 platform_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf253e77f power_supply_register +EXPORT_SYMBOL_GPL vmlinux 0xf281e4f6 crypto_shash_finup +EXPORT_SYMBOL_GPL vmlinux 0xf28f0e45 get_device +EXPORT_SYMBOL_GPL vmlinux 0xf29272f1 register_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xf2979a78 spi_setup +EXPORT_SYMBOL_GPL vmlinux 0xf2d1439c sysdev_driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf30f89c7 sysdev_class_register +EXPORT_SYMBOL_GPL vmlinux 0xf32fd97d spi_busnum_to_master +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf48d3e11 skb_pull_rcsum +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4a775f2 inet_csk_compat_setsockopt +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf53feb54 spi_unregister_master +EXPORT_SYMBOL_GPL vmlinux 0xf589b391 inet_twdr_twkill_work +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf66c9762 rtc_device_register +EXPORT_SYMBOL_GPL vmlinux 0xf68f83ad blk_trace_setup +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf74601a4 user_instantiate +EXPORT_SYMBOL_GPL vmlinux 0xf771f860 proc_net_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xf7d7cb10 ip_build_and_send_pkt +EXPORT_SYMBOL_GPL vmlinux 0xf80b9746 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0xf8189e83 transport_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf86acebb nmi_usable +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8b4b47a unregister_jprobes +EXPORT_SYMBOL_GPL vmlinux 0xf954b25d crypto_aead_setauthsize +EXPORT_SYMBOL_GPL vmlinux 0xf9806ed2 sysfs_create_link +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9a6ec6d user_match +EXPORT_SYMBOL_GPL vmlinux 0xf9e1eb61 crypto_mod_put +EXPORT_SYMBOL_GPL vmlinux 0xf9e45e7e pci_unblock_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xfa179c3c tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0xfa555ed9 pci_ioremap_bar +EXPORT_SYMBOL_GPL vmlinux 0xfb6618d4 part_round_stats +EXPORT_SYMBOL_GPL vmlinux 0xfba3e69a elv_register +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc3e0e34 driver_register +EXPORT_SYMBOL_GPL vmlinux 0xfc598f74 rtc_class_open +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfd3b2a49 rtc_update_irq +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfde791ca tracepoint_iter_stop +EXPORT_SYMBOL_GPL vmlinux 0xfe1f62a6 register_net_sysctl_rotable +EXPORT_SYMBOL_GPL vmlinux 0xfe3bf53c ring_buffer_record_enable +EXPORT_SYMBOL_GPL vmlinux 0xfe6458b8 debugfs_create_dir +EXPORT_SYMBOL_GPL vmlinux 0xfe649578 relay_open +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfee796e0 device_bind_driver +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff4680b1 tty_wakeup +EXPORT_SYMBOL_GPL vmlinux 0xff638876 __trace_note_message +EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb __wake_up_sync +EXPORT_SYMBOL_GPL vmlinux 0xffc04543 unregister_dimm_printer +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/sparc/sparc64-smp +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/sparc/sparc64-smp @@ -0,0 +1,8243 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/atm/suni 0xbf13d658 suni_init +EXPORT_SYMBOL drivers/block/paride/paride 0x01abc409 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x02325dec pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x1a5475b3 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x30a9d49d pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x35762c08 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x6498bf14 pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x78d4024a pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x818687c0 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x86580fc0 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xc6b7a859 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xe7be1860 paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0xecfff546 pi_release +EXPORT_SYMBOL drivers/cdrom/cdrom 0x0615ad68 cdrom_number_of_slots +EXPORT_SYMBOL drivers/cdrom/cdrom 0x13d1c61e cdrom_get_last_written +EXPORT_SYMBOL drivers/cdrom/cdrom 0x26e0b506 cdrom_get_media_event +EXPORT_SYMBOL drivers/cdrom/cdrom 0x344adbd5 init_cdrom_command +EXPORT_SYMBOL drivers/cdrom/cdrom 0x678727f4 register_cdrom +EXPORT_SYMBOL drivers/cdrom/cdrom 0x833e4252 cdrom_open +EXPORT_SYMBOL drivers/cdrom/cdrom 0x91855a17 unregister_cdrom +EXPORT_SYMBOL drivers/cdrom/cdrom 0x9dd55a34 cdrom_media_changed +EXPORT_SYMBOL drivers/cdrom/cdrom 0xaa8d62ae cdrom_mode_sense +EXPORT_SYMBOL drivers/cdrom/cdrom 0xae5239de cdrom_ioctl +EXPORT_SYMBOL drivers/cdrom/cdrom 0xc5a95237 cdrom_mode_select +EXPORT_SYMBOL drivers/cdrom/cdrom 0xf38a0826 cdrom_release +EXPORT_SYMBOL drivers/char/generic_serial 0x21d1efe4 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x3ec1a5be gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x46513eee gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0x5f87082e gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x63cad7e9 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x73e4fe44 gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x81f3f9ee gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x83d12721 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x84550bdf gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x96512156 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x9c21488a gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0xa7abbf76 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xbb36ecda gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0xbbb02f86 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0xc6456202 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0xe05a6d3a gs_stop +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x131e0fee ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x243e93da ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4b2deac1 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4c54f18f ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4e58d1fc ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x52a06eb4 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6b384505 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7f90bf30 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8a5712ec ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8e0d10ac ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x969d5b04 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xacc99be5 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb4690240 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb7ad8f80 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc115f8c8 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd16dc1ae ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe236be78 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe35d6629 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xedd086e9 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xef9c5432 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xefdc733a ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf043e3d9 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf324e74c ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x3260085b i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x35693d7d i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0214366d hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07dee633 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0a946f8a hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0fe870c3 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x17c6825b hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1937c7fe hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1bf421a2 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2501c826 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x271cfcae hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x299e0a74 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x29f6e6c8 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a303bca hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2dd8756a hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2f734fce hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x326108c8 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x34ca9cfc hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x35971d8b hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x372639d8 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3a0fa452 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3bc8642a hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3c67154c hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3f6920a1 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x419099ca hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x466024b9 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a3f3291 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4b6cd01a hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d0f2551 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d783481 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5de414d8 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e85968e hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e95beff hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6150c5a9 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x63c5fc2f hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x665a2731 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f4228e4 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x754049dc hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7c0dbfd0 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ce58bde hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86e3377e hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8d7d4015 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f354c7e hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x923845b7 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x972fc4bd hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98b4ebfa hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa784b868 hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xad2afb41 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xad3a1216 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaf2c9ebb hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xba7f3cd8 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbf006b20 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc03adee3 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc6f4edb8 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc743b0f0 hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc7d4209c hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd07f4dbc hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0bc5fec hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3fc2146 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd535d403 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd75bdb07 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd8a660e6 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdfe1443d hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf4152766 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfbbd8238 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6f597f74 ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x8b6423b8 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x9b36c672 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x757a2098 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x7eeff7de rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xaba00ed9 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb1ffc147 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb913a075 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xfe13d5c7 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x05501542 ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x08c34109 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0f2c9252 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x309aa5cb ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x321830ea ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6241b2b4 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6b90df32 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6f4b2db8 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x733059d2 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x738c2dd3 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x74f15c40 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7fbd5a25 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8c04b051 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x93bfeb2e ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x954ac19e ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb2f22364 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbf73ca4d ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0230d2f8 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x02f663e1 ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x039cbeef ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x08408de8 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ba5722a ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0d06738e ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x106510d6 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13c93805 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14b2d415 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x174dc4a0 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e88c76a ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x225e7de6 ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x266eba46 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2cb9dc14 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x33cc0aea ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3a57089e ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3c5b74d2 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x419e86ed ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4a7e9a42 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4b19d08e ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4e77aa29 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x511a661d ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x51e4f270 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x529eabe1 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x53ca8b3d ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x53e3b853 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55b05a25 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x566a7cc0 ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56fca135 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a9730a7 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x636e60cb ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x66b50a96 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x67c45cf4 ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x701faacd ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7176e763 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7414fdb1 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7da9951e ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x812992cc ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x895960f4 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8a54e8a4 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x938e94a3 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93988862 ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9f3145b1 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9fae1d11 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa2cdbcbb ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5964d47 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9d66959 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaf93b000 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc6143680 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc83bd148 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcba2c14d ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcbdded01 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd1ab9f9 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcf0c2ec6 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd519ac0e ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd8d8a445 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdce11f1e ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdfbec9a2 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdfe9266b ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe43f8bab ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe8aeb090 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xecd96433 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeff8ee89 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfa9e1e87 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfcf442d2 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd6f258b ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1923a460 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x20a91a28 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2f9fba15 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x499009f5 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5ba758e5 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5f158dba ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6fc5fe2b ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x798f3621 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8065fb30 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdc2f6843 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe0d50675 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xef7e233c ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x0ddf3c5b ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x469d4fc6 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x70d693c0 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7e144573 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x886d04dc ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9fbf9a86 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xbeb76543 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc8bcb4f6 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe6307f78 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x06030e4e iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0dd6ee17 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x543d08f8 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x79f1527e iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa105653a iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbc19b431 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xed170e73 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xefa880b0 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x018954a4 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1cf16c62 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3406d88e rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x445da905 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4e6a5788 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x52036424 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5615e6d8 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5c126068 rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6a59ded5 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7986774b rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7ed0ff85 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x95e0784f rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc7e5d41a rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc9106c8f rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfa8e3fba rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfafe39fb rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfc56125c rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfd81dcc2 rdma_set_ib_paths +EXPORT_SYMBOL drivers/input/input-polldev 0xa8640d8e input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xb0eaf777 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xce85c4bc input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xf2d2448b input_register_polled_device +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x104a4a5b capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2766c0a1 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2848c31a attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x37271e82 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3afd07e7 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3c0d649f detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7c61679b capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x869aab02 capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc95a121a capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd1d9d75f capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf774d3a9 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x161d8afb register_isdn +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x023614f3 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0c8d66fc mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0e7a9f33 mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1e1bc3b5 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x213ffba8 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2e92779d l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x49cfb0f2 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x501176b0 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x613e43a6 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x66587d81 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x77c92ae2 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x864f1258 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8769709a recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x88801c3e queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9fddb0ad mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa790e218 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaa42fd6b recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb9c23265 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbc05ebc3 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc8dafede bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc9d0dcdb get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf8fed085 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/md/dm-log 0x7f05c7d2 dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-log 0x8ffc644f dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-log 0xb3a6ec2a dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-log 0xce97347b dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-mod 0x1c79c8ef dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-mod 0x21b63177 dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-mod 0x3afd1441 dm_register_target +EXPORT_SYMBOL drivers/md/dm-mod 0x3cee461f dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x43c70ad6 dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x4dbd4abe dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0x5169e78c dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0x5f0d90c1 dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0x77714a21 dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x7884d079 dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0x80b34f04 dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0x8b392c07 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0x9e93ca39 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0xb04b1518 dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-mod 0xbb4b11e7 dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0xbd1baa2e dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xcd8182c0 dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0xcf42c47d dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0xe167b8cf dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0x4c20c9bf dm_exception_store_create +EXPORT_SYMBOL drivers/md/dm-snapshot 0x5122a5fc dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/dm-snapshot 0x8635c9a1 dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/dm-snapshot 0xd879458f dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/md-mod 0x0776a718 bitmap_endwrite +EXPORT_SYMBOL drivers/md/md-mod 0x27e00a20 bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x31f386c4 bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0x32b4ec3c bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0x33884def register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x3806fad7 md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0x3b91f945 md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0x3f03705b unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0x5e738359 md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x5e96bbd9 bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0x83fc6d62 md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0x8a7ce87d md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0x90baa9bb md_write_start +EXPORT_SYMBOL drivers/md/md-mod 0x967013e1 md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0x988260c5 md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xa7db5df0 bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0xacf56b8e md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0xc73da768 md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0xcab010e2 bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0xcc64ac3d md_error +EXPORT_SYMBOL drivers/md/md-mod 0xe330ecd0 md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xeaea7c2d md_wakeup_thread +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0x7b85d712 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xeb2eace6 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x1b9f00a1 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x017e9e41 xc5000_attach +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xd9454829 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf97d124a cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2a2ffa8c gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x3cc6a083 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8251c4b3 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x92f15903 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa945735b gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x22c0f7ac saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3308a09c saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4e34d549 saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x54e986b2 saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5cffcf1a saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb6b1a5c8 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd29586ff saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd5ca8e89 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe4e2772d saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xed043625 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf742a338 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xff70a8f6 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x07d9d135 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2312fc33 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x38ed2138 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x51d55f4e soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x5477478d soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x6b652c6e soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x8efbd8ad soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xc9992b36 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcab4994c soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x20cdf422 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0x4386bce5 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x24e4fd4b v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x353cc8b5 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x92e6ffa6 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videodev 0x039ebf14 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x2acf6b42 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x38c01ad6 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x54104eab video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x7e8cff25 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0xa47a31df video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0xa95c1ea2 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0xd2bc8dd2 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xeaedc45e video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x10fdd0ca mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x12375d7a mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1418aac9 mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1ed440e1 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x434ed963 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x56130d6e mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x576a33b3 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x591e1c4c mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x59ad759e mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x655188e7 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6d02d66f mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x803cee9b mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x837d9985 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x946945c0 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa2f569e0 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa7a0d015 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa92314dc mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbbd75ea5 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc446ae97 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcfe4d913 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd097bfca mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeaffe2af mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xece30baa mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xef246db7 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf91c48b8 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfe5a4e84 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1d84110c mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x26a64b0a mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2f3ec974 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2f53fdbb mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3d69a891 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3dff36b4 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x540dd0b1 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6aac8dd1 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6d918cad mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7837177e mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x95a4d38d mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9b76093c mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa24a5143 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa7b5705e mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbbdbb15a mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbc062f24 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbf3cd4db mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc11015b2 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc3a34569 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc8219282 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdf397494 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeca7d47c mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xef3c0309 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfad5a5f3 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0b9c313c i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x14038764 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x15031501 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1c088fdf i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1d60cc6d i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x440703f5 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5efa55b1 i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x600ed81e i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x68eff3ae i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7e5020d2 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x98434c0d i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9ec68919 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa3c8dd93 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa4270ac4 i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb404a6ce i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb823ed50 i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbeb13426 i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc4016306 i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd2e7d6b7 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd958a27f i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf522699f i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf7c34859 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x22afd99a ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x679d4e5d ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6b77387a ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc0c5cc3c ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc6db0664 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe4e12387 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe64ec10f ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xef363dbc ab3100_set_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x2b6e68cf pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x4d21a396 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x18988868 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xef0abf5a mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x04838b98 c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0xb62beed0 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0x3dc25c80 ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xf69d8cfa ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x1644ad7b tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0x1967a131 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x1a97a07b tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x5aadb568 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x5c182545 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x5f4e092f tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x67798453 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x6a1209e7 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0x8ee0991c tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x956d4f6a tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xbf322248 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xc869d69c tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xa6e1710d mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x23c00fd4 mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x34bcf4a4 mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3e2b721a mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x44819b2a mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x48ca195c mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x52dd964d mmc_alloc_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x631b38ac mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8e6f8971 mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x921fecf8 mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x944c7671 mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc44c412e mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd19e1d95 mmc_add_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd35df97c __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe3044141 mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe56b2be1 mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x50683bdc mmc_spi_get_pdata +EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0xb6eb2b49 mmc_spi_put_pdata +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x1a7ff703 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x7f833423 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x926994c3 cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x820c0b04 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xaa4a25ab map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb2a52913 unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xce7eb655 do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x4ec800f8 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x0d2c2312 lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x60e52ac3 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x622507b6 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf5b5fdec add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x0d50ac8b mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x4b907955 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0x6eee2175 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xdf5ecfc9 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x43f859bb nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x47cdcd83 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x98fd8bfc onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x9bafa89c onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xb4510abb flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xe4f6e372 onenand_addr +EXPORT_SYMBOL drivers/net/8390 0x4b05226c ei_close +EXPORT_SYMBOL drivers/net/8390 0x5160162c NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x583b0a6b ei_poll +EXPORT_SYMBOL drivers/net/8390 0x93a9067e ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x99af6394 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0x9dc30bf0 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0xa91b8695 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0xac901786 ei_open +EXPORT_SYMBOL drivers/net/8390 0xbc47a080 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0xd4b87ed6 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/bnx2 0x248bb205 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0xf61e931e cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1d7b1489 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x263dc04b cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2c1d60e1 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4308aee2 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4984e4e4 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x547c0db7 t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5f191cf8 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7473a776 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x87d2b2e2 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8b0c9a77 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb12dff39 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xca701a48 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xce217e3d cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xde2949ef t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe176a869 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfff3d4bb cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x0bcbd0f3 mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x3395b711 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x53b7b3fb mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x731297e1 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xa91840a9 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0xcc3851c1 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xd5a95b7b mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xea352b0f mii_ethtool_sset +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x71ac51fe free_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xc314ba1f alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x0418f848 ppp_register_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x262e9cbf ppp_input +EXPORT_SYMBOL drivers/net/ppp_generic 0x40a94d3e ppp_register_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x4d8c7d5c ppp_unregister_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x5839cf17 ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x8d87cfc9 ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xb99870ad ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0xe9019b6b ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0xf50e1ec2 ppp_input_error +EXPORT_SYMBOL drivers/net/ppp_generic 0xf628c31e ppp_output_wakeup +EXPORT_SYMBOL drivers/net/pppox 0xcc758241 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xd14e1caa pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xddc8125f register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x2278e94b slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0x26b760c4 slhc_init +EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0x62538167 slhc_toss +EXPORT_SYMBOL drivers/net/slhc 0x7e87227e slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7 slhc_uncompress +EXPORT_SYMBOL drivers/net/wireless/airo 0x6faccb3c stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x83ac1d3f reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x875a0741 init_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x41d96184 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xa2a0a545 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x36bd717c stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x44365dc3 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xfd0bbeb9 atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x03ab4811 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x14547a70 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1fe73123 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x20f64153 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x39985927 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x39f983d9 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x40c85bf6 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x46d7ad5e hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x559d234d hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x57fd4903 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x70aeb567 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8fd11837 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x935c0a4e hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x949bec4e hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x97ece51e prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9c2a96ed hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaad457b1 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xab3fa590 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xad23c396 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb0db90c0 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc98abd97 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xce271ae9 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd49fb5b7 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe06cbc94 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe973a48a hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1484bbe8 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x22d8914f ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x27cb5a14 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x28945ab5 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x327d1ac8 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3512ccfb alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x485a2287 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4ae05afc ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x624ad882 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x73c2547a ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7715a658 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x77ca62e9 ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa056beee ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa0992caf ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xac5bcee9 ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb398f90a ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbab356b6 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbb33e5bd ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbbcd5df7 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xeac2115e ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfa894d60 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00ceb37d iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02f15af1 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x044a870e iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x056a4a42 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05d33d31 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x064be53a iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x06cdcffb iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07639582 iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x091d8253 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d2a4f13 iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0edcaa34 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x180b8d7c iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ea6cfc2 iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x205dbd39 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20bdd715 iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x228a11ed iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x23a82ce5 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x28542a34 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a002191 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cfeb43d iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d0cf6bc iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x31a05985 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x325ed179 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34872f33 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x355ac20c iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35f11bc7 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38f17e03 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b404221 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3ba585aa iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3bca5c02 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3df0f817 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x407dfab5 iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43a4b042 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x449add3e iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a512a9b iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b5bc15b iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ca383df iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x508cb68d iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51f241e3 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x53650773 iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54017b90 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54235952 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5487267d iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x549fdd86 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x55d9c6dc iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56e50031 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59d0da00 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e262d81 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e5f9a7d iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x638dd843 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x642ef412 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x667d35f9 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cb15468 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cb41ba5 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ea3ba29 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x706a8a36 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x714e85c5 iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x771975ed iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77d41920 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a52d67f iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7dbb8354 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7dc97180 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7eb209d5 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f82dac1 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7fd5a75f iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8046222f iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82ecd5cf iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83ca708c iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84ff0e1a iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x858c7aa9 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8858c935 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b3c449f iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c488572 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ca678ac iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8d9cbc2e iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e541db8 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e865bec iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91cd5719 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x922fd118 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9452ad4c iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95010b3d iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95c1fe2a iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97426a4c iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9784bd6f iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x985e9a5d iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b85cc3f iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d97b2b6 iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ea25a92 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2179a21 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2b69f75 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4573b80 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4eb3625 iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa5dfb197 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa62ba532 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7402c02 iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaa60bef4 iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xacecfcfd iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb028da78 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb078cb45 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb42418a5 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8e1b107 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc2f2d4e iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc6cadc4 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfdff597 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3971ed8 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3b76297 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3f80c5d iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc565ad53 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9b778eb iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcaca96e7 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd08dfd4 iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcfcec8d2 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd08597a7 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd594f09a iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7455833 iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7621c23 iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7956ede iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc7ea2b9 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd12e9e1 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe154fb6b iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1b86c78 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe23b0146 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe240f452 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe28bad7d iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe85827bf iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8bebb27 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeaf514f6 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeb8d5a93 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee0a803d iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeeb9ecda iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0de5a31 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5671601 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf57f85ef iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf7857efd iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfaf86ede iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb89b94b iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe447905 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x02d95398 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x10fc937b orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x7affac23 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8230f038 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe978c116 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x04aea283 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x096e7b65 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x0d9c2f96 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x138db59b parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0x1b92798d parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x1bea654a parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x2e8f9519 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x33d05830 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x3588a59c parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x409b4814 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4d37bdd2 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0x4ee5891b parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x63336b5b parport_release +EXPORT_SYMBOL drivers/parport/parport 0x74034748 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x7a5fd1b7 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x8be36040 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x971cdd69 parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x99cb961c parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x9acd0fc8 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x9bdc2c2d parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xb04def85 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0xb12fd4c1 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xcebee92e parport_write +EXPORT_SYMBOL drivers/parport/parport 0xd018f7dc parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0xd0bc0f35 parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0xd32937fe parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xd5f55d66 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0xf01843c1 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0xf74d2493 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0xfeb255bc parport_read +EXPORT_SYMBOL drivers/parport/parport_pc 0x3977ff81 parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x9f2440c5 parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x051a17d3 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1cef1425 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1db117b6 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x27c430fc pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3113b020 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3d5cf6d3 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x553e905e pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x76469608 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7cb02195 pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x82e3092f pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9391eec8 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc6716d73 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcfcd1c91 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd693a4b7 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd7766092 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x07b5097e pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x096c8bad pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0a3058c8 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x18aaccab pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1a399911 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1c1f30bf pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2bf1c060 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x37c22032 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3d4a7734 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x638b9011 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x69015e7c pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6dfdbfb3 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x700d0e5a pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x71ed55f9 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x88d6bed6 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8942602d pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x919f84ba pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x965aa08a pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9b0e90d2 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa2775ecc pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaa2dbbc2 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaa685281 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xab193ece pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb3226cdd pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb540cc2d pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb612dc1f pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc4020bb5 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc8c80f43 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd3b6897c release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd4a429a2 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf86b74d9 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfa43b999 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfe8c2b49 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x9fe9e131 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x0e69eac9 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/sbus/char/bbc 0x0e667316 bbc_i2c_write_buf +EXPORT_SYMBOL drivers/sbus/char/bbc 0x1dea2d8c bbc_i2c_readb +EXPORT_SYMBOL drivers/sbus/char/bbc 0x58c019ee bbc_i2c_getdev +EXPORT_SYMBOL drivers/sbus/char/bbc 0x7e88219c bbc_i2c_detach +EXPORT_SYMBOL drivers/sbus/char/bbc 0xa93e519d bbc_i2c_attach +EXPORT_SYMBOL drivers/sbus/char/bbc 0xb9ad8a82 bbc_i2c_read_buf +EXPORT_SYMBOL drivers/sbus/char/bbc 0xe0a5c61d bbc_i2c_writeb +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x0d129162 scsi_esp_cmd +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x658a76c9 scsi_esp_intr +EXPORT_SYMBOL drivers/scsi/esp_scsi 0x8db9ab3c scsi_esp_template +EXPORT_SYMBOL drivers/scsi/esp_scsi 0xababfc14 scsi_esp_unregister +EXPORT_SYMBOL drivers/scsi/esp_scsi 0xc791b564 scsi_esp_register +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x03756d56 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x27350b4c fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x70d932ab fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8244d9cb fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x977c26a3 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xa8dfb743 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xcd0c6a62 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06f91d96 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x07101b60 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f77892a fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x10e72c73 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x130bc24f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x175d3950 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x20c09c32 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x253afc22 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x283d7f52 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3ba96007 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3bbf9094 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3eba297c fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4481e108 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x459fd9a0 fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x46953455 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4753122e fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x54cf40b2 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5d677c81 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6eb6dd0a fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x747f2f30 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7a1cb1bf __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e1b9076 fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x85d12660 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8fdf056b fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x94088973 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9883ffdc fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1ca3e41 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa90e3ec8 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb37f93d6 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb3c6443e fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbbee3b59 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc5fd1948 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xca886756 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdff2628e fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe6a9b20a fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe85c16eb fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeeab6d24 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf22316db fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf5a44669 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf8ab7e09 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfa5ada2c fc_lport_reset +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x336818d8 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x09e1a827 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2b9a2c77 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2fa2aaff osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2fc3d308 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3ea2ffb3 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3f6f5c27 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5417f66a osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5d6ee1ac osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x63355919 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x64176ee0 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x66a74409 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6deb58db osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6ea82efa osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x717360b8 osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x82f35929 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x85a2e7f9 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8c75ce1d osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa00fa8f1 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa64fbb1 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xae900d5b osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb79553e2 osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbb80ae98 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc650fe37 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd80927a2 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe0655e94 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe710fde2 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe9cd3619 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec35af83 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeeae3f0b osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf5ed2b28 osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfbccfdf8 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfe7c3cf3 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/osd 0x09bae294 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xb796d6eb osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0xc1ce30d4 osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x0b2bdd43 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x27b226d1 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x2ade075e qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3ea55608 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd79ba825 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xfd44c0e6 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/raid_class 0x0f01ebc3 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0x3cbe6ec3 raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0x92d939ae raid_class_release +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x017fdb36 __scsi_alloc_queue +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x04029c0a scsi_mode_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x056cda9e scsi_release_buffers +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07479c06 scsi_target_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0d3cf518 scsi_eh_prep_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x10f89b95 scsi_host_alloc +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1127a16c scsi_get_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1862c596 __scsi_iterate_devices +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1aca9959 scsi_nonblockable_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1c1e8cc2 scsi_host_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1e0122ca scsi_device_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x22055cae scsi_remove_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x243c1fd7 scsi_host_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x26dacaba scsi_target_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2aeb3dbc scsi_prep_fn +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2dcc2e3b scsi_bios_ptable +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x30cafc49 scsi_block_when_processing_errors +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x31815134 scsi_setup_fs_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x34a09a9d scsi_report_device_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x39006f74 scsi_rescan_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3cdfbbed scsi_finish_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3eb98762 scsi_unblock_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3ffde287 scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x42b75564 __scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x451a646f starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x474503fc scsi_set_medium_removal +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x48ba244b scsi_reset_provider +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4b241d14 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4d4d541a scsi_register_interface +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x50201e82 scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x503d8aca scsi_eh_finish_cmd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x53c113de scsi_report_bus_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x544d3ff1 scsi_dma_map +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5b476699 scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5c5faf17 scsi_execute +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5cf57882 scsi_prep_state_check +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x629a3863 scsi_register_driver +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x64127283 __scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x64ded098 scsi_device_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x70185e1a scsi_register +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7769aceb scsi_free_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x788481ce scsi_remove_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7b43b459 scsi_command_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7be376b2 scsi_scan_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x812db618 scsi_device_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x83fdae5b scsi_scan_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x890d1ccb scsi_is_host_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8cfb07ec scsi_is_sdev_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x92e9d700 scsi_print_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa4de93b8 scsi_get_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaa0b3ff3 scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xacf3a0c5 scsi_unregister +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xadbbe2dc __scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaf60717d scsi_block_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb51ca4a0 scsi_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb671afa9 scsi_free_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c62b40 scsi_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbaedadd6 scsi_adjust_queue_depth +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbbb1b7d4 scsi_host_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc0b4acca scsi_prep_return +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc24d1daa __starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc5e9629a scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc7555ce8 scsi_add_host_with_dma +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc9b715f1 scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcae4cc88 scsi_device_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcb13c9e2 __scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd73e6bbc scsi_is_target_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdda6b798 scsi_track_queue_full +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdebfc0f1 scsi_device_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdff98aa0 scsicam_bios_param +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe01ff9d5 scsi_host_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe16143e0 scsi_dma_unmap +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe2c25d59 scsi_execute_req +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe530ed7c scsi_allocate_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe70bccdd scsi_test_unit_ready +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a int_to_scsilun +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea390781 scsi_get_device_flags_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf1d38d85 scsi_init_io +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf22cfc13 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf496c83b scsi_eh_restore_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf4d07f90 scsi_calculate_bounce_limit +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfbaa41e3 scsi_kmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0cef4b71 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x15c204d3 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x164eb02f scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x28e591f0 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x32eec636 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x67905730 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x93cf1df0 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa5cf1a64 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa93e3a6b fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb4c3b230 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbcfe630b fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd0101e20 fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x015d91c1 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x05a929ba scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x19b861e1 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x21bd87b9 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x26a57c59 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2b8bc85f sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x39003a93 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3cca459d sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x47933399 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5abc681d sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x616d2729 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x659a0031 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x661efff2 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6de168ef sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7ac490e0 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7e2a2483 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x84898620 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x87322651 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8ef9c8fe scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x96f1fd8b sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xae035bf7 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb23a0e27 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbe19a01f sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd63f9586 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe926ff8f sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xeb7bdb52 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x49c961ac spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x6662489d spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x6dbba847 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xd88ef504 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xed17b76f spi_schedule_dv_device +EXPORT_SYMBOL drivers/serial/8250 0x8059dfad serial8250_register_port +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/ssb/ssb 0x04903b66 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x05083161 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x0d2fdabc ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x2c5f0d48 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x43dbecdd ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0x5339db21 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x697686bf ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x7bdeca2b ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x8694010e ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0x927b9f3c ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x9ad327e2 ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc4c75feb ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xc819450b __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0xcaca8a4e ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xd61474d5 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xf1c1bcd2 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xf5c36ae7 ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xf7fe422d ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xfb2eb35f ssb_bus_suspend +EXPORT_SYMBOL drivers/telephony/ixj 0xbd3d086c ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x33f6e4a5 phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0x4198dc19 phone_register_device +EXPORT_SYMBOL drivers/usb/core/usbcore 0xc9bbdff6 hub_port_logical_disconnect +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xcc60538a sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x9165ecf6 usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xabcb50e4 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x8fa541db lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xe0e62df4 lcd_device_register +EXPORT_SYMBOL drivers/video/display/display 0x0ed70678 display_device_register +EXPORT_SYMBOL drivers/video/display/display 0x9ba2c8d5 display_device_unregister +EXPORT_SYMBOL drivers/video/output 0x1e6a5923 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0xf577dba5 video_output_register +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x03b021b2 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x2deb68f8 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x41fc7a3c svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x48431b18 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x9fa04f13 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0xa8a3f320 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xd94e6131 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/syscopyarea 0x4e8c587c sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0xfed1dfae sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x9bdd803e sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x540169a2 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xd874b022 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4865841f w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xc0a36771 w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xe94dae2c w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xeede6527 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x061cb100 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0x1fe1c6f7 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0x9ca86c26 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xf5da2122 w1_remove_master_device +EXPORT_SYMBOL fs/configfs/configfs 0x20308054 configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x2cbca989 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0x32d87166 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0x37348641 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x3f18c1ec config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x562fb547 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x5ea1ec5d configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x6177ffdf config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x9a904eea config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xa7dc30c1 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xbb65580f config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0xe44061e2 configfs_undepend_item +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0dd2b8d7 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x1516c541 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x17da5a01 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x1aa39eb9 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x1eab7c12 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4a09c35d __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x53fb0bc5 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x5a184abd __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x63db6dd2 fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x696bae61 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x82f53aee fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x9463f59b __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x968033b2 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x97d34719 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xaa73ac03 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb011f6f7 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xb155fa44 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0xb5648b3b __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbd35991e fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xc940ff9b __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xcede90d8 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0xe2d23fec fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0xe54a6eeb fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xf89b5807 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0xfe43c54d fscache_fsdef_index +EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533 nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4 nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/quota/quota_tree 0x1e22a7de qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x4a076fab qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xe9220bad qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xefd2334a qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xf7f89253 qtree_release_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-t10dif 0x782acba5 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8022 0x1f03109d register_8022_client +EXPORT_SYMBOL net/802/p8022 0x93ffd4dc unregister_8022_client +EXPORT_SYMBOL net/802/p8023 0x37a52596 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0x88967c50 make_8023_client +EXPORT_SYMBOL net/802/psnap 0x1e6e32a1 unregister_snap_client +EXPORT_SYMBOL net/802/psnap 0x750112fa register_snap_client +EXPORT_SYMBOL net/9p/9pnet 0x0212b365 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x02fdcb00 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x0a711a53 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x0e079d97 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x1a13b03b v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x241e24ae p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x27f897f3 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x29244a65 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x2e23630f p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x34973100 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x3a2abad6 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x42c13b1e p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x440cc2ea p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x50c3bb7b p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0x654314c9 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x6de73c03 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x72fc195f p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7d43884c p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x7f91b8f6 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x80ec8270 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x8435a2e4 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x85b71482 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x86d4ec52 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa00e380a v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0xb1968e77 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xf4181eee p9_idpool_get +EXPORT_SYMBOL net/appletalk/appletalk 0x69d3cff1 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xd2eded60 aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xe3607e2a alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0xf5aa2f54 atrtr_get_dev +EXPORT_SYMBOL net/atm/atm 0x09921f87 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x1a7857d5 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x1e0dfcf0 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x35569915 atm_charge +EXPORT_SYMBOL net/atm/atm 0x3b2e74f7 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x42d8b161 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x57d0ac33 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x7d08cde1 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x81fba410 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x8852700a atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x90a4d9cf vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0xa35720c8 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/bridge/bridge 0x36056398 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x8a11fa26 ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xa85fd49b ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xbcbe071d ebt_do_table +EXPORT_SYMBOL net/can/can 0x83d6603b can_send +EXPORT_SYMBOL net/can/can 0xa151b457 can_rx_unregister +EXPORT_SYMBOL net/can/can 0xaf3bb66c can_proto_unregister +EXPORT_SYMBOL net/can/can 0xdcdf7975 can_rx_register +EXPORT_SYMBOL net/can/can 0xe7d281b0 can_proto_register +EXPORT_SYMBOL net/ieee802154/nl802154 0x2cb00bf5 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x3bed6ab1 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x458712e3 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x5967919a ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x7bc21bd9 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xf9ffb88f ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x399c5ff7 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x4d24dcdb arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb7bf2ab8 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x1f016557 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xab5a80a3 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xe5dc9450 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1c3f2b9d nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1fdfdef3 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x5061611b nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x55f6f270 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x88356ec8 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcb20bcf8 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd2d94ba8 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/tunnel4 0x27cdf1a7 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xdce468c7 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/ipv6 0x03e670c8 ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x04666a32 inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x0b7005f3 inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0x150ddf97 ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0x1bfec731 ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0x21db632f ip6_frag_match +EXPORT_SYMBOL net/ipv6/ipv6 0x2d248132 inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x322469c2 ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x359851b8 inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0x3c1aa36f xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0x4f1711aa inet6_del_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x4f22d1c8 inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x5964f877 compat_ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x695d5a22 ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0x85202d15 ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0x89b7dd52 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0x8c932012 ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0x903d77a3 rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0x95973b3d ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x9d6c0cee icmpv6_send +EXPORT_SYMBOL net/ipv6/ipv6 0xa7c6150b ndisc_build_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xac955a5b xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0xae63c377 ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0xb363633c in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0xb377d40d inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0xb7bbe017 xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0xb8c24e15 ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0xb94547e2 compat_ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xc22028d7 xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0xc4ff1794 ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0xcd5e8558 ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xd85456ba ip6_route_output +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xe731dd37 inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0xf49bdb1a nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x417d081c ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x703760ae ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x71ed035b ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x9e82cbc8 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0xc3c4cf3d xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xfc384438 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/llc/llc 0x2b527aa0 llc_build_and_send_ui_pkt +EXPORT_SYMBOL net/llc/llc 0x2cc1d1bb llc_sap_open +EXPORT_SYMBOL net/llc/llc 0x38b92846 llc_remove_pack +EXPORT_SYMBOL net/llc/llc 0x4156969b llc_set_station_handler +EXPORT_SYMBOL net/llc/llc 0x45980937 llc_sap_find +EXPORT_SYMBOL net/llc/llc 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL net/llc/llc 0x5f69c2db llc_sap_list_lock +EXPORT_SYMBOL net/llc/llc 0x61b8bc09 llc_add_pack +EXPORT_SYMBOL net/llc/llc 0xa9f13ee8 llc_mac_hdr_init +EXPORT_SYMBOL net/llc/llc 0xdd155175 llc_sap_close +EXPORT_SYMBOL net/mac80211/mac80211 0x02104f72 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x035402d8 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x12317cb4 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x181dd20c __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x34388493 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x3647e886 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x38f9bf8e ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x3bcda60f ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0x3e3e84c6 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x402591f4 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x4275ef3c ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x5acfe89d ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x5c688897 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x5f29b5ac __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x627fda9f ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x69410306 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x7b74cc44 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x7cbed480 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x897820b8 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x8d9d40ac ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x8f571cbe ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x92bee287 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x92fdf245 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x9b9962e6 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xb60e8b06 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xb9d27ef1 ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xc979dcb2 ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xcf3b5615 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xd5cf75f8 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xdaa2c91c wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe1d5b603 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xe1e92d47 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xea43de04 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xefc921a8 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf342a431 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0xf576ec9d ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xf5d4d5fa ieee80211_stop_queue +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0c250e34 unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2bc81f40 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5a14954a ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6bb6f646 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6eb7bc0a ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x82d67a62 register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8cb154ed register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xacffa8a1 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc1de41bf ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xcab98adb unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf1e53b91 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x0e29add1 __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x455c71d3 __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xd561dc92 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x02c5a6c8 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x0d7ef83e xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x4099cda2 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x5988d9f4 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x696bfc19 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x8d23c665 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x95667f44 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xd4f6925a xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0xdb0e029c xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xea404d35 xt_unregister_targets +EXPORT_SYMBOL net/phonet/phonet 0x1d7af275 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x39ce7caf pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0x3f5116b5 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x5d0da09b pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0xa54ecec8 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0xd8e9043b pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0xe3d3d417 pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0xffc873c2 phonet_header_ops +EXPORT_SYMBOL net/rfkill/rfkill 0x0172ade7 rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0x0754aab7 rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0x295bc1e5 rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0x2c1621dd rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0x599c279d rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x631f96d6 rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x6c9f8be2 rfkill_set_hw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x82a25cfe rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0x843bfab6 rfkill_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0xbd752516 rfkill_set_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xc822a93e rfkill_blocked +EXPORT_SYMBOL net/rfkill/rfkill 0xc9d77674 rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0xea56ba44 rfkill_resume_polling +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1bd946a2 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x26c40324 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4b12425b rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x52d37d08 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x65357fcc rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x72622b22 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7e4990fb rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8a372f06 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x94d8b326 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9e5fd056 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb3198611 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb7963a60 rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbb6614bb rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf14920e6 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf45b64d3 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/sunrpc/sunrpc 0x789aebb6 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x006eafdd tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x09a8091b tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x71d0575a tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x737e1d2c tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xa7dae016 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0xa8d30fbd tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xaf37f87d tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xd81f72e4 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xd962f86f tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdae314c8 tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xf11053ee tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xf2802f39 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xf944c948 tipc_recv_msg +EXPORT_SYMBOL net/wimax/wimax 0x57905d24 wimax_reset +EXPORT_SYMBOL net/wimax/wimax 0xbd14519a wimax_rfkill +EXPORT_SYMBOL net/wireless/cfg80211 0x050dc77e __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1b688466 ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x21fa1f90 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x263bfb6c cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x2cdb685c wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x321fb94c cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x34b0412c cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x37e93534 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x41a4f6bd cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x4966c853 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x533cb3a4 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5b2668b5 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x697c2bf3 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6caaec53 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x6e4fcf7c wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x784da841 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x838d6f1c cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x8e56355b regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x924a06f5 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x9a00c5e6 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0xad52766f cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xc8841f26 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xcd8b2e47 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xd0397ce7 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd305f17f cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xdb6b293c wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xe1d35bfc regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0xe8df86c6 ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xfaff09e4 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0xfe7842d1 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/lib80211 0x00836a2b lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0x0239f320 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3c8925a1 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x420b95cd lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x5c0d2e03 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x9fa7c288 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0xc9140580 lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0xf3991a70 lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x38862d8b ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xebaf6bd4 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3939187f snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5190a0ee snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x61ebd3a0 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xd69419d7 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x72473466 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc00ba606 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x22b99667 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x42a6fdda snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x48f7eed6 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x521cf955 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x81942dc7 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8c05c55e snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd7f93dcb snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xed92fb9a snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xe49c7b8a snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x03d1f346 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x137e386a snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x16c9e700 snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1c28c275 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x1f659048 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x23009c3d snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x35c187e5 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x3634a8b9 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x408a41dc snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0x43282b1a snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x4391c973 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4ad52723 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x4d228da1 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x51be4d29 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x52c9d71f snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x584ef429 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0x585236a2 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x657c8bb0 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x65d8effb snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x6e7e3ac6 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x700df102 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x71be96e9 snd_card_register +EXPORT_SYMBOL sound/core/snd 0x78e19b68 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x80db07bf snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x9644177d snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x9767b11c snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x99365bb2 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x9fc39431 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xa512715a snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0xa7a55819 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0xa9e0cda8 snd_device_new +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb4c0df2e snd_device_register +EXPORT_SYMBOL sound/core/snd 0xbc16a7ea snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0xbe07057a snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0xbf1fc37b snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0xc140bb03 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0xcaa3fff0 snd_info_register +EXPORT_SYMBOL sound/core/snd 0xcb4ac56e snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0xcdbc1af3 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xd800b5e5 snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0xd9928325 snd_device_free +EXPORT_SYMBOL sound/core/snd 0xdbd0eff5 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe2de26ca snd_cards +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xf705caf3 snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xf740faf4 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xfc1f2494 snd_seq_root +EXPORT_SYMBOL sound/core/snd-hwdep 0x162056ed snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x2c768096 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x70f73d9a snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xba6c73a1 snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xe135ec2e snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xeb0490e6 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x03db0f65 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x07fec06c snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0x0844cfd1 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x127980c7 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x1ca76514 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1df14034 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x1ebcdb7a snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x26b6de22 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x26e766fb snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x2cb9b5f7 snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x2e0d3d92 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x2f7f6d2a snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x3182a174 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x3349567c snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x346d8006 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3cdc5caa snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x473d0daf snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x622ab3d8 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x63289969 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6cbc9c83 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x6e9a5117 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x71eb6dc0 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x7e6cd5b9 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x87744c80 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x8913fa97 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x91afa81e snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x91f1fcc3 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xa7f52c5d snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0xb3328b95 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0xb47e2d3d snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0xb8ea83de snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xbb4845ac snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xbde44ced snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xc9acc022 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0xcf12dbaa snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe5439e0d snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xeef29799 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1cb1cf61 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x3acd2d5a snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x3ce1aaa6 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4a243fe3 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5993d080 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5ee0c988 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x6f3aa50b snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7b099ca6 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa97eeb5e snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb4938557 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xba931b6a snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xbbea8cd6 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0xc4f42598 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd4462b9b snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xec0f403c snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xec6079c0 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf7458fbf snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-timer 0x01e32c85 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x13456f26 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x2ba0a85d snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x2c898a26 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x4cba8950 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0x52a8a542 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x62a311c5 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0x6fe6a7a3 snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x93c5426b snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x9823f603 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xcec0feaf snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xd387a341 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xf26fbf78 snd_timer_start +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x3e21bf02 snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x168f8623 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1ef5a8a7 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x20bda1ed snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x46852dcb snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x570e4fe7 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x610c236a snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9603921b snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa8df1241 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xee8d6bf8 snd_opl3_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1bd73991 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3299c956 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6824885c snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6cbd6abe snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x85981383 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbbb085a3 snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcb0f421a snd_vx_free_firmware +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0b57ca99 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x16349123 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x864ff8c5 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x94f5b449 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xb9922a27 snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xeb32aeeb snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x46b679c0 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6a1234b6 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x787aa964 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x7c76dfe3 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x7fb66b82 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfca63a65 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x5d11784e snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x6548569c snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xf1df5399 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xfdeb499d snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x4c689b33 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x8fe0ee36 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x47754490 snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x5a296bd7 snd_tea575x_init +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0f21f9a8 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x40ad0713 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x90bdcc92 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd5359804 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xf4af9122 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-i2c 0x0070ec31 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x1a68bf36 snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x2daf27c2 snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x60ffe607 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0x698548b4 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xf992230d snd_i2c_readbytes +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x39d77eae snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3b4cc2c0 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3fd35506 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5218f315 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5ea1b158 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6db8843e snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x86a079b8 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x89d502c4 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x90eebf61 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa323eef3 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xab00fb18 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xcfd202c0 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd4f8fbe3 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdea8c1ea snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xeee47386 snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0b94405e snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0c980d26 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1670f3e1 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1aa2bc5c snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x43d887a9 snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x681dfc84 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x769f1aff snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x99a04023 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe3a243b4 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xddc7479e snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x3355ea27 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x3c7260de snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x8f27bc76 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x01300411 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x0f33353c snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x671148f0 snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x74698566 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa2041b12 snd_trident_start_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x4d9ddeff uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x5ddddd31 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x80235db2 register_sound_special +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0x9b4ee193 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xab2e0d12 register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0xb36c45db sound_class +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xefb4a5ca register_sound_midi +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x124e5d36 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x9dfade8e snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x9fa7292b snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa59e9082 snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xbd9ae5b2 snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd7a54a95 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/snd-util-mem 0x0f6e73a8 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x1a5b0c53 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x2e4d9578 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x5a378703 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x61a9206b __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x71f2b12a snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x92785a7a snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x9c465021 __snd_util_mem_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x2f44e6fc snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x001071c9 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x001c5c47 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x003934ed drm_crtc_cleanup +EXPORT_SYMBOL vmlinux 0x004355fa nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL vmlinux 0x00554e14 setup_new_exec +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00902967 skb_checksum +EXPORT_SYMBOL vmlinux 0x0093fb5c input_allocate_device +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00d3bcce d_validate +EXPORT_SYMBOL vmlinux 0x00f3c34e lookup_hash +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x0104c7c5 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x0107e54e add_disk +EXPORT_SYMBOL vmlinux 0x011c2e1a tcp_shutdown +EXPORT_SYMBOL vmlinux 0x014789fd tty_kref_put +EXPORT_SYMBOL vmlinux 0x01659ff2 blk_init_queue +EXPORT_SYMBOL vmlinux 0x0187bdc9 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019924cc cdev_init +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01ab0f38 dev_base_lock +EXPORT_SYMBOL vmlinux 0x01b1d688 security_path_unlink +EXPORT_SYMBOL vmlinux 0x01ce9f07 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x01d10b3a inet_register_protosw +EXPORT_SYMBOL vmlinux 0x01d711de __up_write +EXPORT_SYMBOL vmlinux 0x01f03dda fb_get_mode +EXPORT_SYMBOL vmlinux 0x01f67911 ___copy_in_user +EXPORT_SYMBOL vmlinux 0x023a642e sock_rfree +EXPORT_SYMBOL vmlinux 0x023c1eb9 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x024bf79b path_get +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x02684215 input_close_device +EXPORT_SYMBOL vmlinux 0x0292b152 blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02c06ff0 tcp_check_req +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02f9d620 _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x02fb211a prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x030e2fcb tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x031b6515 bio_add_page +EXPORT_SYMBOL vmlinux 0x031ee678 xor_niagara_2 +EXPORT_SYMBOL vmlinux 0x0334bf0b fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x036419a9 vio_validate_sid +EXPORT_SYMBOL vmlinux 0x03701f9e generic_permission +EXPORT_SYMBOL vmlinux 0x0377ebc4 find_vma +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x03b92598 _spin_lock +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03d5b78a __brelse +EXPORT_SYMBOL vmlinux 0x03ea9cf3 sun4v_hvapi_get +EXPORT_SYMBOL vmlinux 0x03ee5f4b cdev_add +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x04017540 simple_transaction_set +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x0428628c mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x04375163 pneigh_lookup +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x045fe5ad sock_kmalloc +EXPORT_SYMBOL vmlinux 0x046ee767 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x047a31d2 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x047fb73a pci_read_vpd +EXPORT_SYMBOL vmlinux 0x04808d7c buffer_migrate_page +EXPORT_SYMBOL vmlinux 0x0485c677 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04927208 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x04aefe8d generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x04b7142e input_unregister_device +EXPORT_SYMBOL vmlinux 0x04d57379 skb_clone +EXPORT_SYMBOL vmlinux 0x04d8b80d skb_under_panic +EXPORT_SYMBOL vmlinux 0x04e46bdb up_read +EXPORT_SYMBOL vmlinux 0x05094bda __breadahead +EXPORT_SYMBOL vmlinux 0x05186ca4 flush_icache_range +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x0531c6d9 journal_start_commit +EXPORT_SYMBOL vmlinux 0x0560fd8f atomic_sub_ret +EXPORT_SYMBOL vmlinux 0x05bf9165 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x05da1383 kthread_create +EXPORT_SYMBOL vmlinux 0x05ebf99f tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x0611a723 bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x062a7eff blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x0647b03c simple_getattr +EXPORT_SYMBOL vmlinux 0x0648957f seq_putc +EXPORT_SYMBOL vmlinux 0x065e8a2e profile_pc +EXPORT_SYMBOL vmlinux 0x0671abae blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x0674ac7c genl_register_ops +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06becb46 single_open +EXPORT_SYMBOL vmlinux 0x06c91471 dquot_acquire +EXPORT_SYMBOL vmlinux 0x06e00bd1 pci_enable_device +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0736264e xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x0755de24 drm_get_resource_start +EXPORT_SYMBOL vmlinux 0x077d35e2 sbusfb_fill_var +EXPORT_SYMBOL vmlinux 0x077ee6a3 request_firmware +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07b5679a compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07e6111d vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x07f6bc04 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x0826b0dc __flush_dcache_range +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0836695c drm_sman_takedown +EXPORT_SYMBOL vmlinux 0x0847c4a6 ps2_drain +EXPORT_SYMBOL vmlinux 0x08728410 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x0883cb27 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x08b1ef96 block_commit_write +EXPORT_SYMBOL vmlinux 0x08b55278 drm_mm_pre_get +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL vmlinux 0x090a4e89 pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x0917fb79 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x094ead86 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0x0959d8bc neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x0969e968 request_key +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x099823a5 security_d_instantiate +EXPORT_SYMBOL vmlinux 0x09af0e23 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09cc7c59 cdev_alloc +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09e2f2ba _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a62de37 atomic64_add_ret +EXPORT_SYMBOL vmlinux 0x0ac4ce44 new_inode +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0adb5a1c ip_setsockopt +EXPORT_SYMBOL vmlinux 0x0b018ba3 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x0b090cdb xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x0b153450 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b4fdecc neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x0b531f4e unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0ba8335b unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x0be0d23c uart_get_divisor +EXPORT_SYMBOL vmlinux 0x0beb36c7 seq_escape +EXPORT_SYMBOL vmlinux 0x0bf5c697 simple_release_fs +EXPORT_SYMBOL vmlinux 0x0c12932a truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x0c2889d2 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x0c319083 of_find_node_by_name +EXPORT_SYMBOL vmlinux 0x0c5accff tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x0c5c4569 release_sock +EXPORT_SYMBOL vmlinux 0x0c825749 blk_sync_queue +EXPORT_SYMBOL vmlinux 0x0c947e1f drm_irq_uninstall +EXPORT_SYMBOL vmlinux 0x0c98b3a2 tcp_poll +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cb90607 pci_bus_type +EXPORT_SYMBOL vmlinux 0x0cf855ac __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x0d4b1ef8 uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d5ed0c3 __elv_add_request +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dc81be9 pipe_to_file +EXPORT_SYMBOL vmlinux 0x0dd664bd con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x0deabfce ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x0decdbcb inet_listen +EXPORT_SYMBOL vmlinux 0x0dfacd33 of_parse_phandle +EXPORT_SYMBOL vmlinux 0x0e087c6c skb_copy +EXPORT_SYMBOL vmlinux 0x0e345c44 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e5e0fc0 compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x0e60f25d of_phy_connect +EXPORT_SYMBOL vmlinux 0x0e713337 sg_init_table +EXPORT_SYMBOL vmlinux 0x0e7612c0 uart_resume_port +EXPORT_SYMBOL vmlinux 0x0e7bced3 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x0ea1af0f _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x0eb803a5 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x0ef63651 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f36e01f i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x0f378a1e ___copy_from_user +EXPORT_SYMBOL vmlinux 0x0f41bd8a complete_all +EXPORT_SYMBOL vmlinux 0x0f7f6f4b input_unfilter_device +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x0fc8089d pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0x0fca235b drm_vblank_init +EXPORT_SYMBOL vmlinux 0x0ffb8e6a pci_target_state +EXPORT_SYMBOL vmlinux 0x1006f89b __sk_dst_check +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10902bf7 insb +EXPORT_SYMBOL vmlinux 0x10a90731 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x10b05127 bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x10b41fa0 register_key_type +EXPORT_SYMBOL vmlinux 0x10b8a738 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x10b91e02 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x10cce4bd cfb_copyarea +EXPORT_SYMBOL vmlinux 0x10e3591e jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10fc7fcb xfrm_state_update +EXPORT_SYMBOL vmlinux 0x1109dece __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x111f0d8c mdiobus_free +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x11793d13 ebus_dma_unregister +EXPORT_SYMBOL vmlinux 0x1182979d inet_frags_fini +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11985bbc journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x1198aadb in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x11a9e19e vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x11b86db7 arp_tbl +EXPORT_SYMBOL vmlinux 0x11c2c2a6 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x11f3f1eb tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x11f40281 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x11fa3c38 backlight_device_register +EXPORT_SYMBOL vmlinux 0x121ee0ff names_cachep +EXPORT_SYMBOL vmlinux 0x1241e1a7 pid_task +EXPORT_SYMBOL vmlinux 0x12855c9d filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x12907745 tty_unthrottle +EXPORT_SYMBOL vmlinux 0x129ffee7 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x12bb2452 up +EXPORT_SYMBOL vmlinux 0x12d09a67 sun4v_hvapi_unregister +EXPORT_SYMBOL vmlinux 0x12d7597a xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x12ea337e outsb +EXPORT_SYMBOL vmlinux 0x12f31318 _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x130270b1 down_killable +EXPORT_SYMBOL vmlinux 0x130e8e2a posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x1362f331 pci_save_state +EXPORT_SYMBOL vmlinux 0x136cddb3 skb_find_text +EXPORT_SYMBOL vmlinux 0x13859546 vfs_llseek +EXPORT_SYMBOL vmlinux 0x138a78d1 set_current_groups +EXPORT_SYMBOL vmlinux 0x13ab50a6 compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0x13c680d7 sock_sendmsg +EXPORT_SYMBOL vmlinux 0x13cf3b50 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x13d1ab99 pci_iounmap +EXPORT_SYMBOL vmlinux 0x13df4326 drm_mode_validate_size +EXPORT_SYMBOL vmlinux 0x141446d0 __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x1482134b vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x148a1e5c sock_kfree_s +EXPORT_SYMBOL vmlinux 0x1496cdbb set_security_override +EXPORT_SYMBOL vmlinux 0x14a84b90 d_alloc_root +EXPORT_SYMBOL vmlinux 0x14d81d3d prepare_binprm +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x155fc4e7 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x158b8cc4 sock_i_ino +EXPORT_SYMBOL vmlinux 0x15a162f0 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x15b35ad0 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x15badd33 mnt_unpin +EXPORT_SYMBOL vmlinux 0x15cac005 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x15e276c9 rtnl_notify +EXPORT_SYMBOL vmlinux 0x15f90a20 __scm_destroy +EXPORT_SYMBOL vmlinux 0x161605c3 idr_replace +EXPORT_SYMBOL vmlinux 0x16292225 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x1641af73 posix_test_lock +EXPORT_SYMBOL vmlinux 0x1650ceb3 devm_free_irq +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16e8b7e2 get_io_context +EXPORT_SYMBOL vmlinux 0x173157fd copy_user_page +EXPORT_SYMBOL vmlinux 0x17429feb neigh_destroy +EXPORT_SYMBOL vmlinux 0x1748319b numa_cpumask_lookup_table +EXPORT_SYMBOL vmlinux 0x1776b88e ip_route_input +EXPORT_SYMBOL vmlinux 0x177e5263 nf_setsockopt +EXPORT_SYMBOL vmlinux 0x179beb0e tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x179c31e2 devm_iounmap +EXPORT_SYMBOL vmlinux 0x17ae27bb tty_port_init +EXPORT_SYMBOL vmlinux 0x17b3d2f4 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x17b91af1 sk_stream_error +EXPORT_SYMBOL vmlinux 0x17c673a6 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17d70415 try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17f7f5ed drm_mode_connector_list_update +EXPORT_SYMBOL vmlinux 0x180932a4 open_exec +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1847f21c of_platform_bus_type +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x185dd3eb module_put +EXPORT_SYMBOL vmlinux 0x1876c9ad kfifo_free +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18acc289 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x18bef9d9 mdesc_node_by_name +EXPORT_SYMBOL vmlinux 0x1909b515 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x19496718 read_dev_sector +EXPORT_SYMBOL vmlinux 0x194b87e3 free_netdev +EXPORT_SYMBOL vmlinux 0x1995bf67 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19bc3e0b key_put +EXPORT_SYMBOL vmlinux 0x19d24b08 iput +EXPORT_SYMBOL vmlinux 0x1a0318b0 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x1a194e7f write_inode_now +EXPORT_SYMBOL vmlinux 0x1a35bcbc VISenter +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a7d62e8 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x1a9a96fc vc_resize +EXPORT_SYMBOL vmlinux 0x1aa759d0 ns_to_timeval +EXPORT_SYMBOL vmlinux 0x1ab14e15 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x1ab7908d request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x1abad6be __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x1ac661c1 sock_recvmsg +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1ad2cf44 netlink_broadcast +EXPORT_SYMBOL vmlinux 0x1ad9f95a prom_finddevice +EXPORT_SYMBOL vmlinux 0x1adee12c qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0fe61f seq_release +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b8c2423 lro_flush_all +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1ba11f45 sleep_on +EXPORT_SYMBOL vmlinux 0x1bc4aadf lro_receive_frags +EXPORT_SYMBOL vmlinux 0x1c118fa5 __netif_schedule +EXPORT_SYMBOL vmlinux 0x1c493114 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x1c621773 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x1c6c32ee sync_page_range +EXPORT_SYMBOL vmlinux 0x1c80de9c ip_send_check +EXPORT_SYMBOL vmlinux 0x1c8d7cf1 drm_vblank_off +EXPORT_SYMBOL vmlinux 0x1cb3a4e7 vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cc9dc52 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x1cd631fb xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x1cda7754 vio_conn_reset +EXPORT_SYMBOL vmlinux 0x1cde3df5 unregister_qdisc +EXPORT_SYMBOL vmlinux 0x1cf36dca km_policy_notify +EXPORT_SYMBOL vmlinux 0x1d2f67e5 cad_pid +EXPORT_SYMBOL vmlinux 0x1d552098 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL vmlinux 0x1d7936ec generic_removexattr +EXPORT_SYMBOL vmlinux 0x1d9164f0 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x1d9e4730 pipe_unlock +EXPORT_SYMBOL vmlinux 0x1db32cff input_set_keycode +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1de53f1d inet_accept +EXPORT_SYMBOL vmlinux 0x1df009f3 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x1dfab1e8 sock_no_getname +EXPORT_SYMBOL vmlinux 0x1e1eab76 generic_write_end +EXPORT_SYMBOL vmlinux 0x1e265831 cond_resched_lock +EXPORT_SYMBOL vmlinux 0x1e26c0bc pci_map_rom +EXPORT_SYMBOL vmlinux 0x1e51814c km_state_notify +EXPORT_SYMBOL vmlinux 0x1e51e9f8 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x1e6aca6a __seq_open_private +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e6fb3b4 down_write +EXPORT_SYMBOL vmlinux 0x1ea085db rtnl_create_link +EXPORT_SYMBOL vmlinux 0x1eb25792 do_sync_write +EXPORT_SYMBOL vmlinux 0x1eb2d613 pci_dev_put +EXPORT_SYMBOL vmlinux 0x1ebecfa2 register_netdev +EXPORT_SYMBOL vmlinux 0x1efb81f8 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL vmlinux 0x1f31fbef kmalloc_caches +EXPORT_SYMBOL vmlinux 0x1f55b8a2 drm_connector_property_set_value +EXPORT_SYMBOL vmlinux 0x1fae2dc1 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x1fc4db51 input_unregister_handler +EXPORT_SYMBOL vmlinux 0x1fc966b5 of_find_property +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x202134c1 inet_shutdown +EXPORT_SYMBOL vmlinux 0x20645642 drm_debug +EXPORT_SYMBOL vmlinux 0x20682c57 blk_unplug +EXPORT_SYMBOL vmlinux 0x206f1878 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x20852ad2 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x208d939a call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x20a3d683 unlock_rename +EXPORT_SYMBOL vmlinux 0x20cb391a dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x2118c454 generic_fillattr +EXPORT_SYMBOL vmlinux 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2168dbfc skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x216d50a2 phy_device_register +EXPORT_SYMBOL vmlinux 0x21989eaf drm_mode_prune_invalid +EXPORT_SYMBOL vmlinux 0x219c6fa3 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x219e3521 d_genocide +EXPORT_SYMBOL vmlinux 0x21bcb13c key_task_permission +EXPORT_SYMBOL vmlinux 0x21c1c6f0 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x21e60b0b blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x21e68869 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x21edd8e2 drm_helper_resume_force_mode +EXPORT_SYMBOL vmlinux 0x21f9867a blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x2213270b flush_old_exec +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x22352c3a register_gifconf +EXPORT_SYMBOL vmlinux 0x226ce3da seq_printf +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x227ec8ee sget +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x228c690c d_alloc_name +EXPORT_SYMBOL vmlinux 0x2292319f sk_receive_skb +EXPORT_SYMBOL vmlinux 0x22a1308c sock_init_data +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22c81fbd arp_xmit +EXPORT_SYMBOL vmlinux 0x22c95f44 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x22e71b7b vfs_rmdir +EXPORT_SYMBOL vmlinux 0x22f8d1ed alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x230ab4c9 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0x230c8eab xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x23577023 wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x2370d8dc journal_dirty_data +EXPORT_SYMBOL vmlinux 0x237454f4 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL vmlinux 0x23c4bd00 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0x23d6ffc8 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x23f4b503 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x240e3752 dget_locked +EXPORT_SYMBOL vmlinux 0x2423d64a i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x24430b26 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0x245597a3 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x246cac78 d_add_ci +EXPORT_SYMBOL vmlinux 0x246cb17e proc_symlink +EXPORT_SYMBOL vmlinux 0x24769ee9 __mutex_init +EXPORT_SYMBOL vmlinux 0x24b72dbb proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x24bd930a outsl +EXPORT_SYMBOL vmlinux 0x24c3b688 vfs_writev +EXPORT_SYMBOL vmlinux 0x24cc0f5c scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x24e867a6 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x252e4e90 skb_queue_head +EXPORT_SYMBOL vmlinux 0x2530333f pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0x25629656 drm_addbufs_pci +EXPORT_SYMBOL vmlinux 0x25661b9e journal_abort +EXPORT_SYMBOL vmlinux 0x25759ba1 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x2580d83f tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x2585b1ee tty_register_driver +EXPORT_SYMBOL vmlinux 0x25c3dbca prom_nextprop +EXPORT_SYMBOL vmlinux 0x25cd685d xrlim_allow +EXPORT_SYMBOL vmlinux 0x25db74e7 mdesc_node_name +EXPORT_SYMBOL vmlinux 0x25fcbcc1 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x25ffe8e9 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0x26051e3d xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x263ee19b sg_init_one +EXPORT_SYMBOL vmlinux 0x265673eb dev_alloc_name +EXPORT_SYMBOL vmlinux 0x2660bc18 __inet6_hash +EXPORT_SYMBOL vmlinux 0x2669268d console_start +EXPORT_SYMBOL vmlinux 0x2669603f add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26803bb6 locks_init_lock +EXPORT_SYMBOL vmlinux 0x268a9fbe otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x269319ca is_bad_inode +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26f140ed xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x2701935b path_put +EXPORT_SYMBOL vmlinux 0x27155681 pci_dma_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x273f1504 uart_register_driver +EXPORT_SYMBOL vmlinux 0x27412168 __lock_page +EXPORT_SYMBOL vmlinux 0x27558267 dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x27759e30 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b81daa xor_niagara_3 +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27e5720d atomic64_sub +EXPORT_SYMBOL vmlinux 0x2818102d d_delete +EXPORT_SYMBOL vmlinux 0x281d9f01 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x28230897 usb_gadget_register_driver +EXPORT_SYMBOL vmlinux 0x28481664 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x284ee6e1 freeze_bdev +EXPORT_SYMBOL vmlinux 0x285496d7 __kfree_skb +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x285eb817 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x28699c9b tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x287f8302 mem_section +EXPORT_SYMBOL vmlinux 0x28ad6422 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x28b1cdf1 set_page_dirty +EXPORT_SYMBOL vmlinux 0x28e27922 ida_init +EXPORT_SYMBOL vmlinux 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x2964e3d4 i2c_transfer +EXPORT_SYMBOL vmlinux 0x296f04fd drm_mode_create_dithering_property +EXPORT_SYMBOL vmlinux 0x2974a829 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x2974cf9c jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29cbadeb pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x29dc4be7 of_console_options +EXPORT_SYMBOL vmlinux 0x2a281d95 noop_qdisc +EXPORT_SYMBOL vmlinux 0x2a47d935 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0x2a7c3a69 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x2a96bbb7 sk_release_kernel +EXPORT_SYMBOL vmlinux 0x2ac4e73f drm_helper_disable_unused_functions +EXPORT_SYMBOL vmlinux 0x2accd62b __getblk +EXPORT_SYMBOL vmlinux 0x2ad665db vio_driver_init +EXPORT_SYMBOL vmlinux 0x2b00a520 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x2b1862c6 pskb_copy +EXPORT_SYMBOL vmlinux 0x2b27f550 genphy_config_advert +EXPORT_SYMBOL vmlinux 0x2b32cb95 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x2b4f758a of_device_is_compatible +EXPORT_SYMBOL vmlinux 0x2b5b850f no_llseek +EXPORT_SYMBOL vmlinux 0x2b6e360b simple_sync_file +EXPORT_SYMBOL vmlinux 0x2b71f804 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x2b937a6f __ret_efault +EXPORT_SYMBOL vmlinux 0x2b96d6f7 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x2b9dfc0f cpu_core_map +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bce3dd0 get_sb_ns +EXPORT_SYMBOL vmlinux 0x2bf83805 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x2c046325 block_truncate_page +EXPORT_SYMBOL vmlinux 0x2c249e49 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0x2c7b4e6f sock_wfree +EXPORT_SYMBOL vmlinux 0x2c8e13f1 lock_may_read +EXPORT_SYMBOL vmlinux 0x2ca1036a pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0x2caa5393 ether_setup +EXPORT_SYMBOL vmlinux 0x2cb81d98 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x2cc87f1f init_special_inode +EXPORT_SYMBOL vmlinux 0x2cdaaafa sock_register +EXPORT_SYMBOL vmlinux 0x2ce187ba disk_stack_limits +EXPORT_SYMBOL vmlinux 0x2cf363cd netif_rx +EXPORT_SYMBOL vmlinux 0x2d285c9a security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x2d2987c6 dentry_open +EXPORT_SYMBOL vmlinux 0x2d376e53 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x2d84992e jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x2d99ee02 drm_mode_create_tv_properties +EXPORT_SYMBOL vmlinux 0x2daa7939 xor_vis_4 +EXPORT_SYMBOL vmlinux 0x2deaa37d set_user_nice +EXPORT_SYMBOL vmlinux 0x2df2eddd generic_setlease +EXPORT_SYMBOL vmlinux 0x2e148ce7 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x2e149d27 ida_pre_get +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e313208 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e54f4bf journal_update_format +EXPORT_SYMBOL vmlinux 0x2e7f8813 __bforget +EXPORT_SYMBOL vmlinux 0x2e8489b7 start_tty +EXPORT_SYMBOL vmlinux 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL vmlinux 0x2eb7d436 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x2ec26c11 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x2edd2871 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x2efeb14b fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x2f027b8b pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0x2f1e0b03 pci_iomap +EXPORT_SYMBOL vmlinux 0x2f5c01be seq_open_private +EXPORT_SYMBOL vmlinux 0x2f7dac79 of_unregister_driver +EXPORT_SYMBOL vmlinux 0x2fc19959 ida_get_new +EXPORT_SYMBOL vmlinux 0x2fc84240 xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x300b2000 of_find_in_proplist +EXPORT_SYMBOL vmlinux 0x300d176a generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x30209183 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x30286196 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x3029b088 map_to_cpu +EXPORT_SYMBOL vmlinux 0x30480eb0 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x305edf13 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x30658ee3 save_mount_options +EXPORT_SYMBOL vmlinux 0x3074f033 drm_order +EXPORT_SYMBOL vmlinux 0x307c943a tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30820bdd idr_get_new_above +EXPORT_SYMBOL vmlinux 0x3083cb6b inet_select_addr +EXPORT_SYMBOL vmlinux 0x30869937 drm_open +EXPORT_SYMBOL vmlinux 0x308acdeb gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x309943a0 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x30bc0eec gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x30d17f50 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x30fc60d7 kobject_set_name +EXPORT_SYMBOL vmlinux 0x30ffac80 registered_fb +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x310e1b23 cdev_index +EXPORT_SYMBOL vmlinux 0x312ba318 rwsem_wake +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x316be1f4 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x3174253d drm_property_destroy +EXPORT_SYMBOL vmlinux 0x31a2e826 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x31a99957 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31ba42fe kset_unregister +EXPORT_SYMBOL vmlinux 0x31d442da blk_requeue_request +EXPORT_SYMBOL vmlinux 0x31ebadcd in_group_p +EXPORT_SYMBOL vmlinux 0x323cefec copy_from_user_fixup +EXPORT_SYMBOL vmlinux 0x325fb6dc bio_init +EXPORT_SYMBOL vmlinux 0x327297d1 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x3281eeec of_n_addr_cells +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x32905468 mempool_create +EXPORT_SYMBOL vmlinux 0x32ac39c5 drm_ioctl +EXPORT_SYMBOL vmlinux 0x32bf3816 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x32debb16 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x32f077d0 blk_plug_device +EXPORT_SYMBOL vmlinux 0x330e70e4 sg_free_table +EXPORT_SYMBOL vmlinux 0x33134f61 jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0x336a6ae4 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x3397abaa wireless_spy_update +EXPORT_SYMBOL vmlinux 0x33c02fa9 kill_litter_super +EXPORT_SYMBOL vmlinux 0x33c813e4 textsearch_register +EXPORT_SYMBOL vmlinux 0x33ceb1a0 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x33f127d2 inode_init_once +EXPORT_SYMBOL vmlinux 0x33fea56b netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x341cbed2 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x3446c378 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34aa544c unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x34bcafec dqget +EXPORT_SYMBOL vmlinux 0x34dab885 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x3502324e nf_log_unregister +EXPORT_SYMBOL vmlinux 0x3508bd61 pci_select_bars +EXPORT_SYMBOL vmlinux 0x351652ae drm_mode_duplicate +EXPORT_SYMBOL vmlinux 0x35501be0 set_blocksize +EXPORT_SYMBOL vmlinux 0x3582ed17 vfs_stat +EXPORT_SYMBOL vmlinux 0x358c9c14 dquot_destroy +EXPORT_SYMBOL vmlinux 0x359175b6 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x359aaf78 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x35a78f48 sk_run_filter +EXPORT_SYMBOL vmlinux 0x35ad8b97 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35bbba28 seq_release_private +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35d84066 ebus_dma_prepare +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x36266ac0 bio_split +EXPORT_SYMBOL vmlinux 0x3654d228 fb_show_logo +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x366d3639 input_get_keycode +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36887a31 ldc_map_sg +EXPORT_SYMBOL vmlinux 0x36b385a4 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x36c52434 dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x36d01af3 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x36d39200 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x36ea8805 soft_cursor +EXPORT_SYMBOL vmlinux 0x371bfa45 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x3736736e bdput +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374c62f3 skb_copy_expand +EXPORT_SYMBOL vmlinux 0x374db118 seq_bitmap +EXPORT_SYMBOL vmlinux 0x37541485 of_device_is_available +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x377d4674 drm_encoder_init +EXPORT_SYMBOL vmlinux 0x378cd4ee neigh_seq_next +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x380327d5 register_con_driver +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x382f6266 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x38569593 down_read +EXPORT_SYMBOL vmlinux 0x385833e3 simple_lookup +EXPORT_SYMBOL vmlinux 0x3870bb93 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x3877c409 sock_no_connect +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x3898cbb0 percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x38bdb170 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x38c942dd jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x39459cba fget +EXPORT_SYMBOL vmlinux 0x3953e87a jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x395e6434 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x396a1807 dev_open +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x3980eacf bio_pair_release +EXPORT_SYMBOL vmlinux 0x398bae24 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39e0b3ff follow_up +EXPORT_SYMBOL vmlinux 0x39e14282 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0x39e285d1 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x39e99679 set_disk_ro +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3e232e skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x3a4ca275 netif_napi_del +EXPORT_SYMBOL vmlinux 0x3a52477e locks_copy_lock +EXPORT_SYMBOL vmlinux 0x3a699de6 skb_put +EXPORT_SYMBOL vmlinux 0x3a7053b5 udp_proc_register +EXPORT_SYMBOL vmlinux 0x3a7a125d gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x3a7de31a __downgrade_write +EXPORT_SYMBOL vmlinux 0x3a919d40 gen_pool_free +EXPORT_SYMBOL vmlinux 0x3a9aa54d clear_bit +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa01984 dcache_readdir +EXPORT_SYMBOL vmlinux 0x3acd3752 file_fsync +EXPORT_SYMBOL vmlinux 0x3ad9b73b clocksource_register +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3b0649d5 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x3b142ba1 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x3b2178db drm_mode_create_dvi_i_properties +EXPORT_SYMBOL vmlinux 0x3b3895f8 mpage_writepages +EXPORT_SYMBOL vmlinux 0x3b3fe8cb prom_getsibling +EXPORT_SYMBOL vmlinux 0x3b61fb00 drm_connector_property_get_value +EXPORT_SYMBOL vmlinux 0x3b64248b dquot_release +EXPORT_SYMBOL vmlinux 0x3b6470e7 vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x3b852a16 seq_path +EXPORT_SYMBOL vmlinux 0x3b8c9b73 nf_afinfo +EXPORT_SYMBOL vmlinux 0x3b9a52fe phy_attach +EXPORT_SYMBOL vmlinux 0x3bacdc73 audit_log_start +EXPORT_SYMBOL vmlinux 0x3bb71d0e pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3beab25b i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x3bf0d7b0 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x3bf85e99 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x3c02fe95 blk_put_request +EXPORT_SYMBOL vmlinux 0x3c2747e6 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c69f4e9 node_data +EXPORT_SYMBOL vmlinux 0x3c790685 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x3c855058 of_device_unregister +EXPORT_SYMBOL vmlinux 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3d3ef566 input_register_handler +EXPORT_SYMBOL vmlinux 0x3d47c711 km_report +EXPORT_SYMBOL vmlinux 0x3d50a313 pci_dev_get +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3db04550 single_release +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3dc184de drm_core_ioremap +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e576fc4 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x3e5b2021 of_dev_put +EXPORT_SYMBOL vmlinux 0x3e5f0f86 request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x3e82028d i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0x3ea0adfc nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x3ea953c9 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x3eacda94 sync_blockdev +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ee75e03 _read_lock +EXPORT_SYMBOL vmlinux 0x3f039ead pci_unmap_single +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f7fdcc0 tcp_ioctl +EXPORT_SYMBOL vmlinux 0x3f99f45b jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x3fa03a97 memset +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3faebdb7 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x401bd4f9 journal_create +EXPORT_SYMBOL vmlinux 0x402683b1 fput +EXPORT_SYMBOL vmlinux 0x402693e0 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x404adf3d ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x405ff76f xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x408246f3 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0x40890757 d_find_alias +EXPORT_SYMBOL vmlinux 0x40b99c12 ipv4_specific +EXPORT_SYMBOL vmlinux 0x40c3fdaf _spin_unlock +EXPORT_SYMBOL vmlinux 0x40c91f66 load_nls_default +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x410b2e44 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x411c661a sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41381420 drm_ati_pcigart_init +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x415a8272 journal_start +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41ca6b0d tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x421e09c0 user_path_at +EXPORT_SYMBOL vmlinux 0x42219c3a blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x4261fe7a jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x4268d88c nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0x42a4bdf2 in_egroup_p +EXPORT_SYMBOL vmlinux 0x42aaa623 drm_mode_attachmode_crtc +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42bdd74e kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x42fe40d2 sock_create_kern +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x433ab4a0 gen_pool_add +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x437b1e2c dst_alloc +EXPORT_SYMBOL vmlinux 0x439090b9 kernel_thread +EXPORT_SYMBOL vmlinux 0x43a4938f vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43bea045 auxio_register +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x43ff30cd sg_alloc_table +EXPORT_SYMBOL vmlinux 0x440290db xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x4407a613 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x44082568 get_phy_device +EXPORT_SYMBOL vmlinux 0x440eda1a inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x444bb73d key_type_keyring +EXPORT_SYMBOL vmlinux 0x4462f24f skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x44764a94 unlock_page +EXPORT_SYMBOL vmlinux 0x447b6761 inet_addr_type +EXPORT_SYMBOL vmlinux 0x447f7e18 sun4v_niagara2_getperf +EXPORT_SYMBOL vmlinux 0x44993b48 pci_free_consistent +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44c0aeac sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x44cf938e blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x450f15b3 kick_iocb +EXPORT_SYMBOL vmlinux 0x451264bd vfs_readlink +EXPORT_SYMBOL vmlinux 0x45463aee keyring_clear +EXPORT_SYMBOL vmlinux 0x454cbd8e mdesc_release +EXPORT_SYMBOL vmlinux 0x454deeff wait_for_key_construction +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x4560c8c6 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x456b9301 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x457a30c2 simple_write_end +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45a01aee i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0x45c7d7e6 drm_helper_connector_dpms +EXPORT_SYMBOL vmlinux 0x4600b734 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x4607ca68 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x4617af4e jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x4629f6ea kobject_init +EXPORT_SYMBOL vmlinux 0x462ec101 vfsmount_lock +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x4684f237 drm_helper_probe_connector_modes +EXPORT_SYMBOL vmlinux 0x468d555c dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x468e518b sock_no_poll +EXPORT_SYMBOL vmlinux 0x469e95f4 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0x46a07623 bio_unmap_user +EXPORT_SYMBOL vmlinux 0x46ba4fae arp_broken_ops +EXPORT_SYMBOL vmlinux 0x46dd5920 del_gendisk +EXPORT_SYMBOL vmlinux 0x46de13ae dev_unicast_add +EXPORT_SYMBOL vmlinux 0x46f5a124 override_creds +EXPORT_SYMBOL vmlinux 0x472b7d26 genphy_resume +EXPORT_SYMBOL vmlinux 0x474c5897 nf_reinject +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x476199eb lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x476c6c40 ps2_init +EXPORT_SYMBOL vmlinux 0x47812d3c blk_recount_segments +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47ec4553 submit_bio +EXPORT_SYMBOL vmlinux 0x481ddd94 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x482bcb24 dev_add_pack +EXPORT_SYMBOL vmlinux 0x483687db jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x486e3c38 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x48778703 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL vmlinux 0x488a5607 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x4892e2c6 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x489e2f17 mdiobus_register +EXPORT_SYMBOL vmlinux 0x48c1d080 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x490e3de7 unregister_key_type +EXPORT_SYMBOL vmlinux 0x4922afaf __kill_fasync +EXPORT_SYMBOL vmlinux 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL vmlinux 0x493902ec __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x493ffd82 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x495647ea skb_push +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49702ef2 block_read_full_page +EXPORT_SYMBOL vmlinux 0x497186d8 __init_rwsem +EXPORT_SYMBOL vmlinux 0x499fd031 __lookup_one_len +EXPORT_SYMBOL vmlinux 0x49c7526d tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49e9e0cd have_submounts +EXPORT_SYMBOL vmlinux 0x4a0394db poll_initwait +EXPORT_SYMBOL vmlinux 0x4a142d5c rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x4a15ae23 prom_node_has_property +EXPORT_SYMBOL vmlinux 0x4a185db9 dma_ops +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a7116da fb_set_var +EXPORT_SYMBOL vmlinux 0x4a851bd9 mem_map_zero +EXPORT_SYMBOL vmlinux 0x4aa688b5 netif_device_detach +EXPORT_SYMBOL vmlinux 0x4ab36445 blk_register_region +EXPORT_SYMBOL vmlinux 0x4aba68d2 drm_gem_vm_close +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4b0f1de5 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x4b0fa27f alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x4b12b14a udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x4b91c28e sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x4ba7e328 block_write_begin +EXPORT_SYMBOL vmlinux 0x4beefcf2 kill_fasync +EXPORT_SYMBOL vmlinux 0x4c07ff66 directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c51fbe1 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x4ca942d5 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x4cba0a06 skb_dma_map +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cbc0109 simple_link +EXPORT_SYMBOL vmlinux 0x4cbda2bf prom_setprop +EXPORT_SYMBOL vmlinux 0x4cd31fa6 mark_page_accessed +EXPORT_SYMBOL vmlinux 0x4cebbcde pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x4cee2f6d proc_mkdir +EXPORT_SYMBOL vmlinux 0x4cf02da7 bdi_unregister +EXPORT_SYMBOL vmlinux 0x4cfea29b of_get_next_child +EXPORT_SYMBOL vmlinux 0x4d02b10b eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x4d131fed dquot_alloc +EXPORT_SYMBOL vmlinux 0x4d1b00ed inet_frag_kill +EXPORT_SYMBOL vmlinux 0x4d317737 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x4d5678f2 arp_create +EXPORT_SYMBOL vmlinux 0x4d8e676e proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0x4d9508ca dev_addr_del +EXPORT_SYMBOL vmlinux 0x4d9c612b __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x4da61898 filp_open +EXPORT_SYMBOL vmlinux 0x4dbdddd8 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4ddc70b5 is_container_init +EXPORT_SYMBOL vmlinux 0x4df0dd1c load_nls +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e4c9bdb dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x4e5a5250 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x4e5e897c __scm_send +EXPORT_SYMBOL vmlinux 0x4e686198 audit_log_format +EXPORT_SYMBOL vmlinux 0x4e696ff9 generic_show_options +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e78b1d1 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4ebec3a5 drm_gem_handle_create +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4f03b7e0 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x4f0ceebb tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x4f10badb __ip_select_ident +EXPORT_SYMBOL vmlinux 0x4f4c37e2 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x4f60a1d7 __f_setown +EXPORT_SYMBOL vmlinux 0x4fba0b64 inode_init_always +EXPORT_SYMBOL vmlinux 0x4fbea313 input_inject_event +EXPORT_SYMBOL vmlinux 0x4fc39846 aio_complete +EXPORT_SYMBOL vmlinux 0x4fdd2088 io_remap_pfn_range +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x500ed560 file_update_time +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x508c69c8 drm_get_connector_name +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50da30a2 dcache_lock +EXPORT_SYMBOL vmlinux 0x50e98418 open_by_devnum +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x514a925f tcp_splice_read +EXPORT_SYMBOL vmlinux 0x517098d4 pci_reenable_device +EXPORT_SYMBOL vmlinux 0x5196de65 user_revoke +EXPORT_SYMBOL vmlinux 0x51a5237a skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x51c40742 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52046e13 atomic_sub +EXPORT_SYMBOL vmlinux 0x520db195 phy_print_status +EXPORT_SYMBOL vmlinux 0x523069ba vio_port_up +EXPORT_SYMBOL vmlinux 0x523b81b1 pci_get_class +EXPORT_SYMBOL vmlinux 0x523e9999 invalidate_partition +EXPORT_SYMBOL vmlinux 0x5251cae4 prom_getbool +EXPORT_SYMBOL vmlinux 0x526097a8 sysctl_string +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x52881e54 tc_classify +EXPORT_SYMBOL vmlinux 0x528f38da blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x52f57267 drm_mode_object_find +EXPORT_SYMBOL vmlinux 0x532a9da1 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x533903d8 outsw +EXPORT_SYMBOL vmlinux 0x535bf075 tcf_register_action +EXPORT_SYMBOL vmlinux 0x5368cd6e neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x538835e4 inode_change_ok +EXPORT_SYMBOL vmlinux 0x53b3ec8b tcp_read_sock +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53c95826 sunserial_register_minors +EXPORT_SYMBOL vmlinux 0x53d434df generic_unplug_device +EXPORT_SYMBOL vmlinux 0x53d9c4d2 security_path_mknod +EXPORT_SYMBOL vmlinux 0x53f2e8e7 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x53ff415c dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x5400704f drm_idlelock_release +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x5475d00c journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x5492c604 prepare_to_wait +EXPORT_SYMBOL vmlinux 0x54975e9b tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54fd2186 __lock_buffer +EXPORT_SYMBOL vmlinux 0x5507c373 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x5548f5b3 blk_init_tags +EXPORT_SYMBOL vmlinux 0x554f0a48 groups_alloc +EXPORT_SYMBOL vmlinux 0x555cfde4 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x55668480 setup_arg_pages +EXPORT_SYMBOL vmlinux 0x556db901 xor_vis_5 +EXPORT_SYMBOL vmlinux 0x5571235f i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0x55788b97 lock_rename +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55a18d0e write_one_page +EXPORT_SYMBOL vmlinux 0x55d54f34 drm_core_reclaim_buffers +EXPORT_SYMBOL vmlinux 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL vmlinux 0x55f98969 inode_setattr +EXPORT_SYMBOL vmlinux 0x55fc4ac2 get_phy_id +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x56021f9a dcache_dir_open +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x566a51c1 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x56791257 ebus_dma_enable +EXPORT_SYMBOL vmlinux 0x5687958e gen_pool_create +EXPORT_SYMBOL vmlinux 0x56a96999 bio_endio +EXPORT_SYMBOL vmlinux 0x56ad2a7f replace_mount_options +EXPORT_SYMBOL vmlinux 0x56cda35a sun4v_niagara2_setperf +EXPORT_SYMBOL vmlinux 0x56d17f6c blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x570d62b2 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x570f0f41 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x5710fda6 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x571fda93 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x57448d7f dev_mc_add +EXPORT_SYMBOL vmlinux 0x57576c58 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x577586d8 napi_complete +EXPORT_SYMBOL vmlinux 0x577f4bff do_BUG +EXPORT_SYMBOL vmlinux 0x57a6c58b register_quota_format +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57e85d0f i2c_verify_client +EXPORT_SYMBOL vmlinux 0x57f3941e qdisc_destroy +EXPORT_SYMBOL vmlinux 0x57f78778 skb_insert +EXPORT_SYMBOL vmlinux 0x57f7c686 sparc64_valid_addr_bitmap +EXPORT_SYMBOL vmlinux 0x5815df80 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x582fef16 auxio_set_lte +EXPORT_SYMBOL vmlinux 0x5834a553 dev_remove_pack +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x58673b04 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x58a801bb phy_detach +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58cf0aa4 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x58d44132 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x58d84483 unregister_console +EXPORT_SYMBOL vmlinux 0x58e7dbc7 simple_rename +EXPORT_SYMBOL vmlinux 0x59015151 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x59076b65 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x5921b948 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x593ea8f7 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x597c1701 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x59969f61 drm_compat_ioctl +EXPORT_SYMBOL vmlinux 0x5996d3d0 drm_connector_init +EXPORT_SYMBOL vmlinux 0x59ac7837 sk_stop_timer +EXPORT_SYMBOL vmlinux 0x59b557fa dev_gro_receive +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59f9659c drm_crtc_helper_set_config +EXPORT_SYMBOL vmlinux 0x59fb986f qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x5a02436d vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x5a1af876 nla_reserve +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a4c8296 dev_driver_string +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a634dce wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0x5a6d5e8c compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a779140 __up_read +EXPORT_SYMBOL vmlinux 0x5a83bb08 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x5a863836 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x5a896962 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x5a9a3373 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x5aa9a023 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x5acf8097 bio_integrity_free +EXPORT_SYMBOL vmlinux 0x5ad024a2 set_binfmt +EXPORT_SYMBOL vmlinux 0x5ad5b3fc bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x5ae6f676 km_state_expired +EXPORT_SYMBOL vmlinux 0x5afabd39 blk_get_request +EXPORT_SYMBOL vmlinux 0x5b0e981b wait_for_completion +EXPORT_SYMBOL vmlinux 0x5b1f363b da903x_query_status +EXPORT_SYMBOL vmlinux 0x5b2b9aff qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x5b33f89f pci_disable_device +EXPORT_SYMBOL vmlinux 0x5b4d7984 sock_i_uid +EXPORT_SYMBOL vmlinux 0x5b510e18 drm_mode_config_init +EXPORT_SYMBOL vmlinux 0x5b6d7652 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x5b7e8f0f pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0x5b886f8a revalidate_disk +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5baa5800 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x5c287b27 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x5c3b8193 _write_unlock +EXPORT_SYMBOL vmlinux 0x5c747742 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x5c7581d5 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0x5c859c1c bioset_free +EXPORT_SYMBOL vmlinux 0x5c974d77 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x5ca4a0a8 dump_fpu +EXPORT_SYMBOL vmlinux 0x5cba7742 drm_helper_encoder_in_use +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5cd0ce35 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x5ce875cf prom_root_node +EXPORT_SYMBOL vmlinux 0x5cecb98a tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d365f50 pci_fixup_device +EXPORT_SYMBOL vmlinux 0x5d44dc82 elevator_exit +EXPORT_SYMBOL vmlinux 0x5d4d0e26 __csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x5d5944fc vfs_statfs +EXPORT_SYMBOL vmlinux 0x5d59e9f2 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x5d8b07d3 drm_vblank_put +EXPORT_SYMBOL vmlinux 0x5d8ec206 simple_set_mnt +EXPORT_SYMBOL vmlinux 0x5d9162f4 dquot_commit +EXPORT_SYMBOL vmlinux 0x5da3bbbe jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x5daad117 register_qdisc +EXPORT_SYMBOL vmlinux 0x5dbbe98e memmove +EXPORT_SYMBOL vmlinux 0x5dc09537 mpage_readpages +EXPORT_SYMBOL vmlinux 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL vmlinux 0x5e10547e elv_queue_empty +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eaa43b1 pci_release_regions +EXPORT_SYMBOL vmlinux 0x5ec0e2a4 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x5ed3b172 pci_clear_master +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5ede059f del_timer_sync +EXPORT_SYMBOL vmlinux 0x5ede1f65 lock_may_write +EXPORT_SYMBOL vmlinux 0x5ee0a984 prom_getchild +EXPORT_SYMBOL vmlinux 0x5f0f52dc follow_pfn +EXPORT_SYMBOL vmlinux 0x5f2b7b34 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0x5f349d18 security_inode_permission +EXPORT_SYMBOL vmlinux 0x5f55b70e kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x5f87d0df key_unlink +EXPORT_SYMBOL vmlinux 0x5f9ea6c6 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x5fcaeb4c nla_append +EXPORT_SYMBOL vmlinux 0x5fdf18fb blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x6039d0a1 pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x6050c76a genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x6067a146 memcpy +EXPORT_SYMBOL vmlinux 0x606b31f9 input_filter_device +EXPORT_SYMBOL vmlinux 0x6082ccc6 __put_cred +EXPORT_SYMBOL vmlinux 0x609dd2f8 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x609e78ca blk_free_tags +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60a88066 eth_header +EXPORT_SYMBOL vmlinux 0x61189745 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x61240d43 __sg_free_table +EXPORT_SYMBOL vmlinux 0x613029f6 compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x613fdbcc generic_listxattr +EXPORT_SYMBOL vmlinux 0x6141f38d fifo_set_limit +EXPORT_SYMBOL vmlinux 0x61433338 nf_register_hook +EXPORT_SYMBOL vmlinux 0x6146dac8 drm_gem_object_alloc +EXPORT_SYMBOL vmlinux 0x6151edcd kernel_read +EXPORT_SYMBOL vmlinux 0x6164901c __alloc_skb +EXPORT_SYMBOL vmlinux 0x61804aee sk_wait_data +EXPORT_SYMBOL vmlinux 0x6186f530 drm_mode_create +EXPORT_SYMBOL vmlinux 0x61872418 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x618a2782 send_sig_info +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x619380dd skb_queue_purge +EXPORT_SYMBOL vmlinux 0x61ac35ac ida_destroy +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61c8ff0f jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x61d42f70 xfrm_input +EXPORT_SYMBOL vmlinux 0x621a1669 bmap +EXPORT_SYMBOL vmlinux 0x623fa012 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x625a4e9d kset_register +EXPORT_SYMBOL vmlinux 0x62696293 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62a0a9d0 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x62a9293f _clear_page +EXPORT_SYMBOL vmlinux 0x63125a67 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x633464bf sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x63648635 ldc_disconnect +EXPORT_SYMBOL vmlinux 0x636548b4 pcim_iounmap +EXPORT_SYMBOL vmlinux 0x63ad2d4e tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x63d56b56 tty_unregister_device +EXPORT_SYMBOL vmlinux 0x63e7d98b log_wait_commit +EXPORT_SYMBOL vmlinux 0x63ebed6d netif_receive_skb +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x6406d035 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x6418b9e6 file_remove_suid +EXPORT_SYMBOL vmlinux 0x6421684e vfs_link +EXPORT_SYMBOL vmlinux 0x643ceefa mempool_destroy +EXPORT_SYMBOL vmlinux 0x64774cde ldc_free_exp_dring +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64d067c0 kfifo_init +EXPORT_SYMBOL vmlinux 0x64e9dc04 add_timer +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65354e3b jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x659201e9 elv_add_request +EXPORT_SYMBOL vmlinux 0x659fa8ca uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x65a38ce0 mod_timer_pending +EXPORT_SYMBOL vmlinux 0x65b0a97e _PAGE_IE +EXPORT_SYMBOL vmlinux 0x65b6f4dd proc_dostring +EXPORT_SYMBOL vmlinux 0x65c76aa0 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x65d77589 sbus_set_sbus64 +EXPORT_SYMBOL vmlinux 0x65e44d5e vio_control_pkt_engine +EXPORT_SYMBOL vmlinux 0x66046902 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x660f7e69 key_payload_reserve +EXPORT_SYMBOL vmlinux 0x6613cd9d invalidate_bdev +EXPORT_SYMBOL vmlinux 0x6654c8e8 up_write +EXPORT_SYMBOL vmlinux 0x66686518 idr_remove +EXPORT_SYMBOL vmlinux 0x66778b69 aio_put_req +EXPORT_SYMBOL vmlinux 0x668cc032 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x669e5e3c bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x66c67f94 datagram_poll +EXPORT_SYMBOL vmlinux 0x66cae227 stop_a_enabled +EXPORT_SYMBOL vmlinux 0x66d41d71 tty_shutdown +EXPORT_SYMBOL vmlinux 0x66e108e8 of_register_driver +EXPORT_SYMBOL vmlinux 0x66e222a6 pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x66e7baf3 sg_miter_start +EXPORT_SYMBOL vmlinux 0x6702e088 generic_file_llseek +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x670ade8b check_disk_size_change +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x676830f5 notify_change +EXPORT_SYMBOL vmlinux 0x677eea7d ns87303_lock +EXPORT_SYMBOL vmlinux 0x67881bd6 ebus_dma_register +EXPORT_SYMBOL vmlinux 0x67a58de5 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x67f4152a netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x681fba70 bdget +EXPORT_SYMBOL vmlinux 0x68229ba0 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x68231dc5 kmem_cache_name +EXPORT_SYMBOL vmlinux 0x6823863c idr_remove_all +EXPORT_SYMBOL vmlinux 0x6825aab8 __nla_reserve +EXPORT_SYMBOL vmlinux 0x6837dfe2 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x686e9635 wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x687c2f32 __down_write +EXPORT_SYMBOL vmlinux 0x688e3282 alloc_pages_current +EXPORT_SYMBOL vmlinux 0x68be0c00 unregister_con_driver +EXPORT_SYMBOL vmlinux 0x68decc91 blk_complete_request +EXPORT_SYMBOL vmlinux 0x68f45197 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x68f8ae28 compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x68fb74ca timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x69010b06 insw +EXPORT_SYMBOL vmlinux 0x69609a94 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69843e14 drm_idlelock_take +EXPORT_SYMBOL vmlinux 0x6984db74 mdesc_get_property +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69bf3fda put_tty_driver +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d37025 atomic64_sub_ret +EXPORT_SYMBOL vmlinux 0x69dda84c neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69fac3a3 __rta_fill +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a0d1a24 nf_register_hooks +EXPORT_SYMBOL vmlinux 0x6a349d31 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x6a38532b wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a61187e lookup_one_len +EXPORT_SYMBOL vmlinux 0x6a7ed36a __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0x6a881aff bd_release +EXPORT_SYMBOL vmlinux 0x6a955c93 ps2_handle_response +EXPORT_SYMBOL vmlinux 0x6a9e4c1b kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x6ab39f64 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ae7f03e blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x6ae9614f tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x6af1c32a tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b267d5f brioctl_set +EXPORT_SYMBOL vmlinux 0x6b2da52a serio_close +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b697c32 security_inode_readlink +EXPORT_SYMBOL vmlinux 0x6b9922c4 idr_pre_get +EXPORT_SYMBOL vmlinux 0x6b9a2558 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x6ba74822 poll_freewait +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bc646c2 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x6bd7e3ef xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6bfe993d _write_trylock +EXPORT_SYMBOL vmlinux 0x6c06acb4 kobject_put +EXPORT_SYMBOL vmlinux 0x6c45e773 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x6c4f9d84 phy_driver_register +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6e4648 security_path_truncate +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c908678 iget_locked +EXPORT_SYMBOL vmlinux 0x6cab07ba page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x6cf8c347 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x6d01f074 km_new_mapping +EXPORT_SYMBOL vmlinux 0x6d0e3039 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL vmlinux 0x6d481480 skb_append +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d93e82e complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dba48ec prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x6dd889c9 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x6de375c1 xor_niagara_5 +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6dfd7cba ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x6e331945 down +EXPORT_SYMBOL vmlinux 0x6e470b3f clear_user_page +EXPORT_SYMBOL vmlinux 0x6e690acb filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e90c5fe simple_readpage +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ead2b99 write_cache_pages +EXPORT_SYMBOL vmlinux 0x6eadb25e send_sig +EXPORT_SYMBOL vmlinux 0x6eb030d1 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x6ece2197 of_phy_connect_fixed_link +EXPORT_SYMBOL vmlinux 0x6ed94417 atomic64_add +EXPORT_SYMBOL vmlinux 0x6eeb13ba pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x6ef83564 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x6f0a5239 d_obtain_alias +EXPORT_SYMBOL vmlinux 0x6f20540f ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x6f295dbf bdi_register +EXPORT_SYMBOL vmlinux 0x6f55752c genl_sock +EXPORT_SYMBOL vmlinux 0x6f7c07b2 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x6f7ce561 set_bh_page +EXPORT_SYMBOL vmlinux 0x6fb2f7ee proto_register +EXPORT_SYMBOL vmlinux 0x6fb4a12f get_write_access +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x702f162c __memscan_generic +EXPORT_SYMBOL vmlinux 0x7060e337 down_timeout +EXPORT_SYMBOL vmlinux 0x70765d1c vfs_lstat +EXPORT_SYMBOL vmlinux 0x70851c84 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x708dbcb7 simple_fill_super +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70c54890 key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x70dbcff0 seq_open +EXPORT_SYMBOL vmlinux 0x712730a7 __flushw_user +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x71459e17 dev_change_flags +EXPORT_SYMBOL vmlinux 0x7147fcac unload_nls +EXPORT_SYMBOL vmlinux 0x716313f9 skb_trim +EXPORT_SYMBOL vmlinux 0x7164059c pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x7169eb38 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71bc8e6d dst_destroy +EXPORT_SYMBOL vmlinux 0x71c02438 sg_next +EXPORT_SYMBOL vmlinux 0x723ef6d1 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x726a0d86 inet_release +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72e19422 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x72ebe44a __wake_up +EXPORT_SYMBOL vmlinux 0x72f6ff8c sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x733a8ecd bio_copy_user +EXPORT_SYMBOL vmlinux 0x73559ef8 nf_getsockopt +EXPORT_SYMBOL vmlinux 0x7372c416 neigh_update +EXPORT_SYMBOL vmlinux 0x73bd7984 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x73e0877a insl +EXPORT_SYMBOL vmlinux 0x73f5d50b tty_throttle +EXPORT_SYMBOL vmlinux 0x73fcd2b6 seq_puts +EXPORT_SYMBOL vmlinux 0x741b23b8 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x74616cac ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x7462f417 net2280_set_fifo_mode +EXPORT_SYMBOL vmlinux 0x747e7db1 find_get_page +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x74892074 bio_map_kern +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74c735a4 vc_cons +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74cca583 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x74d738fa tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x74de33cd of_release_dev +EXPORT_SYMBOL vmlinux 0x752e43ad pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x752f5272 xfrm_register_type +EXPORT_SYMBOL vmlinux 0x755974e8 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x7592e08f dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x7593c2bd __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x75a93ed3 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75d0f210 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x75d8028a udp_poll +EXPORT_SYMBOL vmlinux 0x75d836b4 mdio_bus_type +EXPORT_SYMBOL vmlinux 0x75e0ffd5 _read_trylock +EXPORT_SYMBOL vmlinux 0x75f6ba9a install_exec_creds +EXPORT_SYMBOL vmlinux 0x75f874c3 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x75f981da tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x7648707a bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x765f2376 tty_port_close_end +EXPORT_SYMBOL vmlinux 0x766c56c0 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x766e7526 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x76b22e5b dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x76b5cb66 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d1cd7d neigh_create +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76fce0f2 unregister_filesystem +EXPORT_SYMBOL vmlinux 0x7708adc6 kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x772b8d0d phy_device_free +EXPORT_SYMBOL vmlinux 0x7731a849 compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x77760c2b nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x77a8da7d give_up_console +EXPORT_SYMBOL vmlinux 0x77b28899 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x77c96cc8 nobh_write_begin +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x7808db44 _spin_trylock +EXPORT_SYMBOL vmlinux 0x782cb47d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x7841cb56 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x784d927e journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x786fc6b6 journal_set_features +EXPORT_SYMBOL vmlinux 0x7887a963 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x789b114a sock_wmalloc +EXPORT_SYMBOL vmlinux 0x78c90f51 cpu_mask_all +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x79028149 km_policy_expired +EXPORT_SYMBOL vmlinux 0x796c3477 vfs_unlink +EXPORT_SYMBOL vmlinux 0x796ee358 security_file_permission +EXPORT_SYMBOL vmlinux 0x79758792 tcf_hash_create +EXPORT_SYMBOL vmlinux 0x79805743 of_match_node +EXPORT_SYMBOL vmlinux 0x7984f75d drm_getsarea +EXPORT_SYMBOL vmlinux 0x7990adb5 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x79996abc tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79aeac55 vfs_mknod +EXPORT_SYMBOL vmlinux 0x79f39f7a dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x79f6c7a4 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x7a1af1cb phy_stop +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a39aa93 kthread_stop +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a5bcd76 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x7a6bb613 idr_init +EXPORT_SYMBOL vmlinux 0x7ac1c46f _read_unlock +EXPORT_SYMBOL vmlinux 0x7ad64796 input_event +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7b1a9775 drm_init +EXPORT_SYMBOL vmlinux 0x7b2007f8 nla_put +EXPORT_SYMBOL vmlinux 0x7b36074c i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x7b49ecc6 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x7b5e53f8 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x7b64a3f1 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x7b6964ae neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7b90ca09 nf_ct_attach +EXPORT_SYMBOL vmlinux 0x7ba730c6 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x7baa9fa5 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL vmlinux 0x7bf6f5e4 skb_make_writable +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c2af219 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c7dca1e textsearch_prepare +EXPORT_SYMBOL vmlinux 0x7c86323f serio_open +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c9822c3 of_find_node_by_phandle +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cb8b43e remove_arg_zero +EXPORT_SYMBOL vmlinux 0x7cba9c75 d_path +EXPORT_SYMBOL vmlinux 0x7cd94d76 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x7cddf447 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x7cefc3d5 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x7cf1edf8 console_stop +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d1c74de simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x7d4fa08c __break_lease +EXPORT_SYMBOL vmlinux 0x7d585b90 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x7d6ca75c mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x7d6d3911 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x7d70d65e sbusfb_mmap_helper +EXPORT_SYMBOL vmlinux 0x7d869619 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x7da38c77 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x7dbcf347 pci_set_master +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7dcf5e03 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x7e1502c4 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x7e253b30 mempool_create_node +EXPORT_SYMBOL vmlinux 0x7e2656f9 sk_alloc +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e796e75 drm_mm_init +EXPORT_SYMBOL vmlinux 0x7eb207d9 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7ee9938d _write_lock_bh +EXPORT_SYMBOL vmlinux 0x7f008bed tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x7f0c99f3 pci_request_region +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f3f1638 neigh_lookup +EXPORT_SYMBOL vmlinux 0x7f4e8458 unlock_buffer +EXPORT_SYMBOL vmlinux 0x7f6badf7 check_disk_change +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f89d030 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x7f9ee986 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x7fa43754 bd_claim +EXPORT_SYMBOL vmlinux 0x7fa655d5 tty_set_operations +EXPORT_SYMBOL vmlinux 0x7fb9c7fe genphy_update_link +EXPORT_SYMBOL vmlinux 0x7fc455c6 fb_blank +EXPORT_SYMBOL vmlinux 0x7fc86727 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x802ffeed ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x80302064 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x8062754e textsearch_destroy +EXPORT_SYMBOL vmlinux 0x80665f39 register_console +EXPORT_SYMBOL vmlinux 0x807b7089 prom_firstprop +EXPORT_SYMBOL vmlinux 0x808aca14 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x80af5895 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x80bf3bc5 sun4v_niagara_getperf +EXPORT_SYMBOL vmlinux 0x80d26547 pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x80d55013 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x80f5ceda key_link +EXPORT_SYMBOL vmlinux 0x81226cf2 drm_debugfs_remove_files +EXPORT_SYMBOL vmlinux 0x81555de7 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x81568adc mii_phy_probe +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x81702e4f netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x81a9be51 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x81dcd5c2 idr_get_new +EXPORT_SYMBOL vmlinux 0x81e69a4f drm_handle_vblank +EXPORT_SYMBOL vmlinux 0x81f433a7 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x81ffa589 clear_inode +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x821c4e70 simple_write_begin +EXPORT_SYMBOL vmlinux 0x823b7ef0 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x823d4a79 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x823e7866 dma_pool_free +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826cabc7 mdiobus_write +EXPORT_SYMBOL vmlinux 0x82737171 find_lock_page +EXPORT_SYMBOL vmlinux 0x827d51d9 napi_frags_finish +EXPORT_SYMBOL vmlinux 0x829e6be5 put_mnt_ns +EXPORT_SYMBOL vmlinux 0x82b1de01 ida_remove +EXPORT_SYMBOL vmlinux 0x82bd93c0 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x82e3b9f0 may_umount_tree +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x82f789c3 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x83179e01 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x8334ade1 __bio_clone +EXPORT_SYMBOL vmlinux 0x83614d43 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x837f9e26 drm_core_ioremapfree +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83a4941b inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83cdd357 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x83d3fe80 drm_crtc_helper_set_mode +EXPORT_SYMBOL vmlinux 0x83d55524 wireless_send_event +EXPORT_SYMBOL vmlinux 0x83fbe41f cdev_del +EXPORT_SYMBOL vmlinux 0x8404257d drm_vblank_get +EXPORT_SYMBOL vmlinux 0x84410dc9 lease_modify +EXPORT_SYMBOL vmlinux 0x844397f6 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x8446bcde _read_unlock_irq +EXPORT_SYMBOL vmlinux 0x8449bf1c drm_mode_create_scaling_mode_property +EXPORT_SYMBOL vmlinux 0x846a8359 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x84915b2b bdevname +EXPORT_SYMBOL vmlinux 0x849632e0 udp_prot +EXPORT_SYMBOL vmlinux 0x849b94fa netlink_set_err +EXPORT_SYMBOL vmlinux 0x84a48eb5 drm_do_probe_ddc_edid +EXPORT_SYMBOL vmlinux 0x84b1fd25 get_fb_unmapped_area +EXPORT_SYMBOL vmlinux 0x84ff316e dev_get_stats +EXPORT_SYMBOL vmlinux 0x85168858 search_binary_handler +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x856c9fe3 idr_destroy +EXPORT_SYMBOL vmlinux 0x857311a3 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x8596867f input_open_device +EXPORT_SYMBOL vmlinux 0x85977ccf phy_device_create +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85abf943 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x85aec0e3 xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x85ba690f tcp_disconnect +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e4904b pci_restore_state +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x8636ac16 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x86398314 set_anon_super +EXPORT_SYMBOL vmlinux 0x865d2dc8 scm_fp_dup +EXPORT_SYMBOL vmlinux 0x867177bf cont_write_begin +EXPORT_SYMBOL vmlinux 0x86729884 drm_fasync +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86c7146d vfs_fstat +EXPORT_SYMBOL vmlinux 0x86cbdeaa jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0x86d9d812 __blk_end_request +EXPORT_SYMBOL vmlinux 0x86e863a5 dma_supported +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x86fea286 genphy_read_status +EXPORT_SYMBOL vmlinux 0x8705ce26 del_timer +EXPORT_SYMBOL vmlinux 0x87065e81 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x8709f071 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x872bd087 suncore_mouse_baud_detection +EXPORT_SYMBOL vmlinux 0x8732ad42 qdisc_reset +EXPORT_SYMBOL vmlinux 0x873edff0 drm_sysfs_connector_add +EXPORT_SYMBOL vmlinux 0x87523212 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x87767e2e do_splice_from +EXPORT_SYMBOL vmlinux 0x8784015d linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x879483b1 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x87a5b8b3 get_sb_bdev +EXPORT_SYMBOL vmlinux 0x87c3eb45 __napi_complete +EXPORT_SYMBOL vmlinux 0x87e82358 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x8810786a register_exec_domain +EXPORT_SYMBOL vmlinux 0x8812bc8c netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x881428af complete +EXPORT_SYMBOL vmlinux 0x883b24fb sun4v_niagara_setperf +EXPORT_SYMBOL vmlinux 0x88559867 neigh_table_clear +EXPORT_SYMBOL vmlinux 0x88640651 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x887ad502 pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x88be1cec tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x88c72f30 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x88dc1e96 down_read_trylock +EXPORT_SYMBOL vmlinux 0x88e079c6 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x8902f1af of_console_path +EXPORT_SYMBOL vmlinux 0x895577b0 numa_cpu_lookup_table +EXPORT_SYMBOL vmlinux 0x8965481e vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x89713fbf ldc_alloc_exp_dring +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89a424e5 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x89b91c56 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89ebd2b1 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a12128e register_chrdev +EXPORT_SYMBOL vmlinux 0x8a217510 of_get_property +EXPORT_SYMBOL vmlinux 0x8a3208fc netdev_features_change +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a4feaab tcp_child_process +EXPORT_SYMBOL vmlinux 0x8a5b9ad6 input_release_device +EXPORT_SYMBOL vmlinux 0x8a5bd54a fb_set_cmap +EXPORT_SYMBOL vmlinux 0x8a6505d9 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x8a7c31ce filemap_fault +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8aa1b2c1 init_file +EXPORT_SYMBOL vmlinux 0x8abf8d30 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8ae4e311 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x8ae8405b may_umount +EXPORT_SYMBOL vmlinux 0x8b0403e6 prom_getproperty +EXPORT_SYMBOL vmlinux 0x8b3b087d __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x8b4d94cb ldc_read +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8b922c0f __strnlen_user +EXPORT_SYMBOL vmlinux 0x8b9e9daa drm_mode_remove +EXPORT_SYMBOL vmlinux 0x8ba0c746 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8be3d5b4 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x8be69fbe pci_alloc_consistent +EXPORT_SYMBOL vmlinux 0x8beca5d6 scm_detach_fds +EXPORT_SYMBOL vmlinux 0x8bf11b0c take_over_console +EXPORT_SYMBOL vmlinux 0x8bf87169 __bzero +EXPORT_SYMBOL vmlinux 0x8c0f7511 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x8c14fd52 drm_helper_crtc_in_use +EXPORT_SYMBOL vmlinux 0x8c3ebc72 saved_command_line +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c8094a8 handle_sysrq +EXPORT_SYMBOL vmlinux 0x8c954e39 tty_name +EXPORT_SYMBOL vmlinux 0x8c96eea2 netlink_unicast +EXPORT_SYMBOL vmlinux 0x8cd5d9a6 netpoll_print_options +EXPORT_SYMBOL vmlinux 0x8ced2c6d pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x8d0c3953 inode_get_bytes +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4299cf drm_mode_height +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d8f2b04 tcp_sendpage +EXPORT_SYMBOL vmlinux 0x8d94c0cb simple_transaction_release +EXPORT_SYMBOL vmlinux 0x8dae4d62 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x8dbf9662 read_cache_pages +EXPORT_SYMBOL vmlinux 0x8dd70f74 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e19e950 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x8e1c0a84 bdget_disk +EXPORT_SYMBOL vmlinux 0x8e2fb91b mutex_lock +EXPORT_SYMBOL vmlinux 0x8e399fff filp_close +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e49d03c mod_timer +EXPORT_SYMBOL vmlinux 0x8e527c53 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x8e603eb2 journal_lock_updates +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e879bb7 __vmalloc +EXPORT_SYMBOL vmlinux 0x8e9bff46 update_region +EXPORT_SYMBOL vmlinux 0x8eba0e46 journal_restart +EXPORT_SYMBOL vmlinux 0x8ebd5309 deactivate_super +EXPORT_SYMBOL vmlinux 0x8ec19e18 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x8eca605b call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x8ed6d6f1 __pagevec_release +EXPORT_SYMBOL vmlinux 0x8ee88d1c __down_read_trylock +EXPORT_SYMBOL vmlinux 0x8f0ce15b skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x8f10278e ps2_command +EXPORT_SYMBOL vmlinux 0x8f34225b sg_miter_stop +EXPORT_SYMBOL vmlinux 0x8f35611c should_remove_suid +EXPORT_SYMBOL vmlinux 0x8f37f57e drm_connector_attach_property +EXPORT_SYMBOL vmlinux 0x8f3a775c inetdev_by_index +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f4cff24 __destroy_inode +EXPORT_SYMBOL vmlinux 0x8f5e917a of_find_node_by_type +EXPORT_SYMBOL vmlinux 0x8f692b78 drm_encoder_cleanup +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f78460e proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x8f84f594 drm_put_dev +EXPORT_SYMBOL vmlinux 0x8f885a87 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x8f9a4c94 d_lookup +EXPORT_SYMBOL vmlinux 0x8fada73a proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x8fb493c3 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x8fb9e95c bdi_init +EXPORT_SYMBOL vmlinux 0x8fca34f5 ebus_dma_residue +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x901ed786 tcp_connect +EXPORT_SYMBOL vmlinux 0x903dfe6e alloc_fddidev +EXPORT_SYMBOL vmlinux 0x903f04eb init_buffer +EXPORT_SYMBOL vmlinux 0x904058bf sock_create_lite +EXPORT_SYMBOL vmlinux 0x905d7679 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x90930f46 get_super +EXPORT_SYMBOL vmlinux 0x90b54574 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x90b98c3c serio_interrupt +EXPORT_SYMBOL vmlinux 0x9117a881 prom_getstring +EXPORT_SYMBOL vmlinux 0x912f6047 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9187ab13 __nla_put +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921f4390 atomic_add +EXPORT_SYMBOL vmlinux 0x923627c3 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x923e9cc6 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x924756dc bio_alloc +EXPORT_SYMBOL vmlinux 0x9263c4f1 nobh_write_end +EXPORT_SYMBOL vmlinux 0x926f965d dput +EXPORT_SYMBOL vmlinux 0x9296dc84 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x9298747e kernel_listen +EXPORT_SYMBOL vmlinux 0x92a9748b ip_getsockopt +EXPORT_SYMBOL vmlinux 0x92d0d1f4 _write_lock +EXPORT_SYMBOL vmlinux 0x92d211f6 lock_fb_info +EXPORT_SYMBOL vmlinux 0x92d2269e blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x930d290c mpage_readpage +EXPORT_SYMBOL vmlinux 0x9331d6bb tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x9339bf8e __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x93466113 genphy_suspend +EXPORT_SYMBOL vmlinux 0x9353d35a compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0x93556b9e migrate_page +EXPORT_SYMBOL vmlinux 0x9362a7f2 inet_put_port +EXPORT_SYMBOL vmlinux 0x936d7c5f drm_gem_mmap +EXPORT_SYMBOL vmlinux 0x9379c9ba blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93adaccb get_user_pages +EXPORT_SYMBOL vmlinux 0x93b6b402 ldc_unmap +EXPORT_SYMBOL vmlinux 0x93b7b2c6 dquot_free_space +EXPORT_SYMBOL vmlinux 0x93ddb744 kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x93e6fe26 dquot_drop +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9443289e set_bit +EXPORT_SYMBOL vmlinux 0x94483b6d downgrade_write +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94b0734e drm_irq_install +EXPORT_SYMBOL vmlinux 0x94c365be mac_find_mode +EXPORT_SYMBOL vmlinux 0x94eb94a1 journal_force_commit +EXPORT_SYMBOL vmlinux 0x950b0b51 test_and_set_bit +EXPORT_SYMBOL vmlinux 0x951af11e pci_device_to_OF_node +EXPORT_SYMBOL vmlinux 0x9540d68e netpoll_poll +EXPORT_SYMBOL vmlinux 0x95415266 bit_waitqueue +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954b1130 neigh_compat_output +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x9571e014 tty_register_device +EXPORT_SYMBOL vmlinux 0x9577aa57 sysctl_data +EXPORT_SYMBOL vmlinux 0x958118bf dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x95b1c828 i2c_release_client +EXPORT_SYMBOL vmlinux 0x95bd84be do_munmap +EXPORT_SYMBOL vmlinux 0x95c72237 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x9634f22f kill_pgrp +EXPORT_SYMBOL vmlinux 0x96350661 udplite_prot +EXPORT_SYMBOL vmlinux 0x964a3676 pci_map_sg +EXPORT_SYMBOL vmlinux 0x9652a247 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x9659c1c5 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x965c62c6 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0x9668e43d commit_creds +EXPORT_SYMBOL vmlinux 0x9687b275 tty_write_room +EXPORT_SYMBOL vmlinux 0x968fc88b xfrm_register_km +EXPORT_SYMBOL vmlinux 0x96ac0440 ldc_free +EXPORT_SYMBOL vmlinux 0x96ada671 sock_no_bind +EXPORT_SYMBOL vmlinux 0x96bbf180 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x96e64039 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x970d6ee5 get_disk +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x975eacce ___pskb_trim +EXPORT_SYMBOL vmlinux 0x97f8c3e4 thaw_bdev +EXPORT_SYMBOL vmlinux 0x98207107 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x983c86e9 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x984be997 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x985e9628 of_match_device +EXPORT_SYMBOL vmlinux 0x9863c783 eth_header_parse +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x98722cc3 drm_mm_takedown +EXPORT_SYMBOL vmlinux 0x9872d116 cmos_regs +EXPORT_SYMBOL vmlinux 0x9891d5a8 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x98ccbda6 of_set_property +EXPORT_SYMBOL vmlinux 0x98d58f4f grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x98f3894d dentry_unhash +EXPORT_SYMBOL vmlinux 0x99031707 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x99153eea dev_close +EXPORT_SYMBOL vmlinux 0x9920656f tty_devnum +EXPORT_SYMBOL vmlinux 0x992fa023 pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x993b65fa sk_dst_check +EXPORT_SYMBOL vmlinux 0x993c6b3d drm_crtc_init +EXPORT_SYMBOL vmlinux 0x99686d76 register_sysrq_key +EXPORT_SYMBOL vmlinux 0x9968daa6 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a30223a serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x9a382ef4 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x9a5096fa pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x9a6d7724 touch_atime +EXPORT_SYMBOL vmlinux 0x9a85e041 vfs_create +EXPORT_SYMBOL vmlinux 0x9a8d56e9 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x9a9736fe phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9aacd62b prom_getintdefault +EXPORT_SYMBOL vmlinux 0x9ae2a8db redraw_screen +EXPORT_SYMBOL vmlinux 0x9b36f238 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b3f6b45 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x9b704c21 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x9b831aae km_query +EXPORT_SYMBOL vmlinux 0x9ba268e0 phy_disconnect +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bd6a982 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c01fcf8 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x9c05aafa fb_class +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c11b655 drm_lock_take +EXPORT_SYMBOL vmlinux 0x9c3290e5 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x9c33ce9f elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x9c3a81f2 dev_get_flags +EXPORT_SYMBOL vmlinux 0x9c497213 pci_find_capability +EXPORT_SYMBOL vmlinux 0x9c5ee544 lookup_bdev +EXPORT_SYMBOL vmlinux 0x9c703ae6 _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9caa7840 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x9cac705a __kfifo_get +EXPORT_SYMBOL vmlinux 0x9cb7730c udp_ioctl +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cee45ee blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x9d0ed2fa consume_skb +EXPORT_SYMBOL vmlinux 0x9d11de26 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x9d130c65 napi_get_frags +EXPORT_SYMBOL vmlinux 0x9d1316fa block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x9d6af409 posix_acl_permission +EXPORT_SYMBOL vmlinux 0x9d6db1d1 tty_mutex +EXPORT_SYMBOL vmlinux 0x9d735ffc sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9db37875 change_bit +EXPORT_SYMBOL vmlinux 0x9dd36e44 journal_stop +EXPORT_SYMBOL vmlinux 0x9dfdad1a skb_pull +EXPORT_SYMBOL vmlinux 0x9e09b4a0 drm_get_edid +EXPORT_SYMBOL vmlinux 0x9e58307a netif_device_attach +EXPORT_SYMBOL vmlinux 0x9e771285 _PAGE_E +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9ecacca8 of_set_property_mutex +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f09bfba blk_end_request_all +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f118445 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x9f1433df kill_anon_super +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f31f522 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x9f50df22 of_device_register +EXPORT_SYMBOL vmlinux 0x9f62bfc5 remove_wait_queue +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa18a63 pci_set_mwi +EXPORT_SYMBOL vmlinux 0x9fe5ea74 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x9ffb8ef3 drm_mm_clean +EXPORT_SYMBOL vmlinux 0xa00c2df9 skb_tx_hash +EXPORT_SYMBOL vmlinux 0xa01dba71 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa0504c33 secpath_dup +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa091636f cfb_fillrect +EXPORT_SYMBOL vmlinux 0xa09e47f8 input_register_device +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0ebb2ba _PAGE_CACHE +EXPORT_SYMBOL vmlinux 0xa0fb3e3f skb_gso_segment +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa10b0310 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa13a8b61 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0xa13ef355 pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0xa151bcfa drm_helper_initial_config +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1cc9fed block_prepare_write +EXPORT_SYMBOL vmlinux 0xa1ccccf0 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xa1d12bf2 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa2230181 add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0xa224dcfb blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0xa23f9f1a jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0xa258aefa kthread_bind +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2b6a107 pci_choose_state +EXPORT_SYMBOL vmlinux 0xa2b9fd5c dev_unicast_delete +EXPORT_SYMBOL vmlinux 0xa2cf6488 tc_classify_compat +EXPORT_SYMBOL vmlinux 0xa2dd4db4 journal_forget +EXPORT_SYMBOL vmlinux 0xa2eba334 iget_failed +EXPORT_SYMBOL vmlinux 0xa2ecab3e d_instantiate +EXPORT_SYMBOL vmlinux 0xa2f52583 balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xa31a6b17 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa3334006 netdev_state_change +EXPORT_SYMBOL vmlinux 0xa33eecc9 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa34a4aa7 ___copy_to_user +EXPORT_SYMBOL vmlinux 0xa34fc8d1 dma_set_mask +EXPORT_SYMBOL vmlinux 0xa35ad93d ilookup5 +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa386850a vfs_fsync +EXPORT_SYMBOL vmlinux 0xa3989f12 generic_setxattr +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa3c9de75 make_EII_client +EXPORT_SYMBOL vmlinux 0xa3f36cb1 of_find_device_by_node +EXPORT_SYMBOL vmlinux 0xa4048c96 drop_super +EXPORT_SYMBOL vmlinux 0xa438da94 dev_addr_add +EXPORT_SYMBOL vmlinux 0xa452260c netdev_class_create_file +EXPORT_SYMBOL vmlinux 0xa45338b0 dev_trans_start +EXPORT_SYMBOL vmlinux 0xa468a9a8 generic_file_mmap +EXPORT_SYMBOL vmlinux 0xa4718403 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0xa4ac5338 drm_debugfs_create_files +EXPORT_SYMBOL vmlinux 0xa4b1fa82 seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xa4ec4fb9 set_create_files_as +EXPORT_SYMBOL vmlinux 0xa50804c2 uart_suspend_port +EXPORT_SYMBOL vmlinux 0xa50c3d5f __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xa51b47e9 drm_core_ioremap_wc +EXPORT_SYMBOL vmlinux 0xa51b5fae ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0xa51c0c50 pci_pme_active +EXPORT_SYMBOL vmlinux 0xa528725f blk_start_queue +EXPORT_SYMBOL vmlinux 0xa53325a3 drm_i_have_hw_lock +EXPORT_SYMBOL vmlinux 0xa54b804c seq_read +EXPORT_SYMBOL vmlinux 0xa555c5e2 ip_dev_find +EXPORT_SYMBOL vmlinux 0xa5762959 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0xa576c263 generic_find_next_le_bit +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa58e17cd sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5e4f65c __next_cpu_nr +EXPORT_SYMBOL vmlinux 0xa5e68673 tlb_type +EXPORT_SYMBOL vmlinux 0xa5f19f40 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xa60bf7ab bio_kmalloc +EXPORT_SYMBOL vmlinux 0xa62b3a59 misc_deregister +EXPORT_SYMBOL vmlinux 0xa641d5c2 force_sig +EXPORT_SYMBOL vmlinux 0xa64c1ad2 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0xa65361dd udp_sendmsg +EXPORT_SYMBOL vmlinux 0xa65a78e0 ldc_bind +EXPORT_SYMBOL vmlinux 0xa6600a27 set_irq_chip +EXPORT_SYMBOL vmlinux 0xa66dd72d filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xa67e402b dquot_scan_active +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6860ce0 tcf_hash_release +EXPORT_SYMBOL vmlinux 0xa6878e93 proc_create_data +EXPORT_SYMBOL vmlinux 0xa68db24c get_sb_single +EXPORT_SYMBOL vmlinux 0xa691f85e elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xa6926dcf jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0xa6979799 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xa6c03e0b journal_init_inode +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa7195c50 drm_framebuffer_cleanup +EXPORT_SYMBOL vmlinux 0xa72a0f5b nr_online_nodes +EXPORT_SYMBOL vmlinux 0xa7321fab vfs_readv +EXPORT_SYMBOL vmlinux 0xa74b6a69 drm_exit +EXPORT_SYMBOL vmlinux 0xa7746717 kernel_accept +EXPORT_SYMBOL vmlinux 0xa789c072 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0xa7a304ed tcp_sendmsg +EXPORT_SYMBOL vmlinux 0xa7bb9f3d inet_dgram_ops +EXPORT_SYMBOL vmlinux 0xa82f8a65 netpoll_setup +EXPORT_SYMBOL vmlinux 0xa847262c drm_sysfs_hotplug_event +EXPORT_SYMBOL vmlinux 0xa84a5d21 fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0xa8722ebe sk_free +EXPORT_SYMBOL vmlinux 0xa8771c09 boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa898cfe0 journal_get_write_access +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8d4e280 drm_mode_validate_clocks +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa9020d17 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xa90d4575 skb_copy_bits +EXPORT_SYMBOL vmlinux 0xa9111a47 do_gettimeofday +EXPORT_SYMBOL vmlinux 0xa9117246 blk_end_request +EXPORT_SYMBOL vmlinux 0xa972e47a inode_permission +EXPORT_SYMBOL vmlinux 0xa998ce67 drm_mm_get_block_generic +EXPORT_SYMBOL vmlinux 0xa9bee899 blk_stop_queue +EXPORT_SYMBOL vmlinux 0xa9c9715a blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xa9d3e62a vfs_symlink +EXPORT_SYMBOL vmlinux 0xaa0ee93c lease_get_mtime +EXPORT_SYMBOL vmlinux 0xaa2580f1 unregister_netdev +EXPORT_SYMBOL vmlinux 0xaa4b1ce3 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0xaa4f5895 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0xaaa5ad39 igrab +EXPORT_SYMBOL vmlinux 0xaaa8d275 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0xaaabfbe3 elevator_init +EXPORT_SYMBOL vmlinux 0xaae44e35 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xab05db75 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0xab7cbf69 generic_ro_fops +EXPORT_SYMBOL vmlinux 0xab91468c i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0xab9a67f1 lock_sock_nested +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabb3ad38 page_put_link +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd2e62f ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xac047b44 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xac2dab09 prom_getint +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac443f68 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xac4ab6c2 pci_dma_supported +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac6e40e2 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0xacaff592 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xaccbb97e uart_remove_one_port +EXPORT_SYMBOL vmlinux 0xacd02d6a kfree_skb +EXPORT_SYMBOL vmlinux 0xacd8593b xfrm_state_add +EXPORT_SYMBOL vmlinux 0xace4c8ed tick_ops +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad001189 dev_set_mtu +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad23f3c1 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0xad27091b nf_log_register +EXPORT_SYMBOL vmlinux 0xad39d2e6 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0xad597500 init_task +EXPORT_SYMBOL vmlinux 0xad706520 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xad7103c2 set_device_ro +EXPORT_SYMBOL vmlinux 0xad8223b9 elv_rb_find +EXPORT_SYMBOL vmlinux 0xad8b5995 seq_write +EXPORT_SYMBOL vmlinux 0xad997589 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xadaed925 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0xadaff307 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0xadb7752c generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0xadb940d9 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0xadf632ea mod_timer_pinned +EXPORT_SYMBOL vmlinux 0xae16db71 serio_rescan +EXPORT_SYMBOL vmlinux 0xae211205 fb_pan_display +EXPORT_SYMBOL vmlinux 0xae32116c drm_mode_destroy +EXPORT_SYMBOL vmlinux 0xae3b4b8e tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xae40dcf5 __bread +EXPORT_SYMBOL vmlinux 0xae43806d __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xae4d6691 bio_integrity_split +EXPORT_SYMBOL vmlinux 0xae5d508f bioset_integrity_create +EXPORT_SYMBOL vmlinux 0xae860e12 kobject_add +EXPORT_SYMBOL vmlinux 0xae99c93b sk_filter +EXPORT_SYMBOL vmlinux 0xaeaa50b8 i2c_use_client +EXPORT_SYMBOL vmlinux 0xaebeabd3 drm_gem_vm_open +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaf0a26e3 sunserial_unregister_minors +EXPORT_SYMBOL vmlinux 0xaf29788e drm_sman_init +EXPORT_SYMBOL vmlinux 0xaf37c94e phy_connect +EXPORT_SYMBOL vmlinux 0xafaa1d47 eth_validate_addr +EXPORT_SYMBOL vmlinux 0xafafdbc4 sunserial_console_match +EXPORT_SYMBOL vmlinux 0xafd4e29e wake_up_process +EXPORT_SYMBOL vmlinux 0xafdbde68 inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xafdc59e4 nlmsg_notify +EXPORT_SYMBOL vmlinux 0xafe6583b sg_last +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xaff5afd3 do_SAK +EXPORT_SYMBOL vmlinux 0xaffb41d6 __wake_up_bit +EXPORT_SYMBOL vmlinux 0xb00448d7 i2c_register_driver +EXPORT_SYMBOL vmlinux 0xb0253446 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0xb0356c5e pci_get_subsys +EXPORT_SYMBOL vmlinux 0xb039dd74 make_bad_inode +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb09acc61 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xb09f13d6 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0ba531f tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xb0d715db idr_for_each +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb11ee329 skb_dequeue +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb127e033 __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0xb13f8fb6 _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0xb16297bd register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xb1842dd1 drm_property_create +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb194e009 pci_write_vpd +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1a4b18e inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cc877f sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xb1efa872 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0xb1f28c84 netif_napi_add +EXPORT_SYMBOL vmlinux 0xb1f88c86 drm_mode_config_cleanup +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb1fd12fe phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2581d0e drm_mode_connector_detach_encoder +EXPORT_SYMBOL vmlinux 0xb2615c3c tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb2a4661f register_netdevice +EXPORT_SYMBOL vmlinux 0xb2da6a0f ebus_dma_request +EXPORT_SYMBOL vmlinux 0xb2e44a6d pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0xb339debb skb_free_datagram +EXPORT_SYMBOL vmlinux 0xb34d2010 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0xb367a44f netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xb3a284da pcibus_to_node +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3a6e6f2 phy_start_aneg +EXPORT_SYMBOL vmlinux 0xb3baf548 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb4079917 of_console_device +EXPORT_SYMBOL vmlinux 0xb40e0d5b inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xb417d6cd phy_start +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb435bd66 mdesc_next_arc +EXPORT_SYMBOL vmlinux 0xb450b873 inet_frags_init +EXPORT_SYMBOL vmlinux 0xb46d2008 input_unregister_handle +EXPORT_SYMBOL vmlinux 0xb4797775 pci_find_bus +EXPORT_SYMBOL vmlinux 0xb4f7a8ec elv_rb_del +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb5208f3b mdiobus_scan +EXPORT_SYMBOL vmlinux 0xb529407e drm_core_get_reg_ofs +EXPORT_SYMBOL vmlinux 0xb53fc702 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb5469e7a stop_tty +EXPORT_SYMBOL vmlinux 0xb5496d5f zero_fill_bio +EXPORT_SYMBOL vmlinux 0xb55d21a7 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0xb560cadf bh_submit_read +EXPORT_SYMBOL vmlinux 0xb56c45af skb_checksum_help +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5a4d890 generic_read_dir +EXPORT_SYMBOL vmlinux 0xb5e5ba6a inode_needs_sync +EXPORT_SYMBOL vmlinux 0xb5ed8a2e do_splice_to +EXPORT_SYMBOL vmlinux 0xb5f305df xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xb607e324 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0xb627de80 of_find_node_with_property +EXPORT_SYMBOL vmlinux 0xb64688b8 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xb654c0ef mdiobus_read +EXPORT_SYMBOL vmlinux 0xb6661d10 bd_set_size +EXPORT_SYMBOL vmlinux 0xb6693035 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0xb66ac653 dma_pool_create +EXPORT_SYMBOL vmlinux 0xb66da76b tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xb673f75c drm_poll +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb68082bf kernel_sendmsg +EXPORT_SYMBOL vmlinux 0xb685339d seq_lseek +EXPORT_SYMBOL vmlinux 0xb68fd831 finish_wait +EXPORT_SYMBOL vmlinux 0xb692edfa mempool_free +EXPORT_SYMBOL vmlinux 0xb692f439 vio_unregister_driver +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb75dcfee _read_lock_irq +EXPORT_SYMBOL vmlinux 0xb77c0d32 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7b94ae3 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7e60318 bio_phys_segments +EXPORT_SYMBOL vmlinux 0xb7ec5176 submit_bh +EXPORT_SYMBOL vmlinux 0xb8007c3c clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0xb80880be bio_map_user +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb8486f37 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0xb8504404 vfs_read +EXPORT_SYMBOL vmlinux 0xb8693da5 jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb86fcd17 skb_pad +EXPORT_SYMBOL vmlinux 0xb87e8676 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8a218b4 flush_dcache_page +EXPORT_SYMBOL vmlinux 0xb8a6ed1e __devm_request_region +EXPORT_SYMBOL vmlinux 0xb8b414e9 pci_set_power_state +EXPORT_SYMBOL vmlinux 0xb8d04531 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0xb8da0bb4 blkdev_put +EXPORT_SYMBOL vmlinux 0xb8daa4be compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xb90442b3 napi_gro_frags +EXPORT_SYMBOL vmlinux 0xb90784c3 put_page +EXPORT_SYMBOL vmlinux 0xb909159c sockfd_lookup +EXPORT_SYMBOL vmlinux 0xb9249d16 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xb94867cb pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb99788ee __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0xb99984e1 skb_recycle_check +EXPORT_SYMBOL vmlinux 0xb99ec7a2 security_path_link +EXPORT_SYMBOL vmlinux 0xb9b20bb4 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xb9db23fe mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0xb9fed190 tcf_em_register +EXPORT_SYMBOL vmlinux 0xba31231b mutex_trylock +EXPORT_SYMBOL vmlinux 0xba371494 tty_check_change +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba85d4ca security_task_getsecid +EXPORT_SYMBOL vmlinux 0xba875b39 cfb_imageblit +EXPORT_SYMBOL vmlinux 0xba8ce319 drm_addmap +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbabdcbb0 iget5_locked +EXPORT_SYMBOL vmlinux 0xbae6b59f drm_pci_free +EXPORT_SYMBOL vmlinux 0xbaee258c ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb2cc4df drm_rmmap +EXPORT_SYMBOL vmlinux 0xbb33d8ff invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0xbb38ae8f __napi_schedule +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbe3bee3 vfs_mkdir +EXPORT_SYMBOL vmlinux 0xbbeced38 pci_request_regions +EXPORT_SYMBOL vmlinux 0xbc2683d4 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xbc347622 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xbc959c08 generic_make_request +EXPORT_SYMBOL vmlinux 0xbc97d594 napi_gro_receive +EXPORT_SYMBOL vmlinux 0xbcaf6350 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xbcb887be tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xbcbc0061 down_trylock +EXPORT_SYMBOL vmlinux 0xbccf3712 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0xbd100793 cpu_online_mask +EXPORT_SYMBOL vmlinux 0xbd142e22 framebuffer_release +EXPORT_SYMBOL vmlinux 0xbd1a77f8 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0xbd3090f6 vio_ldc_free +EXPORT_SYMBOL vmlinux 0xbd44e9cf of_find_compatible_node +EXPORT_SYMBOL vmlinux 0xbd479c7f rtnl_unicast +EXPORT_SYMBOL vmlinux 0xbd6ab819 d_alloc +EXPORT_SYMBOL vmlinux 0xbd800660 unlock_super +EXPORT_SYMBOL vmlinux 0xbd9271ed pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0xbd99edf0 __register_binfmt +EXPORT_SYMBOL vmlinux 0xbd9b7825 blk_fetch_request +EXPORT_SYMBOL vmlinux 0xbdbda045 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0xbdc6d054 __neigh_event_send +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe122842 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xbe269c87 i2c_master_send +EXPORT_SYMBOL vmlinux 0xbe63357d pci_scan_slot +EXPORT_SYMBOL vmlinux 0xbe7ad17f jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xbe7f7d54 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xbead4454 devm_ioremap +EXPORT_SYMBOL vmlinux 0xbeaf68ea __page_symlink +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf0dcc9d ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0xbf322111 init_net +EXPORT_SYMBOL vmlinux 0xbf549ce6 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf837c10 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xbf8ebdf3 neigh_for_each +EXPORT_SYMBOL vmlinux 0xbf993764 __memscan_zero +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfb2ad58 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0xbfc21dde pci_domain_nr +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbff44bf0 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xbff7f2aa journal_load +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc017fba6 audit_log_end +EXPORT_SYMBOL vmlinux 0xc04ec53f pci_add_new_bus +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc06329e8 sk_common_release +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc09ca072 ldc_map_single +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0acc2f4 con_is_bound +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0ff4c01 __dst_free +EXPORT_SYMBOL vmlinux 0xc100dbdc blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xc1406a2a prepare_creds +EXPORT_SYMBOL vmlinux 0xc14b66f6 ida_get_new_above +EXPORT_SYMBOL vmlinux 0xc15e073c generic_find_next_zero_le_bit +EXPORT_SYMBOL vmlinux 0xc166e0cf elv_rb_add +EXPORT_SYMBOL vmlinux 0xc16c9fae create_proc_entry +EXPORT_SYMBOL vmlinux 0xc188c822 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xc1a24339 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0xc1b1b00d mntput_no_expire +EXPORT_SYMBOL vmlinux 0xc1b73dff misc_register +EXPORT_SYMBOL vmlinux 0xc1dd0038 vio_ldc_alloc +EXPORT_SYMBOL vmlinux 0xc1ee17ca test_and_change_bit +EXPORT_SYMBOL vmlinux 0xc216fe7b i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xc2446c7c set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xc24d5dcc ll_rw_block +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc28b3735 journal_extend +EXPORT_SYMBOL vmlinux 0xc2c49145 generic_file_open +EXPORT_SYMBOL vmlinux 0xc2e26f94 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc309ee57 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0xc328e2da generic_getxattr +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc35d096d ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xc386ee75 usb_gadget_unregister_driver +EXPORT_SYMBOL vmlinux 0xc38c4ca2 PAGE_SHARED +EXPORT_SYMBOL vmlinux 0xc3a029d7 kernel_bind +EXPORT_SYMBOL vmlinux 0xc3b61c7c ebus_dma_irq_enable +EXPORT_SYMBOL vmlinux 0xc3ccd215 d_splice_alias +EXPORT_SYMBOL vmlinux 0xc3cd10e8 complete_request_key +EXPORT_SYMBOL vmlinux 0xc3f137db compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0xc3f78f35 skb_over_panic +EXPORT_SYMBOL vmlinux 0xc42bbd00 blk_run_queue +EXPORT_SYMBOL vmlinux 0xc439686f idr_find +EXPORT_SYMBOL vmlinux 0xc44ec55d blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0xc470f7f0 blkdev_get +EXPORT_SYMBOL vmlinux 0xc47de777 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4a0f9ac init_timer_key +EXPORT_SYMBOL vmlinux 0xc4c3821f path_lookup +EXPORT_SYMBOL vmlinux 0xc4c8dffd page_readlink +EXPORT_SYMBOL vmlinux 0xc4efe609 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0xc51320b3 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0xc52b6f50 drm_mmap +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5406b1c inet_csk_accept +EXPORT_SYMBOL vmlinux 0xc54df387 block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0xc54fd83b mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xc55084a8 pcim_enable_device +EXPORT_SYMBOL vmlinux 0xc567b7ba phy_register_fixup +EXPORT_SYMBOL vmlinux 0xc56af31c journal_wipe +EXPORT_SYMBOL vmlinux 0xc5a5b809 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0xc5b441bb drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL vmlinux 0xc5c9cd9e of_phy_find_device +EXPORT_SYMBOL vmlinux 0xc5dc4368 nonseekable_open +EXPORT_SYMBOL vmlinux 0xc5e469b6 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xc5ee8097 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0xc604c87b pci_get_device +EXPORT_SYMBOL vmlinux 0xc61a9a49 current_fs_time +EXPORT_SYMBOL vmlinux 0xc6327b65 sun4v_chip_type +EXPORT_SYMBOL vmlinux 0xc63cf9ca blk_make_request +EXPORT_SYMBOL vmlinux 0xc68b0509 __find_get_block +EXPORT_SYMBOL vmlinux 0xc69c3564 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0xc69d318c drm_helper_hotplug_stage_two +EXPORT_SYMBOL vmlinux 0xc6b83219 module_layout +EXPORT_SYMBOL vmlinux 0xc6c3e43f tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0xc6ffdf47 pci_assign_resource +EXPORT_SYMBOL vmlinux 0xc71307f1 drm_vblank_pre_modeset +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc72a7057 put_io_context +EXPORT_SYMBOL vmlinux 0xc73a3ad5 try_to_release_page +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc74512b2 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0xc74fd0ee set_bdi_congested +EXPORT_SYMBOL vmlinux 0xc767a1c9 dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0xc77fe0b0 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0xc7839f76 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xc78d651b key_validate +EXPORT_SYMBOL vmlinux 0xc7a17d5f tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7ad634f tcp_close +EXPORT_SYMBOL vmlinux 0xc7c5dfc6 sock_no_accept +EXPORT_SYMBOL vmlinux 0xc7e036e2 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xc7ec28b0 memcmp +EXPORT_SYMBOL vmlinux 0xc82b4f7c drm_mode_connector_attach_encoder +EXPORT_SYMBOL vmlinux 0xc86239c7 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0xc877f41a simple_statfs +EXPORT_SYMBOL vmlinux 0xc886f097 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xc88b27b4 napi_skb_finish +EXPORT_SYMBOL vmlinux 0xc890290f inode_add_bytes +EXPORT_SYMBOL vmlinux 0xc891f4f2 neigh_event_ns +EXPORT_SYMBOL vmlinux 0xc8a921c1 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xc8ac31e2 drm_vblank_count +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8b96f06 drm_lock_free +EXPORT_SYMBOL vmlinux 0xc8da0b4c page_symlink +EXPORT_SYMBOL vmlinux 0xc8e0c676 nf_log_packet +EXPORT_SYMBOL vmlinux 0xc91b1ddf file_permission +EXPORT_SYMBOL vmlinux 0xc91fb9aa _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0xc94b14ea pci_unmap_sg +EXPORT_SYMBOL vmlinux 0xc968f134 netlink_ack +EXPORT_SYMBOL vmlinux 0xc96b9815 put_disk +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9a6d26b vfs_rename +EXPORT_SYMBOL vmlinux 0xc9e37e15 dev_disable_lro +EXPORT_SYMBOL vmlinux 0xc9e772df pci_pme_capable +EXPORT_SYMBOL vmlinux 0xc9feadf0 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0xca1aa68d filemap_flush +EXPORT_SYMBOL vmlinux 0xca245ec1 inet_stream_ops +EXPORT_SYMBOL vmlinux 0xca388f20 __serio_register_port +EXPORT_SYMBOL vmlinux 0xca4563d1 task_nice +EXPORT_SYMBOL vmlinux 0xca5abc25 drm_mode_detachmode_crtc +EXPORT_SYMBOL vmlinux 0xcabfa2f3 drm_framebuffer_init +EXPORT_SYMBOL vmlinux 0xcac4d7ff _read_lock_bh +EXPORT_SYMBOL vmlinux 0xcae6377b _spin_lock_bh +EXPORT_SYMBOL vmlinux 0xcb0894cd tty_port_close_start +EXPORT_SYMBOL vmlinux 0xcb123d4c tty_free_termios +EXPORT_SYMBOL vmlinux 0xcb2552da fb_validate_mode +EXPORT_SYMBOL vmlinux 0xcb28da37 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xcb2a2df9 journal_clear_err +EXPORT_SYMBOL vmlinux 0xcb57c7fb security_path_rename +EXPORT_SYMBOL vmlinux 0xcb628863 pagevec_lookup +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb6f8437 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb8b9bf3 default_file_splice_read +EXPORT_SYMBOL vmlinux 0xcb99da0f iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0xcba898ae irq_of_parse_and_map +EXPORT_SYMBOL vmlinux 0xcbb3b986 simple_unlink +EXPORT_SYMBOL vmlinux 0xcbb9d7db groups_free +EXPORT_SYMBOL vmlinux 0xcbf4969f revert_creds +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc5fe975 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xcc62ef44 unregister_netdevice +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcca572ab tty_std_termios +EXPORT_SYMBOL vmlinux 0xccb59ecc drm_ati_pcigart_cleanup +EXPORT_SYMBOL vmlinux 0xccc55a7d qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0xcce54d43 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xccf5aa85 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xcd1159b8 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0xcd3e6218 skb_queue_tail +EXPORT_SYMBOL vmlinux 0xcd6b070a bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xcd7258ac security_inode_init_security +EXPORT_SYMBOL vmlinux 0xcd737520 drm_mm_put_block +EXPORT_SYMBOL vmlinux 0xcd81b309 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xcd85cb6c tcf_exts_change +EXPORT_SYMBOL vmlinux 0xcda5b3eb set_groups +EXPORT_SYMBOL vmlinux 0xcdbe5186 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0xce005e5d unregister_binfmt +EXPORT_SYMBOL vmlinux 0xce006237 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0xce00e5ab tcf_hash_search +EXPORT_SYMBOL vmlinux 0xce358f8e call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce699e7e tty_port_hangup +EXPORT_SYMBOL vmlinux 0xce9fbeaf udp_disconnect +EXPORT_SYMBOL vmlinux 0xcec39b7f tcp_make_synack +EXPORT_SYMBOL vmlinux 0xcecbaf9e get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0xcf0d3330 serio_unregister_port +EXPORT_SYMBOL vmlinux 0xcf19447d kmem_cache_create +EXPORT_SYMBOL vmlinux 0xcf3cc11d vfs_path_lookup +EXPORT_SYMBOL vmlinux 0xcf4214f3 input_set_capability +EXPORT_SYMBOL vmlinux 0xcf66bcb3 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xcf98f422 vmap +EXPORT_SYMBOL vmlinux 0xcfbf0173 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xcfc45f74 fail_migrate_page +EXPORT_SYMBOL vmlinux 0xcfd4b075 security_path_mkdir +EXPORT_SYMBOL vmlinux 0xcfe13710 sparc64_get_clock_tick +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd02a7ddb skb_unlink +EXPORT_SYMBOL vmlinux 0xd04dd91c fsync_bdev +EXPORT_SYMBOL vmlinux 0xd0502aef shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0xd051254c invalidate_inodes +EXPORT_SYMBOL vmlinux 0xd0979c53 qdisc_list_del +EXPORT_SYMBOL vmlinux 0xd099b150 sock_wake_async +EXPORT_SYMBOL vmlinux 0xd0af4559 __page_cache_alloc +EXPORT_SYMBOL vmlinux 0xd0b3ca66 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0xd0bd2786 input_grab_device +EXPORT_SYMBOL vmlinux 0xd0be1a2e __memset +EXPORT_SYMBOL vmlinux 0xd0ceef3e tcp_parse_options +EXPORT_SYMBOL vmlinux 0xd0ec3eee panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0f8c9e0 ldc_alloc +EXPORT_SYMBOL vmlinux 0xd11958c7 kobject_get +EXPORT_SYMBOL vmlinux 0xd11dd79c pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xd171ddc0 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0xd1af4a31 drm_clflush_pages +EXPORT_SYMBOL vmlinux 0xd1cd39b8 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xd1d26557 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xd1d3adc0 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0xd1d884f8 pci_dma_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0xd21af7e5 completion_done +EXPORT_SYMBOL vmlinux 0xd21cb4dc filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0xd2441e23 of_dev_get +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd2590723 create_empty_buffers +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd28233f4 unbind_con_driver +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a3da2d mempool_alloc +EXPORT_SYMBOL vmlinux 0xd2aa0292 _read_unlock_bh +EXPORT_SYMBOL vmlinux 0xd2ad3a9b uart_update_timeout +EXPORT_SYMBOL vmlinux 0xd2c31a78 serio_reconnect +EXPORT_SYMBOL vmlinux 0xd2cdc04e kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0xd2f5ca84 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL vmlinux 0xd31611a7 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xd3273a06 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0xd33e2c0b i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0xd33f7c1a kobject_del +EXPORT_SYMBOL vmlinux 0xd35026fc jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xd35cd15a dev_load +EXPORT_SYMBOL vmlinux 0xd361dbc0 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0xd388f8fd simple_empty +EXPORT_SYMBOL vmlinux 0xd3acbbe8 iunique +EXPORT_SYMBOL vmlinux 0xd3aeaf73 netdev_set_master +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd3c23472 drm_mode_connector_update_edid_property +EXPORT_SYMBOL vmlinux 0xd3ec606b nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0xd3f37665 journal_errno +EXPORT_SYMBOL vmlinux 0xd3fd644e of_parse_phandles_with_args +EXPORT_SYMBOL vmlinux 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL vmlinux 0xd431a475 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0xd45c013c redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0xd4759b90 pci_get_slot +EXPORT_SYMBOL vmlinux 0xd47c708d sg_miter_next +EXPORT_SYMBOL vmlinux 0xd47f7428 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xd48f9681 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0xd49f1ef6 test_and_clear_bit +EXPORT_SYMBOL vmlinux 0xd4b3f3cf dquot_commit_info +EXPORT_SYMBOL vmlinux 0xd4cc1dc5 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xd4eb95ee dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0xd50f5426 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0xd512d468 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd529987f sync_inode +EXPORT_SYMBOL vmlinux 0xd53baa02 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xd53dbad5 request_key_async +EXPORT_SYMBOL vmlinux 0xd53ee26a block_invalidatepage +EXPORT_SYMBOL vmlinux 0xd544264d journal_release_buffer +EXPORT_SYMBOL vmlinux 0xd549f1d5 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0xd56ba0a0 sun4v_hvapi_register +EXPORT_SYMBOL vmlinux 0xd575be6c of_get_parent +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd5a223a4 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xd5adeee1 kill_pid +EXPORT_SYMBOL vmlinux 0xd5df37b1 dst_discard +EXPORT_SYMBOL vmlinux 0xd5e3a8a6 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xd5f81bb6 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0xd60648d8 sock_create +EXPORT_SYMBOL vmlinux 0xd6160582 drm_mm_search_free +EXPORT_SYMBOL vmlinux 0xd626ab4e xfrm_lookup +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd637bdd4 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL vmlinux 0xd662f725 do_sync_read +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b48fb4 vfs_readdir +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6d9fc09 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6f0f559 idprom +EXPORT_SYMBOL vmlinux 0xd6f377d7 inode_set_bytes +EXPORT_SYMBOL vmlinux 0xd6f4281a xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xd6f5d522 unregister_quota_format +EXPORT_SYMBOL vmlinux 0xd73df1df bio_integrity_trim +EXPORT_SYMBOL vmlinux 0xd7459983 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0xd76011f2 destroy_EII_client +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7c51614 trap_block +EXPORT_SYMBOL vmlinux 0xd8052a0d journal_destroy +EXPORT_SYMBOL vmlinux 0xd818b276 proto_unregister +EXPORT_SYMBOL vmlinux 0xd829fb44 end_page_writeback +EXPORT_SYMBOL vmlinux 0xd832c9e5 rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0xd8351990 __invalidate_device +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8471ba9 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xd85fcad7 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0xd8959f23 auxio_set_led +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8ed09d4 kernel_getsockname +EXPORT_SYMBOL vmlinux 0xd9207695 tty_vhangup +EXPORT_SYMBOL vmlinux 0xd9221c1e drm_sysfs_connector_remove +EXPORT_SYMBOL vmlinux 0xd93c5d16 mnt_pin +EXPORT_SYMBOL vmlinux 0xd94c2d24 module_refcount +EXPORT_SYMBOL vmlinux 0xd95f901a gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0xd97ec7ab input_free_device +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd98de4b5 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xd9adcfe0 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xd9b00d30 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0xd9c97c95 keyring_search +EXPORT_SYMBOL vmlinux 0xd9de717d copy_io_context +EXPORT_SYMBOL vmlinux 0xd9e4ce73 abort_creds +EXPORT_SYMBOL vmlinux 0xd9f8e319 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda3d2c3c prom_feval +EXPORT_SYMBOL vmlinux 0xda3ec0bc mapping_tagged +EXPORT_SYMBOL vmlinux 0xda427c08 sock_no_listen +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda500239 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xda6e8216 simple_rmdir +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda9c10f6 journal_revoke +EXPORT_SYMBOL vmlinux 0xda9ed809 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0xdaab52e3 follow_down +EXPORT_SYMBOL vmlinux 0xdb162ba0 flush_signals +EXPORT_SYMBOL vmlinux 0xdb47ae90 uart_add_one_port +EXPORT_SYMBOL vmlinux 0xdb578fd2 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xdb796d2f xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xdb7f4dfe nobh_writepage +EXPORT_SYMBOL vmlinux 0xdba9c9b2 inet_bind +EXPORT_SYMBOL vmlinux 0xdbc5d9ef __free_pages +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbd5daa6 proc_dointvec +EXPORT_SYMBOL vmlinux 0xdbdb1d63 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0xdbe00e51 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc1341b1 mdesc_arc_target +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc1e61eb tcf_exts_validate +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc2f3797 bioset_create +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc6216c3 i2c_clients_command +EXPORT_SYMBOL vmlinux 0xdc7b7e58 drm_mode_probed_add +EXPORT_SYMBOL vmlinux 0xdc80ed59 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xdc8df6ae mutex_unlock +EXPORT_SYMBOL vmlinux 0xdc95d7f6 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0xdca6898c block_write_end +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcb5671d strlen +EXPORT_SYMBOL vmlinux 0xdcc03ee7 inet_getname +EXPORT_SYMBOL vmlinux 0xdcc2c9da simple_pin_fs +EXPORT_SYMBOL vmlinux 0xdd1197c8 xor_vis_3 +EXPORT_SYMBOL vmlinux 0xdd1d55d3 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL vmlinux 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL vmlinux 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL vmlinux 0xdda9de43 __devm_release_region +EXPORT_SYMBOL vmlinux 0xddb407bd register_sysctl_table +EXPORT_SYMBOL vmlinux 0xde063e15 pcim_pin_device +EXPORT_SYMBOL vmlinux 0xde1b4dd3 dqput +EXPORT_SYMBOL vmlinux 0xde42fb86 key_revoke +EXPORT_SYMBOL vmlinux 0xde5528f4 drm_rmmap_locked +EXPORT_SYMBOL vmlinux 0xde589e60 xor_vis_2 +EXPORT_SYMBOL vmlinux 0xde7502a8 PAGE_KERNEL +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde821bb1 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdea5ac43 vm_insert_page +EXPORT_SYMBOL vmlinux 0xdee19e69 deny_write_access +EXPORT_SYMBOL vmlinux 0xdeec38cf bio_put +EXPORT_SYMBOL vmlinux 0xdef7ff53 kern_path +EXPORT_SYMBOL vmlinux 0xdf083b02 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xdf1d963d tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0xdf2d2681 simple_fsync +EXPORT_SYMBOL vmlinux 0xdf3cc93e pipe_lock +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf6b99fe inet_ioctl +EXPORT_SYMBOL vmlinux 0xdf7e4b81 bio_free +EXPORT_SYMBOL vmlinux 0xdf8fef53 prom_getproplen +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdf96e622 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0xdf9f9c66 d_rehash +EXPORT_SYMBOL vmlinux 0xdfb7c842 node_states +EXPORT_SYMBOL vmlinux 0xdfdcb609 vmtruncate +EXPORT_SYMBOL vmlinux 0xdfeff14d dq_data_lock +EXPORT_SYMBOL vmlinux 0xdff316f0 journal_get_create_access +EXPORT_SYMBOL vmlinux 0xe030bec6 drm_connector_cleanup +EXPORT_SYMBOL vmlinux 0xe042c57d _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xe06e4199 cpu_all_bits +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0809bdc interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xe088901c pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xe08ce637 tty_port_close +EXPORT_SYMBOL vmlinux 0xe09810e4 compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0b73dc8 udp_table +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c7c02e tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xe0d7eca7 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xe0dcb911 smp_call_function_many +EXPORT_SYMBOL vmlinux 0xe0fc0d9c request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0xe105072b blk_rq_init +EXPORT_SYMBOL vmlinux 0xe10a3894 of_mdiobus_register +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL vmlinux 0xe151aeea tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe17ba54e ilookup +EXPORT_SYMBOL vmlinux 0xe17c110d key_alloc +EXPORT_SYMBOL vmlinux 0xe180b587 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xe1efef34 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0xe20b24ea drm_gem_object_lookup +EXPORT_SYMBOL vmlinux 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe244caa1 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe260c0d3 vio_link_state_change +EXPORT_SYMBOL vmlinux 0xe278bb57 vio_send_sid +EXPORT_SYMBOL vmlinux 0xe290a25f atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xe2938940 vfs_quota_off +EXPORT_SYMBOL vmlinux 0xe29d7e4c f_setown +EXPORT_SYMBOL vmlinux 0xe2a62cdf block_write_full_page +EXPORT_SYMBOL vmlinux 0xe2a76311 ldc_connect +EXPORT_SYMBOL vmlinux 0xe2b92587 alloc_disk +EXPORT_SYMBOL vmlinux 0xe2c4668d pci_match_id +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2dde111 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xe3369931 ip_fragment +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe39f1b92 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0xe3a974ca i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3e12008 __first_cpu +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe40ccb83 alloc_fcdev +EXPORT_SYMBOL vmlinux 0xe45267ec proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xe469b21b bdev_read_only +EXPORT_SYMBOL vmlinux 0xe47f6fe7 free_buffer_head +EXPORT_SYMBOL vmlinux 0xe4dce573 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe50b3248 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe533da20 d_move +EXPORT_SYMBOL vmlinux 0xe53a404c vio_ldc_send +EXPORT_SYMBOL vmlinux 0xe54518fc jbd2_journal_load +EXPORT_SYMBOL vmlinux 0xe5619957 bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xe5766f9f find_inode_number +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5962e47 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0xe5bc5401 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5d44cda remove_inode_hash +EXPORT_SYMBOL vmlinux 0xe5e08285 down_write_trylock +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe60ed8f6 per_cpu____cpu_data +EXPORT_SYMBOL vmlinux 0xe620bf18 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xe6292ca7 dcache_dir_close +EXPORT_SYMBOL vmlinux 0xe62985a1 get_fs_type +EXPORT_SYMBOL vmlinux 0xe655129b skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xe65eba43 ip_route_output_key +EXPORT_SYMBOL vmlinux 0xe6622586 blk_peek_request +EXPORT_SYMBOL vmlinux 0xe6656080 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xe67dbb40 security_path_rmdir +EXPORT_SYMBOL vmlinux 0xe683b0c7 drm_add_edid_modes +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe7169c7a ldc_state +EXPORT_SYMBOL vmlinux 0xe73bbb2a cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xe7537e3e tcp_prot +EXPORT_SYMBOL vmlinux 0xe782899e prom_searchsiblings +EXPORT_SYMBOL vmlinux 0xe7895f24 __kfifo_put +EXPORT_SYMBOL vmlinux 0xe796a067 posix_lock_file +EXPORT_SYMBOL vmlinux 0xe7a0c7d2 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe8116e08 __kmalloc_node +EXPORT_SYMBOL vmlinux 0xe8323e16 ip_ct_attach +EXPORT_SYMBOL vmlinux 0xe84d6a0b drm_get_drawable_info +EXPORT_SYMBOL vmlinux 0xe867fc69 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0xe88bdc28 __down_write_trylock +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8d1906b bio_sector_offset +EXPORT_SYMBOL vmlinux 0xe8d3fc00 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xe8d85657 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xe8dbafef __next_cpu +EXPORT_SYMBOL vmlinux 0xe8dfcdf9 __csum_partial_copy_to_user +EXPORT_SYMBOL vmlinux 0xe8e25ca4 of_getintprop_default +EXPORT_SYMBOL vmlinux 0xe8f3d6c8 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0xe90dc970 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe9147b57 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL vmlinux 0xe9218b35 find_or_create_page +EXPORT_SYMBOL vmlinux 0xe92c0c35 lock_super +EXPORT_SYMBOL vmlinux 0xe985dec1 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xe9a17673 of_n_size_cells +EXPORT_SYMBOL vmlinux 0xe9b2b7da pci_release_region +EXPORT_SYMBOL vmlinux 0xe9c0a62d drm_get_resource_len +EXPORT_SYMBOL vmlinux 0xe9ecd627 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0xe9f62c59 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea5b4891 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea93ea1d sock_release +EXPORT_SYMBOL vmlinux 0xeaa2320b skb_seq_read +EXPORT_SYMBOL vmlinux 0xeab72c52 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0xeac5a1b1 sock_map_fd +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeaec984a blk_start_request +EXPORT_SYMBOL vmlinux 0xeb077276 drm_pci_alloc +EXPORT_SYMBOL vmlinux 0xeb1dcf27 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xeb2cdac1 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xeb3e6fb7 vfs_write +EXPORT_SYMBOL vmlinux 0xeb3ef8bc __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xeb5b3bc6 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0xeb6d33b1 journal_flush +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8efae9 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb9da054 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xeba9972a __secpath_destroy +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebc0ea10 arp_send +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebfab748 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xec010d45 generic_block_bmap +EXPORT_SYMBOL vmlinux 0xec05ad32 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0xec438ef7 vfs_quota_on +EXPORT_SYMBOL vmlinux 0xec525e79 I_BDEV +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec7b2063 ldc_copy +EXPORT_SYMBOL vmlinux 0xec81132e dquot_alloc_space +EXPORT_SYMBOL vmlinux 0xec9a5938 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xecb7ee5a pci_dev_driver +EXPORT_SYMBOL vmlinux 0xecdf99e9 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0xed51bb62 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0xed564b83 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0xed615b03 down_interruptible +EXPORT_SYMBOL vmlinux 0xed8101a9 journal_init_dev +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedcb4ef9 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee3bd349 blk_insert_request +EXPORT_SYMBOL vmlinux 0xee4dffd5 input_register_handle +EXPORT_SYMBOL vmlinux 0xee91188b generic_writepages +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeb2948a get_empty_filp +EXPORT_SYMBOL vmlinux 0xeec4bb80 pci_find_device +EXPORT_SYMBOL vmlinux 0xeeff9b20 tcf_hash_check +EXPORT_SYMBOL vmlinux 0xef335d40 mdesc_grab +EXPORT_SYMBOL vmlinux 0xef537977 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xef625d96 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef897412 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xef9cf0f3 read_cache_page +EXPORT_SYMBOL vmlinux 0xefa0c5f3 kernel_sendpage +EXPORT_SYMBOL vmlinux 0xefad74a6 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0xefb480d8 compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0xefca7e10 pci_map_single +EXPORT_SYMBOL vmlinux 0xefd13f85 drm_release +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefde08e7 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf019d9c5 block_sync_page +EXPORT_SYMBOL vmlinux 0xf04a0ad2 neigh_table_init +EXPORT_SYMBOL vmlinux 0xf04f6da0 sbusfb_compat_ioctl +EXPORT_SYMBOL vmlinux 0xf0798ce1 of_ioremap +EXPORT_SYMBOL vmlinux 0xf0dbc2f9 uart_match_port +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf112b64a loop_register_transfer +EXPORT_SYMBOL vmlinux 0xf121d546 netlink_dump_start +EXPORT_SYMBOL vmlinux 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL vmlinux 0xf1698088 pcim_iomap +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1c3b00e copy_in_user_fixup +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1de44ba eth_header_cache +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf218286f mpage_writepage +EXPORT_SYMBOL vmlinux 0xf21fab88 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0xf234a321 inet_frag_find +EXPORT_SYMBOL vmlinux 0xf23a90b4 skb_split +EXPORT_SYMBOL vmlinux 0xf245d096 fasync_helper +EXPORT_SYMBOL vmlinux 0xf2639abd textsearch_unregister +EXPORT_SYMBOL vmlinux 0xf282cabe genl_unregister_ops +EXPORT_SYMBOL vmlinux 0xf28ce679 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xf298f1de skb_store_bits +EXPORT_SYMBOL vmlinux 0xf29f32ec sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0xf2cf192c dev_mc_sync +EXPORT_SYMBOL vmlinux 0xf2f4ca25 vio_register_driver +EXPORT_SYMBOL vmlinux 0xf3053b9e iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf31e8121 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf38d42a3 arp_find +EXPORT_SYMBOL vmlinux 0xf395e9cc i2c_master_recv +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf3b61815 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3c68778 eth_type_trans +EXPORT_SYMBOL vmlinux 0xf3e400f7 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xf3f79574 fddi_type_trans +EXPORT_SYMBOL vmlinux 0xf400c442 dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0xf40e9a5c journal_check_available_features +EXPORT_SYMBOL vmlinux 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL vmlinux 0xf42c1faf vm_map_ram +EXPORT_SYMBOL vmlinux 0xf442d519 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xf47f4ef7 unmap_mapping_range +EXPORT_SYMBOL vmlinux 0xf495e852 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0xf4bba188 fb_find_mode +EXPORT_SYMBOL vmlinux 0xf4c81089 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf4f54103 thaw_process +EXPORT_SYMBOL vmlinux 0xf4fd8a8e locks_remove_posix +EXPORT_SYMBOL vmlinux 0xf4fe89f0 dquot_transfer +EXPORT_SYMBOL vmlinux 0xf504420f dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf53eb7e9 mb_cache_create +EXPORT_SYMBOL vmlinux 0xf56ed729 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0xf58f32ae __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xf5c6a657 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5cce4b1 generic_write_checks +EXPORT_SYMBOL vmlinux 0xf5de6e5c con_copy_unimap +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf60efa23 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0xf61145db phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xf632f5e6 of_iounmap +EXPORT_SYMBOL vmlinux 0xf6365b47 do_truncate +EXPORT_SYMBOL vmlinux 0xf6aa5e9a phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xf6aeeb15 suncore_mouse_baud_cflag_next +EXPORT_SYMBOL vmlinux 0xf6bb3cdc blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6c5bb98 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xf6ccaa73 dst_release +EXPORT_SYMBOL vmlinux 0xf6cf374d init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0xf6d02024 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6f824a5 default_llseek +EXPORT_SYMBOL vmlinux 0xf6fb310e eth_mac_addr +EXPORT_SYMBOL vmlinux 0xf71994d1 try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0xf7506c41 __any_online_cpu +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf760ac6e free_task +EXPORT_SYMBOL vmlinux 0xf761c3ae copy_to_user_fixup +EXPORT_SYMBOL vmlinux 0xf769910f _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0xf78b83d3 __down_read +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7a91ebc mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xf7ba9a5f grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xf7d1378e otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xf7e028e5 neigh_ifdown +EXPORT_SYMBOL vmlinux 0xf7f0f0fc neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xf80c69d2 __strlen_user +EXPORT_SYMBOL vmlinux 0xf80ec1b6 alloc_file +EXPORT_SYMBOL vmlinux 0xf8102350 i2c_del_driver +EXPORT_SYMBOL vmlinux 0xf8147abe of_find_matching_node +EXPORT_SYMBOL vmlinux 0xf8191240 add_wait_queue +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf84b38c3 atomic_add_ret +EXPORT_SYMBOL vmlinux 0xf894a803 ldc_write +EXPORT_SYMBOL vmlinux 0xf8995b40 icmp_send +EXPORT_SYMBOL vmlinux 0xf8e50cf4 dquot_initialize +EXPORT_SYMBOL vmlinux 0xf8f442ce kernel_connect +EXPORT_SYMBOL vmlinux 0xf8f9d928 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xf908cfa7 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xf9296418 register_nls +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf958c926 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xf98afc2e die_if_kernel +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xfa1e70c9 fd_install +EXPORT_SYMBOL vmlinux 0xfa46df28 insert_inode_locked +EXPORT_SYMBOL vmlinux 0xfa66daab pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xfa959227 journal_ack_err +EXPORT_SYMBOL vmlinux 0xfac6ed30 sbusfb_ioctl_helper +EXPORT_SYMBOL vmlinux 0xfad16907 mempool_resize +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb2f47ef generic_readlink +EXPORT_SYMBOL vmlinux 0xfb4dc5bf tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0xfb585c3e bio_clone +EXPORT_SYMBOL vmlinux 0xfb5fc82a __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xfb69276b security_path_symlink +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb7ac6ec blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xfb7b4c7b end_buffer_async_write +EXPORT_SYMBOL vmlinux 0xfba17495 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0xfbb6f914 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbf29cec d_invalidate +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc148e88 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xfc19a4d9 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0xfc2a11a8 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc41c0c2 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0xfc60e581 unregister_nls +EXPORT_SYMBOL vmlinux 0xfc62486c register_framebuffer +EXPORT_SYMBOL vmlinux 0xfc6e942f backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xfc75ba91 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0xfc90c79c pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda0f99 drm_get_dev +EXPORT_SYMBOL vmlinux 0xfcde7250 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xfce04265 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd059d3a create_mnt_ns +EXPORT_SYMBOL vmlinux 0xfd5e31bd udplite_table +EXPORT_SYMBOL vmlinux 0xfd6ff835 input_flush_device +EXPORT_SYMBOL vmlinux 0xfd701704 of_find_node_by_path +EXPORT_SYMBOL vmlinux 0xfd7185bc kill_block_super +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdba8f7c udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0xfdd12889 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xfdf9e837 pci_remove_bus +EXPORT_SYMBOL vmlinux 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfdfd2466 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xfe26fc7c nr_node_ids +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe511fb2 bdi_destroy +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe78010d xor_niagara_4 +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe9e9ad2 ip_defrag +EXPORT_SYMBOL vmlinux 0xfec05366 sun_do_break +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfeea700c ebus_dma_addr +EXPORT_SYMBOL vmlinux 0xfef9447a vfs_getattr +EXPORT_SYMBOL vmlinux 0xfefb65e0 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xfefd2902 register_filesystem +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff420674 drm_mode_set_name +EXPORT_SYMBOL vmlinux 0xff492284 drm_vblank_post_modeset +EXPORT_SYMBOL vmlinux 0xff4c940f splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff69e4c2 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xff6b770e gen_pool_destroy +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff7ba4a8 tty_hangup +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffa3950d phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0xffbc554a __serio_register_driver +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffe92778 drm_sg_alloc +EXPORT_SYMBOL vmlinux 0xffe9ed83 napi_frags_skb +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x915cf479 crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x6be1becf async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x3d308d00 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x7133ad78 async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xa9faa150 async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xbeab9425 async_xor +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xca8fb157 async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/cryptd 0xb5f638fd cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0xc9f74590 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0xf5380b60 cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/twofish_common 0xa4531b9a twofish_setkey +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0067df75 ata_tf_from_fis +EXPORT_SYMBOL_GPL drivers/ata/libata 0x00ebcb5d ata_id_string +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0203e83b ata_host_register +EXPORT_SYMBOL_GPL drivers/ata/libata 0x02dd0e3f ata_port_abort +EXPORT_SYMBOL_GPL drivers/ata/libata 0x03e3686c ata_timing_cycle2mode +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0531dcb8 ata_dev_classify +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0786ea1e ata_sas_scsi_ioctl +EXPORT_SYMBOL_GPL drivers/ata/libata 0x07d3cd0c ata_cable_40wire +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0b205847 ata_sff_host_intr +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0b87e77d ata_port_pbar_desc +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0bec2019 sata_sff_hardreset +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0c7af341 ata_host_start +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0cd99682 ata_sff_postreset +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0e4988c8 ata_bmdma32_port_ops +EXPORT_SYMBOL_GPL drivers/ata/libata 0x0fd78c27 dev_attr_em_message_type +EXPORT_SYMBOL_GPL drivers/ata/libata 0x11880e9a ata_sas_port_start +EXPORT_SYMBOL_GPL drivers/ata/libata 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pcf50633_gpio_invert_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xb66e01a2 pcf50633_gpio_invert_get +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xe2c04dd0 pcf50633_gpio_power_supply_set +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x06a00669 sm501_modify_reg +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x1b2058f9 sm501_find_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x2501aeb2 sm501_unit_power +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x5f70104f sm501_set_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xaf2b9833 sm501_misc_control +EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x577dc01d ucb1400_adc_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1a6d71cb wm8350_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1ac167bf wm8350_device_init +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x20a8c26c wm8350_mask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x33e1dba1 wm8350_block_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x35cefedb wm8350_reg_lock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4121c40b wm8350_unmask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4466fe27 wm8350_reg_unlock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5b37588f wm8350_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x859d2bfc wm8350_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8cc09306 wm8350_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8cd07ccc wm8350_read_auxadc +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb2f2aa16 wm8350_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb784272f wm8350_device_exit +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc10698d7 wm8350_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdd125a78 wm8350_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xfe48a5fb wm8350_gpio_config +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x664dd2fd wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xc6febe60 wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xde0ac5c2 wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xefbeafba wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa7a7bf87 cb710_sg_dwiter_read_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa9d66ced cb710_sg_dwiter_write_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xbeb28737 cb710_pci_update_config_reg +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xd6211b48 cb710_set_irq_handler +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x13137a68 sdio_enable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x187dae41 sdio_disable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x19ce1b41 sdio_writew +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3ba827fc sdio_readl +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x540af409 sdio_claim_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5413085f sdio_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x79aaa3ef sdio_release_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x7b83dad2 sdio_f0_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x8bde2574 sdio_claim_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x938d5059 sdio_readw +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x94705079 sdio_register_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x9d437272 sdio_release_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x9e1f8c57 sdio_memcpy_toio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb16c6011 sdio_memcpy_fromio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb3466547 sdio_readsb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb3ba6116 sdio_writel +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb61db355 sdio_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb700ec01 sdio_unregister_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe68f6139 sdio_set_block_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xea13f9d0 sdio_f0_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xef1a353b sdio_align_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf161ae5b sdio_writesb +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x026d69b7 sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x736e732e sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa3a95ee7 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xd1cfeb7c sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x990ce7a7 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xb0161c04 cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xcf7cf4f2 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x4923e2f5 cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x2fcff1ff cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x52ee73fd cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x8a233bbf cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x99630429 cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xb1058d70 DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xda3c9cc8 DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x8d1a6279 DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x14cf58ef get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x20c4b052 get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x34fa09c3 default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x4337fb34 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x4ed60b74 deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x67482b4a mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x71e3809f kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9d51709e parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9efaca87 get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbccc0163 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc601eef5 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcf7816f1 register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf40875f4 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xfea74bd0 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xff528dc8 put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xff8ab491 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x2c138cc1 register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x4f0c608d deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x93bc1d87 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9522f58f add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x0834336b nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x4c163806 nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x4f2788b4 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xb80de135 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xdc2093d7 nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x3c75d740 onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xb142a6a8 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x17c0ba73 ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x223b5507 ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x356e89e7 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5698ce7e ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x56a0eb44 ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5c1f3651 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5cc7ad99 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x66d626d5 ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x89ffce28 ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9005efbe ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9c751ad5 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa1ec28e7 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1c3c180a open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2784b30a free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x397d723a can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x51198e84 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7cd9f98a can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x851415a2 close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x898a76ca register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8a01903b alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa2e236bf can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x4a06a99f alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x509095cf free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x6f42e5fe unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xe4ff108d register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x05a1517c mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f847d8f mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x143c62f7 mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x149e390b mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c060189 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x261044a6 mlx4_fmr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x265686da mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x30535d32 mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x37309bc3 mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3fc9c086 __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e1a7a88 mlx4_srq_arm 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drivers/net/mlx4/mlx4_core 0x90e3494f mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x952a8bfd mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9a813d19 mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9ba4f038 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa01a82be mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa12cec13 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xab0928f8 mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xad2ba5d7 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaddb3e36 mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb28e9010 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb773a102 mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc129ea64 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc367c590 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca79d0e8 mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcca2fe65 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd3f65b96 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd4abe28f mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd8261ec7 mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd986689b mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe43f16d9 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe4ad2899 mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe6b402b4 mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeb7b86a2 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf100462c mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf3813077 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf62589e5 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf9778e95 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfcee389c mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xff08779a mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x5cd5f84d usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x642f1d67 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x0be39148 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2ce5e2ac rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x55de9503 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc1899f6c rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe0ce5b57 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe39534b0 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0309122f usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x16d46dd2 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x189f2619 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2725db3a usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x312746eb usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3f7d95d6 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x51618411 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5d6157e6 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6595d3f6 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6996502f usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x889937af usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x96ec8a00 usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9c81e40f usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa67f96f3 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb2860364 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbac71ad7 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc12dccf2 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcadd08bd usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdb7840e9 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe1adc635 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xecc8ed1c usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x00cb5f48 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x09b937eb i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x255eb5f8 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2ec2c872 i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x333be63b i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x374e2ac3 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4e6ad6f3 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5104722e i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6c3c0419 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6f06061c i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xba058fb0 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xce5b4c43 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf458ba3a i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x37ba17a1 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0d6c05b8 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x138a9ce0 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1818fa08 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x259377c1 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x289ecb08 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x476acb38 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5d56d295 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6572814a lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x78621674 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x80e6ea4a lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x89dcc36b lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8df582b0 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xafa8b20d lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe9e1785f lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf8d7c675 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x36cc4dc7 lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6bf7fd48 lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8ab8daa5 lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9ced665c lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9dd5c6da lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa4e10ad6 lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc77cb5b3 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcc955ab2 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x185aeea0 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x5af318af if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x04e6ec08 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x07101f9a p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1b8b3311 p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3596f108 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x998c037a p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd5d0d527 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd629b9dc p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xfb4f4f52 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x01e4175f rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x12adc9ee rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1528c7f2 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1c834d00 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x31cc641d rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x39ab87be rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x436e7a44 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4530295b rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4dc2efff rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x592f7d74 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x696c4bf1 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x84640bce rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8c0b481d rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8e402dbb rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaf14b1ef rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbce866e1 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc1d75f51 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcc17ecb9 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xdbe5e315 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xea60cd17 rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x201efa4c rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x34090b54 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x55159faf rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x67b76c81 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x78b8448e rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa1729372 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa2673af9 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1f5d2de7 rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2b7854ed rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3255fec9 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x37d787aa rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x42f96343 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5b8f63d1 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x86b0899f rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8b4d4e08 rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8f9c85cc rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x935fe1a3 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa802fe5c rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa80888eb rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe996af41 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xecd8418a rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x3bc0111b pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd0e81cef pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x07e58dfb wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x47a99814 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa2bd0049 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc08a2365 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xe92ad696 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xeb2f3a71 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xeba61426 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x145190ff scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x39191763 scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x6870ded9 scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x8c3a50be scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xe3781d71 scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x9949297c fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x00c1ee25 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x06af533c iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x159c35bb __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x28977b86 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2bf49b0c iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2bfc0a9a iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3147f3b8 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x336f5cf6 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x38e5d9de iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x47e40e9d iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4de0107c iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x50a93ed5 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x52086aa7 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x54b547eb iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6d44ce46 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x735bc3d8 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x74d1b738 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x761bae10 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x86dbca4d iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x88103121 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x930b77d2 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9b135f01 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9b70e698 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa1e3ee29 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa8b76581 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaa3fcbf7 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac072db0 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb33f667e iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5b0c848 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb80a021f iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xba6d33d4 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbde3d2d5 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd216e7ba iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd858788c iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe01d7e4d iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xea85129c iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xec25915f iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfab235e0 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfccf6183 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfd9923b9 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0e04e593 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x10444f8a iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1320af76 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x14ee4eb7 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x226151d3 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5efe130b iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x72ab3c0a iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7397ff32 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x771d9ad8 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9399c828 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9a383ebb iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa34cdc29 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa8600619 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbe601030 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xeb0a581f iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfc4d6483 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x012a3c90 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1c0d5de3 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4148aa3b sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x52804bbb sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x538abc4c sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x548b7ceb sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5593deba sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x55b015c9 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5742dc7a sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5bad435a __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6113f68d sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x669a9e3c sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6ad57755 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x72117572 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x95f7c44f sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9a0b0b70 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9b909dc4 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9eb90f2f sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xad4b9bda sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb7f5f368 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe482948d sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf5fc4374 sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfef90635 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0bcbfa09 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x152b048f srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x328aa4ad srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6d32f162 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc83874db srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe6a306d9 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x19a7ca60 __scsi_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x1f95232a scsi_mode_select +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4 scsi_eh_get_sense +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x2859a072 scsi_nl_add_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x32e97db3 scsi_get_vpd_page +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a sdev_evt_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x4f939297 scsi_flush_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x599581be sdev_evt_send +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x5e68ef51 scsi_nl_sock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8 scsi_complete_async_scans +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7f2d2bba scsi_target_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x806b9318 scsi_internal_device_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xaadb81ec scsi_internal_device_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27 scsi_nl_remove_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc09f0352 scsi_nl_add_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f scsi_nl_remove_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc60533fd scsi_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xced8f511 scsi_target_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd4155aa7 scsi_eh_ready_devs +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xf1176c5c sdev_evt_send_simple +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xf9ab4c2e scsi_bus_type +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xfa83b17f scsi_schedule_eh +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2f39c69d scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x47e95920 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5412332e scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5e342e27 scsi_host_put_command +EXPORT_SYMBOL_GPL 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drivers/uwb/umc 0x999e3b20 umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb0dc9549 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb65b3ce5 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xcb19b2a9 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x00726ac2 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x05278be0 uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x089a2bf1 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0e6fc066 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1265ab20 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x172814c7 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x264253ab uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2cbdd0ef uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2fc71e38 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x365918d0 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3c240009 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3c89c968 uwb_pal_init +EXPORT_SYMBOL_GPL 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drivers/uwb/uwb 0xb3cebbf0 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb7b8361d uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbd0e8880 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc126a96d uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xca2708b0 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcade177f uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcf090572 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd0339065 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd31caa7e uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd570539e uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd5d334af uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xedb4ccd2 uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfe5ee6fb uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xcb5b8cfa whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0730c712 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1049a9a9 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1226bde9 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1417668c wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1b957433 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2d237ec1 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x32305463 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x32b1dd6c wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x34bbf24f wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x37c18b61 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3d5eba0b wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4220db66 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x56cf3d32 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x65e135b4 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x69c0058f wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6b9b9ee5 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6ee9221a wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x72c997a8 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x738497aa wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x75d65d77 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7b4b2138 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7bfea4fc wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x83f7bb72 wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8a61c201 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8ab7b82e wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8b6e35ce wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xadc87838 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb82a27d3 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcd7131c5 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd575ee0e wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe6b7ccf3 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfc48f56b wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbbcd1df7 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xce41f0a7 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xd3e6f150 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xd774fd40 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xebed00a1 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xaabb82c9 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xd1169a71 fb_sys_read +EXPORT_SYMBOL_GPL drivers/w1/wire 0x09301283 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x0aba58f5 w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x28ac2f2a w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x61204277 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x8e68d980 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9b7d4bd7 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd798c82 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbf08e874 w1_read_8 +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x3a889477 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x7581409b dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x796ca455 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x668e75c2 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xfb7fce29 exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x00c3aeb0 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x0914795b fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x39eeac53 fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x3c3ad0f4 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x567ee4bb fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x59e8b9b8 fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0x70e7c18c fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x78a13e1f fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0x87bde6f1 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0x9efcef24 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xa1d3f93c fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xb583801c fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xc4c109f6 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xc993df1a fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0xd93e8c1b fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xefc2f205 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xf5f9d9cb fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xf714aa86 fat_attach +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0be13472 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x2288ab9a nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x40b8ac34 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x42bd25e9 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe457035b nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x1f94e1ac nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x9ad67ed2 nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0a09c3b8 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x3bdaa562 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x503e6334 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726 o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x638959d4 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7717c4b3 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x88d34ef0 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x8da3eafd o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x02fbf485 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x50ac3817 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x8d553f2d dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa0ec20ef dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xc7d40f5b dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xf53c6200 dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x68bdec94 ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x799aa34a ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc13f5b28 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca lzo1x_decompress_safe +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x3fcfd23b garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x538162e1 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x7aa5626f garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0x90ecd405 garp_request_join +EXPORT_SYMBOL_GPL net/802/garp 0xb7927274 garp_unregister_application +EXPORT_SYMBOL_GPL net/802/garp 0xddabd8d8 garp_request_leave +EXPORT_SYMBOL_GPL net/802/stp 0x4734b6c6 stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 0xede68f46 stp_proto_register +EXPORT_SYMBOL_GPL net/dccp/dccp 0x00e9fa24 dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0x03dd9191 dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x198bb1c6 dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1b9dcbd7 dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x206a7e79 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x23fba7c6 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0x26ff9f85 dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0x2e1eaa57 dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3df1f195 compat_dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3e1ffdb6 dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x41adcedf dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4b719615 inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x55d35615 dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0x55eca0d0 dccp_sendmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a70fa10 dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0x795c1c8c dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7fee1f66 dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x89fa921c dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8ac522d8 dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8afcb6e7 dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8dd0418a dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x90b9d53b dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9c834ab4 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9cc6f80a dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa970c219 compat_dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb674c2b8 dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbac09975 dccp_create_openreq_child +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc8016a08 dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0xca6cf677 dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp 0xceb6eff3 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd2bafe57 dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd53d6caf dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd88c6465 dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe2dd3453 dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe402e9e8 dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0xea603a29 dccp_send_sync +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x1935b162 dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3bbd3b65 dccp_v4_request_recv_sock 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nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe13e92ca nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf2f53fa3 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf38f866f nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x0bdba02a tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x158efc19 tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc5de1556 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xe5bdcd48 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xec6b0258 tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1 net_ipv6_ctl_path +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x124db604 ip6_local_out +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x31fa586d inet6_csk_bind_conflict +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x3572c180 inet6_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x3701a947 fl6_sock_lookup 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xdr_write_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c9de26f rpc_run_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9cd1b499 rpcauth_unregister +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d2ff025 svc_create_pooled +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f0ea3d5 xdr_init_decode +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa149156d cache_unregister +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2ec1a57 svc_set_num_threads +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa4c7e41e rpcb_getport_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa533c599 rpc_wake_up +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa6b1ea99 rpc_max_payload +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaacc9d78 rpc_killall_tasks +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xabfa1b06 svc_sock_names +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac96d375 rpc_malloc +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef nfs_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb08dd7a0 svc_xprt_copy_addrs +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb545531d xdr_encode_pages +EXPORT_SYMBOL_GPL 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0xe4ae54d6 rpc_peeraddr +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1 xdr_encode_opaque +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5 qword_get +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec4ab894 auth_unix_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed0f55e9 svc_auth_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4 qword_add +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xee792a47 cache_purge +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69 rpc_update_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf1c48194 rpc_call_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2bc25b2 rpcauth_lookup_credcache +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf45e26e4 sunrpc_cache_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf65e1249 xprt_set_retrans_timeout_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf8f3fcb4 rpc_mkpipe +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c rpc_free +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa456d1e xprt_reserve_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfb9a2d74 xdr_decode_word +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff51eb66 cache_check +EXPORT_SYMBOL_GPL net/wimax/wimax 0x011df0e1 wimax_dev_rm +EXPORT_SYMBOL_GPL net/wimax/wimax 0x0a529514 wimax_msg_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x1091db0e wimax_state_change +EXPORT_SYMBOL_GPL net/wimax/wimax 0x11ac3f26 wimax_msg +EXPORT_SYMBOL_GPL net/wimax/wimax 0x25bc775d wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0x397105cf wimax_msg_alloc +EXPORT_SYMBOL_GPL net/wimax/wimax 0x539abaa1 wimax_msg_data_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x62f65908 wimax_dev_add +EXPORT_SYMBOL_GPL net/wimax/wimax 0x82b86845 wimax_msg_data +EXPORT_SYMBOL_GPL net/wimax/wimax 0xacc6099e wimax_report_rfkill_hw +EXPORT_SYMBOL_GPL net/wimax/wimax 0xc04a9e17 wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0xd51a1e30 wimax_report_rfkill_sw +EXPORT_SYMBOL_GPL net/wimax/wimax 0xf54df776 wimax_state_get +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x005764c1 cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x01b89683 cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1716fe59 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1c21f5e2 cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x22963c20 cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3dd981dd cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3fd9efcf cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x452f6c3c cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5cffe887 cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x61cbdb62 cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x63710e42 cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7b4e1570 cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8bcfa5d2 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x90835f10 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xac7126d4 cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbf9208b1 cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc8a70002 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd00a4605 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd17bf506 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd6dce271 cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe05b477e cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xec695527 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xedd85565 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf2cb1ee4 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xffc973b7 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x0a961af4 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x1154f0c6 ipcomp_destroy +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x51525f60 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xdadaa754 ipcomp_init_state +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0b2c1373 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0d6a9269 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x108ef7b5 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x12348e7a snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x12ea60da snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x17026530 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a9eef49 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x224d2532 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x23d95e8b snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2bebabcb snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32bc9971 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x367ac5fe snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3bd361c9 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3f79b0f6 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4286cb52 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x44bbb670 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x46944776 snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x47610628 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x48ddf6ae snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4a1cb37d snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4d810854 snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4f3f9c86 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x52295dfc snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55357470 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5f1ebabe snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x64d05782 snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x680b2e9b snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6911ad70 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x69cf43d0 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6aed388b snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x73474fe7 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x75f701b7 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e9b161a snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e9c23df snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80987c8a snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x92c31f24 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x93d2fd4c snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x964fe39c snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9683b02d snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9899e6b6 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9e7e06ba snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaaa87256 snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae6c321a snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2df46b8 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4dc7f20 snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb568969b snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb63418a7 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbb01b488 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbb059a10 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbdcccff5 snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbfbbdbf7 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc10dcd4b snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc39c07a0 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9fa65b2 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce3161c4 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcf27b28a snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd406eaa5 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd70bfed8 snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd77dc82b snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd99b4ece snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe42f1e36 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe798fdee snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xea5e5efb snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeb8c2e02 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf712b591 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf7fe8c54 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe03d77f snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfee9f49b snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfeef2dc1 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x776d9c63 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xa210a2f6 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x26faf18d soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x2dfbdfa7 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf887f728 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x2d761c3d soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xefa91bc3 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x6d7bc659 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xbd575df8 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x14b07561 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x66cec392 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x4f253529 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xa795cd12 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x279f8606 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x604fcb0d aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x4906a0c6 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x7b4de5be aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb4bae6ae aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb74e408f aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbcf45b37 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xccb5dc5e aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xec461ddf aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x031e24d1 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xc9434b9a soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x08fb2d9f soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x394111f6 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xb15e5106 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x19a12947 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x4941e7e9 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xdff04ab3 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x415c0ff9 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x44ecb0e1 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x47c0d2e6 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x91d370eb soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x1468d0cc wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x9e024b64 soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xd85e4d6b wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xf1458c31 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x21455d4f soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x59261717 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3cd310bc soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xf1aaf188 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x17fe437f soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x26a7dea6 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xb618cc1d wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xdac7a564 soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x308cbeb3 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xf1eaf6a7 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x4257e80e wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xddce0db8 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xd5c8f927 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xde4ad9d6 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xb8e32136 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc69382a0 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1c0d7ed4 soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x69a40017 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x238089ce wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd5169eeb soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x469f5eb7 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x8da7a3a7 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0128b0fa snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03d8e66f snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03ea7dbb snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09845a37 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0fcad4e5 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x11ea68ee snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x16041fab snd_soc_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c2aef7b snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1dbada67 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x22f81d1c snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x238f26f5 snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x269a0c4a snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2a93744a snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x34fe13df snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3653df31 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a0dc453 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4bea362a snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x564eb414 snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x574e43cb snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x596cde5c snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ac6129a snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ca0f01c snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x623afda2 snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x626b700f snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63b32401 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63c1c00f snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c914e49 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d320360 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x740a28d0 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7520d14e snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x75a248a9 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x77487701 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7a6b1748 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7b193ca6 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7e338c55 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x81e1a1cc snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x86cbcbc7 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x88bca09e snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8da87453 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9397856d snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96f4bfcb snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d0024ad snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d7fe5bf snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa99727a9 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaf16dad8 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xba27ae77 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbac177e1 snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbbe5bb4a snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbc2e7686 snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc1dd3667 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc489bd0f snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc53c7cc6 snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc71377a6 snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc9d69adc snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xccebc550 snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xce87752a snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd05d1a5a snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL 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ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0xa0255440 net_ipv4_ctl_path +EXPORT_SYMBOL_GPL vmlinux 0xa04da3b5 sysdev_class_create_file +EXPORT_SYMBOL_GPL vmlinux 0xa0667bd6 class_find_device +EXPORT_SYMBOL_GPL vmlinux 0xa081d132 spi_unregister_master +EXPORT_SYMBOL_GPL vmlinux 0xa0a858a0 device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xa0d94df1 crypto_register_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xa0fd7390 xfrm_output +EXPORT_SYMBOL_GPL vmlinux 0xa104b801 queue_delayed_work +EXPORT_SYMBOL_GPL vmlinux 0xa18c6aa1 driver_add_kobj +EXPORT_SYMBOL_GPL vmlinux 0xa2291ab6 device_find_child +EXPORT_SYMBOL_GPL vmlinux 0xa239e51e tcp_is_cwnd_limited +EXPORT_SYMBOL_GPL vmlinux 0xa2d5dc5d get_user_pages_fast +EXPORT_SYMBOL_GPL vmlinux 0xa2fb38ba crypto_aead_setauthsize +EXPORT_SYMBOL_GPL vmlinux 0xa3700a19 crypto_alloc_base +EXPORT_SYMBOL_GPL vmlinux 0xa3760d4a generic_sync_sb_inodes +EXPORT_SYMBOL_GPL vmlinux 0xa37de5e3 blk_rq_unprep_clone +EXPORT_SYMBOL_GPL vmlinux 0xa3dc2c0e find_vpid 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+EXPORT_SYMBOL_GPL vmlinux 0xc019c141 relay_close +EXPORT_SYMBOL_GPL vmlinux 0xc0a38452 crypto_givcipher_type +EXPORT_SYMBOL_GPL vmlinux 0xc0c23a0d sysdev_register +EXPORT_SYMBOL_GPL vmlinux 0xc10ec48c hrtimer_cancel +EXPORT_SYMBOL_GPL vmlinux 0xc11e09e4 sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xc126e890 klist_del +EXPORT_SYMBOL_GPL vmlinux 0xc1316ca4 inet_csk_listen_stop +EXPORT_SYMBOL_GPL vmlinux 0xc2100f52 inotify_init +EXPORT_SYMBOL_GPL vmlinux 0xc22a3091 vm_unmap_aliases +EXPORT_SYMBOL_GPL vmlinux 0xc22dd545 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0xc245a743 pci_enable_rom +EXPORT_SYMBOL_GPL vmlinux 0xc267bd35 tty_ldisc_deref +EXPORT_SYMBOL_GPL vmlinux 0xc2861bf6 __inet_lookup_established +EXPORT_SYMBOL_GPL vmlinux 0xc2a55bfe scatterwalk_map +EXPORT_SYMBOL_GPL vmlinux 0xc2cadc7d rtc_irq_register +EXPORT_SYMBOL_GPL vmlinux 0xc34efe27 snmp_fold_field +EXPORT_SYMBOL_GPL vmlinux 0xc3bcfeb4 crypto_register_alg +EXPORT_SYMBOL_GPL vmlinux 0xc3c32508 devres_find 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class_interface_register +EXPORT_SYMBOL_GPL vmlinux 0xc86c733b __blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xc86d0e0d disk_get_part +EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84 ktime_get +EXPORT_SYMBOL_GPL vmlinux 0xc9115a64 rtnl_link_unregister +EXPORT_SYMBOL_GPL vmlinux 0xc9561772 fb_destroy_modelist +EXPORT_SYMBOL_GPL vmlinux 0xc95b8668 leds_list_lock +EXPORT_SYMBOL_GPL vmlinux 0xc9cb45d3 put_pid +EXPORT_SYMBOL_GPL vmlinux 0xc9d61f02 platform_get_irq +EXPORT_SYMBOL_GPL vmlinux 0xc9e5d4fc register_dimm_printer +EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21 free_percpu +EXPORT_SYMBOL_GPL vmlinux 0xca25cc3b ring_buffer_entries +EXPORT_SYMBOL_GPL vmlinux 0xca336b20 tcp_unregister_congestion_control +EXPORT_SYMBOL_GPL vmlinux 0xca36357a flush_workqueue +EXPORT_SYMBOL_GPL vmlinux 0xca3a28c6 crypto_spawn_tfm +EXPORT_SYMBOL_GPL vmlinux 0xca539089 inotify_init_watch +EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf tracepoint_probe_update_all +EXPORT_SYMBOL_GPL vmlinux 0xca9ee6dd ring_buffer_normalize_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xcb942d73 tty_ldisc_ref_wait +EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d inet_twdr_hangman +EXPORT_SYMBOL_GPL vmlinux 0xcca55a16 ring_buffer_peek +EXPORT_SYMBOL_GPL vmlinux 0xcca92162 inverse_translate +EXPORT_SYMBOL_GPL vmlinux 0xccbf7d77 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xcd886813 register_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xcdca3691 nr_irqs +EXPORT_SYMBOL_GPL vmlinux 0xcdeaafe9 clockevent_delta2ns +EXPORT_SYMBOL_GPL vmlinux 0xce0383f7 fib_rules_cleanup_ops +EXPORT_SYMBOL_GPL vmlinux 0xce523ada uart_set_options +EXPORT_SYMBOL_GPL vmlinux 0xce891107 led_trigger_set_default +EXPORT_SYMBOL_GPL vmlinux 0xced14ed3 eventfd_ctx_fileget +EXPORT_SYMBOL_GPL vmlinux 0xcf09e313 __rt_mutex_init +EXPORT_SYMBOL_GPL vmlinux 0xcf170cff devres_remove +EXPORT_SYMBOL_GPL vmlinux 0xcf2d5d1d pci_block_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xcf532bff file_ra_state_init +EXPORT_SYMBOL_GPL vmlinux 0xcfa555ee fuse_abort_conn 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+EXPORT_SYMBOL_GPL vmlinux 0xd3129ae6 inet_hash +EXPORT_SYMBOL_GPL vmlinux 0xd3b960a1 get_inotify_watch +EXPORT_SYMBOL_GPL vmlinux 0xd4107678 macvlan_handle_frame_hook +EXPORT_SYMBOL_GPL vmlinux 0xd46f1206 ring_buffer_discard_commit +EXPORT_SYMBOL_GPL vmlinux 0xd487314d __blk_put_request +EXPORT_SYMBOL_GPL vmlinux 0xd4b51b3c mnt_want_write_file +EXPORT_SYMBOL_GPL vmlinux 0xd4b7e86f klist_next +EXPORT_SYMBOL_GPL vmlinux 0xd62afcb6 locks_release_private +EXPORT_SYMBOL_GPL vmlinux 0xd66e2b66 rt_mutex_destroy +EXPORT_SYMBOL_GPL vmlinux 0xd6dca524 blocking_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7 schedule_hrtimeout +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd74037db srcu_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd7c6ca0f pci_destroy_slot +EXPORT_SYMBOL_GPL vmlinux 0xd7d79132 put_online_cpus +EXPORT_SYMBOL_GPL vmlinux 0xd8021bf6 rtc_class_close +EXPORT_SYMBOL_GPL vmlinux 0xd80d8e0c fuse_get_req +EXPORT_SYMBOL_GPL vmlinux 0xd86668c8 find_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0xd8689a69 inet_csk_search_req +EXPORT_SYMBOL_GPL vmlinux 0xd86bdb04 power_supply_changed +EXPORT_SYMBOL_GPL vmlinux 0xd8d08112 debugfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0xd92101ee ring_buffer_empty +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xdacf1102 tcp_done +EXPORT_SYMBOL_GPL vmlinux 0xdad367fd klist_add_tail +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdb35eaae platform_device_register +EXPORT_SYMBOL_GPL vmlinux 0xdbea585a crypto_larval_lookup +EXPORT_SYMBOL_GPL vmlinux 0xdbf1fca2 crypto_hash_walk_done +EXPORT_SYMBOL_GPL vmlinux 0xdc01fe51 xfrm_audit_policy_delete +EXPORT_SYMBOL_GPL vmlinux 0xdc0960b7 relay_reset +EXPORT_SYMBOL_GPL vmlinux 0xdd00a1bb init_preds +EXPORT_SYMBOL_GPL vmlinux 0xdd6791c4 ring_buffer_iter_empty +EXPORT_SYMBOL_GPL vmlinux 0xddb66929 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kobject_uevent_env +EXPORT_SYMBOL_GPL vmlinux 0xe005ef61 eventfd_fget +EXPORT_SYMBOL_GPL vmlinux 0xe0a417d5 xfrm_audit_state_replay_overflow +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe119d9cc posix_timer_event +EXPORT_SYMBOL_GPL vmlinux 0xe131d70e xattr_getsecurity +EXPORT_SYMBOL_GPL vmlinux 0xe1656132 handle_level_irq +EXPORT_SYMBOL_GPL vmlinux 0xe1672c32 ring_buffer_resize +EXPORT_SYMBOL_GPL vmlinux 0xe195048d skb_segment +EXPORT_SYMBOL_GPL vmlinux 0xe21c2525 simple_attr_read +EXPORT_SYMBOL_GPL vmlinux 0xe2740ce4 tcp_cong_avoid_ai +EXPORT_SYMBOL_GPL vmlinux 0xe2a0ca4d __pci_complete_power_transition +EXPORT_SYMBOL_GPL vmlinux 0xe306066a scatterwalk_map_and_copy +EXPORT_SYMBOL_GPL vmlinux 0xe31dd0eb get_device +EXPORT_SYMBOL_GPL vmlinux 0xe336273e page_cache_sync_readahead +EXPORT_SYMBOL_GPL vmlinux 0xe368e99e generic_drop_inode +EXPORT_SYMBOL_GPL vmlinux 0xe3717a92 pci_find_next_capability +EXPORT_SYMBOL_GPL vmlinux 0xe3d58487 eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xe422083f rdev_get_id +EXPORT_SYMBOL_GPL vmlinux 0xe423566c vfs_cancel_lock +EXPORT_SYMBOL_GPL vmlinux 0xe430eaba sysfs_notify_dirent +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe548a07e sysdev_class_register +EXPORT_SYMBOL_GPL vmlinux 0xe568b7da fixed_phy_set_link_update +EXPORT_SYMBOL_GPL vmlinux 0xe5fa2f03 inet_csk_reqsk_queue_prune +EXPORT_SYMBOL_GPL vmlinux 0xe616da78 tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f gpio_unexport +EXPORT_SYMBOL_GPL vmlinux 0xe6665fed __get_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xe67fe575 fsstack_copy_attr_all +EXPORT_SYMBOL_GPL vmlinux 0xe6948a88 regulator_bulk_get +EXPORT_SYMBOL_GPL vmlinux 0xe6a1fc52 regulator_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xe7aa9737 fuse_request_send +EXPORT_SYMBOL_GPL vmlinux 0xe7c16037 inotify_rm_wd +EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877 pcpu_base_addr +EXPORT_SYMBOL_GPL vmlinux 0xe8464163 kset_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0xe90adbd6 sysdev_driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9a1c980 fuse_do_open +EXPORT_SYMBOL_GPL vmlinux 0xe9f013d3 blk_add_driver_data +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea39a486 __class_create +EXPORT_SYMBOL_GPL vmlinux 0xea5bf691 fuse_direct_io +EXPORT_SYMBOL_GPL vmlinux 0xea7aa0c9 platform_get_resource_byname +EXPORT_SYMBOL_GPL vmlinux 0xeaf0949a tty_buffer_request_room +EXPORT_SYMBOL_GPL vmlinux 0xeb19492e rdev_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec2b9032 devm_kzalloc +EXPORT_SYMBOL_GPL vmlinux 0xec371b56 trace_seq_printf +EXPORT_SYMBOL_GPL vmlinux 0xec446a0f da903x_writes +EXPORT_SYMBOL_GPL vmlinux 0xec6b1263 relay_flush +EXPORT_SYMBOL_GPL vmlinux 0xed3e45e4 platform_device_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xed4f811b bd_claim_by_disk +EXPORT_SYMBOL_GPL vmlinux 0xedbf998c ring_buffer_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xee044aa6 unregister_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xee0d35a0 register_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0xee942309 ring_buffer_record_disable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xeedfcf50 da903x_update +EXPORT_SYMBOL_GPL vmlinux 0xeeec8873 inotify_find_watch +EXPORT_SYMBOL_GPL vmlinux 0xeef5107b raw_hash_sk +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xef7dd65b i2c_unregister_device +EXPORT_SYMBOL_GPL vmlinux 0xefbc9a1b __blkdev_driver_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xefc70357 sysfs_notify +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xf0c0b357 inet_twsk_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf16f08c2 tasklet_hrtimer_init +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf1d1588f aead_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0xf2475fb3 transport_remove_device +EXPORT_SYMBOL_GPL vmlinux 0xf29272f1 register_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xf2981748 security_inode_setattr +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf325fcbd kernel_kobj +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf4269f31 __set_irq_handler +EXPORT_SYMBOL_GPL vmlinux 0xf4289016 __fsnotify_inode_delete +EXPORT_SYMBOL_GPL vmlinux 0xf44561bd hwmon_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf44cd6e9 debugfs_create_u16 +EXPORT_SYMBOL_GPL vmlinux 0xf469a0ac class_for_each_device +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4ae579c klist_iter_init +EXPORT_SYMBOL_GPL vmlinux 0xf4c6c451 proc_net_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xf4f12d6a sysfs_create_group +EXPORT_SYMBOL_GPL vmlinux 0xf503a831 platform_device_add +EXPORT_SYMBOL_GPL vmlinux 0xf52d8882 srcu_notifier_chain_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf589b391 inet_twdr_twkill_work +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5ee2df3 gpiochip_is_requested +EXPORT_SYMBOL_GPL vmlinux 0xf601b813 crypto_register_instance +EXPORT_SYMBOL_GPL vmlinux 0xf6381df9 remove_irq +EXPORT_SYMBOL_GPL vmlinux 0xf665de69 setup_irq +EXPORT_SYMBOL_GPL vmlinux 0xf674d2b2 attribute_container_register +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf71b3f6b tcp_twsk_unique +EXPORT_SYMBOL_GPL vmlinux 0xf780950f da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0xf869392e uhci_reset_hc +EXPORT_SYMBOL_GPL vmlinux 0xf86acebb nmi_usable +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8b4b47a unregister_jprobes +EXPORT_SYMBOL_GPL vmlinux 0xf8dcf63d crypto_enqueue_request +EXPORT_SYMBOL_GPL vmlinux 0xf908e30a rtc_irq_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf918e59c generic_fh_to_dentry +EXPORT_SYMBOL_GPL vmlinux 0xf9839e50 hrtimer_get_remaining +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9bdb08c inet_hashinfo_init +EXPORT_SYMBOL_GPL vmlinux 0xfa020fee nf_unregister_afinfo +EXPORT_SYMBOL_GPL vmlinux 0xfa239465 skcipher_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0xfa62c11e skb_gro_receive +EXPORT_SYMBOL_GPL vmlinux 0xfa8d60da anon_transport_class_register +EXPORT_SYMBOL_GPL vmlinux 0xfa998f96 get_cpu_sysdev +EXPORT_SYMBOL_GPL vmlinux 0xfb729c5c regulator_enable +EXPORT_SYMBOL_GPL vmlinux 0xfb8db42d sysdev_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfb9c058a fb_deferred_io_init +EXPORT_SYMBOL_GPL vmlinux 0xfbd5c5bb kobject_init_and_add +EXPORT_SYMBOL_GPL vmlinux 0xfbd7a33e regulator_get_mode +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc1567bd crypto_rng_type +EXPORT_SYMBOL_GPL vmlinux 0xfc1e95a4 tty_get_pgrp +EXPORT_SYMBOL_GPL vmlinux 0xfc58504b crypto_alloc_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfd2d09c6 inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0xfd7e25ce unregister_pernet_gen_device +EXPORT_SYMBOL_GPL vmlinux 0xfd9954f5 ring_buffer_read +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfe7381cb blk_insert_cloned_request +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfecd37da platform_device_del +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff9d15d9 input_ff_create +EXPORT_SYMBOL_GPL vmlinux 0xffc04543 unregister_dimm_printer +EXPORT_SYMBOL_GPL vmlinux 0xffe3ac9a rt_mutex_unlock +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/sparc/sparc64-smp.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/sparc/sparc64-smp.modules @@ -0,0 +1,1671 @@ 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+snd-cs8427 +snd-ctxfi +snd-darla20 +snd-darla24 +snd-dummy +snd-echo3g +snd-emu10k1 +snd-emu10k1-synth +snd-emu10k1x +snd-emux-synth +snd-ens1370 +snd-ens1371 +snd-es1938 +snd-es1968 +snd-fm801 +snd-gina20 +snd-gina24 +snd-hda-codec +snd-hda-codec-analog +snd-hda-codec-atihdmi +snd-hda-codec-ca0110 +snd-hda-codec-cmedia +snd-hda-codec-conexant +snd-hda-codec-idt +snd-hda-codec-intelhdmi +snd-hda-codec-nvhdmi +snd-hda-codec-realtek +snd-hda-codec-si3054 +snd-hda-codec-via +snd-hda-intel +snd-hdsp +snd-hdspm +snd-hrtimer +snd-hwdep +snd-i2c +snd-ice1712 +snd-ice1724 +snd-ice17xx-ak4xxx +snd-indigo +snd-indigodj +snd-indigodjx +snd-indigoio +snd-indigoiox +snd-intel8x0 +snd-intel8x0m +snd-korg1212 +snd-layla20 +snd-layla24 +snd-lx6464es +snd-maestro3 +snd-mia +snd-mixart +snd-mixer-oss +snd-mona +snd-mpu401 +snd-mpu401-uart +snd-mtpav +snd-mts64 +snd-nm256 +snd-opl3-lib +snd-opl3-synth +snd-page-alloc +snd-pcm +snd-pcm-oss +snd-pcxhr +snd-pdaudiocf +snd-portman2x4 +snd-pt2258 +snd-rawmidi +snd-riptide +snd-rme32 +snd-rme96 +snd-rme9652 +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-emul +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-soc-ad73311 +snd-soc-ak4104 +snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-sun-amd7930 +snd-sun-cs4231 +snd-sun-dbri +snd-tea575x-tuner +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-ymfpci +soc_camera +soc_camera_platform +softdog +solos-pci +soundcore +sound_firmware +spcp8x5 +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +sr_mod +ssb +ssfdc +st +stallion +starfire +ste10Xp +stex +stowaway +stp +strip +sunbmac +sundance +sun_esp +suni +sunlance +sunqe +sunrpc +sun_uflash +sunvdc +sunvnet +svcrdma +svgalib +sx +sx8 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +tcm825x +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tda8290 +tda9840 +tda9887 +tdfx +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tg3 +tgr192 +thmc50 +ths7303 +tifm_7xx1 +tifm_core +tifm_sd +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tle62x0 +tlv320aic23b +tmiofb +tmp401 +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_nsc +tps65010 +trancevibrator +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +tveeprom +tvp514x +tvp5150 +tw9910 +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +typhoon +u132-hcd +ubi +ubifs +ucb1400_core +ucb1400_ts +uctrl +udf +ueagle-atm +ufs +uhci-hcd +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultra45_env +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +upd64031a +upd64083 +usb8xxx +usbatm +usbcore +usb_debug +usbhid +usblcd +usbled +usblp +usbmon +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-compat-ioctl32 +v4l2-int-device +vcan +veth +vfat +vgastate +vgg2432a4 +via +viafb +via-rhine +via-sdmmc +via-velocity +video1394 +videobuf-core +videobuf-dma-sg +videobuf-vmalloc +videodev +virtual +visor +vitesse +vp27smpx +vstusb +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w83627ehf +w83791d +w83792d +w83793 +w90p910_ts +wacom_w8001 +wavelan_cs +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +yealink +yellowfin +yenta_socket +zc0301 +zd1201 +zd1211rw +zlib +zlib_deflate +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/amd64/generic +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/amd64/generic @@ -0,0 +1,9999 @@ +EXPORT_SYMBOL arch/x86/kvm/kvm 0x205a8d25 kvm_read_guest_atomic +EXPORT_SYMBOL arch/x86/kvm/kvm 0xee025a2d kvm_cpu_has_pending_timer +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0x92dd2e81 suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0x47c1c3e3 uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x12d6a02f pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x1d56de7a paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x33993715 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x376c659c pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x464464c0 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x5392edc0 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x606bc23f pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x87f0471a paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0xa20159f4 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xc771a3b7 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0xdacaf45e pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xdd127973 pi_do_claimed +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x22b64ed4 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x2fae71df gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x3ffb1873 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x407f8c2c gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x5c322972 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x87d95285 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x8e07d6d3 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x9a5305fb gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x9bf0fa72 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x9d6ed520 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xa1da016f gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0xc3345605 gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xcc1d1024 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xccee2e49 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xe8216a13 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0xf4d2fd5e gs_close +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x01ab3003 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2226ff02 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x34dc1593 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x36c15ed0 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44f88466 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5171d541 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x542d044a ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x692d5a91 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6bf928d8 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x72562b9a ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x84a44368 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x875a857a ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8ecd7b33 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa8e62df7 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbaa2e3b0 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbbbfc43a ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbd9bff42 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc187121c ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xeb1b1916 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xefb0f4c9 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf4d1fb20 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf63a787c ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf9f6497e ipmi_set_my_address +EXPORT_SYMBOL drivers/char/nsc_gpio 0x170b782c nsc_gpio_read +EXPORT_SYMBOL drivers/char/nsc_gpio 0x48a72876 nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0xd5c9a114 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0xd4f8a712 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0xdea9e2e4 edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xf3b0febc edac_mc_find +EXPORT_SYMBOL drivers/firewire/firewire-core 0x1cf5895e fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x2a941bb2 fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0x2df146e3 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x49a29946 fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4c979a34 fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e86dd83 fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e8911df fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0x515f9e10 fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0x57278583 fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5ffb366f fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x60de8754 fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7d2b2f9e fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c34de54 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0x937516ae fw_iso_context_start +EXPORT_SYMBOL drivers/firewire/firewire-core 0x95105cc7 fw_send_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0x96554c9e fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0x9d8505d4 fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xa84c9da9 fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xa9b79a39 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb5c36f46 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb690053e fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb83a3c69 fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0xbd1628d2 fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe323685c fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf1ac1058 fw_iso_context_queue +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x019ea635 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06979572 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f53389 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x07591126 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x08eeea55 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a1df318 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c006469 drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f3a2fab drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x114f081f drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x117516ce drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x12e0f0cf drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x14079a4c drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x15f4847d drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1623d2f6 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b664190 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ccd5be5 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1cfd4749 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1e4b22e6 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20be2e92 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x22a21f11 drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x23e5494d drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2789a73e drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x33b5fdbc drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3730dbed drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x39e605c2 drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ab04dc7 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ca15fc2 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3dc576ae drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f137cab drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3fca9162 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x417c40e7 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4603c1c5 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x46bf2c9a drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x471f1ac6 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x48d1845e drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49b483e9 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e0826ed drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5060a72f drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x511c0337 drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53b67f2c drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0x54158547 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55508564 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55c031d2 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x57d2a5d2 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58ca5d23 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5999c3a4 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a04e53b drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a509897 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b491819 drm_open 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drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x71894e33 drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x728bc3e8 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7d507ffb drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7eeb29b4 drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a0b335 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x84e8d5e0 drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x851f3bbe drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x856adc85 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8598f686 drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x86e46a3e drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x872a300b drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d57d879 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e741de2 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f04cd80 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f37f66a drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f3d538c drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94be8c6f drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x967535e5 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a673c43 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9bd5dd92 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa20001f6 drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2b5c9ac drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4aa72f8 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xab33e2f1 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xafa954ac drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb01f36d8 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2a07ab4 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb72710fb drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8a65689 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb95c785d drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbae09ed9 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbbbeeddf drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe7aa245 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc02be427 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1ec3252 drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3cc7eb6 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc99ac4e3 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd530815 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd137fe6c drm_compat_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd177b73d drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd186f6fb drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2d51f78 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd30d0793 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd702d93f drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xda40b55b drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb63d241 drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe43e4dac drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe4bd3388 drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe558e3c6 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe6d5cb67 drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8fd3141 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xed1c83a6 drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf129a204 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2004641 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf39ae836 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf3d9f945 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf5e16234 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf97de9b4 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe07228a drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff64cfa5 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xffd63eba drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x151d1119 intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x28398a3a intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x905a33a2 i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x9904306b intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x64384ca6 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xa0b1934f radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xbe406cce radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11c326e0 ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x139cd04b ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x25e7a435 ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34b80ee9 ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4552ffeb ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4c4a5894 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x636c5c59 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7064c78c ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x79491e8f ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8cea5373 ttm_bo_device_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8dde3d30 ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91317586 ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x98ae3659 ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9a9619a5 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb0987a46 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb896afb3 ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbedc804a ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf10070e ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd6496f80 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd75b5eb1 ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd997f520 ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed0fa494 ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf20a5fe8 ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf817f5ae ttm_bo_unref +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x21afe5c1 i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x23417129 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x71c63c81 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc0bc6f89 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x276b3fa6 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x9f61bace amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x025098b3 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04264e74 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0edab95d hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x106f17bc hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x119cfcd1 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1453b920 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x14958cec hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548 dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x15d4b89b hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2108f8ef hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3532d3ba hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3edd161e hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x41dac220 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x46b5cd9d hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4afd5772 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4ca2a9b8 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d24f984 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x52c882a6 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x584933ac hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5995aa92 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5c9049d1 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ebd2a34 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x654c49c8 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x67130de5 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6764d2ea hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c9aaac9 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x716c15b8 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7612b760 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x768df57c dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78a4c07d hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d73813f hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7f0088ad hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80455a20 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8054bf3d hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80ecce33 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x87e57f5c hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x89190246 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ba607cb hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8c8cff93 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8e09e435 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f9b84a3 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x939088cb hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x95e57eeb hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa58299e7 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa87378b5 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8ef46f9 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacdb226b hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb27fcfd5 hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc135675f hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc8139cb3 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0210bd4 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd2ede2da hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd48a5022 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd6314c11 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xde1d50eb hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef81a1da hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf098a186 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf0a3604f hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf48e14f7 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf780902f hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd0236d7 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd1386f3 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd1db4b6 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd9b3410 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2509bb14 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x68d22aa4 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcbeca9d0 ohci1394_stop_context +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x39a458dc rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x5b57241a rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9eca9f64 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xa1673701 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x10acf415 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x285277ac ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x31f35a05 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x35e31442 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x370724d3 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x425ad590 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x427ad668 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4eab87d2 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x51684e5d ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x60ff070e ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x62fa96da ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x68624b16 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x960c6ee5 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb4ed6f00 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdafa7227 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfbdba4fd ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfed339cb ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x03174afd ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x10ca3f5b ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x16251af8 ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x171e4609 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1f60aa26 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x20b1d245 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2174c471 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2b755ef5 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2dd29fd6 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2dfcb319 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x32f8f69e ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3e53afd1 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3e6ea194 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x40af03a5 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x44766b66 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x447a8c25 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x45b9ecab ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4791943c ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48bd0df8 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4b0fa8c6 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5120479c ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55d4b3d9 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56fdae80 ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x588d60a7 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a7216c4 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a95b692 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5bb07153 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f9b5326 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x60d23fa1 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x617973be ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6374944c ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b467ee9 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d2be39b ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70af0b6b ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70e3e2e1 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7196acd9 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x71b2a012 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72d51915 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72d8af71 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x78e3154b ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7a6688f7 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8896e43b ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d9c77e9 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x91135297 ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x98ad2bc1 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x99f60cff ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d14abc9 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e922735 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa64bdd4c ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa95517ad ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbb0daedf ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbede0bdd ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1e4a9cd ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc737f5f7 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcc141fbe ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2059fd3 ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd62028f0 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd66e84b3 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe181a2d6 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe4990714 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5dee867 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe7e516f0 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xec7ec306 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed56d476 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6bc7702 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf9f9067c ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x06296314 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1852b654 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x47e9aac7 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x56a266c3 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5f5648bd ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6aa725a3 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8c8aff9c ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbbe12d03 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbf2bb4a7 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xcfd31d63 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd04aefc8 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xed85be74 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1c2694b3 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x20b256e2 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2d791d42 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3a217567 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5fcbe248 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8bea579e ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf332bd12 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2c3bf252 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x417db987 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x4ea0d2d0 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x551f0336 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5bead1fd iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc1a1ab68 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc5e4e4d4 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf80444fd iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x04e332e4 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x13b24ab5 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1624ade2 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2d221fd7 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3dabe897 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4346ced6 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x49c64b16 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7f1eacfd rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x962c5d43 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9bd67527 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9e9c73ce rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa0f5e971 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc0b2a6e5 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdb6e8803 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdec55827 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe8e00021 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf5041c1b rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfebd6a4a rdma_create_id +EXPORT_SYMBOL drivers/input/gameport/gameport 0x041274e7 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x06fd3179 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0x0f8a1337 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x129c7391 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x16d00621 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x3235acd0 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x688efbce gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xa3ce0775 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xdc275290 gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x339dbe12 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x5b84998d input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x69d7cadf input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xfa16abbb input_free_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3c63aed7 capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x415a07f2 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x5362668a capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6025200c capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7f9768a7 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x854cdb67 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x86bd5aed detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x97acb10a capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb483dc5e capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf68e7803 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfa1d8e4a capi20_set_callback +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x052fb9c8 b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x60074436 b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x6842265f b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x82526053 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8604a7b6 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8bb4cd7d b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9077e4b9 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x92cab36b b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa4fc2d03 b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb833be34 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd141a1f4 avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xda9680ab b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe2dbc62e b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xef277783 b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xefcefaa1 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x04ed5ea8 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x06b52c65 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x29327c92 b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4a1d1c9f b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4f9b68f8 t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8feb74f6 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x930b6406 b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xb974a2d7 b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe4aa243b b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x434f00f8 proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x8ae3cdb2 hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x1bacb200 isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x20570282 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x9a5d5701 isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xc4912dcc isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xe8afab6f isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x26fcb9c9 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x3ee8a667 isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x479620f8 register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x05be59ea mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x09be35e1 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x20855bc6 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x22b45f5f create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2f0487f8 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3019b757 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3055eb37 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x35ba7d69 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3654fc83 mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4322bb19 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6b2f1714 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa063573f mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaa85e77c recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb2453d27 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb4fd5d89 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbbadc0b0 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc901ff3c get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd0225bb8 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd412190c queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe452cc1b dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf32d286b mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x0402fc70 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x6f4084da mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x74c8e93a mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x8d4321b3 mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xcbfc2532 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xc462cb5a qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xe57651ad xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x9235d22a xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x115020c4 flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2081a623 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2beeca4e flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2d3bbb10 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2d452c46 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x344fa7ed flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3c1ce9d3 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x457492d8 flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5f4a3979 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x604e2bdd flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x614b29dc flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x630efccc flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6626f081 flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7aca936b flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x80eeab2d flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x827fe1d9 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xac79cfab flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbcae03f3 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbcf7b6fa flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xdc42726f flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x15fc550e bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x2413e66d bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x6e83808a bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xe93f6eb8 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x39205f06 dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5800aa7f dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x6270b77e dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7d4338c7 dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x96f36a81 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xac8f663c dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc5459f05 rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd99e30ec read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd9cc342b dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xe813ab77 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c457c5c dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x188e1ead dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x18d58757 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c06656b dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c7374b0 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3c8ef51d dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3cf74f20 dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x47dba73b dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51f3767c dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5e246933 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x62598706 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6988f784 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8570e59a dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x88d31d7b dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8c094e77 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x97b37d7c dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9af50013 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa5311dbb dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa92da3e8 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb1a5fbf8 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb733f9ef dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc93cf6f dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc0e42fab dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc564e7af dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc78b5e0d dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb89fc7d dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcca08cb5 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcce0eeed dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd639b9bc dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd7765e69 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdc67c969 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe1703854 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfa8b9929 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x05f7632e usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x510b2ef0 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x55647a7c dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x73595cd5 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8a412dc2 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xaa4dba73 dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xae90a855 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x22057398 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x167e82f2 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x23952408 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x259ca5b3 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x44f05d61 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x474e2e4d dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x47a93285 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x704d10e7 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x932b1fed dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd764d9c6 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf61082a0 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xffe9d3b3 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x78dcfa66 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xc3d00c97 au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x7cef01e5 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x5d0c3d92 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x2521586e cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xafbdef5d cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x4246d855 cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x6fad7411 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x389c014c cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x0f61fc30 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x81920125 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x2efcc407 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xc8eb10c1 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0846813d dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5bac58ba dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6e759689 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xa1c91669 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb68d0085 dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xcf8043c0 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe959d910 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xa0b6bf10 dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xb03bb042 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x19004077 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x1d29b26c dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2ec12f5f dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x30073fba dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x685e8c6a dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf6db5c44 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1887c83a dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x636cfc31 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x7fa77186 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x98a4fdd1 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x89bdf43a isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x00a45859 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xc3abbd3d itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x70af6b89 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x56a86427 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x876dcd04 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0xa3cd8eb2 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x7dc36290 lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x8238c9a5 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x64d236a6 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x33f27e0d mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x9f1868ab nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x932d3b0a nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x8f51c3ea or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x72a66a4b or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x38f95410 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x1608dee5 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x58c383d3 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xf61e304b s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x2bfdf5c5 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x3fb8f068 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xe930b814 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0xab3fa254 stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x9fc89899 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x627f5215 stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x74e7ae0f stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xf6c6b291 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xd5b154e7 stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x89380417 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x78c97711 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x918923fd tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x2b388ec6 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x81e49fb2 tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x6388bdb0 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x693348d0 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xd609ef02 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x72ca34a7 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xe43db8a5 tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xc5b0a528 tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x44c4bbe7 tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xeb2d6570 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x5035958f ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x80af7587 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x1ca1922b zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xbcf80920 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xcde48431 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xe62385fb ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xa685bc84 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xae18e226 bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xe2e28a59 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x55ff184c btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x6231fdab btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x92821189 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xa1351823 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x4375caae cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf71cd1aa cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x46b1063c vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x4e48ff05 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x251a734a cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x2cc9def7 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x74280f3a cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x770e6297 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x79cd6d39 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x9bf443bb cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x29c22a1b cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x456070f2 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4736ef60 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4bf865a7 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x62caa2ef cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x83012543 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8341a6b7 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0af0ddd3 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0bc0bf86 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0cfe99db cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1581e091 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1677007c cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x346dedc2 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x37a2d624 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3d512f4e cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3e374445 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x436c45eb cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4fbb0020 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x75513a75 cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f22c9ba cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x895a243d cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x90faaa28 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa7add7ff cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb504e80f cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb5e63018 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc17cf1ef cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc2418f7 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdedc3f63 cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe8f97944 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x70902267 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xa10decad em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0e386de2 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x411b8e11 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x530efe5e gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7dddc48c gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8993ce30 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8e0efe4c gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6e61948 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x014ef5f2 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x078a6ebe ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0a8ea284 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3f1df634 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5caadb94 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5f8fec94 ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x6e37e6cc ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7db3db09 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x94c88703 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd62f5377 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe38059d9 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x08dbe0cc saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1062b70a saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x28982c73 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2e64bd07 saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3b18111f saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4cfa1f20 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4d095867 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5537c4bd saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5902cd1b saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8777b449 saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf0f5ff99 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf8a425b2 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/soc_camera 0x03d732ac soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2edee684 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3d720e8e soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x83141e81 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xa73e6262 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe1f8744f soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe9e22f84 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xf8caca20 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xfa805d39 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x5953cbd5 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0xc98437fc tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x019afd35 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x03c39d53 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x299fb9c7 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5a2ab862 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9b1e9e0b usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf9bee1bc usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x19970e6f v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x49630a37 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x7943252a v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x1a53f6e5 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4d194c65 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x55943862 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x55f41384 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7a2ede3d videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xe7f98afb videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x284c8ebf video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x318fd914 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x439d15c1 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x8ac83edd video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x940ad912 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0xb02a815e video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0xb9f572eb video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xefd80649 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf478040d video_unregister_device +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x200ec2d4 videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x347a99df videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x5b665b4c videocodec_unregister +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x97110afa videocodec_detach +EXPORT_SYMBOL drivers/memstick/core/memstick 0x089b8207 memstick_free_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x0ad82bd6 memstick_next_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6205a0c9 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x78c6e956 memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x7d254746 memstick_detect_change +EXPORT_SYMBOL drivers/memstick/core/memstick 0x90810e8a memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x94aac5b3 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xc5e6fa6a memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xe7c45891 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xec2c01a4 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0xed9f6ea7 memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xef249e40 memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xef444b4b memstick_suspend_host +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x01dfca5b mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x10bb2a37 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1b6bec03 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1c899110 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x21a83f25 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x393b4551 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x40d32dff mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4410a634 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x481c5c8d mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x50a7d590 mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5607871b mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x576d248c mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5ebb0668 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x631e8be3 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6cb2a5e6 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72945ba1 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x952ea104 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa9cddebc mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbcc329fb mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc72d6599 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc904e06e mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcca574a7 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcff39bc0 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd62bd766 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe7f30c5a mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf9e411ff mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf9fcc538 mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfe48a12c mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x083d44ff mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0ef07c1b mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1d2d6f29 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x26dc76f7 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3a569b32 mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50d7f024 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50fef4b5 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x578ddf1f mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58822104 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5dcb91ea mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5df24ffe mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x65943a56 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6e20d8c9 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7535dae2 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x777a6612 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7ff8f303 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x84d8c7e4 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9263f0ba mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x97bc4ed1 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa4094217 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaf9cc14d mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb5f6877c mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb9095966 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b5f862 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc876cd0c mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe2478eb6 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x15a0d88e i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1a4990cd i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1abfaedf i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1cdf8a61 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x20acf6a5 i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2512470a i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x367bc861 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x390b6507 i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4621e92a i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x49d2af0a i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63d28404 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x69c95c89 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x88b444f8 i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x95a9f9a1 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9f5fce06 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa9e05d22 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb99a85cd i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xcdeec4df i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xce6a6427 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd670d551 i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdd2abd58 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf7f32e19 i2o_parm_issue +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0a17e502 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x74c1e72f ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x87470f95 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8bb6d620 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9b9f9060 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xd8c94347 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe17d7086 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf979fc51 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x02d423a6 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xd66a5a0e pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x55c28131 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0x6a408421 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x64fe7140 c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0x7309f135 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0xa3de7cda ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xf5305dbe ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x1d37f6b8 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x22ccaae2 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x5d5cd270 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x5ea19844 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x778fb462 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x90cb8c54 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x96068757 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xbb5bb756 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xbcf6b732 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xc8197466 tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xca44ad7d tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0xe457898b tifm_eject +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x3d6951b0 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0219c490 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x18d7b7c8 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x4f25ad2f cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4bc245ed register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4d9b710e unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xdd2e9dd4 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xee114a9d do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xd0b06c45 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xb7e7e39f lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xa796de17 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x86c547a1 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xe72214cc del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x3cfae54e mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xed89e385 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0x4223ef4c nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xdebcda23 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x753eb16e nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf44088a1 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x80e671d2 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x83e25049 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xc9fb002c onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd5a10d61 flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x10a33962 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x2ba85c8f ei_close +EXPORT_SYMBOL drivers/net/8390 0x32d2f7b8 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0x4582e5a3 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x5095aae4 ei_open +EXPORT_SYMBOL drivers/net/8390 0x60801cef ei_poll +EXPORT_SYMBOL drivers/net/8390 0x8420c3f1 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x9c280e71 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xc62ea2cd NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xe3897d74 ei_start_xmit +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x10f94273 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x19af4880 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x59e28ddc arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7d675fe9 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x81e4610f arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xae3fcacd arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc361b817 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xce7dc809 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf828bc12 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xfd024c18 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x27928244 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x308f54f0 com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xa9da3762 com20020_found +EXPORT_SYMBOL drivers/net/bnx2 0x66f407b4 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0xa7582407 cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x10953959 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1b26210f t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x346808cd cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x40afe8a5 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6d08b694 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x70a26d74 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x72b970d5 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7550f431 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7843add2 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x866b2bc8 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x91d7c243 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9c6f9f67 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc261a517 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc3dcea56 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd75d4d47 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xff23df2a t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x1e6fc58f hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x3a14e1c8 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x463bd2b8 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xac403e4a hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xfb0ebee2 hdlcdrv_register +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x01cea111 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2b0305b4 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x33264d19 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3dcdf6eb sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4a812bf9 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x542656dd sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x79ac102e sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x98c09445 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc6c60756 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf129559e sirdev_write_complete +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x04bb949c mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x35663090 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x35dd6056 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x697a170f mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xae1f7df2 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xbdca0f9a mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xefdd8ecc mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xf344e271 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x847d4a38 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x866cb227 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf9fd10e5 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/sungem_phy 0xdce45b2a mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x15c0a9f7 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x405bbd97 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x56170903 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xc91bc58b tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf5350b39 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x12274124 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x2897bfa8 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3ac6082a hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3de0418d hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x58183a55 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8bb7f3b1 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x93daffc1 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9c02f853 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa14d7b27 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa97251e7 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0xe4e20dc0 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wireless/airo 0x1e2cd3e6 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x6aa35994 init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xe1f092a8 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x0ee36222 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xce5419c0 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/atmel 0x8b93a692 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xa2222d6f atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xd200b2ee stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x140cdc5c hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3152b714 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3b53435a hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3ccf3727 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x41bb2317 hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4b1bc616 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4c2df412 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4c4c33f4 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5b7dca97 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x64ce1400 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x662a128e hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x75cb1f67 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x800dedb0 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x85485433 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x858c8841 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa189114d hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa5245a15 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9489bd7 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbb72343a hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbff2772f hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc40214b1 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd4259a48 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd55b36b7 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xed7941bb hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfdcccc9a hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x15b67ea6 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x21d2c95a ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x25961e7f ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x45c151d0 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4c7ae5a1 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5cea40b5 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x68516dc0 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7e968e44 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8acb5ded ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8ea3fa01 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x90af2da5 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9a8c65ab ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9ce8ebdd ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xac05e007 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb5ba17c3 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xda8d0856 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdd989ac9 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe3098714 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe527165d ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed84b11a ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2974604 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0037da8f iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01adf490 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02413fab iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0246d8a1 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02bb643c iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04d49e71 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0535a93d iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05fc8a31 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x06feca66 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07c44ea8 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07cf8102 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08e81c36 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ca60ec4 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d4cd202 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10078af4 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x129484fe iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12d27273 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15b0ce77 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f19027 iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x213dc109 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22a4938c iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2563d5cd iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2863800c iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b07af04 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2feb8ce6 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x300f3414 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30c89e9e iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33dd402b iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x356c90f9 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35a04152 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35e81962 iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39e668b1 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a8e8b12 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f7711af iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41e4bba3 iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42a82592 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x451837ff iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x463320d9 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48abd2d6 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x493d83b5 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b06dc14 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b46cbf9 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d5b0286 iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e25d842 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4fdaa76a iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50999145 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5369ab2b iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5568bc0b iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56c594dd iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5781aefc iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x588a18cb iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5a568e77 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5afe190a iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b79c931 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e8020ea iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ff27b6f iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62d8bf13 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x635a6f68 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66c45d13 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x670af4c9 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6902e4ee iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6be3ca5b iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d43fdee iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6f395ae7 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x704be9bd iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x705a0175 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x71d7a8d6 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x739283c6 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77de9d0b iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x799ec577 iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79a23c81 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7db607ba iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f18ddd9 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x817ed0b4 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84d31203 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a114a80 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b702ab7 iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cfe063d iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x92e0f5bd iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9353f036 iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93c34bde iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94bac1f3 iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x976301a3 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97aa2fab iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x982c5bb9 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c56ed78 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f6fa60b iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0c0f75f iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa22b0664 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2c14d9f iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2db2831 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa39f84dc iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3b76f1d iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4e1d448 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa764f3b8 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad141ab5 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad883971 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad9421bb iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad9577d2 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb0cf8b31 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1158bb5 iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6ed4241 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xba93543c iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc3dcf16 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbcdd0352 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe82c9ce iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbefc50f2 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfef7864 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0d7245b iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc132b029 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1747112 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc186f99f iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1f41594 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4a0407d iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc8f311cd iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9ca33cd iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd84b87f iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xceec5044 iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0f3c632 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3040a01 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3538170 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6fad863 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc04ccc5 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3021e00 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3241028 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3a8f5c4 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe70974a4 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe96d507f iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe9ec50c2 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xecd9df9c iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee7440cb iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefd60233 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf20f9688 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf45ba0bf iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf49ef8be iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf71b04d4 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa950f14 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfcc6bf8a iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe76fb77 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x423930ea __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8e681ea9 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x9cafb2ca alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xdeec4b3e __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe62696ca orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x11afc703 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x2c2983ff parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x3e886584 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x446914ff parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x449742ef parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x47264d06 parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x48624e7e parport_read +EXPORT_SYMBOL drivers/parport/parport 0x49865e0d parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x505e9893 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x5b70c7c7 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x5d0b2b6c parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x61480586 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x64dae89f parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x6e49ac75 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x74ba6499 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x7ac6a254 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x7f735bd3 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x8154dd3a parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x84f13913 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x90c6b57f parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa2370167 parport_write +EXPORT_SYMBOL drivers/parport/parport 0xa612838e parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0xb0052fb0 parport_release +EXPORT_SYMBOL drivers/parport/parport 0xb95a45fd parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xb998b285 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0xc18b6ee8 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xd25fd471 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0xd59257dc parport_claim +EXPORT_SYMBOL drivers/parport/parport 0xdb11588f parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0xe14a2080 parport_get_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x30ae904a parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x3da6adac parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x06144c6a pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x106fda42 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1765a7d8 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1df0cf21 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2dd07c7c pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x36d0fced pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4b38486d pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4e427a60 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6125a8e7 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x88a6b6c9 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa47df5dc pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa62c670f pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbe80a222 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd9438ad3 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf984d74e pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x00ae1832 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0ca44a4d pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x16076e77 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1ca82cb6 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e7a8b17 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3d0a436c pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4b952bd8 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5ceb429a pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6031f1b2 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x62b9a44a pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x70776966 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7d223222 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7e9495c9 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x803a3b55 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x89ffccdd pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x90f9f5b8 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x91b246d4 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9ad48bc1 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa8df65b6 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaeee64a0 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb242ae8d pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb7069ea8 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xba85d59a pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc8d0a3f8 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd73181e2 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xda01d3c4 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdb3625f2 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe115ccec pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe9f48dc0 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf0d518ea pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf419a54d pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfbd88397 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfed1146b pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xc7399cc9 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0x79075f30 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x0ccad922 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2ec8f55e fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x348d9c53 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x916f49c7 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xc3b29a32 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xccd5e9e9 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xcdc0729c fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x055572de fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0868e0ba __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x105b32f4 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x193e4093 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27da973a fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2874e372 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e555cab fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32298942 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x326c61cc fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x34c5ef83 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3bdc5d53 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3e8cdc26 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x40e9f315 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x47c802c7 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4a9160f9 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5918d199 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x687cd59c fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e0a282c fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e6ca6f0 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75959e63 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x83337b86 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x874b603d fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x88e6fc59 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x96c162cf fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x97c97bb8 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ac1958e fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa2561423 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa2fed360 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa54dc498 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac51735a fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac6796f1 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb1a2b5dd fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbc082747 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbd97cd78 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc5f0aec4 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xccb3287c fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2d9e8ba fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd4949668 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe5d38cbd fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xed914fa3 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeed4c1d4 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2793e972 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0480a5cd osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0aa7e2b6 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0ba8e0b4 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18c49a78 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1fae70c0 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x23d8ee7f osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x271c6a5c osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x348f779f osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3de737e5 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x43cfd170 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44d698c9 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4524e664 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x55322eaa osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x59486148 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5e327193 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x618897c2 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7ee7150b osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x89caa808 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8b9c1ee5 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8cf98d00 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9c4cce56 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xada087a1 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc1c18e7f osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc87c8119 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd2f04a21 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd82e4372 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5a9f482 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe8384c2c osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe9a13628 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec31475e osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xee3ddc82 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf2f1aa1e osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/osd 0x2ae3b53f osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x6654eb3c osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf13accf5 osduld_put_device +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x26f37f39 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x53851188 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6ad482ae qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6e944b3e qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x89f8b087 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd71d37b5 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x5a684685 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x9a50d7f2 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xea67b9cc raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x262d42f3 fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x271ca720 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4229284e fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x51cf9319 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5e352a7d scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8b07bb52 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9b212372 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9c61f53a fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe2590605 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe57db115 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf2e0838e fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfd74365c fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x04396f7f scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x17951e26 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1a7ea93d sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1c89a754 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3e84e85c sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4900b36b sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x56dbea84 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5c8e408d sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5dfa0831 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6ba03366 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x747f6d35 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7b4e8e59 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7bcb5349 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7cc19915 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f37ba69 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x85667d4e sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9288fc9b sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x93ef748d sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x983cc8e5 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9a4767f7 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc1c0d081 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4f78fb1 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc8f999f1 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe2b79eeb sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xea329483 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf15d6546 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1593440e spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x45564d61 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x651b8849 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x863aff57 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8cb5d359 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/ssb/ssb 0x09bc8dbf __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0a25146f ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x0d633981 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0x208949ce ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x2b277316 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x3d5af4dd ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0x3fec0e67 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x50206904 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x5dd8f66f ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x5fa82c35 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x7935c210 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x826bcd45 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xaefcdaf1 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xbd68779c ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xdcc603d0 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xdd16c0fe ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0xded39b75 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xedb6ecae ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xf5bdec83 ssb_pcihost_register +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1380ff85 comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x17cd7801 comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1812845d comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x259db570 comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x433b923b comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x46e5e337 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x507b779b comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5afcb30c comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x85b69d70 comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x867cc2e2 comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9175be4c check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9b38cc0d comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa88ac5c3 comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xaa1723ac comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xade58725 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe9fe4033 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xf0f659cb comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x747e3e26 subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x74ce2eb6 subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xeb775e8d subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf74d81bb subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x08ccf12e cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x598b3b57 cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x644357af cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x12c67e55 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x1a3e9191 mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x23dfe84a mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x414aa8a0 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x46efb298 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x48f5404c mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x59e71eb0 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6a701f78 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x78bc8b33 mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7eec3d52 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x96f3809f mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x99847771 mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb2bc54fc mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xbc3bc288 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc7adb992 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcde84a8 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe66e022b mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe8b9b1d0 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe98b236c mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xef1cabe8 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdb78d632 subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdbc39f00 subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdfc41340 subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xec853614 subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x8cc114c2 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x0be7f8aa go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x0cc78061 go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x37f834d4 go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x3e1263d2 go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x65cfe080 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xb15a30dc go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xb2558392 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xbf3c6320 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xf10a4857 go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x25f3b939 pod_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x271faa59 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x4a44ce14 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x5a7783c2 variax_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0x557e5a38 me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0xb161625b me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0xd537ea18 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0x8d0fd431 me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0xc8d5831d me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x80991e88 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0x04797810 me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x9582cae0 me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0x76cb7d42 me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0x1cf5012f medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x00188219 ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x01417922 ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0294424c ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x082d0926 ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0bfdb568 ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0e774747 ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x139ff67c ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x14c14f9a IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x18973af5 ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x19d1184c ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x202bc90a ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x25dd2617 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2660608b ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x27399bb0 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2cdcacc1 ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x34cd1cbb SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x38040cf3 ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x397ac355 ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3ef001e5 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x49731da8 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4cf52382 ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6f107150 ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x721ad09a alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x81b42442 ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x856b5064 ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8e682190 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8ec48224 ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8f06f35f ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x93657322 ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9db84a6a ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9e5ce91a ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9e886087 ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa2ec2733 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa3ea3901 ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa718b80f ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa7907898 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa7d6a807 ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xadb97819 ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb36501b6 Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb7951c22 ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb844b140 ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb8f0c141 notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbda3c2bd ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc2a59aa7 ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc408c616 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc6e66442 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc8185568 free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc8e890bf ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc966c1a2 DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcbccef56 ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcdf51eec DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd419a3c5 ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe5be6733 ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe7595bb4 ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf545da62 HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf6265ad3 ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf7a463d4 Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf96bf2eb ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf9acbe8b RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xfe1e2ec5 Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x957c5012 ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xa6087655 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xd0ae4bf0 ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xdc42fb04 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xfc2f1439 ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0x353e681f ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x84d28da7 phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xf0b3e517 phone_register_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x1b975641 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x9541f7bf usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xb865794c net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x11d5d386 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x28cb0e8e usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2d0e4d09 usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x1622d0c2 lcd_device_register +EXPORT_SYMBOL drivers/video/backlight/lcd 0xb8216828 lcd_device_unregister +EXPORT_SYMBOL drivers/video/console/bitblit 0xdb2e341a fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0x57abb86c soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0xa992a116 fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x38a2d014 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x3b4609f5 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xac54f749 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0xbe302580 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/display/display 0x38a514dc display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0x7fbbf8be display_device_register +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x8e3f18cf mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x4a51b70a matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x516d9322 matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xa1e5e0dc g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x21de8ce4 DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x2fb06eef matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x5936e512 matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xae21d7f4 DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0xfb481153 matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x0d36b2b2 matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x2cfbe709 matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x79c82123 matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xba23b89c matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xe23157c6 matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x33a9d99d matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x52a8b3d0 matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0155b9fa matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0afe9c3d matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x27b80018 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x51be932b matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x60d654f4 matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/output 0x9c9ce032 video_output_register +EXPORT_SYMBOL drivers/video/output 0xde30a9e2 video_output_unregister +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x2aef0175 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x4a9574e8 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x64d7cab8 svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x82701716 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xa7ce2dd4 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xde815a22 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf46021b4 svga_settile +EXPORT_SYMBOL drivers/video/syscopyarea 0x76fdb095 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0xcb572c21 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x9c74dbb2 sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x321c3789 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x6cfe50e6 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1f7b99ce w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x6531ba53 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x92915f2c w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xbbd21ded w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x58e8c7c9 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xae472516 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xd705eea8 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xdeefab5d w1_remove_master_device +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x0c7c0b60 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x49125418 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x5359bd65 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0x54c651e8 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x57c136b1 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x6afccdc2 config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8521a594 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x8b619733 configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x90177e0a config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x942cbcf4 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xbae463e8 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xf8d22c55 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x0152e4d4 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0b4cc9a1 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x11e8ac6a fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x269bd6ef __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0x2fb2fae3 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x3731d257 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x415b8886 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x6408e81a fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x65841e66 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x684037c1 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x6faab07a fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x7dab2997 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7ff51389 __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x94a6686d fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x99110716 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x9a2a4e60 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xa680df13 fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xabe05083 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xacf6df59 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xb3b02786 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0xb90d6d78 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xba756d93 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xbadca130 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xbb94a8eb __fscache_write_page +EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533 nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4 nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/quota/quota_tree 0x11318fd8 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x29c033d3 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4fbf3e16 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x760a1d0f qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xf6b5cc65 qtree_release_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x33586e6d make_8023_client +EXPORT_SYMBOL net/802/p8023 0xa3c56be3 destroy_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0225010c p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x099acf80 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x152a7c6d p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x206695d7 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x244c6d40 p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x27b2ad54 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x362e26ec p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x40394bdc v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x488eca83 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x53b0f9fc p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x5c3980bb v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x5e0ef374 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x61852dea p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x6c5e479c p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x72e28336 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7bebbaaa p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x80ed639e p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x814b2716 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x9c5eed6e p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xb17e01a3 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0xbaa17b44 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0xd7636e5e p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe668e215 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0xe74cd0c2 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xfb523f64 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0xfb5ded90 p9_client_remove +EXPORT_SYMBOL net/appletalk/appletalk 0x2512cc0a atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0x5e524131 aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xc06f5c4f atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xc668ab37 alloc_ltalkdev +EXPORT_SYMBOL net/atm/atm 0x0c57aaed atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x0e6dfe39 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x55574ad1 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x6f97323a atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x91b2ccfe vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0xab9e36eb deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xd1189ef3 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xdef532d5 atm_charge +EXPORT_SYMBOL net/atm/atm 0xe92e61a0 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0xf22fa2dc vcc_release_async +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/atm/atm 0xf851382d register_atm_ioctl +EXPORT_SYMBOL net/ax25/ax25 0x07bf5fa5 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x0c9fb8ba ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x5c13685a ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x641feb68 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x85756587 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xb7dc97ad ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xc5f88258 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xcf7c8125 ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xdd6482d9 ax25_find_cb +EXPORT_SYMBOL net/bridge/bridge 0x71c9bd73 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x7e59e2f1 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xaf29de03 ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xf55eb2c4 ebt_unregister_table +EXPORT_SYMBOL net/can/can 0x3215e723 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x5bd9977f can_proto_register +EXPORT_SYMBOL net/can/can 0x6004e143 can_rx_register +EXPORT_SYMBOL net/can/can 0xcf6bb72a can_rx_unregister +EXPORT_SYMBOL net/can/can 0xebb71492 can_send +EXPORT_SYMBOL net/ieee802154/nl802154 0x1cae4fc2 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x1cd8df13 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x885b3ab2 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x918d3219 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xbbe6c8eb ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xe2ebbca6 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x61f34bee arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x856c9822 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb18420cf arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x02642fc9 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0c439942 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x85e0b2bf ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x15a84abb nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1f5519a6 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x60384df9 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xb3c5dcc2 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcfac42f8 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xdb04e12e nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xe08a205b nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xccaf2daa xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xe513fb95 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x141af83f ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x14c808bc ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x79449bcc ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x9fedcb49 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x768f3c76 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xc4f9abe7 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2aa255fc ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2ee4ab4a ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3747ca58 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x624dbb55 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x7a2c2303 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x958d986b ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xaacacb61 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xf0d52363 ircomm_data_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x16800e77 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0x1b5b5051 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x29e27d70 irlap_open +EXPORT_SYMBOL net/irda/irda 0x32fa042f async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x398c6f52 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4ca90c88 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x4f952dfd irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x571248fc async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x594a315f irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x5ba6b643 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x75f1820b irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x792f1e8a iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x899c8d79 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x8d47009f alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9a050555 proc_irda +EXPORT_SYMBOL net/irda/irda 0x9ac261ec irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xa0ca2c35 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0xa4742b13 irlap_close +EXPORT_SYMBOL net/irda/irda 0xaca3bb85 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xb5183548 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xd6deeaae irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd9195d5a irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xdbf11dad irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xdcd0536d iriap_open +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xe985a598 iriap_close +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf7979a3a irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xff9ef6bf irttp_dup +EXPORT_SYMBOL net/lapb/lapb 0x03da49fe lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x2a721271 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0x2cef177f lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x3a5883e5 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x7525e53d lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0xd5c3ceb9 lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0xd64c207c lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xde415d10 lapb_connect_request +EXPORT_SYMBOL net/mac80211/mac80211 0x0c6d6632 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x10243f35 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x2782f849 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x324481e4 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x38bd7c41 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x3e7a2efe ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x49009492 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x4afe31d8 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x4f80acdc ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x52c1d617 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x5330f169 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x5c046e3f ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x5f989fe7 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x606f8274 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x67119639 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x69520fdc ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x872a99f2 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x93893298 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x94be8534 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x9641e951 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x9804db53 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x9b8784c9 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xb24501f9 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xb94e0bef __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xbccd25b8 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xc6dd7e67 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xcc578371 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xd12077a0 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xd52b059c ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xd5e2ca98 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xd75131d4 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xdabfbd96 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xdb680794 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xde7e88d3 ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xe4c3bff7 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xf1cc5a3c ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf8ff2f82 ieee80211_wake_queues +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x021fba9b register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0ccd3082 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2a6e8718 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x36400e07 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5be8ab87 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x624618e3 unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7a6dfcf1 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb8fc3c8b ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc9e483da unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfdc0148a ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xff151d91 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x137cfbcd __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xbc01002b __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe69cb295 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x05294983 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x10e1a1fa xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x30f656f5 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x346ea44c xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x38e34d61 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x3a7ccfbc xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x49472e0e xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x6c69cec6 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x86ff53e3 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x9571b252 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/phonet/phonet 0x06054541 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x16572db6 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x34e95d41 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x55d65f37 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x67e9b0e7 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x91585dc6 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xc29aa9dd phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0xd3bf4a0f pn_sock_hash +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2604b947 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2679f57c rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2a8bc2f0 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2f2259a5 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x474ebc71 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4be3bb7b rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x74526c89 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x95bba360 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xae869fa9 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb26d1148 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb76aec0b rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb81a3b6d rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdb603fb0 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe5034445 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf67e9957 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/sunrpc/sunrpc 0x46e4c378 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x05ca5a1b tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1164190b tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x6a3ad296 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x7b0bb8a6 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x839e728a tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x94d83d9d tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x95f0cf99 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x9b0fa48b tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa05ddea9 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xc4a70029 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe3471671 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0xc2ed2b89 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0xb7985de3 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xc17fa817 wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x025b2a93 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x127922e0 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x12946f6c cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1a2eb3d2 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x3be468df ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x41f3b874 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x51051a63 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x5717f087 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x599bf143 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x59c4800b ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x5bf79f96 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x65531e1b wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6dfefa1b wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x730d1eec cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x7e0c1136 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x8bfc51aa cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x960447a3 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0xa3423479 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xa5d1185b cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xb4f1fa49 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0xb6177402 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xb67dfd6c cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0xc029a0dd cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xcb21584d cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xccc3806e wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0xcf306189 ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd51623ef wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0xf4829ef6 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xf7899d10 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xff896c87 regulatory_hint +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a76af96 lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x5de7e112 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xa64a90a9 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0xa995fd94 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xb2a45ef9 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xbbe2eeff lib80211_unregister_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xf5bfaae9 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0xfcfcf81e lib80211_crypt_info_free +EXPORT_SYMBOL sound/ac97_bus 0xbd1359e7 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x368fc5a9 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x01667c3b snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7babbc84 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xc7170229 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe93c3af6 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xa6d29db0 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xbcce9c73 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x56f78d9e snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x015f806c snd_jack_new +EXPORT_SYMBOL sound/core/snd 0x05cdc7c0 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x20fdb137 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x237e6dc3 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x24c99377 snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x252a1066 snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x27acaf0e snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x27dc7a13 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x36ceb489 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3e6305ef snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x417fcbc8 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x4460b202 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4b1744c2 snd_cards +EXPORT_SYMBOL sound/core/snd 0x4f9cc2be snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x5e43764f snd_device_free +EXPORT_SYMBOL sound/core/snd 0x6040f195 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x618a17ba snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x662f8977 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x66c716b8 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x6f4b7329 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x765efc1d snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x85ab0c0d snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x927c044b snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x928abdb7 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x94dac5a9 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x9f13baf1 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xa2992781 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0xa4c1c7e1 snd_device_new +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb6b1b27f snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xbfdda27d snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0xc476f161 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0xc99e4191 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0xd200f83e snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xd31a766d snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0xd3a850e9 snd_card_register +EXPORT_SYMBOL sound/core/snd 0xd5af121e snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0xd64ae5df snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xdab65878 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xdae80e0b snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe44ca59a snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xef7baff5 snd_device_register +EXPORT_SYMBOL sound/core/snd 0xf0d948fb snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0xf263dcb6 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0xf75e9524 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0xf8d5b38e snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xf93696ff snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xfb2b791a snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd-hwdep 0x7c157067 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x44667495 snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x786cefa7 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb748114f snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xcf8eb73b snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xf8e606dc snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1e86bf25 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0x21179763 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x22ee837e snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x22f34eb8 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x29270d30 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x30291ae1 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x30435831 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x309f4917 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3a85f702 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x3ad341ec snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x3c046fcf snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x47284f42 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x4a4a641c snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x4a663b60 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x4cf1ade0 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x4d359a9c snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x5051498d snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5b303b35 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x62ca4e45 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x690f321e snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x6c56ba1a snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x6ca2f895 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x6e228e01 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x807491f5 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x87546290 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x88b45bc6 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8a0df210 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xa495150e snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xab1021d6 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xad959032 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xb26b0bf6 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xbf6a22cd snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd04bb9f6 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd9790302 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xdbf3d4d4 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xf342cf6d snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xfa98d195 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xfb3e504f snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xfd9505f9 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x018b65c9 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0x27296196 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x36162a51 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4747e151 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4ac6e8ed snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5b13c565 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x74d061d4 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7f0b2103 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa4af560b snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xad8fb790 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaed45822 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb40fa7f4 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd194c47f snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd61e0fc6 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd67e4da1 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf8fdbbd1 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0xfaf2a450 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-timer 0x11f10cf7 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x17314e04 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x52dfa815 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x7fcb9115 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x8f33f6e3 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x92943cce snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0xa25cf418 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xa4c95b31 snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0xcd56ad4e snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xd6247b88 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xdfc18c56 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xee0b57cf snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xf19619c8 snd_timer_open +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xf270faee snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x19e06213 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1aa9f030 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3feee8b4 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x486b46cf snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4c173a6a snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4f5d5705 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x71ad82f1 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7ad4cce9 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8a5989a7 snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0205dc71 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1f33777a snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x31f69e2c snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3b420caf snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6062d1ed snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x996f103e snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xda39997c snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xdd86e1bf snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xee022dca snd_vx_setup_firmware +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x09388f12 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1a894e17 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1e984c09 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x6f12199e snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x84ecf5ac snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xe9b0c05b snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x02ac5308 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x503aa32a snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc1fa2fea snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc3988155 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcc496183 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfa31389b snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x3ada408b snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xaaec6fe1 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xdef2cafc snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xee9fadf0 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xd55e15c8 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xd81a39a8 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x6cd6713f snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xa9d9b67b snd_tea575x_init +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0407b6d6 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x07ffec87 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x138437f4 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x6d7b3973 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc951bf05 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-i2c 0x3231dc32 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x8747cafc snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x971fd404 snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x9b3598ce snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xb9622da9 snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xea683bc9 snd_i2c_device_free +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x10c49455 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x2c5492ce snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x64b37291 snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8b23f1da snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8f027e63 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xb7b0f913 snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc34087a8 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdc8c1b67 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xeb4b1a5b snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xfe6f64b5 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x1b58e955 snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x45b4f11c snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa1bbd17f snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x55262c70 probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x755cd667 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb81a0372 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x3af05150 attach_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4 probe_mpu401 +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x4d9379dc probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sb_lib 0xf95c4f32 sb_dsp_init +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x95bc2447 sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a786241 sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xc9a14b05 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd0567938 synth_devs +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdae1cedf sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf53992dc audio_devs +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfb378aea midi_devs +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0xc012ec38 probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x04f8b425 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x260a755a snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x416d418d snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x43dddbd3 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x45498043 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x462150a7 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4ae761a5 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x622fe4cb snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7301b2f3 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7ce50636 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9790105e snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd658ebd9 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd8c5694b snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdd37dc29 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xed7f4099 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xef427cc5 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf44f540e snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x054b409c snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x124ac785 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x14b5a171 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2c21ae39 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x366f41fe snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x60168b27 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x61af017a snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc3f59d09 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xdab3a1ac snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x6a0a4dc9 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x043c7572 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xc8124a3e snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xd5f96377 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x0157319b oxygen_reset_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1385fd8c oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1d11ff3e oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x21175df8 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x37732062 oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x393408c3 oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x4677eb34 oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5835d1c6 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7ffe128a oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x843e19f3 oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x849af41c oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8c5613b3 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xabfec8a8 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xae22125c oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb7273942 oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xdbc79098 oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe17ae666 oxygen_write32_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xeaa452b6 oxygen_pci_probe +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf9c8eaa8 oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfb3181e7 oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x259757d9 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x3374b60a snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x52c452a8 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x684391e9 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9cbbd59b snd_trident_free_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xa569f193 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x1537b6c0 sound_class +EXPORT_SYMBOL sound/soundcore 0x15aa2370 register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x33325920 register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x6172403f register_sound_special +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0x9c9ebdc3 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xc8f73034 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x19cd53e2 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7c2c7719 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7d53a2a3 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xaf7bcb7b snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb8b72ee5 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd5149e4c snd_emux_register +EXPORT_SYMBOL sound/synth/snd-util-mem 0x014ff605 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x045cee77 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x20297089 snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x336056fc __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x75e2cdf4 __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x7c57a9d1 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0xa545e8aa snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xddb2be64 __snd_util_mem_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xa0e77939 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x26ee19b1 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2f9588b3 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2faffdcb dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x4ce6d916 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x831c2a04 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x959e221f dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x17146a31 lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x1c06f0a3 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00088b23 textsearch_register +EXPORT_SYMBOL vmlinux 0x000ff023 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x0025cb03 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x005e15aa pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0x006d109b agp_generic_enable +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00875e87 blk_requeue_request +EXPORT_SYMBOL vmlinux 0x008de467 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00a0937b generic_make_request +EXPORT_SYMBOL vmlinux 0x00af456d fget +EXPORT_SYMBOL vmlinux 0x00af8f3a bio_copy_user +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00d0f6c0 bdget +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x010b0833 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x013b2f31 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x014eb523 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x0153c702 dquot_commit_info +EXPORT_SYMBOL vmlinux 0x01547df6 tty_mutex +EXPORT_SYMBOL vmlinux 0x0169f11d pci_request_region +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x0190d483 bio_alloc +EXPORT_SYMBOL vmlinux 0x01a09483 generic_setxattr +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01af0db0 generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x01cca249 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01d40893 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x020c3950 eth_validate_addr +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x0212d96e textsearch_destroy +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x023932ee hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0x0240edfd bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x026f9f6e sk_common_release +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x03052356 pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x03077123 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x03183828 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x03453cd1 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x036d6ce5 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x039177e3 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x0398866f setup_new_exec +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c14c66 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x0432b9fb set_pages_nx +EXPORT_SYMBOL vmlinux 0x043f7599 tcf_action_exec +EXPORT_SYMBOL vmlinux 0x044bfa0a proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0457516c d_alloc +EXPORT_SYMBOL vmlinux 0x0481f064 tty_shutdown +EXPORT_SYMBOL vmlinux 0x048454dc kobject_del +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04b59585 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x04ba1ae1 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x04c6ec40 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x04cd8e42 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x04d073c5 get_io_context +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x04f872dd file_permission +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x053f7d81 read_cache_pages +EXPORT_SYMBOL vmlinux 0x054252ba tty_port_close_start +EXPORT_SYMBOL vmlinux 0x054adb69 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x055c8cd9 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x05698f46 bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0x057fbf6f blk_plug_device +EXPORT_SYMBOL vmlinux 0x05b15d6c request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x05bd4132 sg_miter_next +EXPORT_SYMBOL vmlinux 0x05d0ee69 md_done_sync +EXPORT_SYMBOL vmlinux 0x05dd075a pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x05e28d43 __first_cpu +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x06183886 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x06222b79 proc_symlink +EXPORT_SYMBOL vmlinux 0x064cbf31 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x06784f45 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x067a1394 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x067e1817 key_put +EXPORT_SYMBOL vmlinux 0x068c7263 ioremap_cache +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06cc1551 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x06cee812 elv_rb_del +EXPORT_SYMBOL vmlinux 0x06d43947 dm_table_event +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06f230c0 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x06fca151 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x0729df0c __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x072e5734 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x073bcf65 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x07621a4e ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x07649854 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x076dbe38 dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0x07736378 tcp_close +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07dc26d7 journal_wipe +EXPORT_SYMBOL vmlinux 0x08118e43 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x086a5bd4 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x088c03e9 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x08c598f4 nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08dfb52d tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x08e67e9a ilookup5 +EXPORT_SYMBOL vmlinux 0x090ebde5 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x0918bedf vfs_mkdir +EXPORT_SYMBOL vmlinux 0x092b793c consume_skb +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x093d649a blk_unplug +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x0962dd55 pci_restore_state +EXPORT_SYMBOL vmlinux 0x0976eea6 pci_dev_get +EXPORT_SYMBOL vmlinux 0x098431ba acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x099e600e lock_may_write +EXPORT_SYMBOL vmlinux 0x09a6da6e blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x09bbfa32 compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x0a0d6589 blk_fetch_request +EXPORT_SYMBOL vmlinux 0x0a14fb32 blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a4170c5 freeze_bdev +EXPORT_SYMBOL vmlinux 0x0a9611c0 tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x0ab98197 lookup_one_len +EXPORT_SYMBOL vmlinux 0x0abdce65 request_firmware +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0af6869c nobh_write_begin +EXPORT_SYMBOL vmlinux 0x0b08fdaf dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b250b34 have_submounts +EXPORT_SYMBOL vmlinux 0x0b4e8f4b pv_mmu_ops +EXPORT_SYMBOL vmlinux 0x0b60cfc3 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0bd57e72 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x0be57d56 netlink_ack +EXPORT_SYMBOL vmlinux 0x0c1a7b6a mmc_release_host +EXPORT_SYMBOL vmlinux 0x0c31ab0a block_write_begin +EXPORT_SYMBOL vmlinux 0x0c35337a mmc_align_data_size +EXPORT_SYMBOL vmlinux 0x0c59f814 scsi_device_resume +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca7b7a8 acpi_check_region +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cdfa9d9 bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x0ce1f2de iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x0d1b5b45 tcp_prot +EXPORT_SYMBOL vmlinux 0x0d212644 serio_rescan +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d35ab40 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x0d36664c generic_removexattr +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d6a4b18 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x0d72c055 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x0d79c0fc skb_recycle_check +EXPORT_SYMBOL vmlinux 0x0d7bcf18 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0db00232 per_cpu__x86_cpu_to_node_map +EXPORT_SYMBOL vmlinux 0x0dbe0d05 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x0dcdb6f2 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0x0e0252ec downgrade_write +EXPORT_SYMBOL vmlinux 0x0e0db802 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x0e224870 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0x0e305da9 eth_type_trans +EXPORT_SYMBOL vmlinux 0x0e475eae pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x0e51dacd __netif_schedule +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e9efc19 cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0x0ed9824b blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x0ed9bfd5 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x0ef91d73 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x0f0b00e5 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f2c0bbd request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x0f4a5448 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x0f7cef21 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x0f8ce789 compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x0fb28106 acpi_root_dir +EXPORT_SYMBOL vmlinux 0x0fb9595e compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x0fc20dae do_munmap +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x0fcf312f simple_sync_file +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x1004bff7 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x1071ff86 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x1072a394 csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x10851abe ps2_handle_response +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10976d7d nf_register_hook +EXPORT_SYMBOL vmlinux 0x10e3333c unregister_8022_client +EXPORT_SYMBOL vmlinux 0x10eb651b call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10f2caee tty_check_change +EXPORT_SYMBOL vmlinux 0x10f3c974 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x11227b1f ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x112f078a __mutex_init +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x11528012 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x11539fb0 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x115b4afc generic_ro_fops +EXPORT_SYMBOL vmlinux 0x1161d073 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x1179d0eb dev_gro_receive +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11d6f7a7 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x11dab346 __down_read +EXPORT_SYMBOL vmlinux 0x11e2b038 agp_free_page_array +EXPORT_SYMBOL vmlinux 0x11eff057 rfkill_set_states +EXPORT_SYMBOL vmlinux 0x12198e80 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x121a895d phy_register_fixup +EXPORT_SYMBOL vmlinux 0x1229567e set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x123b713c call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x1256419d hci_register_cb +EXPORT_SYMBOL vmlinux 0x127ddbbc dm_exception_store_create +EXPORT_SYMBOL vmlinux 0x12cbd30a try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x12ed9ca7 bdi_register +EXPORT_SYMBOL vmlinux 0x12f04bfa md_write_start +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x12f516a0 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x130d9321 scsi_host_get +EXPORT_SYMBOL vmlinux 0x1340cee3 force_sig +EXPORT_SYMBOL vmlinux 0x135755c5 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x136f62c0 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x138a78d1 set_current_groups +EXPORT_SYMBOL vmlinux 0x13a289ef phy_device_register +EXPORT_SYMBOL vmlinux 0x13b53ef5 dm_io +EXPORT_SYMBOL vmlinux 0x13b79b56 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x13b8f169 set_pages_uc +EXPORT_SYMBOL vmlinux 0x13c84a9d iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x13d6b0f7 xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0x13eb0703 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x13f6185e tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x140604a4 journal_extend +EXPORT_SYMBOL vmlinux 0x142242df pci_pme_capable +EXPORT_SYMBOL vmlinux 0x1430ba93 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x14391944 __rta_fill +EXPORT_SYMBOL vmlinux 0x143d6e2e igrab +EXPORT_SYMBOL vmlinux 0x144f3de4 mpage_writepage +EXPORT_SYMBOL vmlinux 0x14525db8 seq_open_private +EXPORT_SYMBOL vmlinux 0x1479600b llc_add_pack +EXPORT_SYMBOL vmlinux 0x1485f2ea compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x1488cb94 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14c3f92c vfs_quota_off +EXPORT_SYMBOL vmlinux 0x14c777c9 udp_ioctl +EXPORT_SYMBOL vmlinux 0x14d27b5b hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x14d38d02 __bio_clone +EXPORT_SYMBOL vmlinux 0x14dcdd14 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x151ffadc phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x156b58ea default_file_splice_read +EXPORT_SYMBOL vmlinux 0x15ca3a87 simple_link +EXPORT_SYMBOL vmlinux 0x15d62903 sk_release_kernel +EXPORT_SYMBOL vmlinux 0x15e714e0 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x16046531 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x161038c0 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x16330b9c audit_log_start +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x16464ad8 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x164bd779 set_pages_array_wb +EXPORT_SYMBOL vmlinux 0x1675606f bad_dma_address +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x16a0c192 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16be535d page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x1720af78 __kill_fasync +EXPORT_SYMBOL vmlinux 0x17373954 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x17437c44 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0x17c1c618 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x17c6d30f bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17caa43e tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17f1fc17 jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x17f81bff tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x17fe75f5 input_free_device +EXPORT_SYMBOL vmlinux 0x1815a2de __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x1816a453 d_find_alias +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x18226912 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1846b1cb mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x1857353d default_llseek +EXPORT_SYMBOL vmlinux 0x185a68d5 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x18671e54 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x1871decd register_chrdev +EXPORT_SYMBOL vmlinux 0x1882ba6d kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x1891adbb thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18b555e6 rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x18c0e3d4 da903x_query_status +EXPORT_SYMBOL vmlinux 0x18e627c1 journal_load +EXPORT_SYMBOL vmlinux 0x191c743e dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x19286a3a gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x1935e717 pipe_lock +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x193e2011 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x194df9bc __nla_put +EXPORT_SYMBOL vmlinux 0x195e0cd4 bh_submit_read +EXPORT_SYMBOL vmlinux 0x195f99a4 inet6_bind +EXPORT_SYMBOL vmlinux 0x19765181 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x1981557c netif_rx +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19c21d19 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x1a24057d bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x1a2e107c swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x1a36e03c dev_disable_lro +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4bced2 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a502d32 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1a9405d1 phy_attach +EXPORT_SYMBOL vmlinux 0x1a94104c dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x1ab64042 simple_write_end +EXPORT_SYMBOL vmlinux 0x1acd4ea9 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1adbac4e pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0de617 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0x1b18f593 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x1b32be93 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x1b3ab089 request_key_async +EXPORT_SYMBOL vmlinux 0x1b414a54 vfs_link +EXPORT_SYMBOL vmlinux 0x1b519521 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x1b53121f sync_inode +EXPORT_SYMBOL vmlinux 0x1b54cdb8 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bdc5d82 set_pages_wb +EXPORT_SYMBOL vmlinux 0x1c0bdc54 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x1c0dd4ed con_copy_unimap +EXPORT_SYMBOL vmlinux 0x1c3eaa78 proc_mkdir +EXPORT_SYMBOL vmlinux 0x1c7350c4 nla_append +EXPORT_SYMBOL vmlinux 0x1c7db764 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c998d67 devm_free_irq +EXPORT_SYMBOL vmlinux 0x1ca85676 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x1cad814c inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0x1cbea2fc dev_remove_pack +EXPORT_SYMBOL vmlinux 0x1cc49266 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1ce38c28 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x1ce4ee4e cfb_copyarea +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1d0716b6 sk_stream_error +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30d123 ppp_register_compressor +EXPORT_SYMBOL vmlinux 0x1d413834 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x1d64125a inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x1d7a9587 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0x1d9d39f2 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x1da16d7b hci_conn_security +EXPORT_SYMBOL vmlinux 0x1db7706b __copy_user_nocache +EXPORT_SYMBOL vmlinux 0x1dbd3fa6 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dc96325 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x1dd416f8 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1dde89ec register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x1de12374 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x1e0a8d3a journal_init_dev +EXPORT_SYMBOL vmlinux 0x1e0c2be4 ioremap_wc +EXPORT_SYMBOL vmlinux 0x1e2e427f cpumask_next_and +EXPORT_SYMBOL vmlinux 0x1e34f52f dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x1e523046 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1eaec4d3 kern_path +EXPORT_SYMBOL vmlinux 0x1ec4c4a5 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x1eebd4a7 ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f1146fe mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f8f9264 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x1fa10ce8 ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0x1fa33490 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x1fc3ef56 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x1ffb77e8 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x1fffa345 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2000628d qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x20092385 acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x202ca479 acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0x2036334f misc_deregister +EXPORT_SYMBOL vmlinux 0x206a0992 inode_init_once +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x2096e9aa fb_find_mode +EXPORT_SYMBOL vmlinux 0x20bac0fb blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x20cd0f99 i2c_use_client +EXPORT_SYMBOL vmlinux 0x20dabbf4 skb_queue_head +EXPORT_SYMBOL vmlinux 0x20eadeb6 ip_compute_csum +EXPORT_SYMBOL vmlinux 0x20f9322a idr_pre_get +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x21577995 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2179270b sock_wake_async +EXPORT_SYMBOL vmlinux 0x2190fda5 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x21aeb220 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x21b1f238 ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21dd6947 blkdev_get +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21e5679c copy_user_generic +EXPORT_SYMBOL vmlinux 0x21e9885c unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x21f8e105 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x221096e7 vfs_rename +EXPORT_SYMBOL vmlinux 0x22165e4c nf_log_register +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2252f293 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x225b11c8 security_path_mkdir +EXPORT_SYMBOL vmlinux 0x226af694 arp_find +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x2296467f seq_write +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22bfdbb4 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x22d3a64b blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x2308cf7f input_filter_device +EXPORT_SYMBOL vmlinux 0x23096b6c xfrm_register_type +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2340ea02 mmc_remove_host +EXPORT_SYMBOL vmlinux 0x2343abd7 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x234a055d blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x235f5a73 follow_down +EXPORT_SYMBOL vmlinux 0x2363a90d inet_select_addr +EXPORT_SYMBOL vmlinux 0x236c8c64 memcpy +EXPORT_SYMBOL vmlinux 0x236ea625 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x23825112 set_binfmt +EXPORT_SYMBOL vmlinux 0x23a76d38 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x23b99e92 node_states +EXPORT_SYMBOL vmlinux 0x23c17c7b poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23d0c942 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x23d2556f pci_release_region +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x240140d0 proc_create_data +EXPORT_SYMBOL vmlinux 0x2401effb register_qdisc +EXPORT_SYMBOL vmlinux 0x240e9d4e dev_open +EXPORT_SYMBOL vmlinux 0x2427bedd vmap +EXPORT_SYMBOL vmlinux 0x242e64d5 inode_init_always +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x24524768 pci_clear_master +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x246224ca filemap_fault +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x24754344 phy_device_create +EXPORT_SYMBOL vmlinux 0x249c16f1 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x24c6681a xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x251de56f dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x252505fd bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x253f3a7f sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x255a5433 __destroy_inode +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x258433e4 path_put +EXPORT_SYMBOL vmlinux 0x25949746 __devm_request_region +EXPORT_SYMBOL vmlinux 0x25b65897 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x25e4ab71 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x25ec1b28 strlen +EXPORT_SYMBOL vmlinux 0x25f36864 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x26130c67 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x26275517 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x2653f8b0 sk_wait_data +EXPORT_SYMBOL vmlinux 0x26656044 __breadahead +EXPORT_SYMBOL vmlinux 0x2676a653 bdget_disk +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x2685c3d7 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x2691eea6 skb_copy +EXPORT_SYMBOL vmlinux 0x26a35cc4 scsi_register +EXPORT_SYMBOL vmlinux 0x26c92f53 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x26e65284 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x270e629d phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x2714ebbe cdev_index +EXPORT_SYMBOL vmlinux 0x27192e29 single_open +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272aa387 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x2731d014 __nla_reserve +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x2757ff17 swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c33efe csum_ipv6_magic +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27cd6406 dquot_transfer +EXPORT_SYMBOL vmlinux 0x27f58db1 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x280ca537 blk_end_request +EXPORT_SYMBOL vmlinux 0x28481185 find_vma +EXPORT_SYMBOL vmlinux 0x285111c3 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x285135e6 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x285282b9 inet_register_protosw +EXPORT_SYMBOL vmlinux 0x285954b5 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x288b75af blk_run_queue +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28c24211 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0x28e3a729 dev_alloc_name +EXPORT_SYMBOL vmlinux 0x28e53869 sock_no_getname +EXPORT_SYMBOL vmlinux 0x28f1c988 mdiobus_write +EXPORT_SYMBOL vmlinux 0x29330ffb block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x294b54a5 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29560e6f nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x297f807e send_sig_info +EXPORT_SYMBOL vmlinux 0x298cdd38 take_over_console +EXPORT_SYMBOL vmlinux 0x2995b370 put_tty_driver +EXPORT_SYMBOL vmlinux 0x29a5540b hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x29b29018 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a3c0a23 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x2a50296a pnp_device_detach +EXPORT_SYMBOL vmlinux 0x2a7e2f75 mutex_trylock +EXPORT_SYMBOL vmlinux 0x2a810aae xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x2a8dea94 put_mnt_ns +EXPORT_SYMBOL vmlinux 0x2a9b9cf8 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x2aa220fd netif_receive_skb +EXPORT_SYMBOL vmlinux 0x2ad3e66b tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x2ae7338b serio_unregister_port +EXPORT_SYMBOL vmlinux 0x2aea1713 sock_no_bind +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2b032869 rfkill_alloc +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b0dc55a tcf_hash_create +EXPORT_SYMBOL vmlinux 0x2b188eec inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x2b26b605 dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0x2b3aca82 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x2b3b6c94 pci_read_vpd +EXPORT_SYMBOL vmlinux 0x2b7bddbf tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bb129f6 filp_open +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bbdff04 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x2bf6c5a8 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x2bf70efc __page_cache_alloc +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c0c8fc0 llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x2c35acbf vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x2c53da1f pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2cb0adab swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0x2d3924d8 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x2d3f06ab skb_copy_bits +EXPORT_SYMBOL vmlinux 0x2d5528c9 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x2d572a36 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x2d68069d inet_frag_find +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2dbafbe3 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0x2dc2f619 dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2e06111d cpu_present_mask +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e2f1e05 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x2e465263 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e4ad446 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x2e63696a xfrm_state_update +EXPORT_SYMBOL vmlinux 0x2e683ebd unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x2e69898d arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0x2e8626e8 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x2e897b6e tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x2e97a729 idr_remove +EXPORT_SYMBOL vmlinux 0x2e987dc7 tcf_hash_check +EXPORT_SYMBOL vmlinux 0x2e9db737 km_new_mapping +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ed59253 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x2ef509db blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x2f1b0bcc elv_add_request +EXPORT_SYMBOL vmlinux 0x2f8aa1c5 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x2f8ddd85 agp_generic_mask_memory +EXPORT_SYMBOL vmlinux 0x2fa5a500 memcmp +EXPORT_SYMBOL vmlinux 0x2fb3c6c7 netif_device_attach +EXPORT_SYMBOL vmlinux 0x2fd02ed4 bio_unmap_user +EXPORT_SYMBOL vmlinux 0x2fd05e0f security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x2ff063b5 acpi_get_name +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x30226ddf agp_device_command +EXPORT_SYMBOL vmlinux 0x302f1c59 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x3034a595 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0x3057fc5f bioset_create +EXPORT_SYMBOL vmlinux 0x306cde9c filp_close +EXPORT_SYMBOL vmlinux 0x30748884 rfkill_register +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30a61650 elevator_init +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30ef9e7e bio_integrity_split +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310f31da revalidate_disk +EXPORT_SYMBOL vmlinux 0x311952c1 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x316435fa ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x317abe1c vfs_write +EXPORT_SYMBOL vmlinux 0x3184c88d netpoll_print_options +EXPORT_SYMBOL vmlinux 0x318b4a2c mutex_lock +EXPORT_SYMBOL vmlinux 0x319ee080 lookup_hash +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31c3586f scsi_ioctl +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31ebadcd in_group_p +EXPORT_SYMBOL vmlinux 0x31ece21b inet6_release +EXPORT_SYMBOL vmlinux 0x31f35874 iget_failed +EXPORT_SYMBOL vmlinux 0x32214a4e kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x324af20c jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x3250973d open_by_devnum +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x329f192c scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x32a968c1 blkdev_put +EXPORT_SYMBOL vmlinux 0x32b9dc6c __put_cred +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x32d52eef kill_pid +EXPORT_SYMBOL vmlinux 0x32d80db9 get_user_pages +EXPORT_SYMBOL vmlinux 0x33196ea4 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x332695f3 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x333d0cdd neigh_update +EXPORT_SYMBOL vmlinux 0x33545aee km_state_expired +EXPORT_SYMBOL vmlinux 0x336e9868 lro_receive_skb +EXPORT_SYMBOL vmlinux 0x33876e1f cdev_del +EXPORT_SYMBOL vmlinux 0x33a430e7 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x33a9fab5 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x33b6bdd9 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0x33b84f74 copy_page +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x340e7679 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x344b7f2c jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x34882896 inode_setattr +EXPORT_SYMBOL vmlinux 0x349a3fe7 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34fc081c tcp_parse_options +EXPORT_SYMBOL vmlinux 0x35074e77 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x3511341d dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x3555524f blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x355b8931 input_register_handle +EXPORT_SYMBOL vmlinux 0x3565496b inet_frag_kill +EXPORT_SYMBOL vmlinux 0x356b57ac sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x3582ed17 vfs_stat +EXPORT_SYMBOL vmlinux 0x35879eca textsearch_prepare +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35b46a72 cdrom_release +EXPORT_SYMBOL vmlinux 0x35bbd111 lock_may_read +EXPORT_SYMBOL vmlinux 0x35be4c4c scsi_finish_command +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x361ce5a9 __invalidate_device +EXPORT_SYMBOL vmlinux 0x3629d321 pci_select_bars +EXPORT_SYMBOL vmlinux 0x3635da9f tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x3648c4aa dump_trace +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36c12ab1 __elv_add_request +EXPORT_SYMBOL vmlinux 0x36da5af9 sock_no_listen +EXPORT_SYMBOL vmlinux 0x36fc8b80 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x3701a196 csum_partial_copy_to_user +EXPORT_SYMBOL vmlinux 0x37127299 rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x3714f448 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x371ae609 agp_bridge +EXPORT_SYMBOL vmlinux 0x372a2168 tty_hangup +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x379c9195 journal_stop +EXPORT_SYMBOL vmlinux 0x37a1ae7c save_mount_options +EXPORT_SYMBOL vmlinux 0x37bb81b3 unlock_super +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37cb108e dquot_drop +EXPORT_SYMBOL vmlinux 0x37cbcf64 bio_put +EXPORT_SYMBOL vmlinux 0x37dac89e scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x37ddde7f tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x37e9be37 generic_file_llseek +EXPORT_SYMBOL vmlinux 0x37f28544 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x38056727 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x380e0f8a sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x38123ae0 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x38167680 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x385408f2 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x3873b1f7 pneigh_lookup +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38e0fe8a scm_detach_fds +EXPORT_SYMBOL vmlinux 0x38e5deca xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x38f33bed dump_fpu +EXPORT_SYMBOL vmlinux 0x39477147 pci_remove_bus +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39a608b4 pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x39a62163 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x39afdb1a jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39cd891a __down_write_trylock +EXPORT_SYMBOL vmlinux 0x39d10ba3 block_sync_page +EXPORT_SYMBOL vmlinux 0x39dfed4e hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x39fc2336 input_flush_device +EXPORT_SYMBOL vmlinux 0x39fd20a0 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x3a053dd3 mmc_resume_host +EXPORT_SYMBOL vmlinux 0x3a1953cc wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3fa5e2 key_alloc +EXPORT_SYMBOL vmlinux 0x3a95b6f0 block_write_full_page +EXPORT_SYMBOL vmlinux 0x3a9a69e5 qdisc_reset +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3aa8e5c6 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x3ab8f6b4 skb_dma_map +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3aeb53b4 bt_sock_register +EXPORT_SYMBOL vmlinux 0x3b082696 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x3b0bb788 brioctl_set +EXPORT_SYMBOL vmlinux 0x3b148191 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b378efc __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x3b599304 give_up_console +EXPORT_SYMBOL vmlinux 0x3b67cbbf __init_rwsem +EXPORT_SYMBOL vmlinux 0x3b8f1560 key_type_keyring +EXPORT_SYMBOL vmlinux 0x3b927d85 wireless_send_event +EXPORT_SYMBOL vmlinux 0x3ba1f0be md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0x3ba9302f gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x3bb2e55a udp_proc_register +EXPORT_SYMBOL vmlinux 0x3bc9732f thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3beda582 napi_complete +EXPORT_SYMBOL vmlinux 0x3c0ea694 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x3c171bb5 fddi_type_trans +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c398949 find_inode_number +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca0763f journal_clear_err +EXPORT_SYMBOL vmlinux 0x3ca4d3c2 mpage_readpage +EXPORT_SYMBOL vmlinux 0x3ca830c5 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cebd2a9 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x3d1fcfde blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x3d27ca26 load_nls +EXPORT_SYMBOL vmlinux 0x3d2e5a02 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x3d3e785a task_nice +EXPORT_SYMBOL vmlinux 0x3d4852f7 serio_interrupt +EXPORT_SYMBOL vmlinux 0x3d59118c bitmap_unplug +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3d8975dd tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x3d9ee9f0 clear_page +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3da974ae uart_match_port +EXPORT_SYMBOL vmlinux 0x3db108e3 dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0x3db28480 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3dbdfa32 file_update_time +EXPORT_SYMBOL vmlinux 0x3dfb3060 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x3e02ec3c __seq_open_private +EXPORT_SYMBOL vmlinux 0x3e05032d pci_get_class +EXPORT_SYMBOL vmlinux 0x3e053582 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e267591 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e39c85c splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x3e3eac46 register_cdrom +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e4df3fa ht_create_irq +EXPORT_SYMBOL vmlinux 0x3e6a88c5 ppp_input_error +EXPORT_SYMBOL vmlinux 0x3e7c38f1 ip_defrag +EXPORT_SYMBOL vmlinux 0x3e809534 scsi_prep_return +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3ecb6d1a tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ed8344b kill_pgrp +EXPORT_SYMBOL vmlinux 0x3ee42de1 bdi_unregister +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f0b550d sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f2fa2c0 blk_recount_segments +EXPORT_SYMBOL vmlinux 0x3f452d90 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f4fddb5 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x3f5313f5 journal_forget +EXPORT_SYMBOL vmlinux 0x3f71412b pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3fbe2fd6 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x3fe8ee20 iunique +EXPORT_SYMBOL vmlinux 0x3fec048f sg_next +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x4000645a mnt_pin +EXPORT_SYMBOL vmlinux 0x4001e241 skb_make_writable +EXPORT_SYMBOL vmlinux 0x4003cece pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x400de476 pskb_expand_head +EXPORT_SYMBOL vmlinux 0x401b2c9a key_payload_reserve +EXPORT_SYMBOL vmlinux 0x4025a1b2 mdiobus_read +EXPORT_SYMBOL vmlinux 0x403ccde0 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x4043c29c sock_i_ino +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40b0a72b kthread_stop +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x40db5fa8 registered_fb +EXPORT_SYMBOL vmlinux 0x40e82ce8 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x40eea388 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x40efcc58 ppp_register_channel +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4106367e pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x410957bd misc_register +EXPORT_SYMBOL vmlinux 0x410b2c2a security_inode_init_security +EXPORT_SYMBOL vmlinux 0x41107ce6 compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41293379 xfrm_state_add +EXPORT_SYMBOL vmlinux 0x412fc296 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x41316039 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x4143407c dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x414cd7f7 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x41667c60 genl_register_ops +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x419e3221 dev_get_stats +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41ab913f nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x41dd724a I_BDEV +EXPORT_SYMBOL vmlinux 0x41f5239d input_allocate_device +EXPORT_SYMBOL vmlinux 0x4204b482 keyring_clear +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x4219d015 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x424b2464 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x4266b07a hci_recv_fragment +EXPORT_SYMBOL vmlinux 0x4269a75b netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0x4274b074 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x4293a2d0 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x42a4bdf2 in_egroup_p +EXPORT_SYMBOL vmlinux 0x42a7a4c7 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42c8de35 ioremap_nocache +EXPORT_SYMBOL vmlinux 0x42eedd41 pci_pme_active +EXPORT_SYMBOL vmlinux 0x42f01a21 sysctl_string +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4308bb67 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0x430dde11 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x431b8904 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x431c2e0f per_cpu__kernel_stack +EXPORT_SYMBOL vmlinux 0x431ea035 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x4327f0d5 memset_io +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x43a362b0 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43af1bb4 d_rehash +EXPORT_SYMBOL vmlinux 0x43ba23fb nla_reserve +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x43f81a93 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x43f89658 scsi_register_interface +EXPORT_SYMBOL vmlinux 0x4409f2c1 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44200ae7 security_inode_permission +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x44740969 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x44898095 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44b93df0 d_obtain_alias +EXPORT_SYMBOL vmlinux 0x44be098f __brelse +EXPORT_SYMBOL vmlinux 0x44be4622 update_region +EXPORT_SYMBOL vmlinux 0x44c43c06 km_policy_notify +EXPORT_SYMBOL vmlinux 0x44c6e88e dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x44d560e3 init_level4_pgt +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x452cdbca dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x45686895 hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0x4568cee7 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x457c1d6f dst_alloc +EXPORT_SYMBOL vmlinux 0x457e3f12 thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x45809951 may_umount_tree +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45ac5cd0 dma_set_mask +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45dfc09f dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x45e9d249 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x46205b8f insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x466cf120 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x4687b83d rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0x46c13d58 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x46c47fb6 __node_distance +EXPORT_SYMBOL vmlinux 0x46d16e4e dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x46e96ce6 xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475d6dcf scsi_print_result +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x477bfd64 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x479ee488 input_unregister_handle +EXPORT_SYMBOL vmlinux 0x47a6d1ec swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x47acc7f7 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x47be1e85 kernel_bind +EXPORT_SYMBOL vmlinux 0x47d87f11 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x47ddfc0d blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x47ef26dc dm_register_target +EXPORT_SYMBOL vmlinux 0x47fb64fa mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0x480c19c9 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x484024c2 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x4852bc47 d_splice_alias +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x485db5ea f_setown +EXPORT_SYMBOL vmlinux 0x486737d3 seq_release_private +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x487aee47 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x48828fd7 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x488aeca9 kobject_put +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48dffaa6 swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x491bc93a security_path_rename +EXPORT_SYMBOL vmlinux 0x4935d750 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x4939684d jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x494dd75f __scsi_add_device +EXPORT_SYMBOL vmlinux 0x494e3393 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49c38155 phy_disconnect +EXPORT_SYMBOL vmlinux 0x49cb7240 sock_register +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49dc34bf pci_release_regions +EXPORT_SYMBOL vmlinux 0x49dc9d97 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a386457 eth_header +EXPORT_SYMBOL vmlinux 0x4a464d2e qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x4a468f0b set_anon_super +EXPORT_SYMBOL vmlinux 0x4a5c695c simple_empty +EXPORT_SYMBOL vmlinux 0x4a7758a9 register_key_type +EXPORT_SYMBOL vmlinux 0x4a80ace5 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x4aa3f463 rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0x4acad495 skb_over_panic +EXPORT_SYMBOL vmlinux 0x4acb4dc3 agp_alloc_page_array +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL vmlinux 0x4b21856c lock_rename +EXPORT_SYMBOL vmlinux 0x4b470804 simple_statfs +EXPORT_SYMBOL vmlinux 0x4b4dbe54 km_report +EXPORT_SYMBOL vmlinux 0x4b772a5c sk_receive_skb +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b9c59af scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x4ba1541e ip6_route_output +EXPORT_SYMBOL vmlinux 0x4ba5baa0 load_gs_index +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bbfae8f init_buffer +EXPORT_SYMBOL vmlinux 0x4bdf028e idr_find +EXPORT_SYMBOL vmlinux 0x4be501ef release_sock +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c37e894 d_alloc_root +EXPORT_SYMBOL vmlinux 0x4c3d264c xfrm_lookup +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c8aabc5 agp_generic_destroy_pages +EXPORT_SYMBOL vmlinux 0x4c8f833e console_start +EXPORT_SYMBOL vmlinux 0x4c908998 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x4ca02033 override_creds +EXPORT_SYMBOL vmlinux 0x4ca15557 nf_afinfo +EXPORT_SYMBOL vmlinux 0x4cba23c9 d_instantiate +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cc4142f set_bh_page +EXPORT_SYMBOL vmlinux 0x4cd0ac85 nf_ct_attach +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dcaa612 swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4df0c892 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4df184fa journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e13859f alloc_trdev +EXPORT_SYMBOL vmlinux 0x4e2d5487 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e67016d journal_set_features +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e727e0b get_write_access +EXPORT_SYMBOL vmlinux 0x4e813af8 mmc_detect_change +EXPORT_SYMBOL vmlinux 0x4e93243a agp_generic_alloc_user +EXPORT_SYMBOL vmlinux 0x4ea90e30 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x4eb90adc scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x4eba1bcf __blk_end_request +EXPORT_SYMBOL vmlinux 0x4ec5be0e skb_split +EXPORT_SYMBOL vmlinux 0x4eda401c inet_shutdown +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4f031887 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x4f057f80 phy_device_free +EXPORT_SYMBOL vmlinux 0x4f3ca819 simple_lookup +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f556597 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x4f55f8b6 bd_claim +EXPORT_SYMBOL vmlinux 0x4f76cac1 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0x4fcc3abe hci_alloc_dev +EXPORT_SYMBOL vmlinux 0x4fcc5eea udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x4fcee107 __up_read +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fed309e dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x50267b06 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x502d3ae9 sk_free +EXPORT_SYMBOL vmlinux 0x5035348a dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x50585b9b skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x50695679 tcp_sendpage +EXPORT_SYMBOL vmlinux 0x506966c5 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x50b5cb2d idr_get_new_above +EXPORT_SYMBOL vmlinux 0x50d49ed8 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50e195f1 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x50fc3712 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x5105c7ca dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x51144b1c write_inode_now +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x511924bf pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x511c1e52 pci_dev_put +EXPORT_SYMBOL vmlinux 0x514a10a4 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x515092d8 scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x51813054 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0x5187ac4b xen_store_evtchn +EXPORT_SYMBOL vmlinux 0x51c876a8 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51f1ec66 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52087166 sk_stop_timer +EXPORT_SYMBOL vmlinux 0x520bc023 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x521ad0f1 ll_rw_block +EXPORT_SYMBOL vmlinux 0x522641b5 uart_suspend_port +EXPORT_SYMBOL vmlinux 0x52310441 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x5252f304 __memcpy_toio +EXPORT_SYMBOL vmlinux 0x5258701e rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528028a4 skb_pad +EXPORT_SYMBOL vmlinux 0x528a88be key_task_permission +EXPORT_SYMBOL vmlinux 0x5291184f bio_endio +EXPORT_SYMBOL vmlinux 0x5293da35 module_refcount +EXPORT_SYMBOL vmlinux 0x529eb634 phy_connect +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52db112d sock_no_connect +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x530f86cf dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x533beeff compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x538b5ec2 devm_ioremap +EXPORT_SYMBOL vmlinux 0x539cc500 __f_setown +EXPORT_SYMBOL vmlinux 0x53a308ad inode_set_bytes +EXPORT_SYMBOL vmlinux 0x53ba6b95 iget_locked +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53ec5b56 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x5424dc05 inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54291df6 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x5471fce6 ether_setup +EXPORT_SYMBOL vmlinux 0x54795ef7 input_set_keycode +EXPORT_SYMBOL vmlinux 0x547b39b7 del_gendisk +EXPORT_SYMBOL vmlinux 0x54991bc5 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x549a4506 __scm_destroy +EXPORT_SYMBOL vmlinux 0x54b3f073 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x54ce229e dm_io_client_create +EXPORT_SYMBOL vmlinux 0x54dbec7d tcp_connect +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x55100a7c mdiobus_free +EXPORT_SYMBOL vmlinux 0x55116645 __neigh_event_send +EXPORT_SYMBOL vmlinux 0x552d79cf generic_write_checks +EXPORT_SYMBOL vmlinux 0x554f0a48 groups_alloc +EXPORT_SYMBOL vmlinux 0x555c1aaf is_container_init +EXPORT_SYMBOL vmlinux 0x55735b4b pnp_activate_dev +EXPORT_SYMBOL vmlinux 0x558cb02f icmp_send +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55ceed0e bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x55f735ee pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5605e874 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x56181223 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x5628816d tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x568b2c21 agp_generic_alloc_by_type +EXPORT_SYMBOL vmlinux 0x569d0c4c pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x571ce02a is_bad_inode +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x573672e2 register_framebuffer +EXPORT_SYMBOL vmlinux 0x57381bbd xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x573fb4db sock_no_accept +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x57660f31 kernel_read +EXPORT_SYMBOL vmlinux 0x57b039db xfrm_init_state +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57eb1619 kmem_cache_name +EXPORT_SYMBOL vmlinux 0x58019865 scsi_unregister +EXPORT_SYMBOL vmlinux 0x581b5f1b eth_change_mtu +EXPORT_SYMBOL vmlinux 0x5828365d pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5840355a inet_bind +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x584d21f8 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x58682a1d framebuffer_release +EXPORT_SYMBOL vmlinux 0x589de9b1 dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x58a1ccc5 tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x58b72913 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c26af4 pci_choose_state +EXPORT_SYMBOL vmlinux 0x58e664d9 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x58f8f1eb bio_free +EXPORT_SYMBOL vmlinux 0x58fb3788 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x5904607b generic_listxattr +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x5963f938 llc_sap_close +EXPORT_SYMBOL vmlinux 0x59a3c371 acpi_is_video_device +EXPORT_SYMBOL vmlinux 0x59a4d17e neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x59a59e41 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x5a05d5ca acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0x5a12c769 netpoll_setup +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a36c500 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a4af7e8 generic_write_end +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a69219f __up_write +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a92c317 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5ade10ac pci_disable_msi +EXPORT_SYMBOL vmlinux 0x5b1be29e key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x5b340a92 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b5a2a32 smp_call_function_many +EXPORT_SYMBOL vmlinux 0x5b69d20d file_fsync +EXPORT_SYMBOL vmlinux 0x5b6f5742 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b94b0e4 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0x5b94fc62 journal_release_buffer +EXPORT_SYMBOL vmlinux 0x5b9beb34 xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0x5bae2eac acpi_extract_package +EXPORT_SYMBOL vmlinux 0x5bd1742e genphy_read_status +EXPORT_SYMBOL vmlinux 0x5be0c287 input_grab_device +EXPORT_SYMBOL vmlinux 0x5bec44cb __down_write +EXPORT_SYMBOL vmlinux 0x5bf07139 neigh_seq_next +EXPORT_SYMBOL vmlinux 0x5c192898 mark_page_accessed +EXPORT_SYMBOL vmlinux 0x5c3c4a11 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x5c431c34 free_netdev +EXPORT_SYMBOL vmlinux 0x5c835ef6 kobject_init +EXPORT_SYMBOL vmlinux 0x5c96ed08 fb_set_var +EXPORT_SYMBOL vmlinux 0x5c9e8a65 noop_qdisc +EXPORT_SYMBOL vmlinux 0x5ca7f655 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0x5cad0517 llc_sap_find +EXPORT_SYMBOL vmlinux 0x5cb0e81a tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x5cb9e594 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x5cb9fec5 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x5cc3c99e write_cache_pages +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5cf242b6 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x5d10b47b bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d12f7af agp_allocate_memory +EXPORT_SYMBOL vmlinux 0x5d74dbcf pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x5d7b0189 dst_destroy +EXPORT_SYMBOL vmlinux 0x5d926127 fb_show_logo +EXPORT_SYMBOL vmlinux 0x5dceb791 nf_reinject +EXPORT_SYMBOL vmlinux 0x5dd14fbb phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x5de0922a hci_free_dev +EXPORT_SYMBOL vmlinux 0x5de8c1ff xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x5debbd63 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x5e0bfd74 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x5e324235 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x5e651c89 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x5e7638b1 tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x5e7f8249 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5e9d12e2 vm_map_ram +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eb5d681 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x5ec8ca16 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5eef7620 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x5ef3995e cfb_imageblit +EXPORT_SYMBOL vmlinux 0x5ef3abd1 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x5f0ad503 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5f2625ea register_filesystem +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x60017e40 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x603ee96f ip_dev_find +EXPORT_SYMBOL vmlinux 0x6044cf53 get_phy_device +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x6083cb80 request_key +EXPORT_SYMBOL vmlinux 0x608918f6 agp_generic_free_gatt_table +EXPORT_SYMBOL vmlinux 0x608b3f57 inode_change_ok +EXPORT_SYMBOL vmlinux 0x60926bcc d_invalidate +EXPORT_SYMBOL vmlinux 0x6095180d pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60a93dec page_follow_link_light +EXPORT_SYMBOL vmlinux 0x60abda95 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x60dcc37a tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x60e147f3 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0x610c89ea neigh_destroy +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x619c2dca i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61c703e5 security_file_permission +EXPORT_SYMBOL vmlinux 0x61c77264 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x61dd8549 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x61eb6071 __lock_page +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62748e70 acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0x6275ea81 scsi_register_driver +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62955c06 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x629fbede pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x62b74f94 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x62d22de0 lro_flush_all +EXPORT_SYMBOL vmlinux 0x62ecf7e1 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x63013eaf sk_run_filter +EXPORT_SYMBOL vmlinux 0x630ed1a7 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x6322ce5d tty_set_operations +EXPORT_SYMBOL vmlinux 0x6343c952 alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x63496371 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x63519d52 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x6386c431 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x63ae7539 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x63bc6669 sock_no_poll +EXPORT_SYMBOL vmlinux 0x63c0af86 arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x63d48c62 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63fc232f strlen_user +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640c7a83 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x641943a0 dev_get_flags +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x643e2c64 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x64461bb5 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x64511c22 __register_binfmt +EXPORT_SYMBOL vmlinux 0x6465e34f key_revoke +EXPORT_SYMBOL vmlinux 0x64666fe2 dentry_unhash +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x64809332 filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64c175c5 send_sig +EXPORT_SYMBOL vmlinux 0x64c8378b neigh_table_clear +EXPORT_SYMBOL vmlinux 0x64c92221 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x64d78a60 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x64dde00f dput +EXPORT_SYMBOL vmlinux 0x64e6baa6 ip_fragment +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64fcac1f jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x65014838 ip6_xmit +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x6554799c qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x6586fc7c pagevec_lookup +EXPORT_SYMBOL vmlinux 0x659809e0 bio_pair_release +EXPORT_SYMBOL vmlinux 0x659ef0c5 skb_queue_purge +EXPORT_SYMBOL vmlinux 0x65deeed0 unregister_netdevice +EXPORT_SYMBOL vmlinux 0x65e8f47c register_sysctl_table +EXPORT_SYMBOL vmlinux 0x65ee14a8 ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x6606d168 input_inject_event +EXPORT_SYMBOL vmlinux 0x6631d483 __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x666a00d7 get_sb_single +EXPORT_SYMBOL vmlinux 0x666f0e9a filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x6672596b ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x667352dd journal_flush +EXPORT_SYMBOL vmlinux 0x668193cd dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x669ce0c0 make_EII_client +EXPORT_SYMBOL vmlinux 0x669de1c4 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x66ba277d sync_page_range +EXPORT_SYMBOL vmlinux 0x66e1715a genphy_suspend +EXPORT_SYMBOL vmlinux 0x66f3d48a kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x66f7f996 bioset_free +EXPORT_SYMBOL vmlinux 0x67040c04 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x670ee6e1 inet_release +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x672c2b06 register_gifconf +EXPORT_SYMBOL vmlinux 0x673f815e agp_bridges +EXPORT_SYMBOL vmlinux 0x6787612a inet_stream_connect +EXPORT_SYMBOL vmlinux 0x67914a5c arp_create +EXPORT_SYMBOL vmlinux 0x6796c128 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x67a98db9 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67b516c3 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x67b9967f kset_unregister +EXPORT_SYMBOL vmlinux 0x67c6ff44 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x67cdd1a8 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x6830b87d ps2_init +EXPORT_SYMBOL vmlinux 0x687008db nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x68857e6a security_path_truncate +EXPORT_SYMBOL vmlinux 0x68eab52b tcp_ioctl +EXPORT_SYMBOL vmlinux 0x6907d4e9 idr_for_each +EXPORT_SYMBOL vmlinux 0x691e0ba2 bio_add_page +EXPORT_SYMBOL vmlinux 0x694736f9 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0x694f961a dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x696c58de scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6976e198 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69c55555 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69efd3e1 disk_stack_limits +EXPORT_SYMBOL vmlinux 0x69f074af per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x69fc4a03 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a315563 security_path_symlink +EXPORT_SYMBOL vmlinux 0x6a3d4468 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a5f98a0 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a7c16d8 bio_init +EXPORT_SYMBOL vmlinux 0x6a816724 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x6a951c3e blk_start_request +EXPORT_SYMBOL vmlinux 0x6a9e57fd thaw_bdev +EXPORT_SYMBOL vmlinux 0x6a9f4bf8 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x6ac65f54 skb_queue_tail +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6adfa083 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x6af31cc3 unregister_netdev +EXPORT_SYMBOL vmlinux 0x6b076f6a proc_dostring +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b366910 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b59a968 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x6b731228 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb1970a generic_permission +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bcc3b83 do_sync_write +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6bf3513c neigh_parms_release +EXPORT_SYMBOL vmlinux 0x6c1ef282 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x6c2a01ce blk_rq_init +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c612c99 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6974ff blk_free_tags +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6cdc2090 __napi_complete +EXPORT_SYMBOL vmlinux 0x6d0e3039 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x6d17327e qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d334118 __get_user_8 +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d5913df dev_get_by_index +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d87245f sync_blockdev +EXPORT_SYMBOL vmlinux 0x6d94726b jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x6db0067d sockfd_lookup +EXPORT_SYMBOL vmlinux 0x6db1fbba jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x6db7ccdc dma_ops +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dc69c25 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x6dc96f29 block_commit_write +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6df679e0 prepare_binprm +EXPORT_SYMBOL vmlinux 0x6e018eba scm_fp_dup +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0c884e sk_filter +EXPORT_SYMBOL vmlinux 0x6e173c50 uart_register_driver +EXPORT_SYMBOL vmlinux 0x6e448311 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x6e54a1bd __scsi_put_command +EXPORT_SYMBOL vmlinux 0x6e57b03b ps2_drain +EXPORT_SYMBOL vmlinux 0x6e605cb5 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6eb37d97 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x6ef47c27 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x6f2fccc7 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f556d60 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x6f793edc agp_generic_insert_memory +EXPORT_SYMBOL vmlinux 0x6f98230d pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x6f9ed0b3 unregister_snap_client +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x6fd6bdf7 tty_vhangup +EXPORT_SYMBOL vmlinux 0x6fe14f3b agp_bind_memory +EXPORT_SYMBOL vmlinux 0x6ff77794 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x700b85e5 __inet6_hash +EXPORT_SYMBOL vmlinux 0x701438ed vc_resize +EXPORT_SYMBOL vmlinux 0x70537c57 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x7067db33 block_read_full_page +EXPORT_SYMBOL vmlinux 0x706dcb2d default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x70765d1c vfs_lstat +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70e0d61f cpu_all_bits +EXPORT_SYMBOL vmlinux 0x70e118dd lock_fb_info +EXPORT_SYMBOL vmlinux 0x7114afde elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x71259652 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x7127421c pci_target_state +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x713007a2 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x713aced1 vfs_statfs +EXPORT_SYMBOL vmlinux 0x713d052d may_umount +EXPORT_SYMBOL vmlinux 0x715b50c4 agp_generic_alloc_pages +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71796dc4 __free_pages +EXPORT_SYMBOL vmlinux 0x717c59f1 input_close_device +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71f6eb38 sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x71f8cf38 kill_litter_super +EXPORT_SYMBOL vmlinux 0x7203f92e llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x7231ca11 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x7247c9e9 insert_inode_locked +EXPORT_SYMBOL vmlinux 0x725e4b4f seq_lseek +EXPORT_SYMBOL vmlinux 0x726fffbc vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x728f8d71 __getblk +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x72faff94 mmc_free_host +EXPORT_SYMBOL vmlinux 0x731e61b3 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x733be169 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x73508fc2 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7376028b ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x738d32a7 journal_update_format +EXPORT_SYMBOL vmlinux 0x739ee22d gen_pool_add +EXPORT_SYMBOL vmlinux 0x73a019e0 simple_unlink +EXPORT_SYMBOL vmlinux 0x73b1d6c5 key_unlink +EXPORT_SYMBOL vmlinux 0x73c9e3ac page_symlink +EXPORT_SYMBOL vmlinux 0x73e51872 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x73ef940a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x74276aee __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x7430d275 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x7437d2fa get_fs_type +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74a11af9 set_pages_array_uc +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74ee8045 skb_store_bits +EXPORT_SYMBOL vmlinux 0x74faabbc set_device_ro +EXPORT_SYMBOL vmlinux 0x750626a3 d_validate +EXPORT_SYMBOL vmlinux 0x75211339 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x75285f2b blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x752d9fa4 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x75316cc2 security_path_link +EXPORT_SYMBOL vmlinux 0x7538b132 agp_off +EXPORT_SYMBOL vmlinux 0x7569845c xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x759640e2 genl_sock +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75c62cd0 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0x76003893 revert_creds +EXPORT_SYMBOL vmlinux 0x7603c939 set_user_nice +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x7610083d blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x762ed42d tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x765308f8 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x765c6f99 kill_anon_super +EXPORT_SYMBOL vmlinux 0x766dd027 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x767dd8fd acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x7690fc84 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x76b2f46a bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76c4b2d9 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x76c9b062 input_unregister_device +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76d655c0 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x76d6bb5f arp_send +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x7706d9e2 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x772779b0 md_write_end +EXPORT_SYMBOL vmlinux 0x772e1acb __pagevec_release +EXPORT_SYMBOL vmlinux 0x7737996d ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0x7781fb7d kernel_listen +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77c22e45 uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77f18d65 rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0x77f53abc acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x77fe6c0f journal_start +EXPORT_SYMBOL vmlinux 0x782acba5 crc_t10dif +EXPORT_SYMBOL vmlinux 0x7832cbdb mnt_unpin +EXPORT_SYMBOL vmlinux 0x785148a3 idr_destroy +EXPORT_SYMBOL vmlinux 0x785eca77 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x7880c681 con_is_bound +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78ba5f2f tcp_read_sock +EXPORT_SYMBOL vmlinux 0x78be58f6 sock_recvmsg +EXPORT_SYMBOL vmlinux 0x78d5c15c jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78fe3f0a destroy_EII_client +EXPORT_SYMBOL vmlinux 0x78feb3f8 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x797ca251 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x798c549a pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x798db316 ipv4_specific +EXPORT_SYMBOL vmlinux 0x7997aa11 skb_checksum_help +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79ba8d68 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x7a17649c __alloc_skb +EXPORT_SYMBOL vmlinux 0x7a26fd84 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a5abf03 register_netdevice +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7a87bfc9 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0x7a915f9d vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x7aa24281 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x7aa4d4b6 mntput_no_expire +EXPORT_SYMBOL vmlinux 0x7abcd77e eth_mac_addr +EXPORT_SYMBOL vmlinux 0x7ae22531 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b378fd6 inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b6982d3 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x7b789e02 __napi_schedule +EXPORT_SYMBOL vmlinux 0x7b8556c3 file_remove_suid +EXPORT_SYMBOL vmlinux 0x7b8920d9 vfs_readdir +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7b958726 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x7bbb691f pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x7bddf3bb scsi_remove_device +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c139914 skb_insert +EXPORT_SYMBOL vmlinux 0x7c15cb8f dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c8d4ddc uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c919456 dget_locked +EXPORT_SYMBOL vmlinux 0x7ca0e8a4 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cb258fc pci_disable_msix +EXPORT_SYMBOL vmlinux 0x7cb6c8c6 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0x7cd13f9e agp_generic_create_gatt_table +EXPORT_SYMBOL vmlinux 0x7cd6763a bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x7d08f9be set_disk_ro +EXPORT_SYMBOL vmlinux 0x7d0fffe1 tcp_check_req +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d1a419e module_layout +EXPORT_SYMBOL vmlinux 0x7d3e270a vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x7d6bb587 cpu_online_mask +EXPORT_SYMBOL vmlinux 0x7d7decd8 add_disk +EXPORT_SYMBOL vmlinux 0x7d7ee04e agp_create_memory +EXPORT_SYMBOL vmlinux 0x7d94f746 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x7d9ede42 netlink_set_err +EXPORT_SYMBOL vmlinux 0x7dc135e2 node_data +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e7c9f76 module_put +EXPORT_SYMBOL vmlinux 0x7e888d75 hci_send_acl +EXPORT_SYMBOL vmlinux 0x7e983126 flush_old_exec +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ec4e343 nla_put +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7efb4482 pci_enable_device +EXPORT_SYMBOL vmlinux 0x7efbd888 agp_backend_release +EXPORT_SYMBOL vmlinux 0x7efd7b73 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x7f17eec9 commit_creds +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f2a72a0 ppp_channel_index +EXPORT_SYMBOL vmlinux 0x7f3627ee put_page +EXPORT_SYMBOL vmlinux 0x7f4abdb2 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x7f692094 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7fcb2992 unlock_rename +EXPORT_SYMBOL vmlinux 0x7fd24892 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x804038bc neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x807f27a1 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0x809c8633 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x80b07199 agp_put_bridge +EXPORT_SYMBOL vmlinux 0x80b11196 ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0x80be97f0 sock_release +EXPORT_SYMBOL vmlinux 0x80dbee3a tc_classify +EXPORT_SYMBOL vmlinux 0x80ffe46e invalidate_partition +EXPORT_SYMBOL vmlinux 0x8136c839 __devm_release_region +EXPORT_SYMBOL vmlinux 0x8142d834 eth_header_parse +EXPORT_SYMBOL vmlinux 0x8145e7f9 pv_irq_ops +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x8155286a close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x81587b33 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x8159676f tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x816006df pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x81833010 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x8183acee thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0x819662ab zero_fill_bio +EXPORT_SYMBOL vmlinux 0x81d058bf ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x82079e60 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x8212721d xenbus_dev_request_and_reply +EXPORT_SYMBOL vmlinux 0x822cdff9 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x824660a0 mdiobus_register +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x825fece1 unload_nls +EXPORT_SYMBOL vmlinux 0x82685193 blk_sync_queue +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826a4fa4 unlock_buffer +EXPORT_SYMBOL vmlinux 0x827fd528 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x82953b0c pci_iomap +EXPORT_SYMBOL vmlinux 0x82a66c08 tty_free_termios +EXPORT_SYMBOL vmlinux 0x82de1fe1 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x8309002f do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x830e547b ioremap_prot +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x83288ea6 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x832be5d3 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x832dad4e scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x83341eb4 bdev_read_only +EXPORT_SYMBOL vmlinux 0x83663731 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x8373c51f vfs_readv +EXPORT_SYMBOL vmlinux 0x8388b85b tty_unregister_device +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83abd7f2 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x83ad493a n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83d0e1b1 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x83e4e9fd tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x83f6b3b9 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x8419ba0c bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x841f4045 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x84423675 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x844c3662 inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x8458427b pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x8492035a bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x84a7ad0d tty_register_driver +EXPORT_SYMBOL vmlinux 0x84beb2b2 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x84ee40a5 migrate_page +EXPORT_SYMBOL vmlinux 0x84fef6eb ip6_frag_init +EXPORT_SYMBOL vmlinux 0x8510afc7 put_disk +EXPORT_SYMBOL vmlinux 0x852f6e8c seq_read +EXPORT_SYMBOL vmlinux 0x8539b240 sock_map_fd +EXPORT_SYMBOL vmlinux 0x85468915 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x855797c8 __bread +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x85693451 dqput +EXPORT_SYMBOL vmlinux 0x856a6b70 scsi_print_command +EXPORT_SYMBOL vmlinux 0x858975b7 hci_unregister_cb +EXPORT_SYMBOL vmlinux 0x859d06fc register_console +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85afdf29 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x85b9672b clocksource_register +EXPORT_SYMBOL vmlinux 0x85c62d09 bdput +EXPORT_SYMBOL vmlinux 0x85d35ce8 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e50854 do_splice_from +EXPORT_SYMBOL vmlinux 0x85ec0e12 phy_detach +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x8633a885 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x863f3c9c tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x864b6dad unregister_qdisc +EXPORT_SYMBOL vmlinux 0x865172eb skb_trim +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866974a8 generic_fillattr +EXPORT_SYMBOL vmlinux 0x8683d9cb cdev_add +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x8696dd88 dquot_alloc +EXPORT_SYMBOL vmlinux 0x86ae7b45 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0x86c7146d vfs_fstat +EXPORT_SYMBOL vmlinux 0x86ed0cc7 tcp_shutdown +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x8738387d elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x874ad2eb simple_pin_fs +EXPORT_SYMBOL vmlinux 0x87619e21 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87a79cba pcim_pin_device +EXPORT_SYMBOL vmlinux 0x87c141a3 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x87ea0344 rfkill_destroy +EXPORT_SYMBOL vmlinux 0x87f5afbe blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x881108b9 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x88111156 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x88117451 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x88302d0b qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x8839e2c4 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x8851e80e netif_device_detach +EXPORT_SYMBOL vmlinux 0x88540587 scsi_put_command +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x88739cff locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x889d8f0d xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x889f46b7 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x88aa4623 blk_complete_request +EXPORT_SYMBOL vmlinux 0x88b7d591 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x88bfabdb blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x88ec6920 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x8902ad9c pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x89112678 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0x891dcabc console_stop +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x893d828e scsi_prep_fn +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x896c2045 register_nls +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x89a3ac37 ndisc_send_rs +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89ea8805 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a2287c4 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x8a2aa17d hci_register_dev +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a451b6b blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x8a52e7af inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a8ce8b6 fsync_bdev +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8aa0ee73 pci_find_device +EXPORT_SYMBOL vmlinux 0x8aa1ed29 generic_file_open +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8ae25b3f get_super +EXPORT_SYMBOL vmlinux 0x8b35e873 sg_last +EXPORT_SYMBOL vmlinux 0x8b3f6242 mmc_add_host +EXPORT_SYMBOL vmlinux 0x8b496d4c thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8b824f9d xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x8b922c0f __strnlen_user +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bebde71 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x8bf4aac3 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x8bf9ce6d __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x8bfd257b pci_set_master +EXPORT_SYMBOL vmlinux 0x8c0f2600 bdi_destroy +EXPORT_SYMBOL vmlinux 0x8c13d0ab dm_unregister_target +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c65230d acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0x8c69a1a9 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x8c98b3a5 uart_update_timeout +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cd9fd97 llc_sap_open +EXPORT_SYMBOL vmlinux 0x8ce195a3 xfrm_register_km +EXPORT_SYMBOL vmlinux 0x8d0bb41e pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4ebc82 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d74ad4c eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x8d7c468f bt_sock_link +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8d9cbf7d generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x8dacaaa3 follow_up +EXPORT_SYMBOL vmlinux 0x8dad6bc8 serio_open +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8dd2ad61 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x8ddaad70 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x8de02118 create_proc_entry +EXPORT_SYMBOL vmlinux 0x8de72fcc rfkill_blocked +EXPORT_SYMBOL vmlinux 0x8df32620 inet6_ioctl +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e0ff6df skb_seq_read +EXPORT_SYMBOL vmlinux 0x8e1a29c0 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e3ed6b6 acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0x8e588592 i2c_verify_client +EXPORT_SYMBOL vmlinux 0x8e5d2544 agp_free_memory +EXPORT_SYMBOL vmlinux 0x8e6d30eb journal_ack_err +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8eb95a1d page_readlink +EXPORT_SYMBOL vmlinux 0x8ecaa465 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8efcfc80 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0x8f3e5899 agp_generic_alloc_page +EXPORT_SYMBOL vmlinux 0x8f40ec62 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f74278a scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0x8f8f2586 vmtruncate +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fa01f0f tcp_proc_register +EXPORT_SYMBOL vmlinux 0x8fafdc7e skb_append +EXPORT_SYMBOL vmlinux 0x8fdcbf5b unregister_key_type +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x900fe4fb request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x90249ea5 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x904d922a pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x9091fe5f find_get_page +EXPORT_SYMBOL vmlinux 0x9097b6d7 init_task +EXPORT_SYMBOL vmlinux 0x909f0f41 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x90eb2985 agp_alloc_bridge +EXPORT_SYMBOL vmlinux 0x90f77d16 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x90fb13b5 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x90fbbebb udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x910efefc dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x9125510b seq_path +EXPORT_SYMBOL vmlinux 0x91385af1 replace_mount_options +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x914d8718 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x91524a5d scsi_remove_target +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x91696263 poll_freewait +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9183ce28 md_check_recovery +EXPORT_SYMBOL vmlinux 0x91dac123 km_query +EXPORT_SYMBOL vmlinux 0x91ffb95b generic_delete_inode +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x9217f6fb udp_poll +EXPORT_SYMBOL vmlinux 0x92371c11 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x925df9c1 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x925fb355 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x926f7a1f genphy_resume +EXPORT_SYMBOL vmlinux 0x927e989f gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x928abc32 kobject_set_name +EXPORT_SYMBOL vmlinux 0x929445ef simple_release_fs +EXPORT_SYMBOL vmlinux 0x92b9cde9 submit_bh +EXPORT_SYMBOL vmlinux 0x92ccfe74 fb_pan_display +EXPORT_SYMBOL vmlinux 0x92e1f638 alloc_disk +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x93794b7c pipe_unlock +EXPORT_SYMBOL vmlinux 0x938c0e23 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x939f9747 netdev_set_master +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93eebf45 pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9421225f jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x94276445 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x943e868f ida_get_new +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x944d624a xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x945bc6a7 copy_from_user +EXPORT_SYMBOL vmlinux 0x947f00a1 dev_addr_add +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94a3bf6b acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x94be677e key_link +EXPORT_SYMBOL vmlinux 0x94c2b0f3 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x94e2be96 tcp_poll +EXPORT_SYMBOL vmlinux 0x94fe789b netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x95232e72 swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0x95352ea9 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x95594955 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x9580ef1d pci_disable_device +EXPORT_SYMBOL vmlinux 0x95b00df3 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x95cd9a02 simple_set_mnt +EXPORT_SYMBOL vmlinux 0x95cd9a9d blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x95e37c63 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x96312f5b skb_put +EXPORT_SYMBOL vmlinux 0x9637bc83 dquot_commit +EXPORT_SYMBOL vmlinux 0x96476765 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0x96924103 inet_csk_accept +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96d34973 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x96d40f9c dev_trans_start +EXPORT_SYMBOL vmlinux 0x96e0ac63 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x96ec9104 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x96f33400 up_read +EXPORT_SYMBOL vmlinux 0x9701cdf5 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x973ddd36 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x977580fc simple_getattr +EXPORT_SYMBOL vmlinux 0x977e44e7 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x97861898 drop_super +EXPORT_SYMBOL vmlinux 0x9789b1c1 sock_kmalloc +EXPORT_SYMBOL vmlinux 0x97956ae8 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x97ade8c3 cdrom_mode_select +EXPORT_SYMBOL vmlinux 0x97c4f9cb generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0x97cd584e aio_put_req +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x980fe7c9 make_bad_inode +EXPORT_SYMBOL vmlinux 0x983243b1 fd_install +EXPORT_SYMBOL vmlinux 0x98344564 sg_miter_start +EXPORT_SYMBOL vmlinux 0x98355c08 register_netdev +EXPORT_SYMBOL vmlinux 0x9835dc7c tty_devnum +EXPORT_SYMBOL vmlinux 0x983aebd4 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x984b3f74 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x984cce6e log_wait_commit +EXPORT_SYMBOL vmlinux 0x986bfe2d jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x9874a6ae blk_put_request +EXPORT_SYMBOL vmlinux 0x9876297b sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x987e792a inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0x9886697a __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x9889e4c9 d_alloc_name +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x98937846 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x989ec7eb bio_kmalloc +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98c9c9f9 journal_destroy +EXPORT_SYMBOL vmlinux 0x98d6fd47 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0x99292449 pnp_is_active +EXPORT_SYMBOL vmlinux 0x992ff4a4 set_irq_chip +EXPORT_SYMBOL vmlinux 0x99303840 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x9938169f phy_attach_direct +EXPORT_SYMBOL vmlinux 0x99547f4f bmap +EXPORT_SYMBOL vmlinux 0x996cddde dma_pool_create +EXPORT_SYMBOL vmlinux 0x99750ad4 tty_write_room +EXPORT_SYMBOL vmlinux 0x99794b34 dev_unicast_add +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99a60f97 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a00a50b register_exec_domain +EXPORT_SYMBOL vmlinux 0x9a131e94 dm_get_device +EXPORT_SYMBOL vmlinux 0x9a173c86 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a4f811f poll_initwait +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9ab96c1a __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x9acd078f input_event +EXPORT_SYMBOL vmlinux 0x9acd773b should_remove_suid +EXPORT_SYMBOL vmlinux 0x9ad18b5e scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0x9adc259b skb_find_text +EXPORT_SYMBOL vmlinux 0x9b20066d sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x9b2970bf sock_no_mmap +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b573eea tr_type_trans +EXPORT_SYMBOL vmlinux 0x9b5ef04b hci_register_proto +EXPORT_SYMBOL vmlinux 0x9b90ae84 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bae02a6 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x9bbb4605 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x9bcda2b6 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x9bce51f5 vfs_read +EXPORT_SYMBOL vmlinux 0x9be02534 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x9bef962c sock_kfree_s +EXPORT_SYMBOL vmlinux 0x9bfde4c7 hci_send_sco +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c491f60 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x9c7bf315 pci_match_id +EXPORT_SYMBOL vmlinux 0x9c838c23 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x9c9eec8e __scm_send +EXPORT_SYMBOL vmlinux 0x9ca4b7d9 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x9ca72e18 agp_collect_device_status +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9caf02ed put_io_context +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9cfd9880 inet_ioctl +EXPORT_SYMBOL vmlinux 0x9d1cd1eb bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d59bb1b find_or_create_page +EXPORT_SYMBOL vmlinux 0x9d8082eb kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x9d82d7aa inet6_getname +EXPORT_SYMBOL vmlinux 0x9d8a2519 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0x9da4a5d3 sget +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9dd0a2c3 set_security_override +EXPORT_SYMBOL vmlinux 0x9e1315e6 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x9e2ec07f unregister_filesystem +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e7865b4 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x9e799f9d skb_dequeue +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e98c9bc dquot_initialize +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea0ad49 __sg_free_table +EXPORT_SYMBOL vmlinux 0x9ea28ec7 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x9eb5a318 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9edc5f5b neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9eeec937 tty_throttle +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f0a8207 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f503e27 kobject_get +EXPORT_SYMBOL vmlinux 0x9f58dfc6 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fb69167 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xa00d2fa1 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0xa0265fbc register_con_driver +EXPORT_SYMBOL vmlinux 0xa0317076 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa05e0201 alloc_fcdev +EXPORT_SYMBOL vmlinux 0xa06783c4 d_lookup +EXPORT_SYMBOL vmlinux 0xa086a80d kthread_create +EXPORT_SYMBOL vmlinux 0xa097fd35 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xa0a0c30c end_page_writeback +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0afe91b ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108cc27 i2c_del_driver +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa11daa9e nonseekable_open +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa12b64c2 pipe_to_file +EXPORT_SYMBOL vmlinux 0xa1314614 wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa14d3e2f otg_set_transceiver +EXPORT_SYMBOL vmlinux 0xa14e72fa cfb_fillrect +EXPORT_SYMBOL vmlinux 0xa1539ff4 swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0xa1842cbd generic_block_bmap +EXPORT_SYMBOL vmlinux 0xa1a51c2c fail_migrate_page +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1ddc365 kobject_add +EXPORT_SYMBOL vmlinux 0xa1ea22a6 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa210ab82 __find_get_block +EXPORT_SYMBOL vmlinux 0xa22d1381 seq_release +EXPORT_SYMBOL vmlinux 0xa22e2528 input_release_device +EXPORT_SYMBOL vmlinux 0xa250e288 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xa25d7470 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xa283c533 __ip_select_ident +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2adc247 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xa2b95d0a dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0xa2cbd447 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xa2cca196 kernel_accept +EXPORT_SYMBOL vmlinux 0xa2d49896 blk_get_request +EXPORT_SYMBOL vmlinux 0xa2d6e242 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xa3074268 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0xa31f172d __copy_from_user_inatomic +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa38e05f6 pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0xa39008bf compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xa39d4f3a elv_rb_add +EXPORT_SYMBOL vmlinux 0xa3a5be95 memmove +EXPORT_SYMBOL vmlinux 0xa3b63c92 dquot_destroy +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa3ce279d jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0xa3d15623 agp_generic_free_by_type +EXPORT_SYMBOL vmlinux 0xa3dbdd98 journal_restart +EXPORT_SYMBOL vmlinux 0xa3f5809c dev_close +EXPORT_SYMBOL vmlinux 0xa413ae57 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xa4390f0d netdev_bonding_change +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa4505fd0 pcim_iounmap +EXPORT_SYMBOL vmlinux 0xa47b4dee pnp_release_card_device +EXPORT_SYMBOL vmlinux 0xa4908567 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0xa4a54d6c blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4c7c74c journal_lock_updates +EXPORT_SYMBOL vmlinux 0xa4ca9b27 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL vmlinux 0xa4dcf108 inet_addr_type +EXPORT_SYMBOL vmlinux 0xa4e51431 i2c_transfer +EXPORT_SYMBOL vmlinux 0xa508ac2e unmap_mapping_range +EXPORT_SYMBOL vmlinux 0xa54886fc tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xa561e1ea sk_dst_check +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa56ff484 compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa584b40b wireless_spy_update +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5adbe8c ida_destroy +EXPORT_SYMBOL vmlinux 0xa5b6f598 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0xa5bf503d __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0xa5cc1e0d unregister_con_driver +EXPORT_SYMBOL vmlinux 0xa5e30960 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0xa5ea1e78 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xa60057c2 elv_rb_find +EXPORT_SYMBOL vmlinux 0xa6046da3 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0xa625bf1f i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa6424302 invalidate_bdev +EXPORT_SYMBOL vmlinux 0xa660f332 kick_iocb +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa69a1ffb tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xa6bbb370 cdev_alloc +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71b202f phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xa72a0f5b nr_online_nodes +EXPORT_SYMBOL vmlinux 0xa735093e bitmap_endwrite +EXPORT_SYMBOL vmlinux 0xa73bd0fe xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xa7476f01 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xa752b6f4 rtnl_notify +EXPORT_SYMBOL vmlinux 0xa7552a6a journal_dirty_data +EXPORT_SYMBOL vmlinux 0xa79494c6 mapping_tagged +EXPORT_SYMBOL vmlinux 0xa79541ed bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xa7b7ca81 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xa7bb2a44 genphy_update_link +EXPORT_SYMBOL vmlinux 0xa7d176c8 vm_insert_page +EXPORT_SYMBOL vmlinux 0xa7fc16e0 journal_revoke +EXPORT_SYMBOL vmlinux 0xa7fc72be inode_get_bytes +EXPORT_SYMBOL vmlinux 0xa8021493 __serio_register_driver +EXPORT_SYMBOL vmlinux 0xa822dae7 down_read +EXPORT_SYMBOL vmlinux 0xa834023b skb_free_datagram +EXPORT_SYMBOL vmlinux 0xa843af65 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0xa8479837 touch_atime +EXPORT_SYMBOL vmlinux 0xa854f370 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0xa85d7d74 netlink_unicast +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8aab6f5 proc_dointvec +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8f97151 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xa8fbf582 idr_replace +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa919a66f skb_unlink +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa948b4d0 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xa9520c74 phy_connect_direct +EXPORT_SYMBOL vmlinux 0xa95b1f9f seq_bitmap +EXPORT_SYMBOL vmlinux 0xa974191e bd_set_size +EXPORT_SYMBOL vmlinux 0xa97e9d3e sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xa994cd26 set_groups +EXPORT_SYMBOL vmlinux 0xa9a5460a tty_name +EXPORT_SYMBOL vmlinux 0xa9bd2676 __vmalloc +EXPORT_SYMBOL vmlinux 0xa9d18b50 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0xa9f7763d tcf_exts_change +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa1754e6 compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0xaa26b918 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0xaa5d8397 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0xaa6132b9 __bforget +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaa8a39be d_move +EXPORT_SYMBOL vmlinux 0xaa9bf020 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xaa9bfe95 mpage_readpages +EXPORT_SYMBOL vmlinux 0xaaa5eff1 pnp_possible_config +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaab354fb tcf_register_action +EXPORT_SYMBOL vmlinux 0xaadec84f journal_errno +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaafb8e40 key_validate +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab0282fe deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xab2f0329 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab65591d dcache_readdir +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab7fcb08 mpage_writepages +EXPORT_SYMBOL vmlinux 0xab8acbf0 tc_classify_compat +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabda6a81 skb_under_panic +EXPORT_SYMBOL vmlinux 0xabe85a21 idr_init +EXPORT_SYMBOL vmlinux 0xac023f39 devm_ioport_map +EXPORT_SYMBOL vmlinux 0xac090c42 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0xac2f27e2 security_path_mknod +EXPORT_SYMBOL vmlinux 0xac34eb38 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac443773 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacd422b7 compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xacde8e14 netpoll_poll +EXPORT_SYMBOL vmlinux 0xacf3d2ac blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xacf42bbe backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xacfa081c scsi_host_put +EXPORT_SYMBOL vmlinux 0xacfe0a68 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0xad010e4a inet_frags_init +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad0c77d5 xfrm_input +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad217c79 blk_init_tags +EXPORT_SYMBOL vmlinux 0xad25fb12 __memcpy +EXPORT_SYMBOL vmlinux 0xad4958ed udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xad5aece0 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xad8ad65f security_inode_readlink +EXPORT_SYMBOL vmlinux 0xad8de1b3 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0xad9c02bb free_buffer_head +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadb66bd6 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xadba1664 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0xadd2eeb3 unregister_cdrom +EXPORT_SYMBOL vmlinux 0xadeb7b72 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0xadee5f6b pci_write_vpd +EXPORT_SYMBOL vmlinux 0xadf19d0b hci_conn_put_device +EXPORT_SYMBOL vmlinux 0xae037724 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0xae0acc45 sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0xae13601d rfkill_unregister +EXPORT_SYMBOL vmlinux 0xae47a049 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae5c8543 vfs_getattr +EXPORT_SYMBOL vmlinux 0xaebbf7d2 dev_get_by_name +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaef3f4fb cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0xaefe8875 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xaf0dde14 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xaf2f3901 netif_napi_add +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf694f86 skb_pull +EXPORT_SYMBOL vmlinux 0xafc0324a xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xafee0816 pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xb00601a3 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0xb01191a9 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xb01bae9f skb_copy_expand +EXPORT_SYMBOL vmlinux 0xb021dc99 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL vmlinux 0xb051909f ida_init +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb06929f3 dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb088aa0d seq_open +EXPORT_SYMBOL vmlinux 0xb08aa6ad tty_port_close +EXPORT_SYMBOL vmlinux 0xb0930d74 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xb0a50c24 pci_enable_wake +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0be3b44 alloc_file +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0ebfd1b udplite_prot +EXPORT_SYMBOL vmlinux 0xb1111db3 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xb1149d4a pci_get_subsys +EXPORT_SYMBOL vmlinux 0xb11e01ff skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb1508087 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xb1645a2e sg_free_table +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1b3ee54 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb2018034 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0xb2141f12 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb23b0918 bio_clone +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb277e1c5 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb2b32797 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xb2c4b6e3 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0xb2cb0eae blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xb2e55898 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb3014df9 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0xb320390f bitmap_end_sync +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb3318ded __down_read_trylock +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb37b2ef8 uart_add_one_port +EXPORT_SYMBOL vmlinux 0xb37d5f21 dm_put_device +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3b4f5c0 register_quota_format +EXPORT_SYMBOL vmlinux 0xb3b8eeed jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xb3bd7ea8 input_get_keycode +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb43cec1f simple_transaction_set +EXPORT_SYMBOL vmlinux 0xb44c51a2 d_path +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb45faa39 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb474539d tcp_make_synack +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb4e26bb8 generic_show_options +EXPORT_SYMBOL vmlinux 0xb4fe3677 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb5103d4b kill_block_super +EXPORT_SYMBOL vmlinux 0xb511589e unregister_nls +EXPORT_SYMBOL vmlinux 0xb53a6881 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xb543fa72 filemap_flush +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5ba74c0 ilookup +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5cc7cb0 neigh_create +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb5ea781d agp_generic_type_to_mask_type +EXPORT_SYMBOL vmlinux 0xb5f01696 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xb5f28b5f __any_online_cpu +EXPORT_SYMBOL vmlinux 0xb6244511 sg_init_one +EXPORT_SYMBOL vmlinux 0xb648b8c2 redraw_screen +EXPORT_SYMBOL vmlinux 0xb6536227 dmam_pool_create +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb69c729f compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6acf54f acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6cbe886 acpi_get_node +EXPORT_SYMBOL vmlinux 0xb6d7e20a framebuffer_alloc +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb70f97ca rt6_lookup +EXPORT_SYMBOL vmlinux 0xb70ff13a pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0xb7142b41 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb738d02d acpi_bus_start +EXPORT_SYMBOL vmlinux 0xb74361ac dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb76b14f9 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0xb773c8d3 km_policy_expired +EXPORT_SYMBOL vmlinux 0xb7789d4e fasync_helper +EXPORT_SYMBOL vmlinux 0xb779b66c path_get +EXPORT_SYMBOL vmlinux 0xb793230a dma_pool_free +EXPORT_SYMBOL vmlinux 0xb795cd68 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xb7985dc5 simple_fill_super +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb79d6af8 napi_get_frags +EXPORT_SYMBOL vmlinux 0xb7c7f787 abort_creds +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7dd8449 md_register_thread +EXPORT_SYMBOL vmlinux 0xb80cd214 flush_signals +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81518a6 arp_xmit +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb877a0ac vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xb87f56c0 scsi_remove_host +EXPORT_SYMBOL vmlinux 0xb88dba2a jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8b06c4f scsi_init_io +EXPORT_SYMBOL vmlinux 0xb8b0e6d9 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xb8b3304a nf_getsockopt +EXPORT_SYMBOL vmlinux 0xb8d4c50d input_register_device +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb9016749 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xb916dfd3 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0xb922a8bf mmc_request_done +EXPORT_SYMBOL vmlinux 0xb93ab230 sock_create_kern +EXPORT_SYMBOL vmlinux 0xb95f4291 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0xb9642b7f i2c_master_send +EXPORT_SYMBOL vmlinux 0xb9805b0c down_read_trylock +EXPORT_SYMBOL vmlinux 0xb9878f56 lease_modify +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb9ab5ea3 napi_gro_receive +EXPORT_SYMBOL vmlinux 0xb9b578fa pci_bus_type +EXPORT_SYMBOL vmlinux 0xb9ca190f bdevname +EXPORT_SYMBOL vmlinux 0xb9e86ca7 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0xb9f72181 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba169ae1 handle_sysrq +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba56b636 ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0xba7d3692 ndisc_send_skb +EXPORT_SYMBOL vmlinux 0xba7f1f83 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaa80db9 dm_table_get_size +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbaf38759 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0xbaf43a3e vc_cons +EXPORT_SYMBOL vmlinux 0xbafc321b simple_write_begin +EXPORT_SYMBOL vmlinux 0xbb01eb7d inode_needs_sync +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb1fbf2d iget5_locked +EXPORT_SYMBOL vmlinux 0xbb5c4cd1 journal_init_inode +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb6c0766 vfs_create +EXPORT_SYMBOL vmlinux 0xbb88ddb1 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xbb99eb93 alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xbb9e2d7a vfs_quota_on +EXPORT_SYMBOL vmlinux 0xbbb372b9 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0xbbca006f dqget +EXPORT_SYMBOL vmlinux 0xbbd01e94 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xbbffb5f0 follow_pfn +EXPORT_SYMBOL vmlinux 0xbc1454ef inet_listen +EXPORT_SYMBOL vmlinux 0xbc22a7f5 neigh_lookup +EXPORT_SYMBOL vmlinux 0xbc333af5 netdev_features_change +EXPORT_SYMBOL vmlinux 0xbc3eb8a7 swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0xbc69f09d block_write_end +EXPORT_SYMBOL vmlinux 0xbca13165 md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbccbb49c idr_remove_all +EXPORT_SYMBOL vmlinux 0xbd017133 sysctl_data +EXPORT_SYMBOL vmlinux 0xbd0fca42 sock_wfree +EXPORT_SYMBOL vmlinux 0xbd137b5c dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xbd215a65 register_8022_client +EXPORT_SYMBOL vmlinux 0xbd37b8f0 d_add_ci +EXPORT_SYMBOL vmlinux 0xbdaf5b07 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0xbdb92be8 scsi_execute +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe39bbf3 mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xbe499d81 copy_to_user +EXPORT_SYMBOL vmlinux 0xbe582245 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xbe58361d rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0xbe83f281 cdev_init +EXPORT_SYMBOL vmlinux 0xbeb044d4 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xbecb7343 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xbecdce74 ida_pre_get +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbefee397 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0xbf1f397c install_exec_creds +EXPORT_SYMBOL vmlinux 0xbf2dae43 blk_init_queue +EXPORT_SYMBOL vmlinux 0xbf48a151 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xbf522c16 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0xbf686a50 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf8ce7a2 boot_cpu_data +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbf9c1c8b scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0xbf9cc6c8 x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xbfaabbeb inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xbfab458d pci_map_rom +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfc6ac88 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbff952a8 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc0095c71 neigh_table_init +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc07d43ae acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0c600dd xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xc0f2596e fb_validate_mode +EXPORT_SYMBOL vmlinux 0xc136c073 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xc13d7e4c __downgrade_write +EXPORT_SYMBOL vmlinux 0xc1736f96 in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xc1aa01bb skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xc1ac0097 simple_dir_operations +EXPORT_SYMBOL vmlinux 0xc1af9686 pci_find_capability +EXPORT_SYMBOL vmlinux 0xc1c2deed pv_cpu_ops +EXPORT_SYMBOL vmlinux 0xc1c80814 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xc1e963dd sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xc1ed0993 vfs_writev +EXPORT_SYMBOL vmlinux 0xc1f581aa phy_print_status +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc2089909 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0xc20c566b __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xc21866b8 kmem_cache_create +EXPORT_SYMBOL vmlinux 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc256ff17 ps2_command +EXPORT_SYMBOL vmlinux 0xc2a5969b k8_northbridges +EXPORT_SYMBOL vmlinux 0xc2be9086 copy_io_context +EXPORT_SYMBOL vmlinux 0xc2d3f0e1 new_inode +EXPORT_SYMBOL vmlinux 0xc2dc7e09 sock_sendmsg +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f1a201 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0xc308a49f sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xc3117917 pci_reenable_device +EXPORT_SYMBOL vmlinux 0xc31905fe register_sysrq_key +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc359c82e setup_arg_pages +EXPORT_SYMBOL vmlinux 0xc362a44e tcp_mtup_init +EXPORT_SYMBOL vmlinux 0xc36e3041 qdisc_destroy +EXPORT_SYMBOL vmlinux 0xc3853b10 compat_ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0xc38ffef3 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3bc0529 init_net +EXPORT_SYMBOL vmlinux 0xc3d8254f __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc406cc08 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0xc41237b7 swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0xc4152032 pid_task +EXPORT_SYMBOL vmlinux 0xc42a5de3 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0xc44ce272 pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xc46a0ba3 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xc495b664 dev_addr_del +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4ad08f1 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0xc4d08960 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xc4d489e9 up_write +EXPORT_SYMBOL vmlinux 0xc4e4ecee __dst_free +EXPORT_SYMBOL vmlinux 0xc4e9c01c cpu_active_mask +EXPORT_SYMBOL vmlinux 0xc51ddb03 vfs_follow_link +EXPORT_SYMBOL vmlinux 0xc525518d find_lock_page +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc535894b genphy_config_advert +EXPORT_SYMBOL vmlinux 0xc53c882d idr_get_new +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc558530d profile_pc +EXPORT_SYMBOL vmlinux 0xc55cfb5e lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc560f039 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0xc5651949 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0xc57e4f6d tty_port_init +EXPORT_SYMBOL vmlinux 0xc582644e udp_prot +EXPORT_SYMBOL vmlinux 0xc5844fb8 __per_cpu_offset +EXPORT_SYMBOL vmlinux 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL vmlinux 0xc5edd69d set_trace_device +EXPORT_SYMBOL vmlinux 0xc60278c2 read_dev_sector +EXPORT_SYMBOL vmlinux 0xc63395cb bio_map_kern +EXPORT_SYMBOL vmlinux 0xc6368cf3 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0xc64e0b04 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL vmlinux 0xc672c1d9 vfs_symlink +EXPORT_SYMBOL vmlinux 0xc67d96fe per_cpu__node_number +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc6d6a789 lock_sock_nested +EXPORT_SYMBOL vmlinux 0xc6e3e7c2 block_prepare_write +EXPORT_SYMBOL vmlinux 0xc6fbe8d6 mutex_unlock +EXPORT_SYMBOL vmlinux 0xc71dd124 ip_route_input +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc720c21c thaw_process +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc7244c75 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0xc724e531 do_sync_read +EXPORT_SYMBOL vmlinux 0xc735fb66 textsearch_unregister +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc74324ad inet_getname +EXPORT_SYMBOL vmlinux 0xc74edbf6 get_sb_bdev +EXPORT_SYMBOL vmlinux 0xc76bc7d8 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0xc76ffa75 phy_stop +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7be6394 pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0xc7d79e08 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xc8379759 d_genocide +EXPORT_SYMBOL vmlinux 0xc84340e4 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xc85e8673 audit_log_format +EXPORT_SYMBOL vmlinux 0xc85f9667 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xc897c382 sg_init_table +EXPORT_SYMBOL vmlinux 0xc8a714a7 dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8f66390 skb_clone +EXPORT_SYMBOL vmlinux 0xc8f71882 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xc8fe5cd3 names_cachep +EXPORT_SYMBOL vmlinux 0xc8fed059 dev_mc_add +EXPORT_SYMBOL vmlinux 0xc8ff2f71 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xc934f7a0 md_error +EXPORT_SYMBOL vmlinux 0xc9437ede __down_write_nested +EXPORT_SYMBOL vmlinux 0xc98f03d8 keyring_search +EXPORT_SYMBOL vmlinux 0xc9928c85 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc99a007e acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9ac0a6d mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xc9cf7dac ps2_handle_ack +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xc9f9fb62 pci_get_device +EXPORT_SYMBOL vmlinux 0xca25a7c8 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca5ec0f0 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xcabfaa60 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0xcad3e83a scsi_device_put +EXPORT_SYMBOL vmlinux 0xcaeaa976 blk_register_region +EXPORT_SYMBOL vmlinux 0xcb19e213 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xcb2825fe alloc_pages_current +EXPORT_SYMBOL vmlinux 0xcb2bc541 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0xcb4e9fd4 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xcb53dd50 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb73d4fe qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0xcba7735b balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xcbb57622 do_truncate +EXPORT_SYMBOL vmlinux 0xcbb9d7db groups_free +EXPORT_SYMBOL vmlinux 0xcbe488c5 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xcc04fa5e pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xcc0555ea dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc089d93 bio_sector_offset +EXPORT_SYMBOL vmlinux 0xcc1060d0 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc26b4a9 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0xcc2a9e50 unregister_console +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc440b62 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc529ec9 pcim_iomap +EXPORT_SYMBOL vmlinux 0xcc5805f1 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0xcc637357 agp_flush_chipset +EXPORT_SYMBOL vmlinux 0xcc6ed93a tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xccb4a55a cad_pid +EXPORT_SYMBOL vmlinux 0xccddfa87 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xccf10e4d vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xcd1a2697 skb_tx_hash +EXPORT_SYMBOL vmlinux 0xcd23b2f8 blk_peek_request +EXPORT_SYMBOL vmlinux 0xcd5ca7ee bdi_init +EXPORT_SYMBOL vmlinux 0xcd84212b neigh_for_each +EXPORT_SYMBOL vmlinux 0xcd86ec51 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xcdba5e0a tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0xcdbc25ea journal_abort +EXPORT_SYMBOL vmlinux 0xcdbc571d generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xcdc0e52e kfree_skb +EXPORT_SYMBOL vmlinux 0xcde6d340 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0xce15e501 deny_write_access +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3cb818 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce4e4980 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce8b7687 bd_release +EXPORT_SYMBOL vmlinux 0xce93d99d no_llseek +EXPORT_SYMBOL vmlinux 0xce943c8c nlmsg_notify +EXPORT_SYMBOL vmlinux 0xceb7a543 sock_init_data +EXPORT_SYMBOL vmlinux 0xcefb1a89 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf0abb8c mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf3e0202 neigh_event_ns +EXPORT_SYMBOL vmlinux 0xcf404fd4 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xcf713839 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0xcfa8d865 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0xcfacc599 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfe944c4 kernel_connect +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd01f25d4 __kfree_skb +EXPORT_SYMBOL vmlinux 0xd052f260 scsi_execute_req +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd08a8622 scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xd0bd5502 seq_printf +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd149bc11 xrlim_allow +EXPORT_SYMBOL vmlinux 0xd167e12a tty_schedule_flip +EXPORT_SYMBOL vmlinux 0xd18846fe wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd19bb294 acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0xd1f3ac65 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd1f9be31 dev_change_flags +EXPORT_SYMBOL vmlinux 0xd1faa4b5 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xd220bda1 write_one_page +EXPORT_SYMBOL vmlinux 0xd233a9a9 serio_close +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2b713d8 backlight_device_register +EXPORT_SYMBOL vmlinux 0xd2b77709 sock_create +EXPORT_SYMBOL vmlinux 0xd2c8d807 free_task +EXPORT_SYMBOL vmlinux 0xd32c758b jbd2_journal_start +EXPORT_SYMBOL vmlinux 0xd32cf74b ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0xd33b550a serio_reconnect +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd35fb64f skb_gso_segment +EXPORT_SYMBOL vmlinux 0xd36338c6 agp_backend_acquire +EXPORT_SYMBOL vmlinux 0xd36bb86e get_agp_version +EXPORT_SYMBOL vmlinux 0xd38c751c tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xd392eb1a seq_putc +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3a45a3e bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd3afcdf2 sk_alloc +EXPORT_SYMBOL vmlinux 0xd3db49e5 simple_readpage +EXPORT_SYMBOL vmlinux 0xd3de95b2 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd3ff3294 tcf_em_register +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd42f4f97 mdio_bus_type +EXPORT_SYMBOL vmlinux 0xd43a27ba pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xd49e128b shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0xd4e62201 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0xd4ec77d3 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0xd4f01004 security_path_unlink +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd5292612 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xd564da86 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0xd5678b1e napi_frags_skb +EXPORT_SYMBOL vmlinux 0xd568cd13 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0xd57db662 iput +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd593966d lock_super +EXPORT_SYMBOL vmlinux 0xd59e7414 input_open_device +EXPORT_SYMBOL vmlinux 0xd6016f73 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0xd6017b1f task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0xd60832b8 dst_release +EXPORT_SYMBOL vmlinux 0xd60d240d mb_cache_create +EXPORT_SYMBOL vmlinux 0xd60d7af4 ida_remove +EXPORT_SYMBOL vmlinux 0xd61af441 mmc_register_driver +EXPORT_SYMBOL vmlinux 0xd628cb58 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd653e3c9 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xd68b1a15 set_pages_x +EXPORT_SYMBOL vmlinux 0xd698cc8d hippi_type_trans +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6cb0127 remove_inode_hash +EXPORT_SYMBOL vmlinux 0xd6d3e3c6 fb_class +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd709741d generic_getxattr +EXPORT_SYMBOL vmlinux 0xd73b5122 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0xd742b3ad do_SAK +EXPORT_SYMBOL vmlinux 0xd7472b71 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xd748d50f i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0xd76eb32c scsi_add_device +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7d5ce6c __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xd7d81db1 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd80966e6 alloc_fddidev +EXPORT_SYMBOL vmlinux 0xd8245c79 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xd82e4a78 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8659586 stop_tty +EXPORT_SYMBOL vmlinux 0xd877c4fa proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0xd87984a5 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xd894c8f0 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xd89a994f load_nls_default +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8c58345 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xd8d43e70 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8ed840b pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xd8f94356 skb_checksum +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd928586d sock_i_uid +EXPORT_SYMBOL vmlinux 0xd930d21b mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd990ec81 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0xd99257c9 vfs_llseek +EXPORT_SYMBOL vmlinux 0xd9b04a41 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0xd9e25292 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda1917a5 skb_push +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda798d8e blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda91e24c tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xda9ce062 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xdac2d6b9 dev_load +EXPORT_SYMBOL vmlinux 0xdaccd387 serial8250_register_port +EXPORT_SYMBOL vmlinux 0xdace6f19 posix_test_lock +EXPORT_SYMBOL vmlinux 0xdb0a0e92 tcf_hash_search +EXPORT_SYMBOL vmlinux 0xdb915a22 pnp_register_driver +EXPORT_SYMBOL vmlinux 0xdba80f1c in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xdbaaf288 xfrm6_rcv +EXPORT_SYMBOL vmlinux 0xdbb5ad5c node_to_cpumask_map +EXPORT_SYMBOL vmlinux 0xdbcc4eb8 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc0af305 dev_driver_string +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc1db6c4 fb_set_suspend +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc32d079 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc7e4a4d generic_osync_inode +EXPORT_SYMBOL vmlinux 0xdc840aef blk_integrity_compare +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdd005514 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xdd12a264 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xdd3a2b6e cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xdd3d4f13 dcache_dir_close +EXPORT_SYMBOL vmlinux 0xdd5c15c6 md_unregister_thread +EXPORT_SYMBOL vmlinux 0xdd63168f get_disk +EXPORT_SYMBOL vmlinux 0xdd9027c2 ___pskb_trim +EXPORT_SYMBOL vmlinux 0xddaeb8e4 inode_add_bytes +EXPORT_SYMBOL vmlinux 0xddb65983 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xdde88eb2 blk_integrity_register +EXPORT_SYMBOL vmlinux 0xddec227e arp_tbl +EXPORT_SYMBOL vmlinux 0xde04953e vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0xde070414 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0xde0bdcff memset +EXPORT_SYMBOL vmlinux 0xde535218 uart_get_divisor +EXPORT_SYMBOL vmlinux 0xde7374fd pnp_get_resource +EXPORT_SYMBOL vmlinux 0xde73754b seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde831f5d bioset_integrity_create +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde9ac1c8 __secpath_destroy +EXPORT_SYMBOL vmlinux 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL vmlinux 0xdea59fb6 hci_connect +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf0f48bb unlock_page +EXPORT_SYMBOL vmlinux 0xdf13fd13 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0xdf1917d0 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xdf39fc26 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xdf41afb2 fb_set_cmap +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf6a8bb2 phy_driver_register +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfacd61b blk_insert_request +EXPORT_SYMBOL vmlinux 0xdfb025c2 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0xdfb65725 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xdfb7bada acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0xdfba764f dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xdfc494c8 get_empty_filp +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfd9e8a2 search_binary_handler +EXPORT_SYMBOL vmlinux 0xdffb265b dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xe0045c1e audit_log_end +EXPORT_SYMBOL vmlinux 0xe0212bbf get_sb_ns +EXPORT_SYMBOL vmlinux 0xe05761e7 udp_disconnect +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0884f2f get_phy_id +EXPORT_SYMBOL vmlinux 0xe09f90c5 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c8490a pci_set_power_state +EXPORT_SYMBOL vmlinux 0xe0dd3534 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0xe0f4b02f scsi_device_set_state +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe12de18b blk_stop_queue +EXPORT_SYMBOL vmlinux 0xe1369ced scsi_is_host_device +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe144b306 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xe14d4493 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0xe150844b km_state_notify +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1ffee85 init_file +EXPORT_SYMBOL vmlinux 0xe203223c hci_unregister_proto +EXPORT_SYMBOL vmlinux 0xe216f089 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe24d7b00 journal_create +EXPORT_SYMBOL vmlinux 0xe2554c32 netif_napi_del +EXPORT_SYMBOL vmlinux 0xe29b04e9 acpi_set_firmware_waking_vector64 +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe311f616 dm_table_get +EXPORT_SYMBOL vmlinux 0xe33076d3 user_path_at +EXPORT_SYMBOL vmlinux 0xe3462761 aio_complete +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe39ef42f scsi_target_resume +EXPORT_SYMBOL vmlinux 0xe3a3c2b0 nf_register_hooks +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3d4a7a0 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xe3e38e1f block_truncate_page +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe456bed9 agp_find_bridge +EXPORT_SYMBOL vmlinux 0xe466589f __page_symlink +EXPORT_SYMBOL vmlinux 0xe474e6eb jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe486f4b7 agp_enable +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe4b24b8c __next_cpu +EXPORT_SYMBOL vmlinux 0xe4b911e7 agp_generic_remove_memory +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4ccecd6 posix_lock_file +EXPORT_SYMBOL vmlinux 0xe4e2a23c ppp_input +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe52947e7 __phys_addr +EXPORT_SYMBOL vmlinux 0xe534b413 vfs_unlink +EXPORT_SYMBOL vmlinux 0xe534e3c7 generic_writepages +EXPORT_SYMBOL vmlinux 0xe539dad2 neigh_compat_output +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe57bed21 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5a9f48c xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xe5bf7716 cdrom_open +EXPORT_SYMBOL vmlinux 0xe5c15cd7 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ccb04c inet_put_port +EXPORT_SYMBOL vmlinux 0xe5e55afe secpath_dup +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5f0b791 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xe601828e agp_copy_info +EXPORT_SYMBOL vmlinux 0xe60ec65f vfs_fsync +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe69235d8 ip6_frag_match +EXPORT_SYMBOL vmlinux 0xe6d85da2 clear_inode +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe6fe49e0 hci_resume_dev +EXPORT_SYMBOL vmlinux 0xe703ca3b block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0xe708ba32 input_set_capability +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe73afb58 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xe73b722f pskb_copy +EXPORT_SYMBOL vmlinux 0xe73dc604 pci_set_mwi +EXPORT_SYMBOL vmlinux 0xe75085b9 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0xe755990f directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0xe76d3fc5 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0xe77441c0 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0xe79edf79 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0xe7cbadae __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7d73eb0 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0xe7e51d9f loop_register_transfer +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe8116e08 __kmalloc_node +EXPORT_SYMBOL vmlinux 0xe8272ab8 dm_table_get_md +EXPORT_SYMBOL vmlinux 0xe83a1d22 posix_acl_permission +EXPORT_SYMBOL vmlinux 0xe873615e scsi_device_get +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe892e28a bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xe893a104 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8bbb025 pci_save_state +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8edceef agp_unbind_memory +EXPORT_SYMBOL vmlinux 0xe8f3f25e deactivate_super +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe930c6c2 dm_table_put +EXPORT_SYMBOL vmlinux 0xe9320f73 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0xe95956fc block_invalidatepage +EXPORT_SYMBOL vmlinux 0xe9655da3 complete_request_key +EXPORT_SYMBOL vmlinux 0xe98a1f7f pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xe9922a47 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe9c055f4 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0xe9c2ffe8 simple_fsync +EXPORT_SYMBOL vmlinux 0xe9d16a65 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xe9e50d7e lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea193096 nobh_writepage +EXPORT_SYMBOL vmlinux 0xea2f3729 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0xea408196 compat_ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xea64ea66 d_delete +EXPORT_SYMBOL vmlinux 0xea68b72c napi_frags_finish +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xeab4372a set_page_dirty +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeaef31f4 dma_find_channel +EXPORT_SYMBOL vmlinux 0xeaf6d7c8 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0xeb022ef1 vfs_mknod +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb3b4249 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0xeb6e4e1d acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0xeb7a01f1 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8b6839 i2c_register_driver +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebdeb063 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0xebdf24ef bt_sock_poll +EXPORT_SYMBOL vmlinux 0xec26b071 netlink_dump_start +EXPORT_SYMBOL vmlinux 0xec3c15ef iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0xec4c757d inet_accept +EXPORT_SYMBOL vmlinux 0xec62eac4 pci_get_slot +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec8cafe3 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xec93b933 fb_blank +EXPORT_SYMBOL vmlinux 0xecc00aaf nf_setsockopt +EXPORT_SYMBOL vmlinux 0xecd30985 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0xecdbfa18 pci_find_bus +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xecea8d90 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xed03d01c dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0xed1d2004 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xed646ba0 blk_make_request +EXPORT_SYMBOL vmlinux 0xed6c8587 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0xed74f052 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xed76c6ab kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0xed8a4771 ip_ct_attach +EXPORT_SYMBOL vmlinux 0xed957514 __ht_create_irq +EXPORT_SYMBOL vmlinux 0xeda05fd7 path_lookup +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb3403b kthread_bind +EXPORT_SYMBOL vmlinux 0xedb582f5 locks_remove_posix +EXPORT_SYMBOL vmlinux 0xedb6a6a9 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedc93996 try_to_release_page +EXPORT_SYMBOL vmlinux 0xede757f8 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xee066424 unregister_md_personality +EXPORT_SYMBOL vmlinux 0xee1d218e mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0xee2a2350 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee37a319 md_integrity_register +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee605f38 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xee820845 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeec2e47f tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xeecaea22 down_write_trylock +EXPORT_SYMBOL vmlinux 0xeed38d59 scsi_get_command +EXPORT_SYMBOL vmlinux 0xef0be423 sock_rfree +EXPORT_SYMBOL vmlinux 0xef0e4cf9 seq_puts +EXPORT_SYMBOL vmlinux 0xef12ef85 kernel_getsockname +EXPORT_SYMBOL vmlinux 0xef3b5bb3 wake_up_process +EXPORT_SYMBOL vmlinux 0xef3b6a61 __break_lease +EXPORT_SYMBOL vmlinux 0xef409744 nf_log_packet +EXPORT_SYMBOL vmlinux 0xef43ac1f nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0xef43b115 phy_start +EXPORT_SYMBOL vmlinux 0xef699737 __blk_run_queue +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef89640d pci_iounmap +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefaf051b scsi_block_requests +EXPORT_SYMBOL vmlinux 0xefc0af89 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xefc2e52b arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xefda3e55 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0xefdba8d4 register_md_personality +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xefefd820 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf00d3c0d invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xf0100541 __lock_buffer +EXPORT_SYMBOL vmlinux 0xf04ca54a scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0xf04f3c54 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xf056f7f8 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xf0621fdf pci_request_regions +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf06f4d68 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0xf0733ac3 simple_rmdir +EXPORT_SYMBOL vmlinux 0xf0c32ee1 dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0xf0e0bd75 kill_fasync +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f3488f generic_readlink +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf1002ec3 dquot_acquire +EXPORT_SYMBOL vmlinux 0xf106ecb3 acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf116d4b5 copy_in_user +EXPORT_SYMBOL vmlinux 0xf159c499 arp_broken_ops +EXPORT_SYMBOL vmlinux 0xf15bc2e9 eth_header_cache +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1a8ed85 generic_unplug_device +EXPORT_SYMBOL vmlinux 0xf1b28647 tty_register_device +EXPORT_SYMBOL vmlinux 0xf1bd12c3 netdev_state_change +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1cb5b81 dquot_free_space +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1df8829 security_d_instantiate +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf21cca7f per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0xf23b27bb fput +EXPORT_SYMBOL vmlinux 0xf2424496 input_register_handler +EXPORT_SYMBOL vmlinux 0xf24b1e3e current_fs_time +EXPORT_SYMBOL vmlinux 0xf2545738 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0xf269b406 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xf26f501a start_tty +EXPORT_SYMBOL vmlinux 0xf2930836 lro_receive_frags +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2f60292 cont_write_begin +EXPORT_SYMBOL vmlinux 0xf2fee6c0 init_special_inode +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3311c6f tty_kref_put +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf338e6dd agp3_generic_tlbflush +EXPORT_SYMBOL vmlinux 0xf33ba572 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf34df93b proto_unregister +EXPORT_SYMBOL vmlinux 0xf350c714 dma_supported +EXPORT_SYMBOL vmlinux 0xf35207a6 pnp_start_dev +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf3a03278 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3c55d50 nf_log_unregister +EXPORT_SYMBOL vmlinux 0xf3dd4fcd prepare_creds +EXPORT_SYMBOL vmlinux 0xf4306c5f devm_iounmap +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4463e47 input_unregister_handler +EXPORT_SYMBOL vmlinux 0xf4528073 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf49f8314 acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4c0911e xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf4fd0397 generic_setlease +EXPORT_SYMBOL vmlinux 0xf504386b __serio_register_port +EXPORT_SYMBOL vmlinux 0xf5118212 blk_start_queue +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf566bfb6 fb_get_mode +EXPORT_SYMBOL vmlinux 0xf570e3cb generic_read_dir +EXPORT_SYMBOL vmlinux 0xf579f832 elv_queue_empty +EXPORT_SYMBOL vmlinux 0xf57f6927 pci_enable_msix +EXPORT_SYMBOL vmlinux 0xf5a35867 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xf5c7fb93 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf64a604e simple_rename +EXPORT_SYMBOL vmlinux 0xf652b02e bio_split +EXPORT_SYMBOL vmlinux 0xf664876e journal_force_commit +EXPORT_SYMBOL vmlinux 0xf666cbb3 __memcpy_fromio +EXPORT_SYMBOL vmlinux 0xf6902e5b set_create_files_as +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6f968c0 set_blocksize +EXPORT_SYMBOL vmlinux 0xf6fe45a8 inode_permission +EXPORT_SYMBOL vmlinux 0xf73983ea swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0xf73fca2a user_revoke +EXPORT_SYMBOL vmlinux 0xf749534a gen_pool_free +EXPORT_SYMBOL vmlinux 0xf767b973 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0xf771deaf proto_register +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf79a2d9a devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0xf7ad3e3e pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xf7b16d7a compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xf7cffd9b ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8a7e638 dentry_open +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8d021bb icmpv6_send +EXPORT_SYMBOL vmlinux 0xf9297c90 elevator_exit +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf938c38b journal_start_commit +EXPORT_SYMBOL vmlinux 0xf95d3745 scsi_dma_map +EXPORT_SYMBOL vmlinux 0xf9775ff9 register_snap_client +EXPORT_SYMBOL vmlinux 0xf97a0401 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xf97c2868 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xf98b9e9d sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b582ba read_cache_page +EXPORT_SYMBOL vmlinux 0xf9f1041b bio_copy_kern +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa842fdc down_write +EXPORT_SYMBOL vmlinux 0xfaae5b74 scsi_free_command +EXPORT_SYMBOL vmlinux 0xfadf7753 dst_discard +EXPORT_SYMBOL vmlinux 0xfae9c6a7 agp_generic_destroy_page +EXPORT_SYMBOL vmlinux 0xfaf90a93 seq_escape +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb2a1b17 submit_bio +EXPORT_SYMBOL vmlinux 0xfb34d378 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xfb3f1224 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0xfb55860a atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb82eef4 hci_get_route +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfba1a8c0 datagram_poll +EXPORT_SYMBOL vmlinux 0xfbb4c451 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xfbcf3943 inet_stream_ops +EXPORT_SYMBOL vmlinux 0xfbd7a382 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xfbd92318 create_empty_buffers +EXPORT_SYMBOL vmlinux 0xfbdd70be tcp_disconnect +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbeb11cb remap_pfn_range +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc031c3f mutex_lock_killable +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc7692c9 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0xfc814e60 uart_resume_port +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcb21b8e phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0xfcb755cf dquot_release +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfce538f7 dev_add_pack +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcefd18a mem_section +EXPORT_SYMBOL vmlinux 0xfcf78093 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd149f45 page_put_link +EXPORT_SYMBOL vmlinux 0xfd287317 kmalloc_caches +EXPORT_SYMBOL vmlinux 0xfd29c54f single_release +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfda79c0e sock_create_lite +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb850c4 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdf9370b open_exec +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe02639f locks_init_lock +EXPORT_SYMBOL vmlinux 0xfe047ce6 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xfe09880c nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xfe26fc7c nr_node_ids +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe454b3f lookup_bdev +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe5e3754 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe8fd00e i2c_release_client +EXPORT_SYMBOL vmlinux 0xfe9351bc kset_register +EXPORT_SYMBOL vmlinux 0xfe98e719 dma_async_device_register +EXPORT_SYMBOL vmlinux 0xfe9b4213 notify_change +EXPORT_SYMBOL vmlinux 0xfe9c7e57 lease_get_mtime +EXPORT_SYMBOL vmlinux 0xfebf60cd blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfecbaec3 input_unfilter_device +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfedd40b3 bio_map_user +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xfef96fee tcp_child_process +EXPORT_SYMBOL vmlinux 0xff16db29 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff3e5d26 pci_dev_driver +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff7c33fd do_splice_to +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff98230b ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffae4519 check_disk_change +EXPORT_SYMBOL vmlinux 0xffafdc5c _read_unlock_irq +EXPORT_SYMBOL vmlinux 0xffc7c184 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xffcce24b vfs_readlink +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffdfa339 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xfffffe59 nobh_write_end +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0x7060bf0a crypto_aes_encrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0xe409b491 crypto_aes_decrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x16836e04 speedstep_detect_processor +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x2af90271 speedstep_get_frequency +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0xd494ee54 speedstep_get_freqs +EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81 ucode_cpu_info +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935 kvm_disable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x018609a6 gfn_to_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x01ddca7a kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x06cdb571 gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x06f3ae4f kvm_read_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x07b03c58 fx_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4 kvm_get_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09c2c6d0 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d808bc3 kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0e6ed8a0 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x105c0fa4 kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x108732c7 kvm_set_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b kvm_release_pfn_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x172b469a kvm_release_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1b2e52b6 kvm_cpu_has_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb kvm_release_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039 kvm_set_pfn_accessed +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x24770668 kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x32e978d9 kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37d5259f kvm_set_cr3 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3ae365d2 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x452141e2 kvm_mmu_page_fault +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4889dbae gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x49af0bc4 emulator_write_emulated +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4c66c555 __kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4d84005b kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x535ce75e kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x572c7b3c kvm_resched +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x58d6cf8f kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5dd3d39c kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x62a1918a kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x632a6e7c kvm_put_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x655c6e6e kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6a923718 load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x74162442 kvm_emulate_halt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7a60d23a kvm_report_emulation_failure +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b577f96 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7c5087b7 kvm_mmu_invlpg +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7cd21e05 kvm_get_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x82ebed66 kvm_queue_exception +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x85ae58c7 kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x88b0ba8c kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8907bc9a kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x89b62473 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ca55b4a emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8f4983ed kvm_emulate_hypercall +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x965a48c1 kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa0777982 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa3d28fe8 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa9156a65 kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaac67d90 kvm_mmu_load +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab87adae kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xacd121d1 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xad5cfd92 kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaf723ea0 kvm_emulate_pio +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb58eb35d kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbb448d5f kvm_lapic_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd86163a kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc6ab1249 kvm_write_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcaab1818 kvm_inject_nmi +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc0dccc3 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcde47d62 kvm_clear_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes 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drivers/misc/enclosure 0xec645347 enclosure_for_each_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xfb9d2e47 enclosure_find +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xfbda38dc enclosure_component_register +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x17294442 sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2cde5704 sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3b7842be sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x663148c7 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x8039607e sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa0a32fbe sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x825b4b0c cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xab41b0af cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xd42b5859 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x52744e5e cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x34985d54 cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x0bd62117 cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x4c12969d cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x598e8bd1 cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xd09351dd DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xf647166b DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x9681f1cd DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1b57d061 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1cdfbff6 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1ff71154 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28b38fd1 deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x62ed3388 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6912dc25 default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7a6187fe mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa7263b04 register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb6a14e3f get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbb98afff parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbd091f10 kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbf339de9 get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xdad9a8b1 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe28f5691 get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe79ea4ea mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xee789a0f put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x05d52a83 deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x46276cc4 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x56c52ee0 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x5a7f6a3a register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1e873896 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x25143398 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x7b083898 nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa917083a nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xd433169a nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x237853b6 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x4706a7a4 onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0364e40a ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x398361c8 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4d6037ee ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4de1ee58 ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x682ae91a ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7d983403 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x854854ea ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x96af4471 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x98d4bad8 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa6cbc0a6 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa8d2902d ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbf719240 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x11582842 can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2d8ccedd close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x55c04ec9 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x613ada16 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6999da22 free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6ade0a5e can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa012c070 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa46a4ea1 open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xac63b52d can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x43d3c6d0 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x6724241c unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x7f799fb1 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x84de9a32 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x033f3822 __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x14b5ab7f mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c37da5c mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ddb2d5f mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ef0ba65 mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1fd656be mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x22dd517f mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x26989407 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x289b3197 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x36d45c7b mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x372327eb mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3c12fdf3 mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3c90d0c6 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3d91342d mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x41bb755d mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x41d43a20 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4baca908 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4ebc9c3b mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5285fd30 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x582cbc59 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5943e868 mlx4_fmr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5cb003ba mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x601206ae mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6131497c mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6387e573 mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x65ab78d5 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x66f3d5d0 mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x69de94a5 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x74307553 mlx4_CLOSE_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7549139c mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x876df5a5 mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ee6669f mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8f06c8a8 mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x93123626 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9dcaced9 mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa63774c7 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xad40b58f mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb02be2e4 mlx4_mtt_addr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb8de4dff mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbbb9a2fa mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbcdf5d13 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbebe3d03 mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc2df96f6 mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc531675b mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca5b5096 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd352afd2 mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdcd1472d mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe9bed102 mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea733c45 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea77947c mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfb2f3605 mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd91d326 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfe5605a0 mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x2896cde2 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xc2366e70 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x17da6791 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9f91497e rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xadc3d0b9 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc3b5c613 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xec1bb326 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfd7bb936 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x03caf3e3 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x102db07a usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1b109f97 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1e86f20c usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x227502a1 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2426e65c usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4cbaa647 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4dbedc4b usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x55b1458e usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x68bbc06c usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x728db023 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8d710b4b usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa4e5e965 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc96ab9bb usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd08b7f21 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd74740d0 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd9a8c239 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf189ce1a usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf29fbcf1 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf479708e usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfcef565c usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x130768c4 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2e5b1f68 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x370edff2 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x42f363a2 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5f26f5c5 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6b2b9488 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x76b033cd i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7dcac11b i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8907049d i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x96c9ff69 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd08f3a95 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd347b938 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe2058de7 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xd34cdb3a ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x05bc913f lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1a8e8361 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1b4a9a40 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x339a6ad8 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7864f6af lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7a97c4e0 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x94e29e37 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9a090cf9 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9c8fe447 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa7504098 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xaa2347e9 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc1354db7 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd29df8fc lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe1a6cace lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xee385337 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x349383c5 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x59b79e8d lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x749ee1ac lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x79947e80 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7d63b2dc __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8cd8d93c lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb728b44a lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xe1fe8dc1 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x988cfab5 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xefa79755 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x11261b0a p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1d76f2aa p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3f77c924 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x55bb5178 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x571c0db9 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x671be617 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x8d7fdeea p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbeabba2e p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1626038a rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x17fbd6e5 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x38a12569 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x43b1a0df rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4fe12748 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x52eef3f5 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x54f84ecc rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x55230ad9 rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6a52abcb rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x750ea710 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7542c885 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7ce085aa rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x893fe409 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9add6171 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb3868ddf rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc14b6cba rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc361ce75 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd02c5c6c rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe09269dc rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xee14dbff rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf39c4038 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf61620fe rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2fdd53f7 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x40be63b8 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5bf1b45b rt2x00pci_rxdone +EXPORT_SYMBOL_GPL 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drivers/scsi/libiscsi 0x8e1e69f4 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9118babf iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa64430bc iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaef32db2 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8ce24bf iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8eb403c iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc1220090 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc39e88b iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc86a4c1 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd77c72f3 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf19a2ae2 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf617dec6 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf859bcbf iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf86ef7af iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x077c01a7 iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x213237a8 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2f3ff693 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x317e030b iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x339193b1 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x45284924 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4e9f7f95 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x56693a0f iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6cb2baae iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x93bc52b5 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xaf5e41de iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb973b9cd iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcab16bfe iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcc0fb131 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd6f4b3f0 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xec4c8baa iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x03ca7cbb sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x16e0f6d1 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1a3cb7de sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x23170f1a sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2b1e3ebd sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2dfae4b9 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x33e32d4a sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4af85561 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4b47020a sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4eb78f90 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b056ad8 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b2d40f7 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f953213 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7ce71bb6 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x90baf2b1 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa0e0b98b sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb69f5808 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xba8f02af sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcc9c058f sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd73fb80a sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe0a4db5f __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe374d5da sas_task_abort +EXPORT_SYMBOL_GPL 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drivers/scsi/scsi_tgt 0xde96f3e3 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xebcf603f scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x00f476cd iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1a01de7e iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1e873c6a iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2331d646 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x33b6410c iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x39a6a659 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3dcf68a7 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x473848b5 iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x65f58db6 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7b305df3 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7cadad8e iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f92440d iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x922f9b14 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b339afe iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9e9fcd24 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb7c04c1e iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbca27085 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc2cd9d0d iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc9c5717e iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd66ca079 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xedf99855 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf16c5ad7 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3e05118e srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x6b1609d8 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x714d1822 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x89c704c0 srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xfec8e196 srp_remove_host +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x16ef8a7b spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x1a98d0e7 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x1fd52870 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x965bdfe7 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb5e8d6a4 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xbd1776f7 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x3b6c977d comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x9a46a38d comedi_alloc_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x0e5a6d86 das08_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x299be7a3 das08_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20 das08_cs_boards +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95 labpc_1200_is_unipolar +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a range_labpc_1200_ai +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347 labpc_1200_ai_gain_bits +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xf08fae70 labpc_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xf87dbbfc labpc_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x500b5e61 ni_gpct_device_destroy +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x54b1204f ni_tio_insn_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x731abdef ni_tio_arm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8bcfd908 ni_gpct_device_construct +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xa83f6751 ni_tio_init_counter +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xad39697f ni_tio_set_gate_src +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xd8d40656 ni_tio_rinsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe91c78d2 ni_tio_winsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x3fef6714 ni_tio_handle_interrupt +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x5ee5a959 ni_tio_cmdtest +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xa333c139 ni_tio_set_mite_channel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xd9202525 ni_tio_cancel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xda0ec4bf ni_tio_cmd +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xf67b181d ni_tio_acknowledge_and_confirm +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL 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drivers/usb/storage/usb-storage 0x46fe972a usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4740bfff usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6a6d9899 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x71c6b27e usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x72afc3d7 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x734e323e usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7818c5b2 usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x83989eb2 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa54f2ef8 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd164f0f1 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd17e7e4e usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd87c4ee5 usb_stor_bulk_transfer_sg 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drivers/uwb/uwb 0xbfa2a3f7 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcc30c52d uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xceb13402 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd47565a2 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdf4b32a0 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe987eb7e uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xee147c0e uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfb2b9576 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xf978d07d whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0038a7e7 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0c9cf609 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0dd13738 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x104e155f wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1324addc wlp_prepare_tx_frame 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+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0fd0d410 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x14d890ba ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1c4637c5 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x252f1abc ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x64f5aa57 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb2cbaaf1 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xbcd301aa fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x2e9badbb fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x3b6f273e fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x1474e65a sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xcd6e566f sis_free_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x79604d68 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x943feb52 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xbe97de1d unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xc51bd1b3 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xffb97d40 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x30f27279 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x3cc9d7fc vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xf2b8df05 vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x0587a47d w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x47dfc6ed w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x4d94c26d w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x63d859d4 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL 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+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x998b9660 dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9a639684 dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9e15446b dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa8b517a4 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb798995e dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc600b6bd dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc97ac10b dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd0fc2744 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd155a0e9 dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd69f2ea7 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xdb23ef9b dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe6f702e6 dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0xea704d42 compat_dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x5431d4ff dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x57495fda dccp_invalid_packet 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net/netfilter/nf_conntrack 0x8559656f nfnetlink_parse_nat_setup_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x88b2711c __nf_ct_expect_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d39bfeb nf_ct_delete_from_lists +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8f95dffd nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89 nf_conntrack_htable_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f nf_ct_invert_tuplepr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x92592f06 nf_conntrack_l4proto_tcp4 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9458daaa __nf_conntrack_confirm +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9a109631 nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1 nf_ct_free_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9d5f9062 nf_conntrack_l4proto_udp4 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9ec7cf14 nf_ct_expect_related_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa06f4d84 nf_conntrack_l4proto_tcp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0fd5c54 nf_ct_insert_dying_list +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa1a66696 nf_conntrack_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xabd97c26 nf_conntrack_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaf69f2e0 nf_conntrack_l4proto_udp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb29f53df nf_conntrack_l4proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb446ee37 nf_ct_unexpect_related +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e nf_ct_l3proto_module_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb6aed0ca __nf_conntrack_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb7928d03 nf_ct_expect_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbaf3f819 nf_conntrack_l3proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d nf_ct_expect_hsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 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+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0ac515d4 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1d926a5a cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x26a67b09 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2b227442 cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ba1859c cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3fda9ead cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x408297e0 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5a7afaa8 cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5b6d7218 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5d3f5b4f cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x65044062 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x679eee9d cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6d4db4ab cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x77785bf0 cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaa86c79c cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb0f280d9 cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb336ebb1 cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbcbb841c cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc5af4dc6 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc8f3e125 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcdc05da4 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd4707189 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe9326b8d cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xedcab3c2 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xee77ca6a cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x0ac97936 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x20d007dc ipcomp_init_state +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xcc674c68 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf16dc182 ipcomp_destroy +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x012647a6 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x037ce058 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x03d0da31 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07099b96 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x12eb6a63 snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x183e4bb5 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a0cab4e snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ea50d9a snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f7e7773 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1fd9fe3e snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x256d5671 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2b5a8473 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2df32267 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2fc48268 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39b8e27a snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d6edfff snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3ddffc44 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x487d9c34 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4c527d09 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ff3d5b4 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55973cb0 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x567eff71 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a415c84 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a4ab652 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x65d62dba snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77198f40 snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77506c8f snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a98a356 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e4c73a3 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f39cf4f snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x801ba0a5 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x82304a19 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87040282 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8a3cc8d5 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8dffe442 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x90f5345d query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x91af4bc4 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x96a9046e snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9736ce20 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97be1afc snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x99f1988b snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d0213c2 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d264300 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ebb0fc5 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2279c1b snd_hda_get_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa36a0f12 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa43ba981 snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xafac14fc snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb083fb6b snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb326e641 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb5794ac3 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb89b3332 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbbca70d9 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc7e44088 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd176578f snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd358c3f8 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd53b094b snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdbab0fb1 snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe2b0f3b6 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe347f747 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe3e1ec8a snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe46f7daa snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4af18af snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe52310b7 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe67c3ed0 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeeccff2b snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0d919ed snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf1f8886b snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf58d3577 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf713c82d snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf8a1c29e snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfc5985c6 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff47f9b3 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x35d257ca soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x4ae48d9a ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x5589afaa soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x610080e0 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf5d43201 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x5e05421a soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xa3524484 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x2fc40df0 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x55a37294 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x2471083b soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xfc445a0d ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x193388cc soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x3b75ca87 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x5ee0dc87 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xb5d09f27 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x07a4cfa2 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1b143398 aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1c2df210 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x26f5ff8f aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x825b4cbd soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8a70106f aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa2327b65 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x8bfc8033 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x914c53cd twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x4a44e636 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x230c261a uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x7bfeda5f soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x169fe9b2 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x515f9f20 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x91f592ba wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x8d8313e0 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xc908b404 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x0b3b8da1 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x9c80b5c2 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x93518e4d soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xfd69ec08 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x94a5122c wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xfc164918 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x15dd4850 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x2c169866 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3180d595 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xbd51aecf wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1aad8656 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xa65e596a wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd794604d soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xfae3935a wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x7c77e1f4 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xfcb9338e soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x0eacb749 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xd09dc891 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x9933a660 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xd3191cff soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xcbc04789 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xf4187e71 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x115ebbfd soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x255f5f50 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x6f7bd689 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd8455bc2 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x0a6401f0 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x80f4668e soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0326fbb2 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03f1d577 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0511e817 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b58934f snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c1024e1 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x16210a24 snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17eeef12 snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1eb9b65a snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1fa930a9 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2013d778 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x24217679 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2a97df24 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2bf3d3cb snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2c930671 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2f3511ad snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32220df7 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x333e907a snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x33e397f3 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3515b7f6 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x352ce38b snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3c66eb69 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x441bc516 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4b0b6738 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d00bfce snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x599a3a10 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d120539 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d1ac3c2 snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x611aefcb snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x681cb253 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d9cc46f snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x744ffa70 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cbace0e snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x88017eae snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x89644f5b snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x917358a4 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x94926760 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9910a7ff snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9bf79be7 snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9e81b231 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa98a961c snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa9d33951 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xabd07dcc snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xad429730 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae5b4347 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaefe57a5 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb18f9c5b snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb3f3b8b5 snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbfd1b74d snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc378d5ac snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xca1794c6 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcae45e1f snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd0529b2 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0xcbc4829f usb_root_hub_lost_power +EXPORT_SYMBOL_GPL vmlinux 0xcbc57fb1 ata_pci_device_do_resume +EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d inet_twdr_hangman +EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305 is_dock_device +EXPORT_SYMBOL_GPL vmlinux 0xccb61d80 alloc_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa sata_deb_timing_hotplug +EXPORT_SYMBOL_GPL vmlinux 0xcd1ca2cb iommu_domain_has_cap +EXPORT_SYMBOL_GPL vmlinux 0xcd2b4f23 devres_get +EXPORT_SYMBOL_GPL vmlinux 0xcd5eed90 mnt_want_write_file +EXPORT_SYMBOL_GPL vmlinux 0xcd67aa88 pci_sriov_migration +EXPORT_SYMBOL_GPL vmlinux 0xcd7a4a1f fuse_conn_get +EXPORT_SYMBOL_GPL vmlinux 0xcd8de0b2 fsnotify +EXPORT_SYMBOL_GPL vmlinux 0xcdca3691 nr_irqs +EXPORT_SYMBOL_GPL vmlinux 0xcdf69d6c part_round_stats +EXPORT_SYMBOL_GPL vmlinux 0xce0aead5 disk_get_part +EXPORT_SYMBOL_GPL vmlinux 0xce147ea2 dm_rh_inc_pending +EXPORT_SYMBOL_GPL vmlinux 0xce287b8d regulator_set_voltage +EXPORT_SYMBOL_GPL vmlinux 0xce2efff5 debugfs_create_u16 +EXPORT_SYMBOL_GPL vmlinux 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inet_ctl_sock_create +EXPORT_SYMBOL_GPL vmlinux 0xd16712f3 crypto_check_attr_type +EXPORT_SYMBOL_GPL vmlinux 0xd173c050 ata_sff_hsm_move +EXPORT_SYMBOL_GPL vmlinux 0xd1c240cf page_cache_sync_readahead +EXPORT_SYMBOL_GPL vmlinux 0xd1da7698 kobject_rename +EXPORT_SYMBOL_GPL vmlinux 0xd1ef5c96 hid_connect +EXPORT_SYMBOL_GPL vmlinux 0xd200aeb0 ata_sas_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xd225724c cpufreq_unregister_governor +EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1 __round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xd2a6dcb7 rtc_irq_set_freq +EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0 work_on_cpu +EXPORT_SYMBOL_GPL vmlinux 0xd2e59cac xenbus_dev_changed +EXPORT_SYMBOL_GPL vmlinux 0xd3068d91 pci_find_ht_capability +EXPORT_SYMBOL_GPL vmlinux 0xd3451a3a fl6_sock_lookup +EXPORT_SYMBOL_GPL vmlinux 0xd346801c pci_hp_deregister +EXPORT_SYMBOL_GPL vmlinux 0xd37eda78 find_get_pid +EXPORT_SYMBOL_GPL vmlinux 0xd39ce927 platform_driver_probe +EXPORT_SYMBOL_GPL vmlinux 0xd3bc427b xfrm_audit_state_replay_overflow +EXPORT_SYMBOL_GPL vmlinux 0xd4b8132e find_symbol +EXPORT_SYMBOL_GPL vmlinux 0xd4bcb26d __i2c_board_lock +EXPORT_SYMBOL_GPL vmlinux 0xd51f29c3 __sock_recv_timestamp +EXPORT_SYMBOL_GPL vmlinux 0xd59e6eb9 pci_block_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xd5c46909 vfs_cancel_lock +EXPORT_SYMBOL_GPL vmlinux 0xd5cc720d fixed_phy_set_link_update +EXPORT_SYMBOL_GPL vmlinux 0xd60fbf25 sata_link_debounce +EXPORT_SYMBOL_GPL vmlinux 0xd6b30247 da903x_reads +EXPORT_SYMBOL_GPL vmlinux 0xd6d1b03f generic_fh_to_dentry +EXPORT_SYMBOL_GPL vmlinux 0xd6d5fb59 device_add +EXPORT_SYMBOL_GPL vmlinux 0xd6feefa5 agp_num_entries +EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7 schedule_hrtimeout +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd760771e ata_link_abort +EXPORT_SYMBOL_GPL vmlinux 0xd76152f4 pci_intx +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd78720c9 devres_find +EXPORT_SYMBOL_GPL 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usb_register_dev +EXPORT_SYMBOL_GPL vmlinux 0xdff59013 dm_device_name +EXPORT_SYMBOL_GPL vmlinux 0xdffa6978 set_cpus_allowed_ptr +EXPORT_SYMBOL_GPL vmlinux 0xe04e2835 led_trigger_event +EXPORT_SYMBOL_GPL vmlinux 0xe06ab6a9 ata_host_alloc_pinfo +EXPORT_SYMBOL_GPL vmlinux 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5 mce_notify_irq +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe16eb4fa vfs_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xe1ce4d6e d_materialise_unique +EXPORT_SYMBOL_GPL vmlinux 0xe1fc5d6d dm_rh_mark_nosync +EXPORT_SYMBOL_GPL vmlinux 0xe22a9fa5 register_posix_clock +EXPORT_SYMBOL_GPL vmlinux 0xe24571a5 trace_define_field +EXPORT_SYMBOL_GPL vmlinux 0xe24ff917 blocking_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0xe277b5dc inotify_inode_queue_event +EXPORT_SYMBOL_GPL vmlinux 0xe279d131 ring_buffer_normalize_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xe285c468 rt_mutex_destroy +EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff is_hpet_enabled +EXPORT_SYMBOL_GPL vmlinux 0xe3031f2f usb_alloc_urb +EXPORT_SYMBOL_GPL vmlinux 0xe3106f50 securityfs_remove +EXPORT_SYMBOL_GPL vmlinux 0xe3473794 xenbus_map_ring_valloc +EXPORT_SYMBOL_GPL vmlinux 0xe34dd3a5 invalidate_inode_pages2_range +EXPORT_SYMBOL_GPL vmlinux 0xe35721f3 scsi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xe373d6d9 mnt_drop_write +EXPORT_SYMBOL_GPL vmlinux 0xe37417d9 driver_attach +EXPORT_SYMBOL_GPL vmlinux 0xe3c42c91 nf_unregister_afinfo +EXPORT_SYMBOL_GPL vmlinux 0xe3e041d0 blk_insert_cloned_request +EXPORT_SYMBOL_GPL vmlinux 0xe3e4ee0e md_new_event +EXPORT_SYMBOL_GPL vmlinux 0xe442759e posix_timer_event +EXPORT_SYMBOL_GPL vmlinux 0xe4428977 register_kprobes +EXPORT_SYMBOL_GPL vmlinux 0xe4567671 udp4_lib_lookup +EXPORT_SYMBOL_GPL vmlinux 0xe49b0942 lookup_instantiate_filp +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4b26f11 get_dcookie +EXPORT_SYMBOL_GPL vmlinux 0xe4d9284b queue_delayed_work +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe513afc0 cache_k8_northbridges +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe5675a92 relay_close +EXPORT_SYMBOL_GPL vmlinux 0xe606f0de ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f gpio_unexport +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe6836671 debugfs_create_x8 +EXPORT_SYMBOL_GPL vmlinux 0xe68f6d12 ring_buffer_reset_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe6a6f934 blk_trace_startstop +EXPORT_SYMBOL_GPL vmlinux 0xe6b87b01 cpuidle_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xe6d17fe7 relay_flush +EXPORT_SYMBOL_GPL vmlinux 0xe727605e devm_kzalloc +EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877 pcpu_base_addr +EXPORT_SYMBOL_GPL vmlinux 0xe80ddf24 usb_register_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xe81af31a crypto_alg_sem +EXPORT_SYMBOL_GPL vmlinux 0xe82a2b30 vfs_setxattr +EXPORT_SYMBOL_GPL vmlinux 0xe85be8ee usb_reset_configuration +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe8a0d9e3 ata_std_error_handler +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xe96ceda9 sata_pmp_qc_defer_cmd_switch +EXPORT_SYMBOL_GPL vmlinux 0xe9d51631 sysfs_put +EXPORT_SYMBOL_GPL vmlinux 0xe9e4eb01 sdio_claim_irq +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea115e29 ata_bmdma_status +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea418e0f atapi_cmd_type +EXPORT_SYMBOL_GPL vmlinux 0xea5bb525 usb_free_urb +EXPORT_SYMBOL_GPL vmlinux 0xea5d29d1 cleanup_srcu_struct +EXPORT_SYMBOL_GPL vmlinux 0xea5f6448 kill_pid_info_as_uid +EXPORT_SYMBOL_GPL vmlinux 0xea6656b5 scsi_mode_select +EXPORT_SYMBOL_GPL vmlinux 0xea8d4bec setup_irq +EXPORT_SYMBOL_GPL vmlinux 0xea9ebe56 inet_twsk_purge +EXPORT_SYMBOL_GPL vmlinux 0xeaa68908 power_supply_changed +EXPORT_SYMBOL_GPL vmlinux 0xeae2cec0 fib_rules_lookup +EXPORT_SYMBOL_GPL vmlinux 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL vmlinux 0xeb29145e ring_buffer_empty +EXPORT_SYMBOL_GPL vmlinux 0xeb406e4f inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL vmlinux 0xeb9e7fcc crypto_alg_lookup +EXPORT_SYMBOL_GPL vmlinux 0xeba7b12e firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0xebbb9b6f ata_sff_irq_clear +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec4c6d72 inet_unhash +EXPORT_SYMBOL_GPL vmlinux 0xeca03020 invalidate_inode_pages2 +EXPORT_SYMBOL_GPL vmlinux 0xed0690a5 ehci_cf_port_reset_rwsem +EXPORT_SYMBOL_GPL vmlinux 0xed185555 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xed2bbe2e usb_buffer_free +EXPORT_SYMBOL_GPL vmlinux 0xed53136c hidinput_connect +EXPORT_SYMBOL_GPL vmlinux 0xed6966a2 spi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xedaa0254 crypto_unregister_alg +EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67 gnttab_end_foreign_access +EXPORT_SYMBOL_GPL vmlinux 0xedd07728 task_current_syscall +EXPORT_SYMBOL_GPL vmlinux 0xedd355a9 ring_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xeddcb27d xenbus_dev_error +EXPORT_SYMBOL_GPL vmlinux 0xee0729bf xfrm_audit_state_icvfail +EXPORT_SYMBOL_GPL vmlinux 0xee57195e dm_unregister_path_selector +EXPORT_SYMBOL_GPL vmlinux 0xeef4163d scsi_get_vpd_page +EXPORT_SYMBOL_GPL vmlinux 0xeef8774e __inet_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0xef4f1b68 __class_create +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xefa0da8f ring_buffer_alloc_read_page +EXPORT_SYMBOL_GPL vmlinux 0xefc49aa9 aead_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefec100f inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0xf0002df6 rtc_read_alarm +EXPORT_SYMBOL_GPL vmlinux 0xf051d83c crypto_dequeue_request +EXPORT_SYMBOL_GPL vmlinux 0xf0a62a6b cpci_hp_unregister_bus +EXPORT_SYMBOL_GPL vmlinux 0xf1106efc ata_port_pbar_desc +EXPORT_SYMBOL_GPL vmlinux 0xf16d556c __xenbus_register_frontend +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf21a0d8c xenbus_watch_pathfmt +EXPORT_SYMBOL_GPL vmlinux 0xf21caae4 ata_common_sdev_attrs +EXPORT_SYMBOL_GPL vmlinux 0xf223b3fc acpi_smbus_register_callback +EXPORT_SYMBOL_GPL vmlinux 0xf268e682 crypto_ablkcipher_type +EXPORT_SYMBOL_GPL vmlinux 0xf26f9177 ata_eh_freeze_port +EXPORT_SYMBOL_GPL vmlinux 0xf28a20c9 fuse_request_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf29c914c aead_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xf2c030eb platform_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf2feb8ca eventfd_fget +EXPORT_SYMBOL_GPL vmlinux 0xf328eb0e init_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf37e3073 debugfs_rename +EXPORT_SYMBOL_GPL vmlinux 0xf389aa73 bus_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xf399106b ata_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf3c18166 ata_sff_dumb_qc_prep +EXPORT_SYMBOL_GPL vmlinux 0xf423d29c fuse_get_req +EXPORT_SYMBOL_GPL vmlinux 0xf4742e1a kick_process +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f iommu_domain_free +EXPORT_SYMBOL_GPL vmlinux 0xf4ad9803 pciserial_resume_ports +EXPORT_SYMBOL_GPL vmlinux 0xf4fc1b7c spi_sync +EXPORT_SYMBOL_GPL vmlinux 0xf511feed sdio_f0_writeb +EXPORT_SYMBOL_GPL vmlinux 0xf518e5ab ring_buffer_consume +EXPORT_SYMBOL_GPL vmlinux 0xf52457f5 usb_queue_reset_device +EXPORT_SYMBOL_GPL vmlinux 0xf52a6469 usb_set_device_state +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf589b391 inet_twdr_twkill_work +EXPORT_SYMBOL_GPL vmlinux 0xf5945bac gnttab_free_grant_references +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf61fa5a7 dm_rh_bio_to_region +EXPORT_SYMBOL_GPL vmlinux 0xf62dca83 usb_deregister_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xf63c5570 device_create_vargs +EXPORT_SYMBOL_GPL vmlinux 0xf6739717 ata_bmdma32_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6c52278 regulator_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf7016530 xenbus_gather +EXPORT_SYMBOL_GPL vmlinux 0xf75a54d3 crypto_aead_type +EXPORT_SYMBOL_GPL vmlinux 0xf795fbd1 ata_host_start +EXPORT_SYMBOL_GPL vmlinux 0xf808356f sg_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf84de58f pci_enable_sriov +EXPORT_SYMBOL_GPL vmlinux 0xf87274c9 usb_autopm_set_interface +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8942a4b usb_sg_cancel +EXPORT_SYMBOL_GPL vmlinux 0xf8cb1d8b crypto_shash_final +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf91ec57d dm_dispatch_request +EXPORT_SYMBOL_GPL vmlinux 0xf974c63f driver_create_file +EXPORT_SYMBOL_GPL vmlinux 0xf9765833 dmi_match +EXPORT_SYMBOL_GPL vmlinux 0xf97666a0 set_memory_rw +EXPORT_SYMBOL_GPL vmlinux 0xf9997839 console_drivers +EXPORT_SYMBOL_GPL vmlinux 0xf99ad5c8 queue_delayed_work_on +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xfa0fc240 __fsnotify_parent +EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662 scatterwalk_start +EXPORT_SYMBOL_GPL vmlinux 0xfa400ae6 sdio_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xfa8b9a83 blk_trace_remove +EXPORT_SYMBOL_GPL vmlinux 0xfb2a151d xfrm_audit_state_add +EXPORT_SYMBOL_GPL vmlinux 0xfb785ca8 blk_update_request +EXPORT_SYMBOL_GPL vmlinux 0xfb882fb7 wmi_query_block +EXPORT_SYMBOL_GPL vmlinux 0xfbc016de blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xfbe495f4 usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc47b2b7 crypto_grab_skcipher +EXPORT_SYMBOL_GPL vmlinux 0xfc488fcb ata_sff_freeze +EXPORT_SYMBOL_GPL vmlinux 0xfc5389af dm_register_path_selector +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcc50b5c devres_close_group +EXPORT_SYMBOL_GPL vmlinux 0xfcd6f19d hid_report_raw_event +EXPORT_SYMBOL_GPL vmlinux 0xfcef4631 clockevent_delta2ns +EXPORT_SYMBOL_GPL vmlinux 0xfcfedbcb devres_open_group +EXPORT_SYMBOL_GPL vmlinux 0xfd038600 relay_file_operations +EXPORT_SYMBOL_GPL vmlinux 0xfd4c6ca6 platform_device_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xfd51b281 gnttab_end_foreign_access_ref +EXPORT_SYMBOL_GPL vmlinux 0xfd771b19 ata_pci_sff_prepare_host +EXPORT_SYMBOL_GPL vmlinux 0xfdd32b79 usb_store_new_id +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfdf6e5fa blk_execute_rq_nowait +EXPORT_SYMBOL_GPL vmlinux 0xfe0a64ef zap_vma_ptes +EXPORT_SYMBOL_GPL vmlinux 0xfe1189e4 ata_acpi_gtm +EXPORT_SYMBOL_GPL vmlinux 0xfe6415de alloc_page_buffers +EXPORT_SYMBOL_GPL vmlinux 0xfe727411 get_phys_to_machine +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff1990ab tty_get_pgrp +EXPORT_SYMBOL_GPL vmlinux 0xff32a267 ata_dev_next +EXPORT_SYMBOL_GPL vmlinux 0xff585fff kobject_uevent_env +EXPORT_SYMBOL_GPL vmlinux 0xff590a4c acpi_smbus_unregister_callback +EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL vmlinux 0xff728518 sdio_writew +EXPORT_SYMBOL_GPL vmlinux 0xff8e0aa6 add_timer_on +EXPORT_SYMBOL_GPL vmlinux 0xff994ec3 ring_buffer_record_enable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xfff53502 bus_for_each_dev +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/amd64/server.modules +++ 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+xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +zatm +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/amd64/generic.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/amd64/generic.modules @@ -0,0 +1,2471 @@ +3c359 +3c574_cs +3c589_cs +3c59x +3w-9xxx +3w-xxxx +6pack +8021q +8139cp +8139too +8255 +8390 +9p +9pnet +9pnet_rdma +9pnet_virtio +a100u2w +a3d +aacraid +ab3100-core +abituguru +abituguru3 +abyss +ac97_bus +acecad +acenic +acerhdf +acer-wmi +acl7225b +acpiphp +acpiphp_ibm +acquirewdt +act200l-sir +act_gact +act_ipt +actisys-sir +act_mirred +act_nat +act_pedit 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+snd-mpu401-uart +snd-mtpav +snd-mts64 +snd-nm256 +snd-opl3-lib +snd-opl3-synth +snd-oxygen +snd-oxygen-lib +snd-page-alloc +snd-pcm +snd-pcm-oss +snd-pcsp +snd-pcxhr +snd-pdaudiocf +snd-portman2x4 +snd-pt2258 +snd-rawmidi +snd-riptide +snd-rme32 +snd-rme96 +snd-rme9652 +snd-sb16-dsp +snd-sb-common +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-emul +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-soc-ad73311 +snd-soc-ak4104 +snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-tea575x-tuner +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-usb-us122l +snd-usb-usx2y +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-virtuoso +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-ymfpci +soc_camera +soc_camera_platform +softcursor +softdog +solos-pci +sony-laptop +sound +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedstep-lib +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +ssb +sscape +ssfdc +sstfb +ssv_dnp +st +stallion +starfire +stb0899 +stb6000 +stb6100 +stex +stinger +stir4200 +stkwebcam +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +sx +sx8 +sxg_nic +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +t1pci +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda8261 +tda826x +tda827x +tda8290 +tda9840 +tda9887 +tdfx +tdfxfb +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +teles_cs +tg3 +tgr192 +thinkpad_acpi +thmc50 +tifm_7xx1 +tifm_core +tifm_ms +tifm_sd +tileblit +timed_gpio +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tlclk +tle62x0 +tmdc +tmiofb +tmp401 +tms380tr +tmscsim +tmspci +toim3232-sir +toshiba_acpi +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_bios +tpm_infineon +tpm_nsc +tpm_tis +tps65010 +trancevibrator +tranzport +tridentfb +trix +ts5500_flash +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +ttm +ttpci-eeprom +ttusb_dec +ttusbdecfe +tua6100 +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tvaudio +tveeprom +tvp5150 +tw9910 +twidjoy +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +twofish-x86_64 +typhoon +u132-hcd +uart401 +uart6850 +ubi +ubifs +ucb1400_core +ucb1400_ts +udf +udlfb +ueagle-atm +ufs +uinput +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultracam +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +unioxx5 +upd64031a +upd64083 +uPD98402 +usb8xxx +usbatm +usb_debug +usbdux +usbduxfast +usb_gigaset +usbhid +usbip +usbip_common_mod +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-compat-ioctl32 +v4l2-int-device +vcan +ves1820 +ves1x93 +vesafb +veth +vfat +vga16fb +vgastate +vgg2432a4 +vhci-hcd +via +via686a +via-agp +viafb +via-ircc +via-rhine +via-rng +via-sdmmc +via-velocity +vicam +video +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vivi +vlsi_ir +v_midi +vmk80xx +vmlfb +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w35und +w83627ehf +w83627hf +w83627hf_wdt +w83697hf_wdt +w83697ug_wdt +w83781d +w83791d +w83792d +w83793 +w83877f_wdt +w83977af_ir +w83977f_wdt +w83l785ts +w83l786ng +w90p910_ts +w9966 +w9968cf +wacom +wacom_w8001 +wafer5823wdt +walkera0701 +wanrouter +wanxl +warrior +wavelan_cs +wbsd +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +x38_edac +xc5000 +xcbc +xen-blkfront +xen-fbfront +xenfs +xen-kbdfront +xen-netfront +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_iprange +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +zatm +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/amd64/server +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/amd64/server @@ -0,0 +1,9999 @@ +EXPORT_SYMBOL arch/x86/kvm/kvm 0x205a8d25 kvm_read_guest_atomic +EXPORT_SYMBOL arch/x86/kvm/kvm 0xee025a2d kvm_cpu_has_pending_timer +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0x92dd2e81 suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0x47c1c3e3 uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x12d6a02f pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x1d56de7a paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0x33993715 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x376c659c pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x464464c0 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x5392edc0 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x606bc23f pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x87f0471a paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0xa20159f4 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xc771a3b7 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0xdacaf45e pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xdd127973 pi_do_claimed +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x22b64ed4 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x2fae71df gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x3ffb1873 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x407f8c2c gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x5c322972 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x87d95285 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x8e07d6d3 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x9a5305fb gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x9bf0fa72 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x9d6ed520 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xa1da016f gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0xc3345605 gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xcc1d1024 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xccee2e49 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xe8216a13 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0xf4d2fd5e gs_close +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x01ab3003 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2226ff02 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x34dc1593 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x36c15ed0 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44f88466 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5171d541 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x542d044a ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x692d5a91 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6bf928d8 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x72562b9a ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x84a44368 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x875a857a ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8ecd7b33 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa8e62df7 ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbaa2e3b0 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbbbfc43a ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbd9bff42 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc187121c ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xeb1b1916 ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xefb0f4c9 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf4d1fb20 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf63a787c ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf9f6497e ipmi_set_my_address +EXPORT_SYMBOL drivers/char/nsc_gpio 0x170b782c nsc_gpio_read +EXPORT_SYMBOL drivers/char/nsc_gpio 0x48a72876 nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0xd5c9a114 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0xd4f8a712 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0xdea9e2e4 edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xf3b0febc edac_mc_find +EXPORT_SYMBOL drivers/firewire/firewire-core 0x1cf5895e fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x2a941bb2 fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0x2df146e3 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x49a29946 fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4c979a34 fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e86dd83 fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e8911df fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0x515f9e10 fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0x57278583 fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5ffb366f fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x60de8754 fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7d2b2f9e fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c34de54 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0x937516ae fw_iso_context_start +EXPORT_SYMBOL drivers/firewire/firewire-core 0x95105cc7 fw_send_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0x96554c9e fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0x9d8505d4 fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xa84c9da9 fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xa9b79a39 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb5c36f46 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb690053e fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb83a3c69 fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0xbd1628d2 fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe323685c fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf1ac1058 fw_iso_context_queue +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x019ea635 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06979572 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f53389 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x07591126 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x08eeea55 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a1df318 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c006469 drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f3a2fab drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x114f081f drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x117516ce drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x12e0f0cf drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x14079a4c drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x15f4847d drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1623d2f6 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b664190 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ccd5be5 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1cfd4749 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1e4b22e6 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20be2e92 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x22a21f11 drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x23e5494d drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2789a73e drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x33b5fdbc drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3730dbed drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x39e605c2 drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ab04dc7 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ca15fc2 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3dc576ae drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f137cab drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3fca9162 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x417c40e7 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4603c1c5 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x46bf2c9a drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x471f1ac6 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x48d1845e drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49b483e9 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e0826ed drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5060a72f drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x511c0337 drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53b67f2c drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0x54158547 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55508564 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55c031d2 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x57d2a5d2 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58ca5d23 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5999c3a4 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a04e53b drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a509897 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b491819 drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b49a79c drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6047f925 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6160cefa drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6213b09d drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x63a39e9d drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6449558f drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x66944a05 drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x68058887 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x69024cd8 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6c45eead drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ef3eef8 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f546720 drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x71894e33 drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x728bc3e8 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7d507ffb drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7eeb29b4 drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a0b335 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x84e8d5e0 drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x851f3bbe drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x856adc85 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8598f686 drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x86e46a3e drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x872a300b drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d57d879 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e741de2 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f04cd80 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f37f66a drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f3d538c drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94be8c6f drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x967535e5 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a673c43 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9bd5dd92 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa20001f6 drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2b5c9ac drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4aa72f8 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xab33e2f1 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xafa954ac drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb01f36d8 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2a07ab4 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb72710fb drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8a65689 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb95c785d drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbae09ed9 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbbbeeddf drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe7aa245 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc02be427 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1ec3252 drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3cc7eb6 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc99ac4e3 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd530815 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd137fe6c drm_compat_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd177b73d drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd186f6fb drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2d51f78 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd30d0793 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd702d93f drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xda40b55b drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb63d241 drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe43e4dac drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe4bd3388 drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe558e3c6 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe6d5cb67 drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8fd3141 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xed1c83a6 drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf129a204 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2004641 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf39ae836 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf3d9f945 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf5e16234 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf97de9b4 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe07228a drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff64cfa5 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xffd63eba drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x151d1119 intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x28398a3a intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x905a33a2 i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x9904306b intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x64384ca6 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xa0b1934f radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xbe406cce radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11c326e0 ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x139cd04b ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x25e7a435 ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34b80ee9 ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4552ffeb ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4c4a5894 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x636c5c59 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7064c78c ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x79491e8f ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8cea5373 ttm_bo_device_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8dde3d30 ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91317586 ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x98ae3659 ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9a9619a5 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb0987a46 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb896afb3 ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbedc804a ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf10070e ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd6496f80 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd75b5eb1 ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd997f520 ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed0fa494 ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf20a5fe8 ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf817f5ae ttm_bo_unref +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x21afe5c1 i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x23417129 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x71c63c81 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc0bc6f89 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x276b3fa6 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x9f61bace amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x025098b3 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04264e74 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0edab95d hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x106f17bc hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x119cfcd1 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1453b920 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x14958cec hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548 dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x15d4b89b hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2108f8ef hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3532d3ba hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3edd161e hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x41dac220 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x46b5cd9d hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4afd5772 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4ca2a9b8 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d24f984 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x52c882a6 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x584933ac hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5995aa92 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5c9049d1 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ebd2a34 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x654c49c8 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x67130de5 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6764d2ea hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c9aaac9 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x716c15b8 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7612b760 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x768df57c dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78a4c07d hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d73813f hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7f0088ad hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80455a20 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8054bf3d hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x80ecce33 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x87e57f5c hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x89190246 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ba607cb hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8c8cff93 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8e09e435 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f9b84a3 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x939088cb hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x95e57eeb hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa58299e7 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa87378b5 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8ef46f9 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacdb226b hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb27fcfd5 hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc135675f hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc8139cb3 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0210bd4 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd2ede2da hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd48a5022 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd6314c11 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xde1d50eb hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef81a1da hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf098a186 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf0a3604f hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf48e14f7 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf780902f hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd0236d7 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd1386f3 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd1db4b6 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd9b3410 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2509bb14 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x68d22aa4 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcbeca9d0 ohci1394_stop_context +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x39a458dc rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x5b57241a rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9eca9f64 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xa1673701 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x10acf415 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x285277ac ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x31f35a05 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x35e31442 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x370724d3 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x425ad590 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x427ad668 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4eab87d2 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x51684e5d ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x60ff070e ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x62fa96da ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x68624b16 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x960c6ee5 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb4ed6f00 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdafa7227 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfbdba4fd ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfed339cb ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x03174afd ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x10ca3f5b ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x16251af8 ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x171e4609 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1f60aa26 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x20b1d245 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2174c471 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2b755ef5 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2dd29fd6 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2dfcb319 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x32f8f69e ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3e53afd1 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3e6ea194 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x40af03a5 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x44766b66 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x447a8c25 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x45b9ecab ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4791943c ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48bd0df8 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4b0fa8c6 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5120479c ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55d4b3d9 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56fdae80 ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x588d60a7 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a7216c4 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a95b692 ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5bb07153 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f9b5326 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x60d23fa1 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x617973be ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6374944c ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b467ee9 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d2be39b ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70af0b6b ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70e3e2e1 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7196acd9 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x71b2a012 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72d51915 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72d8af71 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x78e3154b ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7a6688f7 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8896e43b ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d9c77e9 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x91135297 ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x98ad2bc1 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x99f60cff ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d14abc9 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e922735 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa64bdd4c ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa95517ad ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbb0daedf ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbede0bdd ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1e4a9cd ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc737f5f7 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcc141fbe ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2059fd3 ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd62028f0 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd66e84b3 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe181a2d6 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe4990714 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5dee867 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe7e516f0 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xec7ec306 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed56d476 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6bc7702 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf9f9067c ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x06296314 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1852b654 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x47e9aac7 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x56a266c3 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5f5648bd ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6aa725a3 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8c8aff9c ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbbe12d03 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbf2bb4a7 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xcfd31d63 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd04aefc8 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xed85be74 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1c2694b3 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x20b256e2 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2d791d42 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3a217567 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5fcbe248 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8bea579e ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf332bd12 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2c3bf252 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x417db987 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x4ea0d2d0 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x551f0336 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5bead1fd iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc1a1ab68 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc5e4e4d4 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf80444fd iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x04e332e4 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x13b24ab5 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1624ade2 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2d221fd7 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3dabe897 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4346ced6 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x49c64b16 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7f1eacfd rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x962c5d43 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9bd67527 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9e9c73ce rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa0f5e971 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc0b2a6e5 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdb6e8803 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdec55827 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe8e00021 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf5041c1b rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfebd6a4a rdma_create_id +EXPORT_SYMBOL drivers/input/gameport/gameport 0x041274e7 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x06fd3179 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0x0f8a1337 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x129c7391 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x16d00621 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x3235acd0 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x688efbce gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xa3ce0775 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xdc275290 gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x339dbe12 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x5b84998d input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x69d7cadf input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xfa16abbb input_free_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3c63aed7 capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x415a07f2 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x5362668a capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6025200c capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7f9768a7 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x854cdb67 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x86bd5aed detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x97acb10a capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb483dc5e capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf68e7803 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfa1d8e4a capi20_set_callback +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x052fb9c8 b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x60074436 b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x6842265f b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x82526053 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8604a7b6 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8bb4cd7d b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9077e4b9 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x92cab36b b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa4fc2d03 b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb833be34 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd141a1f4 avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xda9680ab b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe2dbc62e b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xef277783 b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xefcefaa1 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x04ed5ea8 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x06b52c65 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x29327c92 b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4a1d1c9f b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4f9b68f8 t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8feb74f6 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x930b6406 b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xb974a2d7 b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe4aa243b b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x434f00f8 proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x8ae3cdb2 hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x1bacb200 isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x20570282 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x9a5d5701 isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xc4912dcc isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xe8afab6f isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x26fcb9c9 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x3ee8a667 isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x479620f8 register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x05be59ea mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x09be35e1 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x20855bc6 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x22b45f5f create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2f0487f8 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3019b757 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3055eb37 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x35ba7d69 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3654fc83 mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4322bb19 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6b2f1714 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa063573f mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaa85e77c recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb2453d27 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb4fd5d89 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbbadc0b0 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc901ff3c get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd0225bb8 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd412190c queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe452cc1b dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf32d286b mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x0402fc70 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x6f4084da mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x74c8e93a mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x8d4321b3 mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xcbfc2532 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xc462cb5a qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xe57651ad xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x9235d22a xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x115020c4 flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2081a623 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2beeca4e flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2d3bbb10 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2d452c46 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x344fa7ed flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3c1ce9d3 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x457492d8 flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5f4a3979 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x604e2bdd flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x614b29dc flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x630efccc flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6626f081 flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7aca936b flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x80eeab2d flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x827fe1d9 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xac79cfab flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbcae03f3 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbcf7b6fa flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xdc42726f flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x15fc550e bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x2413e66d bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x6e83808a bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xe93f6eb8 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x39205f06 dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5800aa7f dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x6270b77e dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7d4338c7 dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x96f36a81 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xac8f663c dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc5459f05 rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd99e30ec read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd9cc342b dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xe813ab77 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c457c5c dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x188e1ead dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x18d58757 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c06656b dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c7374b0 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3c8ef51d dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3cf74f20 dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x47dba73b dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51f3767c dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5e246933 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x62598706 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6988f784 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8570e59a dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x88d31d7b dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8c094e77 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x97b37d7c dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9af50013 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa5311dbb dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa92da3e8 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb1a5fbf8 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb733f9ef dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc93cf6f dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc0e42fab dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc564e7af dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc78b5e0d dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb89fc7d dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcca08cb5 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcce0eeed dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd639b9bc dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd7765e69 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdc67c969 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe1703854 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfa8b9929 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x05f7632e usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x510b2ef0 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x55647a7c dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x73595cd5 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8a412dc2 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xaa4dba73 dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xae90a855 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x22057398 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x167e82f2 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x23952408 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x259ca5b3 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x44f05d61 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x474e2e4d dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x47a93285 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x704d10e7 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x932b1fed dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd764d9c6 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf61082a0 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xffe9d3b3 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x78dcfa66 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xc3d00c97 au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x7cef01e5 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x5d0c3d92 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x2521586e cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xafbdef5d cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x4246d855 cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x6fad7411 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x389c014c cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x0f61fc30 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x81920125 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x2efcc407 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xc8eb10c1 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0846813d dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5bac58ba dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6e759689 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xa1c91669 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb68d0085 dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xcf8043c0 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe959d910 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xa0b6bf10 dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xb03bb042 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x19004077 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x1d29b26c dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2ec12f5f dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x30073fba dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x685e8c6a dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf6db5c44 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1887c83a dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x636cfc31 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x7fa77186 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x98a4fdd1 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x89bdf43a isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x00a45859 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xc3abbd3d itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x70af6b89 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x56a86427 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x876dcd04 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0xa3cd8eb2 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x7dc36290 lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x8238c9a5 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x64d236a6 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x33f27e0d mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x9f1868ab nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x932d3b0a nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x8f51c3ea or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x72a66a4b or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x38f95410 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x1608dee5 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x58c383d3 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xf61e304b s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x2bfdf5c5 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x3fb8f068 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xe930b814 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0xab3fa254 stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x9fc89899 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x627f5215 stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x74e7ae0f stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xf6c6b291 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xd5b154e7 stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x89380417 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x78c97711 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x918923fd tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x2b388ec6 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x81e49fb2 tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x6388bdb0 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x693348d0 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xd609ef02 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x72ca34a7 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xe43db8a5 tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xc5b0a528 tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x44c4bbe7 tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xeb2d6570 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x5035958f ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x80af7587 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x1ca1922b zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xbcf80920 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xcde48431 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xe62385fb ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xa685bc84 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xae18e226 bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xe2e28a59 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x55ff184c btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x6231fdab btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x92821189 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xa1351823 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x4375caae cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf71cd1aa cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x46b1063c vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x4e48ff05 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x251a734a cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x2cc9def7 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x74280f3a cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x770e6297 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x79cd6d39 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x9bf443bb cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x29c22a1b cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x456070f2 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4736ef60 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4bf865a7 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x62caa2ef cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x83012543 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8341a6b7 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0af0ddd3 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0bc0bf86 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0cfe99db cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1581e091 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1677007c cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x346dedc2 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x37a2d624 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3d512f4e cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3e374445 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x436c45eb cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4fbb0020 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x75513a75 cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f22c9ba cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x895a243d cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x90faaa28 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa7add7ff cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb504e80f cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb5e63018 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc17cf1ef cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc2418f7 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdedc3f63 cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe8f97944 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x70902267 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xa10decad em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0e386de2 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x411b8e11 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x530efe5e gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7dddc48c gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8993ce30 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8e0efe4c gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6e61948 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x014ef5f2 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x078a6ebe ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0a8ea284 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3f1df634 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5caadb94 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5f8fec94 ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x6e37e6cc ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7db3db09 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x94c88703 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd62f5377 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe38059d9 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x08dbe0cc saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1062b70a saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x28982c73 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2e64bd07 saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3b18111f saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4cfa1f20 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4d095867 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5537c4bd saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5902cd1b saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8777b449 saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf0f5ff99 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf8a425b2 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/soc_camera 0x03d732ac soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2edee684 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3d720e8e soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x83141e81 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xa73e6262 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe1f8744f soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe9e22f84 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xf8caca20 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xfa805d39 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x5953cbd5 tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0xc98437fc tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x019afd35 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x03c39d53 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x299fb9c7 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5a2ab862 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9b1e9e0b usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf9bee1bc usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x19970e6f v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x49630a37 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x7943252a v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x1a53f6e5 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4d194c65 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x55943862 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x55f41384 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7a2ede3d videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xe7f98afb videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x284c8ebf video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x318fd914 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x439d15c1 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x8ac83edd video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x940ad912 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0xb02a815e video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0xb9f572eb video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xefd80649 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf478040d video_unregister_device +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x200ec2d4 videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x347a99df videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x5b665b4c videocodec_unregister +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x97110afa videocodec_detach +EXPORT_SYMBOL drivers/memstick/core/memstick 0x089b8207 memstick_free_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x0ad82bd6 memstick_next_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6205a0c9 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x78c6e956 memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x7d254746 memstick_detect_change +EXPORT_SYMBOL drivers/memstick/core/memstick 0x90810e8a memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x94aac5b3 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xc5e6fa6a memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xe7c45891 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xec2c01a4 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0xed9f6ea7 memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xef249e40 memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xef444b4b memstick_suspend_host +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x01dfca5b mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x10bb2a37 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1b6bec03 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1c899110 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x21a83f25 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x393b4551 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x40d32dff mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4410a634 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x481c5c8d mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x50a7d590 mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5607871b mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x576d248c mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5ebb0668 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x631e8be3 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6cb2a5e6 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72945ba1 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x952ea104 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa9cddebc mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbcc329fb mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc72d6599 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc904e06e mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcca574a7 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcff39bc0 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd62bd766 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe7f30c5a mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf9e411ff mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf9fcc538 mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfe48a12c mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x083d44ff mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0ef07c1b mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1d2d6f29 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x26dc76f7 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3a569b32 mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50d7f024 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50fef4b5 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x578ddf1f mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58822104 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5dcb91ea mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5df24ffe mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x65943a56 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6e20d8c9 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7535dae2 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x777a6612 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7ff8f303 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x84d8c7e4 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9263f0ba mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x97bc4ed1 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa4094217 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaf9cc14d mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb5f6877c mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb9095966 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b5f862 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc876cd0c mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe2478eb6 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x15a0d88e i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1a4990cd i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1abfaedf i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1cdf8a61 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x20acf6a5 i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2512470a i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x367bc861 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x390b6507 i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4621e92a i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x49d2af0a i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63d28404 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x69c95c89 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x88b444f8 i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x95a9f9a1 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9f5fce06 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa9e05d22 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb99a85cd i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xcdeec4df i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xce6a6427 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd670d551 i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdd2abd58 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf7f32e19 i2o_parm_issue +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0a17e502 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x74c1e72f ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x87470f95 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8bb6d620 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9b9f9060 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xd8c94347 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe17d7086 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf979fc51 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x02d423a6 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xd66a5a0e pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x55c28131 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0x6a408421 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x64fe7140 c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0x7309f135 c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0xa3de7cda ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xf5305dbe ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x1d37f6b8 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x22ccaae2 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x5d5cd270 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x5ea19844 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x778fb462 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x90cb8c54 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x96068757 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xbb5bb756 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xbcf6b732 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xc8197466 tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xca44ad7d tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0xe457898b tifm_eject +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x3d6951b0 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0219c490 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x18d7b7c8 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x4f25ad2f cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4bc245ed register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4d9b710e unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xdd2e9dd4 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xee114a9d do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xd0b06c45 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xb7e7e39f lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xa796de17 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x86c547a1 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xe72214cc del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x3cfae54e mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xed89e385 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0x4223ef4c nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xdebcda23 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x753eb16e nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf44088a1 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x80e671d2 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x83e25049 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xc9fb002c onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd5a10d61 flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x10a33962 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x2ba85c8f ei_close +EXPORT_SYMBOL drivers/net/8390 0x32d2f7b8 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0x4582e5a3 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x5095aae4 ei_open +EXPORT_SYMBOL drivers/net/8390 0x60801cef ei_poll +EXPORT_SYMBOL drivers/net/8390 0x8420c3f1 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x9c280e71 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xc62ea2cd NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xe3897d74 ei_start_xmit +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x10f94273 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x19af4880 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x59e28ddc arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7d675fe9 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x81e4610f arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xae3fcacd arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc361b817 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xce7dc809 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf828bc12 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xfd024c18 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x27928244 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x308f54f0 com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xa9da3762 com20020_found +EXPORT_SYMBOL drivers/net/bnx2 0x66f407b4 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0xa7582407 cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x10953959 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1b26210f t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x346808cd cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x40afe8a5 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6d08b694 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x70a26d74 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x72b970d5 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7550f431 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7843add2 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x866b2bc8 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x91d7c243 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9c6f9f67 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc261a517 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc3dcea56 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd75d4d47 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xff23df2a t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x1e6fc58f hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x3a14e1c8 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x463bd2b8 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xac403e4a hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xfb0ebee2 hdlcdrv_register +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x01cea111 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2b0305b4 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x33264d19 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3dcdf6eb sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4a812bf9 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x542656dd sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x79ac102e sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x98c09445 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc6c60756 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf129559e sirdev_write_complete +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x04bb949c mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x35663090 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x35dd6056 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x697a170f mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xae1f7df2 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xbdca0f9a mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xefdd8ecc mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xf344e271 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x847d4a38 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x866cb227 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf9fd10e5 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/sungem_phy 0xdce45b2a mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x15c0a9f7 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x405bbd97 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x56170903 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xc91bc58b tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf5350b39 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x12274124 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x2897bfa8 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3ac6082a hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3de0418d hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x58183a55 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8bb7f3b1 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x93daffc1 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9c02f853 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa14d7b27 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa97251e7 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0xe4e20dc0 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wireless/airo 0x1e2cd3e6 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x6aa35994 init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xe1f092a8 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x0ee36222 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xce5419c0 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/atmel 0x8b93a692 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xa2222d6f atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xd200b2ee stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x140cdc5c hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3152b714 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3b53435a hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3ccf3727 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x41bb2317 hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4b1bc616 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4c2df412 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4c4c33f4 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5b7dca97 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x64ce1400 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x662a128e hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x75cb1f67 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x800dedb0 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x85485433 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x858c8841 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa189114d hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa5245a15 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9489bd7 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbb72343a hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbff2772f hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc40214b1 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd4259a48 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd55b36b7 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xed7941bb hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfdcccc9a hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x15b67ea6 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x21d2c95a ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x25961e7f ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x45c151d0 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4c7ae5a1 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5cea40b5 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x68516dc0 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7e968e44 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8acb5ded ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8ea3fa01 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x90af2da5 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9a8c65ab ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9ce8ebdd ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xac05e007 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb5ba17c3 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xda8d0856 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdd989ac9 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe3098714 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe527165d ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed84b11a ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2974604 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0037da8f iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01adf490 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02413fab iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0246d8a1 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02bb643c iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04d49e71 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0535a93d iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05fc8a31 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x06feca66 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07c44ea8 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07cf8102 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08e81c36 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ca60ec4 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d4cd202 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10078af4 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x129484fe iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12d27273 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15b0ce77 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f19027 iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x213dc109 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22a4938c iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2563d5cd iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2863800c iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b07af04 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2feb8ce6 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x300f3414 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30c89e9e iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33dd402b iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x356c90f9 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35a04152 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35e81962 iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39e668b1 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a8e8b12 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f7711af iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41e4bba3 iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42a82592 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x451837ff iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x463320d9 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48abd2d6 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x493d83b5 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b06dc14 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b46cbf9 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d5b0286 iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e25d842 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4fdaa76a iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50999145 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5369ab2b iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5568bc0b iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56c594dd iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5781aefc iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x588a18cb iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5a568e77 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5afe190a iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b79c931 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e8020ea iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ff27b6f iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62d8bf13 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x635a6f68 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66c45d13 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x670af4c9 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6902e4ee iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6be3ca5b iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d43fdee iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6f395ae7 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x704be9bd iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x705a0175 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x71d7a8d6 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x739283c6 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77de9d0b iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x799ec577 iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79a23c81 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7db607ba iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f18ddd9 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x817ed0b4 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84d31203 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a114a80 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b702ab7 iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cfe063d iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x92e0f5bd iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9353f036 iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93c34bde iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94bac1f3 iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x976301a3 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97aa2fab iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x982c5bb9 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c56ed78 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f6fa60b iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0c0f75f iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa22b0664 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2c14d9f iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2db2831 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa39f84dc iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3b76f1d iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4e1d448 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa764f3b8 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad141ab5 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad883971 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad9421bb iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad9577d2 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb0cf8b31 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1158bb5 iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6ed4241 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xba93543c iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc3dcf16 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbcdd0352 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe82c9ce iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbefc50f2 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfef7864 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0d7245b iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc132b029 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1747112 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc186f99f iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1f41594 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4a0407d iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc8f311cd iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9ca33cd iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd84b87f iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xceec5044 iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0f3c632 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3040a01 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3538170 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6fad863 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc04ccc5 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3021e00 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3241028 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3a8f5c4 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe70974a4 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe96d507f iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe9ec50c2 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xecd9df9c iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee7440cb iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefd60233 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf20f9688 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf45ba0bf iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf49ef8be iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf71b04d4 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa950f14 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfcc6bf8a iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe76fb77 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x423930ea __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8e681ea9 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x9cafb2ca alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xdeec4b3e __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe62696ca orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x11afc703 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x2c2983ff parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x3e886584 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x446914ff parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x449742ef parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x47264d06 parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x48624e7e parport_read +EXPORT_SYMBOL drivers/parport/parport 0x49865e0d parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x505e9893 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x5b70c7c7 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x5d0b2b6c parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x61480586 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x64dae89f parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x6e49ac75 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x74ba6499 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x7ac6a254 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x7f735bd3 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x8154dd3a parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x84f13913 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x90c6b57f parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa2370167 parport_write +EXPORT_SYMBOL drivers/parport/parport 0xa612838e parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0xb0052fb0 parport_release +EXPORT_SYMBOL drivers/parport/parport 0xb95a45fd parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xb998b285 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0xc18b6ee8 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xd25fd471 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0xd59257dc parport_claim +EXPORT_SYMBOL drivers/parport/parport 0xdb11588f parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0xe14a2080 parport_get_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x30ae904a parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x3da6adac parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x06144c6a pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x106fda42 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1765a7d8 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1df0cf21 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2dd07c7c pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x36d0fced pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4b38486d pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4e427a60 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6125a8e7 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x88a6b6c9 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa47df5dc pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa62c670f pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbe80a222 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd9438ad3 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf984d74e pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x00ae1832 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0ca44a4d pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x16076e77 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1ca82cb6 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e7a8b17 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3d0a436c pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4b952bd8 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5ceb429a pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6031f1b2 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x62b9a44a pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x70776966 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7d223222 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7e9495c9 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x803a3b55 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x89ffccdd pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x90f9f5b8 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x91b246d4 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9ad48bc1 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa8df65b6 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaeee64a0 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb242ae8d pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb7069ea8 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xba85d59a pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc8d0a3f8 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd73181e2 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xda01d3c4 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdb3625f2 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe115ccec pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe9f48dc0 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf0d518ea pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf419a54d pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfbd88397 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfed1146b pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xc7399cc9 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0x79075f30 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x0ccad922 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2ec8f55e fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x348d9c53 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x916f49c7 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xc3b29a32 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xccd5e9e9 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xcdc0729c fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x055572de fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0868e0ba __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x105b32f4 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x193e4093 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27da973a fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2874e372 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e555cab fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32298942 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x326c61cc fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x34c5ef83 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3bdc5d53 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3e8cdc26 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x40e9f315 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x47c802c7 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4a9160f9 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5918d199 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x687cd59c fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e0a282c fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e6ca6f0 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75959e63 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x83337b86 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x874b603d fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x88e6fc59 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x96c162cf fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x97c97bb8 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ac1958e fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa2561423 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa2fed360 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa54dc498 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac51735a fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac6796f1 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb1a2b5dd fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbc082747 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbd97cd78 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc5f0aec4 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xccb3287c fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2d9e8ba fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd4949668 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe5d38cbd fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xed914fa3 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeed4c1d4 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2793e972 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0480a5cd osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0aa7e2b6 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0ba8e0b4 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18c49a78 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1fae70c0 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x23d8ee7f osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x271c6a5c osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x348f779f osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3de737e5 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x43cfd170 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44d698c9 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4524e664 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x55322eaa osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x59486148 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5e327193 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x618897c2 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7ee7150b osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x89caa808 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8b9c1ee5 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8cf98d00 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9c4cce56 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xada087a1 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc1c18e7f osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc87c8119 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd2f04a21 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd82e4372 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5a9f482 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe8384c2c osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe9a13628 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec31475e osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xee3ddc82 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf2f1aa1e osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/osd 0x2ae3b53f osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x6654eb3c osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf13accf5 osduld_put_device +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x26f37f39 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x53851188 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6ad482ae qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6e944b3e qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x89f8b087 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd71d37b5 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x5a684685 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x9a50d7f2 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xea67b9cc raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x262d42f3 fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x271ca720 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4229284e fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x51cf9319 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5e352a7d scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8b07bb52 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9b212372 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9c61f53a fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe2590605 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe57db115 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf2e0838e fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfd74365c fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x04396f7f scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x17951e26 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1a7ea93d sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1c89a754 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3e84e85c sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4900b36b sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x56dbea84 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5c8e408d sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5dfa0831 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6ba03366 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x747f6d35 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7b4e8e59 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7bcb5349 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7cc19915 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f37ba69 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x85667d4e sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9288fc9b sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x93ef748d sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x983cc8e5 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9a4767f7 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc1c0d081 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4f78fb1 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc8f999f1 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe2b79eeb sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xea329483 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf15d6546 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1593440e spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x45564d61 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x651b8849 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x863aff57 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8cb5d359 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/ssb/ssb 0x09bc8dbf __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0a25146f ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x0d633981 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0x208949ce ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x2b277316 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x3d5af4dd ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0x3fec0e67 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x50206904 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x5dd8f66f ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x5fa82c35 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x7935c210 ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x826bcd45 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xaefcdaf1 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xbd68779c ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xdcc603d0 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xdd16c0fe ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0xded39b75 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xedb6ecae ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xf5bdec83 ssb_pcihost_register +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1380ff85 comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x17cd7801 comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1812845d comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x259db570 comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x433b923b comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x46e5e337 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x507b779b comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5afcb30c comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x85b69d70 comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x867cc2e2 comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9175be4c check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9b38cc0d comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa88ac5c3 comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xaa1723ac comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xade58725 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe9fe4033 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xf0f659cb comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x747e3e26 subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x74ce2eb6 subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xeb775e8d subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf74d81bb subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x08ccf12e cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x598b3b57 cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x644357af cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x12c67e55 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x1a3e9191 mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x23dfe84a mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x414aa8a0 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x46efb298 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x48f5404c mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x59e71eb0 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6a701f78 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x78bc8b33 mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7eec3d52 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x96f3809f mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x99847771 mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb2bc54fc mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xbc3bc288 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc7adb992 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcde84a8 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe66e022b mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe8b9b1d0 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe98b236c mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xef1cabe8 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdb78d632 subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdbc39f00 subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xdfc41340 subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xec853614 subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x8cc114c2 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x0be7f8aa go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x0cc78061 go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x37f834d4 go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x3e1263d2 go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x65cfe080 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xb15a30dc go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xb2558392 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xbf3c6320 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xf10a4857 go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x25f3b939 pod_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x271faa59 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x4a44ce14 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x5a7783c2 variax_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0x557e5a38 me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0xb161625b me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0xd537ea18 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0x8d0fd431 me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0xc8d5831d me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x80991e88 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0x04797810 me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x9582cae0 me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0x76cb7d42 me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0x1cf5012f medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x00188219 ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x01417922 ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0294424c ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x082d0926 ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0bfdb568 ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0e774747 ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x139ff67c ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x14c14f9a IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x18973af5 ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x19d1184c ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x202bc90a ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x25dd2617 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2660608b ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x27399bb0 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2cdcacc1 ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x34cd1cbb SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x38040cf3 ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x397ac355 ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3ef001e5 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x49731da8 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4cf52382 ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6f107150 ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x721ad09a alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x81b42442 ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x856b5064 ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8e682190 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8ec48224 ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8f06f35f ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x93657322 ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9db84a6a ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9e5ce91a ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9e886087 ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa2ec2733 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa3ea3901 ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa718b80f ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa7907898 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa7d6a807 ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xadb97819 ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb36501b6 Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb7951c22 ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb844b140 ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb8f0c141 notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbda3c2bd ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc2a59aa7 ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc408c616 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc6e66442 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc8185568 free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc8e890bf ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc966c1a2 DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcbccef56 ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcdf51eec DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd419a3c5 ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe5be6733 ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe7595bb4 ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf545da62 HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf6265ad3 ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf7a463d4 Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf96bf2eb ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf9acbe8b RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xfe1e2ec5 Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x957c5012 ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xa6087655 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xd0ae4bf0 ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xdc42fb04 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xfc2f1439 ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0x353e681f ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x84d28da7 phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xf0b3e517 phone_register_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x1b975641 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x9541f7bf usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xb865794c net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x11d5d386 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x28cb0e8e usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2d0e4d09 usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x1622d0c2 lcd_device_register +EXPORT_SYMBOL drivers/video/backlight/lcd 0xb8216828 lcd_device_unregister +EXPORT_SYMBOL drivers/video/console/bitblit 0xdb2e341a fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0x57abb86c soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0xa992a116 fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x38a2d014 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x3b4609f5 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xac54f749 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0xbe302580 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/display/display 0x38a514dc display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0x7fbbf8be display_device_register +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x8e3f18cf mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x4a51b70a matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x516d9322 matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xa1e5e0dc g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x21de8ce4 DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x2fb06eef matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x5936e512 matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xae21d7f4 DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0xfb481153 matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x0d36b2b2 matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x2cfbe709 matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x79c82123 matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xba23b89c matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xe23157c6 matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x33a9d99d matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x52a8b3d0 matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0155b9fa matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0afe9c3d matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x27b80018 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x51be932b matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x60d654f4 matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/output 0x9c9ce032 video_output_register +EXPORT_SYMBOL drivers/video/output 0xde30a9e2 video_output_unregister +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x2aef0175 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x4a9574e8 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x64d7cab8 svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x82701716 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xa7ce2dd4 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xde815a22 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf46021b4 svga_settile +EXPORT_SYMBOL drivers/video/syscopyarea 0x76fdb095 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0xcb572c21 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x9c74dbb2 sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x321c3789 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x6cfe50e6 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1f7b99ce w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x6531ba53 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x92915f2c w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xbbd21ded w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x58e8c7c9 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xae472516 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xd705eea8 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xdeefab5d w1_remove_master_device +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x0c7c0b60 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x49125418 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x5359bd65 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0x54c651e8 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x57c136b1 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x6afccdc2 config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8521a594 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x8b619733 configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x90177e0a config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x942cbcf4 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xbae463e8 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xf8d22c55 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x0152e4d4 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0b4cc9a1 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x11e8ac6a fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x269bd6ef __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0x2fb2fae3 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x3731d257 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x415b8886 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x6408e81a fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x65841e66 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x684037c1 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x6faab07a fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x7dab2997 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7ff51389 __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x94a6686d fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x99110716 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x9a2a4e60 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xa680df13 fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xabe05083 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xacf6df59 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xb3b02786 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0xb90d6d78 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xba756d93 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xbadca130 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xbb94a8eb __fscache_write_page +EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533 nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4 nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/quota/quota_tree 0x11318fd8 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x29c033d3 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4fbf3e16 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x760a1d0f qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xf6b5cc65 qtree_release_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x33586e6d make_8023_client +EXPORT_SYMBOL net/802/p8023 0xa3c56be3 destroy_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0225010c p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x099acf80 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x152a7c6d p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x206695d7 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x244c6d40 p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x27b2ad54 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x362e26ec p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x40394bdc v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x488eca83 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x53b0f9fc p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x5c3980bb v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0x5e0ef374 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x61852dea p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x6c5e479c p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x72e28336 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7bebbaaa p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x80ed639e p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x814b2716 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x9c5eed6e p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xb17e01a3 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0xbaa17b44 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0xd7636e5e p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe668e215 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0xe74cd0c2 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xfb523f64 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0xfb5ded90 p9_client_remove +EXPORT_SYMBOL net/appletalk/appletalk 0x2512cc0a atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0x5e524131 aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xc06f5c4f atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xc668ab37 alloc_ltalkdev +EXPORT_SYMBOL net/atm/atm 0x0c57aaed atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x0e6dfe39 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x55574ad1 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x6f97323a atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x91b2ccfe vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0xab9e36eb deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xd1189ef3 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xdef532d5 atm_charge +EXPORT_SYMBOL net/atm/atm 0xe92e61a0 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0xf22fa2dc vcc_release_async +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/atm/atm 0xf851382d register_atm_ioctl +EXPORT_SYMBOL net/ax25/ax25 0x07bf5fa5 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x0c9fb8ba ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x5c13685a ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x641feb68 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x85756587 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xb7dc97ad ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xc5f88258 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xcf7c8125 ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xdd6482d9 ax25_find_cb +EXPORT_SYMBOL net/bridge/bridge 0x71c9bd73 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x7e59e2f1 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xaf29de03 ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xf55eb2c4 ebt_unregister_table +EXPORT_SYMBOL net/can/can 0x3215e723 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x5bd9977f can_proto_register +EXPORT_SYMBOL net/can/can 0x6004e143 can_rx_register +EXPORT_SYMBOL net/can/can 0xcf6bb72a can_rx_unregister +EXPORT_SYMBOL net/can/can 0xebb71492 can_send +EXPORT_SYMBOL net/ieee802154/nl802154 0x1cae4fc2 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x1cd8df13 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x885b3ab2 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x918d3219 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xbbe6c8eb ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xe2ebbca6 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x61f34bee arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x856c9822 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb18420cf arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x02642fc9 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0c439942 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x85e0b2bf ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x15a84abb nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1f5519a6 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x60384df9 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xb3c5dcc2 nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcfac42f8 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xdb04e12e nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xe08a205b nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xccaf2daa xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xe513fb95 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x141af83f ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x14c808bc ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x79449bcc ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x9fedcb49 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x768f3c76 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xc4f9abe7 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2aa255fc ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2ee4ab4a ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3747ca58 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x624dbb55 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x7a2c2303 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x958d986b ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xaacacb61 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xf0d52363 ircomm_data_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x16800e77 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0x1b5b5051 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x29e27d70 irlap_open +EXPORT_SYMBOL net/irda/irda 0x32fa042f async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x398c6f52 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4ca90c88 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x4f952dfd irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x571248fc async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x594a315f irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x5ba6b643 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x75f1820b irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x792f1e8a iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x899c8d79 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x8d47009f alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9a050555 proc_irda +EXPORT_SYMBOL net/irda/irda 0x9ac261ec irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xa0ca2c35 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0xa4742b13 irlap_close +EXPORT_SYMBOL net/irda/irda 0xaca3bb85 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xb5183548 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xd6deeaae irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd9195d5a irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xdbf11dad irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xdcd0536d iriap_open +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xe985a598 iriap_close +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf7979a3a irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xff9ef6bf irttp_dup +EXPORT_SYMBOL net/lapb/lapb 0x03da49fe lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x2a721271 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0x2cef177f lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x3a5883e5 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x7525e53d lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0xd5c3ceb9 lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0xd64c207c lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xde415d10 lapb_connect_request +EXPORT_SYMBOL net/mac80211/mac80211 0x0c6d6632 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x10243f35 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x2782f849 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x324481e4 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x38bd7c41 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x3e7a2efe ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x49009492 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x4afe31d8 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x4f80acdc ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x52c1d617 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x5330f169 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x5c046e3f ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x5f989fe7 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x606f8274 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x67119639 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x69520fdc ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x872a99f2 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x93893298 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x94be8534 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x9641e951 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x9804db53 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x9b8784c9 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xb24501f9 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xb94e0bef __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xbccd25b8 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xc6dd7e67 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xcc578371 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xd12077a0 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xd52b059c ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xd5e2ca98 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xd75131d4 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xdabfbd96 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xdb680794 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xde7e88d3 ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xe4c3bff7 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xf1cc5a3c ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf8ff2f82 ieee80211_wake_queues +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x021fba9b register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0ccd3082 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2a6e8718 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x36400e07 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5be8ab87 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x624618e3 unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7a6dfcf1 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb8fc3c8b ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc9e483da unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfdc0148a ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xff151d91 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x137cfbcd __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xbc01002b __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe69cb295 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x05294983 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x10e1a1fa xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x30f656f5 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x346ea44c xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x38e34d61 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x3a7ccfbc xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x49472e0e xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x6c69cec6 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0x86ff53e3 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x9571b252 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/phonet/phonet 0x06054541 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x16572db6 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x34e95d41 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x55d65f37 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x67e9b0e7 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x91585dc6 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xc29aa9dd phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0xd3bf4a0f pn_sock_hash +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2604b947 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2679f57c rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2a8bc2f0 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2f2259a5 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x474ebc71 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4be3bb7b rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x74526c89 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x95bba360 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xae869fa9 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb26d1148 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb76aec0b rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb81a3b6d rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdb603fb0 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe5034445 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf67e9957 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/sunrpc/sunrpc 0x46e4c378 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x05ca5a1b tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1164190b tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x6a3ad296 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x7b0bb8a6 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x839e728a tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x94d83d9d tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x95f0cf99 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x9b0fa48b tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa05ddea9 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xc4a70029 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe3471671 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0xc2ed2b89 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0xb7985de3 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xc17fa817 wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x025b2a93 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x127922e0 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x12946f6c cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1a2eb3d2 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x3be468df ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x41f3b874 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x51051a63 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x5717f087 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x599bf143 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x59c4800b ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x5bf79f96 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x65531e1b wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6dfefa1b wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x730d1eec cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x7e0c1136 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x8bfc51aa cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x960447a3 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0xa3423479 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xa5d1185b cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xb4f1fa49 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0xb6177402 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xb67dfd6c cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0xc029a0dd cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xcb21584d cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xccc3806e wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0xcf306189 ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd51623ef wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0xf4829ef6 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xf7899d10 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xff896c87 regulatory_hint +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a76af96 lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x5de7e112 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xa64a90a9 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0xa995fd94 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xb2a45ef9 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xbbe2eeff lib80211_unregister_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xf5bfaae9 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0xfcfcf81e lib80211_crypt_info_free +EXPORT_SYMBOL sound/ac97_bus 0xbd1359e7 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x368fc5a9 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x01667c3b snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7babbc84 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xc7170229 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe93c3af6 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xa6d29db0 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xbcce9c73 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x56f78d9e snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x015f806c snd_jack_new +EXPORT_SYMBOL sound/core/snd 0x05cdc7c0 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x20fdb137 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x237e6dc3 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x24c99377 snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x252a1066 snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x27acaf0e snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x27dc7a13 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x36ceb489 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3e6305ef snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x417fcbc8 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x4460b202 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4b1744c2 snd_cards +EXPORT_SYMBOL sound/core/snd 0x4f9cc2be snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x5e43764f snd_device_free +EXPORT_SYMBOL sound/core/snd 0x6040f195 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x618a17ba snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x662f8977 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x66c716b8 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x6f4b7329 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x765efc1d snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x85ab0c0d snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x927c044b snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x928abdb7 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x94dac5a9 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x9f13baf1 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xa2992781 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0xa4c1c7e1 snd_device_new +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb6b1b27f snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xbfdda27d snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0xc476f161 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0xc99e4191 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0xd200f83e snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xd31a766d snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0xd3a850e9 snd_card_register +EXPORT_SYMBOL sound/core/snd 0xd5af121e snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0xd64ae5df snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xdab65878 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xdae80e0b snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe44ca59a snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xef7baff5 snd_device_register +EXPORT_SYMBOL sound/core/snd 0xf0d948fb snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0xf263dcb6 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0xf75e9524 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0xf8d5b38e snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xf93696ff snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xfb2b791a snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd-hwdep 0x7c157067 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x44667495 snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x786cefa7 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb748114f snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xcf8eb73b snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xf8e606dc snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1e86bf25 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0x21179763 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x22ee837e snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x22f34eb8 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x29270d30 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x30291ae1 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x30435831 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x309f4917 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3a85f702 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x3ad341ec snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x3c046fcf snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x47284f42 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x4a4a641c snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x4a663b60 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x4cf1ade0 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x4d359a9c snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x5051498d snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5b303b35 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x62ca4e45 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x690f321e snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x6c56ba1a snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x6ca2f895 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x6e228e01 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x807491f5 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x87546290 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x88b45bc6 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8a0df210 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xa495150e snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xab1021d6 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xad959032 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xb26b0bf6 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xbf6a22cd snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd04bb9f6 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd9790302 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xdbf3d4d4 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xf342cf6d snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xfa98d195 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xfb3e504f snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xfd9505f9 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x018b65c9 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0x27296196 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x36162a51 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4747e151 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4ac6e8ed snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5b13c565 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x74d061d4 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7f0b2103 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa4af560b snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xad8fb790 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaed45822 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb40fa7f4 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd194c47f snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd61e0fc6 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd67e4da1 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf8fdbbd1 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0xfaf2a450 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-timer 0x11f10cf7 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x17314e04 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x52dfa815 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x7fcb9115 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x8f33f6e3 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x92943cce snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0xa25cf418 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xa4c95b31 snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0xcd56ad4e snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xd6247b88 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xdfc18c56 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xee0b57cf snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xf19619c8 snd_timer_open +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xf270faee snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x19e06213 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1aa9f030 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3feee8b4 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x486b46cf snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4c173a6a snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4f5d5705 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x71ad82f1 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7ad4cce9 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8a5989a7 snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0205dc71 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1f33777a snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x31f69e2c snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3b420caf snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6062d1ed snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x996f103e snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xda39997c snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xdd86e1bf snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xee022dca snd_vx_setup_firmware +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x09388f12 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1a894e17 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1e984c09 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x6f12199e snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x84ecf5ac snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xe9b0c05b snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x02ac5308 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x503aa32a snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc1fa2fea snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc3988155 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcc496183 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfa31389b snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x3ada408b snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xaaec6fe1 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xdef2cafc snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xee9fadf0 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xd55e15c8 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xd81a39a8 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x6cd6713f snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xa9d9b67b snd_tea575x_init +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0407b6d6 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x07ffec87 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x138437f4 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x6d7b3973 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc951bf05 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-i2c 0x3231dc32 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x8747cafc snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x971fd404 snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x9b3598ce snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xb9622da9 snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xea683bc9 snd_i2c_device_free +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x10c49455 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x2c5492ce snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x64b37291 snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8b23f1da snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8f027e63 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xb7b0f913 snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc34087a8 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdc8c1b67 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xeb4b1a5b snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xfe6f64b5 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x1b58e955 snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x45b4f11c snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa1bbd17f snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x55262c70 probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x755cd667 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb81a0372 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x3af05150 attach_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4 probe_mpu401 +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x4d9379dc probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sb_lib 0xf95c4f32 sb_dsp_init +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x95bc2447 sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a786241 sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xc9a14b05 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd0567938 synth_devs +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdae1cedf sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf53992dc audio_devs +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfb378aea midi_devs +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0xc012ec38 probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x04f8b425 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x260a755a snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x416d418d snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x43dddbd3 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x45498043 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x462150a7 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4ae761a5 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x622fe4cb snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7301b2f3 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7ce50636 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9790105e snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd658ebd9 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd8c5694b snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdd37dc29 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xed7f4099 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xef427cc5 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf44f540e snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x054b409c snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x124ac785 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x14b5a171 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2c21ae39 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x366f41fe snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x60168b27 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x61af017a snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc3f59d09 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xdab3a1ac snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x6a0a4dc9 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x043c7572 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xc8124a3e snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xd5f96377 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x0157319b oxygen_reset_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1385fd8c oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1d11ff3e oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x21175df8 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x37732062 oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x393408c3 oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x4677eb34 oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5835d1c6 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7ffe128a oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x843e19f3 oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x849af41c oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8c5613b3 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xabfec8a8 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xae22125c oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb7273942 oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xdbc79098 oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe17ae666 oxygen_write32_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xeaa452b6 oxygen_pci_probe +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf9c8eaa8 oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfb3181e7 oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x259757d9 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x3374b60a snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x52c452a8 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x684391e9 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9cbbd59b snd_trident_free_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xa569f193 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x1537b6c0 sound_class +EXPORT_SYMBOL sound/soundcore 0x15aa2370 register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x33325920 register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x6172403f register_sound_special +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0x9c9ebdc3 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xc8f73034 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x19cd53e2 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7c2c7719 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7d53a2a3 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xaf7bcb7b snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb8b72ee5 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd5149e4c snd_emux_register +EXPORT_SYMBOL sound/synth/snd-util-mem 0x014ff605 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x045cee77 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x20297089 snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x336056fc __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x75e2cdf4 __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x7c57a9d1 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0xa545e8aa snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xddb2be64 __snd_util_mem_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xa0e77939 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x26ee19b1 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2f9588b3 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2faffdcb dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x4ce6d916 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x831c2a04 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x959e221f dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x17146a31 lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x1c06f0a3 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00088b23 textsearch_register +EXPORT_SYMBOL vmlinux 0x000ff023 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x0025cb03 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x005e15aa pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0x006d109b agp_generic_enable +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00875e87 blk_requeue_request +EXPORT_SYMBOL vmlinux 0x008de467 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00a0937b generic_make_request +EXPORT_SYMBOL vmlinux 0x00af456d fget +EXPORT_SYMBOL vmlinux 0x00af8f3a bio_copy_user +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00d0f6c0 bdget +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x010b0833 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x013b2f31 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x014eb523 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x0153c702 dquot_commit_info +EXPORT_SYMBOL vmlinux 0x01547df6 tty_mutex +EXPORT_SYMBOL vmlinux 0x0169f11d pci_request_region +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x0190d483 bio_alloc +EXPORT_SYMBOL vmlinux 0x01a09483 generic_setxattr +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01af0db0 generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x01cca249 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01d40893 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x020c3950 eth_validate_addr +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x0212d96e textsearch_destroy +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x023932ee hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0x0240edfd bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x026f9f6e sk_common_release +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x03052356 pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x03077123 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x03183828 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x03453cd1 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x036d6ce5 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x039177e3 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x0398866f setup_new_exec +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c14c66 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x0432b9fb set_pages_nx +EXPORT_SYMBOL vmlinux 0x043f7599 tcf_action_exec +EXPORT_SYMBOL vmlinux 0x044bfa0a proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0457516c d_alloc +EXPORT_SYMBOL vmlinux 0x0481f064 tty_shutdown +EXPORT_SYMBOL vmlinux 0x048454dc kobject_del +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04b59585 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x04ba1ae1 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x04c6ec40 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x04cd8e42 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x04d073c5 get_io_context +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x04f872dd file_permission +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x053f7d81 read_cache_pages +EXPORT_SYMBOL vmlinux 0x054252ba tty_port_close_start +EXPORT_SYMBOL vmlinux 0x054adb69 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x055c8cd9 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x05698f46 bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0x057fbf6f blk_plug_device +EXPORT_SYMBOL vmlinux 0x05b15d6c request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x05bd4132 sg_miter_next +EXPORT_SYMBOL vmlinux 0x05d0ee69 md_done_sync +EXPORT_SYMBOL vmlinux 0x05dd075a pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x05e28d43 __first_cpu +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x06183886 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x06222b79 proc_symlink +EXPORT_SYMBOL vmlinux 0x064cbf31 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x06784f45 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x067a1394 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x067e1817 key_put +EXPORT_SYMBOL vmlinux 0x068c7263 ioremap_cache +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06cc1551 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x06cee812 elv_rb_del +EXPORT_SYMBOL vmlinux 0x06d43947 dm_table_event +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06f230c0 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x06fca151 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x0729df0c __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x072e5734 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x073bcf65 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x07621a4e ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x07649854 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x076dbe38 dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0x07736378 tcp_close +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07dc26d7 journal_wipe +EXPORT_SYMBOL vmlinux 0x08118e43 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x086a5bd4 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x088c03e9 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x08c598f4 nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08dfb52d tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x08e67e9a ilookup5 +EXPORT_SYMBOL vmlinux 0x090ebde5 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x0918bedf vfs_mkdir +EXPORT_SYMBOL vmlinux 0x092b793c consume_skb +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x093d649a blk_unplug +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x0962dd55 pci_restore_state +EXPORT_SYMBOL vmlinux 0x0976eea6 pci_dev_get +EXPORT_SYMBOL vmlinux 0x098431ba acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x099e600e lock_may_write +EXPORT_SYMBOL vmlinux 0x09a6da6e blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x09bbfa32 compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x0a0d6589 blk_fetch_request +EXPORT_SYMBOL vmlinux 0x0a14fb32 blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a4170c5 freeze_bdev +EXPORT_SYMBOL vmlinux 0x0a9611c0 tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x0ab98197 lookup_one_len +EXPORT_SYMBOL vmlinux 0x0abdce65 request_firmware +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0af6869c nobh_write_begin +EXPORT_SYMBOL vmlinux 0x0b08fdaf dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b250b34 have_submounts +EXPORT_SYMBOL vmlinux 0x0b4e8f4b pv_mmu_ops +EXPORT_SYMBOL vmlinux 0x0b60cfc3 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0bd57e72 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x0be57d56 netlink_ack +EXPORT_SYMBOL vmlinux 0x0c1a7b6a mmc_release_host +EXPORT_SYMBOL vmlinux 0x0c31ab0a block_write_begin +EXPORT_SYMBOL vmlinux 0x0c35337a mmc_align_data_size +EXPORT_SYMBOL vmlinux 0x0c59f814 scsi_device_resume +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca7b7a8 acpi_check_region +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cdfa9d9 bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x0ce1f2de iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x0d1b5b45 tcp_prot +EXPORT_SYMBOL vmlinux 0x0d212644 serio_rescan +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d35ab40 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x0d36664c generic_removexattr +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d6a4b18 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x0d72c055 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x0d79c0fc skb_recycle_check +EXPORT_SYMBOL vmlinux 0x0d7bcf18 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0db00232 per_cpu__x86_cpu_to_node_map +EXPORT_SYMBOL vmlinux 0x0dbe0d05 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x0dcdb6f2 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0x0e0252ec downgrade_write +EXPORT_SYMBOL vmlinux 0x0e0db802 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x0e224870 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0x0e305da9 eth_type_trans +EXPORT_SYMBOL vmlinux 0x0e475eae pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x0e51dacd __netif_schedule +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e9efc19 cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0x0ed9824b blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x0ed9bfd5 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x0ef91d73 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x0f0b00e5 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f2c0bbd request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x0f4a5448 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x0f7cef21 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x0f8ce789 compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x0fb28106 acpi_root_dir +EXPORT_SYMBOL vmlinux 0x0fb9595e compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x0fc20dae do_munmap +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x0fcf312f simple_sync_file +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x1004bff7 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x1071ff86 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x1072a394 csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x10851abe ps2_handle_response +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10976d7d nf_register_hook +EXPORT_SYMBOL vmlinux 0x10e3333c unregister_8022_client +EXPORT_SYMBOL vmlinux 0x10eb651b call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10f2caee tty_check_change +EXPORT_SYMBOL vmlinux 0x10f3c974 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x11227b1f ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x112f078a __mutex_init +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x11528012 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x11539fb0 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x115b4afc generic_ro_fops +EXPORT_SYMBOL vmlinux 0x1161d073 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x1179d0eb dev_gro_receive +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11d6f7a7 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x11dab346 __down_read +EXPORT_SYMBOL vmlinux 0x11e2b038 agp_free_page_array +EXPORT_SYMBOL vmlinux 0x11eff057 rfkill_set_states +EXPORT_SYMBOL vmlinux 0x12198e80 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x121a895d phy_register_fixup +EXPORT_SYMBOL vmlinux 0x1229567e set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x123b713c call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x1256419d hci_register_cb +EXPORT_SYMBOL vmlinux 0x127ddbbc dm_exception_store_create +EXPORT_SYMBOL vmlinux 0x12cbd30a try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x12ed9ca7 bdi_register +EXPORT_SYMBOL vmlinux 0x12f04bfa md_write_start +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x12f516a0 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x130d9321 scsi_host_get +EXPORT_SYMBOL vmlinux 0x1340cee3 force_sig +EXPORT_SYMBOL vmlinux 0x135755c5 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x136f62c0 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x138a78d1 set_current_groups +EXPORT_SYMBOL vmlinux 0x13a289ef phy_device_register +EXPORT_SYMBOL vmlinux 0x13b53ef5 dm_io +EXPORT_SYMBOL vmlinux 0x13b79b56 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x13b8f169 set_pages_uc +EXPORT_SYMBOL vmlinux 0x13c84a9d iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x13d6b0f7 xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0x13eb0703 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x13f6185e tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x140604a4 journal_extend +EXPORT_SYMBOL vmlinux 0x142242df pci_pme_capable +EXPORT_SYMBOL vmlinux 0x1430ba93 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x14391944 __rta_fill +EXPORT_SYMBOL vmlinux 0x143d6e2e igrab +EXPORT_SYMBOL vmlinux 0x144f3de4 mpage_writepage +EXPORT_SYMBOL vmlinux 0x14525db8 seq_open_private +EXPORT_SYMBOL vmlinux 0x1479600b llc_add_pack +EXPORT_SYMBOL vmlinux 0x1485f2ea compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x1488cb94 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14c3f92c vfs_quota_off +EXPORT_SYMBOL vmlinux 0x14c777c9 udp_ioctl +EXPORT_SYMBOL vmlinux 0x14d27b5b hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x14d38d02 __bio_clone +EXPORT_SYMBOL vmlinux 0x14dcdd14 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x151ffadc phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x156b58ea default_file_splice_read +EXPORT_SYMBOL vmlinux 0x15ca3a87 simple_link +EXPORT_SYMBOL vmlinux 0x15d62903 sk_release_kernel +EXPORT_SYMBOL vmlinux 0x15e714e0 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x16046531 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x161038c0 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x16330b9c audit_log_start +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x16464ad8 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x164bd779 set_pages_array_wb +EXPORT_SYMBOL vmlinux 0x1675606f bad_dma_address +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x16a0c192 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16be535d page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x1720af78 __kill_fasync +EXPORT_SYMBOL vmlinux 0x17373954 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x17437c44 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0x17c1c618 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x17c6d30f bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17caa43e tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17f1fc17 jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x17f81bff tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x17fe75f5 input_free_device +EXPORT_SYMBOL vmlinux 0x1815a2de __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x1816a453 d_find_alias +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x18226912 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1846b1cb mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x1857353d default_llseek +EXPORT_SYMBOL vmlinux 0x185a68d5 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x18671e54 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x1871decd register_chrdev +EXPORT_SYMBOL vmlinux 0x1882ba6d kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x1891adbb thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18b555e6 rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x18c0e3d4 da903x_query_status +EXPORT_SYMBOL vmlinux 0x18e627c1 journal_load +EXPORT_SYMBOL vmlinux 0x191c743e dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x19286a3a gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x1935e717 pipe_lock +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x193e2011 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x194df9bc __nla_put +EXPORT_SYMBOL vmlinux 0x195e0cd4 bh_submit_read +EXPORT_SYMBOL vmlinux 0x195f99a4 inet6_bind +EXPORT_SYMBOL vmlinux 0x19765181 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x1981557c netif_rx +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19c21d19 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x1a24057d bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x1a2e107c swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x1a36e03c dev_disable_lro +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4bced2 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a502d32 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1a9405d1 phy_attach +EXPORT_SYMBOL vmlinux 0x1a94104c dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x1ab64042 simple_write_end +EXPORT_SYMBOL vmlinux 0x1acd4ea9 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1adbac4e pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0de617 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0x1b18f593 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x1b32be93 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x1b3ab089 request_key_async +EXPORT_SYMBOL vmlinux 0x1b414a54 vfs_link +EXPORT_SYMBOL vmlinux 0x1b519521 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x1b53121f sync_inode +EXPORT_SYMBOL vmlinux 0x1b54cdb8 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bdc5d82 set_pages_wb +EXPORT_SYMBOL vmlinux 0x1c0bdc54 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x1c0dd4ed con_copy_unimap +EXPORT_SYMBOL vmlinux 0x1c3eaa78 proc_mkdir +EXPORT_SYMBOL vmlinux 0x1c7350c4 nla_append +EXPORT_SYMBOL vmlinux 0x1c7db764 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c998d67 devm_free_irq +EXPORT_SYMBOL vmlinux 0x1ca85676 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x1cad814c inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0x1cbea2fc dev_remove_pack +EXPORT_SYMBOL vmlinux 0x1cc49266 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1ce38c28 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x1ce4ee4e cfb_copyarea +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1d0716b6 sk_stream_error +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30d123 ppp_register_compressor +EXPORT_SYMBOL vmlinux 0x1d413834 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x1d64125a inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x1d7a9587 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0x1d9d39f2 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x1da16d7b hci_conn_security +EXPORT_SYMBOL vmlinux 0x1db7706b __copy_user_nocache +EXPORT_SYMBOL vmlinux 0x1dbd3fa6 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dc96325 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x1dd416f8 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1dde89ec register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x1de12374 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x1e0a8d3a journal_init_dev +EXPORT_SYMBOL vmlinux 0x1e0c2be4 ioremap_wc +EXPORT_SYMBOL vmlinux 0x1e2e427f cpumask_next_and +EXPORT_SYMBOL vmlinux 0x1e34f52f dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x1e523046 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1eaec4d3 kern_path +EXPORT_SYMBOL vmlinux 0x1ec4c4a5 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x1eebd4a7 ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f1146fe mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f8f9264 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x1fa10ce8 ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0x1fa33490 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x1fc3ef56 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x1ffb77e8 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x1fffa345 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2000628d qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x20092385 acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x202ca479 acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0x2036334f misc_deregister +EXPORT_SYMBOL vmlinux 0x206a0992 inode_init_once +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x2096e9aa fb_find_mode +EXPORT_SYMBOL vmlinux 0x20bac0fb blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x20cd0f99 i2c_use_client +EXPORT_SYMBOL vmlinux 0x20dabbf4 skb_queue_head +EXPORT_SYMBOL vmlinux 0x20eadeb6 ip_compute_csum +EXPORT_SYMBOL vmlinux 0x20f9322a idr_pre_get +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x21577995 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2179270b sock_wake_async +EXPORT_SYMBOL vmlinux 0x2190fda5 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x21aeb220 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x21b1f238 ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21dd6947 blkdev_get +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21e5679c copy_user_generic +EXPORT_SYMBOL vmlinux 0x21e9885c unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x21f8e105 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x221096e7 vfs_rename +EXPORT_SYMBOL vmlinux 0x22165e4c nf_log_register +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2252f293 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x225b11c8 security_path_mkdir +EXPORT_SYMBOL vmlinux 0x226af694 arp_find +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x2296467f seq_write +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22bfdbb4 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x22d3a64b blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x2308cf7f input_filter_device +EXPORT_SYMBOL vmlinux 0x23096b6c xfrm_register_type +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2340ea02 mmc_remove_host +EXPORT_SYMBOL vmlinux 0x2343abd7 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x234a055d blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x235f5a73 follow_down +EXPORT_SYMBOL vmlinux 0x2363a90d inet_select_addr +EXPORT_SYMBOL vmlinux 0x236c8c64 memcpy +EXPORT_SYMBOL vmlinux 0x236ea625 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x23825112 set_binfmt +EXPORT_SYMBOL vmlinux 0x23a76d38 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x23b99e92 node_states +EXPORT_SYMBOL vmlinux 0x23c17c7b poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23d0c942 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x23d2556f pci_release_region +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x240140d0 proc_create_data +EXPORT_SYMBOL vmlinux 0x2401effb register_qdisc +EXPORT_SYMBOL vmlinux 0x240e9d4e dev_open +EXPORT_SYMBOL vmlinux 0x2427bedd vmap +EXPORT_SYMBOL vmlinux 0x242e64d5 inode_init_always +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x24524768 pci_clear_master +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x246224ca filemap_fault +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x24754344 phy_device_create +EXPORT_SYMBOL vmlinux 0x249c16f1 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x24c6681a xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x251de56f dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x252505fd bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x253f3a7f sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x255a5433 __destroy_inode +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x258433e4 path_put +EXPORT_SYMBOL vmlinux 0x25949746 __devm_request_region +EXPORT_SYMBOL vmlinux 0x25b65897 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x25e4ab71 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x25ec1b28 strlen +EXPORT_SYMBOL vmlinux 0x25f36864 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x26130c67 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x26275517 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x2653f8b0 sk_wait_data +EXPORT_SYMBOL vmlinux 0x26656044 __breadahead +EXPORT_SYMBOL vmlinux 0x2676a653 bdget_disk +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x2685c3d7 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x2691eea6 skb_copy +EXPORT_SYMBOL vmlinux 0x26a35cc4 scsi_register +EXPORT_SYMBOL vmlinux 0x26c92f53 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x26e65284 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x270e629d phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x2714ebbe cdev_index +EXPORT_SYMBOL vmlinux 0x27192e29 single_open +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272aa387 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x2731d014 __nla_reserve +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x2757ff17 swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c33efe csum_ipv6_magic +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27cd6406 dquot_transfer +EXPORT_SYMBOL vmlinux 0x27f58db1 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x280ca537 blk_end_request +EXPORT_SYMBOL vmlinux 0x28481185 find_vma +EXPORT_SYMBOL vmlinux 0x285111c3 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x285135e6 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x285282b9 inet_register_protosw +EXPORT_SYMBOL vmlinux 0x285954b5 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x288b75af blk_run_queue +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28c24211 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0x28e3a729 dev_alloc_name +EXPORT_SYMBOL vmlinux 0x28e53869 sock_no_getname +EXPORT_SYMBOL vmlinux 0x28f1c988 mdiobus_write +EXPORT_SYMBOL vmlinux 0x29330ffb block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x294b54a5 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29560e6f nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x297f807e send_sig_info +EXPORT_SYMBOL vmlinux 0x298cdd38 take_over_console +EXPORT_SYMBOL vmlinux 0x2995b370 put_tty_driver +EXPORT_SYMBOL vmlinux 0x29a5540b hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x29b29018 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a3c0a23 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x2a50296a pnp_device_detach +EXPORT_SYMBOL vmlinux 0x2a7e2f75 mutex_trylock +EXPORT_SYMBOL vmlinux 0x2a810aae xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x2a8dea94 put_mnt_ns +EXPORT_SYMBOL vmlinux 0x2a9b9cf8 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x2aa220fd netif_receive_skb +EXPORT_SYMBOL vmlinux 0x2ad3e66b tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x2ae7338b serio_unregister_port +EXPORT_SYMBOL vmlinux 0x2aea1713 sock_no_bind +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2b032869 rfkill_alloc +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b0dc55a tcf_hash_create +EXPORT_SYMBOL vmlinux 0x2b188eec inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x2b26b605 dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0x2b3aca82 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x2b3b6c94 pci_read_vpd +EXPORT_SYMBOL vmlinux 0x2b7bddbf tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bb129f6 filp_open +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bbdff04 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x2bf6c5a8 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x2bf70efc __page_cache_alloc +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c0c8fc0 llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x2c35acbf vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x2c53da1f pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2cb0adab swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0x2d3924d8 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x2d3f06ab skb_copy_bits +EXPORT_SYMBOL vmlinux 0x2d5528c9 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x2d572a36 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x2d68069d inet_frag_find +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2dbafbe3 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0x2dc2f619 dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2e06111d cpu_present_mask +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e2f1e05 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x2e465263 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e4ad446 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x2e63696a xfrm_state_update +EXPORT_SYMBOL vmlinux 0x2e683ebd unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x2e69898d arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0x2e8626e8 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x2e897b6e tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x2e97a729 idr_remove +EXPORT_SYMBOL vmlinux 0x2e987dc7 tcf_hash_check +EXPORT_SYMBOL vmlinux 0x2e9db737 km_new_mapping +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ed59253 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x2ef509db blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x2f1b0bcc elv_add_request +EXPORT_SYMBOL vmlinux 0x2f8aa1c5 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x2f8ddd85 agp_generic_mask_memory +EXPORT_SYMBOL vmlinux 0x2fa5a500 memcmp +EXPORT_SYMBOL vmlinux 0x2fb3c6c7 netif_device_attach +EXPORT_SYMBOL vmlinux 0x2fd02ed4 bio_unmap_user +EXPORT_SYMBOL vmlinux 0x2fd05e0f security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x2ff063b5 acpi_get_name +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x30226ddf agp_device_command +EXPORT_SYMBOL vmlinux 0x302f1c59 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x3034a595 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0x3057fc5f bioset_create +EXPORT_SYMBOL vmlinux 0x306cde9c filp_close +EXPORT_SYMBOL vmlinux 0x30748884 rfkill_register +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30a61650 elevator_init +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30ef9e7e bio_integrity_split +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310f31da revalidate_disk +EXPORT_SYMBOL vmlinux 0x311952c1 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x316435fa ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x317abe1c vfs_write +EXPORT_SYMBOL vmlinux 0x3184c88d netpoll_print_options +EXPORT_SYMBOL vmlinux 0x318b4a2c mutex_lock +EXPORT_SYMBOL vmlinux 0x319ee080 lookup_hash +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31c3586f scsi_ioctl +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31ebadcd in_group_p +EXPORT_SYMBOL vmlinux 0x31ece21b inet6_release +EXPORT_SYMBOL vmlinux 0x31f35874 iget_failed +EXPORT_SYMBOL vmlinux 0x32214a4e kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x324af20c jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x3250973d open_by_devnum +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x329f192c scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x32a968c1 blkdev_put +EXPORT_SYMBOL vmlinux 0x32b9dc6c __put_cred +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x32d52eef kill_pid +EXPORT_SYMBOL vmlinux 0x32d80db9 get_user_pages +EXPORT_SYMBOL vmlinux 0x33196ea4 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x332695f3 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x333d0cdd neigh_update +EXPORT_SYMBOL vmlinux 0x33545aee km_state_expired +EXPORT_SYMBOL vmlinux 0x336e9868 lro_receive_skb +EXPORT_SYMBOL vmlinux 0x33876e1f cdev_del +EXPORT_SYMBOL vmlinux 0x33a430e7 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x33a9fab5 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x33b6bdd9 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0x33b84f74 copy_page +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x340e7679 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x344b7f2c jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x34882896 inode_setattr +EXPORT_SYMBOL vmlinux 0x349a3fe7 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34fc081c tcp_parse_options +EXPORT_SYMBOL vmlinux 0x35074e77 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x3511341d dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x3555524f blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x355b8931 input_register_handle +EXPORT_SYMBOL vmlinux 0x3565496b inet_frag_kill +EXPORT_SYMBOL vmlinux 0x356b57ac sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x3582ed17 vfs_stat +EXPORT_SYMBOL vmlinux 0x35879eca textsearch_prepare +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35b46a72 cdrom_release +EXPORT_SYMBOL vmlinux 0x35bbd111 lock_may_read +EXPORT_SYMBOL vmlinux 0x35be4c4c scsi_finish_command +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x361ce5a9 __invalidate_device +EXPORT_SYMBOL vmlinux 0x3629d321 pci_select_bars +EXPORT_SYMBOL vmlinux 0x3635da9f tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x3648c4aa dump_trace +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36c12ab1 __elv_add_request +EXPORT_SYMBOL vmlinux 0x36da5af9 sock_no_listen +EXPORT_SYMBOL vmlinux 0x36fc8b80 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x3701a196 csum_partial_copy_to_user +EXPORT_SYMBOL vmlinux 0x37127299 rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x3714f448 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x371ae609 agp_bridge +EXPORT_SYMBOL vmlinux 0x372a2168 tty_hangup +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x379c9195 journal_stop +EXPORT_SYMBOL vmlinux 0x37a1ae7c save_mount_options +EXPORT_SYMBOL vmlinux 0x37bb81b3 unlock_super +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37cb108e dquot_drop +EXPORT_SYMBOL vmlinux 0x37cbcf64 bio_put +EXPORT_SYMBOL vmlinux 0x37dac89e scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x37ddde7f tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x37e9be37 generic_file_llseek +EXPORT_SYMBOL vmlinux 0x37f28544 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x38056727 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x380e0f8a sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x38123ae0 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x38167680 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x385408f2 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x3873b1f7 pneigh_lookup +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38e0fe8a scm_detach_fds +EXPORT_SYMBOL vmlinux 0x38e5deca xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x38f33bed dump_fpu +EXPORT_SYMBOL vmlinux 0x39477147 pci_remove_bus +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39a608b4 pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x39a62163 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x39afdb1a jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39cd891a __down_write_trylock +EXPORT_SYMBOL vmlinux 0x39d10ba3 block_sync_page +EXPORT_SYMBOL vmlinux 0x39dfed4e hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x39fc2336 input_flush_device +EXPORT_SYMBOL vmlinux 0x39fd20a0 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x3a053dd3 mmc_resume_host +EXPORT_SYMBOL vmlinux 0x3a1953cc wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3fa5e2 key_alloc +EXPORT_SYMBOL vmlinux 0x3a95b6f0 block_write_full_page +EXPORT_SYMBOL vmlinux 0x3a9a69e5 qdisc_reset +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3aa8e5c6 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x3ab8f6b4 skb_dma_map +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3aeb53b4 bt_sock_register +EXPORT_SYMBOL vmlinux 0x3b082696 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x3b0bb788 brioctl_set +EXPORT_SYMBOL vmlinux 0x3b148191 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b378efc __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x3b599304 give_up_console +EXPORT_SYMBOL vmlinux 0x3b67cbbf __init_rwsem +EXPORT_SYMBOL vmlinux 0x3b8f1560 key_type_keyring +EXPORT_SYMBOL vmlinux 0x3b927d85 wireless_send_event +EXPORT_SYMBOL vmlinux 0x3ba1f0be md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0x3ba9302f gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x3bb2e55a udp_proc_register +EXPORT_SYMBOL vmlinux 0x3bc9732f thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3beda582 napi_complete +EXPORT_SYMBOL vmlinux 0x3c0ea694 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x3c171bb5 fddi_type_trans +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c398949 find_inode_number +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca0763f journal_clear_err +EXPORT_SYMBOL vmlinux 0x3ca4d3c2 mpage_readpage +EXPORT_SYMBOL vmlinux 0x3ca830c5 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cebd2a9 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x3d1fcfde blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x3d27ca26 load_nls +EXPORT_SYMBOL vmlinux 0x3d2e5a02 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x3d3e785a task_nice +EXPORT_SYMBOL vmlinux 0x3d4852f7 serio_interrupt +EXPORT_SYMBOL vmlinux 0x3d59118c bitmap_unplug +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3d8975dd tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x3d9ee9f0 clear_page +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3da974ae uart_match_port +EXPORT_SYMBOL vmlinux 0x3db108e3 dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0x3db28480 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3dbdfa32 file_update_time +EXPORT_SYMBOL vmlinux 0x3dfb3060 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x3e02ec3c __seq_open_private +EXPORT_SYMBOL vmlinux 0x3e05032d pci_get_class +EXPORT_SYMBOL vmlinux 0x3e053582 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e267591 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e39c85c splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x3e3eac46 register_cdrom +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e4df3fa ht_create_irq +EXPORT_SYMBOL vmlinux 0x3e6a88c5 ppp_input_error +EXPORT_SYMBOL vmlinux 0x3e7c38f1 ip_defrag +EXPORT_SYMBOL vmlinux 0x3e809534 scsi_prep_return +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3ecb6d1a tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ed8344b kill_pgrp +EXPORT_SYMBOL vmlinux 0x3ee42de1 bdi_unregister +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f0b550d sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f2fa2c0 blk_recount_segments +EXPORT_SYMBOL vmlinux 0x3f452d90 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f4fddb5 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x3f5313f5 journal_forget +EXPORT_SYMBOL vmlinux 0x3f71412b pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3fbe2fd6 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x3fe8ee20 iunique +EXPORT_SYMBOL vmlinux 0x3fec048f sg_next +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x4000645a mnt_pin +EXPORT_SYMBOL vmlinux 0x4001e241 skb_make_writable +EXPORT_SYMBOL vmlinux 0x4003cece pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x400de476 pskb_expand_head +EXPORT_SYMBOL vmlinux 0x401b2c9a key_payload_reserve +EXPORT_SYMBOL vmlinux 0x4025a1b2 mdiobus_read +EXPORT_SYMBOL vmlinux 0x403ccde0 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x4043c29c sock_i_ino +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40b0a72b kthread_stop +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x40db5fa8 registered_fb +EXPORT_SYMBOL vmlinux 0x40e82ce8 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x40eea388 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x40efcc58 ppp_register_channel +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4106367e pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x410957bd misc_register +EXPORT_SYMBOL vmlinux 0x410b2c2a security_inode_init_security +EXPORT_SYMBOL vmlinux 0x41107ce6 compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41293379 xfrm_state_add +EXPORT_SYMBOL vmlinux 0x412fc296 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x41316039 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x4143407c dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x414cd7f7 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x41667c60 genl_register_ops +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x419e3221 dev_get_stats +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41ab913f nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x41dd724a I_BDEV +EXPORT_SYMBOL vmlinux 0x41f5239d input_allocate_device +EXPORT_SYMBOL vmlinux 0x4204b482 keyring_clear +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x4219d015 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x424b2464 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x4266b07a hci_recv_fragment +EXPORT_SYMBOL vmlinux 0x4269a75b netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0x4274b074 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x4293a2d0 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x42a4bdf2 in_egroup_p +EXPORT_SYMBOL vmlinux 0x42a7a4c7 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42c8de35 ioremap_nocache +EXPORT_SYMBOL vmlinux 0x42eedd41 pci_pme_active +EXPORT_SYMBOL vmlinux 0x42f01a21 sysctl_string +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4308bb67 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0x430dde11 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x431b8904 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x431c2e0f per_cpu__kernel_stack +EXPORT_SYMBOL vmlinux 0x431ea035 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x4327f0d5 memset_io +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x43a362b0 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43af1bb4 d_rehash +EXPORT_SYMBOL vmlinux 0x43ba23fb nla_reserve +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x43f81a93 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x43f89658 scsi_register_interface +EXPORT_SYMBOL vmlinux 0x4409f2c1 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44200ae7 security_inode_permission +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x44740969 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x44898095 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44b93df0 d_obtain_alias +EXPORT_SYMBOL vmlinux 0x44be098f __brelse +EXPORT_SYMBOL vmlinux 0x44be4622 update_region +EXPORT_SYMBOL vmlinux 0x44c43c06 km_policy_notify +EXPORT_SYMBOL vmlinux 0x44c6e88e dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x44d560e3 init_level4_pgt +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x452cdbca dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x45686895 hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0x4568cee7 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x457c1d6f dst_alloc +EXPORT_SYMBOL vmlinux 0x457e3f12 thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x45809951 may_umount_tree +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45ac5cd0 dma_set_mask +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45dfc09f dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x45e9d249 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x46205b8f insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x466cf120 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x4687b83d rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0x46c13d58 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x46c47fb6 __node_distance +EXPORT_SYMBOL vmlinux 0x46d16e4e dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x46e96ce6 xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475d6dcf scsi_print_result +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x477bfd64 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x479ee488 input_unregister_handle +EXPORT_SYMBOL vmlinux 0x47a6d1ec swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x47acc7f7 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x47be1e85 kernel_bind +EXPORT_SYMBOL vmlinux 0x47d87f11 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x47ddfc0d blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x47ef26dc dm_register_target +EXPORT_SYMBOL vmlinux 0x47fb64fa mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0x480c19c9 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x484024c2 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x4852bc47 d_splice_alias +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x485db5ea f_setown +EXPORT_SYMBOL vmlinux 0x486737d3 seq_release_private +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x487aee47 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x48828fd7 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x488aeca9 kobject_put +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48dffaa6 swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0x491bc93a security_path_rename +EXPORT_SYMBOL vmlinux 0x4935d750 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x4939684d jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x494dd75f __scsi_add_device +EXPORT_SYMBOL vmlinux 0x494e3393 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49c38155 phy_disconnect +EXPORT_SYMBOL vmlinux 0x49cb7240 sock_register +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49dc34bf pci_release_regions +EXPORT_SYMBOL vmlinux 0x49dc9d97 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a386457 eth_header +EXPORT_SYMBOL vmlinux 0x4a464d2e qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x4a468f0b set_anon_super +EXPORT_SYMBOL vmlinux 0x4a5c695c simple_empty +EXPORT_SYMBOL vmlinux 0x4a7758a9 register_key_type +EXPORT_SYMBOL vmlinux 0x4a80ace5 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x4aa3f463 rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0x4acad495 skb_over_panic +EXPORT_SYMBOL vmlinux 0x4acb4dc3 agp_alloc_page_array +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL vmlinux 0x4b21856c lock_rename +EXPORT_SYMBOL vmlinux 0x4b470804 simple_statfs +EXPORT_SYMBOL vmlinux 0x4b4dbe54 km_report +EXPORT_SYMBOL vmlinux 0x4b772a5c sk_receive_skb +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b9c59af scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x4ba1541e ip6_route_output +EXPORT_SYMBOL vmlinux 0x4ba5baa0 load_gs_index +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bbfae8f init_buffer +EXPORT_SYMBOL vmlinux 0x4bdf028e idr_find +EXPORT_SYMBOL vmlinux 0x4be501ef release_sock +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c37e894 d_alloc_root +EXPORT_SYMBOL vmlinux 0x4c3d264c xfrm_lookup +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c8aabc5 agp_generic_destroy_pages +EXPORT_SYMBOL vmlinux 0x4c8f833e console_start +EXPORT_SYMBOL vmlinux 0x4c908998 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x4ca02033 override_creds +EXPORT_SYMBOL vmlinux 0x4ca15557 nf_afinfo +EXPORT_SYMBOL vmlinux 0x4cba23c9 d_instantiate +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cc4142f set_bh_page +EXPORT_SYMBOL vmlinux 0x4cd0ac85 nf_ct_attach +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dcaa612 swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4df0c892 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4df184fa journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e13859f alloc_trdev +EXPORT_SYMBOL vmlinux 0x4e2d5487 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e67016d journal_set_features +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e727e0b get_write_access +EXPORT_SYMBOL vmlinux 0x4e813af8 mmc_detect_change +EXPORT_SYMBOL vmlinux 0x4e93243a agp_generic_alloc_user +EXPORT_SYMBOL vmlinux 0x4ea90e30 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x4eb90adc scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x4eba1bcf __blk_end_request +EXPORT_SYMBOL vmlinux 0x4ec5be0e skb_split +EXPORT_SYMBOL vmlinux 0x4eda401c inet_shutdown +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4f031887 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x4f057f80 phy_device_free +EXPORT_SYMBOL vmlinux 0x4f3ca819 simple_lookup +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f556597 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x4f55f8b6 bd_claim +EXPORT_SYMBOL vmlinux 0x4f76cac1 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0x4fcc3abe hci_alloc_dev +EXPORT_SYMBOL vmlinux 0x4fcc5eea udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x4fcee107 __up_read +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fed309e dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x50267b06 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x502d3ae9 sk_free +EXPORT_SYMBOL vmlinux 0x5035348a dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x50585b9b skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x50695679 tcp_sendpage +EXPORT_SYMBOL vmlinux 0x506966c5 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x50b5cb2d idr_get_new_above +EXPORT_SYMBOL vmlinux 0x50d49ed8 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x50e195f1 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x50fc3712 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x5105c7ca dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x51144b1c write_inode_now +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x511924bf pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x511c1e52 pci_dev_put +EXPORT_SYMBOL vmlinux 0x514a10a4 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x515092d8 scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x51813054 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0x5187ac4b xen_store_evtchn +EXPORT_SYMBOL vmlinux 0x51c876a8 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51f1ec66 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x52087166 sk_stop_timer +EXPORT_SYMBOL vmlinux 0x520bc023 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x521ad0f1 ll_rw_block +EXPORT_SYMBOL vmlinux 0x522641b5 uart_suspend_port +EXPORT_SYMBOL vmlinux 0x52310441 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x5252f304 __memcpy_toio +EXPORT_SYMBOL vmlinux 0x5258701e rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528028a4 skb_pad +EXPORT_SYMBOL vmlinux 0x528a88be key_task_permission +EXPORT_SYMBOL vmlinux 0x5291184f bio_endio +EXPORT_SYMBOL vmlinux 0x5293da35 module_refcount +EXPORT_SYMBOL vmlinux 0x529eb634 phy_connect +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52db112d sock_no_connect +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x530f86cf dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x533beeff compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x538b5ec2 devm_ioremap +EXPORT_SYMBOL vmlinux 0x539cc500 __f_setown +EXPORT_SYMBOL vmlinux 0x53a308ad inode_set_bytes +EXPORT_SYMBOL vmlinux 0x53ba6b95 iget_locked +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53ec5b56 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x5424dc05 inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54291df6 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x5471fce6 ether_setup +EXPORT_SYMBOL vmlinux 0x54795ef7 input_set_keycode +EXPORT_SYMBOL vmlinux 0x547b39b7 del_gendisk +EXPORT_SYMBOL vmlinux 0x54991bc5 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x549a4506 __scm_destroy +EXPORT_SYMBOL vmlinux 0x54b3f073 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x54ce229e dm_io_client_create +EXPORT_SYMBOL vmlinux 0x54dbec7d tcp_connect +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x55100a7c mdiobus_free +EXPORT_SYMBOL vmlinux 0x55116645 __neigh_event_send +EXPORT_SYMBOL vmlinux 0x552d79cf generic_write_checks +EXPORT_SYMBOL vmlinux 0x554f0a48 groups_alloc +EXPORT_SYMBOL vmlinux 0x555c1aaf is_container_init +EXPORT_SYMBOL vmlinux 0x55735b4b pnp_activate_dev +EXPORT_SYMBOL vmlinux 0x558cb02f icmp_send +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55ceed0e bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x55f735ee pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5605e874 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x56181223 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x5628816d tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x568b2c21 agp_generic_alloc_by_type +EXPORT_SYMBOL vmlinux 0x569d0c4c pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x571ce02a is_bad_inode +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x573672e2 register_framebuffer +EXPORT_SYMBOL vmlinux 0x57381bbd xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x573fb4db sock_no_accept +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x57660f31 kernel_read +EXPORT_SYMBOL vmlinux 0x57b039db xfrm_init_state +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57eb1619 kmem_cache_name +EXPORT_SYMBOL vmlinux 0x58019865 scsi_unregister +EXPORT_SYMBOL vmlinux 0x581b5f1b eth_change_mtu +EXPORT_SYMBOL vmlinux 0x5828365d pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5840355a inet_bind +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x584d21f8 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x58682a1d framebuffer_release +EXPORT_SYMBOL vmlinux 0x589de9b1 dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x58a1ccc5 tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x58b72913 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c26af4 pci_choose_state +EXPORT_SYMBOL vmlinux 0x58e664d9 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x58f8f1eb bio_free +EXPORT_SYMBOL vmlinux 0x58fb3788 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x5904607b generic_listxattr +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x5963f938 llc_sap_close +EXPORT_SYMBOL vmlinux 0x59a3c371 acpi_is_video_device +EXPORT_SYMBOL vmlinux 0x59a4d17e neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x59a59e41 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x5a05d5ca acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0x5a12c769 netpoll_setup +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a36c500 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a4af7e8 generic_write_end +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a69219f __up_write +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a92c317 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5ade10ac pci_disable_msi +EXPORT_SYMBOL vmlinux 0x5b1be29e key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x5b340a92 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b5a2a32 smp_call_function_many +EXPORT_SYMBOL vmlinux 0x5b69d20d file_fsync +EXPORT_SYMBOL vmlinux 0x5b6f5742 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b94b0e4 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0x5b94fc62 journal_release_buffer +EXPORT_SYMBOL vmlinux 0x5b9beb34 xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0x5bae2eac acpi_extract_package +EXPORT_SYMBOL vmlinux 0x5bd1742e genphy_read_status +EXPORT_SYMBOL vmlinux 0x5be0c287 input_grab_device +EXPORT_SYMBOL vmlinux 0x5bec44cb __down_write +EXPORT_SYMBOL vmlinux 0x5bf07139 neigh_seq_next +EXPORT_SYMBOL vmlinux 0x5c192898 mark_page_accessed +EXPORT_SYMBOL vmlinux 0x5c3c4a11 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x5c431c34 free_netdev +EXPORT_SYMBOL vmlinux 0x5c835ef6 kobject_init +EXPORT_SYMBOL vmlinux 0x5c96ed08 fb_set_var +EXPORT_SYMBOL vmlinux 0x5c9e8a65 noop_qdisc +EXPORT_SYMBOL vmlinux 0x5ca7f655 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0x5cad0517 llc_sap_find +EXPORT_SYMBOL vmlinux 0x5cb0e81a tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x5cb9e594 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x5cb9fec5 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x5cc3c99e write_cache_pages +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5cf242b6 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x5d10b47b bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d12f7af agp_allocate_memory +EXPORT_SYMBOL vmlinux 0x5d74dbcf pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x5d7b0189 dst_destroy +EXPORT_SYMBOL vmlinux 0x5d926127 fb_show_logo +EXPORT_SYMBOL vmlinux 0x5dceb791 nf_reinject +EXPORT_SYMBOL vmlinux 0x5dd14fbb phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x5de0922a hci_free_dev +EXPORT_SYMBOL vmlinux 0x5de8c1ff xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x5debbd63 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x5e0bfd74 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x5e324235 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x5e651c89 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x5e7638b1 tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x5e7f8249 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5e9d12e2 vm_map_ram +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eb5d681 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x5ec8ca16 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5eef7620 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x5ef3995e cfb_imageblit +EXPORT_SYMBOL vmlinux 0x5ef3abd1 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x5f0ad503 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5f2625ea register_filesystem +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x60017e40 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x603ee96f ip_dev_find +EXPORT_SYMBOL vmlinux 0x6044cf53 get_phy_device +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x6083cb80 request_key +EXPORT_SYMBOL vmlinux 0x608918f6 agp_generic_free_gatt_table +EXPORT_SYMBOL vmlinux 0x608b3f57 inode_change_ok +EXPORT_SYMBOL vmlinux 0x60926bcc d_invalidate +EXPORT_SYMBOL vmlinux 0x6095180d pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60a93dec page_follow_link_light +EXPORT_SYMBOL vmlinux 0x60abda95 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x60dcc37a tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x60e147f3 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0x610c89ea neigh_destroy +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x619c2dca i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61c703e5 security_file_permission +EXPORT_SYMBOL vmlinux 0x61c77264 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x61dd8549 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x61eb6071 __lock_page +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62748e70 acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0x6275ea81 scsi_register_driver +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62955c06 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x629fbede pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x62b74f94 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x62d22de0 lro_flush_all +EXPORT_SYMBOL vmlinux 0x62ecf7e1 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x63013eaf sk_run_filter +EXPORT_SYMBOL vmlinux 0x630ed1a7 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x6322ce5d tty_set_operations +EXPORT_SYMBOL vmlinux 0x6343c952 alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x63496371 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x63519d52 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x6386c431 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x63ae7539 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x63bc6669 sock_no_poll +EXPORT_SYMBOL vmlinux 0x63c0af86 arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x63d48c62 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63fc232f strlen_user +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640c7a83 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x641943a0 dev_get_flags +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x643e2c64 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x64461bb5 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x64511c22 __register_binfmt +EXPORT_SYMBOL vmlinux 0x6465e34f key_revoke +EXPORT_SYMBOL vmlinux 0x64666fe2 dentry_unhash +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x64809332 filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64c175c5 send_sig +EXPORT_SYMBOL vmlinux 0x64c8378b neigh_table_clear +EXPORT_SYMBOL vmlinux 0x64c92221 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x64d78a60 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x64dde00f dput +EXPORT_SYMBOL vmlinux 0x64e6baa6 ip_fragment +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64fcac1f jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x65014838 ip6_xmit +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x6554799c qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x6586fc7c pagevec_lookup +EXPORT_SYMBOL vmlinux 0x659809e0 bio_pair_release +EXPORT_SYMBOL vmlinux 0x659ef0c5 skb_queue_purge +EXPORT_SYMBOL vmlinux 0x65deeed0 unregister_netdevice +EXPORT_SYMBOL vmlinux 0x65e8f47c register_sysctl_table +EXPORT_SYMBOL vmlinux 0x65ee14a8 ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x6606d168 input_inject_event +EXPORT_SYMBOL vmlinux 0x6631d483 __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x666a00d7 get_sb_single +EXPORT_SYMBOL vmlinux 0x666f0e9a filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x6672596b ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x667352dd journal_flush +EXPORT_SYMBOL vmlinux 0x668193cd dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x669ce0c0 make_EII_client +EXPORT_SYMBOL vmlinux 0x669de1c4 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x66ba277d sync_page_range +EXPORT_SYMBOL vmlinux 0x66e1715a genphy_suspend +EXPORT_SYMBOL vmlinux 0x66f3d48a kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x66f7f996 bioset_free +EXPORT_SYMBOL vmlinux 0x67040c04 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x670ee6e1 inet_release +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x672c2b06 register_gifconf +EXPORT_SYMBOL vmlinux 0x673f815e agp_bridges +EXPORT_SYMBOL vmlinux 0x6787612a inet_stream_connect +EXPORT_SYMBOL vmlinux 0x67914a5c arp_create +EXPORT_SYMBOL vmlinux 0x6796c128 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x67a98db9 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67b516c3 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x67b9967f kset_unregister +EXPORT_SYMBOL vmlinux 0x67c6ff44 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x67cdd1a8 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x6830b87d ps2_init +EXPORT_SYMBOL vmlinux 0x687008db nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x68857e6a security_path_truncate +EXPORT_SYMBOL vmlinux 0x68eab52b tcp_ioctl +EXPORT_SYMBOL vmlinux 0x6907d4e9 idr_for_each +EXPORT_SYMBOL vmlinux 0x691e0ba2 bio_add_page +EXPORT_SYMBOL vmlinux 0x694736f9 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0x694f961a dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x696c58de scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6976e198 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69c55555 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69efd3e1 disk_stack_limits +EXPORT_SYMBOL vmlinux 0x69f074af per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x69fc4a03 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a315563 security_path_symlink +EXPORT_SYMBOL vmlinux 0x6a3d4468 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a5f98a0 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a7c16d8 bio_init +EXPORT_SYMBOL vmlinux 0x6a816724 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x6a951c3e blk_start_request +EXPORT_SYMBOL vmlinux 0x6a9e57fd thaw_bdev +EXPORT_SYMBOL vmlinux 0x6a9f4bf8 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x6ac65f54 skb_queue_tail +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6adfa083 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x6af31cc3 unregister_netdev +EXPORT_SYMBOL vmlinux 0x6b076f6a proc_dostring +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b366910 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b59a968 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x6b731228 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb1970a generic_permission +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bcc3b83 do_sync_write +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6bf3513c neigh_parms_release +EXPORT_SYMBOL vmlinux 0x6c1ef282 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x6c2a01ce blk_rq_init +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c612c99 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6974ff blk_free_tags +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6cdc2090 __napi_complete +EXPORT_SYMBOL vmlinux 0x6d0e3039 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x6d17327e qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d334118 __get_user_8 +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d5913df dev_get_by_index +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d87245f sync_blockdev +EXPORT_SYMBOL vmlinux 0x6d94726b jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x6db0067d sockfd_lookup +EXPORT_SYMBOL vmlinux 0x6db1fbba jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x6db7ccdc dma_ops +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dc69c25 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x6dc96f29 block_commit_write +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6df679e0 prepare_binprm +EXPORT_SYMBOL vmlinux 0x6e018eba scm_fp_dup +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0c884e sk_filter +EXPORT_SYMBOL vmlinux 0x6e173c50 uart_register_driver +EXPORT_SYMBOL vmlinux 0x6e448311 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x6e54a1bd __scsi_put_command +EXPORT_SYMBOL vmlinux 0x6e57b03b ps2_drain +EXPORT_SYMBOL vmlinux 0x6e605cb5 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6eb37d97 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x6ef47c27 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x6f2fccc7 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f556d60 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x6f793edc agp_generic_insert_memory +EXPORT_SYMBOL vmlinux 0x6f98230d pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x6f9ed0b3 unregister_snap_client +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x6fd6bdf7 tty_vhangup +EXPORT_SYMBOL vmlinux 0x6fe14f3b agp_bind_memory +EXPORT_SYMBOL vmlinux 0x6ff77794 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x700b85e5 __inet6_hash +EXPORT_SYMBOL vmlinux 0x701438ed vc_resize +EXPORT_SYMBOL vmlinux 0x70537c57 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x7067db33 block_read_full_page +EXPORT_SYMBOL vmlinux 0x706dcb2d default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x70765d1c vfs_lstat +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70e0d61f cpu_all_bits +EXPORT_SYMBOL vmlinux 0x70e118dd lock_fb_info +EXPORT_SYMBOL vmlinux 0x7114afde elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x71259652 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x7127421c pci_target_state +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x713007a2 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x713aced1 vfs_statfs +EXPORT_SYMBOL vmlinux 0x713d052d may_umount +EXPORT_SYMBOL vmlinux 0x715b50c4 agp_generic_alloc_pages +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71796dc4 __free_pages +EXPORT_SYMBOL vmlinux 0x717c59f1 input_close_device +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71f6eb38 sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x71f8cf38 kill_litter_super +EXPORT_SYMBOL vmlinux 0x7203f92e llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x7231ca11 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x7247c9e9 insert_inode_locked +EXPORT_SYMBOL vmlinux 0x725e4b4f seq_lseek +EXPORT_SYMBOL vmlinux 0x726fffbc vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x728f8d71 __getblk +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x72faff94 mmc_free_host +EXPORT_SYMBOL vmlinux 0x731e61b3 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x733be169 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x73508fc2 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7376028b ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x738d32a7 journal_update_format +EXPORT_SYMBOL vmlinux 0x739ee22d gen_pool_add +EXPORT_SYMBOL vmlinux 0x73a019e0 simple_unlink +EXPORT_SYMBOL vmlinux 0x73b1d6c5 key_unlink +EXPORT_SYMBOL vmlinux 0x73c9e3ac page_symlink +EXPORT_SYMBOL vmlinux 0x73e51872 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x73ef940a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x74276aee __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x7430d275 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x7437d2fa get_fs_type +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74a11af9 set_pages_array_uc +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74ee8045 skb_store_bits +EXPORT_SYMBOL vmlinux 0x74faabbc set_device_ro +EXPORT_SYMBOL vmlinux 0x750626a3 d_validate +EXPORT_SYMBOL vmlinux 0x75211339 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x75285f2b blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x752d9fa4 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x75316cc2 security_path_link +EXPORT_SYMBOL vmlinux 0x7538b132 agp_off +EXPORT_SYMBOL vmlinux 0x7569845c xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x759640e2 genl_sock +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75c62cd0 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0x76003893 revert_creds +EXPORT_SYMBOL vmlinux 0x7603c939 set_user_nice +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x7610083d blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x762ed42d tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x765308f8 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x765c6f99 kill_anon_super +EXPORT_SYMBOL vmlinux 0x766dd027 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x767dd8fd acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x7690fc84 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x76b2f46a bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76c4b2d9 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x76c9b062 input_unregister_device +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76d655c0 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x76d6bb5f arp_send +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x7706d9e2 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x772779b0 md_write_end +EXPORT_SYMBOL vmlinux 0x772e1acb __pagevec_release +EXPORT_SYMBOL vmlinux 0x7737996d ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0x7781fb7d kernel_listen +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77c22e45 uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77f18d65 rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0x77f53abc acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x77fe6c0f journal_start +EXPORT_SYMBOL vmlinux 0x782acba5 crc_t10dif +EXPORT_SYMBOL vmlinux 0x7832cbdb mnt_unpin +EXPORT_SYMBOL vmlinux 0x785148a3 idr_destroy +EXPORT_SYMBOL vmlinux 0x785eca77 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x7880c681 con_is_bound +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78ba5f2f tcp_read_sock +EXPORT_SYMBOL vmlinux 0x78be58f6 sock_recvmsg +EXPORT_SYMBOL vmlinux 0x78d5c15c jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78fe3f0a destroy_EII_client +EXPORT_SYMBOL vmlinux 0x78feb3f8 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x797ca251 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x798c549a pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x798db316 ipv4_specific +EXPORT_SYMBOL vmlinux 0x7997aa11 skb_checksum_help +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79ba8d68 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x7a17649c __alloc_skb +EXPORT_SYMBOL vmlinux 0x7a26fd84 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a5abf03 register_netdevice +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7a87bfc9 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0x7a915f9d vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x7aa24281 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x7aa4d4b6 mntput_no_expire +EXPORT_SYMBOL vmlinux 0x7abcd77e eth_mac_addr +EXPORT_SYMBOL vmlinux 0x7ae22531 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b378fd6 inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b6982d3 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x7b789e02 __napi_schedule +EXPORT_SYMBOL vmlinux 0x7b8556c3 file_remove_suid +EXPORT_SYMBOL vmlinux 0x7b8920d9 vfs_readdir +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7b958726 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x7bbb691f pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x7bddf3bb scsi_remove_device +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c139914 skb_insert +EXPORT_SYMBOL vmlinux 0x7c15cb8f dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c8d4ddc uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c919456 dget_locked +EXPORT_SYMBOL vmlinux 0x7ca0e8a4 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cb258fc pci_disable_msix +EXPORT_SYMBOL vmlinux 0x7cb6c8c6 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0x7cd13f9e agp_generic_create_gatt_table +EXPORT_SYMBOL vmlinux 0x7cd6763a bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x7d08f9be set_disk_ro +EXPORT_SYMBOL vmlinux 0x7d0fffe1 tcp_check_req +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d1a419e module_layout +EXPORT_SYMBOL vmlinux 0x7d3e270a vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x7d6bb587 cpu_online_mask +EXPORT_SYMBOL vmlinux 0x7d7decd8 add_disk +EXPORT_SYMBOL vmlinux 0x7d7ee04e agp_create_memory +EXPORT_SYMBOL vmlinux 0x7d94f746 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x7d9ede42 netlink_set_err +EXPORT_SYMBOL vmlinux 0x7dc135e2 node_data +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e7c9f76 module_put +EXPORT_SYMBOL vmlinux 0x7e888d75 hci_send_acl +EXPORT_SYMBOL vmlinux 0x7e983126 flush_old_exec +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ec4e343 nla_put +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7efb4482 pci_enable_device +EXPORT_SYMBOL vmlinux 0x7efbd888 agp_backend_release +EXPORT_SYMBOL vmlinux 0x7efd7b73 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x7f17eec9 commit_creds +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f2a72a0 ppp_channel_index +EXPORT_SYMBOL vmlinux 0x7f3627ee put_page +EXPORT_SYMBOL vmlinux 0x7f4abdb2 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x7f692094 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7fcb2992 unlock_rename +EXPORT_SYMBOL vmlinux 0x7fd24892 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x804038bc neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x807f27a1 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0x809c8633 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x80b07199 agp_put_bridge +EXPORT_SYMBOL vmlinux 0x80b11196 ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0x80be97f0 sock_release +EXPORT_SYMBOL vmlinux 0x80dbee3a tc_classify +EXPORT_SYMBOL vmlinux 0x80ffe46e invalidate_partition +EXPORT_SYMBOL vmlinux 0x8136c839 __devm_release_region +EXPORT_SYMBOL vmlinux 0x8142d834 eth_header_parse +EXPORT_SYMBOL vmlinux 0x8145e7f9 pv_irq_ops +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x8155286a close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x81587b33 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x8159676f tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x816006df pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x81833010 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x8183acee thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0x819662ab zero_fill_bio +EXPORT_SYMBOL vmlinux 0x81d058bf ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x82079e60 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x8212721d xenbus_dev_request_and_reply +EXPORT_SYMBOL vmlinux 0x822cdff9 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x824660a0 mdiobus_register +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x825fece1 unload_nls +EXPORT_SYMBOL vmlinux 0x82685193 blk_sync_queue +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826a4fa4 unlock_buffer +EXPORT_SYMBOL vmlinux 0x827fd528 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x82953b0c pci_iomap +EXPORT_SYMBOL vmlinux 0x82a66c08 tty_free_termios +EXPORT_SYMBOL vmlinux 0x82de1fe1 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x8309002f do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x830e547b ioremap_prot +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x83288ea6 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x832be5d3 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x832dad4e scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x83341eb4 bdev_read_only +EXPORT_SYMBOL vmlinux 0x83663731 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x8373c51f vfs_readv +EXPORT_SYMBOL vmlinux 0x8388b85b tty_unregister_device +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83abd7f2 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x83ad493a n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83d0e1b1 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x83e4e9fd tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x83f6b3b9 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x8419ba0c bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x841f4045 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x84423675 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x844c3662 inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x8458427b pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x8492035a bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x84a7ad0d tty_register_driver +EXPORT_SYMBOL vmlinux 0x84beb2b2 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x84ee40a5 migrate_page +EXPORT_SYMBOL vmlinux 0x84fef6eb ip6_frag_init +EXPORT_SYMBOL vmlinux 0x8510afc7 put_disk +EXPORT_SYMBOL vmlinux 0x852f6e8c seq_read +EXPORT_SYMBOL vmlinux 0x8539b240 sock_map_fd +EXPORT_SYMBOL vmlinux 0x85468915 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x855797c8 __bread +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x85693451 dqput +EXPORT_SYMBOL vmlinux 0x856a6b70 scsi_print_command +EXPORT_SYMBOL vmlinux 0x858975b7 hci_unregister_cb +EXPORT_SYMBOL vmlinux 0x859d06fc register_console +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85afdf29 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x85b9672b clocksource_register +EXPORT_SYMBOL vmlinux 0x85c62d09 bdput +EXPORT_SYMBOL vmlinux 0x85d35ce8 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e50854 do_splice_from +EXPORT_SYMBOL vmlinux 0x85ec0e12 phy_detach +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x8633a885 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x863f3c9c tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x864b6dad unregister_qdisc +EXPORT_SYMBOL vmlinux 0x865172eb skb_trim +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866974a8 generic_fillattr +EXPORT_SYMBOL vmlinux 0x8683d9cb cdev_add +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x8696dd88 dquot_alloc +EXPORT_SYMBOL vmlinux 0x86ae7b45 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0x86c7146d vfs_fstat +EXPORT_SYMBOL vmlinux 0x86ed0cc7 tcp_shutdown +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x8738387d elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x874ad2eb simple_pin_fs +EXPORT_SYMBOL vmlinux 0x87619e21 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87a79cba pcim_pin_device +EXPORT_SYMBOL vmlinux 0x87c141a3 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x87ea0344 rfkill_destroy +EXPORT_SYMBOL vmlinux 0x87f5afbe blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x881108b9 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x88111156 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x88117451 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x88302d0b qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x8839e2c4 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x8851e80e netif_device_detach +EXPORT_SYMBOL vmlinux 0x88540587 scsi_put_command +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x88739cff locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x889d8f0d xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x889f46b7 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x88aa4623 blk_complete_request +EXPORT_SYMBOL vmlinux 0x88b7d591 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x88bfabdb blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x88ec6920 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x8902ad9c pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x89112678 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0x891dcabc console_stop +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x893d828e scsi_prep_fn +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x896c2045 register_nls +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x89a3ac37 ndisc_send_rs +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89ea8805 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a2287c4 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x8a2aa17d hci_register_dev +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a451b6b blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x8a52e7af inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a8ce8b6 fsync_bdev +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8aa0ee73 pci_find_device +EXPORT_SYMBOL vmlinux 0x8aa1ed29 generic_file_open +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8ae25b3f get_super +EXPORT_SYMBOL vmlinux 0x8b35e873 sg_last +EXPORT_SYMBOL vmlinux 0x8b3f6242 mmc_add_host +EXPORT_SYMBOL vmlinux 0x8b496d4c thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8b824f9d xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x8b922c0f __strnlen_user +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bebde71 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x8bf4aac3 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x8bf9ce6d __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x8bfd257b pci_set_master +EXPORT_SYMBOL vmlinux 0x8c0f2600 bdi_destroy +EXPORT_SYMBOL vmlinux 0x8c13d0ab dm_unregister_target +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c65230d acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0x8c69a1a9 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x8c98b3a5 uart_update_timeout +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cd9fd97 llc_sap_open +EXPORT_SYMBOL vmlinux 0x8ce195a3 xfrm_register_km +EXPORT_SYMBOL vmlinux 0x8d0bb41e pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4ebc82 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d74ad4c eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x8d7c468f bt_sock_link +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8d9cbf7d generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x8dacaaa3 follow_up +EXPORT_SYMBOL vmlinux 0x8dad6bc8 serio_open +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8dd2ad61 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x8ddaad70 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x8de02118 create_proc_entry +EXPORT_SYMBOL vmlinux 0x8de72fcc rfkill_blocked +EXPORT_SYMBOL vmlinux 0x8df32620 inet6_ioctl +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e0ff6df skb_seq_read +EXPORT_SYMBOL vmlinux 0x8e1a29c0 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e3ed6b6 acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0x8e588592 i2c_verify_client +EXPORT_SYMBOL vmlinux 0x8e5d2544 agp_free_memory +EXPORT_SYMBOL vmlinux 0x8e6d30eb journal_ack_err +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8eb95a1d page_readlink +EXPORT_SYMBOL vmlinux 0x8ecaa465 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8efcfc80 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0x8f3e5899 agp_generic_alloc_page +EXPORT_SYMBOL vmlinux 0x8f40ec62 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f74278a scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0x8f8f2586 vmtruncate +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fa01f0f tcp_proc_register +EXPORT_SYMBOL vmlinux 0x8fafdc7e skb_append +EXPORT_SYMBOL vmlinux 0x8fdcbf5b unregister_key_type +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x900fe4fb request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x90249ea5 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x904d922a pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x9091fe5f find_get_page +EXPORT_SYMBOL vmlinux 0x9097b6d7 init_task +EXPORT_SYMBOL vmlinux 0x909f0f41 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x90eb2985 agp_alloc_bridge +EXPORT_SYMBOL vmlinux 0x90f77d16 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x90fb13b5 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x90fbbebb udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x910efefc dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x9125510b seq_path +EXPORT_SYMBOL vmlinux 0x91385af1 replace_mount_options +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x914d8718 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x91524a5d scsi_remove_target +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x91696263 poll_freewait +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9183ce28 md_check_recovery +EXPORT_SYMBOL vmlinux 0x91dac123 km_query +EXPORT_SYMBOL vmlinux 0x91ffb95b generic_delete_inode +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x9217f6fb udp_poll +EXPORT_SYMBOL vmlinux 0x92371c11 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x925df9c1 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x925fb355 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x926f7a1f genphy_resume +EXPORT_SYMBOL vmlinux 0x927e989f gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x928abc32 kobject_set_name +EXPORT_SYMBOL vmlinux 0x929445ef simple_release_fs +EXPORT_SYMBOL vmlinux 0x92b9cde9 submit_bh +EXPORT_SYMBOL vmlinux 0x92ccfe74 fb_pan_display +EXPORT_SYMBOL vmlinux 0x92e1f638 alloc_disk +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x93794b7c pipe_unlock +EXPORT_SYMBOL vmlinux 0x938c0e23 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x939f9747 netdev_set_master +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93eebf45 pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9421225f jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x94276445 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x943e868f ida_get_new +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x944d624a xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x945bc6a7 copy_from_user +EXPORT_SYMBOL vmlinux 0x947f00a1 dev_addr_add +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94a3bf6b acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x94be677e key_link +EXPORT_SYMBOL vmlinux 0x94c2b0f3 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x94e2be96 tcp_poll +EXPORT_SYMBOL vmlinux 0x94fe789b netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x95232e72 swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0x95352ea9 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x95594955 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x9580ef1d pci_disable_device +EXPORT_SYMBOL vmlinux 0x95b00df3 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x95cd9a02 simple_set_mnt +EXPORT_SYMBOL vmlinux 0x95cd9a9d blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x95e37c63 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x96312f5b skb_put +EXPORT_SYMBOL vmlinux 0x9637bc83 dquot_commit +EXPORT_SYMBOL vmlinux 0x96476765 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0x96924103 inet_csk_accept +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96d34973 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x96d40f9c dev_trans_start +EXPORT_SYMBOL vmlinux 0x96e0ac63 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x96ec9104 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x96f33400 up_read +EXPORT_SYMBOL vmlinux 0x9701cdf5 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x973ddd36 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x977580fc simple_getattr +EXPORT_SYMBOL vmlinux 0x977e44e7 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x97861898 drop_super +EXPORT_SYMBOL vmlinux 0x9789b1c1 sock_kmalloc +EXPORT_SYMBOL vmlinux 0x97956ae8 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x97ade8c3 cdrom_mode_select +EXPORT_SYMBOL vmlinux 0x97c4f9cb generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0x97cd584e aio_put_req +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x980fe7c9 make_bad_inode +EXPORT_SYMBOL vmlinux 0x983243b1 fd_install +EXPORT_SYMBOL vmlinux 0x98344564 sg_miter_start +EXPORT_SYMBOL vmlinux 0x98355c08 register_netdev +EXPORT_SYMBOL vmlinux 0x9835dc7c tty_devnum +EXPORT_SYMBOL vmlinux 0x983aebd4 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x984b3f74 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x984cce6e log_wait_commit +EXPORT_SYMBOL vmlinux 0x986bfe2d jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x9874a6ae blk_put_request +EXPORT_SYMBOL vmlinux 0x9876297b sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x987e792a inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0x9886697a __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x9889e4c9 d_alloc_name +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x98937846 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x989ec7eb bio_kmalloc +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98c9c9f9 journal_destroy +EXPORT_SYMBOL vmlinux 0x98d6fd47 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0x99292449 pnp_is_active +EXPORT_SYMBOL vmlinux 0x992ff4a4 set_irq_chip +EXPORT_SYMBOL vmlinux 0x99303840 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x9938169f phy_attach_direct +EXPORT_SYMBOL vmlinux 0x99547f4f bmap +EXPORT_SYMBOL vmlinux 0x996cddde dma_pool_create +EXPORT_SYMBOL vmlinux 0x99750ad4 tty_write_room +EXPORT_SYMBOL vmlinux 0x99794b34 dev_unicast_add +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99a60f97 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a00a50b register_exec_domain +EXPORT_SYMBOL vmlinux 0x9a131e94 dm_get_device +EXPORT_SYMBOL vmlinux 0x9a173c86 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a4f811f poll_initwait +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9ab96c1a __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x9acd078f input_event +EXPORT_SYMBOL vmlinux 0x9acd773b should_remove_suid +EXPORT_SYMBOL vmlinux 0x9ad18b5e scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0x9adc259b skb_find_text +EXPORT_SYMBOL vmlinux 0x9b20066d sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x9b2970bf sock_no_mmap +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b573eea tr_type_trans +EXPORT_SYMBOL vmlinux 0x9b5ef04b hci_register_proto +EXPORT_SYMBOL vmlinux 0x9b90ae84 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bae02a6 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x9bbb4605 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x9bcda2b6 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x9bce51f5 vfs_read +EXPORT_SYMBOL vmlinux 0x9be02534 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x9bef962c sock_kfree_s +EXPORT_SYMBOL vmlinux 0x9bfde4c7 hci_send_sco +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c491f60 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x9c7bf315 pci_match_id +EXPORT_SYMBOL vmlinux 0x9c838c23 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x9c9eec8e __scm_send +EXPORT_SYMBOL vmlinux 0x9ca4b7d9 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x9ca72e18 agp_collect_device_status +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9caf02ed put_io_context +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9cfd9880 inet_ioctl +EXPORT_SYMBOL vmlinux 0x9d1cd1eb bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d59bb1b find_or_create_page +EXPORT_SYMBOL vmlinux 0x9d8082eb kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x9d82d7aa inet6_getname +EXPORT_SYMBOL vmlinux 0x9d8a2519 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0x9da4a5d3 sget +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9dd0a2c3 set_security_override +EXPORT_SYMBOL vmlinux 0x9e1315e6 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x9e2ec07f unregister_filesystem +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e7865b4 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x9e799f9d skb_dequeue +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e98c9bc dquot_initialize +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea0ad49 __sg_free_table +EXPORT_SYMBOL vmlinux 0x9ea28ec7 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x9eb5a318 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9edc5f5b neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9eeec937 tty_throttle +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f0a8207 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f503e27 kobject_get +EXPORT_SYMBOL vmlinux 0x9f58dfc6 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fb69167 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xa00d2fa1 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0xa0265fbc register_con_driver +EXPORT_SYMBOL vmlinux 0xa0317076 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa05e0201 alloc_fcdev +EXPORT_SYMBOL vmlinux 0xa06783c4 d_lookup +EXPORT_SYMBOL vmlinux 0xa086a80d kthread_create +EXPORT_SYMBOL vmlinux 0xa097fd35 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xa0a0c30c end_page_writeback +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0afe91b ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108cc27 i2c_del_driver +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa11daa9e nonseekable_open +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa12b64c2 pipe_to_file +EXPORT_SYMBOL vmlinux 0xa1314614 wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa14d3e2f otg_set_transceiver +EXPORT_SYMBOL vmlinux 0xa14e72fa cfb_fillrect +EXPORT_SYMBOL vmlinux 0xa1539ff4 swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0xa1842cbd generic_block_bmap +EXPORT_SYMBOL vmlinux 0xa1a51c2c fail_migrate_page +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1ddc365 kobject_add +EXPORT_SYMBOL vmlinux 0xa1ea22a6 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa210ab82 __find_get_block +EXPORT_SYMBOL vmlinux 0xa22d1381 seq_release +EXPORT_SYMBOL vmlinux 0xa22e2528 input_release_device +EXPORT_SYMBOL vmlinux 0xa250e288 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xa25d7470 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xa283c533 __ip_select_ident +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2adc247 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xa2b95d0a dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0xa2cbd447 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xa2cca196 kernel_accept +EXPORT_SYMBOL vmlinux 0xa2d49896 blk_get_request +EXPORT_SYMBOL vmlinux 0xa2d6e242 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xa3074268 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0xa31f172d __copy_from_user_inatomic +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa38e05f6 pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0xa39008bf compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0xa39d4f3a elv_rb_add +EXPORT_SYMBOL vmlinux 0xa3a5be95 memmove +EXPORT_SYMBOL vmlinux 0xa3b63c92 dquot_destroy +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa3ce279d jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0xa3d15623 agp_generic_free_by_type +EXPORT_SYMBOL vmlinux 0xa3dbdd98 journal_restart +EXPORT_SYMBOL vmlinux 0xa3f5809c dev_close +EXPORT_SYMBOL vmlinux 0xa413ae57 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xa4390f0d netdev_bonding_change +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa4505fd0 pcim_iounmap +EXPORT_SYMBOL vmlinux 0xa47b4dee pnp_release_card_device +EXPORT_SYMBOL vmlinux 0xa4908567 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0xa4a54d6c blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4c7c74c journal_lock_updates +EXPORT_SYMBOL vmlinux 0xa4ca9b27 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL vmlinux 0xa4dcf108 inet_addr_type +EXPORT_SYMBOL vmlinux 0xa4e51431 i2c_transfer +EXPORT_SYMBOL vmlinux 0xa508ac2e unmap_mapping_range +EXPORT_SYMBOL vmlinux 0xa54886fc tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xa561e1ea sk_dst_check +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa56ff484 compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa584b40b wireless_spy_update +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5adbe8c ida_destroy +EXPORT_SYMBOL vmlinux 0xa5b6f598 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0xa5bf503d __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0xa5cc1e0d unregister_con_driver +EXPORT_SYMBOL vmlinux 0xa5e30960 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0xa5ea1e78 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xa60057c2 elv_rb_find +EXPORT_SYMBOL vmlinux 0xa6046da3 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0xa625bf1f i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa6424302 invalidate_bdev +EXPORT_SYMBOL vmlinux 0xa660f332 kick_iocb +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa69a1ffb tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xa6bbb370 cdev_alloc +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71b202f phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xa72a0f5b nr_online_nodes +EXPORT_SYMBOL vmlinux 0xa735093e bitmap_endwrite +EXPORT_SYMBOL vmlinux 0xa73bd0fe xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xa7476f01 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xa752b6f4 rtnl_notify +EXPORT_SYMBOL vmlinux 0xa7552a6a journal_dirty_data +EXPORT_SYMBOL vmlinux 0xa79494c6 mapping_tagged +EXPORT_SYMBOL vmlinux 0xa79541ed bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xa7b7ca81 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xa7bb2a44 genphy_update_link +EXPORT_SYMBOL vmlinux 0xa7d176c8 vm_insert_page +EXPORT_SYMBOL vmlinux 0xa7fc16e0 journal_revoke +EXPORT_SYMBOL vmlinux 0xa7fc72be inode_get_bytes +EXPORT_SYMBOL vmlinux 0xa8021493 __serio_register_driver +EXPORT_SYMBOL vmlinux 0xa822dae7 down_read +EXPORT_SYMBOL vmlinux 0xa834023b skb_free_datagram +EXPORT_SYMBOL vmlinux 0xa843af65 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0xa8479837 touch_atime +EXPORT_SYMBOL vmlinux 0xa854f370 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0xa85d7d74 netlink_unicast +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8aab6f5 proc_dointvec +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8f97151 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xa8fbf582 idr_replace +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa919a66f skb_unlink +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa948b4d0 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xa9520c74 phy_connect_direct +EXPORT_SYMBOL vmlinux 0xa95b1f9f seq_bitmap +EXPORT_SYMBOL vmlinux 0xa974191e bd_set_size +EXPORT_SYMBOL vmlinux 0xa97e9d3e sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xa994cd26 set_groups +EXPORT_SYMBOL vmlinux 0xa9a5460a tty_name +EXPORT_SYMBOL vmlinux 0xa9bd2676 __vmalloc +EXPORT_SYMBOL vmlinux 0xa9d18b50 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0xa9f7763d tcf_exts_change +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa1754e6 compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0xaa26b918 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0xaa5d8397 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0xaa6132b9 __bforget +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaa8a39be d_move +EXPORT_SYMBOL vmlinux 0xaa9bf020 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xaa9bfe95 mpage_readpages +EXPORT_SYMBOL vmlinux 0xaaa5eff1 pnp_possible_config +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaab354fb tcf_register_action +EXPORT_SYMBOL vmlinux 0xaadec84f journal_errno +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaafb8e40 key_validate +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab0282fe deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xab2f0329 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab65591d dcache_readdir +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab7fcb08 mpage_writepages +EXPORT_SYMBOL vmlinux 0xab8acbf0 tc_classify_compat +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabda6a81 skb_under_panic +EXPORT_SYMBOL vmlinux 0xabe85a21 idr_init +EXPORT_SYMBOL vmlinux 0xac023f39 devm_ioport_map +EXPORT_SYMBOL vmlinux 0xac090c42 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0xac2f27e2 security_path_mknod +EXPORT_SYMBOL vmlinux 0xac34eb38 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac443773 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacd422b7 compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xacde8e14 netpoll_poll +EXPORT_SYMBOL vmlinux 0xacf3d2ac blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xacf42bbe backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xacfa081c scsi_host_put +EXPORT_SYMBOL vmlinux 0xacfe0a68 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0xad010e4a inet_frags_init +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad0c77d5 xfrm_input +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad217c79 blk_init_tags +EXPORT_SYMBOL vmlinux 0xad25fb12 __memcpy +EXPORT_SYMBOL vmlinux 0xad4958ed udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xad5aece0 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xad8ad65f security_inode_readlink +EXPORT_SYMBOL vmlinux 0xad8de1b3 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0xad9c02bb free_buffer_head +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadb66bd6 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xadba1664 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0xadd2eeb3 unregister_cdrom +EXPORT_SYMBOL vmlinux 0xadeb7b72 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0xadee5f6b pci_write_vpd +EXPORT_SYMBOL vmlinux 0xadf19d0b hci_conn_put_device +EXPORT_SYMBOL vmlinux 0xae037724 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0xae0acc45 sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0xae13601d rfkill_unregister +EXPORT_SYMBOL vmlinux 0xae47a049 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae5c8543 vfs_getattr +EXPORT_SYMBOL vmlinux 0xaebbf7d2 dev_get_by_name +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaef3f4fb cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0xaefe8875 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xaf0dde14 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xaf2f3901 netif_napi_add +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf694f86 skb_pull +EXPORT_SYMBOL vmlinux 0xafc0324a xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xafee0816 pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xb00601a3 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0xb01191a9 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xb01bae9f skb_copy_expand +EXPORT_SYMBOL vmlinux 0xb021dc99 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL vmlinux 0xb051909f ida_init +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb06929f3 dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb088aa0d seq_open +EXPORT_SYMBOL vmlinux 0xb08aa6ad tty_port_close +EXPORT_SYMBOL vmlinux 0xb0930d74 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xb0a50c24 pci_enable_wake +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0be3b44 alloc_file +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0ebfd1b udplite_prot +EXPORT_SYMBOL vmlinux 0xb1111db3 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xb1149d4a pci_get_subsys +EXPORT_SYMBOL vmlinux 0xb11e01ff skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb1508087 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xb1645a2e sg_free_table +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1b3ee54 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb2018034 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0xb2141f12 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb23b0918 bio_clone +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb277e1c5 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb2b32797 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xb2c4b6e3 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0xb2cb0eae blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xb2e55898 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb3014df9 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0xb320390f bitmap_end_sync +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb3318ded __down_read_trylock +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb37b2ef8 uart_add_one_port +EXPORT_SYMBOL vmlinux 0xb37d5f21 dm_put_device +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3b4f5c0 register_quota_format +EXPORT_SYMBOL vmlinux 0xb3b8eeed jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xb3bd7ea8 input_get_keycode +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb43cec1f simple_transaction_set +EXPORT_SYMBOL vmlinux 0xb44c51a2 d_path +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb45faa39 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb474539d tcp_make_synack +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb4e26bb8 generic_show_options +EXPORT_SYMBOL vmlinux 0xb4fe3677 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb5103d4b kill_block_super +EXPORT_SYMBOL vmlinux 0xb511589e unregister_nls +EXPORT_SYMBOL vmlinux 0xb53a6881 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xb543fa72 filemap_flush +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5ba74c0 ilookup +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5cc7cb0 neigh_create +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb5ea781d agp_generic_type_to_mask_type +EXPORT_SYMBOL vmlinux 0xb5f01696 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xb5f28b5f __any_online_cpu +EXPORT_SYMBOL vmlinux 0xb6244511 sg_init_one +EXPORT_SYMBOL vmlinux 0xb648b8c2 redraw_screen +EXPORT_SYMBOL vmlinux 0xb6536227 dmam_pool_create +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb69c729f compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6acf54f acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6cbe886 acpi_get_node +EXPORT_SYMBOL vmlinux 0xb6d7e20a framebuffer_alloc +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb70f97ca rt6_lookup +EXPORT_SYMBOL vmlinux 0xb70ff13a pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0xb7142b41 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb738d02d acpi_bus_start +EXPORT_SYMBOL vmlinux 0xb74361ac dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb76b14f9 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0xb773c8d3 km_policy_expired +EXPORT_SYMBOL vmlinux 0xb7789d4e fasync_helper +EXPORT_SYMBOL vmlinux 0xb779b66c path_get +EXPORT_SYMBOL vmlinux 0xb793230a dma_pool_free +EXPORT_SYMBOL vmlinux 0xb795cd68 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xb7985dc5 simple_fill_super +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb79d6af8 napi_get_frags +EXPORT_SYMBOL vmlinux 0xb7c7f787 abort_creds +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7dd8449 md_register_thread +EXPORT_SYMBOL vmlinux 0xb80cd214 flush_signals +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81518a6 arp_xmit +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb877a0ac vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xb87f56c0 scsi_remove_host +EXPORT_SYMBOL vmlinux 0xb88dba2a jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8b06c4f scsi_init_io +EXPORT_SYMBOL vmlinux 0xb8b0e6d9 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xb8b3304a nf_getsockopt +EXPORT_SYMBOL vmlinux 0xb8d4c50d input_register_device +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb9016749 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xb916dfd3 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0xb922a8bf mmc_request_done +EXPORT_SYMBOL vmlinux 0xb93ab230 sock_create_kern +EXPORT_SYMBOL vmlinux 0xb95f4291 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0xb9642b7f i2c_master_send +EXPORT_SYMBOL vmlinux 0xb9805b0c down_read_trylock +EXPORT_SYMBOL vmlinux 0xb9878f56 lease_modify +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb9ab5ea3 napi_gro_receive +EXPORT_SYMBOL vmlinux 0xb9b578fa pci_bus_type +EXPORT_SYMBOL vmlinux 0xb9ca190f bdevname +EXPORT_SYMBOL vmlinux 0xb9e86ca7 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0xb9f72181 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba169ae1 handle_sysrq +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba56b636 ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0xba7d3692 ndisc_send_skb +EXPORT_SYMBOL vmlinux 0xba7f1f83 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaa80db9 dm_table_get_size +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbaf38759 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0xbaf43a3e vc_cons +EXPORT_SYMBOL vmlinux 0xbafc321b simple_write_begin +EXPORT_SYMBOL vmlinux 0xbb01eb7d inode_needs_sync +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb1fbf2d iget5_locked +EXPORT_SYMBOL vmlinux 0xbb5c4cd1 journal_init_inode +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb6c0766 vfs_create +EXPORT_SYMBOL vmlinux 0xbb88ddb1 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xbb99eb93 alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xbb9e2d7a vfs_quota_on +EXPORT_SYMBOL vmlinux 0xbbb372b9 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0xbbca006f dqget +EXPORT_SYMBOL vmlinux 0xbbd01e94 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xbbffb5f0 follow_pfn +EXPORT_SYMBOL vmlinux 0xbc1454ef inet_listen +EXPORT_SYMBOL vmlinux 0xbc22a7f5 neigh_lookup +EXPORT_SYMBOL vmlinux 0xbc333af5 netdev_features_change +EXPORT_SYMBOL vmlinux 0xbc3eb8a7 swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0xbc69f09d block_write_end +EXPORT_SYMBOL vmlinux 0xbca13165 md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbccbb49c idr_remove_all +EXPORT_SYMBOL vmlinux 0xbd017133 sysctl_data +EXPORT_SYMBOL vmlinux 0xbd0fca42 sock_wfree +EXPORT_SYMBOL vmlinux 0xbd137b5c dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xbd215a65 register_8022_client +EXPORT_SYMBOL vmlinux 0xbd37b8f0 d_add_ci +EXPORT_SYMBOL vmlinux 0xbdaf5b07 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0xbdb92be8 scsi_execute +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe39bbf3 mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xbe499d81 copy_to_user +EXPORT_SYMBOL vmlinux 0xbe582245 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xbe58361d rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0xbe83f281 cdev_init +EXPORT_SYMBOL vmlinux 0xbeb044d4 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xbecb7343 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xbecdce74 ida_pre_get +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbefee397 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0xbf1f397c install_exec_creds +EXPORT_SYMBOL vmlinux 0xbf2dae43 blk_init_queue +EXPORT_SYMBOL vmlinux 0xbf48a151 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xbf522c16 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0xbf686a50 gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf8ce7a2 boot_cpu_data +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbf9c1c8b scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0xbf9cc6c8 x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xbfaabbeb inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xbfab458d pci_map_rom +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfc6ac88 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbff952a8 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc0095c71 neigh_table_init +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc07d43ae acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0c600dd xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xc0f2596e fb_validate_mode +EXPORT_SYMBOL vmlinux 0xc136c073 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xc13d7e4c __downgrade_write +EXPORT_SYMBOL vmlinux 0xc1736f96 in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xc1aa01bb skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xc1ac0097 simple_dir_operations +EXPORT_SYMBOL vmlinux 0xc1af9686 pci_find_capability +EXPORT_SYMBOL vmlinux 0xc1c2deed pv_cpu_ops +EXPORT_SYMBOL vmlinux 0xc1c80814 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xc1e963dd sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xc1ed0993 vfs_writev +EXPORT_SYMBOL vmlinux 0xc1f581aa phy_print_status +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc2089909 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0xc20c566b __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xc21866b8 kmem_cache_create +EXPORT_SYMBOL vmlinux 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc256ff17 ps2_command +EXPORT_SYMBOL vmlinux 0xc2a5969b k8_northbridges +EXPORT_SYMBOL vmlinux 0xc2be9086 copy_io_context +EXPORT_SYMBOL vmlinux 0xc2d3f0e1 new_inode +EXPORT_SYMBOL vmlinux 0xc2dc7e09 sock_sendmsg +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f1a201 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0xc308a49f sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xc3117917 pci_reenable_device +EXPORT_SYMBOL vmlinux 0xc31905fe register_sysrq_key +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc359c82e setup_arg_pages +EXPORT_SYMBOL vmlinux 0xc362a44e tcp_mtup_init +EXPORT_SYMBOL vmlinux 0xc36e3041 qdisc_destroy +EXPORT_SYMBOL vmlinux 0xc3853b10 compat_ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0xc38ffef3 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3bc0529 init_net +EXPORT_SYMBOL vmlinux 0xc3d8254f __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc406cc08 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0xc41237b7 swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0xc4152032 pid_task +EXPORT_SYMBOL vmlinux 0xc42a5de3 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0xc44ce272 pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xc46a0ba3 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xc495b664 dev_addr_del +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4ad08f1 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0xc4d08960 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xc4d489e9 up_write +EXPORT_SYMBOL vmlinux 0xc4e4ecee __dst_free +EXPORT_SYMBOL vmlinux 0xc4e9c01c cpu_active_mask +EXPORT_SYMBOL vmlinux 0xc51ddb03 vfs_follow_link +EXPORT_SYMBOL vmlinux 0xc525518d find_lock_page +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc535894b genphy_config_advert +EXPORT_SYMBOL vmlinux 0xc53c882d idr_get_new +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc558530d profile_pc +EXPORT_SYMBOL vmlinux 0xc55cfb5e lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc560f039 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0xc5651949 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0xc57e4f6d tty_port_init +EXPORT_SYMBOL vmlinux 0xc582644e udp_prot +EXPORT_SYMBOL vmlinux 0xc5844fb8 __per_cpu_offset +EXPORT_SYMBOL vmlinux 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL vmlinux 0xc5edd69d set_trace_device +EXPORT_SYMBOL vmlinux 0xc60278c2 read_dev_sector +EXPORT_SYMBOL vmlinux 0xc63395cb bio_map_kern +EXPORT_SYMBOL vmlinux 0xc6368cf3 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0xc64e0b04 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL vmlinux 0xc672c1d9 vfs_symlink +EXPORT_SYMBOL vmlinux 0xc67d96fe per_cpu__node_number +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc6d6a789 lock_sock_nested +EXPORT_SYMBOL vmlinux 0xc6e3e7c2 block_prepare_write +EXPORT_SYMBOL vmlinux 0xc6fbe8d6 mutex_unlock +EXPORT_SYMBOL vmlinux 0xc71dd124 ip_route_input +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc720c21c thaw_process +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc7244c75 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0xc724e531 do_sync_read +EXPORT_SYMBOL vmlinux 0xc735fb66 textsearch_unregister +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc74324ad inet_getname +EXPORT_SYMBOL vmlinux 0xc74edbf6 get_sb_bdev +EXPORT_SYMBOL vmlinux 0xc76bc7d8 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0xc76ffa75 phy_stop +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7be6394 pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0xc7d79e08 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xc8379759 d_genocide +EXPORT_SYMBOL vmlinux 0xc84340e4 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xc85e8673 audit_log_format +EXPORT_SYMBOL vmlinux 0xc85f9667 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xc897c382 sg_init_table +EXPORT_SYMBOL vmlinux 0xc8a714a7 dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8f66390 skb_clone +EXPORT_SYMBOL vmlinux 0xc8f71882 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xc8fe5cd3 names_cachep +EXPORT_SYMBOL vmlinux 0xc8fed059 dev_mc_add +EXPORT_SYMBOL vmlinux 0xc8ff2f71 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xc934f7a0 md_error +EXPORT_SYMBOL vmlinux 0xc9437ede __down_write_nested +EXPORT_SYMBOL vmlinux 0xc98f03d8 keyring_search +EXPORT_SYMBOL vmlinux 0xc9928c85 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc99a007e acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9ac0a6d mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xc9cf7dac ps2_handle_ack +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xc9f9fb62 pci_get_device +EXPORT_SYMBOL vmlinux 0xca25a7c8 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca5ec0f0 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xcabfaa60 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0xcad3e83a scsi_device_put +EXPORT_SYMBOL vmlinux 0xcaeaa976 blk_register_region +EXPORT_SYMBOL vmlinux 0xcb19e213 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xcb2825fe alloc_pages_current +EXPORT_SYMBOL vmlinux 0xcb2bc541 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0xcb4e9fd4 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0xcb53dd50 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb73d4fe qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0xcba7735b balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xcbb57622 do_truncate +EXPORT_SYMBOL vmlinux 0xcbb9d7db groups_free +EXPORT_SYMBOL vmlinux 0xcbe488c5 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xcc04fa5e pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xcc0555ea dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc089d93 bio_sector_offset +EXPORT_SYMBOL vmlinux 0xcc1060d0 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc26b4a9 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0xcc2a9e50 unregister_console +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc440b62 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc529ec9 pcim_iomap +EXPORT_SYMBOL vmlinux 0xcc5805f1 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0xcc637357 agp_flush_chipset +EXPORT_SYMBOL vmlinux 0xcc6ed93a tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xccb4a55a cad_pid +EXPORT_SYMBOL vmlinux 0xccddfa87 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xccf10e4d vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xcd1a2697 skb_tx_hash +EXPORT_SYMBOL vmlinux 0xcd23b2f8 blk_peek_request +EXPORT_SYMBOL vmlinux 0xcd5ca7ee bdi_init +EXPORT_SYMBOL vmlinux 0xcd84212b neigh_for_each +EXPORT_SYMBOL vmlinux 0xcd86ec51 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xcdba5e0a tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0xcdbc25ea journal_abort +EXPORT_SYMBOL vmlinux 0xcdbc571d generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xcdc0e52e kfree_skb +EXPORT_SYMBOL vmlinux 0xcde6d340 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0xce15e501 deny_write_access +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3cb818 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce4e4980 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce8b7687 bd_release +EXPORT_SYMBOL vmlinux 0xce93d99d no_llseek +EXPORT_SYMBOL vmlinux 0xce943c8c nlmsg_notify +EXPORT_SYMBOL vmlinux 0xceb7a543 sock_init_data +EXPORT_SYMBOL vmlinux 0xcefb1a89 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf0abb8c mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf3e0202 neigh_event_ns +EXPORT_SYMBOL vmlinux 0xcf404fd4 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xcf713839 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0xcfa8d865 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0xcfacc599 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfe944c4 kernel_connect +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd01f25d4 __kfree_skb +EXPORT_SYMBOL vmlinux 0xd052f260 scsi_execute_req +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd08a8622 scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xd0bd5502 seq_printf +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd149bc11 xrlim_allow +EXPORT_SYMBOL vmlinux 0xd167e12a tty_schedule_flip +EXPORT_SYMBOL vmlinux 0xd18846fe wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd19bb294 acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0xd1f3ac65 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd1f9be31 dev_change_flags +EXPORT_SYMBOL vmlinux 0xd1faa4b5 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xd220bda1 write_one_page +EXPORT_SYMBOL vmlinux 0xd233a9a9 serio_close +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2b713d8 backlight_device_register +EXPORT_SYMBOL vmlinux 0xd2b77709 sock_create +EXPORT_SYMBOL vmlinux 0xd2c8d807 free_task +EXPORT_SYMBOL vmlinux 0xd32c758b jbd2_journal_start +EXPORT_SYMBOL vmlinux 0xd32cf74b ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0xd33b550a serio_reconnect +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd35fb64f skb_gso_segment +EXPORT_SYMBOL vmlinux 0xd36338c6 agp_backend_acquire +EXPORT_SYMBOL vmlinux 0xd36bb86e get_agp_version +EXPORT_SYMBOL vmlinux 0xd38c751c tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xd392eb1a seq_putc +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3a45a3e bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd3afcdf2 sk_alloc +EXPORT_SYMBOL vmlinux 0xd3db49e5 simple_readpage +EXPORT_SYMBOL vmlinux 0xd3de95b2 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd3ff3294 tcf_em_register +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd42f4f97 mdio_bus_type +EXPORT_SYMBOL vmlinux 0xd43a27ba pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xd49e128b shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0xd4e62201 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0xd4ec77d3 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0xd4f01004 security_path_unlink +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd5292612 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xd564da86 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0xd5678b1e napi_frags_skb +EXPORT_SYMBOL vmlinux 0xd568cd13 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0xd57db662 iput +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd593966d lock_super +EXPORT_SYMBOL vmlinux 0xd59e7414 input_open_device +EXPORT_SYMBOL vmlinux 0xd6016f73 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0xd6017b1f task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0xd60832b8 dst_release +EXPORT_SYMBOL vmlinux 0xd60d240d mb_cache_create +EXPORT_SYMBOL vmlinux 0xd60d7af4 ida_remove +EXPORT_SYMBOL vmlinux 0xd61af441 mmc_register_driver +EXPORT_SYMBOL vmlinux 0xd628cb58 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd653e3c9 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xd68b1a15 set_pages_x +EXPORT_SYMBOL vmlinux 0xd698cc8d hippi_type_trans +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6cb0127 remove_inode_hash +EXPORT_SYMBOL vmlinux 0xd6d3e3c6 fb_class +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd709741d generic_getxattr +EXPORT_SYMBOL vmlinux 0xd73b5122 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0xd742b3ad do_SAK +EXPORT_SYMBOL vmlinux 0xd7472b71 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xd748d50f i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0xd76eb32c scsi_add_device +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7d5ce6c __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xd7d81db1 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd80966e6 alloc_fddidev +EXPORT_SYMBOL vmlinux 0xd8245c79 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xd82e4a78 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8659586 stop_tty +EXPORT_SYMBOL vmlinux 0xd877c4fa proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0xd87984a5 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xd894c8f0 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xd89a994f load_nls_default +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8c58345 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xd8d43e70 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8ed840b pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xd8f94356 skb_checksum +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd928586d sock_i_uid +EXPORT_SYMBOL vmlinux 0xd930d21b mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd990ec81 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0xd99257c9 vfs_llseek +EXPORT_SYMBOL vmlinux 0xd9b04a41 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0xd9e25292 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda1917a5 skb_push +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda798d8e blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda91e24c tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xda9ce062 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xdac2d6b9 dev_load +EXPORT_SYMBOL vmlinux 0xdaccd387 serial8250_register_port +EXPORT_SYMBOL vmlinux 0xdace6f19 posix_test_lock +EXPORT_SYMBOL vmlinux 0xdb0a0e92 tcf_hash_search +EXPORT_SYMBOL vmlinux 0xdb915a22 pnp_register_driver +EXPORT_SYMBOL vmlinux 0xdba80f1c in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xdbaaf288 xfrm6_rcv +EXPORT_SYMBOL vmlinux 0xdbb5ad5c node_to_cpumask_map +EXPORT_SYMBOL vmlinux 0xdbcc4eb8 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc0af305 dev_driver_string +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc1db6c4 fb_set_suspend +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc32d079 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc7e4a4d generic_osync_inode +EXPORT_SYMBOL vmlinux 0xdc840aef blk_integrity_compare +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdd005514 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xdd12a264 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xdd3a2b6e cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xdd3d4f13 dcache_dir_close +EXPORT_SYMBOL vmlinux 0xdd5c15c6 md_unregister_thread +EXPORT_SYMBOL vmlinux 0xdd63168f get_disk +EXPORT_SYMBOL vmlinux 0xdd9027c2 ___pskb_trim +EXPORT_SYMBOL vmlinux 0xddaeb8e4 inode_add_bytes +EXPORT_SYMBOL vmlinux 0xddb65983 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xdde88eb2 blk_integrity_register +EXPORT_SYMBOL vmlinux 0xddec227e arp_tbl +EXPORT_SYMBOL vmlinux 0xde04953e vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0xde070414 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0xde0bdcff memset +EXPORT_SYMBOL vmlinux 0xde535218 uart_get_divisor +EXPORT_SYMBOL vmlinux 0xde7374fd pnp_get_resource +EXPORT_SYMBOL vmlinux 0xde73754b seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde831f5d bioset_integrity_create +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde9ac1c8 __secpath_destroy +EXPORT_SYMBOL vmlinux 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL vmlinux 0xdea59fb6 hci_connect +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf0f48bb unlock_page +EXPORT_SYMBOL vmlinux 0xdf13fd13 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0xdf1917d0 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xdf39fc26 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xdf41afb2 fb_set_cmap +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf6a8bb2 phy_driver_register +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfacd61b blk_insert_request +EXPORT_SYMBOL vmlinux 0xdfb025c2 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0xdfb65725 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xdfb7bada acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0xdfba764f dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xdfc494c8 get_empty_filp +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfd9e8a2 search_binary_handler +EXPORT_SYMBOL vmlinux 0xdffb265b dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xe0045c1e audit_log_end +EXPORT_SYMBOL vmlinux 0xe0212bbf get_sb_ns +EXPORT_SYMBOL vmlinux 0xe05761e7 udp_disconnect +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0884f2f get_phy_id +EXPORT_SYMBOL vmlinux 0xe09f90c5 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c8490a pci_set_power_state +EXPORT_SYMBOL vmlinux 0xe0dd3534 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0xe0f4b02f scsi_device_set_state +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe12de18b blk_stop_queue +EXPORT_SYMBOL vmlinux 0xe1369ced scsi_is_host_device +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe144b306 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xe14d4493 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0xe150844b km_state_notify +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1ffee85 init_file +EXPORT_SYMBOL vmlinux 0xe203223c hci_unregister_proto +EXPORT_SYMBOL vmlinux 0xe216f089 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe24d7b00 journal_create +EXPORT_SYMBOL vmlinux 0xe2554c32 netif_napi_del +EXPORT_SYMBOL vmlinux 0xe29b04e9 acpi_set_firmware_waking_vector64 +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe311f616 dm_table_get +EXPORT_SYMBOL vmlinux 0xe33076d3 user_path_at +EXPORT_SYMBOL vmlinux 0xe3462761 aio_complete +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe39ef42f scsi_target_resume +EXPORT_SYMBOL vmlinux 0xe3a3c2b0 nf_register_hooks +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3d4a7a0 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xe3e38e1f block_truncate_page +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe456bed9 agp_find_bridge +EXPORT_SYMBOL vmlinux 0xe466589f __page_symlink +EXPORT_SYMBOL vmlinux 0xe474e6eb jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe486f4b7 agp_enable +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe4b24b8c __next_cpu +EXPORT_SYMBOL vmlinux 0xe4b911e7 agp_generic_remove_memory +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4ccecd6 posix_lock_file +EXPORT_SYMBOL vmlinux 0xe4e2a23c ppp_input +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe52947e7 __phys_addr +EXPORT_SYMBOL vmlinux 0xe534b413 vfs_unlink +EXPORT_SYMBOL vmlinux 0xe534e3c7 generic_writepages +EXPORT_SYMBOL vmlinux 0xe539dad2 neigh_compat_output +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe57bed21 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5a9f48c xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xe5bf7716 cdrom_open +EXPORT_SYMBOL vmlinux 0xe5c15cd7 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ccb04c inet_put_port +EXPORT_SYMBOL vmlinux 0xe5e55afe secpath_dup +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5f0b791 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xe601828e agp_copy_info +EXPORT_SYMBOL vmlinux 0xe60ec65f vfs_fsync +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe69235d8 ip6_frag_match +EXPORT_SYMBOL vmlinux 0xe6d85da2 clear_inode +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe6fe49e0 hci_resume_dev +EXPORT_SYMBOL vmlinux 0xe703ca3b block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0xe708ba32 input_set_capability +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe73afb58 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xe73b722f pskb_copy +EXPORT_SYMBOL vmlinux 0xe73dc604 pci_set_mwi +EXPORT_SYMBOL vmlinux 0xe75085b9 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0xe755990f directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0xe76d3fc5 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0xe77441c0 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0xe79edf79 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0xe7cbadae __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7d73eb0 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0xe7e51d9f loop_register_transfer +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe8116e08 __kmalloc_node +EXPORT_SYMBOL vmlinux 0xe8272ab8 dm_table_get_md +EXPORT_SYMBOL vmlinux 0xe83a1d22 posix_acl_permission +EXPORT_SYMBOL vmlinux 0xe873615e scsi_device_get +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe892e28a bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xe893a104 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8bbb025 pci_save_state +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8edceef agp_unbind_memory +EXPORT_SYMBOL vmlinux 0xe8f3f25e deactivate_super +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe930c6c2 dm_table_put +EXPORT_SYMBOL vmlinux 0xe9320f73 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0xe95956fc block_invalidatepage +EXPORT_SYMBOL vmlinux 0xe9655da3 complete_request_key +EXPORT_SYMBOL vmlinux 0xe98a1f7f pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xe9922a47 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe9c055f4 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0xe9c2ffe8 simple_fsync +EXPORT_SYMBOL vmlinux 0xe9d16a65 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xe9e50d7e lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea193096 nobh_writepage +EXPORT_SYMBOL vmlinux 0xea2f3729 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0xea408196 compat_ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xea64ea66 d_delete +EXPORT_SYMBOL vmlinux 0xea68b72c napi_frags_finish +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xeab4372a set_page_dirty +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeaef31f4 dma_find_channel +EXPORT_SYMBOL vmlinux 0xeaf6d7c8 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0xeb022ef1 vfs_mknod +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb3b4249 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0xeb6e4e1d acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0xeb7a01f1 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8b6839 i2c_register_driver +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebdeb063 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0xebdf24ef bt_sock_poll +EXPORT_SYMBOL vmlinux 0xec26b071 netlink_dump_start +EXPORT_SYMBOL vmlinux 0xec3c15ef iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0xec4c757d inet_accept +EXPORT_SYMBOL vmlinux 0xec62eac4 pci_get_slot +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec8cafe3 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xec93b933 fb_blank +EXPORT_SYMBOL vmlinux 0xecc00aaf nf_setsockopt +EXPORT_SYMBOL vmlinux 0xecd30985 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0xecdbfa18 pci_find_bus +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xecea8d90 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xed03d01c dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0xed1d2004 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xed646ba0 blk_make_request +EXPORT_SYMBOL vmlinux 0xed6c8587 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0xed74f052 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xed76c6ab kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0xed8a4771 ip_ct_attach +EXPORT_SYMBOL vmlinux 0xed957514 __ht_create_irq +EXPORT_SYMBOL vmlinux 0xeda05fd7 path_lookup +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb3403b kthread_bind +EXPORT_SYMBOL vmlinux 0xedb582f5 locks_remove_posix +EXPORT_SYMBOL vmlinux 0xedb6a6a9 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedc93996 try_to_release_page +EXPORT_SYMBOL vmlinux 0xede757f8 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xee066424 unregister_md_personality +EXPORT_SYMBOL vmlinux 0xee1d218e mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0xee2a2350 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee37a319 md_integrity_register +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee605f38 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xee820845 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeec2e47f tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xeecaea22 down_write_trylock +EXPORT_SYMBOL vmlinux 0xeed38d59 scsi_get_command +EXPORT_SYMBOL vmlinux 0xef0be423 sock_rfree +EXPORT_SYMBOL vmlinux 0xef0e4cf9 seq_puts +EXPORT_SYMBOL vmlinux 0xef12ef85 kernel_getsockname +EXPORT_SYMBOL vmlinux 0xef3b5bb3 wake_up_process +EXPORT_SYMBOL vmlinux 0xef3b6a61 __break_lease +EXPORT_SYMBOL vmlinux 0xef409744 nf_log_packet +EXPORT_SYMBOL vmlinux 0xef43ac1f nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0xef43b115 phy_start +EXPORT_SYMBOL vmlinux 0xef699737 __blk_run_queue +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef89640d pci_iounmap +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefaf051b scsi_block_requests +EXPORT_SYMBOL vmlinux 0xefc0af89 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xefc2e52b arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xefda3e55 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0xefdba8d4 register_md_personality +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xefefd820 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf00d3c0d invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xf0100541 __lock_buffer +EXPORT_SYMBOL vmlinux 0xf04ca54a scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0xf04f3c54 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xf056f7f8 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xf0621fdf pci_request_regions +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf06f4d68 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0xf0733ac3 simple_rmdir +EXPORT_SYMBOL vmlinux 0xf0c32ee1 dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0xf0e0bd75 kill_fasync +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f3488f generic_readlink +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf1002ec3 dquot_acquire +EXPORT_SYMBOL vmlinux 0xf106ecb3 acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf116d4b5 copy_in_user +EXPORT_SYMBOL vmlinux 0xf159c499 arp_broken_ops +EXPORT_SYMBOL vmlinux 0xf15bc2e9 eth_header_cache +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1a8ed85 generic_unplug_device +EXPORT_SYMBOL vmlinux 0xf1b28647 tty_register_device +EXPORT_SYMBOL vmlinux 0xf1bd12c3 netdev_state_change +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1cb5b81 dquot_free_space +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1df8829 security_d_instantiate +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf21cca7f per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0xf23b27bb fput +EXPORT_SYMBOL vmlinux 0xf2424496 input_register_handler +EXPORT_SYMBOL vmlinux 0xf24b1e3e current_fs_time +EXPORT_SYMBOL vmlinux 0xf2545738 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0xf269b406 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xf26f501a start_tty +EXPORT_SYMBOL vmlinux 0xf2930836 lro_receive_frags +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2f60292 cont_write_begin +EXPORT_SYMBOL vmlinux 0xf2fee6c0 init_special_inode +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3311c6f tty_kref_put +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf338e6dd agp3_generic_tlbflush +EXPORT_SYMBOL vmlinux 0xf33ba572 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf34df93b proto_unregister +EXPORT_SYMBOL vmlinux 0xf350c714 dma_supported +EXPORT_SYMBOL vmlinux 0xf35207a6 pnp_start_dev +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf3a03278 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3c55d50 nf_log_unregister +EXPORT_SYMBOL vmlinux 0xf3dd4fcd prepare_creds +EXPORT_SYMBOL vmlinux 0xf4306c5f devm_iounmap +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4463e47 input_unregister_handler +EXPORT_SYMBOL vmlinux 0xf4528073 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf49f8314 acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4c0911e xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf4fd0397 generic_setlease +EXPORT_SYMBOL vmlinux 0xf504386b __serio_register_port +EXPORT_SYMBOL vmlinux 0xf5118212 blk_start_queue +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf566bfb6 fb_get_mode +EXPORT_SYMBOL vmlinux 0xf570e3cb generic_read_dir +EXPORT_SYMBOL vmlinux 0xf579f832 elv_queue_empty +EXPORT_SYMBOL vmlinux 0xf57f6927 pci_enable_msix +EXPORT_SYMBOL vmlinux 0xf5a35867 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xf5c7fb93 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf64a604e simple_rename +EXPORT_SYMBOL vmlinux 0xf652b02e bio_split +EXPORT_SYMBOL vmlinux 0xf664876e journal_force_commit +EXPORT_SYMBOL vmlinux 0xf666cbb3 __memcpy_fromio +EXPORT_SYMBOL vmlinux 0xf6902e5b set_create_files_as +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6f968c0 set_blocksize +EXPORT_SYMBOL vmlinux 0xf6fe45a8 inode_permission +EXPORT_SYMBOL vmlinux 0xf73983ea swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0xf73fca2a user_revoke +EXPORT_SYMBOL vmlinux 0xf749534a gen_pool_free +EXPORT_SYMBOL vmlinux 0xf767b973 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0xf771deaf proto_register +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf79a2d9a devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0xf7ad3e3e pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xf7b16d7a compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xf7cffd9b ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8a7e638 dentry_open +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8d021bb icmpv6_send +EXPORT_SYMBOL vmlinux 0xf9297c90 elevator_exit +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf938c38b journal_start_commit +EXPORT_SYMBOL vmlinux 0xf95d3745 scsi_dma_map +EXPORT_SYMBOL vmlinux 0xf9775ff9 register_snap_client +EXPORT_SYMBOL vmlinux 0xf97a0401 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xf97c2868 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xf98b9e9d sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b582ba read_cache_page +EXPORT_SYMBOL vmlinux 0xf9f1041b bio_copy_kern +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa842fdc down_write +EXPORT_SYMBOL vmlinux 0xfaae5b74 scsi_free_command +EXPORT_SYMBOL vmlinux 0xfadf7753 dst_discard +EXPORT_SYMBOL vmlinux 0xfae9c6a7 agp_generic_destroy_page +EXPORT_SYMBOL vmlinux 0xfaf90a93 seq_escape +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb2a1b17 submit_bio +EXPORT_SYMBOL vmlinux 0xfb34d378 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xfb3f1224 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0xfb55860a atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb82eef4 hci_get_route +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfba1a8c0 datagram_poll +EXPORT_SYMBOL vmlinux 0xfbb4c451 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xfbcf3943 inet_stream_ops +EXPORT_SYMBOL vmlinux 0xfbd7a382 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xfbd92318 create_empty_buffers +EXPORT_SYMBOL vmlinux 0xfbdd70be tcp_disconnect +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbeb11cb remap_pfn_range +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc031c3f mutex_lock_killable +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc7692c9 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0xfc814e60 uart_resume_port +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcb21b8e phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0xfcb755cf dquot_release +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfce538f7 dev_add_pack +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcefd18a mem_section +EXPORT_SYMBOL vmlinux 0xfcf78093 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd149f45 page_put_link +EXPORT_SYMBOL vmlinux 0xfd287317 kmalloc_caches +EXPORT_SYMBOL vmlinux 0xfd29c54f single_release +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfda79c0e sock_create_lite +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb850c4 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdf9370b open_exec +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe02639f locks_init_lock +EXPORT_SYMBOL vmlinux 0xfe047ce6 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xfe09880c nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xfe26fc7c nr_node_ids +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe454b3f lookup_bdev +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe5e3754 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe8fd00e i2c_release_client +EXPORT_SYMBOL vmlinux 0xfe9351bc kset_register +EXPORT_SYMBOL vmlinux 0xfe98e719 dma_async_device_register +EXPORT_SYMBOL vmlinux 0xfe9b4213 notify_change +EXPORT_SYMBOL vmlinux 0xfe9c7e57 lease_get_mtime +EXPORT_SYMBOL vmlinux 0xfebf60cd blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfecbaec3 input_unfilter_device +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfedd40b3 bio_map_user +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xfef96fee tcp_child_process +EXPORT_SYMBOL vmlinux 0xff16db29 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff3e5d26 pci_dev_driver +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff7c33fd do_splice_to +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff98230b ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffae4519 check_disk_change +EXPORT_SYMBOL vmlinux 0xffafdc5c _read_unlock_irq +EXPORT_SYMBOL vmlinux 0xffc7c184 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xffcce24b vfs_readlink +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffdfa339 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xfffffe59 nobh_write_end +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0x7060bf0a crypto_aes_encrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0xe409b491 crypto_aes_decrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x16836e04 speedstep_detect_processor +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x2af90271 speedstep_get_frequency +EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0xd494ee54 speedstep_get_freqs +EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81 ucode_cpu_info +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935 kvm_disable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x018609a6 gfn_to_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x01ddca7a kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x06cdb571 gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x06f3ae4f kvm_read_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x07b03c58 fx_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4 kvm_get_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09c2c6d0 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d808bc3 kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0e6ed8a0 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x105c0fa4 kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x108732c7 kvm_set_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b kvm_release_pfn_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x172b469a kvm_release_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1b2e52b6 kvm_cpu_has_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb kvm_release_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039 kvm_set_pfn_accessed +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x24770668 kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x32e978d9 kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37d5259f kvm_set_cr3 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3ae365d2 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x452141e2 kvm_mmu_page_fault +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4889dbae gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x49af0bc4 emulator_write_emulated +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4c66c555 __kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4d84005b kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x535ce75e kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x572c7b3c kvm_resched +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x58d6cf8f kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5dd3d39c kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x62a1918a kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x632a6e7c kvm_put_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x655c6e6e kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6a923718 load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x74162442 kvm_emulate_halt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7a60d23a kvm_report_emulation_failure +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b577f96 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7c5087b7 kvm_mmu_invlpg +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7cd21e05 kvm_get_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x82ebed66 kvm_queue_exception +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x85ae58c7 kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x88b0ba8c kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8907bc9a kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x89b62473 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ca55b4a emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8f4983ed kvm_emulate_hypercall +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x965a48c1 kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa0777982 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa3d28fe8 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa9156a65 kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaac67d90 kvm_mmu_load +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab87adae kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xacd121d1 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xad5cfd92 kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaf723ea0 kvm_emulate_pio +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb58eb35d kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbb448d5f kvm_lapic_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd86163a kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc6ab1249 kvm_write_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcaab1818 kvm_inject_nmi +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc0dccc3 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcde47d62 kvm_clear_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9 kvm_is_error_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd6775c04 kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd8e3257d kvm_set_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdb25dbfa kvm_cpu_get_interrupt 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sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2cde5704 sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3b7842be sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x663148c7 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x8039607e sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa0a32fbe sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x825b4b0c cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xab41b0af cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xd42b5859 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x52744e5e cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x34985d54 cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x0bd62117 cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x4c12969d cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x598e8bd1 cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xd09351dd DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xf647166b DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x9681f1cd DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1b57d061 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1cdfbff6 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1ff71154 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28b38fd1 deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x62ed3388 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6912dc25 default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7a6187fe mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa7263b04 register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb6a14e3f get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbb98afff parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbd091f10 kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbf339de9 get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xdad9a8b1 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe28f5691 get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe79ea4ea mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xee789a0f put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x05d52a83 deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x46276cc4 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x56c52ee0 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x5a7f6a3a register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1e873896 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x25143398 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x7b083898 nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa917083a nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xd433169a nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x237853b6 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x4706a7a4 onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0364e40a ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x398361c8 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4d6037ee ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4de1ee58 ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x682ae91a ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7d983403 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x854854ea ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x96af4471 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x98d4bad8 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa6cbc0a6 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa8d2902d ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbf719240 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x11582842 can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2d8ccedd close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x55c04ec9 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x613ada16 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6999da22 free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6ade0a5e can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa012c070 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa46a4ea1 open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xac63b52d can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x43d3c6d0 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x6724241c unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x7f799fb1 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x84de9a32 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x033f3822 __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x14b5ab7f mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c37da5c mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ddb2d5f mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ef0ba65 mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1fd656be mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x22dd517f mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x26989407 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x289b3197 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x36d45c7b mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x372327eb mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3c12fdf3 mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3c90d0c6 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3d91342d mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x41bb755d mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x41d43a20 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4baca908 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4ebc9c3b mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5285fd30 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x582cbc59 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5943e868 mlx4_fmr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5cb003ba mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x601206ae mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6131497c mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6387e573 mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x65ab78d5 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x66f3d5d0 mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x69de94a5 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x74307553 mlx4_CLOSE_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7549139c mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x876df5a5 mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ee6669f mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8f06c8a8 mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x93123626 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9dcaced9 mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa63774c7 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xad40b58f mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb02be2e4 mlx4_mtt_addr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb8de4dff mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbbb9a2fa mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbcdf5d13 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbebe3d03 mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc2df96f6 mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc531675b mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca5b5096 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd352afd2 mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdcd1472d mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe9bed102 mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea733c45 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea77947c mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfb2f3605 mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd91d326 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfe5605a0 mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x2896cde2 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xc2366e70 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x17da6791 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9f91497e rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xadc3d0b9 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc3b5c613 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xec1bb326 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfd7bb936 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x03caf3e3 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x102db07a usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1b109f97 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1e86f20c usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x227502a1 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2426e65c usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4cbaa647 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4dbedc4b usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x55b1458e usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x68bbc06c usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x728db023 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8d710b4b usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa4e5e965 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc96ab9bb usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd08b7f21 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd74740d0 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd9a8c239 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf189ce1a usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf29fbcf1 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf479708e usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfcef565c usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x130768c4 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2e5b1f68 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x370edff2 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x42f363a2 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5f26f5c5 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6b2b9488 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x76b033cd i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7dcac11b i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8907049d i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x96c9ff69 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd08f3a95 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd347b938 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe2058de7 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xd34cdb3a ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x05bc913f lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1a8e8361 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1b4a9a40 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x339a6ad8 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7864f6af lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7a97c4e0 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x94e29e37 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9a090cf9 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9c8fe447 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa7504098 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xaa2347e9 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc1354db7 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd29df8fc lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe1a6cace lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xee385337 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x349383c5 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x59b79e8d lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x749ee1ac lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x79947e80 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7d63b2dc __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8cd8d93c lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb728b44a lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xe1fe8dc1 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x988cfab5 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xefa79755 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x11261b0a p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1d76f2aa p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3f77c924 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x55bb5178 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x571c0db9 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x671be617 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x8d7fdeea p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbeabba2e p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1626038a rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x17fbd6e5 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x38a12569 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x43b1a0df rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4fe12748 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x52eef3f5 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x54f84ecc rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x55230ad9 rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6a52abcb rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x750ea710 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7542c885 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7ce085aa rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x893fe409 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9add6171 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb3868ddf rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc14b6cba rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc361ce75 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd02c5c6c rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe09269dc rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xee14dbff rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf39c4038 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf61620fe rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2fdd53f7 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x40be63b8 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5bf1b45b rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8275e40c rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8899b834 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x97a76818 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb2df4991 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb30152de rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xba7742d1 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x03ad577e rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x235a4b5b rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2383548a rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3265bd72 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x35605836 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4e86816f rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5e4e9efe rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x774cd545 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x98d9092f rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9fcb7065 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa98a442d rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xba9e355c rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd4db73ba rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xee1ff712 rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf0dfa973 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf48115c5 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x45d214d1 acpiphp_register_attention +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x8728359d acpiphp_unregister_attention +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x571de2d7 pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x8ac5feb7 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5ea94749 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x7746cf30 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8ce87c51 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x97ae202f wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xbcfc4be6 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd21c1134 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xd68d6e36 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x4ea7c19b fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0633b883 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0a283791 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x130266d6 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x13721141 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x24eb0a79 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x339acc48 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4687ae42 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x493f4504 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b34ca65 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x560dab17 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x57786a8f iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5994a9c0 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5b55a7a8 iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5bc703e5 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5dad8565 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5f7c951b iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x61376e29 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x61f270f8 iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x77bc8230 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7b3e1f99 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7bc54685 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8886e12c iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x891072ad __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8da16d67 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8e1e69f4 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9118babf iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa64430bc iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaef32db2 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8ce24bf iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8eb403c iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc1220090 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc39e88b iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc86a4c1 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd77c72f3 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf19a2ae2 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf617dec6 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf859bcbf iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf86ef7af iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x077c01a7 iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x213237a8 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2f3ff693 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x317e030b iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x339193b1 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x45284924 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4e9f7f95 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x56693a0f iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6cb2baae iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x93bc52b5 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xaf5e41de iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb973b9cd iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcab16bfe iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcc0fb131 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd6f4b3f0 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xec4c8baa iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x03ca7cbb sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x16e0f6d1 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1a3cb7de sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x23170f1a sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2b1e3ebd sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2dfae4b9 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x33e32d4a sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4af85561 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4b47020a sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4eb78f90 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b056ad8 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b2d40f7 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f953213 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7ce71bb6 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x90baf2b1 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa0e0b98b sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb69f5808 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xba8f02af sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcc9c058f sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd73fb80a sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe0a4db5f __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe374d5da sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xff19621d sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x369c0ca9 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3a2f92e8 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x55a4bea7 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x69dac40a srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa6c2cf56 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc75df9e7 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x0a5bfe17 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3db6772e scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x497812d8 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x77495d91 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x7d61cc23 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa7e7300c scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xbdbc5135 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xde96f3e3 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xebcf603f scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x00f476cd iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1a01de7e iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1e873c6a iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2331d646 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x33b6410c iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x39a6a659 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3dcf68a7 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x473848b5 iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x65f58db6 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7b305df3 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7cadad8e iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f92440d iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x922f9b14 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b339afe iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9e9fcd24 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb7c04c1e iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbca27085 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc2cd9d0d iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc9c5717e iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd66ca079 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xedf99855 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf16c5ad7 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3e05118e srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x6b1609d8 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x714d1822 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x89c704c0 srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xfec8e196 srp_remove_host +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x16ef8a7b spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x1a98d0e7 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x1fd52870 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x965bdfe7 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb5e8d6a4 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xbd1776f7 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x3b6c977d comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x9a46a38d comedi_alloc_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x0e5a6d86 das08_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x299be7a3 das08_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20 das08_cs_boards +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95 labpc_1200_is_unipolar +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a range_labpc_1200_ai +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347 labpc_1200_ai_gain_bits +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xf08fae70 labpc_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xf87dbbfc labpc_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x500b5e61 ni_gpct_device_destroy +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x54b1204f ni_tio_insn_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x731abdef ni_tio_arm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8bcfd908 ni_gpct_device_construct +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xa83f6751 ni_tio_init_counter +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xad39697f ni_tio_set_gate_src +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xd8d40656 ni_tio_rinsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe91c78d2 ni_tio_winsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x3fef6714 ni_tio_handle_interrupt +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x5ee5a959 ni_tio_cmdtest +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xa333c139 ni_tio_set_mite_channel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xd9202525 ni_tio_cancel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xda0ec4bf ni_tio_cmd +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xf67b181d ni_tio_acknowledge_and_confirm +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b oslec_flush +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1 oslec_free +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 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drivers/staging/usbip/usbip_common_mod 0x9584b8af usbip_event_add +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb759832b usbip_start_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc3fe38f7 dev_attr_usbip_debug +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc usbip_header_correct_endian +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586 usbip_dump_header +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xeb007e7f usbip_alloc_iso_desc_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfd17e1cf usbip_start_eh +EXPORT_SYMBOL_GPL drivers/uio/uio 0x133d56c9 uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0xb4a535a3 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0xe08f6542 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x5d5ecc09 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xaa4237f0 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 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drivers/usb/storage/usb-storage 0x04f55a0c usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x127d7329 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1828477a usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1b3f4ca9 fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1c4efe26 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x22f24b2c usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x27d9340b usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3db96446 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x46fe972a usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4740bfff usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6a6d9899 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x71c6b27e usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x72afc3d7 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x734e323e usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7818c5b2 usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x83989eb2 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa54f2ef8 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd164f0f1 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd17e7e4e usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd87c4ee5 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd9a1f340 usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdc0a3547 usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xef6717f4 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5c5d2fb3 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x61f8bd0f wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x64d00fe2 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8cb9e6a2 rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xca0f597b __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x075fafce wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x209dfa0b wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3fe8458d __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5be1f1bf wusbhc_b_create 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wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe0c79ee9 wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2038e552 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x270b545e i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x8be9268a i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x2e4b1e47 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x32502c70 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x33bba424 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4db9814f uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x60a95728 uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 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+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1eaa4eb2 uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x225e0da8 uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22f2aa39 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x309cbbbe uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x39e2d0e2 uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4b404f19 uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4daa2830 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x56795a61 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5ef3af8f uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x60781e2b uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x610b597c uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x674dd2f7 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x70999370 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7395e264 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x83514aee uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x89773957 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x946b60a6 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa029261d uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaa29c6ec uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb0ed7be5 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb1675515 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb38741c2 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb7ac9d5b uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba9b0522 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbcada98c uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbfa2a3f7 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcc30c52d uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xceb13402 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd47565a2 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdf4b32a0 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe987eb7e uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xee147c0e uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfb2b9576 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xf978d07d whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0038a7e7 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0c9cf609 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0dd13738 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x104e155f wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1324addc wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x14a2822b wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1a7a6cfa wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1cf9d1a2 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3da58a28 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4867659e wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x53d0443e wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5e3fccd7 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5f1a4e5f wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7292a7ac wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x787cf4ac wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7e2007ea wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8de238df wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x92074b68 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x937e1a5c wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x942c345d wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9432fdf1 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9c154049 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xaa6321b6 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xaf3b8b60 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xba2d987d wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc72f7e21 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd6cb4982 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd8ff3d62 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xde17f968 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe2e7a120 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeb7d305d wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xee9fa076 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x04e08549 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0fd0d410 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x14d890ba ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1c4637c5 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x252f1abc ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x64f5aa57 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb2cbaaf1 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xbcd301aa fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x2e9badbb fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x3b6f273e fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x1474e65a sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xcd6e566f sis_free_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x79604d68 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x943feb52 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xbe97de1d unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xc51bd1b3 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xffb97d40 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x30f27279 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x3cc9d7fc vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xf2b8df05 vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x0587a47d w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x47dfc6ed w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x4d94c26d w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x63d859d4 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x88ef79e0 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xa5c1a6d7 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0xb5363399 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xfaf05571 w1_reset_bus +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x322b1e53 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x3f5067da dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa901744a dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x4d989857 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xce0e0eac exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x0723991e fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0x09b076da fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x0d052aeb fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x0ebe633a fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x1b434790 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0x47036bba fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x5746b9b6 fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x7c36fa8a fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x9b51bbc5 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0x9dc5c7b9 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xa67ae9f0 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0xb45c9952 fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xc62c40e6 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xdc196ae8 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xef90549b fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xf4471726 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0xfa9ffc20 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xff388836 fat_free_clusters +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x04c99f30 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x44ae0a7d nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x83e110b9 nlmclnt_done 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fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x1cf25e99 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x610fd637 ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x70bb5e67 ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca lzo1x_decompress_safe +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x2b76dc15 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x4275e241 garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x5f927677 garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0xb4e81fa2 garp_unregister_application +EXPORT_SYMBOL_GPL net/802/garp 0xc254a224 garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0xe3c674e8 garp_request_join +EXPORT_SYMBOL_GPL net/802/stp 0xa0b6373d stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 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dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5b119233 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5d8d25bb dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5dc6f550 dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6504791c compat_dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6a430ae3 dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6c66e81c dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6e448949 dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x70732d6e inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967 dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x79cfdd45 dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x83ae60bb dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8812db31 dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0x89c5d145 dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x998b9660 dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9a639684 dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9e15446b dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa8b517a4 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb798995e dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc600b6bd dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc97ac10b dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd0fc2744 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd155a0e9 dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0xd69f2ea7 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xdb23ef9b dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe6f702e6 dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0xea704d42 compat_dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x5431d4ff dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x57495fda dccp_invalid_packet +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x5e3c5166 dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x644a0840 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+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xa1692fcb nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe25ab844 nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x0a6e9b11 tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x80af741f tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xa8bc02f1 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc31525ef tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf8ecc97a tcp_vegas_init +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x51a60b2c ieee80211_iterate_active_interfaces +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x7891b0c2 ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a net_vs_ctl_path +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd nf_conntrack_lock +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd nf_ct_port_nla_policy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x06661c3c nf_ct_expect_init +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x08edbae8 nf_ct_l3proto_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x11942f33 nf_ct_get_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1282c308 __nf_ct_refresh_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x177af302 nf_conntrack_l3proto_generic +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1c1dcfe3 nf_conntrack_l4proto_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x20dd8804 nf_ct_deliver_cached_events +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x22b695df nf_ct_unlink_expect +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x236ef1db nf_conntrack_helper_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x28c05ac9 nf_conntrack_l3proto_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2acc4a85 nf_expect_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x310a09a4 nf_ct_expect_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x34bba222 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+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x53d1029c nf_ct_l3protos +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x583a9bf8 nf_ct_get_tuplepr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33 nf_conntrack_set_hashsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ef777ec nf_conntrack_flush_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5f6cd265 nf_ct_remove_expectations +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c nf_ct_port_nlattr_tuple_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e0ea1aa seq_print_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a need_conntrack +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x75b45d2b nf_ct_port_tuple_to_nlattr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710 nf_ct_l3proto_try_module_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7f664253 nf_ct_nat_offset +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8559656f nfnetlink_parse_nat_setup_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x88b2711c __nf_ct_expect_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d39bfeb nf_ct_delete_from_lists +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8f95dffd nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89 nf_conntrack_htable_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f nf_ct_invert_tuplepr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x92592f06 nf_conntrack_l4proto_tcp4 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9458daaa __nf_conntrack_confirm +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9a109631 nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1 nf_ct_free_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9d5f9062 nf_conntrack_l4proto_udp4 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9ec7cf14 nf_ct_expect_related_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa06f4d84 nf_conntrack_l4proto_tcp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 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+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x35400b82 set_ras_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3fe28af0 get_h225_addr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x43cc9971 set_h225_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4d2c9566 set_h245_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x570559d9 nat_q931_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xbba3ed5a set_sig_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xc932fa38 nat_rtp_rtcp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xcd7eb1fc nat_h245_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe50ac8c1 nat_t120_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xfa6641a5 nat_callforwarding_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x0582242f nf_nat_irc_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x36c7e120 nf_nat_pptp_hook_inbound +EXPORT_SYMBOL_GPL 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net/sunrpc/sunrpc 0xf9d1164c rpc_free +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff56f143 svc_reserve +EXPORT_SYMBOL_GPL net/wimax/wimax 0x04d71e2d wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0x0ba8b93f wimax_state_change +EXPORT_SYMBOL_GPL net/wimax/wimax 0x1b601006 wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0x58d3e466 wimax_msg_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x61c5a571 wimax_report_rfkill_sw +EXPORT_SYMBOL_GPL net/wimax/wimax 0x77980d6c wimax_dev_add +EXPORT_SYMBOL_GPL net/wimax/wimax 0x82c2cb5f wimax_dev_rm +EXPORT_SYMBOL_GPL net/wimax/wimax 0x95191d90 wimax_msg_alloc +EXPORT_SYMBOL_GPL net/wimax/wimax 0xa60a7574 wimax_msg_data_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0xdc19db07 wimax_report_rfkill_hw +EXPORT_SYMBOL_GPL net/wimax/wimax 0xe2349ce2 wimax_msg +EXPORT_SYMBOL_GPL net/wimax/wimax 0xeca3d519 wimax_state_get +EXPORT_SYMBOL_GPL net/wimax/wimax 0xf3e67599 wimax_msg_data +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0ac515d4 cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1d926a5a cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x26a67b09 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2b227442 cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ba1859c cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3fda9ead cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x408297e0 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5a7afaa8 cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5b6d7218 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5d3f5b4f cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x65044062 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x679eee9d cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6d4db4ab cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x77785bf0 cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaa86c79c cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb0f280d9 cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb336ebb1 cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbcbb841c cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc5af4dc6 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc8f3e125 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcdc05da4 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd4707189 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe9326b8d cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xedcab3c2 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xee77ca6a cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x0ac97936 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x20d007dc ipcomp_init_state +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xcc674c68 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf16dc182 ipcomp_destroy +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x012647a6 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x037ce058 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x03d0da31 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07099b96 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x12eb6a63 snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x183e4bb5 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a0cab4e snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ea50d9a snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f7e7773 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1fd9fe3e snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x256d5671 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2b5a8473 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2df32267 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2fc48268 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39b8e27a snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d6edfff snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3ddffc44 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x487d9c34 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4c527d09 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ff3d5b4 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55973cb0 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x567eff71 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a415c84 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a4ab652 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x65d62dba snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77198f40 snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77506c8f snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a98a356 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e4c73a3 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f39cf4f snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x801ba0a5 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x82304a19 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87040282 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8a3cc8d5 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8dffe442 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x90f5345d query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x91af4bc4 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x96a9046e snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9736ce20 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97be1afc snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x99f1988b snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d0213c2 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d264300 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ebb0fc5 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2279c1b snd_hda_get_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa36a0f12 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa43ba981 snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xafac14fc snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb083fb6b snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb326e641 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb5794ac3 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb89b3332 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbbca70d9 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc7e44088 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd176578f snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd358c3f8 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd53b094b snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdbab0fb1 snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe2b0f3b6 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe347f747 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe3e1ec8a snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe46f7daa snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4af18af snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe52310b7 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe67c3ed0 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeeccff2b snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0d919ed snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf1f8886b snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf58d3577 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf713c82d snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf8a1c29e snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfc5985c6 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff47f9b3 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x35d257ca soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x4ae48d9a ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x5589afaa soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x610080e0 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf5d43201 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x5e05421a soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xa3524484 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x2fc40df0 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x55a37294 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x2471083b soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xfc445a0d ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x193388cc soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x3b75ca87 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x5ee0dc87 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xb5d09f27 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x07a4cfa2 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1b143398 aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1c2df210 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x26f5ff8f aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x825b4cbd soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8a70106f aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa2327b65 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x8bfc8033 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x914c53cd twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x4a44e636 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x230c261a uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x7bfeda5f soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x169fe9b2 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x515f9f20 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x91f592ba wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x8d8313e0 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xc908b404 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x0b3b8da1 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x9c80b5c2 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x93518e4d soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xfd69ec08 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x94a5122c wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xfc164918 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x15dd4850 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x2c169866 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3180d595 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xbd51aecf wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1aad8656 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xa65e596a wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd794604d soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xfae3935a wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x7c77e1f4 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xfcb9338e soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x0eacb749 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xd09dc891 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x9933a660 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xd3191cff soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xcbc04789 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xf4187e71 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x115ebbfd soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x255f5f50 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x6f7bd689 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd8455bc2 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x0a6401f0 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x80f4668e soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0326fbb2 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03f1d577 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0511e817 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b58934f snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c1024e1 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x16210a24 snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17eeef12 snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1eb9b65a snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1fa930a9 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2013d778 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x24217679 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2a97df24 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2bf3d3cb snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2c930671 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2f3511ad snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32220df7 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x333e907a snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x33e397f3 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3515b7f6 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x352ce38b snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3c66eb69 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x441bc516 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4b0b6738 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d00bfce snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x599a3a10 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d120539 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d1ac3c2 snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x611aefcb snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x681cb253 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d9cc46f snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x744ffa70 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cbace0e snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x88017eae snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x89644f5b snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x917358a4 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x94926760 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9910a7ff snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9bf79be7 snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9e81b231 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa98a961c snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa9d33951 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xabd07dcc snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xad429730 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae5b4347 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaefe57a5 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb18f9c5b snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb3f3b8b5 snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbfd1b74d snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc378d5ac snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xca1794c6 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcae45e1f snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd0529b2 snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd78313b snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 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set_cpus_allowed_ptr +EXPORT_SYMBOL_GPL vmlinux 0xe04e2835 led_trigger_event +EXPORT_SYMBOL_GPL vmlinux 0xe06ab6a9 ata_host_alloc_pinfo +EXPORT_SYMBOL_GPL vmlinux 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5 mce_notify_irq +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe16eb4fa vfs_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xe1ce4d6e d_materialise_unique +EXPORT_SYMBOL_GPL vmlinux 0xe1fc5d6d dm_rh_mark_nosync +EXPORT_SYMBOL_GPL vmlinux 0xe22a9fa5 register_posix_clock +EXPORT_SYMBOL_GPL vmlinux 0xe24571a5 trace_define_field +EXPORT_SYMBOL_GPL vmlinux 0xe24ff917 blocking_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0xe277b5dc inotify_inode_queue_event +EXPORT_SYMBOL_GPL vmlinux 0xe279d131 ring_buffer_normalize_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xe285c468 rt_mutex_destroy +EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff is_hpet_enabled +EXPORT_SYMBOL_GPL vmlinux 0xe3031f2f usb_alloc_urb +EXPORT_SYMBOL_GPL vmlinux 0xe3106f50 securityfs_remove +EXPORT_SYMBOL_GPL vmlinux 0xe3473794 xenbus_map_ring_valloc +EXPORT_SYMBOL_GPL vmlinux 0xe34dd3a5 invalidate_inode_pages2_range +EXPORT_SYMBOL_GPL vmlinux 0xe35721f3 scsi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xe373d6d9 mnt_drop_write +EXPORT_SYMBOL_GPL vmlinux 0xe37417d9 driver_attach +EXPORT_SYMBOL_GPL vmlinux 0xe3c42c91 nf_unregister_afinfo +EXPORT_SYMBOL_GPL vmlinux 0xe3e041d0 blk_insert_cloned_request +EXPORT_SYMBOL_GPL vmlinux 0xe3e4ee0e md_new_event +EXPORT_SYMBOL_GPL vmlinux 0xe442759e posix_timer_event +EXPORT_SYMBOL_GPL vmlinux 0xe4428977 register_kprobes +EXPORT_SYMBOL_GPL vmlinux 0xe4567671 udp4_lib_lookup +EXPORT_SYMBOL_GPL vmlinux 0xe49b0942 lookup_instantiate_filp +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4b26f11 get_dcookie +EXPORT_SYMBOL_GPL vmlinux 0xe4d9284b queue_delayed_work +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe513afc0 cache_k8_northbridges +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe5675a92 relay_close +EXPORT_SYMBOL_GPL vmlinux 0xe606f0de ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f gpio_unexport +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe6836671 debugfs_create_x8 +EXPORT_SYMBOL_GPL vmlinux 0xe68f6d12 ring_buffer_reset_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe6a6f934 blk_trace_startstop +EXPORT_SYMBOL_GPL vmlinux 0xe6b87b01 cpuidle_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xe6d17fe7 relay_flush +EXPORT_SYMBOL_GPL vmlinux 0xe727605e devm_kzalloc +EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877 pcpu_base_addr +EXPORT_SYMBOL_GPL vmlinux 0xe80ddf24 usb_register_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xe81af31a crypto_alg_sem +EXPORT_SYMBOL_GPL vmlinux 0xe82a2b30 vfs_setxattr +EXPORT_SYMBOL_GPL vmlinux 0xe85be8ee usb_reset_configuration +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe8a0d9e3 ata_std_error_handler +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xe96ceda9 sata_pmp_qc_defer_cmd_switch +EXPORT_SYMBOL_GPL vmlinux 0xe9d51631 sysfs_put +EXPORT_SYMBOL_GPL vmlinux 0xe9e4eb01 sdio_claim_irq +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea115e29 ata_bmdma_status +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea418e0f atapi_cmd_type +EXPORT_SYMBOL_GPL vmlinux 0xea5bb525 usb_free_urb +EXPORT_SYMBOL_GPL vmlinux 0xea5d29d1 cleanup_srcu_struct +EXPORT_SYMBOL_GPL vmlinux 0xea5f6448 kill_pid_info_as_uid +EXPORT_SYMBOL_GPL vmlinux 0xea6656b5 scsi_mode_select +EXPORT_SYMBOL_GPL vmlinux 0xea8d4bec setup_irq +EXPORT_SYMBOL_GPL vmlinux 0xea9ebe56 inet_twsk_purge +EXPORT_SYMBOL_GPL vmlinux 0xeaa68908 power_supply_changed +EXPORT_SYMBOL_GPL vmlinux 0xeae2cec0 fib_rules_lookup +EXPORT_SYMBOL_GPL vmlinux 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL vmlinux 0xeb29145e ring_buffer_empty +EXPORT_SYMBOL_GPL vmlinux 0xeb406e4f inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL vmlinux 0xeb9e7fcc crypto_alg_lookup +EXPORT_SYMBOL_GPL vmlinux 0xeba7b12e firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0xebbb9b6f ata_sff_irq_clear +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec4c6d72 inet_unhash +EXPORT_SYMBOL_GPL vmlinux 0xeca03020 invalidate_inode_pages2 +EXPORT_SYMBOL_GPL vmlinux 0xed0690a5 ehci_cf_port_reset_rwsem +EXPORT_SYMBOL_GPL vmlinux 0xed185555 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xed2bbe2e usb_buffer_free +EXPORT_SYMBOL_GPL vmlinux 0xed53136c hidinput_connect +EXPORT_SYMBOL_GPL vmlinux 0xed6966a2 spi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xedaa0254 crypto_unregister_alg +EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67 gnttab_end_foreign_access +EXPORT_SYMBOL_GPL vmlinux 0xedd07728 task_current_syscall +EXPORT_SYMBOL_GPL vmlinux 0xedd355a9 ring_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xeddcb27d xenbus_dev_error +EXPORT_SYMBOL_GPL vmlinux 0xee0729bf xfrm_audit_state_icvfail +EXPORT_SYMBOL_GPL vmlinux 0xee57195e dm_unregister_path_selector +EXPORT_SYMBOL_GPL vmlinux 0xeef4163d scsi_get_vpd_page +EXPORT_SYMBOL_GPL vmlinux 0xeef8774e __inet_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0xef4f1b68 __class_create +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xefa0da8f ring_buffer_alloc_read_page +EXPORT_SYMBOL_GPL vmlinux 0xefc49aa9 aead_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefec100f inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0xf0002df6 rtc_read_alarm +EXPORT_SYMBOL_GPL vmlinux 0xf051d83c crypto_dequeue_request +EXPORT_SYMBOL_GPL vmlinux 0xf0a62a6b cpci_hp_unregister_bus +EXPORT_SYMBOL_GPL vmlinux 0xf1106efc ata_port_pbar_desc +EXPORT_SYMBOL_GPL vmlinux 0xf16d556c __xenbus_register_frontend +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf21a0d8c xenbus_watch_pathfmt +EXPORT_SYMBOL_GPL vmlinux 0xf21caae4 ata_common_sdev_attrs +EXPORT_SYMBOL_GPL vmlinux 0xf223b3fc acpi_smbus_register_callback +EXPORT_SYMBOL_GPL vmlinux 0xf268e682 crypto_ablkcipher_type +EXPORT_SYMBOL_GPL vmlinux 0xf26f9177 ata_eh_freeze_port +EXPORT_SYMBOL_GPL vmlinux 0xf28a20c9 fuse_request_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf29c914c aead_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xf2c030eb platform_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf2feb8ca eventfd_fget +EXPORT_SYMBOL_GPL vmlinux 0xf328eb0e init_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf37e3073 debugfs_rename +EXPORT_SYMBOL_GPL vmlinux 0xf389aa73 bus_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xf399106b ata_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf3c18166 ata_sff_dumb_qc_prep +EXPORT_SYMBOL_GPL vmlinux 0xf423d29c fuse_get_req +EXPORT_SYMBOL_GPL vmlinux 0xf4742e1a kick_process +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f iommu_domain_free +EXPORT_SYMBOL_GPL vmlinux 0xf4ad9803 pciserial_resume_ports +EXPORT_SYMBOL_GPL vmlinux 0xf4fc1b7c spi_sync +EXPORT_SYMBOL_GPL vmlinux 0xf511feed sdio_f0_writeb +EXPORT_SYMBOL_GPL vmlinux 0xf518e5ab ring_buffer_consume +EXPORT_SYMBOL_GPL vmlinux 0xf52457f5 usb_queue_reset_device +EXPORT_SYMBOL_GPL vmlinux 0xf52a6469 usb_set_device_state +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf589b391 inet_twdr_twkill_work +EXPORT_SYMBOL_GPL vmlinux 0xf5945bac gnttab_free_grant_references +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf61fa5a7 dm_rh_bio_to_region +EXPORT_SYMBOL_GPL vmlinux 0xf62dca83 usb_deregister_device_driver +EXPORT_SYMBOL_GPL vmlinux 0xf63c5570 device_create_vargs +EXPORT_SYMBOL_GPL vmlinux 0xf6739717 ata_bmdma32_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6c52278 regulator_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf7016530 xenbus_gather +EXPORT_SYMBOL_GPL vmlinux 0xf75a54d3 crypto_aead_type +EXPORT_SYMBOL_GPL vmlinux 0xf795fbd1 ata_host_start +EXPORT_SYMBOL_GPL vmlinux 0xf808356f sg_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf84de58f pci_enable_sriov +EXPORT_SYMBOL_GPL vmlinux 0xf87274c9 usb_autopm_set_interface +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8942a4b usb_sg_cancel +EXPORT_SYMBOL_GPL vmlinux 0xf8cb1d8b crypto_shash_final +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf91ec57d dm_dispatch_request +EXPORT_SYMBOL_GPL vmlinux 0xf974c63f driver_create_file +EXPORT_SYMBOL_GPL vmlinux 0xf9765833 dmi_match +EXPORT_SYMBOL_GPL vmlinux 0xf97666a0 set_memory_rw +EXPORT_SYMBOL_GPL vmlinux 0xf9997839 console_drivers +EXPORT_SYMBOL_GPL vmlinux 0xf99ad5c8 queue_delayed_work_on +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xfa0fc240 __fsnotify_parent +EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662 scatterwalk_start +EXPORT_SYMBOL_GPL vmlinux 0xfa400ae6 sdio_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xfa8b9a83 blk_trace_remove +EXPORT_SYMBOL_GPL vmlinux 0xfb2a151d xfrm_audit_state_add +EXPORT_SYMBOL_GPL vmlinux 0xfb785ca8 blk_update_request +EXPORT_SYMBOL_GPL vmlinux 0xfb882fb7 wmi_query_block +EXPORT_SYMBOL_GPL vmlinux 0xfbc016de blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xfbe495f4 usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc47b2b7 crypto_grab_skcipher +EXPORT_SYMBOL_GPL vmlinux 0xfc488fcb ata_sff_freeze +EXPORT_SYMBOL_GPL vmlinux 0xfc5389af dm_register_path_selector +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcc50b5c devres_close_group +EXPORT_SYMBOL_GPL vmlinux 0xfcd6f19d hid_report_raw_event +EXPORT_SYMBOL_GPL vmlinux 0xfcef4631 clockevent_delta2ns +EXPORT_SYMBOL_GPL vmlinux 0xfcfedbcb devres_open_group +EXPORT_SYMBOL_GPL vmlinux 0xfd038600 relay_file_operations +EXPORT_SYMBOL_GPL vmlinux 0xfd4c6ca6 platform_device_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xfd51b281 gnttab_end_foreign_access_ref +EXPORT_SYMBOL_GPL vmlinux 0xfd771b19 ata_pci_sff_prepare_host +EXPORT_SYMBOL_GPL vmlinux 0xfdd32b79 usb_store_new_id +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfdf6e5fa blk_execute_rq_nowait +EXPORT_SYMBOL_GPL vmlinux 0xfe0a64ef zap_vma_ptes +EXPORT_SYMBOL_GPL vmlinux 0xfe1189e4 ata_acpi_gtm +EXPORT_SYMBOL_GPL vmlinux 0xfe6415de alloc_page_buffers +EXPORT_SYMBOL_GPL vmlinux 0xfe727411 get_phys_to_machine +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff1990ab tty_get_pgrp +EXPORT_SYMBOL_GPL vmlinux 0xff32a267 ata_dev_next +EXPORT_SYMBOL_GPL vmlinux 0xff585fff kobject_uevent_env +EXPORT_SYMBOL_GPL vmlinux 0xff590a4c acpi_smbus_unregister_callback +EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL vmlinux 0xff728518 sdio_writew +EXPORT_SYMBOL_GPL vmlinux 0xff8e0aa6 add_timer_on +EXPORT_SYMBOL_GPL vmlinux 0xff994ec3 ring_buffer_record_enable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xfff53502 bus_for_each_dev +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/i386/386.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/i386/386.modules @@ -0,0 +1,2664 @@ +3c359 +3c501 +3c503 +3c505 +3c507 +3c509 +3c515 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+snd-ctxfi +snd-darla20 +snd-darla24 +snd-dt019x +snd-dummy +snd-echo3g +snd-emu10k1 +snd-emu10k1-synth +snd-emu10k1x +snd-emu8000-synth +snd-emux-synth +snd-ens1370 +snd-ens1371 +snd-es1688 +snd-es1688-lib +snd-es18xx +snd-es1938 +snd-es1968 +snd-es968 +snd-fm801 +snd-gina20 +snd-gina24 +snd-gusclassic +snd-gusextreme +snd-gus-lib +snd-gusmax +snd-hda-codec +snd-hda-codec-analog +snd-hda-codec-atihdmi +snd-hda-codec-ca0110 +snd-hda-codec-cmedia +snd-hda-codec-conexant +snd-hda-codec-idt +snd-hda-codec-intelhdmi +snd-hda-codec-nvhdmi +snd-hda-codec-realtek +snd-hda-codec-si3054 +snd-hda-codec-via +snd-hda-intel +snd-hdsp +snd-hdspm +snd-hifier +snd-hrtimer +snd-hwdep +snd-i2c +snd-ice1712 +snd-ice1724 +snd-ice17xx-ak4xxx +snd-indigo +snd-indigodj +snd-indigodjx +snd-indigoio +snd-indigoiox +snd-intel8x0 +snd-intel8x0m +snd-interwave +snd-interwave-stb +snd-korg1212 +snd-layla20 +snd-layla24 +snd-lx6464es +snd-maestro3 +snd-mia +snd-miro +snd-mixart +snd-mixer-oss +snd-mona +snd-mpu401 +snd-mpu401-uart +snd-msnd-classic +snd-msnd-lib +snd-msnd-pinnacle +snd-mtpav +snd-mts64 +snd-nm256 +snd-opl3-lib +snd-opl3sa2 +snd-opl3-synth +snd-opl4-lib +snd-opl4-synth +snd-opti92x-ad1848 +snd-opti92x-cs4231 +snd-opti93x +snd-oxygen +snd-oxygen-lib +snd-page-alloc +snd-pcm +snd-pcm-oss +snd-pcsp +snd-pcxhr +snd-pdaudiocf +snd-portman2x4 +snd-pt2258 +snd-rawmidi +snd-riptide +snd-rme32 +snd-rme96 +snd-rme9652 +snd-sb16 +snd-sb16-csp +snd-sb16-dsp +snd-sb8 +snd-sb8-dsp +snd-sbawe +snd-sb-common +snd-sc6000 +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-emul +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-sgalaxy +snd-sis7019 +snd-soc-ad73311 +snd-soc-ak4104 +snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-sscape +snd-tea575x-tuner +snd-tea6330t +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-usb-us122l +snd-usb-usx2y +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-virtuoso +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-wavefront +snd-wss-lib +snd-ymfpci +soc_camera +soc_camera_platform +softcursor +softdog +solos-pci +sony-laptop +sonypi +sound +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +ssb +sscape +ssfdc +sstfb +ssv_dnp +st +stallion +starfire +stb0899 +stb6000 +stb6100 +stex +stinger +stir4200 +stkwebcam +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +sworks-agp +sx +sx8 +sxg_nic +sym53c416 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +t128 +t1isa +t1pci +tc1100-wmi +tcic +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda8261 +tda826x +tda827x +tda8290 +tda9840 +tda9887 +tdfx +tdfxfb +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +teles_cs +tg3 +tgr192 +thinkpad_acpi +thmc50 +tifm_7xx1 +tifm_core +tifm_ms +tifm_sd +tileblit +timed_gpio +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tlclk +tle62x0 +tmdc +tmiofb +tmp401 +tms380tr +tmscsim +tmspci +toim3232-sir +toshiba_acpi +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_bios +tpm_infineon +tpm_nsc +tpm_tis +tps65010 +trancevibrator +tranzport +tridentfb +trix +ts5500_flash +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +ttm +ttpci-eeprom +ttusb_dec +ttusbdecfe +tua6100 +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tvaudio +tveeprom +tvp5150 +tw9910 +twidjoy +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +twofish-i586 +typhoon +u132-hcd +u14-34f +uart401 +uart6850 +ubi +ubifs +ucb1400_core +ucb1400_ts +udf +udlfb +ueagle-atm +ufs +uinput +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultracam +ultrastor +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +unioxx5 +upd64031a +upd64083 +uPD98402 +usb8xxx +usbatm +usb_debug +usbdux +usbduxfast +usb_gigaset +usbhid +usbip +usbip_common_mod +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-int-device +vcan +ves1820 +ves1x93 +vesafb +veth +vfat +vga16fb +vgastate +vgg2432a4 +vhci-hcd +via +via686a +via-agp +viafb +via-ircc +via-rhine +via-rng +via-sdmmc +via-velocity +vicam +video +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vivi +vlsi_ir +v_midi +vmk80xx +vmlfb +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w35und +w83627ehf +w83627hf +w83627hf_wdt +w83697hf_wdt +w83697ug_wdt +w83781d +w83791d +w83792d +w83793 +w83877f_wdt +w83977af_ir +w83977f_wdt +w83l785ts +w83l786ng +w90p910_ts +w9966 +w9968cf +wacom +wacom_w8001 +wafer5823wdt +walkera0701 +wanrouter +wanxl +warrior +wavelan +wavelan_cs +wbsd +wd +wd7000 +wdt +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wistron_btns +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +x38_edac +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_iprange +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +z85230 +zatm +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +znet +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/i386/generic +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/i386/generic @@ -0,0 +1,10070 @@ +EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667 scx200_gpio_base +EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008 scx200_gpio_configure +EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c scx200_gpio_shadow +EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd scx200_cb_base +EXPORT_SYMBOL arch/x86/kvm/kvm 0x1dab51e1 kvm_cpu_has_pending_timer +EXPORT_SYMBOL arch/x86/kvm/kvm 0xeea088ad kvm_read_guest_atomic +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0x1a81e431 suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0xeeef3cfd uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x17facf08 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x306d8998 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x3585c9bc pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x53322110 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x5ae45ef7 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0x67b24ca5 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x757bb087 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x82c33ce8 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x88ed73cd paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0x8da10f99 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x932da107 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0xb89118b2 paride_register +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0212ed31 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x132dbf94 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3dde2210 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3e8ab91f agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x428dc2b7 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x45329251 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x45f61560 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x47eb3efe agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4f49e04a agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x544eee71 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7c7bdc7d agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7c9eaeaf agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7fe5d2be agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8e2ce280 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x92fe17ca agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9eb44f4c agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa180bf94 agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb66c938b agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb71c0079 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbafdf21a agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc310066c agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8df5cec agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xcb8806b2 get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd7b00017 agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd8f7bb13 agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe46e25c4 agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe8e60ba5 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe945dd50 agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0xedb9ea14 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf1fbf775 agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf594c4b4 agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf9d18dea agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf9e9a544 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x06ac766c gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x081d871c gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x12c34688 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x209db7e8 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x2160f842 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x2d327999 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x4236f43d gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x5463af8c gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x7c5d44e5 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x804aca11 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x934f0dfa gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0xaa78af48 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xd58911ad gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xd7ba3966 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0xed27c5d2 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xf9d82fe3 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0737748f ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x176903cf ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2074e547 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2edee652 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x32f351e5 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3598e43d ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x442255e7 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5a7b6f32 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x72241770 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7563aad0 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7be8ac31 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x82257788 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x83f7ce2f ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x92b1f52d ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9cd6cece ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb7ceab4d ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbd77515d ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc0b8f3b0 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc9cb95f1 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd0852a70 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd39898ca ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdc166d62 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe0e698b5 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/nsc_gpio 0x0593317f nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0x242005c7 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nsc_gpio 0x5213749b nsc_gpio_read +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0x1238e939 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0x836ca1a6 edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xeeceefcd edac_mc_find +EXPORT_SYMBOL drivers/firewire/firewire-core 0x00e37f33 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e9cb03c fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0x571b92df fw_iso_context_queue +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5c669aff fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5d46fb6e fw_iso_context_start +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6dea8aca fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6e7caddb fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x720be5bb fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x77093654 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7ea4ee90 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8760df0f fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8bac1ab1 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c2f2dbd fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb9bc0cc2 fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc2f6339f fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc7eecbda fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc9074fba fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xd79b3e39 fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe4728ff3 fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf2dbebd7 fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf4ec2f66 fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf91830ef fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc4cacac fw_send_request +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05101a28 drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05b7807c drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x068f0efe drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06c7bd33 drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f1a145 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a18f07d drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d1b19a9 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d89084c drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f9dd685 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x10000742 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x101f3291 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x11c91afe drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1377c3e8 drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1596d978 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bcbcf86 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d120b7e drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x218e73df drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x22203bb8 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0x26466598 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x27af0a91 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x28103208 drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3234aa21 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x32a5b3b8 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x36101f89 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x39abc2af drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3aa35830 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d781dbd drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f2cb57e drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x405180ff drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x454bc01f drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x47b2fa3c drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49f6c08e drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e58e64d drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ff47754 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53676bd2 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5450c2ba drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x557911a5 drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5781dfd8 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5880f80c drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5938ae93 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5999c3a4 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b0e97b8 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f529f50 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5fd20b84 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x61d0db41 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x63271cee drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x65b77cf0 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x666e8c5b drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0x669fdbdc drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x673f1e4e drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x67ed4e5c drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x67ee4e11 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x681609f3 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f546720 drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x71ddf273 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7288a698 drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x74ba5906 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x754862e0 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0x755d2b16 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x76a231bf drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7bc1a822 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c85d61b drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ee22c60 drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x82ed6800 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x842fc566 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x845d55e9 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x85ea46c4 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x87947ab4 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88592be8 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88f4e6f4 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8add0b48 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8c8b5a32 drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d499fdb drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x90881dbf drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9437ea7c drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94b97cf8 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x950fb7a1 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x98a5ad18 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9da6b775 drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dca0ecc drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa101209c drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa439a28b drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa6c1d6a7 drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb17515e7 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb182c9d7 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb26c2099 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2a1075b drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb466bbee drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb554f86d drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb7b410c0 drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb843605d drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb885fbc2 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb5f023c drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb895115 drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc657a509 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc7e39763 drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd6753f8 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd270786f drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2721efc drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3cd0cf0 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd6b5fda8 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8725b43 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8a713b0 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb0c2641 drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb8611b9 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdbea57c2 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc133fc5 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3331cd drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1146bef drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5913992 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe625bcc0 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7e180a3 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeae390cd drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xee977cb5 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeed5a73b drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf08ff330 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1791ed8 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4cb9dcb drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfb126d6c drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd19ec13 drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff1903be drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x40dc2f57 i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x597e730c intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xc7af4b29 intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xf30d5638 intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x2806e8f0 radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x75680b92 radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xcb964dc0 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e6f46a3 ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0ebf8900 ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x13cabf7a ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x147bc244 ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3fb4388e ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5832a87a ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7741948a ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x808fac47 ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x830fc9a9 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x945c1491 ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9c8580c3 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9d8ec50a ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa143e628 ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa57e59f7 ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa6140311 ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac1baf4c ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbbf97e6d ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc475ee70 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf66a077 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd2bb0efa ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed8af127 ttm_bo_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf592a275 ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf6c8a8a7 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfb109548 ttm_bo_device_init +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x73647d81 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xc8f92418 i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x66538b96 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xf9cb2c9b i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x8574cb89 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x34be04ff amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x02647735 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x065eaa42 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0d1dd565 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x116e1338 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x19d41e21 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1cd13a21 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x211876c7 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x223b33bc hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x239174df hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2708af89 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2756263b hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2e514999 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x364ec033 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3bc7ee14 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x419aef21 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x495c466a hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4c2b42c9 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4cb909cc hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4eceaafc hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57383028 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64dd0adf hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x679e419d hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b619c25 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x72d54a1c hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x756fb263 hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x75e14636 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7809239c hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d657af2 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x93f8592c hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x982a08b8 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9834918a hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98cdf1f3 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1028927 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2027d65 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa3d99571 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa52d6903 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa82d8572 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaa687ba3 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaa78f66b hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xabc4428e hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3c6a0a9 hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb57fd55e hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9273ea9 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb952f761 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd539ce7 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd594010 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbfd0cbd1 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc220cdb4 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc9c7ca13 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcc9570a2 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9c21d51 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdaf4a4b7 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdfe6ed60 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe0b76f59 hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe3cc52a9 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe434598c hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe5a3efde hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe985317a hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeb6d7fb4 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf8bd7e0c hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfb74729a hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff350f6a hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff53346b hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x467d2f0e ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6043e7ad ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xb0c2f3d0 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x051e4460 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xd9163122 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xde1e4253 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xf091daf2 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x47d96c8b ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x59abe518 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x638bb981 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x66bb58bc ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x74d86559 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8cbe0dbf ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9357b090 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x93e67f85 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x95640778 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x99709ca8 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa611f0d4 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb20cd25f ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb7a7d9c6 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb9bf5b8d ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbd7a3388 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xd401bba9 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdfbc2a0f ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x054d1786 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09386d7c ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c56903c ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c6520b7 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x141d1451 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14877ca5 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x155a7bce ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1cae0700 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1fdccdb0 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x217863dc ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2415d8fd ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26d3a24f ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2782c6c7 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2aac33a1 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d7cefff ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3073df88 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31b04c7c ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x352b79ec ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x43183401 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x46861fcd ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47394b94 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48c710f6 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4a49861f ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ad88755 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4c289583 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4d41ded2 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4dd1acfc ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4de8b108 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4e314ea0 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4f2f02ac ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4fb9312b ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55f0f9cc ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6256483f ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68c6d3f1 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74c341ea ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77623769 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c2321f9 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7fca838b ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x813f8e51 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x839b2761 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b746d1b ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93b7ab54 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d10ee9a ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e14b688 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa04d2142 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa13425cf ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9e44ba1 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaf29eb82 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb151d926 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb6974885 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc185e6f5 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc67524e2 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc6a8f0e9 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc7348e54 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2d9c51e ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd30e1eb1 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd551abbc ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd7f7b31b ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd868b5b0 ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9f9c3dc ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe10482bc ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xea7e0c63 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf55e545e ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5aab954 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf826502d ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd1f7dd5 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x217c0ed0 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2873131f ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x33cdb7e3 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x41ede272 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x53f36a1c ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6260f8c6 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x78b18cb4 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc6f9edf0 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xcf62226f ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd4f12d84 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe81c60b7 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xeb107fe2 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1049cac2 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x111f8b42 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3136ebb5 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d49a7df ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x704b093e ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb632e922 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd6007859 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0d7700ff iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x27c0b2c7 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5bc7f157 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x63d77131 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6c6ff816 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc105ddae iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc906d323 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xeb7492bb iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0653f069 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x22f90069 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x341ddbe3 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x34695baf rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x47bb962d rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x58fb84c6 rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5bbe6291 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5c919e22 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6c324083 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x78810d49 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaec51355 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb2a945a5 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb6ed49c8 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbaef7225 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc571a594 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xca601f2a rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xeea3777e rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf4bccb8b rdma_join_multicast +EXPORT_SYMBOL drivers/input/gameport/gameport 0x04a18f53 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x0ab0b234 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x2597b6c4 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0x6cc7a998 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x6f549cf5 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x772234ca gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x884b4061 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x8d3de058 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xb653866c gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x03a92d38 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x56c1ede2 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x9c94dc43 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xb8477f22 input_register_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x10eae44c capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2450ac2a attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2af5bae2 capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3e771440 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x54303e0a capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x95b61704 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc4bf477f capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc5cd79be detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd337b35c capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe778b687 capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1 capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf8c9331e capi20_put_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x24de6414 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x3045a62c b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4d895562 avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x53bd82d4 b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5aea5863 b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x623f2284 b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x62d0a2e3 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x68dc562e b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7d6f23e9 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x80b8aec7 b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9831c74e b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb6adf738 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd1612706 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe32331b5 b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf9a68ea9 b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x38bfc532 b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4d3678bc b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x6c674fd6 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x742c07e2 t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8e810526 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x9d2b26ed b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xc83c0d37 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xdd71454a b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xfb80bb44 b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x6d6d83ed proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x5299c925 hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x339ff117 isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x446fce35 isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x68f7f261 isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x836ab790 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x8f294c0a isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xa663866b isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xdbed6f6d register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfff36346 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x17b0b68c recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1f6143d1 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2fd9cdd5 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6901181b mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x72950009 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x749e6aed mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x88d0db9a get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8949ce1a recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x958afc11 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9ba89926 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa7a020d2 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaa33635f l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb3290f3e mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb5af4691 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xcb5970a3 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd713ce03 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe2b18b97 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xea414936 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf23050ea bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf369c91e queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfb6b92c7 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x3066f923 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x9016bc6b mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x8b9ed18b mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x078e711d mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x7d661004 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x4eaf9bf4 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x30a8a8d7 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xdca612cb xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0477046d flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x102b0b31 flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x133e1d9a flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x154bfa9d flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2262aa14 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3bb01751 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x43d985aa flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x457011d6 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x45c489aa flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5aa90386 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x61957d72 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa8f8f63f flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaf4d7264 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbc326438 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc28f488e flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc9035c63 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcd994249 flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd861f887 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf0215549 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf264da7a flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x5333cdf3 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xddd45442 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf525c944 bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xfab6e138 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x017e68cd rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x1de72819 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3c4ab8ab dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5d2b09fd dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8081c67c dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa233cc78 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xacef6497 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb83b9163 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd1466722 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xe294464a dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x016ddac6 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0d773923 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0dce2187 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1978abcb dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29da56f3 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x32f6b110 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x394771f0 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x40896358 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x40b10731 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4cdbfb29 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4e4ceae9 dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5764a821 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x57a90ec1 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x58ee6d3b dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3 dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x91ff3cbe dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa330fd2a dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xaeaf2dba dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xba6efaa8 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbab35765 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc3651604 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc3cd3caa dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc73bbf37 dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd4f16b5a dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd98cfcc1 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfee95783 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x15cebbf9 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x39e99775 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6432e41a dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x93342ee9 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa818cc4b dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xd8c57510 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xaaf9c2a2 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x01befea7 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x12c614a5 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2eb165ff dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x39842ad8 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4de0b551 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4fd3f953 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6008297f dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x99435b8a dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe3653ec6 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xef2e1fc5 dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf422f2a4 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x6c60b743 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x06c2aedc au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x58e02bb1 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x9695df08 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xa9a9cbd7 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x64240dc7 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x1b14198c cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x391c0d44 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x15e15861 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x23ed7176 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xf20c5f60 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x424be6d6 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xa062d507 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x817a1b33 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x124018b5 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x35d03aca dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x3dc873ce dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4a7f1bbb dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5954ff28 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x9b6ab1ac dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x161f7ca0 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xcb3c0b5b dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x03d43821 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8dc54942 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x923233ae dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xb9bb047a dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xddbe324a dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf9c6cdc9 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x022e6d79 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x38ae3649 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x42bacd7b dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x44bc5c22 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x1e2df2da isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x97345eb9 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x9844f763 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x4317b254 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x3fa95cfd lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xf716f813 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x68546c28 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x05f58028 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x3f1c0a9b lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x968452ed mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x672265a8 mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x05d7f5a7 nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x02415101 nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x159e5ee6 or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xfb9af045 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xbf01a144 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x810c1aed s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x467d96ca s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xfabcf380 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xa775667c si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xbd0d00dd sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x6b8548a1 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x4e61885f stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xfe961ce9 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x83839c69 stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x67e7b734 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x86e80810 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x40aad7fe stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x92b7d6f9 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x59646f35 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xcd88787a tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x9a2067fb tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x93ff1d5e tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x668b18c2 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x6c30eda2 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xf4cdbfb0 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xb953d63d tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x8fab84f2 tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xe833673d tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x259a3f97 tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x6b8a20e6 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x5ae93ae6 ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x750d473b zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x38582200 zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xe22771e8 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x8daf3742 ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xa6683688 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x37c6499a bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xec4a8b75 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xef9c445c bttv_sub_register +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x8dda2558 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xb10a359b btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x299b8c39 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0x55f0faa2 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x01516bec cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x25524074 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x41882018 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xab683b99 vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4067ae4c cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x891c058d cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x92f2aae8 cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa3b007bc cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa939d64b cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb32db489 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1d2d4c34 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3c902c69 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x485d08b8 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9380e590 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb5e5e2d1 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xcefae017 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd5299292 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x01b97487 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1af3d2de cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x33a1d530 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x478b4a62 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x50150138 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5ab5a370 cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5b909c89 cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5f9a8575 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6433000c cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x66282cc1 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x668741c3 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x94012232 cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9954c031 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa58d2de3 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa68fa8ae cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb0458da4 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb7065b7c cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc4383ae4 cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xda5c6015 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdb2a0b91 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe775db8e cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xee41ae36 cx88_core_irq +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x9ebbe2fe em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xe7056712 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0a59ac86 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1a8f70c5 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x36afae2e gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x414be2ea gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6923afd5 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7c9295b6 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x90319302 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x34ac2aab ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3e29a2c2 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7e43de1a ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7fc53380 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xafe1fb62 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb42695f0 ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb697c9fb ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe33453e5 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf9abb607 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf9f62c35 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfe314229 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x01fe3f73 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x039587d4 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x281d97fc saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5966a0ef saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x61953406 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x80ddae0f saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8f2d76b5 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb849c087 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd3467abc saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd90c0c33 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfad4b217 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfe9c9b2d saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x178f3b2d soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x1cfc86ca soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2956d40a soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2994630a soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xb8a47c04 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcdff46a8 soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcf0d6665 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdb44c42c soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xfec7fb38 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/tveeprom 0x24aac9d6 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/tveeprom 0x674e26c7 tveeprom_read +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x3b584c15 usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x623dcba5 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x671ada0c usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x72559896 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xad105f96 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xc6768b4e usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x3cf1335b v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x0319d214 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xe87afef7 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0fae7487 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x22ef07f9 videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x680ac7dd videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6f5d79c7 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xb926d474 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf26a1645 videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x17e9e3dc video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x19579de3 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x37ebc4c7 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x50e3a540 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x7d259b1c video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x8d24c774 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x913f8ba8 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xab64a943 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf669eea5 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x0d64b18f videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x19339a6b videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x52854cdc videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xc034cbd5 videocodec_unregister +EXPORT_SYMBOL drivers/memstick/core/memstick 0x0638fed9 memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x08ac68e5 memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x1cec02f7 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x4413d492 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b5c17c8 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x60d8b429 memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6256e125 memstick_next_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x633e9858 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6e59a344 memstick_suspend_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c380be6 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c9b5da4 memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x93e194a6 memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x9bf6e2b4 memstick_free_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xb9f80ff1 memstick_detect_change +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0b58c5db mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1c8f5d16 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1f7b14ad mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x25239b3b mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x319f747c mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x341356c7 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x484027f9 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x49ef2249 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x583a9725 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x58dedb26 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5f479b45 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x663ed5fc mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x75cdd804 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x806ad73b mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8222d060 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x872424b9 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaa991285 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb27d3d84 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb8fb09e8 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc25052ad mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc2ee7a09 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc3da9d47 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc6995bfa mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe2e51796 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeb7f047a mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf0edc40c mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf58ef506 mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfab0c4bc mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x02480ba4 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x092d6373 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0b23136d mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0ba23af5 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1bfe8aa3 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x22daf962 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x349ca889 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x350b742f mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x481f1667 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x540425f2 mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x587b6ffb mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58b5722b mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5e69e507 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x69a59558 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x70d8b047 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x770e10c2 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x87cb11ab mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9ef26e40 mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa8a04f82 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb2edbb96 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb4c37e5c mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbd2ea8fd mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b5f62b mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe3f9df1a mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe64e7c58 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe67e3234 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x03770a13 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63148e1b i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x78c37ea7 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x82a753dd i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9600fcf6 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99c7eb59 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa15d2132 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa6c36cee i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb90d691a i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbef19807 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd0260cf9 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd20ea99a i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdc5ce274 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xed095d87 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xedc5456b i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf90a5311 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfab2a8d8 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfd40d2f3 i2o_msg_get_wait +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0496a5c7 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x06145d6a ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x1ffb86c4 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x37919f89 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x46115478 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8676c889 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa89e09d0 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf271fecc ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x2540964e pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xbbbb0217 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x500a1a87 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xf288ccd4 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x64c0b62b c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0x7723086d c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x03d57059 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xb215381f ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x033c285e tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x1206d051 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x153678a5 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x287a5398 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x3a0b837e tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x57422c39 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x8296b88a tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0xb401d379 tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xc6ff475d tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xd29e4456 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xddd9b600 tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0xf3a41f06 tifm_remove_adapter +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xb73ce20c mmc_cleanup_queue +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x38eb625c cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x64e5b8c2 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x9d2bf874 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x096bcb58 do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x44042cd2 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4d9dbfdf register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xd78f6c1b unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xc9597b2b mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xf14fd209 lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x35d0d222 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x2501e9af add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf6a97b97 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x15535e3b mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x671f9736 mtd_concat_create +EXPORT_SYMBOL drivers/mtd/nand/nand 0x146ac6d7 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0x2fdb0953 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x042be169 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xa7e19087 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x24f415b7 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x605bef50 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x60dea41c flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa8d51979 onenand_scan_bbt +EXPORT_SYMBOL drivers/net/8390 0x03d00315 ei_close +EXPORT_SYMBOL drivers/net/8390 0x3c9b180c ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x617ee2a8 ei_open +EXPORT_SYMBOL drivers/net/8390 0x6b3b3fb4 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0x70a2fc2a ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x8e6898d8 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x95d53a17 ei_poll +EXPORT_SYMBOL drivers/net/8390 0xa2df2389 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0xb06eed90 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xdda0c0fe __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390p 0x0855cea9 eip_open +EXPORT_SYMBOL drivers/net/8390p 0x3af9be35 eip_set_multicast_list +EXPORT_SYMBOL drivers/net/8390p 0x44ce51de eip_start_xmit +EXPORT_SYMBOL drivers/net/8390p 0x624796f3 eip_get_stats +EXPORT_SYMBOL drivers/net/8390p 0x74be18af eip_close +EXPORT_SYMBOL drivers/net/8390p 0x99978ef8 __alloc_eip_netdev +EXPORT_SYMBOL drivers/net/8390p 0xa1117d18 eip_netdev_ops +EXPORT_SYMBOL drivers/net/8390p 0xa82b850a NS8390p_init +EXPORT_SYMBOL drivers/net/8390p 0xab4d8c42 eip_poll +EXPORT_SYMBOL drivers/net/8390p 0xb663e226 eip_interrupt +EXPORT_SYMBOL drivers/net/8390p 0xfefe5a95 eip_tx_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x12993222 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x63662f29 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x680d5308 arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x68b50be2 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6b84d18b alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x75c42363 arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x909c064d arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb9772f1b arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd302adff arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xfe77027c arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x0af2f694 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xae61e613 com20020_found +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xffd69a5d com20020_check +EXPORT_SYMBOL drivers/net/bnx2 0x0b1a3af8 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0x830b42ab cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x194a7091 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1fb7765e t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3df809ba cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4625d720 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4b560888 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4d5c4c6e t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4e495727 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x60c7daeb cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x78f3a3a1 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7cd56f21 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x82707d21 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x85579317 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x940cd6e4 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd00f8f9d cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xdccad54c cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xde647f25 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x2680c9ad hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x2aabd293 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x86d1fa4f hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xc15bac5c hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xfd4795a1 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0d281d90 sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x22d0b654 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2e032928 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x597d2607 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5bd4d37d irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6adf1fb1 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x703363a5 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7376f70c sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xaa068656 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xbf3631aa sirdev_raw_read +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x122b1ef8 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0x1f07e797 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x50c1b6dd mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x7083265e generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0x9defc0e8 mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xc03fc286 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xd0e53e81 mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xdbf8de37 mii_check_link +EXPORT_SYMBOL drivers/net/pppox 0x7bb637bb pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x94b1e4e8 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf76ebdf9 register_pppox_proto +EXPORT_SYMBOL drivers/net/sungem_phy 0x3a63de08 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x6c423ec2 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x97f5dd38 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd8557fe9 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf12d4865 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xfe35dcfb tms380tr_open +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x1f0ec66d hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x2866b731 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7e4ee8f5 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7f3663fd hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8d065af4 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9c7f5f47 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa49742d0 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xb5d81eb2 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0xbed10bb0 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf7598ac2 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf851382f hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988 z8530_dead_port +EXPORT_SYMBOL drivers/net/wan/z85230 0x1c175809 z8530_sync_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x205dc6ec z8530_nop +EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6 z8530_interrupt +EXPORT_SYMBOL drivers/net/wan/z85230 0x2763a2ae z8530_queue_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x3624d1bc z8530_sync_dma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x366c6bbd z8530_init +EXPORT_SYMBOL drivers/net/wan/z85230 0x5938a8e4 z8530_channel_load +EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29 z8530_hdlc_kilostream +EXPORT_SYMBOL drivers/net/wan/z85230 0x601ef51c z8530_sync +EXPORT_SYMBOL drivers/net/wan/z85230 0x6cb0626c z8530_sync_dma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x71016f98 z8530_null_rx +EXPORT_SYMBOL drivers/net/wan/z85230 0x7f41c00b z8530_describe +EXPORT_SYMBOL drivers/net/wan/z85230 0x9395f0b5 z8530_shutdown +EXPORT_SYMBOL drivers/net/wan/z85230 0xa0762e46 z8530_sync_txdma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064 z8530_hdlc_kilostream_85230 +EXPORT_SYMBOL drivers/net/wan/z85230 0xfbea3bb9 z8530_sync_open +EXPORT_SYMBOL drivers/net/wan/z85230 0xfc1f6e08 z8530_sync_txdma_open +EXPORT_SYMBOL drivers/net/wireless/airo 0x4816d7fb reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x631c73db init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x76ead56e stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x26a40fcc ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x3d81345d ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x00c22a83 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x03b05c7c stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x29befb7c atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0633b196 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0d59f809 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0ee15f7e hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2792769b hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2ad7ab12 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2b107622 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2d0eee58 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x44e275aa hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x457a4500 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x47e5b56d hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4885e0f8 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5eae619c hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6607eaf7 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7286a733 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x86687081 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa0cad597 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9e14dd3 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaaa2641f hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xacc91ca9 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2576633 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbea3bf62 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc3037119 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd63500e9 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe7990bcf hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe95dd403 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1ecadd5f ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2155275c ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x35b1fbf1 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x487e269f ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5c97fd56 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x699d3d8b ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6b998cf9 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6fce8d5c ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x93ce993c ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9dea7d01 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xab1fe93b ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb2e01f39 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbb3a6892 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbee8dcd4 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcb268ceb free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xce178a81 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd5854b92 ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd673cc0f ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2d708c6 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf87ecd5d ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf9924c63 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x002c7560 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02125584 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a83a448 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d63c8d3 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1113994a iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1222d76f iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x16413069 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x178425db iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x17d3ebcf iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19411e57 iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1999bf6d iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b39621a iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b7568c7 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1eec9911 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20c75352 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x216d7d27 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21dd695d iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22d40488 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x231681eb iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2663b1a4 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x287896a7 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a5ec84b iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a935941 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b14b6ed iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2c4218a7 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2c5a4717 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cb63d7f iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3301c7ad iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34a60ea2 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x358e0c89 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x366f4cbd iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3904db16 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4255256b iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43409363 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44c5a718 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x45fd4dd4 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x461ff14c iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47d223ae iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48597444 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48e855bc iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49ce0b8f iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a2b9860 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a68c5c1 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4afb35fc iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f5f897d iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50b88c21 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51c17617 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5328f30e iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54d6048a iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54e09ed4 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54f415cc iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5536dea0 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5903bd47 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f638263 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6151418a iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6234690d iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x630b11a0 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x647a2b3e iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x64e21508 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67d84230 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6851243c iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6870cdf1 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69f1bf3c iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6a1edd33 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70eebe81 iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x716264fc iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x731495c2 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x732ebf2c iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x744e5177 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79cdc37a iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ae199a4 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b0c98e2 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x818f760f iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x81edc8e8 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x835294a0 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8781dc69 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8878ba6a iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x897ec892 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8abef9f4 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b161ef8 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c668d9b iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e2fe2c2 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8eb9cef9 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x935bc266 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x946dca41 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95ba01e4 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9bcae18d iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c2cb6b8 iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c89437c iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0360cf9 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0616cff iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1c1608e iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa327946c iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3301bab iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3d788a7 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa90a07d0 iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa9ac21ef iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaceeecbd iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaed0a944 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb71f63bd iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbaa6f249 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbff60732 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc5c3bdf4 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7d88902 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc99432c8 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca729a37 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcfa1b0b4 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd20a413a iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4b4f962 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd76fa2c5 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd80a446d iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd95489ab iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda3b263f iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda672480 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdaa75c67 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc915b82 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd39c01c iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf6ce870 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1b2aa9b iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7c4289b iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8a55899 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8ad50cf iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe969f87f iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea90219a iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeaa00059 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebbe2f36 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefd2965d iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefe0ffda iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeffc1ada iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf043e30c iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf08ceb9c iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0c1b3dc iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1dc951d iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf58f30ef iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6107574 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf7f9238d iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb619a62 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd43c8be iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff1c034d iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4e9e979d __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa31c363e alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xb011ebf1 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd618d305 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe86640af __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x0c51611e parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x216e1c83 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x278b9050 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x28894abc parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x28d0d320 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x3025adb9 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x3cec1c7b parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x4c0a52fa parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4d67cf23 parport_write +EXPORT_SYMBOL drivers/parport/parport 0x4d9a1150 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x60d85a4c parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x6458ae4e parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x7891cd34 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x792f319e parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x84005d84 parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x8d88c4d1 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa7d16cf7 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xa7f93fb1 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xb2798d08 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0xb8f46ab6 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0xc2216700 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xc92b2715 parport_release +EXPORT_SYMBOL drivers/parport/parport 0xcf5040dc parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xd145b721 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xd61da85b parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xe18bbe7b parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xe2bfaaf8 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0xe7e1f941 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0xeda93818 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xf4ba58e9 parport_read +EXPORT_SYMBOL drivers/parport/parport_pc 0x1de1051e parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x67cca1a1 parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x544b6955 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5e21e36f pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x64e9f3e4 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x66ee2e09 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6dbeab60 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7370e68e pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7cfc293a pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x86b8a3d5 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x94772f88 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x950e8cdd pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xae34c8c2 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb24170d0 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb996ca19 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcc986f2a pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0869335 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x01b3978b pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x08832292 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f12972b pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x29cca1d8 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2aafeccc pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3ef8f651 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x41313e0e pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4337b545 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x45de1a10 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x49178f5b pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4c57b7a4 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4e32cd67 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x585737b2 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x585c4ed3 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x59d7adc7 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6a86db0d pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6acceee5 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6dd8a2c6 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7173ca10 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa2068b21 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xab8e96fd pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbfb2cfac pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc34ac907 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc368f687 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7c16490 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xca8100f0 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xccd549a6 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcee45bd3 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xeb4174f5 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf0828121 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf12e5a21 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf19c985d destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf7839243 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x65bfcc32 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/pps/pps_core 0xfb57a712 pps_register_source +EXPORT_SYMBOL drivers/scsi/53c700 0x98944745 NCR_700_release +EXPORT_SYMBOL drivers/scsi/53c700 0xb43dcef9 NCR_700_detect +EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc NCR_700_intr +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x07c9cc07 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1d279df7 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3f996b98 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x9c13eee3 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbcb5fa24 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd1365491 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf3a804b3 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05fed645 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f04a196 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f4f85a2 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x126869ab fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x132e8bee fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x14648cac fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x192a13c7 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1b30788d fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x248e583a fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x29f47a58 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32d4be90 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x39e280bb fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x472196ed fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51066ca4 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51e720b6 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5a7e5126 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e3fd346 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6b8415ae fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6da6fcc4 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x769ab8b0 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76a03445 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76f143a1 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x87d4145e __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b76a964 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8dfb7a7b fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8f64e9e9 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x993292ba fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9b8850d6 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9eecb532 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb311f94f fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd342747e fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd3b521f8 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd766cca7 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd8a4f9bc fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc1cce44 fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdfd3ba51 fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf10317d5 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf303a9a7 fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf368faa5 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfc5d3231 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd21d77f fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x82e1b229 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0f90597e osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2270426d osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x361722f3 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x37ef6439 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x447609aa osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x54fca571 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x660608a4 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x69c5a375 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6c2f4e06 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7f18b179 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8221d9e0 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x91735cd5 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9926e244 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9e13aae6 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa8c9b529 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaaa3b896 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xafee8c8e osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb0b891fd osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6076e81 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6b088bd osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb962308d osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbc769e07 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbf07ffa8 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc05b2e25 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc400f0cc osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc8534d50 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc9d10a02 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd4bed302 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdea070e1 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5b972b4 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf1762c17 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf88d462d osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/osd 0x2d581b1d osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0x3347c936 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf24ce4ea osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1cd03d8f qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x40d170ce qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x47d1655e qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6916b668 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x74da9bf1 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xafd28402 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x44411248 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x6973f6df raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xbc953107 raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1429c744 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1bf8e1c4 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2d87e615 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6a58d62d fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8b62bdd2 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x922b50d0 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa361e8d1 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc289e95d fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd5e7f4d7 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xefe05f84 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfa548732 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfcd25231 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0325c2a7 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2067c78a sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x259eb432 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2b2ada56 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3ffc12a2 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x53a435a1 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5749e5fd sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6267ff81 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x64c34834 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7df2e096 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f5a7969 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x810d28b7 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x882846ee sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88ec2076 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88fbc19a sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9d7e6fd5 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xac22b17c scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb6459be8 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xba99478b sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbde72b6f scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcd8dda78 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd22fe9d1 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd3ae2402 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd9237534 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe74aa6f2 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xef8d5842 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x05b716f0 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3961a71f spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7e450ac5 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xe0a0d85c spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xfaac07ad spi_schedule_dv_device +EXPORT_SYMBOL drivers/ssb/ssb 0x021d6616 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x02eb5eea ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0791e841 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x1c5d0395 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x2603e834 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x2ec6bcb0 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x418f971e ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x483ec5ca ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x60af4e41 __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x62dfc907 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x9430862a ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xa2484faa ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xa65bb086 ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xd8025af4 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xd80cfeda ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xdb709fb8 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xebe3ef67 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0xf69cfa05 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xfbf4f642 ssb_device_is_enabled +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x02ceddaa comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1f45052f check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2a1c503d comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3abc74de comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4434abbd comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x54436a9b comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5a93f587 comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x64a65a47 comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6df090a4 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x97412e26 comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x98ed81a5 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x99be8c8a comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9d1aab75 comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa31991b9 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa59a36af comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe4398144 comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xef6d5511 comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x086ab627 subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x8737b02e subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xd0c68403 subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xfe9ebd7a subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x7dbda515 cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x8bd4ea86 cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xe8a9863f cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0a2203ec mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x27d1e3c1 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x3f3cb996 mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5b9c6223 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5ff8e65d mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x61d267e3 mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6984b2f4 mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x82f858c1 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x94a5ed63 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9a466c63 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb095a728 mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb74bbec8 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb960c380 mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc41164ce mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc4d87c26 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcee3c67 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdd6f541f mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe25fc9b6 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xf4027c14 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfc948d60 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x03e7a430 subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x3c90fbb3 subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x8a63d83e subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xaa0439d2 subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x58050564 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x160c00db go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x17007442 go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x8aadc34e go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x8f0470e8 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x9c986bc5 go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xca444344 go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xd1068580 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xf71f32fc go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xfbd485d0 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x85561a57 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x93b52521 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xccb0743b variax_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xdfcef1b2 pod_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0xf0426d1a me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0x6e9f4fe0 me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0x0ac9c7a3 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0xac90a9ab me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0x172baea6 me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x5f673333 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0xdb8755ab me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x4a7ce75b me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0xa93550f9 me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0xb9e919d4 medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0198eec3 ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0a8b52ee ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0aa08191 ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0f6d8444 ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x10ca9fcb ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x124165f0 ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x20fa6b44 alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x258a8a82 ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x29340740 ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2a8f69c4 ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2ce4f359 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3170f4e7 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x356946e1 ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3995c569 ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4d729915 Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4e2449d0 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x552a61e4 ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x5aeb6ec5 ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x5df2a015 IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6024ce81 ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x677b903b ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6864c34d ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x761d4361 ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x763c8373 ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x79194a7f free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7ce06cc1 ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7d5eb475 ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x86e205a0 ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8a6e310b SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8c373002 ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8dc0c495 ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8fcaba08 DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8feaf6d9 DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x967220db ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x98ee5ff0 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9f9f00f6 Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xac2f39bc ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xac5bbd13 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb3a5ce5e ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb66321c2 ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb6f89046 ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb77520dd Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb820ede3 ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xba38d192 ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbeff211a ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbfee5adf ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc0a0186f ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc17ddf43 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xca5d37cf ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcb80f0e3 ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xccf17369 ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd1b15be0 RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd38e8f12 ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd973a0b2 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xda3e2046 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe0707f22 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe5f0541c notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf1fc02dc ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf3bea823 HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf9770d6b ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x040e3c33 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x98f680a2 ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xa330a97c ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xe5378c3d ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xfb3b67e5 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0x9e9a5324 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x8c5a0766 phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xbfe947f9 phone_unregister_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x41ed5819 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x4dc59486 usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x6212bf55 net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x8259f950 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x376fadd2 usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xf71d12f6 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0xa3c944d9 lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xc4c96d92 lcd_device_register +EXPORT_SYMBOL drivers/video/console/bitblit 0x5bd060e2 fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0x0c2fe962 soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0xb175c02a fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x25b03250 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x4516e416 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0x737041f9 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0xb267da16 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/display/display 0xd232c3fd display_device_register +EXPORT_SYMBOL drivers/video/display/display 0xe5a33d86 display_device_unregister +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x3a3b9dd1 mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x11f3d597 g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x768d4140 matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xc8209e34 matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x066cce3e matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x0e2f28ef DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x93949175 matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xf3364615 DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x6ec5dce7 matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0xfbf9a56b matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x59250592 matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x5f88cdd8 matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x63cfa13f matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xa6d1b6d8 matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x69b699c5 matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x7c47d924 matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x4c346070 matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x4e262102 matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x88a197a8 matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x8aa72ba8 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xf0c8e975 matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/output 0x5833c224 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0x6dcd2786 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x12978e31 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x36c08a96 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x3e72fce5 svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x4ffb200b svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x5f848b8e svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8dd63798 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xfdddc477 svga_tileblit +EXPORT_SYMBOL drivers/video/syscopyarea 0x5b65513c sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x26ebc6dc sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0xc6823a7e sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x0663f4c1 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x945c248c w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x16f309f7 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x20ebac1b w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x3300be2f w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x63c41346 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x47383cb7 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0x56e11abb w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xae146550 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xfad051eb w1_unregister_family +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x0d60e463 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x25f5414f config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x4a11553e config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x89778b05 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8dabcfb6 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x910336d8 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xa71e816b config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xcd26529c configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xd8803704 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xea9e5fcd config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xec6e0db3 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xfca89c17 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x016df9c0 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x0631ec54 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x1542419f __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x24efb226 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x281a8137 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3d0d52a7 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4ae501ae fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0x4db881f9 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x5648ee5a fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x59d90558 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x7b524ed7 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7d0f15cd fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x80d2ef96 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8b53401f __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0xa6cb604c __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xad3e0d0b __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xaea59026 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbfbb528d __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xd4f40d36 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0xd8b17eeb fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xd8ca998f fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xea611fa8 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xee46a8b3 __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xf4b6a380 __fscache_update_cookie +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x1315b1a1 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x40aef856 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4f21fbe5 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x665f27a7 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x9e298c54 qtree_delete_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x6953cd52 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0x6a153df1 make_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0088f167 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x095d63f4 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x0caf27eb p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x24436e8f p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x27ce4418 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x3455711e p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3522cea6 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x475781e1 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x59c3a9e6 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x5fb1bfc5 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x62dff847 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x68452371 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x6981da42 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x6f06b9ee p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x8618825c p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x96314cce p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xaab8671a p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0xad4a6e1b p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xaeb2e11c v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0xbb946667 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xcae61af3 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xce472bc1 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xef7127b0 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0xf11b003c v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0xf79428d4 p9_client_open +EXPORT_SYMBOL net/appletalk/appletalk 0x0c3e983b atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x534129dd alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0xa3066b35 atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0xe8abf61a aarp_send_ddp +EXPORT_SYMBOL net/atm/atm 0x0f61f9e8 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x3a05aeb9 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x4bff8b7b vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x77223cd9 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x7da34cca atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x882d0519 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8a446fd4 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xb79a991b atm_charge +EXPORT_SYMBOL net/atm/atm 0xe2698803 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0xe36a6ff7 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0xefc864d6 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x46eb82ba ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0x52af6d15 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x67c30429 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0x855daf07 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x8eb8aec9 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xcf9d0fb6 ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xd526ded6 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0xf7337975 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xfadcafaa ax25_listen_register +EXPORT_SYMBOL net/bridge/bridge 0x8bd04f9d br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x39c5f5c2 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x56d3b41d ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x5bdd5ad8 ebt_unregister_table +EXPORT_SYMBOL net/can/can 0x0b1318f6 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x1c661c48 can_send +EXPORT_SYMBOL net/can/can 0x7c76a5b4 can_rx_register +EXPORT_SYMBOL net/can/can 0x8a07dac6 can_proto_register +EXPORT_SYMBOL net/can/can 0xba1b9047 can_rx_unregister +EXPORT_SYMBOL net/ieee802154/nl802154 0x044ee8f7 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x47011cf7 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x92eea241 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x9ef40556 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xa213f8fe ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xd7db2f08 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x6e2fe339 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x7081655c arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb777416e arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0c26c583 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x8575c4ea ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc8dce1fe ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x47d73c2e nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x5d6791a4 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x5e3217f9 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x63b451b7 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ba42cba nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7c29d54d nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xe608869f nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/tunnel4 0x0d00d619 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0x2fe68e39 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x3060cab2 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6eec5e07 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x73e1ff25 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xea4271c0 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x68f1da91 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/tunnel6 0x6b414cff xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1ee3ffb7 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x24e7a340 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4eb9e6d9 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x5635f3e7 ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6d65ca87 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa3e86035 ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd881fc64 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd9157d8f ircomm_data_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x1b839f51 iriap_open +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3a14d361 irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0x3aef9d5b irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x581b4154 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x5e465929 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x67ced702 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x786d6c6c irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7965ec64 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x824d115a irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x920202c1 irttp_dup +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9c4920e1 irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xa234c7ee alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0xa6678144 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xa7116f93 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xa836ead7 iriap_close +EXPORT_SYMBOL net/irda/irda 0xac4e3ea6 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0xaf928505 irlap_close +EXPORT_SYMBOL net/irda/irda 0xb51fb7b2 proc_irda +EXPORT_SYMBOL net/irda/irda 0xb7dd82d6 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xc8948ae3 irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd9fe4345 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe053a2a3 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0xe0f86b40 irlap_open +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xeb0c648d async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0xec1976a5 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xeee8aac0 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xf39b7fe0 irda_setup_dma +EXPORT_SYMBOL net/lapb/lapb 0x03fc44d2 lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x16695bd8 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x1d12532b lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0x6326c779 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x66f99449 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x69be69c9 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0x6e1506d7 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0xe03bb25a lapb_setparms +EXPORT_SYMBOL net/mac80211/mac80211 0x05c66211 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x18481f9a ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x280e64e3 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x2cfecb81 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x2e9d1428 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x304cc6f2 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x3311a987 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x3a7a4a3f ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x3fff757d ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x475d80bc ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x507c8a4e wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x55b94ef4 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x583c8507 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0x5b556015 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x6c13ab7b ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0x7123f312 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x71b5ffce ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x75d9f44b ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x80bec60e ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x895fcb50 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x8c84dc97 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x8f58b920 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x993e97d6 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x9de6fea8 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xaac8a6e6 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xb603389d ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xcb61ee4e ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xcbb016fb ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0xd256b755 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xd3842efb ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xe2eb0177 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xe8f653cf ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xec1bdbe3 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xf2e6c49c ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf5112095 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0xfae24c6f ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xffa24375 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2826645d ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2bd37454 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x306bb7a0 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x3ecd0fa9 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4918917f unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x64887338 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6edd5600 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd1a7633f register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdbc1de7e ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe8f9a90c unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfd2e1f97 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x0830ad1f __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x45b1623e __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe1198923 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x1c56c6f0 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x3105a6a8 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x5fd2ca3e xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x6f6fc525 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x8889b2fc xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x9c81e441 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0xa5feb918 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0xbc0afe79 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xc9bb048c xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xf91d25b5 xt_register_match +EXPORT_SYMBOL net/phonet/phonet 0x0d331374 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x34d77c85 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x5722b7ea pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x5769ab09 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x82dd53b6 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x896bcc9d pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xa4cccc25 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0xfc35b383 pn_sock_hash +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x05d35e51 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2d4aea2c rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2db0d8cd rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3dd4baba rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3f834778 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f6ec86c rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x661fdcc5 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6cc1e151 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6da43f11 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa5c0bc23 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa9272993 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd4245e66 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdd57f807 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdf51633f rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfc18efe2 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/sunrpc/sunrpc 0xa958df97 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x2c925f12 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3c99fb66 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x5fffee95 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x80355758 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x8806916b tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x888ff718 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x963ecfbe tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xadb3594c tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xbd58929f tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xde3b4150 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe426a6e2 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x6f576dcd register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x09c61a79 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xa04c6e6e wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0c05a453 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x0c96e3a9 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x0e7e10f8 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x185a47e3 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1921f93f wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x1dfa7c33 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1f14b14f regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x272d6f99 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x27c0d4a0 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x397b9b81 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3fd3674a wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x4615b763 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5181be9b ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x58bee848 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x64084aea cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x6697b26e ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x69be2069 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x6a3d5956 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x6e9d542f cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x710603b3 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x7da59737 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x8a6ad5b2 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x902c55dc wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x91ac39a0 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x9e6c1b20 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xa25e7539 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0xa8b00368 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0xac08b026 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xbffa864e cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xee5234ee freq_reg_info +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a3fd1da lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x4871de03 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x4c63bb1e lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x68a46f1b lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6f996aef lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x7e6aebe3 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xad046d68 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xed5a0aed lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x762ef724 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xb4c78888 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x0ea4c01f snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5b8640fe snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5d604c63 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0x8ac31429 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x8d36af77 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xbe34edbc snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x6fb2fc24 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x00517bf3 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x00a0aae0 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x05dab7af snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x0779859f snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x07f7f05a snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x0cd5388c snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x0d6e9ac0 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x14f43d98 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1d81e30c snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x22410567 snd_card_register +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x24fb954e snd_cards +EXPORT_SYMBOL sound/core/snd 0x25dd7fa4 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x2641dcc7 snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x2e225199 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x2f8da8e1 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x3268ff9f snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x3564d1b6 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x43735a91 snd_device_free +EXPORT_SYMBOL sound/core/snd 0x45c3abf8 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x4a1db30d snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x6948ae13 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x6b8ca35b snd_device_new +EXPORT_SYMBOL sound/core/snd 0x6bea6451 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x6d59aa19 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x6de929a0 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x7039bee7 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x722b9ee4 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x77ff5638 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x90048091 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xa8b83d29 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xad9c9915 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0xb00d71a0 snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xb1ed1c36 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xbbc04b10 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0xbe4b4245 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0xc0e6c10a snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0xca432a59 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xd1157735 release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0xd11ae176 snd_card_free +EXPORT_SYMBOL sound/core/snd 0xd2d8fe1d snd_info_register +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe6994d7c snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xe711b89d snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0xf091b645 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xf7bbb5c7 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0xfd695bee snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xff8439e6 snd_jack_new +EXPORT_SYMBOL sound/core/snd-hwdep 0xcc5f03fd snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3562dd50 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x536388e3 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb7194f7d snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb8d82f9f snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xfb82c253 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x0e584f94 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x1078b1f1 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x1c22b363 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x20a4cde4 snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x20d675be snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x229c2f88 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x2bbcf827 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x2dcf72e9 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x2deb1541 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x31e36d85 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0x3430b982 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x356ea254 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3a4e7f59 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x4a0009b1 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4e5e49cc snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x501b7131 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x52b5014b snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x541dc164 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x5c5358d6 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x6124aedd snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0x61cd2cbf snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6c0e695a snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x6c9ba4f6 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x72c2d7e9 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x79d13cfc snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x7af6b300 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8adaacc6 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x91e156ea snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x97b3d673 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xaae64bfd snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0xb11e875a snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0xb356a60b snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xb83f91f8 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc75ce76b snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0xcb4c470a snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xda1c6d98 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xdbf92f50 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xe7da8db9 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0xef63dbad snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0483f689 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x05fae3a8 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x30c0068a snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x45e1cd22 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x462879de snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x48a7d468 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4936d77b snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x70268a0a snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0x893e1153 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0x92cacd36 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x96eed1a8 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa4f77001 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaa9440e4 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb2122e56 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd1e58ba4 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd9dabe0d snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xfc2884f3 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-timer 0x0ab1ce6c snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x1d27b33b snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x422dd86f snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x4d94e4bc snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x6910fe68 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0x6d251a90 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0x75fdea74 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x7d3cfca5 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x800325f9 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xc4039d84 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xcde8f265 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xd9457623 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0xdd76f56f snd_timer_resolution +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xa401583d snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0c547c20 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0e1317d4 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x295d953b snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x2f31f9a0 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x52dab979 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x5eb6868c snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x72dd7eff snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7c80a809 snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9006d0fc snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x03c73bc9 snd_opl4_read +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x17d1f069 snd_opl4_create +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x6d997be2 snd_opl4_write_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xaa6ecc81 snd_opl4_read_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xcbe54c46 snd_opl4_write +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x41bbc567 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x5500fba6 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6bdf1fbd snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7852429d snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7a54aa3d snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x90709cee snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb35d4a6d snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb46b59a9 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd5389faf snd_vx_dsp_load +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x224580a7 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x2bd63d6d snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x7340b36a snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9088d258 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa6d81855 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xc1d24a3e snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x1462f94a snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6e94e7e2 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe51ddf01 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xf250da87 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfbb38ae0 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xffa77327 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x55993d14 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa8437cee snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb0d902b3 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb6149a51 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x19fcf8ad snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2d18d50d snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x412a493a snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xbb1e7c0c snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0bf87dd5 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2b46bea1 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2d82cb38 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3a3d832e snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xfd1aaf65 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-i2c 0x16e345a7 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x43c5c916 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x6a142c62 snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xcd7e7c7d snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xfe4c195e snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xff32efa3 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x9dbdfe64 snd_tea6330t_detect +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0xcfbc323e snd_tea6330t_update_mixer +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x7c688968 snd_es1688_pcm +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x7e8e3c8e snd_es1688_create +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xd5bf3c49 snd_es1688_mixer +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xe8869b96 snd_es1688_mixer_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0348dd1d snd_gf1_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x05d4f969 snd_gf1_i_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x1f75d2b4 snd_gf1_translate_freq +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x21fbca7e snd_gf1_write16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2646dc51 snd_gf1_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x34b462f9 snd_gus_dram_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x36ce43e1 snd_gf1_dram_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x3b1b3bd1 snd_gf1_i_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67 snd_gf1_lvol_to_gvol_raw +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x479d6c16 snd_gf1_new_mixer +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4e707503 snd_gf1_i_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x57d77c10 snd_gus_use_dec +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5a409e0c snd_gf1_write_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x62ac4fe7 snd_gf1_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x725c915f snd_gf1_ctrl_stop +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x82a8f2fc snd_gf1_rawmidi_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x86e3eb56 snd_gus_use_inc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x89028a08 snd_gf1_stop_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5 snd_gus_interrupt +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x8d648f52 snd_gus_initialize +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x926a5f17 snd_gf1_mem_lock +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x97d3b2c3 snd_gus_dram_read +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9bd27021 snd_gf1_delay +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9c313e6d snd_gf1_mem_alloc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa504e230 snd_gf1_mem_xfree +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527 snd_gf1_atten_table +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc626b1dd snd_gf1_mem_free +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd078bd9b snd_gf1_free_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xda804951 snd_gf1_poke +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe3fc1807 snd_gf1_alloc_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe8ce0882 snd_gus_create +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xeb6d7070 snd_gf1_pcm_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf2d1a1e0 snd_gf1_peek +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x04b2406a snd_msndmix_setup +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3 snd_msnd_init_queue +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e665ea3 snd_msnd_upload_host +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x177de1b4 snd_msnd_pcm +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x23d0260a snd_msndmix_new +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x2af3491c snd_msnd_send_word +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x325f000d snd_msnd_send_dsp_cmd +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x33e2903b snd_msndmix_force_recsrc +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x569db9f5 snd_msnd_disable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x680b1e67 snd_msnd_enable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24 snd_msndmidi_input_read +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x76abb20a snd_msnd_DARQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xb8d5624a snd_msnd_DAPQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xcec8539b snd_msnd_dsp_halt +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0c60e8d4 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x1cadf31d snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3692f758 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3747dccc snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3a8428c3 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x4617fa67 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6962c55e snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6967fa4d snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6e5de2b8 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd45af4a0 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0x0ae87640 snd_sb_csp_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x13db112b snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x53ecde78 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x9b40b087 snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x3d0bb205 snd_sb8dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x461a9cc4 snd_sb8dsp_midi_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x64e82115 snd_sb8dsp_midi +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xfc80423b snd_sb8dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x3c52c32e snd_emu8000_update_equalizer +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x4459f97c snd_emu8000_load_reverb_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x52feaa5c snd_emu8000_poke +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x7084e8c4 snd_emu8000_load_chorus_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x93b4a97a snd_emu8000_init_fm +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9c9c9b6a snd_emu8000_dma_chan +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9e1b6ba7 snd_emu8000_peek +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xa20d88ac snd_emu8000_poke_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xb92abbae snd_emu8000_peek_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xc3a5a24b snd_emu8000_update_reverb_mode +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xcf388faa snd_emu8000_update_chorus_mode +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x058e0cef snd_wss_info_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x068e6fa5 snd_wss_get_pcm_ops +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x52c0bf3f snd_wss_overrange +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x58721cd6 snd_wss_mce_down +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5c276dd2 snd_cs4236_ext_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x67d9ead3 snd_cs4236_ext_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x72e7e532 snd_wss_put_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x73e61259 snd_wss_put_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x79d48eb3 snd_wss_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x7e1320d5 snd_wss_mce_up +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x825c800a snd_wss_mixer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x82a0f0d4 snd_wss_pcm +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x87623688 snd_wss_free +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x8d2bfb41 snd_wss_timer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xdf0861ae snd_wss_info_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe0a4fd59 snd_wss_create +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xec37f650 snd_wss_chip_id +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xecc1580e snd_wss_get_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xedc0af65 snd_wss_get_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5 snd_wss_interrupt +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf15862a8 snd_wss_in +EXPORT_SYMBOL sound/oss/ad1848 0x1c191b35 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x7b4226e8 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x61641749 probe_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xc1a9e6d0 attach_mpu401 +EXPORT_SYMBOL sound/oss/msnd 0x1186f48f msnd_fifo_read +EXPORT_SYMBOL sound/oss/msnd 0x234f64e0 msnd_register +EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf msnd_init_queue +EXPORT_SYMBOL sound/oss/msnd 0x54230dc1 msnd_fifo_write +EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb msnd_unregister +EXPORT_SYMBOL sound/oss/msnd 0x6587640b msnd_disable_irq +EXPORT_SYMBOL sound/oss/msnd 0x6601493b msnd_fifo_make_empty +EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b msnd_send_dsp_cmd +EXPORT_SYMBOL sound/oss/msnd 0x9274d677 msnd_fifo_free +EXPORT_SYMBOL sound/oss/msnd 0x95d37486 msnd_upload_host +EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420 msnd_send_word +EXPORT_SYMBOL sound/oss/msnd 0xade99e25 msnd_fifo_alloc +EXPORT_SYMBOL sound/oss/msnd 0xb3520772 msnd_fifo_init +EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb msnd_fifo_write_io +EXPORT_SYMBOL sound/oss/msnd 0xefdd1843 msnd_enable_irq +EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662 msnd_fifo_read_io +EXPORT_SYMBOL sound/oss/sb_lib 0x0071c0df probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x642d6eb8 sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x04553172 midi_devs +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x346f87aa sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x7fd7ef2b audio_devs +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa4b83d28 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xcbf99bb6 synth_devs +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd1ccdd50 sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0xd449d90a sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0x71c6fabd probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x00e68782 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x038f045e snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x048d901e snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1e52bde8 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5962cf7a snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5ed0f34a snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5fdd2b22 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6e56a75d snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8c75f220 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8cf38ba7 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9855405c snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc8e43ce8 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd983f0b1 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdb0ba738 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe4d4bd47 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf028df58 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf8c0556b snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0e304fd0 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0fe8ace8 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x23272086 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6623ab9f snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x70e78334 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7f5f0263 snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x80dae7d9 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8a14e3c9 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd16bdaed snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xebce9848 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x6163aca5 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xb6a81356 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xd180c425 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x06e07838 oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x15f5e827 oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1706ce23 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1aecc3b7 oxygen_pci_probe +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1e5e20ff oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x21f39af3 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x34b0690d oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3b81c23c oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3c7b85c7 oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x640ecebf oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x672f1ea0 oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x72fb7559 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7f1295ad oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8ed038b6 oxygen_write32_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xafd2f9ca oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbc3320c3 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbe060161 oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xcdf0b242 oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd33db6e3 oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd921b7e9 oxygen_reset_uart +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x60c0b668 snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xb3c4fa3f snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd3b5ddc1 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xe073df0a snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf89dea46 snd_trident_stop_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x42ffc53f uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x01a9381a register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x4984a46e register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x7ad3db4e register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x7f8d49be sound_class +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xd52684b1 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xe91cf009 register_sound_special +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x685516fe snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x6af59009 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xbab94d4b snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xc46acdd6 snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe23fb153 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xff037946 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/snd-util-mem 0x133af337 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x18f55f04 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x3f52ac3e snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xb8f2cecc __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd145cc99 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd2e30ee0 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd3f6c0a2 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xdc141c6b snd_util_memhdr_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xcfebd470 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2b6d45f9 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa9f11789 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xd3ac4010 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xdb6e113d dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xecc43ba2 dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xf67ca750 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x07a1ec3c lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x41e24a02 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x003edda2 tty_free_termios +EXPORT_SYMBOL vmlinux 0x00546468 put_io_context +EXPORT_SYMBOL vmlinux 0x005477ef take_over_console +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00837159 bdi_destroy +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00adce5f rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x00faf810 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x01056884 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x0116a76f acpi_is_video_device +EXPORT_SYMBOL vmlinux 0x01378270 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x0168965d vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x016c0e6f jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x0171a720 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x018f08f7 journal_destroy +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019aae11 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x019c2795 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0x01a3af0a flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01b49fd9 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x01bbccec register_framebuffer +EXPORT_SYMBOL vmlinux 0x01cc2b0b kmalloc_caches +EXPORT_SYMBOL vmlinux 0x01d0cc2e d_rehash +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01fa8894 unregister_qdisc +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x021d1351 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x0293a8fc netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a3a88c secpath_dup +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02abd38e scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02e39cc3 iget5_locked +EXPORT_SYMBOL vmlinux 0x02e5642b acpi_bus_start +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x0319acc2 mdio_bus_type +EXPORT_SYMBOL vmlinux 0x03330182 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x033a5acf md_register_thread +EXPORT_SYMBOL vmlinux 0x033c4756 generic_make_request +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0347d1b7 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x03677a50 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x0391f417 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x039ed9aa security_path_rmdir +EXPORT_SYMBOL vmlinux 0x03b666f9 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03d1bc27 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x03f394e5 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x03fb6811 __brelse +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x041de9f6 ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x0425c5ad blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0477048f have_submounts +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04979bc2 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x049ecb64 elv_rb_find +EXPORT_SYMBOL vmlinux 0x04a7795a file_remove_suid +EXPORT_SYMBOL vmlinux 0x04d51451 d_alloc_root +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x04e94342 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x04eeb868 blk_insert_request +EXPORT_SYMBOL vmlinux 0x04f60304 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x04fcbd05 ilookup5 +EXPORT_SYMBOL vmlinux 0x0521a78d xfrm_state_update +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x05670a87 kernel_connect +EXPORT_SYMBOL vmlinux 0x05756cdd phy_detach +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x0593c42d nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x05bd1cf9 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x05e137d0 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x05f2c463 neigh_destroy +EXPORT_SYMBOL vmlinux 0x060c0339 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x065efc4c blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x066405fc get_phy_device +EXPORT_SYMBOL vmlinux 0x06730e08 misc_deregister +EXPORT_SYMBOL vmlinux 0x06797e9e sk_alloc +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x068c2f52 invalidate_partition +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06fbb743 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0715015d sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x071b4fd6 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x07608604 acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x07772a9b llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d50a24 csum_partial +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07e25398 pci_get_device +EXPORT_SYMBOL vmlinux 0x07eef101 kthread_stop +EXPORT_SYMBOL vmlinux 0x080102fb request_key +EXPORT_SYMBOL vmlinux 0x082489bc skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x0827f182 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x08288c4e pci_release_region +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0830be96 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x0865d795 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x0884e25d vfs_read +EXPORT_SYMBOL vmlinux 0x088b44b9 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x08c4dd50 skb_under_panic +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08d80dab unload_nls +EXPORT_SYMBOL vmlinux 0x09154fe8 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x09404530 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x09466273 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x095d831a pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x095f70ae generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x098389fc journal_release_buffer +EXPORT_SYMBOL vmlinux 0x0983d1f8 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x09862b0e neigh_for_each +EXPORT_SYMBOL vmlinux 0x0988fe4c xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x098cdf33 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0x099329d9 del_gendisk +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09f5a18d netlink_unicast +EXPORT_SYMBOL vmlinux 0x09ffdbdd gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x0a1a7cb1 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x0a1dc218 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x0a1e87f9 atomic64_add_negative +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a4f36e1 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x0a77057e splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x0a8da223 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x0aae39e9 security_inode_permission +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0ae68107 alloc_file +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b3ef348 ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x0b44b7eb nla_put +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b89c573 dm_table_put +EXPORT_SYMBOL vmlinux 0x0ba0c43a uart_update_timeout +EXPORT_SYMBOL vmlinux 0x0ba61dcd km_query +EXPORT_SYMBOL vmlinux 0x0bee17be tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x0bf2c7a1 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x0bf6b704 generic_getxattr +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c798fad complete_request_key +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0cacfcbd xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cc49614 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x0cde6759 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x0d01ce16 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x0d151c8e aio_complete +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d391a2b nlmsg_notify +EXPORT_SYMBOL vmlinux 0x0d39e3ca tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d4b77b7 gen_pool_add +EXPORT_SYMBOL vmlinux 0x0d4d68f9 mca_device_transform_ioport +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d56af8a kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x0d6c963c copy_from_user +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dd6da20 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x0dfb735a lookup_hash +EXPORT_SYMBOL vmlinux 0x0e203fe9 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x0e513e33 hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e6b7633 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x0eaaae2f tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x0ec71fb0 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x0ed0d4dc mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x0eeffd20 rtnl_notify +EXPORT_SYMBOL vmlinux 0x0f081a65 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x0f11d5de vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f29799a tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x0f2a3e35 unregister_netdev +EXPORT_SYMBOL vmlinux 0x0f3aa1b0 fb_set_var +EXPORT_SYMBOL vmlinux 0x0f6cb8ce dm_io +EXPORT_SYMBOL vmlinux 0x0f7253e5 clear_inode +EXPORT_SYMBOL vmlinux 0x0f830c45 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x0fcdbd68 tty_devnum +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff18724 rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x0ffff6ce xrlim_allow +EXPORT_SYMBOL vmlinux 0x1017d128 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x10272d74 vc_resize +EXPORT_SYMBOL vmlinux 0x1055942f ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x105745ec skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x107ff0f8 skb_make_writable +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10969c87 hci_get_route +EXPORT_SYMBOL vmlinux 0x109a8e3a make_bad_inode +EXPORT_SYMBOL vmlinux 0x10ad9476 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x10b0e522 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x10edcd71 simple_write_begin +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x110e129a dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x1152df72 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x117e4688 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11abde61 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x11d9c2ce copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x11dbe4f0 generic_file_open +EXPORT_SYMBOL vmlinux 0x11f60917 serio_unregister_port +EXPORT_SYMBOL vmlinux 0x120507ac idr_get_new +EXPORT_SYMBOL vmlinux 0x1206e8ed default_llseek +EXPORT_SYMBOL vmlinux 0x122bfee4 skb_checksum +EXPORT_SYMBOL vmlinux 0x1234c198 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x124733d3 arp_send +EXPORT_SYMBOL vmlinux 0x12810b6c journal_extend +EXPORT_SYMBOL vmlinux 0x12865495 bio_endio +EXPORT_SYMBOL vmlinux 0x1288b4c3 skb_dequeue +EXPORT_SYMBOL vmlinux 0x12b08709 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x12c14234 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x131c7acc d_lookup +EXPORT_SYMBOL vmlinux 0x1327a8c2 scsi_unregister +EXPORT_SYMBOL vmlinux 0x1337b66e vfs_link +EXPORT_SYMBOL vmlinux 0x133951df audit_log_start +EXPORT_SYMBOL vmlinux 0x135b83dc thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x13ae56a2 current_fs_time +EXPORT_SYMBOL vmlinux 0x13cf716e udp_proc_register +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x1436deb6 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x143e6617 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x14641f8a bt_sock_poll +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14f332ea up_read +EXPORT_SYMBOL vmlinux 0x15071b69 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1546c7c7 __devm_request_region +EXPORT_SYMBOL vmlinux 0x15475a6f pci_disable_msix +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x155d35a1 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x15698595 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0x15c0f89f input_unregister_device +EXPORT_SYMBOL vmlinux 0x15eefcde replace_mount_options +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x160c0865 netlink_ack +EXPORT_SYMBOL vmlinux 0x162b7f87 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x162decc8 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x165f83f8 scsi_print_result +EXPORT_SYMBOL vmlinux 0x16713dba mca_unregister_driver +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x16908523 netif_device_attach +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16a501a4 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0x16c7602a dquot_release +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x1729c921 end_page_writeback +EXPORT_SYMBOL vmlinux 0x172f75b7 may_umount +EXPORT_SYMBOL vmlinux 0x174f9f14 skb_copy_bits +EXPORT_SYMBOL vmlinux 0x176b5e8f tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x1778c74b elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x178bee85 follow_pfn +EXPORT_SYMBOL vmlinux 0x179634f5 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x17aa4b08 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x17b14a07 mmc_add_host +EXPORT_SYMBOL vmlinux 0x17b39de5 acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x17cec8a8 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17f9832f km_state_expired +EXPORT_SYMBOL vmlinux 0x1817b47b bdput +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1845e7c5 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x18569e7d ip_fragment +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x187fea42 acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0x188fb3a6 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x18b47817 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x190def77 scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x192ca479 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x192d1ac4 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x19704dda per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x19724b32 pnp_register_driver +EXPORT_SYMBOL vmlinux 0x1980d082 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x19d86b8b misc_register +EXPORT_SYMBOL vmlinux 0x19ee1aad tty_port_init +EXPORT_SYMBOL vmlinux 0x19fe3aa6 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x1a1244e9 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x1a334cfe dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x1a359cb4 page_address +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a5fd02f bio_map_kern +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1aa03c7e security_path_mknod +EXPORT_SYMBOL vmlinux 0x1ab5da69 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x1ac9b1b7 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0f71fb alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x1b4f4b5f generic_setlease +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b7898b6 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b8e639f elv_add_request +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1ba3fbcf backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x1ba6aa79 sock_wfree +EXPORT_SYMBOL vmlinux 0x1bc86e86 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x1bdf80a8 tcp_parse_options +EXPORT_SYMBOL vmlinux 0x1bf01bbb bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x1c0821da blkdev_get +EXPORT_SYMBOL vmlinux 0x1c2994d7 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x1c348052 mb_cache_create +EXPORT_SYMBOL vmlinux 0x1c5f42ae rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x1c764f60 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x1c7fd085 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c9a2547 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x1c9ba8af dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x1cbf8fac balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cdd0884 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x1ce3cfca inet_shutdown +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1cf9b6f0 key_put +EXPORT_SYMBOL vmlinux 0x1d046201 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x1d0c2017 pipe_lock +EXPORT_SYMBOL vmlinux 0x1d224ee3 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30b70c rwsem_wake +EXPORT_SYMBOL vmlinux 0x1d8c3d76 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1ded8052 dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0x1df06afd read_cache_page +EXPORT_SYMBOL vmlinux 0x1e2600c7 wake_up_process +EXPORT_SYMBOL vmlinux 0x1e2a9d52 mpage_readpages +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e911639 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x1eb392e8 pnp_get_resource +EXPORT_SYMBOL vmlinux 0x1ec52f47 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1ed34ea8 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x1eded21d path_put +EXPORT_SYMBOL vmlinux 0x1ef0228c tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f0c9295 set_irq_chip +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f2f76e0 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x1f346b9b try_to_release_page +EXPORT_SYMBOL vmlinux 0x1f37cb7d devm_free_irq +EXPORT_SYMBOL vmlinux 0x1f3a3977 __blk_end_request +EXPORT_SYMBOL vmlinux 0x1f3a9c9d fd_install +EXPORT_SYMBOL vmlinux 0x1f624625 dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x1fc5de75 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x201c445d kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x209784d7 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x209d678f devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x20ad5418 mpage_writepage +EXPORT_SYMBOL vmlinux 0x20b1fc86 kill_fasync +EXPORT_SYMBOL vmlinux 0x20b3a273 hci_unregister_proto +EXPORT_SYMBOL vmlinux 0x20b44578 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x20f22a88 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x20f4cd5b phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x211d5aa9 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x2130f9c2 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0x21322824 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2189fc0b journal_get_write_access +EXPORT_SYMBOL vmlinux 0x21969f72 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x21ac11e6 inet_bind +EXPORT_SYMBOL vmlinux 0x21c852b8 uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21dd80a9 __nla_reserve +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21fccf96 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x222ab322 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2248e597 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x224972be i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x224adc56 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x2254c4b0 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x225e074c security_path_symlink +EXPORT_SYMBOL vmlinux 0x2264dc34 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x228d9888 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x22905f4c tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x229ddab8 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x22a0a2a6 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22bcfcdb __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x22cc6bef dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x22d6fc97 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x22e009c1 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x22f25842 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x23168959 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x231fa439 scsi_remove_host +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2326a9f6 follow_up +EXPORT_SYMBOL vmlinux 0x237cd16f fasync_helper +EXPORT_SYMBOL vmlinux 0x23c27473 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x23c3c3d1 pnp_release_card_device +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x24032a0e sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x24042f08 hci_conn_security +EXPORT_SYMBOL vmlinux 0x24100fd0 vfs_write +EXPORT_SYMBOL vmlinux 0x2413b469 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x243636a5 acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0x243dc418 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x243ffddc idr_destroy +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x244d556f blk_remove_plug +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x246b4421 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x24766316 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x249290ef textsearch_prepare +EXPORT_SYMBOL vmlinux 0x24989ce3 tty_mutex +EXPORT_SYMBOL vmlinux 0x2498ffb1 prepare_creds +EXPORT_SYMBOL vmlinux 0x24acef04 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x24aefe71 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x24b5b57d scsi_remove_device +EXPORT_SYMBOL vmlinux 0x24e32466 mdiobus_write +EXPORT_SYMBOL vmlinux 0x24e86c06 acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0x24e9b2b5 sock_i_uid +EXPORT_SYMBOL vmlinux 0x24ed7ac5 load_nls_default +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x250701f4 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x252d3f73 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x253752fc mca_device_claimed +EXPORT_SYMBOL vmlinux 0x253ba7ae pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x2545c311 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x256553a0 set_security_override +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x2598039e neigh_connected_output +EXPORT_SYMBOL vmlinux 0x259bd8a3 pnp_find_dev +EXPORT_SYMBOL vmlinux 0x25a98df1 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x25b16c07 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x25bd3508 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x25cba924 pnp_find_card +EXPORT_SYMBOL vmlinux 0x25d3e2a3 atomic64_dec_return +EXPORT_SYMBOL vmlinux 0x26000d19 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x2652d919 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x266dea15 check_disk_change +EXPORT_SYMBOL vmlinux 0x267c10f7 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x268cc6a2 sys_close +EXPORT_SYMBOL vmlinux 0x26a80629 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x26beaeba cfb_imageblit +EXPORT_SYMBOL vmlinux 0x26cf5b8a unregister_nls +EXPORT_SYMBOL vmlinux 0x26d1650a simple_set_mnt +EXPORT_SYMBOL vmlinux 0x26d774f3 d_instantiate +EXPORT_SYMBOL vmlinux 0x26e03fef force_sig +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26ee07f7 pci_request_region +EXPORT_SYMBOL vmlinux 0x26f82228 scsi_device_resume +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x27169217 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x27258994 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x2744535b mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x2758aed7 blk_fetch_request +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27e17763 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x27e4860a pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x28299a4f tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x28491790 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x284ed930 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28a5a9aa proc_symlink +EXPORT_SYMBOL vmlinux 0x28b715a6 isapnp_cfg_end +EXPORT_SYMBOL vmlinux 0x28bc7715 tty_register_driver +EXPORT_SYMBOL vmlinux 0x28c307d2 scsi_ioctl +EXPORT_SYMBOL vmlinux 0x28c83b6d xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x294d051f get_sb_ns +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29625e53 dma_release_from_coherent +EXPORT_SYMBOL vmlinux 0x2976f3d9 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x29a7eef4 seq_putc +EXPORT_SYMBOL vmlinux 0x29b1c366 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x29b64419 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a07feca pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x2a0c7e23 neigh_compat_output +EXPORT_SYMBOL vmlinux 0x2a0e5b2d xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a647382 scsi_device_put +EXPORT_SYMBOL vmlinux 0x2a6778c1 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x2a678304 dma_async_device_register +EXPORT_SYMBOL vmlinux 0x2a6cb8a4 sk_wait_data +EXPORT_SYMBOL vmlinux 0x2a7c8edc skb_insert +EXPORT_SYMBOL vmlinux 0x2a8fc70b skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x2a9d0bc8 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2ab309bd netif_napi_add +EXPORT_SYMBOL vmlinux 0x2adf7c26 request_firmware +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b4b0c12 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x2b57d754 set_create_files_as +EXPORT_SYMBOL vmlinux 0x2b8a44ca unlock_new_inode +EXPORT_SYMBOL vmlinux 0x2b9c334e sk_run_filter +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2baa963f kernel_listen +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bb6b67f ndisc_send_rs +EXPORT_SYMBOL vmlinux 0x2bc95bd4 memset +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c2478b7 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x2c34b57c con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2c7d9f34 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x2c82b39a inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x2c85f7d4 mmc_detect_change +EXPORT_SYMBOL vmlinux 0x2c8a2069 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x2c8f5989 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0x2c9874fe ida_remove +EXPORT_SYMBOL vmlinux 0x2d066aae single_release +EXPORT_SYMBOL vmlinux 0x2d37342e cpu_online_mask +EXPORT_SYMBOL vmlinux 0x2d384611 simple_empty +EXPORT_SYMBOL vmlinux 0x2d3ddd2b serio_close +EXPORT_SYMBOL vmlinux 0x2d478f06 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2d8e8ffa sk_filter +EXPORT_SYMBOL vmlinux 0x2d92afe1 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x2d9721d6 journal_stop +EXPORT_SYMBOL vmlinux 0x2dabb2c7 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e32b293 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x2e3aa342 page_readlink +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e522055 set_disk_ro +EXPORT_SYMBOL vmlinux 0x2e60bace memcpy +EXPORT_SYMBOL vmlinux 0x2e638265 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x2e966641 fb_show_logo +EXPORT_SYMBOL vmlinux 0x2e97859f rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x2eb90735 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ec7c7ba install_exec_creds +EXPORT_SYMBOL vmlinux 0x2ee17b5f bio_alloc +EXPORT_SYMBOL vmlinux 0x2eed1c2e blk_start_request +EXPORT_SYMBOL vmlinux 0x2efe5e09 atomic64_xchg +EXPORT_SYMBOL vmlinux 0x2f181c14 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x2f287f0d copy_to_user +EXPORT_SYMBOL vmlinux 0x2f2be3c1 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x2f3915f3 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x2f629419 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x2f6b2414 inet_addr_type +EXPORT_SYMBOL vmlinux 0x2fb9072c tcp_ioctl +EXPORT_SYMBOL vmlinux 0x2fc6750f xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x2fc7295a bio_map_user +EXPORT_SYMBOL vmlinux 0x2fd6cbce path_get +EXPORT_SYMBOL vmlinux 0x2fef2c1e nf_log_unregister +EXPORT_SYMBOL vmlinux 0x2ff6f84c fb_get_mode +EXPORT_SYMBOL vmlinux 0x3007e6ba get_disk +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x3023f951 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x30292562 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x30755640 input_close_device +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30b3ded7 module_refcount +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30f6ad57 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x30f6ff28 pci_get_slot +EXPORT_SYMBOL vmlinux 0x30fcca46 simple_write_end +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x31199cc2 blk_rq_init +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x314bcd1e task_nice +EXPORT_SYMBOL vmlinux 0x3157e24d dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x3195b193 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x319e6ab1 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x31a75365 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x31ac9acd vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x31e2743c mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31f1fb68 block_write_end +EXPORT_SYMBOL vmlinux 0x324f1e97 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x32ca1866 blk_make_request +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x3303b773 bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x330b3e43 ndisc_send_skb +EXPORT_SYMBOL vmlinux 0x3315f396 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x33183084 tcf_register_action +EXPORT_SYMBOL vmlinux 0x332191d3 dquot_free_space +EXPORT_SYMBOL vmlinux 0x335441b2 get_sb_single +EXPORT_SYMBOL vmlinux 0x33c4a2d5 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x33ed3aad fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x33f04c02 unregister_key_type +EXPORT_SYMBOL vmlinux 0x342bf924 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x342f60fe apm_info +EXPORT_SYMBOL vmlinux 0x34359369 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x3443f10d tcp_check_req +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x345a87cb bd_claim +EXPORT_SYMBOL vmlinux 0x345ad787 set_pages_uc +EXPORT_SYMBOL vmlinux 0x34736893 dget_locked +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a5fc11 inet_frag_find +EXPORT_SYMBOL vmlinux 0x34bc7a85 mca_device_read_stored_pos +EXPORT_SYMBOL vmlinux 0x34ce5169 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x34e5dca6 key_unlink +EXPORT_SYMBOL vmlinux 0x34e845e4 scsi_device_get +EXPORT_SYMBOL vmlinux 0x352667c7 skb_recycle_check +EXPORT_SYMBOL vmlinux 0x352c73df neigh_update +EXPORT_SYMBOL vmlinux 0x35315cb8 input_inject_event +EXPORT_SYMBOL vmlinux 0x3540d507 init_buffer +EXPORT_SYMBOL vmlinux 0x35552372 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x35619c6a i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x356f1f80 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x35715a5a pci_write_vpd +EXPORT_SYMBOL vmlinux 0x359cafda ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x359d8b5d sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x359d9844 scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x35bbc403 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x35bdbbcb key_revoke +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35f0faa2 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x362b6b89 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x363f3d37 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x3653081a __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x3666aef4 netif_device_detach +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36d97d4e pnp_device_detach +EXPORT_SYMBOL vmlinux 0x36fdc122 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x36fe7633 register_8022_client +EXPORT_SYMBOL vmlinux 0x370e4def xfrm_lookup +EXPORT_SYMBOL vmlinux 0x372f24b0 mpage_writepages +EXPORT_SYMBOL vmlinux 0x374109b6 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x375418e5 register_netdev +EXPORT_SYMBOL vmlinux 0x375553a1 send_sig_info +EXPORT_SYMBOL vmlinux 0x37566493 security_inode_init_security +EXPORT_SYMBOL vmlinux 0x379d65f5 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x37ad7210 lookup_bdev +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37cbf2ed pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37f53bc2 thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x38203ca1 __init_rwsem +EXPORT_SYMBOL vmlinux 0x3828febd journal_set_features +EXPORT_SYMBOL vmlinux 0x3838d1a3 scsi_finish_command +EXPORT_SYMBOL vmlinux 0x385eefa0 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x388fafcd call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x3892cf63 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cfdda0 dma_find_channel +EXPORT_SYMBOL vmlinux 0x38d7d0dd fsync_bdev +EXPORT_SYMBOL vmlinux 0x38e74df1 llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x38e9a815 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x38f42c30 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x39087ffa set_trace_device +EXPORT_SYMBOL vmlinux 0x3911b901 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x3924293d fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x395811bf scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x399558d4 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x39a2d92a mdiobus_register +EXPORT_SYMBOL vmlinux 0x39c089df simple_readpage +EXPORT_SYMBOL vmlinux 0x39c6a0f2 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x39cae1b6 is_container_init +EXPORT_SYMBOL vmlinux 0x39f51279 pcim_iomap +EXPORT_SYMBOL vmlinux 0x3a0f8717 framebuffer_release +EXPORT_SYMBOL vmlinux 0x3a1f4341 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a220563 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x3a5cdde7 phy_attach +EXPORT_SYMBOL vmlinux 0x3a6daef4 tty_throttle +EXPORT_SYMBOL vmlinux 0x3a734b75 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x3a968d3f ilookup +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3ab9c8fc skb_find_text +EXPORT_SYMBOL vmlinux 0x3ad9981d pci_remove_bus +EXPORT_SYMBOL vmlinux 0x3adc15b9 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x3ae6fb59 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af5b077 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x3af98f9e ioremap_nocache +EXPORT_SYMBOL vmlinux 0x3b0fbff0 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b52f9fa xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0x3b73665c dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x3b820abe dma_alloc_from_coherent +EXPORT_SYMBOL vmlinux 0x3b9a3596 skb_queue_purge +EXPORT_SYMBOL vmlinux 0x3b9dc86b dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x3ba9bf24 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x3bae5d93 locks_init_lock +EXPORT_SYMBOL vmlinux 0x3baef7a0 llc_sap_open +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bc3ceae jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3be42e6d scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x3c070139 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c35d8e2 phy_register_fixup +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c7555ef devm_iounmap +EXPORT_SYMBOL vmlinux 0x3c814849 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca61173 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cee14fa arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x3d3cb840 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x3d46be0a register_chrdev +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d6e05f7 block_prepare_write +EXPORT_SYMBOL vmlinux 0x3d8acde8 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0x3d8e7ebe phy_connect +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3dcefbde bio_copy_user +EXPORT_SYMBOL vmlinux 0x3ddec910 give_up_console +EXPORT_SYMBOL vmlinux 0x3ddf74ea __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x3de45f1c __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x3dfdeecf __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x3dff49ab i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x3e040125 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x3e1000d2 i2c_master_send +EXPORT_SYMBOL vmlinux 0x3e130e22 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e5402b5 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x3e764735 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x3e8fb1f9 single_open +EXPORT_SYMBOL vmlinux 0x3e99e63e tcf_hash_search +EXPORT_SYMBOL vmlinux 0x3e9b8240 ppp_channel_index +EXPORT_SYMBOL vmlinux 0x3ebd5cf9 sock_no_accept +EXPORT_SYMBOL vmlinux 0x3ec17d68 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3eca3b21 __break_lease +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3edfdae0 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f0f4da8 fb_set_cmap +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f39b162 up_write +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5148ba genl_register_ops +EXPORT_SYMBOL vmlinux 0x3f751c02 pci_dev_driver +EXPORT_SYMBOL vmlinux 0x3fadf1ae sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x3fae99c6 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x3fb15e41 ip_route_input +EXPORT_SYMBOL vmlinux 0x3fb4ef92 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x3fda90ec udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x3fe5a426 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0x3fe61841 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x3feb2032 register_console +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x3ff8f788 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x402820ea md_integrity_register +EXPORT_SYMBOL vmlinux 0x40471a3d pnp_possible_config +EXPORT_SYMBOL vmlinux 0x4057f652 hci_register_proto +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40acaed8 sock_wake_async +EXPORT_SYMBOL vmlinux 0x40be1da6 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x40f1bca7 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x4153a5c1 pci_bus_type +EXPORT_SYMBOL vmlinux 0x4166a122 request_key_async +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4178434b filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41b562dc deny_write_access +EXPORT_SYMBOL vmlinux 0x41ee669b filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x420a681a __put_cred +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x4222729d xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x42711df2 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x4271d3ce ip_route_output_key +EXPORT_SYMBOL vmlinux 0x427ec39a jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x4292364c schedule +EXPORT_SYMBOL vmlinux 0x4297b042 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x42a4168f request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x42c0efad generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4324ef16 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43341a9b fb_set_suspend +EXPORT_SYMBOL vmlinux 0x43357d07 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x433897dc scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x436ca504 input_register_device +EXPORT_SYMBOL vmlinux 0x4375de3d dev_get_by_name +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43d8d0f1 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0x43ea4296 bio_add_page +EXPORT_SYMBOL vmlinux 0x43ef1f2f kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x441abbae dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x442c05cc page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x4467060d unregister_filesystem +EXPORT_SYMBOL vmlinux 0x4475364c wireless_spy_update +EXPORT_SYMBOL vmlinux 0x44a73712 journal_errno +EXPORT_SYMBOL vmlinux 0x44a9ee48 skb_clone +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b180ce vfs_mknod +EXPORT_SYMBOL vmlinux 0x44b51de2 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44d8cb53 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x44df963f page_put_link +EXPORT_SYMBOL vmlinux 0x44e8f6b7 serio_reconnect +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44f21bea idr_for_each +EXPORT_SYMBOL vmlinux 0x44f5277f rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x450913fd lro_receive_frags +EXPORT_SYMBOL vmlinux 0x4511bf1d pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x454a667c unregister_netdevice +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x455ae992 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x4597d2e2 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x459b1132 __scsi_put_command +EXPORT_SYMBOL vmlinux 0x459b4dc2 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x459ef908 kill_pid +EXPORT_SYMBOL vmlinux 0x45b77746 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45dcb3d7 input_free_device +EXPORT_SYMBOL vmlinux 0x45f0d3c3 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x45f5c0de serio_rescan +EXPORT_SYMBOL vmlinux 0x45fd7575 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x45fefd86 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x46055ff3 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x463c29a5 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x463fe82e d_obtain_alias +EXPORT_SYMBOL vmlinux 0x4643f1c0 elevator_exit +EXPORT_SYMBOL vmlinux 0x4652db0a scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x46a8dd3f tcp_read_sock +EXPORT_SYMBOL vmlinux 0x46da617f __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x46eaee10 block_write_begin +EXPORT_SYMBOL vmlinux 0x46f1b5ce __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x4710c7c2 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x47426299 dm_io_client_create +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x4760b43c i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x476adc5e pipe_to_file +EXPORT_SYMBOL vmlinux 0x477dd929 register_snap_client +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47c9aee6 tty_check_change +EXPORT_SYMBOL vmlinux 0x480f9c99 acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x4833eaa6 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x48362655 pci_iomap +EXPORT_SYMBOL vmlinux 0x484e3044 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x4875d329 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x487a0b5a tc_classify +EXPORT_SYMBOL vmlinux 0x48887e4e generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x48911669 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x489703ce textsearch_destroy +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48bd797f init_task +EXPORT_SYMBOL vmlinux 0x48ff748d journal_abort +EXPORT_SYMBOL vmlinux 0x49084d31 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x49468935 i2c_register_driver +EXPORT_SYMBOL vmlinux 0x494e3393 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x496dd1e7 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x49794beb jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x497c91dd vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x4997af89 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x499815be keyring_clear +EXPORT_SYMBOL vmlinux 0x4999c015 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x49c8fb2a pipe_unlock +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49dc5d2e vmap +EXPORT_SYMBOL vmlinux 0x49dd03ef tty_port_close +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49ea2def register_gifconf +EXPORT_SYMBOL vmlinux 0x49f17f79 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x4a07ea5b bt_sock_register +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a3dc023 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x4a7d49ac commit_creds +EXPORT_SYMBOL vmlinux 0x4a87186a set_pages_x +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4acef452 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b09f5ed netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b4158a6 dma_mark_declared_memory_occupied +EXPORT_SYMBOL vmlinux 0x4b74fce5 pci_enable_msix +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b9dbffb d_move +EXPORT_SYMBOL vmlinux 0x4ba2558c scsi_get_command +EXPORT_SYMBOL vmlinux 0x4ba54219 hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x4ba751a6 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bcff74d vfs_getattr +EXPORT_SYMBOL vmlinux 0x4bfee15a atomic64_set +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c267bfd tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x4c3edc12 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x4c5f47cd d_validate +EXPORT_SYMBOL vmlinux 0x4c722709 rfkill_alloc +EXPORT_SYMBOL vmlinux 0x4cb0d73f registered_fb +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cc975aa scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x4cca1483 phy_device_free +EXPORT_SYMBOL vmlinux 0x4cd24e3e kunmap_high +EXPORT_SYMBOL vmlinux 0x4cdfc41d unregister_md_personality +EXPORT_SYMBOL vmlinux 0x4d0b5881 unlock_super +EXPORT_SYMBOL vmlinux 0x4d2dc830 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d4b2754 xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x4d66163c pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x4da69f29 generic_unplug_device +EXPORT_SYMBOL vmlinux 0x4db48f8f skb_seq_read +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4ddcc28b qdisc_reset +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4df55c6d kernel_getsockname +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e27591e __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e50cf9e scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4e876591 dquot_claim_space +EXPORT_SYMBOL vmlinux 0x4e942e1f generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x4ebd3561 per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x4ecc60bf __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x4ece6e21 dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0x4ef18a85 pci_iounmap +EXPORT_SYMBOL vmlinux 0x4f0877c3 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x4f399863 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f478be9 __nla_put +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f64bd0f simple_pin_fs +EXPORT_SYMBOL vmlinux 0x4f69a83c netif_napi_del +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4f77f80d truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x4f8002c5 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x4f88bece register_qdisc +EXPORT_SYMBOL vmlinux 0x4f8e9b5b rt6_lookup +EXPORT_SYMBOL vmlinux 0x4f990ce8 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0x4fbce7c0 blk_complete_request +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x500c7f38 dm_register_target +EXPORT_SYMBOL vmlinux 0x5015e6e5 fb_is_primary_device +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x508f766f mntput_no_expire +EXPORT_SYMBOL vmlinux 0x50bdd470 boot_cpu_data +EXPORT_SYMBOL vmlinux 0x50f45896 d_find_alias +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x512c3f1d save_mount_options +EXPORT_SYMBOL vmlinux 0x5150d017 bh_submit_read +EXPORT_SYMBOL vmlinux 0x5152e605 memcmp +EXPORT_SYMBOL vmlinux 0x5186518f profile_pc +EXPORT_SYMBOL vmlinux 0x5194a260 iput +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51db08e4 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x5201cd10 udp_disconnect +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x521591cf nobh_write_begin +EXPORT_SYMBOL vmlinux 0x521e6846 dev_get_stats +EXPORT_SYMBOL vmlinux 0x5254003d dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0x526af492 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x527587d8 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528b9ea5 sysctl_string +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52c33722 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x52cc584f scsi_dma_map +EXPORT_SYMBOL vmlinux 0x52d34032 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x530f44dd mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x5311c8c5 vfs_symlink +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x5326d993 register_exec_domain +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x5345166c __scm_destroy +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x53a23240 posix_lock_file +EXPORT_SYMBOL vmlinux 0x53ad1793 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x53b2d79e get_fs_type +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x540c5616 scsi_free_command +EXPORT_SYMBOL vmlinux 0x5413d7a9 ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0x541dfef4 atomic64_inc +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54445d38 poll_initwait +EXPORT_SYMBOL vmlinux 0x5444855d phy_start +EXPORT_SYMBOL vmlinux 0x547f26f1 journal_restart +EXPORT_SYMBOL vmlinux 0x5493204c aio_put_req +EXPORT_SYMBOL vmlinux 0x54935666 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0x54a6d074 atomic64_dec +EXPORT_SYMBOL vmlinux 0x54a806ce uart_match_port +EXPORT_SYMBOL vmlinux 0x54b3d975 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x54bb2c67 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x5513d5c4 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x5519754c proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x5523b927 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x5524eccc get_super +EXPORT_SYMBOL vmlinux 0x553f9dd3 down_read_trylock +EXPORT_SYMBOL vmlinux 0x555ae980 dev_change_flags +EXPORT_SYMBOL vmlinux 0x5562feec tcp_disconnect +EXPORT_SYMBOL vmlinux 0x5581cd2e hippi_mac_addr +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x559aff47 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x55b7483c xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x55c4f806 input_filter_device +EXPORT_SYMBOL vmlinux 0x55df1a2d scm_fp_dup +EXPORT_SYMBOL vmlinux 0x55f51f15 dev_gro_receive +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x562f0d1f blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x5661ba4e xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0x56772e70 seq_printf +EXPORT_SYMBOL vmlinux 0x569cb92d is_bad_inode +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56d62433 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56ed121f i2c_clients_command +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x56f7f8bd nf_setsockopt +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x570d9e3f br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x5721e8f3 eisa_driver_unregister +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x5766dd5c sock_no_bind +EXPORT_SYMBOL vmlinux 0x577d873f xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x578ebb09 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x579e612d blk_requeue_request +EXPORT_SYMBOL vmlinux 0x579fbcd2 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x57a1d402 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57d189d2 inode_setattr +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57dfe282 __seq_open_private +EXPORT_SYMBOL vmlinux 0x5805394a d_alloc +EXPORT_SYMBOL vmlinux 0x58246de4 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x5859ea02 napi_complete +EXPORT_SYMBOL vmlinux 0x585b83b9 phy_driver_register +EXPORT_SYMBOL vmlinux 0x588292be init_special_inode +EXPORT_SYMBOL vmlinux 0x588d7033 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x5892936d tcp_sendpage +EXPORT_SYMBOL vmlinux 0x589d33b2 skb_gso_segment +EXPORT_SYMBOL vmlinux 0x58a7a10a pci_dev_put +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58bd6745 lookup_one_len +EXPORT_SYMBOL vmlinux 0x58c39fda unregister_snap_client +EXPORT_SYMBOL vmlinux 0x58fef6f8 ist_info +EXPORT_SYMBOL vmlinux 0x59008e0a generic_write_end +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x59504c7d serio_open +EXPORT_SYMBOL vmlinux 0x59791fd7 blk_put_request +EXPORT_SYMBOL vmlinux 0x5985e8ee skb_free_datagram +EXPORT_SYMBOL vmlinux 0x598abcf9 bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x59b80054 set_anon_super +EXPORT_SYMBOL vmlinux 0x59ba1a6c mmc_remove_host +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x59da801c loop_register_transfer +EXPORT_SYMBOL vmlinux 0x59e8e166 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x59f8a6cc sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a63d880 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x5a6bf996 unlock_buffer +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a837ccc __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x5abe70e1 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5ac9934c pcim_enable_device +EXPORT_SYMBOL vmlinux 0x5ad08dd4 generic_show_options +EXPORT_SYMBOL vmlinux 0x5ad87b05 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b29bcac vfs_unlink +EXPORT_SYMBOL vmlinux 0x5b34bd9a block_write_full_page +EXPORT_SYMBOL vmlinux 0x5b4c1f1c tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5bf9898e pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x5c265cba sg_init_one +EXPORT_SYMBOL vmlinux 0x5c4bdb11 consume_skb +EXPORT_SYMBOL vmlinux 0x5c68705b mca_read_pos +EXPORT_SYMBOL vmlinux 0x5c6e017d jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x5c81396a skb_copy_expand +EXPORT_SYMBOL vmlinux 0x5c9bd348 km_policy_expired +EXPORT_SYMBOL vmlinux 0x5d00c6f5 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x5d112a57 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d37c5e5 bioset_create +EXPORT_SYMBOL vmlinux 0x5d50b1b3 sock_map_fd +EXPORT_SYMBOL vmlinux 0x5d60e7d1 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x5d6aec59 pci_clear_master +EXPORT_SYMBOL vmlinux 0x5d82bb1f block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x5d916277 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x5d9c95a8 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x5ddf705b genphy_update_link +EXPORT_SYMBOL vmlinux 0x5df1286b hci_unregister_cb +EXPORT_SYMBOL vmlinux 0x5df909ee udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x5dfd080d do_munmap +EXPORT_SYMBOL vmlinux 0x5e0174c3 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x5e2888af __ht_create_irq +EXPORT_SYMBOL vmlinux 0x5e2e322e sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x5e90c286 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea1ae81 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eaf8bd1 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x5eb12285 bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5ed7a671 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5eee3b0a pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x5f0bd63f sock_kfree_s +EXPORT_SYMBOL vmlinux 0x5f1bd579 mca_find_adapter +EXPORT_SYMBOL vmlinux 0x5f210bac netif_carrier_on +EXPORT_SYMBOL vmlinux 0x5f223bdd mca_device_read_pos +EXPORT_SYMBOL vmlinux 0x5f299209 get_user_pages +EXPORT_SYMBOL vmlinux 0x5f3e6539 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x5f97b2b1 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x5fd0ba18 deactivate_super +EXPORT_SYMBOL vmlinux 0x5fd33dfa get_sb_bdev +EXPORT_SYMBOL vmlinux 0x5fd452a9 __f_setown +EXPORT_SYMBOL vmlinux 0x5fed13d3 block_commit_write +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x600b47be nobh_writepage +EXPORT_SYMBOL vmlinux 0x601cc4fd inet_register_protosw +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x6037af7f scsi_target_resume +EXPORT_SYMBOL vmlinux 0x6042675d inet_frags_init +EXPORT_SYMBOL vmlinux 0x6043092c atomic64_dec_and_test +EXPORT_SYMBOL vmlinux 0x60772128 inet_listen +EXPORT_SYMBOL vmlinux 0x6083fd7a alloc_fcdev +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60b36c78 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x60de5269 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x60e194a2 mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x6141f7db __dst_free +EXPORT_SYMBOL vmlinux 0x6143e073 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x617ddf71 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61b667ae scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61cb81ad bio_copy_kern +EXPORT_SYMBOL vmlinux 0x61dc06b7 sock_no_poll +EXPORT_SYMBOL vmlinux 0x61dc6940 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x62193598 pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x6220b9b9 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x622166f4 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x6229bc6d sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x6241a2ab __copy_from_user_ll_nocache +EXPORT_SYMBOL vmlinux 0x6241fd2c acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0x6246f5ed rfkill_destroy +EXPORT_SYMBOL vmlinux 0x624952e7 nf_log_packet +EXPORT_SYMBOL vmlinux 0x6252653d nf_getsockopt +EXPORT_SYMBOL vmlinux 0x6262565d input_allocate_device +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x627b2dd5 __alloc_skb +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62927d85 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x629bc836 elv_queue_empty +EXPORT_SYMBOL vmlinux 0x62d5216b tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x62fc6452 console_stop +EXPORT_SYMBOL vmlinux 0x62ffa3b2 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x63194f55 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x632e555e acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0x63423d73 kernel_read +EXPORT_SYMBOL vmlinux 0x6356ba35 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x635d0c86 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x6375a7cb dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0x63823086 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x638dcda1 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x63b16ae6 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x63b749d1 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x63c061d3 proto_unregister +EXPORT_SYMBOL vmlinux 0x63cf50df __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x63d1b1f7 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x63e5d9a5 register_con_driver +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x63fb7552 sget +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640a7078 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x641637a9 elv_rb_add +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x64397bf5 dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x6440252c set_pages_nx +EXPORT_SYMBOL vmlinux 0x64526a93 atomic64_sub_return +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x6481cd9a tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x648e778c elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64a27ad1 devm_ioremap +EXPORT_SYMBOL vmlinux 0x64b937ba bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x64ea081c scsi_init_io +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64fa9a04 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x6503ad67 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65328652 dqput +EXPORT_SYMBOL vmlinux 0x653c531b directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x654b65b3 no_llseek +EXPORT_SYMBOL vmlinux 0x65545b8d pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x6554d1a9 register_nls +EXPORT_SYMBOL vmlinux 0x65559a7a input_open_device +EXPORT_SYMBOL vmlinux 0x657bacd0 mnt_pin +EXPORT_SYMBOL vmlinux 0x659187b0 dm_table_get_md +EXPORT_SYMBOL vmlinux 0x65aca42e inode_add_bytes +EXPORT_SYMBOL vmlinux 0x65d820a7 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x66017741 rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x661a3ecb pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x66486fa7 sk_stream_error +EXPORT_SYMBOL vmlinux 0x664efb57 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x665b0ba6 hippi_type_trans +EXPORT_SYMBOL vmlinux 0x66678ae0 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x666cf55b mnt_unpin +EXPORT_SYMBOL vmlinux 0x667dacd9 ps2_command +EXPORT_SYMBOL vmlinux 0x668b18ed sk_release_kernel +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x6696355b bd_set_size +EXPORT_SYMBOL vmlinux 0x66f8e718 unregister_con_driver +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x675e526a tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x6777a3ba napi_gro_frags +EXPORT_SYMBOL vmlinux 0x677c4500 ip_ct_attach +EXPORT_SYMBOL vmlinux 0x67804a19 __any_online_cpu +EXPORT_SYMBOL vmlinux 0x6785150e skb_queue_tail +EXPORT_SYMBOL vmlinux 0x67acedd3 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x67ad98cf scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67cc4007 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0x67d5acf2 inet_put_port +EXPORT_SYMBOL vmlinux 0x680f91ad dm_table_event +EXPORT_SYMBOL vmlinux 0x68176962 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x6818a25b alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x6825a2f6 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x6834b7cb xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x684095f9 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x6844b507 dma_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0x684667b3 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x686a0b8c inode_change_ok +EXPORT_SYMBOL vmlinux 0x6875d749 blk_start_queue +EXPORT_SYMBOL vmlinux 0x6895e904 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x68a1da34 pnpbios_protocol +EXPORT_SYMBOL vmlinux 0x68a68c09 dm_table_get_size +EXPORT_SYMBOL vmlinux 0x68c78dff scsi_put_command +EXPORT_SYMBOL vmlinux 0x68cb4e2f tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x68cbbcc8 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x68dbe046 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x68f28dac poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x690586a8 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x69117ebe md_error +EXPORT_SYMBOL vmlinux 0x692825b3 __kill_fasync +EXPORT_SYMBOL vmlinux 0x695717d3 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x695fb809 cdrom_open +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x697c1185 pci_read_vpd +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69825e2d inet6_bind +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69af586a fb_pan_display +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a2272c5 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x6a27bfce csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x6a31c144 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x6a3c801a sk_common_release +EXPORT_SYMBOL vmlinux 0x6a3e25f8 lock_may_write +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a4a9f03 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x6a5dbd00 input_unregister_handler +EXPORT_SYMBOL vmlinux 0x6a6bda1c phy_disconnect +EXPORT_SYMBOL vmlinux 0x6a941f25 udp_prot +EXPORT_SYMBOL vmlinux 0x6a953cf1 ___pskb_trim +EXPORT_SYMBOL vmlinux 0x6a9a5a1f ip6_route_output +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6addddea dcache_readdir +EXPORT_SYMBOL vmlinux 0x6ae1bd71 sock_create_lite +EXPORT_SYMBOL vmlinux 0x6b013ab5 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0x6b11386b request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x6b15650d open_exec +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b1f3097 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b3e1441 xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x6b58ac19 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x6b64fff7 pskb_copy +EXPORT_SYMBOL vmlinux 0x6b86642a xfrm_input +EXPORT_SYMBOL vmlinux 0x6b937ffb mca_mark_as_used +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6b9e58d9 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb812e7 atomic64_add_return +EXPORT_SYMBOL vmlinux 0x6bb967eb bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x6bc1fc8e pcim_iounmap +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c2e3320 strncmp +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c49326c proc_dointvec +EXPORT_SYMBOL vmlinux 0x6c4d35de dev_trans_start +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c698d14 vfs_mkdir +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c7d0a4c pci_find_capability +EXPORT_SYMBOL vmlinux 0x6c8c9230 scsi_execute_req +EXPORT_SYMBOL vmlinux 0x6c8d3134 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x6cb02cdc setup_arg_pages +EXPORT_SYMBOL vmlinux 0x6cb844cf __secpath_destroy +EXPORT_SYMBOL vmlinux 0x6cc3b060 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce3f20d pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d2a51e6 skb_trim +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d3fe8f9 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x6d464175 __sg_free_table +EXPORT_SYMBOL vmlinux 0x6d4d1c0f tr_type_trans +EXPORT_SYMBOL vmlinux 0x6d56994a cmpxchg_486_u64 +EXPORT_SYMBOL vmlinux 0x6d691900 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d939210 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x6da15c9e jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dd35a0f pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x6dedb964 file_update_time +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0d9e21 con_copy_unimap +EXPORT_SYMBOL vmlinux 0x6e1d7e23 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0x6e48091d generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x6e578115 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x6e67841f scsi_block_requests +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ea73c1e kobject_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6ed32ef6 simple_rmdir +EXPORT_SYMBOL vmlinux 0x6ed743dc generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x6ee48ed9 netpoll_setup +EXPORT_SYMBOL vmlinux 0x6ef7ced6 bdi_init +EXPORT_SYMBOL vmlinux 0x6ef9b163 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x6f0d5ed5 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x6f18299f mca_bus_type +EXPORT_SYMBOL vmlinux 0x6f39c4c2 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x6f4cc256 set_pages_array_uc +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f6c98f4 __napi_schedule +EXPORT_SYMBOL vmlinux 0x6f7cf014 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x6fa6d756 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x6fbfa62a blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x6fc31cab iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x6fe4eddf inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x701c4970 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x701d1e2a vm_insert_page +EXPORT_SYMBOL vmlinux 0x705104a6 pci_map_rom +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x7057b681 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x705ef5fa find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x706597ee splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x7092c68d phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70aea859 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d1f8f3 strncat +EXPORT_SYMBOL vmlinux 0x70d55e76 phy_stop +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70f10a12 skb_copy +EXPORT_SYMBOL vmlinux 0x70f5cb99 set_pages_array_wb +EXPORT_SYMBOL vmlinux 0x7110062c md_write_end +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x714c7a81 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x71672c6a bmap +EXPORT_SYMBOL vmlinux 0x716ac00a rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71a00fdf cont_write_begin +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71bbfe64 dput +EXPORT_SYMBOL vmlinux 0x71e913d6 module_layout +EXPORT_SYMBOL vmlinux 0x72216de1 serio_interrupt +EXPORT_SYMBOL vmlinux 0x724666ca per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0x728b67bf ps2_drain +EXPORT_SYMBOL vmlinux 0x72a1686d kill_anon_super +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x7334333a put_page +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x738803e6 strnlen +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x739cd024 iget_locked +EXPORT_SYMBOL vmlinux 0x73b96bce phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x73cd9bfc generic_removexattr +EXPORT_SYMBOL vmlinux 0x73d8a1e6 blk_plug_device +EXPORT_SYMBOL vmlinux 0x73dedfab phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x73f6c093 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x7413793a EISA_bus +EXPORT_SYMBOL vmlinux 0x74254445 __napi_complete +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x745389fe freeze_bdev +EXPORT_SYMBOL vmlinux 0x745fbaa4 km_new_mapping +EXPORT_SYMBOL vmlinux 0x7484c4e8 hci_send_sco +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x7497c24b __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x74b502d8 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x74cad98f kernel_accept +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74cdd956 ip_defrag +EXPORT_SYMBOL vmlinux 0x74d36d83 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x74febe3c set_user_nice +EXPORT_SYMBOL vmlinux 0x7504f0d3 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x75271716 save_processor_state +EXPORT_SYMBOL vmlinux 0x757f2fa9 add_disk +EXPORT_SYMBOL vmlinux 0x75cfaaf7 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x75d4f520 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x762e7c8b nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x7664e817 dump_trace +EXPORT_SYMBOL vmlinux 0x76718597 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x76757140 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x76762ce2 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x768a6314 dquot_initialize +EXPORT_SYMBOL vmlinux 0x769ede75 security_d_instantiate +EXPORT_SYMBOL vmlinux 0x76aa22f6 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x76b0f8f8 bad_dma_address +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76db3768 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x76ec08f7 __register_binfmt +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x76fd7e41 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x770a0036 isapnp_cfg_begin +EXPORT_SYMBOL vmlinux 0x772e06e5 datagram_poll +EXPORT_SYMBOL vmlinux 0x7753f5b0 send_sig +EXPORT_SYMBOL vmlinux 0x776f086e lock_rename +EXPORT_SYMBOL vmlinux 0x777f8e6e tty_unregister_device +EXPORT_SYMBOL vmlinux 0x778193ad tcf_em_register +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77a41782 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x77a8ef82 dqget +EXPORT_SYMBOL vmlinux 0x77d492a1 fb_class +EXPORT_SYMBOL vmlinux 0x77e5ae6f dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77ee1c6c pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x77ffb9e3 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x780fa86c filp_open +EXPORT_SYMBOL vmlinux 0x7819e9f3 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0x782eba26 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x784c6515 ht_create_irq +EXPORT_SYMBOL vmlinux 0x784f93f2 skb_tx_hash +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78cb2783 down_write_trylock +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78f9744b kmem_cache_name +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x791c8e2f disk_stack_limits +EXPORT_SYMBOL vmlinux 0x792ed65a dev_set_mtu +EXPORT_SYMBOL vmlinux 0x794487ee disable_hlt +EXPORT_SYMBOL vmlinux 0x795152dc pv_cpu_ops +EXPORT_SYMBOL vmlinux 0x79539d73 cdev_add +EXPORT_SYMBOL vmlinux 0x79691a8c inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x799da775 __find_get_block +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79b17da0 eth_header_cache +EXPORT_SYMBOL vmlinux 0x7a0b0618 vfs_readv +EXPORT_SYMBOL vmlinux 0x7a159293 register_quota_format +EXPORT_SYMBOL vmlinux 0x7a1c58cd iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x7a1e7afe __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a2e4a9b tcf_hash_check +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a58382f __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x7a64a78b abort_creds +EXPORT_SYMBOL vmlinux 0x7a737b2c tcp_close +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7ad15050 ppp_input +EXPORT_SYMBOL vmlinux 0x7ad69131 do_splice_from +EXPORT_SYMBOL vmlinux 0x7ada36ac neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x7ae69e1d blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7af9a995 inode_init_always +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b134ddf acpi_get_name +EXPORT_SYMBOL vmlinux 0x7b34203d blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x7b4670fe clocksource_register +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b5590e8 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x7b712205 proc_mkdir +EXPORT_SYMBOL vmlinux 0x7b75075c file_permission +EXPORT_SYMBOL vmlinux 0x7b7d88e3 register_filesystem +EXPORT_SYMBOL vmlinux 0x7b88412b mmc_release_host +EXPORT_SYMBOL vmlinux 0x7ba3ff0c file_fsync +EXPORT_SYMBOL vmlinux 0x7ba463e8 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x7ba50149 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x7ba63865 stop_tty +EXPORT_SYMBOL vmlinux 0x7bb8b6e5 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x7bc8091c tty_name +EXPORT_SYMBOL vmlinux 0x7bf6b663 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x7c0b4116 register_sysctl_table +EXPORT_SYMBOL vmlinux 0x7c0edd7d acpi_check_region +EXPORT_SYMBOL vmlinux 0x7c18c7f7 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0x7c1da31b pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x7c42c4e7 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c4b1932 phy_print_status +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c797fe8 sock_register +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c94daca journal_force_commit +EXPORT_SYMBOL vmlinux 0x7c9b1ee5 hci_register_cb +EXPORT_SYMBOL vmlinux 0x7cae9867 submit_bh +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cc1a83a sk_stop_timer +EXPORT_SYMBOL vmlinux 0x7cd9d66b jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x7cdeefd7 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0x7cf8408e __serio_register_driver +EXPORT_SYMBOL vmlinux 0x7cfe6b62 napi_gro_receive +EXPORT_SYMBOL vmlinux 0x7d0299f9 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d23b3c5 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x7d40de6f pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x7d7b5143 __kfree_skb +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7de78dd0 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x7e1f63f7 cfb_fillrect +EXPORT_SYMBOL vmlinux 0x7e367ecb bio_sector_offset +EXPORT_SYMBOL vmlinux 0x7e38d50b kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x7e5ba444 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e8a8fb7 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ea24233 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x7eb384e6 dst_destroy +EXPORT_SYMBOL vmlinux 0x7ecb001b __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x7ecd8e44 __lock_buffer +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7ef849ce jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f3de4e5 hci_resume_dev +EXPORT_SYMBOL vmlinux 0x7f517bb4 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x7f7d813c bitmap_end_sync +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f97eb11 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x7fa99642 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x7fab1568 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x7fb0c600 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x7fc23068 dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x7fcfbbf2 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x7febad84 do_splice_to +EXPORT_SYMBOL vmlinux 0x803aa2c2 dquot_destroy +EXPORT_SYMBOL vmlinux 0x805b4121 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x8067489b dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0x8077f018 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x80d42693 scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x80d648aa kobject_del +EXPORT_SYMBOL vmlinux 0x81059799 sock_kmalloc +EXPORT_SYMBOL vmlinux 0x813b524a journal_init_dev +EXPORT_SYMBOL vmlinux 0x8145519a qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x8155f134 skb_append +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815c56d0 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x815f8e2e should_remove_suid +EXPORT_SYMBOL vmlinux 0x8164365c drop_super +EXPORT_SYMBOL vmlinux 0x8169183c input_register_handle +EXPORT_SYMBOL vmlinux 0x816e4c2e jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x81a67092 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x81d7c639 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x81dc7281 nf_register_hook +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x820c55a4 filp_close +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x821e15de input_flush_device +EXPORT_SYMBOL vmlinux 0x8235805b memmove +EXPORT_SYMBOL vmlinux 0x8236f9d5 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x823e1e64 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x82517c85 eth_header +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826f2bfa iunique +EXPORT_SYMBOL vmlinux 0x8272f8ff set_page_dirty +EXPORT_SYMBOL vmlinux 0x82757008 vfs_writev +EXPORT_SYMBOL vmlinux 0x8277e3ac seq_open +EXPORT_SYMBOL vmlinux 0x827de469 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x82aa310a key_payload_reserve +EXPORT_SYMBOL vmlinux 0x82add409 inet6_ioctl +EXPORT_SYMBOL vmlinux 0x82c43188 dev_load +EXPORT_SYMBOL vmlinux 0x8302d0f4 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x8344495c netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x83479a76 invalidate_bdev +EXPORT_SYMBOL vmlinux 0x834d1d31 notify_change +EXPORT_SYMBOL vmlinux 0x8365e042 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0x83793582 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x837c8cb8 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x838397e7 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0x83839a2f pagevec_lookup +EXPORT_SYMBOL vmlinux 0x8388657f blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83ab38f7 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x83cfb8df sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x83f93fab iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x83fa7adb sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x8420d45e tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x8437667b revalidate_disk +EXPORT_SYMBOL vmlinux 0x84523c0d generic_block_bmap +EXPORT_SYMBOL vmlinux 0x8456dea3 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x849dd283 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x84eb42e5 unregister_cdrom +EXPORT_SYMBOL vmlinux 0x85196af3 kmem_cache_create +EXPORT_SYMBOL vmlinux 0x85206ecd pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x85809eee pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x8592fdb2 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x8597bee9 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x85a5892f vfs_fsync +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b17e2f create_mnt_ns +EXPORT_SYMBOL vmlinux 0x85c71d49 mapping_tagged +EXPORT_SYMBOL vmlinux 0x85cd9021 generic_setxattr +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x85e828a1 dst_alloc +EXPORT_SYMBOL vmlinux 0x85fc6d6f lock_may_read +EXPORT_SYMBOL vmlinux 0x862380e5 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x86443c14 __page_symlink +EXPORT_SYMBOL vmlinux 0x865f1ae3 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x8672d641 find_or_create_page +EXPORT_SYMBOL vmlinux 0x8685d8ce simple_fsync +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86907ca9 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x870bf6b9 serial8250_register_port +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x87348d9e tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x873ebf00 qdisc_destroy +EXPORT_SYMBOL vmlinux 0x876ac6f8 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x87789a22 mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0x87880c24 update_region +EXPORT_SYMBOL vmlinux 0x878a89b6 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x879ef18a pci_assign_resource +EXPORT_SYMBOL vmlinux 0x87afdab1 arp_xmit +EXPORT_SYMBOL vmlinux 0x87b0721b pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x87b2386d __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x87b47a9e kobject_set_name +EXPORT_SYMBOL vmlinux 0x87d234e3 generic_ro_fops +EXPORT_SYMBOL vmlinux 0x8800be1c rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x8827fa19 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x88284a0a scsi_execute +EXPORT_SYMBOL vmlinux 0x8875a527 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x888198e7 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x888d6062 journal_revoke +EXPORT_SYMBOL vmlinux 0x88a1f7f4 mmc_resume_host +EXPORT_SYMBOL vmlinux 0x88ac31a6 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x88c9a158 free_netdev +EXPORT_SYMBOL vmlinux 0x88ce37f1 lease_get_mtime +EXPORT_SYMBOL vmlinux 0x88d423ac fget +EXPORT_SYMBOL vmlinux 0x88d5640a dev_addr_del +EXPORT_SYMBOL vmlinux 0x88e88136 ioremap_prot +EXPORT_SYMBOL vmlinux 0x8904f4de scm_detach_fds +EXPORT_SYMBOL vmlinux 0x8905eed6 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0x8919c55a skb_split +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x893f07a4 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x8941aa44 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x8969b997 ida_get_new +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89852ee2 sock_release +EXPORT_SYMBOL vmlinux 0x8987a664 nonseekable_open +EXPORT_SYMBOL vmlinux 0x898cbc1d udp_poll +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x899f6c08 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x89ab5582 d_add_ci +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89f6dd94 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x89fb024a dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x8a03ed16 genphy_suspend +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3e3f01 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a68abca dst_release +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a996177 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab24ed4 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x8ab58f21 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x8abd7d9a __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0x8aebf1ed pci_get_subsys +EXPORT_SYMBOL vmlinux 0x8b025986 kill_litter_super +EXPORT_SYMBOL vmlinux 0x8b076f61 seq_escape +EXPORT_SYMBOL vmlinux 0x8b18496f __copy_to_user_ll +EXPORT_SYMBOL vmlinux 0x8b202c1c otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x8b440749 arp_broken_ops +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b69ae12 bdget +EXPORT_SYMBOL vmlinux 0x8b6f490a netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x8b7348a2 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8b9974ef i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x8ba3eed9 block_truncate_page +EXPORT_SYMBOL vmlinux 0x8bbb9e68 kobject_add +EXPORT_SYMBOL vmlinux 0x8bc958ed security_path_link +EXPORT_SYMBOL vmlinux 0x8bcc65f5 proc_dostring +EXPORT_SYMBOL vmlinux 0x8bd14ca8 module_put +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8c068048 ll_rw_block +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c2aff99 seq_lseek +EXPORT_SYMBOL vmlinux 0x8c81f33a simple_fill_super +EXPORT_SYMBOL vmlinux 0x8c8d0e67 kern_path +EXPORT_SYMBOL vmlinux 0x8ca22df7 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x8ca4c1e3 unregister_console +EXPORT_SYMBOL vmlinux 0x8cc4b656 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cc8a58b genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x8cdd1435 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4a6688 xfrm_register_km +EXPORT_SYMBOL vmlinux 0x8d525115 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6f81b4 __div64_32 +EXPORT_SYMBOL vmlinux 0x8d71b281 read_dev_sector +EXPORT_SYMBOL vmlinux 0x8d76da44 bdget_disk +EXPORT_SYMBOL vmlinux 0x8d7c1e42 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8d9f4176 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x8dc6e564 restore_processor_state +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8ddd6fc0 security_path_truncate +EXPORT_SYMBOL vmlinux 0x8dee51d6 pci_match_id +EXPORT_SYMBOL vmlinux 0x8dfb1426 destroy_EII_client +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e13d626 skb_dma_map +EXPORT_SYMBOL vmlinux 0x8e1b2eab inet_release +EXPORT_SYMBOL vmlinux 0x8e34ca97 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x8e5ac498 ip_dev_find +EXPORT_SYMBOL vmlinux 0x8e6dcf67 rfkill_unregister +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e785d90 brioctl_set +EXPORT_SYMBOL vmlinux 0x8e7da879 bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0x8e888ec3 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x8e8be00e search_binary_handler +EXPORT_SYMBOL vmlinux 0x8e921818 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x8ead72a4 kset_unregister +EXPORT_SYMBOL vmlinux 0x8eb8d4fc scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x8ec3500d mpage_readpage +EXPORT_SYMBOL vmlinux 0x8ece7ae4 alloc_trdev +EXPORT_SYMBOL vmlinux 0x8ed95262 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8efecdaa i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0x8f227528 scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x8f4278f1 nf_afinfo +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f802269 bio_clone +EXPORT_SYMBOL vmlinux 0x8f902755 bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fbcc8b9 pci_pme_capable +EXPORT_SYMBOL vmlinux 0x8fcbb584 mutex_unlock +EXPORT_SYMBOL vmlinux 0x8ffbf6ac in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x8fff6f8d set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x901bbdd4 I_BDEV +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x9045a23b phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x904a8ef6 lock_fb_info +EXPORT_SYMBOL vmlinux 0x90520eae acpi_root_dir +EXPORT_SYMBOL vmlinux 0x908bfed7 names_cachep +EXPORT_SYMBOL vmlinux 0x90919e9d unlock_page +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x91178fc2 journal_forget +EXPORT_SYMBOL vmlinux 0x91442bf9 fput +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x9145d4ce vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9183d80b block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x918a1b65 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x91902ba3 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x91b06296 put_disk +EXPORT_SYMBOL vmlinux 0x91b0fca9 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921d43ab xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x922e145a dquot_commit +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x92438ca0 ppp_register_compressor +EXPORT_SYMBOL vmlinux 0x924c9592 sysctl_data +EXPORT_SYMBOL vmlinux 0x926f2818 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x92858451 eisa_driver_register +EXPORT_SYMBOL vmlinux 0x92897e3d default_idle +EXPORT_SYMBOL vmlinux 0x92922dbc vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x930b468a scsi_host_put +EXPORT_SYMBOL vmlinux 0x930bda76 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x931f7cb6 mca_device_set_claim +EXPORT_SYMBOL vmlinux 0x9326e0f5 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x9330cb9f sg_alloc_table +EXPORT_SYMBOL vmlinux 0x93433806 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93e78f97 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x93f32bdf devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x940992da load_nls +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x944a0e5d dev_addr_add +EXPORT_SYMBOL vmlinux 0x94615621 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x946da7a3 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94a4fb51 do_sync_read +EXPORT_SYMBOL vmlinux 0x94b0c72a netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x94b541b5 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x94bbb52d unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x94d80329 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x953c7218 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x95422a5a vfs_statfs +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x954e84cb xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0x95513b21 do_SAK +EXPORT_SYMBOL vmlinux 0x960a727c blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x962d5abc key_validate +EXPORT_SYMBOL vmlinux 0x963d73b2 do_truncate +EXPORT_SYMBOL vmlinux 0x965c84d4 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x966b0fa9 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x968f5041 dev_remove_pack +EXPORT_SYMBOL vmlinux 0x969a05f9 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96e88743 journal_flush +EXPORT_SYMBOL vmlinux 0x96f6aa0b ip6_frag_match +EXPORT_SYMBOL vmlinux 0x96fbd6d7 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x96fe16c1 mca_device_set_name +EXPORT_SYMBOL vmlinux 0x971db16b __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x9730bc38 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x973d3c44 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x974372e7 __devm_release_region +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9765396b pci_get_class +EXPORT_SYMBOL vmlinux 0x97d82996 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x97f74f6f skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x981ffae3 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x98269d88 __getblk +EXPORT_SYMBOL vmlinux 0x985650f2 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x9856df29 sock_i_ino +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x9898bd93 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98f26bbc make_EII_client +EXPORT_SYMBOL vmlinux 0x99052a84 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x99609d8a dquot_commit_info +EXPORT_SYMBOL vmlinux 0x99619440 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x99680031 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x997c2e9e journal_clear_err +EXPORT_SYMBOL vmlinux 0x998a80cc proc_create_data +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x999fe604 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x99b5bff9 bio_free +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c24a0c i2c_transfer +EXPORT_SYMBOL vmlinux 0x99c44143 bd_release +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99dd67e8 init_file +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a076107 blk_peek_request +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a23873c pci_release_regions +EXPORT_SYMBOL vmlinux 0x9a6a83f9 cmos_lock +EXPORT_SYMBOL vmlinux 0x9a7adac6 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x9a85f650 inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9ab8f1a9 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b472fb3 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x9b4de8eb idr_replace +EXPORT_SYMBOL vmlinux 0x9b6424fc ppp_register_channel +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b8deaba blk_init_queue +EXPORT_SYMBOL vmlinux 0x9b91d64e tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x9b94fcdf dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bd09ddb scsi_prep_return +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c08b896 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x9c1bb37d vfs_create +EXPORT_SYMBOL vmlinux 0x9c20e7bd journal_create +EXPORT_SYMBOL vmlinux 0x9c2c944a __copy_from_user_ll_nocache_nozero +EXPORT_SYMBOL vmlinux 0x9c3d0eed console_start +EXPORT_SYMBOL vmlinux 0x9c3fe5c2 mca_register_driver_integrated +EXPORT_SYMBOL vmlinux 0x9c4e198d generic_file_llseek +EXPORT_SYMBOL vmlinux 0x9c7077bd enable_hlt +EXPORT_SYMBOL vmlinux 0x9caff06f iget_failed +EXPORT_SYMBOL vmlinux 0x9cb5113d pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cb9be11 inet_stream_ops +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cebacb2 pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9d0c6696 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x9d1fd433 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d6c4825 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x9d86922f ether_setup +EXPORT_SYMBOL vmlinux 0x9d988fd0 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x9d9f0d41 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x9dbbabe0 skb_queue_head +EXPORT_SYMBOL vmlinux 0x9ded0d07 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e4229af vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e672ff6 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea66629 bio_init +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9efce034 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f34d4e7 seq_release +EXPORT_SYMBOL vmlinux 0x9f49ae51 tty_vhangup +EXPORT_SYMBOL vmlinux 0x9f54a049 inet_select_addr +EXPORT_SYMBOL vmlinux 0x9f744a7c log_wait_commit +EXPORT_SYMBOL vmlinux 0x9f8d09af generic_fillattr +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fa76109 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0xa0048feb otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xa006f790 dmam_release_declared_memory +EXPORT_SYMBOL vmlinux 0xa022dfb5 ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05a83a1 input_unregister_handle +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa063b0f3 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0xa088da59 neigh_create +EXPORT_SYMBOL vmlinux 0xa097ee7c mca_device_status +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0c78f95 security_file_permission +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0e1bf98 d_alloc_name +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa119cc6e ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xa11bde91 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0xa11f7379 simple_sync_file +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa1349d90 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa140f137 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0xa1714283 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xa1820635 blk_run_queue +EXPORT_SYMBOL vmlinux 0xa18ea921 pcim_pin_device +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1b76ee8 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1f7e2f7 vfs_readdir +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa23696a6 dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xa24caa0e inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xa2619132 seq_write +EXPORT_SYMBOL vmlinux 0xa28df48f kernel_recvmsg +EXPORT_SYMBOL vmlinux 0xa297c211 arp_create +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2e7be6b kset_register +EXPORT_SYMBOL vmlinux 0xa309599f register_cdrom +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa35c1f05 acpi_extract_package +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa37530fa ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xa39b8b55 inet_sendmsg +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa408c42a do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xa40c892a icmp_send +EXPORT_SYMBOL vmlinux 0xa4234b81 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xa426e197 tty_kref_put +EXPORT_SYMBOL vmlinux 0xa429423d i2c_use_client +EXPORT_SYMBOL vmlinux 0xa42c5af3 mca_register_driver +EXPORT_SYMBOL vmlinux 0xa43a63fb invalidate_inodes +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa4677fec sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xa468e186 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0xa46a5d23 arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0xa46b37b3 napi_frags_skb +EXPORT_SYMBOL vmlinux 0xa4926efe nf_reinject +EXPORT_SYMBOL vmlinux 0xa492903d seq_path +EXPORT_SYMBOL vmlinux 0xa49cd8b5 set_groups +EXPORT_SYMBOL vmlinux 0xa4b7eacc cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4bc2e72 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xa4d8e068 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0xa51cdfe8 __FIXADDR_TOP +EXPORT_SYMBOL vmlinux 0xa540cc8c contig_page_data +EXPORT_SYMBOL vmlinux 0xa55b2eeb pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa598e795 mdiobus_free +EXPORT_SYMBOL vmlinux 0xa5a566ae bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xa5a633b9 sg_last +EXPORT_SYMBOL vmlinux 0xa5abfd85 dm_get_device +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa5da0abd acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0xa5ec6b17 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xa60bb886 ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0xa60e641a lock_super +EXPORT_SYMBOL vmlinux 0xa63b5129 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa67ac79f eth_header_parse +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6ae3284 simple_getattr +EXPORT_SYMBOL vmlinux 0xa6cd5837 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xa6d96e20 kmap_high +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6f40105 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0xa7046549 vprintk +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71e7463 __first_cpu +EXPORT_SYMBOL vmlinux 0xa739dd8f udp_ioctl +EXPORT_SYMBOL vmlinux 0xa75739c6 skb_store_bits +EXPORT_SYMBOL vmlinux 0xa79b1f5c nf_log_register +EXPORT_SYMBOL vmlinux 0xa7b25117 pnp_is_active +EXPORT_SYMBOL vmlinux 0xa7c32274 generic_read_dir +EXPORT_SYMBOL vmlinux 0xa7e94f54 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xa80d7fe7 dev_unicast_add +EXPORT_SYMBOL vmlinux 0xa852533c ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0xa89acbb3 acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xa89b2d9a alloc_disk +EXPORT_SYMBOL vmlinux 0xa8a47318 __rta_fill +EXPORT_SYMBOL vmlinux 0xa8cd2e35 f_setown +EXPORT_SYMBOL vmlinux 0xa8d24b04 flush_old_exec +EXPORT_SYMBOL vmlinux 0xa8d5a5bb bio_split +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8dae145 d_genocide +EXPORT_SYMBOL vmlinux 0xa8dd62cf insert_inode_locked +EXPORT_SYMBOL vmlinux 0xa8ea3497 isapnp_protocol +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa959a1db cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0xa966011c neigh_lookup +EXPORT_SYMBOL vmlinux 0xa9693b60 pneigh_lookup +EXPORT_SYMBOL vmlinux 0xa973fa30 kmap_atomic +EXPORT_SYMBOL vmlinux 0xa99f9bc8 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xa9b6cdee eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xa9b7dad4 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0xa9bd2676 __vmalloc +EXPORT_SYMBOL vmlinux 0xa9c6804d pcibios_set_irq_routing +EXPORT_SYMBOL vmlinux 0xa9e59669 submit_bio +EXPORT_SYMBOL vmlinux 0xa9f43ed1 get_empty_filp +EXPORT_SYMBOL vmlinux 0xa9f6a572 key_type_keyring +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa0b3484 tty_register_device +EXPORT_SYMBOL vmlinux 0xaa138530 ip6_xmit +EXPORT_SYMBOL vmlinux 0xaa35e661 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0xaa6a2327 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xaa70128f put_mnt_ns +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaa9c9b0a kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0xaaaaacd1 ioremap_wc +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaaca420e pid_task +EXPORT_SYMBOL vmlinux 0xaae62554 sk_reset_timer +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaaebe34f mca_write_pos +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab098efd pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xab37995e bdi_unregister +EXPORT_SYMBOL vmlinux 0xab43bde3 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab775f95 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xab9bc8a9 may_umount_tree +EXPORT_SYMBOL vmlinux 0xabbe9052 dma_ops +EXPORT_SYMBOL vmlinux 0xabc4c9b3 setup_new_exec +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac6b417e cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0xac849d08 zero_fill_bio +EXPORT_SYMBOL vmlinux 0xac901ea8 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xaca87c0d kill_pgrp +EXPORT_SYMBOL vmlinux 0xacb297a2 wireless_send_event +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacd3e969 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0xacd47906 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad30d09c da903x_query_status +EXPORT_SYMBOL vmlinux 0xad44989a __netif_schedule +EXPORT_SYMBOL vmlinux 0xad483aac eth_type_trans +EXPORT_SYMBOL vmlinux 0xad8af0af dquot_scan_active +EXPORT_SYMBOL vmlinux 0xad9a1adf tty_hung_up_p +EXPORT_SYMBOL vmlinux 0xad9d8f3b pci_enable_wake +EXPORT_SYMBOL vmlinux 0xada1dc58 ipv4_specific +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadb65e14 put_tty_driver +EXPORT_SYMBOL vmlinux 0xadbdd0a9 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0xadc91d58 input_grab_device +EXPORT_SYMBOL vmlinux 0xadef6f70 seq_release_private +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xadf9fd0e bio_integrity_free +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae51a02a wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xae6da46f security_path_mkdir +EXPORT_SYMBOL vmlinux 0xae75771b vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xae75f004 ida_destroy +EXPORT_SYMBOL vmlinux 0xae7688da ip_setsockopt +EXPORT_SYMBOL vmlinux 0xae97aa4b gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaed5dfb2 mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xaedfb8ea bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xaefe582a skb_push +EXPORT_SYMBOL vmlinux 0xaf08a65f pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xaf127035 seq_read +EXPORT_SYMBOL vmlinux 0xaf296c8f udplite_prot +EXPORT_SYMBOL vmlinux 0xaf335a5c in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf4b1540 acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xaf532df3 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xaf5cacaf genphy_read_status +EXPORT_SYMBOL vmlinux 0xaf7370dd call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0xaf886b74 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0xaf9c9adb neigh_seq_stop +EXPORT_SYMBOL vmlinux 0xafa001b3 netpoll_poll +EXPORT_SYMBOL vmlinux 0xafe01377 down_read +EXPORT_SYMBOL vmlinux 0xb010ecd0 eth_mac_addr +EXPORT_SYMBOL vmlinux 0xb02023af xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0xb02a1426 start_tty +EXPORT_SYMBOL vmlinux 0xb0599147 inode_get_bytes +EXPORT_SYMBOL vmlinux 0xb05b1e5e thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0xb072675c dma_set_mask +EXPORT_SYMBOL vmlinux 0xb077ef32 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb0803a85 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0xb0823964 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xb08f76ad gen_pool_free +EXPORT_SYMBOL vmlinux 0xb09fa9db blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xb0a4880c hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0xb0a590ce dma_supported +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0eb071d scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xb1002c1e register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xb11a6153 sock_no_listen +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb125ea58 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0xb13c4dba down_write +EXPORT_SYMBOL vmlinux 0xb1816976 d_delete +EXPORT_SYMBOL vmlinux 0xb183e691 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xb190230f fb_validate_mode +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb212e1ce proto_register +EXPORT_SYMBOL vmlinux 0xb21fc74f elv_rb_del +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22cc673 rfkill_register +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2441d45 backlight_device_register +EXPORT_SYMBOL vmlinux 0xb258b6de hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xb2675813 pci_pme_active +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb26aa1f5 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xb27510ef atomic64_inc_return +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb29872f7 napi_frags_finish +EXPORT_SYMBOL vmlinux 0xb29bc8bd idr_remove +EXPORT_SYMBOL vmlinux 0xb2a7ad47 genl_sock +EXPORT_SYMBOL vmlinux 0xb2efb6be mca_read_stored_pos +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb30abf8d idr_get_new_above +EXPORT_SYMBOL vmlinux 0xb31526ee sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb329c8af sock_create +EXPORT_SYMBOL vmlinux 0xb341bbd8 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb3519489 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb3821b9f noop_qdisc +EXPORT_SYMBOL vmlinux 0xb3916edc request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3a531bc kunmap +EXPORT_SYMBOL vmlinux 0xb3b462e0 dquot_transfer +EXPORT_SYMBOL vmlinux 0xb3bc9e89 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xb3e0590d acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0xb40956a2 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb452dc1f register_md_personality +EXPORT_SYMBOL vmlinux 0xb45578b8 memscan +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb48c5c1b sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0xb499ae39 simple_statfs +EXPORT_SYMBOL vmlinux 0xb4b79f63 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb508536f clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0xb5096da0 pci_reenable_device +EXPORT_SYMBOL vmlinux 0xb511f1bd dquot_acquire +EXPORT_SYMBOL vmlinux 0xb516343f jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xb5418861 atomic64_add +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb54c8b5d scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0xb564d936 __free_pages +EXPORT_SYMBOL vmlinux 0xb565ef08 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5a9d166 bdevname +EXPORT_SYMBOL vmlinux 0xb5bbcb52 pv_mmu_ops +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5cba58d bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xb5cef6e4 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb6124321 write_inode_now +EXPORT_SYMBOL vmlinux 0xb62f8c6f fddi_type_trans +EXPORT_SYMBOL vmlinux 0xb64663d6 mdiobus_scan +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6896671 crc_t10dif +EXPORT_SYMBOL vmlinux 0xb698ddf1 inet_del_protocol +EXPORT_SYMBOL vmlinux 0xb69ba815 acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xb6a215b1 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0xb6a289cb invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb6e30cbb read_cache_pages +EXPORT_SYMBOL vmlinux 0xb6e4a8e2 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0xb6ed1e53 strncpy +EXPORT_SYMBOL vmlinux 0xb6ef999e blk_free_tags +EXPORT_SYMBOL vmlinux 0xb6fd565b tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb70c1a29 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb72397d5 printk +EXPORT_SYMBOL vmlinux 0xb7312d8f posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xb75234ca blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb75d3893 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0xb771b9c7 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xb7816af9 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xb797a7e3 pci_set_power_state +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb79a6701 cdev_init +EXPORT_SYMBOL vmlinux 0xb7a7da60 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xb7acd8c6 sk_dst_check +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7bf7972 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7e7c479 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0xb7ee6194 input_set_capability +EXPORT_SYMBOL vmlinux 0xb804e258 tcf_exts_change +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81d6c89 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xb839398a rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xb83b7622 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0xb8547b0c simple_release_fs +EXPORT_SYMBOL vmlinux 0xb865f835 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xb86a8ca9 phy_connect_direct +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb881364e blk_register_region +EXPORT_SYMBOL vmlinux 0xb897dd9a set_pages_wb +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb8b42e42 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb8f8d04c bio_put +EXPORT_SYMBOL vmlinux 0xb9179a5f dm_exception_store_create +EXPORT_SYMBOL vmlinux 0xb942b513 smp_call_function_many +EXPORT_SYMBOL vmlinux 0xb9441c12 __scsi_add_device +EXPORT_SYMBOL vmlinux 0xb95b91c2 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xb9605bb9 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xb97eecb0 bioset_free +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98cdabd bio_unmap_user +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9960c5a hci_recv_fragment +EXPORT_SYMBOL vmlinux 0xb99ef95b __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xb9a62357 filemap_fault +EXPORT_SYMBOL vmlinux 0xb9b5efe4 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xb9ba63ab tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xb9e150be xfrm6_rcv +EXPORT_SYMBOL vmlinux 0xb9ef4609 dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0xb9f0dbd6 nobh_write_end +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba4676f3 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba8ded8f bio_pair_release +EXPORT_SYMBOL vmlinux 0xba989e14 blk_unplug +EXPORT_SYMBOL vmlinux 0xba9b2fc4 dentry_open +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbaefc360 mutex_trylock +EXPORT_SYMBOL vmlinux 0xbafb76a7 rfkill_blocked +EXPORT_SYMBOL vmlinux 0xbb0e4de9 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb19e9e9 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xbb37909d security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xbb4058a5 new_inode +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb721585 acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0xbb89de17 ida_init +EXPORT_SYMBOL vmlinux 0xbb93e66a xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xbbd16397 kick_iocb +EXPORT_SYMBOL vmlinux 0xbc4641d0 init_net +EXPORT_SYMBOL vmlinux 0xbc47f667 pci_target_state +EXPORT_SYMBOL vmlinux 0xbc5ac04f follow_down +EXPORT_SYMBOL vmlinux 0xbca08c6b register_netdevice +EXPORT_SYMBOL vmlinux 0xbcb9d6fc free_buffer_head +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbcd76079 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0xbcf2060d nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xbd54f090 netlink_dump_start +EXPORT_SYMBOL vmlinux 0xbd641424 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0xbd7c0403 hci_connect +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbdf71d66 pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe11010e clear_bdi_congested +EXPORT_SYMBOL vmlinux 0xbe3d524f inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0xbe542c1e pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xbe5fe9d7 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe6f7365 create_proc_entry +EXPORT_SYMBOL vmlinux 0xbea4ce9f mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0xbea9e44f __ip_select_ident +EXPORT_SYMBOL vmlinux 0xbecfa493 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xbeeb41d2 dev_add_pack +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf11de28 kmap +EXPORT_SYMBOL vmlinux 0xbf13b163 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0xbf2568be filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xbf28f3b4 mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf82630b dm_unregister_target +EXPORT_SYMBOL vmlinux 0xbf8b39e9 isapnp_present +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc01eed33 __copy_from_user_ll_nozero +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc09b265d read_cache_page_async +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0c16e78 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0xc0da15c6 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xc0e8594d uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0xc0f65988 machine_real_restart +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc16bc5fc security_inode_readlink +EXPORT_SYMBOL vmlinux 0xc19c8163 atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0xc1e39eca cdev_del +EXPORT_SYMBOL vmlinux 0xc1ff4e5f vfs_readlink +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc21656f0 sock_setsockopt +EXPORT_SYMBOL vmlinux 0xc21ef630 filemap_flush +EXPORT_SYMBOL vmlinux 0xc220b173 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xc2308ed3 journal_init_inode +EXPORT_SYMBOL vmlinux 0xc243835b sync_blockdev +EXPORT_SYMBOL vmlinux 0xc24b2ca4 mutex_lock +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc2595f4b pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xc260c533 netdev_set_master +EXPORT_SYMBOL vmlinux 0xc26462a2 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xc280a525 __copy_from_user_ll +EXPORT_SYMBOL vmlinux 0xc29d9218 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xc2c0a1b3 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e32760 arp_tbl +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f3ed4b seq_puts +EXPORT_SYMBOL vmlinux 0xc2f77844 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xc3206bdc set_binfmt +EXPORT_SYMBOL vmlinux 0xc32adac1 journal_check_available_features +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc377a3ac audit_log_format +EXPORT_SYMBOL vmlinux 0xc37901ce jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xc384e59f invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0xc3932957 sock_recvmsg +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3b0b65c tty_port_close_start +EXPORT_SYMBOL vmlinux 0xc3b32b7f dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0xc3c29929 skb_pad +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3f22b1b bdev_read_only +EXPORT_SYMBOL vmlinux 0xc3fa6a59 memchr +EXPORT_SYMBOL vmlinux 0xc4019d1e con_is_bound +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc4051183 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xc4515889 pci_set_mwi +EXPORT_SYMBOL vmlinux 0xc47e0af8 skb_put +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4b02239 arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xc50e7be2 page_symlink +EXPORT_SYMBOL vmlinux 0xc518727d tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xc5201b50 __lock_page +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc550b3b3 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc5718627 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0xc591cf15 skb_over_panic +EXPORT_SYMBOL vmlinux 0xc5b53505 eth_validate_addr +EXPORT_SYMBOL vmlinux 0xc5b65687 __elv_add_request +EXPORT_SYMBOL vmlinux 0xc5c6b4bf ps2_handle_response +EXPORT_SYMBOL vmlinux 0xc5d62dd0 inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0xc5d6e323 redraw_screen +EXPORT_SYMBOL vmlinux 0xc5e2a02a jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xc5eeb78e iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0xc6290f53 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc642b3c9 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0xc64b8442 copy_io_context +EXPORT_SYMBOL vmlinux 0xc659f267 kobject_init +EXPORT_SYMBOL vmlinux 0xc66fb53e seq_bitmap +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc68d13c5 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0xc68d684e mmc_align_data_size +EXPORT_SYMBOL vmlinux 0xc691d655 napi_get_frags +EXPORT_SYMBOL vmlinux 0xc69f896f km_state_notify +EXPORT_SYMBOL vmlinux 0xc6a6ca78 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0xc6d0c332 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xc6db7b8f scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0xc7131591 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc766dcd5 textsearch_register +EXPORT_SYMBOL vmlinux 0xc768de19 cpu_all_bits +EXPORT_SYMBOL vmlinux 0xc77d26d3 nf_register_hooks +EXPORT_SYMBOL vmlinux 0xc786aafa blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7cf6d9c scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0xc7e283a7 blkdev_put +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc7f6d75c __scm_send +EXPORT_SYMBOL vmlinux 0xc7fbe550 ip6_frag_init +EXPORT_SYMBOL vmlinux 0xc82d832a hci_send_acl +EXPORT_SYMBOL vmlinux 0xc84f0b6e cdev_index +EXPORT_SYMBOL vmlinux 0xc86f83f2 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0xc8803362 pci_select_bars +EXPORT_SYMBOL vmlinux 0xc88717c4 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0xc898625d atomic64_inc_and_test +EXPORT_SYMBOL vmlinux 0xc8989d16 dst_discard +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8b59ed3 simple_transaction_read +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8d834c8 uart_get_divisor +EXPORT_SYMBOL vmlinux 0xc8d989fe inet_accept +EXPORT_SYMBOL vmlinux 0xc8e58a5b d_splice_alias +EXPORT_SYMBOL vmlinux 0xc8fa6097 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0xc9382306 find_vma +EXPORT_SYMBOL vmlinux 0xc946787f pv_irq_ops +EXPORT_SYMBOL vmlinux 0xc96f22a8 input_register_handler +EXPORT_SYMBOL vmlinux 0xc9819d23 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xc987a7fd netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc99a71d3 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xca17d0c9 dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0xca197dc3 pci_set_master +EXPORT_SYMBOL vmlinux 0xca28fd58 input_release_device +EXPORT_SYMBOL vmlinux 0xca2a681b write_one_page +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca7d768e genphy_resume +EXPORT_SYMBOL vmlinux 0xca80bf0f bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xca8dc32f sync_page_range +EXPORT_SYMBOL vmlinux 0xca8e54e8 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0xcaa48376 __serio_register_port +EXPORT_SYMBOL vmlinux 0xcab31b1e i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xcaec183b skb_kill_datagram +EXPORT_SYMBOL vmlinux 0xcb349318 xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb6f491a tcf_hash_create +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb799c1a md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xcbcf8e3b dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0xcc01e75c __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc83fb18 sg_miter_start +EXPORT_SYMBOL vmlinux 0xcc923733 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xccab1247 netdev_state_change +EXPORT_SYMBOL vmlinux 0xcccb773b sock_no_getname +EXPORT_SYMBOL vmlinux 0xcce93912 ps2_init +EXPORT_SYMBOL vmlinux 0xccfcf67c ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0xcd2304ce scsi_register_driver +EXPORT_SYMBOL vmlinux 0xcd599ba9 __breadahead +EXPORT_SYMBOL vmlinux 0xcdbb76d7 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0xce059b48 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xce0f2d6f __neigh_event_send +EXPORT_SYMBOL vmlinux 0xce161a94 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce47f667 input_get_keycode +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce4d60fd i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce5d53b0 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0xce85f8e1 dev_open +EXPORT_SYMBOL vmlinux 0xce8d5214 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0xceb2c451 md_done_sync +EXPORT_SYMBOL vmlinux 0xcefc23ec pci_find_bus +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf0f0664 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf40a52a __mutex_init +EXPORT_SYMBOL vmlinux 0xcf5afe08 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcf8ec6eb __pagevec_release +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfcca4de netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xcfedcaf6 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd03899bc tcp_shutdown +EXPORT_SYMBOL vmlinux 0xd04839fb scsi_remove_target +EXPORT_SYMBOL vmlinux 0xd06d442e posix_unblock_lock +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd09ed584 find_get_page +EXPORT_SYMBOL vmlinux 0xd0c2800e __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xd0d8621b strlen +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd103d095 set_device_ro +EXPORT_SYMBOL vmlinux 0xd119b724 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd18a9194 dev_driver_string +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd1e890f9 kunmap_atomic +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd21d7ffe kthread_create +EXPORT_SYMBOL vmlinux 0xd23994cb blk_queue_ordered +EXPORT_SYMBOL vmlinux 0xd23cb5da inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xd24efc21 md_unregister_thread +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd2825e28 key_task_permission +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2a941d4 sg_init_table +EXPORT_SYMBOL vmlinux 0xd2c66edb tty_shutdown +EXPORT_SYMBOL vmlinux 0xd3188be5 thaw_bdev +EXPORT_SYMBOL vmlinux 0xd3298867 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0xd32e52c7 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0xd33c6769 skb_unlink +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd365dbee pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xd37787f8 pci_request_regions +EXPORT_SYMBOL vmlinux 0xd3788340 simple_unlink +EXPORT_SYMBOL vmlinux 0xd380d851 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd40d240b inet_add_protocol +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd42fb43c vmtruncate +EXPORT_SYMBOL vmlinux 0xd43594c5 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0xd4505e17 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xd454ff81 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xd46455fa find_lock_page +EXPORT_SYMBOL vmlinux 0xd4712819 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0xd4f31941 seq_open_private +EXPORT_SYMBOL vmlinux 0xd5198a62 generic_write_checks +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd53a8e9d posix_acl_permission +EXPORT_SYMBOL vmlinux 0xd55515f5 jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd59aa6d1 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xd59ca8b3 genphy_config_advert +EXPORT_SYMBOL vmlinux 0xd5cc646e mmc_request_done +EXPORT_SYMBOL vmlinux 0xd62560c2 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd648193a register_sysrq_key +EXPORT_SYMBOL vmlinux 0xd6656a9e pci_restore_state +EXPORT_SYMBOL vmlinux 0xd669c8ff blk_init_tags +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6ee725e block_read_full_page +EXPORT_SYMBOL vmlinux 0xd706eed9 pci_find_device +EXPORT_SYMBOL vmlinux 0xd746da45 pci_enable_device +EXPORT_SYMBOL vmlinux 0xd778a8ce posix_test_lock +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd789cb06 vfs_rmdir +EXPORT_SYMBOL vmlinux 0xd79641d4 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7ce444f mdiobus_read +EXPORT_SYMBOL vmlinux 0xd7d2e83e acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xd7d36d1a idr_find +EXPORT_SYMBOL vmlinux 0xd7d67687 get_io_context +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd7e84cd0 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xd7f5e646 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xd7fc39da xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xd80632cf key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xd82613c0 atomic64_sub_and_test +EXPORT_SYMBOL vmlinux 0xd8282ff0 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8412868 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xd8559740 dma_pool_free +EXPORT_SYMBOL vmlinux 0xd8722eff netif_rx +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8a65c38 atomic64_sub +EXPORT_SYMBOL vmlinux 0xd8d8f394 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8fdd59f ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0xd9079b31 journal_load +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd9117010 remove_proc_entry +EXPORT_SYMBOL vmlinux 0xd969be94 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0xd9801805 __inet6_hash +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9959248 blk_get_request +EXPORT_SYMBOL vmlinux 0xd996d859 idr_pre_get +EXPORT_SYMBOL vmlinux 0xd9b5b74a nf_hook_slow +EXPORT_SYMBOL vmlinux 0xd9c272aa mca_mark_as_unused +EXPORT_SYMBOL vmlinux 0xd9c5ea4c thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0xd9dcb259 xfrm_state_add +EXPORT_SYMBOL vmlinux 0xda08c0d7 pcibios_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda104a46 generic_permission +EXPORT_SYMBOL vmlinux 0xda1707be cdrom_mode_select +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda52b596 d_path +EXPORT_SYMBOL vmlinux 0xda5f1be1 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0xda6703d2 sock_no_connect +EXPORT_SYMBOL vmlinux 0xda79b8e1 journal_start +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8fd495 isapnp_write_byte +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdacc2b7c __locks_copy_lock +EXPORT_SYMBOL vmlinux 0xdad7be8b netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xdb16b715 rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0xdb2c8250 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb61dc67 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdb92a32a wait_on_page_bit +EXPORT_SYMBOL vmlinux 0xdba35354 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xdbae5929 rfkill_set_states +EXPORT_SYMBOL vmlinux 0xdbb9fa6f scsi_register +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbd05c51 write_cache_pages +EXPORT_SYMBOL vmlinux 0xdbd29d4a dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0xdbe7fec4 sock_wmalloc +EXPORT_SYMBOL vmlinux 0xdbeede9c generic_file_direct_write +EXPORT_SYMBOL vmlinux 0xdbf4621a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xdbf870f9 x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xdbfcb3e1 flush_signals +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc08a9b5 user_revoke +EXPORT_SYMBOL vmlinux 0xdc12bbeb pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc319cbc kobject_get +EXPORT_SYMBOL vmlinux 0xdc430264 cdrom_release +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc5a13e6 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xdc6500cd pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xdc66f53e input_set_keycode +EXPORT_SYMBOL vmlinux 0xdc6be454 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdc9574d4 dev_mc_add +EXPORT_SYMBOL vmlinux 0xdc97a330 journal_lock_updates +EXPORT_SYMBOL vmlinux 0xdcb688dd dev_get_flags +EXPORT_SYMBOL vmlinux 0xdcb978ae journal_wipe +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd1542d1 dma_pool_create +EXPORT_SYMBOL vmlinux 0xdd22e734 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xdd30a882 lro_flush_all +EXPORT_SYMBOL vmlinux 0xdd4399ba blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0xdd4efe8f inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xdd506fa8 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0xdd57a715 scsi_add_device +EXPORT_SYMBOL vmlinux 0xdd663868 prepare_binprm +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xdd706dbb get_write_access +EXPORT_SYMBOL vmlinux 0xdd8c7e0e __destroy_inode +EXPORT_SYMBOL vmlinux 0xddd19641 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0xde1fd694 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0xde6ba35a vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde8725bb bio_integrity_trim +EXPORT_SYMBOL vmlinux 0xde906238 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdeccc028 __bforget +EXPORT_SYMBOL vmlinux 0xded8bd9b fb_blank +EXPORT_SYMBOL vmlinux 0xdf02c279 register_key_type +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf3361c7 inet_csk_accept +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf4c908c sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xdf4e02f7 arp_find +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfb0f392 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfca473b d_invalidate +EXPORT_SYMBOL vmlinux 0xdfd08e47 inet6_release +EXPORT_SYMBOL vmlinux 0xe059d448 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe094ef39 sg_next +EXPORT_SYMBOL vmlinux 0xe0a501e3 idr_remove_all +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0b18ffd __splice_from_pipe +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0dbdfa1 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0xe0e177de neigh_event_ns +EXPORT_SYMBOL vmlinux 0xe0f105a3 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0xe0f485d5 blk_end_request +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe13e6e44 llc_sap_close +EXPORT_SYMBOL vmlinux 0xe1402288 dmam_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0xe141fb1b __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xe15aeee2 downgrade_write +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1798831 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0xe1845f01 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1b01db7 thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0xe1defd6f pnp_activate_dev +EXPORT_SYMBOL vmlinux 0xe1ff393d mark_page_accessed +EXPORT_SYMBOL vmlinux 0xe211ff0e scsi_mode_sense +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe2638a3b simple_rename +EXPORT_SYMBOL vmlinux 0xe2a70ca9 inet_ioctl +EXPORT_SYMBOL vmlinux 0xe2ac012b dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0xe2c1a52d neigh_table_clear +EXPORT_SYMBOL vmlinux 0xe2cca6d6 touch_atime +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe2fbd566 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xe3320900 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe38d4c2a pci_dev_get +EXPORT_SYMBOL vmlinux 0xe3a43e49 sk_free +EXPORT_SYMBOL vmlinux 0xe3f98015 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe401e1a1 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0xe414ef6e tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe47179b2 dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe488fa0f bt_sock_link +EXPORT_SYMBOL vmlinux 0xe48b38f2 kthread_bind +EXPORT_SYMBOL vmlinux 0xe48f3039 ida_get_new_above +EXPORT_SYMBOL vmlinux 0xe49465ab nf_register_sockopt +EXPORT_SYMBOL vmlinux 0xe4963fa6 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xe4aa3332 cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0xe4ab4b72 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xe4afa383 vfs_rename +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4c5141e scsi_host_lookup +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe4fddacd create_empty_buffers +EXPORT_SYMBOL vmlinux 0xe51e805d phy_device_create +EXPORT_SYMBOL vmlinux 0xe5220fb7 uart_add_one_port +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe52e3e31 open_by_devnum +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe57d741e icmpv6_send +EXPORT_SYMBOL vmlinux 0xe57f8875 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0xe58167e8 vfs_llseek +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5aab869 blk_sync_queue +EXPORT_SYMBOL vmlinux 0xe5b32e25 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5e840b5 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5ee11c6 skb_checksum_help +EXPORT_SYMBOL vmlinux 0xe5eff6da nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xe620d3e1 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0xe63769e6 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xe6474bc5 tcp_prot +EXPORT_SYMBOL vmlinux 0xe659b10c km_policy_notify +EXPORT_SYMBOL vmlinux 0xe6623613 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xe67c784c journal_update_format +EXPORT_SYMBOL vmlinux 0xe67fe41c nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe6985f63 pci_disable_device +EXPORT_SYMBOL vmlinux 0xe69aacf0 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0xe6a777a6 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0xe6af9c57 skb_pull +EXPORT_SYMBOL vmlinux 0xe6e89cde inode_init_once +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe7060497 simple_lookup +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe76f95ed tcp_child_process +EXPORT_SYMBOL vmlinux 0xe77d4ede neigh_seq_next +EXPORT_SYMBOL vmlinux 0xe79c78a4 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xe7be0aaf key_alloc +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe81eb024 journal_start_commit +EXPORT_SYMBOL vmlinux 0xe845a002 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xe8636e38 llc_add_pack +EXPORT_SYMBOL vmlinux 0xe86ade3d cad_pid +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe8a1172b vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8a3bda2 dev_get_by_index +EXPORT_SYMBOL vmlinux 0xe8a45b5f __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xe8c0a963 sock_sendmsg +EXPORT_SYMBOL vmlinux 0xe8c8e1db neigh_table_init +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914456a gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe93ab9a0 inode_permission +EXPORT_SYMBOL vmlinux 0xe93c54a0 unregister_binfmt +EXPORT_SYMBOL vmlinux 0xe943621e unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0xe96848c0 journal_dirty_data +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe9bd1d3f ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xe9e30394 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xe9e8b6a7 vc_cons +EXPORT_SYMBOL vmlinux 0xe9fd6baf thaw_process +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea07d84e block_sync_page +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea29c45e pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea3adda4 inet6_getname +EXPORT_SYMBOL vmlinux 0xea4818cd try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xea512117 __bio_clone +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xea88dd66 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xea9e34ad mmc_register_driver +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeaf5615f xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xeafb5485 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0xeb183be0 locks_remove_posix +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebb5d87b generic_writepages +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebee107c blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0xec0cc62e generic_listxattr +EXPORT_SYMBOL vmlinux 0xec30b392 ppp_input_error +EXPORT_SYMBOL vmlinux 0xec490c1e uart_register_driver +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec849142 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xeccabe22 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xecdaeba6 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xed0b70e2 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xed24f002 elv_abort_queue +EXPORT_SYMBOL vmlinux 0xed2cad9b uart_resume_port +EXPORT_SYMBOL vmlinux 0xed302153 phy_device_register +EXPORT_SYMBOL vmlinux 0xed3516af tty_unthrottle +EXPORT_SYMBOL vmlinux 0xed57d087 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xed777913 sock_create_kern +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb5172a pnp_start_dev +EXPORT_SYMBOL vmlinux 0xedb8389f poll_freewait +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedd6355f tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0xedf44b3e journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xee1050fe journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xee24878f tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee7446c1 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeb6fde9 dev_close +EXPORT_SYMBOL vmlinux 0xeec3f992 generic_readlink +EXPORT_SYMBOL vmlinux 0xeeca41df pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xeecb865a dquot_free_inode +EXPORT_SYMBOL vmlinux 0xeed59bbc dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xef282cd6 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xef2d8d70 dquot_drop +EXPORT_SYMBOL vmlinux 0xef3bd862 mca_find_unused_adapter +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef92a1a3 input_event +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefa60bac tty_hangup +EXPORT_SYMBOL vmlinux 0xefa78125 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xefac16f7 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xefb0083e set_bh_page +EXPORT_SYMBOL vmlinux 0xefc9acc9 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefdfe545 sockfd_lookup +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xefe7890b iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0xeff14be9 ioremap_cache +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf038c38f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf081d065 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xf09c1bde release_sock +EXPORT_SYMBOL vmlinux 0xf0bf9ff9 kfree_skb +EXPORT_SYMBOL vmlinux 0xf0e7058a vm_map_ram +EXPORT_SYMBOL vmlinux 0xf0e79b01 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f2c951 lease_modify +EXPORT_SYMBOL vmlinux 0xf0f7884b xfrm_register_type +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf101d0fb serio_unregister_driver +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf12c759e get_phy_id +EXPORT_SYMBOL vmlinux 0xf13e47ef do_sync_write +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf19c210f skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xf1b5fd3e default_file_splice_read +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1d75f0f d_prune_aliases +EXPORT_SYMBOL vmlinux 0xf1d9430b tcp_connect +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf252f128 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xf2664af4 bitmap_unplug +EXPORT_SYMBOL vmlinux 0xf290d791 security_path_unlink +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2a726c8 netlink_set_err +EXPORT_SYMBOL vmlinux 0xf2d693f6 sock_rfree +EXPORT_SYMBOL vmlinux 0xf2e74040 mca_set_adapter_name +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf3463206 path_lookup +EXPORT_SYMBOL vmlinux 0xf34a8e95 scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xf34e9b29 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xf350dfdc sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0xf37adcf0 bio_kmalloc +EXPORT_SYMBOL vmlinux 0xf37cab51 sock_init_data +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3a0c7c9 pci_disable_msi +EXPORT_SYMBOL vmlinux 0xf3b01a60 free_task +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3cc95cb nf_ct_attach +EXPORT_SYMBOL vmlinux 0xf3f93791 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xf4219a37 dentry_unhash +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4438c81 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xf45d1357 tcp_poll +EXPORT_SYMBOL vmlinux 0xf45f2468 uart_suspend_port +EXPORT_SYMBOL vmlinux 0xf48a2c4c MCA_bus +EXPORT_SYMBOL vmlinux 0xf4922a78 netdev_features_change +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4ae9d51 ida_pre_get +EXPORT_SYMBOL vmlinux 0xf4c0cfcc pci_save_state +EXPORT_SYMBOL vmlinux 0xf4c42748 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xf4c9af62 __invalidate_device +EXPORT_SYMBOL vmlinux 0xf4e43339 km_report +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf502d273 acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf5212fe8 mem_map +EXPORT_SYMBOL vmlinux 0xf535145d mmc_free_host +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf5503ec7 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xf572db24 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0xf58c43a2 vfs_quota_on +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5ce0393 revert_creds +EXPORT_SYMBOL vmlinux 0xf5da9dd5 i2c_release_client +EXPORT_SYMBOL vmlinux 0xf5dae7e2 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf5fdbfd5 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xf60e98c1 md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0xf61ac789 bio_integrity_split +EXPORT_SYMBOL vmlinux 0xf62b887a simple_link +EXPORT_SYMBOL vmlinux 0xf6580e00 tty_set_operations +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6e00b12 bdi_register +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf728f2f1 dquot_alloc +EXPORT_SYMBOL vmlinux 0xf73f71ec inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xf75837dc qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0xf761d048 user_path_at +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf77d4b1f scsi_print_command +EXPORT_SYMBOL vmlinux 0xf78328b2 bdi_register_dev +EXPORT_SYMBOL vmlinux 0xf786ef5e idr_init +EXPORT_SYMBOL vmlinux 0xf78b61d6 dma_release_declared_memory +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf791816b dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xf7a1d9eb override_creds +EXPORT_SYMBOL vmlinux 0xf7b291cd remove_arg_zero +EXPORT_SYMBOL vmlinux 0xf7be5ad3 igrab +EXPORT_SYMBOL vmlinux 0xf7c1fa02 cdev_alloc +EXPORT_SYMBOL vmlinux 0xf7c608c4 unlock_rename +EXPORT_SYMBOL vmlinux 0xf7fd68bf k8_northbridges +EXPORT_SYMBOL vmlinux 0xf80b098e call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf843e1cd acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0xf85b8214 tty_write_room +EXPORT_SYMBOL vmlinux 0xf85c4d88 keyring_search +EXPORT_SYMBOL vmlinux 0xf8704c29 security_path_rename +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8caaaad md_write_start +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8ea19bb find_inode_number +EXPORT_SYMBOL vmlinux 0xf8eac879 audit_log_end +EXPORT_SYMBOL vmlinux 0xf8f13a0f __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xf900574c __bread +EXPORT_SYMBOL vmlinux 0xf9152d22 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf937c48a journal_ack_err +EXPORT_SYMBOL vmlinux 0xf940a328 __next_cpu +EXPORT_SYMBOL vmlinux 0xf9497b19 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xf968860e pci_choose_state +EXPORT_SYMBOL vmlinux 0xf97f5266 hci_conn_put_device +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b8793c lock_sock_nested +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa0fa07e pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xfa21b73f acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0xfa62bd8a kill_block_super +EXPORT_SYMBOL vmlinux 0xfa69bbe8 unregister_8022_client +EXPORT_SYMBOL vmlinux 0xfa97a4bb blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xfacb5042 bitmap_endwrite +EXPORT_SYMBOL vmlinux 0xfad40eb7 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xfaf55ec8 llc_sap_find +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb113c7c simple_transaction_set +EXPORT_SYMBOL vmlinux 0xfb6287e2 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb71c319 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xfb90d3c0 elevator_init +EXPORT_SYMBOL vmlinux 0xfb943446 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfbc36f8f nla_reserve +EXPORT_SYMBOL vmlinux 0xfbcbda1e blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc05bf57 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xfc0919fe nla_append +EXPORT_SYMBOL vmlinux 0xfc11c73c dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc3da3be set_blocksize +EXPORT_SYMBOL vmlinux 0xfc45328d sg_miter_next +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc764f62 inet_getname +EXPORT_SYMBOL vmlinux 0xfc9bd4d8 generic_file_mmap +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfce17454 dev_alloc_name +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcecac32 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd4d885f dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xfd5be890 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfd85307e dm_put_device +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdac8610 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfdc6f4f3 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdf5caa2 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe06afb9 __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xfe071d51 md_check_recovery +EXPORT_SYMBOL vmlinux 0xfe14861c kernel_bind +EXPORT_SYMBOL vmlinux 0xfe1a30c2 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0xfe44ea9a eisa_bus_type +EXPORT_SYMBOL vmlinux 0xfe4aad23 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0xfe5040e5 hci_register_dev +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe660fdd scsi_host_get +EXPORT_SYMBOL vmlinux 0xfe759014 key_link +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe865547 inode_set_bytes +EXPORT_SYMBOL vmlinux 0xfe8e7c8f xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xfead4745 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xfec25a42 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfed00b3d default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xfed121b4 mca_device_transform_memory +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee9f0c5 pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0xfef265d4 scsi_register_interface +EXPORT_SYMBOL vmlinux 0xfef80731 dm_table_get +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xfefb46d4 hci_free_dev +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff2c4699 fb_find_mode +EXPORT_SYMBOL vmlinux 0xff338864 mca_device_write_pos +EXPORT_SYMBOL vmlinux 0xff480992 dump_fpu +EXPORT_SYMBOL vmlinux 0xff5e8a95 mca_device_transform_irq +EXPORT_SYMBOL vmlinux 0xff65f9fe hci_alloc_dev +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff9630a3 handle_sysrq +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffafdc5c _read_unlock_irq +EXPORT_SYMBOL vmlinux 0xffb136e1 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0xffc0d4f1 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xffc7c184 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffdb82bc sg_free_table +EXPORT_SYMBOL vmlinux 0xffee7302 sync_inode +EXPORT_SYMBOL vmlinux 0xfff27ba7 open_bdev_exclusive +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a crypto_aes_encrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491 crypto_aes_decrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81 ucode_cpu_info +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935 kvm_disable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0205b1c5 kvm_release_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x02748649 kvm_read_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x04f82ba4 kvm_emulate_hypercall +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4 kvm_get_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0a2f26fc fx_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0c56cd8d kvm_mmu_page_fault +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d4c10f4 kvm_cpu_get_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x10f9450a kvm_lapic_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x11161d01 kvm_report_emulation_failure +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b kvm_release_pfn_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1381e414 kvm_cpu_has_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x14f3b3a6 __kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x174461da kvm_get_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1772fcce emulator_write_emulated +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1bf05eca kvm_inject_nmi +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1cf10152 kvm_queue_exception +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1d626c1a kvm_resched +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb kvm_release_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039 kvm_set_pfn_accessed +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x26f4372a kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2afaa6ac kvm_load_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x336c60bb kvm_put_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4107b535 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a4afdf3 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x52e50fdc kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5365e749 emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x53d9e8c3 gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x54c31101 kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x560156e0 kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x60b167d1 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x633e55d9 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x640cc9c0 kvm_task_switch +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x677240e4 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6890bb31 kvm_write_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6c1477b0 kvm_set_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6c6fd59f kvm_set_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6e9d9cf3 kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x731232c4 kvm_get_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x73decc33 kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x796e24b0 gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x79e201d6 load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7c3c235f kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x88def0cb kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e603c3d kvm_emulate_pio +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ff5e1eb kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x91c02dc3 kvm_set_cr3 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9d5c58e6 is_error_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa36daaf2 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaa1fb5a1 kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae3e3aa1 kvm_mmu_load +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae76e695 kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb3099f72 kvm_clear_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb4dd3bf2 kvm_set_cr4 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb5f04b00 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc151032 kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc116b2eb kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc68810d1 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea9998d kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcee6d9ad kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9 kvm_is_error_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd63084ae kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd73e1792 kvm_emulate_pio_string +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd79f9324 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd9eaf48e kvm_emulate_cpuid +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdbe6944f kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe2e12fa3 kvm_mmu_invlpg +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe50c0d86 kvm_lapic_set_tpr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed8e7f43 kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xef724c8f kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf1dc31aa kvm_lapic_get_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf6b068db kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf8098f06 kvm_emulate_halt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfcc5fbd9 gfn_to_pfn +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x142f878e crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key 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drivers/mtd/mtd 0x87fbe70d default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8859299f kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x922553a4 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x935a4383 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcaba587a register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd96ad0ef get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd9ea8abe unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x31ce1dba register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9aab40e5 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xcf631fb0 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xfac9e248 deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x178a750f nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1efeb0a2 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x2922f003 nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x9a9b2b02 nand_release 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drivers/net/usb/usbnet 0x16a00a37 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2390f816 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x38402a3d usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x41dbc265 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4e41f315 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5088069b usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x52551f74 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x557612e7 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x569a219d usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x626b39bb usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6bd5a48e usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x73551fc3 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7546f662 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb8c36bc0 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc83f74bf usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd469c88a usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe2431a74 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf78ebe1d usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfb935dd5 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0a8e1043 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x11bc50bc i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2573dc1f i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2f79c6a6 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8b5221ea i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x90bcdd5d i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9ee2e806 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa00e4b84 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa460ddb5 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xae56ea76 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xbac403da i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc65cfb3c i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd52f6b31 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x0f6fcfc2 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0c9f4e34 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2ebb2590 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2ebf2166 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x40ee2f07 lbs_add_card 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drivers/net/wireless/rt2x00/rt2x00pci 0xa8368977 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xabceb959 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xdbd33342 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf8281205 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xfed71e79 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1251ee74 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x16d829eb rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x23c166f8 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3e1b92e8 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4578f76b rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5139f0dc rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x93257680 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x97d992ba rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb18076ac rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb6d643d6 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd78519fe rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd93efcdd rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe1566c44 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe3f4f411 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe82979e1 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf3cf2d2a rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x8338f402 acpiphp_register_attention +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x9f92f760 acpiphp_unregister_attention +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x4027a1e8 pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x6aba80ec pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0dbe6e9b wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5e61f80f wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xaafaa39f wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc03cbcef wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd8da4f9d wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf76d8b77 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x5b53de02 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x0ac076f8 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x088864bd iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0ab1b312 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x15309961 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2245386f iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x265cf363 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x285fe0e3 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x31326c90 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3573cd0b iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3a962a68 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41d7443e iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x48239331 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4bedc652 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4de17c84 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x550aa010 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5ba6d52b iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66cde3ba iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6ff8f3d8 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x712ce428 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7dd12c7a iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x81e4ecab iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x887cbfb9 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93180960 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x95f12085 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x97e129ae iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9d85103d iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa1bc2122 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa3751e4a iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb3598fe7 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbcafc634 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdb3b7886 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdbefacaf iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdebd2d44 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe4f4397f iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe64564bf iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe9b07222 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xee23a342 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf209d40f iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfde1286a iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x04d5e148 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x13103f43 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1391a807 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x23318ff6 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x254f678a iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2907951d iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x84c188c8 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa0e75055 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa8c8bd8f iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb68d3a4e iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb745fcf9 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb8e08071 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbcd0b69a iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe52d2cf6 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf5e9a947 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfb6e4012 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1b87c3ef sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x30ba3ccb sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x397daa87 sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x499f309b sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x49c0600f sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5a19d399 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f5bfbb0 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6f28135f sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8dca45f5 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa96e6579 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab6b9339 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaf57000b sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaf8333ab sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xafcada74 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb3469c80 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbbd0a1ef sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbfaec8c0 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc0280edf sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc283d9dc sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc28f3ade __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc3982def sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcb72afff sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfe5f6a18 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0c9b8503 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x36040838 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3740ba60 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x45fb4fb1 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5be25bb6 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7994c7f0 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x0ef58e89 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x26a69062 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x66d4b231 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x920fc35e scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9edcc205 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xae3e37d8 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb4de73b5 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe21f4736 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfa8170f9 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x079dac8a iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0a14d0f7 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x21549e8c iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6dfb46dd iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x77834b94 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x80a509c6 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8b334cce iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b156c92 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9daab7d0 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9ed7b741 iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa14c6fc2 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa2d6a64a iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xafce0230 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb0926f79 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbcff6b56 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc8e04d6d iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcb582ec1 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xccc9268a iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdb51905a iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeb81e75e iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf62dfdaf iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf9080780 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x26f28073 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x42ecb2ae srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x7a82a450 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xadcdc341 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xeafdf11c srp_release_transport +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb5723c56 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xbed0640d spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc9752027 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xf50b0a4c spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfcf31ecc spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xffe38013 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x01429a3f comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xd67bd642 comedi_alloc_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x770de6c8 das08_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x7eb71183 das08_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20 das08_cs_boards +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95 labpc_1200_is_unipolar +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x38bffdc5 labpc_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a range_labpc_1200_ai +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347 labpc_1200_ai_gain_bits +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xfe79287a labpc_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x17a8db46 ni_tio_init_counter +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x271cc9b9 ni_tio_arm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x75d8538e ni_tio_rinsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xafb5f4b5 ni_tio_insn_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xcc712e9c ni_gpct_device_construct +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe8ed36f5 ni_tio_set_gate_src +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf03aebff ni_tio_winsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xfbeaa87b ni_gpct_device_destroy +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x016e9473 ni_tio_cmd +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x39636958 ni_tio_cancel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x50bc1e72 ni_tio_acknowledge_and_confirm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x8463ea58 ni_tio_handle_interrupt +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9c6392e8 ni_tio_set_mite_channel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xec41c21d ni_tio_cmdtest +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b oslec_flush +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1 oslec_free +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747 oslec_update +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x03ec4bc1 usbip_dump_urb +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0ae7970b usbip_alloc_iso_desc_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x1906e4ef usbip_stop_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x22c2bf5b usbip_xmit +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x4c64c0d8 sockfd_to_socket +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44 usbip_debug_flag +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x88b0ccaa usbip_start_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x8f87a0ab usbip_event_add +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x961c5efc usbip_event_happend +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc0e886e9 usbip_stop_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcbb95286 dev_attr_usbip_debug +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xccac21c6 usbip_start_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcf5b16f0 usbip_recv_xbuff +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc usbip_header_correct_endian +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586 usbip_dump_header +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe68cb4a6 usbip_pack_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xec1a0b4e usbip_task_init +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfbc95a21 usbip_recv_iso +EXPORT_SYMBOL_GPL drivers/uio/uio 0x368c0b3e uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x5bf49f84 uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0x753b6cd8 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x2c955d3c usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf003507b usbatm_usb_probe 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usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x16009564 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1aa416ee fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2b5953d2 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x369aa860 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3a260b17 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6af77630 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6d25138e usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x85118fd8 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8a28a385 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x91e8ab21 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa2bbe611 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb44472bc usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb80b0b5a usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc347fd4a usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc8413458 usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xce0952ee usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xddc97671 usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xddf01e7a usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdf67cb87 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe6da1204 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe939f3f2 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf6ee93ec usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfb8b4c70 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x0e788342 __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x90e8e90f rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xcaa82f49 wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xd383e480 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf183f7fd wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0f054e12 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1801c722 wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1be6c6fc wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x28a07449 wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5598884d wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8d6cc86c wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x93500119 wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9c86eb33 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9cf7b5f0 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa4b0335d wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa7550bbe wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa8ebf9c4 wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xab03f1c8 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbc1f8146 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd826dda6 wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfcc16fe5 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2acccf7a i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4763b3da i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x6bf6b063 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x279dca66 uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8d8779b6 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9f50bebb uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa47da528 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb950c057 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xeb83a30f uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xed5d912c uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf25cddb5 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0b980a27 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2383220d umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x304136f7 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3b2614a1 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3c6589d7 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x814a6785 umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa69dd1bf umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xcb626f3e __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x053932e4 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0dec40a4 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c24edfe uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x20f8569a uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2180673b uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x248cfe1a uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2fedbb30 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x36ecada9 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x54140dd1 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x55d573a8 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x55df079e uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58cf5c3b uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5ac909a6 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b65b17a uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7beca2fc uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x892420bd uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8b817e4b uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8c1da550 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x97808e8e uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c8a952e uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9fef6713 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5445970 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7290732 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7c7af48 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaafccd4b uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafc2f5ed uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba7b842a uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce78f35a uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd4b012f2 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd574aa1d uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdba34317 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdff7e92e uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe31ecf43 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4268e38 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xec935ef8 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0650c32 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf6a1bf1b uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xc0ce9531 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e963081 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x15a3e641 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x33746104 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3bb64662 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x45f9a4c5 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x460992fd wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4a30564c wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x542d4505 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5942790e wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x59a071ad wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5bda9533 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6b548c59 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79bfd383 wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79c9a3e7 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7c4ee5e4 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8a4e7d1f wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8ce09c67 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x964841d5 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa330e283 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa78d36d7 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa7dcdafe wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa8024641 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xad1c5ae9 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbd9e456c wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbfa79fbe wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc7385720 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc8891d9c wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xce244ae9 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd76e3631 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe63e8722 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xebd86f35 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf393e7f7 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x01bd310b ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1fe423cb ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2bd224be ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x312eecd7 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x42a026b9 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x952f090f ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc6376030 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x29c7351d fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xc69eb556 fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xdd809242 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x4b4ae54b sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x94298340 sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x074dc902 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x59ed8769 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x5aa07e00 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xe4e13cf1 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xedebd1cb unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0c1a0267 vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x71fcc575 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xafe8900d vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2b2a4a27 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2c897f37 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x5dd55f34 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9207f4e3 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xafde72f0 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd4e82c1 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe164307a w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe6e15fe6 w1_touch_block +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa33e5efe dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xacd71ef3 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xbf475c24 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xc51bfb70 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xed852410 exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x03976c59 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x354de32f fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x5e08bccf fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x6e9c1cab fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x773d5327 fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x784028a9 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0x7aa9c35c fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x998559e3 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xa24c4f73 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xa6a7d175 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xa7180f9c fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0xaae530cf fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xae57523d fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xc4b7a125 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0xdb128a01 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xde3d23cb fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xebe05cd6 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xf53151ed fat_getattr +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0ddeaf26 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1116dde8 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7f87f287 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x93d3acc4 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x984065a8 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x1e317bfb nfsacl_decode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xaa094348 nfsacl_encode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2dfb1017 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x47449d62 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x5bbd5b90 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x66be2541 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6c826352 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xc38c99c2 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf0f86473 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x65b0688f dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9b985bed dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa5582981 dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa617fc9d dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa9b9f608 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe2ad8970 dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0dd4d45e ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x8ebbc063 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc72c9aa4 ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670 lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27 lzo1x_decompress_safe +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x0e3357f9 garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0x68fd5fa8 garp_request_join +EXPORT_SYMBOL_GPL net/802/garp 0x72a4a8c1 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x994e8a40 garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0xc77c954b garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0xe10b7e0b garp_unregister_application +EXPORT_SYMBOL_GPL net/802/stp 0xafa10969 stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 0xb5666277 stp_proto_register +EXPORT_SYMBOL_GPL net/ax25/ax25 0xa34c5c9d ax25_register_pid +EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05 ax25_bcast +EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e ax25_defaddr +EXPORT_SYMBOL_GPL net/dccp/dccp 0x096290a1 inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0bacf8e0 dccp_create_openreq_child +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0f2ec72f dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x19b2e950 dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0x19c90e80 dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1a55e129 dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1f9225c5 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x21e7396c dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3173e17d dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x37f654db dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3c2289fd dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4270fe9e dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0x49feb064 dccp_sendmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x50a8f7ca dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x61f1236b dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6ed13a2f dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0x704d2594 dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967 dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x735127e1 dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7b46a8bd dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8443c10f dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8a628b3c dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9882691b dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9bca36ad dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa33f3874 dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa7abd579 dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb6e6cfa0 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbc4075a2 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbf28198a dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc462f4de dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc7238c3d dccp_send_sync +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe36c6543 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xed267eee dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xf3d7d0b0 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x051082fe dccp_v4_do_rcv +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3a7e7a70 dccp_v4_request_recv_sock +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3bb85fc8 dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3fb2aa35 dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xcce2e638 dccp_invalid_packet +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe6dea9ef dccp_v4_conn_request +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x02f8514e nf_nat_seq_adjust_hook +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921 need_ipv4_conntrack +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10 nf_defrag_ipv4_enable +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6 nf_nat_proto_in_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x41e9e73a nf_nat_proto_range_to_nlattr +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x49d6f462 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7c93e538 nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7df19098 nf_nat_proto_put +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x89f77601 nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134 nf_nat_proto_nlattr_to_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe550b62a nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf14e5165 nf_nat_proto_unique_tuple +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x075a7a17 tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x291418fc tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x41bb8124 tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x921e6fa8 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf2118599 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x6842aafe ieee80211_iterate_active_interfaces +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xc6520325 ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a net_vs_ctl_path +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03040abf nf_conntrack_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03e98bea nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd nf_conntrack_lock +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd nf_ct_port_nla_policy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x08efaa0d nf_conntrack_helper_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0defd480 nf_ct_iterate_cleanup +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1830ebca nf_conntrack_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1c37ea46 nf_conntrack_helper_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1fe1fbb3 nf_ct_l3proto_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1ff3dac7 nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x280f49b1 nf_ct_invert_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2921a94e __nf_ct_refresh_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3127194f nf_conntrack_in +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x32a628bc nf_conntrack_flush_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x33a27abe nf_conntrack_hash_insert +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3dc020f1 nfnetlink_parse_nat_setup_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415 nf_ct_port_nlattr_to_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x427164e5 nf_ct_l3proto_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x42e63558 nf_conntrack_l4proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x46f8f45a __nf_conntrack_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x470044b6 nf_ct_expect_register_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b024096 nf_ct_expect_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9 nf_ct_alloc_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x56c7fb75 print_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x583aa7f0 nf_ct_nat_offset +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33 nf_conntrack_set_hashsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5f16f9fb nf_conntrack_register_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c nf_ct_port_nlattr_tuple_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6a86ee80 nf_ct_delete_from_lists +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6cf764f1 nf_conntrack_l3proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6da90fbf nf_conntrack_l4proto_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a need_conntrack +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6f1bb43b nf_ct_expect_unregister_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7356ad30 nf_ct_expect_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710 nf_ct_l3proto_try_module_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7ac0ad8e __nf_ct_l4proto_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7d05874b nf_ct_extend_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8cbf8559 nf_ct_unexpect_related +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8e0ccd2d nf_conntrack_alter_reply +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89 nf_conntrack_htable_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f nf_ct_invert_tuplepr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x92f31217 nf_expect_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x944d5aa0 nf_conntrack_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1 nf_ct_free_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9c128704 nf_ct_extend_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9d129340 __nf_ct_kill_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9e55199e nf_conntrack_untracked +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa50fae72 __nf_ct_try_assign_helper +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa683fa98 nf_conntrack_l3proto_generic +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaa4d63b5 __nf_ct_expect_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb2313b82 seq_print_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4f67990 nf_ct_remove_expectations +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 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__nf_conntrack_helper_find_byname +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xeea8b7b1 nf_ct_deliver_cached_events +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xef3f110f nf_conntrack_l4proto_tcp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf2a755d1 nf_ct_helper_ext_add +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf34d7af3 nf_ct_expect_related_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3 nf_conntrack_max +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf58017a8 nf_ct_unlink_expect +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfaa97b7e nf_conntrack_l4proto_udp6 +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfb9cbf1c __nf_conntrack_confirm +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe53cf22 nf_ct_get_tuplepr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x2b5cb5e3 nf_nat_amanda_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x7311a2d2 nf_nat_ftp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x03cd38db nat_q931_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x251e3847 get_h225_addr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x367b888d nat_h245_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x37eb5068 set_h225_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x5ced416c set_ras_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x8e54dd87 nat_rtp_rtcp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x98932464 set_h245_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xaf8336fc set_sig_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd395bfe3 nat_t120_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf3e1a6c3 nat_callforwarding_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x79ef24bc nf_nat_irc_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x0fc67e7b nf_nat_pptp_hook_inbound +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x1926ae01 nf_nat_pptp_hook_exp_gre +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x6ce6a128 nf_nat_pptp_hook_expectfn +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xdf250023 nf_nat_pptp_hook_outbound +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x8aa42d75 nf_ct_gre_keymap_destroy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0xdcc8ec98 nf_ct_gre_keymap_add +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x1c38fd45 ct_sip_get_sdp_header +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x376ec349 ct_sip_parse_request +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3bf95ac3 ct_sip_get_header +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3f6f67dc nf_nat_sdp_media_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x63f8fb8f ct_sip_parse_header_uri +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x7744051f nf_nat_sip_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x7c1da067 ct_sip_parse_address_param +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x7f685843 nf_nat_sip_expect_hook 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cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x06e01118 cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x093b98c8 cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2c12c654 cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2cdffa36 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3457e08e cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x353658f8 cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3c882011 cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3cc7bef5 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x464bf8cc cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x52b311f2 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x749b24b6 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9e0c7862 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa1daa41b cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa29ad5dd cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa7f528a0 cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbe480471 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc0f39307 cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd007d940 cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe2fb65b9 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe3b55f70 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe88548a4 cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xec774dcc cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfaad97d2 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfd4f3ccf cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x5a1a0bcc ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8a2b0a11 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xc0fd5525 ipcomp_init_state +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xda40c532 ipcomp_destroy +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01fb738a snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x089766b2 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0e75524d snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f2f80d5 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10e6e5f7 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11183dbf snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14790aac snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b0f4453 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b18ab7f snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x207229db snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21519983 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x239df3af snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27f65a69 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2f234ec8 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3319c654 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x35c2d846 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x37c74e1e snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b81576d snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b84aedb snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3f4f94ea snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ceb3473 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4de6ffd7 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x51d2266f snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55770f35 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x57301290 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x67af79fe snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x689f431d snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c49b381 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70045894 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70e39431 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x71c2a6d1 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7355aff6 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x764f41da snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d51d0ef snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7dc8a16a snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f5cce8e snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80947ee0 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80e305c6 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85b8b7ae snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x868fa25b snd_hda_get_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e38d35c snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x91d4c101 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9227329b snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x966c2cfe snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b5e99ea snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d0c257b snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d275cfb snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f9492d7 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa9d5735b snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xadbc1e52 snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb184ee02 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb1e7ab7f snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4d586da snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf71e860 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbffcf86e snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc1d5dbd8 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc31811a3 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcaf677a4 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd8046b9 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd43a0a61 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd4e9de31 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdbbe4013 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe07fea28 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0c5c1fa snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe10be68e snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe291a555 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe69c4366 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed92780e snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xedbb8eae snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf21b6a70 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf4432d98 snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf9428488 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfd59f9b6 snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xad72b936 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xdc7bb17e soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x9c496af2 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x3f97b307 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x4f192bee ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x8d4bef8a cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x97c58742 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xb2354638 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xc66deb44 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x1bd26ea1 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xcdd8ee8f soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x06df7b31 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x805fa06f soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x1876105a aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xa7a35076 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x0a6757a3 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x64d221e9 aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x7b18c04c soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8b5370f2 aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa76e5c41 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb9f5dfc5 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xdcad355d aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x62556687 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x9fb5e443 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xa3ed0082 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x2df59194 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x92573ceb soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x3879745e soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x3b676da6 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xac478f7a wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x639a4b18 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xa3658e0c soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x252226af wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x56c334c4 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x59120f4b soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x8f4d8d6d wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x3655c81e soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbabcb922 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x3bc4e35e wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe6551960 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x934805c1 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xfbc35493 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x8461e562 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xd0ee0750 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x1dd7e14b soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd4fa3854 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x36fab288 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x526e4afa wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x1ade4997 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x20b51c47 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x195a9df9 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xb72a0d6e wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x0183c68f soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xda01d57f wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x0b46f45e wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xdb1d3afb soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x1206dac4 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x41627d87 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x247daafe wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x4ab7e788 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x08986c67 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x08e6374a snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x091f1611 snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09234d3d snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0a076d58 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c7cb5f4 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1766a2ad snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2463b0ce snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2bee4055 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3312206f snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3431f13e snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x38731680 snd_soc_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3c580fc5 snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x41f4b599 snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x42dc9307 snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x431cddae snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x49f409b6 snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50116d41 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x54b4f2ee snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ce31ac1 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x613d9768 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x61948fe2 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x623b7d42 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x780c3f2f snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x78819198 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7f31a13c snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x80caadda snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83f92e22 snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x85cba5c0 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x873d0035 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x89d8aeb2 snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8ba68ab9 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9375f988 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x948cd5a4 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9545086a snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x95c39de2 snd_soc_jack_new +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96085b8b snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x98feb63d snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9b28611b snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa17425f7 snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa5b68376 snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa5ff4604 snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa3e922f snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae32835f snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb0e7e45e snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4af087b snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbb02d596 snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc008cde7 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc9e6ee6e snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcf150fed snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd4cae132 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd631356a snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd69df25b snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd7ce2ec3 snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdd70ac97 snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xde4e73a0 snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdf50c383 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe68c81b1 snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe6bcf642 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe8c27357 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xeba4e1d7 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf04040d1 snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf0e87671 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf58d6cb5 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf930f6fe snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfc71ab04 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attribute_container_register +EXPORT_SYMBOL_GPL vmlinux 0x5a169515 ata_scsi_simulate +EXPORT_SYMBOL_GPL vmlinux 0x5a343b8c aead_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0x5a37ed92 platform_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0x5a7a4468 ata_link_online +EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41 crypto_probing_notify +EXPORT_SYMBOL_GPL vmlinux 0x5a9ea568 tty_ldisc_deref +EXPORT_SYMBOL_GPL vmlinux 0x5ae2563a blk_queue_dma_drain +EXPORT_SYMBOL_GPL vmlinux 0x5aeec218 dma_release_channel +EXPORT_SYMBOL_GPL vmlinux 0x5b85559e platform_device_add_data +EXPORT_SYMBOL_GPL vmlinux 0x5bc78cae usb_remove_hcd +EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3 unregister_keyboard_notifier +EXPORT_SYMBOL_GPL vmlinux 0x5c57c2a6 dev_set_name +EXPORT_SYMBOL_GPL vmlinux 0x5c949e71 acpi_smbus_unregister_callback +EXPORT_SYMBOL_GPL vmlinux 0x5cc9a982 power_supply_register +EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57 kbd_table +EXPORT_SYMBOL_GPL vmlinux 0x5d14eaf9 kobject_rename +EXPORT_SYMBOL_GPL vmlinux 0x5d290994 bt_class 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0x6d8f87f0 unregister_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0x6da4b215 regulator_put +EXPORT_SYMBOL_GPL vmlinux 0x6e3da097 ata_sff_dev_select +EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc xfrm_ealg_get_byid +EXPORT_SYMBOL_GPL vmlinux 0x6e7d9701 securityfs_remove +EXPORT_SYMBOL_GPL vmlinux 0x6e88e3d0 inotify_rm_watch +EXPORT_SYMBOL_GPL vmlinux 0x6e9b8766 regulator_get_current_limit +EXPORT_SYMBOL_GPL vmlinux 0x6eaa74a6 mmu_notifier_unregister +EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee klist_add_head +EXPORT_SYMBOL_GPL vmlinux 0x6ee243eb cpufreq_register_driver +EXPORT_SYMBOL_GPL vmlinux 0x6ee8538e inotify_add_watch +EXPORT_SYMBOL_GPL vmlinux 0x6ef31038 dm_region_hash_create +EXPORT_SYMBOL_GPL vmlinux 0x6f0c693a get_device +EXPORT_SYMBOL_GPL vmlinux 0x6f127f56 usb_deregister +EXPORT_SYMBOL_GPL vmlinux 0x6f27901d elv_register +EXPORT_SYMBOL_GPL vmlinux 0x6f79e084 securityfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0x6f7c7ff3 blk_abort_queue +EXPORT_SYMBOL_GPL vmlinux 0x6fae142a ata_sff_softreset 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vmlinux 0x738af366 proc_net_mkdir +EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a ata_sff_std_ports +EXPORT_SYMBOL_GPL vmlinux 0x73c08134 usb_autopm_set_interface +EXPORT_SYMBOL_GPL vmlinux 0x7405fb45 find_get_pid +EXPORT_SYMBOL_GPL vmlinux 0x743a165e ata_pack_xfermask +EXPORT_SYMBOL_GPL vmlinux 0x7450e7d9 udp4_lib_lookup +EXPORT_SYMBOL_GPL vmlinux 0x746f4b6d hid_set_field +EXPORT_SYMBOL_GPL vmlinux 0x74a15570 crypto_shash_digest +EXPORT_SYMBOL_GPL vmlinux 0x74a62495 simple_attr_write +EXPORT_SYMBOL_GPL vmlinux 0x74abdafa task_handoff_register +EXPORT_SYMBOL_GPL vmlinux 0x74baf17a tracing_is_on +EXPORT_SYMBOL_GPL vmlinux 0x74deb10c used_vectors +EXPORT_SYMBOL_GPL vmlinux 0x74f81dfd crypto_shash_final +EXPORT_SYMBOL_GPL vmlinux 0x7521afb6 leave_mm +EXPORT_SYMBOL_GPL vmlinux 0x75369213 __cpufreq_driver_getavg +EXPORT_SYMBOL_GPL vmlinux 0x753ea96c queue_work_on +EXPORT_SYMBOL_GPL vmlinux 0x75669b59 ata_acpi_gtm_xfermask +EXPORT_SYMBOL_GPL vmlinux 0x75786fad add_to_page_cache_lru +EXPORT_SYMBOL_GPL vmlinux 0x75a353a1 sdio_writew +EXPORT_SYMBOL_GPL vmlinux 0x75a6203a dm_rh_get_region_key +EXPORT_SYMBOL_GPL vmlinux 0x75d8360b pci_block_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3 crypto_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0x761188fd dpm_suspend_noirq +EXPORT_SYMBOL_GPL vmlinux 0x763d5bb9 ata_host_start +EXPORT_SYMBOL_GPL vmlinux 0x76674a11 kobject_uevent +EXPORT_SYMBOL_GPL vmlinux 0x766b5700 ata_sff_postreset +EXPORT_SYMBOL_GPL vmlinux 0x770a9f60 rtc_irq_set_freq +EXPORT_SYMBOL_GPL vmlinux 0x7732bdf1 user_destroy +EXPORT_SYMBOL_GPL vmlinux 0x773ca527 init_uts_ns +EXPORT_SYMBOL_GPL vmlinux 0x775c6ce2 security_inode_create +EXPORT_SYMBOL_GPL vmlinux 0x775d08f7 ring_buffer_read_page +EXPORT_SYMBOL_GPL vmlinux 0x7769de66 inet_csk_clone +EXPORT_SYMBOL_GPL vmlinux 0x77896115 dm_rh_get_state +EXPORT_SYMBOL_GPL vmlinux 0x77ada60c inet6_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0x77b1ce1c macvlan_handle_frame_hook +EXPORT_SYMBOL_GPL vmlinux 0x77f2b1bd skcipher_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0x7821292b dm_rh_delay +EXPORT_SYMBOL_GPL vmlinux 0x78bcb59f pskb_put +EXPORT_SYMBOL_GPL vmlinux 0x78cb3ef5 hrtimer_start_range_ns +EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee klist_add_after +EXPORT_SYMBOL_GPL vmlinux 0x78fa60cf hidinput_connect +EXPORT_SYMBOL_GPL vmlinux 0x78fcb7da ata_sff_irq_on +EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc tracing_off +EXPORT_SYMBOL_GPL vmlinux 0x7978224c tcp_unregister_congestion_control +EXPORT_SYMBOL_GPL vmlinux 0x7a021ed0 ata_acpi_stm +EXPORT_SYMBOL_GPL vmlinux 0x7a2892d2 iomap_atomic_prot_pfn +EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438 pv_info +EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122 edac_handlers +EXPORT_SYMBOL_GPL vmlinux 0x7addd6a6 ring_buffer_record_disable_cpu +EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e cpufreq_frequency_table_put_attr +EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d edac_handler_set +EXPORT_SYMBOL_GPL vmlinux 0x7b21b2f2 hid_check_keys_pressed +EXPORT_SYMBOL_GPL vmlinux 0x7b71e0e3 unregister_pernet_gen_device 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0x7e64181d usb_calc_bus_time +EXPORT_SYMBOL_GPL vmlinux 0x7e7639a5 crypto_grab_aead +EXPORT_SYMBOL_GPL vmlinux 0x7ece468c crypto_ablkcipher_type +EXPORT_SYMBOL_GPL vmlinux 0x7ee4c809 bus_remove_file +EXPORT_SYMBOL_GPL vmlinux 0x7ef8455d __inet_twsk_hashdance +EXPORT_SYMBOL_GPL vmlinux 0x7f19c836 unlock_policy_rwsem_write +EXPORT_SYMBOL_GPL vmlinux 0x7f3aec2a aead_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0x7ff04eb7 regulator_list_voltage +EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf raw_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0x8014b6af input_event_from_user +EXPORT_SYMBOL_GPL vmlinux 0x8039d043 selinux_secmark_relabel_packet_permission +EXPORT_SYMBOL_GPL vmlinux 0x8044dc4f spi_busnum_to_master +EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3 crypto_alg_tested +EXPORT_SYMBOL_GPL vmlinux 0x809b2086 dev_attr_em_message_type +EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3 selinux_secmark_refcount_inc +EXPORT_SYMBOL_GPL vmlinux 0x8128a20e i2c_bus_type +EXPORT_SYMBOL_GPL vmlinux 0x8128a915 mmu_notifier_register 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sdio_claim_irq +EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd hpet_set_periodic_freq +EXPORT_SYMBOL_GPL vmlinux 0x85e05cbc blk_trace_setup +EXPORT_SYMBOL_GPL vmlinux 0x86109ea3 sock_prot_inuse_get +EXPORT_SYMBOL_GPL vmlinux 0x863dadb1 pciserial_suspend_ports +EXPORT_SYMBOL_GPL vmlinux 0x867c684a setup_APIC_eilvt_ibs +EXPORT_SYMBOL_GPL vmlinux 0x867f1ca9 da903x_writes +EXPORT_SYMBOL_GPL vmlinux 0x868784cb __symbol_get +EXPORT_SYMBOL_GPL vmlinux 0x86b10394 ehci_cf_port_reset_rwsem +EXPORT_SYMBOL_GPL vmlinux 0x86b1667d hwrng_unregister +EXPORT_SYMBOL_GPL vmlinux 0x870404b8 crypto_chain +EXPORT_SYMBOL_GPL vmlinux 0x873fbaea edac_atomic_assert_error +EXPORT_SYMBOL_GPL vmlinux 0x87511008 cpuidle_unregister_device +EXPORT_SYMBOL_GPL vmlinux 0x875b1a24 usb_get_dev +EXPORT_SYMBOL_GPL vmlinux 0x87754115 raw_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0x879658ee crypto_lookup_template +EXPORT_SYMBOL_GPL vmlinux 0x87b9f668 firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0x87da623b input_ff_event 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+snd-hda-codec-intelhdmi +snd-hda-codec-nvhdmi +snd-hda-codec-realtek +snd-hda-codec-si3054 +snd-hda-codec-via +snd-hda-intel +snd-hdsp +snd-hdspm +snd-hifier +snd-hrtimer +snd-hwdep +snd-i2c +snd-ice1712 +snd-ice1724 +snd-ice17xx-ak4xxx +snd-indigo +snd-indigodj +snd-indigodjx +snd-indigoio +snd-indigoiox +snd-intel8x0 +snd-intel8x0m +snd-interwave +snd-interwave-stb +snd-korg1212 +snd-layla20 +snd-layla24 +snd-lx6464es +snd-maestro3 +snd-mia +snd-miro +snd-mixart +snd-mixer-oss +snd-mona +snd-mpu401 +snd-mpu401-uart +snd-msnd-classic +snd-msnd-lib +snd-msnd-pinnacle +snd-mtpav +snd-mts64 +snd-nm256 +snd-opl3-lib +snd-opl3sa2 +snd-opl3-synth +snd-opl4-lib +snd-opl4-synth +snd-opti92x-ad1848 +snd-opti92x-cs4231 +snd-opti93x +snd-oxygen +snd-oxygen-lib +snd-page-alloc +snd-pcm +snd-pcm-oss +snd-pcsp +snd-pcxhr +snd-pdaudiocf +snd-portman2x4 +snd-pt2258 +snd-rawmidi +snd-riptide +snd-rme32 +snd-rme96 +snd-rme9652 +snd-sb16 +snd-sb16-csp +snd-sb16-dsp +snd-sb8 +snd-sb8-dsp +snd-sbawe +snd-sb-common +snd-sc6000 +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-emul +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-sgalaxy +snd-sis7019 +snd-soc-ad73311 +snd-soc-ak4104 +snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-sscape +snd-tea575x-tuner +snd-tea6330t +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-usb-us122l +snd-usb-usx2y +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-virtuoso +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-wavefront +snd-wss-lib +snd-ymfpci +soc_camera +soc_camera_platform +softcursor +softdog +solos-pci +sony-laptop +sonypi +sound +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +ssb +sscape +ssfdc +sstfb +ssv_dnp +st +stallion +starfire +stb0899 +stb6000 +stb6100 +stex +stinger +stir4200 +stkwebcam +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +sworks-agp +sx +sx8 +sxg_nic +sym53c416 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +t128 +t1isa +t1pci +tc1100-wmi +tcic +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda8261 +tda826x +tda827x +tda8290 +tda9840 +tda9887 +tdfx +tdfxfb +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +teles_cs +tg3 +tgr192 +thinkpad_acpi +thmc50 +tifm_7xx1 +tifm_core +tifm_ms +tifm_sd +tileblit +timed_gpio +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tlclk +tle62x0 +tmdc +tmiofb +tmp401 +tms380tr +tmscsim +tmspci +toim3232-sir +toshiba_acpi +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_bios +tpm_infineon +tpm_nsc +tpm_tis +tps65010 +trancevibrator +tranzport +tridentfb +trix +ts5500_flash +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +ttm +ttpci-eeprom +ttusb_dec +ttusbdecfe +tua6100 +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tvaudio +tveeprom +tvp5150 +tw9910 +twidjoy +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +twofish-i586 +typhoon +u132-hcd +u14-34f +uart401 +uart6850 +ubi +ubifs +ucb1400_core +ucb1400_ts +udf +udlfb +ueagle-atm +ufs +uinput +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultracam +ultrastor +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +unioxx5 +upd64031a +upd64083 +uPD98402 +usb8xxx +usbatm +usb_debug +usbdux +usbduxfast +usb_gigaset +usbhid +usbip +usbip_common_mod +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-int-device +vcan +ves1820 +ves1x93 +vesafb +veth +vfat +vga16fb +vgastate +vgg2432a4 +vhci-hcd +via +via686a +via-agp +viafb +via-ircc +via-rhine +via-rng +via-sdmmc +via-velocity +vicam +video +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vivi +vlsi_ir +v_midi +vmk80xx +vmlfb +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w35und +w83627ehf +w83627hf +w83627hf_wdt +w83697hf_wdt +w83697ug_wdt +w83781d +w83791d +w83792d +w83793 +w83877f_wdt +w83977af_ir +w83977f_wdt +w83l785ts +w83l786ng +w90p910_ts +w9966 +w9968cf +wacom +wacom_w8001 +wafer5823wdt +walkera0701 +wanrouter +wanxl +warrior +wavelan +wavelan_cs +wbsd +wd +wd7000 +wdt +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wistron_btns +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +x38_edac +xc5000 +xcbc +xen-blkfront +xen-fbfront +xenfs +xen-kbdfront +xen-netfront +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_iprange +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +z85230 +zatm +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +znet +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/i386/generic-pae +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/i386/generic-pae @@ -0,0 +1,10134 @@ +EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667 scx200_gpio_base +EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008 scx200_gpio_configure +EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c scx200_gpio_shadow +EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd scx200_cb_base +EXPORT_SYMBOL arch/x86/kvm/kvm 0x9234808d kvm_read_guest_atomic +EXPORT_SYMBOL arch/x86/kvm/kvm 0xfc7a5232 kvm_cpu_has_pending_timer +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0xf9d775ed suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0xdb8440a9 uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x2401a48b pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0x3c03b843 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x61fdae99 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x67d206d7 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x706ef9a8 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x8a33527b pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xbb56980a pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xc53f3927 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xce448996 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0xd20f6826 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0xfc30a0dd pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0xfe05b684 paride_unregister +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0008025d agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x193f79cf agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x197b6fb0 agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x1ec7626a agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x25c0ff76 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x338a69c1 agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0x33a1ba9c agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x36865d4a agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3755d68c agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3bb8d9b7 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x41fc494e get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x60419890 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x64444c6f agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x6d23e0a7 agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7dcba98d agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8557db49 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x896f6688 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8c1c8db2 agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8fd6c4ce agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x94e12a7f agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9612b097 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9a41316e agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa0610f85 agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa5bf94aa agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb77ba995 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc6bb65dd agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8a0a563 agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8fe83c0 agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd5af79be agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xdd557740 agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf463e40b agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf7e4aa5a agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0xfe89876f agp_bridge +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x0ef26f1f gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x1a0f4908 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x1a9de78b gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x26b203a8 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0x3f70e2b5 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x56667e7e gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x95afa884 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0xa32441da gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xb076704b gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0xc125aa4d gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xd4c62214 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0xe2edc40a gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xe3bbb161 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0xf0f8fca2 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xf58b99f0 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0xfb31ed0f gs_got_break +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0b21c4bf ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0dfcadad ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15da500b ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x31fdd182 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x376886b1 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3c00c071 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x47040480 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x49eb5573 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4cda2d4a ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5f01f32f ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5f41f4b7 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x62313134 ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x70e5524c ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x871d530c ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x90c3894c ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x91c21f42 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9355ba7a ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xad6c7236 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb442149b ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcd3e0054 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd77e2881 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdb71909a ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe0bc89b4 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/nsc_gpio 0x142a67c3 nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0x242005c7 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nsc_gpio 0x46722602 nsc_gpio_read +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0x688e3678 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0xad2cfc6f edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xd0f4a28c edac_mc_find +EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x07d0992e fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x12a50649 fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0x254c3cdb fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4139d852 fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0x454e3b52 fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x51eff005 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5ec90cbe fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0x76104341 fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7ea4ee90 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0x889a0e41 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0x9bc7528d fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0xa086462e fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0xaad4fb9b fw_send_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb57c8469 fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb890e683 fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xbbea26d4 fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xda22e26f fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0xdd6f8477 fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe31faa8d fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe7a2e1d9 fw_iso_context_queue +EXPORT_SYMBOL drivers/firewire/firewire-core 0xee334d19 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf48d4aff fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xff803b75 fw_iso_context_start +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x003a38ab drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06e24ca3 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x07f26283 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x084c099c drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0bb4760a drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c54279c drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0cdbd135 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d30d631 drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x101d8ee6 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x126a5b40 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x12d4f3a1 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x18b63765 drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x18d9168a drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1a782553 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bad438a drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bd55e84 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bd9302c drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1cc1d603 drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d681400 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x22a6de06 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0x23318dc3 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x254ff17e drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x25dc9bf9 drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x26fbd6cc drm_get_resource_len +EXPORT_SYMBOL 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drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x467c5c16 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x479764cd drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x484610a3 drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49f63bc0 drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a3a5a0d drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4b2d9b61 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4c055206 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x50ad31cb drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x51183369 drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x51f4efa2 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53e04a25 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x56491c38 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58ee6e51 drm_connector_property_set_value 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drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x740e15c7 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x741735ac drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x749eed77 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79de9609 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a8ba4be drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c08c970 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c87ca7f drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x818a11b8 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x81b7c69e drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8298ef15 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x83bdd091 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8642275b drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8eafca32 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0x900a80d4 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9089c50b drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9240ff1e drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x96e88a1e drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x99321e18 drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x99637377 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dfa3633 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ec39571 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9f658bec drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1ef77dc drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa7e9b92d drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa8596802 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9cd99d0 drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa3d73e9 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0xac877f60 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xad7eddd9 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1201a07 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2f45865 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb35e184d drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb76967f0 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc78d6a9 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbecd52a9 drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc527bfdd drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc86027c5 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xca7c7165 drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb0105e3 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb298eb1 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcf60b8ec drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd44fba7e drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8d726b1 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xda278d90 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc5aff70 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdcca5b20 drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdcceeaa3 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe191c2a0 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe29e9a9b drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb6a8f29 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0xef0cdf10 drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf43a51a9 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf47de94f drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4d20236 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf75e39e7 drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf97ab5b9 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf9da9687 drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa7a248b drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfafee32e drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfbf936b9 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd584278 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x3267d75c intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x71ca163d i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x96efdb1a intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x99b4fb17 intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x2bad6748 radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x3f610185 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xcf2e11d2 radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x045a46e3 ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x05db4e4b ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x196d9a87 ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x21f31533 ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e72f0a2 ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x35f464ea ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x54627830 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x67c4f282 ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7645fdb8 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8b694298 ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8d7e0078 ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x950c7a48 ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x99ea6b11 ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9d8ec50a ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa143e628 ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa2d7825b ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4ca5fa7 ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb07426e9 ttm_bo_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb1f0f099 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb97b9b40 ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcabb2f84 ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd1f402b4 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd8cf21f2 ttm_bo_device_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe410deb5 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x1d1a914b i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x3b5dae19 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x27ee1c5d i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc024f8f3 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xafa76d25 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xa6056a4d amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x05587b4a hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07a8b9ae dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0a0273fc hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x10f461b4 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1573fecd hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548 dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x17dece7e hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1ab06084 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2613c751 hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x27605fe7 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x31617e25 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3165e038 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x32c413da hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x37fd6815 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x439c227e hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x462d12ee hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x46caa2c4 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4de02f5b hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51f1748c hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54499cef hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57fcf0ee hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ad82631 hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5adc7693 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62a51b04 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62b056a4 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6534b257 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x65a64793 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b7d947e hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6dc74cb6 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6ec49bc0 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x714aceec hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x732912a9 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x788c9db5 hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x79e567aa hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d26f763 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d7514ba hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ee9be04 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8a9f3583 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8bd2cafa hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8bf9acc9 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 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0xced5bd7a hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd386f5a7 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd8e4951b hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd98589cb hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe2426608 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe254bc46 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe80d8d5e hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xebc0e54d hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xee6883e7 hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf28deb56 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf5fb1e17 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf831b240 hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfa26c7c6 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc062633 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc8acd32 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x69671816 ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xce9a4247 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf85065d4 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x29623b41 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x327e03a4 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb95db919 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xcc450bdc rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x12331b30 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x16f0190b ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x25406066 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2d100c10 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x405abf88 ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x40cf7f52 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x41b051e2 ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x508c1ac3 ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5763473d ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x60e97f40 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7c5b57a1 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x86784f73 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x87bad67f cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa9e2db96 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdf308569 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe37ddfb2 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xec1b146c ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x00450db5 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x08c7830b ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09cb13df ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09eb0919 ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09fa356f ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0b7d2464 ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c230011 ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1121f31c ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1199cd26 ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x16274593 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x162f1f13 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x17ab5b7b ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1fae43d0 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x23b6343b ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3428da4b ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3719338d ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3c89ef8b ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f28ac20 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7482f0 ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x43d9f725 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48a259a5 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x52e98f3f ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x53311d6c ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x54e49cf1 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55f5d12c ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x562f541e ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56a33b47 ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x643f5038 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68d24118 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6bc73a99 ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c0f13cf ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c5e207d ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x739da63e ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7815d2e9 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x79007b64 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7bfc82b2 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7cfd8eb6 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x81535c30 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x831060cb ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x865dfa10 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8980d4e1 ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d754292 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8ed121d7 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9298858c ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x964c32b3 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x99e71bde ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9aad2d79 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa3bac1e9 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa614a2ea ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xab734f96 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xacc90a55 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xafb8b914 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3adf497 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb7831856 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9b95780 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc5d34e73 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc5d52cd0 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe56f3374 ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe78d8f10 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe802b8fd ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe952aa5e ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed3ad861 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf27e9425 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf388fc19 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf8eb7737 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfcf0818f ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1a395b43 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x497ac7d6 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4abc2919 ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6472cc20 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6b229427 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6cc925f8 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x727765e0 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9007cbe0 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9cb4edba ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xaa7fac87 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb082d684 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xec69e2e2 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2788126f ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x36bf7fe3 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3d79d219 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4382250d ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x60f6afa1 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6cbd589f ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc45c2574 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x02ae9193 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2ecfcbea iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x521c40ab iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6afaba05 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x72f5280d iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7db4b0d7 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xd29d23cd iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xdb24df99 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0cee6415 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2c1c0d72 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x32ab83e2 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x38cd2793 rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3d8f0e4b rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3e52a063 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x45b15079 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x49b1d9f3 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5e8e6c97 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x636b0435 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x86007b63 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x99c4cc58 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc45df49d rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcb4e6978 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd282651c rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd311ebb0 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe0c0c411 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe36deade rdma_create_id +EXPORT_SYMBOL drivers/input/gameport/gameport 0x0d99d438 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x50a7fc7b __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x526660d1 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xaea8f729 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0xb9584e87 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0xcb1f3050 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0xd6e0be61 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xeb332c25 gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xf209e030 gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x4224ba66 input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xa1c7ae0c input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xacac40f9 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xb489ded0 input_unregister_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0ce0329a capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2c2df3b6 capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x30ec2ca1 capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3f97f539 detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4d0fa993 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6f26c552 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x729cda1a capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x99cce739 capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa5a40363 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb61bbf02 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1 capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf50abfc5 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x05f97167 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x14edb9d9 b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x39ff47e1 b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x3c085b6f avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5bc90020 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x6fafbc8f b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x772dbcb6 b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7e5987e7 b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8f605951 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x96f14965 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xbed9036d b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xc472e255 b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xcc8d2ddc b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xed06223f b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xefd434e3 b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x032b0190 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x10006c87 b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x226a7143 b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x441254b4 b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x728cd05c b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x9aeeebeb t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xa3a70d68 b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xbbb38d78 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xd6990513 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x06d933fd proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xaf0b1daa hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x68f86684 isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x73204965 isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x7db325ab isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x9107c187 isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xfc6690c6 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x14319b10 register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x67bc8692 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x80cfe449 isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x03167024 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x03783fa8 mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x090bcd5d mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0f07db05 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x31998a91 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x38a17815 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3967c275 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3d271461 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3e4bc501 queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x406edc71 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4686ed4f mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6dc06127 recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7ab8825e mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x929f8048 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9b279e23 get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa229671d mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xae2f74a9 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb916119e mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe9e4ab0c mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf25dff4f create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfc98b361 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xcf06a639 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x80ade637 mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x9b258bd7 mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x11d05c37 mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x74c0570e mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x58f1b6de qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x532c332f xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xd361e283 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x024da209 flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x35c7f111 flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x453c3773 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4a6c14e2 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4cfe43f0 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x50a4b3b4 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x65b349ce flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x810fbd1d flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x93441ebe flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9f8f26a5 flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb311a1b7 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcfc9b453 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd40839c9 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xdfa3589c flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe23483a2 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe80c48da flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xee336132 flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf2e2b38a flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf521fe5c flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf76ad219 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x0d6e2007 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x87952283 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xb721b30f bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xff656954 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0a763bb2 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x204e1150 rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x54a8cb31 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8973d48d dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9a79617f dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd96de16b dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf68b078b write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf764975e dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf8720ed5 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xcb343cae dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x042ba058 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x073d11d0 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x12d47a5e dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x18adefd5 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1eabbf24 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x28fcd148 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3cc32641 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x487aa47e dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4c3463f8 dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x50e80820 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51cad4f5 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3 dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x72d9a524 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74fcfe48 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7799a2f6 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x78ce1e78 dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80ff3ca6 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb992b052 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc1e23e7d dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdb0973eb dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe3c59d84 dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xed388eea dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf06bf164 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2ba34da dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf5589e59 dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xff9bd537 dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x341314f6 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x74801523 dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8cd8f077 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x90feeb79 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa8d69073 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa90177d3 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3e6c2c69 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x02956656 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x08e76981 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x16957f78 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x285a58e8 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2a4f99c9 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2cc85cc7 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x38039011 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x43a5afe7 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x45cfd2b7 dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9b6c5192 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xdbd0c6e2 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x7eed1916 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x0ddec455 au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xb97d7608 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xebd68afc cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x308a2eeb cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x19675833 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x7a341f16 cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xd313e74b cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x6c02176b cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x90aab405 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xadd6d6b9 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x151ffa0e dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xdea5e697 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x78d29575 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x744905bf dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xac75bd08 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xaf449d10 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xdc1af80c dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xdc4ffac7 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xfbcbd1a7 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x02b4c022 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xc6e34e1e dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0e0b7d64 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x567e2d86 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8b023f40 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8d789907 dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x93e0340b dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xb80985c9 dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x47f627c7 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x92917a84 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xdd332250 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x1f3261b0 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xf498b9a5 isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x7d8115c6 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xb2f07160 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x8c7f4e38 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x27e8f887 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x5a900923 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x151739dc lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x5f104c1f lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xaf2c1554 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x6b19cbc8 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x0995f9a8 mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xa595844f nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xdc95ac7a nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xb5dc2f0e or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x02327e03 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x4a8694f0 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xcde642c3 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x6d66cfe6 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x7487544f s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x3e568340 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x7153d650 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xa7db9e2c sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x97507ead stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x29fa4fa0 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0xc87ad5b7 stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xb1fded2c stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xce7b98f0 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x671b308e stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x5445d3a6 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xccc55df3 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x6e1b8e51 tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x899ae5f7 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x9693c1e1 tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x907181e2 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x9aca7482 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xb7523bcb tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xc41083c9 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xb211b7ce tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x46e1e28c tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xf2f66cde tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x123c8074 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x35dc503f ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0xdd1bbc2a zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x0ecf0d53 zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x6cf9bad6 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x5eb62d61 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x75712cab ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x31df6b8d bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xa6cb41ec bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xe8efeb1c bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x4b73272d btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x5311095c btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x3ef4d65c cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xcbbe474f cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x18218b0f cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x56010b4d cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x4c76d583 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xf5fc8e06 vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x0641b5d1 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x211677b6 cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3dbdf991 cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x89554bd9 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa3d9b8c9 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xea1adb3b cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1d5169a6 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3a6794c1 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3ad37d67 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x56d1e307 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xc6b156e5 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd5b5a40d cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf8b44f5e cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0334d838 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0aeb09ba cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1b14e1a2 cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2000c41f cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x29e730af cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x333c1717 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x34776a98 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4425b6ac cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x457d9e9b cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x472839b5 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4f3f7db6 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4f439301 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x64023b6c cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x66b2cd5d cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x67d9c5f0 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6d6b3115 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x87fd903b cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa374f66b cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc592ea19 cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdfc1c303 cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe9ccea9b cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xec0c2379 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x623e4711 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xe50f73aa em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1ddb527f gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2dfc6cf6 gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x52793c06 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x95ccb96f gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9a5791ea gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xda6e4fb6 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6d77960 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2a443f6f ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x39773c79 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3bef8e86 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4ff364f1 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5e003e14 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x645ff889 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9b6ca1c4 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb04ee150 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xbec8cc5d ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xeb162aad ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf0169984 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x26ad8bd8 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2a7c9ad9 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x367fa27a saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x401f8ce9 saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7d302f40 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x924642bf saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9a8cbf4d saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xcd9ede61 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd0c0aaa8 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe77fa07d saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xed5ec902 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfa05b56c saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x210e8a19 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3d44b19c soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x70e52e4b soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x7ef7eb5a soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x858e0d36 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x8d8617a1 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xd291f930 soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdb90d0b4 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xee24c7b8 soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x26678f06 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/tveeprom 0x27371a4b tveeprom_read +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x1a073898 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5b23a2ad usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x7f9f2300 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddb7ad15 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xe704e265 usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf6039e1f usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x8babc1bf v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x67d774d2 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xb1c189c4 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x22a387d2 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x32d4cba6 videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x3e424044 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x78be4d0f videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x8bff5614 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xe53b0925 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x2fdd659f video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x5aed68f8 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x5e1256b7 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x8b9d4027 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x8bd1c8f5 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0xa51361c4 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0xa54c95d5 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0xc368942a video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf766b8c4 video_register_device_index +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x0d64b18f videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x19339a6b videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x52854cdc videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xc034cbd5 videocodec_unregister +EXPORT_SYMBOL drivers/memstick/core/memstick 0x2a720c39 memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x30a6f017 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x421351a4 memstick_suspend_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x438e6cee memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x4c9246c9 memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x65089648 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0x95b2fd11 memstick_detect_change +EXPORT_SYMBOL drivers/memstick/core/memstick 0xa072f906 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5448d79 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5987a36 memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xb7bc1054 memstick_free_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xd8c390ad memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xdba95d72 memstick_next_req +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x046e1016 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x068995d3 mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0bc0e6fd mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x22ec6c68 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x28be5b4c mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x36b34ac1 mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3d46e2f6 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5d3c5fa3 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x643932dd mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x65846812 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6c230c92 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72ba1a42 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8aa2333d mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x936a8ea4 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x948f882c mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9a484c24 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa09fa5eb mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa1c926ba mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa44cfd7c mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xadca35e4 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xce84409f mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcfd9342a mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd867fc7b mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9e90c36 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdc187c41 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xddabeac2 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xde464f41 mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xffeac046 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1df41807 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2f53226c mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2f80fc1c mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x36161aff mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x449ce18c mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x51e46569 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6196a832 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x67bfd6f0 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x68f903b4 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6c5121e1 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6f6f532d mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8ab44b72 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8e83a6a4 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x92fbc9ef mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x945b8fc1 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x97759e50 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaebf4ec2 mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb60b0534 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc563a319 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd8e06298 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdc3a297d mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xddd82787 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xef093e04 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf907f0be mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf9981afa mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfd90e7a9 mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x10238ba2 i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x11c7e588 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x399d38dd i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3bb25c8d i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3cf3734f i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x75cba206 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x85b88db2 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x87d2220a i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8c89ac20 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa33f4d83 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xab503653 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbc8edecc i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc00cc449 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc53e3287 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc710469a i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd29ec39d i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd8046b7b i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfdaa5452 i2o_exec_lct_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x152c52ca ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x218c3119 ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6e24e06a ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x81a5e1cb ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8fc61c80 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa075bec8 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xd2e61b0d ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfec178d7 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x3d21f925 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xf42b0156 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x500a1a87 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xfd1cdd7c mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x714ff7ce c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0x84348ea1 c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x5524f0e8 ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0x8c70de47 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x296a8931 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x38e13836 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x464587aa tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x8ad339d1 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xab4acfc2 tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xbaf7de42 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xca18c0e0 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xce407a85 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0xd56f9c53 tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0xe0e1164c tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xfe029736 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xff4637b5 tifm_map_sg +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x83a7034d mmc_cleanup_queue +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x557102bd cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x992fbe5d cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xc2c09df9 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x5d5fa40b unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x846d795b map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xf6859ea3 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xfc8a676c do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xfa0b3b22 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xacf1bce5 lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x789c298b simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x09701130 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf1e72501 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x3c73d529 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/mtdconcat 0xf8e18f5c mtd_concat_create +EXPORT_SYMBOL drivers/mtd/nand/nand 0x97620522 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xa5124f68 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x3e525895 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x88f420b1 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x2e85bab7 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3a453843 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x9bcebeed onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xb9ab4cdc flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x08e564f6 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x46b595db ei_open +EXPORT_SYMBOL drivers/net/8390 0x5324e5db ei_poll +EXPORT_SYMBOL drivers/net/8390 0x58680a6e ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x635c2a17 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0xa444618e __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xa71d9899 ei_close +EXPORT_SYMBOL drivers/net/8390 0xaf8ef6b2 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0xcc5adc94 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xd43ce925 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390p 0x1b406bd0 eip_tx_timeout +EXPORT_SYMBOL drivers/net/8390p 0x25e822c1 eip_close +EXPORT_SYMBOL drivers/net/8390p 0x338d7307 NS8390p_init +EXPORT_SYMBOL drivers/net/8390p 0x7c831d97 eip_get_stats +EXPORT_SYMBOL drivers/net/8390p 0xa5518fd4 eip_poll +EXPORT_SYMBOL drivers/net/8390p 0xb663e226 eip_interrupt +EXPORT_SYMBOL drivers/net/8390p 0xb6674052 eip_netdev_ops +EXPORT_SYMBOL drivers/net/8390p 0xbbfb0c8d eip_open +EXPORT_SYMBOL drivers/net/8390p 0xc9eb1b65 __alloc_eip_netdev +EXPORT_SYMBOL drivers/net/8390p 0xe7cf592b eip_set_multicast_list +EXPORT_SYMBOL drivers/net/8390p 0xf82db66b eip_start_xmit +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x0bf20ad5 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x15bc0dd8 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x3ae910c5 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x3fd788b7 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x641e843b arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x752b0f08 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x757509ba arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x77c55a20 arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb0d9f5f4 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb6f168c5 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x05cb8007 com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x4f0f0674 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xfb415533 com20020_found +EXPORT_SYMBOL drivers/net/bnx2 0x35b9b97a bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0xe546288c cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1d9af775 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4a53fd47 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4dc938b3 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x80940011 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8411291e t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8d9609b5 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa15677b5 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xaaa9f6a9 t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb156b4fa t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd075b536 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xda1efd57 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xddc5b4f0 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe3f41daa dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xea0a3b82 cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xef7c901a cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf367da14 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x122467ab hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x8978fb5d hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x952160ff hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb0251844 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe5d49800 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3399bb07 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x38a8617e sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5f643fd4 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7fae72ad irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9c5c06f3 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa6da389b sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa818c560 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd2b93a33 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd3eae009 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd6a50f9b sirdev_receive +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x27db8e69 mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x42faaa3a mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0x4e6538d9 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0x7d1e5677 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xaa29497f mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xb1c0aa24 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0xc0444001 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xe21638e8 mii_check_media +EXPORT_SYMBOL drivers/net/pppox 0xb71ec301 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf554af70 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf612bcd1 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/sungem_phy 0x83b31488 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x04606826 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x758bd6e5 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x87455eb9 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x9da88f09 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xe7f48f05 tmsdev_init +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x055ffeb2 hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x1acc0df5 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x267cf050 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x29d413e6 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x340368e5 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3a89aadf hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0x40053b7d hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8e1882db hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9a7412db alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0xd00d8362 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0xd6c9892c unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/z85230 0x08786d0f z8530_queue_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x10bfd45f z8530_sync_txdma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988 z8530_dead_port +EXPORT_SYMBOL drivers/net/wan/z85230 0x1d1a1397 z8530_sync_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6 z8530_interrupt +EXPORT_SYMBOL drivers/net/wan/z85230 0x3bed5bdb z8530_null_rx +EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29 z8530_hdlc_kilostream +EXPORT_SYMBOL drivers/net/wan/z85230 0x766bc0f4 z8530_sync_txdma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x7defdef2 z8530_describe +EXPORT_SYMBOL drivers/net/wan/z85230 0x8694b5a7 z8530_channel_load +EXPORT_SYMBOL drivers/net/wan/z85230 0x8dbf2601 z8530_nop +EXPORT_SYMBOL drivers/net/wan/z85230 0xbe088939 z8530_sync +EXPORT_SYMBOL drivers/net/wan/z85230 0xc46f956e z8530_sync_close +EXPORT_SYMBOL drivers/net/wan/z85230 0xd381bff6 z8530_sync_dma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064 z8530_hdlc_kilostream_85230 +EXPORT_SYMBOL drivers/net/wan/z85230 0xe4853a16 z8530_shutdown +EXPORT_SYMBOL drivers/net/wan/z85230 0xecc4d3ee z8530_init +EXPORT_SYMBOL drivers/net/wan/z85230 0xfe145f0c z8530_sync_dma_close +EXPORT_SYMBOL drivers/net/wireless/airo 0x55309edb init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x8da0a377 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x99dbb6c7 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x22c43f16 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x3824a1f4 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x49f90b1f init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x6dde65d4 atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xb3c5026d stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0e509e58 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0ef9e4c6 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x10ef4f91 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1432bf9f hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1f5839bb hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x22a5c9e0 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2b4d9cd2 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2df21381 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4b8184d7 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4e67b80c hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x54eb82df hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x61cb112f hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x68f01aee hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7d220b02 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x92fbfc83 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9eda02db hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa42dcaf5 hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa58cf76d prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xab84e5b5 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xae429597 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc735b282 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcdfd273f hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd3b8b8c5 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd4cd5a6c hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd8d372c6 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x02bdfe0b ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x09315a66 free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1e63eb7d ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2447976e ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2c2fac03 ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x415d720e ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x41f1be55 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4cb1be6a ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4fe496b1 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5c50b5b9 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x746e484d ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x85953a43 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8ebfd1c1 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb6982b32 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbdc4fa19 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc2c95562 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc3324bcc ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc5f07342 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcc986015 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe13a36d6 ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf3aa81f8 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0071843d iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01379eed iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0239b40a iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02516ca1 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03290fdc iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03428af5 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07e063e5 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x089281ea iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0898994c iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x093bce6b iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09c7d941 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c1adf25 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ca34670 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d341028 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x177759c8 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d226585 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x27e4fa13 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ac7681f iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2af5e34c iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d960e0f iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30b7021c iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x31f9fcb1 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x336e0382 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34a16d72 iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34bfaf51 iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35717207 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36c4d927 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b2d3158 iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3deb1958 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3e58f801 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42ffa90f iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x461fa91b iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4681b455 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48bf1bd7 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49db3edc iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d0442b6 iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eb21adb iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4fcefc79 iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54c67f6f iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54e114c4 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x553caf31 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x554e44ff iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x55d3dfd7 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ad67b63 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cd316e3 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6052411c iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60bbb11d iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60e216b5 iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x64aff644 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6589378a iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x659ab28d iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x65d77534 iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x68332cbd iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x689b3221 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69b9d984 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c2d84ce iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d58aaba iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70bd8012 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72f3aeed iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7393a83a iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x74784af0 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x769496e3 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7e974169 iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7faf06a7 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x807b0b2b iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82b3f0f9 iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8378cd2f iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84cb2d74 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85591614 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85c7c8e0 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88b57d62 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89279a24 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8db727fe iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8dc31042 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f52bb28 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x928e8dc4 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x932b1475 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x947d6760 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94ce53db iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95b588d6 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x978b1920 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a87985a iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9abf9f3f iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ad03f1e iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9bcb7dc1 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9bd12369 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d460998 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa43d3dc4 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6f760e7 iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7028052 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa77dccc2 iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa903534d iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa95d694f iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa987f0be iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1dca458 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb504715c iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb61654c7 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6485575 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6c2a081 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9f5b39b iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb4b31f4 iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc0d9423 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc96b143 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe8a9276 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0790f41 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc11719c6 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc64dd04e iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc834cbf2 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc99ab6b5 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc99ea798 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9a0f7f9 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca36a724 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd060861 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf99a945 iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0de05a2 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd30f4f21 iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd45944eb iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9830226 iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9fb55b0 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda556871 iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbbacaca iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc9d9652 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcd757ca iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf991feb iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe096dcab iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe310dd82 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe39c7f44 iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe4424269 iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe490df02 iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec1b6158 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef52104b iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf090eade iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf21551d3 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf3bb5685 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf461e3ef iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf4a6cacf iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5ca580e iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfcd09a90 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff5be708 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x38e7c62a free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4fda0fff __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xadbb7633 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc04ee826 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd4a66b25 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x024eb55c parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x04894880 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x09553d5a parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x127842d4 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0x1ee6a994 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x26d7ffcd parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x38349a52 parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x3c20060c parport_release +EXPORT_SYMBOL drivers/parport/parport 0x446514a9 parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x5114467d parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x5b11365d parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x605646a1 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x6d9666be parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x73bd8e47 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x8329eb72 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x870aea19 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa51667a8 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xb90a12f5 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0xcc1b5aca parport_write +EXPORT_SYMBOL drivers/parport/parport 0xcca7fb80 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0xd357136a parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xd590eeb6 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xde38217c parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xe68cf3e8 parport_read +EXPORT_SYMBOL drivers/parport/parport 0xea14d89c parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0xec130569 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xf20e6c6a parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0xfa28f0ad parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0xfa83d3dd parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xfef28036 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport_pc 0x483b6a63 parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0xa621046e parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x173a2b0e pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1a84908e pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x377cb779 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x39b76441 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x53c4d9e0 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x730ee261 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x77b35934 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x821a0586 pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8c120dcc pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9b7665e6 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa203d0d4 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa7ee2834 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xaa8f0d04 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcb2f9533 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf89313d2 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x13a7a5fc pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x211e25b8 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x22a93d8f destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x29376258 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x32391a9a pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x32e00fb8 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x379c8332 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3c823630 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x493912b8 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4a8483fd pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x53fe2d17 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x60ab227d pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x624604bb release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7017c2e9 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x72afdeca pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7a8141e2 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7c35f362 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7d4ffe53 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7ddd7887 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x87512d20 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8e80805a pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8fd71b7b pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa253343e pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa55a0530 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa8220535 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2eaefe9 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc368f687 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcb30361d pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdca9c38c pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe3f52b73 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe76312a4 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xeb447796 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf2cdada0 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x0332300b pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/pps/pps_core 0xf8c7260e pps_register_source +EXPORT_SYMBOL drivers/scsi/53c700 0x50536d7c NCR_700_detect +EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc NCR_700_intr +EXPORT_SYMBOL drivers/scsi/53c700 0xf3b2c3ba NCR_700_release +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x105d74e1 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2a22a887 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3392c9f4 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4bda5266 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xa1c7c293 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xda0aa0e7 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xead5109b fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x07ef1cbb fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1bc87f37 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1e0961ca fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1e2df5c9 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x20387076 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x24382d1e fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x248e583a fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27a7db80 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2ab0f4b0 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x309b5c8f fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3df0269a fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3e27296a fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3ef2ac75 fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x41ec7994 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x499255e5 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4ced0e8f fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5afbddf7 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6a94172e fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6faecc88 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x702c39fc fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x70783763 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7424049b fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76d1e7fa fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x82819d7f fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x851e9455 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x87d4145e __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9381614d fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9422b7b8 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa26efdd5 fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac6218ed fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xae985514 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xafb1587a fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb3100d7b fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc7d0071b fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc98e64b4 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd709af5e fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd7c5f296 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc1cce44 fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe7cf2a7a fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xed4e9369 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf2cc8d80 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x6872bb0b mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0386bb03 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0bcd8b06 osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x147cfb5d osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x29083500 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x36dd0e3d osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x383409b8 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x405536a3 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4116b751 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4c18cca0 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5b2120c4 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6177669e osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x661c4ba9 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7df8610e osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x86ef7143 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9952639c osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9bcf1edc osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9c70857b osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xadf7729e osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb9075bf8 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbc0f5327 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbea5d1d8 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcc0ac5b9 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcce8e183 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd8b46036 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xde6bbca3 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe7dbd330 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe7eed270 osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe82cff9d osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec001623 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf1fd179f osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfc9571a5 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfcf54dc6 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/osd 0x1741437d osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x534d8a83 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf327a110 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x01ba0162 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x2a761b9f qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6135f518 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x85455254 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x9d768129 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xa2a05024 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x7feeab3e raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0x8ad9e6fa raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0xd12552cb raid_class_attach +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x20ef6242 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x592a7f44 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5f60365b fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7e90b686 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x81d68fe7 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8734bfe0 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb877a1a9 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc47984ce fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd1d97979 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdf1934f9 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xeeefbef5 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xff4f059b fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0cfa51fd sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2190f313 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x262aa54e sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2f7c6c91 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x39888653 sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4209e817 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4e5a44aa sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5b30cafa sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x67a1e535 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6d80dbe2 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x71beb7f1 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x897c04d9 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8a2c1436 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8f0665c5 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x95a869e3 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9c04dafe sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa733a366 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb1d86483 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb47c4ad8 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc100e687 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdb8c8348 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe8f5ce03 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xeb2b687b scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xed704ee8 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfa6281e6 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfab6a95e sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x2b98ed83 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x2f8db6d0 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7a324dbe spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xab8092d7 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xf33d675f spi_release_transport +EXPORT_SYMBOL drivers/ssb/ssb 0x09975b8d __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0b9c9d3f ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0d0f4fe7 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x2f9f5017 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x5383bb00 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0x61e7ccee ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x814aead2 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x94845110 ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x9bf656e0 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x9d089782 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xad0805e0 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xb29263ec ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0xbf21b806 ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xd9cf0fab ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xe28afb6d ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xe8e153b9 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0xf196a0a9 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0xf51277ab ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0xfa8f2089 ssb_bus_suspend +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1a2f72d9 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2cc194bc comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x346646b8 comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x38786ade check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5136a007 comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x516354dd comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5863bc22 comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x69c93257 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x78444182 comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8c3b49f7 comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x93e66339 comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa34ab09e comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa7c3dad4 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xae76f9a9 comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb5c647cb comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xd13d4efa comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe0ccf3d3 comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x4c75e111 subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x622dd868 subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x72e02a0f subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xfdbd2c06 subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x223479da cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xb7205af0 cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xf15e76ae cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x01f88051 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x1fd433f3 mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x3d5446a6 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x48e13bfc mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x55f3a3f2 mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x63f9ee56 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6c13dff2 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6e14698b mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x703414ba mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x72b34af7 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x73079c2a mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x735923e2 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7dfdf893 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x8d33d5f5 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xa831deb6 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xaf1cf017 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc5da8115 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcd6d2d2 mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe3b8f819 mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe5ed0494 mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x59773ec6 subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xa28336c4 subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xbd447340 subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xc9aedcee subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x1eba6975 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x02ee61c3 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x3a34b371 go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x48be976b go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x4f562fd0 go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x5c708ae2 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x97a5a457 go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x97ad62f5 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xaebdf809 go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xdcf5e2fb go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x0ee5272f pod_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x81c5daa3 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xe0292842 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xe65b390e variax_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0x730978db me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0x5582dbd5 me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0x31d45396 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0x7136aa5c me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0x2c363a93 me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x647aa706 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0xe09ac19e me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x7161736e me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0x9228c4cc me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0x0a675f8b medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x068ba708 ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x07257f81 ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x099fae13 IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0f818dbc ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x114fc181 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x15979a76 ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x1c10fef4 ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x1c439680 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x268f6a24 ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2785af12 free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x29951f4b notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x299a2679 ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2ce4f359 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3345e217 ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x36c77462 ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3a738bc1 ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3a7eb864 ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x47e08811 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x493dcfb0 ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4f7cd079 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x553106af ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x582e92bb ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6796e949 DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6853dbf4 ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x72a5c608 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x734e70dd ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x744ce793 Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x75fdaaa7 ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x77558666 ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x81ddf1ac ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x87507012 ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8f632303 ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x910625ea ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9c0a72eb ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9c6cf96e ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9cf9d48f RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9d007925 ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9e66fbd0 ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa83d2608 Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xadd0ceda DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb3c66cce HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb598b789 ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbfd643cc alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc0091538 ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc6f00fc0 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcccdbfbe ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd34daf95 ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd4210416 ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xdc6b563c ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe0707f22 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe0937af5 ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe167017c ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe33f878b SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe4f05f33 ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe91388db ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe976c1b0 ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe9a9f79b Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf6c09b8f ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xfb81dd77 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xfe1b823c ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x2fd5b750 ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x73a71234 ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x9fbee681 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xaf20d149 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xd8f43b50 ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0xa1a9e108 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x6b6f7fe7 phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0x9efbbc81 phone_register_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x3bc8a06c usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x5890991e net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x67763a52 usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x25072078 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2a1488ee usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xad56a96b usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x3919ab0c lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xe9773460 lcd_device_register +EXPORT_SYMBOL drivers/video/console/bitblit 0x646f6e2d fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0x012eefc2 soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0x54732cb5 fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x009f28cc cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x487ad2a0 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x88e53749 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xc39a3a33 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/display/display 0xd232c3fd display_device_register +EXPORT_SYMBOL drivers/video/display/display 0xe5a33d86 display_device_unregister +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x3edd0837 mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x17fb29da matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x1d2c3e07 g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x39e05f81 matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x2ac938ac matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x4694176f matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xdda09366 DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xf24c12c9 DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x796c4ff3 matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x3617cd82 matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x0a59722e matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x35286a2e matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xb9167177 matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xcf1391ea matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xdbf53edc matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xdf97cf9a matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0608db40 matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x139d1923 matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x371a2f7f matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x61dde6c0 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x88c8754e matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/output 0x5833c224 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0x6dcd2786 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x3b5d2818 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x4cb7b843 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x54257202 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x64de1502 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x7f2b2bc3 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xe2eec2e4 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf8fa169c svga_get_tilemax +EXPORT_SYMBOL drivers/video/syscopyarea 0x2abc0706 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0xf9b5e8dd sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0xd602209e sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x0663f4c1 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x945c248c w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x16f309f7 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x20ebac1b w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x3300be2f w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x63c41346 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x164908f3 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0x5e2287bd w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xd5a6bdcf w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0xfce3fc8c w1_add_master_device +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x25f5414f config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x294bf61e configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x4a11553e config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x4d60d3b2 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x89778b05 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xa71e816b config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xd8803704 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xe0ffe339 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0xea9e5fcd config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xec6e0db3 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xf4b143c7 configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xfca89c17 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x1668b91c __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0x2cc2b6ff __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x3086e16c fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x308ca8db __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x3366e96b __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x40c0e4cd fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x5120623f fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x5cad2ed2 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x6ca8a92b fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x834f896f __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8a287f2d fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x95c409ae __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x9ff12d61 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0xaca80ad4 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xb72b5520 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb828715e __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xc45ace54 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xcaabe02a fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xd9d04527 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xdb35fc86 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xee2bf780 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xf613a53f fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0xf93f6c7a __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0xfc78bf62 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x2bd7272f qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x2ed8d9c1 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x5cccb24f qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xb8264ca0 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0xe9de688e qtree_delete_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x0adfe917 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0x6b049721 make_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0088f167 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x20c1efb9 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x263b7408 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x27ce4418 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x3455711e p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x71e4139c p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7c655ba4 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x86c53487 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x91dd4cb4 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x91f01576 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa37e6d6e p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xa74c062e p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0xaab8671a p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0xaeb2e11c v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0xb161087c p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0xb659b7d8 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0xb874b9fe p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xbd37bcf4 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0xc90c8367 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0xcae61af3 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xe0d259a6 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe6de58d5 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xe887a897 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0xef7127b0 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0xf11b003c v9fs_register_trans +EXPORT_SYMBOL net/appletalk/appletalk 0x091ced8e aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0x249120e3 alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x4915f234 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xb7512b80 atrtr_get_dev +EXPORT_SYMBOL net/atm/atm 0x08bdfdf9 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8f371e45 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x9136a439 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x9914ff71 atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x99a403e2 vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0xafa936e5 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xc4edd39b atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0xc73ac1b5 atm_charge +EXPORT_SYMBOL net/atm/atm 0xd09464c6 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0xea32c173 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0xecf5a05c deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x153be577 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0x23e65dde ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x2d12ff21 ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0x3482dcef ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4152b9c2 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x57e9d44a ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x5f2865fa ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0x6655fdb1 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xac85334d ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/bridge/bridge 0xaa9b044b br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x44ebb169 ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x84c0a876 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xe54a2532 ebt_do_table +EXPORT_SYMBOL net/can/can 0x2202965c can_rx_register +EXPORT_SYMBOL net/can/can 0xaf310ba4 can_send +EXPORT_SYMBOL net/can/can 0xb1f5ace7 can_rx_unregister +EXPORT_SYMBOL net/can/can 0xca9dd149 can_proto_register +EXPORT_SYMBOL net/can/can 0xe5095c5a can_proto_unregister +EXPORT_SYMBOL net/ieee802154/nl802154 0x12b697fc ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x39972d4e ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x58e55768 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x6f33d987 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x721432f6 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xf4c40692 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb8d9b556 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xeb047b09 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xeed696b3 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x70df4634 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc1c89960 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd4318184 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x0350029f nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1c423158 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x6f38782c nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7a05599f nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa470d6dd nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xab8b5d93 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbe398b3b nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/tunnel4 0x31ca749f xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv4/tunnel4 0x8dfcc4d3 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x310c8131 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x57293457 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6cb2a983 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb728b415 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x5b53ada5 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0xe5b7f730 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x681fc54b ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x880df384 ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x90aca46d ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x9c988381 ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa2de46e4 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc6e8dd7e ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xec7fa5d1 ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xf00ad678 ircomm_connect_response +EXPORT_SYMBOL net/irda/irda 0x014e9822 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x04d57dbe irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x18af7bd1 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x1e1991d9 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0x1edc2505 proc_irda +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x298a5a22 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0x2e63596c irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3c41d5cc alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4ba9942a irlap_close +EXPORT_SYMBOL net/irda/irda 0x4e2d8ef7 iriap_open +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x6f6729a6 irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x73c8a07b irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x856df4ab irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x8bb8286e irttp_dup +EXPORT_SYMBOL net/irda/irda 0x90ca00e8 async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0xa4f922bf iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0xa87a6cde iriap_close +EXPORT_SYMBOL net/irda/irda 0xab6d6b57 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0xafaba1f1 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0xb4118df6 irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xcf41598a irlap_open +EXPORT_SYMBOL net/irda/irda 0xd6deeaae irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xe9a41c4f irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xea403271 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf060cae0 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0xf7dd45f6 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0xf8e8d2ac irlmp_close_lsap +EXPORT_SYMBOL net/lapb/lapb 0x48c0ccd0 lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0x50d8806d lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x7130cb22 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0xb17c9ae1 lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0xb3f5a7ec lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0xb4724eb4 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0xdb0a9f0b lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xea5754d8 lapb_connect_request +EXPORT_SYMBOL net/mac80211/mac80211 0x04378890 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x0a61a4fe ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x1e917c24 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x200787e2 ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0x21944fc1 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x224f782d ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x3a7f2c44 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x48849b73 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x4d16c775 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x51751760 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x536d990c ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x58346da7 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x5dc52d98 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x5e04aed7 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x5e463753 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x62fe7c93 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x68eeb69e ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x6ccb5704 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x7db51c1b wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x87239d07 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x882eb132 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x89c48be9 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x89e8fb4f ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x92501673 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0x94398ac0 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0xc29e76d4 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xc62faba4 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xc75ec2c0 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xd133a064 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0xd4f11f31 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xd68a5136 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xde86a604 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xdf3d10c6 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xeb17d392 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xf6596ece __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xfb45ca7c ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xfccd8ded ieee80211_rx_irqsafe +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1f44b79c register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4a31b91e ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4df53f3e register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5d6ec8c2 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6e466860 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7b1e8d9c unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc58f92c0 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xeb15b579 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf2257f4a ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf257c50c unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf90c796b ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xa763fdcd __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc2edf86d __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x6652c7ce nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x0ca45d0b xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x1af25f5f xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x2c44f29c xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x4d95b1ca xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x6d1e10cf xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x752b3827 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x93310cc3 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0xa049bfba xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xd8bf107f xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0xf88dea69 xt_register_target +EXPORT_SYMBOL net/phonet/phonet 0x348cef9d phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x41453709 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x81d763e8 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xa86f4995 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0xb1b05e03 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0xbf2adf1b pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0xef3a6f32 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0xf93d1ff1 pn_sock_hash +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x231134f1 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x44e0ac4a rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5f9e1c1b rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x641d93ad rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6adcf024 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6d2cdff5 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x71941039 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x74b4cf95 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x944f26dc rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x94694c18 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xca9e0b0a rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe118c0dc rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xedc47f12 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf3fb9e20 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf9e4d6a6 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/sunrpc/sunrpc 0x93ac2621 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x073077c5 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x496e0ae4 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4b762ac1 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x4e93e5e8 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x51bb7909 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x75aa3278 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x7a5ad419 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa15eb871 tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xa73212dc tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd2f9c695 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdef5ad14 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x9ab8a85b register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x06145678 wimax_reset +EXPORT_SYMBOL net/wimax/wimax 0xdb87f8b7 wimax_rfkill +EXPORT_SYMBOL net/wireless/cfg80211 0x003a0365 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x00b703ca regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x03262322 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0b6c2cb8 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x13e3afb0 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x2be715d5 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x3597a78d cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x38275592 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x4280fa6d cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x496b0730 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x577c1421 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5caaf039 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x6400b990 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x68126405 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x6af6b9b2 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x7188c2df ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x800a44ac ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x9220f869 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xa6d9ec2e wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xa9e145e1 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0xae82856e cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xb449488a wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xdba45a4b cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xddc6847e cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0xde75c428 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xe9016f36 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xf3e8830d cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0xf5c22983 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xf9404561 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0xff4cc022 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a3fd1da lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x4871de03 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x4c63bb1e lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x68a46f1b lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6f996aef lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x7e6aebe3 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xad046d68 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xed5a0aed lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x53e8c521 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xce3a2236 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x236a3daa snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0x95916ce9 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0xa854a682 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xc92bdb09 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a8fd794 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x770b9f9b snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x8b26500f snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x0c695637 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x0e207a32 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x100e7a8f snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x15f5ff80 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x17daa231 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1cfc0113 snd_cards +EXPORT_SYMBOL sound/core/snd 0x1f5ceddd snd_card_create +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x25328231 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x322be4fb snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3f12f037 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x43300174 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x4455dc43 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x5792f755 snd_power_wait +EXPORT_SYMBOL sound/core/snd 0x58863bc9 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x5edc7b81 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x5fdeac71 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x611d5503 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x631f8af8 snd_device_new +EXPORT_SYMBOL sound/core/snd 0x6bac755f snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x6d0a434c snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0x6db0edc2 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0x7072d910 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x7b6e9c0c snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x911b93ca snd_card_register +EXPORT_SYMBOL sound/core/snd 0x916078ab snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x922e178d snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0x96cdabd3 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x991286ef snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x9967a588 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x9a144c64 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x9c2dbaee snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xa2bc0da0 snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0xabae3065 snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb5d624f6 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0xbd20ad49 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0xc066c94e snd_seq_root +EXPORT_SYMBOL sound/core/snd 0xc85de96f snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xcf22fbfd snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xd257b3ce snd_device_free +EXPORT_SYMBOL sound/core/snd 0xdec209da snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xec54d38b snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0xef98464c _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0xf0508b5a snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0xf4e10503 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0xf8abc53f snd_card_proc_new +EXPORT_SYMBOL sound/core/snd-hwdep 0x23368326 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3def4449 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xbb330f3c snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xbe0f6a47 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc03fd798 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0xdbcc4ab1 snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x07b20fd6 snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0x0c12efa2 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x0c41bc46 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x0e82ae22 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x178663d1 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x178a5745 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0x1971bfe6 snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x25d77e83 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x26737fdb snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x40b1a19b snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4dd2b7c6 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x4ec4de6a snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5a5fde75 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x5ae27f35 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x64d7079b snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6a462cb8 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x6fc520b9 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x79039186 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x7ac7e30e snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x8188d885 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8fe26429 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x90420c8a snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0x93529834 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x9d8020d9 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x9dbcd13f snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x9f1e4617 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xb9da6863 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xbdec1b53 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0xc2a3d9f4 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xce6e6e50 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd8b2840e snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe0fedcec snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xe97506d3 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0xeb874678 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0xf3422b4e snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf67c6342 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0xf82bb481 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0xfb4f9b6f snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0xfbe804fa snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-rawmidi 0x00184ffe snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1623b739 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x16f25cea snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1a5370d3 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x22f322d8 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x41eabd87 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x488c4db7 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0x509a3666 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5d1fe5f0 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5e89189c snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7181b0a3 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x72877cf9 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x73d2dd2c snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb51aa46b snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xcbd267d4 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe8fde1de snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xeff87163 snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-timer 0x02ed843e snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0x0510fd40 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x081eeff8 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0x11677c40 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0x32be0781 snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x42265c87 snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x54f0d97d snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x8a2da6da snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0xa03e1030 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xa78eba54 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0xbc332df6 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0xd4698ef9 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xdf16da2a snd_timer_close +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x886be15d snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x15a76c97 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x23b7419a snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8e41bd21 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9627d851 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x975db2b4 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9fd89e5b snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xb7dee661 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc896ddeb snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd7231570 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x07454ddf snd_opl4_read +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x0fdcf969 snd_opl4_create +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xb074bd3d snd_opl4_read_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xe69fbc1b snd_opl4_write_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xf59f3453 snd_opl4_write +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1984fd64 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x28547a07 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x65969238 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6b82c9a1 snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x70a282aa snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x98bddeea snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xadaeeadb snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb36afc23 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbc45c934 snd_vx_dsp_load +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0b9ee54d snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x304492c0 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x724773cc snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x81cd62d2 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xab692874 snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf1d58b97 snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x07acf304 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x1acf8442 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x24cc1647 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x9817854b snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xdcad35c4 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe3865bc1 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x4e92258a snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xbaef1e02 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xde7a1041 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xecb68fbf snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2477b00f snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x958ed53f snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x879b3acb snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xefbbb851 snd_tea575x_init +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x5efe0b2b snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc7ccc934 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd1f0c6bd snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd59b3bbc snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd8863800 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-i2c 0x3b52d47a snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x6b3c4048 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xb1b97105 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0xcd8e256e snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xe45cc751 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xf502af8e snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x7acd5fd9 snd_tea6330t_update_mixer +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x88e36f21 snd_tea6330t_detect +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x56f7b2c8 snd_es1688_create +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x97126532 snd_es1688_mixer +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xb8d77c6b snd_es1688_mixer_write +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xbbb61b79 snd_es1688_pcm +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0ec0f499 snd_gf1_peek +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x150c1bc5 snd_gf1_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x19f43e17 snd_gf1_i_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x1ccb54a3 snd_gf1_alloc_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x234280a5 snd_gf1_delay +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x26159fce snd_gus_use_dec +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x29bd0480 snd_gf1_write16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67 snd_gf1_lvol_to_gvol_raw +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x48e03fe0 snd_gf1_translate_freq +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x55e1c69f snd_gus_create +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5bfb9f76 snd_gf1_free_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5d1879ba snd_gf1_mem_alloc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5e3a8ea8 snd_gf1_mem_free +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x673a3b56 snd_gf1_stop_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x7a7d423c snd_gf1_mem_xfree +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5 snd_gus_interrupt +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x89a3210b snd_gf1_rawmidi_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x951f5bd2 snd_gf1_write_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9854df95 snd_gf1_ctrl_stop +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa755a0bd snd_gf1_pcm_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xaebe2b36 snd_gf1_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb8ede9d2 snd_gf1_i_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb9326a0c snd_gf1_poke +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xbc4b5dbd snd_gus_use_inc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xbcea9d59 snd_gf1_new_mixer +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xbd3e326f snd_gf1_dram_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527 snd_gf1_atten_table +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xcf6a60e9 snd_gus_dram_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xda2d3055 snd_gf1_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe6448cd1 snd_gf1_i_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf3bc5a13 snd_gf1_mem_lock +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf602741e snd_gus_initialize +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xfd3dfd8b snd_gus_dram_read +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3 snd_msnd_init_queue +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x205fe8e8 snd_msnd_dsp_halt +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x68036c10 snd_msnd_send_word +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24 snd_msndmidi_input_read +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x760ac29c snd_msndmix_setup +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x84c3dc01 snd_msnd_send_dsp_cmd +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x8d791c94 snd_msndmix_force_recsrc +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x953e8ae3 snd_msndmix_new +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xa160f1d1 snd_msnd_DARQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xa1867d5d snd_msnd_upload_host +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xc5c7f939 snd_msnd_disable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xcdac4e5f snd_msnd_pcm +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xd1626c02 snd_msnd_DAPQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xf5abc87c snd_msnd_enable_irq +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0691c4fa snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x11bd497c snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x23a47245 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x23dcc902 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x26e8a5e6 snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x5d7715a2 snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x5f5032c2 snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8716a320 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd551f6c6 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xf26d85a0 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0x67e00ea4 snd_sb_csp_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x620041da snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xd7249c36 snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xdf7d9362 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x33e85c42 snd_sb8dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x7ae7163b snd_sb8dsp_midi +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xaf753f3b snd_sb8dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xf9e6695a snd_sb8dsp_midi_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x0fd4d27e snd_emu8000_dma_chan +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x1d80298d snd_emu8000_update_chorus_mode +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x2ede6a75 snd_emu8000_load_chorus_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x4f8454b1 snd_emu8000_update_equalizer +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x618814e1 snd_emu8000_peek_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x8ca789fa snd_emu8000_load_reverb_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x90785617 snd_emu8000_peek +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9a0d7a42 snd_emu8000_poke_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xc156db98 snd_emu8000_update_reverb_mode +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xc9937f72 snd_emu8000_init_fm +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xde15aa9a snd_emu8000_poke +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x026d563d snd_wss_timer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x1004403b snd_wss_get_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x14da768c snd_cs4236_ext_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x273f98ae snd_wss_create +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x321d1df6 snd_wss_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x388494d7 snd_wss_get_pcm_ops +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x4169fa61 snd_wss_info_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x49dcaddb snd_wss_free +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x62c597b8 snd_wss_get_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x7584f2a2 snd_wss_mixer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x87d9fca7 snd_wss_info_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x93944f7f snd_wss_overrange +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa0b3f8e5 snd_wss_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa32b4494 snd_wss_put_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xab7835f7 snd_cs4236_ext_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb4d5364a snd_wss_mce_up +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd1ea9317 snd_wss_put_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe83ac1db snd_wss_mce_down +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5 snd_wss_interrupt +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf768a920 snd_wss_chip_id +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xfff96236 snd_wss_pcm +EXPORT_SYMBOL sound/oss/ad1848 0x1ab6caa5 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x1bf11a20 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x55262c70 probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x0bd7e121 attach_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4 probe_mpu401 +EXPORT_SYMBOL sound/oss/msnd 0x1186f48f msnd_fifo_read +EXPORT_SYMBOL sound/oss/msnd 0x234f64e0 msnd_register +EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf msnd_init_queue +EXPORT_SYMBOL sound/oss/msnd 0x54230dc1 msnd_fifo_write +EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb msnd_unregister +EXPORT_SYMBOL sound/oss/msnd 0x6587640b msnd_disable_irq +EXPORT_SYMBOL sound/oss/msnd 0x6601493b msnd_fifo_make_empty +EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b msnd_send_dsp_cmd +EXPORT_SYMBOL sound/oss/msnd 0x9274d677 msnd_fifo_free +EXPORT_SYMBOL sound/oss/msnd 0x95d37486 msnd_upload_host +EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420 msnd_send_word +EXPORT_SYMBOL sound/oss/msnd 0xade99e25 msnd_fifo_alloc +EXPORT_SYMBOL sound/oss/msnd 0xb3520772 msnd_fifo_init +EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb msnd_fifo_write_io +EXPORT_SYMBOL sound/oss/msnd 0xefdd1843 msnd_enable_irq +EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662 msnd_fifo_read_io +EXPORT_SYMBOL sound/oss/sb_lib 0x3fe18c46 sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xb4005f37 probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x049f8724 sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x194f3ec8 midi_devs +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x891caffa synth_devs +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x8b1d8c17 audio_devs +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb1699894 sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xc9d8730d sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xe86abd8b mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0xa43a83ef probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x21445bf8 snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x261ba68a snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2a80b8ec snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2f494299 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3901eae2 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x45fc28c8 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x49260ade snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4a8f3c65 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x565135b3 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x64285886 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x65c67224 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7e08cf0d snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa4f84676 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xabf408ab snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd440a48f snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf479ee21 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf9bad4d7 snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x00e54b8d snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2d1e4663 snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x39fecfd2 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x63e1c4a0 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6c70ad89 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa0bec67d snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc39239c2 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc8c4aa0f snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe6f3c7c7 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x7c4fd449 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x209103f5 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xaa868e39 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xb2001a12 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x05a6a245 oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x15a8c7a6 oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2eeb3eb9 oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3b421cf5 oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x574d1996 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x58e1088c oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5c44eb95 oxygen_reset_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x64356995 oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x85de3fa8 oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9498ff0d oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9a2ff409 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9b142d3d oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa25a74b0 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xaf9cb9c4 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd008f946 oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd65b19c9 oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd772c19a oxygen_pci_probe +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xda41b457 oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xef2697ba oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf688a4fc oxygen_write32_masked +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x3ae31aa8 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x59079f99 snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x75ce2994 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf3088601 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xff355efc snd_trident_stop_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xba4528bb uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x28ec4750 register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x437ef962 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x7defd5a2 sound_class +EXPORT_SYMBOL sound/soundcore 0x922e34d9 register_sound_special +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xd6f92e2d register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0xed2b9ca9 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1671d1e3 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x460f4aad snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7a380630 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb7cb4019 snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd6c5100c snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xeddad476 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/snd-util-mem 0x13f8d739 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x1b0ae217 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x2d95ffe2 snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x84f10897 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x9b7b6899 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xdb3dd224 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xe8ee6689 snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xfa5b77f1 __snd_util_memblk_new +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xa038db3c snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x06eebb8f dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x252fcc7f dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x6a7d984c dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xc1916815 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xd92e3d49 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xe5302c6c dm_mem_cache_free +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x41936831 lirc_get_pdata +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x7d71125c lirc_register_driver +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x0037e8d0 generic_writepages +EXPORT_SYMBOL vmlinux 0x00546468 put_io_context +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00861d82 prepare_binprm +EXPORT_SYMBOL vmlinux 0x0094be44 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x009ab584 tc_classify +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00d5233d register_md_personality +EXPORT_SYMBOL vmlinux 0x00d94c91 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x00f97b2d blk_integrity_register +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x01356b17 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x0154fb6a __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x01661193 scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x01789046 tty_unregister_device +EXPORT_SYMBOL vmlinux 0x0184e65c mmc_resume_host +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019b3fbe alloc_file +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01d5c1c5 dev_addr_add +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x02340215 cdev_init +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x02657999 __secpath_destroy +EXPORT_SYMBOL vmlinux 0x028f87c6 dev_add_pack +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02a9d504 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02b01a64 cfb_imageblit +EXPORT_SYMBOL vmlinux 0x02c13530 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x02c90397 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02e30331 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x02f4b8d4 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x0302a073 napi_get_frags +EXPORT_SYMBOL vmlinux 0x030ce8e2 unregister_netdevice +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0366aa69 balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0x0371b296 __ht_create_irq +EXPORT_SYMBOL vmlinux 0x0372478f unbind_con_driver +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x0380d513 datagram_poll +EXPORT_SYMBOL vmlinux 0x03a4ff5a mutex_lock +EXPORT_SYMBOL vmlinux 0x03be0dcf arp_broken_ops +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x04173c62 put_page +EXPORT_SYMBOL vmlinux 0x0417d8b7 get_super +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x042fe0a1 dm_unregister_target +EXPORT_SYMBOL vmlinux 0x04301226 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x044afa4b security_path_rename +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04b1d6fd blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x050848d8 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x0513cb87 module_refcount +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x05321745 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x056049c4 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x0577bcb8 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x05a17c3f tcp_sendpage +EXPORT_SYMBOL vmlinux 0x05d8326e simple_readpage +EXPORT_SYMBOL vmlinux 0x05df53c9 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x06073b03 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x0615ac80 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x06194c96 bdevname +EXPORT_SYMBOL vmlinux 0x063c7907 iunique +EXPORT_SYMBOL vmlinux 0x0643e778 dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x06465d59 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x0660e2a8 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x0668d58e xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x068c7263 ioremap_cache +EXPORT_SYMBOL vmlinux 0x068ec5bf bio_kmalloc +EXPORT_SYMBOL vmlinux 0x06adfcf4 phy_attach_direct +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06f54e4a user_path_at +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x070e5891 pci_disable_msi +EXPORT_SYMBOL vmlinux 0x0714417c get_empty_filp +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x07357e5e dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x074683fd generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x0748b888 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x07608604 acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x0766f8e1 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x0769298f sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x076bbae6 inode_permission +EXPORT_SYMBOL vmlinux 0x078677b0 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07c0c9fb __page_symlink +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07cf89b9 file_remove_suid +EXPORT_SYMBOL vmlinux 0x07cf98f5 journal_init_inode +EXPORT_SYMBOL vmlinux 0x07d50a24 csum_partial +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07e709a8 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x07ed9604 scsi_put_command +EXPORT_SYMBOL vmlinux 0x0802a005 force_sig +EXPORT_SYMBOL vmlinux 0x081f74dc locks_copy_lock +EXPORT_SYMBOL vmlinux 0x0827f182 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x084f700d tcf_hash_check +EXPORT_SYMBOL vmlinux 0x08560160 free_buffer_head +EXPORT_SYMBOL vmlinux 0x0865d795 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x0886e5fa neigh_update +EXPORT_SYMBOL vmlinux 0x08b56d71 pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0x08b79be0 llc_sap_close +EXPORT_SYMBOL vmlinux 0x08d32f9a __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08d80dab unload_nls +EXPORT_SYMBOL vmlinux 0x090ed928 rfkill_set_states +EXPORT_SYMBOL vmlinux 0x091a6b01 mem_map +EXPORT_SYMBOL vmlinux 0x0926777e phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x093382b3 nlmsg_notify +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x09484e14 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x0963a999 aio_put_req +EXPORT_SYMBOL vmlinux 0x097c495a sock_no_getname +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x09b0cb8f bdev_read_only +EXPORT_SYMBOL vmlinux 0x09ba626c ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c89dd0 scsi_device_get +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09e44043 free_netdev +EXPORT_SYMBOL vmlinux 0x09e5bdfc dma_ops +EXPORT_SYMBOL vmlinux 0x09ffdbdd gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x0a1e87f9 atomic64_add_negative +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a496e39 blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x0a57bf05 dma_alloc_from_coherent +EXPORT_SYMBOL vmlinux 0x0a942c53 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x0aa8b1e2 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0af7c193 release_sock +EXPORT_SYMBOL vmlinux 0x0afa5935 phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b0e8a40 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b777b26 vfs_getattr +EXPORT_SYMBOL vmlinux 0x0b8fe91b blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0x0ba73d01 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x0c0406dc unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x0c1a09cc dma_supported +EXPORT_SYMBOL vmlinux 0x0c33b918 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x0c3b9748 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x0c40c10a unregister_console +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca7b7a8 acpi_check_region +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cb1351e rtnl_unicast +EXPORT_SYMBOL vmlinux 0x0cbf9a45 xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x0ccc51aa xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x0cf6313f d_find_alias +EXPORT_SYMBOL vmlinux 0x0cf66dde put_disk +EXPORT_SYMBOL vmlinux 0x0d23803d unregister_netdev +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d492d12 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x0d4b77b7 gen_pool_add +EXPORT_SYMBOL vmlinux 0x0d4d68f9 mca_device_transform_ioport +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d6592df vfs_llseek +EXPORT_SYMBOL vmlinux 0x0d65a510 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x0d6c963c copy_from_user +EXPORT_SYMBOL vmlinux 0x0d946a70 d_obtain_alias +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0da43262 iget_failed +EXPORT_SYMBOL vmlinux 0x0db367f6 unlock_rename +EXPORT_SYMBOL vmlinux 0x0db4c470 d_alloc +EXPORT_SYMBOL vmlinux 0x0dbc11f6 input_allocate_device +EXPORT_SYMBOL vmlinux 0x0dc1b9ad blk_make_request +EXPORT_SYMBOL vmlinux 0x0dcf036f pcibios_set_irq_routing +EXPORT_SYMBOL vmlinux 0x0de816c4 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x0e14276e neigh_parms_release +EXPORT_SYMBOL vmlinux 0x0e34c714 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e5aa336 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x0ec71fb0 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x0ecbe285 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x0ed57848 genl_register_ops +EXPORT_SYMBOL vmlinux 0x0edd04d0 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x0ef70c61 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x0efdbe49 rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f21a13d d_move +EXPORT_SYMBOL vmlinux 0x0f28f40f xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x0f3b3843 unregister_8022_client +EXPORT_SYMBOL vmlinux 0x0f81506b acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0x0f8bb1ec xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x0fa7538f kernel_read +EXPORT_SYMBOL vmlinux 0x0faad744 generic_fillattr +EXPORT_SYMBOL vmlinux 0x0fce3021 do_munmap +EXPORT_SYMBOL vmlinux 0x0fcf6d20 skb_over_panic +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x0ffe7b10 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x0fff4fca pnp_possible_config +EXPORT_SYMBOL vmlinux 0x103d33ce pci_disable_device +EXPORT_SYMBOL vmlinux 0x103e9405 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x104e73cd sock_wake_async +EXPORT_SYMBOL vmlinux 0x106f09cd dev_addr_del +EXPORT_SYMBOL vmlinux 0x108b173b dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10b4e289 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0x10c1a5a5 vfs_statfs +EXPORT_SYMBOL vmlinux 0x10ea560e elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x10ed4777 set_page_dirty +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x1106c623 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x114201e7 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118e0ad5 locks_remove_posix +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11a877a6 hci_register_proto +EXPORT_SYMBOL vmlinux 0x11aab36f eth_mac_addr +EXPORT_SYMBOL vmlinux 0x11ad0059 init_net +EXPORT_SYMBOL vmlinux 0x11c3cb77 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x120507ac idr_get_new +EXPORT_SYMBOL vmlinux 0x1210a991 __devm_request_region +EXPORT_SYMBOL vmlinux 0x12263efd __devm_release_region +EXPORT_SYMBOL vmlinux 0x1242ca43 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x12bf2a28 kill_litter_super +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x12fce172 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x13424a8a bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x135b83dc thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x136346db pci_reenable_device +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x139612e6 pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x13bdf3cf scm_detach_fds +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x14085c95 journal_destroy +EXPORT_SYMBOL vmlinux 0x140fbb95 mntput_no_expire +EXPORT_SYMBOL vmlinux 0x1411f64d serio_unregister_port +EXPORT_SYMBOL vmlinux 0x142a33f7 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x143b7e64 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x14639951 seq_release_private +EXPORT_SYMBOL vmlinux 0x146a91a9 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x14aa6b5e pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14b918e6 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x14f332ea up_read +EXPORT_SYMBOL vmlinux 0x151664a2 bio_clone +EXPORT_SYMBOL vmlinux 0x1542eb8e ppp_register_compressor +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x154f62b5 tty_mutex +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x1581474c llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x158fb0bd lro_receive_skb +EXPORT_SYMBOL vmlinux 0x15e194b2 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x162d08f6 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x162ee2d9 request_key_async +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x16713dba mca_unregister_driver +EXPORT_SYMBOL vmlinux 0x1675606f bad_dma_address +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16b72630 cdrom_release +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16f02436 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x1710cd88 generic_unplug_device +EXPORT_SYMBOL vmlinux 0x17148317 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x172d6561 uart_match_port +EXPORT_SYMBOL vmlinux 0x17720876 ht_create_irq +EXPORT_SYMBOL vmlinux 0x1785a64e may_umount +EXPORT_SYMBOL vmlinux 0x17a2ac56 generic_block_bmap +EXPORT_SYMBOL vmlinux 0x17b50132 arp_tbl +EXPORT_SYMBOL vmlinux 0x17bbcb7c ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x17bf774b misc_register +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x18039ed8 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x1835887b d_rehash +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1845e7c5 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x187e0705 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x18a42d68 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x18c0ce3f do_splice_to +EXPORT_SYMBOL vmlinux 0x18d21c46 netlink_ack +EXPORT_SYMBOL vmlinux 0x18ee8bd5 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x190a19ba blk_free_tags +EXPORT_SYMBOL vmlinux 0x190ffea9 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x19284dec scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x1945e4e2 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x19724b32 pnp_register_driver +EXPORT_SYMBOL vmlinux 0x1973110a bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19a38357 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x19fa1c43 nf_log_unregister +EXPORT_SYMBOL vmlinux 0x19fe5a8e phy_register_fixup +EXPORT_SYMBOL vmlinux 0x1a016668 simple_fsync +EXPORT_SYMBOL vmlinux 0x1a1244e9 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a64306b xfrm_state_add +EXPORT_SYMBOL vmlinux 0x1a66c833 iput +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a861c42 mmc_align_data_size +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1acc73ad acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0x1acdc5a9 skb_pad +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1ad8876b security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x1ae8c524 blk_rq_init +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b1d5958 get_phy_device +EXPORT_SYMBOL vmlinux 0x1b1f9c40 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x1b29d8cb mapping_tagged +EXPORT_SYMBOL vmlinux 0x1b491022 proto_register +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b76ddf5 get_user_pages +EXPORT_SYMBOL vmlinux 0x1b881789 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bc626fb tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x1bef75c9 nf_register_hooks +EXPORT_SYMBOL vmlinux 0x1bf9fbe0 blk_plug_device +EXPORT_SYMBOL vmlinux 0x1bfeaea1 md_write_start +EXPORT_SYMBOL vmlinux 0x1c152112 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x1c1b9ca2 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x1c4cc95d blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x1c62bde6 simple_getattr +EXPORT_SYMBOL vmlinux 0x1c7219f4 dev_unicast_add +EXPORT_SYMBOL vmlinux 0x1c777a2b __mmc_claim_host +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c8cd95e blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1ce16116 scsi_free_command +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1d1756e2 simple_statfs +EXPORT_SYMBOL vmlinux 0x1d2bf70d skb_tx_hash +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30b70c rwsem_wake +EXPORT_SYMBOL vmlinux 0x1d3bfd96 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x1d434e3d jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dcb646c mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1dd5f86b sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x1de8f8ef do_sync_write +EXPORT_SYMBOL vmlinux 0x1df5a887 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x1e0c2be4 ioremap_wc +EXPORT_SYMBOL vmlinux 0x1e2288f1 tty_shutdown +EXPORT_SYMBOL vmlinux 0x1e2aa1ba dma_pool_free +EXPORT_SYMBOL vmlinux 0x1e394ca1 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e8bc926 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x1eaff0f0 dm_table_get +EXPORT_SYMBOL vmlinux 0x1eb4c1d1 udp_ioctl +EXPORT_SYMBOL vmlinux 0x1eb96aa4 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1ecf0c03 rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x1edbd023 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f0c9295 set_irq_chip +EXPORT_SYMBOL vmlinux 0x1f0fc242 dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f2c66f3 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x1f3d19b0 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x1f411c38 km_policy_expired +EXPORT_SYMBOL vmlinux 0x1f42c6ef pskb_copy +EXPORT_SYMBOL vmlinux 0x1f50546f key_payload_reserve +EXPORT_SYMBOL vmlinux 0x1f520957 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x1f668593 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x1f8bbd46 sync_blockdev +EXPORT_SYMBOL vmlinux 0x1f993a11 arp_xmit +EXPORT_SYMBOL vmlinux 0x1fbba5bb iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x20199150 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x202864b7 kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x202bf77f journal_ack_err +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x202ea0ae insert_inode_locked +EXPORT_SYMBOL vmlinux 0x2034ee86 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x205444db i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x2066dbda scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x207c6735 vfs_readdir +EXPORT_SYMBOL vmlinux 0x207fb9fd km_report +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x20897f63 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x209d678f devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x2100cec4 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x211d5aa9 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x2151b378 pskb_expand_head +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x21997134 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x219d83d1 mb_cache_create +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21f940bd ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x21fe3f25 scsi_finish_command +EXPORT_SYMBOL vmlinux 0x220341e2 sock_wfree +EXPORT_SYMBOL vmlinux 0x222365c2 tcf_em_register +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2231a894 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x2249d48e qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x224adc56 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22caab8f blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x22f64cfd sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x230f1f37 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x23238422 pcim_iomap +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x233477fc skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x23372602 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x2362be8f netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0x236815e9 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x23a9d574 key_type_keyring +EXPORT_SYMBOL vmlinux 0x23aee35c handle_sysrq +EXPORT_SYMBOL vmlinux 0x23b70e45 input_close_device +EXPORT_SYMBOL vmlinux 0x23c3c3d1 pnp_release_card_device +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23f210b4 consume_skb +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x243c4c15 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x243ffddc idr_destroy +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x2442e6d2 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x2450d810 kern_path +EXPORT_SYMBOL vmlinux 0x2453ef5f sync_inode +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x245bdd26 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x24730228 bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x249290ef textsearch_prepare +EXPORT_SYMBOL vmlinux 0x24960fa6 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x2498ffb1 prepare_creds +EXPORT_SYMBOL vmlinux 0x24a7ff33 proc_dostring +EXPORT_SYMBOL vmlinux 0x24c442c9 bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x24c628b6 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x24dace4d dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x24ed7ac5 load_nls_default +EXPORT_SYMBOL vmlinux 0x24fccda4 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x251cdbcb km_state_notify +EXPORT_SYMBOL vmlinux 0x253752fc mca_device_claimed +EXPORT_SYMBOL vmlinux 0x253d1efe unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x2548ed34 set_pages_wb +EXPORT_SYMBOL vmlinux 0x256553a0 set_security_override +EXPORT_SYMBOL vmlinux 0x256e222a netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x25856756 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x259bd8a3 pnp_find_dev +EXPORT_SYMBOL vmlinux 0x25cba924 pnp_find_card +EXPORT_SYMBOL vmlinux 0x25d3e2a3 atomic64_dec_return +EXPORT_SYMBOL vmlinux 0x2627ed6c block_truncate_page +EXPORT_SYMBOL vmlinux 0x264052ea kmem_cache_create +EXPORT_SYMBOL vmlinux 0x266babaf fb_set_var +EXPORT_SYMBOL vmlinux 0x266fb26b set_anon_super +EXPORT_SYMBOL vmlinux 0x267b63d4 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26800fbd request_firmware +EXPORT_SYMBOL vmlinux 0x2685c3d7 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x268cc6a2 sys_close +EXPORT_SYMBOL vmlinux 0x269ad21e default_file_splice_read +EXPORT_SYMBOL vmlinux 0x26cf5b8a unregister_nls +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26f358d1 do_sync_read +EXPORT_SYMBOL vmlinux 0x26fb5f8d iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x2727b5a0 audit_log_end +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x2762e7e2 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27b54900 bio_alloc +EXPORT_SYMBOL vmlinux 0x27b59b93 dst_alloc +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c1e253 posix_test_lock +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27d6920b f_setown +EXPORT_SYMBOL vmlinux 0x27e51d93 loop_register_transfer +EXPORT_SYMBOL vmlinux 0x27f37dc8 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x2850cb0b scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x28916890 ip6_xmit +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28a36cdc set_blocksize +EXPORT_SYMBOL vmlinux 0x28b715a6 isapnp_cfg_end +EXPORT_SYMBOL vmlinux 0x28e83f29 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x28f98192 input_unregister_handle +EXPORT_SYMBOL vmlinux 0x2904ab78 block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x2906f149 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x290dd202 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x291066bf kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x293fec0e tty_set_operations +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29625e53 dma_release_from_coherent +EXPORT_SYMBOL vmlinux 0x29815b7e xfrm_register_type +EXPORT_SYMBOL vmlinux 0x29a2243d zero_fill_bio +EXPORT_SYMBOL vmlinux 0x29a7eef4 seq_putc +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29ed40bf sk_stream_error +EXPORT_SYMBOL vmlinux 0x29fb43b5 sock_kfree_s +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a51536d key_unlink +EXPORT_SYMBOL vmlinux 0x2a5de03d xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x2a7a72ac inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x2a94bca4 pv_cpu_ops +EXPORT_SYMBOL vmlinux 0x2a9f114f __serio_register_driver +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2aa40ebc sock_sendmsg +EXPORT_SYMBOL vmlinux 0x2ac080ad ___pskb_trim +EXPORT_SYMBOL vmlinux 0x2acbadc0 i2c_transfer +EXPORT_SYMBOL vmlinux 0x2acbf618 set_pages_x +EXPORT_SYMBOL vmlinux 0x2acc60cc unlock_super +EXPORT_SYMBOL vmlinux 0x2ae1f5da phy_start_aneg +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2afa2687 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b0f6ac0 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x2b3c53c3 kill_pid +EXPORT_SYMBOL vmlinux 0x2b904fbe dquot_commit +EXPORT_SYMBOL vmlinux 0x2b98d7e3 pci_get_subsys +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2ba713e7 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x2bad09a8 simple_sync_file +EXPORT_SYMBOL vmlinux 0x2bada262 get_fs_type +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bc89426 nf_reinject +EXPORT_SYMBOL vmlinux 0x2bc95bd4 memset +EXPORT_SYMBOL vmlinux 0x2bdace6a i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x2be6e97e xfrm_lookup +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c3a869d thaw_bdev +EXPORT_SYMBOL vmlinux 0x2c44d530 tcp_poll +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2c68f548 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x2c878cf9 eth_header_parse +EXPORT_SYMBOL vmlinux 0x2c8f5989 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0x2c9874fe ida_remove +EXPORT_SYMBOL vmlinux 0x2c9c2dbd kill_pgrp +EXPORT_SYMBOL vmlinux 0x2cb9fe03 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x2cee7232 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x2d278fe4 setup_new_exec +EXPORT_SYMBOL vmlinux 0x2d37342e cpu_online_mask +EXPORT_SYMBOL vmlinux 0x2d478f06 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2da7d4f8 pci_release_regions +EXPORT_SYMBOL vmlinux 0x2dbafbe3 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0x2dca9cd7 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2df87ede bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x2e17437c xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e408f32 d_splice_alias +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e4a684b vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x2e4f72e3 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0x2e53a810 dm_get_device +EXPORT_SYMBOL vmlinux 0x2e581015 hci_connect +EXPORT_SYMBOL vmlinux 0x2e60bace memcpy +EXPORT_SYMBOL vmlinux 0x2e69d167 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x2e7b0a28 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x2e97859f rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x2e9b4542 simple_release_fs +EXPORT_SYMBOL vmlinux 0x2ea832b5 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ece9bec end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x2efe5e09 atomic64_xchg +EXPORT_SYMBOL vmlinux 0x2f287f0d copy_to_user +EXPORT_SYMBOL vmlinux 0x2fd89b53 tty_port_close_start +EXPORT_SYMBOL vmlinux 0x2fde4c3d tty_kref_put +EXPORT_SYMBOL vmlinux 0x2fe83d52 bdget +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x30426f0d journal_restart +EXPORT_SYMBOL vmlinux 0x30744b60 simple_set_mnt +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x308fd750 skb_clone +EXPORT_SYMBOL vmlinux 0x309875ea skb_put +EXPORT_SYMBOL vmlinux 0x30b9efbb ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x310f653b pci_map_rom +EXPORT_SYMBOL vmlinux 0x31367fff fb_find_mode +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x316f13b9 pci_restore_state +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x31953ed1 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0x319e448e locks_init_lock +EXPORT_SYMBOL vmlinux 0x31af4c58 __blk_end_request +EXPORT_SYMBOL vmlinux 0x31b76106 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31f22df3 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0x3234aeca __breadahead +EXPORT_SYMBOL vmlinux 0x32547907 lro_flush_all +EXPORT_SYMBOL vmlinux 0x3265506f k8_northbridges +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x328822f5 set_pages_uc +EXPORT_SYMBOL vmlinux 0x32991bb1 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x32d5e601 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x32dc7b24 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0x32e6cc63 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x330d707d xfrm_register_km +EXPORT_SYMBOL vmlinux 0x33320022 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x3346c4b4 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0x335ad26b alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x336e6dfd skb_make_writable +EXPORT_SYMBOL vmlinux 0x3386b8d5 generic_make_request +EXPORT_SYMBOL vmlinux 0x33953f39 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x339c2000 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x33b4385c simple_transaction_read +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x33f1a053 dev_mc_add +EXPORT_SYMBOL vmlinux 0x34285ceb skb_free_datagram +EXPORT_SYMBOL vmlinux 0x342f60fe apm_info +EXPORT_SYMBOL vmlinux 0x3430bada tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x3443f538 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x345db880 deactivate_super +EXPORT_SYMBOL vmlinux 0x347d7481 lease_modify +EXPORT_SYMBOL vmlinux 0x348b5bd6 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a5fc11 inet_frag_find +EXPORT_SYMBOL vmlinux 0x34bc7a85 mca_device_read_stored_pos +EXPORT_SYMBOL vmlinux 0x35066681 __brelse +EXPORT_SYMBOL vmlinux 0x35510748 update_region +EXPORT_SYMBOL vmlinux 0x35b45b4d send_sig +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35eafb44 d_path +EXPORT_SYMBOL vmlinux 0x35eb6cd5 hci_get_route +EXPORT_SYMBOL vmlinux 0x35f0faa2 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x36349c46 dcache_readdir +EXPORT_SYMBOL vmlinux 0x363bee88 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x36669e02 find_vma +EXPORT_SYMBOL vmlinux 0x367c286b iget5_locked +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36b9823a jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x36d76f37 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x36d97d4e pnp_device_detach +EXPORT_SYMBOL vmlinux 0x371519a2 dm_io_client_create +EXPORT_SYMBOL vmlinux 0x372f501c init_buffer +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x377276c7 tcp_disconnect +EXPORT_SYMBOL vmlinux 0x377c1370 sock_map_fd +EXPORT_SYMBOL vmlinux 0x378a9b81 netdev_features_change +EXPORT_SYMBOL vmlinux 0x378b4862 udp_proc_register +EXPORT_SYMBOL vmlinux 0x379d65f5 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x37b86c4b pci_pme_active +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37f53bc2 thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x380caf87 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x3819b4b7 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x381fb096 llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x38203ca1 __init_rwsem +EXPORT_SYMBOL vmlinux 0x383cdc17 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x38425dc2 fddi_type_trans +EXPORT_SYMBOL vmlinux 0x3842cf47 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x3883c3ea phy_start +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38de3ef4 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x38de9b42 thaw_process +EXPORT_SYMBOL vmlinux 0x392e8329 pci_get_device +EXPORT_SYMBOL vmlinux 0x394ed975 inode_change_ok +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39952ed0 d_instantiate +EXPORT_SYMBOL vmlinux 0x39c63542 blk_register_region +EXPORT_SYMBOL vmlinux 0x39c8fcae blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3f9828 registered_fb +EXPORT_SYMBOL vmlinux 0x3a43efeb unlock_page +EXPORT_SYMBOL vmlinux 0x3a5b27da netlink_broadcast +EXPORT_SYMBOL vmlinux 0x3a80bd97 bio_sector_offset +EXPORT_SYMBOL vmlinux 0x3a833846 phy_disconnect +EXPORT_SYMBOL vmlinux 0x3a94dcc0 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3aa96519 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x3aaee487 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x3ac75e57 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x3adc15b9 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af5ba5e console_stop +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b5a12b9 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x3b766ff6 journal_dirty_data +EXPORT_SYMBOL vmlinux 0x3b790299 bdi_destroy +EXPORT_SYMBOL vmlinux 0x3b7dfd7d blk_put_request +EXPORT_SYMBOL vmlinux 0x3b89107b destroy_EII_client +EXPORT_SYMBOL vmlinux 0x3ba7eac9 uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3bda6a31 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x3bfbb670 security_inode_readlink +EXPORT_SYMBOL vmlinux 0x3c0e50d7 audit_log_format +EXPORT_SYMBOL vmlinux 0x3c10384c pci_fixup_device +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c3d643a poll_initwait +EXPORT_SYMBOL vmlinux 0x3c3e52b5 pci_target_state +EXPORT_SYMBOL vmlinux 0x3c4915f2 scsi_register +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c7555ef devm_iounmap +EXPORT_SYMBOL vmlinux 0x3c7dd30b bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x3c7e8796 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x3c8a8265 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cb3931b sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x3cbf9c03 secpath_dup +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cdfb51d sock_recvmsg +EXPORT_SYMBOL vmlinux 0x3ce096b4 qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x3ce0ea12 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3ced3b7c generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x3cffb5ed nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x3d2afe2b dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x3d38e464 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da17e35 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3dbd351c uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x3dc1319d scsi_init_io +EXPORT_SYMBOL vmlinux 0x3e0b0633 netlink_set_err +EXPORT_SYMBOL vmlinux 0x3e1d59a8 serio_open +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e725b4f page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x3e764519 nonseekable_open +EXPORT_SYMBOL vmlinux 0x3e7feaf2 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x3e80d06d arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0x3e988ca5 skb_gso_segment +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ef78d80 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f39b162 up_write +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5d5afc may_umount_tree +EXPORT_SYMBOL vmlinux 0x3f94e6bc bio_add_page +EXPORT_SYMBOL vmlinux 0x3f986de6 xfrm_input +EXPORT_SYMBOL vmlinux 0x3fec048f sg_next +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x3ffd5297 bmap +EXPORT_SYMBOL vmlinux 0x4015e181 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x40189cac skb_under_panic +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40c0c276 blk_end_request +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x40c97744 blk_unplug +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x411e88e2 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x41203b53 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x418a4c07 in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41dd232d ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0x41f36d8f blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x420a681a __put_cred +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x4215a98f jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x4233563a mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0x4251bda6 del_gendisk +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x4273e718 init_task +EXPORT_SYMBOL vmlinux 0x42798e35 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x4292364c schedule +EXPORT_SYMBOL vmlinux 0x42c8de35 ioremap_nocache +EXPORT_SYMBOL vmlinux 0x42d4bd6b find_get_page +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x43051c53 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x430eed6b tcp_parse_options +EXPORT_SYMBOL vmlinux 0x4313c68b default_llseek +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x4349666b blk_sync_queue +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4355c0ed scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x435d6ef1 is_container_init +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x4375d330 nla_put +EXPORT_SYMBOL vmlinux 0x437ace96 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43af13a3 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x43d8b6dc scsi_device_put +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x442b8f2b xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x443aaaa3 dm_put_device +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x444eacfb journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44bc3b18 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x44c94f79 dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44f21bea idr_for_each +EXPORT_SYMBOL vmlinux 0x450eb7e7 inode_init_once +EXPORT_SYMBOL vmlinux 0x4511bf1d pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0x45195527 journal_stop +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x454ce821 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45f16498 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x4613f3d2 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x461a771a bio_pair_release +EXPORT_SYMBOL vmlinux 0x462822ed rtnl_create_link +EXPORT_SYMBOL vmlinux 0x4628f3c0 nf_register_hook +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x46684bb2 pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x467baa35 request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x46833f35 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0x4687aee8 generic_setlease +EXPORT_SYMBOL vmlinux 0x469c1eba scsi_remove_device +EXPORT_SYMBOL vmlinux 0x46f301d2 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0x470b6139 set_bh_page +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x473e6f39 mpage_writepages +EXPORT_SYMBOL vmlinux 0x474bd985 ip_dev_find +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x47510bfb netif_napi_add +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x476b0d33 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0x478937ad tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x47901ff7 mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x479c0ef5 rt6_lookup +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x479db491 dquot_drop +EXPORT_SYMBOL vmlinux 0x47b192ae tcf_exts_change +EXPORT_SYMBOL vmlinux 0x47cf4cb6 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x47d14d15 dquot_release +EXPORT_SYMBOL vmlinux 0x48133c65 no_llseek +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x482299bb elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0x483735c7 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x48506ac4 sock_create_lite +EXPORT_SYMBOL vmlinux 0x4855c46b xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x489703ce textsearch_destroy +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48a4ee34 kick_iocb +EXPORT_SYMBOL vmlinux 0x48addcb7 vfs_writev +EXPORT_SYMBOL vmlinux 0x48d4cd9b pv_mmu_ops +EXPORT_SYMBOL vmlinux 0x48f351b7 bio_copy_user +EXPORT_SYMBOL vmlinux 0x48f41ec1 dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0x4902628c vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x4910754e uart_update_timeout +EXPORT_SYMBOL vmlinux 0x49239942 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x492a5940 md_write_end +EXPORT_SYMBOL vmlinux 0x493b1f7f __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x49506fef ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x4951ebdc register_con_driver +EXPORT_SYMBOL vmlinux 0x4956e0ba blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x496d5561 bitmap_unplug +EXPORT_SYMBOL vmlinux 0x498b242a kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x49a19514 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x49a58040 cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0x49c6fafe __kill_fasync +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a422526 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x4a708c53 bt_sock_poll +EXPORT_SYMBOL vmlinux 0x4a7d49ac commit_creds +EXPORT_SYMBOL vmlinux 0x4a8a61bb bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4ae55945 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x4ae55bf7 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x4af7d9a8 __bio_clone +EXPORT_SYMBOL vmlinux 0x4afc1e49 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b38994c page_put_link +EXPORT_SYMBOL vmlinux 0x4b4a30ec tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b9b08a0 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x4ba462ed page_symlink +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bd47f8d jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x4bd53679 follow_pfn +EXPORT_SYMBOL vmlinux 0x4bfd7016 cdrom_media_changed +EXPORT_SYMBOL vmlinux 0x4bfee15a atomic64_set +EXPORT_SYMBOL vmlinux 0x4c0ef5ff alloc_disk +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c19d1fe lookup_one_len +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c263194 netlink_dump_start +EXPORT_SYMBOL vmlinux 0x4c2ad99c skb_checksum +EXPORT_SYMBOL vmlinux 0x4c31c3ae blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x4c3e538e sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x4c436449 bioset_free +EXPORT_SYMBOL vmlinux 0x4c63608e pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x4c7b5606 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x4c9edfa7 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4ce087f8 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x4cf6cb3c hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0x4d1cdc66 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x4d2dc830 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0x4d3648ff pci_request_regions +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d51025f tcp_check_req +EXPORT_SYMBOL vmlinux 0x4d7f8689 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x4d8e3b3a ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0x4d9b3530 lock_may_write +EXPORT_SYMBOL vmlinux 0x4da3990c __dst_free +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dc639f2 blk_get_request +EXPORT_SYMBOL vmlinux 0x4ded2c18 pci_release_region +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e14e3e6 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e4ed1bf nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0x4e56ff8a do_SAK +EXPORT_SYMBOL vmlinux 0x4e58b270 dma_find_channel +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e771a89 acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4eb8b1e3 phy_device_register +EXPORT_SYMBOL vmlinux 0x4ed34094 journal_revoke +EXPORT_SYMBOL vmlinux 0x4efb431d check_disk_size_change +EXPORT_SYMBOL vmlinux 0x4f267caa pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x4f37332e ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f56726e journal_forget +EXPORT_SYMBOL vmlinux 0x4f6a9cca inet_accept +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4f80aef8 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4ff2d718 set_device_ro +EXPORT_SYMBOL vmlinux 0x4ff64da4 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x5014c66f con_is_bound +EXPORT_SYMBOL vmlinux 0x50187c72 fb_pan_display +EXPORT_SYMBOL vmlinux 0x501c4684 inet_put_port +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x504ae5a0 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x505d55f6 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x5077b379 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x507b6dec bt_sock_register +EXPORT_SYMBOL vmlinux 0x5091ba17 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x5095eb09 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x509c0849 dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0x50b3643d clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x50bdd470 boot_cpu_data +EXPORT_SYMBOL vmlinux 0x50c3c253 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x514df317 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0x5152e605 memcmp +EXPORT_SYMBOL vmlinux 0x5186518f profile_pc +EXPORT_SYMBOL vmlinux 0x5187a5f9 __f_setown +EXPORT_SYMBOL vmlinux 0x5187ac4b xen_store_evtchn +EXPORT_SYMBOL vmlinux 0x51a6cb31 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x51f683d9 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x51f795f0 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x52014039 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x5229bdfd make_EII_client +EXPORT_SYMBOL vmlinux 0x524464fd scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x52510f42 kthread_stop +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x52830d77 hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x52a26b4f grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52b71644 skb_seq_read +EXPORT_SYMBOL vmlinux 0x52cdae35 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x52d2322b nf_unregister_hook +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x5318175d vfs_rename +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x533055a1 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x534c1e3c rfkill_destroy +EXPORT_SYMBOL vmlinux 0x5367b3ed pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x53782e73 da903x_query_status +EXPORT_SYMBOL vmlinux 0x537966ed pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x538eca8d set_pages_nx +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x540b42de netif_carrier_off +EXPORT_SYMBOL vmlinux 0x541dfef4 atomic64_inc +EXPORT_SYMBOL vmlinux 0x54276654 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x542dc19c dquot_free_space +EXPORT_SYMBOL vmlinux 0x5434b2a6 xfrm6_rcv +EXPORT_SYMBOL vmlinux 0x543fabdc __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x54491134 dentry_unhash +EXPORT_SYMBOL vmlinux 0x54608187 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x54625ea8 rfkill_unregister +EXPORT_SYMBOL vmlinux 0x546aa516 blk_start_queue +EXPORT_SYMBOL vmlinux 0x547d498b fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x54935666 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0x54a12647 scsi_remove_target +EXPORT_SYMBOL vmlinux 0x54a6d074 atomic64_dec +EXPORT_SYMBOL vmlinux 0x54e0b5a7 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54fe75d7 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x553f9dd3 down_read_trylock +EXPORT_SYMBOL vmlinux 0x5585236a nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x558dd639 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55ce8638 bio_integrity_split +EXPORT_SYMBOL vmlinux 0x55ef1604 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x55f129c5 pci_pme_capable +EXPORT_SYMBOL vmlinux 0x55f15393 names_cachep +EXPORT_SYMBOL vmlinux 0x55f15c33 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x56512f95 skb_append +EXPORT_SYMBOL vmlinux 0x56606f95 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x566d1a14 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x56772e70 seq_printf +EXPORT_SYMBOL vmlinux 0x5678308c simple_dir_operations +EXPORT_SYMBOL vmlinux 0x56996ea3 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x56a13bd9 journal_errno +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56d0aed5 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x56d86c09 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x57043d69 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x5705088a __vmalloc +EXPORT_SYMBOL vmlinux 0x5721e8f3 eisa_driver_unregister +EXPORT_SYMBOL vmlinux 0x572314af mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x573799e8 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x5756a734 dev_open +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x576f2fa3 register_netdevice +EXPORT_SYMBOL vmlinux 0x579fbcd2 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x58190f2b create_proc_entry +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x5848e08d fb_blank +EXPORT_SYMBOL vmlinux 0x584deafc n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x58533d5a tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x588802d2 input_flush_device +EXPORT_SYMBOL vmlinux 0x58b32c0e kmem_cache_name +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c6a384 seq_open +EXPORT_SYMBOL vmlinux 0x58d77df8 d_alloc_root +EXPORT_SYMBOL vmlinux 0x58dc0ebc bio_endio +EXPORT_SYMBOL vmlinux 0x58e23eda sock_register +EXPORT_SYMBOL vmlinux 0x58fef6f8 ist_info +EXPORT_SYMBOL vmlinux 0x59011a24 elv_rb_find +EXPORT_SYMBOL vmlinux 0x59146be0 ip6_frag_match +EXPORT_SYMBOL vmlinux 0x5915cf37 vm_insert_page +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x5936f824 generic_read_dir +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x59615121 blk_init_queue +EXPORT_SYMBOL vmlinux 0x597d8fb3 bio_split +EXPORT_SYMBOL vmlinux 0x599fe8de vmtruncate +EXPORT_SYMBOL vmlinux 0x59b0484c d_validate +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a4ec23e icmpv6_send +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a656508 devm_free_irq +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5ab0dfaa wireless_spy_update +EXPORT_SYMBOL vmlinux 0x5ac26c3d input_filter_device +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5b10fcd0 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x5b165d87 __scm_destroy +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b4fec2c test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5bfd985f inet_select_addr +EXPORT_SYMBOL vmlinux 0x5c1da6b1 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x5c200b7a elv_add_request +EXPORT_SYMBOL vmlinux 0x5c46300c inode_add_bytes +EXPORT_SYMBOL vmlinux 0x5c49835b km_state_expired +EXPORT_SYMBOL vmlinux 0x5c68705b mca_read_pos +EXPORT_SYMBOL vmlinux 0x5ca87de8 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x5cb205a6 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x5cb60514 filp_close +EXPORT_SYMBOL vmlinux 0x5cf81e22 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x5d06caca skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x5d072b84 file_fsync +EXPORT_SYMBOL vmlinux 0x5d112a57 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d2c627a netdev_set_master +EXPORT_SYMBOL vmlinux 0x5d4b12cd tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x5d6a04fb ppp_register_channel +EXPORT_SYMBOL vmlinux 0x5d74dbcf pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x5da5e625 dma_async_device_register +EXPORT_SYMBOL vmlinux 0x5db2a7d7 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x5dbf7e23 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x5dcc50ba netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0x5df57070 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0x5e45aba1 tcp_ioctl +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5e9ac8ea pci_save_state +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edc8f9d ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5ee60aa7 generic_write_checks +EXPORT_SYMBOL vmlinux 0x5f074ceb __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x5f1bd579 mca_find_adapter +EXPORT_SYMBOL vmlinux 0x5f223bdd mca_device_read_pos +EXPORT_SYMBOL vmlinux 0x5f2a80ad __break_lease +EXPORT_SYMBOL vmlinux 0x5f361551 pipe_lock +EXPORT_SYMBOL vmlinux 0x5f41049f security_file_permission +EXPORT_SYMBOL vmlinux 0x5f455968 generic_write_end +EXPORT_SYMBOL vmlinux 0x5f720f61 md_check_recovery +EXPORT_SYMBOL vmlinux 0x5fb0743f alloc_trdev +EXPORT_SYMBOL vmlinux 0x5fc59057 rfkill_register +EXPORT_SYMBOL vmlinux 0x5fe0cfc1 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x5ff49e75 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0x60002541 redraw_screen +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x602e8123 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x603c1df6 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x6042675d inet_frags_init +EXPORT_SYMBOL vmlinux 0x6043092c atomic64_dec_and_test +EXPORT_SYMBOL vmlinux 0x6044a11b get_sb_ns +EXPORT_SYMBOL vmlinux 0x6048b3fa bio_uncopy_user +EXPORT_SYMBOL vmlinux 0x608b2446 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60b16f47 open_by_devnum +EXPORT_SYMBOL vmlinux 0x60de5269 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x61290773 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x6186e53b sock_no_accept +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x619a827e pci_choose_state +EXPORT_SYMBOL vmlinux 0x619ee00b dev_remove_pack +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61c2e4a5 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x61f84195 napi_frags_skb +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x622075aa neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0x6220a961 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x62288ba5 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x622a47a6 ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x6241a2ab __copy_from_user_ll_nocache +EXPORT_SYMBOL vmlinux 0x6241fd2c acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x627b5ad8 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62a162bb simple_write_end +EXPORT_SYMBOL vmlinux 0x62aa5cc7 deny_write_access +EXPORT_SYMBOL vmlinux 0x62b5260d ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x62ce5b96 scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x62f45ba6 __lock_page +EXPORT_SYMBOL vmlinux 0x631c3144 set_pages_array_uc +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x6375f023 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x6380aff4 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0x63ab598b pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x63b0884b neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640a7078 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x6417f313 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x641f157b bio_init +EXPORT_SYMBOL vmlinux 0x6425edd2 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x64290718 __find_get_block +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x6436368f shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x64526a93 atomic64_sub_return +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x648306cf skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64c9a014 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64ffd5ad new_inode +EXPORT_SYMBOL vmlinux 0x6501f834 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x65047127 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x6514b3c9 llc_sap_open +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65265aaa aio_complete +EXPORT_SYMBOL vmlinux 0x652c31d0 dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0x6531738c scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x65545b8d pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x6554d1a9 register_nls +EXPORT_SYMBOL vmlinux 0x6563fe1f pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x6565d33f scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x656bd5e0 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x659ccef2 misc_deregister +EXPORT_SYMBOL vmlinux 0x65e72430 keyring_search +EXPORT_SYMBOL vmlinux 0x663dd71c rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x6642b0a4 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x66434424 bio_map_kern +EXPORT_SYMBOL vmlinux 0x6651e6d6 __serio_register_port +EXPORT_SYMBOL vmlinux 0x665891b2 netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x665a0498 dst_discard +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66ab9360 generic_permission +EXPORT_SYMBOL vmlinux 0x66ee2288 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x66fa6cbc pci_scan_bridge +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x67441554 skb_unlink +EXPORT_SYMBOL vmlinux 0x67513638 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x67633246 sock_create_kern +EXPORT_SYMBOL vmlinux 0x67804a19 __any_online_cpu +EXPORT_SYMBOL vmlinux 0x678e6458 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x67a1b018 __invalidate_device +EXPORT_SYMBOL vmlinux 0x67acedd3 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67cd4356 key_task_permission +EXPORT_SYMBOL vmlinux 0x67d8f6fa tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x684095f9 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x6849afbc tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x6856b8a7 ps2_handle_response +EXPORT_SYMBOL vmlinux 0x6871013a dget_locked +EXPORT_SYMBOL vmlinux 0x6873ee45 kill_anon_super +EXPORT_SYMBOL vmlinux 0x68861c75 eth_header +EXPORT_SYMBOL vmlinux 0x68a4b2fb cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0x68f2ace3 simple_write_begin +EXPORT_SYMBOL vmlinux 0x69098e3f genphy_resume +EXPORT_SYMBOL vmlinux 0x6957d174 journal_clear_err +EXPORT_SYMBOL vmlinux 0x696255ad rfkill_alloc +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x69782fb2 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x697a3d59 __bforget +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69840d87 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69958c14 mmc_register_driver +EXPORT_SYMBOL vmlinux 0x69962da0 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69ee6d32 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x69f40037 devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x69f8746c remove_arg_zero +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a27bfce csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x6a3f1409 dst_destroy +EXPORT_SYMBOL vmlinux 0x6a441bf9 key_alloc +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a482b81 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x6a5234dc vfs_mkdir +EXPORT_SYMBOL vmlinux 0x6a559f60 bitmap_endwrite +EXPORT_SYMBOL vmlinux 0x6a5e13f5 sysctl_string +EXPORT_SYMBOL vmlinux 0x6a614791 pci_bus_type +EXPORT_SYMBOL vmlinux 0x6a661236 pci_iounmap +EXPORT_SYMBOL vmlinux 0x6a7b2c53 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x6a7dccb9 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x6a9144fa qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x6a96ad16 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x6a9d4937 dev_load +EXPORT_SYMBOL vmlinux 0x6aaa589f netpoll_poll +EXPORT_SYMBOL vmlinux 0x6ab63b4e call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b1c4a82 get_phy_id +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b58ac19 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x6b5cd7d9 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x6b5ea113 pci_find_device +EXPORT_SYMBOL vmlinux 0x6b6781ea simple_transaction_set +EXPORT_SYMBOL vmlinux 0x6b937ffb mca_mark_as_used +EXPORT_SYMBOL vmlinux 0x6b975ad0 get_sb_bdev +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6b9cbb35 __napi_complete +EXPORT_SYMBOL vmlinux 0x6babe2a2 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb812e7 atomic64_add_return +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6beea626 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x6bff841d __blk_run_queue +EXPORT_SYMBOL vmlinux 0x6c0b9f8a scsi_print_sense +EXPORT_SYMBOL vmlinux 0x6c1345b2 d_add_ci +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c1f52df block_read_full_page +EXPORT_SYMBOL vmlinux 0x6c2e3320 strncmp +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c3dea4a __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x6c4ff9d1 find_inode_number +EXPORT_SYMBOL vmlinux 0x6c522c1b scsi_register_driver +EXPORT_SYMBOL vmlinux 0x6c55896b dquot_transfer +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6a52fa inet_addr_type +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c8b8d8e posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x6cc3b060 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x6ccfb776 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce3f20d pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0x6cf23154 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x6cfaccc1 arp_create +EXPORT_SYMBOL vmlinux 0x6d11e9c6 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x6d1bd16d tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x6d27d562 input_set_capability +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d535984 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x6d5a3cb8 start_tty +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d8a5345 scsi_host_get +EXPORT_SYMBOL vmlinux 0x6d9a15af generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dc2e6d8 dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0d02ea keyring_clear +EXPORT_SYMBOL vmlinux 0x6e0f0ec4 uart_add_one_port +EXPORT_SYMBOL vmlinux 0x6e22ce89 dquot_acquire +EXPORT_SYMBOL vmlinux 0x6e244158 simple_unlink +EXPORT_SYMBOL vmlinux 0x6e47bfc6 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x6e482e58 hci_send_sco +EXPORT_SYMBOL vmlinux 0x6e5ad29a hci_conn_put_device +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ea73c1e kobject_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6eae7902 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x6ec1797d tty_port_close +EXPORT_SYMBOL vmlinux 0x6ed05833 block_write_full_page +EXPORT_SYMBOL vmlinux 0x6ed8f2a7 bioset_create +EXPORT_SYMBOL vmlinux 0x6efd8382 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x6f18299f mca_bus_type +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6fad0825 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x6fadd69f blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x6faff24a submit_bh +EXPORT_SYMBOL vmlinux 0x6fc07756 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x7000c813 stop_tty +EXPORT_SYMBOL vmlinux 0x7009be13 scsi_remove_host +EXPORT_SYMBOL vmlinux 0x700c55a8 md_register_thread +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x703b86af dqget +EXPORT_SYMBOL vmlinux 0x7040f596 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x70473bc6 journal_start +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x705d5434 nobh_write_end +EXPORT_SYMBOL vmlinux 0x7076152e contig_page_data +EXPORT_SYMBOL vmlinux 0x7079bb3e vm_map_ram +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70a64b77 __free_pages +EXPORT_SYMBOL vmlinux 0x70b1f0d9 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d1f8f3 strncat +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70eb282e blkdev_get +EXPORT_SYMBOL vmlinux 0x70f05b6b sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x7105d5d7 napi_complete +EXPORT_SYMBOL vmlinux 0x710f750e jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x715ef70b fb_validate_mode +EXPORT_SYMBOL vmlinux 0x716599ea blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71803a89 llc_sap_find +EXPORT_SYMBOL vmlinux 0x7193331f dm_table_get_size +EXPORT_SYMBOL vmlinux 0x71983379 framebuffer_release +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71b07e51 unlock_buffer +EXPORT_SYMBOL vmlinux 0x71e2d540 scsi_ioctl +EXPORT_SYMBOL vmlinux 0x71ec2c9c cdev_index +EXPORT_SYMBOL vmlinux 0x720b2687 module_put +EXPORT_SYMBOL vmlinux 0x721c026a inet_csk_accept +EXPORT_SYMBOL vmlinux 0x724666ca per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0x724b8232 scsi_execute +EXPORT_SYMBOL vmlinux 0x725abc7c serio_close +EXPORT_SYMBOL vmlinux 0x725dad3a dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x726abb7a phy_stop +EXPORT_SYMBOL vmlinux 0x7280af7a elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x728b3362 tty_write_room +EXPORT_SYMBOL vmlinux 0x729d9d23 __ip_select_ident +EXPORT_SYMBOL vmlinux 0x72aeb68e dev_gro_receive +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72c7b01c hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0x72d1e3a5 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x72d79695 ip_defrag +EXPORT_SYMBOL vmlinux 0x72dfccb5 __seq_open_private +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x72f2e9f3 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x7305075c i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x73335f08 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7362625a ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x738803e6 strnlen +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x73a5fb42 udplite_prot +EXPORT_SYMBOL vmlinux 0x73b682a2 ip_route_input +EXPORT_SYMBOL vmlinux 0x73df55a4 fb_class +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x73e50c22 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x73f5b080 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x740deae7 simple_lookup +EXPORT_SYMBOL vmlinux 0x740e164c inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x7413793a EISA_bus +EXPORT_SYMBOL vmlinux 0x7428fe78 md_unregister_thread +EXPORT_SYMBOL vmlinux 0x743b112c blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x74540c88 ilookup +EXPORT_SYMBOL vmlinux 0x746d1d77 nf_getsockopt +EXPORT_SYMBOL vmlinux 0x7475dbb5 try_to_release_page +EXPORT_SYMBOL vmlinux 0x74764f6a input_register_device +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x74882d1d xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x7491852c pagevec_lookup +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x7499dcf2 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x74c09085 blk_insert_request +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x7504f0d3 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x75271716 save_processor_state +EXPORT_SYMBOL vmlinux 0x752d70a3 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x758694e3 bdi_register_dev +EXPORT_SYMBOL vmlinux 0x759e5942 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0x75b696b7 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x75cbc3c2 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x763a8f27 mpage_writepage +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x76605451 mmc_request_done +EXPORT_SYMBOL vmlinux 0x7666b32f netif_carrier_on +EXPORT_SYMBOL vmlinux 0x766aaf11 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76c599e8 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x76cca897 dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x76f59a52 write_one_page +EXPORT_SYMBOL vmlinux 0x7705ce73 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x770a0036 isapnp_cfg_begin +EXPORT_SYMBOL vmlinux 0x770a7689 dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0x7720debc nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0x7725c2a7 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0x7760a208 register_chrdev +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77b72fa4 dquot_initialize +EXPORT_SYMBOL vmlinux 0x77d0d7a6 dm_io +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x781a1a06 skb_recycle_check +EXPORT_SYMBOL vmlinux 0x782565ba vfs_mknod +EXPORT_SYMBOL vmlinux 0x7846263d netpoll_setup +EXPORT_SYMBOL vmlinux 0x78497010 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78a7fd6d pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x78a80f35 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x78a9b574 read_cache_pages +EXPORT_SYMBOL vmlinux 0x78acf796 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x78c9c885 input_unregister_device +EXPORT_SYMBOL vmlinux 0x78cb2783 down_write_trylock +EXPORT_SYMBOL vmlinux 0x78d4ce0b user_revoke +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x790609ca tcp_close +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x7922fd20 dev_close +EXPORT_SYMBOL vmlinux 0x7935e895 pnpbios_protocol +EXPORT_SYMBOL vmlinux 0x79427800 register_console +EXPORT_SYMBOL vmlinux 0x794487ee disable_hlt +EXPORT_SYMBOL vmlinux 0x794c3bbc input_unregister_handler +EXPORT_SYMBOL vmlinux 0x79691a8c inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x7975b987 hci_unregister_proto +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x798c9ed3 input_get_keycode +EXPORT_SYMBOL vmlinux 0x799a67ff alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x79a95d97 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a2f0e4e xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x7a3652cf ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x7a3805c8 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x7a392820 phy_driver_register +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a53a224 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0x7a60f970 sk_wait_data +EXPORT_SYMBOL vmlinux 0x7a64a78b abort_creds +EXPORT_SYMBOL vmlinux 0x7a6ef22c dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x7a7031dc journal_force_commit +EXPORT_SYMBOL vmlinux 0x7a78dac7 dm_table_get_md +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7ada1dd5 mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0x7ae7b708 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b134ddf acpi_get_name +EXPORT_SYMBOL vmlinux 0x7b4670fe clocksource_register +EXPORT_SYMBOL vmlinux 0x7b4bcb90 __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x7b4fe7fb journal_lock_updates +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b62c435 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x7b660eeb iget_locked +EXPORT_SYMBOL vmlinux 0x7b74d634 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x7b7a795b follow_up +EXPORT_SYMBOL vmlinux 0x7b8dfe45 phy_device_free +EXPORT_SYMBOL vmlinux 0x7ba85b03 udp_prot +EXPORT_SYMBOL vmlinux 0x7bc8c4e7 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x7be8805a lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x7c1e83b0 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x7c33ee83 rfkill_blocked +EXPORT_SYMBOL vmlinux 0x7c357af9 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c5675e1 ilookup5 +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7ca4ce2c pci_set_power_state +EXPORT_SYMBOL vmlinux 0x7cacc108 sk_dst_check +EXPORT_SYMBOL vmlinux 0x7cad8fab scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7d0c0c1d posix_lock_file +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d168874 icmp_send +EXPORT_SYMBOL vmlinux 0x7d7a7184 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7dd768b4 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x7ddc0d54 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x7e2a2e8e splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x7e3b7a4f find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x7e453f1a directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x7e4c83bf generic_file_llseek +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e8255cd ip_fragment +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ebac024 km_policy_notify +EXPORT_SYMBOL vmlinux 0x7ecb001b __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7f12fa2e dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f48f735 serial8250_register_port +EXPORT_SYMBOL vmlinux 0x7f577168 fasync_helper +EXPORT_SYMBOL vmlinux 0x7f71e9f3 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f89c9c8 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x7fa3f945 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x7fa66aff request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x7fe518d6 bio_unmap_user +EXPORT_SYMBOL vmlinux 0x7fe9a4c7 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x80390dde tty_devnum +EXPORT_SYMBOL vmlinux 0x80577fd3 in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x806761b4 register_key_type +EXPORT_SYMBOL vmlinux 0x8074c120 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x808cd6e7 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x80928112 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x80c886c4 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x80ca016c acpi_bus_start +EXPORT_SYMBOL vmlinux 0x80d648aa kobject_del +EXPORT_SYMBOL vmlinux 0x8110a26b dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x8144f192 journal_set_features +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815c56d0 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x815cc62a file_permission +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x8162e995 seq_path +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x818ddbb1 llc_add_pack +EXPORT_SYMBOL vmlinux 0x81916814 input_open_device +EXPORT_SYMBOL vmlinux 0x819c4290 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x81d46668 block_commit_write +EXPORT_SYMBOL vmlinux 0x81d7c639 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x81fc0c43 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x8212721d xenbus_dev_request_and_reply +EXPORT_SYMBOL vmlinux 0x821aaf94 skb_store_bits +EXPORT_SYMBOL vmlinux 0x822d97d2 ppp_channel_index +EXPORT_SYMBOL vmlinux 0x8235805b memmove +EXPORT_SYMBOL vmlinux 0x8247aef3 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x824f5199 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x825f367c d_delete +EXPORT_SYMBOL vmlinux 0x82600c70 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826d93a1 dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x82804ecf pcim_iomap_table +EXPORT_SYMBOL vmlinux 0x82948a2f pci_set_mwi +EXPORT_SYMBOL vmlinux 0x82b70041 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x82b821ca skb_checksum_help +EXPORT_SYMBOL vmlinux 0x82c82e6c security_path_link +EXPORT_SYMBOL vmlinux 0x82d7729e bd_set_size +EXPORT_SYMBOL vmlinux 0x82d7bfc0 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x82ef5f67 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x830da4a6 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x830e547b ioremap_prot +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x83213d82 skb_insert +EXPORT_SYMBOL vmlinux 0x83396fae jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x836579d9 tcp_shutdown +EXPORT_SYMBOL vmlinux 0x838397e7 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83b36b39 file_update_time +EXPORT_SYMBOL vmlinux 0x83b37458 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x83d639d0 cdev_alloc +EXPORT_SYMBOL vmlinux 0x8407d43f dm_table_event +EXPORT_SYMBOL vmlinux 0x8409e25e sk_stop_timer +EXPORT_SYMBOL vmlinux 0x84249471 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x84259821 dquot_destroy +EXPORT_SYMBOL vmlinux 0x8456dea3 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x84a342d1 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x84a643f6 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x851cacc7 write_cache_pages +EXPORT_SYMBOL vmlinux 0x85633640 skb_dequeue +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x856c09b4 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x85809eee pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x85905fe9 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b0b59b mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x85d1722a pci_request_region +EXPORT_SYMBOL vmlinux 0x85d487ee skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x85f4f8f5 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x8613f507 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x86418d28 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x86514488 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x867de345 register_filesystem +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86cdca41 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x86e47a7c unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x86eb2166 per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x871eda96 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x875f330b tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x876bd5f6 km_query +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x876ebc46 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x878733f6 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87b334d5 lock_fb_info +EXPORT_SYMBOL vmlinux 0x87b47a9e kobject_set_name +EXPORT_SYMBOL vmlinux 0x87bdf3a3 lookup_bdev +EXPORT_SYMBOL vmlinux 0x880a7123 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x882685e6 tcp_child_process +EXPORT_SYMBOL vmlinux 0x8828411a hci_recv_fragment +EXPORT_SYMBOL vmlinux 0x88313859 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x88608fdf blk_requeue_request +EXPORT_SYMBOL vmlinux 0x88644060 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x8884649d __pci_register_driver +EXPORT_SYMBOL vmlinux 0x88d92a27 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x88e07be3 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x8927e7f7 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x895eb324 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x8969b997 ida_get_new +EXPORT_SYMBOL vmlinux 0x8970d8d6 eth_header_cache +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x8999abc7 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x89aecb67 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89d8f9c9 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x89d90df5 ppp_input +EXPORT_SYMBOL vmlinux 0x89e1e23e qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x89e8c81b flush_signals +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a1645e6 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x8a27dec5 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a499391 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x8a4e75f9 input_release_device +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a81a481 inode_get_bytes +EXPORT_SYMBOL vmlinux 0x8a82efe3 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ac31f7c send_sig_info +EXPORT_SYMBOL vmlinux 0x8aeca891 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x8b076f61 seq_escape +EXPORT_SYMBOL vmlinux 0x8b18496f __copy_to_user_ll +EXPORT_SYMBOL vmlinux 0x8b202c1c otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x8b35e873 sg_last +EXPORT_SYMBOL vmlinux 0x8b4ffd9a block_prepare_write +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b8414ea set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8bae0ff1 rtnl_notify +EXPORT_SYMBOL vmlinux 0x8bb1fb3c proc_dointvec +EXPORT_SYMBOL vmlinux 0x8bbb9e68 kobject_add +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bf17382 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x8c036cba inode_needs_sync +EXPORT_SYMBOL vmlinux 0x8c166474 sk_run_filter +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c8aefa5 km_new_mapping +EXPORT_SYMBOL vmlinux 0x8cac7e43 tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cf02876 lock_may_read +EXPORT_SYMBOL vmlinux 0x8d0b7592 tty_throttle +EXPORT_SYMBOL vmlinux 0x8d167414 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x8d229beb __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x8d2589f1 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d649ad2 tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x8d6f81b4 __div64_32 +EXPORT_SYMBOL vmlinux 0x8d715e49 ip_setsockopt +EXPORT_SYMBOL vmlinux 0x8d797472 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8dc6e564 restore_processor_state +EXPORT_SYMBOL vmlinux 0x8dc8ff9d lock_sock_nested +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8de9587e sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b0d41 filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e10b009 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x8e13d626 skb_dma_map +EXPORT_SYMBOL vmlinux 0x8e344e71 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x8e4754bf inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e888ec3 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x8ead72a4 kset_unregister +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f93bbc7 bio_map_user +EXPORT_SYMBOL vmlinux 0x8f96becc sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x8f985206 kill_block_super +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fa6b992 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0x8fac0e1c tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x8fcfa668 serio_rescan +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x8fff6f8d set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x9026cec9 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x902eece8 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x903c56f6 security_path_truncate +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x90616a37 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x90aeb43d ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0x90b1a994 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x90b46038 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x90d87a28 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x90f8b1fe pci_iomap +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x91010f30 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x91267278 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x912fa8e6 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x914bfff7 vmap +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x9169b618 dquot_alloc +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9181e3ce journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x918a3323 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x91913c45 generic_removexattr +EXPORT_SYMBOL vmlinux 0x919d761a __nla_reserve +EXPORT_SYMBOL vmlinux 0x91bcffb4 vfs_symlink +EXPORT_SYMBOL vmlinux 0x91e1def0 jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x91e24d14 hci_resume_dev +EXPORT_SYMBOL vmlinux 0x920556e3 pnp_get_resource +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921d71bc sg_miter_next +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x923b40a9 hci_register_dev +EXPORT_SYMBOL vmlinux 0x924c10c5 mpage_readpages +EXPORT_SYMBOL vmlinux 0x924eb063 genphy_update_link +EXPORT_SYMBOL vmlinux 0x9275bc7a jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x92858451 eisa_driver_register +EXPORT_SYMBOL vmlinux 0x92897e3d default_idle +EXPORT_SYMBOL vmlinux 0x928dfadb md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x92949fa4 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0x92a4b793 unregister_cdrom +EXPORT_SYMBOL vmlinux 0x92a8f2a1 hci_alloc_dev +EXPORT_SYMBOL vmlinux 0x92bc0ad9 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x92c6a0f3 inet_register_protosw +EXPORT_SYMBOL vmlinux 0x92e50681 qdisc_destroy +EXPORT_SYMBOL vmlinux 0x92fa9198 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x931f7cb6 mca_device_set_claim +EXPORT_SYMBOL vmlinux 0x93259c2c kernel_bind +EXPORT_SYMBOL vmlinux 0x9334a85a md_done_sync +EXPORT_SYMBOL vmlinux 0x934eeae4 elv_rb_add +EXPORT_SYMBOL vmlinux 0x93947148 module_layout +EXPORT_SYMBOL vmlinux 0x9397e756 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x939dda6f register_cdrom +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c170b5 d_alloc_name +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93d759b8 kunmap +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x9406ba09 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x940992da load_nls +EXPORT_SYMBOL vmlinux 0x94314fa4 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x946324d0 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x946bb677 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x9499ff85 simple_rename +EXPORT_SYMBOL vmlinux 0x94a4c2fd netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x94b541b5 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x94c3d6a1 cdev_del +EXPORT_SYMBOL vmlinux 0x94f1c337 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0x94f861b1 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x950bd598 security_path_unlink +EXPORT_SYMBOL vmlinux 0x9526fdc2 register_netdev +EXPORT_SYMBOL vmlinux 0x95352ea9 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x954f1479 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x9565df15 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x9570b440 blk_run_queue +EXPORT_SYMBOL vmlinux 0x95a87f29 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x95eb1c85 inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x96286996 sock_no_bind +EXPORT_SYMBOL vmlinux 0x962d58c3 mnt_pin +EXPORT_SYMBOL vmlinux 0x962f3305 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x964d3300 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0x9653558c blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x96794239 notify_change +EXPORT_SYMBOL vmlinux 0x968024ee setup_arg_pages +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x96b6d2bf scsi_add_device +EXPORT_SYMBOL vmlinux 0x96c1b609 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96fe16c1 mca_device_set_name +EXPORT_SYMBOL vmlinux 0x970d3fe3 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x9725f893 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x97330de2 __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x97529d12 block_write_end +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9766c577 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x97b714ac copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x97c5834a skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x97d6dd32 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x97f84496 neigh_compat_output +EXPORT_SYMBOL vmlinux 0x98010cb3 arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x982a3032 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x98428160 backlight_device_register +EXPORT_SYMBOL vmlinux 0x984ae03e scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x98601588 skb_queue_head +EXPORT_SYMBOL vmlinux 0x98673189 phy_device_create +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x98723dbe blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x988923fa __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x98b79928 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98bbab34 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x99052a84 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x99147061 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x99260089 serio_reconnect +EXPORT_SYMBOL vmlinux 0x992f1ef9 sk_filter +EXPORT_SYMBOL vmlinux 0x99762664 generic_setxattr +EXPORT_SYMBOL vmlinux 0x99821320 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x99877804 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x998db632 rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x998fd757 inet_sendmsg +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99afcf0c scsi_target_resume +EXPORT_SYMBOL vmlinux 0x99b70e47 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99de04a6 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x99dfeb9e elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x99ffc8c3 seq_open_private +EXPORT_SYMBOL vmlinux 0x9a040d0d sock_no_connect +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a4926f5 vfs_unlink +EXPORT_SYMBOL vmlinux 0x9a6a83f9 cmos_lock +EXPORT_SYMBOL vmlinux 0x9a726ea5 mdiobus_register +EXPORT_SYMBOL vmlinux 0x9a7e118c unregister_key_type +EXPORT_SYMBOL vmlinux 0x9a8e411d kthread_bind +EXPORT_SYMBOL vmlinux 0x9a8f4eba ll_rw_block +EXPORT_SYMBOL vmlinux 0x9a8fc14a mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9aa69dfe kmap_high +EXPORT_SYMBOL vmlinux 0x9ac98ea6 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x9b02acc3 journal_init_dev +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b4de8eb idr_replace +EXPORT_SYMBOL vmlinux 0x9b62eca1 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b86b028 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x9b92c360 neigh_event_ns +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9ba88db7 input_inject_event +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c2c944a __copy_from_user_ll_nocache_nozero +EXPORT_SYMBOL vmlinux 0x9c3fe5c2 mca_register_driver_integrated +EXPORT_SYMBOL vmlinux 0x9c491f60 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x9c6193dc pci_enable_device +EXPORT_SYMBOL vmlinux 0x9c7077bd enable_hlt +EXPORT_SYMBOL vmlinux 0x9c7715a2 invalidate_partition +EXPORT_SYMBOL vmlinux 0x9c8059e7 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x9c8bb377 mdio_bus_type +EXPORT_SYMBOL vmlinux 0x9c8d869a bt_sock_link +EXPORT_SYMBOL vmlinux 0x9ca000a8 set_user_nice +EXPORT_SYMBOL vmlinux 0x9cb87904 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9d10222e vfs_readlink +EXPORT_SYMBOL vmlinux 0x9d1dd900 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x9d2f6bc9 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d3e4668 inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0x9d4c45d2 nla_append +EXPORT_SYMBOL vmlinux 0x9d5f98a1 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0x9d744837 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x9d9a91a2 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x9d9ca936 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x9d9f0d41 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x9da308e1 tty_free_termios +EXPORT_SYMBOL vmlinux 0x9dd7180f netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e29a289 uart_get_divisor +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e4b3747 sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x9e5caf63 tcp_connect +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e889089 sock_no_mmap +EXPORT_SYMBOL vmlinux 0x9e958038 acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0x9e9986ff sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea0ad49 __sg_free_table +EXPORT_SYMBOL vmlinux 0x9ea2ac49 kunmap_high +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9ec72c4e tty_register_device +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2a6d9a jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f4870a8 skb_trim +EXPORT_SYMBOL vmlinux 0x9f7093d0 bio_free +EXPORT_SYMBOL vmlinux 0x9f70db44 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x9f70efc6 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0x9f71f245 bdget_disk +EXPORT_SYMBOL vmlinux 0x9f856837 neigh_for_each +EXPORT_SYMBOL vmlinux 0x9f8a97d5 inode_init_always +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fa58559 kernel_getsockname +EXPORT_SYMBOL vmlinux 0x9fab6fbe sg_miter_start +EXPORT_SYMBOL vmlinux 0x9fb1c048 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x9fcaf5d5 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x9fcef960 register_framebuffer +EXPORT_SYMBOL vmlinux 0xa0029236 pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0xa0048feb otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xa006f790 dmam_release_declared_memory +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa03f7991 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa06e1a63 create_mnt_ns +EXPORT_SYMBOL vmlinux 0xa07e3ec3 vfs_read +EXPORT_SYMBOL vmlinux 0xa0926f4e vfs_link +EXPORT_SYMBOL vmlinux 0xa09429c1 md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0xa097ee7c mca_device_status +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0ad15f1 neigh_table_init +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0b3918f kernel_accept +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa11bb1e5 mmc_add_host +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa1b61edb __destroy_inode +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1d945a0 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xa1ed7d70 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xa1f2471a tty_register_driver +EXPORT_SYMBOL vmlinux 0xa208d0bd lro_receive_frags +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa2343b12 pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0xa258a9cc serio_interrupt +EXPORT_SYMBOL vmlinux 0xa25f2481 add_disk +EXPORT_SYMBOL vmlinux 0xa2619132 seq_write +EXPORT_SYMBOL vmlinux 0xa2785ac4 phy_detach +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2d7b431 tty_port_init +EXPORT_SYMBOL vmlinux 0xa2e7be6b kset_register +EXPORT_SYMBOL vmlinux 0xa2eef6ea rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0xa2fbbe65 inet_release +EXPORT_SYMBOL vmlinux 0xa30b5424 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa32cdc75 __lock_buffer +EXPORT_SYMBOL vmlinux 0xa34390e6 kmalloc_caches +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa35c1f05 acpi_extract_package +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa37f84f7 invalidate_bdev +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa3bdf51a sock_release +EXPORT_SYMBOL vmlinux 0xa3d55cb6 dma_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0xa3de320a __kfree_skb +EXPORT_SYMBOL vmlinux 0xa3e5da9b fb_get_mode +EXPORT_SYMBOL vmlinux 0xa3fffcd9 i2c_clients_command +EXPORT_SYMBOL vmlinux 0xa401ab5d genphy_config_advert +EXPORT_SYMBOL vmlinux 0xa408d4ac kfree_skb +EXPORT_SYMBOL vmlinux 0xa42c5af3 mca_register_driver +EXPORT_SYMBOL vmlinux 0xa435f0f8 kernel_connect +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa48d4597 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0xa49cd8b5 set_groups +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4c9bac9 request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0xa4ceedb8 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0xa4d1e247 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xa4e0b64a rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0xa51bcf0e ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0xa51cdfe8 __FIXADDR_TOP +EXPORT_SYMBOL vmlinux 0xa53b39d8 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0xa54920e5 ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0xa54ad003 dma_mark_declared_memory_occupied +EXPORT_SYMBOL vmlinux 0xa55bb692 input_register_handle +EXPORT_SYMBOL vmlinux 0xa5665355 eth_validate_addr +EXPORT_SYMBOL vmlinux 0xa56933ed __scsi_add_device +EXPORT_SYMBOL vmlinux 0xa56cb496 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa57c3239 pci_get_class +EXPORT_SYMBOL vmlinux 0xa57e2219 security_inode_init_security +EXPORT_SYMBOL vmlinux 0xa5806bee put_mnt_ns +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa583f182 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5bfb48a inet_bind +EXPORT_SYMBOL vmlinux 0xa5da0abd acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0xa5df0a22 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xa5e78ff4 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0xa62a1f87 security_inode_permission +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa64c935f pci_dev_driver +EXPORT_SYMBOL vmlinux 0xa6584324 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681a53d pneigh_lookup +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa68c9567 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xa6c4f98d generic_file_splice_read +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa7046549 vprintk +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71e7463 __first_cpu +EXPORT_SYMBOL vmlinux 0xa7a1a97c install_exec_creds +EXPORT_SYMBOL vmlinux 0xa7b25117 pnp_is_active +EXPORT_SYMBOL vmlinux 0xa7ee4d62 input_set_keycode +EXPORT_SYMBOL vmlinux 0xa7f7815d phy_attach +EXPORT_SYMBOL vmlinux 0xa84777a5 scsi_device_resume +EXPORT_SYMBOL vmlinux 0xa84dea7d udp_poll +EXPORT_SYMBOL vmlinux 0xa856e1fa scm_fp_dup +EXPORT_SYMBOL vmlinux 0xa8624b57 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0xa88cd18d single_release +EXPORT_SYMBOL vmlinux 0xa88fc148 pipe_to_file +EXPORT_SYMBOL vmlinux 0xa892c9c2 netif_device_attach +EXPORT_SYMBOL vmlinux 0xa892cc73 dev_get_flags +EXPORT_SYMBOL vmlinux 0xa89acbb3 acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8b09510 sock_i_ino +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8de1eb4 wireless_send_event +EXPORT_SYMBOL vmlinux 0xa8e86a31 dquot_commit_info +EXPORT_SYMBOL vmlinux 0xa8ea3497 isapnp_protocol +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa9180e0c replace_mount_options +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa977f7b1 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0xa9af4bde do_splice_from +EXPORT_SYMBOL vmlinux 0xa9e0eff2 skb_copy_expand +EXPORT_SYMBOL vmlinux 0xa9ef28e4 lock_rename +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa4461ec arp_find +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaa872cfd inet_listen +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaab577ce vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xaacaa819 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0xaae08898 pci_set_master +EXPORT_SYMBOL vmlinux 0xaae21f5a i2c_use_client +EXPORT_SYMBOL vmlinux 0xaae39739 __netif_schedule +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaaebe34f mca_write_pos +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab1ead8e __mutex_init +EXPORT_SYMBOL vmlinux 0xab2e9924 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab6717fa __bread +EXPORT_SYMBOL vmlinux 0xab7d6d29 kmap +EXPORT_SYMBOL vmlinux 0xab8d3d28 mpage_readpage +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabaf26e2 nf_log_packet +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabe22cb2 journal_create +EXPORT_SYMBOL vmlinux 0xabfdb4f9 ip_getsockopt +EXPORT_SYMBOL vmlinux 0xac183a7f pid_task +EXPORT_SYMBOL vmlinux 0xac4e4666 pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xacb553d6 generic_ro_fops +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad298014 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0xad6c0f8e cdev_add +EXPORT_SYMBOL vmlinux 0xad72e09b alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xad7314e2 pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadc6aa04 dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0xade13d08 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0xae09fb3c unregister_snap_client +EXPORT_SYMBOL vmlinux 0xae3460c1 set_binfmt +EXPORT_SYMBOL vmlinux 0xae38b39b unregister_qdisc +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae51a02a wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xae75f004 ida_destroy +EXPORT_SYMBOL vmlinux 0xae97aa4b gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaec7d27c blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0xaece1ddc __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaefc379c set_create_files_as +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf4b1540 acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xaf61a07b xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0xaf764022 kthread_create +EXPORT_SYMBOL vmlinux 0xaf9f8671 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0xafa0e238 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xafe01377 down_read +EXPORT_SYMBOL vmlinux 0xaffed559 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0xb0189026 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0xb02a559c udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xb035b2cf revalidate_disk +EXPORT_SYMBOL vmlinux 0xb05b1e5e thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0xb05bb613 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0xb077ef32 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb08f76ad gen_pool_free +EXPORT_SYMBOL vmlinux 0xb0a5767a init_special_inode +EXPORT_SYMBOL vmlinux 0xb0aba6ed xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xb0b20918 sysctl_data +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0fd0c47 blk_stop_queue +EXPORT_SYMBOL vmlinux 0xb11c1f77 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb1247266 dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0xb12abdeb dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0xb13c4dba down_write +EXPORT_SYMBOL vmlinux 0xb13d49e3 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xb150141b try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xb1645a2e sg_free_table +EXPORT_SYMBOL vmlinux 0xb166ac87 sync_page_range +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb19fa2db complete_request_key +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb1fdf3a1 alloc_fcdev +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb2287d71 neigh_seq_next +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb240048b vfs_write +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb27510ef atomic64_inc_return +EXPORT_SYMBOL vmlinux 0xb2776bb5 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb28362bc dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xb28a660f tty_hangup +EXPORT_SYMBOL vmlinux 0xb28e8296 nf_setsockopt +EXPORT_SYMBOL vmlinux 0xb29bc8bd idr_remove +EXPORT_SYMBOL vmlinux 0xb2e3b3d3 pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xb2efb6be mca_read_stored_pos +EXPORT_SYMBOL vmlinux 0xb2f68c59 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb30abf8d idr_get_new_above +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb362fc29 ether_setup +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb3a13fd5 __scsi_put_command +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3a63d66 __register_binfmt +EXPORT_SYMBOL vmlinux 0xb3c1a963 generic_readlink +EXPORT_SYMBOL vmlinux 0xb3cbe813 hci_conn_security +EXPORT_SYMBOL vmlinux 0xb3e0590d acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0xb3e5b725 sock_setsockopt +EXPORT_SYMBOL vmlinux 0xb4168937 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xb4173d60 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb4269dce skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xb43488bd tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0xb4514ea5 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0xb45578b8 memscan +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb49aeaf9 ipv4_specific +EXPORT_SYMBOL vmlinux 0xb4a8adbc acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0xb4ac481a mdiobus_read +EXPORT_SYMBOL vmlinux 0xb4ad871f seq_release +EXPORT_SYMBOL vmlinux 0xb4b70750 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0xb4bd8955 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0xb4c3b445 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb5029aca fifo_set_limit +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb538d3de i2c_add_adapter +EXPORT_SYMBOL vmlinux 0xb5418861 atomic64_add +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb56f4eb0 ip_ct_attach +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb57712d1 qdisc_list_del +EXPORT_SYMBOL vmlinux 0xb594276e tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0xb59e2db0 __elv_add_request +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5aae284 brioctl_set +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb5da94e4 mmc_free_host +EXPORT_SYMBOL vmlinux 0xb5db1f2e ps2_drain +EXPORT_SYMBOL vmlinux 0xb5fe9248 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xb5febb72 page_readlink +EXPORT_SYMBOL vmlinux 0xb60017ad nf_ct_attach +EXPORT_SYMBOL vmlinux 0xb6244511 sg_init_one +EXPORT_SYMBOL vmlinux 0xb65d30f9 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xb65f7c39 freeze_bdev +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6896671 crc_t10dif +EXPORT_SYMBOL vmlinux 0xb6a215b1 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6b0ed19 blkdev_put +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb6ecaabb generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xb6ed1e53 strncpy +EXPORT_SYMBOL vmlinux 0xb6f1c5f9 clear_inode +EXPORT_SYMBOL vmlinux 0xb6f7321d netif_napi_del +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb72397d5 printk +EXPORT_SYMBOL vmlinux 0xb72e5ee9 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xb73314ea vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0xb7342dfb journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xb747c8c7 blk_peek_request +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb7671154 __nla_put +EXPORT_SYMBOL vmlinux 0xb76da570 journal_flush +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7b7ec89 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7d58b6b inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xb7dde36b inet6_bind +EXPORT_SYMBOL vmlinux 0xb7e4da5d sockfd_lookup +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81ecd55 generic_file_open +EXPORT_SYMBOL vmlinux 0xb839398a rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xb84a5823 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0xb84be2fb nf_log_register +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8a003e4 blk_complete_request +EXPORT_SYMBOL vmlinux 0xb8a6dacb i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xb8a84014 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xb8ba42d7 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb8fa5188 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0xb927b341 proc_symlink +EXPORT_SYMBOL vmlinux 0xb938858b phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xb942b513 smp_call_function_many +EXPORT_SYMBOL vmlinux 0xb9620cf2 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xb96bfc94 scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9ac7a00 pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0xb9f9ffbf netif_receive_skb +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba261faa set_pages_array_wb +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba38da80 eth_type_trans +EXPORT_SYMBOL vmlinux 0xba429b22 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba67feef __starget_for_each_device +EXPORT_SYMBOL vmlinux 0xba75bce3 generic_listxattr +EXPORT_SYMBOL vmlinux 0xba76ec71 __getblk +EXPORT_SYMBOL vmlinux 0xba788201 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0xba7ff634 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xba80a357 inetdev_by_index +EXPORT_SYMBOL vmlinux 0xba93488e scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbaf7268f end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0xbb0ba3c1 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb3790e5 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xbb3afcc0 simple_rmdir +EXPORT_SYMBOL vmlinux 0xbb546d90 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb70b79d audit_log_start +EXPORT_SYMBOL vmlinux 0xbb89de17 ida_init +EXPORT_SYMBOL vmlinux 0xbba604f1 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xbbc18de9 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0xbbcea60a dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xbbf55574 open_exec +EXPORT_SYMBOL vmlinux 0xbc01799c genphy_read_status +EXPORT_SYMBOL vmlinux 0xbc10bd25 skb_push +EXPORT_SYMBOL vmlinux 0xbc112cce blk_fetch_request +EXPORT_SYMBOL vmlinux 0xbc22f4cc napi_frags_finish +EXPORT_SYMBOL vmlinux 0xbc5c359f jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbcc638db ps2_command +EXPORT_SYMBOL vmlinux 0xbcc7449e xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0xbcc9393f posix_acl_permission +EXPORT_SYMBOL vmlinux 0xbce564d0 genl_sock +EXPORT_SYMBOL vmlinux 0xbd4a683e block_sync_page +EXPORT_SYMBOL vmlinux 0xbd5ceb93 pci_disable_msix +EXPORT_SYMBOL vmlinux 0xbd72acd8 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xbd91a06e lookup_hash +EXPORT_SYMBOL vmlinux 0xbdb813d4 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0xbdd5b5e8 dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe21c89b vfs_readv +EXPORT_SYMBOL vmlinux 0xbe402412 scsi_prep_return +EXPORT_SYMBOL vmlinux 0xbe5fe9d7 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xbe7d1647 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0xbe7fdf93 journal_extend +EXPORT_SYMBOL vmlinux 0xbeaa0e08 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0xbeb2aecb cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0xbeb8a24b alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xbee526a7 sock_i_uid +EXPORT_SYMBOL vmlinux 0xbef15a2c input_free_device +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbef75e19 con_copy_unimap +EXPORT_SYMBOL vmlinux 0xbf0ddee6 skb_find_text +EXPORT_SYMBOL vmlinux 0xbf13b163 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0xbf58577c scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf8b39e9 isapnp_present +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfae02a7 tcf_hash_search +EXPORT_SYMBOL vmlinux 0xbfb99370 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbff860c2 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0xbff8a692 scsi_get_command +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc00700c5 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0xc0075636 ps2_init +EXPORT_SYMBOL vmlinux 0xc01eed33 __copy_from_user_ll_nozero +EXPORT_SYMBOL vmlinux 0xc04dea80 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc08fa620 pci_select_bars +EXPORT_SYMBOL vmlinux 0xc0981069 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0b7b467 submit_bio +EXPORT_SYMBOL vmlinux 0xc0b86bfb prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0d5d8fd __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0xc0f65988 machine_real_restart +EXPORT_SYMBOL vmlinux 0xc109748f ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0xc10ea5f8 make_bad_inode +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc19c8163 atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0xc19df638 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0xc19e2db3 d_invalidate +EXPORT_SYMBOL vmlinux 0xc1b1e8f9 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0xc1f11311 input_register_handler +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc2213527 key_revoke +EXPORT_SYMBOL vmlinux 0xc2346d59 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xc24c2cfb tty_name +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc25e04dd __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xc277f53d journal_get_write_access +EXPORT_SYMBOL vmlinux 0xc280a525 __copy_from_user_ll +EXPORT_SYMBOL vmlinux 0xc2950175 cdrom_open +EXPORT_SYMBOL vmlinux 0xc2c28b46 journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xc2c4569d dm_register_target +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f3ed4b seq_puts +EXPORT_SYMBOL vmlinux 0xc3234976 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xc329722f jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0xc339a3ab register_quota_format +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc376d3a7 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xc3a6e43b mmc_remove_host +EXPORT_SYMBOL vmlinux 0xc3aadd72 journal_release_buffer +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3cb60a8 acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3dc0c42 qdisc_reset +EXPORT_SYMBOL vmlinux 0xc3e16ef5 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0xc3fa6a59 memchr +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc41055de simple_empty +EXPORT_SYMBOL vmlinux 0xc4145740 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0xc420b8f5 bitmap_end_sync +EXPORT_SYMBOL vmlinux 0xc44417ac igrab +EXPORT_SYMBOL vmlinux 0xc44c3514 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0xc471823a fput +EXPORT_SYMBOL vmlinux 0xc48187f1 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0xc481aa89 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4a93c4b hippi_type_trans +EXPORT_SYMBOL vmlinux 0xc4ac94f1 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0xc4be9de5 kill_fasync +EXPORT_SYMBOL vmlinux 0xc4d6ee77 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0xc5016a3b genphy_suspend +EXPORT_SYMBOL vmlinux 0xc517ba9c input_grab_device +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc549f426 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc55609e8 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc5835279 register_qdisc +EXPORT_SYMBOL vmlinux 0xc59ad35b pcim_pin_device +EXPORT_SYMBOL vmlinux 0xc5a2cbe8 set_bdi_congested +EXPORT_SYMBOL vmlinux 0xc5a93515 scsi_unregister +EXPORT_SYMBOL vmlinux 0xc5aa8ac6 save_mount_options +EXPORT_SYMBOL vmlinux 0xc6032552 i2c_register_driver +EXPORT_SYMBOL vmlinux 0xc6039a7a iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0xc609cafb is_bad_inode +EXPORT_SYMBOL vmlinux 0xc623d36e inet_stream_ops +EXPORT_SYMBOL vmlinux 0xc629d66b __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xc62b0b3a scsi_release_buffers +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc64b8442 copy_io_context +EXPORT_SYMBOL vmlinux 0xc659f267 kobject_init +EXPORT_SYMBOL vmlinux 0xc66f82d5 get_disk +EXPORT_SYMBOL vmlinux 0xc66fb53e seq_bitmap +EXPORT_SYMBOL vmlinux 0xc67a4cfa mutex_unlock +EXPORT_SYMBOL vmlinux 0xc67fd10d __pagevec_release +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc68d13c5 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0xc70ac8e3 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0xc7192916 skb_queue_tail +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc734e614 dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0xc73ac2cd simple_pin_fs +EXPORT_SYMBOL vmlinux 0xc7611749 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0xc766dcd5 textsearch_register +EXPORT_SYMBOL vmlinux 0xc768de19 cpu_all_bits +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7c56391 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0xc7d7edf6 dma_set_mask +EXPORT_SYMBOL vmlinux 0xc7eb9245 bdi_register +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc7f73bb1 kmap_atomic +EXPORT_SYMBOL vmlinux 0xc80ba016 block_invalidatepage +EXPORT_SYMBOL vmlinux 0xc82e2e34 dm_exception_store_create +EXPORT_SYMBOL vmlinux 0xc82e6c9f dst_release +EXPORT_SYMBOL vmlinux 0xc86cbf51 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xc8719848 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xc884a423 put_tty_driver +EXPORT_SYMBOL vmlinux 0xc897c382 sg_init_table +EXPORT_SYMBOL vmlinux 0xc898625d atomic64_inc_and_test +EXPORT_SYMBOL vmlinux 0xc8a543dd sock_create +EXPORT_SYMBOL vmlinux 0xc8b42105 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8c854fd pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8daf82a jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xc8ed7789 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xc8fe35be md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xc921b57f elv_queue_empty +EXPORT_SYMBOL vmlinux 0xc9229758 d_lookup +EXPORT_SYMBOL vmlinux 0xc94661c3 current_fs_time +EXPORT_SYMBOL vmlinux 0xc946787f pv_irq_ops +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xc9efe803 kmem_cache_size +EXPORT_SYMBOL vmlinux 0xc9fbe2dd register_gifconf +EXPORT_SYMBOL vmlinux 0xca05eee7 devm_ioremap +EXPORT_SYMBOL vmlinux 0xca0bde64 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0xca3ae599 filemap_fault +EXPORT_SYMBOL vmlinux 0xca485e2f follow_down +EXPORT_SYMBOL vmlinux 0xca4f2470 __neigh_event_send +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca7440ee vc_cons +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xcaa93cc1 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0xcad70556 get_sb_single +EXPORT_SYMBOL vmlinux 0xcb03c0b5 acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0xcb33b0b6 bdput +EXPORT_SYMBOL vmlinux 0xcb6b8da5 proc_create_data +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcbafa7b4 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xcbdf9999 wait_on_page_bit +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc2cc2dc dev_get_by_flags +EXPORT_SYMBOL vmlinux 0xcc36588d tty_unthrottle +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc86d23e skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xcc98e9bf ndisc_send_skb +EXPORT_SYMBOL vmlinux 0xccee7947 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0xcd1dade7 sk_release_kernel +EXPORT_SYMBOL vmlinux 0xcdc88398 block_write_begin +EXPORT_SYMBOL vmlinux 0xcdebf13e vm_insert_mixed +EXPORT_SYMBOL vmlinux 0xcdfaf4ab tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xce14387c free_task +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce22905c scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xce2c5199 create_empty_buffers +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3a3105 sock_no_poll +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce97e2cf jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0xceb35755 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0xced59b89 elevator_exit +EXPORT_SYMBOL vmlinux 0xcef5a1f6 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf64e9e4 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0xcf9ee064 scsi_execute_req +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfc2d953 flush_old_exec +EXPORT_SYMBOL vmlinux 0xcfedcaf6 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xcfee56d9 xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xcff58241 pagecache_write_end +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd022adbf get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xd03705e1 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xd0511214 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xd05e820e journal_update_format +EXPORT_SYMBOL vmlinux 0xd05ffb3a blk_recount_segments +EXPORT_SYMBOL vmlinux 0xd0779d03 tty_check_change +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd0971c4b find_or_create_page +EXPORT_SYMBOL vmlinux 0xd097b02b inode_set_bytes +EXPORT_SYMBOL vmlinux 0xd0d8621b strlen +EXPORT_SYMBOL vmlinux 0xd0e0478b tty_port_close_end +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd175cb8d generic_getxattr +EXPORT_SYMBOL vmlinux 0xd179edca skb_copy_bits +EXPORT_SYMBOL vmlinux 0xd181f738 sk_alloc +EXPORT_SYMBOL vmlinux 0xd18a9194 dev_driver_string +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd1ccb6b6 I_BDEV +EXPORT_SYMBOL vmlinux 0xd1e890f9 kunmap_atomic +EXPORT_SYMBOL vmlinux 0xd1eaecea cfb_fillrect +EXPORT_SYMBOL vmlinux 0xd1efc205 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xd1f29569 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd24f3b02 neigh_ifdown +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd258d0e2 sock_rfree +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd29596e5 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2b03424 __rta_fill +EXPORT_SYMBOL vmlinux 0xd2c68592 vfs_fsync +EXPORT_SYMBOL vmlinux 0xd2eb1f34 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xd2f014b2 search_binary_handler +EXPORT_SYMBOL vmlinux 0xd31ee06d xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0xd32e52c7 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd35614b7 eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xd390f183 dentry_open +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3dfaf01 fb_is_primary_device +EXPORT_SYMBOL vmlinux 0xd3ef4efc dquot_claim_space +EXPORT_SYMBOL vmlinux 0xd3f526ad bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd3f8afc8 unregister_md_personality +EXPORT_SYMBOL vmlinux 0xd4170710 dev_set_mtu +EXPORT_SYMBOL vmlinux 0xd417ca01 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd458be89 mark_info_dirty +EXPORT_SYMBOL vmlinux 0xd4603aa9 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xd465f158 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xd4b6fbf6 pipe_unlock +EXPORT_SYMBOL vmlinux 0xd4e7472f netif_device_detach +EXPORT_SYMBOL vmlinux 0xd4f3007c dquot_free_inode +EXPORT_SYMBOL vmlinux 0xd50a66e5 do_truncate +EXPORT_SYMBOL vmlinux 0xd51253fd cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd53e6209 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xd55d3df0 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd5b4bacc jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xd5c2cc91 inet_del_protocol +EXPORT_SYMBOL vmlinux 0xd5d9db49 security_path_mknod +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd675381d generic_file_splice_write +EXPORT_SYMBOL vmlinux 0xd69a2459 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0xd69e406e journal_load +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6aca2ff dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6d368ff dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xd6df7f57 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd7005eff tcp_prot +EXPORT_SYMBOL vmlinux 0xd701f4fb i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0xd706c947 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0xd70edd81 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0xd76a9c4a dev_get_stats +EXPORT_SYMBOL vmlinux 0xd7796a03 key_put +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7ae27e8 give_up_console +EXPORT_SYMBOL vmlinux 0xd7cac8cf __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xd7d02190 lease_get_mtime +EXPORT_SYMBOL vmlinux 0xd7d2e83e acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xd7d36d1a idr_find +EXPORT_SYMBOL vmlinux 0xd7d67687 get_io_context +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd82613c0 atomic64_sub_and_test +EXPORT_SYMBOL vmlinux 0xd8282ff0 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0xd82e1cc1 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8412868 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xd868a063 ip6_frag_init +EXPORT_SYMBOL vmlinux 0xd8710c56 netlink_unicast +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8a65c38 atomic64_sub +EXPORT_SYMBOL vmlinux 0xd8b41454 d_genocide +EXPORT_SYMBOL vmlinux 0xd8d27ce4 mmc_release_host +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd907a418 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd91440d6 hci_register_cb +EXPORT_SYMBOL vmlinux 0xd94c4e81 dm_table_put +EXPORT_SYMBOL vmlinux 0xd965817b grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xd97d7300 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd996d859 idr_pre_get +EXPORT_SYMBOL vmlinux 0xd9c0c3cb scsi_register_interface +EXPORT_SYMBOL vmlinux 0xd9c272aa mca_mark_as_unused +EXPORT_SYMBOL vmlinux 0xd9c5ea4c thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0xd9e92a94 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xda010635 netif_rx +EXPORT_SYMBOL vmlinux 0xda08c0d7 pcibios_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda2b808d x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xda372494 dma_pool_create +EXPORT_SYMBOL vmlinux 0xda43dfde noop_qdisc +EXPORT_SYMBOL vmlinux 0xda4943e9 security_path_mkdir +EXPORT_SYMBOL vmlinux 0xda49ea13 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0xda5bc5a9 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8fd495 isapnp_write_byte +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdad1e7da skb_copy +EXPORT_SYMBOL vmlinux 0xdadc2bcf inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xdb232afe mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xdb243c35 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xdb26bb4f phy_connect +EXPORT_SYMBOL vmlinux 0xdb2a9e8b pci_write_vpd +EXPORT_SYMBOL vmlinux 0xdb2b03b8 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0xdb2d4b47 napi_gro_flush +EXPORT_SYMBOL vmlinux 0xdb360ef9 cont_write_begin +EXPORT_SYMBOL vmlinux 0xdb3ef17c blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdb9b8f46 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xdbaf9b8a register_sysctl_table +EXPORT_SYMBOL vmlinux 0xdbb7bd14 check_disk_change +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbd54309 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xdbd9b34e blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0xdbe03085 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xdbeeee0f skb_kill_datagram +EXPORT_SYMBOL vmlinux 0xdbf4621a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc319cbc kobject_get +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc641de9 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0xdc680b33 hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0xdc76798b inet_getname +EXPORT_SYMBOL vmlinux 0xdc7fb04d path_put +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdc99541a ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0xdcbee06e __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xdce8e58d vc_resize +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xdd92652b generic_delete_inode +EXPORT_SYMBOL vmlinux 0xddb11fd8 scsi_device_set_state +EXPORT_SYMBOL vmlinux 0xddc2ca84 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xddd7d983 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xdde933cc uart_resume_port +EXPORT_SYMBOL vmlinux 0xddf19af2 bd_release +EXPORT_SYMBOL vmlinux 0xddfb794b __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xde1fd694 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0xde36628e pci_read_vpd +EXPORT_SYMBOL vmlinux 0xde4afe46 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0xde5de824 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0xde6366e4 acpi_is_video_device +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde9e1249 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xdea29b51 unregister_con_driver +EXPORT_SYMBOL vmlinux 0xdeb9729f i2c_master_send +EXPORT_SYMBOL vmlinux 0xded41bac tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xdedcb86b devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0xdeee2a0c xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xdeef6808 sk_reset_timer +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf26364c nf_afinfo +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf5b2a9e wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf6ce47c key_link +EXPORT_SYMBOL vmlinux 0xdf7d7c0a mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xdf89696d tcp_read_sock +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdf9eea23 dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0xdfa9fc6e xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xdfb4b860 bh_submit_read +EXPORT_SYMBOL vmlinux 0xdfb7bada acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xe03ec468 xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0xe05c1d7b scsi_is_target_device +EXPORT_SYMBOL vmlinux 0xe061f2b8 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe086fffd cdrom_mode_select +EXPORT_SYMBOL vmlinux 0xe08bf420 scsi_scan_target +EXPORT_SYMBOL vmlinux 0xe0a501e3 idr_remove_all +EXPORT_SYMBOL vmlinux 0xe0ac1bf4 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0adf062 tr_type_trans +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0b31804 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0cf43de seq_read +EXPORT_SYMBOL vmlinux 0xe0dc0e6d read_cache_page +EXPORT_SYMBOL vmlinux 0xe0f105a3 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0xe1163082 mmc_detect_change +EXPORT_SYMBOL vmlinux 0xe11ccb52 mark_page_accessed +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe153ce3d blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0xe15aeee2 downgrade_write +EXPORT_SYMBOL vmlinux 0xe16aab86 should_remove_suid +EXPORT_SYMBOL vmlinux 0xe16c0c72 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1826f0d i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xe1942fa8 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xe19aec50 end_page_writeback +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1b01db7 thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0xe1defd6f pnp_activate_dev +EXPORT_SYMBOL vmlinux 0xe21b7c05 simple_fill_super +EXPORT_SYMBOL vmlinux 0xe224c7e0 pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0xe2295709 unregister_filesystem +EXPORT_SYMBOL vmlinux 0xe23dab5c phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe2abcd3f tcf_exts_validate +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e0b4a0 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe3223f47 ppp_input_error +EXPORT_SYMBOL vmlinux 0xe33ad5e2 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0xe33e1bcc tcf_em_unregister +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe36ac4ec filemap_flush +EXPORT_SYMBOL vmlinux 0xe36d5c75 bdi_init +EXPORT_SYMBOL vmlinux 0xe3744dc3 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0xe38496e6 arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xe3a8583d scsi_dma_map +EXPORT_SYMBOL vmlinux 0xe3c5b8d3 page_address +EXPORT_SYMBOL vmlinux 0xe3c919be bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe401bfb0 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xe40a8240 dev_trans_start +EXPORT_SYMBOL vmlinux 0xe41b66f0 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xe429031e inet_ioctl +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe440ca0b proc_mkdir +EXPORT_SYMBOL vmlinux 0xe443e07b find_lock_page +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe48f3039 ida_get_new_above +EXPORT_SYMBOL vmlinux 0xe4a00efa bio_put +EXPORT_SYMBOL vmlinux 0xe4bb4fd5 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0xe4be6904 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4e639a1 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe521972d take_over_console +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe525a619 read_dev_sector +EXPORT_SYMBOL vmlinux 0xe54d2509 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xe5527427 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0xe56ccef9 skb_pull +EXPORT_SYMBOL vmlinux 0xe56d718c drop_super +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe589caaa i2c_release_client +EXPORT_SYMBOL vmlinux 0xe5909d9d pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xe5931bd5 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0xe5a03375 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0xe5aed39c filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5fca09f xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xe60ec200 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xe61c8eef mdiobus_free +EXPORT_SYMBOL vmlinux 0xe62784f1 sock_no_listen +EXPORT_SYMBOL vmlinux 0xe643611b __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0xe668a559 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0xe689e997 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe69c86c6 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0xe69f5c98 netdev_state_change +EXPORT_SYMBOL vmlinux 0xe6aaf012 ip6_route_output +EXPORT_SYMBOL vmlinux 0xe6b71196 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xe6b846dd journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xe6d7b69a rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe70a3372 console_start +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe737f9c2 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xe769541b wake_up_process +EXPORT_SYMBOL vmlinux 0xe76c3259 simple_link +EXPORT_SYMBOL vmlinux 0xe7bbd000 have_submounts +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7e5c0c4 sk_free +EXPORT_SYMBOL vmlinux 0xe7eb4650 scsi_host_put +EXPORT_SYMBOL vmlinux 0xe80780c7 write_inode_now +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe8486a52 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0xe855bae7 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xe8647a83 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe87b5997 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0xe88ef9de get_write_access +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8b2a7d2 filp_open +EXPORT_SYMBOL vmlinux 0xe8c0fbe2 pci_clear_master +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8d82dc9 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0xe8d992c4 journal_start_commit +EXPORT_SYMBOL vmlinux 0xe8f49aad log_wait_commit +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914456a gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe93293e8 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0xe93abf16 path_lookup +EXPORT_SYMBOL vmlinux 0xe93c9d81 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0xe9610f9e key_validate +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe9b935b5 inet6_release +EXPORT_SYMBOL vmlinux 0xe9bf81d3 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0xe9d84d1e kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0xe9ebaef0 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xeabd5386 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0xeadf631e skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeae8979c sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb23d7eb hci_free_dev +EXPORT_SYMBOL vmlinux 0xeb58d27e vfs_quota_enable +EXPORT_SYMBOL vmlinux 0xeb5ad513 blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0xeb7aacf4 tty_vhangup +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebaf593f init_file +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xec06c020 scsi_print_command +EXPORT_SYMBOL vmlinux 0xec2b5fba remove_inode_hash +EXPORT_SYMBOL vmlinux 0xec2e74d2 tcf_hash_create +EXPORT_SYMBOL vmlinux 0xec67723d journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xec68ae1a __inet6_hash +EXPORT_SYMBOL vmlinux 0xec6c2971 dcache_dir_close +EXPORT_SYMBOL vmlinux 0xec74e528 request_key +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xecab202e mb_cache_shrink +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xecf177e8 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0xed016ce1 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0xed04e921 seq_lseek +EXPORT_SYMBOL vmlinux 0xed2fd2ff elevator_init +EXPORT_SYMBOL vmlinux 0xed473187 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0xed90ea9a dev_alloc_name +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb0de34 hci_unregister_cb +EXPORT_SYMBOL vmlinux 0xedb5172a pnp_start_dev +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedbf30aa mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xee02b789 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0xee1bcabe tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee5598aa pci_find_bus +EXPORT_SYMBOL vmlinux 0xee655ef3 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0xee6eae71 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xee7a0928 sk_common_release +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xee81646a napi_gro_receive +EXPORT_SYMBOL vmlinux 0xee911dd4 __scm_send +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeb55dc2 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xeeca41df pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xef3bd862 mca_find_unused_adapter +EXPORT_SYMBOL vmlinux 0xef47a431 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xef5ed33e dump_trace +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef700611 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefac2b1c register_sysrq_key +EXPORT_SYMBOL vmlinux 0xefbe7b88 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xeff6b19c kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf038c38f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xf04c9b47 pci_remove_bus +EXPORT_SYMBOL vmlinux 0xf0655a81 hci_send_acl +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf080f846 pci_find_capability +EXPORT_SYMBOL vmlinux 0xf085f3a7 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0xf097c50a mnt_unpin +EXPORT_SYMBOL vmlinux 0xf0df8115 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11028f0 mdiobus_write +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf1180de7 nobh_truncate_page +EXPORT_SYMBOL vmlinux 0xf127c038 dmam_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0xf136fa89 pci_enable_msix +EXPORT_SYMBOL vmlinux 0xf13ae830 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0xf15539ba block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0xf15f0085 fd_install +EXPORT_SYMBOL vmlinux 0xf16cb51d tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf1914e04 pci_get_slot +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1a61cb4 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xf1b2d1a3 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1d0ed1b sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf21ed930 fb_show_logo +EXPORT_SYMBOL vmlinux 0xf22ee661 key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xf2494503 pcim_iounmap +EXPORT_SYMBOL vmlinux 0xf24d675e set_disk_ro +EXPORT_SYMBOL vmlinux 0xf27407aa blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0xf28054c6 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0xf28f201b pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2a37cef inet6_getname +EXPORT_SYMBOL vmlinux 0xf2c27df1 __napi_schedule +EXPORT_SYMBOL vmlinux 0xf2ca3c68 md_error +EXPORT_SYMBOL vmlinux 0xf2d65e59 pci_dev_put +EXPORT_SYMBOL vmlinux 0xf2d861f6 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xf2e74040 mca_set_adapter_name +EXPORT_SYMBOL vmlinux 0xf3037bc9 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf318f79f acpi_root_dir +EXPORT_SYMBOL vmlinux 0xf332fdc5 skb_queue_purge +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf36f43ba journal_get_create_access +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3ae05a9 __alloc_skb +EXPORT_SYMBOL vmlinux 0xf3b8a996 journal_abort +EXPORT_SYMBOL vmlinux 0xf3baaa6d input_event +EXPORT_SYMBOL vmlinux 0xf3bd2402 fget +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3e7f6d1 skb_split +EXPORT_SYMBOL vmlinux 0xf40cb482 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xf40ec281 lock_super +EXPORT_SYMBOL vmlinux 0xf413244c cad_pid +EXPORT_SYMBOL vmlinux 0xf4380add scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xf43df6bb neigh_lookup +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf460af86 xrlim_allow +EXPORT_SYMBOL vmlinux 0xf4753f98 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0xf48a2c4c MCA_bus +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf49bde32 vfs_create +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4ae9d51 ida_pre_get +EXPORT_SYMBOL vmlinux 0xf4b40f53 pci_match_id +EXPORT_SYMBOL vmlinux 0xf4c832c1 xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf4f73ec0 phy_print_status +EXPORT_SYMBOL vmlinux 0xf4fb4bb5 generic_show_options +EXPORT_SYMBOL vmlinux 0xf4fcdd0b udp_disconnect +EXPORT_SYMBOL vmlinux 0xf502d273 acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0xf51003bb i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xf517348c arp_send +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf5344dff uart_register_driver +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf54dd37f llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xf55c9df5 ndisc_send_rs +EXPORT_SYMBOL vmlinux 0xf57d3a70 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0xf57e4a95 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xf599ec46 acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c42ac5 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5ce0393 revert_creds +EXPORT_SYMBOL vmlinux 0xf5d21b80 dev_change_flags +EXPORT_SYMBOL vmlinux 0xf5d6f793 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xf5eab132 tcf_register_action +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf6036f20 scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xf60c65e9 bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0xf6271554 register_8022_client +EXPORT_SYMBOL vmlinux 0xf629977a i2c_del_driver +EXPORT_SYMBOL vmlinux 0xf6332567 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xf6473bad skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0xf6b00cf7 sock_kmalloc +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6cc39a5 set_trace_device +EXPORT_SYMBOL vmlinux 0xf6d8c1f0 mutex_trylock +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6fe58a6 scsi_block_requests +EXPORT_SYMBOL vmlinux 0xf706a7dc dev_disable_lro +EXPORT_SYMBOL vmlinux 0xf73f0b00 nla_reserve +EXPORT_SYMBOL vmlinux 0xf74207da pci_dev_get +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf786eaf2 task_nice +EXPORT_SYMBOL vmlinux 0xf786ef5e idr_init +EXPORT_SYMBOL vmlinux 0xf78b61d6 dma_release_declared_memory +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7a1d9eb override_creds +EXPORT_SYMBOL vmlinux 0xf7a3f4bb bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xf7ffd119 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf8272307 sock_init_data +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf83b2714 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0xf8678910 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8ebc64e neigh_destroy +EXPORT_SYMBOL vmlinux 0xf92906b7 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf940a328 __next_cpu +EXPORT_SYMBOL vmlinux 0xf9731a75 security_d_instantiate +EXPORT_SYMBOL vmlinux 0xf98c589c dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0xf98f4eaa serio_unregister_driver +EXPORT_SYMBOL vmlinux 0xf993c778 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9ae6d57 xfrm_state_update +EXPORT_SYMBOL vmlinux 0xf9d23e31 journal_wipe +EXPORT_SYMBOL vmlinux 0xf9d8ee2a poll_freewait +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa21b73f acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0xfa23ae79 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0xfa4b8b71 sget +EXPORT_SYMBOL vmlinux 0xfa5dc06d kernel_listen +EXPORT_SYMBOL vmlinux 0xfa632092 pci_find_next_bus +EXPORT_SYMBOL vmlinux 0xfa6a483d bdi_unregister +EXPORT_SYMBOL vmlinux 0xfa8a71fe bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0xfa8f84e7 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xfa8fa5b8 inode_setattr +EXPORT_SYMBOL vmlinux 0xfaa7eb0c tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xfaa95286 kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0xfaca38e9 dqput +EXPORT_SYMBOL vmlinux 0xfad02d22 fb_set_cmap +EXPORT_SYMBOL vmlinux 0xfadd2269 security_path_symlink +EXPORT_SYMBOL vmlinux 0xfaeaa031 proto_unregister +EXPORT_SYMBOL vmlinux 0xfaf92273 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb2983cf register_snap_client +EXPORT_SYMBOL vmlinux 0xfb63d7ea tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xfb67de4b blk_init_tags +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb72efb0 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0xfb7d97a8 scsi_print_result +EXPORT_SYMBOL vmlinux 0xfb81cbb5 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfba29a48 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0xfba448e6 disk_stack_limits +EXPORT_SYMBOL vmlinux 0xfbb603f4 sg_miter_stop +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbe311d2 dput +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc05e76f path_get +EXPORT_SYMBOL vmlinux 0xfc14e318 inet_shutdown +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc54949e elv_rb_del +EXPORT_SYMBOL vmlinux 0xfc701f78 tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xfc9c821d con_set_default_unimap +EXPORT_SYMBOL vmlinux 0xfca36c83 vfs_quota_on +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcb42822 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xfcb4faf4 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0xfcbf95f3 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfcdadc38 napi_skb_finish +EXPORT_SYMBOL vmlinux 0xfce528fe inet6_ioctl +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd10232c elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xfd3f22a8 md_integrity_register +EXPORT_SYMBOL vmlinux 0xfd5bc40e jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfdd32dfe neigh_create +EXPORT_SYMBOL vmlinux 0xfdd4064b acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0xfdde679d single_open +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdeaddb3 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0xfdec03cd tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe1289e0 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0xfe3c8d52 register_exec_domain +EXPORT_SYMBOL vmlinux 0xfe40d72f nobh_write_begin +EXPORT_SYMBOL vmlinux 0xfe44ea9a eisa_bus_type +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe812136 uart_suspend_port +EXPORT_SYMBOL vmlinux 0xfeb0a54d wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xfeb8ab59 touch_atime +EXPORT_SYMBOL vmlinux 0xfec25a42 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfecd54ac blk_start_request +EXPORT_SYMBOL vmlinux 0xfed121b4 mca_device_transform_memory +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee8fe18 bd_claim +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xff03d151 fsync_bdev +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff338864 mca_device_write_pos +EXPORT_SYMBOL vmlinux 0xff480992 dump_fpu +EXPORT_SYMBOL vmlinux 0xff49f9c0 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xff5e8a95 mca_device_transform_irq +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff80ec8c alloc_disk_node +EXPORT_SYMBOL vmlinux 0xff859bcd elv_abort_queue +EXPORT_SYMBOL vmlinux 0xff91fce0 nobh_writepage +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffa033f8 mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0xffafdc5c _read_unlock_irq +EXPORT_SYMBOL vmlinux 0xffb9313a neigh_table_clear +EXPORT_SYMBOL vmlinux 0xffc7c184 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xffd54e13 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a crypto_aes_encrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491 crypto_aes_decrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81 ucode_cpu_info +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935 kvm_disable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4 kvm_get_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09c9131f is_error_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0acc4bfc kvm_read_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0c320ac9 kvm_lapic_get_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d208a6b kvm_emulate_halt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b kvm_release_pfn_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x14c3eb4b kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x18091b93 kvm_emulate_cpuid +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1c2b93b0 kvm_get_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb kvm_release_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x201dd480 kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x225c7593 kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039 kvm_set_pfn_accessed +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x24170329 kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x26f28e36 kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2c96f494 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3285268b kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x33736bb8 kvm_cpu_has_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3690f679 kvm_inject_nmi +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x36f380b0 kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3db8fe29 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3e109ea0 kvm_report_emulation_failure +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x41de6e1f kvm_cpu_get_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x440f4c43 kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x46c0d252 kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x49bd875a kvm_task_switch +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x51171c48 kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x51385e93 fx_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x58160ed4 gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x62b9b2c9 kvm_clear_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x683cfeed kvm_put_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x68c7ae25 kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x71b64d05 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x728a4cba kvm_load_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7529bb12 gfn_to_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x757ca774 kvm_queue_exception +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x784f6bdd kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7dce54ed kvm_release_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7eca27cf kvm_set_cr4 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x80342ae4 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8592a3fb emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x929bf403 load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x96699899 kvm_get_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x96c2de39 kvm_emulate_hypercall +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x99fff90d kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9fd2f57e kvm_mmu_page_fault +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa6b936f3 kvm_set_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xac8787ce kvm_lapic_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae4aed07 emulator_write_emulated +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb628eeab kvm_set_cr3 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbab299e1 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbf0fdae8 kvm_emulate_pio +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbf267edd kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc094a339 kvm_emulate_pio_string +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc16b9271 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc28332f8 kvm_write_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc9ad76cd kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcae4d321 kvm_resched +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd300a95 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd77cfea kvm_mmu_invlpg +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd8e9dd8 kvm_lapic_set_tpr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9 kvm_is_error_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd659cbde __kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd757edd7 kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe6b9347c kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe751ca25 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed90f47f kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed9f872a kvm_set_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf03ab9b1 kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf58fb67d gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf66d25a5 kvm_mmu_load +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfbbfaf59 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfc549553 kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x142f878e crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x2c62c0c4 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x5a16cb0d __async_tx_find_channel +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x9b6811ca async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xa4f6e938 async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xc30dbafa async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x72e7d452 async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xf18db84a async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0x27a3074e cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0x7f921c8c cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0xed52dba5 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0xe706358c twofish_setkey +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464 cfag12864b_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d cfag12864b_disable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6 cfag12864b_isenabled +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926 cfag12864b_enable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342 cfag12864b_getrate +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95 cfag12864b_buffer +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23 ks0108_displaystate +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518 ks0108_writedata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333 ks0108_startline +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968 ks0108_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db ks0108_writecontrol +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2 ks0108_page +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b ks0108_address +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x182cebb2 agp_add_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xce6b7a33 agp_remove_bridge +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5 agp_num_entries +EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc agp_memory_reserved +EXPORT_SYMBOL_GPL drivers/char/scx200_gpio 0x32aee1b2 scx200_gpio_ops +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0aac5345 tpm_show_owned +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0d3fa03d tpm_get_timeouts +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x13b16711 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x140311f0 tpm_show_caps +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1751003d tpm_store_cancel +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1de497c4 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x243e0990 tpm_pm_resume +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x32e51c33 tpm_open +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4ab5a6cc tpm_calc_ordinal_duration +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6f8beea7 tpm_pm_suspend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x79cae728 tpm_dev_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7a55a124 tpm_write +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7b5e3f4a tpm_dev_vendor_release +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8853e60d tpm_gen_interrupt +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x978dda81 tpm_register_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xaad1c3bd tpm_show_pcrs +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xad793a95 tpm_show_enabled +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d tpm_pcr_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb8908fbe tpm_show_active +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5 tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd1e4c2d7 tpm_continue_selftest +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xedeffe10 tpm_show_pubek +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf377eb1e tpm_release +EXPORT_SYMBOL_GPL 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close_candev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x340d2f73 unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x479bcc36 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x9f340608 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdced7e9a alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x079a4020 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x13e657d7 mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x19973494 mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1b0a5062 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1b7e0f29 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1d5d5698 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x246d9ef9 mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2c831483 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+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaf946e7a mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xafc0bfc4 mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb3592154 mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb9cd18c5 mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc61b1114 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc99698e8 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcaed18cb mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcb414a85 mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc1d6859 mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe0cb8028 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe447e7d6 mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe552dbbc mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xec26fef3 mlx4_mtt_addr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xec6e0663 mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xef50eb72 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf3e07ac8 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf8c5bc61 mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd9b4a65 mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x0c7a1d27 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x59624e80 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x383d223f generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x4c6fd971 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9b78f8f3 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9d174876 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xba4eeb33 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xd3bd2b05 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x08a4122d usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1c1a5577 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1d66b880 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3cdcb668 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x42d61bea usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x44f3fe0c usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x49604256 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x577b9a50 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5f802182 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x649600a8 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7aaf077f usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7bd281d2 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9257902d usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xaee4f159 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb8a9e32c usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb97be356 usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe4ed4dca usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe79513c2 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xea7e7aae usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf146c941 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf39289a5 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x00044fb8 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x053db845 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0ed31f98 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x18290367 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1990e818 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x352dc4cb i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x68a07e73 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8786e28a i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc1c2a3f7 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcde29c89 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xdf2e7c89 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf52b79a1 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf571d4cb i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xccc32077 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1fbd9074 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x20fd8595 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x39a0b53f lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x400db9b0 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x44f19120 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6652289d lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x69e0f400 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7db83f57 lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x836541fb lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8dd7aa02 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8f7c3bbc lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9a8b4052 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xad1f10ae lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdf7f9f3e lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfc6d88a7 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x53d993c4 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x5cb889e8 lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x88dcbb19 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9f1e38de lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xab92d3ed lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb17e717d lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xdaf31baf lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xed41dfea lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x2221eab9 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xb0054f7c if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x02a9f8d7 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0a6d1651 p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x11bb6912 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x120f59c2 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x723a05b0 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbf7db72a p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc557b01c p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc7d3dfa4 p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x03a23eba rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x05389b39 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x05d3b552 rt2x00lib_suspend +EXPORT_SYMBOL_GPL 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drivers/net/wireless/rt2x00/rt2x00lib 0xc380c554 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc776f561 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe7b13d73 rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xef75bb64 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf21c9be4 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf2b89122 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf5fc3ae8 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfeb089bd rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x018efa53 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x05c0dca5 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x0c35ae4b rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x23c3cc38 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5ead94fe rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x690c6ec0 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x87a94717 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa83c48e8 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc55ed4e7 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x185610eb rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x18d7a8af rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2790b6e4 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x28ae6c00 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x38d73a4d rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x447d74f4 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4cae466a rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4f2d707c rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6533c51a rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x666e65a6 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7b0b43c3 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8130c42f rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8e249414 rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc88c8321 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe8cccba9 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe8f1b788 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x815c3b01 acpiphp_unregister_attention +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xc30910b8 acpiphp_register_attention +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x70f0ac1e pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xb68d2ca6 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x4d8805e7 wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x518fe6c6 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x703efc9d wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8379f259 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x9336cc6e wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf72fb37e wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x3d9101c8 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xb66a8bc7 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x06c9ecf1 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0fb2adbd iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x112125e9 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1334d2d1 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x136fa160 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x178071c2 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ad10ff9 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ccbe8c6 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x29295904 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f1f8879 iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x40a6df05 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41a9cb0f iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b085dbe iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4fb414c1 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x55e81850 iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x57c80f3c iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5b6a222a iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66dc4e43 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6e238f2b iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x70fbe775 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x71384904 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7dcabd07 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x869f24b2 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8868ccd7 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x94548532 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa596a21f __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xabda243f iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb4458093 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb9fd3b80 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc052c3f7 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc0bfc050 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd3500838 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd3e5bc34 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe7bfe0fa iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf5a56154 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf654d0b9 iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf80551e9 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf8ed6b21 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0bc851fe iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x297a5709 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x351c8022 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x51f5c491 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x581d0a3c iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5b9cd6d0 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5be1bf54 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6dc79c89 iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x94b72b38 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc00bcf6c iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc50de658 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd4f21dd0 iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd70e97e5 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe19bfafb iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xebec7a26 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xff06558e iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x033e1925 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0842e234 sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x09452e42 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x105af56c sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x126bd0ca sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x13e30501 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x31a608e3 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3c1f22b1 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x479dab48 sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x552c91f3 sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5849dcca sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5c06e59a sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5c4517b4 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6dd8102f __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7e8aca41 sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x89173a4b sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb3d1607f sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc89fd101 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdbee918f sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xedd6fce6 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf0410732 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf048356d sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf0a28705 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2b51c674 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x55eaf236 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x8161b848 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa5950443 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xda472332 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xf4a5e4c5 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x1242cec2 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2f8eb6c9 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x42d1103c scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x57af741f scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x58bb8231 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x7a5667d0 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa147cd57 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc3b24263 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe5cd6243 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x10939edd iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1dfcec6e iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x24dc2e11 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x264e3bab iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2962c602 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x32591f5c iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3b285ce0 iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x449a6e73 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4522af9b iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x45f24cbb iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6344f1b3 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7b360064 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7cf8528e iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9c7d2013 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa0f4cf56 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa56a09ab iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbfd6557b iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc5eabdf5 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd81df2d7 iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe01413e6 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xff8ceeb2 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xffb1762f iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x404b9a4f srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x4d406484 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x67c6d840 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xc838acd4 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xdf2e1d43 srp_rport_del +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x5fe070c3 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x62763aea spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa09fdc52 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc85f8a61 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc9ff3558 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xef8b0568 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xd67bd642 comedi_alloc_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xe6ccd72e comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20 das08_cs_boards +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x9f23b0a2 das08_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xed431794 das08_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95 labpc_1200_is_unipolar +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x7a1c8fab labpc_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a range_labpc_1200_ai +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347 labpc_1200_ai_gain_bits +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xf8b1de35 labpc_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x0e1ba9f7 ni_tio_set_gate_src +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x19f644f0 ni_tio_insn_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x46795bba ni_tio_winsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x6439f8b1 ni_tio_arm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x87a365b3 ni_gpct_device_destroy +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xbbc17f7d ni_tio_init_counter +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xc39be3cb ni_tio_rinsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xce99828a ni_gpct_device_construct +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x23551896 ni_tio_set_mite_channel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x52e35309 ni_tio_cancel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x98d61584 ni_tio_acknowledge_and_confirm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9dc65a5d ni_tio_handle_interrupt +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xae4a192c ni_tio_cmdtest +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xfa5f5d0e ni_tio_cmd +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b oslec_flush +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1 oslec_free +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747 oslec_update +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x077f5e76 usbip_stop_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0c13b5be usbip_recv_iso +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x18b721f1 usbip_start_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x2bec508e dev_attr_usbip_debug +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x314233e3 usbip_recv_xbuff +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x31ebaa2e usbip_event_happend +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x36a45cf3 usbip_alloc_iso_desc_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6881a4bf usbip_stop_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44 usbip_debug_flag +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x86208065 sockfd_to_socket +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa695b2f4 usbip_pack_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb99dff62 usbip_dump_urb +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc4232b9d usbip_start_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc usbip_header_correct_endian +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd63a6486 usbip_task_init +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd98c05c9 usbip_event_add +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586 usbip_dump_header +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xed0bca4a usbip_xmit +EXPORT_SYMBOL_GPL drivers/uio/uio 0x12f4d468 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x5e299ff8 uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0xa93e1130 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xbef52d59 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xcb0999f7 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0136d596 usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x166bba8b usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2d49e974 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x6483ae6f usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x68acf331 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7944979c ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x82b90a7f usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8a45f98a usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xafec194c usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1b9f6bbc usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3a63d453 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x508c30bf ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x77f09562 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7cde1ecf usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x85bdc47b usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8c26246a usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9c9d73a2 usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa1d86c7e usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb811ed0e usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbcd66b43 usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcb40d7e9 ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcfbeec90 usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd64af188 usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf7bddee7 usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0031412b usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x056d1a3f usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1398c102 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x14c4423e usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x26d2607c usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x381ddc66 usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3f79dba2 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4948e037 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x55c136a2 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5c70d569 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x602c11c6 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6b252acd usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7b5171ab usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x922a74ce usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9301580f usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9ad83e08 fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa3b31510 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xaece0a91 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbcbfc8db usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xccd718a2 usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd412eae7 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdd9a526d usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe9e2c36c usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x178c8e0a rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x508674dd __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x66b65d42 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa8a3607c wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc0e86c4b wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x27aa914e wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3336e4b0 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x580a939b wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7583e3a8 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x92880181 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x935af8fd wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9f8a161e wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa0f4e136 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa186b2ef wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa7e08890 wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xae39d55d wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc5c5af8e wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc9faaf32 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xcddb6211 wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdec2f473 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe900a2eb wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2acccf7a i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4763b3da i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x6bf6b063 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x039deeaf uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x2f1131cb uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x577bb488 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x6a64b4b5 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x72f3eff3 uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xc18ac869 uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xc47e3533 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf9d4dbbd uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x29105beb umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x304136f7 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x32b88215 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x5cdf3e42 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x963885bc umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa13d3fa5 umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xab1defd3 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xbc12399e __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x053932e4 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c24edfe uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c4841d0 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x20f8569a uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2180673b uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x268f600a uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2c9e930a uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2fedbb30 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x55df079e uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5810d1e8 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58cf5c3b uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5ac909a6 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7af89a54 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7c9e881e uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x892420bd uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8b817e4b uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8c1da550 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x97808e8e uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9bd6ca15 uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c8a952e uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5445970 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7c7af48 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa8c7ffe3 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaafccd4b uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafc2f5ed uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb139fbe2 __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba7b842a uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2d43cf5 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd4d5a2a0 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd574aa1d uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd76bd0e7 uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdff7e92e uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe31ecf43 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4268e38 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0650c32 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf51862f9 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf6a1bf1b uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xc0ce9531 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x042b0da8 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0ae89655 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0bb5ea09 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0c8900a1 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x256a030c wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x27913ef7 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2b970168 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2cfa53ff wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x39155c66 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3e5309f3 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3f010deb wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x40aa2f76 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x49257b6e wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x494e6a1a wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4b46880f wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x699acb60 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7194813b wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7a578866 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x86b928a6 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x871cffba wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x92694618 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9745d975 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9ad80b05 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb237f047 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbfd40b2f wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc3c266bc wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd6242286 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe3cd4c73 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe59984fd wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xec58b386 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf2614ba8 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd81c6c7 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x02ac9fac ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0f4a4f58 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x3301fb19 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4c4391e6 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x9da3693f ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf0134705 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfdee0aac ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x5ce38e67 fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x8b3d1cc1 fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xc5466d93 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x65d7b9eb sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xd8eeb511 sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x0703c270 unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x0c9206cf virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x46587d14 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xa5f488e7 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xb0486dbb register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x1ef23ded vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x26c35c8e vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x30e97163 vring_transport_features +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2b2a4a27 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2c897f37 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x5dd55f34 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9207f4e3 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xafde72f0 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd4e82c1 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe164307a w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe6e15fe6 w1_touch_block +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcb0245f9 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xeaf0725b dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xfdaf5c62 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x76c49e0b exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x8f517625 exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x0842d735 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0x0bf27e6f fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x0c7f7167 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x12fa552e fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x1745a311 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0x1b9899f0 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x36184d20 fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x548fad57 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0x55e3aac5 fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0x7d8edf7e fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x8458656e fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0xa5c26a77 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xba01866a fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xd7088251 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0xe4bcc83f fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xf41ebd0d fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xf5ad0370 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0xfb189fe8 fat_remove_entries +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x312ea594 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x50931b41 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x5e89ee0b nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7786ed4e nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xd3966ba6 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xabd65a86 nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xead6e7ad nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x11637e5a o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2ce5242f o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x49878162 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x61cc09a4 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb4ca7ca2 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xc09f3579 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe81a58ac o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x10d78207 dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x194bca39 dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x24d4cca6 dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x2d180075 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7af6fc5a dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x8c87a0e0 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL 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rpc_shutdown_client +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x85f621d1 xdr_encode_array2 +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8737272a xdr_decode_array2 +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x875cd767 auth_unix_add_addr +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x89aa0951 xdr_init_encode +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a0ac74b __rpc_wait_for_completion_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b64d82f rpc_delay +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c427571 svc_xprt_init +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d1fa656 xprt_wake_pending_tasks +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8eb27411 svc_find_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8ee416b5 svc_drop +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8f0424d1 rpc_clone_client +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90299ce0 rpc_sleep_on +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x915ed2be rpc_lookup_cred +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x93aa671e xdr_buf_from_iov +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x94060c10 rpc_restart_call_prepare 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xprt_register_transport +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfdafaa28 auth_unix_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff81e866 csum_partial_copy_to_xdr +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xffc8fd0a svc_set_client +EXPORT_SYMBOL_GPL net/wimax/wimax 0x00b71d06 wimax_msg_data +EXPORT_SYMBOL_GPL net/wimax/wimax 0x080b3b0b wimax_msg_alloc +EXPORT_SYMBOL_GPL net/wimax/wimax 0x30717f2d wimax_report_rfkill_sw +EXPORT_SYMBOL_GPL net/wimax/wimax 0x358f3a06 wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0x4656e2e4 wimax_state_change +EXPORT_SYMBOL_GPL net/wimax/wimax 0x4f310424 wimax_report_rfkill_hw +EXPORT_SYMBOL_GPL net/wimax/wimax 0x5d2a5df3 wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0x62161b38 wimax_msg +EXPORT_SYMBOL_GPL net/wimax/wimax 0x699ed4d9 wimax_state_get +EXPORT_SYMBOL_GPL net/wimax/wimax 0x97880dfe wimax_dev_add +EXPORT_SYMBOL_GPL net/wimax/wimax 0x98d7ccb1 wimax_dev_rm +EXPORT_SYMBOL_GPL net/wimax/wimax 0xaef0a78e wimax_msg_data_len +EXPORT_SYMBOL_GPL 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ipcomp_destroy +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4cce7022 ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x64301457 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xe7efe81d ipcomp_init_state +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01f3f460 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x02e43914 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x06035291 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x06c45c24 snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x09b42733 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14bf1cf1 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x184e83a8 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1eee92ab snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f520491 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x248f55d1 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x255754d3 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x26bf91b6 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2933d3fd snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2c6e2677 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2cee1fec snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e019b39 snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32c954cd snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32dddd47 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33dc474f snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x398901fc snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3cc3dcc6 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3e7b8886 snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4d45828a snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5367c9b1 snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5939ef2a snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b1076dc snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b2991cd snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ff56217 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6092a3dc snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x63809ea0 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x674b50f8 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6d1adea2 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6d237391 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6efeb9e0 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x78ac3f1a snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x78c1c458 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x79cfcbc4 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7cff6440 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87aaa74d snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x88f1b827 snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8abb3551 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x93c0c989 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x94897733 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9863b511 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9bb492e9 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ccd8404 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9cd9928e snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f2f0874 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa430ea7b snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa457ab37 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad8c30f3 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaedbf18b snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb0a0bb3a snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb7501898 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbb6b0a60 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbcd3bd64 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc354f733 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc39e9425 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcf74d059 snd_hda_get_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd064fed7 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd77cdd9a snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdc708955 snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdcc1a022 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe1f01d57 snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe700a8a7 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe78b34e8 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe82fa4be snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8aed8f0 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xee82a0d1 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf434a9ea snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf4ec76e0 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe63af20 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xffbc25c8 snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x55c854b2 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x5f98432c soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x477745f7 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x0fe02610 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x975ac633 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x4cfba847 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x55080257 cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x458e1916 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x4a8fabbc pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x4e3b1cdd soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xe3688325 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x56f9b24d soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x689225b2 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x56b017f2 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x65c9ae99 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x13aa554f aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x471be451 aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x58190751 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x7a77d743 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x86f1d0c9 aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb9723ea3 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xc595775a aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x03c83d75 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xe1b694d5 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x200ef2d0 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x11b4ceb9 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xb18848a2 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x0ffe5835 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x8acbfda8 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xe19b2fd6 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x94e2a267 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xb9660968 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x66b4a1d3 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xfd61cb72 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x69659a5c soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xa915e9fa wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x06225d09 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x62ff54ff wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xd6228c77 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe3870e83 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x4b0be81c wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xcbb4c184 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xe0999247 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xf0be7aa6 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x0cb9d589 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x2da0745c soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x068d279f soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x8a2da727 wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x2aa9dc80 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xf8f6f19a wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x292d08ee soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x6f69e0b3 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x024238a2 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x31f45398 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xd3051983 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xeb6aafec soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x22714fd3 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9921905a wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x7ac0729f soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xfc3e4723 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x01d8d7a3 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0908a0b8 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0be3c078 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0f98e6ca snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x114167a8 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1202bd7d snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x14289b86 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1b015cdc snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1e290ccb snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1f066f6a snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x207280da snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x225a7566 snd_soc_jack_new +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x22b8a631 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x24f4c17d snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2616ccb3 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x331a3a3a snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x37815531 snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3919c01d snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x41692b0f snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x42803b86 snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x43cd57ac snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d7fd8b4 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53475995 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55260124 snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5a6db080 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c197838 snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d957b58 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6e7b0ea2 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6efee3f4 snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6fb4e573 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x71b571f4 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x75387955 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x753ff38c snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x76585358 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cf0a342 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x82ef7f79 snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x837435d2 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x84124250 snd_soc_dai_set_tristate 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net_ipv6_ctl_path +EXPORT_SYMBOL_GPL vmlinux 0x08a7dc97 __tracepoint_kfree_skb +EXPORT_SYMBOL_GPL vmlinux 0x08b1de60 transport_configure_device +EXPORT_SYMBOL_GPL vmlinux 0x08b31f9b devres_close_group +EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4 round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0x0933e980 crypto_alloc_base +EXPORT_SYMBOL_GPL vmlinux 0x0941bee2 security_inode_mkdir +EXPORT_SYMBOL_GPL vmlinux 0x09863cf5 crypto_register_shash +EXPORT_SYMBOL_GPL vmlinux 0x099242a8 scsi_eh_ready_devs +EXPORT_SYMBOL_GPL vmlinux 0x0992bc03 fsstack_copy_attr_all +EXPORT_SYMBOL_GPL vmlinux 0x09b31bd9 fuse_conn_put +EXPORT_SYMBOL_GPL vmlinux 0x09c83d9e cpci_hp_unregister_controller +EXPORT_SYMBOL_GPL vmlinux 0x0a14d9ea security_inode_create +EXPORT_SYMBOL_GPL vmlinux 0x0a7d8546 ata_sff_host_intr +EXPORT_SYMBOL_GPL vmlinux 0x0ac24e4c tracepoint_iter_start +EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2 unshare_fs_struct +EXPORT_SYMBOL_GPL vmlinux 0x0b4f4f3f xenbus_frontend_closed +EXPORT_SYMBOL_GPL vmlinux 0x0b6b450c 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hwmon_device_register +EXPORT_SYMBOL_GPL vmlinux 0x3040391b rtc_read_alarm +EXPORT_SYMBOL_GPL vmlinux 0x3068b491 handle_level_irq +EXPORT_SYMBOL_GPL vmlinux 0x30711b7f ata_sff_check_status +EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca bstr_printf +EXPORT_SYMBOL_GPL vmlinux 0x30a9db66 hrtimer_start +EXPORT_SYMBOL_GPL vmlinux 0x31375625 zap_vma_ptes +EXPORT_SYMBOL_GPL vmlinux 0x318920b1 register_dock_notifier +EXPORT_SYMBOL_GPL vmlinux 0x31954756 blk_queue_rq_timeout +EXPORT_SYMBOL_GPL vmlinux 0x319727eb vfs_setxattr +EXPORT_SYMBOL_GPL vmlinux 0x31a75f6c ata_pci_sff_prepare_host +EXPORT_SYMBOL_GPL vmlinux 0x31acea4c generic_sync_sb_inodes +EXPORT_SYMBOL_GPL vmlinux 0x321a6bb6 regulator_set_voltage +EXPORT_SYMBOL_GPL vmlinux 0x32269f43 do_add_mount +EXPORT_SYMBOL_GPL vmlinux 0x325e677c gnttab_grant_foreign_transfer_ref +EXPORT_SYMBOL_GPL vmlinux 0x328cc269 sysdev_show_int +EXPORT_SYMBOL_GPL vmlinux 0x32924a4d scatterwalk_copychunks +EXPORT_SYMBOL_GPL vmlinux 0x32a855c2 hid_add_device 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0xf1463412 execute_in_process_context +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf249428b ring_buffer_read +EXPORT_SYMBOL_GPL vmlinux 0xf2bf5f2f sysfs_notify +EXPORT_SYMBOL_GPL vmlinux 0xf2caa240 crypto_shash_final +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf2fe376d hvc_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf3317715 user_match +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf3685215 scsi_target_unblock +EXPORT_SYMBOL_GPL vmlinux 0xf3909f6b drop_file_write_access +EXPORT_SYMBOL_GPL vmlinux 0xf3a808d5 rtnl_kill_links +EXPORT_SYMBOL_GPL vmlinux 0xf404ccc9 platform_device_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf453dc2d pci_rescan_bus +EXPORT_SYMBOL_GPL vmlinux 0xf456fefb led_trigger_set_default +EXPORT_SYMBOL_GPL vmlinux 0xf46ec18a ata_sff_tf_load +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4a91cce mmu_notifier_register +EXPORT_SYMBOL_GPL vmlinux 0xf4ad0a9c debugfs_create_blob +EXPORT_SYMBOL_GPL vmlinux 0xf4c5f644 lookup_create +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf5468bc4 crypto_destroy_tfm +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf57c8747 da903x_write +EXPORT_SYMBOL_GPL vmlinux 0xf5945bac gnttab_free_grant_references +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5b2b22c platform_bus +EXPORT_SYMBOL_GPL vmlinux 0xf5eed336 get_driver +EXPORT_SYMBOL_GPL vmlinux 0xf5f06292 usb_reset_device +EXPORT_SYMBOL_GPL vmlinux 0xf5f2ce7b unregister_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0xf5fe5999 fb_bl_default_curve +EXPORT_SYMBOL_GPL vmlinux 0xf60d39fd sock_prot_inuse_get +EXPORT_SYMBOL_GPL vmlinux 0xf65f6d1f crypto_aead_setauthsize +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf7016530 xenbus_gather +EXPORT_SYMBOL_GPL vmlinux 0xf7135e0a skb_to_sgvec +EXPORT_SYMBOL_GPL vmlinux 0xf78dbf86 user_read +EXPORT_SYMBOL_GPL vmlinux 0xf7943ac9 devm_kfree +EXPORT_SYMBOL_GPL vmlinux 0xf7de1b5b disk_part_iter_next +EXPORT_SYMBOL_GPL vmlinux 0xf7eb4505 __inet_hash_nolisten +EXPORT_SYMBOL_GPL vmlinux 0xf7fd3e98 pci_bus_max_busnr +EXPORT_SYMBOL_GPL vmlinux 0xf8277ca8 security_inode_setattr +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf889628b debugfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0xf8b37111 md_do_sync +EXPORT_SYMBOL_GPL vmlinux 0xf8edda6c device_rename +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf925fc7d __i2c_board_lock +EXPORT_SYMBOL_GPL vmlinux 0xf9765833 dmi_match +EXPORT_SYMBOL_GPL vmlinux 0xf97666a0 set_memory_rw +EXPORT_SYMBOL_GPL vmlinux 0xf9937f21 usb_clear_halt +EXPORT_SYMBOL_GPL vmlinux 0xf99cac79 led_trigger_remove +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662 scatterwalk_start +EXPORT_SYMBOL_GPL vmlinux 0xfaac7532 cpufreq_freq_attr_scaling_available_freqs +EXPORT_SYMBOL_GPL vmlinux 0xfac37ba9 class_interface_register +EXPORT_SYMBOL_GPL vmlinux 0xfacc95a6 __fsnotify_inode_delete +EXPORT_SYMBOL_GPL vmlinux 0xfae17fca input_ff_event +EXPORT_SYMBOL_GPL vmlinux 0xfae8f7d9 class_interface_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfb2a3293 math_state_restore +EXPORT_SYMBOL_GPL vmlinux 0xfb6d7ff2 ata_sff_data_xfer32 +EXPORT_SYMBOL_GPL vmlinux 0xfb791d6c kobject_get_path +EXPORT_SYMBOL_GPL vmlinux 0xfbebc375 usb_buffer_map_sg +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc4dd1c2 queue_work +EXPORT_SYMBOL_GPL vmlinux 0xfc81765e crypto_register_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfceb8d0a usb_find_interface +EXPORT_SYMBOL_GPL vmlinux 0xfcf15c6f sata_pmp_error_handler +EXPORT_SYMBOL_GPL vmlinux 0xfd49176e pci_create_slot +EXPORT_SYMBOL_GPL vmlinux 0xfd51b281 gnttab_end_foreign_access_ref +EXPORT_SYMBOL_GPL vmlinux 0xfd831e74 usb_get_from_anchor +EXPORT_SYMBOL_GPL vmlinux 0xfd8fc889 simple_attr_release +EXPORT_SYMBOL_GPL vmlinux 0xfdb04674 cpufreq_register_governor +EXPORT_SYMBOL_GPL vmlinux 0xfdc470ae da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfdfeb385 ata_sas_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xfe3c0088 bus_get_device_klist +EXPORT_SYMBOL_GPL vmlinux 0xfe53bcdb pci_intx +EXPORT_SYMBOL_GPL vmlinux 0xfe7168da kobject_uevent_env +EXPORT_SYMBOL_GPL vmlinux 0xfe727411 get_phys_to_machine +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfeb67c3a sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xfebe9b70 fb_deferred_io_fsync +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xff4a31f3 regulator_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL vmlinux 0xff7584f1 dm_rh_get_region_size +EXPORT_SYMBOL_GPL vmlinux 0xff8e0aa6 add_timer_on +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/i386/386 +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/i386/386 @@ -0,0 +1,10069 @@ +EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667 scx200_gpio_base +EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008 scx200_gpio_configure +EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c scx200_gpio_shadow +EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd scx200_cb_base +EXPORT_SYMBOL arch/x86/kvm/kvm 0xa1b85bf1 kvm_cpu_has_pending_timer +EXPORT_SYMBOL arch/x86/kvm/kvm 0xa770d077 kvm_read_guest_atomic +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0xee73ab0b suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0x367d8115 uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x0e44ddf6 pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x159ff715 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x23b20eab pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x470777a9 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0x8fdd6b09 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x978ec008 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x9f7a944d pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0xaca90502 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0xb0c44061 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0xb0d10520 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0xbf32cf84 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xfc65a156 paride_unregister +EXPORT_SYMBOL drivers/char/agp/agpgart 0x113bf149 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x16346770 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x163feb15 agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0x24ba40c6 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x25e45ef8 get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3077e616 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3b5b9a5e agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3e95cf48 agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x41372ae4 agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4db8ca2c agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x71498ae0 agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7f91982d agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x86bc5428 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x87eddc86 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x92b94f0f agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x97a7cfcb agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x98e2f76d agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x994f5050 agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9b70ab1f agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa18252d2 agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xaa38e657 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0xafcb0c08 agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9611730 agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbaf8e926 agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbd9ab437 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xcd362f65 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd66c9638 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd9c2cf2b agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0xddaa4a62 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe1358f39 agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe9eb7588 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xea89aeb4 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf0241ba8 agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x181acf55 gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0x1901f4f8 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x365491c3 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x36d09c3d gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0x40b4be60 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x429e5be0 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x458df7b9 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x4fcb501b gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x5c3d3355 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x8c277cbf gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x94d754f7 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x9834e4bb gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0xba34e096 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0xc657aebe gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xf11e70af gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0xfc4296e9 gs_setserial +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0d35f896 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15c9a273 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x169bede6 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1b38c958 ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44c4c2a0 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x545ae343 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x70a1fcc1 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x77ec8f78 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7afd38a2 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x84112843 ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8e19f575 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x90be5c3a ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x94dd92d1 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x999c30f5 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa9dc1301 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbfb59b18 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc8e803ee ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcb71dc6d ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf036770f ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf250e811 ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf5b966ab ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf7517587 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfc981279 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/nsc_gpio 0x0593317f nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0x242005c7 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nsc_gpio 0x5213749b nsc_gpio_read +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0x23d74400 edac_mc_find +EXPORT_SYMBOL drivers/edac/edac_core 0x7e9339e8 edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xae4269fa edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/firewire/firewire-core 0x00e37f33 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e9cb03c fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0x571b92df fw_iso_context_queue +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5c669aff fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5d46fb6e fw_iso_context_start +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6dea8aca fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6e7caddb fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x720be5bb fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x77093654 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7ea4ee90 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8760df0f fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8bac1ab1 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c2f2dbd fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb9bc0cc2 fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc2f6339f fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc7eecbda fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc9074fba fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xd79b3e39 fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe4728ff3 fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf2dbebd7 fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf4ec2f66 fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf91830ef fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc4cacac fw_send_request +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x00fa8671 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0x022db8dd drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0x04988b65 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x04eff876 drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05610c5d drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x068df558 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c0811fe drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e8c2760 drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e915f88 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x10f20ba3 drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1329a6e9 drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1485870d drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x17723e55 drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1a6926a4 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1c52f731 drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d2de71a drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20d2763d drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x251805e0 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x26bbc0f2 drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x285b17ec drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a86ed8b drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2fcff6e6 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x30a13b2d drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x339bd3e2 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x340698ef drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x373e20ad drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3747c576 drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x37640600 drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a0c5bd3 drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3b07c97a drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ff43750 drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4125e811 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x457ba5b6 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49dd339b drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a7ad7c7 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d3bdfcd drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e6565e8 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x50ee56aa drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58a9d7e6 drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5933d804 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5999c3a4 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5c2e1a3c drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6127713e drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x656ca5cf drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6582829c drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x65d510a6 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x66121312 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a47b493 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ea549a9 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f50c6e0 drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f546720 drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x72e1a6d9 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79374e3d drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79a09d7c drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x79b02dae drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7aaf3b97 drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7bb66f16 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7cead826 drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7d4c7e7a drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7dcf5c2a drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7de2db09 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ed2548a drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7f3fafba drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7fe8d3b5 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x81a70c34 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8262c3c8 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x828bbe42 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x83b9c340 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x857c1620 drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x86291419 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x87357c43 drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0x875fbe60 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8ad742f8 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8bcc1f4a drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d8d1ae7 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f487bd3 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x90d1c5ca drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94681471 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x952aa098 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x995e1f7d drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x99a00873 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9db724fe drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e58e624 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa212b780 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa30d2f1d drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa3c76933 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4040def drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa516b3d9 drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa94f25a0 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0xabcfcc40 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xad32766f drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0xae2d9dcf drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8df1e94 drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb92230a9 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe048fcd drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc01eb952 drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4deab88 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc61d0f4f drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc9a406df drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdae3119 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcff85b49 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd07b2db4 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd47759ab drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd6e294a9 drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd7dfed89 drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdaab7aca drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb61147e drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd4dbd76 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd725f09 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe38b9176 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe43f20c9 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe492c0b8 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe793c91e drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe91f4bbc drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xef23d1d8 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf09e47da drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf330f38e drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf44d777a drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf60f2f9d drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfb4d94bd drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfda47896 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x090d4e78 i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x25258dfd intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x5e45ff46 intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x76818375 intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x6d535a03 radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x82b3264a radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x990b3d38 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0b502499 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x147bc244 ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1a72dcbb ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x23ee1c67 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x25592017 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x26a77354 ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3b3bbf51 ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3fb4388e ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x46405a84 ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x511832e8 ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5131fd3a ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5e80cb8b ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x637539b1 ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6da4f05c ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7b1b4470 ttm_bo_device_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x95611974 ttm_bo_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9785d90a ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9d8ec50a ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa143e628 ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa2e51597 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd9a84817 ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdc26294b ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe2dced54 ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf6c8a8a7 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x2dab22df i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xe2e92fea i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x112569e2 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xf123fd31 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xbce0a032 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xa9c912e0 amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x01249d12 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07f4e5db hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b34b71d hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0ca955f7 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1382c418 hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1dedcb6b hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x22f92e65 hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2b80eb83 hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2e1e7ef9 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x34c23c11 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x36935a88 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3c13512e hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3e46f083 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3f81f1cb hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ff84517 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40fb0798 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x43161303 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x447e5c3a hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a3c1e86 hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f656708 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51beae61 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54377909 hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x599e5fd5 hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x59df3263 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5a637000 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d2f0e53 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e8f28f4 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62f9a5a6 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x66efab5d hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b37a33f hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x70d29a02 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x70dbf56e hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7185f53f hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d662d3a hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8c028605 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f5c871d hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98fc6474 hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9ef9c161 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa222e8c7 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2d52d04 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa43436af hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7eec14d hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa99dad1b hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaf627d00 hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb64cb71c __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb73c0b24 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb7893e2e hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb879d1e2 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9146bb3 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbebee3a9 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc56f7860 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc6207ef2 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc6fede4d hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcbb875da hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0904348 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0e5041b hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd1680761 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf4ea4be hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe9ff2993 hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf11628cd hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf5e94962 hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf80b96f0 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc06d2d6 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6f540978 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf63fd480 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xfe4eeb7f ohci1394_stop_context +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x216766bd rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x74f77d43 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xd4a4d1e8 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xf194af41 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3415fa74 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3434f116 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3cbd888d ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x60fd5cc4 ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x61a3a2e6 ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x63ae52fb ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7432336d ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7d036b85 ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9e63ed67 ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa0733e74 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa65a7271 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xae705a0b ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb5225cec ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb97e346e ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbf6a5933 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xda06755b ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdd81b4a6 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x054d1786 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x087531b6 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09386d7c ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c56903c ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c6520b7 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x141d1451 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14877ca5 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x155a7bce ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1cae0700 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1fdccdb0 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x217863dc ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2415d8fd ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x24370f9d ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26d3a24f ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2782c6c7 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2aac33a1 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d7cefff ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3073df88 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31b04c7c ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x43183401 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x46861fcd ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47394b94 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48c710f6 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4a49861f ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ad88755 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4c289583 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4d41ded2 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4dd1acfc ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4de8b108 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4e314ea0 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4f2f02ac ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4fb9312b ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x515466e3 ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55f0f9cc ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68c6d3f1 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x743c7cdc ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74c341ea ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77623769 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c2321f9 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x839b2761 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b746d1b ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93b7ab54 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d10ee9a ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e14b688 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa04d2142 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa04df1c0 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa13425cf ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa6228435 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9e44ba1 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaf29eb82 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb6974885 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc185e6f5 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc67524e2 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc7348e54 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcc689790 ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2d9c51e ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd30e1eb1 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd4a1d69f ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd7f7b31b ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd868b5b0 ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9f9c3dc ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe10482bc ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xea7e0c63 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5aab954 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf826502d ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd1f7dd5 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x217c0ed0 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2873131f ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x33cdb7e3 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x41ede272 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x53f36a1c ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6260f8c6 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x78b18cb4 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc6f9edf0 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xcf62226f ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd4f12d84 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe81c60b7 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xeb107fe2 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3e762919 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d49a7df ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6e112f43 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x704b093e ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa981d435 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb632e922 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd6007859 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1ca168e4 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x25ec90ac iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x49c9e331 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x72ab7d98 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7a4c94f9 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa99437e0 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xab74165f iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xedbf3bc6 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1a815236 rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x25cba7cd rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x38c748bc rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3d56b7ca rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4a20c27e rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x64758e4e rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x81c833ff rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x869288d1 rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8d88a53b rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9cfae12a rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa345f949 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa6ff8902 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc06bbf14 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd1f85828 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd37536b9 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdd75c103 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe01f9c3f rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfbad45cb rdma_notify +EXPORT_SYMBOL drivers/input/gameport/gameport 0x1f730ceb gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x4b268560 gameport_start_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x51d1087c gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x64d1b009 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x69ead654 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x7f17430a gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xb25c8464 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0xc732859c gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0xd500facb __gameport_register_port +EXPORT_SYMBOL drivers/input/input-polldev 0x03a92d38 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x56c1ede2 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x9c94dc43 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xb8477f22 input_register_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x18e6a294 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x437d8e2d capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6322c8b2 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8ecce0b6 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x93626622 capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x994ec97c capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb3cd01aa capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xbd05b32f capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xca55854f detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcf637233 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1 capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf4200025 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x10aef3fd b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x1a2ae3d1 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x1fd720b3 b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x404e0fbf b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x518f48ac b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7ee42652 b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8040f5a2 b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x80527386 b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x987b2790 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9d4f3133 b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa42b7e70 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb05e2db0 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb97841b5 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xc848db1d avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xfe1a1adf b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x1e57b887 b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4216cee2 b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x7a2c5634 b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x7fb9c455 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xb5a31f8b b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xc76f0301 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xccb87518 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xd9f8e097 t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xf01628fc b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2e45ae1d proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x95a33b0e hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x04308cbf isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x5f180a6e isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x8050e0a1 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xe2971b2f isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xf5c3fd97 isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x1f8b9bde isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xbac19562 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xca4137b9 register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0957cd03 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0ea2a9b3 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x18f1e573 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1d32ab70 get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1f061223 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2042fb43 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x28f4b751 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x30e0bd35 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x32eb1120 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50d04b89 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x54d4fe29 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x73709049 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x746a73ee bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7ab90222 queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x865b6642 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x973026d2 recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb9513496 mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc895876a mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf16067e1 recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf21be4db confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfcebf27c mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x02c2f667 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x8d801c51 mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x960871b1 mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x43aeb10c mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x939dc891 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x0a8f5be5 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xe3e31d25 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xf45e9d89 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x01ed471b flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x07a0543b flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2171a648 flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x24d2d5a7 flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x464b7bdd flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4df387bc flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5437995a flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5fe31b4b flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7304688f flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x74a45a9a flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x76442d5f flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x929784d3 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x92e48cd3 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x946dce3b flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa58e20ee flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaf783a61 flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb398ef36 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb3a3be2e flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbfaf0c59 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf989038a flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x1c0e01a4 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x8a0b2010 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xc6a8bec2 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd2d7253a bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x1a8a13ae write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x2c96d5d3 dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x31e9a571 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x42f72fce rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4af6ad82 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x732f1f38 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa690b343 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xab12ac89 dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf1359cb0 dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x9331b839 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00b23d57 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0376f954 dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x05a5f881 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1ad05c87 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1b103b91 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x24ecbcaf dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2eeb6642 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3184a838 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x37008fa8 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4c1bffe3 dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x54715be9 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5fbdbf0d dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x66d9427d dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3 dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7ac174aa dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7e2e1885 dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x804a6984 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x97e53939 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9b9bf635 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb8e2c05c dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc1c8bfd4 dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcd200d2f dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd0d2f820 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd5269fef dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf8339d5b dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfc848d98 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x28a212a6 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x3a82500f usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x579e54b4 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6516bb26 dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xeda89b02 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xf19ea7be dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x82e4b6d7 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x026c8863 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2c587b68 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3c0fd95d dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4a659dd1 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x562adcd0 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x82c97386 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9e835455 dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb5339fdd dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd60c2345 dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xdc12dce6 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf0f35871 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x2fb5de6f af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x4c976afc au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xb7b22131 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xd7bab76a cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x44d9f552 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x250b65a5 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x3aa4479c cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x70757c41 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xb12c152f cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x0fe529b8 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x6c0bc8b0 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x23ba7791 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xb1be0617 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xcb1a1b1a dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x0e432bfa dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6071b46c dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x69bea1f7 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb420821a dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbc9489a3 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xf5bf7de7 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x571e50cc dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x7f0e7260 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x1165bcae dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x397b939c dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x43ac937d dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x62ea88a0 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x9ff663b6 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xbcfec3cd dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1159c119 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x29ec0a1f dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x40dfac0b dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xb3070e47 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x13e1d001 isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x9af87c62 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x50f952e3 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xe54f8bee l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x898f6f4d lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x2110482c lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x297b044a lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x94d9f603 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x9e54ef11 lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xe707736b mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x841ccfb8 mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xf5e01bb1 nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x3aa00a1f nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xe5a9b0f0 or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xb1faf06c or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x433186d2 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x48159017 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xb256e295 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xb55a4a46 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x4a0558f9 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xaf04914c sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x798cd930 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x2fb2636a stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x134cee44 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x8729395d stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xe5f6d3f3 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xbe955a80 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x237b783c stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x3841ee51 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xd51131c8 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x4a1de4af tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x9fa2218c tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x28dcba63 tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x1087d7cb tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x1a3c22ab tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x0ef6f6dc tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xf87cbe5f tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x075e3762 tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x97967c3e tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xc840cd3a tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xf5d31943 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x268a9dca ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x019e975e zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x9e76924f zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xe93e1406 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xdd1bd019 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xf6dcd1d3 ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x4c342021 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x980f7728 bttv_sub_register +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xe86834db bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x159404eb btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcd46e8d0 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x7cc14ed6 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0xfe250031 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x2113cbdb cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x532e7fe2 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x2a915e51 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xf8484ca8 vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x2a288764 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x2c2da157 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3e625abc cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x574d5ffa cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb8bad695 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xd61e1b07 cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x060ec74b cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x72f04ea0 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x7b27e98c cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xc2e94dff cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xe4a174e5 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf1993c14 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xfe3aff91 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0a431a88 cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x216d9884 cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x218a960c cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x28cdcff2 cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x32292aa8 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3eaf323e cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x49b2da79 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x63b8247f cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x699ee8c0 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6e62c883 cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x84f2b6c3 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8bb50218 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x95131f1d cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x99f65a15 cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9bf470ae cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9fc601c0 cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb2249d6e cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb8b5a061 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdb04f0e7 cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe0e44130 cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfd54659e cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfdd13fd3 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x99ec6b2a em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xa2110322 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x24408224 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x31bca442 gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6a82063e gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8e0fa864 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa537f7c2 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xad441c1f gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc502dbc8 gspca_resume +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x01ca13ee ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x1d2a23b8 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x32baff7b ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x36d44ae5 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7a37e9c8 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x954aa4f4 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9bad2ab8 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9f80c8ed ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xabcc8311 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xcb4d3479 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf2084a7e ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1eda8ce5 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x35f5c3c8 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x392a04ae saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4241cc25 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x44934067 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x640b7049 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6ea0f0c7 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc0fa17d4 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xcfc95cfa saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xda3160fe saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe5b408d2 saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfeb8511d saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x012863a1 soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0x147d5d42 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x3bc43c5a soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x59af65be soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x69daa51b soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x7cfdbfc6 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x8abdff54 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdeb450d4 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe9c1a845 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/tveeprom 0x5a6fcf5c tveeprom_read +EXPORT_SYMBOL drivers/media/video/tveeprom 0xd61de7c4 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x30b9d92e usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x6b928950 usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x6f335a82 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x7595492d usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9452f943 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xe8224297 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x25564c1c v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x3d24236b v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x963181d7 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x36fb6564 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4a9d3902 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6d9cb3c3 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7950edb6 videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa2a254ac videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa546228d videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x0b95fe8e video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x2f8ddb49 video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x3b34b96f video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x5b22475f video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x685d1476 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x95445b48 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xbee3b689 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0xd0f740ff video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xd17f106e video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x0d64b18f videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x19339a6b videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x52854cdc videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xc034cbd5 videocodec_unregister +EXPORT_SYMBOL drivers/memstick/core/memstick 0x05bf8f6f memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x0b3e9802 memstick_suspend_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x418c80cf memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b5c17c8 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x635fc59f memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x798b39b1 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c9b5da4 memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x94f2c456 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xdac17c8c memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0xdc9f34b7 memstick_detect_change +EXPORT_SYMBOL drivers/memstick/core/memstick 0xe667f8d4 memstick_next_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xe87da5b1 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0xe95f30a0 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0xfe91d9f2 memstick_free_host +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0010600e mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x067d0e6a mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x19faacca mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x20420826 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x36b86ad3 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3e68b33d mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4551d469 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x557d03ca mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7f0d8301 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x89289030 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8dd4a8df mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9136cc68 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9d8bebac mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9f985f38 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa153b410 mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa76e01b2 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xacee2e22 mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb0c10e2e mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb5b03e9c mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xba1bc6a9 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbee65416 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc5f67754 mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd746140e mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd84fb986 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe2e6a509 mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeb2a275a mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xee20fede mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfb3541d3 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x025defaf mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x04e485cb mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x13436292 mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x14b76ddb mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x18cfc58e mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x26981317 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2bbea8dd mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x42537342 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x49d8ab81 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4be2e117 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4dd8dff0 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x57aa06b3 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x61b03219 mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x69bdf721 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8876628f mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8b4b69c4 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x927c2ea8 mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9cf6e6d4 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa0c9ca29 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc4190824 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc60bba1c mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xed62361d mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xef482b4d mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf04e2f9e mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf1803066 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfd189f78 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x10c7dcb5 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5be7bf89 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63148e1b i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7707b8c8 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7875d6f7 i2o_msg_get_wait +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9600fcf6 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99c7eb59 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa6c36cee i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaeb51264 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb90d691a i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbef19807 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd0260cf9 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd20ea99a i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd3675b12 i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd9c6e6cc i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdc5ce274 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xed095d87 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf90a5311 i2o_driver_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0d1a2271 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x20d9d962 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3eccc4ed ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x583e755b ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x82f2433e ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9fdfbefa ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb3b3886a ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe79964d2 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x1bf84cec pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x43769c18 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x500a1a87 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xf288ccd4 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x3550e53a c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0x861a8e85 c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x0d32a923 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0x455c99c7 ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x0d0e4a9c tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x56249e04 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x81453047 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0x8bf0c8b7 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x8d57541f tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x8e1627cd tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x988ce52e tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xb384d14f tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0xb87464bc tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0xd3abf536 tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0xf6e2f021 tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xff0be51b tifm_alloc_adapter +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x0329e86d mmc_cleanup_queue +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x9e593de8 cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xbaba92b2 cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xe7981301 cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x096bcb58 do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x44042cd2 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4d9dbfdf register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xd78f6c1b unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x0c1da050 mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x9c2635de lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x35d0d222 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x2501e9af add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xf6a97b97 del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x48601683 mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x4cbb7cea mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/nand/nand 0x146ac6d7 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0x2fdb0953 nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x042be169 nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xa7e19087 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x24f415b7 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa8c2aa73 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa8d51979 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xbf8a64ee flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x188028fe NS8390_init +EXPORT_SYMBOL drivers/net/8390 0x3197ce08 ei_open +EXPORT_SYMBOL drivers/net/8390 0x498b5b4e ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x4edf4d4b ei_close +EXPORT_SYMBOL drivers/net/8390 0x529d82d2 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x6f14c609 ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0x7cf59b5f __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0x7cfab3db ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xa5794163 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0xab599382 ei_poll +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390p 0x0e36ef84 eip_set_multicast_list +EXPORT_SYMBOL drivers/net/8390p 0x2234aeef eip_tx_timeout +EXPORT_SYMBOL drivers/net/8390p 0x2d14a21c eip_get_stats +EXPORT_SYMBOL drivers/net/8390p 0x38e748dd __alloc_eip_netdev +EXPORT_SYMBOL drivers/net/8390p 0x396b7e1c eip_open +EXPORT_SYMBOL drivers/net/8390p 0x540d6586 eip_close +EXPORT_SYMBOL drivers/net/8390p 0x60a0be9d NS8390p_init +EXPORT_SYMBOL drivers/net/8390p 0x895cfe5b eip_start_xmit +EXPORT_SYMBOL drivers/net/8390p 0xa4fa7e73 eip_netdev_ops +EXPORT_SYMBOL drivers/net/8390p 0xb663e226 eip_interrupt +EXPORT_SYMBOL drivers/net/8390p 0xe7a4b4ab eip_poll +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1774f148 arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x516e6bec arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5e40272c arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x978b809d arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbb5c060b arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xcfd8514f alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xdf6e621b arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe4f99046 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe8aa9b60 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xeed52529 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x2e65d422 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xb648781f com20020_check +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xd9ef3f33 com20020_found +EXPORT_SYMBOL drivers/net/bnx2 0xaed750e5 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x466acc16 cnic_register_driver +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x414894dd cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x543e439e cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5a43836c cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6bc2387c cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7683dd01 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x77662b0f cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7a41eb70 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8e74f708 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9342cd9d cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9939d195 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9d46a640 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa0be0338 t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc2fa69a9 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc6755637 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xdcab47e1 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf8bb7115 t3_l2e_free +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x2f6f8504 hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x45d63737 hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x5f55cadc hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x824d723d hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe8bf6964 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0466017a sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x04f0d3d4 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0f253094 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x17bd16c5 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2564c6af sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x39e31766 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xacb11c3b sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc79d3cec sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xca674835 sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xe4d2f660 sirdev_raw_read +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x1d128859 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0x5383291c mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x610093c1 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x6dcdaa3c mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0x6e4a61bd mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xaa571ece mii_check_link +EXPORT_SYMBOL drivers/net/mii 0xba55ed07 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0xf62246d9 generic_mii_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xb0e1c2c4 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xb7e79d9b pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xfb96501a pppox_unbind_sock +EXPORT_SYMBOL drivers/net/sungem_phy 0xe1c4ef26 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x3649a0e2 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x9c45ad62 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xa0b3c540 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xb892da48 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xfcc25d5f tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x0ac67324 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x40be5b6b register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x46306401 hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x465c3e48 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x52f74e72 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0x537e7c19 hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8271411d unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8910b46f attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9613428e detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xecb29141 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0xfe6b8fc2 hdlc_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x03f42028 z8530_shutdown +EXPORT_SYMBOL drivers/net/wan/z85230 0x08e3346c z8530_nop +EXPORT_SYMBOL drivers/net/wan/z85230 0x0c847ae3 z8530_sync_txdma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988 z8530_dead_port +EXPORT_SYMBOL drivers/net/wan/z85230 0x1bca9a62 z8530_sync_dma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6 z8530_interrupt +EXPORT_SYMBOL drivers/net/wan/z85230 0x3adfedfe z8530_sync_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x3d4d55b3 z8530_sync_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x535210f5 z8530_describe +EXPORT_SYMBOL drivers/net/wan/z85230 0x5bec0b5d z8530_null_rx +EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29 z8530_hdlc_kilostream +EXPORT_SYMBOL drivers/net/wan/z85230 0x6590be19 z8530_sync_txdma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x678f002a z8530_init +EXPORT_SYMBOL drivers/net/wan/z85230 0x82ee7d55 z8530_queue_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x8d8ec8ce z8530_sync +EXPORT_SYMBOL drivers/net/wan/z85230 0x9cce7c87 z8530_sync_dma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0xaecb2e2f z8530_channel_load +EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064 z8530_hdlc_kilostream_85230 +EXPORT_SYMBOL drivers/net/wireless/airo 0x6c3c11c2 init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xad9ea60a stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xbac9f981 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x7133f317 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x86ef1588 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x328c52b7 atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0x6bc05434 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xfdbb9065 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x05986ff4 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0b6be22f hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x14ecb3b2 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x17ad4c9c hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x198cdf6d hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1c1c485a hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x21175491 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x28b038bf hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2db33bf8 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x361fd78d hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5acb0efd hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5c4b4615 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5e979ef7 hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x60ce094f hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x60d89619 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7b3bd5b1 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x86b165e1 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x988a08b8 hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa266c970 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc40bbe0f hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe1116a2a hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf1eaf124 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf3cbae08 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf7ede91e hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xffd30f59 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x173f40da ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x247545b7 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x269c3684 ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2ccaa5fe ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x32ec8f55 ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5853f2ec ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x70e9ab1c ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x82849cf7 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8427ff4a free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8d48a03c alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa84beb2e ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc2a1adbd ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc3f90e0a ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc43856de ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd8c2f229 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdbbe3a4c ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe6800b69 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xef0643b3 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2d78673 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf7269af7 ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfa8a7315 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x004c7550 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01e1664b iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04274303 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05d34639 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x069f3bb5 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x075971c4 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x084f3a6c iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bdfb92b iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1017e466 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12dbeff0 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x13c9fe60 iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x140b89d0 iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14c702b3 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14dd940c iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15349403 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18765bf4 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19301ba0 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a7de33e iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1bf08b6c iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1db008da iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2028f9e2 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x209b14b2 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x219ffdcf iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x23c409c5 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2492b763 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2511b6ac iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x257a6fbc iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x285c16a1 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ecb050d iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2f74436c iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2fc3ada3 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3358bc1f iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33ded5c8 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33f4d9cc iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3635b3fc iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36725bd8 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x386e92d8 iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b89654a iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3befb52c iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f8f76ab iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x40b0f379 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4227e6e7 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x430a5df8 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x443defcb iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x45596d8b iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4606dc72 iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x485bf1ff iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x486289e4 iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4bbc0e8f iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cf81089 iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e9d595b iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eb0671b iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ff3e2b3 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5041f578 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5073e113 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56d4a04a iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58bbb4d6 iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5968a5ef iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b3de7e8 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c66323a iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f369033 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x601bc3d9 iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6485aac8 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6959eb9d iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69e10635 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6dc3f9f6 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72ace67d iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72f36f1c iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x738372b6 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x73c5be6e iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7792b4f5 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79eac7e9 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a2b3567 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a724cda iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d612b3e iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d8e2d9e iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7e08b53e iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ebb8750 iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x825705f7 iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83029116 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x841bd26f iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x87ffbec7 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ec5bc79 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x937fb170 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x957d987d iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x966af526 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97656d96 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97dd34cf iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x99e96da8 iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9eba6694 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa370f48e iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3fd92e8 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8180125 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8f0ed4a iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xabb1efa5 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb2dbe31f iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb476cd02 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb569f7a7 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6f15628 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb814f620 iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd4e607d iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbdfab470 iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc079d6fc iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc251da0e iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc464ae44 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc5f528c6 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc5fd4991 iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6808ef6 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc73d11cb iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca122d61 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb2ec209 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbcbca5e iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcc48fa5f iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf292322 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd336f84f iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4079609 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd43dfec4 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7b534cf iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbc3f49a iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdde4b704 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdeaaf9ae iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf381905 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2f411b0 iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3a6bce9 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe5723a5d iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe72e0ce9 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeab19583 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebf25845 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec0f39b9 iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xecc6d88b iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf21c9569 iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf705807d iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8f74612 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa9b3063 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfaa48615 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfbf3b30d iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd553cb2 iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe7a608b iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff370e58 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x05752bcb __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x51e6879b alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa1ada057 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xbe320353 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xcae8719d free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x0ee9a05a parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x0f5cb4b3 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x12a200a3 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x1792eafb parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x19c2731e parport_release +EXPORT_SYMBOL drivers/parport/parport 0x20a62d2d parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x285c73c5 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x2a23dd27 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x2aabd808 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x334f356b parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x3840caf5 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x503ec044 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0x52bc4818 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x5391bad4 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x552380f6 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x56b1b81b parport_read +EXPORT_SYMBOL drivers/parport/parport 0x60adfb3e parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x6ff751e1 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x76c73bab parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0x7cd12380 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0x8623e91c parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0x8b81c388 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x8dff69f1 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x918c95ff parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0x9e289587 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xa79b0961 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0xbe775af4 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xd22ec8b3 parport_write +EXPORT_SYMBOL drivers/parport/parport 0xde1da7a4 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xe5e0d595 parport_put_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x748084ce parport_pc_unregister_port +EXPORT_SYMBOL drivers/parport/parport_pc 0xa0db5d02 parport_pc_probe_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0ed9efdb pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1f104669 pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2c5390b6 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x408741e7 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5ee4153f pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x771c311b pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7907f902 pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x84f0cfdc pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8b2f07b3 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9280f9b4 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa8b5f49d pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb5df1c05 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb60129b9 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd41aecd9 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd6ca0f95 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0dfeaf2a pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x140bfb57 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x16ca3d38 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f573b21 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x214a696c pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x244e7265 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x25245375 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x27497914 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2a851d0b pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x30bcac25 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33e23699 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x34316d3b pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x35b4c246 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x42447d02 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4bb040bd destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4db00ea3 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x52c542ea pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7300e37f pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x88e26356 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x986fec38 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x996169d1 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x99a6a658 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa4ae6a7e pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xabfd1b32 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb1f63a8b pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbb3f7b61 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc368f687 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd4287c54 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdfbfe8c3 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe45dbe36 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe8f47fc9 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xecaa2466 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfc3e6608 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xe395b3b0 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0x2e8d4d43 pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/53c700 0x8ffd1bab NCR_700_detect +EXPORT_SYMBOL drivers/scsi/53c700 0xb9701ec2 NCR_700_release +EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc NCR_700_intr +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x15461c61 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4df85a62 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x7a25fdd8 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8e6ba91b fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xa6eda0b7 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xac243385 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbcdb532b fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x03278b6a fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0421f307 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05fed000 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0ac0e07c fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1a48a947 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x248e583a fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x255a102c fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2c4b594d fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3a509573 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3a8eed1e fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3eedd37a fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x43e72a36 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4a462928 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4b152478 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51710cc5 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5f2dc043 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x683ca23b fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6a84ec36 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6b5c48be fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6bf2296e fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6f7df9e3 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x78f9d685 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7b77ab34 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7febe045 fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x85ff8fcd fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x87d4145e __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9324bb42 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9380937b fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ba6ef91 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9c327090 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaabaf16a fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaad09858 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb9db85e4 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcd1595e3 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xce8d8dfc fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcea3b2c4 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2b50a1b fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc1cce44 fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xde2c831e fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe08b5095 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xec97f4e6 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x99a54d38 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x00a5f135 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x019afebe osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12f44430 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x16928f5a osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x17f069a7 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x26d67c56 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x35867ef4 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3842c9e8 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3ee66a67 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x40a64549 osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44339664 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x49d6c6a8 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4ee17ca8 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x50f43cce osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x56eed5e1 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x57ef5f44 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x62e5dbb0 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6af3a588 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6f7dc1c4 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x71e30a9c osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x767caa6b osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x79fbbf2f osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa6140cb4 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa732a264 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb49ae7be osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6179616 osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbdb388f5 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc6cd563b osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd4d1651f osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd946f305 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdfd34b84 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf5518af1 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/osd 0x35f78b53 osduld_register_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0x78222216 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0xc224c228 osduld_put_device +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3a1fa457 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x4d4b7594 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xa8943d88 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xbeb68e86 qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc4836ae5 qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc5d20f13 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x1144ca4e raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0x609f19ae raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0x7493bc7e raid_class_release +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x007db12c scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x05475ecb fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0ab43abe fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1d653a91 fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4fb228bd scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x587e1ba8 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5ce2fd56 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6ed1e3f6 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa7676ad1 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf772d1de fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfc9e602f fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xffd38e18 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x042a0e7b sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x23bf6ad6 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x27668292 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2b0dd9ff sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x321fe2a0 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3bd28341 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3d6bd915 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x404479b0 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4aefe80f sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4d0bb6a2 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4f0a5595 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4f6cb57a scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x70eb16ee sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x83282229 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8c407679 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x97b499ec sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x98b20740 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9c0282e1 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa1f7b756 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa35ec88d sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xac31c936 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb88bbc39 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbde2e3e8 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbffeda22 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xca8ab4ea sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcbef1982 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x0ded3be4 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x749cd8d4 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x904ef61e spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xbd36859c spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xec4a2c6f spi_release_transport +EXPORT_SYMBOL drivers/ssb/ssb 0x1c5d0395 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x2129c2c5 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x2737b229 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x2e93618c __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x4ea19e57 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x60858917 ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x62a4ead6 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x798efbbd ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x9e617d18 ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xa65bb086 ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0xad7c2655 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0xb9b92f69 ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc397bdf4 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0xd095b371 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xee14c0c2 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xf5bed1df ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xf662dcfa ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xf732301b ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xf7b648fa ssb_dma_translation +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x02ceddaa comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1f45052f check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2a1c503d comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3abc74de comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4434abbd comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x54436a9b comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5a93f587 comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x64a65a47 comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6df090a4 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x97412e26 comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x98ed81a5 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x99be8c8a comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9d1aab75 comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa31991b9 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa59a36af comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe4398144 comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xef6d5511 comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x086ab627 subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x8737b02e subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xd0c68403 subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xfe9ebd7a subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x7dbda515 cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x8bd4ea86 cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xe8a9863f cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0a2203ec mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x27d1e3c1 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x3f3cb996 mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5b9c6223 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5ff8e65d mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x61d267e3 mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6984b2f4 mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x82f858c1 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x94a5ed63 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9a466c63 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb095a728 mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb74bbec8 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb960c380 mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc41164ce mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc4d87c26 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcee3c67 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdd6f541f mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe25fc9b6 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xf4027c14 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfc948d60 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x91549e0c subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x9282910c subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xc01f12f6 subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xd4e0195d subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x58050564 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x0d807f02 go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x18d7d6de go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x394bcc44 go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x52674435 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x94cc2008 go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x982408e8 go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x9b195dbf go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xe89f4b37 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xecfed120 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x27a2a949 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x33375358 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x6a411455 pod_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xd8a11542 variax_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0xca291d58 me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0x6e9f4fe0 me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0x0ac9c7a3 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0x5b570de7 me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0x172baea6 me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x5f673333 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0xdb8755ab me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x4a7ce75b me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0xa93550f9 me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0xb9e919d4 medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0193e7b7 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x05a704a4 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0a05e2fc ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0fd021cc ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x106a5818 ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x11acd748 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x21d2f340 ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x229f929c ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x28235356 ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x283884d6 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2c8cd277 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2ce4f359 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x311811c4 ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x33ca2378 ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x356b2180 ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3920698e ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3e42fadd ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3edcfeaf Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x40d141d6 ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x43e2e506 ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x484d2ec0 free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x494fbc1a Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4ebbb005 ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x59129289 ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x5ea8a446 ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x673b446b ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6928962e ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6b7c734a ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6e0f7689 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x71cc2e06 DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7545a1fd DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7747297e ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x788246eb ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7c2183c6 ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7d8419b5 ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x85775c77 Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x91a0b6cf ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x957e493c ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9acb484f IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa4ff3a1b ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xa730fb81 ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xaeade10a HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb8e4902a ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbd0c087e ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbf53b411 notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc6f81206 RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc8a2a9ba ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xca6e2ed1 ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcbac4480 SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcd4d6e42 alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xdd0e1243 ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe0707f22 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe1b9a29f ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe5a0a59b ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe962e7d3 ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xebfe5a01 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xef34728a ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xefedee59 ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf50b472e ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf55bc86e ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x446f6be0 ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x71fd4aab ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x73dc0d88 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x7f151555 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xd64e624c ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0xdc3719a2 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x6ae3a51f phone_unregister_device +EXPORT_SYMBOL drivers/telephony/phonedev 0x7fc98624 phone_register_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x2c812153 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xa28e3d91 net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xbb64f1fb usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x29ccd947 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x0857232c usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x4f456d30 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x5c8beec8 lcd_device_register +EXPORT_SYMBOL drivers/video/backlight/lcd 0xcd934d0c lcd_device_unregister +EXPORT_SYMBOL drivers/video/console/bitblit 0x4df27e48 fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0xf9bc3ebd soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0xa7049091 fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0ec65f42 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x340f59ad cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0x3533aeed cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x6160d0b4 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/display/display 0xd232c3fd display_device_register +EXPORT_SYMBOL drivers/video/display/display 0xe5a33d86 display_device_unregister +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x6c68445e mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x0d8324fe matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x8f078d89 g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xab9baa34 matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x268be90d DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x28852cbf matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x3f637caf DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xdd70e40b matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x174f0c9b matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x94b3baf4 matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x26a1a0e8 matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x50a484b4 matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x7b5a34dc matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x7f0de83a matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x0af33329 matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xe1fa38b0 matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x06412022 matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x10dfa564 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x63eac82e matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x67c686f7 matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xbc43099d matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/output 0x5833c224 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0x6dcd2786 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x1d0ef2fd svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x4f4adaf7 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x5037c9e0 svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xae0f490e svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0xcb56a885 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xde213318 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xf27731c3 svga_tileblit +EXPORT_SYMBOL drivers/video/syscopyarea 0x7102f14a sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x8fdfb380 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x48f5d43d sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x0663f4c1 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x945c248c w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x16f309f7 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x20ebac1b w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x3300be2f w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x63c41346 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x050da27f w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0x2cf8de7f w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0x3fe9fd40 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0x88308237 w1_unregister_family +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x0d60e463 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x25f5414f config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x4a11553e config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x89778b05 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8dabcfb6 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x910336d8 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xa71e816b config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xcd26529c configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xd8803704 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xea9e5fcd config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xec6e0db3 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xfca89c17 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x02104ea5 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x08e184e0 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x1b4101d0 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x227c05c8 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x2c976e1a __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x2e889874 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x30b6ec3a fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x4389c3c3 fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x46edc4a2 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x47c4bccb __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x51bfcb02 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x55274197 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x763196ba __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8b8ea8de fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x9188d17b fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x9244505f __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x969e5085 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbcc8ad4d __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xbcd6553f fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xd5b62d2d __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xdbf0eb43 __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xdfb9a18b __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0xe532b28c fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0xf12ec7da __fscache_acquire_cookie +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x1315b1a1 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x40aef856 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4f21fbe5 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x665f27a7 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x9e298c54 qtree_delete_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x95fb0193 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0xc44dfbd2 make_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0088f167 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x1a761dc5 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x27ce4418 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x2efe05c8 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x3455711e p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x62121145 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x6e5846ff p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x71bc0e66 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x72e044fe p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x784e1a37 p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0x80e66454 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x8b53fe9e p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x90a7ae55 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa17f04d0 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xaab8671a p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0xaeb2e11c v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0xb1b5465d p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0xb95071b8 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xc411294a p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xcae61af3 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xd4c36327 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xef7127b0 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0xf11b003c v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0xf9103593 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0xfb32a175 p9_client_destroy +EXPORT_SYMBOL net/appletalk/appletalk 0x117faa9d alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x9622f4de atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0xa6bbcd15 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xa74639b3 aarp_send_ddp +EXPORT_SYMBOL net/atm/atm 0x0cf81490 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x19cb4602 atm_charge +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2c3a8d37 vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x38cd0783 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x39aa90b0 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x419a33fe register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x43f637d1 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x4f577414 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0xb41e980c atm_dev_register +EXPORT_SYMBOL net/atm/atm 0xb81fccda atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/atm/atm 0xfa579c45 deregister_atm_ioctl +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x2470bd2a ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x279024e3 ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x58149504 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x79645a2c ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0x96a4bb37 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x9cda6bea ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xb6cb25ce ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xc6d36445 ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xfbe12ac5 ax25_listen_register +EXPORT_SYMBOL net/bridge/bridge 0xc154e056 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x000ddcf0 ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x54b6ae91 ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xe6a7f716 ebt_register_table +EXPORT_SYMBOL net/can/can 0x4358c083 can_rx_register +EXPORT_SYMBOL net/can/can 0x67bc09a4 can_send +EXPORT_SYMBOL net/can/can 0x7b7c007c can_proto_unregister +EXPORT_SYMBOL net/can/can 0xa5c28cc2 can_proto_register +EXPORT_SYMBOL net/can/can 0xb58f98f2 can_rx_unregister +EXPORT_SYMBOL net/ieee802154/nl802154 0x429953f3 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x4f74193e ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x5b91695f ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x6eae92c9 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x707c5004 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xcae99b8f ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x8f753533 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xa98d7b79 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xc451e97f arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0bbecffe ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x45177086 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x4e0b99ca ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x04506a3c nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x06e98ded nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x2d524a38 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x80578449 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x92eec6a0 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd1909ed5 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xf75dcced nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/tunnel4 0xb9054478 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0xc662ce16 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x36d605b7 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x79c1c737 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf8f5c3d7 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xfaf7082b ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x4e52cb1f xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/tunnel6 0x5da13fe4 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3ce668a4 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x73331c2a ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x83f4112f ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8e2b4f34 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x946be3a9 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x978f114b ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa20847f7 ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xfa29b747 ircomm_flow_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07849a6c proc_irda +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x13214083 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x1e04ddcc irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x25d6bdfe irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0x279e95fe irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x31c29801 async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3ccd4f0d irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x48275188 irlap_open +EXPORT_SYMBOL net/irda/irda 0x494d4afb irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0x61ef8a31 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x64f6f179 iriap_close +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x6f6573c0 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x73766c7d irttp_dup +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x79354687 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x9380fea1 alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9a3ba4fa irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0x9b7e836a irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x9c03c1c7 irlap_close +EXPORT_SYMBOL net/irda/irda 0xa3f41823 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xb11576e6 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xc9831932 iriap_open +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd7f5203d irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xe71f7463 irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xed0540f0 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf39b7fe0 irda_setup_dma +EXPORT_SYMBOL net/irda/irda 0xf6a343f6 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0xfbbbc177 irlmp_close_lsap +EXPORT_SYMBOL net/lapb/lapb 0x1bc6a101 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0x1eb34c27 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x66dd347b lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x788a0f0e lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0x8be7a9bb lapb_register +EXPORT_SYMBOL net/lapb/lapb 0xa54cf41f lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0xc6c5f555 lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0xcf1b0c8b lapb_data_received +EXPORT_SYMBOL net/mac80211/mac80211 0x128ab87f __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x12bb4bd8 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x19defce5 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x23d15274 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x2464e988 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x27fbcc5b ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x28590a78 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x2ae477ae ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x40e5d5d5 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x474483d6 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x478de891 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x58daf12f __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x5e4eca78 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x614956c0 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x657e0e79 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x6c05224b __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x705997f2 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x76dcdd12 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x7d9cd985 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x7f62c13c __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x8008fe9e ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x869a297d ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x8a0ceffd ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x9ac19771 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0x9d37c47f ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xa9c10246 ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xb68f766f ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xbe41c60e ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xd544d3c4 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xd60afc19 ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xdcd406ac ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xeac463de ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xebd08d70 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0xee09604f ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xf4db16aa ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xf72d20c8 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xfd741568 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x188a5e4a register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x25808529 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x27905c62 unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x43a7ae22 unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xaa43b0a6 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xab7cc25c register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb80df773 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc6f5464c ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xcd3ee827 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd0b8b3ee register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe526a038 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4de988a __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0xeb845414 __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x0fe767af nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x062cf6e1 xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x0a9e1928 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x2b80bba9 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x46ceb5d3 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x83f5f277 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xca67f3f3 xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0xd5a6e348 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xda2615b3 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xf4a3d05b xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xf6a8fa2b xt_unregister_match +EXPORT_SYMBOL net/phonet/phonet 0x226db51d phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0x384969d3 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0x4c3bff07 pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0x54edd1c6 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x7810ff96 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x836ba1a3 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0xc497f500 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0xfa501ad9 phonet_proto_unregister +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x03435b6f rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x070d6832 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0feca53c rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x208efcf0 rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3d053888 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4648f24f key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x59735934 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x748bd218 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8b1364f3 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9077d2fc rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa0e1ee51 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb67db615 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdbe4928c rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe6bbff2c rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe9dde9a1 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/sunrpc/sunrpc 0x9816ce3c svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3c3a19f9 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x4cef1c7f tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x59c40776 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x7243a43d tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x865d8f17 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x8ffacb47 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xabc0cbea tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xbff11ef5 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe0ce5eac tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xf4ba9d41 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0xfa33f8c7 tipc_forward_buf2name +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x9be42d97 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x2228f49f wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xd0e0e84d wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x0718d211 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0a13c0b4 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x0e0429fc cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x1055129d regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x10c6417d ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x20ae49b1 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x2278a6d8 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x2b849cb7 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x33a63f42 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x42871a05 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x45e31736 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5dcf7154 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x681c8c8a cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x707cb530 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x87a034d0 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x8b1a71e0 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x9286bcfc cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x936ef7de cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x9f96e8f0 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0xa37ac649 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0xaa325fa5 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xaf61e073 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xb9225c03 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0xbbab0697 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xc10fe45f ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xc1b1e317 ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd36fc5e0 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0xd855f874 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xda1fcbda cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xe1186357 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a3fd1da lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x4871de03 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x4c63bb1e lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x68a46f1b lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6f996aef lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x7e6aebe3 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xad046d68 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xed5a0aed lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x1dee40c8 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x31ff745c snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x24d5ab09 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x86ff3219 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe5237bf6 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xf1b85ca0 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x95bcd64b snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xd13f60bf snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x06602085 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x080a697c snd_cards +EXPORT_SYMBOL sound/core/snd 0x0847106d snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x0b424aac snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x11ef56a1 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x2b69d8c9 snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x32348af7 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x3b33bffb snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x3de4a3b8 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x43106422 snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x442bfe18 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x44505391 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x4620b44d snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x530334c1 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0x5d18e439 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x6072e669 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x60d5bcc4 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x64a4908b snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0x68b36480 snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x708c9fc4 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x73e0de8a snd_card_register +EXPORT_SYMBOL sound/core/snd 0x7421f1fb snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0x7443303f snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x79e25c96 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x7a1a0576 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x8623cfd5 snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x8bb7e6b5 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f3cf134 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x9972fe64 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x9ef2f2b0 snd_device_free +EXPORT_SYMBOL sound/core/snd 0xa610eebf snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0xaa2cd5b8 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0xb0038b8f snd_component_add +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb3904a6d snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0xb817e6ff snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0xb8f31c77 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0xbab447ab snd_card_free +EXPORT_SYMBOL sound/core/snd 0xbe5596c3 snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0xbe86a154 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xd1157735 release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0xd150fd22 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0xd7b855ab snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0xd86c6546 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xee7b7f26 snd_device_new +EXPORT_SYMBOL sound/core/snd 0xf0c2fbfd snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xf7b8c21e snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0xffe55cbd snd_info_free_entry +EXPORT_SYMBOL sound/core/snd-hwdep 0x24f679a0 snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3562dd50 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x536388e3 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb7194f7d snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb8d82f9f snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xfb82c253 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x04e309bb snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x0b92867e snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x0d91b971 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x2182181a snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0x2521788b snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x341eb614 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x39de89f8 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x49315bca snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x62ee91e6 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x686dc5f8 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x695c61a1 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef057df snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x741fe84f snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0x7a065e81 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x7caa6e0d snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x7d93327a snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x81931115 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8b8e78c9 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x8c813579 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0x917f13a4 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x9f1ddfc0 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x9f372bd9 snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xa0268b65 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xa06ff055 snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xa7b94869 snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0xa8a05d04 snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xba68b8c8 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd2af10b6 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0xd4803929 snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0xd4c74973 snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xd77dec1d snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0xd8a534ca snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0xdbeba216 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xec299add snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0xeed76bfb snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xf3d796b9 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xf4692a35 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0xf629f58f snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xfe4bb8c6 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-rawmidi 0x00ee1ca1 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0897e7fb snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x16528641 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x1999c9f7 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x22201bea snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x22735cad snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x27df65ab snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0x2dd0f31b snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4a93b86d snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4e75ea7e snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x531ea7f0 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb14d21e3 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xcd75e4aa snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd27ac764 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xdd7382e4 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe3f2a3cf snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe86d71f0 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-timer 0x08a03cd7 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x1cbd08c7 snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x3e3462b0 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0x4d0f17da snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x5aced984 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0x90f3d313 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0xcdcb21b9 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0xd04f5644 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xd893682b snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0xdb33608a snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0xdb4e8909 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xdccdee57 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xed7c731f snd_timer_interrupt +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x7148560d snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x216c0da5 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x385f68a1 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3dbb29b0 snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6c3addf0 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x701235fa snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8664ba2b snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x97097369 snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9939385b snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa2d3b810 snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x0c99db41 snd_opl4_write +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x29d6f80d snd_opl4_write_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x36b3fe7f snd_opl4_create +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x6203b2f2 snd_opl4_read +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xf47345bc snd_opl4_read_memory +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0f2f49a7 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x97fc56fc snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb05d71e6 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb2e216d0 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb3579483 snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcad8d4ad snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd96b4b0d snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xdf850f08 snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xe588f277 snd_vx_free_firmware +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x748a0028 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x98db209e snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9f045859 snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa95a6dec snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xd2a5e1db snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xe4b33235 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x190cf48f snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x321f53cb snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5af8ff6c snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6667215e snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8b121b8b snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe5c85af0 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x55241775 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x63ed3ec1 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x733cf992 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xfe0bfc77 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x19665a36 snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x4fc3f0b6 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x5b1461ea snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x67ddf32d snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x8c3a5582 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x91e4e5a4 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x957e570b snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd778d644 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xdd63e4fb snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-i2c 0x222728fb snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0x2496a7be snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x37d7ff75 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x37e6846f snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x901681f3 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0xb0de046b snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x18cc2940 snd_tea6330t_update_mixer +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x647d22f0 snd_tea6330t_detect +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x001af53f snd_es1688_create +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x5503af93 snd_es1688_pcm +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x95ca45a4 snd_es1688_mixer_write +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xd26546db snd_es1688_mixer +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x04d97666 snd_gf1_dram_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x14a61682 snd_gus_dram_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x15054e92 snd_gf1_ctrl_stop +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x258e4091 snd_gus_use_dec +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2c1b92d6 snd_gf1_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2db1622d snd_gus_use_inc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x33ccd2ac snd_gf1_write_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67 snd_gf1_lvol_to_gvol_raw +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4eda46d2 snd_gf1_poke +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x59c7a0d4 snd_gus_create +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5e13c5bf snd_gf1_alloc_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5ff2a560 snd_gus_initialize +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x641738cf snd_gf1_peek +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x65a182f7 snd_gf1_stop_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x665d582b snd_gf1_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6e3676db snd_gf1_new_mixer +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x7603c23c snd_gf1_mem_free +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x77128074 snd_gf1_mem_alloc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x7c40e8d0 snd_gf1_mem_xfree +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5 snd_gus_interrupt +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527 snd_gf1_atten_table +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd1dbfc72 snd_gf1_pcm_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd6c1a2ba snd_gf1_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xdadbfe68 snd_gf1_translate_freq +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xdb12fce3 snd_gf1_free_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xde14e3e6 snd_gf1_i_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe8ecc8a6 snd_gus_dram_read +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xec7ad9d7 snd_gf1_mem_lock +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf65764a9 snd_gf1_write16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf6600446 snd_gf1_i_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xfa14276e snd_gf1_delay +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xfd5f974a snd_gf1_i_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xff749101 snd_gf1_rawmidi_new +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3 snd_msnd_init_queue +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x2896ad23 snd_msndmix_setup +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x289c7711 snd_msnd_enable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x3e111582 snd_msnd_disable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24 snd_msndmidi_input_read +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x78a85bfd snd_msnd_upload_host +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x90b0d769 snd_msnd_DAPQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xa69d607c snd_msnd_send_word +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xc2f4f67a snd_msnd_DARQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xcdfa193d snd_msnd_send_dsp_cmd +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xcffa0d73 snd_msndmix_new +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xd3091ae9 snd_msnd_dsp_halt +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xd37a5e25 snd_msnd_pcm +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xe090e7e3 snd_msndmix_force_recsrc +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0ec2ddc1 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x29b342f1 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x2fe20a8b snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x5b2f19a9 snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x5d731fe6 snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x62708c08 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7c8e85de snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9b318ebe snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc9257523 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xfbb0a0af snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0xad012435 snd_sb_csp_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa62041db snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xaaff1b12 snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc6a195b4 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x0f1e6002 snd_sb8dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x915f2ea6 snd_sb8dsp_midi +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x96196996 snd_sb8dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xb2b9b354 snd_sb8dsp_midi_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x412ef08c snd_emu8000_peek +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x47f7bf6b snd_emu8000_load_reverb_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x52431aa1 snd_emu8000_update_chorus_mode +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x76971e46 snd_emu8000_update_equalizer +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x78d0e474 snd_emu8000_dma_chan +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x80e08765 snd_emu8000_poke +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9d02280e snd_emu8000_init_fm +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xb1cc450d snd_emu8000_peek_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xcd42be2b snd_emu8000_poke_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xe1810034 snd_emu8000_load_chorus_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xf50104d6 snd_emu8000_update_reverb_mode +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x0241b251 snd_wss_info_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x20a34c03 snd_wss_mce_down +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x35c31852 snd_wss_timer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x3b2eda14 snd_cs4236_ext_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x547e5d34 snd_wss_mixer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x54cff58e snd_wss_info_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x841cc8fc snd_wss_chip_id +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x8b81b5ba snd_wss_put_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x9dbbf4b8 snd_wss_put_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa3dc3566 snd_wss_free +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa4764ef5 snd_wss_get_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb24c0ff7 snd_wss_get_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb27d4eef snd_wss_mce_up +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc6d3ee87 snd_wss_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc910c453 snd_wss_get_pcm_ops +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd755e473 snd_wss_create +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xdf16dbbf snd_wss_pcm +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe2c0763b snd_cs4236_ext_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe457c847 snd_wss_overrange +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5 snd_wss_interrupt +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xfd988f6d snd_wss_out +EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x69ad7bc0 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xbee027ab attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x61641749 probe_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xb2f52c93 attach_mpu401 +EXPORT_SYMBOL sound/oss/msnd 0x1186f48f msnd_fifo_read +EXPORT_SYMBOL sound/oss/msnd 0x234f64e0 msnd_register +EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf msnd_init_queue +EXPORT_SYMBOL sound/oss/msnd 0x54230dc1 msnd_fifo_write +EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb msnd_unregister +EXPORT_SYMBOL sound/oss/msnd 0x6587640b msnd_disable_irq +EXPORT_SYMBOL sound/oss/msnd 0x6601493b msnd_fifo_make_empty +EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b msnd_send_dsp_cmd +EXPORT_SYMBOL sound/oss/msnd 0x9274d677 msnd_fifo_free +EXPORT_SYMBOL sound/oss/msnd 0x95d37486 msnd_upload_host +EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420 msnd_send_word +EXPORT_SYMBOL sound/oss/msnd 0xade99e25 msnd_fifo_alloc +EXPORT_SYMBOL sound/oss/msnd 0xb3520772 msnd_fifo_init +EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb msnd_fifo_write_io +EXPORT_SYMBOL sound/oss/msnd 0xefdd1843 msnd_enable_irq +EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662 msnd_fifo_read_io +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x786c55cd sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xc7e91046 probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0b7d3b00 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0x0d2a1dcd sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17466dc5 sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x76c629da sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0x7a937982 audio_devs +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc3e27fdc synth_devs +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf608a885 midi_devs +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0x4b5a2e17 probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x03bd2081 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0cc1dae7 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1ca8ee8e snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x48eefa07 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x50982d3f snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6d07c12c snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x72f94e56 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8a813797 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8cbfb4cd snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9c7a2f9d snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xaaa6eee4 snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbbc5bbd5 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd0c44d21 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xee72e74a snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xef4a1172 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf14e9070 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf7ab770f snd_ac97_update +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1cd891e0 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2d963992 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x3132884b snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x507a18de snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x64209052 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x962f6af7 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9a6c5987 snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc2f23206 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xee1365be snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xde8cc317 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x33a76381 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xa372a42c snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xc10b2b8e snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x07e31aa8 oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x195a0cf6 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1a0ada30 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x225fb903 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x4fe4a49f oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x51a9c1b1 oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x60443709 oxygen_write32_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x61d39bf6 oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7a31bbe8 oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x84315c93 oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8878da96 oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x914ce0a6 oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9e164049 oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb675965f oxygen_reset_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xba187559 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xc0d4010f oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe4ab7639 oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe615348b oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xeac6d974 oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf3ae3bf2 oxygen_pci_probe +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x860641cd snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa72b1bd1 snd_trident_stop_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xaa6e8096 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf9cfa434 snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xfe536a5c snd_trident_free_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xc0582a16 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x047ff87d register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x92998251 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xbd8e982a register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0xc68f1301 sound_class +EXPORT_SYMBOL sound/soundcore 0xc879e5c8 register_sound_midi +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xd85623a8 register_sound_special +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x3b96f90e snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x51deaf38 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5bb8e9e9 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5fadd21b snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa5c43664 snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf25ff2e0 snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/snd-util-mem 0x028537ac __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x33f9d23a snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x53f65051 __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0x55d68a49 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xa35ca4f4 snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xc246a4fa snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xfafbb015 snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xfd7341b2 snd_util_mem_alloc +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x2c04de83 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x0ec10ae9 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x25bd627f dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x4bc0231f dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x55a226f9 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x7ed64611 dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x95136761 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x022ceed0 lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xfb4b2ba1 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x0003d925 journal_start_commit +EXPORT_SYMBOL vmlinux 0x004e99dd pci_target_state +EXPORT_SYMBOL vmlinux 0x00546468 put_io_context +EXPORT_SYMBOL vmlinux 0x00773ede tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00a90f9c pcim_enable_device +EXPORT_SYMBOL vmlinux 0x00b700dd generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x00c4dad9 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x01137efc jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x0140660b pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019bede7 pnpbios_protocol +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01bf75ad hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01f14143 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x01f5f5c6 skb_over_panic +EXPORT_SYMBOL vmlinux 0x0204c7c0 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x021734d6 tcp_connect +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x02561760 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x026a285f nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02cdca67 nobh_write_end +EXPORT_SYMBOL vmlinux 0x02d07053 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x02f84ebf blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x02ffad30 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x0306fcb8 sk_alloc +EXPORT_SYMBOL vmlinux 0x0307a15d elv_rb_find +EXPORT_SYMBOL vmlinux 0x0308b680 acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x033db96f ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0351a9d7 d_prune_aliases +EXPORT_SYMBOL vmlinux 0x0359fdbe wireless_spy_update +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x038349c9 is_container_init +EXPORT_SYMBOL vmlinux 0x03b9e061 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c0625a vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x03c472d5 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03cf6e2f phy_device_create +EXPORT_SYMBOL vmlinux 0x03eb94a2 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x044e1c4c kmem_cache_size +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x04506499 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x04569444 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x0467b015 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04aa4da7 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x04b969cd acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0x04d0025f skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x052b6d4a mnt_unpin +EXPORT_SYMBOL vmlinux 0x053069eb da903x_query_status +EXPORT_SYMBOL vmlinux 0x053eb78c kernel_read +EXPORT_SYMBOL vmlinux 0x055d5a61 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x057ffb75 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x05abc428 udp_prot +EXPORT_SYMBOL vmlinux 0x060bda76 napi_get_frags +EXPORT_SYMBOL vmlinux 0x060cd38e ip_defrag +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x061b2488 security_path_mknod +EXPORT_SYMBOL vmlinux 0x0628bb3f skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x06614116 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x0697a772 dma_ops +EXPORT_SYMBOL vmlinux 0x06a31e48 simple_set_mnt +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06d9309c tty_set_operations +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x071b2a0d sync_blockdev +EXPORT_SYMBOL vmlinux 0x072132b8 read_dev_sector +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x07608604 acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x0787b9f7 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x079e3b9a jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x07a202c3 lock_fb_info +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d50a24 csum_partial +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07ec6692 init_special_inode +EXPORT_SYMBOL vmlinux 0x0827f182 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0865d795 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x089d5d63 proc_symlink +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08d80dab unload_nls +EXPORT_SYMBOL vmlinux 0x092bd638 block_write_begin +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x093ad99e simple_readpage +EXPORT_SYMBOL vmlinux 0x093bae81 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x09440f25 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x094a8bf7 bdev_read_only +EXPORT_SYMBOL vmlinux 0x095d831a pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x097a5b92 generic_writepages +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x099242bc elv_queue_empty +EXPORT_SYMBOL vmlinux 0x099eca69 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x09a4c847 scsi_host_put +EXPORT_SYMBOL vmlinux 0x09a4ccf9 save_mount_options +EXPORT_SYMBOL vmlinux 0x09bd00cd inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09fb073c vfs_readdir +EXPORT_SYMBOL vmlinux 0x09ff0bc0 jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x09ffdbdd gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x0a00195a dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x0a0741e2 flush_signals +EXPORT_SYMBOL vmlinux 0x0a1e87f9 atomic64_add_negative +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a2ee0ad take_over_console +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a3cf6b6 arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a54bc75 bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0x0a6fc192 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x0aa75296 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x0ac724d1 xfrm_lookup +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0aff87f8 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b12f4f5 simple_write_end +EXPORT_SYMBOL vmlinux 0x0b186745 unlock_super +EXPORT_SYMBOL vmlinux 0x0b189ce9 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b268612 bdi_init +EXPORT_SYMBOL vmlinux 0x0b307d08 ps2_init +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0bb3d9d5 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x0bb785ee __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x0bc74686 mdio_bus_type +EXPORT_SYMBOL vmlinux 0x0c18d111 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x0c2932e5 read_cache_page +EXPORT_SYMBOL vmlinux 0x0c2d7274 genphy_resume +EXPORT_SYMBOL vmlinux 0x0c4a1fec security_path_truncate +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c71f6ff xfrm_input +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca53655 tcp_check_req +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cb33eb0 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d28ba27 make_bad_inode +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d4231a8 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x0d4a9eac scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x0d4b77b7 gen_pool_add +EXPORT_SYMBOL vmlinux 0x0d4d68f9 mca_device_transform_ioport +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d6c963c copy_from_user +EXPORT_SYMBOL vmlinux 0x0d8ffd59 per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0de88d77 mutex_lock +EXPORT_SYMBOL vmlinux 0x0e0289b2 kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x0e0b43d2 unlock_rename +EXPORT_SYMBOL vmlinux 0x0e0c8280 kunmap +EXPORT_SYMBOL vmlinux 0x0e0cf028 touch_atime +EXPORT_SYMBOL vmlinux 0x0e2f317b ip_route_output_key +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e9af76f poll_freewait +EXPORT_SYMBOL vmlinux 0x0ec71fb0 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x0edf9fce put_disk +EXPORT_SYMBOL vmlinux 0x0ee7fefa dev_get_flags +EXPORT_SYMBOL vmlinux 0x0efc37c3 write_one_page +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f30046b lock_super +EXPORT_SYMBOL vmlinux 0x0f311de6 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x0f418d32 fb_set_suspend +EXPORT_SYMBOL vmlinux 0x0f6cdc18 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x0f6f9b06 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x0fa1b6b2 module_put +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x10029d49 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x100b330b revalidate_disk +EXPORT_SYMBOL vmlinux 0x102acfca dentry_open +EXPORT_SYMBOL vmlinux 0x1053dc86 request_key +EXPORT_SYMBOL vmlinux 0x105b60ad security_file_permission +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10b894f8 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x10be12b6 pci_request_regions +EXPORT_SYMBOL vmlinux 0x10c9327a blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x10ce03f6 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x10d584bb nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x10d64e0f cad_pid +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x110042d3 wake_up_process +EXPORT_SYMBOL vmlinux 0x110a9bef uart_get_divisor +EXPORT_SYMBOL vmlinux 0x110f2a8b dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x115e0254 make_EII_client +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11b9901e vm_insert_page +EXPORT_SYMBOL vmlinux 0x11bb5a72 key_unlink +EXPORT_SYMBOL vmlinux 0x120507ac idr_get_new +EXPORT_SYMBOL vmlinux 0x120c4d9f nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x121c7834 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x1268f46e read_cache_pages +EXPORT_SYMBOL vmlinux 0x127c5391 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x1283eed3 aio_complete +EXPORT_SYMBOL vmlinux 0x12ae5bd5 I_BDEV +EXPORT_SYMBOL vmlinux 0x12c2265b input_filter_device +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x132d025d simple_write_begin +EXPORT_SYMBOL vmlinux 0x135b83dc thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x136d99e5 input_close_device +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x13d9b5f0 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x13da6fb6 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x13f522f7 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x1425fa4c xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x143fb42f tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x143fe651 d_move +EXPORT_SYMBOL vmlinux 0x14546f2f tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x14a6079d dst_alloc +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14bcbc82 hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0x14c3d6fa input_register_handler +EXPORT_SYMBOL vmlinux 0x14d71486 task_nice +EXPORT_SYMBOL vmlinux 0x14f332ea up_read +EXPORT_SYMBOL vmlinux 0x14fce89c security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1546c7c7 __devm_request_region +EXPORT_SYMBOL vmlinux 0x1548bc98 ip_fragment +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x155ee6fd netlink_ack +EXPORT_SYMBOL vmlinux 0x15ead4a0 lro_flush_all +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x15f0fda3 tty_throttle +EXPORT_SYMBOL vmlinux 0x160e5709 dget_locked +EXPORT_SYMBOL vmlinux 0x16190635 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x162565fd tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x163eb040 input_set_capability +EXPORT_SYMBOL vmlinux 0x16436fb6 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x16713dba mca_unregister_driver +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x167f9bc4 scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x168f1906 __alloc_skb +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16caec0f pci_get_class +EXPORT_SYMBOL vmlinux 0x16d21582 pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16ebfd31 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x170e1ff1 sock_create +EXPORT_SYMBOL vmlinux 0x171690cf simple_empty +EXPORT_SYMBOL vmlinux 0x1722332c mpage_readpage +EXPORT_SYMBOL vmlinux 0x172675c7 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x173caca0 kernel_getsockname +EXPORT_SYMBOL vmlinux 0x173f3b23 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x17585400 hci_resume_dev +EXPORT_SYMBOL vmlinux 0x1767210c cdrom_open +EXPORT_SYMBOL vmlinux 0x178c31bc scsi_execute +EXPORT_SYMBOL vmlinux 0x17a7d24f ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17fd89ca __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x1802329d set_bh_page +EXPORT_SYMBOL vmlinux 0x18195761 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x1819d9aa tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x1826eaf3 register_sysrq_key +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1845e7c5 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x186b8966 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0x187fea42 acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0x18827b18 tty_unregister_device +EXPORT_SYMBOL vmlinux 0x18b1b9d7 inet_shutdown +EXPORT_SYMBOL vmlinux 0x19724b32 pnp_register_driver +EXPORT_SYMBOL vmlinux 0x19767b49 kill_fasync +EXPORT_SYMBOL vmlinux 0x19834f19 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x198a5d7b nf_register_hook +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19b87f84 acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x19c21fe0 skb_under_panic +EXPORT_SYMBOL vmlinux 0x19c87960 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x19cb818b blk_end_request +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x19f76136 phy_stop +EXPORT_SYMBOL vmlinux 0x1a08d1c5 fddi_type_trans +EXPORT_SYMBOL vmlinux 0x1a1244e9 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x1a2c0505 skb_tx_hash +EXPORT_SYMBOL vmlinux 0x1a30d4c9 kill_pid +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a817c56 scm_fp_dup +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1a8d8dba journal_ack_err +EXPORT_SYMBOL vmlinux 0x1a8f97e7 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x1a9cf935 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x1ab57a3b elevator_init +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0f71fb alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x1b149f1e journal_restart +EXPORT_SYMBOL vmlinux 0x1b463017 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x1b4c7f45 bio_clone +EXPORT_SYMBOL vmlinux 0x1b54d385 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b8866a3 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b8a6c50 block_commit_write +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1bebcca3 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x1bef06e2 __kill_fasync +EXPORT_SYMBOL vmlinux 0x1bf6675e inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x1bf81c05 cdrom_media_changed +EXPORT_SYMBOL vmlinux 0x1c2994d7 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x1c32b927 simple_rename +EXPORT_SYMBOL vmlinux 0x1c52fe51 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x1c68c171 register_snap_client +EXPORT_SYMBOL vmlinux 0x1c730d82 sg_miter_start +EXPORT_SYMBOL vmlinux 0x1c7e8671 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c963e87 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30b70c rwsem_wake +EXPORT_SYMBOL vmlinux 0x1d3b43b3 kernel_bind +EXPORT_SYMBOL vmlinux 0x1d62e6e8 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x1d6ca8a8 vm_map_ram +EXPORT_SYMBOL vmlinux 0x1d956f5e blk_get_request +EXPORT_SYMBOL vmlinux 0x1d9abb4b set_pages_nx +EXPORT_SYMBOL vmlinux 0x1d9bb6d5 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x1daad067 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1dd91aa9 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x1de6b125 acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0x1e5e502b mem_map +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e6e15bf ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x1ec589b4 sock_wfree +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f023db5 ip_dev_find +EXPORT_SYMBOL vmlinux 0x1f0c9295 set_irq_chip +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f28e7b1 hci_register_dev +EXPORT_SYMBOL vmlinux 0x1f2d939b scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x1f56cd48 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0x1f881839 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x1f8af5ed scsi_unregister +EXPORT_SYMBOL vmlinux 0x1faa1a01 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x1fca382d inet_csk_accept +EXPORT_SYMBOL vmlinux 0x1fccf0c3 hci_free_dev +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x201cce8f nla_reserve +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x2043ae58 dev_close +EXPORT_SYMBOL vmlinux 0x205a10e4 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0x2072e73b udp_poll +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x209d678f devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x20aeb6c4 scsi_remove_device +EXPORT_SYMBOL vmlinux 0x20c49a11 audit_log_end +EXPORT_SYMBOL vmlinux 0x20cdd7c0 bioset_free +EXPORT_SYMBOL vmlinux 0x20d17b18 create_mnt_ns +EXPORT_SYMBOL vmlinux 0x20f93142 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x20fa9444 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x211d5aa9 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x211ddc54 fasync_helper +EXPORT_SYMBOL vmlinux 0x212cdaba journal_release_buffer +EXPORT_SYMBOL vmlinux 0x212d8301 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x213556fc pci_get_slot +EXPORT_SYMBOL vmlinux 0x214bcdb5 nf_log_packet +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2175d81e uart_add_one_port +EXPORT_SYMBOL vmlinux 0x2178aeac lease_modify +EXPORT_SYMBOL vmlinux 0x219488cf sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x2194df62 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x2205a5e2 inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x2221535c bdput +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x223864e8 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x224adc56 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22d5e649 vfs_fsync +EXPORT_SYMBOL vmlinux 0x2300fbac test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x232b2f19 audit_log_start +EXPORT_SYMBOL vmlinux 0x2344fef0 dqget +EXPORT_SYMBOL vmlinux 0x235359da neigh_lookup +EXPORT_SYMBOL vmlinux 0x23590d9e ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x236280d8 scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x236b7be2 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x2391b3d0 register_gifconf +EXPORT_SYMBOL vmlinux 0x23a0a58f tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x23b14557 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x23b523f7 inode_get_bytes +EXPORT_SYMBOL vmlinux 0x23c3c3d1 pnp_release_card_device +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x243ffddc idr_destroy +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x245a3124 netif_napi_add +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x246af894 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x249290ef textsearch_prepare +EXPORT_SYMBOL vmlinux 0x249b916d ppp_register_channel +EXPORT_SYMBOL vmlinux 0x24b1d3ab blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0x24d67fd6 lock_may_write +EXPORT_SYMBOL vmlinux 0x24ed7ac5 load_nls_default +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x24ff269a qdisc_destroy +EXPORT_SYMBOL vmlinux 0x2500560c rfkill_unregister +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x2503e535 ip_route_input +EXPORT_SYMBOL vmlinux 0x2507fef2 tcf_hash_check +EXPORT_SYMBOL vmlinux 0x253752fc mca_device_claimed +EXPORT_SYMBOL vmlinux 0x253ba7ae pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x2557cff1 fb_set_var +EXPORT_SYMBOL vmlinux 0x25752290 blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x258dfa4b d_lookup +EXPORT_SYMBOL vmlinux 0x259bd8a3 pnp_find_dev +EXPORT_SYMBOL vmlinux 0x25ad41e1 dquot_transfer +EXPORT_SYMBOL vmlinux 0x25b33cfc elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x25cba924 pnp_find_card +EXPORT_SYMBOL vmlinux 0x25d3e2a3 atomic64_dec_return +EXPORT_SYMBOL vmlinux 0x25e920a4 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x25ff05df sg_miter_next +EXPORT_SYMBOL vmlinux 0x262b6a3f block_write_full_page +EXPORT_SYMBOL vmlinux 0x263106aa request_firmware +EXPORT_SYMBOL vmlinux 0x263bd26f splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x2651f89f noop_qdisc +EXPORT_SYMBOL vmlinux 0x267c20b5 sock_no_connect +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x26803a07 bdevname +EXPORT_SYMBOL vmlinux 0x2684ba62 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x268cc6a2 sys_close +EXPORT_SYMBOL vmlinux 0x26a59980 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0x26a82bcb d_alloc_root +EXPORT_SYMBOL vmlinux 0x26c00d97 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x26cf5b8a unregister_nls +EXPORT_SYMBOL vmlinux 0x26dc6a59 journal_stop +EXPORT_SYMBOL vmlinux 0x26e2b08a pci_dev_driver +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x2712b6b7 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272a4bf7 posix_test_lock +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x277e6b26 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x2792cac1 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x27943cb4 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x27a4dfd1 journal_lock_updates +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27e16b06 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x27e30111 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x27e4860a pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x27eada58 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x28667f33 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x2881062f mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28b715a6 isapnp_cfg_end +EXPORT_SYMBOL vmlinux 0x28de4816 security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x28e77953 scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x290357c7 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x294078f0 dentry_unhash +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29625e53 dma_release_from_coherent +EXPORT_SYMBOL vmlinux 0x29907eae blkdev_put +EXPORT_SYMBOL vmlinux 0x29a7eef4 seq_putc +EXPORT_SYMBOL vmlinux 0x29b1c366 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a07feca pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a39844a ip_setsockopt +EXPORT_SYMBOL vmlinux 0x2a5b7812 lock_may_read +EXPORT_SYMBOL vmlinux 0x2a678304 dma_async_device_register +EXPORT_SYMBOL vmlinux 0x2a833871 ps2_command +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2abd829f neigh_create +EXPORT_SYMBOL vmlinux 0x2ac9e2e3 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b0d08fb sock_map_fd +EXPORT_SYMBOL vmlinux 0x2b2171c6 submit_bh +EXPORT_SYMBOL vmlinux 0x2b34be59 skb_queue_tail +EXPORT_SYMBOL vmlinux 0x2b5a3261 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x2b5c6b3e shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bac747f mmc_remove_host +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bc3798d __serio_register_driver +EXPORT_SYMBOL vmlinux 0x2bc95bd4 memset +EXPORT_SYMBOL vmlinux 0x2beae965 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x2bebc9e6 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x2bf0993f vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x2bfe23ed tcp_parse_options +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c092cee __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x2c33e3c3 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x2c34b57c con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x2c36844a sk_stream_error +EXPORT_SYMBOL vmlinux 0x2c5486fa uart_match_port +EXPORT_SYMBOL vmlinux 0x2c54eecb generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2c6a2eaa neigh_seq_next +EXPORT_SYMBOL vmlinux 0x2c6fc53c neigh_table_init +EXPORT_SYMBOL vmlinux 0x2c7f5c81 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x2c8f5989 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0x2c9874fe ida_remove +EXPORT_SYMBOL vmlinux 0x2cab2116 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x2cae5a17 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x2cc69377 pci_match_id +EXPORT_SYMBOL vmlinux 0x2d066aae single_release +EXPORT_SYMBOL vmlinux 0x2d0ff83c md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0x2d28ca54 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x2d37342e cpu_online_mask +EXPORT_SYMBOL vmlinux 0x2d445d86 filemap_fault +EXPORT_SYMBOL vmlinux 0x2d478f06 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x2d52adb9 jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x2d539508 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x2d6a2246 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x2d6d9999 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dcf77fb xfrm_init_state +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2e1242b9 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x2e139fc9 __page_symlink +EXPORT_SYMBOL vmlinux 0x2e15f86b request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x2e23ce6a inetdev_by_index +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e2e6095 phy_attach_direct +EXPORT_SYMBOL vmlinux 0x2e454e31 blk_peek_request +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e60bace memcpy +EXPORT_SYMBOL vmlinux 0x2e649635 __secpath_destroy +EXPORT_SYMBOL vmlinux 0x2e9656e0 d_delete +EXPORT_SYMBOL vmlinux 0x2e97859f rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x2eb07645 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ee44808 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x2eec824d clocksource_register +EXPORT_SYMBOL vmlinux 0x2efe5e09 atomic64_xchg +EXPORT_SYMBOL vmlinux 0x2f09f310 journal_set_features +EXPORT_SYMBOL vmlinux 0x2f1ec849 inode_init_once +EXPORT_SYMBOL vmlinux 0x2f287f0d copy_to_user +EXPORT_SYMBOL vmlinux 0x2f3b647b security_task_getsecid +EXPORT_SYMBOL vmlinux 0x2f3e1fc1 dev_get_stats +EXPORT_SYMBOL vmlinux 0x2fb3216a __scsi_add_device +EXPORT_SYMBOL vmlinux 0x2fb9e1e3 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x3003a780 mutex_trylock +EXPORT_SYMBOL vmlinux 0x3007b30c blk_sync_queue +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30836ae5 pci_set_master +EXPORT_SYMBOL vmlinux 0x30dea05a neigh_update +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x31456ceb register_exec_domain +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x3169c471 bio_free +EXPORT_SYMBOL vmlinux 0x31757a6b sock_recvmsg +EXPORT_SYMBOL vmlinux 0x317becd5 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31f6139f xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x321aa431 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x3237ff5e mapping_tagged +EXPORT_SYMBOL vmlinux 0x3240b3cb netdev_state_change +EXPORT_SYMBOL vmlinux 0x3242b94e __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x325501b7 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x32662fbf free_netdev +EXPORT_SYMBOL vmlinux 0x3267610f blk_free_tags +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x3291d2f1 tty_shutdown +EXPORT_SYMBOL vmlinux 0x32a1cf03 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x32c68556 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x330e017f pci_pme_active +EXPORT_SYMBOL vmlinux 0x330f5e0e lro_receive_frags +EXPORT_SYMBOL vmlinux 0x332bdf63 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x333b2081 input_event +EXPORT_SYMBOL vmlinux 0x337ef206 no_llseek +EXPORT_SYMBOL vmlinux 0x33b72a36 fd_install +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x33e0174d eth_header +EXPORT_SYMBOL vmlinux 0x33f5fbcb locks_init_lock +EXPORT_SYMBOL vmlinux 0x3422db0b pci_get_subsys +EXPORT_SYMBOL vmlinux 0x342f60fe apm_info +EXPORT_SYMBOL vmlinux 0x34348db0 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x344cfee0 __break_lease +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x347a971e follow_pfn +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a5fc11 inet_frag_find +EXPORT_SYMBOL vmlinux 0x34bc7a85 mca_device_read_stored_pos +EXPORT_SYMBOL vmlinux 0x34ceb43d bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x34d49515 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x352024f3 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x35385474 pci_dev_put +EXPORT_SYMBOL vmlinux 0x353e4751 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x354ddb17 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x355893c9 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0x358f3405 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x3598f327 hci_register_cb +EXPORT_SYMBOL vmlinux 0x35b4d698 dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35c4b675 override_creds +EXPORT_SYMBOL vmlinux 0x35f0faa2 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x36122912 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x36560d6f blk_rq_init +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x367feb31 journal_create +EXPORT_SYMBOL vmlinux 0x3685f97e blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x3692a968 register_cdrom +EXPORT_SYMBOL vmlinux 0x36d97d4e pnp_device_detach +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x37607959 alloc_disk +EXPORT_SYMBOL vmlinux 0x376ca9c8 key_task_permission +EXPORT_SYMBOL vmlinux 0x376f3b5e mdiobus_register +EXPORT_SYMBOL vmlinux 0x3799c334 sock_no_poll +EXPORT_SYMBOL vmlinux 0x379d65f5 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x37ba4b46 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37c83952 security_inode_readlink +EXPORT_SYMBOL vmlinux 0x37d25444 vfs_read +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37f53bc2 thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x38203ca1 __init_rwsem +EXPORT_SYMBOL vmlinux 0x3835686e open_exec +EXPORT_SYMBOL vmlinux 0x383883da phy_device_register +EXPORT_SYMBOL vmlinux 0x383bbb5c ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0x383f4b05 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x384601e7 generic_show_options +EXPORT_SYMBOL vmlinux 0x384973d5 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0x388ad392 inet6_release +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cfdda0 dma_find_channel +EXPORT_SYMBOL vmlinux 0x38da49b9 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x39067486 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x393cb101 get_super +EXPORT_SYMBOL vmlinux 0x3946e790 dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x395c9fe7 journal_force_commit +EXPORT_SYMBOL vmlinux 0x3976e716 serio_open +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39a700ba vfs_readv +EXPORT_SYMBOL vmlinux 0x39e3e445 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x39f51279 pcim_iomap +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3a9c4606 arp_find +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3aaf1df0 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x3ad16aa0 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x3ad9981d pci_remove_bus +EXPORT_SYMBOL vmlinux 0x3adc15b9 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x3ae113f8 key_payload_reserve +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af98f9e ioremap_nocache +EXPORT_SYMBOL vmlinux 0x3afb8597 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x3b067742 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b48866b register_key_type +EXPORT_SYMBOL vmlinux 0x3b5860b6 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x3b820abe dma_alloc_from_coherent +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c2c9ff2 skb_find_text +EXPORT_SYMBOL vmlinux 0x3c451584 page_address +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c7555ef devm_iounmap +EXPORT_SYMBOL vmlinux 0x3c8136f1 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x3c8237fb netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca61173 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x3cb679a7 proto_register +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cc39ad4 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x3cc3e267 pci_bus_type +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cee14fa arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x3cfe2f74 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x3cff16b6 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x3d2c4ed5 names_cachep +EXPORT_SYMBOL vmlinux 0x3d46be0a register_chrdev +EXPORT_SYMBOL vmlinux 0x3d5f4687 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d84225e console_stop +EXPORT_SYMBOL vmlinux 0x3d8d0566 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da1ae9c __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3daea3ec blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x3dcf35ed call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x3de6d3ee block_read_full_page +EXPORT_SYMBOL vmlinux 0x3ded887f journal_dirty_data +EXPORT_SYMBOL vmlinux 0x3e0e8719 uart_resume_port +EXPORT_SYMBOL vmlinux 0x3e1bc953 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e48b457 dquot_free_space +EXPORT_SYMBOL vmlinux 0x3e4ee285 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x3e57c820 skb_unlink +EXPORT_SYMBOL vmlinux 0x3e8c6baf i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0x3e8fb1f9 single_open +EXPORT_SYMBOL vmlinux 0x3e97915b mmc_detect_change +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f2327cf netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x3f39b162 up_write +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5c3cb1 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x3f5c67dd unlock_new_inode +EXPORT_SYMBOL vmlinux 0x3f68731d acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0x3f6f1dfa scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x3f72c25f __scsi_put_command +EXPORT_SYMBOL vmlinux 0x3f96d5e7 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x3f9d1ea7 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x3fa2c378 bio_pair_release +EXPORT_SYMBOL vmlinux 0x3fa4e9c9 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x3fb3606c netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x3fcf1e69 pipe_to_file +EXPORT_SYMBOL vmlinux 0x3fcf9b80 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x3fd3a1ff i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x40097e30 input_release_device +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x40730375 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x40747548 mdiobus_read +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40a329b9 phy_register_fixup +EXPORT_SYMBOL vmlinux 0x40aa24a7 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x40be1da6 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x4113bd79 contig_page_data +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x4119a378 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x41293b17 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x413f9f6f tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x415e6497 simple_getattr +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x418dbb93 tc_classify +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41bd07f2 kill_litter_super +EXPORT_SYMBOL vmlinux 0x41cd1150 kill_block_super +EXPORT_SYMBOL vmlinux 0x41ebfbd7 simple_pin_fs +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x421e85ad blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x422e0b9f mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x4230574f i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x42493415 datagram_poll +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x4292364c schedule +EXPORT_SYMBOL vmlinux 0x42b7b114 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x42beb429 bdget_disk +EXPORT_SYMBOL vmlinux 0x42c5dba0 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x430afa59 bh_submit_read +EXPORT_SYMBOL vmlinux 0x430cd31b pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x43427c6b __mutex_init +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x4388d8da clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x4414b4d0 bio_copy_user +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x442ef9ce journal_clear_err +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x443537be vc_cons +EXPORT_SYMBOL vmlinux 0x4442964e unregister_md_personality +EXPORT_SYMBOL vmlinux 0x4444c342 netlink_broadcast +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x4467060d unregister_filesystem +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44b96856 brioctl_set +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44f21bea idr_for_each +EXPORT_SYMBOL vmlinux 0x44f9efb6 default_llseek +EXPORT_SYMBOL vmlinux 0x4511bf1d pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x454aef9a security_d_instantiate +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x4565bc19 user_path_at +EXPORT_SYMBOL vmlinux 0x4567d5cd generic_ro_fops +EXPORT_SYMBOL vmlinux 0x45750c3a i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x4582a609 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x4593783a __scm_destroy +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45afacf7 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45d51909 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x45f22115 kthread_create +EXPORT_SYMBOL vmlinux 0x45f90697 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x463c29a5 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x467ad22a d_instantiate +EXPORT_SYMBOL vmlinux 0x468fb1e8 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x46cdf5b2 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x46e388b1 input_unregister_handle +EXPORT_SYMBOL vmlinux 0x46feaf4a scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x4731c561 inet_listen +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475e9e82 init_task +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x4777699e dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x47882ad9 dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x4791769c blk_make_request +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47cdbc18 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x47e3cac3 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x47ea341a invalidate_bdev +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x48362655 pci_iomap +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x485a1763 set_create_files_as +EXPORT_SYMBOL vmlinux 0x486977bd tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x487201ba simple_transaction_release +EXPORT_SYMBOL vmlinux 0x48898fe7 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x489703ce textsearch_destroy +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48b20305 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x48c710b4 get_sb_ns +EXPORT_SYMBOL vmlinux 0x490cb72e tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x492b9143 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x494e3393 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x499316af bio_unmap_user +EXPORT_SYMBOL vmlinux 0x49a00de6 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x49a06ce9 deactivate_super +EXPORT_SYMBOL vmlinux 0x49b3166d ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0x49cf1dda input_open_device +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49ea58f1 pci_clear_master +EXPORT_SYMBOL vmlinux 0x49fe7fa0 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x4a04c3bd journal_init_inode +EXPORT_SYMBOL vmlinux 0x4a284b6d skb_copy_expand +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a3d9368 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x4a404293 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x4a5c659b scsi_ioctl +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4aa08e2d __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x4ad0b440 tcp_ioctl +EXPORT_SYMBOL vmlinux 0x4ad687c8 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x4adbdea2 fb_blank +EXPORT_SYMBOL vmlinux 0x4ae03117 icmp_send +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b36b9b1 generic_unplug_device +EXPORT_SYMBOL vmlinux 0x4b4158a6 dma_mark_declared_memory_occupied +EXPORT_SYMBOL vmlinux 0x4b56fa4a generic_getxattr +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b8efef9 fb_show_logo +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4be1ba4d pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x4bfee15a atomic64_set +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c2dc428 tty_devnum +EXPORT_SYMBOL vmlinux 0x4c39263a path_lookup +EXPORT_SYMBOL vmlinux 0x4c3fcc36 tcf_exts_change +EXPORT_SYMBOL vmlinux 0x4c6ca072 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x4c6f16d4 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x4c944269 tcf_action_exec +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cbed673 dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0x4cc5bb38 key_type_keyring +EXPORT_SYMBOL vmlinux 0x4cd1ac37 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x4cf58de4 scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x4d1d44b5 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x4d2dc830 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d6f7f71 tcp_close +EXPORT_SYMBOL vmlinux 0x4d7c8f9f misc_register +EXPORT_SYMBOL vmlinux 0x4d85ed54 hci_unregister_proto +EXPORT_SYMBOL vmlinux 0x4d999080 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x4da3554d request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e1590df tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x4e2755c7 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4e8390e3 may_umount_tree +EXPORT_SYMBOL vmlinux 0x4e9fa8cf elv_abort_queue +EXPORT_SYMBOL vmlinux 0x4ece6e21 dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0x4ef18a85 pci_iounmap +EXPORT_SYMBOL vmlinux 0x4f0e422e neigh_seq_start +EXPORT_SYMBOL vmlinux 0x4f47675b scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f5b9c77 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4f98a795 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x4f9ea381 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x4faf51e7 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fe008f9 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5025445a blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x5042f8f7 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0x50587164 dev_unicast_add +EXPORT_SYMBOL vmlinux 0x506445d1 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x508f5452 bio_put +EXPORT_SYMBOL vmlinux 0x50a9fbff kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x50bdd470 boot_cpu_data +EXPORT_SYMBOL vmlinux 0x50bfe9c5 kthread_bind +EXPORT_SYMBOL vmlinux 0x50f529b0 proto_unregister +EXPORT_SYMBOL vmlinux 0x50fff010 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x51114c8f sock_no_getname +EXPORT_SYMBOL vmlinux 0x51128ed9 neigh_event_ns +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x51239c1c __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x5152e605 memcmp +EXPORT_SYMBOL vmlinux 0x5177cec4 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0x5186518f profile_pc +EXPORT_SYMBOL vmlinux 0x51890082 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x51a87f44 have_submounts +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x5211511d unregister_console +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5299fc54 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52bf38e9 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52da7027 keyring_search +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x531294f0 proc_dostring +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x53484e35 generic_fillattr +EXPORT_SYMBOL vmlinux 0x536753d4 netdev_set_master +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x539155d8 netlink_unicast +EXPORT_SYMBOL vmlinux 0x539bc2b2 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x53b2d79e get_fs_type +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x540abec2 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x541dfef4 atomic64_inc +EXPORT_SYMBOL vmlinux 0x5420c1e0 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x542c0f6b pci_write_vpd +EXPORT_SYMBOL vmlinux 0x54340bbf rtnl_notify +EXPORT_SYMBOL vmlinux 0x5436fda3 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x5464d200 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x5468ab10 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x54935666 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0x5493860e tcp_read_sock +EXPORT_SYMBOL vmlinux 0x54a6d074 atomic64_dec +EXPORT_SYMBOL vmlinux 0x54b01745 pipe_unlock +EXPORT_SYMBOL vmlinux 0x54b4e605 kthread_stop +EXPORT_SYMBOL vmlinux 0x54c9027d new_inode +EXPORT_SYMBOL vmlinux 0x54da7a29 __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54f92791 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x55172084 dev_mc_add +EXPORT_SYMBOL vmlinux 0x551f0e61 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x55238e22 inet_select_addr +EXPORT_SYMBOL vmlinux 0x552e9250 journal_update_format +EXPORT_SYMBOL vmlinux 0x553f9dd3 down_read_trylock +EXPORT_SYMBOL vmlinux 0x558d6330 i2c_register_driver +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55aa59d4 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x55b01d0e netlink_set_err +EXPORT_SYMBOL vmlinux 0x55b1661f complete_request_key +EXPORT_SYMBOL vmlinux 0x55d0f060 send_sig +EXPORT_SYMBOL vmlinux 0x55dca1d5 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x561be186 bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x5647f58f mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x56772e70 seq_printf +EXPORT_SYMBOL vmlinux 0x567a4653 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x56979cf8 icmpv6_send +EXPORT_SYMBOL vmlinux 0x56a2efd4 pci_select_bars +EXPORT_SYMBOL vmlinux 0x56ae843a eth_header_parse +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56ea13b9 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x5708ec7c eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x5721e8f3 eisa_driver_unregister +EXPORT_SYMBOL vmlinux 0x5726a720 set_trace_device +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x572e98d6 register_framebuffer +EXPORT_SYMBOL vmlinux 0x572ece54 free_buffer_head +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575a2a2b kill_anon_super +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x576245eb hci_get_route +EXPORT_SYMBOL vmlinux 0x5779eb71 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x579d5502 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x579fbcd2 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57d2b638 bd_claim +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57dfe282 __seq_open_private +EXPORT_SYMBOL vmlinux 0x57f62a70 sock_kfree_s +EXPORT_SYMBOL vmlinux 0x580f8c89 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5846a22a simple_transaction_set +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x586d0f15 secpath_dup +EXPORT_SYMBOL vmlinux 0x5879d0a3 set_security_override +EXPORT_SYMBOL vmlinux 0x58909a87 acpi_bus_start +EXPORT_SYMBOL vmlinux 0x589a0ab3 pci_choose_state +EXPORT_SYMBOL vmlinux 0x589eb472 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0x58b1f791 filemap_flush +EXPORT_SYMBOL vmlinux 0x58b6cafb skb_gso_segment +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58d42395 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x58fef6f8 ist_info +EXPORT_SYMBOL vmlinux 0x5902fc02 dquot_initialize +EXPORT_SYMBOL vmlinux 0x5921f756 i2c_master_send +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x597e764f file_update_time +EXPORT_SYMBOL vmlinux 0x599bd307 inode_add_bytes +EXPORT_SYMBOL vmlinux 0x599f6849 dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59c93b73 setup_new_exec +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x5a22f36e dev_trans_start +EXPORT_SYMBOL vmlinux 0x5a366da4 md_integrity_register +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a60401d scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x5a71daec tty_vhangup +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a97094d eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x5aaef91c bdi_destroy +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5aca1759 pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x5b022d79 pci_fixup_device +EXPORT_SYMBOL vmlinux 0x5b08bce0 prepare_binprm +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b1cd009 input_unregister_handler +EXPORT_SYMBOL vmlinux 0x5b480bcd freeze_bdev +EXPORT_SYMBOL vmlinux 0x5b4f049b find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5bdb7c24 input_set_keycode +EXPORT_SYMBOL vmlinux 0x5c07d8e5 phy_connect +EXPORT_SYMBOL vmlinux 0x5c0be48c __ip_select_ident +EXPORT_SYMBOL vmlinux 0x5c265cba sg_init_one +EXPORT_SYMBOL vmlinux 0x5c68705b mca_read_pos +EXPORT_SYMBOL vmlinux 0x5c9b6f4b genl_sock +EXPORT_SYMBOL vmlinux 0x5c9b7916 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x5cae8e88 skb_seq_read +EXPORT_SYMBOL vmlinux 0x5cb24056 __nla_reserve +EXPORT_SYMBOL vmlinux 0x5cb966b2 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x5cda83b6 fb_class +EXPORT_SYMBOL vmlinux 0x5cf104db lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x5cfc752d mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x5d008da9 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x5d112a57 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d12ddb4 tty_check_change +EXPORT_SYMBOL vmlinux 0x5d6e2ffd check_disk_size_change +EXPORT_SYMBOL vmlinux 0x5da653b0 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x5dccc524 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x5dda7edb key_alloc +EXPORT_SYMBOL vmlinux 0x5def9224 dev_open +EXPORT_SYMBOL vmlinux 0x5df1dc3c nla_append +EXPORT_SYMBOL vmlinux 0x5e054199 sysctl_string +EXPORT_SYMBOL vmlinux 0x5e2888af __ht_create_irq +EXPORT_SYMBOL vmlinux 0x5e3de087 write_inode_now +EXPORT_SYMBOL vmlinux 0x5e406786 __lookup_one_len +EXPORT_SYMBOL vmlinux 0x5e45ae31 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x5e511bfd tty_mutex +EXPORT_SYMBOL vmlinux 0x5e5e6818 follow_up +EXPORT_SYMBOL vmlinux 0x5e6886d8 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eb64420 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x5eb77d31 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x5ec02dd8 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x5ec6ad32 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5f1bd579 mca_find_adapter +EXPORT_SYMBOL vmlinux 0x5f223bdd mca_device_read_pos +EXPORT_SYMBOL vmlinux 0x5f259d84 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x5f2757d0 ether_setup +EXPORT_SYMBOL vmlinux 0x5f38e22d ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x5f67fec7 vfs_mknod +EXPORT_SYMBOL vmlinux 0x5f7726bb alloc_file +EXPORT_SYMBOL vmlinux 0x5fa650c9 proc_dointvec +EXPORT_SYMBOL vmlinux 0x5fb4204c bdi_register +EXPORT_SYMBOL vmlinux 0x5fc422f6 netif_napi_del +EXPORT_SYMBOL vmlinux 0x5fd28ef4 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x60029651 pci_set_mwi +EXPORT_SYMBOL vmlinux 0x60062dff tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x602adb25 __bio_clone +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x6038e609 get_write_access +EXPORT_SYMBOL vmlinux 0x6042675d inet_frags_init +EXPORT_SYMBOL vmlinux 0x6043092c atomic64_dec_and_test +EXPORT_SYMBOL vmlinux 0x6044bd8b ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0x604829b6 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x6055beb7 bt_sock_register +EXPORT_SYMBOL vmlinux 0x6073586d sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x60938f23 __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60a789f7 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x60bf74bf invalidate_partition +EXPORT_SYMBOL vmlinux 0x60d2e54e inet_sendmsg +EXPORT_SYMBOL vmlinux 0x60de5269 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x60e152ae filemap_fdatawait +EXPORT_SYMBOL vmlinux 0x60ef9c42 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x615c8949 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x6174fefd rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x61801b64 sockfd_lookup +EXPORT_SYMBOL vmlinux 0x61825a69 sock_no_accept +EXPORT_SYMBOL vmlinux 0x618595ca scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61988954 inet_addr_type +EXPORT_SYMBOL vmlinux 0x6198bac0 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61b930b5 sk_filter +EXPORT_SYMBOL vmlinux 0x61c51df5 read_cache_page_async +EXPORT_SYMBOL vmlinux 0x61dfd66c generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x620ac41a pv_cpu_ops +EXPORT_SYMBOL vmlinux 0x62193598 pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x6222f1b3 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x6241a2ab __copy_from_user_ll_nocache +EXPORT_SYMBOL vmlinux 0x6241fd2c acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0x624bbabc jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x6261624e tcp_shutdown +EXPORT_SYMBOL vmlinux 0x626c8f5f pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x626ca80d skb_recycle_check +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62a832d1 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x62af7624 journal_extend +EXPORT_SYMBOL vmlinux 0x62b5bba8 default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x6365538f scsi_remove_target +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x636dffd0 send_sig_info +EXPORT_SYMBOL vmlinux 0x636fae6d journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x6391fcfd register_quota_format +EXPORT_SYMBOL vmlinux 0x639f357b llc_sap_find +EXPORT_SYMBOL vmlinux 0x63c3f854 fb_find_mode +EXPORT_SYMBOL vmlinux 0x63c4bf15 per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640a7078 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x644bc9d8 fget +EXPORT_SYMBOL vmlinux 0x645113cb inet6_getname +EXPORT_SYMBOL vmlinux 0x64526a93 atomic64_sub_return +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64a27ad1 devm_ioremap +EXPORT_SYMBOL vmlinux 0x64eaccdd unlock_buffer +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64ebf554 sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x64f13b90 napi_frags_skb +EXPORT_SYMBOL vmlinux 0x6503ad67 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x650ff0c4 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x65199917 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x652a23cc blk_unplug +EXPORT_SYMBOL vmlinux 0x653c531b directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x65545b8d pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x6554d1a9 register_nls +EXPORT_SYMBOL vmlinux 0x6572acec skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x65754339 scsi_get_command +EXPORT_SYMBOL vmlinux 0x658a328c journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x658e4772 scsi_print_command +EXPORT_SYMBOL vmlinux 0x65900f0e acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0x659081bd bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x65a543d8 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x65c499f6 put_page +EXPORT_SYMBOL vmlinux 0x65de9934 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x6641cf41 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x667e0c2d pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66c597fe serio_close +EXPORT_SYMBOL vmlinux 0x66dce69c scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x66e4cdeb xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x6702b917 unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x670f95e5 posix_acl_permission +EXPORT_SYMBOL vmlinux 0x67283bc7 blk_remove_plug +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x67804a19 __any_online_cpu +EXPORT_SYMBOL vmlinux 0x67934b8a uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x67a374a7 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x67acedd3 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67dfff2c tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x67f0dadd sk_reset_timer +EXPORT_SYMBOL vmlinux 0x684095f9 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x6844b507 dma_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0x684a551f generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x6877f3a8 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x6894a47b pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x68ab18a0 kfree_skb +EXPORT_SYMBOL vmlinux 0x69021b1b iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x693ea8e6 block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x69436e8c __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x698e82dd i2c_master_recv +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e1d6d2 nf_ct_attach +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69f533e4 generic_write_end +EXPORT_SYMBOL vmlinux 0x69fdeb53 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a18cdbd unregister_con_driver +EXPORT_SYMBOL vmlinux 0x6a1dcb4b dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0x6a27bfce csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x6a464abe journal_forget +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a6592da ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0x6a7aa92a scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x6abee234 simple_sync_file +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6af24afc generic_write_checks +EXPORT_SYMBOL vmlinux 0x6b0fd89a xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x6b158a4b cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b4b2bd3 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x6b57047e udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0x6b58ac19 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x6b90a74f md_write_start +EXPORT_SYMBOL vmlinux 0x6b937ffb mca_mark_as_used +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb48763 wireless_send_event +EXPORT_SYMBOL vmlinux 0x6bb812e7 atomic64_add_return +EXPORT_SYMBOL vmlinux 0x6bc1fc8e pcim_iounmap +EXPORT_SYMBOL vmlinux 0x6bc33d05 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x6bd8cb27 give_up_console +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6bfc02b8 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x6c180f3c __napi_schedule +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c1e9c03 registered_fb +EXPORT_SYMBOL vmlinux 0x6c21899f ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x6c2e3320 strncmp +EXPORT_SYMBOL vmlinux 0x6c326c21 skb_append +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c5b1ea5 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x6c5bd899 disk_stack_limits +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6891d0 skb_pad +EXPORT_SYMBOL vmlinux 0x6c6eabfd set_pages_uc +EXPORT_SYMBOL vmlinux 0x6c6fee2e sock_sendmsg +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c75e321 mb_cache_create +EXPORT_SYMBOL vmlinux 0x6c85c25e tty_port_hangup +EXPORT_SYMBOL vmlinux 0x6c8afb48 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x6c9b73ad sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x6cc3b060 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce3f20d pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0x6cfbad1d rfkill_set_states +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d464175 __sg_free_table +EXPORT_SYMBOL vmlinux 0x6d56994a cmpxchg_486_u64 +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d9c1110 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x6db4c02a call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dc9e97c xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x6dce31c3 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e05054e blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0b943e km_query +EXPORT_SYMBOL vmlinux 0x6e0d9e21 con_copy_unimap +EXPORT_SYMBOL vmlinux 0x6e17349e ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x6e30ac99 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e8a8619 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x6e8e5d37 skb_copy_bits +EXPORT_SYMBOL vmlinux 0x6e98623a jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x6e98916c vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ea73c1e kobject_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6eca0c04 try_to_release_page +EXPORT_SYMBOL vmlinux 0x6ecba63e tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x6f0d5ed5 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x6f171137 register_con_driver +EXPORT_SYMBOL vmlinux 0x6f18299f mca_bus_type +EXPORT_SYMBOL vmlinux 0x6f219ef2 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x6f238e2b flush_old_exec +EXPORT_SYMBOL vmlinux 0x6f2f1071 simple_statfs +EXPORT_SYMBOL vmlinux 0x6f4e89ab simple_release_fs +EXPORT_SYMBOL vmlinux 0x6f54b8ca abort_creds +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f563dc8 dquot_scan_active +EXPORT_SYMBOL vmlinux 0x6f6d8019 ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x701c4970 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x705104a6 pci_map_rom +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x707282d1 del_gendisk +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d1f8f3 strncat +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70e96a89 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0x70ebea63 journal_revoke +EXPORT_SYMBOL vmlinux 0x70ed6d23 dcache_readdir +EXPORT_SYMBOL vmlinux 0x70f68f10 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x71452786 bio_kmalloc +EXPORT_SYMBOL vmlinux 0x714c7a81 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x7173673c sock_release +EXPORT_SYMBOL vmlinux 0x71784d79 filp_close +EXPORT_SYMBOL vmlinux 0x717cc1af register_netdev +EXPORT_SYMBOL vmlinux 0x71943ddc md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0x719803f3 alloc_fcdev +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71bd418a unregister_key_type +EXPORT_SYMBOL vmlinux 0x71e5f01b inode_set_bytes +EXPORT_SYMBOL vmlinux 0x71e99b3a mntput_no_expire +EXPORT_SYMBOL vmlinux 0x71eea163 genphy_update_link +EXPORT_SYMBOL vmlinux 0x720da2b5 __netif_schedule +EXPORT_SYMBOL vmlinux 0x724ee30f pci_disable_device +EXPORT_SYMBOL vmlinux 0x724fa310 vfs_llseek +EXPORT_SYMBOL vmlinux 0x725c6d64 do_munmap +EXPORT_SYMBOL vmlinux 0x727e3adb ___pskb_trim +EXPORT_SYMBOL vmlinux 0x7289670c d_find_alias +EXPORT_SYMBOL vmlinux 0x7299ace5 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72b4b9b6 input_grab_device +EXPORT_SYMBOL vmlinux 0x72bee47a jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72d16990 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x72d39654 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0x72e23354 bt_sock_link +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x731a9c56 nf_log_unregister +EXPORT_SYMBOL vmlinux 0x7320a7e8 udp_ioctl +EXPORT_SYMBOL vmlinux 0x733621fb find_inode_number +EXPORT_SYMBOL vmlinux 0x7337543b vfs_writev +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x73661a9e thaw_process +EXPORT_SYMBOL vmlinux 0x736c0ffc inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x7375b35d genphy_read_status +EXPORT_SYMBOL vmlinux 0x738803e6 strnlen +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x73dc3479 sync_inode +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x73f37699 rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0x74033325 check_disk_change +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x7413793a EISA_bus +EXPORT_SYMBOL vmlinux 0x7429fdb5 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0x744ba697 scsi_print_result +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x74671ed1 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x74693c74 balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x749fec56 mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0x74aa3f49 dm_table_get +EXPORT_SYMBOL vmlinux 0x74ac2e20 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x74b50ff8 kmap_high +EXPORT_SYMBOL vmlinux 0x74c9885e skb_store_bits +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74df7cd2 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x74fc6547 phy_disconnect +EXPORT_SYMBOL vmlinux 0x7504f0d3 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x752674e4 dev_load +EXPORT_SYMBOL vmlinux 0x75271716 save_processor_state +EXPORT_SYMBOL vmlinux 0x7596c63a udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x75a29387 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x75a7e9f0 __invalidate_device +EXPORT_SYMBOL vmlinux 0x75b04b3b nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x75bb325e submit_bio +EXPORT_SYMBOL vmlinux 0x75c8364c devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x75d1a672 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x75d6a99d set_disk_ro +EXPORT_SYMBOL vmlinux 0x7600a2ed d_invalidate +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x76138294 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x7673f5ef setup_arg_pages +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x76b0f8f8 bad_dma_address +EXPORT_SYMBOL vmlinux 0x76bd63e7 dquot_alloc +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76db3768 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x770293f2 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x770840aa mmc_free_host +EXPORT_SYMBOL vmlinux 0x770a0036 isapnp_cfg_begin +EXPORT_SYMBOL vmlinux 0x7729ac89 sget +EXPORT_SYMBOL vmlinux 0x772b955f cfb_imageblit +EXPORT_SYMBOL vmlinux 0x77339afa tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x77404000 llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x778359ee key_link +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77a2797f scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x77bd6499 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x7813cbcc sk_common_release +EXPORT_SYMBOL vmlinux 0x781d51b1 mmc_add_host +EXPORT_SYMBOL vmlinux 0x781f704a vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x782287e5 pcim_pin_device +EXPORT_SYMBOL vmlinux 0x783597a5 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x784c6515 ht_create_irq +EXPORT_SYMBOL vmlinux 0x785e96bd elevator_exit +EXPORT_SYMBOL vmlinux 0x78822df1 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78acc52b hci_send_acl +EXPORT_SYMBOL vmlinux 0x78ad7906 pci_reenable_device +EXPORT_SYMBOL vmlinux 0x78b53552 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x78c92ce9 dm_exception_store_create +EXPORT_SYMBOL vmlinux 0x78cb2783 down_write_trylock +EXPORT_SYMBOL vmlinux 0x78cfb963 unregister_8022_client +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x7903f595 misc_deregister +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x794487ee disable_hlt +EXPORT_SYMBOL vmlinux 0x79539d73 cdev_add +EXPORT_SYMBOL vmlinux 0x795abe5d dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x79691a8c inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x797b6fc0 sk_dst_check +EXPORT_SYMBOL vmlinux 0x798ddf16 set_binfmt +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79c89fbf __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0x79e2b49f dev_unicast_sync +EXPORT_SYMBOL vmlinux 0x79f0956f skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x79f8e1ab ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x7a153ff2 blk_insert_request +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a4efa9d mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x7a52369b journal_flush +EXPORT_SYMBOL vmlinux 0x7a78b15c jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7a939258 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x7a9d5ed7 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x7ab2e9f6 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x7ab9fc4e scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x7ad36a1b find_vma +EXPORT_SYMBOL vmlinux 0x7adc45bb revert_creds +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b134ddf acpi_get_name +EXPORT_SYMBOL vmlinux 0x7b3daecd pci_find_capability +EXPORT_SYMBOL vmlinux 0x7b3fccf2 dm_get_device +EXPORT_SYMBOL vmlinux 0x7b4709d4 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b6f3f1a tty_port_close_end +EXPORT_SYMBOL vmlinux 0x7b7aa67c input_inject_event +EXPORT_SYMBOL vmlinux 0x7b7d88e3 register_filesystem +EXPORT_SYMBOL vmlinux 0x7bd1e0ab bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x7bd681e1 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x7be1fd82 fb_pan_display +EXPORT_SYMBOL vmlinux 0x7bf785fe d_obtain_alias +EXPORT_SYMBOL vmlinux 0x7c0edd7d acpi_check_region +EXPORT_SYMBOL vmlinux 0x7c1b0a72 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x7c29eedb tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x7c3d2f6c dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c74e7c4 pci_get_device +EXPORT_SYMBOL vmlinux 0x7c8d7422 security_inode_init_security +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cc886d3 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x7cd2d1b7 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x7cdfb095 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x7cf936fb skb_queue_purge +EXPORT_SYMBOL vmlinux 0x7d0621aa dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d41667c blk_start_queue +EXPORT_SYMBOL vmlinux 0x7d5848b0 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x7d747daf journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x7d850275 user_revoke +EXPORT_SYMBOL vmlinux 0x7d925540 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x7d98cf64 scsi_free_command +EXPORT_SYMBOL vmlinux 0x7dbdeb11 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x7dc0e264 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7e34943b tcp_poll +EXPORT_SYMBOL vmlinux 0x7e4caf8b try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e9bf95b sync_page_range +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ebe8e42 inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0x7ec869d9 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x7ecb001b __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x7ed48ab7 generic_make_request +EXPORT_SYMBOL vmlinux 0x7eda327b page_put_link +EXPORT_SYMBOL vmlinux 0x7ee27dcc generic_file_open +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7eec3ba8 start_tty +EXPORT_SYMBOL vmlinux 0x7f16cb8a bio_copy_kern +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f4d75df request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x7f5a768f locks_copy_lock +EXPORT_SYMBOL vmlinux 0x7f627c14 pci_disable_msi +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f8bc59f find_or_create_page +EXPORT_SYMBOL vmlinux 0x7fce0871 phy_detach +EXPORT_SYMBOL vmlinux 0x7fe5c61b __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x7feaa2f8 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x8002ceef posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x8006987b sock_init_data +EXPORT_SYMBOL vmlinux 0x800ec62a pv_mmu_ops +EXPORT_SYMBOL vmlinux 0x8012394a arp_tbl +EXPORT_SYMBOL vmlinux 0x802647ec inet_bind +EXPORT_SYMBOL vmlinux 0x80540fbe pci_restore_state +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x8067489b dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0x806aef47 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x807697f1 __dst_free +EXPORT_SYMBOL vmlinux 0x807bbe94 get_user_pages +EXPORT_SYMBOL vmlinux 0x8090dc76 write_cache_pages +EXPORT_SYMBOL vmlinux 0x80af5b12 register_netdevice +EXPORT_SYMBOL vmlinux 0x80d648aa kobject_del +EXPORT_SYMBOL vmlinux 0x80da0eb9 km_report +EXPORT_SYMBOL vmlinux 0x8107e867 qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x810d6487 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x810f697d filp_open +EXPORT_SYMBOL vmlinux 0x8111b5cc netif_device_attach +EXPORT_SYMBOL vmlinux 0x81373049 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x8139ce6b netlink_dump_start +EXPORT_SYMBOL vmlinux 0x813d4bb4 rfkill_register +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815c56d0 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x8169d86d acpi_is_video_device +EXPORT_SYMBOL vmlinux 0x8173e992 set_groups +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x81833793 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x81d7c639 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x81ef9d1d dm_table_event +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x8235805b memmove +EXPORT_SYMBOL vmlinux 0x823e2ab9 wait_on_page_bit +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82575d44 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x8277e3ac seq_open +EXPORT_SYMBOL vmlinux 0x827cdab2 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x82c70eb6 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x82dcff6e nf_unregister_hook +EXPORT_SYMBOL vmlinux 0x82e4a181 kernel_accept +EXPORT_SYMBOL vmlinux 0x8317adcf ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x831f52d0 i2c_transfer +EXPORT_SYMBOL vmlinux 0x8341ef06 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x83435687 bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x838368f7 sk_run_filter +EXPORT_SYMBOL vmlinux 0x838397e7 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0x838a0c6a log_wait_commit +EXPORT_SYMBOL vmlinux 0x838ed781 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0x83964ce6 scm_detach_fds +EXPORT_SYMBOL vmlinux 0x83a47191 bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83a5e1e4 mnt_pin +EXPORT_SYMBOL vmlinux 0x83c92e58 scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x83fddcd3 ppp_input +EXPORT_SYMBOL vmlinux 0x8434ab2b blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x8456dea3 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x847bf8e3 i2c_release_client +EXPORT_SYMBOL vmlinux 0x848217f2 register_sysctl_table +EXPORT_SYMBOL vmlinux 0x8492d515 mmc_request_done +EXPORT_SYMBOL vmlinux 0x84b0e97c napi_frags_finish +EXPORT_SYMBOL vmlinux 0x84b4a664 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x84db4161 hci_alloc_dev +EXPORT_SYMBOL vmlinux 0x84f98f8b scsi_execute_req +EXPORT_SYMBOL vmlinux 0x84faacd9 genphy_config_advert +EXPORT_SYMBOL vmlinux 0x8506209a stop_tty +EXPORT_SYMBOL vmlinux 0x85081a51 md_unregister_thread +EXPORT_SYMBOL vmlinux 0x8517f54f elv_add_request +EXPORT_SYMBOL vmlinux 0x85400bcc lookup_bdev +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x857acc6d neigh_ifdown +EXPORT_SYMBOL vmlinux 0x857d099f jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x85809eee pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b3c4f4 __getblk +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x85e9462b scsi_device_get +EXPORT_SYMBOL vmlinux 0x85ed3734 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0x85fb1b67 kernel_connect +EXPORT_SYMBOL vmlinux 0x862380e5 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x863e1b7a sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86979a67 scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x86d3da1c skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x870c8f3c generic_setlease +EXPORT_SYMBOL vmlinux 0x8717854b sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x87182f51 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87a6946f pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x87b47a9e kobject_set_name +EXPORT_SYMBOL vmlinux 0x87cb3b15 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0x87db1f66 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x87e9add9 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x8800b8bd pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x88e6d7e1 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x88e88136 ioremap_prot +EXPORT_SYMBOL vmlinux 0x8911783a invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x89168857 xfrm_register_km +EXPORT_SYMBOL vmlinux 0x891e21c1 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x892929b3 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x8969b997 ida_get_new +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x89981105 dm_register_target +EXPORT_SYMBOL vmlinux 0x89994170 file_fsync +EXPORT_SYMBOL vmlinux 0x899e4d6b skb_copy +EXPORT_SYMBOL vmlinux 0x89b0fd02 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x89b3dc50 uart_suspend_port +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89d89751 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x89d8f95f mmc_alloc_host +EXPORT_SYMBOL vmlinux 0x89fb024a dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x8a076724 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x8a0f162e sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3baddb kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a6b3438 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a8f46b0 eth_type_trans +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8acfbba1 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x8ad76881 bio_sector_offset +EXPORT_SYMBOL vmlinux 0x8b076f61 seq_escape +EXPORT_SYMBOL vmlinux 0x8b18496f __copy_to_user_ll +EXPORT_SYMBOL vmlinux 0x8b202c1c otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x8b53ad07 tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b634344 copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8bbb9e68 kobject_add +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8be885bb dm_unregister_target +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c2ab2cd pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x8c2aff99 seq_lseek +EXPORT_SYMBOL vmlinux 0x8c39368c framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x8c616906 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x8c83c53d dev_get_by_name +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cfe4f3e tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x8d0b82a5 skb_dequeue +EXPORT_SYMBOL vmlinux 0x8d1fbd24 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0x8d298613 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x8d3095b1 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d512942 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6c463b get_sb_bdev +EXPORT_SYMBOL vmlinux 0x8d6f81b4 __div64_32 +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8dc4cae1 find_lock_page +EXPORT_SYMBOL vmlinux 0x8dc6e564 restore_processor_state +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8dd07694 sock_kmalloc +EXPORT_SYMBOL vmlinux 0x8df2f8da netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x8dfa8f58 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e0c73c3 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x8e0cd6ea bioset_create +EXPORT_SYMBOL vmlinux 0x8e13d626 skb_dma_map +EXPORT_SYMBOL vmlinux 0x8e16199d con_is_bound +EXPORT_SYMBOL vmlinux 0x8e5988b7 dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e888ec3 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x8e8a9a30 sysctl_data +EXPORT_SYMBOL vmlinux 0x8e9bc637 sk_wait_data +EXPORT_SYMBOL vmlinux 0x8ead72a4 kset_unregister +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8f062a5a bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x8f16c7fd tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x8f29b16c netif_receive_skb +EXPORT_SYMBOL vmlinux 0x8f39d318 hci_send_sco +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f516332 tty_port_close_start +EXPORT_SYMBOL vmlinux 0x8f5ca2d7 skb_push +EXPORT_SYMBOL vmlinux 0x8f5ef788 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0x8f5fb9cc bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f7d089e hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x8f9bc34b jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fbc7ce3 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x8fd74289 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x9009de1f inode_init_always +EXPORT_SYMBOL vmlinux 0x903df69b nlmsg_notify +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x905c3468 xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x905edad4 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x910e815e dma_set_mask +EXPORT_SYMBOL vmlinux 0x91229024 mpage_readpages +EXPORT_SYMBOL vmlinux 0x91247c71 cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0x913ec11d tty_unthrottle +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x9151559b netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x918ea9bd generic_readlink +EXPORT_SYMBOL vmlinux 0x91ae5d10 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x91e9f406 neigh_for_each +EXPORT_SYMBOL vmlinux 0x91f88252 xfrm_state_update +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x9259b3ce key_put +EXPORT_SYMBOL vmlinux 0x92858451 eisa_driver_register +EXPORT_SYMBOL vmlinux 0x92897e3d default_idle +EXPORT_SYMBOL vmlinux 0x92959a6d register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x92df948b __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x92f20ed1 key_validate +EXPORT_SYMBOL vmlinux 0x92fa81b3 km_state_expired +EXPORT_SYMBOL vmlinux 0x92fe5d83 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x931f7cb6 mca_device_set_claim +EXPORT_SYMBOL vmlinux 0x932459b3 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x9330cb9f sg_alloc_table +EXPORT_SYMBOL vmlinux 0x9385be14 pci_assign_resource +EXPORT_SYMBOL vmlinux 0x939122a0 __blk_end_request +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93b9e9c4 framebuffer_release +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93c7681e udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93ebb16e poll_initwait +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x940992da load_nls +EXPORT_SYMBOL vmlinux 0x941256fb sock_register +EXPORT_SYMBOL vmlinux 0x941deaf2 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x942ba999 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x94546c72 vc_resize +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94b541b5 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x94d1bf65 block_write_end +EXPORT_SYMBOL vmlinux 0x94de7447 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x9513cbb9 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x952061be lookup_one_len +EXPORT_SYMBOL vmlinux 0x95279efe devm_free_irq +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954b8d16 nf_reinject +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x958d8ab9 scsi_remove_host +EXPORT_SYMBOL vmlinux 0x95927b03 serial8250_register_port +EXPORT_SYMBOL vmlinux 0x959ddfd7 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x95b3b513 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x95cf1d98 handle_sysrq +EXPORT_SYMBOL vmlinux 0x95f5abb6 i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x96239d90 jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x9625d27b inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x9625e8dd scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x96348572 tty_kref_put +EXPORT_SYMBOL vmlinux 0x96431f54 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x9656a65e set_device_ro +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x968c1365 bio_map_kern +EXPORT_SYMBOL vmlinux 0x96953cef inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x96a30ea0 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0x96c7ae0a dev_remove_pack +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96de0dcc jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x96dfd340 open_by_devnum +EXPORT_SYMBOL vmlinux 0x96fe16c1 mca_device_set_name +EXPORT_SYMBOL vmlinux 0x97119fdb i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x9714b1c6 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x9717cc5b inode_needs_sync +EXPORT_SYMBOL vmlinux 0x9730bc38 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x974372e7 __devm_release_region +EXPORT_SYMBOL vmlinux 0x974d03df dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9755db53 xfrm_state_add +EXPORT_SYMBOL vmlinux 0x97600595 __breadahead +EXPORT_SYMBOL vmlinux 0x976aa710 skb_trim +EXPORT_SYMBOL vmlinux 0x977c8cb6 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x9785c29b dquot_commit_info +EXPORT_SYMBOL vmlinux 0x979f5fbf unregister_qdisc +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x9822975a pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x98317b92 dma_pool_free +EXPORT_SYMBOL vmlinux 0x9840c4c6 ip_ct_attach +EXPORT_SYMBOL vmlinux 0x985518b7 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x986d3bd8 llc_add_pack +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x989b3676 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x98a178b6 kmap_atomic +EXPORT_SYMBOL vmlinux 0x98b75b8e drop_super +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98bd12d3 blk_run_queue +EXPORT_SYMBOL vmlinux 0x98d96fc5 fb_is_primary_device +EXPORT_SYMBOL vmlinux 0x98fdc86f scsi_device_resume +EXPORT_SYMBOL vmlinux 0x99052a84 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x99223e0e fb_set_cmap +EXPORT_SYMBOL vmlinux 0x99396e1e blk_queue_make_request +EXPORT_SYMBOL vmlinux 0x994623a8 simple_lookup +EXPORT_SYMBOL vmlinux 0x996189fd inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x99658cae journal_get_create_access +EXPORT_SYMBOL vmlinux 0x99738d15 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x99753e68 unregister_netdev +EXPORT_SYMBOL vmlinux 0x99886712 __scm_send +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x999fe604 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x99a1e55b __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x99a4ff56 module_layout +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99dd656c nonseekable_open +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a0ff0f6 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a27079d jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x9a41d8d0 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x9a42f9c0 scsi_dma_map +EXPORT_SYMBOL vmlinux 0x9a4ab819 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x9a53e838 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0x9a6a83f9 cmos_lock +EXPORT_SYMBOL vmlinux 0x9a72fcec inet_ioctl +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9abc0e3f sock_no_bind +EXPORT_SYMBOL vmlinux 0x9ac12f65 km_new_mapping +EXPORT_SYMBOL vmlinux 0x9ae155ad do_sync_write +EXPORT_SYMBOL vmlinux 0x9afd2451 generic_block_bmap +EXPORT_SYMBOL vmlinux 0x9b1b3393 dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b3c7bfb xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x9b4de8eb idr_replace +EXPORT_SYMBOL vmlinux 0x9b549b69 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x9b555d3f dma_pool_create +EXPORT_SYMBOL vmlinux 0x9b66f94f generic_permission +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b7b4b18 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x9b866586 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x9b9d351c shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x9ba1b408 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bd95f03 page_symlink +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c13242c bitmap_endwrite +EXPORT_SYMBOL vmlinux 0x9c1f4533 dquot_acquire +EXPORT_SYMBOL vmlinux 0x9c23b83b xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x9c26fa78 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x9c2c944a __copy_from_user_ll_nocache_nozero +EXPORT_SYMBOL vmlinux 0x9c3fe5c2 mca_register_driver_integrated +EXPORT_SYMBOL vmlinux 0x9c5bd671 generic_osync_inode +EXPORT_SYMBOL vmlinux 0x9c7077bd enable_hlt +EXPORT_SYMBOL vmlinux 0x9c8bb716 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x9ca303d9 pci_enable_wake +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cbabb82 pnp_possible_config +EXPORT_SYMBOL vmlinux 0x9cbb1cb7 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9cd6840b block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x9ce0d9fd d_validate +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cebacb2 pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cf849a0 do_splice_from +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9cfdcf4c __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x9d0cebea xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x9d2fb88b unregister_binfmt +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d36ff3b lease_get_mtime +EXPORT_SYMBOL vmlinux 0x9d6c6ae2 xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x9d9f0d41 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x9da35719 inet_getname +EXPORT_SYMBOL vmlinux 0x9dadf7e9 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x9de0a222 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x9deb6290 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x9debdd26 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x9e088166 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0x9e1f6781 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e547e39 serio_unregister_port +EXPORT_SYMBOL vmlinux 0x9e64803a input_flush_device +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e672ff6 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e993291 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9edfd90e dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9eefa099 __put_cred +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f02e8f6 rfkill_destroy +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f34d4e7 seq_release +EXPORT_SYMBOL vmlinux 0x9f37ba0f blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x9f4bc875 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x9f608202 xrlim_allow +EXPORT_SYMBOL vmlinux 0x9f6ca677 tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x9f73697c pid_task +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x9fc84e85 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x9fd5846d alloc_trdev +EXPORT_SYMBOL vmlinux 0x9ff73bcc bmap +EXPORT_SYMBOL vmlinux 0xa0048feb otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xa004b717 arp_xmit +EXPORT_SYMBOL vmlinux 0xa006f790 dmam_release_declared_memory +EXPORT_SYMBOL vmlinux 0xa01d9413 bitmap_startwrite +EXPORT_SYMBOL vmlinux 0xa021793c simple_rmdir +EXPORT_SYMBOL vmlinux 0xa02b2407 igrab +EXPORT_SYMBOL vmlinux 0xa02c4c18 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa04aa7d0 lock_rename +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa0688f2a pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0xa079fa37 ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0xa0975946 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xa097ee7c mca_device_status +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0da676a input_free_device +EXPORT_SYMBOL vmlinux 0xa0dd6900 serio_interrupt +EXPORT_SYMBOL vmlinux 0xa0f0d528 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa11ebd13 xfrm4_rcv +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa15b36bd i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0xa16b90d4 ipv4_specific +EXPORT_SYMBOL vmlinux 0xa1714283 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xa19200c7 blk_start_request +EXPORT_SYMBOL vmlinux 0xa19f4155 md_write_end +EXPORT_SYMBOL vmlinux 0xa1a5120c neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1be2508 alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa23696a6 dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xa2400a97 tcp_splice_read +EXPORT_SYMBOL vmlinux 0xa24bb6fc simple_unlink +EXPORT_SYMBOL vmlinux 0xa253e079 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xa2619132 seq_write +EXPORT_SYMBOL vmlinux 0xa276fbf6 hci_conn_put_device +EXPORT_SYMBOL vmlinux 0xa27865da get_empty_filp +EXPORT_SYMBOL vmlinux 0xa297b9ae tcp_disconnect +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2ab58b3 mmc_release_host +EXPORT_SYMBOL vmlinux 0xa2b10bfd skb_checksum +EXPORT_SYMBOL vmlinux 0xa2c2e322 d_splice_alias +EXPORT_SYMBOL vmlinux 0xa2e7be6b kset_register +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa3541a81 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xa35c1f05 acpi_extract_package +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa3729d08 mdiobus_free +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa3fe81a2 register_8022_client +EXPORT_SYMBOL vmlinux 0xa42c5af3 mca_register_driver +EXPORT_SYMBOL vmlinux 0xa4318214 phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa461bd19 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xa473d792 bd_release +EXPORT_SYMBOL vmlinux 0xa484cd4a scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xa492903d seq_path +EXPORT_SYMBOL vmlinux 0xa4ab7e8c kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4df4e1d alloc_fddidev +EXPORT_SYMBOL vmlinux 0xa4f591e7 vfs_quota_on +EXPORT_SYMBOL vmlinux 0xa51cdfe8 __FIXADDR_TOP +EXPORT_SYMBOL vmlinux 0xa52d3eb9 iput +EXPORT_SYMBOL vmlinux 0xa55dc33b xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa58e36a3 aio_put_req +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa59f9443 file_permission +EXPORT_SYMBOL vmlinux 0xa5a633b9 sg_last +EXPORT_SYMBOL vmlinux 0xa5a8c4ae dev_addr_add +EXPORT_SYMBOL vmlinux 0xa5b105dd __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xa5c940a1 eth_mac_addr +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa5da0abd acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0xa61ad038 blk_plug_device +EXPORT_SYMBOL vmlinux 0xa6270454 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa6436f9b neigh_parms_release +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa697269b set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0xa6d87875 dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6dcd22e kmem_cache_free +EXPORT_SYMBOL vmlinux 0xa6eb6cb9 bd_set_size +EXPORT_SYMBOL vmlinux 0xa7046549 vprintk +EXPORT_SYMBOL vmlinux 0xa706891d scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0xa7099261 fb_validate_mode +EXPORT_SYMBOL vmlinux 0xa70ec896 posix_lock_file +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71e7463 __first_cpu +EXPORT_SYMBOL vmlinux 0xa72008ad dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xa750cdf4 register_md_personality +EXPORT_SYMBOL vmlinux 0xa75fd059 mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0xa79b5b66 pci_release_region +EXPORT_SYMBOL vmlinux 0xa7ad0d17 dst_discard +EXPORT_SYMBOL vmlinux 0xa7b25117 pnp_is_active +EXPORT_SYMBOL vmlinux 0xa7c82dfb get_disk +EXPORT_SYMBOL vmlinux 0xa810dd96 proc_create_data +EXPORT_SYMBOL vmlinux 0xa82aa76c nla_put +EXPORT_SYMBOL vmlinux 0xa8802de4 tcf_register_action +EXPORT_SYMBOL vmlinux 0xa8990816 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0xa89acbb3 acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xa8a89429 udp_disconnect +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8d8344f serio_rescan +EXPORT_SYMBOL vmlinux 0xa8ea3497 isapnp_protocol +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa91e2966 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xa920dd44 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xa95cd226 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0xa98e3880 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0xa9bd2676 __vmalloc +EXPORT_SYMBOL vmlinux 0xa9be668e sk_free +EXPORT_SYMBOL vmlinux 0xa9c28346 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0xa9c6804d pcibios_set_irq_routing +EXPORT_SYMBOL vmlinux 0xa9cb1bf4 fput +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa1a23e6 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xaa2c2a75 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xaa307629 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0xaa4207b0 eth_change_mtu +EXPORT_SYMBOL vmlinux 0xaa53e860 journal_destroy +EXPORT_SYMBOL vmlinux 0xaa7a542e end_page_writeback +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaaaaacd1 ioremap_wc +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaaebe34f mca_write_pos +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab098efd pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab620332 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab8f5306 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xabbeb6fd netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd2eab5 notify_change +EXPORT_SYMBOL vmlinux 0xabd755fd scsi_device_put +EXPORT_SYMBOL vmlinux 0xabf05885 xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0xabf9b4aa input_get_keycode +EXPORT_SYMBOL vmlinux 0xac207fc2 cont_write_begin +EXPORT_SYMBOL vmlinux 0xac24c2cd mdiobus_alloc +EXPORT_SYMBOL vmlinux 0xac54a091 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0xac581844 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac6b5aa0 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xac8ab58d phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0xac901ea8 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xac928474 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xac934894 pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0xac9463a3 md_error +EXPORT_SYMBOL vmlinux 0xaca83239 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xacc0ad4e cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xacf7993c ppp_register_compressor +EXPORT_SYMBOL vmlinux 0xacfe7d3f tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad2635e1 mutex_unlock +EXPORT_SYMBOL vmlinux 0xad3afaf7 km_policy_notify +EXPORT_SYMBOL vmlinux 0xad461e77 lookup_hash +EXPORT_SYMBOL vmlinux 0xad677bb7 set_pages_array_wb +EXPORT_SYMBOL vmlinux 0xada398c8 ps2_handle_response +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xade05006 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xadef6f70 seq_release_private +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xadfce80b xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0xae34ae93 pci_dev_get +EXPORT_SYMBOL vmlinux 0xae49bcea mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae51a02a wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xae75f004 ida_destroy +EXPORT_SYMBOL vmlinux 0xae97aa4b gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xae985657 __destroy_inode +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaecf7699 __napi_complete +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaf127035 seq_read +EXPORT_SYMBOL vmlinux 0xaf14ae69 __lock_buffer +EXPORT_SYMBOL vmlinux 0xaf1c4613 vfs_write +EXPORT_SYMBOL vmlinux 0xaf2cbe88 journal_abort +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf42b4cb d_add_ci +EXPORT_SYMBOL vmlinux 0xaf464221 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0xaf464a72 mpage_writepage +EXPORT_SYMBOL vmlinux 0xaf4b1540 acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xaf886b74 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0xafbafb4c dm_io_client_create +EXPORT_SYMBOL vmlinux 0xafc8b99c prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xafcbcbc5 blk_integrity_register +EXPORT_SYMBOL vmlinux 0xafcdb741 module_refcount +EXPORT_SYMBOL vmlinux 0xafe01377 down_read +EXPORT_SYMBOL vmlinux 0xafe55c3f xfrm_state_flush +EXPORT_SYMBOL vmlinux 0xb0102bc7 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xb02aa24b fib_default_rule_add +EXPORT_SYMBOL vmlinux 0xb05b1e5e thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0xb06c10e9 security_path_link +EXPORT_SYMBOL vmlinux 0xb077ef32 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb07ef64e do_sync_read +EXPORT_SYMBOL vmlinux 0xb08f76ad gen_pool_free +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0bd0d1f kick_iocb +EXPORT_SYMBOL vmlinux 0xb0cbb4a8 pci_release_regions +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0ecf5cd dm_table_put +EXPORT_SYMBOL vmlinux 0xb0ed8977 xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0xb0fd94d5 scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0xb106f568 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb13c4dba down_write +EXPORT_SYMBOL vmlinux 0xb14386cc elv_rb_add +EXPORT_SYMBOL vmlinux 0xb14fc398 block_prepare_write +EXPORT_SYMBOL vmlinux 0xb1716d2c f_setown +EXPORT_SYMBOL vmlinux 0xb17d79c8 zero_fill_bio +EXPORT_SYMBOL vmlinux 0xb189b8ce inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1c7065c phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f1783c acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb1fb90f3 install_exec_creds +EXPORT_SYMBOL vmlinux 0xb2171b7c scsi_register +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2422bb1 input_register_handle +EXPORT_SYMBOL vmlinux 0xb25390ff scsi_put_command +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb26c8cab pci_request_region +EXPORT_SYMBOL vmlinux 0xb27510ef atomic64_inc_return +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb28a7b2a inet_add_protocol +EXPORT_SYMBOL vmlinux 0xb29bc8bd idr_remove +EXPORT_SYMBOL vmlinux 0xb29db295 xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xb2d54b82 inet_put_port +EXPORT_SYMBOL vmlinux 0xb2dbb632 init_file +EXPORT_SYMBOL vmlinux 0xb2e51f3e nf_afinfo +EXPORT_SYMBOL vmlinux 0xb2efb6be mca_read_stored_pos +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb30abf8d idr_get_new_above +EXPORT_SYMBOL vmlinux 0xb31526ee sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb37bfa13 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0xb39455a0 pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3c2c481 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xb3df9971 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0xb3e0590d acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0xb409b4b7 sk_stop_timer +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb42af30a blk_init_tags +EXPORT_SYMBOL vmlinux 0xb435a6ff xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0xb44591a9 set_pages_wb +EXPORT_SYMBOL vmlinux 0xb453533f netpoll_poll +EXPORT_SYMBOL vmlinux 0xb454f398 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0xb45578b8 memscan +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb4c92354 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb4cebb2a tty_free_termios +EXPORT_SYMBOL vmlinux 0xb4e40991 __f_setown +EXPORT_SYMBOL vmlinux 0xb4e4e514 do_truncate +EXPORT_SYMBOL vmlinux 0xb4efe0a6 pci_read_vpd +EXPORT_SYMBOL vmlinux 0xb4f6ec45 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0xb4fdedc9 bitmap_unplug +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb53bdf02 search_binary_handler +EXPORT_SYMBOL vmlinux 0xb5418861 atomic64_add +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a065b2 pci_find_device +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5bce27e set_pages_array_uc +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb642d3d6 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xb6480c14 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb680f8b0 loop_register_transfer +EXPORT_SYMBOL vmlinux 0xb6896671 crc_t10dif +EXPORT_SYMBOL vmlinux 0xb692b34e pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xb69dedd4 dev_change_flags +EXPORT_SYMBOL vmlinux 0xb6a215b1 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0xb6a4890c km_state_notify +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6d5937d scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb6ec609c file_remove_suid +EXPORT_SYMBOL vmlinux 0xb6ed1e53 strncpy +EXPORT_SYMBOL vmlinux 0xb6f3f601 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb7156145 request_key_async +EXPORT_SYMBOL vmlinux 0xb72397d5 printk +EXPORT_SYMBOL vmlinux 0xb744264f tty_write_room +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb7874c5d blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xb78a85ff dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb79a6701 cdev_init +EXPORT_SYMBOL vmlinux 0xb7a8afff blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7c56e17 may_umount +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7f44f88 inet6_register_protosw +EXPORT_SYMBOL vmlinux 0xb803c9df ndisc_send_rs +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81ca4cd tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0xb82af0ad ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0xb82d2e1f close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xb839398a rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xb844435a unregister_snap_client +EXPORT_SYMBOL vmlinux 0xb85fbc58 genl_register_ops +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb891e895 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0xb8955ef9 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb8d70e88 netif_rx +EXPORT_SYMBOL vmlinux 0xb8e55899 uart_register_driver +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb90babd4 nf_getsockopt +EXPORT_SYMBOL vmlinux 0xb922d801 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xb942b513 smp_call_function_many +EXPORT_SYMBOL vmlinux 0xb9786e8c vfs_create +EXPORT_SYMBOL vmlinux 0xb9790153 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb99ec25e backlight_device_register +EXPORT_SYMBOL vmlinux 0xb9a1578f generic_removexattr +EXPORT_SYMBOL vmlinux 0xb9bb871b rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0xb9d1b778 ip6_frag_init +EXPORT_SYMBOL vmlinux 0xb9faec82 tty_name +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba4706fe bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbab0e1d5 destroy_EII_client +EXPORT_SYMBOL vmlinux 0xbab8a3a8 kmem_cache_create +EXPORT_SYMBOL vmlinux 0xbacb7c81 skb_put +EXPORT_SYMBOL vmlinux 0xbaf38aa8 deny_write_access +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb3926e0 inet6_bind +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb7f1476 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0xbb89de17 ida_init +EXPORT_SYMBOL vmlinux 0xbb9d24cb splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0xbb9fee3e __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0xbbf7a424 audit_log_format +EXPORT_SYMBOL vmlinux 0xbbfb497d arp_send +EXPORT_SYMBOL vmlinux 0xbc10a1c0 blk_put_request +EXPORT_SYMBOL vmlinux 0xbc1ebec2 mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0xbc47f71f ppp_channel_index +EXPORT_SYMBOL vmlinux 0xbc5768d8 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0xbc6b04e2 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xbc6b9e36 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbd2c9fa1 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0xbda66106 tcf_hash_search +EXPORT_SYMBOL vmlinux 0xbdaf48fd uart_unregister_driver +EXPORT_SYMBOL vmlinux 0xbdcff87f scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xbde69cde security_path_rmdir +EXPORT_SYMBOL vmlinux 0xbdecf0c9 skb_split +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe132e64 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xbe216ff9 should_remove_suid +EXPORT_SYMBOL vmlinux 0xbe33ccc3 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0xbe552686 napi_gro_receive +EXPORT_SYMBOL vmlinux 0xbe5fe9d7 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe79c624 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0xbe7f1dcb pci_pme_capable +EXPORT_SYMBOL vmlinux 0xbe952922 set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xbe9de944 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0xbea6aa19 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xbeae29e7 pci_find_next_bus +EXPORT_SYMBOL vmlinux 0xbeb196d5 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0xbec49c25 mmc_align_data_size +EXPORT_SYMBOL vmlinux 0xbed9855f ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xbedd9a50 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf13b163 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0xbf75685d sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf8b39e9 isapnp_present +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc01eed33 __copy_from_user_ll_nozero +EXPORT_SYMBOL vmlinux 0xc023a6ee blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc070665a skb_checksum_help +EXPORT_SYMBOL vmlinux 0xc09de6a7 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0d52a19 ip6_frag_match +EXPORT_SYMBOL vmlinux 0xc0e1943b journal_init_dev +EXPORT_SYMBOL vmlinux 0xc0ea9805 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xc0f65988 machine_real_restart +EXPORT_SYMBOL vmlinux 0xc1040bbd iget_failed +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc136ddd2 sock_i_uid +EXPORT_SYMBOL vmlinux 0xc13da2e2 kmem_cache_name +EXPORT_SYMBOL vmlinux 0xc1593a19 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xc16173ce linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0xc1640238 inode_permission +EXPORT_SYMBOL vmlinux 0xc180c0bc acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xc18a8e7a jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xc197ca0a sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0xc19c8163 atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0xc1d00cac pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xc1e1cf83 netpoll_cleanup +EXPORT_SYMBOL vmlinux 0xc1e39eca cdev_del +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc225300b genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xc251fa67 d_alloc_name +EXPORT_SYMBOL vmlinux 0xc2546bbb keyring_clear +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc26ea1e3 vfs_getattr +EXPORT_SYMBOL vmlinux 0xc27ec782 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0xc280a525 __copy_from_user_ll +EXPORT_SYMBOL vmlinux 0xc2b84079 cdrom_release +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f3ed4b seq_puts +EXPORT_SYMBOL vmlinux 0xc33cd9f8 find_get_page +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc357a041 d_alloc +EXPORT_SYMBOL vmlinux 0xc35904a1 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0xc3788f23 nf_log_register +EXPORT_SYMBOL vmlinux 0xc3a5f37e tcp_sendmsg +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3cfc1d7 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0xc3fa6a59 memchr +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc4051183 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xc429eafc page_readlink +EXPORT_SYMBOL vmlinux 0xc43c3e22 tty_port_close +EXPORT_SYMBOL vmlinux 0xc440397e scsi_host_get +EXPORT_SYMBOL vmlinux 0xc44287c6 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xc47051a5 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xc485a26d do_splice_to +EXPORT_SYMBOL vmlinux 0xc48beb50 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0xc4945662 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4adc1bb proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xc4bc23e8 free_task +EXPORT_SYMBOL vmlinux 0xc4de8105 phy_start_aneg +EXPORT_SYMBOL vmlinux 0xc4f2b83e hippi_type_trans +EXPORT_SYMBOL vmlinux 0xc4f8a14e br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0xc4ff608a add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc5718627 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0xc57a7cec put_tty_driver +EXPORT_SYMBOL vmlinux 0xc5a37d65 phy_attach +EXPORT_SYMBOL vmlinux 0xc5a55300 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0xc5deeaa6 pci_save_state +EXPORT_SYMBOL vmlinux 0xc605fc0b md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc63a508c update_region +EXPORT_SYMBOL vmlinux 0xc64b8442 copy_io_context +EXPORT_SYMBOL vmlinux 0xc6539819 netdev_features_change +EXPORT_SYMBOL vmlinux 0xc659f267 kobject_init +EXPORT_SYMBOL vmlinux 0xc66333f6 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xc66fb53e seq_bitmap +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc68d13c5 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0xc6c84e5b d_path +EXPORT_SYMBOL vmlinux 0xc6ee9e5f sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xc6f897a2 skb_make_writable +EXPORT_SYMBOL vmlinux 0xc6f9485a nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0xc709de03 udp_proc_register +EXPORT_SYMBOL vmlinux 0xc7131591 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc723d380 vfs_rmdir +EXPORT_SYMBOL vmlinux 0xc72f4722 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0xc745a84f nf_setsockopt +EXPORT_SYMBOL vmlinux 0xc766dcd5 textsearch_register +EXPORT_SYMBOL vmlinux 0xc768de19 cpu_all_bits +EXPORT_SYMBOL vmlinux 0xc78c1224 scsi_block_requests +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7e1a72d create_empty_buffers +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc8098303 d_genocide +EXPORT_SYMBOL vmlinux 0xc821be49 sock_create_kern +EXPORT_SYMBOL vmlinux 0xc84f0b6e cdev_index +EXPORT_SYMBOL vmlinux 0xc88decc4 replace_mount_options +EXPORT_SYMBOL vmlinux 0xc891bd18 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0xc898625d atomic64_inc_and_test +EXPORT_SYMBOL vmlinux 0xc8b01217 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8cb3271 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xc8e7b130 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0xc946787f pv_irq_ops +EXPORT_SYMBOL vmlinux 0xc95503b1 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xc9739310 xfrm6_rcv +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9cd0c57 __blk_run_queue +EXPORT_SYMBOL vmlinux 0xc9d9901a bdi_register_dev +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xc9f7fe6e skb_insert +EXPORT_SYMBOL vmlinux 0xca17d0c9 dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0xca1dba08 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0xca20ad7f sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca83720c get_phy_id +EXPORT_SYMBOL vmlinux 0xca852178 inet_register_protosw +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xcaa197a1 generic_file_llseek +EXPORT_SYMBOL vmlinux 0xcab06f9f mmc_resume_host +EXPORT_SYMBOL vmlinux 0xcab75514 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xcaef69e0 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xcaf195ff dev_get_by_flags +EXPORT_SYMBOL vmlinux 0xcb43e1c7 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0xcb4ac2ac __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb80a63f neigh_seq_stop +EXPORT_SYMBOL vmlinux 0xcb82cd1f is_bad_inode +EXPORT_SYMBOL vmlinux 0xcbb5da1d dst_release +EXPORT_SYMBOL vmlinux 0xcbea6d99 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0xcc033dde dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0xcc0f29b1 dquot_release +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc52f223 input_register_device +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcca0fe80 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xccd1364f scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0xccdb6de6 nf_register_hooks +EXPORT_SYMBOL vmlinux 0xcd000cea call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcd0f1864 d_rehash +EXPORT_SYMBOL vmlinux 0xcd2f753c key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xcd4f8a58 pnp_get_resource +EXPORT_SYMBOL vmlinux 0xcd526c55 __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xcd610db6 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xcd7f20e7 journal_load +EXPORT_SYMBOL vmlinux 0xcd91dfc2 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0xcd9e8769 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xcdb06d3c vfs_readlink +EXPORT_SYMBOL vmlinux 0xcdc8c767 tty_port_init +EXPORT_SYMBOL vmlinux 0xcdd8d64b alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0xcdee0b85 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0xcdfe7f9e dquot_commit +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce247fc6 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce381e71 hci_register_proto +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce6fda4d arp_broken_ops +EXPORT_SYMBOL vmlinux 0xce964f58 rfkill_blocked +EXPORT_SYMBOL vmlinux 0xce97fc57 pipe_lock +EXPORT_SYMBOL vmlinux 0xcead8a22 dst_destroy +EXPORT_SYMBOL vmlinux 0xcee7cba7 current_fs_time +EXPORT_SYMBOL vmlinux 0xcef674e9 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf0f58dc rt6_lookup +EXPORT_SYMBOL vmlinux 0xcf1afc22 do_SAK +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf2ab8ac pskb_copy +EXPORT_SYMBOL vmlinux 0xcf2c4e33 phy_driver_register +EXPORT_SYMBOL vmlinux 0xcf616348 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xcf988670 set_anon_super +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfc1652c __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xcfcfc6f6 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xcfedcaf6 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xcff1bdcd bio_integrity_split +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd01fa9f9 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xd0279b53 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0xd04e72a1 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd0951709 release_sock +EXPORT_SYMBOL vmlinux 0xd0b8a36e netdev_class_create_file +EXPORT_SYMBOL vmlinux 0xd0d8621b strlen +EXPORT_SYMBOL vmlinux 0xd0e53b68 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0f8ad17 dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0xd1307eb5 scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0xd133e101 blk_requeue_request +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd1791875 __elv_add_request +EXPORT_SYMBOL vmlinux 0xd180c258 phy_print_status +EXPORT_SYMBOL vmlinux 0xd18a9194 dev_driver_string +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd192641e insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xd1ce314c uart_write_wakeup +EXPORT_SYMBOL vmlinux 0xd1e890f9 kunmap_atomic +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd20050b9 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0xd21099a2 __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0xd21be14a cdrom_mode_select +EXPORT_SYMBOL vmlinux 0xd2315d31 sk_release_kernel +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd276c294 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xd29274e3 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a6b224 vfs_statfs +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2a941d4 sg_init_table +EXPORT_SYMBOL vmlinux 0xd2bb1c3c nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xd2c0e8c4 ll_rw_block +EXPORT_SYMBOL vmlinux 0xd2e92c4f jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xd2f8d0b4 arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xd31e571b unmap_mapping_range +EXPORT_SYMBOL vmlinux 0xd32e52c7 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0xd34762b3 md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd35ef64f filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xd35f61f7 scsi_scan_target +EXPORT_SYMBOL vmlinux 0xd3639290 kmap +EXPORT_SYMBOL vmlinux 0xd36c7021 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xd376511c proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd415ce62 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0xd4164c71 simple_link +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd440afdf vfs_link +EXPORT_SYMBOL vmlinux 0xd45cd64c qdisc_reset +EXPORT_SYMBOL vmlinux 0xd461e403 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0xd480c3e7 bio_init +EXPORT_SYMBOL vmlinux 0xd48f9586 skb_pull +EXPORT_SYMBOL vmlinux 0xd4c9de6b ndisc_send_skb +EXPORT_SYMBOL vmlinux 0xd4ccf64c vfs_rename +EXPORT_SYMBOL vmlinux 0xd4e6245c sock_no_listen +EXPORT_SYMBOL vmlinux 0xd4e733bc ilookup5 +EXPORT_SYMBOL vmlinux 0xd4f2db0a tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xd4f31941 seq_open_private +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd57a2fbc __sk_dst_check +EXPORT_SYMBOL vmlinux 0xd580f20b cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0xd5ea4a75 eth_validate_addr +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd66dcc3f ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0xd68412e7 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0xd68505be register_qdisc +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6ddab7e security_path_symlink +EXPORT_SYMBOL vmlinux 0xd6ecb5f5 dput +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd7601572 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0xd7672c0d dev_gro_receive +EXPORT_SYMBOL vmlinux 0xd76fad3c md_done_sync +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd784c247 set_pages_x +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd79eb70e acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7bb9a69 inode_setattr +EXPORT_SYMBOL vmlinux 0xd7bfd539 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xd7c1e431 ilookup +EXPORT_SYMBOL vmlinux 0xd7c22aab hci_unregister_cb +EXPORT_SYMBOL vmlinux 0xd7d2e83e acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xd7d36d1a idr_find +EXPORT_SYMBOL vmlinux 0xd7d67687 get_io_context +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd7f4c873 in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xd82613c0 atomic64_sub_and_test +EXPORT_SYMBOL vmlinux 0xd8282ff0 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8412868 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xd84d6c5e tty_hung_up_p +EXPORT_SYMBOL vmlinux 0xd84ea19b consume_skb +EXPORT_SYMBOL vmlinux 0xd8819fa1 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8a65c38 atomic64_sub +EXPORT_SYMBOL vmlinux 0xd8c238b4 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xd8cb076e iget5_locked +EXPORT_SYMBOL vmlinux 0xd8cc8ab6 inet6_ioctl +EXPORT_SYMBOL vmlinux 0xd8d3df14 i2c_use_client +EXPORT_SYMBOL vmlinux 0xd8d59f41 bio_split +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8eb697f scsi_scan_host +EXPORT_SYMBOL vmlinux 0xd8fa77bf __rta_fill +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd92a42dd bdi_unregister +EXPORT_SYMBOL vmlinux 0xd92fdab7 pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9942535 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0xd996d859 idr_pre_get +EXPORT_SYMBOL vmlinux 0xd99e29ed qdisc_list_del +EXPORT_SYMBOL vmlinux 0xd9a75f49 hci_conn_security +EXPORT_SYMBOL vmlinux 0xd9c272aa mca_mark_as_unused +EXPORT_SYMBOL vmlinux 0xd9c552d7 km_policy_expired +EXPORT_SYMBOL vmlinux 0xd9c5ea4c thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0xd9cff47d cfb_fillrect +EXPORT_SYMBOL vmlinux 0xd9f02495 dma_supported +EXPORT_SYMBOL vmlinux 0xda04b1fd console_start +EXPORT_SYMBOL vmlinux 0xda08c0d7 pcibios_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda0bcd0c acpi_root_dir +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda28be80 iunique +EXPORT_SYMBOL vmlinux 0xda45583f tcp_sync_mss +EXPORT_SYMBOL vmlinux 0xda522857 proc_mkdir +EXPORT_SYMBOL vmlinux 0xda75b874 vfs_symlink +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8fd495 isapnp_write_byte +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xdaa05a2e nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xdaa19ae4 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdaf4f78e inet_accept +EXPORT_SYMBOL vmlinux 0xdb12c6ef pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xdb266820 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xdb2cbac9 phy_start +EXPORT_SYMBOL vmlinux 0xdb45a599 __free_pages +EXPORT_SYMBOL vmlinux 0xdb494f5c __bread +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb686b2e scsi_target_resume +EXPORT_SYMBOL vmlinux 0xdb6d2140 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0xdb72bf07 mpage_writepages +EXPORT_SYMBOL vmlinux 0xdb83b913 rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdbb4c44b tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xdbb9370c sock_rfree +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbdc4c66 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xdbeb8608 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xdbf4621a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xdbf8c73b __brelse +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc284c61 key_revoke +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc319cbc kobject_get +EXPORT_SYMBOL vmlinux 0xdc337f68 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc47fbbc dump_trace +EXPORT_SYMBOL vmlinux 0xdc6500cd pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdc9e3fbb fsync_bdev +EXPORT_SYMBOL vmlinux 0xdcb26023 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0xdcc27906 init_net +EXPORT_SYMBOL vmlinux 0xdcdf3548 kill_pgrp +EXPORT_SYMBOL vmlinux 0xdce824de xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0xdcf35648 mdiobus_write +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd222cc6 tcp_child_process +EXPORT_SYMBOL vmlinux 0xdd588acb dquot_drop +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xddb34d43 bdget +EXPORT_SYMBOL vmlinux 0xddbea42d bt_sock_poll +EXPORT_SYMBOL vmlinux 0xddd33b74 set_user_nice +EXPORT_SYMBOL vmlinux 0xdddda207 tcf_hash_create +EXPORT_SYMBOL vmlinux 0xddfa4f3f arp_create +EXPORT_SYMBOL vmlinux 0xde1fd694 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0xde7119df rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf171fdc commit_creds +EXPORT_SYMBOL vmlinux 0xdf2603da __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf735a72 kunmap_high +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf8cf1b3 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfe76454 dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0xe00d0095 netif_carrier_on +EXPORT_SYMBOL vmlinux 0xe029f268 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xe03f2ffe journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xe045cdca tty_hangup +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe07e96cc kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xe094ef39 sg_next +EXPORT_SYMBOL vmlinux 0xe0a501e3 idr_remove_all +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0bc5dce pagevec_lookup +EXPORT_SYMBOL vmlinux 0xe0caa929 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0xe0db8fa6 pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xe0e7a913 skb_clone +EXPORT_SYMBOL vmlinux 0xe0f105a3 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0xe10deaf6 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xe12913c1 sock_create_lite +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe1402288 dmam_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0xe14192d7 sock_i_ino +EXPORT_SYMBOL vmlinux 0xe15aeee2 downgrade_write +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1783dfb pci_set_power_state +EXPORT_SYMBOL vmlinux 0xe17b6ec1 blk_complete_request +EXPORT_SYMBOL vmlinux 0xe17c43d0 journal_wipe +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1b01db7 thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0xe1cad3a0 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0xe1cf31cb redraw_screen +EXPORT_SYMBOL vmlinux 0xe1d387a8 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xe1defd6f pnp_activate_dev +EXPORT_SYMBOL vmlinux 0xe1e6f296 netif_device_detach +EXPORT_SYMBOL vmlinux 0xe1f45b0d __find_get_block +EXPORT_SYMBOL vmlinux 0xe22d7272 blk_end_request_all +EXPORT_SYMBOL vmlinux 0xe23787ed input_unregister_device +EXPORT_SYMBOL vmlinux 0xe24d29ac pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe2572a55 __pagevec_release +EXPORT_SYMBOL vmlinux 0xe25c1bf2 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xe27703e2 security_path_unlink +EXPORT_SYMBOL vmlinux 0xe2955304 ppp_input_error +EXPORT_SYMBOL vmlinux 0xe2a20120 tc_classify_compat +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe313221b md_register_thread +EXPORT_SYMBOL vmlinux 0xe32f0e0f __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xe3305e0b __nla_put +EXPORT_SYMBOL vmlinux 0xe34135c1 scsi_prep_return +EXPORT_SYMBOL vmlinux 0xe3457d4f block_truncate_page +EXPORT_SYMBOL vmlinux 0xe3480322 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe372c3f3 kernel_listen +EXPORT_SYMBOL vmlinux 0xe380f2f7 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xe387d485 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0xe3b31b2e pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xe3b51ebf llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0xe3d8e966 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xe3dc79a4 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0xe3e368d2 bio_map_user +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe41b4d3a phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe44af809 pci_enable_msix +EXPORT_SYMBOL vmlinux 0xe44cd849 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0xe44edc3f tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe46bbd14 kernel_sendpage +EXPORT_SYMBOL vmlinux 0xe47179b2 dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0xe48129a1 get_sb_single +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe48f3039 ida_get_new_above +EXPORT_SYMBOL vmlinux 0xe4ae2361 inet_release +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4e7505b phy_connect_direct +EXPORT_SYMBOL vmlinux 0xe4ec85fe inet_stream_ops +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe4f95e9c sock_wake_async +EXPORT_SYMBOL vmlinux 0xe513112c jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xe51f3565 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe54208cd __neigh_event_send +EXPORT_SYMBOL vmlinux 0xe55b7c20 put_mnt_ns +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe593a020 genphy_suspend +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5f38d1b block_page_mkwrite +EXPORT_SYMBOL vmlinux 0xe5ff4a16 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xe60b56e7 journal_start +EXPORT_SYMBOL vmlinux 0xe612b50c __serio_register_port +EXPORT_SYMBOL vmlinux 0xe61fca75 tty_register_driver +EXPORT_SYMBOL vmlinux 0xe62bd287 __inet6_hash +EXPORT_SYMBOL vmlinux 0xe636f159 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xe64fce54 netpoll_setup +EXPORT_SYMBOL vmlinux 0xe67cf29e dm_put_device +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe6b1a055 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xe6c1472a nobh_write_begin +EXPORT_SYMBOL vmlinux 0xe6dbeba8 nobh_writepage +EXPORT_SYMBOL vmlinux 0xe6e83cd2 pneigh_lookup +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe712ca69 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe7358edf phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0xe73a345f dm_table_get_md +EXPORT_SYMBOL vmlinux 0xe76d60d2 dev_get_by_index +EXPORT_SYMBOL vmlinux 0xe783b3fc dqput +EXPORT_SYMBOL vmlinux 0xe7a58424 set_page_dirty +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7db68e9 mmc_register_driver +EXPORT_SYMBOL vmlinux 0xe7dfe8e0 vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xe7f7d363 set_blocksize +EXPORT_SYMBOL vmlinux 0xe7f9d7f2 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe849d484 fb_get_mode +EXPORT_SYMBOL vmlinux 0xe84ba3f9 rfkill_alloc +EXPORT_SYMBOL vmlinux 0xe852c872 hci_connect +EXPORT_SYMBOL vmlinux 0xe85309fe scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xe8567961 blk_fetch_request +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe8949827 mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8aa192a ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0xe8cd50a4 dm_table_get_size +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8e14a90 insert_inode_locked +EXPORT_SYMBOL vmlinux 0xe905bb37 unlock_page +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914456a gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe91e0910 create_proc_entry +EXPORT_SYMBOL vmlinux 0xe92a166a scsi_finish_command +EXPORT_SYMBOL vmlinux 0xe92cea51 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xe944b259 block_sync_page +EXPORT_SYMBOL vmlinux 0xe94915b9 blkdev_get +EXPORT_SYMBOL vmlinux 0xe95de310 thaw_bdev +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe99b049b serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0xe99bf669 tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xe9ab5417 hci_recv_fragment +EXPORT_SYMBOL vmlinux 0xe9deec7b scsi_init_io +EXPORT_SYMBOL vmlinux 0xe9e3d12e proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xe9e60ca9 vfs_path_lookup +EXPORT_SYMBOL vmlinux 0xe9ed2c8e fifo_set_limit +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea14aff9 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea68da26 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea7dd928 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xea992118 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeb07d79b ps2_drain +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb22fd5a skb_queue_head +EXPORT_SYMBOL vmlinux 0xeb32633b filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0xeb3d8492 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xeb4f8666 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xeb5b99cc scsi_add_device +EXPORT_SYMBOL vmlinux 0xeb6cfcc1 unregister_cdrom +EXPORT_SYMBOL vmlinux 0xeb701b93 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0xeb7c9d4a pci_find_bus +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb96b2f8 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0xeba018c2 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xebb4d047 udplite_prot +EXPORT_SYMBOL vmlinux 0xebc6a3e6 blk_register_region +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebd73228 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xebdc9018 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0xec278b22 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0xec308632 security_inode_permission +EXPORT_SYMBOL vmlinux 0xec34568b pci_disable_msix +EXPORT_SYMBOL vmlinux 0xec6d97f7 kern_path +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xeccda647 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xecf9ccd2 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0xed107331 dev_addr_del +EXPORT_SYMBOL vmlinux 0xed54b545 get_phy_device +EXPORT_SYMBOL vmlinux 0xed67e2c2 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0xed6e0f8b locks_remove_posix +EXPORT_SYMBOL vmlinux 0xed7efed0 eth_header_cache +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb5172a pnp_start_dev +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xede92034 mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xedf22fb4 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0xedf435e5 tr_type_trans +EXPORT_SYMBOL vmlinux 0xee2c0328 dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0xee2c0b07 simple_dir_operations +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee3fe564 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee609d89 prepare_creds +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeacf098 dquot_destroy +EXPORT_SYMBOL vmlinux 0xeeca41df pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xeed59bbc dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xeee7fcb8 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0xef23bb4f ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0xef2e880c remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xef3bd862 mca_find_unused_adapter +EXPORT_SYMBOL vmlinux 0xef4a3373 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xef4c021d tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xef4cf732 serio_reconnect +EXPORT_SYMBOL vmlinux 0xef5a8670 path_put +EXPORT_SYMBOL vmlinux 0xef5d6691 llc_sap_close +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef8abd5f vlan_gro_receive +EXPORT_SYMBOL vmlinux 0xef8e86db generic_setxattr +EXPORT_SYMBOL vmlinux 0xef9117b3 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefb5742a bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefdec66b ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xeff14be9 ioremap_cache +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf038c38f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf0a6cbaa jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f1febd bio_endio +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf108ded1 init_buffer +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf10f07a1 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf1252827 vfs_unlink +EXPORT_SYMBOL vmlinux 0xf13fe7fb __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xf156c1f1 uart_update_timeout +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf18af67a llc_sap_open +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf19a8108 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xf1b39da5 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf226614f i2c_verify_client +EXPORT_SYMBOL vmlinux 0xf22a6887 xfrm_register_type +EXPORT_SYMBOL vmlinux 0xf258767e sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0xf2699655 md_check_recovery +EXPORT_SYMBOL vmlinux 0xf26c90d7 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0xf27c54f3 elv_rb_del +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2da2639 simple_fill_super +EXPORT_SYMBOL vmlinux 0xf2e74040 mca_set_adapter_name +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf32669bf tcf_em_register +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf33437d0 __pci_register_driver +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf39c4741 udp_sendmsg +EXPORT_SYMBOL vmlinux 0xf39ddba3 rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0xf3aff7a1 path_get +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3d9bf4d mark_page_accessed +EXPORT_SYMBOL vmlinux 0xf43dad46 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4544228 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xf48a2c4c MCA_bus +EXPORT_SYMBOL vmlinux 0xf48a3fc6 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4ae9d51 ida_pre_get +EXPORT_SYMBOL vmlinux 0xf4c88480 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0xf4d6b9eb inode_change_ok +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf502d273 acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0xf5094e74 vmtruncate +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf5699411 bitmap_end_sync +EXPORT_SYMBOL vmlinux 0xf57ac013 neigh_destroy +EXPORT_SYMBOL vmlinux 0xf592c5a9 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xf5b25a11 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5df8973 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf5ee750e ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0xf5f07c93 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0xf60c8115 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0xf664eaeb __lock_page +EXPORT_SYMBOL vmlinux 0xf66fd3b7 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xf6b53047 dm_io +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6dbfd9a dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf71cf49c inet_del_protocol +EXPORT_SYMBOL vmlinux 0xf71d071f lock_sock_nested +EXPORT_SYMBOL vmlinux 0xf71dd6cd hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xf745149f dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf786ef5e idr_init +EXPORT_SYMBOL vmlinux 0xf78b61d6 dma_release_declared_memory +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf7b81cd8 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xf7c1fa02 cdev_alloc +EXPORT_SYMBOL vmlinux 0xf7fcc844 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xf7fd68bf k8_northbridges +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf823b3c0 phy_device_free +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf840601f neigh_compat_output +EXPORT_SYMBOL vmlinux 0xf8425679 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0xf8452076 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0xf855e366 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xf87e6d53 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8914fc6 tcp_sendpage +EXPORT_SYMBOL vmlinux 0xf8a1f153 generic_listxattr +EXPORT_SYMBOL vmlinux 0xf8b20d2e vmap +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8f78799 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xf9152d22 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xf918c27e jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xf928ff58 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xf92a15ad simple_transaction_get +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf940a328 __next_cpu +EXPORT_SYMBOL vmlinux 0xf95729e4 skb_free_datagram +EXPORT_SYMBOL vmlinux 0xf96dddb4 bio_alloc +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9bac51e inet6_add_protocol +EXPORT_SYMBOL vmlinux 0xf9c09603 __register_binfmt +EXPORT_SYMBOL vmlinux 0xfa04318b blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa0fa07e pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xfa21b73f acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0xfa3cf7a9 generic_read_dir +EXPORT_SYMBOL vmlinux 0xfa598cce jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xfa7687dd scsi_register_interface +EXPORT_SYMBOL vmlinux 0xfab3bedb vfs_mkdir +EXPORT_SYMBOL vmlinux 0xfae1441b scsi_register_driver +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb14e595 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0xfb2bb67b bio_add_page +EXPORT_SYMBOL vmlinux 0xfb3197ed mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0xfb385335 security_path_mkdir +EXPORT_SYMBOL vmlinux 0xfb500682 key_negate_and_link +EXPORT_SYMBOL vmlinux 0xfb5d3ed6 napi_complete +EXPORT_SYMBOL vmlinux 0xfb65e84e jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfbb93c6e cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbee9660 default_file_splice_read +EXPORT_SYMBOL vmlinux 0xfbf8b4f0 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc1285dd tcp_prot +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc32a282 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc44da39 simple_fsync +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc7d91d6 acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0xfc7efa84 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xfc8d41cc x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcf2a917 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd02d58e ip6_xmit +EXPORT_SYMBOL vmlinux 0xfd093356 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xfd1bd794 dev_alloc_name +EXPORT_SYMBOL vmlinux 0xfd24a9a7 dev_add_pack +EXPORT_SYMBOL vmlinux 0xfd2bb9e0 follow_down +EXPORT_SYMBOL vmlinux 0xfd323b3c xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xfd3c3e4c blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0xfd44e844 kmalloc_caches +EXPORT_SYMBOL vmlinux 0xfd4eedfb in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xfd6b7eb5 ip6_route_output +EXPORT_SYMBOL vmlinux 0xfd765040 register_console +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfd85770d __kfree_skb +EXPORT_SYMBOL vmlinux 0xfd8712a0 force_sig +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe0835cc generic_file_splice_read +EXPORT_SYMBOL vmlinux 0xfe208d64 journal_errno +EXPORT_SYMBOL vmlinux 0xfe4277aa neigh_table_clear +EXPORT_SYMBOL vmlinux 0xfe44ea9a eisa_bus_type +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe74443b sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfea5f7b1 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0xfea77030 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0xfeb4232f security_path_rename +EXPORT_SYMBOL vmlinux 0xfeb79ee9 unregister_netdevice +EXPORT_SYMBOL vmlinux 0xfebd7e00 clear_inode +EXPORT_SYMBOL vmlinux 0xfec1b5f2 iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xfec1c899 __bforget +EXPORT_SYMBOL vmlinux 0xfec25a42 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfed121b4 mca_device_transform_memory +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee9f0c5 pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xff0402ee iget_locked +EXPORT_SYMBOL vmlinux 0xff0b3423 netif_carrier_off +EXPORT_SYMBOL vmlinux 0xff13449e input_allocate_device +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff338864 mca_device_write_pos +EXPORT_SYMBOL vmlinux 0xff346156 tty_register_device +EXPORT_SYMBOL vmlinux 0xff480992 dump_fpu +EXPORT_SYMBOL vmlinux 0xff4ad939 add_disk +EXPORT_SYMBOL vmlinux 0xff5e8a95 mca_device_transform_irq +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff6eca8b pci_enable_device +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff7fbebb tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffafdc5c _read_unlock_irq +EXPORT_SYMBOL vmlinux 0xffb09f5e blk_init_queue +EXPORT_SYMBOL vmlinux 0xffc7c184 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffdb82bc sg_free_table +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a crypto_aes_encrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491 crypto_aes_decrypt_x86 +EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81 ucode_cpu_info +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935 kvm_disable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x01d792d2 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x049202e2 kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x049e26e3 kvm_emulate_hypercall +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x070f8598 kvm_task_switch +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4 kvm_get_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0cbf7fd5 kvm_report_emulation_failure +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0ce7ba9a kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0e19ef96 kvm_inject_nmi +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x10c694f4 is_error_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x129e2df7 kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b kvm_release_pfn_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x182ac393 kvm_load_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1cac1e6d kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb kvm_release_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x204cf86a kvm_lapic_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x22c36a2c emulator_write_emulated +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039 kvm_set_pfn_accessed +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x26ede0bf kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x285dce1c kvm_resched +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2ab36699 kvm_get_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x30039659 kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x35a4fa79 kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3bff0aa9 fx_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x42d5906c kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x438eeab9 kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x44b2b787 kvm_read_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x615b8053 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x61cc9214 kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x64864e52 kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x67f14196 gfn_to_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x68aee4a0 kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6b41b45c kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6b507e99 kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6d26375f load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x76529fb2 kvm_queue_exception +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x774d6023 kvm_emulate_pio_string +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7ab7d404 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b451743 kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7bad0215 kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x832fa9d1 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x83d4b8d7 gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x854a3abb gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x885b5a95 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8cce88b4 kvm_get_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8d9a2e76 kvm_cpu_get_interrupt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e69b1ff kvm_set_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9183f2f5 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x91c8a71d kvm_emulate_cpuid +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x92b29601 kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9c97fd74 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa813745e __kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb4c8412c kvm_lapic_get_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb7fcdbe7 kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbddc62f5 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbe0c813d kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xce433a25 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcff37d0e kvm_lapic_set_tpr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0d838ca emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 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+EXPORT_SYMBOL_GPL crypto/aes_generic 0x142f878e crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x560ef110 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x6ede417a async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x712d533c async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x739c9c3e __async_tx_find_channel +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x8bed55f6 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x1adbfcc1 async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x56401bbb async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0x1dd5e303 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0x8d38ca1b cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0x8f63344f cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0xe706358c twofish_setkey +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464 cfag12864b_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d cfag12864b_disable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6 cfag12864b_isenabled +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926 cfag12864b_enable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342 cfag12864b_getrate +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95 cfag12864b_buffer +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23 ks0108_displaystate +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518 ks0108_writedata +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333 ks0108_startline +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968 ks0108_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db 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tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc4426d02 tpm_store_cancel +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf195fc91 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf63125d7 tpm_show_caps +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x8b968c0a tpm_bios_log_teardown +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0xbd2ca34c tpm_bios_log_setup +EXPORT_SYMBOL_GPL drivers/dca/dca 0x1d6e3f39 unregister_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01 dca_register_notify +EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df dca_get_tag +EXPORT_SYMBOL_GPL drivers/dca/dca 0x63f37514 dca_remove_requester +EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614 dca_unregister_notify +EXPORT_SYMBOL_GPL drivers/dca/dca 0x90c2cc73 dca_add_requester +EXPORT_SYMBOL_GPL drivers/dca/dca 0xbe4c4be2 alloc_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0xc23a9a1b free_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0xdd497767 register_dca_provider +EXPORT_SYMBOL_GPL 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mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe3bbc170 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe3e8757d mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe495e395 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xecedae4f mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf252fe2f mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xff0e7079 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x2c2f1507 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x83663b5a usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x65de45f1 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x738be8f5 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x7f51b1e4 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9687ebb6 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa7908619 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xbe937663 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x00dd1876 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1556c09f usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1720ac7b usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x27a4d5c7 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2bd9130e usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3ccf9887 usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x528bfc44 usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5a77a74c usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5c1efe60 usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x65a15e13 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6d095c82 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x74bab152 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x82ec6705 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9b906ef0 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa2327516 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb5b70ac0 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc59bc02e usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc7963ac4 usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xced1c4b8 usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd55d174b usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf4463145 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x03ffac1c i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3091413f i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3851a4a4 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4cd75f34 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x503c3fe7 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x608fed84 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6b47625f i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7833cafb i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8c45eb71 i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8eff5b9a i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9024ae60 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xaf6df59c i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb813cecc i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x2744d73e ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0642f7cc lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x17d2b77d lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x35641e0e lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x368a2789 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x399806a2 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3ea694c1 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x51e4048a lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5657cdc9 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x592d8845 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5baf0d4a lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x939f9737 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xae0bdf4f lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb66a409a __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xba527295 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xec7b930d lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0f5a3548 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x10cb1dbd lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2979087e lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6ac6975b lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa3d40218 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcd6131ef lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xddd663b4 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xea8c6f2f __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x30b74c83 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xe374a492 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4bd4c403 p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5d571abf p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x644e8dad p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x9888210c p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xaa909e32 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbfaa16c1 p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd86c827e p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xfc00559c p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x124187de rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x14e9622f rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1eb51406 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x20bdccfa rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x27ffe2df rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2de35e00 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x411978b6 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4a75a55a rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4d80817e rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x628e56a9 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x63c836b0 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9a20b827 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9e3d429f rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9f97d1fd rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa692b088 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaa4a7c9a rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaac93296 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xda463c2d rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe3d78294 rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf6319f8b rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfa3e840f rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfa8c982e rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x00a70b90 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x1af474d0 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5ec19fc7 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6641bf8f rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x687d7214 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6ddca9f2 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe38b248a rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf6914933 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xfc0e9d9c rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1baa1e3a rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2bc1ccad rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x398010d1 rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5698e797 rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x587bbe57 rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5b955200 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7a7e1e79 rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8606ea68 rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8da392be rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x98e6d8ff rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa0cd2892 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa51e43e7 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbe783219 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdbaf1e12 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe3546a2a rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe9b5049d rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x10e65539 acpiphp_unregister_attention +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x275f27ca acpiphp_register_attention +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x95baa84f pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xba294932 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x3dc378f5 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5412ddcd wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5c0d249a wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x6cabb4e5 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8352b9d0 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x9e4bcd16 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xa5bb7c04 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x31dad105 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x09053c77 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0a6cfbdf iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x14dae6b1 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4f1132a4 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5a692824 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x635ee6a4 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x658b2b99 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66055810 iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x664c9076 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x733ddbe2 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7cd7ded3 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x816a00a2 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x858fe2e3 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x875f72f6 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8a2413a9 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9196d2e5 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9612b67d iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9973d203 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9ce911e6 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9f6cb76d __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xacd8624e iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xae1f1dff iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaff81e2b __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb26be669 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5c38e94 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb87e41e0 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc108aa1f iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc205062c iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc8a0c57f iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd3d904bf iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd65871ee iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd9bbeb08 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdc39f1dc iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe6089f13 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe8cfd8e1 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf1574610 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf3dc47c2 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf8e29e3b iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0d3dd331 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x171a7367 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1fa38100 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3a2ddb51 iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x72c6ab9b iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7b71aab0 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7ef8296f iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa7fe6e83 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbe5fd729 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcab89970 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd4943bb6 iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd9773326 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xdbfc2714 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe387f0cf iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf5d18674 iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf764c82f iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0483cc19 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0d74ad3c sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1534901f sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1c0f982a sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x20d9ced3 sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x268dcaf8 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2ad6ca11 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x33eb30f6 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x37947d5e __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x393623cf sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3998a152 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x443c7018 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4594605a sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x46c7052c sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x613d665f sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x61472a2d sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x65ed36e7 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x784fdd8e sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa814920c sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc65975b4 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc6765454 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe4dd1365 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf3940fe3 sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x4c6f22a8 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x4dbfb5f4 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x96c84a74 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa0dc2914 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xd6204bb3 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xdd72d951 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x0772669c scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3543451b scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x93ec6b3b scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb93ba3b3 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xce8cb7a2 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd3b824ce scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xdd711c21 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xefab4333 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfb7597f3 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0af4bb0a iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x320d322d iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x66e5cd0d iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6b1fe7ff iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6ddba11e iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x71057d6f iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x73380dee iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7819a7bf iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7e335014 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7fcdb1f6 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8c7c6f09 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8d4d9b3e iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x95604ce5 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x975b84e4 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9d1aea69 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd6ad2313 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdd18a718 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe7b8199f iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe9ac0782 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xedb06938 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf11d8c21 iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf5db7058 iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x8045a7fe srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x8f704e3a srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd6720b2e srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xdac7b73f srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xdcf79d46 srp_rport_add +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x03479de8 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x20520e69 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x411e96ad spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x7c3c0a81 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa4519075 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc3926caa spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x01429a3f comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xd67bd642 comedi_alloc_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x770de6c8 das08_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x7eb71183 das08_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20 das08_cs_boards +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x1aa8d607 labpc_common_attach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95 labpc_1200_is_unipolar +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a range_labpc_1200_ai +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347 labpc_1200_ai_gain_bits +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xd1f68d0c labpc_common_detach +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x17a8db46 ni_tio_init_counter +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x271cc9b9 ni_tio_arm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x75d8538e ni_tio_rinsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xafb5f4b5 ni_tio_insn_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xcc712e9c ni_gpct_device_construct +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe8ed36f5 ni_tio_set_gate_src +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf03aebff ni_tio_winsn +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xfbeaa87b ni_gpct_device_destroy +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x016e9473 ni_tio_cmd +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x39636958 ni_tio_cancel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x50bc1e72 ni_tio_acknowledge_and_confirm +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x8463ea58 ni_tio_handle_interrupt +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9c6392e8 ni_tio_set_mite_channel +EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xec41c21d ni_tio_cmdtest +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b oslec_flush +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1 oslec_free +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747 oslec_update +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x04b65d62 usbip_dump_urb +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x05ab7b02 usbip_xmit +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0a6e0754 dev_attr_usbip_debug +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x20108e6c usbip_stop_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x20558d0a usbip_task_init +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x2d03ffeb usbip_event_add +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x302ed046 usbip_alloc_iso_desc_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x392f1de6 usbip_start_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x40b56f79 usbip_start_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x58295382 usbip_event_happend +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44 usbip_debug_flag +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x7c543ed1 sockfd_to_socket +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xadb33823 usbip_recv_xbuff +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc503a1b0 usbip_pack_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc usbip_header_correct_endian +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586 usbip_dump_header +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe51dae09 usbip_recv_iso +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf98ab53e usbip_stop_eh +EXPORT_SYMBOL_GPL drivers/uio/uio 0x1ba3767a uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x75ac178b uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0xf095aa80 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x9b92397e usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xfec82519 usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x012aecc0 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e9425c6 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x49e0f4bb usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x6fededd6 usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7e02202a usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7eff47f7 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xba150284 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc1e6a045 usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xde6fef7a usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x03812afc usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x03cf29d9 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0b9deaab usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x16c2c659 usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x335cbd24 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x631abe99 usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x66316d3a usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7dadb71a usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8baf1cb3 usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9d191c91 usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa8715b96 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xaaa869d0 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xad0ad565 usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdc17649a ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf4fc5c55 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x03bf4de6 usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0636ee06 usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x127ed98c usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4059c5bb usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4e64ab5c usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x506ed958 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x778498d1 usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x77db453e usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7afc8ac5 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x847f13d5 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x98ab1898 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa3791b22 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xac465293 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb10828b1 usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb2fb733b usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb4b38c0a usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb5d87fb8 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb5ffa87b usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc5fc9766 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0x2895a2ec wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5921a463 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5d7ceff3 wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x65d8bb87 wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x66575ebc wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x67690460 wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7c17c652 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7f6b7b69 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x85c2f2bd wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8cb003c1 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x92f73875 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x936d9ffb wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xab5d3a3c wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xcf12df97 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdc07c543 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe0dc2d7a wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2acccf7a i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4763b3da i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x6bf6b063 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1ee188ef uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x3b717811 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5c24e18e uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5f62ebec uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8a608287 uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa557f735 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xe7231530 uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xffe82587 uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0b980a27 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2383220d umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x304136f7 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3b2614a1 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3c6589d7 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x814a6785 umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa69dd1bf umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xcb626f3e __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x04c3e088 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x053932e4 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0571a4d2 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c24edfe uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x20f8569a uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2180673b uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2fedbb30 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x55df079e uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58cf5c3b uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5ac909a6 uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x72bf9614 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x79656c2f uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7beca2fc uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7c17ceff uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x892420bd uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8b817e4b uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8c1da550 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x97808e8e uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c8a952e uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9fef6713 uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa4e64efa uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5445970 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa631e94c uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7c7af48 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaafccd4b uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafc2f5ed uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb3db09ed __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba7b842a uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcd888a1d uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2e50fef uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd574aa1d uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdba34317 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdff7e92e uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe31ecf43 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4268e38 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0650c32 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf6a1bf1b uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xc0ce9531 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x001d0e7e wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x02640c05 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0a7556b0 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0d26839f wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0effea14 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1e722ca5 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1e74c1c7 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1ee4dfc3 wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x30653b81 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x385afad4 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x40765294 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x445ccfd2 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x478574e8 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x501a7feb wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5ee912b2 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6a656b5c wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x865344df wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8e38b3ec wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x90a6ff07 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x92104002 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x95109af4 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x98c24bd8 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9f87da9d wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xac588215 wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb6236d10 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc30b043c wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc8fb67d8 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcb7e4dd7 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd22e54cc wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe68e5bed wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeb1fd4eb wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xecffb3af wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x3ed74a79 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x667d05da ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x9dfd0ed8 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb0f53f6e ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb202cf97 ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbbd1f998 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xd34540fd ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x2ee0f2d6 fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x4673a758 fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xa6c9172c fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x2737717d sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xc0a1aebc sis_free_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x074dc902 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x59ed8769 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x5aa07e00 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xe4e13cf1 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xedebd1cb unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0c1a0267 vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x71fcc575 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xafe8900d vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2b2a4a27 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2c897f37 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x5dd55f34 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9207f4e3 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xafde72f0 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd4e82c1 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe164307a w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe6e15fe6 w1_touch_block +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x45a63b9c dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9e4c636e dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa9caa11d dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x84581fca exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x8957909b exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x1110e6d2 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0x3ee3b6e6 fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x4e740984 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x56f7b9ce fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x62335554 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x760698bc fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x840d638d fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x877fe566 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0x8e98c481 fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x9d32c9a9 fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x9e2f7eea fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0xa46ee742 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xa4fe438d fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xb4757bf6 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xbac4e19d fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xbace6f3c fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xc2563717 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xd2e91457 fat_build_inode +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x58b11d5d nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x59c078f7 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xab7e87c3 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xd42a9f52 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xfadea916 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x1e317bfb nfsacl_decode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xaa094348 nfsacl_encode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x11be3f99 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x16460458 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x16d4e5bc o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x57381152 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7d02e0b7 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x835b65e1 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa51356e3 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x09683e40 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x2d29c9ed dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4744efca dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa0a09cb0 dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xb764e568 dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xda96a2f4 dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0dd4d45e ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x8ebbc063 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 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0x1d001969 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d9f2175 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1eaca394 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2343d64c snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25d6b68f snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2ab5139e snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2b644624 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2c437f78 snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3246dd39 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x331747b9 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3852a3da snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39d89831 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39edd3ad snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3c9e707e snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3e66ddb6 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41383135 snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x427ad7cf snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x44c8a12e snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4667ef24 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x46890c6d query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x471fabc2 snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4a83bc12 snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x57eaad2d snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x58c050d1 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x59766693 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x650db75f snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6630e418 snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x69893388 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6bd2b06c snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7502d44b snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7724f5ff snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x79782cfa snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ccfa66a snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e9ad7a7 snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x81f69878 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x86417923 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x88d025d6 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8bbb9949 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8d30b219 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x92d1c178 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x963624aa snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97d15fda snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xacacf869 snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb51204e4 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb587dc4e snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbd483293 snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc104ce98 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc1077307 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc20ff5d5 snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc98584ff snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcfa3f97e snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd078e2f5 snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd716961f snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda59dcfc snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdebb9558 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe37309c9 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe39f894e snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe3a698ff snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe534b500 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe971a15d snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xec44f5bc snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed132568 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xef3a633b snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf56024f5 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf7bd2089 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe7a7fea snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x2fd5561f ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x410f7730 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x80b4f288 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x99265282 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xe002c3b8 ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x225007dc cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x8b381f38 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x3092a911 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x5b192d0a soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x50ac28c1 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x99758188 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x9babc43a tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xab5b3698 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x09850af3 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xaa15b2d3 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x07731fda aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x2eb9131f aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x45421cc2 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x6a7ec9e8 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x76ae22e9 soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x9aa06a5b aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xf8ff3300 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x279f0ee1 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xff21a0c9 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x3e99c6cc soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x0f23faa5 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x95df7b36 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x270c6c80 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x36533220 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xb5775b35 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xad4fc872 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xed8a7d8b wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x8a39cef9 wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xf072d541 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x298529e8 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xffa3eece soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x15a75174 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x90e4299b soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x40e4f8e5 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x94df0b08 wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3c53ed97 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x5d72b516 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x132e4855 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x765fe6d5 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x7be1d002 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xbb6600ce soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x904b530d soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xfd75a2ac wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x8faef411 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xbc6fa812 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x1831e538 wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xbfeb7c7c soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x751a3d29 wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xa732270a soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x7dacdb7e soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xa45d1c08 wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xb4b73b41 soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xee7995d1 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x8b6642a8 wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xec06060d soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00dc2955 snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x014ea468 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0ad6f422 snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b36a7d2 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c437c94 snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x223f41de snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2320dbd7 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x25e05963 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x26ff6c14 snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x275882f0 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x28a02221 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2967aba1 snd_soc_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32e54c40 snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3904eb96 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3be7d7e0 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x42b6968b snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4844b219 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4b7c2b64 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d8f79ff snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4dce6a59 snd_soc_jack_free_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4f59dad6 snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4f898b1a snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x52afb641 snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x561319b9 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x56bb702a snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x61842329 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x68e7fdeb snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6f125d1d snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x75baeeb1 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x76e92471 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x785cb517 snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7b016fd7 snd_soc_jack_add_gpios +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7ebfa594 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x80c3cccf snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83d2c40e snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x84815413 snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8c62c170 snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8ebadb44 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9abc4a78 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9dd0d9ae snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9ecba38f snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa42961c6 snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa9784e3b snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb02accb4 snd_soc_free_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1692efc snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb2981aaf snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4af628a snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb9760bfa snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbca19a18 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbcc1ebdb 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bus_find_device_by_name +EXPORT_SYMBOL_GPL vmlinux 0xb18429eb suspend_device_irqs +EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce rcu_barrier_sched +EXPORT_SYMBOL_GPL vmlinux 0xb1f98929 disk_part_iter_exit +EXPORT_SYMBOL_GPL vmlinux 0xb264212d inotify_rm_watch +EXPORT_SYMBOL_GPL vmlinux 0xb264e810 blk_queue_rq_timed_out +EXPORT_SYMBOL_GPL vmlinux 0xb27a0280 gpiochip_add +EXPORT_SYMBOL_GPL vmlinux 0xb27b8b6a scsi_nl_add_driver +EXPORT_SYMBOL_GPL vmlinux 0xb2b794f9 gpiochip_is_requested +EXPORT_SYMBOL_GPL vmlinux 0xb2d25457 ata_eh_qc_complete +EXPORT_SYMBOL_GPL vmlinux 0xb30a1b34 tty_encode_baud_rate +EXPORT_SYMBOL_GPL vmlinux 0xb3226149 sdio_memcpy_fromio +EXPORT_SYMBOL_GPL vmlinux 0xb324baa6 rtc_irq_unregister +EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9 hpet_rtc_timer_init +EXPORT_SYMBOL_GPL vmlinux 0xb36b7de4 put_driver +EXPORT_SYMBOL_GPL vmlinux 0xb40cbb8f ata_noop_qc_prep +EXPORT_SYMBOL_GPL vmlinux 0xb41bf5a7 machine_check_poll +EXPORT_SYMBOL_GPL vmlinux 0xb44f6e8c zap_vma_ptes +EXPORT_SYMBOL_GPL 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crypto_ablkcipher_type +EXPORT_SYMBOL_GPL vmlinux 0xc17515d7 usb_hcds_loaded +EXPORT_SYMBOL_GPL vmlinux 0xc1b9670d leds_list_lock +EXPORT_SYMBOL_GPL vmlinux 0xc1f4b085 usb_ifnum_to_if +EXPORT_SYMBOL_GPL vmlinux 0xc21392e8 led_trigger_show +EXPORT_SYMBOL_GPL vmlinux 0xc22a3091 vm_unmap_aliases +EXPORT_SYMBOL_GPL vmlinux 0xc233818d attribute_container_classdev_to_container +EXPORT_SYMBOL_GPL vmlinux 0xc23e68f8 cpufreq_driver_target +EXPORT_SYMBOL_GPL vmlinux 0xc23e7a43 page_cache_sync_readahead +EXPORT_SYMBOL_GPL vmlinux 0xc28e4f11 tcp_done +EXPORT_SYMBOL_GPL vmlinux 0xc2b2d74c __trace_note_message +EXPORT_SYMBOL_GPL vmlinux 0xc2b4e574 sata_pmp_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xc3233a75 crypto_init_spawn +EXPORT_SYMBOL_GPL vmlinux 0xc323e586 platform_device_put +EXPORT_SYMBOL_GPL vmlinux 0xc34efe27 snmp_fold_field +EXPORT_SYMBOL_GPL vmlinux 0xc399468f scsi_nl_remove_driver +EXPORT_SYMBOL_GPL vmlinux 0xc399e9c0 inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL vmlinux 0xc3c65b72 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+EXPORT_SYMBOL_GPL vmlinux 0xda483e1b skb_pull_rcsum +EXPORT_SYMBOL_GPL vmlinux 0xda9542eb register_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xdabc058f platform_device_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xdacc4109 bus_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdad49a38 elv_register +EXPORT_SYMBOL_GPL vmlinux 0xdae2aff1 power_supply_changed +EXPORT_SYMBOL_GPL vmlinux 0xdaed6b3e regulator_list_voltage +EXPORT_SYMBOL_GPL vmlinux 0xdaee60a9 pci_cleanup_aer_uncorrect_error_status +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdb1d3677 mmu_notifier_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdb2278a8 usb_bus_list_lock +EXPORT_SYMBOL_GPL vmlinux 0xdb40aced sysfs_update_group +EXPORT_SYMBOL_GPL vmlinux 0xdb41ff2c crypto_larval_kill +EXPORT_SYMBOL_GPL vmlinux 0xdb510640 ring_buffer_record_disable_cpu +EXPORT_SYMBOL_GPL vmlinux 0xdb7e7e42 __rt_mutex_init +EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xdbb4dc51 fib_rules_lookup +EXPORT_SYMBOL_GPL vmlinux 0xdc26a1d4 sock_prot_inuse_add +EXPORT_SYMBOL_GPL vmlinux 0xdc4cbd61 root_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdc714560 register_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xdcfa056d crypto_unregister_template +EXPORT_SYMBOL_GPL vmlinux 0xdd098f54 ata_eh_qc_retry +EXPORT_SYMBOL_GPL vmlinux 0xdd2f606a rtnl_put_cacheinfo +EXPORT_SYMBOL_GPL vmlinux 0xdd65040b __inet_hash_nolisten +EXPORT_SYMBOL_GPL vmlinux 0xdd97f8dd pci_find_next_capability +EXPORT_SYMBOL_GPL vmlinux 0xdd9918ce dm_send_uevents +EXPORT_SYMBOL_GPL vmlinux 0xddd5173d anon_inode_getfd +EXPORT_SYMBOL_GPL vmlinux 0xdde8d8f9 sync_page_io +EXPORT_SYMBOL_GPL vmlinux 0xddef4a4a securityfs_create_dir +EXPORT_SYMBOL_GPL vmlinux 0xde11b29b tracepoint_iter_reset +EXPORT_SYMBOL_GPL vmlinux 0xde417b81 async_schedule_domain +EXPORT_SYMBOL_GPL vmlinux 0xde67e961 tcp_slow_start +EXPORT_SYMBOL_GPL vmlinux 0xde9ba5d8 screen_glyph +EXPORT_SYMBOL_GPL vmlinux 0xdf0127ab scsi_nl_sock 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vmlinux 0xe2254499 regulator_get_init_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xe2426710 wmi_evaluate_method +EXPORT_SYMBOL_GPL vmlinux 0xe2502293 init_preds +EXPORT_SYMBOL_GPL vmlinux 0xe26c1877 module_mutex +EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff is_hpet_enabled +EXPORT_SYMBOL_GPL vmlinux 0xe2d8831c dm_device_name +EXPORT_SYMBOL_GPL vmlinux 0xe3087809 ring_buffer_swap_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe309b870 disk_map_sector_rcu +EXPORT_SYMBOL_GPL vmlinux 0xe3206b88 rt_mutex_timed_lock +EXPORT_SYMBOL_GPL vmlinux 0xe35cf7e5 usb_get_from_anchor +EXPORT_SYMBOL_GPL vmlinux 0xe3b2f58b usb_unanchor_urb +EXPORT_SYMBOL_GPL vmlinux 0xe3bee9b4 acpi_bus_trim +EXPORT_SYMBOL_GPL vmlinux 0xe3e49daa sata_set_spd +EXPORT_SYMBOL_GPL vmlinux 0xe3f1ecb1 device_move +EXPORT_SYMBOL_GPL vmlinux 0xe4021c99 nf_unregister_queue_handlers +EXPORT_SYMBOL_GPL vmlinux 0xe478a61a dm_rh_stop_recovery +EXPORT_SYMBOL_GPL vmlinux 0xe49c0959 device_create_file +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4c331b6 acpi_os_unmap_memory +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe513781a init_srcu_struct +EXPORT_SYMBOL_GPL vmlinux 0xe513afc0 cache_k8_northbridges +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe548edc6 security_inode_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xe568cc4b skb_cow_data +EXPORT_SYMBOL_GPL vmlinux 0xe5a4394a ring_buffer_read_page +EXPORT_SYMBOL_GPL vmlinux 0xe5ecf2b6 ata_pci_device_suspend +EXPORT_SYMBOL_GPL vmlinux 0xe605929c __inet_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f gpio_unexport +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe658e4e7 da903x_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xe695f0a2 ata_sff_qc_issue +EXPORT_SYMBOL_GPL vmlinux 0xe6a98021 cpufreq_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xe6aa1dbb platform_driver_unregister +EXPORT_SYMBOL_GPL vmlinux 0xe6b67b20 ata_std_qc_defer +EXPORT_SYMBOL_GPL vmlinux 0xe6d989cc sysdev_class_register +EXPORT_SYMBOL_GPL vmlinux 0xe7489074 device_register +EXPORT_SYMBOL_GPL vmlinux 0xe7497779 crypto_nivaead_type +EXPORT_SYMBOL_GPL vmlinux 0xe7565b6b crypto_alloc_aead +EXPORT_SYMBOL_GPL vmlinux 0xe79cc061 inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0xe7dade81 ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0xe7e974e8 acpi_ec_add_query_handler +EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877 pcpu_base_addr +EXPORT_SYMBOL_GPL vmlinux 0xe81e04ac simple_attr_write +EXPORT_SYMBOL_GPL vmlinux 0xe842a473 led_trigger_unregister_simple +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe86515ce usb_create_hcd +EXPORT_SYMBOL_GPL vmlinux 0xe86be004 ata_sff_post_internal_cmd +EXPORT_SYMBOL_GPL vmlinux 0xe871322c vfs_listxattr +EXPORT_SYMBOL_GPL vmlinux 0xe8b99c0c ip_local_out +EXPORT_SYMBOL_GPL vmlinux 0xe9058c50 dm_rh_dec +EXPORT_SYMBOL_GPL vmlinux 0xe925ed6c usb_set_device_state +EXPORT_SYMBOL_GPL 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vmlinux 0xef407e0f inet6_csk_xmit +EXPORT_SYMBOL_GPL vmlinux 0xef431843 generic_fh_to_parent +EXPORT_SYMBOL_GPL vmlinux 0xef49b90d ata_wait_after_reset +EXPORT_SYMBOL_GPL vmlinux 0xef63d4df put_device +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xefd3cb16 dm_requeue_unmapped_request +EXPORT_SYMBOL_GPL vmlinux 0xefdd2993 uhci_check_and_reset_hc +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefe1d489 mnt_want_write_file +EXPORT_SYMBOL_GPL vmlinux 0xefe21106 snmp_mib_init +EXPORT_SYMBOL_GPL vmlinux 0xefef0909 register_kprobes +EXPORT_SYMBOL_GPL vmlinux 0xf06c1cc7 unregister_timer_hook +EXPORT_SYMBOL_GPL vmlinux 0xf08f3e4b __srcu_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xf09d1b66 usb_match_one_id +EXPORT_SYMBOL_GPL vmlinux 0xf1025bbe simple_attr_release +EXPORT_SYMBOL_GPL vmlinux 0xf1463412 execute_in_process_context +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf1a2785f dm_disk +EXPORT_SYMBOL_GPL vmlinux 0xf234a5b0 inet_hash +EXPORT_SYMBOL_GPL vmlinux 0xf28a9f4b relay_buf_full +EXPORT_SYMBOL_GPL vmlinux 0xf2e10f15 dev_attr_unload_heads +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf31baac4 hidraw_report_event +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf38f3fd2 fs_kobj +EXPORT_SYMBOL_GPL vmlinux 0xf3c05544 scsi_unregister_device_handler +EXPORT_SYMBOL_GPL vmlinux 0xf456fefb led_trigger_set_default +EXPORT_SYMBOL_GPL vmlinux 0xf48ae7fa fl6_sock_lookup +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4c60d1c sched_setscheduler +EXPORT_SYMBOL_GPL vmlinux 0xf508db31 find_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0xf5090cb6 usb_get_dev +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf5712124 regulator_set_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf59152ad crypto_shash_finup +EXPORT_SYMBOL_GPL vmlinux 0xf5950fc9 tty_mode_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5b2b22c platform_bus +EXPORT_SYMBOL_GPL vmlinux 0xf5eed336 get_driver +EXPORT_SYMBOL_GPL vmlinux 0xf61318cd sdio_readw +EXPORT_SYMBOL_GPL vmlinux 0xf6321a5f pci_find_next_ht_capability +EXPORT_SYMBOL_GPL vmlinux 0xf6a0272d sysfs_create_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6cd0f19 fuse_sync_release +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf732b0cd __get_vm_area +EXPORT_SYMBOL_GPL vmlinux 0xf789b468 regulator_bulk_enable +EXPORT_SYMBOL_GPL vmlinux 0xf7943ac9 devm_kfree +EXPORT_SYMBOL_GPL vmlinux 0xf7b12eea rtc_irq_set_state +EXPORT_SYMBOL_GPL vmlinux 0xf7baa01d ata_host_start +EXPORT_SYMBOL_GPL vmlinux 0xf7d849eb simple_attr_read +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf877fc53 __set_irq_handler +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8edda6c device_rename +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf91f6ecb dma_wait_for_async_tx +EXPORT_SYMBOL_GPL vmlinux 0xf925fc7d __i2c_board_lock +EXPORT_SYMBOL_GPL vmlinux 0xf9765833 dmi_match +EXPORT_SYMBOL_GPL vmlinux 0xf97666a0 set_memory_rw +EXPORT_SYMBOL_GPL vmlinux 0xf99cac79 led_trigger_remove +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xf9f93750 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0xfa1618af set_task_ioprio +EXPORT_SYMBOL_GPL vmlinux 0xfa1eb239 task_current_syscall +EXPORT_SYMBOL_GPL vmlinux 0xfa1fcdf2 scsi_target_block +EXPORT_SYMBOL_GPL vmlinux 0xfa258df3 usb_put_hcd +EXPORT_SYMBOL_GPL vmlinux 0xfaac7532 cpufreq_freq_attr_scaling_available_freqs +EXPORT_SYMBOL_GPL vmlinux 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0xfc5092d7 regulator_bulk_free +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcc4b34d usb_buffer_map_sg +EXPORT_SYMBOL_GPL vmlinux 0xfcf45cbc crypto_register_template +EXPORT_SYMBOL_GPL vmlinux 0xfcfc318b ata_sff_qc_fill_rtf +EXPORT_SYMBOL_GPL vmlinux 0xfcfeaf96 platform_device_add +EXPORT_SYMBOL_GPL vmlinux 0xfd1439f7 sysdev_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfd440f5d tcp_reno_cong_avoid +EXPORT_SYMBOL_GPL vmlinux 0xfd482c56 input_ff_event +EXPORT_SYMBOL_GPL vmlinux 0xfd4adf9e crypto_destroy_tfm +EXPORT_SYMBOL_GPL vmlinux 0xfd8f6f2b unregister_pernet_gen_device +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfe0adc50 ring_buffer_free_read_page +EXPORT_SYMBOL_GPL vmlinux 0xfe3c0088 bus_get_device_klist +EXPORT_SYMBOL_GPL vmlinux 0xfe47de15 add_to_page_cache_lru +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfeb3464b scsi_get_vpd_page +EXPORT_SYMBOL_GPL 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+nf_nat_h323 +nf_nat_irc +nf_nat_pptp +nf_nat_proto_dccp +nf_nat_proto_gre +nf_nat_proto_sctp +nf_nat_proto_udplite +nf_nat_sip +nf_nat_snmp_basic +nf_nat_tftp +nfnetlink +nfnetlink_log +nfnetlink_queue +nfs +nfs_acl +nfsd +nftl +nf_tproxy_core +n_hdlc +ni52 +ni65 +ni_6527 +ni_65xx +ni_660x +ni_670x +ni_at_a2150 +ni_at_ao +ni_atmio +ni_atmio16d +nicstar +ni_daq_700 +ni_daq_dio24 +ni_labpc +ni_labpc_cs +nilfs2 +ni_mio_cs +ni_pcidio +ni_pcimio +ni_tio +ni_tiocmd +niu +nl802154 +nls_ascii +nls_cp1250 +nls_cp1251 +nls_cp1255 +nls_cp437 +nls_cp737 +nls_cp775 +nls_cp850 +nls_cp852 +nls_cp855 +nls_cp857 +nls_cp860 +nls_cp861 +nls_cp862 +nls_cp863 +nls_cp864 +nls_cp865 +nls_cp866 +nls_cp869 +nls_cp874 +nls_cp932 +nls_cp936 +nls_cp949 +nls_cp950 +nls_euc-jp +nls_iso8859-1 +nls_iso8859-13 +nls_iso8859-14 +nls_iso8859-15 +nls_iso8859-2 +nls_iso8859-3 +nls_iso8859-4 +nls_iso8859-5 +nls_iso8859-6 +nls_iso8859-7 +nls_iso8859-9 +nls_koi8-r +nls_koi8-ru +nls_koi8-u +nls_utf8 +nmclan_cs +nop-usb-xceiv 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+scsi_dh_rdac +scsi_tgt +scsi_transport_fc +scsi_transport_iscsi +scsi_transport_sas +scsi_transport_spi +scsi_transport_srp +scsi_wait_scan +sctp +scx200 +scx200_acb +scx200_docflash +scx200_gpio +scx200_hrt +scx200_i2c +scx200_wdt +sdhci +sdhci-pci +sdhci-pltfm +sdio_uart +sdla +sdricoh_cs +se401 +sealevel +sedlbauer_cs +seed +seeq8005 +seqiv +ser_gigaset +serial2002 +serial_cs +serio_raw +sermouse +serpent +serport +serqt_usb2 +ses +sfc +sha1_generic +sha256_generic +sha512_generic +shpchp +sht15 +si21xx +sidewinder +siemens_mpi +sierra +sim710 +sir-dev +sis +sis190 +sis5595 +sis900 +sis-agp +sisfb +sisusbvga +sit +sja1000 +sja1000_platform +skel +skfp +skge +skisa +sky2 +sl811_cs +sl811-hcd +slicoss +slip +slram +sm501 +sm501fb +smbfs +smc9194 +smc91c92_cs +smc-mca +smctr +smc-ultra +smc-ultra32 +smsc37b787_wdt +smsc47b397 +smsc47m1 +smsc47m192 +smsc9420 +smsc95xx +smsc-ircc2 +smsdvb +smsmdtv +smssdio +smsusb +sn9c102 +snd +snd-ac97-codec +snd-ad1816a +snd-ad1848 +snd-ad1889 +snd-adlib +snd-ak4114 +snd-ak4117 +snd-ak4xxx-adda +snd-ali5451 +snd-als100 +snd-als300 +snd-als4000 +snd-atiixp +snd-atiixp-modem +snd-au8810 +snd-au8820 +snd-au8830 +snd-aw2 +snd-azt2320 +snd-azt3328 +snd-bt87x +snd-ca0106 +snd-cmi8330 +snd-cmipci +snd-cs4231 +snd-cs4236 +snd-cs4281 +snd-cs46xx +snd-cs5530 +snd-cs5535audio +snd-cs8427 +snd-ctxfi +snd-darla20 +snd-darla24 +snd-dt019x +snd-dummy +snd-echo3g +snd-emu10k1 +snd-emu10k1-synth +snd-emu10k1x +snd-emu8000-synth +snd-emux-synth +snd-ens1370 +snd-ens1371 +snd-es1688 +snd-es1688-lib +snd-es18xx +snd-es1938 +snd-es1968 +snd-es968 +snd-fm801 +snd-gina20 +snd-gina24 +snd-gusclassic +snd-gusextreme +snd-gus-lib +snd-gusmax +snd-hda-codec +snd-hda-codec-analog +snd-hda-codec-atihdmi +snd-hda-codec-ca0110 +snd-hda-codec-cmedia +snd-hda-codec-conexant +snd-hda-codec-idt +snd-hda-codec-intelhdmi +snd-hda-codec-nvhdmi +snd-hda-codec-realtek +snd-hda-codec-si3054 +snd-hda-codec-via +snd-hda-intel +snd-hdsp +snd-hdspm +snd-hifier +snd-hrtimer +snd-hwdep +snd-i2c +snd-ice1712 +snd-ice1724 +snd-ice17xx-ak4xxx +snd-indigo +snd-indigodj +snd-indigodjx +snd-indigoio +snd-indigoiox +snd-intel8x0 +snd-intel8x0m +snd-interwave +snd-interwave-stb +snd-korg1212 +snd-layla20 +snd-layla24 +snd-lx6464es +snd-maestro3 +snd-mia +snd-miro +snd-mixart +snd-mixer-oss +snd-mona +snd-mpu401 +snd-mpu401-uart +snd-msnd-classic +snd-msnd-lib +snd-msnd-pinnacle +snd-mtpav +snd-mts64 +snd-nm256 +snd-opl3-lib +snd-opl3sa2 +snd-opl3-synth +snd-opl4-lib +snd-opl4-synth +snd-opti92x-ad1848 +snd-opti92x-cs4231 +snd-opti93x +snd-oxygen +snd-oxygen-lib +snd-page-alloc +snd-pcm +snd-pcm-oss +snd-pcsp +snd-pcxhr +snd-pdaudiocf +snd-portman2x4 +snd-pt2258 +snd-rawmidi +snd-riptide +snd-rme32 +snd-rme96 +snd-rme9652 +snd-sb16 +snd-sb16-csp +snd-sb16-dsp +snd-sb8 +snd-sb8-dsp +snd-sbawe +snd-sb-common +snd-sc6000 +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-emul +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-sgalaxy +snd-sis7019 +snd-soc-ad73311 +snd-soc-ak4104 +snd-soc-ak4535 +snd-soc-core +snd-soc-cs4270 +snd-soc-l3 +snd-soc-pcm3008 +snd-soc-spdif +snd-soc-ssm2602 +snd-soc-tlv320aic23 +snd-soc-tlv320aic26 +snd-soc-tlv320aic3x +snd-soc-twl4030 +snd-soc-uda134x +snd-soc-uda1380 +snd-soc-wm8350 +snd-soc-wm8400 +snd-soc-wm8510 +snd-soc-wm8580 +snd-soc-wm8728 +snd-soc-wm8731 +snd-soc-wm8750 +snd-soc-wm8753 +snd-soc-wm8900 +snd-soc-wm8903 +snd-soc-wm8940 +snd-soc-wm8960 +snd-soc-wm8971 +snd-soc-wm8988 +snd-soc-wm8990 +snd-soc-wm9081 +snd-sonicvibes +snd-sscape +snd-tea575x-tuner +snd-tea6330t +snd-timer +snd-trident +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-usb-us122l +snd-usb-usx2y +snd-util-mem +snd-via82xx +snd-via82xx-modem +snd-virmidi +snd-virtuoso +snd-vx222 +snd-vx-lib +snd-vxpocket +snd-wavefront +snd-wss-lib +snd-ymfpci +soc_camera +soc_camera_platform +softcursor +softdog +solos-pci +sony-laptop +sonypi +sound +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_gpio +spi_lm70llp +squashfs +ssb +sscape +ssfdc +sstfb +ssv_dnp +st +stallion +starfire +stb0899 +stb6000 +stb6100 +stex +stinger +stir4200 +stkwebcam +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +sworks-agp +sx +sx8 +sxg_nic +sym53c416 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +t128 +t1isa +t1pci +tc1100-wmi +tcic +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda8261 +tda826x +tda827x +tda8290 +tda9840 +tda9887 +tdfx +tdfxfb +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +teles_cs +tg3 +tgr192 +thinkpad_acpi +thmc50 +tifm_7xx1 +tifm_core +tifm_ms +tifm_sd +tileblit +timed_gpio +timeriomem-rng +tipc +ti_usb_3410_5052 +tlan +tlclk +tle62x0 +tmdc +tmiofb +tmp401 +tms380tr +tmscsim +tmspci +toim3232-sir +toshiba_acpi +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_bios +tpm_infineon +tpm_nsc +tpm_tis +tps65010 +trancevibrator +tranzport +tridentfb +trix +ts5500_flash +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +ttm +ttpci-eeprom +ttusb_dec +ttusbdecfe +tua6100 +tulip +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tvaudio +tveeprom +tvp5150 +tw9910 +twidjoy +twl4030-gpio +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +twofish-i586 +typhoon +u132-hcd +u14-34f +uart401 +uart6850 +ubi +ubifs +ucb1400_core +ucb1400_ts +udf +udlfb +ueagle-atm +ufs +uinput +uio +uio_aec +uio_cif +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +uli526x +ultracam +ultrastor +umc +umem +ums-alauda +ums-cypress +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-onetouch +ums-sddr09 +ums-sddr55 +ums-usbat +unioxx5 +upd64031a +upd64083 +uPD98402 +usb8xxx +usbatm +usb_debug +usbdux +usbduxfast +usb_gigaset +usbhid +usbip +usbip_common_mod +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usb-storage +usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-int-device +vcan +ves1820 +ves1x93 +vesafb +veth +vfat +vga16fb +vgastate +vgg2432a4 +vhci-hcd +via +via686a +via-agp +viafb +via-ircc +via-rhine +via-rng +via-sdmmc +via-velocity +vicam +video +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtio +virtio_balloon +virtio_blk +virtio_console +virtio_net +virtio_pci +virtio_ring +virtio-rng +virtual +visor +vivi +vlsi_ir +v_midi +vmk80xx +vmlfb +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1-gpio +w1_smem +w1_therm +w35und +w83627ehf +w83627hf +w83627hf_wdt +w83697hf_wdt +w83697ug_wdt +w83781d +w83791d +w83792d +w83793 +w83877f_wdt +w83977af_ir +w83977f_wdt +w83l785ts +w83l786ng +w90p910_ts +w9966 +w9968cf +wacom +wacom_w8001 +wafer5823wdt +walkera0701 +wanrouter +wanxl +warrior +wavelan +wavelan_cs +wbsd +wd +wd7000 +wdt +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wistron_btns +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +x38_edac +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xpad +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_iprange +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +yellowfin +yenta_socket +z85230 +zatm +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +znet +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/lpia/lpia +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/lpia/lpia @@ -0,0 +1,10070 @@ +EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667 scx200_gpio_base +EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008 scx200_gpio_configure +EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c scx200_gpio_shadow +EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd scx200_cb_base +EXPORT_SYMBOL arch/x86/kvm/kvm 0x1dab51e1 kvm_cpu_has_pending_timer +EXPORT_SYMBOL arch/x86/kvm/kvm 0xeea088ad kvm_read_guest_atomic +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/video 0x7a45377b acpi_video_unregister +EXPORT_SYMBOL drivers/acpi/video 0x8826c13b acpi_video_register +EXPORT_SYMBOL drivers/atm/suni 0x1a81e431 suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0xeeef3cfd uPD98402_init +EXPORT_SYMBOL drivers/block/paride/paride 0x17facf08 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x306d8998 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x3585c9bc pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0x53322110 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x5ae45ef7 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0x67b24ca5 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x757bb087 pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0x82c33ce8 pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x88ed73cd paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0x8da10f99 pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x932da107 pi_write_block +EXPORT_SYMBOL drivers/block/paride/paride 0xb89118b2 paride_register +EXPORT_SYMBOL drivers/char/agp/agpgart 0x0212ed31 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x132dbf94 agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3dde2210 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3e8ab91f agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x428dc2b7 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x45329251 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x45f61560 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x47eb3efe agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4f49e04a agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x544eee71 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7c7bdc7d agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7c9eaeaf agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7fe5d2be agp_alloc_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8e2ce280 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x92fe17ca agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9eb44f4c agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa180bf94 agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb66c938b agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb71c0079 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbafdf21a agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc310066c agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8df5cec agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xcb8806b2 get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd7b00017 agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd8f7bb13 agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe46e25c4 agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe8e60ba5 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe945dd50 agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0xedb9ea14 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf1fbf775 agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf594c4b4 agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf9d18dea agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xf9e9a544 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/intel-agp 0xbec72a91 sym_link_intel_agp +EXPORT_SYMBOL drivers/char/generic_serial 0x06ac766c gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0x081d871c gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x12c34688 gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x209db7e8 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x2160f842 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x2d327999 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x4236f43d gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x5463af8c gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x7c5d44e5 gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x804aca11 gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x934f0dfa gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0xaa78af48 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xd58911ad gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0xd7ba3966 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0xed27c5d2 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xf9d82fe3 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0737748f ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x176903cf ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2074e547 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2edee652 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x32f351e5 ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3598e43d ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x442255e7 ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5a7b6f32 ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x72241770 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7563aad0 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7be8ac31 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x82257788 ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x83f7ce2f ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x92b1f52d ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9cd6cece ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb7ceab4d ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbd77515d ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc0b8f3b0 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc9cb95f1 ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd0852a70 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd39898ca ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdc166d62 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe0e698b5 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/nsc_gpio 0x0593317f nsc_gpio_write +EXPORT_SYMBOL drivers/char/nsc_gpio 0x242005c7 nsc_gpio_dump +EXPORT_SYMBOL drivers/char/nsc_gpio 0x5213749b nsc_gpio_read +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/edac/edac_core 0x1238e939 edac_mc_handle_fbd_ue +EXPORT_SYMBOL drivers/edac/edac_core 0x836ca1a6 edac_mc_handle_fbd_ce +EXPORT_SYMBOL drivers/edac/edac_core 0xeeceefcd edac_mc_find +EXPORT_SYMBOL drivers/firewire/firewire-core 0x00e37f33 fw_card_initialize +EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce fw_core_add_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca fw_core_remove_descriptor +EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e9cb03c fw_card_add +EXPORT_SYMBOL drivers/firewire/firewire-core 0x571b92df fw_iso_context_queue +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5c669aff fw_core_remove_card +EXPORT_SYMBOL drivers/firewire/firewire-core 0x5d46fb6e fw_iso_context_start +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6dea8aca fw_device_enable_phys_dma +EXPORT_SYMBOL drivers/firewire/firewire-core 0x6e7caddb fw_core_handle_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x720be5bb fw_fill_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0x77093654 fw_iso_context_stop +EXPORT_SYMBOL drivers/firewire/firewire-core 0x7ea4ee90 fw_bus_type +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8760df0f fw_iso_buffer_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8bac1ab1 fw_core_initiate_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c2f2dbd fw_cancel_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005 fw_high_memory_region +EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793 fw_csr_iterator_next +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6 fw_csr_iterator_init +EXPORT_SYMBOL drivers/firewire/firewire-core 0xb9bc0cc2 fw_core_handle_bus_reset +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc2f6339f fw_run_transaction +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc7eecbda fw_core_remove_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xc9074fba fw_iso_buffer_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xd79b3e39 fw_core_handle_request +EXPORT_SYMBOL drivers/firewire/firewire-core 0xe4728ff3 fw_core_add_address_handler +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf2dbebd7 fw_send_response +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf4ec2f66 fw_iso_context_create +EXPORT_SYMBOL drivers/firewire/firewire-core 0xf91830ef fw_iso_context_destroy +EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc4cacac fw_send_request +EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6 dcdbas_smi_request +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05101a28 drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05b7807c drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x068f0efe drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06c7bd33 drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f1a145 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x076b04aa drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a18f07d drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d1b19a9 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d89084c drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f9dd685 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x10000742 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x101f3291 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x11c91afe drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1377c3e8 drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1596d978 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bcbcf86 drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d120b7e drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x218e73df drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x22203bb8 drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0x26466598 drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x27af0a91 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x28103208 drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3234aa21 drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0x32a5b3b8 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x36101f89 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x39abc2af drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3aa35830 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d781dbd drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f2cb57e drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x405180ff drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x454bc01f drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x47b2fa3c drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x49f6c08e drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e58e64d drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ff47754 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x53676bd2 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5450c2ba drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x557911a5 drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5781dfd8 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5880f80c drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5938ae93 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5999c3a4 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b0e97b8 drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f529f50 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5fd20b84 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x61d0db41 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x63271cee drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x65b77cf0 drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x666e8c5b drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0x669fdbdc drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x673f1e4e drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x67ed4e5c drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x67ee4e11 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x681609f3 drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f546720 drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0x71ddf273 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7288a698 drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x74ba5906 drm_irq_install +EXPORT_SYMBOL drivers/gpu/drm/drm 0x754862e0 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0x755d2b16 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x76a231bf drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7bc1a822 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c85d61b drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ee22c60 drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x82ed6800 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x842fc566 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x845d55e9 drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x85ea46c4 drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x87947ab4 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88592be8 drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x88f4e6f4 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8add0b48 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8c8b5a32 drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d499fdb drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x90881dbf drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9437ea7c drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x94b97cf8 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x950fb7a1 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x972401dc drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x98a5ad18 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9da6b775 drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dca0ecc drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa101209c drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa439a28b drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa6c1d6a7 drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb17515e7 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb182c9d7 drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb26c2099 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2a1075b drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb466bbee drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb554f86d drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb7b410c0 drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb843605d drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb885fbc2 drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb5f023c drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb895115 drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc657a509 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc7e39763 drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd6753f8 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd270786f drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2721efc drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3cd0cf0 drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd6b5fda8 drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8725b43 drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8a713b0 drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb0c2641 drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb8611b9 drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdbea57c2 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc133fc5 drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3331cd drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1146bef drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe206b96e drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5913992 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe625bcc0 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe72e6436 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c35aa6 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7e180a3 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeae390cd drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xee977cb5 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xeed5a73b drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf08ff330 drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1791ed8 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4cb9dcb drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfb126d6c drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd19ec13 drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff1903be drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x06204911 func_sym_link_intel_agp +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x40dc2f57 i2c_dp_aux_add_bus +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x597e730c intelfb_remove +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xc7af4b29 intelfb_probe +EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xf30d5638 intelfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x2806e8f0 radeonfb_remove +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x75680b92 radeonfb_resize +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xb1a6064e radeonfb_panic +EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xcb964dc0 radeonfb_probe +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e6f46a3 ttm_bo_kmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0ebf8900 ttm_bo_unmap_virtual +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x13cabf7a ttm_bo_reserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x147bc244 ttm_bo_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7 ttm_global_item_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3fb4388e ttm_agp_backend_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5832a87a ttm_bo_mem_space +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70 ttm_global_item_ref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7741948a ttm_bo_clean_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x808fac47 ttm_bo_wait +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x830fc9a9 ttm_tt_bind +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x945c1491 ttm_bo_move_accel_cleanup +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9c8580c3 ttm_bo_device_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9d8ec50a ttm_mem_global_release +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa143e628 ttm_mem_global_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa57e59f7 ttm_bo_kunmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa6140311 ttm_bo_init_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac1baf4c ttm_buffer_object_init +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbbf97e6d ttm_bo_unreserve +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc475ee70 ttm_buffer_object_validate +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf66a077 ttm_bo_evict_mm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd2bb0efa ttm_bo_move_memcpy +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed8af127 ttm_bo_unref +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf592a275 ttm_bo_move_ttm +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf6c8a8a7 ttm_fbdev_mmap +EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfb109548 ttm_bo_device_init +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x73647d81 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xc8f92418 i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x66538b96 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xf9cb2c9b i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x8574cb89 i2c_pcf_add_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x34be04ff amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x02647735 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x065eaa42 hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0d1dd565 hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x116e1338 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x19d41e21 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1cd13a21 hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x211876c7 __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x223b33bc hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x239174df hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2708af89 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2756263b hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2e514999 hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x364ec033 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3bc7ee14 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x419aef21 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x495c466a hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4c2b42c9 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4cb909cc hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4eceaafc hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57383028 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64dd0adf hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x679e419d hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b619c25 hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x72d54a1c hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x756fb263 hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x75e14636 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7809239c hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d657af2 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x93f8592c hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052 dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x982a08b8 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9834918a hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98cdf1f3 hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1028927 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2027d65 hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa3d99571 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa52d6903 hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa82d8572 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6 dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaa687ba3 hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaa78f66b hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xabc4428e hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3c6a0a9 hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb57fd55e hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9273ea9 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb952f761 hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620 dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd539ce7 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd594010 hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbfd0cbd1 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc220cdb4 hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc9c7ca13 hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcc9570a2 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9c21d51 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdaf4a4b7 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdfe6ed60 hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe0b76f59 hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe3cc52a9 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe434598c hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe5a3efde hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe985317a hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeb6d7fb4 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf8bd7e0c hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfb74729a hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff350f6a hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff53346b hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x467d2f0e ohci1394_stop_context +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6043e7ad ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xb0c2f3d0 ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x051e4460 rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xd9163122 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xde1e4253 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xf091daf2 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x47d96c8b ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x59abe518 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x638bb981 ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x66bb58bc ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x74d86559 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8cbe0dbf ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9357b090 ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x93e67f85 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x95640778 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x99709ca8 ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa611f0d4 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb20cd25f ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb7a7d9c6 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb9bf5b8d ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbd7a3388 ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xd401bba9 cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdfbc2a0f ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x054d1786 ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09386d7c ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c56903c ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c6520b7 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x141d1451 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14877ca5 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x155a7bce ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1cae0700 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1fdccdb0 ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x217863dc ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2415d8fd ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26d3a24f ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2782c6c7 ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2aac33a1 ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d7cefff ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3073df88 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31b04c7c ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x352b79ec ib_umem_get +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x43183401 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x46861fcd ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47394b94 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48c710f6 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4a49861f ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ad88755 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4c289583 ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4d41ded2 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4dd1acfc ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4de8b108 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4e314ea0 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4f2f02ac ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4fb9312b ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638 ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55f0f9cc ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6256483f ib_umem_release +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68c6d3f1 ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74c341ea ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77623769 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c2321f9 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7fca838b ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x813f8e51 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x839b2761 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b746d1b ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93b7ab54 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d10ee9a ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e14b688 ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa04d2142 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa13425cf ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9e44ba1 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaf29eb82 ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb151d926 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1 ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb6974885 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc185e6f5 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc67524e2 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc6a8f0e9 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc7348e54 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2d9c51e ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd30e1eb1 ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd551abbc ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd7f7b31b ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd868b5b0 ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9f9c3dc ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe10482bc ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xea7e0c63 ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf55e545e ib_umem_page_count +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5aab954 ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf826502d ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd1f7dd5 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x217c0ed0 ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2873131f ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x33cdb7e3 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x41ede272 ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x53f36a1c ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6260f8c6 ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x78b18cb4 ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc6f9edf0 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xcf62226f ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd4f12d84 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe81c60b7 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xeb107fe2 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1049cac2 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x111f8b42 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3136ebb5 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d49a7df ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x704b093e ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34 ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb632e922 ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd6007859 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc ib_copy_path_rec_from_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51 ib_copy_ah_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a ib_copy_path_rec_to_user +EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575 ib_copy_qp_attr_to_user +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0d7700ff iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x27c0b2c7 iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5bc7f157 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x63d77131 iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6c6ff816 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc105ddae iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc906d323 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xeb7492bb iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0653f069 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x22f90069 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x341ddbe3 rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x34695baf rdma_destroy_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x47bb962d rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x58fb84c6 rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5bbe6291 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5c919e22 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6c324083 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x78810d49 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaec51355 rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb2a945a5 rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb6ed49c8 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbaef7225 rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc571a594 rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xca601f2a rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xeea3777e rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf4bccb8b rdma_join_multicast +EXPORT_SYMBOL drivers/input/gameport/gameport 0x04a18f53 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x0ab0b234 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x2597b6c4 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0x6cc7a998 gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x6f549cf5 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x772234ca gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x884b4061 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x8d3de058 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xb653866c gameport_start_polling +EXPORT_SYMBOL drivers/input/input-polldev 0x03a92d38 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x56c1ede2 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x9c94dc43 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xb8477f22 input_register_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x10eae44c capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2450ac2a attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2af5bae2 capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3e771440 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x54303e0a capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x95b61704 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc4bf477f capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc5cd79be detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd337b35c capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe778b687 capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1 capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf8c9331e capi20_put_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x24de6414 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x3045a62c b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4d895562 avmcard_dma_alloc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x53bd82d4 b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5aea5863 b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x623f2284 b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x62d0a2e3 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x68dc562e b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7d6f23e9 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x80b8aec7 b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9831c74e b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb6adf738 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd1612706 avmcard_dma_free +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe32331b5 b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf9a68ea9 b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc b1dma_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x38bfc532 b1dma_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x4d3678bc b1dma_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x6c674fd6 b1dma_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x742c07e2 t1pci_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8e810526 b1dmactl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x9d2b26ed b1dma_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xc83c0d37 b1pciv4_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xdd71454a b1dma_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xfb80bb44 b1dma_reset +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1 DIVA_DIDD_Read +EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x6d6d83ed proc_net_eicon +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce hisax_unregister +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99 FsmFree +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899 FsmInitTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x5299c925 hisax_init_pcmcia +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734 FsmChangeState +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27 FsmEvent +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9 FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8 FsmDelTimer +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c hisax_register +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657 FsmNew +EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b HiSax_closecard +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x339ff117 isac_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a isac_d_l2l1 +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x446fce35 isacsx_irq +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x68f7f261 isacsx_setup +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x836ab790 isac_init +EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x8f294c0a isac_irq +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x1ee629e2 isdnhdlc_rcv_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x95aed401 isdnhdlc_decode +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0x9ffc8215 isdnhdlc_out_init +EXPORT_SYMBOL drivers/isdn/hisax/isdnhdlc 0xf5c8131d isdnhdlc_encode +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xa663866b isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xdbed6f6d register_isdn +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f isdn_register_divert +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfff36346 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x17b0b68c recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1f6143d1 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2fd9cdd5 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6901181b mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x72950009 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x749e6aed mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x88d0db9a get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8949ce1a recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x958afc11 recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9ba89926 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa7a020d2 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaa33635f l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb3290f3e mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb5af4691 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xcb5970a3 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd713ce03 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe2b18b97 recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xea414936 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf23050ea bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf369c91e queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfb6b92c7 mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x3066f923 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x9016bc6b mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x8b9ed18b mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x078e711d mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x7d661004 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x4eaf9bf4 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x30a8a8d7 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xdca612cb xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0477046d flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x102b0b31 flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x133e1d9a flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x154bfa9d flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2262aa14 flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3bb01751 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x43d985aa flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x457011d6 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x45c489aa flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5aa90386 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x61957d72 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa8f8f63f flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaf4d7264 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbc326438 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc28f488e flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc9035c63 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcd994249 flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd861f887 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf0215549 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf264da7a flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x5333cdf3 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xddd45442 bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf525c944 bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xfab6e138 bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x017e68cd rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x1de72819 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3c4ab8ab dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5d2b09fd dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8081c67c dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa233cc78 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xacef6497 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb83b9163 dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd1466722 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xe294464a dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x016ddac6 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0d773923 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0dce2187 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1978abcb dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29da56f3 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x32f6b110 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x394771f0 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x40896358 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x40b10731 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4cdbfb29 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4e4ceae9 dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5764a821 dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x57a90ec1 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x58ee6d3b dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3 dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x91ff3cbe dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa330fd2a dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xaeaf2dba dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xba6efaa8 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbab35765 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc3651604 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc3cd3caa dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc73bbf37 dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd4f16b5a dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd98cfcc1 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfee95783 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x15cebbf9 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x39e99775 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6432e41a dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x93342ee9 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa818cc4b dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xd8c57510 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xaaf9c2a2 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x01befea7 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x12c614a5 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2eb165ff dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x39842ad8 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4de0b551 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4fd3f953 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6008297f dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x99435b8a dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe3653ec6 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xef2e1fc5 dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf422f2a4 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x6c60b743 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x06c2aedc au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x58e02bb1 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x9695df08 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xa9a9cbd7 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x64240dc7 cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x1b14198c cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x391c0d44 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x15e15861 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x23ed7176 cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xf20c5f60 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x424be6d6 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xa062d507 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x817a1b33 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x124018b5 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x35d03aca dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x3dc873ce dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4a7f1bbb dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5954ff28 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x9b6ab1ac dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x161f7ca0 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xcb3c0b5b dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x03d43821 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8dc54942 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x923233ae dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xb9bb047a dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xddbe324a dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf9c6cdc9 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x022e6d79 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x38ae3649 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x42bacd7b dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x44bc5c22 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x1e2df2da isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x97345eb9 isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x9844f763 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x4317b254 l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x3fa95cfd lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xf716f813 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x68546c28 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x05f58028 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x3f1c0a9b lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x968452ed mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x672265a8 mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x05d7f5a7 nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x02415101 nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x159e5ee6 or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xfb9af045 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xbf01a144 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x810c1aed s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x467d96ca s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xfabcf380 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xa775667c si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xbd0d00dd sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x6b8548a1 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x4e61885f stb0899_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xfe961ce9 stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x83839c69 stb6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x67e7b734 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x86e80810 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x40aad7fe stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x92b7d6f9 stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x59646f35 stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xcd88787a tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x9a2067fb tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x93ff1d5e tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x668b18c2 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x6c30eda2 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xf4cdbfb0 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xb953d63d tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x8fab84f2 tda8261_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xe833673d tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x259a3f97 tua6100_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x6b8a20e6 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x5ae93ae6 ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x750d473b zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x38582200 zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xe22771e8 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x8daf3742 ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xa6683688 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x37c6499a bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xec4a8b75 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xef9c445c bttv_sub_register +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x8dda2558 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xb10a359b btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x299b8c39 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0x55f0faa2 cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x01516bec cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x25524074 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x41882018 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xab683b99 vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4067ae4c cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x891c058d cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x92f2aae8 cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa3b007bc cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa939d64b cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb32db489 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1d2d4c34 cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3c902c69 cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x485d08b8 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9380e590 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb5e5e2d1 cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xcefae017 cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd5299292 cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x01b97487 cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1af3d2de cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x33a1d530 cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x478b4a62 cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x50150138 cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5ab5a370 cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5b909c89 cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5f9a8575 cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6433000c cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x66282cc1 cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x668741c3 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x94012232 cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9954c031 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa58d2de3 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa68fa8ae cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb0458da4 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb7065b7c cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc4383ae4 cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xda5c6015 cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdb2a0b91 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe775db8e cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xee41ae36 cx88_core_irq +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x9ebbe2fe em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xe7056712 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0a59ac86 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1a8f70c5 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x36afae2e gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x414be2ea gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6923afd5 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7c9295b6 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x90319302 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x34ac2aab ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3e29a2c2 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7e43de1a ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7fc53380 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xafe1fb62 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb42695f0 ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb697c9fb ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe33453e5 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf9abb607 ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf9f62c35 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfe314229 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x01fe3f73 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x039587d4 saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x281d97fc saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5966a0ef saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x61953406 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x80ddae0f saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8f2d76b5 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb849c087 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd3467abc saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd90c0c33 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfad4b217 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfe9c9b2d saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x178f3b2d soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x1cfc86ca soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2956d40a soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2994630a soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xb8a47c04 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcdff46a8 soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcf0d6665 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdb44c42c soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xfec7fb38 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/tveeprom 0x24aac9d6 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/tveeprom 0x674e26c7 tveeprom_read +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x3b584c15 usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x623dcba5 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x671ada0c usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x72559896 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xad105f96 usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xc6768b4e usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x3cf1335b v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x0319d214 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xe87afef7 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0fae7487 videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x22ef07f9 videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x680ac7dd videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6f5d79c7 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xb926d474 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf26a1645 videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x17e9e3dc video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0x19579de3 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x37ebc4c7 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x50e3a540 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x7d259b1c video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x8d24c774 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x913f8ba8 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xab64a943 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xf669eea5 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x0d64b18f videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x19339a6b videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x52854cdc videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xc034cbd5 videocodec_unregister +EXPORT_SYMBOL drivers/memstick/core/memstick 0x0638fed9 memstick_add_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x08ac68e5 memstick_register_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x1cec02f7 memstick_resume_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x4413d492 memstick_set_rw_addr +EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b5c17c8 memstick_init_req_sg +EXPORT_SYMBOL drivers/memstick/core/memstick 0x60d8b429 memstick_remove_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6256e125 memstick_next_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x633e9858 memstick_alloc_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x6e59a344 memstick_suspend_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c380be6 memstick_new_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c9b5da4 memstick_init_req +EXPORT_SYMBOL drivers/memstick/core/memstick 0x93e194a6 memstick_unregister_driver +EXPORT_SYMBOL drivers/memstick/core/memstick 0x9bf6e2b4 memstick_free_host +EXPORT_SYMBOL drivers/memstick/core/memstick 0xb9f80ff1 memstick_detect_change +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0b58c5db mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1c8f5d16 mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1f7b14ad mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x25239b3b mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x319f747c mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x341356c7 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x484027f9 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x49ef2249 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x583a9725 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x58dedb26 mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5f479b45 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x663ed5fc mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x75cdd804 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x806ad73b mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8222d060 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x872424b9 mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaa991285 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb27d3d84 mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb8fb09e8 mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc25052ad mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc2ee7a09 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc3da9d47 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc6995bfa mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe2e51796 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeb7f047a mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf0edc40c mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf58ef506 mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfab0c4bc mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x02480ba4 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x092d6373 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0b23136d mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0ba23af5 mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1bfe8aa3 mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x22daf962 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x349ca889 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x350b742f mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x481f1667 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x540425f2 mptscsih_suspend +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x587b6ffb mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58b5722b mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5e69e507 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x69a59558 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x70d8b047 mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x770e10c2 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x87cb11ab mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9ef26e40 mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa8a04f82 mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb2edbb96 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb4c37e5c mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbd2ea8fd mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b5f62b mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe3f9df1a mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe64e7c58 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe67e3234 mptscsih_host_reset +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x03770a13 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63148e1b i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x78c37ea7 i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x82a753dd i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9600fcf6 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99c7eb59 i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa15d2132 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa6c36cee i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb90d691a i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbef19807 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd0260cf9 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd20ea99a i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdc5ce274 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xed095d87 i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xedc5456b i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf90a5311 i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfab2a8d8 i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfd40d2f3 i2o_msg_get_wait +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0496a5c7 ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x06145d6a ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x1ffb86c4 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x37919f89 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x46115478 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8676c889 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa89e09d0 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf271fecc ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x2540964e pasic3_read_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xbbbb0217 pasic3_write_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x500a1a87 mfd_remove_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xf288ccd4 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f tps65013_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130 tps65010_config_vregs1 +EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7 tps65010_set_vib +EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69 tps65010_set_led +EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc tps65010_set_low_pwr +EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d tps65010_set_vbus_draw +EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36 tps65010_set_gpio_out_value +EXPORT_SYMBOL drivers/misc/c2port/core 0x64c0b62b c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0x7723086d c2port_device_register +EXPORT_SYMBOL drivers/misc/ioc4 0x03d57059 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xb215381f ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x033c285e tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x1206d051 tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x153678a5 tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0x287a5398 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x3a0b837e tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x57422c39 tifm_alloc_device +EXPORT_SYMBOL drivers/misc/tifm_core 0x8296b88a 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drivers/net/8390p 0x99978ef8 __alloc_eip_netdev +EXPORT_SYMBOL drivers/net/8390p 0xa1117d18 eip_netdev_ops +EXPORT_SYMBOL drivers/net/8390p 0xa82b850a NS8390p_init +EXPORT_SYMBOL drivers/net/8390p 0xab4d8c42 eip_poll +EXPORT_SYMBOL drivers/net/8390p 0xb663e226 eip_interrupt +EXPORT_SYMBOL drivers/net/8390p 0xfefe5a95 eip_tx_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x12993222 arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x63662f29 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x680d5308 arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x68b50be2 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6b84d18b alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x75c42363 arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x909c064d arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb9772f1b arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd302adff arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xfe77027c arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x0af2f694 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xae61e613 com20020_found +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xffd69a5d com20020_check +EXPORT_SYMBOL drivers/net/bnx2 0x0b1a3af8 bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cnic 0x830b42ab cnic_register_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x194a7091 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1fb7765e t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3df809ba cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4625d720 cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4b560888 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4d5c4c6e t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4e495727 t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x60c7daeb cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x78f3a3a1 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7cd56f21 dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x82707d21 cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x85579317 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x940cd6e4 cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd00f8f9d cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xdccad54c cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xde647f25 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x2680c9ad hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x2aabd293 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x86d1fa4f hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xc15bac5c hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xfd4795a1 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0d281d90 sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x22d0b654 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2e032928 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x597d2607 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5bd4d37d irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6adf1fb1 sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x703363a5 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7376f70c sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xaa068656 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xbf3631aa sirdev_raw_read +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x122b1ef8 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0x1f07e797 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x50c1b6dd mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0x7083265e generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0x9defc0e8 mii_nway_restart +EXPORT_SYMBOL drivers/net/mii 0xc03fc286 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xd0e53e81 mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0xdbf8de37 mii_check_link +EXPORT_SYMBOL drivers/net/pppox 0x7bb637bb pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x94b1e4e8 pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xf76ebdf9 register_pppox_proto +EXPORT_SYMBOL drivers/net/sungem_phy 0x3a63de08 mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x6c423ec2 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x97f5dd38 tmsdev_init +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd8557fe9 tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf12d4865 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xfe35dcfb tms380tr_open +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x1f0ec66d hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x2866b731 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7e4ee8f5 hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7f3663fd hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0x8d065af4 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9c7f5f47 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xa49742d0 register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xb5d81eb2 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0xbed10bb0 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf7598ac2 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf851382f hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988 z8530_dead_port +EXPORT_SYMBOL drivers/net/wan/z85230 0x1c175809 z8530_sync_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x205dc6ec z8530_nop +EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6 z8530_interrupt +EXPORT_SYMBOL drivers/net/wan/z85230 0x2763a2ae z8530_queue_xmit +EXPORT_SYMBOL drivers/net/wan/z85230 0x3624d1bc z8530_sync_dma_open +EXPORT_SYMBOL drivers/net/wan/z85230 0x366c6bbd z8530_init +EXPORT_SYMBOL drivers/net/wan/z85230 0x5938a8e4 z8530_channel_load +EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29 z8530_hdlc_kilostream +EXPORT_SYMBOL drivers/net/wan/z85230 0x601ef51c z8530_sync +EXPORT_SYMBOL drivers/net/wan/z85230 0x6cb0626c z8530_sync_dma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0x71016f98 z8530_null_rx +EXPORT_SYMBOL drivers/net/wan/z85230 0x7f41c00b z8530_describe +EXPORT_SYMBOL drivers/net/wan/z85230 0x9395f0b5 z8530_shutdown +EXPORT_SYMBOL drivers/net/wan/z85230 0xa0762e46 z8530_sync_txdma_close +EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064 z8530_hdlc_kilostream_85230 +EXPORT_SYMBOL drivers/net/wan/z85230 0xfbea3bb9 z8530_sync_open +EXPORT_SYMBOL drivers/net/wan/z85230 0xfc1f6e08 z8530_sync_txdma_open +EXPORT_SYMBOL drivers/net/wireless/airo 0x4816d7fb reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x631c73db init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x76ead56e stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x26a40fcc ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x3d81345d ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/atmel 0x00c22a83 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x03b05c7c stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x29befb7c atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0633b196 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0d59f809 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0ee15f7e hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2792769b hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2ad7ab12 hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2b107622 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2d0eee58 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x44e275aa hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x457a4500 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x47e5b56d hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4885e0f8 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5eae619c hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6607eaf7 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7286a733 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x86687081 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa0cad597 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9e14dd3 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaaa2641f hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xacc91ca9 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2576633 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbea3bf62 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc3037119 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd63500e9 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe7990bcf hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe95dd403 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1ecadd5f ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2155275c ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x35b1fbf1 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x487e269f ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5c97fd56 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x699d3d8b ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6b998cf9 ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6fce8d5c ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x93ce993c ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9dea7d01 ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xab1fe93b ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb2e01f39 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbb3a6892 alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbee8dcd4 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcb268ceb free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xce178a81 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd5854b92 ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd673cc0f ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2d708c6 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf87ecd5d ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf9924c63 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x002c7560 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02125584 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a83a448 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d63c8d3 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1113994a iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1222d76f iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x16413069 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x178425db iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x17d3ebcf iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19411e57 iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1999bf6d iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b39621a iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b7568c7 iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1eec9911 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20c75352 iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x216d7d27 iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21dd695d iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22d40488 iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x231681eb iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2663b1a4 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x287896a7 iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a5ec84b iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a935941 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b14b6ed iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2c4218a7 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2c5a4717 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cb63d7f iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3301c7ad iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34a60ea2 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x358e0c89 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x366f4cbd iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3904db16 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4255256b iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43409363 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44c5a718 iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x45fd4dd4 iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x461ff14c iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47d223ae iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48597444 iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48e855bc iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49ce0b8f iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a2b9860 iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a68c5c1 iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4afb35fc iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f5f897d iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50b88c21 iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51c17617 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5328f30e iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54d6048a iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54e09ed4 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54f415cc iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5536dea0 iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5903bd47 iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f638263 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6151418a iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6234690d iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x630b11a0 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x647a2b3e iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x64e21508 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67d84230 iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6851243c iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6870cdf1 iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69f1bf3c iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6a1edd33 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70eebe81 iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x716264fc iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x731495c2 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x732ebf2c iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x744e5177 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79cdc37a iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ae199a4 iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b0c98e2 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x818f760f iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x81edc8e8 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x835294a0 iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8781dc69 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8878ba6a iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x897ec892 iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8abef9f4 iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b161ef8 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c668d9b iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e2fe2c2 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8eb9cef9 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x935bc266 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x946dca41 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95ba01e4 iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9bcae18d iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c2cb6b8 iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c89437c iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0360cf9 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0616cff iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1c1608e iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa327946c iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3301bab iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3d788a7 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa90a07d0 iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa9ac21ef iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaceeecbd iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaed0a944 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb71f63bd iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbaa6f249 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbff60732 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc5c3bdf4 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7d88902 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc99432c8 iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca729a37 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcfa1b0b4 iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd20a413a iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4b4f962 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd76fa2c5 iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd80a446d iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd95489ab iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda3b263f iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda672480 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdaa75c67 iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc915b82 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd39c01c iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf6ce870 iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1b2aa9b iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7c4289b iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8a55899 iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8ad50cf iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe969f87f iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea90219a iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeaa00059 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebbe2f36 iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefd2965d iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefe0ffda iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeffc1ada iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf043e30c iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf08ceb9c iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0c1b3dc iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1dc951d iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf58f30ef iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6107574 iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf7f9238d iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb619a62 iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd43c8be iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff1c034d iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4e9e979d __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa31c363e alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xb011ebf1 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd618d305 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe86640af __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x0c51611e parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x216e1c83 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x278b9050 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0x28894abc parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x28d0d320 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0x3025adb9 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x3cec1c7b parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x4c0a52fa parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x4d67cf23 parport_write +EXPORT_SYMBOL drivers/parport/parport 0x4d9a1150 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x60d85a4c parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x6458ae4e parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x7891cd34 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0x792f319e parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x84005d84 parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x8d88c4d1 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa7d16cf7 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xa7f93fb1 parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xb2798d08 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0xb8f46ab6 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0xc2216700 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xc92b2715 parport_release +EXPORT_SYMBOL drivers/parport/parport 0xcf5040dc parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xd145b721 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xd61da85b parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xe18bbe7b parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xe2bfaaf8 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0xe7e1f941 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0xeda93818 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0xf4ba58e9 parport_read +EXPORT_SYMBOL drivers/parport/parport_pc 0x1de1051e parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x67cca1a1 parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x544b6955 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5e21e36f pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x64e9f3e4 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x66ee2e09 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6dbeab60 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7370e68e pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7cfc293a pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x86b8a3d5 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x94772f88 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x950e8cdd pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xae34c8c2 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb24170d0 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb996ca19 pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcc986f2a pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0869335 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x01b3978b pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x08832292 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f12972b pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x29cca1d8 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2aafeccc pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3ef8f651 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x41313e0e pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4337b545 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x45de1a10 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x49178f5b pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4c57b7a4 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4e32cd67 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x585737b2 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x585c4ed3 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x59d7adc7 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6a86db0d pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6acceee5 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6dd8a2c6 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7173ca10 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa2068b21 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xab8e96fd pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbfb2cfac pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc34ac907 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc368f687 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7c16490 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xca8100f0 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xccd549a6 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcee45bd3 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xeb4174f5 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf0828121 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf12e5a21 pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf19c985d destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf7839243 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x65bfcc32 pccard_nonstatic_ops +EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117 sony_pic_camera_command +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/pps/pps_core 0xfb57a712 pps_register_source +EXPORT_SYMBOL drivers/scsi/53c700 0x98944745 NCR_700_release +EXPORT_SYMBOL drivers/scsi/53c700 0xb43dcef9 NCR_700_detect +EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc NCR_700_intr +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x07c9cc07 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1d279df7 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3f996b98 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x9c13eee3 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbcb5fa24 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd1365491 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf3a804b3 fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05fed645 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f04a196 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f4f85a2 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x126869ab fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x132e8bee fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x14648cac fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x192a13c7 fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1b30788d fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x248e583a fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x29f47a58 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32d4be90 fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x39e280bb fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x472196ed fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51066ca4 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51e720b6 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5a7e5126 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e3fd346 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6b8415ae fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6da6fcc4 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x769ab8b0 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76a03445 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76f143a1 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x87d4145e __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b76a964 fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8dfb7a7b fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8f64e9e9 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x993292ba fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9b8850d6 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9eecb532 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb311f94f fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd342747e fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd3b521f8 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd766cca7 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd8a4f9bc fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc1cce44 fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdfd3ba51 fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf10317d5 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf303a9a7 fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf368faa5 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfc5d3231 fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd21d77f fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x82e1b229 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0f90597e osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2270426d osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x361722f3 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x37ef6439 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x447609aa osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x54fca571 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x660608a4 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x69c5a375 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6c2f4e06 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7f18b179 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8221d9e0 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x91735cd5 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9926e244 osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9e13aae6 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa8c9b529 osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaaa3b896 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xafee8c8e osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb0b891fd osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6076e81 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6b088bd osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb962308d osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbc769e07 osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbf07ffa8 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc05b2e25 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc400f0cc osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc8534d50 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc9d10a02 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd4bed302 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdea070e1 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5b972b4 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf1762c17 osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf88d462d osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/osd 0x2d581b1d osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0x3347c936 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xf24ce4ea osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1cd03d8f qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x40d170ce qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x47d1655e qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6916b668 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x74da9bf1 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xafd28402 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x44411248 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x6973f6df raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xbc953107 raid_component_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1429c744 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1bf8e1c4 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2d87e615 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6a58d62d fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8b62bdd2 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x922b50d0 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa361e8d1 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc289e95d fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd5e7f4d7 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xefe05f84 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfa548732 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfcd25231 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0325c2a7 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2067c78a sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x259eb432 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2b2ada56 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3ffc12a2 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x53a435a1 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5749e5fd sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6267ff81 sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x64c34834 sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7df2e096 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f5a7969 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x810d28b7 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x882846ee sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88ec2076 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88fbc19a sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9d7e6fd5 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xac22b17c scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb6459be8 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xba99478b sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbde72b6f scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcd8dda78 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd22fe9d1 sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd3ae2402 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd9237534 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe74aa6f2 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xef8d5842 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x05b716f0 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3961a71f spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7e450ac5 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xe0a0d85c spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xfaac07ad spi_schedule_dv_device +EXPORT_SYMBOL drivers/ssb/ssb 0x021d6616 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0x02eb5eea ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0x0791e841 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x1c5d0395 ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x2603e834 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x2ec6bcb0 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x418f971e ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x483ec5ca ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x60af4e41 __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x62dfc907 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x9430862a ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xa2484faa ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0xa65bb086 ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xd8025af4 ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0xd80cfeda ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xdb709fb8 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xebe3ef67 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0xf69cfa05 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xfbf4f642 ssb_device_is_enabled +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x02ceddaa comedi_event +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4 range_unknown +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x1f45052f check_chanlist +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2a1c503d comedi_buf_write_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3 range_bipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3abc74de comedi_buf_read_alloc +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4434abbd comedi_buf_memcpy_to +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3 range_bipolar2_5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x54436a9b comedi_buf_get +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5a93f587 comedi_buf_put +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x64a65a47 comedi_buf_read_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6df090a4 comedi_buf_read_n_available +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c range_unipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x97412e26 comedi_buf_memcpy_from +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x98ed81a5 comedi_set_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x99be8c8a comedi_get_subdevice_runflags +EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9d1aab75 comedi_driver_unregister +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa31991b9 comedi_buf_write_free +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa59a36af comedi_error +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f range_bipolar10 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2 range_unipolar5 +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe4398144 comedi_reset_async_buf +EXPORT_SYMBOL drivers/staging/comedi/comedi 0xef6d5511 comedi_driver_register +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x086ab627 subdev_8255_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x8737b02e subdev_8255_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xd0c68403 subdev_8255_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xfe9ebd7a subdev_8255_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x7dbda515 cfc_read_array_from_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x8bd4ea86 cfc_handle_events +EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xe8a9863f cfc_write_array_to_buffer +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0a2203ec mite_sync_input_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x27d1e3c1 mite_buf_change +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x3f3cb996 mite_dma_arm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5b9c6223 mite_dma_tcr +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5ff8e65d mite_done +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x61d267e3 mite_dma_disarm +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6984b2f4 mite_release_channel +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x82f858c1 mite_bytes_written_to_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x94a5ed63 mite_bytes_read_from_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9a466c63 mite_get_status +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb095a728 mite_setup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb74bbec8 mite_prep_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb960c380 mite_unsetup +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc41164ce mite_setup2 +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc4d87c26 mite_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdcee3c67 mite_bytes_in_transit +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xdd6f541f mite_request_channel_in_range +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe25fc9b6 mite_bytes_written_to_memory_ub +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xf4027c14 mite_bytes_read_from_memory_lb +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025 mite_list_devices +EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfc948d60 mite_sync_output_dma +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x03e7a430 subdev_700_init_irq +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x3c90fbb3 subdev_700_cleanup +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x8a63d83e subdev_700_interrupt +EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xaa0439d2 subdev_700_init +EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x58050564 comedi_pcm_cmdtest +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4 comedi_loglevel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e comedi_get_n_ranges +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36 comedi_get_subdevice_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c comedi_command +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae comedi_get_n_channels +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9 comedi_cancel +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3 comedi_get_buf_head_pos +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694 comedi_set_user_int_count +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18 comedi_dio_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5 comedi_dio_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc comedi_data_write +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f comedi_poll +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3 comedi_get_buffer_offset +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263 comedi_do_insn +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d comedi_register_callback +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094 comedi_find_subdevice_by_type +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463 comedi_get_n_subdevices +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623 comedi_get_buffer_size +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9 comedi_unlock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656 comedi_data_read_delayed +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf comedi_perror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e comedi_data_read_hint +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320 comedi_get_krange +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5 comedi_strerror +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40 comedi_get_driver_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0 comedi_get_board_name +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52 comedi_open +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501 comedi_mark_buffer_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b comedi_mark_buffer_written +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad comedi_get_maxdata +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a comedi_map +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3 comedi_get_len_chanlist +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df comedi_lock +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259 comedi_get_version_code +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468 comedi_dio_config +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb comedi_command_test +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421 comedi_close +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940 comedi_data_read +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4 comedi_unmap +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4 comedi_get_subdevice_flags +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778 comedi_fileno +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df comedi_dio_bitfield +EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db comedi_get_buffer_contents +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x160c00db go7007_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x17007442 go7007_boot_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x8aadc34e go7007_parse_video_stream +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x8f0470e8 go7007_read_addr +EXPORT_SYMBOL drivers/staging/go7007/go7007 0x9c986bc5 go7007_alloc +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xca444344 go7007_snd_init +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xd1068580 go7007_register_encoder +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xf71f32fc go7007_snd_remove +EXPORT_SYMBOL drivers/staging/go7007/go7007 0xfbd485d0 go7007_read_interrupt +EXPORT_SYMBOL drivers/staging/go7007/s2250 0x801dd58d s2250loader_cleanup +EXPORT_SYMBOL drivers/staging/go7007/s2250 0xf3e839c6 s2250loader_init +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x85561a57 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x93b52521 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xccb0743b variax_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xdfcef1b2 pod_create_files +EXPORT_SYMBOL drivers/staging/meilhaus/me0600 0xf0426d1a me0600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me0900 0x6e9f4fe0 me0900_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1000 0x0ac9c7a3 me1000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1400 0xac90a9ab me1400_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me1600 0x172baea6 me1600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me4600 0x5f673333 me4600_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me6000 0xdb8755ab me6000_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8100 0x4a7ce75b me8100_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/me8200 0xa93550f9 me8200_pci_constructor +EXPORT_SYMBOL drivers/staging/meilhaus/medummy 0xb9e919d4 medummy_constructor +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0198eec3 ieee80211_wake_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0a8b52ee ieee80211_disassociate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0aa08191 ieee80211_softmac_xmit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x0f6d8444 ieee80211_stop_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x10ca9fcb ToLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x124165f0 ieee80211_start_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x20fa6b44 alloc_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x258a8a82 ieee80211_start_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x29340740 ieee80211_stop_send_beacons_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2a8f69c4 ieee80211_wx_set_mlme_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x2ce4f359 ieee80211_is_shortslot_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3170f4e7 ieee80211_wx_get_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x356946e1 ieee80211_send_probe_requests_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x3995c569 ieee80211_rx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4d729915 Dot11d_Init +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x4e2449d0 ieee80211_wx_get_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x552a61e4 ieee80211_wx_set_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x5aeb6ec5 ieee80211_wx_get_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x5df2a015 IsLegalChannel +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6024ce81 ieee80211_wx_set_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x677b903b ieee80211_reset_queue_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x6864c34d ieee80211_stop_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x761d4361 ieee80211_wx_get_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x763c8373 ieee80211_wx_get_encode_ext_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x79194a7f free_ieee80211_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7ce06cc1 ieee80211_wx_set_rate_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x7d5eb475 ieee80211_softmac_scan_syncro_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x86e205a0 ieee80211_softmac_stop_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8a6e310b SendDisassociation_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8c373002 ieee80211_wx_set_power_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8dc0c495 ieee80211_txb_free_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8fcaba08 DOT11D_GetMaxTxPwrInDbm +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x8feaf6d9 DOT11D_ScanComplete +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x967220db ieee80211_rx_mgt_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x98ee5ff0 ieee80211_get_beacon_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0x9f9f00f6 Dot11d_UpdateCountryIe +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xac2f39bc ieee80211_wpa_supplicant_ioctl_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xac5bbd13 ieee80211_wx_set_gen_ie_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb3a5ce5e ieee80211_wx_set_wap_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb66321c2 ieee80211_wx_get_name_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb6f89046 ieee80211_wx_get_essid_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb77520dd Dot11d_Reset +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xb820ede3 ieee80211_wx_set_rawtx_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xba38d192 ieee80211_wx_get_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbeff211a ieee80211_ps_tx_ack_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xbfee5adf ieee80211_wx_set_encode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc0a0186f ieee80211_wx_set_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc17ddf43 ieee80211_wx_get_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xc370a43e ieee80211_wlan_frequencies_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xca5d37cf ieee80211_wx_get_freq_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xcb80f0e3 ieee80211_wx_set_scan_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xccf17369 ieee80211_wx_set_rts_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd1b15be0 RemovePeerTS +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd38e8f12 ieee80211_wx_set_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xd973a0b2 ieee80211_wx_get_mode_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xda3e2046 rtl8192_ieee80211_xmit +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe0707f22 ieee80211_is_54g_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xe5f0541c notify_wx_assoc_event_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf1fc02dc ieee80211_softmac_start_protocol_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf3bea823 HTUpdateSelfAndPeerSetting +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211-rsl 0xf9770d6b ieee80211_wx_set_auth_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x040e3c33 ieee80211_unregister_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x492de5e8 ieee80211_crypt_deinit_handler_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0x98f680a2 ieee80211_get_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xa330a97c ieee80211_crypt_delayed_deinit_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xe5378c3d ieee80211_register_crypto_ops_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt 0xfb3b67e5 ieee80211_crypt_deinit_entries_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_ccmp 0x91bf5bd9 ieee80211_ccmp_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_tkip 0x4dce6780 ieee80211_tkip_null_rsl +EXPORT_SYMBOL drivers/staging/rtl8192su/ieee80211/ieee80211_crypt_wep 0x4e04ac24 ieee80211_wep_null_rsl +EXPORT_SYMBOL drivers/telephony/ixj 0x9e9a5324 ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x8c5a0766 phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xbfe947f9 phone_unregister_device +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x41ed5819 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x4dc59486 usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x6212bf55 net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x8259f950 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x376fadd2 usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xf71d12f6 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0xa3c944d9 lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xc4c96d92 lcd_device_register +EXPORT_SYMBOL drivers/video/console/bitblit 0x5bd060e2 fbcon_set_bitops +EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL drivers/video/console/font 0xbb99125c get_default_font +EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c find_font +EXPORT_SYMBOL drivers/video/console/softcursor 0x0c2fe962 soft_cursor +EXPORT_SYMBOL drivers/video/console/tileblit 0xb175c02a fbcon_set_tileops +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x25b03250 cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0x4516e416 cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0x737041f9 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0xb267da16 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/display/display 0xd232c3fd display_device_register +EXPORT_SYMBOL drivers/video/display/display 0xe5a33d86 display_device_unregister +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x3a3b9dd1 mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x11f3d597 g450_mnp2f +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x768d4140 matroxfb_g450_setclk +EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xc8209e34 matroxfb_g450_setpll_cond +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x066cce3e matrox_mystique +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x0e2f28ef DAC1064_global_restore +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x93949175 matrox_G100 +EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xf3364615 DAC1064_global_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x6ec5dce7 matrox_millennium +EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0xfbf9a56b matrox_cfbX_init +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x59250592 matroxfb_unregister_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x5f88cdd8 matroxfb_enable_irq +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x63cfa13f matroxfb_register_driver +EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xa6d1b6d8 matroxfb_wait_for_sync +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x69b699c5 matroxfb_g450_connect +EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x7c47d924 matroxfb_g450_shutdown +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x4c346070 matroxfb_read_pins +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x4e262102 matroxfb_DAC_in +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x88a197a8 matroxfb_DAC_out +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x8aa72ba8 matroxfb_vgaHWinit +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xf0c8e975 matroxfb_vgaHWrestore +EXPORT_SYMBOL drivers/video/output 0x5833c224 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0x6dcd2786 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x12978e31 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x36c08a96 svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x3e72fce5 svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x4ffb200b svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x5f848b8e svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8dd63798 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/svgalib 0xfdddc477 svga_tileblit +EXPORT_SYMBOL drivers/video/syscopyarea 0x5b65513c sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x26ebc6dc sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0xc6823a7e sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x0663f4c1 w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x945c248c w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x16f309f7 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x20ebac1b w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x3300be2f w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x63c41346 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x47383cb7 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0x56e11abb w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0xae146550 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xfad051eb w1_unregister_family +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x0d60e463 configfs_depend_item +EXPORT_SYMBOL fs/configfs/configfs 0x25f5414f config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x4a11553e config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x89778b05 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8dabcfb6 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x910336d8 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xa71e816b config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xcd26529c configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xd8803704 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xea9e5fcd config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xec6e0db3 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xfca89c17 config_item_put +EXPORT_SYMBOL fs/fscache/fscache 0x016df9c0 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x0631ec54 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x1542419f __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x24efb226 fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x281a8137 fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3d0d52a7 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4ae501ae fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0x4db881f9 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x5648ee5a fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x59d90558 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x63f96884 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x7b524ed7 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7d0f15cd fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x80d2ef96 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8b53401f __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0xa6cb604c __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xad3e0d0b __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xaea59026 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbfbb528d __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xd4f40d36 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0xd8b17eeb fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xd8ca998f fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xea611fa8 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0xee46a8b3 __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0xf4b6a380 __fscache_update_cookie +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x1315b1a1 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x40aef856 qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x4f21fbe5 qtree_read_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x665f27a7 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x9e298c54 qtree_delete_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x6953cd52 destroy_8023_client +EXPORT_SYMBOL net/802/p8023 0x6a153df1 make_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x0088f167 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x095d63f4 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x0caf27eb p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x24436e8f p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0x27ce4418 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x3455711e p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x3522cea6 p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x475781e1 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x59c3a9e6 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x5fb1bfc5 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x62dff847 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x68452371 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x6981da42 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x6f06b9ee p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x8618825c p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0x96314cce p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xaab8671a p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0xad4a6e1b p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xaeb2e11c v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0xbb946667 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xcae61af3 p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0xce472bc1 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xef7127b0 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0xf11b003c v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0xf79428d4 p9_client_open +EXPORT_SYMBOL net/appletalk/appletalk 0x0c3e983b atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x534129dd alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0xa3066b35 atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0xe8abf61a aarp_send_ddp +EXPORT_SYMBOL net/atm/atm 0x0f61f9e8 atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x3a05aeb9 atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x4bff8b7b vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x6d1ced27 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x77223cd9 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0x7da34cca atm_dev_register +EXPORT_SYMBOL net/atm/atm 0x882d0519 vcc_release_async +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8a446fd4 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xb79a991b atm_charge +EXPORT_SYMBOL net/atm/atm 0xe2698803 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0xe36a6ff7 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0xefc864d6 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x46eb82ba ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0x52af6d15 ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x67c30429 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0x855daf07 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x8eb8aec9 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xcf9d0fb6 ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xd526ded6 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0xf7337975 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xfadcafaa ax25_listen_register +EXPORT_SYMBOL net/bridge/bridge 0x8bd04f9d br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x39c5f5c2 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x56d3b41d ebt_do_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x5bdd5ad8 ebt_unregister_table +EXPORT_SYMBOL net/can/can 0x0b1318f6 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x1c661c48 can_send +EXPORT_SYMBOL net/can/can 0x7c76a5b4 can_rx_register +EXPORT_SYMBOL net/can/can 0x8a07dac6 can_proto_register +EXPORT_SYMBOL net/can/can 0xba1b9047 can_rx_unregister +EXPORT_SYMBOL net/ieee802154/nl802154 0x044ee8f7 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x47011cf7 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x92eea241 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0x9ef40556 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xa213f8fe ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xd7db2f08 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x6e2fe339 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x7081655c arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb777416e arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x0c26c583 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x8575c4ea ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc8dce1fe ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x47d73c2e nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x5d6791a4 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x5e3217f9 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x63b451b7 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ba42cba nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7c29d54d nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xe608869f nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/tunnel4 0x0d00d619 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0x2fe68e39 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x3060cab2 ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6eec5e07 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x73e1ff25 ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xea4271c0 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0x68f1da91 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/tunnel6 0x6b414cff xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1ee3ffb7 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x24e7a340 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4eb9e6d9 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x5635f3e7 ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6d65ca87 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa3e86035 ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd881fc64 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd9157d8f ircomm_data_request +EXPORT_SYMBOL net/irda/irda 0x01d1fcdb hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x072e026f irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x1b839f51 iriap_open +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x3462950f hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3a14d361 irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0x3aef9d5b irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x581b4154 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x5e465929 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x6758f8ac irias_new_object +EXPORT_SYMBOL net/irda/irda 0x67ced702 irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x68b7447c hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x747d6779 irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x7621e908 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x76243bc9 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x781e2db5 irias_find_object +EXPORT_SYMBOL net/irda/irda 0x786d6c6c irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7965ec64 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x7a57b6f3 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x824d115a irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x920202c1 irttp_dup +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9c4920e1 irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0xa234c7ee alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0xa6678144 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xa7116f93 irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xa836ead7 iriap_close +EXPORT_SYMBOL net/irda/irda 0xac4e3ea6 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0xaf928505 irlap_close +EXPORT_SYMBOL net/irda/irda 0xb51fb7b2 proc_irda +EXPORT_SYMBOL net/irda/irda 0xb7dd82d6 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc14e9b6a hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xc8948ae3 irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xcd41236c hashbin_new +EXPORT_SYMBOL net/irda/irda 0xd7172ff4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0xd9fe4345 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe053a2a3 irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0xe0f86b40 irlap_open +EXPORT_SYMBOL net/irda/irda 0xe5260e0e irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0xeb0c648d async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0xec1976a5 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0xec41fe7f irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xeee8aac0 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xf39b7fe0 irda_setup_dma +EXPORT_SYMBOL net/lapb/lapb 0x03fc44d2 lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x16695bd8 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x1d12532b lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0x6326c779 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0x66f99449 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x69be69c9 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0x6e1506d7 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0xe03bb25a lapb_setparms +EXPORT_SYMBOL net/mac80211/mac80211 0x05c66211 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x18481f9a ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x280e64e3 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x2cfecb81 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x2e9d1428 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x304cc6f2 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x3311a987 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x3a7a4a3f ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x3fff757d ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x475d80bc ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x507c8a4e wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x55b94ef4 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x583c8507 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0x5b556015 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x6c13ab7b ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0x7123f312 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x71b5ffce ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x75d9f44b ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x80bec60e ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0x895fcb50 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x8c84dc97 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x8f58b920 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x993e97d6 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x9de6fea8 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xaac8a6e6 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0xb603389d ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xcb61ee4e ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xcbb016fb ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0xd256b755 __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0xd3842efb ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xe2eb0177 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xe8f653cf ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xec1bdbe3 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xf2e6c49c ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf5112095 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0xfae24c6f ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xffa24375 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2826645d ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2bd37454 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x306bb7a0 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x3ecd0fa9 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4918917f unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x64887338 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6edd5600 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd1a7633f register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdbc1de7e ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe8f9a90c unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfd2e1f97 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x0830ad1f __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x45b1623e __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe1198923 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x1c56c6f0 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x3105a6a8 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x5fd2ca3e xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0x6f6fc525 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x8889b2fc xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0x9c81e441 xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0xa5feb918 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0xbc0afe79 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xc9bb048c xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xf91d25b5 xt_register_match +EXPORT_SYMBOL net/phonet/phonet 0x0d331374 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x34d77c85 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x5722b7ea pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x5769ab09 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0x82dd53b6 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x896bcc9d pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xa4cccc25 phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0xfc35b383 pn_sock_hash +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x05d35e51 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2d4aea2c rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2db0d8cd rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3dd4baba rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3f834778 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f6ec86c rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x661fdcc5 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6cc1e151 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6da43f11 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa5c0bc23 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa9272993 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd4245e66 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdd57f807 rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdf51633f rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfc18efe2 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/sunrpc/sunrpc 0xa958df97 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x2c925f12 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3c99fb66 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x5fffee95 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x80355758 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x8806916b tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x888ff718 tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x963ecfbe tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa936a24b tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0xadb3594c tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xbd58929f tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xde3b4150 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe426a6e2 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x6f576dcd register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x09c61a79 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xa04c6e6e wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0c05a453 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x0c96e3a9 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x0e7e10f8 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x185a47e3 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x1921f93f wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x1dfa7c33 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1f14b14f regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x272d6f99 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x27c0d4a0 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x397b9b81 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3fd3674a wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0x4615b763 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x5181be9b ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x58bee848 wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x64084aea cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x6697b26e ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x69be2069 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x6a3d5956 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x6e9d542f cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0x710603b3 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x7da59737 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x8a6ad5b2 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x902c55dc wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x91ac39a0 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0x9e6c1b20 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xa25e7539 cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0xa8b00368 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0xac08b026 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xbffa864e cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xee5234ee freq_reg_info +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3a3fd1da lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x4871de03 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x4c63bb1e lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x68a46f1b lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x6f996aef lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x7e6aebe3 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xad046d68 lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xed5a0aed lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0x762ef724 ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xb4c78888 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x0ea4c01f snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5b8640fe snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x5d604c63 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0x8ac31429 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x8d36af77 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xbe34edbc snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x6fb2fc24 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x00517bf3 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x00a0aae0 snd_device_register +EXPORT_SYMBOL sound/core/snd 0x05dab7af snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x0779859f snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0x07f7f05a snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0x0cd5388c snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x0d6e9ac0 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x14f43d98 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0x18e1683f snd_dma_program +EXPORT_SYMBOL sound/core/snd 0x191e88cf snd_dma_pointer +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1d81e30c snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x22410567 snd_card_register +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x24fb954e snd_cards +EXPORT_SYMBOL sound/core/snd 0x25dd7fa4 snd_component_add +EXPORT_SYMBOL sound/core/snd 0x2641dcc7 snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x2e225199 snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0x2f8da8e1 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x3268ff9f snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0x3564d1b6 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x43735a91 snd_device_free +EXPORT_SYMBOL sound/core/snd 0x45c3abf8 snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x4a1db30d snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0x6948ae13 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x6b8ca35b snd_device_new +EXPORT_SYMBOL sound/core/snd 0x6bea6451 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x6d59aa19 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x6de929a0 snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0x7039bee7 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0x70c15ac1 snd_dma_disable +EXPORT_SYMBOL sound/core/snd 0x722b9ee4 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x77ff5638 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x90048091 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xa8b83d29 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xad9c9915 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0xb00d71a0 snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0xb1ed1c36 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xbbc04b10 snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0xbe4b4245 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0xc0e6c10a snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0xca432a59 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0xd1157735 release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0xd11ae176 snd_card_free +EXPORT_SYMBOL sound/core/snd 0xd2d8fe1d snd_info_register +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe6994d7c snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xe711b89d snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0xf091b645 snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xf7bbb5c7 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0xfd695bee snd_power_wait +EXPORT_SYMBOL sound/core/snd 0xff8439e6 snd_jack_new +EXPORT_SYMBOL sound/core/snd-hwdep 0xcc5f03fd snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3562dd50 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x536388e3 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb7194f7d snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xb8d82f9f snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0xfb82c253 snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x0e584f94 snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x1078b1f1 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x1c22b363 snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x20a4cde4 snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x20d675be snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x229c2f88 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0x2bbcf827 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x2dcf72e9 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x2deb1541 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x31e36d85 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0x3430b982 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x356ea254 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x3a4e7f59 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x4a0009b1 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0x4e5e49cc snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x501b7131 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0x52b5014b snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x541dc164 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x5c5358d6 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x6124aedd snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0x61cd2cbf snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6c0e695a snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0x6c9ba4f6 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x72c2d7e9 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x79d13cfc snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x7af6b300 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x8adaacc6 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0x91e156ea snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x97b3d673 snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xaae64bfd snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0xb11e875a snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0xb356a60b snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xb83f91f8 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xc75ce76b snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0xcb4c470a snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xda1c6d98 snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0xdbf92f50 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xe7da8db9 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0xef63dbad snd_pcm_lib_mmap_iomem +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-rawmidi 0x0483f689 snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x05fae3a8 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x30c0068a snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x45e1cd22 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x462879de snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x48a7d468 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x4936d77b snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-rawmidi 0x70268a0a snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0x893e1153 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0x92cacd36 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x96eed1a8 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xa4f77001 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaa9440e4 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xb2122e56 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd1e58ba4 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd9dabe0d snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xfc2884f3 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-timer 0x0ab1ce6c snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0x1d27b33b snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x422dd86f snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x4d94e4bc snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x6910fe68 snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0x6d251a90 snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0x75fdea74 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0x7d3cfca5 snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x800325f9 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xc4039d84 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xcde8f265 snd_timer_stop +EXPORT_SYMBOL sound/core/snd-timer 0xd9457623 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0xdd76f56f snd_timer_resolution +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xa401583d snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0c547c20 snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0e1317d4 snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x295d953b snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x2f31f9a0 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x52dab979 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x5eb6868c snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x72dd7eff snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7c80a809 snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9006d0fc snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x03c73bc9 snd_opl4_read +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x17d1f069 snd_opl4_create +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x6d997be2 snd_opl4_write_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xaa6ecc81 snd_opl4_read_memory +EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xcbe54c46 snd_opl4_write +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x41bbc567 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x5500fba6 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6bdf1fbd snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7852429d snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7a54aa3d snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x90709cee snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb35d4a6d snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb46b59a9 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd5389faf snd_vx_dsp_load +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x224580a7 snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x2bd63d6d snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x7340b36a snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9088d258 snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa6d81855 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xc1d24a3e snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x1462f94a snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6e94e7e2 snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe51ddf01 snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xf250da87 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfbb38ae0 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xffa77327 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x55993d14 snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa8437cee snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb0d902b3 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb6149a51 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x19fcf8ad snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2d18d50d snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x412a493a snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xbb1e7c0c snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x0bf87dd5 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2b46bea1 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2d82cb38 snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3a3d832e snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xfd1aaf65 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-i2c 0x16e345a7 snd_i2c_device_free +EXPORT_SYMBOL sound/i2c/snd-i2c 0x43c5c916 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0x6a142c62 snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xcd7e7c7d snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xfe4c195e snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xff32efa3 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x9dbdfe64 snd_tea6330t_detect +EXPORT_SYMBOL sound/i2c/snd-tea6330t 0xcfbc323e snd_tea6330t_update_mixer +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x7c688968 snd_es1688_pcm +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x7e8e3c8e snd_es1688_create +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xd5bf3c49 snd_es1688_mixer +EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xe8869b96 snd_es1688_mixer_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0348dd1d snd_gf1_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x05d4f969 snd_gf1_i_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x1f75d2b4 snd_gf1_translate_freq +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x21fbca7e snd_gf1_write16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2646dc51 snd_gf1_look16 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x34b462f9 snd_gus_dram_write +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x36ce43e1 snd_gf1_dram_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x3b1b3bd1 snd_gf1_i_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67 snd_gf1_lvol_to_gvol_raw +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x479d6c16 snd_gf1_new_mixer +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4e707503 snd_gf1_i_write8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x57d77c10 snd_gus_use_dec +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5a409e0c snd_gf1_write_addr +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x62ac4fe7 snd_gf1_look8 +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x725c915f snd_gf1_ctrl_stop +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x82a8f2fc snd_gf1_rawmidi_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x86e3eb56 snd_gus_use_inc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x89028a08 snd_gf1_stop_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5 snd_gus_interrupt +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x8d648f52 snd_gus_initialize +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x926a5f17 snd_gf1_mem_lock +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x97d3b2c3 snd_gus_dram_read +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9bd27021 snd_gf1_delay +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9c313e6d snd_gf1_mem_alloc +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa504e230 snd_gf1_mem_xfree +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527 snd_gf1_atten_table +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc626b1dd snd_gf1_mem_free +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd078bd9b snd_gf1_free_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xda804951 snd_gf1_poke +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe3fc1807 snd_gf1_alloc_voice +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe8ce0882 snd_gus_create +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xeb6d7070 snd_gf1_pcm_new +EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf2d1a1e0 snd_gf1_peek +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x04b2406a snd_msndmix_setup +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3 snd_msnd_init_queue +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e665ea3 snd_msnd_upload_host +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x177de1b4 snd_msnd_pcm +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x23d0260a snd_msndmix_new +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x2af3491c snd_msnd_send_word +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x325f000d snd_msnd_send_dsp_cmd +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x33e2903b snd_msndmix_force_recsrc +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x569db9f5 snd_msnd_disable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x680b1e67 snd_msnd_enable_irq +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24 snd_msndmidi_input_read +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x76abb20a snd_msnd_DARQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xb8d5624a snd_msnd_DAPQ +EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xcec8539b snd_msnd_dsp_halt +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0c60e8d4 snd_sbmixer_add_ctl +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x1cadf31d snd_sbdsp_reset +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3692f758 snd_sbmixer_write +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3747dccc snd_sbmixer_resume +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3a8428c3 snd_sbdsp_command +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x4617fa67 snd_sbmixer_suspend +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6962c55e snd_sbdsp_create +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6967fa4d snd_sbmixer_read +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6e5de2b8 snd_sbdsp_get_byte +EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd45af4a0 snd_sbmixer_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0x0ae87640 snd_sb_csp_new +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x13db112b snd_sb16dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x53ecde78 snd_sb16dsp_get_pcm_ops +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x9b40b087 snd_sb16dsp_configure +EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54 snd_sb16dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x3d0bb205 snd_sb8dsp_pcm +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x461a9cc4 snd_sb8dsp_midi_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x64e82115 snd_sb8dsp_midi +EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xfc80423b snd_sb8dsp_interrupt +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x3c52c32e snd_emu8000_update_equalizer +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x4459f97c snd_emu8000_load_reverb_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x52feaa5c snd_emu8000_poke +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x7084e8c4 snd_emu8000_load_chorus_fx +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x93b4a97a snd_emu8000_init_fm +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9c9c9b6a snd_emu8000_dma_chan +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9e1b6ba7 snd_emu8000_peek +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xa20d88ac snd_emu8000_poke_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xb92abbae snd_emu8000_peek_dw +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xc3a5a24b snd_emu8000_update_reverb_mode +EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xcf388faa snd_emu8000_update_chorus_mode +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x058e0cef snd_wss_info_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x068e6fa5 snd_wss_get_pcm_ops +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x52c0bf3f snd_wss_overrange +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x58721cd6 snd_wss_mce_down +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5c276dd2 snd_cs4236_ext_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x67d9ead3 snd_cs4236_ext_in +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x72e7e532 snd_wss_put_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x73e61259 snd_wss_put_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x79d48eb3 snd_wss_out +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x7e1320d5 snd_wss_mce_up +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x825c800a snd_wss_mixer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x82a0f0d4 snd_wss_pcm +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x87623688 snd_wss_free +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x8d2bfb41 snd_wss_timer +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xdf0861ae snd_wss_info_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe0a4fd59 snd_wss_create +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xec37f650 snd_wss_chip_id +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xecc1580e snd_wss_get_double +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xedc0af65 snd_wss_get_single +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5 snd_wss_interrupt +EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf15862a8 snd_wss_in +EXPORT_SYMBOL sound/oss/ad1848 0x1c191b35 ad1848_init +EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae ad1848_detect +EXPORT_SYMBOL sound/oss/ad1848 0x7b4226e8 attach_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62 ad1848_unload +EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b probe_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148 unload_ms_sound +EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67 ad1848_control +EXPORT_SYMBOL sound/oss/mpu401 0x5febf284 unload_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0x61641749 probe_mpu401 +EXPORT_SYMBOL sound/oss/mpu401 0xc1a9e6d0 attach_mpu401 +EXPORT_SYMBOL sound/oss/msnd 0x1186f48f msnd_fifo_read +EXPORT_SYMBOL sound/oss/msnd 0x234f64e0 msnd_register +EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf msnd_init_queue +EXPORT_SYMBOL sound/oss/msnd 0x54230dc1 msnd_fifo_write +EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb msnd_unregister +EXPORT_SYMBOL sound/oss/msnd 0x6587640b msnd_disable_irq +EXPORT_SYMBOL sound/oss/msnd 0x6601493b msnd_fifo_make_empty +EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b msnd_send_dsp_cmd +EXPORT_SYMBOL sound/oss/msnd 0x9274d677 msnd_fifo_free +EXPORT_SYMBOL sound/oss/msnd 0x95d37486 msnd_upload_host +EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420 msnd_send_word +EXPORT_SYMBOL sound/oss/msnd 0xade99e25 msnd_fifo_alloc +EXPORT_SYMBOL sound/oss/msnd 0xb3520772 msnd_fifo_init +EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb msnd_fifo_write_io +EXPORT_SYMBOL sound/oss/msnd 0xefdd1843 msnd_enable_irq +EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662 msnd_fifo_read_io +EXPORT_SYMBOL sound/oss/sb_lib 0x0071c0df probe_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0x42424109 sb_be_quiet +EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea smw_free +EXPORT_SYMBOL sound/oss/sb_lib 0x642d6eb8 sb_dsp_init +EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c unload_sbmpu +EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969 sb_dsp_unload +EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c sb_dsp_detect +EXPORT_SYMBOL sound/oss/sound 0x04553172 midi_devs +EXPORT_SYMBOL sound/oss/sound 0x04c87ec8 compute_finetune +EXPORT_SYMBOL sound/oss/sound 0x06339815 sound_unload_synthdev +EXPORT_SYMBOL sound/oss/sound 0x0f280035 conf_printf +EXPORT_SYMBOL sound/oss/sound 0x17ba231d seq_input_event +EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf sound_alloc_mixerdev +EXPORT_SYMBOL sound/oss/sound 0x1f395686 MIDIbuf_avail +EXPORT_SYMBOL sound/oss/sound 0x2161d5e8 sound_timer_init +EXPORT_SYMBOL sound/oss/sound 0x2aa31695 midi_synth_kill_note +EXPORT_SYMBOL sound/oss/sound 0x346f87aa sound_install_audiodrv +EXPORT_SYMBOL sound/oss/sound 0x394cb088 sound_free_dma +EXPORT_SYMBOL sound/oss/sound 0x418f5fbe sound_close_dma +EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd num_audiodevs +EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d midi_synth_setup_voice +EXPORT_SYMBOL sound/oss/sound 0x51e354b2 sound_alloc_timerdev +EXPORT_SYMBOL sound/oss/sound 0x56504ca2 midi_synth_reset +EXPORT_SYMBOL sound/oss/sound 0x5d986fc9 note_to_freq +EXPORT_SYMBOL sound/oss/sound 0x7679ee76 seq_copy_to_input +EXPORT_SYMBOL sound/oss/sound 0x7bdf0907 conf_printf2 +EXPORT_SYMBOL sound/oss/sound 0x7fd7ef2b audio_devs +EXPORT_SYMBOL sound/oss/sound 0x892093e0 midi_synth_controller +EXPORT_SYMBOL sound/oss/sound 0x90bd9714 sequencer_timer +EXPORT_SYMBOL sound/oss/sound 0x987bcf12 DMAbuf_outputintr +EXPORT_SYMBOL sound/oss/sound 0x9a95733f sound_alloc_dma +EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d midi_synth_start_note +EXPORT_SYMBOL sound/oss/sound 0x9d845b18 num_mixers +EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f load_mixer_volumes +EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf num_midis +EXPORT_SYMBOL sound/oss/sound 0xa41ead5f sound_unload_timerdev +EXPORT_SYMBOL sound/oss/sound 0xa4b83d28 mixer_devs +EXPORT_SYMBOL sound/oss/sound 0xa51c913b sound_unload_mixerdev +EXPORT_SYMBOL sound/oss/sound 0xa6bb414c sound_unload_mididev +EXPORT_SYMBOL sound/oss/sound 0xa948751e sound_unload_audiodev +EXPORT_SYMBOL sound/oss/sound 0xad45df73 midi_synth_close +EXPORT_SYMBOL sound/oss/sound 0xaef743b2 midi_synth_ioctl +EXPORT_SYMBOL sound/oss/sound 0xb14b22cd midi_synth_hw_control +EXPORT_SYMBOL sound/oss/sound 0xb51587f6 do_midi_msg +EXPORT_SYMBOL sound/oss/sound 0xba413f87 sound_alloc_mididev +EXPORT_SYMBOL sound/oss/sound 0xba7dd041 midi_synth_bender +EXPORT_SYMBOL sound/oss/sound 0xc748d109 sound_alloc_synthdev +EXPORT_SYMBOL sound/oss/sound 0xcbf99bb6 synth_devs +EXPORT_SYMBOL sound/oss/sound 0xcc4b8797 sound_open_dma +EXPORT_SYMBOL sound/oss/sound 0xd1ccdd50 sound_timer_devs +EXPORT_SYMBOL sound/oss/sound 0xd449d90a sound_install_mixer +EXPORT_SYMBOL sound/oss/sound 0xd85be938 midi_synth_set_instr +EXPORT_SYMBOL sound/oss/sound 0xdb400afa midi_synth_panning +EXPORT_SYMBOL sound/oss/sound 0xe056b71c DMAbuf_start_dma +EXPORT_SYMBOL sound/oss/sound 0xe2675a79 sound_timer_interrupt +EXPORT_SYMBOL sound/oss/sound 0xeb315d99 DMAbuf_inputintr +EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20 midi_synth_aftertouch +EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb midi_synth_open +EXPORT_SYMBOL sound/oss/sound 0xf7426da3 midi_synth_load_patch +EXPORT_SYMBOL sound/oss/sound 0xf78f6363 sequencer_init +EXPORT_SYMBOL sound/oss/sound 0xfa6871be sound_timer_syncinterval +EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3 midi_synth_send_sysex +EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7 uart401intr +EXPORT_SYMBOL sound/oss/uart401 0x71c6fabd probe_uart401 +EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9 unload_uart401 +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x00e68782 snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x038f045e snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x048d901e snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1e52bde8 snd_ac97_mixer +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5962cf7a snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5ed0f34a snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5fdd2b22 snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6e56a75d snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8c75f220 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8cf38ba7 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9855405c snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc8e43ce8 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd983f0b1 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdb0ba738 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe4d4bd47 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf028df58 snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf8c0556b snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0e304fd0 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0fe8ace8 snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x23272086 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6623ab9f snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x70e78334 snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7f5f0263 snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x80dae7d9 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8a14e3c9 snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd16bdaed snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xebce9848 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x6163aca5 snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xb6a81356 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xd180c425 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x06e07838 oxygen_pci_suspend +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x15f5e827 oxygen_read8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1706ce23 oxygen_pci_resume +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1aecc3b7 oxygen_pci_probe +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1e5e20ff oxygen_read16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x21f39af3 oxygen_write8 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x34b0690d oxygen_write_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3b81c23c oxygen_read_ac97 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3c7b85c7 oxygen_write8_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x640ecebf oxygen_write32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x672f1ea0 oxygen_write_uart +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x72fb7559 oxygen_write16_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7f1295ad oxygen_write_ac97_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8ed038b6 oxygen_write32_masked +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xafd2f9ca oxygen_pci_remove +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbc3320c3 oxygen_write16 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbe060161 oxygen_write_i2c +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xcdf0b242 oxygen_write_spi +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd33db6e3 oxygen_read32 +EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd921b7e9 oxygen_reset_uart +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x60c0b668 snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xb3c4fa3f snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd3b5ddc1 snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xe073df0a snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf89dea46 snd_trident_stop_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x42ffc53f uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x01a9381a register_sound_midi +EXPORT_SYMBOL sound/soundcore 0x4984a46e register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x7ad3db4e register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x7f8d49be sound_class +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xd52684b1 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0xe91cf009 register_sound_special +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x685516fe snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x6af59009 snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xbab94d4b snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xc46acdd6 snd_emux_register +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe23fb153 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xff037946 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/snd-util-mem 0x133af337 snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x18f55f04 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x3f52ac3e snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xb8f2cecc __snd_util_memblk_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd145cc99 __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd2e30ee0 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0xd3f6c0a2 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xdc141c6b snd_util_memhdr_free +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xcfebd470 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x2b6d45f9 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa9f11789 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xd3ac4010 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xdb6e113d dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xecc43ba2 dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xf67ca750 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x07a1ec3c lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x41e24a02 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x003edda2 tty_free_termios +EXPORT_SYMBOL vmlinux 0x00546468 put_io_context +EXPORT_SYMBOL vmlinux 0x005477ef take_over_console +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00837159 bdi_destroy +EXPORT_SYMBOL vmlinux 0x009d258f _write_lock +EXPORT_SYMBOL vmlinux 0x00adce5f rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x00faf810 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x01056884 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x0116a76f acpi_is_video_device +EXPORT_SYMBOL vmlinux 0x01378270 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x0168965d vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x016c0e6f jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0x0171a720 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x0186d073 percpu_counter_set +EXPORT_SYMBOL vmlinux 0x018f08f7 journal_destroy +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x019aae11 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x019c2795 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0x01a3af0a flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01b49fd9 tty_port_hangup +EXPORT_SYMBOL vmlinux 0x01bbccec register_framebuffer +EXPORT_SYMBOL vmlinux 0x01cc2b0b kmalloc_caches +EXPORT_SYMBOL vmlinux 0x01d0cc2e d_rehash +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x01fa8894 unregister_qdisc +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x021d1351 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x0256389f bit_waitqueue +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x0293a8fc netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x029444f0 native_read_tsc +EXPORT_SYMBOL vmlinux 0x02a3a88c secpath_dup +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02abd38e scsi_is_target_device +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x02e39cc3 iget5_locked +EXPORT_SYMBOL vmlinux 0x02e5642b acpi_bus_start +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x0319acc2 mdio_bus_type +EXPORT_SYMBOL vmlinux 0x03330182 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x033a5acf md_register_thread +EXPORT_SYMBOL vmlinux 0x033c4756 generic_make_request +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0347d1b7 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x03677a50 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x0391f417 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x039ed9aa security_path_rmdir +EXPORT_SYMBOL vmlinux 0x03b666f9 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03cc9d63 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x03d1bc27 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x03f394e5 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x03fb6811 __brelse +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x041de9f6 ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x0425c5ad blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0477048f have_submounts +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04979bc2 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x049ecb64 elv_rb_find +EXPORT_SYMBOL vmlinux 0x04a7795a file_remove_suid +EXPORT_SYMBOL vmlinux 0x04d51451 d_alloc_root +EXPORT_SYMBOL vmlinux 0x04d8c750 release_perfctr_nmi +EXPORT_SYMBOL vmlinux 0x04e94342 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x04eeb868 blk_insert_request +EXPORT_SYMBOL vmlinux 0x04f60304 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x04fcbd05 ilookup5 +EXPORT_SYMBOL vmlinux 0x0521a78d xfrm_state_update +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x05670a87 kernel_connect +EXPORT_SYMBOL vmlinux 0x05756cdd phy_detach +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x0593c42d nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x05bd1cf9 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x05e137d0 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x05f2c463 neigh_destroy +EXPORT_SYMBOL vmlinux 0x060c0339 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x065efc4c blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x066405fc get_phy_device +EXPORT_SYMBOL vmlinux 0x06730e08 misc_deregister +EXPORT_SYMBOL vmlinux 0x06797e9e sk_alloc +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x068c2f52 invalidate_partition +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06fbb743 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0715015d sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x071b4fd6 scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x073dfa12 generate_resume_trace +EXPORT_SYMBOL vmlinux 0x07608604 acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x07772a9b llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d50a24 csum_partial +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x07e25398 pci_get_device +EXPORT_SYMBOL vmlinux 0x07eef101 kthread_stop +EXPORT_SYMBOL vmlinux 0x080102fb request_key +EXPORT_SYMBOL vmlinux 0x082489bc skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x0827f182 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x08288c4e pci_release_region +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0830be96 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x0865d795 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x0884e25d vfs_read +EXPORT_SYMBOL vmlinux 0x088b44b9 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x08c4dd50 skb_under_panic +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08d80dab unload_nls +EXPORT_SYMBOL vmlinux 0x09154fe8 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x0933aae1 efi_enabled +EXPORT_SYMBOL vmlinux 0x09404530 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x09466273 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x095d831a pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x095f70ae generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x098389fc journal_release_buffer +EXPORT_SYMBOL vmlinux 0x0983d1f8 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x09862b0e neigh_for_each +EXPORT_SYMBOL vmlinux 0x0988fe4c xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x098cdf33 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0x099329d9 del_gendisk +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09f5a18d netlink_unicast +EXPORT_SYMBOL vmlinux 0x09ffdbdd gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0x0a1a7cb1 neigh_ifdown +EXPORT_SYMBOL vmlinux 0x0a1dc218 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x0a1e87f9 atomic64_add_negative +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a4f36e1 proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x0a77057e splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x0a8da223 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x0aae39e9 security_inode_permission +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acf7679 dma_issue_pending_all +EXPORT_SYMBOL vmlinux 0x0ae68107 alloc_file +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b3ef348 ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x0b44b7eb nla_put +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b89c573 dm_table_put +EXPORT_SYMBOL vmlinux 0x0ba0c43a uart_update_timeout +EXPORT_SYMBOL vmlinux 0x0ba61dcd km_query +EXPORT_SYMBOL vmlinux 0x0bee17be tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x0bf2c7a1 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x0bf6b704 generic_getxattr +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c798fad complete_request_key +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0cacfcbd xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cc49614 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x0cde6759 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x0d01ce16 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x0d151c8e aio_complete +EXPORT_SYMBOL vmlinux 0x0d26a76d _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0d391a2b nlmsg_notify +EXPORT_SYMBOL vmlinux 0x0d39e3ca tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d4b77b7 gen_pool_add +EXPORT_SYMBOL vmlinux 0x0d4d68f9 mca_device_transform_ioport +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d56af8a kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x0d6c963c copy_from_user +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0dd6da20 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x0dfb735a lookup_hash +EXPORT_SYMBOL vmlinux 0x0e203fe9 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x0e513e33 hci_suspend_dev +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e6b7633 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x0eaaae2f tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x0ec71fb0 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x0ed0d4dc mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x0eeffd20 rtnl_notify +EXPORT_SYMBOL vmlinux 0x0f081a65 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0x0f11d5de vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f29799a tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x0f2a3e35 unregister_netdev +EXPORT_SYMBOL vmlinux 0x0f3aa1b0 fb_set_var +EXPORT_SYMBOL vmlinux 0x0f6cb8ce dm_io +EXPORT_SYMBOL vmlinux 0x0f7253e5 clear_inode +EXPORT_SYMBOL vmlinux 0x0f830c45 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x0fcdbd68 tty_devnum +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0ff18724 rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x0ffff6ce xrlim_allow +EXPORT_SYMBOL vmlinux 0x1017d128 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x10272d74 vc_resize +EXPORT_SYMBOL vmlinux 0x1055942f ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x105745ec skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x107ff0f8 skb_make_writable +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x10969c87 hci_get_route +EXPORT_SYMBOL vmlinux 0x109a8e3a make_bad_inode +EXPORT_SYMBOL vmlinux 0x10ad9476 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x10b0e522 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x10edcd71 simple_write_begin +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x110e129a dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x1152df72 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x117e4688 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x11a18b14 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x11abde61 rtnl_unicast +EXPORT_SYMBOL vmlinux 0x11d9c2ce copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x11dbe4f0 generic_file_open +EXPORT_SYMBOL vmlinux 0x11f60917 serio_unregister_port +EXPORT_SYMBOL vmlinux 0x120507ac idr_get_new +EXPORT_SYMBOL vmlinux 0x1206e8ed default_llseek +EXPORT_SYMBOL vmlinux 0x122bfee4 skb_checksum +EXPORT_SYMBOL vmlinux 0x1234c198 dev_mc_sync +EXPORT_SYMBOL vmlinux 0x124733d3 arp_send +EXPORT_SYMBOL vmlinux 0x12810b6c journal_extend +EXPORT_SYMBOL vmlinux 0x12865495 bio_endio +EXPORT_SYMBOL vmlinux 0x1288b4c3 skb_dequeue +EXPORT_SYMBOL vmlinux 0x12b08709 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x12c14234 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12f10736 udplite_table +EXPORT_SYMBOL vmlinux 0x131c7acc d_lookup +EXPORT_SYMBOL vmlinux 0x1327a8c2 scsi_unregister +EXPORT_SYMBOL vmlinux 0x1337b66e vfs_link +EXPORT_SYMBOL vmlinux 0x133951df audit_log_start +EXPORT_SYMBOL vmlinux 0x135b83dc thermal_zone_unbind_cooling_device +EXPORT_SYMBOL vmlinux 0x1378e714 acpi_video_display_switch_support +EXPORT_SYMBOL vmlinux 0x13ae56a2 current_fs_time +EXPORT_SYMBOL vmlinux 0x13cf716e udp_proc_register +EXPORT_SYMBOL vmlinux 0x13f42152 system_entering_hibernation +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x1436deb6 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x143e6617 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x14641f8a bt_sock_poll +EXPORT_SYMBOL vmlinux 0x14af0cf7 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0x14f332ea up_read +EXPORT_SYMBOL vmlinux 0x15071b69 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1546c7c7 __devm_request_region +EXPORT_SYMBOL vmlinux 0x15475a6f pci_disable_msix +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x155d35a1 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x15698595 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0x15c0f89f input_unregister_device +EXPORT_SYMBOL vmlinux 0x15eefcde replace_mount_options +EXPORT_SYMBOL vmlinux 0x15ef2dd9 kfifo_free +EXPORT_SYMBOL vmlinux 0x160c0865 netlink_ack +EXPORT_SYMBOL vmlinux 0x162b7f87 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x162decc8 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x165f83f8 scsi_print_result +EXPORT_SYMBOL vmlinux 0x16713dba mca_unregister_driver +EXPORT_SYMBOL vmlinux 0x167e7f9d __get_user_1 +EXPORT_SYMBOL vmlinux 0x16908523 netif_device_attach +EXPORT_SYMBOL vmlinux 0x16a35878 _read_unlock +EXPORT_SYMBOL vmlinux 0x16a501a4 jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0x16c7602a dquot_release +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x1729c921 end_page_writeback +EXPORT_SYMBOL vmlinux 0x172f75b7 may_umount +EXPORT_SYMBOL vmlinux 0x174f9f14 skb_copy_bits +EXPORT_SYMBOL vmlinux 0x176b5e8f tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0x1778c74b elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x178bee85 follow_pfn +EXPORT_SYMBOL vmlinux 0x179634f5 vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x17aa4b08 dev_disable_lro +EXPORT_SYMBOL vmlinux 0x17b14a07 mmc_add_host +EXPORT_SYMBOL vmlinux 0x17b39de5 acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x17cec8a8 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17f9832f km_state_expired +EXPORT_SYMBOL vmlinux 0x1817b47b bdput +EXPORT_SYMBOL vmlinux 0x181b6ff2 mempool_resize +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x1845e7c5 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x18569e7d ip_fragment +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x187fea42 acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0x188fb3a6 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x18b47817 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0x190def77 scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x192ca479 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x192d1ac4 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x19704dda per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x19724b32 pnp_register_driver +EXPORT_SYMBOL vmlinux 0x1980d082 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x1985ed3c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x19d86b8b misc_register +EXPORT_SYMBOL vmlinux 0x19ee1aad tty_port_init +EXPORT_SYMBOL vmlinux 0x19fe3aa6 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x1a1244e9 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x1a334cfe dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x1a359cb4 page_address +EXPORT_SYMBOL vmlinux 0x1a45cb6c acpi_disabled +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a5fd02f bio_map_kern +EXPORT_SYMBOL vmlinux 0x1a75caa3 _read_lock +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1aa03c7e security_path_mknod +EXPORT_SYMBOL vmlinux 0x1ab5da69 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x1ac9b1b7 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0f71fb alloc_pci_dev +EXPORT_SYMBOL vmlinux 0x1b4f4b5f generic_setlease +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b7898b6 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x1b89419f add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1b8e639f elv_add_request +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1ba3fbcf backlight_device_unregister +EXPORT_SYMBOL vmlinux 0x1ba6aa79 sock_wfree +EXPORT_SYMBOL vmlinux 0x1bc86e86 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x1bdf80a8 tcp_parse_options +EXPORT_SYMBOL vmlinux 0x1bf01bbb bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x1c0821da blkdev_get +EXPORT_SYMBOL vmlinux 0x1c2994d7 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x1c348052 mb_cache_create +EXPORT_SYMBOL vmlinux 0x1c5f42ae rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x1c764f60 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x1c7fd085 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1c9a2547 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0x1c9ba8af dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x1cbf8fac balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cdd0884 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x1ce3cfca inet_shutdown +EXPORT_SYMBOL vmlinux 0x1cefe352 wait_for_completion +EXPORT_SYMBOL vmlinux 0x1cf9b6f0 key_put +EXPORT_SYMBOL vmlinux 0x1d046201 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x1d0c2017 pipe_lock +EXPORT_SYMBOL vmlinux 0x1d224ee3 starget_for_each_device +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d30b70c rwsem_wake +EXPORT_SYMBOL vmlinux 0x1d8c3d76 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1ded8052 dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0x1df06afd read_cache_page +EXPORT_SYMBOL vmlinux 0x1e2600c7 wake_up_process +EXPORT_SYMBOL vmlinux 0x1e2a9d52 mpage_readpages +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e911639 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x1eb392e8 pnp_get_resource +EXPORT_SYMBOL vmlinux 0x1ec52f47 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1ed34ea8 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x1eded21d path_put +EXPORT_SYMBOL vmlinux 0x1ef0228c tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f0c9295 set_irq_chip +EXPORT_SYMBOL vmlinux 0x1f27d6d7 _write_unlock +EXPORT_SYMBOL vmlinux 0x1f2f76e0 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x1f346b9b try_to_release_page +EXPORT_SYMBOL vmlinux 0x1f37cb7d devm_free_irq +EXPORT_SYMBOL vmlinux 0x1f3a3977 __blk_end_request +EXPORT_SYMBOL vmlinux 0x1f3a9c9d fd_install +EXPORT_SYMBOL vmlinux 0x1f624625 dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x1fc5de75 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x201c445d kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x209784d7 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x209d678f devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0x20ad5418 mpage_writepage +EXPORT_SYMBOL vmlinux 0x20b1fc86 kill_fasync +EXPORT_SYMBOL vmlinux 0x20b3a273 hci_unregister_proto +EXPORT_SYMBOL vmlinux 0x20b44578 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x20f22a88 xfrm_init_state +EXPORT_SYMBOL vmlinux 0x20f4cd5b phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x211d5aa9 per_cpu__cpu_core_map +EXPORT_SYMBOL vmlinux 0x2130f9c2 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0x21322824 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2189fc0b journal_get_write_access +EXPORT_SYMBOL vmlinux 0x21969f72 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x21ac11e6 inet_bind +EXPORT_SYMBOL vmlinux 0x21c852b8 uart_unregister_driver +EXPORT_SYMBOL vmlinux 0x21d50a51 tcf_hash_release +EXPORT_SYMBOL vmlinux 0x21dd80a9 __nla_reserve +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21fccf96 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x222ab322 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2248e597 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x224972be i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x224adc56 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x2254c4b0 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x225e074c security_path_symlink +EXPORT_SYMBOL vmlinux 0x2264dc34 xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x228d9888 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x22905f4c tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x229ddab8 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x22a0a2a6 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22bcfcdb __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x22cc6bef dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x22d6fc97 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x22e009c1 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x22f25842 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x23168959 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x231f3a66 __kfifo_put +EXPORT_SYMBOL vmlinux 0x231fa439 scsi_remove_host +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2326a9f6 follow_up +EXPORT_SYMBOL vmlinux 0x237cd16f fasync_helper +EXPORT_SYMBOL vmlinux 0x23c27473 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x23c3c3d1 pnp_release_card_device +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x24032a0e sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x24042f08 hci_conn_security +EXPORT_SYMBOL vmlinux 0x24100fd0 vfs_write +EXPORT_SYMBOL vmlinux 0x2413b469 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x243636a5 acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0x243dc418 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x243ffddc idr_destroy +EXPORT_SYMBOL vmlinux 0x24428be5 strncpy_from_user +EXPORT_SYMBOL vmlinux 0x244d556f blk_remove_plug +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x246b4421 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0x24766316 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x249290ef textsearch_prepare +EXPORT_SYMBOL vmlinux 0x24989ce3 tty_mutex +EXPORT_SYMBOL vmlinux 0x2498ffb1 prepare_creds +EXPORT_SYMBOL vmlinux 0x24acef04 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0x24aefe71 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x24b5b57d scsi_remove_device +EXPORT_SYMBOL vmlinux 0x24e32466 mdiobus_write +EXPORT_SYMBOL vmlinux 0x24e86c06 acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0x24e9b2b5 sock_i_uid +EXPORT_SYMBOL vmlinux 0x24ed7ac5 load_nls_default +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x250701f4 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x252d3f73 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x253752fc mca_device_claimed +EXPORT_SYMBOL vmlinux 0x253ba7ae pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0x2545c311 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x256553a0 set_security_override +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x2598039e neigh_connected_output +EXPORT_SYMBOL vmlinux 0x259bd8a3 pnp_find_dev +EXPORT_SYMBOL vmlinux 0x25a98df1 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x25b16c07 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x25bd3508 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x25cba924 pnp_find_card +EXPORT_SYMBOL vmlinux 0x25d3e2a3 atomic64_dec_return +EXPORT_SYMBOL vmlinux 0x26000d19 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x2652d919 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x266dea15 check_disk_change +EXPORT_SYMBOL vmlinux 0x267c10f7 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x268cc6a2 sys_close +EXPORT_SYMBOL vmlinux 0x26a80629 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x26beaeba cfb_imageblit +EXPORT_SYMBOL vmlinux 0x26cf5b8a unregister_nls +EXPORT_SYMBOL vmlinux 0x26d1650a simple_set_mnt +EXPORT_SYMBOL vmlinux 0x26d774f3 d_instantiate +EXPORT_SYMBOL vmlinux 0x26e03fef force_sig +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26ee07f7 pci_request_region +EXPORT_SYMBOL vmlinux 0x26f82228 scsi_device_resume +EXPORT_SYMBOL vmlinux 0x26fd80b9 per_cpu__cpu_number +EXPORT_SYMBOL vmlinux 0x27169217 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x27258994 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x2727da5d _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x272d394e mtrr_del +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x273f066e _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x2744535b mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x2758aed7 blk_fetch_request +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27b35c51 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27e17763 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x27e4860a pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x28299a4f tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x28491790 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x284ed930 remap_pfn_range +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28a5a9aa proc_symlink +EXPORT_SYMBOL vmlinux 0x28b715a6 isapnp_cfg_end +EXPORT_SYMBOL vmlinux 0x28bc7715 tty_register_driver +EXPORT_SYMBOL vmlinux 0x28c307d2 scsi_ioctl +EXPORT_SYMBOL vmlinux 0x28c83b6d xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x294d051f get_sb_ns +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x29625e53 dma_release_from_coherent +EXPORT_SYMBOL vmlinux 0x2976f3d9 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x29a7eef4 seq_putc +EXPORT_SYMBOL vmlinux 0x29b1c366 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x29b64419 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x2a07feca pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x2a0c7e23 neigh_compat_output +EXPORT_SYMBOL vmlinux 0x2a0e5b2d xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a647382 scsi_device_put +EXPORT_SYMBOL vmlinux 0x2a6778c1 jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x2a678304 dma_async_device_register +EXPORT_SYMBOL vmlinux 0x2a6cb8a4 sk_wait_data +EXPORT_SYMBOL vmlinux 0x2a7c8edc skb_insert +EXPORT_SYMBOL vmlinux 0x2a8fc70b skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x2a9d0bc8 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2ab309bd netif_napi_add +EXPORT_SYMBOL vmlinux 0x2adf7c26 request_firmware +EXPORT_SYMBOL vmlinux 0x2aeb2800 mempool_create_node +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b4b0c12 dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x2b57d754 set_create_files_as +EXPORT_SYMBOL vmlinux 0x2b8a44ca unlock_new_inode +EXPORT_SYMBOL vmlinux 0x2b9c334e sk_run_filter +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2baa963f kernel_listen +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bb6b67f ndisc_send_rs +EXPORT_SYMBOL vmlinux 0x2bc95bd4 memset +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c2478b7 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0x2c34b57c con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2c7d9f34 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x2c82b39a inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x2c85f7d4 mmc_detect_change +EXPORT_SYMBOL vmlinux 0x2c8a2069 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x2c8f5989 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0x2c9874fe ida_remove +EXPORT_SYMBOL vmlinux 0x2d066aae single_release +EXPORT_SYMBOL vmlinux 0x2d37342e cpu_online_mask +EXPORT_SYMBOL vmlinux 0x2d384611 simple_empty +EXPORT_SYMBOL vmlinux 0x2d3ddd2b serio_close +EXPORT_SYMBOL vmlinux 0x2d478f06 inet_frags_fini +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2d8e8ffa sk_filter +EXPORT_SYMBOL vmlinux 0x2d92afe1 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0x2d9721d6 journal_stop +EXPORT_SYMBOL vmlinux 0x2dabb2c7 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2def7f76 rtc_cmos_write +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e32b293 i2c_master_recv +EXPORT_SYMBOL vmlinux 0x2e3aa342 page_readlink +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e522055 set_disk_ro +EXPORT_SYMBOL vmlinux 0x2e60bace memcpy +EXPORT_SYMBOL vmlinux 0x2e638265 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x2e966641 fb_show_logo +EXPORT_SYMBOL vmlinux 0x2e97859f rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x2eb90735 __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x2eb9a0e8 _read_lock_irq +EXPORT_SYMBOL vmlinux 0x2ec7c7ba install_exec_creds +EXPORT_SYMBOL vmlinux 0x2ee17b5f bio_alloc +EXPORT_SYMBOL vmlinux 0x2eed1c2e blk_start_request +EXPORT_SYMBOL vmlinux 0x2efe5e09 atomic64_xchg +EXPORT_SYMBOL vmlinux 0x2f181c14 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x2f287f0d copy_to_user +EXPORT_SYMBOL vmlinux 0x2f2be3c1 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x2f3915f3 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x2f629419 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x2f6b2414 inet_addr_type +EXPORT_SYMBOL vmlinux 0x2fb9072c tcp_ioctl +EXPORT_SYMBOL vmlinux 0x2fc6750f xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x2fc7295a bio_map_user +EXPORT_SYMBOL vmlinux 0x2fd6cbce path_get +EXPORT_SYMBOL vmlinux 0x2fef2c1e nf_log_unregister +EXPORT_SYMBOL vmlinux 0x2ff6f84c fb_get_mode +EXPORT_SYMBOL vmlinux 0x3007e6ba get_disk +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x3023f951 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x30292562 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0x30755640 input_close_device +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x30b3ded7 module_refcount +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30f6ad57 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x30f6ff28 pci_get_slot +EXPORT_SYMBOL vmlinux 0x30fcca46 simple_write_end +EXPORT_SYMBOL vmlinux 0x3102a01f init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x31199cc2 blk_rq_init +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x314bcd1e task_nice +EXPORT_SYMBOL vmlinux 0x3157e24d dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x3191f109 __krealloc +EXPORT_SYMBOL vmlinux 0x3195b193 jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x319e6ab1 remove_inode_hash +EXPORT_SYMBOL vmlinux 0x31a75365 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x31ac9acd vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x31e2743c mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x31e76b57 recalibrate_cpu_khz +EXPORT_SYMBOL vmlinux 0x31f1fb68 block_write_end +EXPORT_SYMBOL vmlinux 0x324f1e97 input_unfilter_device +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x32ca1866 blk_make_request +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x3303b773 bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x330b3e43 ndisc_send_skb +EXPORT_SYMBOL vmlinux 0x3315f396 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x33183084 tcf_register_action +EXPORT_SYMBOL vmlinux 0x332191d3 dquot_free_space +EXPORT_SYMBOL vmlinux 0x335441b2 get_sb_single +EXPORT_SYMBOL vmlinux 0x33c4a2d5 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0x33d92f9a prepare_to_wait +EXPORT_SYMBOL vmlinux 0x33ed3aad fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x33f04c02 unregister_key_type +EXPORT_SYMBOL vmlinux 0x342bf924 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x342f60fe apm_info +EXPORT_SYMBOL vmlinux 0x34359369 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x3443f10d tcp_check_req +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x345a87cb bd_claim +EXPORT_SYMBOL vmlinux 0x345ad787 set_pages_uc +EXPORT_SYMBOL vmlinux 0x34736893 dget_locked +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34a5fc11 inet_frag_find +EXPORT_SYMBOL vmlinux 0x34bc7a85 mca_device_read_stored_pos +EXPORT_SYMBOL vmlinux 0x34ce5169 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x34e5dca6 key_unlink +EXPORT_SYMBOL vmlinux 0x34e845e4 scsi_device_get +EXPORT_SYMBOL vmlinux 0x352667c7 skb_recycle_check +EXPORT_SYMBOL vmlinux 0x352c73df neigh_update +EXPORT_SYMBOL vmlinux 0x35315cb8 input_inject_event +EXPORT_SYMBOL vmlinux 0x3540d507 init_buffer +EXPORT_SYMBOL vmlinux 0x35552372 truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x35619c6a i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x356f1f80 eth_change_mtu +EXPORT_SYMBOL vmlinux 0x35715a5a pci_write_vpd +EXPORT_SYMBOL vmlinux 0x359cafda ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x359d8b5d sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x359d9844 scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x35bbc403 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x35bdbbcb key_revoke +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35f0faa2 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x362b6b89 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x363f3d37 shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x3653081a __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x3666aef4 netif_device_detach +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36d97d4e pnp_device_detach +EXPORT_SYMBOL vmlinux 0x36fdc122 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x36fe7633 register_8022_client +EXPORT_SYMBOL vmlinux 0x370e4def xfrm_lookup +EXPORT_SYMBOL vmlinux 0x372f24b0 mpage_writepages +EXPORT_SYMBOL vmlinux 0x374109b6 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x375418e5 register_netdev +EXPORT_SYMBOL vmlinux 0x375553a1 send_sig_info +EXPORT_SYMBOL vmlinux 0x37566493 security_inode_init_security +EXPORT_SYMBOL vmlinux 0x379d65f5 gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x37ad7210 lookup_bdev +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37cbf2ed pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37f53bc2 thermal_cooling_device_unregister +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x38203ca1 __init_rwsem +EXPORT_SYMBOL vmlinux 0x3828febd journal_set_features +EXPORT_SYMBOL vmlinux 0x3838d1a3 scsi_finish_command +EXPORT_SYMBOL vmlinux 0x385eefa0 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x388fafcd call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x3892cf63 blk_end_request_all +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cfdda0 dma_find_channel +EXPORT_SYMBOL vmlinux 0x38d7d0dd fsync_bdev +EXPORT_SYMBOL vmlinux 0x38e74df1 llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x38e9a815 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x38f42c30 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x39087ffa set_trace_device +EXPORT_SYMBOL vmlinux 0x3911b901 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x3924293d fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x395811bf scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x399558d4 scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x39a2d92a mdiobus_register +EXPORT_SYMBOL vmlinux 0x39c089df simple_readpage +EXPORT_SYMBOL vmlinux 0x39c6a0f2 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x39cae1b6 is_container_init +EXPORT_SYMBOL vmlinux 0x39f51279 pcim_iomap +EXPORT_SYMBOL vmlinux 0x3a0f8717 framebuffer_release +EXPORT_SYMBOL vmlinux 0x3a1f4341 xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a220563 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x3a5cdde7 phy_attach +EXPORT_SYMBOL vmlinux 0x3a6daef4 tty_throttle +EXPORT_SYMBOL vmlinux 0x3a734b75 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x3a968d3f ilookup +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1dbcf _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0x3ab9c8fc skb_find_text +EXPORT_SYMBOL vmlinux 0x3ad9981d pci_remove_bus +EXPORT_SYMBOL vmlinux 0x3adc15b9 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x3ae6fb59 scsi_scan_target +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3af5b077 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0x3af98f9e ioremap_nocache +EXPORT_SYMBOL vmlinux 0x3b0fbff0 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b52f9fa xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0x3b73665c dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x3b820abe dma_alloc_from_coherent +EXPORT_SYMBOL vmlinux 0x3b9a3596 skb_queue_purge +EXPORT_SYMBOL vmlinux 0x3b9dc86b dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x3ba9bf24 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x3bae5d93 locks_init_lock +EXPORT_SYMBOL vmlinux 0x3baef7a0 llc_sap_open +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bc3ceae jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3be42e6d scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0x3c070139 unregister_quota_format +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c35d8e2 phy_register_fixup +EXPORT_SYMBOL vmlinux 0x3c7227bf complete_all +EXPORT_SYMBOL vmlinux 0x3c7555ef devm_iounmap +EXPORT_SYMBOL vmlinux 0x3c814849 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca61173 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3cee14fa arch_debugfs_dir +EXPORT_SYMBOL vmlinux 0x3d3cb840 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x3d46be0a register_chrdev +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d6e05f7 block_prepare_write +EXPORT_SYMBOL vmlinux 0x3d8acde8 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0x3d8e7ebe phy_connect +EXPORT_SYMBOL vmlinux 0x3da171f9 pci_mem_start +EXPORT_SYMBOL vmlinux 0x3da5eb6d kfifo_alloc +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3dcefbde bio_copy_user +EXPORT_SYMBOL vmlinux 0x3ddec910 give_up_console +EXPORT_SYMBOL vmlinux 0x3ddf74ea __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x3de45f1c __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x3dfdeecf __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x3dff49ab i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x3e040125 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x3e1000d2 i2c_master_send +EXPORT_SYMBOL vmlinux 0x3e130e22 ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0x3e1f073d wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x3e219de6 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e5402b5 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x3e764735 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x3e8fb1f9 single_open +EXPORT_SYMBOL vmlinux 0x3e99e63e tcf_hash_search +EXPORT_SYMBOL vmlinux 0x3e9b8240 ppp_channel_index +EXPORT_SYMBOL vmlinux 0x3ebd5cf9 sock_no_accept +EXPORT_SYMBOL vmlinux 0x3ec17d68 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x3ec1d14e tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0x3eca3b21 __break_lease +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3edfdae0 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f0f4da8 fb_set_cmap +EXPORT_SYMBOL vmlinux 0x3f1899f1 up +EXPORT_SYMBOL vmlinux 0x3f39b162 up_write +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5148ba genl_register_ops +EXPORT_SYMBOL vmlinux 0x3f751c02 pci_dev_driver +EXPORT_SYMBOL vmlinux 0x3fadf1ae sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x3fae99c6 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0x3fb15e41 ip_route_input +EXPORT_SYMBOL vmlinux 0x3fb4ef92 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x3fda90ec udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x3fe5a426 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0x3fe61841 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x3feb2032 register_console +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x3ff8f788 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x402820ea md_integrity_register +EXPORT_SYMBOL vmlinux 0x40471a3d pnp_possible_config +EXPORT_SYMBOL vmlinux 0x4057f652 hci_register_proto +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40acaed8 sock_wake_async +EXPORT_SYMBOL vmlinux 0x40be1da6 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x40f1bca7 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x4153a5c1 pci_bus_type +EXPORT_SYMBOL vmlinux 0x4166a122 request_key_async +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4178434b filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41a9c68d _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0x41b562dc deny_write_access +EXPORT_SYMBOL vmlinux 0x41ee669b filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x420a681a __put_cred +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x4222729d xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x42595e58 vgacon_text_force +EXPORT_SYMBOL vmlinux 0x42711df2 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x4271d3ce ip_route_output_key +EXPORT_SYMBOL vmlinux 0x427ec39a jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x4292364c schedule +EXPORT_SYMBOL vmlinux 0x4297b042 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x42a4168f request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x42c0efad generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4324ef16 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43341a9b fb_set_suspend +EXPORT_SYMBOL vmlinux 0x43357d07 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x433897dc scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x435b566d _spin_unlock +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x436ca504 input_register_device +EXPORT_SYMBOL vmlinux 0x4375de3d dev_get_by_name +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43d8d0f1 hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0x43ea4296 bio_add_page +EXPORT_SYMBOL vmlinux 0x43ef1f2f kmap_atomic_prot +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x441abbae dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x442c05cc page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x4467060d unregister_filesystem +EXPORT_SYMBOL vmlinux 0x4475364c wireless_spy_update +EXPORT_SYMBOL vmlinux 0x44a73712 journal_errno +EXPORT_SYMBOL vmlinux 0x44a9ee48 skb_clone +EXPORT_SYMBOL vmlinux 0x44aaf30f tsc_khz +EXPORT_SYMBOL vmlinux 0x44b180ce vfs_mknod +EXPORT_SYMBOL vmlinux 0x44b51de2 sg_miter_stop +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44d8cb53 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x44df963f page_put_link +EXPORT_SYMBOL vmlinux 0x44e8f6b7 serio_reconnect +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44f21bea idr_for_each +EXPORT_SYMBOL vmlinux 0x44f5277f rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x450913fd lro_receive_frags +EXPORT_SYMBOL vmlinux 0x4511bf1d pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x454a667c unregister_netdevice +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x455ae992 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x4597d2e2 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0x459b1132 __scsi_put_command +EXPORT_SYMBOL vmlinux 0x459b4dc2 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x459ef908 kill_pid +EXPORT_SYMBOL vmlinux 0x45b77746 netif_carrier_off +EXPORT_SYMBOL vmlinux 0x45bb123e try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x45d11c43 down_interruptible +EXPORT_SYMBOL vmlinux 0x45dcb3d7 input_free_device +EXPORT_SYMBOL vmlinux 0x45f0d3c3 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x45f5c0de serio_rescan +EXPORT_SYMBOL vmlinux 0x45fd7575 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x45fefd86 __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x46055ff3 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x463c29a5 pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x463fe82e d_obtain_alias +EXPORT_SYMBOL vmlinux 0x4643f1c0 elevator_exit +EXPORT_SYMBOL vmlinux 0x4652db0a scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x466c14a7 __delay +EXPORT_SYMBOL vmlinux 0x46a8dd3f tcp_read_sock +EXPORT_SYMBOL vmlinux 0x46da617f __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x46eaee10 block_write_begin +EXPORT_SYMBOL vmlinux 0x46f1b5ce __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x4710c7c2 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x47426299 dm_io_client_create +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x4760b43c i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x476adc5e pipe_to_file +EXPORT_SYMBOL vmlinux 0x477dd929 register_snap_client +EXPORT_SYMBOL vmlinux 0x478d10b2 ht_destroy_irq +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47c9aee6 tty_check_change +EXPORT_SYMBOL vmlinux 0x480f9c99 acpi_get_hp_hw_control_from_firmware +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x4833eaa6 dec_zone_page_state +EXPORT_SYMBOL vmlinux 0x48362655 pci_iomap +EXPORT_SYMBOL vmlinux 0x484e3044 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x4875d329 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x487a0b5a tc_classify +EXPORT_SYMBOL vmlinux 0x48887e4e generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x48911669 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x489703ce textsearch_destroy +EXPORT_SYMBOL vmlinux 0x4897f1bf per_cpu__x86_cpu_to_apicid +EXPORT_SYMBOL vmlinux 0x48bd797f init_task +EXPORT_SYMBOL vmlinux 0x48ff748d journal_abort +EXPORT_SYMBOL vmlinux 0x49084d31 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x49468935 i2c_register_driver +EXPORT_SYMBOL vmlinux 0x494e3393 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x496dd1e7 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x49794beb jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x497c91dd vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x4997af89 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x499815be keyring_clear +EXPORT_SYMBOL vmlinux 0x4999c015 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x49c8fb2a pipe_unlock +EXPORT_SYMBOL vmlinux 0x49da9a9a _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x49dc5d2e vmap +EXPORT_SYMBOL vmlinux 0x49dd03ef tty_port_close +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49ea2def register_gifconf +EXPORT_SYMBOL vmlinux 0x49f17f79 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x4a07ea5b bt_sock_register +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a3dc023 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x4a7d49ac commit_creds +EXPORT_SYMBOL vmlinux 0x4a87186a set_pages_x +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4acef452 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b07e779 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x4b09f5ed netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b4158a6 dma_mark_declared_memory_occupied +EXPORT_SYMBOL vmlinux 0x4b74fce5 pci_enable_msix +EXPORT_SYMBOL vmlinux 0x4b8d21ee tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x4b9dbffb d_move +EXPORT_SYMBOL vmlinux 0x4ba2558c scsi_get_command +EXPORT_SYMBOL vmlinux 0x4ba54219 hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x4ba751a6 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bcff74d vfs_getattr +EXPORT_SYMBOL vmlinux 0x4bfee15a atomic64_set +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c1b965c gen_replace_estimator +EXPORT_SYMBOL vmlinux 0x4c267bfd tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x4c3edc12 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x4c5f47cd d_validate +EXPORT_SYMBOL vmlinux 0x4c722709 rfkill_alloc +EXPORT_SYMBOL vmlinux 0x4cb0d73f registered_fb +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cc975aa scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x4cca1483 phy_device_free +EXPORT_SYMBOL vmlinux 0x4cd24e3e kunmap_high +EXPORT_SYMBOL vmlinux 0x4cdfc41d unregister_md_personality +EXPORT_SYMBOL vmlinux 0x4d0b5881 unlock_super +EXPORT_SYMBOL vmlinux 0x4d2dc830 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d4b2754 xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x4d66163c pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0x4da69f29 generic_unplug_device +EXPORT_SYMBOL vmlinux 0x4db48f8f skb_seq_read +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4ddcc28b qdisc_reset +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4df55c6d kernel_getsockname +EXPORT_SYMBOL vmlinux 0x4e100f60 _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x4e27591e __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e50cf9e scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4e876591 dquot_claim_space +EXPORT_SYMBOL vmlinux 0x4e942e1f generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x4ebd3561 per_cpu__current_task +EXPORT_SYMBOL vmlinux 0x4ecc60bf __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x4ece6e21 dma_async_memcpy_pg_to_pg +EXPORT_SYMBOL vmlinux 0x4ef18a85 pci_iounmap +EXPORT_SYMBOL vmlinux 0x4f0877c3 kmem_cache_free +EXPORT_SYMBOL vmlinux 0x4f399863 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f478be9 __nla_put +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f64bd0f simple_pin_fs +EXPORT_SYMBOL vmlinux 0x4f69a83c netif_napi_del +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4f77f80d truncate_inode_pages +EXPORT_SYMBOL vmlinux 0x4f8002c5 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x4f88bece register_qdisc +EXPORT_SYMBOL vmlinux 0x4f8e9b5b rt6_lookup +EXPORT_SYMBOL vmlinux 0x4f990ce8 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0x4fbce7c0 blk_complete_request +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x500c7f38 dm_register_target +EXPORT_SYMBOL vmlinux 0x5015e6e5 fb_is_primary_device +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x508f766f mntput_no_expire +EXPORT_SYMBOL vmlinux 0x50bdd470 boot_cpu_data +EXPORT_SYMBOL vmlinux 0x50f45896 d_find_alias +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x512c3f1d save_mount_options +EXPORT_SYMBOL vmlinux 0x5150d017 bh_submit_read +EXPORT_SYMBOL vmlinux 0x5152e605 memcmp +EXPORT_SYMBOL vmlinux 0x5186518f profile_pc +EXPORT_SYMBOL vmlinux 0x5194a260 iput +EXPORT_SYMBOL vmlinux 0x51d12d4e acpi_pci_disabled +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51db08e4 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x5201cd10 udp_disconnect +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x521591cf nobh_write_begin +EXPORT_SYMBOL vmlinux 0x521e6846 dev_get_stats +EXPORT_SYMBOL vmlinux 0x5254003d dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0x526af492 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x527587d8 kmem_cache_size +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528b9ea5 sysctl_string +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52c33722 skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x52cc584f scsi_dma_map +EXPORT_SYMBOL vmlinux 0x52d34032 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x530f44dd mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x5311c8c5 vfs_symlink +EXPORT_SYMBOL vmlinux 0x531b604e __virt_addr_valid +EXPORT_SYMBOL vmlinux 0x5326d993 register_exec_domain +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x5345166c __scm_destroy +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x53a23240 posix_lock_file +EXPORT_SYMBOL vmlinux 0x53ad1793 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x53b2d79e get_fs_type +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x540c5616 scsi_free_command +EXPORT_SYMBOL vmlinux 0x5413d7a9 ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0x541dfef4 atomic64_inc +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54445d38 poll_initwait +EXPORT_SYMBOL vmlinux 0x5444855d phy_start +EXPORT_SYMBOL vmlinux 0x547f26f1 journal_restart +EXPORT_SYMBOL vmlinux 0x5493204c aio_put_req +EXPORT_SYMBOL vmlinux 0x54935666 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0x54a6d074 atomic64_dec +EXPORT_SYMBOL vmlinux 0x54a806ce uart_match_port +EXPORT_SYMBOL vmlinux 0x54b3d975 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x54bb2c67 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x5513d5c4 get_sb_nodev +EXPORT_SYMBOL vmlinux 0x5519754c proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x5523b927 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x5524eccc get_super +EXPORT_SYMBOL vmlinux 0x553f9dd3 down_read_trylock +EXPORT_SYMBOL vmlinux 0x555ae980 dev_change_flags +EXPORT_SYMBOL vmlinux 0x5562feec tcp_disconnect +EXPORT_SYMBOL vmlinux 0x5581cd2e hippi_mac_addr +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x559aff47 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x55b7483c xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x55c4f806 input_filter_device +EXPORT_SYMBOL vmlinux 0x55df1a2d scm_fp_dup +EXPORT_SYMBOL vmlinux 0x55f51f15 dev_gro_receive +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x562f0d1f blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x5661ba4e xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0x56772e70 seq_printf +EXPORT_SYMBOL vmlinux 0x569cb92d is_bad_inode +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56d62433 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56ed121f i2c_clients_command +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x56f7f8bd nf_setsockopt +EXPORT_SYMBOL vmlinux 0x5702a4ae add_timer +EXPORT_SYMBOL vmlinux 0x570d9e3f br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0x5721e8f3 eisa_driver_unregister +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x57575f08 dmaengine_put +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x5766dd5c sock_no_bind +EXPORT_SYMBOL vmlinux 0x577d873f xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x578ebb09 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x579e612d blk_requeue_request +EXPORT_SYMBOL vmlinux 0x579fbcd2 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x57a1d402 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57d189d2 inode_setattr +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57dfe282 __seq_open_private +EXPORT_SYMBOL vmlinux 0x5805394a d_alloc +EXPORT_SYMBOL vmlinux 0x58246de4 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x584738f9 rdmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x5859ea02 napi_complete +EXPORT_SYMBOL vmlinux 0x585b83b9 phy_driver_register +EXPORT_SYMBOL vmlinux 0x588292be init_special_inode +EXPORT_SYMBOL vmlinux 0x588d7033 kernel_sendpage +EXPORT_SYMBOL vmlinux 0x5892936d tcp_sendpage +EXPORT_SYMBOL vmlinux 0x589d33b2 skb_gso_segment +EXPORT_SYMBOL vmlinux 0x58a7a10a pci_dev_put +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58bd6745 lookup_one_len +EXPORT_SYMBOL vmlinux 0x58c39fda unregister_snap_client +EXPORT_SYMBOL vmlinux 0x58fef6f8 ist_info +EXPORT_SYMBOL vmlinux 0x59008e0a generic_write_end +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x59504c7d serio_open +EXPORT_SYMBOL vmlinux 0x59791fd7 blk_put_request +EXPORT_SYMBOL vmlinux 0x5985e8ee skb_free_datagram +EXPORT_SYMBOL vmlinux 0x598abcf9 bitmap_start_sync +EXPORT_SYMBOL vmlinux 0x59b80054 set_anon_super +EXPORT_SYMBOL vmlinux 0x59ba1a6c mmc_remove_host +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x59da801c loop_register_transfer +EXPORT_SYMBOL vmlinux 0x59e8e166 blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x59f8a6cc sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x5a4896a8 __put_user_2 +EXPORT_SYMBOL vmlinux 0x5a57d155 __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x5a63d880 ip_getsockopt +EXPORT_SYMBOL vmlinux 0x5a6bf996 unlock_buffer +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a837ccc __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x5abe70e1 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5ac9934c pcim_enable_device +EXPORT_SYMBOL vmlinux 0x5ad08dd4 generic_show_options +EXPORT_SYMBOL vmlinux 0x5ad87b05 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b29bcac vfs_unlink +EXPORT_SYMBOL vmlinux 0x5b34bd9a block_write_full_page +EXPORT_SYMBOL vmlinux 0x5b4c1f1c tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5bf9898e pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0x5c265cba sg_init_one +EXPORT_SYMBOL vmlinux 0x5c4bdb11 consume_skb +EXPORT_SYMBOL vmlinux 0x5c68705b mca_read_pos +EXPORT_SYMBOL vmlinux 0x5c6e017d jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x5c81396a skb_copy_expand +EXPORT_SYMBOL vmlinux 0x5c9bd348 km_policy_expired +EXPORT_SYMBOL vmlinux 0x5d00c6f5 ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x5d112a57 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d37c5e5 bioset_create +EXPORT_SYMBOL vmlinux 0x5d50b1b3 sock_map_fd +EXPORT_SYMBOL vmlinux 0x5d60e7d1 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x5d6aec59 pci_clear_master +EXPORT_SYMBOL vmlinux 0x5d82bb1f block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x5d916277 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x5d9c95a8 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x5ddf705b genphy_update_link +EXPORT_SYMBOL vmlinux 0x5df1286b hci_unregister_cb +EXPORT_SYMBOL vmlinux 0x5df909ee udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x5dfd080d do_munmap +EXPORT_SYMBOL vmlinux 0x5e0174c3 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x5e2888af __ht_create_irq +EXPORT_SYMBOL vmlinux 0x5e2e322e sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x5e90c286 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea1ae81 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5eaf8bd1 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x5eb12285 bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5ed7a671 ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5eee3b0a pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x5f0bd63f sock_kfree_s +EXPORT_SYMBOL vmlinux 0x5f1bd579 mca_find_adapter +EXPORT_SYMBOL vmlinux 0x5f210bac netif_carrier_on +EXPORT_SYMBOL vmlinux 0x5f223bdd mca_device_read_pos +EXPORT_SYMBOL vmlinux 0x5f299209 get_user_pages +EXPORT_SYMBOL vmlinux 0x5f3e6539 scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x5f97b2b1 tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0x5fd0ba18 deactivate_super +EXPORT_SYMBOL vmlinux 0x5fd33dfa get_sb_bdev +EXPORT_SYMBOL vmlinux 0x5fd452a9 __f_setown +EXPORT_SYMBOL vmlinux 0x5fed13d3 block_commit_write +EXPORT_SYMBOL vmlinux 0x5ff42b08 acpi_video_get_capabilities +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x600b47be nobh_writepage +EXPORT_SYMBOL vmlinux 0x601cc4fd inet_register_protosw +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x6037af7f scsi_target_resume +EXPORT_SYMBOL vmlinux 0x6042675d inet_frags_init +EXPORT_SYMBOL vmlinux 0x6043092c atomic64_dec_and_test +EXPORT_SYMBOL vmlinux 0x60772128 inet_listen +EXPORT_SYMBOL vmlinux 0x6083fd7a alloc_fcdev +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60b36c78 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x60de5269 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x60e194a2 mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x6141f7db __dst_free +EXPORT_SYMBOL vmlinux 0x6143e073 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x617ddf71 blk_stop_queue +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61b667ae scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61cb81ad bio_copy_kern +EXPORT_SYMBOL vmlinux 0x61dc06b7 sock_no_poll +EXPORT_SYMBOL vmlinux 0x61dc6940 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x62193598 pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x6220b9b9 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x622166f4 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x6229bc6d sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x6241a2ab __copy_from_user_ll_nocache +EXPORT_SYMBOL vmlinux 0x6241fd2c acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0x6246f5ed rfkill_destroy +EXPORT_SYMBOL vmlinux 0x624952e7 nf_log_packet +EXPORT_SYMBOL vmlinux 0x6252653d nf_getsockopt +EXPORT_SYMBOL vmlinux 0x6262565d input_allocate_device +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x627b2dd5 __alloc_skb +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x62927d85 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0x629bc836 elv_queue_empty +EXPORT_SYMBOL vmlinux 0x62d5216b tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x62fc6452 console_stop +EXPORT_SYMBOL vmlinux 0x62ffa3b2 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x63194f55 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0x632e555e acpi_processor_notify_smm +EXPORT_SYMBOL vmlinux 0x63423d73 kernel_read +EXPORT_SYMBOL vmlinux 0x6356ba35 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x635d0c86 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x6375a7cb dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0x63823086 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x638dcda1 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x63b16ae6 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x63b749d1 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x63c061d3 proto_unregister +EXPORT_SYMBOL vmlinux 0x63cf50df __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x63d1b1f7 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0x63e5d9a5 register_con_driver +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x63fb7552 sget +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640a7078 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x641637a9 elv_rb_add +EXPORT_SYMBOL vmlinux 0x642e54ac __wake_up +EXPORT_SYMBOL vmlinux 0x64397bf5 dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x6440252c set_pages_nx +EXPORT_SYMBOL vmlinux 0x64526a93 atomic64_sub_return +EXPORT_SYMBOL vmlinux 0x6466a1e6 mempool_alloc +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x6481cd9a tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x648e778c elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x64a27ad1 devm_ioremap +EXPORT_SYMBOL vmlinux 0x64b937ba bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x64ea081c scsi_init_io +EXPORT_SYMBOL vmlinux 0x64eae7ad set_memory_array_wb +EXPORT_SYMBOL vmlinux 0x64fa9a04 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x6503ad67 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x650fb346 add_wait_queue +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x65328652 dqput +EXPORT_SYMBOL vmlinux 0x653c531b directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x654b65b3 no_llseek +EXPORT_SYMBOL vmlinux 0x65545b8d pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0x6554d1a9 register_nls +EXPORT_SYMBOL vmlinux 0x65559a7a input_open_device +EXPORT_SYMBOL vmlinux 0x657bacd0 mnt_pin +EXPORT_SYMBOL vmlinux 0x659187b0 dm_table_get_md +EXPORT_SYMBOL vmlinux 0x65aca42e inode_add_bytes +EXPORT_SYMBOL vmlinux 0x65d820a7 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x66017741 rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x661a3ecb pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x66486fa7 sk_stream_error +EXPORT_SYMBOL vmlinux 0x664efb57 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x665b0ba6 hippi_type_trans +EXPORT_SYMBOL vmlinux 0x66678ae0 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x666cf55b mnt_unpin +EXPORT_SYMBOL vmlinux 0x667dacd9 ps2_command +EXPORT_SYMBOL vmlinux 0x668b18ed sk_release_kernel +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x6696355b bd_set_size +EXPORT_SYMBOL vmlinux 0x66f8e718 unregister_con_driver +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x6729d3df __get_user_4 +EXPORT_SYMBOL vmlinux 0x675e526a tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x6777a3ba napi_gro_frags +EXPORT_SYMBOL vmlinux 0x677c4500 ip_ct_attach +EXPORT_SYMBOL vmlinux 0x67804a19 __any_online_cpu +EXPORT_SYMBOL vmlinux 0x6785150e skb_queue_tail +EXPORT_SYMBOL vmlinux 0x67acedd3 free_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x67ad98cf scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67cc4007 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0x67d5acf2 inet_put_port +EXPORT_SYMBOL vmlinux 0x680f91ad dm_table_event +EXPORT_SYMBOL vmlinux 0x68176962 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x6818a25b alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x6825a2f6 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x6834b7cb xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0x684095f9 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x6844b507 dma_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0x684667b3 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x686a0b8c inode_change_ok +EXPORT_SYMBOL vmlinux 0x6875d749 blk_start_queue +EXPORT_SYMBOL vmlinux 0x6895e904 __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x68a1da34 pnpbios_protocol +EXPORT_SYMBOL vmlinux 0x68a68c09 dm_table_get_size +EXPORT_SYMBOL vmlinux 0x68c78dff scsi_put_command +EXPORT_SYMBOL vmlinux 0x68cb4e2f tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x68cbbcc8 end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x68dbe046 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x68f28dac poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x690586a8 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x69117ebe md_error +EXPORT_SYMBOL vmlinux 0x692825b3 __kill_fasync +EXPORT_SYMBOL vmlinux 0x695717d3 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x695fb809 cdrom_open +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x697c1185 pci_read_vpd +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69825e2d inet6_bind +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69af586a fb_pan_display +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a2272c5 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x6a27bfce csum_partial_copy_generic +EXPORT_SYMBOL vmlinux 0x6a31c144 udp_sendmsg +EXPORT_SYMBOL vmlinux 0x6a3c801a sk_common_release +EXPORT_SYMBOL vmlinux 0x6a3e25f8 lock_may_write +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a4a9f03 pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0x6a5dbd00 input_unregister_handler +EXPORT_SYMBOL vmlinux 0x6a6bda1c phy_disconnect +EXPORT_SYMBOL vmlinux 0x6a941f25 udp_prot +EXPORT_SYMBOL vmlinux 0x6a953cf1 ___pskb_trim +EXPORT_SYMBOL vmlinux 0x6a9a5a1f ip6_route_output +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6addddea dcache_readdir +EXPORT_SYMBOL vmlinux 0x6ae1bd71 sock_create_lite +EXPORT_SYMBOL vmlinux 0x6b013ab5 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0x6b11386b request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x6b15650d open_exec +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b1f3097 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b3e1441 xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x6b58ac19 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0x6b64fff7 pskb_copy +EXPORT_SYMBOL vmlinux 0x6b86642a xfrm_input +EXPORT_SYMBOL vmlinux 0x6b937ffb mca_mark_as_used +EXPORT_SYMBOL vmlinux 0x6b9b88f3 sleep_on +EXPORT_SYMBOL vmlinux 0x6b9e58d9 scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x6bafbced mod_timer +EXPORT_SYMBOL vmlinux 0x6bb812e7 atomic64_add_return +EXPORT_SYMBOL vmlinux 0x6bb967eb bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x6bc1fc8e pcim_iounmap +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c2e3320 strncmp +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c49326c proc_dointvec +EXPORT_SYMBOL vmlinux 0x6c4d35de dev_trans_start +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c698d14 vfs_mkdir +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c7d0a4c pci_find_capability +EXPORT_SYMBOL vmlinux 0x6c8c9230 scsi_execute_req +EXPORT_SYMBOL vmlinux 0x6c8d3134 nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x6cb02cdc setup_arg_pages +EXPORT_SYMBOL vmlinux 0x6cb844cf __secpath_destroy +EXPORT_SYMBOL vmlinux 0x6cc3b060 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce3f20d pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d2a51e6 skb_trim +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d3fe8f9 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x6d464175 __sg_free_table +EXPORT_SYMBOL vmlinux 0x6d4d1c0f tr_type_trans +EXPORT_SYMBOL vmlinux 0x6d56994a cmpxchg_486_u64 +EXPORT_SYMBOL vmlinux 0x6d691900 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d939210 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x6da15c9e jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x6dc0c24b complete_and_exit +EXPORT_SYMBOL vmlinux 0x6dd35a0f pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x6dedb964 file_update_time +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e0d9e21 con_copy_unimap +EXPORT_SYMBOL vmlinux 0x6e1d7e23 acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0x6e48091d generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x6e578115 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x6e67841f scsi_block_requests +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ea73c1e kobject_put +EXPORT_SYMBOL vmlinux 0x6ead242b cond_resched_lock +EXPORT_SYMBOL vmlinux 0x6ed32ef6 simple_rmdir +EXPORT_SYMBOL vmlinux 0x6ed743dc generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x6ee48ed9 netpoll_setup +EXPORT_SYMBOL vmlinux 0x6ef7ced6 bdi_init +EXPORT_SYMBOL vmlinux 0x6ef9b163 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x6f0d5ed5 devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x6f18299f mca_bus_type +EXPORT_SYMBOL vmlinux 0x6f39c4c2 unbind_con_driver +EXPORT_SYMBOL vmlinux 0x6f4cc256 set_pages_array_uc +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f6c98f4 __napi_schedule +EXPORT_SYMBOL vmlinux 0x6f7cf014 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x6fa6d756 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x6fbfa62a blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x6fc31cab iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x6fe4eddf inet6_del_protocol +EXPORT_SYMBOL vmlinux 0x701c4970 pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x701d1e2a vm_insert_page +EXPORT_SYMBOL vmlinux 0x705104a6 pci_map_rom +EXPORT_SYMBOL vmlinux 0x7054a3e4 request_dma +EXPORT_SYMBOL vmlinux 0x7057b681 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x705ef5fa find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x706597ee splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x7092c68d phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70aea859 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70d1f8f3 strncat +EXPORT_SYMBOL vmlinux 0x70d55e76 phy_stop +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70f10a12 skb_copy +EXPORT_SYMBOL vmlinux 0x70f5cb99 set_pages_array_wb +EXPORT_SYMBOL vmlinux 0x7110062c md_write_end +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x712aa29b _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0x71356fba remove_wait_queue +EXPORT_SYMBOL vmlinux 0x714c7a81 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x71672c6a bmap +EXPORT_SYMBOL vmlinux 0x716ac00a rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x71a00fdf cont_write_begin +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71bbfe64 dput +EXPORT_SYMBOL vmlinux 0x71e913d6 module_layout +EXPORT_SYMBOL vmlinux 0x72216de1 serio_interrupt +EXPORT_SYMBOL vmlinux 0x724666ca per_cpu__irq_stat +EXPORT_SYMBOL vmlinux 0x728b67bf ps2_drain +EXPORT_SYMBOL vmlinux 0x72a1686d kill_anon_super +EXPORT_SYMBOL vmlinux 0x72b243d4 free_dma +EXPORT_SYMBOL vmlinux 0x72bf2140 mtrr_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x7334333a put_page +EXPORT_SYMBOL vmlinux 0x735a0bd5 native_io_delay +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x738803e6 strnlen +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x739cd024 iget_locked +EXPORT_SYMBOL vmlinux 0x73b96bce phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x73cd9bfc generic_removexattr +EXPORT_SYMBOL vmlinux 0x73d8a1e6 blk_plug_device +EXPORT_SYMBOL vmlinux 0x73dedfab phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x73f6c093 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x740a1b95 reserve_evntsel_nmi +EXPORT_SYMBOL vmlinux 0x7413793a EISA_bus +EXPORT_SYMBOL vmlinux 0x74254445 __napi_complete +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x745389fe freeze_bdev +EXPORT_SYMBOL vmlinux 0x745fbaa4 km_new_mapping +EXPORT_SYMBOL vmlinux 0x7484c4e8 hci_send_sco +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748caf40 down +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x7497c24b __starget_for_each_device +EXPORT_SYMBOL vmlinux 0x74b502d8 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x74cad98f kernel_accept +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74cdd956 ip_defrag +EXPORT_SYMBOL vmlinux 0x74d36d83 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x74febe3c set_user_nice +EXPORT_SYMBOL vmlinux 0x7504f0d3 alloc_mdio_bitbang +EXPORT_SYMBOL vmlinux 0x75271716 save_processor_state +EXPORT_SYMBOL vmlinux 0x757f2fa9 add_disk +EXPORT_SYMBOL vmlinux 0x75cfaaf7 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x75d4f520 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x762e7c8b nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x7664e817 dump_trace +EXPORT_SYMBOL vmlinux 0x76718597 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x76757140 tcp_proc_register +EXPORT_SYMBOL vmlinux 0x76762ce2 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x767ddb02 set_memory_wc +EXPORT_SYMBOL vmlinux 0x768a6314 dquot_initialize +EXPORT_SYMBOL vmlinux 0x769ede75 security_d_instantiate +EXPORT_SYMBOL vmlinux 0x76aa22f6 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x76b0f8f8 bad_dma_address +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76db3768 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x76ec08f7 __register_binfmt +EXPORT_SYMBOL vmlinux 0x76f3f8a5 num_k8_northbridges +EXPORT_SYMBOL vmlinux 0x76fd7e41 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x770a0036 isapnp_cfg_begin +EXPORT_SYMBOL vmlinux 0x772e06e5 datagram_poll +EXPORT_SYMBOL vmlinux 0x7753f5b0 send_sig +EXPORT_SYMBOL vmlinux 0x776f086e lock_rename +EXPORT_SYMBOL vmlinux 0x777f8e6e tty_unregister_device +EXPORT_SYMBOL vmlinux 0x778193ad tcf_em_register +EXPORT_SYMBOL vmlinux 0x77a108df _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x77a41782 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x77a8ef82 dqget +EXPORT_SYMBOL vmlinux 0x77d492a1 fb_class +EXPORT_SYMBOL vmlinux 0x77e5ae6f dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77ee1c6c pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x77ffb9e3 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x780fa86c filp_open +EXPORT_SYMBOL vmlinux 0x7819e9f3 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0x782eba26 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x784c6515 ht_create_irq +EXPORT_SYMBOL vmlinux 0x784f93f2 skb_tx_hash +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x78a484c9 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78cb2783 down_write_trylock +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78f9744b kmem_cache_name +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x791c8e2f disk_stack_limits +EXPORT_SYMBOL vmlinux 0x792ed65a dev_set_mtu +EXPORT_SYMBOL vmlinux 0x794487ee disable_hlt +EXPORT_SYMBOL vmlinux 0x795152dc pv_cpu_ops +EXPORT_SYMBOL vmlinux 0x79539d73 cdev_add +EXPORT_SYMBOL vmlinux 0x79691a8c inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x797b32d1 per_cpu__this_cpu_off +EXPORT_SYMBOL vmlinux 0x799da775 __find_get_block +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79b17da0 eth_header_cache +EXPORT_SYMBOL vmlinux 0x7a0b0618 vfs_readv +EXPORT_SYMBOL vmlinux 0x7a159293 register_quota_format +EXPORT_SYMBOL vmlinux 0x7a1c58cd iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0x7a1e7afe __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a2e4a9b tcf_hash_check +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a58382f __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x7a64a78b abort_creds +EXPORT_SYMBOL vmlinux 0x7a737b2c tcp_close +EXPORT_SYMBOL vmlinux 0x7a848702 _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x7ad15050 ppp_input +EXPORT_SYMBOL vmlinux 0x7ad69131 do_splice_from +EXPORT_SYMBOL vmlinux 0x7ada36ac neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x7ae69e1d blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x7aec9089 clear_user +EXPORT_SYMBOL vmlinux 0x7af9a995 inode_init_always +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b134ddf acpi_get_name +EXPORT_SYMBOL vmlinux 0x7b34203d blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x7b4670fe clocksource_register +EXPORT_SYMBOL vmlinux 0x7b52a859 wrmsr_safe_on_cpu +EXPORT_SYMBOL vmlinux 0x7b5590e8 i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x7b712205 proc_mkdir +EXPORT_SYMBOL vmlinux 0x7b75075c file_permission +EXPORT_SYMBOL vmlinux 0x7b7d88e3 register_filesystem +EXPORT_SYMBOL vmlinux 0x7b88412b mmc_release_host +EXPORT_SYMBOL vmlinux 0x7ba3ff0c file_fsync +EXPORT_SYMBOL vmlinux 0x7ba463e8 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x7ba50149 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x7ba63865 stop_tty +EXPORT_SYMBOL vmlinux 0x7bb8b6e5 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0x7bc8091c tty_name +EXPORT_SYMBOL vmlinux 0x7bf6b663 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x7c0b4116 register_sysctl_table +EXPORT_SYMBOL vmlinux 0x7c0edd7d acpi_check_region +EXPORT_SYMBOL vmlinux 0x7c18c7f7 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0x7c1da31b pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0x7c42c4e7 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c4b1932 phy_print_status +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c797fe8 sock_register +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c94daca journal_force_commit +EXPORT_SYMBOL vmlinux 0x7c9b1ee5 hci_register_cb +EXPORT_SYMBOL vmlinux 0x7cae9867 submit_bh +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cc1a83a sk_stop_timer +EXPORT_SYMBOL vmlinux 0x7cd9d66b jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x7cdeefd7 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0x7cf8408e __serio_register_driver +EXPORT_SYMBOL vmlinux 0x7cfe6b62 napi_gro_receive +EXPORT_SYMBOL vmlinux 0x7d0299f9 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d23b3c5 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x7d40de6f pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x7d7b5143 __kfree_skb +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7de78dd0 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x7e1f63f7 cfb_fillrect +EXPORT_SYMBOL vmlinux 0x7e367ecb bio_sector_offset +EXPORT_SYMBOL vmlinux 0x7e38d50b kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x7e5ba444 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e8a8fb7 sk_receive_skb +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ea24233 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x7eb384e6 dst_destroy +EXPORT_SYMBOL vmlinux 0x7ecb001b __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x7ecd8e44 __lock_buffer +EXPORT_SYMBOL vmlinux 0x7ee91c1d _spin_trylock +EXPORT_SYMBOL vmlinux 0x7ef849ce jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f3de4e5 hci_resume_dev +EXPORT_SYMBOL vmlinux 0x7f517bb4 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x7f7d813c bitmap_end_sync +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f97eb11 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x7fa99642 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x7fab1568 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x7fb0c600 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x7fc23068 dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x7fcfbbf2 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x7febad84 do_splice_to +EXPORT_SYMBOL vmlinux 0x803aa2c2 dquot_destroy +EXPORT_SYMBOL vmlinux 0x805b4121 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x8067489b dma_async_memcpy_buf_to_pg +EXPORT_SYMBOL vmlinux 0x8077f018 __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x80d42693 scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x80d648aa kobject_del +EXPORT_SYMBOL vmlinux 0x81059799 sock_kmalloc +EXPORT_SYMBOL vmlinux 0x813b524a journal_init_dev +EXPORT_SYMBOL vmlinux 0x8145519a qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x8155f134 skb_append +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815c56d0 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x815f2897 empty_zero_page +EXPORT_SYMBOL vmlinux 0x815f8e2e should_remove_suid +EXPORT_SYMBOL vmlinux 0x8164365c drop_super +EXPORT_SYMBOL vmlinux 0x8169183c input_register_handle +EXPORT_SYMBOL vmlinux 0x816e4c2e jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x81a67092 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x81d7c639 thermal_zone_device_register +EXPORT_SYMBOL vmlinux 0x81dc7281 nf_register_hook +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x820c55a4 filp_close +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x820fc63c vfsmount_lock +EXPORT_SYMBOL vmlinux 0x821e15de input_flush_device +EXPORT_SYMBOL vmlinux 0x8235805b memmove +EXPORT_SYMBOL vmlinux 0x8236f9d5 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x823e1e64 ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0x82517c85 eth_header +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x826f2bfa iunique +EXPORT_SYMBOL vmlinux 0x8272f8ff set_page_dirty +EXPORT_SYMBOL vmlinux 0x82757008 vfs_writev +EXPORT_SYMBOL vmlinux 0x8277e3ac seq_open +EXPORT_SYMBOL vmlinux 0x827de469 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x82aa310a key_payload_reserve +EXPORT_SYMBOL vmlinux 0x82add409 inet6_ioctl +EXPORT_SYMBOL vmlinux 0x82c43188 dev_load +EXPORT_SYMBOL vmlinux 0x8302d0f4 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x8317e20a completion_done +EXPORT_SYMBOL vmlinux 0x8344495c netlink_kernel_create +EXPORT_SYMBOL vmlinux 0x83479a76 invalidate_bdev +EXPORT_SYMBOL vmlinux 0x834d1d31 notify_change +EXPORT_SYMBOL vmlinux 0x8365e042 uart_write_wakeup +EXPORT_SYMBOL vmlinux 0x83793582 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x837c8cb8 scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0x838397e7 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0x83839a2f pagevec_lookup +EXPORT_SYMBOL vmlinux 0x8388657f blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83ab38f7 vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x83cfb8df sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x83f93fab iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0x83fa7adb sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x8420d45e tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0x8437667b revalidate_disk +EXPORT_SYMBOL vmlinux 0x84523c0d generic_block_bmap +EXPORT_SYMBOL vmlinux 0x8456dea3 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x849dd283 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0x84eb42e5 unregister_cdrom +EXPORT_SYMBOL vmlinux 0x85196af3 kmem_cache_create +EXPORT_SYMBOL vmlinux 0x85206ecd pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x85809eee pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x8592fdb2 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x8597bee9 scsi_print_sense +EXPORT_SYMBOL vmlinux 0x85a5892f vfs_fsync +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85b17e2f create_mnt_ns +EXPORT_SYMBOL vmlinux 0x85c71d49 mapping_tagged +EXPORT_SYMBOL vmlinux 0x85cd9021 generic_setxattr +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x85e828a1 dst_alloc +EXPORT_SYMBOL vmlinux 0x85fc6d6f lock_may_read +EXPORT_SYMBOL vmlinux 0x862380e5 pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x86443c14 __page_symlink +EXPORT_SYMBOL vmlinux 0x865f1ae3 pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x8672d641 find_or_create_page +EXPORT_SYMBOL vmlinux 0x8685d8ce simple_fsync +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x86907ca9 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x870bf6b9 serial8250_register_port +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x8733e9a3 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x87348d9e tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x873ebf00 qdisc_destroy +EXPORT_SYMBOL vmlinux 0x876ac6f8 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x87789a22 mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0x87880c24 update_region +EXPORT_SYMBOL vmlinux 0x878a89b6 dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x879ef18a pci_assign_resource +EXPORT_SYMBOL vmlinux 0x87afdab1 arp_xmit +EXPORT_SYMBOL vmlinux 0x87b0721b pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x87b2386d __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0x87b47a9e kobject_set_name +EXPORT_SYMBOL vmlinux 0x87d234e3 generic_ro_fops +EXPORT_SYMBOL vmlinux 0x8800be1c rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x8827fa19 netif_receive_skb +EXPORT_SYMBOL vmlinux 0x88284a0a scsi_execute +EXPORT_SYMBOL vmlinux 0x8875a527 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x888198e7 bio_phys_segments +EXPORT_SYMBOL vmlinux 0x888d6062 journal_revoke +EXPORT_SYMBOL vmlinux 0x88a1f7f4 mmc_resume_host +EXPORT_SYMBOL vmlinux 0x88ac31a6 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x88c9a158 free_netdev +EXPORT_SYMBOL vmlinux 0x88ce37f1 lease_get_mtime +EXPORT_SYMBOL vmlinux 0x88d423ac fget +EXPORT_SYMBOL vmlinux 0x88d5640a dev_addr_del +EXPORT_SYMBOL vmlinux 0x88e88136 ioremap_prot +EXPORT_SYMBOL vmlinux 0x8904f4de scm_detach_fds +EXPORT_SYMBOL vmlinux 0x8905eed6 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0x8919c55a skb_split +EXPORT_SYMBOL vmlinux 0x892b26a0 set_memory_nx +EXPORT_SYMBOL vmlinux 0x893f07a4 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x8941aa44 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x8953bb27 del_timer +EXPORT_SYMBOL vmlinux 0x8969b997 ida_get_new +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89852ee2 sock_release +EXPORT_SYMBOL vmlinux 0x8987a664 nonseekable_open +EXPORT_SYMBOL vmlinux 0x898cbc1d udp_poll +EXPORT_SYMBOL vmlinux 0x89949018 down_timeout +EXPORT_SYMBOL vmlinux 0x899f6c08 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x89ab5582 d_add_ci +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89f6dd94 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x89fb024a dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x8a03ed16 genphy_suspend +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a3e3f01 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x8a3eabf0 __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8a68abca dst_release +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a996177 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab24ed4 pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x8ab58f21 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0x8abd7d9a __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0x8aebf1ed pci_get_subsys +EXPORT_SYMBOL vmlinux 0x8b025986 kill_litter_super +EXPORT_SYMBOL vmlinux 0x8b076f61 seq_escape +EXPORT_SYMBOL vmlinux 0x8b18496f __copy_to_user_ll +EXPORT_SYMBOL vmlinux 0x8b202c1c otg_set_transceiver +EXPORT_SYMBOL vmlinux 0x8b440749 arp_broken_ops +EXPORT_SYMBOL vmlinux 0x8b5ccff9 per_cpu__x86_bios_cpu_apicid +EXPORT_SYMBOL vmlinux 0x8b5f4a2e IO_APIC_get_PCI_irq_vector +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b69ae12 bdget +EXPORT_SYMBOL vmlinux 0x8b6f490a netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x8b7348a2 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8b9974ef i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x8ba3eed9 block_truncate_page +EXPORT_SYMBOL vmlinux 0x8bbb9e68 kobject_add +EXPORT_SYMBOL vmlinux 0x8bc958ed security_path_link +EXPORT_SYMBOL vmlinux 0x8bcc65f5 proc_dostring +EXPORT_SYMBOL vmlinux 0x8bd14ca8 module_put +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8c068048 ll_rw_block +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c2aff99 seq_lseek +EXPORT_SYMBOL vmlinux 0x8c81f33a simple_fill_super +EXPORT_SYMBOL vmlinux 0x8c8d0e67 kern_path +EXPORT_SYMBOL vmlinux 0x8ca22df7 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x8ca4c1e3 unregister_console +EXPORT_SYMBOL vmlinux 0x8cc4b656 tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8cc8a58b genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0x8cdd1435 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d4a6688 xfrm_register_km +EXPORT_SYMBOL vmlinux 0x8d525115 tcp_splice_read +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6f81b4 __div64_32 +EXPORT_SYMBOL vmlinux 0x8d71b281 read_dev_sector +EXPORT_SYMBOL vmlinux 0x8d76da44 bdget_disk +EXPORT_SYMBOL vmlinux 0x8d7c1e42 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8d9f4176 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x8dc6e564 restore_processor_state +EXPORT_SYMBOL vmlinux 0x8dca832f __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x8ddd6fc0 security_path_truncate +EXPORT_SYMBOL vmlinux 0x8dee51d6 pci_match_id +EXPORT_SYMBOL vmlinux 0x8dfb1426 destroy_EII_client +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0637ba i8253_lock +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e13d626 skb_dma_map +EXPORT_SYMBOL vmlinux 0x8e1b2eab inet_release +EXPORT_SYMBOL vmlinux 0x8e34ca97 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x8e5ac498 ip_dev_find +EXPORT_SYMBOL vmlinux 0x8e6dcf67 rfkill_unregister +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e785d90 brioctl_set +EXPORT_SYMBOL vmlinux 0x8e7da879 bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0x8e888ec3 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x8e8be00e search_binary_handler +EXPORT_SYMBOL vmlinux 0x8e921818 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x8ead72a4 kset_unregister +EXPORT_SYMBOL vmlinux 0x8eb8d4fc scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x8ec3500d mpage_readpage +EXPORT_SYMBOL vmlinux 0x8ece7ae4 alloc_trdev +EXPORT_SYMBOL vmlinux 0x8ed95262 ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8efecdaa i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0x8f227528 scsi_release_buffers +EXPORT_SYMBOL vmlinux 0x8f4278f1 nf_afinfo +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f802269 bio_clone +EXPORT_SYMBOL vmlinux 0x8f902755 bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x8f9c199c __get_user_2 +EXPORT_SYMBOL vmlinux 0x8fbcc8b9 pci_pme_capable +EXPORT_SYMBOL vmlinux 0x8fcbb584 mutex_unlock +EXPORT_SYMBOL vmlinux 0x8ffbf6ac in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x8fff6f8d set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x901bbdd4 I_BDEV +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x9045a23b phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x904a8ef6 lock_fb_info +EXPORT_SYMBOL vmlinux 0x90520eae acpi_root_dir +EXPORT_SYMBOL vmlinux 0x908bfed7 names_cachep +EXPORT_SYMBOL vmlinux 0x90919e9d unlock_page +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x91178fc2 journal_forget +EXPORT_SYMBOL vmlinux 0x91442bf9 fput +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x9145d4ce vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x91607d95 set_memory_wb +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x9183d80b block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x918a1b65 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x91902ba3 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x91b06296 put_disk +EXPORT_SYMBOL vmlinux 0x91b0fca9 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x921d43ab xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0x922e145a dquot_commit +EXPORT_SYMBOL vmlinux 0x923b1276 dmaengine_get +EXPORT_SYMBOL vmlinux 0x92438ca0 ppp_register_compressor +EXPORT_SYMBOL vmlinux 0x924c9592 sysctl_data +EXPORT_SYMBOL vmlinux 0x926f2818 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x92858451 eisa_driver_register +EXPORT_SYMBOL vmlinux 0x92897e3d default_idle +EXPORT_SYMBOL vmlinux 0x92922dbc vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x930b468a scsi_host_put +EXPORT_SYMBOL vmlinux 0x930bda76 scsi_host_alloc +EXPORT_SYMBOL vmlinux 0x931f7cb6 mca_device_set_claim +EXPORT_SYMBOL vmlinux 0x9326e0f5 sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x9330cb9f sg_alloc_table +EXPORT_SYMBOL vmlinux 0x93433806 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93cbd1ec _spin_lock_bh +EXPORT_SYMBOL vmlinux 0x93e78f97 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x93f32bdf devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x940992da load_nls +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x944a0e5d dev_addr_add +EXPORT_SYMBOL vmlinux 0x94615621 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x946da7a3 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94a4fb51 do_sync_read +EXPORT_SYMBOL vmlinux 0x94b0c72a netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x94b541b5 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x94bbb52d unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x94d80329 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x953c7218 mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x95422a5a vfs_statfs +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x954e84cb xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0x95513b21 do_SAK +EXPORT_SYMBOL vmlinux 0x960a727c blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x962d5abc key_validate +EXPORT_SYMBOL vmlinux 0x963d73b2 do_truncate +EXPORT_SYMBOL vmlinux 0x965c84d4 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x966b0fa9 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x968f5041 dev_remove_pack +EXPORT_SYMBOL vmlinux 0x969a05f9 jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96e88743 journal_flush +EXPORT_SYMBOL vmlinux 0x96f6aa0b ip6_frag_match +EXPORT_SYMBOL vmlinux 0x96fbd6d7 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x96fe16c1 mca_device_set_name +EXPORT_SYMBOL vmlinux 0x971db16b __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x9730bc38 pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x973873ab _spin_lock +EXPORT_SYMBOL vmlinux 0x973d3c44 sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x974372e7 __devm_release_region +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9765396b pci_get_class +EXPORT_SYMBOL vmlinux 0x97d82996 dev_mc_delete +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x97f74f6f skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x981ffae3 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x98269d88 __getblk +EXPORT_SYMBOL vmlinux 0x985650f2 blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x9856df29 sock_i_ino +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x988ed85d set_memory_x +EXPORT_SYMBOL vmlinux 0x9898bd93 alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x98ba3b81 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x98f26bbc make_EII_client +EXPORT_SYMBOL vmlinux 0x99052a84 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x99609d8a dquot_commit_info +EXPORT_SYMBOL vmlinux 0x99619440 scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x99680031 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x997c2e9e journal_clear_err +EXPORT_SYMBOL vmlinux 0x998a80cc proc_create_data +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x999fe604 pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0x99b5bff9 bio_free +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c24a0c i2c_transfer +EXPORT_SYMBOL vmlinux 0x99c44143 bd_release +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99dd67e8 init_file +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x9a076107 blk_peek_request +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a23873c pci_release_regions +EXPORT_SYMBOL vmlinux 0x9a6a83f9 cmos_lock +EXPORT_SYMBOL vmlinux 0x9a7adac6 phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x9a85f650 inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x9a9985be percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0x9ab8f1a9 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b472fb3 qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x9b4de8eb idr_replace +EXPORT_SYMBOL vmlinux 0x9b6424fc ppp_register_channel +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b8deaba blk_init_queue +EXPORT_SYMBOL vmlinux 0x9b91d64e tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x9b94fcdf dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bd09ddb scsi_prep_return +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c08b896 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x9c1bb37d vfs_create +EXPORT_SYMBOL vmlinux 0x9c20e7bd journal_create +EXPORT_SYMBOL vmlinux 0x9c2c944a __copy_from_user_ll_nocache_nozero +EXPORT_SYMBOL vmlinux 0x9c3d0eed console_start +EXPORT_SYMBOL vmlinux 0x9c3fe5c2 mca_register_driver_integrated +EXPORT_SYMBOL vmlinux 0x9c4e198d generic_file_llseek +EXPORT_SYMBOL vmlinux 0x9c7077bd enable_hlt +EXPORT_SYMBOL vmlinux 0x9caff06f iget_failed +EXPORT_SYMBOL vmlinux 0x9cb5113d pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cb9be11 inet_stream_ops +EXPORT_SYMBOL vmlinux 0x9ccb2622 finish_wait +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cebacb2 pci_do_scan_bus +EXPORT_SYMBOL vmlinux 0x9ced38aa down_trylock +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9d0c6696 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0x9d1fd433 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d6c4825 pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0x9d86922f ether_setup +EXPORT_SYMBOL vmlinux 0x9d988fd0 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x9d9f0d41 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0x9dbbabe0 skb_queue_head +EXPORT_SYMBOL vmlinux 0x9ded0d07 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e4229af vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x9e64fbfe rtc_cmos_read +EXPORT_SYMBOL vmlinux 0x9e672ff6 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea66629 bio_init +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9efce034 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f34d4e7 seq_release +EXPORT_SYMBOL vmlinux 0x9f49ae51 tty_vhangup +EXPORT_SYMBOL vmlinux 0x9f54a049 inet_select_addr +EXPORT_SYMBOL vmlinux 0x9f744a7c log_wait_commit +EXPORT_SYMBOL vmlinux 0x9f8d09af generic_fillattr +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9fa274b4 dq_data_lock +EXPORT_SYMBOL vmlinux 0x9fa76109 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0xa0048feb otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xa006f790 dmam_release_declared_memory +EXPORT_SYMBOL vmlinux 0xa022dfb5 ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa05a83a1 input_unregister_handle +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa063b0f3 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0xa088da59 neigh_create +EXPORT_SYMBOL vmlinux 0xa097ee7c mca_device_status +EXPORT_SYMBOL vmlinux 0xa0a4ac21 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0c78f95 security_file_permission +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0e1bf98 d_alloc_name +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa119cc6e ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xa11bde91 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0xa11f7379 simple_sync_file +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa1349d90 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa140f137 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0xa1714283 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xa1820635 blk_run_queue +EXPORT_SYMBOL vmlinux 0xa18ea921 pcim_pin_device +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1b76ee8 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1f7e2f7 vfs_readdir +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa23696a6 dma_async_memcpy_buf_to_buf +EXPORT_SYMBOL vmlinux 0xa24caa0e inode_sub_bytes +EXPORT_SYMBOL vmlinux 0xa2619132 seq_write +EXPORT_SYMBOL vmlinux 0xa28df48f kernel_recvmsg +EXPORT_SYMBOL vmlinux 0xa297c211 arp_create +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a1e5c9 _write_lock_bh +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2e7be6b kset_register +EXPORT_SYMBOL vmlinux 0xa309599f register_cdrom +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa350a8f8 set_memory_array_uc +EXPORT_SYMBOL vmlinux 0xa35c1f05 acpi_extract_package +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa37530fa ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0xa39b8b55 inet_sendmsg +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa408c42a do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xa40c892a icmp_send +EXPORT_SYMBOL vmlinux 0xa4234b81 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xa426e197 tty_kref_put +EXPORT_SYMBOL vmlinux 0xa429423d i2c_use_client +EXPORT_SYMBOL vmlinux 0xa42c5af3 mca_register_driver +EXPORT_SYMBOL vmlinux 0xa43a63fb invalidate_inodes +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa44ad274 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xa4677fec sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0xa468e186 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0xa46a5d23 arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0xa46b37b3 napi_frags_skb +EXPORT_SYMBOL vmlinux 0xa4926efe nf_reinject +EXPORT_SYMBOL vmlinux 0xa492903d seq_path +EXPORT_SYMBOL vmlinux 0xa49cd8b5 set_groups +EXPORT_SYMBOL vmlinux 0xa4b7eacc cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4bc2e72 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xa4d8e068 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0xa51cdfe8 __FIXADDR_TOP +EXPORT_SYMBOL vmlinux 0xa540cc8c contig_page_data +EXPORT_SYMBOL vmlinux 0xa55b2eeb pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0xa56f1315 mempool_free +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa5922bb1 kfifo_init +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa598e795 mdiobus_free +EXPORT_SYMBOL vmlinux 0xa5a566ae bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xa5a633b9 sg_last +EXPORT_SYMBOL vmlinux 0xa5abfd85 dm_get_device +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa5da0abd acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0xa5ec6b17 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xa60bb886 ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0xa60e641a lock_super +EXPORT_SYMBOL vmlinux 0xa63b5129 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa67ac79f eth_header_parse +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6ae3284 simple_getattr +EXPORT_SYMBOL vmlinux 0xa6cd5837 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xa6d96e20 kmap_high +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa6f40105 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0xa7046549 vprintk +EXPORT_SYMBOL vmlinux 0xa70fabbe release_evntsel_nmi +EXPORT_SYMBOL vmlinux 0xa71e7463 __first_cpu +EXPORT_SYMBOL vmlinux 0xa739dd8f udp_ioctl +EXPORT_SYMBOL vmlinux 0xa75739c6 skb_store_bits +EXPORT_SYMBOL vmlinux 0xa79b1f5c nf_log_register +EXPORT_SYMBOL vmlinux 0xa7b25117 pnp_is_active +EXPORT_SYMBOL vmlinux 0xa7c32274 generic_read_dir +EXPORT_SYMBOL vmlinux 0xa7e94f54 dev_alloc_skb +EXPORT_SYMBOL vmlinux 0xa80d7fe7 dev_unicast_add +EXPORT_SYMBOL vmlinux 0xa852533c ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0xa89acbb3 acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xa89b2d9a alloc_disk +EXPORT_SYMBOL vmlinux 0xa8a47318 __rta_fill +EXPORT_SYMBOL vmlinux 0xa8cd2e35 f_setown +EXPORT_SYMBOL vmlinux 0xa8d24b04 flush_old_exec +EXPORT_SYMBOL vmlinux 0xa8d5a5bb bio_split +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8dae145 d_genocide +EXPORT_SYMBOL vmlinux 0xa8dd62cf insert_inode_locked +EXPORT_SYMBOL vmlinux 0xa8ea3497 isapnp_protocol +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa91b5561 acpi_video_backlight_support +EXPORT_SYMBOL vmlinux 0xa959a1db cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0xa966011c neigh_lookup +EXPORT_SYMBOL vmlinux 0xa9693b60 pneigh_lookup +EXPORT_SYMBOL vmlinux 0xa973fa30 kmap_atomic +EXPORT_SYMBOL vmlinux 0xa99f9bc8 lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xa9b6cdee eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xa9b7dad4 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0xa9bd2676 __vmalloc +EXPORT_SYMBOL vmlinux 0xa9c6804d pcibios_set_irq_routing +EXPORT_SYMBOL vmlinux 0xa9e59669 submit_bio +EXPORT_SYMBOL vmlinux 0xa9f43ed1 get_empty_filp +EXPORT_SYMBOL vmlinux 0xa9f6a572 key_type_keyring +EXPORT_SYMBOL vmlinux 0xa9fcf31d wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0xaa0b3484 tty_register_device +EXPORT_SYMBOL vmlinux 0xaa138530 ip6_xmit +EXPORT_SYMBOL vmlinux 0xaa35e661 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0xaa6a2327 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xaa70128f put_mnt_ns +EXPORT_SYMBOL vmlinux 0xaa84a8ae acpi_processor_power_init_bm_check +EXPORT_SYMBOL vmlinux 0xaa9c9b0a kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0xaaaaacd1 ioremap_wc +EXPORT_SYMBOL vmlinux 0xaab06af8 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xaaca420e pid_task +EXPORT_SYMBOL vmlinux 0xaae62554 sk_reset_timer +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaaebe34f mca_write_pos +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab098efd pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0xab37995e bdi_unregister +EXPORT_SYMBOL vmlinux 0xab43bde3 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab65ed80 set_memory_uc +EXPORT_SYMBOL vmlinux 0xab775f95 proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xab9bc8a9 may_umount_tree +EXPORT_SYMBOL vmlinux 0xabbe9052 dma_ops +EXPORT_SYMBOL vmlinux 0xabc4c9b3 setup_new_exec +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac6b417e cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0xac849d08 zero_fill_bio +EXPORT_SYMBOL vmlinux 0xac901ea8 dma_sync_wait +EXPORT_SYMBOL vmlinux 0xaca87c0d kill_pgrp +EXPORT_SYMBOL vmlinux 0xacb297a2 wireless_send_event +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacd3e969 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0xacd47906 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad30d09c da903x_query_status +EXPORT_SYMBOL vmlinux 0xad44989a __netif_schedule +EXPORT_SYMBOL vmlinux 0xad483aac eth_type_trans +EXPORT_SYMBOL vmlinux 0xad8af0af dquot_scan_active +EXPORT_SYMBOL vmlinux 0xad9a1adf tty_hung_up_p +EXPORT_SYMBOL vmlinux 0xad9d8f3b pci_enable_wake +EXPORT_SYMBOL vmlinux 0xada1dc58 ipv4_specific +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadb65e14 put_tty_driver +EXPORT_SYMBOL vmlinux 0xadbdd0a9 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0xadc91d58 input_grab_device +EXPORT_SYMBOL vmlinux 0xadef6f70 seq_release_private +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xadf9fd0e bio_integrity_free +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae51a02a wrmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xae6da46f security_path_mkdir +EXPORT_SYMBOL vmlinux 0xae75771b vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0xae75f004 ida_destroy +EXPORT_SYMBOL vmlinux 0xae7688da ip_setsockopt +EXPORT_SYMBOL vmlinux 0xae97aa4b gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaed5dfb2 mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xaedfb8ea bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xaefe582a skb_push +EXPORT_SYMBOL vmlinux 0xaf08a65f pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0xaf127035 seq_read +EXPORT_SYMBOL vmlinux 0xaf296c8f udplite_prot +EXPORT_SYMBOL vmlinux 0xaf335a5c in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL vmlinux 0xaf4b1540 acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xaf532df3 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0xaf5cacaf genphy_read_status +EXPORT_SYMBOL vmlinux 0xaf7370dd call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0xaf886b74 pci_enable_bridges +EXPORT_SYMBOL vmlinux 0xaf9c9adb neigh_seq_stop +EXPORT_SYMBOL vmlinux 0xafa001b3 netpoll_poll +EXPORT_SYMBOL vmlinux 0xafe01377 down_read +EXPORT_SYMBOL vmlinux 0xb010ecd0 eth_mac_addr +EXPORT_SYMBOL vmlinux 0xb02023af xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0xb02a1426 start_tty +EXPORT_SYMBOL vmlinux 0xb0599147 inode_get_bytes +EXPORT_SYMBOL vmlinux 0xb05b1e5e thermal_zone_device_unregister +EXPORT_SYMBOL vmlinux 0xb072675c dma_set_mask +EXPORT_SYMBOL vmlinux 0xb077ef32 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb0803a85 kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0xb0823964 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xb08f76ad gen_pool_free +EXPORT_SYMBOL vmlinux 0xb09fa9db blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xb0a4880c hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0xb0a590ce dma_supported +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0eb071d scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0xb1002c1e register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xb11a6153 sock_no_listen +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb125ea58 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0xb13c4dba down_write +EXPORT_SYMBOL vmlinux 0xb1816976 d_delete +EXPORT_SYMBOL vmlinux 0xb183e691 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xb190230f fb_validate_mode +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1cfad22 rdmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb212e1ce proto_register +EXPORT_SYMBOL vmlinux 0xb21fc74f elv_rb_del +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22cc673 rfkill_register +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2441d45 backlight_device_register +EXPORT_SYMBOL vmlinux 0xb258b6de hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xb2675813 pci_pme_active +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb26aa1f5 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xb27510ef atomic64_inc_return +EXPORT_SYMBOL vmlinux 0xb279da12 pv_lock_ops +EXPORT_SYMBOL vmlinux 0xb29872f7 napi_frags_finish +EXPORT_SYMBOL vmlinux 0xb29bc8bd idr_remove +EXPORT_SYMBOL vmlinux 0xb2a7ad47 genl_sock +EXPORT_SYMBOL vmlinux 0xb2efb6be mca_read_stored_pos +EXPORT_SYMBOL vmlinux 0xb2fd5ceb __put_user_4 +EXPORT_SYMBOL vmlinux 0xb30abf8d idr_get_new_above +EXPORT_SYMBOL vmlinux 0xb31526ee sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0xb3205415 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb329c8af sock_create +EXPORT_SYMBOL vmlinux 0xb341bbd8 vlan_gro_frags +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb3519489 tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xb352177e find_first_bit +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb3821b9f noop_qdisc +EXPORT_SYMBOL vmlinux 0xb3916edc request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3a531bc kunmap +EXPORT_SYMBOL vmlinux 0xb3b462e0 dquot_transfer +EXPORT_SYMBOL vmlinux 0xb3bc9e89 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xb3e0590d acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0xb40956a2 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb452dc1f register_md_personality +EXPORT_SYMBOL vmlinux 0xb45578b8 memscan +EXPORT_SYMBOL vmlinux 0xb45b24f6 k8_nb_ids +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb48c5c1b sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0xb499ae39 simple_statfs +EXPORT_SYMBOL vmlinux 0xb4b79f63 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0xb4ca9447 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb508536f clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0xb5096da0 pci_reenable_device +EXPORT_SYMBOL vmlinux 0xb511f1bd dquot_acquire +EXPORT_SYMBOL vmlinux 0xb516343f jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xb5418861 atomic64_add +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb54c8b5d scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0xb564d936 __free_pages +EXPORT_SYMBOL vmlinux 0xb565ef08 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0xb573c387 per_cpu__kstat +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5a9d166 bdevname +EXPORT_SYMBOL vmlinux 0xb5bbcb52 pv_mmu_ops +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5cba58d bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xb5cef6e4 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb6124321 write_inode_now +EXPORT_SYMBOL vmlinux 0xb62f8c6f fddi_type_trans +EXPORT_SYMBOL vmlinux 0xb64663d6 mdiobus_scan +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6896671 crc_t10dif +EXPORT_SYMBOL vmlinux 0xb698ddf1 inet_del_protocol +EXPORT_SYMBOL vmlinux 0xb69ba815 acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xb6a215b1 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0xb6a289cb invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6e227aa rtc_lock +EXPORT_SYMBOL vmlinux 0xb6e30cbb read_cache_pages +EXPORT_SYMBOL vmlinux 0xb6e4a8e2 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0xb6ed1e53 strncpy +EXPORT_SYMBOL vmlinux 0xb6ef999e blk_free_tags +EXPORT_SYMBOL vmlinux 0xb6fd565b tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb70c1a29 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb72397d5 printk +EXPORT_SYMBOL vmlinux 0xb7312d8f posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xb75234ca blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb75d3893 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0xb771b9c7 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xb7816af9 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xb797a7e3 pci_set_power_state +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb79a6701 cdev_init +EXPORT_SYMBOL vmlinux 0xb7a7da60 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xb7acd8c6 sk_dst_check +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7bf7972 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7e7c479 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0xb7ee6194 input_set_capability +EXPORT_SYMBOL vmlinux 0xb804e258 tcf_exts_change +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb81d6c89 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0xb839398a rdmsr_on_cpus +EXPORT_SYMBOL vmlinux 0xb83b7622 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0xb8547b0c simple_release_fs +EXPORT_SYMBOL vmlinux 0xb865f835 scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xb86a8ca9 phy_connect_direct +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb881364e blk_register_region +EXPORT_SYMBOL vmlinux 0xb897dd9a set_pages_wb +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb8b42e42 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xb8e7ce2c __put_user_8 +EXPORT_SYMBOL vmlinux 0xb8f8d04c bio_put +EXPORT_SYMBOL vmlinux 0xb9179a5f dm_exception_store_create +EXPORT_SYMBOL vmlinux 0xb942b513 smp_call_function_many +EXPORT_SYMBOL vmlinux 0xb9441c12 __scsi_add_device +EXPORT_SYMBOL vmlinux 0xb95b91c2 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0xb9605bb9 generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xb97eecb0 bioset_free +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98cdabd bio_unmap_user +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9960c5a hci_recv_fragment +EXPORT_SYMBOL vmlinux 0xb99ef95b __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xb9a62357 filemap_fault +EXPORT_SYMBOL vmlinux 0xb9b5efe4 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0xb9ba63ab tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xb9e150be xfrm6_rcv +EXPORT_SYMBOL vmlinux 0xb9ef4609 dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0xb9f0dbd6 nobh_write_end +EXPORT_SYMBOL vmlinux 0xb9fd2205 add_efi_memmap +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba4676f3 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba8ded8f bio_pair_release +EXPORT_SYMBOL vmlinux 0xba989e14 blk_unplug +EXPORT_SYMBOL vmlinux 0xba9b2fc4 dentry_open +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbaefc360 mutex_trylock +EXPORT_SYMBOL vmlinux 0xbafb76a7 rfkill_blocked +EXPORT_SYMBOL vmlinux 0xbb0e4de9 blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb19e9e9 i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0xbb37909d security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xbb4058a5 new_inode +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb721585 acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0xbb89de17 ida_init +EXPORT_SYMBOL vmlinux 0xbb93e66a xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xbbd16397 kick_iocb +EXPORT_SYMBOL vmlinux 0xbc4641d0 init_net +EXPORT_SYMBOL vmlinux 0xbc47f667 pci_target_state +EXPORT_SYMBOL vmlinux 0xbc5ac04f follow_down +EXPORT_SYMBOL vmlinux 0xbca08c6b register_netdevice +EXPORT_SYMBOL vmlinux 0xbcb9d6fc free_buffer_head +EXPORT_SYMBOL vmlinux 0xbcc308bb strnlen_user +EXPORT_SYMBOL vmlinux 0xbcd76079 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0xbcf2060d nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xbd54f090 netlink_dump_start +EXPORT_SYMBOL vmlinux 0xbd641424 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0xbd7c0403 hci_connect +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbdf71d66 pneigh_enqueue +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe11010e clear_bdi_congested +EXPORT_SYMBOL vmlinux 0xbe3d524f inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0xbe542c1e pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xbe5fe9d7 per_cpu__irq_regs +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe6f7365 create_proc_entry +EXPORT_SYMBOL vmlinux 0xbea4ce9f mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0xbea9e44f __ip_select_ident +EXPORT_SYMBOL vmlinux 0xbecfa493 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xbeeb41d2 dev_add_pack +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf11de28 kmap +EXPORT_SYMBOL vmlinux 0xbf13b163 rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0xbf2568be filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xbf28f3b4 mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf82630b dm_unregister_target +EXPORT_SYMBOL vmlinux 0xbf8b39e9 isapnp_present +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc01eed33 __copy_from_user_ll_nozero +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc09b265d read_cache_page_async +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0c16e78 ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0xc0da15c6 lro_receive_skb +EXPORT_SYMBOL vmlinux 0xc0e8594d uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0xc0f65988 machine_real_restart +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc16bc5fc security_inode_readlink +EXPORT_SYMBOL vmlinux 0xc19c8163 atomic64_cmpxchg +EXPORT_SYMBOL vmlinux 0xc1e39eca cdev_del +EXPORT_SYMBOL vmlinux 0xc1ff4e5f vfs_readlink +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc21656f0 sock_setsockopt +EXPORT_SYMBOL vmlinux 0xc21ef630 filemap_flush +EXPORT_SYMBOL vmlinux 0xc220b173 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xc2308ed3 journal_init_inode +EXPORT_SYMBOL vmlinux 0xc243835b sync_blockdev +EXPORT_SYMBOL vmlinux 0xc24b2ca4 mutex_lock +EXPORT_SYMBOL vmlinux 0xc254af48 dcache_lock +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc2595f4b pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0xc260c533 netdev_set_master +EXPORT_SYMBOL vmlinux 0xc26462a2 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xc280a525 __copy_from_user_ll +EXPORT_SYMBOL vmlinux 0xc29d9218 pci_fixup_device +EXPORT_SYMBOL vmlinux 0xc2c0a1b3 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0xc2d711e1 krealloc +EXPORT_SYMBOL vmlinux 0xc2e32760 arp_tbl +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc2f3ed4b seq_puts +EXPORT_SYMBOL vmlinux 0xc2f77844 pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0xc3206bdc set_binfmt +EXPORT_SYMBOL vmlinux 0xc32adac1 journal_check_available_features +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc377a3ac audit_log_format +EXPORT_SYMBOL vmlinux 0xc37901ce jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xc384e59f invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0xc3932957 sock_recvmsg +EXPORT_SYMBOL vmlinux 0xc3aaf0a9 __put_user_1 +EXPORT_SYMBOL vmlinux 0xc3b0b65c tty_port_close_start +EXPORT_SYMBOL vmlinux 0xc3b32b7f dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0xc3c29929 skb_pad +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3f22b1b bdev_read_only +EXPORT_SYMBOL vmlinux 0xc3fa6a59 memchr +EXPORT_SYMBOL vmlinux 0xc4019d1e con_is_bound +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc4051183 pci_scan_slot +EXPORT_SYMBOL vmlinux 0xc4515889 pci_set_mwi +EXPORT_SYMBOL vmlinux 0xc47e0af8 skb_put +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4b02239 arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xc50e7be2 page_symlink +EXPORT_SYMBOL vmlinux 0xc518727d tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xc5201b50 __lock_page +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc550b3b3 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc55f7dc7 _write_trylock +EXPORT_SYMBOL vmlinux 0xc5718627 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0xc591cf15 skb_over_panic +EXPORT_SYMBOL vmlinux 0xc5b53505 eth_validate_addr +EXPORT_SYMBOL vmlinux 0xc5b65687 __elv_add_request +EXPORT_SYMBOL vmlinux 0xc5c6b4bf ps2_handle_response +EXPORT_SYMBOL vmlinux 0xc5d62dd0 inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0xc5d6e323 redraw_screen +EXPORT_SYMBOL vmlinux 0xc5e2a02a jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0xc5eeb78e iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0xc6290f53 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc642b3c9 uart_remove_one_port +EXPORT_SYMBOL vmlinux 0xc64b8442 copy_io_context +EXPORT_SYMBOL vmlinux 0xc659f267 kobject_init +EXPORT_SYMBOL vmlinux 0xc66fb53e seq_bitmap +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc68d13c5 thermal_zone_bind_cooling_device +EXPORT_SYMBOL vmlinux 0xc68d684e mmc_align_data_size +EXPORT_SYMBOL vmlinux 0xc691d655 napi_get_frags +EXPORT_SYMBOL vmlinux 0xc69f896f km_state_notify +EXPORT_SYMBOL vmlinux 0xc6a6ca78 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0xc6d0c332 ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0xc6db7b8f scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0xc7131591 pcibios_align_resource +EXPORT_SYMBOL vmlinux 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc766dcd5 textsearch_register +EXPORT_SYMBOL vmlinux 0xc768de19 cpu_all_bits +EXPORT_SYMBOL vmlinux 0xc77d26d3 nf_register_hooks +EXPORT_SYMBOL vmlinux 0xc786aafa blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7cf6d9c scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0xc7e283a7 blkdev_put +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc7f6d75c __scm_send +EXPORT_SYMBOL vmlinux 0xc7fbe550 ip6_frag_init +EXPORT_SYMBOL vmlinux 0xc82d832a hci_send_acl +EXPORT_SYMBOL vmlinux 0xc84f0b6e cdev_index +EXPORT_SYMBOL vmlinux 0xc86f83f2 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0xc8803362 pci_select_bars +EXPORT_SYMBOL vmlinux 0xc88717c4 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0xc898625d atomic64_inc_and_test +EXPORT_SYMBOL vmlinux 0xc8989d16 dst_discard +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8b59ed3 simple_transaction_read +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8d834c8 uart_get_divisor +EXPORT_SYMBOL vmlinux 0xc8d989fe inet_accept +EXPORT_SYMBOL vmlinux 0xc8e58a5b d_splice_alias +EXPORT_SYMBOL vmlinux 0xc8fa6097 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0xc9382306 find_vma +EXPORT_SYMBOL vmlinux 0xc946787f pv_irq_ops +EXPORT_SYMBOL vmlinux 0xc96f22a8 input_register_handler +EXPORT_SYMBOL vmlinux 0xc9819d23 pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0xc987a7fd netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc99a71d3 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9ec8704 udp_table +EXPORT_SYMBOL vmlinux 0xca17d0c9 dma_async_device_unregister +EXPORT_SYMBOL vmlinux 0xca197dc3 pci_set_master +EXPORT_SYMBOL vmlinux 0xca28fd58 input_release_device +EXPORT_SYMBOL vmlinux 0xca2a681b write_one_page +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca7d768e genphy_resume +EXPORT_SYMBOL vmlinux 0xca80bf0f bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xca8dc32f sync_page_range +EXPORT_SYMBOL vmlinux 0xca8e54e8 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0xcaa48376 __serio_register_port +EXPORT_SYMBOL vmlinux 0xcab31b1e i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xcaec183b skb_kill_datagram +EXPORT_SYMBOL vmlinux 0xcb349318 xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb6f491a tcf_hash_create +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb799c1a md_set_array_sectors +EXPORT_SYMBOL vmlinux 0xcbcf8e3b dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0xcc01e75c __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc51ee50 dma_spin_lock +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc83fb18 sg_miter_start +EXPORT_SYMBOL vmlinux 0xcc923733 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xccab1247 netdev_state_change +EXPORT_SYMBOL vmlinux 0xcccb773b sock_no_getname +EXPORT_SYMBOL vmlinux 0xcce93912 ps2_init +EXPORT_SYMBOL vmlinux 0xccfcf67c ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0xcd2304ce scsi_register_driver +EXPORT_SYMBOL vmlinux 0xcd599ba9 __breadahead +EXPORT_SYMBOL vmlinux 0xcdbb76d7 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0xce059b48 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0xce0f2d6f __neigh_event_send +EXPORT_SYMBOL vmlinux 0xce161a94 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce47f667 input_get_keycode +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce4d60fd i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce5d53b0 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0xce85f8e1 dev_open +EXPORT_SYMBOL vmlinux 0xce8d5214 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0xceb2c451 md_done_sync +EXPORT_SYMBOL vmlinux 0xcefc23ec pci_find_bus +EXPORT_SYMBOL vmlinux 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL vmlinux 0xcf0f0664 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf40a52a __mutex_init +EXPORT_SYMBOL vmlinux 0xcf5afe08 call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0xcf8ec6eb __pagevec_release +EXPORT_SYMBOL vmlinux 0xcfadd723 __percpu_counter_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfcca4de netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xcfedcaf6 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd03899bc tcp_shutdown +EXPORT_SYMBOL vmlinux 0xd04839fb scsi_remove_target +EXPORT_SYMBOL vmlinux 0xd06d442e posix_unblock_lock +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd09ed584 find_get_page +EXPORT_SYMBOL vmlinux 0xd0c2800e __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0xd0d8621b strlen +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd103d095 set_device_ro +EXPORT_SYMBOL vmlinux 0xd119b724 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd18a9194 dev_driver_string +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd1e890f9 kunmap_atomic +EXPORT_SYMBOL vmlinux 0xd1f6c5f3 smp_num_siblings +EXPORT_SYMBOL vmlinux 0xd1f91bcd dev_base_lock +EXPORT_SYMBOL vmlinux 0xd21d7ffe kthread_create +EXPORT_SYMBOL vmlinux 0xd23994cb blk_queue_ordered +EXPORT_SYMBOL vmlinux 0xd23cb5da inet_dgram_connect +EXPORT_SYMBOL vmlinux 0xd24efc21 md_unregister_thread +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd267d42c down_killable +EXPORT_SYMBOL vmlinux 0xd2825e28 key_task_permission +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2a941d4 sg_init_table +EXPORT_SYMBOL vmlinux 0xd2c66edb tty_shutdown +EXPORT_SYMBOL vmlinux 0xd3188be5 thaw_bdev +EXPORT_SYMBOL vmlinux 0xd3298867 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0xd32e52c7 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0xd33c6769 skb_unlink +EXPORT_SYMBOL vmlinux 0xd34f0c62 gen_pool_create +EXPORT_SYMBOL vmlinux 0xd365dbee pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xd37787f8 pci_request_regions +EXPORT_SYMBOL vmlinux 0xd3788340 simple_unlink +EXPORT_SYMBOL vmlinux 0xd380d851 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3f74cf1 interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xd40d240b inet_add_protocol +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd42b7232 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xd42fb43c vmtruncate +EXPORT_SYMBOL vmlinux 0xd43594c5 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0xd4505e17 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xd454ff81 i2c_verify_client +EXPORT_SYMBOL vmlinux 0xd46455fa find_lock_page +EXPORT_SYMBOL vmlinux 0xd4712819 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0xd4f31941 seq_open_private +EXPORT_SYMBOL vmlinux 0xd5198a62 generic_write_checks +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd53a8e9d posix_acl_permission +EXPORT_SYMBOL vmlinux 0xd55515f5 jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd59aa6d1 __lookup_one_len +EXPORT_SYMBOL vmlinux 0xd59ca8b3 genphy_config_advert +EXPORT_SYMBOL vmlinux 0xd5cc646e mmc_request_done +EXPORT_SYMBOL vmlinux 0xd62560c2 __sk_dst_check +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd648193a register_sysrq_key +EXPORT_SYMBOL vmlinux 0xd6656a9e pci_restore_state +EXPORT_SYMBOL vmlinux 0xd669c8ff blk_init_tags +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b33026 cpu_khz +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd6ee725e block_read_full_page +EXPORT_SYMBOL vmlinux 0xd706eed9 pci_find_device +EXPORT_SYMBOL vmlinux 0xd746da45 pci_enable_device +EXPORT_SYMBOL vmlinux 0xd778a8ce posix_test_lock +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd789cb06 vfs_rmdir +EXPORT_SYMBOL vmlinux 0xd79641d4 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7a6fafa panic_notifier_list +EXPORT_SYMBOL vmlinux 0xd7ce444f mdiobus_read +EXPORT_SYMBOL vmlinux 0xd7d2e83e acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xd7d36d1a idr_find +EXPORT_SYMBOL vmlinux 0xd7d67687 get_io_context +EXPORT_SYMBOL vmlinux 0xd7dd777b reserve_perfctr_nmi +EXPORT_SYMBOL vmlinux 0xd7e84cd0 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xd7f5e646 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xd7fc39da xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0xd80632cf key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xd82613c0 atomic64_sub_and_test +EXPORT_SYMBOL vmlinux 0xd8282ff0 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd8412868 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0xd8559740 dma_pool_free +EXPORT_SYMBOL vmlinux 0xd8722eff netif_rx +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8a65c38 atomic64_sub +EXPORT_SYMBOL vmlinux 0xd8d8f394 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8fdd59f ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0xd9079b31 journal_load +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd9117010 remove_proc_entry +EXPORT_SYMBOL vmlinux 0xd969be94 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0xd9801805 __inet6_hash +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9959248 blk_get_request +EXPORT_SYMBOL vmlinux 0xd996d859 idr_pre_get +EXPORT_SYMBOL vmlinux 0xd9b5b74a nf_hook_slow +EXPORT_SYMBOL vmlinux 0xd9c272aa mca_mark_as_unused +EXPORT_SYMBOL vmlinux 0xd9c5ea4c thermal_zone_device_update +EXPORT_SYMBOL vmlinux 0xd9dcb259 xfrm_state_add +EXPORT_SYMBOL vmlinux 0xda08c0d7 pcibios_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda104a46 generic_permission +EXPORT_SYMBOL vmlinux 0xda1707be cdrom_mode_select +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda52b596 d_path +EXPORT_SYMBOL vmlinux 0xda5f1be1 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0xda6703d2 sock_no_connect +EXPORT_SYMBOL vmlinux 0xda79b8e1 journal_start +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8fd495 isapnp_write_byte +EXPORT_SYMBOL vmlinux 0xda928914 nmi_watchdog +EXPORT_SYMBOL vmlinux 0xdaa57ec3 totalhigh_pages +EXPORT_SYMBOL vmlinux 0xdacc2b7c __locks_copy_lock +EXPORT_SYMBOL vmlinux 0xdad7be8b netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0xdb16b715 rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0xdb2c8250 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb61dc67 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdb92a32a wait_on_page_bit +EXPORT_SYMBOL vmlinux 0xdba35354 phy_attach_direct +EXPORT_SYMBOL vmlinux 0xdbae5929 rfkill_set_states +EXPORT_SYMBOL vmlinux 0xdbb9fa6f scsi_register +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbd05c51 write_cache_pages +EXPORT_SYMBOL vmlinux 0xdbd29d4a dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0xdbe7fec4 sock_wmalloc +EXPORT_SYMBOL vmlinux 0xdbeede9c generic_file_direct_write +EXPORT_SYMBOL vmlinux 0xdbf4621a gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xdbf870f9 x86_dma_fallback_dev +EXPORT_SYMBOL vmlinux 0xdbfcb3e1 flush_signals +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc08a9b5 user_revoke +EXPORT_SYMBOL vmlinux 0xdc12bbeb pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc319cbc kobject_get +EXPORT_SYMBOL vmlinux 0xdc430264 cdrom_release +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc5a13e6 tcp_recvmsg +EXPORT_SYMBOL vmlinux 0xdc6500cd pci_scan_bridge +EXPORT_SYMBOL vmlinux 0xdc66f53e input_set_keycode +EXPORT_SYMBOL vmlinux 0xdc6be454 sysctl_intvec +EXPORT_SYMBOL vmlinux 0xdc873a70 screen_info +EXPORT_SYMBOL vmlinux 0xdc9574d4 dev_mc_add +EXPORT_SYMBOL vmlinux 0xdc97a330 journal_lock_updates +EXPORT_SYMBOL vmlinux 0xdcb688dd dev_get_flags +EXPORT_SYMBOL vmlinux 0xdcb978ae journal_wipe +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd1542d1 dma_pool_create +EXPORT_SYMBOL vmlinux 0xdd22e734 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xdd30a882 lro_flush_all +EXPORT_SYMBOL vmlinux 0xdd4399ba blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0xdd4efe8f inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xdd506fa8 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0xdd57a715 scsi_add_device +EXPORT_SYMBOL vmlinux 0xdd663868 prepare_binprm +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xdd706dbb get_write_access +EXPORT_SYMBOL vmlinux 0xdd8c7e0e __destroy_inode +EXPORT_SYMBOL vmlinux 0xddd19641 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0xde1fd694 acpi_processor_preregister_performance +EXPORT_SYMBOL vmlinux 0xde6ba35a vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde8725bb bio_integrity_trim +EXPORT_SYMBOL vmlinux 0xde906238 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xdeccc028 __bforget +EXPORT_SYMBOL vmlinux 0xded8bd9b fb_blank +EXPORT_SYMBOL vmlinux 0xdf02c279 register_key_type +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf3361c7 inet_csk_accept +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf4c908c sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xdf4e02f7 arp_find +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf8c695a __ndelay +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfb0f392 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfca473b d_invalidate +EXPORT_SYMBOL vmlinux 0xdfd08e47 inet6_release +EXPORT_SYMBOL vmlinux 0xe059d448 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe094ef39 sg_next +EXPORT_SYMBOL vmlinux 0xe0a501e3 idr_remove_all +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0b18ffd __splice_from_pipe +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0dbdfa1 bio_integrity_clone +EXPORT_SYMBOL vmlinux 0xe0e177de neigh_event_ns +EXPORT_SYMBOL vmlinux 0xe0f105a3 acpi_processor_unregister_performance +EXPORT_SYMBOL vmlinux 0xe0f485d5 blk_end_request +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe13e6e44 llc_sap_close +EXPORT_SYMBOL vmlinux 0xe1402288 dmam_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0xe141fb1b __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xe15aeee2 downgrade_write +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1798831 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0xe1845f01 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1b01db7 thermal_cooling_device_register +EXPORT_SYMBOL vmlinux 0xe1defd6f pnp_activate_dev +EXPORT_SYMBOL vmlinux 0xe1ff393d mark_page_accessed +EXPORT_SYMBOL vmlinux 0xe211ff0e scsi_mode_sense +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe2638a3b simple_rename +EXPORT_SYMBOL vmlinux 0xe2a70ca9 inet_ioctl +EXPORT_SYMBOL vmlinux 0xe2ac012b dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0xe2c1a52d neigh_table_clear +EXPORT_SYMBOL vmlinux 0xe2cca6d6 touch_atime +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe2fbd566 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0xe3320900 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0xe34e7cd7 per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe38d4c2a pci_dev_get +EXPORT_SYMBOL vmlinux 0xe3a43e49 sk_free +EXPORT_SYMBOL vmlinux 0xe3f98015 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe401e1a1 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0xe414ef6e tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe456bd3a complete +EXPORT_SYMBOL vmlinux 0xe47179b2 dma_async_tx_descriptor_init +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4870354 _read_trylock +EXPORT_SYMBOL vmlinux 0xe488fa0f bt_sock_link +EXPORT_SYMBOL vmlinux 0xe48b38f2 kthread_bind +EXPORT_SYMBOL vmlinux 0xe48f3039 ida_get_new_above +EXPORT_SYMBOL vmlinux 0xe49465ab nf_register_sockopt +EXPORT_SYMBOL vmlinux 0xe4963fa6 remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0xe4aa3332 cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0xe4ab4b72 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0xe4afa383 vfs_rename +EXPORT_SYMBOL vmlinux 0xe4c1df3e _read_lock_bh +EXPORT_SYMBOL vmlinux 0xe4c5141e scsi_host_lookup +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe4fddacd create_empty_buffers +EXPORT_SYMBOL vmlinux 0xe51e805d phy_device_create +EXPORT_SYMBOL vmlinux 0xe5220fb7 uart_add_one_port +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe52e3e31 open_by_devnum +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe57d741e icmpv6_send +EXPORT_SYMBOL vmlinux 0xe57f8875 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0xe58167e8 vfs_llseek +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5aab869 blk_sync_queue +EXPORT_SYMBOL vmlinux 0xe5b32e25 generic_osync_inode +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5e840b5 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5ee11c6 skb_checksum_help +EXPORT_SYMBOL vmlinux 0xe5eff6da nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0xe620d3e1 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0xe63769e6 bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xe6474bc5 tcp_prot +EXPORT_SYMBOL vmlinux 0xe659b10c km_policy_notify +EXPORT_SYMBOL vmlinux 0xe6623613 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xe67c784c journal_update_format +EXPORT_SYMBOL vmlinux 0xe67fe41c nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe6985f63 pci_disable_device +EXPORT_SYMBOL vmlinux 0xe69aacf0 scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0xe6a777a6 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0xe6af9c57 skb_pull +EXPORT_SYMBOL vmlinux 0xe6e89cde inode_init_once +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe7060497 simple_lookup +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe76f95ed tcp_child_process +EXPORT_SYMBOL vmlinux 0xe77d4ede neigh_seq_next +EXPORT_SYMBOL vmlinux 0xe79c78a4 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xe7be0aaf key_alloc +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d32407 nmi_active +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe80ce219 sysctl_tcp_dma_copybreak +EXPORT_SYMBOL vmlinux 0xe81eb024 journal_start_commit +EXPORT_SYMBOL vmlinux 0xe845a002 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xe8636e38 llc_add_pack +EXPORT_SYMBOL vmlinux 0xe86ade3d cad_pid +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe8a1172b vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL vmlinux 0xe8a3bda2 dev_get_by_index +EXPORT_SYMBOL vmlinux 0xe8a45b5f __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xe8c0a963 sock_sendmsg +EXPORT_SYMBOL vmlinux 0xe8c8e1db neigh_table_init +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe910b532 del_timer_sync +EXPORT_SYMBOL vmlinux 0xe914456a gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe93ab9a0 inode_permission +EXPORT_SYMBOL vmlinux 0xe93c54a0 unregister_binfmt +EXPORT_SYMBOL vmlinux 0xe943621e unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0xe96848c0 journal_dirty_data +EXPORT_SYMBOL vmlinux 0xe997667b wrmsr_on_cpu +EXPORT_SYMBOL vmlinux 0xe9bd1d3f ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xe9e30394 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xe9e8b6a7 vc_cons +EXPORT_SYMBOL vmlinux 0xe9fd6baf thaw_process +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea07d84e block_sync_page +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea29c45e pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea3adda4 inet6_getname +EXPORT_SYMBOL vmlinux 0xea4818cd try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xea512117 __bio_clone +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xea88dd66 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0xea9e34ad mmc_register_driver +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeaf5615f xfrm_state_walk +EXPORT_SYMBOL vmlinux 0xeafb5485 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0xeb183be0 locks_remove_posix +EXPORT_SYMBOL vmlinux 0xeb1fabf6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebb5d87b generic_writepages +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebee107c blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0xec0cc62e generic_listxattr +EXPORT_SYMBOL vmlinux 0xec30b392 ppp_input_error +EXPORT_SYMBOL vmlinux 0xec490c1e uart_register_driver +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec849142 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xeccabe22 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xecdaeba6 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xecde1418 _spin_lock_irq +EXPORT_SYMBOL vmlinux 0xed0b70e2 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xed24f002 elv_abort_queue +EXPORT_SYMBOL vmlinux 0xed2cad9b uart_resume_port +EXPORT_SYMBOL vmlinux 0xed302153 phy_device_register +EXPORT_SYMBOL vmlinux 0xed3516af tty_unthrottle +EXPORT_SYMBOL vmlinux 0xed57d087 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xed777913 sock_create_kern +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedb5172a pnp_start_dev +EXPORT_SYMBOL vmlinux 0xedb8389f poll_freewait +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xedd6355f tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0xedf44b3e journal_get_undo_access +EXPORT_SYMBOL vmlinux 0xee1050fe journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xee24878f tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee421be0 init_timer_key +EXPORT_SYMBOL vmlinux 0xee7446c1 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeb6fde9 dev_close +EXPORT_SYMBOL vmlinux 0xeec3f992 generic_readlink +EXPORT_SYMBOL vmlinux 0xeeca41df pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xeecb865a dquot_free_inode +EXPORT_SYMBOL vmlinux 0xeed59bbc dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xef282cd6 xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xef2d8d70 dquot_drop +EXPORT_SYMBOL vmlinux 0xef3bd862 mca_find_unused_adapter +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef92a1a3 input_event +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefa60bac tty_hangup +EXPORT_SYMBOL vmlinux 0xefa78125 fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0xefac16f7 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xefb0083e set_bh_page +EXPORT_SYMBOL vmlinux 0xefc9acc9 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefdfe545 sockfd_lookup +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xefe7890b iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0xeff14be9 ioremap_cache +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf038c38f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf081d065 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0xf09c1bde release_sock +EXPORT_SYMBOL vmlinux 0xf0bf9ff9 kfree_skb +EXPORT_SYMBOL vmlinux 0xf0e7058a vm_map_ram +EXPORT_SYMBOL vmlinux 0xf0e79b01 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f2c951 lease_modify +EXPORT_SYMBOL vmlinux 0xf0f7884b xfrm_register_type +EXPORT_SYMBOL vmlinux 0xf0fdf6cb __stack_chk_fail +EXPORT_SYMBOL vmlinux 0xf101d0fb serio_unregister_driver +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11543ff find_first_zero_bit +EXPORT_SYMBOL vmlinux 0xf12c759e get_phy_id +EXPORT_SYMBOL vmlinux 0xf13e47ef do_sync_write +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf19c210f skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xf1b5fd3e default_file_splice_read +EXPORT_SYMBOL vmlinux 0xf1c24d8e mod_timer_pending +EXPORT_SYMBOL vmlinux 0xf1d64416 gen_new_estimator +EXPORT_SYMBOL vmlinux 0xf1d75f0f d_prune_aliases +EXPORT_SYMBOL vmlinux 0xf1d9430b tcp_connect +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf252f128 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xf2664af4 bitmap_unplug +EXPORT_SYMBOL vmlinux 0xf290d791 security_path_unlink +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2a726c8 netlink_set_err +EXPORT_SYMBOL vmlinux 0xf2d693f6 sock_rfree +EXPORT_SYMBOL vmlinux 0xf2e74040 mca_set_adapter_name +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf3341268 __clear_user +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf3463206 path_lookup +EXPORT_SYMBOL vmlinux 0xf34a8e95 scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xf34e9b29 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xf350dfdc sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0xf37adcf0 bio_kmalloc +EXPORT_SYMBOL vmlinux 0xf37cab51 sock_init_data +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3a0c7c9 pci_disable_msi +EXPORT_SYMBOL vmlinux 0xf3b01a60 free_task +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3cc95cb nf_ct_attach +EXPORT_SYMBOL vmlinux 0xf3f93791 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xf4219a37 dentry_unhash +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf4438c81 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xf45d1357 tcp_poll +EXPORT_SYMBOL vmlinux 0xf45f2468 uart_suspend_port +EXPORT_SYMBOL vmlinux 0xf48a2c4c MCA_bus +EXPORT_SYMBOL vmlinux 0xf4922a78 netdev_features_change +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf4a5c213 avail_to_resrv_perfctr_nmi_bit +EXPORT_SYMBOL vmlinux 0xf4ae9d51 ida_pre_get +EXPORT_SYMBOL vmlinux 0xf4c0cfcc pci_save_state +EXPORT_SYMBOL vmlinux 0xf4c42748 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0xf4c9af62 __invalidate_device +EXPORT_SYMBOL vmlinux 0xf4e43339 km_report +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf502d273 acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0xf51ae235 touch_nmi_watchdog +EXPORT_SYMBOL vmlinux 0xf5212fe8 mem_map +EXPORT_SYMBOL vmlinux 0xf535145d mmc_free_host +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf5503ec7 blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0xf572db24 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0xf58c43a2 vfs_quota_on +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5ce0393 revert_creds +EXPORT_SYMBOL vmlinux 0xf5da9dd5 i2c_release_client +EXPORT_SYMBOL vmlinux 0xf5dae7e2 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf5fdbfd5 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xf60e98c1 md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0xf61ac789 bio_integrity_split +EXPORT_SYMBOL vmlinux 0xf62b887a simple_link +EXPORT_SYMBOL vmlinux 0xf6580e00 tty_set_operations +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6e00b12 bdi_register +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf728f2f1 dquot_alloc +EXPORT_SYMBOL vmlinux 0xf73f71ec inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xf75837dc qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0xf761d048 user_path_at +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf77d4b1f scsi_print_command +EXPORT_SYMBOL vmlinux 0xf78328b2 bdi_register_dev +EXPORT_SYMBOL vmlinux 0xf786ef5e idr_init +EXPORT_SYMBOL vmlinux 0xf78b61d6 dma_release_declared_memory +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf791816b dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xf7a1d9eb override_creds +EXPORT_SYMBOL vmlinux 0xf7b291cd remove_arg_zero +EXPORT_SYMBOL vmlinux 0xf7be5ad3 igrab +EXPORT_SYMBOL vmlinux 0xf7c1fa02 cdev_alloc +EXPORT_SYMBOL vmlinux 0xf7c608c4 unlock_rename +EXPORT_SYMBOL vmlinux 0xf7fd68bf k8_northbridges +EXPORT_SYMBOL vmlinux 0xf80b098e call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf843e1cd acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0xf85b8214 tty_write_room +EXPORT_SYMBOL vmlinux 0xf85c4d88 keyring_search +EXPORT_SYMBOL vmlinux 0xf8704c29 security_path_rename +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8b30e93 mempool_create +EXPORT_SYMBOL vmlinux 0xf8caaaad md_write_start +EXPORT_SYMBOL vmlinux 0xf8cf9ee5 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xf8ea19bb find_inode_number +EXPORT_SYMBOL vmlinux 0xf8eac879 audit_log_end +EXPORT_SYMBOL vmlinux 0xf8f13a0f __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xf900574c __bread +EXPORT_SYMBOL vmlinux 0xf9152d22 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0xf92dd78d per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xf937c48a journal_ack_err +EXPORT_SYMBOL vmlinux 0xf940a328 __next_cpu +EXPORT_SYMBOL vmlinux 0xf9497b19 scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0xf968860e pci_choose_state +EXPORT_SYMBOL vmlinux 0xf97f5266 hci_conn_put_device +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9b8793c lock_sock_nested +EXPORT_SYMBOL vmlinux 0xfa0564fc __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfa0fa07e pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0xfa21b73f acpi_processor_register_performance +EXPORT_SYMBOL vmlinux 0xfa62bd8a kill_block_super +EXPORT_SYMBOL vmlinux 0xfa69bbe8 unregister_8022_client +EXPORT_SYMBOL vmlinux 0xfa97a4bb blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xfacb5042 bitmap_endwrite +EXPORT_SYMBOL vmlinux 0xfad40eb7 tty_port_close_end +EXPORT_SYMBOL vmlinux 0xfaf55ec8 llc_sap_find +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb113c7c simple_transaction_set +EXPORT_SYMBOL vmlinux 0xfb6287e2 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb71c319 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0xfb90d3c0 elevator_init +EXPORT_SYMBOL vmlinux 0xfb943446 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0xfba0c2e0 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0xfbc36f8f nla_reserve +EXPORT_SYMBOL vmlinux 0xfbcbda1e blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc05bf57 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0xfc0919fe nla_append +EXPORT_SYMBOL vmlinux 0xfc11c73c dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc3da3be set_blocksize +EXPORT_SYMBOL vmlinux 0xfc45328d sg_miter_next +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc764f62 inet_getname +EXPORT_SYMBOL vmlinux 0xfc9bd4d8 generic_file_mmap +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfce17454 dev_alloc_name +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcecac32 dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd4d885f dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xfd5be890 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfd85307e dm_put_device +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfdac8610 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfdc6f4f3 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xfde2145a boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xfdf5caa2 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe06afb9 __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0xfe071d51 md_check_recovery +EXPORT_SYMBOL vmlinux 0xfe14861c kernel_bind +EXPORT_SYMBOL vmlinux 0xfe1a30c2 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0xfe44ea9a eisa_bus_type +EXPORT_SYMBOL vmlinux 0xfe4aad23 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0xfe5040e5 hci_register_dev +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe660fdd scsi_host_get +EXPORT_SYMBOL vmlinux 0xfe759014 key_link +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfe865547 inode_set_bytes +EXPORT_SYMBOL vmlinux 0xfe8e7c8f xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xfead4745 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0xfec25a42 per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfed00b3d default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0xfed121b4 mca_device_transform_memory +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfee9f0c5 pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0xfef265d4 scsi_register_interface +EXPORT_SYMBOL vmlinux 0xfef80731 dm_table_get +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xfefb46d4 hci_free_dev +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff2c4699 fb_find_mode +EXPORT_SYMBOL vmlinux 0xff338864 mca_device_write_pos +EXPORT_SYMBOL vmlinux 0xff480992 dump_fpu +EXPORT_SYMBOL vmlinux 0xff5e8a95 mca_device_transform_irq +EXPORT_SYMBOL vmlinux 0xff65f9fe hci_alloc_dev +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff708fd3 mempool_destroy +EXPORT_SYMBOL vmlinux 0xff9630a3 handle_sysrq +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffafdc5c 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kvm_lapic_enabled +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576 kvm_exit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2afaa6ac kvm_load_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b kvm_enable_efer_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x336c60bb kvm_put_guest_fpu +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4107b535 kvm_clear_guest +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a4afdf3 kvm_set_cr0 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69 is_error_pfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x52e50fdc kvm_set_msr_common +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5365e749 emulate_instruction +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x53d9e8c3 gfn_to_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x54c31101 kvm_vcpu_uninit +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x560156e0 kvm_mmu_reset_context +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd kvm_handle_fault_on_reboot +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x60b167d1 kvm_get_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x633e55d9 kvm_is_visible_gfn +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x640cc9c0 kvm_task_switch +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x677240e4 kvm_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6890bb31 kvm_write_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6c1477b0 kvm_set_cr8 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6c6fd59f kvm_set_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6e9d9cf3 kvm_set_memory_region +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x731232c4 kvm_get_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x73decc33 kvm_queue_exception_e +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x796e24b0 gfn_to_memslot_unaliased +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x79e201d6 load_pdptrs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7c3c235f kvm_lapic_reset +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x88def0cb kvm_create_lapic +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab kvm_enable_tdp +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e603c3d kvm_emulate_pio +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47 segment_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ff5e1eb kvm_inject_pending_timer_irqs +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x91c02dc3 kvm_set_cr3 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9d5c58e6 is_error_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65 kvm_set_pfn_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa36daaf2 gfn_to_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xaa1fb5a1 kvm_get_cs_db_l_bits +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae3e3aa1 kvm_mmu_load +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae76e695 kvm_get_apic_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb3099f72 kvm_clear_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb4dd3bf2 kvm_set_cr4 +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb5f04b00 kvm_require_cpl +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc151032 kvm_x86_ops +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9 kvm_mmu_set_nonpresent_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b kvm_mmu_set_base_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc116b2eb kvm_mmu_unprotect_page_virt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc68810d1 kvm_lmsw +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea9998d kvm_release_page_clean +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcee6d9ad kvm_lapic_find_highest_irr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a kvm_mmu_set_mask_ptes +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9 kvm_is_error_hva +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd63084ae kvm_put_kvm +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd73e1792 kvm_emulate_pio_string +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd79f9324 kvm_vcpu_init +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd9eaf48e kvm_emulate_cpuid +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdbe6944f kvm_get_guest_memory_type +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe2e12fa3 kvm_mmu_invlpg +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe50c0d86 kvm_lapic_set_tpr +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed8e7f43 kvm_read_guest_page +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xef724c8f kvm_set_page_dirty +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf1dc31aa kvm_lapic_get_base +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf6b068db kvm_vcpu_cache +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf8098f06 kvm_emulate_halt +EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfcc5fbd9 gfn_to_pfn +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x142f878e crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x3c126d18 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x4e7f3f04 async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xa1959683 __async_tx_find_channel +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xc25c623e async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xd5bca310 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x8d2f6fbf async_xor +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x9f72bd7c async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/cryptd 0x16f06960 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0x78483aac cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0xe3228547 cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0xe706358c twofish_setkey +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464 cfag12864b_isinited +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d cfag12864b_disable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6 cfag12864b_isenabled +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926 cfag12864b_enable +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342 cfag12864b_getrate +EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95 cfag12864b_buffer +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23 ks0108_displaystate +EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518 ks0108_writedata +EXPORT_SYMBOL_GPL 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+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5 tpm_pcr_extend +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc58a3646 tpm_show_active +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe4634a5d tpm_remove_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe5ffbd1f tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf4f17993 tpm_register_hardware +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfb2aee94 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x5d6f10d1 tpm_bios_log_teardown +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0xb266d4b7 tpm_bios_log_setup +EXPORT_SYMBOL_GPL drivers/dca/dca 0x1d6e3f39 unregister_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01 dca_register_notify +EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df dca_get_tag +EXPORT_SYMBOL_GPL drivers/dca/dca 0x63f37514 dca_remove_requester +EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614 dca_unregister_notify +EXPORT_SYMBOL_GPL drivers/dca/dca 0x90c2cc73 dca_add_requester +EXPORT_SYMBOL_GPL drivers/dca/dca 0xbe4c4be2 alloc_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0xc23a9a1b free_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0xdd497767 register_dca_provider +EXPORT_SYMBOL_GPL drivers/dca/dca 0xe892365f dca3_get_tag +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0538dc26 edac_mc_handle_ue_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x08dfc27d edac_pci_handle_pe +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a edac_pci_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0f508c54 edac_mc_free +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2bc30532 edac_mc_add_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x30801e80 edac_device_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x353bb981 edac_mc_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x363dcd9e edac_pci_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4559c501 edac_mc_alloc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4c513051 edac_pci_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x54cd3170 edac_device_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x58ff7969 edac_pci_create_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5ca1423b edac_mc_find_csrow_by_page +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x63082c0c edac_mc_handle_ue +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a edac_device_alloc_index +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x70dfa785 edac_pci_alloc_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7a592a5a edac_device_add_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7c6d2e0f edac_mc_handle_ce_no_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7d22a95d edac_pci_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x86efea3f edac_pci_release_generic_ctl +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xa173f7c2 edac_device_handle_ce +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb8273a47 edac_device_free_ctl_info +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcebe1996 edac_pci_reset_delay_period +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcec08bc0 edac_device_del_device +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd0e5aa1f edac_mc_del_mc +EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd3b81fc5 edac_pci_handle_npe +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e usbhid_lookup_quirk +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x2059b199 usbhid_set_leds +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x32a1a94b usbhid_submit_report +EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x66108a77 hiddev_hid_event +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4b1e7a19 lis3lv02d_remove_fs +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4ed3e979 lis3lv02d_poweroff +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494 lis3lv02d_joystick_disable +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x84cfee3f lis3_dev +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xabfe867b lis3lv02d_init_device +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe0ad6de8 lis3lv02d_poweron +EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8 lis3lv02d_joystick_enable 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+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xfaeb64b2 videobuf_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x081dd0c6 v4l2_device_unregister_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x368aac6b v4l2_device_disconnect +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x505f5038 v4l2_device_set_name +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa1928f6d v4l2_device_register +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc10272a0 v4l2_device_unregister +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xeb4debeb v4l2_device_register_subdev +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1ba9f04c i2o_pool_alloc +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1cd1297c i2o_dma_realloc +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x26085709 i2o_dma_alloc +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x7b26a487 i2o_dma_map_single +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x7b37dde1 i2o_pool_free +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xc6a2d52d i2o_dma_map_sg +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xcdfccf51 i2o_sg_tablesize +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf062796a i2o_dma_free +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x28c3ffbc pcf50633_adc_sync_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xbea83772 pcf50633_adc_async_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x301a28f8 pcf50633_irq_unmask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x704c6ad0 pcf50633_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7a721d83 pcf50633_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x85dedb0b pcf50633_reg_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x90c02e8c pcf50633_irq_mask_get +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xb4ea6a57 pcf50633_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xb6a17b88 pcf50633_reg_set_bit_mask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xbae1d551 pcf50633_read_block +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd1766af3 pcf50633_write_block +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xeaf29749 pcf50633_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xed30fbe9 pcf50633_irq_mask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x14a94285 pcf50633_gpio_invert_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x5b8ba27d pcf50633_gpio_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x8d46a607 pcf50633_gpio_power_supply_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x93613eaf pcf50633_gpio_invert_get +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xf2e36efb pcf50633_gpio_get +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x0aeeefce sm501_misc_control +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x2e62b7fc sm501_unit_power +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x65412afb sm501_find_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x8f4af40f sm501_modify_reg +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xb84ebc97 sm501_set_clock +EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x471c002b ucb1400_adc_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x13032623 wm8350_device_init +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x17b0eb74 wm8350_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x275becb1 wm8350_gpio_config +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2f404cb6 wm8350_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4043d401 wm8350_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x59dcada1 wm8350_device_exit +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6bbcb09b wm8350_reg_unlock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6fcf627e wm8350_reg_lock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x919c634c wm8350_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xad45d811 wm8350_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xad8feb9c wm8350_mask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd1fb5d59 wm8350_read_auxadc +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd43e3520 wm8350_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdb8bdbb0 wm8350_block_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xddc80987 wm8350_unmask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf1b2fdb6 wm8350_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x25fcae1f wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x4a6ef3e2 wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x8b5ac88a wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xe36aed21 wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x2e713264 cb710_sg_dwiter_write_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x341ef803 cb710_pci_update_config_reg +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x8dfccbb1 cb710_sg_dwiter_read_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xf38a8e2c cb710_set_irq_handler +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x18674bba enclosure_remove_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x1b541fc9 enclosure_register +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x501ec70b enclosure_unregister +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x7978c0b1 enclosure_add_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x8325471f enclosure_find +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x94223c74 enclosure_for_each_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xe162bb1c enclosure_component_register +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x6451997b sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x9bf1a176 sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xb119b15a sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xb9a2fad8 sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xbf2d644a sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xf8da330b sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x1d335e7a cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x3429a5d9 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x6259b68c cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xe406a08b cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x82eab381 cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x599ee367 cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x84d1fa37 cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xc4985954 cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xd88844dd DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x1d788eab DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x1c941ebb DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0901473e del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x093a887b parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0efdab1c get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1404c71b deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2d643ed0 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x4f3dc941 mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x52a80261 put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5d075a35 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x74d35558 get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x87fbe70d default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8859299f kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x922553a4 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x935a4383 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcaba587a register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd96ad0ef get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd9ea8abe unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x31ce1dba register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9aab40e5 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xcf631fb0 del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xfac9e248 deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x178a750f nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1efeb0a2 nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x2922f003 nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x9a9b2b02 nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa6300984 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x7acb4a4c onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xebe012dd onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0b7d3def ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x15553369 ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x1ba80ea9 ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2052e405 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5e4383b6 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xaf8922f8 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd578cfd3 ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xdc21b871 ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe4a08d47 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe9ef0f17 ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xeaebd7a6 ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xf8f0a354 ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2e9c7e39 close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5a2051d5 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7bb25c22 free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa807a3ff can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xbc4b29e2 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd41ddad9 can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd49008dd open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe42e03de can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf7d7f73b alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x253d5816 unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x8a096252 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xd01e7f31 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xe4f4aa93 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x01270a37 mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x04324f45 mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x07cb45e0 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x084616a6 mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0bcaecc4 mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0de8ac4c mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0e359e8c mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ac60fc2 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1cc46874 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1fba299d mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2119b341 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x244c74c9 mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x252f64ca mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x30271397 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x347bc45c mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42500d96 mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4d4dfbeb mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4f5073ab mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4feeaffe mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x58fafff3 mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x613438da __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x66f61076 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67b5a8a0 mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x71cb6d36 mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7435ff76 mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7d911edb mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x81581bd8 mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x88cbcb42 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8b1db28c mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x90fefaf6 mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x928e9921 mlx4_SYNC_TPT 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mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd3abe230 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe02b9355 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe3bbc170 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe3e8757d mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe495e395 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xecedae4f mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf252fe2f mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xff0e7079 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x03cd05a7 usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xe9d30089 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x21a48237 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2cc16e1d generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x4ca41dbf rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x83de2c8b rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa89b1e35 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xed4ff127 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0f857986 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x13120e50 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x16a00a37 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2390f816 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x38402a3d usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x41dbc265 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4e41f315 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5088069b usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x52551f74 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x557612e7 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x569a219d usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x626b39bb usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6bd5a48e usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x73551fc3 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7546f662 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb8c36bc0 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc83f74bf usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd469c88a usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe2431a74 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf78ebe1d usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfb935dd5 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0a8e1043 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x11bc50bc i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2573dc1f i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2f79c6a6 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8b5221ea i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x90bcdd5d i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9ee2e806 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa00e4b84 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa460ddb5 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xae56ea76 i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xbac403da i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc65cfb3c i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd52f6b31 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x0f6fcfc2 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x60e85d01 ieee80211_debug_level +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0c9f4e34 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2ebb2590 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2ebf2166 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x40ee2f07 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x43c9903c lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x529c7a8d lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9a187a98 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9f398dd4 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa3264319 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xab5a1008 __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb7d005ba lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc542e648 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcfe2e79b lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe6798224 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xea3dac5b lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x75769236 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8830a632 lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9053f325 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9fd72114 lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa01cc878 lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb2dea68a lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb4eb5287 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xe2812ee4 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x254649e7 if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xfdd5f758 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1045457c p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x33b43bd1 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x37c493b5 p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x6cc103e1 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x746fb477 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xa1452aca p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe6ea52e8 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xeea6a0a0 p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0457df34 rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x06a273a1 rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0a0522b3 rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0ee5c688 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2ef892f8 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3bb111b9 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x497a18c1 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x58e9549e rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x595c9e84 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x79850735 rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7c1be430 rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9aa09fbb rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa63824b8 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xac1b0f52 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb8b35219 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbee270c4 rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc7d23dcf rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc8a53a76 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcad247e6 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd593e14e rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf923ba13 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfb3a9c73 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x054c76c1 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x0d28fe05 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x70413ee3 rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8412ff32 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa8368977 rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xabceb959 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xdbd33342 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf8281205 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xfed71e79 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1251ee74 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x16d829eb rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x23c166f8 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3e1b92e8 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4578f76b rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5139f0dc rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x93257680 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x97d992ba rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb18076ac rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb6d643d6 rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd78519fe rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd93efcdd rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe1566c44 rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe3f4f411 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe82979e1 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf3cf2d2a rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x8338f402 acpiphp_register_attention +EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x9f92f760 acpiphp_unregister_attention +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x4027a1e8 pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x6aba80ec pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0dbe6e9b wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5e61f80f wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xaafaa39f wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc03cbcef wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd8da4f9d wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf76d8b77 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x5b53de02 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x0ac076f8 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x088864bd iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0ab1b312 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x15309961 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2245386f iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x265cf363 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x285fe0e3 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x31326c90 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3573cd0b iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3a962a68 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41d7443e iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x48239331 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4bedc652 iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4de17c84 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x550aa010 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5ba6d52b iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66cde3ba iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6ff8f3d8 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x712ce428 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7dd12c7a iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x81e4ecab iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x887cbfb9 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93180960 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x95f12085 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x97e129ae iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9d85103d iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa1bc2122 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa3751e4a iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb3598fe7 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbcafc634 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdb3b7886 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdbefacaf iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdebd2d44 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe4f4397f iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe64564bf iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe9b07222 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xee23a342 iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf209d40f iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfde1286a iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x04d5e148 iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x13103f43 iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1391a807 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x23318ff6 iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x254f678a iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2907951d iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x84c188c8 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa0e75055 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa8c8bd8f iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb68d3a4e iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb745fcf9 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb8e08071 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbcd0b69a iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe52d2cf6 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf5e9a947 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfb6e4012 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1b87c3ef sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x30ba3ccb sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x397daa87 sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x499f309b sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x49c0600f sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5a19d399 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f5bfbb0 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6f28135f sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8dca45f5 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa96e6579 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab6b9339 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaf57000b sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaf8333ab sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xafcada74 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb3469c80 sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbbd0a1ef sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbfaec8c0 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc0280edf sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc283d9dc sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc28f3ade __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc3982def sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcb72afff sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfe5f6a18 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0c9b8503 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x36040838 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3740ba60 srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x45fb4fb1 srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5be25bb6 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7994c7f0 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x0ef58e89 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x26a69062 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x66d4b231 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x920fc35e scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9edcc205 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xae3e37d8 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb4de73b5 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe21f4736 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfa8170f9 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x079dac8a iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0a14d0f7 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x21549e8c iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6dfb46dd iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x77834b94 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x80a509c6 iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8b334cce iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b156c92 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9daab7d0 iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9ed7b741 iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa14c6fc2 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa2d6a64a iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xafce0230 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb0926f79 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbcff6b56 iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc8e04d6d iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcb582ec1 iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xccc9268a iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdb51905a iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeb81e75e iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf62dfdaf iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf9080780 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x26f28073 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x42ecb2ae srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x7a82a450 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xadcdc341 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xeafdf11c srp_release_transport +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb5723c56 spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xbed0640d spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc9752027 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xf50b0a4c spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfcf31ecc spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xffe38013 spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x01429a3f comedi_get_device_file_info +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22 comedi_usb_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1 comedi_free_board_minor +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0 comedi_pci_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623 comedi_usb_auto_unconfig +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4 comedi_pci_auto_config +EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xd67bd642 comedi_alloc_board_minor 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drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27 oslec_adaption_mode +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b oslec_flush +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1 oslec_free +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747 oslec_update +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x03ec4bc1 usbip_dump_urb +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0ae7970b usbip_alloc_iso_desc_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x1906e4ef usbip_stop_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x22c2bf5b usbip_xmit +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x4c64c0d8 sockfd_to_socket +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44 usbip_debug_flag +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x88b0ccaa usbip_start_threads +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x8f87a0ab usbip_event_add +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x961c5efc usbip_event_happend +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc0e886e9 usbip_stop_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcbb95286 dev_attr_usbip_debug +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xccac21c6 usbip_start_eh +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcf5b16f0 usbip_recv_xbuff +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc usbip_header_correct_endian +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586 usbip_dump_header +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe68cb4a6 usbip_pack_pdu +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xec1a0b4e usbip_task_init +EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfbc95a21 usbip_recv_iso +EXPORT_SYMBOL_GPL drivers/uio/uio 0x368c0b3e uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x5bf49f84 uio_event_notify +EXPORT_SYMBOL_GPL drivers/uio/uio 0x753b6cd8 __uio_register_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x2c955d3c usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf003507b usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0f1df39a usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3f94e7ac usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4b5614c0 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4bb7a708 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8592e566 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xa05a366c usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xa41294ec usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd57111ef usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd64895ff usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x11c036f7 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4090e1e9 usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x44c56faf usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x47c9ac33 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x556a2e26 usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6896c4a1 usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x75edf99c usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8b536633 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x902398b6 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa3e25934 usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbe9c89d8 usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc6e8eb2c usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdf7f6d3c ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf84d170f usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfc80dd0c usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x16009564 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1aa416ee fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2b5953d2 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x369aa860 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3a260b17 usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6af77630 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6d25138e usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x85118fd8 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8a28a385 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x91e8ab21 usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa2bbe611 usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb44472bc usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb80b0b5a usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc347fd4a usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc8413458 usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xce0952ee usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xddc97671 usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xddf01e7a usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdf67cb87 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe6da1204 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe939f3f2 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf6ee93ec usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfb8b4c70 usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x0e788342 __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x90e8e90f rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xcaa82f49 wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xd383e480 wa_urb_dequeue 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wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa8ebf9c4 wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xab03f1c8 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbc1f8146 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd826dda6 wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfcc16fe5 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x2acccf7a i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4763b3da i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x6bf6b063 i1480_fw_upload +EXPORT_SYMBOL_GPL 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drivers/uwb/umc 0x3c6589d7 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x814a6785 umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa69dd1bf umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xcb626f3e __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x053932e4 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0dec40a4 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c24edfe uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x20f8569a uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2180673b uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x248cfe1a uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2fedbb30 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x36ecada9 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x54140dd1 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x55d573a8 __uwb_rc_try_get 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+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7c7af48 uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaafccd4b uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafc2f5ed uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba7b842a uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce78f35a uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd4b012f2 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd574aa1d uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdba34317 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdff7e92e uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe31ecf43 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4268e38 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xec935ef8 uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0650c32 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf6a1bf1b uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/whci 0xc0ce9531 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e963081 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x15a3e641 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x33746104 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3bb64662 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x45f9a4c5 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x460992fd wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4a30564c wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x542d4505 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5942790e wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x59a071ad wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5bda9533 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6b548c59 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79bfd383 wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79c9a3e7 wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7c4ee5e4 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8a4e7d1f wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8ce09c67 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x964841d5 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa330e283 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa78d36d7 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa7dcdafe wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa8024641 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xad1c5ae9 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbd9e456c wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbfa79fbe wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc7385720 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc8891d9c wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xce244ae9 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd76e3631 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe63e8722 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xebd86f35 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf393e7f7 wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x01bd310b ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1fe423cb ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2bd224be ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x312eecd7 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x42a026b9 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x952f090f ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc6376030 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x29c7351d fb_ddc_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xc69eb556 fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xdd809242 fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x4b4ae54b sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x94298340 sis_malloc_new +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20 vmlfb_unregister_subsys +EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6 vmlfb_register_subsys +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x074dc902 register_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x59ed8769 virtio_check_driver_offered_feature +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x5aa07e00 register_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xe4e13cf1 unregister_virtio_device +EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xedebd1cb unregister_virtio_driver +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25 vring_interrupt +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0c1a0267 vring_new_virtqueue +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x71fcc575 vring_transport_features +EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xafe8900d vring_del_virtqueue +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2b2a4a27 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x2c897f37 w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x5dd55f34 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9207f4e3 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xafde72f0 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd4e82c1 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe164307a w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0xe6e15fe6 w1_touch_block +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa33e5efe dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xacd71ef3 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xbf475c24 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xc51bfb70 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xed852410 exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x03976c59 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x354de32f fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x5e08bccf fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x6e9c1cab fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x773d5327 fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x784028a9 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0x7aa9c35c fat_sync_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0x998559e3 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xa24c4f73 fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xa6a7d175 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0xa7180f9c fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0xaae530cf fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0xae57523d fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0xc4b7a125 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0xdb128a01 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xde3d23cb fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xebe05cd6 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0xf53151ed fat_getattr +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0ddeaf26 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1116dde8 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7f87f287 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x93d3acc4 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x984065a8 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x1e317bfb nfsacl_decode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xaa094348 nfsacl_encode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2dfb1017 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x47449d62 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x5bbd5b90 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x66be2541 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6c826352 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xc38c99c2 o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf0f86473 o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x65b0688f dlm_register_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8 dlm_setup_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9b985bed dlm_unregister_domain +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa5582981 dlm_print_one_lock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa617fc9d dlmunlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa9b9f608 dlm_register_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e dlm_errmsg +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6 dlm_unregister_eviction_cb +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe2ad8970 dlmlock +EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f dlm_errname +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415 ocfs2_cluster_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6 ocfs2_dlm_lvb_valid +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0dd4d45e ocfs2_stack_glue_register +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909 ocfs2_dlm_lock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88 ocfs2_cluster_disconnect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9 ocfs2_cluster_connect +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa ocfs2_cluster_hangup +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68 ocfs2_dlm_lock_status +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x8ebbc063 ocfs2_stack_glue_unregister +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465 ocfs2_dlm_lvb +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3 ocfs2_stack_glue_set_locking_protocol +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0 ocfs2_dlm_unlock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97 ocfs2_stack_supports_plocks +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc72c9aa4 ocfs2_plock +EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e ocfs2_dlm_dump_lksb +EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670 lzo1x_1_compress +EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27 lzo1x_decompress_safe +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57 free_rs +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9 init_rs_non_canonical +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e decode_rs16 +EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329 init_rs +EXPORT_SYMBOL_GPL net/802/garp 0x0e3357f9 garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0x68fd5fa8 garp_request_join +EXPORT_SYMBOL_GPL net/802/garp 0x72a4a8c1 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/garp 0x994e8a40 garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0xc77c954b garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0xe10b7e0b garp_unregister_application +EXPORT_SYMBOL_GPL net/802/stp 0xafa10969 stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 0xb5666277 stp_proto_register +EXPORT_SYMBOL_GPL net/ax25/ax25 0xa34c5c9d ax25_register_pid +EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05 ax25_bcast +EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e ax25_defaddr +EXPORT_SYMBOL_GPL net/dccp/dccp 0x096290a1 inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0bacf8e0 dccp_create_openreq_child +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0f2ec72f dccp_insert_option +EXPORT_SYMBOL_GPL net/dccp/dccp 0x19b2e950 dccp_hashinfo +EXPORT_SYMBOL_GPL net/dccp/dccp 0x19c90e80 dccp_close +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1a55e129 dccp_make_response +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1f9225c5 dccp_init_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x21e7396c dccp_check_req +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3173e17d dccp_child_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x37f654db dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3c2289fd dccp_shutdown +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4270fe9e dccp_ioctl +EXPORT_SYMBOL_GPL net/dccp/dccp 0x49feb064 dccp_sendmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x50a8f7ca dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x61f1236b dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6ed13a2f dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0x704d2594 dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967 dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x735127e1 dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x7b46a8bd dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8443c10f dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924 dccp_packet_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8a628b3c dccp_done +EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf dccp_statistics +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9882691b dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x9bca36ad dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa33f3874 dccp_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xa7abd579 dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0xb6e6cfa0 dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbc4075a2 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0xbf28198a dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc462f4de dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0xc7238c3d dccp_send_sync +EXPORT_SYMBOL_GPL net/dccp/dccp 0xe36c6543 dccp_setsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xed267eee dccp_getsockopt +EXPORT_SYMBOL_GPL net/dccp/dccp 0xf3d7d0b0 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x051082fe dccp_v4_do_rcv +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3a7e7a70 dccp_v4_request_recv_sock +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3bb85fc8 dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3fb2aa35 dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xcce2e638 dccp_invalid_packet +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe6dea9ef dccp_v4_conn_request +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x02f8514e nf_nat_seq_adjust_hook +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921 need_ipv4_conntrack +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10 nf_defrag_ipv4_enable +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6 nf_nat_proto_in_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x41e9e73a nf_nat_proto_range_to_nlattr +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x49d6f462 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7c93e538 nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7df19098 nf_nat_proto_put +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x89f77601 nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134 nf_nat_proto_nlattr_to_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe550b62a nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf14e5165 nf_nat_proto_unique_tuple +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x075a7a17 tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x291418fc tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x41bb8124 tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x921e6fa8 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf2118599 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x6842aafe ieee80211_iterate_active_interfaces +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xc6520325 ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a net_vs_ctl_path +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03040abf nf_conntrack_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03e98bea nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd nf_conntrack_lock +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd nf_ct_port_nla_policy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x08efaa0d nf_conntrack_helper_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0defd480 nf_ct_iterate_cleanup +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1830ebca nf_conntrack_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1c37ea46 nf_conntrack_helper_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1fe1fbb3 nf_ct_l3proto_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1ff3dac7 nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x280f49b1 nf_ct_invert_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2921a94e __nf_ct_refresh_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3127194f nf_conntrack_in +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x32a628bc nf_conntrack_flush_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x33a27abe nf_conntrack_hash_insert +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3dc020f1 nfnetlink_parse_nat_setup_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415 nf_ct_port_nlattr_to_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x427164e5 nf_ct_l3proto_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x42e63558 nf_conntrack_l4proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x46f8f45a __nf_conntrack_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x470044b6 nf_ct_expect_register_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b024096 nf_ct_expect_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9 nf_ct_alloc_hashtable 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+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad13d797 xdr_inline_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xae7574ad rpc_alloc_iostats +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef nfs_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf9040e5 svc_xprt_put +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xafd0e4f6 xprt_reserve_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb12675f9 rpc_call_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb1ba1cb1 rpc_wake_up_queued_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb36f0643 rpc_delay +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246 rpc_wake_up_status +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb6bfb66f rpc_max_payload +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb8117481 rpcauth_init_credcache +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9b3e3b0 svc_sock_destroy +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc3eaac8 xprt_set_retrans_timeout_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc9c76f5 rpc_exit_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbe7efdde rpc_malloc +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96 nfsd_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc06bad67 rpcauth_unregister +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3 rpc_calc_rto +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc15f1186 rpcb_getport_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471 xdr_decode_netobj +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc453509a rpc_force_rebind +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc55c8e77 rpcauth_init_cred +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc7f9304d svc_sock_names +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea qword_addhex +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3 xprt_load_transport +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1420b92 rpc_call_start +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4b37b01 xprt_disconnect_done +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd58d8d22 xprt_wait_for_buffer_space +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e rpc_init_wait_queue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd8a4dca5 xdr_buf_from_iov +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd8d67c4f auth_domain_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc19b419 xdr_inline_decode +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd0c2261 xdr_decode_word +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdec3acd8 auth_unix_forget_old +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdfdee58b xprt_adjust_cwnd +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe397dc56 rpc_proc_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe451d3d8 rpcauth_create +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1 xdr_encode_opaque +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe64d2c3b svc_set_num_threads +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5 qword_get +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed5cf82a auth_domain_put +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4 qword_add +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52 rpc_wake_up +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69 rpc_update_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xefc70dfd svc_xprt_enqueue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf00e0e56 xprt_set_retrans_timeout_def +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf350903c svc_drop +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf425e170 xdr_partial_copy_from_skb +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf435149d rpcauth_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf6240f88 svc_xprt_received +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c rpc_free +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfcb44c67 auth_domain_find +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd9efe89 rpc_lookup_cred +EXPORT_SYMBOL_GPL net/wimax/wimax 0x0060eabc wimax_msg_data_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x105744e5 wimax_report_rfkill_sw +EXPORT_SYMBOL_GPL net/wimax/wimax 0x22691ecd wimax_report_rfkill_hw +EXPORT_SYMBOL_GPL net/wimax/wimax 0x801967a1 wimax_dev_add +EXPORT_SYMBOL_GPL net/wimax/wimax 0x84fade5f wimax_dev_init +EXPORT_SYMBOL_GPL net/wimax/wimax 0x86264d82 wimax_msg_len +EXPORT_SYMBOL_GPL net/wimax/wimax 0x8e9869cf wimax_dev_rm +EXPORT_SYMBOL_GPL net/wimax/wimax 0x945b4d73 wimax_msg_data +EXPORT_SYMBOL_GPL net/wimax/wimax 0x98a222fb wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0xa4da768d wimax_msg +EXPORT_SYMBOL_GPL net/wimax/wimax 0xa533e599 wimax_state_get +EXPORT_SYMBOL_GPL net/wimax/wimax 0xb55056f2 wimax_msg_alloc +EXPORT_SYMBOL_GPL net/wimax/wimax 0xe16927b4 wimax_state_change +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x02c1e653 cfg80211_ibss_wext_giwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x06e01118 cfg80211_ibss_wext_siwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x093b98c8 cfg80211_wext_siwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2c12c654 cfg80211_wext_siwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2cdffa36 cfg80211_wext_giwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3457e08e cfg80211_wext_siwmlme +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x353658f8 cfg80211_wext_giwmode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3c882011 cfg80211_ibss_wext_siwap +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3cc7bef5 cfg80211_wext_siwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x464bf8cc cfg80211_ibss_wext_siwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x52b311f2 cfg80211_wext_siwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x749b24b6 cfg80211_wext_siwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9e0c7862 cfg80211_ibss_wext_giwfreq +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa1daa41b cfg80211_wext_giwscan +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa29ad5dd cfg80211_wext_giwname +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa7f528a0 cfg80211_ibss_wext_giwessid +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbe480471 cfg80211_wext_giwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc0f39307 cfg80211_wext_siwtxpower +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd007d940 cfg80211_wext_siwencodeext +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe2fb65b9 cfg80211_wext_giwfrag +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe3b55f70 cfg80211_wext_giwrange +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe88548a4 cfg80211_wext_giwretry +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xec774dcc cfg80211_wext_giwrts +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfaad97d2 cfg80211_wext_siwencode +EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfd4f3ccf cfg80211_wext_freq +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x5a1a0bcc ipcomp_output +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8a2b0a11 ipcomp_input +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xc0fd5525 ipcomp_init_state +EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xda40c532 ipcomp_destroy +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01fb738a snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x089766b2 snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0e75524d snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f2f80d5 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10e6e5f7 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11183dbf snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14790aac snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b0f4453 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b18ab7f snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x207229db snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21519983 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x239df3af snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27f65a69 snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2f234ec8 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3319c654 snd_hda_get_bool_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x35c2d846 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x37c74e1e snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b81576d snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b84aedb snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3f4f94ea snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ceb3473 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4de6ffd7 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x51d2266f snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55770f35 snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x57301290 snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x67af79fe snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x689f431d snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c49b381 snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70045894 snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70e39431 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x71c2a6d1 snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7355aff6 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x764f41da snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d51d0ef snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7dc8a16a snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f5cce8e snd_hda_get_connections +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80947ee0 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80e305c6 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85b8b7ae snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x868fa25b snd_hda_get_hint +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e38d35c snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x91d4c101 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9227329b snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x966c2cfe snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b5e99ea snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d0c257b snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d275cfb snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f9492d7 snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa9d5735b snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xadbc1e52 snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb184ee02 snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb1e7ab7f snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4d586da snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf71e860 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbffcf86e snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc1d5dbd8 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc31811a3 snd_hda_sequence_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcaf677a4 snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd8046b9 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd43a0a61 snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd4e9de31 snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdbbe4013 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe07fea28 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0c5c1fa snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe10be68e snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe291a555 snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe69c4366 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed92780e snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xedbb8eae snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf21b6a70 snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf4432d98 snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf9428488 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfd59f9b6 snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xad72b936 ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xdc7bb17e soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x9c496af2 soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x3f97b307 soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x4f192bee ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x8d4bef8a cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x97c58742 soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xb2354638 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xc66deb44 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x1bd26ea1 ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xcdd8ee8f soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x06df7b31 tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x805fa06f soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x1876105a aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xa7a35076 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x0a6757a3 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x64d221e9 aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x7b18c04c soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8b5370f2 aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa76e5c41 aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb9f5dfc5 aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xdcad355d aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x62556687 soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x9fb5e443 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xa3ed0082 soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x2df59194 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x92573ceb soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x3879745e soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x3b676da6 wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xac478f7a wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x639a4b18 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xa3658e0c soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x252226af wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x56c334c4 soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x59120f4b soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x8f4d8d6d wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x3655c81e soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbabcb922 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x3bc4e35e wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe6551960 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x934805c1 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xfbc35493 soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x8461e562 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xd0ee0750 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x1dd7e14b soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd4fa3854 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x36fab288 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x526e4afa wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x1ade4997 soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x20b51c47 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x195a9df9 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xb72a0d6e wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x0183c68f soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xda01d57f wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x0b46f45e wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xdb1d3afb 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0x1f3d5cfa crypto_drop_spawn +EXPORT_SYMBOL_GPL vmlinux 0x1f777620 devres_alloc +EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3 acpi_get_pci_rootbridge_handle +EXPORT_SYMBOL_GPL vmlinux 0x1fcece42 inet_twdr_twcal_tick +EXPORT_SYMBOL_GPL vmlinux 0x20088f0d usb_deregister_device_driver +EXPORT_SYMBOL_GPL vmlinux 0x2039e827 spi_register_master +EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a klist_add_tail +EXPORT_SYMBOL_GPL vmlinux 0x2064ec81 use_module +EXPORT_SYMBOL_GPL vmlinux 0x2078e809 dev_attr_em_message +EXPORT_SYMBOL_GPL vmlinux 0x20bc3470 orderly_poweroff +EXPORT_SYMBOL_GPL vmlinux 0x20c2e9e0 ip6_dst_blackhole +EXPORT_SYMBOL_GPL vmlinux 0x212323c3 fuse_conn_put +EXPORT_SYMBOL_GPL vmlinux 0x215db6e9 tracepoint_probe_register_noupdate +EXPORT_SYMBOL_GPL vmlinux 0x2228cb6a fib_rules_register +EXPORT_SYMBOL_GPL vmlinux 0x222d98e0 sata_std_hardreset +EXPORT_SYMBOL_GPL vmlinux 0x2277d75d platform_device_register +EXPORT_SYMBOL_GPL vmlinux 0x227898e3 ata_sff_tf_read +EXPORT_SYMBOL_GPL vmlinux 0x2296c00d crypto_attr_u32 +EXPORT_SYMBOL_GPL vmlinux 0x22f2ee68 ata_link_next +EXPORT_SYMBOL_GPL vmlinux 0x230f933a da903x_unregister_notifier +EXPORT_SYMBOL_GPL vmlinux 0x2310cd35 ata_pci_sff_init_host +EXPORT_SYMBOL_GPL vmlinux 0x232c0638 hrtimer_get_remaining +EXPORT_SYMBOL_GPL vmlinux 0x23618ba0 register_net_sysctl_rotable +EXPORT_SYMBOL_GPL vmlinux 0x2365a701 find_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0x23679939 __iowrite32_copy +EXPORT_SYMBOL_GPL vmlinux 0x2372025c xfrm_audit_policy_delete +EXPORT_SYMBOL_GPL vmlinux 0x23864ce7 cpuset_mem_spread_node +EXPORT_SYMBOL_GPL vmlinux 0x23869dc7 cancel_work_sync +EXPORT_SYMBOL_GPL vmlinux 0x23a7d9ec sdio_release_irq +EXPORT_SYMBOL_GPL vmlinux 0x23c101e0 usb_get_urb +EXPORT_SYMBOL_GPL vmlinux 0x23c449af regulator_get +EXPORT_SYMBOL_GPL vmlinux 0x23d77868 ata_host_alloc +EXPORT_SYMBOL_GPL vmlinux 0x23f56752 dm_rh_region_context +EXPORT_SYMBOL_GPL vmlinux 0x2447533c ktime_get_real +EXPORT_SYMBOL_GPL vmlinux 0x247fa6fd pci_find_next_capability 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vmlinux 0x2a678a13 __suspend_report_result +EXPORT_SYMBOL_GPL vmlinux 0x2acea803 usb_queue_reset_device +EXPORT_SYMBOL_GPL vmlinux 0x2aeaa055 dma_run_dependencies +EXPORT_SYMBOL_GPL vmlinux 0x2af90271 speedstep_get_frequency +EXPORT_SYMBOL_GPL vmlinux 0x2b0eeccd pci_find_ext_capability +EXPORT_SYMBOL_GPL vmlinux 0x2b202df6 sysfs_remove_link +EXPORT_SYMBOL_GPL vmlinux 0x2b2f6af1 srcu_batches_completed +EXPORT_SYMBOL_GPL vmlinux 0x2b769390 ata_port_disable +EXPORT_SYMBOL_GPL vmlinux 0x2b9b42c7 kill_pid_info_as_uid +EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23 nf_net_ipv4_netfilter_sysctl_path +EXPORT_SYMBOL_GPL vmlinux 0x2be7fb8e disable_kprobe +EXPORT_SYMBOL_GPL vmlinux 0x2c208607 power_supply_is_system_supplied +EXPORT_SYMBOL_GPL vmlinux 0x2c2ea11f device_create_vargs +EXPORT_SYMBOL_GPL vmlinux 0x2c33dd0e init_dummy_netdev +EXPORT_SYMBOL_GPL vmlinux 0x2ce98559 kcrypto_wq +EXPORT_SYMBOL_GPL vmlinux 0x2d2bfa11 ata_dummy_port_info +EXPORT_SYMBOL_GPL vmlinux 0x2d3b06c1 sata_port_ops +EXPORT_SYMBOL_GPL vmlinux 0x2d45bcda crypto_alg_sem +EXPORT_SYMBOL_GPL vmlinux 0x2d571574 input_ff_erase +EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3 sched_clock_idle_wakeup_event +EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c trace_seq_printf +EXPORT_SYMBOL_GPL vmlinux 0x2dfe7b71 ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0x2e370585 rt_mutex_unlock +EXPORT_SYMBOL_GPL vmlinux 0x2e47f677 xfrm_aalg_get_byidx +EXPORT_SYMBOL_GPL vmlinux 0x2e63c5be unregister_net_sysctl_table +EXPORT_SYMBOL_GPL vmlinux 0x2eb91dfe scatterwalk_map +EXPORT_SYMBOL_GPL vmlinux 0x2f24d037 regulator_bulk_disable +EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7 cpufreq_frequency_get_table +EXPORT_SYMBOL_GPL vmlinux 0x2f687f96 usb_alloc_urb +EXPORT_SYMBOL_GPL vmlinux 0x2f95b8c2 bus_for_each_drv +EXPORT_SYMBOL_GPL vmlinux 0x2fca8726 ring_buffer_empty +EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17 dpm_resume_noirq +EXPORT_SYMBOL_GPL vmlinux 0x2fcf9f07 blk_add_driver_data +EXPORT_SYMBOL_GPL vmlinux 0x300ffe85 ata_do_set_mode +EXPORT_SYMBOL_GPL vmlinux 0x3013e853 hwmon_device_register +EXPORT_SYMBOL_GPL vmlinux 0x30496e88 crypto_alloc_base +EXPORT_SYMBOL_GPL vmlinux 0x30a0ef77 regulator_bulk_get +EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca bstr_printf +EXPORT_SYMBOL_GPL vmlinux 0x30a8d632 regulator_unregister +EXPORT_SYMBOL_GPL vmlinux 0x30a9db66 hrtimer_start +EXPORT_SYMBOL_GPL vmlinux 0x30c39857 sysdev_remove_file +EXPORT_SYMBOL_GPL vmlinux 0x30ce9a16 usb_hcd_check_unlink_urb +EXPORT_SYMBOL_GPL vmlinux 0x313f2267 ata_pci_sff_activate_host +EXPORT_SYMBOL_GPL vmlinux 0x314f2737 fuse_file_poll +EXPORT_SYMBOL_GPL vmlinux 0x31842467 ata_sff_port_start32 +EXPORT_SYMBOL_GPL vmlinux 0x318920b1 register_dock_notifier +EXPORT_SYMBOL_GPL vmlinux 0x320de404 xfrm_audit_state_icvfail +EXPORT_SYMBOL_GPL vmlinux 0x322e2378 usb_hcd_unlink_urb_from_ep +EXPORT_SYMBOL_GPL vmlinux 0x32928e6d rt_mutex_lock_interruptible +EXPORT_SYMBOL_GPL vmlinux 0x32a6755b inotify_find_update_watch +EXPORT_SYMBOL_GPL vmlinux 0x32cea553 usb_sg_init +EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc xfrm_aalg_get_byid +EXPORT_SYMBOL_GPL vmlinux 0x32f17454 ring_buffer_event_data +EXPORT_SYMBOL_GPL vmlinux 0x32f4a11f bus_create_file +EXPORT_SYMBOL_GPL vmlinux 0x33308d5f cpufreq_cpu_get +EXPORT_SYMBOL_GPL vmlinux 0x335e5d47 ata_host_register +EXPORT_SYMBOL_GPL vmlinux 0x33607d36 smp_ops +EXPORT_SYMBOL_GPL vmlinux 0x33d164a9 crypto_enqueue_request +EXPORT_SYMBOL_GPL vmlinux 0x33d7957d sdio_set_block_size +EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6 gpio_set_value_cansleep +EXPORT_SYMBOL_GPL vmlinux 0x346adca6 device_release_driver +EXPORT_SYMBOL_GPL vmlinux 0x346d79d8 timed_output_dev_register +EXPORT_SYMBOL_GPL vmlinux 0x3474c78d ata_sas_slave_configure +EXPORT_SYMBOL_GPL vmlinux 0x34b4634c usb_hcd_resume_root_hub +EXPORT_SYMBOL_GPL vmlinux 0x34bdaf11 queue_delayed_work_on +EXPORT_SYMBOL_GPL vmlinux 0x34c51f85 anon_transport_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0x34d82887 transport_add_device +EXPORT_SYMBOL_GPL vmlinux 0x34e06f42 ata_pci_sff_init_one +EXPORT_SYMBOL_GPL vmlinux 0x350bce1c scsi_get_vpd_page +EXPORT_SYMBOL_GPL vmlinux 0x357bee86 crypto_ahash_type +EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a sdev_evt_alloc +EXPORT_SYMBOL_GPL vmlinux 0x3605408c sysfs_remove_file_from_group +EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc save_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0x362e23ec call_rcu_bh +EXPORT_SYMBOL_GPL vmlinux 0x36cc88c1 ata_sff_hsm_move +EXPORT_SYMBOL_GPL vmlinux 0x36d021cf crypto_alloc_ablkcipher +EXPORT_SYMBOL_GPL vmlinux 0x36d2bb11 srcu_read_unlock +EXPORT_SYMBOL_GPL vmlinux 0x3709d763 acpi_pci_check_ejectable +EXPORT_SYMBOL_GPL vmlinux 0x370ece2a bus_register +EXPORT_SYMBOL_GPL vmlinux 0x37115b36 regulator_bulk_enable +EXPORT_SYMBOL_GPL vmlinux 0x373a5796 hidinput_disconnect +EXPORT_SYMBOL_GPL vmlinux 0x3750701a inotify_remove_watch_locked +EXPORT_SYMBOL_GPL vmlinux 0x3785833e ata_sff_tf_load +EXPORT_SYMBOL_GPL vmlinux 0x37893643 device_reprobe +EXPORT_SYMBOL_GPL vmlinux 0x37fbd502 ip6_dst_lookup +EXPORT_SYMBOL_GPL vmlinux 0x38043d9c dm_device_name +EXPORT_SYMBOL_GPL vmlinux 0x3825189f debugfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0x383ebfea blkcipher_walk_phys +EXPORT_SYMBOL_GPL vmlinux 0x3841ab01 unregister_kprobe +EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7 input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0x38bffa00 scsi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0x38db7f5f tty_encode_baud_rate +EXPORT_SYMBOL_GPL vmlinux 0x38fe998e ata_eh_analyze_ncq_error +EXPORT_SYMBOL_GPL vmlinux 0x39095107 ring_buffer_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0x39bd9a0f crypto_alg_mod_lookup +EXPORT_SYMBOL_GPL vmlinux 0x39caef6c usb_ep0_reinit +EXPORT_SYMBOL_GPL vmlinux 0x3a18320b da903x_set_bits +EXPORT_SYMBOL_GPL vmlinux 0x3a21627d tcp_slow_start +EXPORT_SYMBOL_GPL vmlinux 0x3a33adb3 skb_cow_data +EXPORT_SYMBOL_GPL vmlinux 0x3a3815fe spi_setup +EXPORT_SYMBOL_GPL vmlinux 0x3ad5567f map_vm_area +EXPORT_SYMBOL_GPL vmlinux 0x3ae27702 ata_timing_compute +EXPORT_SYMBOL_GPL vmlinux 0x3aeefd5d hidraw_report_event +EXPORT_SYMBOL_GPL vmlinux 0x3af6cebd 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+EXPORT_SYMBOL_GPL vmlinux 0x3db4bc40 sata_scr_valid +EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7 bprintf +EXPORT_SYMBOL_GPL vmlinux 0x3dd68594 cpci_hp_register_bus +EXPORT_SYMBOL_GPL vmlinux 0x3ddffb96 dm_rh_recovery_start +EXPORT_SYMBOL_GPL vmlinux 0x3e4f8fee ata_sas_port_destroy +EXPORT_SYMBOL_GPL vmlinux 0x3e5ffd90 task_active_pid_ns +EXPORT_SYMBOL_GPL vmlinux 0x3e757637 cpu_bit_bitmap +EXPORT_SYMBOL_GPL vmlinux 0x3e9d6c22 scsi_internal_device_unblock +EXPORT_SYMBOL_GPL vmlinux 0x3ec05838 i2c_unregister_device +EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc wmi_install_notify_handler +EXPORT_SYMBOL_GPL vmlinux 0x3ed677d3 __blkdev_driver_ioctl +EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9 get_online_cpus +EXPORT_SYMBOL_GPL vmlinux 0x3f01570a probe_kernel_write +EXPORT_SYMBOL_GPL vmlinux 0x3f0b1638 raw_seq_next +EXPORT_SYMBOL_GPL vmlinux 0x3f219336 pci_destroy_slot +EXPORT_SYMBOL_GPL vmlinux 0x3f238101 dcookie_register +EXPORT_SYMBOL_GPL vmlinux 0x3f39f836 ring_buffer_free_read_page +EXPORT_SYMBOL_GPL vmlinux 0x3f415e2d usb_driver_claim_interface +EXPORT_SYMBOL_GPL vmlinux 0x3f9698fe crypto_ahash_import +EXPORT_SYMBOL_GPL vmlinux 0x3fbfbc2e acpi_smbus_read +EXPORT_SYMBOL_GPL vmlinux 0x3fc4f444 device_create +EXPORT_SYMBOL_GPL vmlinux 0x3fcfd572 tty_find_polling_driver +EXPORT_SYMBOL_GPL vmlinux 0x3fdf84c1 led_trigger_store +EXPORT_SYMBOL_GPL vmlinux 0x400e1661 ata_host_resume +EXPORT_SYMBOL_GPL vmlinux 0x40300f80 sdio_register_driver +EXPORT_SYMBOL_GPL vmlinux 0x407d0809 driver_find +EXPORT_SYMBOL_GPL vmlinux 0x40887ed5 tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0x40af0dec ata_xfer_mode2mask +EXPORT_SYMBOL_GPL vmlinux 0x4107f2f0 tty_perform_flush +EXPORT_SYMBOL_GPL vmlinux 0x4147f9ee fs_kobj +EXPORT_SYMBOL_GPL vmlinux 0x415c6317 sdio_align_size +EXPORT_SYMBOL_GPL vmlinux 0x41a02ecc ata_sff_drain_fifo +EXPORT_SYMBOL_GPL vmlinux 0x42332cac pci_disable_rom +EXPORT_SYMBOL_GPL vmlinux 0x42494cea ring_buffer_event_length +EXPORT_SYMBOL_GPL vmlinux 0x4252528c ata_bmdma_start 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0x86b1667d hwrng_unregister +EXPORT_SYMBOL_GPL vmlinux 0x870404b8 crypto_chain +EXPORT_SYMBOL_GPL vmlinux 0x873fbaea edac_atomic_assert_error +EXPORT_SYMBOL_GPL vmlinux 0x87511008 cpuidle_unregister_device +EXPORT_SYMBOL_GPL vmlinux 0x875b1a24 usb_get_dev +EXPORT_SYMBOL_GPL vmlinux 0x87754115 raw_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0x879658ee crypto_lookup_template +EXPORT_SYMBOL_GPL vmlinux 0x87b9f668 firmware_kobj +EXPORT_SYMBOL_GPL vmlinux 0x87da623b input_ff_event +EXPORT_SYMBOL_GPL vmlinux 0x880b189a __atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e crypto_xor +EXPORT_SYMBOL_GPL vmlinux 0x88432a20 devm_kzalloc +EXPORT_SYMBOL_GPL vmlinux 0x885142a6 nf_net_netfilter_sysctl_path +EXPORT_SYMBOL_GPL vmlinux 0x886736fc olpc_platform_info +EXPORT_SYMBOL_GPL vmlinux 0x88696533 vfs_cancel_lock +EXPORT_SYMBOL_GPL vmlinux 0x88a18bd0 inet_csk_search_req +EXPORT_SYMBOL_GPL vmlinux 0x88a675f0 __pci_reset_function +EXPORT_SYMBOL_GPL vmlinux 0x88a67fbd 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0x8c9d686d __wake_up_sync_key +EXPORT_SYMBOL_GPL vmlinux 0x8ca19d1d seq_release_net +EXPORT_SYMBOL_GPL vmlinux 0x8ca43fe5 fuse_conn_kill +EXPORT_SYMBOL_GPL vmlinux 0x8cbe01ba crypto_grab_skcipher +EXPORT_SYMBOL_GPL vmlinux 0x8cc501ee usb_get_descriptor +EXPORT_SYMBOL_GPL vmlinux 0x8cd3b12f usb_create_hcd +EXPORT_SYMBOL_GPL vmlinux 0x8d033df4 klist_node_attached +EXPORT_SYMBOL_GPL vmlinux 0x8d55fa83 crypto_alg_lookup +EXPORT_SYMBOL_GPL vmlinux 0x8d5ce42d scsi_unregister_device_handler +EXPORT_SYMBOL_GPL vmlinux 0x8d799cba sysfs_notify_dirent +EXPORT_SYMBOL_GPL vmlinux 0x8d9e1da3 ata_sff_qc_fill_rtf +EXPORT_SYMBOL_GPL vmlinux 0x8da17b42 scatterwalk_copychunks +EXPORT_SYMBOL_GPL vmlinux 0x8dd78d25 blocking_notifier_chain_register +EXPORT_SYMBOL_GPL vmlinux 0x8e366182 blkcipher_walk_virt_block +EXPORT_SYMBOL_GPL vmlinux 0x8e679a64 __inet_lookup_listener +EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e __wake_up_sync +EXPORT_SYMBOL_GPL vmlinux 0x8ef0ff1c per_cpu__injectm +EXPORT_SYMBOL_GPL vmlinux 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pciserial_remove_ports +EXPORT_SYMBOL_GPL vmlinux 0xafc7c996 usb_unlink_anchored_urbs +EXPORT_SYMBOL_GPL vmlinux 0xafde613d driver_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xafe79e22 class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xb0223109 klist_next +EXPORT_SYMBOL_GPL vmlinux 0xb038f2cc anon_transport_class_register +EXPORT_SYMBOL_GPL vmlinux 0xb0970732 rtc_irq_set_state +EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e fips_enabled +EXPORT_SYMBOL_GPL vmlinux 0xb0afef8a crypto_shash_import +EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9 usb_wait_anchor_empty_timeout +EXPORT_SYMBOL_GPL vmlinux 0xb0fcfe23 pci_hp_change_slot_info +EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc cn_netlink_send +EXPORT_SYMBOL_GPL vmlinux 0xb1206faf skb_icv_walk +EXPORT_SYMBOL_GPL vmlinux 0xb154f2f1 bus_find_device_by_name +EXPORT_SYMBOL_GPL vmlinux 0xb172bbc5 fb_bl_default_curve +EXPORT_SYMBOL_GPL vmlinux 0xb18429eb suspend_device_irqs +EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce rcu_barrier_sched +EXPORT_SYMBOL_GPL vmlinux 0xb1c2a597 single_release_net +EXPORT_SYMBOL_GPL vmlinux 0xb1e9e2ac xfrm_audit_state_notfound +EXPORT_SYMBOL_GPL vmlinux 0xb20ae0b8 ata_bmdma_setup +EXPORT_SYMBOL_GPL vmlinux 0xb27a0280 gpiochip_add +EXPORT_SYMBOL_GPL vmlinux 0xb28e58f2 destroy_workqueue +EXPORT_SYMBOL_GPL vmlinux 0xb2b794f9 gpiochip_is_requested +EXPORT_SYMBOL_GPL vmlinux 0xb2f51137 ata_sg_init +EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9 hpet_rtc_timer_init +EXPORT_SYMBOL_GPL vmlinux 0xb34f4cb5 tcp_is_cwnd_limited +EXPORT_SYMBOL_GPL vmlinux 0xb35a5b55 inet_diag_register +EXPORT_SYMBOL_GPL vmlinux 0xb3620ecb __mmdrop +EXPORT_SYMBOL_GPL vmlinux 0xb36b7de4 put_driver +EXPORT_SYMBOL_GPL vmlinux 0xb4079420 ata_sff_qc_issue +EXPORT_SYMBOL_GPL vmlinux 0xb40837ae ata_sff_wait_after_reset +EXPORT_SYMBOL_GPL vmlinux 0xb41bf5a7 machine_check_poll +EXPORT_SYMBOL_GPL vmlinux 0xb4202653 ring_buffer_reset +EXPORT_SYMBOL_GPL vmlinux 0xb47c6310 cpufreq_frequency_table_verify +EXPORT_SYMBOL_GPL vmlinux 0xb491b6b5 inet_hashinfo_init +EXPORT_SYMBOL_GPL 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tracepoint_get_iter_range +EXPORT_SYMBOL_GPL vmlinux 0xc7a104a9 bus_sort_breadthfirst +EXPORT_SYMBOL_GPL vmlinux 0xc7b3c427 aead_geniv_init +EXPORT_SYMBOL_GPL vmlinux 0xc7da7430 __ata_ehi_push_desc +EXPORT_SYMBOL_GPL vmlinux 0xc7db6e5c ata_host_activate +EXPORT_SYMBOL_GPL vmlinux 0xc7e82899 blkdev_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6 atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xc80847a0 pci_bus_add_device +EXPORT_SYMBOL_GPL vmlinux 0xc81684b5 i2c_new_dummy +EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84 ktime_get +EXPORT_SYMBOL_GPL vmlinux 0xc87e487a sched_clock_idle_sleep_event +EXPORT_SYMBOL_GPL vmlinux 0xc87e4ef5 class_dev_iter_exit +EXPORT_SYMBOL_GPL vmlinux 0xc8e1bddc usb_hcd_platform_shutdown +EXPORT_SYMBOL_GPL vmlinux 0xc8e4bb1e da903x_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xc8eca4aa usb_autopm_put_interface +EXPORT_SYMBOL_GPL vmlinux 0xc932e73a pci_unblock_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xc9538852 ata_cable_80wire +EXPORT_SYMBOL_GPL vmlinux 0xc9561772 fb_destroy_modelist +EXPORT_SYMBOL_GPL vmlinux 0xc95c10f4 fuse_request_send +EXPORT_SYMBOL_GPL vmlinux 0xc96e6e68 sysfs_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xc970aa83 usb_sg_wait +EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1 wmi_has_guid +EXPORT_SYMBOL_GPL vmlinux 0xc9da73c7 srcu_read_lock +EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21 free_percpu +EXPORT_SYMBOL_GPL vmlinux 0xca01f51c tcp_orphan_count +EXPORT_SYMBOL_GPL vmlinux 0xca422a9c hwmon_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xca582737 debugfs_remove_recursive +EXPORT_SYMBOL_GPL vmlinux 0xca6d7cf1 fb_deferred_io_init +EXPORT_SYMBOL_GPL vmlinux 0xca7989c8 ata_sas_port_stop +EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf tracepoint_probe_update_all +EXPORT_SYMBOL_GPL vmlinux 0xca954d2e ata_sas_queuecmd +EXPORT_SYMBOL_GPL vmlinux 0xcabe04de cpuidle_resume_and_unlock +EXPORT_SYMBOL_GPL vmlinux 0xcae2bc7c ata_link_abort +EXPORT_SYMBOL_GPL vmlinux 0xcae4b7ce ipv6_dup_options +EXPORT_SYMBOL_GPL vmlinux 0xcb2071ed acpi_get_pci_dev +EXPORT_SYMBOL_GPL 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blk_abort_request +EXPORT_SYMBOL_GPL vmlinux 0xcffe159f cpufreq_frequency_table_cpuinfo +EXPORT_SYMBOL_GPL vmlinux 0xd027a07d marker_probe_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd0395818 sdio_readw +EXPORT_SYMBOL_GPL vmlinux 0xd03c7700 secure_ipv4_port_ephemeral +EXPORT_SYMBOL_GPL vmlinux 0xd03e2b67 pci_enable_sriov +EXPORT_SYMBOL_GPL vmlinux 0xd090c683 regulator_set_current_limit +EXPORT_SYMBOL_GPL vmlinux 0xd0a514e2 ip_route_output_flow +EXPORT_SYMBOL_GPL vmlinux 0xd0c05159 emergency_restart +EXPORT_SYMBOL_GPL vmlinux 0xd0e23657 kset_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0xd0e6594e ring_buffer_record_enable +EXPORT_SYMBOL_GPL vmlinux 0xd0f80c48 devres_open_group +EXPORT_SYMBOL_GPL vmlinux 0xd0fe020f __class_create +EXPORT_SYMBOL_GPL vmlinux 0xd107d717 rtc_class_close +EXPORT_SYMBOL_GPL vmlinux 0xd12ac59b olpc_ec_cmd +EXPORT_SYMBOL_GPL vmlinux 0xd16712f3 crypto_check_attr_type +EXPORT_SYMBOL_GPL vmlinux 0xd1933ebf relay_subbufs_consumed +EXPORT_SYMBOL_GPL vmlinux 0xd1a5ba39 sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xd1c00017 timed_output_dev_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd1e9613a sysfs_remove_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xd22eb90a sata_sff_hardreset +EXPORT_SYMBOL_GPL vmlinux 0xd25c6bde generic_fh_to_dentry +EXPORT_SYMBOL_GPL vmlinux 0xd270c16c platform_device_add_resources +EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1 __round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xd28a92d8 skb_to_sgvec +EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0 work_on_cpu +EXPORT_SYMBOL_GPL vmlinux 0xd2beef15 usb_hcd_pci_remove +EXPORT_SYMBOL_GPL vmlinux 0xd2fcb6c1 cpufreq_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xd32ac6c2 pci_stop_bus_device +EXPORT_SYMBOL_GPL vmlinux 0xd344e9a2 platform_device_del +EXPORT_SYMBOL_GPL vmlinux 0xd37632cc ata_sff_lost_interrupt +EXPORT_SYMBOL_GPL vmlinux 0xd42d6d16 led_trigger_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xd48dfd4f cpufreq_register_governor +EXPORT_SYMBOL_GPL vmlinux 0xd494ee54 speedstep_get_freqs +EXPORT_SYMBOL_GPL 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register_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xd866e4f0 regulator_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xd8af5a3b cpuidle_register_device +EXPORT_SYMBOL_GPL vmlinux 0xd9061fcf __sock_recv_timestamp +EXPORT_SYMBOL_GPL vmlinux 0xd945367e per_cpu__gdt_page +EXPORT_SYMBOL_GPL vmlinux 0xda073acf ata_ehi_clear_desc +EXPORT_SYMBOL_GPL vmlinux 0xda080046 rtc_update_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0xda0bd8c5 inet_csk_addr2sockaddr +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda2baf0b d_materialise_unique +EXPORT_SYMBOL_GPL vmlinux 0xda3338c7 crypto_shash_setkey +EXPORT_SYMBOL_GPL vmlinux 0xda42360e srcu_notifier_chain_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdaa18d2f module_mutex +EXPORT_SYMBOL_GPL vmlinux 0xdabc058f platform_device_register_simple +EXPORT_SYMBOL_GPL vmlinux 0xdacc4109 bus_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdadf71c8 sg_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xdae2aff1 power_supply_changed +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdaf8ea1a sata_link_debounce +EXPORT_SYMBOL_GPL vmlinux 0xdb290585 ata_bus_reset +EXPORT_SYMBOL_GPL vmlinux 0xdb40786c mnt_clone_write +EXPORT_SYMBOL_GPL vmlinux 0xdb40aced sysfs_update_group +EXPORT_SYMBOL_GPL vmlinux 0xdb5b3f4b register_pernet_device +EXPORT_SYMBOL_GPL vmlinux 0xdb6e81b8 init_user_ns +EXPORT_SYMBOL_GPL vmlinux 0xdb776fd1 pci_enable_pcie_error_reporting +EXPORT_SYMBOL_GPL vmlinux 0xdb8dc8f2 regulator_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xdbd33151 ip_local_out +EXPORT_SYMBOL_GPL vmlinux 0xdc4cbd61 root_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xdc714560 register_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xdc995e10 sdio_writesb +EXPORT_SYMBOL_GPL vmlinux 0xdcb3d709 unregister_kretprobes +EXPORT_SYMBOL_GPL vmlinux 0xdcd61e0f inet6_sk_rebuild_header +EXPORT_SYMBOL_GPL vmlinux 0xdceeee2b usb_get_status +EXPORT_SYMBOL_GPL vmlinux 0xdd212ed2 ata_eh_qc_complete +EXPORT_SYMBOL_GPL vmlinux 0xde11b29b tracepoint_iter_reset +EXPORT_SYMBOL_GPL vmlinux 0xde417b81 async_schedule_domain +EXPORT_SYMBOL_GPL vmlinux 0xde8cf3be scsi_schedule_eh +EXPORT_SYMBOL_GPL vmlinux 0xdf1f2226 inet6_destroy_sock +EXPORT_SYMBOL_GPL vmlinux 0xdf4d9a76 is_io_mapping_possible +EXPORT_SYMBOL_GPL vmlinux 0xdf8dcf21 usb_init_urb +EXPORT_SYMBOL_GPL vmlinux 0xdf933ae6 sata_async_notification +EXPORT_SYMBOL_GPL vmlinux 0xdfc8ac08 bus_rescan_devices +EXPORT_SYMBOL_GPL vmlinux 0xe0406b5a blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xe0517f88 sdio_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xe0ab831b usb_kill_urb +EXPORT_SYMBOL_GPL vmlinux 0xe0bc5dbc spi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5 mce_notify_irq +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe0d1789a usb_submit_urb +EXPORT_SYMBOL_GPL vmlinux 0xe0e47cf7 crypto_alloc_aead +EXPORT_SYMBOL_GPL vmlinux 0xe1213986 acpi_ec_add_query_handler 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0xe3f1ecb1 device_move +EXPORT_SYMBOL_GPL vmlinux 0xe413f4fe find_module +EXPORT_SYMBOL_GPL vmlinux 0xe45e962b usb_autopm_get_interface +EXPORT_SYMBOL_GPL vmlinux 0xe483a62c usb_autopm_put_interface_async +EXPORT_SYMBOL_GPL vmlinux 0xe49c0959 device_create_file +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4ab1f8c usb_set_interface +EXPORT_SYMBOL_GPL vmlinux 0xe4c331b6 acpi_os_unmap_memory +EXPORT_SYMBOL_GPL vmlinux 0xe4cedb9c tcp_done +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe50a0560 dev_attr_link_power_management_policy +EXPORT_SYMBOL_GPL vmlinux 0xe50f83be debugfs_create_size_t +EXPORT_SYMBOL_GPL vmlinux 0xe513afc0 cache_k8_northbridges +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe5a98b8e crypto_unregister_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xe5b1f8a4 pci_disable_pcie_error_reporting +EXPORT_SYMBOL_GPL vmlinux 0xe5d974cd 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0xeb1c3ec6 sysfs_create_file +EXPORT_SYMBOL_GPL vmlinux 0xeb8b5387 crypto_register_template +EXPORT_SYMBOL_GPL vmlinux 0xebf2ef2c sysfs_create_group +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec663037 crypto_alloc_instance +EXPORT_SYMBOL_GPL vmlinux 0xec81f0cd xfrm_audit_state_delete +EXPORT_SYMBOL_GPL vmlinux 0xecd1f0e8 fsstack_copy_inode_size +EXPORT_SYMBOL_GPL vmlinux 0xecef3c4a __rtnl_register +EXPORT_SYMBOL_GPL vmlinux 0xecf33d26 set_cpus_allowed_ptr +EXPORT_SYMBOL_GPL vmlinux 0xecf97b55 raw_unhash_sk +EXPORT_SYMBOL_GPL vmlinux 0xed4c9870 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xed5b6d06 da903x_update +EXPORT_SYMBOL_GPL vmlinux 0xed968476 register_net_sysctl_table +EXPORT_SYMBOL_GPL vmlinux 0xedc1211b power_supply_am_i_supplied +EXPORT_SYMBOL_GPL vmlinux 0xedc255d7 fuse_request_send_background +EXPORT_SYMBOL_GPL vmlinux 0xedd33c97 xfrm_inner_extract_output +EXPORT_SYMBOL_GPL vmlinux 0xedf3f1f1 do_machine_check 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vmlinux 0xf3aa211b unregister_ftrace_event +EXPORT_SYMBOL_GPL vmlinux 0xf3c558a2 ata_sas_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf3f40c02 usb_get_hcd +EXPORT_SYMBOL_GPL vmlinux 0xf456fefb led_trigger_set_default +EXPORT_SYMBOL_GPL vmlinux 0xf4755c4a fuse_conn_init +EXPORT_SYMBOL_GPL vmlinux 0xf478ee88 user_instantiate +EXPORT_SYMBOL_GPL vmlinux 0xf48711dd __pci_complete_power_transition +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4c39ea7 tcp_twsk_destructor +EXPORT_SYMBOL_GPL vmlinux 0xf4c6b774 sysfs_notify +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf54bcce4 inet6_csk_xmit +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf5674b3f sata_link_hardreset +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5b2b22c platform_bus +EXPORT_SYMBOL_GPL vmlinux 0xf5eed336 get_driver +EXPORT_SYMBOL_GPL vmlinux 0xf6a0272d sysfs_create_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xf6ab3fd2 dm_rh_recovery_end +EXPORT_SYMBOL_GPL vmlinux 0xf6b96351 apply_to_page_range +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6c1415a page_mkclean +EXPORT_SYMBOL_GPL vmlinux 0xf6db0c54 __scsi_get_command +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf6fb8270 inet_csk_route_req +EXPORT_SYMBOL_GPL vmlinux 0xf73892ab hid_parse_report +EXPORT_SYMBOL_GPL vmlinux 0xf7943ac9 devm_kfree +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf885acc5 __inet_hash_nolisten +EXPORT_SYMBOL_GPL vmlinux 0xf8a9b64c ring_buffer_lock_reserve +EXPORT_SYMBOL_GPL vmlinux 0xf8d7fc54 usb_altnum_to_altsetting +EXPORT_SYMBOL_GPL vmlinux 0xf8edda6c device_rename +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf8f6798a inet_hash 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+EXPORT_SYMBOL_GPL vmlinux 0xfacc5670 netlink_has_listeners +EXPORT_SYMBOL_GPL vmlinux 0xfadfc283 sk_clone +EXPORT_SYMBOL_GPL vmlinux 0xfae8f7d9 class_interface_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfb1722f6 hid_input_report +EXPORT_SYMBOL_GPL vmlinux 0xfb1ad13a ata_pci_bmdma_init +EXPORT_SYMBOL_GPL vmlinux 0xfb2a3293 math_state_restore +EXPORT_SYMBOL_GPL vmlinux 0xfb791d6c kobject_get_path +EXPORT_SYMBOL_GPL vmlinux 0xfbc34205 __inet_inherit_port +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc285357 ata_pci_device_do_suspend +EXPORT_SYMBOL_GPL vmlinux 0xfc41f66b blk_rq_check_limits +EXPORT_SYMBOL_GPL vmlinux 0xfc535494 crypto_attr_alg +EXPORT_SYMBOL_GPL vmlinux 0xfca5d50c hid_output_report +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcfeaf96 platform_device_add +EXPORT_SYMBOL_GPL vmlinux 0xfd3e6764 sdio_f0_writeb +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfdfd93bc fib_rules_unregister +EXPORT_SYMBOL_GPL vmlinux 0xfe0d2a71 ring_buffer_time_stamp +EXPORT_SYMBOL_GPL vmlinux 0xfe3c0088 bus_get_device_klist +EXPORT_SYMBOL_GPL vmlinux 0xfe870de3 crypto_shash_finup +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfe9d222d user_describe +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL vmlinux 0xff6e0042 vfs_listxattr +EXPORT_SYMBOL_GPL vmlinux 0xff8e0aa6 add_timer_on +EXPORT_SYMBOL_GPL vmlinux 0xffe909c8 fib_rules_lookup +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/ia64/ia64.modules +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/ia64/ia64.modules @@ -0,0 +1,1972 @@ +3c359 +3c574_cs +3c589_cs +3c59x +3w-9xxx +3w-xxxx +6pack +8021q +8139cp +8139too +8250 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+soc_camera +soc_camera_platform +softdog +solos-pci +soundcore +sound_firmware +sp8870 +sp887x +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_bitbang +spi_butterfly +spidev +spi_lm70llp +squashfs +sr_mod +ssb +ssfdc +st +stallion +starfire +stb6000 +ste10Xp +stex +stinger +stir4200 +stowaway +stp +stradis +strip +stv0288 +stv0297 +stv0299 +stv0900 +stv6110 +stv680 +sundance +sungem +sungem_phy +sunhme +suni +sunkbd +sunrpc +svcrdma +svgalib +sx +sx8 +sym53c500_cs +sym53c8xx +symbolserial +synaptics_i2c +synclink_cs +synclink_gt +synclinkmp +syscopyarea +sysfillrect +sysimgblt +sysv +tcm825x +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda7432 +tda8083 +tda826x +tda827x +tda8290 +tda9840 +tda9875 +tda9887 +tdfx +tdo24m +tea +tea5761 +tea5767 +tea6415c +tea6420 +tehuti +tekram-sir +tg3 +tgr192 +thermal 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+usbtest +usbtmc +usbtouchscreen +usbvideo +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-compat-ioctl32 +v4l2-int-device +vcan +ves1820 +ves1x93 +veth +vfat +vgastate +vgg2432a4 +via +via686a +viafb +via-rhine +via-sdmmc +via-velocity +vicam +video1394 +videobuf-core +videobuf-dma-sg +videobuf-dvb +videobuf-vmalloc +videocodec +videodev +virtual +visor +vitesse +vivi +vlsi_ir +vp27smpx +vpx3220 +vstusb +vsxxxaa +vt1211 +vt8231 +vt8623fb +vxge +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2760 +w1_smem +w1_therm +w83627ehf +w83627hf +w83781d +w83791d +w83792d +w83793 +w83l785ts +w90p910_ts +w9966 +w9968cf +wacom +wacom_w8001 +wanrouter +wanxl +warrior +wavelan_cs +wdt_pci +whci +whci-hcd +whc-rc +whiteheat +wimax +winbond-840 +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8739 +wm8775 +wm97xx-ts +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm_ipcomp +xfrm_user +xfs +xhci +xirc2ps_cs +xircom_cb +xor +xp +xpad +xpc +xpnet +xprtrdma +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +yam +yealink +yellowfin +yenta_socket +zatm +zc0301 +zd1201 +zd1211rw +zhenhua +zl10036 +zl10353 +zlib +zlib_deflate +zr36016 +zr36050 +zr36060 +zr36067 +zr364xx --- linux-fsl-imx51-2.6.31.orig/debian.master/abi/2.6.31-22.71/ia64/ia64 +++ linux-fsl-imx51-2.6.31/debian.master/abi/2.6.31-22.71/ia64/ia64 @@ -0,0 +1,8865 @@ +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/acpi/processor 0x01ea811f acpi_processor_unregister_performance +EXPORT_SYMBOL drivers/acpi/processor 0x4e6904ba acpi_processor_preregister_performance +EXPORT_SYMBOL drivers/acpi/processor 0x5b1f448b acpi_processor_notify_smm +EXPORT_SYMBOL drivers/acpi/processor 0xa5c3de7f acpi_processor_register_performance +EXPORT_SYMBOL drivers/acpi/processor 0xe8a3605f acpi_processor_set_thermal_limit +EXPORT_SYMBOL drivers/atm/suni 0x46ebcc0b suni_init +EXPORT_SYMBOL drivers/atm/uPD98402 0x076d95ef uPD98402_init +EXPORT_SYMBOL drivers/block/loop 0x59cb08f6 loop_register_transfer +EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL drivers/block/paride/paride 0x00a33bd0 pi_init +EXPORT_SYMBOL drivers/block/paride/paride 0x072f457a paride_unregister +EXPORT_SYMBOL drivers/block/paride/paride 0x4ab0f6b5 pi_schedule_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0x60defbd6 pi_connect +EXPORT_SYMBOL drivers/block/paride/paride 0x6b81afc1 pi_read_block +EXPORT_SYMBOL drivers/block/paride/paride 0x8e7cac7d pi_release +EXPORT_SYMBOL drivers/block/paride/paride 0x9f460e57 paride_register +EXPORT_SYMBOL drivers/block/paride/paride 0xbc7e4a9d pi_do_claimed +EXPORT_SYMBOL drivers/block/paride/paride 0xc0735f09 pi_read_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xd0471ad4 pi_disconnect +EXPORT_SYMBOL drivers/block/paride/paride 0xd661caad pi_write_regr +EXPORT_SYMBOL drivers/block/paride/paride 0xdda67121 pi_write_block +EXPORT_SYMBOL drivers/cdrom/cdrom 0x050ac76a cdrom_mode_select +EXPORT_SYMBOL drivers/cdrom/cdrom 0x38ec8d6e cdrom_mode_sense +EXPORT_SYMBOL drivers/cdrom/cdrom 0x3f06cab9 cdrom_media_changed +EXPORT_SYMBOL drivers/cdrom/cdrom 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL drivers/cdrom/cdrom 0x53b1bc6e cdrom_get_last_written +EXPORT_SYMBOL drivers/cdrom/cdrom 0x743be89e cdrom_open +EXPORT_SYMBOL drivers/cdrom/cdrom 0x7a01468c cdrom_number_of_slots +EXPORT_SYMBOL drivers/cdrom/cdrom 0x7afbcbf9 unregister_cdrom +EXPORT_SYMBOL drivers/cdrom/cdrom 0xc45ce0cd cdrom_ioctl +EXPORT_SYMBOL drivers/cdrom/cdrom 0xce34cf3a register_cdrom +EXPORT_SYMBOL drivers/cdrom/cdrom 0xe5c26eaf cdrom_release +EXPORT_SYMBOL drivers/cdrom/cdrom 0xf69045dc cdrom_get_media_event +EXPORT_SYMBOL drivers/char/agp/agpgart 0x09b03b54 agp_copy_info +EXPORT_SYMBOL drivers/char/agp/agpgart 0x1450b000 agp_backend_release +EXPORT_SYMBOL drivers/char/agp/agpgart 0x23403008 agp_generic_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0x24918c06 agp_put_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x26b59bb5 agp_generic_alloc_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x2b52553b agp_generic_destroy_page +EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf agp_device_command +EXPORT_SYMBOL drivers/char/agp/agpgart 0x330412c2 agp_alloc_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x3de42bec agp_generic_alloc_user +EXPORT_SYMBOL drivers/char/agp/agpgart 0x449ab756 agp_bind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x49264545 agp_generic_create_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf agp3_generic_configure +EXPORT_SYMBOL drivers/char/agp/agpgart 0x4c58fdc5 agp_free_page_array +EXPORT_SYMBOL drivers/char/agp/agpgart 0x520d33b6 agp_allocate_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x58060d1c agp_find_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0x5cf8a118 agp_free_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x65bcb2fd agp_generic_destroy_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e agp_bridges +EXPORT_SYMBOL drivers/char/agp/agpgart 0x6a632397 agp_unbind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132 agp_off +EXPORT_SYMBOL drivers/char/agp/agpgart 0x757dc907 agp_generic_alloc_pages +EXPORT_SYMBOL drivers/char/agp/agpgart 0x842937a2 agp_generic_type_to_mask_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x8af43eaf agp_generic_insert_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0x96769d80 agp_generic_alloc_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0x9ac300f7 agp_generic_mask_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa42a6d63 agp_generic_free_gatt_table +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6 global_cache_flush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xa8d61a76 agp_generic_free_by_type +EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0 agp_rebind_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbadac604 agp_create_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbb7653e1 agp_generic_remove_memory +EXPORT_SYMBOL drivers/char/agp/agpgart 0xbdd94110 agp_flush_chipset +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641 agp3_generic_cleanup +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc30730c1 agp_bridge +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c agp_try_unsupported_boot +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7 agp3_generic_sizes +EXPORT_SYMBOL drivers/char/agp/agpgart 0xc66371ac agp_collect_device_status +EXPORT_SYMBOL drivers/char/agp/agpgart 0xcb12e95f get_agp_version +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2 agp_free_key +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd50dadbf agp3_generic_tlbflush +EXPORT_SYMBOL drivers/char/agp/agpgart 0xd7beb018 agp_enable +EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed agp3_generic_fetch_size +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe0f67f6c agp_backend_acquire +EXPORT_SYMBOL drivers/char/agp/agpgart 0xe70f2f14 agp_alloc_page_array +EXPORT_SYMBOL drivers/char/generic_serial 0x0566a332 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x2a4e9605 gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x3a6b3f14 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0x40bc4bd0 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x449d6c27 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x49042fa9 gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0x55964e5b gs_start +EXPORT_SYMBOL drivers/char/generic_serial 0x5865b98a gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x5b97bf9e gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0x5bcc0d0c gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0x5e795aad gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xb60483fb gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xd0bcdf0c gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0xee6f808e gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0xfe09e5c1 gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0xff0904c5 gs_write_room +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0047d11f drm_mode_debug_printmodeline +EXPORT_SYMBOL drivers/gpu/drm/drm 0x01e3567d drm_gem_vm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x031e0732 drm_mode_validate_clocks +EXPORT_SYMBOL drivers/gpu/drm/drm 0x03bebd33 drm_crtc_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0413679b drm_vblank_off +EXPORT_SYMBOL drivers/gpu/drm/drm 0x05627659 drm_helper_probe_single_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06abf749 drm_crtc_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x06ddd3ee drm_agp_bind_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0778cc79 drm_mode_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c drm_sman_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0b854952 drm_connector_property_get_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0dd0b91d drm_helper_encoder_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e3b3ec3 drm_mode_create_dithering_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x10042010 drm_lock_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x11387124 drm_crtc_helper_set_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x11c284f8 drm_agp_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x12363f0d drm_ati_pcigart_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x123c01e7 drm_mode_object_find +EXPORT_SYMBOL drivers/gpu/drm/drm 0x16448e1c drm_mm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x17ad0e6f drm_put_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0x17d407e6 drm_add_edid_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x188b4243 drm_mode_attachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0x18ada934 drm_agp_chipset_flush +EXPORT_SYMBOL drivers/gpu/drm/drm 0x195e8e36 drm_mode_probed_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x197372fa drm_helper_resume_force_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ba5366f drm_mode_connector_attach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d316415 drm_helper_probe_connector_modes +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7039e8 drm_mode_vrefresh +EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59 drm_property_add_enum +EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642 drm_debug +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2079e9ad drm_vblank_count +EXPORT_SYMBOL drivers/gpu/drm/drm 0x212b5e00 drm_pci_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4 drm_sman_owner_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x21cde450 drm_rmmap_locked +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2495dd3d drm_get_resource_start +EXPORT_SYMBOL drivers/gpu/drm/drm 0x258cb8b5 drm_mode_validate_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0x279c5506 drm_core_get_reg_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63 drm_sman_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2b204249 drm_helper_crtc_in_use +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ce0b733 drm_lock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2dcb2680 drm_fasync +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903 drm_sman_free_key +EXPORT_SYMBOL drivers/gpu/drm/drm 0x2f7129af drm_free_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033 drm_order +EXPORT_SYMBOL drivers/gpu/drm/drm 0x30adc055 drm_helper_mode_fill_fb_struct +EXPORT_SYMBOL drivers/gpu/drm/drm 0x317a262d drm_helper_initial_config +EXPORT_SYMBOL drivers/gpu/drm/drm 0x39378b7c drm_sysfs_connector_add +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409 drm_ht_just_insert_please +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ca61272 drm_vblank_post_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d51b92b drm_connector_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4187a8b3 drm_encoder_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x47878516 drm_encoder_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x478f34f7 drm_gem_vm_close +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4934d03f drm_mode_set_crtcinfo +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ce5b50b drm_mode_connector_update_edid_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0x4da0dee7 drm_get_drawable_info +EXPORT_SYMBOL drivers/gpu/drm/drm 0x52678da9 drm_helper_disable_unused_functions +EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee drm_sman_set_range +EXPORT_SYMBOL drivers/gpu/drm/drm 0x571a1eba drm_helper_hotplug_stage_two +EXPORT_SYMBOL drivers/gpu/drm/drm 0x58b20498 drm_mm_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a46da83 drm_mm_put_block +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ae20209 drm_mode_create_tv_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ae23441 drm_agp_bind +EXPORT_SYMBOL drivers/gpu/drm/drm 0x5df1c853 drm_detect_hdmi_monitor +EXPORT_SYMBOL drivers/gpu/drm/drm 0x61e3def9 drm_clflush_pages +EXPORT_SYMBOL drivers/gpu/drm/drm 0x64131706 drm_connector_property_set_value +EXPORT_SYMBOL drivers/gpu/drm/drm 0x68a44f8e drm_poll +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a015b5c drm_exit +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b05eff0 drm_mode_equal +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837 drm_ut_debug_printk +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f1eca9a drm_open +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fa4f4d8 drm_framebuffer_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc90dc0 drm_get_connector_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fd2d820 drm_mode_connector_detach_encoder +EXPORT_SYMBOL drivers/gpu/drm/drm 0x702213ab drm_addbufs_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7242678d drm_addbufs_pci +EXPORT_SYMBOL drivers/gpu/drm/drm 0x798e7b3d drm_gem_object_lookup +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ac1dcba drm_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2 drm_gem_object_handle_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c2f41b4 drm_debugfs_create_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c32d53c drm_i_have_hw_lock +EXPORT_SYMBOL drivers/gpu/drm/drm 0x802a3918 drm_gem_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x82be3db6 drm_ati_pcigart_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0x84ced617 drm_vblank_pre_modeset +EXPORT_SYMBOL drivers/gpu/drm/drm 0x85b60f15 drm_irq_uninstall +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8cea6255 drm_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d4299cf drm_mode_height +EXPORT_SYMBOL drivers/gpu/drm/drm 0x98c6c4b1 drm_mmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9c7e423f drm_vblank_put +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ce9c992 drm_agp_acquire +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9cf68f2b drm_mode_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9f9930cf drm_mode_prune_invalid +EXPORT_SYMBOL drivers/gpu/drm/drm 0x9facd62b drm_agp_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa0a84c73 drm_unbind_agp +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa0fa0e16 drm_framebuffer_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa157f528 drm_agp_unbind +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87 drm_mode_list_concat +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4bef1ba drm_mode_duplicate +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa57289f0 drm_pci_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa617a3a8 drm_gem_object_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa89ab7ee drm_gem_handle_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa8b3bf2c drm_idlelock_take +EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9d3b534 drm_sg_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e drm_sman_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2e3045a drm_agp_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb3e4ad70 drm_property_destroy +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb438994b drm_get_resource_len +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb4ab231d drm_mode_connector_list_update +EXPORT_SYMBOL drivers/gpu/drm/drm 0xb58666b7 drm_mode_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb634ad1 drm_sysfs_connector_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbcd42d9c drm_mm_takedown +EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe28375a drm_idlelock_release +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc096350f drm_sysfs_hotplug_event +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2908c49 drm_do_probe_ddc_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3bc648b drm_core_ioremap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4958833 drm_mode_config_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4b70793 drm_mm_pre_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc7962ce0 drm_core_reclaim_buffers +EXPORT_SYMBOL drivers/gpu/drm/drm 0xc997faee drm_connector_cleanup +EXPORT_SYMBOL drivers/gpu/drm/drm 0xca3f31f4 drm_property_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb7f36f5 drm_connector_attach_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xcc29be26 drm_mode_create_dvi_i_properties +EXPORT_SYMBOL drivers/gpu/drm/drm 0xce396ed0 drm_rmmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75 drm_sman_set_manager +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3da1a83 drm_agp_enable +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51 drm_ht_remove +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4245b9b drm_crtc_helper_set_mode +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819 drm_core_get_map_ofs +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd747d12a drm_core_ioremap_wc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd7f38bf4 drm_mode_config_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9c675cc drm_agp_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc20a7b5 drm_core_ioremapfree +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd30a7ef drm_mode_width +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2 drm_gem_object_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c drm_ht_insert_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xdedb6b64 drm_vblank_get +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe0924f27 drm_debugfs_remove_files +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735 drm_ht_remove_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88 drm_ht_find_item +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3bfcef5 drm_mode_crtc_set_gamma_size +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe811de79 drm_get_dev +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8700bff drm_vblank_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c drm_sman_owner_clean +EXPORT_SYMBOL drivers/gpu/drm/drm 0xea5d9709 drm_init +EXPORT_SYMBOL drivers/gpu/drm/drm 0xebd7c998 drm_helper_connector_dpms +EXPORT_SYMBOL drivers/gpu/drm/drm 0xedfb6d7f drm_mm_get_block_generic +EXPORT_SYMBOL drivers/gpu/drm/drm 0xee1efa65 drm_getsarea +EXPORT_SYMBOL drivers/gpu/drm/drm 0xefb6d612 drm_addmap +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13 drm_mode_sort +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1f6c38e drm_compat_ioctl +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf326e55e drm_mode_create_scaling_mode_property +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26 drm_ht_create +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf5628ef9 drm_mode_detachmode_crtc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xf6739a2d drm_get_edid +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfde7d1c9 drm_mm_search_free +EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19 drm_sman_alloc +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff341e00 drm_handle_vblank +EXPORT_SYMBOL drivers/gpu/drm/drm 0xff420674 drm_mode_set_name +EXPORT_SYMBOL drivers/gpu/drm/drm 0xffba2764 drm_irq_install +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x47cce304 i2c_pca_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xdbd7e7c5 i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xd185d1a8 amd756_smbus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x03701fad hpsb_alloc_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06f5c8aa __hpsb_register_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x08c79fa9 hpsb_iso_xmit_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e dma_prog_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0f872b73 hpsb_make_lock64packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x11b09b08 hpsb_send_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548 dma_region_offset_to_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1602efbe hpsb_iso_xmit_sync +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a csr1212_release_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1b012887 hpsb_iso_recv_set_channel_mask +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1e920137 hpsb_iso_xmit_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x26bb5e5a hpsb_make_streampacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x27de9cbc hpsb_get_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b csr1212_attach_keyval_to_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a dma_prog_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2f978159 hpsb_iso_stop +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x398700fb hpsb_iso_recv_release_packets +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ad94b22 hpsb_set_packet_complete_task +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3bbcba17 hpsb_register_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3be4e257 hpsb_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3fad39c6 hpsb_iso_recv_flush +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x439b3dac hpsb_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x46638e5c hpsb_selfid_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x471dc21e hpsb_iso_n_ready +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x481f0dae hpsb_resume_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4 csr1212_get_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770 csr1212_parse_keyval +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4dc209e7 hpsb_alloc_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4e148d51 hpsb_protocol_class +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f20c69c hpsb_free_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51d1a2fb hpsb_iso_shutdown +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x532c8f79 hpsb_iso_recv_start +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x550892f6 hpsb_set_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5c2317e3 hpsb_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f csr1212_new_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x666fd92c hpsb_make_writepacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148 dma_region_sync_for_device +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x67d76d20 hpsb_allocate_and_register_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47 csr1212_read +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x69462e25 hpsb_iso_recv_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x696337bd hpsb_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6ea2fb88 hpsb_iso_wake +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71b3b2f0 hpsb_unregister_addrspace +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c dma_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76c73823 hpsb_update_config_rom_image +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76ce7970 hpsb_free_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x788cee25 hpsb_make_lockpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b9a5330 hpsb_node_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7e25253d hpsb_set_hostinfo_key +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x850f2075 hpsb_bus_reset +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0 dma_region_sync_for_cpu +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312 dma_region_alloc +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94390333 hpsb_iso_recv_listen_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x99fc9137 hpsb_update_config_rom +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa14e7da8 hpsb_make_phypacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa734505e hpsb_get_hostinfo_bykey +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7b3445a hpsb_selfid_complete +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa80cc5d2 hpsb_destroy_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xabcac259 hpsb_iso_xmit_queue_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5 csr1212_detach_keyval_from_directory +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb380e905 dma_region_mmap +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbe7e0060 hpsb_iso_packet_sent +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbfba7432 hpsb_unregister_highlevel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc393f586 hpsb_remove_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc5e33830 hpsb_lock +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc794b811 hpsb_reset_bus +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b dma_prog_region_free +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd265439e hpsb_unregister_protocol +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd38e15de hpsb_get_tlabel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd93632c8 hpsb_iso_recv_unlisten_channel +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdc979bbf hpsb_add_host +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe029a7bf hpsb_iso_packet_received +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe35965cf hpsb_read_cycle_timer +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff dma_region_init +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xed140eab hpsb_write +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf8995c1e hpsb_make_readpacket +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf9af7a5d hpsb_node_fill_packet +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfa9258c3 hpsb_create_hostinfo +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51 hpsb_speedto_str +EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xffbdb74b hpsb_packet_success +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x01bd8b97 ohci1394_unregister_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc ohci1394_init_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcd22ad8a ohci1394_register_iso_tasklet +EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xd4c87e7e ohci1394_stop_context +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x063e80b1 rdma_addr_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x0a2c0fb0 rdma_resolve_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x26dc8261 rdma_addr_cancel +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x27e7882e rdma_copy_addr +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x922b8b81 rdma_translate_ip +EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9f7b5224 rdma_addr_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x19de09da ib_cm_notify +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2a88d950 ib_send_cm_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x37f93e0c ib_send_cm_drep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x472027ad ib_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5d1cd5bc ib_send_cm_rtu +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x75dc31f1 ib_send_cm_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x764d3d85 ib_send_cm_mra +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x78bbe3a5 ib_send_cm_dreq +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7aff23b8 ib_send_cm_sidr_rep +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7ddf068a ib_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x87fc6c43 ib_send_cm_apr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa9051c1b ib_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdc12fb76 ib_send_cm_lap +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xde8403df cm_class +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdfb263bf ib_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xed3aa82c ib_send_cm_sidr_req +EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf525a655 ib_send_cm_rej +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a ib_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x114d9016 ib_destroy_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x116a3158 ib_rereg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x147bd802 ib_alloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b1c37fd ib_query_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1cfe33cc ib_fmr_pool_map_phys +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04 ib_unmap_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x243f81ba ib_dealloc_pd +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2717873a ib_dealloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2aa5dfb5 ib_create_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d620b6f ib_query_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3278d450 ib_query_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x333e5270 ib_modify_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x346dd7a8 ib_modify_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3940db35 ib_free_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3a5bae0b ib_find_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3c196195 ib_find_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd ib_rate_to_mult +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ae64901 ib_create_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4cf3f372 ib_flush_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5400384a ib_get_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55a74743 ib_alloc_fast_reg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c581eb2 ib_find_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5d30e892 ib_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x621e5c12 ib_alloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x662a65c8 ib_find_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x674e74ef ib_modify_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b70b9b8 ib_dereg_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x702fa894 ib_init_ah_from_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7277bfd5 ib_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x787dcebc ib_create_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7911bab6 ib_query_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7d889c30 ib_create_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x81212745 ib_register_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x83bae925 ib_dealloc_mw +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb ib_modify_qp_is_ok +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8 ib_ud_header_pack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x89358614 ib_modify_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x91f634eb ib_unregister_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x92398f5a ib_unregister_event_handler +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46 rdma_node_get_transport +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9b6ab051 ib_get_cached_pkey +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9c492f13 ib_dealloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1 mult_to_ib_rate +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa13eee73 ib_set_client_data +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa3d003f7 ib_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa654926f ib_query_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa7cce1e4 ib_resize_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa7e8d67c ib_get_dma_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3362af3 ib_alloc_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3eccd5e ib_modify_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb520069a ib_get_cached_gid +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbae62fc5 ib_query_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbd4845d7 ib_destroy_srq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc20c2220 ib_detach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc53c333b ib_attach_mcast +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc7998bda ib_register_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc9a02cbd ib_alloc_fast_reg_page_list +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca85158b ib_get_cached_lmc +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd9a0496 ib_modify_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcddec1cd ib_alloc_fmr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcf30530d ib_reg_phys_mr +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcf7a5b42 ib_fmr_pool_unmap +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1 ib_ud_header_init +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdbda1b12 ib_query_device +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdf906d78 ib_create_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe6df3c77 ib_destroy_ah +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe82fe301 ib_destroy_cq +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xef030be4 ib_create_fmr_pool +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9 ib_ud_header_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de ib_unpack +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfb1e4375 ib_query_port +EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfed2aad1 ib_dispatch_event +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x03551230 ib_post_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0f821ba3 ib_redirect_mad_qp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x113411e8 ib_unregister_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1ecd8a23 ib_free_recv_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x250f4c54 ib_get_rmpp_segment +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3d038e55 ib_create_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5ff7b17f ib_cancel_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed ib_response_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf ib_get_mad_data_offset +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a ib_is_mad_class_rmpp +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x80f448a0 ib_register_mad_agent +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa4322d3e ib_register_mad_snoop +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbf84a6ca ib_free_send_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe0d3cc1b ib_process_mad_wc +EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xfb3a6d6a ib_modify_mad +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x3a3dbe71 ib_init_ah_from_path +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac ib_sa_free_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7d977e2c ib_sa_unregister_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x836b9491 ib_sa_path_rec_get +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8c293fc1 ib_init_ah_from_mcmember +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x92d34866 ib_sa_register_client +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa8816926 ib_sa_get_mcmember_rec +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb64f0825 ib_sa_service_rec_query +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf2f98b22 ib_sa_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xfc2381bc ib_sa_cancel_query +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x190d25de iw_cm_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x4a3a3ad8 iw_cm_connect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5685c8c2 iw_destroy_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6a87d0e5 iw_create_cm_id +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbd6cd106 iw_cm_reject +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc751eea4 iw_cm_listen +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xd9918f2e iw_cm_disconnect +EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xee69f5b8 iw_cm_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x080ba5eb rdma_disconnect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x10ae36a9 rdma_listen +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x28aac209 rdma_create_id +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x28e58249 rdma_notify +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2b486715 rdma_create_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x358e1e2e rdma_resolve_route +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x46ccef19 rdma_set_service_type +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4bdb14c1 rdma_resolve_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x67c5d257 rdma_accept +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6d97aaaf rdma_set_ib_paths +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7540d98b rdma_connect +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7617dac3 rdma_destroy_qp +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8a73a333 rdma_reject +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8a9d50aa rdma_bind_addr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa9e0e722 rdma_join_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd9d749ee rdma_init_qp_attr +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe618a9bb rdma_leave_multicast +EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf2244f86 rdma_destroy_id +EXPORT_SYMBOL drivers/input/gameport/gameport 0x07b48068 gameport_set_phys +EXPORT_SYMBOL drivers/input/gameport/gameport 0x4e69e82c gameport_start_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x72eaf021 gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x84ed285c gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x9f1f9726 __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0xa79501e7 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0xb8556dae gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0xbe32c9d4 gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0xfa7a2fc7 gameport_unregister_driver +EXPORT_SYMBOL drivers/input/input-polldev 0x2bcc8685 input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xaa7999cd input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xadb1bf17 input_unregister_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xc7ecb161 input_free_polled_device +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x053015fc capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x454de3b9 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8318bbfc capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x94b8fecd attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa4734d90 detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa8ebea1d capi20_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaf308bfa capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb3931cec capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xbc76e25e capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe6e5b086 capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfdcb3012 capi20_register +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xb0f3367a register_isdn +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x075542d2 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x18095283 create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1987828f l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x25572a6f mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2b6d238c mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2c295a32 confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x32302803 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3d2ce576 recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x45457cbc recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x570afdd6 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6435002f queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7781f45a get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x80af72b8 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8b7650b1 mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8d0198fd dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaac27cbc mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb71d97ae get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbf04ea6d mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc4e4797d recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd43cba36 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe34b578c recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/md/dm-log 0x546dcd55 dm_dirty_log_create +EXPORT_SYMBOL drivers/md/dm-log 0x9da6243a dm_dirty_log_destroy +EXPORT_SYMBOL drivers/md/dm-log 0xb9611f98 dm_dirty_log_type_register +EXPORT_SYMBOL drivers/md/dm-log 0xd0b91962 dm_dirty_log_type_unregister +EXPORT_SYMBOL drivers/md/dm-mod 0x0ce2a856 dm_put_device +EXPORT_SYMBOL drivers/md/dm-mod 0x19f89be3 dm_kcopyd_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x24d29835 dm_io_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0x24fd6906 dm_io_client_destroy +EXPORT_SYMBOL drivers/md/dm-mod 0x27e14e00 dm_io_client_resize +EXPORT_SYMBOL drivers/md/dm-mod 0x3ba89b39 dm_table_put +EXPORT_SYMBOL drivers/md/dm-mod 0x3e7ffec4 dm_table_get_size +EXPORT_SYMBOL drivers/md/dm-mod 0x4ffc5055 dm_get_mapinfo +EXPORT_SYMBOL drivers/md/dm-mod 0x505420da dm_table_get_mode +EXPORT_SYMBOL drivers/md/dm-mod 0x51dd09a8 dm_table_get +EXPORT_SYMBOL drivers/md/dm-mod 0x5ae78e03 dm_get_device +EXPORT_SYMBOL drivers/md/dm-mod 0x95a62771 dm_table_event +EXPORT_SYMBOL drivers/md/dm-mod 0x97fb7c85 dm_table_get_md +EXPORT_SYMBOL drivers/md/dm-mod 0xacb74a6c dm_io +EXPORT_SYMBOL drivers/md/dm-mod 0xb0c9cfd0 dm_kcopyd_copy +EXPORT_SYMBOL drivers/md/dm-mod 0xb75cc827 dm_unregister_target +EXPORT_SYMBOL drivers/md/dm-mod 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL drivers/md/dm-mod 0xcbc9b7c2 dm_table_unplug_all +EXPORT_SYMBOL drivers/md/dm-mod 0xce5323e8 dm_kcopyd_client_create +EXPORT_SYMBOL drivers/md/dm-mod 0xe0ae3bce dm_register_target +EXPORT_SYMBOL drivers/md/dm-snapshot 0x19ff13aa dm_exception_store_type_register +EXPORT_SYMBOL drivers/md/dm-snapshot 0x1d3322be dm_exception_store_create +EXPORT_SYMBOL drivers/md/dm-snapshot 0xb96141d3 dm_exception_store_destroy +EXPORT_SYMBOL drivers/md/dm-snapshot 0xbbf06c87 dm_exception_store_type_unregister +EXPORT_SYMBOL drivers/md/md-mod 0x025f6fa5 md_set_array_sectors +EXPORT_SYMBOL drivers/md/md-mod 0x0787116c bitmap_startwrite +EXPORT_SYMBOL drivers/md/md-mod 0x110534f4 bitmap_close_sync +EXPORT_SYMBOL drivers/md/md-mod 0x211526c9 md_check_no_bitmap +EXPORT_SYMBOL drivers/md/md-mod 0x29327d50 md_integrity_add_rdev +EXPORT_SYMBOL drivers/md/md-mod 0x2bba7920 md_check_recovery +EXPORT_SYMBOL drivers/md/md-mod 0x3f648bc9 md_done_sync +EXPORT_SYMBOL drivers/md/md-mod 0x496db790 md_write_start +EXPORT_SYMBOL drivers/md/md-mod 0x60125021 bitmap_endwrite +EXPORT_SYMBOL drivers/md/md-mod 0x61d962db md_error +EXPORT_SYMBOL drivers/md/md-mod 0x6365c4a9 bitmap_unplug +EXPORT_SYMBOL drivers/md/md-mod 0x766688a0 bitmap_start_sync +EXPORT_SYMBOL drivers/md/md-mod 0x97c0bb4a md_register_thread +EXPORT_SYMBOL drivers/md/md-mod 0x9e32126c bitmap_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0xb7ba7c97 md_unregister_thread +EXPORT_SYMBOL drivers/md/md-mod 0xba21ca48 md_integrity_register +EXPORT_SYMBOL drivers/md/md-mod 0xc1cff62c md_wait_for_blocked_rdev +EXPORT_SYMBOL drivers/md/md-mod 0xc7c49076 unregister_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0xcbd58734 bitmap_cond_end_sync +EXPORT_SYMBOL drivers/md/md-mod 0xd0253adb register_md_personality +EXPORT_SYMBOL drivers/md/md-mod 0xf8f58d6a md_write_end +EXPORT_SYMBOL drivers/md/md-mod 0xfa006e83 md_wakeup_thread +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xa20f2f7c raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x0e4b85ce mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x08a3f3fe mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x132b9e1e mt2131_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x2919c7af mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xb6a2e035 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x60382d46 qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x5d2f01fa xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x21824408 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x02e8b20c flexcop_dma_allocate +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0dd8ffd3 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x16933e66 flexcop_dma_free +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x19892200 flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x20d53b94 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x29943d56 flexcop_dma_xfer_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x35e1df43 flexcop_dma_control_timer_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3ed89f82 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5f642545 flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x67762552 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x67b46e40 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x836c171b flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x97d2f6bf flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa4077047 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb46bc1d9 flexcop_dma_control_size_irq +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb5d3647f flexcop_dma_config +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbfd74b09 flexcop_dma_config_timer +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd10ae57c flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd3a8e541 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe100c361 flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x334f12ad bt878_stop +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x3b7d8ae8 bt878_device_control +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xbc0f093e bt878_start +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef bt878_num +EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf0a9590f bt878 +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x2b94e3ff dst_attach +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x43c55de9 dst_error_bailout +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4a1d6da9 rdc_reset_state +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x53098f5c dst_wait_dst_ready +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5f5331d1 dst_error_recovery +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x84f11830 write_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8ef2efe7 dst_pio_disable +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x94351a25 dst_comm_init +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc124d820 read_dst +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c dst_check_sum +EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x05df4d59 dst_ca_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0116a76e dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x01b85957 dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x07d298c1 dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x083008fc dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x12ac9225 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e6bc91c dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x32a2d839 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x37b8afb3 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x44500bab dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4dc74624 dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5449b6e0 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6ce6e06d dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6d3aedd3 dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x70accb4b dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x72ba8711 dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x876477bd dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x89f81a19 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8bc49b52 dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x965be2e4 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa31783e1 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb01adba0 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb26796e0 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbaafc41a dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbf984694 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc7aa66b0 dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb40c7f6 dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdb467738 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe3e711d9 dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe610f5cd dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7fe90ba dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2a25a19 dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf8e852b2 dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf97944a1 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x10867ff8 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x35e772e5 dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x4f244b57 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x53cd70a3 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x68ed6016 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8a412dc2 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xfbdf9391 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x6955e3a7 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1bdb89b7 dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2f0be539 dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3b7c88bb dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3c22017c dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3e226fe7 dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x47c5f02a dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6c799e90 dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x74514e3d dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x902bc9b1 dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd26ef367 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe49075a3 dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0xeb018cc5 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x14b695cd au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x0947d368 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xbf5f5100 cx22700_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xb387ee5e cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x4dee83cf cx24110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x7c7b30ce cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x9a8002e1 cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xc415964e cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x4acacda6 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x99b4375e cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x7310cc92 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xab01da2c dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x22820f76 dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x28e08675 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x35d9aa83 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x59eb9f00 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x7e22989f dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x96875104 dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb2ec9145 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x5705117c dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x9401c8d3 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3c6e3ef1 dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x403a51db dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x51d8bf1e dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x7b3adaae dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x9fed2206 dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xee72ac80 dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x4d6e2113 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x9d0698d3 dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xef05a590 dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x704cb179 dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x44aaf09f isl6405_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0xcdb35cfc isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x6cb50377 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x681f9d4c l64781_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xa0a9a8a2 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xb1d3b67e lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0x419ee220 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xbdc15465 lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xe6b725f3 lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x4801e154 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xd0fca2bc mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xf79a2142 nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xc44632ae nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xe7d38a03 or51132_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x5862e400 or51211_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xbe242ff7 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x1c4fbdf0 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x40e5b5a8 s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x42dbccd9 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xbd5b43f5 si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x995695d4 sp8870_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x4fdedda8 sp887x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x197f55fd stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xa20fe54d stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xa93ca343 stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x86c1e164 stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x77b6761a stv0900_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x2d62a8ad stv6110_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x6ccd9511 tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xb33c4631 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xcbc6808f tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x55087fb4 tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x5fb38ad4 tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x7febef13 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x90995835 tda8083_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x224dd51f tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xc3d49898 ves1820_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x19e20c01 ves1x93_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x119528d8 zl10036_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xcaa21207 zl10353_attach +EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x7fa453b3 ttpci_eeprom_parse_mac +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xcb46f45a ttusbdecfe_dvbs_attach +EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xe081f590 ttusbdecfe_dvbt_attach +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d bttv_gpio_enable +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc bttv_write_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x9c9c1914 bttv_sub_unregister +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb bttv_read_gpio +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xd890a8f8 bttv_get_pcidev +EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xf01a3b6c bttv_sub_register +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x44c00353 btcx_riscmem_free +EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c btcx_calc_skips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b btcx_sort_clips +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6 btcx_align +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xca7a2d2d btcx_riscmem_alloc +EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2 btcx_screen_clips +EXPORT_SYMBOL drivers/media/video/cpia 0x89b4b202 cpia_register_camera +EXPORT_SYMBOL drivers/media/video/cpia 0x9b47a0aa cpia_unregister_camera +EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d cx18_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x0693193d cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xe062ee94 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x07af587e vp3054_i2c_probe +EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x769d0b52 vp3054_i2c_remove +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x03d94f08 cx88_set_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x174f80a3 cx88_get_control +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4dd3573f cx88_enum_input +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x5bdc6a13 cx88_set_freq +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x79a81155 cx88_video_mux +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9 cx88_user_ctrls +EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xc9d52881 cx8800_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x44df4aa8 cx8802_register_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x56f3f6eb cx8802_cancel_buffers +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xae352841 cx8802_get_device +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xcde1978b cx8802_unregister_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd1ef850b cx8802_buf_queue +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd32704fa cx8802_buf_prepare +EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xe135a52a cx8802_get_driver +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x00e289e6 cx88_risc_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x13e429ed cx88_sram_channel_setup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1a27c2bd cx88_core_irq +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2874f2e2 cx88_vdev_init +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2c1d5fc9 cx88_core_get +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2f0fb00b cx88_shutdown +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x47f381ba cx88_ir_start +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4b0b7efb cx88_set_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5 cx88_tuner_callback +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x69bea6fd cx88_wakeup +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6f9c11d6 cx88_sram_channel_dump +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x80ddec5b cx88_set_tvnorm +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x885124ab cx88_get_stereo +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696 cx88_audio_thread +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x92b71f51 cx88_risc_stopper +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff cx88_sram_channels +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa285ce7d cx88_set_scale +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb288e535 cx88_free_buffer +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda cx88_print_irqbits +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xba58423c cx88_newstation +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbd3e3fa8 cx88_core_put +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbff4190e cx88_reset +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc581c17d cx88_set_tvaudio +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xce83090a cx88_ir_stop +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf299279f cx88_dsp_detect_stereo_sap +EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf8c86a09 cx88_risc_databuffer +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x0af259a8 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x7a61983b em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x041a0d88 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x113f1366 gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x28e5412f gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x360cb066 gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9bb1a11e gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa7cbbd59 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf14595f8 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x12b5a583 ivtv_api +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530 ivtv_debug +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x349e5ee3 ivtv_vapi +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x89ce75ca ivtv_reset_ir_gpio +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8fac9eba ivtv_udma_setup +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x902bb530 ivtv_udma_prepare +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb875ccd0 ivtv_init_on_first_open +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb9d1f038 ivtv_vapi_result +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xc5fa1048 ivtv_udma_unmap +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd372b432 ivtv_clear_irq_mask +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfbe6a749 ivtv_udma_alloc +EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfd9e5ac8 ivtv_set_irq_mask +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446 saa7134_tuner_callback +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d saa7134_devlist +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6 saa7134_boards +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1f32eaf8 saa7134_pgtable_alloc +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x52063030 saa7134_pgtable_build +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x74a56daf saa7134_ts_register +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8421bd31 saa7134_devlist_lock +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x84b68803 saa7134_pgtable_free +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9852e0d2 saa7134_set_gpio +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc090ae7a saa7134_set_dmabits +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdfb67fc4 saa_dsp_writel +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe3708150 saa7134_ts_unregister +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xecf4deb1 saa7134_dmasound_init +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfd41301b saa7134_dmasound_exit +EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfe138fc6 saa7134_tvaudio_setmute +EXPORT_SYMBOL drivers/media/video/soc_camera 0x2505b22e soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0x52fb1fef soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x66252592 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x6ac2056f soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0x99c840dc soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xcc268bd6 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xe2b2e817 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xebf0fd90 soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0xffad0f62 soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/tveeprom 0x7d82f099 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/tveeprom 0xb1a52a21 tveeprom_read +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x1d34cb3c usbvideo_Deregister +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x23ecbae1 RingQueue_Enqueue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x24cf15c0 usbvideo_RegisterVideoDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x47f8c63f usbvideo_register +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5a5d61ae usbvideo_AllocateDevice +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5e1d70f4 RingQueue_WakeUpInterruptible +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xd5112b23 RingQueue_Dequeue +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xd6d88ca9 usbvideo_DeinterlaceFrame +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xe8c93cc3 usbvideo_TestPattern +EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf4dcb853 RingQueue_Flush +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x27c541cb v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x19343d70 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc8ffc2ae v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x21122978 videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x413d8ce4 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4a173dc9 videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x65ad8dac videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6d5a1385 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7450ed35 videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x08bad94a video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0x0d256420 video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x1a886d58 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x43837c15 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x785c07fb video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x7cc1a7ff video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x9bfa06fc video_register_device_index +EXPORT_SYMBOL drivers/media/video/videodev 0xa9205756 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0xac16b283 video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4c52e2b0 videocodec_attach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x792d5055 videocodec_register +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x9a7e07e5 videocodec_detach +EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xa75663cd videocodec_unregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x19831ff6 mpt_raid_phys_disk_pg1 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x334e79f1 mpt_alloc_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x35a8efa8 mpt_print_ioc_summary +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b mpt_event_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x486ce4aa mpt_HardResetHandler +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4f063a9f mpt_put_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0 mpt_fwfault_debug +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5033ee0c mpt_detach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x54514fed mpt_free_fw_memory +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x56f74b91 mpt_set_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x58ddda47 mpt_suspend +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5e3f6eb0 mptbase_sas_persist_operation +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6170fd10 mpt_send_handshake_request +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6aeebecd mpt_halt_firmware +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7b160c61 mpt_reset_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7ea58aee mpt_attach +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8a54f987 mpt_get_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8e3ee488 mpt_device_driver_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8f36f5e1 mpt_findImVolumes +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xafd878d5 mpt_verify_adapter +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb4e047e5 mpt_raid_phys_disk_get_num_paths +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb7f11024 mpt_raid_phys_disk_pg0 +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82 mpt_device_driver_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8 mpt_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc9e2a130 mpt_clear_taskmgmt_in_progress_flag +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcd5f33be mpt_register +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcee61490 mpt_GetIocState +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd051c224 mpt_put_msg_frame_hi_pri +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd2506975 mpt_config +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75 mpt_reset_deregister +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xda5574e3 mpt_free_msg_frame +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159 ioc_list +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe9923718 mpt_resume +EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfb3d8098 mpt_event_register +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x05d4454e mptscsih_bios_param +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x080fbe77 mptscsih_resume +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x131efa5c mptscsih_is_phys_disk +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1354eeb6 mptscsih_change_queue_depth +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x55ed3372 mptscsih_host_attrs +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x55f1fae1 mptscsih_IssueTaskMgmt +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x628d9ca3 mptscsih_shutdown +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6b08f1c6 mptscsih_slave_configure +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6e9caede mptscsih_bus_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x70c5efcb mptscsih_taskmgmt_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7456eb46 mptscsih_slave_destroy +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7509dd0a mptscsih_host_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x764ddf1a mptscsih_timer_expired +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x765b2ce4 mptscsih_proc_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x86fe4778 mptscsih_scandv_complete +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x89d7d888 mptscsih_dev_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8ce26918 mptscsih_remove +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9b4ef1c7 mptscsih_ioc_reset +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa6f1f5ce mptscsih_io_done +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb9cfdb5f mptscsih_get_scsi_lookup +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd8d7c2a8 mptscsih_event_process +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xda8f69fa mptscsih_abort +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdbff2925 mptscsih_raid_id_to_num +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xde747617 mptscsih_qcmd +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdecbe2d1 mptscsih_taskmgmt_response_code +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe5d8e89d mptscsih_info +EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf6b75237 mptscsih_suspend +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x06ae397c i2o_cntxt_list_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1a96871a i2o_driver_notify_controller_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1d23fb22 i2o_parm_field_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1e3bf648 i2o_driver_notify_device_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef i2o_dump_message +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x30f3e73c i2o_driver_notify_device_remove_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x328005a2 i2o_parm_issue +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3fc8c5cc i2o_driver_notify_controller_add_all +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5042f328 i2o_device_claim_release +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x54281f1d i2o_device_claim +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x65bda6c4 i2o_iop_find_device +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7392d6d3 i2o_msg_post_wait_mem +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x76b5d439 i2o_parm_table_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x831f815e i2o_status_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x942b4304 i2o_driver_unregister +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x94e4a9bc i2o_driver_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x96b5732b i2o_find_iop +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa6ac85bd i2o_cntxt_list_add +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb0506559 i2o_exec_lct_get +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb44867bb i2o_event_register +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf i2o_controllers +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc1456bb5 i2o_cntxt_list_get_ptr +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd51a9549 i2o_cntxt_list_remove +EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd74d122c i2o_msg_get_wait +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x03cfe6a9 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x08482200 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x08b0173f ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x50f5b068 ab3100_event_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x86c6ccab ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8767b670 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xcd38780a ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xddb82ed4 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x390bc24c pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xdeb28cf7 pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x63e1f6f7 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xeb4710cf mfd_remove_devices +EXPORT_SYMBOL drivers/misc/c2port/core 0x3723d73e c2port_device_register +EXPORT_SYMBOL drivers/misc/c2port/core 0x454d106e c2port_device_unregister +EXPORT_SYMBOL drivers/misc/ioc4 0x673def85 ioc4_unregister_submodule +EXPORT_SYMBOL drivers/misc/ioc4 0xb88b83eb ioc4_register_submodule +EXPORT_SYMBOL drivers/misc/tifm_core 0x127d3592 tifm_has_ms_pif +EXPORT_SYMBOL drivers/misc/tifm_core 0x134f370a tifm_register_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x13d4810e tifm_free_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x2e30e913 tifm_add_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x55165ee5 tifm_alloc_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0x6c4f765a tifm_unregister_driver +EXPORT_SYMBOL drivers/misc/tifm_core 0x894914a8 tifm_unmap_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x9117a5ed tifm_map_sg +EXPORT_SYMBOL drivers/misc/tifm_core 0x97be405f tifm_free_device +EXPORT_SYMBOL drivers/misc/tifm_core 0xa22fe65e tifm_remove_adapter +EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284 tifm_queue_work +EXPORT_SYMBOL drivers/misc/tifm_core 0xd2b0b55f tifm_eject +EXPORT_SYMBOL drivers/misc/tifm_core 0xef2f411c tifm_alloc_device +EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x5bdb2de7 mmc_cleanup_queue +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x22fcf517 mmc_set_data_timeout +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2302b12a mmc_add_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x304035f1 mmc_suspend_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3f3a09f3 mmc_wait_for_app_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x52302e4f __mmc_claim_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x66f031b7 mmc_wait_for_req +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x67c8cb1f mmc_request_done +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7684aeb7 mmc_register_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x78754252 mmc_detect_change +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x80c42e7e mmc_release_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa0510c74 mmc_free_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa641631c mmc_align_data_size +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb338a2fc mmc_remove_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xbb5b4383 mmc_alloc_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc278b5a2 mmc_unregister_driver +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc9ea7ebe mmc_wait_for_cmd +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf35553e2 mmc_resume_host +EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x6c97d3da cfi_varsize_frob +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x96284f6b cfi_fixup +EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x9ce771bc cfi_read_pri +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x201a594f do_map_probe +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x5bf663c7 map_destroy +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xe7df44d2 register_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xf40c416d unregister_mtd_chip_driver +EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xc60ab05a mtd_do_chip_probe +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xf7681af4 lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xbace1901 simple_map_init +EXPORT_SYMBOL drivers/mtd/mtd 0x0fb7ecb1 add_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtd 0xbfd456fc del_mtd_partitions +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x072fcf43 mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x4019ab2e mtd_concat_create +EXPORT_SYMBOL drivers/mtd/nand/nand 0x415d550b nand_scan_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand 0xf7bd1850 nand_default_bbt +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x5034dbe9 nand_correct_data +EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb6ca4b6a nand_calculate_ecc +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x0c1d6b65 onenand_scan_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x0fbb4f02 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x607d5963 onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa7872c9e flexonenand_region +EXPORT_SYMBOL drivers/net/8390 0x3ad3cb40 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0x3df3adc6 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x4b7c9505 ei_open +EXPORT_SYMBOL drivers/net/8390 0x531b386e ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0x8f9ffd4e ei_poll +EXPORT_SYMBOL drivers/net/8390 0x9a170d65 NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xaef053f8 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0xc1c11fb5 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xcfa01193 ei_close +EXPORT_SYMBOL drivers/net/8390 0xdcbf167f ei_get_stats +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078 arcnet_interrupt +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2e4342c5 alloc_arcdev +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x3c86ee74 arcnet_send_packet +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x61bf045f arc_proto_map +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a arcnet_debug +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x69a3a0d9 arc_bcast_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x74d17f38 arc_raw_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x8d75a3c8 arcnet_close +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x9f8adcbc arcnet_unregister_proto +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xacaa6526 arcnet_open +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc07f8c05 arcnet_timeout +EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd5621630 arc_proto_default +EXPORT_SYMBOL drivers/net/arcnet/com20020 0x621705c3 com20020_found +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc2158e33 com20020_netdev_ops +EXPORT_SYMBOL drivers/net/arcnet/com20020 0xe624e717 com20020_check +EXPORT_SYMBOL drivers/net/bnx2 0x1708338f bnx2_cnic_probe +EXPORT_SYMBOL drivers/net/cnic 0x05ae1cba cnic_register_driver +EXPORT_SYMBOL drivers/net/cnic 0x636af174 cnic_unregister_driver +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x027f790b cxgb3_queue_tid_release +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x060a1a43 cxgb3_free_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x066159fe cxgb3_insert_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0b4753ff t3_l2t_get +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0f0090f1 cxgb3_alloc_atid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x13a20f3a dev2t3cdev +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1d144f12 cxgb3_alloc_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2e6d94f7 cxgb3_ofld_send +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x69dd19c0 cxgb3_register_client +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6bd62876 t3_l2t_send_event +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x88753ef7 t3_l2t_send_slow +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x96580270 t3_l2e_free +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9d1f4823 t3_register_cpl_handler +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb757725b cxgb3_free_stid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe010256f cxgb3_remove_tid +EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf85bc9d1 cxgb3_unregister_client +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x1b546271 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x25af3ca5 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x56a66978 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x88a24063 hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xd538c546 hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x1f8aa7d9 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x21142509 irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x393c9637 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5a9a3dd8 sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x68bc93ee sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6be4e198 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9200b30c sirdev_set_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb01790bb sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd736a4a9 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf92b7e04 sirdev_put_instance +EXPORT_SYMBOL drivers/net/mdio 0x0f934475 mdio45_ethtool_gset_npage +EXPORT_SYMBOL drivers/net/mdio 0x22bce513 mdio_mii_ioctl +EXPORT_SYMBOL drivers/net/mdio 0x43e4defc mdio45_nway_restart +EXPORT_SYMBOL drivers/net/mdio 0x7577f992 mdio_set_flag +EXPORT_SYMBOL drivers/net/mdio 0xa1a29548 mdio45_probe +EXPORT_SYMBOL drivers/net/mdio 0xb34a7575 mdio45_ethtool_spauseparam_an +EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f mdio45_links_ok +EXPORT_SYMBOL drivers/net/mii 0x133efe17 mii_check_media +EXPORT_SYMBOL drivers/net/mii 0x1fb6525b mii_ethtool_sset +EXPORT_SYMBOL drivers/net/mii 0x3474ebe6 mii_link_ok +EXPORT_SYMBOL drivers/net/mii 0x36796b7d generic_mii_ioctl +EXPORT_SYMBOL drivers/net/mii 0x505136f4 mii_check_gmii_support +EXPORT_SYMBOL drivers/net/mii 0xaa7064c4 mii_check_link +EXPORT_SYMBOL drivers/net/mii 0xb40fff3b mii_ethtool_gset +EXPORT_SYMBOL drivers/net/mii 0xea4c1449 mii_nway_restart +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x60c39bb4 free_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xf06a9dc5 alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/ppp_generic 0x10a8df52 ppp_unregister_compressor +EXPORT_SYMBOL drivers/net/ppp_generic 0x515a9b94 ppp_unit_number +EXPORT_SYMBOL drivers/net/ppp_generic 0x6b59b3ad ppp_unregister_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0x97074a21 ppp_register_net_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xb7b48421 ppp_register_channel +EXPORT_SYMBOL drivers/net/ppp_generic 0xd809993c ppp_input_error +EXPORT_SYMBOL drivers/net/ppp_generic 0xe0c35276 ppp_output_wakeup +EXPORT_SYMBOL drivers/net/ppp_generic 0xe8e26b31 ppp_input +EXPORT_SYMBOL drivers/net/ppp_generic 0xedd7af33 ppp_channel_index +EXPORT_SYMBOL drivers/net/ppp_generic 0xfdbe417c ppp_register_compressor +EXPORT_SYMBOL drivers/net/pppox 0x0e0fedeb register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0x41e91935 pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x7ce4ba9d pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/slhc 0x0ff2b602 slhc_compress +EXPORT_SYMBOL drivers/net/slhc 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL drivers/net/slhc 0xa63d85ab slhc_remember +EXPORT_SYMBOL drivers/net/slhc 0xb5ca1c46 slhc_free +EXPORT_SYMBOL drivers/net/slhc 0xdfc5169b slhc_init +EXPORT_SYMBOL drivers/net/slhc 0xe8794ce1 slhc_toss +EXPORT_SYMBOL drivers/net/sungem_phy 0x971bf81f mii_phy_probe +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x10b2074e tms380tr_netdev_ops +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x4182e627 tms380tr_close +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xb45532c0 tmsdev_term +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794 tms380tr_wait +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e tms380tr_interrupt +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd764d898 tms380tr_open +EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xdbe3e545 tmsdev_init +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725 cycx_intr +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea cycx_setup +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6 cycx_down +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6 cycx_peek +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de cycx_poke +EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576 cycx_exec +EXPORT_SYMBOL drivers/net/wan/hdlc 0x06979c21 hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0x11c53852 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0x12d1e22a unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3efe975e unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x875a06b0 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9ff74336 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xb442d72f attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xbd26c2c1 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0xe64b643b register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf1362275 hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0xfd7a5b0a hdlc_open +EXPORT_SYMBOL drivers/net/wireless/airo 0x4430f424 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0x6ba8ec42 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xf700633c init_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xa93a1c15 ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xc54a3b16 ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/atmel 0x18c3c0c9 atmel_open +EXPORT_SYMBOL drivers/net/wireless/atmel 0xad322111 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xe9097482 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x018eb3f2 hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x15bfb127 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3118fb61 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4e11c1c4 hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5069c5c9 hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x580406e7 hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5d5b05ed hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x606b8763 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7c7b8b5c hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x82c1daf7 hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8a471244 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x912a16aa hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa801468b hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa819f602 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xafba0928 hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbcd31c7c hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc127b4f1 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc916f683 hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xce05b289 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe335de3a hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xed292de0 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf21d1c29 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf4cbb7fc hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf502465d hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf66afc91 hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x004c3a56 ieee80211_wx_get_scan +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0242f408 ieee80211_set_geo +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0b6c88e2 ieee80211_is_valid_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x164325a1 ieee80211_freq_to_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3209ac35 ieee80211_rx_mgt +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x66836edc free_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6b03b2ce alloc_ieee80211 +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x71391b0f ieee80211_txb_free +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7591b680 ieee80211_channel_to_freq +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7bc914b6 ieee80211_wx_set_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x83d4e789 ieee80211_channel_to_index +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x91e8182d ieee80211_wx_set_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9e3dea5c ieee80211_change_mtu +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa4cb86e0 ieee80211_rx +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbe5583ff ieee80211_networks_age +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcb47df46 ieee80211_wx_get_encode +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd204987e ieee80211_xmit +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe69d1d1f ieee80211_get_channel +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfd99cfdd ieee80211_wx_get_encodeext +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfdf32707 ieee80211_get_channel_flags +EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfe277607 ieee80211_get_geo +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03fa827c iwl_disable_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0668f081 iwl_init_sensitivity +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07f93a67 iwl_remove_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07fcb0b9 iwl_uninit_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08452ce4 iwl_send_lq_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x094d55e4 iwl_tx_cmd_complete +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09aa6262 iwl_dump_nic_error_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a0f6cea iwl_irq_handle_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a60018e iwlcore_eeprom_acquire_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bef2146 iwl_rx_pm_debug_statistics_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1018dc95 iwl_mac_reset_tsf +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1306398b iwl_fill_probe_req +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x135251e7 iwlcore_eeprom_release_semaphore +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x13b22a33 iwl_tx_skb +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x154994cc iwl_setup_rx_scan_handlers +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15b5ef03 iwl_set_flags_for_band +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15f95dac iwl_setup_scan_deferred_work +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ccfae96 iwl_mac_get_tx_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399 iwl_bcast_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1df9b358 iwl_sta_rx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e2287f8 iwl_txq_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f20f804 iwl_scan_initiate +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f85380d iwl_send_cmd_pdu +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x219057b0 iwl_disable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2326a696 iwl_send_static_wepkey_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x23f8cb7b iwlcore_free_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26a0978f iwl_enable_interrupts +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2753278d iwl_rx_csa +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x289b4017 iwl_rx_queue_update_write_ptr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2991f3b8 iwl_verify_ucode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b7cc5f1 iwl_reset_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2dd08b8e iwl_rx_reply_compressed_ba +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2fc4cc0a iwl_full_rxon_required +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ffa8958 iwl_txq_ctx_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32e818ff iwl_hw_txq_ctx_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e iwl_bg_scan_check +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36366ff6 iwl_is_monitor_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x377771f3 iwl_set_decrypted_flag +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39c61ce0 iwl_send_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3abe206b iwl_set_rxon_hwcrypto +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b9aa6fa iwl_set_rxon_ht +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x405b0c61 iwl_mac_add_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4068a60d iwl_set_rxon_chain +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46353b5c iwl_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4675f0fc iwl_init_drv +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46cd0043 iwl_rx_missed_beacon_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4894be9c iwl_alloc_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a2020ab iwl_set_dynamic_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a3acab7 iwl_rf_kill_ct_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c096ecd iwl_rx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4caee7b5 iwl_cmd_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d7d20ff iwl_rxon_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d7ff652 iwl_mac_beacon_update +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ed44f29 iwl_rxq_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51ebc661 iwl_tx_agg_stop +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x523c9b0b iwl_scan_cancel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908 iwl_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5abde831 iwl_send_scan_abort +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5adece36 iwl_leds_register +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b806d09 iwl_power_update_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c18f228 iwl_reset_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c2d3444 iwl_rx_reply_rx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702 iwl_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6117270e iwlcore_init_geos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62cee9b2 iwl_get_passive_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x64e2f97f iwl_hw_detect +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x660bb282 iwl_reset_run_time_calib +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66b26ee9 iwl_sta_tx_modify_enable_tid +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66b7f09f iwl_mac_remove_interface +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66f7f9c2 iwl_bss_info_changed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x677dd22e iwl_eeprom_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4 iwl_bg_abort_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c657047 iwl_send_bt_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d606e01 iwl_connection_init_rx_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x716e98a6 iwl_init_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x719668f9 iwl_pci_resume +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7713fa32 iwl_send_calib_results +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7730b505 iwlcore_eeprom_query_addr +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61 iwl_isr_legacy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78c09cf4 iwl_eeprom_check_version +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78de7208 iwl_clear_isr_stats +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7bdb4626 iwl_send_cmd_sync +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83ae1d22 iwl_rx_pm_sleep_notif +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83d5ac7a iwl_rx_queue_reset +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83f66b84 iwl_scan_cancel_timeout +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d iwl_hwrate_to_plcp_idx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x896efd23 iwl_mac_conf_tx +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x906c5b7d iwl_tx_queue_free +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9223ff9f iwl_leds_background +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93370c0f iwl_rx_statistics +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x933d8f84 iwl_free_channel_map +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93d7cdd5 iwl_sensitivity_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94198a6c iwl_rx_queue_restock +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94780bcd iwl_clear_stations_table +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94bda56c iwl_remove_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9579c222 iwl_rx_reply_error +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95bb54a9 iwlcore_eeprom_verify_signature +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x976472a1 iwl_rate_get_lowest_plcp +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x994f563d iwl_send_card_state +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x99c32ef5 iwl_power_set_user_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a217c46 iwl_set_rxon_channel +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9be952ff iwl_get_free_ucode_key_index +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c09dbad iwl_activate_qos +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c4b52e5 iwl_add_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d39c7e2 iwl_mac_hw_scan +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d6351e4 iwl_send_add_sta +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9dc0ff61 iwl_rx_replenish_now +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e144e4d iwl_set_tx_power +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e1e3a9b iwl_send_statistics_request +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e521c7d iwl_dump_nic_event_log +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57 iwl_calib_set +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa114b8d3 iwl_get_channel_info +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1f29c31 iwl_rx_reply_rx_phy +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa31584c9 iwl_set_mode +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6a048fc iwl_eeprom_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7fc2d66 iwl_remove_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaa251d5f iwl_setup_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae26fe01 iwl_hw_nic_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xafeb6981 iwl_free_isr_ict +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb0d8cded iwl_configure_filter +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb110104d iwl_leds_unregister +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb491e64c iwl_hwrate_to_tx_control +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb626502c iwl_alloc_all +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb67ffda2 iwl_get_ra_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb7b91924 iwl_eeprom_query16 +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbade7e83 iwl_send_cmd_pdu_async +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc01a12c iwl_set_hw_params +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30 iwl_bg_scan_completed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931 get_cmd_string +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcc0565f3 iwl_sta_rx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd7323f2 iwl_find_station +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcfd648b1 iwl_rx_queue_alloc +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd33371f7 iwl_check_rxon_cmd +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3c84c59 iwl_tx_agg_start +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3dda153 iwl_mac_config +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6014fea iwl_get_active_dwell_time +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0f7d156 iwl_txq_check_empty +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe308c17e iwl_pci_suspend +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe51be02e iwl_tx_queue_reclaim +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70 iwl_rates +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeb6c06be iwl_eeprom_get_mac +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xecfcfc90 iwl_chain_noise_calibration +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee379306 iwl_rx_replenish +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee58e060 iwl_power_initialize +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1e99cc7 iwl_is_fat_tx_allowed +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf2c3011d iwl_rx_queue_space +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf90553db iwl_get_sta_id +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfab15557 iwl_update_tkip_key +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc1dd4b6 iwl_tx_queue_init +EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xffc6310c iwl_set_default_wep_key +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x081fbfc3 free_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x16b0a444 orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x17dff432 alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x762d6676 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x917ad06b __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/parport/parport 0x00eab2e2 parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x1eee2b77 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0x32a285d8 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0x34637209 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x39de7bf0 parport_release +EXPORT_SYMBOL drivers/parport/parport 0x401cafc3 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x470c7a53 parport_read +EXPORT_SYMBOL drivers/parport/parport 0x470de7fd parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x4b4948e9 parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x6231d48e parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x66c0bacf parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x7020d965 parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x72a0d5f0 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0x810b4b8e parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x82bee4af parport_write +EXPORT_SYMBOL drivers/parport/parport 0x8cba89c8 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0x90af8e91 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0x9c68d23d parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x9ca5ce9e parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xa0dd7fba parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0xa59f9a19 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0xab7b8dbf parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0xaca154d8 parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xbd1fbb30 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/parport/parport 0xcc2b7249 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0xcf3d3b4e parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0xd7d50557 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xdc80405f parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0xe7c83b1f parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xff200506 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport_pc 0x4a284fb5 parport_pc_probe_port +EXPORT_SYMBOL drivers/parport/parport_pc 0x62f92ab4 parport_pc_unregister_port +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4011e3a1 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x449e0537 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5da9848d pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5dce91a9 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x68e61c91 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6d605b6e pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8fc57b5b pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x920d21d3 pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa409a945 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb184b252 pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc53282d4 pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc7e68732 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd8722e45 pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xda5b1749 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe8484bfb pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0e8f863d pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0f25bdb3 release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x17b68e88 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x24986edd pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2f4a6458 pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x361af0c6 pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x37129c6b pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3a51fb41 pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4677808d pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x519caea0 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5b769327 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5eae6021 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x685d1ac0 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x74f98533 pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x76781dbf pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x81014c48 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8251b5f7 pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x91b34369 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x995f6bb0 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9d725f95 pcmcia_eject_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa71f4d51 pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa7437229 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa8465784 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa883feca pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaaa5b120 pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb20e6dfa pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb533d105 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc698d684 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd5509139 pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdcdc6bd5 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe50db2c3 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf623d666 pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfde2fb21 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x288403fd pccard_nonstatic_ops +EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952 pps_unregister_source +EXPORT_SYMBOL drivers/pps/pps_core 0x74d48dba pps_register_source +EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116 pps_event +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4b8c2f9c fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4dc2da44 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x572225f3 fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbe1130d6 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xc9cf4259 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xceb1ebbb fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf8f9a16a fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0727487e fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x09bc5f74 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0addfea7 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0db17a9b fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1252967a fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x130bc24f fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x16d5c560 fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27a989e4 fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x29401753 fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x29dc3dd5 fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3223e46a fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3539a758 fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x35883b86 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x388be9ee fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x40628659 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x47fde76c fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4818ef78 fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4e8bca38 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x57d9da26 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x594d73d7 fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5de45473 fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x691944ec fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75e67564 fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7a1cb1bf __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7a9d4e80 fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9a149566 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9e171c78 fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1ae5e11 fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1ca3e41 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbaae5955 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcaece2a1 fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd4a4e6e6 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd579ef75 fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xddf1879f fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe0b20558 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe6ce081e fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeecea5ca fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf49bb204 fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf52452be fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7050a86 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf73592c9 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x0da119f3 mraid_mm_register_adp +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e mraid_mm_adapter_app_handle +EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d mraid_mm_unregister_adp +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x011b6898 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0bb35e6a osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x19686163 osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1ca36b65 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x32ce8f09 osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x342ebee7 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3592871a osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3bc60e6f osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4d60f5f5 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5fc529a8 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x69886f13 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6c601377 osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x723b8feb osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x735a687c osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7c3e23b1 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x82c692c9 osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8a05c519 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8aeb04f9 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9bdc5f21 osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa054a046 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa132436a osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa1687545 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb8392415 osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbcdbcdeb osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc27f88c9 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc41fd91c osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xda5a08ee osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdd578941 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe2a4d39b osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe645cc1a osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe71dc313 osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeec5d320 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/osd 0x0c792e20 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xb7614a82 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0xce6e6a2c osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x0d79e33d qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x42233db1 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6be27c68 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x993d7be5 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb6f3a2de qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe31bca5c qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x70b43de9 raid_class_attach +EXPORT_SYMBOL drivers/scsi/raid_class 0xa0e5433c raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0xdef99d90 raid_class_release +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x014eec91 scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x06a44f59 scsi_eh_restore_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c0753a2 scsicam_bios_param +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c32c76a scsi_unblock_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0cef82ab scsi_host_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0d21fb0e scsi_reset_provider +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0d587710 scsi_host_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0ea24e30 scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1054c024 scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11b59fdb __scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1421118d scsi_scan_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1749f728 __starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x17896e69 scsi_remove_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1aef14f5 scsi_set_medium_removal +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1d9b63ee __scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28b718eb scsi_target_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x29fd5216 scsi_block_when_processing_errors +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2cd78647 scsi_adjust_queue_depth +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x30a35840 scsi_register_interface +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x311560fb scsi_execute_req +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x31d03162 scsi_init_io +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x33e8e3d5 scsi_scan_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x373c6b7e scsi_eh_prep_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3d154e50 scsi_report_bus_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3d8b97ea scsi_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x42f8a024 __scsi_iterate_devices +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x45856248 scsi_host_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4a34bcd1 scsi_report_device_reset +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x54213fc7 scsi_free_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56eb6d39 scsi_eh_finish_cmd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x638d26d7 scsi_device_get +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x63b054c3 scsi_device_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x646ca0ff scsi_nonblockable_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x668caf04 scsi_calculate_bounce_limit +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6c291def scsi_device_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x71273861 scsi_setup_fs_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x75f2afe4 scsi_device_resume +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x76c352e6 scsi_command_normalize_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x78295142 scsi_register_driver +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7a4dc237 starget_for_each_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7f700e2f scsi_target_quiesce +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x802ae42b scsi_host_alloc +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8551537a __scsi_alloc_queue +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x88118488 scsi_is_target_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8f193f13 scsi_block_requests +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x90055358 scsi_dma_map +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x93a47d3f scsi_prep_return +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9aa6901f scsi_put_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9c66af5b scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9f80e411 scsi_prep_fn +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa0dc98f1 __scsi_add_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa226ecd5 scsi_unregister +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa3f67650 scsi_release_buffers +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa4943a60 scsi_prep_state_check +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa706e832 scsi_mode_sense +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa81d96fa scsi_bios_ptable +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa86f4d7f scsi_free_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xadfa3754 scsi_ioctl +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaf3dd7dc scsi_logging_level +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb210c7b8 scsi_device_lookup_by_target +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb70925e6 scsi_add_host_with_dma +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb781d365 scsi_test_unit_ready +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb894cd68 scsi_rescan_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbb67d279 scsi_allocate_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbd68c653 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc3d53909 scsi_print_result +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xce3bf6b9 __scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcfd3ba0f scsi_register +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd0c15948 scsi_get_device_flags_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe00f989f scsi_track_queue_full +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe2637468 scsi_remove_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe55bb4be scsi_device_lookup +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe59c8370 scsi_dma_unmap +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe791e651 scsi_host_set_state +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe91965d5 scsi_is_host_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe91ea65b scsi_get_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a int_to_scsilun +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xed88218e scsi_execute +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xed9e1cd0 scsi_finish_command +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xee1f7b11 scsi_is_sdev_device +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf212668b scsi_get_host_dev +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf4528073 scsi_kmap_atomic_sg +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf59630ee scsi_device_put +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x00fbb106 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x19eb839b fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1b9f9659 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1d3a04f4 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2560421a scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x48985105 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x606ed5e2 scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8a22bf4a fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbac6c4b8 fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe3f79f32 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe8d6d9cc fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf61c1f01 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x04e8df84 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x063645d8 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x27f5c313 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3293db6e sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x42c64327 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x58f18df2 sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6aaeae49 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x72d0c03e sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x762dfe92 sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x772d326c sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7883f0fe sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9116e99e sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x94307e86 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x96513aad sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa6a985a0 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xad4d1afb sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb52eaaf7 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbc478e55 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc379fc9b sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc3d58f63 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4237a0e sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc7136584 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc726a41d sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdd817a68 sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xecc233b1 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf83bcd9f sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x0f5e8b2e spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3e325725 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x44fccf65 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7a2857b7 spi_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xdeceacd3 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/serial/8250 0xc4f47f9c serial8250_register_port +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/serial/serial_core 0x1f1d6e68 uart_suspend_port +EXPORT_SYMBOL drivers/serial/serial_core 0x1f8a807f uart_get_baud_rate +EXPORT_SYMBOL drivers/serial/serial_core 0x32e3f80b uart_get_divisor +EXPORT_SYMBOL drivers/serial/serial_core 0x3b362e0b uart_resume_port +EXPORT_SYMBOL drivers/serial/serial_core 0x5f554093 uart_unregister_driver +EXPORT_SYMBOL drivers/serial/serial_core 0x709a98ce uart_remove_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0x728af70d uart_update_timeout +EXPORT_SYMBOL drivers/serial/serial_core 0x9322c118 uart_match_port +EXPORT_SYMBOL drivers/serial/serial_core 0xab080821 uart_add_one_port +EXPORT_SYMBOL drivers/serial/serial_core 0xd9e63e86 uart_write_wakeup +EXPORT_SYMBOL drivers/serial/serial_core 0xefca54d3 uart_register_driver +EXPORT_SYMBOL drivers/ssb/ssb 0x0fd14143 ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x127f572b ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x26c0535a ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x309f053d ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0x354de8a1 ssb_device_enable +EXPORT_SYMBOL drivers/ssb/ssb 0x4b3c31bb ssb_pcihost_register +EXPORT_SYMBOL drivers/ssb/ssb 0x65c8513e ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0x8841131c ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x93bc61d3 ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0x976616e6 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0xaa85393d ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0xabc332bf ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0xb3ff7d7c ssb_pcicore_dev_irqvecs_enable +EXPORT_SYMBOL drivers/ssb/ssb 0xba1d2668 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xc7fe7aae __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0xd30fe35f ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xe78c024f ssb_bus_pcibus_register +EXPORT_SYMBOL drivers/ssb/ssb 0xeeabbff1 ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xef7d4c54 ssb_bus_unregister +EXPORT_SYMBOL drivers/telephony/ixj 0x882f238a ixj_pcmcia_probe +EXPORT_SYMBOL drivers/telephony/phonedev 0x93d811a7 phone_register_device +EXPORT_SYMBOL drivers/telephony/phonedev 0xe821ef5e phone_unregister_device +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x2bb88fec thermal_zone_device_register +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x45b88158 thermal_zone_unbind_cooling_device +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x9a5ab1b9 thermal_cooling_device_register +EXPORT_SYMBOL drivers/thermal/thermal_sys 0xae357a76 thermal_zone_bind_cooling_device +EXPORT_SYMBOL drivers/thermal/thermal_sys 0xb40a9525 thermal_zone_device_unregister +EXPORT_SYMBOL drivers/thermal/thermal_sys 0xc2409980 thermal_zone_device_update +EXPORT_SYMBOL drivers/thermal/thermal_sys 0xd12ceb34 thermal_cooling_device_unregister +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x1329d6d5 usb_gadget_unregister_driver +EXPORT_SYMBOL drivers/usb/gadget/net2280 0x985a945a usb_gadget_register_driver +EXPORT_SYMBOL drivers/usb/gadget/net2280 0xb66be972 net2280_set_fifo_mode +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x35edec55 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x817eac52 usb_serial_resume +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xb1268d3b usb_serial_suspend +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x45ddcc28 lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xa6b333de lcd_device_register +EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5 cyber2000fb_detach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x4b93dfd8 cyber2000fb_attach +EXPORT_SYMBOL drivers/video/cyber2000fb 0x567c18ac cyber2000fb_get_fb_var +EXPORT_SYMBOL drivers/video/cyber2000fb 0xda69e68a cyber2000fb_enable_extregs +EXPORT_SYMBOL drivers/video/cyber2000fb 0xf0e89bd4 cyber2000fb_disable_extregs +EXPORT_SYMBOL drivers/video/display/display 0x82c38907 display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0xfeb42f81 display_device_register +EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62 mac_vmode_to_var +EXPORT_SYMBOL drivers/video/macmodes 0x1fb488dc mac_find_mode +EXPORT_SYMBOL drivers/video/macmodes 0xe2304303 mac_map_monitor_sense +EXPORT_SYMBOL drivers/video/output 0x0c3507d3 video_output_unregister +EXPORT_SYMBOL drivers/video/output 0xe39b9458 video_output_register +EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e sis_malloc +EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0 sis_free +EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9 svga_set_default_seq_regs +EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30 svga_wseq_multi +EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a svga_check_timings +EXPORT_SYMBOL drivers/video/svgalib 0x278948bc svga_settile +EXPORT_SYMBOL drivers/video/svgalib 0x5a516104 svga_tilecursor +EXPORT_SYMBOL drivers/video/svgalib 0x5b769947 svga_tilefill +EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1 svga_set_default_crt_regs +EXPORT_SYMBOL drivers/video/svgalib 0x710a9969 svga_get_caps +EXPORT_SYMBOL drivers/video/svgalib 0x752c3c2e svga_tilecopy +EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959 svga_wcrt_multi +EXPORT_SYMBOL drivers/video/svgalib 0x80408443 svga_set_timings +EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b svga_set_textmode_vga_regs +EXPORT_SYMBOL drivers/video/svgalib 0x95b83977 svga_get_tilemax +EXPORT_SYMBOL drivers/video/svgalib 0x9a6ec414 svga_tileblit +EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad svga_set_default_gfx_regs +EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1 svga_set_default_atc_regs +EXPORT_SYMBOL drivers/video/svgalib 0xec83c473 svga_match_format +EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d svga_compute_pll +EXPORT_SYMBOL drivers/video/syscopyarea 0x764ef9d2 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0xf6ab03f7 sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x08db703e sys_imageblit +EXPORT_SYMBOL drivers/video/vgastate 0x686de290 restore_vga +EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e save_vga +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x61e5c75e w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xeaa8d684 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0d1347bb w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x115dac6a w1_ds2760_write +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x2f69c842 w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xeb1165b5 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/wire 0x31dd7b00 w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0x4a163d36 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0x80cd1293 w1_register_family +EXPORT_SYMBOL drivers/w1/wire 0xe53cfb2b w1_unregister_family +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc iTCO_vendor_check_noreboot_on +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44 iTCO_vendor_pre_keepalive +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894 iTCO_vendor_pre_set_heartbeat +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac iTCO_vendor_pre_start +EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320 iTCO_vendor_pre_stop +EXPORT_SYMBOL fs/configfs/configfs 0x15414e46 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0x1a3598a3 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0x617c5c30 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0x61af72da configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x649df622 config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x8eeae8b7 config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0xb04040be config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0xc2cd994c configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0xd3a44095 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xda2d7ea2 config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xec533214 config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0xed2aaec6 configfs_depend_item +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x0917f850 __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x0a00dc4e fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x1129dbdd __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0x2e15a3b7 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x2f6e783a __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0x31db08c2 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x359c3723 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x36bfcf53 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x44c8a2f3 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0x489f4aed __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4c75ddc9 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x5198d7da fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0x688ddcda fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0x7007a01d __fscache_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x7dd548ce __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x891814b5 fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0x8cdf00b4 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x98abb06e fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xaa54885b __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb608c6e8 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xbf0273f1 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xce87d1a3 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xe64e7a25 fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0xe7fc6f9a fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0xeb7722c3 __fscache_update_cookie +EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533 nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4 nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/quota/quota_tree 0x08b4ec3a qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x60b2281e qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x7fe17299 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0x836eed8f qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x92a4c824 qtree_read_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x651c2313 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62 crc_itu_t +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-t10dif 0x782acba5 crc_t10dif +EXPORT_SYMBOL lib/crc7 0xc086bfba crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8023 0x45a4441c make_8023_client +EXPORT_SYMBOL net/802/p8023 0xbb5197c9 destroy_8023_client +EXPORT_SYMBOL net/9p/9pnet 0x01506fcf p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x0958f104 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x0a108697 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0x24a18da2 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x2be898fc p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0x3c58ca4d p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51 p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x46fca9a3 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x4a002bee p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0x4d5fc6da p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x4e3389e1 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x60d96897 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0x6d942660 p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x6f186d3a p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x7ddd5507 p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x8fd31a98 p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x9228aa53 p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0x9308e027 p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa7a1fc1d p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0xa7b0954f p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0xbb80b089 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xc791a0b2 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0xcf7fb7d7 v9fs_register_trans +EXPORT_SYMBOL net/9p/9pnet 0xd097cf08 p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xe8a36712 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0xee0e855a p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0xf485c4d9 p9_client_read +EXPORT_SYMBOL net/appletalk/appletalk 0x2b7909a9 atrtr_get_dev +EXPORT_SYMBOL net/appletalk/appletalk 0x50ad2877 aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0x57a165f5 atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0xc6da58ba alloc_ltalkdev +EXPORT_SYMBOL net/atm/atm 0x0104e12a vcc_insert_socket +EXPORT_SYMBOL net/atm/atm 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL net/atm/atm 0x1eb9b930 deregister_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x2923da43 vcc_sklist_lock +EXPORT_SYMBOL net/atm/atm 0x2cc2d52d vcc_hash +EXPORT_SYMBOL net/atm/atm 0x37e3ab75 atm_alloc_charge +EXPORT_SYMBOL net/atm/atm 0x3c870e67 register_atm_ioctl +EXPORT_SYMBOL net/atm/atm 0x44937481 atm_init_aal5 +EXPORT_SYMBOL net/atm/atm 0x862d9f0c atm_dev_deregister +EXPORT_SYMBOL net/atm/atm 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL net/atm/atm 0x8f385e00 atm_proc_root +EXPORT_SYMBOL net/atm/atm 0xac892cad atm_dev_lookup +EXPORT_SYMBOL net/atm/atm 0xdc60ad1e atm_dev_register +EXPORT_SYMBOL net/atm/atm 0xf2671321 atm_charge +EXPORT_SYMBOL net/atm/atm 0xf2aa89cf vcc_release_async +EXPORT_SYMBOL net/atm/atm 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL net/ax25/ax25 0x234e306e ax25_header_ops +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x5e2cab4e ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x6b4241b2 ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x7064a058 ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0x788c74ea ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0x95c24c9a ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0xa23705d7 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xbf18b7ff ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xc8f0240a ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/bluetooth/bluetooth 0x0450b7fd bt_accept_enqueue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x08889379 bt_sock_register +EXPORT_SYMBOL net/bluetooth/bluetooth 0x0c5aa32a bt_sock_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x2355c6ec hci_conn_change_link_key +EXPORT_SYMBOL net/bluetooth/bluetooth 0x2540d477 hci_conn_put_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0x2f3243d3 hci_suspend_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x43fc2797 hci_conn_switch_role +EXPORT_SYMBOL net/bluetooth/bluetooth 0x44b2e8dd hci_unregister_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0x55705942 hci_alloc_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0x595926fb hci_register_proto +EXPORT_SYMBOL net/bluetooth/bluetooth 0x60aa8084 hci_send_sco +EXPORT_SYMBOL net/bluetooth/bluetooth 0x61fb6bee bt_sock_poll +EXPORT_SYMBOL net/bluetooth/bluetooth 0x68f258d8 bt_accept_unlink +EXPORT_SYMBOL net/bluetooth/bluetooth 0x6e62ca03 hci_conn_security +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae bt_err +EXPORT_SYMBOL net/bluetooth/bluetooth 0x714bea00 bt_accept_dequeue +EXPORT_SYMBOL net/bluetooth/bluetooth 0x78d011fd hci_send_acl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x7c21a363 bt_sock_ioctl +EXPORT_SYMBOL net/bluetooth/bluetooth 0x8341f82f bt_sock_link +EXPORT_SYMBOL net/bluetooth/bluetooth 0x8bf68828 hci_register_cb +EXPORT_SYMBOL net/bluetooth/bluetooth 0x8c259caa hci_conn_check_link_mode +EXPORT_SYMBOL net/bluetooth/bluetooth 0x90dcb049 bt_sock_recvmsg +EXPORT_SYMBOL net/bluetooth/bluetooth 0x94f3c937 hci_resume_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xa0365c76 hci_conn_hold_device +EXPORT_SYMBOL net/bluetooth/bluetooth 0xa280b477 hci_connect +EXPORT_SYMBOL net/bluetooth/bluetooth 0xb16bb72b bt_sock_wait_state +EXPORT_SYMBOL net/bluetooth/bluetooth 0xbb05c1fd hci_unregister_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0 batostr +EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551 baswap +EXPORT_SYMBOL net/bluetooth/bluetooth 0xd2289fb2 hci_free_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xdd56ad8f hci_register_dev +EXPORT_SYMBOL net/bluetooth/bluetooth 0xdf9912bd hci_recv_fragment +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf02b1e4b hci_get_route +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db bt_sock_unregister +EXPORT_SYMBOL net/bluetooth/bluetooth 0xf431f873 hci_unregister_cb +EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88 l2cap_load +EXPORT_SYMBOL net/bridge/bridge 0x3541f5b6 br_should_route_hook +EXPORT_SYMBOL net/can/can 0x0e8dc47e can_rx_register +EXPORT_SYMBOL net/can/can 0x33a49da3 can_send +EXPORT_SYMBOL net/can/can 0x42f687ba can_rx_unregister +EXPORT_SYMBOL net/can/can 0xb9e4cb71 can_proto_unregister +EXPORT_SYMBOL net/can/can 0xcf389967 can_proto_register +EXPORT_SYMBOL net/ieee802154/nl802154 0x4c764259 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x649cb72b ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x81c256fa ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x872dd730 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xf35985e2 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xf3885419 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x02fc4604 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x69040b4a arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xe2645e56 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x52860c71 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc77c1a28 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xf91a9db1 ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x0f09f1f6 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x92d61ab4 nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa9416e3e nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xc22dcc12 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd8b0e0ee nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xea5c65a5 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xed5f1eb2 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/tunnel4 0x4af0f587 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv4/tunnel4 0x73f71738 xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv6/ipv6 0x01070cd9 ipv6_chk_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL net/ipv6/ipv6 0x0dd6d537 compat_ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x0f9018fe xfrm6_rcv_spi +EXPORT_SYMBOL net/ipv6/ipv6 0x1d2c3506 compat_ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x1ed38378 ndisc_mc_map +EXPORT_SYMBOL net/ipv6/ipv6 0x290173f4 ndisc_send_rs +EXPORT_SYMBOL net/ipv6/ipv6 0x2c1e7c56 ip6_frag_init +EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0x35c1e470 xfrm6_input_addr +EXPORT_SYMBOL net/ipv6/ipv6 0x36ae0033 ipv6_getsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x3b757fb6 rt6_lookup +EXPORT_SYMBOL net/ipv6/ipv6 0x474762d6 inet6_del_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0x4ec46849 inet6_unregister_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0x5159b36f inet6_ioctl +EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0x5504964e xfrm6_prepare_output +EXPORT_SYMBOL net/ipv6/ipv6 0x5b15ac05 ipv6_dev_get_saddr +EXPORT_SYMBOL net/ipv6/ipv6 0x613b999d ipv6_setsockopt +EXPORT_SYMBOL net/ipv6/ipv6 0x623bd5ea ipv6_push_nfrag_opts +EXPORT_SYMBOL net/ipv6/ipv6 0x7115fea9 inet6_release +EXPORT_SYMBOL net/ipv6/ipv6 0x83b1626b inet6_register_protosw +EXPORT_SYMBOL net/ipv6/ipv6 0x860a16f6 ip6_route_me_harder +EXPORT_SYMBOL net/ipv6/ipv6 0x8680e58f xfrm6_rcv +EXPORT_SYMBOL net/ipv6/ipv6 0x8eb1de46 ndisc_build_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xa3a6d88f ip6_route_output +EXPORT_SYMBOL net/ipv6/ipv6 0xb593bc7b nf_ip6_checksum +EXPORT_SYMBOL net/ipv6/ipv6 0xbc58cdb4 ipv6_chk_prefix +EXPORT_SYMBOL net/ipv6/ipv6 0xc39a3755 ip6_xmit +EXPORT_SYMBOL net/ipv6/ipv6 0xc9a2cf66 xfrm6_find_1stfragopt +EXPORT_SYMBOL net/ipv6/ipv6 0xccf85787 inet6_add_protocol +EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL net/ipv6/ipv6 0xd663c9e7 icmpv6_send +EXPORT_SYMBOL net/ipv6/ipv6 0xdb4204ce ndisc_send_skb +EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL net/ipv6/ipv6 0xf1c8c1b4 inet6_bind +EXPORT_SYMBOL net/ipv6/ipv6 0xf679c2ed in6_dev_finish_destroy +EXPORT_SYMBOL net/ipv6/ipv6 0xfb643d5f inet6_getname +EXPORT_SYMBOL net/ipv6/ipv6 0xfc739a6c ip6_frag_match +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x16353c9f ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x1851b528 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x64a8cd7e ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xc05fa2c0 ip6t_unregister_table +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x484b216e ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x62e025ad ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8990bb87 ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x89cabdab ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x99a3ae06 ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa398a127 ircomm_flow_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xcf19f0f1 ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe05a01c6 ircomm_control_request +EXPORT_SYMBOL net/irda/irda 0x062cb115 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x07343d3c irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x0af6c5ac async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0x1322e68b irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x1a617b1d irias_find_object +EXPORT_SYMBOL net/irda/irda 0x1ccd5c8c irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x263f5ab4 hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0x2a438ce1 irlap_open +EXPORT_SYMBOL net/irda/irda 0x2e639461 iriap_close +EXPORT_SYMBOL net/irda/irda 0x369d0cfc irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3b415565 irlap_close +EXPORT_SYMBOL net/irda/irda 0x4096621c irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x42e27e18 irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x4ba5dc74 hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x5a856804 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0x5b24fa0e irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x5b8b95bb hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0x5d1487c7 irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x62c83096 irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x6f01d8d0 irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x7d54824d irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x84cb1553 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x88ed3b04 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x9694bb4c hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x970fd95c irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x982b6b09 hashbin_new +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9a5c5388 alloc_irdadev +EXPORT_SYMBOL net/irda/irda 0x9fea5965 hashbin_remove +EXPORT_SYMBOL net/irda/irda 0xa45993f4 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbcfd4b16 irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0xbd9cdfda irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0xbde32277 hashbin_insert +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xbf484434 irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0xc10f5acd irias_new_object +EXPORT_SYMBOL net/irda/irda 0xc72a0d46 iriap_open +EXPORT_SYMBOL net/irda/irda 0xce226a07 irttp_dup +EXPORT_SYMBOL net/irda/irda 0xce9740f0 irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0xd3edad11 hashbin_find +EXPORT_SYMBOL net/irda/irda 0xdc44570f proc_irda +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xdfaf55d4 irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0xe541e2c2 irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xfc14de90 irttp_connect_response +EXPORT_SYMBOL net/lapb/lapb 0x0ae80199 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x18b4825c lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x8c0e9268 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0x9ceb1233 lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0xa79d0021 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0xba7e259b lapb_setparms +EXPORT_SYMBOL net/lapb/lapb 0xcb4f2e1a lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0xdd38e225 lapb_data_received +EXPORT_SYMBOL net/mac80211/mac80211 0x0b6fcce5 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x12af720c ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x14d1d42d __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x19f0f2f9 ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x1c849afc ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0x2114cf11 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x26d8b8a6 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x35c3b828 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x4601ccd0 ieee80211_stop_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x49649f15 ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x4b29e83c ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x4d2abd38 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x6015c9be ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x61aed883 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x6811de62 ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x7ea012a1 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x8309782c ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x8974d822 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x920a52e5 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x9a1e52d1 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0xa39a52f1 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xa7dfea82 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xab17360a ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xb8dd5151 ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xbbf95480 ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0xbdb68fbb __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xcd6cb1eb ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xcf54095b ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xd2583f32 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0xd51b5fa2 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xd8b14fdd __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xde22d9e9 ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xe33ac004 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xf0415e73 wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf0cdeae4 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xfa437bf9 __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xfedff1a8 ieee80211_find_sta +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x19edc64d ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2611e9e2 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5b51b380 ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5f55a7d2 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x858ffbb2 register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x88037559 register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8f6662f5 ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa591b9aa unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xbccb7f3a ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe3cfb3fa register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf141532d unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x4a6fe390 __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x4a7890ab __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xbf25032a nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x28f1d907 xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x2c062663 xt_find_target +EXPORT_SYMBOL net/netfilter/x_tables 0x35ffcc6d xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x3c7b06f0 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0x8a010b9a xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0x96b496fb xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0xac202308 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xc9ed9f42 xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xddf7396d xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xe88b2ee3 xt_register_target +EXPORT_SYMBOL net/phonet/phonet 0x05609adc phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x1790919f pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x20709b72 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x6d725765 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0x9a79d096 pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0xa4bea215 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0xc2f7ac3a phonet_proto_register +EXPORT_SYMBOL net/phonet/phonet 0xcae8929f pn_skb_send +EXPORT_SYMBOL net/rfkill/rfkill 0x1308546a rfkill_unregister +EXPORT_SYMBOL net/rfkill/rfkill 0x19d18890 rfkill_set_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x2f011971 rfkill_destroy +EXPORT_SYMBOL net/rfkill/rfkill 0x2fcec4cc rfkill_set_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x45a3c85a rfkill_init_sw_state +EXPORT_SYMBOL net/rfkill/rfkill 0x46cd58df rfkill_blocked +EXPORT_SYMBOL net/rfkill/rfkill 0x4b94a811 rfkill_set_states +EXPORT_SYMBOL net/rfkill/rfkill 0x51f33de3 rfkill_get_led_trigger_name +EXPORT_SYMBOL net/rfkill/rfkill 0x5abf69d8 rfkill_register +EXPORT_SYMBOL net/rfkill/rfkill 0x6769383a rfkill_alloc +EXPORT_SYMBOL net/rfkill/rfkill 0x7d5999f3 rfkill_set_hw_state +EXPORT_SYMBOL net/rfkill/rfkill 0xca8aa5b7 rfkill_pause_polling +EXPORT_SYMBOL net/rfkill/rfkill 0xef2cb3f1 rfkill_resume_polling +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0e29b483 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1418ad43 key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1aba50b0 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x419e070a rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x437250e3 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x43de73bb rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x45564bfb rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x849596c0 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x96224151 rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd77c2197 rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdad17d1a rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xef255368 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf514fea5 rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf7e79474 rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf9896c72 rxrpc_get_server_data_key +EXPORT_SYMBOL net/sunrpc/sunrpc 0x999b5f92 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x0f94d12f tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x1b7cd02c tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0x23daecbd tipc_send +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x281cf354 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x419b02fc tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x4259abf5 tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x4784de07 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0x483e7d6e tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x4ac738a8 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4f9fde41 tipc_send_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x741ad639 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x9227ddfe tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x960bcb75 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0xa762af43 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xc6c451fb tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xcee290be tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0xd0cbb951 register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x6960a309 wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0xccfa4b22 wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x07e6de5e wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0d200e05 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x0dccafce cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x12575e44 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0x13192a38 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x25d7aabe ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0x2ce1e0e5 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0x338187e7 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x34b07ced cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0x5bff42db cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x71515d11 wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x72bdbc24 wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x74385065 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x813e6556 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x81b383ec ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x85043b21 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0x86eb7e53 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x922f5bc2 cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x93c0807d cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x94831ddd wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x9f576bc2 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xa19b324e wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0xa4ffa857 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0xad8d579f ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0xb6531dc7 cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xbafdfbff cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0xc018da61 cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0xc20113e9 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0xc330a9d6 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xed5fa42c wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0xf6d52fe6 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0xf6e02670 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0xf7eca183 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/lib80211 0x1b73aa6b lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x25ac9aa7 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x2c60611d lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x4aedd06a lib80211_crypt_quiescing +EXPORT_SYMBOL net/wireless/lib80211 0xa2a00643 lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0xbccf15f7 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0xc17b33c9 lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0xe311f52b lib80211_unregister_crypto_ops +EXPORT_SYMBOL sound/ac97_bus 0xbf0f7eac ac97_bus_type +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xb4332ead snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x18e105e6 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x75cc96e4 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013 snd_use_lock_sync_helper +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xca6c07f3 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0xf0732d08 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x685be260 snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xeda5ea16 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972 snd_midi_channel_alloc_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07 snd_midi_channel_set_clear +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c snd_midi_channel_free_set +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3 snd_midi_process_event +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x025ed7ec snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x08ef1bf8 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x484f6d65 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x6a19e5da snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9d1d1cfe snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xa343a003 snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xcca03770 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xf222f56c snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x153166bd snd_virmidi_new +EXPORT_SYMBOL sound/core/snd 0x05959a98 snd_ctl_boolean_mono_info +EXPORT_SYMBOL sound/core/snd 0x0d19a2e7 snd_ctl_free_one +EXPORT_SYMBOL sound/core/snd 0x1064b159 snd_ctl_find_numid +EXPORT_SYMBOL sound/core/snd 0x178a763b snd_ctl_register_ioctl +EXPORT_SYMBOL sound/core/snd 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL sound/core/snd 0x1a3a2799 snd_card_set_id +EXPORT_SYMBOL sound/core/snd 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL sound/core/snd 0x24b8f7a0 snd_card_create +EXPORT_SYMBOL sound/core/snd 0x2ae3deaa release_and_free_resource +EXPORT_SYMBOL sound/core/snd 0x388f7039 snd_seq_root +EXPORT_SYMBOL sound/core/snd 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL sound/core/snd 0x4289f2a1 snd_power_wait +EXPORT_SYMBOL sound/core/snd 0x443eaf57 snd_card_free +EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL sound/core/snd 0x4e551301 snd_pci_quirk_lookup +EXPORT_SYMBOL sound/core/snd 0x50aca615 snd_ctl_add +EXPORT_SYMBOL sound/core/snd 0x518bb7f8 copy_from_user_toio +EXPORT_SYMBOL sound/core/snd 0x5424aa10 snd_info_register +EXPORT_SYMBOL sound/core/snd 0x5d8edd4c snd_jack_report +EXPORT_SYMBOL sound/core/snd 0x5dc70a1e snd_ctl_rename_id +EXPORT_SYMBOL sound/core/snd 0x5e16e204 snd_ctl_notify +EXPORT_SYMBOL sound/core/snd 0x5e9ca428 snd_card_free_when_closed +EXPORT_SYMBOL sound/core/snd 0x6607e4cb snd_add_device_sysfs_file +EXPORT_SYMBOL sound/core/snd 0x666426f3 snd_unregister_device +EXPORT_SYMBOL sound/core/snd 0x67c1ce66 snd_ctl_remove +EXPORT_SYMBOL sound/core/snd 0x6854de92 snd_card_file_add +EXPORT_SYMBOL sound/core/snd 0x6ea47ee2 snd_ctl_new1 +EXPORT_SYMBOL sound/core/snd 0x70324b82 snd_ctl_find_id +EXPORT_SYMBOL sound/core/snd 0x7068cfdc snd_register_oss_device +EXPORT_SYMBOL sound/core/snd 0x78f897d5 snd_unregister_oss_device +EXPORT_SYMBOL sound/core/snd 0x7efcdc17 snd_ctl_register_ioctl_compat +EXPORT_SYMBOL sound/core/snd 0x8dc2db1e snd_ctl_unregister_ioctl +EXPORT_SYMBOL sound/core/snd 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL sound/core/snd 0x8f595b11 snd_major +EXPORT_SYMBOL sound/core/snd 0x8f86ecce snd_ctl_boolean_stereo_info +EXPORT_SYMBOL sound/core/snd 0x988e49f2 snd_device_new +EXPORT_SYMBOL sound/core/snd 0xaf0639a5 snd_info_free_entry +EXPORT_SYMBOL sound/core/snd 0xaff48b22 snd_card_proc_new +EXPORT_SYMBOL sound/core/snd 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL sound/core/snd 0xb87bb110 snd_device_register +EXPORT_SYMBOL sound/core/snd 0xba0584d8 snd_jack_new +EXPORT_SYMBOL sound/core/snd 0xba285493 snd_cards +EXPORT_SYMBOL sound/core/snd 0xbf3f4404 snd_card_register +EXPORT_SYMBOL sound/core/snd 0xcda65d48 _snd_ctl_add_slave +EXPORT_SYMBOL sound/core/snd 0xd4bfde08 snd_card_disconnect +EXPORT_SYMBOL sound/core/snd 0xd5c52972 snd_device_free +EXPORT_SYMBOL sound/core/snd 0xd8c2a322 snd_ctl_remove_id +EXPORT_SYMBOL sound/core/snd 0xdd881e2f snd_info_create_card_entry +EXPORT_SYMBOL sound/core/snd 0xe119990f snd_component_add +EXPORT_SYMBOL sound/core/snd 0xe1d1a42e snd_mixer_oss_notify_callback +EXPORT_SYMBOL sound/core/snd 0xe243dde3 copy_to_user_fromio +EXPORT_SYMBOL sound/core/snd 0xe4854cea snd_iprintf +EXPORT_SYMBOL sound/core/snd 0xe5d64ecb snd_register_device_for_dev +EXPORT_SYMBOL sound/core/snd 0xef9a0609 snd_card_file_remove +EXPORT_SYMBOL sound/core/snd 0xf1ab4f53 snd_ctl_make_virtual_master +EXPORT_SYMBOL sound/core/snd 0xf4d3ca29 snd_info_create_module_entry +EXPORT_SYMBOL sound/core/snd 0xf53f6ca1 snd_jack_set_parent +EXPORT_SYMBOL sound/core/snd 0xfc85da54 snd_ctl_unregister_ioctl_compat +EXPORT_SYMBOL sound/core/snd-hwdep 0x47f546ef snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-page-alloc 0x07d0adf5 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL sound/core/snd-page-alloc 0x16aa5a3d snd_dma_reserve_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3 snd_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0x57994e1e snd_dma_get_reserved_buf +EXPORT_SYMBOL sound/core/snd-page-alloc 0x8876dda8 snd_dma_free_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020 snd_malloc_pages +EXPORT_SYMBOL sound/core/snd-page-alloc 0xed8bf9a7 snd_dma_alloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566 snd_interval_refine +EXPORT_SYMBOL sound/core/snd-pcm 0x1250eabf snd_pcm_lib_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL sound/core/snd-pcm 0x1da4f5fe snd_pcm_hw_constraint_step +EXPORT_SYMBOL sound/core/snd-pcm 0x2261c5a6 snd_pcm_lib_readv +EXPORT_SYMBOL sound/core/snd-pcm 0x28b51ee7 snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL sound/core/snd-pcm 0x28efbed1 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL sound/core/snd-pcm 0x29879850 snd_pcm_set_ops +EXPORT_SYMBOL sound/core/snd-pcm 0x34c35a38 snd_pcm_link_rwlock +EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x3934c089 snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL sound/core/snd-pcm 0x441ca75e snd_pcm_new +EXPORT_SYMBOL sound/core/snd-pcm 0x4f3c01f3 snd_pcm_stop +EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL sound/core/snd-pcm 0x5288be16 snd_pcm_hw_param_last +EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL sound/core/snd-pcm 0x5777ff13 snd_pcm_kernel_ioctl +EXPORT_SYMBOL sound/core/snd-pcm 0x5c9231a6 snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0x5dc3f05c snd_pcm_lib_writev +EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL sound/core/snd-pcm 0x6217c817 snd_pcm_lib_free_pages +EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL sound/core/snd-pcm 0x6d0c7685 snd_pcm_hw_constraint_list +EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL sound/core/snd-pcm 0x7e7669a8 snd_pcm_release_substream +EXPORT_SYMBOL sound/core/snd-pcm 0x86a27a91 snd_pcm_set_sync +EXPORT_SYMBOL sound/core/snd-pcm 0x8c1acc8f snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL sound/core/snd-pcm 0x91149816 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL sound/core/snd-pcm 0x92744e5e snd_pcm_notify +EXPORT_SYMBOL sound/core/snd-pcm 0xa261bad8 snd_pcm_hw_refine +EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL sound/core/snd-pcm 0xa7ddee12 snd_pcm_suspend +EXPORT_SYMBOL sound/core/snd-pcm 0xa8723ecd snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL sound/core/snd-pcm 0xabf9d011 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL sound/core/snd-pcm 0xaed0a718 snd_pcm_lib_write +EXPORT_SYMBOL sound/core/snd-pcm 0xb753dc87 snd_pcm_hw_param_first +EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL sound/core/snd-pcm 0xbbc7b3ea snd_pcm_new_stream +EXPORT_SYMBOL sound/core/snd-pcm 0xbfb4cee9 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL sound/core/snd-pcm 0xc2b1c882 snd_pcm_period_elapsed +EXPORT_SYMBOL sound/core/snd-pcm 0xc80783d0 snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL sound/core/snd-pcm 0xcd48b1ed snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL sound/core/snd-pcm 0xd7526687 snd_pcm_suspend_all +EXPORT_SYMBOL sound/core/snd-pcm 0xd87f27c1 snd_pcm_mmap_data +EXPORT_SYMBOL sound/core/snd-pcm 0xdc24ad76 snd_pcm_lib_read +EXPORT_SYMBOL sound/core/snd-pcm 0xdeca493a snd_pcm_hw_rule_add +EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64 snd_pcm_format_size +EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL sound/core/snd-pcm 0xed0c764c snd_pcm_hw_constraint_integer +EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL sound/core/snd-pcm 0xfa4e3946 snd_pcm_limit_hw_rates +EXPORT_SYMBOL sound/core/snd-pcm 0xff5b8e45 snd_pcm_open_substream +EXPORT_SYMBOL sound/core/snd-rawmidi 0x24aef65a snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0x29603207 snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x39755a7f snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x40e8c79f snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x5fb00fc9 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7aaeab86 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0x8f22d4f1 snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaa78b520 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaf527a7e snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xc330c7f6 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0xc9905ac1 snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xcaadecfe snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xcf9ba928 snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd1d43a7b snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xd8af0a8e snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0xed66a94d snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf8e79b09 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/core/snd-timer 0x1c688575 snd_timer_notify +EXPORT_SYMBOL sound/core/snd-timer 0x2be1ce3c snd_timer_start +EXPORT_SYMBOL sound/core/snd-timer 0x4911ac56 snd_timer_open +EXPORT_SYMBOL sound/core/snd-timer 0x50ed20ed snd_timer_interrupt +EXPORT_SYMBOL sound/core/snd-timer 0x6b91054b snd_timer_global_free +EXPORT_SYMBOL sound/core/snd-timer 0x7dc77396 snd_timer_global_register +EXPORT_SYMBOL sound/core/snd-timer 0x8e42ae2a snd_timer_continue +EXPORT_SYMBOL sound/core/snd-timer 0xa2a04498 snd_timer_global_new +EXPORT_SYMBOL sound/core/snd-timer 0xc01f26a0 snd_timer_pause +EXPORT_SYMBOL sound/core/snd-timer 0xd954b0e9 snd_timer_resolution +EXPORT_SYMBOL sound/core/snd-timer 0xddd37948 snd_timer_close +EXPORT_SYMBOL sound/core/snd-timer 0xe9a49aab snd_timer_new +EXPORT_SYMBOL sound/core/snd-timer 0xefa2152e snd_timer_stop +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc75c07c3 snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19 snd_opl3_regmap +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x100654a1 snd_opl3_load_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1b1fdf9c snd_opl3_find_patch +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3967c0b2 snd_opl3_interrupt +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x640b2735 snd_opl3_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6f64d877 snd_opl3_create +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8a2d05d9 snd_opl3_init +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa5787b6a snd_opl3_timer_new +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc9b8f9da snd_opl3_reset +EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf4e5348b snd_opl3_hwdep_new +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0da4f46b snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3884d556 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x45cd5da5 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x5242ff98 snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7353a1e8 snd_vx_load_boot_image +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x82e8bbaf snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x8620e0c8 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xabc9240b snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xada4fcf8 snd_vx_dsp_load +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x134b5b0f snd_ak4114_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x186d41ef snd_ak4114_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1f9a941a snd_ak4114_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x84fcd33e snd_ak4114_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa520dde4 snd_ak4114_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xe4267dd7 snd_ak4114_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x33ebe45e snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x4cb09749 snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x573f0ddd snd_ak4117_reinit +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x994a0f3e snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa8118762 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe5d3ae3f snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x0a400035 snd_akm4xxx_reset +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x1520aff5 snd_akm4xxx_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x21a5795e snd_akm4xxx_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa17e35e7 snd_akm4xxx_init +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x3a76e08a snd_pt2258_reset +EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x78c6ae25 snd_pt2258_build_controls +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x22158b69 snd_tea575x_init +EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x7cd4c543 snd_tea575x_exit +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x72e4d587 snd_cs8427_iec958_pcm +EXPORT_SYMBOL sound/i2c/snd-cs8427 0x86316621 snd_cs8427_reg_write +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa797022a snd_cs8427_iec958_active +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb4f2c963 snd_cs8427_iec958_build +EXPORT_SYMBOL sound/i2c/snd-cs8427 0xf62dfe28 snd_cs8427_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x0d334c41 snd_i2c_bus_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0x2595e04a snd_i2c_device_create +EXPORT_SYMBOL sound/i2c/snd-i2c 0xc7e9f264 snd_i2c_probeaddr +EXPORT_SYMBOL sound/i2c/snd-i2c 0xdf47da22 snd_i2c_readbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xe105fcd3 snd_i2c_sendbytes +EXPORT_SYMBOL sound/i2c/snd-i2c 0xfe4cca38 snd_i2c_device_free +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x03cfa7fb snd_ac97_update_power +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0a8d5179 snd_ac97_resume +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x11ba3606 snd_ac97_tune_hardware +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x36c3a63c snd_ac97_pcm_open +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3e494eb2 snd_ac97_update_bits +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4f63e7f7 snd_ac97_suspend +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x55297ac7 snd_ac97_write_cache +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x59dd6ccf snd_ac97_get_short_name +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x69fd5492 snd_ac97_update +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8a4c16e1 snd_ac97_pcm_assign +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8aa67d7c snd_ac97_set_rate +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa8afa5c8 snd_ac97_read +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb358d8f1 snd_ac97_pcm_double_rate_rules +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xca14ec48 snd_ac97_bus +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xcc782698 snd_ac97_write +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xceafa6e5 snd_ac97_pcm_close +EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdfac9d9b snd_ac97_mixer +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2b368677 snd_emu10k1_synth_bzero +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2d3445a7 snd_emu10k1_voice_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x4cf51975 snd_emu10k1_memblk_map +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6b55d7fa snd_emu10k1_voice_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x75fe8baa snd_emu10k1_synth_free +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xbd1dae65 snd_emu10k1_ptr_write +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc0d6f22f snd_emu10k1_synth_copy_from_user +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xcce1b622 snd_emu10k1_synth_alloc +EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfcc3de99 snd_emu10k1_ptr_read +EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x45f09531 snd_hda_parse_generic_codec +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x34187b37 snd_ice1712_akm4xxx_build_controls +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x518dbb9d snd_ice1712_akm4xxx_init +EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x6f641551 snd_ice1712_akm4xxx_free +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x359552dc snd_trident_alloc_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x83e0bebb snd_trident_start_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9777df79 snd_trident_write_voice_regs +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa8b789bb snd_trident_free_voice +EXPORT_SYMBOL sound/pci/trident/snd-trident 0xac6ca848 snd_trident_stop_voice +EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x954473e4 uda134x_dai +EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23 mod_firmware_load +EXPORT_SYMBOL sound/soundcore 0x6aac2435 register_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL sound/soundcore 0x8e2637f4 sound_class +EXPORT_SYMBOL sound/soundcore 0x8f202660 register_sound_special +EXPORT_SYMBOL sound/soundcore 0x91f34c56 register_sound_dsp +EXPORT_SYMBOL sound/soundcore 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL sound/soundcore 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL sound/soundcore 0xd129575a register_sound_special_device +EXPORT_SYMBOL sound/soundcore 0xee011f5a register_sound_midi +EXPORT_SYMBOL sound/soundcore 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x0cc5fb7c snd_emux_unlock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x11cf5e2b snd_emux_free +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x21a0fcc9 snd_emux_lock_voice +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202 snd_sf_linear_to_log +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x67d45e2d snd_emux_new +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf7af7f89 snd_emux_terminate_all +EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xff8adae1 snd_emux_register +EXPORT_SYMBOL sound/synth/snd-util-mem 0x1ae38d47 snd_util_memhdr_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x22f305c4 __snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0x34816180 snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x3c7053fc __snd_util_mem_alloc +EXPORT_SYMBOL sound/synth/snd-util-mem 0x6487820f snd_util_mem_avail +EXPORT_SYMBOL sound/synth/snd-util-mem 0x98255b2b snd_util_mem_free +EXPORT_SYMBOL sound/synth/snd-util-mem 0xb73cc010 snd_util_memhdr_new +EXPORT_SYMBOL sound/synth/snd-util-mem 0xe1771560 __snd_util_memblk_new +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x19b8eda9 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x002e4133 nla_reserve +EXPORT_SYMBOL vmlinux 0x0043ea46 sock_wake_async +EXPORT_SYMBOL vmlinux 0x0045617d get_user_pages +EXPORT_SYMBOL vmlinux 0x005fb189 bio_init +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x00929dd7 dma_pool_free +EXPORT_SYMBOL vmlinux 0x00c3ace9 elv_queue_empty +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00eef49e __strnlen_user +EXPORT_SYMBOL vmlinux 0x01102533 inet_put_port +EXPORT_SYMBOL vmlinux 0x0142c08d sk_run_filter +EXPORT_SYMBOL vmlinux 0x016db82e register_nls +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x0193a1ce call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01d19038 acpi_enable_subsystem +EXPORT_SYMBOL vmlinux 0x0201d429 free_task +EXPORT_SYMBOL vmlinux 0x020672c4 matroxfb_g450_setclk +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x0220e9d5 init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x0231dd2f pci_bus_assign_resources +EXPORT_SYMBOL vmlinux 0x0237b57a arch_unregister_cpu +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x02745c2d udp_proc_register +EXPORT_SYMBOL vmlinux 0x02825e2f blk_sync_queue +EXPORT_SYMBOL vmlinux 0x029c9a1c kthread_create +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02aff2f4 acpi_install_gpe_handler +EXPORT_SYMBOL vmlinux 0x02d81845 audit_log_task_context +EXPORT_SYMBOL vmlinux 0x031898e1 unregister_binfmt +EXPORT_SYMBOL vmlinux 0x032fe70a __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0340d0e1 acpi_pci_osc_control_set +EXPORT_SYMBOL vmlinux 0x0340e0ae schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x034f2fc6 filemap_flush +EXPORT_SYMBOL vmlinux 0x03574070 blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x036ecd11 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03c2cb1a kill_litter_super +EXPORT_SYMBOL vmlinux 0x03e495bc kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x03fc1b21 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x040def39 I_BDEV +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x04493522 compat_sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x046215cf pci_fixup_device +EXPORT_SYMBOL vmlinux 0x0467857a directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04bdd8c0 add_disk +EXPORT_SYMBOL vmlinux 0x04f90694 netif_napi_add +EXPORT_SYMBOL vmlinux 0x0508ca13 blk_start_queue +EXPORT_SYMBOL vmlinux 0x0510a1c0 per_cpu__cpu_sibling_map +EXPORT_SYMBOL vmlinux 0x05240ee7 percpu_counter_batch +EXPORT_SYMBOL vmlinux 0x053bf550 simple_readpage +EXPORT_SYMBOL vmlinux 0x053ea22b sn_region_size +EXPORT_SYMBOL vmlinux 0x054cd3b5 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x0573c963 path_lookup +EXPORT_SYMBOL vmlinux 0x058321f6 elevator_exit +EXPORT_SYMBOL vmlinux 0x05b0a2f8 nobh_write_begin +EXPORT_SYMBOL vmlinux 0x05c202d8 __bforget +EXPORT_SYMBOL vmlinux 0x05d5d7ca vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x0603309d cont_write_begin +EXPORT_SYMBOL vmlinux 0x060d680f xor_ia64_4 +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x061bcd5e get_write_access +EXPORT_SYMBOL vmlinux 0x061e3f9b remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0x06261a41 console_stop +EXPORT_SYMBOL vmlinux 0x0655cb66 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0x0669da5b tcf_hash_create +EXPORT_SYMBOL vmlinux 0x067b50a5 may_umount +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x069b8686 pci_remove_behind_bridge +EXPORT_SYMBOL vmlinux 0x06a485f2 __krealloc +EXPORT_SYMBOL vmlinux 0x06bfd4f6 interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0x06c8a206 console_start +EXPORT_SYMBOL vmlinux 0x06cbd3f6 tcf_hash_check +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x0718c22c _write_lock_irq +EXPORT_SYMBOL vmlinux 0x0727c4f3 iowrite8 +EXPORT_SYMBOL vmlinux 0x07284143 pci_fixup_cardbus +EXPORT_SYMBOL vmlinux 0x072e662f kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0x074ac545 d_alloc_name +EXPORT_SYMBOL vmlinux 0x074b5ef5 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x0758ce50 simple_write_begin +EXPORT_SYMBOL vmlinux 0x07957151 fddi_change_mtu +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07b6b5b0 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x07b91785 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x07bae22b del_timer_sync +EXPORT_SYMBOL vmlinux 0x07c6e85c phy_start +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07ea470d i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0x07f7780e dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x0809a33a journal_release_buffer +EXPORT_SYMBOL vmlinux 0x081ebf56 pci_add_new_bus +EXPORT_SYMBOL vmlinux 0x082c3213 pci_root_buses +EXPORT_SYMBOL vmlinux 0x0837eb65 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x0890d460 ilookup5 +EXPORT_SYMBOL vmlinux 0x08b1187e fb_set_cmap +EXPORT_SYMBOL vmlinux 0x08b88beb inet_frags_fini +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08e6b007 ia64_iobase +EXPORT_SYMBOL vmlinux 0x08e9f501 netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0x08f8b715 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x092b96a2 sock_i_ino +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x0977ac24 dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x098431ba acpi_get_current_resources +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x09991e7b kfifo_init +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09d44df9 in_lock_functions +EXPORT_SYMBOL vmlinux 0x09dcaeea vc_resize +EXPORT_SYMBOL vmlinux 0x09e8a976 xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x09f5b3ff ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0x09f6b30a destroy_EII_client +EXPORT_SYMBOL vmlinux 0x0a0435cf sget +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a2b87c2 del_timer +EXPORT_SYMBOL vmlinux 0x0a32c519 kobject_put +EXPORT_SYMBOL vmlinux 0x0a7edd7d genl_register_ops +EXPORT_SYMBOL vmlinux 0x0ab6064e blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0acca637 min_low_pfn +EXPORT_SYMBOL vmlinux 0x0b07e410 pnp_unregister_driver +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b1cda9a pci_enable_wake +EXPORT_SYMBOL vmlinux 0x0b237ed3 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0x0b23a44d iput +EXPORT_SYMBOL vmlinux 0x0b2acf96 locks_remove_posix +EXPORT_SYMBOL vmlinux 0x0b335ce9 netif_napi_del +EXPORT_SYMBOL vmlinux 0x0b4ebaa0 xfrm_lookup +EXPORT_SYMBOL vmlinux 0x0b61982d kthread_bind +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b9a70d2 napi_frags_skb +EXPORT_SYMBOL vmlinux 0x0bb0a997 sn_sharing_domain_size +EXPORT_SYMBOL vmlinux 0x0bbff848 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0x0bd0cbfc skb_tx_hash +EXPORT_SYMBOL vmlinux 0x0bf8d509 pci_target_state +EXPORT_SYMBOL vmlinux 0x0bfd2cf0 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0x0c2c160a sockfd_lookup +EXPORT_SYMBOL vmlinux 0x0c391c72 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0x0c4dcd47 _read_unlock_irq +EXPORT_SYMBOL vmlinux 0x0c5f4c1f gen_pool_alloc +EXPORT_SYMBOL vmlinux 0x0c7e2a6d arch_acpi_processor_cleanup_pdc +EXPORT_SYMBOL vmlinux 0x0c8300a0 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0x0c97418f sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0x0c9e4ba9 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x0ca7b7a8 acpi_check_region +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cc7ae14 skb_recycle_check +EXPORT_SYMBOL vmlinux 0x0ccf0cc2 simple_rename +EXPORT_SYMBOL vmlinux 0x0cd7d26b _read_lock +EXPORT_SYMBOL vmlinux 0x0d3dda14 acpi_get_type +EXPORT_SYMBOL vmlinux 0x0d50d4b7 swiotlb_dma_supported +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d991989 tty_port_close_start +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0da2db56 netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x0dbce1b9 idr_for_each +EXPORT_SYMBOL vmlinux 0x0dbd145f alloc_fcdev +EXPORT_SYMBOL vmlinux 0x0dce87d7 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x0de2e610 gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x0dfe9c83 km_query +EXPORT_SYMBOL vmlinux 0x0e1c137a napi_skb_finish +EXPORT_SYMBOL vmlinux 0x0e3c4f1c get_sb_nodev +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e574924 unlock_page +EXPORT_SYMBOL vmlinux 0x0e81f0e4 cpu_present_mask +EXPORT_SYMBOL vmlinux 0x0ea7a3f5 __module_put_and_exit +EXPORT_SYMBOL vmlinux 0x0ed1f903 dcache_dir_open +EXPORT_SYMBOL vmlinux 0x0edf2adb dquot_claim_space +EXPORT_SYMBOL vmlinux 0x0ee0d3f5 generic_file_llseek +EXPORT_SYMBOL vmlinux 0x0ee33f09 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0x0f012248 __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f754eed xfrm_register_km +EXPORT_SYMBOL vmlinux 0x0fc5e8eb radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0x0fc84550 ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0x0fd00a68 acpi_clear_event +EXPORT_SYMBOL vmlinux 0x0fd6b421 blk_run_queue +EXPORT_SYMBOL vmlinux 0x0fdce94f sn_io_slot_fixup +EXPORT_SYMBOL vmlinux 0x102b5b21 sn_system_serial_number_string +EXPORT_SYMBOL vmlinux 0x104d432b kfifo_free +EXPORT_SYMBOL vmlinux 0x10545ea0 init_net +EXPORT_SYMBOL vmlinux 0x1072a394 csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x108fca24 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x109e8129 simple_release_fs +EXPORT_SYMBOL vmlinux 0x10ecef66 force_sig +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10f1cb79 filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0x110f8cb5 panic_notifier_list +EXPORT_SYMBOL vmlinux 0x112745e6 journal_start_commit +EXPORT_SYMBOL vmlinux 0x114ed1ce schedule_work_on +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x118f01ea putname +EXPORT_SYMBOL vmlinux 0x12189d7e pci_back_from_sleep +EXPORT_SYMBOL vmlinux 0x124c9939 prepare_to_wait +EXPORT_SYMBOL vmlinux 0x12657d7d i2c_bit_add_numbered_bus +EXPORT_SYMBOL vmlinux 0x126be65c wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0x129697b8 memcpy_toio +EXPORT_SYMBOL vmlinux 0x12fe3d7f dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0x132c9102 bio_clone +EXPORT_SYMBOL vmlinux 0x133b5af4 dget_locked +EXPORT_SYMBOL vmlinux 0x134af310 swiotlb_free_coherent +EXPORT_SYMBOL vmlinux 0x134c7f14 tty_devnum +EXPORT_SYMBOL vmlinux 0x136b6a12 compat_nf_setsockopt +EXPORT_SYMBOL vmlinux 0x138a78d1 set_current_groups +EXPORT_SYMBOL vmlinux 0x13bfe233 sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x13ebafd4 __nla_put +EXPORT_SYMBOL vmlinux 0x140901c2 journal_init_dev +EXPORT_SYMBOL vmlinux 0x14255f1c pid_task +EXPORT_SYMBOL vmlinux 0x1430e6e0 unregister_acpi_notifier +EXPORT_SYMBOL vmlinux 0x143f7273 blk_unplug +EXPORT_SYMBOL vmlinux 0x14448f3a gen_new_estimator +EXPORT_SYMBOL vmlinux 0x14a2c945 ps2_handle_response +EXPORT_SYMBOL vmlinux 0x14ac0713 lookup_one_len +EXPORT_SYMBOL vmlinux 0x14bf3130 clear_inode +EXPORT_SYMBOL vmlinux 0x14df1f88 __breadahead +EXPORT_SYMBOL vmlinux 0x14e53de1 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x14ef7e2d dev_load +EXPORT_SYMBOL vmlinux 0x15018a13 sk_stop_timer +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x156feee0 serio_open +EXPORT_SYMBOL vmlinux 0x15826b5a netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0x159a6ebf poll_freewait +EXPORT_SYMBOL vmlinux 0x15b69116 blk_rq_map_user +EXPORT_SYMBOL vmlinux 0x15d8e289 __ip_select_ident +EXPORT_SYMBOL vmlinux 0x15f2ada2 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0x16032758 generic_setxattr +EXPORT_SYMBOL vmlinux 0x160d530e inetdev_by_index +EXPORT_SYMBOL vmlinux 0x1612fe4a jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x1650a2cf bio_integrity_split +EXPORT_SYMBOL vmlinux 0x1675606f bad_dma_address +EXPORT_SYMBOL vmlinux 0x1678ff05 generic_delete_inode +EXPORT_SYMBOL vmlinux 0x167c85dc __serio_register_port +EXPORT_SYMBOL vmlinux 0x167d926c pcim_iomap +EXPORT_SYMBOL vmlinux 0x168cb016 bioset_free +EXPORT_SYMBOL vmlinux 0x16bac4d4 journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x16cc96ad __break_lease +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x16e5f03c audit_log_end +EXPORT_SYMBOL vmlinux 0x16e9ec64 wireless_send_event +EXPORT_SYMBOL vmlinux 0x16f2b610 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x170106a4 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x170646cb proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x170c25ee acpi_get_next_object +EXPORT_SYMBOL vmlinux 0x171af6e7 xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x174d4000 __neigh_event_send +EXPORT_SYMBOL vmlinux 0x179d75be phy_driver_register +EXPORT_SYMBOL vmlinux 0x17a075bd sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x17c85a66 radix_tree_tagged +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x181b6685 idr_remove +EXPORT_SYMBOL vmlinux 0x1837ae9e seq_read +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x18462031 skb_insert +EXPORT_SYMBOL vmlinux 0x189b6bac memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x18a4e306 generic_ro_fops +EXPORT_SYMBOL vmlinux 0x18b3275d block_read_full_page +EXPORT_SYMBOL vmlinux 0x18c51824 sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x18d8add6 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x18dea483 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0x18f0a17b xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x19391763 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x194d0442 tty_port_init +EXPORT_SYMBOL vmlinux 0x1964e4fb skb_pad +EXPORT_SYMBOL vmlinux 0x197f37cf netpoll_print_options +EXPORT_SYMBOL vmlinux 0x19847701 bd_set_size +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19d5d20a acpi_walk_namespace +EXPORT_SYMBOL vmlinux 0x19d780ab sock_wfree +EXPORT_SYMBOL vmlinux 0x19d99a10 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x19ea1ab0 fd_install +EXPORT_SYMBOL vmlinux 0x19fa80e4 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x1a1c14ae truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x1a2402fe dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a57d123 path_put +EXPORT_SYMBOL vmlinux 0x1a8a845e idle_nomwait +EXPORT_SYMBOL vmlinux 0x1aafdee3 init_file +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1af0bb53 pci_bus_find_capability +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b0b78fa sk_free +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b6d03f8 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0x1b7c2597 con_is_bound +EXPORT_SYMBOL vmlinux 0x1b91a260 __napi_complete +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9c0bcd mb_cache_shrink +EXPORT_SYMBOL vmlinux 0x1ba1dd2e __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x1ba62f9b jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0x1ba68a92 pci_map_rom +EXPORT_SYMBOL vmlinux 0x1bbd883a __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x1bc610c3 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x1bcc158d security_inode_readlink +EXPORT_SYMBOL vmlinux 0x1bdbdbba matroxfb_enable_irq +EXPORT_SYMBOL vmlinux 0x1bde5a37 down +EXPORT_SYMBOL vmlinux 0x1be1babf add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x1be6550f vfs_stat +EXPORT_SYMBOL vmlinux 0x1be8a224 unregister_key_type +EXPORT_SYMBOL vmlinux 0x1bf81553 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x1c11daf0 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x1c1a89d7 tty_shutdown +EXPORT_SYMBOL vmlinux 0x1c8a04b0 acpi_reset +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1d2d8eed sb_min_blocksize +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d5c968c ia64_pal_call_stacked +EXPORT_SYMBOL vmlinux 0x1d6430e7 vfs_mknod +EXPORT_SYMBOL vmlinux 0x1d6ace2b hippi_type_trans +EXPORT_SYMBOL vmlinux 0x1d78b23b pci_release_selected_regions +EXPORT_SYMBOL vmlinux 0x1d7eee77 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x1da3150c swiotlb_sync_single_for_device +EXPORT_SYMBOL vmlinux 0x1db1e0c6 blk_free_tags +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dc56620 __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x1dd23f05 bdi_unregister +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1defe0ef request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0x1e04d965 __destroy_inode +EXPORT_SYMBOL vmlinux 0x1e55bf08 tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e878870 generic_block_bmap +EXPORT_SYMBOL vmlinux 0x1ea654df vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x1eb12d28 cdev_init +EXPORT_SYMBOL vmlinux 0x1ede091b fb_validate_mode +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f057ddb pci_try_set_mwi +EXPORT_SYMBOL vmlinux 0x1f257ea5 dev_alloc_name +EXPORT_SYMBOL vmlinux 0x1f3433f8 locks_mandatory_area +EXPORT_SYMBOL vmlinux 0x1f429cfe posix_test_lock +EXPORT_SYMBOL vmlinux 0x1f6464ca swiotlb_map_sg +EXPORT_SYMBOL vmlinux 0x1fba9888 sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x1fedf0f4 __request_region +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2005e68a acpi_remove_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x200c95b5 netlink_ack +EXPORT_SYMBOL vmlinux 0x200eae9d netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x2022d568 lro_receive_skb +EXPORT_SYMBOL vmlinux 0x202c1044 acpi_write +EXPORT_SYMBOL vmlinux 0x20301636 physical_node_map +EXPORT_SYMBOL vmlinux 0x208739f6 acpi_load_table +EXPORT_SYMBOL vmlinux 0x20eadeb6 ip_compute_csum +EXPORT_SYMBOL vmlinux 0x20f67904 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x211331fa __divsi3 +EXPORT_SYMBOL vmlinux 0x2158ddbb pci_bus_add_devices +EXPORT_SYMBOL vmlinux 0x215e22e8 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x2173e8df xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x21ba9e81 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0x21cacb0a dquot_commit_info +EXPORT_SYMBOL vmlinux 0x21d812a8 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x21e05e58 __kfifo_put +EXPORT_SYMBOL vmlinux 0x21e0ea22 acpi_get_id +EXPORT_SYMBOL vmlinux 0x21e68a08 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x220b09ef netdev_set_master +EXPORT_SYMBOL vmlinux 0x22175368 tty_port_close +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x22398c0e d_delete +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x227144e1 i2c_bit_add_bus +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22945432 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0x22994d1e blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0x22a1dd2e sysctl_data +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22aca413 wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x22b28043 km_state_expired +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22c7f2f4 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2335dcb8 eth_header_cache +EXPORT_SYMBOL vmlinux 0x233c957e dev_driver_string +EXPORT_SYMBOL vmlinux 0x234509f3 strncat +EXPORT_SYMBOL vmlinux 0x2352cccb pci_reenable_device +EXPORT_SYMBOL vmlinux 0x239d2636 d_alloc_root +EXPORT_SYMBOL vmlinux 0x23b1ce82 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0x23bc686d bio_phys_segments +EXPORT_SYMBOL vmlinux 0x23d44f17 __dev_remove_pack +EXPORT_SYMBOL vmlinux 0x23f94262 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x23fe6e6e qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x2414ec8f netif_device_detach +EXPORT_SYMBOL vmlinux 0x242d6041 add_wait_queue +EXPORT_SYMBOL vmlinux 0x2437685d _write_unlock +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24724830 sn_dma_flush +EXPORT_SYMBOL vmlinux 0x247ac8c2 input_register_handler +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x254dc85c km_report +EXPORT_SYMBOL vmlinux 0x2577f020 neigh_seq_start +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x25b4eb5e _read_lock_irq +EXPORT_SYMBOL vmlinux 0x25cf8049 matroxfb_PLL_calcclock +EXPORT_SYMBOL vmlinux 0x25f3bd20 xfrm_state_flush +EXPORT_SYMBOL vmlinux 0x25fd5b2f xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x264adc04 put_mnt_ns +EXPORT_SYMBOL vmlinux 0x26690ad6 eth_mac_addr +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x2685c3d7 __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x26dec5e7 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26f902ea fsync_bdev +EXPORT_SYMBOL vmlinux 0x270fb97d genphy_config_advert +EXPORT_SYMBOL vmlinux 0x271eae67 kobject_init +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x274e2f3f compat_sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x276eb330 xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x277673d8 smp_call_function_many +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x2788d94a dev_unicast_sync +EXPORT_SYMBOL vmlinux 0x27952c75 unregister_nls +EXPORT_SYMBOL vmlinux 0x27abd227 filemap_fault +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c33efe csum_ipv6_magic +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x28010f92 ida_pre_get +EXPORT_SYMBOL vmlinux 0x280235bd blk_stop_queue +EXPORT_SYMBOL vmlinux 0x2808f250 blk_rq_init +EXPORT_SYMBOL vmlinux 0x281330ef grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0x281da4f9 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x282b5899 _read_trylock +EXPORT_SYMBOL vmlinux 0x283e4df0 eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x285135e6 acpi_evaluate_integer +EXPORT_SYMBOL vmlinux 0x2858bd3b kernel_listen +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x2876a6d3 memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x28932537 sn_coherency_id +EXPORT_SYMBOL vmlinux 0x28ac735e devm_ioremap +EXPORT_SYMBOL vmlinux 0x28ac9b43 blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0x28bdc911 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x28ca096a xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0x28cd5180 alloc_disk_node +EXPORT_SYMBOL vmlinux 0x2912e71e per_cpu__cpu_info +EXPORT_SYMBOL vmlinux 0x2929bc7b journal_set_features +EXPORT_SYMBOL vmlinux 0x2930205a input_unregister_handler +EXPORT_SYMBOL vmlinux 0x294b81f1 do_splice_from +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x2978c054 per_cpu____sn_nodepda +EXPORT_SYMBOL vmlinux 0x297c7029 sn_partition_serial_number +EXPORT_SYMBOL vmlinux 0x29bca58f pcix_get_max_mmrbc +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29d791c4 blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0x29f54e88 pci_lost_interrupt +EXPORT_SYMBOL vmlinux 0x29fd6318 skb_put +EXPORT_SYMBOL vmlinux 0x2a21f78b iunique +EXPORT_SYMBOL vmlinux 0x2a303d4d check_signature +EXPORT_SYMBOL vmlinux 0x2a3b2a16 __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0x2a49abbb unw_access_gr +EXPORT_SYMBOL vmlinux 0x2a51b915 nf_afinfo +EXPORT_SYMBOL vmlinux 0x2a5465cf vmalloc_end +EXPORT_SYMBOL vmlinux 0x2a6bb2c8 mempool_free +EXPORT_SYMBOL vmlinux 0x2a900bd4 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x2ad2c5e3 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x2af1849d tc_classify +EXPORT_SYMBOL vmlinux 0x2b096bac netif_device_attach +EXPORT_SYMBOL vmlinux 0x2b448c2f ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0x2b4df3f3 security_inode_permission +EXPORT_SYMBOL vmlinux 0x2b554b9b remap_pfn_range +EXPORT_SYMBOL vmlinux 0x2b606088 ia64_pal_call_phys_static +EXPORT_SYMBOL vmlinux 0x2ba27583 sn_dma_set_mask +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bb3755e tty_name +EXPORT_SYMBOL vmlinux 0x2bb55d6e acpi_remove_notify_handler +EXPORT_SYMBOL vmlinux 0x2bbfdd04 commit_creds +EXPORT_SYMBOL vmlinux 0x2bd62284 seq_write +EXPORT_SYMBOL vmlinux 0x2bfa5519 skb_checksum_help +EXPORT_SYMBOL vmlinux 0x2bfeb410 acpi_get_handle +EXPORT_SYMBOL vmlinux 0x2c165548 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x2c2b7914 skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0x2c3bc747 tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x2c3fd49e inet_frag_destroy +EXPORT_SYMBOL vmlinux 0x2c44b8a3 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x2c45e424 serio_close +EXPORT_SYMBOL vmlinux 0x2c5749e6 acpi_clear_gpe +EXPORT_SYMBOL vmlinux 0x2c5ba3e2 block_prepare_write +EXPORT_SYMBOL vmlinux 0x2c6527d2 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x2c661fce mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0x2c748567 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x2c8d8a69 cpu_active_mask +EXPORT_SYMBOL vmlinux 0x2c9367fb mempool_create +EXPORT_SYMBOL vmlinux 0x2c9546e9 proto_unregister +EXPORT_SYMBOL vmlinux 0x2cb50f3a vfs_create +EXPORT_SYMBOL vmlinux 0x2ccd00c7 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x2cdcfcda follow_down +EXPORT_SYMBOL vmlinux 0x2ce1e27f __sn_mmiowb +EXPORT_SYMBOL vmlinux 0x2d1f0aa9 tty_hangup +EXPORT_SYMBOL vmlinux 0x2d291fb8 down_killable +EXPORT_SYMBOL vmlinux 0x2d4a5e28 bdi_init +EXPORT_SYMBOL vmlinux 0x2d5528c9 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x2d86269d input_register_handle +EXPORT_SYMBOL vmlinux 0x2d91b2c9 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x2d9d08af jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0x2dae63a7 mod_timer_pending +EXPORT_SYMBOL vmlinux 0x2dd16564 arch_register_cpu +EXPORT_SYMBOL vmlinux 0x2dd5a00e single_open +EXPORT_SYMBOL vmlinux 0x2dd6b6aa idr_pre_get +EXPORT_SYMBOL vmlinux 0x2dec1471 pci_remove_bus_device +EXPORT_SYMBOL vmlinux 0x2dedc4c2 acpi_format_exception +EXPORT_SYMBOL vmlinux 0x2df4da00 unlock_buffer +EXPORT_SYMBOL vmlinux 0x2df7f648 consume_skb +EXPORT_SYMBOL vmlinux 0x2dfcbe42 phy_connect +EXPORT_SYMBOL vmlinux 0x2e0ab42a pcix_get_mmrbc +EXPORT_SYMBOL vmlinux 0x2e0ba6a1 pci_bus_set_ops +EXPORT_SYMBOL vmlinux 0x2e11a002 xfrm_find_acq +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e6763a6 idr_find +EXPORT_SYMBOL vmlinux 0x2e8babd2 vmtruncate +EXPORT_SYMBOL vmlinux 0x2ea5f069 pci_dev_get +EXPORT_SYMBOL vmlinux 0x2eaf6023 sn_bus_store_sysdata +EXPORT_SYMBOL vmlinux 0x2ec86a2b ip_queue_xmit +EXPORT_SYMBOL vmlinux 0x2ee01f2e pci_unmap_rom +EXPORT_SYMBOL vmlinux 0x2ee93970 udp_poll +EXPORT_SYMBOL vmlinux 0x2ef3e1a6 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x2f0b40ae printk +EXPORT_SYMBOL vmlinux 0x2f367d8c xor_ia64_3 +EXPORT_SYMBOL vmlinux 0x2f3ee0c6 __kfree_skb +EXPORT_SYMBOL vmlinux 0x2f5ca56d remove_inode_hash +EXPORT_SYMBOL vmlinux 0x2f7f766e vprintk +EXPORT_SYMBOL vmlinux 0x2f8d22b5 kill_block_super +EXPORT_SYMBOL vmlinux 0x2ff063b5 acpi_get_name +EXPORT_SYMBOL vmlinux 0x30072459 lock_sock_nested +EXPORT_SYMBOL vmlinux 0x300cf440 pneigh_lookup +EXPORT_SYMBOL vmlinux 0x301271da udplite_table +EXPORT_SYMBOL vmlinux 0x303a746a i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x304792db pci_select_bars +EXPORT_SYMBOL vmlinux 0x3058e6aa __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x30649965 journal_update_format +EXPORT_SYMBOL vmlinux 0x306a6064 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x307f7776 timecompare_offset +EXPORT_SYMBOL vmlinux 0x309e96ef pci_set_dma_seg_boundary +EXPORT_SYMBOL vmlinux 0x309f2a61 dev_set_mtu +EXPORT_SYMBOL vmlinux 0x30a4ea3a blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x30b8f32a dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0x30c9a519 page_symlink +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30ffe1f7 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x31004a27 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0x312166a1 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0x31226542 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x3132afc7 pci_request_regions +EXPORT_SYMBOL vmlinux 0x3145216f pci_dev_present +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x3154325c dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x31662a2d pci_enable_msix +EXPORT_SYMBOL vmlinux 0x3178a22d compat_nf_getsockopt +EXPORT_SYMBOL vmlinux 0x317b04d1 blk_start_request +EXPORT_SYMBOL vmlinux 0x31aeec86 netdev_features_change +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31e800ea tty_register_driver +EXPORT_SYMBOL vmlinux 0x31ebadcd in_group_p +EXPORT_SYMBOL vmlinux 0x31f06ddb fb_blank +EXPORT_SYMBOL vmlinux 0x32047ad5 __per_cpu_offset +EXPORT_SYMBOL vmlinux 0x32093cc7 __udivdi3 +EXPORT_SYMBOL vmlinux 0x322ca4d1 task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x323f9992 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x3269a83f find_lock_page +EXPORT_SYMBOL vmlinux 0x3269d930 unw_init_frame_info +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x329d5c13 acpi_bus_unregister_driver +EXPORT_SYMBOL vmlinux 0x329edc9e tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x32d01fec acpi_attach_data +EXPORT_SYMBOL vmlinux 0x334574bf sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0x334a493b __register_binfmt +EXPORT_SYMBOL vmlinux 0x335d2b95 udplite_prot +EXPORT_SYMBOL vmlinux 0x336d1022 unw_unwind_to_user +EXPORT_SYMBOL vmlinux 0x339c7454 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x33b120a1 simple_fsync +EXPORT_SYMBOL vmlinux 0x33b84f74 copy_page +EXPORT_SYMBOL vmlinux 0x33e19b57 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x343da08c __wake_up_bit +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x3470b9e2 down_write_trylock +EXPORT_SYMBOL vmlinux 0x347c5909 blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x34ac3bd5 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x34b70538 sk_stream_error +EXPORT_SYMBOL vmlinux 0x34dd08f7 key_revoke +EXPORT_SYMBOL vmlinux 0x34df1d11 tcp_poll +EXPORT_SYMBOL vmlinux 0x34e69387 netpoll_setup +EXPORT_SYMBOL vmlinux 0x358227c2 netlink_unicast +EXPORT_SYMBOL vmlinux 0x3590a167 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x35a04e3d blk_insert_request +EXPORT_SYMBOL vmlinux 0x35ab58b1 blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0x35b0650f vsnprintf +EXPORT_SYMBOL vmlinux 0x35bf18bf kernel_accept +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35c6b73d jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x35cd4a1b kmem_cache_create +EXPORT_SYMBOL vmlinux 0x35d523b2 generic_write_end +EXPORT_SYMBOL vmlinux 0x35ed9a71 arp_tbl +EXPORT_SYMBOL vmlinux 0x3602b310 input_close_device +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x36139a51 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0x3628d65e mutex_lock +EXPORT_SYMBOL vmlinux 0x36521f98 nf_register_hook +EXPORT_SYMBOL vmlinux 0x3656bf5a lock_kernel +EXPORT_SYMBOL vmlinux 0x36875389 __timecompare_update +EXPORT_SYMBOL vmlinux 0x36e1fcb2 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x36f57402 pcie_get_readrq +EXPORT_SYMBOL vmlinux 0x3717dbf9 ia64_pfn_valid +EXPORT_SYMBOL vmlinux 0x37312d96 __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x37452221 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x37542a16 blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x375465a7 radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x3762cb6e ioremap_nocache +EXPORT_SYMBOL vmlinux 0x379bde52 d_instantiate +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x380ee061 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0x38174706 acpi_get_physical_device +EXPORT_SYMBOL vmlinux 0x38397189 proc_mkdir +EXPORT_SYMBOL vmlinux 0x3853ffb3 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x386dc3cc ia64_sal_oemcall_nolock +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x3891efb7 inet_register_protosw +EXPORT_SYMBOL vmlinux 0x389ca9ad skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x38b8e2af inet_ioctl +EXPORT_SYMBOL vmlinux 0x38b92846 llc_remove_pack +EXPORT_SYMBOL vmlinux 0x38cc1a5d nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x38d7b13c dquot_commit +EXPORT_SYMBOL vmlinux 0x3912ee1f arp_broken_ops +EXPORT_SYMBOL vmlinux 0x391f5640 arp_xmit +EXPORT_SYMBOL vmlinux 0x393e4031 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x3944299e jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x39495f7f get_phy_id +EXPORT_SYMBOL vmlinux 0x39518b1c tcp_tso_segment +EXPORT_SYMBOL vmlinux 0x395b867c ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x3972dd5f elevator_init +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39c16f1e release_firmware +EXPORT_SYMBOL vmlinux 0x39d39dfc journal_forget +EXPORT_SYMBOL vmlinux 0x39da7124 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0x39e884c4 matroxfb_unregister_driver +EXPORT_SYMBOL vmlinux 0x3a09977a __mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a3341f2 sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x3a350885 __brelse +EXPORT_SYMBOL vmlinux 0x3a3d86bd tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x3a5476d0 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0x3a67efac blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0x3a684878 tcp_child_process +EXPORT_SYMBOL vmlinux 0x3a83e17f pci_bus_size_bridges +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3abbbc60 lro_receive_frags +EXPORT_SYMBOL vmlinux 0x3adb10e6 cpu_all_bits +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3aed7527 isa_irq_to_vector_map +EXPORT_SYMBOL vmlinux 0x3b2d6e02 bioset_create +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b404586 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0x3b4732ed mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0x3b5ce37e jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x3b78cd1a rwsem_down_read_failed +EXPORT_SYMBOL vmlinux 0x3b7c1ba7 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x3b974784 dentry_open +EXPORT_SYMBOL vmlinux 0x3bc96c56 dquot_drop +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3bed391e may_umount_tree +EXPORT_SYMBOL vmlinux 0x3bf11370 devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x3c01b2af journal_clear_err +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c4a3b12 jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cc29e2d bd_claim +EXPORT_SYMBOL vmlinux 0x3cceaa1c pci_bus_read_config_dword +EXPORT_SYMBOL vmlinux 0x3cdde3b7 ia64_ivt +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3d18763c _read_lock_irqsave +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d8728bb memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x3d9ee9f0 clear_page +EXPORT_SYMBOL vmlinux 0x3da4c3d8 generic_readlink +EXPORT_SYMBOL vmlinux 0x3db2e258 radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x3db3417c journal_wipe +EXPORT_SYMBOL vmlinux 0x3de11207 bio_sector_offset +EXPORT_SYMBOL vmlinux 0x3e0515b4 kobject_add +EXPORT_SYMBOL vmlinux 0x3e06d9f9 __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0x3e2ae3a8 acpi_release_global_lock +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e7576bf dma_ops +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3ee342e8 keyring_search +EXPORT_SYMBOL vmlinux 0x3f0546a8 ioread32_rep +EXPORT_SYMBOL vmlinux 0x3f2607ff blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0x3f3374b8 put_tty_driver +EXPORT_SYMBOL vmlinux 0x3f37e74b kernel_bind +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f63ce49 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x3f6bc633 __do_clear_user +EXPORT_SYMBOL vmlinux 0x3fa03a97 memset +EXPORT_SYMBOL vmlinux 0x3fa913da strspn +EXPORT_SYMBOL vmlinux 0x3fb03e9d jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0x3fb79d2c backlight_device_register +EXPORT_SYMBOL vmlinux 0x3fb8ad09 pci_scan_slot +EXPORT_SYMBOL vmlinux 0x3fbe3378 idr_get_new_above +EXPORT_SYMBOL vmlinux 0x3fe11d88 set_disk_ro +EXPORT_SYMBOL vmlinux 0x3fec048f sg_next +EXPORT_SYMBOL vmlinux 0x3fece6b3 block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x3fee2ebd neigh_table_clear +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x400bb4dd __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x401c848c get_sb_bdev +EXPORT_SYMBOL vmlinux 0x402a95fc sk_common_release +EXPORT_SYMBOL vmlinux 0x404d4bfe ia64_mv +EXPORT_SYMBOL vmlinux 0x404fc8fc register_snap_client +EXPORT_SYMBOL vmlinux 0x405185eb simple_link +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x4070a857 tcp_read_sock +EXPORT_SYMBOL vmlinux 0x408f5686 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x4097fa45 acpi_read_bit_register +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40c89d46 acpi_get_table_by_index +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x411d9250 filp_open +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x41612ad6 __put_cred +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x416e9329 fifo_set_limit +EXPORT_SYMBOL vmlinux 0x416fb9e0 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x41745895 block_write_end +EXPORT_SYMBOL vmlinux 0x417ff5c5 ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x41d42b23 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x41d512f8 vfs_fstat +EXPORT_SYMBOL vmlinux 0x41db3917 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0x41dd7ac7 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x41df5a2c i2c_del_adapter +EXPORT_SYMBOL vmlinux 0x41f97e03 lock_fb_info +EXPORT_SYMBOL vmlinux 0x4209c292 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422c05d0 acpi_get_data +EXPORT_SYMBOL vmlinux 0x42677763 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x428c8d73 llc_sap_list_lock +EXPORT_SYMBOL vmlinux 0x42a4bdf2 in_egroup_p +EXPORT_SYMBOL vmlinux 0x42acbf72 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x42d567d9 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x42f4a6d8 d_rehash +EXPORT_SYMBOL vmlinux 0x42f4f040 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x42fe6467 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43385ad9 acpi_pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4362bfde blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x436c2179 iowrite32 +EXPORT_SYMBOL vmlinux 0x4383420d compat_ip_getsockopt +EXPORT_SYMBOL vmlinux 0x439090b9 kernel_thread +EXPORT_SYMBOL vmlinux 0x43937c86 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x43a4938f vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x43a952f7 kernel_getsockname +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43c2eab5 vfs_lstat +EXPORT_SYMBOL vmlinux 0x43e3e665 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x43e599f9 kern_path +EXPORT_SYMBOL vmlinux 0x43ec913a put_cmsg +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x443d6bb7 posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0x4445d704 tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x444a2e62 register_gifconf +EXPORT_SYMBOL vmlinux 0x446a8c57 cpu_to_node_map +EXPORT_SYMBOL vmlinux 0x446f6122 sync_blockdev +EXPORT_SYMBOL vmlinux 0x447ae5a8 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0x4492c10e __getblk +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44c31b95 module_refcount +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44ead684 find_inode_number +EXPORT_SYMBOL vmlinux 0x44f659fd nf_getsockopt +EXPORT_SYMBOL vmlinux 0x453c8403 pci_msi_enabled +EXPORT_SYMBOL vmlinux 0x45480e80 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x454fb519 ioremap +EXPORT_SYMBOL vmlinux 0x4550ba8a register_cpu_notifier +EXPORT_SYMBOL vmlinux 0x45657ef4 netpoll_poll +EXPORT_SYMBOL vmlinux 0x45704798 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x4572eaf2 pci_get_slot +EXPORT_SYMBOL vmlinux 0x45731333 tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45b5a9b6 per_cpu____sn_cnodeid_to_nasid +EXPORT_SYMBOL vmlinux 0x45d4162f bdput +EXPORT_SYMBOL vmlinux 0x45d8000a downgrade_write +EXPORT_SYMBOL vmlinux 0x45e8a39e nf_setsockopt +EXPORT_SYMBOL vmlinux 0x45f2d60a generic_file_splice_read +EXPORT_SYMBOL vmlinux 0x45fc90f3 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x460d76af tcp_parse_options +EXPORT_SYMBOL vmlinux 0x4653ef02 tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x46541009 pcim_iomap_regions_request_all +EXPORT_SYMBOL vmlinux 0x467b5fac bdevname +EXPORT_SYMBOL vmlinux 0x4696be0a wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x46990cf2 security_inode_init_security +EXPORT_SYMBOL vmlinux 0x46a9e3ef journal_start +EXPORT_SYMBOL vmlinux 0x46d9cefe __percpu_counter_init +EXPORT_SYMBOL vmlinux 0x46f2e76d vc_cons +EXPORT_SYMBOL vmlinux 0x46f70180 make_EII_client +EXPORT_SYMBOL vmlinux 0x4707205d tty_set_operations +EXPORT_SYMBOL vmlinux 0x47208320 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x47297f48 dma_get_cache_alignment +EXPORT_SYMBOL vmlinux 0x473d9d5d qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x475f010b acpi_purge_cached_objects +EXPORT_SYMBOL vmlinux 0x47636033 swiotlb +EXPORT_SYMBOL vmlinux 0x479c3c86 find_next_zero_bit +EXPORT_SYMBOL vmlinux 0x47afb5bb dev_get_flags +EXPORT_SYMBOL vmlinux 0x47fe0886 swiotlb_dma_mapping_error +EXPORT_SYMBOL vmlinux 0x481cb9ab acpi_enter_sleep_state_prep +EXPORT_SYMBOL vmlinux 0x483079b6 put_disk +EXPORT_SYMBOL vmlinux 0x4844d110 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0x485694fb path_get +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x48879577 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0x48964342 i2c_transfer +EXPORT_SYMBOL vmlinux 0x48a3ef19 dquot_alloc +EXPORT_SYMBOL vmlinux 0x48eace6f proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x48ef40fa tcp_proc_register +EXPORT_SYMBOL vmlinux 0x48fffdb1 ia64_pal_call_phys_stacked +EXPORT_SYMBOL vmlinux 0x495dcc30 simple_transaction_get +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49791c6d tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x49806b32 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0x4987d273 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x49be7eda pci_release_regions +EXPORT_SYMBOL vmlinux 0x49bec7e7 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x49e3a369 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x4a15eaff dst_alloc +EXPORT_SYMBOL vmlinux 0x4a2e39f2 wait_for_completion +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a4bf8ec tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x4a541e2a __umoddi3 +EXPORT_SYMBOL vmlinux 0x4a82bac5 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x4a866e7e ia64_sal_oemcall +EXPORT_SYMBOL vmlinux 0x4a8e9463 nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0x4abdf5ce tcf_exts_change +EXPORT_SYMBOL vmlinux 0x4acd93d3 release_resource +EXPORT_SYMBOL vmlinux 0x4ae611ae unw_access_br +EXPORT_SYMBOL vmlinux 0x4af2ece6 i2c_del_driver +EXPORT_SYMBOL vmlinux 0x4b26457f per_cpu__kstat +EXPORT_SYMBOL vmlinux 0x4b282360 pci_find_capability +EXPORT_SYMBOL vmlinux 0x4b5f7ac5 jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0x4b6b262e open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0x4b6eeec9 ether_setup +EXPORT_SYMBOL vmlinux 0x4b837e26 skb_make_writable +EXPORT_SYMBOL vmlinux 0x4ba45b6e unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x4baa278b journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bece361 skb_clone +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c273b7f pci_save_state +EXPORT_SYMBOL vmlinux 0x4c27867b user_revoke +EXPORT_SYMBOL vmlinux 0x4c4c956e nla_memcmp +EXPORT_SYMBOL vmlinux 0x4c4d3e9a mdiobus_scan +EXPORT_SYMBOL vmlinux 0x4c74908a __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x4c7bb843 mdiobus_write +EXPORT_SYMBOL vmlinux 0x4c93389e tty_throttle +EXPORT_SYMBOL vmlinux 0x4c9e0190 acpi_bus_generate_proc_event +EXPORT_SYMBOL vmlinux 0x4c9f3562 vfs_link +EXPORT_SYMBOL vmlinux 0x4cab8ba6 new_inode +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4ce9ffe3 kmem_cache_name +EXPORT_SYMBOL vmlinux 0x4cf2bfee bio_endio +EXPORT_SYMBOL vmlinux 0x4d1b96ad send_sig +EXPORT_SYMBOL vmlinux 0x4d446826 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0x4d6dc3e1 _read_unlock_bh +EXPORT_SYMBOL vmlinux 0x4db04488 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dc6d89f search_binary_handler +EXPORT_SYMBOL vmlinux 0x4dcdac39 kthread_stop +EXPORT_SYMBOL vmlinux 0x4dda726b match_strlcpy +EXPORT_SYMBOL vmlinux 0x4de98456 pipe_to_file +EXPORT_SYMBOL vmlinux 0x4dea92fe d_prune_aliases +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e26d8c8 blk_requeue_request +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e491fb2 inode_init_always +EXPORT_SYMBOL vmlinux 0x4e4e635f d_genocide +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e6f5ef4 register_con_driver +EXPORT_SYMBOL vmlinux 0x4e9dffb5 ip_fast_csum +EXPORT_SYMBOL vmlinux 0x4edd72f7 block_all_signals +EXPORT_SYMBOL vmlinux 0x4efd5df6 kset_register +EXPORT_SYMBOL vmlinux 0x4f0cfaf9 up +EXPORT_SYMBOL vmlinux 0x4f0d3850 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0x4f24e320 mdiobus_register +EXPORT_SYMBOL vmlinux 0x4f3089de request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x4f5438c1 idle_halt +EXPORT_SYMBOL vmlinux 0x4f70ff21 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x4f71c1f5 udp_ioctl +EXPORT_SYMBOL vmlinux 0x4f72d2b7 get_phy_device +EXPORT_SYMBOL vmlinux 0x4f9f876c sock_create_kern +EXPORT_SYMBOL vmlinux 0x4fdee897 i8042_command +EXPORT_SYMBOL vmlinux 0x4fe50e3e ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x500871a5 request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x500adbac vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0x50145436 journal_force_commit +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5022858e init_buffer +EXPORT_SYMBOL vmlinux 0x5050e815 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0x505777a6 rtnl_notify +EXPORT_SYMBOL vmlinux 0x505c0bbe udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0x506019f8 compat_sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x5076959c inet_frag_find +EXPORT_SYMBOL vmlinux 0x5088d492 skb_unlink +EXPORT_SYMBOL vmlinux 0x50a20ee9 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x50b1f808 tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x50d1d102 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0x50d2acbc gen_pool_free +EXPORT_SYMBOL vmlinux 0x50d56018 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0x51459bd6 hp_acpi_csr_space +EXPORT_SYMBOL vmlinux 0x515837da inode_get_bytes +EXPORT_SYMBOL vmlinux 0x51712a71 xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0x5182e3e1 vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x5187923f skb_trim +EXPORT_SYMBOL vmlinux 0x51a637f2 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0x51cfb77b bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x51cfc94c vfs_rename +EXPORT_SYMBOL vmlinux 0x51d54c32 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0x51d7a776 acpi_detach_data +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51dd000b skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x520db7ed sock_sendmsg +EXPORT_SYMBOL vmlinux 0x52551c13 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x52687873 mark_page_accessed +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x52780ec0 input_set_keycode +EXPORT_SYMBOL vmlinux 0x5279b999 sock_create_lite +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52a79a0a blk_init_queue +EXPORT_SYMBOL vmlinux 0x52b89d2c wake_up_process +EXPORT_SYMBOL vmlinux 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL vmlinux 0x52dc365d drop_super +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x5311037c ia64_sal_oemcall_reentrant +EXPORT_SYMBOL vmlinux 0x532b93e2 per_cpu__local_per_cpu_offset +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x53528e5a ida_get_new +EXPORT_SYMBOL vmlinux 0x535445f5 inet_bind +EXPORT_SYMBOL vmlinux 0x536d117b replace_mount_options +EXPORT_SYMBOL vmlinux 0x537bc3de udp_prot +EXPORT_SYMBOL vmlinux 0x53855f1b inet_add_protocol +EXPORT_SYMBOL vmlinux 0x539323b9 phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53f29cd7 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x53f66cf3 _write_unlock_irq +EXPORT_SYMBOL vmlinux 0x53f94013 tty_mutex +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x54e5f6c1 pci_unregister_driver +EXPORT_SYMBOL vmlinux 0x54e695e1 tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x5507c373 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x55139406 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0x551bb6bd skb_pull +EXPORT_SYMBOL vmlinux 0x552fb179 blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x554f0a48 groups_alloc +EXPORT_SYMBOL vmlinux 0x55818225 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x560be764 d_move +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x562f95d1 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x563b0411 __kill_fasync +EXPORT_SYMBOL vmlinux 0x5643e985 touch_atime +EXPORT_SYMBOL vmlinux 0x565946e1 mod_zone_page_state +EXPORT_SYMBOL vmlinux 0x567e68ac blkdev_put +EXPORT_SYMBOL vmlinux 0x56a10763 csum_tcpudp_magic +EXPORT_SYMBOL vmlinux 0x56c498ff dev_get_stats +EXPORT_SYMBOL vmlinux 0x56ca38ff _spin_lock_irq +EXPORT_SYMBOL vmlinux 0x56e0b2ca ip_route_input +EXPORT_SYMBOL vmlinux 0x56f38712 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x56f494e0 smp_call_function +EXPORT_SYMBOL vmlinux 0x5709b47d netpoll_cleanup +EXPORT_SYMBOL vmlinux 0x571261a3 dev_set_mac_address +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x575ea7c4 _spin_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x576d1967 input_free_device +EXPORT_SYMBOL vmlinux 0x577ca98a skb_dequeue +EXPORT_SYMBOL vmlinux 0x57965127 invalidate_bdev +EXPORT_SYMBOL vmlinux 0x57abf1c7 bte_unaligned_copy +EXPORT_SYMBOL vmlinux 0x57ac75da bio_integrity_advance +EXPORT_SYMBOL vmlinux 0x57af76aa sock_no_poll +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57bd1b37 ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x57ca9a3d set_groups +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x5805b2e2 skb_copy_bits +EXPORT_SYMBOL vmlinux 0x580bc19c phy_stop +EXPORT_SYMBOL vmlinux 0x58129755 insert_inode_locked +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x584c28dc xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0x584e8894 fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x5857b225 ioread16_rep +EXPORT_SYMBOL vmlinux 0x586aea5c blk_get_request +EXPORT_SYMBOL vmlinux 0x587cc1c0 eth_header +EXPORT_SYMBOL vmlinux 0x5880960d key_validate +EXPORT_SYMBOL vmlinux 0x589bbe73 security_path_mknod +EXPORT_SYMBOL vmlinux 0x58b64326 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0x58efa70e block_write_full_page +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x594c25f1 down_read_trylock +EXPORT_SYMBOL vmlinux 0x594e1317 __modsi3 +EXPORT_SYMBOL vmlinux 0x597b81f4 __blk_end_request +EXPORT_SYMBOL vmlinux 0x59825c08 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0x5984ee52 d_lookup +EXPORT_SYMBOL vmlinux 0x598bd4d2 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0x59989ed6 nf_log_register +EXPORT_SYMBOL vmlinux 0x59bc9609 acpi_write_bit_register +EXPORT_SYMBOL vmlinux 0x59be9d9a blk_complete_request +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59ecb9b0 matrox_millennium +EXPORT_SYMBOL vmlinux 0x59f3b3dc nf_log_packet +EXPORT_SYMBOL vmlinux 0x59f95626 skb_split +EXPORT_SYMBOL vmlinux 0x59ff1d1b make_bad_inode +EXPORT_SYMBOL vmlinux 0x5a14f4a2 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x5a217cb7 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0x5a34a45c __kmalloc +EXPORT_SYMBOL vmlinux 0x5a5e7ea3 simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5a7db0c7 vfs_writev +EXPORT_SYMBOL vmlinux 0x5ac376a5 acpi_install_fixed_event_handler +EXPORT_SYMBOL vmlinux 0x5acfdf1c dmam_pool_create +EXPORT_SYMBOL vmlinux 0x5ada51e4 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x5b51c6a7 acpi_walk_resources +EXPORT_SYMBOL vmlinux 0x5b563526 tioca_fastwrite_enable +EXPORT_SYMBOL vmlinux 0x5b64f394 sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x5b705e8d inet_release +EXPORT_SYMBOL vmlinux 0x5b71d29a netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b961e0d cfb_fillrect +EXPORT_SYMBOL vmlinux 0x5ba95b69 bmap +EXPORT_SYMBOL vmlinux 0x5bae2eac acpi_extract_package +EXPORT_SYMBOL vmlinux 0x5bdc03ce poll_initwait +EXPORT_SYMBOL vmlinux 0x5bf1865c load_nls_default +EXPORT_SYMBOL vmlinux 0x5c009f1b ip_setsockopt +EXPORT_SYMBOL vmlinux 0x5c22877a bdi_register +EXPORT_SYMBOL vmlinux 0x5c37d35d napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x5c4e5b7e interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x5c63505a tcp_splice_read +EXPORT_SYMBOL vmlinux 0x5c826c1d register_framebuffer +EXPORT_SYMBOL vmlinux 0x5c82e80d serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x5cc8e015 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0x5cccb30d sync_page_range +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d45c0d9 ida_init +EXPORT_SYMBOL vmlinux 0x5d4efeed security_path_mkdir +EXPORT_SYMBOL vmlinux 0x5d5bee75 d_add_ci +EXPORT_SYMBOL vmlinux 0x5d5d32a7 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x5d74dbcf pnp_range_reserved +EXPORT_SYMBOL vmlinux 0x5d7840e4 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x5d82c603 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x5da397df pipe_unlock +EXPORT_SYMBOL vmlinux 0x5dbbe98e memmove +EXPORT_SYMBOL vmlinux 0x5dc4583c __percpu_counter_add +EXPORT_SYMBOL vmlinux 0x5dcfc377 DAC1064_global_restore +EXPORT_SYMBOL vmlinux 0x5dd69a55 unregister_qdisc +EXPORT_SYMBOL vmlinux 0x5e2ea00a alloc_file +EXPORT_SYMBOL vmlinux 0x5e42c140 genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x5e8f4f82 sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x5e930ee9 swiotlb_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ea58383 pci_remove_bus +EXPORT_SYMBOL vmlinux 0x5ebbfe2d get_sb_ns +EXPORT_SYMBOL vmlinux 0x5ed5de05 lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5edfa8d0 pcie_set_readrq +EXPORT_SYMBOL vmlinux 0x5ef83a1d generic_read_dir +EXPORT_SYMBOL vmlinux 0x5f1d03fa acpi_lock_battery_dir +EXPORT_SYMBOL vmlinux 0x5f569e57 blk_init_tags +EXPORT_SYMBOL vmlinux 0x5f7b2a42 blk_put_request +EXPORT_SYMBOL vmlinux 0x5f7bd03e dquot_free_inode +EXPORT_SYMBOL vmlinux 0x5fdebf99 blk_make_request +EXPORT_SYMBOL vmlinux 0x5fe4bbb3 swiotlb_unmap_sg_attrs +EXPORT_SYMBOL vmlinux 0x5fe54823 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0x5ffc67fd xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x6022c3d4 sk_reset_timer +EXPORT_SYMBOL vmlinux 0x602ed00d acpi_current_gpe_count +EXPORT_SYMBOL vmlinux 0x605c8bde radix_tree_delete +EXPORT_SYMBOL vmlinux 0x6067a146 memcpy +EXPORT_SYMBOL vmlinux 0x606e259d generic_getxattr +EXPORT_SYMBOL vmlinux 0x608e59db matroxfb_vgaHWinit +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60bcbe23 thaw_bdev +EXPORT_SYMBOL vmlinux 0x60d68530 kernel_getpeername +EXPORT_SYMBOL vmlinux 0x60ed0a74 __pci_register_driver +EXPORT_SYMBOL vmlinux 0x611706bf vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x61200ccf phy_print_status +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x6125099b vfs_llseek +EXPORT_SYMBOL vmlinux 0x613523bd __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x614538b7 lock_may_read +EXPORT_SYMBOL vmlinux 0x615a93f3 names_cachep +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61a83321 acpi_bus_get_status +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61bf798e default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x61f331cc abort_creds +EXPORT_SYMBOL vmlinux 0x62049256 acpi_disable +EXPORT_SYMBOL vmlinux 0x620f6ad3 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x6237f6b5 acpi_enable_event +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x62748e70 acpi_set_current_resources +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x629fe9c3 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x62b2cd67 pci_scan_bridge +EXPORT_SYMBOL vmlinux 0x62bdfc7f pci_assign_resource +EXPORT_SYMBOL vmlinux 0x62d90111 serio_reconnect +EXPORT_SYMBOL vmlinux 0x62f32c04 node_to_cpu_mask +EXPORT_SYMBOL vmlinux 0x62fc065e sysctl_string +EXPORT_SYMBOL vmlinux 0x631223eb efi_mem_attributes +EXPORT_SYMBOL vmlinux 0x636a5691 acpi_register_ioapic +EXPORT_SYMBOL vmlinux 0x636dcae4 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x63c0ff56 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x63dabf06 dev_remove_pack +EXPORT_SYMBOL vmlinux 0x63e9a893 pci_disable_device +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x6407f97f fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x641b79dc tr_type_trans +EXPORT_SYMBOL vmlinux 0x6421f2de pskb_copy +EXPORT_SYMBOL vmlinux 0x6462177c eth_validate_addr +EXPORT_SYMBOL vmlinux 0x6466130a pci_bus_write_config_dword +EXPORT_SYMBOL vmlinux 0x64747214 init_task +EXPORT_SYMBOL vmlinux 0x6478134c ec_burst_enable +EXPORT_SYMBOL vmlinux 0x64837f54 fb_pan_display +EXPORT_SYMBOL vmlinux 0x648b205f simple_transaction_set +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x65022a24 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x651874c3 journal_destroy +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x651ba877 block_invalidatepage +EXPORT_SYMBOL vmlinux 0x6523aa08 kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x65259bc9 pci_scan_single_device +EXPORT_SYMBOL vmlinux 0x653c14bf neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x657bb342 __mutex_init +EXPORT_SYMBOL vmlinux 0x657fbfa6 mpage_writepage +EXPORT_SYMBOL vmlinux 0x65c3d14d input_event +EXPORT_SYMBOL vmlinux 0x65d71a28 inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x65e4440a phy_disconnect +EXPORT_SYMBOL vmlinux 0x65eb5ada i2c_use_client +EXPORT_SYMBOL vmlinux 0x65ee7531 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0x65f163c5 vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x65f8cd82 tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x65fe9038 km_policy_notify +EXPORT_SYMBOL vmlinux 0x6623c01f dma_pool_create +EXPORT_SYMBOL vmlinux 0x662ee8c1 pci_find_next_bus +EXPORT_SYMBOL vmlinux 0x66568d23 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x66760cdd per_cpu____sn_hub_info +EXPORT_SYMBOL vmlinux 0x668a7507 sn_acpi_slot_fixup +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66a6f369 free_netdev +EXPORT_SYMBOL vmlinux 0x66b2b973 pci_enable_device_io +EXPORT_SYMBOL vmlinux 0x66b6031a blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x66c39dbe ps2_drain +EXPORT_SYMBOL vmlinux 0x66cafed6 fifo_create_dflt +EXPORT_SYMBOL vmlinux 0x66e4315b km_new_mapping +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x672144bd strlcpy +EXPORT_SYMBOL vmlinux 0x673aa1de rwsem_wake +EXPORT_SYMBOL vmlinux 0x673c2e4c tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x67402035 generic_file_aio_write +EXPORT_SYMBOL vmlinux 0x67559812 vmap +EXPORT_SYMBOL vmlinux 0x6767878f tcp_gro_complete +EXPORT_SYMBOL vmlinux 0x6770b0aa jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x679d5cb9 sock_create +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67e81849 netdev_state_change +EXPORT_SYMBOL vmlinux 0x67ebaffd mpage_readpages +EXPORT_SYMBOL vmlinux 0x67ee80cb __nla_reserve +EXPORT_SYMBOL vmlinux 0x6820fe38 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x6859f840 i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x68671834 ps2_command +EXPORT_SYMBOL vmlinux 0x68bffe1b sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x68cd1238 bte_copy +EXPORT_SYMBOL vmlinux 0x68dbe949 pci_request_selected_regions +EXPORT_SYMBOL vmlinux 0x68ed2583 d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x68fb67b1 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x6906e1c8 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0x69148f78 llc_sap_find +EXPORT_SYMBOL vmlinux 0x692540eb skb_queue_purge +EXPORT_SYMBOL vmlinux 0x6926d02a serio_unregister_driver +EXPORT_SYMBOL vmlinux 0x69515078 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x695234e3 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0x695b3116 simple_sync_file +EXPORT_SYMBOL vmlinux 0x69609134 napi_get_frags +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69a0ca7d iowrite16be +EXPORT_SYMBOL vmlinux 0x69a358a6 iomem_resource +EXPORT_SYMBOL vmlinux 0x69aff97b journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d2575f efi +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x6a03560a complete_and_exit +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a0a76ac inode_change_ok +EXPORT_SYMBOL vmlinux 0x6a151a29 tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x6a354670 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a508a4c __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x6a5fa363 sigprocmask +EXPORT_SYMBOL vmlinux 0x6a6c756b generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0x6acb973d iowrite32be +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad85887 acpi_enable_gpe +EXPORT_SYMBOL vmlinux 0x6add5c9a dmi_find_device +EXPORT_SYMBOL vmlinux 0x6adf2006 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x6b151d9b cdev_del +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b2b68bd blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b4e5a52 radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x6b6f3ca7 dcache_readdir +EXPORT_SYMBOL vmlinux 0x6b71ad9f inet_stream_connect +EXPORT_SYMBOL vmlinux 0x6bc56c67 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6be4baf9 dquot_free_space +EXPORT_SYMBOL vmlinux 0x6c12c94a ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x6c2fe2e5 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0x6c389761 acpi_bus_get_private_data +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c6650d2 genphy_update_link +EXPORT_SYMBOL vmlinux 0x6c6c19d9 compat_sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c85f8b1 blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0x6c88cc60 __lookup_one_len +EXPORT_SYMBOL vmlinux 0x6c98cd6e kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x6c9ed198 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0x6ca862cd pci_get_subsys +EXPORT_SYMBOL vmlinux 0x6cb734ef __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x6cd38b60 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x6cfe53d1 default_llseek +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d551978 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x6d56019b pci_scan_bus_parented +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d72b31e netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x6d77f839 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0x6d824298 _read_lock_bh +EXPORT_SYMBOL vmlinux 0x6d9914f5 no_llseek +EXPORT_SYMBOL vmlinux 0x6da6d97f cpu_mask_all +EXPORT_SYMBOL vmlinux 0x6dc2d762 key_type_keyring +EXPORT_SYMBOL vmlinux 0x6dce9f35 acpi_enter_sleep_state +EXPORT_SYMBOL vmlinux 0x6de6bf83 radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e07a54e acpi_get_gpe_status +EXPORT_SYMBOL vmlinux 0x6e1293cf end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x6e160f4f fget +EXPORT_SYMBOL vmlinux 0x6e45208f sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x6e460c65 tty_write_room +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6ec6cfd7 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x6ecb6645 dcache_lock +EXPORT_SYMBOL vmlinux 0x6edff1f7 __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x6f45f1ff jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x6f556bdb acpi_get_gpe_device +EXPORT_SYMBOL vmlinux 0x6f7efd55 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x6fcb87a1 touch_softlockup_watchdog +EXPORT_SYMBOL vmlinux 0x70173a03 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0x70352526 security_d_instantiate +EXPORT_SYMBOL vmlinux 0x70633e34 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x706ac583 acpi_bus_start +EXPORT_SYMBOL vmlinux 0x7075f723 dqget +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70c209f8 registered_fb +EXPORT_SYMBOL vmlinux 0x70d8ab82 acpi_acquire_global_lock +EXPORT_SYMBOL vmlinux 0x70e2008b ip_fragment +EXPORT_SYMBOL vmlinux 0x70f06354 journal_abort +EXPORT_SYMBOL vmlinux 0x70f21a92 tty_vhangup +EXPORT_SYMBOL vmlinux 0x70fac277 redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0x710b0537 tcp_ioctl +EXPORT_SYMBOL vmlinux 0x711d4a90 input_inject_event +EXPORT_SYMBOL vmlinux 0x7121e234 sn_generate_path +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x715ca751 skb_queue_head +EXPORT_SYMBOL vmlinux 0x71740b82 generic_fillattr +EXPORT_SYMBOL vmlinux 0x7196b9e6 dquot_initialize +EXPORT_SYMBOL vmlinux 0x71993310 end_buffer_async_write +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71ab0362 set_irq_chip +EXPORT_SYMBOL vmlinux 0x71d2cfa2 ipv4_specific +EXPORT_SYMBOL vmlinux 0x71ecd8af input_set_capability +EXPORT_SYMBOL vmlinux 0x71f6eb38 sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x720532c1 kset_unregister +EXPORT_SYMBOL vmlinux 0x72244d6f napi_gro_receive +EXPORT_SYMBOL vmlinux 0x7242e96d strnchr +EXPORT_SYMBOL vmlinux 0x72433141 netif_carrier_on +EXPORT_SYMBOL vmlinux 0x72514459 pci_disable_msix +EXPORT_SYMBOL vmlinux 0x7267c488 unregister_netdevice +EXPORT_SYMBOL vmlinux 0x7278d8d5 generic_removexattr +EXPORT_SYMBOL vmlinux 0x72a33fce dev_mc_add +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72f43907 remove_arg_zero +EXPORT_SYMBOL vmlinux 0x730219ec register_filesystem +EXPORT_SYMBOL vmlinux 0x73127c0b sock_no_connect +EXPORT_SYMBOL vmlinux 0x7316dc1c llc_build_and_send_ui_pkt +EXPORT_SYMBOL vmlinux 0x737172bd rwsem_downgrade_wake +EXPORT_SYMBOL vmlinux 0x7389c9a8 acpi_bus_get_power +EXPORT_SYMBOL vmlinux 0x73bdaf5f inet_csk_accept +EXPORT_SYMBOL vmlinux 0x73d4df4b posix_lock_file +EXPORT_SYMBOL vmlinux 0x73e74094 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x73f83943 __lock_page +EXPORT_SYMBOL vmlinux 0x74067922 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0x740c16bc bio_uncopy_user +EXPORT_SYMBOL vmlinux 0x741c83eb phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0x742408a4 elv_rb_del +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x7495497b __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x7497bf16 devm_free_irq +EXPORT_SYMBOL vmlinux 0x749aae30 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0x74a98736 read_dev_sector +EXPORT_SYMBOL vmlinux 0x74cc1cbe unregister_cpu_notifier +EXPORT_SYMBOL vmlinux 0x74d7d95f elv_rb_add +EXPORT_SYMBOL vmlinux 0x74ea1265 cpumask_next_and +EXPORT_SYMBOL vmlinux 0x74ea2e18 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x74eb4241 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x7537c112 skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x753bd26a set_bh_page +EXPORT_SYMBOL vmlinux 0x755b4d96 inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x756e6992 strnicmp +EXPORT_SYMBOL vmlinux 0x756e8c25 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x75bdea12 iommu_area_alloc +EXPORT_SYMBOL vmlinux 0x75cd24df xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x75cfda94 xfrm_input +EXPORT_SYMBOL vmlinux 0x75d97872 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x760981df splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x760f3342 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x762ecd65 alloc_pages_current +EXPORT_SYMBOL vmlinux 0x764bd77c request_resource +EXPORT_SYMBOL vmlinux 0x765d073c block_commit_write +EXPORT_SYMBOL vmlinux 0x7672d733 acpi_bus_add +EXPORT_SYMBOL vmlinux 0x767dd8fd acpi_get_irq_routing_table +EXPORT_SYMBOL vmlinux 0x7680f522 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0x768931ab sg_miter_start +EXPORT_SYMBOL vmlinux 0x76a495c1 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x770c17b0 blk_plug_device +EXPORT_SYMBOL vmlinux 0x774d6e05 idr_remove_all +EXPORT_SYMBOL vmlinux 0x7751b3bf i2c_verify_client +EXPORT_SYMBOL vmlinux 0x7762ef8b vfs_symlink +EXPORT_SYMBOL vmlinux 0x7775df63 read_cache_page +EXPORT_SYMBOL vmlinux 0x77796c86 swiotlb_unmap_sg +EXPORT_SYMBOL vmlinux 0x77aa3e66 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x77bc6af1 d_find_alias +EXPORT_SYMBOL vmlinux 0x77cadf5e audit_log_start +EXPORT_SYMBOL vmlinux 0x77cee292 sock_no_mmap +EXPORT_SYMBOL vmlinux 0x77e2d2f3 pci_set_power_state +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77f53abc acpi_get_vendor_resource +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x78353ce2 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x784ea97b inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x788d1465 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0x789394b9 _write_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0x78a37e5d phy_driver_unregister +EXPORT_SYMBOL vmlinux 0x78b3dbca tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x78b6277c acpi_bus_get_device +EXPORT_SYMBOL vmlinux 0x78ba186f i2c_master_recv +EXPORT_SYMBOL vmlinux 0x78d66302 simple_getattr +EXPORT_SYMBOL vmlinux 0x78df6bd7 no_pci_devices +EXPORT_SYMBOL vmlinux 0x78fcb1c5 block_sync_page +EXPORT_SYMBOL vmlinux 0x790305b0 __percpu_counter_sum +EXPORT_SYMBOL vmlinux 0x7903818e misc_deregister +EXPORT_SYMBOL vmlinux 0x79068fda acpi_install_method +EXPORT_SYMBOL vmlinux 0x7915b8b4 tty_free_termios +EXPORT_SYMBOL vmlinux 0x79371387 pipe_lock +EXPORT_SYMBOL vmlinux 0x7939e81f nobh_writepage +EXPORT_SYMBOL vmlinux 0x795709b3 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x79a2fd35 ia64_unreg_MCA_extension +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79ad9729 pci_set_dma_mask +EXPORT_SYMBOL vmlinux 0x79b21b9d pci_bus_alloc_resource +EXPORT_SYMBOL vmlinux 0x79bd83b0 freeze_bdev +EXPORT_SYMBOL vmlinux 0x79cdf8cf xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x79f33fd2 ps2_init +EXPORT_SYMBOL vmlinux 0x7a2080ed swiotlb_alloc_coherent +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a4c20a4 unload_nls +EXPORT_SYMBOL vmlinux 0x7a4de7e6 journal_extend +EXPORT_SYMBOL vmlinux 0x7a4e033f ida_destroy +EXPORT_SYMBOL vmlinux 0x7a7650d4 simple_pin_fs +EXPORT_SYMBOL vmlinux 0x7a8a75fa mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x7a94a47c journal_get_write_access +EXPORT_SYMBOL vmlinux 0x7aa02e98 set_binfmt +EXPORT_SYMBOL vmlinux 0x7ab4d390 unlock_super +EXPORT_SYMBOL vmlinux 0x7ae73de1 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0x7aef9d69 skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x7b04a1a6 tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x7b0c84c4 acpi_remove_table_handler +EXPORT_SYMBOL vmlinux 0x7b207e0f bio_kmalloc +EXPORT_SYMBOL vmlinux 0x7b25a47b jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0x7b795c24 key_task_permission +EXPORT_SYMBOL vmlinux 0x7b8f4c40 key_create_or_update +EXPORT_SYMBOL vmlinux 0x7badc7b1 inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x7bb06a0a tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x7bd9229e tty_unregister_device +EXPORT_SYMBOL vmlinux 0x7bff3be7 iov_iter_advance +EXPORT_SYMBOL vmlinux 0x7c178357 do_sync_read +EXPORT_SYMBOL vmlinux 0x7c2ae048 xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x7c3efa44 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c61340c __release_region +EXPORT_SYMBOL vmlinux 0x7c6e8d4d inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x7c85ffc7 try_to_del_timer_sync +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7c9bcf69 sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x7cb1ae69 cpu_down +EXPORT_SYMBOL vmlinux 0x7cc77834 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x7cd1820c posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x7cdc1343 remove_proc_entry +EXPORT_SYMBOL vmlinux 0x7ce28183 bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0x7d0a9171 __free_pages +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d23b0ec tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x7d35cb9a xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x7d445f8e kill_pid +EXPORT_SYMBOL vmlinux 0x7d94f746 acpi_os_write_port +EXPORT_SYMBOL vmlinux 0x7da90ff4 cad_pid +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7de45018 pci_match_id +EXPORT_SYMBOL vmlinux 0x7df16f58 input_register_device +EXPORT_SYMBOL vmlinux 0x7e0f5b73 tcp_connect +EXPORT_SYMBOL vmlinux 0x7e4ff79f pcim_iomap_regions +EXPORT_SYMBOL vmlinux 0x7e5705bb invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x7e63d6c6 pci_disable_msi +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e77bd8b redraw_screen +EXPORT_SYMBOL vmlinux 0x7ea6b8a0 blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0x7ec9bfbc strncpy +EXPORT_SYMBOL vmlinux 0x7eec0d65 bdev_read_only +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f2f5f65 filp_close +EXPORT_SYMBOL vmlinux 0x7f2fc69b register_qdisc +EXPORT_SYMBOL vmlinux 0x7f70d742 matrox_G100 +EXPORT_SYMBOL vmlinux 0x7f7bcc30 clocksource_register +EXPORT_SYMBOL vmlinux 0x7f8365ea ps2_sendbyte +EXPORT_SYMBOL vmlinux 0x7f8723bd pcie_mch_quirk +EXPORT_SYMBOL vmlinux 0x7f8c16b9 __lock_buffer +EXPORT_SYMBOL vmlinux 0x7f91b6ca phy_start_interrupts +EXPORT_SYMBOL vmlinux 0x7f9be4a0 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x7fa2f391 __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x7fac3b3d block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x7fb57f41 skb_free_datagram +EXPORT_SYMBOL vmlinux 0x7fb6f412 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0x7fc256ea matroxfb_g450_shutdown +EXPORT_SYMBOL vmlinux 0x7fdbfa10 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0x8011f4de nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x80121c08 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x80157d94 pnp_request_card_device +EXPORT_SYMBOL vmlinux 0x801ec581 atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x8064808a proc_dointvec +EXPORT_SYMBOL vmlinux 0x80671888 sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x808cd5eb i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x80aa466c generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x80d79185 idr_destroy +EXPORT_SYMBOL vmlinux 0x80df49e6 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x81472677 acpi_get_table +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x815ef273 unw_init_from_blocked_task +EXPORT_SYMBOL vmlinux 0x818a1438 bio_map_kern +EXPORT_SYMBOL vmlinux 0x81942abd nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x81a6e80f dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x81b262e0 pcie_port_service_register +EXPORT_SYMBOL vmlinux 0x81b71a60 tc_classify_compat +EXPORT_SYMBOL vmlinux 0x81e01478 acpi_bus_register_driver +EXPORT_SYMBOL vmlinux 0x81e6b37f dmi_get_system_info +EXPORT_SYMBOL vmlinux 0x81e9c045 pci_bus_read_config_word +EXPORT_SYMBOL vmlinux 0x820333eb dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x82233d34 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x82933f2d ip_getsockopt +EXPORT_SYMBOL vmlinux 0x82c20081 jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x82ca29da remove_wait_queue +EXPORT_SYMBOL vmlinux 0x82e866d5 pci_release_region +EXPORT_SYMBOL vmlinux 0x82e9c083 csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x8320bea8 __umodsi3 +EXPORT_SYMBOL vmlinux 0x8332d760 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x83578887 d_path +EXPORT_SYMBOL vmlinux 0x8363baa4 i2c_release_client +EXPORT_SYMBOL vmlinux 0x837a3230 pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x83998b0b ia64_save_scratch_fpregs +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83b0485e matroxfb_g450_setpll_cond +EXPORT_SYMBOL vmlinux 0x83c43dc1 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0x83dc156c bh_submit_read +EXPORT_SYMBOL vmlinux 0x83e5c049 xfrm_state_add +EXPORT_SYMBOL vmlinux 0x840fb658 cdev_add +EXPORT_SYMBOL vmlinux 0x841bb820 noop_qdisc +EXPORT_SYMBOL vmlinux 0x8427b7ee __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x844cb1db unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x846f596d send_sig_info +EXPORT_SYMBOL vmlinux 0x84aacdac pcim_iounmap_regions +EXPORT_SYMBOL vmlinux 0x84e4ae85 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x84f933fb secpath_dup +EXPORT_SYMBOL vmlinux 0x8509d06a __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x85245a1a gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x8532b74a add_timer +EXPORT_SYMBOL vmlinux 0x855a1da6 llc_add_pack +EXPORT_SYMBOL vmlinux 0x85630d64 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x857a1d87 neigh_table_init +EXPORT_SYMBOL vmlinux 0x85abc85f strncmp +EXPORT_SYMBOL vmlinux 0x85ad75b6 splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x85d88263 vfs_write +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x86142ba2 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x86152107 request_firmware +EXPORT_SYMBOL vmlinux 0x8631f188 radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0x86382155 input_allocate_device +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x866a7695 complete +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x868d6276 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x86a84422 napi_frags_finish +EXPORT_SYMBOL vmlinux 0x86eee9da __bio_clone +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x8709b9c2 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0x8716021f tioca_list +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x874aa612 clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0x876dafc3 ec_write +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x881db9a0 unregister_con_driver +EXPORT_SYMBOL vmlinux 0x882fec47 ip_dev_find +EXPORT_SYMBOL vmlinux 0x88508d7c dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x8867a16b tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0x886aa274 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x887c5d08 tty_port_close_end +EXPORT_SYMBOL vmlinux 0x8894115c idr_init +EXPORT_SYMBOL vmlinux 0x88b00a06 security_task_getsecid +EXPORT_SYMBOL vmlinux 0x88ef5dfe mutex_unlock +EXPORT_SYMBOL vmlinux 0x892bd75d unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x896094be qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x89a9c8d7 pci_set_master +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89e026c3 rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0x89ed4fee mempool_destroy +EXPORT_SYMBOL vmlinux 0x8a0ba840 _spin_trylock +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a168a35 llc_mac_hdr_init +EXPORT_SYMBOL vmlinux 0x8a34c3f3 tcf_em_register +EXPORT_SYMBOL vmlinux 0x8a3680b6 phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a50988e elv_rb_former_request +EXPORT_SYMBOL vmlinux 0x8a55022d unregister_console +EXPORT_SYMBOL vmlinux 0x8a6533e7 simple_write_end +EXPORT_SYMBOL vmlinux 0x8a665a2f sk_release_kernel +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8ab8eb2b rtnl_create_link +EXPORT_SYMBOL vmlinux 0x8ac40297 iommu_area_free +EXPORT_SYMBOL vmlinux 0x8adeda8a _spin_lock +EXPORT_SYMBOL vmlinux 0x8b112ed6 phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0x8b20ccb3 alloc_fddidev +EXPORT_SYMBOL vmlinux 0x8b35e873 sg_last +EXPORT_SYMBOL vmlinux 0x8b51764c eth_rebuild_header +EXPORT_SYMBOL vmlinux 0x8b6d9632 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x8b71159a is_container_init +EXPORT_SYMBOL vmlinux 0x8b7fe311 kmemdup +EXPORT_SYMBOL vmlinux 0x8b88d27d file_remove_suid +EXPORT_SYMBOL vmlinux 0x8b93203c shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x8b966b63 sn_rtc_cycles_per_second +EXPORT_SYMBOL vmlinux 0x8b989cf9 acpi_bus_can_wakeup +EXPORT_SYMBOL vmlinux 0x8b9e87af ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x8bc11ad1 __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8bf8b4ad input_open_device +EXPORT_SYMBOL vmlinux 0x8c018f52 mapping_tagged +EXPORT_SYMBOL vmlinux 0x8c1494d9 pci_request_region_exclusive +EXPORT_SYMBOL vmlinux 0x8c183cbe iowrite16 +EXPORT_SYMBOL vmlinux 0x8c2967ef matrox_mystique +EXPORT_SYMBOL vmlinux 0x8c481e9b pci_iounmap +EXPORT_SYMBOL vmlinux 0x8c537c45 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x8c87be13 xfrm_register_type +EXPORT_SYMBOL vmlinux 0x8ca8a76b sg_miter_next +EXPORT_SYMBOL vmlinux 0x8cc79cab iowrite16_rep +EXPORT_SYMBOL vmlinux 0x8d0e285f compat_ip_setsockopt +EXPORT_SYMBOL vmlinux 0x8d24420c blk_end_request +EXPORT_SYMBOL vmlinux 0x8d2d723f ia64_pal_call_static +EXPORT_SYMBOL vmlinux 0x8d35ec18 set_page_dirty +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d46b495 da903x_query_status +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d6a276b completion_done +EXPORT_SYMBOL vmlinux 0x8d8d96c6 acpi_get_sleep_type_data +EXPORT_SYMBOL vmlinux 0x8d90fccf netlink_dump_start +EXPORT_SYMBOL vmlinux 0x8d977c2e tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0x8dcc685e mdiobus_read +EXPORT_SYMBOL vmlinux 0x8dee170f blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0x8dfd1709 neigh_changeaddr +EXPORT_SYMBOL vmlinux 0x8e002cda acpi_remove_gpe_block +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e190217 dquot_destroy +EXPORT_SYMBOL vmlinux 0x8e2d3601 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x8e36e041 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0x8e381366 hwsw_dma_get_ops +EXPORT_SYMBOL vmlinux 0x8e5bc347 dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e879bb7 __vmalloc +EXPORT_SYMBOL vmlinux 0x8ead8bc9 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0x8eb0551f tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0x8ebe31bd default_file_splice_read +EXPORT_SYMBOL vmlinux 0x8ed7b868 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x8ed9ce8e ip_route_output_key +EXPORT_SYMBOL vmlinux 0x8edf1c9c _spin_unlock_irq +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8eeddcca seq_open_private +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f529446 input_flush_device +EXPORT_SYMBOL vmlinux 0x8f5e812c register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f6f4b3e phy_attach_direct +EXPORT_SYMBOL vmlinux 0x8f7ade25 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x8f8dfe40 vfs_read +EXPORT_SYMBOL vmlinux 0x8fb8559c deny_write_access +EXPORT_SYMBOL vmlinux 0x8fdc48d6 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x900525fb blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0x903ab395 __moddi3 +EXPORT_SYMBOL vmlinux 0x903c7ef3 vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x904409c6 acpi_set_firmware_waking_vector +EXPORT_SYMBOL vmlinux 0x904957bb jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x906ef515 block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x9089604e neigh_destroy +EXPORT_SYMBOL vmlinux 0x908e7ad2 gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x909ae803 netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x90a1601f dmi_check_system +EXPORT_SYMBOL vmlinux 0x90ec5127 journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0x9135ceb3 pcibios_bus_to_resource +EXPORT_SYMBOL vmlinux 0x913ced26 skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x9144a8e2 ec_burst_disable +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x9171c834 inet_addr_type +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x917bb970 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x9193a4e6 vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x91a38ff8 vm_map_ram +EXPORT_SYMBOL vmlinux 0x91da923d sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x91f42722 del_gendisk +EXPORT_SYMBOL vmlinux 0x9201a92b jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0x9202f5dc ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x92054714 unw_access_ar +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x92392cd9 iov_shorten +EXPORT_SYMBOL vmlinux 0x926feb5b dev_addr_add +EXPORT_SYMBOL vmlinux 0x928c799c alloc_hippi_dev +EXPORT_SYMBOL vmlinux 0x928f316a soft_cursor +EXPORT_SYMBOL vmlinux 0x92a9d391 lro_flush_all +EXPORT_SYMBOL vmlinux 0x92be3352 find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x92ea4ae4 crc32_le +EXPORT_SYMBOL vmlinux 0x92f83e3e vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x930476b5 elv_rb_find +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x93080247 __scm_destroy +EXPORT_SYMBOL vmlinux 0x93181a3f skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x933595ac sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x9349fc94 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x936e7f91 dst_release +EXPORT_SYMBOL vmlinux 0x9371f4b0 save_mount_options +EXPORT_SYMBOL vmlinux 0x9372c922 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x937958a6 mempool_resize +EXPORT_SYMBOL vmlinux 0x937eedae proc_dostring +EXPORT_SYMBOL vmlinux 0x93845cbe splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x938519cb phy_detach +EXPORT_SYMBOL vmlinux 0x938b1d7a generic_unplug_device +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93af7bd1 pcim_enable_device +EXPORT_SYMBOL vmlinux 0x93c651be acpi_info +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x940a2cb8 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94859121 eth_type_trans +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x94ab3f36 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0x94ae04f2 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0x94c1164d pci_enable_bridges +EXPORT_SYMBOL vmlinux 0x94ec8f81 mnt_unpin +EXPORT_SYMBOL vmlinux 0x950ffff2 cpu_online_mask +EXPORT_SYMBOL vmlinux 0x95352ea9 acpi_check_mem_region +EXPORT_SYMBOL vmlinux 0x953f1269 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x9548c66d dev_mc_sync +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x958d60d0 ip_defrag +EXPORT_SYMBOL vmlinux 0x959932cf seq_release_private +EXPORT_SYMBOL vmlinux 0x95b27a86 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0x95ceb864 key_update +EXPORT_SYMBOL vmlinux 0x95d5c938 blk_register_region +EXPORT_SYMBOL vmlinux 0x95da3805 handle_sysrq +EXPORT_SYMBOL vmlinux 0x9633f52e arp_find +EXPORT_SYMBOL vmlinux 0x964d10e3 check_disk_size_change +EXPORT_SYMBOL vmlinux 0x96a730dc simple_set_mnt +EXPORT_SYMBOL vmlinux 0x96dd0551 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x9783003e compat_tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x9799d405 journal_ack_err +EXPORT_SYMBOL vmlinux 0x979d4adc unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x97a56aab gen_pool_add +EXPORT_SYMBOL vmlinux 0x97bd1196 matroxfb_vgaHWrestore +EXPORT_SYMBOL vmlinux 0x97de0ddd acpi_install_gpe_block +EXPORT_SYMBOL vmlinux 0x97f89cce km_state_notify +EXPORT_SYMBOL vmlinux 0x97fdb3a4 __dst_free +EXPORT_SYMBOL vmlinux 0x98016ce3 proto_register +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x988c20db migrate_page +EXPORT_SYMBOL vmlinux 0x98b801c0 cfb_imageblit +EXPORT_SYMBOL vmlinux 0x98b8fc8e __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x98c58917 inet_getname +EXPORT_SYMBOL vmlinux 0x98cda62b generic_permission +EXPORT_SYMBOL vmlinux 0x98f55431 uncached_free_page +EXPORT_SYMBOL vmlinux 0x98fc598d vfs_quota_on +EXPORT_SYMBOL vmlinux 0x98ff7be4 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x993e6e37 __next_cpu +EXPORT_SYMBOL vmlinux 0x99428311 down_trylock +EXPORT_SYMBOL vmlinux 0x995890d2 phy_device_create +EXPORT_SYMBOL vmlinux 0x9978fb8b dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99cb246f flush_old_exec +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x99ef87e2 _spin_unlock +EXPORT_SYMBOL vmlinux 0x9a19db20 down_interruptible +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a310a80 acpi_enter_sleep_state_s4bios +EXPORT_SYMBOL vmlinux 0x9a680ef2 simple_transaction_read +EXPORT_SYMBOL vmlinux 0x9a78ef7b vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x9aabc564 crc16 +EXPORT_SYMBOL vmlinux 0x9aad59d3 register_netdevice +EXPORT_SYMBOL vmlinux 0x9ab37133 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0x9abfb6dd max_low_pfn +EXPORT_SYMBOL vmlinux 0x9b089cc2 _write_lock +EXPORT_SYMBOL vmlinux 0x9b12e597 xfrm_state_update +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b3f1441 cdev_index +EXPORT_SYMBOL vmlinux 0x9b511e62 __bread +EXPORT_SYMBOL vmlinux 0x9b60b1d2 xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0x9b6153fd zero_fill_bio +EXPORT_SYMBOL vmlinux 0x9b7e08ce skb_find_text +EXPORT_SYMBOL vmlinux 0x9b9e022c kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c0ea3cd memscan +EXPORT_SYMBOL vmlinux 0x9c179f9e xfrm4_rcv +EXPORT_SYMBOL vmlinux 0x9c317f01 bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x9c382170 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x9c491f60 sg_alloc_table +EXPORT_SYMBOL vmlinux 0x9c4c2ca4 mutex_trylock +EXPORT_SYMBOL vmlinux 0x9c4f8503 nf_register_hooks +EXPORT_SYMBOL vmlinux 0x9c7d3609 write_one_page +EXPORT_SYMBOL vmlinux 0x9ca95a0e sort +EXPORT_SYMBOL vmlinux 0x9cb7f47a tty_register_device +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cbea1e4 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x9ce70412 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x9cf68430 blk_execute_rq +EXPORT_SYMBOL vmlinux 0x9cffa66e current_fs_time +EXPORT_SYMBOL vmlinux 0x9d2399a4 module_put +EXPORT_SYMBOL vmlinux 0x9d31a3a7 inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x9d33ef5e acpi_enable +EXPORT_SYMBOL vmlinux 0x9d342ef4 pci_clear_master +EXPORT_SYMBOL vmlinux 0x9db21624 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x9ddade73 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x9de537dd pcibios_resource_to_bus +EXPORT_SYMBOL vmlinux 0x9ded2ac2 get_sb_single +EXPORT_SYMBOL vmlinux 0x9df6d3cb bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0x9e363b6b acpi_disable_gpe +EXPORT_SYMBOL vmlinux 0x9e3f4445 pnp_device_attach +EXPORT_SYMBOL vmlinux 0x9e44753c udp_lib_unhash +EXPORT_SYMBOL vmlinux 0x9e6f8171 generic_writepages +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9ea0ad49 __sg_free_table +EXPORT_SYMBOL vmlinux 0x9ea28ec7 acpi_evaluate_object +EXPORT_SYMBOL vmlinux 0x9ebd4c04 adjust_resource +EXPORT_SYMBOL vmlinux 0x9edbecae snprintf +EXPORT_SYMBOL vmlinux 0x9eec84d1 vfs_quota_off +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9f0d6b39 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f169932 add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f3b29fa down_timeout +EXPORT_SYMBOL vmlinux 0x9f3cba6b pci_choose_state +EXPORT_SYMBOL vmlinux 0x9f78b8c4 do_sync_write +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9f9a0d93 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x9fe35c19 proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x9fff043a i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0xa017def5 read_cache_page_async +EXPORT_SYMBOL vmlinux 0xa01d0e41 clip_tbl_hook +EXPORT_SYMBOL vmlinux 0xa025506c acpi_root_dir +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa03908f7 phy_device_free +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa04a2e5c sock_init_data +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa078d3fb pci_dev_driver +EXPORT_SYMBOL vmlinux 0xa0a17647 sg_miter_stop +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0b29606 sk_receive_skb +EXPORT_SYMBOL vmlinux 0xa0b5f067 journal_stop +EXPORT_SYMBOL vmlinux 0xa0c74c89 percpu_counter_destroy +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d3d560 ksize +EXPORT_SYMBOL vmlinux 0xa0d9f13f vfs_getattr +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa11fac34 uncached_alloc_page +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa12a0ad5 submit_bh +EXPORT_SYMBOL vmlinux 0xa12e510a pci_find_device +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa1515171 truncate_inode_pages +EXPORT_SYMBOL vmlinux 0xa1581b06 get_super +EXPORT_SYMBOL vmlinux 0xa17ba900 fb_get_mode +EXPORT_SYMBOL vmlinux 0xa18f7129 tty_unthrottle +EXPORT_SYMBOL vmlinux 0xa1abbab1 block_write_begin +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1ba4b95 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1cef6e3 g450_mnp2f +EXPORT_SYMBOL vmlinux 0xa1d2934d sn_hwperf_get_nearest_node +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa2309a35 put_page +EXPORT_SYMBOL vmlinux 0xa252d136 dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0xa254e6b4 nla_put +EXPORT_SYMBOL vmlinux 0xa25fd3e8 do_munmap +EXPORT_SYMBOL vmlinux 0xa2755c7b fpswa_interface +EXPORT_SYMBOL vmlinux 0xa28e76e6 schedule_work +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2ae1aaf swiotlb_map_sg_attrs +EXPORT_SYMBOL vmlinux 0xa2b3179a cond_resched_lock +EXPORT_SYMBOL vmlinux 0xa2d96108 dqput +EXPORT_SYMBOL vmlinux 0xa2f24785 machvec_timer_interrupt +EXPORT_SYMBOL vmlinux 0xa2f51192 pagecache_write_end +EXPORT_SYMBOL vmlinux 0xa3144ecb block_truncate_page +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa33f7c7c nla_strlcpy +EXPORT_SYMBOL vmlinux 0xa344361d simple_unlink +EXPORT_SYMBOL vmlinux 0xa34f7f50 kill_pgrp +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa37fd5ea key_payload_reserve +EXPORT_SYMBOL vmlinux 0xa39a7d79 bdi_destroy +EXPORT_SYMBOL vmlinux 0xa39b4cf2 udelay +EXPORT_SYMBOL vmlinux 0xa3bbcd80 acpi_set_gpe_type +EXPORT_SYMBOL vmlinux 0xa3d8d9a6 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0xa40ffdb9 skb_under_panic +EXPORT_SYMBOL vmlinux 0xa44fffc1 schedule +EXPORT_SYMBOL vmlinux 0xa4546386 d_obtain_alias +EXPORT_SYMBOL vmlinux 0xa47ba4b7 dmam_free_coherent +EXPORT_SYMBOL vmlinux 0xa4874cda bio_copy_user +EXPORT_SYMBOL vmlinux 0xa4b2cba6 __devm_request_region +EXPORT_SYMBOL vmlinux 0xa4b94fea iowrite8_rep +EXPORT_SYMBOL vmlinux 0xa4be8a36 register_console +EXPORT_SYMBOL vmlinux 0xa4c46a3b seq_putc +EXPORT_SYMBOL vmlinux 0xa4db6039 filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0xa4db7136 eth_change_mtu +EXPORT_SYMBOL vmlinux 0xa4f7d388 vfs_readv +EXPORT_SYMBOL vmlinux 0xa51edbbb alloc_pci_dev +EXPORT_SYMBOL vmlinux 0xa549e891 pci_pme_active +EXPORT_SYMBOL vmlinux 0xa57003b0 bit_waitqueue +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa58bb98d acpi_match_device_ids +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa5cebfed dev_base_lock +EXPORT_SYMBOL vmlinux 0xa5cfcf1a kernel_setsockopt +EXPORT_SYMBOL vmlinux 0xa5faba0d mempool_alloc +EXPORT_SYMBOL vmlinux 0xa63a81cf input_filter_device +EXPORT_SYMBOL vmlinux 0xa655f13c bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xa65c29d2 sock_no_getname +EXPORT_SYMBOL vmlinux 0xa670105b udp_disconnect +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6894e20 unregister_filesystem +EXPORT_SYMBOL vmlinux 0xa69b952e mdiobus_free +EXPORT_SYMBOL vmlinux 0xa6aeb6d4 iget5_locked +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa7077f5e sock_no_accept +EXPORT_SYMBOL vmlinux 0xa70f0fb5 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0xa72a0f5b nr_online_nodes +EXPORT_SYMBOL vmlinux 0xa73bcdc1 skb_copy_expand +EXPORT_SYMBOL vmlinux 0xa73bd6af inet_stream_ops +EXPORT_SYMBOL vmlinux 0xa740857f d_invalidate +EXPORT_SYMBOL vmlinux 0xa75b2363 __first_cpu +EXPORT_SYMBOL vmlinux 0xa7600a19 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0xa768fd7c tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0xa79bff2d hpage_shift +EXPORT_SYMBOL vmlinux 0xa7a38619 __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0xa7efa6f5 phy_device_register +EXPORT_SYMBOL vmlinux 0xa8064235 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0xa84f6b1b __any_online_cpu +EXPORT_SYMBOL vmlinux 0xa886a958 krealloc +EXPORT_SYMBOL vmlinux 0xa891d58f lock_rename +EXPORT_SYMBOL vmlinux 0xa89d3d6e arch_acpi_processor_init_pdc +EXPORT_SYMBOL vmlinux 0xa8a280b3 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0xa8a6f639 __check_region +EXPORT_SYMBOL vmlinux 0xa8b7654c fb_find_mode +EXPORT_SYMBOL vmlinux 0xa8b970b6 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xa8d1783a alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0xa8d68abd acpi_warning +EXPORT_SYMBOL vmlinux 0xa8f014c3 dst_destroy +EXPORT_SYMBOL vmlinux 0xa8f3d7b0 create_proc_entry +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa910c55e blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0xa9111998 simple_statfs +EXPORT_SYMBOL vmlinux 0xa92637c7 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xa93e313c devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0xa981d6f7 simple_lookup +EXPORT_SYMBOL vmlinux 0xa9d4d28a start_tty +EXPORT_SYMBOL vmlinux 0xaa045b3f bio_map_user +EXPORT_SYMBOL vmlinux 0xaa0e8abf inet_del_protocol +EXPORT_SYMBOL vmlinux 0xaa2a09df vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0xaa300ed6 matroxfb_DAC_out +EXPORT_SYMBOL vmlinux 0xaa3f4cc9 sock_release +EXPORT_SYMBOL vmlinux 0xaa473ff3 napi_gro_flush +EXPORT_SYMBOL vmlinux 0xaa5f0175 dev_trans_start +EXPORT_SYMBOL vmlinux 0xaa607590 inet_listen +EXPORT_SYMBOL vmlinux 0xaa7ac14c kernel_sendpage +EXPORT_SYMBOL vmlinux 0xaa9db9c4 elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0xaade6cf8 __xfrm_lookup +EXPORT_SYMBOL vmlinux 0xaae8ab0e acpi_bus_power_manageable +EXPORT_SYMBOL vmlinux 0xaaecd4d4 dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaffb9a5 acpi_bus_private_data_handler +EXPORT_SYMBOL vmlinux 0xab10ec78 pci_bus_write_config_byte +EXPORT_SYMBOL vmlinux 0xab15a8ad copy_strings_kernel +EXPORT_SYMBOL vmlinux 0xab2dd2d8 genl_sock +EXPORT_SYMBOL vmlinux 0xab33d33e otg_set_transceiver +EXPORT_SYMBOL vmlinux 0xab3aedf1 sock_kfree_s +EXPORT_SYMBOL vmlinux 0xab3ca905 pci_iomap +EXPORT_SYMBOL vmlinux 0xab3f72fd inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xab569f1c unregister_quota_format +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab6ea116 bio_put +EXPORT_SYMBOL vmlinux 0xaba9ff34 allocate_resource +EXPORT_SYMBOL vmlinux 0xabbf0ca4 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0xabc600f4 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabd1c28b tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0xabd36674 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0xabd8e427 matroxfb_var2my +EXPORT_SYMBOL vmlinux 0xabe0d5ad iommu_dma_supported +EXPORT_SYMBOL vmlinux 0xabe23450 idr_get_new +EXPORT_SYMBOL vmlinux 0xac383451 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xac58ea5e acpi_unload_table_id +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac812950 sn_send_IPI_phys +EXPORT_SYMBOL vmlinux 0xac84742e security_path_symlink +EXPORT_SYMBOL vmlinux 0xacc70f2f pci_request_selected_regions_exclusive +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad0f48b9 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0xad13c689 acpi_os_execute +EXPORT_SYMBOL vmlinux 0xad16869f pci_restore_state +EXPORT_SYMBOL vmlinux 0xad6106ec input_unregister_handle +EXPORT_SYMBOL vmlinux 0xad6f5a17 tcp_hashinfo +EXPORT_SYMBOL vmlinux 0xad8de1b3 acpi_remove_address_space_handler +EXPORT_SYMBOL vmlinux 0xad96dd73 dquot_release +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadbdb9cc gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xadea15fe deactivate_super +EXPORT_SYMBOL vmlinux 0xadf00e25 find_or_create_page +EXPORT_SYMBOL vmlinux 0xae01a130 journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xae13f703 wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0xae4a1bda csum_tcpudp_nofold +EXPORT_SYMBOL vmlinux 0xae4b5666 dmi_get_year +EXPORT_SYMBOL vmlinux 0xae54f174 give_up_console +EXPORT_SYMBOL vmlinux 0xae5c99d8 hippi_change_mtu +EXPORT_SYMBOL vmlinux 0xae649140 _spin_trylock_bh +EXPORT_SYMBOL vmlinux 0xae729e90 tcp_close +EXPORT_SYMBOL vmlinux 0xae94153a journal_create +EXPORT_SYMBOL vmlinux 0xae9bb56a follow_pfn +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaeef8b87 sk_alloc +EXPORT_SYMBOL vmlinux 0xaef3c063 stop_tty +EXPORT_SYMBOL vmlinux 0xaf4186e6 create_mnt_ns +EXPORT_SYMBOL vmlinux 0xaf41e995 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0xaf6bbc60 machvec_setup +EXPORT_SYMBOL vmlinux 0xaf6cd1f3 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0xaf85810c mnt_pin +EXPORT_SYMBOL vmlinux 0xafc32410 pci_enable_device_mem +EXPORT_SYMBOL vmlinux 0xafc99354 nla_append +EXPORT_SYMBOL vmlinux 0xafd6972b filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xafe2c02c ip_ct_attach +EXPORT_SYMBOL vmlinux 0xafe82e10 strcspn +EXPORT_SYMBOL vmlinux 0xaffd2738 kill_fasync +EXPORT_SYMBOL vmlinux 0xaffdfb40 set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0xb03c589a mpage_writepages +EXPORT_SYMBOL vmlinux 0xb05465d3 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0xb055d8da posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0xb07dfb3d acpi_remove_gpe_handler +EXPORT_SYMBOL vmlinux 0xb0b3a0e4 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0c0864b neigh_lookup +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0f2ae4f elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xb0fec4b5 generic_make_request +EXPORT_SYMBOL vmlinux 0xb11fa1ce strlcat +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb1528e93 set_anon_super +EXPORT_SYMBOL vmlinux 0xb1645a2e sg_free_table +EXPORT_SYMBOL vmlinux 0xb16e6e53 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0xb17330c9 arp_send +EXPORT_SYMBOL vmlinux 0xb176917d jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xb18e02c3 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1991d24 serio_rescan +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb1d4288e dev_change_flags +EXPORT_SYMBOL vmlinux 0xb1d95d31 netlink_kernel_create +EXPORT_SYMBOL vmlinux 0xb1e561ca bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0xb1e834de tcf_hash_search +EXPORT_SYMBOL vmlinux 0xb1e8a8bf pci_get_bus_and_slot +EXPORT_SYMBOL vmlinux 0xb1eb1eb8 set_user_nice +EXPORT_SYMBOL vmlinux 0xb1f32d3d ia64_max_iommu_merge_mask +EXPORT_SYMBOL vmlinux 0xb1f975aa unlock_kernel +EXPORT_SYMBOL vmlinux 0xb219f16b lookup_hash +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb22bb947 alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb242f2da vfs_readlink +EXPORT_SYMBOL vmlinux 0xb249c669 put_io_context +EXPORT_SYMBOL vmlinux 0xb2674f5c xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0xb2676f2c jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb27b12da sn_partition_id +EXPORT_SYMBOL vmlinux 0xb2b43834 kmem_cache_free +EXPORT_SYMBOL vmlinux 0xb2c0352c tcf_hash_release +EXPORT_SYMBOL vmlinux 0xb2cb8697 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0xb2fd1e19 pnp_stop_dev +EXPORT_SYMBOL vmlinux 0xb324113b tcp_check_req +EXPORT_SYMBOL vmlinux 0xb3284531 acpi_dbg_layer +EXPORT_SYMBOL vmlinux 0xb32bf552 close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xb34d4c2e acpi_terminate +EXPORT_SYMBOL vmlinux 0xb36bcc62 dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3a6803c security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0xb3ff1f69 free_pages_exact +EXPORT_SYMBOL vmlinux 0xb408976a __rta_fill +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb42c62c3 tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0xb43a2d5f seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xb43c4814 tty_check_change +EXPORT_SYMBOL vmlinux 0xb4964308 gen_pool_create +EXPORT_SYMBOL vmlinux 0xb4c2afa5 rwsem_down_write_failed +EXPORT_SYMBOL vmlinux 0xb4fd04ae __dev_get_by_index +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb50bf1b9 backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xb528985b skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb5554ed1 genphy_suspend +EXPORT_SYMBOL vmlinux 0xb578d99c serio_interrupt +EXPORT_SYMBOL vmlinux 0xb57a9f13 xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0xb582ebf9 init_timer_key +EXPORT_SYMBOL vmlinux 0xb58c824f key_alloc +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5d52c27 ec_transaction +EXPORT_SYMBOL vmlinux 0xb5df7b75 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xb5e48e92 __kfifo_get +EXPORT_SYMBOL vmlinux 0xb5e4b762 machvec_dma_sync_sg +EXPORT_SYMBOL vmlinux 0xb5e738fa netif_rx_ni +EXPORT_SYMBOL vmlinux 0xb6244511 sg_init_one +EXPORT_SYMBOL vmlinux 0xb63cda32 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xb6526608 __dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xb653f9ca unregister_framebuffer +EXPORT_SYMBOL vmlinux 0xb6562651 blk_fetch_request +EXPORT_SYMBOL vmlinux 0xb66445a3 finish_wait +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6a02379 journal_check_available_features +EXPORT_SYMBOL vmlinux 0xb6a476a2 wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6a94458 dev_open +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6cbe886 acpi_get_node +EXPORT_SYMBOL vmlinux 0xb708b367 kmem_cache_size +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb740e5aa generic_setlease +EXPORT_SYMBOL vmlinux 0xb7495ef8 __alloc_skb +EXPORT_SYMBOL vmlinux 0xb74e7c4a key_negate_and_link +EXPORT_SYMBOL vmlinux 0xb758b225 acpi_disable_event +EXPORT_SYMBOL vmlinux 0xb7664130 pnp_disable_dev +EXPORT_SYMBOL vmlinux 0xb76e4ce8 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7a2f787 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xb7c4f38f up_write +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb7d411d5 kern_mem_attribute +EXPORT_SYMBOL vmlinux 0xb7e505c5 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0xb7e6c1fe journal_errno +EXPORT_SYMBOL vmlinux 0xb7e8d3ef pci_dev_put +EXPORT_SYMBOL vmlinux 0xb813ce5a timecompare_transform +EXPORT_SYMBOL vmlinux 0xb836f1ab textsearch_destroy +EXPORT_SYMBOL vmlinux 0xb8472e14 pcix_set_mmrbc +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8a5a876 tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0xb8c4600c prepare_creds +EXPORT_SYMBOL vmlinux 0xb8c93506 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0xb8ef695a f_setown +EXPORT_SYMBOL vmlinux 0xb9083021 __wait_on_buffer +EXPORT_SYMBOL vmlinux 0xb92e5d0e neigh_create +EXPORT_SYMBOL vmlinux 0xb9446042 _read_unlock_irqrestore +EXPORT_SYMBOL vmlinux 0xb97c0d5f dev_gro_receive +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb99429ef dentry_unhash +EXPORT_SYMBOL vmlinux 0xb9a2291f end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0xba2d8594 ec_read +EXPORT_SYMBOL vmlinux 0xba35f4f0 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0xba3b0cb5 balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba792aa9 dst_discard +EXPORT_SYMBOL vmlinux 0xbaa2782a kstrndup +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbab91246 setup_new_exec +EXPORT_SYMBOL vmlinux 0xbb07889e tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb3527a7 file_permission +EXPORT_SYMBOL vmlinux 0xbb3dfcc5 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb678083 acpi_unlock_battery_dir +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbad5197 open_by_devnum +EXPORT_SYMBOL vmlinux 0xbbc4f57b inode_permission +EXPORT_SYMBOL vmlinux 0xbbf6ffc2 jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0xbbfa4eaa override_creds +EXPORT_SYMBOL vmlinux 0xbc213f13 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0xbc2353ed proc_create_data +EXPORT_SYMBOL vmlinux 0xbc248d0d xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0xbc3c0b28 alloc_disk +EXPORT_SYMBOL vmlinux 0xbc4a1eca vfs_unlink +EXPORT_SYMBOL vmlinux 0xbc71ecb9 dev_add_pack +EXPORT_SYMBOL vmlinux 0xbc837918 task_nice +EXPORT_SYMBOL vmlinux 0xbc8f95a5 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0xbc9f7bcc nf_unregister_hook +EXPORT_SYMBOL vmlinux 0xbcce6852 request_key_async +EXPORT_SYMBOL vmlinux 0xbcce86b4 dev_unicast_add +EXPORT_SYMBOL vmlinux 0xbcd472ad unregister_8022_client +EXPORT_SYMBOL vmlinux 0xbcf59791 pnp_release_card_device +EXPORT_SYMBOL vmlinux 0xbd4e9571 unregister_snap_client +EXPORT_SYMBOL vmlinux 0xbd51499a module_layout +EXPORT_SYMBOL vmlinux 0xbd537dd1 machvec_dma_sync_single +EXPORT_SYMBOL vmlinux 0xbd546414 thaw_process +EXPORT_SYMBOL vmlinux 0xbd675b46 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0xbdaf5b07 acpi_os_read_port +EXPORT_SYMBOL vmlinux 0xbdc7fb98 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0xbdd156f1 keyring_clear +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbdf6eb50 pcim_iounmap +EXPORT_SYMBOL vmlinux 0xbe0f6962 phy_register_fixup +EXPORT_SYMBOL vmlinux 0xbe197316 have_submounts +EXPORT_SYMBOL vmlinux 0xbe1a95ec bio_alloc +EXPORT_SYMBOL vmlinux 0xbe290ba6 seq_puts +EXPORT_SYMBOL vmlinux 0xbe3f11cb find_get_page +EXPORT_SYMBOL vmlinux 0xbe6ae133 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0xbe7ba9c5 inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xbe877049 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0xbea60448 matroxfb_g450_connect +EXPORT_SYMBOL vmlinux 0xbea932f8 igrab +EXPORT_SYMBOL vmlinux 0xbebb6205 xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0xbec42c1d pci_set_consistent_dma_mask +EXPORT_SYMBOL vmlinux 0xbedeb003 dquot_transfer +EXPORT_SYMBOL vmlinux 0xbeed61bb neigh_ifdown +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbef72167 textsearch_prepare +EXPORT_SYMBOL vmlinux 0xbef8f71c blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xbefee397 acpi_get_object_info +EXPORT_SYMBOL vmlinux 0xbf27e88d tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf83cc5e skb_copy +EXPORT_SYMBOL vmlinux 0xbf9a5033 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfc177bc iowrite32_rep +EXPORT_SYMBOL vmlinux 0xbfe31eba lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xbfedd7af i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xbff7561b take_over_console +EXPORT_SYMBOL vmlinux 0xc003c637 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0xc009d69d file_update_time +EXPORT_SYMBOL vmlinux 0xc03262ad xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0xc03c6f2d security_path_link +EXPORT_SYMBOL vmlinux 0xc03f478e ia64_reg_MCA_extension +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc0679bf6 neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xc07d43ae acpi_evaluate_reference +EXPORT_SYMBOL vmlinux 0xc09651d9 crc32_be +EXPORT_SYMBOL vmlinux 0xc0a3d105 find_next_bit +EXPORT_SYMBOL vmlinux 0xc0a9c56c __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0xc0b3cd64 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0f0fd7a aio_complete +EXPORT_SYMBOL vmlinux 0xc1177bcd tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0xc11a7c2e inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0xc12eb3be matroxfb_wait_for_sync +EXPORT_SYMBOL vmlinux 0xc14e835a ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0xc156d81e __sk_dst_check +EXPORT_SYMBOL vmlinux 0xc1a67399 key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0xc1ba0217 revert_creds +EXPORT_SYMBOL vmlinux 0xc1e30651 _spin_unlock_bh +EXPORT_SYMBOL vmlinux 0xc1f713bb jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xc2084fc6 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc26547a3 neigh_event_ns +EXPORT_SYMBOL vmlinux 0xc26ea53a ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0xc2834fba blk_queue_io_min +EXPORT_SYMBOL vmlinux 0xc29d5343 sn_flush_all_caches +EXPORT_SYMBOL vmlinux 0xc2e2ec48 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc307a340 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0xc315249c file_fsync +EXPORT_SYMBOL vmlinux 0xc32b09d7 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0xc32d4c64 per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0xc335468d dev_close +EXPORT_SYMBOL vmlinux 0xc33f6f4c on_each_cpu +EXPORT_SYMBOL vmlinux 0xc39ab87f llc_sap_open +EXPORT_SYMBOL vmlinux 0xc39e80e4 devm_iounmap +EXPORT_SYMBOL vmlinux 0xc3b64e3b security_path_rename +EXPORT_SYMBOL vmlinux 0xc3bd892e _write_lock_bh +EXPORT_SYMBOL vmlinux 0xc3c1b0b6 inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0xc3edc955 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0xc402cc99 register_acpi_notifier +EXPORT_SYMBOL vmlinux 0xc40de4ef __inet6_hash +EXPORT_SYMBOL vmlinux 0xc42246b7 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xc4424a9d skb_append +EXPORT_SYMBOL vmlinux 0xc451ccfc bdi_register_dev +EXPORT_SYMBOL vmlinux 0xc47d27d8 kobject_get +EXPORT_SYMBOL vmlinux 0xc494cb84 pcie_port_service_unregister +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc499d522 read_cache_pages +EXPORT_SYMBOL vmlinux 0xc49a39cb seq_open +EXPORT_SYMBOL vmlinux 0xc4a0d0cb jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xc4d92c41 neigh_update +EXPORT_SYMBOL vmlinux 0xc5013faa init_special_inode +EXPORT_SYMBOL vmlinux 0xc514e856 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc5534d64 ioread16 +EXPORT_SYMBOL vmlinux 0xc56364b0 neigh_compat_output +EXPORT_SYMBOL vmlinux 0xc56d4785 key_link +EXPORT_SYMBOL vmlinux 0xc57f98f6 __inc_zone_page_state +EXPORT_SYMBOL vmlinux 0xc587ab33 pci_clear_mwi +EXPORT_SYMBOL vmlinux 0xc59f9efc inode_add_bytes +EXPORT_SYMBOL vmlinux 0xc5a2f50c proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0xc5e26bd0 __find_get_block +EXPORT_SYMBOL vmlinux 0xc5e3378b blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0xc607af70 dquot_acquire +EXPORT_SYMBOL vmlinux 0xc611d774 tcp_sendpage +EXPORT_SYMBOL vmlinux 0xc61b1ec9 vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0xc641f20a ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0xc66d6f4a wait_for_key_construction +EXPORT_SYMBOL vmlinux 0xc6787351 kobject_set_name +EXPORT_SYMBOL vmlinux 0xc68c2821 acpi_read +EXPORT_SYMBOL vmlinux 0xc68e6b5e i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0xc705df7c blkdev_get +EXPORT_SYMBOL vmlinux 0xc71858e6 register_sysrq_key +EXPORT_SYMBOL vmlinux 0xc718e8ec tcp_prot +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc730df24 skb_dma_map +EXPORT_SYMBOL vmlinux 0xc740c64a memchr +EXPORT_SYMBOL vmlinux 0xc7570329 lease_get_mtime +EXPORT_SYMBOL vmlinux 0xc75d98f2 generic_file_direct_write +EXPORT_SYMBOL vmlinux 0xc75e23a1 release_sock +EXPORT_SYMBOL vmlinux 0xc7629e80 jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0xc76e8a7d blk_init_queue_node +EXPORT_SYMBOL vmlinux 0xc783b7cf xor_ia64_5 +EXPORT_SYMBOL vmlinux 0xc784a0e9 blk_queue_set_discard +EXPORT_SYMBOL vmlinux 0xc7858617 find_vma +EXPORT_SYMBOL vmlinux 0xc7981d7a iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0xc7a24d76 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7d2eac1 pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xc7ec28b0 memcmp +EXPORT_SYMBOL vmlinux 0xc818d1a4 input_get_keycode +EXPORT_SYMBOL vmlinux 0xc8191d80 sock_kmalloc +EXPORT_SYMBOL vmlinux 0xc849e6af call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0xc8579dca is_bad_inode +EXPORT_SYMBOL vmlinux 0xc86fa40c prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0xc897c382 sg_init_table +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8b7e19b pci_request_region +EXPORT_SYMBOL vmlinux 0xc8ba7396 i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xc8ca3e25 acpi_get_child +EXPORT_SYMBOL vmlinux 0xc8d18723 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0xc9266a5a ia64_load_scratch_fpregs +EXPORT_SYMBOL vmlinux 0xc92a12bf posix_acl_permission +EXPORT_SYMBOL vmlinux 0xc9380719 pnp_register_card_driver +EXPORT_SYMBOL vmlinux 0xc9543fe3 acpi_unlock_ac_dir +EXPORT_SYMBOL vmlinux 0xc97ae628 get_io_context +EXPORT_SYMBOL vmlinux 0xc987d542 pnp_unregister_card_driver +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc9ab2eef acpi_os_wait_events_complete +EXPORT_SYMBOL vmlinux 0xc9c48062 mod_timer +EXPORT_SYMBOL vmlinux 0xc9d8659e generic_osync_inode +EXPORT_SYMBOL vmlinux 0xca029494 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0xca39b64a set_device_ro +EXPORT_SYMBOL vmlinux 0xca43d875 vfs_fsync +EXPORT_SYMBOL vmlinux 0xca6656f0 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0xca8acc78 acpi_dbg_level +EXPORT_SYMBOL vmlinux 0xca8c373a inet_accept +EXPORT_SYMBOL vmlinux 0xca9694b5 _read_unlock +EXPORT_SYMBOL vmlinux 0xcab546fa icmp_send +EXPORT_SYMBOL vmlinux 0xcac1f896 __page_cache_alloc +EXPORT_SYMBOL vmlinux 0xcad54a9c get_fs_type +EXPORT_SYMBOL vmlinux 0xcae8af42 pci_request_regions_exclusive +EXPORT_SYMBOL vmlinux 0xcafdfecc write_inode_now +EXPORT_SYMBOL vmlinux 0xcb1bb358 __next_cpu_nr +EXPORT_SYMBOL vmlinux 0xcb1e1773 blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xcb220345 ilookup +EXPORT_SYMBOL vmlinux 0xcb24a502 register_chrdev +EXPORT_SYMBOL vmlinux 0xcb652a67 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0xcb65314e splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb733bf2 acpi_bus_set_power +EXPORT_SYMBOL vmlinux 0xcb73ee3f tcf_register_action +EXPORT_SYMBOL vmlinux 0xcb94a05d vmem_map +EXPORT_SYMBOL vmlinux 0xcbb9d7db groups_free +EXPORT_SYMBOL vmlinux 0xcbce0a5f setup_arg_pages +EXPORT_SYMBOL vmlinux 0xcbd83ffe unregister_sysrq_key +EXPORT_SYMBOL vmlinux 0xcc07af75 strnlen +EXPORT_SYMBOL vmlinux 0xcc272681 sync_inode +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc692d48 pci_read_vpd +EXPORT_SYMBOL vmlinux 0xcc7d541a nf_log_unregister +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xccd175c7 swiotlb_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0xcce8d513 input_release_device +EXPORT_SYMBOL vmlinux 0xcd42b4d9 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0xcd473329 memset_io +EXPORT_SYMBOL vmlinux 0xcd56573b dec_zone_page_state +EXPORT_SYMBOL vmlinux 0xcd78244c set_security_override +EXPORT_SYMBOL vmlinux 0xcd87ead1 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0xcde5da17 journal_unlock_updates +EXPORT_SYMBOL vmlinux 0xcdebbbc0 pnp_activate_dev +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3cdf7a locks_copy_lock +EXPORT_SYMBOL vmlinux 0xce4904a4 acpi_leave_sleep_state +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce9fead5 inode_setattr +EXPORT_SYMBOL vmlinux 0xcea163cb sock_setsockopt +EXPORT_SYMBOL vmlinux 0xcea262d0 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0xcea88cb0 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0xceb0fa65 hippi_neigh_setup_dev +EXPORT_SYMBOL vmlinux 0xcedff95d set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0xcee71b67 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0xceeb5b07 neigh_seq_next +EXPORT_SYMBOL vmlinux 0xcf1d28ab acpi_error +EXPORT_SYMBOL vmlinux 0xcf2d2845 end_page_writeback +EXPORT_SYMBOL vmlinux 0xcf4fa3b3 follow_up +EXPORT_SYMBOL vmlinux 0xcf98afb6 inet_shutdown +EXPORT_SYMBOL vmlinux 0xcfa0595a aio_put_req +EXPORT_SYMBOL vmlinux 0xcfa9c9d8 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfbd4d10 skb_store_bits +EXPORT_SYMBOL vmlinux 0xcfc6c7ed bdget_disk +EXPORT_SYMBOL vmlinux 0xcfec871e pagecache_write_begin +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xcfff88d3 down_write +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd076ac76 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0xd0787b2e blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0xd079fe3f sk_dst_check +EXPORT_SYMBOL vmlinux 0xd08197fa acpi_load_tables +EXPORT_SYMBOL vmlinux 0xd0974bf5 key_put +EXPORT_SYMBOL vmlinux 0xd0a35b90 __napi_schedule +EXPORT_SYMBOL vmlinux 0xd0aa9e60 disk_stack_limits +EXPORT_SYMBOL vmlinux 0xd0e14db8 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd1472061 acpi_pci_register_driver +EXPORT_SYMBOL vmlinux 0xd166c042 __wait_on_bit +EXPORT_SYMBOL vmlinux 0xd17d41f5 pci_bus_read_config_byte +EXPORT_SYMBOL vmlinux 0xd1844a21 abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0xd18b6eb2 acpi_unmap_lsapic +EXPORT_SYMBOL vmlinux 0xd19aff27 skb_checksum +EXPORT_SYMBOL vmlinux 0xd19bb294 acpi_install_address_space_handler +EXPORT_SYMBOL vmlinux 0xd1b1c581 unw_unwind +EXPORT_SYMBOL vmlinux 0xd23d64d4 pci_enable_device +EXPORT_SYMBOL vmlinux 0xd2436d6e unlock_new_inode +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd25f9afa nf_ct_attach +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd2979c01 blk_end_request_all +EXPORT_SYMBOL vmlinux 0xd2a75ee0 dmi_first_match +EXPORT_SYMBOL vmlinux 0xd2d991a5 sock_no_listen +EXPORT_SYMBOL vmlinux 0xd2e5f57a matroxfb_DAC_in +EXPORT_SYMBOL vmlinux 0xd2f55930 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0xd2f941bf udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xd30b4180 tcp_shutdown +EXPORT_SYMBOL vmlinux 0xd324c336 unregister_netdev +EXPORT_SYMBOL vmlinux 0xd346402a fb_set_var +EXPORT_SYMBOL vmlinux 0xd38bc7c7 pci_wake_from_d3 +EXPORT_SYMBOL vmlinux 0xd38fdbfe ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0xd3951da4 acpi_resource_to_address64 +EXPORT_SYMBOL vmlinux 0xd3a748a4 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0xd3af979c memdup_user +EXPORT_SYMBOL vmlinux 0xd3b87a1b copy_io_context +EXPORT_SYMBOL vmlinux 0xd3e6053f rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0xd400f9bc mb_cache_create +EXPORT_SYMBOL vmlinux 0xd40319cd __seq_open_private +EXPORT_SYMBOL vmlinux 0xd408db43 scm_detach_fds +EXPORT_SYMBOL vmlinux 0xd46f2073 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xd4e88712 tcf_exts_validate +EXPORT_SYMBOL vmlinux 0xd5196efa vfsmount_lock +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd532915a bio_free +EXPORT_SYMBOL vmlinux 0xd5731f3a prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0xd57450bc up_read +EXPORT_SYMBOL vmlinux 0xd57f8789 iommu_num_pages +EXPORT_SYMBOL vmlinux 0xd581e4d0 get_disk +EXPORT_SYMBOL vmlinux 0xd5b5eee8 fb_class +EXPORT_SYMBOL vmlinux 0xd5ba38f8 netif_rx +EXPORT_SYMBOL vmlinux 0xd5dd3269 pci_prepare_to_sleep +EXPORT_SYMBOL vmlinux 0xd5f0029e sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0xd5f3b9e5 inet_select_addr +EXPORT_SYMBOL vmlinux 0xd5fb245a acpi_lock_ac_dir +EXPORT_SYMBOL vmlinux 0xd621756f seq_escape +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd6a60f60 iget_locked +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6b32193 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0xd6b48c0b netif_receive_skb +EXPORT_SYMBOL vmlinux 0xd6b7bf04 tcp_gro_receive +EXPORT_SYMBOL vmlinux 0xd6c49180 inode_set_bytes +EXPORT_SYMBOL vmlinux 0xd6ce77f6 pcim_iomap_table +EXPORT_SYMBOL vmlinux 0xd6d68c6b vm_stat +EXPORT_SYMBOL vmlinux 0xd6ddb00b genphy_read_status +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd71e2b3c vfs_readdir +EXPORT_SYMBOL vmlinux 0xd7641d11 user_path_at +EXPORT_SYMBOL vmlinux 0xd76e5c6f __page_symlink +EXPORT_SYMBOL vmlinux 0xd779bae5 try_to_release_page +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd77b87fc security_file_permission +EXPORT_SYMBOL vmlinux 0xd786386d jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd79c6a8b i2c_register_driver +EXPORT_SYMBOL vmlinux 0xd7f5b4a9 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xd7fc70b5 blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd83faecf seq_release +EXPORT_SYMBOL vmlinux 0xd86551d4 register_netdev +EXPORT_SYMBOL vmlinux 0xd88991ea iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0xd88f01aa register_key_type +EXPORT_SYMBOL vmlinux 0xd89da37f movable_zone +EXPORT_SYMBOL vmlinux 0xd8acbc4e pci_bus_type +EXPORT_SYMBOL vmlinux 0xd8b05706 simple_rmdir +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8ed35a3 phy_start_aneg +EXPORT_SYMBOL vmlinux 0xd8ed663f pci_setup_cardbus +EXPORT_SYMBOL vmlinux 0xd8ee48d5 arp_create +EXPORT_SYMBOL vmlinux 0xd8f3bbd2 nlmsg_notify +EXPORT_SYMBOL vmlinux 0xd9091363 acpi_install_notify_handler +EXPORT_SYMBOL vmlinux 0xd92f7854 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0xd9328b7e dev_mc_delete +EXPORT_SYMBOL vmlinux 0xd935bbc7 ia64_mca_printk +EXPORT_SYMBOL vmlinux 0xd93cb8be sn_bus_free_sysdata +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd988417b nobh_write_end +EXPORT_SYMBOL vmlinux 0xd9b04772 dquot_scan_active +EXPORT_SYMBOL vmlinux 0xd9d38b50 brioctl_set +EXPORT_SYMBOL vmlinux 0xd9dc1a2c generic_file_open +EXPORT_SYMBOL vmlinux 0xd9ecbff9 _spin_lock_bh +EXPORT_SYMBOL vmlinux 0xd9fcfa6b register_sysctl_table +EXPORT_SYMBOL vmlinux 0xd9fd51a0 check_disk_change +EXPORT_SYMBOL vmlinux 0xda00343b journal_revoke +EXPORT_SYMBOL vmlinux 0xda0a6b0e acpi_map_lsapic +EXPORT_SYMBOL vmlinux 0xda10097a pci_set_dma_max_seg_size +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda4629e4 radix_tree_insert +EXPORT_SYMBOL vmlinux 0xda498503 con_copy_unimap +EXPORT_SYMBOL vmlinux 0xda59323c pskb_expand_head +EXPORT_SYMBOL vmlinux 0xda706ee7 insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda97bd4b xfrm_user_policy +EXPORT_SYMBOL vmlinux 0xdab5dd2c neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0xdae1ff05 __serio_register_driver +EXPORT_SYMBOL vmlinux 0xdaf38160 bdget +EXPORT_SYMBOL vmlinux 0xdb22ec6b sn_prom_feature_available +EXPORT_SYMBOL vmlinux 0xdb543963 ___pskb_trim +EXPORT_SYMBOL vmlinux 0xdb5c8104 complete_all +EXPORT_SYMBOL vmlinux 0xdb73e428 cfb_copyarea +EXPORT_SYMBOL vmlinux 0xdb740931 ll_rw_block +EXPORT_SYMBOL vmlinux 0xdb843e8f pcim_pin_device +EXPORT_SYMBOL vmlinux 0xdba00442 mntput_no_expire +EXPORT_SYMBOL vmlinux 0xdbbcb861 deactivate_locked_super +EXPORT_SYMBOL vmlinux 0xdbc0b661 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbeba057 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc06d45a skb_gso_segment +EXPORT_SYMBOL vmlinux 0xdc14eda7 pci_pci_problems +EXPORT_SYMBOL vmlinux 0xdc25e125 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc3387b7 llc_set_station_handler +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc477230 sn_io_addr +EXPORT_SYMBOL vmlinux 0xdc5fefc0 flush_signals +EXPORT_SYMBOL vmlinux 0xdc67f733 complete_request_key +EXPORT_SYMBOL vmlinux 0xdc6b3954 udp_sendmsg +EXPORT_SYMBOL vmlinux 0xdc713ae3 bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xdcb5671d strlen +EXPORT_SYMBOL vmlinux 0xdccc37fa create_empty_buffers +EXPORT_SYMBOL vmlinux 0xdcedb06b kmalloc_caches +EXPORT_SYMBOL vmlinux 0xdcf41181 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xdd1777a1 udp_table +EXPORT_SYMBOL vmlinux 0xdd37a4f5 pnp_register_driver +EXPORT_SYMBOL vmlinux 0xdd3c4a4c bio_integrity_clone +EXPORT_SYMBOL vmlinux 0xdd3eb471 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0xdd43dadc skb_queue_tail +EXPORT_SYMBOL vmlinux 0xdd7906b9 ia64_spinlock_contention +EXPORT_SYMBOL vmlinux 0xdde1b5c4 fail_migrate_page +EXPORT_SYMBOL vmlinux 0xde0a1355 proc_symlink +EXPORT_SYMBOL vmlinux 0xde45e6a3 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0xde558e02 ia64_mlogbuf_dump +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde76e7bc sys_close +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde96c72b _write_trylock +EXPORT_SYMBOL vmlinux 0xdeaf12a1 security_path_truncate +EXPORT_SYMBOL vmlinux 0xdebc7dd6 qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0xdec03173 invalidate_partition +EXPORT_SYMBOL vmlinux 0xdee2fd32 __f_setown +EXPORT_SYMBOL vmlinux 0xdf0674f7 i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0xdf0da3cc acpi_get_devices +EXPORT_SYMBOL vmlinux 0xdf2fb3ba kfifo_alloc +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf67a7e9 do_SAK +EXPORT_SYMBOL vmlinux 0xdf7d72da journal_init_inode +EXPORT_SYMBOL vmlinux 0xdf81a9d0 llc_sap_close +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdf95d18c ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0xdfa56bc8 page_readlink +EXPORT_SYMBOL vmlinux 0xdfb7bada acpi_check_resource_conflict +EXPORT_SYMBOL vmlinux 0xdfb7c842 node_states +EXPORT_SYMBOL vmlinux 0xdfd20aac rtnl_unicast +EXPORT_SYMBOL vmlinux 0xdfdb0105 cpu_core_map +EXPORT_SYMBOL vmlinux 0xdffbe69c dma_get_ops +EXPORT_SYMBOL vmlinux 0xe00659ca dcache_dir_close +EXPORT_SYMBOL vmlinux 0xe03f3d58 set_create_files_as +EXPORT_SYMBOL vmlinux 0xe04c0a61 fddi_type_trans +EXPORT_SYMBOL vmlinux 0xe06887b1 jbd2_journal_start +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0ac8bd2 acpi_bus_generate_netlink_event +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0c56442 vfs_fstatat +EXPORT_SYMBOL vmlinux 0xe1097290 km_policy_expired +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe13cd8a7 dmi_name_in_vendors +EXPORT_SYMBOL vmlinux 0xe14c536b should_remove_suid +EXPORT_SYMBOL vmlinux 0xe15b9e9a register_exec_domain +EXPORT_SYMBOL vmlinux 0xe15f5956 unlock_rename +EXPORT_SYMBOL vmlinux 0xe16b0735 fasync_helper +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe18181ca mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0xe18c980a pci_pme_capable +EXPORT_SYMBOL vmlinux 0xe19321d6 jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0xe1bf97c0 dq_data_lock +EXPORT_SYMBOL vmlinux 0xe1def71b kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0xe1e5d743 locks_init_lock +EXPORT_SYMBOL vmlinux 0xe1e7fbd6 tty_port_hangup +EXPORT_SYMBOL vmlinux 0xe2016731 datagram_poll +EXPORT_SYMBOL vmlinux 0xe21f557e jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xe22480b5 input_grab_device +EXPORT_SYMBOL vmlinux 0xe22c8460 lease_modify +EXPORT_SYMBOL vmlinux 0xe2323d80 __init_rwsem +EXPORT_SYMBOL vmlinux 0xe238dd4f neigh_for_each +EXPORT_SYMBOL vmlinux 0xe24050c7 scnprintf +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe25f6cf3 fput +EXPORT_SYMBOL vmlinux 0xe272218d netif_carrier_off +EXPORT_SYMBOL vmlinux 0xe2726170 kill_anon_super +EXPORT_SYMBOL vmlinux 0xe29b04e9 acpi_set_firmware_waking_vector64 +EXPORT_SYMBOL vmlinux 0xe29cb7d0 percpu_counter_set +EXPORT_SYMBOL vmlinux 0xe2a32a7c _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0xe2b6da61 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0xe2c5a9c9 swiotlb_sync_single_for_cpu +EXPORT_SYMBOL vmlinux 0xe2c99d74 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0xe2d4ddb6 audit_log_format +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2d72906 tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0xe2d9ffb5 neigh_connected_output +EXPORT_SYMBOL vmlinux 0xe2dad463 sock_rfree +EXPORT_SYMBOL vmlinux 0xe3066274 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0xe3176128 otg_get_transceiver +EXPORT_SYMBOL vmlinux 0xe334b333 blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xe3467a27 generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe3a3d8fe register_8022_client +EXPORT_SYMBOL vmlinux 0xe3b0192b vscnprintf +EXPORT_SYMBOL vmlinux 0xe3b61323 hippi_mac_addr +EXPORT_SYMBOL vmlinux 0xe3ee27df blk_stack_limits +EXPORT_SYMBOL vmlinux 0xe3f093c1 alloc_trdev +EXPORT_SYMBOL vmlinux 0xe3fbe148 acpi_install_table_handler +EXPORT_SYMBOL vmlinux 0xe40b4774 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xe4254b59 vm_insert_page +EXPORT_SYMBOL vmlinux 0xe4273329 qdisc_destroy +EXPORT_SYMBOL vmlinux 0xe43617f7 acpi_gbl_FADT +EXPORT_SYMBOL vmlinux 0xe43a07e7 d_splice_alias +EXPORT_SYMBOL vmlinux 0xe43c4f81 scm_fp_dup +EXPORT_SYMBOL vmlinux 0xe446aa29 compat_mc_setsockopt +EXPORT_SYMBOL vmlinux 0xe451f90e sn_pci_unfixup_slot +EXPORT_SYMBOL vmlinux 0xe45670e2 open_exec +EXPORT_SYMBOL vmlinux 0xe484e35f ioread32 +EXPORT_SYMBOL vmlinux 0xe4850c56 kernel_read +EXPORT_SYMBOL vmlinux 0xe485f1e4 update_region +EXPORT_SYMBOL vmlinux 0xe4a7904a install_exec_creds +EXPORT_SYMBOL vmlinux 0xe4b40d45 inet_frags_init +EXPORT_SYMBOL vmlinux 0xe4f029cf ip_route_me_harder +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe5035258 journal_lock_updates +EXPORT_SYMBOL vmlinux 0xe50b9ee3 iget_failed +EXPORT_SYMBOL vmlinux 0xe50cf321 unbind_con_driver +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe526f136 __copy_user +EXPORT_SYMBOL vmlinux 0xe52d755f ia64_cpu_to_sapicid +EXPORT_SYMBOL vmlinux 0xe532ab6f inet_frag_evictor +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe6060ec0 seq_bitmap +EXPORT_SYMBOL vmlinux 0xe61debab jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0xe63b06ff neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0xe63ce738 _write_lock_irqsave +EXPORT_SYMBOL vmlinux 0xe6538918 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0xe66eb203 pnp_is_active +EXPORT_SYMBOL vmlinux 0xe69d1227 blk_remove_plug +EXPORT_SYMBOL vmlinux 0xe6c51164 zero_page_memmap_ptr +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe716baed acpi_unregister_ioapic +EXPORT_SYMBOL vmlinux 0xe7258c96 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0xe725a5e3 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0xe73dbca8 textsearch_unregister +EXPORT_SYMBOL vmlinux 0xe74acdbb revalidate_disk +EXPORT_SYMBOL vmlinux 0xe77a9659 skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0xe77bb847 idr_replace +EXPORT_SYMBOL vmlinux 0xe7876421 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0xe7a0b23f kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0xe7d18b7c pnp_get_resource +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7f288b1 xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xe803a031 unw_init_running +EXPORT_SYMBOL vmlinux 0xe8116e08 __kmalloc_node +EXPORT_SYMBOL vmlinux 0xe81bd8c7 tcf_action_exec +EXPORT_SYMBOL vmlinux 0xe823816d pci_enable_msi_block +EXPORT_SYMBOL vmlinux 0xe8555560 flush_tlb_range +EXPORT_SYMBOL vmlinux 0xe8679178 __divdi3 +EXPORT_SYMBOL vmlinux 0xe868c416 inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0xe8790f0d qdisc_reset +EXPORT_SYMBOL vmlinux 0xe88b8783 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xe8cd527e inet_frag_kill +EXPORT_SYMBOL vmlinux 0xe8ceeba1 key_unlink +EXPORT_SYMBOL vmlinux 0xe8fc39d3 mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0xe901737e devcgroup_inode_permission +EXPORT_SYMBOL vmlinux 0xe9076b2f journal_restart +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe933d835 matroxfb_register_driver +EXPORT_SYMBOL vmlinux 0xe96c1226 skb_push +EXPORT_SYMBOL vmlinux 0xe96c5be8 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0xe974d599 input_unfilter_device +EXPORT_SYMBOL vmlinux 0xe9953aa9 sn_system_size +EXPORT_SYMBOL vmlinux 0xe9958711 genphy_resume +EXPORT_SYMBOL vmlinux 0xe99c20b8 blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0xe9bdd1a9 unw_access_pr +EXPORT_SYMBOL vmlinux 0xe9c6aef4 down_read +EXPORT_SYMBOL vmlinux 0xe9cc1ccb dput +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea1121f6 try_to_free_buffers +EXPORT_SYMBOL vmlinux 0xea151527 bio_add_page +EXPORT_SYMBOL vmlinux 0xea1f2837 __invalidate_device +EXPORT_SYMBOL vmlinux 0xea20f437 nf_reinject +EXPORT_SYMBOL vmlinux 0xea5f5313 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea89c11e pagevec_lookup +EXPORT_SYMBOL vmlinux 0xeaa7ed87 security_path_unlink +EXPORT_SYMBOL vmlinux 0xeabe1cd2 sock_i_uid +EXPORT_SYMBOL vmlinux 0xeacebbf0 lookup_bdev +EXPORT_SYMBOL vmlinux 0xead58fb9 print_hex_dump +EXPORT_SYMBOL vmlinux 0xeadaaa9e generic_listxattr +EXPORT_SYMBOL vmlinux 0xeae7c45e wait_on_page_bit +EXPORT_SYMBOL vmlinux 0xeb16163b io_space +EXPORT_SYMBOL vmlinux 0xeb3303d6 tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0xeb4c6f65 inet_sendmsg +EXPORT_SYMBOL vmlinux 0xeb731657 journal_flush +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xebbf1dba strncasecmp +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebec1556 fb_show_logo +EXPORT_SYMBOL vmlinux 0xec02b498 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xec1c7caf sysctl_intvec +EXPORT_SYMBOL vmlinux 0xec24265d wireless_spy_update +EXPORT_SYMBOL vmlinux 0xec27cd5a compat_mc_getsockopt +EXPORT_SYMBOL vmlinux 0xec576bfb input_unregister_device +EXPORT_SYMBOL vmlinux 0xec6061ef inode_init_once +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xec93b486 eth_header_parse +EXPORT_SYMBOL vmlinux 0xec9c79aa log_wait_commit +EXPORT_SYMBOL vmlinux 0xecadf699 simple_fill_super +EXPORT_SYMBOL vmlinux 0xecb948a6 kernel_connect +EXPORT_SYMBOL vmlinux 0xecd8f3de nf_hook_slow +EXPORT_SYMBOL vmlinux 0xecdaaa19 sk_wait_data +EXPORT_SYMBOL vmlinux 0xecefb5c6 blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0xed2b7d40 textsearch_register +EXPORT_SYMBOL vmlinux 0xed31dc37 kfree_skb +EXPORT_SYMBOL vmlinux 0xed325d72 pci_vpd_truncate +EXPORT_SYMBOL vmlinux 0xed3eff66 tcf_em_unregister +EXPORT_SYMBOL vmlinux 0xed52216f qdisc_list_del +EXPORT_SYMBOL vmlinux 0xed864111 bd_release +EXPORT_SYMBOL vmlinux 0xed9226c8 pci_set_mwi +EXPORT_SYMBOL vmlinux 0xed961cea pci_write_vpd +EXPORT_SYMBOL vmlinux 0xed9bd119 seq_lseek +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xeda88a82 mempool_create_node +EXPORT_SYMBOL vmlinux 0xedb0e822 skb_over_panic +EXPORT_SYMBOL vmlinux 0xedb96851 nonseekable_open +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedc03953 iounmap +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee39eb56 sock_map_fd +EXPORT_SYMBOL vmlinux 0xee45a775 notify_change +EXPORT_SYMBOL vmlinux 0xee466286 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0xee56151e textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0xee6c28ae elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0xee74126c blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0xee7eb9e1 pnp_platform_devices +EXPORT_SYMBOL vmlinux 0xee7f14df get_empty_filp +EXPORT_SYMBOL vmlinux 0xee823fdf single_release +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeaf71d9 tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0xeeb8a24c xor_ia64_2 +EXPORT_SYMBOL vmlinux 0xeed6998b matroxfb_read_pins +EXPORT_SYMBOL vmlinux 0xeef00d2d pnp_device_detach +EXPORT_SYMBOL vmlinux 0xef12f0b0 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0xef3db45b sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0xef4d874e lock_super +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef9aedfc boot_option_idle_override +EXPORT_SYMBOL vmlinux 0xefbb6a21 napi_complete +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xefe099c3 acpi_get_event_status +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf009976b boot_tvec_bases +EXPORT_SYMBOL vmlinux 0xf00a6096 dev_addr_del +EXPORT_SYMBOL vmlinux 0xf01750aa phy_attach +EXPORT_SYMBOL vmlinux 0xf03a16dd cdev_alloc +EXPORT_SYMBOL vmlinux 0xf065f629 ioread16be +EXPORT_SYMBOL vmlinux 0xf06960c2 submit_bio +EXPORT_SYMBOL vmlinux 0xf07c4e2f jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0xf086b811 i2c_master_send +EXPORT_SYMBOL vmlinux 0xf092fb99 pv_cpu_ops +EXPORT_SYMBOL vmlinux 0xf0a3ae87 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xf0bed2cc journal_load +EXPORT_SYMBOL vmlinux 0xf0e37049 blk_peek_request +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f99079 blk_alloc_queue +EXPORT_SYMBOL vmlinux 0xf106ecb3 acpi_evaluate_object_typed +EXPORT_SYMBOL vmlinux 0xf10de535 ioread8 +EXPORT_SYMBOL vmlinux 0xf11686b4 pci_get_class +EXPORT_SYMBOL vmlinux 0xf119b424 load_nls +EXPORT_SYMBOL vmlinux 0xf1394a2a __strlen_user +EXPORT_SYMBOL vmlinux 0xf145378a free_buffer_head +EXPORT_SYMBOL vmlinux 0xf16edaec tioca_gart_found +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf1b37707 pnp_start_dev +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1e4166e __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf221e8a8 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0xf2617417 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2a44d0b __netif_schedule +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf31c10d8 pci_get_device +EXPORT_SYMBOL vmlinux 0xf331d6b7 seq_path +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf3447fd8 _write_unlock_bh +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf34e4b6f vfs_statfs +EXPORT_SYMBOL vmlinux 0xf3634fb9 fb_set_suspend +EXPORT_SYMBOL vmlinux 0xf37728a9 sleep_on +EXPORT_SYMBOL vmlinux 0xf38749c3 DAC1064_global_init +EXPORT_SYMBOL vmlinux 0xf394706e shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf397d7bb jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0xf39a5c6c qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0xf3bc9591 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3c212e5 __scm_send +EXPORT_SYMBOL vmlinux 0xf40ef9ec d_validate +EXPORT_SYMBOL vmlinux 0xf42bfe13 ida_remove +EXPORT_SYMBOL vmlinux 0xf441ac43 ioread8_rep +EXPORT_SYMBOL vmlinux 0xf45659e1 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xf457b6af __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xf46eb31f sock_register +EXPORT_SYMBOL vmlinux 0xf4c31f82 do_truncate +EXPORT_SYMBOL vmlinux 0xf4de4f23 sk_filter +EXPORT_SYMBOL vmlinux 0xf4e1860b in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xf4e2aef0 __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xf4e3c323 acpi_notifier_call_chain +EXPORT_SYMBOL vmlinux 0xf4ea4e35 serio_unregister_port +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf50f3673 gen_pool_destroy +EXPORT_SYMBOL vmlinux 0xf5167773 jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xf5172042 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0xf53cb409 pci_bus_write_config_word +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf53dd3cf __insert_inode_hash +EXPORT_SYMBOL vmlinux 0xf56b2894 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0xf5812175 seq_printf +EXPORT_SYMBOL vmlinux 0xf58e8783 compat_tcp_setsockopt +EXPORT_SYMBOL vmlinux 0xf5c27bb9 bio_pair_release +EXPORT_SYMBOL vmlinux 0xf5c86732 elv_add_request +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5de1efc prepare_binprm +EXPORT_SYMBOL vmlinux 0xf5e8e2ce tcp_rcv_established +EXPORT_SYMBOL vmlinux 0xf5e95bab kobject_del +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf5ecddf9 bio_unmap_user +EXPORT_SYMBOL vmlinux 0xf6201a22 sock_no_bind +EXPORT_SYMBOL vmlinux 0xf62c9b9d generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xf69ab900 bio_split +EXPORT_SYMBOL vmlinux 0xf6ad41ea vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6bc720b tty_unregister_driver +EXPORT_SYMBOL vmlinux 0xf6c2556f xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xf6df77ac pci_find_parent_resource +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf79a516c __splice_from_pipe +EXPORT_SYMBOL vmlinux 0xf7c76885 netlink_set_err +EXPORT_SYMBOL vmlinux 0xf7cb05bc grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0xf7e57634 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0xf82abc1d isa_dma_bridge_buggy +EXPORT_SYMBOL vmlinux 0xf82e3d47 acpi_initialize_objects +EXPORT_SYMBOL vmlinux 0xf85f6057 write_cache_pages +EXPORT_SYMBOL vmlinux 0xf882f8fb pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0xf88e0ee2 acpi_get_table_header +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8c5ca85 tcp_disconnect +EXPORT_SYMBOL vmlinux 0xf8c7e951 journal_get_create_access +EXPORT_SYMBOL vmlinux 0xf8cb7309 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0xf8cd7421 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0xf8e05b50 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0xf905bbed tcf_exts_dump +EXPORT_SYMBOL vmlinux 0xf9627b58 sock_recvmsg +EXPORT_SYMBOL vmlinux 0xf96b513c __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xf96bbfaa lock_may_write +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9e5f3eb genphy_config_aneg +EXPORT_SYMBOL vmlinux 0xf9e9bb9e vfs_path_lookup +EXPORT_SYMBOL vmlinux 0xfa486f5b tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xfa862420 journal_dirty_data +EXPORT_SYMBOL vmlinux 0xfa9dbac8 blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0xfaae85bc __wake_up +EXPORT_SYMBOL vmlinux 0xfad4cf7e dev_disable_lro +EXPORT_SYMBOL vmlinux 0xfadf9662 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0xfaec96ee matrox_cfbX_init +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfafc354e vfs_mkdir +EXPORT_SYMBOL vmlinux 0xfb0443fb acpi_get_parent +EXPORT_SYMBOL vmlinux 0xfb0cf2e9 touch_all_softlockup_watchdogs +EXPORT_SYMBOL vmlinux 0xfb29a5c5 register_quota_format +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb762652 page_put_link +EXPORT_SYMBOL vmlinux 0xfb7d9c45 __udivsi3 +EXPORT_SYMBOL vmlinux 0xfbb6605f xfrm_init_state +EXPORT_SYMBOL vmlinux 0xfbda23ec mdio_bus_type +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbeb21f9 __elv_add_request +EXPORT_SYMBOL vmlinux 0xfbed61ae misc_register +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc2501cc _spin_lock_irqsave +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc57317f request_key +EXPORT_SYMBOL vmlinux 0xfc74ae40 xrlim_allow +EXPORT_SYMBOL vmlinux 0xfc818da5 mpage_readpage +EXPORT_SYMBOL vmlinux 0xfc8b6eeb framebuffer_release +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcbb10de kick_iocb +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd01f125 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0xfd19eaeb memcpy_fromio +EXPORT_SYMBOL vmlinux 0xfd1e826a __pagevec_release +EXPORT_SYMBOL vmlinux 0xfd51a800 __secpath_destroy +EXPORT_SYMBOL vmlinux 0xfd7430f3 buffer_migrate_page +EXPORT_SYMBOL vmlinux 0xfd7d7713 acpi_exception +EXPORT_SYMBOL vmlinux 0xfd87980f d_alloc +EXPORT_SYMBOL vmlinux 0xfd8b0bf3 jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0xfd9ffc8b elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0xfda85a7d request_threaded_irq +EXPORT_SYMBOL vmlinux 0xfda8ac4f tty_kref_put +EXPORT_SYMBOL vmlinux 0xfdb9b629 ioread32be +EXPORT_SYMBOL vmlinux 0xfddc6f6a tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe2403ed set_blocksize +EXPORT_SYMBOL vmlinux 0xfe26fc7c nr_node_ids +EXPORT_SYMBOL vmlinux 0xfe392bcd generic_segment_checks +EXPORT_SYMBOL vmlinux 0xfe471239 unw_access_fr +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe5ea71a xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0xfe6350fb pci_find_bus +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfe7c4287 nr_cpu_ids +EXPORT_SYMBOL vmlinux 0xfead03fb do_splice_to +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfece1d92 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0xfeced4a0 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfedf745d skb_seq_read +EXPORT_SYMBOL vmlinux 0xfee89bc2 napi_gro_frags +EXPORT_SYMBOL vmlinux 0xfeed23b7 generic_show_options +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff242bb2 fbcon_set_tileops +EXPORT_SYMBOL vmlinux 0xff48b380 pnp_possible_config +EXPORT_SYMBOL vmlinux 0xff59fc1d ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0xff5a7bf4 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff7559e4 ioport_resource +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffa97e2b simple_empty +EXPORT_SYMBOL vmlinux 0xffaf4336 __devm_release_region +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffeb7cb0 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0xfffe7382 generic_write_checks +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x5986da1a crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x14d6dd68 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x33852a68 async_trigger_callback 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drivers/media/dvb/siano/smsmdtv 0x49af62e5 sms_board_lna_control +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x570b4542 sms_board_power +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x68026555 sms_board_led_feedback +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6c5d5008 smsclient_sendrequest +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098 sms_board_load_modules +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277 smsendian_handle_message_header +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x89c0d061 smscore_get_device_mode +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x985c7719 smscore_register_client +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9b13b269 smscore_getbuffer +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xdf14d9a0 sms_board_event +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe18da94d smscore_get_board_id +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xea492bd7 smscore_unregister_hotplug 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cx231xx_send_gpio_cmd +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x7091d626 cx231xx_uninit_vbi_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb9bdec5f cx231xx_init_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe04a79df cx231xx_send_usb_command +EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x5783fbf7 cx88_setup_xc3028 +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x0e546aee em28xx_set_mode +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x1f906910 em28xx_init_isoc +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7109d15a em28xx_audio_analog_set +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c em28xx_tuner_callback +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x82b0fa30 em28xx_isoc_dvb_max_packetsize +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xab6717eb em28xx_audio_setup +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xb6d9e467 em28xx_uninit_isoc +EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x241ecb6b saa7134_s_std_internal +EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x93668b3e saa7134_ts_qops +EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x97a12b10 saa7134_s_ctrl_internal +EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xd0855b1a saa7134_g_ctrl_internal +EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xdb2d8092 saa7134_queryctrl +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x1f28aeb0 v4l2_i2c_new_probed_subdev +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x4d3d7cf6 v4l2_i2c_subdev_init +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x9f73f737 v4l2_i2c_new_subdev_cfg +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xb789a11c v4l2_i2c_new_subdev_board +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xbaa5a36b v4l2_i2c_subdev_addr +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xc79d478d v4l2_i2c_new_probed_subdev_addr +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xedb3ee13 v4l2_i2c_new_subdev +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac v4l2_i2c_tuner_addrs +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e v4l_bound_align_image +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0xfef63bec v4l2_compat_ioctl32 +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x3b9740c5 v4l2_int_ioctl_0 +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x97a46b93 v4l2_int_ioctl_1 +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24 v4l2_int_device_try_attach_all +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xb3412fa6 v4l2_int_device_unregister +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xcb192b37 v4l2_int_device_register +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x099c3909 videobuf_qbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0b819c1b videobuf_iolock +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0cf14e13 videobuf_mmap_setup +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x10281bc4 videobuf_queue_core_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1881dfa7 videobuf_mmap_free +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1fdc36fc videobuf_reqbufs +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x29440b1b __videobuf_mmap_setup +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x29785baa videobuf_waiton +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x39df7176 videobuf_poll_stream +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4de0032c videobuf_streamoff +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4e300a19 videobuf_querybuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x513b1835 videobuf_alloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x599779ba videobuf_stop +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5a1fa562 videobuf_queue_is_busy +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5a5bca7e videobuf_cgmbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x70d0bb6a videobuf_read_stop +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x765f782d videobuf_read_start +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7a365177 videobuf_dqbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x81446536 videobuf_streamon +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9e4a7c64 videobuf_queue_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa2cc7bf4 videobuf_next_field +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa311f5d0 videobuf_read_stream +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa9d6be69 videobuf_queue_cancel +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xaa960796 videobuf_mmap_mapper +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbf1afb31 videobuf_read_one +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x01243bbe videobuf_to_dma +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x429e896e videobuf_sg_dma_unmap +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x45bbc358 videobuf_sg_dma_map +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x57fc211f videobuf_dma_init_user +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7012d5c9 videobuf_dma_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8a75af7f videobuf_dma_init_kernel +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43 videobuf_vmalloc_to_sg +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2 videobuf_sg_alloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xac226f58 videobuf_dma_init_overlay +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc3bde7b9 videobuf_dma_sync +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc7a862ac videobuf_queue_sg_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc8191041 videobuf_dma_free +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe4406da1 videobuf_dma_map +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xfcf57337 videobuf_dma_unmap +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x26aff114 videobuf_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x2b433852 videobuf_queue_vmalloc_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x8198743e videobuf_vmalloc_free +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x25d12350 v4l2_device_register_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x4370185d v4l2_device_set_name +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x5d0f2ff7 v4l2_device_unregister +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x618b5daf v4l2_device_disconnect +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa51809ff v4l2_device_unregister_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xf6e31420 v4l2_device_register +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x00f79a93 i2o_dma_alloc +EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x04c70ede i2o_dma_realloc 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+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x663a3bd8 sm501_set_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xdea410d0 sm501_find_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xf7d24df1 sm501_misc_control +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x006335fe wm8350_device_exit +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0676e596 wm8350_block_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2f4c1d5b wm8350_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3b0098c3 wm8350_reg_lock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3d2a4f59 wm8350_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x42949ad8 wm8350_device_init +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x54dd2b40 wm8350_mask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x78eccf41 wm8350_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7f41365b wm8350_gpio_config +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9d1a677a wm8350_unmask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xaa8fbd5f wm8350_reg_unlock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xbb79b8ac wm8350_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcd1f1f75 wm8350_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe836ebd2 wm8350_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xed529abe wm8350_read_auxadc +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf1259fbd wm8350_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x0ba17ff7 wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x8af3102b wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x8cea1013 wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xe56c5ed5 wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x3217464e cb710_pci_update_config_reg +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x689df2dc cb710_set_irq_handler +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xac8f2683 cb710_sg_dwiter_read_next_block +EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xeff12acf cb710_sg_dwiter_write_next_block +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x1018eee0 xp_restrict_memprotect +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x345c9217 xpc_disconnect +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x39046c7a xpc_clear_interface +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x4b1ca752 xp_nofault_PIOR_target +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x5797cfbc xpc_set_interface +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x6285dfe8 xp_cpu_to_nasid +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x64ba5017 xp_pa +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x68d27065 xp_expand_memprotect +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x7204e746 xp_remote_memcpy +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x76e36d39 xp_region_size +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x7c3462de xp_nofault_PIOR +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x902b9392 xpc_registrations +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x937be528 xpc_interface +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xcd468100 xpc_connect +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xead4f7fe xp_max_npartitions +EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xf3b47f67 xp_partition_id +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0226bb47 sdio_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x07d12f74 sdio_claim_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x08075c32 sdio_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x209680f5 sdio_readw +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2d4441be sdio_set_block_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x321c6960 sdio_disable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x34616120 sdio_align_size +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x441ae83d sdio_register_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x4850cf90 sdio_memcpy_fromio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x51e3e5a0 sdio_enable_func +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5ad8237b sdio_writel +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5ffca726 sdio_release_irq +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x62b880b5 sdio_release_host +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x7a857e02 sdio_readl +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x8104ec39 sdio_f0_writeb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x85b9582b sdio_readsb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x93763f62 sdio_memcpy_toio +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa240f7b9 sdio_writew +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb1a4b902 sdio_f0_readb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb5ac5d6a sdio_unregister_driver +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xbab666cb sdio_writesb +EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc3f5118b sdio_claim_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x08996fb7 sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2a490f45 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x307e70e4 sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xb92853db sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xcf3ddfba sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xfeb0814f sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x22dd448c cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x5db7ac7a cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x74ad57d9 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xa482528b cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xc26e4181 cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x525ac596 cfi_qry_mode_on +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x5dcc925c cfi_qry_mode_off +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xb6b7254a cfi_qry_present +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x7bf6b4e0 DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x7cc5ca1c DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x8d389a4e DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1b29faf0 kill_mtd_super +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x22b525cf parse_mtd_partitions +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2c5b6d9a mtd_erase_callback +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2e988db6 register_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2f2c1412 get_sb_mtd +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3b0f575c default_mtd_writev +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3bc03c71 mtd_table +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3fd54238 get_mtd_device_nm +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x45d049ea get_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x51ac2950 mtd_table_mutex +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5e0599e9 unregister_mtd_user +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x77af9982 del_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa471f0da deregister_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb0f74392 add_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb59bc8ef register_mtd_parser +EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb66d7f4c put_mtd_device +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x2730861f del_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x5de8d518 add_mtd_blktrans_dev +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xcaaf365a deregister_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xcd99a8b7 register_mtd_blktrans +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x0b040755 nand_release +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x419b3fd1 nand_scan_ident +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xe89ecf0d nand_scan_tail +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xf196101a nand_scan +EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xf3cb395e nand_wait_ready +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x18651c70 onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x267283ca onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x25d529f2 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2680f9e8 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3ccc0b8c ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6d93c9fa ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7f8fe4e7 ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x946a786a ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x947a0b88 ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa702edfe ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xc9a11ffa ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd00841a8 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe9512558 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd796ef3 ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1d6545cc open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x496613bf can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x49e145bd close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5dda38cb free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x86062ab7 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb4f13c69 can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xdba3e4c0 unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xea45dcfc can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf1bb54e6 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0721b48f unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x45d085fd register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xd35db4b0 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xe94a83c2 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0859eee2 mlx4_multicast_detach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x19cc87a0 mlx4_mr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ce037a6 mlx4_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x215637df mlx4_srq_arm +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x25e6db96 mlx4_buf_write_mtt +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2bf8b219 mlx4_cq_resize +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2e2f403e mlx4_fmr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x360d5b25 mlx4_mtt_cleanup +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x36898924 mlx4_srq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x36f346c6 mlx4_register_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3ea7cff1 mlx4_buf_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x41681f5f mlx4_qp_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42c33d79 mlx4_unregister_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x45af7f23 mlx4_register_vlan +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x47f39a4c mlx4_pd_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4814476f mlx4_map_phys_fmr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x497b9d72 mlx4_qp_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x55facfb1 mlx4_alloc_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5c634709 mlx4_qp_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5e414224 mlx4_pd_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5ecf0ec7 mlx4_uar_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x633fd922 mlx4_cq_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x63f7122c mlx4_qp_release_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67f291da mlx4_unregister_interface +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x699bce6a mlx4_multicast_attach +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x766a8472 mlx4_mtt_init +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7e8fd670 mlx4_CLOSE_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x808c70f1 mlx4_free_cmd_mailbox +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8d3ad914 mlx4_mr_enable +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x98378930 mlx4_SYNC_TPT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9adee409 mlx4_fmr_unmap +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c143eaf mlx4_free_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa1a32ae6 mlx4_buf_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa32da773 mlx4_mr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaa7e5467 mlx4_cq_modify +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xac493a39 mlx4_qp_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb0441487 mlx4_cq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbc7d6ce7 mlx4_fmr_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc60c5cd5 mlx4_db_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc6fd9e0e mlx4_qp_remove +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc867fc84 mlx4_srq_query +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xccc2cac3 mlx4_db_alloc +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd6265e55 mlx4_INIT_PORT +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd9bf2c65 mlx4_register_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdaf30055 mlx4_alloc_hwq_res +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe09fc4ef mlx4_qp_reserve_range +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe8d13178 mlx4_srq_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe981629a mlx4_mtt_addr +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeb3cda44 mlx4_qp_to_ready +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xefb167ca mlx4_fmr_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf06d8947 mlx4_unregister_mac +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf2160034 mlx4_uar_free +EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf95164ae __mlx4_cmd +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x2a2b038b usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x640291c3 usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x61d5cf8d generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x78356fce rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc5ee8828 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc990d9f6 rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xecfabf79 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfb6f1e8c rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x11bef505 usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x14b06531 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2778b7f0 usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2dc57d1b usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3daf8a3e usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x43b5b380 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x650c20e9 usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x780c29da usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x791b7883 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x828ea55c usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8c39deaf usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x943ceee5 usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa4faadb7 usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xab6d47de usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb42618b1 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc5972ab2 usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xccacfddd usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd411bd14 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe9b43990 usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf1a32054 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfab29dba usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x18fca8a6 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x20426b6f i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4374f33e i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4fa02025 i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x55039b57 i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6c9d64b7 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x772b4063 i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8b686b5d i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb65b7ce7 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xbce74063 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe685225d i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xeff1e684 i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xfb0c7753 i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xed608091 ieee80211_rx_any +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x06e0d3e1 lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x11d59f18 lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x237dce43 lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x39de0bc8 lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x72ae3e12 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x911be605 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa34355a7 lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcd575d11 lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd7f2b9cb lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdcc7c762 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xde695fb0 lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe56ecacd __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xed665133 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfc1862c3 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfede1d91 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x095536d0 lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x5769db42 lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x733af33f lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7d3c4674 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7ece0e80 lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcdaa579c lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd73a2604 lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xebe080d9 __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x2fdaf45b if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x7e67dc8d if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x05c5e512 p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x167af013 p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1ee14ae0 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3fd48164 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x45207b0f p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x726c6d26 p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x7bc22c3a p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe4c9b34d p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x147c7ec9 rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2bbed596 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2c96daa0 rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x31503f6b rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x32844ab5 rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x394b6411 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3c354a04 rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3cc7ab32 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3e736dca rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4dfb852f rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5c6db357 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x74008665 rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7e431edf rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7f206264 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x99020178 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa01c54b5 rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb24beab9 rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb3afa20b rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbd5c4974 rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd2a1027f rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd3448d7f rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf7ed42fb rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x11aca271 rt2x00pci_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x1a7f8d97 rt2x00pci_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x352293f1 rt2x00pci_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3d8911e9 rt2x00pci_remove +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8d374bf7 rt2x00pci_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa22d7241 rt2x00pci_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc841c38b rt2x00pci_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe35554b6 rt2x00pci_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf7b4004a rt2x00pci_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0168862a rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x01beb06f rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x02171d68 rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0443997b rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x14556428 rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x43109a2a rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5e16b01c rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7585e3a9 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7c57c1e3 rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa87de1aa rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xac1753de rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb01d5192 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb9a0766e rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd77e5065 rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf0ab465c rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xfc3e644b rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xa4d639ba pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd703fdd2 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x80534455 wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x80927452 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8ad14445 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb1d79e4a wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd8aea19a wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf616f399 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xf626d3e4 wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x050ec8b3 scsi_unregister_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x3ad727db scsi_dh_detach +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2 scsi_dh_handler_exist +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x5a8f6c7c scsi_register_device_handler +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xa4ff0ac2 scsi_dh_activate +EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xb1bb50c5 scsi_dh_attach +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xd6e4aebd fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a17143d iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ef92971 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1f4ff3f5 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x27afe0b4 iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2ecd7ddc iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x34ab9320 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41784a74 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x447cd2f1 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x44b32f02 iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4aad5e90 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5cd66d74 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6029f928 iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6552a8b3 iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x67a3d2ec iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x810ca2f6 iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x81a9604d iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x877aefcc iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x87da764f iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x89150475 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x891636a4 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8bae088a iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8c340a0b iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x91127cd1 iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9785ec28 iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x986f16e4 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9ba157fa iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa33f10b5 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xab692a47 iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xad60040a __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb1aa12a0 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbad64da8 iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc0a29649 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd1d78b1c iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdfe4ccd2 iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe2cf1a82 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe3dfea90 iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe5451560 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf34de9dd iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf8216a0c iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfa4fef40 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0d67092f iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1ff05b53 iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2e8f0b2d iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x335c3864 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x36163753 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4ee0401a iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6150d4d4 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x738850c0 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8fb0c4c2 iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x930e6964 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xad706f38 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb48eedaf iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbb0284bb iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbea1fd0f iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc9d35de1 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcca152bc iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x041509ff sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x38039c7b sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x40a328a8 sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4b6dbff5 sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x53e3ffa7 sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x549e792d sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5c9d4b8a sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x602d044a sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x62d1f8eb sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x79223909 sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7de84ad2 sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8a7f3a5d sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x93e58587 sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab07150f sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xac580a27 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc5e2b27d sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc957e5ff sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcfcc6daa __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe16f471c sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe69699a8 sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xee1a3757 sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf0001de2 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf8b645bc sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x36e843c7 srp_iu_get +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6a1c2487 srp_transfer_data +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7eaeb3ca srp_cmd_queue +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa138cac8 srp_iu_put +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xb3bf8b71 srp_target_free +EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xd7fdf71f srp_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x14a2c5a0 scsi_eh_ready_devs +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4 scsi_eh_get_sense +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x30e5d9ca scsi_flush_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a sdev_evt_alloc +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x3f28e211 scsi_target_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x40d2eeff scsi_mode_select +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x47ff81e3 scsi_internal_device_unblock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x533de7b9 scsi_nl_sock +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x5467ff83 __scsi_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x79cfe371 scsi_schedule_eh +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8 scsi_complete_async_scans +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7f613793 scsi_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x806c5366 sdev_evt_send +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x8cb24dc0 scsi_get_vpd_page +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x98d35bf9 scsi_target_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xa5d853dd scsi_nl_add_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27 scsi_nl_remove_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc22dd700 scsi_bus_type +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc35df774 scsi_nl_add_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f scsi_nl_remove_driver +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd6c3b3a0 sdev_evt_send_simple +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xfcb90c9e scsi_internal_device_block +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x253a10c6 scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x59da0fc4 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6c9ac7d8 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x720acb43 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x946b6cde scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa4382000 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb239c1c8 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe1a2b4f2 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf0b32759 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x032ac1cb iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x064b5363 iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1da58d8f iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1ff60ec6 iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x29a88273 iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2b6a9249 iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x42bcfc6b iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4448b35b iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x57e3ef53 iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6b8d6bc7 iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x76d1e309 iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d269486 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d7fbfea iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7ff25aa0 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa9b0733d iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaec8035c iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc7c2ba45 iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xce60c64c iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd0a09101 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd831dd86 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf770c8fe iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf990525a iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3cdcf893 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x40f1ad66 srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x6abe0101 srp_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x8b171f33 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xc2316150 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x98715be7 pciserial_remove_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xace4f850 pciserial_init_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xbc570db1 pciserial_resume_ports +EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xdfbf66aa pciserial_suspend_ports +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x1929a2a0 ioc3_gpcr_set +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x3429731f ioc3_ack +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x7d239db0 ioc3_unregister_submodule +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0xcdf5b4e4 ioc3_disable +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0xf54d7db9 ioc3_register_submodule +EXPORT_SYMBOL_GPL drivers/sn/ioc3 0xfd89831c ioc3_enable +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x107c52d0 spi_bitbang_setup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x6fa12b5f spi_bitbang_setup_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x8027454f spi_bitbang_transfer +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x934926b0 spi_bitbang_cleanup +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xaa882251 spi_bitbang_start +EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc47ccc67 spi_bitbang_stop +EXPORT_SYMBOL_GPL drivers/uio/uio 0x1d26f1f4 __uio_register_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0x76307458 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/uio/uio 0xea18d237 uio_event_notify +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x8f828fb7 usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xb550be6a usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0b9dc7b3 usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2424d3f6 usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x520bc3bb usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x59e24963 usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x6acf72c8 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x9f2d074b usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb35f0cd3 usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe1012fd9 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xfe7ad8ed usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x06330185 usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x063ab104 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1f2c47ac usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x48b7c107 usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4e74380d usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x51f8690b usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5e088927 usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x687f0a7d usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x75876f7e ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8fdc9bcc usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x95c83292 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa10850f9 usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa4ac897c usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe5077b90 usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf468265c usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x00333f51 usb_stor_bulk_srb +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004 usb_storage_usb_ids +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0f2e57dc usb_stor_control_msg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2 usb_stor_sense_invalidCDB +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1d1e3b86 usb_stor_suspend +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x289ebb29 usb_stor_bulk_transfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3f664810 usb_stor_disconnect +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x490d6dcd usb_stor_pre_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4a25dbfc usb_stor_probe1 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4c75953a usb_stor_ctrl_transfer +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5bdc5e88 usb_stor_bulk_transfer_sg +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x600625cb usb_stor_access_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x669a09ae usb_usual_ignore_device +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6c5619a9 usb_stor_set_xfer_buf +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8ae6877a usb_stor_Bulk_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8e0bd7d0 usb_stor_post_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x92fa79d3 fill_inquiry_response +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x970d7722 usb_stor_CB_reset +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9a7f0daf usb_stor_reset_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbbf0171c usb_stor_transparent_scsi_command +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbf5a1bf6 usb_stor_resume +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc769b3c5 usb_stor_clear_halt +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd91d1135 usb_stor_probe2 +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfba4ae4a usb_stor_CB_transport +EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xff97c9a0 usb_stor_Bulk_transport +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x45d1fafa wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9cfe493c rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa0b46170 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xcbf2e581 wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf8dcd55b __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x07e98b90 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3db131e0 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x51424a25 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6828be94 wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7653bc6d wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x965dd777 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9909b9f7 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9d871ed3 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb064331f wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbae02389 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc0619564 wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc1c5cb94 wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd0bc6312 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdb17e156 wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf5addd6 wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf7e21cf1 wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x3b18321a i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x8af32bad i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb325fb20 i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1eeea6e3 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x59e8eb95 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5ae87e41 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x69f759fa uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8ee76b25 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb8fb7db3 uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xc5d88ab2 uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xfabe0a05 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x174fd7b4 umc_device_create +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1aabac98 umc_device_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x401516e8 umc_device_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x69535139 umc_controller_reset +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x74aba060 umc_bus_type +EXPORT_SYMBOL_GPL drivers/uwb/umc 0x76c8fc77 umc_driver_unregister +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa7bec934 __umc_driver_register +EXPORT_SYMBOL_GPL drivers/uwb/umc 0xdb80f345 umc_match_pci_id +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x093bde96 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0ca6525a uwb_rc_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x187fca97 uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22aa3a24 uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x23af8501 uwb_rc_pre_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x26e8b747 uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x31067fc5 uwb_pal_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x35ef4ad5 uwb_rc_alloc +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3c201f99 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c uwb_rsv_type_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5 uwb_ie_next +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6c07b56e uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6d06e6a7 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x71b9f8d3 uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x84515e37 uwb_rsv_terminate +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x89627a38 uwb_notifs_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6 __uwb_addr_print +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8f9ca782 uwb_rc_mac_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x940333b3 uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f95c85b uwb_pal_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa427845b uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa52224ea uwb_rc_ie_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5f9869e uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaf2b29c4 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaf37cc18 uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb57d8dad __uwb_rc_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb6eb936e uwb_rc_vcmd +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc9b8e574 uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xca5cd1f8 uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd6fef8a1 uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd76ce042 uwb_dev_for_each +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xde5e1883 uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdfbcddda uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe0f5584d uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1e8ef16 uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf79dca26 uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf8066fff uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfae2eec3 uwb_rc_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfdf282c0 uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfef53c73 uwb_rc_cmd +EXPORT_SYMBOL_GPL drivers/uwb/whci 0x0ee04202 whci_wait_for +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x02f6201f wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0b59b7b8 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1542c3ad wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x158e48ee wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x16c87372 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x17a99fe6 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1869e859 wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x194dc5ef wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1cbee03d wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1e3800b4 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x342f65be wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3c1a43e6 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x416f8cd8 wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4389773b wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x50836cbb wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x57a545ca wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5db35079 wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5e4bc637 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x62e43185 wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6449e52b wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7614acdb wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7c2d6b77 wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x86966b70 wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x87c1543c wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x94fe0e40 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xacb8abd4 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb86a2bae wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc9d98fed wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe54e262e wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe9b140d0 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xee46c071 wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfbc345f0 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0217e994 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x02f69492 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x29fff33a ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x984514b5 ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xca38b779 ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf21dd9a1 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfb8e2d46 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x6b3e25ef fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x9e4532ab fb_sys_write +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x424ed027 sis_free_new +EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x6f5b122a sis_malloc_new +EXPORT_SYMBOL_GPL drivers/w1/wire 0x0ff3faec w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x1190db6b w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0x22c477c8 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x3ee77ef7 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x41465863 w1_next_pullup +EXPORT_SYMBOL_GPL drivers/w1/wire 0x4f720442 w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xabd99e23 w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xfd35ed89 w1_reset_select_slave +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x68180164 dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa9d87cb3 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xc0c88769 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xb545bf4f exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xf8d542e7 exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/fat/fat 0x04150747 fat_fill_super +EXPORT_SYMBOL_GPL fs/fat/fat 0x13142542 fat_search_long +EXPORT_SYMBOL_GPL fs/fat/fat 0x1793d154 fat_detach +EXPORT_SYMBOL_GPL fs/fat/fat 0x18aefec1 fat_flush_inodes +EXPORT_SYMBOL_GPL fs/fat/fat 0x25787406 fat_time_unix2fat +EXPORT_SYMBOL_GPL fs/fat/fat 0x45d18a84 fat_remove_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x4ae3e16f fat_dir_empty +EXPORT_SYMBOL_GPL fs/fat/fat 0x5318d7b4 fat_getattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x5916ff44 fat_setattr +EXPORT_SYMBOL_GPL fs/fat/fat 0x8bf9a604 fat_add_entries +EXPORT_SYMBOL_GPL fs/fat/fat 0x90d2ba18 fat_alloc_new_dir +EXPORT_SYMBOL_GPL fs/fat/fat 0x94520bb0 fat_attach +EXPORT_SYMBOL_GPL fs/fat/fat 0x9f66a080 fat_scan +EXPORT_SYMBOL_GPL fs/fat/fat 0xa84dd95f fat_build_inode +EXPORT_SYMBOL_GPL fs/fat/fat 0xa9f9ee52 fat_get_dotdot_entry +EXPORT_SYMBOL_GPL fs/fat/fat 0xe23aeda4 fat_fs_error +EXPORT_SYMBOL_GPL fs/fat/fat 0xea67f52b fat_free_clusters +EXPORT_SYMBOL_GPL fs/fat/fat 0xf881cdac fat_sync_inode +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0b901509 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x15a27979 nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe5714a44 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xebde37c4 nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf4d4c4f8 nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x5b4a3638 nfsacl_encode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x840640a2 nfsacl_decode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2fa23b13 o2nm_get_node_by_ip +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726 o2net_send_message_vec +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7118c8c0 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x968092f7 o2hb_register_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac o2net_register_handler +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb400c464 o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700 o2hb_check_node_heartbeating_from_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xc0582e2f o2hb_setup_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xcc38f3a4 o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c o2hb_check_local_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe5f2235e o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d o2net_unregister_handler_list +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017 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+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156 xdr_decode_string_inplace +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774 rpc_free_iostats +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b778b21 rpc_malloc +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d4ab207 cache_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d4b4263 xdr_reserve_space +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e594a09 svc_xprt_enqueue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ea8d38c svc_process +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9 xdr_encode_netobj +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3095d7bd xdr_encode_array2 +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31656c87 auth_domain_put +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59 rpc_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32a41480 rpc_lookup_cred +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32c25c08 rpc_create +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32da24ae svc_create_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3464d1d6 rpc_restart_call_prepare +EXPORT_SYMBOL_GPL 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nlm_debug +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55ba8720 svc_close_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x57ef4f9a svc_unreg_xprt_class +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5814d9db rpcb_getport_async +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a0d4e2f xprt_unregister_transport +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a8712c6 rpc_lookup_machine_cred +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000 rpc_proc_unregister +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5f1db772 xdr_read_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5f2fb659 svc_find_xprt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62860e09 xprt_update_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x63a6746e rpc_wake_up_next +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x641dc242 csum_partial_copy_to_xdr +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x64c88465 auth_unix_lookup +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x64eecdb4 xdr_inline_pages +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6668f17c svc_xprt_copy_addrs +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x66ee5a18 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rpc_force_rebind +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc5d1e88c xdr_shift_buf +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc7648d45 svcauth_unix_set_client +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea qword_addhex +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc9ce9d3d cache_unregister +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc6b1458 rpc_print_iostats +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xceb9a152 xprt_release_xprt_cong +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3 xprt_load_transport +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd023b42a svc_sock_create +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2b30992 xdr_decode_array2 +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd8913a16 rpc_wake_up_queued_task +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd9fcf825 svc_xprt_put +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd84ddc2 svc_set_num_threads +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe066f47c rpcauth_init_cred +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5184870 svc_sock_update_bufs +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1 xdr_encode_opaque +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe71ce039 svc_proc_register +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5 qword_get +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebfa42b6 svc_authenticate +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed8041d1 xprt_complete_rqst +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4 qword_add +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69 rpc_update_rtt +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf4218721 svc_max_payload +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf733d94a rpc_init_wait_queue +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf90de679 cache_purge +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c rpc_free +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc9144d9 auth_unix_forget_old +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd844326 rpc_wake_up_status +EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff2c87fa xprt_wake_pending_tasks +EXPORT_SYMBOL_GPL net/wimax/wimax 0x117d7df2 wimax_msg_send +EXPORT_SYMBOL_GPL net/wimax/wimax 0x1283c1a7 wimax_dev_init +EXPORT_SYMBOL_GPL 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+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14027b4c snd_hda_mixer_amp_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x16e70610 snd_hda_codec_get_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ca296bf snd_hda_multi_out_dig_close +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e5139d6 snd_hda_build_pcms +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x214e6ffd snd_hda_codec_amp_stereo +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21f1fa20 snd_hda_input_mux_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x23aa6ad3 snd_hda_resume +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27a8d851 snd_hda_delete_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x29470fb9 snd_hda_codec_setup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33e0ce0e snd_hda_check_board_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33ef7bab snd_hda_ch_mode_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x34cf88cb snd_hda_codec_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4704c6f5 snd_hda_ctl_add +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x54b12cd4 snd_hda_create_spdif_share_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x54fd5a90 snd_hda_check_amp_list_power +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5aa53b67 snd_hda_codec_cleanup_stream +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73 auto_pin_cfg_labels +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b188f66 snd_hda_power_up +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5c5d90a4 snd_hda_multi_out_dig_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5c7c46e1 snd_hda_find_mixer_ctl +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5e497399 snd_hda_codec_resume_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5e97fb90 snd_hda_mixer_bind_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6450e0f0 snd_hda_mixer_bind_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68639a19 snd_hda_query_pin_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6927220f snd_hda_bind_vol +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6fe2fbb8 snd_hda_add_vmaster +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7bd16d0c snd_hda_codec_set_pincfg +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d8506f6 snd_hda_bus_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85415c75 snd_hda_set_vmaster_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85b3510e snd_hda_mixer_amp_volume_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x887bb806 snd_hda_multi_out_dig_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8a21c9aa snd_hda_override_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x928f2a8f snd_hda_codec_resume_amp +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97906072 snd_hda_mixer_bind_ctls_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a2057f1 snd_hda_codec_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877 snd_array_free +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9c8d28e9 query_amp_caps +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d15e81a snd_hda_attach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa0a586f5 snd_hda_codec_amp_update +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa152bc02 snd_hda_mixer_bind_tlv +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76 snd_hda_get_jack_location +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2e4d088 snd_hda_ch_mode_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3190b3a snd_hda_multi_out_analog_cleanup +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3cbbd1c snd_hda_mixer_amp_switch_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa7e3c08d snd_hda_add_codec_preset +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaabd159c snd_hda_queue_unsol_event +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad577b12 snd_hda_mixer_bind_ctls_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e snd_print_pcm_rates +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb1b5f735 snd_hda_add_new_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb6884d25 snd_hda_codec_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb8b1a676 snd_hda_check_board_codec_sid_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbd86314d snd_hda_suspend +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc snd_array_new +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf42b3de snd_hda_ch_mode_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf744a6e snd_hda_mixer_amp_volume_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf904b7f snd_hda_multi_out_analog_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6 snd_hda_calc_stream_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69 snd_hda_get_jack_connectivity +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc8f69ac6 snd_hda_get_sub_nodes +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e snd_hda_get_jack_type +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0 snd_hda_input_mux_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcee28ba4 snd_hda_power_down +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd530d69c snd_hda_bind_sw +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd5a56791 snd_hda_build_controls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd5b60933 snd_hda_codec_amp_read +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdb559fd7 snd_hda_sequence_write +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdbce3aba snd_hda_is_supported_format +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xde9f842d snd_hda_mixer_amp_switch_get +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4507205 snd_hda_detach_beep_device +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4589f4d snd_hda_mixer_amp_switch_put +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe46d521b snd_hda_codec_write_cache +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6bf0515 snd_hda_create_spdif_out_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe86ec61b snd_hda_create_spdif_in_ctls +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xea5e7d87 snd_hda_multi_out_dig_open +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeac45943 snd_hda_mixer_bind_ctls_info +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721 snd_print_pcm_bits +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf06774ea snd_hda_multi_out_analog_prepare +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf806c5c7 snd_hda_parse_pin_def_config +EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf8e7683f snd_hda_mixer_amp_volume_info +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x6fee4fa3 soc_codec_dev_ad73311 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x7ac90fed ad73311_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xf2dabd2e soc_codec_device_ak4104 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xcc1340ff soc_codec_dev_ak4535 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xf97d1e0f ak4535_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x3b2fda6b cs4270_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xf956509e soc_codec_device_cs4270 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e l3_write +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x658ef0e3 pcm3008_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x75f81599 soc_codec_dev_pcm3008 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x7e4d1052 soc_codec_dev_ssm2602 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xcc69d87a ssm2602_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x29dff70f tlv320aic23_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xb5650398 soc_codec_dev_tlv320aic23 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x1a6ecc65 aic26_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x9a21e064 aic26_soc_codec_dev +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x3621e2ae aic3x_get_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x3a85372c aic3x_headset_detected +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x45dd273e aic3x_button_pressed +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x469a705e soc_codec_dev_aic3x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x894baccd aic3x_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xc1269817 aic3x_set_headset_detection +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd4d3040a aic3x_set_gpio +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x3a7e1f35 twl4030_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd1c0985a soc_codec_dev_twl4030 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x1078fe5f soc_codec_dev_uda134x +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x21c2c236 soc_codec_dev_uda1380 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x883e6ae2 uda1380_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x19828e27 soc_codec_dev_wm8350 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xc88f3f1f wm8350_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xde4318a0 wm8350_hp_jack_detect +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x829e7475 soc_codec_dev_wm8400 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x907219a1 wm8400_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x9346134e wm8510_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xa547c73c soc_codec_dev_wm8510 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xaa96fcb3 soc_codec_dev_wm8580 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xe0bd3451 wm8580_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x0cd88cc3 wm8728_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xc5d13be6 soc_codec_dev_wm8728 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x15d1ea98 soc_codec_dev_wm8731 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x8da0d6bf wm8731_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x0847a76b soc_codec_dev_wm8750 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x252c3020 wm8750_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x236af4a8 soc_codec_dev_wm8753 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x452ff845 wm8753_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x629e0db5 wm8900_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xee5312b3 soc_codec_dev_wm8900 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xc57e4170 soc_codec_dev_wm8903 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xe40a7f1b wm8903_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x96d129a6 wm8940_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xe95aba6f soc_codec_dev_wm8940 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x014e388f wm8960_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xeade6e01 soc_codec_dev_wm8960 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x6c65e09e wm8971_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xf2073577 soc_codec_dev_wm8971 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x2899c903 soc_codec_dev_wm8988 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xbd22c1bf wm8988_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xe182293c soc_codec_dev_wm8990 +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xf7064866 wm8990_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x92199f1f wm9081_dai +EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xb9331470 soc_codec_dev_wm9081 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03169d35 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09a08f5e snd_soc_info_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0cfd24aa snd_soc_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x16cf417a snd_soc_unregister_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1741404f snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17ee4bce snd_soc_new_pcms +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x18937e29 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1904ea0e snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1a494ba6 snd_soc_jack_add_pins +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c7dcec7 snd_soc_free_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1f97b8de snd_soc_register_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x225a5047 snd_soc_info_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x26b2aeb1 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27e92940 snd_soc_register_platform +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x45520dd6 snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4770d43a snd_soc_dapm_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a740f23 snd_soc_init_card +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4cf387c7 snd_soc_dapm_nc_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d4e1e76 snd_soc_unregister_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ed12a03 snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50f76e5e snd_soc_dapm_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x56fe9e3f snd_soc_dapm_info_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ebfa5c0 snd_soc_dai_digital_mute +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ecf4fd7 snd_soc_info_volsw_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5fa2b33a snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63c08e4b snd_soc_jack_report +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x668eb488 snd_soc_put_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x67ca1d58 snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x69e36d92 snd_soc_jack_new +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7131d878 snd_soc_dapm_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73438680 snd_soc_unregister_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x76833ac4 snd_soc_get_value_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x79e4b1f1 snd_soc_dapm_stream_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7a2a737e snd_soc_cnew +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7c68764c snd_soc_register_dais +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x81db51d6 snd_soc_dapm_new_widgets +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x82e39917 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e318708 snd_soc_dai_set_sysclk +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8f5becd2 snd_soc_add_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x943e4d43 snd_soc_dai_set_tdm_slot +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x94bb24c1 snd_soc_put_volsw_s8 +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x954c13b0 snd_soc_dai_set_fmt +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x98af58f0 snd_soc_dapm_sync +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d15d388 snd_soc_dai_set_pll +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9e3f18f3 snd_soc_update_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9f380314 snd_soc_get_volsw_2r +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa475d5f2 snd_soc_set_runtime_hwparams +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa61e6b05 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xac76dd15 snd_soc_test_bits +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xac93c748 snd_soc_dapm_get_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4964715 snd_soc_dapm_disable_pin +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb7b8fdb5 snd_soc_dapm_get_pin_status +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb7fa69d3 snd_soc_dapm_new_controls +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbadd7c44 dapm_reg_event +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc15975d0 snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc2481e85 snd_soc_info_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc6339b36 snd_soc_dapm_free +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcf3df0f1 snd_soc_unregister_codec +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd15f3b9a snd_soc_put_volsw +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2e5459c snd_soc_register_dai +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd40e1e4d snd_soc_dapm_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd5370b96 snd_soc_dapm_add_routes +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe038e3a1 snd_soc_dapm_new_control +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe277c49b snd_soc_get_enum_double +EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf764be55 snd_soc_free_pcms +EXPORT_SYMBOL_GPL vmlinux 0x00034e01 blk_insert_cloned_request +EXPORT_SYMBOL_GPL vmlinux 0x000f6f33 __pci_reset_function +EXPORT_SYMBOL_GPL vmlinux 0x00566d8f inotify_get_cookie +EXPORT_SYMBOL_GPL vmlinux 0x00a5cbe1 iommu_iova_to_phys +EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8 __iowrite32_copy +EXPORT_SYMBOL_GPL vmlinux 0x00d99b15 sysfs_update_group +EXPORT_SYMBOL_GPL vmlinux 0x00dc52b6 device_release_driver +EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1 register_hotplug_dock_device +EXPORT_SYMBOL_GPL vmlinux 0x016b9869 xfrm_calg_get_byname +EXPORT_SYMBOL_GPL vmlinux 0x0192d279 platform_device_register +EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d unregister_die_notifier +EXPORT_SYMBOL_GPL vmlinux 0x02177af2 attribute_container_register +EXPORT_SYMBOL_GPL vmlinux 0x02308c37 crypto_hash_walk_first +EXPORT_SYMBOL_GPL vmlinux 0x023938e1 elv_unregister +EXPORT_SYMBOL_GPL vmlinux 0x023eda01 netlink_has_listeners +EXPORT_SYMBOL_GPL vmlinux 0x024dab49 blk_queue_rq_timeout +EXPORT_SYMBOL_GPL vmlinux 0x029f4d87 inet_csk_listen_stop +EXPORT_SYMBOL_GPL vmlinux 0x02ab0c25 device_create +EXPORT_SYMBOL_GPL vmlinux 0x02c0d7e7 tcp_cong_avoid_ai +EXPORT_SYMBOL_GPL vmlinux 0x02ccea56 lock_policy_rwsem_write +EXPORT_SYMBOL_GPL vmlinux 0x02ccf218 usb_unpoison_urb +EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1 __i2c_board_list +EXPORT_SYMBOL_GPL vmlinux 0x037dde86 pci_disable_pcie_error_reporting +EXPORT_SYMBOL_GPL vmlinux 0x03910a68 lookup_instantiate_filp +EXPORT_SYMBOL_GPL vmlinux 0x04486e88 rcu_batches_completed +EXPORT_SYMBOL_GPL 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crypto_alloc_pcomp +EXPORT_SYMBOL_GPL vmlinux 0x0afde8a8 add_to_page_cache_lru +EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2 unshare_fs_struct +EXPORT_SYMBOL_GPL vmlinux 0x0b10f3e4 user_destroy +EXPORT_SYMBOL_GPL vmlinux 0x0b592dc2 skb_morph +EXPORT_SYMBOL_GPL vmlinux 0x0bc9aba2 blkcipher_walk_virt_block +EXPORT_SYMBOL_GPL vmlinux 0x0c3eb744 crypto_unregister_pcomp +EXPORT_SYMBOL_GPL vmlinux 0x0c425ce2 debugfs_create_u64 +EXPORT_SYMBOL_GPL vmlinux 0x0d3b2868 tcp_is_cwnd_limited +EXPORT_SYMBOL_GPL vmlinux 0x0d90ecdf debugfs_remove_recursive +EXPORT_SYMBOL_GPL vmlinux 0x0e37f1bc rtc_read_time +EXPORT_SYMBOL_GPL vmlinux 0x0fe355af platform_get_resource_byname +EXPORT_SYMBOL_GPL vmlinux 0x0feb0914 attribute_container_classdev_to_container +EXPORT_SYMBOL_GPL vmlinux 0x100c48a2 unregister_dock_notifier +EXPORT_SYMBOL_GPL vmlinux 0x1086fceb class_remove_file +EXPORT_SYMBOL_GPL vmlinux 0x1131f3ea regulator_list_voltage +EXPORT_SYMBOL_GPL vmlinux 0x116be79d device_register +EXPORT_SYMBOL_GPL vmlinux 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0x2b04b11d swiotlb_map_page +EXPORT_SYMBOL_GPL vmlinux 0x2b5563ff disk_part_iter_init +EXPORT_SYMBOL_GPL vmlinux 0x2b5c303b smp_send_reschedule +EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23 nf_net_ipv4_netfilter_sysctl_path +EXPORT_SYMBOL_GPL vmlinux 0x2bb9e352 crypto_register_alg +EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3 flush_work +EXPORT_SYMBOL_GPL vmlinux 0x2bce1739 usb_scuttle_anchored_urbs +EXPORT_SYMBOL_GPL vmlinux 0x2c208607 power_supply_is_system_supplied +EXPORT_SYMBOL_GPL vmlinux 0x2c4679e3 class_create_file +EXPORT_SYMBOL_GPL vmlinux 0x2c7e34be tcp_orphan_count +EXPORT_SYMBOL_GPL vmlinux 0x2c95a661 fixed_phy_set_link_update +EXPORT_SYMBOL_GPL vmlinux 0x2ce98559 kcrypto_wq +EXPORT_SYMBOL_GPL vmlinux 0x2d444d71 usb_deregister +EXPORT_SYMBOL_GPL vmlinux 0x2d667fc6 spi_new_device +EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3 sched_clock_idle_wakeup_event +EXPORT_SYMBOL_GPL vmlinux 0x2df58987 usb_sg_init +EXPORT_SYMBOL_GPL vmlinux 0x2e10bd87 transport_remove_device +EXPORT_SYMBOL_GPL vmlinux 0x2e12d71e crypto_unregister_template +EXPORT_SYMBOL_GPL vmlinux 0x2e28fe16 crypto_attr_alg +EXPORT_SYMBOL_GPL vmlinux 0x2e47f677 xfrm_aalg_get_byidx +EXPORT_SYMBOL_GPL vmlinux 0x2e485316 da903x_update +EXPORT_SYMBOL_GPL vmlinux 0x2e57b4a8 regulator_bulk_free +EXPORT_SYMBOL_GPL vmlinux 0x2e7a13b3 vfs_lock_file +EXPORT_SYMBOL_GPL vmlinux 0x2e9dfee5 device_attach +EXPORT_SYMBOL_GPL vmlinux 0x2ec92012 scatterwalk_copychunks +EXPORT_SYMBOL_GPL vmlinux 0x2ecd755e platform_device_add +EXPORT_SYMBOL_GPL vmlinux 0x2eed2630 iommu_domain_alloc +EXPORT_SYMBOL_GPL vmlinux 0x2f162b02 usb_hc_died +EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7 cpufreq_frequency_get_table +EXPORT_SYMBOL_GPL vmlinux 0x2f7bd506 __set_irq_handler +EXPORT_SYMBOL_GPL vmlinux 0x2f7d2053 devres_get +EXPORT_SYMBOL_GPL vmlinux 0x2fb6da47 alloc_vm_area +EXPORT_SYMBOL_GPL vmlinux 0x2ffb008c cpufreq_frequency_table_verify +EXPORT_SYMBOL_GPL vmlinux 0x3007349d fsnotify +EXPORT_SYMBOL_GPL vmlinux 0x3057b6b7 find_get_pid +EXPORT_SYMBOL_GPL vmlinux 0x306bd495 led_trigger_unregister_simple +EXPORT_SYMBOL_GPL vmlinux 0x307538b6 eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0x3077e087 kern_mount_data +EXPORT_SYMBOL_GPL vmlinux 0x30f2a7b7 ip_route_output_flow +EXPORT_SYMBOL_GPL vmlinux 0x31265f00 usb_sg_cancel +EXPORT_SYMBOL_GPL vmlinux 0x31840cc1 uhci_check_and_reset_hc +EXPORT_SYMBOL_GPL vmlinux 0x318920b1 register_dock_notifier +EXPORT_SYMBOL_GPL vmlinux 0x31b91eec seq_open_net +EXPORT_SYMBOL_GPL vmlinux 0x32557287 kobject_uevent +EXPORT_SYMBOL_GPL vmlinux 0x32c59c8c da903x_writes +EXPORT_SYMBOL_GPL vmlinux 0x32d1b7e5 pcie_port_bus_type +EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc xfrm_aalg_get_byid +EXPORT_SYMBOL_GPL vmlinux 0x3392a6fb pci_set_pcie_reset_state +EXPORT_SYMBOL_GPL vmlinux 0x33a1fb1b sysfs_create_group +EXPORT_SYMBOL_GPL vmlinux 0x33afd919 spi_bus_type +EXPORT_SYMBOL_GPL vmlinux 0x341227dd __ip_route_output_key +EXPORT_SYMBOL_GPL vmlinux 0x3433698a mm_kobj +EXPORT_SYMBOL_GPL vmlinux 0x345af2c7 sysdev_show_ulong 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regulator_get_current_limit +EXPORT_SYMBOL_GPL vmlinux 0x36e4ab00 class_dev_iter_exit +EXPORT_SYMBOL_GPL vmlinux 0x37993dea driver_remove_file +EXPORT_SYMBOL_GPL vmlinux 0x382e8408 skb_gro_receive +EXPORT_SYMBOL_GPL vmlinux 0x388a89dc vfs_removexattr +EXPORT_SYMBOL_GPL vmlinux 0x3894cbcd blocking_notifier_chain_cond_register +EXPORT_SYMBOL_GPL vmlinux 0x38bee303 crypto_shoot_alg +EXPORT_SYMBOL_GPL vmlinux 0x38d0efbf pskb_put +EXPORT_SYMBOL_GPL vmlinux 0x38ef8f71 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0x39438dc8 crypto_register_instance +EXPORT_SYMBOL_GPL vmlinux 0x397f2995 tty_ldisc_ref_wait +EXPORT_SYMBOL_GPL vmlinux 0x39d411cf hrtimer_forward +EXPORT_SYMBOL_GPL vmlinux 0x3a4907ea sysfs_notify_dirent +EXPORT_SYMBOL_GPL vmlinux 0x3ad91a94 sysfs_create_link +EXPORT_SYMBOL_GPL vmlinux 0x3b32e319 unregister_kprobes +EXPORT_SYMBOL_GPL vmlinux 0x3b5ad6a9 sched_setscheduler +EXPORT_SYMBOL_GPL vmlinux 0x3be7af02 get_max_files +EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c 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0x4117445e unregister_pernet_gen_device +EXPORT_SYMBOL_GPL vmlinux 0x411a8b00 platform_device_add_data +EXPORT_SYMBOL_GPL vmlinux 0x4149b183 platform_get_irq +EXPORT_SYMBOL_GPL vmlinux 0x415f12a2 eventfd_signal +EXPORT_SYMBOL_GPL vmlinux 0x41e0bd3d sysfs_remove_group +EXPORT_SYMBOL_GPL vmlinux 0x4233b5d5 hrtimer_start_range_ns +EXPORT_SYMBOL_GPL vmlinux 0x4238b489 hrtimer_try_to_cancel +EXPORT_SYMBOL_GPL vmlinux 0x424acc6d scatterwalk_done +EXPORT_SYMBOL_GPL vmlinux 0x427e50a8 generic_sync_sb_inodes +EXPORT_SYMBOL_GPL vmlinux 0x429d2aed usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL vmlinux 0x42b8f549 rtc_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0x42c15cd9 usb_unlink_urb +EXPORT_SYMBOL_GPL vmlinux 0x42eb2449 led_trigger_event +EXPORT_SYMBOL_GPL vmlinux 0x42f70b18 regulator_bulk_get +EXPORT_SYMBOL_GPL vmlinux 0x43785f24 part_round_stats +EXPORT_SYMBOL_GPL vmlinux 0x439fce4a queue_work +EXPORT_SYMBOL_GPL vmlinux 0x43cfda70 device_rename +EXPORT_SYMBOL_GPL vmlinux 0x43d2ddfd usb_ep0_reinit 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vmlinux 0x46edc549 blk_abort_request +EXPORT_SYMBOL_GPL vmlinux 0x4714c5d7 skb_pull_rcsum +EXPORT_SYMBOL_GPL vmlinux 0x4726780d aead_geniv_alloc +EXPORT_SYMBOL_GPL vmlinux 0x472e9687 inotify_rm_watch +EXPORT_SYMBOL_GPL vmlinux 0x4733ea10 da903x_reads +EXPORT_SYMBOL_GPL vmlinux 0x47ee6fbf pci_find_ext_capability +EXPORT_SYMBOL_GPL vmlinux 0x48267a8f raw_seq_open +EXPORT_SYMBOL_GPL vmlinux 0x48408361 unregister_net_sysctl_table +EXPORT_SYMBOL_GPL vmlinux 0x4903ee2a driver_attach +EXPORT_SYMBOL_GPL vmlinux 0x490e17aa blk_queue_dma_drain +EXPORT_SYMBOL_GPL vmlinux 0x49341b47 lookup_create +EXPORT_SYMBOL_GPL vmlinux 0x495de2bc __i2c_board_lock +EXPORT_SYMBOL_GPL vmlinux 0x499043d3 crypto_init_queue +EXPORT_SYMBOL_GPL vmlinux 0x49b1f8fc rtc_class_open +EXPORT_SYMBOL_GPL vmlinux 0x49c4444d unregister_kretprobe +EXPORT_SYMBOL_GPL vmlinux 0x4a0e872c transport_add_device +EXPORT_SYMBOL_GPL vmlinux 0x4a5ca7b0 pci_find_next_capability +EXPORT_SYMBOL_GPL vmlinux 0x4aa4c4f4 usb_put_dev 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regulator_bulk_enable +EXPORT_SYMBOL_GPL vmlinux 0xc1f035e4 blk_execute_rq_nowait +EXPORT_SYMBOL_GPL vmlinux 0xc22a3091 vm_unmap_aliases +EXPORT_SYMBOL_GPL vmlinux 0xc2428580 pci_find_next_ht_capability +EXPORT_SYMBOL_GPL vmlinux 0xc2f11903 register_kretprobes +EXPORT_SYMBOL_GPL vmlinux 0xc34efe27 snmp_fold_field +EXPORT_SYMBOL_GPL vmlinux 0xc3588465 cpufreq_register_driver +EXPORT_SYMBOL_GPL vmlinux 0xc376f94b xfrm_audit_policy_add +EXPORT_SYMBOL_GPL vmlinux 0xc37d5d0e locks_release_private +EXPORT_SYMBOL_GPL vmlinux 0xc3810ccf usb_buffer_unmap_sg +EXPORT_SYMBOL_GPL vmlinux 0xc3eece4f account_system_vtime +EXPORT_SYMBOL_GPL vmlinux 0xc3f4835e fib_rules_lookup +EXPORT_SYMBOL_GPL vmlinux 0xc47f0056 kobject_uevent_env +EXPORT_SYMBOL_GPL vmlinux 0xc52389e2 usb_autopm_get_interface_async +EXPORT_SYMBOL_GPL vmlinux 0xc554fabc do_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xc5d3d7dc __mmdrop +EXPORT_SYMBOL_GPL vmlinux 0xc6f92052 pcap_to_irq +EXPORT_SYMBOL_GPL vmlinux 0xc7447d6a power_supply_class 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async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda3a096c register_kprobe +EXPORT_SYMBOL_GPL vmlinux 0xda5cf722 pci_block_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xda87c2d2 dev_set_name +EXPORT_SYMBOL_GPL vmlinux 0xdae1b27b nf_unregister_afinfo +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdbed91de input_ff_destroy +EXPORT_SYMBOL_GPL vmlinux 0xdc24c5d1 nf_register_afinfo +EXPORT_SYMBOL_GPL vmlinux 0xdc7957c7 pci_bus_max_busnr +EXPORT_SYMBOL_GPL vmlinux 0xdcb6a509 transport_setup_device +EXPORT_SYMBOL_GPL vmlinux 0xde1eeed5 blocking_notifier_chain_unregister +EXPORT_SYMBOL_GPL vmlinux 0xde2857fc bdi_writeout_inc +EXPORT_SYMBOL_GPL vmlinux 0xde417b81 async_schedule_domain +EXPORT_SYMBOL_GPL vmlinux 0xdebea9ba usb_reset_endpoint +EXPORT_SYMBOL_GPL vmlinux 0xdf010736 __crypto_alloc_tfm +EXPORT_SYMBOL_GPL vmlinux 0xdf129d9c rtnl_register +EXPORT_SYMBOL_GPL vmlinux 0xdfd5350e __sock_recv_timestamp +EXPORT_SYMBOL_GPL vmlinux 0xdfeea936 i2c_new_dummy +EXPORT_SYMBOL_GPL vmlinux 0xe070f76d led_trigger_set +EXPORT_SYMBOL_GPL vmlinux 0xe0bab988 inotify_rm_wd +EXPORT_SYMBOL_GPL vmlinux 0xe0ca60fd rt_mutex_lock +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe0d2f5e5 sysdev_class_create_file +EXPORT_SYMBOL_GPL vmlinux 0xe0d40911 sync_filesystem +EXPORT_SYMBOL_GPL vmlinux 0xe10f6322 sysdev_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xe13592cc skb_to_sgvec +EXPORT_SYMBOL_GPL vmlinux 0xe166ee92 crypto_shash_import +EXPORT_SYMBOL_GPL vmlinux 0xe18896b3 register_jprobes +EXPORT_SYMBOL_GPL vmlinux 0xe20f456e srcu_read_lock +EXPORT_SYMBOL_GPL vmlinux 0xe253e588 pci_ioremap_bar +EXPORT_SYMBOL_GPL vmlinux 0xe290e699 transport_configure_device +EXPORT_SYMBOL_GPL vmlinux 0xe2a9f057 usb_kill_urb +EXPORT_SYMBOL_GPL vmlinux 0xe3e1f28b unregister_timer_hook +EXPORT_SYMBOL_GPL vmlinux 0xe46b9b65 skb_partial_csum_set +EXPORT_SYMBOL_GPL vmlinux 0xe4f8230d inet_csk_compat_setsockopt +EXPORT_SYMBOL_GPL vmlinux 0xe520c26e pci_enable_pcie_error_reporting +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe59fb893 anon_transport_class_register +EXPORT_SYMBOL_GPL vmlinux 0xe6105d46 sysdev_class_register +EXPORT_SYMBOL_GPL vmlinux 0xe624b6f4 regulator_count_voltages +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe6a35e81 tty_init_termios +EXPORT_SYMBOL_GPL vmlinux 0xe6ee6bf1 aead_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xe753cee0 inet_hash +EXPORT_SYMBOL_GPL vmlinux 0xe791cedb hrtimer_start +EXPORT_SYMBOL_GPL vmlinux 0xe7980dcd ezx_pcap_write +EXPORT_SYMBOL_GPL vmlinux 0xe7b03c01 xfrm_output_resume +EXPORT_SYMBOL_GPL vmlinux 0xe7db9975 register_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0xe80f52a2 crypto_rng_type +EXPORT_SYMBOL_GPL vmlinux 0xe84c5c24 usb_hcd_resume_root_hub +EXPORT_SYMBOL_GPL vmlinux 0xe8dc29cc driver_register +EXPORT_SYMBOL_GPL vmlinux 0xe90b60ff bus_for_each_drv +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9457fb3 usb_sg_wait +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xe982ccc0 init_dummy_netdev +EXPORT_SYMBOL_GPL vmlinux 0xe99aee2b platform_bus +EXPORT_SYMBOL_GPL vmlinux 0xe9c976a1 regulator_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xe9f1874a mmput +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea0d3ac6 sock_prot_inuse_get +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea4c302f cpufreq_freq_attr_scaling_available_freqs +EXPORT_SYMBOL_GPL vmlinux 0xea4f0c11 pci_renumber_slot +EXPORT_SYMBOL_GPL vmlinux 0xea639d22 usb_submit_urb +EXPORT_SYMBOL_GPL vmlinux 0xeaae6806 pcibios_fixup_device_resources +EXPORT_SYMBOL_GPL vmlinux 0xeb7b4872 blk_abort_queue +EXPORT_SYMBOL_GPL vmlinux 0xebd13f8d crypto_mod_get +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec274094 class_interface_unregister +EXPORT_SYMBOL_GPL vmlinux 0xec6ff716 usb_buffer_map_sg +EXPORT_SYMBOL_GPL vmlinux 0xec85cdfa pci_unblock_user_cfg_access +EXPORT_SYMBOL_GPL vmlinux 0xed0d645b pci_stop_bus_device +EXPORT_SYMBOL_GPL vmlinux 0xed260cb8 simple_attr_read +EXPORT_SYMBOL_GPL vmlinux 0xed272766 crypto_default_rng +EXPORT_SYMBOL_GPL vmlinux 0xed35619f debugfs_create_blob +EXPORT_SYMBOL_GPL vmlinux 0xed6d441d kallsyms_on_each_symbol +EXPORT_SYMBOL_GPL vmlinux 0xed930eae regulator_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xee054b48 debugfs_create_x16 +EXPORT_SYMBOL_GPL vmlinux 0xee059282 fuse_abort_conn +EXPORT_SYMBOL_GPL vmlinux 0xee4b8170 ia64_ptr_entry +EXPORT_SYMBOL_GPL vmlinux 0xee5443c1 usb_remove_hcd +EXPORT_SYMBOL_GPL vmlinux 0xee805af6 tty_prepare_flip_string_flags +EXPORT_SYMBOL_GPL vmlinux 0xee835f10 usb_hub_clear_tt_buffer +EXPORT_SYMBOL_GPL vmlinux 0xee8cd941 regulator_set_mode +EXPORT_SYMBOL_GPL vmlinux 0xef3ff20d usb_clear_halt +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xefc2b308 da903x_clr_bits +EXPORT_SYMBOL_GPL vmlinux 0xefd9ef06 regulator_get_init_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xf01a1d08 bus_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xf033d303 transport_class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf06c12ec skcipher_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xf0929974 usb_buffer_alloc +EXPORT_SYMBOL_GPL vmlinux 0xf0b3305e remove_irq +EXPORT_SYMBOL_GPL vmlinux 0xf0ea2416 ehci_cf_port_reset_rwsem +EXPORT_SYMBOL_GPL vmlinux 0xf11ecdfb pci_cleanup_aer_uncorrect_error_status +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf1b61f86 flush_workqueue +EXPORT_SYMBOL_GPL vmlinux 0xf201d615 shmem_file_setup +EXPORT_SYMBOL_GPL vmlinux 0xf2765ae6 tty_mode_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xf32fc9bd fb_bl_default_curve +EXPORT_SYMBOL_GPL vmlinux 0xf3367f30 usb_put_hcd +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf3c64936 skcipher_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xf415e2fb cpufreq_cpu_get +EXPORT_SYMBOL_GPL vmlinux 0xf4592966 fuse_file_poll +EXPORT_SYMBOL_GPL vmlinux 0xf48f5750 debugfs_create_size_t +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f iommu_domain_free +EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a stop_machine_destroy +EXPORT_SYMBOL_GPL vmlinux 0xf589b391 inet_twdr_twkill_work +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf636dd7b spi_alloc_device +EXPORT_SYMBOL_GPL vmlinux 0xf6965009 pci_intx +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6dc610f destroy_workqueue +EXPORT_SYMBOL_GPL vmlinux 0xf6ffc6c4 fsstack_copy_attr_all +EXPORT_SYMBOL_GPL vmlinux 0xf7948442 kobject_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0xf824e9ff relay_close +EXPORT_SYMBOL_GPL vmlinux 0xf8bd18d1 rtc_alarm_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0xf9098775 sysdev_show_int +EXPORT_SYMBOL_GPL vmlinux 0xf9765833 dmi_match +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9a9fa3e __blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xfa04b3aa vfs_kern_mount +EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662 scatterwalk_start +EXPORT_SYMBOL_GPL vmlinux 0xfa5b968d crypto_create_tfm +EXPORT_SYMBOL_GPL vmlinux 0xfa63e0c3 proc_net_mkdir +EXPORT_SYMBOL_GPL vmlinux 0xfa679f5a invalidate_inode_pages2_range +EXPORT_SYMBOL_GPL vmlinux 0xfa735b78 mca_recover_range +EXPORT_SYMBOL_GPL vmlinux 0xfac6867e usb_lock_device_for_reset +EXPORT_SYMBOL_GPL vmlinux 0xfaf08ca3 tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0xfb6b0575 blk_rq_check_limits +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfc9ed1d3 usb_reset_configuration +EXPORT_SYMBOL_GPL vmlinux 0xfcdbd74c relay_flush +EXPORT_SYMBOL_GPL vmlinux 0xfd151084 devres_find +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfdff49c1 usb_hcd_pci_remove +EXPORT_SYMBOL_GPL vmlinux 0xfe5d84b5 sysfs_remove_bin_file +EXPORT_SYMBOL_GPL vmlinux 0xfebc067c crypto_unregister_shash +EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1 usb_mon_deregister +EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb input_ff_effect_from_user +EXPORT_SYMBOL_GPL vmlinux 0xff0c7682 crypto_alloc_tfm +EXPORT_SYMBOL_GPL vmlinux 0xff38cdf4 fuse_dev_operations +EXPORT_SYMBOL_GPL vmlinux 0xffc91c45 put_pid +EXPORT_UNUSED_SYMBOL vmlinux 0x00000000 simple_prepare_write --- linux-fsl-imx51-2.6.31.orig/virt/kvm/kvm_main.c +++ linux-fsl-imx51-2.6.31/virt/kvm/kvm_main.c @@ -2590,8 +2590,6 @@ int r; int cpu; - kvm_init_debug(); - r = kvm_arch_init(opaque); if (r) goto out_fail; @@ -2658,6 +2656,8 @@ kvm_preempt_ops.sched_in = kvm_sched_in; kvm_preempt_ops.sched_out = kvm_sched_out; + kvm_init_debug(); + return 0; out_free: @@ -2679,7 +2679,6 @@ __free_page(bad_page); out: kvm_arch_exit(); - kvm_exit_debug(); out_fail: return r; } @@ -2688,6 +2687,7 @@ void kvm_exit(void) { kvm_trace_cleanup(); + kvm_exit_debug(); misc_deregister(&kvm_dev); kmem_cache_destroy(kvm_vcpu_cache); sysdev_unregister(&kvm_sysdev); @@ -2697,7 +2697,6 @@ on_each_cpu(hardware_disable, NULL, 1); kvm_arch_hardware_unsetup(); kvm_arch_exit(); - kvm_exit_debug(); free_cpumask_var(cpus_hardware_enabled); __free_page(bad_page); } --- linux-fsl-imx51-2.6.31.orig/virt/kvm/ioapic.c +++ linux-fsl-imx51-2.6.31/virt/kvm/ioapic.c @@ -188,6 +188,8 @@ if ((edge && old_irr != ioapic->irr) || (!edge && !entry.fields.remote_irr)) ret = ioapic_service(ioapic, irq); + else + ret = 0; /* report coalesced interrupt */ } } return ret; --- linux-fsl-imx51-2.6.31.orig/arch/h8300/kernel/syscalls.S +++ linux-fsl-imx51-2.6.31/arch/h8300/kernel/syscalls.S @@ -206,7 +206,7 @@ .long SYMBOL_NAME(sys_ni_syscall) /* streams2 */ .long SYMBOL_NAME(sys_vfork) /* 190 */ .long SYMBOL_NAME(sys_getrlimit) - .long SYMBOL_NAME(sys_mmap2) + .long SYMBOL_NAME(sys_mmap_pgoff) .long SYMBOL_NAME(sys_truncate64) .long SYMBOL_NAME(sys_ftruncate64) .long SYMBOL_NAME(sys_stat64) /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/h8300/kernel/sys_h8300.c +++ linux-fsl-imx51-2.6.31/arch/h8300/kernel/sys_h8300.c @@ -27,39 +27,6 @@ #include #include -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2(addr, len, prot, flags, fd, pgoff); -} - /* * Perform the select(nd, in, out, ex, tv) and mmap() system * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to @@ -88,57 +55,11 @@ if (a.offset & ~PAGE_MASK) goto out; - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); -out: - return error; -} - -#if 0 /* DAVIDM - do we want this */ -struct mmap_arg_struct64 { - __u32 addr; - __u32 len; - __u32 prot; - __u32 flags; - __u64 offset; /* 64 bits */ - __u32 fd; -}; - -asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg) -{ - int error = -EFAULT; - struct file * file = NULL; - struct mmap_arg_struct64 a; - unsigned long pgoff; - - if (copy_from_user(&a, arg, sizeof(a))) - return -EFAULT; - - if ((long)a.offset & ~PAGE_MASK) - return -EINVAL; - - pgoff = a.offset >> PAGE_SHIFT; - if ((a.offset >> PAGE_SHIFT) != pgoff) - return -EINVAL; - - if (!(a.flags & MAP_ANONYMOUS)) { - error = -EBADF; - file = fget(a.fd); - if (!file) - goto out; - } - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, + a.offset >> PAGE_SHIFT); out: return error; } -#endif struct sel_arg_struct { unsigned long n; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/Kconfig +++ linux-fsl-imx51-2.6.31/arch/powerpc/Kconfig @@ -925,6 +925,8 @@ source "drivers/Kconfig" +source "ubuntu/Kconfig" + source "fs/Kconfig" source "arch/powerpc/sysdev/qe_lib/Kconfig" --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/Makefile +++ linux-fsl-imx51-2.6.31/arch/powerpc/Makefile @@ -158,8 +158,6 @@ # Default to zImage, override when needed all: zImage -CPPFLAGS_vmlinux.lds := -Upowerpc - BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.% PHONY += $(BOOT_TARGETS) --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/include/asm/mmu-hash64.h +++ linux-fsl-imx51-2.6.31/arch/powerpc/include/asm/mmu-hash64.h @@ -41,6 +41,7 @@ #define SLB_NUM_BOLTED 3 #define SLB_CACHE_ENTRIES 8 +#define SLB_MIN_SIZE 32 /* Bits in the SLB ESID word */ #define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */ @@ -296,6 +297,7 @@ extern void stab_initialize(unsigned long stab); extern void slb_vmalloc_update(void); +extern void slb_set_size(u16 size); #endif /* __ASSEMBLY__ */ /* --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/include/asm/elf.h +++ linux-fsl-imx51-2.6.31/arch/powerpc/include/asm/elf.h @@ -236,14 +236,10 @@ #ifdef __powerpc64__ # define SET_PERSONALITY(ex) \ do { \ - unsigned long new_flags = 0; \ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - new_flags = _TIF_32BIT; \ - if ((current_thread_info()->flags & _TIF_32BIT) \ - != new_flags) \ - set_thread_flag(TIF_ABI_PENDING); \ + set_thread_flag(TIF_32BIT); \ else \ - clear_thread_flag(TIF_ABI_PENDING); \ + clear_thread_flag(TIF_32BIT); \ if (personality(current->personality) != PER_LINUX32) \ set_personality(PER_LINUX | \ (current->personality & (~PER_MASK))); \ --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/include/asm/pmc.h +++ linux-fsl-imx51-2.6.31/arch/powerpc/include/asm/pmc.h @@ -27,10 +27,22 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq); void release_pmc_hardware(void); +void ppc_enable_pmcs(void); #ifdef CONFIG_PPC64 -void power4_enable_pmcs(void); -void pasemi_enable_pmcs(void); +#include + +static inline void ppc_set_pmu_inuse(int inuse) +{ + get_lppaca()->pmcregs_in_use = inuse; +} + +extern void power4_enable_pmcs(void); + +#else /* CONFIG_PPC64 */ + +static inline void ppc_set_pmu_inuse(int inuse) { } + #endif #endif /* __KERNEL__ */ --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/include/asm/thread_info.h +++ linux-fsl-imx51-2.6.31/arch/powerpc/include/asm/thread_info.h @@ -111,7 +111,6 @@ #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ #define TIF_FREEZE 14 /* Freezing for suspend */ #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ -#define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1<thread.regs; unsigned long usp = regs->gpr[1]; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/pseries/reconfig.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/pseries/reconfig.c @@ -20,6 +20,7 @@ #include #include #include +#include @@ -439,9 +440,15 @@ if (!newprop) return -ENOMEM; + if (!strcmp(name, "slb-size") || !strcmp(name, "ibm,slb-size")) + slb_set_size(*(int *)value); + oldprop = of_find_property(np, name,NULL); - if (!oldprop) + if (!oldprop) { + if (strlen(name)) + return prom_add_property(np, newprop); return -ENODEV; + } rc = prom_update_property(np, newprop, oldprop); if (rc) --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/pseries/setup.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/pseries/setup.c @@ -223,10 +223,6 @@ set = 1UL << 63; reset = 0; plpar_hcall_norets(H_PERFMON, set, reset); - - /* instruct hypervisor to maintain PMCs */ - if (firmware_has_feature(FW_FEATURE_SPLPAR)) - get_lppaca()->pmcregs_in_use = 1; } static void __init pseries_discover_pic(void) --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/pseries/xics.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/pseries/xics.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -219,6 +220,14 @@ static unsigned int xics_startup(unsigned int virq) { + /* + * The generic MSI code returns with the interrupt disabled on the + * card, using the MSI mask bits. Firmware doesn't appear to unmask + * at that level, so we do it here by hand. + */ + if (irq_to_desc(virq)->msi_desc) + unmask_msi_irq(virq); + /* unmask it */ xics_unmask_irq(virq); return 0; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/pseries/msi.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/pseries/msi.c @@ -432,8 +432,6 @@ /* Read config space back so we can restore after reset */ read_msi_msg(virq, &msg); entry->msg = msg; - - unmask_msi_irq(virq); } return 0; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/powermac/smp.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/powermac/smp.c @@ -408,7 +408,7 @@ /* reset the entry point so if we get another intr we won't * try to startup again */ out_be32(psurge_start, 0x100); - if (setup_irq(30, &psurge_irqaction)) + if (setup_irq(irq_create_mapping(NULL, 30), &psurge_irqaction)) printk(KERN_ERR "Couldn't get primary IPI interrupt"); } --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/powermac/cpufreq_32.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/powermac/cpufreq_32.c @@ -44,14 +44,6 @@ */ #undef DEBUG_FREQ -/* - * There is a problem with the core cpufreq code on SMP kernels, - * it won't recalculate the Bogomips properly - */ -#ifdef CONFIG_SMP -#warning "WARNING, CPUFREQ not recommended on SMP kernels" -#endif - extern void low_choose_7447a_dfs(int dfs); extern void low_choose_750fx_pll(int pll); extern void low_sleep_handler(void); --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/powermac/pci.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/powermac/pci.c @@ -1286,3 +1286,64 @@ } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata); +/* + * On U4 (aka CPC945) the PCIe root complex "P2P" bridge resource ranges aren't + * configured by the firmware. The bridge itself seems to ignore them but it + * causes problems with Linux which then re-assigns devices below the bridge, + * thus changing addresses of those devices from what was in the device-tree, + * which sucks when those are video cards using offb + * + * We could just mark it transparent but I prefer fixing up the resources to + * properly show what's going on here, as I have some doubts about having them + * badly configured potentially being an issue for DMA. + * + * We leave PIO alone, it seems to be fine + * + * Oh and there's another funny bug. The OF properties advertize the region + * 0xf1000000..0xf1ffffff as being forwarded as memory space. But that's + * actually not true, this region is the memory mapped config space. So we + * also need to filter it out or we'll map things in the wrong place. + */ +static void fixup_u4_pcie(struct pci_dev* dev) +{ + struct pci_controller *host = pci_bus_to_host(dev->bus); + struct resource *region = NULL; + u32 reg; + int i; + + /* Only do that on PowerMac */ + if (!machine_is(powermac)) + return; + + /* Find the largest MMIO region */ + for (i = 0; i < 3; i++) { + struct resource *r = &host->mem_resources[i]; + if (!(r->flags & IORESOURCE_MEM)) + continue; + /* Skip the 0xf0xxxxxx..f2xxxxxx regions, we know they + * are reserved by HW for other things + */ + if (r->start >= 0xf0000000 && r->start < 0xf3000000) + continue; + if (!region || (r->end - r->start) > + (region->end - region->start)) + region = r; + } + /* Nothing found, bail */ + if (region == 0) + return; + + /* Print things out */ + printk(KERN_INFO "PCI: Fixup U4 PCIe bridge range: %pR\n", region); + + /* Fixup bridge config space. We know it's a Mac, resource aren't + * offset so let's just blast them as-is. We also know that they + * fit in 32 bits + */ + reg = ((region->start >> 16) & 0xfff0) | (region->end & 0xfff00000); + pci_write_config_dword(dev, PCI_MEMORY_BASE, reg); + pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0); + pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0); + pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_U4_PCIE, fixup_u4_pcie); --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/platforms/powermac/low_i2c.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/platforms/powermac/low_i2c.c @@ -540,8 +540,11 @@ /* Make sure IRQ is disabled */ kw_write_reg(reg_ier, 0); - /* Request chip interrupt */ - if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host)) + /* Request chip interrupt. We set IRQF_TIMER because we don't + * want that interrupt disabled between the 2 passes of driver + * suspend or we'll have issues running the pfuncs + */ + if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host)) host->irq = NO_IRQ; printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/mm/slb.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/mm/slb.c @@ -240,14 +240,22 @@ static inline void patch_slb_encoding(unsigned int *insn_addr, unsigned int immed) { - /* Assume the instruction had a "0" immediate value, just - * "or" in the new value - */ - *insn_addr |= immed; + *insn_addr = (*insn_addr & 0xffff0000) | immed; flush_icache_range((unsigned long)insn_addr, 4+ (unsigned long)insn_addr); } +void slb_set_size(u16 size) +{ + extern unsigned int *slb_compare_rr_to_size; + + if (mmu_slb_size == size) + return; + + mmu_slb_size = size; + patch_slb_encoding(slb_compare_rr_to_size, mmu_slb_size); +} + void slb_initialize(void) { unsigned long linear_llp, vmalloc_llp, io_llp; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/mm/pgtable.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/mm/pgtable.c @@ -30,6 +30,8 @@ #include #include +#include "mmu_decl.h" + static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); static unsigned long pte_freelist_forced_free; @@ -119,7 +121,7 @@ /* * Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags() */ -static pte_t do_dcache_icache_coherency(pte_t pte) +static pte_t do_dcache_icache_coherency(pte_t pte, unsigned long addr) { unsigned long pfn = pte_pfn(pte); struct page *page; @@ -128,6 +130,17 @@ return pte; page = pfn_to_page(pfn); +#ifdef CONFIG_8xx + /* On 8xx, cache control instructions (particularly + * "dcbst" from flush_dcache_icache) fault as write + * operation if there is an unpopulated TLB entry + * for the address in question. To workaround that, + * we invalidate the TLB here, thus avoiding dcbst + * misbehaviour. + */ + _tlbil_va(addr, 0 /* 8xx doesn't care about PID */); +#endif + if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { pr_devel("do_dcache_icache_coherency... flushing\n"); flush_dcache_icache_page(page); @@ -198,7 +211,7 @@ */ pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); if (pte_need_exec_flush(pte, 1)) - pte = do_dcache_icache_coherency(pte); + pte = do_dcache_icache_coherency(pte, addr); /* Perform the setting of the PTE */ __set_pte_at(mm, addr, ptep, pte, 0); @@ -216,7 +229,7 @@ { int changed; if (!dirty && pte_need_exec_flush(entry, 0)) - entry = do_dcache_icache_coherency(entry); + entry = do_dcache_icache_coherency(entry, address); changed = !pte_same(*(ptep), entry); if (changed) { if (!(vma->vm_flags & VM_HUGETLB)) --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/sysfs.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/sysfs.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "cacheinfo.h" @@ -123,6 +124,8 @@ void ppc_enable_pmcs(void) { + ppc_set_pmu_inuse(1); + /* Only need to enable them once */ if (__get_cpu_var(pmcs_enabled)) return; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/vector.S +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/vector.S @@ -58,7 +58,7 @@ * all 1's */ mfspr r4,SPRN_VRSAVE - cmpdi 0,r4,0 + cmpwi 0,r4,0 bne+ 1f li r4,-1 mtspr SPRN_VRSAVE,r4 --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/perf_counter.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/perf_counter.c @@ -32,6 +32,9 @@ unsigned long mmcr[3]; struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS]; u8 limited_hwidx[MAX_LIMITED_HWCOUNTERS]; + u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; + unsigned long amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; + unsigned long avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; }; DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters); @@ -62,7 +65,6 @@ { return 0; } -static inline void perf_set_pmu_inuse(int inuse) { } static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { } static inline u32 perf_get_misc_flags(struct pt_regs *regs) { @@ -93,11 +95,6 @@ return 0; } -static inline void perf_set_pmu_inuse(int inuse) -{ - get_lppaca()->pmcregs_in_use = inuse; -} - /* * The user wants a data address recorded. * If we're not doing instruction sampling, give them the SDAR @@ -245,13 +242,11 @@ * and see if any combination of alternative codes is feasible. * The feasible set is returned in event[]. */ -static int power_check_constraints(u64 event[], unsigned int cflags[], +static int power_check_constraints(struct cpu_hw_counters *cpuhw, + u64 event[], unsigned int cflags[], int n_ev) { unsigned long mask, value, nv; - u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; - unsigned long amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; - unsigned long avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; unsigned long smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS]; int n_alt[MAX_HWCOUNTERS], choice[MAX_HWCOUNTERS]; int i, j; @@ -266,21 +261,23 @@ if ((cflags[i] & PPMU_LIMITED_PMC_REQD) && !ppmu->limited_pmc_event(event[i])) { ppmu->get_alternatives(event[i], cflags[i], - alternatives[i]); - event[i] = alternatives[i][0]; + cpuhw->alternatives[i]); + event[i] = cpuhw->alternatives[i][0]; } - if (ppmu->get_constraint(event[i], &amasks[i][0], - &avalues[i][0])) + if (ppmu->get_constraint(event[i], &cpuhw->amasks[i][0], + &cpuhw->avalues[i][0])) return -1; } value = mask = 0; for (i = 0; i < n_ev; ++i) { - nv = (value | avalues[i][0]) + (value & avalues[i][0] & addf); + nv = (value | cpuhw->avalues[i][0]) + + (value & cpuhw->avalues[i][0] & addf); if ((((nv + tadd) ^ value) & mask) != 0 || - (((nv + tadd) ^ avalues[i][0]) & amasks[i][0]) != 0) + (((nv + tadd) ^ cpuhw->avalues[i][0]) & + cpuhw->amasks[i][0]) != 0) break; value = nv; - mask |= amasks[i][0]; + mask |= cpuhw->amasks[i][0]; } if (i == n_ev) return 0; /* all OK */ @@ -291,10 +288,11 @@ for (i = 0; i < n_ev; ++i) { choice[i] = 0; n_alt[i] = ppmu->get_alternatives(event[i], cflags[i], - alternatives[i]); + cpuhw->alternatives[i]); for (j = 1; j < n_alt[i]; ++j) - ppmu->get_constraint(alternatives[i][j], - &amasks[i][j], &avalues[i][j]); + ppmu->get_constraint(cpuhw->alternatives[i][j], + &cpuhw->amasks[i][j], + &cpuhw->avalues[i][j]); } /* enumerate all possibilities and see if any will work */ @@ -313,11 +311,11 @@ * where k > j, will satisfy the constraints. */ while (++j < n_alt[i]) { - nv = (value | avalues[i][j]) + - (value & avalues[i][j] & addf); + nv = (value | cpuhw->avalues[i][j]) + + (value & cpuhw->avalues[i][j] & addf); if ((((nv + tadd) ^ value) & mask) == 0 && - (((nv + tadd) ^ avalues[i][j]) - & amasks[i][j]) == 0) + (((nv + tadd) ^ cpuhw->avalues[i][j]) + & cpuhw->amasks[i][j]) == 0) break; } if (j >= n_alt[i]) { @@ -339,7 +337,7 @@ svalues[i] = value; smasks[i] = mask; value = nv; - mask |= amasks[i][j]; + mask |= cpuhw->amasks[i][j]; ++i; j = -1; } @@ -347,7 +345,7 @@ /* OK, we have a feasible combination, tell the caller the solution */ for (i = 0; i < n_ev; ++i) - event[i] = alternatives[i][choice[i]]; + event[i] = cpuhw->alternatives[i][choice[i]]; return 0; } @@ -531,8 +529,7 @@ * Check if we ever enabled the PMU on this cpu. */ if (!cpuhw->pmcs_enabled) { - if (ppc_md.enable_pmcs) - ppc_md.enable_pmcs(); + ppc_enable_pmcs(); cpuhw->pmcs_enabled = 1; } @@ -594,7 +591,7 @@ mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); if (cpuhw->n_counters == 0) - perf_set_pmu_inuse(0); + ppc_set_pmu_inuse(0); goto out_enable; } @@ -627,7 +624,7 @@ * bit set and set the hardware counters to their initial values. * Then unfreeze the counters. */ - perf_set_pmu_inuse(1); + ppc_set_pmu_inuse(1); mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) @@ -752,7 +749,7 @@ return -EAGAIN; if (check_excludes(cpuhw->counter, cpuhw->flags, n0, n)) return -EAGAIN; - i = power_check_constraints(cpuhw->events, cpuhw->flags, n + n0); + i = power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n + n0); if (i < 0) return -EAGAIN; cpuhw->n_counters = n0 + n; @@ -807,7 +804,7 @@ cpuhw->flags[n0] = counter->hw.counter_base; if (check_excludes(cpuhw->counter, cpuhw->flags, n0, 1)) goto out; - if (power_check_constraints(cpuhw->events, cpuhw->flags, n0 + 1)) + if (power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n0 + 1)) goto out; counter->hw.config = cpuhw->events[n0]; @@ -1012,6 +1009,7 @@ unsigned int cflags[MAX_HWCOUNTERS]; int n; int err; + struct cpu_hw_counters *cpuhw; if (!ppmu) return ERR_PTR(-ENXIO); @@ -1090,7 +1088,11 @@ cflags[n] = flags; if (check_excludes(ctrs, cflags, n, 1)) return ERR_PTR(-EINVAL); - if (power_check_constraints(events, cflags, n + 1)) + + cpuhw = &get_cpu_var(cpu_hw_counters); + err = power_check_constraints(cpuhw, events, cflags, n + 1); + put_cpu_var(cpu_hw_counters); + if (err) return ERR_PTR(-EINVAL); counter->hw.config = events[n]; --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/lparcfg.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/lparcfg.c @@ -35,6 +35,7 @@ #include #include #include +#include #define MODULE_VERS "1.8" #define MODULE_NAME "lparcfg" @@ -537,6 +538,8 @@ seq_printf(m, "shared_processor_mode=%d\n", lppaca[0].shared_proc); + seq_printf(m, "slb_size=%d\n", mmu_slb_size); + return 0; } --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/pci-common.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/pci-common.c @@ -1115,6 +1115,12 @@ list_for_each_entry(dev, &bus->devices, bus_list) { struct dev_archdata *sd = &dev->dev.archdata; + /* Cardbus can call us to add new devices to a bus, so ignore + * those who are already fully discovered + */ + if (dev->is_added) + continue; + /* Setup OF node pointer in archdata */ sd->of_node = pci_device_to_OF_node(dev); @@ -1155,6 +1161,13 @@ } EXPORT_SYMBOL(pcibios_fixup_bus); +void __devinit pci_fixup_cardbus(struct pci_bus *bus) +{ + /* Now fixup devices on that bus */ + pcibios_setup_bus_devices(bus); +} + + static int skip_isa_ioresource_align(struct pci_dev *dev) { if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) && --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/rtas.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/rtas.c @@ -39,6 +39,7 @@ #include #include #include +#include struct rtas_t rtas = { .lock = __RAW_SPIN_LOCK_UNLOCKED @@ -713,6 +714,7 @@ { long rc = H_SUCCESS; unsigned long msr_save; + u16 slb_size = mmu_slb_size; int cpu; struct rtas_suspend_me_data *data = (struct rtas_suspend_me_data *)info; @@ -735,13 +737,16 @@ /* All other cpus are in H_JOIN, this cpu does * the suspend. */ + slb_set_size(SLB_MIN_SIZE); printk(KERN_DEBUG "calling ibm,suspend-me on cpu %i\n", smp_processor_id()); data->error = rtas_call(data->token, 0, 1, NULL); - if (data->error) + if (data->error) { printk(KERN_DEBUG "ibm,suspend-me returned %d\n", data->error); + slb_set_size(slb_size); + } } else { printk(KERN_ERR "H_JOIN on cpu %i failed with rc = %ld\n", smp_processor_id(), rc); --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/process.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/process.c @@ -554,18 +554,6 @@ void flush_thread(void) { -#ifdef CONFIG_PPC64 - struct thread_info *t = current_thread_info(); - - if (test_ti_thread_flag(t, TIF_ABI_PENDING)) { - clear_ti_thread_flag(t, TIF_ABI_PENDING); - if (test_ti_thread_flag(t, TIF_32BIT)) - clear_ti_thread_flag(t, TIF_32BIT); - else - set_ti_thread_flag(t, TIF_32BIT); - } -#endif - discard_lazy_cpu_state(); if (current->thread.dabr) { --- linux-fsl-imx51-2.6.31.orig/arch/powerpc/kernel/syscalls.c +++ linux-fsl-imx51-2.6.31/arch/powerpc/kernel/syscalls.c @@ -140,7 +140,6 @@ unsigned long prot, unsigned long flags, unsigned long fd, unsigned long off, int shift) { - struct file * file = NULL; unsigned long ret = -EINVAL; if (!arch_validate_prot(prot)) @@ -151,20 +150,8 @@ goto out; off >>= shift; } - - ret = -EBADF; - if (!(flags & MAP_ANONYMOUS)) { - if (!(file = fget(fd))) - goto out; - } - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - down_write(¤t->mm->mmap_sem); - ret = do_mmap_pgoff(file, addr, len, prot, flags, off); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); + ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off); out: return ret; } --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/pci_iommu.c +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/pci_iommu.c @@ -880,7 +880,7 @@ int iommu_bind(struct pci_iommu_arena *arena, long pg_start, long pg_count, - unsigned long *physaddrs) + struct page **pages) { unsigned long flags; unsigned long *ptes; @@ -900,7 +900,7 @@ } for(i = 0, j = pg_start; i < pg_count; i++, j++) - ptes[j] = mk_iommu_pte(physaddrs[i]); + ptes[j] = mk_iommu_pte(page_to_phys(pages[i])); spin_unlock_irqrestore(&arena->lock, flags); --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/vmlinux.lds.S +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/vmlinux.lds.S @@ -1,4 +1,5 @@ #include +#include #include OUTPUT_FORMAT("elf64-alpha") --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/pci_impl.h +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/pci_impl.h @@ -198,7 +198,7 @@ extern int iommu_reserve(struct pci_iommu_arena *, long, long); extern int iommu_release(struct pci_iommu_arena *, long, long); -extern int iommu_bind(struct pci_iommu_arena *, long, long, unsigned long *); +extern int iommu_bind(struct pci_iommu_arena *, long, long, struct page **); extern int iommu_unbind(struct pci_iommu_arena *, long, long); --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/osf_sys.c +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/osf_sys.c @@ -178,25 +178,18 @@ unsigned long, prot, unsigned long, flags, unsigned long, fd, unsigned long, off) { - struct file *file = NULL; - unsigned long ret = -EBADF; + unsigned long ret = -EINVAL; #if 0 if (flags & (_MAP_HASSEMAPHORE | _MAP_INHERIT | _MAP_UNALIGNED)) printk("%s: unimplemented OSF mmap flags %04lx\n", current->comm, flags); #endif - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - down_write(¤t->mm->mmap_sem); - ret = do_mmap(file, addr, len, prot, flags, off); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); + if ((off + PAGE_ALIGN(len)) < off) + goto out; + if (off & ~PAGE_MASK) + goto out; + ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); out: return ret; } --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/core_marvel.c +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/core_marvel.c @@ -1016,7 +1016,7 @@ { struct marvel_agp_aperture *aper = agp->aperture.sysdata; return iommu_bind(aper->arena, aper->pg_start + pg_start, - mem->page_count, mem->memory); + mem->page_count, mem->pages); } static int --- linux-fsl-imx51-2.6.31.orig/arch/alpha/kernel/core_titan.c +++ linux-fsl-imx51-2.6.31/arch/alpha/kernel/core_titan.c @@ -680,7 +680,7 @@ { struct titan_agp_aperture *aper = agp->aperture.sysdata; return iommu_bind(aper->arena, aper->pg_start + pg_start, - mem->page_count, mem->memory); + mem->page_count, mem->pages); } static int --- linux-fsl-imx51-2.6.31.orig/arch/parisc/include/asm/compat.h +++ linux-fsl-imx51-2.6.31/arch/parisc/include/asm/compat.h @@ -146,7 +146,7 @@ return (u32)(unsigned long)uptr; } -static __inline__ void __user *compat_alloc_user_space(long len) +static __inline__ void __user *arch_compat_alloc_user_space(long len) { struct pt_regs *regs = ¤t->thread.regs; return (void __user *)regs->gr[30]; --- linux-fsl-imx51-2.6.31.orig/arch/parisc/kernel/sys_parisc.c +++ linux-fsl-imx51-2.6.31/arch/parisc/kernel/sys_parisc.c @@ -110,37 +110,14 @@ return addr; } -static unsigned long do_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, unsigned long fd, - unsigned long pgoff) -{ - struct file * file = NULL; - unsigned long error = -EBADF; - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file != NULL) - fput(file); -out: - return error; -} - asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff) { /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE we have. */ - return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12)); + return sys_mmap_pgoff(addr, len, prot, flags, fd, + pgoff >> (PAGE_SHIFT - 12)); } asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len, @@ -148,7 +125,8 @@ unsigned long offset) { if (!(offset & ~PAGE_MASK)) { - return do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); + return sys_mmap_pgoff(addr, len, prot, flags, fd, + offset >> PAGE_SHIFT); } else { return -EINVAL; } --- linux-fsl-imx51-2.6.31.orig/arch/sparc/Makefile +++ linux-fsl-imx51-2.6.31/arch/sparc/Makefile @@ -27,11 +27,11 @@ LDFLAGS := -m elf32_sparc CHECKFLAGS += -D__sparc__ export BITS := 32 +UTS_MACHINE := sparc #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7 KBUILD_AFLAGS += -m32 -CPPFLAGS_vmlinux.lds += -m32 #LDFLAGS_vmlinux = -N -Ttext 0xf0004000 # Since 2.5.40, the first stage is left not btfix-ed. @@ -49,11 +49,9 @@ CHECKFLAGS += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64 -# Undefine sparc when processing vmlinux.lds - it is used -# And teach CPP we are doing 64 bit builds (for this case) -CPPFLAGS_vmlinux.lds += -m64 -Usparc LDFLAGS := -m elf64_sparc export BITS := 64 +UTS_MACHINE := sparc64 KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow \ -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare \ --- linux-fsl-imx51-2.6.31.orig/arch/sparc/include/asm/elf_64.h +++ linux-fsl-imx51-2.6.31/arch/sparc/include/asm/elf_64.h @@ -196,17 +196,10 @@ #define ELF_PLATFORM (NULL) #define SET_PERSONALITY(ex) \ -do { unsigned long new_flags = current_thread_info()->flags; \ - new_flags &= _TIF_32BIT; \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - new_flags |= _TIF_32BIT; \ + do { if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ + set_thread_flag(TIF_32BIT); \ else \ - new_flags &= ~_TIF_32BIT; \ - if ((current_thread_info()->flags & _TIF_32BIT) \ - != new_flags) \ - set_thread_flag(TIF_ABI_PENDING); \ - else \ - clear_thread_flag(TIF_ABI_PENDING); \ + clear_thread_flag(TIF_32BIT); \ /* flush_thread will update pgd cache */ \ if (personality(current->personality) != PER_LINUX32) \ set_personality(PER_LINUX | \ --- linux-fsl-imx51-2.6.31.orig/arch/sparc/include/asm/thread_info_64.h +++ linux-fsl-imx51-2.6.31/arch/sparc/include/asm/thread_info_64.h @@ -232,7 +232,7 @@ * in using in assembly, else we can't use the mask as * an immediate value in instructions such as andcc. */ -#define TIF_ABI_PENDING 12 +/* flag bit 12 is available */ #define TIF_MEMDIE 13 #define TIF_POLLING_NRFLAG 14 #define TIF_FREEZE 15 /* is freezing for suspend */ @@ -246,7 +246,6 @@ #define _TIF_32BIT (1<kregs; unsigned long usp = regs->u_regs[UREG_I6]; --- linux-fsl-imx51-2.6.31.orig/arch/sparc/lib/mcount.S +++ linux-fsl-imx51-2.6.31/arch/sparc/lib/mcount.S @@ -64,8 +64,9 @@ 2: sethi %hi(softirq_stack), %g3 or %g3, %lo(softirq_stack), %g3 ldx [%g3 + %g1], %g7 + sub %g7, STACK_BIAS, %g7 cmp %sp, %g7 - bleu,pt %xcc, 2f + bleu,pt %xcc, 3f sethi %hi(THREAD_SIZE), %g3 add %g7, %g3, %g7 cmp %sp, %g7 @@ -75,7 +76,7 @@ * again, we are already trying to output the stack overflow * message. */ - sethi %hi(ovstack), %g7 ! cant move to panic stack fast enough +3: sethi %hi(ovstack), %g7 ! cant move to panic stack fast enough or %g7, %lo(ovstack), %g7 add %g7, OVSTACKSIZE, %g3 sub %g3, STACK_BIAS + 192, %g3 --- linux-fsl-imx51-2.6.31.orig/arch/sparc/mm/init_64.h +++ linux-fsl-imx51-2.6.31/arch/sparc/mm/init_64.h @@ -45,7 +45,7 @@ #define VMEMMAP_ALIGN(x) (((x)+VMEMMAP_CHUNK-1UL)&VMEMMAP_CHUNK_MASK) #define VMEMMAP_SIZE ((((1UL << MAX_PHYSADDR_BITS) >> PAGE_SHIFT) * \ - sizeof(struct page *)) >> VMEMMAP_CHUNK_SHIFT) + sizeof(struct page)) >> VMEMMAP_CHUNK_SHIFT) extern unsigned long vmemmap_table[VMEMMAP_SIZE]; #endif --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/systbls.h +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/systbls.h @@ -8,7 +8,6 @@ #include extern asmlinkage unsigned long sys_getpagesize(void); -extern asmlinkage unsigned long sparc_brk(unsigned long brk); extern asmlinkage long sparc_pipe(struct pt_regs *regs); extern asmlinkage long sys_ipc(unsigned int call, int first, unsigned long second, --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/process_64.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/process_64.c @@ -365,14 +365,6 @@ struct thread_info *t = current_thread_info(); struct mm_struct *mm; - if (test_ti_thread_flag(t, TIF_ABI_PENDING)) { - clear_ti_thread_flag(t, TIF_ABI_PENDING); - if (test_ti_thread_flag(t, TIF_32BIT)) - clear_ti_thread_flag(t, TIF_32BIT); - else - set_ti_thread_flag(t, TIF_32BIT); - } - mm = t->task->mm; if (mm) tsb_context_switch(mm); --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/systbls_64.S +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/systbls_64.S @@ -21,7 +21,7 @@ /*0*/ .word sys_restart_syscall, sys32_exit, sys_fork, sys_read, sys_write /*5*/ .word sys32_open, sys_close, sys32_wait4, sys32_creat, sys_link /*10*/ .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod -/*15*/ .word sys_chmod, sys_lchown16, sys_sparc_brk, sys32_perfctr, sys32_lseek +/*15*/ .word sys_chmod, sys_lchown16, sys_brk, sys32_perfctr, sys32_lseek /*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16 /*25*/ .word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys_pause /*30*/ .word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice @@ -96,7 +96,7 @@ /*0*/ .word sys_restart_syscall, sparc_exit, sys_fork, sys_read, sys_write /*5*/ .word sys_open, sys_close, sys_wait4, sys_creat, sys_link /*10*/ .word sys_unlink, sys_nis_syscall, sys_chdir, sys_chown, sys_mknod -/*15*/ .word sys_chmod, sys_lchown, sys_sparc_brk, sys_perfctr, sys_lseek +/*15*/ .word sys_chmod, sys_lchown, sys_brk, sys_perfctr, sys_lseek /*20*/ .word sys_getpid, sys_capget, sys_capset, sys_setuid, sys_getuid /*25*/ .word sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_nis_syscall /*30*/ .word sys_utime, sys_nis_syscall, sys_nis_syscall, sys_access, sys_nice --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/sys_sparc_32.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/sys_sparc_32.c @@ -45,7 +45,8 @@ /* We do not accept a shared mapping if it would violate * cache aliasing constraints. */ - if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1))) + if ((flags & MAP_SHARED) && + ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))) return -EINVAL; return addr; } @@ -79,15 +80,6 @@ } } -asmlinkage unsigned long sparc_brk(unsigned long brk) -{ - if(ARCH_SUN4C) { - if ((brk & 0xe0000000) != (current->mm->brk & 0xe0000000)) - return current->mm->brk; - } - return sys_brk(brk); -} - /* * sys_pipe() is the normal C calling standard for creating * a pipe. It's not the way unix traditionally does this, though. @@ -234,31 +226,6 @@ } /* Linux version of mmap */ -static unsigned long do_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, unsigned long fd, - unsigned long pgoff) -{ - struct file * file = NULL; - unsigned long retval = -EBADF; - - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - len = PAGE_ALIGN(len); - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - down_write(¤t->mm->mmap_sem); - retval = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return retval; -} asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, @@ -266,14 +233,16 @@ { /* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE we have. */ - return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12)); + return sys_mmap_pgoff(addr, len, prot, flags, fd, + pgoff >> (PAGE_SHIFT - 12)); } asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long off) { - return do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT); + /* no alignment check? */ + return sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); } long sparc_remap_file_pages(unsigned long start, unsigned long size, @@ -287,27 +256,6 @@ (pgoff >> (PAGE_SHIFT - 12)), flags); } -extern unsigned long do_mremap(unsigned long addr, - unsigned long old_len, unsigned long new_len, - unsigned long flags, unsigned long new_addr); - -asmlinkage unsigned long sparc_mremap(unsigned long addr, - unsigned long old_len, unsigned long new_len, - unsigned long flags, unsigned long new_addr) -{ - unsigned long ret = -EINVAL; - - if (unlikely(sparc_mmap_check(addr, old_len))) - goto out; - if (unlikely(sparc_mmap_check(new_addr, new_len))) - goto out; - down_write(¤t->mm->mmap_sem); - ret = do_mremap(addr, old_len, new_len, flags, new_addr); - up_write(¤t->mm->mmap_sem); -out: - return ret; -} - /* we come to here via sys_nis_syscall so it can setup the regs argument */ asmlinkage unsigned long c_sys_nis_syscall (struct pt_regs *regs) --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/visemul.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/visemul.c @@ -617,7 +617,7 @@ rs2 = fps_regval(f, RS2(insn)); rd_val = 0; - src2 = (rs2 >> (opf == FMUL8x16AU_OPF) ? 16 : 0); + src2 = rs2 >> (opf == FMUL8x16AU_OPF ? 16 : 0); for (byte = 0; byte < 4; byte++) { u16 src1 = (rs1 >> (byte * 8)) & 0x00ff; u32 prod = src1 * src2; --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/prom_common.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/prom_common.c @@ -76,6 +76,7 @@ err = -ENODEV; + mutex_lock(&of_set_property_mutex); write_lock(&devtree_lock); prevp = &dp->properties; while (*prevp) { @@ -85,9 +86,7 @@ void *old_val = prop->value; int ret; - mutex_lock(&of_set_property_mutex); ret = prom_setprop(dp->node, name, val, len); - mutex_unlock(&of_set_property_mutex); err = -EINVAL; if (ret >= 0) { @@ -106,6 +105,7 @@ prevp = &(*prevp)->next; } write_unlock(&devtree_lock); + mutex_unlock(&of_set_property_mutex); /* XXX Upate procfs if necessary... */ --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/systbls_32.S +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/systbls_32.S @@ -19,7 +19,7 @@ /*0*/ .long sys_restart_syscall, sys_exit, sys_fork, sys_read, sys_write /*5*/ .long sys_open, sys_close, sys_wait4, sys_creat, sys_link /*10*/ .long sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys_mknod -/*15*/ .long sys_chmod, sys_lchown16, sparc_brk, sys_nis_syscall, sys_lseek +/*15*/ .long sys_chmod, sys_lchown16, sys_brk, sys_nis_syscall, sys_lseek /*20*/ .long sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16 /*25*/ .long sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_pause /*30*/ .long sys_utime, sys_lchown, sys_fchown, sys_access, sys_nice @@ -67,7 +67,7 @@ /*235*/ .long sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys_mlockall /*240*/ .long sys_munlockall, sys_sched_setparam, sys_sched_getparam, sys_sched_setscheduler, sys_sched_getscheduler /*245*/ .long sys_sched_yield, sys_sched_get_priority_max, sys_sched_get_priority_min, sys_sched_rr_get_interval, sys_nanosleep -/*250*/ .long sparc_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl +/*250*/ .long sys_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl /*255*/ .long sys_sync_file_range, sys_clock_settime, sys_clock_gettime, sys_clock_getres, sys_clock_nanosleep /*260*/ .long sys_sched_getaffinity, sys_sched_setaffinity, sys_timer_settime, sys_timer_gettime, sys_timer_getoverrun /*265*/ .long sys_timer_delete, sys_timer_create, sys_nis_syscall, sys_io_setup, sys_io_destroy --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/Makefile @@ -7,7 +7,11 @@ extra-y := head_$(BITS).o extra-y += init_task.o -extra-y += vmlinux.lds + +# Undefine sparc when processing vmlinux.lds - it is used +# And teach CPP we are doing $(BITS) builds (for this case) +CPPFLAGS_vmlinux.lds := -Usparc -m$(BITS) +extra-y += vmlinux.lds obj-$(CONFIG_SPARC32) += entry.o wof.o wuf.o obj-$(CONFIG_SPARC32) += etrap_32.o --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/tsb.S +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/tsb.S @@ -191,10 +191,12 @@ tsb_itlb_load: /* Executable bit must be set. */ -661: andcc %g5, _PAGE_EXEC_4U, %g0 - .section .sun4v_1insn_patch, "ax" +661: sethi %hi(_PAGE_EXEC_4U), %g4 + andcc %g5, %g4, %g0 + .section .sun4v_2insn_patch, "ax" .word 661b andcc %g5, _PAGE_EXEC_4V, %g0 + nop .previous be,pn %xcc, tsb_do_fault --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/sys_sparc_64.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/sys_sparc_64.c @@ -317,10 +317,14 @@ unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, unsigned long len, unsigned long pgoff, unsigned long flags) { unsigned long align_goal, addr = -ENOMEM; + unsigned long (*get_area)(struct file *, unsigned long, + unsigned long, unsigned long, unsigned long); + + get_area = current->mm->get_unmapped_area; if (flags & MAP_FIXED) { /* Ok, don't mess with it. */ - return get_unmapped_area(NULL, orig_addr, len, pgoff, flags); + return get_area(NULL, orig_addr, len, pgoff, flags); } flags &= ~MAP_SHARED; @@ -333,7 +337,7 @@ align_goal = (64UL * 1024); do { - addr = get_unmapped_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags); + addr = get_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags); if (!(addr & ~PAGE_MASK)) { addr = (addr + (align_goal - 1UL)) & ~(align_goal - 1UL); break; @@ -351,7 +355,7 @@ * be obtained. */ if (addr & ~PAGE_MASK) - addr = get_unmapped_area(NULL, orig_addr, len, pgoff, flags); + addr = get_area(NULL, orig_addr, len, pgoff, flags); return addr; } @@ -399,18 +403,6 @@ } } -SYSCALL_DEFINE1(sparc_brk, unsigned long, brk) -{ - /* People could try to be nasty and use ta 0x6d in 32bit programs */ - if (test_thread_flag(TIF_32BIT) && brk >= STACK_TOP32) - return current->mm->brk; - - if (unlikely(straddles_64bit_va_hole(current->mm->brk, brk))) - return current->mm->brk; - - return sys_brk(brk); -} - /* * sys_pipe() is the normal C calling standard for creating * a pipe. It's not the way unix traditionally does this, though. @@ -568,23 +560,13 @@ unsigned long, prot, unsigned long, flags, unsigned long, fd, unsigned long, off) { - struct file * file = NULL; - unsigned long retval = -EBADF; - - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - len = PAGE_ALIGN(len); + unsigned long retval = -EINVAL; - down_write(¤t->mm->mmap_sem); - retval = do_mmap(file, addr, len, prot, flags, off); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); + if ((off + PAGE_ALIGN(len)) < off) + goto out; + if (off & ~PAGE_MASK) + goto out; + retval = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); out: return retval; } @@ -614,12 +596,6 @@ if (test_thread_flag(TIF_32BIT)) goto out; - if (unlikely(new_len >= VA_EXCLUDE_START)) - goto out; - if (unlikely(sparc_mmap_check(addr, old_len))) - goto out; - if (unlikely(sparc_mmap_check(new_addr, new_len))) - goto out; down_write(¤t->mm->mmap_sem); ret = do_mremap(addr, old_len, new_len, flags, new_addr); --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/of_device_64.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/of_device_64.c @@ -104,9 +104,19 @@ int i; /* Check address type match */ - if ((addr[0] ^ range[0]) & 0x03000000) - return -EINVAL; + if (!((addr[0] ^ range[0]) & 0x03000000)) + goto type_match; + + /* Special exception, we can map a 64-bit address into + * a 32-bit range. + */ + if ((addr[0] & 0x03000000) == 0x03000000 && + (range[0] & 0x03000000) == 0x02000000) + goto type_match; + + return -EINVAL; +type_match: if (of_out_of_range(addr + 1, range + 1, range + na + pna, na - 1, ns)) return -EINVAL; --- linux-fsl-imx51-2.6.31.orig/arch/sparc/kernel/ldc.c +++ linux-fsl-imx51-2.6.31/arch/sparc/kernel/ldc.c @@ -1242,13 +1242,13 @@ snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name); err = request_irq(lp->cfg.rx_irq, ldc_rx, - IRQF_SAMPLE_RANDOM | IRQF_SHARED, + IRQF_SAMPLE_RANDOM | IRQF_DISABLED, lp->rx_irq_name, lp); if (err) return err; err = request_irq(lp->cfg.tx_irq, ldc_tx, - IRQF_SAMPLE_RANDOM | IRQF_SHARED, + IRQF_SAMPLE_RANDOM | IRQF_DISABLED, lp->tx_irq_name, lp); if (err) { free_irq(lp->cfg.rx_irq, lp); --- linux-fsl-imx51-2.6.31.orig/arch/avr32/include/asm/syscalls.h +++ linux-fsl-imx51-2.6.31/arch/avr32/include/asm/syscalls.h @@ -29,10 +29,6 @@ struct pt_regs *); asmlinkage int sys_rt_sigreturn(struct pt_regs *); -/* kernel/sys_avr32.c */ -asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long, off_t); - /* mm/cache.c */ asmlinkage int sys_cacheflush(int, void __user *, size_t); --- linux-fsl-imx51-2.6.31.orig/arch/avr32/kernel/syscall-stubs.S +++ linux-fsl-imx51-2.6.31/arch/avr32/kernel/syscall-stubs.S @@ -61,7 +61,7 @@ __sys_mmap2: pushm lr st.w --sp, ARG6 - call sys_mmap2 + call sys_mmap_pgoff sub sp, -4 popm pc --- linux-fsl-imx51-2.6.31.orig/arch/avr32/kernel/sys_avr32.c +++ linux-fsl-imx51-2.6.31/arch/avr32/kernel/sys_avr32.c @@ -5,39 +5,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include -#include #include -#include -#include -#include - -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, off_t offset) -{ - int error = -EBADF; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - return error; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, offset); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); - return error; -} - int kernel_execve(const char *file, char **argv, char **envp) { register long scno asm("r8") = __NR_execve; --- linux-fsl-imx51-2.6.31.orig/arch/um/Makefile +++ linux-fsl-imx51-2.6.31/arch/um/Makefile @@ -96,11 +96,10 @@ $(call cc-option, -fno-stack-protector,) \ $(call cc-option, -fno-stack-protector-all,) -CONFIG_KERNEL_STACK_ORDER ?= 2 -STACK_SIZE := $(shell echo $$[ 4096 * (1 << $(CONFIG_KERNEL_STACK_ORDER)) ] ) - -CPPFLAGS_vmlinux.lds = -U$(SUBARCH) -DSTART=$(START) -DELF_ARCH=$(ELF_ARCH) \ - -DELF_FORMAT="$(ELF_FORMAT)" -DKERNEL_STACK_SIZE=$(STACK_SIZE) +# Options used by linker script +export LDS_START := $(START) +export LDS_ELF_ARCH := $(ELF_ARCH) +export LDS_ELF_FORMAT := $(ELF_FORMAT) # The wrappers will select whether using "malloc" or the kernel allocator. LINK_WRAPS = -Wl,--wrap,malloc -Wl,--wrap,free -Wl,--wrap,calloc --- linux-fsl-imx51-2.6.31.orig/arch/um/kernel/vmlinux.lds.S +++ linux-fsl-imx51-2.6.31/arch/um/kernel/vmlinux.lds.S @@ -1,3 +1,6 @@ + +KERNEL_STACK_SIZE = 4096 * (1 << CONFIG_KERNEL_STACK_ORDER); + #ifdef CONFIG_LD_SCRIPT_STATIC #include "uml.lds.S" #else --- linux-fsl-imx51-2.6.31.orig/arch/um/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/um/kernel/Makefile @@ -3,6 +3,9 @@ # Licensed under the GPL # +CPPFLAGS_vmlinux.lds := -U$(SUBARCH) -DSTART=$(LDS_START) \ + -DELF_ARCH=$(LDS_ELF_ARCH) \ + -DELF_FORMAT=$(LDS_ELF_FORMAT) extra-y := vmlinux.lds clean-files := --- linux-fsl-imx51-2.6.31.orig/arch/um/kernel/syscall.c +++ linux-fsl-imx51-2.6.31/arch/um/kernel/syscall.c @@ -8,6 +8,7 @@ #include "linux/mm.h" #include "linux/sched.h" #include "linux/utsname.h" +#include "linux/syscalls.h" #include "asm/current.h" #include "asm/mman.h" #include "asm/uaccess.h" @@ -37,31 +38,6 @@ return ret; } -/* common code for old and new mmaps */ -long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - long error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); - out: - return error; -} - long old_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long offset) @@ -70,7 +46,7 @@ if (offset & ~PAGE_MASK) goto out; - err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); + err = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); out: return err; } --- linux-fsl-imx51-2.6.31.orig/arch/um/sys-i386/shared/sysdep/syscalls.h +++ linux-fsl-imx51-2.6.31/arch/um/sys-i386/shared/sysdep/syscalls.h @@ -20,7 +20,3 @@ #define EXECUTE_SYSCALL(syscall, regs) \ ((long (*)(struct syscall_args)) \ (*sys_call_table[syscall]))(SYSCALL_ARGS(®s->regs)) - -extern long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff); --- linux-fsl-imx51-2.6.31.orig/arch/m68knommu/kernel/sys_m68k.c +++ linux-fsl-imx51-2.6.31/arch/m68knommu/kernel/sys_m68k.c @@ -28,39 +28,6 @@ #include #include -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2(addr, len, prot, flags, fd, pgoff); -} - /* * Perform the select(nd, in, out, ex, tv) and mmap() system * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to @@ -89,9 +56,8 @@ if (a.offset & ~PAGE_MASK) goto out; - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, + a.offset >> PAGE_SHIFT); out: return error; } --- linux-fsl-imx51-2.6.31.orig/arch/m68knommu/kernel/syscalltable.S +++ linux-fsl-imx51-2.6.31/arch/m68knommu/kernel/syscalltable.S @@ -210,7 +210,7 @@ .long sys_ni_syscall /* streams2 */ .long sys_vfork /* 190 */ .long sys_getrlimit - .long sys_mmap2 + .long sys_mmap_pgoff .long sys_truncate64 .long sys_ftruncate64 .long sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/mips/Makefile +++ linux-fsl-imx51-2.6.31/arch/mips/Makefile @@ -615,16 +615,6 @@ cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/ -ifdef CONFIG_32BIT -ifdef CONFIG_CPU_LITTLE_ENDIAN -JIFFIES = jiffies_64 -else -JIFFIES = jiffies_64 + 4 -endif -else -JIFFIES = jiffies_64 -endif - # # Automatically detect the build format. By default we choose # the elf format according to the load address. @@ -648,8 +638,9 @@ endif KBUILD_AFLAGS += $(cflags-y) -KBUILD_CFLAGS += $(cflags-y) \ - -D"VMLINUX_LOAD_ADDRESS=$(load-y)" +KBUILD_CFLAGS += $(cflags-y) +KBUILD_CPPFLAGS += -D"VMLINUX_LOAD_ADDRESS=$(load-y)" +KBUILD_CPPFLAGS += -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)" LDFLAGS += -m $(ld-emul) @@ -664,18 +655,6 @@ OBJCOPYFLAGS += --remove-section=.reginfo -# -# Choosing incompatible machines durings configuration will result in -# error messages during linking. Select a default linkscript if -# none has been choosen above. -# - -CPPFLAGS_vmlinux.lds := \ - $(KBUILD_CFLAGS) \ - -D"LOADADDR=$(load-y)" \ - -D"JIFFIES=$(JIFFIES)" \ - -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)" - head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o libs-y += arch/mips/lib/ --- linux-fsl-imx51-2.6.31.orig/arch/mips/include/asm/compat.h +++ linux-fsl-imx51-2.6.31/arch/mips/include/asm/compat.h @@ -144,7 +144,7 @@ return (u32)(unsigned long)uptr; } -static inline void __user *compat_alloc_user_space(long len) +static inline void __user *arch_compat_alloc_user_space(long len) { struct pt_regs *regs = (struct pt_regs *) ((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1; --- linux-fsl-imx51-2.6.31.orig/arch/mips/kernel/linux32.c +++ linux-fsl-imx51-2.6.31/arch/mips/kernel/linux32.c @@ -67,28 +67,13 @@ unsigned long, prot, unsigned long, flags, unsigned long, fd, unsigned long, pgoff) { - struct file * file = NULL; unsigned long error; error = -EINVAL; if (pgoff & (~PAGE_MASK >> 12)) goto out; - pgoff >>= PAGE_SHIFT-12; - - if (!(flags & MAP_ANONYMOUS)) { - error = -EBADF; - file = fget(fd); - if (!file) - goto out; - } - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); - + error = sys_mmap_pgoff(addr, len, prot, flags, fd, + pgoff >> (PAGE_SHIFT-12)); out: return error; } --- linux-fsl-imx51-2.6.31.orig/arch/mips/kernel/vmlinux.lds.S +++ linux-fsl-imx51-2.6.31/arch/mips/kernel/vmlinux.lds.S @@ -9,7 +9,16 @@ text PT_LOAD FLAGS(7); /* RWX */ note PT_NOTE FLAGS(4); /* R__ */ } -jiffies = JIFFIES; + +#ifdef CONFIG_32BIT + #ifdef CONFIG_CPU_LITTLE_ENDIAN + jiffies = jiffies_64; + #else + jiffies = jiffies_64 + 4; + #endif +#else + jiffies = jiffies_64; +#endif SECTIONS { @@ -28,7 +37,7 @@ /* . = 0xa800000000300000; */ . = 0xffffffff80300000; #endif - . = LOADADDR; + . = VMLINUX_LOAD_ADDRESS; /* read-only */ _text = .; /* Text and read-only data */ .text : { --- linux-fsl-imx51-2.6.31.orig/arch/mips/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/mips/kernel/Makefile @@ -2,6 +2,8 @@ # Makefile for the Linux/MIPS kernel. # +CPPFLAGS_vmlinux.lds := $(KBUILD_CFLAGS) + extra-y := head.o init_task.o vmlinux.lds obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ --- linux-fsl-imx51-2.6.31.orig/arch/mips/kernel/syscall.c +++ linux-fsl-imx51-2.6.31/arch/mips/kernel/syscall.c @@ -91,7 +91,8 @@ * We do not accept a shared mapping if it would violate * cache aliasing constraints. */ - if ((flags & MAP_SHARED) && (addr & shm_align_mask)) + if ((flags & MAP_SHARED) && + ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask)) return -EINVAL; return addr; } @@ -127,31 +128,6 @@ } } -/* common code for old and new mmaps */ -static inline unsigned long -do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, - unsigned long flags, unsigned long fd, unsigned long pgoff) -{ - unsigned long error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, unsigned long, prot, unsigned long, flags, unsigned long, fd, off_t, offset) @@ -162,7 +138,7 @@ if (offset & ~PAGE_MASK) goto out; - result = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); + result = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); out: return result; @@ -175,7 +151,7 @@ if (pgoff & (~PAGE_MASK >> 12)) return -EINVAL; - return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12)); + return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12)); } save_static_function(sys_fork); --- linux-fsl-imx51-2.6.31.orig/arch/cris/Makefile +++ linux-fsl-imx51-2.6.31/arch/cris/Makefile @@ -42,8 +42,6 @@ OBJCOPYFLAGS := -O binary -R .note -R .comment -S -CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE) - KBUILD_AFLAGS += -mlinux -march=$(arch-y) $(inc) KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe $(inc) KBUILD_CPPFLAGS += $(inc) --- linux-fsl-imx51-2.6.31.orig/arch/cris/kernel/sys_cris.c +++ linux-fsl-imx51-2.6.31/arch/cris/kernel/sys_cris.c @@ -26,31 +26,6 @@ #include #include -/* common code for old and new mmaps */ -static inline long -do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, - unsigned long flags, unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - asmlinkage unsigned long old_mmap(unsigned long __user *args) { unsigned long buffer[6]; @@ -63,7 +38,7 @@ if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */ goto out; - err = do_mmap2(buffer[0], buffer[1], buffer[2], buffer[3], + err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5] >> PAGE_SHIFT); out: return err; @@ -73,7 +48,8 @@ sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff) { - return do_mmap2(addr, len, prot, flags, fd, pgoff); + /* bug(?): 8Kb pages here */ + return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); } /* --- linux-fsl-imx51-2.6.31.orig/arch/cris/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/cris/kernel/Makefile @@ -3,6 +3,7 @@ # Makefile for the linux kernel. # +CPPFLAGS_vmlinux.lds := -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE) extra-y := vmlinux.lds obj-y := process.o traps.o irq.o ptrace.o setup.o time.o sys_cris.o --- linux-fsl-imx51-2.6.31.orig/arch/arm/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/Kconfig @@ -294,7 +294,8 @@ select ARCH_MTD_XIP select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB - select HAVE_CLK +# select HAVE_CLK + select ZONE_DMA help Support for Freescale MXC/iMX-based family of processors @@ -308,6 +309,7 @@ select GENERIC_CLOCKEVENTS select GENERIC_GPIO select USB_ARCH_HAS_EHCI + select ZONE_DMA help Support for systems based on the Freescale 3xxx CPUs. @@ -772,6 +774,19 @@ It does not affect the MPCore. This option enables the ARM Ltd. recommended workaround. +config ARM_ERRATA_364296 + bool "Enable partial low interrupt latency mode for ARM1136" + depends on CPU_V6 && !SMP + default n + help + This options enables the workaround for the 364296 ARM1136 + r0pX errata (possible cache data corruption with + hit-under-miss enabled). It sets the undocumented bit 31 in + the auxiliary control register and the FI bit in the control + register, thus disabling hit-under-miss without putting the + processor into full low interrupt latency mode. ARM11MPCore + is not affected. + config ARM_ERRATA_430973 bool "ARM errata: Stale prediction on replaced interworking branch" depends on CPU_V7 @@ -1064,7 +1079,7 @@ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ ARCH_AT91 || ARCH_DAVINCI || \ - ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW + ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW || ARCH_MXC help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -1241,7 +1256,7 @@ menu "CPU Power Management" -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX) +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX || ARCH_MXC || ARCH_STMP3XXX) source "drivers/cpufreq/Kconfig" @@ -1276,6 +1291,12 @@ bool "CPUfreq support for Samsung S3C64XX CPUs" depends on CPU_FREQ && CPU_S3C6410 +config CPU_FREQ_IMX + tristate "CPUfreq driver for i.MX CPUs" + depends on ARCH_MXC && CPU_FREQ && REGULATOR + help + This enables the CPUfreq driver for i.MX CPUs. + endif source "drivers/cpuidle/Kconfig" @@ -1377,6 +1398,8 @@ source "net/Kconfig" +source "ubuntu/Kconfig" + menu "Device Drivers" source "drivers/base/Kconfig" @@ -1423,6 +1446,8 @@ source "drivers/i2c/Kconfig" +source "drivers/i2c-slave/Kconfig" + source "drivers/spi/Kconfig" source "drivers/gpio/Kconfig" @@ -1477,6 +1502,10 @@ source "drivers/staging/Kconfig" +if ARCH_MXC +source "drivers/mxc/Kconfig" +endif + endmenu source "fs/Kconfig" --- linux-fsl-imx51-2.6.31.orig/arch/arm/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/Makefile @@ -14,7 +14,7 @@ ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) LDFLAGS_vmlinux += --be8 endif -CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET) + OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S GZFLAGS :=-9 #KBUILD_CFLAGS +=-pipe @@ -135,7 +135,11 @@ machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_MX1) := mx1 machine-$(CONFIG_ARCH_MX2) := mx2 +machine-$(CONFIG_ARCH_MX25) := mx25 machine-$(CONFIG_ARCH_MX3) := mx3 +machine-$(CONFIG_ARCH_MX35) := mx35 +machine-$(CONFIG_ARCH_MX37) := mx37 +machine-$(CONFIG_ARCH_MX51) := mx51 machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx machine-$(CONFIG_ARCH_OMAP1) := omap1 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-gemini/include/mach/uncompress.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-gemini/include/mach/uncompress.h @@ -30,7 +30,9 @@ UART[UART_TX] = c; } -#define flush() do { } while (0) +static inline void flush(void) +{ +} /* * nothing to do --- linux-fsl-imx51-2.6.31.orig/arch/arm/boot/compressed/head.S +++ linux-fsl-imx51-2.6.31/arch/arm/boot/compressed/head.S @@ -27,6 +27,14 @@ .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm +#elif defined(CONFIG_CPU_V7) + .macro loadsp, rb + .endm + .macro writeb, ch, rb +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + mcr p14, 0, \ch, c0, c5, 0 + .endm #elif defined(CONFIG_CPU_XSCALE) .macro loadsp, rb .endm @@ -468,6 +476,7 @@ mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 + mcr p15, 0, r0, c8, c7, 0 @ invalidate I,D TLBs mcr p15, 0, r0, c7, c5, 4 @ ISB mov pc, r12 --- linux-fsl-imx51-2.6.31.orig/arch/arm/boot/compressed/misc.c +++ linux-fsl-imx51-2.6.31/arch/arm/boot/compressed/misc.c @@ -48,6 +48,18 @@ asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } + +#elif defined(CONFIG_CPU_V7) + +static void icedcc_putc(int ch) +{ + asm( + "wait: mrc p14, 0, pc, c0, c1, 0 \n\ + bcs wait \n\ + mcr p14, 0, %0, c0, c5, 0 " + : : "r" (ch)); +} + #elif defined(CONFIG_CPU_XSCALE) static void icedcc_putc(int ch) @@ -83,7 +95,6 @@ #endif #define putc(ch) icedcc_putc(ch) -#define flush() do { } while (0) #endif static void putstr(const char *ptr) --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/stmp378x_i2c.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/stmp378x_i2c.c @@ -0,0 +1,281 @@ +/* + * Freescale STMP378X I2C low-level/dma functions + * + * Author: Dmitrij Frasenyak + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#define STMP378X_APBX_I2C 3 + +static unsigned int dma_channel = + STMP3XXX_DMA(STMP378X_APBX_I2C, STMP3XXX_BUS_APBX); + + +static struct stmp3xxx_dma_descriptor i2c_dma_read[2]; +static struct stmp3xxx_dma_descriptor i2c_dma_write; +static dma_addr_t i2c_buf_phys; +static u8 *i2c_buf_virt; + + +/* + * Select device to read from + */ + +u32 cmd_i2c_select[4] = { + 0, /* Chain to i2c_read */ + + (BF(1, APBX_CHn_CMD_XFER_COUNT) | + /* BM_APBX_CHn_CMD_SEMAPHORE | */ + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_CHAIN | + BM_APBX_CHn_CMD_IRQONCMPLT | /* For debug*/ + BF(BV_APBX_CHn_CMD_COMMAND__DMA_READ, APBX_CHn_CMD_COMMAND)), + + 0, /* dma handler */ + + BM_I2C_CTRL0_RETAIN_CLOCK | + BM_I2C_CTRL0_PRE_SEND_START | + BM_I2C_CTRL0_MASTER_MODE | + BM_I2C_CTRL0_DIRECTION | + BF(1, I2C_CTRL0_XFER_COUNT) + +}; + +u32 cmd_i2c_write[4] = { + 0, + + (BM_APBX_CHn_CMD_SEMAPHORE | + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_IRQONCMPLT | + BF(BV_APBX_CHn_CMD_COMMAND__DMA_READ, APBX_CHn_CMD_COMMAND)), + + 0, /* dma handler */ + + BM_I2C_CTRL0_PRE_SEND_START | + BM_I2C_CTRL0_MASTER_MODE | +/* BM_I2C_CTRL0_POST_SEND_STOP | */ + BM_I2C_CTRL0_DIRECTION + +}; + + +u32 cmd_i2c_read[4] = { + 0, + + (BM_APBX_CHn_CMD_SEMAPHORE | + BF(1, APBX_CHn_CMD_CMDWORDS) | + BM_APBX_CHn_CMD_WAIT4ENDCMD | + BM_APBX_CHn_CMD_IRQONCMPLT | + BF(BV_APBX_CHn_CMD_COMMAND__DMA_WRITE, APBX_CHn_CMD_COMMAND)), + + 0, /* dma handler */ + + BM_I2C_CTRL0_SEND_NAK_ON_LAST | +/* BM_I2C_CTRL0_POST_SEND_STOP | */ + BM_I2C_CTRL0_MASTER_MODE | + 0 +}; + + +int hw_i2c_init_dma(struct device *dev) +{ + int ret; + + ret = stmp3xxx_dma_request(dma_channel, dev, "i2c"); + if (ret) { + dev_err(dev, "stmp3xxx_dma_request failed: error %d\n", ret); + return ret; + } + + i2c_buf_virt = + dma_alloc_coherent( + dev, + PAGE_SIZE, + &i2c_buf_phys, + GFP_KERNEL); + + if (i2c_buf_virt == NULL) + return -ENOMEM; + + + stmp3xxx_dma_allocate_command( + dma_channel, + &i2c_dma_read[0]); + + stmp3xxx_dma_allocate_command( + dma_channel, + &i2c_dma_read[1]); + + stmp3xxx_dma_allocate_command( + dma_channel, + &i2c_dma_write); + + stmp3xxx_dma_reset_channel(dma_channel); + stmp3xxx_dma_clear_interrupt(dma_channel); + stmp3xxx_dma_enable_interrupt(dma_channel); + return 0; +}; + +void hw_i2c_free_dma(struct device *dev) +{ + stmp3xxx_dma_free_command( + dma_channel, + &i2c_dma_write); + + stmp3xxx_dma_free_command( + dma_channel, + &i2c_dma_read[1]); + + stmp3xxx_dma_free_command( + dma_channel, + &i2c_dma_read[0]); + + dma_free_coherent( + dev, + PAGE_SIZE, + i2c_buf_virt, + i2c_buf_phys); + + stmp3xxx_dma_release(dma_channel); +} + +void hw_i2c_clear_dma_interrupt(void) +{ + stmp3xxx_dma_clear_interrupt(dma_channel); +} +EXPORT_SYMBOL(hw_i2c_clear_dma_interrupt); + +void hw_i2c_setup_write(u8 addr, void *buff, int len, int flags) +{ + + memcpy(i2c_dma_write.command, &cmd_i2c_write, sizeof(cmd_i2c_write)); + + i2c_dma_write.command->cmd |= + BF(len+1, APBX_CHn_CMD_XFER_COUNT); + + i2c_dma_write.command->pio_words[0] |= + BF(len+1, I2C_CTRL0_XFER_COUNT) | flags; + + i2c_dma_write.command->buf_ptr = i2c_buf_phys; + i2c_buf_virt[0] = addr | I2C_WRITE ; + memcpy(&i2c_buf_virt[1], buff, len); +} +EXPORT_SYMBOL(hw_i2c_setup_write); + +void hw_i2c_finish_read(void *buff, int len) +{ + memcpy(buff, &i2c_buf_virt[1], len); + +} +EXPORT_SYMBOL(hw_i2c_finish_read); + +void hw_i2c_setup_read(u8 addr, void *buff, int len, int flags) +{ + + if (len > (PAGE_SIZE - 4)) + BUG(); + + memcpy(i2c_dma_read[0].command, + &cmd_i2c_select, + sizeof(cmd_i2c_select)); + + memcpy(i2c_dma_read[1].command, + &cmd_i2c_read, + sizeof(cmd_i2c_read)); + + i2c_dma_read[0].command->next = i2c_dma_read[1].handle; + i2c_dma_read[0].command->buf_ptr = i2c_buf_phys ; + i2c_buf_virt[0] = addr | I2C_READ ; + + i2c_dma_read[1].command->cmd |= BF(len, APBX_CHn_CMD_XFER_COUNT); + + i2c_dma_read[1].command->pio_words[0] |= + BF(len, I2C_CTRL0_XFER_COUNT) | flags; + + i2c_dma_read[1].command->buf_ptr = (u32)i2c_buf_phys + 1 ; + memcpy(&i2c_buf_virt[1], buff, len); + +} +EXPORT_SYMBOL(hw_i2c_setup_read); + +void hw_i2c_run(int dir) +{ + if (dir == I2C_WRITE) + stmp3xxx_dma_go(dma_channel, &i2c_dma_write, 1); + else + stmp3xxx_dma_go(dma_channel, &i2c_dma_read[0], 1); +} +EXPORT_SYMBOL(hw_i2c_run); + +void hw_i2c_reset_dma(void) +{ + stmp3xxx_dma_reset_channel(dma_channel); + stmp3xxx_dma_clear_interrupt(dma_channel); +} +EXPORT_SYMBOL(hw_i2c_reset_dma); + + +int hw_i2c_init(struct device *dev) +{ + if (stmp3xxx_request_pin_group(dev->platform_data, "i2c")) + return -1; + + + /* Take controller out of reset */ + stmp3xxx_clearl(BM_I2C_CTRL0_SFTRST | + BM_I2C_CTRL0_CLKGATE, + REGS_I2C_BASE + HW_I2C_CTRL0); + udelay(10); + +/* * Set timing + * High time = 120 clks; read bit at 48 for 95Khz/24mhz + * Low time = 128 clks; write bit at 48 for 95khz/24mhz +*/ + +/* + Don't set 400khz by default; stfm1000 needs 100khz at the start. + __raw_writel(0x00780030, REGS_I2C_BASE + HW_I2C_TIMING0); + __raw_writel(0x001F000F, REGS_I2C_BASE + HW_I2C_TIMING1); + __raw_writel(0x0015000D, REGS_I2C_BASE + HW_I2C_TIMING2); +*/ + dev_dbg(dev, "I2C module version %x\n ", + __raw_readl(REGS_I2C_BASE + HW_I2C_VERSION)); + hw_i2c_init_dma(dev); + return 0; +} +EXPORT_SYMBOL(hw_i2c_init); + +void hw_i2c_stop(struct device *dev) +{ + stmp3xxx_setl(BM_I2C_CTRL0_SFTRST, + REGS_I2C_BASE + HW_I2C_CTRL0); + hw_i2c_reset_dma(); + hw_i2c_free_dma(dev); + stmp3xxx_release_pin_group(dev->platform_data, "i2c"); +} +EXPORT_SYMBOL(hw_i2c_stop); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/emi.S +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/emi.S @@ -0,0 +1,221 @@ +/* + * Freescale STMP378X low level RAM frequency manipulation + * + * Author: Vitaly Wool + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* TODO should be move to clock.h */ +#define SCALING_DATA_EMI_DIV_OFFSET 0 +#define SCALING_DATA_FRAC_DIV_OFFSET 4 +#define SCALING_DATA_CUR_FREQ_OFFSET 8 +#define SCALING_DATA_NEW_FREQ_OFFSET 12 + +.global cpu_arm926_switch_mm + +.align 8 +ENTRY(stmp3xxx_ram_freq_scale) + stmfd sp!, {r1 - r9, lr} + + ldr r5, [r0, #SCALING_DATA_NEW_FREQ_OFFSET] + ldr r6, [r0, #SCALING_DATA_CUR_FREQ_OFFSET] + ldr r7, [r0, #SCALING_DATA_EMI_DIV_OFFSET] + ldr r8, [r0, #SCALING_DATA_FRAC_DIV_OFFSET] + + adr r9, __stmp_temp_stack + + @ clean cache + ldr r1, __stmp_flush_cache_addr + mov lr, pc + mov pc, r1 + + @ put DRAM into self refresh + ldr r0, __stmp_dram_ctl00 + ldr r1, [r0, #0x20] + orr r1, r1, #(1 << 8) + str r1, [r0, #0x20] + @ wait for it to actually happen + ldr r0, __stmp_dram_emi00 +1: ldr r1, [r0, #0x10] + tst r1, #(1 << 1) + beq 1b + nop + + @ prepare for change + cmp r5, #24 + bgt 2f + bl stmp3xxx_ram_24M_set_timings + b 100f +2: cmp r5, #48 + bgt 3f + bl stmp3xxx_ram_48M_set_timings + b 100f +3: cmp r5, #60 + bgt 4f + bl stmp3xxx_ram_60M_set_timings + b 100f +4: cmp r5, #80 + bgt 5f + bl stmp3xxx_ram_80M_set_timings + b 100f +5: cmp r5, #96 + bgt 6f + bl stmp3xxx_ram_96M_set_timings + b 100f +6: cmp r5, #120 + bgt 7f + bl stmp3xxx_ram_120M_set_timings + b 100f +7: cmp r5, #133 + bgt 8f + bl stmp3xxx_ram_133M_set_timings + b 100f +8: bl stmp3xxx_ram_150M_set_timings + +100: + @ RAM to clk from xtal + mov r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0xFF000000) + mov r1, #(1<<6) + str r1, [r0, #4] + mov r0, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) +101: ldr r1, [r0] + tst r1, #BM_CLKCTRL_EMI_BUSY_REF_XTAL + bne 101b + + @When are using the DLL, reset the DRAM controller and DLL + @start point logic (via DLL_SHIFT_RESET and DLL_RESET). + @After changing clock dividers and loading + @the new HW_DRAM_CTL* parameters, we will wait for a new DLL_LOCK + + @todo - for DRAM's that will use DLL bypass (non DDR1) + @ we should not use DLL_RESET and DLL_SHIFT_RESET. + + mov r0, #(HW_EMI_CTRL_ADDR & 0x000000FF) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0x0000FF00) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0x00FF0000) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0xFF000000) + ldr r1, [r0] @read values of HW_EMI_CTRL into R1 + orr r1, r1, #BM_EMI_CTRL_DLL_SHIFT_RESET @Set these 2 fields. + orr r1, r1, #BM_EMI_CTRL_DLL_RESET + str r1, [r0] @write back values to HW_EMI_CTRL register. + + bl __stmp_emi_set_values + + @ EMI back to PLL + mov r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0xFF000000) + mov r1, #(1<<6) + str r1, [r0, #8] + + @ Wait for BUSY_REF_EMI, to assure new clock dividers + @ are done transferring + mov r0, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) +1: ldr r1, [r0] + tst r1, #BM_CLKCTRL_EMI_BUSY_REF_EMI + bne 1b + str r1, [r0] + +@todo - for DRAM's that will use DLL bypass (non DDR1) +@we should not use DLL_RESET and DLL_SHIFT_RESET. +@ if(HW_DRAM_CTL04.B.DLL_BYPASS_MODE==0) +@ { +@ +@ Clear the DLL_RESET and DLL_SHIFT_RESET bitfields +@ (\todo - is that necessary? +@ they were already set previously to reset +@ the controller/DLL start point, +@ so clearing should have no effect..) +@ +@ BF_CS2(EMI_CTRL, DLL_RESET, 0, DLL_SHIFT_RESET, 0); + + mov r0, #(HW_EMI_CTRL_ADDR & 0x000000FF) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0x0000FF00) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0x00FF0000) + orr r0, r0, #(HW_EMI_CTRL_ADDR & 0xFF000000) + ldr r1, [r0] + bic r1, #BM_EMI_CTRL_DLL_SHIFT_RESET + bic r1, #BM_EMI_CTRL_DLL_RESET + str r1, [r0] + +@Wait for BUSY_REF_EMI, to assure new clock dividers are done transferring. +@(\todo is that necessary. we already did this above. + mov r0, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) +66: ldr r1, [r0] + tst r1, #BM_CLKCTRL_EMI_BUSY_REF_EMI + bne 66b + +@ Wait for DLL locking. +@ while(HW_DRAM_CTL04.B.DLLLOCKREG==0); + + mov r0, #(HW_DRAM_CTL04_ADDR & 0x000000FF) + orr r0, r0, #(HW_DRAM_CTL04_ADDR & 0x0000FF00) + orr r0, r0, #(HW_DRAM_CTL04_ADDR & 0x00FF0000) + orr r0, r0, #(HW_DRAM_CTL04_ADDR & 0xFF000000) +77: ldr r1, [r0] + tst r1, #BM_DRAM_CTL04_DLLLOCKREG + beq 77b + + + @ resttore normal DRAM mode + ldr r0, __stmp_dram_ctl00 + ldr r1, [r0, #0x20] + bic r1, r1, #(1 << 8) + str r1, [r0, #0x20] + + @ wait for it to actually happen + ldr r0, __stmp_dram_emi00 +102: ldr r1, [r0, #0x10] + tst r1, #(1 << 1) + bne 102b + +@ restore regs and return + ldmfd sp!, {r1 - r9, lr} + mov pc, lr + + .space 0x100 +__stmp_temp_stack: + .word 0 + +#include "emi.inc" + +__stmp_flush_cache_addr: + .word arm926_flush_kern_cache_all + +ENTRY(stmp3xxx_ram_funcs_sz) + .word . - stmp3xxx_ram_freq_scale + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/tvenc.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/tvenc.c @@ -0,0 +1,285 @@ +/* + * Freescale STMP378X dvi panel initialization + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* #define DEBUG */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +enum { + TVENC_MODE_OFF = 0, + TVENC_MODE_NTSC, + TVENC_MODE_PAL, +}; + +/* NTSC 720x480 mode */ +#define NTSC_X_RES 720 +#define NTSC_Y_RES 480 +#define NTSC_H_BLANKING 262 +#define NTSC_V_LINES 525 + +/* PAL 720x576 mode */ +#define PAL_X_RES 720 +#define PAL_Y_RES 576 +#define PAL_H_BLANKING 274 +#define PAL_V_LINES 625 + +/* frame size */ +#define DVI_H_BLANKING(m) (m == TVENC_MODE_NTSC ? \ + NTSC_H_BLANKING : PAL_H_BLANKING) +#define DVI_V_LINES(m) (m == TVENC_MODE_NTSC ? \ + NTSC_V_LINES : PAL_V_LINES) +#define DVI_H_ACTIVE(m) (m == TVENC_MODE_NTSC ? NTSC_X_RES : PAL_X_RES) +#define DVI_V_ACTIVE(m) (m == TVENC_MODE_NTSC ? NTSC_Y_RES : PAL_Y_RES) +/* fileds range */ +#define DVI_F1_START(m) 1 +#define DVI_F1_END(m) (DVI_V_LINES(m) / 2) +#define DVI_F2_START(m) (DVI_F1_END(m) + 1) +#define DVI_F2_END(m) DVI_V_LINES(m) +/* blanking range */ +#define DVI_V1_BLANK_START(m) DVI_F1_END(m) +#define DVI_V1_BLANK_END(m) (DVI_V1_BLANK_START(m) + \ + (DVI_V_LINES(m) - DVI_V_ACTIVE(m)) / 2) +#define DVI_V2_BLANK_START(m) DVI_F2_END(m) +#define DVI_V2_BLANK_END(m) ((DVI_V2_BLANK_START(m) + \ + (DVI_V_LINES(m) - DVI_V_ACTIVE(m)) / 2 - 1) % \ + DVI_V_LINES(m)) + +static struct clk *lcd_clk; +static struct clk *clk_ref_vid; +static struct clk *clk_tv108M_ng; +static struct clk *clk_tv27M; + +static int tvenc_mode; + +static void init_tvenc_hw(int mode) +{ + /* Reset module */ + stmp3xxx_setl(BM_TVENC_CTRL_SFTRST, REGS_TVENC_BASE + HW_TVENC_CTRL); + udelay(10); + + /* Take module out of reset */ + stmp3xxx_clearl(BM_TVENC_CTRL_SFTRST | BM_TVENC_CTRL_CLKGATE, + REGS_TVENC_BASE + HW_TVENC_CTRL); + + if (mode == TVENC_MODE_NTSC) { + /* Config NTSC-M mode, 8-bit Y/C in, SYNC out */ + stmp3xxx_clearl(BM_TVENC_CONFIG_SYNC_MODE | + BM_TVENC_CONFIG_PAL_SHAPE | + BM_TVENC_CONFIG_YGAIN_SEL | + BM_TVENC_CONFIG_CGAIN, + REGS_TVENC_BASE + HW_TVENC_CONFIG); + stmp3xxx_setl(BM_TVENC_CONFIG_FSYNC_PHS | + BF(0x4, TVENC_CONFIG_SYNC_MODE), + REGS_TVENC_BASE + HW_TVENC_CONFIG); + + /* 859 pixels/line for NTSC */ + __raw_writel(857, REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET); + + __raw_writel(0x21F07C1F, REGS_TVENC_BASE + HW_TVENC_COLORSUB0); + stmp3xxx_clearl(BM_TVENC_COLORBURST_NBA | + BM_TVENC_COLORBURST_PBA, + REGS_TVENC_BASE + HW_TVENC_COLORBURST); + stmp3xxx_setl(BF(0xc8, TVENC_COLORBURST_NBA) | + BF(0, TVENC_COLORBURST_PBA), + REGS_TVENC_BASE + HW_TVENC_COLORBURST); + } else if (mode == TVENC_MODE_PAL) { + /* Config PAL-B mode, 8-bit Y/C in, SYNC out */ + stmp3xxx_clearl(BM_TVENC_CONFIG_SYNC_MODE | + BM_TVENC_CONFIG_ENCD_MODE | + BM_TVENC_CONFIG_YGAIN_SEL | + BM_TVENC_CONFIG_CGAIN | + BM_TVENC_CONFIG_FSYNC_PHS, + REGS_TVENC_BASE + HW_TVENC_CONFIG); + stmp3xxx_setl(BM_TVENC_CONFIG_PAL_SHAPE | + BF(1, TVENC_CONFIG_YGAIN_SEL) | BF(1, + TVENC_CONFIG_CGAIN) + | BF(0x1, TVENC_CONFIG_ENCD_MODE) | BF(0x4, + TVENC_CONFIG_SYNC_MODE), + REGS_TVENC_BASE + HW_TVENC_CONFIG); + + /* 863 pixels/line for PAL */ + __raw_writel(863, REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET); + + __raw_writel(0x2A098ACB, REGS_TVENC_BASE + HW_TVENC_COLORSUB0); + stmp3xxx_clearl(BM_TVENC_COLORBURST_NBA | + BM_TVENC_COLORBURST_PBA, + REGS_TVENC_BASE + HW_TVENC_COLORBURST); + stmp3xxx_setl(BF(0xd6, TVENC_COLORBURST_NBA) | + BF(0x2a, TVENC_COLORBURST_PBA), + REGS_TVENC_BASE + HW_TVENC_COLORBURST); + } + + /* Power up DAC */ + __raw_writel(BM_TVENC_DACCTRL_GAINDN | + BM_TVENC_DACCTRL_GAINUP | + BM_TVENC_DACCTRL_PWRUP1 | + BM_TVENC_DACCTRL_DUMP_TOVDD1 | + BF(3, TVENC_DACCTRL_RVAL), + REGS_TVENC_BASE + HW_TVENC_DACCTRL); + + /* set all to zero is a requirement for NTSC */ + __raw_writel(0, REGS_TVENC_BASE + HW_TVENC_MACROVISION0); + __raw_writel(0, REGS_TVENC_BASE + HW_TVENC_MACROVISION1); + __raw_writel(0, REGS_TVENC_BASE + HW_TVENC_MACROVISION2); + __raw_writel(0, REGS_TVENC_BASE + HW_TVENC_MACROVISION3); + __raw_writel(0, REGS_TVENC_BASE + HW_TVENC_MACROVISION4); +} + +static int init_panel(struct device *dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry *pentry) +{ + int ret = 0; + + lcd_clk = clk_get(dev, "lcdif"); + clk_enable(lcd_clk); + clk_set_rate(lcd_clk, 1000000 / pentry->cycle_time_ns); /* kHz */ + + clk_ref_vid = clk_get(NULL, "ref_vid"); + clk_tv108M_ng = clk_get(NULL, "tv108M_ng"); + clk_tv27M = clk_get(NULL, "tv27M"); + clk_enable(clk_ref_vid); + clk_enable(clk_tv108M_ng); + clk_enable(clk_tv27M); + + tvenc_mode = pentry->x_res == NTSC_Y_RES ? TVENC_MODE_NTSC : + TVENC_MODE_PAL; + + init_tvenc_hw(tvenc_mode); + + setup_dvi_panel(DVI_H_ACTIVE(tvenc_mode), DVI_V_ACTIVE(tvenc_mode), + DVI_H_BLANKING(tvenc_mode), DVI_V_LINES(tvenc_mode), + DVI_V1_BLANK_START(tvenc_mode), + DVI_V1_BLANK_END(tvenc_mode), + DVI_V2_BLANK_START(tvenc_mode), + DVI_V2_BLANK_END(tvenc_mode), + DVI_F1_START(tvenc_mode), DVI_F1_END(tvenc_mode), + DVI_F2_START(tvenc_mode), DVI_F2_END(tvenc_mode)); + + ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 1); + + return ret; +} + +static void release_panel(struct device *dev, + struct stmp3xxx_platform_fb_entry *pentry) +{ + release_dvi_panel(); + + stmp3xxx_lcdif_dma_release(); + + clk_disable(clk_ref_vid); + clk_disable(clk_tv108M_ng); + clk_disable(clk_tv27M); + clk_disable(lcd_clk); + clk_put(clk_ref_vid); + clk_put(clk_tv108M_ng); + clk_put(clk_tv27M); + clk_put(lcd_clk); +} + +static int blank_panel(int blank) +{ + int ret = 0, count; + + switch (blank) { + case FB_BLANK_NORMAL: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_POWERDOWN: + stmp3xxx_clearl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + /* Wait until current transfer is complete, max 30ms */ + for (count = 30000; count > 0; count--) { + if (__raw_readl(REGS_LCDIF_BASE + HW_LCDIF_STAT) & + BM_LCDIF_STAT_TXFIFO_EMPTY) + break; + udelay(1); + } + break; + + case FB_BLANK_UNBLANK: + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + break; + + default: + ret = -EINVAL; + } + return ret; +} + +static struct stmp3xxx_platform_fb_entry ntsc_fb_entry = { + .name = "tvenc_ntsc", + /* x/y swapped */ + .x_res = NTSC_Y_RES, + .y_res = NTSC_X_RES, + .bpp = 32, + /* the pix_clk should be near 27Mhz for proper syncronization */ + .cycle_time_ns = 74, + .lcd_type = STMP3XXX_LCD_PANEL_DVI, + .init_panel = init_panel, + .release_panel = release_panel, + .blank_panel = blank_panel, + .run_panel = stmp3xxx_lcdif_run, + .pan_display = stmp3xxx_lcdif_pan_display, +}; + +static struct stmp3xxx_platform_fb_entry pal_fb_entry = { + .name = "tvenc_pal", + /* x/y swapped */ + .x_res = PAL_Y_RES, + .y_res = PAL_X_RES, + .bpp = 32, + /* the pix_clk should be near 27Mhz for proper syncronization */ + .cycle_time_ns = 74, + .lcd_type = STMP3XXX_LCD_PANEL_DVI, + .init_panel = init_panel, + .release_panel = release_panel, + .blank_panel = blank_panel, + .run_panel = stmp3xxx_lcdif_run, + .pan_display = stmp3xxx_lcdif_pan_display, +}; + +static int __init register_devices(void) +{ + stmp3xxx_lcd_register_entry(&ntsc_fb_entry, + stmp3xxx_framebuffer.dev.platform_data); + stmp3xxx_lcd_register_entry(&pal_fb_entry, + stmp3xxx_framebuffer.dev.platform_data); + + return 0; +} + +subsys_initcall(register_devices); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/sleep.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/sleep.h @@ -0,0 +1,120 @@ +/* + * Deep Sleep related defines + * + * Author: Vitaly Wool + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __PM_H__ +#define __PM_H__ + +#include + +#define MMUTTB1_MASK 0x00003FE0 +#define MMUTTBC_MASK 0xFFFFFFFC + +#define LINK_OFFS 0x08 +#define MMUCTL_OFFS 0x0C +#define MMUAUXCTL_OFFS 0x10 +#define MMUCPACCESS_OFS 0x14 +#define MMUTTB_OFFS 0x18 +#define MMUPID_OFFS 0x1C +#define MMUDOMAIN_OFFS 0x20 +#define SVC_R8_OFFS 0x2C +#define SVC_SP_OFFS 0x40 +#define SVC_SPSR_OFFS 0x44 +#define FIQ_SPSR_OFFS 0x48 +#define FIQ_R8_OFFS 0x4C +#define FIQ_SP_OFFS 0x60 +#define ABT_R8_OFFS 0x68 +#define ABT_SPSR_OFFS 0x7C +#define ABT_SP_OFFS 0x80 +#define IRQ_R8_OFFS 0x88 +#define IRQ_SPSR_OFFS 0x9C +#define IRQ_SP_OFFS 0xA0 +#define UND_SPSR_OFFS 0xA8 +#define UND_SP_OFFS 0xAC +#define SYS_SPSR_OFFS 0xB4 +#define SYS_SP_OFFS 0xB8 + +#ifndef __ASSEMBLER__ +#define SLEEP_DATA_FINGERPRINT 0xdeadbeef +struct sleep_data { + u32 fingerprint; + u32 wake_addr; + u32 link_addr; + u32 mmuctl; + u32 mmuauxctl; + u32 mmucpaccess; + u32 mmuttb; + u32 mmupid; + u32 mmudomain; + u32 svc_r6; + u32 svc_r7; + u32 svc_r8; + u32 svc_r9; + u32 svc_r10; + u32 svc_r11; + u32 svc_r12; + u32 svc_sp; + u32 svc_spsr; + u32 fiq_spsr; + u32 fiq_r8; + u32 fiq_r9; + u32 fiq_r10; + u32 fiq_r11; + u32 fiq_r12; + u32 fiq_sp; + u32 fiq_lr; + u32 abt_r8; + u32 abt_r9; + u32 abt_r10; + u32 abt_r11; + u32 abt_r12; + u32 abt_spsr; + u32 abt_sp; + u32 abt_lr; + u32 irq_r8; + u32 irq_r9; + u32 irq_r10; + u32 irq_r11; + u32 irq_r12; + u32 irq_spsr; + u32 irq_sp; + u32 irq_lr; + u32 und_spsr; + u32 und_sp; + u32 und_lr; + u32 sys_spsr; + u32 sys_sp; + u32 sys_lr; + u32 pinmux[0x100]; + u32 icoll_ctrl; + union { + u32 prio[0x10]; + u32 intr[0x80]; + } icoll; + u32 clks[16]; + u32 old_c00; + u32 old_c04; +}; + +extern int stmp_s2ram_alloc_sz; +void stmp37xx_cpu_suspend(void); +extern int stmp_standby_alloc_sz; +void stmp37xx_cpu_standby(void); +void stmp3xxx_suspend_timer(void); +void stmp3xxx_resume_timer(void); + +#endif /* __ASSEMBLER__ */ +#endif /* __PM_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/stmp378x_pwm_led.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/stmp378x_pwm_led.c @@ -0,0 +1,54 @@ +/* + * Freescale STMP378X PWM LEDs pin multiplexing + * + * Author: Drew Bendetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +#define PWM_PINID(n) STMP3XXX_PINID(1, 26 + n) + +int pwm_led_pinmux_request(int pwmn, char *title) +{ + int rc = 0; + + /* PIN_FUN1 is PWM for these pins */ + rc = stmp3xxx_request_pin(PWM_PINID(pwmn), PIN_FUN1, title); + if (rc) + return rc; + + stmp3xxx_pin_voltage(PWM_PINID(pwmn), PIN_3_3V, title); + /* pwm0-3 support 4,8,12mA; pwm4 supports 8,16,24mA + * I'm forcing 8 here since it's the only one in common + */ + stmp3xxx_pin_strength(PWM_PINID(pwmn), PIN_8MA, title); + + return 0; +} +EXPORT_SYMBOL_GPL(pwm_led_pinmux_request); + +void pwm_led_pinmux_free(int pwmn, char *title) +{ + stmp3xxx_pin_voltage(PWM_PINID(pwmn), PIN_4MA, title); + stmp3xxx_pin_strength(PWM_PINID(pwmn), PIN_1_8V, title); + + stmp3xxx_release_pin(PWM_PINID(pwmn), title); +} +EXPORT_SYMBOL_GPL(pwm_led_pinmux_free); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Drew Benedetti "); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/otp.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/otp.c @@ -0,0 +1,434 @@ +/* + * Unique ID manipulation: Freescale STMP378X OTP bits read/write procedures + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static DEFINE_MUTEX(otp_mutex); +static unsigned otp_mode; +static unsigned long otp_hclk_saved; +static u32 otp_voltage_saved; + +static int otp_full; /* = 0. By default, show/set only customer bits */ +#define OTP_USER_OFFSET 0 +#define OTP_USER_SIZE 4 + +/** + * otp_wait_busy - wait for completion of operation + * + * @flags: flags that should be clear in addition to _BUSY and _ERROR + * + * Returns 0 on success or -ETIMEDOUT on error + **/ +static int otp_wait_busy(u32 flags) +{ + int count; + u32 c; + + for (count = 10000; count >= 0; count--) { + c = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CTRL); + if (!(c & (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR | flags))) + break; + cpu_relax(); + } + if (count < 0) + return -ETIMEDOUT; + return 0; +} + +/** + * otp_open - open OTP bits for read or write access + * + * @mode: either O_RDONLY or O_WRONLY + * + * Returns 0 on success, error code otherwise + **/ +static int otp_open(int mode) +{ + int r; + struct clk *hclk; + int err; + + if (!mutex_trylock(&otp_mutex)) { + printk(KERN_ERR"%s: already opened\n", __func__); + return -EAGAIN; + } + + if (mode == O_RDONLY) { + pr_debug("%s: read-only mode\n", __func__); + + r = otp_wait_busy(0); + if (r) { + err = -ETIMEDOUT; + goto out; + } + + /* 2. Set RD_BANK_OPEN */ + stmp3xxx_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, REGS_OCOTP_BASE + HW_OCOTP_CTRL); + udelay(10); + + otp_wait_busy(0); + } + + else if (mode == O_WRONLY) { + pr_debug("%s: write-only mode\n", __func__); + hclk = clk_get(NULL, "hclk"); + if (IS_ERR(hclk)) { + err = PTR_ERR(hclk); + goto out; + } + + /* + WARNING ACHTUNG UWAGA + + the code below changes HCLK clock rate to 24M. This is + required to write OTP bits (7.2.2 in STMP378x Target + Specification), and might affect LCD operation, for example. + Moreover, this hacky code changes VDDIO to 2.8V; and resto- + res it only on otp_close(). This may affect... anything. + + You are warned now. + */ + otp_hclk_saved = clk_get_rate(hclk); + clk_set_rate(hclk, 24000); + /* Set the voltage to 2.8V */ + otp_voltage_saved = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + __raw_writel( + (otp_voltage_saved & ~BM_POWER_VDDIOCTRL_TRG) | 0x00, REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + + r = otp_wait_busy(BM_OCOTP_CTRL_RD_BANK_OPEN); + if (r < 0) { + __raw_writel(otp_voltage_saved, REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + clk_set_rate(hclk, otp_hclk_saved); + clk_put(hclk); + err = -ETIMEDOUT; + goto out; + } + + clk_put(hclk); + } + + else { + pr_debug("%s: unknown mode '%d'\n", __func__, mode); + err = -EINVAL; + goto out; + } + + otp_mode = mode; + return 0; +out: + mutex_unlock(&otp_mutex); + pr_debug("%s: status %d\n", __func__, err); + return err; +} + +/** + * otp_close - close the OTP bits after opening by otp_open + **/ +static void otp_close(void) +{ + struct clk *hclk; + + if (!mutex_is_locked(&otp_mutex)) { + printk(KERN_ERR"%s: wasn't opened\n", __func__); + return; + } + + if (otp_mode == O_RDONLY) { + /* 5. clear RD_BANK_OPEN */ + stmp3xxx_clearl(BM_OCOTP_CTRL_RD_BANK_OPEN, REGS_OCOTP_BASE + HW_OCOTP_CTRL); + } + + else if (otp_mode == O_WRONLY) { + hclk = clk_get(NULL, "hclk"); + clk_set_rate(hclk, otp_hclk_saved); + __raw_writel(otp_voltage_saved, REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + otp_wait_busy(0); + stmp3xxx_setl(BM_OCOTP_CTRL_RELOAD_SHADOWS, REGS_OCOTP_BASE + HW_OCOTP_CTRL); + otp_wait_busy(BM_OCOTP_CTRL_RELOAD_SHADOWS); + } + + else { + return; /* -EINVAL. Who does really check close? */ + } + + otp_mode = 0; + mutex_unlock(&otp_mutex); +} + +/** + * otp_read_bits - read the content of OTP + * + * @start: offset from 0, in u32's + * @len: number of OTP u32's to read + * @bits: caller-allocated buffer to save bits + * @size: size of @bits + * + * Returns number of u32's saved to buffer + **/ +static size_t otp_read_bits(int start, int len, u32 *bits, size_t size) +{ + int ofs; + + BUG_ON(!mutex_is_locked(&otp_mutex)); + + /* read all stuff that caller needs */ + if (start + len > 4 * 8) /* 4 banks, 8 registers each */ + len = 4 * 8 - start; + + for (ofs = start; ofs < len; ofs++) { + if (size/sizeof(*bits) <= 0) /* we drained out the buffer */ + break; + *bits = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTn(ofs)); + bits++; + size -= sizeof(*bits); + } + + return ofs - start; /* number of u32's that we saved to buffer */ +} + +/** + * otp_write_bits - store OTP bits + * + * @offset: offset from 0, in u32's + * @data: the u32 to write + * @magic: the magic value to be stored in UNLOCK field + * + **/ +static int otp_write_bits(int offset, u32 data, u32 magic) +{ + u32 c; + int r; + + BUG_ON(!mutex_is_locked(&otp_mutex)); + + if (offset < 0 || offset > 0x1F) + return -EINVAL; + + c = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CTRL); + c &= ~BM_OCOTP_CTRL_ADDR; + c |= BF(offset, OCOTP_CTRL_ADDR); + c |= BF(magic, OCOTP_CTRL_WR_UNLOCK); + __raw_writel(c, REGS_OCOTP_BASE + HW_OCOTP_CTRL); + + __raw_writel(data, REGS_OCOTP_BASE + HW_OCOTP_DATA); + + r = otp_wait_busy(0); + if (r < 0) + return r; + + udelay(2); + return 0; +} + +static ssize_t otp_id_show(void *context, char *page, int ascii) +{ + char s[60]; + int ret; + int n, i, j, r; + u32 otp_bits[4 * 8]; + + r = otp_open(O_RDONLY); + if (r < 0) + return 0; + n = otp_read_bits(0, 4 * 8, otp_bits, sizeof(otp_bits)); + otp_close(); + + ret = 0; + + + if (ascii) { + + strcpy(page, ""); + ret = 0; + + if (otp_full) { + for (i = 0; i < 4; i++) { + + ret += sprintf(s, "Bank %d: ", i); + strcat(page, s); + + for (j = 0; j < 8; j++) { + + if (i * 4 + j > n) + break; + ret += sprintf(s, "%08X ", + otp_bits[i * 4 + j]); + strcat(page, s); + } + + strcat(page, "\n"); + ret++; + } + } else { + for (i = 0; i < OTP_USER_SIZE; i++) { + ret += sprintf(s, "%08X ", + otp_bits[i + OTP_USER_OFFSET]); + strcat(page, s); + } + strcat(page, "\n"); + ret++; + } + } else { + + if (otp_full) { + memcpy(page, otp_bits, sizeof(otp_bits)); + ret = sizeof(otp_bits); + } else { + memcpy(page, otp_bits + OTP_USER_OFFSET, + OTP_USER_SIZE * sizeof(u32)); + ret = OTP_USER_SIZE * sizeof(u32); + } + } + + return ret; +} + +static int otp_check_dry_run(const char *page, size_t count) +{ + if (count >= 3 && memcmp(page, "+++", 3) == 0) + return 3; + return 0; +} + +static ssize_t otp_id_store(void *context, const char *page, + size_t count, int ascii) +{ + int r = 0; + const char *p, *cp, *d; + unsigned long index, value; + char tmps[20]; /* subject of strtoul */ + int dry_run; + + r = otp_open(O_WRONLY); + if (r < 0) { + printk(KERN_ERR"Cannot open OTP in WRITE mode\n"); + return r; + } + + if (ascii) { + + dry_run = otp_check_dry_run(page, count); + if (dry_run > 0) + page += dry_run; + + index = 0; + cp = page; + + memset(tmps, 0, sizeof(tmps)); + + for (index = 0, cp = page; cp != NULL; index++) { + p = strchr(cp, ','); + + d = strchr(cp, ':'); + if (d && (!p || d < p)) { + strncpy(tmps, cp, + min_t(int, d - cp, sizeof(tmps) - 1)); + r = strict_strtoul(tmps, 0, &index); + if (r < 0) { + pr_debug("Cannot parse '%s'\n", tmps); + break; + } + cp = d + 1; + } + + memset(tmps, 0, sizeof(tmps)); + + if (!p) + strncpy(tmps, cp, sizeof(tmps)); + else + strncpy(tmps, cp, + min_t(int, p - cp, sizeof(tmps) - 1)); + r = strict_strtoul(tmps, 0, &value); + if (r < 0) { + pr_debug("Cannot parse '%s'\n", tmps); + break; + } + + memset(tmps, 0, sizeof(tmps)); + + cp = p ? ++p : NULL; + + if (!otp_full) { + index += OTP_USER_OFFSET; + if (index > OTP_USER_SIZE) { + printk(KERN_ERR"Cannot write at " + "offset %ld\n", index); + continue; + } + } + + r = 0; + if (!dry_run) { + pr_debug("Index %ld, value 0x%08lx\n", + index, value); + r = otp_write_bits(index, value, 0x3e77); + } else + printk(KERN_NOTICE + "Dry-run: writing 0x%08lX => [%ld]\n", + value, index); + if (r < 0) + break; + } + } else { + printk(KERN_ERR"Binary write is not supported\n"); + r = -ENOSYS; + } + otp_close(); + return (r >= 0) ? count : r; +} + +static struct uid_ops otp_ops = { + .id_show = otp_id_show, + .id_store = otp_id_store, +}; + +static int __init_or_module otp_init(void) +{ + void *p; + + mutex_init(&otp_mutex); + p = uid_provider_init("otp", &otp_ops, NULL); + if (IS_ERR(p)) + return PTR_ERR(p); + return 0; +} + +static void __exit otp_remove(void) +{ + uid_provider_remove("otp"); +} + +module_param(otp_full, int, 0600); +module_init(otp_init); +module_exit(otp_remove); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_DESCRIPTION("Unique ID: OTP"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/Kconfig @@ -0,0 +1,77 @@ +if ARCH_STMP378X + +config FB_STMP37XX_HX8238A + depends on ARCH_STMP37XX + bool "HX8238A" + ---help--- + Use HX8238A dotclock LCD panel for STMP37XX + +config FB_STMP37XX_LMS350 + depends on ARCH_STMP378X + bool "LMS350" + ---help--- + Use LMS350 dotclock LCD panel for STMP378X + +config FB_STMP37XX_LMS430 + depends on ARCH_STMP378X + bool "LMS430" + ---help--- + Use LMS430 dotclock LCD panel for STMP378X + +config FB_STMP378X_TVENC + depends on ARCH_STMP378X + bool "TVENC" + ---help--- + Use TVOUT encoder for STMP378X + +config STMP3XXX_UNIQUE_ID + bool "Support for UniqueID on boot media" + default y + +config STMP3XXX_UNIQUE_ID_OTP + bool "UniqueID on OTP" + depends on STMP3XXX_UNIQUE_ID + default y + +config STMP378X_RAM_FREQ_SCALING + bool "RAM frequency scaling support" + depends on ARCH_STMP378X + default y + +choice + prompt "Select STMP378x RAM chip" + depends on STMP378X_RAM_FREQ_SCALING + +config STMP378X_RAM_MDDR + bool "mDDR SDRAM" +config STMP378X_RAM_DDR + bool "DDR SDRAM" + +endchoice + +config DMA_ZONE_SIZE + int "DMA memory zone size" + range 0 32 + default 12 + help + This is the size in MB for the DMA zone. The DMA zone is used for + dedicated memory for large contiguous video buffers + +config VECTORS_PHY_ADDR + int "vectors address" + default 0 + help + This config set vectors table is located which physical address + +# set if we need the UTMI transceiver code +config UTMI_MXC + bool + select UTMI_MXC_OTG if USB_GADGET && USB_EHCI_HCD && USB_OTG + default y if USB_EHCI_FSL_UTMI || USB_GADGET_FSL_UTMI + +config UTMI_MXC_OTG + tristate + help + Support for USB OTG pin detect using the UTMI transceiver on STMP378xxx platforms. + +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/lcd_lms350.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/lcd_lms350.c @@ -0,0 +1,520 @@ +/* + * Freescale STMP378X Samsung LMS350 LCD panel initialization + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DOTCLK_H_ACTIVE 320 +#define DOTCLK_H_PULSE_WIDTH 3 +#define DOTCLK_HF_PORCH 5 +#define DOTCLK_HB_PORCH 4 +#define DOTCLK_H_WAIT_CNT (DOTCLK_H_PULSE_WIDTH + (3 * DOTCLK_HB_PORCH)) +#define DOTCLK_H_PERIOD (DOTCLK_H_WAIT_CNT + DOTCLK_HF_PORCH + DOTCLK_H_ACTIVE) + +#define DOTCLK_V_PULSE_WIDTH 2 +#define DOTCLK_V_ACTIVE 240 +#define DOTCLK_VF_PORCH 2 +#define DOTCLK_VB_PORCH 5 +#define DOTCLK_V_WAIT_CNT (DOTCLK_V_PULSE_WIDTH + DOTCLK_VB_PORCH) +#define DOTCLK_V_PERIOD (DOTCLK_VF_PORCH + DOTCLK_V_ACTIVE + DOTCLK_V_WAIT_CNT) + +static struct stmp3xxx_platform_bl_data bl_data; +extern struct pin_group lcd_pins; +extern unsigned lcd_spi_pins[]; + +static void spi_write(u32 val) +{ + u32 mask; + + gpio_set_value(lcd_spi_pins[SPI_MOSI], 0); + gpio_set_value(lcd_spi_pins[SPI_SCLK], 1); + gpio_set_value(lcd_spi_pins[SPI_CS], 0); + + for (mask = 0x00800000; mask != 0; mask >>= 1) { + gpio_set_value(lcd_spi_pins[SPI_SCLK], 0); + if (val & mask) + gpio_set_value(lcd_spi_pins[SPI_MOSI], 1); + else + gpio_set_value(lcd_spi_pins[SPI_MOSI], 0); + + gpio_set_value(lcd_spi_pins[SPI_SCLK], 1); + } + + udelay(10); + gpio_set_value(lcd_spi_pins[SPI_MOSI], 1); + gpio_set_value(lcd_spi_pins[SPI_SCLK], 1); + gpio_set_value(lcd_spi_pins[SPI_CS], 1); +} + +static void write_reg(u16 reg, u16 val) +{ + pr_debug("%s: writing %x to %x\n", __func__, reg, val); + spi_write(0x00740000 | reg); + spi_write(0x00760000 | val); +} + +static const unsigned short pon_seq[] = { + /* power on */ + 0x07, 0x0000, 20, + 0x12, 0x1618, 0, + 0x11, 0x222f, 0, + 0x13, 0x40ca, 0, + 0x10, 0x3108, 300, + 0x12, 0x1658, 250, + 0x01, 0x2b1d, 0, + 0x02, 0x0300, 0, + 0x03, 0xD040, 0, + 0x08, (DOTCLK_VB_PORCH + DOTCLK_V_PULSE_WIDTH) - 2, 0, + 0x09, ((DOTCLK_H_PULSE_WIDTH / 3) + DOTCLK_HB_PORCH) - 2, 0, + 0x76, 0x2213, 0, + 0x0b, 0x33e1, 0, + 0x0c, 0x0020, 0, + 0x76, 0x0000, 0, + 0x0d, 0x0000, 0, + 0x0e, 0x0000, 0, + 0x14, 0x0000, 0, + 0x15, 0x0803, 0, + 0x16, 0x0000, 0, + 0x30, 0x0209, 0, + 0x31, 0x0404, 0, + 0x32, 0x0e07, 0, + 0x33, 0x0602, 0, + 0x34, 0x0707, 0, + 0x35, 0x0707, 0, + 0x36, 0x0707, 0, + 0x37, 0x0206, 0, + 0x38, 0x0f06, 0, + 0x39, 0x0611, 20, +}; + +static const unsigned short don_seq[] = { + /* display on */ + 0x07, 0x0001, 150, + 0x07, 0x0101, 150, + 0x76, 0x2213, 0, + 0x1c, 0x6650, 0, + 0x0b, 0x33e0, 0, + 0x76, 0x0000, 0, + 0x07, 0x0103, 0, +}; + + +static const unsigned short doff_seq[] = { + /* display off */ + 0x0b, 0x33e1, 0, + 0x07, 0x0102, 150, + 0x07, 0x0100, 150, + 0x12, 0x0000, 0, + 0x10, 0x0000, 0, +}; + +static const unsigned short poff_seq[] = { + /* power off */ + /* called after display off */ + 0x07, 0x0000, 0, + 0x10, 0x0000, 0, + 0x11, 0x0000, 0, +}; + +static const unsigned short sby_seq[] = { + /* standby */ + /* called after display off */ + 0x10, 0x0001, 0 +}; + +static const unsigned short csby_seq[] = { + /* cancel standby */ + /* called after display on */ + 0x10, 0x0000, 0 +}; + +static void display_off(void) +{ + int i; + const unsigned short *seq; + + seq = doff_seq; + for (i = 0; i < ARRAY_SIZE(doff_seq); i += 3) { + write_reg(seq[i], seq[i + 1]); + if (seq[i + 2]) + udelay(seq[i + 2]); + } +} + +static void display_on(void) +{ + int i; + const unsigned short *seq; + + seq = don_seq; + for (i = 0; i < ARRAY_SIZE(don_seq); i += 3) { + write_reg(seq[i], seq[i + 1]); + if (seq[i + 2]) + udelay(seq[i + 2]); + } +} + +static void init_panel_hw(void) +{ + int i; + const unsigned short *seq; + + seq = pon_seq; + for (i = 0; i < ARRAY_SIZE(pon_seq); i += 3) { + write_reg(seq[i], seq[i + 1]); + if (seq[i + 2]) + udelay(seq[i + 2]); + } + display_on(); +} + +static int init_pinmux(void) +{ + return stmp3xxx_request_pin_group(&lcd_pins, "lcd_lms350"); +} + +static int init_pinmux_spi(void) +{ + int ret = -EINVAL; + + ret = gpio_request(lcd_spi_pins[SPI_MOSI], "lcd_lms350"); + if (ret) + goto out_1; + + ret = gpio_request(lcd_spi_pins[SPI_SCLK], "lcd_lms350"); + if (ret) + goto out_2; + ret = gpio_request(lcd_spi_pins[SPI_CS], "lcd_lms350"); + if (ret) + goto out_3; + + /* Enable these pins as outputs */ + gpio_direction_output(lcd_spi_pins[SPI_MOSI], 1); + gpio_direction_output(lcd_spi_pins[SPI_SCLK], 1); + gpio_direction_output(lcd_spi_pins[SPI_CS], 1); + + return 0; +out_3: + gpio_free(lcd_spi_pins[SPI_SCLK]); +out_2: + gpio_free(lcd_spi_pins[SPI_MOSI]); +out_1: + return ret; +} + +static void uninit_pinmux(void) +{ + stmp3xxx_release_pin_group(&lcd_pins, "lcd_lms350"); +} + +static void uninit_pinmux_spi(void) +{ + gpio_free(lcd_spi_pins[SPI_MOSI]); + gpio_free(lcd_spi_pins[SPI_SCLK]); + gpio_free(lcd_spi_pins[SPI_CS]); +} + +static struct clk *lcd_clk; + +static int init_panel(struct device *dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry *pentry) +{ + int ret = 0; + + lcd_clk = clk_get(dev, "lcdif"); + if (IS_ERR(lcd_clk)) { + ret = PTR_ERR(lcd_clk); + goto out_1; + } + ret = clk_enable(lcd_clk); + if (ret) { + clk_put(lcd_clk); + goto out_1; + } + ret = clk_set_rate(lcd_clk, + 1000000/pentry->cycle_time_ns); /* kHz */ + if (ret) { + clk_disable(lcd_clk); + clk_put(lcd_clk); + goto out_1; + } + + /* + * Make sure we do a high-to-low transition to reset the panel. + * First make it low for 100 msec, hi for 10 msec, low for 10 msec, + * then hi. + */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* low */ + mdelay(100); + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* high */ + mdelay(10); + stmp3xxx_clearl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* low */ + + /* For the Samsung, Reset must be held low at least 30 uSec + * Therefore, we'll hold it low for about 10 mSec just to be sure. + * Then we'll wait 1 mSec afterwards. + */ + mdelay(10); + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* high */ + mdelay(1); + + ret = init_pinmux(); + if (ret) + goto out_1; + ret = init_pinmux_spi(); + if (ret) + goto out_2; + init_panel_hw(); + + setup_dotclk_panel(DOTCLK_V_PULSE_WIDTH, DOTCLK_V_PERIOD, + DOTCLK_V_WAIT_CNT, DOTCLK_V_ACTIVE, + DOTCLK_H_PULSE_WIDTH, DOTCLK_H_PERIOD, + DOTCLK_H_WAIT_CNT, DOTCLK_H_ACTIVE, 0); + + ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 1); + if (ret) + goto out_3; + + stmp3xxx_lcd_set_bl_pdata(pentry->bl_data); + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry); + return 0; +out_3: + uninit_pinmux_spi(); +out_2: + uninit_pinmux(); +out_1: + return ret; +} + +static void release_panel(struct device *dev, + struct stmp3xxx_platform_fb_entry *pentry) +{ + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_RELEASE, pentry); + display_off(); + uninit_pinmux_spi(); + uninit_pinmux(); + release_dotclk_panel(); + stmp3xxx_lcdif_dma_release(); + clk_disable(lcd_clk); + clk_put(lcd_clk); +} + +static int blank_panel(int blank) +{ + int ret = 0, count; + + switch (blank) { + case FB_BLANK_NORMAL: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_POWERDOWN: + stmp3xxx_clearl(BM_LCDIF_CTRL_BYPASS_COUNT, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + for (count = 10000; count; count--) { + if (__raw_readl(REGS_LCDIF_BASE + HW_LCDIF_STAT) & BM_LCDIF_STAT_TXFIFO_EMPTY) + break; + udelay(1); + } + break; + + case FB_BLANK_UNBLANK: + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + break; + + default: + ret = -EINVAL; + } + return ret; +} + +static void stop_panel(void) +{ + stmp3xxx_lcdif_stop(); + display_off(); +} + +static void run_panel(void) +{ + display_on(); + stmp3xxx_lcdif_run(); +} + +static struct stmp3xxx_platform_fb_entry fb_entry = { + .name = "lms350", + .x_res = 240, + .y_res = 320, + .bpp = 32, + .cycle_time_ns = 200, + .lcd_type = STMP3XXX_LCD_PANEL_DOTCLK, + .init_panel = init_panel, + .release_panel = release_panel, + .blank_panel = blank_panel, + .run_panel = run_panel, + .stop_panel = stop_panel, + .pan_display = stmp3xxx_lcdif_pan_display, + .bl_data = &bl_data, +}; + +static struct clk *pwm_clk; + +static int init_bl(struct stmp3xxx_platform_bl_data *data) +{ + int ret = 0; + + pwm_clk = clk_get(NULL, "pwm"); + if (IS_ERR(pwm_clk)) { + ret = PTR_ERR(pwm_clk); + goto out; + } + clk_enable(pwm_clk); + stmp3xxx_reset_block(REGS_PWM_BASE, 1); + + ret = stmp3xxx_request_pin(PINID_PWM2, PIN_FUN1, "lcd_lms350"); + if (ret) + goto out_mux; + + stmp3xxx_pin_voltage(PINID_PWM2, PIN_8MA, "lcd_lms350"); + stmp3xxx_pin_strength(PINID_PWM2, PIN_3_3V, "lcd_lms350"); + + __raw_writel(BF(0, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), + REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(599, PWM_PERIODn_PERIOD), REGS_PWM_BASE + HW_PWM_PERIODn(2)); + stmp3xxx_setl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + + return 0; + +out_mux: + clk_put(pwm_clk); +out: + return ret; +} + +static void free_bl(struct stmp3xxx_platform_bl_data *data) +{ + __raw_writel(BF(0, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), + REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(599, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + stmp3xxx_clearl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + stmp3xxx_pin_voltage(PINID_PWM2, PIN_4MA, "lcd_lms350"); + stmp3xxx_pin_strength(PINID_PWM2, PIN_1_8V, "lcd_lms350"); + + stmp3xxx_release_pin(PINID_PWM2, "lcd_lms350"); + clk_disable(pwm_clk); + clk_put(pwm_clk); +} + +static int values[] = { 6, 9, 12, 15, 19, 24, 30, 40, 55, 75, 100 }; +static int power[] = { + 0, 1500, 3600, 6100, 10300, + 15500, 74200, 114200, 155200, + 190100, 191000 +}; + +static int bl_to_power(int br) +{ + int base; + int rem; + + if (br > 100) + br = 100; + base = power[br/10]; + rem = br % 10; + if (!rem) + return base; + else + return base + (rem * (power[br/10 + 1]) - base) / 10; +} + +static int set_bl_intensity(struct stmp3xxx_platform_bl_data *data, + struct backlight_device *bd, int suspended) +{ + int intensity = bd->props.brightness; + int scaled_int; + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + if (suspended) + intensity = 0; + + /* + * This is not too cool but what can we do? + * Luminance changes non-linearly... + */ + if (regulator_set_current_limit(data->regulator, bl_to_power(intensity), + bl_to_power(intensity))) + return -EBUSY; + + scaled_int = values[intensity/10]; + if (scaled_int < 100) { + int rem = intensity - 10 * (intensity/10); /* r = i % 10;*/ + scaled_int += rem*(values[intensity/10 + 1] - + values[intensity/10])/10; + } + __raw_writel(BF(scaled_int, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(599, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + return 0; +} + +static struct stmp3xxx_platform_bl_data bl_data = { + .bl_max_intensity = 100, + .bl_default_intensity = 50, + .bl_cons_intensity = 50, + .init_bl = init_bl, + .free_bl = free_bl, + .set_bl_intensity = set_bl_intensity, +}; + +static int __init register_devices(void) +{ + stmp3xxx_lcd_register_entry(&fb_entry, + stmp3xxx_framebuffer.dev.platform_data); + return 0; +} +subsys_initcall(register_devices); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/stmp378x_devb_rotdec.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/stmp378x_devb_rotdec.c @@ -0,0 +1,47 @@ +/* + * Freescale STMP378X Rotary Encoder module pin multiplexing + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include + +#define ROTARY_FUN PIN_FUN1 + +#define TITLE "stmp3xxx-rotdec" + +int rotdec_pinmux_request(void) +{ + int rc = 0; + + rc |= stmp3xxx_request_pin(PINID_ROTARYA, ROTARY_FUN, TITLE); + rc |= stmp3xxx_request_pin(PINID_ROTARYB, ROTARY_FUN, TITLE); + + return rc; +} +EXPORT_SYMBOL_GPL(rotdec_pinmux_request); + +void rotdec_pinmux_free(void) +{ + stmp3xxx_release_pin(PINID_ROTARYA, TITLE); + stmp3xxx_release_pin(PINID_ROTARYB, TITLE); +} +EXPORT_SYMBOL_GPL(rotdec_pinmux_free); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Drew Benedetti "); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/emi.inc +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/emi.inc @@ -0,0 +1,624 @@ +/* + * Freescale STMP378X low level RAM timings tables for Micron mDDR + * + * Author: Vitaly Wool + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +__stmp_emi_set_values: + stmfd r9!, {r0 - r4, lr} + mov r1, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r1, r1, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r1, r1, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r1, r1, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) + +@ DDC_RESNCY is deprecated at mx23 +@ mov r3, #BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE + + mov r0, #(HW_CLKCTRL_FRAC_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0xFF000000) + ldr r2, [r0] + + and r4, r2, #BM_CLKCTRL_FRAC_EMIFRAC + lsr r4, r4, #8 + /* new pll div > cur pll div? */ + cmp r4, r8 + bgt 1f + bic r4, r2, #BM_CLKCTRL_FRAC_EMIFRAC + orr r4, r4, r8, lsl #8 + str r4, [r0] + nop + nop + nop + +@ Change integer/fractional dividers. + +@ The fractional divider and integer divider must be written in such +@ an order to guarantee that when going from a lower frequency to a +@ higher frequency that any intermediate frequencies do not exceed +@ the final frequency. For this reason, we must make sure to check +@ the current divider values with the new divider values and write +@ them in the correct order. + +1: ldr r4, [r1] + and r4, r4, #BM_CLKCTRL_EMI_DIV_EMI + /* new emi div > cur emi div? */ + cmp r4, r7 + bgt 2f + mov r4, r7 + orr r4, r4, #0x100 + +@ This was for DCC_RESYNC_ENABLE, which is deprecated in mx23 +@ orr r4, r4, r3 + + str r4, [r1] +11: ldr r4, [r1] + tst r4, #BM_CLKCTRL_EMI_BUSY_REF_EMI + bne 11b + tst r4, #BM_CLKCTRL_EMI_BUSY_REF_XTAL + bne 11b + +2: ldr r2, [r0] + + and r4, r2, #BM_CLKCTRL_FRAC_EMIFRAC + lsr r4, r4, #8 + /* new pll div != cur pll div? */ + cmp r4, r8 + beq 3f + bic r4, r2, #BM_CLKCTRL_FRAC_EMIFRAC + orr r4, r4, r8, lsl #8 + str r4, [r0] + nop + nop + nop + +3: ldr r4, [r1] + and r4, r4, #BM_CLKCTRL_EMI_DIV_EMI + /* new emi div != cur emi div? */ + cmp r4, r7 + beq 4f + mov r4, r7 + orr r4, r4, #0x100 + +@ This was for DCC_RESYNC_ENABLE, which is deprecated in mx23 +@ orr r4, r4, r3 + str r4, [r1] +31: ldr r4, [r1] + tst r4, #BM_CLKCTRL_EMI_BUSY_REF_EMI + bne 31b + tst r4, #BM_CLKCTRL_EMI_BUSY_REF_XTAL + bne 31b + +4: ldmfd r9!, {r0 - r4, lr} + mov pc, lr + +stmp3xxx_ram_24M_set_timings: + ldr r0, __stmp_dram_ctl00 +#ifdef CONFIG_STMP378X_RAM_MDDR + adr r1, __stmp_dram_24M_values +#else +// 96MHz is the lowest frequency supported for DDR1. + adr r1, __stmp_dram_96M_values +#endif +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_48M_set_timings: + ldr r0, __stmp_dram_ctl00 +#ifdef CONFIG_STMP378X_RAM_MDDR + adr r1, __stmp_dram_48M_values +#else +// 96MHz is the lowest frequency supported for DDR1. + adr r1, __stmp_dram_96M_values +#endif +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_60M_set_timings: + ldr r0, __stmp_dram_ctl00 +#ifdef CONFIG_STMP378X_RAM_MDDR + adr r1, __stmp_dram_60M_values +#else +// 96MHz is the lowest frequency supported for DDR1. + adr r1, __stmp_dram_96M_values +#endif +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_80M_set_timings: + ldr r0, __stmp_dram_ctl00 +#ifdef CONFIG_STMP378X_RAM_MDDR + adr r1, __stmp_dram_80M_values +#else +// 96MHz is the lowest frequency supported for DDR1. + adr r1, __stmp_dram_96M_values +#endif +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_96M_set_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_96M_values +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_120M_set_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_120M_values +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_133M_set_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_133M_values +1: ldr r2, [r1] + ldr r3, [r1, #4] + str r3, [r0, r2, lsl #2] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +stmp3xxx_ram_150M_set_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_150M_values +1: ldr r2, [r1] + ldr r3, [r1, #4] + str r3, [r0, r2, lsl #2] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +__stmp_dram_ctl00: + .word IO_ADDRESS(0x800E0000) +__stmp_dram_emi00: + .word IO_ADDRESS(0x80020000) +__stmp_power_vdddctrl: + .word IO_ADDRESS(0x80044040) + +stmp3xxx_ram_save_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_saved_values +1: ldr r2, [r1] + mov r4, r2, lsl #2 + ldr r3, [r0, r4] + str r3, [r1, #4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +#ifdef CONFIG_STMP378X_RAM_MDDR +__stmp_dram_24M_values: + .word 4 + .word 0x01000101 + .word 7 + .word 0x01000101 + .word 12 + .word 0x02010002 + .word 13 + .word 0x06060a02 + .word 15 + .word 0x01030000 + .word 17 + .word 0x2d000102 + .word 18 + .word 0x20200000 + .word 19 + .word 0x027f1414 + .word 20 + .word 0x01021608 + .word 21 + .word 0x00000002 + .word 26 + .word 0x000000b3 + .word 32 + .word 0x00030687 + .word 33 + .word 0x00000003 + .word 34 + .word 0x000012c1 + .word 40 + .word 0x00010000 + +__stmp_dram_48M_values: + .word 4 + .word 0x01000101 + .word 7 + .word 0x01000101 + .word 13 + .word 0x06060a02 + .word 12 + .word 0x02010002 + .word 15 + .word 0x02040000 + .word 17 + .word 0x2d000104 + .word 18 + .word 0x1f1f0000 + .word 19 + .word 0x027f0a0a + .word 20 + .word 0x02030a10 + .word 21 + .word 0x00000004 + .word 26 + .word 0x0000016f + .word 32 + .word 0x00060d17 + .word 33 + .word 0x00000006 + .word 34 + .word 0x00002582 + .word 40 + .word 0x00020000 + +__stmp_dram_60M_values: +__stmp_dram_80M_values: + .word 4 + .word 0x01000101 + .word 7 + .word 0x01000101 + .word 12 + .word 0x02020002 + .word 13 + .word 0x06060a02 + .word 15 + .word 0x02040000 + .word 17 + .word 0x2d000005 + .word 18 + .word 0x1f1f0000 + .word 19 + .word 0x027f0a0a + .word 20 + .word 0x02040a10 + .word 21 + .word 0x00000006 + .word 26 + .word 0x000001cc + .word 32 + .word 0x00081060 + .word 33 + .word 0x00000008 + .word 34 + .word 0x00002ee5 + .word 40 + .word 0x00020000 + +__stmp_dram_96M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 12 + .word 0x02020002 + .word 13 + .word 0x06070a02 + .word 15 + .word 0x03050000 + .word 17 + .word 0x2d000808 + .word 18 + .word 0x1f1f0000 + .word 19 + .word 0x020c1010 + .word 20 + .word 0x0305101c + .word 21 + .word 0x00000007 + .word 26 + .word 0x000002e6 + .word 32 + .word 0x000c1a3b + .word 33 + .word 0x0000000c + .word 34 + .word 0x00004b0d + .word 40 + .word 0x00030000 + +__stmp_dram_120M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 12 + .word 0x02020002 + .word 13 + .word 0x06070a02 + .word 15 + .word 0x03050000 + .word 17 + .word 0x2300080a + .word 18 + .word 0x1f1f0000 + .word 19 + .word 0x020c1010 + .word 20 + .word 0x0306101c + .word 21 + .word 0x00000009 + .word 26 + .word 0x000003a1 + .word 32 + .word 0x000f20ca + .word 33 + .word 0x0000000f + .word 34 + .word 0x00005dca + .word 40 + .word 0x00040000 + +__stmp_dram_133M_values: +__stmp_dram_150M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 12 + .word 0x02020002 + .word 13 + .word 0x06070a02 + .word 15 + .word 0x03050000 + .word 17 + .word 0x2000080a + .word 18 + .word 0x1f1f0000 + .word 19 + .word 0x020c1010 + .word 20 + .word 0x0306101c + .word 21 + .word 0x0000000a + .word 26 + .word 0x00000408 + .word 32 + .word 0x0010245f + .word 33 + .word 0x00000010 + .word 34 + .word 0x00006808 + .word 40 + .word 0x00040000 + +#elif CONFIG_STMP378X_RAM_DDR + +__stmp_dram_96M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 11 + .word 0x00070202 + .word 12 + .word 0x02020000 @ t_wr 2, t_rrd 2, t_cke 0 + .word 13 + .word 0x04040a01 @ t_wtr 1 + .word 15 + .word 0x02040000 @ t_rp 2, t_dal 4 + .word 17 + .word 0x2f001706 @ dll_start_point 0x2f, dll_increment 0x17, t_rc 6 + .word 19 + .word 0x027f1a1a + .word 20 + .word 0x02051c21 @ t_rcd 2, t_rasmin 5, wr_dqs_shift 0x22 + .word 21 + .word 0x00000007 @ t_rfc 7 + .word 26 + .word 0x000002e6 /* 0x347b */ @ t_ref + .word 32 + .word 0x00081a3e @ t_xsnr 8, t_rasmax 0x1a3e + .word 33 + .word 0x000000c8 @ t_xsr 0xc8 + .word 34 + .word 0x00004b0d @ t_init + .word 40 + .word 0x00010000 + +__stmp_dram_120M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 11 + .word 0x00070202 + .word 12 + .word 0x02020000 @ t_wr 2, t_rrd 2, t_cke 0 + .word 13 + .word 0x04040a01 @ t_wtr 1 + .word 15 + .word 0x02040000 @ t_rp 2, t_dal 4 + .word 17 + .word 0x26001308 @ dll_start_point 0x26, dll_increment 0x13, t_rc 8 + .word 19 + .word 0x027f1a1a + .word 20 + .word 0x02061c23 @ t_rcd 2, t_rasmin 6 + .word 21 + .word 0x00000009 @ t_rfc 9 + .word 26 + .word 0x000003a1 /* 0x41a6 */ @ t_ref + .word 32 + .word 0x000a20ca @ t_xsnr 9, t_rasmax 0x20ca + .word 33 + .word 0x000000c8 @ t_xsr 0xc8 + .word 34 + .word 0x00005dca @ t_init + .word 40 + .word 0x00010000 + +__stmp_dram_133M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 + .word 11 + .word 0x00070202 + .word 12 + .word 0x02020000 + .word 13 + .word 0x04040a01 + .word 15 + .word 0x02040000 + .word 17 + .word 0x19000f08 @ t_rc 0xa + .word 19 + .word 0x02021313 + .word 20 + .word 0x02061521 + .word 21 + .word 0x0000000a + .word 26 + .word 0x000003f7 /* 0x48b9 */ + .word 32 + .word 0x000a23cd + .word 33 + .word 0x000000c8 @ t_xsr 0xc8 + .word 34 + .word 0x00006665 + .word 40 + .word 0x00010000 + +__stmp_dram_150M_values: + .word 4 + .word 0x00000101 + .word 7 + .word 0x01000001 +/* +Note that CASLAT of 0x06 means 2.5 cycles. This is needed to operate at this +frequency. HOWEVER, we would need to implement the setting of WRITEMODEREG +after setting CAS latency to assure that the new CAS latency is actually +being used in the EMI controller. Otherwise, the controller will still be +using whatever was set the first time the EMI controller was initialized. +Also, a CASLAT of 2.5 needs caslat_lin and caslat_lin_gate of 0x05 +(also 2.5 cycles). +*/ + .word 11 + .word 0x00070206 + .word 12 + .word 0x02020000 @ t_wr 2, t_rrd 2, t_cke 0 +/* + caslat_lin and caslat_lin_gate of 0x05 since CASLAT is 0x06 (2.5 cycles). See above note. +*/ + .word 13 + .word 0x05050a02 @ t_wtr 2 + .word 15 + .word 0x03060000 @ t_rp 3, t_dal 6 + .word 17 + .word 0x18000d0c @ dll_start_point 0x18, dll_increment 0xd, t_rc 0xc + .word 19 + .word 0x027f0f0f + .word 20 + .word 0x03071121 @ t_rcd 3, t_rasmin 7 + .word 21 + .word 0x0000000c @ t_rfc 0xc + .word 26 + .word 0x000001cc /* 0x20cd */ @ t_ref + .word 32 + .word 0x000c2860 @ t_xsnr 0xc, t_rasmax 0x2860 + .word 33 + .word 0x000000c8 @ t_xsr 0xc8 + .word 34 + .word 0x00007554 @ t_init + .word 40 + .word 0x00010000 + +#else +#error RAM chip not defined +#endif + +stmp3xxx_ram_restore_timings: + ldr r0, __stmp_dram_ctl00 + adr r1, __stmp_dram_saved_values +1: ldr r2, [r1] + ldr r3, [r1, #4] + mov r4, r2, lsl #2 + str r3, [r0, r4] + add r1, r1, #8 + cmp r2, #40 + bne 1b + mov pc, lr + +__stmp_dram_saved_values: + .word 4 + .word 0 + .word 7 + .word 0 + .word 12 + .word 0 + .word 13 + .word 0 + .word 15 + .word 0 + .word 17 + .word 0 + .word 18 + .word 0 + .word 19 + .word 0 + .word 20 + .word 0 + .word 21 + .word 0 + .word 26 + .word 0 + .word 32 + .word 0 + .word 33 + .word 0 + .word 34 + .word 0 + .word 40 + .word 0 + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/lcd_lms430.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/lcd_lms430.c @@ -0,0 +1,363 @@ +/* + * Freescale STMP378X Samsung LMS430 LCD panel initialization + * + * Embedded Alley Solutions, Inc + * + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DOTCLK_H_ACTIVE 480 +#define DOTCLK_H_PULSE_WIDTH 1 +#define DOTCLK_HF_PORCH 8 +#define DOTCLK_HB_PORCH 15 +#define DOTCLK_H_WAIT_CNT (DOTCLK_H_PULSE_WIDTH + (3 * DOTCLK_HB_PORCH)) +#define DOTCLK_H_PERIOD (DOTCLK_H_WAIT_CNT + DOTCLK_HF_PORCH + DOTCLK_H_ACTIVE) + +#define DOTCLK_V_PULSE_WIDTH 1 +#define DOTCLK_V_ACTIVE 272 +#define DOTCLK_VF_PORCH 4 +#define DOTCLK_VB_PORCH 12 +#define DOTCLK_V_WAIT_CNT (DOTCLK_V_PULSE_WIDTH + DOTCLK_VB_PORCH) +#define DOTCLK_V_PERIOD (DOTCLK_VF_PORCH + DOTCLK_V_ACTIVE + DOTCLK_V_WAIT_CNT) + +static struct stmp3xxx_platform_bl_data bl_data; +extern struct pin_group lcd_pins; +extern unsigned lcd_spi_pins[]; + +static int init_pinmux(void) +{ + return stmp3xxx_request_pin_group(&lcd_pins, "lcd_lms430"); +} + +static int init_pinmux_spi(void) +{ + int ret = -EINVAL; + + ret = gpio_request(lcd_spi_pins[SPI_MOSI], "lcd_lms430"); + if (ret) + goto out_1; + + ret = gpio_request(lcd_spi_pins[SPI_SCLK], "lcd_lms430"); + if (ret) + goto out_2; + ret = gpio_request(lcd_spi_pins[SPI_CS], "lcd_lms430"); + if (ret) + goto out_3; + + /* Enable these pins as outputs */ + gpio_direction_output(lcd_spi_pins[SPI_MOSI], 1); + gpio_direction_output(lcd_spi_pins[SPI_SCLK], 1); + gpio_direction_output(lcd_spi_pins[SPI_CS], 1); + + return 0; +out_3: + gpio_free(lcd_spi_pins[SPI_SCLK]); +out_2: + gpio_free(lcd_spi_pins[SPI_MOSI]); +out_1: + return ret; +} + +static void uninit_pinmux(void) +{ + stmp3xxx_release_pin_group(&lcd_pins, "lcd_lms430"); +} + +static void uninit_pinmux_spi(void) +{ + gpio_free(lcd_spi_pins[SPI_MOSI]); + gpio_free(lcd_spi_pins[SPI_SCLK]); + gpio_free(lcd_spi_pins[SPI_CS]); +} + +static struct clk *lcd_clk; + +static int init_panel(struct device *dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry *pentry) +{ + int ret = 0; + + lcd_clk = clk_get(dev, "lcdif"); + if (IS_ERR(lcd_clk)) { + ret = PTR_ERR(lcd_clk); + goto out_1; + } + ret = clk_enable(lcd_clk); + if (ret) { + clk_put(lcd_clk); + goto out_1; + } + ret = clk_set_rate(lcd_clk, 1000000 / pentry->cycle_time_ns); /* kHz */ + if (ret) { + clk_disable(lcd_clk); + clk_put(lcd_clk); + goto out_1; + } + + /* + * Make sure we do a high-to-low transition to reset the panel. + * First make it low for 100 msec, hi for 10 msec, low for 10 msec, + * then hi. + */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* low */ + mdelay(100); + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* high */ + mdelay(10); + stmp3xxx_clearl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* low */ + + /* For the Samsung, Reset must be held low at least 30 uSec + * Therefore, we'll hold it low for about 10 mSec just to be sure. + * Then we'll wait 1 mSec afterwards. + */ + mdelay(10); + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); /* high */ + mdelay(1); + + ret = init_pinmux(); + if (ret) + goto out_1; + ret = init_pinmux_spi(); + if (ret) + goto out_2; + + setup_dotclk_panel(DOTCLK_V_PULSE_WIDTH, DOTCLK_V_PERIOD, + DOTCLK_V_WAIT_CNT, DOTCLK_V_ACTIVE, + DOTCLK_H_PULSE_WIDTH, DOTCLK_H_PERIOD, + DOTCLK_H_WAIT_CNT, DOTCLK_H_ACTIVE, 0); + + ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 1); + if (ret) + goto out_3; + + stmp3xxx_lcd_set_bl_pdata(pentry->bl_data); + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry); + return 0; +out_3: + uninit_pinmux_spi(); +out_2: + uninit_pinmux(); +out_1: + return ret; +} + +static void release_panel(struct device *dev, + struct stmp3xxx_platform_fb_entry *pentry) +{ + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_RELEASE, pentry); + uninit_pinmux_spi(); + uninit_pinmux(); + release_dotclk_panel(); + stmp3xxx_lcdif_dma_release(); + clk_disable(lcd_clk); + clk_put(lcd_clk); +} + +static int blank_panel(int blank) +{ + int ret = 0, count; + + switch (blank) { + case FB_BLANK_NORMAL: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_POWERDOWN: + stmp3xxx_clearl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + for (count = 10000; count; count--) { + if (__raw_readl(REGS_LCDIF_BASE + HW_LCDIF_STAT) & + BM_LCDIF_STAT_TXFIFO_EMPTY) + break; + udelay(1); + } + break; + + case FB_BLANK_UNBLANK: + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + break; + + default: + ret = -EINVAL; + } + return ret; +} + +static struct stmp3xxx_platform_fb_entry fb_entry = { + .name = "lms430", + .x_res = 272, + .y_res = 480, + .bpp = 32, + .cycle_time_ns = 150, + .lcd_type = STMP3XXX_LCD_PANEL_DOTCLK, + .init_panel = init_panel, + .release_panel = release_panel, + .blank_panel = blank_panel, + .run_panel = stmp3xxx_lcdif_run, + .stop_panel = stmp3xxx_lcdif_stop, + .pan_display = stmp3xxx_lcdif_pan_display, + .bl_data = &bl_data, +}; + +static struct clk *pwm_clk; + +static int init_bl(struct stmp3xxx_platform_bl_data *data) +{ + int ret = 0; + + pwm_clk = clk_get(NULL, "pwm"); + if (IS_ERR(pwm_clk)) { + ret = PTR_ERR(pwm_clk); + goto out; + } + clk_enable(pwm_clk); + stmp3xxx_reset_block(REGS_PWM_BASE, 1); + + ret = stmp3xxx_request_pin(PINID_PWM2, PIN_FUN1, "lcd_lms430"); + if (ret) + goto out_mux; + + stmp3xxx_pin_voltage(PINID_PWM2, PIN_8MA, "lcd_lms430"); + stmp3xxx_pin_strength(PINID_PWM2, PIN_3_3V, "lcd_lms430"); + + __raw_writel(BF(0, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(599, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + stmp3xxx_setl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + + return 0; + +out_mux: + clk_put(pwm_clk); +out: + return ret; +} + +static void free_bl(struct stmp3xxx_platform_bl_data *data) +{ + __raw_writel(BF(0, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), + REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(599, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + stmp3xxx_clearl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + stmp3xxx_pin_voltage(PINID_PWM2, PIN_4MA, "lcd_lms430"); + stmp3xxx_pin_strength(PINID_PWM2, PIN_1_8V, "lcd_lms430"); + + stmp3xxx_release_pin(PINID_PWM2, "lcd_lms430"); + clk_disable(pwm_clk); + clk_put(pwm_clk); +} + +static int values[] = { 0, 4, 9, 14, 20, 27, 35, 45, 57, 75, 100 }; + +static int power[] = { + 0, 1500, 3600, 6100, 10300, + 15500, 74200, 114200, 155200, + 190100, 191000 +}; + +static int bl_to_power(int br) +{ + int base; + int rem; + + if (br > 100) + br = 100; + base = power[br / 10]; + rem = br % 10; + if (!rem) + return base; + else + return base + (rem * (power[br / 10 + 1]) - base) / 10; +} + +static int set_bl_intensity(struct stmp3xxx_platform_bl_data *data, + struct backlight_device *bd, int suspended) +{ + int intensity = bd->props.brightness; + int scaled_int; + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + if (suspended) + intensity = 0; + + /* + * This is not too cool but what can we do? + * Luminance changes non-linearly... + */ + if (regulator_set_current_limit + (data->regulator, bl_to_power(intensity), bl_to_power(intensity))) + return -EBUSY; + + scaled_int = values[intensity / 10]; + if (scaled_int < 100) { + int rem = intensity - 10 * (intensity / 10); /* r = i % 10; */ + scaled_int += rem * (values[intensity / 10 + 1] - + values[intensity / 10]) / 10; + } + __raw_writel(BF(scaled_int, PWM_ACTIVEn_INACTIVE) | + BF(0, PWM_ACTIVEn_ACTIVE), + REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(6, PWM_PERIODn_CDIV) | /* divide by 64 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(399, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + return 0; +} + +static struct stmp3xxx_platform_bl_data bl_data = { + .bl_max_intensity = 100, + .bl_default_intensity = 50, + .bl_cons_intensity = 50, + .init_bl = init_bl, + .free_bl = free_bl, + .set_bl_intensity = set_bl_intensity, +}; + +static int __init register_devices(void) +{ + stmp3xxx_lcd_register_entry(&fb_entry, + stmp3xxx_framebuffer.dev.platform_data); + return 0; +} + +subsys_initcall(register_devices); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/stmp378x_devb.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/stmp378x_devb.c @@ -3,7 +3,7 @@ * * Embedded Alley Solutions, Inc * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -32,8 +33,10 @@ #include #include #include -#include #include +#include +#include +#include #include "stmp378x.h" @@ -53,8 +56,22 @@ &stmp3xxx_battery, &stmp378x_pxp, &stmp378x_i2c, + &stmp3xxx_spdif, + &stmp378x_audio, + &stmp3xxx_viim, }; +int usb_host_wakeup_irq(struct device *wkup_dev) +{ + return 0; +} +EXPORT_SYMBOL(usb_host_wakeup_irq); + +void usb_host_set_wakeup(struct device *wkup_dev, bool para) +{ +} +EXPORT_SYMBOL(usb_host_set_wakeup); + static struct pin_desc i2c_pins_desc[] = { { PINID_I2C_SCL, PIN_FUN1, PIN_4MA, PIN_3_3V, 0 }, { PINID_I2C_SDA, PIN_FUN1, PIN_4MA, PIN_3_3V, 0 }, @@ -77,14 +94,14 @@ }, }; -static int dbguart_pins_control(int id, int request) +static int dbguart_pinmux(int request, int id) { int r = 0; if (request) - r = stmp3xxx_request_pin_group(&dbguart_pins[id], "debug uart"); + r = stmp3xxx_request_pin_group(&dbguart_pins[id], "dbguart"); else - stmp3xxx_release_pin_group(&dbguart_pins[id], "debug uart"); + stmp3xxx_release_pin_group(&dbguart_pins[id], "dbguart"); return r; } @@ -104,104 +121,6 @@ #endif }; -static struct pin_desc mmc_pins_desc[] = { - { PINID_SSP1_DATA0, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, - { PINID_SSP1_DATA1, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, - { PINID_SSP1_DATA2, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, - { PINID_SSP1_DATA3, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, - { PINID_SSP1_CMD, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, - { PINID_SSP1_SCK, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, - { PINID_SSP1_DETECT, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, -}; - -static struct pin_group mmc_pins = { - .pins = mmc_pins_desc, - .nr_pins = ARRAY_SIZE(mmc_pins_desc), -}; - -static int stmp3xxxmmc_get_wp(void) -{ - return gpio_get_value(PINID_PWM4); -} - -static int stmp3xxxmmc_hw_init_ssp1(void) -{ - int ret; - - ret = stmp3xxx_request_pin_group(&mmc_pins, "mmc"); - if (ret) - goto out; - - /* Configure write protect GPIO pin */ - ret = gpio_request(PINID_PWM4, "mmc wp"); - if (ret) - goto out_wp; - - gpio_direction_input(PINID_PWM4); - - /* Configure POWER pin as gpio to drive power to MMC slot */ - ret = gpio_request(PINID_PWM3, "mmc power"); - if (ret) - goto out_power; - - gpio_direction_output(PINID_PWM3, 0); - mdelay(100); - - return 0; - -out_power: - gpio_free(PINID_PWM4); -out_wp: - stmp3xxx_release_pin_group(&mmc_pins, "mmc"); -out: - return ret; -} - -static void stmp3xxxmmc_hw_release_ssp1(void) -{ - gpio_free(PINID_PWM3); - gpio_free(PINID_PWM4); - stmp3xxx_release_pin_group(&mmc_pins, "mmc"); -} - -static void stmp3xxxmmc_cmd_pullup_ssp1(int enable) -{ - stmp3xxx_pin_pullup(PINID_SSP1_CMD, enable, "mmc"); -} - -static unsigned long -stmp3xxxmmc_setclock_ssp1(void __iomem *base, unsigned long hz) -{ - struct clk *ssp, *parent; - char *p; - long r; - - ssp = clk_get(NULL, "ssp"); - - /* using SSP1, no timeout, clock rate 1 */ - writel(BF(2, SSP_TIMING_CLOCK_DIVIDE) | - BF(0xFFFF, SSP_TIMING_TIMEOUT), - base + HW_SSP_TIMING); - - p = (hz > 1000000) ? "io" : "osc_24M"; - parent = clk_get(NULL, p); - clk_set_parent(ssp, parent); - r = clk_set_rate(ssp, 2 * hz / 1000); - clk_put(parent); - clk_put(ssp); - - return hz; -} - -static struct stmp3xxxmmc_platform_data mmc_data = { - .hw_init = stmp3xxxmmc_hw_init_ssp1, - .hw_release = stmp3xxxmmc_hw_release_ssp1, - .get_wp = stmp3xxxmmc_get_wp, - .cmd_pullup = stmp3xxxmmc_cmd_pullup_ssp1, - .setclock = stmp3xxxmmc_setclock_ssp1, -}; - - static struct pin_group appuart_pins[] = { [0] = { .pins = appuart_pins_0, @@ -213,6 +132,15 @@ }, }; +static int appuart_pinmux(int req, int id) +{ + if (req) + return stmp3xxx_request_pin_group(&appuart_pins[id], "appuart"); + else + stmp3xxx_release_pin_group(&appuart_pins[id], "appuart"); + return 0; +} + static struct pin_desc ssp1_pins_desc[] = { { PINID_SSP1_SCK, PIN_FUN1, PIN_8MA, PIN_3_3V, 0, }, { PINID_SSP1_CMD, PIN_FUN1, PIN_4MA, PIN_3_3V, 0, }, @@ -265,26 +193,123 @@ .nr_pins = ARRAY_SIZE(gpmi_pins_desc), }; -static struct mtd_partition gpmi_partitions[] = { - [0] = { - .name = "boot", - .size = 10 * SZ_1M, - .offset = 0, - }, - [1] = { - .name = "data", - .size = MTDPART_SIZ_FULL, - .offset = MTDPART_OFS_APPEND, - }, -}; +static int gpmi_pinmux_handler(bool request) +{ + if (request) + return stmp3xxx_request_pin_group(&gpmi_pins, "gpmi"); + else + stmp3xxx_release_pin_group(&gpmi_pins, "gpmi"); + return 0; +} + +/* Stay away from the Unique ID - this will be going away soon. */ + +#if defined(CONFIG_STMP3XXX_UNIQUE_ID) +#define UID_SIZE SZ_1M +#define UID_OFFSET (20*SZ_1M) +#endif + +/* + * Platform-specific information the GPMI driver will need. + */ + +static const char *gpmi_partition_source_types[] = { "cmdlinepart", NULL }; static struct gpmi_platform_data gpmi_data = { - .pins = &gpmi_pins, - .nr_parts = ARRAY_SIZE(gpmi_partitions), - .parts = gpmi_partitions, - .part_types = { "cmdline", NULL }, + .io_uA = 70000, + .min_prop_delay_in_ns = 5, + .max_prop_delay_in_ns = 9, + .pinmux_handler = gpmi_pinmux_handler, + .boot_area_size_in_bytes = 20 * SZ_1M, + .partitions = 0, + .partition_count = 0, + .partition_source_types = gpmi_partition_source_types, +#if defined(CONFIG_STMP3XXX_UNIQUE_ID) + /* Stay away from the Unique ID - this will be going away soon. */ + .uid_offset = UID_OFFSET, + .uid_size = UID_SIZE, +#endif }; +static struct pin_desc lcd_hx8238a_desc[] = { + { PINID_LCD_D00, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D01, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D02, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D03, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D04, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D05, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D06, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D07, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D08, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D09, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D10, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D11, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D12, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D13, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D14, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D15, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D16, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_D17, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_RESET, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_VSYNC, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_HSYNC, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_ENABLE, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_LCD_DOTCK, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D13, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D12, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D11, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D10, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D09, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, + { PINID_GPMI_D08, PIN_FUN2, PIN_8MA, PIN_3_3V, 0 }, +}; + +struct pin_group lcd_pins = { + .pins = lcd_hx8238a_desc, + .nr_pins = ARRAY_SIZE(lcd_hx8238a_desc), +}; + +unsigned lcd_spi_pins[] = { + [SPI_MOSI] = PINID_LCD_WR, + [SPI_SCLK] = PINID_LCD_RS, + [SPI_CS] = PINID_LCD_CS, +}; + +static struct pin_desc spdif_pins_desc[] = { + { PINID_ROTARYA, PIN_FUN3, PIN_4MA, PIN_1_8V, 0, }, +}; + +struct pin_group spdif_pins = { + .pins = spdif_pins_desc, + .nr_pins = ARRAY_SIZE(spdif_pins_desc), +}; + +int spdif_pinmux(int req) +{ + if (req) + return stmp3xxx_request_pin_group(&spdif_pins, "spdif"); + else + stmp3xxx_release_pin_group(&spdif_pins, "spdif"); + return 0; +} +EXPORT_SYMBOL_GPL(spdif_pinmux); + +static struct stmp3xxxmmc_platform_data mmc_data = { + .hw_init = stmp3xxxmmc_hw_init_ssp1, + .hw_release = stmp3xxxmmc_hw_release_ssp1, + .get_wp = stmp3xxxmmc_get_wp, + .cmd_pullup = stmp3xxxmmc_cmd_pullup_ssp1, + .setclock = stmp3xxxmmc_setclock_ssp1, + .read_uA = 50000, + .write_uA = 70000, +}; + +extern int stmp37xx_spi_enc_init(void *); +extern int stmp37xx_spi_enc_release(void *); +static struct stmp37xx_spi_platform_data enc_data = { + .irq_pin = PINID_SSP1_DATA1, + .hw_init = stmp37xx_spi_enc_init, + .hw_release = stmp37xx_spi_enc_release, +}; static struct spi_board_info spi_board_info[] __initdata = { #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) { @@ -292,11 +317,52 @@ .max_speed_hz = 6 * 1000 * 1000, .bus_num = 1, .chip_select = 0, - .platform_data = NULL, + .platform_data = &enc_data, }, #endif }; +/* battery info data */ +static ddi_bc_Cfg_t battery_data = { + .u32StateMachinePeriod = 100, /* ms */ + .u16CurrentRampSlope = 75, /* mA/s */ + .u16ConditioningThresholdVoltage = 2900, /* mV */ + .u16ConditioningMaxVoltage = 3000, /* mV */ + .u16ConditioningCurrent = 60, /* mA */ + .u32ConditioningTimeout = 4*60*60*1000, /* ms (4 hours) */ + .u16ChargingVoltage = 4200, /* mV */ + /* FIXME: the current comparator could have h/w bugs in current + * detection through POWER_STS.CHRGSTS bit */ + .u16ChargingCurrent = 600, /* mA 600 */ + .u16ChargingThresholdCurrent = 60, /* mA 60 */ + .u32ChargingTimeout = 4*60*60*1000,/* ms (4 hours) */ + .u32TopOffPeriod = 30*60*1000, /* ms (30 minutes) */ + .monitorDieTemp = 1, /* Monitor the die */ + .u8DieTempHigh = 75, /* deg centigrade */ + .u8DieTempLow = 65, /* deg centigrade */ + .u16DieTempSafeCurrent = 0, /* mA */ + .monitorBatteryTemp = 0, /* Monitor the battery*/ + .u8BatteryTempChannel = 1, /* LRADC 1 */ + .u16BatteryTempHigh = 642, /* Unknown units */ + .u16BatteryTempLow = 497, /* Unknown units */ + .u16BatteryTempSafeCurrent = 0, /* mA */ +}; + +static struct stmpkbd_keypair keyboard_data[] = { + { 100, KEY_F4 }, + { 306, KEY_F5 }, + { 626, KEY_F6 }, + { 932, KEY_F7 }, + { 1260, KEY_F8 }, + { 1584, KEY_F9 }, + { 1907, KEY_F10 }, + { 2207, KEY_F11 }, + { 2525, KEY_F12 }, + { 2831, KEY_F13}, + { 3134, KEY_F14 }, + { -1, 0 }, +}; + static void __init stmp378x_devb_init(void) { stmp3xxx_pinmux_init(NR_REAL_IRQS); @@ -304,13 +370,15 @@ /* init stmp3xxx platform */ stmp3xxx_init(); - stmp3xxx_dbguart.dev.platform_data = dbguart_pins_control; - stmp3xxx_appuart.dev.platform_data = appuart_pins; - stmp3xxx_mmc.dev.platform_data = &mmc_data; + stmp3xxx_dbguart.dev.platform_data = dbguart_pinmux; + stmp3xxx_appuart.dev.platform_data = appuart_pinmux; stmp3xxx_gpmi.dev.platform_data = &gpmi_data; + stmp3xxx_mmc.dev.platform_data = &mmc_data; stmp3xxx_spi1.dev.platform_data = &ssp1_pins; stmp3xxx_spi2.dev.platform_data = &ssp2_pins; stmp378x_i2c.dev.platform_data = &i2c_pins; + stmp3xxx_battery.dev.platform_data = &battery_data; + stmp3xxx_keyboard.dev.platform_data = &keyboard_data; /* register spi devices */ spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/stmp378x.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/stmp378x.c @@ -3,7 +3,7 @@ * * Embedded Alley Solutions, Inc * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -42,6 +42,7 @@ #include #include #include +#include #include "stmp378x.h" /* @@ -64,14 +65,14 @@ { /* IRQ disable */ stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE, - REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10); + REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn(irq)); } static void stmp378x_unmask_irq(unsigned int irq) { /* IRQ enable */ stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE, - REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10); + REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn(irq)); } static struct irq_chip stmp378x_chip = { @@ -238,6 +239,11 @@ static u64 common_dmamask = DMA_BIT_MASK(32); +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + /* * devices that are present only on stmp378x, not on all 3xxx boards: * PxP @@ -247,7 +253,7 @@ { .flags = IORESOURCE_MEM, .start = REGS_PXP_PHYS, - .end = REGS_PXP_PHYS + REGS_PXP_SIZE, + .end = REGS_PXP_PHYS + REGS_PXP_SIZE - 1, }, { .flags = IORESOURCE_IRQ, .start = IRQ_PXP, @@ -259,6 +265,7 @@ .name = "stmp3xxx-pxp", .id = -1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -274,7 +281,7 @@ }, { .flags = IORESOURCE_MEM, .start = REGS_I2C_PHYS, - .end = REGS_I2C_PHYS + REGS_I2C_SIZE, + .end = REGS_I2C_PHYS + REGS_I2C_SIZE - 1, }, { .flags = IORESOURCE_DMA, .start = STMP3XXX_DMA(3, STMP3XXX_BUS_APBX), @@ -286,6 +293,7 @@ .name = "i2c_stmp3xxx", .id = 0, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -293,7 +301,27 @@ .num_resources = ARRAY_SIZE(i2c_resources), }; +struct platform_device stmp378x_audio = { + .name = "stmp378x-audio", + .id = -1, + .dev = { + .release = mxc_nop_release, + }, +}; + void __init stmp378x_map_io(void) { iotable_init(stmp378x_io_desc, ARRAY_SIZE(stmp378x_io_desc)); } + +int get_evk_board_version() +{ + int boardid; + boardid = __raw_readl(REGS_OCOTP_BASE + HW_OCOTP_CUSTCAP); + boardid &= 0x30000000; + boardid = boardid >> 28; + + return boardid; +} + +EXPORT_SYMBOL_GPL(get_evk_board_version); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/persistent.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/persistent.c @@ -0,0 +1,257 @@ +/* + * Freescale STMP378X Persistent bits manipulation driver + * + * Author: Pantelis Antoniou + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct stmp3xxx_persistent_data { + struct device *dev; + struct stmp3xxx_platform_persistent_data *pdata; + int count; + struct attribute_group attr_group; + /* attribute ** follow */ + /* device_attribute follow */ +}; + +#define pd_attribute_ptr(x) \ + ((struct attribute **)((x) + 1)) +#define pd_device_attribute_ptr(x) \ + ((struct device_attribute *)(pd_attribute_ptr(x) + (x)->count + 1)) + +static inline u32 persistent_reg_read(int reg) +{ + u32 msk; + + /* wait for stable value */ + msk = BF(0x01 << reg, RTC_STAT_STALE_REGS); + while (__raw_readl(REGS_RTC_BASE + HW_RTC_STAT) & msk) + cpu_relax(); + + return __raw_readl(REGS_RTC_BASE + 0x60 + (reg * 0x10)); +} + +static inline void persistent_reg_wait_settle(int reg) +{ + u32 msk; + + /* wait until the change is propagated */ + msk = BF(0x01 << reg, RTC_STAT_NEW_REGS); + while (__raw_readl(REGS_RTC_BASE + HW_RTC_STAT) & msk) + cpu_relax(); +} + +static inline void persistent_reg_write(u32 val, int reg) +{ + __raw_writel(val, REGS_RTC_BASE + 0x60 + (reg * 0x10)); + persistent_reg_wait_settle(reg); +} + +static inline void persistent_reg_set(u32 val, int reg) +{ + __raw_writel(val, REGS_RTC_BASE + 0x60 + (reg * 0x10) + 0x4); + persistent_reg_wait_settle(reg); +} + +static inline void persistent_reg_clr(u32 val, int reg) +{ + __raw_writel(val, REGS_RTC_BASE + 0x60 + (reg * 0x10) + 0x8); + persistent_reg_wait_settle(reg); +} + +static inline void persistent_reg_tog(u32 val, int reg) +{ + __raw_writel(val, REGS_RTC_BASE + 0x60 + (reg * 0x10) + 0xc); + persistent_reg_wait_settle(reg); +} + +static ssize_t +persistent_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct stmp3xxx_persistent_data *pd = platform_get_drvdata(pdev); + struct device_attribute *devattr = pd_device_attribute_ptr(pd); + const struct stmp3xxx_persistent_bit_config *pb; + int idx; + u32 val; + + idx = attr - devattr; + if ((unsigned int)idx >= pd->count) + return -EINVAL; + + pb = &pd->pdata->bit_config_tab[idx]; + + /* read value and shift */ + val = persistent_reg_read(pb->reg); + val >>= pb->start; + val &= (1 << pb->width) - 1; + + return sprintf(buf, "%u\n", val); +} + +static ssize_t +persistent_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct platform_device *pdev = to_platform_device(dev); + struct stmp3xxx_persistent_data *pd = platform_get_drvdata(pdev); + struct device_attribute *devattr = pd_device_attribute_ptr(pd); + const struct stmp3xxx_persistent_bit_config *pb; + int idx, r; + unsigned long val, msk; + + idx = attr - devattr; + if ((unsigned int)idx >= pd->count) + return -EINVAL; + + pb = &pd->pdata->bit_config_tab[idx]; + + /* get value to write */ + r = strict_strtoul(buf, 10, &val); + if (r != 0) + return r; + + /* verify it fits */ + if ((unsigned int)val > (1 << pb->width) - 1) + return -EINVAL; + + /* lockless update, first clear the area */ + msk = ((1 << pb->width) - 1) << pb->start; + persistent_reg_clr(msk, pb->reg); + + /* shift into position */ + val <<= pb->start; + persistent_reg_set(val, pb->reg); + + return count; +} + + +static int __devinit stmp3xxx_persistent_probe(struct platform_device *pdev) +{ + struct stmp3xxx_persistent_data *pd; + struct stmp3xxx_platform_persistent_data *pdata; + const struct stmp3xxx_persistent_bit_config *pb; + struct attribute **attr; + struct device_attribute *devattr; + int i, cnt, size; + int err; + + pdata = pdev->dev.platform_data; + if (pdata == NULL) + return -ENODEV; + + cnt = pdata->bit_config_cnt; + size = sizeof(*pd) + + (cnt + 1) * sizeof(struct atrribute *) + + cnt * sizeof(struct device_attribute); + pd = kzalloc(size, GFP_KERNEL); + if (pd == NULL) + return -ENOMEM; + pd->dev = &pdev->dev; + pd->pdata = pdata; + platform_set_drvdata(pdev, pd); + pd->count = cnt; + attr = pd_attribute_ptr(pd); + devattr = pd_device_attribute_ptr(pd); + + /* build the attributes structures */ + pd->attr_group.attrs = attr; + pb = pdata->bit_config_tab; + for (i = 0; i < cnt; i++) { + devattr[i].attr.name = pb[i].name; + devattr[i].attr.mode = S_IWUSR | S_IRUGO; + devattr[i].show = persistent_show; + devattr[i].store = persistent_store; + attr[i] = &devattr[i].attr; + } + + err = sysfs_create_group(&pdev->dev.kobj, &pd->attr_group); + if (err != 0) { + platform_set_drvdata(pdev, NULL); + kfree(pd); + return err; + } + + return 0; +} + +static int stmp3xxx_persistent_remove(struct platform_device *pdev) +{ + struct stmp3xxx_persistent_data *pd; + + pd = platform_get_drvdata(pdev); + sysfs_remove_group(&pdev->dev.kobj, &pd->attr_group); + platform_set_drvdata(pdev, NULL); + kfree(pd); + + return 0; +} + +#ifdef CONFIG_PM +static int +stmp3xxx_persistent_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int stmp3xxx_persistent_resume(struct platform_device *pdev) +{ + return 0; +} +#else +#define stmp3xxx_persistent_suspend NULL +#define stmp3xxx_persistent_resume NULL +#endif + +static struct platform_driver stmp3xxx_persistent_driver = { + .probe = stmp3xxx_persistent_probe, + .remove = stmp3xxx_persistent_remove, + .suspend = stmp3xxx_persistent_suspend, + .resume = stmp3xxx_persistent_resume, + .driver = { + .name = "stmp3xxx-persistent", + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxx_persistent_init(void) +{ + return platform_driver_register(&stmp3xxx_persistent_driver); +} + +static void __exit stmp3xxx_persistent_exit(void) +{ + platform_driver_unregister(&stmp3xxx_persistent_driver); +} + +MODULE_AUTHOR("Pantelis Antoniou "); +MODULE_DESCRIPTION("Persistent bits user-access driver"); +MODULE_LICENSE("GPL"); + +module_init(stmp3xxx_persistent_init); +module_exit(stmp3xxx_persistent_exit); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/pm.c @@ -0,0 +1,637 @@ +/* + * Static Power Management support for Freescale STMP37XX/STMP378X + * + * Author: Vitaly Wool + * + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//#include "clock.h" +#include "sleep.h" + +#define PENDING_IRQ_RETRY 100 +static void *saved_sram; +static int saved_sleep_state; + +#define WAIT_DC_OK_CYCLES 24000 +#define WAIT_CYCLE(n) for (i = 0; i < n; i++); +#define LOWER_VDDIO 10 +#define LOWER_VDDA 9 +#define LOWER_VDDD 0xa +#define MAX_POWEROFF_CODE_SIZE (6 * 1024) + +static void stmp378x_standby(void) +{ + int i; + u32 reg_vddd, reg_vdda, reg_vddio; + + /* DDR EnterSelfrefreshMode */ + __raw_writel( + BM_DRAM_CTL08_SREFRESH | __raw_readl(REGS_DRAM_BASE + HW_DRAM_CTL08), + REGS_DRAM_BASE + HW_DRAM_CTL08); + + /* Gating EMI CLock */ + __raw_writel(BM_CLKCTRL_EMI_CLKGATE | + __raw_readl(REGS_CLKCTRL_BASE + HW_CLKCTRL_EMI), + REGS_CLKCTRL_BASE + HW_CLKCTRL_EMI); + + /* Disable PLL */ + __raw_writel(BM_CLKCTRL_PLLCTRL0_POWER, + REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0_CLR); + + /* Reduce the VDDIO (3.050 volt) */ + reg_vddio = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + __raw_writel(reg_vddio | BM_POWER_VDDIOCTRL_BO_OFFSET, + REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + __raw_writel((__raw_readl(REGS_POWER_BASE + HW_POWER_VDDIOCTRL) & ~BM_POWER_VDDIOCTRL_TRG) | LOWER_VDDIO, + REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + WAIT_CYCLE(WAIT_DC_OK_CYCLES) + + while (!(__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK)) + ; + + /* Reduce VDDA 1.725volt */ + reg_vdda = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDACTRL); + __raw_writel(reg_vdda | BM_POWER_VDDACTRL_BO_OFFSET, + REGS_POWER_BASE + HW_POWER_VDDACTRL); + __raw_writel((__raw_readl(REGS_POWER_BASE + HW_POWER_VDDACTRL) & ~BM_POWER_VDDACTRL_TRG) | LOWER_VDDA, + REGS_POWER_BASE + HW_POWER_VDDACTRL); + WAIT_CYCLE(WAIT_DC_OK_CYCLES) + + /* wait for DC_OK */ + while (!(__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK)) + ; + + /* Reduce VDDD 1.000 volt */ + reg_vddd = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDDCTRL); + __raw_writel(reg_vddd | BM_POWER_VDDDCTRL_BO_OFFSET, + REGS_POWER_BASE + HW_POWER_VDDDCTRL); + __raw_writel((__raw_readl(REGS_POWER_BASE + HW_POWER_VDDDCTRL) & ~BM_POWER_VDDDCTRL_TRG) | LOWER_VDDD, + REGS_POWER_BASE + HW_POWER_VDDDCTRL); + WAIT_CYCLE(WAIT_DC_OK_CYCLES) + + while (!(__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK)) + ; + + /* optimize the DCDC loop gain */ + __raw_writel((__raw_readl(REGS_POWER_BASE + HW_POWER_LOOPCTRL) & ~BM_POWER_LOOPCTRL_EN_RCSCALE), + REGS_POWER_BASE + HW_POWER_LOOPCTRL); + __raw_writel((__raw_readl(REGS_POWER_BASE + HW_POWER_LOOPCTRL) & ~BM_POWER_LOOPCTRL_DC_R) | + (2< + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* #define DEBUG */ + +#include +#include + +#include +#include +#include +#include +#include +#include + +#define MAX_CHAIN_LEN 10 + +static struct stmp3xxx_dma_descriptor video_dma_descriptor[MAX_CHAIN_LEN]; +static struct stmp3xxx_lcd_dma_chain_info dma_chain_info[MAX_CHAIN_LEN]; +static unsigned dma_chain_info_pos; + +void stmp3xxx_init_lcdif(void) +{ + stmp3xxx_clearl(BM_LCDIF_CTRL_CLKGATE, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + /* Reset controller */ + stmp3xxx_setl(BM_LCDIF_CTRL_SFTRST, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + udelay(10); + + /* Take controller out of reset */ + stmp3xxx_clearl(BM_LCDIF_CTRL_SFTRST | BM_LCDIF_CTRL_CLKGATE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + /* Setup the bus protocol */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_MODE86, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + stmp3xxx_clearl(BM_LCDIF_CTRL1_BUSY_ENABLE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + /* Take display out of reset */ + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + /* VSYNC is an input by default */ + stmp3xxx_setl(BM_LCDIF_VDCTRL0_VSYNC_OEB, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + /* Reset display */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + udelay(10); + stmp3xxx_setl(BM_LCDIF_CTRL1_RESET, REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + udelay(10); +} + +EXPORT_SYMBOL(stmp3xxx_init_lcdif); + +static int stmp378x_lcd_master = 1; +int stmp3xxx_lcdif_dma_init(struct device *dev, dma_addr_t phys, int memsize, + int lcd_master) +{ + int ret = 0; + + stmp378x_lcd_master = lcd_master; + if (lcd_master) { + stmp3xxx_setl(BM_LCDIF_CTRL_LCDIF_MASTER, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + __raw_writel(phys, REGS_LCDIF_BASE + HW_LCDIF_CUR_BUF); + __raw_writel(phys, REGS_LCDIF_BASE + HW_LCDIF_NEXT_BUF); + } else { + ret = + stmp3xxx_dma_request(STMP3XXX_DMA + (LCD_DMA_CHANNEL, STMP3XXX_BUS_APBH), + dev, "lcdif"); + if (ret) { + dev_err(dev, + "stmp3xxx_dma_request failed: error %d\n", ret); + goto out; + } + + stmp3xxx_dma_reset_channel(STMP3XXX_DMA + (LCD_DMA_CHANNEL, + STMP3XXX_BUS_APBH)); + + stmp3xxx_dma_clear_interrupt(STMP3XXX_DMA + (LCD_DMA_CHANNEL, + STMP3XXX_BUS_APBH)); + stmp3xxx_dma_enable_interrupt(STMP3XXX_DMA + (LCD_DMA_CHANNEL, + STMP3XXX_BUS_APBH)); + + dotclk_dma_chain_init(memsize, phys, video_dma_descriptor, + dma_chain_info, &dma_chain_info_pos); + } +out: + return ret; +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_dma_init); + +void stmp3xxx_lcdif_dma_release(void) +{ + int i; + + if (stmp378x_lcd_master) { + stmp3xxx_clearl(BM_LCDIF_CTRL_LCDIF_MASTER, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + return; + } + + for (i = 0; i < dma_chain_info_pos; i++) + stmp3xxx_dma_free_command(STMP3XXX_DMA + (LCD_DMA_CHANNEL, STMP3XXX_BUS_APBH), + &video_dma_descriptor[i]); + stmp3xxx_dma_release(STMP3XXX_DMA(LCD_DMA_CHANNEL, STMP3XXX_BUS_APBH)); + + dma_chain_info_pos = 0; +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_dma_release); + +void stmp3xxx_lcdif_run(void) +{ + if (stmp378x_lcd_master) { + stmp3xxx_setl(BM_LCDIF_CTRL_LCDIF_MASTER, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BM_LCDIF_CTRL_RUN, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + } else { + video_dma_descriptor[dma_chain_info_pos - 1].command->cmd &= + ~BM_APBH_CHn_CMD_SEMAPHORE; + stmp3xxx_dma_go(STMP3XXX_DMA + (LCD_DMA_CHANNEL, STMP3XXX_BUS_APBH), + video_dma_descriptor, 1); + } +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_run); + +void stmp3xxx_lcdif_stop(void) +{ + if (stmp378x_lcd_master) { + stmp3xxx_clearl(BM_LCDIF_CTRL_RUN, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_LCDIF_MASTER, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + udelay(100); + } else { + video_dma_descriptor[dma_chain_info_pos - 1].command->cmd |= + BM_APBH_CHn_CMD_SEMAPHORE; + udelay(100); + } + stmp3xxx_setl(BM_LCDIF_CTRL_CLKGATE, REGS_LCDIF_BASE + HW_LCDIF_CTRL); +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_stop); + +int stmp3xxx_lcdif_pan_display(dma_addr_t addr) +{ + if (stmp378x_lcd_master) + __raw_writel(addr, REGS_LCDIF_BASE + HW_LCDIF_NEXT_BUF); + else { + int i; + /* Modify the chain addresses */ + for (i = 0; i < dma_chain_info_pos; ++i) { + *dma_chain_info[i].dma_addr_p = addr + + dma_chain_info[i].offset; + barrier(); + } + } + return 0; +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_pan_display); + +static BLOCKING_NOTIFIER_HEAD(lcdif_client_list); + +int stmp3xxx_lcdif_register_client(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&lcdif_client_list, nb); +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_register_client); + +void stmp3xxx_lcdif_unregister_client(struct notifier_block *nb) +{ + blocking_notifier_chain_unregister(&lcdif_client_list, nb); +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_unregister_client); + +void stmp3xxx_lcdif_notify_clients(unsigned long event, + struct stmp3xxx_platform_fb_entry *pentry) +{ + blocking_notifier_call_chain(&lcdif_client_list, event, pentry); +} + +EXPORT_SYMBOL(stmp3xxx_lcdif_notify_clients); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/lcd_hx8238a.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/lcd_hx8238a.c @@ -0,0 +1,350 @@ +/* + * Freescale STMP37XX/STMP378X dotclk panel initialization + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "common.h" + +#define MAX_CHAIN_LEN 10 + +#define DOTCLK_H_ACTIVE 960 +#define DOTCLK_H_PULSE_WIDTH 2 +#define DOTCLK_HF_PORCH 1 +#define DOTCLK_HB_PORCH 67 +#define DOTCLK_H_WAIT_CNT (DOTCLK_H_PULSE_WIDTH + (3 * DOTCLK_HB_PORCH)) +#define DOTCLK_H_PERIOD (DOTCLK_H_WAIT_CNT + DOTCLK_HF_PORCH + DOTCLK_H_ACTIVE) + +#define DOTCLK_V_PULSE_WIDTH 2 +#define DOTCLK_V_ACTIVE 240 +#define DOTCLK_VF_PORCH 1 +#define DOTCLK_VB_PORCH 16 +#define DOTCLK_V_WAIT_CNT (DOTCLK_V_PULSE_WIDTH + DOTCLK_VB_PORCH) +#define DOTCLK_V_PERIOD (DOTCLK_VF_PORCH + DOTCLK_V_ACTIVE + DOTCLK_V_WAIT_CNT) + +static struct stmp3xxx_platform_bl_data bl_data; +extern struct pin_group lcd_pins; +extern unsigned lcd_spi_pins[]; + +static void spi_write(u32 val) +{ + u32 mask; + + gpio_set_value(lcd_spi_pins[SPI_MOSI], 0); + gpio_set_value(lcd_spi_pins[SPI_SCLK], 0); + gpio_set_value(lcd_spi_pins[SPI_CS], 0); + + for (mask = 0x00800000; mask != 0; mask >>= 1) { + gpio_set_value(lcd_spi_pins[SPI_SCLK], 0); + if (val & mask) + gpio_set_value(lcd_spi_pins[SPI_MOSI], 1); + else + gpio_set_value(lcd_spi_pins[SPI_MOSI], 0); + + gpio_set_value(lcd_spi_pins[SPI_SCLK], 1); + } + + udelay(10); + gpio_set_value(lcd_spi_pins[SPI_MOSI], 0); + gpio_set_value(lcd_spi_pins[SPI_SCLK], 0); + gpio_set_value(lcd_spi_pins[SPI_CS], 1); +} + +static void write_reg(u16 reg, u16 val) +{ + pr_debug("%s: writing %x to %x\n", __func__, reg, val); + spi_write(0x00700000 | reg); + spi_write(0x00720000 | val); +} + +static void init_panel_hw(void) +{ + int i; + const unsigned short seq[] = { + 0x02, 0x0200, + 0x03, 0x6164, + 0x0E, 0x3380, + 0x1E, 0x00D2, + 0x01, 0x733F, + 0x04, 0x0448, + 0x05, 0xBC54, + 0x0A, 0x4008, + 0x0B, 0xD400, + 0x0D, 0x3229, + 0x0F, 0x0000, + 0x30, 0x0000, + 0x31, 0x0407, + 0x32, 0x0202, + 0x33, 0x0000, + 0x34, 0x0505, + 0x35, 0x0003, + 0x36, 0x0707, + 0x37, 0x0000, + 0x3A, 0x0904, + 0x3B, 0x0904, + }; + + for (i = 0; i < sizeof(seq) / sizeof(seq[0]); i += 2) + write_reg(seq[i], seq[i + 1]); +} + +static int init_pinmux(void) +{ + return stmp3xxx_request_pin_group(&lcd_pins, "lcd_hx8238a"); +} + +static int init_pinmux_spi(void) +{ + int ret = -EINVAL; + + ret = gpio_request(lcd_spi_pins[SPI_MOSI], "lcd_hx8238a"); + if (ret) + goto out_1; + + ret = gpio_request(lcd_spi_pins[SPI_SCLK], "lcd_hx8238a"); + if (ret) + goto out_2; + ret = gpio_request(lcd_spi_pins[SPI_CS], "lcd_hx8238a"); + if (ret) + goto out_3; + + /* Enable these pins as outputs */ + gpio_direction_output(lcd_spi_pins[SPI_MOSI], 0); + gpio_direction_output(lcd_spi_pins[SPI_SCLK], 0); + gpio_direction_output(lcd_spi_pins[SPI_CS], 1); + + return 0; + +out_3: + gpio_free(lcd_spi_pins[SPI_SCLK]); +out_2: + gpio_free(lcd_spi_pins[SPI_MOSI]); +out_1: + return ret; +} + +static void uninit_pinmux(void) +{ + stmp3xxx_release_pin_group(&lcd_pins, "lcd_hx8238a"); +} + +static void uninit_pinmux_spi(void) +{ + gpio_free(lcd_spi_pins[SPI_MOSI]); + gpio_free(lcd_spi_pins[SPI_SCLK]); + gpio_free(lcd_spi_pins[SPI_CS]); +} + +static struct clk *lcd_clk; + +static int init_panel(struct device *dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry *pentry) +{ + int ret = 0; + + lcd_clk = clk_get(dev, "lcdif"); + if (IS_ERR(lcd_clk)) { + ret = PTR_ERR(lcd_clk); + goto out_1; + } + ret = clk_enable(lcd_clk); + if (ret) { + clk_put(lcd_clk); + goto out_1; + } + ret = clk_set_rate(lcd_clk, + 1000000/pentry->cycle_time_ns); /* kHz */ + if (ret) { + clk_disable(lcd_clk); + clk_put(lcd_clk); + goto out_1; + } + + ret = init_pinmux(); + if (ret) + goto out_1; + ret = init_pinmux_spi(); + if (ret) + goto out_2; + init_panel_hw(); + + ret = stmp3xxx_lcdif_dma_init(dev, phys, memsize, 0); + if (ret) + goto out_3; + + setup_dotclk_panel(DOTCLK_V_PULSE_WIDTH, DOTCLK_V_PERIOD, + DOTCLK_V_WAIT_CNT, DOTCLK_V_ACTIVE, + DOTCLK_H_PULSE_WIDTH, DOTCLK_H_PERIOD, + DOTCLK_V_WAIT_CNT, DOTCLK_H_ACTIVE, 1); + + stmp3xxx_lcd_set_bl_pdata(pentry->bl_data); + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_INIT, pentry); + return 0; +out_3: + uninit_pinmux_spi(); +out_2: + uninit_pinmux(); +out_1: + return ret; +} + +static void release_panel(struct device *dev, + struct stmp3xxx_platform_fb_entry *pentry) +{ + stmp3xxx_lcdif_notify_clients(STMP3XXX_LCDIF_PANEL_RELEASE, pentry); + uninit_pinmux_spi(); + uninit_pinmux(); + release_dotclk_panel(); + stmp3xxx_lcdif_dma_release(); + clk_disable(lcd_clk); + clk_put(lcd_clk); +} + +static int blank_panel(int blank) +{ + int ret = 0; + + switch (blank) { + case FB_BLANK_NORMAL: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_POWERDOWN: + stmp3xxx_clearl(BM_LCDIF_CTRL_RUN, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + break; + + case FB_BLANK_UNBLANK: + stmp3xxx_setl(BM_LCDIF_CTRL_RUN, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + break; + + default: + ret = -EINVAL; + } + return ret; +} + +static struct stmp3xxx_platform_fb_entry fb_entry = { + .name = "hx8238a", + .x_res = 240, + .y_res = 320, + .bpp = 32, + .cycle_time_ns = 150, + .lcd_type = STMP3XXX_LCD_PANEL_DOTCLK, + .init_panel = init_panel, + .release_panel = release_panel, + .blank_panel = blank_panel, + .run_panel = stmp3xxx_lcdif_run, + .stop_panel = stmp3xxx_lcdif_stop, + .pan_display = stmp3xxx_lcdif_pan_display, + .bl_data = &bl_data, +}; + +static struct clk *pwm_clk; +static int init_bl(struct stmp3xxx_platform_bl_data *data) +{ + int ret = 0; + + pwm_clk = clk_get(NULL, "pwm"); + if (IS_ERR(pwm_clk)) { + ret = PTR_ERR(pwm_clk); + goto out; + } + clk_enable(pwm_clk); + stmp3xxx_reset_block(REGS_PWM_BASE, 1); + + ret = stmp3xxx_request_pin(PINID_PWM2, PIN_FUN1, "lcd_hx8238a"); + if (ret) + goto out_mux; + stmp3xxx_pin_voltage(PINID_PWM2, PIN_12MA, "lcd_hx8238a"); + stmp3xxx_pin_strength(PINID_PWM2, PIN_3_3V, "lcd_hx8238a"); + + stmp3xxx_clearl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + stmp3xxx_setl(BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + __raw_writel(BF(10, PWM_ACTIVEn_INACTIVE) | + BF(5, PWM_ACTIVEn_ACTIVE), + REGS_PWM_BASE + HW_PWM_ACTIVEn(2)); + __raw_writel(BF(1, PWM_PERIODn_CDIV) | /* divide by 2 */ + BF(2, PWM_PERIODn_INACTIVE_STATE) | /* low */ + BF(3, PWM_PERIODn_ACTIVE_STATE) | /* high */ + BF(14, PWM_PERIODn_PERIOD), + REGS_PWM_BASE + HW_PWM_PERIODn(2)); + return 0; + +out_mux: + clk_put(pwm_clk); +out: + return ret; +} + +static void free_bl(struct stmp3xxx_platform_bl_data *data) +{ + stmp3xxx_clearl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + stmp3xxx_release_pin(PINID_PWM2, "lcd_hx8238a"); + clk_disable(pwm_clk); + clk_put(pwm_clk); +} + +static void set_bl_intensity(struct stmp3xxx_platform_bl_data *data, + struct backlight_device *bd, int suspended) +{ + int intensity = bd->props.brightness; + + if (bd->props.power != FB_BLANK_UNBLANK) + intensity = 0; + if (bd->props.fb_blank != FB_BLANK_UNBLANK) + intensity = 0; + if (suspended) + intensity = 0; + + stmp3xxx_clearl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + if (intensity) { + HW_LRADC_CTRL2_CLR(BM_LRADC_CTRL2_BL_BRIGHTNESS); + HW_LRADC_CTRL2_SET(BM_LRADC_CTRL2_BL_ENABLE | + BM_LRADC_CTRL2_BL_MUX_SELECT | + BF(intensity - 1, LRADC_CTRL2_BL_BRIGHTNESS)); + stmp3xxx_setl(BM_PWM_CTRL_PWM2_ENABLE, REGS_PWM_BASE + HW_PWM_CTRL); + } +} + +static struct stmp3xxx_platform_bl_data bl_data = { + .bl_max_intensity = (BM_LRADC_CTRL2_BL_BRIGHTNESS >> + BP_LRADC_CTRL2_BL_BRIGHTNESS) + 1, + .bl_default_intensity = 0x10, + .init_bl = init_bl, + .free_bl = free_bl, + .set_bl_intensity = set_bl_intensity, +}; + +static int __init register_devices(void) +{ + stmp3xxx_lcd_register_entry(&fb_entry, + stmp3xxx_framebuffer.dev.platform_data); + return 0; +} +subsys_initcall(register_devices); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/sleep.S +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/sleep.S @@ -0,0 +1,542 @@ +/* + * Freescale STMP37XX/STMP378X low level sleep states support + * + * Author: Vitaly Wool + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include "sleep.h" + +#define HW_DRAM_CTL06 IO_ADDRESS(0x800E0018) +#define HW_DRAM_CTL08 IO_ADDRESS(0x800E0020) +#define HW_EMI_STAT IO_ADDRESS(0x80020010) +#define HW_RTC_PERSISTENT0 \ + IO_ADDRESS(0x8005C060) + +#define PHYS_RAM_START 0x40000000 + +.global cpu_arm926_switch_mm + + .text + +.align 8 +ENTRY(stmp37xx_cpu_standby) + @ save registers on stack + stmfd sp!, {r0 - r9, lr} + + adr r9, __stmp_temp_stack + + @ clean cache + ldr r1, __stmp_flush_cache_addr + mov lr, pc + mov pc, r1 + + @ put DRAM into self refresh + mov r0, #(HW_DRAM_CTL08 & 0x000000FF) + orr r0, r0, #(HW_DRAM_CTL08 & 0x0000FF00) + orr r0, r0, #(HW_DRAM_CTL08 & 0x00FF0000) + orr r0, r0, #(HW_DRAM_CTL08 & 0xFF000000) + ldr r1, [r0] + orr r1, r1, #(1 << 8) + str r1, [r0] + @ wait for it to actually happen + mov r0, #(HW_EMI_STAT & 0x000000FF) + orr r0, r0, #(HW_EMI_STAT & 0x0000FF00) + orr r0, r0, #(HW_EMI_STAT & 0x00FF0000) + orr r0, r0, #(HW_EMI_STAT & 0xFF000000) +1: ldr r1, [r0] + teq r1, #(1 << 1) + beq 1b + nop + nop + nop + nop + nop + +#ifdef CONFIG_STMP378X_RAM_FREQ_SCALING + @ RAM to clk from xtal + mov lr, pc + b stmp3xxx_ram_save_timings + mov lr, pc + b stmp3xxx_ram_24M_set_timings + + mov r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0xFF000000) + ldr r4, [r0] + mov r1, #(1<<6) + str r1, [r0, #4] +1: ldr r1, [r0] + tst r1, #BM_CLKCTRL_EMI_BUSY_REF_XTAL + bne 1b + + @ save RAM divisors + mov r0, #(HW_CLKCTRL_FRAC_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_FRAC_ADDR & 0xFF000000) + ldr r8, [r0] + and r8, r8, #(0x3F << 8) + lsr r8, r8, #8 + mov r0, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) + ldr r7, [r0] + and r7, r7, #0x3F + + @ shut the PLL down + mov r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0xFF000000) + mov r1, #(1<<16) + str r1, [r0, #0x08] @ clear + + @ set vddd to minimum + mov r0, #(HW_POWER_VDDDCTRL_ADDR & 0x000000FF) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0x0000FF00) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0x00FF0000) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0xFF000000) + ldr r6, [r0] + bic r1, r6, #0xFF + bic r1, r1, #0x30 + orr r1, r1, #0xa + str r1, [r0] + /* now wait 1000 us = 24000 cycles */ + mov r0, #24 << 10 +3: sub r0, r0, #1 + cmp r0, #0 + bne 3b + nop +#endif + + @ do enter standby + mov r0, #(HW_CLKCTRL_CPU_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_CPU_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_CPU_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_CPU_ADDR & 0xFF000000) + mov r1, #(1<<12) + str r1, [r0, #4] + mov r2, #0 + mcr p15, 0, r2, c7, c0, 4 + nop + + @ sleeping now... + + @ remove INTERRUPT_WAIT bit + str r1, [r0, #8] + nop + nop + nop + +#ifdef CONFIG_STMP378X_RAM_FREQ_SCALING + @ restore vddd + mov r0, #(HW_POWER_VDDDCTRL_ADDR & 0x000000FF) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0x0000FF00) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0x00FF0000) + orr r0, r0, #(HW_POWER_VDDDCTRL_ADDR & 0xFF000000) + ldr r1, [r0] + str r6, [r0] + /* now wait 1000 us = 24000 cycles */ + mov r0, #24 << 10 +12: sub r0, r0, #1 + cmp r0, #0 + bne 12b + nop + + @ put the PLL back up + mov r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_PLLCTRL0_ADDR & 0xFF000000) + mov r1, #(1<<16) + str r1, [r0, #0x04] @ set + /* now wait 10 us = 240 cycles */ + mov r0, #240 +11: sub r0, r0, #1 + cmp r0, #0 + bne 11b + nop + + @ set divisors and switch EMI back to PLL + mov lr, pc + b stmp3xxx_ram_restore_timings + mov lr, pc + b __stmp_emi_set_values + + mov r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_CLKSEQ_ADDR & 0xFF000000) + mov r1, #(1<<6) + str r1, [r0, #8] + + mov r0, #(HW_CLKCTRL_EMI_ADDR & 0x000000FF) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x0000FF00) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0x00FF0000) + orr r0, r0, #(HW_CLKCTRL_EMI_ADDR & 0xFF000000) + ldr r1, [r0] + bic r1, #BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE + str r1, [r0] +#endif + + @ restore normal DRAM mode + mov r0, #(HW_DRAM_CTL08 & 0x000000FF) + orr r0, r0, #(HW_DRAM_CTL08 & 0x0000FF00) + orr r0, r0, #(HW_DRAM_CTL08 & 0x00FF0000) + orr r0, r0, #(HW_DRAM_CTL08 & 0xFF000000) + ldr r1, [r0] + bic r1, r1, #(1 << 8) + str r1, [r0] + @ wait for it to actually happen + mov r0, #(HW_EMI_STAT & 0x000000FF) + orr r0, r0, #(HW_EMI_STAT & 0x0000FF00) + orr r0, r0, #(HW_EMI_STAT & 0x00FF0000) + orr r0, r0, #(HW_EMI_STAT & 0xFF000000) +102: ldr r1, [r0] + tst r1, #(1 << 1) + bne 102b + + nop + nop + nop + + @ restore regs and return + ldmfd sp!, {r0 - r9, pc} + + .space 0x100 +__stmp_temp_stack: + .word 0 + +#ifdef CONFIG_STMP378X_RAM_FREQ_SCALING +#include "emi.inc" +#endif + +__stmp_flush_cache_addr: + .word arm926_flush_kern_cache_all + +ENTRY(stmp_standby_alloc_sz) + .word . - stmp37xx_cpu_standby + +ENTRY(stmp37xx_cpu_suspend) + @ save registers on stack + stmfd sp!, {r1 - r12, lr} + + @ save context + mov r0, #0xd3 @ SVC, Interrupts disabled + msr cpsr, r0 + mov r1, #0xC0000000 + ldr r1, [r1] + mrc p15, 0, r0, c1, c0, 0 + str r0, [r1, #MMUCTL_OFFS] + mrc p15, 0, r0, c15, c1, 0 + str r0, [r1, #MMUCPACCESS_OFS] + mrc p15, 0, r0, c2, c0, 0 + str r0, [r1, #MMUTTB_OFFS] + mrc p15, 0, r0, c3, c0, 0 + str r0, [r1, #MMUDOMAIN_OFFS] + mrc p15, 0, r0, c13, c0, 0 + str r0, [r1, #MMUPID_OFFS] + + str sp, [r1, #SVC_SP_OFFS] + mrs r0, spsr + str r0, [r1, #SVC_SPSR_OFFS] + + add r2, r1, #FIQ_SPSR_OFFS + mov r0, #0xd1 @ FIQ, Interrupts disabled + msr cpsr, r0 + mrs r3, spsr + stmia r2!, {r3, r8-r12, sp, lr} + + add r2, r1, #ABT_SPSR_OFFS + mov r0, #0xd7 @ ABT, Interrupts disabled + msr cpsr, r0 + mrs r3, spsr + stmia r2!, {r3, sp, lr} + + add r2, r1, #IRQ_SPSR_OFFS + mov r0, #0xd2 @ IRQ, Interrupts disabled + msr cpsr, r0 + mrs r3, spsr + stmia r2!, {r3, sp, lr} + + add r2, r1, #UND_SPSR_OFFS + mov r0, #0xdb @ UND, Interrupts disabled + msr cpsr, r0 + mrs r3, spsr + stmia r2!, {r3, sp, lr} + + add r2, r1, #SYS_SP_OFFS + mov r0, #0xdf @ SYS, Interrupts disabled + msr cpsr, r0 + stmia r2!, {sp, lr} + + add r2, r1, #SVC_R8_OFFS + mov r0, #0xd3 @ Back to SVC, Interrupts disabled + msr cpsr, r0 + + @ save entry point + sub r1, r1, #(0xC0000000 - PHYS_RAM_START) + mov r0, #0xC0000000 + str r1, [r0] + ldr r1, __stmp_resume_point + sub r1, r1, #(0xC0000000 - PHYS_RAM_START) + str r1, [r0, #4] + mov r0, #0 + + @ clean cache + ldr r1, __stmp_flush_cache_addr2 + mov lr, pc + mov pc, r1 + + @ enable internal xtal + mov r2, #(HW_POWER_MINPWR_ADDR & 0x000000FF) + orr r2, r2, #(HW_POWER_MINPWR_ADDR & 0x0000FF00) + orr r2, r2, #(HW_POWER_MINPWR_ADDR & 0x00FF0000) + orr r2, r2, #(HW_POWER_MINPWR_ADDR & 0xFF000000) + ldr r1, [r2] + orr r1, r1, #(1<<9) + str r1, [r2] + orr r1, r1, #(1<<8) + str r1, [r2] + + @ enable RTC/RAM clocks + mov r0, #(HW_RTC_PERSISTENT0 & 0x000000FF) + orr r0, r0, #(HW_RTC_PERSISTENT0 & 0x0000FF00) + orr r0, r0, #(HW_RTC_PERSISTENT0 & 0x00FF0000) + orr r0, r0, #(HW_RTC_PERSISTENT0 & 0xFF000000) + mov r1, #((1<<4)|(1<<5)|1) + str r1, [r0, #4] + + @ put DRAM into self refresh + mov r0, #(HW_DRAM_CTL08 & 0x000000FF) + orr r0, r0, #(HW_DRAM_CTL08 & 0x0000FF00) + orr r0, r0, #(HW_DRAM_CTL08 & 0x00FF0000) + orr r0, r0, #(HW_DRAM_CTL08 & 0xFF000000) + ldr r1, [r0] + orr r1, r1, #(1 << 8) + str r1, [r0] + @ wait for it to actually happen + mov r0, #(HW_EMI_STAT & 0x000000FF) + orr r0, r0, #(HW_EMI_STAT & 0x0000FF00) + orr r0, r0, #(HW_EMI_STAT & 0x00FF0000) + orr r0, r0, #(HW_EMI_STAT & 0xFF000000) +1: ldr r1, [r0] + teq r1, #(1 << 1) + beq 1b + nop + nop + nop + nop + nop + nop + + @ power off RAM + mov r0, #(HW_DRAM_CTL06 & 0x000000FF) + orr r0, r0, #(HW_DRAM_CTL06 & 0x0000FF00) + orr r0, r0, #(HW_DRAM_CTL06 & 0x00FF0000) + orr r0, r0, #(HW_DRAM_CTL06 & 0xFF000000) + ldr r1, [r0] + orr r1, r1, #(1<<24) + str r1, [r0] + nop + nop + nop + nop + + @ do enter sleep + mov r0, #(HW_POWER_RESET_ADDR & 0x000000FF) + orr r0, r0, #(HW_POWER_RESET_ADDR & 0x0000FF00) + orr r0, r0, #(HW_POWER_RESET_ADDR & 0x00FF0000) + orr r0, r0, #(HW_POWER_RESET_ADDR & 0xFF000000) + mov r1, #0xFF000000 + orr r1, r1, #0x00FF0000 + str r1, [r0, #8] + mov r1, #0x3E000000 + orr r1, r1, #0x00770000 + str r1, [r0, #4] + mov r1, #2 + str r1, [r0, #8] + mov r1, #1 + str r1, [r0, #4] + nop + nop + nop + nop + nop + nop + + @ sleeping now... + +__restore_context: + mov r0, #0 + mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer + mcr p15, 0, r0, c8, c7, 0 @ Invalidate TLBs + mcr p15, 0, r0, c7, c7, 0 @ Invalidate I & D cache + nop + nop + + mov r0, #0xd3 + msr cpsr, r0 + + bl __create_temp_page_tables + mov r3, r4 + + mov r1, #PHYS_RAM_START + ldr r1, [r1] + ldr r2, [r1, #MMUDOMAIN_OFFS] + ldr r4, [r1, #MMUCPACCESS_OFS] + ldr r5, [r1, #MMUPID_OFFS] + ldr r6, =__resume_after_mmu + ldr r7, [r1, #MMUCTL_OFFS] + ldr r8, [r1, #MMUTTB_OFFS] + add r1, r1, #(0xC0000000 - PHYS_RAM_START) + mov r0, #0 +@ mcr p15, 0, r4, c15, c1, 0 @ cpaccess + mcr p15, 0, r5, c13, c0, 0 @ pid + mcr p15, 0, r2, c3, c0, 0 @ domain + mcr p15, 0, r3, c2, c0, 0 @ ttb + b 1f + .align 5 +1: mov r0, r0 + mcr p15, 0, r7, c1, c0, 0 @ mmuctl + nop + mrc p15, 0, r0, c3, c0, 0 @ read id + mov r0, r0 + mov r0, r0 + sub pc, r6, r5, lsr #32 + nop + nop + nop +__resume_after_mmu: + mov r0, #0 + mcr p15, 0, r0, c8, c7, 0 @ Invalidate TLBs + mcr p15, 0, r0, c7, c7, 0 @ Invalidate I & D cache + + mov r0, r8 + bl cpu_arm926_switch_mm + + mov r0, #0xd1 @FIQ, Interrupts disabled + ldr r2, [r1, #FIQ_SPSR_OFFS] + add r3, r1, #FIQ_R8_OFFS + msr cpsr, r0 + msr spsr, r2 + ldmia r3!, {r8-r12, sp, lr} + + mov r0, #0xd7 @ABT, Interrupts disabled + ldr r2, [r1, #ABT_SPSR_OFFS] + add r3, r1, #ABT_SP_OFFS + msr cpsr, r0 + msr spsr, r2 + ldmia r3!, {sp, lr} + + mov r0, #0xd2 @IRQ, Interrupts disabled + ldr r2, [r1, #IRQ_SPSR_OFFS] + add r3, r1, #IRQ_SP_OFFS + msr cpsr, r0 + msr spsr, r2 + ldmia r3!, {sp, lr} + + mov r0, #0xdb @UND, Interrupts disabled + ldr r2, [r1, #UND_SPSR_OFFS] + add r3, r1, #UND_SP_OFFS + msr cpsr, r0 + msr spsr, r2 + ldmia r3!, {sp, lr} + + mov r0, #0xdf @SYS, Interrupts disabled + add r3, r1, #SYS_SP_OFFS + msr cpsr, r0 + ldmia r3!, {sp, lr} + + mov r0, #0xd3 @SVC, interrupts disabled + ldr r2, [r1, #SVC_SPSR_OFFS] + ldr r3, [r1, #SVC_SP_OFFS] + msr cpsr, r0 + msr spsr, r2 + mov sp, r3 + +#if 0 + @ select CPU bypass, will be cleared afterwards + ldr r0, =HW_CLKCTRL_CLKSEQ_ADDR + ldr r2, =HW_CLKCTRL_HBUS_ADDR + ldr r4, =HW_CLKCTRL_CPU_ADDR + mov r1, #(1<<7) + ldr r3, [r2] + bic r3, r3, #BM_CLKCTRL_HBUS_DIV + orr r3, r3, #1 + ldr r5, [r4] + bic r5, r5, #BM_CLKCTRL_CPU_DIV_CPU + orr r5, r5, #1 + str r1, [r0, #4] + str r3, [r2] + str r5, [r4] +#endif + @ restore regs and return + ldmfd sp!, {r1 - r12, lr} + mov pc, lr + +__stmp_flush_cache_addr2: + .word arm926_flush_kern_cache_all +__stmp_resume_point: + .word __restore_context +ENTRY(stmp_s2ram_alloc_sz) + .word . - stmp37xx_cpu_suspend + +__create_temp_page_tables: + ldr r4, =(__temp_ttb - 0xC0000000 + PHYS_RAM_START) + + /* + * Clear the 16K level 1 swapper page table + */ + mov r0, r4 + mov r3, #0 + add r6, r0, #0x4000 +1: str r3, [r0], #4 + str r3, [r0], #4 + str r3, [r0], #4 + str r3, [r0], #4 + teq r0, r6 + bne 1b + + /* + * Create identity mapping for the area close to where we are to + * cater for the MMU enable. + */ + mov r6, pc, lsr #20 @ kind of where we are + ldr r7, =(PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ) + + orr r3, r7, r6, lsl #20 @ flags + kernel base + str r3, [r4, r6, lsl #2] @ identity mapping + + mov r6, r6, lsl #20 + add r6, r6, #(0xC0000000-PHYS_RAM_START) + str r3, [r4, r6, lsr #18] + + mov pc, lr + .ltorg + + .section ".sdata", "a" + .align 14 +__temp_ttb: + .space 0x8000 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/Makefile @@ -1,2 +1,29 @@ -obj-$(CONFIG_ARCH_STMP378X) += stmp378x.o -obj-$(CONFIG_MACH_STMP378X) += stmp378x_devb.o +# +# Makefile for the linux kernel. +# +obj-y += power.o persistent.o + +# Power Management +obj-$(CONFIG_PM) += pm.o sleep.o + +# Chip family select +obj-$(CONFIG_ARCH_STMP37XX) += stmp37xx.o stmp37xx_lcdif.o +obj-$(CONFIG_ARCH_STMP378X) += stmp378x.o stmp378x_lcdif.o + +obj-$(CONFIG_MACH_STMP37XX) += stmp37xx_devb.o +obj-$(CONFIG_MACH_STMP378X) += stmp378x_devb.o stmp378x_i2c.o stmp378x_pwm_led.o + +# LCD panels support +obj-$(CONFIG_FB_STMP37XX_HX8238A) += lcd_hx8238a.o +obj-$(CONFIG_FB_STMP37XX_LMS350) += lcd_lms350.o +obj-$(CONFIG_FB_STMP37XX_LMS430) += lcd_lms430.o + +# TVOUT support +obj-$(CONFIG_FB_STMP378X_TVENC) += tvenc.o + +obj-$(CONFIG_STMP3XXX_UNIQUE_ID_OTP) += otp.o +obj-$(CONFIG_STMP3XXX_UNIQUE_ID_FILE) += unique-id-file.o + +obj-$(CONFIG_INPUT_STMP3XXX_ROTDEC) += stmp378x_devb_rotdec.o +obj-$(CONFIG_STMP378X_RAM_FREQ_SCALING) += emi.o + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/power.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/power.c @@ -0,0 +1,537 @@ +/* + * Freescale STMP378X voltage regulator low-level driver + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/* #define DEBUG */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int get_voltage(struct stmp3xxx_regulator *sreg) +{ + struct stmp3xxx_platform_regulator_data *rdata = sreg->rdata; + u32 val = __raw_readl(rdata->control_reg) & 0x1f; + int uv = rdata->min_voltage + val * + (rdata->max_voltage - rdata->min_voltage) / 0x1f; + return uv; +} + +static int get_bo_voltage(struct stmp3xxx_regulator *sreg) +{ + int uv; + int offs; + + if (!sreg->parent) + return -EINVAL; + + uv = get_voltage(sreg->parent); + offs = (__raw_readl(sreg->parent->rdata->control_reg) & ~0x700) >> 8; + return uv - 25000*offs; +} + +static int set_voltage(struct stmp3xxx_regulator *sreg, int uv) +{ + u32 val, reg, i; + + pr_debug("%s: uv %d, min %d, max %d\n", __func__, + uv, sreg->rdata->min_voltage, sreg->rdata->max_voltage); + + if (uv < sreg->rdata->min_voltage || uv > sreg->rdata->max_voltage) + return -EINVAL; + + val = (uv - sreg->rdata->min_voltage) * 0x1f / + (sreg->rdata->max_voltage - sreg->rdata->min_voltage); + reg = (__raw_readl(sreg->rdata->control_reg) & ~0x1f); + pr_debug("%s: calculated val %d\n", __func__, val); + __raw_writel(val | reg, sreg->rdata->control_reg); + for (i = 20; i; i--) { + if (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK) + break; + udelay(1); + } + + if (i) + goto out; + + __raw_writel(val | reg, sreg->rdata->control_reg); + for (i = 40000; i; i--) { + if (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK) + break; + udelay(1); + } + + if (i) + goto out; + + for (i = 40000; i; i--) { + if (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK) + break; + udelay(1); + } + +out: + return !i; +} + +static int set_bo_voltage(struct stmp3xxx_regulator *sreg, int bo_uv) +{ + int uv; + int offs; + u32 reg; + int i; + + if (!sreg->parent) + return -EINVAL; + + uv = get_voltage(sreg->parent); + offs = (uv - bo_uv) / 25000; + if (offs < 0 || offs > 7) + return -EINVAL; + + reg = (__raw_readl(sreg->parent->rdata->control_reg) & ~0x700); + pr_debug("%s: calculated offs %d\n", __func__, offs); + __raw_writel((offs << 8) | reg, sreg->parent->rdata->control_reg); + + for (i = 10000; i; i--) { + if (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK) + break; + udelay(1); + } + + if (i) + goto out; + + for (i = 10000; i; i--) { + if (__raw_readl(REGS_POWER_BASE + HW_POWER_STS) & BM_POWER_STS_DC_OK) + break; + udelay(1); + } + +out: + return !i; +} + +static int enable(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 0; +} + +static int disable(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 0; +} + +static int is_enabled(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 1; +} + +static int set_mode(struct stmp3xxx_regulator *sreg, int mode) +{ + int ret = 0; + u32 val; + + switch (mode) { + case REGULATOR_MODE_FAST: + val = __raw_readl(sreg->rdata->control_reg); + __raw_writel(val | (1 << 17), sreg->rdata->control_reg); + break; + + case REGULATOR_MODE_NORMAL: + val = __raw_readl(sreg->rdata->control_reg); + __raw_writel(val & ~(1<<17), sreg->rdata->control_reg); + break; + + default: + ret = -EINVAL; + break; + } + return ret; +} + +static int get_mode(struct stmp3xxx_regulator *sreg) +{ + u32 val = __raw_readl(sreg->rdata->control_reg) & (1 << 17); + + return val ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static struct stmp3xxx_platform_regulator_data vddd_data = { + .name = "vddd", + .set_voltage = set_voltage, + .get_voltage = get_voltage, + .enable = enable, + .disable = disable, + .is_enabled = is_enabled, + .set_mode = set_mode, + .get_mode = get_mode, + .control_reg = (u32)(REGS_POWER_BASE + HW_POWER_VDDDCTRL), + .min_voltage = 800000, + .max_voltage = 1575000, +}; + +static struct stmp3xxx_platform_regulator_data vdddbo_data = { + .name = "vddd_bo", + .parent_name = "vddd", + .set_voltage = set_bo_voltage, + .get_voltage = get_bo_voltage, + .enable = enable, + .disable = disable, + .is_enabled = is_enabled, + .set_mode = set_mode, + .get_mode = get_mode, + .min_voltage = 800000, + .max_voltage = 1575000, +}; + +static struct stmp3xxx_platform_regulator_data vdda_data = { + .name = "vdda", + .set_voltage = set_voltage, + .get_voltage = get_voltage, + .enable = enable, + .disable = disable, + .is_enabled = is_enabled, + .set_mode = set_mode, + .get_mode = get_mode, + .control_reg = (u32)(REGS_POWER_BASE + HW_POWER_VDDACTRL), + .min_voltage = 1500000, + .max_voltage = 2275000, +}; + +static struct stmp3xxx_platform_regulator_data vddio_data = { + .name = "vddio", + .set_voltage = set_voltage, + .get_voltage = get_voltage, + .enable = enable, + .disable = disable, + .is_enabled = is_enabled, + .set_mode = set_mode, + .get_mode = get_mode, + .control_reg = (u32)(REGS_POWER_BASE + HW_POWER_VDDIOCTRL), + .min_voltage = 2800000, + .max_voltage = 3575000, +}; + +static struct regulator_init_data vddd_init = { + .constraints = { + .name = "vddd", + .min_uV = 800000, + .max_uV = 1575000, + .valid_modes_mask = REGULATOR_MODE_FAST | + REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .input_uV = 5000000, + .always_on = 1, + } +}; + +static struct regulator_init_data vdddbo_init = { + .constraints = { + .name = "vdddbo", + .min_uV = 800000, + .max_uV = 1575000, + .valid_modes_mask = REGULATOR_MODE_FAST | + REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .input_uV = 5000000, + .always_on = 1, + } +}; + + +static struct regulator_init_data vdda_init = { + .constraints = { + .name = "vdda", + .min_uV = 1500000, + .max_uV = 2275000, + .valid_modes_mask = REGULATOR_MODE_FAST | + REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .input_uV = 5000000, + .always_on = 1, + } +}; + + +static struct regulator_init_data vddio_init = { + .constraints = { + .name = "vddio", + .min_uV = 2800000, + .max_uV = 3575000, + .valid_modes_mask = REGULATOR_MODE_FAST | + REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .input_uV = 5000000, + .always_on = 1, + } +}; + +/* now the current regulators */ +/* Restriction: .... no set_current call on root regulator */ +static int main_add_current(struct stmp3xxx_regulator *sreg, + int uA) +{ + + pr_debug("%s: enter reg %s, uA=%d\n", + __func__, sreg->regulator.name, uA); + if (uA > 0 && (sreg->cur_current + uA > sreg->rdata->max_current)) + return -EINVAL; + else + sreg->cur_current += uA; + return 0; +} + +static int cur_reg_set_current(struct stmp3xxx_regulator *sreg, int uA) +{ + int ret = 0; + unsigned long flags; + + pr_debug("%s: enter reg %s, uA=%d\n", + __func__, sreg->regulator.name, uA); + + if (sreg->parent) { + spin_lock_irqsave(&sreg->parent->lock, flags); + ret = main_add_current(sreg->parent, uA - sreg->cur_current); + spin_unlock_irqrestore(&sreg->parent->lock, flags); + } + + + if ((!ret) || (!sreg->parent)) + goto out; + + if (sreg->mode == REGULATOR_MODE_FAST) + return ret; + + while (ret) { + wait_event(sreg->parent->wait_q , + (uA - sreg->cur_current < + sreg->parent->rdata->max_current - + sreg->parent->cur_current)); + spin_lock_irqsave(&sreg->parent->lock, flags); + ret = main_add_current(sreg->parent, uA - sreg->cur_current); + spin_unlock_irqrestore(&sreg->parent->lock, flags); + } +out: + if (sreg->parent && (uA - sreg->cur_current < 0)) + wake_up_all(&sreg->parent->wait_q); + sreg->cur_current = uA; + return 0; + +} + +static int cur_reg_get_current(struct stmp3xxx_regulator *sreg) +{ + return sreg->cur_current; +} + +static int enable_cur_reg(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 0; +} + +static int disable_cur_reg(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 0; +} + +static int cur_reg_is_enabled(struct stmp3xxx_regulator *sreg) +{ + /* XXX: TODO */ + return 1; +} + +static int cur_reg_set_mode(struct stmp3xxx_regulator *sreg, int mode) +{ + int ret = 0; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + case REGULATOR_MODE_FAST: + sreg->mode = mode; + break; + default: + ret = -EINVAL; + break; + } + return ret; +} + +static int cur_reg_get_mode(struct stmp3xxx_regulator *sreg) +{ + return sreg->mode; +} + +static struct stmp3xxx_platform_regulator_data overall_cur_data = { + .name = "overall_current", + .set_current = cur_reg_set_current, + .get_current = cur_reg_get_current, + .enable = enable_cur_reg, + .disable = disable_cur_reg, + .is_enabled = cur_reg_is_enabled, + .set_mode = cur_reg_set_mode, + .get_mode = cur_reg_get_mode, + .max_current = 0x7fffffff, +}; + +static struct regulator_init_data overall_cur_init = { + .constraints = { + .name = "overall_current", + .valid_modes_mask = REGULATOR_MODE_NORMAL | + REGULATOR_MODE_FAST, + .valid_ops_mask = REGULATOR_CHANGE_CURRENT | + REGULATOR_CHANGE_MODE, + .max_uA = 0x7fffffff, + .min_uA = 0x0, + .always_on = 1, + } +}; + +static struct stmp3xxx_platform_regulator_data sibling_cur_data = { + .parent_name = "overall_current", + .set_current = cur_reg_set_current, + .get_current = cur_reg_get_current, + .enable = enable_cur_reg, + .disable = disable_cur_reg, + .is_enabled = cur_reg_is_enabled, + .set_mode = cur_reg_set_mode, + .get_mode = cur_reg_get_mode, +}; + +static struct platform_device *devices[] = { + &stmp3xxx_keyboard, + &stmp3xxx_touchscreen, + &stmp3xxx_appuart, + &stmp3xxx_dbguart, + &stmp3xxx_watchdog, + &stmp3xxx_rtc, + &stmp3xxx_framebuffer, + &stmp3xxx_backlight, + &stmp3xxx_rotdec, + &stmp378x_i2c, + &stmp3xxx_persistent, + &stmp3xxx_dcp_bootstream, + &stmp3xxx_dcp, + &stmp3xxx_battery, + &stmp378x_pxp, +}; + +static int sibling_current_devices_num; + +int stmp3xxx_platform_add_regulator(const char *name, int count) +{ + int i; + pr_debug("%s: name %s, count %d\n", __func__, name, count); + for (i = sibling_current_devices_num; + i < sibling_current_devices_num + count; + i++) { + struct regulator_init_data *sibling_init = + kzalloc(sizeof(struct regulator_init_data), + GFP_KERNEL); + struct stmp3xxx_regulator *curr_reg = + kzalloc(sizeof(struct stmp3xxx_regulator), + GFP_KERNEL); + struct stmp3xxx_platform_regulator_data *d = + kzalloc(sizeof(struct stmp3xxx_platform_regulator_data), + GFP_KERNEL); + if (!d || !curr_reg || !sibling_init) + return -ENOMEM; + + sibling_init->constraints.valid_modes_mask = + REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST; + sibling_init->constraints.valid_ops_mask = + REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_MODE; + sibling_init->constraints.max_uA = 0x7fffffff; + sibling_init->constraints.min_uA = 0x0; + + memcpy(d, &sibling_cur_data, sizeof(sibling_cur_data)); + d->parent_name = kstrdup(sibling_cur_data.parent_name, + GFP_KERNEL); + snprintf(d->name, 80, "%s-%d", + name, i - sibling_current_devices_num + 1); + sibling_init->constraints.name = kstrdup(d->name, GFP_KERNEL); + sibling_init->constraints.always_on = 1; + curr_reg->rdata = d; + stmp3xxx_register_regulator(curr_reg, 101 + i, sibling_init); + } + sibling_current_devices_num += count; + return 0; +} + +static struct stmp3xxx_regulator vddd_reg = { + .rdata = &vddd_data, +}; + +static struct stmp3xxx_regulator vdda_reg = { + .rdata = &vdda_data, +}; + +static struct stmp3xxx_regulator vddio_reg = { + .rdata = &vddio_data, +}; + +static struct stmp3xxx_regulator vdddbo_reg = { + .rdata = &vdddbo_data, +}; + +static struct stmp3xxx_regulator overall_cur_reg = { + .rdata = &overall_cur_data, +}; + + +static int __init regulators_init(void) +{ + int i; + int retval = 0; + u32 vddio = __raw_readl(REGS_POWER_BASE + HW_POWER_VDDIOCTRL) & ~0x1f; + pr_debug("regulators_init \n"); + __raw_writel(vddio | 0x14, REGS_POWER_BASE + HW_POWER_VDDIOCTRL); + vdddbo_reg.parent = &vddd_reg; + stmp3xxx_register_regulator(&vddd_reg, STMP3XXX_VDDD, &vddd_init); + stmp3xxx_register_regulator(&vdddbo_reg, STMP3XXX_VDDDBO, &vdddbo_init); + stmp3xxx_register_regulator(&vdda_reg, STMP3XXX_VDDA, &vdda_init); + stmp3xxx_register_regulator(&vddio_reg, STMP3XXX_VDDIO, &vddio_init); + stmp3xxx_register_regulator(&overall_cur_reg, + STMP3XXX_OVERALL_CUR, &overall_cur_init); + + for (i = 0; i < ARRAY_SIZE(devices); i++) { + retval = stmp3xxx_platform_add_regulator(devices[i]->name, 1); + if (retval) + return retval; + } + stmp3xxx_platform_add_regulator("mmc_ssp", 2); + stmp3xxx_platform_add_regulator("charger", 1); + stmp3xxx_platform_add_regulator("power-test", 1); + stmp3xxx_platform_add_regulator("cpufreq", 1); + return 0; +} +postcore_initcall(regulators_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-gpmi.h @@ -1,8 +1,9 @@ /* - * stmp378x: GPMI register definitions + * STMP GPMI Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,44 +18,200 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_GPMI_BASE (STMP3XXX_REGS_BASE + 0xC000) -#define REGS_GPMI_PHYS 0x8000C000 -#define REGS_GPMI_SIZE 0x2000 -#define HW_GPMI_CTRL0 0x0 -#define BM_GPMI_CTRL0_XFER_COUNT 0x0000FFFF -#define BP_GPMI_CTRL0_XFER_COUNT 0 -#define BM_GPMI_CTRL0_CS 0x00300000 -#define BP_GPMI_CTRL0_CS 20 -#define BM_GPMI_CTRL0_LOCK_CS 0x00400000 -#define BM_GPMI_CTRL0_WORD_LENGTH 0x00800000 -#define BM_GPMI_CTRL0_ADDRESS 0x000E0000 -#define BP_GPMI_CTRL0_ADDRESS 17 -#define BV_GPMI_CTRL0_ADDRESS__NAND_DATA 0x0 -#define BV_GPMI_CTRL0_ADDRESS__NAND_CLE 0x1 -#define BV_GPMI_CTRL0_ADDRESS__NAND_ALE 0x2 -#define BM_GPMI_CTRL0_ADDRESS_INCREMENT 0x00010000 -#define BM_GPMI_CTRL0_COMMAND_MODE 0x03000000 +#ifndef __ARCH_ARM___GPMI_H +#define __ARCH_ARM___GPMI_H 1 + +#define REGS_GPMI_BASE (STMP3XXX_REGS_BASE + 0xc000) +#define REGS_GPMI_PHYS (0x8000C000) +#define REGS_GPMI_SIZE 0x00002000 + +#define HW_GPMI_CTRL0 (0x00000000) +#define HW_GPMI_CTRL0_SET (0x00000004) +#define HW_GPMI_CTRL0_CLR (0x00000008) +#define HW_GPMI_CTRL0_TOG (0x0000000c) +#define HW_GPMI_CTRL0_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL0) +#define HW_GPMI_CTRL0_SET_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL0_SET) +#define HW_GPMI_CTRL0_CLR_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL0_CLR) +#define HW_GPMI_CTRL0_TOG_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL0_TOG) + +#define BM_GPMI_CTRL0_SFTRST 0x80000000 +#define BV_GPMI_CTRL0_SFTRST__RUN 0x0 +#define BV_GPMI_CTRL0_SFTRST__RESET 0x1 +#define BM_GPMI_CTRL0_CLKGATE 0x40000000 +#define BV_GPMI_CTRL0_CLKGATE__RUN 0x0 +#define BV_GPMI_CTRL0_CLKGATE__NO_CLKS 0x1 +#define BM_GPMI_CTRL0_RUN 0x20000000 +#define BV_GPMI_CTRL0_RUN__IDLE 0x0 +#define BV_GPMI_CTRL0_RUN__BUSY 0x1 +#define BM_GPMI_CTRL0_DEV_IRQ_EN 0x10000000 +#define BM_GPMI_CTRL0_TIMEOUT_IRQ_EN 0x08000000 +#define BM_GPMI_CTRL0_UDMA 0x04000000 +#define BV_GPMI_CTRL0_UDMA__DISABLED 0x0 +#define BV_GPMI_CTRL0_UDMA__ENABLED 0x1 #define BP_GPMI_CTRL0_COMMAND_MODE 24 -#define BV_GPMI_CTRL0_COMMAND_MODE__WRITE 0x0 -#define BV_GPMI_CTRL0_COMMAND_MODE__READ 0x1 +#define BM_GPMI_CTRL0_COMMAND_MODE 0x03000000 +#define BF_GPMI_CTRL0_COMMAND_MODE(v) \ + (((v) << 24) & BM_GPMI_CTRL0_COMMAND_MODE) +#define BV_GPMI_CTRL0_COMMAND_MODE__WRITE 0x0 +#define BV_GPMI_CTRL0_COMMAND_MODE__READ 0x1 #define BV_GPMI_CTRL0_COMMAND_MODE__READ_AND_COMPARE 0x2 #define BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY 0x3 -#define BM_GPMI_CTRL0_RUN 0x20000000 -#define BM_GPMI_CTRL0_CLKGATE 0x40000000 -#define BM_GPMI_CTRL0_SFTRST 0x80000000 -#define BM_GPMI_ECCCTRL_BUFFER_MASK 0x000001FF -#define BP_GPMI_ECCCTRL_BUFFER_MASK 0 -#define BM_GPMI_ECCCTRL_ENABLE_ECC 0x00001000 -#define BM_GPMI_ECCCTRL_ECC_CMD 0x00006000 +#define BM_GPMI_CTRL0_WORD_LENGTH 0x00800000 +#define BV_GPMI_CTRL0_WORD_LENGTH__16_BIT 0x0 +#define BV_GPMI_CTRL0_WORD_LENGTH__8_BIT 0x1 +#define BM_GPMI_CTRL0_LOCK_CS 0x00400000 +#define BV_GPMI_CTRL0_LOCK_CS__DISABLED 0x0 +#define BV_GPMI_CTRL0_LOCK_CS__ENABLED 0x1 +#define BP_GPMI_CTRL0_CS 20 +#define BM_GPMI_CTRL0_CS 0x00300000 +#define BF_GPMI_CTRL0_CS(v) \ + (((v) << 20) & BM_GPMI_CTRL0_CS) +#define BP_GPMI_CTRL0_ADDRESS 17 +#define BM_GPMI_CTRL0_ADDRESS 0x000E0000 +#define BF_GPMI_CTRL0_ADDRESS(v) \ + (((v) << 17) & BM_GPMI_CTRL0_ADDRESS) +#define BV_GPMI_CTRL0_ADDRESS__NAND_DATA 0x0 +#define BV_GPMI_CTRL0_ADDRESS__NAND_CLE 0x1 +#define BV_GPMI_CTRL0_ADDRESS__NAND_ALE 0x2 +#define BM_GPMI_CTRL0_ADDRESS_INCREMENT 0x00010000 +#define BV_GPMI_CTRL0_ADDRESS_INCREMENT__DISABLED 0x0 +#define BV_GPMI_CTRL0_ADDRESS_INCREMENT__ENABLED 0x1 +#define BP_GPMI_CTRL0_XFER_COUNT 0 +#define BM_GPMI_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_GPMI_CTRL0_XFER_COUNT(v) \ + (((v) << 0) & BM_GPMI_CTRL0_XFER_COUNT) + +#define HW_GPMI_COMPARE (0x00000010) +#define HW_GPMI_COMPARE_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_COMPARE) + +#define BP_GPMI_COMPARE_MASK 16 +#define BM_GPMI_COMPARE_MASK 0xFFFF0000 +#define BF_GPMI_COMPARE_MASK(v) \ + (((v) << 16) & BM_GPMI_COMPARE_MASK) +#define BP_GPMI_COMPARE_REFERENCE 0 +#define BM_GPMI_COMPARE_REFERENCE 0x0000FFFF +#define BF_GPMI_COMPARE_REFERENCE(v) \ + (((v) << 0) & BM_GPMI_COMPARE_REFERENCE) + +#define HW_GPMI_ECCCTRL (0x00000020) +#define HW_GPMI_ECCCTRL_SET (0x00000024) +#define HW_GPMI_ECCCTRL_CLR (0x00000028) +#define HW_GPMI_ECCCTRL_TOG (0x0000002c) +#define HW_GPMI_ECCCTRL_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_ECCCTRL) +#define HW_GPMI_ECCCTRL_SET_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_ECCCTRL_SET) +#define HW_GPMI_ECCCTRL_CLR_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_ECCCTRL_CLR) +#define HW_GPMI_ECCCTRL_TOG_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_ECCCTRL_TOG) + +#define BP_GPMI_ECCCTRL_HANDLE 16 +#define BM_GPMI_ECCCTRL_HANDLE 0xFFFF0000 +#define BF_GPMI_ECCCTRL_HANDLE(v) \ + (((v) << 16) & BM_GPMI_ECCCTRL_HANDLE) +#define BM_GPMI_ECCCTRL_RSVD2 0x00008000 #define BP_GPMI_ECCCTRL_ECC_CMD 13 -#define BV_GPMI_ECCCTRL_ECC_CMD__DECODE_4_BIT 0 -#define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_4_BIT 1 -#define BV_GPMI_ECCCTRL_ECC_CMD__DECODE_8_BIT 2 -#define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_8_BIT 3 +#define BM_GPMI_ECCCTRL_ECC_CMD 0x00006000 +#define BF_GPMI_ECCCTRL_ECC_CMD(v) \ + (((v) << 13) & BM_GPMI_ECCCTRL_ECC_CMD) +#define BV_GPMI_ECCCTRL_ECC_CMD__DECODE_4_BIT 0x0 +#define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_4_BIT 0x1 +#define BV_GPMI_ECCCTRL_ECC_CMD__DECODE_8_BIT 0x2 +#define BV_GPMI_ECCCTRL_ECC_CMD__ENCODE_8_BIT 0x3 +#define BM_GPMI_ECCCTRL_ENABLE_ECC 0x00001000 +#define BV_GPMI_ECCCTRL_ENABLE_ECC__ENABLE 0x1 +#define BV_GPMI_ECCCTRL_ENABLE_ECC__DISABLE 0x0 +#define BP_GPMI_ECCCTRL_RSVD1 9 +#define BM_GPMI_ECCCTRL_RSVD1 0x00000E00 +#define BF_GPMI_ECCCTRL_RSVD1(v) \ + (((v) << 9) & BM_GPMI_ECCCTRL_RSVD1) +#define BP_GPMI_ECCCTRL_BUFFER_MASK 0 +#define BM_GPMI_ECCCTRL_BUFFER_MASK 0x000001FF +#define BF_GPMI_ECCCTRL_BUFFER_MASK(v) \ + (((v) << 0) & BM_GPMI_ECCCTRL_BUFFER_MASK) +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_AUXONLY 0x100 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BCH_PAGE 0x1FF +#define BV_GPMI_ECCCTRL_BUFFER_MASK__AUXILIARY 0x100 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER7 0x080 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER6 0x040 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER5 0x020 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER4 0x010 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER3 0x008 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER2 0x004 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER1 0x002 +#define BV_GPMI_ECCCTRL_BUFFER_MASK__BUFFER0 0x001 + +#define HW_GPMI_ECCCOUNT (0x00000030) +#define HW_GPMI_ECCCOUNT_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_ECCCOUNT) + +#define BP_GPMI_ECCCOUNT_RSVD2 16 +#define BM_GPMI_ECCCOUNT_RSVD2 0xFFFF0000 +#define BF_GPMI_ECCCOUNT_RSVD2(v) \ + (((v) << 16) & BM_GPMI_ECCCOUNT_RSVD2) +#define BP_GPMI_ECCCOUNT_COUNT 0 +#define BM_GPMI_ECCCOUNT_COUNT 0x0000FFFF +#define BF_GPMI_ECCCOUNT_COUNT(v) \ + (((v) << 0) & BM_GPMI_ECCCOUNT_COUNT) + +#define HW_GPMI_PAYLOAD (0x00000040) +#define HW_GPMI_PAYLOAD_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_PAYLOAD) -#define HW_GPMI_CTRL1 0x60 +#define BP_GPMI_PAYLOAD_ADDRESS 2 +#define BM_GPMI_PAYLOAD_ADDRESS 0xFFFFFFFC +#define BF_GPMI_PAYLOAD_ADDRESS(v) \ + (((v) << 2) & BM_GPMI_PAYLOAD_ADDRESS) +#define BP_GPMI_PAYLOAD_RSVD0 0 +#define BM_GPMI_PAYLOAD_RSVD0 0x00000003 +#define BF_GPMI_PAYLOAD_RSVD0(v) \ + (((v) << 0) & BM_GPMI_PAYLOAD_RSVD0) + +#define HW_GPMI_AUXILIARY (0x00000050) +#define HW_GPMI_AUXILIARY_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_AUXILIARY) + +#define BP_GPMI_AUXILIARY_ADDRESS 2 +#define BM_GPMI_AUXILIARY_ADDRESS 0xFFFFFFFC +#define BF_GPMI_AUXILIARY_ADDRESS(v) \ + (((v) << 2) & BM_GPMI_AUXILIARY_ADDRESS) +#define BP_GPMI_AUXILIARY_RSVD0 0 +#define BM_GPMI_AUXILIARY_RSVD0 0x00000003 +#define BF_GPMI_AUXILIARY_RSVD0(v) \ + (((v) << 0) & BM_GPMI_AUXILIARY_RSVD0) + +#define HW_GPMI_CTRL1 (0x00000060) +#define HW_GPMI_CTRL1_SET (0x00000064) +#define HW_GPMI_CTRL1_CLR (0x00000068) +#define HW_GPMI_CTRL1_TOG (0x0000006c) +#define HW_GPMI_CTRL1_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL1) +#define HW_GPMI_CTRL1_SET_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL1_SET) +#define HW_GPMI_CTRL1_CLR_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL1_CLR) +#define HW_GPMI_CTRL1_TOG_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_CTRL1_TOG) + +#define BP_GPMI_CTRL1_RSVD2 24 +#define BM_GPMI_CTRL1_RSVD2 0xFF000000 +#define BF_GPMI_CTRL1_RSVD2(v) \ + (((v) << 24) & BM_GPMI_CTRL1_RSVD2) +#define BM_GPMI_CTRL1_CE3_SEL 0x00800000 +#define BM_GPMI_CTRL1_CE2_SEL 0x00400000 +#define BM_GPMI_CTRL1_CE1_SEL 0x00200000 +#define BM_GPMI_CTRL1_CE0_SEL 0x00100000 +#define BM_GPMI_CTRL1_GANGED_RDYBUSY 0x00080000 #define BM_GPMI_CTRL1_GPMI_MODE 0x00000001 #define BP_GPMI_CTRL1_GPMI_MODE 0 #define BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY 0x00000004 @@ -64,15 +221,233 @@ #define BM_GPMI_CTRL1_RDN_DELAY 0x0000F000 #define BP_GPMI_CTRL1_RDN_DELAY 12 #define BM_GPMI_CTRL1_BCH_MODE 0x00040000 +#define BP_GPMI_CTRL1_DLL_ENABLE 17 +#define BM_GPMI_CTRL1_DLL_ENABLE 0x00020000 +#define BP_GPMI_CTRL1_HALF_PERIOD 16 +#define BM_GPMI_CTRL1_HALF_PERIOD 0x00010000 +#define BP_GPMI_CTRL1_RDN_DELAY 12 +#define BM_GPMI_CTRL1_RDN_DELAY 0x0000F000 +#define BF_GPMI_CTRL1_RDN_DELAY(v) \ + (((v) << 12) & BM_GPMI_CTRL1_RDN_DELAY) +#define BM_GPMI_CTRL1_DMA2ECC_MODE 0x00000800 +#define BM_GPMI_CTRL1_DEV_IRQ 0x00000400 +#define BM_GPMI_CTRL1_TIMEOUT_IRQ 0x00000200 +#define BM_GPMI_CTRL1_BURST_EN 0x00000100 +#define BM_GPMI_CTRL1_ABORT_WAIT_FOR_READY3 0x00000080 +#define BM_GPMI_CTRL1_ABORT_WAIT_FOR_READY2 0x00000040 +#define BM_GPMI_CTRL1_ABORT_WAIT_FOR_READY1 0x00000020 +#define BM_GPMI_CTRL1_ABORT_WAIT_FOR_READY0 0x00000010 +#define BM_GPMI_CTRL1_DEV_RESET 0x00000008 +#define BV_GPMI_CTRL1_DEV_RESET__ENABLED 0x0 +#define BV_GPMI_CTRL1_DEV_RESET__DISABLED 0x1 +#define BM_GPMI_CTRL1_ATA_IRQRDY_POLARITY 0x00000004 +#define BV_GPMI_CTRL1_ATA_IRQRDY_POLARITY__ACTIVELOW 0x0 +#define BV_GPMI_CTRL1_ATA_IRQRDY_POLARITY__ACTIVEHIGH 0x1 +#define BM_GPMI_CTRL1_CAMERA_MODE 0x00000002 +#define BM_GPMI_CTRL1_GPMI_MODE 0x00000001 +#define BV_GPMI_CTRL1_GPMI_MODE__NAND 0x0 +#define BV_GPMI_CTRL1_GPMI_MODE__ATA 0x1 -#define HW_GPMI_TIMING0 0x70 -#define BM_GPMI_TIMING0_DATA_SETUP 0x000000FF -#define BP_GPMI_TIMING0_DATA_SETUP 0 -#define BM_GPMI_TIMING0_DATA_HOLD 0x0000FF00 -#define BP_GPMI_TIMING0_DATA_HOLD 8 -#define BM_GPMI_TIMING0_ADDRESS_SETUP 0x00FF0000 +#define HW_GPMI_TIMING0 (0x00000070) +#define HW_GPMI_TIMING0_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_TIMING0) + +#define BP_GPMI_TIMING0_RSVD1 24 +#define BM_GPMI_TIMING0_RSVD1 0xFF000000 +#define BF_GPMI_TIMING0_RSVD1(v) \ + (((v) << 24) & BM_GPMI_TIMING0_RSVD1) #define BP_GPMI_TIMING0_ADDRESS_SETUP 16 +#define BM_GPMI_TIMING0_ADDRESS_SETUP 0x00FF0000 +#define BF_GPMI_TIMING0_ADDRESS_SETUP(v) \ + (((v) << 16) & BM_GPMI_TIMING0_ADDRESS_SETUP) +#define BP_GPMI_TIMING0_DATA_HOLD 8 +#define BM_GPMI_TIMING0_DATA_HOLD 0x0000FF00 +#define BF_GPMI_TIMING0_DATA_HOLD(v) \ + (((v) << 8) & BM_GPMI_TIMING0_DATA_HOLD) +#define BP_GPMI_TIMING0_DATA_SETUP 0 +#define BM_GPMI_TIMING0_DATA_SETUP 0x000000FF +#define BF_GPMI_TIMING0_DATA_SETUP(v) \ + (((v) << 0) & BM_GPMI_TIMING0_DATA_SETUP) + +#define HW_GPMI_TIMING1 (0x00000080) +#define HW_GPMI_TIMING1_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_TIMING1) -#define HW_GPMI_TIMING1 0x80 -#define BM_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT 0xFFFF0000 #define BP_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT 16 +#define BM_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT 0xFFFF0000 +#define BF_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT(v) \ + (((v) << 16) & BM_GPMI_TIMING1_DEVICE_BUSY_TIMEOUT) +#define BP_GPMI_TIMING1_RSVD1 0 +#define BM_GPMI_TIMING1_RSVD1 0x0000FFFF +#define BF_GPMI_TIMING1_RSVD1(v) \ + (((v) << 0) & BM_GPMI_TIMING1_RSVD1) + +#define HW_GPMI_TIMING2 (0x00000090) +#define HW_GPMI_TIMING2_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_TIMING2) + +#define BP_GPMI_TIMING2_UDMA_TRP 24 +#define BM_GPMI_TIMING2_UDMA_TRP 0xFF000000 +#define BF_GPMI_TIMING2_UDMA_TRP(v) \ + (((v) << 24) & BM_GPMI_TIMING2_UDMA_TRP) +#define BP_GPMI_TIMING2_UDMA_ENV 16 +#define BM_GPMI_TIMING2_UDMA_ENV 0x00FF0000 +#define BF_GPMI_TIMING2_UDMA_ENV(v) \ + (((v) << 16) & BM_GPMI_TIMING2_UDMA_ENV) +#define BP_GPMI_TIMING2_UDMA_HOLD 8 +#define BM_GPMI_TIMING2_UDMA_HOLD 0x0000FF00 +#define BF_GPMI_TIMING2_UDMA_HOLD(v) \ + (((v) << 8) & BM_GPMI_TIMING2_UDMA_HOLD) +#define BP_GPMI_TIMING2_UDMA_SETUP 0 +#define BM_GPMI_TIMING2_UDMA_SETUP 0x000000FF +#define BF_GPMI_TIMING2_UDMA_SETUP(v) \ + (((v) << 0) & BM_GPMI_TIMING2_UDMA_SETUP) + +#define HW_GPMI_DATA (0x000000a0) +#define HW_GPMI_DATA_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_DATA) + +#define BP_GPMI_DATA_DATA 0 +#define BM_GPMI_DATA_DATA 0xFFFFFFFF +#define BF_GPMI_DATA_DATA(v) (v) + +#define HW_GPMI_STAT (0x000000b0) +#define HW_GPMI_STAT_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_STAT) + +#define BM_GPMI_STAT_PRESENT 0x80000000 +#define BV_GPMI_STAT_PRESENT__UNAVAILABLE 0x0 +#define BV_GPMI_STAT_PRESENT__AVAILABLE 0x1 +#define BP_GPMI_STAT_RSVD1 12 +#define BM_GPMI_STAT_RSVD1 0x7FFFF000 +#define BF_GPMI_STAT_RSVD1(v) \ + (((v) << 12) & BM_GPMI_STAT_RSVD1) +#define BP_GPMI_STAT_RDY_TIMEOUT 8 +#define BM_GPMI_STAT_RDY_TIMEOUT 0x00000F00 +#define BF_GPMI_STAT_RDY_TIMEOUT(v) \ + (((v) << 8) & BM_GPMI_STAT_RDY_TIMEOUT) +#define BM_GPMI_STAT_ATA_IRQ 0x00000080 +#define BM_GPMI_STAT_INVALID_BUFFER_MASK 0x00000040 +#define BM_GPMI_STAT_FIFO_EMPTY 0x00000020 +#define BV_GPMI_STAT_FIFO_EMPTY__NOT_EMPTY 0x0 +#define BV_GPMI_STAT_FIFO_EMPTY__EMPTY 0x1 +#define BM_GPMI_STAT_FIFO_FULL 0x00000010 +#define BV_GPMI_STAT_FIFO_FULL__NOT_FULL 0x0 +#define BV_GPMI_STAT_FIFO_FULL__FULL 0x1 +#define BM_GPMI_STAT_DEV3_ERROR 0x00000008 +#define BM_GPMI_STAT_DEV2_ERROR 0x00000004 +#define BM_GPMI_STAT_DEV1_ERROR 0x00000002 +#define BM_GPMI_STAT_DEV0_ERROR 0x00000001 + +#define HW_GPMI_DEBUG (0x000000c0) +#define HW_GPMI_DEBUG_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_DEBUG) + +#define BM_GPMI_DEBUG_READY3 0x80000000 +#define BM_GPMI_DEBUG_READY2 0x40000000 +#define BM_GPMI_DEBUG_READY1 0x20000000 +#define BM_GPMI_DEBUG_READY0 0x10000000 +#define BM_GPMI_DEBUG_WAIT_FOR_READY_END3 0x08000000 +#define BM_GPMI_DEBUG_WAIT_FOR_READY_END2 0x04000000 +#define BM_GPMI_DEBUG_WAIT_FOR_READY_END1 0x02000000 +#define BM_GPMI_DEBUG_WAIT_FOR_READY_END0 0x01000000 +#define BM_GPMI_DEBUG_SENSE3 0x00800000 +#define BM_GPMI_DEBUG_SENSE2 0x00400000 +#define BM_GPMI_DEBUG_SENSE1 0x00200000 +#define BM_GPMI_DEBUG_SENSE0 0x00100000 +#define BM_GPMI_DEBUG_DMAREQ3 0x00080000 +#define BM_GPMI_DEBUG_DMAREQ2 0x00040000 +#define BM_GPMI_DEBUG_DMAREQ1 0x00020000 +#define BM_GPMI_DEBUG_DMAREQ0 0x00010000 +#define BP_GPMI_DEBUG_CMD_END 12 +#define BM_GPMI_DEBUG_CMD_END 0x0000F000 +#define BF_GPMI_DEBUG_CMD_END(v) \ + (((v) << 12) & BM_GPMI_DEBUG_CMD_END) +#define BP_GPMI_DEBUG_UDMA_STATE 8 +#define BM_GPMI_DEBUG_UDMA_STATE 0x00000F00 +#define BF_GPMI_DEBUG_UDMA_STATE(v) \ + (((v) << 8) & BM_GPMI_DEBUG_UDMA_STATE) +#define BM_GPMI_DEBUG_BUSY 0x00000080 +#define BV_GPMI_DEBUG_BUSY__DISABLED 0x0 +#define BV_GPMI_DEBUG_BUSY__ENABLED 0x1 +#define BP_GPMI_DEBUG_PIN_STATE 4 +#define BM_GPMI_DEBUG_PIN_STATE 0x00000070 +#define BF_GPMI_DEBUG_PIN_STATE(v) \ + (((v) << 4) & BM_GPMI_DEBUG_PIN_STATE) +#define BV_GPMI_DEBUG_PIN_STATE__PSM_IDLE 0x0 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_BYTCNT 0x1 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_ADDR 0x2 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_STALL 0x3 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_STROBE 0x4 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_ATARDY 0x5 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_DHOLD 0x6 +#define BV_GPMI_DEBUG_PIN_STATE__PSM_DONE 0x7 +#define BP_GPMI_DEBUG_MAIN_STATE 0 +#define BM_GPMI_DEBUG_MAIN_STATE 0x0000000F +#define BF_GPMI_DEBUG_MAIN_STATE(v) \ + (((v) << 0) & BM_GPMI_DEBUG_MAIN_STATE) +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_IDLE 0x0 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_BYTCNT 0x1 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_WAITFE 0x2 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_WAITFR 0x3 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_DMAREQ 0x4 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_DMAACK 0x5 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_WAITFF 0x6 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_LDFIFO 0x7 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_LDDMAR 0x8 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_RDCMP 0x9 +#define BV_GPMI_DEBUG_MAIN_STATE__MSM_DONE 0xA + +#define HW_GPMI_VERSION (0x000000d0) +#define HW_GPMI_VERSION_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_VERSION) + +#define BP_GPMI_VERSION_MAJOR 24 +#define BM_GPMI_VERSION_MAJOR 0xFF000000 +#define BF_GPMI_VERSION_MAJOR(v) \ + (((v) << 24) & BM_GPMI_VERSION_MAJOR) +#define BP_GPMI_VERSION_MINOR 16 +#define BM_GPMI_VERSION_MINOR 0x00FF0000 +#define BF_GPMI_VERSION_MINOR(v) \ + (((v) << 16) & BM_GPMI_VERSION_MINOR) +#define BP_GPMI_VERSION_STEP 0 +#define BM_GPMI_VERSION_STEP 0x0000FFFF +#define BF_GPMI_VERSION_STEP(v) \ + (((v) << 0) & BM_GPMI_VERSION_STEP) + +#define HW_GPMI_DEBUG2 (0x000000e0) +#define HW_GPMI_DEBUG2_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_DEBUG2) + +#define BP_GPMI_DEBUG2_RSVD1 16 +#define BM_GPMI_DEBUG2_RSVD1 0xFFFF0000 +#define BF_GPMI_DEBUG2_RSVD1(v) \ + (((v) << 16) & BM_GPMI_DEBUG2_RSVD1) +#define BP_GPMI_DEBUG2_SYND2GPMI_BE 12 +#define BM_GPMI_DEBUG2_SYND2GPMI_BE 0x0000F000 +#define BF_GPMI_DEBUG2_SYND2GPMI_BE(v) \ + (((v) << 12) & BM_GPMI_DEBUG2_SYND2GPMI_BE) +#define BM_GPMI_DEBUG2_GPMI2SYND_VALID 0x00000800 +#define BM_GPMI_DEBUG2_GPMI2SYND_READY 0x00000400 +#define BM_GPMI_DEBUG2_SYND2GPMI_VALID 0x00000200 +#define BM_GPMI_DEBUG2_SYND2GPMI_READY 0x00000100 +#define BM_GPMI_DEBUG2_VIEW_DELAYED_RDN 0x00000080 +#define BM_GPMI_DEBUG2_UPDATE_WINDOW 0x00000040 +#define BP_GPMI_DEBUG2_RDN_TAP 0 +#define BM_GPMI_DEBUG2_RDN_TAP 0x0000003F +#define BF_GPMI_DEBUG2_RDN_TAP(v) \ + (((v) << 0) & BM_GPMI_DEBUG2_RDN_TAP) + +#define HW_GPMI_DEBUG3 (0x000000f0) +#define HW_GPMI_DEBUG3_ADDR \ + (REGS_GPMI_BASE + HW_GPMI_DEBUG3) + +#define BP_GPMI_DEBUG3_APB_WORD_CNTR 16 +#define BM_GPMI_DEBUG3_APB_WORD_CNTR 0xFFFF0000 +#define BF_GPMI_DEBUG3_APB_WORD_CNTR(v) \ + (((v) << 16) & BM_GPMI_DEBUG3_APB_WORD_CNTR) +#define BP_GPMI_DEBUG3_DEV_WORD_CNTR 0 +#define BM_GPMI_DEBUG3_DEV_WORD_CNTR 0x0000FFFF +#define BF_GPMI_DEBUG3_DEV_WORD_CNTR(v) \ + (((v) << 0) & BM_GPMI_DEBUG3_DEV_WORD_CNTR) +#endif /* __ARCH_ARM___GPMI_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-ecc8.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-ecc8.h @@ -1,7 +1,7 @@ /* - * stmp378x: ECC8 register definitions + * STMP ECC8 Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,23 +17,337 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_ECC8_BASE (STMP3XXX_REGS_BASE + 0x8000) -#define REGS_ECC8_PHYS 0x80008000 -#define REGS_ECC8_SIZE 0x2000 -#define HW_ECC8_CTRL 0x0 -#define BM_ECC8_CTRL_COMPLETE_IRQ 0x00000001 -#define BP_ECC8_CTRL_COMPLETE_IRQ 0 -#define BM_ECC8_CTRL_COMPLETE_IRQ_EN 0x00000100 +#ifndef __ARCH_ARM___ECC8_H +#define __ARCH_ARM___ECC8_H 1 + +#define REGS_ECC8_BASE (STMP3XXX_REGS_BASE + 0x8000) +#define REGS_ECC8_PHYS (0x80008000) +#define REGS_ECC8_SIZE 0x00002000 + +#define HW_ECC8_CTRL (0x00000000) +#define HW_ECC8_CTRL_SET (0x00000004) +#define HW_ECC8_CTRL_CLR (0x00000008) +#define HW_ECC8_CTRL_TOG (0x0000000c) +#define HW_ECC8_CTRL_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_CTRL) +#define HW_ECC8_CTRL_SET_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_CTRL_SET) +#define HW_ECC8_CTRL_CLR_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_CTRL_CLR) +#define HW_ECC8_CTRL_TOG_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_CTRL_TOG) + +#define BM_ECC8_CTRL_SFTRST 0x80000000 +#define BV_ECC8_CTRL_SFTRST__RUN 0x0 +#define BV_ECC8_CTRL_SFTRST__RESET 0x1 +#define BM_ECC8_CTRL_CLKGATE 0x40000000 +#define BV_ECC8_CTRL_CLKGATE__RUN 0x0 +#define BV_ECC8_CTRL_CLKGATE__NO_CLKS 0x1 #define BM_ECC8_CTRL_AHBM_SFTRST 0x20000000 +#define BV_ECC8_CTRL_AHBM_SFTRST__RUN 0x0 +#define BV_ECC8_CTRL_AHBM_SFTRST__RESET 0x1 +#define BM_ECC8_CTRL_RSRVD2 0x10000000 +#define BP_ECC8_CTRL_THROTTLE 24 +#define BM_ECC8_CTRL_THROTTLE 0x0F000000 +#define BF_ECC8_CTRL_THROTTLE(v) \ + (((v) << 24) & BM_ECC8_CTRL_THROTTLE) +#define BP_ECC8_CTRL_RSRVD1 11 +#define BM_ECC8_CTRL_RSRVD1 0x00FFF800 +#define BF_ECC8_CTRL_RSRVD1(v) \ + (((v) << 11) & BM_ECC8_CTRL_RSRVD1) +#define BM_ECC8_CTRL_DEBUG_STALL_IRQ_EN 0x00000400 +#define BM_ECC8_CTRL_DEBUG_WRITE_IRQ_EN 0x00000200 +#define BM_ECC8_CTRL_COMPLETE_IRQ_EN 0x00000100 +#define BP_ECC8_CTRL_RSRVD0 4 +#define BM_ECC8_CTRL_RSRVD0 0x000000F0 +#define BF_ECC8_CTRL_RSRVD0(v) \ + (((v) << 4) & BM_ECC8_CTRL_RSRVD0) +#define BM_ECC8_CTRL_BM_ERROR_IRQ 0x00000008 +#define BM_ECC8_CTRL_DEBUG_STALL_IRQ 0x00000004 +#define BM_ECC8_CTRL_DEBUG_WRITE_IRQ 0x00000002 +#define BM_ECC8_CTRL_COMPLETE_IRQ 0x00000001 -#define HW_ECC8_STATUS0 0x10 -#define BM_ECC8_STATUS0_UNCORRECTABLE 0x00000004 -#define BM_ECC8_STATUS0_CORRECTED 0x00000008 -#define BM_ECC8_STATUS0_STATUS_AUX 0x00000F00 -#define BP_ECC8_STATUS0_STATUS_AUX 8 -#define BM_ECC8_STATUS0_COMPLETED_CE 0x000F0000 +#define HW_ECC8_STATUS0 (0x00000010) +#define HW_ECC8_STATUS0_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_STATUS0) + +#define BP_ECC8_STATUS0_HANDLE 20 +#define BM_ECC8_STATUS0_HANDLE 0xFFF00000 +#define BF_ECC8_STATUS0_HANDLE(v) \ + (((v) << 20) & BM_ECC8_STATUS0_HANDLE) #define BP_ECC8_STATUS0_COMPLETED_CE 16 +#define BM_ECC8_STATUS0_COMPLETED_CE 0x000F0000 +#define BF_ECC8_STATUS0_COMPLETED_CE(v) \ + (((v) << 16) & BM_ECC8_STATUS0_COMPLETED_CE) +#define BM_ECC8_STATUS0_RS8ECC_ENC_PRESENT 0x00008000 +#define BM_ECC8_STATUS0_RS8ECC_DEC_PRESENT 0x00004000 +#define BM_ECC8_STATUS0_RS4ECC_ENC_PRESENT 0x00002000 +#define BM_ECC8_STATUS0_RS4ECC_DEC_PRESENT 0x00001000 +#define BP_ECC8_STATUS0_STATUS_AUX 8 +#define BM_ECC8_STATUS0_STATUS_AUX 0x00000F00 +#define BF_ECC8_STATUS0_STATUS_AUX(v) \ + (((v) << 8) & BM_ECC8_STATUS0_STATUS_AUX) +#define BV_ECC8_STATUS0_STATUS_AUX__NO_ERRORS 0x0 +#define BV_ECC8_STATUS0_STATUS_AUX__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS0_STATUS_AUX__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS0_STATUS_AUX__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS0_STATUS_AUX__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS0_STATUS_AUX__NOT_CHECKED 0xC +#define BV_ECC8_STATUS0_STATUS_AUX__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS0_STATUS_AUX__ALL_ONES 0xF +#define BP_ECC8_STATUS0_RSVD1 5 +#define BM_ECC8_STATUS0_RSVD1 0x000000E0 +#define BF_ECC8_STATUS0_RSVD1(v) \ + (((v) << 5) & BM_ECC8_STATUS0_RSVD1) +#define BM_ECC8_STATUS0_ALLONES 0x00000010 +#define BM_ECC8_STATUS0_CORRECTED 0x00000008 +#define BM_ECC8_STATUS0_UNCORRECTABLE 0x00000004 +#define BP_ECC8_STATUS0_RSVD0 0 +#define BM_ECC8_STATUS0_RSVD0 0x00000003 +#define BF_ECC8_STATUS0_RSVD0(v) \ + (((v) << 0) & BM_ECC8_STATUS0_RSVD0) + +#define HW_ECC8_STATUS1 (0x00000020) +#define HW_ECC8_STATUS1_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_STATUS1) + +#define BP_ECC8_STATUS1_STATUS_PAYLOAD7 28 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD7 0xF0000000 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD7(v) \ + (((v) << 28) & BM_ECC8_STATUS1_STATUS_PAYLOAD7) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD6 24 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD6 0x0F000000 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD6(v) \ + (((v) << 24) & BM_ECC8_STATUS1_STATUS_PAYLOAD6) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD5 20 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD5 0x00F00000 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD5(v) \ + (((v) << 20) & BM_ECC8_STATUS1_STATUS_PAYLOAD5) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD4 16 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD4 0x000F0000 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD4(v) \ + (((v) << 16) & BM_ECC8_STATUS1_STATUS_PAYLOAD4) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD3 12 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD3 0x0000F000 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD3(v) \ + (((v) << 12) & BM_ECC8_STATUS1_STATUS_PAYLOAD3) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD2 8 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD2 0x00000F00 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD2(v) \ + (((v) << 8) & BM_ECC8_STATUS1_STATUS_PAYLOAD2) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD1 4 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD1 0x000000F0 +#define BF_ECC8_STATUS1_STATUS_PAYLOAD1(v) \ + (((v) << 4) & BM_ECC8_STATUS1_STATUS_PAYLOAD1) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__ALL_ONES 0xF +#define BP_ECC8_STATUS1_STATUS_PAYLOAD0 0 +#define BM_ECC8_STATUS1_STATUS_PAYLOAD0 0x0000000F +#define BF_ECC8_STATUS1_STATUS_PAYLOAD0(v) \ + (((v) << 0) & BM_ECC8_STATUS1_STATUS_PAYLOAD0) +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__NO_ERRORS 0x0 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__ONE_CORRECTABLE 0x1 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__TWO_CORRECTABLE 0x2 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__THREE_CORRECTABLE 0x3 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__FOUR_CORRECTABLE 0x4 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__FIVE_CORRECTABLE 0x5 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__SIX_CORRECTABLE 0x6 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__SEVEN_CORRECTABLE 0x7 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__EIGHT_CORRECTABLE 0x8 +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__NOT_CHECKED 0xC +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__UNCORRECTABLE 0xE +#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__ALL_ONES 0xF + +#define HW_ECC8_DEBUG0 (0x00000030) +#define HW_ECC8_DEBUG0_SET (0x00000034) +#define HW_ECC8_DEBUG0_CLR (0x00000038) +#define HW_ECC8_DEBUG0_TOG (0x0000003c) +#define HW_ECC8_DEBUG0_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DEBUG0) +#define HW_ECC8_DEBUG0_SET_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DEBUG0_SET) +#define HW_ECC8_DEBUG0_CLR_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DEBUG0_CLR) +#define HW_ECC8_DEBUG0_TOG_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DEBUG0_TOG) + +#define BP_ECC8_DEBUG0_RSRVD1 25 +#define BM_ECC8_DEBUG0_RSRVD1 0xFE000000 +#define BF_ECC8_DEBUG0_RSRVD1(v) \ + (((v) << 25) & BM_ECC8_DEBUG0_RSRVD1) +#define BP_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 16 +#define BM_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 0x01FF0000 +#define BF_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(v) \ + (((v) << 16) & BM_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL) +#define BV_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__NORMAL 0x0 +#define BV_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__TEST_MODE 0x1 +#define BM_ECC8_DEBUG0_KES_DEBUG_SHIFT_SYND 0x00008000 +#define BM_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG 0x00004000 +#define BV_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__DATA 0x1 +#define BV_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__AUX 0x1 +#define BM_ECC8_DEBUG0_KES_DEBUG_MODE4K 0x00002000 +#define BV_ECC8_DEBUG0_KES_DEBUG_MODE4K__4k 0x1 +#define BV_ECC8_DEBUG0_KES_DEBUG_MODE4K__2k 0x1 +#define BM_ECC8_DEBUG0_KES_DEBUG_KICK 0x00001000 +#define BM_ECC8_DEBUG0_KES_STANDALONE 0x00000800 +#define BV_ECC8_DEBUG0_KES_STANDALONE__NORMAL 0x0 +#define BV_ECC8_DEBUG0_KES_STANDALONE__TEST_MODE 0x1 +#define BM_ECC8_DEBUG0_KES_DEBUG_STEP 0x00000400 +#define BM_ECC8_DEBUG0_KES_DEBUG_STALL 0x00000200 +#define BV_ECC8_DEBUG0_KES_DEBUG_STALL__NORMAL 0x0 +#define BV_ECC8_DEBUG0_KES_DEBUG_STALL__WAIT 0x1 +#define BM_ECC8_DEBUG0_BM_KES_TEST_BYPASS 0x00000100 +#define BV_ECC8_DEBUG0_BM_KES_TEST_BYPASS__NORMAL 0x0 +#define BV_ECC8_DEBUG0_BM_KES_TEST_BYPASS__TEST_MODE 0x1 +#define BP_ECC8_DEBUG0_RSRVD0 6 +#define BM_ECC8_DEBUG0_RSRVD0 0x000000C0 +#define BF_ECC8_DEBUG0_RSRVD0(v) \ + (((v) << 6) & BM_ECC8_DEBUG0_RSRVD0) +#define BP_ECC8_DEBUG0_DEBUG_REG_SELECT 0 +#define BM_ECC8_DEBUG0_DEBUG_REG_SELECT 0x0000003F +#define BF_ECC8_DEBUG0_DEBUG_REG_SELECT(v) \ + (((v) << 0) & BM_ECC8_DEBUG0_DEBUG_REG_SELECT) + +#define HW_ECC8_DBGKESREAD (0x00000040) +#define HW_ECC8_DBGKESREAD_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DBGKESREAD) + +#define BP_ECC8_DBGKESREAD_VALUES 0 +#define BM_ECC8_DBGKESREAD_VALUES 0xFFFFFFFF +#define BF_ECC8_DBGKESREAD_VALUES(v) (v) + +#define HW_ECC8_DBGCSFEREAD (0x00000050) +#define HW_ECC8_DBGCSFEREAD_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DBGCSFEREAD) + +#define BP_ECC8_DBGCSFEREAD_VALUES 0 +#define BM_ECC8_DBGCSFEREAD_VALUES 0xFFFFFFFF +#define BF_ECC8_DBGCSFEREAD_VALUES(v) (v) + +#define HW_ECC8_DBGSYNDGENREAD (0x00000060) +#define HW_ECC8_DBGSYNDGENREAD_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DBGSYNDGENREAD) + +#define BP_ECC8_DBGSYNDGENREAD_VALUES 0 +#define BM_ECC8_DBGSYNDGENREAD_VALUES 0xFFFFFFFF +#define BF_ECC8_DBGSYNDGENREAD_VALUES(v) (v) + +#define HW_ECC8_DBGAHBMREAD (0x00000070) +#define HW_ECC8_DBGAHBMREAD_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_DBGAHBMREAD) + +#define BP_ECC8_DBGAHBMREAD_VALUES 0 +#define BM_ECC8_DBGAHBMREAD_VALUES 0xFFFFFFFF +#define BF_ECC8_DBGAHBMREAD_VALUES(v) (v) + +#define HW_ECC8_BLOCKNAME (0x00000080) +#define HW_ECC8_BLOCKNAME_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_BLOCKNAME) + +#define BP_ECC8_BLOCKNAME_NAME 0 +#define BM_ECC8_BLOCKNAME_NAME 0xFFFFFFFF +#define BF_ECC8_BLOCKNAME_NAME(v) (v) + +#define HW_ECC8_VERSION (0x000000a0) +#define HW_ECC8_VERSION_ADDR \ + (REGS_ECC8_BASE + HW_ECC8_VERSION) -#define HW_ECC8_STATUS1 0x20 +#define BP_ECC8_VERSION_MAJOR 24 +#define BM_ECC8_VERSION_MAJOR 0xFF000000 +#define BF_ECC8_VERSION_MAJOR(v) \ + (((v) << 24) & BM_ECC8_VERSION_MAJOR) +#define BP_ECC8_VERSION_MINOR 16 +#define BM_ECC8_VERSION_MINOR 0x00FF0000 +#define BF_ECC8_VERSION_MINOR(v) \ + (((v) << 16) & BM_ECC8_VERSION_MINOR) +#define BP_ECC8_VERSION_STEP 0 +#define BM_ECC8_VERSION_STEP 0x0000FFFF +#define BF_ECC8_VERSION_STEP(v) \ + (((v) << 0) & BM_ECC8_VERSION_STEP) +#endif /* __ARCH_ARM___ECC8_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-icoll.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-icoll.h @@ -1,7 +1,7 @@ /* - * stmp378x: ICOLL register definitions + * STMP ICOLL Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,29 +17,365 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_ICOLL -#define _MACH_REGS_ICOLL -#define REGS_ICOLL_BASE (STMP3XXX_REGS_BASE + 0x0) -#define REGS_ICOLL_PHYS 0x80000000 -#define REGS_ICOLL_SIZE 0x2000 +#ifndef __ARCH_ARM___ICOLL_H +#define __ARCH_ARM___ICOLL_H 1 -#define HW_ICOLL_VECTOR 0x0 +#define REGS_ICOLL_BASE (STMP3XXX_REGS_BASE + 0x0) +#define REGS_ICOLL_PHYS (0x80000000) +#define REGS_ICOLL_SIZE 0x00002000 -#define HW_ICOLL_LEVELACK 0x10 -#define BM_ICOLL_LEVELACK_IRQLEVELACK 0x0000000F +#define HW_ICOLL_VECTOR (0x00000000) +#define HW_ICOLL_VECTOR_SET (0x00000004) +#define HW_ICOLL_VECTOR_CLR (0x00000008) +#define HW_ICOLL_VECTOR_TOG (0x0000000c) +#define HW_ICOLL_VECTOR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VECTOR) +#define HW_ICOLL_VECTOR_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VECTOR_SET) +#define HW_ICOLL_VECTOR_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VECTOR_CLR) +#define HW_ICOLL_VECTOR_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VECTOR_TOG) + +#define BP_ICOLL_VECTOR_IRQVECTOR 2 +#define BM_ICOLL_VECTOR_IRQVECTOR 0xFFFFFFFC +#define BF_ICOLL_VECTOR_IRQVECTOR(v) \ + (((v) << 2) & BM_ICOLL_VECTOR_IRQVECTOR) +#define BP_ICOLL_VECTOR_RSRVD1 0 +#define BM_ICOLL_VECTOR_RSRVD1 0x00000003 +#define BF_ICOLL_VECTOR_RSRVD1(v) \ + (((v) << 0) & BM_ICOLL_VECTOR_RSRVD1) + +#define HW_ICOLL_LEVELACK (0x00000010) +#define HW_ICOLL_LEVELACK_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_LEVELACK) + +#define BP_ICOLL_LEVELACK_RSRVD1 4 +#define BM_ICOLL_LEVELACK_RSRVD1 0xFFFFFFF0 +#define BF_ICOLL_LEVELACK_RSRVD1(v) \ + (((v) << 4) & BM_ICOLL_LEVELACK_RSRVD1) #define BP_ICOLL_LEVELACK_IRQLEVELACK 0 +#define BM_ICOLL_LEVELACK_IRQLEVELACK 0x0000000F +#define BF_ICOLL_LEVELACK_IRQLEVELACK(v) \ + (((v) << 0) & BM_ICOLL_LEVELACK_IRQLEVELACK) +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL1 0x2 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL2 0x4 +#define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL3 0x8 + +#define HW_ICOLL_CTRL (0x00000020) +#define HW_ICOLL_CTRL_SET (0x00000024) +#define HW_ICOLL_CTRL_CLR (0x00000028) +#define HW_ICOLL_CTRL_TOG (0x0000002c) +#define HW_ICOLL_CTRL_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_CTRL) +#define HW_ICOLL_CTRL_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_CTRL_SET) +#define HW_ICOLL_CTRL_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_CTRL_CLR) +#define HW_ICOLL_CTRL_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_CTRL_TOG) -#define HW_ICOLL_CTRL 0x20 -#define BM_ICOLL_CTRL_CLKGATE 0x40000000 #define BM_ICOLL_CTRL_SFTRST 0x80000000 +#define BV_ICOLL_CTRL_SFTRST__RUN 0x0 +#define BV_ICOLL_CTRL_SFTRST__IN_RESET 0x1 +#define BM_ICOLL_CTRL_CLKGATE 0x40000000 +#define BV_ICOLL_CTRL_CLKGATE__RUN 0x0 +#define BV_ICOLL_CTRL_CLKGATE__NO_CLOCKS 0x1 +#define BP_ICOLL_CTRL_RSRVD3 24 +#define BM_ICOLL_CTRL_RSRVD3 0x3F000000 +#define BF_ICOLL_CTRL_RSRVD3(v) \ + (((v) << 24) & BM_ICOLL_CTRL_RSRVD3) +#define BP_ICOLL_CTRL_VECTOR_PITCH 21 +#define BM_ICOLL_CTRL_VECTOR_PITCH 0x00E00000 +#define BF_ICOLL_CTRL_VECTOR_PITCH(v) \ + (((v) << 21) & BM_ICOLL_CTRL_VECTOR_PITCH) +#define BV_ICOLL_CTRL_VECTOR_PITCH__DEFAULT_BY4 0x0 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY4 0x1 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY8 0x2 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY12 0x3 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY16 0x4 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY20 0x5 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY24 0x6 +#define BV_ICOLL_CTRL_VECTOR_PITCH__BY28 0x7 +#define BM_ICOLL_CTRL_BYPASS_FSM 0x00100000 +#define BV_ICOLL_CTRL_BYPASS_FSM__NORMAL 0x0 +#define BV_ICOLL_CTRL_BYPASS_FSM__BYPASS 0x1 +#define BM_ICOLL_CTRL_NO_NESTING 0x00080000 +#define BV_ICOLL_CTRL_NO_NESTING__NORMAL 0x0 +#define BV_ICOLL_CTRL_NO_NESTING__NO_NEST 0x1 +#define BM_ICOLL_CTRL_ARM_RSE_MODE 0x00040000 +#define BM_ICOLL_CTRL_FIQ_FINAL_ENABLE 0x00020000 +#define BV_ICOLL_CTRL_FIQ_FINAL_ENABLE__DISABLE 0x0 +#define BV_ICOLL_CTRL_FIQ_FINAL_ENABLE__ENABLE 0x1 +#define BM_ICOLL_CTRL_IRQ_FINAL_ENABLE 0x00010000 +#define BV_ICOLL_CTRL_IRQ_FINAL_ENABLE__DISABLE 0x0 +#define BV_ICOLL_CTRL_IRQ_FINAL_ENABLE__ENABLE 0x1 +#define BP_ICOLL_CTRL_RSRVD1 0 +#define BM_ICOLL_CTRL_RSRVD1 0x0000FFFF +#define BF_ICOLL_CTRL_RSRVD1(v) \ + (((v) << 0) & BM_ICOLL_CTRL_RSRVD1) + +#define HW_ICOLL_VBASE (0x00000040) +#define HW_ICOLL_VBASE_SET (0x00000044) +#define HW_ICOLL_VBASE_CLR (0x00000048) +#define HW_ICOLL_VBASE_TOG (0x0000004c) +#define HW_ICOLL_VBASE_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VBASE) +#define HW_ICOLL_VBASE_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VBASE_SET) +#define HW_ICOLL_VBASE_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VBASE_CLR) +#define HW_ICOLL_VBASE_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VBASE_TOG) + +#define BP_ICOLL_VBASE_TABLE_ADDRESS 2 +#define BM_ICOLL_VBASE_TABLE_ADDRESS 0xFFFFFFFC +#define BF_ICOLL_VBASE_TABLE_ADDRESS(v) \ + (((v) << 2) & BM_ICOLL_VBASE_TABLE_ADDRESS) +#define BP_ICOLL_VBASE_RSRVD1 0 +#define BM_ICOLL_VBASE_RSRVD1 0x00000003 +#define BF_ICOLL_VBASE_RSRVD1(v) \ + (((v) << 0) & BM_ICOLL_VBASE_RSRVD1) -#define HW_ICOLL_STAT 0x70 +#define HW_ICOLL_STAT (0x00000070) +#define HW_ICOLL_STAT_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_STAT) -#define HW_ICOLL_INTERRUPTn 0x120 +#define BP_ICOLL_STAT_RSRVD1 7 +#define BM_ICOLL_STAT_RSRVD1 0xFFFFFF80 +#define BF_ICOLL_STAT_RSRVD1(v) \ + (((v) << 7) & BM_ICOLL_STAT_RSRVD1) +#define BP_ICOLL_STAT_VECTOR_NUMBER 0 +#define BM_ICOLL_STAT_VECTOR_NUMBER 0x0000007F +#define BF_ICOLL_STAT_VECTOR_NUMBER(v) \ + (((v) << 0) & BM_ICOLL_STAT_VECTOR_NUMBER) + +/* + * multi-register-define name HW_ICOLL_RAWn + * base 0x000000A0 + * count 4 + * offset 0x10 + */ +#define HW_ICOLL_RAWn(n) (0x000000a0 + (n) * 0x10) +#define HW_ICOLL_RAWn_SET(n) (0x000000a4 + (n) * 0x10) +#define HW_ICOLL_RAWn_CLR(n) (0x000000a8 + (n) * 0x10) +#define HW_ICOLL_RAWn_TOG(n) (0x000000ac + (n) * 0x10) +#define HW_ICOLL_RAWn_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_RAWn(n)) +#define HW_ICOLL_RAWn_SET_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_RAWn_SET(n)) +#define HW_ICOLL_RAWn_CLR_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_RAWn_CLR(n)) +#define HW_ICOLL_RAWn_TOG_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_RAWn_TOG(n)) +#define BP_ICOLL_RAWn_RAW_IRQS 0 +#define BM_ICOLL_RAWn_RAW_IRQS 0xFFFFFFFF +#define BF_ICOLL_RAWn_RAW_IRQS(v) (v) -#define HW_ICOLL_INTERRUPTn 0x120 +/* + * multi-register-define name HW_ICOLL_INTERRUPTn + * base 0x00000120 + * count 128 + * offset 0x10 + */ +#define HW_ICOLL_INTERRUPTn(n) (0x00000120 + (n) * 0x10) +#define HW_ICOLL_INTERRUPTn_SET(n) (0x00000124 + (n) * 0x10) +#define HW_ICOLL_INTERRUPTn_CLR(n) (0x00000128 + (n) * 0x10) +#define HW_ICOLL_INTERRUPTn_TOG(n) (0x0000012c + (n) * 0x10) +#define HW_ICOLL_INTERRUPTn_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn(n)) +#define HW_ICOLL_INTERRUPTn_SET_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn_SET(n)) +#define HW_ICOLL_INTERRUPTn_CLR_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn_CLR(n)) +#define HW_ICOLL_INTERRUPTn_TOG_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn_TOG(n)) +#define BP_ICOLL_INTERRUPTn_RSRVD1 5 +#define BM_ICOLL_INTERRUPTn_RSRVD1 0xFFFFFFE0 +#define BF_ICOLL_INTERRUPTn_RSRVD1(v) \ + (((v) << 5) & BM_ICOLL_INTERRUPTn_RSRVD1) +#define BM_ICOLL_INTERRUPTn_ENFIQ 0x00000010 +#define BV_ICOLL_INTERRUPTn_ENFIQ__DISABLE 0x0 +#define BV_ICOLL_INTERRUPTn_ENFIQ__ENABLE 0x1 +#define BM_ICOLL_INTERRUPTn_SOFTIRQ 0x00000008 +#define BV_ICOLL_INTERRUPTn_SOFTIRQ__NO_INTERRUPT 0x0 +#define BV_ICOLL_INTERRUPTn_SOFTIRQ__FORCE_INTERRUPT 0x1 #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 +#define BV_ICOLL_INTERRUPTn_ENABLE__DISABLE 0x0 +#define BV_ICOLL_INTERRUPTn_ENABLE__ENABLE 0x1 +#define BP_ICOLL_INTERRUPTn_PRIORITY 0 +#define BM_ICOLL_INTERRUPTn_PRIORITY 0x00000003 +#define BF_ICOLL_INTERRUPTn_PRIORITY(v) \ + (((v) << 0) & BM_ICOLL_INTERRUPTn_PRIORITY) +#define BV_ICOLL_INTERRUPTn_PRIORITY__LEVEL0 0x0 +#define BV_ICOLL_INTERRUPTn_PRIORITY__LEVEL1 0x1 +#define BV_ICOLL_INTERRUPTn_PRIORITY__LEVEL2 0x2 +#define BV_ICOLL_INTERRUPTn_PRIORITY__LEVEL3 0x3 + +#define HW_ICOLL_DEBUG (0x00001120) +#define HW_ICOLL_DEBUG_SET (0x00001124) +#define HW_ICOLL_DEBUG_CLR (0x00001128) +#define HW_ICOLL_DEBUG_TOG (0x0000112c) +#define HW_ICOLL_DEBUG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DEBUG) +#define HW_ICOLL_DEBUG_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DEBUG_SET) +#define HW_ICOLL_DEBUG_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DEBUG_CLR) +#define HW_ICOLL_DEBUG_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DEBUG_TOG) + +#define BP_ICOLL_DEBUG_INSERVICE 28 +#define BM_ICOLL_DEBUG_INSERVICE 0xF0000000 +#define BF_ICOLL_DEBUG_INSERVICE(v) \ + (((v) << 28) & BM_ICOLL_DEBUG_INSERVICE) +#define BV_ICOLL_DEBUG_INSERVICE__LEVEL0 0x1 +#define BV_ICOLL_DEBUG_INSERVICE__LEVEL1 0x2 +#define BV_ICOLL_DEBUG_INSERVICE__LEVEL2 0x4 +#define BV_ICOLL_DEBUG_INSERVICE__LEVEL3 0x8 +#define BP_ICOLL_DEBUG_LEVEL_REQUESTS 24 +#define BM_ICOLL_DEBUG_LEVEL_REQUESTS 0x0F000000 +#define BF_ICOLL_DEBUG_LEVEL_REQUESTS(v) \ + (((v) << 24) & BM_ICOLL_DEBUG_LEVEL_REQUESTS) +#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL0 0x1 +#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL1 0x2 +#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL2 0x4 +#define BV_ICOLL_DEBUG_LEVEL_REQUESTS__LEVEL3 0x8 +#define BP_ICOLL_DEBUG_REQUESTS_BY_LEVEL 20 +#define BM_ICOLL_DEBUG_REQUESTS_BY_LEVEL 0x00F00000 +#define BF_ICOLL_DEBUG_REQUESTS_BY_LEVEL(v) \ + (((v) << 20) & BM_ICOLL_DEBUG_REQUESTS_BY_LEVEL) +#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL0 0x1 +#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL1 0x2 +#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL2 0x4 +#define BV_ICOLL_DEBUG_REQUESTS_BY_LEVEL__LEVEL3 0x8 +#define BP_ICOLL_DEBUG_RSRVD2 18 +#define BM_ICOLL_DEBUG_RSRVD2 0x000C0000 +#define BF_ICOLL_DEBUG_RSRVD2(v) \ + (((v) << 18) & BM_ICOLL_DEBUG_RSRVD2) +#define BM_ICOLL_DEBUG_FIQ 0x00020000 +#define BV_ICOLL_DEBUG_FIQ__NO_FIQ_REQUESTED 0x0 +#define BV_ICOLL_DEBUG_FIQ__FIQ_REQUESTED 0x1 +#define BM_ICOLL_DEBUG_IRQ 0x00010000 +#define BV_ICOLL_DEBUG_IRQ__NO_IRQ_REQUESTED 0x0 +#define BV_ICOLL_DEBUG_IRQ__IRQ_REQUESTED 0x1 +#define BP_ICOLL_DEBUG_RSRVD1 10 +#define BM_ICOLL_DEBUG_RSRVD1 0x0000FC00 +#define BF_ICOLL_DEBUG_RSRVD1(v) \ + (((v) << 10) & BM_ICOLL_DEBUG_RSRVD1) +#define BP_ICOLL_DEBUG_VECTOR_FSM 0 +#define BM_ICOLL_DEBUG_VECTOR_FSM 0x000003FF +#define BF_ICOLL_DEBUG_VECTOR_FSM(v) \ + (((v) << 0) & BM_ICOLL_DEBUG_VECTOR_FSM) +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_IDLE 0x000 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE1 0x001 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE2 0x002 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_PENDING 0x004 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE3 0x008 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE4 0x010 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING1 0x020 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING2 0x040 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_ISR_RUNNING3 0x080 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE5 0x100 +#define BV_ICOLL_DEBUG_VECTOR_FSM__FSM_MULTICYCLE6 0x200 + +#define HW_ICOLL_DBGREAD0 (0x00001130) +#define HW_ICOLL_DBGREAD0_SET (0x00001134) +#define HW_ICOLL_DBGREAD0_CLR (0x00001138) +#define HW_ICOLL_DBGREAD0_TOG (0x0000113c) +#define HW_ICOLL_DBGREAD0_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD0) +#define HW_ICOLL_DBGREAD0_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD0_SET) +#define HW_ICOLL_DBGREAD0_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD0_CLR) +#define HW_ICOLL_DBGREAD0_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD0_TOG) + +#define BP_ICOLL_DBGREAD0_VALUE 0 +#define BM_ICOLL_DBGREAD0_VALUE 0xFFFFFFFF +#define BF_ICOLL_DBGREAD0_VALUE(v) (v) + +#define HW_ICOLL_DBGREAD1 (0x00001140) +#define HW_ICOLL_DBGREAD1_SET (0x00001144) +#define HW_ICOLL_DBGREAD1_CLR (0x00001148) +#define HW_ICOLL_DBGREAD1_TOG (0x0000114c) +#define HW_ICOLL_DBGREAD1_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD1) +#define HW_ICOLL_DBGREAD1_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD1_SET) +#define HW_ICOLL_DBGREAD1_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD1_CLR) +#define HW_ICOLL_DBGREAD1_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREAD1_TOG) + +#define BP_ICOLL_DBGREAD1_VALUE 0 +#define BM_ICOLL_DBGREAD1_VALUE 0xFFFFFFFF +#define BF_ICOLL_DBGREAD1_VALUE(v) (v) + +#define HW_ICOLL_DBGFLAG (0x00001150) +#define HW_ICOLL_DBGFLAG_SET (0x00001154) +#define HW_ICOLL_DBGFLAG_CLR (0x00001158) +#define HW_ICOLL_DBGFLAG_TOG (0x0000115c) +#define HW_ICOLL_DBGFLAG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGFLAG) +#define HW_ICOLL_DBGFLAG_SET_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGFLAG_SET) +#define HW_ICOLL_DBGFLAG_CLR_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGFLAG_CLR) +#define HW_ICOLL_DBGFLAG_TOG_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGFLAG_TOG) + +#define BP_ICOLL_DBGFLAG_RSRVD1 16 +#define BM_ICOLL_DBGFLAG_RSRVD1 0xFFFF0000 +#define BF_ICOLL_DBGFLAG_RSRVD1(v) \ + (((v) << 16) & BM_ICOLL_DBGFLAG_RSRVD1) +#define BP_ICOLL_DBGFLAG_FLAG 0 +#define BM_ICOLL_DBGFLAG_FLAG 0x0000FFFF +#define BF_ICOLL_DBGFLAG_FLAG(v) \ + (((v) << 0) & BM_ICOLL_DBGFLAG_FLAG) + +/* + * multi-register-define name HW_ICOLL_DBGREQUESTn + * base 0x00001160 + * count 4 + * offset 0x10 + */ +#define HW_ICOLL_DBGREQUESTn(n) (0x00001160 + (n) * 0x10) +#define HW_ICOLL_DBGREQUESTn_SET(n) (0x00001164 + (n) * 0x10) +#define HW_ICOLL_DBGREQUESTn_CLR(n) (0x00001168 + (n) * 0x10) +#define HW_ICOLL_DBGREQUESTn_TOG(n) (0x0000116c + (n) * 0x10) +#define HW_ICOLL_DBGREQUESTn_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREQUESTn(n)) +#define HW_ICOLL_DBGREQUESTn_SET_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREQUESTn_SET(n)) +#define HW_ICOLL_DBGREQUESTn_CLR_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREQUESTn_CLR(n)) +#define HW_ICOLL_DBGREQUESTn_TOG_ADDR(n) \ + (REGS_ICOLL_BASE + HW_ICOLL_DBGREQUESTn_TOG(n)) +#define BP_ICOLL_DBGREQUESTn_BITS 0 +#define BM_ICOLL_DBGREQUESTn_BITS 0xFFFFFFFF +#define BF_ICOLL_DBGREQUESTn_BITS(v) (v) + +#define HW_ICOLL_VERSION (0x000011e0) +#define HW_ICOLL_VERSION_ADDR \ + (REGS_ICOLL_BASE + HW_ICOLL_VERSION) -#endif +#define BP_ICOLL_VERSION_MAJOR 24 +#define BM_ICOLL_VERSION_MAJOR 0xFF000000 +#define BF_ICOLL_VERSION_MAJOR(v) \ + (((v) << 24) & BM_ICOLL_VERSION_MAJOR) +#define BP_ICOLL_VERSION_MINOR 16 +#define BM_ICOLL_VERSION_MINOR 0x00FF0000 +#define BF_ICOLL_VERSION_MINOR(v) \ + (((v) << 16) & BM_ICOLL_VERSION_MINOR) +#define BP_ICOLL_VERSION_STEP 0 +#define BM_ICOLL_VERSION_STEP 0x0000FFFF +#define BF_ICOLL_VERSION_STEP(v) \ + (((v) << 0) & BM_ICOLL_VERSION_STEP) +#endif /* __ARCH_ARM___ICOLL_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-lradc.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-lradc.h @@ -1,7 +1,7 @@ /* - * stmp378x: LRADC register definitions + * STMP LRADC Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,83 +17,759 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_LRADC_BASE (STMP3XXX_REGS_BASE + 0x50000) -#define REGS_LRADC_PHYS 0x80050000 -#define REGS_LRADC_SIZE 0x2000 -#define HW_LRADC_CTRL0 0x0 -#define BM_LRADC_CTRL0_SCHEDULE 0x000000FF -#define BP_LRADC_CTRL0_SCHEDULE 0 -#define BM_LRADC_CTRL0_XPLUS_ENABLE 0x00010000 -#define BM_LRADC_CTRL0_YPLUS_ENABLE 0x00020000 -#define BM_LRADC_CTRL0_XMINUS_ENABLE 0x00040000 -#define BM_LRADC_CTRL0_YMINUS_ENABLE 0x00080000 -#define BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE 0x00100000 -#define BM_LRADC_CTRL0_ONCHIP_GROUNDREF 0x00200000 -#define BM_LRADC_CTRL0_CLKGATE 0x40000000 +#ifndef __ARCH_ARM___LRADC_H +#define __ARCH_ARM___LRADC_H 1 + +#define REGS_LRADC_BASE (STMP3XXX_REGS_BASE + 0x50000) +#define REGS_LRADC_PHYS (0x80050000) +#define REGS_LRADC_SIZE 0x00002000 + +#define HW_LRADC_CTRL0 (0x00000000) +#define HW_LRADC_CTRL0_SET (0x00000004) +#define HW_LRADC_CTRL0_CLR (0x00000008) +#define HW_LRADC_CTRL0_TOG (0x0000000c) +#define HW_LRADC_CTRL0_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL0) +#define HW_LRADC_CTRL0_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL0_SET) +#define HW_LRADC_CTRL0_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL0_CLR) +#define HW_LRADC_CTRL0_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL0_TOG) + #define BM_LRADC_CTRL0_SFTRST 0x80000000 +#define BM_LRADC_CTRL0_CLKGATE 0x40000000 +#define BP_LRADC_CTRL0_RSRVD2 22 +#define BM_LRADC_CTRL0_RSRVD2 0x3FC00000 +#define BF_LRADC_CTRL0_RSRVD2(v) \ + (((v) << 22) & BM_LRADC_CTRL0_RSRVD2) +#define BM_LRADC_CTRL0_ONCHIP_GROUNDREF 0x00200000 +#define BV_LRADC_CTRL0_ONCHIP_GROUNDREF__OFF 0x0 +#define BV_LRADC_CTRL0_ONCHIP_GROUNDREF__ON 0x1 +#define BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE 0x00100000 +#define BV_LRADC_CTRL0_TOUCH_DETECT_ENABLE__OFF 0x0 +#define BV_LRADC_CTRL0_TOUCH_DETECT_ENABLE__ON 0x1 +#define BM_LRADC_CTRL0_YMINUS_ENABLE 0x00080000 +#define BV_LRADC_CTRL0_YMINUS_ENABLE__OFF 0x0 +#define BV_LRADC_CTRL0_YMINUS_ENABLE__ON 0x1 +#define BM_LRADC_CTRL0_XMINUS_ENABLE 0x00040000 +#define BV_LRADC_CTRL0_XMINUS_ENABLE__OFF 0x0 +#define BV_LRADC_CTRL0_XMINUS_ENABLE__ON 0x1 +#define BM_LRADC_CTRL0_YPLUS_ENABLE 0x00020000 +#define BV_LRADC_CTRL0_YPLUS_ENABLE__OFF 0x0 +#define BV_LRADC_CTRL0_YPLUS_ENABLE__ON 0x1 +#define BM_LRADC_CTRL0_XPLUS_ENABLE 0x00010000 +#define BV_LRADC_CTRL0_XPLUS_ENABLE__OFF 0x0 +#define BV_LRADC_CTRL0_XPLUS_ENABLE__ON 0x1 +#define BP_LRADC_CTRL0_RSRVD1 8 +#define BM_LRADC_CTRL0_RSRVD1 0x0000FF00 +#define BF_LRADC_CTRL0_RSRVD1(v) \ + (((v) << 8) & BM_LRADC_CTRL0_RSRVD1) +#define BP_LRADC_CTRL0_SCHEDULE 0 +#define BM_LRADC_CTRL0_SCHEDULE 0x000000FF +#define BF_LRADC_CTRL0_SCHEDULE(v) \ + (((v) << 0) & BM_LRADC_CTRL0_SCHEDULE) -#define HW_LRADC_CTRL1 0x10 -#define BM_LRADC_CTRL1_LRADC0_IRQ 0x00000001 -#define BP_LRADC_CTRL1_LRADC0_IRQ 0 -#define BM_LRADC_CTRL1_LRADC5_IRQ 0x00000020 -#define BM_LRADC_CTRL1_LRADC6_IRQ 0x00000040 -#define BM_LRADC_CTRL1_TOUCH_DETECT_IRQ 0x00000100 -#define BM_LRADC_CTRL1_LRADC0_IRQ_EN 0x00010000 -#define BM_LRADC_CTRL1_LRADC5_IRQ_EN 0x00200000 +#define HW_LRADC_CTRL1 (0x00000010) +#define HW_LRADC_CTRL1_SET (0x00000014) +#define HW_LRADC_CTRL1_CLR (0x00000018) +#define HW_LRADC_CTRL1_TOG (0x0000001c) +#define HW_LRADC_CTRL1_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL1) +#define HW_LRADC_CTRL1_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL1_SET) +#define HW_LRADC_CTRL1_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL1_CLR) +#define HW_LRADC_CTRL1_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL1_TOG) + +#define BP_LRADC_CTRL1_RSRVD2 25 +#define BM_LRADC_CTRL1_RSRVD2 0xFE000000 +#define BF_LRADC_CTRL1_RSRVD2(v) \ + (((v) << 25) & BM_LRADC_CTRL1_RSRVD2) #define BM_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN 0x01000000 +#define BV_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC7_IRQ_EN 0x00800000 +#define BV_LRADC_CTRL1_LRADC7_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC7_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC6_IRQ_EN 0x00400000 +#define BV_LRADC_CTRL1_LRADC6_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC6_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC5_IRQ_EN 0x00200000 +#define BV_LRADC_CTRL1_LRADC5_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC5_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC4_IRQ_EN 0x00100000 +#define BV_LRADC_CTRL1_LRADC4_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC4_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC3_IRQ_EN 0x00080000 +#define BV_LRADC_CTRL1_LRADC3_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC3_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC2_IRQ_EN 0x00040000 +#define BV_LRADC_CTRL1_LRADC2_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC2_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC1_IRQ_EN 0x00020000 +#define BV_LRADC_CTRL1_LRADC1_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC1_IRQ_EN__ENABLE 0x1 +#define BM_LRADC_CTRL1_LRADC0_IRQ_EN 0x00010000 +#define BV_LRADC_CTRL1_LRADC0_IRQ_EN__DISABLE 0x0 +#define BV_LRADC_CTRL1_LRADC0_IRQ_EN__ENABLE 0x1 +#define BP_LRADC_CTRL1_RSRVD1 9 +#define BM_LRADC_CTRL1_RSRVD1 0x0000FE00 +#define BF_LRADC_CTRL1_RSRVD1(v) \ + (((v) << 9) & BM_LRADC_CTRL1_RSRVD1) +#define BM_LRADC_CTRL1_TOUCH_DETECT_IRQ 0x00000100 +#define BV_LRADC_CTRL1_TOUCH_DETECT_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_TOUCH_DETECT_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC7_IRQ 0x00000080 +#define BV_LRADC_CTRL1_LRADC7_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC7_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC6_IRQ 0x00000040 +#define BV_LRADC_CTRL1_LRADC6_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC6_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC5_IRQ 0x00000020 +#define BV_LRADC_CTRL1_LRADC5_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC5_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC4_IRQ 0x00000010 +#define BV_LRADC_CTRL1_LRADC4_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC4_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC3_IRQ 0x00000008 +#define BV_LRADC_CTRL1_LRADC3_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC3_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC2_IRQ 0x00000004 +#define BV_LRADC_CTRL1_LRADC2_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC2_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC1_IRQ 0x00000002 +#define BV_LRADC_CTRL1_LRADC1_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC1_IRQ__PENDING 0x1 +#define BM_LRADC_CTRL1_LRADC0_IRQ 0x00000001 +#define BV_LRADC_CTRL1_LRADC0_IRQ__CLEAR 0x0 +#define BV_LRADC_CTRL1_LRADC0_IRQ__PENDING 0x1 + +#define HW_LRADC_CTRL2 (0x00000020) +#define HW_LRADC_CTRL2_SET (0x00000024) +#define HW_LRADC_CTRL2_CLR (0x00000028) +#define HW_LRADC_CTRL2_TOG (0x0000002c) +#define HW_LRADC_CTRL2_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL2) +#define HW_LRADC_CTRL2_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL2_SET) +#define HW_LRADC_CTRL2_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL2_CLR) +#define HW_LRADC_CTRL2_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL2_TOG) -#define HW_LRADC_CTRL2 0x20 -#define BM_LRADC_CTRL2_BL_BRIGHTNESS 0x001F0000 -#define BP_LRADC_CTRL2_BL_BRIGHTNESS 16 -#define BM_LRADC_CTRL2_BL_MUX_SELECT 0x00200000 -#define BM_LRADC_CTRL2_BL_ENABLE 0x00400000 -#define BM_LRADC_CTRL2_DIVIDE_BY_TWO 0xFF000000 #define BP_LRADC_CTRL2_DIVIDE_BY_TWO 24 +#define BM_LRADC_CTRL2_DIVIDE_BY_TWO 0xFF000000 +#define BF_LRADC_CTRL2_DIVIDE_BY_TWO(v) \ + (((v) << 24) & BM_LRADC_CTRL2_DIVIDE_BY_TWO) +#define BM_LRADC_CTRL2_BL_AMP_BYPASS 0x00800000 +#define BV_LRADC_CTRL2_BL_AMP_BYPASS__DISABLE 0x0 +#define BV_LRADC_CTRL2_BL_AMP_BYPASS__ENABLE 0x1 +#define BM_LRADC_CTRL2_BL_ENABLE 0x00400000 +#define BM_LRADC_CTRL2_BL_MUX_SELECT 0x00200000 +#define BP_LRADC_CTRL2_BL_BRIGHTNESS 16 +#define BM_LRADC_CTRL2_BL_BRIGHTNESS 0x001F0000 +#define BF_LRADC_CTRL2_BL_BRIGHTNESS(v) \ + (((v) << 16) & BM_LRADC_CTRL2_BL_BRIGHTNESS) +#define BM_LRADC_CTRL2_TEMPSENSE_PWD 0x00008000 +#define BV_LRADC_CTRL2_TEMPSENSE_PWD__ENABLE 0x0 +#define BV_LRADC_CTRL2_TEMPSENSE_PWD__DISABLE 0x1 +#define BM_LRADC_CTRL2_RSRVD1 0x00004000 +#define BM_LRADC_CTRL2_EXT_EN1 0x00002000 +#define BV_LRADC_CTRL2_EXT_EN1__DISABLE 0x0 +#define BV_LRADC_CTRL2_EXT_EN1__ENABLE 0x1 +#define BM_LRADC_CTRL2_EXT_EN0 0x00001000 +#define BP_LRADC_CTRL2_RSRVD2 10 +#define BM_LRADC_CTRL2_RSRVD2 0x00000C00 +#define BF_LRADC_CTRL2_RSRVD2(v) \ + (((v) << 10) & BM_LRADC_CTRL2_RSRVD2) +#define BM_LRADC_CTRL2_TEMP_SENSOR_IENABLE1 0x00000200 +#define BV_LRADC_CTRL2_TEMP_SENSOR_IENABLE1__DISABLE 0x0 +#define BV_LRADC_CTRL2_TEMP_SENSOR_IENABLE1__ENABLE 0x1 +#define BM_LRADC_CTRL2_TEMP_SENSOR_IENABLE0 0x00000100 +#define BV_LRADC_CTRL2_TEMP_SENSOR_IENABLE0__DISABLE 0x0 +#define BV_LRADC_CTRL2_TEMP_SENSOR_IENABLE0__ENABLE 0x1 +#define BP_LRADC_CTRL2_TEMP_ISRC1 4 +#define BM_LRADC_CTRL2_TEMP_ISRC1 0x000000F0 +#define BF_LRADC_CTRL2_TEMP_ISRC1(v) \ + (((v) << 4) & BM_LRADC_CTRL2_TEMP_ISRC1) +#define BV_LRADC_CTRL2_TEMP_ISRC1__300 0xF +#define BV_LRADC_CTRL2_TEMP_ISRC1__280 0xE +#define BV_LRADC_CTRL2_TEMP_ISRC1__260 0xD +#define BV_LRADC_CTRL2_TEMP_ISRC1__240 0xC +#define BV_LRADC_CTRL2_TEMP_ISRC1__220 0xB +#define BV_LRADC_CTRL2_TEMP_ISRC1__200 0xA +#define BV_LRADC_CTRL2_TEMP_ISRC1__180 0x9 +#define BV_LRADC_CTRL2_TEMP_ISRC1__160 0x8 +#define BV_LRADC_CTRL2_TEMP_ISRC1__140 0x7 +#define BV_LRADC_CTRL2_TEMP_ISRC1__120 0x6 +#define BV_LRADC_CTRL2_TEMP_ISRC1__100 0x5 +#define BV_LRADC_CTRL2_TEMP_ISRC1__80 0x4 +#define BV_LRADC_CTRL2_TEMP_ISRC1__60 0x3 +#define BV_LRADC_CTRL2_TEMP_ISRC1__40 0x2 +#define BV_LRADC_CTRL2_TEMP_ISRC1__20 0x1 +#define BV_LRADC_CTRL2_TEMP_ISRC1__ZERO 0x0 +#define BP_LRADC_CTRL2_TEMP_ISRC0 0 +#define BM_LRADC_CTRL2_TEMP_ISRC0 0x0000000F +#define BF_LRADC_CTRL2_TEMP_ISRC0(v) \ + (((v) << 0) & BM_LRADC_CTRL2_TEMP_ISRC0) +#define BV_LRADC_CTRL2_TEMP_ISRC0__300 0xF +#define BV_LRADC_CTRL2_TEMP_ISRC0__280 0xE +#define BV_LRADC_CTRL2_TEMP_ISRC0__260 0xD +#define BV_LRADC_CTRL2_TEMP_ISRC0__240 0xC +#define BV_LRADC_CTRL2_TEMP_ISRC0__220 0xB +#define BV_LRADC_CTRL2_TEMP_ISRC0__200 0xA +#define BV_LRADC_CTRL2_TEMP_ISRC0__180 0x9 +#define BV_LRADC_CTRL2_TEMP_ISRC0__160 0x8 +#define BV_LRADC_CTRL2_TEMP_ISRC0__140 0x7 +#define BV_LRADC_CTRL2_TEMP_ISRC0__120 0x6 +#define BV_LRADC_CTRL2_TEMP_ISRC0__100 0x5 +#define BV_LRADC_CTRL2_TEMP_ISRC0__80 0x4 +#define BV_LRADC_CTRL2_TEMP_ISRC0__60 0x3 +#define BV_LRADC_CTRL2_TEMP_ISRC0__40 0x2 +#define BV_LRADC_CTRL2_TEMP_ISRC0__20 0x1 +#define BV_LRADC_CTRL2_TEMP_ISRC0__ZERO 0x0 -#define HW_LRADC_CTRL3 0x30 -#define BM_LRADC_CTRL3_CYCLE_TIME 0x00000300 +#define HW_LRADC_CTRL3 (0x00000030) +#define HW_LRADC_CTRL3_SET (0x00000034) +#define HW_LRADC_CTRL3_CLR (0x00000038) +#define HW_LRADC_CTRL3_TOG (0x0000003c) +#define HW_LRADC_CTRL3_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL3) +#define HW_LRADC_CTRL3_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL3_SET) +#define HW_LRADC_CTRL3_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL3_CLR) +#define HW_LRADC_CTRL3_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL3_TOG) + +#define BP_LRADC_CTRL3_RSRVD5 26 +#define BM_LRADC_CTRL3_RSRVD5 0xFC000000 +#define BF_LRADC_CTRL3_RSRVD5(v) \ + (((v) << 26) & BM_LRADC_CTRL3_RSRVD5) +#define BP_LRADC_CTRL3_DISCARD 24 +#define BM_LRADC_CTRL3_DISCARD 0x03000000 +#define BF_LRADC_CTRL3_DISCARD(v) \ + (((v) << 24) & BM_LRADC_CTRL3_DISCARD) +#define BV_LRADC_CTRL3_DISCARD__1_SAMPLE 0x1 +#define BV_LRADC_CTRL3_DISCARD__2_SAMPLES 0x2 +#define BV_LRADC_CTRL3_DISCARD__3_SAMPLES 0x3 +#define BM_LRADC_CTRL3_FORCE_ANALOG_PWUP 0x00800000 +#define BV_LRADC_CTRL3_FORCE_ANALOG_PWUP__OFF 0x0 +#define BV_LRADC_CTRL3_FORCE_ANALOG_PWUP__ON 0x1 +#define BM_LRADC_CTRL3_FORCE_ANALOG_PWDN 0x00400000 +#define BV_LRADC_CTRL3_FORCE_ANALOG_PWDN__ON 0x0 +#define BV_LRADC_CTRL3_FORCE_ANALOG_PWDN__OFF 0x1 +#define BP_LRADC_CTRL3_RSRVD4 14 +#define BM_LRADC_CTRL3_RSRVD4 0x003FC000 +#define BF_LRADC_CTRL3_RSRVD4(v) \ + (((v) << 14) & BM_LRADC_CTRL3_RSRVD4) +#define BP_LRADC_CTRL3_RSRVD3 10 +#define BM_LRADC_CTRL3_RSRVD3 0x00003C00 +#define BF_LRADC_CTRL3_RSRVD3(v) \ + (((v) << 10) & BM_LRADC_CTRL3_RSRVD3) #define BP_LRADC_CTRL3_CYCLE_TIME 8 +#define BM_LRADC_CTRL3_CYCLE_TIME 0x00000300 +#define BF_LRADC_CTRL3_CYCLE_TIME(v) \ + (((v) << 8) & BM_LRADC_CTRL3_CYCLE_TIME) +#define BV_LRADC_CTRL3_CYCLE_TIME__6MHZ 0x0 +#define BV_LRADC_CTRL3_CYCLE_TIME__4MHZ 0x1 +#define BV_LRADC_CTRL3_CYCLE_TIME__3MHZ 0x2 +#define BV_LRADC_CTRL3_CYCLE_TIME__2MHZ 0x3 +#define BP_LRADC_CTRL3_RSRVD2 6 +#define BM_LRADC_CTRL3_RSRVD2 0x000000C0 +#define BF_LRADC_CTRL3_RSRVD2(v) \ + (((v) << 6) & BM_LRADC_CTRL3_RSRVD2) +#define BP_LRADC_CTRL3_HIGH_TIME 4 +#define BM_LRADC_CTRL3_HIGH_TIME 0x00000030 +#define BF_LRADC_CTRL3_HIGH_TIME(v) \ + (((v) << 4) & BM_LRADC_CTRL3_HIGH_TIME) +#define BV_LRADC_CTRL3_HIGH_TIME__42NS 0x0 +#define BV_LRADC_CTRL3_HIGH_TIME__83NS 0x1 +#define BV_LRADC_CTRL3_HIGH_TIME__125NS 0x2 +#define BV_LRADC_CTRL3_HIGH_TIME__250NS 0x3 +#define BP_LRADC_CTRL3_RSRVD1 2 +#define BM_LRADC_CTRL3_RSRVD1 0x0000000C +#define BF_LRADC_CTRL3_RSRVD1(v) \ + (((v) << 2) & BM_LRADC_CTRL3_RSRVD1) +#define BM_LRADC_CTRL3_DELAY_CLOCK 0x00000002 +#define BV_LRADC_CTRL3_DELAY_CLOCK__NORMAL 0x0 +#define BV_LRADC_CTRL3_DELAY_CLOCK__DELAYED 0x1 +#define BM_LRADC_CTRL3_INVERT_CLOCK 0x00000001 +#define BV_LRADC_CTRL3_INVERT_CLOCK__NORMAL 0x0 +#define BV_LRADC_CTRL3_INVERT_CLOCK__INVERT 0x1 -#define HW_LRADC_STATUS 0x40 -#define BM_LRADC_STATUS_TOUCH_DETECT_RAW 0x00000001 -#define BP_LRADC_STATUS_TOUCH_DETECT_RAW 0 +#define HW_LRADC_STATUS (0x00000040) +#define HW_LRADC_STATUS_SET (0x00000044) +#define HW_LRADC_STATUS_CLR (0x00000048) +#define HW_LRADC_STATUS_TOG (0x0000004c) +#define HW_LRADC_STATUS_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_STATUS) +#define HW_LRADC_STATUS_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_STATUS_SET) +#define HW_LRADC_STATUS_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_STATUS_CLR) +#define HW_LRADC_STATUS_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_STATUS_TOG) -#define HW_LRADC_CH0 (0x50 + 0 * 0x10) -#define HW_LRADC_CH1 (0x50 + 1 * 0x10) -#define HW_LRADC_CH2 (0x50 + 2 * 0x10) -#define HW_LRADC_CH3 (0x50 + 3 * 0x10) -#define HW_LRADC_CH4 (0x50 + 4 * 0x10) -#define HW_LRADC_CH5 (0x50 + 5 * 0x10) -#define HW_LRADC_CH6 (0x50 + 6 * 0x10) -#define HW_LRADC_CH7 (0x50 + 7 * 0x10) +#define BP_LRADC_STATUS_RSRVD3 27 +#define BM_LRADC_STATUS_RSRVD3 0xF8000000 +#define BF_LRADC_STATUS_RSRVD3(v) \ + (((v) << 27) & BM_LRADC_STATUS_RSRVD3) +#define BM_LRADC_STATUS_TEMP1_PRESENT 0x04000000 +#define BM_LRADC_STATUS_TEMP0_PRESENT 0x02000000 +#define BM_LRADC_STATUS_TOUCH_PANEL_PRESENT 0x01000000 +#define BM_LRADC_STATUS_CHANNEL7_PRESENT 0x00800000 +#define BM_LRADC_STATUS_CHANNEL6_PRESENT 0x00400000 +#define BM_LRADC_STATUS_CHANNEL5_PRESENT 0x00200000 +#define BM_LRADC_STATUS_CHANNEL4_PRESENT 0x00100000 +#define BM_LRADC_STATUS_CHANNEL3_PRESENT 0x00080000 +#define BM_LRADC_STATUS_CHANNEL2_PRESENT 0x00040000 +#define BM_LRADC_STATUS_CHANNEL1_PRESENT 0x00020000 +#define BM_LRADC_STATUS_CHANNEL0_PRESENT 0x00010000 +#define BP_LRADC_STATUS_RSRVD2 1 +#define BM_LRADC_STATUS_RSRVD2 0x0000FFFE +#define BF_LRADC_STATUS_RSRVD2(v) \ + (((v) << 1) & BM_LRADC_STATUS_RSRVD2) +#define BM_LRADC_STATUS_TOUCH_DETECT_RAW 0x00000001 +#define BV_LRADC_STATUS_TOUCH_DETECT_RAW__OPEN 0x0 +#define BV_LRADC_STATUS_TOUCH_DETECT_RAW__HIT 0x1 -#define HW_LRADC_CHn 0x50 -#define BM_LRADC_CHn_VALUE 0x0003FFFF -#define BP_LRADC_CHn_VALUE 0 -#define BM_LRADC_CHn_NUM_SAMPLES 0x1F000000 -#define BP_LRADC_CHn_NUM_SAMPLES 24 +/* + * multi-register-define name HW_LRADC_CHn + * base 0x00000050 + * count 6 + * offset 0x10 + */ +#define HW_LRADC_CHn(n) (0x00000050 + (n) * 0x10) +#define HW_LRADC_CHn_SET(n) (0x00000054 + (n) * 0x10) +#define HW_LRADC_CHn_CLR(n) (0x00000058 + (n) * 0x10) +#define HW_LRADC_CHn_TOG(n) (0x0000005c + (n) * 0x10) +#define HW_LRADC_CHn_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_CHn(n)) +#define HW_LRADC_CHn_SET_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_CHn_SET(n)) +#define HW_LRADC_CHn_CLR_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_CHn_CLR(n)) +#define HW_LRADC_CHn_TOG_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_CHn_TOG(n)) +#define BM_LRADC_CHn_TOGGLE 0x80000000 +#define BM_LRADC_CHn_RSRVD2 0x40000000 #define BM_LRADC_CHn_ACCUMULATE 0x20000000 +#define BP_LRADC_CHn_NUM_SAMPLES 24 +#define BM_LRADC_CHn_NUM_SAMPLES 0x1F000000 +#define BF_LRADC_CHn_NUM_SAMPLES(v) \ + (((v) << 24) & BM_LRADC_CHn_NUM_SAMPLES) +#define BP_LRADC_CHn_RSRVD1 18 +#define BM_LRADC_CHn_RSRVD1 0x00FC0000 +#define BF_LRADC_CHn_RSRVD1(v) \ + (((v) << 18) & BM_LRADC_CHn_RSRVD1) +#define BP_LRADC_CHn_VALUE 0 +#define BM_LRADC_CHn_VALUE 0x0003FFFF +#define BF_LRADC_CHn_VALUE(v) \ + (((v) << 0) & BM_LRADC_CHn_VALUE) -#define HW_LRADC_DELAY0 (0xD0 + 0 * 0x10) -#define HW_LRADC_DELAY1 (0xD0 + 1 * 0x10) -#define HW_LRADC_DELAY2 (0xD0 + 2 * 0x10) -#define HW_LRADC_DELAY3 (0xD0 + 3 * 0x10) +#define HW_LRADC_CH6 (0x000000b0) +#define HW_LRADC_CH6_SET (0x000000b4) +#define HW_LRADC_CH6_CLR (0x000000b8) +#define HW_LRADC_CH6_TOG (0x000000bc) +#define HW_LRADC_CH6_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH6) +#define HW_LRADC_CH6_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH6_SET) +#define HW_LRADC_CH6_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH6_CLR) +#define HW_LRADC_CH6_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH6_TOG) -#define HW_LRADC_DELAYn 0xD0 -#define BM_LRADC_DELAYn_DELAY 0x000007FF -#define BP_LRADC_DELAYn_DELAY 0 -#define BM_LRADC_DELAYn_LOOP_COUNT 0x0000F800 -#define BP_LRADC_DELAYn_LOOP_COUNT 11 -#define BM_LRADC_DELAYn_TRIGGER_DELAYS 0x000F0000 -#define BP_LRADC_DELAYn_TRIGGER_DELAYS 16 -#define BM_LRADC_DELAYn_KICK 0x00100000 -#define BM_LRADC_DELAYn_TRIGGER_LRADCS 0xFF000000 +#define BM_LRADC_CH6_TOGGLE 0x80000000 +#define BM_LRADC_CH6_RSRVD2 0x40000000 +#define BM_LRADC_CH6_ACCUMULATE 0x20000000 +#define BP_LRADC_CH6_NUM_SAMPLES 24 +#define BM_LRADC_CH6_NUM_SAMPLES 0x1F000000 +#define BF_LRADC_CH6_NUM_SAMPLES(v) \ + (((v) << 24) & BM_LRADC_CH6_NUM_SAMPLES) +#define BP_LRADC_CH6_RSRVD1 18 +#define BM_LRADC_CH6_RSRVD1 0x00FC0000 +#define BF_LRADC_CH6_RSRVD1(v) \ + (((v) << 18) & BM_LRADC_CH6_RSRVD1) +#define BP_LRADC_CH6_VALUE 0 +#define BM_LRADC_CH6_VALUE 0x0003FFFF +#define BF_LRADC_CH6_VALUE(v) \ + (((v) << 0) & BM_LRADC_CH6_VALUE) + +#define HW_LRADC_CH7 (0x000000c0) +#define HW_LRADC_CH7_SET (0x000000c4) +#define HW_LRADC_CH7_CLR (0x000000c8) +#define HW_LRADC_CH7_TOG (0x000000cc) +#define HW_LRADC_CH7_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH7) +#define HW_LRADC_CH7_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH7_SET) +#define HW_LRADC_CH7_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH7_CLR) +#define HW_LRADC_CH7_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CH7_TOG) + +#define BM_LRADC_CH7_TOGGLE 0x80000000 +#define BM_LRADC_CH7_TESTMODE_TOGGLE 0x40000000 +#define BM_LRADC_CH7_ACCUMULATE 0x20000000 +#define BP_LRADC_CH7_NUM_SAMPLES 24 +#define BM_LRADC_CH7_NUM_SAMPLES 0x1F000000 +#define BF_LRADC_CH7_NUM_SAMPLES(v) \ + (((v) << 24) & BM_LRADC_CH7_NUM_SAMPLES) +#define BP_LRADC_CH7_RSRVD1 18 +#define BM_LRADC_CH7_RSRVD1 0x00FC0000 +#define BF_LRADC_CH7_RSRVD1(v) \ + (((v) << 18) & BM_LRADC_CH7_RSRVD1) +#define BP_LRADC_CH7_VALUE 0 +#define BM_LRADC_CH7_VALUE 0x0003FFFF +#define BF_LRADC_CH7_VALUE(v) \ + (((v) << 0) & BM_LRADC_CH7_VALUE) + +/* + * multi-register-define name HW_LRADC_DELAYn + * base 0x000000D0 + * count 4 + * offset 0x10 + */ +#define HW_LRADC_DELAYn(n) (0x000000d0 + (n) * 0x10) +#define HW_LRADC_DELAYn_SET(n) (0x000000d4 + (n) * 0x10) +#define HW_LRADC_DELAYn_CLR(n) (0x000000d8 + (n) * 0x10) +#define HW_LRADC_DELAYn_TOG(n) (0x000000dc + (n) * 0x10) +#define HW_LRADC_DELAYn_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_DELAYn(n)) +#define HW_LRADC_DELAYn_SET_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_DELAYn_SET(n)) +#define HW_LRADC_DELAYn_CLR_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_DELAYn_CLR(n)) +#define HW_LRADC_DELAYn_TOG_ADDR(n) \ + (REGS_LRADC_BASE + HW_LRADC_DELAYn_TOG(n)) #define BP_LRADC_DELAYn_TRIGGER_LRADCS 24 +#define BM_LRADC_DELAYn_TRIGGER_LRADCS 0xFF000000 +#define BF_LRADC_DELAYn_TRIGGER_LRADCS(v) \ + (((v) << 24) & BM_LRADC_DELAYn_TRIGGER_LRADCS) +#define BP_LRADC_DELAYn_RSRVD2 21 +#define BM_LRADC_DELAYn_RSRVD2 0x00E00000 +#define BF_LRADC_DELAYn_RSRVD2(v) \ + (((v) << 21) & BM_LRADC_DELAYn_RSRVD2) +#define BM_LRADC_DELAYn_KICK 0x00100000 +#define BP_LRADC_DELAYn_TRIGGER_DELAYS 16 +#define BM_LRADC_DELAYn_TRIGGER_DELAYS 0x000F0000 +#define BF_LRADC_DELAYn_TRIGGER_DELAYS(v) \ + (((v) << 16) & BM_LRADC_DELAYn_TRIGGER_DELAYS) +#define BP_LRADC_DELAYn_LOOP_COUNT 11 +#define BM_LRADC_DELAYn_LOOP_COUNT 0x0000F800 +#define BF_LRADC_DELAYn_LOOP_COUNT(v) \ + (((v) << 11) & BM_LRADC_DELAYn_LOOP_COUNT) +#define BP_LRADC_DELAYn_DELAY 0 +#define BM_LRADC_DELAYn_DELAY 0x000007FF +#define BF_LRADC_DELAYn_DELAY(v) \ + (((v) << 0) & BM_LRADC_DELAYn_DELAY) + +#define HW_LRADC_DEBUG0 (0x00000110) +#define HW_LRADC_DEBUG0_SET (0x00000114) +#define HW_LRADC_DEBUG0_CLR (0x00000118) +#define HW_LRADC_DEBUG0_TOG (0x0000011c) +#define HW_LRADC_DEBUG0_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG0) +#define HW_LRADC_DEBUG0_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG0_SET) +#define HW_LRADC_DEBUG0_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG0_CLR) +#define HW_LRADC_DEBUG0_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG0_TOG) + +#define BP_LRADC_DEBUG0_READONLY 16 +#define BM_LRADC_DEBUG0_READONLY 0xFFFF0000 +#define BF_LRADC_DEBUG0_READONLY(v) \ + (((v) << 16) & BM_LRADC_DEBUG0_READONLY) +#define BP_LRADC_DEBUG0_RSRVD1 12 +#define BM_LRADC_DEBUG0_RSRVD1 0x0000F000 +#define BF_LRADC_DEBUG0_RSRVD1(v) \ + (((v) << 12) & BM_LRADC_DEBUG0_RSRVD1) +#define BP_LRADC_DEBUG0_STATE 0 +#define BM_LRADC_DEBUG0_STATE 0x00000FFF +#define BF_LRADC_DEBUG0_STATE(v) \ + (((v) << 0) & BM_LRADC_DEBUG0_STATE) + +#define HW_LRADC_DEBUG1 (0x00000120) +#define HW_LRADC_DEBUG1_SET (0x00000124) +#define HW_LRADC_DEBUG1_CLR (0x00000128) +#define HW_LRADC_DEBUG1_TOG (0x0000012c) +#define HW_LRADC_DEBUG1_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG1) +#define HW_LRADC_DEBUG1_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG1_SET) +#define HW_LRADC_DEBUG1_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG1_CLR) +#define HW_LRADC_DEBUG1_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_DEBUG1_TOG) + +#define BP_LRADC_DEBUG1_RSRVD3 24 +#define BM_LRADC_DEBUG1_RSRVD3 0xFF000000 +#define BF_LRADC_DEBUG1_RSRVD3(v) \ + (((v) << 24) & BM_LRADC_DEBUG1_RSRVD3) +#define BP_LRADC_DEBUG1_REQUEST 16 +#define BM_LRADC_DEBUG1_REQUEST 0x00FF0000 +#define BF_LRADC_DEBUG1_REQUEST(v) \ + (((v) << 16) & BM_LRADC_DEBUG1_REQUEST) +#define BP_LRADC_DEBUG1_RSRVD2 13 +#define BM_LRADC_DEBUG1_RSRVD2 0x0000E000 +#define BF_LRADC_DEBUG1_RSRVD2(v) \ + (((v) << 13) & BM_LRADC_DEBUG1_RSRVD2) +#define BP_LRADC_DEBUG1_TESTMODE_COUNT 8 +#define BM_LRADC_DEBUG1_TESTMODE_COUNT 0x00001F00 +#define BF_LRADC_DEBUG1_TESTMODE_COUNT(v) \ + (((v) << 8) & BM_LRADC_DEBUG1_TESTMODE_COUNT) +#define BP_LRADC_DEBUG1_RSRVD1 3 +#define BM_LRADC_DEBUG1_RSRVD1 0x000000F8 +#define BF_LRADC_DEBUG1_RSRVD1(v) \ + (((v) << 3) & BM_LRADC_DEBUG1_RSRVD1) +#define BM_LRADC_DEBUG1_TESTMODE6 0x00000004 +#define BV_LRADC_DEBUG1_TESTMODE6__NORMAL 0x0 +#define BV_LRADC_DEBUG1_TESTMODE6__TEST 0x1 +#define BM_LRADC_DEBUG1_TESTMODE5 0x00000002 +#define BV_LRADC_DEBUG1_TESTMODE5__NORMAL 0x0 +#define BV_LRADC_DEBUG1_TESTMODE5__TEST 0x1 +#define BM_LRADC_DEBUG1_TESTMODE 0x00000001 +#define BV_LRADC_DEBUG1_TESTMODE__NORMAL 0x0 +#define BV_LRADC_DEBUG1_TESTMODE__TEST 0x1 + +#define HW_LRADC_CONVERSION (0x00000130) +#define HW_LRADC_CONVERSION_SET (0x00000134) +#define HW_LRADC_CONVERSION_CLR (0x00000138) +#define HW_LRADC_CONVERSION_TOG (0x0000013c) +#define HW_LRADC_CONVERSION_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CONVERSION) +#define HW_LRADC_CONVERSION_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CONVERSION_SET) +#define HW_LRADC_CONVERSION_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CONVERSION_CLR) +#define HW_LRADC_CONVERSION_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CONVERSION_TOG) + +#define BP_LRADC_CONVERSION_RSRVD3 21 +#define BM_LRADC_CONVERSION_RSRVD3 0xFFE00000 +#define BF_LRADC_CONVERSION_RSRVD3(v) \ + (((v) << 21) & BM_LRADC_CONVERSION_RSRVD3) +#define BM_LRADC_CONVERSION_AUTOMATIC 0x00100000 +#define BV_LRADC_CONVERSION_AUTOMATIC__DISABLE 0x0 +#define BV_LRADC_CONVERSION_AUTOMATIC__ENABLE 0x1 +#define BP_LRADC_CONVERSION_RSRVD2 18 +#define BM_LRADC_CONVERSION_RSRVD2 0x000C0000 +#define BF_LRADC_CONVERSION_RSRVD2(v) \ + (((v) << 18) & BM_LRADC_CONVERSION_RSRVD2) +#define BP_LRADC_CONVERSION_SCALE_FACTOR 16 +#define BM_LRADC_CONVERSION_SCALE_FACTOR 0x00030000 +#define BF_LRADC_CONVERSION_SCALE_FACTOR(v) \ + (((v) << 16) & BM_LRADC_CONVERSION_SCALE_FACTOR) +#define BV_LRADC_CONVERSION_SCALE_FACTOR__NIMH 0x0 +#define BV_LRADC_CONVERSION_SCALE_FACTOR__DUAL_NIMH 0x1 +#define BV_LRADC_CONVERSION_SCALE_FACTOR__LI_ION 0x2 +#define BV_LRADC_CONVERSION_SCALE_FACTOR__ALT_LI_ION 0x3 +#define BP_LRADC_CONVERSION_RSRVD1 10 +#define BM_LRADC_CONVERSION_RSRVD1 0x0000FC00 +#define BF_LRADC_CONVERSION_RSRVD1(v) \ + (((v) << 10) & BM_LRADC_CONVERSION_RSRVD1) +#define BP_LRADC_CONVERSION_SCALED_BATT_VOLTAGE 0 +#define BM_LRADC_CONVERSION_SCALED_BATT_VOLTAGE 0x000003FF +#define BF_LRADC_CONVERSION_SCALED_BATT_VOLTAGE(v) \ + (((v) << 0) & BM_LRADC_CONVERSION_SCALED_BATT_VOLTAGE) + +#define HW_LRADC_CTRL4 (0x00000140) +#define HW_LRADC_CTRL4_SET (0x00000144) +#define HW_LRADC_CTRL4_CLR (0x00000148) +#define HW_LRADC_CTRL4_TOG (0x0000014c) +#define HW_LRADC_CTRL4_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL4) +#define HW_LRADC_CTRL4_SET_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL4_SET) +#define HW_LRADC_CTRL4_CLR_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL4_CLR) +#define HW_LRADC_CTRL4_TOG_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_CTRL4_TOG) -#define HW_LRADC_CTRL4 0x140 -#define BM_LRADC_CTRL4_LRADC6SELECT 0x0F000000 -#define BP_LRADC_CTRL4_LRADC6SELECT 24 -#define BM_LRADC_CTRL4_LRADC7SELECT 0xF0000000 #define BP_LRADC_CTRL4_LRADC7SELECT 28 +#define BM_LRADC_CTRL4_LRADC7SELECT 0xF0000000 +#define BF_LRADC_CTRL4_LRADC7SELECT(v) \ + (((v) << 28) & BM_LRADC_CTRL4_LRADC7SELECT) +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC7SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC6SELECT 24 +#define BM_LRADC_CTRL4_LRADC6SELECT 0x0F000000 +#define BF_LRADC_CTRL4_LRADC6SELECT(v) \ + (((v) << 24) & BM_LRADC_CTRL4_LRADC6SELECT) +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC6SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC5SELECT 20 +#define BM_LRADC_CTRL4_LRADC5SELECT 0x00F00000 +#define BF_LRADC_CTRL4_LRADC5SELECT(v) \ + (((v) << 20) & BM_LRADC_CTRL4_LRADC5SELECT) +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC5SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC4SELECT 16 +#define BM_LRADC_CTRL4_LRADC4SELECT 0x000F0000 +#define BF_LRADC_CTRL4_LRADC4SELECT(v) \ + (((v) << 16) & BM_LRADC_CTRL4_LRADC4SELECT) +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC4SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC3SELECT 12 +#define BM_LRADC_CTRL4_LRADC3SELECT 0x0000F000 +#define BF_LRADC_CTRL4_LRADC3SELECT(v) \ + (((v) << 12) & BM_LRADC_CTRL4_LRADC3SELECT) +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC3SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC2SELECT 8 +#define BM_LRADC_CTRL4_LRADC2SELECT 0x00000F00 +#define BF_LRADC_CTRL4_LRADC2SELECT(v) \ + (((v) << 8) & BM_LRADC_CTRL4_LRADC2SELECT) +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC2SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC1SELECT 4 +#define BM_LRADC_CTRL4_LRADC1SELECT 0x000000F0 +#define BF_LRADC_CTRL4_LRADC1SELECT(v) \ + (((v) << 4) & BM_LRADC_CTRL4_LRADC1SELECT) +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC1SELECT__CHANNEL15 0xF +#define BP_LRADC_CTRL4_LRADC0SELECT 0 +#define BM_LRADC_CTRL4_LRADC0SELECT 0x0000000F +#define BF_LRADC_CTRL4_LRADC0SELECT(v) \ + (((v) << 0) & BM_LRADC_CTRL4_LRADC0SELECT) +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL0 0x0 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL1 0x1 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL2 0x2 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL3 0x3 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL4 0x4 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL5 0x5 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL6 0x6 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL7 0x7 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL8 0x8 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL9 0x9 +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL10 0xA +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL11 0xB +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL12 0xC +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL13 0xD +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL14 0xE +#define BV_LRADC_CTRL4_LRADC0SELECT__CHANNEL15 0xF + +#define HW_LRADC_VERSION (0x00000150) +#define HW_LRADC_VERSION_ADDR \ + (REGS_LRADC_BASE + HW_LRADC_VERSION) + +#define BP_LRADC_VERSION_MAJOR 24 +#define BM_LRADC_VERSION_MAJOR 0xFF000000 +#define BF_LRADC_VERSION_MAJOR(v) \ + (((v) << 24) & BM_LRADC_VERSION_MAJOR) +#define BP_LRADC_VERSION_MINOR 16 +#define BM_LRADC_VERSION_MINOR 0x00FF0000 +#define BF_LRADC_VERSION_MINOR(v) \ + (((v) << 16) & BM_LRADC_VERSION_MINOR) +#define BP_LRADC_VERSION_STEP 0 +#define BM_LRADC_VERSION_STEP 0x0000FFFF +#define BF_LRADC_VERSION_STEP(v) \ + (((v) << 0) & BM_LRADC_VERSION_STEP) +#endif /* __ARCH_ARM___LRADC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-lcdif.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-lcdif.h @@ -1,7 +1,7 @@ /* - * stmp378x: LCDIF register definitions + * STMP LCDIF Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,179 +17,724 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_LCDIF_BASE (STMP3XXX_REGS_BASE + 0x30000) -#define REGS_LCDIF_PHYS 0x80030000 -#define REGS_LCDIF_SIZE 0x2000 -#define HW_LCDIF_CTRL 0x0 -#define BM_LCDIF_CTRL_RUN 0x00000001 -#define BP_LCDIF_CTRL_RUN 0 -#define BM_LCDIF_CTRL_LCDIF_MASTER 0x00000020 -#define BM_LCDIF_CTRL_RGB_TO_YCBCR422_CSC 0x00000080 -#define BM_LCDIF_CTRL_WORD_LENGTH 0x00000300 -#define BP_LCDIF_CTRL_WORD_LENGTH 8 -#define BM_LCDIF_CTRL_LCD_DATABUS_WIDTH 0x00000C00 -#define BP_LCDIF_CTRL_LCD_DATABUS_WIDTH 10 -#define BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE 0x0000C000 -#define BP_LCDIF_CTRL_INPUT_DATA_SWIZZLE 14 -#define BM_LCDIF_CTRL_DATA_SELECT 0x00010000 -#define BM_LCDIF_CTRL_DOTCLK_MODE 0x00020000 -#define BM_LCDIF_CTRL_VSYNC_MODE 0x00040000 -#define BM_LCDIF_CTRL_BYPASS_COUNT 0x00080000 -#define BM_LCDIF_CTRL_DVI_MODE 0x00100000 -#define BM_LCDIF_CTRL_SHIFT_NUM_BITS 0x03E00000 -#define BP_LCDIF_CTRL_SHIFT_NUM_BITS 21 -#define BM_LCDIF_CTRL_DATA_SHIFT_DIR 0x04000000 -#define BM_LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE 0x08000000 -#define BM_LCDIF_CTRL_CLKGATE 0x40000000 -#define BM_LCDIF_CTRL_SFTRST 0x80000000 +#ifndef __ARCH_ARM___LCDIF_H +#define __ARCH_ARM___LCDIF_H 1 -#define HW_LCDIF_CTRL1 0x10 -#define BM_LCDIF_CTRL1_RESET 0x00000001 -#define BP_LCDIF_CTRL1_RESET 0 -#define BM_LCDIF_CTRL1_MODE86 0x00000002 -#define BM_LCDIF_CTRL1_BUSY_ENABLE 0x00000004 -#define BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ 0x00000100 -#define BM_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ 0x00000200 -#define BM_LCDIF_CTRL1_UNDERFLOW_IRQ 0x00000400 -#define BM_LCDIF_CTRL1_OVERFLOW_IRQ 0x00000800 -#define BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN 0x00001000 -#define BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT 0x000F0000 -#define BP_LCDIF_CTRL1_BYTE_PACKING_FORMAT 16 -#define BM_LCDIF_CTRL1_INTERLACE_FIELDS 0x00800000 -#define BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW 0x01000000 +#define REGS_LCDIF_BASE (STMP3XXX_REGS_BASE + 0x30000) +#define REGS_LCDIF_PHYS (0x80030000) +#define REGS_LCDIF_SIZE 0x00002000 + +#define HW_LCDIF_CTRL (0x00000000) +#define HW_LCDIF_CTRL_SET (0x00000004) +#define HW_LCDIF_CTRL_CLR (0x00000008) +#define HW_LCDIF_CTRL_TOG (0x0000000c) +#define HW_LCDIF_CTRL_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL) +#define HW_LCDIF_CTRL_SET_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL_SET) +#define HW_LCDIF_CTRL_CLR_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL_CLR) +#define HW_LCDIF_CTRL_TOG_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL_TOG) -#define HW_LCDIF_TRANSFER_COUNT 0x20 -#define BM_LCDIF_TRANSFER_COUNT_H_COUNT 0x0000FFFF -#define BP_LCDIF_TRANSFER_COUNT_H_COUNT 0 -#define BM_LCDIF_TRANSFER_COUNT_V_COUNT 0xFFFF0000 -#define BP_LCDIF_TRANSFER_COUNT_V_COUNT 16 +#define BM_LCDIF_CTRL_SFTRST 0x80000000 +#define BM_LCDIF_CTRL_CLKGATE 0x40000000 +#define BM_LCDIF_CTRL_YCBCR422_INPUT 0x20000000 +#define BM_LCDIF_CTRL_RSRVD0 0x10000000 +#define BM_LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE 0x08000000 +#define BM_LCDIF_CTRL_DATA_SHIFT_DIR 0x04000000 +#define BV_LCDIF_CTRL_DATA_SHIFT_DIR__TXDATA_SHIFT_LEFT 0x0 +#define BV_LCDIF_CTRL_DATA_SHIFT_DIR__TXDATA_SHIFT_RIGHT 0x1 +#define BP_LCDIF_CTRL_SHIFT_NUM_BITS 21 +#define BM_LCDIF_CTRL_SHIFT_NUM_BITS 0x03E00000 +#define BF_LCDIF_CTRL_SHIFT_NUM_BITS(v) \ + (((v) << 21) & BM_LCDIF_CTRL_SHIFT_NUM_BITS) +#define BM_LCDIF_CTRL_DVI_MODE 0x00100000 +#define BM_LCDIF_CTRL_BYPASS_COUNT 0x00080000 +#define BM_LCDIF_CTRL_VSYNC_MODE 0x00040000 +#define BM_LCDIF_CTRL_DOTCLK_MODE 0x00020000 +#define BM_LCDIF_CTRL_DATA_SELECT 0x00010000 +#define BV_LCDIF_CTRL_DATA_SELECT__CMD_MODE 0x0 +#define BV_LCDIF_CTRL_DATA_SELECT__DATA_MODE 0x1 +#define BP_LCDIF_CTRL_INPUT_DATA_SWIZZLE 14 +#define BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE 0x0000C000 +#define BF_LCDIF_CTRL_INPUT_DATA_SWIZZLE(v) \ + (((v) << 14) & BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE) +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__NO_SWAP 0x0 +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__LITTLE_ENDIAN 0x0 +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__BIG_ENDIAN_SWAP 0x1 +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__SWAP_ALL_BYTES 0x1 +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__HWD_SWAP 0x2 +#define BV_LCDIF_CTRL_INPUT_DATA_SWIZZLE__HWD_BYTE_SWAP 0x3 +#define BP_LCDIF_CTRL_CSC_DATA_SWIZZLE 12 +#define BM_LCDIF_CTRL_CSC_DATA_SWIZZLE 0x00003000 +#define BF_LCDIF_CTRL_CSC_DATA_SWIZZLE(v) \ + (((v) << 12) & BM_LCDIF_CTRL_CSC_DATA_SWIZZLE) +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__NO_SWAP 0x0 +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__LITTLE_ENDIAN 0x0 +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__BIG_ENDIAN_SWAP 0x1 +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__SWAP_ALL_BYTES 0x1 +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__HWD_SWAP 0x2 +#define BV_LCDIF_CTRL_CSC_DATA_SWIZZLE__HWD_BYTE_SWAP 0x3 +#define BP_LCDIF_CTRL_LCD_DATABUS_WIDTH 10 +#define BM_LCDIF_CTRL_LCD_DATABUS_WIDTH 0x00000C00 +#define BF_LCDIF_CTRL_LCD_DATABUS_WIDTH(v) \ + (((v) << 10) & BM_LCDIF_CTRL_LCD_DATABUS_WIDTH) +#define BV_LCDIF_CTRL_LCD_DATABUS_WIDTH__16_BIT 0x0 +#define BV_LCDIF_CTRL_LCD_DATABUS_WIDTH__8_BIT 0x1 +#define BV_LCDIF_CTRL_LCD_DATABUS_WIDTH__18_BIT 0x2 +#define BV_LCDIF_CTRL_LCD_DATABUS_WIDTH__24_BIT 0x3 +#define BP_LCDIF_CTRL_WORD_LENGTH 8 +#define BM_LCDIF_CTRL_WORD_LENGTH 0x00000300 +#define BF_LCDIF_CTRL_WORD_LENGTH(v) \ + (((v) << 8) & BM_LCDIF_CTRL_WORD_LENGTH) +#define BV_LCDIF_CTRL_WORD_LENGTH__16_BIT 0x0 +#define BV_LCDIF_CTRL_WORD_LENGTH__8_BIT 0x1 +#define BV_LCDIF_CTRL_WORD_LENGTH__18_BIT 0x2 +#define BV_LCDIF_CTRL_WORD_LENGTH__24_BIT 0x3 +#define BM_LCDIF_CTRL_RGB_TO_YCBCR422_CSC 0x00000080 +#define BM_LCDIF_CTRL_ENABLE_PXP_HANDSHAKE 0x00000040 +#define BM_LCDIF_CTRL_LCDIF_MASTER 0x00000020 +#define BM_LCDIF_CTRL_DMA_BURST_LENGTH 0x00000010 +#define BM_LCDIF_CTRL_DATA_FORMAT_16_BIT 0x00000008 +#define BM_LCDIF_CTRL_DATA_FORMAT_18_BIT 0x00000004 +#define BV_LCDIF_CTRL_DATA_FORMAT_18_BIT__LOWER_18_BITS_VALID 0x0 +#define BV_LCDIF_CTRL_DATA_FORMAT_18_BIT__UPPER_18_BITS_VALID 0x1 +#define BM_LCDIF_CTRL_DATA_FORMAT_24_BIT 0x00000002 +#define BV_LCDIF_CTRL_DATA_FORMAT_24_BIT__ALL_24_BITS_VALID 0x0 +#define BV_LCDIF_CTRL_DATA_FORMAT_24_BIT__DROP_UPPER_2_BITS_PER_BYTE 0x1 +#define BM_LCDIF_CTRL_RUN 0x00000001 -#define HW_LCDIF_CUR_BUF 0x30 +#define HW_LCDIF_CTRL1 (0x00000010) +#define HW_LCDIF_CTRL1_SET (0x00000014) +#define HW_LCDIF_CTRL1_CLR (0x00000018) +#define HW_LCDIF_CTRL1_TOG (0x0000001c) +#define HW_LCDIF_CTRL1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL1) +#define HW_LCDIF_CTRL1_SET_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL1_SET) +#define HW_LCDIF_CTRL1_CLR_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL1_CLR) +#define HW_LCDIF_CTRL1_TOG_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CTRL1_TOG) + +#define BP_LCDIF_CTRL1_RSRVD1 27 +#define BM_LCDIF_CTRL1_RSRVD1 0xF8000000 +#define BF_LCDIF_CTRL1_RSRVD1(v) \ + (((v) << 27) & BM_LCDIF_CTRL1_RSRVD1) +#define BM_LCDIF_CTRL1_BM_ERROR_IRQ_EN 0x04000000 +#define BM_LCDIF_CTRL1_BM_ERROR_IRQ 0x02000000 +#define BV_LCDIF_CTRL1_BM_ERROR_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_BM_ERROR_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW 0x01000000 +#define BM_LCDIF_CTRL1_INTERLACE_FIELDS 0x00800000 +#define BM_LCDIF_CTRL1_START_INTERLACE_FROM_SECOND_FIELD 0x00400000 +#define BM_LCDIF_CTRL1_FIFO_CLEAR 0x00200000 +#define BM_LCDIF_CTRL1_IRQ_ON_ALTERNATE_FIELDS 0x00100000 +#define BP_LCDIF_CTRL1_BYTE_PACKING_FORMAT 16 +#define BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT 0x000F0000 +#define BF_LCDIF_CTRL1_BYTE_PACKING_FORMAT(v) \ + (((v) << 16) & BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT) +#define BM_LCDIF_CTRL1_OVERFLOW_IRQ_EN 0x00008000 +#define BM_LCDIF_CTRL1_UNDERFLOW_IRQ_EN 0x00004000 +#define BM_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN 0x00002000 +#define BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN 0x00001000 +#define BM_LCDIF_CTRL1_OVERFLOW_IRQ 0x00000800 +#define BV_LCDIF_CTRL1_OVERFLOW_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_OVERFLOW_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_UNDERFLOW_IRQ 0x00000400 +#define BV_LCDIF_CTRL1_UNDERFLOW_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_UNDERFLOW_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ 0x00000200 +#define BV_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_CUR_FRAME_DONE_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_VSYNC_EDGE_IRQ 0x00000100 +#define BV_LCDIF_CTRL1_VSYNC_EDGE_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_VSYNC_EDGE_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_RSRVD0 0x00000080 +#define BM_LCDIF_CTRL1_PAUSE_TRANSFER 0x00000040 +#define BM_LCDIF_CTRL1_PAUSE_TRANSFER_IRQ_EN 0x00000020 +#define BM_LCDIF_CTRL1_PAUSE_TRANSFER_IRQ 0x00000010 +#define BV_LCDIF_CTRL1_PAUSE_TRANSFER_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_CTRL1_PAUSE_TRANSFER_IRQ__REQUEST 0x1 +#define BM_LCDIF_CTRL1_LCD_CS_CTRL 0x00000008 +#define BM_LCDIF_CTRL1_BUSY_ENABLE 0x00000004 +#define BV_LCDIF_CTRL1_BUSY_ENABLE__BUSY_DISABLED 0x0 +#define BV_LCDIF_CTRL1_BUSY_ENABLE__BUSY_ENABLED 0x1 +#define BM_LCDIF_CTRL1_MODE86 0x00000002 +#define BV_LCDIF_CTRL1_MODE86__8080_MODE 0x0 +#define BV_LCDIF_CTRL1_MODE86__6800_MODE 0x1 +#define BM_LCDIF_CTRL1_RESET 0x00000001 +#define BV_LCDIF_CTRL1_RESET__LCDRESET_LOW 0x0 +#define BV_LCDIF_CTRL1_RESET__LCDRESET_HIGH 0x1 -#define HW_LCDIF_NEXT_BUF 0x40 +#define HW_LCDIF_TRANSFER_COUNT (0x00000020) +#define HW_LCDIF_TRANSFER_COUNT_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT) -#define HW_LCDIF_TIMING 0x60 +#define BP_LCDIF_TRANSFER_COUNT_V_COUNT 16 +#define BM_LCDIF_TRANSFER_COUNT_V_COUNT 0xFFFF0000 +#define BF_LCDIF_TRANSFER_COUNT_V_COUNT(v) \ + (((v) << 16) & BM_LCDIF_TRANSFER_COUNT_V_COUNT) +#define BP_LCDIF_TRANSFER_COUNT_H_COUNT 0 +#define BM_LCDIF_TRANSFER_COUNT_H_COUNT 0x0000FFFF +#define BF_LCDIF_TRANSFER_COUNT_H_COUNT(v) \ + (((v) << 0) & BM_LCDIF_TRANSFER_COUNT_H_COUNT) -#define HW_LCDIF_VDCTRL0 0x70 -#define BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH 0x0003FFFF -#define BP_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH 0 -#define BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT 0x00100000 -#define BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT 0x00200000 -#define BM_LCDIF_VDCTRL0_ENABLE_POL 0x01000000 -#define BM_LCDIF_VDCTRL0_DOTCLK_POL 0x02000000 -#define BM_LCDIF_VDCTRL0_HSYNC_POL 0x04000000 -#define BM_LCDIF_VDCTRL0_VSYNC_POL 0x08000000 -#define BM_LCDIF_VDCTRL0_ENABLE_PRESENT 0x10000000 +#define HW_LCDIF_CUR_BUF (0x00000030) +#define HW_LCDIF_CUR_BUF_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CUR_BUF) + +#define BP_LCDIF_CUR_BUF_ADDR 0 +#define BM_LCDIF_CUR_BUF_ADDR 0xFFFFFFFF +#define BF_LCDIF_CUR_BUF_ADDR(v) (v) + +#define HW_LCDIF_NEXT_BUF (0x00000040) +#define HW_LCDIF_NEXT_BUF_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_NEXT_BUF) + +#define BP_LCDIF_NEXT_BUF_ADDR 0 +#define BM_LCDIF_NEXT_BUF_ADDR 0xFFFFFFFF +#define BF_LCDIF_NEXT_BUF_ADDR(v) (v) + +#define HW_LCDIF_PAGETABLE (0x00000050) +#define HW_LCDIF_PAGETABLE_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PAGETABLE) + +#define BP_LCDIF_PAGETABLE_BASE 14 +#define BM_LCDIF_PAGETABLE_BASE 0xFFFFC000 +#define BF_LCDIF_PAGETABLE_BASE(v) \ + (((v) << 14) & BM_LCDIF_PAGETABLE_BASE) +#define BP_LCDIF_PAGETABLE_RSVD1 2 +#define BM_LCDIF_PAGETABLE_RSVD1 0x00003FFC +#define BF_LCDIF_PAGETABLE_RSVD1(v) \ + (((v) << 2) & BM_LCDIF_PAGETABLE_RSVD1) +#define BM_LCDIF_PAGETABLE_FLUSH 0x00000002 +#define BM_LCDIF_PAGETABLE_ENABLE 0x00000001 + +#define HW_LCDIF_TIMING (0x00000060) +#define HW_LCDIF_TIMING_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_TIMING) + +#define BP_LCDIF_TIMING_CMD_HOLD 24 +#define BM_LCDIF_TIMING_CMD_HOLD 0xFF000000 +#define BF_LCDIF_TIMING_CMD_HOLD(v) \ + (((v) << 24) & BM_LCDIF_TIMING_CMD_HOLD) +#define BP_LCDIF_TIMING_CMD_SETUP 16 +#define BM_LCDIF_TIMING_CMD_SETUP 0x00FF0000 +#define BF_LCDIF_TIMING_CMD_SETUP(v) \ + (((v) << 16) & BM_LCDIF_TIMING_CMD_SETUP) +#define BP_LCDIF_TIMING_DATA_HOLD 8 +#define BM_LCDIF_TIMING_DATA_HOLD 0x0000FF00 +#define BF_LCDIF_TIMING_DATA_HOLD(v) \ + (((v) << 8) & BM_LCDIF_TIMING_DATA_HOLD) +#define BP_LCDIF_TIMING_DATA_SETUP 0 +#define BM_LCDIF_TIMING_DATA_SETUP 0x000000FF +#define BF_LCDIF_TIMING_DATA_SETUP(v) \ + (((v) << 0) & BM_LCDIF_TIMING_DATA_SETUP) + +#define HW_LCDIF_VDCTRL0 (0x00000070) +#define HW_LCDIF_VDCTRL0_SET (0x00000074) +#define HW_LCDIF_VDCTRL0_CLR (0x00000078) +#define HW_LCDIF_VDCTRL0_TOG (0x0000007c) +#define HW_LCDIF_VDCTRL0_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0) +#define HW_LCDIF_VDCTRL0_SET_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0_SET) +#define HW_LCDIF_VDCTRL0_CLR_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0_CLR) +#define HW_LCDIF_VDCTRL0_TOG_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0_TOG) + +#define BP_LCDIF_VDCTRL0_RSRVD2 30 +#define BM_LCDIF_VDCTRL0_RSRVD2 0xC0000000 +#define BF_LCDIF_VDCTRL0_RSRVD2(v) \ + (((v) << 30) & BM_LCDIF_VDCTRL0_RSRVD2) #define BM_LCDIF_VDCTRL0_VSYNC_OEB 0x20000000 +#define BV_LCDIF_VDCTRL0_VSYNC_OEB__VSYNC_OUTPUT 0x0 +#define BV_LCDIF_VDCTRL0_VSYNC_OEB__VSYNC_INPUT 0x1 +#define BM_LCDIF_VDCTRL0_ENABLE_PRESENT 0x10000000 +#define BM_LCDIF_VDCTRL0_VSYNC_POL 0x08000000 +#define BM_LCDIF_VDCTRL0_HSYNC_POL 0x04000000 +#define BM_LCDIF_VDCTRL0_DOTCLK_POL 0x02000000 +#define BM_LCDIF_VDCTRL0_ENABLE_POL 0x01000000 +#define BP_LCDIF_VDCTRL0_RSRVD1 22 +#define BM_LCDIF_VDCTRL0_RSRVD1 0x00C00000 +#define BF_LCDIF_VDCTRL0_RSRVD1(v) \ + (((v) << 22) & BM_LCDIF_VDCTRL0_RSRVD1) +#define BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT 0x00200000 +#define BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT 0x00100000 +#define BM_LCDIF_VDCTRL0_HALF_LINE 0x00080000 +#define BM_LCDIF_VDCTRL0_HALF_LINE_MODE 0x00040000 +#define BP_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH 0 +#define BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH 0x0003FFFF +#define BF_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH(v) \ + (((v) << 0) & BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH) + +#define HW_LCDIF_VDCTRL1 (0x00000080) +#define HW_LCDIF_VDCTRL1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1) -#define HW_LCDIF_VDCTRL1 0x80 -#define BM_LCDIF_VDCTRL1_VSYNC_PERIOD 0xFFFFFFFF #define BP_LCDIF_VDCTRL1_VSYNC_PERIOD 0 +#define BM_LCDIF_VDCTRL1_VSYNC_PERIOD 0xFFFFFFFF +#define BF_LCDIF_VDCTRL1_VSYNC_PERIOD(v) (v) + +#define HW_LCDIF_VDCTRL2 (0x00000090) +#define HW_LCDIF_VDCTRL2_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2) -#define HW_LCDIF_VDCTRL2 0x90 -#define BM_LCDIF_VDCTRL2_HSYNC_PERIOD 0x0003FFFF -#define BP_LCDIF_VDCTRL2_HSYNC_PERIOD 0 -#define BM_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH 0xFF000000 #define BP_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH 24 +#define BM_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH 0xFF000000 +#define BF_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH(v) \ + (((v) << 24) & BM_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH) +#define BP_LCDIF_VDCTRL2_RSRVD0 18 +#define BM_LCDIF_VDCTRL2_RSRVD0 0x00FC0000 +#define BF_LCDIF_VDCTRL2_RSRVD0(v) \ + (((v) << 18) & BM_LCDIF_VDCTRL2_RSRVD0) +#define BP_LCDIF_VDCTRL2_HSYNC_PERIOD 0 +#define BM_LCDIF_VDCTRL2_HSYNC_PERIOD 0x0003FFFF +#define BF_LCDIF_VDCTRL2_HSYNC_PERIOD(v) \ + (((v) << 0) & BM_LCDIF_VDCTRL2_HSYNC_PERIOD) -#define HW_LCDIF_VDCTRL3 0xA0 -#define BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT 0x0000FFFF -#define BP_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT 0 -#define BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT 0x0FFF0000 +#define HW_LCDIF_VDCTRL3 (0x000000a0) +#define HW_LCDIF_VDCTRL3_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3) + +#define BP_LCDIF_VDCTRL3_RSRVD0 30 +#define BM_LCDIF_VDCTRL3_RSRVD0 0xC0000000 +#define BF_LCDIF_VDCTRL3_RSRVD0(v) \ + (((v) << 30) & BM_LCDIF_VDCTRL3_RSRVD0) +#define BM_LCDIF_VDCTRL3_MUX_SYNC_SIGNALS 0x20000000 +#define BM_LCDIF_VDCTRL3_VSYNC_ONLY 0x10000000 #define BP_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT 16 +#define BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT 0x0FFF0000 +#define BF_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT(v) \ + (((v) << 16) & BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT) +#define BP_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT 0 +#define BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT 0x0000FFFF +#define BF_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT(v) \ + (((v) << 0) & BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT) -#define HW_LCDIF_VDCTRL4 0xB0 -#define BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT 0x0003FFFF -#define BP_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT 0 +#define HW_LCDIF_VDCTRL4 (0x000000b0) +#define HW_LCDIF_VDCTRL4_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4) + +#define BP_LCDIF_VDCTRL4_RSRVD0 19 +#define BM_LCDIF_VDCTRL4_RSRVD0 0xFFF80000 +#define BF_LCDIF_VDCTRL4_RSRVD0(v) \ + (((v) << 19) & BM_LCDIF_VDCTRL4_RSRVD0) #define BM_LCDIF_VDCTRL4_SYNC_SIGNALS_ON 0x00040000 +#define BP_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT 0 +#define BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT 0x0003FFFF +#define BF_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT(v) \ + (((v) << 0) & BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT) -#define HW_LCDIF_DVICTRL0 0xC0 -#define BM_LCDIF_DVICTRL0_V_LINES_CNT 0x000003FF -#define BP_LCDIF_DVICTRL0_V_LINES_CNT 0 -#define BM_LCDIF_DVICTRL0_H_BLANKING_CNT 0x000FFC00 -#define BP_LCDIF_DVICTRL0_H_BLANKING_CNT 10 -#define BM_LCDIF_DVICTRL0_H_ACTIVE_CNT 0x7FF00000 +#define HW_LCDIF_DVICTRL0 (0x000000c0) +#define HW_LCDIF_DVICTRL0_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DVICTRL0) + +#define BM_LCDIF_DVICTRL0_START_TRS 0x80000000 #define BP_LCDIF_DVICTRL0_H_ACTIVE_CNT 20 +#define BM_LCDIF_DVICTRL0_H_ACTIVE_CNT 0x7FF00000 +#define BF_LCDIF_DVICTRL0_H_ACTIVE_CNT(v) \ + (((v) << 20) & BM_LCDIF_DVICTRL0_H_ACTIVE_CNT) +#define BP_LCDIF_DVICTRL0_H_BLANKING_CNT 10 +#define BM_LCDIF_DVICTRL0_H_BLANKING_CNT 0x000FFC00 +#define BF_LCDIF_DVICTRL0_H_BLANKING_CNT(v) \ + (((v) << 10) & BM_LCDIF_DVICTRL0_H_BLANKING_CNT) +#define BP_LCDIF_DVICTRL0_V_LINES_CNT 0 +#define BM_LCDIF_DVICTRL0_V_LINES_CNT 0x000003FF +#define BF_LCDIF_DVICTRL0_V_LINES_CNT(v) \ + (((v) << 0) & BM_LCDIF_DVICTRL0_V_LINES_CNT) -#define HW_LCDIF_DVICTRL1 0xD0 -#define BM_LCDIF_DVICTRL1_F2_START_LINE 0x000003FF -#define BP_LCDIF_DVICTRL1_F2_START_LINE 0 -#define BM_LCDIF_DVICTRL1_F1_END_LINE 0x000FFC00 -#define BP_LCDIF_DVICTRL1_F1_END_LINE 10 -#define BM_LCDIF_DVICTRL1_F1_START_LINE 0x3FF00000 +#define HW_LCDIF_DVICTRL1 (0x000000d0) +#define HW_LCDIF_DVICTRL1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DVICTRL1) + +#define BP_LCDIF_DVICTRL1_RSRVD0 30 +#define BM_LCDIF_DVICTRL1_RSRVD0 0xC0000000 +#define BF_LCDIF_DVICTRL1_RSRVD0(v) \ + (((v) << 30) & BM_LCDIF_DVICTRL1_RSRVD0) #define BP_LCDIF_DVICTRL1_F1_START_LINE 20 +#define BM_LCDIF_DVICTRL1_F1_START_LINE 0x3FF00000 +#define BF_LCDIF_DVICTRL1_F1_START_LINE(v) \ + (((v) << 20) & BM_LCDIF_DVICTRL1_F1_START_LINE) +#define BP_LCDIF_DVICTRL1_F1_END_LINE 10 +#define BM_LCDIF_DVICTRL1_F1_END_LINE 0x000FFC00 +#define BF_LCDIF_DVICTRL1_F1_END_LINE(v) \ + (((v) << 10) & BM_LCDIF_DVICTRL1_F1_END_LINE) +#define BP_LCDIF_DVICTRL1_F2_START_LINE 0 +#define BM_LCDIF_DVICTRL1_F2_START_LINE 0x000003FF +#define BF_LCDIF_DVICTRL1_F2_START_LINE(v) \ + (((v) << 0) & BM_LCDIF_DVICTRL1_F2_START_LINE) -#define HW_LCDIF_DVICTRL2 0xE0 -#define BM_LCDIF_DVICTRL2_V1_BLANK_END_LINE 0x000003FF -#define BP_LCDIF_DVICTRL2_V1_BLANK_END_LINE 0 -#define BM_LCDIF_DVICTRL2_V1_BLANK_START_LINE 0x000FFC00 -#define BP_LCDIF_DVICTRL2_V1_BLANK_START_LINE 10 -#define BM_LCDIF_DVICTRL2_F2_END_LINE 0x3FF00000 +#define HW_LCDIF_DVICTRL2 (0x000000e0) +#define HW_LCDIF_DVICTRL2_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DVICTRL2) + +#define BP_LCDIF_DVICTRL2_RSRVD0 30 +#define BM_LCDIF_DVICTRL2_RSRVD0 0xC0000000 +#define BF_LCDIF_DVICTRL2_RSRVD0(v) \ + (((v) << 30) & BM_LCDIF_DVICTRL2_RSRVD0) #define BP_LCDIF_DVICTRL2_F2_END_LINE 20 +#define BM_LCDIF_DVICTRL2_F2_END_LINE 0x3FF00000 +#define BF_LCDIF_DVICTRL2_F2_END_LINE(v) \ + (((v) << 20) & BM_LCDIF_DVICTRL2_F2_END_LINE) +#define BP_LCDIF_DVICTRL2_V1_BLANK_START_LINE 10 +#define BM_LCDIF_DVICTRL2_V1_BLANK_START_LINE 0x000FFC00 +#define BF_LCDIF_DVICTRL2_V1_BLANK_START_LINE(v) \ + (((v) << 10) & BM_LCDIF_DVICTRL2_V1_BLANK_START_LINE) +#define BP_LCDIF_DVICTRL2_V1_BLANK_END_LINE 0 +#define BM_LCDIF_DVICTRL2_V1_BLANK_END_LINE 0x000003FF +#define BF_LCDIF_DVICTRL2_V1_BLANK_END_LINE(v) \ + (((v) << 0) & BM_LCDIF_DVICTRL2_V1_BLANK_END_LINE) -#define HW_LCDIF_DVICTRL3 0xF0 -#define BM_LCDIF_DVICTRL3_V2_BLANK_END_LINE 0x000003FF -#define BP_LCDIF_DVICTRL3_V2_BLANK_END_LINE 0 -#define BM_LCDIF_DVICTRL3_V2_BLANK_START_LINE 0x03FF0000 +#define HW_LCDIF_DVICTRL3 (0x000000f0) +#define HW_LCDIF_DVICTRL3_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DVICTRL3) + +#define BP_LCDIF_DVICTRL3_RSRVD1 26 +#define BM_LCDIF_DVICTRL3_RSRVD1 0xFC000000 +#define BF_LCDIF_DVICTRL3_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_DVICTRL3_RSRVD1) #define BP_LCDIF_DVICTRL3_V2_BLANK_START_LINE 16 +#define BM_LCDIF_DVICTRL3_V2_BLANK_START_LINE 0x03FF0000 +#define BF_LCDIF_DVICTRL3_V2_BLANK_START_LINE(v) \ + (((v) << 16) & BM_LCDIF_DVICTRL3_V2_BLANK_START_LINE) +#define BP_LCDIF_DVICTRL3_RSRVD0 10 +#define BM_LCDIF_DVICTRL3_RSRVD0 0x0000FC00 +#define BF_LCDIF_DVICTRL3_RSRVD0(v) \ + (((v) << 10) & BM_LCDIF_DVICTRL3_RSRVD0) +#define BP_LCDIF_DVICTRL3_V2_BLANK_END_LINE 0 +#define BM_LCDIF_DVICTRL3_V2_BLANK_END_LINE 0x000003FF +#define BF_LCDIF_DVICTRL3_V2_BLANK_END_LINE(v) \ + (((v) << 0) & BM_LCDIF_DVICTRL3_V2_BLANK_END_LINE) + +#define HW_LCDIF_DVICTRL4 (0x00000100) +#define HW_LCDIF_DVICTRL4_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DVICTRL4) -#define HW_LCDIF_DVICTRL4 0x100 -#define BM_LCDIF_DVICTRL4_H_FILL_CNT 0x000000FF -#define BP_LCDIF_DVICTRL4_H_FILL_CNT 0 -#define BM_LCDIF_DVICTRL4_CR_FILL_VALUE 0x0000FF00 -#define BP_LCDIF_DVICTRL4_CR_FILL_VALUE 8 -#define BM_LCDIF_DVICTRL4_CB_FILL_VALUE 0x00FF0000 -#define BP_LCDIF_DVICTRL4_CB_FILL_VALUE 16 -#define BM_LCDIF_DVICTRL4_Y_FILL_VALUE 0xFF000000 #define BP_LCDIF_DVICTRL4_Y_FILL_VALUE 24 +#define BM_LCDIF_DVICTRL4_Y_FILL_VALUE 0xFF000000 +#define BF_LCDIF_DVICTRL4_Y_FILL_VALUE(v) \ + (((v) << 24) & BM_LCDIF_DVICTRL4_Y_FILL_VALUE) +#define BP_LCDIF_DVICTRL4_CB_FILL_VALUE 16 +#define BM_LCDIF_DVICTRL4_CB_FILL_VALUE 0x00FF0000 +#define BF_LCDIF_DVICTRL4_CB_FILL_VALUE(v) \ + (((v) << 16) & BM_LCDIF_DVICTRL4_CB_FILL_VALUE) +#define BP_LCDIF_DVICTRL4_CR_FILL_VALUE 8 +#define BM_LCDIF_DVICTRL4_CR_FILL_VALUE 0x0000FF00 +#define BF_LCDIF_DVICTRL4_CR_FILL_VALUE(v) \ + (((v) << 8) & BM_LCDIF_DVICTRL4_CR_FILL_VALUE) +#define BP_LCDIF_DVICTRL4_H_FILL_CNT 0 +#define BM_LCDIF_DVICTRL4_H_FILL_CNT 0x000000FF +#define BF_LCDIF_DVICTRL4_H_FILL_CNT(v) \ + (((v) << 0) & BM_LCDIF_DVICTRL4_H_FILL_CNT) -#define HW_LCDIF_CSC_COEFF0 0x110 -#define BM_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER 0x00000003 -#define BP_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER 0 -#define BM_LCDIF_CSC_COEFF0_C0 0x03FF0000 +#define HW_LCDIF_CSC_COEFF0 (0x00000110) +#define HW_LCDIF_CSC_COEFF0_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF0) + +#define BP_LCDIF_CSC_COEFF0_RSRVD1 26 +#define BM_LCDIF_CSC_COEFF0_RSRVD1 0xFC000000 +#define BF_LCDIF_CSC_COEFF0_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_CSC_COEFF0_RSRVD1) #define BP_LCDIF_CSC_COEFF0_C0 16 - -#define HW_LCDIF_CSC_COEFF1 0x120 -#define BM_LCDIF_CSC_COEFF1_C1 0x000003FF -#define BP_LCDIF_CSC_COEFF1_C1 0 -#define BM_LCDIF_CSC_COEFF1_C2 0x03FF0000 +#define BM_LCDIF_CSC_COEFF0_C0 0x03FF0000 +#define BF_LCDIF_CSC_COEFF0_C0(v) \ + (((v) << 16) & BM_LCDIF_CSC_COEFF0_C0) +#define BP_LCDIF_CSC_COEFF0_RSRVD0 2 +#define BM_LCDIF_CSC_COEFF0_RSRVD0 0x0000FFFC +#define BF_LCDIF_CSC_COEFF0_RSRVD0(v) \ + (((v) << 2) & BM_LCDIF_CSC_COEFF0_RSRVD0) +#define BP_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER 0 +#define BM_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER 0x00000003 +#define BF_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER(v) \ + (((v) << 0) & BM_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER) +#define BV_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER__SAMPLE_AND_HOLD 0x0 +#define BV_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER__RSRVD 0x1 +#define BV_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER__INTERSTITIAL 0x2 +#define BV_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER__COSITED 0x3 + +#define HW_LCDIF_CSC_COEFF1 (0x00000120) +#define HW_LCDIF_CSC_COEFF1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF1) + +#define BP_LCDIF_CSC_COEFF1_RSRVD1 26 +#define BM_LCDIF_CSC_COEFF1_RSRVD1 0xFC000000 +#define BF_LCDIF_CSC_COEFF1_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_CSC_COEFF1_RSRVD1) #define BP_LCDIF_CSC_COEFF1_C2 16 +#define BM_LCDIF_CSC_COEFF1_C2 0x03FF0000 +#define BF_LCDIF_CSC_COEFF1_C2(v) \ + (((v) << 16) & BM_LCDIF_CSC_COEFF1_C2) +#define BP_LCDIF_CSC_COEFF1_RSRVD0 10 +#define BM_LCDIF_CSC_COEFF1_RSRVD0 0x0000FC00 +#define BF_LCDIF_CSC_COEFF1_RSRVD0(v) \ + (((v) << 10) & BM_LCDIF_CSC_COEFF1_RSRVD0) +#define BP_LCDIF_CSC_COEFF1_C1 0 +#define BM_LCDIF_CSC_COEFF1_C1 0x000003FF +#define BF_LCDIF_CSC_COEFF1_C1(v) \ + (((v) << 0) & BM_LCDIF_CSC_COEFF1_C1) -#define HW_LCDIF_CSC_COEFF2 0x130 -#define BM_LCDIF_CSC_COEFF2_C3 0x000003FF -#define BP_LCDIF_CSC_COEFF2_C3 0 -#define BM_LCDIF_CSC_COEFF2_C4 0x03FF0000 +#define HW_LCDIF_CSC_COEFF2 (0x00000130) +#define HW_LCDIF_CSC_COEFF2_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF2) + +#define BP_LCDIF_CSC_COEFF2_RSRVD1 26 +#define BM_LCDIF_CSC_COEFF2_RSRVD1 0xFC000000 +#define BF_LCDIF_CSC_COEFF2_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_CSC_COEFF2_RSRVD1) #define BP_LCDIF_CSC_COEFF2_C4 16 +#define BM_LCDIF_CSC_COEFF2_C4 0x03FF0000 +#define BF_LCDIF_CSC_COEFF2_C4(v) \ + (((v) << 16) & BM_LCDIF_CSC_COEFF2_C4) +#define BP_LCDIF_CSC_COEFF2_RSRVD0 10 +#define BM_LCDIF_CSC_COEFF2_RSRVD0 0x0000FC00 +#define BF_LCDIF_CSC_COEFF2_RSRVD0(v) \ + (((v) << 10) & BM_LCDIF_CSC_COEFF2_RSRVD0) +#define BP_LCDIF_CSC_COEFF2_C3 0 +#define BM_LCDIF_CSC_COEFF2_C3 0x000003FF +#define BF_LCDIF_CSC_COEFF2_C3(v) \ + (((v) << 0) & BM_LCDIF_CSC_COEFF2_C3) -#define HW_LCDIF_CSC_COEFF3 0x140 -#define BM_LCDIF_CSC_COEFF3_C5 0x000003FF -#define BP_LCDIF_CSC_COEFF3_C5 0 -#define BM_LCDIF_CSC_COEFF3_C6 0x03FF0000 +#define HW_LCDIF_CSC_COEFF3 (0x00000140) +#define HW_LCDIF_CSC_COEFF3_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF3) + +#define BP_LCDIF_CSC_COEFF3_RSRVD1 26 +#define BM_LCDIF_CSC_COEFF3_RSRVD1 0xFC000000 +#define BF_LCDIF_CSC_COEFF3_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_CSC_COEFF3_RSRVD1) #define BP_LCDIF_CSC_COEFF3_C6 16 +#define BM_LCDIF_CSC_COEFF3_C6 0x03FF0000 +#define BF_LCDIF_CSC_COEFF3_C6(v) \ + (((v) << 16) & BM_LCDIF_CSC_COEFF3_C6) +#define BP_LCDIF_CSC_COEFF3_RSRVD0 10 +#define BM_LCDIF_CSC_COEFF3_RSRVD0 0x0000FC00 +#define BF_LCDIF_CSC_COEFF3_RSRVD0(v) \ + (((v) << 10) & BM_LCDIF_CSC_COEFF3_RSRVD0) +#define BP_LCDIF_CSC_COEFF3_C5 0 +#define BM_LCDIF_CSC_COEFF3_C5 0x000003FF +#define BF_LCDIF_CSC_COEFF3_C5(v) \ + (((v) << 0) & BM_LCDIF_CSC_COEFF3_C5) -#define HW_LCDIF_CSC_COEFF4 0x150 -#define BM_LCDIF_CSC_COEFF4_C7 0x000003FF -#define BP_LCDIF_CSC_COEFF4_C7 0 -#define BM_LCDIF_CSC_COEFF4_C8 0x03FF0000 +#define HW_LCDIF_CSC_COEFF4 (0x00000150) +#define HW_LCDIF_CSC_COEFF4_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF4) + +#define BP_LCDIF_CSC_COEFF4_RSRVD1 26 +#define BM_LCDIF_CSC_COEFF4_RSRVD1 0xFC000000 +#define BF_LCDIF_CSC_COEFF4_RSRVD1(v) \ + (((v) << 26) & BM_LCDIF_CSC_COEFF4_RSRVD1) #define BP_LCDIF_CSC_COEFF4_C8 16 +#define BM_LCDIF_CSC_COEFF4_C8 0x03FF0000 +#define BF_LCDIF_CSC_COEFF4_C8(v) \ + (((v) << 16) & BM_LCDIF_CSC_COEFF4_C8) +#define BP_LCDIF_CSC_COEFF4_RSRVD0 10 +#define BM_LCDIF_CSC_COEFF4_RSRVD0 0x0000FC00 +#define BF_LCDIF_CSC_COEFF4_RSRVD0(v) \ + (((v) << 10) & BM_LCDIF_CSC_COEFF4_RSRVD0) +#define BP_LCDIF_CSC_COEFF4_C7 0 +#define BM_LCDIF_CSC_COEFF4_C7 0x000003FF +#define BF_LCDIF_CSC_COEFF4_C7(v) \ + (((v) << 0) & BM_LCDIF_CSC_COEFF4_C7) -#define HW_LCDIF_CSC_OFFSET 0x160 -#define BM_LCDIF_CSC_OFFSET_Y_OFFSET 0x000001FF -#define BP_LCDIF_CSC_OFFSET_Y_OFFSET 0 -#define BM_LCDIF_CSC_OFFSET_CBCR_OFFSET 0x01FF0000 +#define HW_LCDIF_CSC_OFFSET (0x00000160) +#define HW_LCDIF_CSC_OFFSET_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_OFFSET) + +#define BP_LCDIF_CSC_OFFSET_RSRVD1 25 +#define BM_LCDIF_CSC_OFFSET_RSRVD1 0xFE000000 +#define BF_LCDIF_CSC_OFFSET_RSRVD1(v) \ + (((v) << 25) & BM_LCDIF_CSC_OFFSET_RSRVD1) #define BP_LCDIF_CSC_OFFSET_CBCR_OFFSET 16 +#define BM_LCDIF_CSC_OFFSET_CBCR_OFFSET 0x01FF0000 +#define BF_LCDIF_CSC_OFFSET_CBCR_OFFSET(v) \ + (((v) << 16) & BM_LCDIF_CSC_OFFSET_CBCR_OFFSET) +#define BP_LCDIF_CSC_OFFSET_RSRVD0 9 +#define BM_LCDIF_CSC_OFFSET_RSRVD0 0x0000FE00 +#define BF_LCDIF_CSC_OFFSET_RSRVD0(v) \ + (((v) << 9) & BM_LCDIF_CSC_OFFSET_RSRVD0) +#define BP_LCDIF_CSC_OFFSET_Y_OFFSET 0 +#define BM_LCDIF_CSC_OFFSET_Y_OFFSET 0x000001FF +#define BF_LCDIF_CSC_OFFSET_Y_OFFSET(v) \ + (((v) << 0) & BM_LCDIF_CSC_OFFSET_Y_OFFSET) + +#define HW_LCDIF_CSC_LIMIT (0x00000170) +#define HW_LCDIF_CSC_LIMIT_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_CSC_LIMIT) -#define HW_LCDIF_CSC_LIMIT 0x170 -#define BM_LCDIF_CSC_LIMIT_Y_MAX 0x000000FF -#define BP_LCDIF_CSC_LIMIT_Y_MAX 0 -#define BM_LCDIF_CSC_LIMIT_Y_MIN 0x0000FF00 -#define BP_LCDIF_CSC_LIMIT_Y_MIN 8 -#define BM_LCDIF_CSC_LIMIT_CBCR_MAX 0x00FF0000 -#define BP_LCDIF_CSC_LIMIT_CBCR_MAX 16 -#define BM_LCDIF_CSC_LIMIT_CBCR_MIN 0xFF000000 #define BP_LCDIF_CSC_LIMIT_CBCR_MIN 24 +#define BM_LCDIF_CSC_LIMIT_CBCR_MIN 0xFF000000 +#define BF_LCDIF_CSC_LIMIT_CBCR_MIN(v) \ + (((v) << 24) & BM_LCDIF_CSC_LIMIT_CBCR_MIN) +#define BP_LCDIF_CSC_LIMIT_CBCR_MAX 16 +#define BM_LCDIF_CSC_LIMIT_CBCR_MAX 0x00FF0000 +#define BF_LCDIF_CSC_LIMIT_CBCR_MAX(v) \ + (((v) << 16) & BM_LCDIF_CSC_LIMIT_CBCR_MAX) +#define BP_LCDIF_CSC_LIMIT_Y_MIN 8 +#define BM_LCDIF_CSC_LIMIT_Y_MIN 0x0000FF00 +#define BF_LCDIF_CSC_LIMIT_Y_MIN(v) \ + (((v) << 8) & BM_LCDIF_CSC_LIMIT_Y_MIN) +#define BP_LCDIF_CSC_LIMIT_Y_MAX 0 +#define BM_LCDIF_CSC_LIMIT_Y_MAX 0x000000FF +#define BF_LCDIF_CSC_LIMIT_Y_MAX(v) \ + (((v) << 0) & BM_LCDIF_CSC_LIMIT_Y_MAX) -#define HW_LCDIF_STAT 0x1D0 +#define HW_LCDIF_PIN_SHARING_CTRL0 (0x00000180) +#define HW_LCDIF_PIN_SHARING_CTRL0_SET (0x00000184) +#define HW_LCDIF_PIN_SHARING_CTRL0_CLR (0x00000188) +#define HW_LCDIF_PIN_SHARING_CTRL0_TOG (0x0000018c) +#define HW_LCDIF_PIN_SHARING_CTRL0_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL0) +#define HW_LCDIF_PIN_SHARING_CTRL0_SET_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL0_SET) +#define HW_LCDIF_PIN_SHARING_CTRL0_CLR_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL0_CLR) +#define HW_LCDIF_PIN_SHARING_CTRL0_TOG_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL0_TOG) + +#define BP_LCDIF_PIN_SHARING_CTRL0_RSRVD1 6 +#define BM_LCDIF_PIN_SHARING_CTRL0_RSRVD1 0xFFFFFFC0 +#define BF_LCDIF_PIN_SHARING_CTRL0_RSRVD1(v) \ + (((v) << 6) & BM_LCDIF_PIN_SHARING_CTRL0_RSRVD1) +#define BP_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE 4 +#define BM_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE 0x00000030 +#define BF_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE(v) \ + (((v) << 4) & BM_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE) +#define BV_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE__NO_OVERRIDE 0x0 +#define BV_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE__RSRVD 0x1 +#define BV_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE__LCDIF_SEL 0x2 +#define BV_LCDIF_PIN_SHARING_CTRL0_MUX_OVERRIDE__GPMI_SEL 0x3 +#define BM_LCDIF_PIN_SHARING_CTRL0_RSRVD0 0x00000008 +#define BM_LCDIF_PIN_SHARING_CTRL0_PIN_SHARING_IRQ_EN 0x00000004 +#define BM_LCDIF_PIN_SHARING_CTRL0_PIN_SHARING_IRQ 0x00000002 +#define BV_LCDIF_PIN_SHARING_CTRL0_PIN_SHARING_IRQ__NO_REQUEST 0x0 +#define BV_LCDIF_PIN_SHARING_CTRL0_PIN_SHARING_IRQ__REQUEST 0x1 +#define BM_LCDIF_PIN_SHARING_CTRL0_PIN_SHARING_ENABLE 0x00000001 + +#define HW_LCDIF_PIN_SHARING_CTRL1 (0x00000190) +#define HW_LCDIF_PIN_SHARING_CTRL1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL1) + +#define BP_LCDIF_PIN_SHARING_CTRL1_THRESHOLD1 0 +#define BM_LCDIF_PIN_SHARING_CTRL1_THRESHOLD1 0xFFFFFFFF +#define BF_LCDIF_PIN_SHARING_CTRL1_THRESHOLD1(v) (v) + +#define HW_LCDIF_PIN_SHARING_CTRL2 (0x000001a0) +#define HW_LCDIF_PIN_SHARING_CTRL2_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_PIN_SHARING_CTRL2) + +#define BP_LCDIF_PIN_SHARING_CTRL2_THRESHOLD2 0 +#define BM_LCDIF_PIN_SHARING_CTRL2_THRESHOLD2 0xFFFFFFFF +#define BF_LCDIF_PIN_SHARING_CTRL2_THRESHOLD2(v) (v) + +#define HW_LCDIF_DATA (0x000001b0) +#define HW_LCDIF_DATA_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DATA) + +#define BP_LCDIF_DATA_DATA_THREE 24 +#define BM_LCDIF_DATA_DATA_THREE 0xFF000000 +#define BF_LCDIF_DATA_DATA_THREE(v) \ + (((v) << 24) & BM_LCDIF_DATA_DATA_THREE) +#define BP_LCDIF_DATA_DATA_TWO 16 +#define BM_LCDIF_DATA_DATA_TWO 0x00FF0000 +#define BF_LCDIF_DATA_DATA_TWO(v) \ + (((v) << 16) & BM_LCDIF_DATA_DATA_TWO) +#define BP_LCDIF_DATA_DATA_ONE 8 +#define BM_LCDIF_DATA_DATA_ONE 0x0000FF00 +#define BF_LCDIF_DATA_DATA_ONE(v) \ + (((v) << 8) & BM_LCDIF_DATA_DATA_ONE) +#define BP_LCDIF_DATA_DATA_ZERO 0 +#define BM_LCDIF_DATA_DATA_ZERO 0x000000FF +#define BF_LCDIF_DATA_DATA_ZERO(v) \ + (((v) << 0) & BM_LCDIF_DATA_DATA_ZERO) + +#define HW_LCDIF_BM_ERROR_STAT (0x000001c0) +#define HW_LCDIF_BM_ERROR_STAT_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_BM_ERROR_STAT) + +#define BP_LCDIF_BM_ERROR_STAT_ADDR 0 +#define BM_LCDIF_BM_ERROR_STAT_ADDR 0xFFFFFFFF +#define BF_LCDIF_BM_ERROR_STAT_ADDR(v) (v) + +#define HW_LCDIF_STAT (0x000001d0) +#define HW_LCDIF_STAT_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_STAT) + +#define BM_LCDIF_STAT_PRESENT 0x80000000 +#define BM_LCDIF_STAT_DMA_REQ 0x40000000 +#define BM_LCDIF_STAT_LFIFO_FULL 0x20000000 +#define BM_LCDIF_STAT_LFIFO_EMPTY 0x10000000 +#define BM_LCDIF_STAT_TXFIFO_FULL 0x08000000 #define BM_LCDIF_STAT_TXFIFO_EMPTY 0x04000000 +#define BM_LCDIF_STAT_BUSY 0x02000000 +#define BM_LCDIF_STAT_DVI_CURRENT_FIELD 0x01000000 +#define BP_LCDIF_STAT_RSRVD0 0 +#define BM_LCDIF_STAT_RSRVD0 0x00FFFFFF +#define BF_LCDIF_STAT_RSRVD0(v) \ + (((v) << 0) & BM_LCDIF_STAT_RSRVD0) + +#define HW_LCDIF_VERSION (0x000001e0) +#define HW_LCDIF_VERSION_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_VERSION) + +#define BP_LCDIF_VERSION_MAJOR 24 +#define BM_LCDIF_VERSION_MAJOR 0xFF000000 +#define BF_LCDIF_VERSION_MAJOR(v) \ + (((v) << 24) & BM_LCDIF_VERSION_MAJOR) +#define BP_LCDIF_VERSION_MINOR 16 +#define BM_LCDIF_VERSION_MINOR 0x00FF0000 +#define BF_LCDIF_VERSION_MINOR(v) \ + (((v) << 16) & BM_LCDIF_VERSION_MINOR) +#define BP_LCDIF_VERSION_STEP 0 +#define BM_LCDIF_VERSION_STEP 0x0000FFFF +#define BF_LCDIF_VERSION_STEP(v) \ + (((v) << 0) & BM_LCDIF_VERSION_STEP) + +#define HW_LCDIF_DEBUG0 (0x000001f0) +#define HW_LCDIF_DEBUG0_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DEBUG0) + +#define BM_LCDIF_DEBUG0_STREAMING_END_DETECTED 0x80000000 +#define BM_LCDIF_DEBUG0_WAIT_FOR_VSYNC_EDGE_OUT 0x40000000 +#define BM_LCDIF_DEBUG0_SYNC_SIGNALS_ON_REG 0x20000000 +#define BM_LCDIF_DEBUG0_DMACMDKICK 0x10000000 +#define BM_LCDIF_DEBUG0_ENABLE 0x08000000 +#define BM_LCDIF_DEBUG0_HSYNC 0x04000000 +#define BM_LCDIF_DEBUG0_VSYNC 0x02000000 +#define BM_LCDIF_DEBUG0_CUR_FRAME_TX 0x01000000 +#define BM_LCDIF_DEBUG0_EMPTY_WORD 0x00800000 +#define BP_LCDIF_DEBUG0_CUR_STATE 16 +#define BM_LCDIF_DEBUG0_CUR_STATE 0x007F0000 +#define BF_LCDIF_DEBUG0_CUR_STATE(v) \ + (((v) << 16) & BM_LCDIF_DEBUG0_CUR_STATE) +#define BM_LCDIF_DEBUG0_PXP_LCDIF_B0_READY 0x00008000 +#define BM_LCDIF_DEBUG0_LCDIF_PXP_B0_DONE 0x00004000 +#define BM_LCDIF_DEBUG0_PXP_LCDIF_B1_READY 0x00002000 +#define BM_LCDIF_DEBUG0_LCDIF_PXP_B1_DONE 0x00001000 +#define BM_LCDIF_DEBUG0_GPMI_LCDIF_REQ 0x00000800 +#define BM_LCDIF_DEBUG0_LCDIF_GPMI_GRANT 0x00000400 +#define BP_LCDIF_DEBUG0_RSRVD0 0 +#define BM_LCDIF_DEBUG0_RSRVD0 0x000003FF +#define BF_LCDIF_DEBUG0_RSRVD0(v) \ + (((v) << 0) & BM_LCDIF_DEBUG0_RSRVD0) + +#define HW_LCDIF_DEBUG1 (0x00000200) +#define HW_LCDIF_DEBUG1_ADDR \ + (REGS_LCDIF_BASE + HW_LCDIF_DEBUG1) + +#define BP_LCDIF_DEBUG1_H_DATA_COUNT 16 +#define BM_LCDIF_DEBUG1_H_DATA_COUNT 0xFFFF0000 +#define BF_LCDIF_DEBUG1_H_DATA_COUNT(v) \ + (((v) << 16) & BM_LCDIF_DEBUG1_H_DATA_COUNT) +#define BP_LCDIF_DEBUG1_V_DATA_COUNT 0 +#define BM_LCDIF_DEBUG1_V_DATA_COUNT 0x0000FFFF +#define BF_LCDIF_DEBUG1_V_DATA_COUNT(v) \ + (((v) << 0) & BM_LCDIF_DEBUG1_V_DATA_COUNT) +#endif /* __ARCH_ARM___LCDIF_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-rtc.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-rtc.h @@ -1,7 +1,7 @@ /* - * stmp378x: RTC register definitions + * STMP RTC Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,43 +17,309 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_RTC_BASE (STMP3XXX_REGS_BASE + 0x5C000) -#define REGS_RTC_PHYS 0x8005C000 -#define REGS_RTC_SIZE 0x2000 -#define HW_RTC_CTRL 0x0 -#define BM_RTC_CTRL_ALARM_IRQ_EN 0x00000001 -#define BP_RTC_CTRL_ALARM_IRQ_EN 0 -#define BM_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002 -#define BM_RTC_CTRL_ALARM_IRQ 0x00000004 -#define BM_RTC_CTRL_ONEMSEC_IRQ 0x00000008 +#ifndef __ARCH_ARM___RTC_H +#define __ARCH_ARM___RTC_H 1 + +#define REGS_RTC_BASE (STMP3XXX_REGS_BASE + 0x5c000) +#define REGS_RTC_PHYS (0x8005C000) +#define REGS_RTC_SIZE 0x00002000 + +#define HW_RTC_CTRL (0x00000000) +#define HW_RTC_CTRL_SET (0x00000004) +#define HW_RTC_CTRL_CLR (0x00000008) +#define HW_RTC_CTRL_TOG (0x0000000c) +#define HW_RTC_CTRL_ADDR \ + (REGS_RTC_BASE + HW_RTC_CTRL) +#define HW_RTC_CTRL_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_CTRL_SET) +#define HW_RTC_CTRL_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_CTRL_CLR) +#define HW_RTC_CTRL_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_CTRL_TOG) + +#define BM_RTC_CTRL_SFTRST 0x80000000 +#define BM_RTC_CTRL_CLKGATE 0x40000000 +#define BP_RTC_CTRL_RSVD0 7 +#define BM_RTC_CTRL_RSVD0 0x3FFFFF80 +#define BF_RTC_CTRL_RSVD0(v) \ + (((v) << 7) & BM_RTC_CTRL_RSVD0) +#define BM_RTC_CTRL_SUPPRESS_COPY2ANALOG 0x00000040 +#define BM_RTC_CTRL_FORCE_UPDATE 0x00000020 #define BM_RTC_CTRL_WATCHDOGEN 0x00000010 +#define BM_RTC_CTRL_ONEMSEC_IRQ 0x00000008 +#define BM_RTC_CTRL_ALARM_IRQ 0x00000004 +#define BM_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002 +#define BM_RTC_CTRL_ALARM_IRQ_EN 0x00000001 + +#define HW_RTC_STAT (0x00000010) +#define HW_RTC_STAT_SET (0x00000014) +#define HW_RTC_STAT_CLR (0x00000018) +#define HW_RTC_STAT_TOG (0x0000001c) +#define HW_RTC_STAT_ADDR \ + (REGS_RTC_BASE + HW_RTC_STAT) +#define HW_RTC_STAT_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_STAT_SET) +#define HW_RTC_STAT_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_STAT_CLR) +#define HW_RTC_STAT_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_STAT_TOG) -#define HW_RTC_STAT 0x10 -#define BM_RTC_STAT_NEW_REGS 0x0000FF00 -#define BP_RTC_STAT_NEW_REGS 8 -#define BM_RTC_STAT_STALE_REGS 0x00FF0000 -#define BP_RTC_STAT_STALE_REGS 16 #define BM_RTC_STAT_RTC_PRESENT 0x80000000 +#define BM_RTC_STAT_ALARM_PRESENT 0x40000000 +#define BM_RTC_STAT_WATCHDOG_PRESENT 0x20000000 +#define BM_RTC_STAT_XTAL32000_PRESENT 0x10000000 +#define BM_RTC_STAT_XTAL32768_PRESENT 0x08000000 +#define BP_RTC_STAT_RSVD1 24 +#define BM_RTC_STAT_RSVD1 0x07000000 +#define BF_RTC_STAT_RSVD1(v) \ + (((v) << 24) & BM_RTC_STAT_RSVD1) +#define BP_RTC_STAT_STALE_REGS 16 +#define BM_RTC_STAT_STALE_REGS 0x00FF0000 +#define BF_RTC_STAT_STALE_REGS(v) \ + (((v) << 16) & BM_RTC_STAT_STALE_REGS) +#define BP_RTC_STAT_NEW_REGS 8 +#define BM_RTC_STAT_NEW_REGS 0x0000FF00 +#define BF_RTC_STAT_NEW_REGS(v) \ + (((v) << 8) & BM_RTC_STAT_NEW_REGS) +#define BP_RTC_STAT_RSVD0 0 +#define BM_RTC_STAT_RSVD0 0x000000FF +#define BF_RTC_STAT_RSVD0(v) \ + (((v) << 0) & BM_RTC_STAT_RSVD0) -#define HW_RTC_SECONDS 0x30 +#define HW_RTC_MILLISECONDS (0x00000020) +#define HW_RTC_MILLISECONDS_SET (0x00000024) +#define HW_RTC_MILLISECONDS_CLR (0x00000028) +#define HW_RTC_MILLISECONDS_TOG (0x0000002c) +#define HW_RTC_MILLISECONDS_ADDR \ + (REGS_RTC_BASE + HW_RTC_MILLISECONDS) +#define HW_RTC_MILLISECONDS_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_MILLISECONDS_SET) +#define HW_RTC_MILLISECONDS_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_MILLISECONDS_CLR) +#define HW_RTC_MILLISECONDS_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_MILLISECONDS_TOG) -#define HW_RTC_ALARM 0x40 +#define BP_RTC_MILLISECONDS_COUNT 0 +#define BM_RTC_MILLISECONDS_COUNT 0xFFFFFFFF +#define BF_RTC_MILLISECONDS_COUNT(v) (v) -#define HW_RTC_WATCHDOG 0x50 +#define HW_RTC_SECONDS (0x00000030) +#define HW_RTC_SECONDS_SET (0x00000034) +#define HW_RTC_SECONDS_CLR (0x00000038) +#define HW_RTC_SECONDS_TOG (0x0000003c) +#define HW_RTC_SECONDS_ADDR \ + (REGS_RTC_BASE + HW_RTC_SECONDS) +#define HW_RTC_SECONDS_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_SECONDS_SET) +#define HW_RTC_SECONDS_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_SECONDS_CLR) +#define HW_RTC_SECONDS_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_SECONDS_TOG) + +#define BP_RTC_SECONDS_COUNT 0 +#define BM_RTC_SECONDS_COUNT 0xFFFFFFFF +#define BF_RTC_SECONDS_COUNT(v) (v) + +#define HW_RTC_ALARM (0x00000040) +#define HW_RTC_ALARM_SET (0x00000044) +#define HW_RTC_ALARM_CLR (0x00000048) +#define HW_RTC_ALARM_TOG (0x0000004c) +#define HW_RTC_ALARM_ADDR \ + (REGS_RTC_BASE + HW_RTC_ALARM) +#define HW_RTC_ALARM_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_ALARM_SET) +#define HW_RTC_ALARM_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_ALARM_CLR) +#define HW_RTC_ALARM_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_ALARM_TOG) + +#define BP_RTC_ALARM_VALUE 0 +#define BM_RTC_ALARM_VALUE 0xFFFFFFFF +#define BF_RTC_ALARM_VALUE(v) (v) + +#define HW_RTC_WATCHDOG (0x00000050) +#define HW_RTC_WATCHDOG_SET (0x00000054) +#define HW_RTC_WATCHDOG_CLR (0x00000058) +#define HW_RTC_WATCHDOG_TOG (0x0000005c) +#define HW_RTC_WATCHDOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_WATCHDOG) +#define HW_RTC_WATCHDOG_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_WATCHDOG_SET) +#define HW_RTC_WATCHDOG_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_WATCHDOG_CLR) +#define HW_RTC_WATCHDOG_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_WATCHDOG_TOG) + +#define BP_RTC_WATCHDOG_COUNT 0 +#define BM_RTC_WATCHDOG_COUNT 0xFFFFFFFF +#define BF_RTC_WATCHDOG_COUNT(v) (v) + +#define HW_RTC_PERSISTENT0 (0x00000060) +#define HW_RTC_PERSISTENT0_SET (0x00000064) +#define HW_RTC_PERSISTENT0_CLR (0x00000068) +#define HW_RTC_PERSISTENT0_TOG (0x0000006c) +#define HW_RTC_PERSISTENT0_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT0) +#define HW_RTC_PERSISTENT0_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT0_SET) +#define HW_RTC_PERSISTENT0_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT0_CLR) +#define HW_RTC_PERSISTENT0_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT0_TOG) -#define HW_RTC_PERSISTENT0 0x60 -#define BM_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002 -#define BM_RTC_PERSISTENT0_ALARM_EN 0x00000004 -#define BM_RTC_PERSISTENT0_XTAL24MHZ_PWRUP 0x00000010 -#define BM_RTC_PERSISTENT0_XTAL32KHZ_PWRUP 0x00000020 -#define BM_RTC_PERSISTENT0_ALARM_WAKE 0x00000080 -#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0xFFFC0000 #define BP_RTC_PERSISTENT0_SPARE_ANALOG 18 +#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0xFFFC0000 +#define BF_RTC_PERSISTENT0_SPARE_ANALOG(v) \ + (((v) << 18) & BM_RTC_PERSISTENT0_SPARE_ANALOG) +#define BM_RTC_PERSISTENT0_AUTO_RESTART 0x00020000 +#define BM_RTC_PERSISTENT0_DISABLE_PSWITCH 0x00010000 +#define BP_RTC_PERSISTENT0_LOWERBIAS 14 +#define BM_RTC_PERSISTENT0_LOWERBIAS 0x0000C000 +#define BF_RTC_PERSISTENT0_LOWERBIAS(v) \ + (((v) << 14) & BM_RTC_PERSISTENT0_LOWERBIAS) +#define BM_RTC_PERSISTENT0_DISABLE_XTALOK 0x00002000 +#define BP_RTC_PERSISTENT0_MSEC_RES 8 +#define BM_RTC_PERSISTENT0_MSEC_RES 0x00001F00 +#define BF_RTC_PERSISTENT0_MSEC_RES(v) \ + (((v) << 8) & BM_RTC_PERSISTENT0_MSEC_RES) +#define BM_RTC_PERSISTENT0_ALARM_WAKE 0x00000080 +#define BM_RTC_PERSISTENT0_XTAL32_FREQ 0x00000040 +#define BM_RTC_PERSISTENT0_XTAL32KHZ_PWRUP 0x00000020 +#define BM_RTC_PERSISTENT0_XTAL24MHZ_PWRUP 0x00000010 +#define BM_RTC_PERSISTENT0_LCK_SECS 0x00000008 +#define BM_RTC_PERSISTENT0_ALARM_EN 0x00000004 +#define BM_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002 +#define BM_RTC_PERSISTENT0_CLOCKSOURCE 0x00000001 + +#define HW_RTC_PERSISTENT1 (0x00000070) +#define HW_RTC_PERSISTENT1_SET (0x00000074) +#define HW_RTC_PERSISTENT1_CLR (0x00000078) +#define HW_RTC_PERSISTENT1_TOG (0x0000007c) +#define HW_RTC_PERSISTENT1_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT1) +#define HW_RTC_PERSISTENT1_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT1_SET) +#define HW_RTC_PERSISTENT1_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT1_CLR) +#define HW_RTC_PERSISTENT1_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT1_TOG) -#define HW_RTC_PERSISTENT1 0x70 -#define BM_RTC_PERSISTENT1_GENERAL 0xFFFFFFFF #define BP_RTC_PERSISTENT1_GENERAL 0 +#define BM_RTC_PERSISTENT1_GENERAL 0xFFFFFFFF +#define BF_RTC_PERSISTENT1_GENERAL(v) (v) +#define BV_RTC_PERSISTENT1_GENERAL__ENUMERATE_500MA_TWICE 0x1000 +#define BV_RTC_PERSISTENT1_GENERAL__USB_BOOT_PLAYER_MODE 0x0800 +#define BV_RTC_PERSISTENT1_GENERAL__SKIP_CHECKDISK 0x0400 +#define BV_RTC_PERSISTENT1_GENERAL__USB_LOW_POWER_MODE 0x0200 +#define BV_RTC_PERSISTENT1_GENERAL__OTG_HNP_BIT 0x0100 +#define BV_RTC_PERSISTENT1_GENERAL__OTG_ATL_ROLE_BIT 0x0080 + +#define HW_RTC_PERSISTENT2 (0x00000080) +#define HW_RTC_PERSISTENT2_SET (0x00000084) +#define HW_RTC_PERSISTENT2_CLR (0x00000088) +#define HW_RTC_PERSISTENT2_TOG (0x0000008c) +#define HW_RTC_PERSISTENT2_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT2) +#define HW_RTC_PERSISTENT2_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT2_SET) +#define HW_RTC_PERSISTENT2_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT2_CLR) +#define HW_RTC_PERSISTENT2_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT2_TOG) + +#define BP_RTC_PERSISTENT2_GENERAL 0 +#define BM_RTC_PERSISTENT2_GENERAL 0xFFFFFFFF +#define BF_RTC_PERSISTENT2_GENERAL(v) (v) + +#define HW_RTC_PERSISTENT3 (0x00000090) +#define HW_RTC_PERSISTENT3_SET (0x00000094) +#define HW_RTC_PERSISTENT3_CLR (0x00000098) +#define HW_RTC_PERSISTENT3_TOG (0x0000009c) +#define HW_RTC_PERSISTENT3_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT3) +#define HW_RTC_PERSISTENT3_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT3_SET) +#define HW_RTC_PERSISTENT3_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT3_CLR) +#define HW_RTC_PERSISTENT3_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT3_TOG) + +#define BP_RTC_PERSISTENT3_GENERAL 0 +#define BM_RTC_PERSISTENT3_GENERAL 0xFFFFFFFF +#define BF_RTC_PERSISTENT3_GENERAL(v) (v) + +#define HW_RTC_PERSISTENT4 (0x000000a0) +#define HW_RTC_PERSISTENT4_SET (0x000000a4) +#define HW_RTC_PERSISTENT4_CLR (0x000000a8) +#define HW_RTC_PERSISTENT4_TOG (0x000000ac) +#define HW_RTC_PERSISTENT4_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT4) +#define HW_RTC_PERSISTENT4_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT4_SET) +#define HW_RTC_PERSISTENT4_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT4_CLR) +#define HW_RTC_PERSISTENT4_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT4_TOG) + +#define BP_RTC_PERSISTENT4_GENERAL 0 +#define BM_RTC_PERSISTENT4_GENERAL 0xFFFFFFFF +#define BF_RTC_PERSISTENT4_GENERAL(v) (v) + +#define HW_RTC_PERSISTENT5 (0x000000b0) +#define HW_RTC_PERSISTENT5_SET (0x000000b4) +#define HW_RTC_PERSISTENT5_CLR (0x000000b8) +#define HW_RTC_PERSISTENT5_TOG (0x000000bc) +#define HW_RTC_PERSISTENT5_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT5) +#define HW_RTC_PERSISTENT5_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT5_SET) +#define HW_RTC_PERSISTENT5_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT5_CLR) +#define HW_RTC_PERSISTENT5_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_PERSISTENT5_TOG) + +#define BP_RTC_PERSISTENT5_GENERAL 0 +#define BM_RTC_PERSISTENT5_GENERAL 0xFFFFFFFF +#define BF_RTC_PERSISTENT5_GENERAL(v) (v) + +#define HW_RTC_DEBUG (0x000000c0) +#define HW_RTC_DEBUG_SET (0x000000c4) +#define HW_RTC_DEBUG_CLR (0x000000c8) +#define HW_RTC_DEBUG_TOG (0x000000cc) +#define HW_RTC_DEBUG_ADDR \ + (REGS_RTC_BASE + HW_RTC_DEBUG) +#define HW_RTC_DEBUG_SET_ADDR \ + (REGS_RTC_BASE + HW_RTC_DEBUG_SET) +#define HW_RTC_DEBUG_CLR_ADDR \ + (REGS_RTC_BASE + HW_RTC_DEBUG_CLR) +#define HW_RTC_DEBUG_TOG_ADDR \ + (REGS_RTC_BASE + HW_RTC_DEBUG_TOG) + +#define BP_RTC_DEBUG_RSVD0 2 +#define BM_RTC_DEBUG_RSVD0 0xFFFFFFFC +#define BF_RTC_DEBUG_RSVD0(v) \ + (((v) << 2) & BM_RTC_DEBUG_RSVD0) +#define BM_RTC_DEBUG_WATCHDOG_RESET_MASK 0x00000002 +#define BM_RTC_DEBUG_WATCHDOG_RESET 0x00000001 + +#define HW_RTC_VERSION (0x000000d0) +#define HW_RTC_VERSION_ADDR \ + (REGS_RTC_BASE + HW_RTC_VERSION) -#define HW_RTC_VERSION 0xD0 +#define BP_RTC_VERSION_MAJOR 24 +#define BM_RTC_VERSION_MAJOR 0xFF000000 +#define BF_RTC_VERSION_MAJOR(v) \ + (((v) << 24) & BM_RTC_VERSION_MAJOR) +#define BP_RTC_VERSION_MINOR 16 +#define BM_RTC_VERSION_MINOR 0x00FF0000 +#define BF_RTC_VERSION_MINOR(v) \ + (((v) << 16) & BM_RTC_VERSION_MINOR) +#define BP_RTC_VERSION_STEP 0 +#define BM_RTC_VERSION_STEP 0x0000FFFF +#define BF_RTC_VERSION_STEP(v) \ + (((v) << 0) & BM_RTC_VERSION_STEP) +#endif /* __ARCH_ARM___RTC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-pxp.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-pxp.h @@ -1,7 +1,7 @@ /* - * stmp378x: PXP register definitions + * STMP PXP Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,124 +17,577 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_PXP_BASE (STMP3XXX_REGS_BASE + 0x2A000) -#define REGS_PXP_PHYS 0x8002A000 -#define REGS_PXP_SIZE 0x2000 - -#define HW_PXP_CTRL 0x0 -#define BM_PXP_CTRL_ENABLE 0x00000001 -#define BP_PXP_CTRL_ENABLE 0 -#define BM_PXP_CTRL_IRQ_ENABLE 0x00000002 -#define BM_PXP_CTRL_OUTPUT_RGB_FORMAT 0x000000F0 -#define BP_PXP_CTRL_OUTPUT_RGB_FORMAT 4 -#define BM_PXP_CTRL_ROTATE 0x00000300 -#define BP_PXP_CTRL_ROTATE 8 -#define BM_PXP_CTRL_HFLIP 0x00000400 -#define BM_PXP_CTRL_VFLIP 0x00000800 -#define BM_PXP_CTRL_S0_FORMAT 0x0000F000 -#define BP_PXP_CTRL_S0_FORMAT 12 -#define BM_PXP_CTRL_SCALE 0x00040000 -#define BM_PXP_CTRL_CROP 0x00080000 -#define HW_PXP_STAT 0x10 -#define BM_PXP_STAT_IRQ 0x00000001 -#define BP_PXP_STAT_IRQ 0 +#ifndef __ARCH_ARM___PXP_H +#define __ARCH_ARM___PXP_H 1 -#define HW_PXP_RGBBUF 0x20 +#define REGS_PXP_BASE (STMP3XXX_REGS_BASE + 0x2a000) +#define REGS_PXP_PHYS (0x8002A000) +#define REGS_PXP_SIZE 0x00002000 + +#define HW_PXP_CTRL (0x00000000) +#define HW_PXP_CTRL_SET (0x00000004) +#define HW_PXP_CTRL_CLR (0x00000008) +#define HW_PXP_CTRL_TOG (0x0000000c) +#define HW_PXP_CTRL_ADDR \ + (REGS_PXP_BASE + HW_PXP_CTRL) +#define HW_PXP_CTRL_SET_ADDR \ + (REGS_PXP_BASE + HW_PXP_CTRL_SET) +#define HW_PXP_CTRL_CLR_ADDR \ + (REGS_PXP_BASE + HW_PXP_CTRL_CLR) +#define HW_PXP_CTRL_TOG_ADDR \ + (REGS_PXP_BASE + HW_PXP_CTRL_TOG) + +#define BM_PXP_CTRL_SFTRST 0x80000000 +#define BM_PXP_CTRL_CLKGATE 0x40000000 +#define BP_PXP_CTRL_RSVD2 28 +#define BM_PXP_CTRL_RSVD2 0x30000000 +#define BF_PXP_CTRL_RSVD2(v) \ + (((v) << 28) & BM_PXP_CTRL_RSVD2) +#define BP_PXP_CTRL_INTERLACED_OUTPUT 26 +#define BM_PXP_CTRL_INTERLACED_OUTPUT 0x0C000000 +#define BF_PXP_CTRL_INTERLACED_OUTPUT(v) \ + (((v) << 26) & BM_PXP_CTRL_INTERLACED_OUTPUT) +#define BV_PXP_CTRL_INTERLACED_OUTPUT__PROGRESSIVE 0x0 +#define BV_PXP_CTRL_INTERLACED_OUTPUT__FIELD0 0x1 +#define BV_PXP_CTRL_INTERLACED_OUTPUT__FIELD1 0x2 +#define BV_PXP_CTRL_INTERLACED_OUTPUT__INTERLACED 0x3 +#define BP_PXP_CTRL_INTERLACED_INPUT 24 +#define BM_PXP_CTRL_INTERLACED_INPUT 0x03000000 +#define BF_PXP_CTRL_INTERLACED_INPUT(v) \ + (((v) << 24) & BM_PXP_CTRL_INTERLACED_INPUT) +#define BV_PXP_CTRL_INTERLACED_INPUT__PROGRESSIVE 0x0 +#define BV_PXP_CTRL_INTERLACED_INPUT__FIELD0 0x2 +#define BV_PXP_CTRL_INTERLACED_INPUT__FIELD1 0x3 +#define BM_PXP_CTRL_RSVD1 0x00800000 +#define BM_PXP_CTRL_ALPHA_OUTPUT 0x00400000 +#define BM_PXP_CTRL_IN_PLACE 0x00200000 +#define BM_PXP_CTRL_DELTA 0x00100000 +#define BM_PXP_CTRL_CROP 0x00080000 +#define BM_PXP_CTRL_SCALE 0x00040000 +#define BM_PXP_CTRL_UPSAMPLE 0x00020000 +#define BM_PXP_CTRL_SUBSAMPLE 0x00010000 +#define BP_PXP_CTRL_S0_FORMAT 12 +#define BM_PXP_CTRL_S0_FORMAT 0x0000F000 +#define BF_PXP_CTRL_S0_FORMAT(v) \ + (((v) << 12) & BM_PXP_CTRL_S0_FORMAT) +#define BV_PXP_CTRL_S0_FORMAT__RGB888 0x1 +#define BV_PXP_CTRL_S0_FORMAT__RGB565 0x4 +#define BV_PXP_CTRL_S0_FORMAT__RGB555 0x5 +#define BV_PXP_CTRL_S0_FORMAT__YUV422 0x8 +#define BV_PXP_CTRL_S0_FORMAT__YUV420 0x9 +#define BM_PXP_CTRL_VFLIP 0x00000800 +#define BM_PXP_CTRL_HFLIP 0x00000400 +#define BP_PXP_CTRL_ROTATE 8 +#define BM_PXP_CTRL_ROTATE 0x00000300 +#define BF_PXP_CTRL_ROTATE(v) \ + (((v) << 8) & BM_PXP_CTRL_ROTATE) +#define BV_PXP_CTRL_ROTATE__ROT_0 0x0 +#define BV_PXP_CTRL_ROTATE__ROT_90 0x1 +#define BV_PXP_CTRL_ROTATE__ROT_180 0x2 +#define BV_PXP_CTRL_ROTATE__ROT_270 0x3 +#define BP_PXP_CTRL_OUTPUT_RGB_FORMAT 4 +#define BM_PXP_CTRL_OUTPUT_RGB_FORMAT 0x000000F0 +#define BF_PXP_CTRL_OUTPUT_RGB_FORMAT(v) \ + (((v) << 4) & BM_PXP_CTRL_OUTPUT_RGB_FORMAT) +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__ARGB8888 0x0 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB888 0x1 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB888P 0x2 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__ARGB1555 0x3 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB565 0x4 +#define BV_PXP_CTRL_OUTPUT_RGB_FORMAT__RGB555 0x5 +#define BM_PXP_CTRL_RSVD0 0x00000008 +#define BM_PXP_CTRL_ENABLE_LCD_HANDSHAKE 0x00000004 +#define BM_PXP_CTRL_IRQ_ENABLE 0x00000002 +#define BM_PXP_CTRL_ENABLE 0x00000001 -#define HW_PXP_RGBSIZE 0x40 -#define BM_PXP_RGBSIZE_HEIGHT 0x00000FFF -#define BP_PXP_RGBSIZE_HEIGHT 0 -#define BM_PXP_RGBSIZE_WIDTH 0x00FFF000 +#define HW_PXP_STAT (0x00000010) +#define HW_PXP_STAT_SET (0x00000014) +#define HW_PXP_STAT_CLR (0x00000018) +#define HW_PXP_STAT_TOG (0x0000001c) +#define HW_PXP_STAT_ADDR \ + (REGS_PXP_BASE + HW_PXP_STAT) +#define HW_PXP_STAT_SET_ADDR \ + (REGS_PXP_BASE + HW_PXP_STAT_SET) +#define HW_PXP_STAT_CLR_ADDR \ + (REGS_PXP_BASE + HW_PXP_STAT_CLR) +#define HW_PXP_STAT_TOG_ADDR \ + (REGS_PXP_BASE + HW_PXP_STAT_TOG) + +#define BP_PXP_STAT_BLOCKX 24 +#define BM_PXP_STAT_BLOCKX 0xFF000000 +#define BF_PXP_STAT_BLOCKX(v) \ + (((v) << 24) & BM_PXP_STAT_BLOCKX) +#define BP_PXP_STAT_BLOCKY 16 +#define BM_PXP_STAT_BLOCKY 0x00FF0000 +#define BF_PXP_STAT_BLOCKY(v) \ + (((v) << 16) & BM_PXP_STAT_BLOCKY) +#define BP_PXP_STAT_RSVD2 8 +#define BM_PXP_STAT_RSVD2 0x0000FF00 +#define BF_PXP_STAT_RSVD2(v) \ + (((v) << 8) & BM_PXP_STAT_RSVD2) +#define BP_PXP_STAT_AXI_ERROR_ID 4 +#define BM_PXP_STAT_AXI_ERROR_ID 0x000000F0 +#define BF_PXP_STAT_AXI_ERROR_ID(v) \ + (((v) << 4) & BM_PXP_STAT_AXI_ERROR_ID) +#define BM_PXP_STAT_RSVD1 0x00000008 +#define BM_PXP_STAT_AXI_READ_ERROR 0x00000004 +#define BM_PXP_STAT_AXI_WRITE_ERROR 0x00000002 +#define BM_PXP_STAT_IRQ 0x00000001 + +#define HW_PXP_RGBBUF (0x00000020) +#define HW_PXP_RGBBUF_ADDR \ + (REGS_PXP_BASE + HW_PXP_RGBBUF) + +#define BP_PXP_RGBBUF_ADDR 0 +#define BM_PXP_RGBBUF_ADDR 0xFFFFFFFF +#define BF_PXP_RGBBUF_ADDR(v) (v) + +#define HW_PXP_RGBBUF2 (0x00000030) +#define HW_PXP_RGBBUF2_ADDR \ + (REGS_PXP_BASE + HW_PXP_RGBBUF2) + +#define BP_PXP_RGBBUF2_ADDR 0 +#define BM_PXP_RGBBUF2_ADDR 0xFFFFFFFF +#define BF_PXP_RGBBUF2_ADDR(v) (v) + +#define HW_PXP_RGBSIZE (0x00000040) +#define HW_PXP_RGBSIZE_ADDR \ + (REGS_PXP_BASE + HW_PXP_RGBSIZE) + +#define BP_PXP_RGBSIZE_ALPHA 24 +#define BM_PXP_RGBSIZE_ALPHA 0xFF000000 +#define BF_PXP_RGBSIZE_ALPHA(v) \ + (((v) << 24) & BM_PXP_RGBSIZE_ALPHA) #define BP_PXP_RGBSIZE_WIDTH 12 +#define BM_PXP_RGBSIZE_WIDTH 0x00FFF000 +#define BF_PXP_RGBSIZE_WIDTH(v) \ + (((v) << 12) & BM_PXP_RGBSIZE_WIDTH) +#define BP_PXP_RGBSIZE_HEIGHT 0 +#define BM_PXP_RGBSIZE_HEIGHT 0x00000FFF +#define BF_PXP_RGBSIZE_HEIGHT(v) \ + (((v) << 0) & BM_PXP_RGBSIZE_HEIGHT) -#define HW_PXP_S0BUF 0x50 - -#define HW_PXP_S0UBUF 0x60 - -#define HW_PXP_S0VBUF 0x70 +#define HW_PXP_S0BUF (0x00000050) +#define HW_PXP_S0BUF_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0BUF) + +#define BP_PXP_S0BUF_ADDR 0 +#define BM_PXP_S0BUF_ADDR 0xFFFFFFFF +#define BF_PXP_S0BUF_ADDR(v) (v) + +#define HW_PXP_S0UBUF (0x00000060) +#define HW_PXP_S0UBUF_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0UBUF) + +#define BP_PXP_S0UBUF_ADDR 0 +#define BM_PXP_S0UBUF_ADDR 0xFFFFFFFF +#define BF_PXP_S0UBUF_ADDR(v) (v) + +#define HW_PXP_S0VBUF (0x00000070) +#define HW_PXP_S0VBUF_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0VBUF) + +#define BP_PXP_S0VBUF_ADDR 0 +#define BM_PXP_S0VBUF_ADDR 0xFFFFFFFF +#define BF_PXP_S0VBUF_ADDR(v) (v) + +#define HW_PXP_S0PARAM (0x00000080) +#define HW_PXP_S0PARAM_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0PARAM) -#define HW_PXP_S0PARAM 0x80 -#define BM_PXP_S0PARAM_HEIGHT 0x000000FF -#define BP_PXP_S0PARAM_HEIGHT 0 -#define BM_PXP_S0PARAM_WIDTH 0x0000FF00 -#define BP_PXP_S0PARAM_WIDTH 8 -#define BM_PXP_S0PARAM_YBASE 0x00FF0000 -#define BP_PXP_S0PARAM_YBASE 16 -#define BM_PXP_S0PARAM_XBASE 0xFF000000 #define BP_PXP_S0PARAM_XBASE 24 +#define BM_PXP_S0PARAM_XBASE 0xFF000000 +#define BF_PXP_S0PARAM_XBASE(v) \ + (((v) << 24) & BM_PXP_S0PARAM_XBASE) +#define BP_PXP_S0PARAM_YBASE 16 +#define BM_PXP_S0PARAM_YBASE 0x00FF0000 +#define BF_PXP_S0PARAM_YBASE(v) \ + (((v) << 16) & BM_PXP_S0PARAM_YBASE) +#define BP_PXP_S0PARAM_WIDTH 8 +#define BM_PXP_S0PARAM_WIDTH 0x0000FF00 +#define BF_PXP_S0PARAM_WIDTH(v) \ + (((v) << 8) & BM_PXP_S0PARAM_WIDTH) +#define BP_PXP_S0PARAM_HEIGHT 0 +#define BM_PXP_S0PARAM_HEIGHT 0x000000FF +#define BF_PXP_S0PARAM_HEIGHT(v) \ + (((v) << 0) & BM_PXP_S0PARAM_HEIGHT) -#define HW_PXP_S0BACKGROUND 0x90 +#define HW_PXP_S0BACKGROUND (0x00000090) +#define HW_PXP_S0BACKGROUND_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0BACKGROUND) + +#define BP_PXP_S0BACKGROUND_COLOR 0 +#define BM_PXP_S0BACKGROUND_COLOR 0xFFFFFFFF +#define BF_PXP_S0BACKGROUND_COLOR(v) (v) + +#define HW_PXP_S0CROP (0x000000a0) +#define HW_PXP_S0CROP_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0CROP) -#define HW_PXP_S0CROP 0xA0 -#define BM_PXP_S0CROP_HEIGHT 0x000000FF -#define BP_PXP_S0CROP_HEIGHT 0 -#define BM_PXP_S0CROP_WIDTH 0x0000FF00 -#define BP_PXP_S0CROP_WIDTH 8 -#define BM_PXP_S0CROP_YBASE 0x00FF0000 -#define BP_PXP_S0CROP_YBASE 16 -#define BM_PXP_S0CROP_XBASE 0xFF000000 #define BP_PXP_S0CROP_XBASE 24 +#define BM_PXP_S0CROP_XBASE 0xFF000000 +#define BF_PXP_S0CROP_XBASE(v) \ + (((v) << 24) & BM_PXP_S0CROP_XBASE) +#define BP_PXP_S0CROP_YBASE 16 +#define BM_PXP_S0CROP_YBASE 0x00FF0000 +#define BF_PXP_S0CROP_YBASE(v) \ + (((v) << 16) & BM_PXP_S0CROP_YBASE) +#define BP_PXP_S0CROP_WIDTH 8 +#define BM_PXP_S0CROP_WIDTH 0x0000FF00 +#define BF_PXP_S0CROP_WIDTH(v) \ + (((v) << 8) & BM_PXP_S0CROP_WIDTH) +#define BP_PXP_S0CROP_HEIGHT 0 +#define BM_PXP_S0CROP_HEIGHT 0x000000FF +#define BF_PXP_S0CROP_HEIGHT(v) \ + (((v) << 0) & BM_PXP_S0CROP_HEIGHT) -#define HW_PXP_S0SCALE 0xB0 -#define BM_PXP_S0SCALE_XSCALE 0x00003FFF -#define BP_PXP_S0SCALE_XSCALE 0 -#define BM_PXP_S0SCALE_YSCALE 0x3FFF0000 +#define HW_PXP_S0SCALE (0x000000b0) +#define HW_PXP_S0SCALE_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0SCALE) + +#define BP_PXP_S0SCALE_RSVD2 30 +#define BM_PXP_S0SCALE_RSVD2 0xC0000000 +#define BF_PXP_S0SCALE_RSVD2(v) \ + (((v) << 30) & BM_PXP_S0SCALE_RSVD2) #define BP_PXP_S0SCALE_YSCALE 16 +#define BM_PXP_S0SCALE_YSCALE 0x3FFF0000 +#define BF_PXP_S0SCALE_YSCALE(v) \ + (((v) << 16) & BM_PXP_S0SCALE_YSCALE) +#define BP_PXP_S0SCALE_RSVD1 14 +#define BM_PXP_S0SCALE_RSVD1 0x0000C000 +#define BF_PXP_S0SCALE_RSVD1(v) \ + (((v) << 14) & BM_PXP_S0SCALE_RSVD1) +#define BP_PXP_S0SCALE_XSCALE 0 +#define BM_PXP_S0SCALE_XSCALE 0x00003FFF +#define BF_PXP_S0SCALE_XSCALE(v) \ + (((v) << 0) & BM_PXP_S0SCALE_XSCALE) -#define HW_PXP_CSCCOEFF0 0xD0 - -#define HW_PXP_CSCCOEFF1 0xE0 - -#define HW_PXP_CSCCOEFF2 0xF0 - -#define HW_PXP_S0COLORKEYLOW 0x180 - -#define HW_PXP_S0COLORKEYHIGH 0x190 - -#define HW_PXP_OL0 (0x200 + 0 * 0x40) -#define HW_PXP_OL1 (0x200 + 1 * 0x40) -#define HW_PXP_OL2 (0x200 + 2 * 0x40) -#define HW_PXP_OL3 (0x200 + 3 * 0x40) -#define HW_PXP_OL4 (0x200 + 4 * 0x40) -#define HW_PXP_OL5 (0x200 + 5 * 0x40) -#define HW_PXP_OL6 (0x200 + 6 * 0x40) -#define HW_PXP_OL7 (0x200 + 7 * 0x40) - -#define HW_PXP_OLn 0x200 +#define HW_PXP_S0OFFSET (0x000000c0) +#define HW_PXP_S0OFFSET_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0OFFSET) + +#define BP_PXP_S0OFFSET_RSVD2 28 +#define BM_PXP_S0OFFSET_RSVD2 0xF0000000 +#define BF_PXP_S0OFFSET_RSVD2(v) \ + (((v) << 28) & BM_PXP_S0OFFSET_RSVD2) +#define BP_PXP_S0OFFSET_YOFFSET 16 +#define BM_PXP_S0OFFSET_YOFFSET 0x0FFF0000 +#define BF_PXP_S0OFFSET_YOFFSET(v) \ + (((v) << 16) & BM_PXP_S0OFFSET_YOFFSET) +#define BP_PXP_S0OFFSET_RSVD1 12 +#define BM_PXP_S0OFFSET_RSVD1 0x0000F000 +#define BF_PXP_S0OFFSET_RSVD1(v) \ + (((v) << 12) & BM_PXP_S0OFFSET_RSVD1) +#define BP_PXP_S0OFFSET_XOFFSET 0 +#define BM_PXP_S0OFFSET_XOFFSET 0x00000FFF +#define BF_PXP_S0OFFSET_XOFFSET(v) \ + (((v) << 0) & BM_PXP_S0OFFSET_XOFFSET) + +#define HW_PXP_CSCCOEFF0 (0x000000d0) +#define HW_PXP_CSCCOEFF0_ADDR \ + (REGS_PXP_BASE + HW_PXP_CSCCOEFF0) + +#define BM_PXP_CSCCOEFF0_YCBCR_MODE 0x80000000 +#define BP_PXP_CSCCOEFF0_RSVD1 29 +#define BM_PXP_CSCCOEFF0_RSVD1 0x60000000 +#define BF_PXP_CSCCOEFF0_RSVD1(v) \ + (((v) << 29) & BM_PXP_CSCCOEFF0_RSVD1) +#define BP_PXP_CSCCOEFF0_C0 18 +#define BM_PXP_CSCCOEFF0_C0 0x1FFC0000 +#define BF_PXP_CSCCOEFF0_C0(v) \ + (((v) << 18) & BM_PXP_CSCCOEFF0_C0) +#define BP_PXP_CSCCOEFF0_UV_OFFSET 9 +#define BM_PXP_CSCCOEFF0_UV_OFFSET 0x0003FE00 +#define BF_PXP_CSCCOEFF0_UV_OFFSET(v) \ + (((v) << 9) & BM_PXP_CSCCOEFF0_UV_OFFSET) +#define BP_PXP_CSCCOEFF0_Y_OFFSET 0 +#define BM_PXP_CSCCOEFF0_Y_OFFSET 0x000001FF +#define BF_PXP_CSCCOEFF0_Y_OFFSET(v) \ + (((v) << 0) & BM_PXP_CSCCOEFF0_Y_OFFSET) + +#define HW_PXP_CSCCOEFF1 (0x000000e0) +#define HW_PXP_CSCCOEFF1_ADDR \ + (REGS_PXP_BASE + HW_PXP_CSCCOEFF1) + +#define BP_PXP_CSCCOEFF1_RSVD1 27 +#define BM_PXP_CSCCOEFF1_RSVD1 0xF8000000 +#define BF_PXP_CSCCOEFF1_RSVD1(v) \ + (((v) << 27) & BM_PXP_CSCCOEFF1_RSVD1) +#define BP_PXP_CSCCOEFF1_C1 16 +#define BM_PXP_CSCCOEFF1_C1 0x07FF0000 +#define BF_PXP_CSCCOEFF1_C1(v) \ + (((v) << 16) & BM_PXP_CSCCOEFF1_C1) +#define BP_PXP_CSCCOEFF1_RSVD0 11 +#define BM_PXP_CSCCOEFF1_RSVD0 0x0000F800 +#define BF_PXP_CSCCOEFF1_RSVD0(v) \ + (((v) << 11) & BM_PXP_CSCCOEFF1_RSVD0) +#define BP_PXP_CSCCOEFF1_C4 0 +#define BM_PXP_CSCCOEFF1_C4 0x000007FF +#define BF_PXP_CSCCOEFF1_C4(v) \ + (((v) << 0) & BM_PXP_CSCCOEFF1_C4) + +#define HW_PXP_CSCCOEFF2 (0x000000f0) +#define HW_PXP_CSCCOEFF2_ADDR \ + (REGS_PXP_BASE + HW_PXP_CSCCOEFF2) + +#define BP_PXP_CSCCOEFF2_RSVD1 27 +#define BM_PXP_CSCCOEFF2_RSVD1 0xF8000000 +#define BF_PXP_CSCCOEFF2_RSVD1(v) \ + (((v) << 27) & BM_PXP_CSCCOEFF2_RSVD1) +#define BP_PXP_CSCCOEFF2_C2 16 +#define BM_PXP_CSCCOEFF2_C2 0x07FF0000 +#define BF_PXP_CSCCOEFF2_C2(v) \ + (((v) << 16) & BM_PXP_CSCCOEFF2_C2) +#define BP_PXP_CSCCOEFF2_RSVD0 11 +#define BM_PXP_CSCCOEFF2_RSVD0 0x0000F800 +#define BF_PXP_CSCCOEFF2_RSVD0(v) \ + (((v) << 11) & BM_PXP_CSCCOEFF2_RSVD0) +#define BP_PXP_CSCCOEFF2_C3 0 +#define BM_PXP_CSCCOEFF2_C3 0x000007FF +#define BF_PXP_CSCCOEFF2_C3(v) \ + (((v) << 0) & BM_PXP_CSCCOEFF2_C3) + +#define HW_PXP_NEXT (0x00000100) +#define HW_PXP_NEXT_SET (0x00000104) +#define HW_PXP_NEXT_CLR (0x00000108) +#define HW_PXP_NEXT_TOG (0x0000010c) +#define HW_PXP_NEXT_ADDR \ + (REGS_PXP_BASE + HW_PXP_NEXT) +#define HW_PXP_NEXT_SET_ADDR \ + (REGS_PXP_BASE + HW_PXP_NEXT_SET) +#define HW_PXP_NEXT_CLR_ADDR \ + (REGS_PXP_BASE + HW_PXP_NEXT_CLR) +#define HW_PXP_NEXT_TOG_ADDR \ + (REGS_PXP_BASE + HW_PXP_NEXT_TOG) + +#define BP_PXP_NEXT_POINTER 2 +#define BM_PXP_NEXT_POINTER 0xFFFFFFFC +#define BF_PXP_NEXT_POINTER(v) \ + (((v) << 2) & BM_PXP_NEXT_POINTER) +#define BM_PXP_NEXT_RSVD 0x00000002 +#define BM_PXP_NEXT_ENABLED 0x00000001 + +#define HW_PXP_PAGETABLE (0x00000170) +#define HW_PXP_PAGETABLE_ADDR \ + (REGS_PXP_BASE + HW_PXP_PAGETABLE) + +#define BP_PXP_PAGETABLE_BASE 14 +#define BM_PXP_PAGETABLE_BASE 0xFFFFC000 +#define BF_PXP_PAGETABLE_BASE(v) \ + (((v) << 14) & BM_PXP_PAGETABLE_BASE) +#define BP_PXP_PAGETABLE_RSVD1 2 +#define BM_PXP_PAGETABLE_RSVD1 0x00003FFC +#define BF_PXP_PAGETABLE_RSVD1(v) \ + (((v) << 2) & BM_PXP_PAGETABLE_RSVD1) +#define BM_PXP_PAGETABLE_FLUSH 0x00000002 +#define BM_PXP_PAGETABLE_ENABLE 0x00000001 + +#define HW_PXP_S0COLORKEYLOW (0x00000180) +#define HW_PXP_S0COLORKEYLOW_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0COLORKEYLOW) + +#define BP_PXP_S0COLORKEYLOW_RSVD1 24 +#define BM_PXP_S0COLORKEYLOW_RSVD1 0xFF000000 +#define BF_PXP_S0COLORKEYLOW_RSVD1(v) \ + (((v) << 24) & BM_PXP_S0COLORKEYLOW_RSVD1) +#define BP_PXP_S0COLORKEYLOW_PIXEL 0 +#define BM_PXP_S0COLORKEYLOW_PIXEL 0x00FFFFFF +#define BF_PXP_S0COLORKEYLOW_PIXEL(v) \ + (((v) << 0) & BM_PXP_S0COLORKEYLOW_PIXEL) + +#define HW_PXP_S0COLORKEYHIGH (0x00000190) +#define HW_PXP_S0COLORKEYHIGH_ADDR \ + (REGS_PXP_BASE + HW_PXP_S0COLORKEYHIGH) + +#define BP_PXP_S0COLORKEYHIGH_RSVD1 24 +#define BM_PXP_S0COLORKEYHIGH_RSVD1 0xFF000000 +#define BF_PXP_S0COLORKEYHIGH_RSVD1(v) \ + (((v) << 24) & BM_PXP_S0COLORKEYHIGH_RSVD1) +#define BP_PXP_S0COLORKEYHIGH_PIXEL 0 +#define BM_PXP_S0COLORKEYHIGH_PIXEL 0x00FFFFFF +#define BF_PXP_S0COLORKEYHIGH_PIXEL(v) \ + (((v) << 0) & BM_PXP_S0COLORKEYHIGH_PIXEL) + +#define HW_PXP_OLCOLORKEYLOW (0x000001a0) +#define HW_PXP_OLCOLORKEYLOW_ADDR \ + (REGS_PXP_BASE + HW_PXP_OLCOLORKEYLOW) + +#define BP_PXP_OLCOLORKEYLOW_RSVD1 24 +#define BM_PXP_OLCOLORKEYLOW_RSVD1 0xFF000000 +#define BF_PXP_OLCOLORKEYLOW_RSVD1(v) \ + (((v) << 24) & BM_PXP_OLCOLORKEYLOW_RSVD1) +#define BP_PXP_OLCOLORKEYLOW_PIXEL 0 +#define BM_PXP_OLCOLORKEYLOW_PIXEL 0x00FFFFFF +#define BF_PXP_OLCOLORKEYLOW_PIXEL(v) \ + (((v) << 0) & BM_PXP_OLCOLORKEYLOW_PIXEL) + +#define HW_PXP_OLCOLORKEYHIGH (0x000001b0) +#define HW_PXP_OLCOLORKEYHIGH_ADDR \ + (REGS_PXP_BASE + HW_PXP_OLCOLORKEYHIGH) + +#define BP_PXP_OLCOLORKEYHIGH_RSVD1 24 +#define BM_PXP_OLCOLORKEYHIGH_RSVD1 0xFF000000 +#define BF_PXP_OLCOLORKEYHIGH_RSVD1(v) \ + (((v) << 24) & BM_PXP_OLCOLORKEYHIGH_RSVD1) +#define BP_PXP_OLCOLORKEYHIGH_PIXEL 0 +#define BM_PXP_OLCOLORKEYHIGH_PIXEL 0x00FFFFFF +#define BF_PXP_OLCOLORKEYHIGH_PIXEL(v) \ + (((v) << 0) & BM_PXP_OLCOLORKEYHIGH_PIXEL) + +#define HW_PXP_DEBUGCTRL (0x000001d0) +#define HW_PXP_DEBUGCTRL_ADDR \ + (REGS_PXP_BASE + HW_PXP_DEBUGCTRL) + +#define BP_PXP_DEBUGCTRL_RSVD 9 +#define BM_PXP_DEBUGCTRL_RSVD 0xFFFFFE00 +#define BF_PXP_DEBUGCTRL_RSVD(v) \ + (((v) << 9) & BM_PXP_DEBUGCTRL_RSVD) +#define BM_PXP_DEBUGCTRL_RESET_TLB_STATS 0x00000100 +#define BP_PXP_DEBUGCTRL_SELECT 0 +#define BM_PXP_DEBUGCTRL_SELECT 0x000000FF +#define BF_PXP_DEBUGCTRL_SELECT(v) \ + (((v) << 0) & BM_PXP_DEBUGCTRL_SELECT) +#define BV_PXP_DEBUGCTRL_SELECT__NONE 0x0 +#define BV_PXP_DEBUGCTRL_SELECT__CTRL 0x1 +#define BV_PXP_DEBUGCTRL_SELECT__S0REGS 0x2 +#define BV_PXP_DEBUGCTRL_SELECT__S0BAX 0x3 +#define BV_PXP_DEBUGCTRL_SELECT__S0BAY 0x4 +#define BV_PXP_DEBUGCTRL_SELECT__PXBUF 0x5 +#define BV_PXP_DEBUGCTRL_SELECT__ROTATION 0x6 +#define BV_PXP_DEBUGCTRL_SELECT__ROTBUF0 0x7 +#define BV_PXP_DEBUGCTRL_SELECT__ROTBUF1 0x8 + +#define HW_PXP_DEBUG (0x000001e0) +#define HW_PXP_DEBUG_ADDR \ + (REGS_PXP_BASE + HW_PXP_DEBUG) + +#define BP_PXP_DEBUG_DATA 0 +#define BM_PXP_DEBUG_DATA 0xFFFFFFFF +#define BF_PXP_DEBUG_DATA(v) (v) + +#define HW_PXP_VERSION (0x000001f0) +#define HW_PXP_VERSION_ADDR \ + (REGS_PXP_BASE + HW_PXP_VERSION) + +#define BP_PXP_VERSION_MAJOR 24 +#define BM_PXP_VERSION_MAJOR 0xFF000000 +#define BF_PXP_VERSION_MAJOR(v) \ + (((v) << 24) & BM_PXP_VERSION_MAJOR) +#define BP_PXP_VERSION_MINOR 16 +#define BM_PXP_VERSION_MINOR 0x00FF0000 +#define BF_PXP_VERSION_MINOR(v) \ + (((v) << 16) & BM_PXP_VERSION_MINOR) +#define BP_PXP_VERSION_STEP 0 +#define BM_PXP_VERSION_STEP 0x0000FFFF +#define BF_PXP_VERSION_STEP(v) \ + (((v) << 0) & BM_PXP_VERSION_STEP) -#define HW_PXP_OL0SIZE (0x210 + 0 * 0x40) -#define HW_PXP_OL1SIZE (0x210 + 1 * 0x40) -#define HW_PXP_OL2SIZE (0x210 + 2 * 0x40) -#define HW_PXP_OL3SIZE (0x210 + 3 * 0x40) -#define HW_PXP_OL4SIZE (0x210 + 4 * 0x40) -#define HW_PXP_OL5SIZE (0x210 + 5 * 0x40) -#define HW_PXP_OL6SIZE (0x210 + 6 * 0x40) -#define HW_PXP_OL7SIZE (0x210 + 7 * 0x40) +/* + * multi-register-define name HW_PXP_OLn + * base 0x00000200 + * count 8 + * offset 0x40 + */ +#define HW_PXP_OLn(n) (0x00000200 + (n) * 0x40) +#define HW_PXP_OLn_ADDR(n) \ + (REGS_PXP_BASE + HW_PXP_OLn(n)) +#define BP_PXP_OLn_ADDR 0 +#define BM_PXP_OLn_ADDR 0xFFFFFFFF +#define BF_PXP_OLn_ADDR(v) (v) -#define HW_PXP_OLnSIZE 0x210 -#define BM_PXP_OLnSIZE_HEIGHT 0x000000FF -#define BP_PXP_OLnSIZE_HEIGHT 0 -#define BM_PXP_OLnSIZE_WIDTH 0x0000FF00 +/* + * multi-register-define name HW_PXP_OLnSIZE + * base 0x00000210 + * count 8 + * offset 0x40 + */ +#define HW_PXP_OLnSIZE(n) (0x00000210 + (n) * 0x40) +#define HW_PXP_OLnSIZE_ADDR(n) \ + (REGS_PXP_BASE + HW_PXP_OLnSIZE(n)) +#define BP_PXP_OLnSIZE_XBASE 24 +#define BM_PXP_OLnSIZE_XBASE 0xFF000000 +#define BF_PXP_OLnSIZE_XBASE(v) \ + (((v) << 24) & BM_PXP_OLnSIZE_XBASE) +#define BP_PXP_OLnSIZE_YBASE 16 +#define BM_PXP_OLnSIZE_YBASE 0x00FF0000 +#define BF_PXP_OLnSIZE_YBASE(v) \ + (((v) << 16) & BM_PXP_OLnSIZE_YBASE) #define BP_PXP_OLnSIZE_WIDTH 8 +#define BM_PXP_OLnSIZE_WIDTH 0x0000FF00 +#define BF_PXP_OLnSIZE_WIDTH(v) \ + (((v) << 8) & BM_PXP_OLnSIZE_WIDTH) +#define BP_PXP_OLnSIZE_HEIGHT 0 +#define BM_PXP_OLnSIZE_HEIGHT 0x000000FF +#define BF_PXP_OLnSIZE_HEIGHT(v) \ + (((v) << 0) & BM_PXP_OLnSIZE_HEIGHT) -#define HW_PXP_OL0PARAM (0x220 + 0 * 0x40) -#define HW_PXP_OL1PARAM (0x220 + 1 * 0x40) -#define HW_PXP_OL2PARAM (0x220 + 2 * 0x40) -#define HW_PXP_OL3PARAM (0x220 + 3 * 0x40) -#define HW_PXP_OL4PARAM (0x220 + 4 * 0x40) -#define HW_PXP_OL5PARAM (0x220 + 5 * 0x40) -#define HW_PXP_OL6PARAM (0x220 + 6 * 0x40) -#define HW_PXP_OL7PARAM (0x220 + 7 * 0x40) - -#define HW_PXP_OLnPARAM 0x220 -#define BM_PXP_OLnPARAM_ENABLE 0x00000001 -#define BP_PXP_OLnPARAM_ENABLE 0 -#define BM_PXP_OLnPARAM_ALPHA_CNTL 0x00000006 -#define BP_PXP_OLnPARAM_ALPHA_CNTL 1 -#define BM_PXP_OLnPARAM_ENABLE_COLORKEY 0x00000008 -#define BM_PXP_OLnPARAM_FORMAT 0x000000F0 -#define BP_PXP_OLnPARAM_FORMAT 4 -#define BM_PXP_OLnPARAM_ALPHA 0x0000FF00 +/* + * multi-register-define name HW_PXP_OLnPARAM + * base 0x00000220 + * count 8 + * offset 0x40 + */ +#define HW_PXP_OLnPARAM(n) (0x00000220 + (n) * 0x40) +#define HW_PXP_OLnPARAM_ADDR(n) \ + (REGS_PXP_BASE + HW_PXP_OLnPARAM(n)) +#define BP_PXP_OLnPARAM_RSVD1 20 +#define BM_PXP_OLnPARAM_RSVD1 0xFFF00000 +#define BF_PXP_OLnPARAM_RSVD1(v) \ + (((v) << 20) & BM_PXP_OLnPARAM_RSVD1) +#define BP_PXP_OLnPARAM_ROP 16 +#define BM_PXP_OLnPARAM_ROP 0x000F0000 +#define BF_PXP_OLnPARAM_ROP(v) \ + (((v) << 16) & BM_PXP_OLnPARAM_ROP) +#define BV_PXP_OLnPARAM_ROP__MASKOL 0x0 +#define BV_PXP_OLnPARAM_ROP__MASKNOTOL 0x1 +#define BV_PXP_OLnPARAM_ROP__MASKOLNOT 0x2 +#define BV_PXP_OLnPARAM_ROP__MERGEOL 0x3 +#define BV_PXP_OLnPARAM_ROP__MERGENOTOL 0x4 +#define BV_PXP_OLnPARAM_ROP__MERGEOLNOT 0x5 +#define BV_PXP_OLnPARAM_ROP__NOTCOPYOL 0x6 +#define BV_PXP_OLnPARAM_ROP__NOT 0x7 +#define BV_PXP_OLnPARAM_ROP__NOTMASKOL 0x8 +#define BV_PXP_OLnPARAM_ROP__NOTMERGEOL 0x9 +#define BV_PXP_OLnPARAM_ROP__XOROL 0xA +#define BV_PXP_OLnPARAM_ROP__NOTXOROL 0xB #define BP_PXP_OLnPARAM_ALPHA 8 +#define BM_PXP_OLnPARAM_ALPHA 0x0000FF00 +#define BF_PXP_OLnPARAM_ALPHA(v) \ + (((v) << 8) & BM_PXP_OLnPARAM_ALPHA) +#define BP_PXP_OLnPARAM_FORMAT 4 +#define BM_PXP_OLnPARAM_FORMAT 0x000000F0 +#define BF_PXP_OLnPARAM_FORMAT(v) \ + (((v) << 4) & BM_PXP_OLnPARAM_FORMAT) +#define BV_PXP_OLnPARAM_FORMAT__ARGB8888 0x0 +#define BV_PXP_OLnPARAM_FORMAT__RGB888 0x1 +#define BV_PXP_OLnPARAM_FORMAT__ARGB1555 0x3 +#define BV_PXP_OLnPARAM_FORMAT__RGB565 0x4 +#define BV_PXP_OLnPARAM_FORMAT__RGB555 0x5 +#define BM_PXP_OLnPARAM_ENABLE_COLORKEY 0x00000008 +#define BP_PXP_OLnPARAM_ALPHA_CNTL 1 +#define BM_PXP_OLnPARAM_ALPHA_CNTL 0x00000006 +#define BF_PXP_OLnPARAM_ALPHA_CNTL(v) \ + (((v) << 1) & BM_PXP_OLnPARAM_ALPHA_CNTL) +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Embedded 0x0 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Override 0x1 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__Multiply 0x2 +#define BV_PXP_OLnPARAM_ALPHA_CNTL__ROPs 0x3 +#define BM_PXP_OLnPARAM_ENABLE 0x00000001 + +/* + * multi-register-define name HW_PXP_OLnPARAM2 + * base 0x00000230 + * count 8 + * offset 0x40 + */ +#define HW_PXP_OLnPARAM2(n) (0x00000230 + (n) * 0x40) +#define HW_PXP_OLnPARAM2_ADDR(n) \ + (REGS_PXP_BASE + HW_PXP_OLnPARAM2(n)) +#define BP_PXP_OLnPARAM2_RSVD 0 +#define BM_PXP_OLnPARAM2_RSVD 0xFFFFFFFF +#define BF_PXP_OLnPARAM2_RSVD(v) (v) +#endif /* __ARCH_ARM___PXP_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-dri.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-dri.h @@ -1,7 +1,7 @@ /* - * stmp378x: DRI register definitions + * STMP DRI Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,29 +17,230 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_DRI_BASE (STMP3XXX_REGS_BASE + 0x74000) -#define REGS_DRI_PHYS 0x80074000 -#define REGS_DRI_SIZE 0x2000 - -#define HW_DRI_CTRL 0x0 -#define BM_DRI_CTRL_RUN 0x00000001 -#define BP_DRI_CTRL_RUN 0 -#define BM_DRI_CTRL_ATTENTION_IRQ 0x00000002 -#define BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ 0x00000004 -#define BM_DRI_CTRL_OVERFLOW_IRQ 0x00000008 -#define BM_DRI_CTRL_ATTENTION_IRQ_EN 0x00000200 -#define BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN 0x00000400 -#define BM_DRI_CTRL_OVERFLOW_IRQ_EN 0x00000800 -#define BM_DRI_CTRL_REACQUIRE_PHASE 0x00008000 -#define BM_DRI_CTRL_STOP_ON_PILOT_ERROR 0x02000000 -#define BM_DRI_CTRL_STOP_ON_OFLOW_ERROR 0x04000000 -#define BM_DRI_CTRL_ENABLE_INPUTS 0x20000000 -#define BM_DRI_CTRL_CLKGATE 0x40000000 + +#ifndef __ARCH_ARM___DRI_H +#define __ARCH_ARM___DRI_H 1 + +#define REGS_DRI_BASE (STMP3XXX_REGS_BASE + 0x74000) +#define REGS_DRI_PHYS (0x80074000) +#define REGS_DRI_SIZE 0x00002000 + +#define HW_DRI_CTRL (0x00000000) +#define HW_DRI_CTRL_SET (0x00000004) +#define HW_DRI_CTRL_CLR (0x00000008) +#define HW_DRI_CTRL_TOG (0x0000000c) +#define HW_DRI_CTRL_ADDR \ + (REGS_DRI_BASE + HW_DRI_CTRL) +#define HW_DRI_CTRL_SET_ADDR \ + (REGS_DRI_BASE + HW_DRI_CTRL_SET) +#define HW_DRI_CTRL_CLR_ADDR \ + (REGS_DRI_BASE + HW_DRI_CTRL_CLR) +#define HW_DRI_CTRL_TOG_ADDR \ + (REGS_DRI_BASE + HW_DRI_CTRL_TOG) + #define BM_DRI_CTRL_SFTRST 0x80000000 +#define BV_DRI_CTRL_SFTRST__RUN 0x0 +#define BV_DRI_CTRL_SFTRST__RESET 0x1 +#define BM_DRI_CTRL_CLKGATE 0x40000000 +#define BV_DRI_CTRL_CLKGATE__RUN 0x0 +#define BV_DRI_CTRL_CLKGATE__NO_CLKS 0x1 +#define BM_DRI_CTRL_ENABLE_INPUTS 0x20000000 +#define BV_DRI_CTRL_ENABLE_INPUTS__ANALOG_LINE_IN 0x0 +#define BV_DRI_CTRL_ENABLE_INPUTS__DRI_DIGITAL_IN 0x1 +#define BP_DRI_CTRL_RSVD4 27 +#define BM_DRI_CTRL_RSVD4 0x18000000 +#define BF_DRI_CTRL_RSVD4(v) \ + (((v) << 27) & BM_DRI_CTRL_RSVD4) +#define BM_DRI_CTRL_STOP_ON_OFLOW_ERROR 0x04000000 +#define BV_DRI_CTRL_STOP_ON_OFLOW_ERROR__IGNORE 0x0 +#define BV_DRI_CTRL_STOP_ON_OFLOW_ERROR__STOP 0x1 +#define BM_DRI_CTRL_STOP_ON_PILOT_ERROR 0x02000000 +#define BV_DRI_CTRL_STOP_ON_PILOT_ERROR__IGNORE 0x0 +#define BV_DRI_CTRL_STOP_ON_PILOT_ERROR__STOP 0x1 +#define BP_DRI_CTRL_RSVD3 21 +#define BM_DRI_CTRL_RSVD3 0x01E00000 +#define BF_DRI_CTRL_RSVD3(v) \ + (((v) << 21) & BM_DRI_CTRL_RSVD3) +#define BP_DRI_CTRL_DMA_DELAY_COUNT 16 +#define BM_DRI_CTRL_DMA_DELAY_COUNT 0x001F0000 +#define BF_DRI_CTRL_DMA_DELAY_COUNT(v) \ + (((v) << 16) & BM_DRI_CTRL_DMA_DELAY_COUNT) +#define BM_DRI_CTRL_REACQUIRE_PHASE 0x00008000 +#define BV_DRI_CTRL_REACQUIRE_PHASE__NORMAL 0x0 +#define BV_DRI_CTRL_REACQUIRE_PHASE__NEW_PHASE 0x1 +#define BP_DRI_CTRL_RSVD2 12 +#define BM_DRI_CTRL_RSVD2 0x00007000 +#define BF_DRI_CTRL_RSVD2(v) \ + (((v) << 12) & BM_DRI_CTRL_RSVD2) +#define BM_DRI_CTRL_OVERFLOW_IRQ_EN 0x00000800 +#define BV_DRI_CTRL_OVERFLOW_IRQ_EN__DISABLED 0x0 +#define BV_DRI_CTRL_OVERFLOW_IRQ_EN__ENABLED 0x1 +#define BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN 0x00000400 +#define BV_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN__DISABLED 0x0 +#define BV_DRI_CTRL_PILOT_SYNC_LOSS_IRQ_EN__ENABLED 0x1 +#define BM_DRI_CTRL_ATTENTION_IRQ_EN 0x00000200 +#define BV_DRI_CTRL_ATTENTION_IRQ_EN__DISABLED 0x0 +#define BV_DRI_CTRL_ATTENTION_IRQ_EN__ENABLED 0x1 +#define BP_DRI_CTRL_RSVD1 4 +#define BM_DRI_CTRL_RSVD1 0x000001F0 +#define BF_DRI_CTRL_RSVD1(v) \ + (((v) << 4) & BM_DRI_CTRL_RSVD1) +#define BM_DRI_CTRL_OVERFLOW_IRQ 0x00000008 +#define BV_DRI_CTRL_OVERFLOW_IRQ__NO_REQUEST 0x0 +#define BV_DRI_CTRL_OVERFLOW_IRQ__REQUEST 0x1 +#define BM_DRI_CTRL_PILOT_SYNC_LOSS_IRQ 0x00000004 +#define BV_DRI_CTRL_PILOT_SYNC_LOSS_IRQ__NO_REQUEST 0x0 +#define BV_DRI_CTRL_PILOT_SYNC_LOSS_IRQ__REQUEST 0x1 +#define BM_DRI_CTRL_ATTENTION_IRQ 0x00000002 +#define BV_DRI_CTRL_ATTENTION_IRQ__NO_REQUEST 0x0 +#define BV_DRI_CTRL_ATTENTION_IRQ__REQUEST 0x1 +#define BM_DRI_CTRL_RUN 0x00000001 +#define BV_DRI_CTRL_RUN__HALT 0x0 +#define BV_DRI_CTRL_RUN__RUN 0x1 -#define HW_DRI_TIMING 0x10 -#define BM_DRI_TIMING_GAP_DETECTION_INTERVAL 0x000000FF -#define BP_DRI_TIMING_GAP_DETECTION_INTERVAL 0 -#define BM_DRI_TIMING_PILOT_REP_RATE 0x000F0000 +#define HW_DRI_TIMING (0x00000010) +#define HW_DRI_TIMING_ADDR \ + (REGS_DRI_BASE + HW_DRI_TIMING) + +#define BP_DRI_TIMING_RSVD2 20 +#define BM_DRI_TIMING_RSVD2 0xFFF00000 +#define BF_DRI_TIMING_RSVD2(v) \ + (((v) << 20) & BM_DRI_TIMING_RSVD2) #define BP_DRI_TIMING_PILOT_REP_RATE 16 +#define BM_DRI_TIMING_PILOT_REP_RATE 0x000F0000 +#define BF_DRI_TIMING_PILOT_REP_RATE(v) \ + (((v) << 16) & BM_DRI_TIMING_PILOT_REP_RATE) +#define BP_DRI_TIMING_RSVD1 8 +#define BM_DRI_TIMING_RSVD1 0x0000FF00 +#define BF_DRI_TIMING_RSVD1(v) \ + (((v) << 8) & BM_DRI_TIMING_RSVD1) +#define BP_DRI_TIMING_GAP_DETECTION_INTERVAL 0 +#define BM_DRI_TIMING_GAP_DETECTION_INTERVAL 0x000000FF +#define BF_DRI_TIMING_GAP_DETECTION_INTERVAL(v) \ + (((v) << 0) & BM_DRI_TIMING_GAP_DETECTION_INTERVAL) + +#define HW_DRI_STAT (0x00000020) +#define HW_DRI_STAT_ADDR \ + (REGS_DRI_BASE + HW_DRI_STAT) + +#define BM_DRI_STAT_DRI_PRESENT 0x80000000 +#define BV_DRI_STAT_DRI_PRESENT__UNAVAILABLE 0x0 +#define BV_DRI_STAT_DRI_PRESENT__AVAILABLE 0x1 +#define BP_DRI_STAT_RSVD3 20 +#define BM_DRI_STAT_RSVD3 0x7FF00000 +#define BF_DRI_STAT_RSVD3(v) \ + (((v) << 20) & BM_DRI_STAT_RSVD3) +#define BP_DRI_STAT_PILOT_PHASE 16 +#define BM_DRI_STAT_PILOT_PHASE 0x000F0000 +#define BF_DRI_STAT_PILOT_PHASE(v) \ + (((v) << 16) & BM_DRI_STAT_PILOT_PHASE) +#define BP_DRI_STAT_RSVD2 4 +#define BM_DRI_STAT_RSVD2 0x0000FFF0 +#define BF_DRI_STAT_RSVD2(v) \ + (((v) << 4) & BM_DRI_STAT_RSVD2) +#define BM_DRI_STAT_OVERFLOW_IRQ_SUMMARY 0x00000008 +#define BV_DRI_STAT_OVERFLOW_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_DRI_STAT_OVERFLOW_IRQ_SUMMARY__REQUEST 0x1 +#define BM_DRI_STAT_PILOT_SYNC_LOSS_IRQ_SUMMARY 0x00000004 +#define BV_DRI_STAT_PILOT_SYNC_LOSS_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_DRI_STAT_PILOT_SYNC_LOSS_IRQ_SUMMARY__REQUEST 0x1 +#define BM_DRI_STAT_ATTENTION_IRQ_SUMMARY 0x00000002 +#define BV_DRI_STAT_ATTENTION_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_DRI_STAT_ATTENTION_IRQ_SUMMARY__REQUEST 0x1 +#define BM_DRI_STAT_RSVD1 0x00000001 + +#define HW_DRI_DATA (0x00000030) +#define HW_DRI_DATA_ADDR \ + (REGS_DRI_BASE + HW_DRI_DATA) + +#define BP_DRI_DATA_DATA 0 +#define BM_DRI_DATA_DATA 0xFFFFFFFF +#define BF_DRI_DATA_DATA(v) (v) + +#define HW_DRI_DEBUG0 (0x00000040) +#define HW_DRI_DEBUG0_SET (0x00000044) +#define HW_DRI_DEBUG0_CLR (0x00000048) +#define HW_DRI_DEBUG0_TOG (0x0000004c) +#define HW_DRI_DEBUG0_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG0) +#define HW_DRI_DEBUG0_SET_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG0_SET) +#define HW_DRI_DEBUG0_CLR_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG0_CLR) +#define HW_DRI_DEBUG0_TOG_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG0_TOG) + +#define BM_DRI_DEBUG0_DMAREQ 0x80000000 +#define BM_DRI_DEBUG0_DMACMDKICK 0x40000000 +#define BM_DRI_DEBUG0_DRI_CLK_INPUT 0x20000000 +#define BM_DRI_DEBUG0_DRI_DATA_INPUT 0x10000000 +#define BM_DRI_DEBUG0_TEST_MODE 0x08000000 +#define BM_DRI_DEBUG0_PILOT_REP_RATE 0x04000000 +#define BV_DRI_DEBUG0_PILOT_REP_RATE__8_AT_4MHZ 0x0 +#define BV_DRI_DEBUG0_PILOT_REP_RATE__12_AT_6MHZ 0x1 +#define BP_DRI_DEBUG0_SPARE 18 +#define BM_DRI_DEBUG0_SPARE 0x03FC0000 +#define BF_DRI_DEBUG0_SPARE(v) \ + (((v) << 18) & BM_DRI_DEBUG0_SPARE) +#define BP_DRI_DEBUG0_FRAME 0 +#define BM_DRI_DEBUG0_FRAME 0x0003FFFF +#define BF_DRI_DEBUG0_FRAME(v) \ + (((v) << 0) & BM_DRI_DEBUG0_FRAME) + +#define HW_DRI_DEBUG1 (0x00000050) +#define HW_DRI_DEBUG1_SET (0x00000054) +#define HW_DRI_DEBUG1_CLR (0x00000058) +#define HW_DRI_DEBUG1_TOG (0x0000005c) +#define HW_DRI_DEBUG1_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG1) +#define HW_DRI_DEBUG1_SET_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG1_SET) +#define HW_DRI_DEBUG1_CLR_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG1_CLR) +#define HW_DRI_DEBUG1_TOG_ADDR \ + (REGS_DRI_BASE + HW_DRI_DEBUG1_TOG) + +#define BM_DRI_DEBUG1_INVERT_PILOT 0x80000000 +#define BV_DRI_DEBUG1_INVERT_PILOT__NORMAL 0x0 +#define BV_DRI_DEBUG1_INVERT_PILOT__INVERTED 0x1 +#define BM_DRI_DEBUG1_INVERT_ATTENTION 0x40000000 +#define BV_DRI_DEBUG1_INVERT_ATTENTION__NORMAL 0x0 +#define BV_DRI_DEBUG1_INVERT_ATTENTION__INVERTED 0x1 +#define BM_DRI_DEBUG1_INVERT_DRI_DATA 0x20000000 +#define BV_DRI_DEBUG1_INVERT_DRI_DATA__NORMAL 0x0 +#define BV_DRI_DEBUG1_INVERT_DRI_DATA__INVERTED 0x1 +#define BM_DRI_DEBUG1_INVERT_DRI_CLOCK 0x10000000 +#define BV_DRI_DEBUG1_INVERT_DRI_CLOCK__NORMAL 0x0 +#define BV_DRI_DEBUG1_INVERT_DRI_CLOCK__INVERTED 0x1 +#define BM_DRI_DEBUG1_REVERSE_FRAME 0x08000000 +#define BV_DRI_DEBUG1_REVERSE_FRAME__NORMAL 0x0 +#define BV_DRI_DEBUG1_REVERSE_FRAME__REVERSED 0x1 +#define BP_DRI_DEBUG1_RSVD1 18 +#define BM_DRI_DEBUG1_RSVD1 0x07FC0000 +#define BF_DRI_DEBUG1_RSVD1(v) \ + (((v) << 18) & BM_DRI_DEBUG1_RSVD1) +#define BP_DRI_DEBUG1_SWIZZLED_FRAME 0 +#define BM_DRI_DEBUG1_SWIZZLED_FRAME 0x0003FFFF +#define BF_DRI_DEBUG1_SWIZZLED_FRAME(v) \ + (((v) << 0) & BM_DRI_DEBUG1_SWIZZLED_FRAME) + +#define HW_DRI_VERSION (0x00000060) +#define HW_DRI_VERSION_ADDR \ + (REGS_DRI_BASE + HW_DRI_VERSION) + +#define BP_DRI_VERSION_MAJOR 24 +#define BM_DRI_VERSION_MAJOR 0xFF000000 +#define BF_DRI_VERSION_MAJOR(v) \ + (((v) << 24) & BM_DRI_VERSION_MAJOR) +#define BP_DRI_VERSION_MINOR 16 +#define BM_DRI_VERSION_MINOR 0x00FF0000 +#define BF_DRI_VERSION_MINOR(v) \ + (((v) << 16) & BM_DRI_VERSION_MINOR) +#define BP_DRI_VERSION_STEP 0 +#define BM_DRI_VERSION_STEP 0x0000FFFF +#define BF_DRI_VERSION_STEP(v) \ + (((v) << 0) & BM_DRI_VERSION_STEP) +#endif /* __ARCH_ARM___DRI_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h @@ -1,7 +1,7 @@ /* - * stmp378x: OCOTP register definitions + * STMP OCOTP Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,24 +17,339 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_OCOTP_BASE (STMP3XXX_REGS_BASE + 0x2C000) -#define REGS_OCOTP_PHYS 0x8002C000 -#define REGS_OCOTP_SIZE 0x2000 -#define HW_OCOTP_CTRL 0x0 -#define BM_OCOTP_CTRL_BUSY 0x00000100 -#define BM_OCOTP_CTRL_ERROR 0x00000200 -#define BM_OCOTP_CTRL_RD_BANK_OPEN 0x00001000 -#define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x00002000 -#define BM_OCOTP_CTRL_WR_UNLOCK 0xFFFF0000 +#ifndef __ARCH_ARM___OCOTP_H +#define __ARCH_ARM___OCOTP_H 1 + +#define REGS_OCOTP_BASE (STMP3XXX_REGS_BASE + 0x2c000) +#define REGS_OCOTP_PHYS (0x8002C000) +#define REGS_OCOTP_SIZE 0x00002000 + +#define HW_OCOTP_CTRL (0x00000000) +#define HW_OCOTP_CTRL_SET (0x00000004) +#define HW_OCOTP_CTRL_CLR (0x00000008) +#define HW_OCOTP_CTRL_TOG (0x0000000c) +#define HW_OCOTP_CTRL_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_CTRL) +#define HW_OCOTP_CTRL_SET_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_CTRL_SET) +#define HW_OCOTP_CTRL_CLR_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_CTRL_CLR) +#define HW_OCOTP_CTRL_TOG_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_CTRL_TOG) + #define BP_OCOTP_CTRL_WR_UNLOCK 16 +#define BM_OCOTP_CTRL_WR_UNLOCK 0xFFFF0000 +#define BF_OCOTP_CTRL_WR_UNLOCK(v) \ + (((v) << 16) & BM_OCOTP_CTRL_WR_UNLOCK) +#define BV_OCOTP_CTRL_WR_UNLOCK__KEY 0x3E77 +#define BP_OCOTP_CTRL_RSRVD2 14 +#define BM_OCOTP_CTRL_RSRVD2 0x0000C000 +#define BF_OCOTP_CTRL_RSRVD2(v) \ + (((v) << 14) & BM_OCOTP_CTRL_RSRVD2) +#define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x00002000 +#define BM_OCOTP_CTRL_RD_BANK_OPEN 0x00001000 +#define BP_OCOTP_CTRL_RSRVD1 10 +#define BM_OCOTP_CTRL_RSRVD1 0x00000C00 +#define BF_OCOTP_CTRL_RSRVD1(v) \ + (((v) << 10) & BM_OCOTP_CTRL_RSRVD1) +#define BM_OCOTP_CTRL_ERROR 0x00000200 +#define BM_OCOTP_CTRL_BUSY 0x00000100 +#define BP_OCOTP_CTRL_RSRVD0 5 +#define BM_OCOTP_CTRL_RSRVD0 0x000000E0 +#define BF_OCOTP_CTRL_RSRVD0(v) \ + (((v) << 5) & BM_OCOTP_CTRL_RSRVD0) +#define BP_OCOTP_CTRL_ADDR 0 +#define BM_OCOTP_CTRL_ADDR 0x0000001F +#define BF_OCOTP_CTRL_ADDR(v) \ + (((v) << 0) & BM_OCOTP_CTRL_ADDR) + +#define HW_OCOTP_DATA (0x00000010) +#define HW_OCOTP_DATA_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_DATA) + +#define BP_OCOTP_DATA_DATA 0 +#define BM_OCOTP_DATA_DATA 0xFFFFFFFF +#define BF_OCOTP_DATA_DATA(v) (v) + +/* + * multi-register-define name HW_OCOTP_CUSTn + * base 0x00000020 + * count 4 + * offset 0x10 + */ +#define HW_OCOTP_CUSTn(n) (0x00000020 + (n) * 0x10) +#define HW_OCOTP_CUSTn_ADDR(n) \ + (REGS_OCOTP_BASE + HW_OCOTP_CUSTn(n)) +#define BP_OCOTP_CUSTn_BITS 0 +#define BM_OCOTP_CUSTn_BITS 0xFFFFFFFF +#define BF_OCOTP_CUSTn_BITS(v) (v) + +/* + * multi-register-define name HW_OCOTP_CRYPTOn + * base 0x00000060 + * count 4 + * offset 0x10 + */ +#define HW_OCOTP_CRYPTOn(n) (0x00000060 + (n) * 0x10) +#define HW_OCOTP_CRYPTOn_ADDR(n) \ + (REGS_OCOTP_BASE + HW_OCOTP_CRYPTOn(n)) +#define BP_OCOTP_CRYPTOn_BITS 0 +#define BM_OCOTP_CRYPTOn_BITS 0xFFFFFFFF +#define BF_OCOTP_CRYPTOn_BITS(v) (v) + +/* + * multi-register-define name HW_OCOTP_HWCAPn + * base 0x000000A0 + * count 6 + * offset 0x10 + */ +#define HW_OCOTP_HWCAPn(n) (0x000000a0 + (n) * 0x10) +#define HW_OCOTP_HWCAPn_ADDR(n) \ + (REGS_OCOTP_BASE + HW_OCOTP_HWCAPn(n)) +#define BP_OCOTP_HWCAPn_BITS 0 +#define BM_OCOTP_HWCAPn_BITS 0xFFFFFFFF +#define BF_OCOTP_HWCAPn_BITS(v) (v) + +#define HW_OCOTP_SWCAP (0x00000100) +#define HW_OCOTP_SWCAP_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_SWCAP) + +#define BP_OCOTP_SWCAP_BITS 0 +#define BM_OCOTP_SWCAP_BITS 0xFFFFFFFF +#define BF_OCOTP_SWCAP_BITS(v) (v) + +#define HW_OCOTP_CUSTCAP (0x00000110) +#define HW_OCOTP_CUSTCAP_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_CUSTCAP) + +#define BM_OCOTP_CUSTCAP_CUST_DISABLE_WMADRM9 0x80000000 +#define BM_OCOTP_CUSTCAP_CUST_DISABLE_JANUSDRM10 0x40000000 +#define BP_OCOTP_CUSTCAP_RSRVD1 5 +#define BM_OCOTP_CUSTCAP_RSRVD1 0x3FFFFFE0 +#define BF_OCOTP_CUSTCAP_RSRVD1(v) \ + (((v) << 5) & BM_OCOTP_CUSTCAP_RSRVD1) +#define BM_OCOTP_CUSTCAP_ENABLE_SJTAG_12MA_DRIVE 0x00000010 +#define BM_OCOTP_CUSTCAP_USE_PARALLEL_JTAG 0x00000008 +#define BM_OCOTP_CUSTCAP_RTC_XTAL_32768_PRESENT 0x00000004 +#define BM_OCOTP_CUSTCAP_RTC_XTAL_32000_PRESENT 0x00000002 +#define BM_OCOTP_CUSTCAP_RSRVD0 0x00000001 + +#define HW_OCOTP_LOCK (0x00000120) +#define HW_OCOTP_LOCK_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_LOCK) + +#define BM_OCOTP_LOCK_ROM7 0x80000000 +#define BM_OCOTP_LOCK_ROM6 0x40000000 +#define BM_OCOTP_LOCK_ROM5 0x20000000 +#define BM_OCOTP_LOCK_ROM4 0x10000000 +#define BM_OCOTP_LOCK_ROM3 0x08000000 +#define BM_OCOTP_LOCK_ROM2 0x04000000 +#define BM_OCOTP_LOCK_ROM1 0x02000000 +#define BM_OCOTP_LOCK_ROM0 0x01000000 +#define BM_OCOTP_LOCK_HWSW_SHADOW_ALT 0x00800000 +#define BM_OCOTP_LOCK_CRYPTODCP_ALT 0x00400000 +#define BM_OCOTP_LOCK_CRYPTOKEY_ALT 0x00200000 +#define BM_OCOTP_LOCK_PIN 0x00100000 +#define BM_OCOTP_LOCK_OPS 0x00080000 +#define BM_OCOTP_LOCK_UN2 0x00040000 +#define BM_OCOTP_LOCK_UN1 0x00020000 +#define BM_OCOTP_LOCK_UN0 0x00010000 +#define BP_OCOTP_LOCK_UNALLOCATED 11 +#define BM_OCOTP_LOCK_UNALLOCATED 0x0000F800 +#define BF_OCOTP_LOCK_UNALLOCATED(v) \ + (((v) << 11) & BM_OCOTP_LOCK_UNALLOCATED) +#define BM_OCOTP_LOCK_ROM_SHADOW 0x00000400 +#define BM_OCOTP_LOCK_CUSTCAP 0x00000200 +#define BM_OCOTP_LOCK_HWSW 0x00000100 +#define BM_OCOTP_LOCK_CUSTCAP_SHADOW 0x00000080 +#define BM_OCOTP_LOCK_HWSW_SHADOW 0x00000040 +#define BM_OCOTP_LOCK_CRYPTODCP 0x00000020 +#define BM_OCOTP_LOCK_CRYPTOKEY 0x00000010 +#define BM_OCOTP_LOCK_CUST3 0x00000008 +#define BM_OCOTP_LOCK_CUST2 0x00000004 +#define BM_OCOTP_LOCK_CUST1 0x00000002 +#define BM_OCOTP_LOCK_CUST0 0x00000001 + +/* + * multi-register-define name HW_OCOTP_OPSn + * base 0x00000130 + * count 4 + * offset 0x10 + */ +#define HW_OCOTP_OPSn(n) (0x00000130 + (n) * 0x10) +#define HW_OCOTP_OPSn_ADDR(n) \ + (REGS_OCOTP_BASE + HW_OCOTP_OPSn(n)) +#define BP_OCOTP_OPSn_BITS 0 +#define BM_OCOTP_OPSn_BITS 0xFFFFFFFF +#define BF_OCOTP_OPSn_BITS(v) (v) + +/* + * multi-register-define name HW_OCOTP_UNn + * base 0x00000170 + * count 3 + * offset 0x10 + */ +#define HW_OCOTP_UNn(n) (0x00000170 + (n) * 0x10) +#define HW_OCOTP_UNn_ADDR(n) \ + (REGS_OCOTP_BASE + HW_OCOTP_UNn(n)) +#define BP_OCOTP_UNn_BITS 0 +#define BM_OCOTP_UNn_BITS 0xFFFFFFFF +#define BF_OCOTP_UNn_BITS(v) (v) + +#define HW_OCOTP_ROM0 (0x000001a0) +#define HW_OCOTP_ROM0_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM0) + +#define BP_OCOTP_ROM0_BOOT_MODE 24 +#define BM_OCOTP_ROM0_BOOT_MODE 0xFF000000 +#define BF_OCOTP_ROM0_BOOT_MODE(v) \ + (((v) << 24) & BM_OCOTP_ROM0_BOOT_MODE) +#define BM_OCOTP_ROM0_ENABLE_PJTAG_12MA_DRIVE 0x00800000 +#define BM_OCOTP_ROM0_USE_PARALLEL_JTAG 0x00400000 +#define BP_OCOTP_ROM0_SD_POWER_GATE_GPIO 20 +#define BM_OCOTP_ROM0_SD_POWER_GATE_GPIO 0x00300000 +#define BF_OCOTP_ROM0_SD_POWER_GATE_GPIO(v) \ + (((v) << 20) & BM_OCOTP_ROM0_SD_POWER_GATE_GPIO) +#define BP_OCOTP_ROM0_SD_POWER_UP_DELAY 14 +#define BM_OCOTP_ROM0_SD_POWER_UP_DELAY 0x000FC000 +#define BF_OCOTP_ROM0_SD_POWER_UP_DELAY(v) \ + (((v) << 14) & BM_OCOTP_ROM0_SD_POWER_UP_DELAY) +#define BP_OCOTP_ROM0_SD_BUS_WIDTH 12 +#define BM_OCOTP_ROM0_SD_BUS_WIDTH 0x00003000 +#define BF_OCOTP_ROM0_SD_BUS_WIDTH(v) \ + (((v) << 12) & BM_OCOTP_ROM0_SD_BUS_WIDTH) +#define BP_OCOTP_ROM0_SSP_SCK_INDEX 8 +#define BM_OCOTP_ROM0_SSP_SCK_INDEX 0x00000F00 +#define BF_OCOTP_ROM0_SSP_SCK_INDEX(v) \ + (((v) << 8) & BM_OCOTP_ROM0_SSP_SCK_INDEX) +#define BM_OCOTP_ROM0_RSRVD3 0x00000080 +#define BM_OCOTP_ROM0_DISABLE_SPI_NOR_FAST_ READ 0x00000040 +#define BM_OCOTP_ROM0_ENABLE_USB_BOOT_SERIAL_NUM 0x00000020 +#define BM_OCOTP_ROM0_ENABLE_UNENCRYPTED_ BOOT 0x00000010 +#define BM_OCOTP_ROM0_SD_MBR_BOOT 0x00000008 +#define BM_OCOTP_ROM0_RSRVD2 0x00000004 +#define BM_OCOTP_ROM0_RSRVD1 0x00000002 +#define BM_OCOTP_ROM0_RSRVD0 0x00000001 + +#define HW_OCOTP_ROM1 (0x000001b0) +#define HW_OCOTP_ROM1_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM1) + +#define BP_OCOTP_ROM1_RSRVD1 30 +#define BM_OCOTP_ROM1_RSRVD1 0xC0000000 +#define BF_OCOTP_ROM1_RSRVD1(v) \ + (((v) << 30) & BM_OCOTP_ROM1_RSRVD1) +#define BP_OCOTP_ROM1_USE_ALT_GPMI_RDY3 28 +#define BM_OCOTP_ROM1_USE_ALT_GPMI_RDY3 0x30000000 +#define BF_OCOTP_ROM1_USE_ALT_GPMI_RDY3(v) \ + (((v) << 28) & BM_OCOTP_ROM1_USE_ALT_GPMI_RDY3) +#define BP_OCOTP_ROM1_USE_ALT_GPMI_CE3 26 +#define BM_OCOTP_ROM1_USE_ALT_GPMI_CE3 0x0C000000 +#define BF_OCOTP_ROM1_USE_ALT_GPMI_CE3(v) \ + (((v) << 26) & BM_OCOTP_ROM1_USE_ALT_GPMI_CE3) +#define BM_OCOTP_ROM1_USE_ALT_GPMI_RDY2 0x02000000 +#define BM_OCOTP_ROM1_USE_ALT_GPMI_CE2 0x01000000 +#define BM_OCOTP_ROM1_ENABLE_NAND3_CE_RDY_PULLUP 0x00800000 +#define BM_OCOTP_ROM1_ENABLE_NAND2_CE_RDY_PULLUP 0x00400000 +#define BM_OCOTP_ROM1_ENABLE_NAND1_CE_RDY_PULLUP 0x00200000 +#define BM_OCOTP_ROM1_ENABLE_NAND0_CE_RDY_PULLUP 0x00100000 +#define BM_OCOTP_ROM1_UNTOUCH_INTERNAL_SSP_PULLUP 0x00080000 +#define BM_OCOTP_ROM1_SSP2_EXT_PULLUP 0x00040000 +#define BM_OCOTP_ROM1_SSP1_EXT_PULLUP 0x00020000 +#define BM_OCOTP_ROM1_SD_INCREASE_INIT_SEQ_TIME 0x00010000 +#define BM_OCOTP_ROM1_SD_INIT_SEQ_2_ENABLE 0x00008000 +#define BM_OCOTP_ROM1_SD_CMD0_DISABLE 0x00004000 +#define BM_OCOTP_ROM1_SD_INIT_SEQ_1_DISABLE 0x00002000 +#define BM_OCOTP_ROM1_USE_ALT_SSP1_DATA4_7 0x00001000 +#define BP_OCOTP_ROM1_BOOT_SEARCH_COUNT 8 +#define BM_OCOTP_ROM1_BOOT_SEARCH_COUNT 0x00000F00 +#define BF_OCOTP_ROM1_BOOT_SEARCH_COUNT(v) \ + (((v) << 8) & BM_OCOTP_ROM1_BOOT_SEARCH_COUNT) +#define BP_OCOTP_ROM1_RSRVD0 3 +#define BM_OCOTP_ROM1_RSRVD0 0x000000F8 +#define BF_OCOTP_ROM1_RSRVD0(v) \ + (((v) << 3) & BM_OCOTP_ROM1_RSRVD0) +#define BP_OCOTP_ROM1_NUMBER_OF_NANDS 0 +#define BM_OCOTP_ROM1_NUMBER_OF_NANDS 0x00000007 +#define BF_OCOTP_ROM1_NUMBER_OF_NANDS(v) \ + (((v) << 0) & BM_OCOTP_ROM1_NUMBER_OF_NANDS) + +#define HW_OCOTP_ROM2 (0x000001c0) +#define HW_OCOTP_ROM2_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM2) + +#define BP_OCOTP_ROM2_USB_VID 16 +#define BM_OCOTP_ROM2_USB_VID 0xFFFF0000 +#define BF_OCOTP_ROM2_USB_VID(v) \ + (((v) << 16) & BM_OCOTP_ROM2_USB_VID) +#define BP_OCOTP_ROM2_USB_PID 0 +#define BM_OCOTP_ROM2_USB_PID 0x0000FFFF +#define BF_OCOTP_ROM2_USB_PID(v) \ + (((v) << 0) & BM_OCOTP_ROM2_USB_PID) + +#define HW_OCOTP_ROM3 (0x000001d0) +#define HW_OCOTP_ROM3_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM3) + +#define BP_OCOTP_ROM3_RSRVD1 10 +#define BM_OCOTP_ROM3_RSRVD1 0xFFFFFC00 +#define BF_OCOTP_ROM3_RSRVD1(v) \ + (((v) << 10) & BM_OCOTP_ROM3_RSRVD1) +#define BP_OCOTP_ROM3_RSRVD0 0 +#define BM_OCOTP_ROM3_RSRVD0 0x000003FF +#define BF_OCOTP_ROM3_RSRVD0(v) \ + (((v) << 0) & BM_OCOTP_ROM3_RSRVD0) + +#define HW_OCOTP_ROM4 (0x000001e0) +#define HW_OCOTP_ROM4_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM4) + +#define BP_OCOTP_ROM4_BITS 0 +#define BM_OCOTP_ROM4_BITS 0xFFFFFFFF +#define BF_OCOTP_ROM4_BITS(v) (v) + +#define HW_OCOTP_ROM5 (0x000001f0) +#define HW_OCOTP_ROM5_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM5) + +#define BP_OCOTP_ROM5_BITS 0 +#define BM_OCOTP_ROM5_BITS 0xFFFFFFFF +#define BF_OCOTP_ROM5_BITS(v) (v) + +#define HW_OCOTP_ROM6 (0x00000200) +#define HW_OCOTP_ROM6_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM6) + +#define BP_OCOTP_ROM6_BITS 0 +#define BM_OCOTP_ROM6_BITS 0xFFFFFFFF +#define BF_OCOTP_ROM6_BITS(v) (v) + +#define HW_OCOTP_ROM7 (0x00000210) +#define HW_OCOTP_ROM7_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_ROM7) -#define HW_OCOTP_DATA 0x10 +#define BP_OCOTP_ROM7_BITS 0 +#define BM_OCOTP_ROM7_BITS 0xFFFFFFFF +#define BF_OCOTP_ROM7_BITS(v) (v) -#define HW_OCOTP_CUST0 (0x20 + 0 * 0x10) -#define HW_OCOTP_CUST1 (0x20 + 1 * 0x10) -#define HW_OCOTP_CUST2 (0x20 + 2 * 0x10) -#define HW_OCOTP_CUST3 (0x20 + 3 * 0x10) +#define HW_OCOTP_VERSION (0x00000220) +#define HW_OCOTP_VERSION_ADDR \ + (REGS_OCOTP_BASE + HW_OCOTP_VERSION) -#define HW_OCOTP_CUSTn 0x20 +#define BP_OCOTP_VERSION_MAJOR 24 +#define BM_OCOTP_VERSION_MAJOR 0xFF000000 +#define BF_OCOTP_VERSION_MAJOR(v) \ + (((v) << 24) & BM_OCOTP_VERSION_MAJOR) +#define BP_OCOTP_VERSION_MINOR 16 +#define BM_OCOTP_VERSION_MINOR 0x00FF0000 +#define BF_OCOTP_VERSION_MINOR(v) \ + (((v) << 16) & BM_OCOTP_VERSION_MINOR) +#define BP_OCOTP_VERSION_STEP 0 +#define BM_OCOTP_VERSION_STEP 0x0000FFFF +#define BF_OCOTP_VERSION_STEP(v) \ + (((v) << 0) & BM_OCOTP_VERSION_STEP) +#endif /* __ARCH_ARM___OCOTP_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/i2c.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/i2c.h @@ -0,0 +1,48 @@ +/* + * Freescale STMP378X I2C low-level/dma functions + * + * Author: Dmitrij Frasenyak + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _ARM_ARCH_I2C_H +#define _ARM_ARCH_I2C_H + +#include +#include + +#include +#include + +#define I2C_READ 1 +#define I2C_WRITE 0 + +void hw_i2c_clear_dma_interrupt(void); +int hw_i2c_init(struct device *dev); +void hw_i2c_stop(struct device *dev); +void hw_i2c_setup_write(u8 addr, void *buff, int len, int flags); +void hw_i2c_setup_read(u8 addr, void *buff, int len, int flags); +void hw_i2c_run(int dir); +void hw_i2c_reset_dma(void); +void hw_i2c_finish_read(void *buff, int len); + +struct stmp378x_i2c_dev { + struct device *dev; + int irq_dma; + int irq_err; + struct completion cmd_complete; + u32 cmd_err; + struct i2c_adapter adapter; +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-ssp.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-ssp.h @@ -1,7 +1,7 @@ /* - * stmp378x: SSP register definitions + * STMP SSP Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,86 +17,427 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_SSP1_BASE (STMP3XXX_REGS_BASE + 0x10000) -#define REGS_SSP1_PHYS 0x80010000 -#define REGS_SSP2_BASE (STMP3XXX_REGS_BASE + 0x34000) -#define REGS_SSP2_PHYS 0x80034000 -#define REGS_SSP_SIZE 0x2000 -#define HW_SSP_CTRL0 0x0 -#define BM_SSP_CTRL0_XFER_COUNT 0x0000FFFF -#define BP_SSP_CTRL0_XFER_COUNT 0 -#define BM_SSP_CTRL0_ENABLE 0x00010000 -#define BM_SSP_CTRL0_GET_RESP 0x00020000 -#define BM_SSP_CTRL0_LONG_RESP 0x00080000 -#define BM_SSP_CTRL0_WAIT_FOR_CMD 0x00100000 -#define BM_SSP_CTRL0_WAIT_FOR_IRQ 0x00200000 -#define BM_SSP_CTRL0_BUS_WIDTH 0x00C00000 -#define BP_SSP_CTRL0_BUS_WIDTH 22 -#define BM_SSP_CTRL0_DATA_XFER 0x01000000 -#define BM_SSP_CTRL0_READ 0x02000000 -#define BM_SSP_CTRL0_IGNORE_CRC 0x04000000 -#define BM_SSP_CTRL0_LOCK_CS 0x08000000 -#define BM_SSP_CTRL0_RUN 0x20000000 -#define BM_SSP_CTRL0_CLKGATE 0x40000000 +#ifndef __ARCH_ARM___SSP_H +#define __ARCH_ARM___SSP_H 1 + +#define REGS_SSP_BASE (STMP3XXX_REGS_BASE + 0x10000) +#define REGS_SSP1_BASE (STMP3XXX_REGS_BASE + 0x10000) +#define REGS_SSP1_PHYS (0x80010000) +#define REGS_SSP2_BASE (STMP3XXX_REGS_BASE + 0x34000) +#define REGS_SSP2_PHYS (0x80034000) +#define REGS_SSP_SIZE 0x00002000 + +#define HW_SSP_CTRL0 (0x00000000) +#define HW_SSP_CTRL0_SET (0x00000004) +#define HW_SSP_CTRL0_CLR (0x00000008) +#define HW_SSP_CTRL0_TOG (0x0000000c) +#define HW_SSP_CTRL0_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL0) +#define HW_SSP_CTRL0_SET_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL0_SET) +#define HW_SSP_CTRL0_CLR_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL0_CLR) +#define HW_SSP_CTRL0_TOG_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL0_TOG) + #define BM_SSP_CTRL0_SFTRST 0x80000000 +#define BM_SSP_CTRL0_CLKGATE 0x40000000 +#define BM_SSP_CTRL0_RUN 0x20000000 +#define BM_SSP_CTRL0_SDIO_IRQ_CHECK 0x10000000 +#define BM_SSP_CTRL0_LOCK_CS 0x08000000 +#define BM_SSP_CTRL0_IGNORE_CRC 0x04000000 +#define BM_SSP_CTRL0_READ 0x02000000 +#define BM_SSP_CTRL0_DATA_XFER 0x01000000 +#define BP_SSP_CTRL0_BUS_WIDTH 22 +#define BM_SSP_CTRL0_BUS_WIDTH 0x00C00000 +#define BF_SSP_CTRL0_BUS_WIDTH(v) \ + (((v) << 22) & BM_SSP_CTRL0_BUS_WIDTH) +#define BV_SSP_CTRL0_BUS_WIDTH__ONE_BIT 0x0 +#define BV_SSP_CTRL0_BUS_WIDTH__FOUR_BIT 0x1 +#define BV_SSP_CTRL0_BUS_WIDTH__EIGHT_BIT 0x2 +#define BM_SSP_CTRL0_WAIT_FOR_IRQ 0x00200000 +#define BM_SSP_CTRL0_WAIT_FOR_CMD 0x00100000 +#define BM_SSP_CTRL0_LONG_RESP 0x00080000 +#define BM_SSP_CTRL0_CHECK_RESP 0x00040000 +#define BM_SSP_CTRL0_GET_RESP 0x00020000 +#define BM_SSP_CTRL0_ENABLE 0x00010000 +#define BP_SSP_CTRL0_XFER_COUNT 0 +#define BM_SSP_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_SSP_CTRL0_XFER_COUNT(v) \ + (((v) << 0) & BM_SSP_CTRL0_XFER_COUNT) -#define HW_SSP_CMD0 0x10 -#define BM_SSP_CMD0_CMD 0x000000FF -#define BP_SSP_CMD0_CMD 0 -#define BM_SSP_CMD0_BLOCK_COUNT 0x0000FF00 -#define BP_SSP_CMD0_BLOCK_COUNT 8 -#define BM_SSP_CMD0_BLOCK_SIZE 0x000F0000 -#define BP_SSP_CMD0_BLOCK_SIZE 16 +#define HW_SSP_CMD0 (0x00000010) +#define HW_SSP_CMD0_SET (0x00000014) +#define HW_SSP_CMD0_CLR (0x00000018) +#define HW_SSP_CMD0_TOG (0x0000001c) +#define HW_SSP_CMD0_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CMD0) +#define HW_SSP_CMD0_SET_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CMD0_SET) +#define HW_SSP_CMD0_CLR_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CMD0_CLR) +#define HW_SSP_CMD0_TOG_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CMD0_TOG) + +#define BP_SSP_CMD0_RSVD0 23 +#define BM_SSP_CMD0_RSVD0 0xFF800000 +#define BF_SSP_CMD0_RSVD0(v) \ + (((v) << 23) & BM_SSP_CMD0_RSVD0) +#define BM_SSP_CMD0_SLOW_CLKING_EN 0x00400000 +#define BM_SSP_CMD0_CONT_CLKING_EN 0x00200000 #define BM_SSP_CMD0_APPEND_8CYC 0x00100000 -#define BM_SSP_CMD1_CMD_ARG 0xFFFFFFFF +#define BP_SSP_CMD0_BLOCK_SIZE 16 +#define BM_SSP_CMD0_BLOCK_SIZE 0x000F0000 +#define BF_SSP_CMD0_BLOCK_SIZE(v) \ + (((v) << 16) & BM_SSP_CMD0_BLOCK_SIZE) +#define BP_SSP_CMD0_BLOCK_COUNT 8 +#define BM_SSP_CMD0_BLOCK_COUNT 0x0000FF00 +#define BF_SSP_CMD0_BLOCK_COUNT(v) \ + (((v) << 8) & BM_SSP_CMD0_BLOCK_COUNT) +#define BP_SSP_CMD0_CMD 0 +#define BM_SSP_CMD0_CMD 0x000000FF +#define BF_SSP_CMD0_CMD(v) \ + (((v) << 0) & BM_SSP_CMD0_CMD) +#define BV_SSP_CMD0_CMD__MMC_GO_IDLE_STATE 0x00 +#define BV_SSP_CMD0_CMD__MMC_SEND_OP_COND 0x01 +#define BV_SSP_CMD0_CMD__MMC_ALL_SEND_CID 0x02 +#define BV_SSP_CMD0_CMD__MMC_SET_RELATIVE_ADDR 0x03 +#define BV_SSP_CMD0_CMD__MMC_SET_DSR 0x04 +#define BV_SSP_CMD0_CMD__MMC_RESERVED_5 0x05 +#define BV_SSP_CMD0_CMD__MMC_SWITCH 0x06 +#define BV_SSP_CMD0_CMD__MMC_SELECT_DESELECT_CARD 0x07 +#define BV_SSP_CMD0_CMD__MMC_SEND_EXT_CSD 0x08 +#define BV_SSP_CMD0_CMD__MMC_SEND_CSD 0x09 +#define BV_SSP_CMD0_CMD__MMC_SEND_CID 0x0A +#define BV_SSP_CMD0_CMD__MMC_READ_DAT_UNTIL_STOP 0x0B +#define BV_SSP_CMD0_CMD__MMC_STOP_TRANSMISSION 0x0C +#define BV_SSP_CMD0_CMD__MMC_SEND_STATUS 0x0D +#define BV_SSP_CMD0_CMD__MMC_BUSTEST_R 0x0E +#define BV_SSP_CMD0_CMD__MMC_GO_INACTIVE_STATE 0x0F +#define BV_SSP_CMD0_CMD__MMC_SET_BLOCKLEN 0x10 +#define BV_SSP_CMD0_CMD__MMC_READ_SINGLE_BLOCK 0x11 +#define BV_SSP_CMD0_CMD__MMC_READ_MULTIPLE_BLOCK 0x12 +#define BV_SSP_CMD0_CMD__MMC_BUSTEST_W 0x13 +#define BV_SSP_CMD0_CMD__MMC_WRITE_DAT_UNTIL_STOP 0x14 +#define BV_SSP_CMD0_CMD__MMC_SET_BLOCK_COUNT 0x17 +#define BV_SSP_CMD0_CMD__MMC_WRITE_BLOCK 0x18 +#define BV_SSP_CMD0_CMD__MMC_WRITE_MULTIPLE_BLOCK 0x19 +#define BV_SSP_CMD0_CMD__MMC_PROGRAM_CID 0x1A +#define BV_SSP_CMD0_CMD__MMC_PROGRAM_CSD 0x1B +#define BV_SSP_CMD0_CMD__MMC_SET_WRITE_PROT 0x1C +#define BV_SSP_CMD0_CMD__MMC_CLR_WRITE_PROT 0x1D +#define BV_SSP_CMD0_CMD__MMC_SEND_WRITE_PROT 0x1E +#define BV_SSP_CMD0_CMD__MMC_ERASE_GROUP_START 0x23 +#define BV_SSP_CMD0_CMD__MMC_ERASE_GROUP_END 0x24 +#define BV_SSP_CMD0_CMD__MMC_ERASE 0x26 +#define BV_SSP_CMD0_CMD__MMC_FAST_IO 0x27 +#define BV_SSP_CMD0_CMD__MMC_GO_IRQ_STATE 0x28 +#define BV_SSP_CMD0_CMD__MMC_LOCK_UNLOCK 0x2A +#define BV_SSP_CMD0_CMD__MMC_APP_CMD 0x37 +#define BV_SSP_CMD0_CMD__MMC_GEN_CMD 0x38 +#define BV_SSP_CMD0_CMD__SD_GO_IDLE_STATE 0x00 +#define BV_SSP_CMD0_CMD__SD_ALL_SEND_CID 0x02 +#define BV_SSP_CMD0_CMD__SD_SEND_RELATIVE_ADDR 0x03 +#define BV_SSP_CMD0_CMD__SD_SET_DSR 0x04 +#define BV_SSP_CMD0_CMD__SD_IO_SEND_OP_COND 0x05 +#define BV_SSP_CMD0_CMD__SD_SELECT_DESELECT_CARD 0x07 +#define BV_SSP_CMD0_CMD__SD_SEND_CSD 0x09 +#define BV_SSP_CMD0_CMD__SD_SEND_CID 0x0A +#define BV_SSP_CMD0_CMD__SD_STOP_TRANSMISSION 0x0C +#define BV_SSP_CMD0_CMD__SD_SEND_STATUS 0x0D +#define BV_SSP_CMD0_CMD__SD_GO_INACTIVE_STATE 0x0F +#define BV_SSP_CMD0_CMD__SD_SET_BLOCKLEN 0x10 +#define BV_SSP_CMD0_CMD__SD_READ_SINGLE_BLOCK 0x11 +#define BV_SSP_CMD0_CMD__SD_READ_MULTIPLE_BLOCK 0x12 +#define BV_SSP_CMD0_CMD__SD_WRITE_BLOCK 0x18 +#define BV_SSP_CMD0_CMD__SD_WRITE_MULTIPLE_BLOCK 0x19 +#define BV_SSP_CMD0_CMD__SD_PROGRAM_CSD 0x1B +#define BV_SSP_CMD0_CMD__SD_SET_WRITE_PROT 0x1C +#define BV_SSP_CMD0_CMD__SD_CLR_WRITE_PROT 0x1D +#define BV_SSP_CMD0_CMD__SD_SEND_WRITE_PROT 0x1E +#define BV_SSP_CMD0_CMD__SD_ERASE_WR_BLK_START 0x20 +#define BV_SSP_CMD0_CMD__SD_ERASE_WR_BLK_END 0x21 +#define BV_SSP_CMD0_CMD__SD_ERASE_GROUP_START 0x23 +#define BV_SSP_CMD0_CMD__SD_ERASE_GROUP_END 0x24 +#define BV_SSP_CMD0_CMD__SD_ERASE 0x26 +#define BV_SSP_CMD0_CMD__SD_LOCK_UNLOCK 0x2A +#define BV_SSP_CMD0_CMD__SD_IO_RW_DIRECT 0x34 +#define BV_SSP_CMD0_CMD__SD_IO_RW_EXTENDED 0x35 +#define BV_SSP_CMD0_CMD__SD_APP_CMD 0x37 +#define BV_SSP_CMD0_CMD__SD_GEN_CMD 0x38 + +#define HW_SSP_CMD1 (0x00000020) +#define HW_SSP_CMD1_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CMD1) + #define BP_SSP_CMD1_CMD_ARG 0 +#define BM_SSP_CMD1_CMD_ARG 0xFFFFFFFF +#define BF_SSP_CMD1_CMD_ARG(v) (v) + +#define HW_SSP_COMPREF (0x00000030) +#define HW_SSP_COMPREF_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_COMPREF) + +#define BP_SSP_COMPREF_REFERENCE 0 +#define BM_SSP_COMPREF_REFERENCE 0xFFFFFFFF +#define BF_SSP_COMPREF_REFERENCE(v) (v) + +#define HW_SSP_COMPMASK (0x00000040) +#define HW_SSP_COMPMASK_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_COMPMASK) + +#define BP_SSP_COMPMASK_MASK 0 +#define BM_SSP_COMPMASK_MASK 0xFFFFFFFF +#define BF_SSP_COMPMASK_MASK(v) (v) + +#define HW_SSP_TIMING (0x00000050) +#define HW_SSP_TIMING_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_TIMING) -#define HW_SSP_TIMING 0x50 -#define BM_SSP_TIMING_CLOCK_RATE 0x000000FF -#define BP_SSP_TIMING_CLOCK_RATE 0 -#define BM_SSP_TIMING_CLOCK_DIVIDE 0x0000FF00 -#define BP_SSP_TIMING_CLOCK_DIVIDE 8 -#define BM_SSP_TIMING_TIMEOUT 0xFFFF0000 #define BP_SSP_TIMING_TIMEOUT 16 +#define BM_SSP_TIMING_TIMEOUT 0xFFFF0000 +#define BF_SSP_TIMING_TIMEOUT(v) \ + (((v) << 16) & BM_SSP_TIMING_TIMEOUT) +#define BP_SSP_TIMING_CLOCK_DIVIDE 8 +#define BM_SSP_TIMING_CLOCK_DIVIDE 0x0000FF00 +#define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ + (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE) +#define BP_SSP_TIMING_CLOCK_RATE 0 +#define BM_SSP_TIMING_CLOCK_RATE 0x000000FF +#define BF_SSP_TIMING_CLOCK_RATE(v) \ + (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE) + +#define HW_SSP_CTRL1 (0x00000060) +#define HW_SSP_CTRL1_SET (0x00000064) +#define HW_SSP_CTRL1_CLR (0x00000068) +#define HW_SSP_CTRL1_TOG (0x0000006c) +#define HW_SSP_CTRL1_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL1) +#define HW_SSP_CTRL1_SET_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL1_SET) +#define HW_SSP_CTRL1_CLR_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL1_CLR) +#define HW_SSP_CTRL1_TOG_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_CTRL1_TOG) -#define HW_SSP_CTRL1 0x60 -#define BM_SSP_CTRL1_SSP_MODE 0x0000000F -#define BP_SSP_CTRL1_SSP_MODE 0 -#define BM_SSP_CTRL1_WORD_LENGTH 0x000000F0 -#define BP_SSP_CTRL1_WORD_LENGTH 4 -#define BM_SSP_CTRL1_POLARITY 0x00000200 -#define BM_SSP_CTRL1_PHASE 0x00000400 -#define BM_SSP_CTRL1_DMA_ENABLE 0x00002000 -#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ 0x00008000 -#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN 0x00010000 -#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ 0x00020000 -#define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ 0x00200000 -#define BM_SSP_CTRL1_DATA_CRC_IRQ_EN 0x00400000 -#define BM_SSP_CTRL1_DATA_CRC_IRQ 0x00800000 -#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN 0x01000000 -#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ 0x02000000 -#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN 0x04000000 -#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ 0x08000000 -#define BM_SSP_CTRL1_RESP_ERR_IRQ_EN 0x10000000 -#define BM_SSP_CTRL1_RESP_ERR_IRQ 0x20000000 #define BM_SSP_CTRL1_SDIO_IRQ 0x80000000 +#define BM_SSP_CTRL1_SDIO_IRQ_EN 0x40000000 +#define BM_SSP_CTRL1_RESP_ERR_IRQ 0x20000000 +#define BM_SSP_CTRL1_RESP_ERR_IRQ_EN 0x10000000 +#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ 0x08000000 +#define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN 0x04000000 +#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ 0x02000000 +#define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN 0x01000000 +#define BM_SSP_CTRL1_DATA_CRC_IRQ 0x00800000 +#define BM_SSP_CTRL1_DATA_CRC_IRQ_EN 0x00400000 +#define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ 0x00200000 +#define BM_SSP_CTRL1_FIFO_UNDERRUN_EN 0x00100000 +#define BM_SSP_CTRL1_CEATA_CCS_ERR_IRQ 0x00080000 +#define BM_SSP_CTRL1_CEATA_CCS_ERR_IRQ_EN 0x00040000 +#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ 0x00020000 +#define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN 0x00010000 +#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ 0x00008000 +#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN 0x00004000 +#define BM_SSP_CTRL1_DMA_ENABLE 0x00002000 +#define BM_SSP_CTRL1_CEATA_CCS_ERR_EN 0x00001000 +#define BM_SSP_CTRL1_SLAVE_OUT_DISABLE 0x00000800 +#define BM_SSP_CTRL1_PHASE 0x00000400 +#define BM_SSP_CTRL1_POLARITY 0x00000200 +#define BM_SSP_CTRL1_SLAVE_MODE 0x00000100 +#define BP_SSP_CTRL1_WORD_LENGTH 4 +#define BM_SSP_CTRL1_WORD_LENGTH 0x000000F0 +#define BF_SSP_CTRL1_WORD_LENGTH(v) \ + (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH) +#define BV_SSP_CTRL1_WORD_LENGTH__RESERVED0 0x0 +#define BV_SSP_CTRL1_WORD_LENGTH__RESERVED1 0x1 +#define BV_SSP_CTRL1_WORD_LENGTH__RESERVED2 0x2 +#define BV_SSP_CTRL1_WORD_LENGTH__FOUR_BITS 0x3 +#define BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS 0x7 +#define BV_SSP_CTRL1_WORD_LENGTH__SIXTEEN_BITS 0xF +#define BP_SSP_CTRL1_SSP_MODE 0 +#define BM_SSP_CTRL1_SSP_MODE 0x0000000F +#define BF_SSP_CTRL1_SSP_MODE(v) \ + (((v) << 0) & BM_SSP_CTRL1_SSP_MODE) +#define BV_SSP_CTRL1_SSP_MODE__SPI 0x0 +#define BV_SSP_CTRL1_SSP_MODE__SSI 0x1 +#define BV_SSP_CTRL1_SSP_MODE__SD_MMC 0x3 +#define BV_SSP_CTRL1_SSP_MODE__MS 0x4 +#define BV_SSP_CTRL1_SSP_MODE__CE_ATA 0x7 -#define HW_SSP_DATA 0x70 +#define HW_SSP_DATA (0x00000070) +#define HW_SSP_DATA_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_DATA) -#define HW_SSP_SDRESP0 0x80 +#define BP_SSP_DATA_DATA 0 +#define BM_SSP_DATA_DATA 0xFFFFFFFF +#define BF_SSP_DATA_DATA(v) (v) -#define HW_SSP_SDRESP1 0x90 +#define HW_SSP_SDRESP0 (0x00000080) +#define HW_SSP_SDRESP0_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_SDRESP0) -#define HW_SSP_SDRESP2 0xA0 +#define BP_SSP_SDRESP0_RESP0 0 +#define BM_SSP_SDRESP0_RESP0 0xFFFFFFFF +#define BF_SSP_SDRESP0_RESP0(v) (v) -#define HW_SSP_SDRESP3 0xB0 +#define HW_SSP_SDRESP1 (0x00000090) +#define HW_SSP_SDRESP1_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_SDRESP1) -#define HW_SSP_STATUS 0xC0 -#define BM_SSP_STATUS_FIFO_EMPTY 0x00000020 -#define BM_SSP_STATUS_TIMEOUT 0x00001000 -#define BM_SSP_STATUS_RESP_TIMEOUT 0x00004000 -#define BM_SSP_STATUS_RESP_ERR 0x00008000 -#define BM_SSP_STATUS_RESP_CRC_ERR 0x00010000 +#define BP_SSP_SDRESP1_RESP1 0 +#define BM_SSP_SDRESP1_RESP1 0xFFFFFFFF +#define BF_SSP_SDRESP1_RESP1(v) (v) + +#define HW_SSP_SDRESP2 (0x000000a0) +#define HW_SSP_SDRESP2_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_SDRESP2) + +#define BP_SSP_SDRESP2_RESP2 0 +#define BM_SSP_SDRESP2_RESP2 0xFFFFFFFF +#define BF_SSP_SDRESP2_RESP2(v) (v) + +#define HW_SSP_SDRESP3 (0x000000b0) +#define HW_SSP_SDRESP3_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_SDRESP3) + +#define BP_SSP_SDRESP3_RESP3 0 +#define BM_SSP_SDRESP3_RESP3 0xFFFFFFFF +#define BF_SSP_SDRESP3_RESP3(v) (v) + +#define HW_SSP_STATUS (0x000000c0) +#define HW_SSP_STATUS_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_STATUS) + +#define BM_SSP_STATUS_PRESENT 0x80000000 +#define BM_SSP_STATUS_MS_PRESENT 0x40000000 +#define BM_SSP_STATUS_SD_PRESENT 0x20000000 #define BM_SSP_STATUS_CARD_DETECT 0x10000000 +#define BP_SSP_STATUS_RSVD3 22 +#define BM_SSP_STATUS_RSVD3 0x0FC00000 +#define BF_SSP_STATUS_RSVD3(v) \ + (((v) << 22) & BM_SSP_STATUS_RSVD3) +#define BM_SSP_STATUS_DMASENSE 0x00200000 +#define BM_SSP_STATUS_DMATERM 0x00100000 +#define BM_SSP_STATUS_DMAREQ 0x00080000 +#define BM_SSP_STATUS_DMAEND 0x00040000 +#define BM_SSP_STATUS_SDIO_IRQ 0x00020000 +#define BM_SSP_STATUS_RESP_CRC_ERR 0x00010000 +#define BM_SSP_STATUS_RESP_ERR 0x00008000 +#define BM_SSP_STATUS_RESP_TIMEOUT 0x00004000 +#define BM_SSP_STATUS_DATA_CRC_ERR 0x00002000 +#define BM_SSP_STATUS_TIMEOUT 0x00001000 +#define BM_SSP_STATUS_RECV_TIMEOUT_STAT 0x00000800 +#define BM_SSP_STATUS_CEATA_CCS_ERR 0x00000400 +#define BM_SSP_STATUS_FIFO_OVRFLW 0x00000200 +#define BM_SSP_STATUS_FIFO_FULL 0x00000100 +#define BP_SSP_STATUS_RSVD1 6 +#define BM_SSP_STATUS_RSVD1 0x000000C0 +#define BF_SSP_STATUS_RSVD1(v) \ + (((v) << 6) & BM_SSP_STATUS_RSVD1) +#define BM_SSP_STATUS_FIFO_EMPTY 0x00000020 +#define BM_SSP_STATUS_FIFO_UNDRFLW 0x00000010 +#define BM_SSP_STATUS_CMD_BUSY 0x00000008 +#define BM_SSP_STATUS_DATA_BUSY 0x00000004 +#define BM_SSP_STATUS_RSVD0 0x00000002 +#define BM_SSP_STATUS_BUSY 0x00000001 + +#define HW_SSP_DEBUG (0x00000100) +#define HW_SSP_DEBUG_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_DEBUG) + +#define BP_SSP_DEBUG_DATACRC_ERR 28 +#define BM_SSP_DEBUG_DATACRC_ERR 0xF0000000 +#define BF_SSP_DEBUG_DATACRC_ERR(v) \ + (((v) << 28) & BM_SSP_DEBUG_DATACRC_ERR) +#define BM_SSP_DEBUG_DATA_STALL 0x08000000 +#define BP_SSP_DEBUG_DAT_SM 24 +#define BM_SSP_DEBUG_DAT_SM 0x07000000 +#define BF_SSP_DEBUG_DAT_SM(v) \ + (((v) << 24) & BM_SSP_DEBUG_DAT_SM) +#define BV_SSP_DEBUG_DAT_SM__DSM_IDLE 0x0 +#define BV_SSP_DEBUG_DAT_SM__DSM_WORD 0x2 +#define BV_SSP_DEBUG_DAT_SM__DSM_CRC1 0x3 +#define BV_SSP_DEBUG_DAT_SM__DSM_CRC2 0x4 +#define BV_SSP_DEBUG_DAT_SM__DSM_END 0x5 +#define BP_SSP_DEBUG_MSTK_SM 20 +#define BM_SSP_DEBUG_MSTK_SM 0x00F00000 +#define BF_SSP_DEBUG_MSTK_SM(v) \ + (((v) << 20) & BM_SSP_DEBUG_MSTK_SM) +#define BV_SSP_DEBUG_MSTK_SM__MSTK_IDLE 0x0 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_CKON 0x1 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_BS1 0x2 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_TPC 0x3 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_BS2 0x4 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_HDSHK 0x5 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_BS3 0x6 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_RW 0x7 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_CRC1 0x8 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_CRC2 0x9 +#define BV_SSP_DEBUG_MSTK_SM__MSTK_BS0 0xA +#define BV_SSP_DEBUG_MSTK_SM__MSTK_END1 0xB +#define BV_SSP_DEBUG_MSTK_SM__MSTK_END2W 0xC +#define BV_SSP_DEBUG_MSTK_SM__MSTK_END2R 0xD +#define BV_SSP_DEBUG_MSTK_SM__MSTK_DONE 0xE +#define BM_SSP_DEBUG_CMD_OE 0x00080000 +#define BP_SSP_DEBUG_DMA_SM 16 +#define BM_SSP_DEBUG_DMA_SM 0x00070000 +#define BF_SSP_DEBUG_DMA_SM(v) \ + (((v) << 16) & BM_SSP_DEBUG_DMA_SM) +#define BV_SSP_DEBUG_DMA_SM__DMA_IDLE 0x0 +#define BV_SSP_DEBUG_DMA_SM__DMA_DMAREQ 0x1 +#define BV_SSP_DEBUG_DMA_SM__DMA_DMAACK 0x2 +#define BV_SSP_DEBUG_DMA_SM__DMA_STALL 0x3 +#define BV_SSP_DEBUG_DMA_SM__DMA_BUSY 0x4 +#define BV_SSP_DEBUG_DMA_SM__DMA_DONE 0x5 +#define BV_SSP_DEBUG_DMA_SM__DMA_COUNT 0x6 +#define BP_SSP_DEBUG_MMC_SM 12 +#define BM_SSP_DEBUG_MMC_SM 0x0000F000 +#define BF_SSP_DEBUG_MMC_SM(v) \ + (((v) << 12) & BM_SSP_DEBUG_MMC_SM) +#define BV_SSP_DEBUG_MMC_SM__MMC_IDLE 0x0 +#define BV_SSP_DEBUG_MMC_SM__MMC_CMD 0x1 +#define BV_SSP_DEBUG_MMC_SM__MMC_TRC 0x2 +#define BV_SSP_DEBUG_MMC_SM__MMC_RESP 0x3 +#define BV_SSP_DEBUG_MMC_SM__MMC_RPRX 0x4 +#define BV_SSP_DEBUG_MMC_SM__MMC_TX 0x5 +#define BV_SSP_DEBUG_MMC_SM__MMC_CTOK 0x6 +#define BV_SSP_DEBUG_MMC_SM__MMC_RX 0x7 +#define BV_SSP_DEBUG_MMC_SM__MMC_CCS 0x8 +#define BV_SSP_DEBUG_MMC_SM__MMC_PUP 0x9 +#define BV_SSP_DEBUG_MMC_SM__MMC_WAIT 0xA +#define BP_SSP_DEBUG_CMD_SM 10 +#define BM_SSP_DEBUG_CMD_SM 0x00000C00 +#define BF_SSP_DEBUG_CMD_SM(v) \ + (((v) << 10) & BM_SSP_DEBUG_CMD_SM) +#define BV_SSP_DEBUG_CMD_SM__CSM_IDLE 0x0 +#define BV_SSP_DEBUG_CMD_SM__CSM_INDEX 0x1 +#define BV_SSP_DEBUG_CMD_SM__CSM_ARG 0x2 +#define BV_SSP_DEBUG_CMD_SM__CSM_CRC 0x3 +#define BM_SSP_DEBUG_SSP_CMD 0x00000200 +#define BM_SSP_DEBUG_SSP_RESP 0x00000100 +#define BP_SSP_DEBUG_SSP_RXD 0 +#define BM_SSP_DEBUG_SSP_RXD 0x000000FF +#define BF_SSP_DEBUG_SSP_RXD(v) \ + (((v) << 0) & BM_SSP_DEBUG_SSP_RXD) + +#define HW_SSP_VERSION (0x00000110) +#define HW_SSP_VERSION_ADDR(x) \ + (REGS_SSP_BASE(x) + HW_SSP_VERSION) + +#define BP_SSP_VERSION_MAJOR 24 +#define BM_SSP_VERSION_MAJOR 0xFF000000 +#define BF_SSP_VERSION_MAJOR(v) \ + (((v) << 24) & BM_SSP_VERSION_MAJOR) +#define BP_SSP_VERSION_MINOR 16 +#define BM_SSP_VERSION_MINOR 0x00FF0000 +#define BF_SSP_VERSION_MINOR(v) \ + (((v) << 16) & BM_SSP_VERSION_MINOR) +#define BP_SSP_VERSION_STEP 0 +#define BM_SSP_VERSION_STEP 0x0000FFFF +#define BF_SSP_VERSION_STEP(v) \ + (((v) << 0) & BM_SSP_VERSION_STEP) +#endif /* __ARCH_ARM___SSP_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-saif.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-saif.h @@ -1,7 +1,7 @@ /* - * stmp378x: SAIF register definitions + * STMP SAIF Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,5 +17,137 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_SAIF_SIZE 0x2000 + +#ifndef __ARCH_ARM___SAIF_H +#define __ARCH_ARM___SAIF_H 1 + +#define REGS_SAIF_BASE (STMP3XXX_REGS_BASE + 0x42000) +#define REGS_SAIF1_BASE (STMP3XXX_REGS_BASE + 0x42000) +#define REGS_SAIF1_PHYS (0x80042000) +#define REGS_SAIF2_BASE (STMP3XXX_REGS_BASE + 0x46000) +#define REGS_SAIF2_PHYS (0x80046000) +#define REGS_SAIF_SIZE 0x00002000 + +#define HW_SAIF_CTRL (0x00000000) +#define HW_SAIF_CTRL_SET (0x00000004) +#define HW_SAIF_CTRL_CLR (0x00000008) +#define HW_SAIF_CTRL_TOG (0x0000000c) +#define HW_SAIF_CTRL_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_CTRL) +#define HW_SAIF_CTRL_SET_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_CTRL_SET) +#define HW_SAIF_CTRL_CLR_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_CTRL_CLR) +#define HW_SAIF_CTRL_TOG_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_CTRL_TOG) + +#define BM_SAIF_CTRL_SFTRST 0x80000000 +#define BM_SAIF_CTRL_CLKGATE 0x40000000 +#define BP_SAIF_CTRL_BITCLK_MULT_RATE 27 +#define BM_SAIF_CTRL_BITCLK_MULT_RATE 0x38000000 +#define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) \ + (((v) << 27) & BM_SAIF_CTRL_BITCLK_MULT_RATE) +#define BM_SAIF_CTRL_BITCLK_BASE_RATE 0x04000000 +#define BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN 0x02000000 +#define BM_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 0x01000000 +#define BP_SAIF_CTRL_RSRVD2 21 +#define BM_SAIF_CTRL_RSRVD2 0x00E00000 +#define BF_SAIF_CTRL_RSRVD2(v) \ + (((v) << 21) & BM_SAIF_CTRL_RSRVD2) +#define BP_SAIF_CTRL_DMAWAIT_COUNT 16 +#define BM_SAIF_CTRL_DMAWAIT_COUNT 0x001F0000 +#define BF_SAIF_CTRL_DMAWAIT_COUNT(v) \ + (((v) << 16) & BM_SAIF_CTRL_DMAWAIT_COUNT) +#define BP_SAIF_CTRL_CHANNEL_NUM_SELECT 14 +#define BM_SAIF_CTRL_CHANNEL_NUM_SELECT 0x0000C000 +#define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) \ + (((v) << 14) & BM_SAIF_CTRL_CHANNEL_NUM_SELECT) +#define BM_SAIF_CTRL_RSRVD1 0x00002000 +#define BM_SAIF_CTRL_BIT_ORDER 0x00001000 +#define BM_SAIF_CTRL_DELAY 0x00000800 +#define BM_SAIF_CTRL_JUSTIFY 0x00000400 +#define BM_SAIF_CTRL_LRCLK_POLARITY 0x00000200 +#define BM_SAIF_CTRL_BITCLK_EDGE 0x00000100 +#define BP_SAIF_CTRL_WORD_LENGTH 4 +#define BM_SAIF_CTRL_WORD_LENGTH 0x000000F0 +#define BF_SAIF_CTRL_WORD_LENGTH(v) \ + (((v) << 4) & BM_SAIF_CTRL_WORD_LENGTH) +#define BM_SAIF_CTRL_BITCLK_48XFS_ENABLE 0x00000008 +#define BM_SAIF_CTRL_SLAVE_MODE 0x00000004 +#define BM_SAIF_CTRL_READ_MODE 0x00000002 +#define BM_SAIF_CTRL_RUN 0x00000001 + +#define HW_SAIF_STAT (0x00000010) +#define HW_SAIF_STAT_SET (0x00000014) +#define HW_SAIF_STAT_CLR (0x00000018) +#define HW_SAIF_STAT_TOG (0x0000001c) +#define HW_SAIF_STAT_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_STAT) +#define HW_SAIF_STAT_SET_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_STAT_SET) +#define HW_SAIF_STAT_CLR_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_STAT_CLR) +#define HW_SAIF_STAT_TOG_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_STAT_TOG) + +#define BM_SAIF_STAT_PRESENT 0x80000000 +#define BP_SAIF_STAT_RSRVD2 17 +#define BM_SAIF_STAT_RSRVD2 0x7FFE0000 +#define BF_SAIF_STAT_RSRVD2(v) \ + (((v) << 17) & BM_SAIF_STAT_RSRVD2) +#define BM_SAIF_STAT_DMA_PREQ 0x00010000 +#define BP_SAIF_STAT_RSRVD1 7 +#define BM_SAIF_STAT_RSRVD1 0x0000FF80 +#define BF_SAIF_STAT_RSRVD1(v) \ + (((v) << 7) & BM_SAIF_STAT_RSRVD1) +#define BM_SAIF_STAT_FIFO_UNDERFLOW_IRQ 0x00000040 +#define BM_SAIF_STAT_FIFO_OVERFLOW_IRQ 0x00000020 +#define BM_SAIF_STAT_FIFO_SERVICE_IRQ 0x00000010 +#define BP_SAIF_STAT_RSRVD0 1 +#define BM_SAIF_STAT_RSRVD0 0x0000000E +#define BF_SAIF_STAT_RSRVD0(v) \ + (((v) << 1) & BM_SAIF_STAT_RSRVD0) +#define BM_SAIF_STAT_BUSY 0x00000001 + +#define HW_SAIF_DATA (0x00000020) +#define HW_SAIF_DATA_SET (0x00000024) +#define HW_SAIF_DATA_CLR (0x00000028) +#define HW_SAIF_DATA_TOG (0x0000002c) +#define HW_SAIF_DATA_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_DATA) +#define HW_SAIF_DATA_SET_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_DATA_SET) +#define HW_SAIF_DATA_CLR_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_DATA_CLR) +#define HW_SAIF_DATA_TOG_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_DATA_TOG) + +#define BP_SAIF_DATA_PCM_RIGHT 16 +#define BM_SAIF_DATA_PCM_RIGHT 0xFFFF0000 +#define BF_SAIF_DATA_PCM_RIGHT(v) \ + (((v) << 16) & BM_SAIF_DATA_PCM_RIGHT) +#define BP_SAIF_DATA_PCM_LEFT 0 +#define BM_SAIF_DATA_PCM_LEFT 0x0000FFFF +#define BF_SAIF_DATA_PCM_LEFT(v) \ + (((v) << 0) & BM_SAIF_DATA_PCM_LEFT) + +#define HW_SAIF_VERSION (0x00000030) +#define HW_SAIF_VERSION_ADDR(x) \ + (REGS_SAIF_BASE(x) + HW_SAIF_VERSION) + +#define BP_SAIF_VERSION_MAJOR 24 +#define BM_SAIF_VERSION_MAJOR 0xFF000000 +#define BF_SAIF_VERSION_MAJOR(v) \ + (((v) << 24) & BM_SAIF_VERSION_MAJOR) +#define BP_SAIF_VERSION_MINOR 16 +#define BM_SAIF_VERSION_MINOR 0x00FF0000 +#define BF_SAIF_VERSION_MINOR(v) \ + (((v) << 16) & BM_SAIF_VERSION_MINOR) +#define BP_SAIF_VERSION_STEP 0 +#define BM_SAIF_VERSION_STEP 0x0000FFFF +#define BF_SAIF_VERSION_STEP(v) \ + (((v) << 0) & BM_SAIF_VERSION_STEP) +#endif /* __ARCH_ARM___SAIF_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-pwm.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-pwm.h @@ -1,7 +1,7 @@ /* - * stmp378x: PWM register definitions + * STMP PWM Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,37 +17,145 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_PWM_BASE (STMP3XXX_REGS_BASE + 0x64000) -#define REGS_PWM_PHYS 0x80064000 -#define REGS_PWM_SIZE 0x2000 -#define HW_PWM_CTRL 0x0 -#define BM_PWM_CTRL_PWM2_ENABLE 0x00000004 -#define BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE 0x00000020 +#ifndef __ARCH_ARM___PWM_H +#define __ARCH_ARM___PWM_H 1 -#define HW_PWM_ACTIVE0 (0x10 + 0 * 0x20) -#define HW_PWM_ACTIVE1 (0x10 + 1 * 0x20) -#define HW_PWM_ACTIVE2 (0x10 + 2 * 0x20) -#define HW_PWM_ACTIVE3 (0x10 + 3 * 0x20) +#define REGS_PWM_BASE (STMP3XXX_REGS_BASE + 0x64000) +#define REGS_PWM_PHYS (0x80064000) +#define REGS_PWM_SIZE 0x00002000 -#define HW_PWM_ACTIVEn 0x10 -#define BM_PWM_ACTIVEn_ACTIVE 0x0000FFFF -#define BP_PWM_ACTIVEn_ACTIVE 0 -#define BM_PWM_ACTIVEn_INACTIVE 0xFFFF0000 -#define BP_PWM_ACTIVEn_INACTIVE 16 +#define HW_PWM_CTRL (0x00000000) +#define HW_PWM_CTRL_SET (0x00000004) +#define HW_PWM_CTRL_CLR (0x00000008) +#define HW_PWM_CTRL_TOG (0x0000000c) +#define HW_PWM_CTRL_ADDR \ + (REGS_PWM_BASE + HW_PWM_CTRL) +#define HW_PWM_CTRL_SET_ADDR \ + (REGS_PWM_BASE + HW_PWM_CTRL_SET) +#define HW_PWM_CTRL_CLR_ADDR \ + (REGS_PWM_BASE + HW_PWM_CTRL_CLR) +#define HW_PWM_CTRL_TOG_ADDR \ + (REGS_PWM_BASE + HW_PWM_CTRL_TOG) -#define HW_PWM_PERIOD0 (0x20 + 0 * 0x20) -#define HW_PWM_PERIOD1 (0x20 + 1 * 0x20) -#define HW_PWM_PERIOD2 (0x20 + 2 * 0x20) -#define HW_PWM_PERIOD3 (0x20 + 3 * 0x20) +#define BM_PWM_CTRL_SFTRST 0x80000000 +#define BM_PWM_CTRL_CLKGATE 0x40000000 +#define BM_PWM_CTRL_PWM4_PRESENT 0x20000000 +#define BM_PWM_CTRL_PWM3_PRESENT 0x10000000 +#define BM_PWM_CTRL_PWM2_PRESENT 0x08000000 +#define BM_PWM_CTRL_PWM1_PRESENT 0x04000000 +#define BM_PWM_CTRL_PWM0_PRESENT 0x02000000 +#define BP_PWM_CTRL_RSRVD1 7 +#define BM_PWM_CTRL_RSRVD1 0x01FFFF80 +#define BF_PWM_CTRL_RSRVD1(v) \ + (((v) << 7) & BM_PWM_CTRL_RSRVD1) +#define BM_PWM_CTRL_OUTPUT_CUTOFF_EN 0x00000040 +#define BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE 0x00000020 +#define BM_PWM_CTRL_PWM4_ENABLE 0x00000010 +#define BM_PWM_CTRL_PWM3_ENABLE 0x00000008 +#define BM_PWM_CTRL_PWM2_ENABLE 0x00000004 +#define BM_PWM_CTRL_PWM1_ENABLE 0x00000002 +#define BM_PWM_CTRL_PWM0_ENABLE 0x00000001 -#define HW_PWM_PERIODn 0x20 -#define BM_PWM_PERIODn_PERIOD 0x0000FFFF -#define BP_PWM_PERIODn_PERIOD 0 -#define BM_PWM_PERIODn_ACTIVE_STATE 0x00030000 -#define BP_PWM_PERIODn_ACTIVE_STATE 16 -#define BM_PWM_PERIODn_INACTIVE_STATE 0x000C0000 -#define BP_PWM_PERIODn_INACTIVE_STATE 18 -#define BM_PWM_PERIODn_CDIV 0x00700000 +/* + * multi-register-define name HW_PWM_ACTIVEn + * base 0x00000010 + * count 5 + * offset 0x20 + */ +#define HW_PWM_ACTIVEn(n) (0x00000010 + (n) * 0x20) +#define HW_PWM_ACTIVEn_SET(n) (0x00000014 + (n) * 0x20) +#define HW_PWM_ACTIVEn_CLR(n) (0x00000018 + (n) * 0x20) +#define HW_PWM_ACTIVEn_TOG(n) (0x0000001c + (n) * 0x20) +#define HW_PWM_ACTIVEn_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_ACTIVEn(n)) +#define HW_PWM_ACTIVEn_SET_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_ACTIVEn_SET(n)) +#define HW_PWM_ACTIVEn_CLR_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_ACTIVEn_CLR(n)) +#define HW_PWM_ACTIVEn_TOG_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_ACTIVEn_TOG(n)) +#define BP_PWM_ACTIVEn_INACTIVE 16 +#define BM_PWM_ACTIVEn_INACTIVE 0xFFFF0000 +#define BF_PWM_ACTIVEn_INACTIVE(v) \ + (((v) << 16) & BM_PWM_ACTIVEn_INACTIVE) +#define BP_PWM_ACTIVEn_ACTIVE 0 +#define BM_PWM_ACTIVEn_ACTIVE 0x0000FFFF +#define BF_PWM_ACTIVEn_ACTIVE(v) \ + (((v) << 0) & BM_PWM_ACTIVEn_ACTIVE) + +/* + * multi-register-define name HW_PWM_PERIODn + * base 0x00000020 + * count 5 + * offset 0x20 + */ +#define HW_PWM_PERIODn(n) (0x00000020 + (n) * 0x20) +#define HW_PWM_PERIODn_SET(n) (0x00000024 + (n) * 0x20) +#define HW_PWM_PERIODn_CLR(n) (0x00000028 + (n) * 0x20) +#define HW_PWM_PERIODn_TOG(n) (0x0000002c + (n) * 0x20) +#define HW_PWM_PERIODn_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_PERIODn(n)) +#define HW_PWM_PERIODn_SET_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_PERIODn_SET(n)) +#define HW_PWM_PERIODn_CLR_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_PERIODn_CLR(n)) +#define HW_PWM_PERIODn_TOG_ADDR(n) \ + (REGS_PWM_BASE + HW_PWM_PERIODn_TOG(n)) +#define BP_PWM_PERIODn_RSRVD2 25 +#define BM_PWM_PERIODn_RSRVD2 0xFE000000 +#define BF_PWM_PERIODn_RSRVD2(v) \ + (((v) << 25) & BM_PWM_PERIODn_RSRVD2) +#define BM_PWM_PERIODn_MATT_SEL 0x01000000 +#define BM_PWM_PERIODn_MATT 0x00800000 #define BP_PWM_PERIODn_CDIV 20 +#define BM_PWM_PERIODn_CDIV 0x00700000 +#define BF_PWM_PERIODn_CDIV(v) \ + (((v) << 20) & BM_PWM_PERIODn_CDIV) +#define BV_PWM_PERIODn_CDIV__DIV_1 0x0 +#define BV_PWM_PERIODn_CDIV__DIV_2 0x1 +#define BV_PWM_PERIODn_CDIV__DIV_4 0x2 +#define BV_PWM_PERIODn_CDIV__DIV_8 0x3 +#define BV_PWM_PERIODn_CDIV__DIV_16 0x4 +#define BV_PWM_PERIODn_CDIV__DIV_64 0x5 +#define BV_PWM_PERIODn_CDIV__DIV_256 0x6 +#define BV_PWM_PERIODn_CDIV__DIV_1024 0x7 +#define BP_PWM_PERIODn_INACTIVE_STATE 18 +#define BM_PWM_PERIODn_INACTIVE_STATE 0x000C0000 +#define BF_PWM_PERIODn_INACTIVE_STATE(v) \ + (((v) << 18) & BM_PWM_PERIODn_INACTIVE_STATE) +#define BV_PWM_PERIODn_INACTIVE_STATE__HI_Z 0x0 +#define BV_PWM_PERIODn_INACTIVE_STATE__0 0x2 +#define BV_PWM_PERIODn_INACTIVE_STATE__1 0x3 +#define BP_PWM_PERIODn_ACTIVE_STATE 16 +#define BM_PWM_PERIODn_ACTIVE_STATE 0x00030000 +#define BF_PWM_PERIODn_ACTIVE_STATE(v) \ + (((v) << 16) & BM_PWM_PERIODn_ACTIVE_STATE) +#define BV_PWM_PERIODn_ACTIVE_STATE__HI_Z 0x0 +#define BV_PWM_PERIODn_ACTIVE_STATE__0 0x2 +#define BV_PWM_PERIODn_ACTIVE_STATE__1 0x3 +#define BP_PWM_PERIODn_PERIOD 0 +#define BM_PWM_PERIODn_PERIOD 0x0000FFFF +#define BF_PWM_PERIODn_PERIOD(v) \ + (((v) << 0) & BM_PWM_PERIODn_PERIOD) + +#define HW_PWM_VERSION (0x000000b0) +#define HW_PWM_VERSION_ADDR \ + (REGS_PWM_BASE + HW_PWM_VERSION) + +#define BP_PWM_VERSION_MAJOR 24 +#define BM_PWM_VERSION_MAJOR 0xFF000000 +#define BF_PWM_VERSION_MAJOR(v) \ + (((v) << 24) & BM_PWM_VERSION_MAJOR) +#define BP_PWM_VERSION_MINOR 16 +#define BM_PWM_VERSION_MINOR 0x00FF0000 +#define BF_PWM_VERSION_MINOR(v) \ + (((v) << 16) & BM_PWM_VERSION_MINOR) +#define BP_PWM_VERSION_STEP 0 +#define BM_PWM_VERSION_STEP 0x0000FFFF +#define BF_PWM_VERSION_STEP(v) \ + (((v) << 0) & BM_PWM_VERSION_STEP) +#endif /* __ARCH_ARM___PWM_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-apbh.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-apbh.h @@ -1,7 +1,7 @@ /* - * stmp378x: APBH register definitions + * STMP APBH Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,85 +17,384 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_APBH -#define _MACH_REGS_APBH -#define REGS_APBH_BASE (STMP3XXX_REGS_BASE + 0x4000) -#define REGS_APBH_PHYS 0x80004000 -#define REGS_APBH_SIZE 0x2000 +#ifndef __ARCH_ARM___APBH_H +#define __ARCH_ARM___APBH_H 1 -#define HW_APBH_CTRL0 0x0 -#define BM_APBH_CTRL0_RESET_CHANNEL 0x00FF0000 -#define BP_APBH_CTRL0_RESET_CHANNEL 16 -#define BM_APBH_CTRL0_CLKGATE 0x40000000 -#define BM_APBH_CTRL0_SFTRST 0x80000000 +#define REGS_APBH_BASE (STMP3XXX_REGS_BASE + 0x4000) +#define REGS_APBH_PHYS (0x80004000) +#define REGS_APBH_SIZE 0x00002000 + +#define HW_APBH_CTRL0 (0x00000000) +#define HW_APBH_CTRL0_SET (0x00000004) +#define HW_APBH_CTRL0_CLR (0x00000008) +#define HW_APBH_CTRL0_TOG (0x0000000c) +#define HW_APBH_CTRL0_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL0) +#define HW_APBH_CTRL0_SET_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL0_SET) +#define HW_APBH_CTRL0_CLR_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL0_CLR) +#define HW_APBH_CTRL0_TOG_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL0_TOG) -#define HW_APBH_CTRL1 0x10 +#define BM_APBH_CTRL0_SFTRST 0x80000000 +#define BM_APBH_CTRL0_CLKGATE 0x40000000 +#define BM_APBH_CTRL0_AHB_BURST8_EN 0x20000000 +#define BM_APBH_CTRL0_APB_BURST4_EN 0x10000000 +#define BP_APBH_CTRL0_RSVD0 24 +#define BM_APBH_CTRL0_RSVD0 0x0F000000 +#define BF_APBH_CTRL0_RSVD0(v) \ + (((v) << 24) & BM_APBH_CTRL0_RSVD0) +#define BP_APBH_CTRL0_RESET_CHANNEL 16 +#define BM_APBH_CTRL0_RESET_CHANNEL 0x00FF0000 +#define BF_APBH_CTRL0_RESET_CHANNEL(v) \ + (((v) << 16) & BM_APBH_CTRL0_RESET_CHANNEL) +#define BV_APBH_CTRL0_RESET_CHANNEL__SSP1 0x02 +#define BV_APBH_CTRL0_RESET_CHANNEL__SSP2 0x04 +#define BV_APBH_CTRL0_RESET_CHANNEL__ATA 0x10 +#define BV_APBH_CTRL0_RESET_CHANNEL__NAND0 0x10 +#define BV_APBH_CTRL0_RESET_CHANNEL__NAND1 0x20 +#define BV_APBH_CTRL0_RESET_CHANNEL__NAND2 0x40 +#define BV_APBH_CTRL0_RESET_CHANNEL__NAND3 0x80 +#define BP_APBH_CTRL0_CLKGATE_CHANNEL 8 +#define BM_APBH_CTRL0_CLKGATE_CHANNEL 0x0000FF00 +#define BF_APBH_CTRL0_CLKGATE_CHANNEL(v) \ + (((v) << 8) & BM_APBH_CTRL0_CLKGATE_CHANNEL) +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__SSP1 0x02 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__SSP2 0x04 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__ATA 0x10 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__NAND0 0x10 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__NAND1 0x20 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__NAND2 0x40 +#define BV_APBH_CTRL0_CLKGATE_CHANNEL__NAND3 0x80 +#define BP_APBH_CTRL0_FREEZE_CHANNEL 0 +#define BM_APBH_CTRL0_FREEZE_CHANNEL 0x000000FF +#define BF_APBH_CTRL0_FREEZE_CHANNEL(v) \ + (((v) << 0) & BM_APBH_CTRL0_FREEZE_CHANNEL) +#define BV_APBH_CTRL0_FREEZE_CHANNEL__SSP1 0x02 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__SSP2 0x04 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__ATA 0x10 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__NAND0 0x10 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__NAND1 0x20 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__NAND2 0x40 +#define BV_APBH_CTRL0_FREEZE_CHANNEL__NAND3 0x80 + +#define HW_APBH_CTRL1 (0x00000010) +#define HW_APBH_CTRL1_SET (0x00000014) +#define HW_APBH_CTRL1_CLR (0x00000018) +#define HW_APBH_CTRL1_TOG (0x0000001c) +#define HW_APBH_CTRL1_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL1) +#define HW_APBH_CTRL1_SET_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL1_SET) +#define HW_APBH_CTRL1_CLR_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL1_CLR) +#define HW_APBH_CTRL1_TOG_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL1_TOG) + +#define BP_APBH_CTRL1_RSVD1 24 +#define BM_APBH_CTRL1_RSVD1 0xFF000000 +#define BF_APBH_CTRL1_RSVD1(v) \ + (((v) << 24) & BM_APBH_CTRL1_RSVD1) +#define BM_APBH_CTRL1_CH7_CMDCMPLT_IRQ_EN 0x00800000 +#define BM_APBH_CTRL1_CH6_CMDCMPLT_IRQ_EN 0x00400000 +#define BM_APBH_CTRL1_CH5_CMDCMPLT_IRQ_EN 0x00200000 +#define BM_APBH_CTRL1_CH4_CMDCMPLT_IRQ_EN 0x00100000 +#define BM_APBH_CTRL1_CH3_CMDCMPLT_IRQ_EN 0x00080000 +#define BM_APBH_CTRL1_CH2_CMDCMPLT_IRQ_EN 0x00040000 +#define BM_APBH_CTRL1_CH1_CMDCMPLT_IRQ_EN 0x00020000 +#define BM_APBH_CTRL1_CH0_CMDCMPLT_IRQ_EN 0x00010000 +#define BP_APBH_CTRL1_RSVD0 8 +#define BM_APBH_CTRL1_RSVD0 0x0000FF00 +#define BF_APBH_CTRL1_RSVD0(v) \ + (((v) << 8) & BM_APBH_CTRL1_RSVD0) +#define BM_APBH_CTRL1_CH7_CMDCMPLT_IRQ 0x00000080 +#define BM_APBH_CTRL1_CH6_CMDCMPLT_IRQ 0x00000040 +#define BM_APBH_CTRL1_CH5_CMDCMPLT_IRQ 0x00000020 +#define BM_APBH_CTRL1_CH4_CMDCMPLT_IRQ 0x00000010 +#define BM_APBH_CTRL1_CH3_CMDCMPLT_IRQ 0x00000008 +#define BM_APBH_CTRL1_CH2_CMDCMPLT_IRQ 0x00000004 +#define BM_APBH_CTRL1_CH1_CMDCMPLT_IRQ 0x00000002 #define BM_APBH_CTRL1_CH0_CMDCMPLT_IRQ 0x00000001 -#define BP_APBH_CTRL1_CH0_CMDCMPLT_IRQ 0 -#define HW_APBH_CTRL2 0x20 +#define HW_APBH_CTRL2 (0x00000020) +#define HW_APBH_CTRL2_SET (0x00000024) +#define HW_APBH_CTRL2_CLR (0x00000028) +#define HW_APBH_CTRL2_TOG (0x0000002c) +#define HW_APBH_CTRL2_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL2) +#define HW_APBH_CTRL2_SET_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL2_SET) +#define HW_APBH_CTRL2_CLR_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL2_CLR) +#define HW_APBH_CTRL2_TOG_ADDR \ + (REGS_APBH_BASE + HW_APBH_CTRL2_TOG) + +#define BP_APBH_CTRL2_RSVD1 24 +#define BM_APBH_CTRL2_RSVD1 0xFF000000 +#define BF_APBH_CTRL2_RSVD1(v) \ + (((v) << 24) & BM_APBH_CTRL2_RSVD1) +#define BM_APBH_CTRL2_CH7_ERROR_STATUS 0x00800000 +#define BV_APBH_CTRL2_CH7_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH7_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH6_ERROR_STATUS 0x00400000 +#define BV_APBH_CTRL2_CH6_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH6_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH5_ERROR_STATUS 0x00200000 +#define BV_APBH_CTRL2_CH5_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH5_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH4_ERROR_STATUS 0x00100000 +#define BV_APBH_CTRL2_CH4_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH4_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH3_ERROR_STATUS 0x00080000 +#define BV_APBH_CTRL2_CH3_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH3_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH2_ERROR_STATUS 0x00040000 +#define BV_APBH_CTRL2_CH2_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH2_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH1_ERROR_STATUS 0x00020000 +#define BV_APBH_CTRL2_CH1_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH1_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBH_CTRL2_CH0_ERROR_STATUS 0x00010000 +#define BV_APBH_CTRL2_CH0_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBH_CTRL2_CH0_ERROR_STATUS__BUS_ERROR 0x1 +#define BP_APBH_CTRL2_RSVD0 8 +#define BM_APBH_CTRL2_RSVD0 0x0000FF00 +#define BF_APBH_CTRL2_RSVD0(v) \ + (((v) << 8) & BM_APBH_CTRL2_RSVD0) +#define BM_APBH_CTRL2_CH7_ERROR_IRQ 0x00000080 +#define BM_APBH_CTRL2_CH6_ERROR_IRQ 0x00000040 +#define BM_APBH_CTRL2_CH5_ERROR_IRQ 0x00000020 +#define BM_APBH_CTRL2_CH4_ERROR_IRQ 0x00000010 +#define BM_APBH_CTRL2_CH3_ERROR_IRQ 0x00000008 +#define BM_APBH_CTRL2_CH2_ERROR_IRQ 0x00000004 +#define BM_APBH_CTRL2_CH1_ERROR_IRQ 0x00000002 +#define BM_APBH_CTRL2_CH0_ERROR_IRQ 0x00000001 + +#define HW_APBH_DEVSEL (0x00000030) +#define HW_APBH_DEVSEL_ADDR \ + (REGS_APBH_BASE + HW_APBH_DEVSEL) + +#define BP_APBH_DEVSEL_CH7 28 +#define BM_APBH_DEVSEL_CH7 0xF0000000 +#define BF_APBH_DEVSEL_CH7(v) \ + (((v) << 28) & BM_APBH_DEVSEL_CH7) +#define BP_APBH_DEVSEL_CH6 24 +#define BM_APBH_DEVSEL_CH6 0x0F000000 +#define BF_APBH_DEVSEL_CH6(v) \ + (((v) << 24) & BM_APBH_DEVSEL_CH6) +#define BP_APBH_DEVSEL_CH5 20 +#define BM_APBH_DEVSEL_CH5 0x00F00000 +#define BF_APBH_DEVSEL_CH5(v) \ + (((v) << 20) & BM_APBH_DEVSEL_CH5) +#define BP_APBH_DEVSEL_CH4 16 +#define BM_APBH_DEVSEL_CH4 0x000F0000 +#define BF_APBH_DEVSEL_CH4(v) \ + (((v) << 16) & BM_APBH_DEVSEL_CH4) +#define BP_APBH_DEVSEL_CH3 12 +#define BM_APBH_DEVSEL_CH3 0x0000F000 +#define BF_APBH_DEVSEL_CH3(v) \ + (((v) << 12) & BM_APBH_DEVSEL_CH3) +#define BP_APBH_DEVSEL_CH2 8 +#define BM_APBH_DEVSEL_CH2 0x00000F00 +#define BF_APBH_DEVSEL_CH2(v) \ + (((v) << 8) & BM_APBH_DEVSEL_CH2) +#define BP_APBH_DEVSEL_CH1 4 +#define BM_APBH_DEVSEL_CH1 0x000000F0 +#define BF_APBH_DEVSEL_CH1(v) \ + (((v) << 4) & BM_APBH_DEVSEL_CH1) +#define BP_APBH_DEVSEL_CH0 0 +#define BM_APBH_DEVSEL_CH0 0x0000000F +#define BF_APBH_DEVSEL_CH0(v) \ + (((v) << 0) & BM_APBH_DEVSEL_CH0) -#define HW_APBH_DEVSEL 0x30 +/* + * multi-register-define name HW_APBH_CHn_CURCMDAR + * base 0x00000040 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_CURCMDAR(n) (0x00000040 + (n) * 0x70) +#define HW_APBH_CHn_CURCMDAR_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_CURCMDAR(n)) +#define BP_APBH_CHn_CURCMDAR_CMD_ADDR 0 +#define BM_APBH_CHn_CURCMDAR_CMD_ADDR 0xFFFFFFFF +#define BF_APBH_CHn_CURCMDAR_CMD_ADDR(v) (v) -#define HW_APBH_CH0_NXTCMDAR (0x50 + 0 * 0x70) -#define HW_APBH_CH1_NXTCMDAR (0x50 + 1 * 0x70) -#define HW_APBH_CH2_NXTCMDAR (0x50 + 2 * 0x70) -#define HW_APBH_CH3_NXTCMDAR (0x50 + 3 * 0x70) -#define HW_APBH_CH4_NXTCMDAR (0x50 + 4 * 0x70) -#define HW_APBH_CH5_NXTCMDAR (0x50 + 5 * 0x70) -#define HW_APBH_CH6_NXTCMDAR (0x50 + 6 * 0x70) -#define HW_APBH_CH7_NXTCMDAR (0x50 + 7 * 0x70) -#define HW_APBH_CH8_NXTCMDAR (0x50 + 8 * 0x70) -#define HW_APBH_CH9_NXTCMDAR (0x50 + 9 * 0x70) -#define HW_APBH_CH10_NXTCMDAR (0x50 + 10 * 0x70) -#define HW_APBH_CH11_NXTCMDAR (0x50 + 11 * 0x70) -#define HW_APBH_CH12_NXTCMDAR (0x50 + 12 * 0x70) -#define HW_APBH_CH13_NXTCMDAR (0x50 + 13 * 0x70) -#define HW_APBH_CH14_NXTCMDAR (0x50 + 14 * 0x70) -#define HW_APBH_CH15_NXTCMDAR (0x50 + 15 * 0x70) - -#define HW_APBH_CHn_NXTCMDAR 0x50 - -#define BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER 0 -#define BV_APBH_CHn_CMD_COMMAND__DMA_WRITE 1 -#define BV_APBH_CHn_CMD_COMMAND__DMA_READ 2 -#define BV_APBH_CHn_CMD_COMMAND__DMA_SENSE 3 -#define BM_APBH_CHn_CMD_COMMAND 0x00000003 -#define BP_APBH_CHn_CMD_COMMAND 0 -#define BM_APBH_CHn_CMD_CHAIN 0x00000004 -#define BM_APBH_CHn_CMD_IRQONCMPLT 0x00000008 -#define BM_APBH_CHn_CMD_NANDLOCK 0x00000010 -#define BM_APBH_CHn_CMD_NANDWAIT4READY 0x00000020 -#define BM_APBH_CHn_CMD_SEMAPHORE 0x00000040 -#define BM_APBH_CHn_CMD_WAIT4ENDCMD 0x00000080 -#define BM_APBH_CHn_CMD_CMDWORDS 0x0000F000 -#define BP_APBH_CHn_CMD_CMDWORDS 12 -#define BM_APBH_CHn_CMD_XFER_COUNT 0xFFFF0000 +/* + * multi-register-define name HW_APBH_CHn_NXTCMDAR + * base 0x00000050 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_NXTCMDAR(n) (0x00000050 + (n) * 0x70) +#define HW_APBH_CHn_NXTCMDAR_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_NXTCMDAR(n)) +#define BP_APBH_CHn_NXTCMDAR_CMD_ADDR 0 +#define BM_APBH_CHn_NXTCMDAR_CMD_ADDR 0xFFFFFFFF +#define BF_APBH_CHn_NXTCMDAR_CMD_ADDR(v) (v) + +/* + * multi-register-define name HW_APBH_CHn_CMD + * base 0x00000060 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_CMD(n) (0x00000060 + (n) * 0x70) +#define HW_APBH_CHn_CMD_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_CMD(n)) #define BP_APBH_CHn_CMD_XFER_COUNT 16 +#define BM_APBH_CHn_CMD_XFER_COUNT 0xFFFF0000 +#define BF_APBH_CHn_CMD_XFER_COUNT(v) \ + (((v) << 16) & BM_APBH_CHn_CMD_XFER_COUNT) +#define BP_APBH_CHn_CMD_CMDWORDS 12 +#define BM_APBH_CHn_CMD_CMDWORDS 0x0000F000 +#define BF_APBH_CHn_CMD_CMDWORDS(v) \ + (((v) << 12) & BM_APBH_CHn_CMD_CMDWORDS) +#define BP_APBH_CHn_CMD_RSVD1 9 +#define BM_APBH_CHn_CMD_RSVD1 0x00000E00 +#define BF_APBH_CHn_CMD_RSVD1(v) \ + (((v) << 9) & BM_APBH_CHn_CMD_RSVD1) +#define BM_APBH_CHn_CMD_HALTONTERMINATE 0x00000100 +#define BM_APBH_CHn_CMD_WAIT4ENDCMD 0x00000080 +#define BM_APBH_CHn_CMD_SEMAPHORE 0x00000040 +#define BM_APBH_CHn_CMD_NANDWAIT4READY 0x00000020 +#define BM_APBH_CHn_CMD_NANDLOCK 0x00000010 +#define BM_APBH_CHn_CMD_IRQONCMPLT 0x00000008 +#define BM_APBH_CHn_CMD_CHAIN 0x00000004 +#define BP_APBH_CHn_CMD_COMMAND 0 +#define BM_APBH_CHn_CMD_COMMAND 0x00000003 +#define BF_APBH_CHn_CMD_COMMAND(v) \ + (((v) << 0) & BM_APBH_CHn_CMD_COMMAND) +#define BV_APBH_CHn_CMD_COMMAND__NO_DMA_XFER 0x0 +#define BV_APBH_CHn_CMD_COMMAND__DMA_WRITE 0x1 +#define BV_APBH_CHn_CMD_COMMAND__DMA_READ 0x2 +#define BV_APBH_CHn_CMD_COMMAND__DMA_SENSE 0x3 -#define HW_APBH_CH0_SEMA (0x80 + 0 * 0x70) -#define HW_APBH_CH1_SEMA (0x80 + 1 * 0x70) -#define HW_APBH_CH2_SEMA (0x80 + 2 * 0x70) -#define HW_APBH_CH3_SEMA (0x80 + 3 * 0x70) -#define HW_APBH_CH4_SEMA (0x80 + 4 * 0x70) -#define HW_APBH_CH5_SEMA (0x80 + 5 * 0x70) -#define HW_APBH_CH6_SEMA (0x80 + 6 * 0x70) -#define HW_APBH_CH7_SEMA (0x80 + 7 * 0x70) -#define HW_APBH_CH8_SEMA (0x80 + 8 * 0x70) -#define HW_APBH_CH9_SEMA (0x80 + 9 * 0x70) -#define HW_APBH_CH10_SEMA (0x80 + 10 * 0x70) -#define HW_APBH_CH11_SEMA (0x80 + 11 * 0x70) -#define HW_APBH_CH12_SEMA (0x80 + 12 * 0x70) -#define HW_APBH_CH13_SEMA (0x80 + 13 * 0x70) -#define HW_APBH_CH14_SEMA (0x80 + 14 * 0x70) -#define HW_APBH_CH15_SEMA (0x80 + 15 * 0x70) +/* + * multi-register-define name HW_APBH_CHn_BAR + * base 0x00000070 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_BAR(n) (0x00000070 + (n) * 0x70) +#define HW_APBH_CHn_BAR_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_BAR(n)) +#define BP_APBH_CHn_BAR_ADDRESS 0 +#define BM_APBH_CHn_BAR_ADDRESS 0xFFFFFFFF +#define BF_APBH_CHn_BAR_ADDRESS(v) (v) -#define HW_APBH_CHn_SEMA 0x80 -#define BM_APBH_CHn_SEMA_INCREMENT_SEMA 0x000000FF -#define BP_APBH_CHn_SEMA_INCREMENT_SEMA 0 -#define BM_APBH_CHn_SEMA_PHORE 0x00FF0000 +/* + * multi-register-define name HW_APBH_CHn_SEMA + * base 0x00000080 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_SEMA(n) (0x00000080 + (n) * 0x70) +#define HW_APBH_CHn_SEMA_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_SEMA(n)) +#define BP_APBH_CHn_SEMA_RSVD2 24 +#define BM_APBH_CHn_SEMA_RSVD2 0xFF000000 +#define BF_APBH_CHn_SEMA_RSVD2(v) \ + (((v) << 24) & BM_APBH_CHn_SEMA_RSVD2) #define BP_APBH_CHn_SEMA_PHORE 16 +#define BM_APBH_CHn_SEMA_PHORE 0x00FF0000 +#define BF_APBH_CHn_SEMA_PHORE(v) \ + (((v) << 16) & BM_APBH_CHn_SEMA_PHORE) +#define BP_APBH_CHn_SEMA_RSVD1 8 +#define BM_APBH_CHn_SEMA_RSVD1 0x0000FF00 +#define BF_APBH_CHn_SEMA_RSVD1(v) \ + (((v) << 8) & BM_APBH_CHn_SEMA_RSVD1) +#define BP_APBH_CHn_SEMA_INCREMENT_SEMA 0 +#define BM_APBH_CHn_SEMA_INCREMENT_SEMA 0x000000FF +#define BF_APBH_CHn_SEMA_INCREMENT_SEMA(v) \ + (((v) << 0) & BM_APBH_CHn_SEMA_INCREMENT_SEMA) + +/* + * multi-register-define name HW_APBH_CHn_DEBUG1 + * base 0x00000090 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_DEBUG1(n) (0x00000090 + (n) * 0x70) +#define HW_APBH_CHn_DEBUG1_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_DEBUG1(n)) +#define BM_APBH_CHn_DEBUG1_REQ 0x80000000 +#define BM_APBH_CHn_DEBUG1_BURST 0x40000000 +#define BM_APBH_CHn_DEBUG1_KICK 0x20000000 +#define BM_APBH_CHn_DEBUG1_END 0x10000000 +#define BM_APBH_CHn_DEBUG1_SENSE 0x08000000 +#define BM_APBH_CHn_DEBUG1_READY 0x04000000 +#define BM_APBH_CHn_DEBUG1_LOCK 0x02000000 +#define BM_APBH_CHn_DEBUG1_NEXTCMDADDRVALID 0x01000000 +#define BM_APBH_CHn_DEBUG1_RD_FIFO_EMPTY 0x00800000 +#define BM_APBH_CHn_DEBUG1_RD_FIFO_FULL 0x00400000 +#define BM_APBH_CHn_DEBUG1_WR_FIFO_EMPTY 0x00200000 +#define BM_APBH_CHn_DEBUG1_WR_FIFO_FULL 0x00100000 +#define BP_APBH_CHn_DEBUG1_RSVD1 5 +#define BM_APBH_CHn_DEBUG1_RSVD1 0x000FFFE0 +#define BF_APBH_CHn_DEBUG1_RSVD1(v) \ + (((v) << 5) & BM_APBH_CHn_DEBUG1_RSVD1) +#define BP_APBH_CHn_DEBUG1_STATEMACHINE 0 +#define BM_APBH_CHn_DEBUG1_STATEMACHINE 0x0000001F +#define BF_APBH_CHn_DEBUG1_STATEMACHINE(v) \ + (((v) << 0) & BM_APBH_CHn_DEBUG1_STATEMACHINE) +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__IDLE 0x00 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__REQ_CMD1 0x01 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__REQ_CMD3 0x02 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__REQ_CMD2 0x03 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__XFER_DECODE 0x04 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__REQ_WAIT 0x05 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__REQ_CMD4 0x06 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__PIO_REQ 0x07 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__READ_FLUSH 0x08 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__READ_WAIT 0x09 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__WRITE 0x0C +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__READ_REQ 0x0D +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__CHECK_CHAIN 0x0E +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__XFER_COMPLETE 0x0F +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__TERMINATE 0x14 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__WAIT_END 0x15 +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__WRITE_WAIT 0x1C +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__HALT_AFTER_TERM 0x1D +#define BV_APBH_CHn_DEBUG1_STATEMACHINE__CHECK_WAIT 0x1E -#endif +/* + * multi-register-define name HW_APBH_CHn_DEBUG2 + * base 0x000000A0 + * count 8 + * offset 0x70 + */ +#define HW_APBH_CHn_DEBUG2(n) (0x000000a0 + (n) * 0x70) +#define HW_APBH_CHn_DEBUG2_ADDR(n) \ + (REGS_APBH_BASE + HW_APBH_CHn_DEBUG2(n)) +#define BP_APBH_CHn_DEBUG2_APB_BYTES 16 +#define BM_APBH_CHn_DEBUG2_APB_BYTES 0xFFFF0000 +#define BF_APBH_CHn_DEBUG2_APB_BYTES(v) \ + (((v) << 16) & BM_APBH_CHn_DEBUG2_APB_BYTES) +#define BP_APBH_CHn_DEBUG2_AHB_BYTES 0 +#define BM_APBH_CHn_DEBUG2_AHB_BYTES 0x0000FFFF +#define BF_APBH_CHn_DEBUG2_AHB_BYTES(v) \ + (((v) << 0) & BM_APBH_CHn_DEBUG2_AHB_BYTES) + +#define HW_APBH_VERSION (0x000003f0) +#define HW_APBH_VERSION_ADDR \ + (REGS_APBH_BASE + HW_APBH_VERSION) + +#define BP_APBH_VERSION_MAJOR 24 +#define BM_APBH_VERSION_MAJOR 0xFF000000 +#define BF_APBH_VERSION_MAJOR(v) \ + (((v) << 24) & BM_APBH_VERSION_MAJOR) +#define BP_APBH_VERSION_MINOR 16 +#define BM_APBH_VERSION_MINOR 0x00FF0000 +#define BF_APBH_VERSION_MINOR(v) \ + (((v) << 16) & BM_APBH_VERSION_MINOR) +#define BP_APBH_VERSION_STEP 0 +#define BM_APBH_VERSION_STEP 0x0000FFFF +#define BF_APBH_VERSION_STEP(v) \ + (((v) << 0) & BM_APBH_VERSION_STEP) +#endif /* __ARCH_ARM___APBH_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-ir.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-ir.h @@ -1,7 +1,7 @@ /* - * stmp378x: IR register definitions + * STMP IR Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,7 +17,397 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_IR_BASE (STMP3XXX_REGS_BASE + 0x78000) -#define REGS_IR_PHYS 0x80078000 -#define REGS_IR_SIZE 0x2000 + +#ifndef __ARCH_ARM___IR_H +#define __ARCH_ARM___IR_H 1 + +#define REGS_IR_BASE (STMP3XXX_REGS_BASE + 0x78000) +#define REGS_IR_PHYS (0x80078000) +#define REGS_IR_SIZE 0x00002000 + +#define HW_IR_CTRL (0x00000000) +#define HW_IR_CTRL_SET (0x00000004) +#define HW_IR_CTRL_CLR (0x00000008) +#define HW_IR_CTRL_TOG (0x0000000c) +#define HW_IR_CTRL_ADDR \ + (REGS_IR_BASE + HW_IR_CTRL) +#define HW_IR_CTRL_SET_ADDR \ + (REGS_IR_BASE + HW_IR_CTRL_SET) +#define HW_IR_CTRL_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_CTRL_CLR) +#define HW_IR_CTRL_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_CTRL_TOG) + +#define BM_IR_CTRL_SFTRST 0x80000000 +#define BV_IR_CTRL_SFTRST__RUN 0x0 +#define BV_IR_CTRL_SFTRST__RESET 0x1 +#define BM_IR_CTRL_CLKGATE 0x40000000 +#define BP_IR_CTRL_RSVD2 27 +#define BM_IR_CTRL_RSVD2 0x38000000 +#define BF_IR_CTRL_RSVD2(v) \ + (((v) << 27) & BM_IR_CTRL_RSVD2) +#define BP_IR_CTRL_MTA 24 +#define BM_IR_CTRL_MTA 0x07000000 +#define BF_IR_CTRL_MTA(v) \ + (((v) << 24) & BM_IR_CTRL_MTA) +#define BV_IR_CTRL_MTA__MTA_10MS 0x0 +#define BV_IR_CTRL_MTA__MTA_5MS 0x1 +#define BV_IR_CTRL_MTA__MTA_1MS 0x2 +#define BV_IR_CTRL_MTA__MTA_500US 0x3 +#define BV_IR_CTRL_MTA__MTA_100US 0x4 +#define BV_IR_CTRL_MTA__MTA_50US 0x5 +#define BV_IR_CTRL_MTA__MTA_10US 0x6 +#define BV_IR_CTRL_MTA__MTA_0 0x7 +#define BP_IR_CTRL_MODE 22 +#define BM_IR_CTRL_MODE 0x00C00000 +#define BF_IR_CTRL_MODE(v) \ + (((v) << 22) & BM_IR_CTRL_MODE) +#define BV_IR_CTRL_MODE__SIR 0x0 +#define BV_IR_CTRL_MODE__MIR 0x1 +#define BV_IR_CTRL_MODE__FIR 0x2 +#define BV_IR_CTRL_MODE__VFIR 0x3 +#define BP_IR_CTRL_SPEED 19 +#define BM_IR_CTRL_SPEED 0x00380000 +#define BF_IR_CTRL_SPEED(v) \ + (((v) << 19) & BM_IR_CTRL_SPEED) +#define BV_IR_CTRL_SPEED__SPD000 0x0 +#define BV_IR_CTRL_SPEED__SPD001 0x1 +#define BV_IR_CTRL_SPEED__SPD010 0x2 +#define BV_IR_CTRL_SPEED__SPD011 0x3 +#define BV_IR_CTRL_SPEED__SPD100 0x4 +#define BV_IR_CTRL_SPEED__SPD101 0x5 +#define BP_IR_CTRL_RSVD1 14 +#define BM_IR_CTRL_RSVD1 0x0007C000 +#define BF_IR_CTRL_RSVD1(v) \ + (((v) << 14) & BM_IR_CTRL_RSVD1) +#define BP_IR_CTRL_TC_TIME_DIV 8 +#define BM_IR_CTRL_TC_TIME_DIV 0x00003F00 +#define BF_IR_CTRL_TC_TIME_DIV(v) \ + (((v) << 8) & BM_IR_CTRL_TC_TIME_DIV) +#define BM_IR_CTRL_TC_TYPE 0x00000080 +#define BP_IR_CTRL_SIR_GAP 4 +#define BM_IR_CTRL_SIR_GAP 0x00000070 +#define BF_IR_CTRL_SIR_GAP(v) \ + (((v) << 4) & BM_IR_CTRL_SIR_GAP) +#define BV_IR_CTRL_SIR_GAP__GAP_10K 0x0 +#define BV_IR_CTRL_SIR_GAP__GAP_5K 0x1 +#define BV_IR_CTRL_SIR_GAP__GAP_1K 0x2 +#define BV_IR_CTRL_SIR_GAP__GAP_500 0x3 +#define BV_IR_CTRL_SIR_GAP__GAP_100 0x4 +#define BV_IR_CTRL_SIR_GAP__GAP_50 0x5 +#define BV_IR_CTRL_SIR_GAP__GAP_10 0x6 +#define BV_IR_CTRL_SIR_GAP__GAP_0 0x7 +#define BM_IR_CTRL_SIPEN 0x00000008 +#define BM_IR_CTRL_TCEN 0x00000004 +#define BM_IR_CTRL_TXEN 0x00000002 +#define BM_IR_CTRL_RXEN 0x00000001 + +#define HW_IR_TXDMA (0x00000010) +#define HW_IR_TXDMA_SET (0x00000014) +#define HW_IR_TXDMA_CLR (0x00000018) +#define HW_IR_TXDMA_TOG (0x0000001c) +#define HW_IR_TXDMA_ADDR \ + (REGS_IR_BASE + HW_IR_TXDMA) +#define HW_IR_TXDMA_SET_ADDR \ + (REGS_IR_BASE + HW_IR_TXDMA_SET) +#define HW_IR_TXDMA_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_TXDMA_CLR) +#define HW_IR_TXDMA_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_TXDMA_TOG) + +#define BM_IR_TXDMA_RUN 0x80000000 +#define BM_IR_TXDMA_RSVD2 0x40000000 +#define BM_IR_TXDMA_EMPTY 0x20000000 +#define BM_IR_TXDMA_INT 0x10000000 +#define BM_IR_TXDMA_CHANGE 0x08000000 +#define BP_IR_TXDMA_NEW_MTA 24 +#define BM_IR_TXDMA_NEW_MTA 0x07000000 +#define BF_IR_TXDMA_NEW_MTA(v) \ + (((v) << 24) & BM_IR_TXDMA_NEW_MTA) +#define BP_IR_TXDMA_NEW_MODE 22 +#define BM_IR_TXDMA_NEW_MODE 0x00C00000 +#define BF_IR_TXDMA_NEW_MODE(v) \ + (((v) << 22) & BM_IR_TXDMA_NEW_MODE) +#define BP_IR_TXDMA_NEW_SPEED 19 +#define BM_IR_TXDMA_NEW_SPEED 0x00380000 +#define BF_IR_TXDMA_NEW_SPEED(v) \ + (((v) << 19) & BM_IR_TXDMA_NEW_SPEED) +#define BM_IR_TXDMA_BOF_TYPE 0x00040000 +#define BP_IR_TXDMA_XBOFS 12 +#define BM_IR_TXDMA_XBOFS 0x0003F000 +#define BF_IR_TXDMA_XBOFS(v) \ + (((v) << 12) & BM_IR_TXDMA_XBOFS) +#define BP_IR_TXDMA_XFER_COUNT 0 +#define BM_IR_TXDMA_XFER_COUNT 0x00000FFF +#define BF_IR_TXDMA_XFER_COUNT(v) \ + (((v) << 0) & BM_IR_TXDMA_XFER_COUNT) + +#define HW_IR_RXDMA (0x00000020) +#define HW_IR_RXDMA_SET (0x00000024) +#define HW_IR_RXDMA_CLR (0x00000028) +#define HW_IR_RXDMA_TOG (0x0000002c) +#define HW_IR_RXDMA_ADDR \ + (REGS_IR_BASE + HW_IR_RXDMA) +#define HW_IR_RXDMA_SET_ADDR \ + (REGS_IR_BASE + HW_IR_RXDMA_SET) +#define HW_IR_RXDMA_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_RXDMA_CLR) +#define HW_IR_RXDMA_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_RXDMA_TOG) + +#define BM_IR_RXDMA_RUN 0x80000000 +#define BP_IR_RXDMA_RSVD 10 +#define BM_IR_RXDMA_RSVD 0x7FFFFC00 +#define BF_IR_RXDMA_RSVD(v) \ + (((v) << 10) & BM_IR_RXDMA_RSVD) +#define BP_IR_RXDMA_XFER_COUNT 0 +#define BM_IR_RXDMA_XFER_COUNT 0x000003FF +#define BF_IR_RXDMA_XFER_COUNT(v) \ + (((v) << 0) & BM_IR_RXDMA_XFER_COUNT) + +#define HW_IR_DBGCTRL (0x00000030) +#define HW_IR_DBGCTRL_SET (0x00000034) +#define HW_IR_DBGCTRL_CLR (0x00000038) +#define HW_IR_DBGCTRL_TOG (0x0000003c) +#define HW_IR_DBGCTRL_ADDR \ + (REGS_IR_BASE + HW_IR_DBGCTRL) +#define HW_IR_DBGCTRL_SET_ADDR \ + (REGS_IR_BASE + HW_IR_DBGCTRL_SET) +#define HW_IR_DBGCTRL_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_DBGCTRL_CLR) +#define HW_IR_DBGCTRL_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_DBGCTRL_TOG) + +#define BP_IR_DBGCTRL_RSVD2 13 +#define BM_IR_DBGCTRL_RSVD2 0xFFFFE000 +#define BF_IR_DBGCTRL_RSVD2(v) \ + (((v) << 13) & BM_IR_DBGCTRL_RSVD2) +#define BM_IR_DBGCTRL_VFIRSWZ 0x00001000 +#define BV_IR_DBGCTRL_VFIRSWZ__NORMAL 0 +#define BV_IR_DBGCTRL_VFIRSWZ__SWAP 1 +#define BM_IR_DBGCTRL_RXFRMOFF 0x00000800 +#define BM_IR_DBGCTRL_RXCRCOFF 0x00000400 +#define BM_IR_DBGCTRL_RXINVERT 0x00000200 +#define BM_IR_DBGCTRL_TXFRMOFF 0x00000100 +#define BM_IR_DBGCTRL_TXCRCOFF 0x00000080 +#define BM_IR_DBGCTRL_TXINVERT 0x00000040 +#define BM_IR_DBGCTRL_INTLOOPBACK 0x00000020 +#define BM_IR_DBGCTRL_DUPLEX 0x00000010 +#define BM_IR_DBGCTRL_MIO_RX 0x00000008 +#define BM_IR_DBGCTRL_MIO_TX 0x00000004 +#define BM_IR_DBGCTRL_MIO_SCLK 0x00000002 +#define BM_IR_DBGCTRL_MIO_EN 0x00000001 + +#define HW_IR_INTR (0x00000040) +#define HW_IR_INTR_SET (0x00000044) +#define HW_IR_INTR_CLR (0x00000048) +#define HW_IR_INTR_TOG (0x0000004c) +#define HW_IR_INTR_ADDR \ + (REGS_IR_BASE + HW_IR_INTR) +#define HW_IR_INTR_SET_ADDR \ + (REGS_IR_BASE + HW_IR_INTR_SET) +#define HW_IR_INTR_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_INTR_CLR) +#define HW_IR_INTR_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_INTR_TOG) + +#define BP_IR_INTR_RSVD2 23 +#define BM_IR_INTR_RSVD2 0xFF800000 +#define BF_IR_INTR_RSVD2(v) \ + (((v) << 23) & BM_IR_INTR_RSVD2) +#define BM_IR_INTR_RXABORT_IRQ_EN 0x00400000 +#define BV_IR_INTR_RXABORT_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_RXABORT_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_SPEED_IRQ_EN 0x00200000 +#define BV_IR_INTR_SPEED_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_SPEED_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_RXOF_IRQ_EN 0x00100000 +#define BV_IR_INTR_RXOF_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_RXOF_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_TXUF_IRQ_EN 0x00080000 +#define BV_IR_INTR_TXUF_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_TXUF_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_TC_IRQ_EN 0x00040000 +#define BV_IR_INTR_TC_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_TC_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_RX_IRQ_EN 0x00020000 +#define BV_IR_INTR_RX_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_RX_IRQ_EN__ENABLED 0x1 +#define BM_IR_INTR_TX_IRQ_EN 0x00010000 +#define BV_IR_INTR_TX_IRQ_EN__DISABLED 0x0 +#define BV_IR_INTR_TX_IRQ_EN__ENABLED 0x1 +#define BP_IR_INTR_RSVD1 7 +#define BM_IR_INTR_RSVD1 0x0000FF80 +#define BF_IR_INTR_RSVD1(v) \ + (((v) << 7) & BM_IR_INTR_RSVD1) +#define BM_IR_INTR_RXABORT_IRQ 0x00000040 +#define BV_IR_INTR_RXABORT_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_RXABORT_IRQ__REQUEST 0x1 +#define BM_IR_INTR_SPEED_IRQ 0x00000020 +#define BV_IR_INTR_SPEED_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_SPEED_IRQ__REQUEST 0x1 +#define BM_IR_INTR_RXOF_IRQ 0x00000010 +#define BV_IR_INTR_RXOF_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_RXOF_IRQ__REQUEST 0x1 +#define BM_IR_INTR_TXUF_IRQ 0x00000008 +#define BV_IR_INTR_TXUF_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_TXUF_IRQ__REQUEST 0x1 +#define BM_IR_INTR_TC_IRQ 0x00000004 +#define BV_IR_INTR_TC_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_TC_IRQ__REQUEST 0x1 +#define BM_IR_INTR_RX_IRQ 0x00000002 +#define BV_IR_INTR_RX_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_RX_IRQ__REQUEST 0x1 +#define BM_IR_INTR_TX_IRQ 0x00000001 +#define BV_IR_INTR_TX_IRQ__NO_REQUEST 0x0 +#define BV_IR_INTR_TX_IRQ__REQUEST 0x1 + +#define HW_IR_DATA (0x00000050) +#define HW_IR_DATA_ADDR \ + (REGS_IR_BASE + HW_IR_DATA) + +#define BP_IR_DATA_DATA 0 +#define BM_IR_DATA_DATA 0xFFFFFFFF +#define BF_IR_DATA_DATA(v) (v) + +#define HW_IR_STAT (0x00000060) +#define HW_IR_STAT_ADDR \ + (REGS_IR_BASE + HW_IR_STAT) + +#define BM_IR_STAT_PRESENT 0x80000000 +#define BV_IR_STAT_PRESENT__UNAVAILABLE 0x0 +#define BV_IR_STAT_PRESENT__AVAILABLE 0x1 +#define BP_IR_STAT_MODE_ALLOWED 29 +#define BM_IR_STAT_MODE_ALLOWED 0x60000000 +#define BF_IR_STAT_MODE_ALLOWED(v) \ + (((v) << 29) & BM_IR_STAT_MODE_ALLOWED) +#define BV_IR_STAT_MODE_ALLOWED__VFIR 0x0 +#define BV_IR_STAT_MODE_ALLOWED__FIR 0x1 +#define BV_IR_STAT_MODE_ALLOWED__MIR 0x2 +#define BV_IR_STAT_MODE_ALLOWED__SIR 0x3 +#define BM_IR_STAT_ANY_IRQ 0x10000000 +#define BV_IR_STAT_ANY_IRQ__NO_REQUEST 0x0 +#define BV_IR_STAT_ANY_IRQ__REQUEST 0x1 +#define BP_IR_STAT_RSVD2 23 +#define BM_IR_STAT_RSVD2 0x0F800000 +#define BF_IR_STAT_RSVD2(v) \ + (((v) << 23) & BM_IR_STAT_RSVD2) +#define BM_IR_STAT_RXABORT_SUMMARY 0x00400000 +#define BV_IR_STAT_RXABORT_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_RXABORT_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_SPEED_SUMMARY 0x00200000 +#define BV_IR_STAT_SPEED_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_SPEED_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_RXOF_SUMMARY 0x00100000 +#define BV_IR_STAT_RXOF_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_RXOF_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_TXUF_SUMMARY 0x00080000 +#define BV_IR_STAT_TXUF_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_TXUF_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_TC_SUMMARY 0x00040000 +#define BV_IR_STAT_TC_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_TC_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_RX_SUMMARY 0x00020000 +#define BV_IR_STAT_RX_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_RX_SUMMARY__REQUEST 0x1 +#define BM_IR_STAT_TX_SUMMARY 0x00010000 +#define BV_IR_STAT_TX_SUMMARY__NO_REQUEST 0x0 +#define BV_IR_STAT_TX_SUMMARY__REQUEST 0x1 +#define BP_IR_STAT_RSVD1 3 +#define BM_IR_STAT_RSVD1 0x0000FFF8 +#define BF_IR_STAT_RSVD1(v) \ + (((v) << 3) & BM_IR_STAT_RSVD1) +#define BM_IR_STAT_MEDIA_BUSY 0x00000004 +#define BM_IR_STAT_RX_ACTIVE 0x00000002 +#define BM_IR_STAT_TX_ACTIVE 0x00000001 + +#define HW_IR_TCCTRL (0x00000070) +#define HW_IR_TCCTRL_SET (0x00000074) +#define HW_IR_TCCTRL_CLR (0x00000078) +#define HW_IR_TCCTRL_TOG (0x0000007c) +#define HW_IR_TCCTRL_ADDR \ + (REGS_IR_BASE + HW_IR_TCCTRL) +#define HW_IR_TCCTRL_SET_ADDR \ + (REGS_IR_BASE + HW_IR_TCCTRL_SET) +#define HW_IR_TCCTRL_CLR_ADDR \ + (REGS_IR_BASE + HW_IR_TCCTRL_CLR) +#define HW_IR_TCCTRL_TOG_ADDR \ + (REGS_IR_BASE + HW_IR_TCCTRL_TOG) + +#define BM_IR_TCCTRL_INIT 0x80000000 +#define BM_IR_TCCTRL_GO 0x40000000 +#define BM_IR_TCCTRL_BUSY 0x20000000 +#define BP_IR_TCCTRL_RSVD 25 +#define BM_IR_TCCTRL_RSVD 0x1E000000 +#define BF_IR_TCCTRL_RSVD(v) \ + (((v) << 25) & BM_IR_TCCTRL_RSVD) +#define BM_IR_TCCTRL_TEMIC 0x01000000 +#define BV_IR_TCCTRL_TEMIC__LOW 0x0 +#define BV_IR_TCCTRL_TEMIC__HIGH 0x1 +#define BP_IR_TCCTRL_EXT_DATA 16 +#define BM_IR_TCCTRL_EXT_DATA 0x00FF0000 +#define BF_IR_TCCTRL_EXT_DATA(v) \ + (((v) << 16) & BM_IR_TCCTRL_EXT_DATA) +#define BP_IR_TCCTRL_DATA 8 +#define BM_IR_TCCTRL_DATA 0x0000FF00 +#define BF_IR_TCCTRL_DATA(v) \ + (((v) << 8) & BM_IR_TCCTRL_DATA) +#define BP_IR_TCCTRL_ADDR 5 +#define BM_IR_TCCTRL_ADDR 0x000000E0 +#define BF_IR_TCCTRL_ADDR(v) \ + (((v) << 5) & BM_IR_TCCTRL_ADDR) +#define BP_IR_TCCTRL_INDX 1 +#define BM_IR_TCCTRL_INDX 0x0000001E +#define BF_IR_TCCTRL_INDX(v) \ + (((v) << 1) & BM_IR_TCCTRL_INDX) +#define BM_IR_TCCTRL_C 0x00000001 + +#define HW_IR_SI_READ (0x00000080) +#define HW_IR_SI_READ_ADDR \ + (REGS_IR_BASE + HW_IR_SI_READ) + +#define BP_IR_SI_READ_RSVD1 9 +#define BM_IR_SI_READ_RSVD1 0xFFFFFE00 +#define BF_IR_SI_READ_RSVD1(v) \ + (((v) << 9) & BM_IR_SI_READ_RSVD1) +#define BM_IR_SI_READ_ABORT 0x00000100 +#define BP_IR_SI_READ_DATA 0 +#define BM_IR_SI_READ_DATA 0x000000FF +#define BF_IR_SI_READ_DATA(v) \ + (((v) << 0) & BM_IR_SI_READ_DATA) + +#define HW_IR_DEBUG (0x00000090) +#define HW_IR_DEBUG_ADDR \ + (REGS_IR_BASE + HW_IR_DEBUG) + +#define BP_IR_DEBUG_RSVD1 6 +#define BM_IR_DEBUG_RSVD1 0xFFFFFFC0 +#define BF_IR_DEBUG_RSVD1(v) \ + (((v) << 6) & BM_IR_DEBUG_RSVD1) +#define BM_IR_DEBUG_TXDMAKICK 0x00000020 +#define BM_IR_DEBUG_RXDMAKICK 0x00000010 +#define BM_IR_DEBUG_TXDMAEND 0x00000008 +#define BM_IR_DEBUG_RXDMAEND 0x00000004 +#define BM_IR_DEBUG_TXDMAREQ 0x00000002 +#define BM_IR_DEBUG_RXDMAREQ 0x00000001 + +#define HW_IR_VERSION (0x000000a0) +#define HW_IR_VERSION_ADDR \ + (REGS_IR_BASE + HW_IR_VERSION) + +#define BP_IR_VERSION_MAJOR 24 +#define BM_IR_VERSION_MAJOR 0xFF000000 +#define BF_IR_VERSION_MAJOR(v) \ + (((v) << 24) & BM_IR_VERSION_MAJOR) +#define BP_IR_VERSION_MINOR 16 +#define BM_IR_VERSION_MINOR 0x00FF0000 +#define BF_IR_VERSION_MINOR(v) \ + (((v) << 16) & BM_IR_VERSION_MINOR) +#define BP_IR_VERSION_STEP 0 +#define BM_IR_VERSION_STEP 0x0000FFFF +#define BF_IR_VERSION_STEP(v) \ + (((v) << 0) & BM_IR_VERSION_STEP) +#endif /* __ARCH_ARM___IR_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-spdif.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-spdif.h @@ -1,7 +1,7 @@ /* - * stmp378x: SPDIF register definitions + * STMP SPDIF Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,33 +17,187 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_SPDIF_BASE (STMP3XXX_REGS_BASE + 0x54000) -#define REGS_SPDIF_PHYS 0x80054000 -#define REGS_SPDIF_SIZE 0x2000 - -#define HW_SPDIF_CTRL 0x0 -#define BM_SPDIF_CTRL_RUN 0x00000001 -#define BP_SPDIF_CTRL_RUN 0 -#define BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 -#define BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 -#define BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 -#define BM_SPDIF_CTRL_WORD_LENGTH 0x00000010 -#define BM_SPDIF_CTRL_CLKGATE 0x40000000 -#define BM_SPDIF_CTRL_SFTRST 0x80000000 -#define HW_SPDIF_STAT 0x10 +#ifndef __ARCH_ARM___SPDIF_H +#define __ARCH_ARM___SPDIF_H 1 -#define HW_SPDIF_FRAMECTRL 0x20 +#define REGS_SPDIF_BASE (STMP3XXX_REGS_BASE + 0x54000) +#define REGS_SPDIF_PHYS (0x80054000) +#define REGS_SPDIF_SIZE 0x00002000 + +#define HW_SPDIF_CTRL (0x00000000) +#define HW_SPDIF_CTRL_SET (0x00000004) +#define HW_SPDIF_CTRL_CLR (0x00000008) +#define HW_SPDIF_CTRL_TOG (0x0000000c) +#define HW_SPDIF_CTRL_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_CTRL) +#define HW_SPDIF_CTRL_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_CTRL_SET) +#define HW_SPDIF_CTRL_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_CTRL_CLR) +#define HW_SPDIF_CTRL_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_CTRL_TOG) -#define HW_SPDIF_SRR 0x30 -#define BM_SPDIF_SRR_RATE 0x000FFFFF -#define BP_SPDIF_SRR_RATE 0 -#define BM_SPDIF_SRR_BASEMULT 0x70000000 -#define BP_SPDIF_SRR_BASEMULT 28 +#define BM_SPDIF_CTRL_SFTRST 0x80000000 +#define BM_SPDIF_CTRL_CLKGATE 0x40000000 +#define BP_SPDIF_CTRL_RSRVD1 21 +#define BM_SPDIF_CTRL_RSRVD1 0x3FE00000 +#define BF_SPDIF_CTRL_RSRVD1(v) \ + (((v) << 21) & BM_SPDIF_CTRL_RSRVD1) +#define BP_SPDIF_CTRL_DMAWAIT_COUNT 16 +#define BM_SPDIF_CTRL_DMAWAIT_COUNT 0x001F0000 +#define BF_SPDIF_CTRL_DMAWAIT_COUNT(v) \ + (((v) << 16) & BM_SPDIF_CTRL_DMAWAIT_COUNT) +#define BP_SPDIF_CTRL_RSRVD0 6 +#define BM_SPDIF_CTRL_RSRVD0 0x0000FFC0 +#define BF_SPDIF_CTRL_RSRVD0(v) \ + (((v) << 6) & BM_SPDIF_CTRL_RSRVD0) +#define BM_SPDIF_CTRL_WAIT_END_XFER 0x00000020 +#define BM_SPDIF_CTRL_WORD_LENGTH 0x00000010 +#define BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 +#define BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 +#define BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 +#define BM_SPDIF_CTRL_RUN 0x00000001 -#define HW_SPDIF_DEBUG 0x40 +#define HW_SPDIF_STAT (0x00000010) +#define HW_SPDIF_STAT_SET (0x00000014) +#define HW_SPDIF_STAT_CLR (0x00000018) +#define HW_SPDIF_STAT_TOG (0x0000001c) +#define HW_SPDIF_STAT_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_STAT) +#define HW_SPDIF_STAT_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_STAT_SET) +#define HW_SPDIF_STAT_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_STAT_CLR) +#define HW_SPDIF_STAT_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_STAT_TOG) + +#define BM_SPDIF_STAT_PRESENT 0x80000000 +#define BP_SPDIF_STAT_RSRVD1 1 +#define BM_SPDIF_STAT_RSRVD1 0x7FFFFFFE +#define BF_SPDIF_STAT_RSRVD1(v) \ + (((v) << 1) & BM_SPDIF_STAT_RSRVD1) +#define BM_SPDIF_STAT_END_XFER 0x00000001 + +#define HW_SPDIF_FRAMECTRL (0x00000020) +#define HW_SPDIF_FRAMECTRL_SET (0x00000024) +#define HW_SPDIF_FRAMECTRL_CLR (0x00000028) +#define HW_SPDIF_FRAMECTRL_TOG (0x0000002c) +#define HW_SPDIF_FRAMECTRL_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_FRAMECTRL) +#define HW_SPDIF_FRAMECTRL_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_FRAMECTRL_SET) +#define HW_SPDIF_FRAMECTRL_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_FRAMECTRL_CLR) +#define HW_SPDIF_FRAMECTRL_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_FRAMECTRL_TOG) + +#define BP_SPDIF_FRAMECTRL_RSRVD2 18 +#define BM_SPDIF_FRAMECTRL_RSRVD2 0xFFFC0000 +#define BF_SPDIF_FRAMECTRL_RSRVD2(v) \ + (((v) << 18) & BM_SPDIF_FRAMECTRL_RSRVD2) +#define BM_SPDIF_FRAMECTRL_V_CONFIG 0x00020000 +#define BM_SPDIF_FRAMECTRL_AUTO_MUTE 0x00010000 +#define BM_SPDIF_FRAMECTRL_RSRVD1 0x00008000 +#define BM_SPDIF_FRAMECTRL_USER_DATA 0x00004000 +#define BM_SPDIF_FRAMECTRL_V 0x00002000 +#define BM_SPDIF_FRAMECTRL_L 0x00001000 +#define BM_SPDIF_FRAMECTRL_RSRVD0 0x00000800 +#define BP_SPDIF_FRAMECTRL_CC 4 +#define BM_SPDIF_FRAMECTRL_CC 0x000007F0 +#define BF_SPDIF_FRAMECTRL_CC(v) \ + (((v) << 4) & BM_SPDIF_FRAMECTRL_CC) +#define BM_SPDIF_FRAMECTRL_PRE 0x00000008 +#define BM_SPDIF_FRAMECTRL_COPY 0x00000004 +#define BM_SPDIF_FRAMECTRL_AUDIO 0x00000002 +#define BM_SPDIF_FRAMECTRL_PRO 0x00000001 + +#define HW_SPDIF_SRR (0x00000030) +#define HW_SPDIF_SRR_SET (0x00000034) +#define HW_SPDIF_SRR_CLR (0x00000038) +#define HW_SPDIF_SRR_TOG (0x0000003c) +#define HW_SPDIF_SRR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_SRR) +#define HW_SPDIF_SRR_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_SRR_SET) +#define HW_SPDIF_SRR_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_SRR_CLR) +#define HW_SPDIF_SRR_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_SRR_TOG) -#define HW_SPDIF_DATA 0x50 +#define BM_SPDIF_SRR_RSRVD1 0x80000000 +#define BP_SPDIF_SRR_BASEMULT 28 +#define BM_SPDIF_SRR_BASEMULT 0x70000000 +#define BF_SPDIF_SRR_BASEMULT(v) \ + (((v) << 28) & BM_SPDIF_SRR_BASEMULT) +#define BP_SPDIF_SRR_RSRVD0 20 +#define BM_SPDIF_SRR_RSRVD0 0x0FF00000 +#define BF_SPDIF_SRR_RSRVD0(v) \ + (((v) << 20) & BM_SPDIF_SRR_RSRVD0) +#define BP_SPDIF_SRR_RATE 0 +#define BM_SPDIF_SRR_RATE 0x000FFFFF +#define BF_SPDIF_SRR_RATE(v) \ + (((v) << 0) & BM_SPDIF_SRR_RATE) -#define HW_SPDIF_VERSION 0x60 +#define HW_SPDIF_DEBUG (0x00000040) +#define HW_SPDIF_DEBUG_SET (0x00000044) +#define HW_SPDIF_DEBUG_CLR (0x00000048) +#define HW_SPDIF_DEBUG_TOG (0x0000004c) +#define HW_SPDIF_DEBUG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DEBUG) +#define HW_SPDIF_DEBUG_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DEBUG_SET) +#define HW_SPDIF_DEBUG_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DEBUG_CLR) +#define HW_SPDIF_DEBUG_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DEBUG_TOG) + +#define BP_SPDIF_DEBUG_RSRVD1 2 +#define BM_SPDIF_DEBUG_RSRVD1 0xFFFFFFFC +#define BF_SPDIF_DEBUG_RSRVD1(v) \ + (((v) << 2) & BM_SPDIF_DEBUG_RSRVD1) +#define BM_SPDIF_DEBUG_DMA_PREQ 0x00000002 +#define BM_SPDIF_DEBUG_FIFO_STATUS 0x00000001 + +#define HW_SPDIF_DATA (0x00000050) +#define HW_SPDIF_DATA_SET (0x00000054) +#define HW_SPDIF_DATA_CLR (0x00000058) +#define HW_SPDIF_DATA_TOG (0x0000005c) +#define HW_SPDIF_DATA_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DATA) +#define HW_SPDIF_DATA_SET_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DATA_SET) +#define HW_SPDIF_DATA_CLR_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DATA_CLR) +#define HW_SPDIF_DATA_TOG_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_DATA_TOG) + +#define BP_SPDIF_DATA_HIGH 16 +#define BM_SPDIF_DATA_HIGH 0xFFFF0000 +#define BF_SPDIF_DATA_HIGH(v) \ + (((v) << 16) & BM_SPDIF_DATA_HIGH) +#define BP_SPDIF_DATA_LOW 0 +#define BM_SPDIF_DATA_LOW 0x0000FFFF +#define BF_SPDIF_DATA_LOW(v) \ + (((v) << 0) & BM_SPDIF_DATA_LOW) + +#define HW_SPDIF_VERSION (0x00000060) +#define HW_SPDIF_VERSION_ADDR \ + (REGS_SPDIF_BASE + HW_SPDIF_VERSION) + +#define BP_SPDIF_VERSION_MAJOR 24 +#define BM_SPDIF_VERSION_MAJOR 0xFF000000 +#define BF_SPDIF_VERSION_MAJOR(v) \ + (((v) << 24) & BM_SPDIF_VERSION_MAJOR) +#define BP_SPDIF_VERSION_MINOR 16 +#define BM_SPDIF_VERSION_MINOR 0x00FF0000 +#define BF_SPDIF_VERSION_MINOR(v) \ + (((v) << 16) & BM_SPDIF_VERSION_MINOR) +#define BP_SPDIF_VERSION_STEP 0 +#define BM_SPDIF_VERSION_STEP 0x0000FFFF +#define BF_SPDIF_VERSION_STEP(v) \ + (((v) << 0) & BM_SPDIF_VERSION_STEP) +#endif /* __ARCH_ARM___SPDIF_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-audioout.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-audioout.h @@ -1,7 +1,7 @@ /* - * stmp378x: AUDIOOUT register definitions + * STMP AUDIOOUT Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,88 +17,639 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_AUDIOOUT_BASE (STMP3XXX_REGS_BASE + 0x48000) -#define REGS_AUDIOOUT_PHYS 0x80048000 -#define REGS_AUDIOOUT_SIZE 0x2000 -#define HW_AUDIOOUT_CTRL 0x0 -#define BM_AUDIOOUT_CTRL_RUN 0x00000001 -#define BP_AUDIOOUT_CTRL_RUN 0 -#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 -#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 -#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 -#define BM_AUDIOOUT_CTRL_WORD_LENGTH 0x00000040 -#define BM_AUDIOOUT_CTRL_CLKGATE 0x40000000 -#define BM_AUDIOOUT_CTRL_SFTRST 0x80000000 +#ifndef __ARCH_ARM___AUDIOOUT_H +#define __ARCH_ARM___AUDIOOUT_H 1 -#define HW_AUDIOOUT_STAT 0x10 +#define REGS_AUDIOOUT_BASE (STMP3XXX_REGS_BASE + 0x48000) +#define REGS_AUDIOOUT_PHYS (0x80048000) +#define REGS_AUDIOOUT_SIZE 0x00002000 + +#define HW_AUDIOOUT_CTRL (0x00000000) +#define HW_AUDIOOUT_CTRL_SET (0x00000004) +#define HW_AUDIOOUT_CTRL_CLR (0x00000008) +#define HW_AUDIOOUT_CTRL_TOG (0x0000000c) +#define HW_AUDIOOUT_CTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL) +#define HW_AUDIOOUT_CTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_SET) +#define HW_AUDIOOUT_CTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_CLR) +#define HW_AUDIOOUT_CTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_CTRL_TOG) -#define HW_AUDIOOUT_DACSRR 0x20 -#define BM_AUDIOOUT_DACSRR_SRC_FRAC 0x00001FFF -#define BP_AUDIOOUT_DACSRR_SRC_FRAC 0 -#define BM_AUDIOOUT_DACSRR_SRC_INT 0x001F0000 -#define BP_AUDIOOUT_DACSRR_SRC_INT 16 -#define BM_AUDIOOUT_DACSRR_SRC_HOLD 0x07000000 -#define BP_AUDIOOUT_DACSRR_SRC_HOLD 24 -#define BM_AUDIOOUT_DACSRR_BASEMULT 0x70000000 +#define BM_AUDIOOUT_CTRL_SFTRST 0x80000000 +#define BM_AUDIOOUT_CTRL_CLKGATE 0x40000000 +#define BP_AUDIOOUT_CTRL_RSRVD4 21 +#define BM_AUDIOOUT_CTRL_RSRVD4 0x3FE00000 +#define BF_AUDIOOUT_CTRL_RSRVD4(v) \ + (((v) << 21) & BM_AUDIOOUT_CTRL_RSRVD4) +#define BP_AUDIOOUT_CTRL_DMAWAIT_COUNT 16 +#define BM_AUDIOOUT_CTRL_DMAWAIT_COUNT 0x001F0000 +#define BF_AUDIOOUT_CTRL_DMAWAIT_COUNT(v) \ + (((v) << 16) & BM_AUDIOOUT_CTRL_DMAWAIT_COUNT) +#define BM_AUDIOOUT_CTRL_RSRVD3 0x00008000 +#define BM_AUDIOOUT_CTRL_LR_SWAP 0x00004000 +#define BM_AUDIOOUT_CTRL_EDGE_SYNC 0x00002000 +#define BM_AUDIOOUT_CTRL_INVERT_1BIT 0x00001000 +#define BP_AUDIOOUT_CTRL_RSRVD2 10 +#define BM_AUDIOOUT_CTRL_RSRVD2 0x00000C00 +#define BF_AUDIOOUT_CTRL_RSRVD2(v) \ + (((v) << 10) & BM_AUDIOOUT_CTRL_RSRVD2) +#define BP_AUDIOOUT_CTRL_SS3D_EFFECT 8 +#define BM_AUDIOOUT_CTRL_SS3D_EFFECT 0x00000300 +#define BF_AUDIOOUT_CTRL_SS3D_EFFECT(v) \ + (((v) << 8) & BM_AUDIOOUT_CTRL_SS3D_EFFECT) +#define BM_AUDIOOUT_CTRL_RSRVD1 0x00000080 +#define BM_AUDIOOUT_CTRL_WORD_LENGTH 0x00000040 +#define BM_AUDIOOUT_CTRL_DAC_ZERO_ENABLE 0x00000020 +#define BM_AUDIOOUT_CTRL_LOOPBACK 0x00000010 +#define BM_AUDIOOUT_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 +#define BM_AUDIOOUT_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 +#define BM_AUDIOOUT_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 +#define BM_AUDIOOUT_CTRL_RUN 0x00000001 + +#define HW_AUDIOOUT_STAT (0x00000010) +#define HW_AUDIOOUT_STAT_SET (0x00000014) +#define HW_AUDIOOUT_STAT_CLR (0x00000018) +#define HW_AUDIOOUT_STAT_TOG (0x0000001c) +#define HW_AUDIOOUT_STAT_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_STAT) +#define HW_AUDIOOUT_STAT_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_STAT_SET) +#define HW_AUDIOOUT_STAT_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_STAT_CLR) +#define HW_AUDIOOUT_STAT_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_STAT_TOG) + +#define BM_AUDIOOUT_STAT_DAC_PRESENT 0x80000000 +#define BP_AUDIOOUT_STAT_RSRVD1 0 +#define BM_AUDIOOUT_STAT_RSRVD1 0x7FFFFFFF +#define BF_AUDIOOUT_STAT_RSRVD1(v) \ + (((v) << 0) & BM_AUDIOOUT_STAT_RSRVD1) + +#define HW_AUDIOOUT_DACSRR (0x00000020) +#define HW_AUDIOOUT_DACSRR_SET (0x00000024) +#define HW_AUDIOOUT_DACSRR_CLR (0x00000028) +#define HW_AUDIOOUT_DACSRR_TOG (0x0000002c) +#define HW_AUDIOOUT_DACSRR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR) +#define HW_AUDIOOUT_DACSRR_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR_SET) +#define HW_AUDIOOUT_DACSRR_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR_CLR) +#define HW_AUDIOOUT_DACSRR_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACSRR_TOG) + +#define BM_AUDIOOUT_DACSRR_OSR 0x80000000 +#define BV_AUDIOOUT_DACSRR_OSR__OSR6 0x0 +#define BV_AUDIOOUT_DACSRR_OSR__OSR12 0x1 #define BP_AUDIOOUT_DACSRR_BASEMULT 28 +#define BM_AUDIOOUT_DACSRR_BASEMULT 0x70000000 +#define BF_AUDIOOUT_DACSRR_BASEMULT(v) \ + (((v) << 28) & BM_AUDIOOUT_DACSRR_BASEMULT) +#define BV_AUDIOOUT_DACSRR_BASEMULT__SINGLE_RATE 0x1 +#define BV_AUDIOOUT_DACSRR_BASEMULT__DOUBLE_RATE 0x2 +#define BV_AUDIOOUT_DACSRR_BASEMULT__QUAD_RATE 0x4 +#define BM_AUDIOOUT_DACSRR_RSRVD2 0x08000000 +#define BP_AUDIOOUT_DACSRR_SRC_HOLD 24 +#define BM_AUDIOOUT_DACSRR_SRC_HOLD 0x07000000 +#define BF_AUDIOOUT_DACSRR_SRC_HOLD(v) \ + (((v) << 24) & BM_AUDIOOUT_DACSRR_SRC_HOLD) +#define BP_AUDIOOUT_DACSRR_RSRVD1 21 +#define BM_AUDIOOUT_DACSRR_RSRVD1 0x00E00000 +#define BF_AUDIOOUT_DACSRR_RSRVD1(v) \ + (((v) << 21) & BM_AUDIOOUT_DACSRR_RSRVD1) +#define BP_AUDIOOUT_DACSRR_SRC_INT 16 +#define BM_AUDIOOUT_DACSRR_SRC_INT 0x001F0000 +#define BF_AUDIOOUT_DACSRR_SRC_INT(v) \ + (((v) << 16) & BM_AUDIOOUT_DACSRR_SRC_INT) +#define BP_AUDIOOUT_DACSRR_RSRVD0 13 +#define BM_AUDIOOUT_DACSRR_RSRVD0 0x0000E000 +#define BF_AUDIOOUT_DACSRR_RSRVD0(v) \ + (((v) << 13) & BM_AUDIOOUT_DACSRR_RSRVD0) +#define BP_AUDIOOUT_DACSRR_SRC_FRAC 0 +#define BM_AUDIOOUT_DACSRR_SRC_FRAC 0x00001FFF +#define BF_AUDIOOUT_DACSRR_SRC_FRAC(v) \ + (((v) << 0) & BM_AUDIOOUT_DACSRR_SRC_FRAC) -#define HW_AUDIOOUT_DACVOLUME 0x30 -#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT 0x00000100 -#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT 0x01000000 +#define HW_AUDIOOUT_DACVOLUME (0x00000030) +#define HW_AUDIOOUT_DACVOLUME_SET (0x00000034) +#define HW_AUDIOOUT_DACVOLUME_CLR (0x00000038) +#define HW_AUDIOOUT_DACVOLUME_TOG (0x0000003c) +#define HW_AUDIOOUT_DACVOLUME_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME) +#define HW_AUDIOOUT_DACVOLUME_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_SET) +#define HW_AUDIOOUT_DACVOLUME_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_CLR) +#define HW_AUDIOOUT_DACVOLUME_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACVOLUME_TOG) + +#define BP_AUDIOOUT_DACVOLUME_RSRVD4 29 +#define BM_AUDIOOUT_DACVOLUME_RSRVD4 0xE0000000 +#define BF_AUDIOOUT_DACVOLUME_RSRVD4(v) \ + (((v) << 29) & BM_AUDIOOUT_DACVOLUME_RSRVD4) +#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_LEFT 0x10000000 +#define BP_AUDIOOUT_DACVOLUME_RSRVD3 26 +#define BM_AUDIOOUT_DACVOLUME_RSRVD3 0x0C000000 +#define BF_AUDIOOUT_DACVOLUME_RSRVD3(v) \ + (((v) << 26) & BM_AUDIOOUT_DACVOLUME_RSRVD3) #define BM_AUDIOOUT_DACVOLUME_EN_ZCD 0x02000000 - -#define HW_AUDIOOUT_DACDEBUG 0x40 - -#define HW_AUDIOOUT_HPVOL 0x50 -#define BM_AUDIOOUT_HPVOL_MUTE 0x01000000 +#define BM_AUDIOOUT_DACVOLUME_MUTE_LEFT 0x01000000 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_LEFT 16 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT 0x00FF0000 +#define BF_AUDIOOUT_DACVOLUME_VOLUME_LEFT(v) \ + (((v) << 16) & BM_AUDIOOUT_DACVOLUME_VOLUME_LEFT) +#define BP_AUDIOOUT_DACVOLUME_RSRVD2 13 +#define BM_AUDIOOUT_DACVOLUME_RSRVD2 0x0000E000 +#define BF_AUDIOOUT_DACVOLUME_RSRVD2(v) \ + (((v) << 13) & BM_AUDIOOUT_DACVOLUME_RSRVD2) +#define BM_AUDIOOUT_DACVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 +#define BP_AUDIOOUT_DACVOLUME_RSRVD1 9 +#define BM_AUDIOOUT_DACVOLUME_RSRVD1 0x00000E00 +#define BF_AUDIOOUT_DACVOLUME_RSRVD1(v) \ + (((v) << 9) & BM_AUDIOOUT_DACVOLUME_RSRVD1) +#define BM_AUDIOOUT_DACVOLUME_MUTE_RIGHT 0x00000100 +#define BP_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0 +#define BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT 0x000000FF +#define BF_AUDIOOUT_DACVOLUME_VOLUME_RIGHT(v) \ + (((v) << 0) & BM_AUDIOOUT_DACVOLUME_VOLUME_RIGHT) + +#define HW_AUDIOOUT_DACDEBUG (0x00000040) +#define HW_AUDIOOUT_DACDEBUG_SET (0x00000044) +#define HW_AUDIOOUT_DACDEBUG_CLR (0x00000048) +#define HW_AUDIOOUT_DACDEBUG_TOG (0x0000004c) +#define HW_AUDIOOUT_DACDEBUG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACDEBUG) +#define HW_AUDIOOUT_DACDEBUG_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACDEBUG_SET) +#define HW_AUDIOOUT_DACDEBUG_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACDEBUG_CLR) +#define HW_AUDIOOUT_DACDEBUG_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DACDEBUG_TOG) + +#define BM_AUDIOOUT_DACDEBUG_ENABLE_DACDMA 0x80000000 +#define BP_AUDIOOUT_DACDEBUG_RSRVD2 12 +#define BM_AUDIOOUT_DACDEBUG_RSRVD2 0x7FFFF000 +#define BF_AUDIOOUT_DACDEBUG_RSRVD2(v) \ + (((v) << 12) & BM_AUDIOOUT_DACDEBUG_RSRVD2) +#define BP_AUDIOOUT_DACDEBUG_RAM_SS 8 +#define BM_AUDIOOUT_DACDEBUG_RAM_SS 0x00000F00 +#define BF_AUDIOOUT_DACDEBUG_RAM_SS(v) \ + (((v) << 8) & BM_AUDIOOUT_DACDEBUG_RAM_SS) +#define BP_AUDIOOUT_DACDEBUG_RSRVD1 6 +#define BM_AUDIOOUT_DACDEBUG_RSRVD1 0x000000C0 +#define BF_AUDIOOUT_DACDEBUG_RSRVD1(v) \ + (((v) << 6) & BM_AUDIOOUT_DACDEBUG_RSRVD1) +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_CLK_CROSS 0x00000020 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_CLK_CROSS 0x00000010 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT1_HAND_SHAKE 0x00000008 +#define BM_AUDIOOUT_DACDEBUG_SET_INTERRUPT0_HAND_SHAKE 0x00000004 +#define BM_AUDIOOUT_DACDEBUG_DMA_PREQ 0x00000002 +#define BM_AUDIOOUT_DACDEBUG_FIFO_STATUS 0x00000001 + +#define HW_AUDIOOUT_HPVOL (0x00000050) +#define HW_AUDIOOUT_HPVOL_SET (0x00000054) +#define HW_AUDIOOUT_HPVOL_CLR (0x00000058) +#define HW_AUDIOOUT_HPVOL_TOG (0x0000005c) +#define HW_AUDIOOUT_HPVOL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL) +#define HW_AUDIOOUT_HPVOL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_SET) +#define HW_AUDIOOUT_HPVOL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_CLR) +#define HW_AUDIOOUT_HPVOL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_HPVOL_TOG) + +#define BP_AUDIOOUT_HPVOL_RSRVD5 29 +#define BM_AUDIOOUT_HPVOL_RSRVD5 0xE0000000 +#define BF_AUDIOOUT_HPVOL_RSRVD5(v) \ + (((v) << 29) & BM_AUDIOOUT_HPVOL_RSRVD5) +#define BM_AUDIOOUT_HPVOL_VOLUME_UPDATE_PENDING 0x10000000 +#define BP_AUDIOOUT_HPVOL_RSRVD4 26 +#define BM_AUDIOOUT_HPVOL_RSRVD4 0x0C000000 +#define BF_AUDIOOUT_HPVOL_RSRVD4(v) \ + (((v) << 26) & BM_AUDIOOUT_HPVOL_RSRVD4) #define BM_AUDIOOUT_HPVOL_EN_MSTR_ZCD 0x02000000 - -#define HW_AUDIOOUT_PWRDN 0x70 -#define BM_AUDIOOUT_PWRDN_HEADPHONE 0x00000001 -#define BP_AUDIOOUT_PWRDN_HEADPHONE 0 -#define BM_AUDIOOUT_PWRDN_CAPLESS 0x00000010 -#define BM_AUDIOOUT_PWRDN_ADC 0x00000100 -#define BM_AUDIOOUT_PWRDN_DAC 0x00001000 -#define BM_AUDIOOUT_PWRDN_RIGHT_ADC 0x00010000 +#define BM_AUDIOOUT_HPVOL_MUTE 0x01000000 +#define BP_AUDIOOUT_HPVOL_RSRVD3 17 +#define BM_AUDIOOUT_HPVOL_RSRVD3 0x00FE0000 +#define BF_AUDIOOUT_HPVOL_RSRVD3(v) \ + (((v) << 17) & BM_AUDIOOUT_HPVOL_RSRVD3) +#define BM_AUDIOOUT_HPVOL_SELECT 0x00010000 +#define BM_AUDIOOUT_HPVOL_RSRVD2 0x00008000 +#define BP_AUDIOOUT_HPVOL_VOL_LEFT 8 +#define BM_AUDIOOUT_HPVOL_VOL_LEFT 0x00007F00 +#define BF_AUDIOOUT_HPVOL_VOL_LEFT(v) \ + (((v) << 8) & BM_AUDIOOUT_HPVOL_VOL_LEFT) +#define BM_AUDIOOUT_HPVOL_RSRVD1 0x00000080 +#define BP_AUDIOOUT_HPVOL_VOL_RIGHT 0 +#define BM_AUDIOOUT_HPVOL_VOL_RIGHT 0x0000007F +#define BF_AUDIOOUT_HPVOL_VOL_RIGHT(v) \ + (((v) << 0) & BM_AUDIOOUT_HPVOL_VOL_RIGHT) + +#define HW_AUDIOOUT_RESERVED (0x00000060) +#define HW_AUDIOOUT_RESERVED_SET (0x00000064) +#define HW_AUDIOOUT_RESERVED_CLR (0x00000068) +#define HW_AUDIOOUT_RESERVED_TOG (0x0000006c) +#define HW_AUDIOOUT_RESERVED_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_RESERVED) +#define HW_AUDIOOUT_RESERVED_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_RESERVED_SET) +#define HW_AUDIOOUT_RESERVED_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_RESERVED_CLR) +#define HW_AUDIOOUT_RESERVED_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_RESERVED_TOG) + +#define BP_AUDIOOUT_RESERVED_RSRVD1 0 +#define BM_AUDIOOUT_RESERVED_RSRVD1 0xFFFFFFFF +#define BF_AUDIOOUT_RESERVED_RSRVD1(v) (v) + +#define HW_AUDIOOUT_PWRDN (0x00000070) +#define HW_AUDIOOUT_PWRDN_SET (0x00000074) +#define HW_AUDIOOUT_PWRDN_CLR (0x00000078) +#define HW_AUDIOOUT_PWRDN_TOG (0x0000007c) +#define HW_AUDIOOUT_PWRDN_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN) +#define HW_AUDIOOUT_PWRDN_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_SET) +#define HW_AUDIOOUT_PWRDN_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_CLR) +#define HW_AUDIOOUT_PWRDN_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_PWRDN_TOG) + +#define BP_AUDIOOUT_PWRDN_RSRVD7 25 +#define BM_AUDIOOUT_PWRDN_RSRVD7 0xFE000000 +#define BF_AUDIOOUT_PWRDN_RSRVD7(v) \ + (((v) << 25) & BM_AUDIOOUT_PWRDN_RSRVD7) #define BM_AUDIOOUT_PWRDN_SPEAKER 0x01000000 +#define BP_AUDIOOUT_PWRDN_RSRVD6 21 +#define BM_AUDIOOUT_PWRDN_RSRVD6 0x00E00000 +#define BF_AUDIOOUT_PWRDN_RSRVD6(v) \ + (((v) << 21) & BM_AUDIOOUT_PWRDN_RSRVD6) +#define BM_AUDIOOUT_PWRDN_SELFBIAS 0x00100000 +#define BP_AUDIOOUT_PWRDN_RSRVD5 17 +#define BM_AUDIOOUT_PWRDN_RSRVD5 0x000E0000 +#define BF_AUDIOOUT_PWRDN_RSRVD5(v) \ + (((v) << 17) & BM_AUDIOOUT_PWRDN_RSRVD5) +#define BM_AUDIOOUT_PWRDN_RIGHT_ADC 0x00010000 +#define BP_AUDIOOUT_PWRDN_RSRVD4 13 +#define BM_AUDIOOUT_PWRDN_RSRVD4 0x0000E000 +#define BF_AUDIOOUT_PWRDN_RSRVD4(v) \ + (((v) << 13) & BM_AUDIOOUT_PWRDN_RSRVD4) +#define BM_AUDIOOUT_PWRDN_DAC 0x00001000 +#define BP_AUDIOOUT_PWRDN_RSRVD3 9 +#define BM_AUDIOOUT_PWRDN_RSRVD3 0x00000E00 +#define BF_AUDIOOUT_PWRDN_RSRVD3(v) \ + (((v) << 9) & BM_AUDIOOUT_PWRDN_RSRVD3) +#define BM_AUDIOOUT_PWRDN_ADC 0x00000100 +#define BP_AUDIOOUT_PWRDN_RSRVD2 5 +#define BM_AUDIOOUT_PWRDN_RSRVD2 0x000000E0 +#define BF_AUDIOOUT_PWRDN_RSRVD2(v) \ + (((v) << 5) & BM_AUDIOOUT_PWRDN_RSRVD2) +#define BM_AUDIOOUT_PWRDN_CAPLESS 0x00000010 +#define BP_AUDIOOUT_PWRDN_RSRVD1 1 +#define BM_AUDIOOUT_PWRDN_RSRVD1 0x0000000E +#define BF_AUDIOOUT_PWRDN_RSRVD1(v) \ + (((v) << 1) & BM_AUDIOOUT_PWRDN_RSRVD1) +#define BM_AUDIOOUT_PWRDN_HEADPHONE 0x00000001 -#define HW_AUDIOOUT_REFCTRL 0x80 -#define BM_AUDIOOUT_REFCTRL_VAG_VAL 0x000000F0 -#define BP_AUDIOOUT_REFCTRL_VAG_VAL 4 -#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL 0x00000F00 -#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL 8 -#define BM_AUDIOOUT_REFCTRL_ADJ_VAG 0x00001000 -#define BM_AUDIOOUT_REFCTRL_ADJ_ADC 0x00002000 -#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL 0x00030000 -#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL 16 -#define BM_AUDIOOUT_REFCTRL_LOW_PWR 0x00080000 -#define BM_AUDIOOUT_REFCTRL_VBG_ADJ 0x00700000 -#define BP_AUDIOOUT_REFCTRL_VBG_ADJ 20 -#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS 0x01000000 +#define HW_AUDIOOUT_REFCTRL (0x00000080) +#define HW_AUDIOOUT_REFCTRL_SET (0x00000084) +#define HW_AUDIOOUT_REFCTRL_CLR (0x00000088) +#define HW_AUDIOOUT_REFCTRL_TOG (0x0000008c) +#define HW_AUDIOOUT_REFCTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL) +#define HW_AUDIOOUT_REFCTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_SET) +#define HW_AUDIOOUT_REFCTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_CLR) +#define HW_AUDIOOUT_REFCTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_REFCTRL_TOG) + +#define BP_AUDIOOUT_REFCTRL_RSRVD4 27 +#define BM_AUDIOOUT_REFCTRL_RSRVD4 0xF8000000 +#define BF_AUDIOOUT_REFCTRL_RSRVD4(v) \ + (((v) << 27) & BM_AUDIOOUT_REFCTRL_RSRVD4) +#define BM_AUDIOOUT_REFCTRL_FASTSETTLING 0x04000000 #define BM_AUDIOOUT_REFCTRL_RAISE_REF 0x02000000 - -#define HW_AUDIOOUT_ANACTRL 0x90 -#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB 0x00000010 +#define BM_AUDIOOUT_REFCTRL_XTAL_BGR_BIAS 0x01000000 +#define BM_AUDIOOUT_REFCTRL_RSRVD3 0x00800000 +#define BP_AUDIOOUT_REFCTRL_VBG_ADJ 20 +#define BM_AUDIOOUT_REFCTRL_VBG_ADJ 0x00700000 +#define BF_AUDIOOUT_REFCTRL_VBG_ADJ(v) \ + (((v) << 20) & BM_AUDIOOUT_REFCTRL_VBG_ADJ) +#define BM_AUDIOOUT_REFCTRL_LOW_PWR 0x00080000 +#define BM_AUDIOOUT_REFCTRL_LW_REF 0x00040000 +#define BP_AUDIOOUT_REFCTRL_BIAS_CTRL 16 +#define BM_AUDIOOUT_REFCTRL_BIAS_CTRL 0x00030000 +#define BF_AUDIOOUT_REFCTRL_BIAS_CTRL(v) \ + (((v) << 16) & BM_AUDIOOUT_REFCTRL_BIAS_CTRL) +#define BM_AUDIOOUT_REFCTRL_RSRVD2 0x00008000 +#define BM_AUDIOOUT_REFCTRL_VDDXTAL_TO_VDDD 0x00004000 +#define BM_AUDIOOUT_REFCTRL_ADJ_ADC 0x00002000 +#define BM_AUDIOOUT_REFCTRL_ADJ_VAG 0x00001000 +#define BP_AUDIOOUT_REFCTRL_ADC_REFVAL 8 +#define BM_AUDIOOUT_REFCTRL_ADC_REFVAL 0x00000F00 +#define BF_AUDIOOUT_REFCTRL_ADC_REFVAL(v) \ + (((v) << 8) & BM_AUDIOOUT_REFCTRL_ADC_REFVAL) +#define BP_AUDIOOUT_REFCTRL_VAG_VAL 4 +#define BM_AUDIOOUT_REFCTRL_VAG_VAL 0x000000F0 +#define BF_AUDIOOUT_REFCTRL_VAG_VAL(v) \ + (((v) << 4) & BM_AUDIOOUT_REFCTRL_VAG_VAL) +#define BM_AUDIOOUT_REFCTRL_RSRVD1 0x00000008 +#define BP_AUDIOOUT_REFCTRL_DAC_ADJ 0 +#define BM_AUDIOOUT_REFCTRL_DAC_ADJ 0x00000007 +#define BF_AUDIOOUT_REFCTRL_DAC_ADJ(v) \ + (((v) << 0) & BM_AUDIOOUT_REFCTRL_DAC_ADJ) + +#define HW_AUDIOOUT_ANACTRL (0x00000090) +#define HW_AUDIOOUT_ANACTRL_SET (0x00000094) +#define HW_AUDIOOUT_ANACTRL_CLR (0x00000098) +#define HW_AUDIOOUT_ANACTRL_TOG (0x0000009c) +#define HW_AUDIOOUT_ANACTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL) +#define HW_AUDIOOUT_ANACTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_SET) +#define HW_AUDIOOUT_ANACTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_CLR) +#define HW_AUDIOOUT_ANACTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACTRL_TOG) + +#define BP_AUDIOOUT_ANACTRL_RSRVD8 29 +#define BM_AUDIOOUT_ANACTRL_RSRVD8 0xE0000000 +#define BF_AUDIOOUT_ANACTRL_RSRVD8(v) \ + (((v) << 29) & BM_AUDIOOUT_ANACTRL_RSRVD8) +#define BM_AUDIOOUT_ANACTRL_SHORT_CM_STS 0x10000000 +#define BP_AUDIOOUT_ANACTRL_RSRVD7 25 +#define BM_AUDIOOUT_ANACTRL_RSRVD7 0x0E000000 +#define BF_AUDIOOUT_ANACTRL_RSRVD7(v) \ + (((v) << 25) & BM_AUDIOOUT_ANACTRL_RSRVD7) +#define BM_AUDIOOUT_ANACTRL_SHORT_LR_STS 0x01000000 +#define BP_AUDIOOUT_ANACTRL_RSRVD6 22 +#define BM_AUDIOOUT_ANACTRL_RSRVD6 0x00C00000 +#define BF_AUDIOOUT_ANACTRL_RSRVD6(v) \ + (((v) << 22) & BM_AUDIOOUT_ANACTRL_RSRVD6) +#define BP_AUDIOOUT_ANACTRL_SHORTMODE_CM 20 +#define BM_AUDIOOUT_ANACTRL_SHORTMODE_CM 0x00300000 +#define BF_AUDIOOUT_ANACTRL_SHORTMODE_CM(v) \ + (((v) << 20) & BM_AUDIOOUT_ANACTRL_SHORTMODE_CM) +#define BM_AUDIOOUT_ANACTRL_RSRVD5 0x00080000 +#define BP_AUDIOOUT_ANACTRL_SHORTMODE_LR 17 +#define BM_AUDIOOUT_ANACTRL_SHORTMODE_LR 0x00060000 +#define BF_AUDIOOUT_ANACTRL_SHORTMODE_LR(v) \ + (((v) << 17) & BM_AUDIOOUT_ANACTRL_SHORTMODE_LR) +#define BP_AUDIOOUT_ANACTRL_RSRVD4 15 +#define BM_AUDIOOUT_ANACTRL_RSRVD4 0x00018000 +#define BF_AUDIOOUT_ANACTRL_RSRVD4(v) \ + (((v) << 15) & BM_AUDIOOUT_ANACTRL_RSRVD4) +#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJL 12 +#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL 0x00007000 +#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJL(v) \ + (((v) << 12) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJL) +#define BM_AUDIOOUT_ANACTRL_RSRVD3 0x00000800 +#define BP_AUDIOOUT_ANACTRL_SHORT_LVLADJR 8 +#define BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR 0x00000700 +#define BF_AUDIOOUT_ANACTRL_SHORT_LVLADJR(v) \ + (((v) << 8) & BM_AUDIOOUT_ANACTRL_SHORT_LVLADJR) +#define BP_AUDIOOUT_ANACTRL_RSRVD2 6 +#define BM_AUDIOOUT_ANACTRL_RSRVD2 0x000000C0 +#define BF_AUDIOOUT_ANACTRL_RSRVD2(v) \ + (((v) << 6) & BM_AUDIOOUT_ANACTRL_RSRVD2) #define BM_AUDIOOUT_ANACTRL_HP_HOLD_GND 0x00000020 - -#define HW_AUDIOOUT_TEST 0xA0 -#define BM_AUDIOOUT_TEST_HP_I1_ADJ 0x00C00000 +#define BM_AUDIOOUT_ANACTRL_HP_CLASSAB 0x00000010 +#define BP_AUDIOOUT_ANACTRL_RSRVD1 0 +#define BM_AUDIOOUT_ANACTRL_RSRVD1 0x0000000F +#define BF_AUDIOOUT_ANACTRL_RSRVD1(v) \ + (((v) << 0) & BM_AUDIOOUT_ANACTRL_RSRVD1) + +#define HW_AUDIOOUT_TEST (0x000000a0) +#define HW_AUDIOOUT_TEST_SET (0x000000a4) +#define HW_AUDIOOUT_TEST_CLR (0x000000a8) +#define HW_AUDIOOUT_TEST_TOG (0x000000ac) +#define HW_AUDIOOUT_TEST_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST) +#define HW_AUDIOOUT_TEST_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST_SET) +#define HW_AUDIOOUT_TEST_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST_CLR) +#define HW_AUDIOOUT_TEST_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_TEST_TOG) + +#define BM_AUDIOOUT_TEST_RSRVD4 0x80000000 +#define BP_AUDIOOUT_TEST_HP_ANTIPOP 28 +#define BM_AUDIOOUT_TEST_HP_ANTIPOP 0x70000000 +#define BF_AUDIOOUT_TEST_HP_ANTIPOP(v) \ + (((v) << 28) & BM_AUDIOOUT_TEST_HP_ANTIPOP) +#define BM_AUDIOOUT_TEST_RSRVD3 0x08000000 +#define BM_AUDIOOUT_TEST_TM_ADCIN_TOHP 0x04000000 +#define BM_AUDIOOUT_TEST_TM_LOOP 0x02000000 +#define BM_AUDIOOUT_TEST_TM_HPCOMMON 0x01000000 #define BP_AUDIOOUT_TEST_HP_I1_ADJ 22 +#define BM_AUDIOOUT_TEST_HP_I1_ADJ 0x00C00000 +#define BF_AUDIOOUT_TEST_HP_I1_ADJ(v) \ + (((v) << 22) & BM_AUDIOOUT_TEST_HP_I1_ADJ) +#define BP_AUDIOOUT_TEST_HP_IALL_ADJ 20 +#define BM_AUDIOOUT_TEST_HP_IALL_ADJ 0x00300000 +#define BF_AUDIOOUT_TEST_HP_IALL_ADJ(v) \ + (((v) << 20) & BM_AUDIOOUT_TEST_HP_IALL_ADJ) +#define BP_AUDIOOUT_TEST_RSRVD2 14 +#define BM_AUDIOOUT_TEST_RSRVD2 0x000FC000 +#define BF_AUDIOOUT_TEST_RSRVD2(v) \ + (((v) << 14) & BM_AUDIOOUT_TEST_RSRVD2) +#define BM_AUDIOOUT_TEST_VAG_CLASSA 0x00002000 +#define BM_AUDIOOUT_TEST_VAG_DOUBLE_I 0x00001000 +#define BP_AUDIOOUT_TEST_RSRVD1 4 +#define BM_AUDIOOUT_TEST_RSRVD1 0x00000FF0 +#define BF_AUDIOOUT_TEST_RSRVD1(v) \ + (((v) << 4) & BM_AUDIOOUT_TEST_RSRVD1) +#define BM_AUDIOOUT_TEST_ADCTODAC_LOOP 0x00000008 +#define BM_AUDIOOUT_TEST_DAC_CLASSA 0x00000004 +#define BM_AUDIOOUT_TEST_DAC_DOUBLE_I 0x00000002 +#define BM_AUDIOOUT_TEST_DAC_DIS_RTZ 0x00000001 + +#define HW_AUDIOOUT_BISTCTRL (0x000000b0) +#define HW_AUDIOOUT_BISTCTRL_SET (0x000000b4) +#define HW_AUDIOOUT_BISTCTRL_CLR (0x000000b8) +#define HW_AUDIOOUT_BISTCTRL_TOG (0x000000bc) +#define HW_AUDIOOUT_BISTCTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTCTRL) +#define HW_AUDIOOUT_BISTCTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTCTRL_SET) +#define HW_AUDIOOUT_BISTCTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTCTRL_CLR) +#define HW_AUDIOOUT_BISTCTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTCTRL_TOG) + +#define BP_AUDIOOUT_BISTCTRL_RSVD0 4 +#define BM_AUDIOOUT_BISTCTRL_RSVD0 0xFFFFFFF0 +#define BF_AUDIOOUT_BISTCTRL_RSVD0(v) \ + (((v) << 4) & BM_AUDIOOUT_BISTCTRL_RSVD0) +#define BM_AUDIOOUT_BISTCTRL_FAIL 0x00000008 +#define BM_AUDIOOUT_BISTCTRL_PASS 0x00000004 +#define BM_AUDIOOUT_BISTCTRL_DONE 0x00000002 +#define BM_AUDIOOUT_BISTCTRL_START 0x00000001 + +#define HW_AUDIOOUT_BISTSTAT0 (0x000000c0) +#define HW_AUDIOOUT_BISTSTAT0_SET (0x000000c4) +#define HW_AUDIOOUT_BISTSTAT0_CLR (0x000000c8) +#define HW_AUDIOOUT_BISTSTAT0_TOG (0x000000cc) +#define HW_AUDIOOUT_BISTSTAT0_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT0) +#define HW_AUDIOOUT_BISTSTAT0_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT0_SET) +#define HW_AUDIOOUT_BISTSTAT0_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT0_CLR) +#define HW_AUDIOOUT_BISTSTAT0_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT0_TOG) + +#define BP_AUDIOOUT_BISTSTAT0_RSVD0 24 +#define BM_AUDIOOUT_BISTSTAT0_RSVD0 0xFF000000 +#define BF_AUDIOOUT_BISTSTAT0_RSVD0(v) \ + (((v) << 24) & BM_AUDIOOUT_BISTSTAT0_RSVD0) +#define BP_AUDIOOUT_BISTSTAT0_DATA 0 +#define BM_AUDIOOUT_BISTSTAT0_DATA 0x00FFFFFF +#define BF_AUDIOOUT_BISTSTAT0_DATA(v) \ + (((v) << 0) & BM_AUDIOOUT_BISTSTAT0_DATA) + +#define HW_AUDIOOUT_BISTSTAT1 (0x000000d0) +#define HW_AUDIOOUT_BISTSTAT1_SET (0x000000d4) +#define HW_AUDIOOUT_BISTSTAT1_CLR (0x000000d8) +#define HW_AUDIOOUT_BISTSTAT1_TOG (0x000000dc) +#define HW_AUDIOOUT_BISTSTAT1_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT1) +#define HW_AUDIOOUT_BISTSTAT1_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT1_SET) +#define HW_AUDIOOUT_BISTSTAT1_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT1_CLR) +#define HW_AUDIOOUT_BISTSTAT1_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_BISTSTAT1_TOG) + +#define BP_AUDIOOUT_BISTSTAT1_RSVD1 29 +#define BM_AUDIOOUT_BISTSTAT1_RSVD1 0xE0000000 +#define BF_AUDIOOUT_BISTSTAT1_RSVD1(v) \ + (((v) << 29) & BM_AUDIOOUT_BISTSTAT1_RSVD1) +#define BP_AUDIOOUT_BISTSTAT1_STATE 24 +#define BM_AUDIOOUT_BISTSTAT1_STATE 0x1F000000 +#define BF_AUDIOOUT_BISTSTAT1_STATE(v) \ + (((v) << 24) & BM_AUDIOOUT_BISTSTAT1_STATE) +#define BP_AUDIOOUT_BISTSTAT1_RSVD0 8 +#define BM_AUDIOOUT_BISTSTAT1_RSVD0 0x00FFFF00 +#define BF_AUDIOOUT_BISTSTAT1_RSVD0(v) \ + (((v) << 8) & BM_AUDIOOUT_BISTSTAT1_RSVD0) +#define BP_AUDIOOUT_BISTSTAT1_ADDR 0 +#define BM_AUDIOOUT_BISTSTAT1_ADDR 0x000000FF +#define BF_AUDIOOUT_BISTSTAT1_ADDR(v) \ + (((v) << 0) & BM_AUDIOOUT_BISTSTAT1_ADDR) + +#define HW_AUDIOOUT_ANACLKCTRL (0x000000e0) +#define HW_AUDIOOUT_ANACLKCTRL_SET (0x000000e4) +#define HW_AUDIOOUT_ANACLKCTRL_CLR (0x000000e8) +#define HW_AUDIOOUT_ANACLKCTRL_TOG (0x000000ec) +#define HW_AUDIOOUT_ANACLKCTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL) +#define HW_AUDIOOUT_ANACLKCTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL_SET) +#define HW_AUDIOOUT_ANACLKCTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL_CLR) +#define HW_AUDIOOUT_ANACLKCTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_ANACLKCTRL_TOG) -#define HW_AUDIOOUT_BISTCTRL 0xB0 - -#define HW_AUDIOOUT_BISTSTAT0 0xC0 - -#define HW_AUDIOOUT_BISTSTAT1 0xD0 - -#define HW_AUDIOOUT_ANACLKCTRL 0xE0 #define BM_AUDIOOUT_ANACLKCTRL_CLKGATE 0x80000000 - -#define HW_AUDIOOUT_DATA 0xF0 - -#define HW_AUDIOOUT_SPEAKERCTRL 0x100 +#define BP_AUDIOOUT_ANACLKCTRL_RSRVD3 5 +#define BM_AUDIOOUT_ANACLKCTRL_RSRVD3 0x7FFFFFE0 +#define BF_AUDIOOUT_ANACLKCTRL_RSRVD3(v) \ + (((v) << 5) & BM_AUDIOOUT_ANACLKCTRL_RSRVD3) +#define BM_AUDIOOUT_ANACLKCTRL_INVERT_DACCLK 0x00000010 +#define BM_AUDIOOUT_ANACLKCTRL_RSRVD2 0x00000008 +#define BP_AUDIOOUT_ANACLKCTRL_DACDIV 0 +#define BM_AUDIOOUT_ANACLKCTRL_DACDIV 0x00000007 +#define BF_AUDIOOUT_ANACLKCTRL_DACDIV(v) \ + (((v) << 0) & BM_AUDIOOUT_ANACLKCTRL_DACDIV) + +#define HW_AUDIOOUT_DATA (0x000000f0) +#define HW_AUDIOOUT_DATA_SET (0x000000f4) +#define HW_AUDIOOUT_DATA_CLR (0x000000f8) +#define HW_AUDIOOUT_DATA_TOG (0x000000fc) +#define HW_AUDIOOUT_DATA_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DATA) +#define HW_AUDIOOUT_DATA_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DATA_SET) +#define HW_AUDIOOUT_DATA_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DATA_CLR) +#define HW_AUDIOOUT_DATA_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_DATA_TOG) + +#define BP_AUDIOOUT_DATA_HIGH 16 +#define BM_AUDIOOUT_DATA_HIGH 0xFFFF0000 +#define BF_AUDIOOUT_DATA_HIGH(v) \ + (((v) << 16) & BM_AUDIOOUT_DATA_HIGH) +#define BP_AUDIOOUT_DATA_LOW 0 +#define BM_AUDIOOUT_DATA_LOW 0x0000FFFF +#define BF_AUDIOOUT_DATA_LOW(v) \ + (((v) << 0) & BM_AUDIOOUT_DATA_LOW) + +#define HW_AUDIOOUT_SPEAKERCTRL (0x00000100) +#define HW_AUDIOOUT_SPEAKERCTRL_SET (0x00000104) +#define HW_AUDIOOUT_SPEAKERCTRL_CLR (0x00000108) +#define HW_AUDIOOUT_SPEAKERCTRL_TOG (0x0000010c) +#define HW_AUDIOOUT_SPEAKERCTRL_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL) +#define HW_AUDIOOUT_SPEAKERCTRL_SET_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_SET) +#define HW_AUDIOOUT_SPEAKERCTRL_CLR_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_CLR) +#define HW_AUDIOOUT_SPEAKERCTRL_TOG_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_SPEAKERCTRL_TOG) + +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD2 25 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD2 0xFE000000 +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD2(v) \ + (((v) << 25) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD2) #define BM_AUDIOOUT_SPEAKERCTRL_MUTE 0x01000000 - -#define HW_AUDIOOUT_VERSION 0x200 +#define BP_AUDIOOUT_SPEAKERCTRL_I1_ADJ 22 +#define BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ 0x00C00000 +#define BF_AUDIOOUT_SPEAKERCTRL_I1_ADJ(v) \ + (((v) << 22) & BM_AUDIOOUT_SPEAKERCTRL_I1_ADJ) +#define BP_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 20 +#define BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ 0x00300000 +#define BF_AUDIOOUT_SPEAKERCTRL_IALL_ADJ(v) \ + (((v) << 20) & BM_AUDIOOUT_SPEAKERCTRL_IALL_ADJ) +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD1 16 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD1 0x000F0000 +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD1(v) \ + (((v) << 16) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD1) +#define BP_AUDIOOUT_SPEAKERCTRL_POSDRIVER 14 +#define BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER 0x0000C000 +#define BF_AUDIOOUT_SPEAKERCTRL_POSDRIVER(v) \ + (((v) << 14) & BM_AUDIOOUT_SPEAKERCTRL_POSDRIVER) +#define BP_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 12 +#define BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER 0x00003000 +#define BF_AUDIOOUT_SPEAKERCTRL_NEGDRIVER(v) \ + (((v) << 12) & BM_AUDIOOUT_SPEAKERCTRL_NEGDRIVER) +#define BP_AUDIOOUT_SPEAKERCTRL_RSRVD0 0 +#define BM_AUDIOOUT_SPEAKERCTRL_RSRVD0 0x00000FFF +#define BF_AUDIOOUT_SPEAKERCTRL_RSRVD0(v) \ + (((v) << 0) & BM_AUDIOOUT_SPEAKERCTRL_RSRVD0) + +#define HW_AUDIOOUT_VERSION (0x00000200) +#define HW_AUDIOOUT_VERSION_ADDR \ + (REGS_AUDIOOUT_BASE + HW_AUDIOOUT_VERSION) + +#define BP_AUDIOOUT_VERSION_MAJOR 24 +#define BM_AUDIOOUT_VERSION_MAJOR 0xFF000000 +#define BF_AUDIOOUT_VERSION_MAJOR(v) \ + (((v) << 24) & BM_AUDIOOUT_VERSION_MAJOR) +#define BP_AUDIOOUT_VERSION_MINOR 16 +#define BM_AUDIOOUT_VERSION_MINOR 0x00FF0000 +#define BF_AUDIOOUT_VERSION_MINOR(v) \ + (((v) << 16) & BM_AUDIOOUT_VERSION_MINOR) +#define BP_AUDIOOUT_VERSION_STEP 0 +#define BM_AUDIOOUT_VERSION_STEP 0x0000FFFF +#define BF_AUDIOOUT_VERSION_STEP(v) \ + (((v) << 0) & BM_AUDIOOUT_VERSION_STEP) +#endif /* __ARCH_ARM___AUDIOOUT_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-digctl.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-digctl.h @@ -1,7 +1,7 @@ /* - * stmp378x: DIGCTL register definitions + * STMP DIGCTL Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,22 +17,946 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_DIGCTL_BASE (STMP3XXX_REGS_BASE + 0x1C000) -#define REGS_DIGCTL_PHYS 0x8001C000 -#define REGS_DIGCTL_SIZE 0x2000 -#define HW_DIGCTL_CTRL 0x0 +#ifndef __ARCH_ARM___DIGCTL_H +#define __ARCH_ARM___DIGCTL_H 1 + +#define REGS_DIGCTL_BASE (STMP3XXX_REGS_BASE + 0x1c000) +#define REGS_DIGCTL_PHYS (0x8001C000) +#define REGS_DIGCTL_SIZE 0x00002000 + +#define HW_DIGCTL_CTRL (0x00000000) +#define HW_DIGCTL_CTRL_SET (0x00000004) +#define HW_DIGCTL_CTRL_CLR (0x00000008) +#define HW_DIGCTL_CTRL_TOG (0x0000000c) +#define HW_DIGCTL_CTRL_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_CTRL) +#define HW_DIGCTL_CTRL_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_CTRL_SET) +#define HW_DIGCTL_CTRL_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_CTRL_CLR) +#define HW_DIGCTL_CTRL_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_CTRL_TOG) + +#define BM_DIGCTL_CTRL_RSVD3 0x80000000 +#define BM_DIGCTL_CTRL_XTAL24M_GATE 0x40000000 +#define BM_DIGCTL_CTRL_TRAP_IRQ 0x20000000 +#define BP_DIGCTL_CTRL_RSVD2 27 +#define BM_DIGCTL_CTRL_RSVD2 0x18000000 +#define BF_DIGCTL_CTRL_RSVD2(v) \ + (((v) << 27) & BM_DIGCTL_CTRL_RSVD2) +#define BM_DIGCTL_CTRL_CACHE_BIST_TMODE 0x04000000 +#define BM_DIGCTL_CTRL_LCD_BIST_CLKEN 0x02000000 +#define BM_DIGCTL_CTRL_LCD_BIST_START 0x01000000 +#define BM_DIGCTL_CTRL_DCP_BIST_CLKEN 0x00800000 +#define BM_DIGCTL_CTRL_DCP_BIST_START 0x00400000 +#define BM_DIGCTL_CTRL_ARM_BIST_CLKEN 0x00200000 +#define BM_DIGCTL_CTRL_USB_TESTMODE 0x00100000 +#define BM_DIGCTL_CTRL_ANALOG_TESTMODE 0x00080000 +#define BM_DIGCTL_CTRL_DIGITAL_TESTMODE 0x00040000 +#define BM_DIGCTL_CTRL_ARM_BIST_START 0x00020000 +#define BM_DIGCTL_CTRL_UART_LOOPBACK 0x00010000 +#define BV_DIGCTL_CTRL_UART_LOOPBACK__NORMAL 0x0 +#define BV_DIGCTL_CTRL_UART_LOOPBACK__LOOPIT 0x1 +#define BM_DIGCTL_CTRL_SAIF_LOOPBACK 0x00008000 +#define BV_DIGCTL_CTRL_SAIF_LOOPBACK__NORMAL 0x0 +#define BV_DIGCTL_CTRL_SAIF_LOOPBACK__LOOPIT 0x1 +#define BP_DIGCTL_CTRL_SAIF_CLKMUX_SEL 13 +#define BM_DIGCTL_CTRL_SAIF_CLKMUX_SEL 0x00006000 +#define BF_DIGCTL_CTRL_SAIF_CLKMUX_SEL(v) \ + (((v) << 13) & BM_DIGCTL_CTRL_SAIF_CLKMUX_SEL) +#define BV_DIGCTL_CTRL_SAIF_CLKMUX_SEL__MBL_CLK_OUT 0x0 +#define BV_DIGCTL_CTRL_SAIF_CLKMUX_SEL__BL_CLK_OUT 0x1 +#define BV_DIGCTL_CTRL_SAIF_CLKMUX_SEL__M_CLK_OUT_BL_CLK_IN 0x2 +#define BV_DIGCTL_CTRL_SAIF_CLKMUX_SEL__BL_CLK_IN 0x3 +#define BM_DIGCTL_CTRL_SAIF_CLKMST_SEL 0x00001000 +#define BV_DIGCTL_CTRL_SAIF_CLKMST_SEL__SAIF1_MST 0x0 +#define BV_DIGCTL_CTRL_SAIF_CLKMST_SEL__SAIF2_MST 0x1 +#define BM_DIGCTL_CTRL_SAIF_ALT_BITCLK_SEL 0x00000800 +#define BM_DIGCTL_CTRL_RSVD1 0x00000400 +#define BM_DIGCTL_CTRL_SY_ENDIAN 0x00000200 +#define BM_DIGCTL_CTRL_SY_SFTRST 0x00000100 +#define BM_DIGCTL_CTRL_SY_CLKGATE 0x00000080 +#define BM_DIGCTL_CTRL_USE_SERIAL_JTAG 0x00000040 +#define BV_DIGCTL_CTRL_USE_SERIAL_JTAG__OLD_JTAG 0x0 +#define BV_DIGCTL_CTRL_USE_SERIAL_JTAG__SERIAL_JTAG 0x1 +#define BM_DIGCTL_CTRL_TRAP_IN_RANGE 0x00000020 +#define BM_DIGCTL_CTRL_TRAP_ENABLE 0x00000010 +#define BM_DIGCTL_CTRL_DEBUG_DISABLE 0x00000008 #define BM_DIGCTL_CTRL_USB_CLKGATE 0x00000004 +#define BV_DIGCTL_CTRL_USB_CLKGATE__RUN 0x0 +#define BV_DIGCTL_CTRL_USB_CLKGATE__NO_CLKS 0x1 +#define BM_DIGCTL_CTRL_JTAG_SHIELD 0x00000002 +#define BV_DIGCTL_CTRL_JTAG_SHIELD__NORMAL 0x0 +#define BV_DIGCTL_CTRL_JTAG_SHIELD__SHIELDS_UP 0x1 +#define BM_DIGCTL_CTRL_LATCH_ENTROPY 0x00000001 -#define HW_DIGCTL_ARMCACHE 0x2B0 -#define BM_DIGCTL_ARMCACHE_ITAG_SS 0x00000003 -#define BP_DIGCTL_ARMCACHE_ITAG_SS 0 -#define BM_DIGCTL_ARMCACHE_DTAG_SS 0x00000030 -#define BP_DIGCTL_ARMCACHE_DTAG_SS 4 -#define BM_DIGCTL_ARMCACHE_CACHE_SS 0x00000300 -#define BP_DIGCTL_ARMCACHE_CACHE_SS 8 -#define BM_DIGCTL_ARMCACHE_DRTY_SS 0x00003000 -#define BP_DIGCTL_ARMCACHE_DRTY_SS 12 -#define BM_DIGCTL_ARMCACHE_VALID_SS 0x00030000 +#define HW_DIGCTL_STATUS (0x00000010) +#define HW_DIGCTL_STATUS_SET (0x00000014) +#define HW_DIGCTL_STATUS_CLR (0x00000018) +#define HW_DIGCTL_STATUS_TOG (0x0000001c) +#define HW_DIGCTL_STATUS_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_STATUS) +#define HW_DIGCTL_STATUS_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_STATUS_SET) +#define HW_DIGCTL_STATUS_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_STATUS_CLR) +#define HW_DIGCTL_STATUS_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_STATUS_TOG) + +#define BM_DIGCTL_STATUS_USB_HS_PRESENT 0x80000000 +#define BM_DIGCTL_STATUS_USB_OTG_PRESENT 0x40000000 +#define BM_DIGCTL_STATUS_USB_HOST_PRESENT 0x20000000 +#define BM_DIGCTL_STATUS_USB_DEVICE_PRESENT 0x10000000 +#define BP_DIGCTL_STATUS_RSVD2 11 +#define BM_DIGCTL_STATUS_RSVD2 0x0FFFF800 +#define BF_DIGCTL_STATUS_RSVD2(v) \ + (((v) << 11) & BM_DIGCTL_STATUS_RSVD2) +#define BM_DIGCTL_STATUS_DCP_BIST_FAIL 0x00000400 +#define BM_DIGCTL_STATUS_DCP_BIST_PASS 0x00000200 +#define BM_DIGCTL_STATUS_DCP_BIST_DONE 0x00000100 +#define BM_DIGCTL_STATUS_LCD_BIST_FAIL 0x00000080 +#define BM_DIGCTL_STATUS_LCD_BIST_PASS 0x00000040 +#define BM_DIGCTL_STATUS_LCD_BIST_DONE 0x00000020 +#define BM_DIGCTL_STATUS_JTAG_IN_USE 0x00000010 +#define BP_DIGCTL_STATUS_PACKAGE_TYPE 1 +#define BM_DIGCTL_STATUS_PACKAGE_TYPE 0x0000000E +#define BF_DIGCTL_STATUS_PACKAGE_TYPE(v) \ + (((v) << 1) & BM_DIGCTL_STATUS_PACKAGE_TYPE) +#define BM_DIGCTL_STATUS_WRITTEN 0x00000001 + +#define HW_DIGCTL_HCLKCOUNT (0x00000020) +#define HW_DIGCTL_HCLKCOUNT_SET (0x00000024) +#define HW_DIGCTL_HCLKCOUNT_CLR (0x00000028) +#define HW_DIGCTL_HCLKCOUNT_TOG (0x0000002c) +#define HW_DIGCTL_HCLKCOUNT_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_HCLKCOUNT) +#define HW_DIGCTL_HCLKCOUNT_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_HCLKCOUNT_SET) +#define HW_DIGCTL_HCLKCOUNT_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_HCLKCOUNT_CLR) +#define HW_DIGCTL_HCLKCOUNT_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_HCLKCOUNT_TOG) + +#define BP_DIGCTL_HCLKCOUNT_COUNT 0 +#define BM_DIGCTL_HCLKCOUNT_COUNT 0xFFFFFFFF +#define BF_DIGCTL_HCLKCOUNT_COUNT(v) (v) + +#define HW_DIGCTL_RAMCTRL (0x00000030) +#define HW_DIGCTL_RAMCTRL_SET (0x00000034) +#define HW_DIGCTL_RAMCTRL_CLR (0x00000038) +#define HW_DIGCTL_RAMCTRL_TOG (0x0000003c) +#define HW_DIGCTL_RAMCTRL_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMCTRL) +#define HW_DIGCTL_RAMCTRL_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMCTRL_SET) +#define HW_DIGCTL_RAMCTRL_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMCTRL_CLR) +#define HW_DIGCTL_RAMCTRL_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMCTRL_TOG) + +#define BP_DIGCTL_RAMCTRL_RSVD1 12 +#define BM_DIGCTL_RAMCTRL_RSVD1 0xFFFFF000 +#define BF_DIGCTL_RAMCTRL_RSVD1(v) \ + (((v) << 12) & BM_DIGCTL_RAMCTRL_RSVD1) +#define BP_DIGCTL_RAMCTRL_SPEED_SELECT 8 +#define BM_DIGCTL_RAMCTRL_SPEED_SELECT 0x00000F00 +#define BF_DIGCTL_RAMCTRL_SPEED_SELECT(v) \ + (((v) << 8) & BM_DIGCTL_RAMCTRL_SPEED_SELECT) +#define BP_DIGCTL_RAMCTRL_RSVD0 1 +#define BM_DIGCTL_RAMCTRL_RSVD0 0x000000FE +#define BF_DIGCTL_RAMCTRL_RSVD0(v) \ + (((v) << 1) & BM_DIGCTL_RAMCTRL_RSVD0) +#define BM_DIGCTL_RAMCTRL_RAM_REPAIR_EN 0x00000001 + +#define HW_DIGCTL_RAMREPAIR (0x00000040) +#define HW_DIGCTL_RAMREPAIR_SET (0x00000044) +#define HW_DIGCTL_RAMREPAIR_CLR (0x00000048) +#define HW_DIGCTL_RAMREPAIR_TOG (0x0000004c) +#define HW_DIGCTL_RAMREPAIR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMREPAIR) +#define HW_DIGCTL_RAMREPAIR_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMREPAIR_SET) +#define HW_DIGCTL_RAMREPAIR_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMREPAIR_CLR) +#define HW_DIGCTL_RAMREPAIR_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_RAMREPAIR_TOG) + +#define BP_DIGCTL_RAMREPAIR_RSVD1 16 +#define BM_DIGCTL_RAMREPAIR_RSVD1 0xFFFF0000 +#define BF_DIGCTL_RAMREPAIR_RSVD1(v) \ + (((v) << 16) & BM_DIGCTL_RAMREPAIR_RSVD1) +#define BP_DIGCTL_RAMREPAIR_ADDR 0 +#define BM_DIGCTL_RAMREPAIR_ADDR 0x0000FFFF +#define BF_DIGCTL_RAMREPAIR_ADDR(v) \ + (((v) << 0) & BM_DIGCTL_RAMREPAIR_ADDR) + +#define HW_DIGCTL_ROMCTRL (0x00000050) +#define HW_DIGCTL_ROMCTRL_SET (0x00000054) +#define HW_DIGCTL_ROMCTRL_CLR (0x00000058) +#define HW_DIGCTL_ROMCTRL_TOG (0x0000005c) +#define HW_DIGCTL_ROMCTRL_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ROMCTRL) +#define HW_DIGCTL_ROMCTRL_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ROMCTRL_SET) +#define HW_DIGCTL_ROMCTRL_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ROMCTRL_CLR) +#define HW_DIGCTL_ROMCTRL_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ROMCTRL_TOG) + +#define BP_DIGCTL_ROMCTRL_RSVD0 4 +#define BM_DIGCTL_ROMCTRL_RSVD0 0xFFFFFFF0 +#define BF_DIGCTL_ROMCTRL_RSVD0(v) \ + (((v) << 4) & BM_DIGCTL_ROMCTRL_RSVD0) +#define BP_DIGCTL_ROMCTRL_RD_MARGIN 0 +#define BM_DIGCTL_ROMCTRL_RD_MARGIN 0x0000000F +#define BF_DIGCTL_ROMCTRL_RD_MARGIN(v) \ + (((v) << 0) & BM_DIGCTL_ROMCTRL_RD_MARGIN) + +#define HW_DIGCTL_WRITEONCE (0x00000060) +#define HW_DIGCTL_WRITEONCE_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_WRITEONCE) + +#define BP_DIGCTL_WRITEONCE_BITS 0 +#define BM_DIGCTL_WRITEONCE_BITS 0xFFFFFFFF +#define BF_DIGCTL_WRITEONCE_BITS(v) (v) + +#define HW_DIGCTL_ENTROPY (0x00000090) +#define HW_DIGCTL_ENTROPY_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ENTROPY) + +#define BP_DIGCTL_ENTROPY_VALUE 0 +#define BM_DIGCTL_ENTROPY_VALUE 0xFFFFFFFF +#define BF_DIGCTL_ENTROPY_VALUE(v) (v) + +#define HW_DIGCTL_ENTROPY_LATCHED (0x000000a0) +#define HW_DIGCTL_ENTROPY_LATCHED_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ENTROPY_LATCHED) + +#define BP_DIGCTL_ENTROPY_LATCHED_VALUE 0 +#define BM_DIGCTL_ENTROPY_LATCHED_VALUE 0xFFFFFFFF +#define BF_DIGCTL_ENTROPY_LATCHED_VALUE(v) (v) + +#define HW_DIGCTL_SJTAGDBG (0x000000b0) +#define HW_DIGCTL_SJTAGDBG_SET (0x000000b4) +#define HW_DIGCTL_SJTAGDBG_CLR (0x000000b8) +#define HW_DIGCTL_SJTAGDBG_TOG (0x000000bc) +#define HW_DIGCTL_SJTAGDBG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SJTAGDBG) +#define HW_DIGCTL_SJTAGDBG_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SJTAGDBG_SET) +#define HW_DIGCTL_SJTAGDBG_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SJTAGDBG_CLR) +#define HW_DIGCTL_SJTAGDBG_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SJTAGDBG_TOG) + +#define BP_DIGCTL_SJTAGDBG_RSVD2 27 +#define BM_DIGCTL_SJTAGDBG_RSVD2 0xF8000000 +#define BF_DIGCTL_SJTAGDBG_RSVD2(v) \ + (((v) << 27) & BM_DIGCTL_SJTAGDBG_RSVD2) +#define BP_DIGCTL_SJTAGDBG_SJTAG_STATE 16 +#define BM_DIGCTL_SJTAGDBG_SJTAG_STATE 0x07FF0000 +#define BF_DIGCTL_SJTAGDBG_SJTAG_STATE(v) \ + (((v) << 16) & BM_DIGCTL_SJTAGDBG_SJTAG_STATE) +#define BP_DIGCTL_SJTAGDBG_RSVD1 11 +#define BM_DIGCTL_SJTAGDBG_RSVD1 0x0000F800 +#define BF_DIGCTL_SJTAGDBG_RSVD1(v) \ + (((v) << 11) & BM_DIGCTL_SJTAGDBG_RSVD1) +#define BM_DIGCTL_SJTAGDBG_SJTAG_TDO 0x00000400 +#define BM_DIGCTL_SJTAGDBG_SJTAG_TDI 0x00000200 +#define BM_DIGCTL_SJTAGDBG_SJTAG_MODE 0x00000100 +#define BP_DIGCTL_SJTAGDBG_DELAYED_ACTIVE 4 +#define BM_DIGCTL_SJTAGDBG_DELAYED_ACTIVE 0x000000F0 +#define BF_DIGCTL_SJTAGDBG_DELAYED_ACTIVE(v) \ + (((v) << 4) & BM_DIGCTL_SJTAGDBG_DELAYED_ACTIVE) +#define BM_DIGCTL_SJTAGDBG_ACTIVE 0x00000008 +#define BM_DIGCTL_SJTAGDBG_SJTAG_PIN_STATE 0x00000004 +#define BM_DIGCTL_SJTAGDBG_SJTAG_DEBUG_DATA 0x00000002 +#define BM_DIGCTL_SJTAGDBG_SJTAG_DEBUG_OE 0x00000001 + +#define HW_DIGCTL_MICROSECONDS (0x000000c0) +#define HW_DIGCTL_MICROSECONDS_SET (0x000000c4) +#define HW_DIGCTL_MICROSECONDS_CLR (0x000000c8) +#define HW_DIGCTL_MICROSECONDS_TOG (0x000000cc) +#define HW_DIGCTL_MICROSECONDS_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS) +#define HW_DIGCTL_MICROSECONDS_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS_SET) +#define HW_DIGCTL_MICROSECONDS_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS_CLR) +#define HW_DIGCTL_MICROSECONDS_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS_TOG) + +#define BP_DIGCTL_MICROSECONDS_VALUE 0 +#define BM_DIGCTL_MICROSECONDS_VALUE 0xFFFFFFFF +#define BF_DIGCTL_MICROSECONDS_VALUE(v) (v) + +#define HW_DIGCTL_DBGRD (0x000000d0) +#define HW_DIGCTL_DBGRD_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_DBGRD) + +#define BP_DIGCTL_DBGRD_COMPLEMENT 0 +#define BM_DIGCTL_DBGRD_COMPLEMENT 0xFFFFFFFF +#define BF_DIGCTL_DBGRD_COMPLEMENT(v) (v) + +#define HW_DIGCTL_DBG (0x000000e0) +#define HW_DIGCTL_DBG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_DBG) + +#define BP_DIGCTL_DBG_VALUE 0 +#define BM_DIGCTL_DBG_VALUE 0xFFFFFFFF +#define BF_DIGCTL_DBG_VALUE(v) (v) + +#define HW_DIGCTL_OCRAM_BIST_CSR (0x000000f0) +#define HW_DIGCTL_OCRAM_BIST_CSR_SET (0x000000f4) +#define HW_DIGCTL_OCRAM_BIST_CSR_CLR (0x000000f8) +#define HW_DIGCTL_OCRAM_BIST_CSR_TOG (0x000000fc) +#define HW_DIGCTL_OCRAM_BIST_CSR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_BIST_CSR) +#define HW_DIGCTL_OCRAM_BIST_CSR_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_BIST_CSR_SET) +#define HW_DIGCTL_OCRAM_BIST_CSR_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_BIST_CSR_CLR) +#define HW_DIGCTL_OCRAM_BIST_CSR_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_BIST_CSR_TOG) + +#define BP_DIGCTL_OCRAM_BIST_CSR_RSVD1 11 +#define BM_DIGCTL_OCRAM_BIST_CSR_RSVD1 0xFFFFF800 +#define BF_DIGCTL_OCRAM_BIST_CSR_RSVD1(v) \ + (((v) << 11) & BM_DIGCTL_OCRAM_BIST_CSR_RSVD1) +#define BM_DIGCTL_OCRAM_BIST_CSR_BIST_DEBUG_MODE 0x00000400 +#define BM_DIGCTL_OCRAM_BIST_CSR_BIST_DATA_CHANGE 0x00000200 +#define BM_DIGCTL_OCRAM_BIST_CSR_BIST_CLKEN 0x00000100 +#define BP_DIGCTL_OCRAM_BIST_CSR_RSVD0 4 +#define BM_DIGCTL_OCRAM_BIST_CSR_RSVD0 0x000000F0 +#define BF_DIGCTL_OCRAM_BIST_CSR_RSVD0(v) \ + (((v) << 4) & BM_DIGCTL_OCRAM_BIST_CSR_RSVD0) +#define BM_DIGCTL_OCRAM_BIST_CSR_FAIL 0x00000008 +#define BM_DIGCTL_OCRAM_BIST_CSR_PASS 0x00000004 +#define BM_DIGCTL_OCRAM_BIST_CSR_DONE 0x00000002 +#define BM_DIGCTL_OCRAM_BIST_CSR_START 0x00000001 + +#define HW_DIGCTL_OCRAM_STATUS0 (0x00000110) +#define HW_DIGCTL_OCRAM_STATUS0_SET (0x00000114) +#define HW_DIGCTL_OCRAM_STATUS0_CLR (0x00000118) +#define HW_DIGCTL_OCRAM_STATUS0_TOG (0x0000011c) +#define HW_DIGCTL_OCRAM_STATUS0_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS0) +#define HW_DIGCTL_OCRAM_STATUS0_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS0_SET) +#define HW_DIGCTL_OCRAM_STATUS0_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS0_CLR) +#define HW_DIGCTL_OCRAM_STATUS0_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS0_TOG) + +#define BP_DIGCTL_OCRAM_STATUS0_FAILDATA00 0 +#define BM_DIGCTL_OCRAM_STATUS0_FAILDATA00 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS0_FAILDATA00(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS1 (0x00000120) +#define HW_DIGCTL_OCRAM_STATUS1_SET (0x00000124) +#define HW_DIGCTL_OCRAM_STATUS1_CLR (0x00000128) +#define HW_DIGCTL_OCRAM_STATUS1_TOG (0x0000012c) +#define HW_DIGCTL_OCRAM_STATUS1_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS1) +#define HW_DIGCTL_OCRAM_STATUS1_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS1_SET) +#define HW_DIGCTL_OCRAM_STATUS1_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS1_CLR) +#define HW_DIGCTL_OCRAM_STATUS1_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS1_TOG) + +#define BP_DIGCTL_OCRAM_STATUS1_FAILDATA01 0 +#define BM_DIGCTL_OCRAM_STATUS1_FAILDATA01 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS1_FAILDATA01(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS2 (0x00000130) +#define HW_DIGCTL_OCRAM_STATUS2_SET (0x00000134) +#define HW_DIGCTL_OCRAM_STATUS2_CLR (0x00000138) +#define HW_DIGCTL_OCRAM_STATUS2_TOG (0x0000013c) +#define HW_DIGCTL_OCRAM_STATUS2_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS2) +#define HW_DIGCTL_OCRAM_STATUS2_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS2_SET) +#define HW_DIGCTL_OCRAM_STATUS2_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS2_CLR) +#define HW_DIGCTL_OCRAM_STATUS2_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS2_TOG) + +#define BP_DIGCTL_OCRAM_STATUS2_FAILDATA10 0 +#define BM_DIGCTL_OCRAM_STATUS2_FAILDATA10 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS2_FAILDATA10(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS3 (0x00000140) +#define HW_DIGCTL_OCRAM_STATUS3_SET (0x00000144) +#define HW_DIGCTL_OCRAM_STATUS3_CLR (0x00000148) +#define HW_DIGCTL_OCRAM_STATUS3_TOG (0x0000014c) +#define HW_DIGCTL_OCRAM_STATUS3_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS3) +#define HW_DIGCTL_OCRAM_STATUS3_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS3_SET) +#define HW_DIGCTL_OCRAM_STATUS3_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS3_CLR) +#define HW_DIGCTL_OCRAM_STATUS3_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS3_TOG) + +#define BP_DIGCTL_OCRAM_STATUS3_FAILDATA11 0 +#define BM_DIGCTL_OCRAM_STATUS3_FAILDATA11 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS3_FAILDATA11(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS4 (0x00000150) +#define HW_DIGCTL_OCRAM_STATUS4_SET (0x00000154) +#define HW_DIGCTL_OCRAM_STATUS4_CLR (0x00000158) +#define HW_DIGCTL_OCRAM_STATUS4_TOG (0x0000015c) +#define HW_DIGCTL_OCRAM_STATUS4_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS4) +#define HW_DIGCTL_OCRAM_STATUS4_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS4_SET) +#define HW_DIGCTL_OCRAM_STATUS4_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS4_CLR) +#define HW_DIGCTL_OCRAM_STATUS4_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS4_TOG) + +#define BP_DIGCTL_OCRAM_STATUS4_FAILDATA20 0 +#define BM_DIGCTL_OCRAM_STATUS4_FAILDATA20 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS4_FAILDATA20(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS5 (0x00000160) +#define HW_DIGCTL_OCRAM_STATUS5_SET (0x00000164) +#define HW_DIGCTL_OCRAM_STATUS5_CLR (0x00000168) +#define HW_DIGCTL_OCRAM_STATUS5_TOG (0x0000016c) +#define HW_DIGCTL_OCRAM_STATUS5_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS5) +#define HW_DIGCTL_OCRAM_STATUS5_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS5_SET) +#define HW_DIGCTL_OCRAM_STATUS5_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS5_CLR) +#define HW_DIGCTL_OCRAM_STATUS5_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS5_TOG) + +#define BP_DIGCTL_OCRAM_STATUS5_FAILDATA21 0 +#define BM_DIGCTL_OCRAM_STATUS5_FAILDATA21 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS5_FAILDATA21(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS6 (0x00000170) +#define HW_DIGCTL_OCRAM_STATUS6_SET (0x00000174) +#define HW_DIGCTL_OCRAM_STATUS6_CLR (0x00000178) +#define HW_DIGCTL_OCRAM_STATUS6_TOG (0x0000017c) +#define HW_DIGCTL_OCRAM_STATUS6_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS6) +#define HW_DIGCTL_OCRAM_STATUS6_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS6_SET) +#define HW_DIGCTL_OCRAM_STATUS6_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS6_CLR) +#define HW_DIGCTL_OCRAM_STATUS6_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS6_TOG) + +#define BP_DIGCTL_OCRAM_STATUS6_FAILDATA30 0 +#define BM_DIGCTL_OCRAM_STATUS6_FAILDATA30 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS6_FAILDATA30(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS7 (0x00000180) +#define HW_DIGCTL_OCRAM_STATUS7_SET (0x00000184) +#define HW_DIGCTL_OCRAM_STATUS7_CLR (0x00000188) +#define HW_DIGCTL_OCRAM_STATUS7_TOG (0x0000018c) +#define HW_DIGCTL_OCRAM_STATUS7_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS7) +#define HW_DIGCTL_OCRAM_STATUS7_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS7_SET) +#define HW_DIGCTL_OCRAM_STATUS7_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS7_CLR) +#define HW_DIGCTL_OCRAM_STATUS7_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS7_TOG) + +#define BP_DIGCTL_OCRAM_STATUS7_FAILDATA31 0 +#define BM_DIGCTL_OCRAM_STATUS7_FAILDATA31 0xFFFFFFFF +#define BF_DIGCTL_OCRAM_STATUS7_FAILDATA31(v) (v) + +#define HW_DIGCTL_OCRAM_STATUS8 (0x00000190) +#define HW_DIGCTL_OCRAM_STATUS8_SET (0x00000194) +#define HW_DIGCTL_OCRAM_STATUS8_CLR (0x00000198) +#define HW_DIGCTL_OCRAM_STATUS8_TOG (0x0000019c) +#define HW_DIGCTL_OCRAM_STATUS8_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS8) +#define HW_DIGCTL_OCRAM_STATUS8_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS8_SET) +#define HW_DIGCTL_OCRAM_STATUS8_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS8_CLR) +#define HW_DIGCTL_OCRAM_STATUS8_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS8_TOG) + +#define BP_DIGCTL_OCRAM_STATUS8_RSVD3 29 +#define BM_DIGCTL_OCRAM_STATUS8_RSVD3 0xE0000000 +#define BF_DIGCTL_OCRAM_STATUS8_RSVD3(v) \ + (((v) << 29) & BM_DIGCTL_OCRAM_STATUS8_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS8_FAILADDR01 16 +#define BM_DIGCTL_OCRAM_STATUS8_FAILADDR01 0x1FFF0000 +#define BF_DIGCTL_OCRAM_STATUS8_FAILADDR01(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS8_FAILADDR01) +#define BP_DIGCTL_OCRAM_STATUS8_RSVD2 13 +#define BM_DIGCTL_OCRAM_STATUS8_RSVD2 0x0000E000 +#define BF_DIGCTL_OCRAM_STATUS8_RSVD2(v) \ + (((v) << 13) & BM_DIGCTL_OCRAM_STATUS8_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS8_FAILADDR00 0 +#define BM_DIGCTL_OCRAM_STATUS8_FAILADDR00 0x00001FFF +#define BF_DIGCTL_OCRAM_STATUS8_FAILADDR00(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS8_FAILADDR00) + +#define HW_DIGCTL_OCRAM_STATUS9 (0x000001a0) +#define HW_DIGCTL_OCRAM_STATUS9_SET (0x000001a4) +#define HW_DIGCTL_OCRAM_STATUS9_CLR (0x000001a8) +#define HW_DIGCTL_OCRAM_STATUS9_TOG (0x000001ac) +#define HW_DIGCTL_OCRAM_STATUS9_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS9) +#define HW_DIGCTL_OCRAM_STATUS9_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS9_SET) +#define HW_DIGCTL_OCRAM_STATUS9_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS9_CLR) +#define HW_DIGCTL_OCRAM_STATUS9_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS9_TOG) + +#define BP_DIGCTL_OCRAM_STATUS9_RSVD3 29 +#define BM_DIGCTL_OCRAM_STATUS9_RSVD3 0xE0000000 +#define BF_DIGCTL_OCRAM_STATUS9_RSVD3(v) \ + (((v) << 29) & BM_DIGCTL_OCRAM_STATUS9_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS9_FAILADDR11 16 +#define BM_DIGCTL_OCRAM_STATUS9_FAILADDR11 0x1FFF0000 +#define BF_DIGCTL_OCRAM_STATUS9_FAILADDR11(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS9_FAILADDR11) +#define BP_DIGCTL_OCRAM_STATUS9_RSVD2 13 +#define BM_DIGCTL_OCRAM_STATUS9_RSVD2 0x0000E000 +#define BF_DIGCTL_OCRAM_STATUS9_RSVD2(v) \ + (((v) << 13) & BM_DIGCTL_OCRAM_STATUS9_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS9_FAILADDR10 0 +#define BM_DIGCTL_OCRAM_STATUS9_FAILADDR10 0x00001FFF +#define BF_DIGCTL_OCRAM_STATUS9_FAILADDR10(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS9_FAILADDR10) + +#define HW_DIGCTL_OCRAM_STATUS10 (0x000001b0) +#define HW_DIGCTL_OCRAM_STATUS10_SET (0x000001b4) +#define HW_DIGCTL_OCRAM_STATUS10_CLR (0x000001b8) +#define HW_DIGCTL_OCRAM_STATUS10_TOG (0x000001bc) +#define HW_DIGCTL_OCRAM_STATUS10_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS10) +#define HW_DIGCTL_OCRAM_STATUS10_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS10_SET) +#define HW_DIGCTL_OCRAM_STATUS10_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS10_CLR) +#define HW_DIGCTL_OCRAM_STATUS10_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS10_TOG) + +#define BP_DIGCTL_OCRAM_STATUS10_RSVD3 29 +#define BM_DIGCTL_OCRAM_STATUS10_RSVD3 0xE0000000 +#define BF_DIGCTL_OCRAM_STATUS10_RSVD3(v) \ + (((v) << 29) & BM_DIGCTL_OCRAM_STATUS10_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS10_FAILADDR21 16 +#define BM_DIGCTL_OCRAM_STATUS10_FAILADDR21 0x1FFF0000 +#define BF_DIGCTL_OCRAM_STATUS10_FAILADDR21(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS10_FAILADDR21) +#define BP_DIGCTL_OCRAM_STATUS10_RSVD2 13 +#define BM_DIGCTL_OCRAM_STATUS10_RSVD2 0x0000E000 +#define BF_DIGCTL_OCRAM_STATUS10_RSVD2(v) \ + (((v) << 13) & BM_DIGCTL_OCRAM_STATUS10_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS10_FAILADDR20 0 +#define BM_DIGCTL_OCRAM_STATUS10_FAILADDR20 0x00001FFF +#define BF_DIGCTL_OCRAM_STATUS10_FAILADDR20(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS10_FAILADDR20) + +#define HW_DIGCTL_OCRAM_STATUS11 (0x000001c0) +#define HW_DIGCTL_OCRAM_STATUS11_SET (0x000001c4) +#define HW_DIGCTL_OCRAM_STATUS11_CLR (0x000001c8) +#define HW_DIGCTL_OCRAM_STATUS11_TOG (0x000001cc) +#define HW_DIGCTL_OCRAM_STATUS11_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS11) +#define HW_DIGCTL_OCRAM_STATUS11_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS11_SET) +#define HW_DIGCTL_OCRAM_STATUS11_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS11_CLR) +#define HW_DIGCTL_OCRAM_STATUS11_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS11_TOG) + +#define BP_DIGCTL_OCRAM_STATUS11_RSVD3 29 +#define BM_DIGCTL_OCRAM_STATUS11_RSVD3 0xE0000000 +#define BF_DIGCTL_OCRAM_STATUS11_RSVD3(v) \ + (((v) << 29) & BM_DIGCTL_OCRAM_STATUS11_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS11_FAILADDR31 16 +#define BM_DIGCTL_OCRAM_STATUS11_FAILADDR31 0x1FFF0000 +#define BF_DIGCTL_OCRAM_STATUS11_FAILADDR31(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS11_FAILADDR31) +#define BP_DIGCTL_OCRAM_STATUS11_RSVD2 13 +#define BM_DIGCTL_OCRAM_STATUS11_RSVD2 0x0000E000 +#define BF_DIGCTL_OCRAM_STATUS11_RSVD2(v) \ + (((v) << 13) & BM_DIGCTL_OCRAM_STATUS11_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS11_FAILADDR30 0 +#define BM_DIGCTL_OCRAM_STATUS11_FAILADDR30 0x00001FFF +#define BF_DIGCTL_OCRAM_STATUS11_FAILADDR30(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS11_FAILADDR30) + +#define HW_DIGCTL_OCRAM_STATUS12 (0x000001d0) +#define HW_DIGCTL_OCRAM_STATUS12_SET (0x000001d4) +#define HW_DIGCTL_OCRAM_STATUS12_CLR (0x000001d8) +#define HW_DIGCTL_OCRAM_STATUS12_TOG (0x000001dc) +#define HW_DIGCTL_OCRAM_STATUS12_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS12) +#define HW_DIGCTL_OCRAM_STATUS12_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS12_SET) +#define HW_DIGCTL_OCRAM_STATUS12_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS12_CLR) +#define HW_DIGCTL_OCRAM_STATUS12_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS12_TOG) + +#define BP_DIGCTL_OCRAM_STATUS12_RSVD3 28 +#define BM_DIGCTL_OCRAM_STATUS12_RSVD3 0xF0000000 +#define BF_DIGCTL_OCRAM_STATUS12_RSVD3(v) \ + (((v) << 28) & BM_DIGCTL_OCRAM_STATUS12_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS12_FAILSTATE11 24 +#define BM_DIGCTL_OCRAM_STATUS12_FAILSTATE11 0x0F000000 +#define BF_DIGCTL_OCRAM_STATUS12_FAILSTATE11(v) \ + (((v) << 24) & BM_DIGCTL_OCRAM_STATUS12_FAILSTATE11) +#define BP_DIGCTL_OCRAM_STATUS12_RSVD2 20 +#define BM_DIGCTL_OCRAM_STATUS12_RSVD2 0x00F00000 +#define BF_DIGCTL_OCRAM_STATUS12_RSVD2(v) \ + (((v) << 20) & BM_DIGCTL_OCRAM_STATUS12_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS12_FAILSTATE10 16 +#define BM_DIGCTL_OCRAM_STATUS12_FAILSTATE10 0x000F0000 +#define BF_DIGCTL_OCRAM_STATUS12_FAILSTATE10(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS12_FAILSTATE10) +#define BP_DIGCTL_OCRAM_STATUS12_RSVD1 12 +#define BM_DIGCTL_OCRAM_STATUS12_RSVD1 0x0000F000 +#define BF_DIGCTL_OCRAM_STATUS12_RSVD1(v) \ + (((v) << 12) & BM_DIGCTL_OCRAM_STATUS12_RSVD1) +#define BP_DIGCTL_OCRAM_STATUS12_FAILSTATE01 8 +#define BM_DIGCTL_OCRAM_STATUS12_FAILSTATE01 0x00000F00 +#define BF_DIGCTL_OCRAM_STATUS12_FAILSTATE01(v) \ + (((v) << 8) & BM_DIGCTL_OCRAM_STATUS12_FAILSTATE01) +#define BP_DIGCTL_OCRAM_STATUS12_RSVD0 4 +#define BM_DIGCTL_OCRAM_STATUS12_RSVD0 0x000000F0 +#define BF_DIGCTL_OCRAM_STATUS12_RSVD0(v) \ + (((v) << 4) & BM_DIGCTL_OCRAM_STATUS12_RSVD0) +#define BP_DIGCTL_OCRAM_STATUS12_FAILSTATE00 0 +#define BM_DIGCTL_OCRAM_STATUS12_FAILSTATE00 0x0000000F +#define BF_DIGCTL_OCRAM_STATUS12_FAILSTATE00(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS12_FAILSTATE00) + +#define HW_DIGCTL_OCRAM_STATUS13 (0x000001e0) +#define HW_DIGCTL_OCRAM_STATUS13_SET (0x000001e4) +#define HW_DIGCTL_OCRAM_STATUS13_CLR (0x000001e8) +#define HW_DIGCTL_OCRAM_STATUS13_TOG (0x000001ec) +#define HW_DIGCTL_OCRAM_STATUS13_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS13) +#define HW_DIGCTL_OCRAM_STATUS13_SET_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS13_SET) +#define HW_DIGCTL_OCRAM_STATUS13_CLR_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS13_CLR) +#define HW_DIGCTL_OCRAM_STATUS13_TOG_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_OCRAM_STATUS13_TOG) + +#define BP_DIGCTL_OCRAM_STATUS13_RSVD3 28 +#define BM_DIGCTL_OCRAM_STATUS13_RSVD3 0xF0000000 +#define BF_DIGCTL_OCRAM_STATUS13_RSVD3(v) \ + (((v) << 28) & BM_DIGCTL_OCRAM_STATUS13_RSVD3) +#define BP_DIGCTL_OCRAM_STATUS13_FAILSTATE31 24 +#define BM_DIGCTL_OCRAM_STATUS13_FAILSTATE31 0x0F000000 +#define BF_DIGCTL_OCRAM_STATUS13_FAILSTATE31(v) \ + (((v) << 24) & BM_DIGCTL_OCRAM_STATUS13_FAILSTATE31) +#define BP_DIGCTL_OCRAM_STATUS13_RSVD2 20 +#define BM_DIGCTL_OCRAM_STATUS13_RSVD2 0x00F00000 +#define BF_DIGCTL_OCRAM_STATUS13_RSVD2(v) \ + (((v) << 20) & BM_DIGCTL_OCRAM_STATUS13_RSVD2) +#define BP_DIGCTL_OCRAM_STATUS13_FAILSTATE30 16 +#define BM_DIGCTL_OCRAM_STATUS13_FAILSTATE30 0x000F0000 +#define BF_DIGCTL_OCRAM_STATUS13_FAILSTATE30(v) \ + (((v) << 16) & BM_DIGCTL_OCRAM_STATUS13_FAILSTATE30) +#define BP_DIGCTL_OCRAM_STATUS13_RSVD1 12 +#define BM_DIGCTL_OCRAM_STATUS13_RSVD1 0x0000F000 +#define BF_DIGCTL_OCRAM_STATUS13_RSVD1(v) \ + (((v) << 12) & BM_DIGCTL_OCRAM_STATUS13_RSVD1) +#define BP_DIGCTL_OCRAM_STATUS13_FAILSTATE21 8 +#define BM_DIGCTL_OCRAM_STATUS13_FAILSTATE21 0x00000F00 +#define BF_DIGCTL_OCRAM_STATUS13_FAILSTATE21(v) \ + (((v) << 8) & BM_DIGCTL_OCRAM_STATUS13_FAILSTATE21) +#define BP_DIGCTL_OCRAM_STATUS13_RSVD0 4 +#define BM_DIGCTL_OCRAM_STATUS13_RSVD0 0x000000F0 +#define BF_DIGCTL_OCRAM_STATUS13_RSVD0(v) \ + (((v) << 4) & BM_DIGCTL_OCRAM_STATUS13_RSVD0) +#define BP_DIGCTL_OCRAM_STATUS13_FAILSTATE20 0 +#define BM_DIGCTL_OCRAM_STATUS13_FAILSTATE20 0x0000000F +#define BF_DIGCTL_OCRAM_STATUS13_FAILSTATE20(v) \ + (((v) << 0) & BM_DIGCTL_OCRAM_STATUS13_FAILSTATE20) + +#define HW_DIGCTL_SCRATCH0 (0x00000290) +#define HW_DIGCTL_SCRATCH0_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SCRATCH0) + +#define BP_DIGCTL_SCRATCH0_PTR 0 +#define BM_DIGCTL_SCRATCH0_PTR 0xFFFFFFFF +#define BF_DIGCTL_SCRATCH0_PTR(v) (v) + +#define HW_DIGCTL_SCRATCH1 (0x000002a0) +#define HW_DIGCTL_SCRATCH1_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SCRATCH1) + +#define BP_DIGCTL_SCRATCH1_PTR 0 +#define BM_DIGCTL_SCRATCH1_PTR 0xFFFFFFFF +#define BF_DIGCTL_SCRATCH1_PTR(v) (v) + +#define HW_DIGCTL_ARMCACHE (0x000002b0) +#define HW_DIGCTL_ARMCACHE_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_ARMCACHE) + +#define BP_DIGCTL_ARMCACHE_RSVD4 18 +#define BM_DIGCTL_ARMCACHE_RSVD4 0xFFFC0000 +#define BF_DIGCTL_ARMCACHE_RSVD4(v) \ + (((v) << 18) & BM_DIGCTL_ARMCACHE_RSVD4) #define BP_DIGCTL_ARMCACHE_VALID_SS 16 +#define BM_DIGCTL_ARMCACHE_VALID_SS 0x00030000 +#define BF_DIGCTL_ARMCACHE_VALID_SS(v) \ + (((v) << 16) & BM_DIGCTL_ARMCACHE_VALID_SS) +#define BP_DIGCTL_ARMCACHE_RSVD3 14 +#define BM_DIGCTL_ARMCACHE_RSVD3 0x0000C000 +#define BF_DIGCTL_ARMCACHE_RSVD3(v) \ + (((v) << 14) & BM_DIGCTL_ARMCACHE_RSVD3) +#define BP_DIGCTL_ARMCACHE_DRTY_SS 12 +#define BM_DIGCTL_ARMCACHE_DRTY_SS 0x00003000 +#define BF_DIGCTL_ARMCACHE_DRTY_SS(v) \ + (((v) << 12) & BM_DIGCTL_ARMCACHE_DRTY_SS) +#define BP_DIGCTL_ARMCACHE_RSVD2 10 +#define BM_DIGCTL_ARMCACHE_RSVD2 0x00000C00 +#define BF_DIGCTL_ARMCACHE_RSVD2(v) \ + (((v) << 10) & BM_DIGCTL_ARMCACHE_RSVD2) +#define BP_DIGCTL_ARMCACHE_CACHE_SS 8 +#define BM_DIGCTL_ARMCACHE_CACHE_SS 0x00000300 +#define BF_DIGCTL_ARMCACHE_CACHE_SS(v) \ + (((v) << 8) & BM_DIGCTL_ARMCACHE_CACHE_SS) +#define BP_DIGCTL_ARMCACHE_RSVD1 6 +#define BM_DIGCTL_ARMCACHE_RSVD1 0x000000C0 +#define BF_DIGCTL_ARMCACHE_RSVD1(v) \ + (((v) << 6) & BM_DIGCTL_ARMCACHE_RSVD1) +#define BP_DIGCTL_ARMCACHE_DTAG_SS 4 +#define BM_DIGCTL_ARMCACHE_DTAG_SS 0x00000030 +#define BF_DIGCTL_ARMCACHE_DTAG_SS(v) \ + (((v) << 4) & BM_DIGCTL_ARMCACHE_DTAG_SS) +#define BP_DIGCTL_ARMCACHE_RSVD0 2 +#define BM_DIGCTL_ARMCACHE_RSVD0 0x0000000C +#define BF_DIGCTL_ARMCACHE_RSVD0(v) \ + (((v) << 2) & BM_DIGCTL_ARMCACHE_RSVD0) +#define BP_DIGCTL_ARMCACHE_ITAG_SS 0 +#define BM_DIGCTL_ARMCACHE_ITAG_SS 0x00000003 +#define BF_DIGCTL_ARMCACHE_ITAG_SS(v) \ + (((v) << 0) & BM_DIGCTL_ARMCACHE_ITAG_SS) + +#define HW_DIGCTL_DEBUG_TRAP_ADDR_LOW (0x000002c0) +#define HW_DIGCTL_DEBUG_TRAP_ADDR_LOW_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_DEBUG_TRAP_ADDR_LOW) + +#define BP_DIGCTL_DEBUG_TRAP_ADDR_LOW_ADDR 0 +#define BM_DIGCTL_DEBUG_TRAP_ADDR_LOW_ADDR 0xFFFFFFFF +#define BF_DIGCTL_DEBUG_TRAP_ADDR_LOW_ADDR(v) (v) + +#define HW_DIGCTL_DEBUG_TRAP_ADDR_HIGH (0x000002d0) +#define HW_DIGCTL_DEBUG_TRAP_ADDR_HIGH_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_DEBUG_TRAP_ADDR_HIGH) + +#define BP_DIGCTL_DEBUG_TRAP_ADDR_HIGH_ADDR 0 +#define BM_DIGCTL_DEBUG_TRAP_ADDR_HIGH_ADDR 0xFFFFFFFF +#define BF_DIGCTL_DEBUG_TRAP_ADDR_HIGH_ADDR(v) (v) + +#define HW_DIGCTL_SGTL (0x00000300) +#define HW_DIGCTL_SGTL_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_SGTL) + +#define BP_DIGCTL_SGTL_COPYRIGHT 0 +#define BM_DIGCTL_SGTL_COPYRIGHT 0xFFFFFFFF +#define BF_DIGCTL_SGTL_COPYRIGHT(v) (v) + +#define HW_DIGCTL_CHIPID (0x00000310) +#define HW_DIGCTL_CHIPID_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_CHIPID) + +#define BP_DIGCTL_CHIPID_PRODUCT_CODE 16 +#define BM_DIGCTL_CHIPID_PRODUCT_CODE 0xFFFF0000 +#define BF_DIGCTL_CHIPID_PRODUCT_CODE(v) \ + (((v) << 16) & BM_DIGCTL_CHIPID_PRODUCT_CODE) +#define BP_DIGCTL_CHIPID_RSVD0 8 +#define BM_DIGCTL_CHIPID_RSVD0 0x0000FF00 +#define BF_DIGCTL_CHIPID_RSVD0(v) \ + (((v) << 8) & BM_DIGCTL_CHIPID_RSVD0) +#define BP_DIGCTL_CHIPID_REVISION 0 +#define BM_DIGCTL_CHIPID_REVISION 0x000000FF +#define BF_DIGCTL_CHIPID_REVISION(v) \ + (((v) << 0) & BM_DIGCTL_CHIPID_REVISION) + +#define HW_DIGCTL_AHB_STATS_SELECT (0x00000330) +#define HW_DIGCTL_AHB_STATS_SELECT_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_AHB_STATS_SELECT) + +#define BP_DIGCTL_AHB_STATS_SELECT_RSVD3 28 +#define BM_DIGCTL_AHB_STATS_SELECT_RSVD3 0xF0000000 +#define BF_DIGCTL_AHB_STATS_SELECT_RSVD3(v) \ + (((v) << 28) & BM_DIGCTL_AHB_STATS_SELECT_RSVD3) +#define BP_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT 24 +#define BM_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT 0x0F000000 +#define BF_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT(v) \ + (((v) << 24) & BM_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT) +#define BV_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT__APBH 0x1 +#define BV_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT__APBX 0x2 +#define BV_DIGCTL_AHB_STATS_SELECT_L3_MASTER_SELECT__USB 0x4 +#define BP_DIGCTL_AHB_STATS_SELECT_RSVD2 20 +#define BM_DIGCTL_AHB_STATS_SELECT_RSVD2 0x00F00000 +#define BF_DIGCTL_AHB_STATS_SELECT_RSVD2(v) \ + (((v) << 20) & BM_DIGCTL_AHB_STATS_SELECT_RSVD2) +#define BP_DIGCTL_AHB_STATS_SELECT_L2_MASTER_SELECT 16 +#define BM_DIGCTL_AHB_STATS_SELECT_L2_MASTER_SELECT 0x000F0000 +#define BF_DIGCTL_AHB_STATS_SELECT_L2_MASTER_SELECT(v) \ + (((v) << 16) & BM_DIGCTL_AHB_STATS_SELECT_L2_MASTER_SELECT) +#define BV_DIGCTL_AHB_STATS_SELECT_L2_MASTER_SELECT__ARM_D 0x1 +#define BP_DIGCTL_AHB_STATS_SELECT_RSVD1 12 +#define BM_DIGCTL_AHB_STATS_SELECT_RSVD1 0x0000F000 +#define BF_DIGCTL_AHB_STATS_SELECT_RSVD1(v) \ + (((v) << 12) & BM_DIGCTL_AHB_STATS_SELECT_RSVD1) +#define BP_DIGCTL_AHB_STATS_SELECT_L1_MASTER_SELECT 8 +#define BM_DIGCTL_AHB_STATS_SELECT_L1_MASTER_SELECT 0x00000F00 +#define BF_DIGCTL_AHB_STATS_SELECT_L1_MASTER_SELECT(v) \ + (((v) << 8) & BM_DIGCTL_AHB_STATS_SELECT_L1_MASTER_SELECT) +#define BV_DIGCTL_AHB_STATS_SELECT_L1_MASTER_SELECT__ARM_I 0x1 +#define BP_DIGCTL_AHB_STATS_SELECT_RSVD0 4 +#define BM_DIGCTL_AHB_STATS_SELECT_RSVD0 0x000000F0 +#define BF_DIGCTL_AHB_STATS_SELECT_RSVD0(v) \ + (((v) << 4) & BM_DIGCTL_AHB_STATS_SELECT_RSVD0) +#define BP_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT 0 +#define BM_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT 0x0000000F +#define BF_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT(v) \ + (((v) << 0) & BM_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT) +#define BV_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT__ECC8 0x1 +#define BV_DIGCTL_AHB_STATS_SELECT_L0_MASTER_SELECT__CRYPTO 0x2 + +#define HW_DIGCTL_L0_AHB_ACTIVE_CYCLES (0x00000340) +#define HW_DIGCTL_L0_AHB_ACTIVE_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L0_AHB_ACTIVE_CYCLES) + +#define BP_DIGCTL_L0_AHB_ACTIVE_CYCLES_COUNT 0 +#define BM_DIGCTL_L0_AHB_ACTIVE_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L0_AHB_ACTIVE_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L0_AHB_DATA_STALLED (0x00000350) +#define HW_DIGCTL_L0_AHB_DATA_STALLED_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L0_AHB_DATA_STALLED) + +#define BP_DIGCTL_L0_AHB_DATA_STALLED_COUNT 0 +#define BM_DIGCTL_L0_AHB_DATA_STALLED_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L0_AHB_DATA_STALLED_COUNT(v) (v) + +#define HW_DIGCTL_L0_AHB_DATA_CYCLES (0x00000360) +#define HW_DIGCTL_L0_AHB_DATA_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L0_AHB_DATA_CYCLES) + +#define BP_DIGCTL_L0_AHB_DATA_CYCLES_COUNT 0 +#define BM_DIGCTL_L0_AHB_DATA_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L0_AHB_DATA_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L1_AHB_ACTIVE_CYCLES (0x00000370) +#define HW_DIGCTL_L1_AHB_ACTIVE_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L1_AHB_ACTIVE_CYCLES) + +#define BP_DIGCTL_L1_AHB_ACTIVE_CYCLES_COUNT 0 +#define BM_DIGCTL_L1_AHB_ACTIVE_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L1_AHB_ACTIVE_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L1_AHB_DATA_STALLED (0x00000380) +#define HW_DIGCTL_L1_AHB_DATA_STALLED_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L1_AHB_DATA_STALLED) + +#define BP_DIGCTL_L1_AHB_DATA_STALLED_COUNT 0 +#define BM_DIGCTL_L1_AHB_DATA_STALLED_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L1_AHB_DATA_STALLED_COUNT(v) (v) + +#define HW_DIGCTL_L1_AHB_DATA_CYCLES (0x00000390) +#define HW_DIGCTL_L1_AHB_DATA_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L1_AHB_DATA_CYCLES) + +#define BP_DIGCTL_L1_AHB_DATA_CYCLES_COUNT 0 +#define BM_DIGCTL_L1_AHB_DATA_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L1_AHB_DATA_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L2_AHB_ACTIVE_CYCLES (0x000003a0) +#define HW_DIGCTL_L2_AHB_ACTIVE_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L2_AHB_ACTIVE_CYCLES) + +#define BP_DIGCTL_L2_AHB_ACTIVE_CYCLES_COUNT 0 +#define BM_DIGCTL_L2_AHB_ACTIVE_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L2_AHB_ACTIVE_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L2_AHB_DATA_STALLED (0x000003b0) +#define HW_DIGCTL_L2_AHB_DATA_STALLED_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L2_AHB_DATA_STALLED) + +#define BP_DIGCTL_L2_AHB_DATA_STALLED_COUNT 0 +#define BM_DIGCTL_L2_AHB_DATA_STALLED_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L2_AHB_DATA_STALLED_COUNT(v) (v) + +#define HW_DIGCTL_L2_AHB_DATA_CYCLES (0x000003c0) +#define HW_DIGCTL_L2_AHB_DATA_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L2_AHB_DATA_CYCLES) + +#define BP_DIGCTL_L2_AHB_DATA_CYCLES_COUNT 0 +#define BM_DIGCTL_L2_AHB_DATA_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L2_AHB_DATA_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L3_AHB_ACTIVE_CYCLES (0x000003d0) +#define HW_DIGCTL_L3_AHB_ACTIVE_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L3_AHB_ACTIVE_CYCLES) + +#define BP_DIGCTL_L3_AHB_ACTIVE_CYCLES_COUNT 0 +#define BM_DIGCTL_L3_AHB_ACTIVE_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L3_AHB_ACTIVE_CYCLES_COUNT(v) (v) + +#define HW_DIGCTL_L3_AHB_DATA_STALLED (0x000003e0) +#define HW_DIGCTL_L3_AHB_DATA_STALLED_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L3_AHB_DATA_STALLED) + +#define BP_DIGCTL_L3_AHB_DATA_STALLED_COUNT 0 +#define BM_DIGCTL_L3_AHB_DATA_STALLED_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L3_AHB_DATA_STALLED_COUNT(v) (v) + +#define HW_DIGCTL_L3_AHB_DATA_CYCLES (0x000003f0) +#define HW_DIGCTL_L3_AHB_DATA_CYCLES_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_L3_AHB_DATA_CYCLES) + +#define BP_DIGCTL_L3_AHB_DATA_CYCLES_COUNT 0 +#define BM_DIGCTL_L3_AHB_DATA_CYCLES_COUNT 0xFFFFFFFF +#define BF_DIGCTL_L3_AHB_DATA_CYCLES_COUNT(v) (v) + +/* + * multi-register-define name HW_DIGCTL_MPTEn_LOC + * base 0x00000400 + * count 16 + * offset 0x10 + */ +#define HW_DIGCTL_MPTEn_LOC(n) (0x00000400 + (n) * 0x10) +#define HW_DIGCTL_MPTEn_LOC_ADDR(n) \ + (REGS_DIGCTL_BASE + HW_DIGCTL_MPTEn_LOC(n)) +#define BP_DIGCTL_MPTEn_LOC_RSVD0 12 +#define BM_DIGCTL_MPTEn_LOC_RSVD0 0xFFFFF000 +#define BF_DIGCTL_MPTEn_LOC_RSVD0(v) \ + (((v) << 12) & BM_DIGCTL_MPTEn_LOC_RSVD0) +#define BP_DIGCTL_MPTEn_LOC_LOC 0 +#define BM_DIGCTL_MPTEn_LOC_LOC 0x00000FFF +#define BF_DIGCTL_MPTEn_LOC_LOC(v) \ + (((v) << 0) & BM_DIGCTL_MPTEn_LOC_LOC) + +#define HW_DIGCTL_EMICLK_DELAY (0x00000500) +#define HW_DIGCTL_EMICLK_DELAY_ADDR \ + (REGS_DIGCTL_BASE + HW_DIGCTL_EMICLK_DELAY) + +#define BP_DIGCTL_EMICLK_DELAY_RSVD0 5 +#define BM_DIGCTL_EMICLK_DELAY_RSVD0 0xFFFFFFE0 +#define BF_DIGCTL_EMICLK_DELAY_RSVD0(v) \ + (((v) << 5) & BM_DIGCTL_EMICLK_DELAY_RSVD0) +#define BP_DIGCTL_EMICLK_DELAY_NUM_TAPS 0 +#define BM_DIGCTL_EMICLK_DELAY_NUM_TAPS 0x0000001F +#define BF_DIGCTL_EMICLK_DELAY_NUM_TAPS(v) \ + (((v) << 0) & BM_DIGCTL_EMICLK_DELAY_NUM_TAPS) +#endif /* __ARCH_ARM___DIGCTL_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/lcdif.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/lcdif.h @@ -0,0 +1,498 @@ +/* + * Freescale STMP378X LCDIF interfaces + * + * Author: Vitaly Wool + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef _ARCH_ARM_LCDIF_H +#define _ARCH_ARM_LCDIF_H + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "regs-lcdif.h" +#include "regs-apbh.h" + +enum { + SPI_MOSI = 0, + SPI_SCLK, + SPI_CS, +}; + +struct stmp3xxx_lcd_dma_chain_info { + dma_addr_t *dma_addr_p; + unsigned offset; +}; + +enum { + STMP3XXX_LCD_PANEL_SYSTEM = 0, + STMP3XXX_LCD_PANEL_VSYNC, + STMP3XXX_LCD_PANEL_DOTCLK, + STMP3XXX_LCD_PANEL_DVI, +}; + +struct stmp3xxx_platform_bl_data; +struct stmp3xxx_platform_fb_entry { + char name[16]; + u16 x_res; + u16 y_res; + u16 bpp; + u32 cycle_time_ns; + int lcd_type; + int (*init_panel) (struct device * dev, dma_addr_t phys, int memsize, + struct stmp3xxx_platform_fb_entry * pentry); + void (*release_panel) (struct device * dev, + struct stmp3xxx_platform_fb_entry * pentry); + int (*blank_panel) (int blank); + void (*run_panel) (void); + void (*stop_panel) (void); + int (*pan_display) (dma_addr_t phys); + int (*update_panel) (void *p, + struct stmp3xxx_platform_fb_entry * pentry); + struct list_head link; + struct stmp3xxx_platform_bl_data *bl_data; +}; + +struct stmp3xxx_platform_fb_data { + struct list_head list; + struct stmp3xxx_platform_fb_entry *cur; + struct stmp3xxx_platform_fb_entry *next; +}; + +#define STMP3XXX_LCDIF_PANEL_INIT 1 +#define STMP3XXX_LCDIF_PANEL_RELEASE 2 + +struct stmp3xxx_platform_bl_data { + struct list_head list; + struct regulator *regulator; + int bl_gpio; + int bl_max_intensity; + int bl_cons_intensity; + int bl_default_intensity; + int (*init_bl) (struct stmp3xxx_platform_bl_data * data); + int (*set_bl_intensity) (struct stmp3xxx_platform_bl_data * data, + struct backlight_device * bd, int suspended); + void (*free_bl) (struct stmp3xxx_platform_bl_data * data); +}; + +static inline void stmp3xxx_lcd_register_entry(struct stmp3xxx_platform_fb_entry + *pentry, + struct stmp3xxx_platform_fb_data + *pdata) +{ + list_add_tail(&pentry->link, &pdata->list); + if (!pdata->cur) + pdata->cur = pentry; +} + +static inline void stmp3xxx_lcd_move_pentry_up(struct stmp3xxx_platform_fb_entry + *pentry, + struct stmp3xxx_platform_fb_data + *pdata) +{ + list_del(&pentry->link); + list_add(&pentry->link, &pdata->list); +} + +static inline int stmp3xxx_lcd_iterate_pdata(struct stmp3xxx_platform_fb_data + *pdata, + int (*func) (struct + stmp3xxx_platform_fb_entry + * pentry, void *data, + int ret_prev), + void *data) +{ + struct stmp3xxx_platform_fb_entry *pentry; + int ret = 0; + list_for_each_entry(pentry, &pdata->list, link) { + ret = func(pentry, data, ret); + } + return ret; +} + +static inline void stmp3xxx_lcd_set_bl_pdata(struct stmp3xxx_platform_bl_data + *pdata) +{ + extern struct platform_device stmp3xxx_backlight; + stmp3xxx_backlight.dev.platform_data = pdata; +} + +void stmp3xxx_init_lcdif(void); +int stmp3xxx_lcdif_dma_init(struct device *dev, dma_addr_t phys, int memsize, + int lcd_master); +void stmp3xxx_lcdif_dma_release(void); +void stmp3xxx_lcdif_run(void); +void stmp3xxx_lcdif_stop(void); +int stmp3xxx_lcdif_pan_display(dma_addr_t addr); + +int stmp3xxx_lcdif_register_client(struct notifier_block *nb); +void stmp3xxx_lcdif_unregister_client(struct notifier_block *nb); +void stmp3xxx_lcdif_notify_clients(unsigned long event, + struct stmp3xxx_platform_fb_entry *pentry); + +#ifndef FBIO_WAITFORVSYNC +#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t) +#endif + +#define LCD_DMA_CHANNEL 0 + +static inline void setup_dotclk_panel(u16 v_pulse_width, + u16 v_period, + u16 v_wait_cnt, + u16 v_active, + u16 h_pulse_width, + u16 h_period, + u16 h_wait_cnt, + u16 h_active, int enable_present) +{ + u32 val; + + stmp3xxx_clearl(BM_LCDIF_CTRL_DATA_SHIFT_DIR, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL_SHIFT_NUM_BITS, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + stmp3xxx_setl(BF(7, LCDIF_CTRL1_BYTE_PACKING_FORMAT) | + BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + val &= ~(BM_LCDIF_TRANSFER_COUNT_V_COUNT | + BM_LCDIF_TRANSFER_COUNT_H_COUNT); + val |= BF(h_active, LCDIF_TRANSFER_COUNT_H_COUNT) | + BF(v_active, LCDIF_TRANSFER_COUNT_V_COUNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + + stmp3xxx_clearl(BM_LCDIF_CTRL_VSYNC_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_WAIT_FOR_VSYNC_EDGE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_DVI_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_clearl(BM_LCDIF_CTRL_WORD_LENGTH | + BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE | + BM_LCDIF_CTRL_LCD_DATABUS_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BF(3, LCDIF_CTRL_WORD_LENGTH) | /* 24 bit */ + BM_LCDIF_CTRL_DATA_SELECT | /* data mode */ + BF(0, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | /* no swap */ + BF(3, LCDIF_CTRL_LCD_DATABUS_WIDTH), /* 24 bit */ + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_POL | + BM_LCDIF_VDCTRL0_HSYNC_POL | + BM_LCDIF_VDCTRL0_ENABLE_POL | + BM_LCDIF_VDCTRL0_DOTCLK_POL); + val |= BM_LCDIF_VDCTRL0_ENABLE_POL | + BM_LCDIF_VDCTRL0_DOTCLK_POL; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_OEB); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); /* vsync is output */ + + /* + * need enable sig for true RGB i/f. Or, if not true RGB, leave it + * zero. + */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val |= BM_LCDIF_VDCTRL0_ENABLE_PRESENT; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + /* + * For DOTCLK mode, count VSYNC_PERIOD in terms of complete hz lines + */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + val &= ~(BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT | + BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT); + val |= BM_LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT | + BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + stmp3xxx_setl(v_pulse_width, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL1_VSYNC_PERIOD, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + stmp3xxx_setl(v_period, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + + stmp3xxx_clearl(BM_LCDIF_VDCTRL2_HSYNC_PERIOD | + BM_LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + + stmp3xxx_setl(BF(h_pulse_width, LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH) | + BF(h_period, LCDIF_VDCTRL2_HSYNC_PERIOD), + REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + val &= ~BM_LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT; + val |= BF(h_active, LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); + val &= ~(BM_LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT | + BM_LCDIF_VDCTRL3_VERTICAL_WAIT_CNT); + val |= BF(h_wait_cnt, LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT) | + BF(v_wait_cnt, LCDIF_VDCTRL3_VERTICAL_WAIT_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); + val |= BM_LCDIF_VDCTRL4_SYNC_SIGNALS_ON; + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL4); +} + +static inline void release_dotclk_panel(void) +{ + stmp3xxx_clearl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL0); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL1); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL2); + __raw_writel(0, REGS_LCDIF_BASE + HW_LCDIF_VDCTRL3); +} + +static inline void dotclk_dma_chain_init(int memsize, dma_addr_t video_phys, + struct stmp3xxx_dma_descriptor + *video_dma_descriptor, + struct stmp3xxx_lcd_dma_chain_info + *dma_chain_info, + unsigned *dma_chain_info_pos) +{ + unsigned i, bytes_left; + dma_addr_t phys = video_phys; + bytes_left = memsize; + + for (i = 0; bytes_left > 0; ++i) { + unsigned this_chain = bytes_left < 0xff00 ? bytes_left : 0xff00; + /* Count of 0 in the DMA word means 65536 */ + unsigned xfer_count = this_chain & 65535; + stmp3xxx_dma_allocate_command(STMP3XXX_DMA + (LCD_DMA_CHANNEL, + STMP3XXX_BUS_APBH), + &video_dma_descriptor[i]); + if (i != 0) { + /* Chain previous command to this one */ + video_dma_descriptor[i - 1].command->next = + video_dma_descriptor[i].handle; + /* Enable DMA chaining, disable IRQ and semaphore + * on previous command + */ + video_dma_descriptor[i - 1].command->cmd &= + ~(BM_APBH_CHn_CMD_IRQONCMPLT | + BM_APBH_CHn_CMD_SEMAPHORE); + } + video_dma_descriptor[i].command->cmd = + BF(xfer_count, APBH_CHn_CMD_XFER_COUNT) | + BF(1, APBH_CHn_CMD_CMDWORDS) | + BM_APBH_CHn_CMD_CHAIN | + BF(2, APBH_CHn_CMD_COMMAND); /* DMA read */ + video_dma_descriptor[i].command->pio_words[0] = + BM_LCDIF_CTRL_RUN | + BF(1, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | + BM_LCDIF_CTRL_DATA_SHIFT_DIR | + BM_LCDIF_CTRL_DOTCLK_MODE | + BM_LCDIF_CTRL_BYPASS_COUNT | BM_LCDIF_CTRL_DATA_SELECT; + video_dma_descriptor[i].command->buf_ptr = phys; + dma_chain_info[*dma_chain_info_pos].dma_addr_p = + &video_dma_descriptor[i].command->buf_ptr; + dma_chain_info[*dma_chain_info_pos].offset = phys - video_phys; + ++*dma_chain_info_pos; + phys += this_chain; + bytes_left -= this_chain; + } + video_dma_descriptor[i - 1].command->next = + video_dma_descriptor[0].handle; + pr_debug("%s: Used %u DMA chains to cover %u bytes\n", __func__, i, + memsize); +} + +static inline void setup_dvi_panel(u16 h_active, u16 v_active, + u16 h_blanking, u16 v_lines, + u16 v1_blank_start, u16 v1_blank_end, + u16 v2_blank_start, u16 v2_blank_end, + u16 f1_start, u16 f1_end, + u16 f2_start, u16 f2_end) +{ + u32 val; + /* 32bit packed format (RGB) */ + stmp3xxx_clearl(BM_LCDIF_CTRL1_BYTE_PACKING_FORMAT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + stmp3xxx_setl(BF(0x7, LCDIF_CTRL1_BYTE_PACKING_FORMAT) | + BM_LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + val &= ~(BM_LCDIF_TRANSFER_COUNT_V_COUNT | + BM_LCDIF_TRANSFER_COUNT_H_COUNT); + val |= BF(h_active, LCDIF_TRANSFER_COUNT_H_COUNT) | + BF(v_active, LCDIF_TRANSFER_COUNT_V_COUNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_TRANSFER_COUNT); + + /* set lcdif to DVI mode */ + stmp3xxx_setl(BM_LCDIF_CTRL_DVI_MODE, REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_VSYNC_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_clearl(BM_LCDIF_CTRL_DOTCLK_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + stmp3xxx_setl(BM_LCDIF_CTRL_BYPASS_COUNT, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + /* convert input RGB -> YCbCr */ + stmp3xxx_setl(BM_LCDIF_CTRL_RGB_TO_YCBCR422_CSC, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + /* interlace odd and even fields */ + stmp3xxx_setl(BM_LCDIF_CTRL1_INTERLACE_FIELDS, + REGS_LCDIF_BASE + HW_LCDIF_CTRL1); + + stmp3xxx_clearl(BM_LCDIF_CTRL_WORD_LENGTH | + BM_LCDIF_CTRL_INPUT_DATA_SWIZZLE | + BM_LCDIF_CTRL_LCD_DATABUS_WIDTH, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + stmp3xxx_setl(BF(3, LCDIF_CTRL_WORD_LENGTH) | /* 24 bit */ + BM_LCDIF_CTRL_DATA_SELECT | /* data mode */ + BF(0, LCDIF_CTRL_INPUT_DATA_SWIZZLE) | /* no swap */ + BF(1, LCDIF_CTRL_LCD_DATABUS_WIDTH), /* 8 bit */ + REGS_LCDIF_BASE + HW_LCDIF_CTRL); + + /* LCDIF_DVI */ + /* set frame size */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL0); + val &= ~(BM_LCDIF_DVICTRL0_H_ACTIVE_CNT | + BM_LCDIF_DVICTRL0_H_BLANKING_CNT | + BM_LCDIF_DVICTRL0_V_LINES_CNT); + val |= BF(1440, LCDIF_DVICTRL0_H_ACTIVE_CNT) | + BF(h_blanking, LCDIF_DVICTRL0_H_BLANKING_CNT) | + BF(v_lines, LCDIF_DVICTRL0_V_LINES_CNT); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL0); + + /* set start/end of field-1 and start of field-2 */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL1); + val &= ~(BM_LCDIF_DVICTRL1_F1_START_LINE | + BM_LCDIF_DVICTRL1_F1_END_LINE | + BM_LCDIF_DVICTRL1_F2_START_LINE); + val |= BF(f1_start, LCDIF_DVICTRL1_F1_START_LINE) | + BF(f1_end, LCDIF_DVICTRL1_F1_END_LINE) | + BF(f2_start, LCDIF_DVICTRL1_F2_START_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL1); + + /* set first vertical blanking interval and end of filed-2 */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL2); + val &= ~(BM_LCDIF_DVICTRL2_F2_END_LINE | + BM_LCDIF_DVICTRL2_V1_BLANK_START_LINE | + BM_LCDIF_DVICTRL2_V1_BLANK_END_LINE); + val |= BF(f2_end, LCDIF_DVICTRL2_F2_END_LINE) | + BF(v1_blank_start, LCDIF_DVICTRL2_V1_BLANK_START_LINE) | + BF(v1_blank_end, LCDIF_DVICTRL2_V1_BLANK_END_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL2); + + /* set second vertical blanking interval */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL3); + val &= ~(BM_LCDIF_DVICTRL3_V2_BLANK_START_LINE | + BM_LCDIF_DVICTRL3_V2_BLANK_END_LINE); + val |= BF(v2_blank_start, LCDIF_DVICTRL3_V2_BLANK_START_LINE) | + BF(v2_blank_end, LCDIF_DVICTRL3_V2_BLANK_END_LINE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL3); + + /* fill the rest area black color if the input frame + * is not 720 pixels/line + */ + if (h_active != 720) { + /* the input frame can't be less then (720-256) pixels/line */ + if (720 - h_active > 0xff) + h_active = 720 - 0xff; + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_DVICTRL4); + val &= ~(BM_LCDIF_DVICTRL4_H_FILL_CNT | + BM_LCDIF_DVICTRL4_Y_FILL_VALUE | + BM_LCDIF_DVICTRL4_CB_FILL_VALUE | + BM_LCDIF_DVICTRL4_CR_FILL_VALUE); + val |= BF(720 - h_active, LCDIF_DVICTRL4_H_FILL_CNT) | + BF(16, LCDIF_DVICTRL4_Y_FILL_VALUE) | + BF(128, LCDIF_DVICTRL4_CB_FILL_VALUE) | + BF(128, LCDIF_DVICTRL4_CR_FILL_VALUE); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_DVICTRL4); + } + + /* Color Space Conversion RGB->YCbCr */ + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF0); + val &= ~(BM_LCDIF_CSC_COEFF0_C0 | + BM_LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER); + val |= BF(0x41, LCDIF_CSC_COEFF0_C0) | + BF(3, LCDIF_CSC_COEFF0_CSC_SUBSAMPLE_FILTER); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF0); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF1); + val &= ~(BM_LCDIF_CSC_COEFF1_C1 | BM_LCDIF_CSC_COEFF1_C2); + val |= BF(0x81, LCDIF_CSC_COEFF1_C1) | + BF(0x19, LCDIF_CSC_COEFF1_C2); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF1); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF2); + val &= ~(BM_LCDIF_CSC_COEFF2_C3 | BM_LCDIF_CSC_COEFF2_C4); + val |= BF(0x3DB, LCDIF_CSC_COEFF2_C3) | + BF(0x3B6, LCDIF_CSC_COEFF2_C4); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF2); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF3); + val &= ~(BM_LCDIF_CSC_COEFF3_C5 | BM_LCDIF_CSC_COEFF3_C6); + val |= BF(0x70, LCDIF_CSC_COEFF3_C5) | + BF(0x70, LCDIF_CSC_COEFF3_C6); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF3); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF4); + val &= ~(BM_LCDIF_CSC_COEFF4_C7 | BM_LCDIF_CSC_COEFF4_C8); + val |= BF(0x3A2, LCDIF_CSC_COEFF4_C7) | BF(0x3EE, LCDIF_CSC_COEFF4_C8); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_COEFF4); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_OFFSET); + val &= ~(BM_LCDIF_CSC_OFFSET_CBCR_OFFSET | BM_LCDIF_CSC_OFFSET_Y_OFFSET); + val |= BF(0x80, LCDIF_CSC_OFFSET_CBCR_OFFSET) | + BF(0x10, LCDIF_CSC_OFFSET_Y_OFFSET); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_OFFSET); + + val = __raw_readl(REGS_LCDIF_BASE + HW_LCDIF_CSC_LIMIT); + val &= ~(BM_LCDIF_CSC_LIMIT_CBCR_MIN | + BM_LCDIF_CSC_LIMIT_CBCR_MAX | + BM_LCDIF_CSC_LIMIT_Y_MIN | + BM_LCDIF_CSC_LIMIT_Y_MAX); + val |= BF(16, LCDIF_CSC_LIMIT_CBCR_MIN) | + BF(240, LCDIF_CSC_LIMIT_CBCR_MAX) | + BF(16, LCDIF_CSC_LIMIT_Y_MIN) | + BF(235, LCDIF_CSC_LIMIT_Y_MAX); + __raw_writel(val, REGS_LCDIF_BASE + HW_LCDIF_CSC_LIMIT); +} + +static inline void release_dvi_panel(void) +{ + stmp3xxx_clearl(BM_LCDIF_CTRL_DVI_MODE, + REGS_LCDIF_BASE + HW_LCDIF_CTRL); +} + +#endif /* _ARCH_ARM_LCDIF_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-dram.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-dram.h @@ -1,7 +1,7 @@ /* - * stmp378x: DRAM register definitions + * STMP DRAM Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,11 +17,957 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_DRAM_BASE (STMP3XXX_REGS_BASE + 0xE0000) -#define REGS_DRAM_PHYS 0x800E0000 -#define REGS_DRAM_SIZE 0x2000 -#define HW_DRAM_CTL06 0x18 +#ifndef __ARCH_ARM___DRAM_H +#define __ARCH_ARM___DRAM_H 1 + +#define REGS_DRAM_BASE (STMP3XXX_REGS_BASE + 0xe0000) +#define REGS_DRAM_PHYS (0x800E0000) +#define REGS_DRAM_SIZE 0x00002000 + +#define HW_DRAM_CTL00 (0x00000000) +#define HW_DRAM_CTL00_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL00) + +#define BP_DRAM_CTL00_RSVD4 25 +#define BM_DRAM_CTL00_RSVD4 0xFE000000 +#define BF_DRAM_CTL00_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL00_RSVD4) +#define BM_DRAM_CTL00_AHB0_W_PRIORITY 0x01000000 +#define BP_DRAM_CTL00_RSVD3 17 +#define BM_DRAM_CTL00_RSVD3 0x00FE0000 +#define BF_DRAM_CTL00_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL00_RSVD3) +#define BM_DRAM_CTL00_AHB0_R_PRIORITY 0x00010000 +#define BP_DRAM_CTL00_RSVD2 9 +#define BM_DRAM_CTL00_RSVD2 0x0000FE00 +#define BF_DRAM_CTL00_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL00_RSVD2) +#define BM_DRAM_CTL00_AHB0_FIFO_TYPE_REG 0x00000100 +#define BP_DRAM_CTL00_RSVD1 1 +#define BM_DRAM_CTL00_RSVD1 0x000000FE +#define BF_DRAM_CTL00_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL00_RSVD1) +#define BM_DRAM_CTL00_ADDR_CMP_EN 0x00000001 + +#define HW_DRAM_CTL01 (0x00000004) +#define HW_DRAM_CTL01_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL01) + +#define BP_DRAM_CTL01_RSVD4 25 +#define BM_DRAM_CTL01_RSVD4 0xFE000000 +#define BF_DRAM_CTL01_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL01_RSVD4) +#define BM_DRAM_CTL01_AHB2_FIFO_TYPE_REG 0x01000000 +#define BP_DRAM_CTL01_RSVD3 17 +#define BM_DRAM_CTL01_RSVD3 0x00FE0000 +#define BF_DRAM_CTL01_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL01_RSVD3) +#define BM_DRAM_CTL01_AHB1_W_PRIORITY 0x00010000 +#define BP_DRAM_CTL01_RSVD2 9 +#define BM_DRAM_CTL01_RSVD2 0x0000FE00 +#define BF_DRAM_CTL01_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL01_RSVD2) +#define BM_DRAM_CTL01_AHB1_R_PRIORITY 0x00000100 +#define BP_DRAM_CTL01_RSVD1 1 +#define BM_DRAM_CTL01_RSVD1 0x000000FE +#define BF_DRAM_CTL01_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL01_RSVD1) +#define BM_DRAM_CTL01_AHB1_FIFO_TYPE_REG 0x00000001 + +#define HW_DRAM_CTL02 (0x00000008) +#define HW_DRAM_CTL02_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL02) + +#define BP_DRAM_CTL02_RSVD4 25 +#define BM_DRAM_CTL02_RSVD4 0xFE000000 +#define BF_DRAM_CTL02_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL02_RSVD4) +#define BM_DRAM_CTL02_AHB3_R_PRIORITY 0x01000000 +#define BP_DRAM_CTL02_RSVD3 17 +#define BM_DRAM_CTL02_RSVD3 0x00FE0000 +#define BF_DRAM_CTL02_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL02_RSVD3) +#define BM_DRAM_CTL02_AHB3_FIFO_TYPE_REG 0x00010000 +#define BP_DRAM_CTL02_RSVD2 9 +#define BM_DRAM_CTL02_RSVD2 0x0000FE00 +#define BF_DRAM_CTL02_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL02_RSVD2) +#define BM_DRAM_CTL02_AHB2_W_PRIORITY 0x00000100 +#define BP_DRAM_CTL02_RSVD1 1 +#define BM_DRAM_CTL02_RSVD1 0x000000FE +#define BF_DRAM_CTL02_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL02_RSVD1) +#define BM_DRAM_CTL02_AHB2_R_PRIORITY 0x00000001 + +#define HW_DRAM_CTL03 (0x0000000c) +#define HW_DRAM_CTL03_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL03) + +#define BP_DRAM_CTL03_RSVD4 25 +#define BM_DRAM_CTL03_RSVD4 0xFE000000 +#define BF_DRAM_CTL03_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL03_RSVD4) +#define BM_DRAM_CTL03_AUTO_REFRESH_MODE 0x01000000 +#define BP_DRAM_CTL03_RSVD3 17 +#define BM_DRAM_CTL03_RSVD3 0x00FE0000 +#define BF_DRAM_CTL03_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL03_RSVD3) +#define BM_DRAM_CTL03_AREFRESH 0x00010000 +#define BP_DRAM_CTL03_RSVD2 9 +#define BM_DRAM_CTL03_RSVD2 0x0000FE00 +#define BF_DRAM_CTL03_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL03_RSVD2) +#define BM_DRAM_CTL03_AP 0x00000100 +#define BP_DRAM_CTL03_RSVD1 1 +#define BM_DRAM_CTL03_RSVD1 0x000000FE +#define BF_DRAM_CTL03_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL03_RSVD1) +#define BM_DRAM_CTL03_AHB3_W_PRIORITY 0x00000001 + +#define HW_DRAM_CTL04 (0x00000010) +#define HW_DRAM_CTL04_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL04) + +#define BP_DRAM_CTL04_RSVD4 25 +#define BM_DRAM_CTL04_RSVD4 0xFE000000 +#define BF_DRAM_CTL04_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL04_RSVD4) +#define BM_DRAM_CTL04_DLL_BYPASS_MODE 0x01000000 +#define BP_DRAM_CTL04_RSVD3 17 +#define BM_DRAM_CTL04_RSVD3 0x00FE0000 +#define BF_DRAM_CTL04_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL04_RSVD3) +#define BM_DRAM_CTL04_DLLLOCKREG 0x00010000 +#define BP_DRAM_CTL04_RSVD2 9 +#define BM_DRAM_CTL04_RSVD2 0x0000FE00 +#define BF_DRAM_CTL04_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL04_RSVD2) +#define BM_DRAM_CTL04_CONCURRENTAP 0x00000100 +#define BP_DRAM_CTL04_RSVD1 1 +#define BM_DRAM_CTL04_RSVD1 0x000000FE +#define BF_DRAM_CTL04_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL04_RSVD1) +#define BM_DRAM_CTL04_BANK_SPLIT_EN 0x00000001 + +#define HW_DRAM_CTL05 (0x00000014) +#define HW_DRAM_CTL05_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL05) + +#define BP_DRAM_CTL05_RSVD4 25 +#define BM_DRAM_CTL05_RSVD4 0xFE000000 +#define BF_DRAM_CTL05_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL05_RSVD4) +#define BM_DRAM_CTL05_INTRPTREADA 0x01000000 +#define BP_DRAM_CTL05_RSVD3 17 +#define BM_DRAM_CTL05_RSVD3 0x00FE0000 +#define BF_DRAM_CTL05_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL05_RSVD3) +#define BM_DRAM_CTL05_INTRPTAPBURST 0x00010000 +#define BP_DRAM_CTL05_RSVD2 9 +#define BM_DRAM_CTL05_RSVD2 0x0000FE00 +#define BF_DRAM_CTL05_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL05_RSVD2) +#define BM_DRAM_CTL05_FAST_WRITE 0x00000100 +#define BP_DRAM_CTL05_RSVD1 1 +#define BM_DRAM_CTL05_RSVD1 0x000000FE +#define BF_DRAM_CTL05_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL05_RSVD1) +#define BM_DRAM_CTL05_EN_LOWPOWER_MODE 0x00000001 + +#define HW_DRAM_CTL06 (0x00000018) +#define HW_DRAM_CTL06_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL06) + +#define BP_DRAM_CTL06_RSVD4 25 +#define BM_DRAM_CTL06_RSVD4 0xFE000000 +#define BF_DRAM_CTL06_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL06_RSVD4) +#define BM_DRAM_CTL06_POWER_DOWN 0x01000000 +#define BP_DRAM_CTL06_RSVD3 17 +#define BM_DRAM_CTL06_RSVD3 0x00FE0000 +#define BF_DRAM_CTL06_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL06_RSVD3) +#define BM_DRAM_CTL06_PLACEMENT_EN 0x00010000 +#define BP_DRAM_CTL06_RSVD2 9 +#define BM_DRAM_CTL06_RSVD2 0x0000FE00 +#define BF_DRAM_CTL06_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL06_RSVD2) +#define BM_DRAM_CTL06_NO_CMD_INIT 0x00000100 +#define BP_DRAM_CTL06_RSVD1 1 +#define BM_DRAM_CTL06_RSVD1 0x000000FE +#define BF_DRAM_CTL06_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL06_RSVD1) +#define BM_DRAM_CTL06_INTRPTWRITEA 0x00000001 + +#define HW_DRAM_CTL07 (0x0000001c) +#define HW_DRAM_CTL07_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL07) + +#define BP_DRAM_CTL07_RSVD4 25 +#define BM_DRAM_CTL07_RSVD4 0xFE000000 +#define BF_DRAM_CTL07_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL07_RSVD4) +#define BM_DRAM_CTL07_RW_SAME_EN 0x01000000 +#define BP_DRAM_CTL07_RSVD3 17 +#define BM_DRAM_CTL07_RSVD3 0x00FE0000 +#define BF_DRAM_CTL07_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL07_RSVD3) +#define BM_DRAM_CTL07_REG_DIMM_ENABLE 0x00010000 +#define BP_DRAM_CTL07_RSVD2 9 +#define BM_DRAM_CTL07_RSVD2 0x0000FE00 +#define BF_DRAM_CTL07_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL07_RSVD2) +#define BM_DRAM_CTL07_RD2RD_TURN 0x00000100 +#define BP_DRAM_CTL07_RSVD1 1 +#define BM_DRAM_CTL07_RSVD1 0x000000FE +#define BF_DRAM_CTL07_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL07_RSVD1) +#define BM_DRAM_CTL07_PRIORITY_EN 0x00000001 + +#define HW_DRAM_CTL08 (0x00000020) +#define HW_DRAM_CTL08_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL08) + +#define BP_DRAM_CTL08_RSVD4 25 +#define BM_DRAM_CTL08_RSVD4 0xFE000000 +#define BF_DRAM_CTL08_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL08_RSVD4) +#define BM_DRAM_CTL08_TRAS_LOCKOUT 0x01000000 +#define BP_DRAM_CTL08_RSVD3 17 +#define BM_DRAM_CTL08_RSVD3 0x00FE0000 +#define BF_DRAM_CTL08_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL08_RSVD3) +#define BM_DRAM_CTL08_START 0x00010000 +#define BP_DRAM_CTL08_RSVD2 9 +#define BM_DRAM_CTL08_RSVD2 0x0000FE00 +#define BF_DRAM_CTL08_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL08_RSVD2) +#define BM_DRAM_CTL08_SREFRESH 0x00000100 +#define BP_DRAM_CTL08_RSVD1 1 +#define BM_DRAM_CTL08_RSVD1 0x000000FE +#define BF_DRAM_CTL08_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL08_RSVD1) +#define BM_DRAM_CTL08_SDR_MODE 0x00000001 + +#define HW_DRAM_CTL09 (0x00000024) +#define HW_DRAM_CTL09_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL09) + +#define BP_DRAM_CTL09_RSVD4 26 +#define BM_DRAM_CTL09_RSVD4 0xFC000000 +#define BF_DRAM_CTL09_RSVD4(v) \ + (((v) << 26) & BM_DRAM_CTL09_RSVD4) +#define BP_DRAM_CTL09_OUT_OF_RANGE_TYPE 24 +#define BM_DRAM_CTL09_OUT_OF_RANGE_TYPE 0x03000000 +#define BF_DRAM_CTL09_OUT_OF_RANGE_TYPE(v) \ + (((v) << 24) & BM_DRAM_CTL09_OUT_OF_RANGE_TYPE) +#define BP_DRAM_CTL09_RSVD3 18 +#define BM_DRAM_CTL09_RSVD3 0x00FC0000 +#define BF_DRAM_CTL09_RSVD3(v) \ + (((v) << 18) & BM_DRAM_CTL09_RSVD3) +#define BP_DRAM_CTL09_OUT_OF_RANGE_SOURCE_ID 16 +#define BM_DRAM_CTL09_OUT_OF_RANGE_SOURCE_ID 0x00030000 +#define BF_DRAM_CTL09_OUT_OF_RANGE_SOURCE_ID(v) \ + (((v) << 16) & BM_DRAM_CTL09_OUT_OF_RANGE_SOURCE_ID) +#define BP_DRAM_CTL09_RSVD2 9 +#define BM_DRAM_CTL09_RSVD2 0x0000FE00 +#define BF_DRAM_CTL09_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL09_RSVD2) +#define BM_DRAM_CTL09_WRITE_MODEREG 0x00000100 +#define BP_DRAM_CTL09_RSVD1 1 +#define BM_DRAM_CTL09_RSVD1 0x000000FE +#define BF_DRAM_CTL09_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL09_RSVD1) +#define BM_DRAM_CTL09_WRITEINTERP 0x00000001 + +#define HW_DRAM_CTL10 (0x00000028) +#define HW_DRAM_CTL10_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL10) + +#define BP_DRAM_CTL10_RSVD4 27 +#define BM_DRAM_CTL10_RSVD4 0xF8000000 +#define BF_DRAM_CTL10_RSVD4(v) \ + (((v) << 27) & BM_DRAM_CTL10_RSVD4) +#define BP_DRAM_CTL10_AGE_COUNT 24 +#define BM_DRAM_CTL10_AGE_COUNT 0x07000000 +#define BF_DRAM_CTL10_AGE_COUNT(v) \ + (((v) << 24) & BM_DRAM_CTL10_AGE_COUNT) +#define BP_DRAM_CTL10_RSVD3 19 +#define BM_DRAM_CTL10_RSVD3 0x00F80000 +#define BF_DRAM_CTL10_RSVD3(v) \ + (((v) << 19) & BM_DRAM_CTL10_RSVD3) +#define BP_DRAM_CTL10_ADDR_PINS 16 +#define BM_DRAM_CTL10_ADDR_PINS 0x00070000 +#define BF_DRAM_CTL10_ADDR_PINS(v) \ + (((v) << 16) & BM_DRAM_CTL10_ADDR_PINS) +#define BP_DRAM_CTL10_RSVD2 10 +#define BM_DRAM_CTL10_RSVD2 0x0000FC00 +#define BF_DRAM_CTL10_RSVD2(v) \ + (((v) << 10) & BM_DRAM_CTL10_RSVD2) +#define BP_DRAM_CTL10_TEMRS 8 +#define BM_DRAM_CTL10_TEMRS 0x00000300 +#define BF_DRAM_CTL10_TEMRS(v) \ + (((v) << 8) & BM_DRAM_CTL10_TEMRS) +#define BP_DRAM_CTL10_RSVD1 2 +#define BM_DRAM_CTL10_RSVD1 0x000000FC +#define BF_DRAM_CTL10_RSVD1(v) \ + (((v) << 2) & BM_DRAM_CTL10_RSVD1) +#define BP_DRAM_CTL10_Q_FULLNESS 0 +#define BM_DRAM_CTL10_Q_FULLNESS 0x00000003 +#define BF_DRAM_CTL10_Q_FULLNESS(v) \ + (((v) << 0) & BM_DRAM_CTL10_Q_FULLNESS) + +#define HW_DRAM_CTL11 (0x0000002c) +#define HW_DRAM_CTL11_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL11) + +#define BP_DRAM_CTL11_RSVD4 27 +#define BM_DRAM_CTL11_RSVD4 0xF8000000 +#define BF_DRAM_CTL11_RSVD4(v) \ + (((v) << 27) & BM_DRAM_CTL11_RSVD4) +#define BP_DRAM_CTL11_MAX_CS_REG 24 +#define BM_DRAM_CTL11_MAX_CS_REG 0x07000000 +#define BF_DRAM_CTL11_MAX_CS_REG(v) \ + (((v) << 24) & BM_DRAM_CTL11_MAX_CS_REG) +#define BP_DRAM_CTL11_RSVD3 19 +#define BM_DRAM_CTL11_RSVD3 0x00F80000 +#define BF_DRAM_CTL11_RSVD3(v) \ + (((v) << 19) & BM_DRAM_CTL11_RSVD3) +#define BP_DRAM_CTL11_COMMAND_AGE_COUNT 16 +#define BM_DRAM_CTL11_COMMAND_AGE_COUNT 0x00070000 +#define BF_DRAM_CTL11_COMMAND_AGE_COUNT(v) \ + (((v) << 16) & BM_DRAM_CTL11_COMMAND_AGE_COUNT) +#define BP_DRAM_CTL11_RSVD2 11 +#define BM_DRAM_CTL11_RSVD2 0x0000F800 +#define BF_DRAM_CTL11_RSVD2(v) \ + (((v) << 11) & BM_DRAM_CTL11_RSVD2) +#define BP_DRAM_CTL11_COLUMN_SIZE 8 +#define BM_DRAM_CTL11_COLUMN_SIZE 0x00000700 +#define BF_DRAM_CTL11_COLUMN_SIZE(v) \ + (((v) << 8) & BM_DRAM_CTL11_COLUMN_SIZE) +#define BP_DRAM_CTL11_RSVD1 3 +#define BM_DRAM_CTL11_RSVD1 0x000000F8 +#define BF_DRAM_CTL11_RSVD1(v) \ + (((v) << 3) & BM_DRAM_CTL11_RSVD1) +#define BP_DRAM_CTL11_CASLAT 0 +#define BM_DRAM_CTL11_CASLAT 0x00000007 +#define BF_DRAM_CTL11_CASLAT(v) \ + (((v) << 0) & BM_DRAM_CTL11_CASLAT) + +#define HW_DRAM_CTL12 (0x00000030) +#define HW_DRAM_CTL12_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL12) + +#define BP_DRAM_CTL12_RSVD3 27 +#define BM_DRAM_CTL12_RSVD3 0xF8000000 +#define BF_DRAM_CTL12_RSVD3(v) \ + (((v) << 27) & BM_DRAM_CTL12_RSVD3) +#define BP_DRAM_CTL12_TWR_INT 24 +#define BM_DRAM_CTL12_TWR_INT 0x07000000 +#define BF_DRAM_CTL12_TWR_INT(v) \ + (((v) << 24) & BM_DRAM_CTL12_TWR_INT) +#define BP_DRAM_CTL12_RSVD2 19 +#define BM_DRAM_CTL12_RSVD2 0x00F80000 +#define BF_DRAM_CTL12_RSVD2(v) \ + (((v) << 19) & BM_DRAM_CTL12_RSVD2) +#define BP_DRAM_CTL12_TRRD 16 +#define BM_DRAM_CTL12_TRRD 0x00070000 +#define BF_DRAM_CTL12_TRRD(v) \ + (((v) << 16) & BM_DRAM_CTL12_TRRD) +#define BP_DRAM_CTL12_OBSOLETE 8 +#define BM_DRAM_CTL12_OBSOLETE 0x0000FF00 +#define BF_DRAM_CTL12_OBSOLETE(v) \ + (((v) << 8) & BM_DRAM_CTL12_OBSOLETE) +#define BP_DRAM_CTL12_RSVD1 3 +#define BM_DRAM_CTL12_RSVD1 0x000000F8 +#define BF_DRAM_CTL12_RSVD1(v) \ + (((v) << 3) & BM_DRAM_CTL12_RSVD1) +#define BP_DRAM_CTL12_TCKE 0 +#define BM_DRAM_CTL12_TCKE 0x00000007 +#define BF_DRAM_CTL12_TCKE(v) \ + (((v) << 0) & BM_DRAM_CTL12_TCKE) + +#define HW_DRAM_CTL13 (0x00000034) +#define HW_DRAM_CTL13_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL13) + +#define BP_DRAM_CTL13_RSVD4 28 +#define BM_DRAM_CTL13_RSVD4 0xF0000000 +#define BF_DRAM_CTL13_RSVD4(v) \ + (((v) << 28) & BM_DRAM_CTL13_RSVD4) +#define BP_DRAM_CTL13_CASLAT_LIN_GATE 24 +#define BM_DRAM_CTL13_CASLAT_LIN_GATE 0x0F000000 +#define BF_DRAM_CTL13_CASLAT_LIN_GATE(v) \ + (((v) << 24) & BM_DRAM_CTL13_CASLAT_LIN_GATE) +#define BP_DRAM_CTL13_RSVD3 20 +#define BM_DRAM_CTL13_RSVD3 0x00F00000 +#define BF_DRAM_CTL13_RSVD3(v) \ + (((v) << 20) & BM_DRAM_CTL13_RSVD3) +#define BP_DRAM_CTL13_CASLAT_LIN 16 +#define BM_DRAM_CTL13_CASLAT_LIN 0x000F0000 +#define BF_DRAM_CTL13_CASLAT_LIN(v) \ + (((v) << 16) & BM_DRAM_CTL13_CASLAT_LIN) +#define BP_DRAM_CTL13_RSVD2 12 +#define BM_DRAM_CTL13_RSVD2 0x0000F000 +#define BF_DRAM_CTL13_RSVD2(v) \ + (((v) << 12) & BM_DRAM_CTL13_RSVD2) +#define BP_DRAM_CTL13_APREBIT 8 +#define BM_DRAM_CTL13_APREBIT 0x00000F00 +#define BF_DRAM_CTL13_APREBIT(v) \ + (((v) << 8) & BM_DRAM_CTL13_APREBIT) +#define BP_DRAM_CTL13_RSVD1 3 +#define BM_DRAM_CTL13_RSVD1 0x000000F8 +#define BF_DRAM_CTL13_RSVD1(v) \ + (((v) << 3) & BM_DRAM_CTL13_RSVD1) +#define BP_DRAM_CTL13_TWTR 0 +#define BM_DRAM_CTL13_TWTR 0x00000007 +#define BF_DRAM_CTL13_TWTR(v) \ + (((v) << 0) & BM_DRAM_CTL13_TWTR) + +#define HW_DRAM_CTL14 (0x00000038) +#define HW_DRAM_CTL14_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL14) + +#define BP_DRAM_CTL14_RSVD4 28 +#define BM_DRAM_CTL14_RSVD4 0xF0000000 +#define BF_DRAM_CTL14_RSVD4(v) \ + (((v) << 28) & BM_DRAM_CTL14_RSVD4) +#define BP_DRAM_CTL14_MAX_COL_REG 24 +#define BM_DRAM_CTL14_MAX_COL_REG 0x0F000000 +#define BF_DRAM_CTL14_MAX_COL_REG(v) \ + (((v) << 24) & BM_DRAM_CTL14_MAX_COL_REG) +#define BP_DRAM_CTL14_RSVD3 20 +#define BM_DRAM_CTL14_RSVD3 0x00F00000 +#define BF_DRAM_CTL14_RSVD3(v) \ + (((v) << 20) & BM_DRAM_CTL14_RSVD3) +#define BP_DRAM_CTL14_LOWPOWER_REFRESH_ENABLE 16 +#define BM_DRAM_CTL14_LOWPOWER_REFRESH_ENABLE 0x000F0000 +#define BF_DRAM_CTL14_LOWPOWER_REFRESH_ENABLE(v) \ + (((v) << 16) & BM_DRAM_CTL14_LOWPOWER_REFRESH_ENABLE) +#define BP_DRAM_CTL14_RSVD2 12 +#define BM_DRAM_CTL14_RSVD2 0x0000F000 +#define BF_DRAM_CTL14_RSVD2(v) \ + (((v) << 12) & BM_DRAM_CTL14_RSVD2) +#define BP_DRAM_CTL14_INITAREF 8 +#define BM_DRAM_CTL14_INITAREF 0x00000F00 +#define BF_DRAM_CTL14_INITAREF(v) \ + (((v) << 8) & BM_DRAM_CTL14_INITAREF) +#define BP_DRAM_CTL14_RSVD1 4 +#define BM_DRAM_CTL14_RSVD1 0x000000F0 +#define BF_DRAM_CTL14_RSVD1(v) \ + (((v) << 4) & BM_DRAM_CTL14_RSVD1) +#define BP_DRAM_CTL14_CS_MAP 0 +#define BM_DRAM_CTL14_CS_MAP 0x0000000F +#define BF_DRAM_CTL14_CS_MAP(v) \ + (((v) << 0) & BM_DRAM_CTL14_CS_MAP) + +#define HW_DRAM_CTL15 (0x0000003c) +#define HW_DRAM_CTL15_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL15) + +#define BP_DRAM_CTL15_RSVD4 28 +#define BM_DRAM_CTL15_RSVD4 0xF0000000 +#define BF_DRAM_CTL15_RSVD4(v) \ + (((v) << 28) & BM_DRAM_CTL15_RSVD4) +#define BP_DRAM_CTL15_TRP 24 +#define BM_DRAM_CTL15_TRP 0x0F000000 +#define BF_DRAM_CTL15_TRP(v) \ + (((v) << 24) & BM_DRAM_CTL15_TRP) +#define BP_DRAM_CTL15_RSVD3 20 +#define BM_DRAM_CTL15_RSVD3 0x00F00000 +#define BF_DRAM_CTL15_RSVD3(v) \ + (((v) << 20) & BM_DRAM_CTL15_RSVD3) +#define BP_DRAM_CTL15_TDAL 16 +#define BM_DRAM_CTL15_TDAL 0x000F0000 +#define BF_DRAM_CTL15_TDAL(v) \ + (((v) << 16) & BM_DRAM_CTL15_TDAL) +#define BP_DRAM_CTL15_RSVD2 12 +#define BM_DRAM_CTL15_RSVD2 0x0000F000 +#define BF_DRAM_CTL15_RSVD2(v) \ + (((v) << 12) & BM_DRAM_CTL15_RSVD2) +#define BP_DRAM_CTL15_PORT_BUSY 8 +#define BM_DRAM_CTL15_PORT_BUSY 0x00000F00 +#define BF_DRAM_CTL15_PORT_BUSY(v) \ + (((v) << 8) & BM_DRAM_CTL15_PORT_BUSY) +#define BP_DRAM_CTL15_RSVD1 4 +#define BM_DRAM_CTL15_RSVD1 0x000000F0 +#define BF_DRAM_CTL15_RSVD1(v) \ + (((v) << 4) & BM_DRAM_CTL15_RSVD1) +#define BP_DRAM_CTL15_MAX_ROW_REG 0 +#define BM_DRAM_CTL15_MAX_ROW_REG 0x0000000F +#define BF_DRAM_CTL15_MAX_ROW_REG(v) \ + (((v) << 0) & BM_DRAM_CTL15_MAX_ROW_REG) + +#define HW_DRAM_CTL16 (0x00000040) +#define HW_DRAM_CTL16_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL16) + +#define BP_DRAM_CTL16_RSVD4 29 +#define BM_DRAM_CTL16_RSVD4 0xE0000000 +#define BF_DRAM_CTL16_RSVD4(v) \ + (((v) << 29) & BM_DRAM_CTL16_RSVD4) +#define BP_DRAM_CTL16_TMRD 24 +#define BM_DRAM_CTL16_TMRD 0x1F000000 +#define BF_DRAM_CTL16_TMRD(v) \ + (((v) << 24) & BM_DRAM_CTL16_TMRD) +#define BP_DRAM_CTL16_RSVD3 21 +#define BM_DRAM_CTL16_RSVD3 0x00E00000 +#define BF_DRAM_CTL16_RSVD3(v) \ + (((v) << 21) & BM_DRAM_CTL16_RSVD3) +#define BP_DRAM_CTL16_LOWPOWER_CONTROL 16 +#define BM_DRAM_CTL16_LOWPOWER_CONTROL 0x001F0000 +#define BF_DRAM_CTL16_LOWPOWER_CONTROL(v) \ + (((v) << 16) & BM_DRAM_CTL16_LOWPOWER_CONTROL) +#define BP_DRAM_CTL16_RSVD2 13 +#define BM_DRAM_CTL16_RSVD2 0x0000E000 +#define BF_DRAM_CTL16_RSVD2(v) \ + (((v) << 13) & BM_DRAM_CTL16_RSVD2) +#define BP_DRAM_CTL16_LOWPOWER_AUTO_ENABLE 8 +#define BM_DRAM_CTL16_LOWPOWER_AUTO_ENABLE 0x00001F00 +#define BF_DRAM_CTL16_LOWPOWER_AUTO_ENABLE(v) \ + (((v) << 8) & BM_DRAM_CTL16_LOWPOWER_AUTO_ENABLE) +#define BP_DRAM_CTL16_RSVD1 4 +#define BM_DRAM_CTL16_RSVD1 0x000000F0 +#define BF_DRAM_CTL16_RSVD1(v) \ + (((v) << 4) & BM_DRAM_CTL16_RSVD1) +#define BP_DRAM_CTL16_INT_ACK 0 +#define BM_DRAM_CTL16_INT_ACK 0x0000000F +#define BF_DRAM_CTL16_INT_ACK(v) \ + (((v) << 0) & BM_DRAM_CTL16_INT_ACK) + +#define HW_DRAM_CTL17 (0x00000044) +#define HW_DRAM_CTL17_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL17) + +#define BP_DRAM_CTL17_DLL_START_POINT 24 +#define BM_DRAM_CTL17_DLL_START_POINT 0xFF000000 +#define BF_DRAM_CTL17_DLL_START_POINT(v) \ + (((v) << 24) & BM_DRAM_CTL17_DLL_START_POINT) +#define BP_DRAM_CTL17_DLL_LOCK 16 +#define BM_DRAM_CTL17_DLL_LOCK 0x00FF0000 +#define BF_DRAM_CTL17_DLL_LOCK(v) \ + (((v) << 16) & BM_DRAM_CTL17_DLL_LOCK) +#define BP_DRAM_CTL17_DLL_INCREMENT 8 +#define BM_DRAM_CTL17_DLL_INCREMENT 0x0000FF00 +#define BF_DRAM_CTL17_DLL_INCREMENT(v) \ + (((v) << 8) & BM_DRAM_CTL17_DLL_INCREMENT) +#define BP_DRAM_CTL17_RSVD1 5 +#define BM_DRAM_CTL17_RSVD1 0x000000E0 +#define BF_DRAM_CTL17_RSVD1(v) \ + (((v) << 5) & BM_DRAM_CTL17_RSVD1) +#define BP_DRAM_CTL17_TRC 0 +#define BM_DRAM_CTL17_TRC 0x0000001F +#define BF_DRAM_CTL17_TRC(v) \ + (((v) << 0) & BM_DRAM_CTL17_TRC) + +#define HW_DRAM_CTL18 (0x00000048) +#define HW_DRAM_CTL18_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL18) + +#define BM_DRAM_CTL18_RSVD4 0x80000000 +#define BP_DRAM_CTL18_DLL_DQS_DELAY_1 24 +#define BM_DRAM_CTL18_DLL_DQS_DELAY_1 0x7F000000 +#define BF_DRAM_CTL18_DLL_DQS_DELAY_1(v) \ + (((v) << 24) & BM_DRAM_CTL18_DLL_DQS_DELAY_1) +#define BM_DRAM_CTL18_RSVD3 0x00800000 +#define BP_DRAM_CTL18_DLL_DQS_DELAY_0 16 +#define BM_DRAM_CTL18_DLL_DQS_DELAY_0 0x007F0000 +#define BF_DRAM_CTL18_DLL_DQS_DELAY_0(v) \ + (((v) << 16) & BM_DRAM_CTL18_DLL_DQS_DELAY_0) +#define BP_DRAM_CTL18_RSVD2 13 +#define BM_DRAM_CTL18_RSVD2 0x0000E000 +#define BF_DRAM_CTL18_RSVD2(v) \ + (((v) << 13) & BM_DRAM_CTL18_RSVD2) +#define BP_DRAM_CTL18_INT_STATUS 8 +#define BM_DRAM_CTL18_INT_STATUS 0x00001F00 +#define BF_DRAM_CTL18_INT_STATUS(v) \ + (((v) << 8) & BM_DRAM_CTL18_INT_STATUS) +#define BP_DRAM_CTL18_RSVD1 5 +#define BM_DRAM_CTL18_RSVD1 0x000000E0 +#define BF_DRAM_CTL18_RSVD1(v) \ + (((v) << 5) & BM_DRAM_CTL18_RSVD1) +#define BP_DRAM_CTL18_INT_MASK 0 +#define BM_DRAM_CTL18_INT_MASK 0x0000001F +#define BF_DRAM_CTL18_INT_MASK(v) \ + (((v) << 0) & BM_DRAM_CTL18_INT_MASK) + +#define HW_DRAM_CTL19 (0x0000004c) +#define HW_DRAM_CTL19_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL19) + +#define BP_DRAM_CTL19_DQS_OUT_SHIFT_BYPASS 24 +#define BM_DRAM_CTL19_DQS_OUT_SHIFT_BYPASS 0xFF000000 +#define BF_DRAM_CTL19_DQS_OUT_SHIFT_BYPASS(v) \ + (((v) << 24) & BM_DRAM_CTL19_DQS_OUT_SHIFT_BYPASS) +#define BM_DRAM_CTL19_RSVD1 0x00800000 +#define BP_DRAM_CTL19_DQS_OUT_SHIFT 16 +#define BM_DRAM_CTL19_DQS_OUT_SHIFT 0x007F0000 +#define BF_DRAM_CTL19_DQS_OUT_SHIFT(v) \ + (((v) << 16) & BM_DRAM_CTL19_DQS_OUT_SHIFT) +#define BP_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_1 8 +#define BM_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_1 0x0000FF00 +#define BF_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_1(v) \ + (((v) << 8) & BM_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_1) +#define BP_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_0 0 +#define BM_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_0 0x000000FF +#define BF_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_0(v) \ + (((v) << 0) & BM_DRAM_CTL19_DLL_DQS_DELAY_BYPASS_0) + +#define HW_DRAM_CTL20 (0x00000050) +#define HW_DRAM_CTL20_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL20) + +#define BP_DRAM_CTL20_TRCD_INT 24 +#define BM_DRAM_CTL20_TRCD_INT 0xFF000000 +#define BF_DRAM_CTL20_TRCD_INT(v) \ + (((v) << 24) & BM_DRAM_CTL20_TRCD_INT) +#define BP_DRAM_CTL20_TRAS_MIN 16 +#define BM_DRAM_CTL20_TRAS_MIN 0x00FF0000 +#define BF_DRAM_CTL20_TRAS_MIN(v) \ + (((v) << 16) & BM_DRAM_CTL20_TRAS_MIN) +#define BP_DRAM_CTL20_WR_DQS_SHIFT_BYPASS 8 +#define BM_DRAM_CTL20_WR_DQS_SHIFT_BYPASS 0x0000FF00 +#define BF_DRAM_CTL20_WR_DQS_SHIFT_BYPASS(v) \ + (((v) << 8) & BM_DRAM_CTL20_WR_DQS_SHIFT_BYPASS) +#define BM_DRAM_CTL20_RSVD1 0x00000080 +#define BP_DRAM_CTL20_WR_DQS_SHIFT 0 +#define BM_DRAM_CTL20_WR_DQS_SHIFT 0x0000007F +#define BF_DRAM_CTL20_WR_DQS_SHIFT(v) \ + (((v) << 0) & BM_DRAM_CTL20_WR_DQS_SHIFT) + +#define HW_DRAM_CTL21 (0x00000054) +#define HW_DRAM_CTL21_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL21) + +#define BP_DRAM_CTL21_OBSOLETE 24 +#define BM_DRAM_CTL21_OBSOLETE 0xFF000000 +#define BF_DRAM_CTL21_OBSOLETE(v) \ + (((v) << 24) & BM_DRAM_CTL21_OBSOLETE) +#define BP_DRAM_CTL21_RSVD1 18 +#define BM_DRAM_CTL21_RSVD1 0x00FC0000 +#define BF_DRAM_CTL21_RSVD1(v) \ + (((v) << 18) & BM_DRAM_CTL21_RSVD1) +#define BP_DRAM_CTL21_OUT_OF_RANGE_LENGTH 8 +#define BM_DRAM_CTL21_OUT_OF_RANGE_LENGTH 0x0003FF00 +#define BF_DRAM_CTL21_OUT_OF_RANGE_LENGTH(v) \ + (((v) << 8) & BM_DRAM_CTL21_OUT_OF_RANGE_LENGTH) +#define BP_DRAM_CTL21_TRFC 0 +#define BM_DRAM_CTL21_TRFC 0x000000FF +#define BF_DRAM_CTL21_TRFC(v) \ + (((v) << 0) & BM_DRAM_CTL21_TRFC) + +#define HW_DRAM_CTL22 (0x00000058) +#define HW_DRAM_CTL22_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL22) + +#define BP_DRAM_CTL22_RSVD2 27 +#define BM_DRAM_CTL22_RSVD2 0xF8000000 +#define BF_DRAM_CTL22_RSVD2(v) \ + (((v) << 27) & BM_DRAM_CTL22_RSVD2) +#define BP_DRAM_CTL22_AHB0_WRCNT 16 +#define BM_DRAM_CTL22_AHB0_WRCNT 0x07FF0000 +#define BF_DRAM_CTL22_AHB0_WRCNT(v) \ + (((v) << 16) & BM_DRAM_CTL22_AHB0_WRCNT) +#define BP_DRAM_CTL22_RSVD1 11 +#define BM_DRAM_CTL22_RSVD1 0x0000F800 +#define BF_DRAM_CTL22_RSVD1(v) \ + (((v) << 11) & BM_DRAM_CTL22_RSVD1) +#define BP_DRAM_CTL22_AHB0_RDCNT 0 +#define BM_DRAM_CTL22_AHB0_RDCNT 0x000007FF +#define BF_DRAM_CTL22_AHB0_RDCNT(v) \ + (((v) << 0) & BM_DRAM_CTL22_AHB0_RDCNT) + +#define HW_DRAM_CTL23 (0x0000005c) +#define HW_DRAM_CTL23_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL23) + +#define BP_DRAM_CTL23_RSVD2 27 +#define BM_DRAM_CTL23_RSVD2 0xF8000000 +#define BF_DRAM_CTL23_RSVD2(v) \ + (((v) << 27) & BM_DRAM_CTL23_RSVD2) +#define BP_DRAM_CTL23_AHB1_WRCNT 16 +#define BM_DRAM_CTL23_AHB1_WRCNT 0x07FF0000 +#define BF_DRAM_CTL23_AHB1_WRCNT(v) \ + (((v) << 16) & BM_DRAM_CTL23_AHB1_WRCNT) +#define BP_DRAM_CTL23_RSVD1 11 +#define BM_DRAM_CTL23_RSVD1 0x0000F800 +#define BF_DRAM_CTL23_RSVD1(v) \ + (((v) << 11) & BM_DRAM_CTL23_RSVD1) +#define BP_DRAM_CTL23_AHB1_RDCNT 0 +#define BM_DRAM_CTL23_AHB1_RDCNT 0x000007FF +#define BF_DRAM_CTL23_AHB1_RDCNT(v) \ + (((v) << 0) & BM_DRAM_CTL23_AHB1_RDCNT) + +#define HW_DRAM_CTL24 (0x00000060) +#define HW_DRAM_CTL24_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL24) + +#define BP_DRAM_CTL24_RSVD2 27 +#define BM_DRAM_CTL24_RSVD2 0xF8000000 +#define BF_DRAM_CTL24_RSVD2(v) \ + (((v) << 27) & BM_DRAM_CTL24_RSVD2) +#define BP_DRAM_CTL24_AHB2_WRCNT 16 +#define BM_DRAM_CTL24_AHB2_WRCNT 0x07FF0000 +#define BF_DRAM_CTL24_AHB2_WRCNT(v) \ + (((v) << 16) & BM_DRAM_CTL24_AHB2_WRCNT) +#define BP_DRAM_CTL24_RSVD1 11 +#define BM_DRAM_CTL24_RSVD1 0x0000F800 +#define BF_DRAM_CTL24_RSVD1(v) \ + (((v) << 11) & BM_DRAM_CTL24_RSVD1) +#define BP_DRAM_CTL24_AHB2_RDCNT 0 +#define BM_DRAM_CTL24_AHB2_RDCNT 0x000007FF +#define BF_DRAM_CTL24_AHB2_RDCNT(v) \ + (((v) << 0) & BM_DRAM_CTL24_AHB2_RDCNT) + +#define HW_DRAM_CTL25 (0x00000064) +#define HW_DRAM_CTL25_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL25) + +#define BP_DRAM_CTL25_RSVD2 27 +#define BM_DRAM_CTL25_RSVD2 0xF8000000 +#define BF_DRAM_CTL25_RSVD2(v) \ + (((v) << 27) & BM_DRAM_CTL25_RSVD2) +#define BP_DRAM_CTL25_AHB3_WRCNT 16 +#define BM_DRAM_CTL25_AHB3_WRCNT 0x07FF0000 +#define BF_DRAM_CTL25_AHB3_WRCNT(v) \ + (((v) << 16) & BM_DRAM_CTL25_AHB3_WRCNT) +#define BP_DRAM_CTL25_RSVD1 11 +#define BM_DRAM_CTL25_RSVD1 0x0000F800 +#define BF_DRAM_CTL25_RSVD1(v) \ + (((v) << 11) & BM_DRAM_CTL25_RSVD1) +#define BP_DRAM_CTL25_AHB3_RDCNT 0 +#define BM_DRAM_CTL25_AHB3_RDCNT 0x000007FF +#define BF_DRAM_CTL25_AHB3_RDCNT(v) \ + (((v) << 0) & BM_DRAM_CTL25_AHB3_RDCNT) + +#define HW_DRAM_CTL26 (0x00000068) +#define HW_DRAM_CTL26_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL26) + +#define BP_DRAM_CTL26_OBSOLETE 16 +#define BM_DRAM_CTL26_OBSOLETE 0xFFFF0000 +#define BF_DRAM_CTL26_OBSOLETE(v) \ + (((v) << 16) & BM_DRAM_CTL26_OBSOLETE) +#define BP_DRAM_CTL26_RSVD1 12 +#define BM_DRAM_CTL26_RSVD1 0x0000F000 +#define BF_DRAM_CTL26_RSVD1(v) \ + (((v) << 12) & BM_DRAM_CTL26_RSVD1) +#define BP_DRAM_CTL26_TREF 0 +#define BM_DRAM_CTL26_TREF 0x00000FFF +#define BF_DRAM_CTL26_TREF(v) \ + (((v) << 0) & BM_DRAM_CTL26_TREF) + +#define HW_DRAM_CTL27 (0x0000006c) +#define HW_DRAM_CTL27_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL27) + +#define BP_DRAM_CTL27_OBSOLETE 0 +#define BM_DRAM_CTL27_OBSOLETE 0xFFFFFFFF +#define BF_DRAM_CTL27_OBSOLETE(v) (v) + +#define HW_DRAM_CTL28 (0x00000070) +#define HW_DRAM_CTL28_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL28) + +#define BP_DRAM_CTL28_OBSOLETE 0 +#define BM_DRAM_CTL28_OBSOLETE 0xFFFFFFFF +#define BF_DRAM_CTL28_OBSOLETE(v) (v) + +#define HW_DRAM_CTL29 (0x00000074) +#define HW_DRAM_CTL29_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL29) + +#define BP_DRAM_CTL29_LOWPOWER_INTERNAL_CNT 16 +#define BM_DRAM_CTL29_LOWPOWER_INTERNAL_CNT 0xFFFF0000 +#define BF_DRAM_CTL29_LOWPOWER_INTERNAL_CNT(v) \ + (((v) << 16) & BM_DRAM_CTL29_LOWPOWER_INTERNAL_CNT) +#define BP_DRAM_CTL29_LOWPOWER_EXTERNAL_CNT 0 +#define BM_DRAM_CTL29_LOWPOWER_EXTERNAL_CNT 0x0000FFFF +#define BF_DRAM_CTL29_LOWPOWER_EXTERNAL_CNT(v) \ + (((v) << 0) & BM_DRAM_CTL29_LOWPOWER_EXTERNAL_CNT) + +#define HW_DRAM_CTL30 (0x00000078) +#define HW_DRAM_CTL30_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL30) + +#define BP_DRAM_CTL30_LOWPOWER_REFRESH_HOLD 16 +#define BM_DRAM_CTL30_LOWPOWER_REFRESH_HOLD 0xFFFF0000 +#define BF_DRAM_CTL30_LOWPOWER_REFRESH_HOLD(v) \ + (((v) << 16) & BM_DRAM_CTL30_LOWPOWER_REFRESH_HOLD) +#define BP_DRAM_CTL30_LOWPOWER_POWER_DOWN_CNT 0 +#define BM_DRAM_CTL30_LOWPOWER_POWER_DOWN_CNT 0x0000FFFF +#define BF_DRAM_CTL30_LOWPOWER_POWER_DOWN_CNT(v) \ + (((v) << 0) & BM_DRAM_CTL30_LOWPOWER_POWER_DOWN_CNT) + +#define HW_DRAM_CTL31 (0x0000007c) +#define HW_DRAM_CTL31_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL31) + +#define BP_DRAM_CTL31_TDLL 16 +#define BM_DRAM_CTL31_TDLL 0xFFFF0000 +#define BF_DRAM_CTL31_TDLL(v) \ + (((v) << 16) & BM_DRAM_CTL31_TDLL) +#define BP_DRAM_CTL31_LOWPOWER_SELF_REFRESH_CNT 0 +#define BM_DRAM_CTL31_LOWPOWER_SELF_REFRESH_CNT 0x0000FFFF +#define BF_DRAM_CTL31_LOWPOWER_SELF_REFRESH_CNT(v) \ + (((v) << 0) & BM_DRAM_CTL31_LOWPOWER_SELF_REFRESH_CNT) + +#define HW_DRAM_CTL32 (0x00000080) +#define HW_DRAM_CTL32_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL32) + +#define BP_DRAM_CTL32_TXSNR 16 +#define BM_DRAM_CTL32_TXSNR 0xFFFF0000 +#define BF_DRAM_CTL32_TXSNR(v) \ + (((v) << 16) & BM_DRAM_CTL32_TXSNR) +#define BP_DRAM_CTL32_TRAS_MAX 0 +#define BM_DRAM_CTL32_TRAS_MAX 0x0000FFFF +#define BF_DRAM_CTL32_TRAS_MAX(v) \ + (((v) << 0) & BM_DRAM_CTL32_TRAS_MAX) + +#define HW_DRAM_CTL33 (0x00000084) +#define HW_DRAM_CTL33_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL33) + +#define BP_DRAM_CTL33_VERSION 16 +#define BM_DRAM_CTL33_VERSION 0xFFFF0000 +#define BF_DRAM_CTL33_VERSION(v) \ + (((v) << 16) & BM_DRAM_CTL33_VERSION) +#define BP_DRAM_CTL33_TXSR 0 +#define BM_DRAM_CTL33_TXSR 0x0000FFFF +#define BF_DRAM_CTL33_TXSR(v) \ + (((v) << 0) & BM_DRAM_CTL33_TXSR) + +#define HW_DRAM_CTL34 (0x00000088) +#define HW_DRAM_CTL34_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL34) + +#define BP_DRAM_CTL34_RSVD1 24 +#define BM_DRAM_CTL34_RSVD1 0xFF000000 +#define BF_DRAM_CTL34_RSVD1(v) \ + (((v) << 24) & BM_DRAM_CTL34_RSVD1) +#define BP_DRAM_CTL34_TINIT 0 +#define BM_DRAM_CTL34_TINIT 0x00FFFFFF +#define BF_DRAM_CTL34_TINIT(v) \ + (((v) << 0) & BM_DRAM_CTL34_TINIT) + +#define HW_DRAM_CTL35 (0x0000008c) +#define HW_DRAM_CTL35_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL35) + +#define BM_DRAM_CTL35_RSVD1 0x80000000 +#define BP_DRAM_CTL35_OUT_OF_RANGE_ADDR 0 +#define BM_DRAM_CTL35_OUT_OF_RANGE_ADDR 0x7FFFFFFF +#define BF_DRAM_CTL35_OUT_OF_RANGE_ADDR(v) \ + (((v) << 0) & BM_DRAM_CTL35_OUT_OF_RANGE_ADDR) + +#define HW_DRAM_CTL36 (0x00000090) +#define HW_DRAM_CTL36_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL36) + +#define BP_DRAM_CTL36_RSVD4 25 +#define BM_DRAM_CTL36_RSVD4 0xFE000000 +#define BF_DRAM_CTL36_RSVD4(v) \ + (((v) << 25) & BM_DRAM_CTL36_RSVD4) +#define BM_DRAM_CTL36_PWRUP_SREFRESH_EXIT 0x01000000 +#define BP_DRAM_CTL36_RSVD3 17 +#define BM_DRAM_CTL36_RSVD3 0x00FE0000 +#define BF_DRAM_CTL36_RSVD3(v) \ + (((v) << 17) & BM_DRAM_CTL36_RSVD3) +#define BM_DRAM_CTL36_ENABLE_QUICK_SREFRESH 0x00010000 +#define BP_DRAM_CTL36_RSVD2 9 +#define BM_DRAM_CTL36_RSVD2 0x0000FE00 +#define BF_DRAM_CTL36_RSVD2(v) \ + (((v) << 9) & BM_DRAM_CTL36_RSVD2) +#define BM_DRAM_CTL36_BUS_SHARE_ENABLE 0x00000100 +#define BP_DRAM_CTL36_RSVD1 1 +#define BM_DRAM_CTL36_RSVD1 0x000000FE +#define BF_DRAM_CTL36_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL36_RSVD1) +#define BM_DRAM_CTL36_ACTIVE_AGING 0x00000001 + +#define HW_DRAM_CTL37 (0x00000094) +#define HW_DRAM_CTL37_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL37) + +#define BP_DRAM_CTL37_OBSOLETE 24 +#define BM_DRAM_CTL37_OBSOLETE 0xFF000000 +#define BF_DRAM_CTL37_OBSOLETE(v) \ + (((v) << 24) & BM_DRAM_CTL37_OBSOLETE) +#define BP_DRAM_CTL37_RSVD2 18 +#define BM_DRAM_CTL37_RSVD2 0x00FC0000 +#define BF_DRAM_CTL37_RSVD2(v) \ + (((v) << 18) & BM_DRAM_CTL37_RSVD2) +#define BP_DRAM_CTL37_BUS_SHARE_TIMEOUT 8 +#define BM_DRAM_CTL37_BUS_SHARE_TIMEOUT 0x0003FF00 +#define BF_DRAM_CTL37_BUS_SHARE_TIMEOUT(v) \ + (((v) << 8) & BM_DRAM_CTL37_BUS_SHARE_TIMEOUT) +#define BP_DRAM_CTL37_RSVD1 1 +#define BM_DRAM_CTL37_RSVD1 0x000000FE +#define BF_DRAM_CTL37_RSVD1(v) \ + (((v) << 1) & BM_DRAM_CTL37_RSVD1) +#define BM_DRAM_CTL37_TREF_ENABLE 0x00000001 + +#define HW_DRAM_CTL38 (0x00000098) +#define HW_DRAM_CTL38_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL38) + +#define BP_DRAM_CTL38_RSVD2 29 +#define BM_DRAM_CTL38_RSVD2 0xE0000000 +#define BF_DRAM_CTL38_RSVD2(v) \ + (((v) << 29) & BM_DRAM_CTL38_RSVD2) +#define BP_DRAM_CTL38_EMRS2_DATA_0 16 +#define BM_DRAM_CTL38_EMRS2_DATA_0 0x1FFF0000 +#define BF_DRAM_CTL38_EMRS2_DATA_0(v) \ + (((v) << 16) & BM_DRAM_CTL38_EMRS2_DATA_0) +#define BP_DRAM_CTL38_RSVD1 13 +#define BM_DRAM_CTL38_RSVD1 0x0000E000 +#define BF_DRAM_CTL38_RSVD1(v) \ + (((v) << 13) & BM_DRAM_CTL38_RSVD1) +#define BP_DRAM_CTL38_EMRS1_DATA 0 +#define BM_DRAM_CTL38_EMRS1_DATA 0x00001FFF +#define BF_DRAM_CTL38_EMRS1_DATA(v) \ + (((v) << 0) & BM_DRAM_CTL38_EMRS1_DATA) + +#define HW_DRAM_CTL39 (0x0000009c) +#define HW_DRAM_CTL39_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL39) + +#define BP_DRAM_CTL39_RSVD2 29 +#define BM_DRAM_CTL39_RSVD2 0xE0000000 +#define BF_DRAM_CTL39_RSVD2(v) \ + (((v) << 29) & BM_DRAM_CTL39_RSVD2) +#define BP_DRAM_CTL39_EMRS2_DATA_2 16 +#define BM_DRAM_CTL39_EMRS2_DATA_2 0x1FFF0000 +#define BF_DRAM_CTL39_EMRS2_DATA_2(v) \ + (((v) << 16) & BM_DRAM_CTL39_EMRS2_DATA_2) +#define BP_DRAM_CTL39_RSVD1 13 +#define BM_DRAM_CTL39_RSVD1 0x0000E000 +#define BF_DRAM_CTL39_RSVD1(v) \ + (((v) << 13) & BM_DRAM_CTL39_RSVD1) +#define BP_DRAM_CTL39_EMRS2_DATA_1 0 +#define BM_DRAM_CTL39_EMRS2_DATA_1 0x00001FFF +#define BF_DRAM_CTL39_EMRS2_DATA_1(v) \ + (((v) << 0) & BM_DRAM_CTL39_EMRS2_DATA_1) + +#define HW_DRAM_CTL40 (0x000000a0) +#define HW_DRAM_CTL40_ADDR \ + (REGS_DRAM_BASE + HW_DRAM_CTL40) -#define HW_DRAM_CTL08 0x20 +#define BP_DRAM_CTL40_TPDEX 16 +#define BM_DRAM_CTL40_TPDEX 0xFFFF0000 +#define BF_DRAM_CTL40_TPDEX(v) \ + (((v) << 16) & BM_DRAM_CTL40_TPDEX) +#define BP_DRAM_CTL40_RSVD1 13 +#define BM_DRAM_CTL40_RSVD1 0x0000E000 +#define BF_DRAM_CTL40_RSVD1(v) \ + (((v) << 13) & BM_DRAM_CTL40_RSVD1) +#define BP_DRAM_CTL40_EMRS2_DATA_3 0 +#define BM_DRAM_CTL40_EMRS2_DATA_3 0x00001FFF +#define BF_DRAM_CTL40_EMRS2_DATA_3(v) \ + (((v) << 0) & BM_DRAM_CTL40_EMRS2_DATA_3) +#endif /* __ARCH_ARM___DRAM_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-emi.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-emi.h @@ -1,7 +1,7 @@ /* - * stmp378x: EMI register definitions + * STMP EMI Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,9 +17,257 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_EMI_BASE (STMP3XXX_REGS_BASE + 0x20000) -#define REGS_EMI_PHYS 0x80020000 -#define REGS_EMI_SIZE 0x2000 -#define HW_EMI_STAT 0x10 +#ifndef __ARCH_ARM___EMI_H +#define __ARCH_ARM___EMI_H 1 + +#define REGS_EMI_BASE (STMP3XXX_REGS_BASE + 0x20000) +#define REGS_EMI_PHYS (0x80020000) +#define REGS_EMI_SIZE 0x00002000 + +#define HW_EMI_CTRL (0x00000000) +#define HW_EMI_CTRL_SET (0x00000004) +#define HW_EMI_CTRL_CLR (0x00000008) +#define HW_EMI_CTRL_TOG (0x0000000c) +#define HW_EMI_CTRL_ADDR \ + (REGS_EMI_BASE + HW_EMI_CTRL) +#define HW_EMI_CTRL_SET_ADDR \ + (REGS_EMI_BASE + HW_EMI_CTRL_SET) +#define HW_EMI_CTRL_CLR_ADDR \ + (REGS_EMI_BASE + HW_EMI_CTRL_CLR) +#define HW_EMI_CTRL_TOG_ADDR \ + (REGS_EMI_BASE + HW_EMI_CTRL_TOG) + +#define BM_EMI_CTRL_SFTRST 0x80000000 +#define BM_EMI_CTRL_CLKGATE 0x40000000 +#define BM_EMI_CTRL_TRAP_SR 0x20000000 +#define BM_EMI_CTRL_TRAP_INIT 0x10000000 +#define BP_EMI_CTRL_AXI_DEPTH 26 +#define BM_EMI_CTRL_AXI_DEPTH 0x0C000000 +#define BF_EMI_CTRL_AXI_DEPTH(v) \ + (((v) << 26) & BM_EMI_CTRL_AXI_DEPTH) +#define BV_EMI_CTRL_AXI_DEPTH__ONE 0x0 +#define BV_EMI_CTRL_AXI_DEPTH__TWO 0x1 +#define BV_EMI_CTRL_AXI_DEPTH__THREE 0x2 +#define BV_EMI_CTRL_AXI_DEPTH__FOUR 0x3 +#define BM_EMI_CTRL_DLL_SHIFT_RESET 0x02000000 +#define BM_EMI_CTRL_DLL_RESET 0x01000000 +#define BP_EMI_CTRL_ARB_MODE 22 +#define BM_EMI_CTRL_ARB_MODE 0x00C00000 +#define BF_EMI_CTRL_ARB_MODE(v) \ + (((v) << 22) & BM_EMI_CTRL_ARB_MODE) +#define BV_EMI_CTRL_ARB_MODE__TIMESTAMP 0x0 +#define BV_EMI_CTRL_ARB_MODE__WRITE_HYBRID 0x1 +#define BV_EMI_CTRL_ARB_MODE__PORT_PRIORITY 0x2 +#define BM_EMI_CTRL_RSVD3 0x00200000 +#define BP_EMI_CTRL_PORT_PRIORITY_ORDER 16 +#define BM_EMI_CTRL_PORT_PRIORITY_ORDER 0x001F0000 +#define BF_EMI_CTRL_PORT_PRIORITY_ORDER(v) \ + (((v) << 16) & BM_EMI_CTRL_PORT_PRIORITY_ORDER) +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0123 0x00 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0312 0x01 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0231 0x02 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0321 0x03 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0213 0x04 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT0132 0x05 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1023 0x06 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1302 0x07 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1230 0x08 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1320 0x09 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1203 0x0A +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT1032 0x0B +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2013 0x0C +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2301 0x0D +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2130 0x0E +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2310 0x0F +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2103 0x10 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT2031 0x11 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3012 0x12 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3201 0x13 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3120 0x14 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3210 0x15 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3102 0x16 +#define BV_EMI_CTRL_PORT_PRIORITY_ORDER__PORT3021 0x17 +#define BM_EMI_CTRL_RSVD2 0x00008000 +#define BP_EMI_CTRL_PRIORITY_WRITE_ITER 12 +#define BM_EMI_CTRL_PRIORITY_WRITE_ITER 0x00007000 +#define BF_EMI_CTRL_PRIORITY_WRITE_ITER(v) \ + (((v) << 12) & BM_EMI_CTRL_PRIORITY_WRITE_ITER) +#define BM_EMI_CTRL_RSVD1 0x00000800 +#define BP_EMI_CTRL_HIGH_PRIORITY_WRITE 8 +#define BM_EMI_CTRL_HIGH_PRIORITY_WRITE 0x00000700 +#define BF_EMI_CTRL_HIGH_PRIORITY_WRITE(v) \ + (((v) << 8) & BM_EMI_CTRL_HIGH_PRIORITY_WRITE) +#define BM_EMI_CTRL_RSVD0 0x00000080 +#define BM_EMI_CTRL_MEM_WIDTH 0x00000040 +#define BM_EMI_CTRL_WRITE_PROTECT 0x00000020 +#define BM_EMI_CTRL_RESET_OUT 0x00000010 +#define BP_EMI_CTRL_CE_SELECT 0 +#define BM_EMI_CTRL_CE_SELECT 0x0000000F +#define BF_EMI_CTRL_CE_SELECT(v) \ + (((v) << 0) & BM_EMI_CTRL_CE_SELECT) +#define BV_EMI_CTRL_CE_SELECT__NONE 0x0 +#define BV_EMI_CTRL_CE_SELECT__CE0 0x1 +#define BV_EMI_CTRL_CE_SELECT__CE1 0x2 +#define BV_EMI_CTRL_CE_SELECT__CE2 0x4 +#define BV_EMI_CTRL_CE_SELECT__CE3 0x8 + +#define HW_EMI_STAT (0x00000010) +#define HW_EMI_STAT_ADDR \ + (REGS_EMI_BASE + HW_EMI_STAT) + +#define BM_EMI_STAT_DRAM_PRESENT 0x80000000 +#define BM_EMI_STAT_NOR_PRESENT 0x40000000 +#define BM_EMI_STAT_LARGE_DRAM_ENABLED 0x20000000 +#define BP_EMI_STAT_RSVD0 2 +#define BM_EMI_STAT_RSVD0 0x1FFFFFFC +#define BF_EMI_STAT_RSVD0(v) \ + (((v) << 2) & BM_EMI_STAT_RSVD0) +#define BM_EMI_STAT_DRAM_HALTED 0x00000002 +#define BV_EMI_STAT_DRAM_HALTED__NOT_HALTED 0x0 +#define BV_EMI_STAT_DRAM_HALTED__HALTED 0x1 +#define BM_EMI_STAT_NOR_BUSY 0x00000001 +#define BV_EMI_STAT_NOR_BUSY__NOT_BUSY 0x0 +#define BV_EMI_STAT_NOR_BUSY__BUSY 0x1 + +#define HW_EMI_TIME (0x00000020) +#define HW_EMI_TIME_SET (0x00000024) +#define HW_EMI_TIME_CLR (0x00000028) +#define HW_EMI_TIME_TOG (0x0000002c) +#define HW_EMI_TIME_ADDR \ + (REGS_EMI_BASE + HW_EMI_TIME) +#define HW_EMI_TIME_SET_ADDR \ + (REGS_EMI_BASE + HW_EMI_TIME_SET) +#define HW_EMI_TIME_CLR_ADDR \ + (REGS_EMI_BASE + HW_EMI_TIME_CLR) +#define HW_EMI_TIME_TOG_ADDR \ + (REGS_EMI_BASE + HW_EMI_TIME_TOG) + +#define BP_EMI_TIME_RSVD4 28 +#define BM_EMI_TIME_RSVD4 0xF0000000 +#define BF_EMI_TIME_RSVD4(v) \ + (((v) << 28) & BM_EMI_TIME_RSVD4) +#define BP_EMI_TIME_THZ 24 +#define BM_EMI_TIME_THZ 0x0F000000 +#define BF_EMI_TIME_THZ(v) \ + (((v) << 24) & BM_EMI_TIME_THZ) +#define BP_EMI_TIME_RSVD2 20 +#define BM_EMI_TIME_RSVD2 0x00F00000 +#define BF_EMI_TIME_RSVD2(v) \ + (((v) << 20) & BM_EMI_TIME_RSVD2) +#define BP_EMI_TIME_TDH 16 +#define BM_EMI_TIME_TDH 0x000F0000 +#define BF_EMI_TIME_TDH(v) \ + (((v) << 16) & BM_EMI_TIME_TDH) +#define BP_EMI_TIME_RSVD1 13 +#define BM_EMI_TIME_RSVD1 0x0000E000 +#define BF_EMI_TIME_RSVD1(v) \ + (((v) << 13) & BM_EMI_TIME_RSVD1) +#define BP_EMI_TIME_TDS 8 +#define BM_EMI_TIME_TDS 0x00001F00 +#define BF_EMI_TIME_TDS(v) \ + (((v) << 8) & BM_EMI_TIME_TDS) +#define BP_EMI_TIME_RSVD0 4 +#define BM_EMI_TIME_RSVD0 0x000000F0 +#define BF_EMI_TIME_RSVD0(v) \ + (((v) << 4) & BM_EMI_TIME_RSVD0) +#define BP_EMI_TIME_TAS 0 +#define BM_EMI_TIME_TAS 0x0000000F +#define BF_EMI_TIME_TAS(v) \ + (((v) << 0) & BM_EMI_TIME_TAS) + +#define HW_EMI_DDR_TEST_MODE_CSR (0x00000030) +#define HW_EMI_DDR_TEST_MODE_CSR_SET (0x00000034) +#define HW_EMI_DDR_TEST_MODE_CSR_CLR (0x00000038) +#define HW_EMI_DDR_TEST_MODE_CSR_TOG (0x0000003c) +#define HW_EMI_DDR_TEST_MODE_CSR_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_CSR) +#define HW_EMI_DDR_TEST_MODE_CSR_SET_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_CSR_SET) +#define HW_EMI_DDR_TEST_MODE_CSR_CLR_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_CSR_CLR) +#define HW_EMI_DDR_TEST_MODE_CSR_TOG_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_CSR_TOG) + +#define BP_EMI_DDR_TEST_MODE_CSR_RSVD1 2 +#define BM_EMI_DDR_TEST_MODE_CSR_RSVD1 0xFFFFFFFC +#define BF_EMI_DDR_TEST_MODE_CSR_RSVD1(v) \ + (((v) << 2) & BM_EMI_DDR_TEST_MODE_CSR_RSVD1) +#define BM_EMI_DDR_TEST_MODE_CSR_DONE 0x00000002 +#define BM_EMI_DDR_TEST_MODE_CSR_START 0x00000001 + +#define HW_EMI_DEBUG (0x00000080) +#define HW_EMI_DEBUG_ADDR \ + (REGS_EMI_BASE + HW_EMI_DEBUG) + +#define BP_EMI_DEBUG_RSVD1 4 +#define BM_EMI_DEBUG_RSVD1 0xFFFFFFF0 +#define BF_EMI_DEBUG_RSVD1(v) \ + (((v) << 4) & BM_EMI_DEBUG_RSVD1) +#define BP_EMI_DEBUG_NOR_STATE 0 +#define BM_EMI_DEBUG_NOR_STATE 0x0000000F +#define BF_EMI_DEBUG_NOR_STATE(v) \ + (((v) << 0) & BM_EMI_DEBUG_NOR_STATE) + +#define HW_EMI_DDR_TEST_MODE_STATUS0 (0x00000090) +#define HW_EMI_DDR_TEST_MODE_STATUS0_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_STATUS0) + +#define BP_EMI_DDR_TEST_MODE_STATUS0_RSVD1 13 +#define BM_EMI_DDR_TEST_MODE_STATUS0_RSVD1 0xFFFFE000 +#define BF_EMI_DDR_TEST_MODE_STATUS0_RSVD1(v) \ + (((v) << 13) & BM_EMI_DDR_TEST_MODE_STATUS0_RSVD1) +#define BP_EMI_DDR_TEST_MODE_STATUS0_ADDR0 0 +#define BM_EMI_DDR_TEST_MODE_STATUS0_ADDR0 0x00001FFF +#define BF_EMI_DDR_TEST_MODE_STATUS0_ADDR0(v) \ + (((v) << 0) & BM_EMI_DDR_TEST_MODE_STATUS0_ADDR0) + +#define HW_EMI_DDR_TEST_MODE_STATUS1 (0x000000a0) +#define HW_EMI_DDR_TEST_MODE_STATUS1_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_STATUS1) + +#define BP_EMI_DDR_TEST_MODE_STATUS1_RSVD1 13 +#define BM_EMI_DDR_TEST_MODE_STATUS1_RSVD1 0xFFFFE000 +#define BF_EMI_DDR_TEST_MODE_STATUS1_RSVD1(v) \ + (((v) << 13) & BM_EMI_DDR_TEST_MODE_STATUS1_RSVD1) +#define BP_EMI_DDR_TEST_MODE_STATUS1_ADDR1 0 +#define BM_EMI_DDR_TEST_MODE_STATUS1_ADDR1 0x00001FFF +#define BF_EMI_DDR_TEST_MODE_STATUS1_ADDR1(v) \ + (((v) << 0) & BM_EMI_DDR_TEST_MODE_STATUS1_ADDR1) + +#define HW_EMI_DDR_TEST_MODE_STATUS2 (0x000000b0) +#define HW_EMI_DDR_TEST_MODE_STATUS2_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_STATUS2) + +#define BP_EMI_DDR_TEST_MODE_STATUS2_DATA0 0 +#define BM_EMI_DDR_TEST_MODE_STATUS2_DATA0 0xFFFFFFFF +#define BF_EMI_DDR_TEST_MODE_STATUS2_DATA0(v) (v) + +#define HW_EMI_DDR_TEST_MODE_STATUS3 (0x000000c0) +#define HW_EMI_DDR_TEST_MODE_STATUS3_ADDR \ + (REGS_EMI_BASE + HW_EMI_DDR_TEST_MODE_STATUS3) + +#define BP_EMI_DDR_TEST_MODE_STATUS3_DATA1 0 +#define BM_EMI_DDR_TEST_MODE_STATUS3_DATA1 0xFFFFFFFF +#define BF_EMI_DDR_TEST_MODE_STATUS3_DATA1(v) (v) + +#define HW_EMI_VERSION (0x000000f0) +#define HW_EMI_VERSION_ADDR \ + (REGS_EMI_BASE + HW_EMI_VERSION) + +#define BP_EMI_VERSION_MAJOR 24 +#define BM_EMI_VERSION_MAJOR 0xFF000000 +#define BF_EMI_VERSION_MAJOR(v) \ + (((v) << 24) & BM_EMI_VERSION_MAJOR) +#define BP_EMI_VERSION_MINOR 16 +#define BM_EMI_VERSION_MINOR 0x00FF0000 +#define BF_EMI_VERSION_MINOR(v) \ + (((v) << 16) & BM_EMI_VERSION_MINOR) +#define BP_EMI_VERSION_STEP 0 +#define BM_EMI_VERSION_STEP 0x0000FFFF +#define BF_EMI_VERSION_STEP(v) \ + (((v) << 0) & BM_EMI_VERSION_STEP) +#endif /* __ARCH_ARM___EMI_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/pins.h @@ -19,6 +19,32 @@ #define __ASM_ARCH_PINS_H /* + * The number of pin banks and pins per a bank on STMP378x + */ +#define STMP3XXX_PINMUX_NR_BANKS 4 +#define STMP3XXX_PINMUX_BANK_SIZE 32 + +/* + * Macro to convert a pin bank/number pair to a raw pin number + * STMP3XXX_PINMUX_BANK_SIZE and STMP3XXX_PINMUX_NR_BANKS should be + * defined before including this header. + */ +#define STMP3XXX_PINID(bank, pin) (bank * STMP3XXX_PINMUX_BANK_SIZE + pin) +#define STMP3XXX_PINID_TO_BANK(pinid) (pinid / STMP3XXX_PINMUX_BANK_SIZE) +#define STMP3XXX_PINID_TO_PINNUM(pinid) (pinid % STMP3XXX_PINMUX_BANK_SIZE) + +/* + * Special invalid pin identificator to show a pin doesn't exist + */ +#define PINID_NO_PIN STMP3XXX_PINID(STMP3XXX_PINMUX_NR_BANKS, 0) + +static inline int stmp3xxx_valid_pin(unsigned pin) +{ + return STMP3XXX_PINID_TO_BANK(pin) < STMP3XXX_PINMUX_NR_BANKS && + STMP3XXX_PINID_TO_PINNUM(pin) < STMP3XXX_PINMUX_BANK_SIZE; +} + +/* * Define all STMP378x pins, a pin name corresponds to a STMP378x hardware * interface this pin belongs to. */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-apbx.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-apbx.h @@ -1,7 +1,7 @@ /* - * stmp378x: APBX register definitions + * STMP APBX Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,103 +17,465 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_APBX -#define _MACH_REGS_APBX - -#define REGS_APBX_BASE (STMP3XXX_REGS_BASE + 0x24000) -#define REGS_APBX_PHYS 0x80024000 -#define REGS_APBX_SIZE 0x2000 -#define HW_APBX_CTRL0 0x0 -#define BM_APBX_CTRL0_CLKGATE 0x40000000 -#define BM_APBX_CTRL0_SFTRST 0x80000000 +#ifndef __ARCH_ARM___APBX_H +#define __ARCH_ARM___APBX_H 1 -#define HW_APBX_CTRL1 0x10 +#define REGS_APBX_BASE (STMP3XXX_REGS_BASE + 0x24000) +#define REGS_APBX_PHYS (0x80024000) +#define REGS_APBX_SIZE 0x00002000 + +#define HW_APBX_CTRL0 (0x00000000) +#define HW_APBX_CTRL0_SET (0x00000004) +#define HW_APBX_CTRL0_CLR (0x00000008) +#define HW_APBX_CTRL0_TOG (0x0000000c) +#define HW_APBX_CTRL0_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL0) +#define HW_APBX_CTRL0_SET_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL0_SET) +#define HW_APBX_CTRL0_CLR_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL0_CLR) +#define HW_APBX_CTRL0_TOG_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL0_TOG) -#define HW_APBX_CTRL2 0x20 +#define BM_APBX_CTRL0_SFTRST 0x80000000 +#define BM_APBX_CTRL0_CLKGATE 0x40000000 +#define BP_APBX_CTRL0_RSVD0 0 +#define BM_APBX_CTRL0_RSVD0 0x3FFFFFFF +#define BF_APBX_CTRL0_RSVD0(v) \ + (((v) << 0) & BM_APBX_CTRL0_RSVD0) + +#define HW_APBX_CTRL1 (0x00000010) +#define HW_APBX_CTRL1_SET (0x00000014) +#define HW_APBX_CTRL1_CLR (0x00000018) +#define HW_APBX_CTRL1_TOG (0x0000001c) +#define HW_APBX_CTRL1_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL1) +#define HW_APBX_CTRL1_SET_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL1_SET) +#define HW_APBX_CTRL1_CLR_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL1_CLR) +#define HW_APBX_CTRL1_TOG_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL1_TOG) + +#define BM_APBX_CTRL1_CH15_CMDCMPLT_IRQ_EN 0x80000000 +#define BM_APBX_CTRL1_CH14_CMDCMPLT_IRQ_EN 0x40000000 +#define BM_APBX_CTRL1_CH13_CMDCMPLT_IRQ_EN 0x20000000 +#define BM_APBX_CTRL1_CH12_CMDCMPLT_IRQ_EN 0x10000000 +#define BM_APBX_CTRL1_CH11_CMDCMPLT_IRQ_EN 0x08000000 +#define BM_APBX_CTRL1_CH10_CMDCMPLT_IRQ_EN 0x04000000 +#define BM_APBX_CTRL1_CH9_CMDCMPLT_IRQ_EN 0x02000000 +#define BM_APBX_CTRL1_CH8_CMDCMPLT_IRQ_EN 0x01000000 +#define BM_APBX_CTRL1_CH7_CMDCMPLT_IRQ_EN 0x00800000 +#define BM_APBX_CTRL1_CH6_CMDCMPLT_IRQ_EN 0x00400000 +#define BM_APBX_CTRL1_CH5_CMDCMPLT_IRQ_EN 0x00200000 +#define BM_APBX_CTRL1_CH4_CMDCMPLT_IRQ_EN 0x00100000 +#define BM_APBX_CTRL1_CH3_CMDCMPLT_IRQ_EN 0x00080000 +#define BM_APBX_CTRL1_CH2_CMDCMPLT_IRQ_EN 0x00040000 +#define BM_APBX_CTRL1_CH1_CMDCMPLT_IRQ_EN 0x00020000 +#define BM_APBX_CTRL1_CH0_CMDCMPLT_IRQ_EN 0x00010000 +#define BM_APBX_CTRL1_CH15_CMDCMPLT_IRQ 0x00008000 +#define BM_APBX_CTRL1_CH14_CMDCMPLT_IRQ 0x00004000 +#define BM_APBX_CTRL1_CH13_CMDCMPLT_IRQ 0x00002000 +#define BM_APBX_CTRL1_CH12_CMDCMPLT_IRQ 0x00001000 +#define BM_APBX_CTRL1_CH11_CMDCMPLT_IRQ 0x00000800 +#define BM_APBX_CTRL1_CH10_CMDCMPLT_IRQ 0x00000400 +#define BM_APBX_CTRL1_CH9_CMDCMPLT_IRQ 0x00000200 +#define BM_APBX_CTRL1_CH8_CMDCMPLT_IRQ 0x00000100 +#define BM_APBX_CTRL1_CH7_CMDCMPLT_IRQ 0x00000080 +#define BM_APBX_CTRL1_CH6_CMDCMPLT_IRQ 0x00000040 +#define BM_APBX_CTRL1_CH5_CMDCMPLT_IRQ 0x00000020 +#define BM_APBX_CTRL1_CH4_CMDCMPLT_IRQ 0x00000010 +#define BM_APBX_CTRL1_CH3_CMDCMPLT_IRQ 0x00000008 +#define BM_APBX_CTRL1_CH2_CMDCMPLT_IRQ 0x00000004 +#define BM_APBX_CTRL1_CH1_CMDCMPLT_IRQ 0x00000002 +#define BM_APBX_CTRL1_CH0_CMDCMPLT_IRQ 0x00000001 + +#define HW_APBX_CTRL2 (0x00000020) +#define HW_APBX_CTRL2_SET (0x00000024) +#define HW_APBX_CTRL2_CLR (0x00000028) +#define HW_APBX_CTRL2_TOG (0x0000002c) +#define HW_APBX_CTRL2_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL2) +#define HW_APBX_CTRL2_SET_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL2_SET) +#define HW_APBX_CTRL2_CLR_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL2_CLR) +#define HW_APBX_CTRL2_TOG_ADDR \ + (REGS_APBX_BASE + HW_APBX_CTRL2_TOG) + +#define BM_APBX_CTRL2_CH15_ERROR_STATUS 0x80000000 +#define BV_APBX_CTRL2_CH15_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH15_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH14_ERROR_STATUS 0x40000000 +#define BV_APBX_CTRL2_CH14_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH14_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH13_ERROR_STATUS 0x20000000 +#define BV_APBX_CTRL2_CH13_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH13_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH12_ERROR_STATUS 0x10000000 +#define BV_APBX_CTRL2_CH12_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH12_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH11_ERROR_STATUS 0x08000000 +#define BV_APBX_CTRL2_CH11_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH11_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH10_ERROR_STATUS 0x04000000 +#define BV_APBX_CTRL2_CH10_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH10_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH9_ERROR_STATUS 0x02000000 +#define BV_APBX_CTRL2_CH9_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH9_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH8_ERROR_STATUS 0x01000000 +#define BV_APBX_CTRL2_CH8_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH8_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH7_ERROR_STATUS 0x00800000 +#define BV_APBX_CTRL2_CH7_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH7_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH6_ERROR_STATUS 0x00400000 +#define BV_APBX_CTRL2_CH6_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH6_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH5_ERROR_STATUS 0x00200000 +#define BV_APBX_CTRL2_CH5_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH5_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH4_ERROR_STATUS 0x00100000 +#define BV_APBX_CTRL2_CH4_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH4_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH3_ERROR_STATUS 0x00080000 +#define BV_APBX_CTRL2_CH3_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH3_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH2_ERROR_STATUS 0x00040000 +#define BV_APBX_CTRL2_CH2_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH2_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH1_ERROR_STATUS 0x00020000 +#define BV_APBX_CTRL2_CH1_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH1_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH0_ERROR_STATUS 0x00010000 +#define BV_APBX_CTRL2_CH0_ERROR_STATUS__TERMINATION 0x0 +#define BV_APBX_CTRL2_CH0_ERROR_STATUS__BUS_ERROR 0x1 +#define BM_APBX_CTRL2_CH15_ERROR_IRQ 0x00008000 +#define BM_APBX_CTRL2_CH14_ERROR_IRQ 0x00004000 +#define BM_APBX_CTRL2_CH13_ERROR_IRQ 0x00002000 +#define BM_APBX_CTRL2_CH12_ERROR_IRQ 0x00001000 +#define BM_APBX_CTRL2_CH11_ERROR_IRQ 0x00000800 +#define BM_APBX_CTRL2_CH10_ERROR_IRQ 0x00000400 +#define BM_APBX_CTRL2_CH9_ERROR_IRQ 0x00000200 +#define BM_APBX_CTRL2_CH8_ERROR_IRQ 0x00000100 +#define BM_APBX_CTRL2_CH7_ERROR_IRQ 0x00000080 +#define BM_APBX_CTRL2_CH6_ERROR_IRQ 0x00000040 +#define BM_APBX_CTRL2_CH5_ERROR_IRQ 0x00000020 +#define BM_APBX_CTRL2_CH4_ERROR_IRQ 0x00000010 +#define BM_APBX_CTRL2_CH3_ERROR_IRQ 0x00000008 +#define BM_APBX_CTRL2_CH2_ERROR_IRQ 0x00000004 +#define BM_APBX_CTRL2_CH1_ERROR_IRQ 0x00000002 +#define BM_APBX_CTRL2_CH0_ERROR_IRQ 0x00000001 + +#define HW_APBX_CHANNEL_CTRL (0x00000030) +#define HW_APBX_CHANNEL_CTRL_SET (0x00000034) +#define HW_APBX_CHANNEL_CTRL_CLR (0x00000038) +#define HW_APBX_CHANNEL_CTRL_TOG (0x0000003c) +#define HW_APBX_CHANNEL_CTRL_ADDR \ + (REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL) +#define HW_APBX_CHANNEL_CTRL_SET_ADDR \ + (REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL_SET) +#define HW_APBX_CHANNEL_CTRL_CLR_ADDR \ + (REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL_CLR) +#define HW_APBX_CHANNEL_CTRL_TOG_ADDR \ + (REGS_APBX_BASE + HW_APBX_CHANNEL_CTRL_TOG) -#define HW_APBX_CHANNEL_CTRL 0x30 -#define BM_APBX_CHANNEL_CTRL_RESET_CHANNEL 0xFFFF0000 #define BP_APBX_CHANNEL_CTRL_RESET_CHANNEL 16 +#define BM_APBX_CHANNEL_CTRL_RESET_CHANNEL 0xFFFF0000 +#define BF_APBX_CHANNEL_CTRL_RESET_CHANNEL(v) \ + (((v) << 16) & BM_APBX_CHANNEL_CTRL_RESET_CHANNEL) +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__AUDIOIN 0x0001 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__AUDIOOUT 0x0002 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__SPDIF_TX 0x0004 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__I2C 0x0008 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__SAIF1 0x0010 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__DRI 0x0020 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__IRDA_RX 0x0040 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__UART0_RX 0x0040 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__IRDA_TX 0x0080 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__UART0_TX 0x0080 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__UART1_RX 0x0100 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__UART1_TX 0x0200 +#define BV_APBX_CHANNEL_CTRL_RESET_CHANNEL__SAIF2 0x0400 +#define BP_APBX_CHANNEL_CTRL_FREEZE_CHANNEL 0 +#define BM_APBX_CHANNEL_CTRL_FREEZE_CHANNEL 0x0000FFFF +#define BF_APBX_CHANNEL_CTRL_FREEZE_CHANNEL(v) \ + (((v) << 0) & BM_APBX_CHANNEL_CTRL_FREEZE_CHANNEL) +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__AUDIOIN 0x0001 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__AUDIOOUT 0x0002 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__SPDIF_TX 0x0004 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__I2C 0x0008 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__SAIF1 0x0010 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__DRI 0x0020 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__IRDA_RX 0x0040 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__UART0_RX 0x0040 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__IRDA_TX 0x0080 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__UART0_TX 0x0080 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__UART1_RX 0x0100 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__UART1_TX 0x0200 +#define BV_APBX_CHANNEL_CTRL_FREEZE_CHANNEL__SAIF2 0x0400 + +#define HW_APBX_DEVSEL (0x00000040) +#define HW_APBX_DEVSEL_ADDR \ + (REGS_APBX_BASE + HW_APBX_DEVSEL) + +#define BP_APBX_DEVSEL_CH15 30 +#define BM_APBX_DEVSEL_CH15 0xC0000000 +#define BF_APBX_DEVSEL_CH15(v) \ + (((v) << 30) & BM_APBX_DEVSEL_CH15) +#define BP_APBX_DEVSEL_CH14 28 +#define BM_APBX_DEVSEL_CH14 0x30000000 +#define BF_APBX_DEVSEL_CH14(v) \ + (((v) << 28) & BM_APBX_DEVSEL_CH14) +#define BP_APBX_DEVSEL_CH13 26 +#define BM_APBX_DEVSEL_CH13 0x0C000000 +#define BF_APBX_DEVSEL_CH13(v) \ + (((v) << 26) & BM_APBX_DEVSEL_CH13) +#define BP_APBX_DEVSEL_CH12 24 +#define BM_APBX_DEVSEL_CH12 0x03000000 +#define BF_APBX_DEVSEL_CH12(v) \ + (((v) << 24) & BM_APBX_DEVSEL_CH12) +#define BP_APBX_DEVSEL_CH11 22 +#define BM_APBX_DEVSEL_CH11 0x00C00000 +#define BF_APBX_DEVSEL_CH11(v) \ + (((v) << 22) & BM_APBX_DEVSEL_CH11) +#define BP_APBX_DEVSEL_CH10 20 +#define BM_APBX_DEVSEL_CH10 0x00300000 +#define BF_APBX_DEVSEL_CH10(v) \ + (((v) << 20) & BM_APBX_DEVSEL_CH10) +#define BP_APBX_DEVSEL_CH9 18 +#define BM_APBX_DEVSEL_CH9 0x000C0000 +#define BF_APBX_DEVSEL_CH9(v) \ + (((v) << 18) & BM_APBX_DEVSEL_CH9) +#define BP_APBX_DEVSEL_CH8 16 +#define BM_APBX_DEVSEL_CH8 0x00030000 +#define BF_APBX_DEVSEL_CH8(v) \ + (((v) << 16) & BM_APBX_DEVSEL_CH8) +#define BP_APBX_DEVSEL_CH7 14 +#define BM_APBX_DEVSEL_CH7 0x0000C000 +#define BF_APBX_DEVSEL_CH7(v) \ + (((v) << 14) & BM_APBX_DEVSEL_CH7) +#define BV_APBX_DEVSEL_CH7__USE_I2C1 0x0 +#define BV_APBX_DEVSEL_CH7__USE_IRDA 0x1 +#define BP_APBX_DEVSEL_CH6 12 +#define BM_APBX_DEVSEL_CH6 0x00003000 +#define BF_APBX_DEVSEL_CH6(v) \ + (((v) << 12) & BM_APBX_DEVSEL_CH6) +#define BV_APBX_DEVSEL_CH6__USE_SAIF1 0x0 +#define BV_APBX_DEVSEL_CH6__USE_IRDA 0x1 +#define BP_APBX_DEVSEL_CH5 10 +#define BM_APBX_DEVSEL_CH5 0x00000C00 +#define BF_APBX_DEVSEL_CH5(v) \ + (((v) << 10) & BM_APBX_DEVSEL_CH5) +#define BP_APBX_DEVSEL_CH4 8 +#define BM_APBX_DEVSEL_CH4 0x00000300 +#define BF_APBX_DEVSEL_CH4(v) \ + (((v) << 8) & BM_APBX_DEVSEL_CH4) +#define BP_APBX_DEVSEL_CH3 6 +#define BM_APBX_DEVSEL_CH3 0x000000C0 +#define BF_APBX_DEVSEL_CH3(v) \ + (((v) << 6) & BM_APBX_DEVSEL_CH3) +#define BP_APBX_DEVSEL_CH2 4 +#define BM_APBX_DEVSEL_CH2 0x00000030 +#define BF_APBX_DEVSEL_CH2(v) \ + (((v) << 4) & BM_APBX_DEVSEL_CH2) +#define BP_APBX_DEVSEL_CH1 2 +#define BM_APBX_DEVSEL_CH1 0x0000000C +#define BF_APBX_DEVSEL_CH1(v) \ + (((v) << 2) & BM_APBX_DEVSEL_CH1) +#define BP_APBX_DEVSEL_CH0 0 +#define BM_APBX_DEVSEL_CH0 0x00000003 +#define BF_APBX_DEVSEL_CH0(v) \ + (((v) << 0) & BM_APBX_DEVSEL_CH0) -#define HW_APBX_DEVSEL 0x40 +/* + * multi-register-define name HW_APBX_CHn_CURCMDAR + * base 0x00000100 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_CURCMDAR(n) (0x00000100 + (n) * 0x70) +#define HW_APBX_CHn_CURCMDAR_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_CURCMDAR(n)) +#define BP_APBX_CHn_CURCMDAR_CMD_ADDR 0 +#define BM_APBX_CHn_CURCMDAR_CMD_ADDR 0xFFFFFFFF +#define BF_APBX_CHn_CURCMDAR_CMD_ADDR(v) (v) -#define HW_APBX_CH0_NXTCMDAR (0x110 + 0 * 0x70) -#define HW_APBX_CH1_NXTCMDAR (0x110 + 1 * 0x70) -#define HW_APBX_CH2_NXTCMDAR (0x110 + 2 * 0x70) -#define HW_APBX_CH3_NXTCMDAR (0x110 + 3 * 0x70) -#define HW_APBX_CH4_NXTCMDAR (0x110 + 4 * 0x70) -#define HW_APBX_CH5_NXTCMDAR (0x110 + 5 * 0x70) -#define HW_APBX_CH6_NXTCMDAR (0x110 + 6 * 0x70) -#define HW_APBX_CH7_NXTCMDAR (0x110 + 7 * 0x70) -#define HW_APBX_CH8_NXTCMDAR (0x110 + 8 * 0x70) -#define HW_APBX_CH9_NXTCMDAR (0x110 + 9 * 0x70) -#define HW_APBX_CH10_NXTCMDAR (0x110 + 10 * 0x70) -#define HW_APBX_CH11_NXTCMDAR (0x110 + 11 * 0x70) -#define HW_APBX_CH12_NXTCMDAR (0x110 + 12 * 0x70) -#define HW_APBX_CH13_NXTCMDAR (0x110 + 13 * 0x70) -#define HW_APBX_CH14_NXTCMDAR (0x110 + 14 * 0x70) -#define HW_APBX_CH15_NXTCMDAR (0x110 + 15 * 0x70) +/* + * multi-register-define name HW_APBX_CHn_NXTCMDAR + * base 0x00000110 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_NXTCMDAR(n) (0x00000110 + (n) * 0x70) +#define HW_APBX_CHn_NXTCMDAR_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_NXTCMDAR(n)) +#define BP_APBX_CHn_NXTCMDAR_CMD_ADDR 0 +#define BM_APBX_CHn_NXTCMDAR_CMD_ADDR 0xFFFFFFFF +#define BF_APBX_CHn_NXTCMDAR_CMD_ADDR(v) (v) -#define HW_APBX_CHn_NXTCMDAR 0x110 -#define BM_APBX_CHn_CMD_COMMAND 0x00000003 -#define BP_APBX_CHn_CMD_COMMAND 0 -#define BV_APBX_CHn_CMD_COMMAND__NO_DMA_XFER 0 -#define BV_APBX_CHn_CMD_COMMAND__DMA_WRITE 1 -#define BV_APBX_CHn_CMD_COMMAND__DMA_READ 2 -#define BV_APBX_CHn_CMD_COMMAND__DMA_SENSE 3 -#define BM_APBX_CHn_CMD_CHAIN 0x00000004 -#define BM_APBX_CHn_CMD_IRQONCMPLT 0x00000008 -#define BM_APBX_CHn_CMD_SEMAPHORE 0x00000040 -#define BM_APBX_CHn_CMD_WAIT4ENDCMD 0x00000080 -#define BM_APBX_CHn_CMD_HALTONTERMINATE 0x00000100 -#define BM_APBX_CHn_CMD_CMDWORDS 0x0000F000 -#define BP_APBX_CHn_CMD_CMDWORDS 12 -#define BM_APBX_CHn_CMD_XFER_COUNT 0xFFFF0000 +/* + * multi-register-define name HW_APBX_CHn_CMD + * base 0x00000120 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_CMD(n) (0x00000120 + (n) * 0x70) +#define HW_APBX_CHn_CMD_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_CMD(n)) #define BP_APBX_CHn_CMD_XFER_COUNT 16 +#define BM_APBX_CHn_CMD_XFER_COUNT 0xFFFF0000 +#define BF_APBX_CHn_CMD_XFER_COUNT(v) \ + (((v) << 16) & BM_APBX_CHn_CMD_XFER_COUNT) +#define BP_APBX_CHn_CMD_CMDWORDS 12 +#define BM_APBX_CHn_CMD_CMDWORDS 0x0000F000 +#define BF_APBX_CHn_CMD_CMDWORDS(v) \ + (((v) << 12) & BM_APBX_CHn_CMD_CMDWORDS) +#define BP_APBX_CHn_CMD_RSVD1 9 +#define BM_APBX_CHn_CMD_RSVD1 0x00000E00 +#define BF_APBX_CHn_CMD_RSVD1(v) \ + (((v) << 9) & BM_APBX_CHn_CMD_RSVD1) +#define BM_APBX_CHn_CMD_HALTONTERMINATE 0x00000100 +#define BM_APBX_CHn_CMD_WAIT4ENDCMD 0x00000080 +#define BM_APBX_CHn_CMD_SEMAPHORE 0x00000040 +#define BP_APBX_CHn_CMD_RSVD0 4 +#define BM_APBX_CHn_CMD_RSVD0 0x00000030 +#define BF_APBX_CHn_CMD_RSVD0(v) \ + (((v) << 4) & BM_APBX_CHn_CMD_RSVD0) +#define BM_APBX_CHn_CMD_IRQONCMPLT 0x00000008 +#define BM_APBX_CHn_CMD_CHAIN 0x00000004 +#define BP_APBX_CHn_CMD_COMMAND 0 +#define BM_APBX_CHn_CMD_COMMAND 0x00000003 +#define BF_APBX_CHn_CMD_COMMAND(v) \ + (((v) << 0) & BM_APBX_CHn_CMD_COMMAND) +#define BV_APBX_CHn_CMD_COMMAND__NO_DMA_XFER 0x0 +#define BV_APBX_CHn_CMD_COMMAND__DMA_WRITE 0x1 +#define BV_APBX_CHn_CMD_COMMAND__DMA_READ 0x2 -#define HW_APBX_CH0_BAR (0x130 + 0 * 0x70) -#define HW_APBX_CH1_BAR (0x130 + 1 * 0x70) -#define HW_APBX_CH2_BAR (0x130 + 2 * 0x70) -#define HW_APBX_CH3_BAR (0x130 + 3 * 0x70) -#define HW_APBX_CH4_BAR (0x130 + 4 * 0x70) -#define HW_APBX_CH5_BAR (0x130 + 5 * 0x70) -#define HW_APBX_CH6_BAR (0x130 + 6 * 0x70) -#define HW_APBX_CH7_BAR (0x130 + 7 * 0x70) -#define HW_APBX_CH8_BAR (0x130 + 8 * 0x70) -#define HW_APBX_CH9_BAR (0x130 + 9 * 0x70) -#define HW_APBX_CH10_BAR (0x130 + 10 * 0x70) -#define HW_APBX_CH11_BAR (0x130 + 11 * 0x70) -#define HW_APBX_CH12_BAR (0x130 + 12 * 0x70) -#define HW_APBX_CH13_BAR (0x130 + 13 * 0x70) -#define HW_APBX_CH14_BAR (0x130 + 14 * 0x70) -#define HW_APBX_CH15_BAR (0x130 + 15 * 0x70) - -#define HW_APBX_CHn_BAR 0x130 - -#define HW_APBX_CH0_SEMA (0x140 + 0 * 0x70) -#define HW_APBX_CH1_SEMA (0x140 + 1 * 0x70) -#define HW_APBX_CH2_SEMA (0x140 + 2 * 0x70) -#define HW_APBX_CH3_SEMA (0x140 + 3 * 0x70) -#define HW_APBX_CH4_SEMA (0x140 + 4 * 0x70) -#define HW_APBX_CH5_SEMA (0x140 + 5 * 0x70) -#define HW_APBX_CH6_SEMA (0x140 + 6 * 0x70) -#define HW_APBX_CH7_SEMA (0x140 + 7 * 0x70) -#define HW_APBX_CH8_SEMA (0x140 + 8 * 0x70) -#define HW_APBX_CH9_SEMA (0x140 + 9 * 0x70) -#define HW_APBX_CH10_SEMA (0x140 + 10 * 0x70) -#define HW_APBX_CH11_SEMA (0x140 + 11 * 0x70) -#define HW_APBX_CH12_SEMA (0x140 + 12 * 0x70) -#define HW_APBX_CH13_SEMA (0x140 + 13 * 0x70) -#define HW_APBX_CH14_SEMA (0x140 + 14 * 0x70) -#define HW_APBX_CH15_SEMA (0x140 + 15 * 0x70) +/* + * multi-register-define name HW_APBX_CHn_BAR + * base 0x00000130 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_BAR(n) (0x00000130 + (n) * 0x70) +#define HW_APBX_CHn_BAR_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_BAR(n)) +#define BP_APBX_CHn_BAR_ADDRESS 0 +#define BM_APBX_CHn_BAR_ADDRESS 0xFFFFFFFF +#define BF_APBX_CHn_BAR_ADDRESS(v) (v) -#define HW_APBX_CHn_SEMA 0x140 -#define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0x000000FF -#define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0 -#define BM_APBX_CHn_SEMA_PHORE 0x00FF0000 +/* + * multi-register-define name HW_APBX_CHn_SEMA + * base 0x00000140 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_SEMA(n) (0x00000140 + (n) * 0x70) +#define HW_APBX_CHn_SEMA_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_SEMA(n)) +#define BP_APBX_CHn_SEMA_RSVD2 24 +#define BM_APBX_CHn_SEMA_RSVD2 0xFF000000 +#define BF_APBX_CHn_SEMA_RSVD2(v) \ + (((v) << 24) & BM_APBX_CHn_SEMA_RSVD2) #define BP_APBX_CHn_SEMA_PHORE 16 +#define BM_APBX_CHn_SEMA_PHORE 0x00FF0000 +#define BF_APBX_CHn_SEMA_PHORE(v) \ + (((v) << 16) & BM_APBX_CHn_SEMA_PHORE) +#define BP_APBX_CHn_SEMA_RSVD1 8 +#define BM_APBX_CHn_SEMA_RSVD1 0x0000FF00 +#define BF_APBX_CHn_SEMA_RSVD1(v) \ + (((v) << 8) & BM_APBX_CHn_SEMA_RSVD1) +#define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0 +#define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0x000000FF +#define BF_APBX_CHn_SEMA_INCREMENT_SEMA(v) \ + (((v) << 0) & BM_APBX_CHn_SEMA_INCREMENT_SEMA) -#endif +/* + * multi-register-define name HW_APBX_CHn_DEBUG1 + * base 0x00000150 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_DEBUG1(n) (0x00000150 + (n) * 0x70) +#define HW_APBX_CHn_DEBUG1_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_DEBUG1(n)) +#define BM_APBX_CHn_DEBUG1_REQ 0x80000000 +#define BM_APBX_CHn_DEBUG1_BURST 0x40000000 +#define BM_APBX_CHn_DEBUG1_KICK 0x20000000 +#define BM_APBX_CHn_DEBUG1_END 0x10000000 +#define BP_APBX_CHn_DEBUG1_RSVD2 25 +#define BM_APBX_CHn_DEBUG1_RSVD2 0x0E000000 +#define BF_APBX_CHn_DEBUG1_RSVD2(v) \ + (((v) << 25) & BM_APBX_CHn_DEBUG1_RSVD2) +#define BM_APBX_CHn_DEBUG1_NEXTCMDADDRVALID 0x01000000 +#define BM_APBX_CHn_DEBUG1_RD_FIFO_EMPTY 0x00800000 +#define BM_APBX_CHn_DEBUG1_RD_FIFO_FULL 0x00400000 +#define BM_APBX_CHn_DEBUG1_WR_FIFO_EMPTY 0x00200000 +#define BM_APBX_CHn_DEBUG1_WR_FIFO_FULL 0x00100000 +#define BP_APBX_CHn_DEBUG1_RSVD1 5 +#define BM_APBX_CHn_DEBUG1_RSVD1 0x000FFFE0 +#define BF_APBX_CHn_DEBUG1_RSVD1(v) \ + (((v) << 5) & BM_APBX_CHn_DEBUG1_RSVD1) +#define BP_APBX_CHn_DEBUG1_STATEMACHINE 0 +#define BM_APBX_CHn_DEBUG1_STATEMACHINE 0x0000001F +#define BF_APBX_CHn_DEBUG1_STATEMACHINE(v) \ + (((v) << 0) & BM_APBX_CHn_DEBUG1_STATEMACHINE) +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__IDLE 0x00 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD1 0x01 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD3 0x02 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD2 0x03 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__XFER_DECODE 0x04 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_WAIT 0x05 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__REQ_CMD4 0x06 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__PIO_REQ 0x07 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_FLUSH 0x08 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_WAIT 0x09 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WRITE 0x0C +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__READ_REQ 0x0D +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__CHECK_CHAIN 0x0E +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__XFER_COMPLETE 0x0F +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WAIT_END 0x15 +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__WRITE_WAIT 0x1C +#define BV_APBX_CHn_DEBUG1_STATEMACHINE__CHECK_WAIT 0x1E +/* + * multi-register-define name HW_APBX_CHn_DEBUG2 + * base 0x00000160 + * count 16 + * offset 0x70 + */ +#define HW_APBX_CHn_DEBUG2(n) (0x00000160 + (n) * 0x70) +#define HW_APBX_CHn_DEBUG2_ADDR(n) \ + (REGS_APBX_BASE + HW_APBX_CHn_DEBUG2(n)) +#define BP_APBX_CHn_DEBUG2_APB_BYTES 16 +#define BM_APBX_CHn_DEBUG2_APB_BYTES 0xFFFF0000 +#define BF_APBX_CHn_DEBUG2_APB_BYTES(v) \ + (((v) << 16) & BM_APBX_CHn_DEBUG2_APB_BYTES) +#define BP_APBX_CHn_DEBUG2_AHB_BYTES 0 +#define BM_APBX_CHn_DEBUG2_AHB_BYTES 0x0000FFFF +#define BF_APBX_CHn_DEBUG2_AHB_BYTES(v) \ + (((v) << 0) & BM_APBX_CHn_DEBUG2_AHB_BYTES) + +#define HW_APBX_VERSION (0x00000800) +#define HW_APBX_VERSION_ADDR \ + (REGS_APBX_BASE + HW_APBX_VERSION) + +#define BP_APBX_VERSION_MAJOR 24 +#define BM_APBX_VERSION_MAJOR 0xFF000000 +#define BF_APBX_VERSION_MAJOR(v) \ + (((v) << 24) & BM_APBX_VERSION_MAJOR) +#define BP_APBX_VERSION_MINOR 16 +#define BM_APBX_VERSION_MINOR 0x00FF0000 +#define BF_APBX_VERSION_MINOR(v) \ + (((v) << 16) & BM_APBX_VERSION_MINOR) +#define BP_APBX_VERSION_STEP 0 +#define BM_APBX_VERSION_STEP 0x0000FFFF +#define BF_APBX_VERSION_STEP(v) \ + (((v) << 0) & BM_APBX_VERSION_STEP) +#endif /* __ARCH_ARM___APBX_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-clkctrl.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-clkctrl.h @@ -1,7 +1,7 @@ /* - * stmp378x: CLKCTRL register definitions + * STMP CLKCTRL Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,72 +17,510 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_CLKCTRL -#define _MACH_REGS_CLKCTRL -#define REGS_CLKCTRL_BASE (STMP3XXX_REGS_BASE + 0x40000) -#define REGS_CLKCTRL_PHYS 0x80040000 -#define REGS_CLKCTRL_SIZE 0x2000 +#ifndef __ARCH_ARM___CLKCTRL_H +#define __ARCH_ARM___CLKCTRL_H 1 -#define HW_CLKCTRL_PLLCTRL0 0x0 +#define REGS_CLKCTRL_BASE (STMP3XXX_REGS_BASE + 0x40000) +#define REGS_CLKCTRL_PHYS (0x80040000) +#define REGS_CLKCTRL_SIZE 0x00002000 + +#define HW_CLKCTRL_PLLCTRL0 (0x00000000) +#define HW_CLKCTRL_PLLCTRL0_SET (0x00000004) +#define HW_CLKCTRL_PLLCTRL0_CLR (0x00000008) +#define HW_CLKCTRL_PLLCTRL0_TOG (0x0000000c) +#define HW_CLKCTRL_PLLCTRL0_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0) +#define HW_CLKCTRL_PLLCTRL0_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0_SET) +#define HW_CLKCTRL_PLLCTRL0_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0_CLR) +#define HW_CLKCTRL_PLLCTRL0_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0_TOG) + +#define BP_CLKCTRL_PLLCTRL0_RSRVD6 30 +#define BM_CLKCTRL_PLLCTRL0_RSRVD6 0xC0000000 +#define BF_CLKCTRL_PLLCTRL0_RSRVD6(v) \ + (((v) << 30) & BM_CLKCTRL_PLLCTRL0_RSRVD6) +#define BP_CLKCTRL_PLLCTRL0_LFR_SEL 28 +#define BM_CLKCTRL_PLLCTRL0_LFR_SEL 0x30000000 +#define BF_CLKCTRL_PLLCTRL0_LFR_SEL(v) \ + (((v) << 28) & BM_CLKCTRL_PLLCTRL0_LFR_SEL) +#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__DEFAULT 0x0 +#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__TIMES_2 0x1 +#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__TIMES_05 0x2 +#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__UNDEFINED 0x3 +#define BP_CLKCTRL_PLLCTRL0_RSRVD5 26 +#define BM_CLKCTRL_PLLCTRL0_RSRVD5 0x0C000000 +#define BF_CLKCTRL_PLLCTRL0_RSRVD5(v) \ + (((v) << 26) & BM_CLKCTRL_PLLCTRL0_RSRVD5) +#define BP_CLKCTRL_PLLCTRL0_CP_SEL 24 +#define BM_CLKCTRL_PLLCTRL0_CP_SEL 0x03000000 +#define BF_CLKCTRL_PLLCTRL0_CP_SEL(v) \ + (((v) << 24) & BM_CLKCTRL_PLLCTRL0_CP_SEL) +#define BV_CLKCTRL_PLLCTRL0_CP_SEL__DEFAULT 0x0 +#define BV_CLKCTRL_PLLCTRL0_CP_SEL__TIMES_2 0x1 +#define BV_CLKCTRL_PLLCTRL0_CP_SEL__TIMES_05 0x2 +#define BV_CLKCTRL_PLLCTRL0_CP_SEL__UNDEFINED 0x3 +#define BP_CLKCTRL_PLLCTRL0_RSRVD4 22 +#define BM_CLKCTRL_PLLCTRL0_RSRVD4 0x00C00000 +#define BF_CLKCTRL_PLLCTRL0_RSRVD4(v) \ + (((v) << 22) & BM_CLKCTRL_PLLCTRL0_RSRVD4) +#define BP_CLKCTRL_PLLCTRL0_DIV_SEL 20 +#define BM_CLKCTRL_PLLCTRL0_DIV_SEL 0x00300000 +#define BF_CLKCTRL_PLLCTRL0_DIV_SEL(v) \ + (((v) << 20) & BM_CLKCTRL_PLLCTRL0_DIV_SEL) +#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__DEFAULT 0x0 +#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__LOWER 0x1 +#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__LOWEST 0x2 +#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__UNDEFINED 0x3 +#define BM_CLKCTRL_PLLCTRL0_RSRVD3 0x00080000 #define BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS 0x00040000 - -#define HW_CLKCTRL_CPU 0x20 -#define BM_CLKCTRL_CPU_DIV_CPU 0x0000003F +#define BM_CLKCTRL_PLLCTRL0_RSRVD2 0x00020000 +#define BM_CLKCTRL_PLLCTRL0_POWER 0x00010000 +#define BP_CLKCTRL_PLLCTRL0_RSRVD1 0 +#define BM_CLKCTRL_PLLCTRL0_RSRVD1 0x0000FFFF +#define BF_CLKCTRL_PLLCTRL0_RSRVD1(v) \ + (((v) << 0) & BM_CLKCTRL_PLLCTRL0_RSRVD1) + +#define HW_CLKCTRL_PLLCTRL1 (0x00000010) +#define HW_CLKCTRL_PLLCTRL1_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL1) + +#define BM_CLKCTRL_PLLCTRL1_LOCK 0x80000000 +#define BM_CLKCTRL_PLLCTRL1_FORCE_LOCK 0x40000000 +#define BP_CLKCTRL_PLLCTRL1_RSRVD1 16 +#define BM_CLKCTRL_PLLCTRL1_RSRVD1 0x3FFF0000 +#define BF_CLKCTRL_PLLCTRL1_RSRVD1(v) \ + (((v) << 16) & BM_CLKCTRL_PLLCTRL1_RSRVD1) +#define BP_CLKCTRL_PLLCTRL1_LOCK_COUNT 0 +#define BM_CLKCTRL_PLLCTRL1_LOCK_COUNT 0x0000FFFF +#define BF_CLKCTRL_PLLCTRL1_LOCK_COUNT(v) \ + (((v) << 0) & BM_CLKCTRL_PLLCTRL1_LOCK_COUNT) + +#define HW_CLKCTRL_CPU (0x00000020) +#define HW_CLKCTRL_CPU_SET (0x00000024) +#define HW_CLKCTRL_CPU_CLR (0x00000028) +#define HW_CLKCTRL_CPU_TOG (0x0000002c) +#define HW_CLKCTRL_CPU_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU) +#define HW_CLKCTRL_CPU_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU_SET) +#define HW_CLKCTRL_CPU_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU_CLR) +#define HW_CLKCTRL_CPU_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU_TOG) + +#define BP_CLKCTRL_CPU_RSRVD5 30 +#define BM_CLKCTRL_CPU_RSRVD5 0xC0000000 +#define BF_CLKCTRL_CPU_RSRVD5(v) \ + (((v) << 30) & BM_CLKCTRL_CPU_RSRVD5) +#define BM_CLKCTRL_CPU_BUSY_REF_XTAL 0x20000000 +#define BM_CLKCTRL_CPU_BUSY_REF_CPU 0x10000000 +#define BM_CLKCTRL_CPU_RSRVD4 0x08000000 +#define BM_CLKCTRL_CPU_DIV_XTAL_FRAC_EN 0x04000000 +#define BP_CLKCTRL_CPU_DIV_XTAL 16 +#define BM_CLKCTRL_CPU_DIV_XTAL 0x03FF0000 +#define BF_CLKCTRL_CPU_DIV_XTAL(v) \ + (((v) << 16) & BM_CLKCTRL_CPU_DIV_XTAL) +#define BP_CLKCTRL_CPU_RSRVD3 13 +#define BM_CLKCTRL_CPU_RSRVD3 0x0000E000 +#define BF_CLKCTRL_CPU_RSRVD3(v) \ + (((v) << 13) & BM_CLKCTRL_CPU_RSRVD3) +#define BM_CLKCTRL_CPU_INTERRUPT_WAIT 0x00001000 +#define BM_CLKCTRL_CPU_RSRVD2 0x00000800 +#define BM_CLKCTRL_CPU_DIV_CPU_FRAC_EN 0x00000400 +#define BP_CLKCTRL_CPU_RSRVD1 6 +#define BM_CLKCTRL_CPU_RSRVD1 0x000003C0 +#define BF_CLKCTRL_CPU_RSRVD1(v) \ + (((v) << 6) & BM_CLKCTRL_CPU_RSRVD1) #define BP_CLKCTRL_CPU_DIV_CPU 0 +#define BM_CLKCTRL_CPU_DIV_CPU 0x0000003F +#define BF_CLKCTRL_CPU_DIV_CPU(v) \ + (((v) << 0) & BM_CLKCTRL_CPU_DIV_CPU) -#define HW_CLKCTRL_HBUS 0x30 -#define BM_CLKCTRL_HBUS_DIV 0x0000001F -#define BP_CLKCTRL_HBUS_DIV 0 +#define HW_CLKCTRL_HBUS (0x00000030) +#define HW_CLKCTRL_HBUS_SET (0x00000034) +#define HW_CLKCTRL_HBUS_CLR (0x00000038) +#define HW_CLKCTRL_HBUS_TOG (0x0000003c) +#define HW_CLKCTRL_HBUS_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS) +#define HW_CLKCTRL_HBUS_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS_SET) +#define HW_CLKCTRL_HBUS_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS_CLR) +#define HW_CLKCTRL_HBUS_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS_TOG) + +#define BP_CLKCTRL_HBUS_RSRVD4 30 +#define BM_CLKCTRL_HBUS_RSRVD4 0xC0000000 +#define BF_CLKCTRL_HBUS_RSRVD4(v) \ + (((v) << 30) & BM_CLKCTRL_HBUS_RSRVD4) +#define BM_CLKCTRL_HBUS_BUSY 0x20000000 +#define BM_CLKCTRL_HBUS_DCP_AS_ENABLE 0x10000000 +#define BM_CLKCTRL_HBUS_PXP_AS_ENABLE 0x08000000 +#define BM_CLKCTRL_HBUS_APBHDMA_AS_ENABLE 0x04000000 +#define BM_CLKCTRL_HBUS_APBXDMA_AS_ENABLE 0x02000000 +#define BM_CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE 0x01000000 +#define BM_CLKCTRL_HBUS_TRAFFIC_AS_ENABLE 0x00800000 +#define BM_CLKCTRL_HBUS_CPU_DATA_AS_ENABLE 0x00400000 +#define BM_CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE 0x00200000 +#define BM_CLKCTRL_HBUS_AUTO_SLOW_MODE 0x00100000 +#define BM_CLKCTRL_HBUS_RSRVD2 0x00080000 +#define BP_CLKCTRL_HBUS_SLOW_DIV 16 +#define BM_CLKCTRL_HBUS_SLOW_DIV 0x00070000 +#define BF_CLKCTRL_HBUS_SLOW_DIV(v) \ + (((v) << 16) & BM_CLKCTRL_HBUS_SLOW_DIV) +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY1 0x0 +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY2 0x1 +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY4 0x2 +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY8 0x3 +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY16 0x4 +#define BV_CLKCTRL_HBUS_SLOW_DIV__BY32 0x5 +#define BP_CLKCTRL_HBUS_RSRVD1 6 +#define BM_CLKCTRL_HBUS_RSRVD1 0x0000FFC0 +#define BF_CLKCTRL_HBUS_RSRVD1(v) \ + (((v) << 6) & BM_CLKCTRL_HBUS_RSRVD1) #define BM_CLKCTRL_HBUS_DIV_FRAC_EN 0x00000020 +#define BP_CLKCTRL_HBUS_DIV 0 +#define BM_CLKCTRL_HBUS_DIV 0x0000001F +#define BF_CLKCTRL_HBUS_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_HBUS_DIV) -#define HW_CLKCTRL_XBUS 0x40 - -#define HW_CLKCTRL_XTAL 0x50 +#define HW_CLKCTRL_XBUS (0x00000040) +#define HW_CLKCTRL_XBUS_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_XBUS) + +#define BM_CLKCTRL_XBUS_BUSY 0x80000000 +#define BP_CLKCTRL_XBUS_RSRVD1 11 +#define BM_CLKCTRL_XBUS_RSRVD1 0x7FFFF800 +#define BF_CLKCTRL_XBUS_RSRVD1(v) \ + (((v) << 11) & BM_CLKCTRL_XBUS_RSRVD1) +#define BM_CLKCTRL_XBUS_DIV_FRAC_EN 0x00000400 +#define BP_CLKCTRL_XBUS_DIV 0 +#define BM_CLKCTRL_XBUS_DIV 0x000003FF +#define BF_CLKCTRL_XBUS_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_XBUS_DIV) + +#define HW_CLKCTRL_XTAL (0x00000050) +#define HW_CLKCTRL_XTAL_SET (0x00000054) +#define HW_CLKCTRL_XTAL_CLR (0x00000058) +#define HW_CLKCTRL_XTAL_TOG (0x0000005c) +#define HW_CLKCTRL_XTAL_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_XTAL) +#define HW_CLKCTRL_XTAL_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_XTAL_SET) +#define HW_CLKCTRL_XTAL_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_XTAL_CLR) +#define HW_CLKCTRL_XTAL_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_XTAL_TOG) + +#define BM_CLKCTRL_XTAL_UART_CLK_GATE 0x80000000 +#define BM_CLKCTRL_XTAL_FILT_CLK24M_GATE 0x40000000 +#define BM_CLKCTRL_XTAL_PWM_CLK24M_GATE 0x20000000 #define BM_CLKCTRL_XTAL_DRI_CLK24M_GATE 0x10000000 +#define BM_CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE 0x08000000 +#define BM_CLKCTRL_XTAL_TIMROT_CLK32K_GATE 0x04000000 +#define BP_CLKCTRL_XTAL_RSRVD1 2 +#define BM_CLKCTRL_XTAL_RSRVD1 0x03FFFFFC +#define BF_CLKCTRL_XTAL_RSRVD1(v) \ + (((v) << 2) & BM_CLKCTRL_XTAL_RSRVD1) +#define BP_CLKCTRL_XTAL_DIV_UART 0 +#define BM_CLKCTRL_XTAL_DIV_UART 0x00000003 +#define BF_CLKCTRL_XTAL_DIV_UART(v) \ + (((v) << 0) & BM_CLKCTRL_XTAL_DIV_UART) + +#define HW_CLKCTRL_PIX (0x00000060) +#define HW_CLKCTRL_PIX_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_PIX) -#define HW_CLKCTRL_PIX 0x60 -#define BM_CLKCTRL_PIX_DIV 0x00000FFF -#define BP_CLKCTRL_PIX_DIV 0 #define BM_CLKCTRL_PIX_CLKGATE 0x80000000 +#define BM_CLKCTRL_PIX_RSRVD2 0x40000000 +#define BM_CLKCTRL_PIX_BUSY 0x20000000 +#define BP_CLKCTRL_PIX_RSRVD1 13 +#define BM_CLKCTRL_PIX_RSRVD1 0x1FFFE000 +#define BF_CLKCTRL_PIX_RSRVD1(v) \ + (((v) << 13) & BM_CLKCTRL_PIX_RSRVD1) +#define BM_CLKCTRL_PIX_DIV_FRAC_EN 0x00001000 +#define BP_CLKCTRL_PIX_DIV 0 +#define BM_CLKCTRL_PIX_DIV 0x00000FFF +#define BF_CLKCTRL_PIX_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_PIX_DIV) -#define HW_CLKCTRL_SSP 0x70 - -#define HW_CLKCTRL_GPMI 0x80 - -#define HW_CLKCTRL_SPDIF 0x90 +#define HW_CLKCTRL_SSP (0x00000070) +#define HW_CLKCTRL_SSP_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_SSP) + +#define BM_CLKCTRL_SSP_CLKGATE 0x80000000 +#define BM_CLKCTRL_SSP_RSRVD2 0x40000000 +#define BM_CLKCTRL_SSP_BUSY 0x20000000 +#define BP_CLKCTRL_SSP_RSRVD1 10 +#define BM_CLKCTRL_SSP_RSRVD1 0x1FFFFC00 +#define BF_CLKCTRL_SSP_RSRVD1(v) \ + (((v) << 10) & BM_CLKCTRL_SSP_RSRVD1) +#define BM_CLKCTRL_SSP_DIV_FRAC_EN 0x00000200 +#define BP_CLKCTRL_SSP_DIV 0 +#define BM_CLKCTRL_SSP_DIV 0x000001FF +#define BF_CLKCTRL_SSP_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_SSP_DIV) + +#define HW_CLKCTRL_GPMI (0x00000080) +#define HW_CLKCTRL_GPMI_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_GPMI) + +#define BM_CLKCTRL_GPMI_CLKGATE 0x80000000 +#define BM_CLKCTRL_GPMI_RSRVD2 0x40000000 +#define BM_CLKCTRL_GPMI_BUSY 0x20000000 +#define BP_CLKCTRL_GPMI_RSRVD1 11 +#define BM_CLKCTRL_GPMI_RSRVD1 0x1FFFF800 +#define BF_CLKCTRL_GPMI_RSRVD1(v) \ + (((v) << 11) & BM_CLKCTRL_GPMI_RSRVD1) +#define BM_CLKCTRL_GPMI_DIV_FRAC_EN 0x00000400 +#define BP_CLKCTRL_GPMI_DIV 0 +#define BM_CLKCTRL_GPMI_DIV 0x000003FF +#define BF_CLKCTRL_GPMI_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_GPMI_DIV) + +#define HW_CLKCTRL_SPDIF (0x00000090) +#define HW_CLKCTRL_SPDIF_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_SPDIF) + +#define BM_CLKCTRL_SPDIF_CLKGATE 0x80000000 +#define BP_CLKCTRL_SPDIF_RSRVD 0 +#define BM_CLKCTRL_SPDIF_RSRVD 0x7FFFFFFF +#define BF_CLKCTRL_SPDIF_RSRVD(v) \ + (((v) << 0) & BM_CLKCTRL_SPDIF_RSRVD) + +#define HW_CLKCTRL_EMI (0x000000a0) +#define HW_CLKCTRL_EMI_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_EMI) -#define HW_CLKCTRL_EMI 0xA0 -#define BM_CLKCTRL_EMI_DIV_EMI 0x0000003F -#define BP_CLKCTRL_EMI_DIV_EMI 0 -#define BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE 0x00010000 -#define BM_CLKCTRL_EMI_BUSY_DCC_RESYNC 0x00020000 -#define BM_CLKCTRL_EMI_BUSY_REF_EMI 0x10000000 +#define BM_CLKCTRL_EMI_CLKGATE 0x80000000 +#define BM_CLKCTRL_EMI_SYNC_MODE_EN 0x40000000 #define BM_CLKCTRL_EMI_BUSY_REF_XTAL 0x20000000 +#define BM_CLKCTRL_EMI_BUSY_REF_EMI 0x10000000 +#define BM_CLKCTRL_EMI_BUSY_REF_CPU 0x08000000 +#define BM_CLKCTRL_EMI_BUSY_SYNC_MODE 0x04000000 +#define BP_CLKCTRL_EMI_RSRVD3 18 +#define BM_CLKCTRL_EMI_RSRVD3 0x03FC0000 +#define BF_CLKCTRL_EMI_RSRVD3(v) \ + (((v) << 18) & BM_CLKCTRL_EMI_RSRVD3) +#define BM_CLKCTRL_EMI_BUSY_DCC_RESYNC 0x00020000 +#define BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE 0x00010000 +#define BP_CLKCTRL_EMI_RSRVD2 12 +#define BM_CLKCTRL_EMI_RSRVD2 0x0000F000 +#define BF_CLKCTRL_EMI_RSRVD2(v) \ + (((v) << 12) & BM_CLKCTRL_EMI_RSRVD2) +#define BP_CLKCTRL_EMI_DIV_XTAL 8 +#define BM_CLKCTRL_EMI_DIV_XTAL 0x00000F00 +#define BF_CLKCTRL_EMI_DIV_XTAL(v) \ + (((v) << 8) & BM_CLKCTRL_EMI_DIV_XTAL) +#define BP_CLKCTRL_EMI_RSRVD1 6 +#define BM_CLKCTRL_EMI_RSRVD1 0x000000C0 +#define BF_CLKCTRL_EMI_RSRVD1(v) \ + (((v) << 6) & BM_CLKCTRL_EMI_RSRVD1) +#define BP_CLKCTRL_EMI_DIV_EMI 0 +#define BM_CLKCTRL_EMI_DIV_EMI 0x0000003F +#define BF_CLKCTRL_EMI_DIV_EMI(v) \ + (((v) << 0) & BM_CLKCTRL_EMI_DIV_EMI) -#define HW_CLKCTRL_IR 0xB0 - -#define HW_CLKCTRL_SAIF 0xC0 - -#define HW_CLKCTRL_TV 0xD0 - -#define HW_CLKCTRL_ETM 0xE0 - -#define HW_CLKCTRL_FRAC 0xF0 -#define BM_CLKCTRL_FRAC_EMIFRAC 0x00003F00 -#define BP_CLKCTRL_FRAC_EMIFRAC 8 -#define BM_CLKCTRL_FRAC_PIXFRAC 0x003F0000 -#define BP_CLKCTRL_FRAC_PIXFRAC 16 +#define HW_CLKCTRL_IR (0x000000b0) +#define HW_CLKCTRL_IR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_IR) + +#define BM_CLKCTRL_IR_CLKGATE 0x80000000 +#define BM_CLKCTRL_IR_RSRVD3 0x40000000 +#define BM_CLKCTRL_IR_AUTO_DIV 0x20000000 +#define BM_CLKCTRL_IR_IR_BUSY 0x10000000 +#define BM_CLKCTRL_IR_IROV_BUSY 0x08000000 +#define BP_CLKCTRL_IR_RSRVD2 25 +#define BM_CLKCTRL_IR_RSRVD2 0x06000000 +#define BF_CLKCTRL_IR_RSRVD2(v) \ + (((v) << 25) & BM_CLKCTRL_IR_RSRVD2) +#define BP_CLKCTRL_IR_IROV_DIV 16 +#define BM_CLKCTRL_IR_IROV_DIV 0x01FF0000 +#define BF_CLKCTRL_IR_IROV_DIV(v) \ + (((v) << 16) & BM_CLKCTRL_IR_IROV_DIV) +#define BP_CLKCTRL_IR_RSRVD1 10 +#define BM_CLKCTRL_IR_RSRVD1 0x0000FC00 +#define BF_CLKCTRL_IR_RSRVD1(v) \ + (((v) << 10) & BM_CLKCTRL_IR_RSRVD1) +#define BP_CLKCTRL_IR_IR_DIV 0 +#define BM_CLKCTRL_IR_IR_DIV 0x000003FF +#define BF_CLKCTRL_IR_IR_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_IR_IR_DIV) + +#define HW_CLKCTRL_SAIF (0x000000c0) +#define HW_CLKCTRL_SAIF_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_SAIF) + +#define BM_CLKCTRL_SAIF_CLKGATE 0x80000000 +#define BM_CLKCTRL_SAIF_RSRVD2 0x40000000 +#define BM_CLKCTRL_SAIF_BUSY 0x20000000 +#define BP_CLKCTRL_SAIF_RSRVD1 17 +#define BM_CLKCTRL_SAIF_RSRVD1 0x1FFE0000 +#define BF_CLKCTRL_SAIF_RSRVD1(v) \ + (((v) << 17) & BM_CLKCTRL_SAIF_RSRVD1) +#define BM_CLKCTRL_SAIF_DIV_FRAC_EN 0x00010000 +#define BP_CLKCTRL_SAIF_DIV 0 +#define BM_CLKCTRL_SAIF_DIV 0x0000FFFF +#define BF_CLKCTRL_SAIF_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_SAIF_DIV) + +#define HW_CLKCTRL_TV (0x000000d0) +#define HW_CLKCTRL_TV_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_TV) + +#define BM_CLKCTRL_TV_CLK_TV108M_GATE 0x80000000 +#define BM_CLKCTRL_TV_CLK_TV_GATE 0x40000000 +#define BP_CLKCTRL_TV_RSRVD 0 +#define BM_CLKCTRL_TV_RSRVD 0x3FFFFFFF +#define BF_CLKCTRL_TV_RSRVD(v) \ + (((v) << 0) & BM_CLKCTRL_TV_RSRVD) + +#define HW_CLKCTRL_ETM (0x000000e0) +#define HW_CLKCTRL_ETM_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_ETM) + +#define BM_CLKCTRL_ETM_CLKGATE 0x80000000 +#define BM_CLKCTRL_ETM_RSRVD2 0x40000000 +#define BM_CLKCTRL_ETM_BUSY 0x20000000 +#define BP_CLKCTRL_ETM_RSRVD1 7 +#define BM_CLKCTRL_ETM_RSRVD1 0x1FFFFF80 +#define BF_CLKCTRL_ETM_RSRVD1(v) \ + (((v) << 7) & BM_CLKCTRL_ETM_RSRVD1) +#define BM_CLKCTRL_ETM_DIV_FRAC_EN 0x00000040 +#define BP_CLKCTRL_ETM_DIV 0 +#define BM_CLKCTRL_ETM_DIV 0x0000003F +#define BF_CLKCTRL_ETM_DIV(v) \ + (((v) << 0) & BM_CLKCTRL_ETM_DIV) + +#define HW_CLKCTRL_FRAC (0x000000f0) +#define HW_CLKCTRL_FRAC_SET (0x000000f4) +#define HW_CLKCTRL_FRAC_CLR (0x000000f8) +#define HW_CLKCTRL_FRAC_TOG (0x000000fc) +#define HW_CLKCTRL_FRAC_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC) +#define HW_CLKCTRL_FRAC_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC_SET) +#define HW_CLKCTRL_FRAC_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC_CLR) +#define HW_CLKCTRL_FRAC_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC_TOG) + +#define BM_CLKCTRL_FRAC_CLKGATEIO 0x80000000 +#define BM_CLKCTRL_FRAC_IO_STABLE 0x40000000 +#define BP_CLKCTRL_FRAC_IOFRAC 24 +#define BM_CLKCTRL_FRAC_IOFRAC 0x3F000000 +#define BF_CLKCTRL_FRAC_IOFRAC(v) \ + (((v) << 24) & BM_CLKCTRL_FRAC_IOFRAC) #define BM_CLKCTRL_FRAC_CLKGATEPIX 0x00800000 - -#define HW_CLKCTRL_FRAC1 0x100 - -#define HW_CLKCTRL_CLKSEQ 0x110 +#define BM_CLKCTRL_FRAC_PIX_STABLE 0x00400000 +#define BP_CLKCTRL_FRAC_PIXFRAC 16 +#define BM_CLKCTRL_FRAC_PIXFRAC 0x003F0000 +#define BF_CLKCTRL_FRAC_PIXFRAC(v) \ + (((v) << 16) & BM_CLKCTRL_FRAC_PIXFRAC) +#define BM_CLKCTRL_FRAC_CLKGATEEMI 0x00008000 +#define BM_CLKCTRL_FRAC_EMI_STABLE 0x00004000 +#define BP_CLKCTRL_FRAC_EMIFRAC 8 +#define BM_CLKCTRL_FRAC_EMIFRAC 0x00003F00 +#define BF_CLKCTRL_FRAC_EMIFRAC(v) \ + (((v) << 8) & BM_CLKCTRL_FRAC_EMIFRAC) +#define BM_CLKCTRL_FRAC_CLKGATECPU 0x00000080 +#define BM_CLKCTRL_FRAC_CPU_STABLE 0x00000040 +#define BP_CLKCTRL_FRAC_CPUFRAC 0 +#define BM_CLKCTRL_FRAC_CPUFRAC 0x0000003F +#define BF_CLKCTRL_FRAC_CPUFRAC(v) \ + (((v) << 0) & BM_CLKCTRL_FRAC_CPUFRAC) + +#define HW_CLKCTRL_FRAC1 (0x00000100) +#define HW_CLKCTRL_FRAC1_SET (0x00000104) +#define HW_CLKCTRL_FRAC1_CLR (0x00000108) +#define HW_CLKCTRL_FRAC1_TOG (0x0000010c) +#define HW_CLKCTRL_FRAC1_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC1) +#define HW_CLKCTRL_FRAC1_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC1_SET) +#define HW_CLKCTRL_FRAC1_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC1_CLR) +#define HW_CLKCTRL_FRAC1_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC1_TOG) + +#define BM_CLKCTRL_FRAC1_CLKGATEVID 0x80000000 +#define BM_CLKCTRL_FRAC1_VID_STABLE 0x40000000 +#define BP_CLKCTRL_FRAC1_RSRVD1 0 +#define BM_CLKCTRL_FRAC1_RSRVD1 0x3FFFFFFF +#define BF_CLKCTRL_FRAC1_RSRVD1(v) \ + (((v) << 0) & BM_CLKCTRL_FRAC1_RSRVD1) + +#define HW_CLKCTRL_CLKSEQ (0x00000110) +#define HW_CLKCTRL_CLKSEQ_SET (0x00000114) +#define HW_CLKCTRL_CLKSEQ_CLR (0x00000118) +#define HW_CLKCTRL_CLKSEQ_TOG (0x0000011c) +#define HW_CLKCTRL_CLKSEQ_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ) +#define HW_CLKCTRL_CLKSEQ_SET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_SET) +#define HW_CLKCTRL_CLKSEQ_CLR_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_CLR) +#define HW_CLKCTRL_CLKSEQ_TOG_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_TOG) + +#define BP_CLKCTRL_CLKSEQ_RSRVD1 9 +#define BM_CLKCTRL_CLKSEQ_RSRVD1 0xFFFFFE00 +#define BF_CLKCTRL_CLKSEQ_RSRVD1(v) \ + (((v) << 9) & BM_CLKCTRL_CLKSEQ_RSRVD1) +#define BM_CLKCTRL_CLKSEQ_BYPASS_ETM 0x00000100 +#define BM_CLKCTRL_CLKSEQ_BYPASS_CPU 0x00000080 +#define BM_CLKCTRL_CLKSEQ_BYPASS_EMI 0x00000040 +#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP 0x00000020 +#define BM_CLKCTRL_CLKSEQ_BYPASS_GPMI 0x00000010 +#define BM_CLKCTRL_CLKSEQ_BYPASS_IR 0x00000008 +#define BM_CLKCTRL_CLKSEQ_RSRVD0 0x00000004 #define BM_CLKCTRL_CLKSEQ_BYPASS_PIX 0x00000002 +#define BM_CLKCTRL_CLKSEQ_BYPASS_SAIF 0x00000001 -#define HW_CLKCTRL_RESET 0x120 +#define HW_CLKCTRL_RESET (0x00000120) +#define HW_CLKCTRL_RESET_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_RESET) + +#define BP_CLKCTRL_RESET_RSRVD 2 +#define BM_CLKCTRL_RESET_RSRVD 0xFFFFFFFC +#define BF_CLKCTRL_RESET_RSRVD(v) \ + (((v) << 2) & BM_CLKCTRL_RESET_RSRVD) +#define BM_CLKCTRL_RESET_CHIP 0x00000002 #define BM_CLKCTRL_RESET_DIG 0x00000001 -#define BP_CLKCTRL_RESET_DIG 0 -#endif +#define HW_CLKCTRL_STATUS (0x00000130) +#define HW_CLKCTRL_STATUS_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_STATUS) + +#define BP_CLKCTRL_STATUS_CPU_LIMIT 30 +#define BM_CLKCTRL_STATUS_CPU_LIMIT 0xC0000000 +#define BF_CLKCTRL_STATUS_CPU_LIMIT(v) \ + (((v) << 30) & BM_CLKCTRL_STATUS_CPU_LIMIT) +#define BP_CLKCTRL_STATUS_RSRVD 0 +#define BM_CLKCTRL_STATUS_RSRVD 0x3FFFFFFF +#define BF_CLKCTRL_STATUS_RSRVD(v) \ + (((v) << 0) & BM_CLKCTRL_STATUS_RSRVD) + +#define HW_CLKCTRL_VERSION (0x00000140) +#define HW_CLKCTRL_VERSION_ADDR \ + (REGS_CLKCTRL_BASE + HW_CLKCTRL_VERSION) + +#define BP_CLKCTRL_VERSION_MAJOR 24 +#define BM_CLKCTRL_VERSION_MAJOR 0xFF000000 +#define BF_CLKCTRL_VERSION_MAJOR(v) \ + (((v) << 24) & BM_CLKCTRL_VERSION_MAJOR) +#define BP_CLKCTRL_VERSION_MINOR 16 +#define BM_CLKCTRL_VERSION_MINOR 0x00FF0000 +#define BF_CLKCTRL_VERSION_MINOR(v) \ + (((v) << 16) & BM_CLKCTRL_VERSION_MINOR) +#define BP_CLKCTRL_VERSION_STEP 0 +#define BM_CLKCTRL_VERSION_STEP 0x0000FFFF +#define BF_CLKCTRL_VERSION_STEP(v) \ + (((v) << 0) & BM_CLKCTRL_VERSION_STEP) +#endif /* __ARCH_ARM___CLKCTRL_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-dcp.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-dcp.h @@ -1,7 +1,7 @@ /* - * stmp378x: DCP register definitions + * STMP DCP Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,71 +17,763 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_DCP_BASE (STMP3XXX_REGS_BASE + 0x28000) -#define REGS_DCP_PHYS 0x80028000 -#define REGS_DCP_SIZE 0x2000 -#define HW_DCP_CTRL 0x0 -#define BM_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE 0x000000FF -#define BP_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE 0 -#define BM_DCP_CTRL_ENABLE_CONTEXT_CACHING 0x00400000 -#define BM_DCP_CTRL_GATHER_RESIDUAL_WRITES 0x00800000 -#define BM_DCP_CTRL_CLKGATE 0x40000000 +#ifndef __ARCH_ARM___DCP_H +#define __ARCH_ARM___DCP_H 1 + +#define REGS_DCP_BASE (STMP3XXX_REGS_BASE + 0x28000) +#define REGS_DCP_PHYS (0x80028000) +#define REGS_DCP_SIZE 0x00002000 + +#define HW_DCP_CTRL (0x00000000) +#define HW_DCP_CTRL_SET (0x00000004) +#define HW_DCP_CTRL_CLR (0x00000008) +#define HW_DCP_CTRL_TOG (0x0000000c) +#define HW_DCP_CTRL_ADDR \ + (REGS_DCP_BASE + HW_DCP_CTRL) +#define HW_DCP_CTRL_SET_ADDR \ + (REGS_DCP_BASE + HW_DCP_CTRL_SET) +#define HW_DCP_CTRL_CLR_ADDR \ + (REGS_DCP_BASE + HW_DCP_CTRL_CLR) +#define HW_DCP_CTRL_TOG_ADDR \ + (REGS_DCP_BASE + HW_DCP_CTRL_TOG) + #define BM_DCP_CTRL_SFTRST 0x80000000 +#define BM_DCP_CTRL_CLKGATE 0x40000000 +#define BM_DCP_CTRL_PRESENT_CRYPTO 0x20000000 +#define BV_DCP_CTRL_PRESENT_CRYPTO__Present 0x1 +#define BV_DCP_CTRL_PRESENT_CRYPTO__Absent 0x0 +#define BM_DCP_CTRL_PRESENT_CSC 0x10000000 +#define BV_DCP_CTRL_PRESENT_CSC__Present 0x1 +#define BV_DCP_CTRL_PRESENT_CSC__Absent 0x0 +#define BP_DCP_CTRL_RSVD1 24 +#define BM_DCP_CTRL_RSVD1 0x0F000000 +#define BF_DCP_CTRL_RSVD1(v) \ + (((v) << 24) & BM_DCP_CTRL_RSVD1) +#define BM_DCP_CTRL_GATHER_RESIDUAL_WRITES 0x00800000 +#define BM_DCP_CTRL_ENABLE_CONTEXT_CACHING 0x00400000 +#define BM_DCP_CTRL_ENABLE_CONTEXT_SWITCHING 0x00200000 +#define BP_DCP_CTRL_RSVD0 9 +#define BM_DCP_CTRL_RSVD0 0x001FFE00 +#define BF_DCP_CTRL_RSVD0(v) \ + (((v) << 9) & BM_DCP_CTRL_RSVD0) +#define BM_DCP_CTRL_CSC_INTERRUPT_ENABLE 0x00000100 +#define BP_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE 0 +#define BM_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE 0x000000FF +#define BF_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(v) \ + (((v) << 0) & BM_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE) +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH0 0x01 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH1 0x02 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH2 0x04 +#define BV_DCP_CTRL_CHANNEL_INTERRUPT_ENABLE__CH3 0x08 -#define HW_DCP_STAT 0x10 -#define BM_DCP_STAT_IRQ 0x0000000F -#define BP_DCP_STAT_IRQ 0 +#define HW_DCP_STAT (0x00000010) +#define HW_DCP_STAT_SET (0x00000014) +#define HW_DCP_STAT_CLR (0x00000018) +#define HW_DCP_STAT_TOG (0x0000001c) +#define HW_DCP_STAT_ADDR \ + (REGS_DCP_BASE + HW_DCP_STAT) +#define HW_DCP_STAT_SET_ADDR \ + (REGS_DCP_BASE + HW_DCP_STAT_SET) +#define HW_DCP_STAT_CLR_ADDR \ + (REGS_DCP_BASE + HW_DCP_STAT_CLR) +#define HW_DCP_STAT_TOG_ADDR \ + (REGS_DCP_BASE + HW_DCP_STAT_TOG) -#define HW_DCP_CHANNELCTRL 0x20 -#define BM_DCP_CHANNELCTRL_ENABLE_CHANNEL 0x000000FF +#define BP_DCP_STAT_RSVD2 29 +#define BM_DCP_STAT_RSVD2 0xE0000000 +#define BF_DCP_STAT_RSVD2(v) \ + (((v) << 29) & BM_DCP_STAT_RSVD2) +#define BM_DCP_STAT_OTP_KEY_READY 0x10000000 +#define BP_DCP_STAT_CUR_CHANNEL 24 +#define BM_DCP_STAT_CUR_CHANNEL 0x0F000000 +#define BF_DCP_STAT_CUR_CHANNEL(v) \ + (((v) << 24) & BM_DCP_STAT_CUR_CHANNEL) +#define BV_DCP_STAT_CUR_CHANNEL__None 0x0 +#define BV_DCP_STAT_CUR_CHANNEL__CH0 0x1 +#define BV_DCP_STAT_CUR_CHANNEL__CH1 0x2 +#define BV_DCP_STAT_CUR_CHANNEL__CH2 0x3 +#define BV_DCP_STAT_CUR_CHANNEL__CH3 0x4 +#define BV_DCP_STAT_CUR_CHANNEL__CSC 0x8 +#define BP_DCP_STAT_READY_CHANNELS 16 +#define BM_DCP_STAT_READY_CHANNELS 0x00FF0000 +#define BF_DCP_STAT_READY_CHANNELS(v) \ + (((v) << 16) & BM_DCP_STAT_READY_CHANNELS) +#define BV_DCP_STAT_READY_CHANNELS__CH0 0x01 +#define BV_DCP_STAT_READY_CHANNELS__CH1 0x02 +#define BV_DCP_STAT_READY_CHANNELS__CH2 0x04 +#define BV_DCP_STAT_READY_CHANNELS__CH3 0x08 +#define BP_DCP_STAT_RSVD1 9 +#define BM_DCP_STAT_RSVD1 0x0000FE00 +#define BF_DCP_STAT_RSVD1(v) \ + (((v) << 9) & BM_DCP_STAT_RSVD1) +#define BM_DCP_STAT_CSCIRQ 0x00000100 +#define BP_DCP_STAT_RSVD0 4 +#define BM_DCP_STAT_RSVD0 0x000000F0 +#define BF_DCP_STAT_RSVD0(v) \ + (((v) << 4) & BM_DCP_STAT_RSVD0) +#define BP_DCP_STAT_IRQ 0 +#define BM_DCP_STAT_IRQ 0x0000000F +#define BF_DCP_STAT_IRQ(v) \ + (((v) << 0) & BM_DCP_STAT_IRQ) + +#define HW_DCP_CHANNELCTRL (0x00000020) +#define HW_DCP_CHANNELCTRL_SET (0x00000024) +#define HW_DCP_CHANNELCTRL_CLR (0x00000028) +#define HW_DCP_CHANNELCTRL_TOG (0x0000002c) +#define HW_DCP_CHANNELCTRL_ADDR \ + (REGS_DCP_BASE + HW_DCP_CHANNELCTRL) +#define HW_DCP_CHANNELCTRL_SET_ADDR \ + (REGS_DCP_BASE + HW_DCP_CHANNELCTRL_SET) +#define HW_DCP_CHANNELCTRL_CLR_ADDR \ + (REGS_DCP_BASE + HW_DCP_CHANNELCTRL_CLR) +#define HW_DCP_CHANNELCTRL_TOG_ADDR \ + (REGS_DCP_BASE + HW_DCP_CHANNELCTRL_TOG) + +#define BP_DCP_CHANNELCTRL_RSVD 19 +#define BM_DCP_CHANNELCTRL_RSVD 0xFFF80000 +#define BF_DCP_CHANNELCTRL_RSVD(v) \ + (((v) << 19) & BM_DCP_CHANNELCTRL_RSVD) +#define BP_DCP_CHANNELCTRL_CSC_PRIORITY 17 +#define BM_DCP_CHANNELCTRL_CSC_PRIORITY 0x00060000 +#define BF_DCP_CHANNELCTRL_CSC_PRIORITY(v) \ + (((v) << 17) & BM_DCP_CHANNELCTRL_CSC_PRIORITY) +#define BV_DCP_CHANNELCTRL_CSC_PRIORITY__HIGH 0x3 +#define BV_DCP_CHANNELCTRL_CSC_PRIORITY__MED 0x2 +#define BV_DCP_CHANNELCTRL_CSC_PRIORITY__LOW 0x1 +#define BV_DCP_CHANNELCTRL_CSC_PRIORITY__BACKGROUND 0x0 +#define BM_DCP_CHANNELCTRL_CH0_IRQ_MERGED 0x00010000 +#define BP_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL 8 +#define BM_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL 0x0000FF00 +#define BF_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(v) \ + (((v) << 8) & BM_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL) +#define BV_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL__CH0 0x01 +#define BV_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL__CH1 0x02 +#define BV_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL__CH2 0x04 +#define BV_DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL__CH3 0x08 #define BP_DCP_CHANNELCTRL_ENABLE_CHANNEL 0 +#define BM_DCP_CHANNELCTRL_ENABLE_CHANNEL 0x000000FF +#define BF_DCP_CHANNELCTRL_ENABLE_CHANNEL(v) \ + (((v) << 0) & BM_DCP_CHANNELCTRL_ENABLE_CHANNEL) +#define BV_DCP_CHANNELCTRL_ENABLE_CHANNEL__CH0 0x01 +#define BV_DCP_CHANNELCTRL_ENABLE_CHANNEL__CH1 0x02 +#define BV_DCP_CHANNELCTRL_ENABLE_CHANNEL__CH2 0x04 +#define BV_DCP_CHANNELCTRL_ENABLE_CHANNEL__CH3 0x08 -#define HW_DCP_CONTEXT 0x50 -#define BM_DCP_PACKET1_INTERRUPT 0x00000001 -#define BP_DCP_PACKET1_INTERRUPT 0 -#define BM_DCP_PACKET1_DECR_SEMAPHORE 0x00000002 -#define BM_DCP_PACKET1_CHAIN 0x00000004 -#define BM_DCP_PACKET1_CHAIN_CONTIGUOUS 0x00000008 -#define BM_DCP_PACKET1_ENABLE_CIPHER 0x00000020 -#define BM_DCP_PACKET1_ENABLE_HASH 0x00000040 -#define BM_DCP_PACKET1_CIPHER_ENCRYPT 0x00000100 -#define BM_DCP_PACKET1_CIPHER_INIT 0x00000200 -#define BM_DCP_PACKET1_OTP_KEY 0x00000400 -#define BM_DCP_PACKET1_PAYLOAD_KEY 0x00000800 -#define BM_DCP_PACKET1_HASH_INIT 0x00001000 +#define HW_DCP_CAPABILITY0 (0x00000030) +#define HW_DCP_CAPABILITY0_ADDR \ + (REGS_DCP_BASE + HW_DCP_CAPABILITY0) + +#define BM_DCP_CAPABILITY0_DISABLE_DECRYPT 0x80000000 +#define BM_DCP_CAPABILITY0_ENABLE_TZONE 0x40000000 +#define BP_DCP_CAPABILITY0_RSVD 12 +#define BM_DCP_CAPABILITY0_RSVD 0x3FFFF000 +#define BF_DCP_CAPABILITY0_RSVD(v) \ + (((v) << 12) & BM_DCP_CAPABILITY0_RSVD) +#define BP_DCP_CAPABILITY0_NUM_CHANNELS 8 +#define BM_DCP_CAPABILITY0_NUM_CHANNELS 0x00000F00 +#define BF_DCP_CAPABILITY0_NUM_CHANNELS(v) \ + (((v) << 8) & BM_DCP_CAPABILITY0_NUM_CHANNELS) +#define BP_DCP_CAPABILITY0_NUM_KEYS 0 +#define BM_DCP_CAPABILITY0_NUM_KEYS 0x000000FF +#define BF_DCP_CAPABILITY0_NUM_KEYS(v) \ + (((v) << 0) & BM_DCP_CAPABILITY0_NUM_KEYS) + +#define HW_DCP_CAPABILITY1 (0x00000040) +#define HW_DCP_CAPABILITY1_ADDR \ + (REGS_DCP_BASE + HW_DCP_CAPABILITY1) + +#define BP_DCP_CAPABILITY1_HASH_ALGORITHMS 16 +#define BM_DCP_CAPABILITY1_HASH_ALGORITHMS 0xFFFF0000 +#define BF_DCP_CAPABILITY1_HASH_ALGORITHMS(v) \ + (((v) << 16) & BM_DCP_CAPABILITY1_HASH_ALGORITHMS) +#define BV_DCP_CAPABILITY1_HASH_ALGORITHMS__SHA1 0x0001 +#define BV_DCP_CAPABILITY1_HASH_ALGORITHMS__CRC32 0x0002 +#define BP_DCP_CAPABILITY1_CIPHER_ALGORITHMS 0 +#define BM_DCP_CAPABILITY1_CIPHER_ALGORITHMS 0x0000FFFF +#define BF_DCP_CAPABILITY1_CIPHER_ALGORITHMS(v) \ + (((v) << 0) & BM_DCP_CAPABILITY1_CIPHER_ALGORITHMS) +#define BV_DCP_CAPABILITY1_CIPHER_ALGORITHMS__AES128 0x0001 + +#define HW_DCP_CONTEXT (0x00000050) +#define HW_DCP_CONTEXT_ADDR \ + (REGS_DCP_BASE + HW_DCP_CONTEXT) + +#define BP_DCP_CONTEXT_ADDR 0 +#define BM_DCP_CONTEXT_ADDR 0xFFFFFFFF +#define BF_DCP_CONTEXT_ADDR(v) (v) + +#define HW_DCP_KEY (0x00000060) +#define HW_DCP_KEY_ADDR \ + (REGS_DCP_BASE + HW_DCP_KEY) + +#define BP_DCP_KEY_RSVD 8 +#define BM_DCP_KEY_RSVD 0xFFFFFF00 +#define BF_DCP_KEY_RSVD(v) \ + (((v) << 8) & BM_DCP_KEY_RSVD) +#define BP_DCP_KEY_RSVD_INDEX 6 +#define BM_DCP_KEY_RSVD_INDEX 0x000000C0 +#define BF_DCP_KEY_RSVD_INDEX(v) \ + (((v) << 6) & BM_DCP_KEY_RSVD_INDEX) +#define BP_DCP_KEY_INDEX 4 +#define BM_DCP_KEY_INDEX 0x00000030 +#define BF_DCP_KEY_INDEX(v) \ + (((v) << 4) & BM_DCP_KEY_INDEX) +#define BP_DCP_KEY_RSVD_SUBWORD 2 +#define BM_DCP_KEY_RSVD_SUBWORD 0x0000000C +#define BF_DCP_KEY_RSVD_SUBWORD(v) \ + (((v) << 2) & BM_DCP_KEY_RSVD_SUBWORD) +#define BP_DCP_KEY_SUBWORD 0 +#define BM_DCP_KEY_SUBWORD 0x00000003 +#define BF_DCP_KEY_SUBWORD(v) \ + (((v) << 0) & BM_DCP_KEY_SUBWORD) + +#define HW_DCP_KEYDATA (0x00000070) +#define HW_DCP_KEYDATA_ADDR \ + (REGS_DCP_BASE + HW_DCP_KEYDATA) + +#define BP_DCP_KEYDATA_DATA 0 +#define BM_DCP_KEYDATA_DATA 0xFFFFFFFF +#define BF_DCP_KEYDATA_DATA(v) (v) + +#define HW_DCP_PACKET0 (0x00000080) +#define HW_DCP_PACKET0_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET0) + +#define BP_DCP_PACKET0_ADDR 0 +#define BM_DCP_PACKET0_ADDR 0xFFFFFFFF +#define BF_DCP_PACKET0_ADDR(v) (v) + +#define HW_DCP_PACKET1 (0x00000090) +#define HW_DCP_PACKET1_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET1) + +#define BP_DCP_PACKET1_TAG 24 +#define BM_DCP_PACKET1_TAG 0xFF000000 +#define BF_DCP_PACKET1_TAG(v) \ + (((v) << 24) & BM_DCP_PACKET1_TAG) +#define BM_DCP_PACKET1_OUTPUT_WORDSWAP 0x00800000 +#define BM_DCP_PACKET1_OUTPUT_BYTESWAP 0x00400000 +#define BM_DCP_PACKET1_INPUT_WORDSWAP 0x00200000 +#define BM_DCP_PACKET1_INPUT_BYTESWAP 0x00100000 +#define BM_DCP_PACKET1_KEY_WORDSWAP 0x00080000 +#define BM_DCP_PACKET1_KEY_BYTESWAP 0x00040000 +#define BM_DCP_PACKET1_TEST_SEMA_IRQ 0x00020000 +#define BM_DCP_PACKET1_CONSTANT_FILL 0x00010000 +#define BM_DCP_PACKET1_HASH_OUTPUT 0x00008000 +#define BV_DCP_PACKET1_HASH_OUTPUT__INPUT 0x00 +#define BV_DCP_PACKET1_HASH_OUTPUT__OUTPUT 0x01 +#define BM_DCP_PACKET1_CHECK_HASH 0x00004000 #define BM_DCP_PACKET1_HASH_TERM 0x00002000 -#define BM_DCP_PACKET2_CIPHER_SELECT 0x0000000F -#define BP_DCP_PACKET2_CIPHER_SELECT 0 -#define BM_DCP_PACKET2_CIPHER_MODE 0x000000F0 -#define BP_DCP_PACKET2_CIPHER_MODE 4 -#define BM_DCP_PACKET2_KEY_SELECT 0x0000FF00 -#define BP_DCP_PACKET2_KEY_SELECT 8 -#define BM_DCP_PACKET2_HASH_SELECT 0x000F0000 -#define BP_DCP_PACKET2_HASH_SELECT 16 -#define BM_DCP_PACKET2_CIPHER_CFG 0xFF000000 +#define BM_DCP_PACKET1_HASH_INIT 0x00001000 +#define BM_DCP_PACKET1_PAYLOAD_KEY 0x00000800 +#define BM_DCP_PACKET1_OTP_KEY 0x00000400 +#define BM_DCP_PACKET1_CIPHER_INIT 0x00000200 +#define BM_DCP_PACKET1_CIPHER_ENCRYPT 0x00000100 +#define BV_DCP_PACKET1_CIPHER_ENCRYPT__ENCRYPT 0x01 +#define BV_DCP_PACKET1_CIPHER_ENCRYPT__DECRYPT 0x00 +#define BM_DCP_PACKET1_ENABLE_BLIT 0x00000080 +#define BM_DCP_PACKET1_ENABLE_HASH 0x00000040 +#define BM_DCP_PACKET1_ENABLE_CIPHER 0x00000020 +#define BM_DCP_PACKET1_ENABLE_MEMCOPY 0x00000010 +#define BM_DCP_PACKET1_CHAIN_CONTIGUOUS 0x00000008 +#define BM_DCP_PACKET1_CHAIN 0x00000004 +#define BM_DCP_PACKET1_DECR_SEMAPHORE 0x00000002 +#define BM_DCP_PACKET1_INTERRUPT 0x00000001 + +#define HW_DCP_PACKET2 (0x000000a0) +#define HW_DCP_PACKET2_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET2) + #define BP_DCP_PACKET2_CIPHER_CFG 24 +#define BM_DCP_PACKET2_CIPHER_CFG 0xFF000000 +#define BF_DCP_PACKET2_CIPHER_CFG(v) \ + (((v) << 24) & BM_DCP_PACKET2_CIPHER_CFG) +#define BP_DCP_PACKET2_RSVD 20 +#define BM_DCP_PACKET2_RSVD 0x00F00000 +#define BF_DCP_PACKET2_RSVD(v) \ + (((v) << 20) & BM_DCP_PACKET2_RSVD) +#define BP_DCP_PACKET2_HASH_SELECT 16 +#define BM_DCP_PACKET2_HASH_SELECT 0x000F0000 +#define BF_DCP_PACKET2_HASH_SELECT(v) \ + (((v) << 16) & BM_DCP_PACKET2_HASH_SELECT) +#define BV_DCP_PACKET2_HASH_SELECT__SHA1 0x00 +#define BV_DCP_PACKET2_HASH_SELECT__CRC32 0x01 +#define BP_DCP_PACKET2_KEY_SELECT 8 +#define BM_DCP_PACKET2_KEY_SELECT 0x0000FF00 +#define BF_DCP_PACKET2_KEY_SELECT(v) \ + (((v) << 8) & BM_DCP_PACKET2_KEY_SELECT) +#define BP_DCP_PACKET2_CIPHER_MODE 4 +#define BM_DCP_PACKET2_CIPHER_MODE 0x000000F0 +#define BF_DCP_PACKET2_CIPHER_MODE(v) \ + (((v) << 4) & BM_DCP_PACKET2_CIPHER_MODE) +#define BV_DCP_PACKET2_CIPHER_MODE__ECB 0x00 +#define BV_DCP_PACKET2_CIPHER_MODE__CBC 0x01 +#define BP_DCP_PACKET2_CIPHER_SELECT 0 +#define BM_DCP_PACKET2_CIPHER_SELECT 0x0000000F +#define BF_DCP_PACKET2_CIPHER_SELECT(v) \ + (((v) << 0) & BM_DCP_PACKET2_CIPHER_SELECT) +#define BV_DCP_PACKET2_CIPHER_SELECT__AES128 0x00 -#define HW_DCP_CH0CMDPTR (0x100 + 0 * 0x40) -#define HW_DCP_CH1CMDPTR (0x100 + 1 * 0x40) -#define HW_DCP_CH2CMDPTR (0x100 + 2 * 0x40) -#define HW_DCP_CH3CMDPTR (0x100 + 3 * 0x40) - -#define HW_DCP_CHnCMDPTR 0x100 - -#define HW_DCP_CH0SEMA (0x110 + 0 * 0x40) -#define HW_DCP_CH1SEMA (0x110 + 1 * 0x40) -#define HW_DCP_CH2SEMA (0x110 + 2 * 0x40) -#define HW_DCP_CH3SEMA (0x110 + 3 * 0x40) +#define HW_DCP_PACKET3 (0x000000b0) +#define HW_DCP_PACKET3_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET3) -#define HW_DCP_CHnSEMA 0x110 -#define BM_DCP_CHnSEMA_INCREMENT 0x000000FF +#define BP_DCP_PACKET3_ADDR 0 +#define BM_DCP_PACKET3_ADDR 0xFFFFFFFF +#define BF_DCP_PACKET3_ADDR(v) (v) + +#define HW_DCP_PACKET4 (0x000000c0) +#define HW_DCP_PACKET4_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET4) + +#define BP_DCP_PACKET4_ADDR 0 +#define BM_DCP_PACKET4_ADDR 0xFFFFFFFF +#define BF_DCP_PACKET4_ADDR(v) (v) + +#define HW_DCP_PACKET5 (0x000000d0) +#define HW_DCP_PACKET5_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET5) + +#define BP_DCP_PACKET5_COUNT 0 +#define BM_DCP_PACKET5_COUNT 0xFFFFFFFF +#define BF_DCP_PACKET5_COUNT(v) (v) + +#define HW_DCP_PACKET6 (0x000000e0) +#define HW_DCP_PACKET6_ADDR \ + (REGS_DCP_BASE + HW_DCP_PACKET6) + +#define BP_DCP_PACKET6_ADDR 0 +#define BM_DCP_PACKET6_ADDR 0xFFFFFFFF +#define BF_DCP_PACKET6_ADDR(v) (v) + +/* + * multi-register-define name HW_DCP_CHnCMDPTR + * base 0x00000100 + * count 4 + * offset 0x40 + */ +#define HW_DCP_CHnCMDPTR(n) (0x00000100 + (n) * 0x40) +#define HW_DCP_CHnCMDPTR_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnCMDPTR(n)) +#define BP_DCP_CHnCMDPTR_ADDR 0 +#define BM_DCP_CHnCMDPTR_ADDR 0xFFFFFFFF +#define BF_DCP_CHnCMDPTR_ADDR(v) (v) + +/* + * multi-register-define name HW_DCP_CHnSEMA + * base 0x00000110 + * count 4 + * offset 0x40 + */ +#define HW_DCP_CHnSEMA(n) (0x00000110 + (n) * 0x40) +#define HW_DCP_CHnSEMA_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnSEMA(n)) +#define BP_DCP_CHnSEMA_RSVD2 24 +#define BM_DCP_CHnSEMA_RSVD2 0xFF000000 +#define BF_DCP_CHnSEMA_RSVD2(v) \ + (((v) << 24) & BM_DCP_CHnSEMA_RSVD2) +#define BP_DCP_CHnSEMA_VALUE 16 +#define BM_DCP_CHnSEMA_VALUE 0x00FF0000 +#define BF_DCP_CHnSEMA_VALUE(v) \ + (((v) << 16) & BM_DCP_CHnSEMA_VALUE) +#define BP_DCP_CHnSEMA_RSVD1 8 +#define BM_DCP_CHnSEMA_RSVD1 0x0000FF00 +#define BF_DCP_CHnSEMA_RSVD1(v) \ + (((v) << 8) & BM_DCP_CHnSEMA_RSVD1) #define BP_DCP_CHnSEMA_INCREMENT 0 +#define BM_DCP_CHnSEMA_INCREMENT 0x000000FF +#define BF_DCP_CHnSEMA_INCREMENT(v) \ + (((v) << 0) & BM_DCP_CHnSEMA_INCREMENT) + +/* + * multi-register-define name HW_DCP_CHnSTAT + * base 0x00000120 + * count 4 + * offset 0x40 + */ +#define HW_DCP_CHnSTAT(n) (0x00000120 + (n) * 0x40) +#define HW_DCP_CHnSTAT_SET(n) (0x00000124 + (n) * 0x40) +#define HW_DCP_CHnSTAT_CLR(n) (0x00000128 + (n) * 0x40) +#define HW_DCP_CHnSTAT_TOG(n) (0x0000012c + (n) * 0x40) +#define HW_DCP_CHnSTAT_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnSTAT(n)) +#define HW_DCP_CHnSTAT_SET_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnSTAT_SET(n)) +#define HW_DCP_CHnSTAT_CLR_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnSTAT_CLR(n)) +#define HW_DCP_CHnSTAT_TOG_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnSTAT_TOG(n)) +#define BP_DCP_CHnSTAT_TAG 24 +#define BM_DCP_CHnSTAT_TAG 0xFF000000 +#define BF_DCP_CHnSTAT_TAG(v) \ + (((v) << 24) & BM_DCP_CHnSTAT_TAG) +#define BP_DCP_CHnSTAT_ERROR_CODE 16 +#define BM_DCP_CHnSTAT_ERROR_CODE 0x00FF0000 +#define BF_DCP_CHnSTAT_ERROR_CODE(v) \ + (((v) << 16) & BM_DCP_CHnSTAT_ERROR_CODE) +#define BV_DCP_CHnSTAT_ERROR_CODE__NEXT_CHAIN_IS_0 0x01 +#define BV_DCP_CHnSTAT_ERROR_CODE__NO_CHAIN 0x02 +#define BV_DCP_CHnSTAT_ERROR_CODE__CONTEXT_ERROR 0x03 +#define BV_DCP_CHnSTAT_ERROR_CODE__PAYLOAD_ERROR 0x04 +#define BV_DCP_CHnSTAT_ERROR_CODE__INVALID_MODE 0x05 +#define BP_DCP_CHnSTAT_RSVD0 7 +#define BM_DCP_CHnSTAT_RSVD0 0x0000FF80 +#define BF_DCP_CHnSTAT_RSVD0(v) \ + (((v) << 7) & BM_DCP_CHnSTAT_RSVD0) +#define BM_DCP_CHnSTAT_ERROR_PAGEFAULT 0x00000040 +#define BM_DCP_CHnSTAT_ERROR_DST 0x00000020 +#define BM_DCP_CHnSTAT_ERROR_SRC 0x00000010 +#define BM_DCP_CHnSTAT_ERROR_PACKET 0x00000008 +#define BM_DCP_CHnSTAT_ERROR_SETUP 0x00000004 +#define BM_DCP_CHnSTAT_HASH_MISMATCH 0x00000002 +#define BM_DCP_CHnSTAT_RSVD_COMPLETE 0x00000001 + +/* + * multi-register-define name HW_DCP_CHnOPTS + * base 0x00000130 + * count 4 + * offset 0x40 + */ +#define HW_DCP_CHnOPTS(n) (0x00000130 + (n) * 0x40) +#define HW_DCP_CHnOPTS_SET(n) (0x00000134 + (n) * 0x40) +#define HW_DCP_CHnOPTS_CLR(n) (0x00000138 + (n) * 0x40) +#define HW_DCP_CHnOPTS_TOG(n) (0x0000013c + (n) * 0x40) +#define HW_DCP_CHnOPTS_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnOPTS(n)) +#define HW_DCP_CHnOPTS_SET_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnOPTS_SET(n)) +#define HW_DCP_CHnOPTS_CLR_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnOPTS_CLR(n)) +#define HW_DCP_CHnOPTS_TOG_ADDR(n) \ + (REGS_DCP_BASE + HW_DCP_CHnOPTS_TOG(n)) +#define BP_DCP_CHnOPTS_RSVD 16 +#define BM_DCP_CHnOPTS_RSVD 0xFFFF0000 +#define BF_DCP_CHnOPTS_RSVD(v) \ + (((v) << 16) & BM_DCP_CHnOPTS_RSVD) +#define BP_DCP_CHnOPTS_RECOVERY_TIMER 0 +#define BM_DCP_CHnOPTS_RECOVERY_TIMER 0x0000FFFF +#define BF_DCP_CHnOPTS_RECOVERY_TIMER(v) \ + (((v) << 0) & BM_DCP_CHnOPTS_RECOVERY_TIMER) + +#define HW_DCP_CSCCTRL0 (0x00000300) +#define HW_DCP_CSCCTRL0_SET (0x00000304) +#define HW_DCP_CSCCTRL0_CLR (0x00000308) +#define HW_DCP_CSCCTRL0_TOG (0x0000030c) +#define HW_DCP_CSCCTRL0_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCTRL0) +#define HW_DCP_CSCCTRL0_SET_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCTRL0_SET) +#define HW_DCP_CSCCTRL0_CLR_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCTRL0_CLR) +#define HW_DCP_CSCCTRL0_TOG_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCTRL0_TOG) + +#define BP_DCP_CSCCTRL0_RSVD1 16 +#define BM_DCP_CSCCTRL0_RSVD1 0xFFFF0000 +#define BF_DCP_CSCCTRL0_RSVD1(v) \ + (((v) << 16) & BM_DCP_CSCCTRL0_RSVD1) +#define BM_DCP_CSCCTRL0_CLIP 0x00008000 +#define BM_DCP_CSCCTRL0_UPSAMPLE 0x00004000 +#define BM_DCP_CSCCTRL0_SCALE 0x00002000 +#define BM_DCP_CSCCTRL0_ROTATE 0x00001000 +#define BM_DCP_CSCCTRL0_SUBSAMPLE 0x00000800 +#define BM_DCP_CSCCTRL0_DELTA 0x00000400 +#define BP_DCP_CSCCTRL0_RGB_FORMAT 8 +#define BM_DCP_CSCCTRL0_RGB_FORMAT 0x00000300 +#define BF_DCP_CSCCTRL0_RGB_FORMAT(v) \ + (((v) << 8) & BM_DCP_CSCCTRL0_RGB_FORMAT) +#define BV_DCP_CSCCTRL0_RGB_FORMAT__RGB16_565 0x0 +#define BV_DCP_CSCCTRL0_RGB_FORMAT__YCbCrI 0x1 +#define BV_DCP_CSCCTRL0_RGB_FORMAT__RGB24 0x2 +#define BV_DCP_CSCCTRL0_RGB_FORMAT__YUV422I 0x3 +#define BP_DCP_CSCCTRL0_YUV_FORMAT 4 +#define BM_DCP_CSCCTRL0_YUV_FORMAT 0x000000F0 +#define BF_DCP_CSCCTRL0_YUV_FORMAT(v) \ + (((v) << 4) & BM_DCP_CSCCTRL0_YUV_FORMAT) +#define BV_DCP_CSCCTRL0_YUV_FORMAT__YUV420 0x0 +#define BV_DCP_CSCCTRL0_YUV_FORMAT__YUV422 0x2 +#define BP_DCP_CSCCTRL0_RSVD0 1 +#define BM_DCP_CSCCTRL0_RSVD0 0x0000000E +#define BF_DCP_CSCCTRL0_RSVD0(v) \ + (((v) << 1) & BM_DCP_CSCCTRL0_RSVD0) +#define BM_DCP_CSCCTRL0_ENABLE 0x00000001 + +#define HW_DCP_CSCSTAT (0x00000310) +#define HW_DCP_CSCSTAT_SET (0x00000314) +#define HW_DCP_CSCSTAT_CLR (0x00000318) +#define HW_DCP_CSCSTAT_TOG (0x0000031c) +#define HW_DCP_CSCSTAT_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCSTAT) +#define HW_DCP_CSCSTAT_SET_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCSTAT_SET) +#define HW_DCP_CSCSTAT_CLR_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCSTAT_CLR) +#define HW_DCP_CSCSTAT_TOG_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCSTAT_TOG) + +#define BP_DCP_CSCSTAT_RSVD3 24 +#define BM_DCP_CSCSTAT_RSVD3 0xFF000000 +#define BF_DCP_CSCSTAT_RSVD3(v) \ + (((v) << 24) & BM_DCP_CSCSTAT_RSVD3) +#define BP_DCP_CSCSTAT_ERROR_CODE 16 +#define BM_DCP_CSCSTAT_ERROR_CODE 0x00FF0000 +#define BF_DCP_CSCSTAT_ERROR_CODE(v) \ + (((v) << 16) & BM_DCP_CSCSTAT_ERROR_CODE) +#define BV_DCP_CSCSTAT_ERROR_CODE__LUMA0_FETCH_ERROR_Y0 0x01 +#define BV_DCP_CSCSTAT_ERROR_CODE__LUMA1_FETCH_ERROR_Y1 0x02 +#define BV_DCP_CSCSTAT_ERROR_CODE__CHROMA_FETCH_ERROR_U 0x03 +#define BV_DCP_CSCSTAT_ERROR_CODE__CHROMA_FETCH_ERROR_V 0x04 +#define BP_DCP_CSCSTAT_RSVD2 7 +#define BM_DCP_CSCSTAT_RSVD2 0x0000FF80 +#define BF_DCP_CSCSTAT_RSVD2(v) \ + (((v) << 7) & BM_DCP_CSCSTAT_RSVD2) +#define BM_DCP_CSCSTAT_ERROR_PAGEFAULT 0x00000040 +#define BM_DCP_CSCSTAT_ERROR_DST 0x00000020 +#define BM_DCP_CSCSTAT_ERROR_SRC 0x00000010 +#define BM_DCP_CSCSTAT_RSVD1 0x00000008 +#define BM_DCP_CSCSTAT_ERROR_SETUP 0x00000004 +#define BM_DCP_CSCSTAT_RSVD0 0x00000002 +#define BM_DCP_CSCSTAT_COMPLETE 0x00000001 + +#define HW_DCP_CSCOUTBUFPARAM (0x00000320) +#define HW_DCP_CSCOUTBUFPARAM_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCOUTBUFPARAM) + +#define BP_DCP_CSCOUTBUFPARAM_RSVD1 24 +#define BM_DCP_CSCOUTBUFPARAM_RSVD1 0xFF000000 +#define BF_DCP_CSCOUTBUFPARAM_RSVD1(v) \ + (((v) << 24) & BM_DCP_CSCOUTBUFPARAM_RSVD1) +#define BP_DCP_CSCOUTBUFPARAM_FIELD_SIZE 12 +#define BM_DCP_CSCOUTBUFPARAM_FIELD_SIZE 0x00FFF000 +#define BF_DCP_CSCOUTBUFPARAM_FIELD_SIZE(v) \ + (((v) << 12) & BM_DCP_CSCOUTBUFPARAM_FIELD_SIZE) +#define BP_DCP_CSCOUTBUFPARAM_LINE_SIZE 0 +#define BM_DCP_CSCOUTBUFPARAM_LINE_SIZE 0x00000FFF +#define BF_DCP_CSCOUTBUFPARAM_LINE_SIZE(v) \ + (((v) << 0) & BM_DCP_CSCOUTBUFPARAM_LINE_SIZE) + +#define HW_DCP_CSCINBUFPARAM (0x00000330) +#define HW_DCP_CSCINBUFPARAM_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCINBUFPARAM) + +#define BP_DCP_CSCINBUFPARAM_RSVD1 12 +#define BM_DCP_CSCINBUFPARAM_RSVD1 0xFFFFF000 +#define BF_DCP_CSCINBUFPARAM_RSVD1(v) \ + (((v) << 12) & BM_DCP_CSCINBUFPARAM_RSVD1) +#define BP_DCP_CSCINBUFPARAM_LINE_SIZE 0 +#define BM_DCP_CSCINBUFPARAM_LINE_SIZE 0x00000FFF +#define BF_DCP_CSCINBUFPARAM_LINE_SIZE(v) \ + (((v) << 0) & BM_DCP_CSCINBUFPARAM_LINE_SIZE) + +#define HW_DCP_CSCRGB (0x00000340) +#define HW_DCP_CSCRGB_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCRGB) + +#define BP_DCP_CSCRGB_ADDR 0 +#define BM_DCP_CSCRGB_ADDR 0xFFFFFFFF +#define BF_DCP_CSCRGB_ADDR(v) (v) + +#define HW_DCP_CSCLUMA (0x00000350) +#define HW_DCP_CSCLUMA_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCLUMA) + +#define BP_DCP_CSCLUMA_ADDR 0 +#define BM_DCP_CSCLUMA_ADDR 0xFFFFFFFF +#define BF_DCP_CSCLUMA_ADDR(v) (v) + +#define HW_DCP_CSCCHROMAU (0x00000360) +#define HW_DCP_CSCCHROMAU_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCHROMAU) + +#define BP_DCP_CSCCHROMAU_ADDR 0 +#define BM_DCP_CSCCHROMAU_ADDR 0xFFFFFFFF +#define BF_DCP_CSCCHROMAU_ADDR(v) (v) + +#define HW_DCP_CSCCHROMAV (0x00000370) +#define HW_DCP_CSCCHROMAV_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCHROMAV) + +#define BP_DCP_CSCCHROMAV_ADDR 0 +#define BM_DCP_CSCCHROMAV_ADDR 0xFFFFFFFF +#define BF_DCP_CSCCHROMAV_ADDR(v) (v) + +#define HW_DCP_CSCCOEFF0 (0x00000380) +#define HW_DCP_CSCCOEFF0_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCOEFF0) + +#define BP_DCP_CSCCOEFF0_RSVD1 26 +#define BM_DCP_CSCCOEFF0_RSVD1 0xFC000000 +#define BF_DCP_CSCCOEFF0_RSVD1(v) \ + (((v) << 26) & BM_DCP_CSCCOEFF0_RSVD1) +#define BP_DCP_CSCCOEFF0_C0 16 +#define BM_DCP_CSCCOEFF0_C0 0x03FF0000 +#define BF_DCP_CSCCOEFF0_C0(v) \ + (((v) << 16) & BM_DCP_CSCCOEFF0_C0) +#define BP_DCP_CSCCOEFF0_UV_OFFSET 8 +#define BM_DCP_CSCCOEFF0_UV_OFFSET 0x0000FF00 +#define BF_DCP_CSCCOEFF0_UV_OFFSET(v) \ + (((v) << 8) & BM_DCP_CSCCOEFF0_UV_OFFSET) +#define BP_DCP_CSCCOEFF0_Y_OFFSET 0 +#define BM_DCP_CSCCOEFF0_Y_OFFSET 0x000000FF +#define BF_DCP_CSCCOEFF0_Y_OFFSET(v) \ + (((v) << 0) & BM_DCP_CSCCOEFF0_Y_OFFSET) + +#define HW_DCP_CSCCOEFF1 (0x00000390) +#define HW_DCP_CSCCOEFF1_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCOEFF1) + +#define BP_DCP_CSCCOEFF1_RSVD1 26 +#define BM_DCP_CSCCOEFF1_RSVD1 0xFC000000 +#define BF_DCP_CSCCOEFF1_RSVD1(v) \ + (((v) << 26) & BM_DCP_CSCCOEFF1_RSVD1) +#define BP_DCP_CSCCOEFF1_C1 16 +#define BM_DCP_CSCCOEFF1_C1 0x03FF0000 +#define BF_DCP_CSCCOEFF1_C1(v) \ + (((v) << 16) & BM_DCP_CSCCOEFF1_C1) +#define BP_DCP_CSCCOEFF1_RSVD0 10 +#define BM_DCP_CSCCOEFF1_RSVD0 0x0000FC00 +#define BF_DCP_CSCCOEFF1_RSVD0(v) \ + (((v) << 10) & BM_DCP_CSCCOEFF1_RSVD0) +#define BP_DCP_CSCCOEFF1_C4 0 +#define BM_DCP_CSCCOEFF1_C4 0x000003FF +#define BF_DCP_CSCCOEFF1_C4(v) \ + (((v) << 0) & BM_DCP_CSCCOEFF1_C4) + +#define HW_DCP_CSCCOEFF2 (0x000003a0) +#define HW_DCP_CSCCOEFF2_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCOEFF2) + +#define BP_DCP_CSCCOEFF2_RSVD1 26 +#define BM_DCP_CSCCOEFF2_RSVD1 0xFC000000 +#define BF_DCP_CSCCOEFF2_RSVD1(v) \ + (((v) << 26) & BM_DCP_CSCCOEFF2_RSVD1) +#define BP_DCP_CSCCOEFF2_C2 16 +#define BM_DCP_CSCCOEFF2_C2 0x03FF0000 +#define BF_DCP_CSCCOEFF2_C2(v) \ + (((v) << 16) & BM_DCP_CSCCOEFF2_C2) +#define BP_DCP_CSCCOEFF2_RSVD0 10 +#define BM_DCP_CSCCOEFF2_RSVD0 0x0000FC00 +#define BF_DCP_CSCCOEFF2_RSVD0(v) \ + (((v) << 10) & BM_DCP_CSCCOEFF2_RSVD0) +#define BP_DCP_CSCCOEFF2_C3 0 +#define BM_DCP_CSCCOEFF2_C3 0x000003FF +#define BF_DCP_CSCCOEFF2_C3(v) \ + (((v) << 0) & BM_DCP_CSCCOEFF2_C3) + +#define HW_DCP_CSCCLIP (0x000003d0) +#define HW_DCP_CSCCLIP_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCCLIP) + +#define BP_DCP_CSCCLIP_RSVD1 24 +#define BM_DCP_CSCCLIP_RSVD1 0xFF000000 +#define BF_DCP_CSCCLIP_RSVD1(v) \ + (((v) << 24) & BM_DCP_CSCCLIP_RSVD1) +#define BP_DCP_CSCCLIP_HEIGHT 12 +#define BM_DCP_CSCCLIP_HEIGHT 0x00FFF000 +#define BF_DCP_CSCCLIP_HEIGHT(v) \ + (((v) << 12) & BM_DCP_CSCCLIP_HEIGHT) +#define BP_DCP_CSCCLIP_WIDTH 0 +#define BM_DCP_CSCCLIP_WIDTH 0x00000FFF +#define BF_DCP_CSCCLIP_WIDTH(v) \ + (((v) << 0) & BM_DCP_CSCCLIP_WIDTH) + +#define HW_DCP_CSCXSCALE (0x000003e0) +#define HW_DCP_CSCXSCALE_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCXSCALE) + +#define BP_DCP_CSCXSCALE_RSVD1 26 +#define BM_DCP_CSCXSCALE_RSVD1 0xFC000000 +#define BF_DCP_CSCXSCALE_RSVD1(v) \ + (((v) << 26) & BM_DCP_CSCXSCALE_RSVD1) +#define BP_DCP_CSCXSCALE_INT 24 +#define BM_DCP_CSCXSCALE_INT 0x03000000 +#define BF_DCP_CSCXSCALE_INT(v) \ + (((v) << 24) & BM_DCP_CSCXSCALE_INT) +#define BP_DCP_CSCXSCALE_FRAC 12 +#define BM_DCP_CSCXSCALE_FRAC 0x00FFF000 +#define BF_DCP_CSCXSCALE_FRAC(v) \ + (((v) << 12) & BM_DCP_CSCXSCALE_FRAC) +#define BP_DCP_CSCXSCALE_WIDTH 0 +#define BM_DCP_CSCXSCALE_WIDTH 0x00000FFF +#define BF_DCP_CSCXSCALE_WIDTH(v) \ + (((v) << 0) & BM_DCP_CSCXSCALE_WIDTH) + +#define HW_DCP_CSCYSCALE (0x000003f0) +#define HW_DCP_CSCYSCALE_ADDR \ + (REGS_DCP_BASE + HW_DCP_CSCYSCALE) + +#define BP_DCP_CSCYSCALE_RSVD1 26 +#define BM_DCP_CSCYSCALE_RSVD1 0xFC000000 +#define BF_DCP_CSCYSCALE_RSVD1(v) \ + (((v) << 26) & BM_DCP_CSCYSCALE_RSVD1) +#define BP_DCP_CSCYSCALE_INT 24 +#define BM_DCP_CSCYSCALE_INT 0x03000000 +#define BF_DCP_CSCYSCALE_INT(v) \ + (((v) << 24) & BM_DCP_CSCYSCALE_INT) +#define BP_DCP_CSCYSCALE_FRAC 12 +#define BM_DCP_CSCYSCALE_FRAC 0x00FFF000 +#define BF_DCP_CSCYSCALE_FRAC(v) \ + (((v) << 12) & BM_DCP_CSCYSCALE_FRAC) +#define BP_DCP_CSCYSCALE_HEIGHT 0 +#define BM_DCP_CSCYSCALE_HEIGHT 0x00000FFF +#define BF_DCP_CSCYSCALE_HEIGHT(v) \ + (((v) << 0) & BM_DCP_CSCYSCALE_HEIGHT) + +#define HW_DCP_DBGSELECT (0x00000400) +#define HW_DCP_DBGSELECT_ADDR \ + (REGS_DCP_BASE + HW_DCP_DBGSELECT) + +#define BP_DCP_DBGSELECT_RSVD 8 +#define BM_DCP_DBGSELECT_RSVD 0xFFFFFF00 +#define BF_DCP_DBGSELECT_RSVD(v) \ + (((v) << 8) & BM_DCP_DBGSELECT_RSVD) +#define BP_DCP_DBGSELECT_INDEX 0 +#define BM_DCP_DBGSELECT_INDEX 0x000000FF +#define BF_DCP_DBGSELECT_INDEX(v) \ + (((v) << 0) & BM_DCP_DBGSELECT_INDEX) +#define BV_DCP_DBGSELECT_INDEX__CONTROL 0x01 +#define BV_DCP_DBGSELECT_INDEX__OTPKEY0 0x10 +#define BV_DCP_DBGSELECT_INDEX__OTPKEY1 0x11 +#define BV_DCP_DBGSELECT_INDEX__OTPKEY2 0x12 +#define BV_DCP_DBGSELECT_INDEX__OTPKEY3 0x13 + +#define HW_DCP_DBGDATA (0x00000410) +#define HW_DCP_DBGDATA_ADDR \ + (REGS_DCP_BASE + HW_DCP_DBGDATA) + +#define BP_DCP_DBGDATA_DATA 0 +#define BM_DCP_DBGDATA_DATA 0xFFFFFFFF +#define BF_DCP_DBGDATA_DATA(v) (v) + +#define HW_DCP_PAGETABLE (0x00000420) +#define HW_DCP_PAGETABLE_ADDR \ + (REGS_DCP_BASE + HW_DCP_PAGETABLE) + +#define BP_DCP_PAGETABLE_BASE 2 +#define BM_DCP_PAGETABLE_BASE 0xFFFFFFFC +#define BF_DCP_PAGETABLE_BASE(v) \ + (((v) << 2) & BM_DCP_PAGETABLE_BASE) +#define BM_DCP_PAGETABLE_FLUSH 0x00000002 +#define BM_DCP_PAGETABLE_ENABLE 0x00000001 -#define HW_DCP_CH0STAT (0x120 + 0 * 0x40) -#define HW_DCP_CH1STAT (0x120 + 1 * 0x40) -#define HW_DCP_CH2STAT (0x120 + 2 * 0x40) -#define HW_DCP_CH3STAT (0x120 + 3 * 0x40) +#define HW_DCP_VERSION (0x00000430) +#define HW_DCP_VERSION_ADDR \ + (REGS_DCP_BASE + HW_DCP_VERSION) -#define HW_DCP_CHnSTAT 0x120 +#define BP_DCP_VERSION_MAJOR 24 +#define BM_DCP_VERSION_MAJOR 0xFF000000 +#define BF_DCP_VERSION_MAJOR(v) \ + (((v) << 24) & BM_DCP_VERSION_MAJOR) +#define BP_DCP_VERSION_MINOR 16 +#define BM_DCP_VERSION_MINOR 0x00FF0000 +#define BF_DCP_VERSION_MINOR(v) \ + (((v) << 16) & BM_DCP_VERSION_MINOR) +#define BP_DCP_VERSION_STEP 0 +#define BM_DCP_VERSION_STEP 0x0000FFFF +#define BF_DCP_VERSION_STEP(v) \ + (((v) << 0) & BM_DCP_VERSION_STEP) +#endif /* __ARCH_ARM___DCP_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-timrot.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-timrot.h @@ -1,7 +1,7 @@ /* - * stmp378x: TIMROT register definitions + * STMP TIMROT Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,52 +17,273 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_TIMROT -#define _MACH_REGS_TIMROT -#define REGS_TIMROT_BASE (STMP3XXX_REGS_BASE + 0x68000) -#define REGS_TIMROT_PHYS 0x80068000 -#define REGS_TIMROT_SIZE 0x2000 +#ifndef __ARCH_ARM___TIMROT_H +#define __ARCH_ARM___TIMROT_H 1 + +#define REGS_TIMROT_BASE (STMP3XXX_REGS_BASE + 0x68000) +#define REGS_TIMROT_PHYS (0x80068000) +#define REGS_TIMROT_SIZE 0x00002000 + +#define HW_TIMROT_ROTCTRL (0x00000000) +#define HW_TIMROT_ROTCTRL_SET (0x00000004) +#define HW_TIMROT_ROTCTRL_CLR (0x00000008) +#define HW_TIMROT_ROTCTRL_TOG (0x0000000c) +#define HW_TIMROT_ROTCTRL_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL) +#define HW_TIMROT_ROTCTRL_SET_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_SET) +#define HW_TIMROT_ROTCTRL_CLR_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_CLR) +#define HW_TIMROT_ROTCTRL_TOG_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL_TOG) -#define HW_TIMROT_ROTCTRL 0x0 -#define BM_TIMROT_ROTCTRL_SELECT_A 0x00000007 -#define BP_TIMROT_ROTCTRL_SELECT_A 0 -#define BM_TIMROT_ROTCTRL_SELECT_B 0x00000070 -#define BP_TIMROT_ROTCTRL_SELECT_B 4 -#define BM_TIMROT_ROTCTRL_POLARITY_A 0x00000100 -#define BM_TIMROT_ROTCTRL_POLARITY_B 0x00000200 -#define BM_TIMROT_ROTCTRL_OVERSAMPLE 0x00000C00 -#define BP_TIMROT_ROTCTRL_OVERSAMPLE 10 -#define BM_TIMROT_ROTCTRL_RELATIVE 0x00001000 -#define BM_TIMROT_ROTCTRL_DIVIDER 0x003F0000 -#define BP_TIMROT_ROTCTRL_DIVIDER 16 -#define BM_TIMROT_ROTCTRL_ROTARY_PRESENT 0x20000000 -#define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000 #define BM_TIMROT_ROTCTRL_SFTRST 0x80000000 +#define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000 +#define BM_TIMROT_ROTCTRL_ROTARY_PRESENT 0x20000000 +#define BM_TIMROT_ROTCTRL_TIM3_PRESENT 0x10000000 +#define BM_TIMROT_ROTCTRL_TIM2_PRESENT 0x08000000 +#define BM_TIMROT_ROTCTRL_TIM1_PRESENT 0x04000000 +#define BM_TIMROT_ROTCTRL_TIM0_PRESENT 0x02000000 +#define BP_TIMROT_ROTCTRL_STATE 22 +#define BM_TIMROT_ROTCTRL_STATE 0x01C00000 +#define BF_TIMROT_ROTCTRL_STATE(v) \ + (((v) << 22) & BM_TIMROT_ROTCTRL_STATE) +#define BP_TIMROT_ROTCTRL_DIVIDER 16 +#define BM_TIMROT_ROTCTRL_DIVIDER 0x003F0000 +#define BF_TIMROT_ROTCTRL_DIVIDER(v) \ + (((v) << 16) & BM_TIMROT_ROTCTRL_DIVIDER) +#define BP_TIMROT_ROTCTRL_RSRVD3 13 +#define BM_TIMROT_ROTCTRL_RSRVD3 0x0000E000 +#define BF_TIMROT_ROTCTRL_RSRVD3(v) \ + (((v) << 13) & BM_TIMROT_ROTCTRL_RSRVD3) +#define BM_TIMROT_ROTCTRL_RELATIVE 0x00001000 +#define BP_TIMROT_ROTCTRL_OVERSAMPLE 10 +#define BM_TIMROT_ROTCTRL_OVERSAMPLE 0x00000C00 +#define BF_TIMROT_ROTCTRL_OVERSAMPLE(v) \ + (((v) << 10) & BM_TIMROT_ROTCTRL_OVERSAMPLE) +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__8X 0x0 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__4X 0x1 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__2X 0x2 +#define BV_TIMROT_ROTCTRL_OVERSAMPLE__1X 0x3 +#define BM_TIMROT_ROTCTRL_POLARITY_B 0x00000200 +#define BM_TIMROT_ROTCTRL_POLARITY_A 0x00000100 +#define BM_TIMROT_ROTCTRL_RSRVD2 0x00000080 +#define BP_TIMROT_ROTCTRL_SELECT_B 4 +#define BM_TIMROT_ROTCTRL_SELECT_B 0x00000070 +#define BF_TIMROT_ROTCTRL_SELECT_B(v) \ + (((v) << 4) & BM_TIMROT_ROTCTRL_SELECT_B) +#define BV_TIMROT_ROTCTRL_SELECT_B__NEVER_TICK 0x0 +#define BV_TIMROT_ROTCTRL_SELECT_B__PWM0 0x1 +#define BV_TIMROT_ROTCTRL_SELECT_B__PWM1 0x2 +#define BV_TIMROT_ROTCTRL_SELECT_B__PWM2 0x3 +#define BV_TIMROT_ROTCTRL_SELECT_B__PWM3 0x4 +#define BV_TIMROT_ROTCTRL_SELECT_B__PWM4 0x5 +#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYA 0x6 +#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYB 0x7 +#define BM_TIMROT_ROTCTRL_RSRVD1 0x00000008 +#define BP_TIMROT_ROTCTRL_SELECT_A 0 +#define BM_TIMROT_ROTCTRL_SELECT_A 0x00000007 +#define BF_TIMROT_ROTCTRL_SELECT_A(v) \ + (((v) << 0) & BM_TIMROT_ROTCTRL_SELECT_A) +#define BV_TIMROT_ROTCTRL_SELECT_A__NEVER_TICK 0x0 +#define BV_TIMROT_ROTCTRL_SELECT_A__PWM0 0x1 +#define BV_TIMROT_ROTCTRL_SELECT_A__PWM1 0x2 +#define BV_TIMROT_ROTCTRL_SELECT_A__PWM2 0x3 +#define BV_TIMROT_ROTCTRL_SELECT_A__PWM3 0x4 +#define BV_TIMROT_ROTCTRL_SELECT_A__PWM4 0x5 +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA 0x6 +#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYB 0x7 -#define HW_TIMROT_ROTCOUNT 0x10 -#define BM_TIMROT_ROTCOUNT_UPDOWN 0x0000FFFF -#define BP_TIMROT_ROTCOUNT_UPDOWN 0 +#define HW_TIMROT_ROTCOUNT (0x00000010) +#define HW_TIMROT_ROTCOUNT_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_ROTCOUNT) -#define HW_TIMROT_TIMCTRL0 (0x20 + 0 * 0x20) -#define HW_TIMROT_TIMCTRL1 (0x20 + 1 * 0x20) -#define HW_TIMROT_TIMCTRL2 (0x20 + 2 * 0x20) +#define BP_TIMROT_ROTCOUNT_RSRVD1 16 +#define BM_TIMROT_ROTCOUNT_RSRVD1 0xFFFF0000 +#define BF_TIMROT_ROTCOUNT_RSRVD1(v) \ + (((v) << 16) & BM_TIMROT_ROTCOUNT_RSRVD1) +#define BP_TIMROT_ROTCOUNT_UPDOWN 0 +#define BM_TIMROT_ROTCOUNT_UPDOWN 0x0000FFFF +#define BF_TIMROT_ROTCOUNT_UPDOWN(v) \ + (((v) << 0) & BM_TIMROT_ROTCOUNT_UPDOWN) -#define HW_TIMROT_TIMCTRLn 0x20 -#define BM_TIMROT_TIMCTRLn_SELECT 0x0000000F -#define BP_TIMROT_TIMCTRLn_SELECT 0 -#define BM_TIMROT_TIMCTRLn_PRESCALE 0x00000030 -#define BP_TIMROT_TIMCTRLn_PRESCALE 4 -#define BM_TIMROT_TIMCTRLn_RELOAD 0x00000040 -#define BM_TIMROT_TIMCTRLn_UPDATE 0x00000080 -#define BM_TIMROT_TIMCTRLn_IRQ_EN 0x00004000 +/* + * multi-register-define name HW_TIMROT_TIMCTRLn + * base 0x00000020 + * count 3 + * offset 0x20 + */ +#define HW_TIMROT_TIMCTRLn(n) (0x00000020 + (n) * 0x20) +#define HW_TIMROT_TIMCTRLn_SET(n) (0x00000024 + (n) * 0x20) +#define HW_TIMROT_TIMCTRLn_CLR(n) (0x00000028 + (n) * 0x20) +#define HW_TIMROT_TIMCTRLn_TOG(n) (0x0000002c + (n) * 0x20) +#define HW_TIMROT_TIMCTRLn_ADDR(n) \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(n)) +#define HW_TIMROT_TIMCTRLn_SET_ADDR(n) \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn_SET(n)) +#define HW_TIMROT_TIMCTRLn_CLR_ADDR(n) \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn_CLR(n)) +#define HW_TIMROT_TIMCTRLn_TOG_ADDR(n) \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn_TOG(n)) +#define BP_TIMROT_TIMCTRLn_RSRVD2 16 +#define BM_TIMROT_TIMCTRLn_RSRVD2 0xFFFF0000 +#define BF_TIMROT_TIMCTRLn_RSRVD2(v) \ + (((v) << 16) & BM_TIMROT_TIMCTRLn_RSRVD2) #define BM_TIMROT_TIMCTRLn_IRQ 0x00008000 +#define BM_TIMROT_TIMCTRLn_IRQ_EN 0x00004000 +#define BP_TIMROT_TIMCTRLn_RSRVD1 9 +#define BM_TIMROT_TIMCTRLn_RSRVD1 0x00003E00 +#define BF_TIMROT_TIMCTRLn_RSRVD1(v) \ + (((v) << 9) & BM_TIMROT_TIMCTRLn_RSRVD1) +#define BM_TIMROT_TIMCTRLn_POLARITY 0x00000100 +#define BM_TIMROT_TIMCTRLn_UPDATE 0x00000080 +#define BM_TIMROT_TIMCTRLn_RELOAD 0x00000040 +#define BP_TIMROT_TIMCTRLn_PRESCALE 4 +#define BM_TIMROT_TIMCTRLn_PRESCALE 0x00000030 +#define BF_TIMROT_TIMCTRLn_PRESCALE(v) \ + (((v) << 4) & BM_TIMROT_TIMCTRLn_PRESCALE) +#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_1 0x0 +#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_2 0x1 +#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_4 0x2 +#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_8 0x3 +#define BP_TIMROT_TIMCTRLn_SELECT 0 +#define BM_TIMROT_TIMCTRLn_SELECT 0x0000000F +#define BF_TIMROT_TIMCTRLn_SELECT(v) \ + (((v) << 0) & BM_TIMROT_TIMCTRLn_SELECT) +#define BV_TIMROT_TIMCTRLn_SELECT__NEVER_TICK 0x0 +#define BV_TIMROT_TIMCTRLn_SELECT__PWM0 0x1 +#define BV_TIMROT_TIMCTRLn_SELECT__PWM1 0x2 +#define BV_TIMROT_TIMCTRLn_SELECT__PWM2 0x3 +#define BV_TIMROT_TIMCTRLn_SELECT__PWM3 0x4 +#define BV_TIMROT_TIMCTRLn_SELECT__PWM4 0x5 +#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYA 0x6 +#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYB 0x7 +#define BV_TIMROT_TIMCTRLn_SELECT__32KHZ_XTAL 0x8 +#define BV_TIMROT_TIMCTRLn_SELECT__8KHZ_XTAL 0x9 +#define BV_TIMROT_TIMCTRLn_SELECT__4KHZ_XTAL 0xA +#define BV_TIMROT_TIMCTRLn_SELECT__1KHZ_XTAL 0xB +#define BV_TIMROT_TIMCTRLn_SELECT__TICK_ALWAYS 0xC + +/* + * multi-register-define name HW_TIMROT_TIMCOUNTn + * base 0x00000030 + * count 3 + * offset 0x20 + */ +#define HW_TIMROT_TIMCOUNTn(n) (0x00000030 + (n) * 0x20) +#define HW_TIMROT_TIMCOUNTn_ADDR(n) \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(n)) +#define BP_TIMROT_TIMCOUNTn_RUNNING_COUNT 16 +#define BM_TIMROT_TIMCOUNTn_RUNNING_COUNT 0xFFFF0000 +#define BF_TIMROT_TIMCOUNTn_RUNNING_COUNT(v) \ + (((v) << 16) & BM_TIMROT_TIMCOUNTn_RUNNING_COUNT) +#define BP_TIMROT_TIMCOUNTn_FIXED_COUNT 0 +#define BM_TIMROT_TIMCOUNTn_FIXED_COUNT 0x0000FFFF +#define BF_TIMROT_TIMCOUNTn_FIXED_COUNT(v) \ + (((v) << 0) & BM_TIMROT_TIMCOUNTn_FIXED_COUNT) + +#define HW_TIMROT_TIMCTRL3 (0x00000080) +#define HW_TIMROT_TIMCTRL3_SET (0x00000084) +#define HW_TIMROT_TIMCTRL3_CLR (0x00000088) +#define HW_TIMROT_TIMCTRL3_TOG (0x0000008c) +#define HW_TIMROT_TIMCTRL3_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL3) +#define HW_TIMROT_TIMCTRL3_SET_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL3_SET) +#define HW_TIMROT_TIMCTRL3_CLR_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL3_CLR) +#define HW_TIMROT_TIMCTRL3_TOG_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL3_TOG) + +#define BP_TIMROT_TIMCTRL3_RSRVD2 20 +#define BM_TIMROT_TIMCTRL3_RSRVD2 0xFFF00000 +#define BF_TIMROT_TIMCTRL3_RSRVD2(v) \ + (((v) << 20) & BM_TIMROT_TIMCTRL3_RSRVD2) +#define BP_TIMROT_TIMCTRL3_TEST_SIGNAL 16 +#define BM_TIMROT_TIMCTRL3_TEST_SIGNAL 0x000F0000 +#define BF_TIMROT_TIMCTRL3_TEST_SIGNAL(v) \ + (((v) << 16) & BM_TIMROT_TIMCTRL3_TEST_SIGNAL) +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__NEVER_TICK 0x0 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM0 0x1 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM1 0x2 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM2 0x3 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM3 0x4 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM4 0x5 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYA 0x6 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYB 0x7 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__32KHZ_XTAL 0x8 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__8KHZ_XTAL 0x9 +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__4KHZ_XTAL 0xA +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__1KHZ_XTAL 0xB +#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__TICK_ALWAYS 0xC +#define BM_TIMROT_TIMCTRL3_IRQ 0x00008000 +#define BM_TIMROT_TIMCTRL3_IRQ_EN 0x00004000 +#define BP_TIMROT_TIMCTRL3_RSRVD1 11 +#define BM_TIMROT_TIMCTRL3_RSRVD1 0x00003800 +#define BF_TIMROT_TIMCTRL3_RSRVD1(v) \ + (((v) << 11) & BM_TIMROT_TIMCTRL3_RSRVD1) +#define BM_TIMROT_TIMCTRL3_DUTY_VALID 0x00000400 +#define BM_TIMROT_TIMCTRL3_DUTY_CYCLE 0x00000200 +#define BM_TIMROT_TIMCTRL3_POLARITY 0x00000100 +#define BM_TIMROT_TIMCTRL3_UPDATE 0x00000080 +#define BM_TIMROT_TIMCTRL3_RELOAD 0x00000040 +#define BP_TIMROT_TIMCTRL3_PRESCALE 4 +#define BM_TIMROT_TIMCTRL3_PRESCALE 0x00000030 +#define BF_TIMROT_TIMCTRL3_PRESCALE(v) \ + (((v) << 4) & BM_TIMROT_TIMCTRL3_PRESCALE) +#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_1 0x0 +#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_2 0x1 +#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_4 0x2 +#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_8 0x3 +#define BP_TIMROT_TIMCTRL3_SELECT 0 +#define BM_TIMROT_TIMCTRL3_SELECT 0x0000000F +#define BF_TIMROT_TIMCTRL3_SELECT(v) \ + (((v) << 0) & BM_TIMROT_TIMCTRL3_SELECT) +#define BV_TIMROT_TIMCTRL3_SELECT__NEVER_TICK 0x0 +#define BV_TIMROT_TIMCTRL3_SELECT__PWM0 0x1 +#define BV_TIMROT_TIMCTRL3_SELECT__PWM1 0x2 +#define BV_TIMROT_TIMCTRL3_SELECT__PWM2 0x3 +#define BV_TIMROT_TIMCTRL3_SELECT__PWM3 0x4 +#define BV_TIMROT_TIMCTRL3_SELECT__PWM4 0x5 +#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYA 0x6 +#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYB 0x7 +#define BV_TIMROT_TIMCTRL3_SELECT__32KHZ_XTAL 0x8 +#define BV_TIMROT_TIMCTRL3_SELECT__8KHZ_XTAL 0x9 +#define BV_TIMROT_TIMCTRL3_SELECT__4KHZ_XTAL 0xA +#define BV_TIMROT_TIMCTRL3_SELECT__1KHZ_XTAL 0xB +#define BV_TIMROT_TIMCTRL3_SELECT__TICK_ALWAYS 0xC + +#define HW_TIMROT_TIMCOUNT3 (0x00000090) +#define HW_TIMROT_TIMCOUNT3_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT3) -#define HW_TIMROT_TIMCOUNT0 (0x30 + 0 * 0x20) -#define HW_TIMROT_TIMCOUNT1 (0x30 + 1 * 0x20) -#define HW_TIMROT_TIMCOUNT2 (0x30 + 2 * 0x20) +#define BP_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 16 +#define BM_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 0xFFFF0000 +#define BF_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT(v) \ + (((v) << 16) & BM_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT) +#define BP_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0 +#define BM_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0x0000FFFF +#define BF_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT(v) \ + (((v) << 0) & BM_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT) -#define HW_TIMROT_TIMCOUNTn 0x30 +#define HW_TIMROT_VERSION (0x000000a0) +#define HW_TIMROT_VERSION_ADDR \ + (REGS_TIMROT_BASE + HW_TIMROT_VERSION) -#endif +#define BP_TIMROT_VERSION_MAJOR 24 +#define BM_TIMROT_VERSION_MAJOR 0xFF000000 +#define BF_TIMROT_VERSION_MAJOR(v) \ + (((v) << 24) & BM_TIMROT_VERSION_MAJOR) +#define BP_TIMROT_VERSION_MINOR 16 +#define BM_TIMROT_VERSION_MINOR 0x00FF0000 +#define BF_TIMROT_VERSION_MINOR(v) \ + (((v) << 16) & BM_TIMROT_VERSION_MINOR) +#define BP_TIMROT_VERSION_STEP 0 +#define BM_TIMROT_VERSION_STEP 0x0000FFFF +#define BF_TIMROT_VERSION_STEP(v) \ + (((v) << 0) & BM_TIMROT_VERSION_STEP) +#endif /* __ARCH_ARM___TIMROT_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-pinctrl.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-pinctrl.h @@ -1,7 +1,7 @@ /* - * stmp378x: PINCTRL register definitions + * STMP PINCTRL Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,74 +17,2279 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_PINCTRL -#define _MACH_REGS_PINCTRL -#define REGS_PINCTRL_BASE (STMP3XXX_REGS_BASE + 0x18000) -#define REGS_PINCTRL_PHYS 0x80018000 -#define REGS_PINCTRL_SIZE 0x2000 - -#define HW_PINCTRL_MUXSEL0 0x100 -#define HW_PINCTRL_MUXSEL1 0x110 -#define HW_PINCTRL_MUXSEL2 0x120 -#define HW_PINCTRL_MUXSEL3 0x130 -#define HW_PINCTRL_MUXSEL4 0x140 -#define HW_PINCTRL_MUXSEL5 0x150 -#define HW_PINCTRL_MUXSEL6 0x160 -#define HW_PINCTRL_MUXSEL7 0x170 - -#define HW_PINCTRL_DRIVE0 0x200 -#define HW_PINCTRL_DRIVE1 0x210 -#define HW_PINCTRL_DRIVE2 0x220 -#define HW_PINCTRL_DRIVE3 0x230 -#define HW_PINCTRL_DRIVE4 0x240 -#define HW_PINCTRL_DRIVE5 0x250 -#define HW_PINCTRL_DRIVE6 0x260 -#define HW_PINCTRL_DRIVE7 0x270 -#define HW_PINCTRL_DRIVE8 0x280 -#define HW_PINCTRL_DRIVE9 0x290 -#define HW_PINCTRL_DRIVE10 0x2A0 -#define HW_PINCTRL_DRIVE11 0x2B0 -#define HW_PINCTRL_DRIVE12 0x2C0 -#define HW_PINCTRL_DRIVE13 0x2D0 -#define HW_PINCTRL_DRIVE14 0x2E0 - -#define HW_PINCTRL_PULL0 0x400 -#define HW_PINCTRL_PULL1 0x410 -#define HW_PINCTRL_PULL2 0x420 -#define HW_PINCTRL_PULL3 0x430 - -#define HW_PINCTRL_DOUT0 0x500 -#define HW_PINCTRL_DOUT1 0x510 -#define HW_PINCTRL_DOUT2 0x520 - -#define HW_PINCTRL_DIN0 0x600 -#define HW_PINCTRL_DIN1 0x610 -#define HW_PINCTRL_DIN2 0x620 - -#define HW_PINCTRL_DOE0 0x700 -#define HW_PINCTRL_DOE1 0x710 -#define HW_PINCTRL_DOE2 0x720 - -#define HW_PINCTRL_PIN2IRQ0 0x800 -#define HW_PINCTRL_PIN2IRQ1 0x810 -#define HW_PINCTRL_PIN2IRQ2 0x820 - -#define HW_PINCTRL_IRQEN0 0x900 -#define HW_PINCTRL_IRQEN1 0x910 -#define HW_PINCTRL_IRQEN2 0x920 - -#define HW_PINCTRL_IRQLEVEL0 0xA00 -#define HW_PINCTRL_IRQLEVEL1 0xA10 -#define HW_PINCTRL_IRQLEVEL2 0xA20 - -#define HW_PINCTRL_IRQPOL0 0xB00 -#define HW_PINCTRL_IRQPOL1 0xB10 -#define HW_PINCTRL_IRQPOL2 0xB20 - -#define HW_PINCTRL_IRQSTAT0 0xC00 -#define HW_PINCTRL_IRQSTAT1 0xC10 -#define HW_PINCTRL_IRQSTAT2 0xC20 +#ifndef __ARCH_ARM___PINCTRL_H +#define __ARCH_ARM___PINCTRL_H 1 + +#define REGS_PINCTRL_BASE (STMP3XXX_REGS_BASE + 0x18000) +#define REGS_PINCTRL_PHYS (0x80018000) +#define REGS_PINCTRL_SIZE 0x00002000 + +#define HW_PINCTRL_CTRL (0x00000000) +#define HW_PINCTRL_CTRL_SET (0x00000004) +#define HW_PINCTRL_CTRL_CLR (0x00000008) +#define HW_PINCTRL_CTRL_TOG (0x0000000c) +#define HW_PINCTRL_CTRL_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_CTRL) +#define HW_PINCTRL_CTRL_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_CTRL_SET) +#define HW_PINCTRL_CTRL_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_CTRL_CLR) +#define HW_PINCTRL_CTRL_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_CTRL_TOG) + +#define BM_PINCTRL_CTRL_SFTRST 0x80000000 +#define BM_PINCTRL_CTRL_CLKGATE 0x40000000 +#define BP_PINCTRL_CTRL_RSRVD2 28 +#define BM_PINCTRL_CTRL_RSRVD2 0x30000000 +#define BF_PINCTRL_CTRL_RSRVD2(v) \ + (((v) << 28) & BM_PINCTRL_CTRL_RSRVD2) +#define BM_PINCTRL_CTRL_PRESENT3 0x08000000 +#define BM_PINCTRL_CTRL_PRESENT2 0x04000000 +#define BM_PINCTRL_CTRL_PRESENT1 0x02000000 +#define BM_PINCTRL_CTRL_PRESENT0 0x01000000 +#define BP_PINCTRL_CTRL_RSRVD1 3 +#define BM_PINCTRL_CTRL_RSRVD1 0x00FFFFF8 +#define BF_PINCTRL_CTRL_RSRVD1(v) \ + (((v) << 3) & BM_PINCTRL_CTRL_RSRVD1) +#define BM_PINCTRL_CTRL_IRQOUT2 0x00000004 +#define BM_PINCTRL_CTRL_IRQOUT1 0x00000002 +#define BM_PINCTRL_CTRL_IRQOUT0 0x00000001 + +#define HW_PINCTRL_MUXSEL0 (0x00000100) +#define HW_PINCTRL_MUXSEL0_SET (0x00000104) +#define HW_PINCTRL_MUXSEL0_CLR (0x00000108) +#define HW_PINCTRL_MUXSEL0_TOG (0x0000010c) +#define HW_PINCTRL_MUXSEL0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL0) +#define HW_PINCTRL_MUXSEL0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL0_SET) +#define HW_PINCTRL_MUXSEL0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL0_CLR) +#define HW_PINCTRL_MUXSEL0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL0_TOG) + +#define BP_PINCTRL_MUXSEL0_BANK0_PIN15 30 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN15 0xC0000000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN15(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL0_BANK0_PIN15) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN14 28 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN14 0x30000000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN14(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL0_BANK0_PIN14) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN13 26 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN13 0x0C000000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN13(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL0_BANK0_PIN13) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN12 24 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN12 0x03000000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN12(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL0_BANK0_PIN12) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN11 22 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN11 0x00C00000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN11(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL0_BANK0_PIN11) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN10 20 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN10 0x00300000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN10(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL0_BANK0_PIN10) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN09 18 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN09 0x000C0000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN09(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL0_BANK0_PIN09) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN08 16 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN08 0x00030000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN08(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL0_BANK0_PIN08) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN07 14 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN07 0x0000C000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN07(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL0_BANK0_PIN07) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN06 12 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN06 0x00003000 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN06(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL0_BANK0_PIN06) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN05 10 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN05 0x00000C00 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN05(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL0_BANK0_PIN05) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN04 8 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN04 0x00000300 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN04(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL0_BANK0_PIN04) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN03 6 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN03 0x000000C0 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN03(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL0_BANK0_PIN03) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN02 4 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN02 0x00000030 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN02(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL0_BANK0_PIN02) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN01 2 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN01 0x0000000C +#define BF_PINCTRL_MUXSEL0_BANK0_PIN01(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL0_BANK0_PIN01) +#define BP_PINCTRL_MUXSEL0_BANK0_PIN00 0 +#define BM_PINCTRL_MUXSEL0_BANK0_PIN00 0x00000003 +#define BF_PINCTRL_MUXSEL0_BANK0_PIN00(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL0_BANK0_PIN00) + +#define HW_PINCTRL_MUXSEL1 (0x00000110) +#define HW_PINCTRL_MUXSEL1_SET (0x00000114) +#define HW_PINCTRL_MUXSEL1_CLR (0x00000118) +#define HW_PINCTRL_MUXSEL1_TOG (0x0000011c) +#define HW_PINCTRL_MUXSEL1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL1) +#define HW_PINCTRL_MUXSEL1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL1_SET) +#define HW_PINCTRL_MUXSEL1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL1_CLR) +#define HW_PINCTRL_MUXSEL1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL1_TOG) + +#define BP_PINCTRL_MUXSEL1_BANK0_PIN31 30 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN31 0xC0000000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN31(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL1_BANK0_PIN31) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN30 28 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN30 0x30000000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN30(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL1_BANK0_PIN30) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN29 26 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN29 0x0C000000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN29(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL1_BANK0_PIN29) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN28 24 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN28 0x03000000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN28(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL1_BANK0_PIN28) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN27 22 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN27 0x00C00000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN27(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL1_BANK0_PIN27) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN26 20 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN26 0x00300000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN26(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL1_BANK0_PIN26) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN25 18 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN25 0x000C0000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN25(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL1_BANK0_PIN25) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN24 16 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN24 0x00030000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN24(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL1_BANK0_PIN24) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN23 14 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN23 0x0000C000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN23(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL1_BANK0_PIN23) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN22 12 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN22 0x00003000 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN22(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL1_BANK0_PIN22) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN21 10 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN21 0x00000C00 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN21(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL1_BANK0_PIN21) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN20 8 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN20 0x00000300 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN20(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL1_BANK0_PIN20) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN19 6 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN19 0x000000C0 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN19(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL1_BANK0_PIN19) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN18 4 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN18 0x00000030 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN18(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL1_BANK0_PIN18) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN17 2 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN17 0x0000000C +#define BF_PINCTRL_MUXSEL1_BANK0_PIN17(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL1_BANK0_PIN17) +#define BP_PINCTRL_MUXSEL1_BANK0_PIN16 0 +#define BM_PINCTRL_MUXSEL1_BANK0_PIN16 0x00000003 +#define BF_PINCTRL_MUXSEL1_BANK0_PIN16(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL1_BANK0_PIN16) + +#define HW_PINCTRL_MUXSEL2 (0x00000120) +#define HW_PINCTRL_MUXSEL2_SET (0x00000124) +#define HW_PINCTRL_MUXSEL2_CLR (0x00000128) +#define HW_PINCTRL_MUXSEL2_TOG (0x0000012c) +#define HW_PINCTRL_MUXSEL2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL2) +#define HW_PINCTRL_MUXSEL2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL2_SET) +#define HW_PINCTRL_MUXSEL2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL2_CLR) +#define HW_PINCTRL_MUXSEL2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL2_TOG) + +#define BP_PINCTRL_MUXSEL2_BANK1_PIN15 30 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN15 0xC0000000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN15(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL2_BANK1_PIN15) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN14 28 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN14 0x30000000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN14(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL2_BANK1_PIN14) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN13 26 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN13 0x0C000000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN13(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL2_BANK1_PIN13) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN12 24 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN12 0x03000000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN12(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL2_BANK1_PIN12) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN11 22 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN11 0x00C00000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN11(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL2_BANK1_PIN11) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN10 20 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN10 0x00300000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN10(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL2_BANK1_PIN10) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN09 18 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN09 0x000C0000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN09(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL2_BANK1_PIN09) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN08 16 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN08 0x00030000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN08(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL2_BANK1_PIN08) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN07 14 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN07 0x0000C000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN07(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL2_BANK1_PIN07) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN06 12 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN06 0x00003000 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN06(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL2_BANK1_PIN06) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN05 10 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN05 0x00000C00 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN05(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL2_BANK1_PIN05) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN04 8 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN04 0x00000300 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN04(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL2_BANK1_PIN04) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN03 6 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN03 0x000000C0 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN03(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL2_BANK1_PIN03) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN02 4 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN02 0x00000030 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN02(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL2_BANK1_PIN02) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN01 2 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN01 0x0000000C +#define BF_PINCTRL_MUXSEL2_BANK1_PIN01(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL2_BANK1_PIN01) +#define BP_PINCTRL_MUXSEL2_BANK1_PIN00 0 +#define BM_PINCTRL_MUXSEL2_BANK1_PIN00 0x00000003 +#define BF_PINCTRL_MUXSEL2_BANK1_PIN00(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL2_BANK1_PIN00) + +#define HW_PINCTRL_MUXSEL3 (0x00000130) +#define HW_PINCTRL_MUXSEL3_SET (0x00000134) +#define HW_PINCTRL_MUXSEL3_CLR (0x00000138) +#define HW_PINCTRL_MUXSEL3_TOG (0x0000013c) +#define HW_PINCTRL_MUXSEL3_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL3) +#define HW_PINCTRL_MUXSEL3_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL3_SET) +#define HW_PINCTRL_MUXSEL3_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL3_CLR) +#define HW_PINCTRL_MUXSEL3_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL3_TOG) + +#define BP_PINCTRL_MUXSEL3_RSRVD0 30 +#define BM_PINCTRL_MUXSEL3_RSRVD0 0xC0000000 +#define BF_PINCTRL_MUXSEL3_RSRVD0(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL3_RSRVD0) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN30 28 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN30 0x30000000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN30(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL3_BANK1_PIN30) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN29 26 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN29 0x0C000000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN29(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL3_BANK1_PIN29) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN28 24 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN28 0x03000000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN28(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL3_BANK1_PIN28) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN27 22 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN27 0x00C00000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN27(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL3_BANK1_PIN27) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN26 20 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN26 0x00300000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN26(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL3_BANK1_PIN26) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN25 18 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN25 0x000C0000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN25(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL3_BANK1_PIN25) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN24 16 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN24 0x00030000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN24(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL3_BANK1_PIN24) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN23 14 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN23 0x0000C000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN23(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL3_BANK1_PIN23) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN22 12 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN22 0x00003000 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN22(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL3_BANK1_PIN22) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN21 10 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN21 0x00000C00 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN21(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL3_BANK1_PIN21) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN20 8 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN20 0x00000300 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN20(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL3_BANK1_PIN20) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN19 6 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN19 0x000000C0 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN19(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL3_BANK1_PIN19) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN18 4 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN18 0x00000030 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN18(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL3_BANK1_PIN18) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN17 2 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN17 0x0000000C +#define BF_PINCTRL_MUXSEL3_BANK1_PIN17(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL3_BANK1_PIN17) +#define BP_PINCTRL_MUXSEL3_BANK1_PIN16 0 +#define BM_PINCTRL_MUXSEL3_BANK1_PIN16 0x00000003 +#define BF_PINCTRL_MUXSEL3_BANK1_PIN16(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL3_BANK1_PIN16) + +#define HW_PINCTRL_MUXSEL4 (0x00000140) +#define HW_PINCTRL_MUXSEL4_SET (0x00000144) +#define HW_PINCTRL_MUXSEL4_CLR (0x00000148) +#define HW_PINCTRL_MUXSEL4_TOG (0x0000014c) +#define HW_PINCTRL_MUXSEL4_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL4) +#define HW_PINCTRL_MUXSEL4_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL4_SET) +#define HW_PINCTRL_MUXSEL4_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL4_CLR) +#define HW_PINCTRL_MUXSEL4_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL4_TOG) + +#define BP_PINCTRL_MUXSEL4_BANK2_PIN15 30 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN15 0xC0000000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN15(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL4_BANK2_PIN15) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN14 28 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN14 0x30000000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN14(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL4_BANK2_PIN14) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN13 26 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN13 0x0C000000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN13(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL4_BANK2_PIN13) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN12 24 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN12 0x03000000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN12(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL4_BANK2_PIN12) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN11 22 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN11 0x00C00000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN11(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL4_BANK2_PIN11) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN10 20 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN10 0x00300000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN10(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL4_BANK2_PIN10) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN09 18 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN09 0x000C0000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN09(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL4_BANK2_PIN09) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN08 16 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN08 0x00030000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN08(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL4_BANK2_PIN08) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN07 14 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN07 0x0000C000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN07(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL4_BANK2_PIN07) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN06 12 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN06 0x00003000 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN06(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL4_BANK2_PIN06) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN05 10 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN05 0x00000C00 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN05(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL4_BANK2_PIN05) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN04 8 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN04 0x00000300 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN04(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL4_BANK2_PIN04) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN03 6 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN03 0x000000C0 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN03(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL4_BANK2_PIN03) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN02 4 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN02 0x00000030 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN02(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL4_BANK2_PIN02) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN01 2 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN01 0x0000000C +#define BF_PINCTRL_MUXSEL4_BANK2_PIN01(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL4_BANK2_PIN01) +#define BP_PINCTRL_MUXSEL4_BANK2_PIN00 0 +#define BM_PINCTRL_MUXSEL4_BANK2_PIN00 0x00000003 +#define BF_PINCTRL_MUXSEL4_BANK2_PIN00(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL4_BANK2_PIN00) + +#define HW_PINCTRL_MUXSEL5 (0x00000150) +#define HW_PINCTRL_MUXSEL5_SET (0x00000154) +#define HW_PINCTRL_MUXSEL5_CLR (0x00000158) +#define HW_PINCTRL_MUXSEL5_TOG (0x0000015c) +#define HW_PINCTRL_MUXSEL5_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL5) +#define HW_PINCTRL_MUXSEL5_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL5_SET) +#define HW_PINCTRL_MUXSEL5_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL5_CLR) +#define HW_PINCTRL_MUXSEL5_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL5_TOG) + +#define BP_PINCTRL_MUXSEL5_BANK2_PIN31 30 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN31 0xC0000000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN31(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL5_BANK2_PIN31) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN30 28 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN30 0x30000000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN30(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL5_BANK2_PIN30) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN29 26 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN29 0x0C000000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN29(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL5_BANK2_PIN29) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN28 24 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN28 0x03000000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN28(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL5_BANK2_PIN28) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN27 22 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN27 0x00C00000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN27(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL5_BANK2_PIN27) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN26 20 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN26 0x00300000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN26(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL5_BANK2_PIN26) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN25 18 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN25 0x000C0000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN25(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL5_BANK2_PIN25) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN24 16 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN24 0x00030000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN24(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL5_BANK2_PIN24) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN23 14 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN23 0x0000C000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN23(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL5_BANK2_PIN23) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN22 12 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN22 0x00003000 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN22(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL5_BANK2_PIN22) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN21 10 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN21 0x00000C00 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN21(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL5_BANK2_PIN21) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN20 8 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN20 0x00000300 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN20(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL5_BANK2_PIN20) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN19 6 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN19 0x000000C0 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN19(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL5_BANK2_PIN19) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN18 4 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN18 0x00000030 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN18(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL5_BANK2_PIN18) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN17 2 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN17 0x0000000C +#define BF_PINCTRL_MUXSEL5_BANK2_PIN17(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL5_BANK2_PIN17) +#define BP_PINCTRL_MUXSEL5_BANK2_PIN16 0 +#define BM_PINCTRL_MUXSEL5_BANK2_PIN16 0x00000003 +#define BF_PINCTRL_MUXSEL5_BANK2_PIN16(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL5_BANK2_PIN16) + +#define HW_PINCTRL_MUXSEL6 (0x00000160) +#define HW_PINCTRL_MUXSEL6_SET (0x00000164) +#define HW_PINCTRL_MUXSEL6_CLR (0x00000168) +#define HW_PINCTRL_MUXSEL6_TOG (0x0000016c) +#define HW_PINCTRL_MUXSEL6_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL6) +#define HW_PINCTRL_MUXSEL6_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL6_SET) +#define HW_PINCTRL_MUXSEL6_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL6_CLR) +#define HW_PINCTRL_MUXSEL6_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL6_TOG) + +#define BP_PINCTRL_MUXSEL6_BANK3_PIN15 30 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN15 0xC0000000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN15(v) \ + (((v) << 30) & BM_PINCTRL_MUXSEL6_BANK3_PIN15) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN14 28 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN14 0x30000000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN14(v) \ + (((v) << 28) & BM_PINCTRL_MUXSEL6_BANK3_PIN14) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN13 26 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN13 0x0C000000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN13(v) \ + (((v) << 26) & BM_PINCTRL_MUXSEL6_BANK3_PIN13) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN12 24 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN12 0x03000000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN12(v) \ + (((v) << 24) & BM_PINCTRL_MUXSEL6_BANK3_PIN12) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN11 22 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN11 0x00C00000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN11(v) \ + (((v) << 22) & BM_PINCTRL_MUXSEL6_BANK3_PIN11) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN10 20 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN10 0x00300000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN10(v) \ + (((v) << 20) & BM_PINCTRL_MUXSEL6_BANK3_PIN10) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN09 18 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN09 0x000C0000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN09(v) \ + (((v) << 18) & BM_PINCTRL_MUXSEL6_BANK3_PIN09) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN08 16 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN08 0x00030000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN08(v) \ + (((v) << 16) & BM_PINCTRL_MUXSEL6_BANK3_PIN08) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN07 14 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN07 0x0000C000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN07(v) \ + (((v) << 14) & BM_PINCTRL_MUXSEL6_BANK3_PIN07) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN06 12 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN06 0x00003000 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN06(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL6_BANK3_PIN06) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN05 10 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN05 0x00000C00 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN05(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL6_BANK3_PIN05) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN04 8 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN04 0x00000300 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN04(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL6_BANK3_PIN04) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN03 6 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN03 0x000000C0 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN03(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL6_BANK3_PIN03) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN02 4 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN02 0x00000030 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN02(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL6_BANK3_PIN02) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN01 2 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN01 0x0000000C +#define BF_PINCTRL_MUXSEL6_BANK3_PIN01(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL6_BANK3_PIN01) +#define BP_PINCTRL_MUXSEL6_BANK3_PIN00 0 +#define BM_PINCTRL_MUXSEL6_BANK3_PIN00 0x00000003 +#define BF_PINCTRL_MUXSEL6_BANK3_PIN00(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL6_BANK3_PIN00) + +#define HW_PINCTRL_MUXSEL7 (0x00000170) +#define HW_PINCTRL_MUXSEL7_SET (0x00000174) +#define HW_PINCTRL_MUXSEL7_CLR (0x00000178) +#define HW_PINCTRL_MUXSEL7_TOG (0x0000017c) +#define HW_PINCTRL_MUXSEL7_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL7) +#define HW_PINCTRL_MUXSEL7_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL7_SET) +#define HW_PINCTRL_MUXSEL7_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL7_CLR) +#define HW_PINCTRL_MUXSEL7_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_MUXSEL7_TOG) + +#define BP_PINCTRL_MUXSEL7_RSRVD0 12 +#define BM_PINCTRL_MUXSEL7_RSRVD0 0xFFFFF000 +#define BF_PINCTRL_MUXSEL7_RSRVD0(v) \ + (((v) << 12) & BM_PINCTRL_MUXSEL7_RSRVD0) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN21 10 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN21 0x00000C00 +#define BF_PINCTRL_MUXSEL7_BANK3_PIN21(v) \ + (((v) << 10) & BM_PINCTRL_MUXSEL7_BANK3_PIN21) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN20 8 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN20 0x00000300 +#define BF_PINCTRL_MUXSEL7_BANK3_PIN20(v) \ + (((v) << 8) & BM_PINCTRL_MUXSEL7_BANK3_PIN20) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN19 6 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN19 0x000000C0 +#define BF_PINCTRL_MUXSEL7_BANK3_PIN19(v) \ + (((v) << 6) & BM_PINCTRL_MUXSEL7_BANK3_PIN19) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN18 4 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN18 0x00000030 +#define BF_PINCTRL_MUXSEL7_BANK3_PIN18(v) \ + (((v) << 4) & BM_PINCTRL_MUXSEL7_BANK3_PIN18) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN17 2 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN17 0x0000000C +#define BF_PINCTRL_MUXSEL7_BANK3_PIN17(v) \ + (((v) << 2) & BM_PINCTRL_MUXSEL7_BANK3_PIN17) +#define BP_PINCTRL_MUXSEL7_BANK3_PIN16 0 +#define BM_PINCTRL_MUXSEL7_BANK3_PIN16 0x00000003 +#define BF_PINCTRL_MUXSEL7_BANK3_PIN16(v) \ + (((v) << 0) & BM_PINCTRL_MUXSEL7_BANK3_PIN16) + +#define HW_PINCTRL_DRIVE0 (0x00000200) +#define HW_PINCTRL_DRIVE0_SET (0x00000204) +#define HW_PINCTRL_DRIVE0_CLR (0x00000208) +#define HW_PINCTRL_DRIVE0_TOG (0x0000020c) +#define HW_PINCTRL_DRIVE0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE0) +#define HW_PINCTRL_DRIVE0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE0_SET) +#define HW_PINCTRL_DRIVE0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE0_CLR) +#define HW_PINCTRL_DRIVE0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE0_TOG) + +#define BP_PINCTRL_DRIVE0_RSRVD7 30 +#define BM_PINCTRL_DRIVE0_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE0_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE0_RSRVD7) +#define BP_PINCTRL_DRIVE0_BANK0_PIN07_MA 28 +#define BM_PINCTRL_DRIVE0_BANK0_PIN07_MA 0x30000000 +#define BF_PINCTRL_DRIVE0_BANK0_PIN07_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE0_BANK0_PIN07_MA) +#define BP_PINCTRL_DRIVE0_RSRVD6 26 +#define BM_PINCTRL_DRIVE0_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE0_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE0_RSRVD6) +#define BP_PINCTRL_DRIVE0_BANK0_PIN06_MA 24 +#define BM_PINCTRL_DRIVE0_BANK0_PIN06_MA 0x03000000 +#define BF_PINCTRL_DRIVE0_BANK0_PIN06_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE0_BANK0_PIN06_MA) +#define BP_PINCTRL_DRIVE0_RSRVD5 22 +#define BM_PINCTRL_DRIVE0_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE0_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE0_RSRVD5) +#define BP_PINCTRL_DRIVE0_BANK0_PIN05_MA 20 +#define BM_PINCTRL_DRIVE0_BANK0_PIN05_MA 0x00300000 +#define BF_PINCTRL_DRIVE0_BANK0_PIN05_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE0_BANK0_PIN05_MA) +#define BP_PINCTRL_DRIVE0_RSRVD4 18 +#define BM_PINCTRL_DRIVE0_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE0_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE0_RSRVD4) +#define BP_PINCTRL_DRIVE0_BANK0_PIN04_MA 16 +#define BM_PINCTRL_DRIVE0_BANK0_PIN04_MA 0x00030000 +#define BF_PINCTRL_DRIVE0_BANK0_PIN04_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE0_BANK0_PIN04_MA) +#define BP_PINCTRL_DRIVE0_RSRVD3 14 +#define BM_PINCTRL_DRIVE0_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE0_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE0_RSRVD3) +#define BP_PINCTRL_DRIVE0_BANK0_PIN03_MA 12 +#define BM_PINCTRL_DRIVE0_BANK0_PIN03_MA 0x00003000 +#define BF_PINCTRL_DRIVE0_BANK0_PIN03_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE0_BANK0_PIN03_MA) +#define BP_PINCTRL_DRIVE0_RSRVD2 10 +#define BM_PINCTRL_DRIVE0_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE0_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE0_RSRVD2) +#define BP_PINCTRL_DRIVE0_BANK0_PIN02_MA 8 +#define BM_PINCTRL_DRIVE0_BANK0_PIN02_MA 0x00000300 +#define BF_PINCTRL_DRIVE0_BANK0_PIN02_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE0_BANK0_PIN02_MA) +#define BP_PINCTRL_DRIVE0_RSRVD1 6 +#define BM_PINCTRL_DRIVE0_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE0_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE0_RSRVD1) +#define BP_PINCTRL_DRIVE0_BANK0_PIN01_MA 4 +#define BM_PINCTRL_DRIVE0_BANK0_PIN01_MA 0x00000030 +#define BF_PINCTRL_DRIVE0_BANK0_PIN01_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE0_BANK0_PIN01_MA) +#define BP_PINCTRL_DRIVE0_RSRVD0 2 +#define BM_PINCTRL_DRIVE0_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE0_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE0_RSRVD0) +#define BP_PINCTRL_DRIVE0_BANK0_PIN00_MA 0 +#define BM_PINCTRL_DRIVE0_BANK0_PIN00_MA 0x00000003 +#define BF_PINCTRL_DRIVE0_BANK0_PIN00_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE0_BANK0_PIN00_MA) + +#define HW_PINCTRL_DRIVE1 (0x00000210) +#define HW_PINCTRL_DRIVE1_SET (0x00000214) +#define HW_PINCTRL_DRIVE1_CLR (0x00000218) +#define HW_PINCTRL_DRIVE1_TOG (0x0000021c) +#define HW_PINCTRL_DRIVE1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE1) +#define HW_PINCTRL_DRIVE1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE1_SET) +#define HW_PINCTRL_DRIVE1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE1_CLR) +#define HW_PINCTRL_DRIVE1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE1_TOG) + +#define BP_PINCTRL_DRIVE1_RSRVD7 30 +#define BM_PINCTRL_DRIVE1_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE1_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE1_RSRVD7) +#define BP_PINCTRL_DRIVE1_BANK0_PIN15_MA 28 +#define BM_PINCTRL_DRIVE1_BANK0_PIN15_MA 0x30000000 +#define BF_PINCTRL_DRIVE1_BANK0_PIN15_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE1_BANK0_PIN15_MA) +#define BP_PINCTRL_DRIVE1_RSRVD6 26 +#define BM_PINCTRL_DRIVE1_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE1_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE1_RSRVD6) +#define BP_PINCTRL_DRIVE1_BANK0_PIN14_MA 24 +#define BM_PINCTRL_DRIVE1_BANK0_PIN14_MA 0x03000000 +#define BF_PINCTRL_DRIVE1_BANK0_PIN14_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE1_BANK0_PIN14_MA) +#define BP_PINCTRL_DRIVE1_RSRVD5 22 +#define BM_PINCTRL_DRIVE1_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE1_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE1_RSRVD5) +#define BP_PINCTRL_DRIVE1_BANK0_PIN13_MA 20 +#define BM_PINCTRL_DRIVE1_BANK0_PIN13_MA 0x00300000 +#define BF_PINCTRL_DRIVE1_BANK0_PIN13_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE1_BANK0_PIN13_MA) +#define BP_PINCTRL_DRIVE1_RSRVD4 18 +#define BM_PINCTRL_DRIVE1_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE1_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE1_RSRVD4) +#define BP_PINCTRL_DRIVE1_BANK0_PIN12_MA 16 +#define BM_PINCTRL_DRIVE1_BANK0_PIN12_MA 0x00030000 +#define BF_PINCTRL_DRIVE1_BANK0_PIN12_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE1_BANK0_PIN12_MA) +#define BP_PINCTRL_DRIVE1_RSRVD3 14 +#define BM_PINCTRL_DRIVE1_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE1_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE1_RSRVD3) +#define BP_PINCTRL_DRIVE1_BANK0_PIN11_MA 12 +#define BM_PINCTRL_DRIVE1_BANK0_PIN11_MA 0x00003000 +#define BF_PINCTRL_DRIVE1_BANK0_PIN11_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE1_BANK0_PIN11_MA) +#define BP_PINCTRL_DRIVE1_RSRVD2 10 +#define BM_PINCTRL_DRIVE1_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE1_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE1_RSRVD2) +#define BP_PINCTRL_DRIVE1_BANK0_PIN10_MA 8 +#define BM_PINCTRL_DRIVE1_BANK0_PIN10_MA 0x00000300 +#define BF_PINCTRL_DRIVE1_BANK0_PIN10_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE1_BANK0_PIN10_MA) +#define BP_PINCTRL_DRIVE1_RSRVD1 6 +#define BM_PINCTRL_DRIVE1_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE1_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE1_RSRVD1) +#define BP_PINCTRL_DRIVE1_BANK0_PIN09_MA 4 +#define BM_PINCTRL_DRIVE1_BANK0_PIN09_MA 0x00000030 +#define BF_PINCTRL_DRIVE1_BANK0_PIN09_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE1_BANK0_PIN09_MA) +#define BP_PINCTRL_DRIVE1_RSRVD0 2 +#define BM_PINCTRL_DRIVE1_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE1_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE1_RSRVD0) +#define BP_PINCTRL_DRIVE1_BANK0_PIN08_MA 0 +#define BM_PINCTRL_DRIVE1_BANK0_PIN08_MA 0x00000003 +#define BF_PINCTRL_DRIVE1_BANK0_PIN08_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE1_BANK0_PIN08_MA) + +#define HW_PINCTRL_DRIVE2 (0x00000220) +#define HW_PINCTRL_DRIVE2_SET (0x00000224) +#define HW_PINCTRL_DRIVE2_CLR (0x00000228) +#define HW_PINCTRL_DRIVE2_TOG (0x0000022c) +#define HW_PINCTRL_DRIVE2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE2) +#define HW_PINCTRL_DRIVE2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE2_SET) +#define HW_PINCTRL_DRIVE2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE2_CLR) +#define HW_PINCTRL_DRIVE2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE2_TOG) + +#define BP_PINCTRL_DRIVE2_RSRVD7 30 +#define BM_PINCTRL_DRIVE2_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE2_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE2_RSRVD7) +#define BP_PINCTRL_DRIVE2_BANK0_PIN23_MA 28 +#define BM_PINCTRL_DRIVE2_BANK0_PIN23_MA 0x30000000 +#define BF_PINCTRL_DRIVE2_BANK0_PIN23_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE2_BANK0_PIN23_MA) +#define BP_PINCTRL_DRIVE2_RSRVD6 26 +#define BM_PINCTRL_DRIVE2_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE2_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE2_RSRVD6) +#define BP_PINCTRL_DRIVE2_BANK0_PIN22_MA 24 +#define BM_PINCTRL_DRIVE2_BANK0_PIN22_MA 0x03000000 +#define BF_PINCTRL_DRIVE2_BANK0_PIN22_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE2_BANK0_PIN22_MA) +#define BP_PINCTRL_DRIVE2_RSRVD5 22 +#define BM_PINCTRL_DRIVE2_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE2_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE2_RSRVD5) +#define BP_PINCTRL_DRIVE2_BANK0_PIN21_MA 20 +#define BM_PINCTRL_DRIVE2_BANK0_PIN21_MA 0x00300000 +#define BF_PINCTRL_DRIVE2_BANK0_PIN21_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE2_BANK0_PIN21_MA) +#define BP_PINCTRL_DRIVE2_RSRVD4 18 +#define BM_PINCTRL_DRIVE2_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE2_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE2_RSRVD4) +#define BP_PINCTRL_DRIVE2_BANK0_PIN20_MA 16 +#define BM_PINCTRL_DRIVE2_BANK0_PIN20_MA 0x00030000 +#define BF_PINCTRL_DRIVE2_BANK0_PIN20_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE2_BANK0_PIN20_MA) +#define BP_PINCTRL_DRIVE2_RSRVD3 14 +#define BM_PINCTRL_DRIVE2_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE2_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE2_RSRVD3) +#define BP_PINCTRL_DRIVE2_BANK0_PIN19_MA 12 +#define BM_PINCTRL_DRIVE2_BANK0_PIN19_MA 0x00003000 +#define BF_PINCTRL_DRIVE2_BANK0_PIN19_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE2_BANK0_PIN19_MA) +#define BP_PINCTRL_DRIVE2_RSRVD2 10 +#define BM_PINCTRL_DRIVE2_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE2_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE2_RSRVD2) +#define BP_PINCTRL_DRIVE2_BANK0_PIN18_MA 8 +#define BM_PINCTRL_DRIVE2_BANK0_PIN18_MA 0x00000300 +#define BF_PINCTRL_DRIVE2_BANK0_PIN18_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE2_BANK0_PIN18_MA) +#define BP_PINCTRL_DRIVE2_RSRVD1 6 +#define BM_PINCTRL_DRIVE2_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE2_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE2_RSRVD1) +#define BP_PINCTRL_DRIVE2_BANK0_PIN17_MA 4 +#define BM_PINCTRL_DRIVE2_BANK0_PIN17_MA 0x00000030 +#define BF_PINCTRL_DRIVE2_BANK0_PIN17_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE2_BANK0_PIN17_MA) +#define BP_PINCTRL_DRIVE2_RSRVD0 2 +#define BM_PINCTRL_DRIVE2_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE2_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE2_RSRVD0) +#define BP_PINCTRL_DRIVE2_BANK0_PIN16_MA 0 +#define BM_PINCTRL_DRIVE2_BANK0_PIN16_MA 0x00000003 +#define BF_PINCTRL_DRIVE2_BANK0_PIN16_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE2_BANK0_PIN16_MA) + +#define HW_PINCTRL_DRIVE3 (0x00000230) +#define HW_PINCTRL_DRIVE3_SET (0x00000234) +#define HW_PINCTRL_DRIVE3_CLR (0x00000238) +#define HW_PINCTRL_DRIVE3_TOG (0x0000023c) +#define HW_PINCTRL_DRIVE3_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE3) +#define HW_PINCTRL_DRIVE3_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE3_SET) +#define HW_PINCTRL_DRIVE3_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE3_CLR) +#define HW_PINCTRL_DRIVE3_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE3_TOG) + +#define BP_PINCTRL_DRIVE3_RSRVD7 30 +#define BM_PINCTRL_DRIVE3_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE3_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE3_RSRVD7) +#define BP_PINCTRL_DRIVE3_BANK0_PIN31_MA 28 +#define BM_PINCTRL_DRIVE3_BANK0_PIN31_MA 0x30000000 +#define BF_PINCTRL_DRIVE3_BANK0_PIN31_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE3_BANK0_PIN31_MA) +#define BP_PINCTRL_DRIVE3_RSRVD6 26 +#define BM_PINCTRL_DRIVE3_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE3_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE3_RSRVD6) +#define BP_PINCTRL_DRIVE3_BANK0_PIN30_MA 24 +#define BM_PINCTRL_DRIVE3_BANK0_PIN30_MA 0x03000000 +#define BF_PINCTRL_DRIVE3_BANK0_PIN30_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE3_BANK0_PIN30_MA) +#define BP_PINCTRL_DRIVE3_RSRVD5 22 +#define BM_PINCTRL_DRIVE3_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE3_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE3_RSRVD5) +#define BP_PINCTRL_DRIVE3_BANK0_PIN29_MA 20 +#define BM_PINCTRL_DRIVE3_BANK0_PIN29_MA 0x00300000 +#define BF_PINCTRL_DRIVE3_BANK0_PIN29_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE3_BANK0_PIN29_MA) +#define BP_PINCTRL_DRIVE3_RSRVD4 18 +#define BM_PINCTRL_DRIVE3_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE3_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE3_RSRVD4) +#define BP_PINCTRL_DRIVE3_BANK0_PIN28_MA 16 +#define BM_PINCTRL_DRIVE3_BANK0_PIN28_MA 0x00030000 +#define BF_PINCTRL_DRIVE3_BANK0_PIN28_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE3_BANK0_PIN28_MA) +#define BP_PINCTRL_DRIVE3_RSRVD3 14 +#define BM_PINCTRL_DRIVE3_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE3_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE3_RSRVD3) +#define BP_PINCTRL_DRIVE3_BANK0_PIN27_MA 12 +#define BM_PINCTRL_DRIVE3_BANK0_PIN27_MA 0x00003000 +#define BF_PINCTRL_DRIVE3_BANK0_PIN27_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE3_BANK0_PIN27_MA) +#define BP_PINCTRL_DRIVE3_RSRVD2 10 +#define BM_PINCTRL_DRIVE3_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE3_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE3_RSRVD2) +#define BP_PINCTRL_DRIVE3_BANK0_PIN26_MA 8 +#define BM_PINCTRL_DRIVE3_BANK0_PIN26_MA 0x00000300 +#define BF_PINCTRL_DRIVE3_BANK0_PIN26_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE3_BANK0_PIN26_MA) +#define BP_PINCTRL_DRIVE3_RSRVD1 6 +#define BM_PINCTRL_DRIVE3_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE3_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE3_RSRVD1) +#define BP_PINCTRL_DRIVE3_BANK0_PIN25_MA 4 +#define BM_PINCTRL_DRIVE3_BANK0_PIN25_MA 0x00000030 +#define BF_PINCTRL_DRIVE3_BANK0_PIN25_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE3_BANK0_PIN25_MA) +#define BP_PINCTRL_DRIVE3_RSRVD0 2 +#define BM_PINCTRL_DRIVE3_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE3_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE3_RSRVD0) +#define BP_PINCTRL_DRIVE3_BANK0_PIN24_MA 0 +#define BM_PINCTRL_DRIVE3_BANK0_PIN24_MA 0x00000003 +#define BF_PINCTRL_DRIVE3_BANK0_PIN24_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE3_BANK0_PIN24_MA) + +#define HW_PINCTRL_DRIVE4 (0x00000240) +#define HW_PINCTRL_DRIVE4_SET (0x00000244) +#define HW_PINCTRL_DRIVE4_CLR (0x00000248) +#define HW_PINCTRL_DRIVE4_TOG (0x0000024c) +#define HW_PINCTRL_DRIVE4_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE4) +#define HW_PINCTRL_DRIVE4_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE4_SET) +#define HW_PINCTRL_DRIVE4_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE4_CLR) +#define HW_PINCTRL_DRIVE4_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE4_TOG) + +#define BP_PINCTRL_DRIVE4_RSRVD7 30 +#define BM_PINCTRL_DRIVE4_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE4_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE4_RSRVD7) +#define BP_PINCTRL_DRIVE4_BANK1_PIN07_MA 28 +#define BM_PINCTRL_DRIVE4_BANK1_PIN07_MA 0x30000000 +#define BF_PINCTRL_DRIVE4_BANK1_PIN07_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE4_BANK1_PIN07_MA) +#define BP_PINCTRL_DRIVE4_RSRVD6 26 +#define BM_PINCTRL_DRIVE4_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE4_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE4_RSRVD6) +#define BP_PINCTRL_DRIVE4_BANK1_PIN06_MA 24 +#define BM_PINCTRL_DRIVE4_BANK1_PIN06_MA 0x03000000 +#define BF_PINCTRL_DRIVE4_BANK1_PIN06_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE4_BANK1_PIN06_MA) +#define BP_PINCTRL_DRIVE4_RSRVD5 22 +#define BM_PINCTRL_DRIVE4_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE4_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE4_RSRVD5) +#define BP_PINCTRL_DRIVE4_BANK1_PIN05_MA 20 +#define BM_PINCTRL_DRIVE4_BANK1_PIN05_MA 0x00300000 +#define BF_PINCTRL_DRIVE4_BANK1_PIN05_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE4_BANK1_PIN05_MA) +#define BP_PINCTRL_DRIVE4_RSRVD4 18 +#define BM_PINCTRL_DRIVE4_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE4_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE4_RSRVD4) +#define BP_PINCTRL_DRIVE4_BANK1_PIN04_MA 16 +#define BM_PINCTRL_DRIVE4_BANK1_PIN04_MA 0x00030000 +#define BF_PINCTRL_DRIVE4_BANK1_PIN04_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE4_BANK1_PIN04_MA) +#define BP_PINCTRL_DRIVE4_RSRVD3 14 +#define BM_PINCTRL_DRIVE4_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE4_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE4_RSRVD3) +#define BP_PINCTRL_DRIVE4_BANK1_PIN03_MA 12 +#define BM_PINCTRL_DRIVE4_BANK1_PIN03_MA 0x00003000 +#define BF_PINCTRL_DRIVE4_BANK1_PIN03_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE4_BANK1_PIN03_MA) +#define BP_PINCTRL_DRIVE4_RSRVD2 10 +#define BM_PINCTRL_DRIVE4_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE4_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE4_RSRVD2) +#define BP_PINCTRL_DRIVE4_BANK1_PIN02_MA 8 +#define BM_PINCTRL_DRIVE4_BANK1_PIN02_MA 0x00000300 +#define BF_PINCTRL_DRIVE4_BANK1_PIN02_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE4_BANK1_PIN02_MA) +#define BP_PINCTRL_DRIVE4_RSRVD1 6 +#define BM_PINCTRL_DRIVE4_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE4_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE4_RSRVD1) +#define BP_PINCTRL_DRIVE4_BANK1_PIN01_MA 4 +#define BM_PINCTRL_DRIVE4_BANK1_PIN01_MA 0x00000030 +#define BF_PINCTRL_DRIVE4_BANK1_PIN01_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE4_BANK1_PIN01_MA) +#define BP_PINCTRL_DRIVE4_RSRVD0 2 +#define BM_PINCTRL_DRIVE4_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE4_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE4_RSRVD0) +#define BP_PINCTRL_DRIVE4_BANK1_PIN00_MA 0 +#define BM_PINCTRL_DRIVE4_BANK1_PIN00_MA 0x00000003 +#define BF_PINCTRL_DRIVE4_BANK1_PIN00_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE4_BANK1_PIN00_MA) + +#define HW_PINCTRL_DRIVE5 (0x00000250) +#define HW_PINCTRL_DRIVE5_SET (0x00000254) +#define HW_PINCTRL_DRIVE5_CLR (0x00000258) +#define HW_PINCTRL_DRIVE5_TOG (0x0000025c) +#define HW_PINCTRL_DRIVE5_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE5) +#define HW_PINCTRL_DRIVE5_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE5_SET) +#define HW_PINCTRL_DRIVE5_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE5_CLR) +#define HW_PINCTRL_DRIVE5_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE5_TOG) + +#define BP_PINCTRL_DRIVE5_RSRVD7 30 +#define BM_PINCTRL_DRIVE5_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE5_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE5_RSRVD7) +#define BP_PINCTRL_DRIVE5_BANK1_PIN15_MA 28 +#define BM_PINCTRL_DRIVE5_BANK1_PIN15_MA 0x30000000 +#define BF_PINCTRL_DRIVE5_BANK1_PIN15_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE5_BANK1_PIN15_MA) +#define BP_PINCTRL_DRIVE5_RSRVD6 26 +#define BM_PINCTRL_DRIVE5_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE5_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE5_RSRVD6) +#define BP_PINCTRL_DRIVE5_BANK1_PIN14_MA 24 +#define BM_PINCTRL_DRIVE5_BANK1_PIN14_MA 0x03000000 +#define BF_PINCTRL_DRIVE5_BANK1_PIN14_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE5_BANK1_PIN14_MA) +#define BP_PINCTRL_DRIVE5_RSRVD5 22 +#define BM_PINCTRL_DRIVE5_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE5_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE5_RSRVD5) +#define BP_PINCTRL_DRIVE5_BANK1_PIN13_MA 20 +#define BM_PINCTRL_DRIVE5_BANK1_PIN13_MA 0x00300000 +#define BF_PINCTRL_DRIVE5_BANK1_PIN13_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE5_BANK1_PIN13_MA) +#define BP_PINCTRL_DRIVE5_RSRVD4 18 +#define BM_PINCTRL_DRIVE5_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE5_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE5_RSRVD4) +#define BP_PINCTRL_DRIVE5_BANK1_PIN12_MA 16 +#define BM_PINCTRL_DRIVE5_BANK1_PIN12_MA 0x00030000 +#define BF_PINCTRL_DRIVE5_BANK1_PIN12_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE5_BANK1_PIN12_MA) +#define BP_PINCTRL_DRIVE5_RSRVD3 14 +#define BM_PINCTRL_DRIVE5_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE5_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE5_RSRVD3) +#define BP_PINCTRL_DRIVE5_BANK1_PIN11_MA 12 +#define BM_PINCTRL_DRIVE5_BANK1_PIN11_MA 0x00003000 +#define BF_PINCTRL_DRIVE5_BANK1_PIN11_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE5_BANK1_PIN11_MA) +#define BP_PINCTRL_DRIVE5_RSRVD2 10 +#define BM_PINCTRL_DRIVE5_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE5_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE5_RSRVD2) +#define BP_PINCTRL_DRIVE5_BANK1_PIN10_MA 8 +#define BM_PINCTRL_DRIVE5_BANK1_PIN10_MA 0x00000300 +#define BF_PINCTRL_DRIVE5_BANK1_PIN10_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE5_BANK1_PIN10_MA) +#define BP_PINCTRL_DRIVE5_RSRVD1 6 +#define BM_PINCTRL_DRIVE5_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE5_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE5_RSRVD1) +#define BP_PINCTRL_DRIVE5_BANK1_PIN09_MA 4 +#define BM_PINCTRL_DRIVE5_BANK1_PIN09_MA 0x00000030 +#define BF_PINCTRL_DRIVE5_BANK1_PIN09_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE5_BANK1_PIN09_MA) +#define BP_PINCTRL_DRIVE5_RSRVD0 2 +#define BM_PINCTRL_DRIVE5_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE5_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE5_RSRVD0) +#define BP_PINCTRL_DRIVE5_BANK1_PIN08_MA 0 +#define BM_PINCTRL_DRIVE5_BANK1_PIN08_MA 0x00000003 +#define BF_PINCTRL_DRIVE5_BANK1_PIN08_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE5_BANK1_PIN08_MA) + +#define HW_PINCTRL_DRIVE6 (0x00000260) +#define HW_PINCTRL_DRIVE6_SET (0x00000264) +#define HW_PINCTRL_DRIVE6_CLR (0x00000268) +#define HW_PINCTRL_DRIVE6_TOG (0x0000026c) +#define HW_PINCTRL_DRIVE6_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE6) +#define HW_PINCTRL_DRIVE6_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE6_SET) +#define HW_PINCTRL_DRIVE6_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE6_CLR) +#define HW_PINCTRL_DRIVE6_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE6_TOG) + +#define BP_PINCTRL_DRIVE6_RSRVD7 30 +#define BM_PINCTRL_DRIVE6_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE6_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE6_RSRVD7) +#define BP_PINCTRL_DRIVE6_BANK1_PIN23_MA 28 +#define BM_PINCTRL_DRIVE6_BANK1_PIN23_MA 0x30000000 +#define BF_PINCTRL_DRIVE6_BANK1_PIN23_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE6_BANK1_PIN23_MA) +#define BP_PINCTRL_DRIVE6_RSRVD6 26 +#define BM_PINCTRL_DRIVE6_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE6_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE6_RSRVD6) +#define BP_PINCTRL_DRIVE6_BANK1_PIN22_MA 24 +#define BM_PINCTRL_DRIVE6_BANK1_PIN22_MA 0x03000000 +#define BF_PINCTRL_DRIVE6_BANK1_PIN22_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE6_BANK1_PIN22_MA) +#define BP_PINCTRL_DRIVE6_RSRVD5 22 +#define BM_PINCTRL_DRIVE6_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE6_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE6_RSRVD5) +#define BP_PINCTRL_DRIVE6_BANK1_PIN21_MA 20 +#define BM_PINCTRL_DRIVE6_BANK1_PIN21_MA 0x00300000 +#define BF_PINCTRL_DRIVE6_BANK1_PIN21_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE6_BANK1_PIN21_MA) +#define BP_PINCTRL_DRIVE6_RSRVD4 18 +#define BM_PINCTRL_DRIVE6_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE6_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE6_RSRVD4) +#define BP_PINCTRL_DRIVE6_BANK1_PIN20_MA 16 +#define BM_PINCTRL_DRIVE6_BANK1_PIN20_MA 0x00030000 +#define BF_PINCTRL_DRIVE6_BANK1_PIN20_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE6_BANK1_PIN20_MA) +#define BP_PINCTRL_DRIVE6_RSRVD3 14 +#define BM_PINCTRL_DRIVE6_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE6_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE6_RSRVD3) +#define BP_PINCTRL_DRIVE6_BANK1_PIN19_MA 12 +#define BM_PINCTRL_DRIVE6_BANK1_PIN19_MA 0x00003000 +#define BF_PINCTRL_DRIVE6_BANK1_PIN19_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE6_BANK1_PIN19_MA) +#define BP_PINCTRL_DRIVE6_RSRVD2 10 +#define BM_PINCTRL_DRIVE6_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE6_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE6_RSRVD2) +#define BP_PINCTRL_DRIVE6_BANK1_PIN18_MA 8 +#define BM_PINCTRL_DRIVE6_BANK1_PIN18_MA 0x00000300 +#define BF_PINCTRL_DRIVE6_BANK1_PIN18_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE6_BANK1_PIN18_MA) +#define BP_PINCTRL_DRIVE6_RSRVD1 6 +#define BM_PINCTRL_DRIVE6_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE6_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE6_RSRVD1) +#define BP_PINCTRL_DRIVE6_BANK1_PIN17_MA 4 +#define BM_PINCTRL_DRIVE6_BANK1_PIN17_MA 0x00000030 +#define BF_PINCTRL_DRIVE6_BANK1_PIN17_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE6_BANK1_PIN17_MA) +#define BP_PINCTRL_DRIVE6_RSRVD0 2 +#define BM_PINCTRL_DRIVE6_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE6_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE6_RSRVD0) +#define BP_PINCTRL_DRIVE6_BANK1_PIN16_MA 0 +#define BM_PINCTRL_DRIVE6_BANK1_PIN16_MA 0x00000003 +#define BF_PINCTRL_DRIVE6_BANK1_PIN16_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE6_BANK1_PIN16_MA) + +#define HW_PINCTRL_DRIVE7 (0x00000270) +#define HW_PINCTRL_DRIVE7_SET (0x00000274) +#define HW_PINCTRL_DRIVE7_CLR (0x00000278) +#define HW_PINCTRL_DRIVE7_TOG (0x0000027c) +#define HW_PINCTRL_DRIVE7_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE7) +#define HW_PINCTRL_DRIVE7_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE7_SET) +#define HW_PINCTRL_DRIVE7_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE7_CLR) +#define HW_PINCTRL_DRIVE7_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE7_TOG) + +#define BP_PINCTRL_DRIVE7_RSRVD7 28 +#define BM_PINCTRL_DRIVE7_RSRVD7 0xF0000000 +#define BF_PINCTRL_DRIVE7_RSRVD7(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE7_RSRVD7) +#define BP_PINCTRL_DRIVE7_RSRVD6 26 +#define BM_PINCTRL_DRIVE7_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE7_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE7_RSRVD6) +#define BP_PINCTRL_DRIVE7_BANK1_PIN30_MA 24 +#define BM_PINCTRL_DRIVE7_BANK1_PIN30_MA 0x03000000 +#define BF_PINCTRL_DRIVE7_BANK1_PIN30_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE7_BANK1_PIN30_MA) +#define BP_PINCTRL_DRIVE7_RSRVD5 22 +#define BM_PINCTRL_DRIVE7_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE7_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE7_RSRVD5) +#define BP_PINCTRL_DRIVE7_BANK1_PIN29_MA 20 +#define BM_PINCTRL_DRIVE7_BANK1_PIN29_MA 0x00300000 +#define BF_PINCTRL_DRIVE7_BANK1_PIN29_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE7_BANK1_PIN29_MA) +#define BP_PINCTRL_DRIVE7_RSRVD4 18 +#define BM_PINCTRL_DRIVE7_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE7_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE7_RSRVD4) +#define BP_PINCTRL_DRIVE7_BANK1_PIN28_MA 16 +#define BM_PINCTRL_DRIVE7_BANK1_PIN28_MA 0x00030000 +#define BF_PINCTRL_DRIVE7_BANK1_PIN28_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE7_BANK1_PIN28_MA) +#define BP_PINCTRL_DRIVE7_RSRVD3 14 +#define BM_PINCTRL_DRIVE7_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE7_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE7_RSRVD3) +#define BP_PINCTRL_DRIVE7_BANK1_PIN27_MA 12 +#define BM_PINCTRL_DRIVE7_BANK1_PIN27_MA 0x00003000 +#define BF_PINCTRL_DRIVE7_BANK1_PIN27_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE7_BANK1_PIN27_MA) +#define BP_PINCTRL_DRIVE7_RSRVD2 10 +#define BM_PINCTRL_DRIVE7_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE7_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE7_RSRVD2) +#define BP_PINCTRL_DRIVE7_BANK1_PIN26_MA 8 +#define BM_PINCTRL_DRIVE7_BANK1_PIN26_MA 0x00000300 +#define BF_PINCTRL_DRIVE7_BANK1_PIN26_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE7_BANK1_PIN26_MA) +#define BP_PINCTRL_DRIVE7_RSRVD1 6 +#define BM_PINCTRL_DRIVE7_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE7_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE7_RSRVD1) +#define BP_PINCTRL_DRIVE7_BANK1_PIN25_MA 4 +#define BM_PINCTRL_DRIVE7_BANK1_PIN25_MA 0x00000030 +#define BF_PINCTRL_DRIVE7_BANK1_PIN25_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE7_BANK1_PIN25_MA) +#define BP_PINCTRL_DRIVE7_RSRVD0 2 +#define BM_PINCTRL_DRIVE7_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE7_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE7_RSRVD0) +#define BP_PINCTRL_DRIVE7_BANK1_PIN24_MA 0 +#define BM_PINCTRL_DRIVE7_BANK1_PIN24_MA 0x00000003 +#define BF_PINCTRL_DRIVE7_BANK1_PIN24_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE7_BANK1_PIN24_MA) + +#define HW_PINCTRL_DRIVE8 (0x00000280) +#define HW_PINCTRL_DRIVE8_SET (0x00000284) +#define HW_PINCTRL_DRIVE8_CLR (0x00000288) +#define HW_PINCTRL_DRIVE8_TOG (0x0000028c) +#define HW_PINCTRL_DRIVE8_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE8) +#define HW_PINCTRL_DRIVE8_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE8_SET) +#define HW_PINCTRL_DRIVE8_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE8_CLR) +#define HW_PINCTRL_DRIVE8_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE8_TOG) + +#define BP_PINCTRL_DRIVE8_RSRVD7 30 +#define BM_PINCTRL_DRIVE8_RSRVD7 0xC0000000 +#define BF_PINCTRL_DRIVE8_RSRVD7(v) \ + (((v) << 30) & BM_PINCTRL_DRIVE8_RSRVD7) +#define BP_PINCTRL_DRIVE8_BANK2_PIN07_MA 28 +#define BM_PINCTRL_DRIVE8_BANK2_PIN07_MA 0x30000000 +#define BF_PINCTRL_DRIVE8_BANK2_PIN07_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE8_BANK2_PIN07_MA) +#define BP_PINCTRL_DRIVE8_RSRVD6 26 +#define BM_PINCTRL_DRIVE8_RSRVD6 0x0C000000 +#define BF_PINCTRL_DRIVE8_RSRVD6(v) \ + (((v) << 26) & BM_PINCTRL_DRIVE8_RSRVD6) +#define BP_PINCTRL_DRIVE8_BANK2_PIN06_MA 24 +#define BM_PINCTRL_DRIVE8_BANK2_PIN06_MA 0x03000000 +#define BF_PINCTRL_DRIVE8_BANK2_PIN06_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE8_BANK2_PIN06_MA) +#define BP_PINCTRL_DRIVE8_RSRVD5 22 +#define BM_PINCTRL_DRIVE8_RSRVD5 0x00C00000 +#define BF_PINCTRL_DRIVE8_RSRVD5(v) \ + (((v) << 22) & BM_PINCTRL_DRIVE8_RSRVD5) +#define BP_PINCTRL_DRIVE8_BANK2_PIN05_MA 20 +#define BM_PINCTRL_DRIVE8_BANK2_PIN05_MA 0x00300000 +#define BF_PINCTRL_DRIVE8_BANK2_PIN05_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE8_BANK2_PIN05_MA) +#define BP_PINCTRL_DRIVE8_RSRVD4 18 +#define BM_PINCTRL_DRIVE8_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE8_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE8_RSRVD4) +#define BP_PINCTRL_DRIVE8_BANK2_PIN04_MA 16 +#define BM_PINCTRL_DRIVE8_BANK2_PIN04_MA 0x00030000 +#define BF_PINCTRL_DRIVE8_BANK2_PIN04_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE8_BANK2_PIN04_MA) +#define BP_PINCTRL_DRIVE8_RSRVD3 14 +#define BM_PINCTRL_DRIVE8_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE8_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE8_RSRVD3) +#define BP_PINCTRL_DRIVE8_BANK2_PIN03_MA 12 +#define BM_PINCTRL_DRIVE8_BANK2_PIN03_MA 0x00003000 +#define BF_PINCTRL_DRIVE8_BANK2_PIN03_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE8_BANK2_PIN03_MA) +#define BP_PINCTRL_DRIVE8_RSRVD2 10 +#define BM_PINCTRL_DRIVE8_RSRVD2 0x00000C00 +#define BF_PINCTRL_DRIVE8_RSRVD2(v) \ + (((v) << 10) & BM_PINCTRL_DRIVE8_RSRVD2) +#define BP_PINCTRL_DRIVE8_BANK2_PIN02_MA 8 +#define BM_PINCTRL_DRIVE8_BANK2_PIN02_MA 0x00000300 +#define BF_PINCTRL_DRIVE8_BANK2_PIN02_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE8_BANK2_PIN02_MA) +#define BP_PINCTRL_DRIVE8_RSRVD1 6 +#define BM_PINCTRL_DRIVE8_RSRVD1 0x000000C0 +#define BF_PINCTRL_DRIVE8_RSRVD1(v) \ + (((v) << 6) & BM_PINCTRL_DRIVE8_RSRVD1) +#define BP_PINCTRL_DRIVE8_BANK2_PIN01_MA 4 +#define BM_PINCTRL_DRIVE8_BANK2_PIN01_MA 0x00000030 +#define BF_PINCTRL_DRIVE8_BANK2_PIN01_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE8_BANK2_PIN01_MA) +#define BP_PINCTRL_DRIVE8_RSRVD0 2 +#define BM_PINCTRL_DRIVE8_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE8_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE8_RSRVD0) +#define BP_PINCTRL_DRIVE8_BANK2_PIN00_MA 0 +#define BM_PINCTRL_DRIVE8_BANK2_PIN00_MA 0x00000003 +#define BF_PINCTRL_DRIVE8_BANK2_PIN00_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE8_BANK2_PIN00_MA) + +#define HW_PINCTRL_DRIVE9 (0x00000290) +#define HW_PINCTRL_DRIVE9_SET (0x00000294) +#define HW_PINCTRL_DRIVE9_CLR (0x00000298) +#define HW_PINCTRL_DRIVE9_TOG (0x0000029c) +#define HW_PINCTRL_DRIVE9_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE9) +#define HW_PINCTRL_DRIVE9_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE9_SET) +#define HW_PINCTRL_DRIVE9_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE9_CLR) +#define HW_PINCTRL_DRIVE9_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE9_TOG) + +#define BM_PINCTRL_DRIVE9_RSRVD7 0x80000000 +#define BM_PINCTRL_DRIVE9_BANK2_PIN15_V 0x40000000 +#define BP_PINCTRL_DRIVE9_BANK2_PIN15_MA 28 +#define BM_PINCTRL_DRIVE9_BANK2_PIN15_MA 0x30000000 +#define BF_PINCTRL_DRIVE9_BANK2_PIN15_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE9_BANK2_PIN15_MA) +#define BM_PINCTRL_DRIVE9_RSRVD6 0x08000000 +#define BM_PINCTRL_DRIVE9_BANK2_PIN14_V 0x04000000 +#define BP_PINCTRL_DRIVE9_BANK2_PIN14_MA 24 +#define BM_PINCTRL_DRIVE9_BANK2_PIN14_MA 0x03000000 +#define BF_PINCTRL_DRIVE9_BANK2_PIN14_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE9_BANK2_PIN14_MA) +#define BM_PINCTRL_DRIVE9_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE9_BANK2_PIN13_V 0x00400000 +#define BP_PINCTRL_DRIVE9_BANK2_PIN13_MA 20 +#define BM_PINCTRL_DRIVE9_BANK2_PIN13_MA 0x00300000 +#define BF_PINCTRL_DRIVE9_BANK2_PIN13_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE9_BANK2_PIN13_MA) +#define BM_PINCTRL_DRIVE9_RSRVD4 0x00080000 +#define BM_PINCTRL_DRIVE9_BANK2_PIN12_V 0x00040000 +#define BP_PINCTRL_DRIVE9_BANK2_PIN12_MA 16 +#define BM_PINCTRL_DRIVE9_BANK2_PIN12_MA 0x00030000 +#define BF_PINCTRL_DRIVE9_BANK2_PIN12_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE9_BANK2_PIN12_MA) +#define BM_PINCTRL_DRIVE9_RSRVD3 0x00008000 +#define BM_PINCTRL_DRIVE9_BANK2_PIN11_V 0x00004000 +#define BP_PINCTRL_DRIVE9_BANK2_PIN11_MA 12 +#define BM_PINCTRL_DRIVE9_BANK2_PIN11_MA 0x00003000 +#define BF_PINCTRL_DRIVE9_BANK2_PIN11_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE9_BANK2_PIN11_MA) +#define BM_PINCTRL_DRIVE9_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE9_BANK2_PIN10_V 0x00000400 +#define BP_PINCTRL_DRIVE9_BANK2_PIN10_MA 8 +#define BM_PINCTRL_DRIVE9_BANK2_PIN10_MA 0x00000300 +#define BF_PINCTRL_DRIVE9_BANK2_PIN10_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE9_BANK2_PIN10_MA) +#define BM_PINCTRL_DRIVE9_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE9_BANK2_PIN09_V 0x00000040 +#define BP_PINCTRL_DRIVE9_BANK2_PIN09_MA 4 +#define BM_PINCTRL_DRIVE9_BANK2_PIN09_MA 0x00000030 +#define BF_PINCTRL_DRIVE9_BANK2_PIN09_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE9_BANK2_PIN09_MA) +#define BP_PINCTRL_DRIVE9_RSRVD0 2 +#define BM_PINCTRL_DRIVE9_RSRVD0 0x0000000C +#define BF_PINCTRL_DRIVE9_RSRVD0(v) \ + (((v) << 2) & BM_PINCTRL_DRIVE9_RSRVD0) +#define BP_PINCTRL_DRIVE9_BANK2_PIN08_MA 0 +#define BM_PINCTRL_DRIVE9_BANK2_PIN08_MA 0x00000003 +#define BF_PINCTRL_DRIVE9_BANK2_PIN08_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE9_BANK2_PIN08_MA) + +#define HW_PINCTRL_DRIVE10 (0x000002a0) +#define HW_PINCTRL_DRIVE10_SET (0x000002a4) +#define HW_PINCTRL_DRIVE10_CLR (0x000002a8) +#define HW_PINCTRL_DRIVE10_TOG (0x000002ac) +#define HW_PINCTRL_DRIVE10_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE10) +#define HW_PINCTRL_DRIVE10_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE10_SET) +#define HW_PINCTRL_DRIVE10_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE10_CLR) +#define HW_PINCTRL_DRIVE10_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE10_TOG) + +#define BM_PINCTRL_DRIVE10_RSRVD7 0x80000000 +#define BM_PINCTRL_DRIVE10_BANK2_PIN23_V 0x40000000 +#define BP_PINCTRL_DRIVE10_BANK2_PIN23_MA 28 +#define BM_PINCTRL_DRIVE10_BANK2_PIN23_MA 0x30000000 +#define BF_PINCTRL_DRIVE10_BANK2_PIN23_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE10_BANK2_PIN23_MA) +#define BM_PINCTRL_DRIVE10_RSRVD6 0x08000000 +#define BM_PINCTRL_DRIVE10_BANK2_PIN22_V 0x04000000 +#define BP_PINCTRL_DRIVE10_BANK2_PIN22_MA 24 +#define BM_PINCTRL_DRIVE10_BANK2_PIN22_MA 0x03000000 +#define BF_PINCTRL_DRIVE10_BANK2_PIN22_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE10_BANK2_PIN22_MA) +#define BM_PINCTRL_DRIVE10_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE10_BANK2_PIN21_V 0x00400000 +#define BP_PINCTRL_DRIVE10_BANK2_PIN21_MA 20 +#define BM_PINCTRL_DRIVE10_BANK2_PIN21_MA 0x00300000 +#define BF_PINCTRL_DRIVE10_BANK2_PIN21_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE10_BANK2_PIN21_MA) +#define BM_PINCTRL_DRIVE10_RSRVD4 0x00080000 +#define BM_PINCTRL_DRIVE10_BANK2_PIN20_V 0x00040000 +#define BP_PINCTRL_DRIVE10_BANK2_PIN20_MA 16 +#define BM_PINCTRL_DRIVE10_BANK2_PIN20_MA 0x00030000 +#define BF_PINCTRL_DRIVE10_BANK2_PIN20_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE10_BANK2_PIN20_MA) +#define BM_PINCTRL_DRIVE10_RSRVD3 0x00008000 +#define BM_PINCTRL_DRIVE10_BANK2_PIN19_V 0x00004000 +#define BP_PINCTRL_DRIVE10_BANK2_PIN19_MA 12 +#define BM_PINCTRL_DRIVE10_BANK2_PIN19_MA 0x00003000 +#define BF_PINCTRL_DRIVE10_BANK2_PIN19_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE10_BANK2_PIN19_MA) +#define BM_PINCTRL_DRIVE10_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE10_BANK2_PIN18_V 0x00000400 +#define BP_PINCTRL_DRIVE10_BANK2_PIN18_MA 8 +#define BM_PINCTRL_DRIVE10_BANK2_PIN18_MA 0x00000300 +#define BF_PINCTRL_DRIVE10_BANK2_PIN18_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE10_BANK2_PIN18_MA) +#define BM_PINCTRL_DRIVE10_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE10_BANK2_PIN17_V 0x00000040 +#define BP_PINCTRL_DRIVE10_BANK2_PIN17_MA 4 +#define BM_PINCTRL_DRIVE10_BANK2_PIN17_MA 0x00000030 +#define BF_PINCTRL_DRIVE10_BANK2_PIN17_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE10_BANK2_PIN17_MA) +#define BM_PINCTRL_DRIVE10_RSRVD0 0x00000008 +#define BM_PINCTRL_DRIVE10_BANK2_PIN16_V 0x00000004 +#define BP_PINCTRL_DRIVE10_BANK2_PIN16_MA 0 +#define BM_PINCTRL_DRIVE10_BANK2_PIN16_MA 0x00000003 +#define BF_PINCTRL_DRIVE10_BANK2_PIN16_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE10_BANK2_PIN16_MA) + +#define HW_PINCTRL_DRIVE11 (0x000002b0) +#define HW_PINCTRL_DRIVE11_SET (0x000002b4) +#define HW_PINCTRL_DRIVE11_CLR (0x000002b8) +#define HW_PINCTRL_DRIVE11_TOG (0x000002bc) +#define HW_PINCTRL_DRIVE11_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE11) +#define HW_PINCTRL_DRIVE11_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE11_SET) +#define HW_PINCTRL_DRIVE11_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE11_CLR) +#define HW_PINCTRL_DRIVE11_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE11_TOG) + +#define BM_PINCTRL_DRIVE11_RSRVD7 0x80000000 +#define BM_PINCTRL_DRIVE11_BANK2_PIN31_V 0x40000000 +#define BP_PINCTRL_DRIVE11_BANK2_PIN31_MA 28 +#define BM_PINCTRL_DRIVE11_BANK2_PIN31_MA 0x30000000 +#define BF_PINCTRL_DRIVE11_BANK2_PIN31_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE11_BANK2_PIN31_MA) +#define BM_PINCTRL_DRIVE11_RSRVD6 0x08000000 +#define BM_PINCTRL_DRIVE11_BANK2_PIN30_V 0x04000000 +#define BP_PINCTRL_DRIVE11_BANK2_PIN30_MA 24 +#define BM_PINCTRL_DRIVE11_BANK2_PIN30_MA 0x03000000 +#define BF_PINCTRL_DRIVE11_BANK2_PIN30_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE11_BANK2_PIN30_MA) +#define BM_PINCTRL_DRIVE11_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE11_BANK2_PIN29_V 0x00400000 +#define BP_PINCTRL_DRIVE11_BANK2_PIN29_MA 20 +#define BM_PINCTRL_DRIVE11_BANK2_PIN29_MA 0x00300000 +#define BF_PINCTRL_DRIVE11_BANK2_PIN29_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE11_BANK2_PIN29_MA) +#define BP_PINCTRL_DRIVE11_RSRVD4 18 +#define BM_PINCTRL_DRIVE11_RSRVD4 0x000C0000 +#define BF_PINCTRL_DRIVE11_RSRVD4(v) \ + (((v) << 18) & BM_PINCTRL_DRIVE11_RSRVD4) +#define BP_PINCTRL_DRIVE11_BANK2_PIN28_MA 16 +#define BM_PINCTRL_DRIVE11_BANK2_PIN28_MA 0x00030000 +#define BF_PINCTRL_DRIVE11_BANK2_PIN28_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE11_BANK2_PIN28_MA) +#define BP_PINCTRL_DRIVE11_RSRVD3 14 +#define BM_PINCTRL_DRIVE11_RSRVD3 0x0000C000 +#define BF_PINCTRL_DRIVE11_RSRVD3(v) \ + (((v) << 14) & BM_PINCTRL_DRIVE11_RSRVD3) +#define BP_PINCTRL_DRIVE11_BANK2_PIN27_MA 12 +#define BM_PINCTRL_DRIVE11_BANK2_PIN27_MA 0x00003000 +#define BF_PINCTRL_DRIVE11_BANK2_PIN27_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE11_BANK2_PIN27_MA) +#define BM_PINCTRL_DRIVE11_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE11_BANK2_PIN26_V 0x00000400 +#define BP_PINCTRL_DRIVE11_BANK2_PIN26_MA 8 +#define BM_PINCTRL_DRIVE11_BANK2_PIN26_MA 0x00000300 +#define BF_PINCTRL_DRIVE11_BANK2_PIN26_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE11_BANK2_PIN26_MA) +#define BM_PINCTRL_DRIVE11_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE11_BANK2_PIN25_V 0x00000040 +#define BP_PINCTRL_DRIVE11_BANK2_PIN25_MA 4 +#define BM_PINCTRL_DRIVE11_BANK2_PIN25_MA 0x00000030 +#define BF_PINCTRL_DRIVE11_BANK2_PIN25_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE11_BANK2_PIN25_MA) +#define BM_PINCTRL_DRIVE11_RSRVD0 0x00000008 +#define BM_PINCTRL_DRIVE11_BANK2_PIN24_V 0x00000004 +#define BP_PINCTRL_DRIVE11_BANK2_PIN24_MA 0 +#define BM_PINCTRL_DRIVE11_BANK2_PIN24_MA 0x00000003 +#define BF_PINCTRL_DRIVE11_BANK2_PIN24_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE11_BANK2_PIN24_MA) + +#define HW_PINCTRL_DRIVE12 (0x000002c0) +#define HW_PINCTRL_DRIVE12_SET (0x000002c4) +#define HW_PINCTRL_DRIVE12_CLR (0x000002c8) +#define HW_PINCTRL_DRIVE12_TOG (0x000002cc) +#define HW_PINCTRL_DRIVE12_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE12) +#define HW_PINCTRL_DRIVE12_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE12_SET) +#define HW_PINCTRL_DRIVE12_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE12_CLR) +#define HW_PINCTRL_DRIVE12_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE12_TOG) + +#define BM_PINCTRL_DRIVE12_RSRVD7 0x80000000 +#define BM_PINCTRL_DRIVE12_BANK3_PIN07_V 0x40000000 +#define BP_PINCTRL_DRIVE12_BANK3_PIN07_MA 28 +#define BM_PINCTRL_DRIVE12_BANK3_PIN07_MA 0x30000000 +#define BF_PINCTRL_DRIVE12_BANK3_PIN07_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE12_BANK3_PIN07_MA) +#define BM_PINCTRL_DRIVE12_RSRVD6 0x08000000 +#define BM_PINCTRL_DRIVE12_BANK3_PIN06_V 0x04000000 +#define BP_PINCTRL_DRIVE12_BANK3_PIN06_MA 24 +#define BM_PINCTRL_DRIVE12_BANK3_PIN06_MA 0x03000000 +#define BF_PINCTRL_DRIVE12_BANK3_PIN06_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE12_BANK3_PIN06_MA) +#define BM_PINCTRL_DRIVE12_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE12_BANK3_PIN05_V 0x00400000 +#define BP_PINCTRL_DRIVE12_BANK3_PIN05_MA 20 +#define BM_PINCTRL_DRIVE12_BANK3_PIN05_MA 0x00300000 +#define BF_PINCTRL_DRIVE12_BANK3_PIN05_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE12_BANK3_PIN05_MA) +#define BM_PINCTRL_DRIVE12_RSRVD4 0x00080000 +#define BM_PINCTRL_DRIVE12_BANK3_PIN04_V 0x00040000 +#define BP_PINCTRL_DRIVE12_BANK3_PIN04_MA 16 +#define BM_PINCTRL_DRIVE12_BANK3_PIN04_MA 0x00030000 +#define BF_PINCTRL_DRIVE12_BANK3_PIN04_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE12_BANK3_PIN04_MA) +#define BM_PINCTRL_DRIVE12_RSRVD3 0x00008000 +#define BM_PINCTRL_DRIVE12_BANK3_PIN03_V 0x00004000 +#define BP_PINCTRL_DRIVE12_BANK3_PIN03_MA 12 +#define BM_PINCTRL_DRIVE12_BANK3_PIN03_MA 0x00003000 +#define BF_PINCTRL_DRIVE12_BANK3_PIN03_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE12_BANK3_PIN03_MA) +#define BM_PINCTRL_DRIVE12_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE12_BANK3_PIN02_V 0x00000400 +#define BP_PINCTRL_DRIVE12_BANK3_PIN02_MA 8 +#define BM_PINCTRL_DRIVE12_BANK3_PIN02_MA 0x00000300 +#define BF_PINCTRL_DRIVE12_BANK3_PIN02_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE12_BANK3_PIN02_MA) +#define BM_PINCTRL_DRIVE12_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE12_BANK3_PIN01_V 0x00000040 +#define BP_PINCTRL_DRIVE12_BANK3_PIN01_MA 4 +#define BM_PINCTRL_DRIVE12_BANK3_PIN01_MA 0x00000030 +#define BF_PINCTRL_DRIVE12_BANK3_PIN01_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE12_BANK3_PIN01_MA) +#define BM_PINCTRL_DRIVE12_RSRVD0 0x00000008 +#define BM_PINCTRL_DRIVE12_BANK3_PIN00_V 0x00000004 +#define BP_PINCTRL_DRIVE12_BANK3_PIN00_MA 0 +#define BM_PINCTRL_DRIVE12_BANK3_PIN00_MA 0x00000003 +#define BF_PINCTRL_DRIVE12_BANK3_PIN00_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE12_BANK3_PIN00_MA) + +#define HW_PINCTRL_DRIVE13 (0x000002d0) +#define HW_PINCTRL_DRIVE13_SET (0x000002d4) +#define HW_PINCTRL_DRIVE13_CLR (0x000002d8) +#define HW_PINCTRL_DRIVE13_TOG (0x000002dc) +#define HW_PINCTRL_DRIVE13_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE13) +#define HW_PINCTRL_DRIVE13_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE13_SET) +#define HW_PINCTRL_DRIVE13_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE13_CLR) +#define HW_PINCTRL_DRIVE13_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE13_TOG) + +#define BM_PINCTRL_DRIVE13_RSRVD7 0x80000000 +#define BM_PINCTRL_DRIVE13_BANK3_PIN15_V 0x40000000 +#define BP_PINCTRL_DRIVE13_BANK3_PIN15_MA 28 +#define BM_PINCTRL_DRIVE13_BANK3_PIN15_MA 0x30000000 +#define BF_PINCTRL_DRIVE13_BANK3_PIN15_MA(v) \ + (((v) << 28) & BM_PINCTRL_DRIVE13_BANK3_PIN15_MA) +#define BM_PINCTRL_DRIVE13_RSRVD6 0x08000000 +#define BM_PINCTRL_DRIVE13_BANK3_PIN14_V 0x04000000 +#define BP_PINCTRL_DRIVE13_BANK3_PIN14_MA 24 +#define BM_PINCTRL_DRIVE13_BANK3_PIN14_MA 0x03000000 +#define BF_PINCTRL_DRIVE13_BANK3_PIN14_MA(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE13_BANK3_PIN14_MA) +#define BM_PINCTRL_DRIVE13_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE13_BANK3_PIN13_V 0x00400000 +#define BP_PINCTRL_DRIVE13_BANK3_PIN13_MA 20 +#define BM_PINCTRL_DRIVE13_BANK3_PIN13_MA 0x00300000 +#define BF_PINCTRL_DRIVE13_BANK3_PIN13_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE13_BANK3_PIN13_MA) +#define BM_PINCTRL_DRIVE13_RSRVD4 0x00080000 +#define BM_PINCTRL_DRIVE13_BANK3_PIN12_V 0x00040000 +#define BP_PINCTRL_DRIVE13_BANK3_PIN12_MA 16 +#define BM_PINCTRL_DRIVE13_BANK3_PIN12_MA 0x00030000 +#define BF_PINCTRL_DRIVE13_BANK3_PIN12_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE13_BANK3_PIN12_MA) +#define BM_PINCTRL_DRIVE13_RSRVD3 0x00008000 +#define BM_PINCTRL_DRIVE13_BANK3_PIN11_V 0x00004000 +#define BP_PINCTRL_DRIVE13_BANK3_PIN11_MA 12 +#define BM_PINCTRL_DRIVE13_BANK3_PIN11_MA 0x00003000 +#define BF_PINCTRL_DRIVE13_BANK3_PIN11_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE13_BANK3_PIN11_MA) +#define BM_PINCTRL_DRIVE13_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE13_BANK3_PIN10_V 0x00000400 +#define BP_PINCTRL_DRIVE13_BANK3_PIN10_MA 8 +#define BM_PINCTRL_DRIVE13_BANK3_PIN10_MA 0x00000300 +#define BF_PINCTRL_DRIVE13_BANK3_PIN10_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE13_BANK3_PIN10_MA) +#define BM_PINCTRL_DRIVE13_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE13_BANK3_PIN09_V 0x00000040 +#define BP_PINCTRL_DRIVE13_BANK3_PIN09_MA 4 +#define BM_PINCTRL_DRIVE13_BANK3_PIN09_MA 0x00000030 +#define BF_PINCTRL_DRIVE13_BANK3_PIN09_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE13_BANK3_PIN09_MA) +#define BM_PINCTRL_DRIVE13_RSRVD0 0x00000008 +#define BM_PINCTRL_DRIVE13_BANK3_PIN08_V 0x00000004 +#define BP_PINCTRL_DRIVE13_BANK3_PIN08_MA 0 +#define BM_PINCTRL_DRIVE13_BANK3_PIN08_MA 0x00000003 +#define BF_PINCTRL_DRIVE13_BANK3_PIN08_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE13_BANK3_PIN08_MA) + +#define HW_PINCTRL_DRIVE14 (0x000002e0) +#define HW_PINCTRL_DRIVE14_SET (0x000002e4) +#define HW_PINCTRL_DRIVE14_CLR (0x000002e8) +#define HW_PINCTRL_DRIVE14_TOG (0x000002ec) +#define HW_PINCTRL_DRIVE14_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE14) +#define HW_PINCTRL_DRIVE14_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE14_SET) +#define HW_PINCTRL_DRIVE14_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE14_CLR) +#define HW_PINCTRL_DRIVE14_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DRIVE14_TOG) + +#define BP_PINCTRL_DRIVE14_RSRVD6 24 +#define BM_PINCTRL_DRIVE14_RSRVD6 0xFF000000 +#define BF_PINCTRL_DRIVE14_RSRVD6(v) \ + (((v) << 24) & BM_PINCTRL_DRIVE14_RSRVD6) +#define BM_PINCTRL_DRIVE14_RSRVD5 0x00800000 +#define BM_PINCTRL_DRIVE14_BANK3_PIN21_V 0x00400000 +#define BP_PINCTRL_DRIVE14_BANK3_PIN21_MA 20 +#define BM_PINCTRL_DRIVE14_BANK3_PIN21_MA 0x00300000 +#define BF_PINCTRL_DRIVE14_BANK3_PIN21_MA(v) \ + (((v) << 20) & BM_PINCTRL_DRIVE14_BANK3_PIN21_MA) +#define BM_PINCTRL_DRIVE14_RSRVD4 0x00080000 +#define BM_PINCTRL_DRIVE14_BANK3_PIN20_V 0x00040000 +#define BP_PINCTRL_DRIVE14_BANK3_PIN20_MA 16 +#define BM_PINCTRL_DRIVE14_BANK3_PIN20_MA 0x00030000 +#define BF_PINCTRL_DRIVE14_BANK3_PIN20_MA(v) \ + (((v) << 16) & BM_PINCTRL_DRIVE14_BANK3_PIN20_MA) +#define BM_PINCTRL_DRIVE14_RSRVD3 0x00008000 +#define BM_PINCTRL_DRIVE14_BANK3_PIN19_V 0x00004000 +#define BP_PINCTRL_DRIVE14_BANK3_PIN19_MA 12 +#define BM_PINCTRL_DRIVE14_BANK3_PIN19_MA 0x00003000 +#define BF_PINCTRL_DRIVE14_BANK3_PIN19_MA(v) \ + (((v) << 12) & BM_PINCTRL_DRIVE14_BANK3_PIN19_MA) +#define BM_PINCTRL_DRIVE14_RSRVD2 0x00000800 +#define BM_PINCTRL_DRIVE14_BANK3_PIN18_V 0x00000400 +#define BP_PINCTRL_DRIVE14_BANK3_PIN18_MA 8 +#define BM_PINCTRL_DRIVE14_BANK3_PIN18_MA 0x00000300 +#define BF_PINCTRL_DRIVE14_BANK3_PIN18_MA(v) \ + (((v) << 8) & BM_PINCTRL_DRIVE14_BANK3_PIN18_MA) +#define BM_PINCTRL_DRIVE14_RSRVD1 0x00000080 +#define BM_PINCTRL_DRIVE14_BANK3_PIN17_V 0x00000040 +#define BP_PINCTRL_DRIVE14_BANK3_PIN17_MA 4 +#define BM_PINCTRL_DRIVE14_BANK3_PIN17_MA 0x00000030 +#define BF_PINCTRL_DRIVE14_BANK3_PIN17_MA(v) \ + (((v) << 4) & BM_PINCTRL_DRIVE14_BANK3_PIN17_MA) +#define BM_PINCTRL_DRIVE14_RSRVD0 0x00000008 +#define BM_PINCTRL_DRIVE14_BANK3_PIN16_V 0x00000004 +#define BP_PINCTRL_DRIVE14_BANK3_PIN16_MA 0 +#define BM_PINCTRL_DRIVE14_BANK3_PIN16_MA 0x00000003 +#define BF_PINCTRL_DRIVE14_BANK3_PIN16_MA(v) \ + (((v) << 0) & BM_PINCTRL_DRIVE14_BANK3_PIN16_MA) + +#define HW_PINCTRL_PULL0 (0x00000400) +#define HW_PINCTRL_PULL0_SET (0x00000404) +#define HW_PINCTRL_PULL0_CLR (0x00000408) +#define HW_PINCTRL_PULL0_TOG (0x0000040c) +#define HW_PINCTRL_PULL0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL0) +#define HW_PINCTRL_PULL0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL0_SET) +#define HW_PINCTRL_PULL0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL0_CLR) +#define HW_PINCTRL_PULL0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL0_TOG) + +#define BM_PINCTRL_PULL0_BANK0_PIN31 0x80000000 +#define BM_PINCTRL_PULL0_BANK0_PIN30 0x40000000 +#define BM_PINCTRL_PULL0_BANK0_PIN29 0x20000000 +#define BM_PINCTRL_PULL0_BANK0_PIN28 0x10000000 +#define BM_PINCTRL_PULL0_BANK0_PIN27 0x08000000 +#define BM_PINCTRL_PULL0_BANK0_PIN26 0x04000000 +#define BP_PINCTRL_PULL0_RSRVD2 23 +#define BM_PINCTRL_PULL0_RSRVD2 0x03800000 +#define BF_PINCTRL_PULL0_RSRVD2(v) \ + (((v) << 23) & BM_PINCTRL_PULL0_RSRVD2) +#define BM_PINCTRL_PULL0_BANK0_PIN22 0x00400000 +#define BM_PINCTRL_PULL0_BANK0_PIN21 0x00200000 +#define BM_PINCTRL_PULL0_BANK0_PIN20 0x00100000 +#define BM_PINCTRL_PULL0_BANK0_PIN19 0x00080000 +#define BM_PINCTRL_PULL0_BANK0_PIN18 0x00040000 +#define BP_PINCTRL_PULL0_RSRVD1 16 +#define BM_PINCTRL_PULL0_RSRVD1 0x00030000 +#define BF_PINCTRL_PULL0_RSRVD1(v) \ + (((v) << 16) & BM_PINCTRL_PULL0_RSRVD1) +#define BM_PINCTRL_PULL0_BANK0_PIN15 0x00008000 +#define BP_PINCTRL_PULL0_RSRVD0 12 +#define BM_PINCTRL_PULL0_RSRVD0 0x00007000 +#define BF_PINCTRL_PULL0_RSRVD0(v) \ + (((v) << 12) & BM_PINCTRL_PULL0_RSRVD0) +#define BM_PINCTRL_PULL0_BANK0_PIN11 0x00000800 +#define BM_PINCTRL_PULL0_BANK0_PIN10 0x00000400 +#define BM_PINCTRL_PULL0_BANK0_PIN09 0x00000200 +#define BM_PINCTRL_PULL0_BANK0_PIN08 0x00000100 +#define BM_PINCTRL_PULL0_BANK0_PIN07 0x00000080 +#define BM_PINCTRL_PULL0_BANK0_PIN06 0x00000040 +#define BM_PINCTRL_PULL0_BANK0_PIN05 0x00000020 +#define BM_PINCTRL_PULL0_BANK0_PIN04 0x00000010 +#define BM_PINCTRL_PULL0_BANK0_PIN03 0x00000008 +#define BM_PINCTRL_PULL0_BANK0_PIN02 0x00000004 +#define BM_PINCTRL_PULL0_BANK0_PIN01 0x00000002 +#define BM_PINCTRL_PULL0_BANK0_PIN00 0x00000001 + +#define HW_PINCTRL_PULL1 (0x00000410) +#define HW_PINCTRL_PULL1_SET (0x00000414) +#define HW_PINCTRL_PULL1_CLR (0x00000418) +#define HW_PINCTRL_PULL1_TOG (0x0000041c) +#define HW_PINCTRL_PULL1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL1) +#define HW_PINCTRL_PULL1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL1_SET) +#define HW_PINCTRL_PULL1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL1_CLR) +#define HW_PINCTRL_PULL1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL1_TOG) + +#define BP_PINCTRL_PULL1_RSRVD3 29 +#define BM_PINCTRL_PULL1_RSRVD3 0xE0000000 +#define BF_PINCTRL_PULL1_RSRVD3(v) \ + (((v) << 29) & BM_PINCTRL_PULL1_RSRVD3) +#define BM_PINCTRL_PULL1_BANK1_PIN28 0x10000000 +#define BP_PINCTRL_PULL1_RSRVD2 23 +#define BM_PINCTRL_PULL1_RSRVD2 0x0F800000 +#define BF_PINCTRL_PULL1_RSRVD2(v) \ + (((v) << 23) & BM_PINCTRL_PULL1_RSRVD2) +#define BM_PINCTRL_PULL1_BANK1_PIN22 0x00400000 +#define BP_PINCTRL_PULL1_RSRVD1 19 +#define BM_PINCTRL_PULL1_RSRVD1 0x00380000 +#define BF_PINCTRL_PULL1_RSRVD1(v) \ + (((v) << 19) & BM_PINCTRL_PULL1_RSRVD1) +#define BM_PINCTRL_PULL1_BANK1_PIN18 0x00040000 +#define BP_PINCTRL_PULL1_RSRVD0 0 +#define BM_PINCTRL_PULL1_RSRVD0 0x0003FFFF +#define BF_PINCTRL_PULL1_RSRVD0(v) \ + (((v) << 0) & BM_PINCTRL_PULL1_RSRVD0) + +#define HW_PINCTRL_PULL2 (0x00000420) +#define HW_PINCTRL_PULL2_SET (0x00000424) +#define HW_PINCTRL_PULL2_CLR (0x00000428) +#define HW_PINCTRL_PULL2_TOG (0x0000042c) +#define HW_PINCTRL_PULL2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL2) +#define HW_PINCTRL_PULL2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL2_SET) +#define HW_PINCTRL_PULL2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL2_CLR) +#define HW_PINCTRL_PULL2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL2_TOG) + +#define BP_PINCTRL_PULL2_RSRVD2 29 +#define BM_PINCTRL_PULL2_RSRVD2 0xE0000000 +#define BF_PINCTRL_PULL2_RSRVD2(v) \ + (((v) << 29) & BM_PINCTRL_PULL2_RSRVD2) +#define BM_PINCTRL_PULL2_BANK2_PIN28 0x10000000 +#define BM_PINCTRL_PULL2_BANK2_PIN27 0x08000000 +#define BP_PINCTRL_PULL2_RSRVD1 9 +#define BM_PINCTRL_PULL2_RSRVD1 0x07FFFE00 +#define BF_PINCTRL_PULL2_RSRVD1(v) \ + (((v) << 9) & BM_PINCTRL_PULL2_RSRVD1) +#define BM_PINCTRL_PULL2_BANK2_PIN08 0x00000100 +#define BP_PINCTRL_PULL2_RSRVD0 6 +#define BM_PINCTRL_PULL2_RSRVD0 0x000000C0 +#define BF_PINCTRL_PULL2_RSRVD0(v) \ + (((v) << 6) & BM_PINCTRL_PULL2_RSRVD0) +#define BM_PINCTRL_PULL2_BANK2_PIN05 0x00000020 +#define BM_PINCTRL_PULL2_BANK2_PIN04 0x00000010 +#define BM_PINCTRL_PULL2_BANK2_PIN03 0x00000008 +#define BM_PINCTRL_PULL2_BANK2_PIN02 0x00000004 +#define BM_PINCTRL_PULL2_BANK2_PIN01 0x00000002 +#define BM_PINCTRL_PULL2_BANK2_PIN00 0x00000001 + +#define HW_PINCTRL_PULL3 (0x00000430) +#define HW_PINCTRL_PULL3_SET (0x00000434) +#define HW_PINCTRL_PULL3_CLR (0x00000438) +#define HW_PINCTRL_PULL3_TOG (0x0000043c) +#define HW_PINCTRL_PULL3_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL3) +#define HW_PINCTRL_PULL3_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL3_SET) +#define HW_PINCTRL_PULL3_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL3_CLR) +#define HW_PINCTRL_PULL3_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PULL3_TOG) + +#define BP_PINCTRL_PULL3_RSRVD0 18 +#define BM_PINCTRL_PULL3_RSRVD0 0xFFFC0000 +#define BF_PINCTRL_PULL3_RSRVD0(v) \ + (((v) << 18) & BM_PINCTRL_PULL3_RSRVD0) +#define BM_PINCTRL_PULL3_BANK3_PIN17 0x00020000 +#define BM_PINCTRL_PULL3_BANK3_PIN16 0x00010000 +#define BM_PINCTRL_PULL3_BANK3_PIN15 0x00008000 +#define BM_PINCTRL_PULL3_BANK3_PIN14 0x00004000 +#define BM_PINCTRL_PULL3_BANK3_PIN13 0x00002000 +#define BM_PINCTRL_PULL3_BANK3_PIN12 0x00001000 +#define BM_PINCTRL_PULL3_BANK3_PIN11 0x00000800 +#define BM_PINCTRL_PULL3_BANK3_PIN10 0x00000400 +#define BM_PINCTRL_PULL3_BANK3_PIN09 0x00000200 +#define BM_PINCTRL_PULL3_BANK3_PIN08 0x00000100 +#define BM_PINCTRL_PULL3_BANK3_PIN07 0x00000080 +#define BM_PINCTRL_PULL3_BANK3_PIN06 0x00000040 +#define BM_PINCTRL_PULL3_BANK3_PIN05 0x00000020 +#define BM_PINCTRL_PULL3_BANK3_PIN04 0x00000010 +#define BM_PINCTRL_PULL3_BANK3_PIN03 0x00000008 +#define BM_PINCTRL_PULL3_BANK3_PIN02 0x00000004 +#define BM_PINCTRL_PULL3_BANK3_PIN01 0x00000002 +#define BM_PINCTRL_PULL3_BANK3_PIN00 0x00000001 + +#define HW_PINCTRL_DOUT0 (0x00000500) +#define HW_PINCTRL_DOUT0_SET (0x00000504) +#define HW_PINCTRL_DOUT0_CLR (0x00000508) +#define HW_PINCTRL_DOUT0_TOG (0x0000050c) +#define HW_PINCTRL_DOUT0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT0) +#define HW_PINCTRL_DOUT0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT0_SET) +#define HW_PINCTRL_DOUT0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT0_CLR) +#define HW_PINCTRL_DOUT0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT0_TOG) + +#define BP_PINCTRL_DOUT0_DOUT 0 +#define BM_PINCTRL_DOUT0_DOUT 0xFFFFFFFF +#define BF_PINCTRL_DOUT0_DOUT(v) (v) + +#define HW_PINCTRL_DOUT1 (0x00000510) +#define HW_PINCTRL_DOUT1_SET (0x00000514) +#define HW_PINCTRL_DOUT1_CLR (0x00000518) +#define HW_PINCTRL_DOUT1_TOG (0x0000051c) +#define HW_PINCTRL_DOUT1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT1) +#define HW_PINCTRL_DOUT1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT1_SET) +#define HW_PINCTRL_DOUT1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT1_CLR) +#define HW_PINCTRL_DOUT1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT1_TOG) + +#define BM_PINCTRL_DOUT1_RSRVD1 0x80000000 +#define BP_PINCTRL_DOUT1_DOUT 0 +#define BM_PINCTRL_DOUT1_DOUT 0x7FFFFFFF +#define BF_PINCTRL_DOUT1_DOUT(v) \ + (((v) << 0) & BM_PINCTRL_DOUT1_DOUT) + +#define HW_PINCTRL_DOUT2 (0x00000520) +#define HW_PINCTRL_DOUT2_SET (0x00000524) +#define HW_PINCTRL_DOUT2_CLR (0x00000528) +#define HW_PINCTRL_DOUT2_TOG (0x0000052c) +#define HW_PINCTRL_DOUT2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT2) +#define HW_PINCTRL_DOUT2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT2_SET) +#define HW_PINCTRL_DOUT2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT2_CLR) +#define HW_PINCTRL_DOUT2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOUT2_TOG) + +#define BP_PINCTRL_DOUT2_DOUT 0 +#define BM_PINCTRL_DOUT2_DOUT 0xFFFFFFFF +#define BF_PINCTRL_DOUT2_DOUT(v) (v) + +#define HW_PINCTRL_DIN0 (0x00000600) +#define HW_PINCTRL_DIN0_SET (0x00000604) +#define HW_PINCTRL_DIN0_CLR (0x00000608) +#define HW_PINCTRL_DIN0_TOG (0x0000060c) +#define HW_PINCTRL_DIN0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN0) +#define HW_PINCTRL_DIN0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN0_SET) +#define HW_PINCTRL_DIN0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN0_CLR) +#define HW_PINCTRL_DIN0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN0_TOG) + +#define BP_PINCTRL_DIN0_DIN 0 +#define BM_PINCTRL_DIN0_DIN 0xFFFFFFFF +#define BF_PINCTRL_DIN0_DIN(v) (v) + +#define HW_PINCTRL_DIN1 (0x00000610) +#define HW_PINCTRL_DIN1_SET (0x00000614) +#define HW_PINCTRL_DIN1_CLR (0x00000618) +#define HW_PINCTRL_DIN1_TOG (0x0000061c) +#define HW_PINCTRL_DIN1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN1) +#define HW_PINCTRL_DIN1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN1_SET) +#define HW_PINCTRL_DIN1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN1_CLR) +#define HW_PINCTRL_DIN1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN1_TOG) + +#define BM_PINCTRL_DIN1_RSRVD1 0x80000000 +#define BP_PINCTRL_DIN1_DIN 0 +#define BM_PINCTRL_DIN1_DIN 0x7FFFFFFF +#define BF_PINCTRL_DIN1_DIN(v) \ + (((v) << 0) & BM_PINCTRL_DIN1_DIN) + +#define HW_PINCTRL_DIN2 (0x00000620) +#define HW_PINCTRL_DIN2_SET (0x00000624) +#define HW_PINCTRL_DIN2_CLR (0x00000628) +#define HW_PINCTRL_DIN2_TOG (0x0000062c) +#define HW_PINCTRL_DIN2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN2) +#define HW_PINCTRL_DIN2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN2_SET) +#define HW_PINCTRL_DIN2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN2_CLR) +#define HW_PINCTRL_DIN2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DIN2_TOG) + +#define BP_PINCTRL_DIN2_DIN 0 +#define BM_PINCTRL_DIN2_DIN 0xFFFFFFFF +#define BF_PINCTRL_DIN2_DIN(v) (v) + +#define HW_PINCTRL_DOE0 (0x00000700) +#define HW_PINCTRL_DOE0_SET (0x00000704) +#define HW_PINCTRL_DOE0_CLR (0x00000708) +#define HW_PINCTRL_DOE0_TOG (0x0000070c) +#define HW_PINCTRL_DOE0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE0) +#define HW_PINCTRL_DOE0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE0_SET) +#define HW_PINCTRL_DOE0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE0_CLR) +#define HW_PINCTRL_DOE0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE0_TOG) + +#define BP_PINCTRL_DOE0_DOE 0 +#define BM_PINCTRL_DOE0_DOE 0xFFFFFFFF +#define BF_PINCTRL_DOE0_DOE(v) (v) + +#define HW_PINCTRL_DOE1 (0x00000710) +#define HW_PINCTRL_DOE1_SET (0x00000714) +#define HW_PINCTRL_DOE1_CLR (0x00000718) +#define HW_PINCTRL_DOE1_TOG (0x0000071c) +#define HW_PINCTRL_DOE1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE1) +#define HW_PINCTRL_DOE1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE1_SET) +#define HW_PINCTRL_DOE1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE1_CLR) +#define HW_PINCTRL_DOE1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE1_TOG) + +#define BM_PINCTRL_DOE1_RSRVD1 0x80000000 +#define BP_PINCTRL_DOE1_DOE 0 +#define BM_PINCTRL_DOE1_DOE 0x7FFFFFFF +#define BF_PINCTRL_DOE1_DOE(v) \ + (((v) << 0) & BM_PINCTRL_DOE1_DOE) + +#define HW_PINCTRL_DOE2 (0x00000720) +#define HW_PINCTRL_DOE2_SET (0x00000724) +#define HW_PINCTRL_DOE2_CLR (0x00000728) +#define HW_PINCTRL_DOE2_TOG (0x0000072c) +#define HW_PINCTRL_DOE2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE2) +#define HW_PINCTRL_DOE2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE2_SET) +#define HW_PINCTRL_DOE2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE2_CLR) +#define HW_PINCTRL_DOE2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_DOE2_TOG) + +#define BP_PINCTRL_DOE2_DOE 0 +#define BM_PINCTRL_DOE2_DOE 0xFFFFFFFF +#define BF_PINCTRL_DOE2_DOE(v) (v) + +#define HW_PINCTRL_PIN2IRQ0 (0x00000800) +#define HW_PINCTRL_PIN2IRQ0_SET (0x00000804) +#define HW_PINCTRL_PIN2IRQ0_CLR (0x00000808) +#define HW_PINCTRL_PIN2IRQ0_TOG (0x0000080c) +#define HW_PINCTRL_PIN2IRQ0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ0) +#define HW_PINCTRL_PIN2IRQ0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ0_SET) +#define HW_PINCTRL_PIN2IRQ0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ0_CLR) +#define HW_PINCTRL_PIN2IRQ0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ0_TOG) + +#define BP_PINCTRL_PIN2IRQ0_PIN2IRQ 0 +#define BM_PINCTRL_PIN2IRQ0_PIN2IRQ 0xFFFFFFFF +#define BF_PINCTRL_PIN2IRQ0_PIN2IRQ(v) (v) + +#define HW_PINCTRL_PIN2IRQ1 (0x00000810) +#define HW_PINCTRL_PIN2IRQ1_SET (0x00000814) +#define HW_PINCTRL_PIN2IRQ1_CLR (0x00000818) +#define HW_PINCTRL_PIN2IRQ1_TOG (0x0000081c) +#define HW_PINCTRL_PIN2IRQ1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ1) +#define HW_PINCTRL_PIN2IRQ1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ1_SET) +#define HW_PINCTRL_PIN2IRQ1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ1_CLR) +#define HW_PINCTRL_PIN2IRQ1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ1_TOG) + +#define BM_PINCTRL_PIN2IRQ1_RSRVD1 0x80000000 +#define BP_PINCTRL_PIN2IRQ1_PIN2IRQ 0 +#define BM_PINCTRL_PIN2IRQ1_PIN2IRQ 0x7FFFFFFF +#define BF_PINCTRL_PIN2IRQ1_PIN2IRQ(v) \ + (((v) << 0) & BM_PINCTRL_PIN2IRQ1_PIN2IRQ) + +#define HW_PINCTRL_PIN2IRQ2 (0x00000820) +#define HW_PINCTRL_PIN2IRQ2_SET (0x00000824) +#define HW_PINCTRL_PIN2IRQ2_CLR (0x00000828) +#define HW_PINCTRL_PIN2IRQ2_TOG (0x0000082c) +#define HW_PINCTRL_PIN2IRQ2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ2) +#define HW_PINCTRL_PIN2IRQ2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ2_SET) +#define HW_PINCTRL_PIN2IRQ2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ2_CLR) +#define HW_PINCTRL_PIN2IRQ2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_PIN2IRQ2_TOG) + +#define BP_PINCTRL_PIN2IRQ2_PIN2IRQ 0 +#define BM_PINCTRL_PIN2IRQ2_PIN2IRQ 0xFFFFFFFF +#define BF_PINCTRL_PIN2IRQ2_PIN2IRQ(v) (v) + +#define HW_PINCTRL_IRQEN0 (0x00000900) +#define HW_PINCTRL_IRQEN0_SET (0x00000904) +#define HW_PINCTRL_IRQEN0_CLR (0x00000908) +#define HW_PINCTRL_IRQEN0_TOG (0x0000090c) +#define HW_PINCTRL_IRQEN0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN0) +#define HW_PINCTRL_IRQEN0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN0_SET) +#define HW_PINCTRL_IRQEN0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN0_CLR) +#define HW_PINCTRL_IRQEN0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN0_TOG) + +#define BP_PINCTRL_IRQEN0_IRQEN 0 +#define BM_PINCTRL_IRQEN0_IRQEN 0xFFFFFFFF +#define BF_PINCTRL_IRQEN0_IRQEN(v) (v) + +#define HW_PINCTRL_IRQEN1 (0x00000910) +#define HW_PINCTRL_IRQEN1_SET (0x00000914) +#define HW_PINCTRL_IRQEN1_CLR (0x00000918) +#define HW_PINCTRL_IRQEN1_TOG (0x0000091c) +#define HW_PINCTRL_IRQEN1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN1) +#define HW_PINCTRL_IRQEN1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN1_SET) +#define HW_PINCTRL_IRQEN1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN1_CLR) +#define HW_PINCTRL_IRQEN1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN1_TOG) + +#define BM_PINCTRL_IRQEN1_RSRVD1 0x80000000 +#define BP_PINCTRL_IRQEN1_IRQEN 0 +#define BM_PINCTRL_IRQEN1_IRQEN 0x7FFFFFFF +#define BF_PINCTRL_IRQEN1_IRQEN(v) \ + (((v) << 0) & BM_PINCTRL_IRQEN1_IRQEN) + +#define HW_PINCTRL_IRQEN2 (0x00000920) +#define HW_PINCTRL_IRQEN2_SET (0x00000924) +#define HW_PINCTRL_IRQEN2_CLR (0x00000928) +#define HW_PINCTRL_IRQEN2_TOG (0x0000092c) +#define HW_PINCTRL_IRQEN2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN2) +#define HW_PINCTRL_IRQEN2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN2_SET) +#define HW_PINCTRL_IRQEN2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN2_CLR) +#define HW_PINCTRL_IRQEN2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQEN2_TOG) + +#define BP_PINCTRL_IRQEN2_IRQEN 0 +#define BM_PINCTRL_IRQEN2_IRQEN 0xFFFFFFFF +#define BF_PINCTRL_IRQEN2_IRQEN(v) (v) + +#define HW_PINCTRL_IRQLEVEL0 (0x00000a00) +#define HW_PINCTRL_IRQLEVEL0_SET (0x00000a04) +#define HW_PINCTRL_IRQLEVEL0_CLR (0x00000a08) +#define HW_PINCTRL_IRQLEVEL0_TOG (0x00000a0c) +#define HW_PINCTRL_IRQLEVEL0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL0) +#define HW_PINCTRL_IRQLEVEL0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL0_SET) +#define HW_PINCTRL_IRQLEVEL0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL0_CLR) +#define HW_PINCTRL_IRQLEVEL0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL0_TOG) + +#define BP_PINCTRL_IRQLEVEL0_IRQLEVEL 0 +#define BM_PINCTRL_IRQLEVEL0_IRQLEVEL 0xFFFFFFFF +#define BF_PINCTRL_IRQLEVEL0_IRQLEVEL(v) (v) + +#define HW_PINCTRL_IRQLEVEL1 (0x00000a10) +#define HW_PINCTRL_IRQLEVEL1_SET (0x00000a14) +#define HW_PINCTRL_IRQLEVEL1_CLR (0x00000a18) +#define HW_PINCTRL_IRQLEVEL1_TOG (0x00000a1c) +#define HW_PINCTRL_IRQLEVEL1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL1) +#define HW_PINCTRL_IRQLEVEL1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL1_SET) +#define HW_PINCTRL_IRQLEVEL1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL1_CLR) +#define HW_PINCTRL_IRQLEVEL1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL1_TOG) + +#define BM_PINCTRL_IRQLEVEL1_RSRVD1 0x80000000 +#define BP_PINCTRL_IRQLEVEL1_IRQLEVEL 0 +#define BM_PINCTRL_IRQLEVEL1_IRQLEVEL 0x7FFFFFFF +#define BF_PINCTRL_IRQLEVEL1_IRQLEVEL(v) \ + (((v) << 0) & BM_PINCTRL_IRQLEVEL1_IRQLEVEL) + +#define HW_PINCTRL_IRQLEVEL2 (0x00000a20) +#define HW_PINCTRL_IRQLEVEL2_SET (0x00000a24) +#define HW_PINCTRL_IRQLEVEL2_CLR (0x00000a28) +#define HW_PINCTRL_IRQLEVEL2_TOG (0x00000a2c) +#define HW_PINCTRL_IRQLEVEL2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL2) +#define HW_PINCTRL_IRQLEVEL2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL2_SET) +#define HW_PINCTRL_IRQLEVEL2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL2_CLR) +#define HW_PINCTRL_IRQLEVEL2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQLEVEL2_TOG) + +#define BP_PINCTRL_IRQLEVEL2_IRQLEVEL 0 +#define BM_PINCTRL_IRQLEVEL2_IRQLEVEL 0xFFFFFFFF +#define BF_PINCTRL_IRQLEVEL2_IRQLEVEL(v) (v) + +#define HW_PINCTRL_IRQPOL0 (0x00000b00) +#define HW_PINCTRL_IRQPOL0_SET (0x00000b04) +#define HW_PINCTRL_IRQPOL0_CLR (0x00000b08) +#define HW_PINCTRL_IRQPOL0_TOG (0x00000b0c) +#define HW_PINCTRL_IRQPOL0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL0) +#define HW_PINCTRL_IRQPOL0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL0_SET) +#define HW_PINCTRL_IRQPOL0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL0_CLR) +#define HW_PINCTRL_IRQPOL0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL0_TOG) + +#define BP_PINCTRL_IRQPOL0_IRQPOL 0 +#define BM_PINCTRL_IRQPOL0_IRQPOL 0xFFFFFFFF +#define BF_PINCTRL_IRQPOL0_IRQPOL(v) (v) + +#define HW_PINCTRL_IRQPOL1 (0x00000b10) +#define HW_PINCTRL_IRQPOL1_SET (0x00000b14) +#define HW_PINCTRL_IRQPOL1_CLR (0x00000b18) +#define HW_PINCTRL_IRQPOL1_TOG (0x00000b1c) +#define HW_PINCTRL_IRQPOL1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL1) +#define HW_PINCTRL_IRQPOL1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL1_SET) +#define HW_PINCTRL_IRQPOL1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL1_CLR) +#define HW_PINCTRL_IRQPOL1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL1_TOG) + +#define BM_PINCTRL_IRQPOL1_RSRVD1 0x80000000 +#define BP_PINCTRL_IRQPOL1_IRQPOL 0 +#define BM_PINCTRL_IRQPOL1_IRQPOL 0x7FFFFFFF +#define BF_PINCTRL_IRQPOL1_IRQPOL(v) \ + (((v) << 0) & BM_PINCTRL_IRQPOL1_IRQPOL) + +#define HW_PINCTRL_IRQPOL2 (0x00000b20) +#define HW_PINCTRL_IRQPOL2_SET (0x00000b24) +#define HW_PINCTRL_IRQPOL2_CLR (0x00000b28) +#define HW_PINCTRL_IRQPOL2_TOG (0x00000b2c) +#define HW_PINCTRL_IRQPOL2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL2) +#define HW_PINCTRL_IRQPOL2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL2_SET) +#define HW_PINCTRL_IRQPOL2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL2_CLR) +#define HW_PINCTRL_IRQPOL2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQPOL2_TOG) + +#define BP_PINCTRL_IRQPOL2_IRQPOL 0 +#define BM_PINCTRL_IRQPOL2_IRQPOL 0xFFFFFFFF +#define BF_PINCTRL_IRQPOL2_IRQPOL(v) (v) + +#define HW_PINCTRL_IRQSTAT0 (0x00000c00) +#define HW_PINCTRL_IRQSTAT0_SET (0x00000c04) +#define HW_PINCTRL_IRQSTAT0_CLR (0x00000c08) +#define HW_PINCTRL_IRQSTAT0_TOG (0x00000c0c) +#define HW_PINCTRL_IRQSTAT0_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT0) +#define HW_PINCTRL_IRQSTAT0_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT0_SET) +#define HW_PINCTRL_IRQSTAT0_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT0_CLR) +#define HW_PINCTRL_IRQSTAT0_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT0_TOG) + +#define BP_PINCTRL_IRQSTAT0_IRQSTAT 0 +#define BM_PINCTRL_IRQSTAT0_IRQSTAT 0xFFFFFFFF +#define BF_PINCTRL_IRQSTAT0_IRQSTAT(v) (v) + +#define HW_PINCTRL_IRQSTAT1 (0x00000c10) +#define HW_PINCTRL_IRQSTAT1_SET (0x00000c14) +#define HW_PINCTRL_IRQSTAT1_CLR (0x00000c18) +#define HW_PINCTRL_IRQSTAT1_TOG (0x00000c1c) +#define HW_PINCTRL_IRQSTAT1_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT1) +#define HW_PINCTRL_IRQSTAT1_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT1_SET) +#define HW_PINCTRL_IRQSTAT1_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT1_CLR) +#define HW_PINCTRL_IRQSTAT1_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT1_TOG) + +#define BM_PINCTRL_IRQSTAT1_RSRVD1 0x80000000 +#define BP_PINCTRL_IRQSTAT1_IRQSTAT 0 +#define BM_PINCTRL_IRQSTAT1_IRQSTAT 0x7FFFFFFF +#define BF_PINCTRL_IRQSTAT1_IRQSTAT(v) \ + (((v) << 0) & BM_PINCTRL_IRQSTAT1_IRQSTAT) + +#define HW_PINCTRL_IRQSTAT2 (0x00000c20) +#define HW_PINCTRL_IRQSTAT2_SET (0x00000c24) +#define HW_PINCTRL_IRQSTAT2_CLR (0x00000c28) +#define HW_PINCTRL_IRQSTAT2_TOG (0x00000c2c) +#define HW_PINCTRL_IRQSTAT2_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT2) +#define HW_PINCTRL_IRQSTAT2_SET_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT2_SET) +#define HW_PINCTRL_IRQSTAT2_CLR_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT2_CLR) +#define HW_PINCTRL_IRQSTAT2_TOG_ADDR \ + (REGS_PINCTRL_BASE + HW_PINCTRL_IRQSTAT2_TOG) -#endif +#define BP_PINCTRL_IRQSTAT2_IRQSTAT 0 +#define BM_PINCTRL_IRQSTAT2_IRQSTAT 0xFFFFFFFF +#define BF_PINCTRL_IRQSTAT2_IRQSTAT(v) (v) +#endif /* __ARCH_ARM___PINCTRL_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-sydma.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-sydma.h @@ -1,7 +1,7 @@ /* - * stmp378x: SYDMA register definitions + * STMP SYDMA Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,7 +17,157 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_SYDMA_BASE (STMP3XXX_REGS_BASE + 0x26000) -#define REGS_SYDMA_PHYS 0x80026000 -#define REGS_SYDMA_SIZE 0x2000 + +#ifndef __ARCH_ARM___SYDMA_H +#define __ARCH_ARM___SYDMA_H 1 + +#define REGS_SYDMA_BASE (STMP3XXX_REGS_BASE + 0x26000) +#define REGS_SYDMA_PHYS (0x80026000) +#define REGS_SYDMA_SIZE 0x00002000 + +#define HW_SYDMA_CTRL (0x00000000) +#define HW_SYDMA_CTRL_SET (0x00000004) +#define HW_SYDMA_CTRL_CLR (0x00000008) +#define HW_SYDMA_CTRL_TOG (0x0000000c) +#define HW_SYDMA_CTRL_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_CTRL) +#define HW_SYDMA_CTRL_SET_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_CTRL_SET) +#define HW_SYDMA_CTRL_CLR_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_CTRL_CLR) +#define HW_SYDMA_CTRL_TOG_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_CTRL_TOG) + +#define BM_SYDMA_CTRL_SFTRST 0x80000000 +#define BV_SYDMA_CTRL_SFTRST__RUN 0x0 +#define BV_SYDMA_CTRL_SFTRST__RESET 0x1 +#define BM_SYDMA_CTRL_CLKGATE 0x40000000 +#define BV_SYDMA_CTRL_CLKGATE__RUN 0x0 +#define BV_SYDMA_CTRL_CLKGATE__NO_CLKS 0x1 +#define BP_SYDMA_CTRL_RSVD1 10 +#define BM_SYDMA_CTRL_RSVD1 0x3FFFFC00 +#define BF_SYDMA_CTRL_RSVD1(v) \ + (((v) << 10) & BM_SYDMA_CTRL_RSVD1) +#define BM_SYDMA_CTRL_COMPLETE_IRQ_EN 0x00000200 +#define BV_SYDMA_CTRL_COMPLETE_IRQ_EN__DISABLED 0x0 +#define BV_SYDMA_CTRL_COMPLETE_IRQ_EN__ENABLED 0x1 +#define BP_SYDMA_CTRL_RSVD0 3 +#define BM_SYDMA_CTRL_RSVD0 0x000001F8 +#define BF_SYDMA_CTRL_RSVD0(v) \ + (((v) << 3) & BM_SYDMA_CTRL_RSVD0) +#define BM_SYDMA_CTRL_ERROR_IRQ 0x00000004 +#define BM_SYDMA_CTRL_COMPLETE_IRQ 0x00000002 +#define BM_SYDMA_CTRL_RUN 0x00000001 +#define BV_SYDMA_CTRL_RUN__HALT 0x0 +#define BV_SYDMA_CTRL_RUN__RUN 0x1 + +#define HW_SYDMA_RADDR (0x00000010) +#define HW_SYDMA_RADDR_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_RADDR) + +#define BP_SYDMA_RADDR_RSRC_ADDR 0 +#define BM_SYDMA_RADDR_RSRC_ADDR 0xFFFFFFFF +#define BF_SYDMA_RADDR_RSRC_ADDR(v) (v) + +#define HW_SYDMA_WADDR (0x00000020) +#define HW_SYDMA_WADDR_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_WADDR) + +#define BP_SYDMA_WADDR_WSRC_ADDR 0 +#define BM_SYDMA_WADDR_WSRC_ADDR 0xFFFFFFFF +#define BF_SYDMA_WADDR_WSRC_ADDR(v) (v) + +#define HW_SYDMA_XFER_COUNT (0x00000030) +#define HW_SYDMA_XFER_COUNT_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_XFER_COUNT) + +#define BP_SYDMA_XFER_COUNT_SIZE 0 +#define BM_SYDMA_XFER_COUNT_SIZE 0xFFFFFFFF +#define BF_SYDMA_XFER_COUNT_SIZE(v) (v) + +#define HW_SYDMA_BURST (0x00000040) +#define HW_SYDMA_BURST_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_BURST) + +#define BP_SYDMA_BURST_RSVD0 4 +#define BM_SYDMA_BURST_RSVD0 0xFFFFFFF0 +#define BF_SYDMA_BURST_RSVD0(v) \ + (((v) << 4) & BM_SYDMA_BURST_RSVD0) +#define BP_SYDMA_BURST_WLEN 2 +#define BM_SYDMA_BURST_WLEN 0x0000000C +#define BF_SYDMA_BURST_WLEN(v) \ + (((v) << 2) & BM_SYDMA_BURST_WLEN) +#define BV_SYDMA_BURST_WLEN__1 0x0 +#define BV_SYDMA_BURST_WLEN__2 0x1 +#define BV_SYDMA_BURST_WLEN__4 0x2 +#define BV_SYDMA_BURST_WLEN__8 0x3 +#define BP_SYDMA_BURST_RLEN 0 +#define BM_SYDMA_BURST_RLEN 0x00000003 +#define BF_SYDMA_BURST_RLEN(v) \ + (((v) << 0) & BM_SYDMA_BURST_RLEN) +#define BV_SYDMA_BURST_RLEN__1 0x0 +#define BV_SYDMA_BURST_RLEN__2 0x1 +#define BV_SYDMA_BURST_RLEN__4 0x2 +#define BV_SYDMA_BURST_RLEN__8 0x3 + +#define HW_SYDMA_DACK (0x00000050) +#define HW_SYDMA_DACK_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_DACK) + +#define BP_SYDMA_DACK_RSVD0 8 +#define BM_SYDMA_DACK_RSVD0 0xFFFFFF00 +#define BF_SYDMA_DACK_RSVD0(v) \ + (((v) << 8) & BM_SYDMA_DACK_RSVD0) +#define BP_SYDMA_DACK_WDELAY 4 +#define BM_SYDMA_DACK_WDELAY 0x000000F0 +#define BF_SYDMA_DACK_WDELAY(v) \ + (((v) << 4) & BM_SYDMA_DACK_WDELAY) +#define BP_SYDMA_DACK_RDELAY 0 +#define BM_SYDMA_DACK_RDELAY 0x0000000F +#define BF_SYDMA_DACK_RDELAY(v) \ + (((v) << 0) & BM_SYDMA_DACK_RDELAY) + +#define HW_SYDMA_DEBUG0 (0x00000100) +#define HW_SYDMA_DEBUG0_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_DEBUG0) + +#define BP_SYDMA_DEBUG0_DATA 0 +#define BM_SYDMA_DEBUG0_DATA 0xFFFFFFFF +#define BF_SYDMA_DEBUG0_DATA(v) (v) + +#define HW_SYDMA_DEBUG1 (0x00000110) +#define HW_SYDMA_DEBUG1_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_DEBUG1) + +#define BP_SYDMA_DEBUG1_DATA 0 +#define BM_SYDMA_DEBUG1_DATA 0xFFFFFFFF +#define BF_SYDMA_DEBUG1_DATA(v) (v) + +#define HW_SYDMA_DEBUG2 (0x00000120) +#define HW_SYDMA_DEBUG2_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_DEBUG2) + +#define BP_SYDMA_DEBUG2_DATA 0 +#define BM_SYDMA_DEBUG2_DATA 0xFFFFFFFF +#define BF_SYDMA_DEBUG2_DATA(v) (v) + +#define HW_SYDMA_VERSION (0x00000130) +#define HW_SYDMA_VERSION_ADDR \ + (REGS_SYDMA_BASE + HW_SYDMA_VERSION) + +#define BP_SYDMA_VERSION_MAJOR 24 +#define BM_SYDMA_VERSION_MAJOR 0xFF000000 +#define BF_SYDMA_VERSION_MAJOR(v) \ + (((v) << 24) & BM_SYDMA_VERSION_MAJOR) +#define BP_SYDMA_VERSION_MINOR 16 +#define BM_SYDMA_VERSION_MINOR 0x00FF0000 +#define BF_SYDMA_VERSION_MINOR(v) \ + (((v) << 16) & BM_SYDMA_VERSION_MINOR) +#define BP_SYDMA_VERSION_STEP 0 +#define BM_SYDMA_VERSION_STEP 0x0000FFFF +#define BF_SYDMA_VERSION_STEP(v) \ + (((v) << 0) & BM_SYDMA_VERSION_STEP) +#endif /* __ARCH_ARM___SYDMA_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/ddi_bc.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/ddi_bc.h @@ -0,0 +1,736 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +//////////////////////////////////////////////////////////////////////////////// +//! \addtogroup ddi_bc +//! @{ +// +// Copyright (c) 2004-2005 SigmaTel, Inc. +// +//! \file ddi_bc.h +//! \brief Header file for the Battery Charger device driver. +//! \date 06/2005 +//! +//! This file contains externally visible declarations for the Battery Charger +//! device driver. +//! +//! \see ddi_bc.c and related files. +//! \todo [PUBS] Add definitions for TBDs in this file. +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _DDI_BC_H +#define _DDI_BC_H + +#include + +//////////////////////////////////////////////////////////////////////////////// +// Includes +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +// Definitions +//////////////////////////////////////////////////////////////////////////////// +#define DDI_BC_MAX_RESTART_CYCLES 100 + +#define DDI_BC_LIION_CHARGING_VOLTAGE 4200 +#define DDI_BC_ALKALINE_NIMH_CHARGING_VOLTAGE 1750 + +//! \brief Defines battery charger states. +typedef enum _ddi_bc_State { + //! \brief TBD + DDI_BC_STATE_UNINITIALIZED = 0, + //! \brief TBD + DDI_BC_STATE_BROKEN = 1, + //! \brief TBD + DDI_BC_STATE_DISABLED = 2, + //! \brief TBD + DDI_BC_STATE_WAITING_TO_CHARGE = 3, + //! \brief TBD + DDI_BC_STATE_CONDITIONING = 4, + //! \brief TBD + DDI_BC_STATE_CHARGING = 5, + //! \brief TBD + DDI_BC_STATE_TOPPING_OFF = 6, + //! \brief TBD + DDI_BC_STATE_DCDC_MODE_WAITING_TO_CHARGE = 7, + +} ddi_bc_State_t; + +typedef enum _ddi_bc_BrokenReason { + //! \brief TBD + DDI_BC_BROKEN_UNINITIALIZED = 0, + //! \brief TBD + DDI_BC_BROKEN_CHARGING_TIMEOUT = 1, + //! \brief TBD + DDI_BC_BROKEN_FORCED_BY_APPLICATION = 2, + //! \brief TBD + DDI_BC_BROKEN_EXTERNAL_BATTERY_VOLTAGE_DETECTED = 3, + //! \brief TBD + DDI_BC_BROKEN_NO_BATTERY_DETECTED = 4, + +} ddi_bc_BrokenReason_t; + +//! \brief Defines the battery charger configuration. +typedef struct _ddi_bc_Cfg { + //! \brief Units in milliseconds. + //! + //! This field configures the expected period between calls to + //! ddi_bc_StateMachine. If die temperature monitoring is + //! enabled, then the data sheet recommends the period be around + //! 100ms or less. + //! + //! Note that this period defines the minimum time resolution of + //! the battery charger. + + uint32_t u32StateMachinePeriod; + + //! \brief Units in mA/s. + //! + //! This field configures the slope of the current ramp. Any + //! time the battery charger increases its current draw, it will + //! ramp up the current no faster than this rate. + //! + //! Note that the minimum time resolution of the battery charger + //! is the configured period between calls to advance the state + //! machine. Also, the hardware has a minimum current resolution + //! of 10mA. If the given ramp slope cannot be expressed + //! exactly, then the largest expressible smaller slope will be + //! the result. If the actual period between calls to + //! ddi_bc_StateMachine is irregular, the current may ramp faster + //! than indicated. + + uint16_t u16CurrentRampSlope; + + //! \brief Units in millivolts. + //! + //! This field configures the threshold conditioning voltage. If + //! the battery’s voltage is below this value, it will be + //! conditioned until its voltage rises above the maximum + //! conditioning voltage. After that, the battery will be + //! charged normally. + //! + //! Note that the hardware has a minimum resolution of 8mV. If + //! the given voltage cannot be expressed exactly, then the + //! smallest expressible larger value will be used. + + uint16_t u16ConditioningThresholdVoltage; + + //! \brief Units in millivolts. + //! + //! This field configures the maximum conditioning voltage. If + //! the battery charger is conditioning a battery, normal + //! charging begins when the voltage rises above this value. + //! + //! This value should be slightly higher than the threshold + //! conditioning voltage because it is measured while a + //! conditioning current is actually flowing to the battery. + //! With a conditioning current of 0.1C, reasonable values for + //! the threshold and maximum conditioning voltages are 2.9V + //! and 3.0V respectively. + //! + //! Note that the hardware has a minimum resolution of 8mV. If + //! the given voltage cannot be expressed exactly, then the + //! smallest expressible larger value will be used. + + uint16_t u16ConditioningMaxVoltage; + + //! \brief Units in milliamps. + //! + //! This field configures the maximum conditioning current. + //! This is the maximum current that will be offered to a + //! battery while it is being conditioned. A typical value is + //! 0.1C. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ConditioningCurrent; + + //! \brief Units in milliseconds. + //! + //! This field configures the conditioning time-out. This is + //! the maximum amount of time that a battery will be + //! conditioned before the battery charger declares it to be + //! broken. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32ConditioningTimeout; + + //! \brief Units in millivolts. + //! + //! This field configures the final charging voltage. At this + //! writing, only two values are permitted: 4100 or 4200. + + uint16_t u16ChargingVoltage; + + //! \brief Units in milliamps. + //! + //! This field configures the maximum current offered to a + //! charging battery. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ChargingCurrent; + + //! \brief Units in milliamps. + //! + //! This field configures the current flow below which a + //! charging battery is regarded as fully charged (typical + //! 0.1C). At this point, the battery will be topped off. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + + uint16_t u16ChargingThresholdCurrent; + + //! \brief Units in milliamps. + //! + //! When charging while the DCDC converter's are enabled, the charger + //! is suppling current to both the battery and the Vbat input of the + //! DCDC converter. Once the total battery charger current falls + //! below this level, the charger will then stop charging until the + //! the battery voltage reaches the BC_LOW_DCDCMODE_BATTERY_VOLTAGE + //! threshold or until the DCDCs are no longer enabled. + //! + //! Typically, this value should be left at 180 to avoid the risk + //! of topping off the battery too long in DCDC mode and avoid + //! exceeding the BC_CHARGING_TIMEOUT time which would put the charger + //! driver in the broken state and completely disable charging. + //! + //! Note that the hardware has a minimum resolution of 10mA + //! (see the data sheet for details). If the given current + //! cannot be expressed exactly, then the largest expressible + //! smaller value will be used. + uint16_t u16DdcdModeChargingThresholdCurrent; + + //! \brief Units in milliseconds. + //! + //! This field configures the charging time-out. This is the + //! maximum amount of time that a battery will be charged + //! before the battery charger declares it to be broken. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32ChargingTimeout; + + //! \brief Units in milliseconds. + //! + //! This field configures the top-off period. This is the + //! amount of time a battery will be held in the Topping Off + //! state before it is declared fully charged. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + + uint32_t u32TopOffPeriod; + + //! \brief Units in milliseconds. + //! + //! This field configures the top-off period when the DCDC + //! converters are enabled. To avoid topping off the LiIon + //! battery too long and reducing it's long term capacity, + //! This time should be kept failry short. + //! + //! Note that the minimum time resolution of the battery + //! charger is the configured period between calls to advance + //! the state machine. If the given time-out cannot be + //! expressed exactly, then the shortest expressible longer + //! value will be used. + uint32_t u32DcdcModeTopOffPeriod; + + //! \brief Causes the battery charger to use an externally generated bias current + //! + //! If cleared, this causes the battery charger to use an + //! externally generated bias current, which is expected to be + //! quite precise. Otherwise, the battery charger will + //! generate a lesser-quality bias current internally. + + uint8_t useInternalBias:1; + + //! \brief Indicates that the battery charger is to monitor the die temperature. + //! + //! If set, this field indicates that the battery charger is to + //! monitor the die temperature. See below for fields that + //! configure the details. + + uint8_t monitorDieTemp:1; + + //! \brief Indicates that the battery charger is to monitor the battery temperature. + //! + //! If set, this field indicates that the battery charger is to + //! monitor the battery temperature. See below for fields that + //! configure the details. + + uint8_t monitorBatteryTemp:1; + + //! \brief Units in degrees centigrade. + //! + //! Note that the hardware reports die temperature in ranges of + //! 10 degree resolution minimum (see the data sheet for + //! details). If the battery charger is monitoring the die + //! temperature, and it rises to a range that includes a + //! temperature greater than or equal to this value, the + //! charging current will be clamped to the safe current. + + int8_t u8DieTempHigh; + + //! \brief Units in degrees centigrade. + //! + //! Note that the hardware reports die temperature in ranges of + //! 10 degrees minimum (see the data sheet for details). If the + //! charging current is being clamped because of a high die + //! temperature, and it falls to a range that doesn’t include a + //! temperatures greater than or equal to this value, the + //! charging current clamp will be released. + + int8_t u8DieTempLow; + + //! \brief Units in milliamps. + //! + //! If the battery charger detects a high die temperature, it + //! will clamp the charging current at or below this value. + + uint16_t u16DieTempSafeCurrent; + + //! \brief If the battery charger is monitoring the battery + //! temperature, this field indicates the LRADC channel to + //! read. + + uint8_t u8BatteryTempChannel; + + //! \brief If the battery charger is monitoring the battery + //! temperature, and it rises to a measurement greater than or + //! equal to this value, the charging current will be clamped + //! to the corresponding safe current. + + uint16_t u16BatteryTempHigh; + + //! \brief If the charging current is being clamped because of a high + //! battery temperature, and it falls below this value, the + //! charging current clamp will be released. + + uint16_t u16BatteryTempLow; + + //! \brief Units in milliamps. + //! + //! If the battery charger detects a high battery temperature, + //! it will clamp the charging current at or below this value. + + uint16_t u16BatteryTempSafeCurrent; + + //! \brief Units in millivolts. + //! + //! In the WaitingToCharge state, if we are in DCDC + //! operating modes, if the battery voltage measurement + //! is below this value, we immediately proceed with charging. + //! the low criteria for this value is that it must be high + //! to not risk the battery voltage getting too low. The + //! upper criteria is that you do not want the IR voltage + //! drop under heavy loads to make you start charging too soon + //! because the goal in DCDC operating mode is to not be constantly + //! topping off the battery which can shorten its life + + uint16_t u16LowDcdcBatteryVoltage_mv; + + uint32_t u32StateMachineNonChargingPeriod; +} ddi_bc_Cfg_t; + +//! Status returned by Battery Charger functions. + +typedef enum _ddi_bc_Status { + //! \brief TBD + DDI_BC_STATUS_SUCCESS = 0, + //! \brief TBD + DDI_BC_STATUS_HARDWARE_DISABLED, + //! \brief TBD + DDI_BC_STATUS_BAD_BATTERY_MODE, + //! \brief TBD + DDI_BC_STATUS_CLOCK_GATE_CLOSED, + //! \brief TBD + DDI_BC_STATUS_NOT_INITIALIZED, + //! \brief TBD + DDI_BC_STATUS_ALREADY_INITIALIZED, + //! \brief TBD + DDI_BC_STATUS_BROKEN, + //! \brief TBD + DDI_BC_STATUS_NOT_BROKEN, + //! \brief TBD + DDI_BC_STATUS_NOT_DISABLED, + //! \brief TBD + DDI_BC_STATUS_BAD_ARGUMENT, + //! \brief TBD + DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL, + //! \brief TBD + DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE, +} ddi_bc_Status_t; + +///////////////////////////////////////////////////////////////////////////////// +// BCM Event Codes +// +// These are the codes that might be published to PMI Subscribers. +///////////////////////////////////////////////////////////////////////////////// + +#define DDI_BC_EVENT_GROUP (11<<10) + +//! \brief TBD +//! \todo [PUBS] Add definition(s)... +typedef enum { + // Use the error code group value to make events unique for the EOI + //! \brief TBD + ddi_bc_MinEventCode = DDI_BC_EVENT_GROUP, + //! \brief TBD + ddi_bc_WaitingToChargeCode, + //! \brief TBD + ddi_bc_State_ConditioningCode, + //! \brief TBD + ddi_bc_State_Topping_OffCode, + //! \brief TBD + ddi_bc_State_BrokenCode, + //! \brief TBD + ddi_bc_SettingChargeCode, + //! \brief TBD + ddi_bc_RaisingDieTempAlarmCode, + //! \brief TBD + ddi_bc_DroppingDieTempAlarmCode, + + //! \brief TBD + ddi_bc_MaxEventCode, + //! \brief TBD + ddi_bc_DcdcModeWaitingToChargeCode +} ddi_bc_Event_t; + +//////////////////////////////////////////////////////////////////////////////// +// Prototypes +//////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////// +//! \brief Initialize the Battery Charger. +//! +//! \fntype Function +//! +//! This function initializes the Battery Charger. +//! +//! \param[in] pCfg A pointer to the new configuration. +//! +//! \retval DDI_BC_STATUS_SUCCESS +//! If the operation succeeded. +//! \retval DDI_BC_STATUS_ALREADY_INITIALIZED +//! If the Battery Charger is already initialized. +//! \retval DDI_BC_STATUS_HARDWARE_DISABLED +//! If the Battery Charger hardware is disabled by a laser fuse. +//! \retval DDI_BC_STATUS_BAD_BATTERY_MODE +//! If the power supply is set up for a non-rechargeable battery. +//! \retval DDI_BC_STATUS_CLOCK_GATE_CLOSED +//! If the clock gate for the power supply registers is closed. +//! \retval DDI_BC_STATUS_CFG_BAD_CHARGING_VOLTAGE +//! If the charging voltage is not either 4100 or 4200. +//! \retval DDI_BC_STATUS_CFG_BAD_BATTERY_TEMP_CHANNEL +//! If the LRADC channel number for monitoring battery temperature +//! is bad. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_init.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_Init(ddi_bc_Cfg_t * pCfg); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the Battery Charger configuration. +//! +//! \fntype Function +//! +//! This function reports the Battery Charger configuration. +//! +//! Note that, if the Battery Charger has not yet been initialized, the data +//! returned by this function is unknown. +//! +//! \param[in,out] pCfg A pointer to a structure that will receive the data. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern void ddi_bc_QueryCfg(ddi_bc_Cfg_t * pCfg); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Shut down the Battery Charger. +//! +//! \fntype Function +//! +//! This function immediately shuts down the Battery Charger hardware and +//! returns the state machine to the Uninitialized state. Use this function to +//! safely “mummify” the battery charger before retiring it from memory. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern void ddi_bc_ShutDown(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Advances the state machine. +//! +//! \fntype Function +//! +//! This function advances the state machine. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_BROKEN If the battery violated a time-out +//! and has been declared broken. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_StateMachine(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Get the Battery Charger's current state. +//! +//! \fntype Function +//! +//! This function returns the current state. +//! +//! \retval The current state. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_State_t ddi_bc_GetState(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Disable the Battery Charger. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetDisable(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Enable the Battery Charger. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Disabled state, this function moves it to +//! the Waiting to Charge state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_DISABLED If the Battery Charger is not +//! disabled. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetEnable(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be broken. +//! +//! \fntype Function +//! +//! This function forces the Battery Charger into the Broken state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetBroken(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Declare the battery to be fixed. +//! +//! \fntype Function +//! +//! If the Battery Charger is in the Broken state, this function moves it to +//! the Disabled state. +//! +//! \retval DDI_BC_STATUS_SUCCESS If all goes well +//! \retval DDI_BC_STATUS_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! \retval DDI_BC_STATUS_NOT_BROKEN If the Battery Charger is not broken. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetFixed(void); +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current limit. +//! +//! \fntype Function +//! +//! This function applies a limit to the current that the Battery Charger can +//! draw. +//! +//! \param[in] u16Limit The maximum current the Battery Charger can draw +//! (in mA). +//! +//! \retval The expressible version of the limit. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_SetCurrentLimit(uint16_t u16Limit); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current limit. +//! +//! \fntype Function +//! +//! This function reports the limit to the current that the Battery Charger can +//! draw. +//! +//! \retval The current limit. +//! +//! \internal +//! \see To view the function definition, see ddi_bc_api.c. +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_GetCurrentLimit(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the current threshold. +//! +//! \fntype Function +//! +//! +//! \param[in] u16Current Current threshold where charger deactivates (in mA). +//! +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint16_t ddi_bc_SetCurrentThreshold(uint16_t u16Current); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Set the battery charger state machine period. +//! +//! \fntype Function +//! +//! This function sets a new state machine period. The Period and Slope should +//! be coordinated to achieve the minimal ramp step current which will minimize +//! transients on the system. +//! +//! \param[in] u32StateMachinePeriod (in milliseconds) +//! \param[in] u16CurrentRampSlope (in mA/s) +//! +//! \retval SUCCESS If all goes well +//! \retval ERROR_DDI_BCM_NOT_INITIALIZED If the Battery Charger is not yet +//! initialized. +//! +//////////////////////////////////////////////////////////////////////////////// +extern ddi_bc_Status_t ddi_bc_SetNewPeriodAndSlope(uint32_t + u32StateMachinePeriod, + uint16_t + u16CurrentRampSlope); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the state machine period. +//! +//! \fntype Function +//! +//! This function reports the battery charger period. +//! +//! \retval The battery charger period (in milliseconds). +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint32_t ddi_bc_GetStateMachinePeriod(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the current ramp slope. +//! +//! \fntype Function +//! +//! This function reports the current ramp slope. +//! +//! \retval The current ramp slope (in mA/s). +//! +//////////////////////////////////////////////////////////////////////////////// +extern uint32_t ddi_bc_GetCurrentRampSlope(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the time spent in the present state (milliseconds) +//! +//! \fntype Function +//! +//! This function reports the time spent in the present charging state. Note that +//! for the states that actually charge the battery, this time does not include the +//! time spent under alarm conditions such as die termperature alarm or battery +//! temperature alarm. +//! +//! \retval The time spent in the current state in milliseconds. +//! +//////////////////////////////////////////////////////////////////////////////// +uint32_t ddi_bc_GetStateTime(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Report the reason for being in the broken state +//! +//! \fntype Function +//! +//! +//! \retval ddi_bc_BrokenReason_t enumeration +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_BrokenReason_t ddi_bc_GetBrokenReason(void); + +//////////////////////////////////////////////////////////////////////////////// +//! +//! \brief Restart the charge cycle +//! +//! \fntype Function +//! +//! \retval SUCCESS +//! +//////////////////////////////////////////////////////////////////////////////// +ddi_bc_Status_t ddi_bc_ForceChargingToStart(void); + +//////////////////////////////////////////////////////////////////////////////// +// End of file +//////////////////////////////////////////////////////////////////////////////// +#endif // _DDI_BC_H +//! @} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-bch.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-bch.h @@ -1,7 +1,7 @@ /* - * stmp378x: BCH register definitions + * STMP BCH Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,40 +17,554 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_BCH_BASE (STMP3XXX_REGS_BASE + 0xA000) -#define REGS_BCH_PHYS 0x8000A000 -#define REGS_BCH_SIZE 0x2000 -#define HW_BCH_CTRL 0x0 -#define BM_BCH_CTRL_COMPLETE_IRQ 0x00000001 -#define BP_BCH_CTRL_COMPLETE_IRQ 0 +#ifndef __ARCH_ARM___BCH_H +#define __ARCH_ARM___BCH_H 1 + +#define REGS_BCH_BASE (STMP3XXX_REGS_BASE + 0xa000) +#define REGS_BCH_PHYS (0x8000A000) +#define REGS_BCH_SIZE 0x00002000 + +#define HW_BCH_CTRL (0x00000000) +#define HW_BCH_CTRL_SET (0x00000004) +#define HW_BCH_CTRL_CLR (0x00000008) +#define HW_BCH_CTRL_TOG (0x0000000c) +#define HW_BCH_CTRL_ADDR \ + (REGS_BCH_BASE + HW_BCH_CTRL) +#define HW_BCH_CTRL_SET_ADDR \ + (REGS_BCH_BASE + HW_BCH_CTRL_SET) +#define HW_BCH_CTRL_CLR_ADDR \ + (REGS_BCH_BASE + HW_BCH_CTRL_CLR) +#define HW_BCH_CTRL_TOG_ADDR \ + (REGS_BCH_BASE + HW_BCH_CTRL_TOG) + +#define BM_BCH_CTRL_SFTRST 0x80000000 +#define BV_BCH_CTRL_SFTRST__RUN 0x0 +#define BV_BCH_CTRL_SFTRST__RESET 0x1 +#define BM_BCH_CTRL_CLKGATE 0x40000000 +#define BV_BCH_CTRL_CLKGATE__RUN 0x0 +#define BV_BCH_CTRL_CLKGATE__NO_CLKS 0x1 +#define BP_BCH_CTRL_RSVD5 23 +#define BM_BCH_CTRL_RSVD5 0x3F800000 +#define BF_BCH_CTRL_RSVD5(v) \ + (((v) << 23) & BM_BCH_CTRL_RSVD5) +#define BM_BCH_CTRL_DEBUGSYNDROME 0x00400000 +#define BP_BCH_CTRL_RSVD4 20 +#define BM_BCH_CTRL_RSVD4 0x00300000 +#define BF_BCH_CTRL_RSVD4(v) \ + (((v) << 20) & BM_BCH_CTRL_RSVD4) +#define BP_BCH_CTRL_M2M_LAYOUT 18 +#define BM_BCH_CTRL_M2M_LAYOUT 0x000C0000 +#define BF_BCH_CTRL_M2M_LAYOUT(v) \ + (((v) << 18) & BM_BCH_CTRL_M2M_LAYOUT) +#define BM_BCH_CTRL_M2M_ENCODE 0x00020000 +#define BM_BCH_CTRL_M2M_ENABLE 0x00010000 +#define BP_BCH_CTRL_RSVD3 11 +#define BM_BCH_CTRL_RSVD3 0x0000F800 +#define BF_BCH_CTRL_RSVD3(v) \ + (((v) << 11) & BM_BCH_CTRL_RSVD3) +#define BM_BCH_CTRL_DEBUG_STALL_IRQ_EN 0x00000400 +#define BM_BCH_CTRL_RSVD2 0x00000200 #define BM_BCH_CTRL_COMPLETE_IRQ_EN 0x00000100 +#define BP_BCH_CTRL_RSVD1 4 +#define BM_BCH_CTRL_RSVD1 0x000000F0 +#define BF_BCH_CTRL_RSVD1(v) \ + (((v) << 4) & BM_BCH_CTRL_RSVD1) +#define BM_BCH_CTRL_BM_ERROR_IRQ 0x00000008 +#define BM_BCH_CTRL_DEBUG_STALL_IRQ 0x00000004 +#define BM_BCH_CTRL_RSVD0 0x00000002 +#define BM_BCH_CTRL_COMPLETE_IRQ 0x00000001 -#define HW_BCH_STATUS0 0x10 -#define BM_BCH_STATUS0_UNCORRECTABLE 0x00000004 -#define BM_BCH_STATUS0_CORRECTED 0x00000008 -#define BM_BCH_STATUS0_STATUS_BLK0 0x0000FF00 -#define BP_BCH_STATUS0_STATUS_BLK0 8 -#define BM_BCH_STATUS0_COMPLETED_CE 0x000F0000 +#define HW_BCH_STATUS0 (0x00000010) +#define HW_BCH_STATUS0_ADDR \ + (REGS_BCH_BASE + HW_BCH_STATUS0) + +#define BP_BCH_STATUS0_HANDLE 20 +#define BM_BCH_STATUS0_HANDLE 0xFFF00000 +#define BF_BCH_STATUS0_HANDLE(v) \ + (((v) << 20) & BM_BCH_STATUS0_HANDLE) #define BP_BCH_STATUS0_COMPLETED_CE 16 +#define BM_BCH_STATUS0_COMPLETED_CE 0x000F0000 +#define BF_BCH_STATUS0_COMPLETED_CE(v) \ + (((v) << 16) & BM_BCH_STATUS0_COMPLETED_CE) +#define BP_BCH_STATUS0_STATUS_BLK0 8 +#define BM_BCH_STATUS0_STATUS_BLK0 0x0000FF00 +#define BF_BCH_STATUS0_STATUS_BLK0(v) \ + (((v) << 8) & BM_BCH_STATUS0_STATUS_BLK0) +#define BV_BCH_STATUS0_STATUS_BLK0__ZERO 0x00 +#define BV_BCH_STATUS0_STATUS_BLK0__ERROR1 0x01 +#define BV_BCH_STATUS0_STATUS_BLK0__ERROR2 0x02 +#define BV_BCH_STATUS0_STATUS_BLK0__ERROR3 0x03 +#define BV_BCH_STATUS0_STATUS_BLK0__ERROR4 0x04 +#define BV_BCH_STATUS0_STATUS_BLK0__UNCORRECTABLE 0xFE +#define BV_BCH_STATUS0_STATUS_BLK0__ERASED 0xFF +#define BP_BCH_STATUS0_RSVD1 5 +#define BM_BCH_STATUS0_RSVD1 0x000000E0 +#define BF_BCH_STATUS0_RSVD1(v) \ + (((v) << 5) & BM_BCH_STATUS0_RSVD1) +#define BM_BCH_STATUS0_ALLONES 0x00000010 +#define BM_BCH_STATUS0_CORRECTED 0x00000008 +#define BM_BCH_STATUS0_UNCORRECTABLE 0x00000004 +#define BP_BCH_STATUS0_RSVD0 0 +#define BM_BCH_STATUS0_RSVD0 0x00000003 +#define BF_BCH_STATUS0_RSVD0(v) \ + (((v) << 0) & BM_BCH_STATUS0_RSVD0) -#define HW_BCH_LAYOUTSELECT 0x70 +#define HW_BCH_MODE (0x00000020) +#define HW_BCH_MODE_ADDR \ + (REGS_BCH_BASE + HW_BCH_MODE) + +#define BP_BCH_MODE_RSVD 8 +#define BM_BCH_MODE_RSVD 0xFFFFFF00 +#define BF_BCH_MODE_RSVD(v) \ + (((v) << 8) & BM_BCH_MODE_RSVD) +#define BP_BCH_MODE_ERASE_THRESHOLD 0 +#define BM_BCH_MODE_ERASE_THRESHOLD 0x000000FF +#define BF_BCH_MODE_ERASE_THRESHOLD(v) \ + (((v) << 0) & BM_BCH_MODE_ERASE_THRESHOLD) + +#define HW_BCH_ENCODEPTR (0x00000030) +#define HW_BCH_ENCODEPTR_ADDR \ + (REGS_BCH_BASE + HW_BCH_ENCODEPTR) + +#define BP_BCH_ENCODEPTR_ADDR 0 +#define BM_BCH_ENCODEPTR_ADDR 0xFFFFFFFF +#define BF_BCH_ENCODEPTR_ADDR(v) (v) + +#define HW_BCH_DATAPTR (0x00000040) +#define HW_BCH_DATAPTR_ADDR \ + (REGS_BCH_BASE + HW_BCH_DATAPTR) + +#define BP_BCH_DATAPTR_ADDR 0 +#define BM_BCH_DATAPTR_ADDR 0xFFFFFFFF +#define BF_BCH_DATAPTR_ADDR(v) (v) + +#define HW_BCH_METAPTR (0x00000050) +#define HW_BCH_METAPTR_ADDR \ + (REGS_BCH_BASE + HW_BCH_METAPTR) + +#define BP_BCH_METAPTR_ADDR 0 +#define BM_BCH_METAPTR_ADDR 0xFFFFFFFF +#define BF_BCH_METAPTR_ADDR(v) (v) + +#define HW_BCH_LAYOUTSELECT (0x00000070) +#define HW_BCH_LAYOUTSELECT_ADDR \ + (REGS_BCH_BASE + HW_BCH_LAYOUTSELECT) + +#define BP_BCH_LAYOUTSELECT_CS15_SELECT 30 +#define BM_BCH_LAYOUTSELECT_CS15_SELECT 0xC0000000 +#define BF_BCH_LAYOUTSELECT_CS15_SELECT(v) \ + (((v) << 30) & BM_BCH_LAYOUTSELECT_CS15_SELECT) +#define BP_BCH_LAYOUTSELECT_CS14_SELECT 28 +#define BM_BCH_LAYOUTSELECT_CS14_SELECT 0x30000000 +#define BF_BCH_LAYOUTSELECT_CS14_SELECT(v) \ + (((v) << 28) & BM_BCH_LAYOUTSELECT_CS14_SELECT) +#define BP_BCH_LAYOUTSELECT_CS13_SELECT 26 +#define BM_BCH_LAYOUTSELECT_CS13_SELECT 0x0C000000 +#define BF_BCH_LAYOUTSELECT_CS13_SELECT(v) \ + (((v) << 26) & BM_BCH_LAYOUTSELECT_CS13_SELECT) +#define BP_BCH_LAYOUTSELECT_CS12_SELECT 24 +#define BM_BCH_LAYOUTSELECT_CS12_SELECT 0x03000000 +#define BF_BCH_LAYOUTSELECT_CS12_SELECT(v) \ + (((v) << 24) & BM_BCH_LAYOUTSELECT_CS12_SELECT) +#define BP_BCH_LAYOUTSELECT_CS11_SELECT 22 +#define BM_BCH_LAYOUTSELECT_CS11_SELECT 0x00C00000 +#define BF_BCH_LAYOUTSELECT_CS11_SELECT(v) \ + (((v) << 22) & BM_BCH_LAYOUTSELECT_CS11_SELECT) +#define BP_BCH_LAYOUTSELECT_CS10_SELECT 20 +#define BM_BCH_LAYOUTSELECT_CS10_SELECT 0x00300000 +#define BF_BCH_LAYOUTSELECT_CS10_SELECT(v) \ + (((v) << 20) & BM_BCH_LAYOUTSELECT_CS10_SELECT) +#define BP_BCH_LAYOUTSELECT_CS9_SELECT 18 +#define BM_BCH_LAYOUTSELECT_CS9_SELECT 0x000C0000 +#define BF_BCH_LAYOUTSELECT_CS9_SELECT(v) \ + (((v) << 18) & BM_BCH_LAYOUTSELECT_CS9_SELECT) +#define BP_BCH_LAYOUTSELECT_CS8_SELECT 16 +#define BM_BCH_LAYOUTSELECT_CS8_SELECT 0x00030000 +#define BF_BCH_LAYOUTSELECT_CS8_SELECT(v) \ + (((v) << 16) & BM_BCH_LAYOUTSELECT_CS8_SELECT) +#define BP_BCH_LAYOUTSELECT_CS7_SELECT 14 +#define BM_BCH_LAYOUTSELECT_CS7_SELECT 0x0000C000 +#define BF_BCH_LAYOUTSELECT_CS7_SELECT(v) \ + (((v) << 14) & BM_BCH_LAYOUTSELECT_CS7_SELECT) +#define BP_BCH_LAYOUTSELECT_CS6_SELECT 12 +#define BM_BCH_LAYOUTSELECT_CS6_SELECT 0x00003000 +#define BF_BCH_LAYOUTSELECT_CS6_SELECT(v) \ + (((v) << 12) & BM_BCH_LAYOUTSELECT_CS6_SELECT) +#define BP_BCH_LAYOUTSELECT_CS5_SELECT 10 +#define BM_BCH_LAYOUTSELECT_CS5_SELECT 0x00000C00 +#define BF_BCH_LAYOUTSELECT_CS5_SELECT(v) \ + (((v) << 10) & BM_BCH_LAYOUTSELECT_CS5_SELECT) +#define BP_BCH_LAYOUTSELECT_CS4_SELECT 8 +#define BM_BCH_LAYOUTSELECT_CS4_SELECT 0x00000300 +#define BF_BCH_LAYOUTSELECT_CS4_SELECT(v) \ + (((v) << 8) & BM_BCH_LAYOUTSELECT_CS4_SELECT) +#define BP_BCH_LAYOUTSELECT_CS3_SELECT 6 +#define BM_BCH_LAYOUTSELECT_CS3_SELECT 0x000000C0 +#define BF_BCH_LAYOUTSELECT_CS3_SELECT(v) \ + (((v) << 6) & BM_BCH_LAYOUTSELECT_CS3_SELECT) +#define BP_BCH_LAYOUTSELECT_CS2_SELECT 4 +#define BM_BCH_LAYOUTSELECT_CS2_SELECT 0x00000030 +#define BF_BCH_LAYOUTSELECT_CS2_SELECT(v) \ + (((v) << 4) & BM_BCH_LAYOUTSELECT_CS2_SELECT) +#define BP_BCH_LAYOUTSELECT_CS1_SELECT 2 +#define BM_BCH_LAYOUTSELECT_CS1_SELECT 0x0000000C +#define BF_BCH_LAYOUTSELECT_CS1_SELECT(v) \ + (((v) << 2) & BM_BCH_LAYOUTSELECT_CS1_SELECT) +#define BP_BCH_LAYOUTSELECT_CS0_SELECT 0 +#define BM_BCH_LAYOUTSELECT_CS0_SELECT 0x00000003 +#define BF_BCH_LAYOUTSELECT_CS0_SELECT(v) \ + (((v) << 0) & BM_BCH_LAYOUTSELECT_CS0_SELECT) + +#define HW_BCH_FLASH0LAYOUT0 (0x00000080) +#define HW_BCH_FLASH0LAYOUT0_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH0LAYOUT0) -#define HW_BCH_FLASH0LAYOUT0 0x80 -#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE 0x00000FFF -#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0 -#define BM_BCH_FLASH0LAYOUT0_ECC0 0x0000F000 -#define BP_BCH_FLASH0LAYOUT0_ECC0 12 -#define BM_BCH_FLASH0LAYOUT0_META_SIZE 0x00FF0000 -#define BP_BCH_FLASH0LAYOUT0_META_SIZE 16 -#define BM_BCH_FLASH0LAYOUT0_NBLOCKS 0xFF000000 #define BP_BCH_FLASH0LAYOUT0_NBLOCKS 24 -#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE 0x00000FFF -#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0 -#define BM_BCH_FLASH0LAYOUT1_ECCN 0x0000F000 -#define BP_BCH_FLASH0LAYOUT1_ECCN 12 -#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE 0xFFFF0000 +#define BM_BCH_FLASH0LAYOUT0_NBLOCKS 0xFF000000 +#define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v) \ + (((v) << 24) & BM_BCH_FLASH0LAYOUT0_NBLOCKS) +#define BP_BCH_FLASH0LAYOUT0_META_SIZE 16 +#define BM_BCH_FLASH0LAYOUT0_META_SIZE 0x00FF0000 +#define BF_BCH_FLASH0LAYOUT0_META_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH0LAYOUT0_META_SIZE) +#define BP_BCH_FLASH0LAYOUT0_ECC0 12 +#define BM_BCH_FLASH0LAYOUT0_ECC0 0x0000F000 +#define BF_BCH_FLASH0LAYOUT0_ECC0(v) \ + (((v) << 12) & BM_BCH_FLASH0LAYOUT0_ECC0) +#define BV_BCH_FLASH0LAYOUT0_ECC0__NONE 0x0 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC2 0x1 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC4 0x2 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC6 0x3 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC8 0x4 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC10 0x5 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC12 0x6 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC14 0x7 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC16 0x8 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC18 0x9 +#define BV_BCH_FLASH0LAYOUT0_ECC0__ECC20 0xA +#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0 +#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE 0x00000FFF +#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) + +#define HW_BCH_FLASH0LAYOUT1 (0x00000090) +#define HW_BCH_FLASH0LAYOUT1_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH0LAYOUT1) + #define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE 16 +#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE 0xFFFF0000 +#define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH0LAYOUT1_PAGE_SIZE) +#define BP_BCH_FLASH0LAYOUT1_ECCN 12 +#define BM_BCH_FLASH0LAYOUT1_ECCN 0x0000F000 +#define BF_BCH_FLASH0LAYOUT1_ECCN(v) \ + (((v) << 12) & BM_BCH_FLASH0LAYOUT1_ECCN) +#define BV_BCH_FLASH0LAYOUT1_ECCN__NONE 0x0 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC2 0x1 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC4 0x2 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC6 0x3 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC8 0x4 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC10 0x5 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC12 0x6 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC14 0x7 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC16 0x8 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC18 0x9 +#define BV_BCH_FLASH0LAYOUT1_ECCN__ECC20 0xA +#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0 +#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE 0x00000FFF +#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) + +#define HW_BCH_FLASH1LAYOUT0 (0x000000a0) +#define HW_BCH_FLASH1LAYOUT0_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH1LAYOUT0) + +#define BP_BCH_FLASH1LAYOUT0_NBLOCKS 24 +#define BM_BCH_FLASH1LAYOUT0_NBLOCKS 0xFF000000 +#define BF_BCH_FLASH1LAYOUT0_NBLOCKS(v) \ + (((v) << 24) & BM_BCH_FLASH1LAYOUT0_NBLOCKS) +#define BP_BCH_FLASH1LAYOUT0_META_SIZE 16 +#define BM_BCH_FLASH1LAYOUT0_META_SIZE 0x00FF0000 +#define BF_BCH_FLASH1LAYOUT0_META_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH1LAYOUT0_META_SIZE) +#define BP_BCH_FLASH1LAYOUT0_ECC0 12 +#define BM_BCH_FLASH1LAYOUT0_ECC0 0x0000F000 +#define BF_BCH_FLASH1LAYOUT0_ECC0(v) \ + (((v) << 12) & BM_BCH_FLASH1LAYOUT0_ECC0) +#define BV_BCH_FLASH1LAYOUT0_ECC0__NONE 0x0 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC2 0x1 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC4 0x2 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC6 0x3 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC8 0x4 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC10 0x5 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC12 0x6 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC14 0x7 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC16 0x8 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC18 0x9 +#define BV_BCH_FLASH1LAYOUT0_ECC0__ECC20 0xA +#define BP_BCH_FLASH1LAYOUT0_DATA0_SIZE 0 +#define BM_BCH_FLASH1LAYOUT0_DATA0_SIZE 0x00000FFF +#define BF_BCH_FLASH1LAYOUT0_DATA0_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH1LAYOUT0_DATA0_SIZE) + +#define HW_BCH_FLASH1LAYOUT1 (0x000000b0) +#define HW_BCH_FLASH1LAYOUT1_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH1LAYOUT1) + +#define BP_BCH_FLASH1LAYOUT1_PAGE_SIZE 16 +#define BM_BCH_FLASH1LAYOUT1_PAGE_SIZE 0xFFFF0000 +#define BF_BCH_FLASH1LAYOUT1_PAGE_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH1LAYOUT1_PAGE_SIZE) +#define BP_BCH_FLASH1LAYOUT1_ECCN 12 +#define BM_BCH_FLASH1LAYOUT1_ECCN 0x0000F000 +#define BF_BCH_FLASH1LAYOUT1_ECCN(v) \ + (((v) << 12) & BM_BCH_FLASH1LAYOUT1_ECCN) +#define BV_BCH_FLASH1LAYOUT1_ECCN__NONE 0x0 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC2 0x1 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC4 0x2 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC6 0x3 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC8 0x4 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC10 0x5 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC12 0x6 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC14 0x7 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC16 0x8 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC18 0x9 +#define BV_BCH_FLASH1LAYOUT1_ECCN__ECC20 0xA +#define BP_BCH_FLASH1LAYOUT1_DATAN_SIZE 0 +#define BM_BCH_FLASH1LAYOUT1_DATAN_SIZE 0x00000FFF +#define BF_BCH_FLASH1LAYOUT1_DATAN_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH1LAYOUT1_DATAN_SIZE) + +#define HW_BCH_FLASH2LAYOUT0 (0x000000c0) +#define HW_BCH_FLASH2LAYOUT0_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH2LAYOUT0) + +#define BP_BCH_FLASH2LAYOUT0_NBLOCKS 24 +#define BM_BCH_FLASH2LAYOUT0_NBLOCKS 0xFF000000 +#define BF_BCH_FLASH2LAYOUT0_NBLOCKS(v) \ + (((v) << 24) & BM_BCH_FLASH2LAYOUT0_NBLOCKS) +#define BP_BCH_FLASH2LAYOUT0_META_SIZE 16 +#define BM_BCH_FLASH2LAYOUT0_META_SIZE 0x00FF0000 +#define BF_BCH_FLASH2LAYOUT0_META_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH2LAYOUT0_META_SIZE) +#define BP_BCH_FLASH2LAYOUT0_ECC0 12 +#define BM_BCH_FLASH2LAYOUT0_ECC0 0x0000F000 +#define BF_BCH_FLASH2LAYOUT0_ECC0(v) \ + (((v) << 12) & BM_BCH_FLASH2LAYOUT0_ECC0) +#define BV_BCH_FLASH2LAYOUT0_ECC0__NONE 0x0 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC2 0x1 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC4 0x2 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC6 0x3 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC8 0x4 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC10 0x5 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC12 0x6 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC14 0x7 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC16 0x8 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC18 0x9 +#define BV_BCH_FLASH2LAYOUT0_ECC0__ECC20 0xA +#define BP_BCH_FLASH2LAYOUT0_DATA0_SIZE 0 +#define BM_BCH_FLASH2LAYOUT0_DATA0_SIZE 0x00000FFF +#define BF_BCH_FLASH2LAYOUT0_DATA0_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH2LAYOUT0_DATA0_SIZE) + +#define HW_BCH_FLASH2LAYOUT1 (0x000000d0) +#define HW_BCH_FLASH2LAYOUT1_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH2LAYOUT1) + +#define BP_BCH_FLASH2LAYOUT1_PAGE_SIZE 16 +#define BM_BCH_FLASH2LAYOUT1_PAGE_SIZE 0xFFFF0000 +#define BF_BCH_FLASH2LAYOUT1_PAGE_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH2LAYOUT1_PAGE_SIZE) +#define BP_BCH_FLASH2LAYOUT1_ECCN 12 +#define BM_BCH_FLASH2LAYOUT1_ECCN 0x0000F000 +#define BF_BCH_FLASH2LAYOUT1_ECCN(v) \ + (((v) << 12) & BM_BCH_FLASH2LAYOUT1_ECCN) +#define BV_BCH_FLASH2LAYOUT1_ECCN__NONE 0x0 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC2 0x1 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC4 0x2 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC6 0x3 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC8 0x4 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC10 0x5 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC12 0x6 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC14 0x7 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC16 0x8 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC18 0x9 +#define BV_BCH_FLASH2LAYOUT1_ECCN__ECC20 0xA +#define BP_BCH_FLASH2LAYOUT1_DATAN_SIZE 0 +#define BM_BCH_FLASH2LAYOUT1_DATAN_SIZE 0x00000FFF +#define BF_BCH_FLASH2LAYOUT1_DATAN_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH2LAYOUT1_DATAN_SIZE) + +#define HW_BCH_FLASH3LAYOUT0 (0x000000e0) +#define HW_BCH_FLASH3LAYOUT0_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH3LAYOUT0) + +#define BP_BCH_FLASH3LAYOUT0_NBLOCKS 24 +#define BM_BCH_FLASH3LAYOUT0_NBLOCKS 0xFF000000 +#define BF_BCH_FLASH3LAYOUT0_NBLOCKS(v) \ + (((v) << 24) & BM_BCH_FLASH3LAYOUT0_NBLOCKS) +#define BP_BCH_FLASH3LAYOUT0_META_SIZE 16 +#define BM_BCH_FLASH3LAYOUT0_META_SIZE 0x00FF0000 +#define BF_BCH_FLASH3LAYOUT0_META_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH3LAYOUT0_META_SIZE) +#define BP_BCH_FLASH3LAYOUT0_ECC0 12 +#define BM_BCH_FLASH3LAYOUT0_ECC0 0x0000F000 +#define BF_BCH_FLASH3LAYOUT0_ECC0(v) \ + (((v) << 12) & BM_BCH_FLASH3LAYOUT0_ECC0) +#define BV_BCH_FLASH3LAYOUT0_ECC0__NONE 0x0 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC2 0x1 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC4 0x2 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC6 0x3 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC8 0x4 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC10 0x5 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC12 0x6 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC14 0x7 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC16 0x8 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC18 0x9 +#define BV_BCH_FLASH3LAYOUT0_ECC0__ECC20 0xA +#define BP_BCH_FLASH3LAYOUT0_DATA0_SIZE 0 +#define BM_BCH_FLASH3LAYOUT0_DATA0_SIZE 0x00000FFF +#define BF_BCH_FLASH3LAYOUT0_DATA0_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH3LAYOUT0_DATA0_SIZE) + +#define HW_BCH_FLASH3LAYOUT1 (0x000000f0) +#define HW_BCH_FLASH3LAYOUT1_ADDR \ + (REGS_BCH_BASE + HW_BCH_FLASH3LAYOUT1) + +#define BP_BCH_FLASH3LAYOUT1_PAGE_SIZE 16 +#define BM_BCH_FLASH3LAYOUT1_PAGE_SIZE 0xFFFF0000 +#define BF_BCH_FLASH3LAYOUT1_PAGE_SIZE(v) \ + (((v) << 16) & BM_BCH_FLASH3LAYOUT1_PAGE_SIZE) +#define BP_BCH_FLASH3LAYOUT1_ECCN 12 +#define BM_BCH_FLASH3LAYOUT1_ECCN 0x0000F000 +#define BF_BCH_FLASH3LAYOUT1_ECCN(v) \ + (((v) << 12) & BM_BCH_FLASH3LAYOUT1_ECCN) +#define BV_BCH_FLASH3LAYOUT1_ECCN__NONE 0x0 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC2 0x1 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC4 0x2 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC6 0x3 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC8 0x4 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC10 0x5 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC12 0x6 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC14 0x7 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC16 0x8 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC18 0x9 +#define BV_BCH_FLASH3LAYOUT1_ECCN__ECC20 0xA +#define BP_BCH_FLASH3LAYOUT1_DATAN_SIZE 0 +#define BM_BCH_FLASH3LAYOUT1_DATAN_SIZE 0x00000FFF +#define BF_BCH_FLASH3LAYOUT1_DATAN_SIZE(v) \ + (((v) << 0) & BM_BCH_FLASH3LAYOUT1_DATAN_SIZE) + +#define HW_BCH_DEBUG0 (0x00000100) +#define HW_BCH_DEBUG0_SET (0x00000104) +#define HW_BCH_DEBUG0_CLR (0x00000108) +#define HW_BCH_DEBUG0_TOG (0x0000010c) +#define HW_BCH_DEBUG0_ADDR \ + (REGS_BCH_BASE + HW_BCH_DEBUG0) +#define HW_BCH_DEBUG0_SET_ADDR \ + (REGS_BCH_BASE + HW_BCH_DEBUG0_SET) +#define HW_BCH_DEBUG0_CLR_ADDR \ + (REGS_BCH_BASE + HW_BCH_DEBUG0_CLR) +#define HW_BCH_DEBUG0_TOG_ADDR \ + (REGS_BCH_BASE + HW_BCH_DEBUG0_TOG) + +#define BP_BCH_DEBUG0_RSVD1 27 +#define BM_BCH_DEBUG0_RSVD1 0xF8000000 +#define BF_BCH_DEBUG0_RSVD1(v) \ + (((v) << 27) & BM_BCH_DEBUG0_RSVD1) +#define BM_BCH_DEBUG0_ROM_BIST_ENABLE 0x04000000 +#define BM_BCH_DEBUG0_ROM_BIST_COMPLETE 0x02000000 +#define BP_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 16 +#define BM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 0x01FF0000 +#define BF_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(v) \ + (((v) << 16) & BM_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL) +#define BV_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__NORMAL 0x0 +#define BV_BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__TEST_MODE 0x1 +#define BM_BCH_DEBUG0_KES_DEBUG_SHIFT_SYND 0x00008000 +#define BM_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG 0x00004000 +#define BV_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__DATA 0x1 +#define BV_BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__AUX 0x1 +#define BM_BCH_DEBUG0_KES_DEBUG_MODE4K 0x00002000 +#define BV_BCH_DEBUG0_KES_DEBUG_MODE4K__4k 0x1 +#define BV_BCH_DEBUG0_KES_DEBUG_MODE4K__2k 0x1 +#define BM_BCH_DEBUG0_KES_DEBUG_KICK 0x00001000 +#define BM_BCH_DEBUG0_KES_STANDALONE 0x00000800 +#define BV_BCH_DEBUG0_KES_STANDALONE__NORMAL 0x0 +#define BV_BCH_DEBUG0_KES_STANDALONE__TEST_MODE 0x1 +#define BM_BCH_DEBUG0_KES_DEBUG_STEP 0x00000400 +#define BM_BCH_DEBUG0_KES_DEBUG_STALL 0x00000200 +#define BV_BCH_DEBUG0_KES_DEBUG_STALL__NORMAL 0x0 +#define BV_BCH_DEBUG0_KES_DEBUG_STALL__WAIT 0x1 +#define BM_BCH_DEBUG0_BM_KES_TEST_BYPASS 0x00000100 +#define BV_BCH_DEBUG0_BM_KES_TEST_BYPASS__NORMAL 0x0 +#define BV_BCH_DEBUG0_BM_KES_TEST_BYPASS__TEST_MODE 0x1 +#define BP_BCH_DEBUG0_RSVD0 6 +#define BM_BCH_DEBUG0_RSVD0 0x000000C0 +#define BF_BCH_DEBUG0_RSVD0(v) \ + (((v) << 6) & BM_BCH_DEBUG0_RSVD0) +#define BP_BCH_DEBUG0_DEBUG_REG_SELECT 0 +#define BM_BCH_DEBUG0_DEBUG_REG_SELECT 0x0000003F +#define BF_BCH_DEBUG0_DEBUG_REG_SELECT(v) \ + (((v) << 0) & BM_BCH_DEBUG0_DEBUG_REG_SELECT) + +#define HW_BCH_DBGKESREAD (0x00000110) +#define HW_BCH_DBGKESREAD_ADDR \ + (REGS_BCH_BASE + HW_BCH_DBGKESREAD) + +#define BP_BCH_DBGKESREAD_VALUES 0 +#define BM_BCH_DBGKESREAD_VALUES 0xFFFFFFFF +#define BF_BCH_DBGKESREAD_VALUES(v) (v) + +#define HW_BCH_DBGCSFEREAD (0x00000120) +#define HW_BCH_DBGCSFEREAD_ADDR \ + (REGS_BCH_BASE + HW_BCH_DBGCSFEREAD) + +#define BP_BCH_DBGCSFEREAD_VALUES 0 +#define BM_BCH_DBGCSFEREAD_VALUES 0xFFFFFFFF +#define BF_BCH_DBGCSFEREAD_VALUES(v) (v) + +#define HW_BCH_DBGSYNDGENREAD (0x00000130) +#define HW_BCH_DBGSYNDGENREAD_ADDR \ + (REGS_BCH_BASE + HW_BCH_DBGSYNDGENREAD) + +#define BP_BCH_DBGSYNDGENREAD_VALUES 0 +#define BM_BCH_DBGSYNDGENREAD_VALUES 0xFFFFFFFF +#define BF_BCH_DBGSYNDGENREAD_VALUES(v) (v) + +#define HW_BCH_DBGAHBMREAD (0x00000140) +#define HW_BCH_DBGAHBMREAD_ADDR \ + (REGS_BCH_BASE + HW_BCH_DBGAHBMREAD) + +#define BP_BCH_DBGAHBMREAD_VALUES 0 +#define BM_BCH_DBGAHBMREAD_VALUES 0xFFFFFFFF +#define BF_BCH_DBGAHBMREAD_VALUES(v) (v) + +#define HW_BCH_BLOCKNAME (0x00000150) +#define HW_BCH_BLOCKNAME_ADDR \ + (REGS_BCH_BASE + HW_BCH_BLOCKNAME) + +#define BP_BCH_BLOCKNAME_NAME 0 +#define BM_BCH_BLOCKNAME_NAME 0xFFFFFFFF +#define BF_BCH_BLOCKNAME_NAME(v) (v) + +#define HW_BCH_VERSION (0x00000160) +#define HW_BCH_VERSION_ADDR \ + (REGS_BCH_BASE + HW_BCH_VERSION) -#define HW_BCH_BLOCKNAME 0x150 +#define BP_BCH_VERSION_MAJOR 24 +#define BM_BCH_VERSION_MAJOR 0xFF000000 +#define BF_BCH_VERSION_MAJOR(v) \ + (((v) << 24) & BM_BCH_VERSION_MAJOR) +#define BP_BCH_VERSION_MINOR 16 +#define BM_BCH_VERSION_MINOR 0x00FF0000 +#define BF_BCH_VERSION_MINOR(v) \ + (((v) << 16) & BM_BCH_VERSION_MINOR) +#define BP_BCH_VERSION_STEP 0 +#define BM_BCH_VERSION_STEP 0x0000FFFF +#define BF_BCH_VERSION_STEP(v) \ + (((v) << 0) & BM_BCH_VERSION_STEP) +#endif /* __ARCH_ARM___BCH_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-usbctrl.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-usbctrl.h @@ -1,7 +1,7 @@ /* - * stmp378x: USBCTRL register definitions + * STMP USBCTRL Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,24 +17,991 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_USBCTRL_BASE (STMP3XXX_REGS_BASE + 0x80000) -#define REGS_USBCTRL_PHYS 0x80080000 -#define REGS_USBCTRL_SIZE 0x2000 -#define HW_USBCTRL_USBCMD 0x140 -#define BM_USBCTRL_USBCMD_RS 0x00000001 -#define BP_USBCTRL_USBCMD_RS 0 +#ifndef __ARCH_ARM___USBCTRL_H +#define __ARCH_ARM___USBCTRL_H 1 + +#define REGS_USBCTRL_BASE (STMP3XXX_REGS_BASE + 0x80000) +#define REGS_USBCTRL_PHYS (0x80080000) +#define REGS_USBCTRL_SIZE 0x00002000 + +#define HW_USBCTRL_ID (0x00000000) +#define HW_USBCTRL_ID_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ID) + +#define BP_USBCTRL_ID_CIVERSION 29 +#define BM_USBCTRL_ID_CIVERSION 0xE0000000 +#define BF_USBCTRL_ID_CIVERSION(v) \ + (((v) << 29) & BM_USBCTRL_ID_CIVERSION) +#define BP_USBCTRL_ID_VERSION 25 +#define BM_USBCTRL_ID_VERSION 0x1E000000 +#define BF_USBCTRL_ID_VERSION(v) \ + (((v) << 25) & BM_USBCTRL_ID_VERSION) +#define BP_USBCTRL_ID_REVISION 21 +#define BM_USBCTRL_ID_REVISION 0x01E00000 +#define BF_USBCTRL_ID_REVISION(v) \ + (((v) << 21) & BM_USBCTRL_ID_REVISION) +#define BP_USBCTRL_ID_TAG 16 +#define BM_USBCTRL_ID_TAG 0x001F0000 +#define BF_USBCTRL_ID_TAG(v) \ + (((v) << 16) & BM_USBCTRL_ID_TAG) +#define BP_USBCTRL_ID_RSVD1 14 +#define BM_USBCTRL_ID_RSVD1 0x0000C000 +#define BF_USBCTRL_ID_RSVD1(v) \ + (((v) << 14) & BM_USBCTRL_ID_RSVD1) +#define BP_USBCTRL_ID_NID 8 +#define BM_USBCTRL_ID_NID 0x00003F00 +#define BF_USBCTRL_ID_NID(v) \ + (((v) << 8) & BM_USBCTRL_ID_NID) +#define BP_USBCTRL_ID_RSVD0 6 +#define BM_USBCTRL_ID_RSVD0 0x000000C0 +#define BF_USBCTRL_ID_RSVD0(v) \ + (((v) << 6) & BM_USBCTRL_ID_RSVD0) +#define BP_USBCTRL_ID_ID 0 +#define BM_USBCTRL_ID_ID 0x0000003F +#define BF_USBCTRL_ID_ID(v) \ + (((v) << 0) & BM_USBCTRL_ID_ID) + +#define HW_USBCTRL_HWGENERAL (0x00000004) +#define HW_USBCTRL_HWGENERAL_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HWGENERAL) + +#define BP_USBCTRL_HWGENERAL_RSVD 11 +#define BM_USBCTRL_HWGENERAL_RSVD 0xFFFFF800 +#define BF_USBCTRL_HWGENERAL_RSVD(v) \ + (((v) << 11) & BM_USBCTRL_HWGENERAL_RSVD) +#define BP_USBCTRL_HWGENERAL_SM 9 +#define BM_USBCTRL_HWGENERAL_SM 0x00000600 +#define BF_USBCTRL_HWGENERAL_SM(v) \ + (((v) << 9) & BM_USBCTRL_HWGENERAL_SM) +#define BP_USBCTRL_HWGENERAL_PHYM 6 +#define BM_USBCTRL_HWGENERAL_PHYM 0x000001C0 +#define BF_USBCTRL_HWGENERAL_PHYM(v) \ + (((v) << 6) & BM_USBCTRL_HWGENERAL_PHYM) +#define BP_USBCTRL_HWGENERAL_PHYW 4 +#define BM_USBCTRL_HWGENERAL_PHYW 0x00000030 +#define BF_USBCTRL_HWGENERAL_PHYW(v) \ + (((v) << 4) & BM_USBCTRL_HWGENERAL_PHYW) +#define BM_USBCTRL_HWGENERAL_BWT 0x00000008 +#define BP_USBCTRL_HWGENERAL_CLKC 1 +#define BM_USBCTRL_HWGENERAL_CLKC 0x00000006 +#define BF_USBCTRL_HWGENERAL_CLKC(v) \ + (((v) << 1) & BM_USBCTRL_HWGENERAL_CLKC) +#define BM_USBCTRL_HWGENERAL_RT 0x00000001 + +#define HW_USBCTRL_HWHOST (0x00000008) +#define HW_USBCTRL_HWHOST_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HWHOST) + +#define BP_USBCTRL_HWHOST_TTPER 24 +#define BM_USBCTRL_HWHOST_TTPER 0xFF000000 +#define BF_USBCTRL_HWHOST_TTPER(v) \ + (((v) << 24) & BM_USBCTRL_HWHOST_TTPER) +#define BP_USBCTRL_HWHOST_TTASY 16 +#define BM_USBCTRL_HWHOST_TTASY 0x00FF0000 +#define BF_USBCTRL_HWHOST_TTASY(v) \ + (((v) << 16) & BM_USBCTRL_HWHOST_TTASY) +#define BP_USBCTRL_HWHOST_RSVD 4 +#define BM_USBCTRL_HWHOST_RSVD 0x0000FFF0 +#define BF_USBCTRL_HWHOST_RSVD(v) \ + (((v) << 4) & BM_USBCTRL_HWHOST_RSVD) +#define BP_USBCTRL_HWHOST_NPORT 1 +#define BM_USBCTRL_HWHOST_NPORT 0x0000000E +#define BF_USBCTRL_HWHOST_NPORT(v) \ + (((v) << 1) & BM_USBCTRL_HWHOST_NPORT) +#define BM_USBCTRL_HWHOST_HC 0x00000001 + +#define HW_USBCTRL_HWDEVICE (0x0000000c) +#define HW_USBCTRL_HWDEVICE_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HWDEVICE) + +#define BP_USBCTRL_HWDEVICE_RSVD 6 +#define BM_USBCTRL_HWDEVICE_RSVD 0xFFFFFFC0 +#define BF_USBCTRL_HWDEVICE_RSVD(v) \ + (((v) << 6) & BM_USBCTRL_HWDEVICE_RSVD) +#define BP_USBCTRL_HWDEVICE_DEVEP 1 +#define BM_USBCTRL_HWDEVICE_DEVEP 0x0000003E +#define BF_USBCTRL_HWDEVICE_DEVEP(v) \ + (((v) << 1) & BM_USBCTRL_HWDEVICE_DEVEP) +#define BM_USBCTRL_HWDEVICE_DC 0x00000001 + +#define HW_USBCTRL_HWTXBUF (0x00000010) +#define HW_USBCTRL_HWTXBUF_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HWTXBUF) + +#define BM_USBCTRL_HWTXBUF_TXLCR 0x80000000 +#define BP_USBCTRL_HWTXBUF_RSVD 24 +#define BM_USBCTRL_HWTXBUF_RSVD 0x7F000000 +#define BF_USBCTRL_HWTXBUF_RSVD(v) \ + (((v) << 24) & BM_USBCTRL_HWTXBUF_RSVD) +#define BP_USBCTRL_HWTXBUF_TXCHANADD 16 +#define BM_USBCTRL_HWTXBUF_TXCHANADD 0x00FF0000 +#define BF_USBCTRL_HWTXBUF_TXCHANADD(v) \ + (((v) << 16) & BM_USBCTRL_HWTXBUF_TXCHANADD) +#define BP_USBCTRL_HWTXBUF_TXADD 8 +#define BM_USBCTRL_HWTXBUF_TXADD 0x0000FF00 +#define BF_USBCTRL_HWTXBUF_TXADD(v) \ + (((v) << 8) & BM_USBCTRL_HWTXBUF_TXADD) +#define BP_USBCTRL_HWTXBUF_TXBURST 0 +#define BM_USBCTRL_HWTXBUF_TXBURST 0x000000FF +#define BF_USBCTRL_HWTXBUF_TXBURST(v) \ + (((v) << 0) & BM_USBCTRL_HWTXBUF_TXBURST) + +#define HW_USBCTRL_HWRXBUF (0x00000014) +#define HW_USBCTRL_HWRXBUF_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HWRXBUF) + +#define BP_USBCTRL_HWRXBUF_RSVD 16 +#define BM_USBCTRL_HWRXBUF_RSVD 0xFFFF0000 +#define BF_USBCTRL_HWRXBUF_RSVD(v) \ + (((v) << 16) & BM_USBCTRL_HWRXBUF_RSVD) +#define BP_USBCTRL_HWRXBUF_RXADD 8 +#define BM_USBCTRL_HWRXBUF_RXADD 0x0000FF00 +#define BF_USBCTRL_HWRXBUF_RXADD(v) \ + (((v) << 8) & BM_USBCTRL_HWRXBUF_RXADD) +#define BP_USBCTRL_HWRXBUF_RXBURST 0 +#define BM_USBCTRL_HWRXBUF_RXBURST 0x000000FF +#define BF_USBCTRL_HWRXBUF_RXBURST(v) \ + (((v) << 0) & BM_USBCTRL_HWRXBUF_RXBURST) + +#define HW_USBCTRL_GPTIMER0LD (0x00000080) +#define HW_USBCTRL_GPTIMER0LD_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_GPTIMER0LD) + +#define BP_USBCTRL_GPTIMER0LD_RSVD0 24 +#define BM_USBCTRL_GPTIMER0LD_RSVD0 0xFF000000 +#define BF_USBCTRL_GPTIMER0LD_RSVD0(v) \ + (((v) << 24) & BM_USBCTRL_GPTIMER0LD_RSVD0) +#define BP_USBCTRL_GPTIMER0LD_GPTLD 0 +#define BM_USBCTRL_GPTIMER0LD_GPTLD 0x00FFFFFF +#define BF_USBCTRL_GPTIMER0LD_GPTLD(v) \ + (((v) << 0) & BM_USBCTRL_GPTIMER0LD_GPTLD) + +#define HW_USBCTRL_GPTIMER0CTRL (0x00000084) +#define HW_USBCTRL_GPTIMER0CTRL_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_GPTIMER0CTRL) + +#define BM_USBCTRL_GPTIMER0CTRL_GPTRUN 0x80000000 +#define BV_USBCTRL_GPTIMER0CTRL_GPTRUN__STOP 0 +#define BV_USBCTRL_GPTIMER0CTRL_GPTRUN__RUN 1 +#define BM_USBCTRL_GPTIMER0CTRL_GPTRST 0x40000000 +#define BV_USBCTRL_GPTIMER0CTRL_GPTRST__NOACTION 0 +#define BV_USBCTRL_GPTIMER0CTRL_GPTRST__LOADCOUNTER 1 +#define BP_USBCTRL_GPTIMER0CTRL_RSVD0 25 +#define BM_USBCTRL_GPTIMER0CTRL_RSVD0 0x3E000000 +#define BF_USBCTRL_GPTIMER0CTRL_RSVD0(v) \ + (((v) << 25) & BM_USBCTRL_GPTIMER0CTRL_RSVD0) +#define BM_USBCTRL_GPTIMER0CTRL_GPTMODE 0x01000000 +#define BV_USBCTRL_GPTIMER0CTRL_GPTMODE__ONESHOT 0 +#define BV_USBCTRL_GPTIMER0CTRL_GPTMODE__REPEAT 1 +#define BP_USBCTRL_GPTIMER0CTRL_GPTCNT 0 +#define BM_USBCTRL_GPTIMER0CTRL_GPTCNT 0x00FFFFFF +#define BF_USBCTRL_GPTIMER0CTRL_GPTCNT(v) \ + (((v) << 0) & BM_USBCTRL_GPTIMER0CTRL_GPTCNT) + +#define HW_USBCTRL_GPTIMER1LD (0x00000088) +#define HW_USBCTRL_GPTIMER1LD_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_GPTIMER1LD) + +#define BP_USBCTRL_GPTIMER1LD_RSVD0 24 +#define BM_USBCTRL_GPTIMER1LD_RSVD0 0xFF000000 +#define BF_USBCTRL_GPTIMER1LD_RSVD0(v) \ + (((v) << 24) & BM_USBCTRL_GPTIMER1LD_RSVD0) +#define BP_USBCTRL_GPTIMER1LD_GPTLD 0 +#define BM_USBCTRL_GPTIMER1LD_GPTLD 0x00FFFFFF +#define BF_USBCTRL_GPTIMER1LD_GPTLD(v) \ + (((v) << 0) & BM_USBCTRL_GPTIMER1LD_GPTLD) + +#define HW_USBCTRL_GPTIMER1CTRL (0x0000008c) +#define HW_USBCTRL_GPTIMER1CTRL_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_GPTIMER1CTRL) + +#define BM_USBCTRL_GPTIMER1CTRL_GPTRUN 0x80000000 +#define BV_USBCTRL_GPTIMER1CTRL_GPTRUN__STOP 0 +#define BV_USBCTRL_GPTIMER1CTRL_GPTRUN__RUN 1 +#define BM_USBCTRL_GPTIMER1CTRL_GPTRST 0x40000000 +#define BV_USBCTRL_GPTIMER1CTRL_GPTRST__NOACTION 0 +#define BV_USBCTRL_GPTIMER1CTRL_GPTRST__LOADCOUNTER 1 +#define BP_USBCTRL_GPTIMER1CTRL_RSVD0 25 +#define BM_USBCTRL_GPTIMER1CTRL_RSVD0 0x3E000000 +#define BF_USBCTRL_GPTIMER1CTRL_RSVD0(v) \ + (((v) << 25) & BM_USBCTRL_GPTIMER1CTRL_RSVD0) +#define BM_USBCTRL_GPTIMER1CTRL_GPTMODE 0x01000000 +#define BV_USBCTRL_GPTIMER1CTRL_GPTMODE__ONESHOT 0 +#define BV_USBCTRL_GPTIMER1CTRL_GPTMODE__REPEAT 1 +#define BP_USBCTRL_GPTIMER1CTRL_GPTCNT 0 +#define BM_USBCTRL_GPTIMER1CTRL_GPTCNT 0x00FFFFFF +#define BF_USBCTRL_GPTIMER1CTRL_GPTCNT(v) \ + (((v) << 0) & BM_USBCTRL_GPTIMER1CTRL_GPTCNT) + +#define HW_USBCTRL_SBUSCFG (0x00000090) +#define HW_USBCTRL_SBUSCFG_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_SBUSCFG) + +#define BP_USBCTRL_SBUSCFG_RSVD 3 +#define BM_USBCTRL_SBUSCFG_RSVD 0xFFFFFFF8 +#define BF_USBCTRL_SBUSCFG_RSVD(v) \ + (((v) << 3) & BM_USBCTRL_SBUSCFG_RSVD) +#define BP_USBCTRL_SBUSCFG_AHBBRST 0 +#define BM_USBCTRL_SBUSCFG_AHBBRST 0x00000007 +#define BF_USBCTRL_SBUSCFG_AHBBRST(v) \ + (((v) << 0) & BM_USBCTRL_SBUSCFG_AHBBRST) +#define BV_USBCTRL_SBUSCFG_AHBBRST__U_INCR 0x0 +#define BV_USBCTRL_SBUSCFG_AHBBRST__S_INCR4 0x1 +#define BV_USBCTRL_SBUSCFG_AHBBRST__S_INCR8 0x2 +#define BV_USBCTRL_SBUSCFG_AHBBRST__S_INCR16 0x3 +#define BV_USBCTRL_SBUSCFG_AHBBRST__RESERVED 0x4 +#define BV_USBCTRL_SBUSCFG_AHBBRST__U_INCR4 0x5 +#define BV_USBCTRL_SBUSCFG_AHBBRST__U_INCR8 0x6 +#define BV_USBCTRL_SBUSCFG_AHBBRST__U_INCR16 0x7 + +#define HW_USBCTRL_CAPLENGTH (0x00000100) +#define HW_USBCTRL_CAPLENGTH_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_CAPLENGTH) + +#define BP_USBCTRL_CAPLENGTH_HCIVERSION 16 +#define BM_USBCTRL_CAPLENGTH_HCIVERSION 0xFFFF0000 +#define BF_USBCTRL_CAPLENGTH_HCIVERSION(v) \ + (((v) << 16) & BM_USBCTRL_CAPLENGTH_HCIVERSION) +#define BP_USBCTRL_CAPLENGTH_RSVD 8 +#define BM_USBCTRL_CAPLENGTH_RSVD 0x0000FF00 +#define BF_USBCTRL_CAPLENGTH_RSVD(v) \ + (((v) << 8) & BM_USBCTRL_CAPLENGTH_RSVD) +#define BP_USBCTRL_CAPLENGTH_CAPLENGTH 0 +#define BM_USBCTRL_CAPLENGTH_CAPLENGTH 0x000000FF +#define BF_USBCTRL_CAPLENGTH_CAPLENGTH(v) \ + (((v) << 0) & BM_USBCTRL_CAPLENGTH_CAPLENGTH) + +#define HW_USBCTRL_HCSPARAMS (0x00000104) +#define HW_USBCTRL_HCSPARAMS_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HCSPARAMS) + +#define BP_USBCTRL_HCSPARAMS_RSVD2 28 +#define BM_USBCTRL_HCSPARAMS_RSVD2 0xF0000000 +#define BF_USBCTRL_HCSPARAMS_RSVD2(v) \ + (((v) << 28) & BM_USBCTRL_HCSPARAMS_RSVD2) +#define BP_USBCTRL_HCSPARAMS_N_TT 24 +#define BM_USBCTRL_HCSPARAMS_N_TT 0x0F000000 +#define BF_USBCTRL_HCSPARAMS_N_TT(v) \ + (((v) << 24) & BM_USBCTRL_HCSPARAMS_N_TT) +#define BP_USBCTRL_HCSPARAMS_N_PTT 20 +#define BM_USBCTRL_HCSPARAMS_N_PTT 0x00F00000 +#define BF_USBCTRL_HCSPARAMS_N_PTT(v) \ + (((v) << 20) & BM_USBCTRL_HCSPARAMS_N_PTT) +#define BP_USBCTRL_HCSPARAMS_RSVD1 17 +#define BM_USBCTRL_HCSPARAMS_RSVD1 0x000E0000 +#define BF_USBCTRL_HCSPARAMS_RSVD1(v) \ + (((v) << 17) & BM_USBCTRL_HCSPARAMS_RSVD1) +#define BM_USBCTRL_HCSPARAMS_PI 0x00010000 +#define BP_USBCTRL_HCSPARAMS_N_CC 12 +#define BM_USBCTRL_HCSPARAMS_N_CC 0x0000F000 +#define BF_USBCTRL_HCSPARAMS_N_CC(v) \ + (((v) << 12) & BM_USBCTRL_HCSPARAMS_N_CC) +#define BP_USBCTRL_HCSPARAMS_N_PCC 8 +#define BM_USBCTRL_HCSPARAMS_N_PCC 0x00000F00 +#define BF_USBCTRL_HCSPARAMS_N_PCC(v) \ + (((v) << 8) & BM_USBCTRL_HCSPARAMS_N_PCC) +#define BP_USBCTRL_HCSPARAMS_RSVD0 5 +#define BM_USBCTRL_HCSPARAMS_RSVD0 0x000000E0 +#define BF_USBCTRL_HCSPARAMS_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_HCSPARAMS_RSVD0) +#define BM_USBCTRL_HCSPARAMS_PPC 0x00000010 +#define BP_USBCTRL_HCSPARAMS_N_PORTS 0 +#define BM_USBCTRL_HCSPARAMS_N_PORTS 0x0000000F +#define BF_USBCTRL_HCSPARAMS_N_PORTS(v) \ + (((v) << 0) & BM_USBCTRL_HCSPARAMS_N_PORTS) + +#define HW_USBCTRL_HCCPARAMS (0x00000108) +#define HW_USBCTRL_HCCPARAMS_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_HCCPARAMS) + +#define BP_USBCTRL_HCCPARAMS_RSVD2 16 +#define BM_USBCTRL_HCCPARAMS_RSVD2 0xFFFF0000 +#define BF_USBCTRL_HCCPARAMS_RSVD2(v) \ + (((v) << 16) & BM_USBCTRL_HCCPARAMS_RSVD2) +#define BP_USBCTRL_HCCPARAMS_EECP 8 +#define BM_USBCTRL_HCCPARAMS_EECP 0x0000FF00 +#define BF_USBCTRL_HCCPARAMS_EECP(v) \ + (((v) << 8) & BM_USBCTRL_HCCPARAMS_EECP) +#define BP_USBCTRL_HCCPARAMS_IST 4 +#define BM_USBCTRL_HCCPARAMS_IST 0x000000F0 +#define BF_USBCTRL_HCCPARAMS_IST(v) \ + (((v) << 4) & BM_USBCTRL_HCCPARAMS_IST) +#define BM_USBCTRL_HCCPARAMS_RSVD0 0x00000008 +#define BM_USBCTRL_HCCPARAMS_ASP 0x00000004 +#define BM_USBCTRL_HCCPARAMS_PFL 0x00000002 +#define BM_USBCTRL_HCCPARAMS_ADC 0x00000001 + +#define HW_USBCTRL_DCIVERSION (0x00000120) +#define HW_USBCTRL_DCIVERSION_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_DCIVERSION) + +#define BP_USBCTRL_DCIVERSION_RSVD 16 +#define BM_USBCTRL_DCIVERSION_RSVD 0xFFFF0000 +#define BF_USBCTRL_DCIVERSION_RSVD(v) \ + (((v) << 16) & BM_USBCTRL_DCIVERSION_RSVD) +#define BP_USBCTRL_DCIVERSION_DCIVERSION 0 +#define BM_USBCTRL_DCIVERSION_DCIVERSION 0x0000FFFF +#define BF_USBCTRL_DCIVERSION_DCIVERSION(v) \ + (((v) << 0) & BM_USBCTRL_DCIVERSION_DCIVERSION) + +#define HW_USBCTRL_DCCPARAMS (0x00000124) +#define HW_USBCTRL_DCCPARAMS_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_DCCPARAMS) + +#define BP_USBCTRL_DCCPARAMS_RSVD1 9 +#define BM_USBCTRL_DCCPARAMS_RSVD1 0xFFFFFE00 +#define BF_USBCTRL_DCCPARAMS_RSVD1(v) \ + (((v) << 9) & BM_USBCTRL_DCCPARAMS_RSVD1) +#define BM_USBCTRL_DCCPARAMS_HC 0x00000100 +#define BM_USBCTRL_DCCPARAMS_DC 0x00000080 +#define BP_USBCTRL_DCCPARAMS_RSVD2 5 +#define BM_USBCTRL_DCCPARAMS_RSVD2 0x00000060 +#define BF_USBCTRL_DCCPARAMS_RSVD2(v) \ + (((v) << 5) & BM_USBCTRL_DCCPARAMS_RSVD2) +#define BP_USBCTRL_DCCPARAMS_DEN 0 +#define BM_USBCTRL_DCCPARAMS_DEN 0x0000001F +#define BF_USBCTRL_DCCPARAMS_DEN(v) \ + (((v) << 0) & BM_USBCTRL_DCCPARAMS_DEN) + +#define HW_USBCTRL_USBCMD (0x00000140) +#define HW_USBCTRL_USBCMD_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_USBCMD) + +#define BP_USBCTRL_USBCMD_RSVD3 24 +#define BM_USBCTRL_USBCMD_RSVD3 0xFF000000 +#define BF_USBCTRL_USBCMD_RSVD3(v) \ + (((v) << 24) & BM_USBCTRL_USBCMD_RSVD3) +#define BP_USBCTRL_USBCMD_ITC 16 +#define BM_USBCTRL_USBCMD_ITC 0x00FF0000 +#define BF_USBCTRL_USBCMD_ITC(v) \ + (((v) << 16) & BM_USBCTRL_USBCMD_ITC) +#define BV_USBCTRL_USBCMD_ITC__IMM 0x0 +#define BV_USBCTRL_USBCMD_ITC__1_MICROFRAME 0x1 +#define BV_USBCTRL_USBCMD_ITC__2_MICROFRAME 0x2 +#define BV_USBCTRL_USBCMD_ITC__4_MICROFRAME 0x4 +#define BV_USBCTRL_USBCMD_ITC__8_MICROFRAME 0x8 +#define BV_USBCTRL_USBCMD_ITC__16_MICROFRAME 0x10 +#define BV_USBCTRL_USBCMD_ITC__32_MICROFRAME 0x20 +#define BV_USBCTRL_USBCMD_ITC__64_MICROFRAME 0x40 +#define BM_USBCTRL_USBCMD_FS2 0x00008000 +#define BM_USBCTRL_USBCMD_ATDTW 0x00004000 +#define BM_USBCTRL_USBCMD_SUTW 0x00002000 +#define BM_USBCTRL_USBCMD_RSVD2 0x00001000 +#define BM_USBCTRL_USBCMD_ASPE 0x00000800 +#define BM_USBCTRL_USBCMD_RSVD1 0x00000400 +#define BP_USBCTRL_USBCMD_ASP 8 +#define BM_USBCTRL_USBCMD_ASP 0x00000300 +#define BF_USBCTRL_USBCMD_ASP(v) \ + (((v) << 8) & BM_USBCTRL_USBCMD_ASP) +#define BM_USBCTRL_USBCMD_LR 0x00000080 +#define BM_USBCTRL_USBCMD_IAA 0x00000040 +#define BM_USBCTRL_USBCMD_ASE 0x00000020 +#define BM_USBCTRL_USBCMD_PSE 0x00000010 +#define BM_USBCTRL_USBCMD_FS1 0x00000008 +#define BM_USBCTRL_USBCMD_FS0 0x00000004 #define BM_USBCTRL_USBCMD_RST 0x00000002 +#define BM_USBCTRL_USBCMD_RS 0x00000001 + +#define HW_USBCTRL_USBSTS (0x00000144) +#define HW_USBCTRL_USBSTS_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_USBSTS) -#define HW_USBCTRL_USBINTR 0x148 +#define BP_USBCTRL_USBSTS_RSVD5 26 +#define BM_USBCTRL_USBSTS_RSVD5 0xFC000000 +#define BF_USBCTRL_USBSTS_RSVD5(v) \ + (((v) << 26) & BM_USBCTRL_USBSTS_RSVD5) +#define BM_USBCTRL_USBSTS_TI1 0x02000000 +#define BM_USBCTRL_USBSTS_TI0 0x01000000 +#define BP_USBCTRL_USBSTS_RSVD4 20 +#define BM_USBCTRL_USBSTS_RSVD4 0x00F00000 +#define BF_USBCTRL_USBSTS_RSVD4(v) \ + (((v) << 20) & BM_USBCTRL_USBSTS_RSVD4) +#define BM_USBCTRL_USBSTS_UPI 0x00080000 +#define BM_USBCTRL_USBSTS_UAI 0x00040000 +#define BM_USBCTRL_USBSTS_RSVD3 0x00020000 +#define BM_USBCTRL_USBSTS_NAKI 0x00010000 +#define BM_USBCTRL_USBSTS_AS 0x00008000 +#define BM_USBCTRL_USBSTS_PS 0x00004000 +#define BM_USBCTRL_USBSTS_RCL 0x00002000 +#define BM_USBCTRL_USBSTS_HCH 0x00001000 +#define BM_USBCTRL_USBSTS_RSVD2 0x00000800 +#define BM_USBCTRL_USBSTS_ULPII 0x00000400 +#define BM_USBCTRL_USBSTS_RSVD1 0x00000200 +#define BM_USBCTRL_USBSTS_SLI 0x00000100 +#define BM_USBCTRL_USBSTS_SRI 0x00000080 +#define BM_USBCTRL_USBSTS_URI 0x00000040 +#define BM_USBCTRL_USBSTS_AAI 0x00000020 +#define BM_USBCTRL_USBSTS_SEI 0x00000010 +#define BM_USBCTRL_USBSTS_FRI 0x00000008 +#define BM_USBCTRL_USBSTS_PCI 0x00000004 +#define BM_USBCTRL_USBSTS_UEI 0x00000002 +#define BM_USBCTRL_USBSTS_UI 0x00000001 + +#define HW_USBCTRL_USBINTR (0x00000148) +#define HW_USBCTRL_USBINTR_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_USBINTR) + +#define BP_USBCTRL_USBINTR_RSVD5 26 +#define BM_USBCTRL_USBINTR_RSVD5 0xFC000000 +#define BF_USBCTRL_USBINTR_RSVD5(v) \ + (((v) << 26) & BM_USBCTRL_USBINTR_RSVD5) +#define BM_USBCTRL_USBINTR_TIE1 0x02000000 +#define BM_USBCTRL_USBINTR_TIE0 0x01000000 +#define BP_USBCTRL_USBINTR_RSVD4 20 +#define BM_USBCTRL_USBINTR_RSVD4 0x00F00000 +#define BF_USBCTRL_USBINTR_RSVD4(v) \ + (((v) << 20) & BM_USBCTRL_USBINTR_RSVD4) +#define BM_USBCTRL_USBINTR_UPIE 0x00080000 +#define BM_USBCTRL_USBINTR_UAIE 0x00040000 +#define BM_USBCTRL_USBINTR_RSVD3 0x00020000 +#define BM_USBCTRL_USBINTR_NAKE 0x00010000 +#define BP_USBCTRL_USBINTR_RSVD2 11 +#define BM_USBCTRL_USBINTR_RSVD2 0x0000F800 +#define BF_USBCTRL_USBINTR_RSVD2(v) \ + (((v) << 11) & BM_USBCTRL_USBINTR_RSVD2) +#define BM_USBCTRL_USBINTR_ULPIE 0x00000400 +#define BM_USBCTRL_USBINTR_RSVD1 0x00000200 +#define BM_USBCTRL_USBINTR_SLE 0x00000100 +#define BM_USBCTRL_USBINTR_SRE 0x00000080 +#define BM_USBCTRL_USBINTR_URE 0x00000040 +#define BM_USBCTRL_USBINTR_AAE 0x00000020 +#define BM_USBCTRL_USBINTR_SEE 0x00000010 +#define BM_USBCTRL_USBINTR_FRE 0x00000008 +#define BM_USBCTRL_USBINTR_PCE 0x00000004 +#define BM_USBCTRL_USBINTR_UEE 0x00000002 #define BM_USBCTRL_USBINTR_UE 0x00000001 -#define BP_USBCTRL_USBINTR_UE 0 -#define HW_USBCTRL_PORTSC1 0x184 +#define HW_USBCTRL_FRINDEX (0x0000014c) +#define HW_USBCTRL_FRINDEX_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_FRINDEX) + +#define BP_USBCTRL_FRINDEX_RSVD 14 +#define BM_USBCTRL_FRINDEX_RSVD 0xFFFFC000 +#define BF_USBCTRL_FRINDEX_RSVD(v) \ + (((v) << 14) & BM_USBCTRL_FRINDEX_RSVD) +#define BP_USBCTRL_FRINDEX_FRINDEX 3 +#define BM_USBCTRL_FRINDEX_FRINDEX 0x00003FF8 +#define BF_USBCTRL_FRINDEX_FRINDEX(v) \ + (((v) << 3) & BM_USBCTRL_FRINDEX_FRINDEX) +#define BV_USBCTRL_FRINDEX_FRINDEX__N_12 12 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_11 11 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_10 10 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_9 9 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_8 8 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_7 7 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_6 6 +#define BV_USBCTRL_FRINDEX_FRINDEX__N_5 5 +#define BP_USBCTRL_FRINDEX_UINDEX 0 +#define BM_USBCTRL_FRINDEX_UINDEX 0x00000007 +#define BF_USBCTRL_FRINDEX_UINDEX(v) \ + (((v) << 0) & BM_USBCTRL_FRINDEX_UINDEX) + +#define HW_USBCTRL_PERIODICLISTBASE (0x00000154) +#define HW_USBCTRL_PERIODICLISTBASE_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_PERIODICLISTBASE) + +#define BP_USBCTRL_PERIODICLISTBASE_PERBASE 12 +#define BM_USBCTRL_PERIODICLISTBASE_PERBASE 0xFFFFF000 +#define BF_USBCTRL_PERIODICLISTBASE_PERBASE(v) \ + (((v) << 12) & BM_USBCTRL_PERIODICLISTBASE_PERBASE) +#define BP_USBCTRL_PERIODICLISTBASE_RSVD 0 +#define BM_USBCTRL_PERIODICLISTBASE_RSVD 0x00000FFF +#define BF_USBCTRL_PERIODICLISTBASE_RSVD(v) \ + (((v) << 0) & BM_USBCTRL_PERIODICLISTBASE_RSVD) + +#define HW_USBCTRL_DEVICEADDR (0x00000154) +#define HW_USBCTRL_DEVICEADDR_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_DEVICEADDR) + +#define BP_USBCTRL_DEVICEADDR_USBADR 25 +#define BM_USBCTRL_DEVICEADDR_USBADR 0xFE000000 +#define BF_USBCTRL_DEVICEADDR_USBADR(v) \ + (((v) << 25) & BM_USBCTRL_DEVICEADDR_USBADR) +#define BM_USBCTRL_DEVICEADDR_USBADRA 0x01000000 +#define BP_USBCTRL_DEVICEADDR_RSVD 0 +#define BM_USBCTRL_DEVICEADDR_RSVD 0x00FFFFFF +#define BF_USBCTRL_DEVICEADDR_RSVD(v) \ + (((v) << 0) & BM_USBCTRL_DEVICEADDR_RSVD) + +#define HW_USBCTRL_ASYNCLISTADDR (0x00000158) +#define HW_USBCTRL_ASYNCLISTADDR_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ASYNCLISTADDR) + +#define BP_USBCTRL_ASYNCLISTADDR_ASYBASE 5 +#define BM_USBCTRL_ASYNCLISTADDR_ASYBASE 0xFFFFFFE0 +#define BF_USBCTRL_ASYNCLISTADDR_ASYBASE(v) \ + (((v) << 5) & BM_USBCTRL_ASYNCLISTADDR_ASYBASE) +#define BP_USBCTRL_ASYNCLISTADDR_RSVD 0 +#define BM_USBCTRL_ASYNCLISTADDR_RSVD 0x0000001F +#define BF_USBCTRL_ASYNCLISTADDR_RSVD(v) \ + (((v) << 0) & BM_USBCTRL_ASYNCLISTADDR_RSVD) + +#define HW_USBCTRL_ENDPOINTLISTADDR (0x00000158) +#define HW_USBCTRL_ENDPOINTLISTADDR_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPOINTLISTADDR) + +#define BP_USBCTRL_ENDPOINTLISTADDR_EPBASE 11 +#define BM_USBCTRL_ENDPOINTLISTADDR_EPBASE 0xFFFFF800 +#define BF_USBCTRL_ENDPOINTLISTADDR_EPBASE(v) \ + (((v) << 11) & BM_USBCTRL_ENDPOINTLISTADDR_EPBASE) +#define BP_USBCTRL_ENDPOINTLISTADDR_RSVD 0 +#define BM_USBCTRL_ENDPOINTLISTADDR_RSVD 0x000007FF +#define BF_USBCTRL_ENDPOINTLISTADDR_RSVD(v) \ + (((v) << 0) & BM_USBCTRL_ENDPOINTLISTADDR_RSVD) + +#define HW_USBCTRL_TTCTRL (0x0000015c) +#define HW_USBCTRL_TTCTRL_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_TTCTRL) + +#define BM_USBCTRL_TTCTRL_RSVD1 0x80000000 +#define BP_USBCTRL_TTCTRL_TTHA 24 +#define BM_USBCTRL_TTCTRL_TTHA 0x7F000000 +#define BF_USBCTRL_TTCTRL_TTHA(v) \ + (((v) << 24) & BM_USBCTRL_TTCTRL_TTHA) +#define BP_USBCTRL_TTCTRL_RSVD2 0 +#define BM_USBCTRL_TTCTRL_RSVD2 0x00FFFFFF +#define BF_USBCTRL_TTCTRL_RSVD2(v) \ + (((v) << 0) & BM_USBCTRL_TTCTRL_RSVD2) + +#define HW_USBCTRL_BURSTSIZE (0x00000160) +#define HW_USBCTRL_BURSTSIZE_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_BURSTSIZE) + +#define BP_USBCTRL_BURSTSIZE_RSVD 16 +#define BM_USBCTRL_BURSTSIZE_RSVD 0xFFFF0000 +#define BF_USBCTRL_BURSTSIZE_RSVD(v) \ + (((v) << 16) & BM_USBCTRL_BURSTSIZE_RSVD) +#define BP_USBCTRL_BURSTSIZE_TXPBURST 8 +#define BM_USBCTRL_BURSTSIZE_TXPBURST 0x0000FF00 +#define BF_USBCTRL_BURSTSIZE_TXPBURST(v) \ + (((v) << 8) & BM_USBCTRL_BURSTSIZE_TXPBURST) +#define BP_USBCTRL_BURSTSIZE_RXPBURST 0 +#define BM_USBCTRL_BURSTSIZE_RXPBURST 0x000000FF +#define BF_USBCTRL_BURSTSIZE_RXPBURST(v) \ + (((v) << 0) & BM_USBCTRL_BURSTSIZE_RXPBURST) + +#define HW_USBCTRL_TXFILLTUNING (0x00000164) +#define HW_USBCTRL_TXFILLTUNING_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_TXFILLTUNING) + +#define BP_USBCTRL_TXFILLTUNING_RSVD2 22 +#define BM_USBCTRL_TXFILLTUNING_RSVD2 0xFFC00000 +#define BF_USBCTRL_TXFILLTUNING_RSVD2(v) \ + (((v) << 22) & BM_USBCTRL_TXFILLTUNING_RSVD2) +#define BP_USBCTRL_TXFILLTUNING_TXFIFOTHRES 16 +#define BM_USBCTRL_TXFILLTUNING_TXFIFOTHRES 0x003F0000 +#define BF_USBCTRL_TXFILLTUNING_TXFIFOTHRES(v) \ + (((v) << 16) & BM_USBCTRL_TXFILLTUNING_TXFIFOTHRES) +#define BP_USBCTRL_TXFILLTUNING_RSVD1 13 +#define BM_USBCTRL_TXFILLTUNING_RSVD1 0x0000E000 +#define BF_USBCTRL_TXFILLTUNING_RSVD1(v) \ + (((v) << 13) & BM_USBCTRL_TXFILLTUNING_RSVD1) +#define BP_USBCTRL_TXFILLTUNING_TXSCHEALTH 8 +#define BM_USBCTRL_TXFILLTUNING_TXSCHEALTH 0x00001F00 +#define BF_USBCTRL_TXFILLTUNING_TXSCHEALTH(v) \ + (((v) << 8) & BM_USBCTRL_TXFILLTUNING_TXSCHEALTH) +#define BM_USBCTRL_TXFILLTUNING_RSVD0 0x00000080 +#define BP_USBCTRL_TXFILLTUNING_TXSCHOH 0 +#define BM_USBCTRL_TXFILLTUNING_TXSCHOH 0x0000007F +#define BF_USBCTRL_TXFILLTUNING_TXSCHOH(v) \ + (((v) << 0) & BM_USBCTRL_TXFILLTUNING_TXSCHOH) + +#define HW_USBCTRL_IC_USB (0x0000016c) +#define HW_USBCTRL_IC_USB_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_IC_USB) + +#define BP_USBCTRL_IC_USB_RSVD 4 +#define BM_USBCTRL_IC_USB_RSVD 0xFFFFFFF0 +#define BF_USBCTRL_IC_USB_RSVD(v) \ + (((v) << 4) & BM_USBCTRL_IC_USB_RSVD) +#define BM_USBCTRL_IC_USB_IC_ENABLE 0x00000008 +#define BP_USBCTRL_IC_USB_IC_VDD 0 +#define BM_USBCTRL_IC_USB_IC_VDD 0x00000007 +#define BF_USBCTRL_IC_USB_IC_VDD(v) \ + (((v) << 0) & BM_USBCTRL_IC_USB_IC_VDD) +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_NONE 0x0 +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_1_0 0x1 +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_1_2 0x2 +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_1_5 0x3 +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_1_8 0x4 +#define BV_USBCTRL_IC_USB_IC_VDD__VOLTAGE_3_0 0x5 +#define BV_USBCTRL_IC_USB_IC_VDD__RESERVED0 0x6 +#define BV_USBCTRL_IC_USB_IC_VDD__RESERVED1 0x7 + +#define HW_USBCTRL_ULPI (0x00000170) +#define HW_USBCTRL_ULPI_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ULPI) + +#define BM_USBCTRL_ULPI_ULPIWU 0x80000000 +#define BM_USBCTRL_ULPI_ULPIRUN 0x40000000 +#define BM_USBCTRL_ULPI_ULPIRW 0x20000000 +#define BM_USBCTRL_ULPI_RSVD0 0x10000000 +#define BM_USBCTRL_ULPI_ULPISS 0x08000000 +#define BP_USBCTRL_ULPI_ULPIPORT 24 +#define BM_USBCTRL_ULPI_ULPIPORT 0x07000000 +#define BF_USBCTRL_ULPI_ULPIPORT(v) \ + (((v) << 24) & BM_USBCTRL_ULPI_ULPIPORT) +#define BP_USBCTRL_ULPI_ULPIADDR 16 +#define BM_USBCTRL_ULPI_ULPIADDR 0x00FF0000 +#define BF_USBCTRL_ULPI_ULPIADDR(v) \ + (((v) << 16) & BM_USBCTRL_ULPI_ULPIADDR) +#define BP_USBCTRL_ULPI_ULPIDATRD 8 +#define BM_USBCTRL_ULPI_ULPIDATRD 0x0000FF00 +#define BF_USBCTRL_ULPI_ULPIDATRD(v) \ + (((v) << 8) & BM_USBCTRL_ULPI_ULPIDATRD) +#define BP_USBCTRL_ULPI_ULPIDATWR 0 +#define BM_USBCTRL_ULPI_ULPIDATWR 0x000000FF +#define BF_USBCTRL_ULPI_ULPIDATWR(v) \ + (((v) << 0) & BM_USBCTRL_ULPI_ULPIDATWR) + +#define HW_USBCTRL_ENDPTNAK (0x00000178) +#define HW_USBCTRL_ENDPTNAK_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTNAK) + +#define BP_USBCTRL_ENDPTNAK_RSVD1 21 +#define BM_USBCTRL_ENDPTNAK_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTNAK_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTNAK_RSVD1) +#define BP_USBCTRL_ENDPTNAK_EPTN 16 +#define BM_USBCTRL_ENDPTNAK_EPTN 0x001F0000 +#define BF_USBCTRL_ENDPTNAK_EPTN(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTNAK_EPTN) +#define BP_USBCTRL_ENDPTNAK_RSVD0 5 +#define BM_USBCTRL_ENDPTNAK_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTNAK_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTNAK_RSVD0) +#define BP_USBCTRL_ENDPTNAK_EPRN 0 +#define BM_USBCTRL_ENDPTNAK_EPRN 0x0000001F +#define BF_USBCTRL_ENDPTNAK_EPRN(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTNAK_EPRN) + +#define HW_USBCTRL_ENDPTNAKEN (0x0000017c) +#define HW_USBCTRL_ENDPTNAKEN_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTNAKEN) + +#define BP_USBCTRL_ENDPTNAKEN_RSVD1 21 +#define BM_USBCTRL_ENDPTNAKEN_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTNAKEN_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTNAKEN_RSVD1) +#define BP_USBCTRL_ENDPTNAKEN_EPTNE 16 +#define BM_USBCTRL_ENDPTNAKEN_EPTNE 0x001F0000 +#define BF_USBCTRL_ENDPTNAKEN_EPTNE(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTNAKEN_EPTNE) +#define BP_USBCTRL_ENDPTNAKEN_RSVD0 5 +#define BM_USBCTRL_ENDPTNAKEN_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTNAKEN_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTNAKEN_RSVD0) +#define BP_USBCTRL_ENDPTNAKEN_EPRNE 0 +#define BM_USBCTRL_ENDPTNAKEN_EPRNE 0x0000001F +#define BF_USBCTRL_ENDPTNAKEN_EPRNE(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTNAKEN_EPRNE) + +#define HW_USBCTRL_PORTSC1 (0x00000184) +#define HW_USBCTRL_PORTSC1_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_PORTSC1) + +#define BP_USBCTRL_PORTSC1_PTS 30 +#define BM_USBCTRL_PORTSC1_PTS 0xC0000000 +#define BF_USBCTRL_PORTSC1_PTS(v) \ + (((v) << 30) & BM_USBCTRL_PORTSC1_PTS) +#define BV_USBCTRL_PORTSC1_PTS__UTMI 0 +#define BV_USBCTRL_PORTSC1_PTS__PHIL 1 +#define BV_USBCTRL_PORTSC1_PTS__ULPI 2 +#define BV_USBCTRL_PORTSC1_PTS__SERIAL 3 +#define BM_USBCTRL_PORTSC1_STS 0x20000000 +#define BM_USBCTRL_PORTSC1_PTW 0x10000000 +#define BP_USBCTRL_PORTSC1_PSPD 26 +#define BM_USBCTRL_PORTSC1_PSPD 0x0C000000 +#define BF_USBCTRL_PORTSC1_PSPD(v) \ + (((v) << 26) & BM_USBCTRL_PORTSC1_PSPD) +#define BV_USBCTRL_PORTSC1_PSPD__FULL 0 +#define BV_USBCTRL_PORTSC1_PSPD__LOW 1 +#define BV_USBCTRL_PORTSC1_PSPD__HIGH 2 +#define BM_USBCTRL_PORTSC1_SRT 0x02000000 +#define BM_USBCTRL_PORTSC1_PFSC 0x01000000 #define BM_USBCTRL_PORTSC1_PHCD 0x00800000 +#define BM_USBCTRL_PORTSC1_WKOC 0x00400000 +#define BM_USBCTRL_PORTSC1_WKDS 0x00200000 +#define BM_USBCTRL_PORTSC1_WKCN 0x00100000 +#define BP_USBCTRL_PORTSC1_PTC 16 +#define BM_USBCTRL_PORTSC1_PTC 0x000F0000 +#define BF_USBCTRL_PORTSC1_PTC(v) \ + (((v) << 16) & BM_USBCTRL_PORTSC1_PTC) +#define BV_USBCTRL_PORTSC1_PTC__TEST_DISABLE 0 +#define BV_USBCTRL_PORTSC1_PTC__TEST_J_STATE 1 +#define BV_USBCTRL_PORTSC1_PTC__TEST_K_STATE 2 +#define BV_USBCTRL_PORTSC1_PTC__TEST_J_SE0_NAK 3 +#define BV_USBCTRL_PORTSC1_PTC__TEST_PACKET 4 +#define BV_USBCTRL_PORTSC1_PTC__TEST_FORCE_ENABLE_HS 5 +#define BV_USBCTRL_PORTSC1_PTC__TEST_FORCE_ENABLE_FS 6 +#define BV_USBCTRL_PORTSC1_PTC__TEST_FORCE_ENABLE_LS 7 +#define BP_USBCTRL_PORTSC1_PIC 14 +#define BM_USBCTRL_PORTSC1_PIC 0x0000C000 +#define BF_USBCTRL_PORTSC1_PIC(v) \ + (((v) << 14) & BM_USBCTRL_PORTSC1_PIC) +#define BV_USBCTRL_PORTSC1_PIC__OFF 0 +#define BV_USBCTRL_PORTSC1_PIC__AMBER 1 +#define BV_USBCTRL_PORTSC1_PIC__GREEN 2 +#define BV_USBCTRL_PORTSC1_PIC__UNDEF 3 +#define BM_USBCTRL_PORTSC1_PO 0x00002000 +#define BM_USBCTRL_PORTSC1_PP 0x00001000 +#define BP_USBCTRL_PORTSC1_LS 10 +#define BM_USBCTRL_PORTSC1_LS 0x00000C00 +#define BF_USBCTRL_PORTSC1_LS(v) \ + (((v) << 10) & BM_USBCTRL_PORTSC1_LS) +#define BV_USBCTRL_PORTSC1_LS__SE0 0 +#define BV_USBCTRL_PORTSC1_LS__K_STATE 1 +#define BV_USBCTRL_PORTSC1_LS__J_STATE 2 +#define BV_USBCTRL_PORTSC1_LS__UNDEF 3 +#define BM_USBCTRL_PORTSC1_HSP 0x00000200 +#define BM_USBCTRL_PORTSC1_PR 0x00000100 +#define BM_USBCTRL_PORTSC1_SUSP 0x00000080 +#define BM_USBCTRL_PORTSC1_FPR 0x00000040 +#define BM_USBCTRL_PORTSC1_OCC 0x00000020 +#define BM_USBCTRL_PORTSC1_OCA 0x00000010 +#define BM_USBCTRL_PORTSC1_PEC 0x00000008 +#define BM_USBCTRL_PORTSC1_PE 0x00000004 +#define BM_USBCTRL_PORTSC1_CSC 0x00000002 +#define BM_USBCTRL_PORTSC1_CCS 0x00000001 -#define HW_USBCTRL_OTGSC 0x1A4 -#define BM_USBCTRL_OTGSC_ID 0x00000100 -#define BM_USBCTRL_OTGSC_IDIS 0x00010000 +#define HW_USBCTRL_OTGSC (0x000001a4) +#define HW_USBCTRL_OTGSC_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_OTGSC) + +#define BM_USBCTRL_OTGSC_RSVD2 0x80000000 +#define BM_USBCTRL_OTGSC_DPIE 0x40000000 +#define BM_USBCTRL_OTGSC_ONEMSE 0x20000000 +#define BM_USBCTRL_OTGSC_BSEIE 0x10000000 +#define BM_USBCTRL_OTGSC_BSVIE 0x08000000 +#define BM_USBCTRL_OTGSC_ASVIE 0x04000000 +#define BM_USBCTRL_OTGSC_AVVIE 0x02000000 #define BM_USBCTRL_OTGSC_IDIE 0x01000000 +#define BM_USBCTRL_OTGSC_RSVD1 0x00800000 +#define BM_USBCTRL_OTGSC_DPIS 0x00400000 +#define BM_USBCTRL_OTGSC_ONEMSS 0x00200000 +#define BM_USBCTRL_OTGSC_BSEIS 0x00100000 +#define BM_USBCTRL_OTGSC_BSVIS 0x00080000 +#define BM_USBCTRL_OTGSC_ASVIS 0x00040000 +#define BM_USBCTRL_OTGSC_AVVIS 0x00020000 +#define BM_USBCTRL_OTGSC_IDIS 0x00010000 +#define BM_USBCTRL_OTGSC_RSVD0 0x00008000 +#define BM_USBCTRL_OTGSC_DPS 0x00004000 +#define BM_USBCTRL_OTGSC_ONEMST 0x00002000 +#define BM_USBCTRL_OTGSC_BSE 0x00001000 +#define BM_USBCTRL_OTGSC_BSV 0x00000800 +#define BM_USBCTRL_OTGSC_ASV 0x00000400 +#define BM_USBCTRL_OTGSC_AVV 0x00000200 +#define BM_USBCTRL_OTGSC_ID 0x00000100 +#define BM_USBCTRL_OTGSC_HABA 0x00000080 +#define BM_USBCTRL_OTGSC_HADP 0x00000040 +#define BM_USBCTRL_OTGSC_IDPU 0x00000020 +#define BM_USBCTRL_OTGSC_DP 0x00000010 +#define BM_USBCTRL_OTGSC_OT 0x00000008 +#define BM_USBCTRL_OTGSC_HAAR 0x00000004 +#define BM_USBCTRL_OTGSC_VC 0x00000002 +#define BM_USBCTRL_OTGSC_VD 0x00000001 + +#define HW_USBCTRL_USBMODE (0x000001a8) +#define HW_USBCTRL_USBMODE_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_USBMODE) + +#define BP_USBCTRL_USBMODE_RSVD 6 +#define BM_USBCTRL_USBMODE_RSVD 0xFFFFFFC0 +#define BF_USBCTRL_USBMODE_RSVD(v) \ + (((v) << 6) & BM_USBCTRL_USBMODE_RSVD) +#define BM_USBCTRL_USBMODE_VBPS 0x00000020 +#define BM_USBCTRL_USBMODE_SDIS 0x00000010 +#define BM_USBCTRL_USBMODE_SLOM 0x00000008 +#define BM_USBCTRL_USBMODE_ES 0x00000004 +#define BP_USBCTRL_USBMODE_CM 0 +#define BM_USBCTRL_USBMODE_CM 0x00000003 +#define BF_USBCTRL_USBMODE_CM(v) \ + (((v) << 0) & BM_USBCTRL_USBMODE_CM) +#define BV_USBCTRL_USBMODE_CM__IDLE 0x0 +#define BV_USBCTRL_USBMODE_CM__DEVICE 0x2 +#define BV_USBCTRL_USBMODE_CM__HOST 0x3 + +#define HW_USBCTRL_ENDPTSETUPSTAT (0x000001ac) +#define HW_USBCTRL_ENDPTSETUPSTAT_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTSETUPSTAT) + +#define BP_USBCTRL_ENDPTSETUPSTAT_RSVD 5 +#define BM_USBCTRL_ENDPTSETUPSTAT_RSVD 0xFFFFFFE0 +#define BF_USBCTRL_ENDPTSETUPSTAT_RSVD(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTSETUPSTAT_RSVD) +#define BP_USBCTRL_ENDPTSETUPSTAT_ENDPTSETUPSTAT 0 +#define BM_USBCTRL_ENDPTSETUPSTAT_ENDPTSETUPSTAT 0x0000001F +#define BF_USBCTRL_ENDPTSETUPSTAT_ENDPTSETUPSTAT(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTSETUPSTAT_ENDPTSETUPSTAT) + +#define HW_USBCTRL_ENDPTPRIME (0x000001b0) +#define HW_USBCTRL_ENDPTPRIME_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTPRIME) + +#define BP_USBCTRL_ENDPTPRIME_RSVD1 21 +#define BM_USBCTRL_ENDPTPRIME_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTPRIME_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTPRIME_RSVD1) +#define BP_USBCTRL_ENDPTPRIME_PETB 16 +#define BM_USBCTRL_ENDPTPRIME_PETB 0x001F0000 +#define BF_USBCTRL_ENDPTPRIME_PETB(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTPRIME_PETB) +#define BP_USBCTRL_ENDPTPRIME_RSVD0 5 +#define BM_USBCTRL_ENDPTPRIME_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTPRIME_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTPRIME_RSVD0) +#define BP_USBCTRL_ENDPTPRIME_PERB 0 +#define BM_USBCTRL_ENDPTPRIME_PERB 0x0000001F +#define BF_USBCTRL_ENDPTPRIME_PERB(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTPRIME_PERB) + +#define HW_USBCTRL_ENDPTFLUSH (0x000001b4) +#define HW_USBCTRL_ENDPTFLUSH_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTFLUSH) + +#define BP_USBCTRL_ENDPTFLUSH_RSVD1 21 +#define BM_USBCTRL_ENDPTFLUSH_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTFLUSH_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTFLUSH_RSVD1) +#define BP_USBCTRL_ENDPTFLUSH_FETB 16 +#define BM_USBCTRL_ENDPTFLUSH_FETB 0x001F0000 +#define BF_USBCTRL_ENDPTFLUSH_FETB(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTFLUSH_FETB) +#define BP_USBCTRL_ENDPTFLUSH_RSVD0 5 +#define BM_USBCTRL_ENDPTFLUSH_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTFLUSH_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTFLUSH_RSVD0) +#define BP_USBCTRL_ENDPTFLUSH_FERB 0 +#define BM_USBCTRL_ENDPTFLUSH_FERB 0x0000001F +#define BF_USBCTRL_ENDPTFLUSH_FERB(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTFLUSH_FERB) + +#define HW_USBCTRL_ENDPTSTAT (0x000001b8) +#define HW_USBCTRL_ENDPTSTAT_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTSTAT) + +#define BP_USBCTRL_ENDPTSTAT_RSVD1 21 +#define BM_USBCTRL_ENDPTSTAT_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTSTAT_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTSTAT_RSVD1) +#define BP_USBCTRL_ENDPTSTAT_ETBR 16 +#define BM_USBCTRL_ENDPTSTAT_ETBR 0x001F0000 +#define BF_USBCTRL_ENDPTSTAT_ETBR(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTSTAT_ETBR) +#define BP_USBCTRL_ENDPTSTAT_RSVD0 5 +#define BM_USBCTRL_ENDPTSTAT_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTSTAT_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTSTAT_RSVD0) +#define BP_USBCTRL_ENDPTSTAT_ERBR 0 +#define BM_USBCTRL_ENDPTSTAT_ERBR 0x0000001F +#define BF_USBCTRL_ENDPTSTAT_ERBR(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTSTAT_ERBR) + +#define HW_USBCTRL_ENDPTCOMPLETE (0x000001bc) +#define HW_USBCTRL_ENDPTCOMPLETE_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTCOMPLETE) + +#define BP_USBCTRL_ENDPTCOMPLETE_RSVD1 21 +#define BM_USBCTRL_ENDPTCOMPLETE_RSVD1 0xFFE00000 +#define BF_USBCTRL_ENDPTCOMPLETE_RSVD1(v) \ + (((v) << 21) & BM_USBCTRL_ENDPTCOMPLETE_RSVD1) +#define BP_USBCTRL_ENDPTCOMPLETE_ETCE 16 +#define BM_USBCTRL_ENDPTCOMPLETE_ETCE 0x001F0000 +#define BF_USBCTRL_ENDPTCOMPLETE_ETCE(v) \ + (((v) << 16) & BM_USBCTRL_ENDPTCOMPLETE_ETCE) +#define BP_USBCTRL_ENDPTCOMPLETE_RSVD0 5 +#define BM_USBCTRL_ENDPTCOMPLETE_RSVD0 0x0000FFE0 +#define BF_USBCTRL_ENDPTCOMPLETE_RSVD0(v) \ + (((v) << 5) & BM_USBCTRL_ENDPTCOMPLETE_RSVD0) +#define BP_USBCTRL_ENDPTCOMPLETE_ERCE 0 +#define BM_USBCTRL_ENDPTCOMPLETE_ERCE 0x0000001F +#define BF_USBCTRL_ENDPTCOMPLETE_ERCE(v) \ + (((v) << 0) & BM_USBCTRL_ENDPTCOMPLETE_ERCE) + +#define HW_USBCTRL_ENDPTCTRL0 (0x000001c0) +#define HW_USBCTRL_ENDPTCTRL0_ADDR \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTCTRL0) + +#define BP_USBCTRL_ENDPTCTRL0_RSVD6 24 +#define BM_USBCTRL_ENDPTCTRL0_RSVD6 0xFF000000 +#define BF_USBCTRL_ENDPTCTRL0_RSVD6(v) \ + (((v) << 24) & BM_USBCTRL_ENDPTCTRL0_RSVD6) +#define BM_USBCTRL_ENDPTCTRL0_TXE 0x00800000 +#define BP_USBCTRL_ENDPTCTRL0_RSVD5 20 +#define BM_USBCTRL_ENDPTCTRL0_RSVD5 0x00700000 +#define BF_USBCTRL_ENDPTCTRL0_RSVD5(v) \ + (((v) << 20) & BM_USBCTRL_ENDPTCTRL0_RSVD5) +#define BP_USBCTRL_ENDPTCTRL0_TXT 18 +#define BM_USBCTRL_ENDPTCTRL0_TXT 0x000C0000 +#define BF_USBCTRL_ENDPTCTRL0_TXT(v) \ + (((v) << 18) & BM_USBCTRL_ENDPTCTRL0_TXT) +#define BV_USBCTRL_ENDPTCTRL0_TXT__CONTROL 0 +#define BM_USBCTRL_ENDPTCTRL0_RSVD4 0x00020000 +#define BM_USBCTRL_ENDPTCTRL0_TXS 0x00010000 +#define BP_USBCTRL_ENDPTCTRL0_RSVD3 8 +#define BM_USBCTRL_ENDPTCTRL0_RSVD3 0x0000FF00 +#define BF_USBCTRL_ENDPTCTRL0_RSVD3(v) \ + (((v) << 8) & BM_USBCTRL_ENDPTCTRL0_RSVD3) +#define BM_USBCTRL_ENDPTCTRL0_RXE 0x00000080 +#define BP_USBCTRL_ENDPTCTRL0_RSVD2 4 +#define BM_USBCTRL_ENDPTCTRL0_RSVD2 0x00000070 +#define BF_USBCTRL_ENDPTCTRL0_RSVD2(v) \ + (((v) << 4) & BM_USBCTRL_ENDPTCTRL0_RSVD2) +#define BP_USBCTRL_ENDPTCTRL0_RXT 2 +#define BM_USBCTRL_ENDPTCTRL0_RXT 0x0000000C +#define BF_USBCTRL_ENDPTCTRL0_RXT(v) \ + (((v) << 2) & BM_USBCTRL_ENDPTCTRL0_RXT) +#define BV_USBCTRL_ENDPTCTRL0_RXT__CONTROL 0 +#define BM_USBCTRL_ENDPTCTRL0_RSVD1 0x00000002 +#define BM_USBCTRL_ENDPTCTRL0_RXS 0x00000001 + +/* + * multi-register-define name HW_USBCTRL_ENDPTCTRLn + * base 0x000001C0 + * count 5 + * offset 0x4 + */ +#define HW_USBCTRL_ENDPTCTRLn(n) (0x000001c4 + (n) * 0x4) +#define HW_USBCTRL_ENDPTCTRLn_ADDR(n) \ + (REGS_USBCTRL_BASE + HW_USBCTRL_ENDPTCTRLn(n)) +#define BP_USBCTRL_ENDPTCTRLn_RSVD6 24 +#define BM_USBCTRL_ENDPTCTRLn_RSVD6 0xFF000000 +#define BF_USBCTRL_ENDPTCTRLn_RSVD6(v) \ + (((v) << 24) & BM_USBCTRL_ENDPTCTRLn_RSVD6) +#define BM_USBCTRL_ENDPTCTRLn_TXE 0x00800000 +#define BM_USBCTRL_ENDPTCTRLn_TXR 0x00400000 +#define BM_USBCTRL_ENDPTCTRLn_TXI 0x00200000 +#define BM_USBCTRL_ENDPTCTRLn_RSVD5 0x00100000 +#define BP_USBCTRL_ENDPTCTRLn_TXT 18 +#define BM_USBCTRL_ENDPTCTRLn_TXT 0x000C0000 +#define BF_USBCTRL_ENDPTCTRLn_TXT(v) \ + (((v) << 18) & BM_USBCTRL_ENDPTCTRLn_TXT) +#define BV_USBCTRL_ENDPTCTRLn_TXT__CONTROL 0 +#define BV_USBCTRL_ENDPTCTRLn_TXT__ISO 1 +#define BV_USBCTRL_ENDPTCTRLn_TXT__BULK 2 +#define BV_USBCTRL_ENDPTCTRLn_TXT__INT 3 +#define BM_USBCTRL_ENDPTCTRLn_TXD 0x00020000 +#define BM_USBCTRL_ENDPTCTRLn_TXS 0x00010000 +#define BP_USBCTRL_ENDPTCTRLn_RSVD3 8 +#define BM_USBCTRL_ENDPTCTRLn_RSVD3 0x0000FF00 +#define BF_USBCTRL_ENDPTCTRLn_RSVD3(v) \ + (((v) << 8) & BM_USBCTRL_ENDPTCTRLn_RSVD3) +#define BM_USBCTRL_ENDPTCTRLn_RXE 0x00000080 +#define BM_USBCTRL_ENDPTCTRLn_RXR 0x00000040 +#define BM_USBCTRL_ENDPTCTRLn_RXI 0x00000020 +#define BM_USBCTRL_ENDPTCTRLn_RSVD2 0x00000010 +#define BP_USBCTRL_ENDPTCTRLn_RXT 2 +#define BM_USBCTRL_ENDPTCTRLn_RXT 0x0000000C +#define BF_USBCTRL_ENDPTCTRLn_RXT(v) \ + (((v) << 2) & BM_USBCTRL_ENDPTCTRLn_RXT) +#define BV_USBCTRL_ENDPTCTRLn_RXT__CONTROL 0 +#define BV_USBCTRL_ENDPTCTRLn_RXT__ISO 1 +#define BV_USBCTRL_ENDPTCTRLn_RXT__BULK 2 +#define BV_USBCTRL_ENDPTCTRLn_RXT__INT 3 +#define BM_USBCTRL_ENDPTCTRLn_RXD 0x00000002 +#define BM_USBCTRL_ENDPTCTRLn_RXS 0x00000001 +#endif /* __ARCH_ARM___USBCTRL_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-uartapp.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-uartapp.h @@ -1,7 +1,7 @@ /* - * stmp378x: UARTAPP register definitions + * STMP UARTAPP Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,71 +17,351 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_UARTAPP1_BASE (STMP3XXX_REGS_BASE + 0x6C000) -#define REGS_UARTAPP1_PHYS 0x8006C000 -#define REGS_UARTAPP2_BASE (STMP3XXX_REGS_BASE + 0x6E000) -#define REGS_UARTAPP2_PHYS 0x8006E000 -#define REGS_UARTAPP_SIZE 0x2000 -#define HW_UARTAPP_CTRL0 0x0 -#define BM_UARTAPP_CTRL0_XFER_COUNT 0x0000FFFF -#define BP_UARTAPP_CTRL0_XFER_COUNT 0 -#define BM_UARTAPP_CTRL0_RXTIMEOUT 0x07FF0000 -#define BP_UARTAPP_CTRL0_RXTIMEOUT 16 -#define BM_UARTAPP_CTRL0_RXTO_ENABLE 0x08000000 -#define BM_UARTAPP_CTRL0_RUN 0x20000000 +#ifndef __ARCH_ARM___UARTAPP_H +#define __ARCH_ARM___UARTAPP_H 1 + +#define REGS_UARTAPP_BASE (STMP3XXX_REGS_BASE + 0x6c000) +#define REGS_UARTAPP1_BASE (STMP3XXX_REGS_BASE + 0x6c000) +#define REGS_UARTAPP1_PHYS (0x8006C000) +#define REGS_UARTAPP2_BASE (STMP3XXX_REGS_BASE + 0x6e000) +#define REGS_UARTAPP2_PHYS (0x8006E000) +#define REGS_UARTAPP_SIZE 0x00002000 + +#define HW_UARTAPP_CTRL0 (0x00000000) +#define HW_UARTAPP_CTRL0_SET (0x00000004) +#define HW_UARTAPP_CTRL0_CLR (0x00000008) +#define HW_UARTAPP_CTRL0_TOG (0x0000000c) +#define HW_UARTAPP_CTRL0_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL0) +#define HW_UARTAPP_CTRL0_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL0_SET) +#define HW_UARTAPP_CTRL0_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL0_CLR) +#define HW_UARTAPP_CTRL0_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL0_TOG) + #define BM_UARTAPP_CTRL0_SFTRST 0x80000000 -#define BM_UARTAPP_CTRL1_XFER_COUNT 0x0000FFFF -#define BP_UARTAPP_CTRL1_XFER_COUNT 0 +#define BM_UARTAPP_CTRL0_CLKGATE 0x40000000 +#define BM_UARTAPP_CTRL0_RUN 0x20000000 +#define BM_UARTAPP_CTRL0_RX_SOURCE 0x10000000 +#define BM_UARTAPP_CTRL0_RXTO_ENABLE 0x08000000 +#define BP_UARTAPP_CTRL0_RXTIMEOUT 16 +#define BM_UARTAPP_CTRL0_RXTIMEOUT 0x07FF0000 +#define BF_UARTAPP_CTRL0_RXTIMEOUT(v) \ + (((v) << 16) & BM_UARTAPP_CTRL0_RXTIMEOUT) +#define BP_UARTAPP_CTRL0_XFER_COUNT 0 +#define BM_UARTAPP_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_UARTAPP_CTRL0_XFER_COUNT(v) \ + (((v) << 0) & BM_UARTAPP_CTRL0_XFER_COUNT) + +#define HW_UARTAPP_CTRL1 (0x00000010) +#define HW_UARTAPP_CTRL1_SET (0x00000014) +#define HW_UARTAPP_CTRL1_CLR (0x00000018) +#define HW_UARTAPP_CTRL1_TOG (0x0000001c) +#define HW_UARTAPP_CTRL1_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL1) +#define HW_UARTAPP_CTRL1_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL1_SET) +#define HW_UARTAPP_CTRL1_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL1_CLR) +#define HW_UARTAPP_CTRL1_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL1_TOG) + +#define BP_UARTAPP_CTRL1_RSVD2 29 +#define BM_UARTAPP_CTRL1_RSVD2 0xE0000000 +#define BF_UARTAPP_CTRL1_RSVD2(v) \ + (((v) << 29) & BM_UARTAPP_CTRL1_RSVD2) #define BM_UARTAPP_CTRL1_RUN 0x10000000 +#define BP_UARTAPP_CTRL1_RSVD1 16 +#define BM_UARTAPP_CTRL1_RSVD1 0x0FFF0000 +#define BF_UARTAPP_CTRL1_RSVD1(v) \ + (((v) << 16) & BM_UARTAPP_CTRL1_RSVD1) +#define BP_UARTAPP_CTRL1_XFER_COUNT 0 +#define BM_UARTAPP_CTRL1_XFER_COUNT 0x0000FFFF +#define BF_UARTAPP_CTRL1_XFER_COUNT(v) \ + (((v) << 0) & BM_UARTAPP_CTRL1_XFER_COUNT) -#define HW_UARTAPP_CTRL2 0x20 -#define BM_UARTAPP_CTRL2_UARTEN 0x00000001 -#define BP_UARTAPP_CTRL2_UARTEN 0 -#define BM_UARTAPP_CTRL2_TXE 0x00000100 -#define BM_UARTAPP_CTRL2_RXE 0x00000200 -#define BM_UARTAPP_CTRL2_RTS 0x00000800 -#define BM_UARTAPP_CTRL2_RTSEN 0x00004000 -#define BM_UARTAPP_CTRL2_CTSEN 0x00008000 -#define BM_UARTAPP_CTRL2_RXDMAE 0x01000000 -#define BM_UARTAPP_CTRL2_TXDMAE 0x02000000 +#define HW_UARTAPP_CTRL2 (0x00000020) +#define HW_UARTAPP_CTRL2_SET (0x00000024) +#define HW_UARTAPP_CTRL2_CLR (0x00000028) +#define HW_UARTAPP_CTRL2_TOG (0x0000002c) +#define HW_UARTAPP_CTRL2_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL2) +#define HW_UARTAPP_CTRL2_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL2_SET) +#define HW_UARTAPP_CTRL2_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL2_CLR) +#define HW_UARTAPP_CTRL2_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_CTRL2_TOG) + +#define BM_UARTAPP_CTRL2_INVERT_RTS 0x80000000 +#define BM_UARTAPP_CTRL2_INVERT_CTS 0x40000000 +#define BM_UARTAPP_CTRL2_INVERT_TX 0x20000000 +#define BM_UARTAPP_CTRL2_INVERT_RX 0x10000000 +#define BM_UARTAPP_CTRL2_RTS_SEMAPHORE 0x08000000 #define BM_UARTAPP_CTRL2_DMAONERR 0x04000000 +#define BM_UARTAPP_CTRL2_TXDMAE 0x02000000 +#define BM_UARTAPP_CTRL2_RXDMAE 0x01000000 +#define BM_UARTAPP_CTRL2_RSVD2 0x00800000 +#define BP_UARTAPP_CTRL2_RXIFLSEL 20 +#define BM_UARTAPP_CTRL2_RXIFLSEL 0x00700000 +#define BF_UARTAPP_CTRL2_RXIFLSEL(v) \ + (((v) << 20) & BM_UARTAPP_CTRL2_RXIFLSEL) +#define BV_UARTAPP_CTRL2_RXIFLSEL__NOT_EMPTY 0x0 +#define BV_UARTAPP_CTRL2_RXIFLSEL__ONE_QUARTER 0x1 +#define BV_UARTAPP_CTRL2_RXIFLSEL__ONE_HALF 0x2 +#define BV_UARTAPP_CTRL2_RXIFLSEL__THREE_QUARTERS 0x3 +#define BV_UARTAPP_CTRL2_RXIFLSEL__SEVEN_EIGHTHS 0x4 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID5 0x5 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID6 0x6 +#define BV_UARTAPP_CTRL2_RXIFLSEL__INVALID7 0x7 +#define BM_UARTAPP_CTRL2_RSVD3 0x00080000 +#define BP_UARTAPP_CTRL2_TXIFLSEL 16 +#define BM_UARTAPP_CTRL2_TXIFLSEL 0x00070000 +#define BF_UARTAPP_CTRL2_TXIFLSEL(v) \ + (((v) << 16) & BM_UARTAPP_CTRL2_TXIFLSEL) +#define BV_UARTAPP_CTRL2_TXIFLSEL__EMPTY 0x0 +#define BV_UARTAPP_CTRL2_TXIFLSEL__ONE_QUARTER 0x1 +#define BV_UARTAPP_CTRL2_TXIFLSEL__ONE_HALF 0x2 +#define BV_UARTAPP_CTRL2_TXIFLSEL__THREE_QUARTERS 0x3 +#define BV_UARTAPP_CTRL2_TXIFLSEL__SEVEN_EIGHTHS 0x4 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID5 0x5 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID6 0x6 +#define BV_UARTAPP_CTRL2_TXIFLSEL__INVALID7 0x7 +#define BM_UARTAPP_CTRL2_CTSEN 0x00008000 +#define BM_UARTAPP_CTRL2_RTSEN 0x00004000 +#define BM_UARTAPP_CTRL2_OUT2 0x00002000 +#define BM_UARTAPP_CTRL2_OUT1 0x00001000 +#define BM_UARTAPP_CTRL2_RTS 0x00000800 +#define BM_UARTAPP_CTRL2_DTR 0x00000400 +#define BM_UARTAPP_CTRL2_RXE 0x00000200 +#define BM_UARTAPP_CTRL2_TXE 0x00000100 +#define BM_UARTAPP_CTRL2_LBE 0x00000080 +#define BM_UARTAPP_CTRL2_USE_LCR2 0x00000040 +#define BP_UARTAPP_CTRL2_RSVD4 3 +#define BM_UARTAPP_CTRL2_RSVD4 0x00000038 +#define BF_UARTAPP_CTRL2_RSVD4(v) \ + (((v) << 3) & BM_UARTAPP_CTRL2_RSVD4) +#define BM_UARTAPP_CTRL2_SIRLP 0x00000004 +#define BM_UARTAPP_CTRL2_SIREN 0x00000002 +#define BM_UARTAPP_CTRL2_UARTEN 0x00000001 + +#define HW_UARTAPP_LINECTRL (0x00000030) +#define HW_UARTAPP_LINECTRL_SET (0x00000034) +#define HW_UARTAPP_LINECTRL_CLR (0x00000038) +#define HW_UARTAPP_LINECTRL_TOG (0x0000003c) +#define HW_UARTAPP_LINECTRL_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL) +#define HW_UARTAPP_LINECTRL_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL_SET) +#define HW_UARTAPP_LINECTRL_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL_CLR) +#define HW_UARTAPP_LINECTRL_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL_TOG) -#define HW_UARTAPP_LINECTRL 0x30 -#define BM_UARTAPP_LINECTRL_BRK 0x00000001 -#define BP_UARTAPP_LINECTRL_BRK 0 -#define BM_UARTAPP_LINECTRL_PEN 0x00000002 -#define BM_UARTAPP_LINECTRL_EPS 0x00000004 -#define BM_UARTAPP_LINECTRL_STP2 0x00000008 -#define BM_UARTAPP_LINECTRL_FEN 0x00000010 -#define BM_UARTAPP_LINECTRL_WLEN 0x00000060 -#define BP_UARTAPP_LINECTRL_WLEN 5 -#define BM_UARTAPP_LINECTRL_SPS 0x00000080 -#define BM_UARTAPP_LINECTRL_BAUD_DIVFRAC 0x00003F00 -#define BP_UARTAPP_LINECTRL_BAUD_DIVFRAC 8 -#define BM_UARTAPP_LINECTRL_BAUD_DIVINT 0xFFFF0000 #define BP_UARTAPP_LINECTRL_BAUD_DIVINT 16 +#define BM_UARTAPP_LINECTRL_BAUD_DIVINT 0xFFFF0000 +#define BF_UARTAPP_LINECTRL_BAUD_DIVINT(v) \ + (((v) << 16) & BM_UARTAPP_LINECTRL_BAUD_DIVINT) +#define BP_UARTAPP_LINECTRL_RSVD 14 +#define BM_UARTAPP_LINECTRL_RSVD 0x0000C000 +#define BF_UARTAPP_LINECTRL_RSVD(v) \ + (((v) << 14) & BM_UARTAPP_LINECTRL_RSVD) +#define BP_UARTAPP_LINECTRL_BAUD_DIVFRAC 8 +#define BM_UARTAPP_LINECTRL_BAUD_DIVFRAC 0x00003F00 +#define BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(v) \ + (((v) << 8) & BM_UARTAPP_LINECTRL_BAUD_DIVFRAC) +#define BM_UARTAPP_LINECTRL_SPS 0x00000080 +#define BP_UARTAPP_LINECTRL_WLEN 5 +#define BM_UARTAPP_LINECTRL_WLEN 0x00000060 +#define BF_UARTAPP_LINECTRL_WLEN(v) \ + (((v) << 5) & BM_UARTAPP_LINECTRL_WLEN) +#define BM_UARTAPP_LINECTRL_FEN 0x00000010 +#define BM_UARTAPP_LINECTRL_STP2 0x00000008 +#define BM_UARTAPP_LINECTRL_EPS 0x00000004 +#define BM_UARTAPP_LINECTRL_PEN 0x00000002 +#define BM_UARTAPP_LINECTRL_BRK 0x00000001 -#define HW_UARTAPP_INTR 0x50 -#define BM_UARTAPP_INTR_CTSMIS 0x00000002 -#define BM_UARTAPP_INTR_RTIS 0x00000040 -#define BM_UARTAPP_INTR_CTSMIEN 0x00020000 -#define BM_UARTAPP_INTR_RXIEN 0x00100000 +#define HW_UARTAPP_LINECTRL2 (0x00000040) +#define HW_UARTAPP_LINECTRL2_SET (0x00000044) +#define HW_UARTAPP_LINECTRL2_CLR (0x00000048) +#define HW_UARTAPP_LINECTRL2_TOG (0x0000004c) +#define HW_UARTAPP_LINECTRL2_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL2) +#define HW_UARTAPP_LINECTRL2_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL2_SET) +#define HW_UARTAPP_LINECTRL2_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL2_CLR) +#define HW_UARTAPP_LINECTRL2_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_LINECTRL2_TOG) + +#define BP_UARTAPP_LINECTRL2_BAUD_DIVINT 16 +#define BM_UARTAPP_LINECTRL2_BAUD_DIVINT 0xFFFF0000 +#define BF_UARTAPP_LINECTRL2_BAUD_DIVINT(v) \ + (((v) << 16) & BM_UARTAPP_LINECTRL2_BAUD_DIVINT) +#define BP_UARTAPP_LINECTRL2_RSVD 14 +#define BM_UARTAPP_LINECTRL2_RSVD 0x0000C000 +#define BF_UARTAPP_LINECTRL2_RSVD(v) \ + (((v) << 14) & BM_UARTAPP_LINECTRL2_RSVD) +#define BP_UARTAPP_LINECTRL2_BAUD_DIVFRAC 8 +#define BM_UARTAPP_LINECTRL2_BAUD_DIVFRAC 0x00003F00 +#define BF_UARTAPP_LINECTRL2_BAUD_DIVFRAC(v) \ + (((v) << 8) & BM_UARTAPP_LINECTRL2_BAUD_DIVFRAC) +#define BM_UARTAPP_LINECTRL2_SPS 0x00000080 +#define BP_UARTAPP_LINECTRL2_WLEN 5 +#define BM_UARTAPP_LINECTRL2_WLEN 0x00000060 +#define BF_UARTAPP_LINECTRL2_WLEN(v) \ + (((v) << 5) & BM_UARTAPP_LINECTRL2_WLEN) +#define BM_UARTAPP_LINECTRL2_FEN 0x00000010 +#define BM_UARTAPP_LINECTRL2_STP2 0x00000008 +#define BM_UARTAPP_LINECTRL2_EPS 0x00000004 +#define BM_UARTAPP_LINECTRL2_PEN 0x00000002 +#define BM_UARTAPP_LINECTRL2_RSVD1 0x00000001 + +#define HW_UARTAPP_INTR (0x00000050) +#define HW_UARTAPP_INTR_SET (0x00000054) +#define HW_UARTAPP_INTR_CLR (0x00000058) +#define HW_UARTAPP_INTR_TOG (0x0000005c) +#define HW_UARTAPP_INTR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_INTR) +#define HW_UARTAPP_INTR_SET_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_INTR_SET) +#define HW_UARTAPP_INTR_CLR_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_INTR_CLR) +#define HW_UARTAPP_INTR_TOG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_INTR_TOG) + +#define BP_UARTAPP_INTR_RSVD1 27 +#define BM_UARTAPP_INTR_RSVD1 0xF8000000 +#define BF_UARTAPP_INTR_RSVD1(v) \ + (((v) << 27) & BM_UARTAPP_INTR_RSVD1) +#define BM_UARTAPP_INTR_OEIEN 0x04000000 +#define BM_UARTAPP_INTR_BEIEN 0x02000000 +#define BM_UARTAPP_INTR_PEIEN 0x01000000 +#define BM_UARTAPP_INTR_FEIEN 0x00800000 #define BM_UARTAPP_INTR_RTIEN 0x00400000 +#define BM_UARTAPP_INTR_TXIEN 0x00200000 +#define BM_UARTAPP_INTR_RXIEN 0x00100000 +#define BM_UARTAPP_INTR_DSRMIEN 0x00080000 +#define BM_UARTAPP_INTR_DCDMIEN 0x00040000 +#define BM_UARTAPP_INTR_CTSMIEN 0x00020000 +#define BM_UARTAPP_INTR_RIMIEN 0x00010000 +#define BP_UARTAPP_INTR_RSVD2 11 +#define BM_UARTAPP_INTR_RSVD2 0x0000F800 +#define BF_UARTAPP_INTR_RSVD2(v) \ + (((v) << 11) & BM_UARTAPP_INTR_RSVD2) +#define BM_UARTAPP_INTR_OEIS 0x00000400 +#define BM_UARTAPP_INTR_BEIS 0x00000200 +#define BM_UARTAPP_INTR_PEIS 0x00000100 +#define BM_UARTAPP_INTR_FEIS 0x00000080 +#define BM_UARTAPP_INTR_RTIS 0x00000040 +#define BM_UARTAPP_INTR_TXIS 0x00000020 +#define BM_UARTAPP_INTR_RXIS 0x00000010 +#define BM_UARTAPP_INTR_DSRMIS 0x00000008 +#define BM_UARTAPP_INTR_DCDMIS 0x00000004 +#define BM_UARTAPP_INTR_CTSMIS 0x00000002 +#define BM_UARTAPP_INTR_RIMIS 0x00000001 -#define HW_UARTAPP_DATA 0x60 +#define HW_UARTAPP_DATA (0x00000060) +#define HW_UARTAPP_DATA_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_DATA) -#define HW_UARTAPP_STAT 0x70 -#define BM_UARTAPP_STAT_RXCOUNT 0x0000FFFF -#define BP_UARTAPP_STAT_RXCOUNT 0 -#define BM_UARTAPP_STAT_FERR 0x00010000 -#define BM_UARTAPP_STAT_PERR 0x00020000 -#define BM_UARTAPP_STAT_BERR 0x00040000 -#define BM_UARTAPP_STAT_OERR 0x00080000 -#define BM_UARTAPP_STAT_RXFE 0x01000000 -#define BM_UARTAPP_STAT_TXFF 0x02000000 -#define BM_UARTAPP_STAT_TXFE 0x08000000 +#define BP_UARTAPP_DATA_DATA 0 +#define BM_UARTAPP_DATA_DATA 0xFFFFFFFF +#define BF_UARTAPP_DATA_DATA(v) (v) + +#define HW_UARTAPP_STAT (0x00000070) +#define HW_UARTAPP_STAT_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_STAT) + +#define BM_UARTAPP_STAT_PRESENT 0x80000000 +#define BV_UARTAPP_STAT_PRESENT__UNAVAILABLE 0x0 +#define BV_UARTAPP_STAT_PRESENT__AVAILABLE 0x1 +#define BM_UARTAPP_STAT_HISPEED 0x40000000 +#define BV_UARTAPP_STAT_HISPEED__UNAVAILABLE 0x0 +#define BV_UARTAPP_STAT_HISPEED__AVAILABLE 0x1 +#define BM_UARTAPP_STAT_BUSY 0x20000000 #define BM_UARTAPP_STAT_CTS 0x10000000 +#define BM_UARTAPP_STAT_TXFE 0x08000000 +#define BM_UARTAPP_STAT_RXFF 0x04000000 +#define BM_UARTAPP_STAT_TXFF 0x02000000 +#define BM_UARTAPP_STAT_RXFE 0x01000000 +#define BP_UARTAPP_STAT_RXBYTE_INVALID 20 +#define BM_UARTAPP_STAT_RXBYTE_INVALID 0x00F00000 +#define BF_UARTAPP_STAT_RXBYTE_INVALID(v) \ + (((v) << 20) & BM_UARTAPP_STAT_RXBYTE_INVALID) +#define BM_UARTAPP_STAT_OERR 0x00080000 +#define BM_UARTAPP_STAT_BERR 0x00040000 +#define BM_UARTAPP_STAT_PERR 0x00020000 +#define BM_UARTAPP_STAT_FERR 0x00010000 +#define BP_UARTAPP_STAT_RXCOUNT 0 +#define BM_UARTAPP_STAT_RXCOUNT 0x0000FFFF +#define BF_UARTAPP_STAT_RXCOUNT(v) \ + (((v) << 0) & BM_UARTAPP_STAT_RXCOUNT) + +#define HW_UARTAPP_DEBUG (0x00000080) +#define HW_UARTAPP_DEBUG_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_DEBUG) + +#define BP_UARTAPP_DEBUG_RXIBAUD_DIV 16 +#define BM_UARTAPP_DEBUG_RXIBAUD_DIV 0xFFFF0000 +#define BF_UARTAPP_DEBUG_RXIBAUD_DIV(v) \ + (((v) << 16) & BM_UARTAPP_DEBUG_RXIBAUD_DIV) +#define BP_UARTAPP_DEBUG_RXFBAUD_DIV 10 +#define BM_UARTAPP_DEBUG_RXFBAUD_DIV 0x0000FC00 +#define BF_UARTAPP_DEBUG_RXFBAUD_DIV(v) \ + (((v) << 10) & BM_UARTAPP_DEBUG_RXFBAUD_DIV) +#define BP_UARTAPP_DEBUG_RSVD1 6 +#define BM_UARTAPP_DEBUG_RSVD1 0x000003C0 +#define BF_UARTAPP_DEBUG_RSVD1(v) \ + (((v) << 6) & BM_UARTAPP_DEBUG_RSVD1) +#define BM_UARTAPP_DEBUG_TXDMARUN 0x00000020 +#define BM_UARTAPP_DEBUG_RXDMARUN 0x00000010 +#define BM_UARTAPP_DEBUG_TXCMDEND 0x00000008 +#define BM_UARTAPP_DEBUG_RXCMDEND 0x00000004 +#define BM_UARTAPP_DEBUG_TXDMARQ 0x00000002 +#define BM_UARTAPP_DEBUG_RXDMARQ 0x00000001 + +#define HW_UARTAPP_VERSION (0x00000090) +#define HW_UARTAPP_VERSION_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_VERSION) + +#define BP_UARTAPP_VERSION_MAJOR 24 +#define BM_UARTAPP_VERSION_MAJOR 0xFF000000 +#define BF_UARTAPP_VERSION_MAJOR(v) \ + (((v) << 24) & BM_UARTAPP_VERSION_MAJOR) +#define BP_UARTAPP_VERSION_MINOR 16 +#define BM_UARTAPP_VERSION_MINOR 0x00FF0000 +#define BF_UARTAPP_VERSION_MINOR(v) \ + (((v) << 16) & BM_UARTAPP_VERSION_MINOR) +#define BP_UARTAPP_VERSION_STEP 0 +#define BM_UARTAPP_VERSION_STEP 0x0000FFFF +#define BF_UARTAPP_VERSION_STEP(v) \ + (((v) << 0) & BM_UARTAPP_VERSION_STEP) + +#define HW_UARTAPP_AUTOBAUD (0x000000a0) +#define HW_UARTAPP_AUTOBAUD_ADDR(x) \ + (REGS_UARTAPP_BASE(x) + HW_UARTAPP_AUTOBAUD) -#define HW_UARTAPP_VERSION 0x90 +#define BP_UARTAPP_AUTOBAUD_REFCHAR1 24 +#define BM_UARTAPP_AUTOBAUD_REFCHAR1 0xFF000000 +#define BF_UARTAPP_AUTOBAUD_REFCHAR1(v) \ + (((v) << 24) & BM_UARTAPP_AUTOBAUD_REFCHAR1) +#define BP_UARTAPP_AUTOBAUD_REFCHAR0 16 +#define BM_UARTAPP_AUTOBAUD_REFCHAR0 0x00FF0000 +#define BF_UARTAPP_AUTOBAUD_REFCHAR0(v) \ + (((v) << 16) & BM_UARTAPP_AUTOBAUD_REFCHAR0) +#define BP_UARTAPP_AUTOBAUD_RSVD1 5 +#define BM_UARTAPP_AUTOBAUD_RSVD1 0x0000FFE0 +#define BF_UARTAPP_AUTOBAUD_RSVD1(v) \ + (((v) << 5) & BM_UARTAPP_AUTOBAUD_RSVD1) +#define BM_UARTAPP_AUTOBAUD_UPDATE_TX 0x00000010 +#define BM_UARTAPP_AUTOBAUD_TWO_REF_CHARS 0x00000008 +#define BM_UARTAPP_AUTOBAUD_START_WITH_RUNBIT 0x00000004 +#define BM_UARTAPP_AUTOBAUD_START_BAUD_DETECT 0x00000002 +#define BM_UARTAPP_AUTOBAUD_BAUD_DETECT_ENABLE 0x00000001 +#endif /* __ARCH_ARM___UARTAPP_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-audioin.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-audioin.h @@ -1,7 +1,7 @@ /* - * stmp378x: AUDIOIN register definitions + * STMP AUDIOIN Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,47 +17,342 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_AUDIOIN_BASE (STMP3XXX_REGS_BASE + 0x4C000) -#define REGS_AUDIOIN_PHYS 0x8004C000 -#define REGS_AUDIOIN_SIZE 0x2000 -#define HW_AUDIOIN_CTRL 0x0 -#define BM_AUDIOIN_CTRL_RUN 0x00000001 -#define BP_AUDIOIN_CTRL_RUN 0 -#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 -#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 -#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 -#define BM_AUDIOIN_CTRL_WORD_LENGTH 0x00000020 -#define BM_AUDIOIN_CTRL_CLKGATE 0x40000000 +#ifndef __ARCH_ARM___AUDIOIN_H +#define __ARCH_ARM___AUDIOIN_H 1 + +#define REGS_AUDIOIN_BASE (STMP3XXX_REGS_BASE + 0x4c000) +#define REGS_AUDIOIN_PHYS (0x8004C000) +#define REGS_AUDIOIN_SIZE 0x00002000 + +#define HW_AUDIOIN_CTRL (0x00000000) +#define HW_AUDIOIN_CTRL_SET (0x00000004) +#define HW_AUDIOIN_CTRL_CLR (0x00000008) +#define HW_AUDIOIN_CTRL_TOG (0x0000000c) +#define HW_AUDIOIN_CTRL_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL) +#define HW_AUDIOIN_CTRL_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_SET) +#define HW_AUDIOIN_CTRL_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_CLR) +#define HW_AUDIOIN_CTRL_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_CTRL_TOG) + #define BM_AUDIOIN_CTRL_SFTRST 0x80000000 +#define BM_AUDIOIN_CTRL_CLKGATE 0x40000000 +#define BP_AUDIOIN_CTRL_RSRVD3 21 +#define BM_AUDIOIN_CTRL_RSRVD3 0x3FE00000 +#define BF_AUDIOIN_CTRL_RSRVD3(v) \ + (((v) << 21) & BM_AUDIOIN_CTRL_RSRVD3) +#define BP_AUDIOIN_CTRL_DMAWAIT_COUNT 16 +#define BM_AUDIOIN_CTRL_DMAWAIT_COUNT 0x001F0000 +#define BF_AUDIOIN_CTRL_DMAWAIT_COUNT(v) \ + (((v) << 16) & BM_AUDIOIN_CTRL_DMAWAIT_COUNT) +#define BP_AUDIOIN_CTRL_RSRVD1 11 +#define BM_AUDIOIN_CTRL_RSRVD1 0x0000F800 +#define BF_AUDIOIN_CTRL_RSRVD1(v) \ + (((v) << 11) & BM_AUDIOIN_CTRL_RSRVD1) +#define BM_AUDIOIN_CTRL_LR_SWAP 0x00000400 +#define BM_AUDIOIN_CTRL_EDGE_SYNC 0x00000200 +#define BM_AUDIOIN_CTRL_INVERT_1BIT 0x00000100 +#define BM_AUDIOIN_CTRL_OFFSET_ENABLE 0x00000080 +#define BM_AUDIOIN_CTRL_HPF_ENABLE 0x00000040 +#define BM_AUDIOIN_CTRL_WORD_LENGTH 0x00000020 +#define BM_AUDIOIN_CTRL_LOOPBACK 0x00000010 +#define BM_AUDIOIN_CTRL_FIFO_UNDERFLOW_IRQ 0x00000008 +#define BM_AUDIOIN_CTRL_FIFO_OVERFLOW_IRQ 0x00000004 +#define BM_AUDIOIN_CTRL_FIFO_ERROR_IRQ_EN 0x00000002 +#define BM_AUDIOIN_CTRL_RUN 0x00000001 -#define HW_AUDIOIN_STAT 0x10 +#define HW_AUDIOIN_STAT (0x00000010) +#define HW_AUDIOIN_STAT_SET (0x00000014) +#define HW_AUDIOIN_STAT_CLR (0x00000018) +#define HW_AUDIOIN_STAT_TOG (0x0000001c) +#define HW_AUDIOIN_STAT_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_STAT) +#define HW_AUDIOIN_STAT_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_STAT_SET) +#define HW_AUDIOIN_STAT_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_STAT_CLR) +#define HW_AUDIOIN_STAT_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_STAT_TOG) -#define HW_AUDIOIN_ADCSRR 0x20 +#define BM_AUDIOIN_STAT_ADC_PRESENT 0x80000000 +#define BP_AUDIOIN_STAT_RSRVD3 0 +#define BM_AUDIOIN_STAT_RSRVD3 0x7FFFFFFF +#define BF_AUDIOIN_STAT_RSRVD3(v) \ + (((v) << 0) & BM_AUDIOIN_STAT_RSRVD3) -#define HW_AUDIOIN_ADCVOLUME 0x30 -#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0x000000FF -#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0 -#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0x00FF0000 +#define HW_AUDIOIN_ADCSRR (0x00000020) +#define HW_AUDIOIN_ADCSRR_SET (0x00000024) +#define HW_AUDIOIN_ADCSRR_CLR (0x00000028) +#define HW_AUDIOIN_ADCSRR_TOG (0x0000002c) +#define HW_AUDIOIN_ADCSRR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR) +#define HW_AUDIOIN_ADCSRR_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR_SET) +#define HW_AUDIOIN_ADCSRR_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR_CLR) +#define HW_AUDIOIN_ADCSRR_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCSRR_TOG) + +#define BM_AUDIOIN_ADCSRR_OSR 0x80000000 +#define BV_AUDIOIN_ADCSRR_OSR__OSR6 0x0 +#define BV_AUDIOIN_ADCSRR_OSR__OSR12 0x1 +#define BP_AUDIOIN_ADCSRR_BASEMULT 28 +#define BM_AUDIOIN_ADCSRR_BASEMULT 0x70000000 +#define BF_AUDIOIN_ADCSRR_BASEMULT(v) \ + (((v) << 28) & BM_AUDIOIN_ADCSRR_BASEMULT) +#define BV_AUDIOIN_ADCSRR_BASEMULT__SINGLE_RATE 0x1 +#define BV_AUDIOIN_ADCSRR_BASEMULT__DOUBLE_RATE 0x2 +#define BV_AUDIOIN_ADCSRR_BASEMULT__QUAD_RATE 0x4 +#define BM_AUDIOIN_ADCSRR_RSRVD2 0x08000000 +#define BP_AUDIOIN_ADCSRR_SRC_HOLD 24 +#define BM_AUDIOIN_ADCSRR_SRC_HOLD 0x07000000 +#define BF_AUDIOIN_ADCSRR_SRC_HOLD(v) \ + (((v) << 24) & BM_AUDIOIN_ADCSRR_SRC_HOLD) +#define BP_AUDIOIN_ADCSRR_RSRVD1 21 +#define BM_AUDIOIN_ADCSRR_RSRVD1 0x00E00000 +#define BF_AUDIOIN_ADCSRR_RSRVD1(v) \ + (((v) << 21) & BM_AUDIOIN_ADCSRR_RSRVD1) +#define BP_AUDIOIN_ADCSRR_SRC_INT 16 +#define BM_AUDIOIN_ADCSRR_SRC_INT 0x001F0000 +#define BF_AUDIOIN_ADCSRR_SRC_INT(v) \ + (((v) << 16) & BM_AUDIOIN_ADCSRR_SRC_INT) +#define BP_AUDIOIN_ADCSRR_RSRVD0 13 +#define BM_AUDIOIN_ADCSRR_RSRVD0 0x0000E000 +#define BF_AUDIOIN_ADCSRR_RSRVD0(v) \ + (((v) << 13) & BM_AUDIOIN_ADCSRR_RSRVD0) +#define BP_AUDIOIN_ADCSRR_SRC_FRAC 0 +#define BM_AUDIOIN_ADCSRR_SRC_FRAC 0x00001FFF +#define BF_AUDIOIN_ADCSRR_SRC_FRAC(v) \ + (((v) << 0) & BM_AUDIOIN_ADCSRR_SRC_FRAC) + +#define HW_AUDIOIN_ADCVOLUME (0x00000030) +#define HW_AUDIOIN_ADCVOLUME_SET (0x00000034) +#define HW_AUDIOIN_ADCVOLUME_CLR (0x00000038) +#define HW_AUDIOIN_ADCVOLUME_TOG (0x0000003c) +#define HW_AUDIOIN_ADCVOLUME_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME) +#define HW_AUDIOIN_ADCVOLUME_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME_SET) +#define HW_AUDIOIN_ADCVOLUME_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME_CLR) +#define HW_AUDIOIN_ADCVOLUME_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOLUME_TOG) + +#define BP_AUDIOIN_ADCVOLUME_RSRVD5 29 +#define BM_AUDIOIN_ADCVOLUME_RSRVD5 0xE0000000 +#define BF_AUDIOIN_ADCVOLUME_RSRVD5(v) \ + (((v) << 29) & BM_AUDIOIN_ADCVOLUME_RSRVD5) +#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_LEFT 0x10000000 +#define BP_AUDIOIN_ADCVOLUME_RSRVD4 26 +#define BM_AUDIOIN_ADCVOLUME_RSRVD4 0x0C000000 +#define BF_AUDIOIN_ADCVOLUME_RSRVD4(v) \ + (((v) << 26) & BM_AUDIOIN_ADCVOLUME_RSRVD4) +#define BM_AUDIOIN_ADCVOLUME_EN_ZCD 0x02000000 +#define BM_AUDIOIN_ADCVOLUME_RSRVD3 0x01000000 #define BP_AUDIOIN_ADCVOLUME_VOLUME_LEFT 16 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT 0x00FF0000 +#define BF_AUDIOIN_ADCVOLUME_VOLUME_LEFT(v) \ + (((v) << 16) & BM_AUDIOIN_ADCVOLUME_VOLUME_LEFT) +#define BP_AUDIOIN_ADCVOLUME_RSRVD2 13 +#define BM_AUDIOIN_ADCVOLUME_RSRVD2 0x0000E000 +#define BF_AUDIOIN_ADCVOLUME_RSRVD2(v) \ + (((v) << 13) & BM_AUDIOIN_ADCVOLUME_RSRVD2) +#define BM_AUDIOIN_ADCVOLUME_VOLUME_UPDATE_RIGHT 0x00001000 +#define BP_AUDIOIN_ADCVOLUME_RSRVD1 8 +#define BM_AUDIOIN_ADCVOLUME_RSRVD1 0x00000F00 +#define BF_AUDIOIN_ADCVOLUME_RSRVD1(v) \ + (((v) << 8) & BM_AUDIOIN_ADCVOLUME_RSRVD1) +#define BP_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0 +#define BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT 0x000000FF +#define BF_AUDIOIN_ADCVOLUME_VOLUME_RIGHT(v) \ + (((v) << 0) & BM_AUDIOIN_ADCVOLUME_VOLUME_RIGHT) -#define HW_AUDIOIN_ADCDEBUG 0x40 +#define HW_AUDIOIN_ADCDEBUG (0x00000040) +#define HW_AUDIOIN_ADCDEBUG_SET (0x00000044) +#define HW_AUDIOIN_ADCDEBUG_CLR (0x00000048) +#define HW_AUDIOIN_ADCDEBUG_TOG (0x0000004c) +#define HW_AUDIOIN_ADCDEBUG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCDEBUG) +#define HW_AUDIOIN_ADCDEBUG_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCDEBUG_SET) +#define HW_AUDIOIN_ADCDEBUG_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCDEBUG_CLR) +#define HW_AUDIOIN_ADCDEBUG_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCDEBUG_TOG) -#define HW_AUDIOIN_ADCVOL 0x50 -#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT 0x0000000F -#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT 0 -#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT 0x00000030 -#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT 4 -#define BM_AUDIOIN_ADCVOL_GAIN_LEFT 0x00000F00 -#define BP_AUDIOIN_ADCVOL_GAIN_LEFT 8 -#define BM_AUDIOIN_ADCVOL_SELECT_LEFT 0x00003000 -#define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12 +#define BM_AUDIOIN_ADCDEBUG_ENABLE_ADCDMA 0x80000000 +#define BP_AUDIOIN_ADCDEBUG_RSRVD1 4 +#define BM_AUDIOIN_ADCDEBUG_RSRVD1 0x7FFFFFF0 +#define BF_AUDIOIN_ADCDEBUG_RSRVD1(v) \ + (((v) << 4) & BM_AUDIOIN_ADCDEBUG_RSRVD1) +#define BM_AUDIOIN_ADCDEBUG_ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS 0x00000008 +#define BM_AUDIOIN_ADCDEBUG_SET_INTERRUPT3_HAND_SHAKE 0x00000004 +#define BM_AUDIOIN_ADCDEBUG_DMA_PREQ 0x00000002 +#define BM_AUDIOIN_ADCDEBUG_FIFO_STATUS 0x00000001 + +#define HW_AUDIOIN_ADCVOL (0x00000050) +#define HW_AUDIOIN_ADCVOL_SET (0x00000054) +#define HW_AUDIOIN_ADCVOL_CLR (0x00000058) +#define HW_AUDIOIN_ADCVOL_TOG (0x0000005c) +#define HW_AUDIOIN_ADCVOL_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL) +#define HW_AUDIOIN_ADCVOL_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_SET) +#define HW_AUDIOIN_ADCVOL_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_CLR) +#define HW_AUDIOIN_ADCVOL_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ADCVOL_TOG) + +#define BP_AUDIOIN_ADCVOL_RSRVD4 29 +#define BM_AUDIOIN_ADCVOL_RSRVD4 0xE0000000 +#define BF_AUDIOIN_ADCVOL_RSRVD4(v) \ + (((v) << 29) & BM_AUDIOIN_ADCVOL_RSRVD4) +#define BM_AUDIOIN_ADCVOL_VOLUME_UPDATE_PENDING 0x10000000 +#define BP_AUDIOIN_ADCVOL_RSRVD3 26 +#define BM_AUDIOIN_ADCVOL_RSRVD3 0x0C000000 +#define BF_AUDIOIN_ADCVOL_RSRVD3(v) \ + (((v) << 26) & BM_AUDIOIN_ADCVOL_RSRVD3) +#define BM_AUDIOIN_ADCVOL_EN_ADC_ZCD 0x02000000 #define BM_AUDIOIN_ADCVOL_MUTE 0x01000000 +#define BP_AUDIOIN_ADCVOL_RSRVD2 14 +#define BM_AUDIOIN_ADCVOL_RSRVD2 0x00FFC000 +#define BF_AUDIOIN_ADCVOL_RSRVD2(v) \ + (((v) << 14) & BM_AUDIOIN_ADCVOL_RSRVD2) +#define BP_AUDIOIN_ADCVOL_SELECT_LEFT 12 +#define BM_AUDIOIN_ADCVOL_SELECT_LEFT 0x00003000 +#define BF_AUDIOIN_ADCVOL_SELECT_LEFT(v) \ + (((v) << 12) & BM_AUDIOIN_ADCVOL_SELECT_LEFT) +#define BP_AUDIOIN_ADCVOL_GAIN_LEFT 8 +#define BM_AUDIOIN_ADCVOL_GAIN_LEFT 0x00000F00 +#define BF_AUDIOIN_ADCVOL_GAIN_LEFT(v) \ + (((v) << 8) & BM_AUDIOIN_ADCVOL_GAIN_LEFT) +#define BP_AUDIOIN_ADCVOL_RSRVD1 6 +#define BM_AUDIOIN_ADCVOL_RSRVD1 0x000000C0 +#define BF_AUDIOIN_ADCVOL_RSRVD1(v) \ + (((v) << 6) & BM_AUDIOIN_ADCVOL_RSRVD1) +#define BP_AUDIOIN_ADCVOL_SELECT_RIGHT 4 +#define BM_AUDIOIN_ADCVOL_SELECT_RIGHT 0x00000030 +#define BF_AUDIOIN_ADCVOL_SELECT_RIGHT(v) \ + (((v) << 4) & BM_AUDIOIN_ADCVOL_SELECT_RIGHT) +#define BP_AUDIOIN_ADCVOL_GAIN_RIGHT 0 +#define BM_AUDIOIN_ADCVOL_GAIN_RIGHT 0x0000000F +#define BF_AUDIOIN_ADCVOL_GAIN_RIGHT(v) \ + (((v) << 0) & BM_AUDIOIN_ADCVOL_GAIN_RIGHT) + +#define HW_AUDIOIN_MICLINE (0x00000060) +#define HW_AUDIOIN_MICLINE_SET (0x00000064) +#define HW_AUDIOIN_MICLINE_CLR (0x00000068) +#define HW_AUDIOIN_MICLINE_TOG (0x0000006c) +#define HW_AUDIOIN_MICLINE_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE) +#define HW_AUDIOIN_MICLINE_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_SET) +#define HW_AUDIOIN_MICLINE_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_CLR) +#define HW_AUDIOIN_MICLINE_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_MICLINE_TOG) -#define HW_AUDIOIN_MICLINE 0x60 +#define BP_AUDIOIN_MICLINE_RSRVD6 30 +#define BM_AUDIOIN_MICLINE_RSRVD6 0xC0000000 +#define BF_AUDIOIN_MICLINE_RSRVD6(v) \ + (((v) << 30) & BM_AUDIOIN_MICLINE_RSRVD6) +#define BM_AUDIOIN_MICLINE_DIVIDE_LINE1 0x20000000 +#define BM_AUDIOIN_MICLINE_DIVIDE_LINE2 0x10000000 +#define BP_AUDIOIN_MICLINE_RSRVD5 25 +#define BM_AUDIOIN_MICLINE_RSRVD5 0x0E000000 +#define BF_AUDIOIN_MICLINE_RSRVD5(v) \ + (((v) << 25) & BM_AUDIOIN_MICLINE_RSRVD5) +#define BM_AUDIOIN_MICLINE_MIC_SELECT 0x01000000 +#define BP_AUDIOIN_MICLINE_RSRVD4 22 +#define BM_AUDIOIN_MICLINE_RSRVD4 0x00C00000 +#define BF_AUDIOIN_MICLINE_RSRVD4(v) \ + (((v) << 22) & BM_AUDIOIN_MICLINE_RSRVD4) +#define BP_AUDIOIN_MICLINE_MIC_RESISTOR 20 +#define BM_AUDIOIN_MICLINE_MIC_RESISTOR 0x00300000 +#define BF_AUDIOIN_MICLINE_MIC_RESISTOR(v) \ + (((v) << 20) & BM_AUDIOIN_MICLINE_MIC_RESISTOR) +#define BM_AUDIOIN_MICLINE_RSRVD3 0x00080000 +#define BP_AUDIOIN_MICLINE_MIC_BIAS 16 +#define BM_AUDIOIN_MICLINE_MIC_BIAS 0x00070000 +#define BF_AUDIOIN_MICLINE_MIC_BIAS(v) \ + (((v) << 16) & BM_AUDIOIN_MICLINE_MIC_BIAS) +#define BP_AUDIOIN_MICLINE_RSRVD2 6 +#define BM_AUDIOIN_MICLINE_RSRVD2 0x0000FFC0 +#define BF_AUDIOIN_MICLINE_RSRVD2(v) \ + (((v) << 6) & BM_AUDIOIN_MICLINE_RSRVD2) +#define BP_AUDIOIN_MICLINE_MIC_CHOPCLK 4 +#define BM_AUDIOIN_MICLINE_MIC_CHOPCLK 0x00000030 +#define BF_AUDIOIN_MICLINE_MIC_CHOPCLK(v) \ + (((v) << 4) & BM_AUDIOIN_MICLINE_MIC_CHOPCLK) +#define BP_AUDIOIN_MICLINE_RSRVD1 2 +#define BM_AUDIOIN_MICLINE_RSRVD1 0x0000000C +#define BF_AUDIOIN_MICLINE_RSRVD1(v) \ + (((v) << 2) & BM_AUDIOIN_MICLINE_RSRVD1) +#define BP_AUDIOIN_MICLINE_MIC_GAIN 0 +#define BM_AUDIOIN_MICLINE_MIC_GAIN 0x00000003 +#define BF_AUDIOIN_MICLINE_MIC_GAIN(v) \ + (((v) << 0) & BM_AUDIOIN_MICLINE_MIC_GAIN) + +#define HW_AUDIOIN_ANACLKCTRL (0x00000070) +#define HW_AUDIOIN_ANACLKCTRL_SET (0x00000074) +#define HW_AUDIOIN_ANACLKCTRL_CLR (0x00000078) +#define HW_AUDIOIN_ANACLKCTRL_TOG (0x0000007c) +#define HW_AUDIOIN_ANACLKCTRL_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL) +#define HW_AUDIOIN_ANACLKCTRL_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL_SET) +#define HW_AUDIOIN_ANACLKCTRL_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL_CLR) +#define HW_AUDIOIN_ANACLKCTRL_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_ANACLKCTRL_TOG) -#define HW_AUDIOIN_ANACLKCTRL 0x70 #define BM_AUDIOIN_ANACLKCTRL_CLKGATE 0x80000000 +#define BP_AUDIOIN_ANACLKCTRL_RSRVD4 11 +#define BM_AUDIOIN_ANACLKCTRL_RSRVD4 0x7FFFF800 +#define BF_AUDIOIN_ANACLKCTRL_RSRVD4(v) \ + (((v) << 11) & BM_AUDIOIN_ANACLKCTRL_RSRVD4) +#define BM_AUDIOIN_ANACLKCTRL_DITHER_OFF 0x00000400 +#define BM_AUDIOIN_ANACLKCTRL_SLOW_DITHER 0x00000200 +#define BM_AUDIOIN_ANACLKCTRL_INVERT_ADCCLK 0x00000100 +#define BP_AUDIOIN_ANACLKCTRL_RSRVD3 6 +#define BM_AUDIOIN_ANACLKCTRL_RSRVD3 0x000000C0 +#define BF_AUDIOIN_ANACLKCTRL_RSRVD3(v) \ + (((v) << 6) & BM_AUDIOIN_ANACLKCTRL_RSRVD3) +#define BP_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 4 +#define BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT 0x00000030 +#define BF_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT(v) \ + (((v) << 4) & BM_AUDIOIN_ANACLKCTRL_ADCCLK_SHIFT) +#define BM_AUDIOIN_ANACLKCTRL_RSRVD2 0x00000008 +#define BP_AUDIOIN_ANACLKCTRL_ADCDIV 0 +#define BM_AUDIOIN_ANACLKCTRL_ADCDIV 0x00000007 +#define BF_AUDIOIN_ANACLKCTRL_ADCDIV(v) \ + (((v) << 0) & BM_AUDIOIN_ANACLKCTRL_ADCDIV) + +#define HW_AUDIOIN_DATA (0x00000080) +#define HW_AUDIOIN_DATA_SET (0x00000084) +#define HW_AUDIOIN_DATA_CLR (0x00000088) +#define HW_AUDIOIN_DATA_TOG (0x0000008c) +#define HW_AUDIOIN_DATA_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_DATA) +#define HW_AUDIOIN_DATA_SET_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_DATA_SET) +#define HW_AUDIOIN_DATA_CLR_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_DATA_CLR) +#define HW_AUDIOIN_DATA_TOG_ADDR \ + (REGS_AUDIOIN_BASE + HW_AUDIOIN_DATA_TOG) -#define HW_AUDIOIN_DATA 0x80 +#define BP_AUDIOIN_DATA_HIGH 16 +#define BM_AUDIOIN_DATA_HIGH 0xFFFF0000 +#define BF_AUDIOIN_DATA_HIGH(v) \ + (((v) << 16) & BM_AUDIOIN_DATA_HIGH) +#define BP_AUDIOIN_DATA_LOW 0 +#define BM_AUDIOIN_DATA_LOW 0x0000FFFF +#define BF_AUDIOIN_DATA_LOW(v) \ + (((v) << 0) & BM_AUDIOIN_DATA_LOW) +#endif /* __ARCH_ARM___AUDIOIN_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-usbphy.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-usbphy.h @@ -1,7 +1,7 @@ /* - * stmp378x: USBPHY register definitions + * STMP USBPHY Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,21 +17,360 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_USBPHY_BASE (STMP3XXX_REGS_BASE + 0x7C000) -#define REGS_USBPHY_PHYS 0x8007C000 -#define REGS_USBPHY_SIZE 0x2000 -#define HW_USBPHY_PWD 0x0 +#ifndef __ARCH_ARM___USBPHY_H +#define __ARCH_ARM___USBPHY_H 1 + +#define REGS_USBPHY_BASE (STMP3XXX_REGS_BASE + 0x7c000) +#define REGS_USBPHY_PHYS (0x8007C000) +#define REGS_USBPHY_SIZE 0x00002000 + +#define HW_USBPHY_PWD (0x00000000) +#define HW_USBPHY_PWD_SET (0x00000004) +#define HW_USBPHY_PWD_CLR (0x00000008) +#define HW_USBPHY_PWD_TOG (0x0000000c) +#define HW_USBPHY_PWD_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_PWD) +#define HW_USBPHY_PWD_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_PWD_SET) +#define HW_USBPHY_PWD_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_PWD_CLR) +#define HW_USBPHY_PWD_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_PWD_TOG) + +#define BP_USBPHY_PWD_RSVD2 21 +#define BM_USBPHY_PWD_RSVD2 0xFFE00000 +#define BF_USBPHY_PWD_RSVD2(v) \ + (((v) << 21) & BM_USBPHY_PWD_RSVD2) +#define BM_USBPHY_PWD_RXPWDRX 0x00100000 +#define BM_USBPHY_PWD_RXPWDDIFF 0x00080000 +#define BM_USBPHY_PWD_RXPWD1PT1 0x00040000 +#define BM_USBPHY_PWD_RXPWDENV 0x00020000 +#define BP_USBPHY_PWD_RSVD1 13 +#define BM_USBPHY_PWD_RSVD1 0x0001E000 +#define BF_USBPHY_PWD_RSVD1(v) \ + (((v) << 13) & BM_USBPHY_PWD_RSVD1) +#define BM_USBPHY_PWD_TXPWDV2I 0x00001000 +#define BM_USBPHY_PWD_TXPWDIBIAS 0x00000800 +#define BM_USBPHY_PWD_TXPWDFS 0x00000400 +#define BP_USBPHY_PWD_RSVD0 0 +#define BM_USBPHY_PWD_RSVD0 0x000003FF +#define BF_USBPHY_PWD_RSVD0(v) \ + (((v) << 0) & BM_USBPHY_PWD_RSVD0) + +#define HW_USBPHY_TX (0x00000010) +#define HW_USBPHY_TX_SET (0x00000014) +#define HW_USBPHY_TX_CLR (0x00000018) +#define HW_USBPHY_TX_TOG (0x0000001c) +#define HW_USBPHY_TX_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_TX) +#define HW_USBPHY_TX_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_TX_SET) +#define HW_USBPHY_TX_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_TX_CLR) +#define HW_USBPHY_TX_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_TX_TOG) + +#define BP_USBPHY_TX_RSVD5 29 +#define BM_USBPHY_TX_RSVD5 0xE0000000 +#define BF_USBPHY_TX_RSVD5(v) \ + (((v) << 29) & BM_USBPHY_TX_RSVD5) +#define BP_USBPHY_TX_USBPHY_TX_EDGECTRL 26 +#define BM_USBPHY_TX_USBPHY_TX_EDGECTRL 0x1C000000 +#define BF_USBPHY_TX_USBPHY_TX_EDGECTRL(v) \ + (((v) << 26) & BM_USBPHY_TX_USBPHY_TX_EDGECTRL) +#define BM_USBPHY_TX_USBPHY_TX_SYNC_INVERT 0x02000000 +#define BM_USBPHY_TX_USBPHY_TX_SYNC_MUX 0x01000000 +#define BP_USBPHY_TX_RSVD4 22 +#define BM_USBPHY_TX_RSVD4 0x00C00000 +#define BF_USBPHY_TX_RSVD4(v) \ + (((v) << 22) & BM_USBPHY_TX_RSVD4) +#define BM_USBPHY_TX_TXENCAL45DP 0x00200000 +#define BM_USBPHY_TX_RSVD3 0x00100000 +#define BP_USBPHY_TX_TXCAL45DP 16 +#define BM_USBPHY_TX_TXCAL45DP 0x000F0000 +#define BF_USBPHY_TX_TXCAL45DP(v) \ + (((v) << 16) & BM_USBPHY_TX_TXCAL45DP) +#define BP_USBPHY_TX_RSVD2 14 +#define BM_USBPHY_TX_RSVD2 0x0000C000 +#define BF_USBPHY_TX_RSVD2(v) \ + (((v) << 14) & BM_USBPHY_TX_RSVD2) +#define BM_USBPHY_TX_TXENCAL45DN 0x00002000 +#define BM_USBPHY_TX_RSVD1 0x00001000 +#define BP_USBPHY_TX_TXCAL45DN 8 +#define BM_USBPHY_TX_TXCAL45DN 0x00000F00 +#define BF_USBPHY_TX_TXCAL45DN(v) \ + (((v) << 8) & BM_USBPHY_TX_TXCAL45DN) +#define BP_USBPHY_TX_RSVD0 4 +#define BM_USBPHY_TX_RSVD0 0x000000F0 +#define BF_USBPHY_TX_RSVD0(v) \ + (((v) << 4) & BM_USBPHY_TX_RSVD0) +#define BP_USBPHY_TX_D_CAL 0 +#define BM_USBPHY_TX_D_CAL 0x0000000F +#define BF_USBPHY_TX_D_CAL(v) \ + (((v) << 0) & BM_USBPHY_TX_D_CAL) + +#define HW_USBPHY_RX (0x00000020) +#define HW_USBPHY_RX_SET (0x00000024) +#define HW_USBPHY_RX_CLR (0x00000028) +#define HW_USBPHY_RX_TOG (0x0000002c) +#define HW_USBPHY_RX_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_RX) +#define HW_USBPHY_RX_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_RX_SET) +#define HW_USBPHY_RX_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_RX_CLR) +#define HW_USBPHY_RX_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_RX_TOG) + +#define BP_USBPHY_RX_RSVD2 23 +#define BM_USBPHY_RX_RSVD2 0xFF800000 +#define BF_USBPHY_RX_RSVD2(v) \ + (((v) << 23) & BM_USBPHY_RX_RSVD2) +#define BM_USBPHY_RX_RXDBYPASS 0x00400000 +#define BP_USBPHY_RX_RSVD1 7 +#define BM_USBPHY_RX_RSVD1 0x003FFF80 +#define BF_USBPHY_RX_RSVD1(v) \ + (((v) << 7) & BM_USBPHY_RX_RSVD1) +#define BP_USBPHY_RX_DISCONADJ 4 +#define BM_USBPHY_RX_DISCONADJ 0x00000070 +#define BF_USBPHY_RX_DISCONADJ(v) \ + (((v) << 4) & BM_USBPHY_RX_DISCONADJ) +#define BM_USBPHY_RX_RSVD0 0x00000008 +#define BP_USBPHY_RX_ENVADJ 0 +#define BM_USBPHY_RX_ENVADJ 0x00000007 +#define BF_USBPHY_RX_ENVADJ(v) \ + (((v) << 0) & BM_USBPHY_RX_ENVADJ) + +#define HW_USBPHY_CTRL (0x00000030) +#define HW_USBPHY_CTRL_SET (0x00000034) +#define HW_USBPHY_CTRL_CLR (0x00000038) +#define HW_USBPHY_CTRL_TOG (0x0000003c) +#define HW_USBPHY_CTRL_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_CTRL) +#define HW_USBPHY_CTRL_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_CTRL_SET) +#define HW_USBPHY_CTRL_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_CTRL_CLR) +#define HW_USBPHY_CTRL_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_CTRL_TOG) -#define HW_USBPHY_CTRL 0x30 -#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT 0x00000002 -#define BM_USBPHY_CTRL_ENDEVPLUGINDETECT 0x00000010 -#define BM_USBPHY_CTRL_ENOTGIDDETECT 0x00000080 -#define BM_USBPHY_CTRL_ENIRQDEVPLUGIN 0x00000800 -#define BM_USBPHY_CTRL_CLKGATE 0x40000000 #define BM_USBPHY_CTRL_SFTRST 0x80000000 +#define BM_USBPHY_CTRL_CLKGATE 0x40000000 +#define BM_USBPHY_CTRL_UTMI_SUSPENDM 0x20000000 +#define BM_USBPHY_CTRL_HOST_FORCE_LS_SE0 0x10000000 +#define BP_USBPHY_CTRL_RSVD3 14 +#define BM_USBPHY_CTRL_RSVD3 0x0FFFC000 +#define BF_USBPHY_CTRL_RSVD3(v) \ + (((v) << 14) & BM_USBPHY_CTRL_RSVD3) +#define BM_USBPHY_CTRL_DATA_ON_LRADC 0x00002000 +#define BM_USBPHY_CTRL_DEVPLUGIN_IRQ 0x00001000 +#define BM_USBPHY_CTRL_ENIRQDEVPLUGIN 0x00000800 +#define BM_USBPHY_CTRL_RESUME_IRQ 0x00000400 +#define BM_USBPHY_CTRL_ENIRQRESUMEDETECT 0x00000200 +#define BM_USBPHY_CTRL_RSVD2 0x00000100 +#define BM_USBPHY_CTRL_ENOTGIDDETECT 0x00000080 +#define BM_USBPHY_CTRL_RSVD1 0x00000040 +#define BM_USBPHY_CTRL_DEVPLUGIN_POLARITY 0x00000020 +#define BM_USBPHY_CTRL_ENDEVPLUGINDETECT 0x00000010 +#define BM_USBPHY_CTRL_HOSTDISCONDETECT_IRQ 0x00000008 +#define BM_USBPHY_CTRL_ENIRQHOSTDISCON 0x00000004 +#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT 0x00000002 +#define BM_USBPHY_CTRL_RSVD0 0x00000001 -#define HW_USBPHY_STATUS 0x40 -#define BM_USBPHY_STATUS_DEVPLUGIN_STATUS 0x00000040 +#define HW_USBPHY_STATUS (0x00000040) +#define HW_USBPHY_STATUS_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_STATUS) + +#define BP_USBPHY_STATUS_RSVD4 11 +#define BM_USBPHY_STATUS_RSVD4 0xFFFFF800 +#define BF_USBPHY_STATUS_RSVD4(v) \ + (((v) << 11) & BM_USBPHY_STATUS_RSVD4) +#define BM_USBPHY_STATUS_RESUME_STATUS 0x00000400 +#define BM_USBPHY_STATUS_RSVD3 0x00000200 #define BM_USBPHY_STATUS_OTGID_STATUS 0x00000100 +#define BM_USBPHY_STATUS_RSVD2 0x00000080 +#define BM_USBPHY_STATUS_DEVPLUGIN_STATUS 0x00000040 +#define BP_USBPHY_STATUS_RSVD1 4 +#define BM_USBPHY_STATUS_RSVD1 0x00000030 +#define BF_USBPHY_STATUS_RSVD1(v) \ + (((v) << 4) & BM_USBPHY_STATUS_RSVD1) +#define BM_USBPHY_STATUS_HOSTDISCONDETECT_STATUS 0x00000008 +#define BP_USBPHY_STATUS_RSVD0 0 +#define BM_USBPHY_STATUS_RSVD0 0x00000007 +#define BF_USBPHY_STATUS_RSVD0(v) \ + (((v) << 0) & BM_USBPHY_STATUS_RSVD0) + +#define HW_USBPHY_DEBUG (0x00000050) +#define HW_USBPHY_DEBUG_SET (0x00000054) +#define HW_USBPHY_DEBUG_CLR (0x00000058) +#define HW_USBPHY_DEBUG_TOG (0x0000005c) +#define HW_USBPHY_DEBUG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG) +#define HW_USBPHY_DEBUG_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_SET) +#define HW_USBPHY_DEBUG_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_CLR) +#define HW_USBPHY_DEBUG_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG_TOG) + +#define BM_USBPHY_DEBUG_RSVD3 0x80000000 +#define BM_USBPHY_DEBUG_CLKGATE 0x40000000 +#define BM_USBPHY_DEBUG_HOST_RESUME_DEBUG 0x20000000 +#define BP_USBPHY_DEBUG_SQUELCHRESETLENGTH 25 +#define BM_USBPHY_DEBUG_SQUELCHRESETLENGTH 0x1E000000 +#define BF_USBPHY_DEBUG_SQUELCHRESETLENGTH(v) \ + (((v) << 25) & BM_USBPHY_DEBUG_SQUELCHRESETLENGTH) +#define BM_USBPHY_DEBUG_ENSQUELCHRESET 0x01000000 +#define BP_USBPHY_DEBUG_RSVD2 21 +#define BM_USBPHY_DEBUG_RSVD2 0x00E00000 +#define BF_USBPHY_DEBUG_RSVD2(v) \ + (((v) << 21) & BM_USBPHY_DEBUG_RSVD2) +#define BP_USBPHY_DEBUG_SQUELCHRESETCOUNT 16 +#define BM_USBPHY_DEBUG_SQUELCHRESETCOUNT 0x001F0000 +#define BF_USBPHY_DEBUG_SQUELCHRESETCOUNT(v) \ + (((v) << 16) & BM_USBPHY_DEBUG_SQUELCHRESETCOUNT) +#define BP_USBPHY_DEBUG_RSVD1 13 +#define BM_USBPHY_DEBUG_RSVD1 0x0000E000 +#define BF_USBPHY_DEBUG_RSVD1(v) \ + (((v) << 13) & BM_USBPHY_DEBUG_RSVD1) +#define BM_USBPHY_DEBUG_ENTX2RXCOUNT 0x00001000 +#define BP_USBPHY_DEBUG_TX2RXCOUNT 8 +#define BM_USBPHY_DEBUG_TX2RXCOUNT 0x00000F00 +#define BF_USBPHY_DEBUG_TX2RXCOUNT(v) \ + (((v) << 8) & BM_USBPHY_DEBUG_TX2RXCOUNT) +#define BP_USBPHY_DEBUG_RSVD0 6 +#define BM_USBPHY_DEBUG_RSVD0 0x000000C0 +#define BF_USBPHY_DEBUG_RSVD0(v) \ + (((v) << 6) & BM_USBPHY_DEBUG_RSVD0) +#define BP_USBPHY_DEBUG_ENHSTPULLDOWN 4 +#define BM_USBPHY_DEBUG_ENHSTPULLDOWN 0x00000030 +#define BF_USBPHY_DEBUG_ENHSTPULLDOWN(v) \ + (((v) << 4) & BM_USBPHY_DEBUG_ENHSTPULLDOWN) +#define BP_USBPHY_DEBUG_HSTPULLDOWN 2 +#define BM_USBPHY_DEBUG_HSTPULLDOWN 0x0000000C +#define BF_USBPHY_DEBUG_HSTPULLDOWN(v) \ + (((v) << 2) & BM_USBPHY_DEBUG_HSTPULLDOWN) +#define BM_USBPHY_DEBUG_DEBUG_INTERFACE_HOLD 0x00000002 +#define BM_USBPHY_DEBUG_OTGIDPIOLOCK 0x00000001 + +#define HW_USBPHY_DEBUG0_STATUS (0x00000060) +#define HW_USBPHY_DEBUG0_STATUS_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG0_STATUS) + +#define BP_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 26 +#define BM_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 0xFC000000 +#define BF_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(v) \ + (((v) << 26) & BM_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT) +#define BP_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT 16 +#define BM_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT 0x03FF0000 +#define BF_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(v) \ + (((v) << 16) & BM_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT) +#define BP_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT 0 +#define BM_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT 0x0000FFFF +#define BF_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(v) \ + (((v) << 0) & BM_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT) + +#define HW_USBPHY_DEBUG1 (0x00000070) +#define HW_USBPHY_DEBUG1_SET (0x00000074) +#define HW_USBPHY_DEBUG1_CLR (0x00000078) +#define HW_USBPHY_DEBUG1_TOG (0x0000007c) +#define HW_USBPHY_DEBUG1_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1) +#define HW_USBPHY_DEBUG1_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_SET) +#define HW_USBPHY_DEBUG1_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_CLR) +#define HW_USBPHY_DEBUG1_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_DEBUG1_TOG) + +#define BP_USBPHY_DEBUG1_RSVD1 15 +#define BM_USBPHY_DEBUG1_RSVD1 0xFFFF8000 +#define BF_USBPHY_DEBUG1_RSVD1(v) \ + (((v) << 15) & BM_USBPHY_DEBUG1_RSVD1) +#define BP_USBPHY_DEBUG1_ENTAILADJVD 13 +#define BM_USBPHY_DEBUG1_ENTAILADJVD 0x00006000 +#define BF_USBPHY_DEBUG1_ENTAILADJVD(v) \ + (((v) << 13) & BM_USBPHY_DEBUG1_ENTAILADJVD) +#define BM_USBPHY_DEBUG1_ENTX2TX 0x00001000 +#define BP_USBPHY_DEBUG1_RSVD0 4 +#define BM_USBPHY_DEBUG1_RSVD0 0x00000FF0 +#define BF_USBPHY_DEBUG1_RSVD0(v) \ + (((v) << 4) & BM_USBPHY_DEBUG1_RSVD0) +#define BP_USBPHY_DEBUG1_DBG_ADDRESS 0 +#define BM_USBPHY_DEBUG1_DBG_ADDRESS 0x0000000F +#define BF_USBPHY_DEBUG1_DBG_ADDRESS(v) \ + (((v) << 0) & BM_USBPHY_DEBUG1_DBG_ADDRESS) + +#define HW_USBPHY_VERSION (0x00000080) +#define HW_USBPHY_VERSION_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_VERSION) + +#define BP_USBPHY_VERSION_MAJOR 24 +#define BM_USBPHY_VERSION_MAJOR 0xFF000000 +#define BF_USBPHY_VERSION_MAJOR(v) \ + (((v) << 24) & BM_USBPHY_VERSION_MAJOR) +#define BP_USBPHY_VERSION_MINOR 16 +#define BM_USBPHY_VERSION_MINOR 0x00FF0000 +#define BF_USBPHY_VERSION_MINOR(v) \ + (((v) << 16) & BM_USBPHY_VERSION_MINOR) +#define BP_USBPHY_VERSION_STEP 0 +#define BM_USBPHY_VERSION_STEP 0x0000FFFF +#define BF_USBPHY_VERSION_STEP(v) \ + (((v) << 0) & BM_USBPHY_VERSION_STEP) + +#define HW_USBPHY_IP (0x00000090) +#define HW_USBPHY_IP_SET (0x00000094) +#define HW_USBPHY_IP_CLR (0x00000098) +#define HW_USBPHY_IP_TOG (0x0000009c) +#define HW_USBPHY_IP_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_IP) +#define HW_USBPHY_IP_SET_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_IP_SET) +#define HW_USBPHY_IP_CLR_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_IP_CLR) +#define HW_USBPHY_IP_TOG_ADDR \ + (REGS_USBPHY_BASE + HW_USBPHY_IP_TOG) + +#define BP_USBPHY_IP_RSVD1 25 +#define BM_USBPHY_IP_RSVD1 0xFE000000 +#define BF_USBPHY_IP_RSVD1(v) \ + (((v) << 25) & BM_USBPHY_IP_RSVD1) +#define BP_USBPHY_IP_DIV_SEL 23 +#define BM_USBPHY_IP_DIV_SEL 0x01800000 +#define BF_USBPHY_IP_DIV_SEL(v) \ + (((v) << 23) & BM_USBPHY_IP_DIV_SEL) +#define BV_USBPHY_IP_DIV_SEL__DEFAULT 0x0 +#define BV_USBPHY_IP_DIV_SEL__LOWER 0x1 +#define BV_USBPHY_IP_DIV_SEL__LOWEST 0x2 +#define BV_USBPHY_IP_DIV_SEL__UNDEFINED 0x3 +#define BP_USBPHY_IP_LFR_SEL 21 +#define BM_USBPHY_IP_LFR_SEL 0x00600000 +#define BF_USBPHY_IP_LFR_SEL(v) \ + (((v) << 21) & BM_USBPHY_IP_LFR_SEL) +#define BV_USBPHY_IP_LFR_SEL__DEFAULT 0x0 +#define BV_USBPHY_IP_LFR_SEL__TIMES_2 0x1 +#define BV_USBPHY_IP_LFR_SEL__TIMES_05 0x2 +#define BV_USBPHY_IP_LFR_SEL__UNDEFINED 0x3 +#define BP_USBPHY_IP_CP_SEL 19 +#define BM_USBPHY_IP_CP_SEL 0x00180000 +#define BF_USBPHY_IP_CP_SEL(v) \ + (((v) << 19) & BM_USBPHY_IP_CP_SEL) +#define BV_USBPHY_IP_CP_SEL__DEFAULT 0x0 +#define BV_USBPHY_IP_CP_SEL__TIMES_2 0x1 +#define BV_USBPHY_IP_CP_SEL__TIMES_05 0x2 +#define BV_USBPHY_IP_CP_SEL__UNDEFINED 0x3 +#define BM_USBPHY_IP_TSTI_TX_DP 0x00040000 +#define BM_USBPHY_IP_TSTI_TX_DM 0x00020000 +#define BM_USBPHY_IP_ANALOG_TESTMODE 0x00010000 +#define BP_USBPHY_IP_RSVD0 3 +#define BM_USBPHY_IP_RSVD0 0x0000FFF8 +#define BF_USBPHY_IP_RSVD0(v) \ + (((v) << 3) & BM_USBPHY_IP_RSVD0) +#define BM_USBPHY_IP_EN_USB_CLKS 0x00000004 +#define BM_USBPHY_IP_PLL_LOCKED 0x00000002 +#define BM_USBPHY_IP_PLL_POWER 0x00000001 +#endif /* __ARCH_ARM___USBPHY_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-power.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-power.h @@ -1,7 +1,7 @@ /* - * stmp378x: POWER register definitions + * STMP POWER Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,47 +17,635 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#ifndef _MACH_REGS_POWER -#define _MACH_REGS_POWER -#define REGS_POWER_BASE (STMP3XXX_REGS_BASE + 0x44000) -#define REGS_POWER_PHYS 0x80044000 -#define REGS_POWER_SIZE 0x2000 +#ifndef __ARCH_ARM___POWER_H +#define __ARCH_ARM___POWER_H 1 -#define HW_POWER_CTRL 0x0 -#define BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO 0x00000001 -#define BP_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO 0 -#define BM_POWER_CTRL_ENIRQ_PSWITCH 0x00020000 -#define BM_POWER_CTRL_PSWITCH_IRQ 0x00100000 +#define REGS_POWER_BASE (STMP3XXX_REGS_BASE + 0x44000) +#define REGS_POWER_PHYS (0x80044000) +#define REGS_POWER_SIZE 0x00002000 + +#define HW_POWER_CTRL (0x00000000) +#define HW_POWER_CTRL_SET (0x00000004) +#define HW_POWER_CTRL_CLR (0x00000008) +#define HW_POWER_CTRL_TOG (0x0000000c) +#define HW_POWER_CTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_CTRL) +#define HW_POWER_CTRL_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_CTRL_SET) +#define HW_POWER_CTRL_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_CTRL_CLR) +#define HW_POWER_CTRL_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_CTRL_TOG) + +#define BM_POWER_CTRL_RSRVD3 0x80000000 #define BM_POWER_CTRL_CLKGATE 0x40000000 +#define BP_POWER_CTRL_RSRVD2 28 +#define BM_POWER_CTRL_RSRVD2 0x30000000 +#define BF_POWER_CTRL_RSRVD2(v) \ + (((v) << 28) & BM_POWER_CTRL_RSRVD2) +#define BM_POWER_CTRL_PSWITCH_MID_TRAN 0x08000000 +#define BP_POWER_CTRL_RSRVD1 25 +#define BM_POWER_CTRL_RSRVD1 0x06000000 +#define BF_POWER_CTRL_RSRVD1(v) \ + (((v) << 25) & BM_POWER_CTRL_RSRVD1) +#define BM_POWER_CTRL_DCDC4P2_BO_IRQ 0x01000000 +#define BM_POWER_CTRL_ENIRQ_DCDC4P2_BO 0x00800000 +#define BM_POWER_CTRL_VDD5V_DROOP_IRQ 0x00400000 +#define BM_POWER_CTRL_ENIRQ_VDD5V_DROOP 0x00200000 +#define BM_POWER_CTRL_PSWITCH_IRQ 0x00100000 +#define BM_POWER_CTRL_PSWITCH_IRQ_SRC 0x00080000 +#define BM_POWER_CTRL_POLARITY_PSWITCH 0x00040000 +#define BM_POWER_CTRL_ENIRQ_PSWITCH 0x00020000 +#define BM_POWER_CTRL_POLARITY_DC_OK 0x00010000 +#define BM_POWER_CTRL_DC_OK_IRQ 0x00008000 +#define BM_POWER_CTRL_ENIRQ_DC_OK 0x00004000 +#define BM_POWER_CTRL_BATT_BO_IRQ 0x00002000 +#define BM_POWER_CTRL_ENIRQBATT_BO 0x00001000 +#define BM_POWER_CTRL_VDDIO_BO_IRQ 0x00000800 +#define BM_POWER_CTRL_ENIRQ_VDDIO_BO 0x00000400 +#define BM_POWER_CTRL_VDDA_BO_IRQ 0x00000200 +#define BM_POWER_CTRL_ENIRQ_VDDA_BO 0x00000100 +#define BM_POWER_CTRL_VDDD_BO_IRQ 0x00000080 +#define BM_POWER_CTRL_ENIRQ_VDDD_BO 0x00000040 +#define BM_POWER_CTRL_POLARITY_VBUSVALID 0x00000020 +#define BM_POWER_CTRL_VBUSVALID_IRQ 0x00000010 +#define BM_POWER_CTRL_ENIRQ_VBUS_VALID 0x00000008 +#define BM_POWER_CTRL_POLARITY_VDD5V_GT_VDDIO 0x00000004 +#define BM_POWER_CTRL_VDD5V_GT_VDDIO_IRQ 0x00000002 +#define BM_POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO 0x00000001 -#define HW_POWER_5VCTRL 0x10 +#define HW_POWER_5VCTRL (0x00000010) +#define HW_POWER_5VCTRL_SET (0x00000014) +#define HW_POWER_5VCTRL_CLR (0x00000018) +#define HW_POWER_5VCTRL_TOG (0x0000001c) +#define HW_POWER_5VCTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_5VCTRL) +#define HW_POWER_5VCTRL_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_5VCTRL_SET) +#define HW_POWER_5VCTRL_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_5VCTRL_CLR) +#define HW_POWER_5VCTRL_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_5VCTRL_TOG) + +#define BP_POWER_5VCTRL_RSRVD6 30 +#define BM_POWER_5VCTRL_RSRVD6 0xC0000000 +#define BF_POWER_5VCTRL_RSRVD6(v) \ + (((v) << 30) & BM_POWER_5VCTRL_RSRVD6) +#define BP_POWER_5VCTRL_VBUSDROOP_TRSH 28 +#define BM_POWER_5VCTRL_VBUSDROOP_TRSH 0x30000000 +#define BF_POWER_5VCTRL_VBUSDROOP_TRSH(v) \ + (((v) << 28) & BM_POWER_5VCTRL_VBUSDROOP_TRSH) +#define BM_POWER_5VCTRL_RSRVD5 0x08000000 +#define BP_POWER_5VCTRL_HEADROOM_ADJ 24 +#define BM_POWER_5VCTRL_HEADROOM_ADJ 0x07000000 +#define BF_POWER_5VCTRL_HEADROOM_ADJ(v) \ + (((v) << 24) & BM_POWER_5VCTRL_HEADROOM_ADJ) +#define BP_POWER_5VCTRL_RSRVD4 21 +#define BM_POWER_5VCTRL_RSRVD4 0x00E00000 +#define BF_POWER_5VCTRL_RSRVD4(v) \ + (((v) << 21) & BM_POWER_5VCTRL_RSRVD4) +#define BM_POWER_5VCTRL_PWD_CHARGE_4P2 0x00100000 +#define BP_POWER_5VCTRL_RSRVD3 18 +#define BM_POWER_5VCTRL_RSRVD3 0x000C0000 +#define BF_POWER_5VCTRL_RSRVD3(v) \ + (((v) << 18) & BM_POWER_5VCTRL_RSRVD3) +#define BP_POWER_5VCTRL_CHARGE_4P2_ILIMIT 12 +#define BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT 0x0003F000 +#define BF_POWER_5VCTRL_CHARGE_4P2_ILIMIT(v) \ + (((v) << 12) & BM_POWER_5VCTRL_CHARGE_4P2_ILIMIT) +#define BM_POWER_5VCTRL_RSRVD2 0x00000800 +#define BP_POWER_5VCTRL_VBUSVALID_TRSH 8 +#define BM_POWER_5VCTRL_VBUSVALID_TRSH 0x00000700 +#define BF_POWER_5VCTRL_VBUSVALID_TRSH(v) \ + (((v) << 8) & BM_POWER_5VCTRL_VBUSVALID_TRSH) +#define BM_POWER_5VCTRL_PWDN_5VBRNOUT 0x00000080 #define BM_POWER_5VCTRL_ENABLE_LINREG_ILIMIT 0x00000040 - -#define HW_POWER_MINPWR 0x20 - -#define HW_POWER_CHARGE 0x30 - -#define HW_POWER_VDDDCTRL 0x40 - -#define HW_POWER_VDDACTRL 0x50 - -#define HW_POWER_VDDIOCTRL 0x60 -#define BM_POWER_VDDIOCTRL_TRG 0x0000001F +#define BM_POWER_5VCTRL_DCDC_XFER 0x00000020 +#define BM_POWER_5VCTRL_VBUSVALID_5VDETECT 0x00000010 +#define BM_POWER_5VCTRL_VBUSVALID_TO_B 0x00000008 +#define BM_POWER_5VCTRL_ILIMIT_EQ_ZERO 0x00000004 +#define BM_POWER_5VCTRL_PWRUP_VBUS_CMPS 0x00000002 +#define BM_POWER_5VCTRL_ENABLE_DCDC 0x00000001 + +#define HW_POWER_MINPWR (0x00000020) +#define HW_POWER_MINPWR_SET (0x00000024) +#define HW_POWER_MINPWR_CLR (0x00000028) +#define HW_POWER_MINPWR_TOG (0x0000002c) +#define HW_POWER_MINPWR_ADDR \ + (REGS_POWER_BASE + HW_POWER_MINPWR) +#define HW_POWER_MINPWR_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_MINPWR_SET) +#define HW_POWER_MINPWR_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_MINPWR_CLR) +#define HW_POWER_MINPWR_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_MINPWR_TOG) + +#define BP_POWER_MINPWR_RSRVD1 15 +#define BM_POWER_MINPWR_RSRVD1 0xFFFF8000 +#define BF_POWER_MINPWR_RSRVD1(v) \ + (((v) << 15) & BM_POWER_MINPWR_RSRVD1) +#define BM_POWER_MINPWR_LOWPWR_4P2 0x00004000 +#define BM_POWER_MINPWR_VDAC_DUMP_CTRL 0x00002000 +#define BM_POWER_MINPWR_PWD_BO 0x00001000 +#define BM_POWER_MINPWR_USE_VDDXTAL_VBG 0x00000800 +#define BM_POWER_MINPWR_PWD_ANA_CMPS 0x00000400 +#define BM_POWER_MINPWR_ENABLE_OSC 0x00000200 +#define BM_POWER_MINPWR_SELECT_OSC 0x00000100 +#define BM_POWER_MINPWR_VBG_OFF 0x00000080 +#define BM_POWER_MINPWR_DOUBLE_FETS 0x00000040 +#define BM_POWER_MINPWR_HALF_FETS 0x00000020 +#define BM_POWER_MINPWR_LESSANA_I 0x00000010 +#define BM_POWER_MINPWR_PWD_XTAL24 0x00000008 +#define BM_POWER_MINPWR_DC_STOPCLK 0x00000004 +#define BM_POWER_MINPWR_EN_DC_PFM 0x00000002 +#define BM_POWER_MINPWR_DC_HALFCLK 0x00000001 + +#define HW_POWER_CHARGE (0x00000030) +#define HW_POWER_CHARGE_SET (0x00000034) +#define HW_POWER_CHARGE_CLR (0x00000038) +#define HW_POWER_CHARGE_TOG (0x0000003c) +#define HW_POWER_CHARGE_ADDR \ + (REGS_POWER_BASE + HW_POWER_CHARGE) +#define HW_POWER_CHARGE_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_CHARGE_SET) +#define HW_POWER_CHARGE_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_CHARGE_CLR) +#define HW_POWER_CHARGE_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_CHARGE_TOG) + +#define BP_POWER_CHARGE_RSRVD4 27 +#define BM_POWER_CHARGE_RSRVD4 0xF8000000 +#define BF_POWER_CHARGE_RSRVD4(v) \ + (((v) << 27) & BM_POWER_CHARGE_RSRVD4) +#define BP_POWER_CHARGE_ADJ_VOLT 24 +#define BM_POWER_CHARGE_ADJ_VOLT 0x07000000 +#define BF_POWER_CHARGE_ADJ_VOLT(v) \ + (((v) << 24) & BM_POWER_CHARGE_ADJ_VOLT) +#define BM_POWER_CHARGE_RSRVD3 0x00800000 +#define BM_POWER_CHARGE_ENABLE_LOAD 0x00400000 +#define BM_POWER_CHARGE_ENABLE_CHARGER_RESISTORS 0x00200000 +#define BM_POWER_CHARGE_ENABLE_FAULT_DETECT 0x00100000 +#define BM_POWER_CHARGE_CHRG_STS_OFF 0x00080000 +#define BM_POWER_CHARGE_LIION_4P1 0x00040000 +#define BM_POWER_CHARGE_USE_EXTERN_R 0x00020000 +#define BM_POWER_CHARGE_PWD_BATTCHRG 0x00010000 +#define BP_POWER_CHARGE_RSRVD2 12 +#define BM_POWER_CHARGE_RSRVD2 0x0000F000 +#define BF_POWER_CHARGE_RSRVD2(v) \ + (((v) << 12) & BM_POWER_CHARGE_RSRVD2) +#define BP_POWER_CHARGE_STOP_ILIMIT 8 +#define BM_POWER_CHARGE_STOP_ILIMIT 0x00000F00 +#define BF_POWER_CHARGE_STOP_ILIMIT(v) \ + (((v) << 8) & BM_POWER_CHARGE_STOP_ILIMIT) +#define BP_POWER_CHARGE_RSRVD1 6 +#define BM_POWER_CHARGE_RSRVD1 0x000000C0 +#define BF_POWER_CHARGE_RSRVD1(v) \ + (((v) << 6) & BM_POWER_CHARGE_RSRVD1) +#define BP_POWER_CHARGE_BATTCHRG_I 0 +#define BM_POWER_CHARGE_BATTCHRG_I 0x0000003F +#define BF_POWER_CHARGE_BATTCHRG_I(v) \ + (((v) << 0) & BM_POWER_CHARGE_BATTCHRG_I) + +#define HW_POWER_VDDDCTRL (0x00000040) +#define HW_POWER_VDDDCTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_VDDDCTRL) + +#define BP_POWER_VDDDCTRL_ADJTN 28 +#define BM_POWER_VDDDCTRL_ADJTN 0xF0000000 +#define BF_POWER_VDDDCTRL_ADJTN(v) \ + (((v) << 28) & BM_POWER_VDDDCTRL_ADJTN) +#define BP_POWER_VDDDCTRL_RSRVD4 24 +#define BM_POWER_VDDDCTRL_RSRVD4 0x0F000000 +#define BF_POWER_VDDDCTRL_RSRVD4(v) \ + (((v) << 24) & BM_POWER_VDDDCTRL_RSRVD4) +#define BM_POWER_VDDDCTRL_PWDN_BRNOUT 0x00800000 +#define BM_POWER_VDDDCTRL_DISABLE_STEPPING 0x00400000 +#define BM_POWER_VDDDCTRL_ENABLE_LINREG 0x00200000 +#define BM_POWER_VDDDCTRL_DISABLE_FET 0x00100000 +#define BP_POWER_VDDDCTRL_RSRVD3 18 +#define BM_POWER_VDDDCTRL_RSRVD3 0x000C0000 +#define BF_POWER_VDDDCTRL_RSRVD3(v) \ + (((v) << 18) & BM_POWER_VDDDCTRL_RSRVD3) +#define BP_POWER_VDDDCTRL_LINREG_OFFSET 16 +#define BM_POWER_VDDDCTRL_LINREG_OFFSET 0x00030000 +#define BF_POWER_VDDDCTRL_LINREG_OFFSET(v) \ + (((v) << 16) & BM_POWER_VDDDCTRL_LINREG_OFFSET) +#define BP_POWER_VDDDCTRL_RSRVD2 11 +#define BM_POWER_VDDDCTRL_RSRVD2 0x0000F800 +#define BF_POWER_VDDDCTRL_RSRVD2(v) \ + (((v) << 11) & BM_POWER_VDDDCTRL_RSRVD2) +#define BP_POWER_VDDDCTRL_BO_OFFSET 8 +#define BM_POWER_VDDDCTRL_BO_OFFSET 0x00000700 +#define BF_POWER_VDDDCTRL_BO_OFFSET(v) \ + (((v) << 8) & BM_POWER_VDDDCTRL_BO_OFFSET) +#define BP_POWER_VDDDCTRL_RSRVD1 5 +#define BM_POWER_VDDDCTRL_RSRVD1 0x000000E0 +#define BF_POWER_VDDDCTRL_RSRVD1(v) \ + (((v) << 5) & BM_POWER_VDDDCTRL_RSRVD1) +#define BP_POWER_VDDDCTRL_TRG 0 +#define BM_POWER_VDDDCTRL_TRG 0x0000001F +#define BF_POWER_VDDDCTRL_TRG(v) \ + (((v) << 0) & BM_POWER_VDDDCTRL_TRG) + +#define HW_POWER_VDDACTRL (0x00000050) +#define HW_POWER_VDDACTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_VDDACTRL) + +#define BP_POWER_VDDACTRL_RSRVD4 20 +#define BM_POWER_VDDACTRL_RSRVD4 0xFFF00000 +#define BF_POWER_VDDACTRL_RSRVD4(v) \ + (((v) << 20) & BM_POWER_VDDACTRL_RSRVD4) +#define BM_POWER_VDDACTRL_PWDN_BRNOUT 0x00080000 +#define BM_POWER_VDDACTRL_DISABLE_STEPPING 0x00040000 +#define BM_POWER_VDDACTRL_ENABLE_LINREG 0x00020000 +#define BM_POWER_VDDACTRL_DISABLE_FET 0x00010000 +#define BP_POWER_VDDACTRL_RSRVD3 14 +#define BM_POWER_VDDACTRL_RSRVD3 0x0000C000 +#define BF_POWER_VDDACTRL_RSRVD3(v) \ + (((v) << 14) & BM_POWER_VDDACTRL_RSRVD3) +#define BP_POWER_VDDACTRL_LINREG_OFFSET 12 +#define BM_POWER_VDDACTRL_LINREG_OFFSET 0x00003000 +#define BF_POWER_VDDACTRL_LINREG_OFFSET(v) \ + (((v) << 12) & BM_POWER_VDDACTRL_LINREG_OFFSET) +#define BM_POWER_VDDACTRL_RSRVD2 0x00000800 +#define BP_POWER_VDDACTRL_BO_OFFSET 8 +#define BM_POWER_VDDACTRL_BO_OFFSET 0x00000700 +#define BF_POWER_VDDACTRL_BO_OFFSET(v) \ + (((v) << 8) & BM_POWER_VDDACTRL_BO_OFFSET) +#define BP_POWER_VDDACTRL_RSRVD1 5 +#define BM_POWER_VDDACTRL_RSRVD1 0x000000E0 +#define BF_POWER_VDDACTRL_RSRVD1(v) \ + (((v) << 5) & BM_POWER_VDDACTRL_RSRVD1) +#define BP_POWER_VDDACTRL_TRG 0 +#define BM_POWER_VDDACTRL_TRG 0x0000001F +#define BF_POWER_VDDACTRL_TRG(v) \ + (((v) << 0) & BM_POWER_VDDACTRL_TRG) + +#define HW_POWER_VDDIOCTRL (0x00000060) +#define HW_POWER_VDDIOCTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_VDDIOCTRL) + +#define BP_POWER_VDDIOCTRL_RSRVD5 24 +#define BM_POWER_VDDIOCTRL_RSRVD5 0xFF000000 +#define BF_POWER_VDDIOCTRL_RSRVD5(v) \ + (((v) << 24) & BM_POWER_VDDIOCTRL_RSRVD5) +#define BP_POWER_VDDIOCTRL_ADJTN 20 +#define BM_POWER_VDDIOCTRL_ADJTN 0x00F00000 +#define BF_POWER_VDDIOCTRL_ADJTN(v) \ + (((v) << 20) & BM_POWER_VDDIOCTRL_ADJTN) +#define BM_POWER_VDDIOCTRL_RSRVD4 0x00080000 +#define BM_POWER_VDDIOCTRL_PWDN_BRNOUT 0x00040000 +#define BM_POWER_VDDIOCTRL_DISABLE_STEPPING 0x00020000 +#define BM_POWER_VDDIOCTRL_DISABLE_FET 0x00010000 +#define BP_POWER_VDDIOCTRL_RSRVD3 14 +#define BM_POWER_VDDIOCTRL_RSRVD3 0x0000C000 +#define BF_POWER_VDDIOCTRL_RSRVD3(v) \ + (((v) << 14) & BM_POWER_VDDIOCTRL_RSRVD3) +#define BP_POWER_VDDIOCTRL_LINREG_OFFSET 12 +#define BM_POWER_VDDIOCTRL_LINREG_OFFSET 0x00003000 +#define BF_POWER_VDDIOCTRL_LINREG_OFFSET(v) \ + (((v) << 12) & BM_POWER_VDDIOCTRL_LINREG_OFFSET) +#define BM_POWER_VDDIOCTRL_RSRVD2 0x00000800 +#define BP_POWER_VDDIOCTRL_BO_OFFSET 8 +#define BM_POWER_VDDIOCTRL_BO_OFFSET 0x00000700 +#define BF_POWER_VDDIOCTRL_BO_OFFSET(v) \ + (((v) << 8) & BM_POWER_VDDIOCTRL_BO_OFFSET) +#define BP_POWER_VDDIOCTRL_RSRVD1 5 +#define BM_POWER_VDDIOCTRL_RSRVD1 0x000000E0 +#define BF_POWER_VDDIOCTRL_RSRVD1(v) \ + (((v) << 5) & BM_POWER_VDDIOCTRL_RSRVD1) #define BP_POWER_VDDIOCTRL_TRG 0 +#define BM_POWER_VDDIOCTRL_TRG 0x0000001F +#define BF_POWER_VDDIOCTRL_TRG(v) \ + (((v) << 0) & BM_POWER_VDDIOCTRL_TRG) -#define HW_POWER_STS 0xC0 -#define BM_POWER_STS_VBUSVALID 0x00000002 -#define BM_POWER_STS_BVALID 0x00000004 -#define BM_POWER_STS_AVALID 0x00000008 +#define HW_POWER_VDDMEMCTRL (0x00000070) +#define HW_POWER_VDDMEMCTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_VDDMEMCTRL) + +#define BP_POWER_VDDMEMCTRL_RSRVD2 11 +#define BM_POWER_VDDMEMCTRL_RSRVD2 0xFFFFF800 +#define BF_POWER_VDDMEMCTRL_RSRVD2(v) \ + (((v) << 11) & BM_POWER_VDDMEMCTRL_RSRVD2) +#define BM_POWER_VDDMEMCTRL_PULLDOWN_ACTIVE 0x00000400 +#define BM_POWER_VDDMEMCTRL_ENABLE_ILIMIT 0x00000200 +#define BM_POWER_VDDMEMCTRL_ENABLE_LINREG 0x00000100 +#define BP_POWER_VDDMEMCTRL_RSRVD1 5 +#define BM_POWER_VDDMEMCTRL_RSRVD1 0x000000E0 +#define BF_POWER_VDDMEMCTRL_RSRVD1(v) \ + (((v) << 5) & BM_POWER_VDDMEMCTRL_RSRVD1) +#define BP_POWER_VDDMEMCTRL_TRG 0 +#define BM_POWER_VDDMEMCTRL_TRG 0x0000001F +#define BF_POWER_VDDMEMCTRL_TRG(v) \ + (((v) << 0) & BM_POWER_VDDMEMCTRL_TRG) + +#define HW_POWER_DCDC4P2 (0x00000080) +#define HW_POWER_DCDC4P2_ADDR \ + (REGS_POWER_BASE + HW_POWER_DCDC4P2) + +#define BP_POWER_DCDC4P2_DROPOUT_CTRL 28 +#define BM_POWER_DCDC4P2_DROPOUT_CTRL 0xF0000000 +#define BF_POWER_DCDC4P2_DROPOUT_CTRL(v) \ + (((v) << 28) & BM_POWER_DCDC4P2_DROPOUT_CTRL) +#define BP_POWER_DCDC4P2_RSRVD5 26 +#define BM_POWER_DCDC4P2_RSRVD5 0x0C000000 +#define BF_POWER_DCDC4P2_RSRVD5(v) \ + (((v) << 26) & BM_POWER_DCDC4P2_RSRVD5) +#define BP_POWER_DCDC4P2_ISTEAL_THRESH 24 +#define BM_POWER_DCDC4P2_ISTEAL_THRESH 0x03000000 +#define BF_POWER_DCDC4P2_ISTEAL_THRESH(v) \ + (((v) << 24) & BM_POWER_DCDC4P2_ISTEAL_THRESH) +#define BM_POWER_DCDC4P2_ENABLE_4P2 0x00800000 +#define BM_POWER_DCDC4P2_ENABLE_DCDC 0x00400000 +#define BM_POWER_DCDC4P2_HYST_DIR 0x00200000 +#define BM_POWER_DCDC4P2_HYST_THRESH 0x00100000 +#define BM_POWER_DCDC4P2_RSRVD3 0x00080000 +#define BP_POWER_DCDC4P2_TRG 16 +#define BM_POWER_DCDC4P2_TRG 0x00070000 +#define BF_POWER_DCDC4P2_TRG(v) \ + (((v) << 16) & BM_POWER_DCDC4P2_TRG) +#define BP_POWER_DCDC4P2_RSRVD2 13 +#define BM_POWER_DCDC4P2_RSRVD2 0x0000E000 +#define BF_POWER_DCDC4P2_RSRVD2(v) \ + (((v) << 13) & BM_POWER_DCDC4P2_RSRVD2) +#define BP_POWER_DCDC4P2_BO 8 +#define BM_POWER_DCDC4P2_BO 0x00001F00 +#define BF_POWER_DCDC4P2_BO(v) \ + (((v) << 8) & BM_POWER_DCDC4P2_BO) +#define BP_POWER_DCDC4P2_RSRVD1 5 +#define BM_POWER_DCDC4P2_RSRVD1 0x000000E0 +#define BF_POWER_DCDC4P2_RSRVD1(v) \ + (((v) << 5) & BM_POWER_DCDC4P2_RSRVD1) +#define BP_POWER_DCDC4P2_CMPTRIP 0 +#define BM_POWER_DCDC4P2_CMPTRIP 0x0000001F +#define BF_POWER_DCDC4P2_CMPTRIP(v) \ + (((v) << 0) & BM_POWER_DCDC4P2_CMPTRIP) + +#define HW_POWER_MISC (0x00000090) +#define HW_POWER_MISC_ADDR \ + (REGS_POWER_BASE + HW_POWER_MISC) + +#define BP_POWER_MISC_RSRVD2 7 +#define BM_POWER_MISC_RSRVD2 0xFFFFFF80 +#define BF_POWER_MISC_RSRVD2(v) \ + (((v) << 7) & BM_POWER_MISC_RSRVD2) +#define BP_POWER_MISC_FREQSEL 4 +#define BM_POWER_MISC_FREQSEL 0x00000070 +#define BF_POWER_MISC_FREQSEL(v) \ + (((v) << 4) & BM_POWER_MISC_FREQSEL) +#define BM_POWER_MISC_RSRVD1 0x00000008 +#define BM_POWER_MISC_DELAY_TIMING 0x00000004 +#define BM_POWER_MISC_TEST 0x00000002 +#define BM_POWER_MISC_SEL_PLLCLK 0x00000001 + +#define HW_POWER_DCLIMITS (0x000000a0) +#define HW_POWER_DCLIMITS_ADDR \ + (REGS_POWER_BASE + HW_POWER_DCLIMITS) + +#define BP_POWER_DCLIMITS_RSRVD3 16 +#define BM_POWER_DCLIMITS_RSRVD3 0xFFFF0000 +#define BF_POWER_DCLIMITS_RSRVD3(v) \ + (((v) << 16) & BM_POWER_DCLIMITS_RSRVD3) +#define BM_POWER_DCLIMITS_RSRVD2 0x00008000 +#define BP_POWER_DCLIMITS_POSLIMIT_BUCK 8 +#define BM_POWER_DCLIMITS_POSLIMIT_BUCK 0x00007F00 +#define BF_POWER_DCLIMITS_POSLIMIT_BUCK(v) \ + (((v) << 8) & BM_POWER_DCLIMITS_POSLIMIT_BUCK) +#define BM_POWER_DCLIMITS_RSRVD1 0x00000080 +#define BP_POWER_DCLIMITS_NEGLIMIT 0 +#define BM_POWER_DCLIMITS_NEGLIMIT 0x0000007F +#define BF_POWER_DCLIMITS_NEGLIMIT(v) \ + (((v) << 0) & BM_POWER_DCLIMITS_NEGLIMIT) + +#define HW_POWER_LOOPCTRL (0x000000b0) +#define HW_POWER_LOOPCTRL_SET (0x000000b4) +#define HW_POWER_LOOPCTRL_CLR (0x000000b8) +#define HW_POWER_LOOPCTRL_TOG (0x000000bc) +#define HW_POWER_LOOPCTRL_ADDR \ + (REGS_POWER_BASE + HW_POWER_LOOPCTRL) +#define HW_POWER_LOOPCTRL_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_LOOPCTRL_SET) +#define HW_POWER_LOOPCTRL_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_LOOPCTRL_CLR) +#define HW_POWER_LOOPCTRL_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_LOOPCTRL_TOG) + +#define BP_POWER_LOOPCTRL_RSRVD3 21 +#define BM_POWER_LOOPCTRL_RSRVD3 0xFFE00000 +#define BF_POWER_LOOPCTRL_RSRVD3(v) \ + (((v) << 21) & BM_POWER_LOOPCTRL_RSRVD3) +#define BM_POWER_LOOPCTRL_TOGGLE_DIF 0x00100000 +#define BM_POWER_LOOPCTRL_HYST_SIGN 0x00080000 +#define BM_POWER_LOOPCTRL_EN_CM_HYST 0x00040000 +#define BM_POWER_LOOPCTRL_EN_DF_HYST 0x00020000 +#define BM_POWER_LOOPCTRL_CM_HYST_THRESH 0x00010000 +#define BM_POWER_LOOPCTRL_DF_HYST_THRESH 0x00008000 +#define BM_POWER_LOOPCTRL_RCSCALE_THRESH 0x00004000 +#define BP_POWER_LOOPCTRL_EN_RCSCALE 12 +#define BM_POWER_LOOPCTRL_EN_RCSCALE 0x00003000 +#define BF_POWER_LOOPCTRL_EN_RCSCALE(v) \ + (((v) << 12) & BM_POWER_LOOPCTRL_EN_RCSCALE) +#define BM_POWER_LOOPCTRL_RSRVD2 0x00000800 +#define BP_POWER_LOOPCTRL_DC_FF 8 +#define BM_POWER_LOOPCTRL_DC_FF 0x00000700 +#define BF_POWER_LOOPCTRL_DC_FF(v) \ + (((v) << 8) & BM_POWER_LOOPCTRL_DC_FF) +#define BP_POWER_LOOPCTRL_DC_R 4 +#define BM_POWER_LOOPCTRL_DC_R 0x000000F0 +#define BF_POWER_LOOPCTRL_DC_R(v) \ + (((v) << 4) & BM_POWER_LOOPCTRL_DC_R) +#define BP_POWER_LOOPCTRL_RSRVD1 2 +#define BM_POWER_LOOPCTRL_RSRVD1 0x0000000C +#define BF_POWER_LOOPCTRL_RSRVD1(v) \ + (((v) << 2) & BM_POWER_LOOPCTRL_RSRVD1) +#define BP_POWER_LOOPCTRL_DC_C 0 +#define BM_POWER_LOOPCTRL_DC_C 0x00000003 +#define BF_POWER_LOOPCTRL_DC_C(v) \ + (((v) << 0) & BM_POWER_LOOPCTRL_DC_C) + +#define HW_POWER_STS (0x000000c0) +#define HW_POWER_STS_ADDR \ + (REGS_POWER_BASE + HW_POWER_STS) + +#define BP_POWER_STS_RSRVD3 30 +#define BM_POWER_STS_RSRVD3 0xC0000000 +#define BF_POWER_STS_RSRVD3(v) \ + (((v) << 30) & BM_POWER_STS_RSRVD3) +#define BP_POWER_STS_PWRUP_SOURCE 24 +#define BM_POWER_STS_PWRUP_SOURCE 0x3F000000 +#define BF_POWER_STS_PWRUP_SOURCE(v) \ + (((v) << 24) & BM_POWER_STS_PWRUP_SOURCE) +#define BP_POWER_STS_RSRVD2 22 +#define BM_POWER_STS_RSRVD2 0x00C00000 +#define BF_POWER_STS_RSRVD2(v) \ + (((v) << 22) & BM_POWER_STS_RSRVD2) +#define BP_POWER_STS_PSWITCH 20 +#define BM_POWER_STS_PSWITCH 0x00300000 +#define BF_POWER_STS_PSWITCH(v) \ + (((v) << 20) & BM_POWER_STS_PSWITCH) +#define BP_POWER_STS_RSRVD1 18 +#define BM_POWER_STS_RSRVD1 0x000C0000 +#define BF_POWER_STS_RSRVD1(v) \ + (((v) << 18) & BM_POWER_STS_RSRVD1) +#define BM_POWER_STS_AVALID_STATUS 0x00020000 +#define BM_POWER_STS_BVALID_STATUS 0x00010000 +#define BM_POWER_STS_VBUSVALID_STATUS 0x00008000 +#define BM_POWER_STS_SESSEND_STATUS 0x00004000 +#define BM_POWER_STS_BATT_BO 0x00002000 +#define BM_POWER_STS_VDD5V_FAULT 0x00001000 +#define BM_POWER_STS_CHRGSTS 0x00000800 +#define BM_POWER_STS_DCDC_4P2_BO 0x00000400 #define BM_POWER_STS_DC_OK 0x00000200 +#define BM_POWER_STS_VDDIO_BO 0x00000100 +#define BM_POWER_STS_VDDA_BO 0x00000080 +#define BM_POWER_STS_VDDD_BO 0x00000040 +#define BM_POWER_STS_VDD5V_GT_VDDIO 0x00000020 +#define BM_POWER_STS_VDD5V_DROOP 0x00000010 +#define BM_POWER_STS_AVALID 0x00000008 +#define BM_POWER_STS_BVALID 0x00000004 +#define BM_POWER_STS_VBUSVALID 0x00000002 +#define BM_POWER_STS_SESSEND 0x00000001 -#define HW_POWER_RESET 0x100 - -#define HW_POWER_DEBUG 0x110 -#define BM_POWER_DEBUG_BVALIDPIOLOCK 0x00000002 -#define BM_POWER_DEBUG_AVALIDPIOLOCK 0x00000004 +#define HW_POWER_SPEED (0x000000d0) +#define HW_POWER_SPEED_SET (0x000000d4) +#define HW_POWER_SPEED_CLR (0x000000d8) +#define HW_POWER_SPEED_TOG (0x000000dc) +#define HW_POWER_SPEED_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPEED) +#define HW_POWER_SPEED_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPEED_SET) +#define HW_POWER_SPEED_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPEED_CLR) +#define HW_POWER_SPEED_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPEED_TOG) + +#define BP_POWER_SPEED_RSRVD1 24 +#define BM_POWER_SPEED_RSRVD1 0xFF000000 +#define BF_POWER_SPEED_RSRVD1(v) \ + (((v) << 24) & BM_POWER_SPEED_RSRVD1) +#define BP_POWER_SPEED_STATUS 16 +#define BM_POWER_SPEED_STATUS 0x00FF0000 +#define BF_POWER_SPEED_STATUS(v) \ + (((v) << 16) & BM_POWER_SPEED_STATUS) +#define BP_POWER_SPEED_RSRVD0 2 +#define BM_POWER_SPEED_RSRVD0 0x0000FFFC +#define BF_POWER_SPEED_RSRVD0(v) \ + (((v) << 2) & BM_POWER_SPEED_RSRVD0) +#define BP_POWER_SPEED_CTRL 0 +#define BM_POWER_SPEED_CTRL 0x00000003 +#define BF_POWER_SPEED_CTRL(v) \ + (((v) << 0) & BM_POWER_SPEED_CTRL) + +#define HW_POWER_BATTMONITOR (0x000000e0) +#define HW_POWER_BATTMONITOR_ADDR \ + (REGS_POWER_BASE + HW_POWER_BATTMONITOR) + +#define BP_POWER_BATTMONITOR_RSRVD3 26 +#define BM_POWER_BATTMONITOR_RSRVD3 0xFC000000 +#define BF_POWER_BATTMONITOR_RSRVD3(v) \ + (((v) << 26) & BM_POWER_BATTMONITOR_RSRVD3) +#define BP_POWER_BATTMONITOR_BATT_VAL 16 +#define BM_POWER_BATTMONITOR_BATT_VAL 0x03FF0000 +#define BF_POWER_BATTMONITOR_BATT_VAL(v) \ + (((v) << 16) & BM_POWER_BATTMONITOR_BATT_VAL) +#define BP_POWER_BATTMONITOR_RSRVD2 11 +#define BM_POWER_BATTMONITOR_RSRVD2 0x0000F800 +#define BF_POWER_BATTMONITOR_RSRVD2(v) \ + (((v) << 11) & BM_POWER_BATTMONITOR_RSRVD2) +#define BM_POWER_BATTMONITOR_EN_BATADJ 0x00000400 +#define BM_POWER_BATTMONITOR_PWDN_BATTBRNOUT 0x00000200 +#define BM_POWER_BATTMONITOR_BRWNOUT_PWD 0x00000100 +#define BP_POWER_BATTMONITOR_RSRVD1 5 +#define BM_POWER_BATTMONITOR_RSRVD1 0x000000E0 +#define BF_POWER_BATTMONITOR_RSRVD1(v) \ + (((v) << 5) & BM_POWER_BATTMONITOR_RSRVD1) +#define BP_POWER_BATTMONITOR_BRWNOUT_LVL 0 +#define BM_POWER_BATTMONITOR_BRWNOUT_LVL 0x0000001F +#define BF_POWER_BATTMONITOR_BRWNOUT_LVL(v) \ + (((v) << 0) & BM_POWER_BATTMONITOR_BRWNOUT_LVL) + +#define HW_POWER_RESET (0x00000100) +#define HW_POWER_RESET_SET (0x00000104) +#define HW_POWER_RESET_CLR (0x00000108) +#define HW_POWER_RESET_TOG (0x0000010c) +#define HW_POWER_RESET_ADDR \ + (REGS_POWER_BASE + HW_POWER_RESET) +#define HW_POWER_RESET_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_RESET_SET) +#define HW_POWER_RESET_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_RESET_CLR) +#define HW_POWER_RESET_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_RESET_TOG) + +#define BP_POWER_RESET_UNLOCK 16 +#define BM_POWER_RESET_UNLOCK 0xFFFF0000 +#define BF_POWER_RESET_UNLOCK(v) \ + (((v) << 16) & BM_POWER_RESET_UNLOCK) +#define BV_POWER_RESET_UNLOCK__KEY 0x3E77 +#define BP_POWER_RESET_RSRVD1 2 +#define BM_POWER_RESET_RSRVD1 0x0000FFFC +#define BF_POWER_RESET_RSRVD1(v) \ + (((v) << 2) & BM_POWER_RESET_RSRVD1) +#define BM_POWER_RESET_PWD_OFF 0x00000002 +#define BM_POWER_RESET_PWD 0x00000001 + +#define HW_POWER_DEBUG (0x00000110) +#define HW_POWER_DEBUG_SET (0x00000114) +#define HW_POWER_DEBUG_CLR (0x00000118) +#define HW_POWER_DEBUG_TOG (0x0000011c) +#define HW_POWER_DEBUG_ADDR \ + (REGS_POWER_BASE + HW_POWER_DEBUG) +#define HW_POWER_DEBUG_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_DEBUG_SET) +#define HW_POWER_DEBUG_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_DEBUG_CLR) +#define HW_POWER_DEBUG_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_DEBUG_TOG) + +#define BP_POWER_DEBUG_RSRVD0 4 +#define BM_POWER_DEBUG_RSRVD0 0xFFFFFFF0 +#define BF_POWER_DEBUG_RSRVD0(v) \ + (((v) << 4) & BM_POWER_DEBUG_RSRVD0) #define BM_POWER_DEBUG_VBUSVALIDPIOLOCK 0x00000008 +#define BM_POWER_DEBUG_AVALIDPIOLOCK 0x00000004 +#define BM_POWER_DEBUG_BVALIDPIOLOCK 0x00000002 +#define BM_POWER_DEBUG_SESSENDPIOLOCK 0x00000001 -#endif +#define HW_POWER_SPECIAL (0x00000120) +#define HW_POWER_SPECIAL_SET (0x00000124) +#define HW_POWER_SPECIAL_CLR (0x00000128) +#define HW_POWER_SPECIAL_TOG (0x0000012c) +#define HW_POWER_SPECIAL_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPECIAL) +#define HW_POWER_SPECIAL_SET_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPECIAL_SET) +#define HW_POWER_SPECIAL_CLR_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPECIAL_CLR) +#define HW_POWER_SPECIAL_TOG_ADDR \ + (REGS_POWER_BASE + HW_POWER_SPECIAL_TOG) + +#define BP_POWER_SPECIAL_TEST 0 +#define BM_POWER_SPECIAL_TEST 0xFFFFFFFF +#define BF_POWER_SPECIAL_TEST(v) (v) + +#define HW_POWER_VERSION (0x00000130) +#define HW_POWER_VERSION_ADDR \ + (REGS_POWER_BASE + HW_POWER_VERSION) + +#define BP_POWER_VERSION_MAJOR 24 +#define BM_POWER_VERSION_MAJOR 0xFF000000 +#define BF_POWER_VERSION_MAJOR(v) \ + (((v) << 24) & BM_POWER_VERSION_MAJOR) +#define BP_POWER_VERSION_MINOR 16 +#define BM_POWER_VERSION_MINOR 0x00FF0000 +#define BF_POWER_VERSION_MINOR(v) \ + (((v) << 16) & BM_POWER_VERSION_MINOR) +#define BP_POWER_VERSION_STEP 0 +#define BM_POWER_VERSION_STEP 0x0000FFFF +#define BF_POWER_VERSION_STEP(v) \ + (((v) << 0) & BM_POWER_VERSION_STEP) +#endif /* __ARCH_ARM___POWER_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-tvenc.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-tvenc.h @@ -1,7 +1,7 @@ /* - * stmp378x: TVENC register definitions + * STMP TVENC Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,51 +17,769 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_TVENC_BASE (STMP3XXX_REGS_BASE + 0x38000) -#define REGS_TVENC_PHYS 0x80038000 -#define REGS_TVENC_SIZE 0x2000 -#define HW_TVENC_CTRL 0x0 -#define BM_TVENC_CTRL_CLKGATE 0x40000000 -#define BM_TVENC_CTRL_SFTRST 0x80000000 +#ifndef __ARCH_ARM___TVENC_H +#define __ARCH_ARM___TVENC_H 1 -#define HW_TVENC_CONFIG 0x10 -#define BM_TVENC_CONFIG_ENCD_MODE 0x00000007 -#define BP_TVENC_CONFIG_ENCD_MODE 0 -#define BM_TVENC_CONFIG_SYNC_MODE 0x00000070 -#define BP_TVENC_CONFIG_SYNC_MODE 4 -#define BM_TVENC_CONFIG_FSYNC_PHS 0x00000200 -#define BM_TVENC_CONFIG_CGAIN 0x0000C000 -#define BP_TVENC_CONFIG_CGAIN 14 -#define BM_TVENC_CONFIG_YGAIN_SEL 0x00030000 -#define BP_TVENC_CONFIG_YGAIN_SEL 16 -#define BM_TVENC_CONFIG_PAL_SHAPE 0x00100000 +#define REGS_TVENC_BASE (STMP3XXX_REGS_BASE + 0x38000) +#define REGS_TVENC_PHYS (0x80038000) +#define REGS_TVENC_SIZE 0x00002000 + +#define HW_TVENC_CTRL (0x00000000) +#define HW_TVENC_CTRL_SET (0x00000004) +#define HW_TVENC_CTRL_CLR (0x00000008) +#define HW_TVENC_CTRL_TOG (0x0000000c) +#define HW_TVENC_CTRL_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CTRL) +#define HW_TVENC_CTRL_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CTRL_SET) +#define HW_TVENC_CTRL_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CTRL_CLR) +#define HW_TVENC_CTRL_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CTRL_TOG) -#define HW_TVENC_SYNCOFFSET 0x30 +#define BM_TVENC_CTRL_SFTRST 0x80000000 +#define BM_TVENC_CTRL_CLKGATE 0x40000000 +#define BM_TVENC_CTRL_TVENC_MACROVISION_PRESENT 0x20000000 +#define BM_TVENC_CTRL_TVENC_COMPOSITE_PRESENT 0x10000000 +#define BM_TVENC_CTRL_TVENC_SVIDEO_PRESENT 0x08000000 +#define BM_TVENC_CTRL_TVENC_COMPONENT_PRESENT 0x04000000 +#define BP_TVENC_CTRL_RSRVD1 6 +#define BM_TVENC_CTRL_RSRVD1 0x03FFFFC0 +#define BF_TVENC_CTRL_RSRVD1(v) \ + (((v) << 6) & BM_TVENC_CTRL_RSRVD1) +#define BM_TVENC_CTRL_DAC_FIFO_NO_WRITE 0x00000020 +#define BM_TVENC_CTRL_DAC_FIFO_NO_READ 0x00000010 +#define BM_TVENC_CTRL_DAC_DATA_FIFO_RST 0x00000008 +#define BP_TVENC_CTRL_RSRVD2 1 +#define BM_TVENC_CTRL_RSRVD2 0x00000006 +#define BF_TVENC_CTRL_RSRVD2(v) \ + (((v) << 1) & BM_TVENC_CTRL_RSRVD2) +#define BM_TVENC_CTRL_DAC_MUX_MODE 0x00000001 + +#define HW_TVENC_CONFIG (0x00000010) +#define HW_TVENC_CONFIG_SET (0x00000014) +#define HW_TVENC_CONFIG_CLR (0x00000018) +#define HW_TVENC_CONFIG_TOG (0x0000001c) +#define HW_TVENC_CONFIG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CONFIG) +#define HW_TVENC_CONFIG_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CONFIG_SET) +#define HW_TVENC_CONFIG_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CONFIG_CLR) +#define HW_TVENC_CONFIG_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CONFIG_TOG) + +#define BP_TVENC_CONFIG_RSRVD5 28 +#define BM_TVENC_CONFIG_RSRVD5 0xF0000000 +#define BF_TVENC_CONFIG_RSRVD5(v) \ + (((v) << 28) & BM_TVENC_CONFIG_RSRVD5) +#define BM_TVENC_CONFIG_DEFAULT_PICFORM 0x08000000 +#define BP_TVENC_CONFIG_YDEL_ADJ 24 +#define BM_TVENC_CONFIG_YDEL_ADJ 0x07000000 +#define BF_TVENC_CONFIG_YDEL_ADJ(v) \ + (((v) << 24) & BM_TVENC_CONFIG_YDEL_ADJ) +#define BM_TVENC_CONFIG_RSRVD4 0x00800000 +#define BM_TVENC_CONFIG_RSRVD3 0x00400000 +#define BM_TVENC_CONFIG_ADD_YPBPR_PED 0x00200000 +#define BM_TVENC_CONFIG_PAL_SHAPE 0x00100000 +#define BM_TVENC_CONFIG_NO_PED 0x00080000 +#define BM_TVENC_CONFIG_COLOR_BAR_EN 0x00040000 +#define BP_TVENC_CONFIG_YGAIN_SEL 16 +#define BM_TVENC_CONFIG_YGAIN_SEL 0x00030000 +#define BF_TVENC_CONFIG_YGAIN_SEL(v) \ + (((v) << 16) & BM_TVENC_CONFIG_YGAIN_SEL) +#define BP_TVENC_CONFIG_CGAIN 14 +#define BM_TVENC_CONFIG_CGAIN 0x0000C000 +#define BF_TVENC_CONFIG_CGAIN(v) \ + (((v) << 14) & BM_TVENC_CONFIG_CGAIN) +#define BP_TVENC_CONFIG_CLK_PHS 12 +#define BM_TVENC_CONFIG_CLK_PHS 0x00003000 +#define BF_TVENC_CONFIG_CLK_PHS(v) \ + (((v) << 12) & BM_TVENC_CONFIG_CLK_PHS) +#define BM_TVENC_CONFIG_RSRVD2 0x00000800 +#define BM_TVENC_CONFIG_FSYNC_ENBL 0x00000400 +#define BM_TVENC_CONFIG_FSYNC_PHS 0x00000200 +#define BM_TVENC_CONFIG_HSYNC_PHS 0x00000100 +#define BM_TVENC_CONFIG_VSYNC_PHS 0x00000080 +#define BP_TVENC_CONFIG_SYNC_MODE 4 +#define BM_TVENC_CONFIG_SYNC_MODE 0x00000070 +#define BF_TVENC_CONFIG_SYNC_MODE(v) \ + (((v) << 4) & BM_TVENC_CONFIG_SYNC_MODE) +#define BM_TVENC_CONFIG_RSRVD1 0x00000008 +#define BP_TVENC_CONFIG_ENCD_MODE 0 +#define BM_TVENC_CONFIG_ENCD_MODE 0x00000007 +#define BF_TVENC_CONFIG_ENCD_MODE(v) \ + (((v) << 0) & BM_TVENC_CONFIG_ENCD_MODE) -#define HW_TVENC_COLORSUB0 0xC0 +#define HW_TVENC_FILTCTRL (0x00000020) +#define HW_TVENC_FILTCTRL_SET (0x00000024) +#define HW_TVENC_FILTCTRL_CLR (0x00000028) +#define HW_TVENC_FILTCTRL_TOG (0x0000002c) +#define HW_TVENC_FILTCTRL_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_FILTCTRL) +#define HW_TVENC_FILTCTRL_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_FILTCTRL_SET) +#define HW_TVENC_FILTCTRL_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_FILTCTRL_CLR) +#define HW_TVENC_FILTCTRL_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_FILTCTRL_TOG) + +#define BP_TVENC_FILTCTRL_RSRVD1 20 +#define BM_TVENC_FILTCTRL_RSRVD1 0xFFF00000 +#define BF_TVENC_FILTCTRL_RSRVD1(v) \ + (((v) << 20) & BM_TVENC_FILTCTRL_RSRVD1) +#define BM_TVENC_FILTCTRL_YSHARP_BW 0x00080000 +#define BM_TVENC_FILTCTRL_YD_OFFSETSEL 0x00040000 +#define BM_TVENC_FILTCTRL_SEL_YLPF 0x00020000 +#define BM_TVENC_FILTCTRL_SEL_CLPF 0x00010000 +#define BM_TVENC_FILTCTRL_SEL_YSHARP 0x00008000 +#define BM_TVENC_FILTCTRL_YLPF_COEFSEL 0x00004000 +#define BM_TVENC_FILTCTRL_COEFSEL_CLPF 0x00002000 +#define BM_TVENC_FILTCTRL_YS_GAINSGN 0x00001000 +#define BP_TVENC_FILTCTRL_YS_GAINSEL 10 +#define BM_TVENC_FILTCTRL_YS_GAINSEL 0x00000C00 +#define BF_TVENC_FILTCTRL_YS_GAINSEL(v) \ + (((v) << 10) & BM_TVENC_FILTCTRL_YS_GAINSEL) +#define BM_TVENC_FILTCTRL_RSRVD2 0x00000200 +#define BM_TVENC_FILTCTRL_RSRVD3 0x00000100 +#define BP_TVENC_FILTCTRL_RSRVD4 0 +#define BM_TVENC_FILTCTRL_RSRVD4 0x000000FF +#define BF_TVENC_FILTCTRL_RSRVD4(v) \ + (((v) << 0) & BM_TVENC_FILTCTRL_RSRVD4) + +#define HW_TVENC_SYNCOFFSET (0x00000030) +#define HW_TVENC_SYNCOFFSET_SET (0x00000034) +#define HW_TVENC_SYNCOFFSET_CLR (0x00000038) +#define HW_TVENC_SYNCOFFSET_TOG (0x0000003c) +#define HW_TVENC_SYNCOFFSET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET) +#define HW_TVENC_SYNCOFFSET_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET_SET) +#define HW_TVENC_SYNCOFFSET_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET_CLR) +#define HW_TVENC_SYNCOFFSET_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_SYNCOFFSET_TOG) + +#define BM_TVENC_SYNCOFFSET_RSRVD1 0x80000000 +#define BP_TVENC_SYNCOFFSET_HSO 20 +#define BM_TVENC_SYNCOFFSET_HSO 0x7FF00000 +#define BF_TVENC_SYNCOFFSET_HSO(v) \ + (((v) << 20) & BM_TVENC_SYNCOFFSET_HSO) +#define BP_TVENC_SYNCOFFSET_VSO 10 +#define BM_TVENC_SYNCOFFSET_VSO 0x000FFC00 +#define BF_TVENC_SYNCOFFSET_VSO(v) \ + (((v) << 10) & BM_TVENC_SYNCOFFSET_VSO) +#define BP_TVENC_SYNCOFFSET_HLC 0 +#define BM_TVENC_SYNCOFFSET_HLC 0x000003FF +#define BF_TVENC_SYNCOFFSET_HLC(v) \ + (((v) << 0) & BM_TVENC_SYNCOFFSET_HLC) + +#define HW_TVENC_HTIMINGSYNC0 (0x00000040) +#define HW_TVENC_HTIMINGSYNC0_SET (0x00000044) +#define HW_TVENC_HTIMINGSYNC0_CLR (0x00000048) +#define HW_TVENC_HTIMINGSYNC0_TOG (0x0000004c) +#define HW_TVENC_HTIMINGSYNC0_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC0) +#define HW_TVENC_HTIMINGSYNC0_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC0_SET) +#define HW_TVENC_HTIMINGSYNC0_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC0_CLR) +#define HW_TVENC_HTIMINGSYNC0_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC0_TOG) + +#define BP_TVENC_HTIMINGSYNC0_RSRVD2 26 +#define BM_TVENC_HTIMINGSYNC0_RSRVD2 0xFC000000 +#define BF_TVENC_HTIMINGSYNC0_RSRVD2(v) \ + (((v) << 26) & BM_TVENC_HTIMINGSYNC0_RSRVD2) +#define BP_TVENC_HTIMINGSYNC0_SYNC_END 16 +#define BM_TVENC_HTIMINGSYNC0_SYNC_END 0x03FF0000 +#define BF_TVENC_HTIMINGSYNC0_SYNC_END(v) \ + (((v) << 16) & BM_TVENC_HTIMINGSYNC0_SYNC_END) +#define BP_TVENC_HTIMINGSYNC0_RSRVD1 10 +#define BM_TVENC_HTIMINGSYNC0_RSRVD1 0x0000FC00 +#define BF_TVENC_HTIMINGSYNC0_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_HTIMINGSYNC0_RSRVD1) +#define BP_TVENC_HTIMINGSYNC0_SYNC_STRT 0 +#define BM_TVENC_HTIMINGSYNC0_SYNC_STRT 0x000003FF +#define BF_TVENC_HTIMINGSYNC0_SYNC_STRT(v) \ + (((v) << 0) & BM_TVENC_HTIMINGSYNC0_SYNC_STRT) + +#define HW_TVENC_HTIMINGSYNC1 (0x00000050) +#define HW_TVENC_HTIMINGSYNC1_SET (0x00000054) +#define HW_TVENC_HTIMINGSYNC1_CLR (0x00000058) +#define HW_TVENC_HTIMINGSYNC1_TOG (0x0000005c) +#define HW_TVENC_HTIMINGSYNC1_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC1) +#define HW_TVENC_HTIMINGSYNC1_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC1_SET) +#define HW_TVENC_HTIMINGSYNC1_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC1_CLR) +#define HW_TVENC_HTIMINGSYNC1_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGSYNC1_TOG) + +#define BP_TVENC_HTIMINGSYNC1_RSRVD2 26 +#define BM_TVENC_HTIMINGSYNC1_RSRVD2 0xFC000000 +#define BF_TVENC_HTIMINGSYNC1_RSRVD2(v) \ + (((v) << 26) & BM_TVENC_HTIMINGSYNC1_RSRVD2) +#define BP_TVENC_HTIMINGSYNC1_SYNC_EQEND 16 +#define BM_TVENC_HTIMINGSYNC1_SYNC_EQEND 0x03FF0000 +#define BF_TVENC_HTIMINGSYNC1_SYNC_EQEND(v) \ + (((v) << 16) & BM_TVENC_HTIMINGSYNC1_SYNC_EQEND) +#define BP_TVENC_HTIMINGSYNC1_RSRVD1 10 +#define BM_TVENC_HTIMINGSYNC1_RSRVD1 0x0000FC00 +#define BF_TVENC_HTIMINGSYNC1_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_HTIMINGSYNC1_RSRVD1) +#define BP_TVENC_HTIMINGSYNC1_SYNC_SREND 0 +#define BM_TVENC_HTIMINGSYNC1_SYNC_SREND 0x000003FF +#define BF_TVENC_HTIMINGSYNC1_SYNC_SREND(v) \ + (((v) << 0) & BM_TVENC_HTIMINGSYNC1_SYNC_SREND) + +#define HW_TVENC_HTIMINGACTIVE (0x00000060) +#define HW_TVENC_HTIMINGACTIVE_SET (0x00000064) +#define HW_TVENC_HTIMINGACTIVE_CLR (0x00000068) +#define HW_TVENC_HTIMINGACTIVE_TOG (0x0000006c) +#define HW_TVENC_HTIMINGACTIVE_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGACTIVE) +#define HW_TVENC_HTIMINGACTIVE_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGACTIVE_SET) +#define HW_TVENC_HTIMINGACTIVE_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGACTIVE_CLR) +#define HW_TVENC_HTIMINGACTIVE_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGACTIVE_TOG) + +#define BP_TVENC_HTIMINGACTIVE_RSRVD2 26 +#define BM_TVENC_HTIMINGACTIVE_RSRVD2 0xFC000000 +#define BF_TVENC_HTIMINGACTIVE_RSRVD2(v) \ + (((v) << 26) & BM_TVENC_HTIMINGACTIVE_RSRVD2) +#define BP_TVENC_HTIMINGACTIVE_ACTV_END 16 +#define BM_TVENC_HTIMINGACTIVE_ACTV_END 0x03FF0000 +#define BF_TVENC_HTIMINGACTIVE_ACTV_END(v) \ + (((v) << 16) & BM_TVENC_HTIMINGACTIVE_ACTV_END) +#define BP_TVENC_HTIMINGACTIVE_RSRVD1 10 +#define BM_TVENC_HTIMINGACTIVE_RSRVD1 0x0000FC00 +#define BF_TVENC_HTIMINGACTIVE_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_HTIMINGACTIVE_RSRVD1) +#define BP_TVENC_HTIMINGACTIVE_ACTV_STRT 0 +#define BM_TVENC_HTIMINGACTIVE_ACTV_STRT 0x000003FF +#define BF_TVENC_HTIMINGACTIVE_ACTV_STRT(v) \ + (((v) << 0) & BM_TVENC_HTIMINGACTIVE_ACTV_STRT) + +#define HW_TVENC_HTIMINGBURST0 (0x00000070) +#define HW_TVENC_HTIMINGBURST0_SET (0x00000074) +#define HW_TVENC_HTIMINGBURST0_CLR (0x00000078) +#define HW_TVENC_HTIMINGBURST0_TOG (0x0000007c) +#define HW_TVENC_HTIMINGBURST0_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST0) +#define HW_TVENC_HTIMINGBURST0_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST0_SET) +#define HW_TVENC_HTIMINGBURST0_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST0_CLR) +#define HW_TVENC_HTIMINGBURST0_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST0_TOG) + +#define BP_TVENC_HTIMINGBURST0_RSRVD2 26 +#define BM_TVENC_HTIMINGBURST0_RSRVD2 0xFC000000 +#define BF_TVENC_HTIMINGBURST0_RSRVD2(v) \ + (((v) << 26) & BM_TVENC_HTIMINGBURST0_RSRVD2) +#define BP_TVENC_HTIMINGBURST0_WBRST_STRT 16 +#define BM_TVENC_HTIMINGBURST0_WBRST_STRT 0x03FF0000 +#define BF_TVENC_HTIMINGBURST0_WBRST_STRT(v) \ + (((v) << 16) & BM_TVENC_HTIMINGBURST0_WBRST_STRT) +#define BP_TVENC_HTIMINGBURST0_RSRVD1 10 +#define BM_TVENC_HTIMINGBURST0_RSRVD1 0x0000FC00 +#define BF_TVENC_HTIMINGBURST0_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_HTIMINGBURST0_RSRVD1) +#define BP_TVENC_HTIMINGBURST0_NBRST_STRT 0 +#define BM_TVENC_HTIMINGBURST0_NBRST_STRT 0x000003FF +#define BF_TVENC_HTIMINGBURST0_NBRST_STRT(v) \ + (((v) << 0) & BM_TVENC_HTIMINGBURST0_NBRST_STRT) + +#define HW_TVENC_HTIMINGBURST1 (0x00000080) +#define HW_TVENC_HTIMINGBURST1_SET (0x00000084) +#define HW_TVENC_HTIMINGBURST1_CLR (0x00000088) +#define HW_TVENC_HTIMINGBURST1_TOG (0x0000008c) +#define HW_TVENC_HTIMINGBURST1_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST1) +#define HW_TVENC_HTIMINGBURST1_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST1_SET) +#define HW_TVENC_HTIMINGBURST1_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST1_CLR) +#define HW_TVENC_HTIMINGBURST1_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_HTIMINGBURST1_TOG) + +#define BP_TVENC_HTIMINGBURST1_RSRVD1 10 +#define BM_TVENC_HTIMINGBURST1_RSRVD1 0xFFFFFC00 +#define BF_TVENC_HTIMINGBURST1_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_HTIMINGBURST1_RSRVD1) +#define BP_TVENC_HTIMINGBURST1_BRST_END 0 +#define BM_TVENC_HTIMINGBURST1_BRST_END 0x000003FF +#define BF_TVENC_HTIMINGBURST1_BRST_END(v) \ + (((v) << 0) & BM_TVENC_HTIMINGBURST1_BRST_END) + +#define HW_TVENC_VTIMING0 (0x00000090) +#define HW_TVENC_VTIMING0_SET (0x00000094) +#define HW_TVENC_VTIMING0_CLR (0x00000098) +#define HW_TVENC_VTIMING0_TOG (0x0000009c) +#define HW_TVENC_VTIMING0_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING0) +#define HW_TVENC_VTIMING0_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING0_SET) +#define HW_TVENC_VTIMING0_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING0_CLR) +#define HW_TVENC_VTIMING0_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING0_TOG) + +#define BP_TVENC_VTIMING0_RSRVD3 26 +#define BM_TVENC_VTIMING0_RSRVD3 0xFC000000 +#define BF_TVENC_VTIMING0_RSRVD3(v) \ + (((v) << 26) & BM_TVENC_VTIMING0_RSRVD3) +#define BP_TVENC_VTIMING0_VSTRT_PREEQ 16 +#define BM_TVENC_VTIMING0_VSTRT_PREEQ 0x03FF0000 +#define BF_TVENC_VTIMING0_VSTRT_PREEQ(v) \ + (((v) << 16) & BM_TVENC_VTIMING0_VSTRT_PREEQ) +#define BP_TVENC_VTIMING0_RSRVD2 14 +#define BM_TVENC_VTIMING0_RSRVD2 0x0000C000 +#define BF_TVENC_VTIMING0_RSRVD2(v) \ + (((v) << 14) & BM_TVENC_VTIMING0_RSRVD2) +#define BP_TVENC_VTIMING0_VSTRT_ACTV 8 +#define BM_TVENC_VTIMING0_VSTRT_ACTV 0x00003F00 +#define BF_TVENC_VTIMING0_VSTRT_ACTV(v) \ + (((v) << 8) & BM_TVENC_VTIMING0_VSTRT_ACTV) +#define BP_TVENC_VTIMING0_RSRVD1 6 +#define BM_TVENC_VTIMING0_RSRVD1 0x000000C0 +#define BF_TVENC_VTIMING0_RSRVD1(v) \ + (((v) << 6) & BM_TVENC_VTIMING0_RSRVD1) +#define BP_TVENC_VTIMING0_VSTRT_SUBPH 0 +#define BM_TVENC_VTIMING0_VSTRT_SUBPH 0x0000003F +#define BF_TVENC_VTIMING0_VSTRT_SUBPH(v) \ + (((v) << 0) & BM_TVENC_VTIMING0_VSTRT_SUBPH) + +#define HW_TVENC_VTIMING1 (0x000000a0) +#define HW_TVENC_VTIMING1_SET (0x000000a4) +#define HW_TVENC_VTIMING1_CLR (0x000000a8) +#define HW_TVENC_VTIMING1_TOG (0x000000ac) +#define HW_TVENC_VTIMING1_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING1) +#define HW_TVENC_VTIMING1_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING1_SET) +#define HW_TVENC_VTIMING1_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING1_CLR) +#define HW_TVENC_VTIMING1_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VTIMING1_TOG) + +#define BP_TVENC_VTIMING1_RSRVD3 30 +#define BM_TVENC_VTIMING1_RSRVD3 0xC0000000 +#define BF_TVENC_VTIMING1_RSRVD3(v) \ + (((v) << 30) & BM_TVENC_VTIMING1_RSRVD3) +#define BP_TVENC_VTIMING1_VSTRT_POSTEQ 24 +#define BM_TVENC_VTIMING1_VSTRT_POSTEQ 0x3F000000 +#define BF_TVENC_VTIMING1_VSTRT_POSTEQ(v) \ + (((v) << 24) & BM_TVENC_VTIMING1_VSTRT_POSTEQ) +#define BP_TVENC_VTIMING1_RSRVD2 22 +#define BM_TVENC_VTIMING1_RSRVD2 0x00C00000 +#define BF_TVENC_VTIMING1_RSRVD2(v) \ + (((v) << 22) & BM_TVENC_VTIMING1_RSRVD2) +#define BP_TVENC_VTIMING1_VSTRT_SERRA 16 +#define BM_TVENC_VTIMING1_VSTRT_SERRA 0x003F0000 +#define BF_TVENC_VTIMING1_VSTRT_SERRA(v) \ + (((v) << 16) & BM_TVENC_VTIMING1_VSTRT_SERRA) +#define BP_TVENC_VTIMING1_RSRVD1 10 +#define BM_TVENC_VTIMING1_RSRVD1 0x0000FC00 +#define BF_TVENC_VTIMING1_RSRVD1(v) \ + (((v) << 10) & BM_TVENC_VTIMING1_RSRVD1) +#define BP_TVENC_VTIMING1_LAST_FLD_LN 0 +#define BM_TVENC_VTIMING1_LAST_FLD_LN 0x000003FF +#define BF_TVENC_VTIMING1_LAST_FLD_LN(v) \ + (((v) << 0) & BM_TVENC_VTIMING1_LAST_FLD_LN) + +#define HW_TVENC_MISC (0x000000b0) +#define HW_TVENC_MISC_SET (0x000000b4) +#define HW_TVENC_MISC_CLR (0x000000b8) +#define HW_TVENC_MISC_TOG (0x000000bc) +#define HW_TVENC_MISC_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MISC) +#define HW_TVENC_MISC_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MISC_SET) +#define HW_TVENC_MISC_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MISC_CLR) +#define HW_TVENC_MISC_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MISC_TOG) + +#define BP_TVENC_MISC_RSRVD3 25 +#define BM_TVENC_MISC_RSRVD3 0xFE000000 +#define BF_TVENC_MISC_RSRVD3(v) \ + (((v) << 25) & BM_TVENC_MISC_RSRVD3) +#define BP_TVENC_MISC_LPF_RST_OFF 16 +#define BM_TVENC_MISC_LPF_RST_OFF 0x01FF0000 +#define BF_TVENC_MISC_LPF_RST_OFF(v) \ + (((v) << 16) & BM_TVENC_MISC_LPF_RST_OFF) +#define BP_TVENC_MISC_RSRVD2 12 +#define BM_TVENC_MISC_RSRVD2 0x0000F000 +#define BF_TVENC_MISC_RSRVD2(v) \ + (((v) << 12) & BM_TVENC_MISC_RSRVD2) +#define BM_TVENC_MISC_NTSC_LN_CNT 0x00000800 +#define BM_TVENC_MISC_PAL_FSC_PHASE_ALT 0x00000400 +#define BP_TVENC_MISC_FSC_PHASE_RST 8 +#define BM_TVENC_MISC_FSC_PHASE_RST 0x00000300 +#define BF_TVENC_MISC_FSC_PHASE_RST(v) \ + (((v) << 8) & BM_TVENC_MISC_FSC_PHASE_RST) +#define BP_TVENC_MISC_BRUCHB 6 +#define BM_TVENC_MISC_BRUCHB 0x000000C0 +#define BF_TVENC_MISC_BRUCHB(v) \ + (((v) << 6) & BM_TVENC_MISC_BRUCHB) +#define BP_TVENC_MISC_AGC_LVL_CTRL 4 +#define BM_TVENC_MISC_AGC_LVL_CTRL 0x00000030 +#define BF_TVENC_MISC_AGC_LVL_CTRL(v) \ + (((v) << 4) & BM_TVENC_MISC_AGC_LVL_CTRL) +#define BM_TVENC_MISC_RSRVD1 0x00000008 +#define BM_TVENC_MISC_CS_INVERT_CTRL 0x00000004 +#define BP_TVENC_MISC_Y_BLANK_CTRL 0 +#define BM_TVENC_MISC_Y_BLANK_CTRL 0x00000003 +#define BF_TVENC_MISC_Y_BLANK_CTRL(v) \ + (((v) << 0) & BM_TVENC_MISC_Y_BLANK_CTRL) + +#define HW_TVENC_COLORSUB0 (0x000000c0) +#define HW_TVENC_COLORSUB0_SET (0x000000c4) +#define HW_TVENC_COLORSUB0_CLR (0x000000c8) +#define HW_TVENC_COLORSUB0_TOG (0x000000cc) +#define HW_TVENC_COLORSUB0_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB0) +#define HW_TVENC_COLORSUB0_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB0_SET) +#define HW_TVENC_COLORSUB0_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB0_CLR) +#define HW_TVENC_COLORSUB0_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB0_TOG) + +#define BP_TVENC_COLORSUB0_PHASE_INC 0 +#define BM_TVENC_COLORSUB0_PHASE_INC 0xFFFFFFFF +#define BF_TVENC_COLORSUB0_PHASE_INC(v) (v) + +#define HW_TVENC_COLORSUB1 (0x000000d0) +#define HW_TVENC_COLORSUB1_SET (0x000000d4) +#define HW_TVENC_COLORSUB1_CLR (0x000000d8) +#define HW_TVENC_COLORSUB1_TOG (0x000000dc) +#define HW_TVENC_COLORSUB1_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB1) +#define HW_TVENC_COLORSUB1_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB1_SET) +#define HW_TVENC_COLORSUB1_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB1_CLR) +#define HW_TVENC_COLORSUB1_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORSUB1_TOG) + +#define BP_TVENC_COLORSUB1_PHASE_OFFSET 0 +#define BM_TVENC_COLORSUB1_PHASE_OFFSET 0xFFFFFFFF +#define BF_TVENC_COLORSUB1_PHASE_OFFSET(v) (v) + +#define HW_TVENC_COPYPROTECT (0x000000e0) +#define HW_TVENC_COPYPROTECT_SET (0x000000e4) +#define HW_TVENC_COPYPROTECT_CLR (0x000000e8) +#define HW_TVENC_COPYPROTECT_TOG (0x000000ec) +#define HW_TVENC_COPYPROTECT_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COPYPROTECT) +#define HW_TVENC_COPYPROTECT_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COPYPROTECT_SET) +#define HW_TVENC_COPYPROTECT_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COPYPROTECT_CLR) +#define HW_TVENC_COPYPROTECT_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COPYPROTECT_TOG) + +#define BP_TVENC_COPYPROTECT_RSRVD1 16 +#define BM_TVENC_COPYPROTECT_RSRVD1 0xFFFF0000 +#define BF_TVENC_COPYPROTECT_RSRVD1(v) \ + (((v) << 16) & BM_TVENC_COPYPROTECT_RSRVD1) +#define BM_TVENC_COPYPROTECT_WSS_ENBL 0x00008000 +#define BM_TVENC_COPYPROTECT_CGMS_ENBL 0x00004000 +#define BP_TVENC_COPYPROTECT_WSS_CGMS_DATA 0 +#define BM_TVENC_COPYPROTECT_WSS_CGMS_DATA 0x00003FFF +#define BF_TVENC_COPYPROTECT_WSS_CGMS_DATA(v) \ + (((v) << 0) & BM_TVENC_COPYPROTECT_WSS_CGMS_DATA) + +#define HW_TVENC_CLOSEDCAPTION (0x000000f0) +#define HW_TVENC_CLOSEDCAPTION_SET (0x000000f4) +#define HW_TVENC_CLOSEDCAPTION_CLR (0x000000f8) +#define HW_TVENC_CLOSEDCAPTION_TOG (0x000000fc) +#define HW_TVENC_CLOSEDCAPTION_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CLOSEDCAPTION) +#define HW_TVENC_CLOSEDCAPTION_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CLOSEDCAPTION_SET) +#define HW_TVENC_CLOSEDCAPTION_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CLOSEDCAPTION_CLR) +#define HW_TVENC_CLOSEDCAPTION_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_CLOSEDCAPTION_TOG) + +#define BP_TVENC_CLOSEDCAPTION_RSRVD1 20 +#define BM_TVENC_CLOSEDCAPTION_RSRVD1 0xFFF00000 +#define BF_TVENC_CLOSEDCAPTION_RSRVD1(v) \ + (((v) << 20) & BM_TVENC_CLOSEDCAPTION_RSRVD1) +#define BP_TVENC_CLOSEDCAPTION_CC_ENBL 18 +#define BM_TVENC_CLOSEDCAPTION_CC_ENBL 0x000C0000 +#define BF_TVENC_CLOSEDCAPTION_CC_ENBL(v) \ + (((v) << 18) & BM_TVENC_CLOSEDCAPTION_CC_ENBL) +#define BP_TVENC_CLOSEDCAPTION_CC_FILL 16 +#define BM_TVENC_CLOSEDCAPTION_CC_FILL 0x00030000 +#define BF_TVENC_CLOSEDCAPTION_CC_FILL(v) \ + (((v) << 16) & BM_TVENC_CLOSEDCAPTION_CC_FILL) +#define BP_TVENC_CLOSEDCAPTION_CC_DATA 0 +#define BM_TVENC_CLOSEDCAPTION_CC_DATA 0x0000FFFF +#define BF_TVENC_CLOSEDCAPTION_CC_DATA(v) \ + (((v) << 0) & BM_TVENC_CLOSEDCAPTION_CC_DATA) + +#define HW_TVENC_COLORBURST (0x00000140) +#define HW_TVENC_COLORBURST_SET (0x00000144) +#define HW_TVENC_COLORBURST_CLR (0x00000148) +#define HW_TVENC_COLORBURST_TOG (0x0000014c) +#define HW_TVENC_COLORBURST_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORBURST) +#define HW_TVENC_COLORBURST_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORBURST_SET) +#define HW_TVENC_COLORBURST_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORBURST_CLR) +#define HW_TVENC_COLORBURST_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_COLORBURST_TOG) -#define HW_TVENC_COLORBURST 0x140 -#define BM_TVENC_COLORBURST_PBA 0x00FF0000 -#define BP_TVENC_COLORBURST_PBA 16 -#define BM_TVENC_COLORBURST_NBA 0xFF000000 #define BP_TVENC_COLORBURST_NBA 24 - -#define HW_TVENC_MACROVISION0 0x150 - -#define HW_TVENC_MACROVISION1 0x160 - -#define HW_TVENC_MACROVISION2 0x170 - -#define HW_TVENC_MACROVISION3 0x180 - -#define HW_TVENC_MACROVISION4 0x190 - -#define HW_TVENC_DACCTRL 0x1A0 -#define BM_TVENC_DACCTRL_RVAL 0x00000070 -#define BP_TVENC_DACCTRL_RVAL 4 -#define BM_TVENC_DACCTRL_DUMP_TOVDD1 0x00000100 -#define BM_TVENC_DACCTRL_PWRUP1 0x00001000 -#define BM_TVENC_DACCTRL_GAINUP 0x00040000 +#define BM_TVENC_COLORBURST_NBA 0xFF000000 +#define BF_TVENC_COLORBURST_NBA(v) \ + (((v) << 24) & BM_TVENC_COLORBURST_NBA) +#define BP_TVENC_COLORBURST_PBA 16 +#define BM_TVENC_COLORBURST_PBA 0x00FF0000 +#define BF_TVENC_COLORBURST_PBA(v) \ + (((v) << 16) & BM_TVENC_COLORBURST_PBA) +#define BP_TVENC_COLORBURST_RSRVD1 12 +#define BM_TVENC_COLORBURST_RSRVD1 0x0000F000 +#define BF_TVENC_COLORBURST_RSRVD1(v) \ + (((v) << 12) & BM_TVENC_COLORBURST_RSRVD1) +#define BP_TVENC_COLORBURST_RSRVD2 0 +#define BM_TVENC_COLORBURST_RSRVD2 0x00000FFF +#define BF_TVENC_COLORBURST_RSRVD2(v) \ + (((v) << 0) & BM_TVENC_COLORBURST_RSRVD2) + +#define HW_TVENC_MACROVISION0 (0x00000150) +#define HW_TVENC_MACROVISION0_SET (0x00000154) +#define HW_TVENC_MACROVISION0_CLR (0x00000158) +#define HW_TVENC_MACROVISION0_TOG (0x0000015c) +#define HW_TVENC_MACROVISION0_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION0) +#define HW_TVENC_MACROVISION0_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION0_SET) +#define HW_TVENC_MACROVISION0_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION0_CLR) +#define HW_TVENC_MACROVISION0_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION0_TOG) + +#define BP_TVENC_MACROVISION0_DATA 0 +#define BM_TVENC_MACROVISION0_DATA 0xFFFFFFFF +#define BF_TVENC_MACROVISION0_DATA(v) (v) + +#define HW_TVENC_MACROVISION1 (0x00000160) +#define HW_TVENC_MACROVISION1_SET (0x00000164) +#define HW_TVENC_MACROVISION1_CLR (0x00000168) +#define HW_TVENC_MACROVISION1_TOG (0x0000016c) +#define HW_TVENC_MACROVISION1_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION1) +#define HW_TVENC_MACROVISION1_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION1_SET) +#define HW_TVENC_MACROVISION1_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION1_CLR) +#define HW_TVENC_MACROVISION1_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION1_TOG) + +#define BP_TVENC_MACROVISION1_DATA 0 +#define BM_TVENC_MACROVISION1_DATA 0xFFFFFFFF +#define BF_TVENC_MACROVISION1_DATA(v) (v) + +#define HW_TVENC_MACROVISION2 (0x00000170) +#define HW_TVENC_MACROVISION2_SET (0x00000174) +#define HW_TVENC_MACROVISION2_CLR (0x00000178) +#define HW_TVENC_MACROVISION2_TOG (0x0000017c) +#define HW_TVENC_MACROVISION2_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION2) +#define HW_TVENC_MACROVISION2_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION2_SET) +#define HW_TVENC_MACROVISION2_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION2_CLR) +#define HW_TVENC_MACROVISION2_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION2_TOG) + +#define BP_TVENC_MACROVISION2_DATA 0 +#define BM_TVENC_MACROVISION2_DATA 0xFFFFFFFF +#define BF_TVENC_MACROVISION2_DATA(v) (v) + +#define HW_TVENC_MACROVISION3 (0x00000180) +#define HW_TVENC_MACROVISION3_SET (0x00000184) +#define HW_TVENC_MACROVISION3_CLR (0x00000188) +#define HW_TVENC_MACROVISION3_TOG (0x0000018c) +#define HW_TVENC_MACROVISION3_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION3) +#define HW_TVENC_MACROVISION3_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION3_SET) +#define HW_TVENC_MACROVISION3_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION3_CLR) +#define HW_TVENC_MACROVISION3_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION3_TOG) + +#define BP_TVENC_MACROVISION3_DATA 0 +#define BM_TVENC_MACROVISION3_DATA 0xFFFFFFFF +#define BF_TVENC_MACROVISION3_DATA(v) (v) + +#define HW_TVENC_MACROVISION4 (0x00000190) +#define HW_TVENC_MACROVISION4_SET (0x00000194) +#define HW_TVENC_MACROVISION4_CLR (0x00000198) +#define HW_TVENC_MACROVISION4_TOG (0x0000019c) +#define HW_TVENC_MACROVISION4_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION4) +#define HW_TVENC_MACROVISION4_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION4_SET) +#define HW_TVENC_MACROVISION4_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION4_CLR) +#define HW_TVENC_MACROVISION4_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_MACROVISION4_TOG) + +#define BP_TVENC_MACROVISION4_RSRVD2 24 +#define BM_TVENC_MACROVISION4_RSRVD2 0xFF000000 +#define BF_TVENC_MACROVISION4_RSRVD2(v) \ + (((v) << 24) & BM_TVENC_MACROVISION4_RSRVD2) +#define BP_TVENC_MACROVISION4_MACV_TST 16 +#define BM_TVENC_MACROVISION4_MACV_TST 0x00FF0000 +#define BF_TVENC_MACROVISION4_MACV_TST(v) \ + (((v) << 16) & BM_TVENC_MACROVISION4_MACV_TST) +#define BP_TVENC_MACROVISION4_RSRVD1 11 +#define BM_TVENC_MACROVISION4_RSRVD1 0x0000F800 +#define BF_TVENC_MACROVISION4_RSRVD1(v) \ + (((v) << 11) & BM_TVENC_MACROVISION4_RSRVD1) +#define BP_TVENC_MACROVISION4_DATA 0 +#define BM_TVENC_MACROVISION4_DATA 0x000007FF +#define BF_TVENC_MACROVISION4_DATA(v) \ + (((v) << 0) & BM_TVENC_MACROVISION4_DATA) + +#define HW_TVENC_DACCTRL (0x000001a0) +#define HW_TVENC_DACCTRL_SET (0x000001a4) +#define HW_TVENC_DACCTRL_CLR (0x000001a8) +#define HW_TVENC_DACCTRL_TOG (0x000001ac) +#define HW_TVENC_DACCTRL_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACCTRL) +#define HW_TVENC_DACCTRL_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACCTRL_SET) +#define HW_TVENC_DACCTRL_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACCTRL_CLR) +#define HW_TVENC_DACCTRL_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACCTRL_TOG) + +#define BM_TVENC_DACCTRL_TEST3 0x80000000 +#define BM_TVENC_DACCTRL_RSRVD1 0x40000000 +#define BM_TVENC_DACCTRL_RSRVD2 0x20000000 +#define BM_TVENC_DACCTRL_JACK1_DIS_DET_EN 0x10000000 +#define BM_TVENC_DACCTRL_TEST2 0x08000000 +#define BM_TVENC_DACCTRL_RSRVD3 0x04000000 +#define BM_TVENC_DACCTRL_RSRVD4 0x02000000 +#define BM_TVENC_DACCTRL_JACK1_DET_EN 0x01000000 +#define BM_TVENC_DACCTRL_TEST1 0x00800000 +#define BM_TVENC_DACCTRL_DISABLE_GND_DETECT 0x00400000 +#define BP_TVENC_DACCTRL_JACK_DIS_ADJ 20 +#define BM_TVENC_DACCTRL_JACK_DIS_ADJ 0x00300000 +#define BF_TVENC_DACCTRL_JACK_DIS_ADJ(v) \ + (((v) << 20) & BM_TVENC_DACCTRL_JACK_DIS_ADJ) #define BM_TVENC_DACCTRL_GAINDN 0x00080000 +#define BM_TVENC_DACCTRL_GAINUP 0x00040000 +#define BM_TVENC_DACCTRL_INVERT_CLK 0x00020000 +#define BM_TVENC_DACCTRL_SELECT_CLK 0x00010000 +#define BM_TVENC_DACCTRL_BYPASS_ACT_CASCODE 0x00008000 +#define BM_TVENC_DACCTRL_RSRVD5 0x00004000 +#define BM_TVENC_DACCTRL_RSRVD6 0x00002000 +#define BM_TVENC_DACCTRL_PWRUP1 0x00001000 +#define BM_TVENC_DACCTRL_WELL_TOVDD 0x00000800 +#define BM_TVENC_DACCTRL_RSRVD7 0x00000400 +#define BM_TVENC_DACCTRL_RSRVD8 0x00000200 +#define BM_TVENC_DACCTRL_DUMP_TOVDD1 0x00000100 +#define BM_TVENC_DACCTRL_LOWER_SIGNAL 0x00000080 +#define BP_TVENC_DACCTRL_RVAL 4 +#define BM_TVENC_DACCTRL_RVAL 0x00000070 +#define BF_TVENC_DACCTRL_RVAL(v) \ + (((v) << 4) & BM_TVENC_DACCTRL_RVAL) +#define BM_TVENC_DACCTRL_NO_INTERNAL_TERM 0x00000008 +#define BM_TVENC_DACCTRL_HALF_CURRENT 0x00000004 +#define BP_TVENC_DACCTRL_CASC_ADJ 0 +#define BM_TVENC_DACCTRL_CASC_ADJ 0x00000003 +#define BF_TVENC_DACCTRL_CASC_ADJ(v) \ + (((v) << 0) & BM_TVENC_DACCTRL_CASC_ADJ) + +#define HW_TVENC_DACSTATUS (0x000001b0) +#define HW_TVENC_DACSTATUS_SET (0x000001b4) +#define HW_TVENC_DACSTATUS_CLR (0x000001b8) +#define HW_TVENC_DACSTATUS_TOG (0x000001bc) +#define HW_TVENC_DACSTATUS_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACSTATUS) +#define HW_TVENC_DACSTATUS_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACSTATUS_SET) +#define HW_TVENC_DACSTATUS_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACSTATUS_CLR) +#define HW_TVENC_DACSTATUS_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_DACSTATUS_TOG) + +#define BP_TVENC_DACSTATUS_RSRVD1 13 +#define BM_TVENC_DACSTATUS_RSRVD1 0xFFFFE000 +#define BF_TVENC_DACSTATUS_RSRVD1(v) \ + (((v) << 13) & BM_TVENC_DACSTATUS_RSRVD1) +#define BM_TVENC_DACSTATUS_RSRVD2 0x00001000 +#define BM_TVENC_DACSTATUS_RSRVD3 0x00000800 +#define BM_TVENC_DACSTATUS_JACK1_DET_STATUS 0x00000400 +#define BM_TVENC_DACSTATUS_RSRVD4 0x00000200 +#define BM_TVENC_DACSTATUS_RSRVD5 0x00000100 +#define BM_TVENC_DACSTATUS_JACK1_GROUNDED 0x00000080 +#define BM_TVENC_DACSTATUS_RSRVD6 0x00000040 +#define BM_TVENC_DACSTATUS_RSRVD7 0x00000020 +#define BM_TVENC_DACSTATUS_JACK1_DIS_DET_IRQ 0x00000010 +#define BM_TVENC_DACSTATUS_RSRVD8 0x00000008 +#define BM_TVENC_DACSTATUS_RSRVD9 0x00000004 +#define BM_TVENC_DACSTATUS_JACK1_DET_IRQ 0x00000002 +#define BM_TVENC_DACSTATUS_ENIRQ_JACK 0x00000001 + +#define HW_TVENC_VDACTEST (0x000001c0) +#define HW_TVENC_VDACTEST_SET (0x000001c4) +#define HW_TVENC_VDACTEST_CLR (0x000001c8) +#define HW_TVENC_VDACTEST_TOG (0x000001cc) +#define HW_TVENC_VDACTEST_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VDACTEST) +#define HW_TVENC_VDACTEST_SET_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VDACTEST_SET) +#define HW_TVENC_VDACTEST_CLR_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VDACTEST_CLR) +#define HW_TVENC_VDACTEST_TOG_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VDACTEST_TOG) + +#define BP_TVENC_VDACTEST_RSRVD1 14 +#define BM_TVENC_VDACTEST_RSRVD1 0xFFFFC000 +#define BF_TVENC_VDACTEST_RSRVD1(v) \ + (((v) << 14) & BM_TVENC_VDACTEST_RSRVD1) +#define BM_TVENC_VDACTEST_ENABLE_PIX_INT_GAIN 0x00002000 +#define BM_TVENC_VDACTEST_BYPASS_PIX_INT 0x00001000 +#define BM_TVENC_VDACTEST_BYPASS_PIX_INT_DROOP 0x00000800 +#define BM_TVENC_VDACTEST_TEST_FIFO_FULL 0x00000400 +#define BP_TVENC_VDACTEST_DATA 0 +#define BM_TVENC_VDACTEST_DATA 0x000003FF +#define BF_TVENC_VDACTEST_DATA(v) \ + (((v) << 0) & BM_TVENC_VDACTEST_DATA) + +#define HW_TVENC_VERSION (0x000001d0) +#define HW_TVENC_VERSION_ADDR \ + (REGS_TVENC_BASE + HW_TVENC_VERSION) + +#define BP_TVENC_VERSION_MAJOR 24 +#define BM_TVENC_VERSION_MAJOR 0xFF000000 +#define BF_TVENC_VERSION_MAJOR(v) \ + (((v) << 24) & BM_TVENC_VERSION_MAJOR) +#define BP_TVENC_VERSION_MINOR 16 +#define BM_TVENC_VERSION_MINOR 0x00FF0000 +#define BF_TVENC_VERSION_MINOR(v) \ + (((v) << 16) & BM_TVENC_VERSION_MINOR) +#define BP_TVENC_VERSION_STEP 0 +#define BM_TVENC_VERSION_STEP 0x0000FFFF +#define BF_TVENC_VERSION_STEP(v) \ + (((v) << 0) & BM_TVENC_VERSION_STEP) +#endif /* __ARCH_ARM___TVENC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-i2c.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-i2c.h @@ -1,7 +1,7 @@ /* - * stmp378x: I2C register definitions + * STMP I2C Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,39 +17,429 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_I2C_BASE (STMP3XXX_REGS_BASE + 0x58000) -#define REGS_I2C_PHYS 0x80058000 -#define REGS_I2C_SIZE 0x2000 -#define HW_I2C_CTRL0 0x0 -#define BM_I2C_CTRL0_XFER_COUNT 0x0000FFFF -#define BP_I2C_CTRL0_XFER_COUNT 0 -#define BM_I2C_CTRL0_DIRECTION 0x00010000 -#define BM_I2C_CTRL0_MASTER_MODE 0x00020000 -#define BM_I2C_CTRL0_PRE_SEND_START 0x00080000 -#define BM_I2C_CTRL0_POST_SEND_STOP 0x00100000 -#define BM_I2C_CTRL0_RETAIN_CLOCK 0x00200000 -#define BM_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000 -#define BM_I2C_CTRL0_CLKGATE 0x40000000 +#ifndef __ARCH_ARM___I2C_H +#define __ARCH_ARM___I2C_H 1 + +#define REGS_I2C_BASE (STMP3XXX_REGS_BASE + 0x58000) +#define REGS_I2C_PHYS (0x80058000) +#define REGS_I2C_SIZE 0x00002000 + +#define HW_I2C_CTRL0 (0x00000000) +#define HW_I2C_CTRL0_SET (0x00000004) +#define HW_I2C_CTRL0_CLR (0x00000008) +#define HW_I2C_CTRL0_TOG (0x0000000c) +#define HW_I2C_CTRL0_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL0) +#define HW_I2C_CTRL0_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL0_SET) +#define HW_I2C_CTRL0_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL0_CLR) +#define HW_I2C_CTRL0_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL0_TOG) + #define BM_I2C_CTRL0_SFTRST 0x80000000 +#define BV_I2C_CTRL0_SFTRST__RUN 0x0 +#define BV_I2C_CTRL0_SFTRST__RESET 0x1 +#define BM_I2C_CTRL0_CLKGATE 0x40000000 +#define BV_I2C_CTRL0_CLKGATE__RUN 0x0 +#define BV_I2C_CTRL0_CLKGATE__NO_CLKS 0x1 +#define BM_I2C_CTRL0_RUN 0x20000000 +#define BV_I2C_CTRL0_RUN__HALT 0x0 +#define BV_I2C_CTRL0_RUN__RUN 0x1 +#define BM_I2C_CTRL0_RSVD1 0x10000000 +#define BM_I2C_CTRL0_PRE_ACK 0x08000000 +#define BM_I2C_CTRL0_ACKNOWLEDGE 0x04000000 +#define BV_I2C_CTRL0_ACKNOWLEDGE__SNAK 0x0 +#define BV_I2C_CTRL0_ACKNOWLEDGE__ACK 0x1 +#define BM_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000 +#define BV_I2C_CTRL0_SEND_NAK_ON_LAST__ACK_IT 0x0 +#define BV_I2C_CTRL0_SEND_NAK_ON_LAST__NAK_IT 0x1 +#define BM_I2C_CTRL0_PIO_MODE 0x01000000 +#define BM_I2C_CTRL0_MULTI_MASTER 0x00800000 +#define BV_I2C_CTRL0_MULTI_MASTER__SINGLE 0x0 +#define BV_I2C_CTRL0_MULTI_MASTER__MULTIPLE 0x1 +#define BM_I2C_CTRL0_CLOCK_HELD 0x00400000 +#define BV_I2C_CTRL0_CLOCK_HELD__RELEASE 0x0 +#define BV_I2C_CTRL0_CLOCK_HELD__HELD_LOW 0x1 +#define BM_I2C_CTRL0_RETAIN_CLOCK 0x00200000 +#define BV_I2C_CTRL0_RETAIN_CLOCK__RELEASE 0x0 +#define BV_I2C_CTRL0_RETAIN_CLOCK__HOLD_LOW 0x1 +#define BM_I2C_CTRL0_POST_SEND_STOP 0x00100000 +#define BV_I2C_CTRL0_POST_SEND_STOP__NO_STOP 0x0 +#define BV_I2C_CTRL0_POST_SEND_STOP__SEND_STOP 0x1 +#define BM_I2C_CTRL0_PRE_SEND_START 0x00080000 +#define BV_I2C_CTRL0_PRE_SEND_START__NO_START 0x0 +#define BV_I2C_CTRL0_PRE_SEND_START__SEND_START 0x1 +#define BM_I2C_CTRL0_SLAVE_ADDRESS_ENABLE 0x00040000 +#define BV_I2C_CTRL0_SLAVE_ADDRESS_ENABLE__DISABLED 0x0 +#define BV_I2C_CTRL0_SLAVE_ADDRESS_ENABLE__ENABLED 0x1 +#define BM_I2C_CTRL0_MASTER_MODE 0x00020000 +#define BV_I2C_CTRL0_MASTER_MODE__SLAVE 0x0 +#define BV_I2C_CTRL0_MASTER_MODE__MASTER 0x1 +#define BM_I2C_CTRL0_DIRECTION 0x00010000 +#define BV_I2C_CTRL0_DIRECTION__RECEIVE 0x0 +#define BV_I2C_CTRL0_DIRECTION__TRANSMIT 0x1 +#define BP_I2C_CTRL0_XFER_COUNT 0 +#define BM_I2C_CTRL0_XFER_COUNT 0x0000FFFF +#define BF_I2C_CTRL0_XFER_COUNT(v) \ + (((v) << 0) & BM_I2C_CTRL0_XFER_COUNT) -#define HW_I2C_TIMING0 0x10 +#define HW_I2C_TIMING0 (0x00000010) +#define HW_I2C_TIMING0_SET (0x00000014) +#define HW_I2C_TIMING0_CLR (0x00000018) +#define HW_I2C_TIMING0_TOG (0x0000001c) +#define HW_I2C_TIMING0_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING0) +#define HW_I2C_TIMING0_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING0_SET) +#define HW_I2C_TIMING0_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING0_CLR) +#define HW_I2C_TIMING0_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING0_TOG) -#define HW_I2C_TIMING1 0x20 +#define BP_I2C_TIMING0_RSVD2 26 +#define BM_I2C_TIMING0_RSVD2 0xFC000000 +#define BF_I2C_TIMING0_RSVD2(v) \ + (((v) << 26) & BM_I2C_TIMING0_RSVD2) +#define BP_I2C_TIMING0_HIGH_COUNT 16 +#define BM_I2C_TIMING0_HIGH_COUNT 0x03FF0000 +#define BF_I2C_TIMING0_HIGH_COUNT(v) \ + (((v) << 16) & BM_I2C_TIMING0_HIGH_COUNT) +#define BP_I2C_TIMING0_RSVD1 10 +#define BM_I2C_TIMING0_RSVD1 0x0000FC00 +#define BF_I2C_TIMING0_RSVD1(v) \ + (((v) << 10) & BM_I2C_TIMING0_RSVD1) +#define BP_I2C_TIMING0_RCV_COUNT 0 +#define BM_I2C_TIMING0_RCV_COUNT 0x000003FF +#define BF_I2C_TIMING0_RCV_COUNT(v) \ + (((v) << 0) & BM_I2C_TIMING0_RCV_COUNT) -#define HW_I2C_TIMING2 0x30 +#define HW_I2C_TIMING1 (0x00000020) +#define HW_I2C_TIMING1_SET (0x00000024) +#define HW_I2C_TIMING1_CLR (0x00000028) +#define HW_I2C_TIMING1_TOG (0x0000002c) +#define HW_I2C_TIMING1_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING1) +#define HW_I2C_TIMING1_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING1_SET) +#define HW_I2C_TIMING1_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING1_CLR) +#define HW_I2C_TIMING1_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING1_TOG) -#define HW_I2C_CTRL1 0x40 -#define BM_I2C_CTRL1_SLAVE_IRQ 0x00000001 -#define BP_I2C_CTRL1_SLAVE_IRQ 0 -#define BM_I2C_CTRL1_SLAVE_STOP_IRQ 0x00000002 -#define BM_I2C_CTRL1_MASTER_LOSS_IRQ 0x00000004 -#define BM_I2C_CTRL1_EARLY_TERM_IRQ 0x00000008 -#define BM_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ 0x00000010 -#define BM_I2C_CTRL1_NO_SLAVE_ACK_IRQ 0x00000020 -#define BM_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ 0x00000040 -#define BM_I2C_CTRL1_BUS_FREE_IRQ 0x00000080 +#define BP_I2C_TIMING1_RSVD2 26 +#define BM_I2C_TIMING1_RSVD2 0xFC000000 +#define BF_I2C_TIMING1_RSVD2(v) \ + (((v) << 26) & BM_I2C_TIMING1_RSVD2) +#define BP_I2C_TIMING1_LOW_COUNT 16 +#define BM_I2C_TIMING1_LOW_COUNT 0x03FF0000 +#define BF_I2C_TIMING1_LOW_COUNT(v) \ + (((v) << 16) & BM_I2C_TIMING1_LOW_COUNT) +#define BP_I2C_TIMING1_RSVD1 10 +#define BM_I2C_TIMING1_RSVD1 0x0000FC00 +#define BF_I2C_TIMING1_RSVD1(v) \ + (((v) << 10) & BM_I2C_TIMING1_RSVD1) +#define BP_I2C_TIMING1_XMIT_COUNT 0 +#define BM_I2C_TIMING1_XMIT_COUNT 0x000003FF +#define BF_I2C_TIMING1_XMIT_COUNT(v) \ + (((v) << 0) & BM_I2C_TIMING1_XMIT_COUNT) + +#define HW_I2C_TIMING2 (0x00000030) +#define HW_I2C_TIMING2_SET (0x00000034) +#define HW_I2C_TIMING2_CLR (0x00000038) +#define HW_I2C_TIMING2_TOG (0x0000003c) +#define HW_I2C_TIMING2_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING2) +#define HW_I2C_TIMING2_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING2_SET) +#define HW_I2C_TIMING2_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING2_CLR) +#define HW_I2C_TIMING2_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_TIMING2_TOG) + +#define BP_I2C_TIMING2_RSVD2 26 +#define BM_I2C_TIMING2_RSVD2 0xFC000000 +#define BF_I2C_TIMING2_RSVD2(v) \ + (((v) << 26) & BM_I2C_TIMING2_RSVD2) +#define BP_I2C_TIMING2_BUS_FREE 16 +#define BM_I2C_TIMING2_BUS_FREE 0x03FF0000 +#define BF_I2C_TIMING2_BUS_FREE(v) \ + (((v) << 16) & BM_I2C_TIMING2_BUS_FREE) +#define BP_I2C_TIMING2_RSVD1 10 +#define BM_I2C_TIMING2_RSVD1 0x0000FC00 +#define BF_I2C_TIMING2_RSVD1(v) \ + (((v) << 10) & BM_I2C_TIMING2_RSVD1) +#define BP_I2C_TIMING2_LEADIN_COUNT 0 +#define BM_I2C_TIMING2_LEADIN_COUNT 0x000003FF +#define BF_I2C_TIMING2_LEADIN_COUNT(v) \ + (((v) << 0) & BM_I2C_TIMING2_LEADIN_COUNT) + +#define HW_I2C_CTRL1 (0x00000040) +#define HW_I2C_CTRL1_SET (0x00000044) +#define HW_I2C_CTRL1_CLR (0x00000048) +#define HW_I2C_CTRL1_TOG (0x0000004c) +#define HW_I2C_CTRL1_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL1) +#define HW_I2C_CTRL1_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL1_SET) +#define HW_I2C_CTRL1_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL1_CLR) +#define HW_I2C_CTRL1_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_CTRL1_TOG) + +#define BP_I2C_CTRL1_RSVD1 29 +#define BM_I2C_CTRL1_RSVD1 0xE0000000 +#define BF_I2C_CTRL1_RSVD1(v) \ + (((v) << 29) & BM_I2C_CTRL1_RSVD1) #define BM_I2C_CTRL1_CLR_GOT_A_NAK 0x10000000 +#define BV_I2C_CTRL1_CLR_GOT_A_NAK__DO_NOTHING 0x0 +#define BV_I2C_CTRL1_CLR_GOT_A_NAK__CLEAR 0x1 +#define BM_I2C_CTRL1_ACK_MODE 0x08000000 +#define BV_I2C_CTRL1_ACK_MODE__ACK_AFTER_HOLD_LOW 0x0 +#define BV_I2C_CTRL1_ACK_MODE__ACK_BEFORE_HOLD_LOW 0x1 +#define BM_I2C_CTRL1_FORCE_DATA_IDLE 0x04000000 +#define BM_I2C_CTRL1_FORCE_CLK_IDLE 0x02000000 +#define BM_I2C_CTRL1_BCAST_SLAVE_EN 0x01000000 +#define BV_I2C_CTRL1_BCAST_SLAVE_EN__NO_BCAST 0x0 +#define BV_I2C_CTRL1_BCAST_SLAVE_EN__WATCH_BCAST 0x1 +#define BP_I2C_CTRL1_SLAVE_ADDRESS_BYTE 16 +#define BM_I2C_CTRL1_SLAVE_ADDRESS_BYTE 0x00FF0000 +#define BF_I2C_CTRL1_SLAVE_ADDRESS_BYTE(v) \ + (((v) << 16) & BM_I2C_CTRL1_SLAVE_ADDRESS_BYTE) +#define BM_I2C_CTRL1_BUS_FREE_IRQ_EN 0x00008000 +#define BV_I2C_CTRL1_BUS_FREE_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_BUS_FREE_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN 0x00004000 +#define BV_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_NO_SLAVE_ACK_IRQ_EN 0x00002000 +#define BV_I2C_CTRL1_NO_SLAVE_ACK_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_NO_SLAVE_ACK_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN 0x00001000 +#define BV_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_EARLY_TERM_IRQ_EN 0x00000800 +#define BV_I2C_CTRL1_EARLY_TERM_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_EARLY_TERM_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_MASTER_LOSS_IRQ_EN 0x00000400 +#define BV_I2C_CTRL1_MASTER_LOSS_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_MASTER_LOSS_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_SLAVE_STOP_IRQ_EN 0x00000200 +#define BV_I2C_CTRL1_SLAVE_STOP_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_SLAVE_STOP_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_SLAVE_IRQ_EN 0x00000100 +#define BV_I2C_CTRL1_SLAVE_IRQ_EN__DISABLED 0x0 +#define BV_I2C_CTRL1_SLAVE_IRQ_EN__ENABLED 0x1 +#define BM_I2C_CTRL1_BUS_FREE_IRQ 0x00000080 +#define BV_I2C_CTRL1_BUS_FREE_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_BUS_FREE_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ 0x00000040 +#define BV_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_NO_SLAVE_ACK_IRQ 0x00000020 +#define BV_I2C_CTRL1_NO_SLAVE_ACK_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_NO_SLAVE_ACK_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ 0x00000010 +#define BV_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_EARLY_TERM_IRQ 0x00000008 +#define BV_I2C_CTRL1_EARLY_TERM_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_EARLY_TERM_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_MASTER_LOSS_IRQ 0x00000004 +#define BV_I2C_CTRL1_MASTER_LOSS_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_MASTER_LOSS_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_SLAVE_STOP_IRQ 0x00000002 +#define BV_I2C_CTRL1_SLAVE_STOP_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_SLAVE_STOP_IRQ__REQUEST 0x1 +#define BM_I2C_CTRL1_SLAVE_IRQ 0x00000001 +#define BV_I2C_CTRL1_SLAVE_IRQ__NO_REQUEST 0x0 +#define BV_I2C_CTRL1_SLAVE_IRQ__REQUEST 0x1 + +#define HW_I2C_STAT (0x00000050) +#define HW_I2C_STAT_ADDR \ + (REGS_I2C_BASE + HW_I2C_STAT) + +#define BM_I2C_STAT_MASTER_PRESENT 0x80000000 +#define BV_I2C_STAT_MASTER_PRESENT__UNAVAILABLE 0x0 +#define BV_I2C_STAT_MASTER_PRESENT__AVAILABLE 0x1 +#define BM_I2C_STAT_SLAVE_PRESENT 0x40000000 +#define BV_I2C_STAT_SLAVE_PRESENT__UNAVAILABLE 0x0 +#define BV_I2C_STAT_SLAVE_PRESENT__AVAILABLE 0x1 +#define BM_I2C_STAT_ANY_ENABLED_IRQ 0x20000000 +#define BV_I2C_STAT_ANY_ENABLED_IRQ__NO_REQUESTS 0x0 +#define BV_I2C_STAT_ANY_ENABLED_IRQ__AT_LEAST_ONE_REQUEST 0x1 +#define BM_I2C_STAT_GOT_A_NAK 0x10000000 +#define BV_I2C_STAT_GOT_A_NAK__NO_NAK 0x0 +#define BV_I2C_STAT_GOT_A_NAK__DETECTED_NAK 0x1 +#define BP_I2C_STAT_RSVD1 24 +#define BM_I2C_STAT_RSVD1 0x0F000000 +#define BF_I2C_STAT_RSVD1(v) \ + (((v) << 24) & BM_I2C_STAT_RSVD1) +#define BP_I2C_STAT_RCVD_SLAVE_ADDR 16 +#define BM_I2C_STAT_RCVD_SLAVE_ADDR 0x00FF0000 +#define BF_I2C_STAT_RCVD_SLAVE_ADDR(v) \ + (((v) << 16) & BM_I2C_STAT_RCVD_SLAVE_ADDR) +#define BM_I2C_STAT_SLAVE_ADDR_EQ_ZERO 0x00008000 +#define BV_I2C_STAT_SLAVE_ADDR_EQ_ZERO__ZERO_NOT_MATCHED 0x0 +#define BV_I2C_STAT_SLAVE_ADDR_EQ_ZERO__WAS_ZERO 0x1 +#define BM_I2C_STAT_SLAVE_FOUND 0x00004000 +#define BV_I2C_STAT_SLAVE_FOUND__IDLE 0x0 +#define BV_I2C_STAT_SLAVE_FOUND__WAITING 0x1 +#define BM_I2C_STAT_SLAVE_SEARCHING 0x00002000 +#define BV_I2C_STAT_SLAVE_SEARCHING__IDLE 0x0 +#define BV_I2C_STAT_SLAVE_SEARCHING__ACTIVE 0x1 +#define BM_I2C_STAT_DATA_ENGINE_DMA_WAIT 0x00001000 +#define BV_I2C_STAT_DATA_ENGINE_DMA_WAIT__CONTINUE 0x0 +#define BV_I2C_STAT_DATA_ENGINE_DMA_WAIT__WAITING 0x1 +#define BM_I2C_STAT_BUS_BUSY 0x00000800 +#define BV_I2C_STAT_BUS_BUSY__IDLE 0x0 +#define BV_I2C_STAT_BUS_BUSY__BUSY 0x1 +#define BM_I2C_STAT_CLK_GEN_BUSY 0x00000400 +#define BV_I2C_STAT_CLK_GEN_BUSY__IDLE 0x0 +#define BV_I2C_STAT_CLK_GEN_BUSY__BUSY 0x1 +#define BM_I2C_STAT_DATA_ENGINE_BUSY 0x00000200 +#define BV_I2C_STAT_DATA_ENGINE_BUSY__IDLE 0x0 +#define BV_I2C_STAT_DATA_ENGINE_BUSY__BUSY 0x1 +#define BM_I2C_STAT_SLAVE_BUSY 0x00000100 +#define BV_I2C_STAT_SLAVE_BUSY__IDLE 0x0 +#define BV_I2C_STAT_SLAVE_BUSY__BUSY 0x1 +#define BM_I2C_STAT_BUS_FREE_IRQ_SUMMARY 0x00000080 +#define BV_I2C_STAT_BUS_FREE_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_BUS_FREE_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_DATA_ENGINE_CMPLT_IRQ_SUMMARY 0x00000040 +#define BV_I2C_STAT_DATA_ENGINE_CMPLT_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_DATA_ENGINE_CMPLT_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_NO_SLAVE_ACK_IRQ_SUMMARY 0x00000020 +#define BV_I2C_STAT_NO_SLAVE_ACK_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_NO_SLAVE_ACK_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_OVERSIZE_XFER_TERM_IRQ_SUMMARY 0x00000010 +#define BV_I2C_STAT_OVERSIZE_XFER_TERM_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_OVERSIZE_XFER_TERM_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_EARLY_TERM_IRQ_SUMMARY 0x00000008 +#define BV_I2C_STAT_EARLY_TERM_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_EARLY_TERM_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_MASTER_LOSS_IRQ_SUMMARY 0x00000004 +#define BV_I2C_STAT_MASTER_LOSS_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_MASTER_LOSS_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_SLAVE_STOP_IRQ_SUMMARY 0x00000002 +#define BV_I2C_STAT_SLAVE_STOP_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_SLAVE_STOP_IRQ_SUMMARY__REQUEST 0x1 +#define BM_I2C_STAT_SLAVE_IRQ_SUMMARY 0x00000001 +#define BV_I2C_STAT_SLAVE_IRQ_SUMMARY__NO_REQUEST 0x0 +#define BV_I2C_STAT_SLAVE_IRQ_SUMMARY__REQUEST 0x1 + +#define HW_I2C_DATA (0x00000060) +#define HW_I2C_DATA_ADDR \ + (REGS_I2C_BASE + HW_I2C_DATA) + +#define BP_I2C_DATA_DATA 0 +#define BM_I2C_DATA_DATA 0xFFFFFFFF +#define BF_I2C_DATA_DATA(v) (v) + +#define HW_I2C_DEBUG0 (0x00000070) +#define HW_I2C_DEBUG0_SET (0x00000074) +#define HW_I2C_DEBUG0_CLR (0x00000078) +#define HW_I2C_DEBUG0_TOG (0x0000007c) +#define HW_I2C_DEBUG0_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG0) +#define HW_I2C_DEBUG0_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG0_SET) +#define HW_I2C_DEBUG0_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG0_CLR) +#define HW_I2C_DEBUG0_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG0_TOG) + +#define BM_I2C_DEBUG0_DMAREQ 0x80000000 +#define BM_I2C_DEBUG0_DMAENDCMD 0x40000000 +#define BM_I2C_DEBUG0_DMAKICK 0x20000000 +#define BM_I2C_DEBUG0_DMATERMINATE 0x10000000 +#define BP_I2C_DEBUG0_TBD 26 +#define BM_I2C_DEBUG0_TBD 0x0C000000 +#define BF_I2C_DEBUG0_TBD(v) \ + (((v) << 26) & BM_I2C_DEBUG0_TBD) +#define BP_I2C_DEBUG0_DMA_STATE 16 +#define BM_I2C_DEBUG0_DMA_STATE 0x03FF0000 +#define BF_I2C_DEBUG0_DMA_STATE(v) \ + (((v) << 16) & BM_I2C_DEBUG0_DMA_STATE) +#define BM_I2C_DEBUG0_START_TOGGLE 0x00008000 +#define BM_I2C_DEBUG0_STOP_TOGGLE 0x00004000 +#define BM_I2C_DEBUG0_GRAB_TOGGLE 0x00002000 +#define BM_I2C_DEBUG0_CHANGE_TOGGLE 0x00001000 +#define BM_I2C_DEBUG0_TESTMODE 0x00000800 +#define BM_I2C_DEBUG0_SLAVE_HOLD_CLK 0x00000400 +#define BP_I2C_DEBUG0_SLAVE_STATE 0 +#define BM_I2C_DEBUG0_SLAVE_STATE 0x000003FF +#define BF_I2C_DEBUG0_SLAVE_STATE(v) \ + (((v) << 0) & BM_I2C_DEBUG0_SLAVE_STATE) + +#define HW_I2C_DEBUG1 (0x00000080) +#define HW_I2C_DEBUG1_SET (0x00000084) +#define HW_I2C_DEBUG1_CLR (0x00000088) +#define HW_I2C_DEBUG1_TOG (0x0000008c) +#define HW_I2C_DEBUG1_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG1) +#define HW_I2C_DEBUG1_SET_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG1_SET) +#define HW_I2C_DEBUG1_CLR_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG1_CLR) +#define HW_I2C_DEBUG1_TOG_ADDR \ + (REGS_I2C_BASE + HW_I2C_DEBUG1_TOG) + +#define BM_I2C_DEBUG1_I2C_CLK_IN 0x80000000 +#define BM_I2C_DEBUG1_I2C_DATA_IN 0x40000000 +#define BP_I2C_DEBUG1_RSVD4 28 +#define BM_I2C_DEBUG1_RSVD4 0x30000000 +#define BF_I2C_DEBUG1_RSVD4(v) \ + (((v) << 28) & BM_I2C_DEBUG1_RSVD4) +#define BP_I2C_DEBUG1_DMA_BYTE_ENABLES 24 +#define BM_I2C_DEBUG1_DMA_BYTE_ENABLES 0x0F000000 +#define BF_I2C_DEBUG1_DMA_BYTE_ENABLES(v) \ + (((v) << 24) & BM_I2C_DEBUG1_DMA_BYTE_ENABLES) +#define BP_I2C_DEBUG1_CLK_GEN_STATE 16 +#define BM_I2C_DEBUG1_CLK_GEN_STATE 0x00FF0000 +#define BF_I2C_DEBUG1_CLK_GEN_STATE(v) \ + (((v) << 16) & BM_I2C_DEBUG1_CLK_GEN_STATE) +#define BP_I2C_DEBUG1_RSVD2 11 +#define BM_I2C_DEBUG1_RSVD2 0x0000F800 +#define BF_I2C_DEBUG1_RSVD2(v) \ + (((v) << 11) & BM_I2C_DEBUG1_RSVD2) +#define BP_I2C_DEBUG1_LST_MODE 9 +#define BM_I2C_DEBUG1_LST_MODE 0x00000600 +#define BF_I2C_DEBUG1_LST_MODE(v) \ + (((v) << 9) & BM_I2C_DEBUG1_LST_MODE) +#define BV_I2C_DEBUG1_LST_MODE__BCAST 0x0 +#define BV_I2C_DEBUG1_LST_MODE__MY_WRITE 0x1 +#define BV_I2C_DEBUG1_LST_MODE__MY_READ 0x2 +#define BV_I2C_DEBUG1_LST_MODE__NOT_ME 0x3 +#define BM_I2C_DEBUG1_LOCAL_SLAVE_TEST 0x00000100 +#define BP_I2C_DEBUG1_RSVD1 5 +#define BM_I2C_DEBUG1_RSVD1 0x000000E0 +#define BF_I2C_DEBUG1_RSVD1(v) \ + (((v) << 5) & BM_I2C_DEBUG1_RSVD1) +#define BM_I2C_DEBUG1_FORCE_CLK_ON 0x00000010 +#define BM_I2C_DEBUG1_FORCE_ARB_LOSS 0x00000008 +#define BM_I2C_DEBUG1_FORCE_RCV_ACK 0x00000004 +#define BM_I2C_DEBUG1_FORCE_I2C_DATA_OE 0x00000002 +#define BM_I2C_DEBUG1_FORCE_I2C_CLK_OE 0x00000001 + +#define HW_I2C_VERSION (0x00000090) +#define HW_I2C_VERSION_ADDR \ + (REGS_I2C_BASE + HW_I2C_VERSION) -#define HW_I2C_VERSION 0x90 +#define BP_I2C_VERSION_MAJOR 24 +#define BM_I2C_VERSION_MAJOR 0xFF000000 +#define BF_I2C_VERSION_MAJOR(v) \ + (((v) << 24) & BM_I2C_VERSION_MAJOR) +#define BP_I2C_VERSION_MINOR 16 +#define BM_I2C_VERSION_MINOR 0x00FF0000 +#define BF_I2C_VERSION_MINOR(v) \ + (((v) << 16) & BM_I2C_VERSION_MINOR) +#define BP_I2C_VERSION_STEP 0 +#define BM_I2C_VERSION_STEP 0x0000FFFF +#define BF_I2C_VERSION_STEP(v) \ + (((v) << 0) & BM_I2C_VERSION_STEP) +#endif /* __ARCH_ARM___I2C_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-stmp378x/include/mach/regs-uartdbg.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-stmp378x/include/mach/regs-uartdbg.h @@ -1,7 +1,7 @@ /* - * stmp378x: UARTDBG register definitions + * STMP UARTDBG Register Definitions * - * Copyright (c) 2008 Freescale Semiconductor + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. * * This program is free software; you can redistribute it and/or modify @@ -17,143 +17,184 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * This file is created by xml file. Don't Edit it. */ -#define REGS_UARTDBG_BASE (STMP3XXX_REGS_BASE + 0x70000) -#define REGS_UARTDBG_PHYS 0x80070000 -#define REGS_UARTDBG_SIZE 0x2000 - -#define HW_UARTDBGDR 0x00000000 -#define BP_UARTDBGDR_UNAVAILABLE 16 -#define BM_UARTDBGDR_UNAVAILABLE 0xFFFF0000 + +#ifndef __ARCH_ARM___UARTDBG_H +#define __ARCH_ARM___UARTDBG_H 1 + +#define REGS_UARTDBG_BASE (STMP3XXX_REGS_BASE + 0x70000) +#define REGS_UARTDBG_PHYS (0x80070000) +#define REGS_UARTDBG_SIZE 0x00002000 + +#define HW_UARTDBGDR (0x00000000) +#define HW_UARTDBGDR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGDR) + +#define BP_UARTDBGDR_UNAVAILABLE 16 +#define BM_UARTDBGDR_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGDR_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGDR_UNAVAILABLE) -#define BP_UARTDBGDR_RESERVED 12 -#define BM_UARTDBGDR_RESERVED 0x0000F000 + (((v) << 16) & BM_UARTDBGDR_UNAVAILABLE) +#define BP_UARTDBGDR_RESERVED 12 +#define BM_UARTDBGDR_RESERVED 0x0000F000 #define BF_UARTDBGDR_RESERVED(v) \ - (((v) << 12) & BM_UARTDBGDR_RESERVED) -#define BM_UARTDBGDR_OE 0x00000800 -#define BM_UARTDBGDR_BE 0x00000400 -#define BM_UARTDBGDR_PE 0x00000200 -#define BM_UARTDBGDR_FE 0x00000100 -#define BP_UARTDBGDR_DATA 0 -#define BM_UARTDBGDR_DATA 0x000000FF + (((v) << 12) & BM_UARTDBGDR_RESERVED) +#define BM_UARTDBGDR_OE 0x00000800 +#define BM_UARTDBGDR_BE 0x00000400 +#define BM_UARTDBGDR_PE 0x00000200 +#define BM_UARTDBGDR_FE 0x00000100 +#define BP_UARTDBGDR_DATA 0 +#define BM_UARTDBGDR_DATA 0x000000FF #define BF_UARTDBGDR_DATA(v) \ - (((v) << 0) & BM_UARTDBGDR_DATA) -#define HW_UARTDBGRSR_ECR 0x00000004 -#define BP_UARTDBGRSR_ECR_UNAVAILABLE 8 -#define BM_UARTDBGRSR_ECR_UNAVAILABLE 0xFFFFFF00 + (((v) << 0) & BM_UARTDBGDR_DATA) + +#define HW_UARTDBGRSR_ECR (0x00000004) +#define HW_UARTDBGRSR_ECR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGRSR_ECR) + +#define BP_UARTDBGRSR_ECR_UNAVAILABLE 8 +#define BM_UARTDBGRSR_ECR_UNAVAILABLE 0xFFFFFF00 #define BF_UARTDBGRSR_ECR_UNAVAILABLE(v) \ - (((v) << 8) & BM_UARTDBGRSR_ECR_UNAVAILABLE) -#define BP_UARTDBGRSR_ECR_EC 4 -#define BM_UARTDBGRSR_ECR_EC 0x000000F0 + (((v) << 8) & BM_UARTDBGRSR_ECR_UNAVAILABLE) +#define BP_UARTDBGRSR_ECR_EC 4 +#define BM_UARTDBGRSR_ECR_EC 0x000000F0 #define BF_UARTDBGRSR_ECR_EC(v) \ - (((v) << 4) & BM_UARTDBGRSR_ECR_EC) -#define BM_UARTDBGRSR_ECR_OE 0x00000008 -#define BM_UARTDBGRSR_ECR_BE 0x00000004 -#define BM_UARTDBGRSR_ECR_PE 0x00000002 -#define BM_UARTDBGRSR_ECR_FE 0x00000001 -#define HW_UARTDBGFR 0x00000018 -#define BP_UARTDBGFR_UNAVAILABLE 16 -#define BM_UARTDBGFR_UNAVAILABLE 0xFFFF0000 + (((v) << 4) & BM_UARTDBGRSR_ECR_EC) +#define BM_UARTDBGRSR_ECR_OE 0x00000008 +#define BM_UARTDBGRSR_ECR_BE 0x00000004 +#define BM_UARTDBGRSR_ECR_PE 0x00000002 +#define BM_UARTDBGRSR_ECR_FE 0x00000001 + +#define HW_UARTDBGFR (0x00000018) +#define HW_UARTDBGFR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGFR) + +#define BP_UARTDBGFR_UNAVAILABLE 16 +#define BM_UARTDBGFR_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGFR_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGFR_UNAVAILABLE) -#define BP_UARTDBGFR_RESERVED 9 -#define BM_UARTDBGFR_RESERVED 0x0000FE00 + (((v) << 16) & BM_UARTDBGFR_UNAVAILABLE) +#define BP_UARTDBGFR_RESERVED 9 +#define BM_UARTDBGFR_RESERVED 0x0000FE00 #define BF_UARTDBGFR_RESERVED(v) \ - (((v) << 9) & BM_UARTDBGFR_RESERVED) -#define BM_UARTDBGFR_RI 0x00000100 -#define BM_UARTDBGFR_TXFE 0x00000080 -#define BM_UARTDBGFR_RXFF 0x00000040 -#define BM_UARTDBGFR_TXFF 0x00000020 -#define BM_UARTDBGFR_RXFE 0x00000010 -#define BM_UARTDBGFR_BUSY 0x00000008 -#define BM_UARTDBGFR_DCD 0x00000004 -#define BM_UARTDBGFR_DSR 0x00000002 -#define BM_UARTDBGFR_CTS 0x00000001 -#define HW_UARTDBGILPR 0x00000020 -#define BP_UARTDBGILPR_UNAVAILABLE 8 -#define BM_UARTDBGILPR_UNAVAILABLE 0xFFFFFF00 + (((v) << 9) & BM_UARTDBGFR_RESERVED) +#define BM_UARTDBGFR_RI 0x00000100 +#define BM_UARTDBGFR_TXFE 0x00000080 +#define BM_UARTDBGFR_RXFF 0x00000040 +#define BM_UARTDBGFR_TXFF 0x00000020 +#define BM_UARTDBGFR_RXFE 0x00000010 +#define BM_UARTDBGFR_BUSY 0x00000008 +#define BM_UARTDBGFR_DCD 0x00000004 +#define BM_UARTDBGFR_DSR 0x00000002 +#define BM_UARTDBGFR_CTS 0x00000001 + +#define HW_UARTDBGILPR (0x00000020) +#define HW_UARTDBGILPR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGILPR) + +#define BP_UARTDBGILPR_UNAVAILABLE 8 +#define BM_UARTDBGILPR_UNAVAILABLE 0xFFFFFF00 #define BF_UARTDBGILPR_UNAVAILABLE(v) \ - (((v) << 8) & BM_UARTDBGILPR_UNAVAILABLE) -#define BP_UARTDBGILPR_ILPDVSR 0 -#define BM_UARTDBGILPR_ILPDVSR 0x000000FF + (((v) << 8) & BM_UARTDBGILPR_UNAVAILABLE) +#define BP_UARTDBGILPR_ILPDVSR 0 +#define BM_UARTDBGILPR_ILPDVSR 0x000000FF #define BF_UARTDBGILPR_ILPDVSR(v) \ - (((v) << 0) & BM_UARTDBGILPR_ILPDVSR) -#define HW_UARTDBGIBRD 0x00000024 -#define BP_UARTDBGIBRD_UNAVAILABLE 16 -#define BM_UARTDBGIBRD_UNAVAILABLE 0xFFFF0000 + (((v) << 0) & BM_UARTDBGILPR_ILPDVSR) + +#define HW_UARTDBGIBRD (0x00000024) +#define HW_UARTDBGIBRD_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGIBRD) + +#define BP_UARTDBGIBRD_UNAVAILABLE 16 +#define BM_UARTDBGIBRD_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGIBRD_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGIBRD_UNAVAILABLE) -#define BP_UARTDBGIBRD_BAUD_DIVINT 0 -#define BM_UARTDBGIBRD_BAUD_DIVINT 0x0000FFFF + (((v) << 16) & BM_UARTDBGIBRD_UNAVAILABLE) +#define BP_UARTDBGIBRD_BAUD_DIVINT 0 +#define BM_UARTDBGIBRD_BAUD_DIVINT 0x0000FFFF #define BF_UARTDBGIBRD_BAUD_DIVINT(v) \ - (((v) << 0) & BM_UARTDBGIBRD_BAUD_DIVINT) -#define HW_UARTDBGFBRD 0x00000028 -#define BP_UARTDBGFBRD_UNAVAILABLE 8 -#define BM_UARTDBGFBRD_UNAVAILABLE 0xFFFFFF00 + (((v) << 0) & BM_UARTDBGIBRD_BAUD_DIVINT) + +#define HW_UARTDBGFBRD (0x00000028) +#define HW_UARTDBGFBRD_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGFBRD) + +#define BP_UARTDBGFBRD_UNAVAILABLE 8 +#define BM_UARTDBGFBRD_UNAVAILABLE 0xFFFFFF00 #define BF_UARTDBGFBRD_UNAVAILABLE(v) \ - (((v) << 8) & BM_UARTDBGFBRD_UNAVAILABLE) -#define BP_UARTDBGFBRD_RESERVED 6 -#define BM_UARTDBGFBRD_RESERVED 0x000000C0 + (((v) << 8) & BM_UARTDBGFBRD_UNAVAILABLE) +#define BP_UARTDBGFBRD_RESERVED 6 +#define BM_UARTDBGFBRD_RESERVED 0x000000C0 #define BF_UARTDBGFBRD_RESERVED(v) \ - (((v) << 6) & BM_UARTDBGFBRD_RESERVED) -#define BP_UARTDBGFBRD_BAUD_DIVFRAC 0 -#define BM_UARTDBGFBRD_BAUD_DIVFRAC 0x0000003F + (((v) << 6) & BM_UARTDBGFBRD_RESERVED) +#define BP_UARTDBGFBRD_BAUD_DIVFRAC 0 +#define BM_UARTDBGFBRD_BAUD_DIVFRAC 0x0000003F #define BF_UARTDBGFBRD_BAUD_DIVFRAC(v) \ - (((v) << 0) & BM_UARTDBGFBRD_BAUD_DIVFRAC) -#define HW_UARTDBGLCR_H 0x0000002c -#define BP_UARTDBGLCR_H_UNAVAILABLE 16 -#define BM_UARTDBGLCR_H_UNAVAILABLE 0xFFFF0000 + (((v) << 0) & BM_UARTDBGFBRD_BAUD_DIVFRAC) + +#define HW_UARTDBGLCR_H (0x0000002c) +#define HW_UARTDBGLCR_H_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGLCR_H) + +#define BP_UARTDBGLCR_H_UNAVAILABLE 16 +#define BM_UARTDBGLCR_H_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGLCR_H_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGLCR_H_UNAVAILABLE) -#define BP_UARTDBGLCR_H_RESERVED 8 -#define BM_UARTDBGLCR_H_RESERVED 0x0000FF00 + (((v) << 16) & BM_UARTDBGLCR_H_UNAVAILABLE) +#define BP_UARTDBGLCR_H_RESERVED 8 +#define BM_UARTDBGLCR_H_RESERVED 0x0000FF00 #define BF_UARTDBGLCR_H_RESERVED(v) \ - (((v) << 8) & BM_UARTDBGLCR_H_RESERVED) -#define BM_UARTDBGLCR_H_SPS 0x00000080 -#define BP_UARTDBGLCR_H_WLEN 5 -#define BM_UARTDBGLCR_H_WLEN 0x00000060 + (((v) << 8) & BM_UARTDBGLCR_H_RESERVED) +#define BM_UARTDBGLCR_H_SPS 0x00000080 +#define BP_UARTDBGLCR_H_WLEN 5 +#define BM_UARTDBGLCR_H_WLEN 0x00000060 #define BF_UARTDBGLCR_H_WLEN(v) \ - (((v) << 5) & BM_UARTDBGLCR_H_WLEN) -#define BM_UARTDBGLCR_H_FEN 0x00000010 -#define BM_UARTDBGLCR_H_STP2 0x00000008 -#define BM_UARTDBGLCR_H_EPS 0x00000004 -#define BM_UARTDBGLCR_H_PEN 0x00000002 -#define BM_UARTDBGLCR_H_BRK 0x00000001 -#define HW_UARTDBGCR 0x00000030 -#define BP_UARTDBGCR_UNAVAILABLE 16 -#define BM_UARTDBGCR_UNAVAILABLE 0xFFFF0000 + (((v) << 5) & BM_UARTDBGLCR_H_WLEN) +#define BM_UARTDBGLCR_H_FEN 0x00000010 +#define BM_UARTDBGLCR_H_STP2 0x00000008 +#define BM_UARTDBGLCR_H_EPS 0x00000004 +#define BM_UARTDBGLCR_H_PEN 0x00000002 +#define BM_UARTDBGLCR_H_BRK 0x00000001 + +#define HW_UARTDBGCR (0x00000030) +#define HW_UARTDBGCR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGCR) + +#define BP_UARTDBGCR_UNAVAILABLE 16 +#define BM_UARTDBGCR_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGCR_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGCR_UNAVAILABLE) -#define BM_UARTDBGCR_CTSEN 0x00008000 -#define BM_UARTDBGCR_RTSEN 0x00004000 -#define BM_UARTDBGCR_OUT2 0x00002000 -#define BM_UARTDBGCR_OUT1 0x00001000 -#define BM_UARTDBGCR_RTS 0x00000800 -#define BM_UARTDBGCR_DTR 0x00000400 -#define BM_UARTDBGCR_RXE 0x00000200 -#define BM_UARTDBGCR_TXE 0x00000100 -#define BM_UARTDBGCR_LBE 0x00000080 -#define BP_UARTDBGCR_RESERVED 3 -#define BM_UARTDBGCR_RESERVED 0x00000078 + (((v) << 16) & BM_UARTDBGCR_UNAVAILABLE) +#define BM_UARTDBGCR_CTSEN 0x00008000 +#define BM_UARTDBGCR_RTSEN 0x00004000 +#define BM_UARTDBGCR_OUT2 0x00002000 +#define BM_UARTDBGCR_OUT1 0x00001000 +#define BM_UARTDBGCR_RTS 0x00000800 +#define BM_UARTDBGCR_DTR 0x00000400 +#define BM_UARTDBGCR_RXE 0x00000200 +#define BM_UARTDBGCR_TXE 0x00000100 +#define BM_UARTDBGCR_LBE 0x00000080 +#define BP_UARTDBGCR_RESERVED 3 +#define BM_UARTDBGCR_RESERVED 0x00000078 #define BF_UARTDBGCR_RESERVED(v) \ - (((v) << 3) & BM_UARTDBGCR_RESERVED) -#define BM_UARTDBGCR_SIRLP 0x00000004 -#define BM_UARTDBGCR_SIREN 0x00000002 -#define BM_UARTDBGCR_UARTEN 0x00000001 -#define HW_UARTDBGIFLS 0x00000034 -#define BP_UARTDBGIFLS_UNAVAILABLE 16 -#define BM_UARTDBGIFLS_UNAVAILABLE 0xFFFF0000 + (((v) << 3) & BM_UARTDBGCR_RESERVED) +#define BM_UARTDBGCR_SIRLP 0x00000004 +#define BM_UARTDBGCR_SIREN 0x00000002 +#define BM_UARTDBGCR_UARTEN 0x00000001 + +#define HW_UARTDBGIFLS (0x00000034) +#define HW_UARTDBGIFLS_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGIFLS) + +#define BP_UARTDBGIFLS_UNAVAILABLE 16 +#define BM_UARTDBGIFLS_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGIFLS_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGIFLS_UNAVAILABLE) -#define BP_UARTDBGIFLS_RESERVED 6 -#define BM_UARTDBGIFLS_RESERVED 0x0000FFC0 + (((v) << 16) & BM_UARTDBGIFLS_UNAVAILABLE) +#define BP_UARTDBGIFLS_RESERVED 6 +#define BM_UARTDBGIFLS_RESERVED 0x0000FFC0 #define BF_UARTDBGIFLS_RESERVED(v) \ - (((v) << 6) & BM_UARTDBGIFLS_RESERVED) -#define BP_UARTDBGIFLS_RXIFLSEL 3 -#define BM_UARTDBGIFLS_RXIFLSEL 0x00000038 + (((v) << 6) & BM_UARTDBGIFLS_RESERVED) +#define BP_UARTDBGIFLS_RXIFLSEL 3 +#define BM_UARTDBGIFLS_RXIFLSEL 0x00000038 #define BF_UARTDBGIFLS_RXIFLSEL(v) \ - (((v) << 3) & BM_UARTDBGIFLS_RXIFLSEL) + (((v) << 3) & BM_UARTDBGIFLS_RXIFLSEL) #define BV_UARTDBGIFLS_RXIFLSEL__NOT_EMPTY 0x0 #define BV_UARTDBGIFLS_RXIFLSEL__ONE_QUARTER 0x1 #define BV_UARTDBGIFLS_RXIFLSEL__ONE_HALF 0x2 @@ -162,11 +203,11 @@ #define BV_UARTDBGIFLS_RXIFLSEL__INVALID5 0x5 #define BV_UARTDBGIFLS_RXIFLSEL__INVALID6 0x6 #define BV_UARTDBGIFLS_RXIFLSEL__INVALID7 0x7 -#define BP_UARTDBGIFLS_TXIFLSEL 0 -#define BM_UARTDBGIFLS_TXIFLSEL 0x00000007 +#define BP_UARTDBGIFLS_TXIFLSEL 0 +#define BM_UARTDBGIFLS_TXIFLSEL 0x00000007 #define BF_UARTDBGIFLS_TXIFLSEL(v) \ - (((v) << 0) & BM_UARTDBGIFLS_TXIFLSEL) -#define BV_UARTDBGIFLS_TXIFLSEL__EMPTY 0x0 + (((v) << 0) & BM_UARTDBGIFLS_TXIFLSEL) +#define BV_UARTDBGIFLS_TXIFLSEL__EMPTY 0x0 #define BV_UARTDBGIFLS_TXIFLSEL__ONE_QUARTER 0x1 #define BV_UARTDBGIFLS_TXIFLSEL__ONE_HALF 0x2 #define BV_UARTDBGIFLS_TXIFLSEL__THREE_QUARTERS 0x3 @@ -174,95 +215,116 @@ #define BV_UARTDBGIFLS_TXIFLSEL__INVALID5 0x5 #define BV_UARTDBGIFLS_TXIFLSEL__INVALID6 0x6 #define BV_UARTDBGIFLS_TXIFLSEL__INVALID7 0x7 -#define HW_UARTDBGIMSC 0x00000038 -#define BP_UARTDBGIMSC_UNAVAILABLE 16 -#define BM_UARTDBGIMSC_UNAVAILABLE 0xFFFF0000 + +#define HW_UARTDBGIMSC (0x00000038) +#define HW_UARTDBGIMSC_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGIMSC) + +#define BP_UARTDBGIMSC_UNAVAILABLE 16 +#define BM_UARTDBGIMSC_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGIMSC_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGIMSC_UNAVAILABLE) -#define BP_UARTDBGIMSC_RESERVED 11 -#define BM_UARTDBGIMSC_RESERVED 0x0000F800 + (((v) << 16) & BM_UARTDBGIMSC_UNAVAILABLE) +#define BP_UARTDBGIMSC_RESERVED 11 +#define BM_UARTDBGIMSC_RESERVED 0x0000F800 #define BF_UARTDBGIMSC_RESERVED(v) \ - (((v) << 11) & BM_UARTDBGIMSC_RESERVED) -#define BM_UARTDBGIMSC_OEIM 0x00000400 -#define BM_UARTDBGIMSC_BEIM 0x00000200 -#define BM_UARTDBGIMSC_PEIM 0x00000100 -#define BM_UARTDBGIMSC_FEIM 0x00000080 -#define BM_UARTDBGIMSC_RTIM 0x00000040 -#define BM_UARTDBGIMSC_TXIM 0x00000020 -#define BM_UARTDBGIMSC_RXIM 0x00000010 -#define BM_UARTDBGIMSC_DSRMIM 0x00000008 -#define BM_UARTDBGIMSC_DCDMIM 0x00000004 -#define BM_UARTDBGIMSC_CTSMIM 0x00000002 -#define BM_UARTDBGIMSC_RIMIM 0x00000001 -#define HW_UARTDBGRIS 0x0000003c -#define BP_UARTDBGRIS_UNAVAILABLE 16 -#define BM_UARTDBGRIS_UNAVAILABLE 0xFFFF0000 + (((v) << 11) & BM_UARTDBGIMSC_RESERVED) +#define BM_UARTDBGIMSC_OEIM 0x00000400 +#define BM_UARTDBGIMSC_BEIM 0x00000200 +#define BM_UARTDBGIMSC_PEIM 0x00000100 +#define BM_UARTDBGIMSC_FEIM 0x00000080 +#define BM_UARTDBGIMSC_RTIM 0x00000040 +#define BM_UARTDBGIMSC_TXIM 0x00000020 +#define BM_UARTDBGIMSC_RXIM 0x00000010 +#define BM_UARTDBGIMSC_DSRMIM 0x00000008 +#define BM_UARTDBGIMSC_DCDMIM 0x00000004 +#define BM_UARTDBGIMSC_CTSMIM 0x00000002 +#define BM_UARTDBGIMSC_RIMIM 0x00000001 + +#define HW_UARTDBGRIS (0x0000003c) +#define HW_UARTDBGRIS_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGRIS) + +#define BP_UARTDBGRIS_UNAVAILABLE 16 +#define BM_UARTDBGRIS_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGRIS_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGRIS_UNAVAILABLE) -#define BP_UARTDBGRIS_RESERVED 11 -#define BM_UARTDBGRIS_RESERVED 0x0000F800 + (((v) << 16) & BM_UARTDBGRIS_UNAVAILABLE) +#define BP_UARTDBGRIS_RESERVED 11 +#define BM_UARTDBGRIS_RESERVED 0x0000F800 #define BF_UARTDBGRIS_RESERVED(v) \ - (((v) << 11) & BM_UARTDBGRIS_RESERVED) -#define BM_UARTDBGRIS_OERIS 0x00000400 -#define BM_UARTDBGRIS_BERIS 0x00000200 -#define BM_UARTDBGRIS_PERIS 0x00000100 -#define BM_UARTDBGRIS_FERIS 0x00000080 -#define BM_UARTDBGRIS_RTRIS 0x00000040 -#define BM_UARTDBGRIS_TXRIS 0x00000020 -#define BM_UARTDBGRIS_RXRIS 0x00000010 -#define BM_UARTDBGRIS_DSRRMIS 0x00000008 -#define BM_UARTDBGRIS_DCDRMIS 0x00000004 -#define BM_UARTDBGRIS_CTSRMIS 0x00000002 -#define BM_UARTDBGRIS_RIRMIS 0x00000001 -#define HW_UARTDBGMIS 0x00000040 -#define BP_UARTDBGMIS_UNAVAILABLE 16 -#define BM_UARTDBGMIS_UNAVAILABLE 0xFFFF0000 + (((v) << 11) & BM_UARTDBGRIS_RESERVED) +#define BM_UARTDBGRIS_OERIS 0x00000400 +#define BM_UARTDBGRIS_BERIS 0x00000200 +#define BM_UARTDBGRIS_PERIS 0x00000100 +#define BM_UARTDBGRIS_FERIS 0x00000080 +#define BM_UARTDBGRIS_RTRIS 0x00000040 +#define BM_UARTDBGRIS_TXRIS 0x00000020 +#define BM_UARTDBGRIS_RXRIS 0x00000010 +#define BM_UARTDBGRIS_DSRRMIS 0x00000008 +#define BM_UARTDBGRIS_DCDRMIS 0x00000004 +#define BM_UARTDBGRIS_CTSRMIS 0x00000002 +#define BM_UARTDBGRIS_RIRMIS 0x00000001 + +#define HW_UARTDBGMIS (0x00000040) +#define HW_UARTDBGMIS_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGMIS) + +#define BP_UARTDBGMIS_UNAVAILABLE 16 +#define BM_UARTDBGMIS_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGMIS_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGMIS_UNAVAILABLE) -#define BP_UARTDBGMIS_RESERVED 11 -#define BM_UARTDBGMIS_RESERVED 0x0000F800 + (((v) << 16) & BM_UARTDBGMIS_UNAVAILABLE) +#define BP_UARTDBGMIS_RESERVED 11 +#define BM_UARTDBGMIS_RESERVED 0x0000F800 #define BF_UARTDBGMIS_RESERVED(v) \ - (((v) << 11) & BM_UARTDBGMIS_RESERVED) -#define BM_UARTDBGMIS_OEMIS 0x00000400 -#define BM_UARTDBGMIS_BEMIS 0x00000200 -#define BM_UARTDBGMIS_PEMIS 0x00000100 -#define BM_UARTDBGMIS_FEMIS 0x00000080 -#define BM_UARTDBGMIS_RTMIS 0x00000040 -#define BM_UARTDBGMIS_TXMIS 0x00000020 -#define BM_UARTDBGMIS_RXMIS 0x00000010 -#define BM_UARTDBGMIS_DSRMMIS 0x00000008 -#define BM_UARTDBGMIS_DCDMMIS 0x00000004 -#define BM_UARTDBGMIS_CTSMMIS 0x00000002 -#define BM_UARTDBGMIS_RIMMIS 0x00000001 -#define HW_UARTDBGICR 0x00000044 -#define BP_UARTDBGICR_UNAVAILABLE 16 -#define BM_UARTDBGICR_UNAVAILABLE 0xFFFF0000 + (((v) << 11) & BM_UARTDBGMIS_RESERVED) +#define BM_UARTDBGMIS_OEMIS 0x00000400 +#define BM_UARTDBGMIS_BEMIS 0x00000200 +#define BM_UARTDBGMIS_PEMIS 0x00000100 +#define BM_UARTDBGMIS_FEMIS 0x00000080 +#define BM_UARTDBGMIS_RTMIS 0x00000040 +#define BM_UARTDBGMIS_TXMIS 0x00000020 +#define BM_UARTDBGMIS_RXMIS 0x00000010 +#define BM_UARTDBGMIS_DSRMMIS 0x00000008 +#define BM_UARTDBGMIS_DCDMMIS 0x00000004 +#define BM_UARTDBGMIS_CTSMMIS 0x00000002 +#define BM_UARTDBGMIS_RIMMIS 0x00000001 + +#define HW_UARTDBGICR (0x00000044) +#define HW_UARTDBGICR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGICR) + +#define BP_UARTDBGICR_UNAVAILABLE 16 +#define BM_UARTDBGICR_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGICR_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGICR_UNAVAILABLE) -#define BP_UARTDBGICR_RESERVED 11 -#define BM_UARTDBGICR_RESERVED 0x0000F800 + (((v) << 16) & BM_UARTDBGICR_UNAVAILABLE) +#define BP_UARTDBGICR_RESERVED 11 +#define BM_UARTDBGICR_RESERVED 0x0000F800 #define BF_UARTDBGICR_RESERVED(v) \ - (((v) << 11) & BM_UARTDBGICR_RESERVED) -#define BM_UARTDBGICR_OEIC 0x00000400 -#define BM_UARTDBGICR_BEIC 0x00000200 -#define BM_UARTDBGICR_PEIC 0x00000100 -#define BM_UARTDBGICR_FEIC 0x00000080 -#define BM_UARTDBGICR_RTIC 0x00000040 -#define BM_UARTDBGICR_TXIC 0x00000020 -#define BM_UARTDBGICR_RXIC 0x00000010 -#define BM_UARTDBGICR_DSRMIC 0x00000008 -#define BM_UARTDBGICR_DCDMIC 0x00000004 -#define BM_UARTDBGICR_CTSMIC 0x00000002 -#define BM_UARTDBGICR_RIMIC 0x00000001 -#define HW_UARTDBGDMACR 0x00000048 -#define BP_UARTDBGDMACR_UNAVAILABLE 16 -#define BM_UARTDBGDMACR_UNAVAILABLE 0xFFFF0000 + (((v) << 11) & BM_UARTDBGICR_RESERVED) +#define BM_UARTDBGICR_OEIC 0x00000400 +#define BM_UARTDBGICR_BEIC 0x00000200 +#define BM_UARTDBGICR_PEIC 0x00000100 +#define BM_UARTDBGICR_FEIC 0x00000080 +#define BM_UARTDBGICR_RTIC 0x00000040 +#define BM_UARTDBGICR_TXIC 0x00000020 +#define BM_UARTDBGICR_RXIC 0x00000010 +#define BM_UARTDBGICR_DSRMIC 0x00000008 +#define BM_UARTDBGICR_DCDMIC 0x00000004 +#define BM_UARTDBGICR_CTSMIC 0x00000002 +#define BM_UARTDBGICR_RIMIC 0x00000001 + +#define HW_UARTDBGDMACR (0x00000048) +#define HW_UARTDBGDMACR_ADDR \ + (REGS_UARTDBG_BASE + HW_UARTDBGDMACR) + +#define BP_UARTDBGDMACR_UNAVAILABLE 16 +#define BM_UARTDBGDMACR_UNAVAILABLE 0xFFFF0000 #define BF_UARTDBGDMACR_UNAVAILABLE(v) \ - (((v) << 16) & BM_UARTDBGDMACR_UNAVAILABLE) -#define BP_UARTDBGDMACR_RESERVED 3 -#define BM_UARTDBGDMACR_RESERVED 0x0000FFF8 + (((v) << 16) & BM_UARTDBGDMACR_UNAVAILABLE) +#define BP_UARTDBGDMACR_RESERVED 3 +#define BM_UARTDBGDMACR_RESERVED 0x0000FFF8 #define BF_UARTDBGDMACR_RESERVED(v) \ - (((v) << 3) & BM_UARTDBGDMACR_RESERVED) -#define BM_UARTDBGDMACR_DMAONERR 0x00000004 -#define BM_UARTDBGDMACR_TXDMAE 0x00000002 -#define BM_UARTDBGDMACR_RXDMAE 0x00000001 + (((v) << 3) & BM_UARTDBGDMACR_RESERVED) +#define BM_UARTDBGDMACR_DMAONERR 0x00000004 +#define BM_UARTDBGDMACR_TXDMAE 0x00000002 +#define BM_UARTDBGDMACR_RXDMAE 0x00000001 +#endif /* __ARCH_ARM___UARTDBG_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/ucontext.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/ucontext.h @@ -59,23 +59,18 @@ #endif /* CONFIG_IWMMXT */ #ifdef CONFIG_VFP -#if __LINUX_ARM_ARCH__ < 6 -/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra - * word after the registers, and a word of padding at the end for - * alignment. */ #define VFP_MAGIC 0x56465001 -#define VFP_STORAGE_SIZE 152 -#else -#define VFP_MAGIC 0x56465002 -#define VFP_STORAGE_SIZE 144 -#endif struct vfp_sigframe { unsigned long magic; unsigned long size; - union vfp_state storage; -}; + struct user_vfp ufp; +} __attribute__((__aligned__(8))); + +/* 8 byte for magic and size, 272 byte for ufp */ +#define VFP_STORAGE_SIZE sizeof(struct vfp_sigframe) + #endif /* CONFIG_VFP */ /* @@ -91,7 +86,7 @@ #ifdef CONFIG_IWMMXT struct iwmmxt_sigframe iwmmxt; #endif -#if 0 && defined CONFIG_VFP /* Not yet saved. */ +#ifdef CONFIG_VFP struct vfp_sigframe vfp; #endif /* Something that isn't a valid magic number for any coprocessor. */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/cacheflush.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/cacheflush.h @@ -154,16 +154,16 @@ * Please note that the implementation of these, and the required * effects are cache-type (VIVT/VIPT/PIPT) specific. * - * flush_cache_kern_all() + * flush_kern_all() * * Unconditionally clean and invalidate the entire cache. * - * flush_cache_user_mm(mm) + * flush_user_all() * * Clean and invalidate all user space cache entries * before a change of page tables. * - * flush_cache_user_range(start, end, flags) + * flush_user_range(start, end, flags) * * Clean and invalidate a range of cache entries in the * specified address space before a change of page tables. @@ -179,6 +179,20 @@ * - start - virtual start address * - end - virtual end address * + * coherent_user_range(start, end) + * + * Ensure coherency between the Icache and the Dcache in the + * region described by start, end. If you have non-snooping + * Harvard caches, you need to implement this function. + * - start - virtual start address + * - end - virtual end address + * + * flush_kern_dcache_area(kaddr, size) + * + * Ensure that the data held in page is written back. + * - kaddr - page address + * - size - region size + * * DMA Cache Coherency * =================== * @@ -222,6 +236,7 @@ void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); void (*flush_range)(unsigned long, unsigned long); + void (*flush_all)(void); }; /* @@ -299,6 +314,11 @@ if (outer_cache.flush_range) outer_cache.flush_range(start, end); } +static inline void outer_flush_all(void) +{ + if (outer_cache.flush_all) + outer_cache.flush_all(); +} #else @@ -308,6 +328,8 @@ { } static inline void outer_flush_range(unsigned long start, unsigned long end) { } +static inline void outer_flush_all(void) +{ } #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/thread_info.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/thread_info.h @@ -140,6 +140,7 @@ #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 #define TIF_FREEZE 19 +#define TIF_RESTORE_SIGMASK 20 #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -147,6 +148,7 @@ #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) #define _TIF_FREEZE (1 << TIF_FREEZE) +#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) /* * Change these and you break ASM code in entry-common.S --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/mman.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/mman.h @@ -14,4 +14,7 @@ #define MCL_CURRENT 1 /* lock all current mappings */ #define MCL_FUTURE 2 /* lock all future mappings */ +#define arch_mmap_check(addr, len, flags) \ + (((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0) + #endif /* __ARM_MMAN_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/processor.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/processor.h @@ -127,6 +127,8 @@ #endif +#define HAVE_ARCH_PICK_MMAP_LAYOUT + #endif #endif /* __ASM_ARM_PROCESSOR_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/unistd.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/unistd.h @@ -360,8 +360,8 @@ #define __NR_readlinkat (__NR_SYSCALL_BASE+332) #define __NR_fchmodat (__NR_SYSCALL_BASE+333) #define __NR_faccessat (__NR_SYSCALL_BASE+334) - /* 335 for pselect6 */ - /* 336 for ppoll */ +#define __NR_pselect6 (__NR_SYSCALL_BASE+335) +#define __NR_ppoll (__NR_SYSCALL_BASE+336) #define __NR_unshare (__NR_SYSCALL_BASE+337) #define __NR_set_robust_list (__NR_SYSCALL_BASE+338) #define __NR_get_robust_list (__NR_SYSCALL_BASE+339) @@ -372,7 +372,7 @@ #define __NR_vmsplice (__NR_SYSCALL_BASE+343) #define __NR_move_pages (__NR_SYSCALL_BASE+344) #define __NR_getcpu (__NR_SYSCALL_BASE+345) - /* 346 for epoll_pwait */ +#define __NR_epoll_pwait (__NR_SYSCALL_BASE+346) #define __NR_kexec_load (__NR_SYSCALL_BASE+347) #define __NR_utimensat (__NR_SYSCALL_BASE+348) #define __NR_signalfd (__NR_SYSCALL_BASE+349) @@ -432,6 +432,7 @@ #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION +#define __ARCH_WANT_SYS_RT_SIGSUSPEND #if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) #define __ARCH_WANT_SYS_TIME --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/user.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/user.h @@ -88,6 +88,9 @@ struct user_vfp { unsigned long long fpregs[32]; unsigned long fpscr; + unsigned long fpexc; + unsigned long fpinst; + unsigned long fpinst2; }; #endif /* _ARM_USER_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/kmap_types.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/kmap_types.h @@ -22,4 +22,10 @@ KM_TYPE_NR }; +#ifdef CONFIG_DEBUG_HIGHMEM +#define KM_NMI (-1) +#define KM_NMI_PTE (-1) +#define KM_IRQ_PTE (-1) +#endif + #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/pgtable.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/pgtable.h @@ -186,6 +186,8 @@ #define L_PTE_MT_DEV_NONSHARED (0x0c << 2) /* 1100 */ #define L_PTE_MT_DEV_WC (0x09 << 2) /* 1001 */ #define L_PTE_MT_DEV_CACHED (0x0b << 2) /* 1011 */ +#define L_PTE_MT_OUTER_UNCACHED (0x0d << 2) /* 1101 */ +#define L_PTE_MT_OUTER_WRITETHRU (0x0e << 2) /* 1110 */ #define L_PTE_MT_MASK (0x0f << 2) #ifndef __ASSEMBLY__ @@ -304,6 +306,19 @@ __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED) #define pgprot_writecombine(prot) \ __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE) +#define pgprot_writethru(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_WRITETHROUGH) +#define pgprot_nonshareddev(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_DEV_NONSHARED) + +/* Extended configurations for inner writeback cacheable */ +#define pgprot_writealloc(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_WRITEALLOC) +#define pgprot_outer_wrthru(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_OUTER_WRITETHRU) +#define pgprot_outer_noncached(prot) \ + __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_OUTER_UNCACHED) + #define pmd_none(pmd) (!pmd_val(pmd)) #define pmd_present(pmd) (pmd_val(pmd)) @@ -429,6 +444,7 @@ * We provide our own arch_get_unmapped_area to cope with VIPT caches. */ #define HAVE_ARCH_UNMAPPED_AREA +#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN /* * remap a physical page `pfn' of size `size' with page protection `prot' --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/hardware/cache-l2x0.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/hardware/cache-l2x0.h @@ -53,6 +53,8 @@ #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); +extern void l2x0_enable(void); +extern void l2x0_disable(void); #endif #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/include/asm/mach/keypad.h +++ linux-fsl-imx51-2.6.31/arch/arm/include/asm/mach/keypad.h @@ -0,0 +1,28 @@ +/* + * include/asm-arm/mach/keypad.h + * + * Generic Keypad struct + * + * Author: Armin Kuster + * + * 2005 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ + +#ifndef __ASM_MACH_KEYPAD_H_ +#define __ASM_MACH_KEYPAD_H_ + +#include + +struct keypad_data { + u16 rowmax; + u16 colmax; + u32 irq; + u16 delay; + u16 learning; + u16 *matrix; +}; + +#endif /* __ARM_MACH_KEYPAD_H_ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-pxa/em-x270.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-pxa/em-x270.c @@ -497,16 +497,15 @@ goto err_free_vbus_gpio; /* USB Hub power-on and reset */ - gpio_direction_output(usb_hub_reset, 0); + gpio_direction_output(usb_hub_reset, 1); + gpio_direction_output(GPIO9_USB_VBUS_EN, 0); regulator_enable(em_x270_usb_ldo); - gpio_set_value(usb_hub_reset, 1); gpio_set_value(usb_hub_reset, 0); + gpio_set_value(usb_hub_reset, 1); regulator_disable(em_x270_usb_ldo); regulator_enable(em_x270_usb_ldo); - gpio_set_value(usb_hub_reset, 1); - - /* enable VBUS */ - gpio_direction_output(GPIO9_USB_VBUS_EN, 1); + gpio_set_value(usb_hub_reset, 0); + gpio_set_value(GPIO9_USB_VBUS_EN, 1); return 0; --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-pxa/sharpsl_pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-pxa/sharpsl_pm.c @@ -678,8 +678,8 @@ dev_dbg(sharpsl_pm.dev, "User triggered wakeup in offline charger.\n"); } - if ((!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) || (sharpsl_fatal_check() < 0) ) - { + if ((!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_LOCK)) || + (!sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_FATAL))) { dev_err(sharpsl_pm.dev, "Fatal condition. Suspend.\n"); corgi_goto_sleep(alarm_time, alarm_enable, state); return 1; --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-pxa/cpufreq-pxa2xx.c @@ -155,7 +155,7 @@ static pxa_freqs_t pxa27x_freqs[] = { {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, - {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 }, + {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 }, {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/wdog.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/wdog.c @@ -0,0 +1,68 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file plat-mxc/wdog.c + * @brief This file contains watchdog timer implementations. + * + * This file contains watchdog timer implementations for timer tick. + * + * @ingroup WDOG + */ + +#include +#include +#include +#include +#include +#include +#include + +#define WDOG_WT 0x8 /* WDOG WT starting bit inside WCR */ +#define WCR_WOE_BIT (1 << 6) +#define WCR_WDA_BIT (1 << 5) +#define WCR_SRS_BIT (1 << 4) +#define WCR_WRE_BIT (1 << 3) +#define WCR_WDE_BIT (1 << 2) +#define WCR_WDBG_BIT (1 << 1) +#define WCR_WDZST_BIT (1 << 0) + +/* + * WatchDog + */ +#define WDOG_WCR 0 /* 16bit watchdog control reg */ +#define WDOG_WSR 2 /* 16bit watchdog service reg */ +#define WDOG_WRSR 4 /* 16bit watchdog reset status reg */ + +/*! + * The base addresses for the WDOG modules + */ +static void __iomem *wdog_base[2] = { + IO_ADDRESS(WDOG1_BASE_ADDR), +#ifdef WDOG2_BASE_ADDR + IO_ADDRESS(WDOG2_BASE_ADDR), +#endif +}; + +void mxc_wd_reset(void) +{ + u16 reg; + struct clk *clk; + + clk = clk_get(NULL, "wdog_clk"); + clk_enable(clk); + + reg = __raw_readw(wdog_base[0] + WDOG_WCR) & ~WCR_SRS_BIT; + reg |= WCR_WDE_BIT; + __raw_writew(reg, wdog_base[0] + WDOG_WCR); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/cpu_common.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/cpu_common.c @@ -0,0 +1,84 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +extern int mxc_early_serial_console_init(char *); + +/*! + * @file plat-mxc/cpu_common.c + * + * @brief This file contains the common CPU initialization code. + * + * @ingroup MSL_MX31 MSL_MXC91321 + */ + +static void __init system_rev_setup(char **p) +{ + system_rev = simple_strtoul(*p, NULL, 16); +} + +__early_param("system_rev=", system_rev_setup); + +int mxc_jtag_enabled; /* OFF: 0 (default), ON: 1 */ + +/* + * Here are the JTAG options from the command line. By default JTAG + * is OFF which means JTAG is not connected and WFI is enabled + * + * "on" -- JTAG is connected, so WFI is disabled + * "off" -- JTAG is disconnected, so WFI is enabled + */ + +static void __init jtag_wfi_setup(char **p) +{ + if (memcmp(*p, "on", 2) == 0) { + mxc_jtag_enabled = 1; + *p += 2; + } else if (memcmp(*p, "off", 3) == 0) { + mxc_jtag_enabled = 0; + *p += 3; + } +} + +__early_param("jtag=", jtag_wfi_setup); + +void __init mxc_cpu_common_init(void) +{ + mxc_set_cpu_type((((system_rev >> 20) & 0xF) * 10) + ((system_rev >> 16) & 0xF)); + pr_info("CPU is %s%x Revision %u.%u\n", + (mxc_cpu() < 0x100) ? "i.MX" : "MXC", + mxc_cpu(), mxc_cpu_rev_major(), mxc_cpu_rev_minor()); +} + +/** + * early_console_setup - setup debugging console + * + * Consoles started here require little enough setup that we can start using + * them very early in the boot process, either right after the machine + * vector initialization, or even before if the drivers can detect their hw. + * + * Returns non-zero if a console couldn't be setup. + * This function is developed based on + * early_console_setup function as defined in arch/ia64/kernel/setup.c + */ +void __init early_console_setup(char *cmdline) +{ +#ifdef CONFIG_SERIAL_MXC_CONSOLE + mxc_early_serial_console_init(cmdline); +#endif +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/dptc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/dptc.c @@ -0,0 +1,621 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dptc.c + * + * @brief Driver for the Freescale Semiconductor MXC DPTC module. + * + * The DPTC driver is designed to control the MXC DPTC hardware. + * hardware. Upon initialization, the DPTC driver initializes the DPTC hardware + * sets up driver nodes attaches to the DPTC interrupt and initializes internal + * data structures. When the DPTC interrupt occurs the driver checks the cause + * of the interrupt (lower frequency, increase frequency or emergency) and changes + * the CPU voltage according to translation table that is loaded into the driver. + * The driver read method is used to read the log buffer. + * Driver ioctls are used to change driver parameters and enable/disable the + * DVFS operation. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +enum { + DPTC_PTVAI_NOCHANGE = 0x0, + DPTC_PTVAI_DECREASE, + DPTC_PTVAI_INCREASE, + DPTC_PTVAI_EMERG, +}; + +struct device *dev_data0; +struct device *dev_data1; + +/*! + * In case the MXC device has multiple DPTC modules, this structure is used to + * store information specific to each DPTC module. + */ +struct dptc_device { + /* DPTC delayed work */ + struct delayed_work dptc_work; + /* DPTC spinlock */ + spinlock_t lock; + /* DPTC regulator */ + struct regulator *dptc_reg; + /* DPTC clock */ + struct clk *dptc_clk; + /* DPTC is active flag */ + int dptc_is_active; + /* turbo mode active flag */ + int turbo_mode_active; + /* DPTC current working point */ + int curr_wp; + /* DPTC vai bits */ + u32 ptvai; + /* The interrupt number used by the DPTC device */ + int irq; + /* DPTC platform data pointer */ + struct mxc_dptc_data *dptc_platform_data; +}; + +static void update_dptc_wp(struct dptc_device *drv_data, u32 wp) +{ + struct mxc_dptc_data *dptc_data = drv_data->dptc_platform_data; + int voltage_uV; + int ret = 0; + + voltage_uV = dptc_data->dptc_wp_allfreq[wp].voltage * 1000; + + __raw_writel(dptc_data->dptc_wp_allfreq[wp].dcvr0, + dptc_data->dcvr0_reg_addr); + __raw_writel(dptc_data->dptc_wp_allfreq[wp].dcvr1, + dptc_data->dcvr0_reg_addr + 0x4); + __raw_writel(dptc_data->dptc_wp_allfreq[wp].dcvr2, + dptc_data->dcvr0_reg_addr + 0x8); + __raw_writel(dptc_data->dptc_wp_allfreq[wp].dcvr3, + dptc_data->dcvr0_reg_addr + 0xC); + + /* Set the voltage */ + ret = regulator_set_voltage(drv_data->dptc_reg, voltage_uV, voltage_uV); + if (ret < 0) + printk(KERN_DEBUG "COULD NOT SET VOLTAGE!!!!!\n"); + + pr_debug("dcvr0-3: 0x%x, 0x%x, 0x%x, 0x%x; vol: %d\n", + dptc_data->dptc_wp_allfreq[wp].dcvr0, + dptc_data->dptc_wp_allfreq[wp].dcvr1, + dptc_data->dptc_wp_allfreq[wp].dcvr2, + dptc_data->dptc_wp_allfreq[wp].dcvr3, + dptc_data->dptc_wp_allfreq[wp].voltage); +} + +static irqreturn_t dptc_irq(int irq, void *dev_id) +{ + struct device *dev = dev_id; + struct dptc_device *drv_data = dev->driver_data; + struct mxc_dptc_data *dptc_data = dev->platform_data; + u32 dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + u32 gpc_cntr = __raw_readl(dptc_data->gpc_cntr_reg_addr); + + gpc_cntr = (gpc_cntr & dptc_data->dptccr); + + if (gpc_cntr) { + drv_data->ptvai = + (dptccr & dptc_data->vai_mask) >> dptc_data->vai_offset; + pr_debug("dptc_irq: vai = 0x%x (0x%x)!!!!!!!\n", + drv_data->ptvai, dptccr); + + /* disable DPTC and mask its interrupt */ + dptccr = (dptccr & ~(dptc_data->dptc_enable_bit)) | + (dptc_data->irq_mask); + dptccr = (dptccr & ~(dptc_data->dptc_nvcr_bit)); + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); + + if (drv_data->turbo_mode_active == 1) + schedule_delayed_work(&drv_data->dptc_work, 0); + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +static void dptc_workqueue_handler(struct work_struct *work1) +{ + struct delayed_work *dptc_work_tmp = + container_of(work1, struct delayed_work, work); + struct dptc_device *drv_data = + container_of(dptc_work_tmp, struct dptc_device, dptc_work); + struct mxc_dptc_data *dptc_data = drv_data->dptc_platform_data; + u32 dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + switch (drv_data->ptvai) { + case DPTC_PTVAI_DECREASE: + drv_data->curr_wp++; + break; + case DPTC_PTVAI_INCREASE: + case DPTC_PTVAI_EMERG: + drv_data->curr_wp--; + if (drv_data->curr_wp < 0) { + /* already max voltage */ + drv_data->curr_wp = 0; + printk(KERN_WARNING "dptc: already maximum voltage\n"); + } + break; + + /* Unknown interrupt cause */ + default: + BUG(); + } + + if (drv_data->curr_wp > dptc_data->dptc_wp_supported + || drv_data->curr_wp < 0) { + panic("Can't support this working point: %d\n", + drv_data->curr_wp); + } + update_dptc_wp(drv_data, drv_data->curr_wp); + + /* Enable DPTC and unmask its interrupt */ + dptccr = (dptccr & ~(dptc_data->irq_mask)) | + dptc_data->dptc_nvcr_bit | dptc_data->dptc_enable_bit; + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); +} + +/* Start DPTC unconditionally */ +static int start_dptc(struct device *dev) +{ + struct mxc_dptc_data *dptc_data = dev->platform_data; + struct dptc_device *drv_data = dev->driver_data; + u32 dptccr; + unsigned long flags; + unsigned long clk_rate; + int voltage_uV; + + /* Get the voltage */ + voltage_uV = regulator_get_voltage(drv_data->dptc_reg); + drv_data->curr_wp = + (dptc_data->dptc_wp_allfreq[0].voltage - (voltage_uV / 1000)) / 25; + + update_dptc_wp(drv_data, drv_data->curr_wp); + + /* Set the voltage */ + spin_lock_irqsave(&drv_data->lock, flags); + + clk_rate = clk_get_rate(drv_data->dptc_clk); + + if (clk_rate < dptc_data->clk_max_val) + goto err; + + if (dptc_data->gpc_irq_bit != 0x0) { + /* Enable ARM domain frequency and/or voltage update needed + and enable ARM IRQ */ + __raw_writel(dptc_data->gpc_irq_bit | dptc_data->gpc_adu, + dptc_data->gpc_cntr_reg_addr); + } + + dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + /* Enable DPTC and unmask its interrupt */ + dptccr = ((dptccr & ~(dptc_data->irq_mask)) | dptc_data->enable_config); + + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); + + spin_unlock_irqrestore(&drv_data->lock, flags); + + drv_data->dptc_is_active = 1; + drv_data->turbo_mode_active = 1; + + pr_info("DPTC has been started \n"); + + return 0; + +err: + spin_unlock_irqrestore(&drv_data->lock, flags); + pr_info("DPTC is not enabled\n"); + return -1; +} + +/* Stop DPTC unconditionally */ +static void stop_dptc(struct device *dev) +{ + struct mxc_dptc_data *dptc_data = dev->platform_data; + struct dptc_device *drv_data = dev->driver_data; + u32 dptccr; + + dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + /* disable DPTC and mask its interrupt */ + dptccr = ((dptccr & ~(dptc_data->dptc_enable_bit)) | + dptc_data->irq_mask) & (~dptc_data->dptc_nvcr_bit); + + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); + + /* Restore Turbo Mode voltage to highest wp */ + update_dptc_wp(drv_data, 0); + drv_data->curr_wp = 0; + + regulator_put(drv_data->dptc_reg); + + pr_info("DPTC has been stopped\n"); +} + +/* + This function does not change the working point. It can be + called from an interrupt context. +*/ +void dptc_suspend(int id) +{ + struct mxc_dptc_data *dptc_data; + struct dptc_device *drv_data; + u32 dptccr; + + switch (id) { + case DPTC_GP_ID: + dptc_data = dev_data0->platform_data; + drv_data = dev_data0->driver_data; + break; + case DPTC_LP_ID: + if (dev_data1 == NULL) + return; + + dptc_data = dev_data1->platform_data; + drv_data = dev_data1->driver_data; + break; + /* Unknown DPTC ID */ + default: + return; + } + + if (!drv_data->dptc_is_active) + return; + + dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + /* Disable DPTC and mask its interrupt */ + dptccr = (dptccr & ~(dptc_data->dptc_enable_bit)) | dptc_data->irq_mask; + + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); +} +EXPORT_SYMBOL(dptc_suspend); + +/* + This function does not change the working point. It can be + called from an interrupt context. +*/ +void dptc_resume(int id) +{ + struct mxc_dptc_data *dptc_data; + struct dptc_device *drv_data; + u32 dptccr; + + switch (id) { + case DPTC_GP_ID: + dptc_data = dev_data0->platform_data; + drv_data = dev_data0->driver_data; + break; + case DPTC_LP_ID: + if (dev_data1 == NULL) + return; + + dptc_data = dev_data1->platform_data; + drv_data = dev_data1->driver_data; + break; + /* Unknown DPTC ID */ + default: + return; + } + + if (!drv_data->dptc_is_active) + return; + + __raw_writel(dptc_data->dptc_wp_allfreq[0].dcvr0, + dptc_data->dcvr0_reg_addr); + __raw_writel(dptc_data->dptc_wp_allfreq[0].dcvr1, + dptc_data->dcvr0_reg_addr + 0x4); + __raw_writel(dptc_data->dptc_wp_allfreq[0].dcvr2, + dptc_data->dcvr0_reg_addr + 0x8); + __raw_writel(dptc_data->dptc_wp_allfreq[0].dcvr3, + dptc_data->dcvr0_reg_addr + 0xC); + + dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + /* Enable DPTC and unmask its interrupt */ + dptccr = (dptccr & ~(dptc_data->irq_mask)) | dptc_data->dptc_enable_bit; + + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); +} +EXPORT_SYMBOL(dptc_resume); + +/*! + * This function is called to put the DPTC in a low power state. + * + */ +void dptc_disable(struct device *dev) +{ + struct dptc_device *drv_data = dev->driver_data; + + if (!(drv_data->dptc_is_active)) + return; + + stop_dptc(dev); + drv_data->dptc_is_active = 0; + drv_data->turbo_mode_active = 0; +} + +/*! + * This function is called to resume the DPTC from a low power state. + * + */ +int dptc_enable(struct device *dev) +{ + struct dptc_device *drv_data = dev->driver_data; + + if (drv_data->dptc_is_active) + return 0; + + return start_dptc(dev); +} + +static ssize_t dptc_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct dptc_device *drv_data = dev->driver_data; + + if (drv_data->dptc_is_active) + return sprintf(buf, "DPTC is enabled\n"); + else + return sprintf(buf, "DPTC is disabled\n"); +} + +static ssize_t dptc_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "0") != NULL) { + dptc_disable(dev); + } else if (strstr(buf, "1") != NULL) { + dptc_enable(dev); + } + + return size; +} + +static DEVICE_ATTR(enable, 0644, dptc_show, dptc_store); + +/*! + * This is the probe routine for the DPTC driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit mxc_dptc_probe(struct platform_device *pdev) +{ + struct dptc_device *dptc_device_data; + int ret = 0; + struct resource *res; + u32 dptccr = 0; + struct clk *ckih_clk; + struct mxc_dptc_data *dptc_data = pdev->dev.platform_data; + + if (dptc_data == NULL) { + printk(KERN_ERR "DPTC: Pointer to DPTC data is NULL\ + not started\n"); + return -1; + } + + dptc_device_data = kzalloc(sizeof(struct dptc_device), GFP_KERNEL); + if (!dptc_device_data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + ret = -ENODEV; + goto err1; + } + + /* + * Request the DPTC interrupt + */ + dptc_device_data->irq = platform_get_irq(pdev, 0); + if (dptc_device_data->irq < 0) { + ret = dptc_device_data->irq; + goto err1; + } + + ret = + request_irq(dptc_device_data->irq, dptc_irq, IRQF_SHARED, + pdev->name, &pdev->dev); + if (ret) { + printk(KERN_ERR "DPTC: Unable to attach to DPTC interrupt\n"); + goto err1; + } + + dptc_device_data->curr_wp = 0; + dptc_device_data->dptc_is_active = 0; + dptc_device_data->turbo_mode_active = 0; + dptc_device_data->ptvai = 0; + + dptccr = __raw_readl(dptc_data->dptccr_reg_addr); + + printk(KERN_INFO "DPTC mxc_dptc_probe()\n"); + + spin_lock_init(&dptc_device_data->lock); + + if (dptc_data->dptc_wp_allfreq == NULL) { + ckih_clk = clk_get(NULL, "ckih"); + if (cpu_is_mx31() & + (mxc_cpu_is_rev(CHIP_REV_2_0) < 0) & + (clk_get_rate(ckih_clk) == 27000000)) + printk(KERN_ERR "DPTC: DPTC not supported on TO1.x \ + & ckih = 27M\n"); + else + printk(KERN_ERR "DPTC: Pointer to DPTC table is NULL\ + not started\n"); + goto err1; + } + + dptc_device_data->dptc_reg = regulator_get(NULL, dptc_data->reg_id); + if (IS_ERR(dptc_device_data->dptc_reg)) { + clk_put(dptc_device_data->dptc_clk); + printk(KERN_ERR "%s: failed to get regulator\n", __func__); + goto err1; + } + + INIT_DELAYED_WORK(&dptc_device_data->dptc_work, dptc_workqueue_handler); + + /* Enable Reference Circuits */ + dptccr = (dptccr & ~(dptc_data->dcr_mask)) | dptc_data->init_config; + __raw_writel(dptccr, dptc_data->dptccr_reg_addr); + + ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_enable.attr); + if (ret) { + printk(KERN_ERR + "DPTC: Unable to register sysdev entry for dptc"); + goto err1; + } + + if (ret != 0) { + printk(KERN_ERR "DPTC: Unable to start"); + goto err1; + } + + dptc_device_data->dptc_clk = clk_get(NULL, dptc_data->clk_id); + + if (pdev->id == 0) + dev_data0 = &pdev->dev; + else + dev_data1 = &pdev->dev; + + dptc_device_data->dptc_platform_data = pdev->dev.platform_data; + + /* Set driver data */ + platform_set_drvdata(pdev, dptc_device_data); + + return 0; + +err1: + dev_err(&pdev->dev, "Failed to probe DPTC\n"); + kfree(dptc_device_data); + return ret; +} + +/*! + * This function is called to put DPTC in a low power state. + * + * @param pdev the device structure + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_dptc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct dptc_device *drv_data = pdev->dev.driver_data; + + if (drv_data->dptc_is_active) + stop_dptc(&pdev->dev); + + return 0; +} + +/*! + * This function is called to resume the MU from a low power state. + * + * @param dev the device structure + * @param level the stage in device suspension process that we want the + * device to be put in + * + * @return The function always returns 0. + */ +static int mxc_dptc_resume(struct platform_device *pdev) +{ + struct dptc_device *drv_data = pdev->dev.driver_data; + + if (drv_data->dptc_is_active) + return start_dptc(&pdev->dev); + + return 0; +} + +static struct platform_driver mxc_dptc_driver = { + .driver = { + .name = "mxc_dptc", + .owner = THIS_MODULE, + }, + .probe = mxc_dptc_probe, + .suspend = mxc_dptc_suspend, + .resume = mxc_dptc_resume, +}; + +/*! + * This function is called to resume the MU from a low power state. + * + * @param dev the device structure used to give information on which MU + * device (0 through 3 channels) to suspend + * @param level the stage in device suspension process that we want the + * device to be put in + * + * @return The function always returns 0. + */ + +static int __init dptc_init(void) +{ + if (platform_driver_register(&mxc_dptc_driver) != 0) { + printk(KERN_ERR "mxc_dptc_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "DPTC driver module loaded\n"); + + return 0; +} + +static void __exit dptc_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&mxc_dptc_driver); + + printk("DPTC driver module unloaded\n"); +} + +module_init(dptc_init); +module_exit(dptc_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("DPTC driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/entry-pm.S +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/entry-pm.S @@ -0,0 +1,315 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file plat-mxc/entry-pm.S + * + * @brief This file contains common pm entry . + * + * @ingroup MXC_PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WAIT_MODE 111 +#define DOZE_MODE 112 +#define STOP_MODE 113 +#define DSM_MODE 114 + +#define PM_XLOAD_SIZE 0x04 +#define PM_XLOAD_ENTRY 0x08 +#define PM_XLOAD_SUSPEND_MODE 0x0C +#define PM_XLOAD_CORE_SP 0x10 + +#define PROCINFO_PROC_FNS 36 +#define PROC_FIN_FN 12 +#define PROC_IDLE_FN 20 + +#ifdef CONFIG_FIQ +#define ARM_CONTEXT_SIZE 12 +#else +#define ARM_CONTEXT_SIZE 8 +#endif + +#ifdef CONFIG_PM_VERBOSE +resume_str: + .string "Resume from DSM..." + .size resume_str, . - resume_str + +.macro show_resume_str + ldr r0, =resume_str + bl printk +.endm + +#else +.macro show_resume_str +.endm +#endif + + .data + .align 3 +arm_core_context: + .rept ARM_CONTEXT_SIZE + .long 0 + .endr + +#ifdef CONFIG_VFP + .text + .align 5 +arm_vfp_save: + mov ip, sp + stmdb sp!, {r0-r8, fp, ip, lr, pc} + sub fp, ip, #4 + mov r1, #THREAD_SIZE + sub r1, r1, #1 + bic r0, sp, r1 + ldr r8, [r0, #TI_CPU] + add r4, r0, #TI_VFPSTATE + + ldr r3, =last_VFP_context + VFPFMRX r2, FPEXC + tst r2, #FPEXC_EN + bne 1f + + ldr r4, [r3, r8, lsl #2] + cmp r4, #0 + beq dead_vfp +1: + bic r1, r2, #FPEXC_EN + VFPFMXR FPEXC, r1 + /*TODO: SMP */ + VFPFSTMIA r4, r1 + VFPFMRX r5, FPSCR + tst r2, #FPEXC_EX + VFPFMRX r6, FPINST, NE + tstne r2, #FPEXC_FP2V + VFPFMRX r7, FPINST2, NE + stmia r4, {r2, r5, r6, r7} + + mov r1, #0 + str r1, [r3, r8, lsl #2] +dead_vfp: + ldmia sp, {r0-r8, fp, sp, pc} +#endif +/* + * The function just be called in this file + * Current r0 ~r4 are not saved. + * Otherwise, the working registers should be saved + */ + .text + .align 5 +arm_core_save: + mov ip, sp + stmdb sp!, {r8, r9, sl, fp, ip, lr, pc} + sub fp, ip, #4 + ldr r0, =arm_core_context + mov r3, r0 + /* SVC mode */ + mrs r1, spsr @Save spsr + mrs r2, cpsr @Save cpsr + stmia r0!, {r1, r2} + /* Abort mode */ + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | ABT_MODE + stmia r0!, {sp} @Save stack pointer for abort mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | UND_MODE + stmia r0!, {sp} @Save stack pointer for undefine mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | IRQ_MODE + stmia r0!, {sp} @Save stack pointer for irq mode +#ifdef CONFIG_FIQ + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | FIQ_MODE + /*Save general register and sp for fiq mode*/ + stmia r0!, {r8-r9, sl, fp, ip, sp} +#endif + ldr r0, [r3, #4] + msr cpsr_c, r0 + ldmia sp, {r8-r9, sl, fp, sp, pc} + +/* + * The function just be called in this file + * Current r0 ~r4 are not saved. + * Otherwise, the working registers should be saved + */ +arm_core_restore: + mov ip, sp + stmdb sp!, {fp, ip, lr, pc} + sub fp, ip, #4 + ldr r0, =arm_core_context + mov r3, r0 + /* SVC mode */ + add r0, r0, #8 @skip svc mode + /* Abort mode */ + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | ABT_MODE + ldmia r0!, {sp} @restore stack pointer for abort mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | UND_MODE + ldmia r0!, {sp} @restore stack pointer for undefine mode + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | IRQ_MODE + ldmia r0!, {sp} @restore stack pointer for irq mode +#ifdef CONFIG_FIQ + msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | FIQ_MODE + /*Save general register and sp for fiq mode*/ + ldmia r0!, {r8-r9, sl, fp, ip, sp} +#endif + ldmia r3!, {r1, r2} + msr cpsr, r2 @restore cpsr + msr spsr, r1 @restore spsr + ldmia sp, {fp, sp, pc} + +mxc_cp15_context: + .rept 16 + .long 0 + .endr + + .align 5 +mxc_cp15_restore: + /* Physical address */ + adr r0, mxc_cp15_context + ldmia r0, {r1-r9} +#ifndef CONFIG_PM_DEBUG + @Add dynamic check to skip this block when debug + sub lr, lr, #PHYS_OFFSET + add lr, lr, #PAGE_OFFSET +#endif + mcr p15, 0, r3, c1, c0, 2 @CP Access Register + mcr p15, 0, r2, c1, c0, 1 @Aux Control register + +#ifndef CONFIG_PM_DEBUG + mcr p15, 0, r0, c7, c5, 6 @flush BTAC/BTB + mcr p15, 0, r0, c7, c7, 0 @invalidate both caches + mcr p15, 0, r0, c8, c7, 0 @Inval TLBs +#endif + + mcr p15, 0, r4, c13, c0, 0 @PID + mcr p15, 0, r5, c13, c0, 1 @Context ID + + mcr p15, 0, r6, c3, c0, 0 @Domain Access Register + mcr p15, 0, r7, c2, c0, 0 @TTB0 + mcr p15, 0, r8, c2, c0, 1 @TTB1 + mcr p15, 0, r9, c2, c0, 2 @TTBC + + mcr p15, 0, r1, c1, c0, 0 @Control Register + /* mcu enabled */ + mrc p15, 0, r0, c2, c0, 0 + + mov pc, lr + nop + nop + nop + nop + nop + nop + nop + nop + +mxc_cp15_save: + mov ip, sp + stmdb sp!, {r8-r9, fp, ip, lr, pc} + sub fp, ip, #4 + ldr r0, =mxc_cp15_context +/* System Control Registers */ + mrc p15, 0, r1, c1, c0, 0 @Control Register + mrc p15, 0, r2, c1, c0, 1 @Aux Control Register + mrc p15, 0, r3, c1, c0, 2 @CP access Register + +/* Memory management Registers */ + mrc p15, 0, r4, c13, c0, 0 @PID + mrc p15, 0, r5, c13, c0, 1 @Context ID + + mrc p15, 0, r6, c3, c0, 0 @Domain Access Register + + mrc p15, 0, r7, c2, c0, 0 @TTB0 + mrc p15, 0, r8, c2, c0, 1 @TTB1 + mrc p15, 0, r9, c2, c0, 2 @TTBC + stmia r0, {r1-r9} + ldmia sp, {r8, r9, fp, sp, pc} + +/* + * int __mxc_pm_arch_entry(u32 entry, u32 size) + */ + .align 5 + .globl mxc_pm_arch_entry +mxc_pm_arch_entry: + mov ip, sp + stmdb sp!, {r4-r9, sl, fp, ip, lr, pc} + sub fp, ip, #4 + sub sp, sp, #4 + mov r8, r0 @save entry + mov r9, r1 @save entry size +#ifdef CONFIG_VFP + bl arm_vfp_save +#endif + /* r0 ~r3, ip is dirty*/ + bl arm_core_save @save arm context + bl mxc_cp15_save + mov r0, sp + mov r1, r8 @restore entry + mov r2, r9 @restore entry size + bl __mxc_pm_xload_setup +1: bl cpu_v6_proc_fin + bl cpu_v6_do_idle + nop + nop + nop + nop +__mxc_pm_arch_leave: + adr r0, __mxc_pm_xload_info + ldr sp, [r0, #PM_XLOAD_CORE_SP] + +#ifndef CONFIG_PM_DEBUG + sub sp, sp, #PAGE_OFFSET + add sp, sp, #PHYS_OFFSET +#endif + bl mxc_cp15_restore +#ifndef CONFIG_PM_DEBUG + sub sp, sp, #PHYS_OFFSET + add sp, sp, #PAGE_OFFSET +#endif + show_resume_str + bl arm_core_restore + ldmib sp, {r4-r9, sl, fp, sp, pc} + +__mxc_pm_xload_info: + adr pc, __mxc_pm_xload_entry @Jump instruction + .long __mxc_pm_xload_end - __mxc_pm_xload_info @loader size + .long (__mxc_pm_arch_leave - PAGE_OFFSET + PHYS_OFFSET) @resume entry + .long 0 @suspend state + .long 0 @Core Stack pointer +__mxc_pm_xload_entry: + adr r0, __mxc_pm_xload_info + ldr pc, [r0, #PM_XLOAD_ENTRY] +__mxc_pm_xload_end: + +/* + * __mxc_pm_xload_setup(u32 sp, u32 entry, u32 size) + * r0~r6 is dirty + */ +__mxc_pm_xload_setup: + ldr r3, =__mxc_pm_xload_info + str r0, [r3, #PM_XLOAD_CORE_SP] + ldr r4, [r3, #PM_XLOAD_SIZE] + cmp r2, r4 + blo 2f +1: ldr r5, [r3], #4 + str r5, [r1], #4 + subs r4, r4, #4 + bhi 1b + b 3f +2: str r3, [r1] +3: mov pc, lr --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/Kconfig @@ -22,9 +22,30 @@ config ARCH_MX3 bool "MX3-based" select CPU_V6 - select COMMON_CLKDEV +# select COMMON_CLKDEV help - This enables support for systems based on the Freescale i.MX3 family + This enables support for systems based on the Freescale i.MX31 and i.MX32 + +config ARCH_MX25 + bool "MX25-based" + select MX25_OPTIONS + help + This enables support for systems based on the Freescale i.MX25 + +config ARCH_MX35 + bool "MX35-based" + help + This enables support for systems based on Freescale i.MX35 + +config ARCH_MX37 + bool "MX37-based" + help + This enables support for systems based on Freescale i.MX37 + +config ARCH_MX51 + bool "MX51-based" + help + This enables support for systems based on Freescale i.MX51 endchoice @@ -32,8 +53,106 @@ source "arch/arm/mach-mx2/Kconfig" source "arch/arm/mach-mx3/Kconfig" +source "arch/arm/mach-mx25/Kconfig" +source "arch/arm/mach-mx35/Kconfig" +source "arch/arm/mach-mx37/Kconfig" +source "arch/arm/mach-mx51/Kconfig" + endmenu +config MXC_TZIC + bool + depends on ARCH_MXC + +config MXC_DSP_BRINGUP + bool + depends on ARCH_MXC + +config ARCH_HAS_EVTMON + bool + depends on ARCH_MXC + +config MXC_EMMA + bool + depends on ARCH_MXC + +config MXC_FB_IRAM + bool + depends on ARCH_MXC + +config DMA_ZONE_SIZE + int "DMA memory zone size" + range 0 64 + default 24 + help + This is the size in MB for the DMA zone. The DMA zone is used for + dedicated memory for large contiguous video buffers + +# set iff we need the 1504 transceiver code +config ISP1504_MXC + bool + select ISP1504_MXC_OTG if USB_GADGET && USB_EHCI_HCD && USB_OTG + default y if USB_EHCI_FSL_1504 || USB_GADGET_FSL_1504 + +config ISP1504_MXC_OTG + tristate + help + Support for USB OTG pin detect using the ISP1504 transceiver on MXC platforms. + +# set iff we need the UTMI transceiver code +config UTMI_MXC + bool + select UTMI_MXC_OTG if ARCH_MX25 && USB_GADGET && USB_EHCI_HCD && USB_OTG + default y if USB_EHCI_FSL_UTMI || USB_GADGET_FSL_UTMI + depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX37 || ARCH_MX51 + +config UTMI_MXC_OTG + tristate + help + Support for USB OTG pin detect using the UTMI transceiver on MXC platforms. + +# set iff we need the 1301 transceiver code +config ISP1301_MXC + bool + default y if USB_EHCI_FSL_1301 || USB_GADGET_FSL_1301 + select I2C_MXC + +# set iff we need the mx13783 transceiver code +config MC13783_MXC + bool + default y if USB_EHCI_FSL_MC13783 || USB_GADGET_FSL_MC13783 + select SPI_MXC + +choice + prompt "Select serial USB transceiver mode" + depends on ISP1301_MXC || MC13783_MXC + default MXC_USB_SU6 + +config MXC_USB_SU6 + bool "Single Ended Unidirectional Mode" + help + If you say yes to this option, the serial tranceiver operates in SU6 mode. + This option will work for either the Freescale MC13783 or Philips ISP1301 + transceiver. + +config MXC_USB_SB3 + bool "Single Ended Bidirectional Mode" + help + If you say yes to this option, the serial tranceiver operates in SB3 mode. + Not recommended for the Freescale MC13783. + +config MXC_USB_DU6 + bool "Differential Unidirectional Mode" + help + If you say yes to this option, the serial tranceiver operates in DU6 mode. + +config MXC_USB_DB4 + bool "Differential Bidirectional Mode" + help + If you say yes to this option, the serial tranceiver operates in DB4 mode. + +endchoice + config MXC_IRQ_PRIOR bool "Use IRQ priority" depends on ARCH_MXC @@ -56,6 +175,16 @@ bool depends on ARCH_MXC +config ARCH_HAS_RNGC + bool + depends on ARCH_MXC + config ARCH_MXC_IOMUX_V3 bool + +config MXC_DVFS_PER + bool "Enable DVFS Peripheral" + depends on ARCH_MX37 || ARCH_MX51 + help + Select this if you want to enable HW supported peripheral frequency scaling. endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/isp1301xc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/isp1301xc.c @@ -0,0 +1,290 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/* + * ISP1301 register addresses,all register of ISP1301 + * is one-byte length register + */ + +/* ISP1301: I2C device address */ +#define ISP1301_DEV_ADDR 0x2D + +/* ISP 1301 register set*/ +#define ISP1301_MODE_REG1_SET 0x04 +#define ISP1301_MODE_REG1_CLR 0x05 + +#define ISP1301_CTRL_REG1_SET 0x06 +#define ISP1301_CTRL_REG1_CLR 0x07 + +#define ISP1301_INT_SRC_REG 0x08 +#define ISP1301_INT_LAT_REG_SET 0x0a +#define ISP1301_INT_LAT_REG_CLR 0x0b +#define ISP1301_INT_FALSE_REG_SET 0x0c +#define ISP1301_INT_FALSE_REG_CLR 0x0d +#define ISP1301_INT_TRUE_REG_SET 0x0e +#define ISP1301_INT_TRUE_REG_CLR 0x0f + +#define ISP1301_CTRL_REG2_SET 0x10 +#define ISP1301_CTRL_REG2_CLR 0x11 + +#define ISP1301_MODE_REG2_SET 0x12 +#define ISP1301_MODE_REG2_CLR 0x13 + +#define ISP1301_BCD_DEV_REG0 0x14 +#define ISP1301_BCD_DEV_REG1 0x15 + +/* OTG Control register bit description */ +#define DP_PULLUP 0x01 +#define DM_PULLUP 0x02 +#define DP_PULLDOWN 0x04 +#define DM_PULLDOWN 0x08 +#define ID_PULLDOWN 0x10 +#define VBUS_DRV 0x20 +#define VBUS_DISCHRG 0x40 +#define VBUS_CHRG 0x80 + +/* Mode Control 1 register bit description */ +#define SPEED_REG 0x01 +#define SUSPEND_REG 0x02 +#define DAT_SE0 0x04 +#define TRANSP_EN 0x08 +#define BDIS_ACON_EN 0x10 +#define OE_INT_EN 0x20 +#define UART_EN 0x40 + +/* Mode Control 2 register bit description */ +#define SPD_SUSP_CTRL 0x02 +#define BI_DI 0x04 + +static int isp1301_attach(struct i2c_adapter *adapter); +static int isp1301_detach(struct i2c_client *client); + +static struct i2c_driver isp1301_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "isp1301 Client", + }, + .attach_adapter = isp1301_attach, + .detach_client = isp1301_detach, +}; + +static struct i2c_client isp1301_i2c_client = { + .name = "isp1301 I2C dev", + .addr = ISP1301_DEV_ADDR, + .driver = &isp1301_i2c_driver, +}; + +static unsigned short normal_i2c[] = { ISP1301_DEV_ADDR, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static int isp1301_detect_client(struct i2c_adapter *adapter, int address, + int kind) +{ + isp1301_i2c_client.adapter = adapter; + if (i2c_attach_client(&isp1301_i2c_client)) { + isp1301_i2c_client.adapter = NULL; + printk(KERN_ERR "isp1301_attach: i2c_attach_client failed\n"); + return -1; + } + + printk(KERN_INFO "isp1301 Detected\n"); + return 0; +} + +/*! + * isp1301 I2C attach function + * + * @param adapter struct i2c_adapter * + * @return Error code indicating success or failure + */ +static int isp1301_attach(struct i2c_adapter *adapter) +{ + return i2c_probe(adapter, &addr_data, &isp1301_detect_client); +} + +/*! + * isp1301 I2C detach function + * + * @param client struct i2c_client * + * @return Error code indicating success or failure + */ +static int isp1301_detach(struct i2c_client *client) +{ + int err; + + if (!isp1301_i2c_client.adapter) + return -1; + + err = i2c_detach_client(&isp1301_i2c_client); + isp1301_i2c_client.adapter = NULL; + + return err; +} + +static void isp1301_init(struct fsl_xcvr_ops *this) +{ + pr_debug("%s\n", __FUNCTION__); + + i2c_add_driver(&isp1301_i2c_driver); +} + +static void isp1301_uninit(struct fsl_xcvr_ops *this) +{ + // DDD do this for host only: + /* disable OTG VBUS */ + i2c_del_driver(&isp1301_i2c_driver); +} + +/* Write ISP1301 register*/ +static inline void isp1301_write_reg(char reg, char data) +{ + i2c_smbus_write_byte_data(&isp1301_i2c_client, reg, data); +} + +/* read ISP1301 register*/ +static inline char isp1301_read_reg(char reg) +{ + return i2c_smbus_read_byte_data(&isp1301_i2c_client, reg); +} + +/* set ISP1301 as USB host*/ +static inline void isp1301_set_serial_host(void) +{ + pr_debug("%s\n", __FUNCTION__); + + isp1301_write_reg(ISP1301_MODE_REG2_CLR, 0xFF); +#if defined(CONFIG_MXC_USB_SB3) || defined(CONFIG_MXC_USB_DB4) + isp1301_write_reg(ISP1301_MODE_REG2_SET, SPD_SUSP_CTRL | BI_DI); +#else + isp1301_write_reg(ISP1301_MODE_REG2_SET, SPD_SUSP_CTRL); +#endif + + isp1301_write_reg(ISP1301_MODE_REG1_CLR, 0xFF); +#if defined(CONFIG_MXC_USB_SB3) || defined(CONFIG_MXC_USB_SU6) + isp1301_write_reg(ISP1301_MODE_REG1_SET, DAT_SE0 | SPEED_REG); +#else + isp1301_write_reg(ISP1301_MODE_REG1_SET, SPEED_REG); +#endif + + /* configure transceiver for host mode */ + isp1301_write_reg(ISP1301_CTRL_REG1_SET, + (VBUS_DRV | DP_PULLDOWN | DM_PULLDOWN)); +} + +/* set ISP1301 as USB device */ +static inline void isp1301_set_serial_dev(void) +{ + pr_debug("%s\n", __FUNCTION__); + + isp1301_write_reg(ISP1301_MODE_REG2_CLR, 0xFF); +#if defined(CONFIG_MXC_USB_SB3) || defined(CONFIG_MXC_USB_DB4) + isp1301_write_reg(ISP1301_MODE_REG2_SET, SPD_SUSP_CTRL | BI_DI); +#else + isp1301_write_reg(ISP1301_MODE_REG2_SET, SPD_SUSP_CTRL); +#endif + + isp1301_write_reg(ISP1301_MODE_REG1_CLR, 0xFF); +#if defined(CONFIG_MXC_USB_SB3) || defined(CONFIG_MXC_USB_SU6) + isp1301_write_reg(ISP1301_MODE_REG1_SET, DAT_SE0 | SPEED_REG); +#else + isp1301_write_reg(ISP1301_MODE_REG1_SET, SPEED_REG); +#endif + + /* FS mode, DP pull down, DM pull down */ + isp1301_write_reg(ISP1301_CTRL_REG1_SET, + (DP_PULLDOWN | DM_PULLDOWN | DP_PULLUP)); +} + +static void isp1301_set_vbus_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on) +{ + pr_debug("%s(on=%d)\n", __FUNCTION__, on); + if (on) { + /* disable D+ pull-up */ + isp1301_write_reg(ISP1301_CTRL_REG1_CLR, DP_PULLUP); + /* enable D+ pull-down */ + isp1301_write_reg(ISP1301_CTRL_REG1_SET, DP_PULLDOWN); + /* turn on Vbus */ + isp1301_write_reg(ISP1301_CTRL_REG1_SET, VBUS_DRV); + } else { + /* D+ pull up, D- pull down */ + isp1301_write_reg(ISP1301_CTRL_REG1_SET, + (DP_PULLUP | DM_PULLDOWN)); + /* disable D- pull up, disable D+ pull down */ + isp1301_write_reg(ISP1301_CTRL_REG1_CLR, + (DM_PULLUP | DP_PULLDOWN)); + } +} + +/* + * Enable or disable the D+ pullup. + */ +static void isp1301_pullup(int on) +{ + pr_debug("%s(%d)\n", __func__, on); + + if (on) + isp1301_write_reg(ISP1301_CTRL_REG1_SET, DP_PULLUP); + else + isp1301_write_reg(ISP1301_CTRL_REG1_CLR, DP_PULLUP); +} + +static struct fsl_xcvr_ops isp1301_ops_otg = { + .name = "isp1301", + .xcvr_type = PORTSC_PTS_SERIAL, + .init = isp1301_init, + .uninit = isp1301_uninit, + .set_host = isp1301_set_serial_host, + .set_device = isp1301_set_serial_dev, + .set_vbus_power = isp1301_set_vbus_power, + .pullup = isp1301_pullup, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); + +static int __init isp1301xc_init(void) +{ + pr_debug("%s\n", __FUNCTION__); + + fsl_usb_xcvr_register(&isp1301_ops_otg); + + return 0; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +static void __exit isp1301xc_exit(void) +{ + fsl_usb_xcvr_unregister(&isp1301_ops_otg); +} + +module_init(isp1301xc_init); +module_exit(isp1301xc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("isp1301"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/spba.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/spba.c @@ -0,0 +1,133 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +/*! + * @file plat-mxc/spba.c + * + * @brief This file contains the SPBA API implementation details. + * + * @ingroup SPBA + */ + +static DEFINE_SPINLOCK(spba_lock); + +#define SPBA_MASTER_MIN 1 +#define SPBA_MASTER_MAX 7 + +/*! + * the base addresses for the SPBA modules + */ +static unsigned long spba_base = (unsigned long)IO_ADDRESS(SPBA_CTRL_BASE_ADDR); + +/*! + * SPBA clock + */ +static struct clk *spba_clk; +/*! + * This function allows the three masters (A, B, C) to take ownership of a + * shared peripheral. + * + * @param mod specified module as defined in \b enum \b #spba_module + * @param master one of more (or-ed together) masters as defined in \b enum \b #spba_masters + * + * @return 0 if successful; -1 otherwise. + */ +int spba_take_ownership(int mod, int master) +{ + unsigned long spba_flags; + __u32 rtn_val = -1; + + if (master < SPBA_MASTER_MIN || master > SPBA_MASTER_MAX) { + printk("spba_take_ownership() invalide master= %d\n", master); + BUG(); /* oops */ + } + + if (spba_clk == NULL) + spba_clk = clk_get(NULL, "spba_clk"); + + clk_enable(spba_clk); + + spin_lock_irqsave(&spba_lock, spba_flags); + __raw_writel(master, spba_base + mod); + + if ((__raw_readl(spba_base + mod) & MXC_SPBA_RAR_MASK) == master) { + rtn_val = 0; + } + + spin_unlock_irqrestore(&spba_lock, spba_flags); + + clk_disable(spba_clk); + return rtn_val; +} + +/*! + * This function releases the ownership for a shared peripheral. + * + * @param mod specified module as defined in \b enum \b #spba_module + * @param master one of more (or-ed together) masters as defined in \b enum \b #spba_masters + * + * @return 0 if successful; -1 otherwise. + */ +int spba_rel_ownership(int mod, int master) +{ + unsigned long spba_flags; + volatile unsigned long rar; + + if (master < SPBA_MASTER_MIN || master > SPBA_MASTER_MAX) { + printk("spba_take_ownership() invalide master= %d\n", master); + BUG(); /* oops */ + } + + if (spba_clk == NULL) + spba_clk = clk_get(NULL, "spba_clk"); + + clk_enable(spba_clk); + + if ((__raw_readl(spba_base + mod) & master) == 0) { + clk_disable(spba_clk); + return 0; /* does not own it */ + } + + spin_lock_irqsave(&spba_lock, spba_flags); + + /* Since only the last 3 bits are writeable, doesn't need to mask off + bits 31-3 */ + rar = __raw_readl(spba_base + mod) & (~master); + __raw_writel(rar, spba_base + mod); + + if ((__raw_readl(spba_base + mod) & master) != 0) { + spin_unlock_irqrestore(&spba_lock, spba_flags); + clk_disable(spba_clk); + return -1; + } + + spin_unlock_irqrestore(&spba_lock, spba_flags); + + clk_disable(spba_clk); + + return 0; +} + +EXPORT_SYMBOL(spba_take_ownership); +EXPORT_SYMBOL(spba_rel_ownership); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("SPBA"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/irq.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/irq.c @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -46,6 +47,11 @@ static void __iomem *avic_base; +#define IRQ_BIT(irq) (1 << (irq)) + +static uint32_t saved_wakeup_low, saved_wakeup_high; +static uint32_t suspend_wakeup_low, suspend_wakeup_high; + int imx_irq_set_priority(unsigned char irq, unsigned char prio) { #ifdef CONFIG_MXC_IRQ_PRIOR @@ -102,13 +108,122 @@ __raw_writel(irq, avic_base + AVIC_INTENNUM); } +/*! + * Set interrupt number "irq" in the AVIC as a wake-up source. + * + * @param irq interrupt source number + * @param enable enable as wake-up if equal to non-zero + * disble as wake-up if equal to zero + * + * @return This function returns 0 on success. + */ +static int mxc_set_wake_irq(unsigned int irq, unsigned int enable) +{ + uint32_t *wakeup_intr; + uint32_t irq_bit; + + if (irq < 32) { + wakeup_intr = &suspend_wakeup_low; + irq_bit = IRQ_BIT(irq); + } else { + wakeup_intr = &suspend_wakeup_high; + irq_bit = IRQ_BIT(irq - 32); + } + + if (enable) { + *wakeup_intr |= irq_bit; + } else { + *wakeup_intr &= ~irq_bit; + } + + return 0; +} + static struct irq_chip mxc_avic_chip = { .ack = mxc_mask_irq, .mask = mxc_mask_irq, .unmask = mxc_unmask_irq, + .set_wake = mxc_set_wake_irq, +}; + +#ifdef CONFIG_PM +/*! + * This function puts the AVIC in low-power mode/state. + * All the interrupts that are enabled are first saved. + * Only those interrupts which registers as a wake source by calling + * enable_irq_wake are enabled. All other interrupts are disabled. + * + * @param dev the system device structure used to give information + * on AVIC to suspend + * @param mesg the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_avic_suspend(struct sys_device *dev, pm_message_t mesg) +{ + saved_wakeup_high = __raw_readl(avic_base + AVIC_INTENABLEH); + saved_wakeup_low = __raw_readl(avic_base + AVIC_INTENABLEL); + + __raw_writel(suspend_wakeup_high, avic_base + AVIC_INTENABLEH); + __raw_writel(suspend_wakeup_low, avic_base + AVIC_INTENABLEL); + + return 0; +} + +/*! + * This function brings the AVIC back from low-power state. + * All the interrupts enabled before suspension are re-enabled from + * the saved information. + * + * @param dev the system device structure used to give information + * on AVIC to resume + * + * @return The function always returns 0. + */ +static int mxc_avic_resume(struct sys_device *dev) +{ + __raw_writel(saved_wakeup_high, avic_base + AVIC_INTENABLEH); + __raw_writel(saved_wakeup_low, avic_base + AVIC_INTENABLEL); + + return 0; +} + +#else +#define mxc_avic_suspend NULL +#define mxc_avic_resume NULL +#endif /* CONFIG_PM */ +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct sysdev_class mxc_avic_sysclass = { + .name = "mxc_irq", + .suspend = mxc_avic_suspend, + .resume = mxc_avic_resume, +}; + +/*! + * This structure represents AVIC as a system device. + * System devices follow a slightly different driver model. + * They don't need to do dynammic driver binding, can't be probed, + * and don't reside on any type of peripheral bus. + * So, it is represented and treated a little differently. + */ +static struct sys_device mxc_avic_device = { + .id = 0, + .cls = &mxc_avic_sysclass, }; /* + * This function is used to get the AVIC Lo and Hi interrupts + * that are enabled as wake up sources to wake up the core from suspend + */ +void mxc_get_wake_irq(u32 * wake_src[]) +{ + *wake_src[0] = __raw_readl(avic_base + AVIC_INTENABLEL); + *wake_src[1] = __raw_readl(avic_base + AVIC_INTENABLEH); +} + +/* * This function initializes the AVIC hardware and disables all the * interrupts. It registers the interrupt enable and disable functions * to the kernel for each interrupt source. @@ -142,14 +257,39 @@ for (i = 0; i < 8; i++) __raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); - /* init architectures chained interrupt handler */ - mxc_register_gpios(); #ifdef CONFIG_FIQ /* Initialize FIQ */ init_FIQ(); #endif + if (MXC_INT_FORCE >= 32) + __raw_writel(1 << (MXC_INT_FORCE & 31), avic_base + AVIC_INTFRCH); + else if (MXC_INT_FORCE >= 0) + __raw_writel(1 << MXC_INT_FORCE, avic_base + AVIC_INTFRCL); + printk(KERN_INFO "MXC IRQ initialized\n"); } +/*! + * This function registers AVIC hardware as a system device. + * System devices will only be suspended with interrupts disabled, and + * after all other devices have been suspended. On resume, they will be + * resumed before any other devices, and also with interrupts disabled. + * + * @return This function returns 0 on success. + */ +static int __init mxc_avic_sysinit(void) +{ + int ret = 0; + + ret = sysdev_class_register(&mxc_avic_sysclass); + if (ret == 0) { + ret = sysdev_register(&mxc_avic_device); + } + + return ret; +} + +arch_initcall(mxc_avic_sysinit); + --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/dma_mx2.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/dma_mx2.c @@ -0,0 +1,1316 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* Front-end to the DMA handling. This handles the allocation/freeing + * of DMA channels, and provides a unified interface to the machines + * DMA facilities. + */ + +/*! + * @file plat-mxc/dma_mx2.c + * @brief This file contains functions for DMA API + * + * @ingroup DMA_MX27 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include + +/* commented temperily for mx27 compilation +#define DMA_PM +*/ +#ifdef DMA_PM +#include +#include +struct apmc_user *dma_apmc_user; +struct pm_dev *dma_pm; +#define DMA_PMST_RESUME 0 +#define DMA_PMST_STANDBY 1 +#define DMA_PMST_SUSPEND 2 +static unsigned int dma_pm_status = DMA_PMST_RESUME; +#endif + +/*! + * This variable is used to controll the clock of DMA. + * It counts the number of actived channels + */ +static atomic_t g_dma_actived = ATOMIC_INIT(0); + +/*! + * This variable point a proc file which contains the information + * of DMA channels + */ +static struct proc_dir_entry *g_proc_dir; + +/*! + * The dma channels + */ +static mxc_dma_channel_t g_dma_channels[MAX_DMA_CHANNELS]; +static mx2_dma_priv_t g_dma_privates[MXC_DMA_CHANNELS]; +static mx2_dma_bd_t g_dma_bd_table[MXC_DMA_CHANNELS][MAX_BD_SIZE]; + +static DEFINE_SPINLOCK(dma_list_lock); + +static struct clk *dma_clk; + +/*!@brief flush buffer descriptor ring*/ +#define flush_dma_bd(private) \ + { \ + atomic_set(&(private->bd_used), 0); \ + private->bd_rd = private->bd_wr;\ + } + +/*!@brief get next buffer discriptor */ +#define next_dma_bd(private) \ + ({ \ + int bd_next = (private->bd_rd+1)%MAX_BD_SIZE; \ + (bd_next == private->bd_wr) ? NULL: private->bd_ring+bd_next;\ + }) + +static inline int consume_dma_bd(mxc_dma_channel_t * dma, int error); +/*! + *@brief allocate a dma channel. + * + *@param idx Requested channel NO. + * @li MXC_INVLAID_CHANNEL System allocates a free channel which is not statically allocated. + * @li Others User requests a specific channel + *@return @li MXC_INVLAID_CHANNEL Failure + * @li Others Success + */ +static inline int get_dma_channel(int idx) +{ + int i; + mxc_dma_channel_t *p; + + if ((idx >= MAX_DMA_CHANNELS) && (idx != MXC_DMA_DYNAMIC_CHANNEL)) { + return -1; + } + if (idx != MXC_DMA_DYNAMIC_CHANNEL) { + p = g_dma_channels + idx; + BUG_ON(p->dynamic != 0); + if (xchg(&p->lock, 1) != 0) { + return -1; + } + return idx; + } + + p = g_dma_channels; + for (i = 0; (i < MAX_DMA_CHANNELS); i++, p++) { + if (p->dynamic && (xchg(&p->lock, 1) == 0)) { + return i; + } + } + return -1; +} + +/*! + *@brief release a dma channel. + * + *@param idx channel number + *@return none; + */ +static inline void put_dma_channel(int idx) +{ + mxc_dma_channel_t *p; + + if ((idx < MAX_DMA_CHANNELS) && (idx >= 0)) { + p = g_dma_channels + idx; + (void)xchg(&p->lock, 0); + } +} + +/*! + *@brief Get dma list for /proc/dma + */ +static int mxc_get_dma_list(char *buf) +{ + mxc_dma_channel_t *dma; + char *p = buf; + int i; + + for (i = 0, dma = g_dma_channels; i < MAX_DMA_CHANNELS; i++, dma++) { + if (dma->lock) { + p += sprintf(p, "dma channel %2d: %s\n", i, + dma->dev_name ? dma->dev_name : "unknown"); + } else { + p += sprintf(p, "dma channel %2d: unused\n", i); + } + } + + return p - buf; +} + +/*!@brief save the mask of dma interrupts*/ +#define save_dma_interrupt(flags) \ + flags = __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DIMR) + +/*!@brief restore the mask of dma interrupts*/ +#define restore_dma_interrupt(flags) \ + __raw_writel(flags, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DIMR) + +/*!@brief disable interrupt of dma channel*/ +static inline void mask_dma_interrupt(int channel) +{ + unsigned long reg; + save_dma_interrupt(reg); + reg |= 1 << channel; /*mask interrupt; */ + restore_dma_interrupt(reg); +} + +/*!@brief enable interrupt of dma channel */ +static inline void unmask_dma_interrupt(int channel) +{ + unsigned long reg; + save_dma_interrupt(reg); + reg &= ~(1 << channel); /*unmask interrupt; */ + restore_dma_interrupt(reg); +} + +/*!@brief get interrupt event of dma channel */ +static unsigned long inline __get_dma_interrupt(int channel) +{ + unsigned long mode; + mode = 0; + if (__raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DISR) & (1 << channel)) + mode |= DMA_DONE; + + if (__raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBTOSR) & + (1 << channel)) + mode |= DMA_BURST_TIMEOUT; + if (__raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DSESR) & (1 << channel)) + mode |= DMA_TRANSFER_ERROR; + + if (__raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBOSR) & (1 << channel)) + mode |= DMA_BUFFER_OVERFLOW; + if (__raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DRTOSR) & + (1 << channel)) + mode |= DMA_REQUEST_TIMEOUT; + return mode; +} + +/*! + *@brief clean all event of dma interrupt and return the valid event. + */ +static unsigned long inline __clear_dma_interrupt(int channel) +{ + unsigned long mode; + mode = __get_dma_interrupt(channel); + __raw_writel(1 << channel, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DISR); + __raw_writel(1 << channel, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBTOSR); + __raw_writel(1 << channel, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DRTOSR); + __raw_writel(1 << channel, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DSESR); + __raw_writel(1 << channel, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBOSR); + + return mode; +} + +/*!@brief This function enables dma clocks without lock */ +static void inline __enable_dma_clk(void) +{ + unsigned long reg; + clk_enable(dma_clk); + reg = __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR); + reg |= 0x1; + __raw_writel(reg, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR); +} + +/*!@brief This function disables dma clocks without lock */ +static void inline __disable_dma_clk(void) +{ + unsigned long reg; + reg = __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR); + reg &= ~0x1; + __raw_writel(reg, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR); + clk_disable(dma_clk); +} + +/*!@brief This function enables dma clocks with lock */ +static void inline enable_dma_clk(void) +{ + unsigned long flags; + spin_lock_irqsave(&dma_list_lock, flags); + if (atomic_read(&g_dma_actived) == 0) { + __enable_dma_clk(); + } + spin_unlock_irqrestore(&dma_list_lock, flags); + return; +} + +/*!@brief This function disables dma clocks without locked */ +static void inline disable_dma_clk(void) +{ + unsigned long flags; + spin_lock_irqsave(&dma_list_lock, flags); + if (atomic_read(&g_dma_actived) == 0) { + __disable_dma_clk(); + } + spin_unlock_irqrestore(&dma_list_lock, flags); + return; +} + +/*!@brief select a buffer to transfer and + * setup dma channel for current transfer + */ +static void setup_dmac(mxc_dma_channel_t * dma) +{ + mx2_dma_priv_t *priv = (mx2_dma_priv_t *) dma->private; + dma_regs_t *dma_base = (dma_regs_t *) (priv->dma_base); + mx2_dma_bd_t *p, *q; + unsigned long ctrl_val; + + if (dma->active == 0) { + printk(KERN_ERR + "dma channel %d is not enabled, when receiving this channel 's interrupt\n", + dma->channel); + return; + } + if (atomic_read(&(priv->bd_used)) <= 0) { + printk(KERN_ERR "dma channel %d is empty\n", dma->channel); + dma->active = 0; + atomic_dec(&g_dma_actived); + return; + } + /* BUSY: transfering + * PEND: Wait for set to DMAC. + * s1: no transfering: + * set first(one BUSY). if there are more than one tranfer. set second &repeat is enabled(two BUSY). + * + * s2: transfering & just on transfer + * one BUSY. set the tranesfer and set repeat bit(two BUSY) + * s3: transfering & repeat has set + * has two BUSY. + */ + p = priv->bd_ring + priv->bd_rd; + q = next_dma_bd(priv); + if (!(p->state & DMA_BD_ST_BUSY)) { + /*NOTICE:: This is first buffer or dma chain does not support chain-buffer. So CEN must clear & set again */ + ctrl_val = + __raw_readl(&(dma_base->Ctl)) & + (~(DMA_CTL_ACRPT | DMA_CTL_RPT | DMA_CTL_CEN)); + __raw_writel(ctrl_val, &(dma_base->Ctl)); + if (p->mode != dma->mode) { + dma->mode = p->mode; /* bi-dir channel do mode change */ + if (dma->mode == MXC_DMA_MODE_READ) { + DMA_CTL_SET_SMOD(ctrl_val, + priv->dma_info->sourceType); + DMA_CTL_SET_SSIZ(ctrl_val, + priv->dma_info->sourcePort); + DMA_CTL_SET_DMOD(ctrl_val, + priv->dma_info->destType); + DMA_CTL_SET_DSIZ(ctrl_val, + priv->dma_info->destPort); + } else { + DMA_CTL_SET_SMOD(ctrl_val, + priv->dma_info->destType); + DMA_CTL_SET_SSIZ(ctrl_val, + priv->dma_info->destPort); + DMA_CTL_SET_DMOD(ctrl_val, + priv->dma_info->sourceType); + DMA_CTL_SET_DSIZ(ctrl_val, + priv->dma_info->sourcePort); + } + } + __raw_writel(p->src_addr, &(dma_base->SourceAddr)); + __raw_writel(p->dst_addr, &(dma_base->DestAddr)); + __raw_writel(p->count, &(dma_base->Count)); + p->state |= DMA_BD_ST_BUSY; + p->state &= ~(DMA_BD_ST_PEND); + ctrl_val |= DMA_CTL_CEN; + __raw_writel(ctrl_val, &(dma_base->Ctl)); + if (q && priv->dma_chaining) { /*DO chain-buffer */ + __raw_writel(q->src_addr, &(dma_base->SourceAddr)); + __raw_writel(q->dst_addr, &(dma_base->DestAddr)); + __raw_writel(q->count, &(dma_base->Count)); + q->state |= DMA_BD_ST_BUSY; + q->state &= ~(DMA_BD_ST_PEND); + ctrl_val |= DMA_CTL_ACRPT | DMA_CTL_RPT | DMA_CTL_CEN; + __raw_writel(ctrl_val, &(dma_base->Ctl)); + } + } else { /* Just dma channel which supports dma buffer can run to there */ + BUG_ON(!priv->dma_chaining); + if (q) { /* p is tranfering, then q must be set into dma controller */ + /*WARNING:: [1] dangerous area begin. + * If the p is completed during MCU run in this erea, the dma channel is crashed. + */ + __raw_writel(q->src_addr, &(dma_base->SourceAddr)); + __raw_writel(q->dst_addr, &(dma_base->DestAddr)); + __raw_writel(q->count, &(dma_base->Count)); + /*WARNING:: [2] dangerous area end */ + ctrl_val = + __raw_readl(&(dma_base->Ctl)) | (DMA_CTL_ACRPT | + DMA_CTL_RPT | + DMA_CTL_CEN); + __raw_writel(ctrl_val, &(dma_base->Ctl)); + + /* WARNING:: This is workaround and it is dangerous: + * the judgement is not safety. + */ + if (!__get_dma_interrupt(dma->channel)) { + q->state |= DMA_BD_ST_BUSY; + q->state &= ~(DMA_BD_ST_PEND); + } else { + /*Waiting re-enable is in ISR */ + printk(KERN_ERR + "Warning:: The privous transfer is completed. Maybe the chain buffer is stopped."); + } + } else { /* Last buffer is transfering: just clear RPT bit */ + ctrl_val = + __raw_readl(&(dma_base->Ctl)) & + (~(DMA_CTL_ACRPT | DMA_CTL_RPT)); + __raw_writel(ctrl_val, &(dma_base->Ctl)); + } + } +} + +/*! + * @brief interrupt handler of dma channel + */ +static irqreturn_t dma_irq_handler(int irq, void *dev_id) +{ + mxc_dma_channel_t *dma = (mxc_dma_channel_t *) dev_id; + mx2_dma_priv_t *priv = (mx2_dma_priv_t *) (dma ? dma->private : NULL); + dma_regs_t *dma_base; + int state, error = MXC_DMA_DONE; + + BUG_ON(priv == NULL); + + dma_base = (dma_regs_t *) priv->dma_base; + + state = __clear_dma_interrupt(dma->channel); + + priv->trans_bytes += dma_base->transferd; + if (state != DMA_DONE) { + if (state & DMA_REQUEST_TIMEOUT) { + error = MXC_DMA_REQUEST_TIMEOUT; + } else { + error = MXC_DMA_TRANSFER_ERROR; + } + } + if (consume_dma_bd(dma, error)) { + disable_dma_clk(); + if (dma->cb_fn) { + dma->cb_fn(dma->cb_args, error, priv->trans_bytes); + } + priv->trans_bytes = 0; + } else { + disable_dma_clk(); + } + return IRQ_HANDLED; +} + +/*! + *@brief Set DMA channel parameters + * + *@param dma Requested channel NO. + *@param dma_info Channel configuration + *@return @li 0 Success + * @li others Failure + */ +static int setup_dma_channel(mxc_dma_channel_t * dma, mx2_dma_info_t * dma_info) +{ + mx2_dma_priv_t *priv = (mx2_dma_priv_t *) (dma ? dma->private : NULL); + dma_regs_t *dma_base; + unsigned long reg; + + if (!dma_info || !priv) { + return -1; + } + + if (dma_info->sourceType > 3) { + return -1; + } + if (dma_info->destType > 3) { + return -1; + } + if (dma_info->destPort > 3) { + return -1; + } + if (dma_info->sourcePort > 3) { + return -1; + } + if (dma_info->M2D_Valid) { + /*add for second dma */ + if (dma_info->W < dma_info->X) { + return -1; + } + } + + priv->dma_chaining = dma_info->dma_chaining; + priv->ren = dma_info->ren; + + if (dma_info->sourceType != DMA_TYPE_FIFO + && dma_info->destType != DMA_TYPE_FIFO) { + if (dma_info->ren) { + printk(KERN_INFO + "Warning:request enable just affect source or destination port is FIFO !\n"); + priv->ren = 0; + } + } + + if (dma_info->M2D_Valid) { + if (dma_info->msel) { + __raw_writel(dma_info->W, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_WSRB); + __raw_writel(dma_info->X, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_XSRB); + __raw_writel(dma_info->Y, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_YSRB); + + } else { + __raw_writel(dma_info->W, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_WSRA); + __raw_writel(dma_info->X, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_XSRA); + __raw_writel(dma_info->Y, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_YSRA); + } + } + + dma_base = (dma_regs_t *) (priv->dma_base); + + __raw_writel(dma_info->burstLength, &(dma_base->BurstLength)); + __raw_writel(dma_info->request, &(dma_base->RequestSource)); + + if (dma_info->ren) { + reg = dma_info->busuntils & 0x1FFFF; + if (dma_info->rto_en) { + reg |= 0xE000; + } + __raw_writel(reg, &(dma_base->BusUtilt)); + } else { + __raw_writel(dma_info->busuntils, &(dma_base->BusUtilt)); + } + + reg = __raw_readl(&(dma_base->Ctl)) & (~(DMA_CTL_ACRPT | DMA_CTL_RPT)); + + if (dma_info->dir) { + reg |= DMA_CTL_MDIR; + } else { + reg &= ~DMA_CTL_MDIR; + } + + if (priv->ren) { + reg |= DMA_CTL_REN; + } else { + reg &= ~DMA_CTL_REN; + } + + if ((dma_info->M2D_Valid) && (dma_info->msel)) { + reg |= DMA_CTL_MSEL; + } else { + reg &= ~DMA_CTL_MSEL; + } + + if (dma_info->mode) { + DMA_CTL_SET_SMOD(reg, dma_info->destType); + DMA_CTL_SET_SSIZ(reg, dma_info->destPort); + DMA_CTL_SET_DMOD(reg, dma_info->sourceType); + DMA_CTL_SET_DSIZ(reg, dma_info->sourcePort); + } else { + DMA_CTL_SET_SMOD(reg, dma_info->sourceType); + DMA_CTL_SET_SSIZ(reg, dma_info->sourcePort); + DMA_CTL_SET_DMOD(reg, dma_info->destType); + DMA_CTL_SET_DSIZ(reg, dma_info->destPort); + } + + __raw_writel(reg, &(dma_base->Ctl)); + + __clear_dma_interrupt(dma->channel); + unmask_dma_interrupt(dma->channel); + + disable_dma_clk(); + return 0; +} + +/*!@brief setup interrupt and setup dma channel by dma parameter */ +static inline int __init_dma_channel(mxc_dma_channel_t * chan, + mx2_dma_info_t * dma_info) +{ + mx2_dma_priv_t *dma_private = (mx2_dma_priv_t *) chan->private; + dma_regs_t *dma_base; + int ret; + + mask_dma_interrupt(chan->channel); + ret = + request_irq(dma_private->dma_irq, dma_irq_handler, + IRQF_DISABLED | IRQF_SHARED, chan->dev_name, + (void *)chan); + if (ret) { + printk(KERN_ERR + "%s: unable to request IRQ %d for DMA channel\n", + chan->dev_name, dma_private->dma_irq); + return ret; + } + + enable_dma_clk(); + + dma_base = (dma_regs_t *) (dma_private->dma_base); + __raw_writel(0, &(dma_base->Ctl)); + + ret = 0; + if ((ret = setup_dma_channel(chan, dma_info))) { + free_irq(dma_private->dma_irq, (void *)chan); + } + disable_dma_clk(); + return 0; +} + +/*!@brief initialize buffer descriptor ring.*/ +static inline void init_dma_bd(mx2_dma_priv_t * private) +{ + int i; + mx2_dma_bd_t *pbd; + private->bd_rd = private->bd_wr = 0; + atomic_set(&(private->bd_used), 0); + for (i = 0, pbd = private->bd_ring; i < MAX_BD_SIZE; i++, pbd++) { + pbd->state = 0; + } +} + +/*!@brief add dma buffer into buffer descriptor ring */ +static inline int fill_dma_bd(mxc_dma_channel_t * dma, + mxc_dma_requestbuf_t * buf, int num, + mxc_dma_mode_t mode) +{ + int i, wr; + unsigned long flags, mask; + mx2_dma_priv_t *priv = dma->private; + mx2_dma_bd_t *p, *q; + + if ((atomic_read(&(priv->bd_used)) + num) > MAX_BD_SIZE) { + return -EBUSY; + } + + for (i = 0; i < num; i++) { + wr = priv->bd_wr; + p = priv->bd_ring + wr; + p->mode = mode; + p->count = buf[i].num_of_bytes; + p->src_addr = buf[i].src_addr; + p->dst_addr = buf[i].dst_addr; + if (i == num - 1) { + p->state = DMA_BD_ST_LAST | DMA_BD_ST_PEND; + } else { + p->state = DMA_BD_ST_PEND; + } + priv->bd_wr = (wr + 1) % MAX_BD_SIZE; + atomic_inc(&(priv->bd_used)); + + if (atomic_read(&(priv->bd_used)) != 2) + continue; + /* Disable interrupt of this channel */ + local_irq_save(flags); + local_irq_disable(); + save_dma_interrupt(mask); + mask_dma_interrupt(dma->channel); + local_irq_restore(flags); + /*TODO :: + * If channel is transfering and supports chain_buffer, + * when the new buffer is 2st buffer , repeat must be enabled + */ + if (priv->dma_chaining && dma->active) { + q = priv->bd_ring + priv->bd_rd; + if (q && (q->state & DMA_BD_ST_BUSY)) { + if (atomic_read(&(priv->bd_used)) == 2) { + setup_dmac(dma); + } + } + } + restore_dma_interrupt(mask); + } + return 0; +} + +/*!@brief add sg-list into buffer descriptor ring */ +static inline int fill_dma_bd_by_sg(mxc_dma_channel_t * dma, + struct scatterlist *sg, int num, + int real_bytes, mxc_dma_mode_t mode) +{ + int i, wr, total_bytes = real_bytes; + unsigned long flags, mask; + mx2_dma_priv_t *priv = dma->private; + mx2_dma_bd_t *p, *q; + if ((atomic_read(&(priv->bd_used)) + num) > MAX_BD_SIZE) { + return -EBUSY; + } + + for (i = 0; i < num && ((real_bytes <= 0) || (total_bytes > 0)); i++) { + wr = priv->bd_wr; + p = priv->bd_ring + wr; + p->mode = mode; + if (real_bytes > 0) { + if (sg[i].length >= total_bytes) { + p->count = total_bytes; + } else { + p->count = sg[i].length; + } + total_bytes -= p->count; + } else { + p->count = sg[i].length; + } + if (mode == MXC_DMA_MODE_READ) { + p->src_addr = priv->dma_info->per_address; + p->dst_addr = sg[i].dma_address; + } else { + p->dst_addr = priv->dma_info->per_address; + p->src_addr = sg[i].dma_address; + } + if ((i == num - 1) || ((real_bytes > 0) && (total_bytes == 0))) { + p->state = DMA_BD_ST_LAST | DMA_BD_ST_PEND; + } else { + p->state = DMA_BD_ST_PEND; + } + priv->bd_wr = (wr + 1) % MAX_BD_SIZE; + atomic_inc(&(priv->bd_used)); + + if (atomic_read(&(priv->bd_used)) != 2) + continue; + /* Disable interrupt of this channel */ + local_irq_save(flags); + local_irq_disable(); + save_dma_interrupt(mask); + mask_dma_interrupt(dma->channel); + local_irq_restore(flags); + /*TODO :: + * If channel is transfering and supports chain_buffer, + * when the new buffer is 2st buffer , repeat must be enabled + */ + if (priv->dma_chaining && dma->active) { + q = next_dma_bd(priv); + if (q && (q->state & DMA_BD_ST_BUSY)) { + if ((atomic_read(&(priv->bd_used))) == 2) { + setup_dmac(dma); + } + } + } + restore_dma_interrupt(mask); + } + return 0; +} + +/*!@brief select next buffer descripter to transfer. + * return 1: need call call-back function. 0: Not need call call-back. + * it just is called in ISR + */ +static inline int consume_dma_bd(mxc_dma_channel_t * dma, int error) +{ + mx2_dma_priv_t *priv = dma->private; + mx2_dma_bd_t *p; + int notify = 0; + if (priv == NULL) { + printk(KERN_ERR + "request dma channel %d which is not initialize completed.!\n", + dma->channel); + return 1; + } + if (error != MXC_DMA_DONE) { + for (p = priv->bd_ring + priv->bd_rd; + atomic_read(&(priv->bd_used)) > 0;) { + priv->bd_rd = (priv->bd_rd + 1) % MAX_BD_SIZE; + atomic_dec(&(priv->bd_used)); + if (p->state & DMA_BD_ST_LAST) { + p->state = 0; + break; + } + p->state = 0; + } + notify = 1; + } else { + p = priv->bd_ring + priv->bd_rd; + priv->bd_rd = (priv->bd_rd + 1) % MAX_BD_SIZE; + atomic_dec(&(priv->bd_used)); + notify = (p->state & DMA_BD_ST_LAST) == DMA_BD_ST_LAST; + } + if (atomic_read(&(priv->bd_used)) <= 0) { + dma->active = 0; + atomic_dec(&g_dma_actived); + } else { + setup_dmac(dma); + } + return notify; +} + +/*! + * This function is generally called by the driver at open time. + * The DMA driver would do any initialization steps that is required + * to get the channel ready for data transfer. + * + * @param channel_id a pre-defined id. The peripheral driver would specify + * the id associated with its peripheral. This would be + * used by the DMA driver to identify the peripheral + * requesting DMA and do the necessary setup on the + * channel associated with the particular peripheral. + * The DMA driver could use static or dynamic DMA channel + * allocation. + * @param dev_name module name or device name + * @return returns a negative number on error if request for a DMA channel did not + * succeed, returns the channel number to be used on success. + */ +int mxc_dma_request_ext(mxc_dma_device_t channel_id, char *dev_name, + struct dma_channel_info *info) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *dma_private = NULL; + mx2_dma_info_t *dma_info = mxc_dma_get_info(channel_id); + int index; + int ret; + + if (dma_info == NULL) { + return -EINVAL; + } + + if ((index = get_dma_channel(dma_info->dma_chan)) < 0) { + return -ENODEV; + } + + dma = g_dma_channels + index; + dma_private = (mx2_dma_priv_t *) dma->private; + if (dma_private == NULL) { + printk(KERN_ERR + "request dma channel %d which is not initialize completed.!\n", + index); + ret = -EFAULT; + goto exit; + } + + dma->active = 0; + dma_private->dma_info = NULL; + dma->cb_fn = NULL; + dma->cb_args = NULL; + dma->dev_name = dev_name; + dma->mode = dma_info->mode ? MXC_DMA_MODE_WRITE : MXC_DMA_MODE_READ; + init_dma_bd(dma_private); + + if (!(ret = __init_dma_channel(dma, dma_info))) { + dma_private->dma_info = dma_info; + return index; + } + exit: + put_dma_channel(index); + return ret; +} + +/*! + * This function is generally called by the driver at close time. The DMA + * driver would do any cleanup associated with this channel. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_free(int channel_num) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *dma_private; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + dma = g_dma_channels + channel_num; + dma_private = (mx2_dma_priv_t *) dma->private; + if (dma_private == NULL) { + printk(KERN_ERR + "Free dma %d which is not completed initialization \n", + channel_num); + return -EFAULT; + } + if (dma->lock) { + if (dma->active) { /*Channel is busy */ + mxc_dma_disable(channel_num); + } + + dma_private = (mx2_dma_priv_t *) dma->private; + + enable_dma_clk(); + mask_dma_interrupt(channel_num); + disable_dma_clk(); + + free_irq(dma_private->dma_irq, (void *)dma); + put_dma_channel(channel_num); + } + return 0; +} + +/*! + * This function would just configure the buffers specified by the user into + * dma channel. The caller must call mxc_dma_enable to start this transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param dma_buf an array of physical addresses to the user defined + * buffers. The caller must guarantee the dma_buf is + * available until the transfer is completed. + * @param num_buf number of buffers in the array + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not be + * added with DMA for transfer. On Success, it returns 0 + */ +int mxc_dma_config(int channel_num, mxc_dma_requestbuf_t * dma_buf, int num_buf, + mxc_dma_mode_t mode) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *dma_private; + + if ((dma_buf == NULL) || (num_buf < 1)) { + return -EINVAL; + } + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + dma = g_dma_channels + channel_num; + dma_private = (mx2_dma_priv_t *) dma->private; + if (dma_private == NULL) { + printk(KERN_ERR + "config dma %d which is not completed initialization \n", + channel_num); + return -EFAULT; + } + + if (dma->lock == 0) { + return -ENODEV; + } + + /*TODO: dma chainning can not support on bi-dir channel */ + if (dma_private->dma_chaining && (dma->mode != mode)) { + return -EINVAL; + } + + /*TODO: fill dma buffer into driver . + * If driver is no enought buffer to save them , it will return -EBUSY + */ + if (fill_dma_bd(dma, dma_buf, num_buf, mode)) { + return -EBUSY; + } + + return 0; +} + +/*! + * This function would just configure the scatterlist specified by the + * user into dma channel. This is a slight variation of mxc_dma_config(), + * it is provided for the convenience of drivers that have a scatterlist + * passed into them. It is the calling driver's responsibility to have the + * correct physical address filled in the "dma_address" field of the + * scatterlist. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param sg a scatterlist of buffers. The caller must guarantee + * the dma_buf is available until the transfer is + * completed. + * @param num_buf number of buffers in the array + * @param num_of_bytes total number of bytes to transfer. If set to 0, this + * would imply to use the length field of the scatterlist + * for each DMA transfer. Else it would calculate the size + * for each DMA transfer. + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not + * be added with DMA for transfer. On Success, it returns 0 + */ +int mxc_dma_sg_config(int channel_num, struct scatterlist *sg, + int num_buf, int num_of_bytes, mxc_dma_mode_t mode) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *dma_private; + + if ((sg == NULL) || (num_buf < 1) || (num_of_bytes < 0)) { + return -EINVAL; + } + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + dma = g_dma_channels + channel_num; + dma_private = (mx2_dma_priv_t *) dma->private; + if (dma_private == NULL) { + printk(KERN_ERR + "config_sg dma %d which is not completed initialization \n", + channel_num); + return -EFAULT; + } + + if (dma->lock == 0) { + return -ENODEV; + } + + /*TODO: dma chainning can not support on bi-dir channel */ + if (dma_private->dma_chaining && (dma->mode != mode)) { + return -EINVAL; + } + + /*TODO: fill dma buffer into driver . + * If driver is no enought buffer to save them , it will return -EBUSY + */ + if (fill_dma_bd_by_sg(dma, sg, num_buf, num_of_bytes, mode)) { + return -EBUSY; + } + return 0; +} + +/*! + * This function is provided if the driver would like to set/change its + * callback function. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param callback a callback function to provide notification on transfer + * completion, user could specify NULL if he does not wish + * to be notified + * @param arg an argument that gets passed in to the callback + * function, used by the user to do any driver specific + * operations. + * @return this function returns an error if the callback could not be set + * for the channel + */ +int mxc_dma_callback_set(int channel_num, mxc_dma_callback_t callback, + void *arg) +{ + mxc_dma_channel_t *dma; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + dma = g_dma_channels + channel_num; + + if (!dma->lock) { + return -ENODEV; + } + + if (dma->active) { + return -EBUSY; + } + dma->cb_fn = callback; + dma->cb_args = arg; + return 0; + +} + +/*! + * This stops the DMA channel and any ongoing transfers. Subsequent use of + * mxc_dma_enable() will restart the channel and restart the transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_disable(int channel_num) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *priv; + unsigned long ctrl_val; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + dma = g_dma_channels + channel_num; + + if (dma->lock == 0) { + return -EINVAL; + } + + if (!dma->active) { + return -EINVAL; + } + + priv = (mx2_dma_priv_t *) dma->private; + if (priv == NULL) { + printk(KERN_ERR "disable a uncompleted dma channel %d\n", + channel_num); + return -EFAULT; + } + + dma->active = 0; + enable_dma_clk(); + + __clear_dma_interrupt(channel_num); + ctrl_val = + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_CCR(channel_num)); + ctrl_val &= ~DMA_CTL_CEN; /* clear CEN bit */ + __raw_writel(ctrl_val, + IO_ADDRESS(DMA_BASE_ADDR) + DMA_CCR(channel_num)); + disable_dma_clk(); + atomic_dec(&g_dma_actived); + + /*TODO: Clear all request buffers */ + flush_dma_bd(priv); + return 0; +} + +/*! + * This starts DMA transfer. Or it restarts DMA on a stopped channel + * previously stopped with mxc_dma_disable(). + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_enable(int channel_num) +{ + mxc_dma_channel_t *dma; + mx2_dma_priv_t *priv; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + dma = g_dma_channels + channel_num; + + if (dma->lock == 0) { + return -EINVAL; + } + + priv = (mx2_dma_priv_t *) dma->private; + if (priv == NULL) { + printk(KERN_ERR "enable a uncompleted dma channel %d\n", + channel_num); + return -EFAULT; + } + + if (dma->active) { + return 0; + } + dma->active = 1; + priv->trans_bytes = 0; + + enable_dma_clk(); + + atomic_inc(&g_dma_actived); + __clear_dma_interrupt(channel_num); + + setup_dmac(dma); + disable_dma_clk(); + return 0; +} + +/*! +*@brief Dump DMA registers +* +*@param channel Requested channel NO. +*@return none +*/ + +void mxc_dump_dma_register(int channel) +{ + mxc_dma_channel_t *dma = &g_dma_channels[channel]; + mx2_dma_priv_t *priv = (mx2_dma_priv_t *) dma->private; + dma_regs_t *dma_base; + + printk(KERN_INFO "======== Dump dma channel %d \n", channel); + if ((unsigned)channel >= MXC_DMA_CHANNELS) { + printk(KERN_INFO "Channel number is invalid \n"); + return; + } + if (!dma->lock) { + printk(KERN_INFO "Channel is not allocated \n"); + return; + } + + printk(KERN_INFO "g_dma_actived = %d\n", atomic_read(&g_dma_actived)); + + enable_dma_clk(); + dma_base = (dma_regs_t *) (priv->dma_base); + printk(KERN_INFO "DMA COMMON REGISTER\n"); + printk(KERN_INFO "DMA CONTROL DMA_DCR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR)); + printk(KERN_INFO "DMA Interrupt status DMA_DISR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DISR)); + printk(KERN_INFO "DMA Interrupt Mask DMA_DIMR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DIMR)); + printk(KERN_INFO "DMA Burst Time Out DMA_DBTOSR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBTOSR)); + printk(KERN_INFO "DMA request Time Out DMA_DRTOSR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DRTOSR)); + printk(KERN_INFO "DMA Transfer Error DMA_DSESR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DSESR)); + printk(KERN_INFO "DMA DMA_Overflow DMA_DBOSR: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBOSR)); + printk(KERN_INFO "DMA Burst Time OutCtl DMA_BurstTOCtl: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_DBTOCR)); + + printk(KERN_INFO "DMA 2D X size: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_XSRA)); + printk(KERN_INFO "DMA 2D Y size: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_YSRA)); + printk(KERN_INFO "DMA 2D Z size: %08x\n", + __raw_readl(IO_ADDRESS(DMA_BASE_ADDR) + DMA_WSRA)); + + printk(KERN_INFO "DMA Chan %2d Sourc SourceAddr: %08x\n", channel, + __raw_readl(&(dma_base->SourceAddr))); + printk(KERN_INFO "DMA Chan %2d dest DestAddr: %08x\n", channel, + __raw_readl(&(dma_base->DestAddr))); + printk(KERN_INFO "DMA Chan %2d count Count: %08x\n", channel, + __raw_readl(&(dma_base->Count))); + printk(KERN_INFO "DMA Chan %2d Ctl Ctl: %08x\n", channel, + __raw_readl(&(dma_base->Ctl))); + printk(KERN_INFO "DMA Chan %2d request RequestSource: %08x\n", + channel, __raw_readl(&(dma_base->RequestSource))); + printk(KERN_INFO "DMA Chan %2d burstL BurstLength: %08x\n", channel, + __raw_readl(&(dma_base->BurstLength))); + printk(KERN_INFO "DMA Chan %2d requestTO ReqTimeout: %08x\n", channel, + __raw_readl(&(dma_base->ReqTimeout))); + printk(KERN_INFO "DMA Chan %2d BusUtilt BusUtilt: %08x\n", channel, + __raw_readl(&(dma_base->BusUtilt))); + + disable_dma_clk(); +} + +#ifdef DMA_PM + +static int channel_in_use(void) +{ + int i; + for (i = 0; i < MXC_DMA_CHANNELS; i++) { + if (dma_chan[i].lock) + return 1; + } + return 0; +} + +int mxc_dma_pm_standby(void) +{ + unsigned long reg; + if (dma_pm_status == DMA_PMST_STANDBY) + return 0; + + if (!channel_in_use()) { + /*Disable DMA */ + __disable_dma_clk(); + dma_pm_status = DMA_PMST_STANDBY; + return 0; + } + return -1; +} + +int mxc_dma_pm_resume(void) +{ + unsigned long reg; + if (dma_pm_status == DMA_PMST_RESUME) + return 0; + + /*Enable HCLK_DMA and DMA(ipg clock) */ + dma_pm_status = DMA_PMST_RESUME; + return 0; +} + +int mxc_dma_pm_suspend(void) +{ + unsigned long reg; + if (dma_pm_status == DMA_PMST_SUSPEND) + return 0; + + if (!channel_in_use()) { + /*Disable DMA */ + __disable_dma_clk(); + dma_pm_status = DMA_PMST_SUSPEND; + return 0; + } + return -1; +} + +int mxc_dma_pm_handler(struct pm_dev *dev, pm_request_t rqst, void *data) +{ + int ret = 0; + switch (rqst) { + /*APM doesn't send PM_STANDBY and PM_STANDBY_RESUME request now. */ + case PM_SUSPEND: + ret = dma_pm_suspend(); + break; + case PM_RESUME: + ret = dma_pm_resume(); + break; + } + return ret; +} + +#endif /*DMA_PM */ + +int __init mxc_dma_init(void) +{ + int i; + mxc_dma_channel_t *dma = g_dma_channels; + mx2_dma_priv_t *private = g_dma_privates; + + memset(dma, 0, sizeof(mxc_dma_channel_t) * MXC_DMA_CHANNELS); + for (i = 0; i < MXC_DMA_CHANNELS; i++, dma++, private++) { + dma->channel = i; + dma->private = private; + private->dma_base = + (unsigned int)(IO_ADDRESS(DMA_BASE_ADDR + DMA_CH_BASE(i))); + private->dma_irq = i + MXC_DMA_INTR_0; /*Dma channel interrupt number */ + private->bd_ring = &g_dma_bd_table[i][0]; + } + + mxc_dma_load_info(g_dma_channels); + + dma_clk = clk_get(NULL, "dma_clk"); + clk_enable(dma_clk); + + __raw_writel(0x2, IO_ADDRESS(DMA_BASE_ADDR) + DMA_DCR); /*reset DMA; */ + + disable_dma_clk(); + + /*use module init because create_proc after init_dma */ + g_proc_dir = create_proc_entry("dma", 0, NULL); + g_proc_dir->read_proc = (read_proc_t *) mxc_get_dma_list; + g_proc_dir->data = NULL; + +#ifdef DMA_PM + /* Register the device with power management. */ + dma_pm = pm_register(PM_DMA_DEV, PM_SYS_UNKNOWN, dma_pm_handler); +#endif + + return 0; +} + +arch_initcall(mxc_dma_init); + +EXPORT_SYMBOL(mxc_dma_request_ext); +EXPORT_SYMBOL(mxc_dma_free); +EXPORT_SYMBOL(mxc_dma_callback_set); +EXPORT_SYMBOL(mxc_dma_enable); +EXPORT_SYMBOL(mxc_dma_disable); +EXPORT_SYMBOL(mxc_dma_config); +EXPORT_SYMBOL(mxc_dma_sg_config); +EXPORT_SYMBOL(mxc_dump_dma_register); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/Makefile @@ -3,9 +3,62 @@ # # Common support -obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o +obj-y := cpu.o cpu_common.o gpio.o clock.o wdog.o snoop.o io.o time.o obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o obj-$(CONFIG_MXC_PWM) += pwm.o + +ifneq ($(CONFIG_ARCH_MX27),y) +obj-y += spba.o sdma/ +endif + +ifeq ($(CONFIG_MXC_TZIC),y) +obj-y += tzic.o +else +obj-y += irq.o +endif + +obj-$(CONFIG_ARCH_MX27) += dma_mx2.o usb_common.o +obj-$(CONFIG_ARCH_MX3) += dptc.o usb_common.o entry-pm.o +obj-$(CONFIG_ARCH_MX35) += usb_common.o serialxc.o +obj-$(CONFIG_ARCH_MX37) += usb_common.o utmixc.o dptc.o dvfs_core.o +obj-$(CONFIG_ARCH_MX51) += usb_common.o utmixc.o dvfs_core.o + +# LEDs support +obj-$(CONFIG_LEDS) += leds.o + +# CPU FREQ support +obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o + +# DVFS-PER support +obj-$(CONFIG_MXC_DVFS_PER) += dvfs_per.o + +# USB support +obj-$(CONFIG_ISP1504_MXC) += isp1504xc.o +obj-$(CONFIG_ISP1301_MXC) += isp1301xc.o +obj-$(CONFIG_MC13783_MXC) += mc13783_xc.o + +# obj-$(CONFIG_USB_EHCI_FSL_UTMI) += utmixc.o +ifneq ($(strip $(CONFIG_USB_EHCI_FSL_UTMI) $(CONFIG_USB_GADGET_FSL_UTMI)),) +obj-y += utmixc.o +endif + +ifneq ($(CONFIG_USB_EHCI_ARC_H1)$(CONFIG_USB_EHCI_ARC_H2),) +ifneq ($(CONFIG_ARCH_MX51),y) +obj-y += serialxc.o +else +obj-y += isp1504xc.o +endif +endif + +ifneq ($(CONFIG_ARCH_MX25)$(CONFIG_USB),) +obj-y += usb_common.o +endif + +ifeq ($(CONFIG_ARCH_MX25),y) +ifneq ($(CONFIG_USB_EHCI_ARC_H2),) +obj-y += serialxc.o +endif +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/tzic.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/tzic.c @@ -0,0 +1,181 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + ***************************************** + * TZIC Registers * + ***************************************** + */ +#define TZIC_BASE IO_ADDRESS(TZIC_BASE_ADDR) +#define TZIC_INTCNTL (TZIC_BASE + 0x0000) /* control register */ +#define TZIC_INTTYPE (TZIC_BASE + 0x0004) /* Controller type register */ +#define TZIC_IMPID (TZIC_BASE + 0x0008) /* Distributor Implementer Identification Register */ +#define TZIC_PRIOMASK (TZIC_BASE + 0x000C) /* Priority Mask Reg */ +#define TZIC_SYNCCTRL (TZIC_BASE + 0x0010) /* Synchronizer Control register */ +#define TZIC_DSMINT (TZIC_BASE + 0x0014) /* DSM interrupt Holdoffregister */ +#define TZIC_INTSEC0 (TZIC_BASE + 0x0080) /* interrupt security register 0 */ +#define TZIC_ENSET0 (TZIC_BASE + 0x0100) /* Enable Set Register 0 */ +#define TZIC_ENCLEAR0 (TZIC_BASE + 0x0180) /* Enable Clear Register 0 */ +#define TZIC_SRCSET0 (TZIC_BASE + 0x0200) /* Source Set Register 0 */ +#define TZIC_SRCCLAR0 (TZIC_BASE + 0x0280) /* Source Clear Register 0 */ +#define TZIC_PRIORITY0 (TZIC_BASE + 0x0400) /* Priority Register 0 */ +#define TZIC_PND0 (TZIC_BASE + 0x0D00) /* Pending Register 0 */ +#define TZIC_HIPND0 (TZIC_BASE + 0x0D80) /* High Priority Pending Register */ +#define TZIC_WAKEUP0 (TZIC_BASE + 0x0E00) /* Wakeup Config Register */ +#define TZIC_SWINT (TZIC_BASE + 0x0F00) /* Software Interrupt Rigger Register */ +#define TZIC_ID0 (TZIC_BASE + 0x0FD0) /* Indentification Register 0 */ + +#define TZIC_NUM_IRQS 128 + +/*! + * Disable interrupt number "irq" in the TZIC + * + * @param irq interrupt source number + */ +static void mxc_mask_irq(unsigned int irq) +{ + int index, off; + + index = irq >> 5; + off = irq & 0x1F; + __raw_writel(1 << off, TZIC_ENCLEAR0 + (index << 2)); +} + +/*! + * Enable interrupt number "irq" in the TZIC + * + * @param irq interrupt source number + */ +static void mxc_unmask_irq(unsigned int irq) +{ + int index, off; + + index = irq >> 5; + off = irq & 0x1F; + __raw_writel(1 << off, TZIC_ENSET0 + (index << 2)); +} + +static unsigned int wakeup_intr[4]; + +/*! + * Set interrupt number "irq" in the TZIC as a wake-up source. + * + * @param irq interrupt source number + * @param enable enable as wake-up if equal to non-zero + * disble as wake-up if equal to zero + * + * @return This function returns 0 on success. + */ +static int mxc_set_wake_irq(unsigned int irq, unsigned int enable) +{ + unsigned int index, off; + + index = irq >> 5; + off = irq & 0x1F; + + if (index > 3) + return -1; + + if (enable) + wakeup_intr[index] |= (1 << off); + else + wakeup_intr[index] &= ~(1 << off); + + return 0; +} + +static struct irq_chip mxc_tzic_chip = { + .name = "MXC_TZIC", + .ack = mxc_mask_irq, + .mask = mxc_mask_irq, + .unmask = mxc_unmask_irq, + .set_wake = mxc_set_wake_irq, +}; + +/*! + * This function initializes the TZIC hardware and disables all the + * interrupts. It registers the interrupt enable and disable functions + * to the kernel for each interrupt source. + */ +void __init mxc_init_irq(void) +{ + int i; + + /* put the TZIC into the reset value with + * all interrupts disabled + */ + i = __raw_readl(TZIC_INTCNTL); + + __raw_writel(0x80010001, TZIC_INTCNTL); + i = __raw_readl(TZIC_INTCNTL); + __raw_writel(0x1f, TZIC_PRIOMASK); + i = __raw_readl(TZIC_PRIOMASK); + __raw_writel(0x02, TZIC_SYNCCTRL); + i = __raw_readl(TZIC_SYNCCTRL); + for (i = 0; i < 4; i++) { + __raw_writel(0xFFFFFFFF, TZIC_INTSEC0 + i * 4); + } + /* disable all interrupts */ + for (i = 0; i < 4; i++) { + __raw_writel(0xFFFFFFFF, TZIC_ENCLEAR0 + i * 4); + } + + /* all IRQ no FIQ Warning :: No selection */ + + for (i = 0; i < TZIC_NUM_IRQS; i++) { + set_irq_chip(i, &mxc_tzic_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + + printk(KERN_INFO "MXC IRQ initialized\n"); +} + +/*! + * enable wakeup interrupt + * + * @param is_idle 1 if called in idle loop (enset registers); + * 0 to be used when called from low power entry + * @return 0 if successful; non-zero otherwise + */ +int tzic_enable_wake(int is_idle) +{ + unsigned int i, v; + + __raw_writel(1, TZIC_DSMINT); + if (unlikely(__raw_readl(TZIC_DSMINT) == 0)) + return -EAGAIN; + + if (likely(is_idle)) { + for (i = 0; i < 4; i++) { + v = __raw_readl(TZIC_ENSET0 + i * 4); + __raw_writel(v, TZIC_WAKEUP0 + i * 4); + } + } else { + for (i = 0; i < 4; i++) { + v = wakeup_intr[i]; + __raw_writel(v, TZIC_WAKEUP0 + i * 4); + } + } + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/clock.c @@ -4,7 +4,7 @@ * Copyright (C) 2004 - 2005 Nokia corporation * Written by Tuukka Tikkanen * Modified for omap shared clock framework by Tony Lindgren - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * * This program is free software; you can redistribute it and/or @@ -25,6 +25,7 @@ /* #define DEBUG */ #include +#include #include #include #include @@ -35,13 +36,28 @@ #include #include #include +#include #include #include #include +#if (defined(CONFIG_ARCH_MX51) || defined(CONFIG_ARCH_MX37)) +extern int dvfs_core_is_active; +extern int lp_high_freq; +extern int lp_med_freq; +extern int low_bus_freq_mode; +extern int high_bus_freq_mode; +extern int set_high_bus_freq(int high_freq); +extern int set_low_bus_freq(void); +extern int low_freq_bus_used(void); +#else +int dvfs_core_is_active; +#endif + static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); +static DEFINE_SPINLOCK(clockfw_lock); /*------------------------------------------------------------------------- * Standard clock functions defined in include/linux/clk.h @@ -119,14 +135,16 @@ static void __clk_disable(struct clk *clk) { - if (clk == NULL || IS_ERR(clk)) + if (clk == NULL || IS_ERR(clk) || !clk->usecount) return; - __clk_disable(clk->parent); - __clk_disable(clk->secondary); + if (!(--clk->usecount)) { + if (clk->disable) + clk->disable(clk); - if (!(--clk->usecount) && clk->disable) - clk->disable(clk); + __clk_disable(clk->parent); + __clk_disable(clk->secondary); + } } static int __clk_enable(struct clk *clk) @@ -134,12 +152,13 @@ if (clk == NULL || IS_ERR(clk)) return -EINVAL; - __clk_enable(clk->parent); - __clk_enable(clk->secondary); - - if (clk->usecount++ == 0 && clk->enable) - clk->enable(clk); + if (clk->usecount++ == 0) { + __clk_enable(clk->parent); + __clk_enable(clk->secondary); + if (clk->enable) + clk->enable(clk); + } return 0; } @@ -148,14 +167,38 @@ */ int clk_enable(struct clk *clk) { + unsigned long flags; int ret = 0; if (clk == NULL || IS_ERR(clk)) return -EINVAL; - mutex_lock(&clocks_mutex); + spin_lock_irqsave(&clockfw_lock, flags); + ret = __clk_enable(clk); - mutex_unlock(&clocks_mutex); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + if ((clk->flags & CPU_FREQ_TRIG_UPDATE) + && (clk_get_usecount(clk) == 1)) { +#if (defined(CONFIG_ARCH_MX51) || defined(CONFIG_ARCH_MX37)) + if (low_freq_bus_used() && !low_bus_freq_mode) + set_low_bus_freq(); + else { + if (!high_bus_freq_mode) { + /* Currently at ow or medium set point, + * need to set to high setpoint + */ + set_high_bus_freq(0); + } else if (high_bus_freq_mode || low_bus_freq_mode) { + /* Currently at ow or high set point, + * need to set to medium setpoint + */ + set_high_bus_freq(0); + } + } +#endif + } return ret; } @@ -167,15 +210,60 @@ */ void clk_disable(struct clk *clk) { + unsigned long flags; + if (clk == NULL || IS_ERR(clk)) return; - mutex_lock(&clocks_mutex); + spin_lock_irqsave(&clockfw_lock, flags); + __clk_disable(clk); - mutex_unlock(&clocks_mutex); + + spin_unlock_irqrestore(&clockfw_lock, flags); + + if ((clk->flags & CPU_FREQ_TRIG_UPDATE) + && (clk_get_usecount(clk) == 0)) { +#if (defined(CONFIG_ARCH_MX51) || defined(CONFIG_ARCH_MX37)) + if (low_freq_bus_used() && !low_bus_freq_mode) + set_low_bus_freq(); + else { + if (!high_bus_freq_mode) { + /* Currently at ow or medium set point, + * need to set to high setpoint + */ + set_high_bus_freq(0); + } else if (high_bus_freq_mode || low_bus_freq_mode) { + /* Currently at ow or high set point, + * need to set to medium setpoint + */ + set_high_bus_freq(0); + } + } +#endif + } } + EXPORT_SYMBOL(clk_disable); +/*! + * @brief Function to get the usage count for the requested clock. + * + * This function returns the reference count for the clock. + * + * @param clk Handle to clock to disable. + * + * @return Returns the usage count for the requested clock. + */ +int clk_get_usecount(struct clk *clk) +{ + if (clk == NULL || IS_ERR(clk)) + return 0; + + return clk->usecount; +} + +EXPORT_SYMBOL(clk_get_usecount); + /* Retrieve the *current* clock rate. If the clock itself * does not provide a special calculation routine, ask * its parent and so on, until one is able to return @@ -186,10 +274,7 @@ if (clk == NULL || IS_ERR(clk)) return 0UL; - if (clk->get_rate) - return clk->get_rate(clk); - - return clk_get_rate(clk->parent); + return clk->rate; } EXPORT_SYMBOL(clk_get_rate); @@ -216,19 +301,48 @@ } EXPORT_SYMBOL(clk_round_rate); +/* Propagate rate to children */ +void propagate_rate(struct clk *tclk) +{ + struct clk *clkp; + + if (tclk == NULL || IS_ERR(tclk)) + return; + + pr_debug("mxc clock: finding children of %s-%d\n", tclk->name, + tclk->id); + list_for_each_entry(clkp, &clocks, node) { + if (likely(clkp->parent != tclk)) + continue; + pr_debug("mxc clock: %s-%d: recalculating rate: old = %lu, ", + clkp->name, clkp->id, clkp->rate); + if (likely((u32) clkp->recalc)) + clkp->recalc(clkp); + else + clkp->rate = tclk->rate; + pr_debug("new = %lu\n", clkp->rate); + propagate_rate(clkp); + } +} + /* Set the clock to the requested clock rate. The rate must * match a supported rate exactly based on what clk_round_rate returns */ int clk_set_rate(struct clk *clk, unsigned long rate) { + unsigned long flags; int ret = -EINVAL; if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0) return ret; - mutex_lock(&clocks_mutex); + spin_lock_irqsave(&clockfw_lock, flags); + ret = clk->set_rate(clk, rate); - mutex_unlock(&clocks_mutex); + if (unlikely((ret == 0) && (clk->flags & RATE_PROPAGATES))) + propagate_rate(clk); + + spin_unlock_irqrestore(&clockfw_lock, flags); return ret; } @@ -237,17 +351,35 @@ /* Set the clock's parent to another clock source */ int clk_set_parent(struct clk *clk, struct clk *parent) { + unsigned long flags; int ret = -EINVAL; + struct clk *prev_parent = clk->parent; if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent) || clk->set_parent == NULL) return ret; - mutex_lock(&clocks_mutex); + if (clk->usecount != 0) { + clk_enable(parent); + } + + spin_lock_irqsave(&clockfw_lock, flags); ret = clk->set_parent(clk, parent); - if (ret == 0) + if (ret == 0) { clk->parent = parent; - mutex_unlock(&clocks_mutex); + if (clk->recalc) { + clk->recalc(clk); + } else { + clk->rate = parent->rate; + } + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); + } + spin_unlock_irqrestore(&clockfw_lock, flags); + + if (clk->usecount != 0) { + clk_disable(prev_parent); + } return ret; } @@ -295,43 +427,164 @@ EXPORT_SYMBOL(clk_unregister); #ifdef CONFIG_PROC_FS -static int mxc_clock_read_proc(char *page, char **start, off_t off, - int count, int *eof, void *data) -{ - struct clk *clkp; - char *p = page; - int len; - list_for_each_entry(clkp, &clocks, node) { - p += sprintf(p, "%s-%d:\t\t%lu, %d", clkp->name, clkp->id, - clk_get_rate(clkp), clkp->usecount); - if (clkp->parent) - p += sprintf(p, ", %s-%d\n", clkp->parent->name, - clkp->parent->id); - else - p += sprintf(p, "\n"); +static void *mxc_proc_clocks_seq_start(struct seq_file *file, loff_t *index) +{ + unsigned int i; + unsigned int name_length; + unsigned int longest_length = 0; + struct clk *current_clock = 0; + struct clk *clock; + + /* Examine the clock list. */ + + i = 0; + + list_for_each_entry(clock, &clocks, node) { + if (i++ == *index) + current_clock = clock; + name_length = strlen(clock->name); + if (name_length > longest_length) + longest_length = name_length; } - len = (p - page) - off; - if (len < 0) - len = 0; + /* Check if we found the indicated clock. */ + + if (!current_clock) + return NULL; + + /* Stash the length of the longest clock name for later use. */ + + file->private = (void *) longest_length; + + /* Return success. */ + + return current_clock; +} + +static void *mxc_proc_clocks_seq_next(struct seq_file *file, void *data, + loff_t *index) +{ + struct clk *current_clock = (struct clk *) data; + + /* Check for nonsense. */ + + if (!current_clock) + return NULL; + + /* Check if the current clock is the last. */ - *eof = (len <= count) ? 1 : 0; - *start = page + off; + if (list_is_last(¤t_clock->node, &clocks)) + return NULL; + + /* Move to the next clock structure. */ + + current_clock = list_entry(current_clock->node.next, + typeof(*current_clock), node); + + (*index)++; + + /* Return the new current clock. */ + + return current_clock; - return len; } +static void mxc_proc_clocks_seq_stop(struct seq_file *file, void *data) +{ +} + +static int mxc_proc_clocks_seq_show(struct seq_file *file, void *data) +{ + int result; + struct clk *clock = (struct clk *) data; + struct clk *parent = clock->parent; + unsigned int longest_length = (unsigned int) file->private; + unsigned long range_divisor; + const char *range_units; + + if (clock->rate >= 1000000) { + range_divisor = 1000000; + range_units = "MHz"; + } else if (clock->rate >= 1000) { + range_divisor = 1000; + range_units = "KHz"; + } else { + range_divisor = 1; + range_units = "Hz"; + } + + if (parent) + result = seq_printf(file, + "%s-%-d%*s %s-%-d%*s %c%c%c%c%c%c %3d", + clock->name, + clock->id, + longest_length - strlen(clock->name), "", + parent->name, + parent->id, + longest_length - strlen(parent->name), "", + (clock->flags & RATE_PROPAGATES) ? 'P' : '_', + (clock->flags & ALWAYS_ENABLED) ? 'A' : '_', + (clock->flags & RATE_FIXED) ? 'F' : '_', + (clock->flags & CPU_FREQ_TRIG_UPDATE) ? 'T' : '_', + (clock->flags & AHB_HIGH_SET_POINT) ? 'H' : '_', + (clock->flags & AHB_MED_SET_POINT) ? 'M' : '_', + clock->usecount); + else + result = seq_printf(file, + "%s-%-d%*s %*s %c%c%c%c%c%c %3d", + clock->name, + clock->id, + longest_length - strlen(clock->name), "", + longest_length + 2, "", + (clock->flags & RATE_PROPAGATES) ? 'P' : '_', + (clock->flags & ALWAYS_ENABLED) ? 'A' : '_', + (clock->flags & RATE_FIXED) ? 'F' : '_', + (clock->flags & CPU_FREQ_TRIG_UPDATE) ? 'T' : '_', + (clock->flags & AHB_HIGH_SET_POINT) ? 'H' : '_', + (clock->flags & AHB_MED_SET_POINT) ? 'M' : '_', + clock->usecount); + + if (result) + return result; + + result = seq_printf(file, " %10lu (%lu%s)\n", + clock->rate, + clock->rate / range_divisor, range_units); + + return result; + +} + +static const struct seq_operations mxc_proc_clocks_seq_ops = { + .start = mxc_proc_clocks_seq_start, + .next = mxc_proc_clocks_seq_next, + .stop = mxc_proc_clocks_seq_stop, + .show = mxc_proc_clocks_seq_show +}; + +static int mxc_proc_clocks_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &mxc_proc_clocks_seq_ops); +} + +static const struct file_operations mxc_proc_clocks_ops = { + .open = mxc_proc_clocks_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; + static int __init mxc_setup_proc_entry(void) { struct proc_dir_entry *res; - res = create_proc_read_entry("cpu/clocks", 0, NULL, - mxc_clock_read_proc, NULL); + res = create_proc_entry("cpu/clocks", 0, NULL); if (!res) { printk(KERN_ERR "Failed to create proc/cpu/clocks\n"); return -ENOMEM; } + res->proc_fops = &mxc_proc_clocks_ops; return 0; } --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/isp1504xc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/isp1504xc.c @@ -0,0 +1,279 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/* ISP 1504 register addresses */ +#define ISP1504_VID_LOW 0x00 /* Vendor ID low */ +#define ISP1504_VID_HIGH 0x01 /* Vendor ID high */ +#define ISP1504_PID_LOW 0x02 /* Product ID low */ +#define ISP1504_PID_HIGH 0x03 /* Product ID high */ +#define ISP1504_FUNC 0x04 /* Function Control */ +#define ISP1504_ITFCTL 0x07 /* Interface Control */ +#define ISP1504_OTGCTL 0x0A /* OTG Control */ + +/* add to above register address to access Set/Clear functions */ +#define ISP1504_REG_SET 0x01 +#define ISP1504_REG_CLEAR 0x02 + +/* 1504 OTG Control Register bits */ +#define USE_EXT_VBUS_IND (1 << 7) /* Use ext. Vbus indicator */ +#define DRV_VBUS_EXT (1 << 6) /* Drive Vbus external */ +#define DRV_VBUS (1 << 5) /* Drive Vbus */ +#define CHRG_VBUS (1 << 4) /* Charge Vbus */ +#define DISCHRG_VBUS (1 << 3) /* Discharge Vbus */ +#define DM_PULL_DOWN (1 << 2) /* enable DM Pull Down */ +#define DP_PULL_DOWN (1 << 1) /* enable DP Pull Down */ +#define ID_PULL_UP (1 << 0) /* enable ID Pull Up */ + +/* 1504 OTG Function Control Register bits */ +#define SUSPENDM (1 << 6) /* places the PHY into + low-power mode */ +#define DRV_RESET (1 << 5) /* Active HIGH transceiver + reset */ + +/*! + * read ULPI register 'reg' thru VIEWPORT register 'view' + * + * @param reg register to read + * @param view the ULPI VIEWPORT register address + * @return return isp1504 register value + */ +static u8 isp1504_read(int reg, volatile u32 *view) +{ + u32 data; + + /* make sure interface is running */ + if (!(__raw_readl(view) && ULPIVW_SS)) { + __raw_writel(ULPIVW_WU, view); + do { /* wait for wakeup */ + data = __raw_readl(view); + } while (data & ULPIVW_WU); + } + + /* read the register */ + __raw_writel((ULPIVW_RUN | (reg << ULPIVW_ADDR_SHIFT)), view); + + do { /* wait for completion */ + data = __raw_readl(view); + } while (data & ULPIVW_RUN); + + return (u8) (data >> ULPIVW_RDATA_SHIFT) & ULPIVW_RDATA_MASK; +} + +/*! + * set bits into OTG ISP1504 register 'reg' thru VIEWPORT register 'view' + * + * @param bits set value + * @param reg which register + * @param view the ULPI VIEWPORT register address + */ +static void isp1504_set(u8 bits, int reg, volatile u32 *view) +{ + u32 data; + + /* make sure interface is running */ + if (!(__raw_readl(view) && ULPIVW_SS)) { + __raw_writel(ULPIVW_WU, view); + do { /* wait for wakeup */ + data = __raw_readl(view); + } while (data & ULPIVW_WU); + } + + __raw_writel((ULPIVW_RUN | ULPIVW_WRITE | + ((reg + ISP1504_REG_SET) << ULPIVW_ADDR_SHIFT) | + ((bits & ULPIVW_WDATA_MASK) << ULPIVW_WDATA_SHIFT)), + view); + + while (__raw_readl(view) & ULPIVW_RUN) /* wait for completion */ + continue; +} + +/*! + * clear bits in OTG ISP1504 register 'reg' thru VIEWPORT register 'view' + * + * @param bits bits to clear + * @param reg in this register + * @param view the ULPI VIEWPORT register address + */ +static void isp1504_clear(u8 bits, int reg, volatile u32 *view) +{ + __raw_writel((ULPIVW_RUN | ULPIVW_WRITE | + ((reg + ISP1504_REG_CLEAR) << ULPIVW_ADDR_SHIFT) | + ((bits & ULPIVW_WDATA_MASK) << ULPIVW_WDATA_SHIFT)), + view); + + while (__raw_readl(view) & ULPIVW_RUN) /* wait for completion */ + continue; +} + +extern int gpio_usbotg_hs_active(void); + +static void isp1508_fix(u32 *view) +{ + if (!machine_is_mx31_3ds()) + gpio_usbotg_hs_active(); + + /* Set bits IND_PASS_THRU and IND_COMPL */ + isp1504_set(0x60, ISP1504_ITFCTL, view); + + /* Set bit USE_EXT_VBUS_IND */ + isp1504_set(USE_EXT_VBUS_IND, ISP1504_OTGCTL, view); +} + +/*! + * set vbus power + * + * @param view viewport register + * @param on power on or off + */ +static void isp1504_set_vbus_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on) +{ + u32 *view = pdata->regs + ULPIVW_OFF; + + pr_debug("real %s(on=%d) view=0x%p\n", __FUNCTION__, on, view); + + pr_debug("ULPI Vendor ID 0x%x Product ID 0x%x\n", + (isp1504_read(ISP1504_VID_HIGH, view) << 8) | + isp1504_read(ISP1504_VID_LOW, view), + (isp1504_read(ISP1504_PID_HIGH, view) << 8) | + isp1504_read(ISP1504_PID_LOW, view)); + + pr_debug("OTG Control before=0x%x\n", + isp1504_read(ISP1504_OTGCTL, view)); + + if (on) { + isp1504_set(DRV_VBUS_EXT | /* enable external Vbus */ + DRV_VBUS | /* enable internal Vbus */ + USE_EXT_VBUS_IND | /* use external indicator */ + CHRG_VBUS, /* charge Vbus */ + ISP1504_OTGCTL, view); + + } else { + isp1508_fix(view); + + isp1504_clear(DRV_VBUS_EXT | /* disable external Vbus */ + DRV_VBUS, /* disable internal Vbus */ + ISP1504_OTGCTL, view); + + isp1504_set(USE_EXT_VBUS_IND | /* use external indicator */ + DISCHRG_VBUS, /* discharge Vbus */ + ISP1504_OTGCTL, view); + } + + pr_debug("OTG Control after = 0x%x\n", + isp1504_read(ISP1504_OTGCTL, view)); +} + +/*! + * set remote wakeup + * + * @param view viewport register + */ +static void isp1504_set_remote_wakeup(u32 * view) +{ + __raw_writel(~ULPIVW_WRITE & __raw_readl(view), view); + __raw_writel((1 << ULPIVW_PORT_SHIFT) | __raw_readl(view), view); + __raw_writel(ULPIVW_RUN | __raw_readl(view), view); + + while (__raw_readl(view) & ULPIVW_RUN) /* wait for completion */ + continue; +} + +static void isp1504_init(struct fsl_xcvr_ops *this) +{ + pr_debug("%s:\n", __FUNCTION__); +} + +static void isp1504_uninit(struct fsl_xcvr_ops *this) +{ + pr_debug("%s:\n", __FUNCTION__); +} + +static void isp1504_suspend(struct fsl_xcvr_ops *this) +{ + pr_debug("%s\n", __func__); + + /* send suspend command */ + isp1504_clear(SUSPENDM, ISP1504_FUNC, &UOG_ULPIVIEW); + pr_debug("%s.\n", __func__); +} + +/*! + * Set the 1504 transceiver to the proper mode for testing purposes. + * + * @param view the ULPI VIEWPORT register address + * @param test_mode Set the 1504 transceiver to disable bit stuffing and NRZI + */ + static void isp1504_set_test_mode(u32 *view, enum usb_test_mode test_mode) +{ + if (test_mode == USB_TEST_J || test_mode == USB_TEST_K) { + printk(KERN_INFO "udc: disable bit stuffing and NRZI\n"); + /* Disable bit-stuffing and NRZI encoding. */ + isp1504_set(0x10, 0x04, view); + } +} + +static struct fsl_xcvr_ops isp1504_ops = { + .name = "isp1504", + .xcvr_type = PORTSC_PTS_ULPI, + .init = isp1504_init, + .uninit = isp1504_uninit, + .suspend = isp1504_suspend, + .set_vbus_power = isp1504_set_vbus_power, + .set_remote_wakeup = isp1504_set_remote_wakeup, + .set_test_mode = isp1504_set_test_mode, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); +extern int fsl_usb_xcvr_suspend(struct fsl_xcvr_ops *xcvr_ops); + +static int __init isp1504xc_init(void) +{ + pr_debug("%s\n", __FUNCTION__); + + fsl_usb_xcvr_register(&isp1504_ops); + + /* suspend isp1504 */ + if (fsl_usb_xcvr_suspend(&isp1504_ops)) + pr_debug("%s: failed to suspend isp1504\n", __func__); + + return 0; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +static void __exit isp1504xc_exit(void) +{ + fsl_usb_xcvr_unregister(&isp1504_ops); +} + +module_init(isp1504xc_init); +module_exit(isp1504xc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("isp1504 xcvr driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/mc13783_xc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/mc13783_xc.c @@ -0,0 +1,299 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Events to be passed to the thread */ +#define MC13783_USB_VBUS_ON 0x0001 +#define MC13783_USB_VBUS_OFF 0x0002 +#define MC13783_USB_DETECT_MINI_A 0x0004 +#define MC13783_USB_DETECT_MINI_B 0x0008 + +extern void otg_set_serial_peripheral(void); +extern void otg_set_serial_host(void); + +static unsigned int p_event; +static PMIC_CONVITY_EVENTS g_event; +static PMIC_CONVITY_HANDLE pmic_handle = (PMIC_CONVITY_HANDLE) NULL; + +static void xc_workqueue_handler(struct work_struct *work); + +DECLARE_WORK(xc_work, xc_workqueue_handler); + +DECLARE_MUTEX(pmic_mx); + +static void pmic_event_handler(const PMIC_CONVITY_EVENTS event) +{ + if (event & USB_DETECT_4V4_RISE) + pr_debug("%s: USB_DETECT_4V4_RISE\n", __func__); + + if (event & USB_DETECT_4V4_FALL) + pr_debug("%s: USB_DETECT_4V4_FALL\n", __func__); + + if (event & USB_DETECT_2V0_RISE) + pr_debug("%s: USB_DETECT_2V0_RISE\n", __func__); + + if (event & USB_DETECT_2V0_FALL) + pr_debug("%s: USB_DETECT_2V0_FALL\n", __func__); + + if (event & USB_DETECT_0V8_RISE) + pr_debug("%s: USB_DETECT_0V8_RISE\n", __func__); + + if (event & USB_DETECT_0V8_FALL) + pr_debug("%s: USB_DETECT_0V8_FALL\n", __func__); + + if (event & USB_DETECT_MINI_B) { + pr_debug("%s: USB_DETECT_MINI_B\n", __func__); + otg_set_serial_peripheral(); + g_event = USB_DETECT_MINI_B; + p_event = MC13783_USB_DETECT_MINI_B; + schedule_work(&xc_work); + } + if (event & USB_DETECT_MINI_A) { + pr_debug("%s: USB_DETECT_MINI_A\n", __func__); + otg_set_serial_host(); + g_event = USB_DETECT_MINI_A; + p_event = MC13783_USB_DETECT_MINI_A; + schedule_work(&xc_work); + } + + /* + * Mini-B cable insertion/removal does not generate cable-detect + * event, so we rely on the VBUS changes to identify a mini-b cable + * connect. This logic is only used if mini-b is the first cable that + * is connected after bootup. At all other times, removal of mini-a + * cable is used to initialize peripheral. + */ + if (g_event != USB_DETECT_MINI_A && g_event != USB_DETECT_MINI_B) { + if ((event & USB_DETECT_0V8_RISE) && + (event & USB_DETECT_2V0_RISE) && + (event & USB_DETECT_4V4_RISE)) { + otg_set_serial_peripheral(); + g_event = USB_DETECT_MINI_B; + p_event = MC13783_USB_DETECT_MINI_B; + schedule_work(&xc_work); + } + } +} + +static int usb_pmic_mod_init(void) +{ + PMIC_STATUS rs = PMIC_ERROR; + + init_MUTEX_LOCKED(&pmic_mx); + + rs = pmic_convity_open(&pmic_handle, USB); + if (rs != PMIC_SUCCESS) { + printk(KERN_ERR "pmic_convity_open returned error %d\n", rs); + return rs; + } + + rs = pmic_convity_set_callback(pmic_handle, pmic_event_handler, + USB_DETECT_4V4_RISE | USB_DETECT_4V4_FALL + | USB_DETECT_2V0_RISE | + USB_DETECT_2V0_FALL | USB_DETECT_0V8_RISE + | USB_DETECT_0V8_FALL | USB_DETECT_MINI_A + | USB_DETECT_MINI_B); + + if (rs != PMIC_SUCCESS) { + printk(KERN_ERR + "pmic_convity_set_callback returned error %d\n", rs); + return rs; + } + + return rs; +} + +static void usb_pmic_mod_exit(void) +{ + PMIC_STATUS rs; + + pmic_convity_set_mode(pmic_handle, RS232_1); + pmic_convity_clear_callback(pmic_handle); + + if (pmic_handle != (PMIC_CONVITY_HANDLE) NULL) { + rs = pmic_convity_close(pmic_handle); + if (rs != PMIC_SUCCESS) { + printk(KERN_ERR + "pmic_convity_close() returned error %d", rs); + } else { + pmic_handle = (PMIC_CONVITY_HANDLE) NULL; + } + } +} + +static inline void mc13783_set_host(void) +{ + PMIC_STATUS rs = PMIC_ERROR; + + rs = pmic_convity_usb_otg_clear_config(pmic_handle, USB_OTG_SE0CONN); + rs |= pmic_convity_usb_otg_clear_config(pmic_handle, USB_PU); + + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_UDM_PD); + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_UDP_PD); + + if (rs != PMIC_SUCCESS) + printk(KERN_ERR "mc13783_set_host failed\n"); + +} + +static inline void mc13783_set_peripheral(void) +{ + PMIC_STATUS rs = PMIC_ERROR; + + rs = pmic_convity_usb_otg_clear_config(pmic_handle, USB_UDM_PD); + rs |= pmic_convity_usb_otg_clear_config(pmic_handle, USB_UDP_PD); + + rs |= pmic_convity_usb_set_speed(pmic_handle, USB_FULL_SPEED); + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_OTG_SE0CONN); + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_PU); + + if (rs != PMIC_SUCCESS) + printk(KERN_ERR "mc13783_set_peripheral failed\n"); +} + +void mc13783_set_vbus_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on) +{ + if (on) { + p_event = MC13783_USB_VBUS_ON; + schedule_work(&xc_work); + } +} + +static struct fsl_xcvr_ops mc13783_ops_otg = { + .name = "mc13783", + .xcvr_type = PORTSC_PTS_SERIAL, + .set_host = mc13783_set_host, + .set_device = mc13783_set_peripheral, + .set_vbus_power = mc13783_set_vbus_power, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); + +static void xc_workqueue_handler(struct work_struct *work) +{ + PMIC_STATUS rs = PMIC_ERROR; + + down(&pmic_mx); + + switch (p_event) { + case MC13783_USB_VBUS_OFF: + mc13783_set_peripheral(); + break; + case MC13783_USB_VBUS_ON: + mc13783_set_host(); + break; + case MC13783_USB_DETECT_MINI_B: + rs = pmic_convity_set_output(pmic_handle, true, false); + rs |= + pmic_convity_usb_otg_clear_config(pmic_handle, + USB_VBUS_CURRENT_LIMIT_LOW_30MS); + + if (rs != PMIC_SUCCESS) + printk(KERN_ERR "MC13783_USB_VBUS_OFF failed\n"); + break; + case MC13783_USB_DETECT_MINI_A: + rs = pmic_convity_set_output(pmic_handle, true, true); + rs |= + pmic_convity_usb_otg_set_config(pmic_handle, + USB_VBUS_CURRENT_LIMIT_LOW_30MS); + + if (rs != PMIC_SUCCESS) + printk(KERN_ERR "MC13783_USB_VBUS_ON failed\n"); + break; + default: + break; + } + up(&pmic_mx); +} + +int mc13783xc_init(void) +{ + PMIC_STATUS rs = PMIC_ERROR; + +#if defined(CONFIG_MXC_USB_SB3) + int xc_mode = USB_SINGLE_ENDED_BIDIR; +#elif defined(CONFIG_MXC_USB_SU6) + int xc_mode = USB_SINGLE_ENDED_UNIDIR; +#elif defined(CONFIG_MXC_USB_DB4) + int xc_mode = USB_DIFFERENTIAL_BIDIR; +#else + int xc_mode = USB_DIFFERENTIAL_UNIDIR; +#endif + + rs = usb_pmic_mod_init(); + if (rs != PMIC_SUCCESS) { + usb_pmic_mod_exit(); + printk(KERN_ERR "usb_pmic_mod_init failed\n"); + return rs; + } + + rs = pmic_convity_usb_set_xcvr(pmic_handle, xc_mode); + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_OTG_SE0CONN); + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USBXCVREN); + rs |= pmic_convity_set_output(pmic_handle, false, true); + + rs |= pmic_convity_usb_otg_set_config(pmic_handle, USB_PULL_OVERRIDE); + rs |= pmic_convity_usb_otg_clear_config(pmic_handle, USB_USBCNTRL); + rs |= pmic_convity_usb_otg_clear_config(pmic_handle, USB_DP150K_PU); + + if (rs != PMIC_SUCCESS) + printk(KERN_ERR "pmic configuration failed\n"); + + fsl_usb_xcvr_register(&mc13783_ops_otg); + + mc13783_set_peripheral(); + + return rs; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +void mc13783xc_uninit(void) +{ + /* Clear stuff from init */ + pmic_convity_usb_otg_clear_config(pmic_handle, USB_OTG_SE0CONN); + pmic_convity_usb_otg_clear_config(pmic_handle, USBXCVREN); + pmic_convity_set_output(pmic_handle, false, false); + pmic_convity_usb_otg_clear_config(pmic_handle, USB_PULL_OVERRIDE); + + /* Clear host mode */ + pmic_convity_usb_otg_clear_config(pmic_handle, USB_UDP_PD); + pmic_convity_usb_otg_clear_config(pmic_handle, USB_UDM_PD); + + /* Clear peripheral mode */ + pmic_convity_usb_otg_clear_config(pmic_handle, USB_PU); + + /* Vbus off */ + pmic_convity_set_output(pmic_handle, true, false); + pmic_convity_usb_otg_clear_config(pmic_handle, + USB_VBUS_CURRENT_LIMIT_LOW_30MS); + + usb_pmic_mod_exit(); + + fsl_usb_xcvr_unregister(&mc13783_ops_otg); +} + +module_init(mc13783xc_init); +module_exit(mc13783xc_uninit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("mc13783xc"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/time.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/time.c @@ -50,6 +50,7 @@ /* MX31, MX35 */ #define MX3_TCTL_WAITEN (1 << 3) #define MX3_TCTL_CLK_IPG (1 << 6) +#define MX3_TCTL_CLK_PER (2 << 6) #define MX3_TCTL_FRR (1 << 9) #define MX3_IR 0x0c #define MX3_TSTAT 0x08 @@ -57,6 +58,8 @@ #define MX3_TCN 0x24 #define MX3_TCMP 0x10 +#define timer_is_v2() (!(cpu_is_mx1() || cpu_is_mx2()) || cpu_is_mx25()) + static struct clock_event_device clockevent_mxc; static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; @@ -66,7 +69,7 @@ { unsigned int tmp; - if (cpu_is_mx3()) + if (timer_is_v2()) __raw_writel(0, timer_base + MX3_IR); else { tmp = __raw_readl(timer_base + MXC_TCTL); @@ -76,7 +79,7 @@ static inline void gpt_irq_enable(void) { - if (cpu_is_mx3()) + if (timer_is_v2()) __raw_writel(1<<0, timer_base + MX3_IR); else { __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, @@ -90,7 +93,7 @@ __raw_writel(0, timer_base + MX1_2_TSTAT); if (cpu_is_mx2()) __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT); - if (cpu_is_mx3()) + if (timer_is_v2()) __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT); } @@ -117,7 +120,7 @@ { unsigned int c = clk_get_rate(timer_clk); - if (cpu_is_mx3()) + if (timer_is_v2()) clocksource_mxc.read = mx3_get_cycles; clocksource_mxc.mult = clocksource_hz2mult(c, @@ -180,7 +183,7 @@ if (mode != clockevent_mode) { /* Set event time into far-far future */ - if (cpu_is_mx3()) + if (timer_is_v2()) __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, timer_base + MX3_TCMP); else @@ -233,7 +236,7 @@ struct clock_event_device *evt = &clockevent_mxc; uint32_t tstat; - if (cpu_is_mx3()) + if (timer_is_v2()) tstat = __raw_readl(timer_base + MX3_TSTAT); else tstat = __raw_readl(timer_base + MX1_2_TSTAT); @@ -264,7 +267,7 @@ { unsigned int c = clk_get_rate(timer_clk); - if (cpu_is_mx3()) + if (timer_is_v2()) clockevent_mxc.set_next_event = mx3_set_next_event; clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, @@ -281,10 +284,9 @@ return 0; } -void __init mxc_timer_init(struct clk *timer_clk) +void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) { uint32_t tctl_val; - int irq; clk_enable(timer_clk); @@ -303,8 +305,10 @@ timer_base = IO_ADDRESS(GPT1_BASE_ADDR); irq = MXC_INT_GPT; #endif - } else - BUG(); + } + if (base) { + timer_base = base; + } /* * Initialise to a known state (all timers off, and timing reset) @@ -313,8 +317,8 @@ __raw_writel(0, timer_base + MXC_TCTL); __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ - if (cpu_is_mx3()) - tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; + if (timer_is_v2()) + tctl_val = MX3_TCTL_CLK_PER | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; else tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/pwm.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/pwm.c @@ -6,6 +6,7 @@ * published by the Free Software Foundation. * * Derived from pxa PWM driver by eric miao + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. */ #include @@ -34,7 +35,12 @@ #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) #define MX3_PWMCR_EN (1 << 0) - +#define MX3_PWMCR_STOPEN (1 << 25) +#define MX3_PWMCR_DOZEEN (1 << 24) +#define MX3_PWMCR_WAITEN (1 << 23) +#define MX3_PWMCR_DBGEN (1 << 22) +#define MX3_PWMCR_CLKSRC_IPG (1 << 16) +#define MX3_PWMCR_CLKSRC_IPG_32k (3 << 16) struct pwm_device { struct list_head node; @@ -55,7 +61,7 @@ if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) return -EINVAL; - if (cpu_is_mx27() || cpu_is_mx3()) { + if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx51()) { unsigned long long c; unsigned long period_cycles, duty_cycles, prescale; c = clk_get_rate(pwm->clk); @@ -72,8 +78,10 @@ writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); writel(period_cycles, pwm->mmio_base + MX3_PWMPR); - writel(MX3_PWMCR_PRESCALER(prescale - 1) | - MX3_PWMCR_CLKSRC_IPG_HIGH | MX3_PWMCR_EN, + writel(MX3_PWMCR_PRESCALER(prescale) | + MX3_PWMCR_CLKSRC_IPG_HIGH | + MX3_PWMCR_STOPEN | MX3_PWMCR_DOZEEN | + MX3_PWMCR_WAITEN | MX3_PWMCR_DBGEN, pwm->mmio_base + MX3_PWMCR); } else if (cpu_is_mx1() || cpu_is_mx21()) { /* The PWM subsystem allows for exact frequencies. However, @@ -105,6 +113,7 @@ int pwm_enable(struct pwm_device *pwm) { + unsigned long reg; int rc = 0; if (!pwm->clk_enabled) { @@ -112,16 +121,27 @@ if (!rc) pwm->clk_enabled = 1; } + + reg = readl(pwm->mmio_base + MX3_PWMCR); + reg |= MX3_PWMCR_EN; + writel(reg, pwm->mmio_base + MX3_PWMCR); return rc; } EXPORT_SYMBOL(pwm_enable); void pwm_disable(struct pwm_device *pwm) { + unsigned long reg; + if (pwm->clk_enabled) { clk_disable(pwm->clk); pwm->clk_enabled = 0; } + + reg = readl(pwm->mmio_base + MX3_PWMCR); + reg &= ~MX3_PWMCR_EN; + writel(reg, pwm->mmio_base + MX3_PWMCR); + } EXPORT_SYMBOL(pwm_disable); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/leds.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/leds.c @@ -0,0 +1,111 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * The LED can be used for debugging purpose. To enalbe the LEDs, in the + * config file, select: + * CONFIG_LEDS + * CONFIG_LEDS_TIMER --- enable the OS tick LED once every 50 ticks (.5sec) + * CONFIG_LEDS_CPU --- enable the cpu idle in/out LED (blink fast) + * + * The two LEDs can be disabled through user space by issuing: + * echo "claim" > /sys/devices/system/leds/leds0/event + * To release the LEDs back to the normal operation, do: + * echo "release" > /sys/devices/system/leds/leds0/event + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LED_STATE_ENABLED (1 << 0) +#define LED_STATE_CLAIMED (1 << 1) + +static unsigned int led_state; +static unsigned int hw_led_state; + +static void mxc_leds_event(led_event_t evt) +{ + unsigned long flags; + + local_irq_save(flags); + + switch (evt) { + case led_start: + hw_led_state = MXC_BD_LED1 | MXC_BD_LED2; + led_state = LED_STATE_ENABLED; + break; + + case led_stop: + case led_halted: + hw_led_state = 0; + led_state &= ~LED_STATE_ENABLED; + MXC_BD_LED_OFF(MXC_BD_LED1 | MXC_BD_LED2); + break; + + case led_claim: + led_state |= LED_STATE_CLAIMED; + hw_led_state = 0; + break; + + case led_release: + led_state &= ~LED_STATE_CLAIMED; + hw_led_state = 0; + break; + +#ifdef CONFIG_LEDS_TIMER + case led_timer: + if (!(led_state & LED_STATE_CLAIMED)) + hw_led_state ^= MXC_BD_LED1; + break; +#endif + +#ifdef CONFIG_LEDS_CPU + case led_idle_start: + if (!(led_state & LED_STATE_CLAIMED)) + hw_led_state &= ~MXC_BD_LED2; + break; + + case led_idle_end: + if (!(led_state & LED_STATE_CLAIMED)) + hw_led_state |= MXC_BD_LED2; + break; +#endif + + default: + break; + } + + if (led_state & LED_STATE_ENABLED) { + MXC_BD_LED_OFF(~hw_led_state); + MXC_BD_LED_ON(hw_led_state); + } + + local_irq_restore(flags); +} + +static int __init mxc_leds_init(void) +{ + led_state = LED_STATE_ENABLED; + leds_event = mxc_leds_event; + return 0; +} + +core_initcall(mxc_leds_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/gpio.c @@ -20,12 +20,32 @@ */ #include +#include #include #include #include +#include +#include #include #include +#if defined(CONFIG_ARCH_MX2) +#else +/* gpio and gpio based interrupt handling */ +#define GPIO_DR 0x00 +#define GPIO_GDIR 0x04 +#define GPIO_PSR 0x08 +#define GPIO_ICR1 0x0C +#define GPIO_ICR2 0x10 +#define GPIO_IMR 0x14 +#define GPIO_ISR 0x18 +#define GPIO_INT_LOW_LEV 0x0 +#define GPIO_INT_HIGH_LEV 0x1 +#define GPIO_INT_RISE_EDGE 0x2 +#define GPIO_INT_FALL_EDGE 0x3 +#define GPIO_INT_NONE 0x4 +#endif + static struct mxc_gpio_port *mxc_gpio_ports; static int gpio_table_size; @@ -162,16 +182,23 @@ } } -#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX1) -/* MX1 and MX3 has one interrupt *per* gpio port */ -static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) +#ifndef CONFIG_ARCH_MX2 +/* one interrupt *per* gpio port */ +static void gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; + u32 mask = 0xFFFFFFFF; struct mxc_gpio_port *port = (struct mxc_gpio_port *)get_irq_data(irq); - irq_stat = __raw_readl(port->base + GPIO_ISR) & - __raw_readl(port->base + GPIO_IMR); +#ifdef MXC_GPIO_SPLIT_IRQ_2 + if (irq == port->irq) + mask = 0x0000FFFF; + else + mask = 0xFFFF0000; +#endif + irq_stat = __raw_readl(port->base + GPIO_ISR) & + (__raw_readl(port->base + GPIO_IMR) & mask); mxc_gpio_irq_handler(port, irq_stat); } #endif @@ -197,11 +224,44 @@ } #endif +/* + * Set interrupt number "irq" in the GPIO as a wake-up source. + * While system is running all registered GPIO interrupts need to have + * wake-up enabled. When system is suspended, only selected GPIO interrupts + * need to have wake-up enabled. + * @param irq interrupt source number + * @param enable enable as wake-up if equal to non-zero + * @return This function returns 0 on success. + */ +static int gpio_set_wake_irq(u32 irq, u32 enable) +{ + u32 gpio = irq_to_gpio(irq); + u32 gpio_idx = gpio & 0x1F; + struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; + + if (enable) { + port->suspend_wakeup |= (1 << gpio_idx); + if (port->irq_high && (gpio_idx >= 16)) + enable_irq_wake(port->irq_high); + else + enable_irq_wake(port->irq); + } else { + port->suspend_wakeup &= ~(1 << gpio_idx); + if (port->irq_high && (gpio_idx >= 16)) + disable_irq_wake(port->irq_high); + else + disable_irq_wake(port->irq); + } + + return 0; +} + static struct irq_chip gpio_irq_chip = { .ack = gpio_ack_irq, .mask = gpio_mask_irq, .unmask = gpio_unmask_irq, .set_type = gpio_set_irq_type, + .set_wake = gpio_set_wake_irq, }; static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, @@ -252,9 +312,98 @@ return 0; } +#ifdef CONFIG_PM +/*! + * This function puts the GPIO in low-power mode/state. + * All the interrupts that are enabled are first saved. + * Only those interrupts which registers as a wake source by calling + * enable_irq_wake are enabled. All other interrupts are disabled. + * + * @param dev the system device structure used to give information + * on GPIO to suspend + * @param mesg the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_gpio_suspend(struct sys_device *dev, pm_message_t mesg) +{ + int i; + struct mxc_gpio_port *port = mxc_gpio_ports; + + for (i = 0; i < gpio_table_size; i++) { + void __iomem *isr_reg; + void __iomem *imr_reg; + + isr_reg = port[i].base + GPIO_ISR; + imr_reg = port[i].base + GPIO_IMR; + + if (__raw_readl(isr_reg) & port[i].suspend_wakeup) + return -EPERM; + + port[i].saved_wakeup = __raw_readl(imr_reg); + __raw_writel(port[i].suspend_wakeup, imr_reg); + } + + return 0; +} + +/*! + * This function brings the GPIO back from low-power state. + * All the interrupts enabled before suspension are re-enabled from + * the saved information. + * + * @param dev the system device structure used to give information + * on GPIO to resume + * + * @return The function always returns 0. + */ +static int mxc_gpio_resume(struct sys_device *dev) +{ + int i; + struct mxc_gpio_port *port = mxc_gpio_ports; + + for (i = 0; i < gpio_table_size; i++) { + void __iomem *isr_reg; + void __iomem *imr_reg; + + isr_reg = port[i].base + GPIO_ISR; + imr_reg = port[i].base + GPIO_IMR; + + __raw_writel(port[i].saved_wakeup, imr_reg); + } + + return 0; +} +#else +#define mxc_gpio_suspend NULL +#define mxc_gpio_resume NULL +#endif /* CONFIG_PM */ + +/*! + * This structure contains pointers to the power management callback functions. + */ +static struct sysdev_class mxc_gpio_sysclass = { + .name = "mxc_gpio", + .suspend = mxc_gpio_suspend, + .resume = mxc_gpio_resume, +}; + +/*! + * This structure represents GPIO as a system device. + * System devices follow a slightly different driver model. + * They don't need to do dynammic driver binding, can't be probed, + * and don't reside on any type of peripheral bus. + * So, it is represented and treated a little differently. + */ +static struct sys_device mxc_gpio_device = { + .id = 0, + .cls = &mxc_gpio_sysclass, +}; + int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) { int i, j; + int ret = 0; /* save for local usage */ mxc_gpio_ports = port; @@ -284,10 +433,13 @@ /* its a serious configuration bug when it fails */ BUG_ON( gpiochip_add(&port[i].chip) < 0 ); -#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX1) - /* setup one handler for each entry */ - set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); +#ifndef CONFIG_ARCH_MX2 + set_irq_chained_handler(port[i].irq, gpio_irq_handler); set_irq_data(port[i].irq, &port[i]); + if (port[i].irq_high) { + set_irq_chained_handler(port[i].irq_high, gpio_irq_handler); + set_irq_data(port[i].irq_high, &port[i]); + } #endif } @@ -296,5 +448,10 @@ set_irq_chained_handler(port[0].irq, mx2_gpio_irq_handler); set_irq_data(port[0].irq, port); #endif - return 0; + + ret = sysdev_class_register(&mxc_gpio_sysclass); + if (ret == 0) + ret = sysdev_register(&mxc_gpio_device); + + return ret; } --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/dvfs_core.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/dvfs_core.c @@ -0,0 +1,931 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dvfs_core.c + * + * @brief A simplied driver for the Freescale Semiconductor MXC DVFS module. + * + * Upon initialization, the DVFS driver initializes the DVFS hardware + * sets up driver nodes attaches to the DVFS interrupt and initializes internal + * data structures. When the DVFS interrupt occurs the driver checks the cause + * of the interrupt (lower frequency, increase frequency or emergency) and + * changes the CPU voltage according to translation table that is loaded into + * the driver. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_DVFSTHRS_UPTHR_MASK 0x0FC00000 +#define MXC_DVFSTHRS_UPTHR_OFFSET 22 +#define MXC_DVFSTHRS_DNTHR_MASK 0x003F0000 +#define MXC_DVFSTHRS_DNTHR_OFFSET 16 +#define MXC_DVFSTHRS_PNCTHR_MASK 0x0000003F +#define MXC_DVFSTHRS_PNCTHR_OFFSET 0 + +#define MXC_DVFSCOUN_DNCNT_MASK 0x00FF0000 +#define MXC_DVFSCOUN_DNCNT_OFFSET 16 +#define MXC_DVFSCOUN_UPCNT_MASK 0x000000FF +#define MXC_DVFSCOUN_UPCNT_OFFSET 0 + +#define MXC_DVFSEMAC_EMAC_MASK 0x000001FF +#define MXC_DVFSEMAC_EMAC_OFFSET 0 + +#define MXC_DVFSCNTR_DVFEV 0x10000000 +#define MXC_DVFSCNTR_LBMI 0x08000000 +#define MXC_DVFSCNTR_LBFL 0x06000000 +#define MXC_DVFSCNTR_DVFIS 0x01000000 +#define MXC_DVFSCNTR_FSVAIM 0x00400000 +#define MXC_DVFSCNTR_FSVAI_MASK 0x00300000 +#define MXC_DVFSCNTR_FSVAI_OFFSET 20 +#define MXC_DVFSCNTR_WFIM 0x00080000 +#define MXC_DVFSCNTR_WFIM_OFFSET 19 +#define MXC_DVFSCNTR_MAXF_MASK 0x00040000 +#define MXC_DVFSCNTR_MAXF_OFFSET 18 +#define MXC_DVFSCNTR_MINF_MASK 0x00020000 +#define MXC_DVFSCNTR_MINF_OFFSET 17 +#define MXC_DVFSCNTR_LTBRSR_MASK 0x00000018 +#define MXC_DVFSCNTR_LTBRSR_OFFSET 3 +#define MXC_DVFSCNTR_DVFEN 0x00000001 + +extern int dvfs_core_is_active; +extern void setup_pll(void); +static struct mxc_dvfs_platform_data *dvfs_data; +static struct device *dvfs_dev; +static struct cpu_wp *cpu_wp_tbl; +int dvfs_core_resume; +int curr_wp; +int old_wp; + +extern int cpufreq_trig_needed; +struct timeval core_prev_intr; + +void dump_dvfs_core_regs(void); +static struct delayed_work dvfs_core_handler; + +/* + * Clock structures + */ +static struct clk *pll1_sw_clk; +static struct clk *cpu_clk; +static struct clk *dvfs_clk; +static struct regulator *core_regulator; + +extern int cpu_wp_nr; +#ifdef CONFIG_ARCH_MX51 +extern struct cpu_wp *(*get_cpu_wp)(int *wp); +#endif + +enum { + FSVAI_FREQ_NOCHANGE = 0x0, + FSVAI_FREQ_INCREASE, + FSVAI_FREQ_DECREASE, + FSVAI_FREQ_EMERG, +}; + +/* + * Load tracking buffer source: 1 for ld_add; 0 for pre_ld_add; 2 for after EMA + */ +#define DVFS_LTBRSR (2 << MXC_DVFSCNTR_LTBRSR_OFFSET) + +extern struct dvfs_wp dvfs_core_setpoint[2]; +extern int low_bus_freq_mode; +extern int high_bus_freq_mode; +extern int set_low_bus_freq(void); +extern int set_high_bus_freq(int high_bus_speed); +extern int low_freq_bus_used(void); +extern void propagate_rate(struct clk *tclk); + +DEFINE_SPINLOCK(mxc_dvfs_core_lock); + +static void dvfs_load_config(int set_point) +{ + u32 reg; + reg = 0; + + reg |= dvfs_core_setpoint[set_point].upthr << MXC_DVFSTHRS_UPTHR_OFFSET; + reg |= dvfs_core_setpoint[set_point].downthr << + MXC_DVFSTHRS_DNTHR_OFFSET; + reg |= dvfs_core_setpoint[set_point].panicthr; + __raw_writel(reg, dvfs_data->dvfs_thrs_reg_addr); + + reg = 0; + reg |= dvfs_core_setpoint[set_point].downcnt << + MXC_DVFSCOUN_DNCNT_OFFSET; + reg |= dvfs_core_setpoint[set_point].upcnt << MXC_DVFSCOUN_UPCNT_OFFSET; + __raw_writel(reg, dvfs_data->dvfs_coun_reg_addr); + + /* Set EMAC value */ + __raw_writel((dvfs_core_setpoint[set_point].emac << + MXC_DVFSEMAC_EMAC_OFFSET), + dvfs_data->dvfs_emac_reg_addr); + + +} + +static int set_cpu_freq(int wp) +{ + int arm_podf; + int podf; + int vinc = 0; + int ret = 0; + int org_cpu_rate; + unsigned long rate = 0; + int gp_volt = 0; + u32 reg; + u32 reg1; + unsigned long flags; + + if (cpu_wp_tbl[wp].pll_rate != cpu_wp_tbl[old_wp].pll_rate) { + org_cpu_rate = clk_get_rate(cpu_clk); + rate = cpu_wp_tbl[wp].cpu_rate; + + if (org_cpu_rate == rate) + return ret; + + gp_volt = cpu_wp_tbl[wp].cpu_voltage; + if (gp_volt == 0) + return ret; + + /*Set the voltage for the GP domain. */ + if (rate > org_cpu_rate) { + ret = regulator_set_voltage(core_regulator, gp_volt, + gp_volt); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET GP VOLTAGE\n"); + return ret; + } + udelay(dvfs_data->delay_time); + } + spin_lock_irqsave(&mxc_dvfs_core_lock, flags); + /* PLL_RELOCK, set ARM_FREQ_SHIFT_DIVIDER */ + reg = __raw_readl(dvfs_data->ccm_cdcr_reg_addr); + reg &= 0xFFFFFFFB; + __raw_writel(reg, dvfs_data->ccm_cdcr_reg_addr); + + setup_pll(); + /* START the GPC main control FSM */ + /* set VINC */ + reg = __raw_readl(dvfs_data->gpc_vcr_reg_addr); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + + if (rate > org_cpu_rate) + reg |= 1 << MXC_GPCVCR_VINC_OFFSET; + + reg |= (1 << MXC_GPCVCR_VCNTU_OFFSET) | + (1 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, dvfs_data->gpc_vcr_reg_addr); + + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + reg &= ~(MXC_GPCCNTR_ADU_MASK | MXC_GPCCNTR_FUPD_MASK); + reg |= MXC_GPCCNTR_FUPD; + reg |= MXC_GPCCNTR_ADU; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + while (__raw_readl(dvfs_data->gpc_cntr_reg_addr) & 0x4000) + udelay(10); + spin_unlock_irqrestore(&mxc_dvfs_core_lock, flags); + + if (rate < org_cpu_rate) { + ret = regulator_set_voltage(core_regulator, + gp_volt, gp_volt); + if (ret < 0) { + printk(KERN_DEBUG + "COULD NOT SET GP VOLTAGE!!!!\n"); + return ret; + } + udelay(dvfs_data->delay_time); + } + clk_set_rate(cpu_clk, rate); + } else { + podf = cpu_wp_tbl[wp].cpu_podf; + gp_volt = cpu_wp_tbl[wp].cpu_voltage; + + /* Change arm_podf only */ + /* set ARM_FREQ_SHIFT_DIVIDER */ + reg = __raw_readl(dvfs_data->ccm_cdcr_reg_addr); + reg &= 0xFFFFFFFB; + reg |= 1 << 2; + __raw_writel(reg, dvfs_data->ccm_cdcr_reg_addr); + + /* Get ARM_PODF */ + reg = __raw_readl(dvfs_data->ccm_cacrr_reg_addr); + arm_podf = reg & 0x07; + if (podf == arm_podf) { + printk(KERN_DEBUG + "No need to change freq and voltage!!!!\n"); + return 0; + } + + /* Check if FSVAI indicate freq up */ + if (podf < arm_podf) { + ret = regulator_set_voltage(core_regulator, + gp_volt, gp_volt); + if (ret < 0) { + printk(KERN_DEBUG + "COULD NOT SET GP VOLTAGE!!!!\n"); + return 0; + } + udelay(dvfs_data->delay_time); + vinc = 1; + } else { + vinc = 0; + } + + arm_podf = podf; + /* Set ARM_PODF */ + reg &= 0xFFFFFFF8; + reg |= arm_podf; + + reg1 = __raw_readl(dvfs_data->ccm_cdhipr_reg_addr); + if ((reg1 & 0x00010000) == 0) + __raw_writel(reg, dvfs_data->ccm_cacrr_reg_addr); + else { + printk(KERN_DEBUG "ARM_PODF still in busy!!!!\n"); + return 0; + } + + /* START the GPC main control FSM */ + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + reg |= MXC_GPCCNTR_FUPD; + /* ADU=1, select ARM domain */ + reg |= MXC_GPCCNTR_ADU; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + /* set VINC */ + reg = __raw_readl(dvfs_data->gpc_vcr_reg_addr); + reg &= + ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + reg |= (1 << MXC_GPCVCR_VCNTU_OFFSET) | + (100 << MXC_GPCVCR_VCNT_OFFSET) | + (vinc << MXC_GPCVCR_VINC_OFFSET); + __raw_writel(reg, dvfs_data->gpc_vcr_reg_addr); + + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + reg &= (~(MXC_GPCCNTR_ADU | MXC_GPCCNTR_FUPD)); + reg |= MXC_GPCCNTR_ADU | MXC_GPCCNTR_FUPD | MXC_GPCCNTR_STRT; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + + /* Wait for arm podf Enable */ + while ((__raw_readl(dvfs_data->gpc_cntr_reg_addr) & + MXC_GPCCNTR_STRT) == MXC_GPCCNTR_STRT) { + printk(KERN_DEBUG "Waiting arm_podf enabled!\n"); + udelay(10); + } + + if (vinc == 0) { + ret = regulator_set_voltage(core_regulator, + gp_volt, gp_volt); + if (ret < 0) { + printk(KERN_DEBUG + "COULD NOT SET GP VOLTAGE!!!!\n"); + return ret; + } + udelay(dvfs_data->delay_time); + } + + propagate_rate(pll1_sw_clk); + } +#if defined(CONFIG_CPU_FREQ) + cpufreq_trig_needed = 1; +#endif + old_wp = wp; + + return ret; +} + +static int start_dvfs(void) +{ + u32 reg; + unsigned long flags; + + if (dvfs_core_is_active) + return 0; + + spin_lock_irqsave(&mxc_dvfs_core_lock, flags); + + clk_enable(dvfs_clk); + + dvfs_load_config(0); + + /* config reg GPC_CNTR */ + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + + reg &= ~MXC_GPCCNTR_GPCIRQM; + /* GPCIRQ=1, select ARM IRQ */ + reg |= MXC_GPCCNTR_GPCIRQ_ARM; + /* ADU=1, select ARM domain */ + reg |= MXC_GPCCNTR_ADU; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + + /* Set PREDIV bits */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + reg = (reg & ~(dvfs_data->prediv_mask)); + reg |= (dvfs_data->prediv_val) << (dvfs_data->prediv_offset); + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + /* Enable DVFS interrupt */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + /* FSVAIM=0 */ + reg = (reg & ~MXC_DVFSCNTR_FSVAIM); + /* Set MAXF, MINF */ + reg = (reg & ~(MXC_DVFSCNTR_MAXF_MASK | MXC_DVFSCNTR_MINF_MASK)); + reg |= 1 << MXC_DVFSCNTR_MAXF_OFFSET; + /* Select ARM domain */ + reg |= MXC_DVFSCNTR_DVFIS; + /* Enable DVFS frequency adjustment interrupt */ + reg = (reg & ~MXC_DVFSCNTR_FSVAIM); + /* Set load tracking buffer register source */ + reg = (reg & ~MXC_DVFSCNTR_LTBRSR_MASK); + reg |= DVFS_LTBRSR; + /* Set DIV3CK */ + reg = (reg & ~(dvfs_data->div3ck_mask)); + reg |= (dvfs_data->div3ck_val) << (dvfs_data->div3ck_offset); + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + /* Enable DVFS */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + reg |= MXC_DVFSCNTR_DVFEN; + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + dvfs_core_is_active = 1; + + spin_unlock_irqrestore(&mxc_dvfs_core_lock, flags); + + printk(KERN_DEBUG "DVFS is started\n"); + + return 0; +} + +/*! + * This function is called for module initialization. + * It sets up the DVFS hardware. + * It sets default values for DVFS thresholds and counters. The default + * values was chosen from a set of different reasonable values. They was tested + * and the default values in the driver gave the best results. + * More work should be done to find optimal values. + * + * @return 0 if successful; non-zero otherwise. + * + */ +static int init_dvfs_controller(void) +{ + /* DVFS loading config */ + dvfs_load_config(0); + + return 0; +} + +static irqreturn_t dvfs_irq(int irq, void *dev_id) +{ + u32 reg; + + /* Check if DVFS0 (ARM) id requesting for freqency/voltage update */ + if ((__raw_readl(dvfs_data->gpc_cntr_reg_addr) & MXC_GPCCNTR_DVFS0CR) == + 0) + return IRQ_NONE; + + /* Mask DVFS irq */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + /* FSVAIM=1 */ + reg |= MXC_DVFSCNTR_FSVAIM; + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + /* Mask GPC1 irq */ + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + reg |= MXC_GPCCNTR_GPCIRQM | 0x1000000; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + + schedule_delayed_work(&dvfs_core_handler, 0); + return IRQ_HANDLED; +} + +static void dvfs_core_work_handler(struct work_struct *work) +{ + u32 fsvai; + u32 reg; + u32 curr_cpu; + int ret = 0; + int maxf = 0, minf = 0; + int low_freq_bus_ready = 0; + int bus_incr = 0, cpu_dcr = 0; + + low_freq_bus_ready = low_freq_bus_used(); + + /* Check DVFS frequency adjustment interrupt status */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + fsvai = (reg & MXC_DVFSCNTR_FSVAI_MASK) >> MXC_DVFSCNTR_FSVAI_OFFSET; + /* Check FSVAI, FSVAI=0 is error */ + if (fsvai == FSVAI_FREQ_NOCHANGE) { + /* Do nothing. Freq change is not required */ + goto END; + } + curr_cpu = clk_get_rate(cpu_clk); + + /* If FSVAI indicate freq down, + check arm-clk is not in lowest frequency 200 MHz */ + if (fsvai == FSVAI_FREQ_DECREASE) { + if (curr_cpu == cpu_wp_tbl[cpu_wp_nr - 1].cpu_rate) { + minf = 1; + if (low_bus_freq_mode) + goto END; + } else { + /* freq down */ + curr_wp++; + if (curr_wp >= cpu_wp_nr) { + curr_wp = cpu_wp_nr - 1; + goto END; + } + + if (curr_wp == cpu_wp_nr - 1 && !low_freq_bus_ready) { + minf = 1; + dvfs_load_config(1); + } else { + cpu_dcr = 1; + } + } + } else { + if (curr_cpu == cpu_wp_tbl[0].cpu_rate) { + maxf = 1; + goto END; + } else { + if (low_bus_freq_mode) { + /* bump up LP freq first. */ + bus_incr = 1; + dvfs_load_config(2); + } else { + /* freq up */ + curr_wp = 0; + maxf = 1; + dvfs_load_config(0); + } + } + } + + low_freq_bus_ready = low_freq_bus_used(); + if ((curr_wp == cpu_wp_nr - 1) && (!low_bus_freq_mode) + && (low_freq_bus_ready) && !bus_incr) { + if (cpu_dcr) + ret = set_cpu_freq(curr_wp); + if (!cpu_dcr) { + set_low_bus_freq(); + dvfs_load_config(3); + } else { + dvfs_load_config(2); + cpu_dcr = 0; + } + } else { + if (low_bus_freq_mode) + set_high_bus_freq(0); + + if (!bus_incr) + ret = set_cpu_freq(curr_wp); + bus_incr = 0; + } + + +END: /* Set MAXF, MINF */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + reg = (reg & ~(MXC_DVFSCNTR_MAXF_MASK | MXC_DVFSCNTR_MINF_MASK)); + reg |= maxf << MXC_DVFSCNTR_MAXF_OFFSET; + reg |= minf << MXC_DVFSCNTR_MINF_OFFSET; + + /* Enable DVFS interrupt */ + /* FSVAIM=0 */ + reg = (reg & ~MXC_DVFSCNTR_FSVAIM); + reg |= FSVAI_FREQ_NOCHANGE; + /* LBFL=1 */ + reg = (reg & ~MXC_DVFSCNTR_LBFL); + reg |= MXC_DVFSCNTR_LBFL; + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + /*Unmask GPC1 IRQ */ + reg = __raw_readl(dvfs_data->gpc_cntr_reg_addr); + reg &= ~MXC_GPCCNTR_GPCIRQM; + __raw_writel(reg, dvfs_data->gpc_cntr_reg_addr); + +#if defined(CONFIG_CPU_FREQ) + if (cpufreq_trig_needed == 1) { + cpufreq_trig_needed = 0; + cpufreq_update_policy(0); + } +#endif +} + + +/*! + * This function disables the DVFS module. + */ +static void stop_dvfs(void) +{ + u32 reg = 0; + unsigned long flags; + u32 curr_cpu; + + if (dvfs_core_is_active) { + + /* Mask dvfs irq, disable DVFS */ + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + /* FSVAIM=1 */ + reg |= MXC_DVFSCNTR_FSVAIM; + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + curr_wp = 0; + if (!high_bus_freq_mode) + set_high_bus_freq(1); + + curr_cpu = clk_get_rate(cpu_clk); + if (curr_cpu != cpu_wp_tbl[curr_wp].cpu_rate) { + set_cpu_freq(curr_wp); +#if defined(CONFIG_CPU_FREQ) + if (cpufreq_trig_needed == 1) { + cpufreq_trig_needed = 0; + cpufreq_update_policy(0); + } +#endif + } + spin_lock_irqsave(&mxc_dvfs_core_lock, flags); + + reg = __raw_readl(dvfs_data->dvfs_cntr_reg_addr); + reg = (reg & ~MXC_DVFSCNTR_DVFEN); + __raw_writel(reg, dvfs_data->dvfs_cntr_reg_addr); + + spin_unlock_irqrestore(&mxc_dvfs_core_lock, flags); + + dvfs_core_is_active = 0; + + clk_disable(dvfs_clk); + } + + printk(KERN_DEBUG "DVFS is stopped\n"); +} + +void dump_dvfs_core_regs() +{ + struct timeval cur; + u32 diff = 0; + if (core_prev_intr.tv_sec == 0) + do_gettimeofday(&core_prev_intr); + else { + do_gettimeofday(&cur); + diff = (cur.tv_sec - core_prev_intr.tv_sec)*1000000 + + (cur.tv_usec - core_prev_intr.tv_usec); + core_prev_intr = cur; + } + if (diff < 90000) + printk(KERN_DEBUG "diff = %d\n", diff); + + printk(KERN_INFO "THRS = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr)); + printk(KERN_INFO "COUNT = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x04)); + printk(KERN_INFO "SIG1 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x08)); + printk(KERN_INFO "SIG0 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x0c)); + printk(KERN_INFO "GPC0 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x10)); + printk(KERN_INFO "GPC1 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x14)); + printk(KERN_INFO "GPBT = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x18)); + printk(KERN_INFO "EMAC = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x1c)); + printk(KERN_INFO "CNTR = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x20)); + printk(KERN_INFO "LTR0_0 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x24)); + printk(KERN_INFO "LTR0_1 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x28)); + printk(KERN_INFO "LTR1_0 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x2c)); + printk(KERN_DEBUG "LTR1_1 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x30)); + printk(KERN_INFO "PT0 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x34)); + printk(KERN_INFO "PT1 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x38)); + printk(KERN_INFO "PT2 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x3c)); + printk(KERN_INFO "PT3 = 0x%08x\n", + __raw_readl(dvfs_data->dvfs_thrs_reg_addr+0x40)); +} + +static ssize_t downthreshold_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%u\n", dvfs_core_setpoint[0].downthr); +} + +static ssize_t downthreshold_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret = 0; + int val; + ret = sscanf(buf, "%u", &val); + dvfs_core_setpoint[0].downthr = val; + + return size; +} + +static ssize_t downcount_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%u\n", dvfs_core_setpoint[0].downcnt); +} + +static ssize_t downcount_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int ret = 0; + int val; + ret = sscanf(buf, "%u", &val); + dvfs_core_setpoint[0].downcnt = val; + + return size; +} + + +static ssize_t dvfs_enable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (dvfs_core_is_active) + return sprintf(buf, "DVFS is enabled\n"); + else + return sprintf(buf, "DVFS is disabled\n"); +} + +static ssize_t dvfs_enable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "1") != NULL) { + if (start_dvfs() != 0) + printk(KERN_ERR "Failed to start DVFS\n"); + } else if (strstr(buf, "0") != NULL) + stop_dvfs(); + + return size; +} + +static ssize_t dvfs_regs_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (dvfs_core_is_active) + dump_dvfs_core_regs(); + return 0; +} + +static ssize_t dvfs_regs_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + if (dvfs_core_is_active) + dump_dvfs_core_regs(); + return 0; + + return size; +} + +static DEVICE_ATTR(enable, 0644, dvfs_enable_show, dvfs_enable_store); +static DEVICE_ATTR(show_regs, 0644, dvfs_regs_show, dvfs_regs_store); + +static DEVICE_ATTR(down_threshold, 0644, downthreshold_show, + downthreshold_store); +static DEVICE_ATTR(down_count, 0644, downcount_show, downcount_store); + +/*! + * This is the probe routine for the DVFS driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + */ +static int __devinit mxc_dvfs_core_probe(struct platform_device *pdev) +{ + int err = 0; + struct resource *res; + int irq; + + printk(KERN_INFO "mxc_dvfs_core_probe\n"); + dvfs_dev = &pdev->dev; + dvfs_data = pdev->dev.platform_data; + + INIT_DELAYED_WORK(&dvfs_core_handler, dvfs_core_work_handler); + + pll1_sw_clk = clk_get(NULL, "pll1_sw_clk"); + if (IS_ERR(pll1_sw_clk)) { + printk(KERN_INFO "%s: failed to get pll1_sw_clk\n", __func__); + return PTR_ERR(pll1_sw_clk); + } + + cpu_clk = clk_get(NULL, dvfs_data->clk1_id); + if (IS_ERR(cpu_clk)) { + printk(KERN_ERR "%s: failed to get cpu clock\n", __func__); + return PTR_ERR(cpu_clk); + } + + dvfs_clk = clk_get(NULL, dvfs_data->clk2_id); + if (IS_ERR(dvfs_clk)) { + printk(KERN_ERR "%s: failed to get dvfs clock\n", __func__); + return PTR_ERR(dvfs_clk); + } + + core_regulator = regulator_get(NULL, dvfs_data->reg_id); + if (IS_ERR(core_regulator)) { + clk_put(cpu_clk); + clk_put(dvfs_clk); + printk(KERN_ERR "%s: failed to get gp regulator\n", __func__); + return PTR_ERR(core_regulator); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + err = -ENODEV; + goto err1; + } + + /* + * Request the DVFS interrupt + */ + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + err = irq; + goto err1; + } + + /* request the DVFS interrupt */ + err = request_irq(irq, dvfs_irq, IRQF_SHARED, "dvfs", dvfs_dev); + if (err) + printk(KERN_ERR + "DVFS: Unable to attach to DVFS interrupt,err = %d", + err); + + clk_enable(dvfs_clk); + err = init_dvfs_controller(); + if (err) { + printk(KERN_ERR "DVFS: Unable to initialize DVFS"); + return err; + } + clk_disable(dvfs_clk); + + err = sysfs_create_file(&dvfs_dev->kobj, &dev_attr_enable.attr); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for DVFS"); + return err; + } + + err = sysfs_create_file(&dvfs_dev->kobj, &dev_attr_show_regs.attr); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for DVFS"); + return err; + } + + + err = sysfs_create_file(&dvfs_dev->kobj, &dev_attr_down_threshold.attr); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for DVFS"); + return err; + } + + err = sysfs_create_file(&dvfs_dev->kobj, &dev_attr_down_count.attr); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for DVFS"); + return err; + } + + /* Set the current working point. */ + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + old_wp = 0; + curr_wp = 0; + dvfs_core_resume = 0; + cpufreq_trig_needed = 0; + + return err; + +err1: + dev_err(&pdev->dev, "Failed to probe DVFS CORE\n"); + return err; +} + +/*! + * This function is called to put DVFS in a low power state. + * + * @param pdev the device structure + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_dvfs_core_suspend(struct platform_device *pdev, + pm_message_t state) +{ + if (dvfs_core_is_active) { + dvfs_core_resume = 1; + stop_dvfs(); + } + + return 0; +} + +/*! + * This function is called to resume the MU from a low power state. + * + * @param dev the device structure + * @param level the stage in device suspension process that we want the + * device to be put in + * + * @return The function always returns 0. + */ +static int mxc_dvfs_core_resume(struct platform_device *pdev) +{ + if (dvfs_core_resume) { + dvfs_core_resume = 0; + start_dvfs(); + } + + return 0; +} + +static struct platform_driver mxc_dvfs_core_driver = { + .driver = { + .name = "mxc_dvfs_core", + }, + .probe = mxc_dvfs_core_probe, + .suspend = mxc_dvfs_core_suspend, + .resume = mxc_dvfs_core_resume, +}; + +static int __init dvfs_init(void) +{ + if (platform_driver_register(&mxc_dvfs_core_driver) != 0) { + printk(KERN_ERR "mxc_dvfs_core_driver register failed\n"); + return -ENODEV; + } + + dvfs_core_is_active = 0; + printk(KERN_INFO "DVFS driver module loaded\n"); + return 0; +} + +static void __exit dvfs_cleanup(void) +{ + stop_dvfs(); + + /* release the DVFS interrupt */ + free_irq(MXC_INT_GPC1, NULL); + + sysfs_remove_file(&dvfs_dev->kobj, &dev_attr_enable.attr); + + /* Unregister the device structure */ + platform_driver_unregister(&mxc_dvfs_core_driver); + + clk_put(cpu_clk); + clk_put(dvfs_clk); + + dvfs_core_is_active = 0; + printk(KERN_INFO "DVFS driver module unloaded\n"); + +} + +module_init(dvfs_init); +module_exit(dvfs_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("DVFS driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/cpufreq.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/cpufreq.c @@ -0,0 +1,330 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file cpufreq.c + * + * @brief A driver for the Freescale Semiconductor i.MXC CPUfreq module. + * + * The CPUFREQ driver is for controling CPU frequency. It allows you to change + * the CPU clock speed on the fly. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int cpu_freq_khz_min; +int cpu_freq_khz_max; +int arm_lpm_clk; +int arm_normal_clk; +int cpufreq_suspended; +int cpufreq_trig_needed; + +static struct clk *cpu_clk; +static struct regulator *gp_regulator; +static struct cpu_wp *cpu_wp_tbl; +static struct cpufreq_frequency_table imx_freq_table[4]; +extern int low_bus_freq_mode; +extern int high_bus_freq_mode; +extern int dvfs_core_is_active; +extern int cpu_wp_nr; +extern char *gp_reg_id; + +extern int set_low_bus_freq(void); +extern int set_high_bus_freq(int high_bus_speed); +extern int low_freq_bus_used(void); + +#ifdef CONFIG_ARCH_MX51 +extern struct cpu_wp *(*get_cpu_wp)(int *wp); +#endif + +int set_cpu_freq(int freq) +{ + int ret = 0; + int org_cpu_rate; + int gp_volt = 0; + int i; + + org_cpu_rate = clk_get_rate(cpu_clk); + if (org_cpu_rate == freq) + return ret; + + for (i = 0; i < cpu_wp_nr; i++) { + if (freq == cpu_wp_tbl[i].cpu_rate) + gp_volt = cpu_wp_tbl[i].cpu_voltage; + } + + if (gp_volt == 0) + return ret; + + /*Set the voltage for the GP domain. */ + if (freq > org_cpu_rate) { + ret = regulator_set_voltage(gp_regulator, gp_volt, gp_volt); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET GP VOLTAGE!!!!\n"); + return ret; + } + } + + ret = clk_set_rate(cpu_clk, freq); + if (ret != 0) { + printk(KERN_DEBUG "cannot set CPU clock rate\n"); + return ret; + } + + if (freq < org_cpu_rate) { + ret = regulator_set_voltage(gp_regulator, gp_volt, gp_volt); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET GP VOLTAGE!!!!\n"); + return ret; + } + } + + return ret; +} + +static int mxc_verify_speed(struct cpufreq_policy *policy) +{ + if (policy->cpu != 0) + return -EINVAL; + + return cpufreq_frequency_table_verify(policy, imx_freq_table); +} + +static unsigned int mxc_get_speed(unsigned int cpu) +{ + if (cpu) + return 0; + + return clk_get_rate(cpu_clk) / 1000; +} + +static int calc_frequency_khz(int target, unsigned int relation) +{ + int i; + + if ((target * 1000) == clk_get_rate(cpu_clk)) + return target; + + if (relation == CPUFREQ_RELATION_H) { + for (i = cpu_wp_nr - 1; i >= 0; i--) { + if (imx_freq_table[i].frequency <= target) + return imx_freq_table[i].frequency; + } + } else if (relation == CPUFREQ_RELATION_L) { + for (i = 0; i < cpu_wp_nr; i++) { + if (imx_freq_table[i].frequency >= target) + return imx_freq_table[i].frequency; + } + } + printk(KERN_ERR "Error: No valid cpufreq relation\n"); + return cpu_freq_khz_max; +} + +static int mxc_set_target(struct cpufreq_policy *policy, + unsigned int target_freq, unsigned int relation) +{ + struct cpufreq_freqs freqs; + int freq_Hz; + int low_freq_bus_ready = 0; + int ret = 0; + + if (dvfs_core_is_active || cpufreq_suspended) { + target_freq = clk_get_rate(cpu_clk) / 1000; + freq_Hz = calc_frequency_khz(target_freq, relation) * 1000; + if (freq_Hz == arm_lpm_clk) + freqs.old = cpu_wp_tbl[cpu_wp_nr - 2].cpu_rate / 1000; + else + freqs.old = arm_lpm_clk / 1000; + + freqs.new = freq_Hz / 1000; + freqs.cpu = 0; + freqs.flags = 0; + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + return ret; + } + /* + * Some governors do not respects CPU and policy lower limits + * which leads to bad things (division by zero etc), ensure + * that such things do not happen. + */ + if (target_freq < policy->cpuinfo.min_freq) + target_freq = policy->cpuinfo.min_freq; + + if (target_freq < policy->min) + target_freq = policy->min; + + freq_Hz = calc_frequency_khz(target_freq, relation) * 1000; + + freqs.old = clk_get_rate(cpu_clk) / 1000; + freqs.new = freq_Hz / 1000; + freqs.cpu = 0; + freqs.flags = 0; + low_freq_bus_ready = low_freq_bus_used(); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + if (!dvfs_core_is_active) { + if ((freq_Hz == arm_lpm_clk) && (!low_bus_freq_mode) + && (low_freq_bus_ready)) { + if (freqs.old != freqs.new) + ret = set_cpu_freq(freq_Hz); + set_low_bus_freq(); + + } else { + set_high_bus_freq(0); + ret = set_cpu_freq(freq_Hz); + } + } + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return ret; +} + +static int __init mxc_cpufreq_driver_init(struct cpufreq_policy *policy) +{ + int ret; + int i; + + printk(KERN_INFO "i.MXC CPU frequency driver\n"); + + if (policy->cpu != 0) + return -EINVAL; + + cpu_clk = clk_get(NULL, "cpu_clk"); + if (IS_ERR(cpu_clk)) { + printk(KERN_ERR "%s: failed to get cpu clock\n", __func__); + return PTR_ERR(cpu_clk); + } + + gp_regulator = regulator_get(NULL, gp_reg_id); + if (IS_ERR(gp_regulator)) { + clk_put(cpu_clk); + printk(KERN_ERR "%s: failed to get gp regulator\n", __func__); + return PTR_ERR(gp_regulator); + } + + /* Set the current working point. */ + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + + cpu_freq_khz_min = cpu_wp_tbl[0].cpu_rate / 1000; + cpu_freq_khz_max = cpu_wp_tbl[0].cpu_rate / 1000; + + for (i = 0; i < cpu_wp_nr; i++) { + imx_freq_table[cpu_wp_nr - 1 - i].index = cpu_wp_nr - i; + imx_freq_table[cpu_wp_nr - 1 - i].frequency = + cpu_wp_tbl[i].cpu_rate / 1000; + + if ((cpu_wp_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min) + cpu_freq_khz_min = cpu_wp_tbl[i].cpu_rate / 1000; + + if ((cpu_wp_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max) + cpu_freq_khz_max = cpu_wp_tbl[i].cpu_rate / 1000; + } + + imx_freq_table[i].index = 0; + imx_freq_table[i].frequency = CPUFREQ_TABLE_END; + + policy->cur = clk_get_rate(cpu_clk) / 1000; + policy->governor = CPUFREQ_DEFAULT_GOVERNOR; + policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min; + policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max; + + arm_lpm_clk = cpu_freq_khz_min * 1000; + arm_normal_clk = cpu_freq_khz_max * 1000; + + /* Manual states, that PLL stabilizes in two CLK32 periods */ + policy->cpuinfo.transition_latency = 10; + + ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table); + + if (ret < 0) { + clk_put(cpu_clk); + regulator_put(gp_regulator); + printk(KERN_ERR "%s: failed to register i.MXC CPUfreq\n", + __func__); + return ret; + } + + cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu); + return 0; +} + +static int mxc_cpufreq_suspend(struct cpufreq_policy *policy, + pm_message_t state) +{ + return 0; +} + +static int mxc_cpufreq_resume(struct cpufreq_policy *policy) +{ + return 0; +} + +static int mxc_cpufreq_driver_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_put_attr(policy->cpu); + + /* Reset CPU to 665MHz */ + if (!dvfs_core_is_active) + set_cpu_freq(arm_normal_clk); + if (!high_bus_freq_mode) + set_high_bus_freq(1); + + clk_put(cpu_clk); + regulator_put(gp_regulator); + return 0; +} + +static struct cpufreq_driver mxc_driver = { + .flags = CPUFREQ_STICKY, + .verify = mxc_verify_speed, + .target = mxc_set_target, + .get = mxc_get_speed, + .init = mxc_cpufreq_driver_init, + .exit = mxc_cpufreq_driver_exit, + .suspend = mxc_cpufreq_suspend, + .resume = mxc_cpufreq_resume, + .name = "imx", +}; + +static int __devinit mxc_cpufreq_init(void) +{ + return cpufreq_register_driver(&mxc_driver); +} + +static void mxc_cpufreq_exit(void) +{ + cpufreq_unregister_driver(&mxc_driver); +} + +module_init(mxc_cpufreq_init); +module_exit(mxc_cpufreq_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CPUfreq driver for i.MX"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/snoop.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/snoop.c @@ -0,0 +1,133 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +#ifdef M4IF_BASE_ADDR +#define SNOOP_V2 +#define MAX_SNOOP 2 +#define g_snoop_base (IO_ADDRESS(M4IF_BASE_ADDR) + 0x4C) +#elif defined(M3IF_BASE_ADDR) +#define MAX_SNOOP 1 +#define g_snoop_base (IO_ADDRESS(M3IF_BASE_ADDR) + 0x28) +#else +#define MAX_SNOOP 0 +#define g_snoop_base 0 +#endif + +/* M3IF Snooping Configuration Register 0 (M3IFSCFG0) READ/WRITE*/ +#define SBAR(x) (x * 0x14) +/* M3IF Snooping Configuration Register 1 (M3IFSCFG1) READ/WRITE*/ +#define SERL(x) ((x * 0x14) + 0x4) +/* M3IF Snooping Configuration Register 2 (M3IFSCFG2) READ/WRITE*/ +#define SERH(x) ((x * 0x14) + 0x8) +/* M3IF Snooping Status Register 0 (M3IFSSR0) READ/WRITE */ +#define SSRL(x) ((x * 0x14) + 0xC) +/* M3IF Snooping Status Register 1 (M3IFSSR1) */ +#define SSRH(x) ((x * 0x14) + 0x10) + +#if MAX_SNOOP + +int mxc_snoop_set_config(u32 num, unsigned long base, int size) +{ + u32 reg; + uint32_t msb; + uint32_t seg_size; + uint32_t window_size = 0; + int i; + + if (num >= MAX_SNOOP) { + return -EINVAL; + } + + /* Setup M3IF for snooping */ + if (size) { + + if (base == 0) { + return -EINVAL; + } + + msb = fls(size); + if (!(size & ((1UL << msb) - 1))) + msb--; /* Already aligned to power 2 */ + if (msb < 11) + msb = 11; + + window_size = (1UL << msb); + seg_size = window_size / 64; + + msb -= 11; + + reg = base & ~((1UL << msb) - 1); + reg |= msb << 1; + reg |= 1; /* enable snooping */ + reg |= 0x80; /* Set pulse width to default (M4IF only) */ + __raw_writel(reg, g_snoop_base + SBAR(num)); + + reg = 0; + for (i = 0; i < 32; i++) { + if (i * seg_size >= size) + break; + reg |= 1UL << i; + } + __raw_writel(reg, g_snoop_base + SERL(num)); + + reg = 0; + for (i = 32; i < 64; i++) { + if (i * seg_size >= size) + break; + reg |= 1UL << (i - 32); + } + __raw_writel(reg, g_snoop_base + SERH(num)); + + pr_debug + ("Snooping unit # %d enabled: window size = 0x%X, M3IFSCFG0=0x%08X, M3IFSCFG1=0x%08X, M3IFSCFG2=0x%08X\n", + num, window_size, __raw_readl(g_snoop_base + SBAR(num)), + __raw_readl(g_snoop_base + SERL(num)), + __raw_readl(g_snoop_base + SERH(num))); + } else { + __raw_writel(0, g_snoop_base + SBAR(num)); + } + + return window_size; +} + +EXPORT_SYMBOL(mxc_snoop_set_config); + +int mxc_snoop_get_status(u32 num, u32 * statl, u32 * stath) +{ + if (num >= MAX_SNOOP) { + return -EINVAL; + } + + *statl = __raw_readl(g_snoop_base + SSRL(num)); + *stath = __raw_readl(g_snoop_base + SSRH(num)); + /* DPRINTK("status = 0x%08X%08X\n", stat[1], stat[0]); */ + +#ifdef SNOOP_V2 + __raw_writel(*statl, g_snoop_base + SSRL(num)); + __raw_writel(*stath, g_snoop_base + SSRH(num)); +#else + __raw_writel(0x0, g_snoop_base + SSRL(num)); + __raw_writel(0x0, g_snoop_base + SSRH(num)); +#endif + return 0; +} + +EXPORT_SYMBOL(mxc_snoop_get_status); + +#endif /* MAX_SNOOP */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/dvfs_per.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/dvfs_per.c @@ -0,0 +1,903 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dvfs_per.c + * + * @brief A simplied driver for the Freescale Semiconductor MXC DVFS module. + * + * Upon initialization, the DVFS driver initializes the DVFS hardware + * sets up driver nodes attaches to the DVFS interrupt and initializes internal + * data structures. When the DVFS interrupt occurs the driver checks the cause + * of the interrupt (lower frequency, increase frequency or emergency) and + * changes the CPU voltage according to translation table that is loaded into + * the driver. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#if defined(CONFIG_ARCH_MX37) +#include +#endif + +#define DRIVER_NAME "DVFSPER" +#define DVFS_PER_DEBUG 0 + +static int dvfs_per_stop; +static int dvfs_per_low_freq; +static int dvfs_per_suspended; +static volatile int freq_increased; +static int cur_setpoint; +static struct delayed_work dvfs_per_work; +static struct clk *dvfs_clk; +static struct clk *main_bus_clk; +static struct clk *pll2; +static struct clk *lpapm; +static struct clk *cpu_clk; +static struct clk *axi_b_clk; +static struct clk *ahb_clk; +static struct clk *ddr_hf_clk; +static struct regulator *lp_regulator; + +/* Flag used to indicate if dvfs_per is active. */ +static int dvfs_per_is_active; +static int dvfs_per_is_paused; +static int ipu_freq_scaled; + +struct dvfsper_device *dvfsper_device_data; +/* DVFS platform data pointer */ +struct mxc_dvfsper_data *dvfsper_plt_data; +struct timeval prev_intr; + +int start_dvfs_per(void); +void stop_dvfs_per(void); +int dvfs_per_active(void); +int dvfs_per_divider_active(void); +int dvfs_per_pixel_clk_limit(); + +extern int low_bus_freq_mode; +extern int bus_freq_scaling_is_active; + + +/*! + * In case the MXC device has multiple DVFS modules, this structure is used to + * store information specific to each DVFS module. + */ +struct dvfsper_device { + /* DVFS delayed work */ + struct delayed_work dvfs_work; + /* DVFS regulator */ + struct regulator *dvfs_reg; + /* DVFS clock */ + struct clk *dvfs_clk; + /* The interrupt number used by the DVFS device */ + int irq; +}; +struct dvfs_wp dvfs_per_setpoint[] = {{33, 7, 33, 20, 40, 0x10}, + {18, 0, 33, 25, 10, 0x10}, + /* When LP is at 24MHz */ + {8, 0, 10, 5, 5, 0x2E},}; + +enum { + FSVAI_FREQ_NOCHANGE = 0x0, + FSVAI_FREQ_INCREASE, + FSVAI_FREQ_DECREASE, + FSVAI_FREQ_EMERG, +}; + +#define LOW_BUS_FREQ 24000000 + +DEFINE_SPINLOCK(mxc_dvfs_per_lock); + +static void dvfs_per_load_config(void) +{ + u32 reg; + + reg = __raw_readl(MXC_DVFS_PER_LTR0); + reg &= ~MXC_DVFSLTR0_UPTHR_MASK; + reg &= ~MXC_DVFSLTR0_DNTHR_MASK; + reg |= dvfs_per_setpoint[cur_setpoint].upthr << + MXC_DVFSLTR0_UPTHR_OFFSET; + reg |= dvfs_per_setpoint[cur_setpoint].downthr << + MXC_DVFSLTR0_DNTHR_OFFSET; + __raw_writel(reg, MXC_DVFS_PER_LTR0); + + reg = __raw_readl(MXC_DVFS_PER_LTR1); + reg &= ~MXC_DVFSLTR1_PNCTHR_MASK; + reg &= ~MXC_DVFSLTR1_DNCNT_MASK; + reg &= ~MXC_DVFSLTR1_UPCNT_MASK; + reg |= dvfs_per_setpoint[cur_setpoint].downcnt << + MXC_DVFSLTR1_DNCNT_OFFSET; + reg |= dvfs_per_setpoint[cur_setpoint].upcnt << + MXC_DVFSLTR1_UPCNT_OFFSET; + reg |= dvfs_per_setpoint[cur_setpoint].panicthr << + MXC_DVFSLTR1_PNCTHR_OFFSET; + __raw_writel(reg, MXC_DVFS_PER_LTR1); + + reg = dvfs_per_setpoint[cur_setpoint].emac << + MXC_DVFSLTR2_EMAC_OFFSET; + __raw_writel(reg, MXC_DVFS_PER_LTR2); +} + +/*! + * This function is called for module initialization. + * It sets up the DVFS hardware. + * It sets default values for DVFS thresholds and counters. The default + * values was chosen from a set of different reasonable values. They was tested + * and the default values in the driver gave the best results. + * More work should be done to find optimal values. + * + * @return 0 if successful; non-zero otherwise. + * + */ +static int init_dvfs_per_controller(void) +{ + u32 reg; + + reg = __raw_readl(MXC_DVFS_PER_LTR0); + /* DIV3CLK */ + reg &= ~dvfsper_plt_data->div3_mask; + reg |= (dvfsper_plt_data->div3_div << + dvfsper_plt_data->div3_offset); + __raw_writel(reg, MXC_DVFS_PER_LTR0); + + reg = __raw_readl(MXC_DVFS_PER_LTR1); + /* Set load tracking buffer register source */ + reg &= ~MXC_DVFSLTR1_LTBRSR; + reg |= MXC_DVFSLTR1_LTBRSR; + reg &= ~MXC_DVFSLTR1_LTBRSH; + __raw_writel(reg, MXC_DVFS_PER_LTR1); + + /* Enable all the peripheral signals, but VPU and IPU panic*/ + __raw_writel(0x30000, MXC_DVFS_PER_PMCR1); + /* Disable weighted load tracking signals */ + __raw_writel(0, MXC_DVFS_PER_LTR3); + + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg &= ~MXC_DVFSPMCR0_DVFEV; + reg |= MXC_DVFSPMCR0_LBMI; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + /* DVFS loading config */ + dvfs_per_load_config(); + return 0; +} + +#if DVFS_PER_DEBUG +static void dump_dvfs_per_regs(void) +{ + struct timeval cur; + u32 diff = 0; + if (prev_intr.tv_sec == 0) + do_gettimeofday(&prev_intr); + else { + do_gettimeofday(&cur); + diff = (cur.tv_sec - prev_intr.tv_sec)*1000000 + + (cur.tv_usec - prev_intr.tv_usec); + prev_intr = cur; + } + if (diff < 90000) + printk(KERN_INFO "diff = %d\n", diff); + + printk(KERN_INFO "LTRO = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTR0)); + printk(KERN_INFO "LTR1 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTR1)); + printk(KERN_INFO "LTR2 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTR2)); + printk(KERN_INFO "LTR3 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTR3)); + printk(KERN_INFO "LBTR0 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTBR0)); + printk(KERN_INFO "LBTR1 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_LTBR1)); + printk(KERN_INFO "PMCR0 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_PMCR0)); + printk(KERN_INFO "PMCR1 = 0x%08x\n", __raw_readl(MXC_DVFS_PER_PMCR1)); +} +#endif + +static irqreturn_t dvfs_per_irq(int irq, void *dev_id) +{ + u32 reg; + + /* Check if DVFS1 (PER) id requesting for freqency/voltage update */ + if ((__raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr) & + MXC_GPCCNTR_DVFS1CR) == 0) + return IRQ_NONE; + /* Mask DVFS irq */ + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + /* FSVAIM=1 */ + reg |= MXC_DVFSPMCR0_FSVAIM; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + /* Mask GPC1 irq */ + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg |= MXC_GPCCNTR_GPCIRQM | 0x1000000; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + if (reg & MXC_DVFSPMCR0_LBFL) { + /* clear LBFL */ + reg = (reg & ~MXC_DVFSPMCR0_LBFL); + reg |= MXC_DVFSPMCR0_LBFL; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + } + schedule_delayed_work(&dvfs_per_work, 0); + return IRQ_HANDLED; +} + +static void dvfs_per_handler(struct work_struct *work) +{ + u32 fsvai; + u32 reg; + u32 ret; + unsigned long flags; + int retry = 20; + + /* Check DVFS frequency adjustment interrupt status */ + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + fsvai = (reg & MXC_DVFSPMCR0_FSVAI_MASK) >> MXC_DVFSPMCR0_FSVAI_OFFSET; + /* Check FSVAI, FSVAI=0 is error */ + if (fsvai == FSVAI_FREQ_NOCHANGE) { + /* Do nothing. Freq change is not required */ + goto END; + } + +#if DVFS_PER_DEBUG + dump_dvfs_per_regs(); +#endif + /* If FSVAI indicate freq down. */ + if (fsvai == FSVAI_FREQ_DECREASE) { + if (cpu_is_mx51()) { + /*Change the DDR freq to 133Mhz. */ + clk_set_rate(ddr_hf_clk, + clk_round_rate(ddr_hf_clk, 133000000)); + } + +#ifndef DVFS_SW_WORKAROUND + spin_lock_irqsave(&mxc_dvfs_per_lock, flags); + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg &= ~MXC_DVFSPMCR0_UDCS; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + /* Set the peripheral divider */ + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg &= ~(MXC_GPCCNTR_ADU_MASK | MXC_GPCCNTR_FUPD_MASK); + reg |= MXC_GPCCNTR_FUPD; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + reg = __raw_readl(dvfsper_plt_data->gpc_vcr_reg_addr); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + reg |= (1 << MXC_GPCVCR_VCNTU_OFFSET) | + (1 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, dvfsper_plt_data->gpc_vcr_reg_addr); + + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + retry = 10; + while ((__raw_readl( + dvfsper_plt_data->gpc_cntr_reg_addr) & 0x4000) + && retry > 0) { + udelay(10); + retry--; + } + spin_unlock_irqrestore(&mxc_dvfs_per_lock, flags); +#else + /*Set the frequencies manually */ + rate = clk_get_rate(axi_b_clk); + clk_set_rate(axi_b_clk, clk_round_rate(axi_b_clk, rate/2)); + + rate = clk_get_rate(ahb_clk); + clk_set_rate(ahb_clk, clk_round_rate(ahb_clk, rate/2)); +#endif + dvfs_per_low_freq = 1; + if (clk_get_rate(main_bus_clk) == LOW_BUS_FREQ) { + cur_setpoint = 2; + } else { +#if defined(CONFIG_ARCH_MX37) + dptc_suspend(DPTC_LP_ID); +#endif + cur_setpoint = 1; +#ifndef DVFS_SW_WORKAROUND + clk_set_parent(main_bus_clk, clk_get(NULL, "pll2")); +#endif + } +#ifndef DVFS_SW_WORKAROUND + /* Drop the LP domain voltage */ + ret = regulator_set_voltage(lp_regulator, + dvfsper_plt_data->lp_low, + dvfsper_plt_data->lp_low); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET LP VOLTAGE\n"); + return; + } + udelay(100); +#endif + dvfs_per_load_config(); + } else if ((fsvai == FSVAI_FREQ_INCREASE) || + (fsvai == FSVAI_FREQ_EMERG)) { +#ifndef DVFS_SW_WORKAROUND + /* Increase the LP domain voltage first. */ + ret = regulator_set_voltage(lp_regulator, + dvfsper_plt_data->lp_high, + dvfsper_plt_data->lp_high); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET LP VOLTAGE\n"); + return; + } + udelay(100); +#endif + +#ifndef DVFS_SW_WORKAROUND + spin_lock_irqsave(&mxc_dvfs_per_lock, flags); + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg |= MXC_DVFSPMCR0_UDCS; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg &= ~(MXC_GPCCNTR_ADU_MASK | MXC_GPCCNTR_FUPD_MASK); + reg |= MXC_GPCCNTR_FUPD; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + reg = __raw_readl(dvfsper_plt_data->gpc_vcr_reg_addr); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + reg |= (1 << MXC_GPCVCR_VINC_OFFSET | + 1 << MXC_GPCVCR_VCNTU_OFFSET | + 1 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, dvfsper_plt_data->gpc_vcr_reg_addr); + + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg &= ~MXC_GPCCNTR_ADU; + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + retry = 10; + while ((__raw_readl( + dvfsper_plt_data->gpc_cntr_reg_addr) & 0x4000) + && retry > 0) { + udelay(10); + retry--; + } + spin_unlock_irqrestore(&mxc_dvfs_per_lock, flags); + + if (retry < 0) + printk(KERN_ERR "****ERROR- DVFS\n"); +#else + /*Set the frequencies manually */ + rate = clk_get_rate(axi_b_clk); + clk_set_rate(axi_b_clk, clk_round_rate(axi_b_clk, 130000000)); + rate = clk_get_rate(ahb_clk); + clk_set_rate(ahb_clk, clk_round_rate(ahb_clk, 130000000)); +#endif + if (cpu_is_mx51()) { + /*Change the DDR freq to 200Mhz. */ + clk_set_rate(ddr_hf_clk, clk_round_rate(ddr_hf_clk, + 200000000)); + } + dvfs_per_low_freq = 0; + if (clk_get_rate(main_bus_clk) == LOW_BUS_FREQ) { + cur_setpoint = 2; + } else { + cur_setpoint = 0; +#if defined(CONFIG_ARCH_MX37) + dptc_resume(DPTC_LP_ID); +#endif +#ifndef DVFS_SW_WORKAROUND + clk_set_parent(main_bus_clk, clk_get(NULL, "pll2")); +#endif + } + dvfs_per_load_config(); + freq_increased = 1; + } + +END: +#if DVFS_PER_DEBUG + dump_dvfs_per_regs(void)(); +#endif + if (dvfs_per_is_active) { + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + /* Enable dVFS interrupt */ + /* FSVAIM=0 */ + reg &= ~MXC_DVFSPMCR0_FSVAI_MASK; + reg |= FSVAI_FREQ_NOCHANGE; + reg = (reg & ~MXC_DVFSPMCR0_FSVAIM); + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + /*Unmask GPC1 IRQ */ + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg &= ~MXC_GPCCNTR_GPCIRQM; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + } +} + +static void force_freq_change(void) +{ + u32 reg; + int retry = 50; + + freq_increased = 0; + + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg |= MXC_DVFSPMCR0_UDCS; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + if (cpu_is_mx51()) { + /*Change the DDR freq to 133Mhz. */ + clk_set_rate(ddr_hf_clk, clk_round_rate(ddr_hf_clk, 200000000)); + } + +#ifndef DVFS_SW_WORKAROUND + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg |= MXC_GPCCNTR_FUPD; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + reg = __raw_readl(dvfsper_plt_data->gpc_vcr_reg_addr); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + reg |= (1 << MXC_GPCVCR_VINC_OFFSET | + 1 << MXC_GPCVCR_VCNTU_OFFSET | + 20 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, dvfsper_plt_data->gpc_vcr_reg_addr); + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + reg &= ~MXC_GPCCNTR_ADU; + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + while ((__raw_readl( + dvfsper_plt_data->gpc_cntr_reg_addr) & 0x4000) + && retry > 0) { + udelay(30); + retry--; + } + freq_increased = 1; + if (retry <= 0) + printk(KERN_ERR "Cannot stop DVFS-PER\n"); +#else + /* Set the frequencies manually */ + rate = clk_get_rate(axi_b_clk); + clk_set_rate(axi_b_clk, clk_round_rate(axi_b_clk, 130000000)); + rate = clk_get_rate(ahb_clk); + clk_set_rate(ahb_clk, clk_round_rate(ahb_clk, 130000000)); +#endif + dvfs_per_low_freq = 0; + +#ifndef DVFS_SW_WORKAROUND + clk_set_parent(main_bus_clk, pll2); +#endif +} + +static int start(void) +{ + u32 reg; + unsigned long flags; + + if (dvfs_per_is_active || dvfs_per_stop) + return 0; + + if (low_bus_freq_mode) + return 0; + + if (bus_freq_scaling_is_active) { + dvfs_per_is_paused = 1; + printk(KERN_INFO "Cannot start DVFS-PER since bus_freq_scaling is active\n"); + return 0; + } + + if (!dvfs_per_pixel_clk_limit()) { + dvfs_per_is_paused = 1; + printk(KERN_INFO "Cannot start DVFS-PER since pixel clock is\ + above 60MHz or divider is not even\n"); + return 0; + } + + stop_sdram_autogating(); + + spin_lock_irqsave(&mxc_dvfs_per_lock, flags); + + clk_enable(dvfs_clk); + + cur_setpoint = 0; + init_dvfs_per_controller(); + + /* config reg GPC_CNTR */ + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + /* ADU=0, select PER domain */ + reg &= ~MXC_GPCCNTR_ADU; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + /* Select ARM domain */ + reg |= MXC_DVFSPMCR0_DVFIS; + /* Set the UDCS bit */ + reg |= MXC_DVFSPMCR0_UDCS; + /* Enable DVFS interrupt */ + /* FSVAIM=0 */ + reg &= ~MXC_DVFSPMCR0_FSVAIM; + /*Set the FSVAI to no_freq_change */ + reg &= ~MXC_DVFSPMCR0_FSVAI_MASK; + reg |= FSVAI_FREQ_NOCHANGE << MXC_DVFSPMCR0_FSVAI_OFFSET; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + /* config reg GPC_CNTR */ + reg = __raw_readl(dvfsper_plt_data->gpc_cntr_reg_addr); + /* GPCIRQ=1, select ARM IRQ */ + reg |= MXC_GPCCNTR_GPCIRQ_ARM; + reg &= ~MXC_GPCCNTR_GPCIRQM; + __raw_writel(reg, dvfsper_plt_data->gpc_cntr_reg_addr); + + /* Enable DVFS */ + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg |= MXC_DVFSPMCR0_DVFEN; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + dvfs_per_is_active = 1; + spin_unlock_irqrestore(&mxc_dvfs_per_lock, flags); + + printk(KERN_DEBUG "DVFS PER is started\n"); + + return 0; +} + +/*! + * This function disables the DVFS module. + */ +static void stop(void) +{ + u32 reg = 0; + unsigned long flags; + u32 ret = 0; + + if (dvfs_per_is_active) { + dvfs_per_is_active = 0; +#ifndef DVFS_SW_WORKAROUND + /* Increase the LP domain voltage first. */ + ret = regulator_set_voltage( + lp_regulator, dvfsper_plt_data->lp_high, + dvfsper_plt_data->lp_high); + if (ret < 0) { + printk(KERN_DEBUG "COULD NOT SET LP VOLTAGE\n"); + return; + } + udelay(100); +#endif + + spin_lock_irqsave(&mxc_dvfs_per_lock, flags); + + /* Mask dvfs irq, disable DVFS */ + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + /* FSVAIM=1 */ + reg |= MXC_DVFSPMCR0_FSVAIM; + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + if (cur_setpoint != 0) + force_freq_change(); + + reg = __raw_readl(MXC_DVFS_PER_PMCR0); + reg = (reg & ~MXC_DVFSPMCR0_DVFEN); + __raw_writel(reg, MXC_DVFS_PER_PMCR0); + + spin_unlock_irqrestore(&mxc_dvfs_per_lock, flags); + clk_disable(dvfs_clk); + + start_sdram_autogating(); + } +} + + +int dvfs_per_active() +{ + return dvfs_per_is_active; +} + +int dvfs_per_divider_active() +{ + return dvfs_per_low_freq; +} + +int dvfs_per_pixel_clk_limit() +{ + struct clk *disp0_pixel_clk; + struct clk *disp1_pixel_clk; + int disp0_rate = 0; + int disp1_rate = 0; + int div1 = 0; + int div2 = 0; + int even_div1 = 1; + int even_div2 = 1; + + disp0_pixel_clk = clk_get(NULL, "pixel_clk.0"); + disp1_pixel_clk = clk_get(NULL, "pixel_clk.1"); + + if (disp0_pixel_clk != NULL) + disp0_rate = clk_get_rate(disp0_pixel_clk); + + if (disp1_pixel_clk != NULL) + disp1_rate = clk_get_rate(disp1_pixel_clk); + + /* DVFS-PER will not work if pixel clock divider is odd */ + if (disp0_rate != 0) + div1 = (clk_get_rate( + clk_get_parent(disp0_pixel_clk)) * 10) / disp0_rate; + + if ((div1 % 2) || ((div1 / 10) % 2)) + even_div1 = 0; + + if ((div2 % 2) || ((div2 / 10) % 2)) + even_div2 = 0; + + if (disp1_rate != 0) + div2 = (clk_get_rate( + clk_get_parent(disp1_pixel_clk)) * 10) / disp1_rate; + + if (((disp0_rate < DVFS_MAX_PIX_CLK && even_div1) || + !clk_get_usecount(disp0_pixel_clk)) && + ((disp1_rate < DVFS_MAX_PIX_CLK && even_div2) || + !clk_get_usecount(disp1_pixel_clk))) + ipu_freq_scaled = 1; + else + ipu_freq_scaled = 0; + + clk_put(disp0_pixel_clk); + clk_put(disp1_pixel_clk); + + return ipu_freq_scaled; +} + +int start_dvfs_per(void) +{ + if (dvfs_per_is_paused) { + dvfs_per_is_paused = 0; + return start(); + } + return 0; +} + +void stop_dvfs_per(void) +{ + if (dvfs_per_is_active) { + dvfs_per_is_paused = 1; + stop(); + } +} + +/*! + * Enable DVFS Peripheral + * + */ +int dvfs_enable(struct device *dev) +{ + if (dvfs_per_is_active) + return 0; + return start(); +} + +static ssize_t dvfsper_enable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "1") != NULL) { + dvfs_per_stop = 0; + if (dvfs_enable(dev) != 0) + printk(KERN_ERR "Failed to start DVFS\n"); + } else if (strstr(buf, "0") != NULL) { + dvfs_per_stop = 1; + stop(); + } + return size; +} + +static ssize_t dvfsper_status_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int size = 0; + + if (dvfs_per_is_active) + size = sprintf(buf, "DVFS PER is enabled\n"); + else + size = sprintf(buf, "DVFS PEr is disabled\n"); + + return size; +} + +static DEVICE_ATTR(enable, 0644, dvfsper_status_show, dvfsper_enable_store); + +/*! + * This is the probe routine for the DVFS PER driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit mxc_dvfsper_probe(struct platform_device *pdev) +{ + int ret = 0; + struct resource *res; + struct mxc_dvfsper_data *dvfsper_data = pdev->dev.platform_data; + + if (dvfsper_data == NULL) { + printk(KERN_ERR "DVFS: Pointer to DVFS data is NULL\ + not started\n"); + return -1; + } + + /* Set driver data */ + platform_set_drvdata(pdev, dvfsper_device_data); + + dvfsper_plt_data = pdev->dev.platform_data; + dvfsper_device_data = kzalloc(sizeof(struct dvfsper_device), + GFP_KERNEL); + if (!dvfsper_device_data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + ret = -ENODEV; + goto err1; + } + + /* + * Request the DVFSPER interrupt + */ + dvfsper_device_data->irq = platform_get_irq(pdev, 0); + if (dvfsper_device_data->irq < 0) { + ret = dvfsper_device_data->irq; + goto err1; + } + + ret = + request_irq(dvfsper_device_data->irq, dvfs_per_irq, IRQF_SHARED, + pdev->name, &pdev->dev); + if (ret) { + printk(KERN_ERR "DVFS: Unable to attach to DVFS interrupt\n"); + goto err1; + } + + lp_regulator = regulator_get(NULL, dvfsper_data->reg_id); + if (IS_ERR(lp_regulator)) { + printk(KERN_ERR "%s: failed to get lp regulator\n", __func__); + return PTR_ERR(lp_regulator); + } + + INIT_DELAYED_WORK(&dvfs_per_work, dvfs_per_handler); + + main_bus_clk = clk_get(NULL, "main_bus_clk"); + pll2 = clk_get(NULL, "pll2"); + lpapm = clk_get(NULL, "lp_apm"); + cpu_clk = clk_get(NULL, "cpu_clk"); + ahb_clk = clk_get(NULL, "ahb_clk"); + axi_b_clk = clk_get(NULL, "axi_b_clk"); + + if (cpu_is_mx51()) + ddr_hf_clk = clk_get(NULL, "ddr_hf_clk"); + + dvfsper_device_data->dvfs_clk = clk_get(NULL, dvfsper_data->clk_id); + dvfs_clk = dvfsper_device_data->dvfs_clk; + + ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_enable.attr); + + if (ret) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for dvfs"); + goto err1; + } + + return 0; +err1: + dev_err(&pdev->dev, "Failed to probe DVFS\n"); + kfree(dvfsper_device_data); + + return ret; +} + +/*! + * This function is called to put DVFS in a low power state. + * + * @param pdev the device structure + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +static int mxc_dvfs_suspend(struct platform_device *pdev, + pm_message_t state) +{ + if (dvfs_per_is_active) { + stop_dvfs_per(); + dvfs_per_suspended = 1; + } + return 0; +} + +/*! + * This function is called to resume the DVFS from a low power state. + * + * @param dev the device structure + * @param level the stage in device suspension process that we want the + * device to be put in + * + * @return The function always returns 0. + */ +static int mxc_dvfs_resume(struct platform_device *pdev) +{ + if (dvfs_per_suspended) { + dvfs_per_suspended = 0; + return start_dvfs_per(); + } + + return 0; +} + +static struct platform_driver mxc_dvfsper_driver = { + .driver = { + .name = "mxc_dvfsper", + .owner = THIS_MODULE, + }, + .probe = mxc_dvfsper_probe, + .suspend = mxc_dvfs_suspend, + .resume = mxc_dvfs_resume, +}; + +static int __init dvfs_per_init(void) +{ + int err = 0; + + if (platform_driver_register(&mxc_dvfsper_driver) != 0) { + printk(KERN_ERR "mxc_dvfsper_driver register failed\n"); + return -ENODEV; + } + printk(KERN_INFO "DVFS PER driver module loaded\n"); + + return err; +} + +static void __exit dvfs_per_cleanup(void) +{ + stop_dvfs_per(); + + /* release the DVFS interrupt */ + free_irq(dvfsper_device_data->irq, NULL); + + clk_put(dvfs_clk); + clk_put(main_bus_clk); + clk_put(pll2); + clk_put(lpapm); + clk_put(cpu_clk); + clk_put(ahb_clk); + clk_put(axi_b_clk); + if (cpu_is_mx51()) + clk_put(ddr_hf_clk); + + /* Unregister the device structure */ + platform_driver_unregister(&mxc_dvfsper_driver); +} + +module_init(dvfs_per_init); +module_exit(dvfs_per_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("DVFS PERIPHERAL driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/utmixc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/utmixc.c @@ -0,0 +1,106 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static struct regulator *usbotg_regux; + +static void usb_utmi_init(struct fsl_xcvr_ops *this) +{ +#if defined(CONFIG_MXC_PMIC_MC13892_MODULE) || defined(CONFIG_MXC_PMIC_MC13892) + if (machine_is_mx51_3ds()) { + unsigned int value; + + /* VUSBIN */ + pmic_read_reg(REG_USB1, &value, 0xffffff); + value |= 0x1; + value |= (0x1 << 3); + pmic_write_reg(REG_USB1, value, 0xffffff); + } +#endif +} + +static void usb_utmi_uninit(struct fsl_xcvr_ops *this) +{ +} + +/*! + * set vbus power + * + * @param view viewport register + * @param on power on or off + */ +static void set_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on) +{ + struct device *dev = &pdata->pdev->dev; + + pr_debug("real %s(on=%d) pdata=0x%p\n", __func__, on, pdata); + if (machine_is_mx37_3ds()) { + if (on) { + if (!board_is_rev(BOARD_REV_2)) + usbotg_regux = regulator_get(dev, "DCDC2"); + else + usbotg_regux = regulator_get(dev, "SWBST"); + + regulator_enable(usbotg_regux); + } else { + regulator_disable(usbotg_regux); + regulator_put(usbotg_regux); + } + } +} + +static struct fsl_xcvr_ops utmi_ops = { + .name = "utmi", + .xcvr_type = PORTSC_PTS_UTMI, + .init = usb_utmi_init, + .uninit = usb_utmi_uninit, + .set_vbus_power = set_power, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); + +static int __init utmixc_init(void) +{ + fsl_usb_xcvr_register(&utmi_ops); + return 0; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +static void __exit utmixc_exit(void) +{ + fsl_usb_xcvr_unregister(&utmi_ops); +} + +module_init(utmixc_init); +module_exit(utmixc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("utmi xcvr driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/io.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/io.c @@ -0,0 +1,41 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * mxc custom ioremap implementation. + */ + +#include +#include +#include +#include + +void *__iomem __mxc_ioremap(unsigned long cookie, size_t size, + unsigned int mtype) +{ + if (mtype == MT_DEVICE && IS_MEM_DEVICE_NONSHARED(cookie)) { + mtype = MT_DEVICE_NONSHARED; + } + return __arm_ioremap(cookie, size, mtype); +} + +EXPORT_SYMBOL(__mxc_ioremap); + +void __mxc_iounmap(void __iomem * addr) +{ + extern void __iounmap(volatile void __iomem * addr); + + __iounmap(addr); +} + +EXPORT_SYMBOL(__mxc_iounmap); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/usb_common.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/usb_common.c @@ -0,0 +1,868 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * otg_{get,set}_transceiver() are from arm/plat-omap/usb.c. + * which is Copyright (C) 2004 Texas Instruments, Inc. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + *@defgroup USB ARC OTG USB Driver + */ + +/*! + * @file usb_common.c + * + * @brief platform related part of usb driver. + * @ingroup USB + */ + +/*! + *Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_NUMBER_USB_TRANSCEIVER 6 +struct fsl_xcvr_ops *g_xc_ops[MXC_NUMBER_USB_TRANSCEIVER] = { NULL }; + +enum fsl_usb2_modes get_usb_mode(struct fsl_usb2_platform_data *pdata) +{ + enum fsl_usb2_modes mode; + mode = FSL_USB_UNKNOWN; + + if (!strcmp("DR", pdata->name)) { + if ((UOG_USBMODE & 0x3) == 0x2) + mode = FSL_USB_DR_DEVICE; + else if ((UOG_USBMODE & 0x3) == 0x3) + mode = FSL_USB_DR_HOST; + } else if (!strcmp("Host 1", pdata->name)) + mode = FSL_USB_MPH_HOST1; + else if (!strcmp("Host 2", pdata->name)) + mode = FSL_USB_MPH_HOST2; + + if (mode == FSL_USB_UNKNOWN) + printk(KERN_ERR "unknow usb mode,name is %s\n", pdata->name); + return mode; +} + +static struct clk *usb_clk; +static struct clk *usb_ahb_clk; + +extern int gpio_usbotg_hs_active(void); +extern int gpio_usbotg_hs_inactive(void); + +/* + * make sure USB_CLK is running at 60 MHz +/- 1000 Hz + */ +static int fsl_check_usbclk(void) +{ + unsigned long freq; + + usb_ahb_clk = clk_get(NULL, "usb_ahb_clk"); + if (clk_enable(usb_ahb_clk)) { + printk(KERN_ERR "clk_enable(usb_ahb_clk) failed\n"); + return -EINVAL; + } + clk_put(usb_ahb_clk); + + usb_clk = clk_get(NULL, "usb_clk"); + freq = clk_get_rate(usb_clk); + clk_put(usb_clk); + if ((freq < 59999000) || (freq > 60001000)) { + printk(KERN_ERR "USB_CLK=%lu, should be 60MHz\n", freq); + return -1; + } + + return 0; +} + +void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops) +{ + int i; + + pr_debug("%s\n", __func__); + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (g_xc_ops[i] == NULL) { + g_xc_ops[i] = xcvr_ops; + return; + } + } + + pr_debug("Failed %s\n", __func__); +} +EXPORT_SYMBOL(fsl_usb_xcvr_register); + +void fsl_platform_set_test_mode (struct fsl_usb2_platform_data *pdata, enum usb_test_mode mode) +{ + if (pdata->xcvr_ops && pdata->xcvr_ops->set_test_mode) + pdata->xcvr_ops->set_test_mode((u32 *)(pdata->regs + ULPIVW_OFF), mode); +} +EXPORT_SYMBOL(fsl_platform_set_test_mode); + +void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops) +{ + int i; + + pr_debug("%s\n", __func__); + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (g_xc_ops[i] == xcvr_ops) { + g_xc_ops[i] = NULL; + return; + } + } + + pr_debug("Failed %s\n", __func__); +} +EXPORT_SYMBOL(fsl_usb_xcvr_unregister); + +static struct fsl_xcvr_ops *fsl_usb_get_xcvr(char *name) +{ + int i; + + pr_debug("%s\n", __func__); + if (name == NULL) { + printk(KERN_ERR "get_xcvr(): No tranceiver name\n"); + return NULL; + } + + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (strcmp(g_xc_ops[i]->name, name) == 0) { + return g_xc_ops[i]; + } + } + pr_debug("Failed %s\n", __func__); + return NULL; +} + +/* The dmamask must be set for EHCI to work */ +static u64 ehci_dmamask = ~(u32) 0; + +/*! + * Register an instance of a USB host platform device. + * + * @param res: resource pointer + * @param n_res: number of resources + * @param config: config pointer + * + * @return newly-registered platform_device + * + * The USB controller supports 3 host interfaces, and the + * kernel can be configured to support some number of them. + * Each supported host interface is registered as an instance + * of the "fsl-ehci" device. Call this function multiple times + * to register each host interface. + */ +static int instance_id = 0; +struct platform_device *host_pdev_register(struct resource *res, int n_res, + struct fsl_usb2_platform_data *config) +{ + struct platform_device *pdev; + int rc; + + pr_debug("register host res=0x%p, size=%d\n", res, n_res); + + pdev = platform_device_register_simple("fsl-ehci", + instance_id, res, n_res); + if (IS_ERR(pdev)) { + pr_debug("can't register %s Host, %ld\n", + config->name, PTR_ERR(pdev)); + return NULL; + } + + pdev->dev.coherent_dma_mask = 0xffffffff; + pdev->dev.dma_mask = &ehci_dmamask; + + /* + * platform_device_add_data() makes a copy of + * the platform_data passed in. That makes it + * impossible to share the same config struct for + * all OTG devices (host,gadget,otg). So, just + * set the platorm_data pointer ourselves. + */ + rc = platform_device_add_data(pdev, config, + sizeof(struct fsl_usb2_platform_data)); + if (rc) { + platform_device_unregister(pdev); + return NULL; + } + + printk(KERN_INFO "usb: %s host (%s) registered\n", config->name, + config->transceiver); + pr_debug("pdev=0x%p dev=0x%p resources=0x%p pdata=0x%p\n", + pdev, &pdev->dev, pdev->resource, pdev->dev.platform_data); + + instance_id++; + + return pdev; +} + +#if defined(CONFIG_USB_OTG) +static struct otg_transceiver *xceiv; + +/** + * otg_get_transceiver - find the (single) OTG transceiver driver + * + * Returns the transceiver driver, after getting a refcount to it; or + * null if there is no such transceiver. The caller is responsible for + * releasing that count. + */ +struct otg_transceiver *otg_get_transceiver(void) +{ + pr_debug("%s xceiv=0x%p\n", __func__, xceiv); + if (xceiv) + get_device(xceiv->dev); + return xceiv; +} +EXPORT_SYMBOL(otg_get_transceiver); + +int otg_set_transceiver(struct otg_transceiver *x) +{ + pr_debug("%s xceiv=0x%p x=0x%p\n", __func__, xceiv, x); + if (xceiv && x) + return -EBUSY; + xceiv = x; + return 0; +} +EXPORT_SYMBOL(otg_set_transceiver); + +static struct resource *otg_resources; + +struct resource *otg_get_resources(void) +{ + return otg_resources; +} +EXPORT_SYMBOL(otg_get_resources); + +int otg_set_resources(struct resource *resources) +{ + otg_resources = resources; + return 0; +} +EXPORT_SYMBOL(otg_set_resources); +#endif + +static void usbh1_set_serial_xcvr(void) +{ + pr_debug("%s: \n", __func__); + USBCTRL &= ~(UCTRL_H1SIC_MASK | UCTRL_BPE); /* disable bypass mode */ + USBCTRL |= UCTRL_H1SIC_SU6 | /* single-ended / unidir. */ + UCTRL_H1WIE | UCTRL_H1DT | /* disable H1 TLL */ + UCTRL_H1PM; /* power mask */ +} + +static void usbh1_set_ulpi_xcvr(void) +{ + pr_debug("%s: \n", __func__); + + /* Stop then Reset */ + UH1_USBCMD &= ~UCMD_RUN_STOP; + while (UH1_USBCMD & UCMD_RUN_STOP) ; + + UH1_USBCMD |= UCMD_RESET; + while (UH1_USBCMD & UCMD_RESET) ; + + /* Select the clock from external PHY */ + USB_CTRL_1 |= USB_CTRL_UH1_EXT_CLK_EN; + + /* select ULPI PHY PTS=2 */ + UH1_PORTSC1 = (UH1_PORTSC1 & ~PORTSC_PTS_MASK) | PORTSC_PTS_ULPI; + + USBCTRL &= ~UCTRL_H1WIE; /* HOST1 wakeup intr disable */ + USBCTRL &= ~UCTRL_H1UIE; /* Host1 ULPI interrupt disable */ + USBCTRL |= UCTRL_H1PM; /* HOST1 power mask */ + USB_PHY_CTR_FUNC |= USB_UH1_OC_DIS; /* OC is not used */ + + /* Interrupt Threshold Control:Immediate (no threshold) */ + UH1_USBCMD &= UCMD_ITC_NO_THRESHOLD; + + UH1_USBCMD |= UCMD_RESET; /* reset the controller */ + + /* allow controller to reset, and leave time for + * the ULPI transceiver to reset too. + */ + msleep(100); + + /* Turn off the usbpll for ulpi tranceivers */ + clk_disable(usb_clk); +} +static void usbh2_set_ulpi_xcvr(void) +{ + u32 tmp; + + pr_debug("%s\n", __func__); + USBCTRL &= ~(UCTRL_H2SIC_MASK | UCTRL_BPE); + USBCTRL |= UCTRL_H2WIE | /* wakeup intr enable */ + UCTRL_H2UIE | /* ULPI intr enable */ + UCTRL_H2DT | /* disable H2 TLL */ + UCTRL_H2PM; /* power mask */ + + /* must set ULPI phy before turning off clock */ + tmp = UH2_PORTSC1 & ~PORTSC_PTS_MASK; + tmp |= PORTSC_PTS_ULPI; + UH2_PORTSC1 = tmp; + + UH2_USBCMD |= UCMD_RESET; /* reset the controller */ + + /* allow controller to reset, and leave time for + * the ULPI transceiver to reset too. + */ + msleep(100); + + /* Turn off the usbpll for ulpi tranceivers */ + clk_disable(usb_clk); +} + +static void usbh2_set_serial_xcvr(void) +{ + pr_debug("%s: \n", __func__); + + /* Stop then Reset */ + UH2_USBCMD &= ~UCMD_RUN_STOP; + while (UH2_USBCMD & UCMD_RUN_STOP) ; + + UH2_USBCMD |= UCMD_RESET; + while (UH2_USBCMD & UCMD_RESET) ; + + USBCTRL &= ~(UCTRL_H2SIC_MASK); /* Disable bypass mode */ + USBCTRL &= ~(UCTRL_H2PM); /* Power Mask */ + USBCTRL &= ~UCTRL_H2OCPOL; /* OverCurrent Polarity is Low Active */ + USBCTRL &= ~UCTRL_H2WIE; /* Wakeup intr disable */ + USBCTRL |= UCTRL_IP_PUE_DOWN | /* ipp_pue_pulldwn_dpdm */ + UCTRL_USBTE | /* USBT is enabled */ + UCTRL_H2DT; /* Disable H2 TLL */ + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) { + /* Disable Host2 bus Lock for i.MX35 1.0 */ + USBCTRL |= UCTRL_H2LOCKD; + /* USBOTG_PWR low active */ + USBCTRL &= ~UCTRL_PP; + /* OverCurrent Polarity is Low Active */ + USBCTRL &= ~UCTRL_OCPOL; + } else if (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1) { + /* i.MX35 2.0 OTG and Host2 have seperate OC/PWR polarity */ + USBCTRL &= ~UCTRL_H2PP; + USBCTRL &= ~UCTRL_H2OCPOL; + } else if (cpu_is_mx25()) { + /* + * USBH2_PWR and USBH2_OC are active high. + * Must force xcvr clock to "internal" so that + * we can write to PTS field after it's been + * cleared by ehci_turn_off_all_ports(). + */ + USBCTRL |= UCTRL_H2PP | UCTRL_H2OCPOL | UCTRL_XCSH2; + /* Disable Host2 bus Lock */ + USBCTRL |= UCTRL_H2LOCKD; + } + + USBCTRL &= ~(UCTRL_PP); + UH2_PORTSC1 = (UH2_PORTSC1 & (~PORTSC_PTS_MASK)) | PORTSC_PTS_SERIAL; + + if (UH2_HCSPARAMS & HCSPARAMS_PPC) + UH2_PORTSC1 |= PORTSC_PORT_POWER; + + /* Reset controller before set host mode */ + UH2_USBCMD |= UCMD_RESET; + while (UH2_USBCMD & UCMD_RESET) ; + + msleep(100); +} + +/*! + * Register remote wakeup by this usb controller + * + * @param pdev: platform_device for this usb controller + * + * @return 0 or negative error code in case not supportted. + */ +static int usb_register_remote_wakeup(struct platform_device *pdev) +{ + struct resource *res; + int irq; + + pr_debug("%s: pdev=0x%p \n", __func__, pdev); + if (!cpu_is_mx51() && !cpu_is_mx25()) + return -ECANCELED; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(&pdev->dev, + "Found HC with no IRQ. Check %s setup!\n", + dev_name(&pdev->dev)); + return -ENODEV; + } + irq = res->start; + pdev->dev.power.can_wakeup = 1; + enable_irq_wake(irq); + + return 0; +} + +extern void gpio_usbh1_setback_stp(void); +extern void gpio_usbh2_setback_stp(void); + +int fsl_usb_host_init(struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + struct fsl_xcvr_ops *xops; + + pr_debug("%s: pdev=0x%p pdata=0x%p\n", __func__, pdev, pdata); + + xops = fsl_usb_get_xcvr(pdata->transceiver); + if (!xops) { + printk(KERN_ERR "%s transceiver ops missing\n", pdata->name); + return -EINVAL; + } + pdata->xcvr_ops = xops; + pdata->xcvr_type = xops->xcvr_type; + pdata->pdev = pdev; + + if (fsl_check_usbclk() != 0) + return -EINVAL; + + pr_debug("%s: grab pins\n", __func__); + if (pdata->gpio_usb_active()) + return -EINVAL; + + if (clk_enable(usb_clk)) { + printk(KERN_ERR "clk_enable(usb_clk) failed\n"); + return -EINVAL; + } + + if (cpu_is_mx51()) { + struct clk *usboh3_clk = clk_get(NULL, "usboh3_clk"); + clk_enable(usboh3_clk); + clk_put(usboh3_clk); + } + + /* enable board power supply for xcvr */ + if (pdata->xcvr_pwr) { + if (pdata->xcvr_pwr->regu1) + regulator_enable(pdata->xcvr_pwr->regu1); + if (pdata->xcvr_pwr->regu2) + regulator_enable(pdata->xcvr_pwr->regu2); + } + + if (xops->init) + xops->init(xops); + + if (usb_register_remote_wakeup(pdev)) + pr_debug("%s port is not a wakeup source.\n", pdata->name); + + if (xops->xcvr_type == PORTSC_PTS_SERIAL) { + if (cpu_is_mx35()) { + usbh2_set_serial_xcvr(); + /* Close the internal 60Mhz */ + USBCTRL &= ~UCTRL_XCSH2; + } else if (cpu_is_mx25()) + usbh2_set_serial_xcvr(); + else + usbh1_set_serial_xcvr(); + } else if (xops->xcvr_type == PORTSC_PTS_ULPI) { + if (!strcmp("Host 1", pdata->name)) { + usbh1_set_ulpi_xcvr(); + if (cpu_is_mx51()) { +#ifdef CONFIG_USB_EHCI_ARC_H1 + gpio_usbh1_setback_stp(); + /* disable remote wakeup irq */ + USBCTRL &= ~UCTRL_H1WIE; +#endif + } + } + if (!strcmp("Host 2", pdata->name)) { + usbh2_set_ulpi_xcvr(); + if (cpu_is_mx51()) { +#ifdef CONFIG_USB_EHCI_ARC_H2 + gpio_usbh2_setback_stp(); +#endif + } + } + } + + pr_debug("%s: %s success\n", __func__, pdata->name); + return 0; +} +EXPORT_SYMBOL(fsl_usb_host_init); + +void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata) +{ + pr_debug("%s\n", __func__); + + if (pdata->xcvr_ops && pdata->xcvr_ops->uninit) + pdata->xcvr_ops->uninit(pdata->xcvr_ops); + + pdata->regs = NULL; + + pdata->gpio_usb_inactive(); + if (pdata->xcvr_type == PORTSC_PTS_SERIAL) { + /* Workaround an IC issue for ehci driver. + * when turn off root hub port power, EHCI set + * PORTSC reserved bits to be 0, but PTS with 0 + * means UTMI interface, so here force the Host2 + * port use the internal 60Mhz. + */ + if (cpu_is_mx35()) + USBCTRL |= UCTRL_XCSH2; + clk_disable(usb_clk); + } + + /* disable board power supply for xcvr */ + if (pdata->xcvr_pwr) { + if (pdata->xcvr_pwr->regu1) + regulator_disable(pdata->xcvr_pwr->regu1); + if (pdata->xcvr_pwr->regu2) + regulator_disable(pdata->xcvr_pwr->regu2); + } + + if (cpu_is_mx51()) { + usb_clk = clk_get(NULL, "usboh3_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + } + clk_disable(usb_ahb_clk); +} +EXPORT_SYMBOL(fsl_usb_host_uninit); + +static void otg_set_serial_xcvr(void) +{ + pr_debug("%s\n", __func__); +} + +void otg_set_serial_host(void) +{ + pr_debug("%s\n", __func__); + /* set USBCTRL for host operation + * disable: bypass mode, + * set: single-ended/unidir/6 wire, OTG wakeup intr enable, + * power mask + */ + USBCTRL &= ~UCTRL_OSIC_MASK; +#if defined(CONFIG_ARCH_MX27) || defined(CONFIG_ARCH_MX3) + USBCTRL &= ~UCTRL_BPE; +#endif + +#if defined(CONFIG_MXC_USB_SB3) + USBCTRL |= UCTRL_OSIC_SB3 | UCTRL_OWIE | UCTRL_OPM; +#elif defined(CONFIG_MXC_USB_SU6) + USBCTRL |= UCTRL_OSIC_SU6 | UCTRL_OWIE | UCTRL_OPM; +#elif defined(CONFIG_MXC_USB_DB4) + USBCTRL |= UCTRL_OSIC_DB4 | UCTRL_OWIE | UCTRL_OPM; +#else + USBCTRL |= UCTRL_OSIC_DU6 | UCTRL_OWIE | UCTRL_OPM; +#endif + + USB_OTG_MIRROR = OTGM_VBUSVAL | OTGM_ASESVLD; /* 0xa */ +} +EXPORT_SYMBOL(otg_set_serial_host); + +void otg_set_serial_peripheral(void) +{ + /* set USBCTRL for device operation + * disable: bypass mode + * set: differential/unidir/6 wire, OTG wakeup intr enable, + * power mask + */ + USBCTRL &= ~UCTRL_OSIC_MASK; +#if defined(CONFIG_ARCH_MX27) || defined(CONFIG_ARCH_MX3) + USBCTRL &= ~UCTRL_BPE; +#endif + +#if defined(CONFIG_MXC_USB_SB3) + USBCTRL |= UCTRL_OSIC_SB3 | UCTRL_OWIE | UCTRL_OPM; +#elif defined(CONFIG_MXC_USB_SU6) + USBCTRL |= UCTRL_OSIC_SU6 | UCTRL_OWIE | UCTRL_OPM; +#elif defined(CONFIG_MXC_USB_DB4) + USBCTRL |= UCTRL_OSIC_DB4 | UCTRL_OWIE | UCTRL_OPM; +#else + USBCTRL |= UCTRL_OSIC_DU6 | UCTRL_OWIE | UCTRL_OPM; +#endif + + USB_OTG_MIRROR = OTGM_VBUSVAL | OTGM_BSESVLD | OTGM_IDIDG; /* oxd */ +} +EXPORT_SYMBOL(otg_set_serial_peripheral); + +static void otg_set_ulpi_xcvr(void) +{ + u32 tmp; + + pr_debug("%s\n", __func__); + USBCTRL &= ~UCTRL_OSIC_MASK; +#if defined(CONFIG_ARCH_MX27) || defined(CONFIG_ARCH_MX3) + USBCTRL &= ~UCTRL_BPE; +#endif + USBCTRL |= UCTRL_OUIE | /* ULPI intr enable */ + UCTRL_OWIE | /* OTG wakeup intr enable */ + UCTRL_OPM; /* power mask */ + + /* must set ULPI phy before turning off clock */ + tmp = UOG_PORTSC1 & ~PORTSC_PTS_MASK; + tmp |= PORTSC_PTS_ULPI; + UOG_PORTSC1 = tmp; + + /* need to reset the controller here so that the ID pin + * is correctly detected. + */ + UOG_USBCMD |= UCMD_RESET; + + /* allow controller to reset, and leave time for + * the ULPI transceiver to reset too. + */ + msleep(100); + + /* Turn off the usbpll for ulpi tranceivers */ + clk_disable(usb_clk); +} + +int fsl_usb_xcvr_suspend(struct fsl_xcvr_ops *xcvr_ops) +{ + if (!machine_is_mx31_3ds()) + return -ECANCELED; + + if (xcvr_ops->xcvr_type == PORTSC_PTS_ULPI) { + if (fsl_check_usbclk() != 0) + return -EINVAL; + if (gpio_usbotg_hs_active()) + return -EINVAL; + clk_enable(usb_clk); + + otg_set_ulpi_xcvr(); + + if (xcvr_ops->suspend) + /* suspend transceiver */ + xcvr_ops->suspend(xcvr_ops); + + gpio_usbotg_hs_inactive(); + clk_disable(usb_clk); + } + return 0; +} +EXPORT_SYMBOL(fsl_usb_xcvr_suspend); + +static void otg_set_utmi_xcvr(void) +{ + u32 tmp; + + /* Stop then Reset */ + UOG_USBCMD &= ~UCMD_RUN_STOP; + while (UOG_USBCMD & UCMD_RUN_STOP) ; + + UOG_USBCMD |= UCMD_RESET; + while ((UOG_USBCMD) & (UCMD_RESET)) ; + + if (cpu_is_mx51()) { + if (machine_is_mx51_3ds()) { + /* OTG Polarity of Overcurrent is Low active */ + USB_PHY_CTR_FUNC |= USB_UTMI_PHYCTRL_OC_POL; + /* Enable OTG Overcurrent Event */ + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_OC_DIS; + } else { + /* BBG is not using OC */ + USB_PHY_CTR_FUNC |= USB_UTMI_PHYCTRL_OC_DIS; + } + } else if (cpu_is_mx25()) { + USBCTRL |= UCTRL_OCPOL; + USBCTRL &= ~UCTRL_PP; + } else { + /* USBOTG_PWR low active */ + USBCTRL &= ~UCTRL_PP; + /* OverCurrent Polarity is Low Active */ + USBCTRL &= ~UCTRL_OCPOL; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) + /* OTG Lock Disable */ + USBCTRL |= UCTRL_OLOCKD; + } + + USBCTRL &= ~UCTRL_OPM; /* OTG Power Mask */ + USBCTRL &= ~UCTRL_OWIE; /* OTG Wakeup Intr Disable */ + + /* set UTMI xcvr */ + tmp = UOG_PORTSC1 & ~PORTSC_PTS_MASK; + tmp |= PORTSC_PTS_UTMI; + UOG_PORTSC1 = tmp; + + if (cpu_is_mx51()) { + /* Set the PHY clock to 19.2MHz */ + USB_PHY_CTR_FUNC2 &= ~USB_UTMI_PHYCTRL2_PLLDIV_MASK; + USB_PHY_CTR_FUNC2 |= 0x01; + } else if (machine_is_mx37_3ds()) { + /* Reference voltage for HS disconnect envelope detector */ + /* adjust the Squelch level */ + USB_PHY_CTR_FUNC2 &= ~(USB_UTMI_PHYCTRL2_HSDEVSEL_MASK << + USB_UTMI_PHYCTRL2_HSDEVSEL_SHIFT); + } + + /* Workaround an IC issue for ehci driver: + * when turn off root hub port power, EHCI set + * PORTSC reserved bits to be 0, but PTW with 0 + * means 8 bits tranceiver width, here change + * it back to be 16 bits and do PHY diable and + * then enable. + */ + UOG_PORTSC1 |= PORTSC_PTW; + + if (cpu_is_mx35() || cpu_is_mx25()) { + /* Enable UTMI interface in PHY control Reg */ + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_UTMI_ENABLE; + USB_PHY_CTR_FUNC |= USB_UTMI_PHYCTRL_UTMI_ENABLE; + } + + /* need to reset the controller here so that the ID pin + * is correctly detected. + */ + /* Stop then Reset */ + UOG_USBCMD &= ~UCMD_RUN_STOP; + while (UOG_USBCMD & UCMD_RUN_STOP) ; + + UOG_USBCMD |= UCMD_RESET; + while ((UOG_USBCMD) & (UCMD_RESET)) ; + + /* allow controller to reset, and leave time for + * the ULPI transceiver to reset too. + */ + msleep(100); + + if (cpu_is_mx37()) { + /* fix USB PHY Power Gating leakage issue for i.MX37 */ + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_CHGRDETON; + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_CHGRDETEN; + } + + /* Turn off the usbpll for UTMI tranceivers */ + clk_disable(usb_clk); +} + +static int otg_used = 0; + +int usbotg_init(struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + struct fsl_xcvr_ops *xops; + + pr_debug("%s: pdev=0x%p pdata=0x%p\n", __func__, pdev, pdata); + + xops = fsl_usb_get_xcvr(pdata->transceiver); + if (!xops) { + printk(KERN_ERR "DR transceiver ops missing\n"); + return -EINVAL; + } + pdata->xcvr_ops = xops; + pdata->xcvr_type = xops->xcvr_type; + pdata->pdev = pdev; + + if (!otg_used) { + if (fsl_check_usbclk() != 0) + return -EINVAL; + + pr_debug("%s: grab pins\n", __func__); + if (pdata->gpio_usb_active()) + return -EINVAL; + + if (clk_enable(usb_clk)) { + printk(KERN_ERR "clk_enable(usb_clk) failed\n"); + return -EINVAL; + } + + if (xops->init) + xops->init(xops); + + UOG_PORTSC1 = UOG_PORTSC1 & ~PORTSC_PHCD; + if (xops->xcvr_type == PORTSC_PTS_SERIAL) { + if (pdata->operating_mode == FSL_USB2_DR_HOST) { + otg_set_serial_host(); + /* need reset */ + UOG_USBCMD |= UCMD_RESET; + msleep(100); + } else if (pdata->operating_mode == FSL_USB2_DR_DEVICE) + otg_set_serial_peripheral(); + otg_set_serial_xcvr(); + } else if (xops->xcvr_type == PORTSC_PTS_ULPI) { + otg_set_ulpi_xcvr(); + } else if (xops->xcvr_type == PORTSC_PTS_UTMI) { + otg_set_utmi_xcvr(); + } + } + + if (usb_register_remote_wakeup(pdev)) + pr_debug("DR is not a wakeup source.\n"); + + otg_used++; + pr_debug("%s: success\n", __func__); + return 0; +} +EXPORT_SYMBOL(usbotg_init); + +void usbotg_uninit(struct fsl_usb2_platform_data *pdata) +{ + pr_debug("%s\n", __func__); + + otg_used--; + if (!otg_used) { + if (pdata->xcvr_ops && pdata->xcvr_ops->uninit) + pdata->xcvr_ops->uninit(pdata->xcvr_ops); + + pdata->regs = NULL; + + if (machine_is_mx31_3ds()) { + if (pdata->xcvr_ops && pdata->xcvr_ops->suspend) + pdata->xcvr_ops->suspend(pdata->xcvr_ops); + clk_disable(usb_clk); + } + msleep(1); + UOG_PORTSC1 = UOG_PORTSC1 | PORTSC_PHCD; + pdata->gpio_usb_inactive(); + if (pdata->xcvr_type == PORTSC_PTS_SERIAL) + clk_disable(usb_clk); + clk_disable(usb_ahb_clk); + } +} +EXPORT_SYMBOL(usbotg_uninit); + +int usb_host_wakeup_irq(struct device *wkup_dev) +{ + int wakeup_req = 0; + struct fsl_usb2_platform_data *pdata = wkup_dev->platform_data; + + if (!strcmp("Host 1", pdata->name)) { + wakeup_req = USBCTRL & UCTRL_H1WIR; + } else if (!strcmp("DR", pdata->name)) { + wakeup_req = USBCTRL & UCTRL_OWIR; + /* If DR is in device mode, let udc handle it */ + if (wakeup_req && ((UOG_USBMODE & 0x3) == 0x2)) + wakeup_req = 0; + } + + return wakeup_req; +} +EXPORT_SYMBOL(usb_host_wakeup_irq); + +void usb_host_set_wakeup(struct device *wkup_dev, bool para) +{ + struct fsl_usb2_platform_data *pdata = wkup_dev->platform_data; + if (pdata->wake_up_enable) + pdata->wake_up_enable(pdata, para); +} +EXPORT_SYMBOL(usb_host_set_wakeup); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/serialxc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/serialxc.c @@ -0,0 +1,64 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static void usb_serial_init(struct fsl_xcvr_ops *this) +{ +} + +static void usb_serial_uninit(struct fsl_xcvr_ops *this) +{ +} + +static struct fsl_xcvr_ops serial_ops = { + .name = "serial", + .xcvr_type = PORTSC_PTS_SERIAL, + .init = usb_serial_init, + .uninit = usb_serial_uninit, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); + +static int __init serialxc_init(void) +{ + pr_debug("%s\n", __FUNCTION__); + + fsl_usb_xcvr_register(&serial_ops); + + return 0; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +static void __exit serialxc_exit(void) +{ + fsl_usb_xcvr_unregister(&serial_ops); +} + +module_init(serialxc_init); +module_exit(serialxc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("serial xcvr driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h @@ -0,0 +1,169 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file arch-mxc/dvfs_dptc_struct.h + * + * @brief MXC dvfs & dptc structure definitions file. + * + * @ingroup PM_MX27 PM_MX31 PM_MXC91321 PM_MXC91311 + */ +#ifndef __ASM_ARCH_MXC_DVFS_DPTC_STRUCT_H__ +#define __ASM_ARCH_MXC_DVFS_DPTC_STRUCT_H__ + +#include +#include + +/*! + * Number of entries in the DPTC log buffer + */ +#define LOG_ENTRIES 1024 + +/*! + * Log buffer Structure.\n + * This structure records the DPTC changes. \n + * This structure can be read by the user using the proc file system DPTC read entry. + */ +typedef struct { + /*! + * Index to the head of the log buffer + */ + int head; + + /*! + * Index to the tail of the log buffer + */ + int tail; + + /*! + * Mutex to allow access to the log buffer + */ + struct semaphore mutex; + + /*! + * Array of log buffer entries + */ + dptc_log_entry_s entries[LOG_ENTRIES]; +} dptc_log_s; + +/*! + * DPTC driver data structure.\n + * Holds all driver parameters and data structures. + */ +typedef struct { + /*! + * This variable holds the current frequency index + */ + int current_freq_index; + + /*! + * Boolean variable, if TRUE the DPTC module is enabled + * if FALSE the DPTC module is disabled + */ + int dptc_is_active; + + /*! + * Boolean variable, if TRUE turbo mode enable + * if FALSE turbo mode disabled + */ + int turbo_mode_active; + + /*! + * Boolean variable, if TRUE the DVFS module is enabled + * if FALSE the DPTC module is disabled + */ + int dvfs_is_active; + + /*! + * Boolean variable, if TRUE the DPTC module is suspended + */ + int suspended; + + unsigned char rc_state; + + /*! + * Pointer to the DVFS & DPTC translation table + */ + dvfs_dptc_tables_s *dvfs_dptc_tables_ptr; + + /*! + * The DPTC log buffer + */ + dptc_log_s dptc_log_buffer; + + /*! + * The DVFS log buffer + */ + unsigned char *dvfs_log_buffer; + + /*! + * The DVFS log buffer physical address (for SDMA) + */ + dma_addr_t dvfs_log_buffer_phys; + +#ifdef CONFIG_MXC_DVFS_SDMA + /*! + * SDMA channel number + */ + int sdma_channel; + + /*! + * This holds the previous working point + */ + int prev_wp; + + /*! + * Wait entry for predictive DVFS + */ + wait_queue_head_t dvfs_pred_wait; +#endif + + /*! + * This holds the current DVFS mode + */ + unsigned int dvfs_mode; + + /*! + * Log buffer read pointer + */ + unsigned char *read_ptr; + + /* + * Number of characters in log buffer + */ + int chars_in_buffer; +} dvfs_dptc_params_s; + +/*! + * This struct contains the array with values of supported frequencies in Hz + */ +typedef struct { + /* + * Number of supported states + */ + unsigned int num_of_states; + /*! + * Array of frequencies + */ + unsigned int *freqs; +} dvfs_states_table; + +/* + * if not defined define TREU and FALSE values. + */ +#ifndef TRUE +#define TRUE 1 +#define FALSE 0 +#endif /* TRUE */ + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/uncompress.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/uncompress.h @@ -27,6 +27,8 @@ #include +unsigned int system_rev; + #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) #define USR2 0x98 @@ -66,7 +68,9 @@ UART(TXR) = ch; } -#define flush() do { } while (0) +static inline void flush(void) +{ +} /* * nothing to do --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_gpc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_gpc.h @@ -0,0 +1,74 @@ + +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup LPMD Low-Level Power Management Driver + */ + +/*! + * @file arch-mxc/mxc_gpc.h + * + * @brief This file contains the chip level configuration details and + * public API declarations for GPC module + * + * @ingroup LPMD + */ + +#ifndef __ASM_ARCH_MXC_GPC_H__ +#define __ASM_ARCH_MXC_GPC_H__ + +/* AP Power Gating modules */ +typedef enum { + POWER_GATING_MODULE_AP_EMBEDDED_MEM_DEEPSLEEP, + POWER_GATING_MODULE_DISPLAY_BUFFER, + POWER_GATING_MODULE_EMI_DEEPSLEEP, + POWER_GATING_MODULE_IPU_STOP, + POWER_GATING_MODULE_L2_MEM_STOP, + POWER_GATING_MODULE_ARM_PLATFORM_STOP, +} mxc_pm_ap_power_gating_modules_t; + +/* AP Power Gating pull-down config of modules */ +typedef enum { + POWER_GATING_PULL_DOWN_DISPLAY_BUFFER, + POWER_GATING_PULL_DOWN_EMI, + POWER_GATING_PULL_DOWN_IPU, + POWER_GATING_PULL_DOWN_L2_MEM, + POWER_GATING_PULL_DOWN_ARMPLATFORM, +} mxc_pm_ap_power_gating_pulldown_t; + +/*! + * This function enables/disables the AP power gating by writing the APPCR + * register of the GPC module. + * + * @param enable Enable/Disable module power down + * 0 - disable; 1 - enable + * @param modules The desired module to be power gated + * + */ +void mxc_gpc_powergate_module(int enable, + mxc_pm_ap_power_gating_modules_t module); + +/*! + * This function enables/disables the AP power gating pull down selection of a + * module by writing the APPCR register of the GPC module. + * + * @param enable Enable/Disable module pull down + * 0 - disable; 1 - enable + * @param modules The desired module to be pulled down + * + */ +void mxc_gpc_powergate_pulldown(int enable, + mxc_pm_ap_power_gating_pulldown_t pulldown); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mmc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mmc.h @@ -33,4 +33,21 @@ void (*setpower)(struct device *, unsigned int vdd); }; +struct mxc_mmc_platform_data { + unsigned int ocr_mask; /* available voltages */ + unsigned int vendor_ver; + unsigned int caps; + unsigned int min_clk; + unsigned int max_clk; + unsigned int clk_flg; /* 1 clock enable, 0 not */ + unsigned int reserved:16; + unsigned int card_fixed:1; + unsigned int card_inserted_state:1; +// u32 (*translate_vdd)(struct device *, unsigned int); + unsigned int (*status) (struct device *); + int (*wp_status) (struct device *); + char *power_mmc; + char *clock_mmc; +}; + #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_dptc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_dptc.h @@ -0,0 +1,111 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup DPTC Dynamic Process and Temperatur Compensation (DPTC) Driver + */ + +/*! + * @file arch-mxc/mxc_dptc.h + * + * @brief This file contains the DPTC configuration structure definition. + * + * + * @ingroup DPTC + */ + +#ifndef __ASM_ARCH_MXC_DPTC_H__ +#define __ASM_ARCH_MXC_DPTC_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include + +#define DPTC_WP_SUPPORTED 17 +#define DPTC_GP_WP_SUPPORTED 7 +#define DPTC_LP_WP_SUPPORTED 9 + +struct dptc_wp { + u32 dcvr0; + u32 dcvr1; + u32 dcvr2; + u32 dcvr3; + u32 voltage; +}; + +/*! + * This structure is used to define the dptc controller's platform + * data. It includes the regulator name string and DPTC clock name string. + */ +struct mxc_dptc_data { + /** Regulator name string */ + char *reg_id; + /* DPTC clock name string */ + char *clk_id; + /* Control reg address */ + unsigned int dptccr_reg_addr; + /* Comparator value reg 0 address */ + unsigned int dcvr0_reg_addr; + /* GPC control reg address */ + unsigned int gpc_cntr_reg_addr; + /* DPTC interrupt status bit */ + unsigned int dptccr; + /* The number of DPTC working points */ + unsigned int dptc_wp_supported; + /* Maximum value of DPTC clock rate */ + unsigned long clk_max_val; + /* DPTC working points */ + struct dptc_wp *dptc_wp_allfreq; + /* DPTC enable bit */ + u32 dptc_enable_bit; + /* DPTC ADU bit */ + int gpc_adu; + /* VAI mask */ + u32 vai_mask; + /* VAI offset */ + int vai_offset; + /* Mask DPTC interrupt */ + u32 irq_mask; + /* DPTC no voltage change request bit */ + u32 dptc_nvcr_bit; + /* ARM interrrupt bit */ + u32 gpc_irq_bit; + /* dptc init config */ + u32 init_config; + /* dptc enable config */ + u32 enable_config; + /* dptc counting range mask */ + u32 dcr_mask; +}; + +/*! + * This function is called to put the DPTC in a low power state. + * + * @param id The DPTC device id. DPTC_GP_ID is for DPTC GP; + * DPTC_LP_ID is for DPTC LP + */ +void dptc_suspend(int id); +/*! + * This function is called to resume the DPTC from a low power state. + * + * @param id The DPTC device id. DPTC_GP_ID is for DPTC GP; + * DPTC_LP_ID is for DPTC LP + */ +void dptc_resume(int id); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_DPTC_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/hw_events.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/hw_events.h @@ -0,0 +1,65 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * hw_events.h + * include the headset/cvbs interrupt detect + */ + +#ifndef HW_EVENT_H +#define HW_EVENT_H + +#define HW_EVENT_GROUP 2 +#define HWE_DEF_PRIORITY 1 +#define HWE_HIGH_PRIORITY 0 + +typedef enum { + + HWE_PHONEJACK_PLUG = 0, + HWE_BAT_CHARGER_PLUG, + HWE_BAT_CHARGER_OVERVOLTAGE, + HWE_BAT_BATTERY_LOW, + HWE_BAT_POWER_FAILED, + HWE_BAT_CHARGER_FULL, + HWE_POWER_KEY, +} HW_EVENT_T; + +typedef enum { + + PJT_NONE = 0, + PJT_CVBS, + PJT_HEADSET, +} PHONEJACK_TYPE; + +typedef enum { + + PWRK_UNPRESS = 0, + PWRK_PRESS, +} POWERKEY_TYPE; + +typedef enum { + + UNPLUG = 0, + PLUGGED, +} PLUG_TYPE; + +struct mxc_hw_event { + unsigned int event; + int args; +}; + +#ifdef __KERNEL__ +extern int hw_event_send(int priority, struct mxc_hw_event *new_event); +#endif + +#endif /* HW_EVENT_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_dvfs.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_dvfs.h @@ -0,0 +1,257 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup DVFS Dynamic Voltage and Frequency Scaling (DVFS) Driver + */ + +/*! + * @file arch-mxc/mxc_dvfs.h + * + * @brief This file contains the DVFS configuration structure definition. + * + * + * @ingroup DVFS + */ + +#ifndef __ASM_ARCH_MXC_DVFS_H__ +#define __ASM_ARCH_MXC_DVFS_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include + +#define MXC_GPCCNTR_GPCIRQ2M (1 << 25) +#define MXC_GPCCNTR_GPCIRQ2 (1 << 24) +#define MXC_GPCCNTR_GPCIRQM (1 << 21) +#define MXC_GPCCNTR_GPCIRQ_ARM (1 << 20) +#define MXC_GPCCNTR_GPCIRQ_SDMA (0 << 20) +#define MXC_GPCCNTR_DVFS0CR (1 << 16) +#define MXC_GPCCNTR_DVFS1CR (1 << 17) +#define MXC_GPCCNTR_ADU_MASK 0x8000 +#define MXC_GPCCNTR_ADU (1 << 15) +#define MXC_GPCCNTR_STRT (1 << 14) +#define MXC_GPCCNTR_FUPD_MASK 0x2000 +#define MXC_GPCCNTR_FUPD (1 << 13) +#define MXC_GPCCNTR_HTRI_MASK 0x0000000F +#define MXC_GPCCNTR_HTRI_OFFSET 0 + +#define MXC_GPCVCR_VINC_MASK 0x00020000 +#define MXC_GPCVCR_VINC_OFFSET 17 +#define MXC_GPCVCR_VCNTU_MASK 0x00010000 +#define MXC_GPCVCR_VCNTU_OFFSET 16 +#define MXC_GPCVCR_VCNT_MASK 0x00007FFF +#define MXC_GPCVCR_VCNT_OFFSET 0 + +/* DVFS-PER */ +#define MXC_DVFSPER_PMCR0_UDCS (1 << 27) +#define MXC_DVFSPER_PMCR0_UDCS_MASK 0x8000000 +#define MXC_DVFSPER_PMCR0_ENABLE_MASK 0x10 +#define MXC_DVFSPER_PMCR0_ENABLE (1 << 4) + +#define MXC_DVFS_PER_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x1C4) + +/* DVFS PER */ +#define MXC_DVFS_PER_LTR0 (MXC_DVFS_PER_BASE) +#define MXC_DVFS_PER_LTR1 (MXC_DVFS_PER_BASE + 0x04) +#define MXC_DVFS_PER_LTR2 (MXC_DVFS_PER_BASE + 0x08) +#define MXC_DVFS_PER_LTR3 (MXC_DVFS_PER_BASE + 0x0C) +#define MXC_DVFS_PER_LTBR0 (MXC_DVFS_PER_BASE + 0x10) +#define MXC_DVFS_PER_LTBR1 (MXC_DVFS_PER_BASE + 0x14) +#define MXC_DVFS_PER_PMCR0 (MXC_DVFS_PER_BASE + 0x18) +#define MXC_DVFS_PER_PMCR1 (MXC_DVFS_PER_BASE + 0x1C) + +#define MXC_DVFSLTR0_UPTHR_MASK 0x0FC00000 +#define MXC_DVFSLTR0_UPTHR_OFFSET 22 +#define MXC_DVFSLTR0_DNTHR_MASK 0x003F0000 +#define MXC_DVFSLTR0_DNTHR_OFFSET 16 + +#define MXC_DVFSLTR1_PNCTHR_MASK 0x0000003F +#define MXC_DVFSLTR1_PNCTHR_OFFSET 0 +#define MXC_DVFSLTR1_DNCNT_MASK 0x003FC000 +#define MXC_DVFSLTR1_DNCNT_OFFSET 14 +#define MXC_DVFSLTR1_UPCNT_MASK 0x00003FC0 +#define MXC_DVFSLTR1_UPCNT_OFFSET 6 +#define MXC_DVFSLTR1_LTBRSR 0x800000 +#define MXC_DVFSLTR1_LTBRSH 0x400000 + +#define MXC_DVFSLTR2_EMAC_MASK 0x000001FF +#define MXC_DVFSLTR2_EMAC_OFFSET 0 + +#define MXC_DVFSPMCR0_UDCS 0x8000000 +#define MXC_DVFSPMCR0_DVFEV 0x800000 +#define MXC_DVFSPMCR0_DVFIS 0x400000 +#define MXC_DVFSPMCR0_LBMI 0x200000 +#define MXC_DVFSPMCR0_LBFL 0x100000 +#define MXC_DVFSPMCR0_LBFC_MASK 0xC0000 +#define MXC_DVFSPMCR0_LBFC_OFFSET 18 +#define MXC_DVFSPMCR0_FSVAIM 0x00008000 +#define MXC_DVFSPMCR0_FSVAI_MASK 0x00006000 +#define MXC_DVFSPMCR0_FSVAI_OFFSET 13 +#define MXC_DVFSPMCR0_WFIM 0x00000400 +#define MXC_DVFSPMCR0_WFIM_OFFSET 10 +#define MXC_DVFSPMCR0_DVFEN 0x00000010 + +#define MXC_DVFSPMCR1_P1INM 0x00100000 +#define MXC_DVFSPMCR1_P1ISM 0x00080000 +#define MXC_DVFSPMCR1_P1IFM 0x00040000 +#define MXC_DVFSPMCR1_P4PM 0x00020000 +#define MXC_DVFSPMCR1_P2PM 0x00010000 + +/* + * DVFS structure + */ +struct dvfs_wp { + int upthr; + int downthr; + int panicthr; + int upcnt; + int downcnt; + int emac; +}; + +struct mxc_dvfs_platform_data { + /** Supply voltage regulator name string */ + char *reg_id; + /* CPU clock name string */ + char *clk1_id; + /* DVFS clock name string */ + char *clk2_id; + /* GPC control reg address */ + void __iomem *gpc_cntr_reg_addr; + /* GPC voltage counter reg address */ + void __iomem *gpc_vcr_reg_addr; + /* CCM DVFS control reg address */ + void __iomem *ccm_cdcr_reg_addr; + /* CCM ARM clock root reg address */ + void __iomem *ccm_cacrr_reg_addr; + /* CCM divider handshake in-progree reg address */ + void __iomem *ccm_cdhipr_reg_addr; + /* DVFS threshold reg address */ + void __iomem *dvfs_thrs_reg_addr; + /* DVFS counters reg address */ + void __iomem *dvfs_coun_reg_addr; + /* DVFS EMAC reg address */ + void __iomem *dvfs_emac_reg_addr; + /* DVFS control reg address */ + void __iomem *dvfs_cntr_reg_addr; + /* PREDIV mask */ + u32 prediv_mask; + /* PREDIV offset */ + int prediv_offset; + /* PREDIV value */ + int prediv_val; + /* DIV3CK mask */ + u32 div3ck_mask; + /* DIV3CK offset */ + int div3ck_offset; + /* DIV3CK value */ + int div3ck_val; + /* EMAC value */ + int emac_val; + /* Frequency increase threshold. Increase frequency change request + will be sent if DVFS counter value will be more than this value */ + int upthr_val; + /* Frequency decrease threshold. Decrease frequency change request + will be sent if DVFS counter value will be less than this value */ + int dnthr_val; + /* Panic threshold. Panic frequency change request + will be sent if DVFS counter value will be more than this value */ + int pncthr_val; + /* The amount of times the up threshold should be exceeded + before DVFS will trigger frequency increase request */ + int upcnt_val; + /* The amount of times the down threshold should be exceeded + before DVFS will trigger frequency decrease request */ + int dncnt_val; + /* Delay time in us */ + int delay_time; + /* Number of woking points supported */ + int num_wp; +}; + +/*! + * This structure is used to define the dvfs controller's platform + * data. It includes the regulator name string and DVFS clock name string. + */ +struct mxc_dvfsper_data { + /** Regulator name string */ + char *reg_id; + /* DVFS clock name string */ + char *clk_id; + /* GPC control reg address */ + void __iomem *gpc_cntr_reg_addr; + /* GPC VCR reg address */ + void __iomem *gpc_vcr_reg_addr; + /* DVFS enable bit */ + u32 dvfs_enable_bit; + /* DVFS ADU bit */ + int gpc_adu; + /* VAI mask */ + u32 vai_mask; + /* VAI offset */ + int vai_offset; + /* Mask DVFS interrupt */ + u32 irq_mask; + /* Div3 clock offset. */ + u32 div3_offset; + /*div3 clock mask. */ + u32 div3_mask; + /*div3 clock divider */ + u32 div3_div; + /* LP voltage - high setpoint*/ + u32 lp_high; + /* LP voltage - low setpoint*/ + u32 lp_low; +}; + + +#if defined(CONFIG_MXC_DVFS_PER) +extern int start_dvfs_per(void); +extern void stop_dvfs_per(void); +extern int dvfs_per_active(void); +extern int dvfs_per_divider_active(void); +extern int dvfs_per_pixel_clk_limit(void); +#else +static inline int start_dvfs_per(void) +{ + return 0; +} + +static inline void stop_dvfs_per(void) +{ +} + +static inline int dvfs_per_active(void) +{ + return 0; +} + +static inline int dvfs_per_divider_active(void) +{ + return 0; +} + +static inline int dvfs_per_pixel_clk_limit(void) +{ + return 0; +} + +#endif + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_DVFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx2_dma.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx2_dma.h @@ -0,0 +1,261 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_MX2_H__ +#define __ASM_ARCH_MXC_MX2_H__ + +/*! + * @defgroup DMA_MX27 DMA driver for i.MX27 + */ + +/*! + *@file arch-mxc/mx2_dma.h + *@brief DMA driver header file + * + * @ingroup DMA_MX27 + * + */ + +#include +#include +#include + +#define MXC_DMA_INTR_0 32 + +#define DMA_DCR 0x000 /* 32bit dma control reg */ +#define DMA_DISR 0x004 /* 32bit dma interrupt status reg */ +#define DMA_DIMR 0x008 /* 32bit dma interrupt mask reg */ +#define DMA_DBTOSR 0x00c /* 32bit dma burst timeout stat reg */ +#define DMA_DRTOSR 0x010 /* 32bit dma req timeout status reg */ +#define DMA_DSESR 0x014 /* 32bit dma transfer err status reg */ +#define DMA_DBOSR 0x018 /* 32bit dma buffer overflow stat reg */ +#define DMA_DBTOCR 0x01c /* 32bit dma burst timeout ctrl reg */ + +#define DMA_WSRA 0x040 /* 32bit dma W-size A reg */ +#define DMA_XSRA 0x044 /* 32bit dma X-size A reg */ +#define DMA_YSRA 0x048 /* 32bit dma Y-size A reg */ +#define DMA_WSRB 0x04C /* 32bit dma W-size B reg */ +#define DMA_XSRB 0x050 /* 32bit dma X-size B reg */ +#define DMA_YSRB 0x054 /* 32bit dma Y-size B reg */ + +#define DMA_CH_BASE(x) (0x080+0x040*(x)) + +#define DMA_SAR(x) (DMA_CH_BASE(x)+0x000) +#define DMA_DAR(x) (DMA_CH_BASE(x)+0x004) +#define DMA_CNTR(x) (DMA_CH_BASE(x)+0x008) +#define DMA_CCR(x) (DMA_CH_BASE(x)+0x00C) /* 32bit dma ch0 control reg */ +#define DMA_RSSR(x) (DMA_CH_BASE(x)+0x010) /* 32bit dma ch0 req source sel reg */ +#define DMA_BLR(x) (DMA_CH_BASE(x)+0x014) /* 32bit dma ch0 burst lenght reg */ +#define DMA_RTOR(x) (DMA_CH_BASE(x)+0x018) /* 32bit dma ch0 req time out reg */ +#define DMA_BUCR(x) (DMA_CH_BASE(x)+0x018) /* 32bit dma ch0 bus utilization reg */ +#define DMA_CCNR(x) (DMA_CH_BASE(x)+0x01C) /* 32bit dma ch0 */ + +#define DMA_TCR 0x480 /*32bit dma test control reg */ +#define DMA_TFIFOA 0x484 /* 32bit dma test fifo A reg */ +#define DMA_TDRR 0x488 /* 32bit dma test request reg */ +#define DMA_TDIPR 0x48c /* 32bit dma test in progress reg */ +#define DMA_TFIFOB 0x490 /* 32bit dma test fifo B reg */ + +/*! + * This defines maximum DMA address + */ +#define MAX_DMA_ADDRESS 0xffffffff + +#define MXC_DMA_CHANNELS 16 +#define MAX_DMA_CHANNELS MXC_DMA_CHANNELS + +#define MX_DMA_CHANNELS MXC_DMA_CHANNELS + +/*!@def DMA_MEM_SIZE_8 DMA access port size, 8 bit*/ +/*!@def DMA_MEM_SIZE_16 DMA access port size, 16 bit*/ +/*!@def DMA_MEM_SIZE_32 DMA access port size, 32 bit*/ +#define DMA_MEM_SIZE_8 0x1 +#define DMA_MEM_SIZE_16 0x2 +#define DMA_MEM_SIZE_32 0x0 + +/*!@def DMA_TYPE_LINEAR DMA transfer type, linear*/ +/*!@def DMA_TYPE_2D DMA transfer type, 2D*/ +/*!@def DMA_TYPE_FIFO DMA transfer type, FIFO*/ +/*!@def DMA_TYPE_EBE DMA transfer type, end-of-burst enable FIFO*/ +#define DMA_TYPE_LINEAR 0x0 +#define DMA_TYPE_2D 0x01 +#define DMA_TYPE_FIFO 0x2 +#define DMA_TYPE_EBE 0x3 + +/*!@def DMA_DONE DMA transfer done*/ +/*!@def DMA_BURST_TIMEOUT DMA transfer timeout error*/ +/*!@def DMA_REQUEST_TIMEOUT DMA transfer request timeout error*/ +/*!@def DMA_TRANSFER_ERROR DMA transfer error*/ +/*!@def DMA_BUFFER_OVERFLOW DMA transfer buffer overflow error*/ +#define DMA_DONE 0x1000 +#define DMA_BURST_TIMEOUT 0x1 +#define DMA_REQUEST_TIMEOUT 0x2 +#define DMA_TRANSFER_ERROR 0x4 +#define DMA_BUFFER_OVERFLOW 0x8 + +/*!@brief DMA control register*/ +typedef struct { + volatile u32 CEN:1; /*!< Dma channel enable */ + volatile u32 FRC:1; /*!< Force a dma cycle bit */ + volatile u32 RPT:1; /*!< Repeat bit */ + volatile u32 REN:1; /*!< Request enable bit */ + volatile u32 SSIZ:2; /*!< Source port size, 2 bit in length */ + volatile u32 DSIZ:2; /*!< Dest port size, 2 bit in length */ + volatile u32 MSEL:1; /*!< 2D memory register set bit */ + volatile u32 MDIR:1; /*!< Transfer direction, inversed or normal */ + volatile u32 SMOD:2; /*!< Source mode, 2 bit in length */ + volatile u32 DMOD:2; /*!< Dest mode, 2 bit in length */ + volatile u32 ACRPT:1; /*!< Auto clear repeat bit */ + volatile u32 Reserver:17; /*!< Reserved bits */ + +} dma_regs_control; + +#define DMA_CTL_CEN 0x1 +#define DMA_CTL_FRC 0x2 +#define DMA_CTL_RPT 0x4 +#define DMA_CTL_REN 0x8 + +#define DMA_CTL_MSEL 0x100 +#define DMA_CTL_MDIR 0x200 +#define DMA_CTL_ACRPT 0x4000 + +#define DMA_CTL_GET_SSIZ(x) (((x)>>4)&0x3) +#define DMA_CTL_GET_DSIZ(x) (((x)>>6)&0x3) +#define DMA_CTL_GET_SMOD(x) (((x)>>10)&0x3) +#define DMA_CTL_GET_DMOD(x) (((x)>>12)&0x3) + +#define DMA_CTL_SET_SSIZ(x,value) do{ \ + (x)&=~(0x3<<4); \ + (x)|=(value)<<4; \ + }while(0) + +#define DMA_CTL_SET_DSIZ(x,value) do{ \ + (x)&=~(0x3<<6); \ + (x)|=(value)<<6; \ + }while(0) + +#define DMA_CTL_SET_SMOD(x,value) do{ \ + (x)&=~(0x3<<10); \ + (x)|=(value)<<10; \ + }while(0) + +#define DMA_CTL_SET_DMOD(x,value) do{ \ + (x)&=~(0x3<<12); \ + (x)|=(value)<<12; \ + }while(0) + +typedef struct { + volatile u32 SourceAddr; + volatile u32 DestAddr; + volatile u32 Count; + volatile u32 Ctl; + volatile u32 RequestSource; + volatile u32 BurstLength; + union { + volatile u32 ReqTimeout; + volatile u32 BusUtilt; + }; + volatile u32 transferd; +} dma_regs_t; + +#ifndef TRANSFER_32BIT +/*! + * This defines DMA access data size + */ + +#define TRANSFER_8BIT DMA_MEM_SIZE_8 +#define TRANSFER_16BIT DMA_MEM_SIZE_16 +#define TRANSFER_32BIT DMA_MEM_SIZE_32 + +#endif + +/*! + * This defines maximum device name length passed during mxc_request_dma(). + */ +#define MAX_DEVNAME_LENGTH 32 +#define MAX_BD_SIZE 32 + +/*! + * Structure containing dma channel parameters. + */ +typedef struct { + unsigned long dma_chan; /*!< the dma channel information: dynamic or channel number */ + u32 mode:1; /*!< the initialized dma mode, 0 for dma read, 1 for dma write */ + u32 rto_en:1; /*!< enable request-timeout. It is valid when REN=1 */ + u32 dir:1; /*!< Transfer direction, 0 for increment, 1 for decrement */ + u32 dma_chaining:1; /*!< Autoclear bit for chainbuffer */ + u32 ren:1; /*!< enable transfer based request signal */ + u32 M2D_Valid:1; /*!< enable 2D address module. 0 for disable it. 1 for enabled it */ + u32 msel:1; /*!<2D memory selection, 0 for set A, 1 for set B */ + u32 burstLength; /*!< Channel burst length */ + u32 request; /*!< Request source. */ + u32 busuntils; /*!< when REN=0, Bus utilization, otherwise it it request timeout */ + u32 sourceType; /*!< Source type, see DMA_TYPE_* */ + u32 sourcePort; /*!< Source port size, see DMA_MEM_SIZE_* */ + u32 destType; /*!< Destination type, see DMA_TYPE_* */ + u32 destPort; /*!< Destination port size, see DMA_MEM_SIZE_* */ + __u32 per_address; /*< Peripheral source/destination + * physical address + */ + u32 W; /*!< 2D Wide-size */ + u32 X; /*!< 2D X-size */ + u32 Y; /*!< 2D Y-size */ +} mx2_dma_info_t; + +/*! + * Structure of dma buffer descriptor + */ +typedef struct { + unsigned long state; /*!< dma bd state */ + int mode; /*!< the dma mode of this bd */ + unsigned long count; /*!< the length of the dma transfer */ + unsigned long src_addr; /*!< the source address of the dma transfer */ + unsigned long dst_addr; /*!< the destination address of the dma transfer */ +} mx2_dma_bd_t; + +/*! + * the states of dma buffer descriptor + */ +#define DMA_BD_ST_BUSY 0x20000000 /*!< dma bd is transfering or has be configured into controller */ +#define DMA_BD_ST_PEND 0x10000000 /*!< dma bd is waiting to be configured into controller */ +#define DMA_BD_ST_LAST 0x08000000 /*!< dma bd is the last dma bd which is built in one dma transfer request + * When completed this bd, the callback function must be called. + */ + +/*! + * This structure containing the private information for MX2 + */ +typedef struct mx2_dma_priv_s { + unsigned int dma_chaining:1; /* 1: using headware dma chaining feature */ + unsigned int ren:1; /* 1: dma start besed on request signal */ + unsigned long trans_bytes; /* To store the transfered data bytes in this transfer */ + mx2_dma_info_t *dma_info; /* To store the pointer for dma parameter for reading and wirting */ + int bd_rd; /* the read index of bd ring */ + int bd_wr; /* the write index of bd ring */ + atomic_t bd_used; /* the valid bd number in bd ring */ + mx2_dma_bd_t *bd_ring; /* the pointer of bd ring */ + unsigned long dma_base; /* register base address of this channel */ + int dma_irq; /* irq number of this channel */ +} mx2_dma_priv_t; + +/*! + * @brief get the dma info by channel_id + */ +extern mx2_dma_info_t *mxc_dma_get_info(mxc_dma_device_t channel_id); + +/*! + * @brief: scan dma parameter list . And collect information about which channels are dynamic . + */ +extern void mxc_dma_load_info(mxc_dma_channel_t * dma); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx37.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx37.h @@ -0,0 +1,484 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX37_H__ +#define __ASM_ARCH_MXC_MX37_H__ + +#ifndef __ASM_ARCH_MXC_HARDWARE_H__ +#error "Do not include directly." +#endif + +/*! + * @file arch-mxc/mx37.h + * @brief This file contains register definitions. + * + * @ingroup MSL_MX37 + */ + +/*! + * Define this option to specify we are using the newer SDMA module. + */ +#define MXC_SDMA_V2 + +/*! + * The maximum frequency that the pixel clock can be at so as to + * activate DVFS-PER. + */ +#define DVFS_MAX_PIX_CLK 60000000 + +/* + * IRAM + */ +#define IRAM_BASE_ADDR 0x10000000 /* internal ram */ +#define IRAM_BASE_ADDR_VIRT 0xF8000000 +#define IRAM_SIZE (9*SZ_8K) /* 72KB */ + +#if defined(CONFIG_MXC_SECURITY_SCC2) \ + || defined(CONFIG_MXC_SECURITY_SCC2_MODULE) +#define SCC_IRAM_SIZE SZ_16K +#else +#define SCC_IRAM_SIZE 0 +#endif + +/*#ifndef CONFIG_SDMA_IRAM +#define CONFIG_SDMA_IRAM_SIZE 0 +#endif*/ +#ifdef CONFIG_SDMA_IRAM +#define SDMA_IRAM_SIZE CONFIG_SDMA_IRAM_SIZE +#else +#define SDMA_IRAM_SIZE 0 +#endif + +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define SND_RAM_SIZE 0x6000 +#else +#define SND_RAM_SIZE 0 +#endif + +#ifdef CONFIG_USB_STATIC_IRAM +#define USB_IRAM_SIZE SZ_8K +#else +#define USB_IRAM_SIZE 0 +#endif + +#if (IRAM_SIZE < (SCC_IRAM_SIZE + SDMA_IRAM_SIZE + SND_RAM_SIZE + \ + USB_IRAM_SIZE)) +#error "IRAM size exceeded" +#endif + +#ifdef CONFIG_MXC_VPU_IRAM +#define VPU_IRAM_SIZE (IRAM_BASE_ADDR + IRAM_SIZE - VPU_IRAM_BASE_ADDR) +#else +#define VPU_IRAM_SIZE 0 +#endif + +#define SCC_IRAM_BASE_ADDR (IRAM_BASE_ADDR + IRAM_SIZE - SCC_IRAM_SIZE) +#define SDMA_RAM_BASE_ADDR (IRAM_BASE_ADDR) +#define SND_RAM_BASE_ADDR (IRAM_BASE_ADDR + SDMA_IRAM_SIZE) +#define USB_IRAM_BASE_ADDR (SND_RAM_BASE_ADDR + SND_RAM_SIZE) +#define VPU_IRAM_BASE_ADDR (USB_IRAM_BASE_ADDR + USB_IRAM_SIZE) + +/* + * NFC + */ +#define NFC_BASE_ADDR_AXI 0x7FFF0000 /* NAND flash AXI */ +#define NFC_BASE_ADDR_AXI_VIRT 0xF9000000 +#define NFC_AXI_SIZE SZ_64K + +/* + * L2CC + */ +#define L2CC_BASE_ADDR 0xB0000000 + +#define PLATFORM_BASE_ADDR 0xB0400000 +#define PLATFORM_BASE_ADDR_VIRT 0xFA000000 +#define PLATFORM_SIZE SZ_1M +#define EVTMON_BASE_ADDR (PLATFORM_BASE_ADDR + 0x00000000) +#define ARM1176_BASE_ADDR (PLATFORM_BASE_ADDR + 0x00004000) + +#define TZIC_BASE_ADDR 0xB0800000 +#define TZIC_BASE_ADDR_VIRT 0xFA100000 +#define TZIC_SIZE SZ_1M + +#define DEBUG_BASE_ADDR 0xB0C00000 +#define DEBUG_BASE_ADDR_VIRT 0xFA200000 +#define DEBUG_SIZE SZ_1M +#define ETB_BASE_ADDR (DEBUG_BASE_ADDR + 0x00001000) +#define ETM_BASE_ADDR (DEBUG_BASE_ADDR + 0x00002000) +#define TPIU_BASE_ADDR (DEBUG_BASE_ADDR + 0x00003000) +#define CTI0_BASE_ADDR (DEBUG_BASE_ADDR + 0x00004000) +#define CTI1_BASE_ADDR (DEBUG_BASE_ADDR + 0x00005000) +#define CTI2_BASE_ADDR (DEBUG_BASE_ADDR + 0x00006000) + +/* + * AIPS 1 + */ +#define AIPS1_BASE_ADDR 0xC3F00000 +#define AIPS1_BASE_ADDR_VIRT 0xFC000000 +#define AIPS1_SIZE SZ_1M + +#define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) +#define GPIO1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) +#define GPIO2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) +#define GPIO3_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) +#define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) +#define WDOG1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) +#define WDOG2_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) +#define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) +#define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) +#define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) +#define IIM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) +#define CSU_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) +#define SDMA_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) +#define SCC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) +#define ROMCP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000C0000) +#define RTIC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000C4000) +#define VPU_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000) +#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000) +#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D8000) +#define MSHC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000) +#define FEC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E8000) +#define RNGC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000EC000) +#define TVE_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000) +#define ECT_CTIO_BASE_ADDR (AIPS1_BASE_ADDR + 0x00018000) +#define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) + +/* + * SPBA global module enabled #0 + */ +#define SPBA0_BASE_ADDR 0xC0000000 +#define SPBA0_BASE_ADDR_VIRT 0xFC100000 +#define SPBA0_SIZE SZ_1M + +#define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) +#define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) +#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) +#define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) +#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) +#define MMC_SDHC3_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) +#define SPDIF_BASE_ADDR (SPBA0_BASE_ADDR + 0x00028000) +#define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00034000) +#define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) + +/*! + * defines for SPBA modules + */ +#define SPBA_SDHC1 0x04 +#define SPBA_SDHC2 0x08 +#define SPBA_UART3 0x0C +#define SPBA_CSPI2 0x10 +#define SPBA_SSI2 0x14 +#define SPBA_SDHC3 0x20 +#define SPBA_SPDIF 0x28 +#define SPBA_ATA 0x34 + +/*! + * Defines for modules using static and dynamic DMA channels + */ +#define MXC_DMA_CHANNEL_IRAM 30 +#define MXC_DMA_CHANNEL_SPDIF_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC2 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_SSI2_TX (MXC_DMA_CHANNEL_IRAM + 1) +#else /*CONFIG_SDMA_IRAM */ +#define MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL +#endif /*CONFIG_SDMA_IRAM */ +#define MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL + +/* + * AIPS 2 + */ +#define AIPS2_BASE_ADDR 0xE3F00000 +#define AIPS2_BASE_ADDR_VIRT 0xFC200000 +#define AIPS2_SIZE SZ_1M + +#define PLL0_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) +#define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) +#define PLL2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000) +#define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) +#define GPC_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) +#define SRC_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) +#define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) +#define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000) +#define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000) +#define OWIRE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) +#define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A8000) +#define CSPI1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) +#define UART1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) +#define UART2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000BC000) +#define I2C3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) +#define I2C2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) +#define I2C_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) +#define SSI1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) +#define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) +#define EMI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DBF00) + +#define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) +#define ESDCTL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D9000) +#define WEIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DA000) +#define NFC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DB000) + +#define DVFSPER_BASE_ADDR (GPC_BASE_ADDR + 0x1C4) + +/* + * Memory regions and CS + */ +#define IPU_CTRL_BASE_ADDR 0x80000000 +#define CSD0_BASE_ADDR 0x40000000 +#define CSD1_BASE_ADDR 0x50000000 + +#define CS0_BASE_ADDR 0x60000000 +#define CS1_BASE_ADDR 0x68000000 +#define CS2_BASE_ADDR 0x70000000 + +/*! + * This macro defines the physical to virtual address mapping for all the + * peripheral modules. It is used by passing in the physical address as x + * and returning the virtual address. If the physical address is not mapped, + * it returns 0xDEADBEEF + */ +#define IO_ADDRESS(x) \ + (void __force __iomem *) \ + (((x >= (unsigned long)IRAM_BASE_ADDR) && (x < (unsigned long)IRAM_BASE_ADDR + IRAM_SIZE)) ? IRAM_IO_ADDRESS(x):\ + ((x >= (unsigned long)PLATFORM_BASE_ADDR) && (x < (unsigned long)PLATFORM_BASE_ADDR + PLATFORM_SIZE)) ? PLATFORM_IO_ADDRESS(x):\ + ((x >= (unsigned long)TZIC_BASE_ADDR) && (x < (unsigned long)TZIC_BASE_ADDR + TZIC_SIZE)) ? TZIC_IO_ADDRESS(x):\ + ((x >= (unsigned long)DEBUG_BASE_ADDR) && (x < (unsigned long)DEBUG_BASE_ADDR + DEBUG_SIZE)) ? DEBUG_IO_ADDRESS(x):\ + ((x >= (unsigned long)SPBA0_BASE_ADDR) && (x < (unsigned long)SPBA0_BASE_ADDR + SPBA0_SIZE)) ? SPBA0_IO_ADDRESS(x):\ + ((x >= (unsigned long)AIPS1_BASE_ADDR) && (x < (unsigned long)AIPS1_BASE_ADDR + AIPS1_SIZE)) ? AIPS1_IO_ADDRESS(x):\ + ((x >= (unsigned long)AIPS2_BASE_ADDR) && (x < (unsigned long)AIPS2_BASE_ADDR + AIPS2_SIZE)) ? AIPS2_IO_ADDRESS(x):\ + ((x >= (unsigned long)NFC_BASE_ADDR_AXI) && (x < (unsigned long)NFC_BASE_ADDR_AXI + NFC_AXI_SIZE)) ? NFC_BASE_ADDR_AXI_IO_ADDRESS(x):\ + 0xDEADBEEF) + +/* + * define the address mapping macros: in physical address order + */ + +#define IRAM_IO_ADDRESS(x) \ + (((x) - IRAM_BASE_ADDR) + IRAM_BASE_ADDR_VIRT) + +#define PLATFORM_IO_ADDRESS(x) \ + (((x) - PLATFORM_BASE_ADDR) + PLATFORM_BASE_ADDR_VIRT) + +#define TZIC_IO_ADDRESS(x) \ + (((x) - TZIC_BASE_ADDR) + TZIC_BASE_ADDR_VIRT) + +#define DEBUG_IO_ADDRESS(x) \ + (((x) - DEBUG_BASE_ADDR) + DEBUG_BASE_ADDR_VIRT) + +#define SPBA0_IO_ADDRESS(x) \ + (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) + +#define AIPS1_IO_ADDRESS(x) \ + (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) + +#define AIPS2_IO_ADDRESS(x) \ + (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) + +#define NFC_BASE_ADDR_AXI_IO_ADDRESS(x) \ + (((x) - NFC_BASE_ADDR_AXI) + NFC_BASE_ADDR_AXI_VIRT) + +#define IS_MEM_DEVICE_NONSHARED(x) ((x) >= 0x80000000) + +/* + * DMA request assignments + */ +#define DMA_REQ_RESV47 47 +#define DMA_REQ_VPU 46 +#define DMA_REQ_SPDIF_TX 45 +#define DMA_REQ_UART3_TX 44 +#define DMA_REQ_UART3_RX 43 +#define DMA_REQ_I2C2 42 +#define DMA_REQ_I2C1 41 +#define DMA_REQ_SDHC3 40 +#define DMA_REQ_CSPI3_TX 39 +#define DMA_REQ_CSPI3_RX 38 +#define DMA_REQ_RESV37 37 +#define DMA_REQ_IPU 36 +#define DMA_REQ_RESV35 35 +#define DMA_REQ_EPIT2 34 +#define DMA_REQ_RESV33 33 +#define DMA_REQ_RESV32 32 +#define DMA_REQ_ECT 31 +#define DMA_REQ_NFC 30 +#define DMA_REQ_SSI1_TX1 29 +#define DMA_REQ_SSI1_RX1 28 +#define DMA_REQ_SSI1_TX2 27 +#define DMA_REQ_SSI1_RX2 26 +#define DMA_REQ_SSI2_TX1 25 +#define DMA_REQ_SSI2_RX1 24 +#define DMA_REQ_SSI2_TX2 23 +#define DMA_REQ_SSI2_RX2 22 +#define DMA_REQ_SDHC2 21 +#define DMA_REQ_SDHC1 20 +#define DMA_REQ_UART1_TX 19 +#define DMA_REQ_UART1_RX 18 +#define DMA_REQ_UART2_TX 17 +#define DMA_REQ_UART2_RX 16 +#define DMA_REQ_GPIO1_0 15 +#define DMA_REQ_GPIO1_1 14 +#define DMA_REQ_RESV13 13 +#define DMA_REQ_RESV12 12 +#define DMA_REQ_RESV11 11 +#define DMA_REQ_RESV10 10 +#define DMA_REQ_CSPI1_TX 9 +#define DMA_REQ_CSPI1_RX 8 +#define DMA_REQ_CSPI2_TX 7 +#define DMA_REQ_CSPI2_RX 6 +#define DMA_REQ_RESV5 5 +#define DMA_REQ_ATA_TX_END 4 +#define DMA_REQ_ATA_TX 3 +#define DMA_REQ_ATA_RX 2 +#define DMA_REQ_GPC 1 +#define DMA_REQ_RESV0 0 + +/* + * Interrupt numbers + */ +#define MXC_INT_BASE 0 +#define MXC_INT_RESV0 0 +#define MXC_INT_MMC_SDHC1 1 +#define MXC_INT_MMC_SDHC2 2 +#define MXC_INT_MMC_SDHC3 3 +#define MXC_INT_RESV4 4 +#define MXC_INT_RESV5 5 +#define MXC_INT_SDMA 6 +#define MXC_INT_IOMUX 7 +#define MXC_INT_RESV8 8 +#define MXC_INT_VPU 9 +#define MXC_INT_IPU_ERR 10 +#define MXC_INT_IPU_SYN 11 +#define MXC_INT_RESV12 12 +#define MXC_INT_RESV13 13 +#define MXC_INT_RNG 14 +#define MXC_INT_EMI 15 +#define MXC_INT_RESV16 16 +#define MXC_INT_RESV17 17 +#define MXC_INT_USB_OTG 18 +#define MXC_INT_RESV19 19 +#define MXC_INT_RESV20 20 +#define MXC_INT_SCC_SMN 21 +#define MXC_INT_SCC_STZ 22 +#define MXC_INT_SCC_SCM 23 +#define MXC_INT_SRTC_NTZ 24 +#define MXC_INT_SRTC_TZ 25 +#define MXC_INT_RTIC 26 +#define MXC_INT_CSU 27 +#define MXC_INT_RESV28 28 +#define MXC_INT_SSI1 29 +#define MXC_INT_SSI2 30 +#define MXC_INT_UART1 31 +#define MXC_INT_UART2 32 +#define MXC_INT_UART3 33 +#define MXC_INT_RESV34 34 +#define MXC_INT_RESV35 35 +#define MXC_INT_CSPI1 36 +#define MXC_INT_CSPI2 37 +#define MXC_INT_CSPI3 38 +#define MXC_INT_GPT 39 +#define MXC_INT_EPIT1 40 +#define MXC_INT_EPIT2 41 +#define MXC_INT_GPIO1_INT7 42 +#define MXC_INT_GPIO1_INT6 43 +#define MXC_INT_GPIO1_INT5 44 +#define MXC_INT_GPIO1_INT4 45 +#define MXC_INT_GPIO1_INT3 46 +#define MXC_INT_GPIO1_INT2 47 +#define MXC_INT_GPIO1_INT1 48 +#define MXC_INT_GPIO1_INT0 49 +#define MXC_INT_GPIO1_LOW 50 +#define MXC_INT_GPIO1_HIGH 51 +#define MXC_INT_GPIO2_LOW 52 +#define MXC_INT_GPIO2_HIGH 53 +#define MXC_INT_GPIO3_LOW 54 +#define MXC_INT_GPIO3_HIGH 55 +#define MXC_INT_RESV56 56 +#define MXC_INT_RESV57 57 +#define MXC_INT_WDOG1 58 +#define MXC_INT_WDOG2 59 +#define MXC_INT_KPP 60 +#define MXC_INT_PWM 61 +#define MXC_INT_I2C 62 +#define MXC_INT_I2C2 63 +#define MXC_INT_I2C3 64 +#define MXC_INT_MSHC1 65 +#define MXC_INT_RESV66 66 +#define MXC_INT_RESV67 67 +#define MXC_INT_RESV68 68 +#define MXC_INT_IIM 69 +#define MXC_INT_ATA 70 +#define MXC_INT_CCM1 71 +#define MXC_INT_CCM2 72 +#define MXC_INT_GPC1 73 +#define MXC_INT_GPC2 74 +#define MXC_INT_SRC 75 +#define MXC_INT_EVTMON 76 +#define MXC_INT_PER_MEASURE 77 +#define MXC_INT_DECODE_ERR 78 +#define MXC_INT_EVT_COUNT 79 +#define MXC_INT_SLAVE_ERR 80 +#define MXC_INT_RESV81 81 +#define MXC_INT_RESV82 82 +#define MXC_INT_RESV83 83 +#define MXC_INT_RESV84 84 +#define MXC_INT_RESV85 85 +#define MXC_INT_RESV86 86 +#define MXC_INT_FEC 87 +#define MXC_INT_OWIRE 88 +#define MXC_INT_CTI0 89 +#define MXC_INT_CTM0 90 +#define MXC_INT_SPDIF 91 +#define MXC_INT_TVOUT 92 + +/*! + * Interrupt Number for ARM11 PMU + */ +#define ARM11_PMU_IRQ MXC_INT_PER_MEASURE + +/* gpio and gpio based interrupt handling */ +#define GPIO_DR 0x00 +#define GPIO_GDIR 0x04 +#define GPIO_PSR 0x08 +#define GPIO_ICR1 0x0C +#define GPIO_ICR2 0x10 +#define GPIO_IMR 0x14 +#define GPIO_ISR 0x18 +#define GPIO_INT_LOW_LEV 0x0 +#define GPIO_INT_HIGH_LEV 0x1 +#define GPIO_INT_RISE_EDGE 0x2 +#define GPIO_INT_FALL_EDGE 0x3 +#define GPIO_INT_NONE 0x4 + +/*! + * Macro to convert elv, llv, ulv to a data which is used to set DCVR0, DCVR1, + * DCVR2, or DCVR3. + */ +#define DCVR(elv, llv, ulv) ((elv << 0) | (llv << 10) | (ulv << 21)) + +#endif /* __ASM_ARCH_MXC_MX37_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_edid.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_edid.h @@ -0,0 +1,33 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup Framebuffer Framebuffer Driver for SDC and ADC. + */ + +/*! + * @file mxc_edid.h + * + * @brief MXC EDID tools + * + * @ingroup Framebuffer + */ + +#ifndef MXC_EDID_H +#define MXC_EDID_H + +int read_edid(struct i2c_adapter *adp, + struct fb_var_screeninfo *einfo, + int *dvi); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx25.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx25.h @@ -0,0 +1,462 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file arch-mxc/mx25.h + * @brief This file contains register definitions. + * + * @ingroup MSL_MX25 + */ + +#ifndef __ASM_ARCH_MXC_MX25_H__ +#define __ASM_ARCH_MXC_MX25_H__ + +#ifndef __ASM_ARCH_MXC_HARDWARE_H__ +#error "Do not include directly." +#endif + +/*! + * Define this option to specify we are using the newer SDMA module. + */ +#define MXC_SDMA_V2 + +/* + * MX25 memory map: + * + * Virt Phys Size What + * --------------------------------------------------------------------------- + * FC000000 43F00000 1M AIPS 1 + * FC100000 50000000 1M SPBA + * FC200000 53F00000 1M AIPS 2 + * FC300000 60000000 1M ROMPATCH (128M) + * FC400000 68000000 1M ASIC (128M) + * FC500000 78000000 128K FBC RAM (IRAM) + * 80000000 256M SDRAM0 + * 90000000 256M SDRAM1 + * A0000000 128M CS0 Flash + * A8000000 128M CS1 Flash + * B0000000 32M CS2 SRAM + * B2000000 32M CS3 + * B4000000 32M CS4 + * B6000000 32M CS5 + * FC520000 B8000000 64K SDRAM, WEIM, M3IF, EMI controllers + * FC530000 BB000000 8K NFC + */ + +/* + * IRAM + */ +#define IRAM_BASE_ADDR 0x78000000 /* internal ram */ +#define IRAM_BASE_ADDR_VIRT 0xFC500000 +#define IRAM_SIZE SZ_128K + +#ifndef CONFIG_SDMA_IRAM +#define CONFIG_SDMA_IRAM_SIZE 0 +#endif +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define SND_RAM_SIZE 0x10000 +#else +#define SND_RAM_SIZE 0 +#endif + +#define SND_RAM_BASE_ADDR (IRAM_BASE_ADDR + CONFIG_SDMA_IRAM_SIZE) + +#define USB_IRAM_BASE_ADDR (SND_RAM_BASE_ADDR + SND_RAM_SIZE) +#ifdef CONFIG_USB_STATIC_IRAM_PPH +#define USB_IRAM_SIZE (2*SZ_8K) +#else +#define USB_IRAM_SIZE 0 +#endif + +/* + * AIPS 1 + */ +#define AIPS1_BASE_ADDR 0x43F00000 +#define AIPS1_BASE_ADDR_VIRT 0xFC000000 +#define AIPS1_SIZE SZ_1M + +#define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00004000) +#define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x00008000) +#define ETB_SLOT4_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) +#define ETB_SLOT5_BASE_ADDR (AIPS1_BASE_ADDR + 0x00010000) +#define AAPE_BASE_ADDR (AIPS1_BASE_ADDR + 0x00014000) +#define I2C_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) +#define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) +#define CAN1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) +#define CAN3_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) +#define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) +#define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) +#define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) +#define OWIRE_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) +#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) +#define CSPI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) +#define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) +#define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) +#define AUDMUX_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) +#define ECT_A_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) +#define ECT_B_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) + +/* + * SPBA global module enabled #0 + */ +#define SPBA0_BASE_ADDR 0x50000000 +#define SPBA0_BASE_ADDR_VIRT 0xFC100000 +#define SPBA0_SIZE SZ_1M + +#define CSPI3_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) +#define UART4_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) +#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) +#define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) +#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) +#define ESAI_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) +#define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) +#define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) +#define SIM2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00028000) +#define UART5_BASE_ADDR (SPBA0_BASE_ADDR + 0x0002C000) +#define TSC_BASE_ADDR (SPBA0_BASE_ADDR + 0x00030000) +#define SSI1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00034000) +#define FEC_BASE_ADDR (SPBA0_BASE_ADDR + 0x00038000) +#define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) + +/*! + * defines for SPBA modules + */ +#define SPBA_CSPI3 (0x1 << 2) +#define SPBA_UART4 (0x2 << 2) +#define SPBA_UART3 (0x3 << 2) +#define SPBA_CSPI2 (0x4 << 2) +#define SPBA_SSI2 (0x5 << 2) +#define SPBA_ESAI (0x6 << 2) +#define SPBA_ATA (0x8 << 2) +#define SPBA_SIM1 (0x9 << 2) +#define SPBA_SIM2 (0xA << 2) +#define SPBA_UART5 (0xB << 2) +#define SPBA_ANALOG (0xC << 2) +#define SPBA_SSI1 (0xD << 2) +#define SPBA_FEC (0xE << 2) + +/*! + * Defines for modules using static and dynamic DMA channels + */ +#define MXC_DMA_CHANNEL_IRAM 30 +#define MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART4_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART4_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART5_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART5_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_SSI1_TX (MXC_DMA_CHANNEL_IRAM + 1) +#else +#define MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL +#endif +#define MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ESAI_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ESAI_TX MXC_DMA_DYNAMIC_CHANNEL + +/* + * AIPS 2 + */ +#define AIPS2_BASE_ADDR 0x53F00000 +#define AIPS2_BASE_ADDR_VIRT 0xFC200000 +#define AIPS2_SIZE SZ_1M + +#define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) +#define GPT4_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) +#define GPT3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000) +#define GPT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) +#define GPT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) +#define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) +#define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) +#define GPIO4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000) +#define PWM2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000) +#define GPIO3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AD000) +#define PWM3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A8000) +#define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) +#define RNGB_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) +#define MMC_SDHC1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B4000) +#define MMC_SDHC2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B8000) +#define LCDC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000BC000) +#define SLCDC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) +#define PWM4_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) +#define GPIO1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) +#define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) +#define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) +#define WDOG1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) +#define PWM1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) +#define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) +#define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F0000) +#define USBOTG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) +#define OTG_BASE_ADDR USBOTG_BASE_ADDR +#define CSI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) +#define DRYICE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000FC000) +#define SRTC_BASE_ADDR (DRYICE_BASE_ADDR) + +/* + * ROMP and ASIC + */ +#define ROMP_BASE_ADDR 0x60000000 +#define ROMP_BASE_ADDR_VIRT 0xFC300000 +#define ROMP_SIZE SZ_1M + +#define ASIC_BASE_ADDR 0x68000000 +#define ASIC_BASE_ADDR_VIRT 0xFC400000 +#define ASIC_SIZE SZ_1M +#define AVIC_BASE_ADDR ASIC_BASE_ADDR +#define AVIC_BASE_ADDR_VIRT ASIC_BASE_ADDR_VIRT +#define AVIC_SIZE ASIC_SIZE + +/* + * SDRAM, WEIM, M3IF, EMI controllers + */ +#define X_MEMC_BASE_ADDR 0xB8000000 +#define X_MEMC_BASE_ADDR_VIRT 0xFC520000 +#define X_MEMC_SIZE SZ_64K + +#define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) +#define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) +#define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) +#define EMI_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) + +/* + * NFC controller + */ +#define NFC_BASE_ADDR 0xBB000000 +#define NFC_BASE_ADDR_VIRT 0xFC530000 +#define NFC_SIZE SZ_8K + +/* + * Memory regions and CS + */ +#define CSD0_BASE_ADDR 0x80000000 +#define CSD1_BASE_ADDR 0x90000000 + +#define SDRAM_BASE_ADDR CSD0_BASE_ADDR + +#define CS0_BASE_ADDR 0xA0000000 +#define CS1_BASE_ADDR 0xA8000000 +#define CS2_BASE_ADDR 0xB0000000 +#define CS3_BASE_ADDR 0xB2000000 +#define CS4_BASE_ADDR 0xB4000000 +#define CS4_SIZE SZ_32M +#define CS5_BASE_ADDR 0xB6000000 +#define CS5_SIZE SZ_32M + +/*! + * This macro defines the physical to virtual address mapping for all the + * peripheral modules. It is used by passing in the physical address as x + * and returning the virtual address. If the physical address is not mapped, + * it returns 0xDEADBEEF + */ +#define IO_ADDRESS(x) \ + (void __force __iomem *) \ + (((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ + ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\ + ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\ + ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\ + ((x >= ASIC_BASE_ADDR) && (x < (ASIC_BASE_ADDR + AVIC_SIZE))) ? ASIC_IO_ADDRESS(x):\ + ((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\ + ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ + ((x >= NFC_BASE_ADDR) && (x < (NFC_BASE_ADDR + NFC_SIZE))) ? NFC_IO_ADDRESS(x):\ + 0xDEADBEEF) + +/* + * define the address mapping macros: in physical address order + */ + +#define AIPS1_IO_ADDRESS(x) \ + (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) + +#define SPBA0_IO_ADDRESS(x) \ + (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) + +#define AIPS2_IO_ADDRESS(x) \ + (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) + +#define ROMP_IO_ADDRESS(x) \ + (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT) + +#define ASIC_IO_ADDRESS(x) \ + (((x) - ASIC_BASE_ADDR) + ASIC_BASE_ADDR_VIRT) + +/* for entry-macro.S */ +#define AVIC_IO_ADDRESS(x) ASIC_IO_ADDRESS(x) + +#define IRAM_IO_ADDRESS(x) \ + (((x) - IRAM_BASE_ADDR) + IRAM_BASE_ADDR_VIRT) + +#define X_MEMC_IO_ADDRESS(x) \ + (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) + +#define NFC_IO_ADDRESS(x) \ + (((x) - NFC_BASE_ADDR) + NFC_BASE_ADDR_VIRT) + +#define IS_MEM_DEVICE_NONSHARED(x) 0 + +/* + * DMA request assignments + */ +#define DMA_REQ_EXTREQ0 0 +#define DMA_REQ_CCM 1 +#define DMA_REQ_ATA_TX_END 2 +#define DMA_REQ_ATA_TX 3 +#define DMA_REQ_ATA_RX 4 +#define DMA_REQ_CSPI2_RX 6 +#define DMA_REQ_CSPI2_TX 7 +#define DMA_REQ_CSPI1_RX 8 +#define DMA_REQ_CSPI1_TX 9 +#define DMA_REQ_UART3_RX 10 +#define DMA_REQ_UART3_TX 11 +#define DMA_REQ_UART4_RX 12 +#define DMA_REQ_UART4_TX 13 +#define DMA_REQ_EXTREQ1 14 +#define DMA_REQ_EXTREQ2 15 +#define DMA_REQ_UART2_RX 16 +#define DMA_REQ_UART2_TX 17 +#define DMA_REQ_UART1_RX 18 +#define DMA_REQ_UART1_TX 19 +#define DMA_REQ_SSI2_RX1 22 +#define DMA_REQ_SSI2_TX1 23 +#define DMA_REQ_SSI2_RX0 24 +#define DMA_REQ_SSI2_TX0 25 +#define DMA_REQ_SSI1_RX1 26 +#define DMA_REQ_SSI1_TX1 27 +#define DMA_REQ_SSI1_RX0 28 +#define DMA_REQ_SSI1_TX0 29 +#define DMA_REQ_NFC 30 +#define DMA_REQ_ECT 31 +#define DMA_REQ_ESAI_RX 32 +#define DMA_REQ_ESAI_TX 33 +#define DMA_REQ_CSPI3_RX 34 +#define DMA_REQ_CSPI3_TX 35 +#define DMA_REQ_SIM2_RX 36 +#define DMA_REQ_SIM2_TX 37 +#define DMA_REQ_SIM1_RX 38 +#define DMA_REQ_SIM1_TX 39 +#define DMA_REQ_TSC_GCQ 44 +#define DMA_REQ_TSC_TCQ 45 +#define DMA_REQ_UART5_RX 46 +#define DMA_REQ_UART5_TX 47 + +/* + * Interrupt numbers + */ +#define MXC_INT_CSPI3 0 +#define MXC_INT_GPT4 1 +#define MXC_INT_OWIRE 2 +#define MXC_INT_I2C 3 +#define MXC_INT_I2C2 4 +#define MXC_INT_UART4 5 +#define MXC_INT_RTIC 6 +#define MXC_INT_ESAI 7 +#define MXC_INT_SDHC2 8 +#define MXC_INT_SDHC1 9 +#define MXC_INT_I2C3 10 +#define MXC_INT_SSI2 11 +#define MXC_INT_SSI1 12 +#define MXC_INT_CSPI2 13 +#define MXC_INT_CSPI1 14 +#define MXC_INT_ATA 15 +#define MXC_INT_GPIO3 16 +#define MXC_INT_CSI 17 +#define MXC_INT_UART3 18 +#define MXC_INT_IIM 19 +#define MXC_INT_SIM1 20 +#define MXC_INT_SIM2 21 +#define MXC_INT_RNG 22 +#define MXC_INT_GPIO4 23 +#define MXC_INT_KPP 24 +#define MXC_INT_DRYICE_NORM 25 +#define MXC_INT_PWM 26 +#define MXC_INT_EPIT2 27 +#define MXC_INT_EPIT1 28 +#define MXC_INT_GPT3 29 +#define MXC_INT_POWER_FAIL 30 +#define MXC_INT_CRM 31 +#define MXC_INT_UART2 32 +#define MXC_INT_NANDFC 33 +#define MXC_INT_SDMA 34 +#define MXC_INT_USB_HTG 35 +#define MXC_INT_PWM2 36 +#define MXC_INT_USB_OTG 37 +#define MXC_INT_SLCDC 38 +#define MXC_INT_LCDC 39 +#define MXC_INT_UART5 40 +#define MXC_INT_PWM3 41 +#define MXC_INT_PWM4 42 +#define MXC_INT_CAN1 43 +#define MXC_INT_CAN2 44 +#define MXC_INT_UART1 45 +#define MXC_INT_TSC 46 +#define MXC_INT_ECT 48 +#define MXC_INT_SCC_SCM 49 +#define MXC_INT_SCC_SMN 50 +#define MXC_INT_GPIO2 51 +#define MXC_INT_GPIO1 52 +#define MXC_INT_GPT2 53 +#define MXC_INT_GPT1 54 +#define MXC_INT_WDOG 55 +#define MXC_INT_DRYICE_SEC 56 +#define MXC_INT_FEC 57 +#define MXC_INT_EXT_INT5 58 +#define MXC_INT_EXT_INT4 59 +#define MXC_INT_EXT_INT3 60 +#define MXC_INT_EXT_INT2 61 +#define MXC_INT_EXT_INT1 62 +#define MXC_INT_EXT_INT0 63 + +#define MXC_INT_GPT MXC_INT_GPT1 + +/* gpio and gpio based interrupt handling */ +#define GPIO_DR 0x00 +#define GPIO_GDIR 0x04 +#define GPIO_PSR 0x08 +#define GPIO_ICR1 0x0C +#define GPIO_ICR2 0x10 +#define GPIO_IMR 0x14 +#define GPIO_ISR 0x18 +#define GPIO_INT_LOW_LEV 0x0 +#define GPIO_INT_HIGH_LEV 0x1 +#define GPIO_INT_RISE_EDGE 0x2 +#define GPIO_INT_FALL_EDGE 0x3 +#define GPIO_INT_NONE 0x4 + +#define MXC_TIMER_GPT1 1 +#define MXC_TIMER_GPT2 2 +#define MXC_TIMER_GPT3 3 +#define MXC_TIMER_GPT4 4 + +/*! + * NFMS bit in RCSR register for pagesize of nandflash + */ +#define NFMS (*((volatile u32 *)IO_ADDRESS(CCM_BASE_ADDR + 0x28))) +#define NFMS_NF_DWIDTH 14 +#define NFMS_NF_PG_SZ 8 + +#endif /* __ASM_ARCH_MXC_MX25_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/hardware.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/hardware.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * * This program is free software; you can redistribute it and/or @@ -22,9 +22,33 @@ #include +/* + * --------------------------------------------------------------------------- + * Processor specific defines + * --------------------------------------------------------------------------- + */ +#define CHIP_REV_1_0 0x10 +#define CHIP_REV_1_1 0x11 +#define CHIP_REV_1_2 0x12 +#define CHIP_REV_1_3 0x13 +#define CHIP_REV_2_0 0x20 +#define CHIP_REV_2_1 0x21 +#define CHIP_REV_2_2 0x22 +#define CHIP_REV_2_3 0x23 +#define CHIP_REV_3_0 0x30 +#define CHIP_REV_3_1 0x31 +#define CHIP_REV_3_2 0x32 + +#define BOARD_REV_1 0x000 +#define BOARD_REV_2 0x100 + #ifdef CONFIG_ARCH_MX3 #include #include +#endif + +#ifdef CONFIG_ARCH_MX35 +#include #include #endif @@ -42,6 +66,44 @@ # include #endif +#ifdef CONFIG_ARCH_MX37 +#include +#endif + +#ifdef CONFIG_ARCH_MX51 +#include +#endif + +#ifdef CONFIG_ARCH_MX25 +#include +#endif + +#ifndef __ASSEMBLY__ +extern unsigned int system_rev; +#define board_is_rev(rev) (((system_rev & 0x0F00) == rev) ? 1 : 0) +#endif + #include +/*! + * Register an interrupt handler for the SMN as well as the SCC. In some + * implementations, the SMN is not connected at all, and in others, it is + * on the same interrupt line as the SCM. Comment this line out accordingly + */ +#define USE_SMN_INTERRUPT + +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive Irda data. + */ +#define MXC_UART_IR_RXDMUX 0x0004 +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive UART data. + */ +#define MXC_UART_RXDMUX 0x0004 + +#ifndef MXC_INT_FORCE +#define MXC_INT_FORCE -1 +#endif #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/pmic_power.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/pmic_power.h @@ -0,0 +1,1358 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_POWER_H__ +#define __ASM_ARCH_MXC_PMIC_POWER_H__ + +/*! + * @defgroup PMIC_POWER PMIC Power Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_power.h + * @brief This is the header of PMIC power driver. + * + * @ingroup PMIC_POWER + */ + +#include +#include +#include + +/*! + * @name IOCTL user space interface + */ +/*! @{ */ + +/*! + * Turn on a regulator. + */ +#define PMIC_REGULATOR_ON _IOWR('p', 0xf0, int) + +/*! + * Turn off a regulator. + */ +#define PMIC_REGULATOR_OFF _IOWR('p', 0xf1, int) + +/*! + * Set regulator configuration. + */ +#define PMIC_REGULATOR_SET_CONFIG _IOWR('p', 0xf2, int) + +/*! + * Get regulator configuration. + */ +#define PMIC_REGULATOR_GET_CONFIG _IOWR('p', 0xf3, int) + +/*! + * Miscellaneous Power Test. + */ +#define PMIC_POWER_CHECK_MISC _IOWR('p', 0xf4, int) + +/*! @} */ + +/*! + * This enumeration define all power interrupts + */ +typedef enum { + /*! + * BP turn on threshold detection + */ + PWR_IT_BPONI = 0, + /*! + * End of life / low battery detect + */ + PWR_IT_LOBATLI, + /*! + * Low battery warning + */ + PWR_IT_LOBATHI, + /*! + * ON1B event + */ + PWR_IT_ONOFD1I, + /*! + * ON2B event + */ + PWR_IT_ONOFD2I, + /*! + * ON3B event + */ + PWR_IT_ONOFD3I, + /*! + * System reset + */ + PWR_IT_SYSRSTI, + /*! + * Power ready + */ + PWR_IT_PWRRDYI, + /*! + * Power cut event + */ + PWR_IT_PCI, + /*! + * Warm start event + */ + PWR_IT_WARMI, + /*! + * Memory hold event + */ +} t_pwr_int; + +/*! + * VHOLD regulator output voltage setting. + */ +typedef enum { + VH_1_875V, /*!< 1.875V */ + VH_2_5V, /*!< 2.5V */ + VH_1_55V, /*!< 1.55V */ + VH_PASSTHROUGH, /*!< Pass-through mode */ +} t_vhold_voltage; + +/*! + * PMIC power control configuration. + */ + +typedef struct { + bool pc_enable; /*!< Power cut enable */ + unsigned char pc_timer; /*!< Power cut timer value */ + bool pc_count_enable; /*!< Power cut counter enable, + If TURE, Power cuts are disabled + when pc_count > pc_max_count; + If FALSE, Power cuts are not + disabled when + pc_count > pc_max_count */ + unsigned char pc_count; /*!< Power cut count */ + unsigned char pc_max_count; /*!< Power cut maximum count */ + bool warm_enable; /*!< User Off state enable */ + bool user_off_pc; /*!< Automatic transition to user off + during power cut */ + bool clk_32k_enable; /*!< 32 kHz output buffer enable + during memory hold */ + bool clk_32k_user_off; /*!< Keeps the CLK32KMCU active during + user off power cut modes */ + bool en_vbkup1; /*!< enable VBKUP1 regulator */ + bool auto_en_vbkup1; /*!< automatically enable VBKUP1 + regulator in the memory hold + and user of modes */ + t_vhold_voltage vhold_voltage; /*!< output voltage for VBKUP1 */ + bool en_vbkup2; /*!< enable VBKUP2 regulator */ + bool auto_en_vbkup2; /*!< automatically enable VBKUP2 + regulator in the memory hold + and user of modes */ + t_vhold_voltage vhold_voltage2; /*!< output voltage for VBKUP2 */ + unsigned char mem_timer; /*!< duration of the memory hold + timer */ + bool mem_allon; /*!< memory hold timer infinity mode, + If TRUE, the memory hold timer + will be set to infinity and + the mem_timer filed will be + ignored */ +} t_pc_config; + +/*! + * brief PMIC regulators. + */ + +typedef enum { + SW_SW1A = 0, /*!< SW1A or SW1 */ + SW_SW1B, /*!< SW1B */ + SW_SW2A, /*!< SW2A or SW2 */ + SW_SW2B, /*!< SW2B */ + SW_SW3, /*!< SW3 */ + SW_PLL, /*!< PLL */ + REGU_VAUDIO, /*!< VAUDIO */ + REGU_VIOHI, /*!< VIOHI */ + REGU_VIOLO, /*!< VIOLO */ + REGU_VDIG, /*!< VDIG */ + REGU_VGEN, /*!< VGEN */ + REGU_VRFDIG, /*!< VRFDIG */ + REGU_VRFREF, /*!< VRFREF */ + REGU_VRFCP, /*!< VRFCP */ + REGU_VSIM, /*!< VSIM */ + REGU_VESIM, /*!< VESIM */ + REGU_VCAM, /*!< VCAM */ + REGU_VRFBG, /*!< VRFBG */ + REGU_VVIB, /*!< VVIB */ + REGU_VRF1, /*!< VRF1 */ + REGU_VRF2, /*!< VRF2 */ + REGU_VMMC1, /*!< VMMC1 or VMMC */ + REGU_VMMC2, /*!< VMMC2 */ + REGU_GPO1, /*!< GPIO1 */ + REGU_GPO2, /*!< GPO2 */ + REGU_GPO3, /*!< GPO3 */ + REGU_GPO4, /*!< GPO4 */ + REGU_V1, /*!< V1 */ + REGU_V2, /*!< V2 */ + REGU_V3, /*!< V3 */ + REGU_V4, /*!< V4 */ +} t_pmic_regulator; + +/*! + * @enum t_pmic_regulator_voltage_sw1 + * @brief PMIC Switch mode regulator SW1 output voltages. + */ + +typedef enum { + SW1_1V = 0, /*!< 1.0 V */ + SW1_1_1V, /*!< 1.1 V */ + SW1_1_2V, /*!< 1.2 V */ + SW1_1_3V, /*!< 1.3 V */ + SW1_1_4V, /*!< 1.4 V */ + SW1_1_55V, /*!< 1.55 V */ + SW1_1_625V, /*!< 1.625 V */ + SW1_1_875V, /*!< 1.875 V */ +} t_pmic_regulator_voltage_sw1; + +/*! + * @enum t_pmic_regulator_voltage_sw1a + * @brief PMIC regulator SW1A output voltage. + */ +typedef enum { + SW1A_0_9V = 0, /*!< 0.900 V */ + SW1A_0_925V, /*!< 0.925 V */ + SW1A_0_95V, /*!< 0.950 V */ + SW1A_0_975V, /*!< 0.975 V */ + SW1A_1V, /*!< 1.000 V */ + SW1A_1_025V, /*!< 1.025 V */ + SW1A_1_05V, /*!< 1.050 V */ + SW1A_1_075V, /*!< 1.075 V */ + SW1A_1_1V, /*!< 1.100 V */ + SW1A_1_125V, /*!< 1.125 V */ + SW1A_1_15V, /*!< 1.150 V */ + SW1A_1_175V, /*!< 1.175 V */ + SW1A_1_2V, /*!< 1.200 V */ + SW1A_1_225V, /*!< 1.225 V */ + SW1A_1_25V, /*!< 1.250 V */ + SW1A_1_275V, /*!< 1.275 V */ + SW1A_1_3V, /*!< 1.300 V */ + SW1A_1_325V, /*!< 1.325 V */ + SW1A_1_35V, /*!< 1.350 V */ + SW1A_1_375V, /*!< 1.375 V */ + SW1A_1_4V, /*!< 1.400 V */ + SW1A_1_425V, /*!< 1.425 V */ + SW1A_1_45V, /*!< 1.450 V */ + SW1A_1_475V, /*!< 1.475 V */ + SW1A_1_5V, /*!< 1.500 V */ + SW1A_1_525V, /*!< 1.525 V */ + SW1A_1_55V, /*!< 1.550 V */ + SW1A_1_575V, /*!< 1.575 V */ + SW1A_1_6V, /*!< 1.600 V */ + SW1A_1_625V, /*!< 1.625 V */ + SW1A_1_65V, /*!< 1.650 V */ + SW1A_1_675V, /*!< 1.675 V */ + SW1A_1_7V, /*!< 1.700 V */ + SW1A_1_8V = 36, /*!< 1.800 V */ + SW1A_1_85V = 40, /*!< 1.850 V */ + SW1A_2V = 44, /*!< 2_000 V */ + SW1A_2_1V = 48, /*!< 2_100 V */ + SW1A_2_2V = 52, /*!< 2_200 V */ +} t_pmic_regulator_voltage_sw1a; + +/*! + * @enum t_pmic_regulator_voltage_sw1b + * @brief PMIC regulator SW1B output voltage. + */ +typedef enum { + SW1B_0_9V = 0, /*!< 0.900 V */ + SW1B_0_925V, /*!< 0.925 V */ + SW1B_0_95V, /*!< 0.950 V */ + SW1B_0_975V, /*!< 0.975 V */ + SW1B_1V, /*!< 1.000 V */ + SW1B_1_025V, /*!< 1.025 V */ + SW1B_1_05V, /*!< 1.050 V */ + SW1B_1_075V, /*!< 1.075 V */ + SW1B_1_1V, /*!< 1.100 V */ + SW1B_1_125V, /*!< 1.125 V */ + SW1B_1_15V, /*!< 1.150 V */ + SW1B_1_175V, /*!< 1.175 V */ + SW1B_1_2V, /*!< 1.200 V */ + SW1B_1_225V, /*!< 1.225 V */ + SW1B_1_25V, /*!< 1.250 V */ + SW1B_1_275V, /*!< 1.275 V */ + SW1B_1_3V, /*!< 1.300 V */ + SW1B_1_325V, /*!< 1.325 V */ + SW1B_1_35V, /*!< 1.350 V */ + SW1B_1_375V, /*!< 1.375 V */ + SW1B_1_4V, /*!< 1.400 V */ + SW1B_1_425V, /*!< 1.425 V */ + SW1B_1_45V, /*!< 1.450 V */ + SW1B_1_475V, /*!< 1.475 V */ + SW1B_1_5V, /*!< 1.500 V */ + SW1B_1_525V, /*!< 1.525 V */ + SW1B_1_55V, /*!< 1.550 V */ + SW1B_1_575V, /*!< 1.575 V */ + SW1B_1_6V, /*!< 1.600 V */ + SW1B_1_625V, /*!< 1.625 V */ + SW1B_1_65V, /*!< 1.650 V */ + SW1B_1_675V, /*!< 1.675 V */ + SW1B_1_7V, /*!< 1.700 V */ + SW1B_1_8V = 36, /*!< 1.800 V */ + SW1B_1_85V = 40, /*!< 1.850 V */ + SW1B_2V = 44, /*!< 2_000 V */ + SW1B_2_1V = 48, /*!< 2_100 V */ + SW1B_2_2V = 52, /*!< 2_200 V */ +} t_pmic_regulator_voltage_sw1b; + +/*! + * @enum t_pmic_regulator_voltage_sw2 + * @brief PMIC Switch mode regulator SW2 output voltages. + */ +typedef enum { + SW2_1V = 0, /*!< 1.0 V */ + SW2_1_1V, /*!< 1.1 V */ + SW2_1_2V, /*!< 1.2 V */ + SW2_1_3V, /*!< 1.3 V */ + SW2_1_4V, /*!< 1.4 V */ + SW2_1_55V, /*!< 1.55 V */ + SW2_1_625V, /*!< 1.625 V */ + SW2_1_875V, /*!< 1.875 V */ +} t_pmic_regulator_voltage_sw2; + +/*! + * @enum t_pmic_regulator_voltage_sw2a + * @brief PMIC regulator SW2A output voltage. + */ +typedef enum { + SW2A_0_9V = 0, /*!< 0.900 V */ + SW2A_0_925V, /*!< 0.925 V */ + SW2A_0_95V, /*!< 0.950 V */ + SW2A_0_975V, /*!< 0.975 V */ + SW2A_1V, /*!< 1.000 V */ + SW2A_1_025V, /*!< 1.025 V */ + SW2A_1_05V, /*!< 1.050 V */ + SW2A_1_075V, /*!< 1.075 V */ + SW2A_1_1V, /*!< 1.100 V */ + SW2A_1_125V, /*!< 1.125 V */ + SW2A_1_15V, /*!< 1.150 V */ + SW2A_1_175V, /*!< 1.175 V */ + SW2A_1_2V, /*!< 1.200 V */ + SW2A_1_225V, /*!< 1.225 V */ + SW2A_1_25V, /*!< 1.250 V */ + SW2A_1_275V, /*!< 1.275 V */ + SW2A_1_3V, /*!< 1.300 V */ + SW2A_1_325V, /*!< 1.325 V */ + SW2A_1_35V, /*!< 1.350 V */ + SW2A_1_375V, /*!< 1.375 V */ + SW2A_1_4V, /*!< 1.400 V */ + SW2A_1_425V, /*!< 1.425 V */ + SW2A_1_45V, /*!< 1.450 V */ + SW2A_1_475V, /*!< 1.475 V */ + SW2A_1_5V, /*!< 1.500 V */ + SW2A_1_525V, /*!< 1.525 V */ + SW2A_1_55V, /*!< 1.550 V */ + SW2A_1_575V, /*!< 1.575 V */ + SW2A_1_6V, /*!< 1.600 V */ + SW2A_1_625V, /*!< 1.625 V */ + SW2A_1_65V, /*!< 1.650 V */ + SW2A_1_675V, /*!< 1.675 V */ + SW2A_1_7V, /*!< 1.700 V */ + SW2A_1_8V = 36, /*!< 1.800 V */ + SW2A_1_9V = 40, /*!< 1.900 V */ + SW2A_2V = 44, /*!< 2_000 V */ + SW2A_2_1V = 48, /*!< 2_100 V */ + SW2A_2_2V = 52, /*!< 2_200 V */ +} t_pmic_regulator_voltage_sw2a; + +/*! + * @enum t_pmic_regulator_voltage_sw2b + * @brief PMIC regulator SW2B output voltage. + */ +typedef enum { + SW2B_0_9V = 0, /*!< 0.900 V */ + SW2B_0_925V, /*!< 0.925 V */ + SW2B_0_95V, /*!< 0.950 V */ + SW2B_0_975V, /*!< 0.975 V */ + SW2B_1V, /*!< 1.000 V */ + SW2B_1_025V, /*!< 1.025 V */ + SW2B_1_05V, /*!< 1.050 V */ + SW2B_1_075V, /*!< 1.075 V */ + SW2B_1_1V, /*!< 1.100 V */ + SW2B_1_125V, /*!< 1.125 V */ + SW2B_1_15V, /*!< 1.150 V */ + SW2B_1_175V, /*!< 1.175 V */ + SW2B_1_2V, /*!< 1.200 V */ + SW2B_1_225V, /*!< 1.225 V */ + SW2B_1_25V, /*!< 1.250 V */ + SW2B_1_275V, /*!< 1.275 V */ + SW2B_1_3V, /*!< 1.300 V */ + SW2B_1_325V, /*!< 1.325 V */ + SW2B_1_35V, /*!< 1.350 V */ + SW2B_1_375V, /*!< 1.375 V */ + SW2B_1_4V, /*!< 1.400 V */ + SW2B_1_425V, /*!< 1.425 V */ + SW2B_1_45V, /*!< 1.450 V */ + SW2B_1_475V, /*!< 1.475 V */ + SW2B_1_5V, /*!< 1.500 V */ + SW2B_1_525V, /*!< 1.525 V */ + SW2B_1_55V, /*!< 1.550 V */ + SW2B_1_575V, /*!< 1.575 V */ + SW2B_1_6V, /*!< 1.600 V */ + SW2B_1_625V, /*!< 1.625 V */ + SW2B_1_65V, /*!< 1.650 V */ + SW2B_1_675V, /*!< 1.675 V */ + SW2B_1_7V, /*!< 1.700 V */ + SW2B_1_8V = 36, /*!< 1.800 V */ + SW2B_1_9V = 40, /*!< 1.900 V */ + SW2B_2V = 44, /*!< 2_000 V */ + SW2B_2_1V = 48, /*!< 2_100 V */ + SW2B_2_2V = 52, /*!< 2_200 V */ +} t_pmic_regulator_voltage_sw2b; + +/*! + * @enum t_pmic_regulator_voltage_sw3 + * @brief PMIC Switch mode regulator SW3 output voltages. + */ +typedef enum { + SW3_5V = 0, /*!< 5.0 V */ + SW3_5_1V = 0, /*!< 5.1 V */ + SW3_5_6V, /*!< 5.6 V */ +} t_pmic_regulator_voltage_sw3; + +/*! + * @enum t_switcher_factor + * @brief PLL multiplication factor + */ +typedef enum { + FACTOR_28 = 0, /*!< 917 504 kHz */ + FACTOR_29, /*!< 950 272 kHz */ + FACTOR_30, /*!< 983 040 kHz */ + FACTOR_31, /*!< 1 015 808 kHz */ + FACTOR_32, /*!< 1 048 576 kHz */ + FACTOR_33, /*!< 1 081 344 kHz */ + FACTOR_34, /*!< 1 114 112 kHz */ + FACTOR_35, /*!< 1 146 880 kHz */ +} t_switcher_factor; + +/*! + * @enum t_pmic_regulator_voltage_violo + * @brief PMIC regulator VIOLO output voltage. + */ +typedef enum { + VIOLO_1_2V = 0, /*!< 1.2 V */ + VIOLO_1_3V, /*!< 1.3 V */ + VIOLO_1_5V, /*!< 1.5 V */ + VIOLO_1_8V, /*!< 1.8 V */ +} t_pmic_regulator_voltage_violo; + +/*! + * @enum t_pmic_regulator_voltage_vdig + * @brief PMIC regulator VDIG output voltage. + */ +typedef enum { + VDIG_1_2V = 0, /*!< 1.2 V */ + VDIG_1_3V, /*!< 1.3 V */ + VDIG_1_5V, /*!< 1.5 V */ + VDIG_1_8V, /*!< 1.8 V */ +} t_pmic_regulator_voltage_vdig; + +/*! + * @enum t_pmic_regulator_voltage_vgen + * @brief PMIC regulator VGEN output voltage. + */ +typedef enum { + VGEN_1_2V = 0, /*!< 1.2 V */ + VENG_1_3V, /*!< 1.3 V */ + VGEN_1_5V, /*!< 1.5 V */ + VGEN_1_8V, /*!< 1.8 V */ + VGEN_1_1V, /*!< 1.1 V */ + VGEN_2V, /*!< 2 V */ + VGEN_2_775V, /*!< 2.775 V */ + VGEN_2_4V, /*!< 2.4 V */ +} t_pmic_regulator_voltage_vgen; + +/*! + * @enum t_pmic_regulator_voltage_vrfdig + * @brief PMIC regulator VRFDIG output voltage. + */ +typedef enum { + VRFDIG_1_2V = 0, /*!< 1.2 V */ + VRFDIG_1_5V, /*!< 1.5 V */ + VRFDIG_1_8V, /*!< 1.8 V */ + VRFDIG_1_875V, /*!< 1.875 V */ +} t_pmic_regulator_voltage_vrfdig; + +/*! + * @enum t_pmic_regulator_voltage_vrfref + * @brief PMIC regulator VRFREF output voltage. + */ +typedef enum { + VRFREF_2_475V = 0, /*!< 2.475 V */ + VRFREF_2_6V, /*!< 2.600 V */ + VRFREF_2_7V, /*!< 2.700 V */ + VRFREF_2_775V, /*!< 2.775 V */ +} t_pmic_regulator_voltage_vrfref; + +/*! + * @enum t_pmic_regulator_voltage_vrfcp + * @brief PMIC regulator VRFCP output voltage. + */ +typedef enum { + VRFCP_2_7V = 0, /*!< 2.700 V */ + VRFCP_2_775V, /*!< 2.775 V */ +} t_pmic_regulator_voltage_vrfcp; + +/*! + * @enum t_pmic_regulator_voltage_vsim + * @brief PMIC linear regulator VSIM output voltage. + */ +typedef enum { + VSIM_1_8V = 0, /*!< 1.8 V */ + VSIM_2_9V, /*!< 2.90 V */ + VSIM_3V = 1, /*!< 3 V */ +} t_pmic_regulator_voltage_vsim; + +/*! + * @enum t_pmic_regulator_voltage_vesim + * @brief PMIC regulator VESIM output voltage. + */ +typedef enum { + VESIM_1_8V = 0, /*!< 1.80 V */ + VESIM_2_9V, /*!< 2.90 V */ +} t_pmic_regulator_voltage_vesim; + +/*! + * @enum t_pmic_regulator_voltage_vcam + * @brief PMIC regulator VCAM output voltage. + */ +typedef enum { + VCAM_1_5V = 0, /*!< 1.50 V */ + VCAM_1_8V, /*!< 1.80 V */ + VCAM_2_5V, /*!< 2.50 V */ + VCAM_2_55V, /*!< 2.55 V */ + VCAM_2_6V, /*!< 2.60 V */ + VCAM_2_75V, /*!< 2.75 V */ + VCAM_2_8V, /*!< 2.80 V */ + VCAM_3V, /*!< 3.00 V */ +} t_pmic_regulator_voltage_vcam; + +/*! + * @enum t_pmic_regulator_voltage_vvib + * @brief PMIC linear regulator V_VIB output voltage. + */ +typedef enum { + VVIB_1_3V = 0, /*!< 1.30 V */ + VVIB_1_8V, /*!< 1.80 V */ + VVIB_2V, /*!< 2 V */ + VVIB_3V, /*!< 3 V */ +} t_pmic_regulator_voltage_vvib; + +/*! + * @enum t_pmic_regulator_voltage_vrf1 + * @brief PMIC regulator VRF1 output voltage. + */ +typedef enum { + VRF1_1_5V = 0, /*!< 1.500 V */ + VRF1_1_875V, /*!< 1.875 V */ + VRF1_2_7V, /*!< 2.700 V */ + VRF1_2_775V, /*!< 2.775 V */ +} t_pmic_regulator_voltage_vrf1; + +/*! + * @enum t_pmic_regulator_voltage_vrf2 + * @brief PMIC regulator VRF2 output voltage. + */ +typedef enum { + VRF2_1_5V = 0, /*!< 1.500 V */ + VRF2_1_875V, /*!< 1.875 V */ + VRF2_2_7V, /*!< 2.700 V */ + VRF2_2_775V, /*!< 2.775 V */ +} t_pmic_regulator_voltage_vrf2; + +/*! + * @enum t_pmic_regulator_voltage_vmmc + * @brief PMIC linear regulator VMMC output voltage. + */ +typedef enum { + VMMC_OFF = 0, /*!< Output off */ + VMMC_1_6V, /*!< 1.6 V */ + VMMC_1_8V, /*!< 1.8 V */ + VMMC_2V, /*!< 2 V */ + VMMC_2_2V, /*!< 2.2 V */ + VMMC_2_4V, /*!< 2.4 V */ + VMMC_2_6V, /*!< 2.6 V */ + VMMC_2_8V, /*!< 2.8 V */ + VMMC_3V, /*!< 3 V */ + VMMC_3_2V, /*!< 3.2 V */ + VMMC_3_3V, /*!< 3.3 V */ + VMMC_3_4V, /*!< 3.4 V */ +} t_pmic_regulator_voltage_vmmc; + +/*! + * @enum t_pmic_regulator_voltage_vmmc1 + * @brief PMIC regulator VMMC1 output voltage. + */ +typedef enum { + VMMC1_1_6V = 0, /*!< 1.60 V */ + VMMC1_1_8V, /*!< 1.80 V */ + VMMC1_2V, /*!< 2.00 V */ + VMMC1_2_6V, /*!< 2.60 V */ + VMMC1_2_7V, /*!< 2.70 V */ + VMMC1_2_8V, /*!< 2.80 V */ + VMMC1_2_9V, /*!< 2.90 V */ + VMMC1_3V, /*!< 3.00 V */ +} t_pmic_regulator_voltage_vmmc1; + +/*! + * @enum t_pmic_regulator_voltage_vmmc2 + * @brief PMIC regulator VMMC2 output voltage. + */ +typedef enum { + VMMC2_1_6V = 0, /*!< 1.60 V */ + VMMC2_1_8V, /*!< 1.80 V */ + VMMC2_2V, /*!< 2.00 V */ + VMMC2_2_6V, /*!< 2.60 V */ + VMMC2_2_7V, /*!< 2.70 V */ + VMMC2_2_8V, /*!< 2.80 V */ + VMMC2_2_9V, /*!< 2.90 V */ + VMMC2_3V, /*!< 3.00 V */ +} t_pmic_regulator_voltage_vmmc2; + +/*! + * @enum t_pmic_regulator_voltage_v1 + * @brief PMIC linear regulator V1 output voltages. + */ +typedef enum { + V1_2_775V = 0, /*!< 2.775 V */ + V1_1_2V, /*!< 1.2 V */ + V1_1_3V, /*!< 1.3 V */ + V1_1_4V, /*!< 1.4 V */ + V1_1_55V, /*!< 1.55 V */ + V1_1_75V, /*!< 1.75 V */ + V1_1_875V, /*!< 1.875 V */ + V1_2_475V, /*!< 2.475 V */ +} t_pmic_regulator_voltage_v1; + +/*! + * @enum t_pmic_regulator_voltage_v2 + * @brief PMIC linear regulator V2 output voltage, V2 has fixed + * output voltage 2.775 volts. + */ +typedef enum { + V2_2_775V = 0, /*!< 2.775 V */ +} t_pmic_regulator_voltage_v2; + +/*! + * @enum t_pmic_regulator_voltage_v3 + * @brief PMIC linear regulator V3 output voltage. + */ +typedef enum { + V3_1_875V = 0, /*!< 1.875 V */ + V3_2_775V, /*!< 2.775 V */ +} t_pmic_regulator_voltage_v3; + +/*! + * @enum t_pmic_regulator_voltage_v4 + * @brief PMIC linear regulator V4 output voltage, V4 has fixed + * output voltage 2.775 volts. + */ +typedef enum { + V4_2_775V = 0, /*!< 2.775 V */ +} t_pmic_regulator_voltage_v4; + +/*! + * @union t_regulator_voltage + * @brief PMIC regulator output voltages. + */ +typedef union { + t_pmic_regulator_voltage_sw1 sw1; /*!< SW1 voltage */ + t_pmic_regulator_voltage_sw1a sw1a; /*!< SW1A voltage */ + t_pmic_regulator_voltage_sw1b sw1b; /*!< SW1B voltage */ + t_pmic_regulator_voltage_sw2 sw2; /*!< SW2 voltage */ + t_pmic_regulator_voltage_sw2a sw2a; /*!< SW2A voltage */ + t_pmic_regulator_voltage_sw2b sw2b; /*!< SW2B voltage */ + t_pmic_regulator_voltage_sw3 sw3; /*!< SW3 voltage */ + t_pmic_regulator_voltage_violo violo; /*!< VIOLO voltage */ + t_pmic_regulator_voltage_vdig vdig; /*!< VDIG voltage */ + t_pmic_regulator_voltage_vgen vgen; /*!< VGEN voltage */ + t_pmic_regulator_voltage_vrfdig vrfdig; /*!< VRFDIG voltage */ + t_pmic_regulator_voltage_vrfref vrfref; /*!< VRFREF voltage */ + t_pmic_regulator_voltage_vrfcp vrfcp; /*!< VRFCP voltage */ + t_pmic_regulator_voltage_vsim vsim; /*!< VSIM voltage */ + t_pmic_regulator_voltage_vesim vesim; /*!< VESIM voltage */ + t_pmic_regulator_voltage_vcam vcam; /*!< VCAM voltage */ + t_pmic_regulator_voltage_vvib vvib; /*!< VVIB voltage */ + t_pmic_regulator_voltage_vrf1 vrf1; /*!< VRF1 voltage */ + t_pmic_regulator_voltage_vrf2 vrf2; /*!< VRF2 voltage */ + t_pmic_regulator_voltage_vmmc vmmc; /*!< VMMC voltage */ + t_pmic_regulator_voltage_vmmc1 vmmc1; /*!< VMMC1 voltage */ + t_pmic_regulator_voltage_vmmc2 vmmc2; /*!< VMMC2 voltage */ + t_pmic_regulator_voltage_v1 v1; /*!< V1 voltage */ + t_pmic_regulator_voltage_v2 v2; /*!< V2 voltage */ + t_pmic_regulator_voltage_v3 v3; /*!< V3 voltage */ + t_pmic_regulator_voltage_v4 v4; /*!< V4 voltage */ +} t_regulator_voltage; + +/*! + * @enum t_pmic_regulator_sw_mode + * @brief define switch mode regulator mode. + * + * The synchronous rectifier can be disabled (and pulse-skipping enabled) + * to improve low current efficiency. Software should disable synchronous + * rectifier / enable the pulse skipping for average loads less than + * approximately 30 mA, depending on the quiescent current penalty due to + * synchronous mode. + */ +typedef enum { + SYNC_RECT = 0, + NO_PULSE_SKIP, + PULSE_SKIP, + LOW_POWER, +} t_pmic_regulator_sw_mode; + +/*! + * Generic PMIC switch mode regulator mode. + */ +typedef t_pmic_regulator_sw_mode t_regulator_sw_mode; +typedef t_pmic_regulator_sw_mode t_regulator_stby_mode; + +/*! + * @enum t_regulator_lp_mode + * @brief Low power mode control modes. + */ + +typedef enum { + /*! + * Low Power Mode is disabled + */ + LOW_POWER_DISABLED = 0, + /*! + * Low Power Mode is controlled by STANDBY pin and/or LVS pin + */ + LOW_POWER_CTRL_BY_PIN, + /*! + * Set Low Power mode no matter of hardware pins + */ + LOW_POWER_EN, + /*! + * Set Low Power mode and control by STANDBY + */ + LOW_POWER_AND_LOW_POWER_CTRL_BY_PIN, +} t_regulator_lp_mode; + +/*! + * @enum t_switcher_dvs_speed + * @brief DVS speed setting + */ +typedef enum { + /*! + * Transition speed is dictated by the current + * limit and input -output conditions + */ + DICTATED = 0, + /*! + * 25mV step each 4us + */ + DVS_4US, + /*! + * 25mV step each 8us + */ + DVS_8US, + /*! + * 25mV step each 16us + */ + DVS_16US, +} t_switcher_dvs_speed; + +/*! + * @struct t_regulator_config + * @brief regulator configuration. + * + */ + +typedef struct { + /*! + * Switch mode regulator operation mode. This field only applies to + * switch mode regulators. + */ + t_regulator_sw_mode mode; + /*! + * Switch mode stby regulator operation mode. This field only applies + * to switch mode regulators. + */ + t_regulator_stby_mode stby_mode; + /*! + * Regulator output voltage. + */ + t_regulator_voltage voltage; + /*! + * Regulator output voltage in LVS mode. + */ + t_regulator_voltage voltage_lvs; + /*! + * Regulator output voltage in standby mode. + */ + t_regulator_voltage voltage_stby; + /*! + * Regulator low power mode. + */ + t_regulator_lp_mode lp_mode; + /*! + * Switcher dvs speed + */ + t_switcher_dvs_speed dvs_speed; + /*! + * Switcher panic mode + */ + bool panic_mode; + /*! + * Switcher softstart + */ + bool softstart; + /*! + * PLL Multiplication factor + */ + t_switcher_factor factor; +} t_regulator_config; + +/*! + * @struct t_regulator_cfg_param + * @brief regulator configuration structure for IOCTL. + * + */ +typedef struct { + /*! + * Regulator. + */ + t_pmic_regulator regulator; + /*! + * Regulator configuration. + */ + t_regulator_config cfg; +} t_regulator_cfg_param; + +/*! + * This struct list all state reads in Power Up Sense + */ +struct t_p_up_sense { + /*! + * power up sense ictest + */ + bool state_ictest; + /*! + * power up sense clksel + */ + bool state_clksel; + /*! + * power up mode supply 1 + */ + bool state_pums1; + /*! + * power up mode supply 2 + */ + bool state_pums2; + /*! + * power up mode supply 3 + */ + bool state_pums3; + /*! + * power up sense charge mode 0 + */ + bool state_chrgmode0; + /*! + * power up sense charge mode 1 + */ + bool state_chrgmode1; + /*! + * power up sense USB mode + */ + bool state_umod; + /*! + * power up sense boot mode enable for USB/RS232 + */ + bool state_usben; + /*! + * power up sense switcher 1a1b joined + */ + bool state_sw_1a1b_joined; + /*! + * power up sense switcher 1a1b joined + */ + bool state_sw_2a2b_joined; +}; + +/*! + * This enumeration define all On_OFF button + */ +typedef enum { + /*! + * ON1B + */ + BT_ON1B = 0, + /*! + * ON2B + */ + BT_ON2B, + /*! + * ON3B + */ + BT_ON3B, +} t_button; + +#ifdef __KERNEL__ +/* EXPORTED FUNCTIONS */ + +/*! + * This function sets user power off in power control register and thus powers + * off the phone. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +void pmic_power_off(void); + +/*! + * This function sets the power control configuration. + * + * @param pc_config power control configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_set_pc_config(t_pc_config * pc_config); + +/*! + * This function retrives the power control configuration. + * + * @param pc_config pointer to power control configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_pc_config(t_pc_config * pc_config); + +/*! + * This function turns on a regulator. + * + * @param regulator The regulator to be turned on. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_on(t_pmic_regulator regulator); + +/*! + * This function turns off a regulator. + * + * @param regulator The regulator to be turned off. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_off(t_pmic_regulator regulator); + +/*! + * This function sets the regulator output voltage. + * + * @param regulator The regulator to be turned off. + * @param voltage The regulator output voltage. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_voltage(t_pmic_regulator regulator, + t_regulator_voltage voltage); + +/*! + * This function retrieves the regulator output voltage. + * + * @param regulator The regulator to be turned off. + * @param voltage Pointer to regulator output voltage. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_voltage(t_pmic_regulator regulator, + t_regulator_voltage * voltage); + +/*! + * This function sets the DVS voltage + * + * @param regulator The regulator to be configured. + * @param dvs The switch Dynamic Voltage Scaling + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_dvs(t_pmic_regulator regulator, + t_regulator_voltage dvs); + +/*! + * This function gets the DVS voltage + * + * @param regulator The regulator to be handled. + * @param dvs The switch Dynamic Voltage Scaling + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_dvs(t_pmic_regulator regulator, + t_regulator_voltage * dvs); + +/*! + * This function sets the standby voltage + * + * @param regulator The regulator to be configured. + * @param stby The switch standby voltage + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_stby(t_pmic_regulator regulator, + t_regulator_voltage stby); + +/*! + * This function gets the standby voltage + * + * @param regulator The regulator to be handled. + * @param stby The switch standby voltage + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_stby(t_pmic_regulator regulator, + t_regulator_voltage * stby); + +/*! + * This function sets the switchers mode. + * + * @param regulator The regulator to be configured. + * @param mode The switcher mode + * @param stby Switch between main and standby. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_mode(t_pmic_regulator regulator, + t_regulator_sw_mode mode, bool stby); + +/*! + * This function gets the switchers mode. + * + * @param regulator The regulator to be handled. + * @param mode The switcher mode. + * @param stby Switch between main and standby. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_mode(t_pmic_regulator regulator, + t_regulator_sw_mode * mode, bool stby); + +/*! + * This function sets the switch dvs speed + * + * @param regulator The regulator to be configured. + * @param speed The dvs speed. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_dvs_speed(t_pmic_regulator regulator, + t_switcher_dvs_speed speed); + +/*! + * This function gets the switch dvs speed + * + * @param regulator The regulator to be handled. + * @param speed The dvs speed. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_dvs_speed(t_pmic_regulator regulator, + t_switcher_dvs_speed * speed); + +/*! + * This function sets the switch panic mode + * + * @param regulator The regulator to be configured. + * @param panic_mode Enable or disable panic mode + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_panic_mode(t_pmic_regulator regulator, + bool panic_mode); + +/*! + * This function gets the switch panic mode + * + * @param regulator The regulator to be handled + * @param panic_mode Enable or disable panic mode + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_panic_mode(t_pmic_regulator regulator, + bool * panic_mode); + +/*! + * This function sets the switch softstart mode + * + * @param regulator The regulator to be configured. + * @param softstart Enable or disable softstart. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_softstart(t_pmic_regulator regulator, + bool softstart); + +/*! + * This function gets the switch softstart mode + * + * @param regulator The regulator to be handled + * @param softstart Enable or disable softstart. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_softstart(t_pmic_regulator regulator, + bool * softstart); + +/*! + * This function sets the PLL multiplication factor + * + * @param regulator The regulator to be configured. + * @param factor The multiplication factor. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_set_factor(t_pmic_regulator regulator, + t_switcher_factor factor); + +/*! + * This function gets the PLL multiplication factor + * + * @param regulator The regulator to be handled + * @param factor The multiplication factor. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_switcher_get_factor(t_pmic_regulator regulator, + t_switcher_factor * factor); + +/*! + * This function enables or disables low power mode. + * + * @param regulator The regulator to be configured. + * @param mode Select nominal or low power mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_lp_mode(t_pmic_regulator regulator, + t_regulator_lp_mode lp_mode); + +/*! + * This function gets low power mode. + * + * @param regulator The regulator to be handled + * @param mode Select nominal or low power mode. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_lp_mode(t_pmic_regulator regulator, + t_regulator_lp_mode * lp_mode); + +/*! + * This function sets the regulator configuration. + * + * @param regulator The regulator to be turned off. + * @param config The regulator output configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_set_config(t_pmic_regulator regulator, + t_regulator_config * config); + +/*! + * This function retrieves the regulator output configuration. + * + * @param regulator The regulator to be turned off. + * @param config Pointer to regulator configuration. + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_regulator_get_config(t_pmic_regulator regulator, + t_regulator_config * config); + +/*! + * This function enables automatically VBKUP2 in the memory hold modes. + * + * @param en if true, enable VBKUP2AUTOMH + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_vbkup2_auto_en(bool en); + +/*! + * This function gets state of automatically VBKUP2. + * + * @param en if true, VBKUP2AUTOMH is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_vbkup2_auto_state(bool * en); + +/*! + * This function enables battery detect function. + * + * @param en if true, enable BATTDETEN + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_bat_det_en(bool en); + +/*! + * This function gets state of battery detect function. + * + * @param en if true, BATTDETEN is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_bat_det_state(bool * en); + +/*! + * This function enables control of VVIB by VIBEN pin. + * + * @param en if true, enable VIBPINCTRL + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_vib_pin_en(bool en); + +/*! + * This function gets state of control of VVIB by VIBEN pin. + * @param en if true, VIBPINCTRL is enabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_gets_vib_pin_state(bool * en); + +/*! + * This function returns power up sense value + * + * @param p_up_sense value of power up sense + * @return This function returns PMIC_SUCCESS if successful. + */ +PMIC_STATUS pmic_power_get_power_mode_sense(struct t_p_up_sense *p_up_sense); + +/*! + * This function configures the Regen assignment for all regulator + * + * @param regulator type of regulator + * @param en_dis if true, the regulator is enabled by regen. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_regen_assig(t_pmic_regulator regulator, bool en_dis); + +/*! + * This function gets the Regen assignment for all regulator + * + * @param regulator type of regulator + * @param en_dis return value, if true : + * the regulator is enabled by regen. + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_regen_assig(t_pmic_regulator regu, bool * en_dis); + +/*! + * This function sets the Regen polarity. + * + * @param en_dis If true regen is inverted. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_regen_inv(bool en_dis); + +/*! + * This function gets the Regen polarity. + * + * @param en_dis If true regen is inverted. + * + * @return This function returns 0 if successful. + */ + +PMIC_STATUS pmic_power_get_regen_inv(bool * en_dis); + +/*! + * This function enables esim control voltage. + * + * @param vesim if true, enable VESIMESIMEN + * @param vmmc1 if true, enable VMMC1ESIMEN + * @param vmmc2 if true, enable VMMC2ESIMEN + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_esim_v_en(bool vesim, bool vmmc1, bool vmmc2); + +/*! + * This function gets esim control voltage values. + * + * @param vesim if true, enable VESIMESIMEN + * @param vmmc1 if true, enable VMMC1ESIMEN + * @param vmmc2 if true, enable VMMC2ESIMEN + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_gets_esim_v_state(bool * vesim, + bool * vmmc1, bool * vmmc2); + +/*! + * This function enables auto reset after a system reset. + * + * @param en if true, the auto reset is enabled + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_auto_reset_en(bool en); + +/*! + * This function gets auto reset configuration. + * + * @param en if true, the auto reset is enabled + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_auto_reset_en(bool * en); + +/*! + * This function configures a system reset on a button. + * + * @param bt type of button. + * @param sys_rst if true, enable the system reset on this button + * @param deb_time sets the debounce time on this button pin + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_set_conf_button(t_button bt, bool sys_rst, int deb_time); + +/*! + * This function gets configuration of a button. + * + * @param bt type of button. + * @param sys_rst if true, the system reset is enabled on this button + * @param deb_time gets the debounce time on this button pin + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_get_conf_button(t_button bt, + bool * sys_rst, int *deb_time); + +/*! + * This function is used to subscribe on power event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_event_sub(t_pwr_int event, void *callback); + +/*! + * This function is used to un subscribe on power event IT. + * + * @param event type of event. + * @param callback event callback function. + * + * @return This function returns 0 if successful. + */ +PMIC_STATUS pmic_power_event_unsub(t_pwr_int event, void *callback); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_PMIC_POWER_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/arc_otg.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/arc_otg.h @@ -0,0 +1,358 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_ARC_OTG_H__ +#define __ASM_ARCH_MXC_ARC_OTG_H__ + +#define USB_OTGREGS_BASE (OTG_BASE_ADDR + 0x000) +#define USB_H1REGS_BASE (OTG_BASE_ADDR + 0x200) +#define USB_H2REGS_BASE (OTG_BASE_ADDR + 0x400) +#ifdef CONFIG_ARCH_MX51 +#define USB_H3REGS_BASE (OTG_BASE_ADDR + 0x600) +#define USB_OTHERREGS_BASE (OTG_BASE_ADDR + 0x800) +#else +#define USB_OTHERREGS_BASE (OTG_BASE_ADDR + 0x600) +#endif + + +#define USBOTG_REG32(offset) (*((volatile u32 *)(IO_ADDRESS(USB_OTGREGS_BASE + (offset))))) +#define USBOTG_REG16(offset) (*((volatile u16 *)(IO_ADDRESS(USB_OTGREGS_BASE + (offset))))) + +#define USBH1_REG32(offset) (*((volatile u32 *)(IO_ADDRESS(USB_H1REGS_BASE + (offset))))) +#define USBH1_REG16(offset) (*((volatile u16 *)(IO_ADDRESS(USB_H1REGS_BASE + (offset))))) + +#define USBH2_REG32(offset) (*((volatile u32 *)(IO_ADDRESS(USB_H2REGS_BASE + (offset))))) +#define USBH2_REG16(offset) (*((volatile u16 *)(IO_ADDRESS(USB_H2REGS_BASE + (offset))))) + +#define USBOTHER_REG(offset) (*((volatile u32 *)(IO_ADDRESS(USB_OTHERREGS_BASE + (offset))))) + +/* + * OTG registers + */ +#define UOG_ID USBOTG_REG32(0x00) /* Host ID */ +#define UOG_HWGENERAL USBOTG_REG32(0x04) /* Host General */ +#define UOG_HWHOST USBOTG_REG32(0x08) /* Host h/w params */ +#define UOG_HWTXBUF USBOTG_REG32(0x10) /* TX buffer h/w params */ +#define UOG_HWRXBUF USBOTG_REG32(0x14) /* RX buffer h/w params */ +#define UOG_CAPLENGTH USBOTG_REG16(0x100) /* Capability register length */ +#define UOG_HCIVERSION USBOTG_REG16(0x102) /* Host Interface version */ +#define UOG_HCSPARAMS USBOTG_REG32(0x104) /* Host control structural params */ +#define UOG_HCCPARAMS USBOTG_REG32(0x108) /* control capability params */ +#define UOG_DCIVERSION USBOTG_REG32(0x120) /* device interface version */ +/* start EHCI registers: */ +#define UOG_USBCMD USBOTG_REG32(0x140) /* USB command register */ +#define UOG_USBSTS USBOTG_REG32(0x144) /* USB status register */ +#define UOG_USBINTR USBOTG_REG32(0x148) /* interrupt enable register */ +#define UOG_FRINDEX USBOTG_REG32(0x14c) /* USB frame index */ +/* segment (0x150) addr bits 63:32 if needed */ +#define UOG_PERIODICLISTBASE USBOTG_REG32(0x154) /* host crtlr frame list base addr */ +#define UOG_DEVICEADDR USBOTG_REG32(0x154) /* device crtlr device address */ +#define UOG_ASYNCLISTADDR USBOTG_REG32(0x158) /* host ctrlr next async addr */ +#define UOG_EPLISTADDR USBOTG_REG32(0x158) /* device ctrlr endpoint list addr */ +#define UOG_BURSTSIZE USBOTG_REG32(0x160) /* host ctrlr embedded TT async buf status */ +#define UOG_TXFILLTUNING USBOTG_REG32(0x164) /* TX FIFO fill tuning */ +#define UOG_ULPIVIEW USBOTG_REG32(0x170) /* ULPI viewport */ +#define UOG_CFGFLAG USBOTG_REG32(0x180) /* configflag (supports HS) */ +#define UOG_PORTSC1 USBOTG_REG32(0x184) /* port status and control */ +/* end EHCI registers: */ +#define UOG_OTGSC USBOTG_REG32(0x1a4) /* OTG status and control */ +#define UOG_USBMODE USBOTG_REG32(0x1a8) /* USB device mode */ +#define UOG_ENDPTSETUPSTAT USBOTG_REG32(0x1ac) /* endpoint setup status */ +#define UOG_ENDPTPRIME USBOTG_REG32(0x1b0) /* endpoint initialization */ +#define UOG_ENDPTFLUSH USBOTG_REG32(0x1b4) /* endpoint de-initialize */ +#define UOG_ENDPTSTAT USBOTG_REG32(0x1b8) /* endpoint status */ +#define UOG_ENDPTCOMPLETE USBOTG_REG32(0x1bc) /* endpoint complete */ +#define UOG_EPCTRL0 USBOTG_REG32(0x1c0) /* endpoint control0 */ +#define UOG_EPCTRL1 USBOTG_REG32(0x1c4) /* endpoint control1 */ +#define UOG_EPCTRL2 USBOTG_REG32(0x1c8) /* endpoint control2 */ +#define UOG_EPCTRL3 USBOTG_REG32(0x1cc) /* endpoint control3 */ +#define UOG_EPCTRL4 USBOTG_REG32(0x1d0) /* endpoint control4 */ +#define UOG_EPCTRL5 USBOTG_REG32(0x1d4) /* endpoint control5 */ +#define UOG_EPCTRL6 USBOTG_REG32(0x1d8) /* endpoint control6 */ +#define UOG_EPCTRL7 USBOTG_REG32(0x1dc) /* endpoint control7 */ + +/* + * Host 1 registers + */ +#define UH1_ID USBH1_REG32(0x00) /* Host ID */ +#define UH1_HWGENERAL USBH1_REG32(0x04) /* Host General */ +#define UH1_HWHOST USBH1_REG32(0x08) /* Host h/w params */ +#define UH1_HWTXBUF USBH1_REG32(0x10) /* TX buffer h/w params */ +#define UH1_HWRXBUF USBH1_REG32(0x14) /* RX buffer h/w params */ +#define UH1_CAPLENGTH USBH1_REG16(0x100) /* Capability register length */ +#define UH1_HCIVERSION USBH1_REG16(0x102) /* Host Interface version */ +#define UH1_HCSPARAMS USBH1_REG32(0x104) /* Host control structural params */ +#define UH1_HCCPARAMS USBH1_REG32(0x108) /* control capability params */ +/* start EHCI registers: */ +#define UH1_USBCMD USBH1_REG32(0x140) /* USB command register */ +#define UH1_USBSTS USBH1_REG32(0x144) /* USB status register */ +#define UH1_USBINTR USBH1_REG32(0x148) /* interrupt enable register */ +#define UH1_FRINDEX USBH1_REG32(0x14c) /* USB frame index */ +/* segment (0x150) addr bits 63:32 if needed */ +#define UH1_PERIODICLISTBASE USBH1_REG32(0x154) /* host crtlr frame list base addr */ +#define UH1_ASYNCLISTADDR USBH1_REG32(0x158) /* host ctrlr nest async addr */ +#define UH1_BURSTSIZE USBH1_REG32(0x160) /* host ctrlr embedded TT async buf status */ +#define UH1_TXFILLTUNING USBH1_REG32(0x164) /* TX FIFO fill tuning */ +/* configured_flag (0x180) configflag (supports HS) */ +#define UH1_PORTSC1 USBH1_REG32(0x184) /* port status and control */ +/* end EHCI registers: */ +#define UH1_USBMODE USBH1_REG32(0x1a8) /* USB device mode */ + +/* + * Host 2 registers + */ +#define UH2_ID USBH2_REG32(0x00) /* Host ID */ +#define UH2_HWGENERAL USBH2_REG32(0x04) /* Host General */ +#define UH2_HWHOST USBH2_REG32(0x08) /* Host h/w params */ +#define UH2_HWTXBUF USBH2_REG32(0x10) /* TX buffer h/w params */ +#define UH2_HWRXBUF USBH2_REG32(0x14) /* RX buffer h/w params */ +#define UH2_CAPLENGTH USBH2_REG16(0x100) /* Capability register length */ +#define UH2_HCIVERSION USBH2_REG16(0x102) /* Host Interface version */ +#define UH2_HCSPARAMS USBH2_REG32(0x104) /* Host control structural params */ +#define UH2_HCCPARAMS USBH2_REG32(0x108) /* control capability params */ +/* start EHCI registers: */ +#define UH2_USBCMD USBH2_REG32(0x140) /* USB command register */ +#define UH2_USBSTS USBH2_REG32(0x144) /* USB status register */ +#define UH2_USBINTR USBH2_REG32(0x148) /* interrupt enable register */ +#define UH2_FRINDEX USBH2_REG32(0x14c) /* USB frame index */ +/* segment (0x150) addr bits 63:32 if needed */ +#define UH2_PERIODICLISTBASE USBH2_REG32(0x154) /* host crtlr frame list base addr */ +#define UH2_ASYNCLISTADDR USBH2_REG32(0x158) /* host ctrlr nest async addr */ +#define UH2_BURSTSIZE USBH2_REG32(0x160) /* host ctrlr embedded TT async buf status */ +#define UH2_TXFILLTUNING USBH2_REG32(0x164) /* TX FIFO fill tuning */ +#define UH2_ULPIVIEW USBH2_REG32(0x170) /* ULPI viewport */ +/* configured_flag (0x180) configflag (supports HS) */ +#define UH2_PORTSC1 USBH2_REG32(0x184) /* port status and control */ +/* end EHCI registers */ +#define UH2_USBMODE USBH2_REG32(0x1a8) /* USB device mode */ + +/* + * other regs (not part of ARC core) + */ +#define USBCTRL USBOTHER_REG(0x00) /* USB Control register */ +#define USB_OTG_MIRROR USBOTHER_REG(0x04) /* USB OTG mirror register */ +#define USB_PHY_CTR_FUNC USBOTHER_REG(0x08) /* OTG UTMI PHY Function Control register */ +#define USB_PHY_CTR_FUNC2 USBOTHER_REG(0x0c) /* OTG UTMI PHY Function Control register */ +#define USB_CTRL_1 USBOTHER_REG(0x10) /* USB Cotrol Register 1*/ +#define USBCTRL_HOST2 USBOTHER_REG(0x14) /* USB Cotrol Register 1*/ +#define USBCTRL_HOST3 USBOTHER_REG(0x18) /* USB Cotrol Register 1*/ + +/* + * register bits + */ + +/* x_PORTSCx */ +#define PORTSC_PTS_MASK (3 << 30) /* parallel xcvr select mask */ +#define PORTSC_PTS_UTMI (0 << 30) /* UTMI/UTMI+ */ +#define PORTSC_PTS_PHILIPS (1 << 30) /* Philips classic */ +#define PORTSC_PTS_ULPI (2 << 30) /* ULPI */ +#define PORTSC_PTS_SERIAL (3 << 30) /* serial */ +#define PORTSC_STS (1 << 29) /* serial xcvr select */ +#define PORTSC_PTW (1 << 28) /* UTMI width */ +#define PORTSC_PHCD (1 << 23) /* Low Power Suspend */ +#define PORTSC_PORT_POWER (1 << 12) /* port power */ +#define PORTSC_LS_MASK (3 << 10) /* Line State mask */ +#define PORTSC_LS_SE0 (0 << 10) /* SE0 */ +#define PORTSC_LS_K_STATE (1 << 10) /* K-state */ +#define PORTSC_LS_J_STATE (2 << 10) /* J-state */ +#define PORTSC_PORT_RESET (1 << 8) /* Port reset */ +#define PORTSC_PORT_SUSPEND (1 << 7) /* Suspend */ +#define PORTSC_PORT_FORCE_RESUME (1 << 6) /* Force port resume */ +#define PORTSC_OVER_CURRENT_CHG (1 << 5) /* over current change */ +#define PORTSC_OVER_CURRENT_ACT (1 << 4) /* over currrent active */ +#define PORTSC_PORT_EN_DIS_CHANGE (1 << 3) /* port {en,dis}able change */ +#define PORTSC_PORT_ENABLE (1 << 2) /* port enabled */ +#define PORTSC_CONNECT_STATUS_CHANGE (1 << 1) /* connect status change */ +#define PORTSC_CURRENT_CONNECT_STATUS (1 << 0) /* current connect status */ + +#define PORTSC_W1C_BITS \ + ( PORTSC_CONNECT_STATUS_CHANGE | \ + PORTSC_PORT_EN_DIS_CHANGE | \ + PORTSC_OVER_CURRENT_CHG ) + +/* UOG_OTGSC Register Bits */ +/* control bits: */ +#define OTGSC_CTRL_VBUS_DISCHARGE (1 << 0) +#define OTGSC_CTRL_VBUS_CHARGE (1 << 1) +#define OTGSC_CTRL_OTG_TERM (1 << 3) /* controls DM pulldown */ +#define OTGSC_CTRL_DATA_PULSING (1 << 4) +#define OTGSC_CTRL_USB_ID_PU (1 << 5) /* enable ID pullup */ +/* current status: (R/O) */ +#define OTGSC_STS_USB_ID (1 << 8) /* 0=A-device 1=B-device */ +#define OTGSC_STS_A_VBUS_VALID (1 << 9) +#define OTGSC_STS_A_SESSION_VALID (1 << 10) +#define OTGSC_STS_B_SESSION_VALID (1 << 11) +#define OTGSC_STS_B_SESSION_END (1 << 12) +#define OTGSC_STS_1ms_TIMER (1 << 13) +#define OTGSC_STS_DATA_PULSE (1 << 14) +/* interrupt status: (write to clear) */ +#define OTGSC_IS_MASK (0x7f << 16) +#define OTGSC_IS_USB_ID (1 << 16) +#define OTGSC_IS_A_VBUS_VALID (1 << 17) +#define OTGSC_IS_A_SESSION_VALID (1 << 18) +#define OTGSC_IS_B_SESSION_VALID (1 << 19) +#define OTGSC_IS_B_SESSION_END (1 << 20) +#define OTGSC_IS_1ms_TIMER (1 << 21) +#define OTGSC_IS_DATA_PULSE (1 << 22) +/* interrupt enables: */ +#define OTGSC_IE_MASK (0x7f << 24) +#define OTGSC_IE_USB_ID (1 << 24) +#define OTGSC_IE_A_VBUS_VALID (1 << 25) +#define OTGSC_IE_A_SESSION_VALID (1 << 26) +#define OTGSC_IE_B_SESSION_VALID (1 << 27) +#define OTGSC_IE_B_SESSION_END (1 << 28) +#define OTGSC_IE_1ms_TIMER (1 << 29) +#define OTGSC_IE_DATA_PULSE (1 << 30) + +#if 1 /* FIXME these here for compatibility between my names and Leo's */ +/* OTG interrupt enable bit masks */ +#define OTGSC_INTERRUPT_ENABLE_BITS_MASK OTGSC_IE_MASK +#define OTGSC_INTSTS_MASK OTGSC_IS_MASK + +/* OTG interrupt status bit masks */ +#define OTGSC_INTERRUPT_STATUS_BITS_MASK OTGSC_IS_MASK +#endif + +/* x_USBMODE */ +#define USBMODE_SLOM (1 << 3) /* setup lockout mode */ +#define USBMODE_ES (1 << 2) /* (big) endian select */ +#define USBMODE_CM_MASK (3 << 0) /* controller mode mask */ +#define USBMODE_CM_HOST (3 << 0) /* host */ +#define USBMODE_CM_DEVICE (2 << 0) /* device */ +#define USBMODE_CM_reserved (1 << 0) /* reserved */ + +/* USBCTRL */ +#define UCTRL_OWIR (1 << 31) /* OTG wakeup intr request received */ +#define UCTRL_OSIC_MASK (3 << 29) /* OTG Serial Interface Config: */ +#define UCTRL_OSIC_DU6 (0 << 29) /* Differential/unidirectional 6 wire */ +#define UCTRL_OSIC_DB4 (1 << 29) /* Differential/bidirectional 4 wire */ +#define UCTRL_OSIC_SU6 (2 << 29) /* single-ended/unidirectional 6 wire */ +#define UCTRL_OSIC_SB3 (3 << 29) /* single-ended/bidirectional 3 wire */ + +#define UCTRL_OUIE (1 << 28) /* OTG ULPI intr enable */ +#define UCTRL_OWIE (1 << 27) /* OTG wakeup intr enable */ +#define UCTRL_OBPVAL_RXDP (1 << 26) /* OTG RxDp status in bypass mode */ +#define UCTRL_OBPVAL_RXDM (1 << 25) /* OTG RxDm status in bypass mode */ +#define UCTRL_OPM (1 << 24) /* OTG power mask */ +#define UCTRL_H2WIR (1 << 23) /* HOST2 wakeup intr request received */ +#define UCTRL_H2SIC_MASK (3 << 21) /* HOST2 Serial Interface Config: */ +#define UCTRL_H2SIC_DU6 (0 << 21) /* Differential/unidirectional 6 wire */ +#define UCTRL_H2SIC_DB4 (1 << 21) /* Differential/bidirectional 4 wire */ +#define UCTRL_H2SIC_SU6 (2 << 21) /* single-ended/unidirectional 6 wire */ +#define UCTRL_H2SIC_SB3 (3 << 21) /* single-ended/bidirectional 3 wire */ + +#ifdef CONFIG_ARCH_MX51 +#define UCTRL_H2UIE (1 << 8) /* HOST2 ULPI intr enable */ +#define UCTRL_H2WIE (1 << 7) /* HOST2 wakeup intr enable */ +#define UCTRL_H2PP 0 /* Power Polarity for uh2 */ +#define UCTRL_H2PM (1 << 4) /* HOST2 power mask */ +#else +#define UCTRL_H2UIE (1 << 20) /* HOST2 ULPI intr enable */ +#define UCTRL_H2WIE (1 << 19) /* HOST2 wakeup intr enable */ +#define UCTRL_H2PP (1 << 18) /* Power Polarity for uh2 */ +#define UCTRL_H2PM (1 << 16) /* HOST2 power mask */ +#endif +#define UCTRL_H2OVBWK_EN (1 << 6) /* OTG VBUS Wakeup Enable */ +#define UCTRL_H2OIDWK_EN (1 << 5) /* OTG ID Wakeup Enable */ + +#define UCTRL_H1WIR (1 << 15) /* HOST1 wakeup intr request received */ +#define UCTRL_H1SIC_MASK (3 << 13) /* HOST1 Serial Interface Config: */ +#define UCTRL_H1SIC_DU6 (0 << 13) /* Differential/unidirectional 6 wire */ +#define UCTRL_H1SIC_DB4 (1 << 13) /* Differential/bidirectional 4 wire */ +#define UCTRL_H1SIC_SU6 (2 << 13) /* single-ended/unidirectional 6 wire */ +#define UCTRL_H1SIC_SB3 (3 << 13) /* single-ended/bidirectional 3 wire */ +#define UCTRL_OLOCKD (1 << 13) /* otg lock disable */ +#define UCTRL_H2LOCKD (1 << 12) /* HOST2 lock disable */ +#define UCTRL_H1UIE (1 << 12) /* Host1 ULPI interrupt enable */ + +#if defined(CONFIG_ARCH_MX37) +/* VBUS wakeup enable, UTMI only */ +#define UCTRL_VBUS_WKUP_EN (1 << 12) +#elif defined(CONFIG_ARCH_MX25) || defined(CONFIG_ARCH_MX35) +#define UCTRL_VBUS_WKUP_EN (1 << 15) +#endif + +#define UCTRL_PP (1 << 11) /* power polarity bit */ +#define UCTRL_H1WIE (1 << 11) /* HOST1 wakeup intr enable */ +#define UCTRL_H1BPVAL_RXDP (1 << 10) /* HOST1 RxDp status in bypass mode */ +#define UCTRL_XCSO (1 << 10) /* Xcvr Clock Select for OTG port */ +#define UCTRL_H1BPVAL_RXDM (1 << 9) /* HOST1 RxDm status in bypass mode */ +#define UCTRL_XCSH2 (1 << 9) /* Xcvr Clock Select for Host port */ +#define UCTRL_H1PM (1 << 8) /* HOST1 power mask */ +#define UCTRL_IP_PULIDP (1 << 8) /* Ipp_Puimpel_Pullup_Dp */ + +#define UCTRL_IP_PUE_UP (1 << 7) /* ipp_pue_pullup_dp */ +#define UCTRL_IP_PUE_DOWN (1 << 6) /* ipp_pue_pulldwn_dpdm */ +#define UCTRL_H2DT (1 << 5) /* HOST2 TLL disabled */ +#define UCTRL_H1DT (1 << 4) /* HOST1 TLL disabled */ +#define UCTRL_USBTE (1 << 4) /* USBT Transceiver enable */ +#define UCTRL_OCPOL (1 << 3) /* OverCurrent Polarity */ +#define UCTRL_OCE (1 << 2) /* OverCurrent Enable */ +#define UCTRL_H2OCPOL (1 << 2) /* OverCurrent Polarity of Host2 */ +#define UCTRL_H2OCS (1 << 1) /* Host OverCurrent State */ +#define UCTRL_BPE (1 << 0) /* bypass mode enable */ +#define UCTRL_OTD (1 << 0) /* OTG TLL Disable */ +#define UCTRL_OOCS (1 << 0) /* OTG OverCurrent State */ + +/* USBCMD */ +#define UCMD_RUN_STOP (1 << 0) /* controller run/stop */ +#define UCMD_RESET (1 << 1) /* controller reset */ +#define UCMD_ITC_NO_THRESHOLD ~(0xff << 16) /* Interrupt Threshold Control */ + +/* OTG_MIRROR */ +#define OTGM_SESEND (1 << 4) /* B device session end */ +#define OTGM_VBUSVAL (1 << 3) /* Vbus valid */ +#define OTGM_BSESVLD (1 << 2) /* B session Valid */ +#define OTGM_ASESVLD (1 << 1) /* A session Valid */ +#define OTGM_IDIDG (1 << 0) /* OTG ID pin status */ + /* 1=high: Operate as B-device */ + /* 0=low : Operate as A-device */ + +/* USB_PHY_CTRL_FUNC */ +/* PHY control0 Register Bit Masks */ +#define USB_UTMI_PHYCTRL_CONF2 (1 << 26) + +#define USB_UTMI_PHYCTRL_UTMI_ENABLE (1 << 24) +#define USB_UTMI_PHYCTRL_CHGRDETEN (1 << 24) /* Enable Charger Detector */ +#define USB_UTMI_PHYCTRL_CHGRDETON (1 << 23) /* Charger Detector Power On Control */ +#define USB_UTMI_PHYCTRL_OC_POL (1 << 9) /* OTG Polarity of Overcurrent */ +#define USB_UTMI_PHYCTRL_OC_DIS (1 << 8) /* OTG Disable Overcurrent Event */ +#define USB_UH1_OC_DIS (1 << 5) /* UH1 Disable Overcurrent Event */ +/* USB_PHY_CTRL_FUNC2*/ +#define USB_UTMI_PHYCTRL2_PLLDIV_MASK 0x3 +#define USB_UTMI_PHYCTRL2_PLLDIV_SHIFT 0 +#define USB_UTMI_PHYCTRL2_HSDEVSEL_MASK 0x3 +#define USB_UTMI_PHYCTRL2_HSDEVSEL_SHIFT 19 + +/* USB_CTRL_1 */ +#define USB_CTRL_UH1_EXT_CLK_EN (1 << 25) +#define USB_CTRL_UH2_EXT_CLK_EN (1 << 26) + +/* ULPIVIEW register bits */ +#define ULPIVW_OFF (0x170) +#define ULPIVW_WU (1 << 31) /* Wakeup */ +#define ULPIVW_RUN (1 << 30) /* read/write run */ +#define ULPIVW_WRITE (1 << 29) /* 0=read 1=write */ +#define ULPIVW_SS (1 << 27) /* SyncState */ +#define ULPIVW_PORT_MASK 0x07 /* Port field */ +#define ULPIVW_PORT_SHIFT 24 +#define ULPIVW_ADDR_MASK 0xFF /* data address field */ +#define ULPIVW_ADDR_SHIFT 16 +#define ULPIVW_RDATA_MASK 0xFF /* read data field */ +#define ULPIVW_RDATA_SHIFT 8 +#define ULPIVW_WDATA_MASK 0xFF /* write data field */ +#define ULPIVW_WDATA_SHIFT 0 + +#define HCSPARAMS_PPC (0x1<<4) /* Port Power Control */ + +extern enum fsl_usb2_modes get_usb_mode(struct fsl_usb2_platform_data *pdata); +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/pmic_convity.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/pmic_convity.h @@ -0,0 +1,873 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_CONVITY_H__ +#define __ASM_ARCH_MXC_PMIC_CONVITY_H__ + +/*! + * @defgroup PMIC_CONNECTIVITY PMIC Connectivity Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_convity.h + * @brief External definitions for the PMIC Connectivity Client driver. + * + * The PMIC Connectivity driver and this API were developed to support the + * external connectivity capabilities of several power management ICs that + * are available from Freescale Semiconductor, Inc. + * + * The following operating modes, in terms of external connectivity, are + * supported: + * + * + * + * @ingroup PMIC_CONNECTIVITY + */ + +#include +#include + +/*************************************************************************** + * TYPEDEFS AND ENUMERATIONS * + ***************************************************************************/ + +/*! + * @name General Setup and Configuration Typedefs and Enumerations + * Typedefs and enumerations that are used for initial access to and + * configuration of the PMIC Connectivity hardware. + */ +/*@{*/ + +#define DEBUG_CONVITY + +/*! + * @typedef PMIC_CONVITY_HANDLE + * @brief Define typedef for a handle to the PMIC Connectivity hardware. + * + * Define a "handle" that is returned when the PMIC Connectivity hardware + * is opened. This handle grants exclusive access to the PMIC Connectivity + * hardware and must be used in all subsequent function calls. When access + * to the PMIC Connectivity hardware is no longer required, then a close + * operation must be done with this handle. The handle is no longer valid + * if the close operation was successful. + */ +typedef long PMIC_CONVITY_HANDLE; + +/*! + * @enum PMIC_CONVITY_MODE + * @brief Select the main Connectivity operating mode. + * + * Defines all possible PMIC Connectivity main operating modes. Only one of + * these modes can be active at a time. + */ +typedef enum { + USB, /*!< Select USB mode (this is also the Reset/Default + mode). */ + RS232, /*!< Select RS-232 mode. for SC55112 */ + RS232_1, /*!< Select RS-232_1 mode. */ + RS232_2, /*!< Select RS-232_2 mode. */ + CEA936_MONO, /*!< Select CE-936 Mono mode . */ + CEA936_STEREO, /*!< Select CE-936 Stereo mode . */ + CEA936_TEST_RIGHT, /*!< Select CE-936 Right Channel Test mode + . */ + CEA936_TEST_LEFT /*!< Select CE-936 Left Channel Test mode + . */ +} PMIC_CONVITY_MODE; + +/*! + * @enum PMIC_CONVITY_EVENTS + * @brief Identify the connectivity events that have been detected and should + * be handled. + * + * Defines all possible PMIC Connectivity events. Multiple events may be + * selected when defining a mask. + */ +typedef enum { + USB_DETECT_4V4_RISE = 1, /*!< Detected 4.4V rising edge. */ + USB_DETECT_4V4_FALL = 2, /*!< Detected 4.4V falling edge. */ + USB_DETECT_2V0_RISE = 4, /*!< Detected 2.0V rising edge. */ + USB_DETECT_2V0_FALL = 8, /*!< Detected 2.0V falling edge. */ + USB_DETECT_0V8_RISE = 16, /*!< Detected 0.8V rising edge. */ + USB_DETECT_0V8_FALL = 32, /*!< Detected 0.8V falling edge. */ + USB_DETECT_MINI_A = 64, /*!< Detected USB mini A plug. */ + USB_DETECT_MINI_B = 128, /*!< Detected USB mini B plug. */ + USB_DETECT_NON_USB_ACCESSORY = 256, /*!< Detected a non-USB connection + . */ + USB_DETECT_FACTORY_MODE = 512, /*!< Detected a factory-mode + connection . */ + USB_DP_HI = 1024, + + USB_DM_HI = 2048 +} PMIC_CONVITY_EVENTS; + +/*! + * @typedef PMIC_CONVITY_CALLBACK + * @brief Typedef for PMIC Connectivity event notification callback function. + * + * Define a typedef for the PMIC Connectivity event notification callback + * function. The signalled events are passed to the function as the first + * argument. The callback function should then process whatever events it + * can and then return the set of unhandled events (if any). + */ +typedef void (*PMIC_CONVITY_CALLBACK) (const PMIC_CONVITY_EVENTS event); + +/*@}*/ + +/*! + * @name USB and USB On-The-Go Mode-specific Typedefs and Enumerations + * Typedefs and enumerations that are used only for setting up and controlling + * the USB and USB On-The-Go modes of operation. + */ +/*@{*/ + +/*! + * @enum PMIC_CONVITY_USB_DEVICE_TYPE + * @brief Select the USB device type (either A or B). + * + * Defines all possible USB device types. This must match the physical + * connector being used. + */ +typedef enum { + USB_A_DEVICE, + USB_B_DEVICE +} PMIC_CONVITY_USB_DEVICE_TYPE; + +/*! + * @enum PMIC_CONVITY_USB_SPEED + * @brief Select the USB transceiver operating speed. + * + * Defines all possible USB transceiver operating speeds. Only one + * speed setting may be used at a time. + */ +typedef enum { + USB_LOW_SPEED, /*!< Select 1.5 Mbps. */ + USB_FULL_SPEED, /*!< Select 12 Mbps. */ + USB_HIGH_SPEED /*!< Select 480 Mbps (currently + not supported). */ +} PMIC_CONVITY_USB_SPEED; + +/*! + * @enum PMIC_CONVITY_USB_MODE + * @brief Select the USB transceiver operating mode. + * + * Defines all possible USB transceiver operating modes. Only one + * mode may be used at a time. The selected mode, in combination with + * the USB bus speed, determines the selection of pull-up and pull-down + * resistors. + */ +typedef enum { + USB_HOST, + USB_PERIPHERAL +} PMIC_CONVITY_USB_MODE; + +/*! + * @enum PMIC_CONVITY_USB_POWER_IN + * @brief Select the USB transceiver's power regulator input source. + * + * Defines all possible input power sources for the USB transceiver power + * regulator. Only one power supply source may be selected at a time. + */ +typedef enum { + + USB_POWER_INTERNAL_BOOST, /*!< Select internal power source + with boost. */ + + USB_POWER_VBUS, /*!< Select VBUS power source. */ + + USB_POWER_INTERNAL /*!< Select internal power source + . */ +} PMIC_CONVITY_USB_POWER_IN; + +/*! + * @enum PMIC_CONVITY_USB_POWER_OUT + * @brief Select the USB transceiver power regulator output voltage. + * + * Defines all possible output voltages for the USB transceiver power + * regulator. Only one power output voltage level may be selected at + * a time. + */ +typedef enum { + USB_POWER_2V775, /*!< Select 2.775V output voltage + . */ + USB_POWER_3V3 /*!< Select 3.3V output voltage. */ +} PMIC_CONVITY_USB_POWER_OUT; + +/*! + * @enum PMIC_CONVITY_USB_TRANSCEIVER_MODE + * @brief Select the USB transceiver operating mode. + * + * Defines all valid USB transceiver operating modes. Only one of the + * following USB transceiver modes may be selected at a time. + */ +typedef enum { + USB_TRANSCEIVER_OFF, /*!< USB transceiver currently off + . */ + USB_SINGLE_ENDED_UNIDIR, /*!< Select Single-ended + unidirectional transmit mode. */ + USB_SINGLE_ENDED_UNIDIR_TX, /*!< Select Single-ended + unidirectional transmit mode. */ + USB_SINGLE_ENDED_UNIDIR_RX, /*!< Select Single-ended + unidirectional receive mode. */ + USB_SINGLE_ENDED_BIDIR, /*!< Select Single-ended + bidirectional transmit mode. */ + USB_SINGLE_ENDED_LOW, /*!< Select USB SE0 mode. */ + USB_DIFFERENTIAL_UNIDIR_TX, /*!< Select Differential + unidirectional transmit mode + . */ + USB_DIFFERENTIAL_UNIDIR, /*!< Select Differential + unidirectional transmit mode + . */ + + USB_DIFFERENTIAL_UNIDIR_RX, /*!< Select Differential + unidirectional receive mode. */ + USB_DIFFERENTIAL_BIDIR, /*!< Select Differential + bidirectional transmit mode + */ + USB_SUSPEND_ON, /*!< Select Suspend mode. */ + USB_SUSPEND_OFF, /*!< Terminate Suspend mode. */ + USB_OTG_SRP_DLP_START, /*!< Start USB On-The-Go Session + Request Protocol using Data + Line Pulsing. */ + USB_OTG_SRP_DLP_STOP /*!< Terminate USB On-The-Go Session + Request Protocol using Data + Line Pulsing. */ +} PMIC_CONVITY_USB_TRANSCEIVER_MODE; + +/*! + * @enum PMIC_CONVITY_USB_OTG_CONFIG + * @brief Select the USB On-The-Go configuration options. + * + * Defines all possible USB On-The-Go configuration options. Multiple + * configuration options may be selected at the same time. However, only one + * VBUS current limit may be selected at a time. Selecting more than one + * VBUS current limit will result in undefined and implementation-dependent + * behavior. + */ +typedef enum { + USB_OTG_SE0CONN = 0x00001, /*!< Enable automatic + connection of a pull-up + resistor to VUSB when the + SE0 condition is detected. */ + USB_OTG_DLP_SRP = 0x00002, /*!< Enable use of the hardware + timer to control the + duration of the data line + pulse during the session + request protocol. */ + USB_PULL_OVERRIDE = 0x00004, /*!< Enable automatic disconnect + of pull-up and pull-down + resistors when transmitter + is enabled. */ + + USB_DP150K_PU = 0x00008, + + USB_VBUS_CURRENT_LIMIT_HIGH = 0x00010, /*!< Select current limit to 200mA + for VBUS regulator. */ + USB_VBUS_CURRENT_LIMIT_LOW = 0x00020, /*!< Select low current limit + for VBUS regulator. */ + USB_VBUS_CURRENT_LIMIT_LOW_10MS = 0x00040, /*!< Select low current limit + for VBUS regulator for + 10 ms . */ + USB_VBUS_CURRENT_LIMIT_LOW_20MS = 0x00080, /*!< Select low current limit + for VBUS regulator for + 20 ms . */ + USB_VBUS_CURRENT_LIMIT_LOW_30MS = 0x00100, /*!< Select low current limit + for VBUS regulator for + 30 ms . */ + USB_VBUS_CURRENT_LIMIT_LOW_40MS = 0x00200, /*!< Select low current limit + for VBUS regulator for + 40 ms . */ + USB_VBUS_CURRENT_LIMIT_LOW_50MS = 0x00400, /*!< Select low current limit + for VBUS regulator for + 50 ms . */ + USB_VBUS_CURRENT_LIMIT_LOW_60MS = 0x00800, /*!< Select low current limit + for VBUS regulator for + 60 ms . */ + + USB_VBUS_PULLDOWN = 0x01000, /*!< Enable VBUS pull-down. */ + + USB_USBCNTRL = 0x02000, + + USB_UDP_PD = 0x04000, + + USB_UDM_PD = 0x08000, + + USB_PU = 0x10000, + + USBXCVREN = 0x20000 +} PMIC_CONVITY_USB_OTG_CONFIG; +/*@}*/ + +/*! + * @name RS-232 Mode-specific Typedefs and Enumerations + * Typedefs and enumerations that are used only for setting up and controlling + * the RS-232 mode of operation. + */ +/*@{*/ + +/*! + * @enum PMIC_CONVITY_RS232_EXTERNAL + * @brief Select the RS-232 transceiver external connections. + * + * Defines all valid RS-232 transceiver external RX/TX connection options. + * Only one connection mode may be selected at a time. + */ +typedef enum { + RS232_TX_UDM_RX_UDP, /*!< Select RS-232 TX on UDM */ + RS232_TX_UDP_RX_UDM, /*!< Select RS-232 TX on UDP + . */ + RS232_TX_RX_EXTERNAL_DEFAULT /*!< Use power on default. */ +} PMIC_CONVITY_RS232_EXTERNAL; + +/*! + * @enum PMIC_CONVITY_RS232_INTERNAL + * @brief Select the RS-232 transceiver internal connections. + * + * Defines all valid RS-232 transceiver internal RX/TX connection options. + * Only one connection mode can be selected at a time. + */ +typedef enum { + RS232_TX_USE0VM_RX_UDATVP, /*!< Select RS-232 TX from USE0VM + . */ + RS232_TX_UDATVP_RX_URXVM, /*!< Select RS-232 TX from UDATVP + . */ + RS232_TX_UTXDI_RX_URXDO, /*!< Select RS-232 TX from UTXDI + . */ + RS232_TX_RX_INTERNAL_DEFAULT /*!< Use power on default. */ +} PMIC_CONVITY_RS232_INTERNAL; + +/*@}*/ + +/*! + * @name CEA-936 Mode-specific Typedefs and Enumerations + * Typedefs and enumerations that are used only for setting up and controlling + * the CEA-936 mode of operation. + */ +/*@{*/ + +/*! + * @enum PMIC_CONVITY_CEA936_EXIT_SIGNAL + * @brief Select the CEA-936 mode exit signal. + * + * Defines all valid CEA-936 connection termination signals. Only one + * termination signal can be selected at a time. + */ +typedef enum { + CEA936_UID_NO_PULLDOWN, /*!< No UID pull-down . */ + CEA936_UID_PULLDOWN_6MS, /*!< UID pull-down for 6 ms (+/-2 ms) + . */ + CEA936_UID_PULLDOWN, /*!< UID pulled down . */ + CEA936_UDMPULSE /*!< UDM pulsed . */ +} PMIC_CONVITY_CEA936_EXIT_SIGNAL; + +/*@}*/ + +/*************************************************************************** + * PMIC API DEFINITIONS * + ***************************************************************************/ + +/*! + * @name General Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Connectivity + * hardware. + */ +/*@{*/ + +/*! + * @brief Request exclusive access to the PMIC Connectivity hardware. + * + * Attempt to open and gain exclusive access to the PMIC Connectivity + * hardware. An initial operating mode (e.g., USB or RS-232) must also + * be specified. + * + * If the open request is successful, then a numeric handle is returned + * and this handle must be used in all subsequent function calls. The + * same handle must also be used in the close call when use of the PMIC + * connectivity hardware is no longer required. + * + * The open request will fail if another thread has already obtained the + * device handle and has not yet called pmic_convity_close() with it. + * + * @param handle Device handle to be used for subsequent PMIC + * Connectivity API calls. + * @param mode Initial connectivity operating mode. + * + * @retval PMIC_SUCCESS If the open request was successful + * @retval PMIC_ERROR If the connectivity hardware cannot be opened. + */ +PMIC_STATUS pmic_convity_open(PMIC_CONVITY_HANDLE * const handle, + const PMIC_CONVITY_MODE mode); + +/*! + * @brief Terminate further access to the PMIC Connectivity hardware. + * + * Terminate further access to the PMIC Connectivity hardware. This also + * allows another thread to successfully call pmic_convity_open() to gain + * access. + * + * @param handle Device handle from open() call. + * + * @retval PMIC_SUCCESS If the close request was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_close(const PMIC_CONVITY_HANDLE handle); + +/*! + * @brief Set the PMIC Connectivity main operating mode. + * + * Change the current operating mode of the PMIC Connectivity hardware. + * The available connectivity operating modes are hardware-dependent and + * consists of one or more of the following: USB (including USB On-the-Go), + * RS-232, and CEA-936. Requesting an operating mode that is not supported + * by the PMIC hardware will return PMIC_NOT_SUPPORTED. + * + * @param handle Device handle from open() call. + * @param mode Desired operating mode. + * + * @retval PMIC_SUCCESS If the requested mode was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the PMIC hardware does not support + * the desired operating mode. + */ +PMIC_STATUS pmic_convity_set_mode(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_MODE mode); + +/*! + * @brief Get the current PMIC Connectivity main operating mode. + * + * Get the current operating mode for the PMIC Connectivity hardware. + * + * @param handle Device handle from open() call. + * @param mode The current PMIC Connectivity operating mode. + * + * @retval PMIC_SUCCESS If the requested mode was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_get_mode(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_MODE * const mode); + +/*! + * @brief Reset the Connectivity hardware to it's power on state. + * + * Restore all registers to the initial power-on/reset state. + * + * @param handle Device handle from open() call. + * + * @retval PMIC_SUCCESS If the reset was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_reset(const PMIC_CONVITY_HANDLE handle); + +/*! + * @brief Set the Connectivity callback function. + * + * Register a callback function that will be used to signal PMIC Connectivity + * events. For example, the USB subsystem should register a callback function + * in order to be notified of device connect/disconnect events. Note, however, + * that non-USB events may also be signalled depending upon the PMIC hardware + * capabilities. Therefore, the callback function must be able to properly + * handle all of the possible events if support for non-USB peripherals is + * also to be included. + * + * @param handle Device handle from open() call. + * @param func A pointer to the callback function. + * @param eventMask A mask selecting events to be notified. + * + * @retval PMIC_SUCCESS If the callback was successfully registered. + * @retval PMIC_PARAMETER_ERROR If the handle or the eventMask is invalid. + */ +PMIC_STATUS pmic_convity_set_callback(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_CALLBACK func, + const PMIC_CONVITY_EVENTS eventMask); + +/*! + * @brief Deregisters the existing Connectivity callback function. + * + * Deregister the callback function that was previously registered by calling + * pmic_convity_set_callback(). + * + * @param handle Device handle from open() call. + * + * @retval PMIC_SUCCESS If the callback was successfully deregistered. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_clear_callback(const PMIC_CONVITY_HANDLE handle); + +/*! + * @brief Get the current Connectivity callback function settings. + * + * Get the current callback function and event mask. + * + * @param handle Device handle from open() call. + * @param func The current callback function. + * @param eventMask The current event selection mask. + * + * @retval PMIC_SUCCESS If the callback information was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_get_callback(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_CALLBACK * const func, + PMIC_CONVITY_EVENTS * const eventMask); + +/*@}*/ + +/***************************************************************************/ + +/*! + * @name USB and USB On-The-Go APIs + * USB Connectivity mode-specific configuration and setup functions. + */ +/*@{*/ + +/*! + * @brief Set the USB transceiver's operating speed. + * + * Set the USB transceiver speed. + * + * @param handle Device handle from open() call. + * @param speed The desired USB transceiver speed. + * + * @retval PMIC_SUCCESS If the transceiver speed was successfully + * set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the high speed (480 Mbps) mode is + * requested. + */ +PMIC_STATUS pmic_convity_usb_set_speed(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_SPEED speed); + +/*! + * This function enables/disables VUSB and VBUS output. + * This API configures the VUSBEN and VBUSEN bits of USB register + * + * @param handle Device handle from open() call. + * @param out_type true, for VUSB + * false, for VBUS + * @param out if true, output is enabled + * if false, output is disabled + * + * @return This function returns PMIC_SUCCESS if successful. + */ + +PMIC_STATUS pmic_convity_set_output(const PMIC_CONVITY_HANDLE handle, + bool out_type, bool out); + +/*! + * @brief Get the USB transceiver's operating speed. + * + * Get the USB transceiver speed. + * + * @param handle Device handle from open() call. + * @param speed The current USB transceiver speed. + * @param mode The current USB transceiver mode. + * + * @retval PMIC_SUCCESS If the transceiver speed was successfully + * set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * obtained + */ +PMIC_STATUS pmic_convity_usb_get_speed(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_SPEED * const speed, + PMIC_CONVITY_USB_MODE * const mode); + +/*! + * @brief Set the USB transceiver's power supply configuration. + * + * Set the USB transceiver's power supply configuration. + * + * @param handle Device handle from open() call. + * @param pwrin USB transceiver regulator input power source. + * @param pwrout USB transceiver regulator output power level. + * + * @retval PMIC_SUCCESS If the USB transceiver's power supply + * configuration was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the PMIC hardware does not support + * the desired configuration. + */ +PMIC_STATUS pmic_convity_usb_set_power_source(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_POWER_IN + pwrin, + const PMIC_CONVITY_USB_POWER_OUT + pwrout); + +/*! + * @brief Get the USB transceiver's power supply configuration. + * + * Get the USB transceiver's current power supply configuration. + * + * @param handle Device handle from open() call. + * @param pwrin USB transceiver regulator input power source + * @param pwrout USB transceiver regulator output power level + * + * @retval PMIC_SUCCESS If the USB transceiver's power supply + * configuration was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_usb_get_power_source(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_POWER_IN * + const pwrin, + PMIC_CONVITY_USB_POWER_OUT * + const pwrout); + +/*! + * @brief Set the current USB transceiver operating mode. + * + * Set the USB transceiver's operating mode. + * + * @param handle Device handle from open() call. + * @param mode Desired operating mode. + * + * @retval PMIC_SUCCESS If the USB transceiver's operating mode + * was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired USB transceiver mode is + * not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_usb_set_xcvr(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_TRANSCEIVER_MODE + mode); + +/*! + * @brief Get the current USB transceiver operating mode. + * + * Get the USB transceiver's current operating mode. + * + * @param handle Device handle from open() call. + * @param mode Current operating mode. + * + * @retval PMIC_SUCCESS If the USB transceiver's operating mode + * was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_usb_get_xcvr(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_TRANSCEIVER_MODE * + const mode); + +/*! + * @brief Set the current USB On-The-Go data line pulse duration (ms). + * + * Set the Data Line Pulse duration (in milliseconds) for the USB OTG + * Session Request Protocol. + * + * Note that for mc13783 the duration is fixed at 7.5 ms and calling this + * function will simply return PMIC_NOT_SUPPORTED. + * + * @param handle Device handle from open() call. + * @param duration The data line pulse duration (ms). + * + * @retval PMIC_SUCCESS If the pulse duration was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or the data line pulse + * duration is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired data line pulse duration + * is not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_usb_otg_set_dlp_duration(const PMIC_CONVITY_HANDLE + handle, + const unsigned int duration); + +/*! + * @brief Get the current USB On-The-Go data line pulse duration (ms). + * + * Get the current Data Line Pulse duration (in milliseconds) for the USB + * OTG Session Request Protocol. + * + * Note that the Data Line Pulse duration is fixed at 7.5 ms for the mc13783 + * PMIC. Therefore, calling this function while using the mc13783 PMIC will + * simply return PMIC_NOT_SUPPORTED. + * + * @param handle Device handle from open() call. + * @param duration The data line pulse duration (ms). + * + * @retval PMIC_SUCCESS If the pulse duration was successfully + * obtained. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If called using the mc13783 PMIC. + */ +PMIC_STATUS pmic_convity_usb_otg_get_dlp_duration(const PMIC_CONVITY_HANDLE + handle, + unsigned int *const duration); + +/*! + * @brief Start the USB OTG Host Negotiation Protocol (HNP) process. + * + * This function must be called during the start of the HNP process to + * properly reconfigure the pull-up resistor on the D+ line for both + * the USB A and B devices. + * + * @param handle device handle from open() call + * @param deviceType the USB device type (either A or B) + * + * @return PMIC_SUCCESS if the HNP was successfully started + */ +PMIC_STATUS pmic_convity_usb_otg_begin_hnp(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_DEVICE_TYPE + deviceType); + +/*! + * @brief Complete the USB OTG Host Negotiation Protocol (HNP) process. + * + * This function must be called during the end of the HNP process to + * properly reconfigure the pull-up resistor on the D+ line for both + * the USB A and B devices. + * + * @param handle device handle from open() call + * @param deviceType the USB device type (either A or B) + * + * @return PMIC_SUCCESS if the HNP was successfully ended + */ +PMIC_STATUS pmic_convity_usb_otg_end_hnp(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_DEVICE_TYPE + deviceType); + +/*! + * @brief Set the current USB On-The-Go configuration. + * + * Set the USB On-The-Go (OTG) configuration. Multiple configuration settings + * may be OR'd together in a single call. However, selecting conflicting + * settings (e.g., multiple VBUS current limits) will result in undefined + * behavior. + * + * @param handle Device handle from open() call. + * @param cfg Desired USB OTG configuration. + * + * @retval PMIC_SUCCESS If the OTG configuration was successfully + * set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired USB OTG configuration is + * not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_usb_otg_set_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_OTG_CONFIG + cfg); + +/*! + * @brief Clear the current USB On-The-Go configuration. + * + * Clears the USB On-The-Go (OTG) configuration. Multiple configuration settings + * may be OR'd together in a single call. However, selecting conflicting + * settings (e.g., multiple VBUS current limits) will result in undefined + * behavior. + * + * @param handle Device handle from open() call. + * @param cfg USB OTG configuration settings to be cleared. + * + * @retval PMIC_SUCCESS If the OTG configuration was successfully + * cleared. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired USB OTG configuration is + * not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_usb_otg_clear_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_USB_OTG_CONFIG + cfg); + +/*! + * @brief Get the current USB On-The-Go configuration. + * + * Get the current USB On-The-Go (OTG) configuration. + * + * @param handle Device handle from open() call. + * @param cfg The current USB OTG configuration. + * + * @retval PMIC_SUCCESS If the OTG configuration was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_usb_otg_get_config(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_USB_OTG_CONFIG * + const cfg); + +/*@}*/ + +/***************************************************************************/ + +/*! + * @name RS-232 APIs + * RS-232 Connectivity mode-specific configuration and setup functions. + */ +/*@{*/ + +/*! + * @brief Set the current RS-232 operating configuration. + * + * Set the connectivity interface to the selected RS-232 operating mode. + * Note that the RS-232 operating mode will be automatically overridden + * if the USB_EN is asserted at any time (e.g., when a USB device is + * attached). + * + * @param handle Device handle from open() call. + * @param cfgInternal RS-232 transceiver internal connections. + * @param cfgExternal RS-232 transceiver external connections. + * + * @retval PMIC_SUCCESS If the requested RS-232 mode was set. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired RS-232 configuration is + * not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_rs232_set_config(const PMIC_CONVITY_HANDLE handle, + const PMIC_CONVITY_RS232_INTERNAL + cfgInternal, + const PMIC_CONVITY_RS232_EXTERNAL + cfgExternal); + +/*! + * @brief Get the current RS-232 operating configuration. + * + * Get the connectivity interface's current RS-232 operating mode. + * + * @param handle Device handle from open() call. + * @param cfgInternal RS-232 transceiver internal connections. + * @param cfgExternal RS-232 transceiver external connections. + * + * @retval PMIC_SUCCESS If the requested RS-232 mode was retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_convity_rs232_get_config(const PMIC_CONVITY_HANDLE handle, + PMIC_CONVITY_RS232_INTERNAL * + const cfgInternal, + PMIC_CONVITY_RS232_EXTERNAL * + const cfgExternal); + +/***************************************************************************/ + +/*@}*/ + +/*! + * @name CE-936 APIs + * CE-936 Connectivity mode-specific configuration and setup functions. + */ +/*@{*/ + +/*! + * @brief Send a signal to exit CEA-936 mode. + * + * Signal the attached device to exit the current CEA-936 operating mode. + * Returns an error if the current operating mode is not CEA-936. + * + * @param handle Device handle from open() call. + * @param signal Type of exit signal to be sent. + * + * @retval PMIC_SUCCESS If the CEA-936 exit mode signal was sent. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_NOT_SUPPORTED If the desired CEA-936 exit mode signal + * is not supported by the PMIC hardware. + */ +PMIC_STATUS pmic_convity_cea936_exit_signal(const PMIC_CONVITY_HANDLE handle, + const + PMIC_CONVITY_CEA936_EXIT_SIGNAL + signal); + +/*@}*/ + +#endif /* __ASM_ARCH_MXC_PMIC_CONVITY_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx31.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx31.h @@ -3,6 +3,14 @@ */ #define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ #define MX31_IRAM_SIZE SZ_16K +#define MX31_IRAM_BASE_ADDR_VIRT 0xFC340000 + +#define USB_IRAM_BASE_ADDR (MX31_IRAM_BASE_ADDR) +#ifdef CONFIG_USB_STATIC_IRAM +#define USB_IRAM_SIZE (2*SZ_8K) +#else +#define USB_IRAM_SIZE 0 +#endif #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) @@ -14,21 +22,98 @@ #define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) #define IIM_BASE_ADDR (SPBA0_BASE_ADDR + 0x0001C000) +/*! + * defines for SPBA modules + */ +#define SPBA_SDHC1 0x04 +#define SPBA_SDHC2 0x08 +#define SPBA_SIM 0x18 +#define SPBA_IIM 0x1C + #define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) #define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) #define SCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AE000) #define SMN_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AF000) #define MPEG4_ENC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) +#define VPU_BASE_ADDR MPEG4_ENC_BASE_ADDR #define MX31_NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) +#define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) +#define NFC_SIZE 0x1000 +#define NFC_IO_ADDRESS(x) 0 + +/* + * VL2CC for i.MX32 + */ +#define VL2CC_BASE_ADDR 0xE0000000 + +/*! + * Defines for modules using static and dynamic DMA channels + */ + +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_IRAM 30 +#endif /*CONFIG_SDMA_IRAM */ + +#define MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART4_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART4_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART5_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART5_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC2 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL + +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_SSI2_TX (MXC_DMA_CHANNEL_IRAM + 1) +#else /*CONFIG_SDMA_IRAM */ +#define MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL +#endif /*CONFIG_SDMA_IRAM */ + +#define MXC_DMA_CHANNEL_FIR_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_FIR_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_FIFO_MEMORY MXC_DMA_DYNAMIC_CHANNEL + +/* + * DMA request assignments + */ +#define DMA_REQ_SDHC2 21 +#define DMA_REQ_SDHC1 20 +#define DMA_REQ_FIRI_TX 17 +#define DMA_REQ_FIRI_RX 16 +#define DMA_REQ_UART4_TX 13 +#define DMA_REQ_UART4_RX 12 +#define DMA_REQ_CSPI3_TX 11 +#define DMA_REQ_CSPI3_RX 10 +#define DMA_REQ_UART5_TX 11 +#define DMA_REQ_UART5_RX 10 +#define DMA_REQ_UART3_TX 9 +#define DMA_REQ_UART3_RX 8 +#define DMA_REQ_SIM 5 #define MXC_INT_MPEG4_ENCODER 5 #define MXC_INT_FIRI 7 #define MX31_INT_MMC_SDHC2 8 +#define MXC_INT_MMC_SDHC2 8 #define MXC_INT_MMC_SDHC1 9 #define MX31_INT_SSI2 11 #define MX31_INT_SSI1 12 #define MXC_INT_MBX 16 +#define MXC_INT_VPU MXC_INT_MBX #define MXC_INT_CSPI3 17 #define MXC_INT_SIM2 20 #define MXC_INT_SIM1 21 @@ -43,3 +128,13 @@ #define MXC_INT_CCM 53 #define MXC_INT_PCMCIA 54 +#define ARM11_PMU_IRQ MXC_INT_EVTMON + +/*! + * NFMS bit in RCSR register for pagesize of nandflash + */ +#define NFMS (*((volatile u32 *)IO_ADDRESS(CCM_BASE_ADDR+0xc))) +#define NFMS_BIT 30 +#define NFMS_NF_DWIDTH 31 +#define NFMS_NF_PG_SZ 30 + --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/irqs.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/irqs.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -12,9 +12,9 @@ #define __ASM_ARCH_MXC_IRQS_H__ /* - * So far all i.MX SoCs have 64 internal interrupts + * So far all i.MX SoCs have 128 internal interrupts */ -#define MXC_INTERNAL_IRQS 64 +#define MXC_INTERNAL_IRQS 128 #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS @@ -22,8 +22,14 @@ #define MXC_GPIO_IRQS (32 * 4) #elif defined CONFIG_ARCH_MX2 #define MXC_GPIO_IRQS (32 * 6) -#elif defined CONFIG_ARCH_MX3 +#elif defined CONFIG_ARCH_MX25 +#define MXC_GPIO_IRQS (32 * 4) +#elif defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX35 +#define MXC_GPIO_IRQS (32 * 3) +#elif defined CONFIG_ARCH_MX37 #define MXC_GPIO_IRQS (32 * 3) +#elif defined CONFIG_ARCH_MX51 +#define MXC_GPIO_IRQS (32 * 4) #endif /* @@ -33,7 +39,14 @@ * within sensible limits. */ #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) +#ifdef CONFIG_MXC_PSEUDO_IRQS +#define MXC_PSEUDO_IO_BASE (MXC_BOARD_IRQ_START + 16) +#define MXC_MAX_PSEUDO_IO_LINES 16 +#define MXC_BOARD_IRQS 32 +#else #define MXC_BOARD_IRQS 16 +#define MXC_MAX_PSEUDO_IO_LINES 0 +#endif #define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) @@ -52,4 +65,17 @@ /* switch betwean IRQ and FIQ */ extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); +#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_BOARD_IRQ_START) + +/* + * This function is used to get the AVIC Lo and Hi interrupts + * that are enabled as wake up sources to wake up the core from suspend + */ +void mxc_get_wake_irq(u32 * wake_src[]); + +/* Define interrupt number for OProfile */ +#if defined CONFIG_ARCH_MX51 +#define MXC_INT_PMU 77 +#endif + #endif /* __ASM_ARCH_MXC_IRQS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_vpu.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_vpu.h @@ -0,0 +1,94 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU Lesser General + * Public License. You may obtain a copy of the GNU Lesser General + * Public License Version 2.1 or later at the following locations: + * + * http://www.opensource.org/licenses/lgpl-license.html + * http://www.gnu.org/copyleft/lgpl.html + */ + +/*! + * @defgroup VPU Video Processor Unit Driver + */ + +/*! + * @file arch-mxc/mxc_vpu.h + * + * @brief VPU system initialization and file operation definition + * + * @ingroup VPU + */ + +#ifndef __ASM_ARCH_MXC_VPU_H__ +#define __ASM_ARCH_MXC_VPU_H__ + +#include + +struct vpu_mem_desc { + u32 size; + dma_addr_t phy_addr; + u32 cpu_addr; /* cpu address to free the dma mem */ + u32 virt_uaddr; /* virtual user space address */ +}; + +#define VPU_IOC_MAGIC 'V' + +#define VPU_IOC_PHYMEM_ALLOC _IO(VPU_IOC_MAGIC, 0) +#define VPU_IOC_PHYMEM_FREE _IO(VPU_IOC_MAGIC, 1) +#define VPU_IOC_WAIT4INT _IO(VPU_IOC_MAGIC, 2) +#define VPU_IOC_PHYMEM_DUMP _IO(VPU_IOC_MAGIC, 3) +#define VPU_IOC_REG_DUMP _IO(VPU_IOC_MAGIC, 4) +#define VPU_IOC_VL2CC_FLUSH _IO(VPU_IOC_MAGIC, 5) +#define VPU_IOC_IRAM_SETTING _IO(VPU_IOC_MAGIC, 6) +#define VPU_IOC_CLKGATE_SETTING _IO(VPU_IOC_MAGIC, 7) +#define VPU_IOC_GET_WORK_ADDR _IO(VPU_IOC_MAGIC, 8) +#define VPU_IOC_GET_PIC_PARA_ADDR _IO(VPU_IOC_MAGIC, 9) +#define VPU_IOC_GET_USER_DATA_ADDR _IO(VPU_IOC_MAGIC, 10) +#define VPU_IOC_SYS_SW_RESET _IO(VPU_IOC_MAGIC, 11) +#define VPU_IOC_GET_SHARE_MEM _IO(VPU_IOC_MAGIC, 12) + +#define BIT_CODE_RUN 0x000 +#define BIT_CODE_DOWN 0x004 +#define BIT_INT_CLEAR 0x00C +#define BIT_INT_STATUS 0x010 + +#define BIT_WORK_CTRL_BUF_BASE 0x100 +#define BIT_WORK_CTRL_BUF_REG(i) (BIT_WORK_CTRL_BUF_BASE + i * 4) +#define BIT_CODE_BUF_ADDR BIT_WORK_CTRL_BUF_REG(0) +#define BIT_WORK_BUF_ADDR BIT_WORK_CTRL_BUF_REG(1) +#define BIT_PARA_BUF_ADDR BIT_WORK_CTRL_BUF_REG(2) +#define BIT_BIT_STREAM_CTRL BIT_WORK_CTRL_BUF_REG(3) +#define BIT_FRAME_MEM_CTRL BIT_WORK_CTRL_BUF_REG(4) +#define BIT_BIT_STREAM_PARAM BIT_WORK_CTRL_BUF_REG(5) + +#define BIT_RESET_CTRL 0x11C + +/* i could be 0, 1, 2, 3 */ +#define BIT_RD_PTR_BASE 0x120 +#define BIT_RD_PTR_REG(i) (BIT_RD_PTR_BASE + i * 8) +#define BIT_WR_PTR_REG(i) (BIT_RD_PTR_BASE + i * 8 + 4) + +/* i could be 0, 1, 2, 3 */ +#define BIT_FRM_DIS_FLG_BASE (cpu_is_mx51() ? 0x150 : 0x140) +#define BIT_FRM_DIS_FLG_REG(i) (BIT_FRM_DIS_FLG_BASE + i * 4) + +#define BIT_BUSY_FLAG 0x160 +#define BIT_RUN_COMMAND 0x164 +#define BIT_INT_ENABLE 0x170 + +#define BITVAL_PIC_RUN 8 + +#define VPU_SLEEP_REG_VALUE 10 +#define VPU_WAKE_REG_VALUE 11 + +int vl2cc_init(u32 vl2cc_hw_base); +void vl2cc_enable(void); +void vl2cc_flush(void); +void vl2cc_disable(void); +void vl2cc_cleanup(void); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) * * This program is free software; you can redistribute it and/or @@ -26,9 +26,13 @@ #define MXC_CPU_MX1 1 #define MXC_CPU_MX21 21 +#define MXC_CPU_MX25 25 #define MXC_CPU_MX27 27 #define MXC_CPU_MX31 31 +#define MXC_CPU_MX32 32 #define MXC_CPU_MX35 35 +#define MXC_CPU_MX37 37 +#define MXC_CPU_MX51 51 #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; @@ -58,6 +62,18 @@ # define cpu_is_mx21() (0) #endif +#ifdef CONFIG_ARCH_MX25 +# ifdef mxc_cpu_type +# undef mxc_cpu_type +# define mxc_cpu_type __mxc_cpu_type +# else +# define mxc_cpu_type MXC_CPU_MX25 +# endif +# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25) +#else +# define cpu_is_mx25() (0) +#endif + #ifdef CONFIG_MACH_MX27 # ifdef mxc_cpu_type # undef mxc_cpu_type @@ -94,6 +110,497 @@ # define cpu_is_mx35() (0) #endif +#ifdef CONFIG_ARCH_MX37 +# ifdef mxc_cpu_type +# undef mxc_cpu_type +# define mxc_cpu_type __mxc_cpu_type +# else +# define mxc_cpu_type MXC_CPU_MX37 +# endif +# define cpu_is_mx37() (mxc_cpu_type == MXC_CPU_MX37) +#else +# define cpu_is_mx37() (0) +#endif + +#ifdef CONFIG_ARCH_MX51 +# ifdef mxc_cpu_type +# undef mxc_cpu_type +# define mxc_cpu_type __mxc_cpu_type +# else +# define mxc_cpu_type MXC_CPU_MX51 +# endif +# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51) +#else +# define cpu_is_mx51() (0) +#endif + +#define cpu_is_mx32() (0) + +/* + * Create inline functions to test for cpu revision + * Function name is cpu_is__rev(rev) + * + * Returns: + * 0 - not the cpu queried + * 1 - cpu and revision match + * 2 - cpu matches, but cpu revision is greater than queried rev + * -1 - cpu matches, but cpu revision is less than queried rev + */ +#ifndef __ASSEMBLY__ +extern unsigned int system_rev; +#define mxc_set_system_rev(part, rev) ({ \ + system_rev = (part << 12) | rev; \ +}) +#define mxc_cpu() (system_rev >> 12) +#define mxc_cpu_rev() (system_rev & 0xFF) +#define mxc_cpu_rev_major() ((system_rev >> 4) & 0xF) +#define mxc_cpu_rev_minor() (system_rev & 0xF) +#define mxc_cpu_is_rev(rev) \ + ((mxc_cpu_rev() == rev) ? 1 : ((mxc_cpu_rev() < rev) ? -1 : 2)) +#define cpu_rev(type) \ +static inline int type## _rev (int rev) \ +{ \ + return (type() ? mxc_cpu_is_rev(rev) : 0); \ +} +cpu_rev(cpu_is_mx21); +cpu_rev(cpu_is_mx25); +cpu_rev(cpu_is_mx27); +cpu_rev(cpu_is_mx31); +cpu_rev(cpu_is_mx35); +cpu_rev(cpu_is_mx37); +cpu_rev(cpu_is_mx51); + + +#include + +/*! + * This structure is used to define the One wire platform data. + * It includes search rom accelerator. + */ +struct mxc_w1_config { + int search_rom_accelerator; +}; +/*! + * This structure is used to define the SPI master controller's platform + * data. It includes the SPI bus number and the maximum number of + * slaves/chips it supports. + */ +struct mxc_spi_master { + /*! + * SPI Master's bus number. + */ + unsigned int bus_num; + /*! + * SPI Master's maximum number of chip selects. + */ + unsigned int maxchipselect; + /*! + * CSPI Hardware Version. + */ + unsigned int spi_version; + /*! + * CSPI chipselect pin table. + * Workaround for ecspi chipselect pin may not keep correct level when + * idle. + */ + void (*chipselect_active) (int cspi_mode, int status, int chipselect); + void (*chipselect_inactive) (int cspi_mode, int status, int chipselect); +}; + +struct mxc_ipu_config { + int rev; + struct clk *di_clk[2]; +}; + +struct mxc_ir_platform_data { + int uart_ir_mux; + int ir_rx_invert; + int ir_tx_invert; + struct clk *uart_clk; +}; + +struct mxc_i2c_platform_data { + u32 i2c_clk; +}; + +/* + * This struct is to define the number of SSIs on a platform, + * DAM source port config, DAM external port config, + * regulator names, and other stuff audio needs. + */ +struct mxc_audio_platform_data { + int ssi_num; + int src_port; + int ext_port; + + int intr_id_hp; + int ext_ram; + struct clk *ssi_clk[2]; + + int hp_irq; + int (*hp_status) (void); + + int sysclk; + + int (*init) (void); /* board specific init */ + int (*amp_enable) (int enable); + int (*finit) (void); /* board specific finit */ + void *priv; /* used by board specific functions */ +}; + +struct mxc_spdif_platform_data { + int spdif_tx; + int spdif_rx; + int spdif_clk_44100; + int spdif_clk_48000; + int spdif_clkid; + struct clk *spdif_clk; + struct clk *spdif_core_clk; + struct clk *spdif_audio_clk; +}; + +struct mxc_asrc_platform_data { + struct clk *asrc_core_clk; + struct clk *asrc_audio_clk; + unsigned int channel_bits; +}; + +struct mxc_bt_platform_data { + char *bt_vdd; + char *bt_vdd_parent; + char *bt_vusb; + char *bt_vusb_parent; + void (*bt_reset) (void); +}; + +struct mxc_lightsensor_platform_data { + char *vdd_reg; + int rext; +}; + +struct mxc_fb_platform_data { + struct fb_videomode *mode; + char *mode_str; + u32 interface_pix_fmt; +}; + +struct mxc_lcd_platform_data { + char *io_reg; + char *core_reg; + char *analog_reg; + void (*reset) (void); +}; + + +struct mxc_tsc_platform_data { + char *vdd_reg; + int penup_threshold; + void (*active) (void); + void (*inactive) (void); +}; + +struct mxc_tvout_platform_data { + char *io_reg; + char *core_reg; + char *analog_reg; + u32 detect_line; +}; + +struct mxc_tvin_platform_data { + char *dvddio_reg; + char *dvdd_reg; + char *avdd_reg; + char *pvdd_reg; + void (*pwdn) (int pwdn); + void (*reset) (void); +}; + +/*! Platform data for the IDE drive structure. */ +struct mxc_ide_platform_data { + char *power_drive; /*!< The power pointer */ + char *power_io; /*!< The power pointer */ +}; + +struct mxc_camera_platform_data { + char *core_regulator; + char *io_regulator; + char *analog_regulator; + char *gpo_regulator; + u32 mclk; + u32 csi; +}; + +/*gpo1-3 is in fixed state by hardware design, + * only deal with reset pin and clock_enable pin + * only poll mode can be used to control the chip, + * interrupt mode is not supported by 3ds*/ +struct mxc_fm_platform_data { + char *reg_vio; + char *reg_vdd; + void (*gpio_get) (void); + void (*gpio_put) (void); + void (*reset) (void); + void (*clock_ctl) (int flag); + u8 sksnr; /*0,disable;1,most stop;0xf,fewest stop*/ + u8 skcnt; /*0,disable;1,most stop;0xf,fewest stop*/ + /* + 00 = 87.5-108 MHz (USA,Europe) (Default). + 01 = 76-108 MHz (Japan wide band). + 10 = 76-90 MHz (Japan). + 11 = Reserved. + */ + u8 band; + /* + 00 = 200 kHz (USA, Australia) (default). + 01 = 100 kHz (Europe, Japan). + 10 = 50 kHz. + */ + u8 space; + u8 seekth; +}; + +struct mxc_mma7450_platform_data { + char *reg_dvdd_io; + char *reg_avdd; + void (*gpio_pin_get) (void); + void (*gpio_pin_put) (void); + int int1; + int int2; +}; + +struct mxc_keyp_platform_data { + u16 *matrix; + void (*active) (void); + void (*inactive) (void); + char *vdd_reg; +}; + +struct mxc_unifi_platform_data { + void (*hardreset) (int pin_level); + void (*enable) (int en); + /* power parameters */ + char *reg_gpo1; + char *reg_gpo2; + char *reg_1v5_ana_bb; + char *reg_vdd_vpa; + char *reg_1v5_dd; + + int host_id; + + void *priv; +}; + +struct mxc_gps_platform_data { + char *core_reg; + char *analog_reg; + struct regulator *gps_regu_core; + struct regulator *gps_regu_analog; +}; + +struct mxc_mlb_platform_data { + u32 buf_address; + u32 phy_address; + char *reg_nvcc; + char *mlb_clk; +}; + +struct flexcan_platform_data { + char *core_reg; + char *io_reg; + void (*xcvr_enable) (int id, int en); + void (*active) (int id); + void (*inactive) (int id); +}; + +struct mxc_srtc_platform_data { + u32 srtc_sec_mode_addr; +}; + +struct tve_platform_data { + char *dac_reg; + char *dig_reg; +}; + +struct fec_platform_data { + int (*init) (void); + int (*uninit) (void); + struct regulator *vddio_reg; +}; + +/* The name that links the i.MX NAND Flash Controller driver to its devices. */ + +#define IMX_NFC_DRIVER_NAME ("imx_nfc") + +/* Resource names for the i.MX NAND Flash Controller driver. */ + +#define IMX_NFC_BUFFERS_ADDR_RES_NAME \ + ("i.MX NAND Flash Controller Buffer") +#define IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME \ + ("i.MX NAND Flash Controller Primary Registers") +#define IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME \ + ("i.MX NAND Flash Controller Secondary Registers") +#define IMX_NFC_INTERRUPT_RES_NAME \ + ("i.MX NAND Flash Controller Interrupt") + +/** + * struct imx_nfc_platform_data - i.MX NFC driver platform data. + * + * This structure communicates information to the i.MX NFC driver that can't be + * expressed as resources. + * + * @nfc_major_version: The "major version" of the NFC hardware. + * @nfc_minor_version: The "minor version" of the NFC hardware. + * @force_ce: If true, this flag causes the driver to assert the + * hardware chip enable signal for the currently selected + * chip as long as the MTD NAND Flash HAL has the chip + * selected (not just when an I/O transaction is in + * progress). + * @target_cycle_in_ns: The target read and write cycle period, in nanoseconds. + * NAND Flash part data sheets give minimum times for read + * and write cycles in nanoseconds (usually tRC and tWC, + * respectively). Set this value to the maximum of these + * two parameters. The driver will set the NFC clock as + * close as possible without violating this value. + * @clock_name: The name of the clock used by the NAND Flash controller. + * @init: A pointer to a function the driver must call so the + * platform can prepare for this device to operate. This + * pointer may be NULL. + * @exit: A pointer to a function the driver must call so the + * platform clean up after this device stops operating. + * This pointer may be NULL. + * @set_page_size: A pointer to a function the driver can call to set the + * page size. This pointer may be NULL. + * + * For some i.MX SoC's, the NFC gets information about the + * page size from signals driven by a system register + * outside the NFC. The address and format of this external + * register varies across SoC's. In other SoC's, the NFC + * still receives this signal, but it is overridden by a + * page size register in the NFC itself. + * + * For SoC's where the page size *must* be set in an + * external register, the driver must rely on a platform- + * specific function, and this member must point to it. + * + * For SoC's where the NFC has its own page size register, + * the driver will set that register itself and ignore the + * external signals. In this case, there's no need for the + * platform-specific function and this member must be NULL. + * + * This function accepts the page size in bytes (MTD calls + * this the "writesize") discovered by the NAND Flash MTD + * base driver (e.g., 512, 2048, 4096). This size refers + * specifically to the the data bytes in the page, *not* + * including out-of-band bytes. The return value is zero if + * the operation succeeded. The driver does *not* view a + * non-zero value as an error code - only an indication of + * failure. The driver will decide for itself what error + * code to return to its caller. + * @interleave: Indicates that the driver should "interleave" the NAND + * Flash chips it finds. If true, the driver will aggregate + * the chips "horizontally" such that MTD will see a single + * chip with a potentially very large page size. This can + * improve write performance for some applications. + * @partitions: An optional pointer to an array of partitions. If this + * is NULL, the driver will create a single MTD that + * represents the entire medium. + * @partition_count: The number of elements in the partition array. + */ + +struct imx_nfc_platform_data { + unsigned int nfc_major_version; + unsigned int nfc_minor_version; + int force_ce; + unsigned int target_cycle_in_ns; + char *clock_name; + int (*init)(void); + void (*exit)(void); + int (*set_page_size)(unsigned int data_size_in_bytes); + int interleave; + struct mtd_partition *partitions; + unsigned int partition_count; +}; + +extern void mxc_wd_reset(void); +unsigned long board_get_ckih_rate(void); + +int mxc_snoop_set_config(u32 num, unsigned long base, int size); +int mxc_snoop_get_status(u32 num, u32 * statl, u32 * stath); + +struct platform_device; +void mxc_pg_enable(struct platform_device *pdev); +void mxc_pg_disable(struct platform_device *pdev); + +struct mxc_unifi_platform_data *get_unifi_plat_data(void); + +struct mxc_sim_platform_data { + unsigned int clk_rate; + char *clock_sim; + char *power_sim; + int (*init)(struct platform_device *pdev); + void (*exit)(void); + unsigned int detect; /* 1 have detect pin, 0 not */ +}; + +#endif /* __ASSEMBLY__ */ + +#define MUX_IO_P 29 +#define MUX_IO_I 24 +#define IOMUX_TO_GPIO(pin) ((((unsigned int)pin >> MUX_IO_P) * 32) + ((pin >> MUX_IO_I) & ((1 << (MUX_IO_P - MUX_IO_I)) -1))) +#define IOMUX_TO_IRQ(pin) (MXC_GPIO_IRQ_START + IOMUX_TO_GPIO(pin)) + +/* DMA driver defines */ +#define MXC_IDE_DMA_WATERMARK 32 /* DMA watermark level in bytes */ +#define MXC_IDE_DMA_BD_NR (512/3/4) /* Number of BDs per channel */ + +#ifndef IS_MEM_DEVICE_NONSHARED +/* all peripherals on MXC so far are below 0x80000000 but leave L2CC alone */ +#define IS_MEM_DEVICE_NONSHARED(x) ((x) < 0x80000000 && (x) != L2CC_BASE_ADDR) +#endif +/*! + * DPTC GP and LP ID + */ +#define DPTC_GP_ID 0 +#define DPTC_LP_ID 1 + +#ifndef __ASSEMBLY__ + +struct cpu_wp { + u32 pll_reg; + u32 pll_rate; + u32 cpu_rate; + u32 pdr0_reg; + u32 pdf; + u32 mfi; + u32 mfd; + u32 mfn; + u32 cpu_voltage; + u32 cpu_podf; +}; + +#ifndef CONFIG_ARCH_MX51 +struct cpu_wp *get_cpu_wp(int *wp); +#endif + +enum mxc_cpu_pwr_mode { + WAIT_CLOCKED, /* wfi only */ + WAIT_UNCLOCKED, /* WAIT */ + WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ + STOP_POWER_ON, /* just STOP */ + STOP_POWER_OFF, /* STOP + SRPG */ +}; + +void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode); +int tzic_enable_wake(int is_idle); +void gpio_activate_audio_ports(void); +void gpio_inactivate_audio_ports(void); +void gpio_activate_bt_audio_port(void); +void gpio_inactivate_bt_audio_port(void); +void gpio_activate_esai_ports(void); +void gpio_deactivate_esai_ports(void); + +#endif + #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) #define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) #define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/system.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/system.h @@ -1,7 +1,7 @@ /* * Copyright (C) 1999 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,10 +21,7 @@ #ifndef __ASM_ARCH_MXC_SYSTEM_H__ #define __ASM_ARCH_MXC_SYSTEM_H__ -static inline void arch_idle(void) -{ - cpu_do_idle(); -} +extern void arch_idle(void); void arch_reset(char mode, const char *cmd); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx35.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx35.h @@ -1,11 +1,56 @@ + +/*! + * Define this option to specify we are using the newer SDMA module. + */ +#define MXC_SDMA_V2 + /* * IRAM */ #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ +#define IRAM_BASE_ADDR MX35_IRAM_BASE_ADDR +#define IRAM_BASE_ADDR_VIRT 0xFC600000 #define MX35_IRAM_SIZE SZ_128K +#ifndef CONFIG_SDMA_IRAM +#define CONFIG_SDMA_IRAM_SIZE 0 +#endif +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define SND_RAM_SIZE 0x10000 +#else +#define SND_RAM_SIZE 0 +#endif + +#define SND_RAM_BASE_ADDR (MX35_IRAM_BASE_ADDR + CONFIG_SDMA_IRAM_SIZE) +#define MLB_IRAM_ADDR_OFFSET (CONFIG_SDMA_IRAM_SIZE + SND_RAM_SIZE) + #define MXC_FEC_BASE_ADDR 0x50038000 #define MX35_NFC_BASE_ADDR 0xBB000000 +#define NFC_BASE_ADDR MX35_NFC_BASE_ADDR +#define NFC_BASE_ADDR_VIRT 0xFC700000 +#define NFC_SIZE SZ_1M +#define NFC_IO_ADDRESS(x) (((x) - NFC_BASE_ADDR) + NFC_BASE_ADDR_VIRT) + + +#define MMC_SDHC1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B4000) +#define MMC_SDHC2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B8000) +#define MMC_SDHC3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000BC000) +#define CAN1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E4000) +#define CAN2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E8000) +#define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F0000) +#define OTG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) +#define MLB_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) +#define SPDIF_BASE_ADDR (SPBA0_BASE_ADDR + 0x00028000) +#define ATA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) +#define ASRC_BASE_ADDR (SPBA0_BASE_ADDR + 0x0002C000) +#define ESAI_BASE_ADDR (SPBA0_BASE_ADDR + 0x00034000) +#define RNGC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) + +#define SPBA_MSHC 0x24 +#define SPBA_SPDIR 0x28 +#define SPBA_ASRC 0x2C +#define SPBA_ESAI 0x34 +#define SPBA_FEC 0x38 /* * Interrupt numbers @@ -16,6 +61,8 @@ #define MXC_INT_MMC_SDHC3 9 #define MX35_INT_SSI1 11 #define MX35_INT_SSI2 12 +#define MXC_INT_SSI1 MX35_INT_SSI1 +#define MXC_INT_SSI2 MX35_INT_SSI2 #define MXC_INT_GPU2D 16 #define MXC_INT_ASRC 17 #define MXC_INT_USBHS 35 @@ -26,4 +73,84 @@ #define MXC_INT_MLB 46 #define MXC_INT_SPDIF 47 #define MXC_INT_FEC 57 +#define MXC_INT_RNGC MXC_INT_RNGA + +#define MXC_INT_FORCE MXC_INT_RESV1 + +/*! + * Defines for modules using static and dynamic DMA channels + */ +#define MXC_DMA_CHANNEL_IRAM 30 +#define MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC2 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC3 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_SSI1_TX (MXC_DMA_CHANNEL_IRAM + 1) +#else +#define MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL +#endif +#define MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SPDIF_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SPDIF_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCC_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCC_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ESAI_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ESAI_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_ESAI MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_ESAI MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCC_ESAI MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_SSI1_TX0 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_SSI1_TX1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_SSI2_TX0 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCA_SSI2_TX1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_SSI1_TX0 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_SSI1_TX1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_SSI2_TX0 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ASRCB_SSI2_TX1 MXC_DMA_DYNAMIC_CHANNEL + +#define DMA_REQ_ASRC_DMA6 41 +#define DMA_REQ_ASRC_DMA5 40 +#define DMA_REQ_ASRC_DMA4 39 +#define DMA_REQ_ASRC_DMA3 38 +#define DMA_REQ_ASRC_DMA2 37 +#define DMA_REQ_ASRC_DMA1 36 +#define DMA_REQ_RSVD3 35 +#define DMA_REQ_RSVD2 34 +#define DMA_REQ_ESAI_TX 33 +#define DMA_REQ_ESAI_RX 32 +#define DMA_REQ_IPU 21 +#define DMA_REQ_RSVD1 20 +#define DMA_REQ_SPDIF_TX 13 +#define DMA_REQ_SPDIF_RX 12 +#define DMA_REQ_UART3_TX 11 +#define DMA_REQ_UART3_RX 10 +#define DMA_REQ_MSHC 5 +#define DMA_REQ_DPTC 1 +#define DMA_REQ_DVFS 1 +/*! + * NFMS bit in RCSR register for pagesize of nandflash + */ +#define NFMS (*((volatile u32 *)IO_ADDRESS(CCM_BASE_ADDR+0x18))) +#define NFMS_BIT 8 +#define NFMS_NF_DWIDTH 14 +#define NFMS_NF_PG_SZ 8 --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/gpio.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/gpio.h @@ -33,9 +33,12 @@ struct mxc_gpio_port { void __iomem *base; int irq; + int irq_high; int virtual_irq_start; struct gpio_chip chip; u32 both_edges; + u32 suspend_wakeup; + u32 saved_wakeup; }; int mxc_gpio_init(struct mxc_gpio_port*, int); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/sdma.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/sdma.h @@ -0,0 +1,561 @@ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_SDMA_H__ +#define __ASM_ARCH_MXC_SDMA_H__ + +/*! + * @defgroup SDMA Smart Direct Memory Access (SDMA) Driver + */ + +/*! + * @file arch-mxc/sdma.h + * + * @brief This file contains the SDMA API declarations. + * + * SDMA is responsible on moving data between peripherals and memories (MCU, EMI and DSP). + * + * @ingroup SDMA + */ + +#include +#include +#include + +#include +#include + +/*! + * This defines maximum DMA address + */ +#define MAX_DMA_ADDRESS 0xffffffff + +/*! + * This defines maximum number of DMA channels + */ +#ifdef CONFIG_MXC_SDMA_API +#define MAX_DMA_CHANNELS 32 +#define MAX_BD_NUMBER 16 +#define MXC_SDMA_DEFAULT_PRIORITY 1 +#define MXC_SDMA_MIN_PRIORITY 1 +#define MXC_SDMA_MAX_PRIORITY 7 +#else +#define MAX_DMA_CHANNELS 0 +#endif + +#define MXC_FIFO_MEM_DEST_FIXED 0x1 +#define MXC_FIFO_MEM_SRC_FIXED 0x2 + +#define SDMA_ASRC_INFO_WML_OFF 0 +#define SDMA_ASRC_INFO_WML_MASK ((1 << 10) - 1) +#define SDMA_ASRC_INFO_PS (1 << 10) +#define SDMA_ASRC_INFO_PA (1 << 11) +#define SDMA_ASRC_INFO_TXFR_DIR (1 << 14) +#define SDMA_ASRC_INFO_N_OFF (24) +#define SDMA_ASRC_INFO_N_MASK ((1 << 4) - 1) + +#define SDMA_ASRC_P2P_INFO_LWML_OFF 0 +#define SDMA_ASRC_P2P_INFO_LWML_MASK ((1 << 8) - 1) +#define SDMA_ASRC_P2P_INFO_PS (1 << 8) +#define SDMA_ASRC_P2P_INFO_PA (1 << 9) +#define SDMA_ASRC_P2P_INFO_SPDIF (1 << 10) +#define SDMA_ASRC_P2P_INFO_SP (1 << 11) +#define SDMA_ASRC_P2P_INFO_DP (1 << 12) +#define SDMA_ASRC_P2P_INFO_HWML_OFF 14 +#define SDMA_ASRC_P2P_INFO_HWML_MASK ((1 << 10) - 1) +#define SDMA_ASRC_P2P_INFO_LWE (1 << 28) +#define SDMA_ASRC_P2P_INFO_HWE (1 << 29) +#define SDMA_ASRC_P2P_INFO_CONT (1 << 31) + +/*! + * This enumerates transfer types + */ +typedef enum { + emi_2_per = 0, /*!< EMI memory to peripheral */ + emi_2_int, /*!< EMI memory to internal RAM */ + emi_2_emi, /*!< EMI memory to EMI memory */ + emi_2_dsp, /*!< EMI memory to DSP memory */ + per_2_int, /*!< Peripheral to internal RAM */ + per_2_emi, /*!< Peripheral to internal EMI memory */ + per_2_dsp, /*!< Peripheral to DSP memory */ + per_2_per, /*!< Peripheral to Peripheral */ + int_2_per, /*!< Internal RAM to peripheral */ + int_2_int, /*!< Internal RAM to Internal RAM */ + int_2_emi, /*!< Internal RAM to EMI memory */ + int_2_dsp, /*!< Internal RAM to DSP memory */ + dsp_2_per, /*!< DSP memory to peripheral */ + dsp_2_int, /*!< DSP memory to internal RAM */ + dsp_2_emi, /*!< DSP memory to EMI memory */ + dsp_2_dsp, /*!< DSP memory to DSP memory */ + emi_2_dsp_loop, /*!< EMI memory to DSP memory loopback */ + dsp_2_emi_loop, /*!< DSP memory to EMI memory loopback */ + dvfs_pll, /*!< DVFS script with PLL change */ + dvfs_pdr /*!< DVFS script without PLL change */ +} sdma_transferT; + +/*! + * This enumerates peripheral types + */ +typedef enum { + SSI, /*!< MCU domain SSI */ + SSI_SP, /*!< Shared SSI */ + MMC, /*!< MMC */ + SDHC, /*!< SDHC */ + UART, /*!< MCU domain UART */ + UART_SP, /*!< Shared UART */ + FIRI, /*!< FIRI */ + CSPI, /*!< MCU domain CSPI */ + CSPI_SP, /*!< Shared CSPI */ + SIM, /*!< SIM */ + ATA, /*!< ATA */ + CCM, /*!< CCM */ + EXT, /*!< External peripheral */ + MSHC, /*!< Memory Stick Host Controller */ + MSHC_SP, /*!< Shared Memory Stick Host Controller */ + DSP, /*!< DSP */ + MEMORY, /*!< Memory */ + FIFO_MEMORY, /*!< FIFO type Memory */ + SPDIF, /*!< SPDIF */ + IPU_MEMORY, /*!< IPU Memory */ + ASRC, /*!< ASRC */ + ESAI, /*!< ESAI */ +} sdma_periphT; + +#ifndef TRANSFER_32BIT +/*! + * This defines SDMA access data size + */ +#define TRANSFER_32BIT 0x00 +#define TRANSFER_8BIT 0x01 +#define TRANSFER_16BIT 0x02 +#define TRANSFER_24BIT 0x03 + +#endif + +/*! + * This defines maximum device name length passed during mxc_request_dma(). + */ +#define MAX_DEVNAME_LENGTH 32 + +/*! + * This defines SDMA interrupt callback function prototype. + */ +typedef void (*dma_callback_t) (void *arg); + +/*! + * Structure containing sdma channel parameters. + */ +typedef struct { + __u32 watermark_level; /*!< Lower/upper threshold that + * triggers SDMA event + * for p2p, this is event1 watermark level + */ + __u32 per_address; /*!< Peripheral source/destination + * physical address + * for p2p, this is destination address + */ + sdma_periphT peripheral_type; /*!< Peripheral type */ + sdma_transferT transfer_type; /*!< Transfer type */ + int event_id; /*!< Event number, + * needed by all channels + * that started by peripherals dma + * request (per_2_*,*_2_per) + * Not used for memory and DSP + * transfers. + */ + int event_id2; /*!< Second event number, + * used in ATA scripts only. + */ + int bd_number; /*!< Buffer descriptors number. + * If not set, single buffer + * descriptor will be used. + */ + dma_callback_t callback; /*! callback function */ + void *arg; /*! callback argument */ + unsigned long word_size:8; /*!< SDMA data access word size */ + unsigned long ext:1; /*!< 1: extend parameter structure */ +} dma_channel_params; + +typedef struct { + dma_channel_params common; + unsigned long p2p_dir:1; /*!< 0: per2 to per. + * the device of peripheral_type is per. + * 1: per to per2 + * the device of peripheral_type is per2 + */ + unsigned long info_bits; /*!< info field in context */ + unsigned long info_mask; /*!< info field mask in context */ + __u32 watermark_level2; /*!< event2 threshold that + * triggers SDMA event + * just valid for p2p. + */ + __u32 per_address2; /*!< Peripheral source + * physical address. + * just valid for p2p. + */ + struct dma_channel_info info; /*!< the channel special parameter */ +} dma_channel_ext_params; + +/*! + * Structure containing sdma request parameters. + */ +typedef struct { + /*! physical source memory address */ + __u8 *sourceAddr; + /*! physical destination memory address */ + __u8 *destAddr; + /*! amount of data to transfer, + * updated during mxc_dma_get_config + */ + __u16 count; + /*!< DONE bit of the buffer descriptor, + * updated during mxc_dma_get_config + * 0 - means the BD is done and closed by SDMA + * 1 - means the BD is still being processed by SDMA + */ + int bd_done; + /*!< CONT bit of the buffer descriptor, + * set it if full multi-buffer descriptor mechanism + * required. + */ + int bd_cont; + /*!< ERROR bit of the buffer descriptor, + * updated during mxc_dma_get_config. + * If it is set - there was an error during BD processing. + */ + int bd_error; +} dma_request_t; + +/*! + * Structure containing sdma request parameters. + */ +typedef struct { + /*! address of ap_2_ap script */ + int mxc_sdma_ap_2_ap_addr; + /*! address of ap_2_bp script */ + int mxc_sdma_ap_2_bp_addr; + /*! address of ap_2_ap_fixed script */ + int mxc_sdma_ap_2_ap_fixed_addr; + /*! address of bp_2_ap script */ + int mxc_sdma_bp_2_ap_addr; + /*! address of loopback_on_dsp_side script */ + int mxc_sdma_loopback_on_dsp_side_addr; + /*! address of mcu_interrupt_only script */ + int mxc_sdma_mcu_interrupt_only_addr; + + /*! address of firi_2_per script */ + int mxc_sdma_firi_2_per_addr; + /*! address of firi_2_mcu script */ + int mxc_sdma_firi_2_mcu_addr; + /*! address of per_2_firi script */ + int mxc_sdma_per_2_firi_addr; + /*! address of mcu_2_firi script */ + int mxc_sdma_mcu_2_firi_addr; + + /*! address of uart_2_per script */ + int mxc_sdma_uart_2_per_addr; + /*! address of uart_2_mcu script */ + int mxc_sdma_uart_2_mcu_addr; + /*! address of per_2_app script */ + int mxc_sdma_per_2_app_addr; + /*! address of mcu_2_app script */ + int mxc_sdma_mcu_2_app_addr; + /*! address of per_2_per script */ + int mxc_sdma_per_2_per_addr; + + /*! address of uartsh_2_per script */ + int mxc_sdma_uartsh_2_per_addr; + /*! address of uartsh_2_mcu script */ + int mxc_sdma_uartsh_2_mcu_addr; + /*! address of per_2_shp script */ + int mxc_sdma_per_2_shp_addr; + /*! address of mcu_2_shp script */ + int mxc_sdma_mcu_2_shp_addr; + + /*! address of ata_2_mcu script */ + int mxc_sdma_ata_2_mcu_addr; + /*! address of mcu_2_ata script */ + int mxc_sdma_mcu_2_ata_addr; + + /*! address of app_2_per script */ + int mxc_sdma_app_2_per_addr; + /*! address of app_2_mcu script */ + int mxc_sdma_app_2_mcu_addr; + /*! address of shp_2_per script */ + int mxc_sdma_shp_2_per_addr; + /*! address of shp_2_mcu script */ + int mxc_sdma_shp_2_mcu_addr; + + /*! address of mshc_2_mcu script */ + int mxc_sdma_mshc_2_mcu_addr; + /*! address of mcu_2_mshc script */ + int mxc_sdma_mcu_2_mshc_addr; + + /*! address of spdif_2_mcu script */ + int mxc_sdma_spdif_2_mcu_addr; + /*! address of mcu_2_spdif script */ + int mxc_sdma_mcu_2_spdif_addr; + + /*! address of asrc_2_mcu script */ + int mxc_sdma_asrc_2_mcu_addr; + + /*! address of ext_mem_2_ipu script */ + int mxc_sdma_ext_mem_2_ipu_addr; + + /*! address of descrambler script */ + int mxc_sdma_descrambler_addr; + + /*! address of dptc_dvfs script */ + int mxc_sdma_dptc_dvfs_addr; + + int mxc_sdma_utra_addr; + + /*! address where ram code starts */ + int mxc_sdma_ram_code_start_addr; + /*! size of the ram code */ + int mxc_sdma_ram_code_size; + /*! RAM image address */ + unsigned short *mxc_sdma_start_addr; +} sdma_script_start_addrs; + +/*! Structure to store the initialized dma_channel parameters */ +typedef struct mxc_sdma_channel_params { + /*! Channel type (static channel number or dynamic channel) */ + unsigned int channel_num; + /*! Channel priority [0x1(lowest) - 0x7(highest)] */ + unsigned int chnl_priority; + /*! Channel params */ + dma_channel_params chnl_params; +} mxc_sdma_channel_params_t; + +/*! Structure to store the initialized dma_channel extend parameters */ +typedef struct mxc_sdma_channel_ext_params { + /*! Channel type (static channel number or dynamic channel) */ + unsigned int channel_num; + /*! Channel priority [0x1(lowest) - 0x7(highest)] */ + unsigned int chnl_priority; + /*! Channel extend params */ + dma_channel_ext_params chnl_ext_params; +} mxc_sdma_channel_ext_params_t; + +/*! Private SDMA data structure */ +typedef struct mxc_dma_channel_private { + /*! ID of the buffer that was processed */ + unsigned int buf_tail; + /*! Tasklet for the channel */ + struct tasklet_struct chnl_tasklet; + /*! Flag indicates if interrupt is required after every BD transfer */ + int intr_after_every_bd; +} mxc_dma_channel_private_t; + +/*! + * Setup channel according to parameters. + * Must be called once after mxc_request_dma() + * + * @param channel channel number + * @param p channel parameters pointer + * @return 0 on success, error code on fail + */ +int mxc_dma_setup_channel(int channel, dma_channel_params * p); + +/*! + * Setup the channel priority. This can be used to change the default priority + * for the channel. + * + * @param channel channel number + * @param priority priority to be set for the channel + * + * @return 0 on success, error code on failure + */ +int mxc_dma_set_channel_priority(unsigned int channel, unsigned int priority); + +/*! + * Allocates dma channel. + * If channel's value is 0, then the function allocates a free channel + * dynamically and sets its value to channel. + * Else allocates requested channel if it is free. + * If the channel is busy or no free channels (in dynamic allocation) -EBUSY returned. + * + * @param channel pointer to channel number + * @param devicename device name + * @return 0 on success, error code on fail + */ +int mxc_request_dma(int *channel, const char *devicename); + +/*! + * Configures request parameters. Can be called multiple times after + * mxc_request_dma() and mxc_dma_setup_channel(). + * + * + * @param channel channel number + * @param p request parameters pointer + * @param bd_index index of buffer descriptor to set + * @return 0 on success, error code on fail + */ +/* int mxc_dma_set_config(int channel, dma_request_t *p, int bd_index); */ +int mxc_dma_set_config(int channel, dma_request_t * p, int bd_index); + +/*! + * Returns request parameters. + * + * @param channel channel number + * @param p request parameters pointer + * @param bd_index index of buffer descriptor to get + * @return 0 on success, error code on fail + */ +/* int mxc_dma_get_config(int channel, dma_request_t *p, int bd_index); */ +int mxc_dma_get_config(int channel, dma_request_t * p, int bd_index); + +/*! + * This function is used by MXC IPC's write_ex2. It passes the a pointer to the + * data control structure to iapi_write_ipcv2() + * + * @param channel SDMA channel number + * @param ctrl_ptr Data Control structure pointer + */ +int mxc_sdma_write_ipcv2(int channel, void *ctrl_ptr); + +/*! + * This function is used by MXC IPC's read_ex2. It passes the a pointer to the + * data control structure to iapi_read_ipcv2() + * + * @param channel SDMA channel number + * @param ctrl_ptr Data Control structure pointer + */ +int mxc_sdma_read_ipcv2(int channel, void *ctrl_ptr); + +/*! + * Starts dma channel. + * + * @param channel channel number + */ +int mxc_dma_start(int channel); + +/*! + * Stops dma channel. + * + * @param channel channel number + */ +int mxc_dma_stop(int channel); + +/*! + * Frees dma channel. + * + * @param channel channel number + */ +void mxc_free_dma(int channel); + +/*! + * Sets callback function. Used with standard dma api + * for supporting interrupts + * + * @param channel channel number + * @param callback callback function pointer + * @param arg argument for callback function + */ +void mxc_dma_set_callback(int channel, dma_callback_t callback, void *arg); + +/*! + * Allocates uncachable buffer. Uses hash table. + * + * @param size size of allocated buffer + * @return pointer to buffer + */ +void *sdma_malloc(size_t size); + +#ifdef CONFIG_SDMA_IRAM +/*! + * Allocates uncachable buffer from IRAM.. + * + * @param size size of allocated buffer + * @return pointer to buffer + */ +void *sdma_iram_malloc(size_t size); +#endif /*CONFIG_SDMA_IRAM */ + +/*! + * Frees uncachable buffer. Uses hash table. + */ +void sdma_free(void *buf); + +/*! + * Converts virtual to physical address. Uses hash table. + * + * @param buf virtual address pointer + * @return physical address value + */ +unsigned long sdma_virt_to_phys(void *buf); + +/*! + * Converts physical to virtual address. Uses hash table. + * + * @param buf physical address value + * @return virtual address pointer + */ +void *sdma_phys_to_virt(unsigned long buf); + +/*! + * Configures the BD_INTR bit on a buffer descriptor parameters. + * + * + * @param channel channel number + * @param bd_index index of buffer descriptor to set + * @param bd_intr flag to set or clear the BD_INTR bit + */ +void mxc_dma_set_bd_intr(int channel, int bd_index, int bd_intr); + +/*! + * Gets the BD_INTR bit on a buffer descriptor. + * + * + * @param channel channel number + * @param bd_index index of buffer descriptor to set + * + * @return returns the BD_INTR bit status + */ +int mxc_dma_get_bd_intr(int channel, int bd_index); + +/*! + * Stop the current transfer + * + * @param channel channel number + * @param buffer_number number of buffers (beginning with 0), + * whose done bits should be reset to 0 + */ +int mxc_dma_reset(int channel, int buffer_number); + +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id); + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t * chnl); + +/*! + * Initializes SDMA driver + */ +int __init sdma_init(void); + +#define DEFAULT_ERR 1 + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/common.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/common.h @@ -16,16 +16,26 @@ extern void mx1_map_io(void); extern void mx21_map_io(void); +extern void mx25_map_io(void); extern void mx27_map_io(void); extern void mx31_map_io(void); extern void mx35_map_io(void); +extern void mx37_map_io(void); +extern void mx51_map_io(void); extern void mxc_init_irq(void); -extern void mxc_timer_init(struct clk *timer_clk); +extern void mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq); extern int mx1_clocks_init(unsigned long fref); extern int mx21_clocks_init(unsigned long lref, unsigned long fref); +extern int mx25_clocks_init(unsigned long fref); extern int mx27_clocks_init(unsigned long fref); extern int mx31_clocks_init(unsigned long fref); extern int mx35_clocks_init(void); +extern int mx37_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); +extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2); +extern int mxc_init_devices(void); +extern void mxc_cpu_init(void) __init; +extern void mxc_cpu_common_init(void); +extern void __init early_console_setup(char *); extern int mxc_register_gpios(void); extern int mxc_register_device(struct platform_device *pdev, void *data); extern void mxc_set_cpu_type(unsigned int type); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h @@ -0,0 +1,40 @@ +/* + * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * USB Gadget side, platform-specific functionality. + */ + +#include + +/* Needed for i2c/serial transceivers */ +static inline void +fsl_platform_set_device_mode(struct fsl_usb2_platform_data *pdata) +{ + if (pdata->xcvr_ops && pdata->xcvr_ops->set_device) + pdata->xcvr_ops->set_device(); +} + +static inline void +fsl_platform_pullup_enable(struct fsl_usb2_platform_data *pdata) +{ + if (pdata->xcvr_ops && pdata->xcvr_ops->pullup) + pdata->xcvr_ops->pullup(1); +} + +static inline void +fsl_platform_pullup_disable(struct fsl_usb2_platform_data *pdata) +{ + if (pdata->xcvr_ops && pdata->xcvr_ops->pullup) + pdata->xcvr_ops->pullup(0); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/audio_controls.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/audio_controls.h @@ -0,0 +1,220 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + /*! + * @file include/asm-arm/arch-mxc/audio_controls.h + * @brief this file implements the mxc sound driver interface to OSS framework + * @ingroup SOUND_DRV + */ +#ifndef __ASM_ARCH_MXC_AUDIO_CONTROLS_H__ +#define __ASM_ARCH_MXC_AUDIO_CONTROLS_H__ + +/*! + * This ioctl can be used to get the adder configuration, use the audio control + * SNDCTL_MC13783_READ_OUT_MIXER.\n + * Possible returned values are : + * @see MC13783_AUDIO_ADDER_STEREO + * @see MC13783_AUDIO_ADDER_STEREO_OPPOSITE + * @see MC13783_AUDIO_ADDER_MONO + * @see MC13783_AUDIO_ADDER_MONO_OPPOSITE + * + */ +#define SNDCTL_MC13783_READ_OUT_ADDER _SIOR('Z', 6, int) + +/*! + * To set the adder configuration, use the audio control + * SNDCTL_MC13783_WRITE_OUT_MIXER. Possible arguments are : \n + * @see MC13783_AUDIO_ADDER_STEREO + * @see MC13783_AUDIO_ADDER_STEREO_OPPOSITE + * @see MC13783_AUDIO_ADDER_MONO + * @see MC13783_AUDIO_ADDER_MONO_OPPOSITE + * + */ +#define SNDCTL_MC13783_WRITE_OUT_ADDER _SIOWR('Z', 7, int) + +/*! + * To get the codec balance configuration, use the audio control + * SNDCTL_MC13783_READ_OUT_BALANCE.\n + * Range is 0 (-21 dB left) to 100 (-21 dB right), linear, 3dB step ; + * 50 is no balance. + * \n Examples: + * \n 0 : -21dB left 50 : balance deactivated 100 : -21 dB right + * + */ +#define SNDCTL_MC13783_READ_OUT_BALANCE _SIOR('Z', 8, int) + +/*! + * To set the codec balance configuration, use the audio control + * SNDCTL_MC13783_WRITE_OUT_BALANCE.\n + * Range is 0 (-21 dB left) to 100 (-21 dB right), linear, 3dB step ; + * 50 is no balance. + * \n Examples: + * \n 0 : -21dB left 50 : balance deactivated 100 : -21 dB right + * + */ +#define SNDCTL_MC13783_WRITE_OUT_BALANCE _SIOWR('Z', 9, int) + +/*! + * To set the codec filter configuration, use the audio control + * SNDCTL_MC13783_WRITE_CODEC_FILTER. + * The new configuration replaces the old one.\n + * Possible arguments are : + * @see MC13783_CODEC_FILTER_DISABLE + * @see MC13783_CODEC_FILTER_HIGH_PASS_IN + * @see MC13783_CODEC_FILTER_HIGH_PASS_OUT + * @see MC13783_CODEC_FILTER_DITHERING \n + * + */ +#define SNDCTL_MC13783_WRITE_CODEC_FILTER _SIOWR('Z', 20, int) + +/*! + * To get the codec filter configuration, use the audio control : + * SNDCTL_MC13783_READ_CODEC_FILTER. + * The new configuration replaces the old one.\n + * Possible returned values are : + * @see MC13783_CODEC_FILTER_DISABLE + * @see MC13783_CODEC_FILTER_HIGH_PASS_IN + * @see MC13783_CODEC_FILTER_HIGH_PASS_OUT + * @see MC13783_CODEC_FILTER_DITHERING \n + * + */ +#define SNDCTL_MC13783_READ_CODEC_FILTER _SIOR('Z', 21, int) + +/* + * To set the clock configuration, use the audio control + * SNDCTL_MC13783_WRITE_MASTER_CLOCK. \n + * Possible arguments are : \n + * 1 : to MCU master \n + * 2 : to MC13783 master + */ +#define SNDCTL_MC13783_WRITE_MASTER_CLOCK _SIOR('Z', 30, int) + +/*! + * To set the output port, use the audio control + * SNDCTL_MC13783_WRITE_PORT.\n + * Possible returned values are : + * \n 1 : to port 4 + * \n 2 : to port 5 + * Possible returned values are : + * \n 1 : port 4 + * \n 2 : port 5 + */ +#define SNDCTL_MC13783_WRITE_PORT _SIOR('Z', 31, int) + +/*! + * Argument for the mc13783 adder configuration + * @see SNDCTL_MC13783_WRITE_OUT_ADDER + * @see SNDCTL_MC13783_READ_OUT_ADDER + */ +#define MC13783_AUDIO_ADDER_STEREO 0x1 +/*! + * Argument for the mc13783 adder configuration + * @see SNDCTL_MC13783_WRITE_OUT_ADDER + * @see SNDCTL_MC13783_READ_OUT_ADDER + */ +#define MC13783_AUDIO_ADDER_STEREO_OPPOSITE 0x2 +/*! + * Argument for the mc13783 adder configuration + * @see SNDCTL_MC13783_WRITE_OUT_ADDER + * @see SNDCTL_MC13783_READ_OUT_ADDER + */ +#define MC13783_AUDIO_ADDER_MONO 0x4 +/*! + * Argument for the mc13783 adder configuration + * @see SNDCTL_MC13783_WRITE_OUT_ADDER + * @see SNDCTL_MC13783_READ_OUT_ADDER + */ +#define MC13783_AUDIO_ADDER_MONO_OPPOSITE 0x8 + +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_DISABLE 0x0 +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_HIGH_PASS_IN 0x1 +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_HIGH_PASS_OUT 0x2 +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_DITHERING 0x4 + +/*! + * Argument for the system audio clocking selection + * @see MXC_AUDIO_CLOCKING_MCU_MASTER + * @see SNDCTL_CLK_SET_MASTER + */ +#define MXC_AUDIO_CLOCKING_MC13783_MASTER 0x0 + +/*! + * Argument for the system audio clocking selection + * @see MXC_AUDIO_CLOCKING_MC13783_MASTER + * @see SNDCTL_CLK_SET_MASTER + */ +#define MXC_AUDIO_CLOCKING_MCU_MASTER 0x1 + +/*! + * Argument for the DAM output port selection + * @see SNDCTL_DAM_SET_OUT_PORT + * @see MXC_DAM_OUT_PORT_AD2 + */ +#define MXC_DAM_OUT_PORT_AD1 0x0 + +/*! + * Argument for the DAM output port selection + * @see SNDCTL_DAM_SET_OUT_PORT + * @see MXC_DAM_OUT_PORT_AD1 + */ +#define MXC_DAM_OUT_PORT_AD2 0x1 + +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_DISABLE 0x0 + +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_HIGH_PASS_IN 0x1 + +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_HIGH_PASS_OUT 0x2 + +/*! + * Argument for the mc13783 codec filter configuration + * @see SNDCTL_MC13783_WRITE_CODEC_FILTER + * @see SNDCTL_MC13783_READ_CODEC_FILTER + */ +#define MC13783_CODEC_FILTER_DITHERING 0x4 + +#endif /* __ASM_ARCH_MXC_AUDIO_CONTROLS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/memory.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/memory.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -11,6 +11,9 @@ #ifndef __ASM_ARCH_MXC_MEMORY_H__ #define __ASM_ARCH_MXC_MEMORY_H__ +#include +#include + #if defined CONFIG_ARCH_MX1 #define PHYS_OFFSET UL(0x08000000) #elif defined CONFIG_ARCH_MX2 @@ -24,6 +27,19 @@ #define PHYS_OFFSET UL(0x80000000) #endif +#ifdef CONFIG_ARCH_MX51 +#define PHYS_OFFSET UL(0x90000000) +#endif + +#ifdef CONFIG_ARCH_MX37 +#define PHYS_OFFSET UL(0x40000000) +#endif + +#ifndef PHYS_OFFSET +#define PHYS_OFFSET UL(0x80000000) +#endif + +/* Size of contiguous memory for DMA and other h/w blocks */ #if defined(CONFIG_MX1_VIDEO) /* * Increase size of DMA-consistent memory region. @@ -40,4 +56,35 @@ #define CONSISTENT_DMA_SIZE SZ_8M #endif /* CONFIG_MX3_VIDEO */ +#ifdef CONFIG_ARCH_MX51 +#define CONSISTENT_DMA_SIZE (64 * SZ_1M) +#else +#define CONSISTENT_DMA_SIZE (32 * SZ_1M) +#endif + +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_DMA_ZONE_SIZE +#define MXC_DMA_ZONE_SIZE ((CONFIG_DMA_ZONE_SIZE * SZ_1M) >> PAGE_SHIFT) +#else +#define MXC_DMA_ZONE_SIZE ((12 * SZ_1M) >> PAGE_SHIFT) +#endif + +static inline void __arch_adjust_zones(int node, unsigned long *zone_size, + unsigned long *zhole_size) +{ + if (node != 0) + return; + /* Create separate zone to reserve memory for DMA */ + zone_size[1] = zone_size[0] - MXC_DMA_ZONE_SIZE; + zone_size[0] = MXC_DMA_ZONE_SIZE; + zhole_size[1] = zhole_size[0]; + zhole_size[0] = 0; +} + +#define arch_adjust_zones(node, size, holes) \ + __arch_adjust_zones(node, size, holes) + +#endif + #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx3x.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx3x.h @@ -8,8 +8,8 @@ * published by the Free Software Foundation. */ -#ifndef __ASM_ARCH_MXC_MX31_H__ -#define __ASM_ARCH_MXC_MX31_H__ +#ifndef __ASM_ARCH_MXC_MX3X_H__ +#define __ASM_ARCH_MXC_MX3X_H__ #ifndef __ASM_ARCH_MXC_HARDWARE_H__ #error "Do not include directly." @@ -99,6 +99,11 @@ #define MSHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) #define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) +#define SPBA_UART3 0x0C +#define SPBA_CSPI2 0x10 +#define SPBA_SSI2 0x14 +#define SPBA_ATA 0x20 + /* * AIPS 2 */ @@ -118,7 +123,7 @@ #define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) #define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) #define RTC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) -#define WDOG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) +#define WDOG1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) #define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) #define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) @@ -168,6 +173,7 @@ ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\ ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\ ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ + ((x >= NFC_BASE_ADDR) && (x < (NFC_BASE_ADDR + NFC_SIZE))) ? NFC_IO_ADDRESS(x):\ 0xDEADBEEF) /* @@ -204,8 +210,38 @@ (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) /* + * DMA request assignments + */ +#define DMA_REQ_ECT 31 +#define DMA_REQ_NFC 30 +#define DMA_REQ_SSI1_TX1 29 +#define DMA_REQ_SSI1_RX1 28 +#define DMA_REQ_SSI1_TX2 27 +#define DMA_REQ_SSI1_RX2 26 +#define DMA_REQ_SSI2_TX1 25 +#define DMA_REQ_SSI2_RX1 24 +#define DMA_REQ_SSI2_TX2 23 +#define DMA_REQ_SSI2_RX2 22 +#define DMA_REQ_UART1_TX 19 +#define DMA_REQ_UART1_RX 18 +#define DMA_REQ_UART2_TX 17 +#define DMA_REQ_UART2_RX 16 +#define DMA_REQ_EXTREQ1 15 +#define DMA_REQ_EXTREQ2 14 +#define DMA_REQ_CSPI1_TX 9 +#define DMA_REQ_CSPI1_RX 8 +#define DMA_REQ_CSPI2_TX 7 +#define DMA_REQ_CSPI2_RX 6 +#define DMA_REQ_ATA_RX 4 +#define DMA_REQ_ATA_TX 3 +#define DMA_REQ_ATA_TX_END 2 +#define DMA_REQ_CCM 1 +#define DMA_REQ_EXTREQ0 0 + +/* * Interrupt numbers */ +#define MXC_INT_RESV1 1 #define MXC_INT_I2C3 3 #define MXC_INT_I2C2 4 #define MXC_INT_RTIC 6 @@ -224,6 +260,7 @@ #define MXC_INT_EPIT1 28 #define MXC_INT_GPT 29 #define MXC_INT_POWER_FAIL 30 +#define MXC_INT_DVFS 31 #define MXC_INT_UART2 32 #define MXC_INT_NANDFC 33 #define MXC_INT_SDMA 34 @@ -245,6 +282,8 @@ #define MXC_INT_EXT_WDOG 62 #define MXC_INT_EXT_TV 63 +#define ARM11_PMU_IRQ MXC_INT_EVTMON + #define PROD_SIGNATURE 0x1 /* For MX31 */ /* silicon revisions specific to i.MX31 */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_pm.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_pm.h @@ -0,0 +1,252 @@ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup LPMD Low-Level Power Management Driver + */ + +/*! + * @file arch-mxc/mxc_pm.h + * + * @brief This file contains the chip level configuration details and + * public API declarations for CRM_AP module + * + * @ingroup LPMD + */ + +#ifndef __ASM_ARCH_MXC_PM_H__ +#define __ASM_ARCH_MXC_PM_H__ + +#define WAIT_MODE 111 +#define DOZE_MODE 112 +#define STOP_MODE 113 +#define DSM_MODE 114 +/* + * MXC91231 Break-Point Frequency below which is low frequency and + * above which is high frequency + */ +#define BREAKPT_FREQ ((long)(400000000)) + +#define GATE_STOP_WAIT 9 +#define GATE_STOP 10 + +/* + * Used for MHz conversion + */ +#define MEGA_HERTZ 1000000 + +/* + * If invalid frequency value other than the following + * CORE_133 - ARM desired to run @133MHz, LoV (1.2V) + * CORE_266 - ARM desired to run @266MHz, LoV (1.2V) + * CORE_399 - ARM desired to run @399MHz, LoV (1.2V) + * CORE_532 - ARM desired to run @133MHz, HiV (1.6V) + * are passed then this error is returned, + */ +#define ERR_FREQ_INVALID 1 + +/* + * For MXC91231 Pass1, Integer DVFS greater than 133MHz is not allowed + * due to the hardware issue + */ +#define INTEGER_DVFS_NOT_ALLOW 1 + +/* + * If PLL freq is less than desired ARM frequency during Integer + * DVFS, then return this error + */ +#define PLL_LESS_ARM_ERR 2 + +/* + * Frequency change within the same-lo voltage is not approved. + * Inorder to do Integer DFS, move to the high voltage range and + * then set LFDF and move to the low voltage range + */ +#define INT_DFS_LOW_NOT_ALLOW 3 + +/* + * If the desired AHB or IPG exceeds 133MHz or 66.5MHz respectively, + * then return this error + */ +#define AHB_IPG_EXCEED_LIMIT 4 + +/* + * If the desired ARM frequency is too low to get by PLL scaling + * and the mxc_pm_pllscale API is called, return this error: + */ +#define PLL_DVFS_FREQ_TOO_LOW 5 + +/* + * Invalid frequencies requested + */ +#define MXC_PM_INVALID_PARAM 6 + +/* + * If AHB and/or IPG frequencies are greater than maximum allowed + */ +#define FREQ_OUT_OF_RANGE 2 + +/* + * If AHB and/or IPG frequencies are other than 100 or 50Mhz + */ +#define BUS_FREQ_INVALID 2 + +/* + * If MAX_PDF is greater than max value (8) then return this error + */ +#define AHB_MAX_DIV_ERR 3 + +/* + * If IPG_PDF is greater than max value (2) then return this error + */ +#define IPG_MAX_DIV_ERR 4 + +/* + * If ARM freq is out of range i.e., less than 133 or greater than + * 399 then return this error + */ +#define INVALID_ARM_FREQ 5 + +/* + * This file includes all platform APIs. Some of the APIs are not + * appicable to some platforms. So, this error is used to indicate + * that a particular API is not available + */ +#define MXC_PM_API_NOT_SUPPORTED 6 + +/* + * Error when frequency scaling is attempted while switch between MPLL and + * TPLL is in progress on MXC91321 + */ +#define ERR_DFSP_SWITCH 2 + +/*! + * Additional define for stop mode + */ +#define PM_SUSPEND_STOP ((__force suspend_state_t) 2) + +/*! + * CKOH pins configuration + */ +#define CKOH_AP_SEL 1 +#define CKOH_AHB_SEL 2 +#define CKOH_IP_SEL 3 + +/*! + * Defines for Stop and DSM mode acknowledgements + */ +#define MXC_PM_LOWPWR_ACK_SDMA 0x01 +#define MXC_PM_LOWPWR_ACK_IPU 0x02 +#define MXC_PM_LOWPWR_ACK_MAX 0x04 +#define MXC_PM_LOWPWR_ACK_MQSPI 0x08 +#define MXC_PM_LOWPWR_ACK_USB 0x10 +#define MXC_PM_LOWPWR_ACK_RTIC 0x20 + +/* + * PMIC configuration + */ +#define MXC_PMIC_1_2_VOLT 0xC +#define MXC_PMIC_1_6_VOLT 0x1C +#define MXC_PMIC_1_0_VOLT 0x4 +#if defined(CONFIG_ARCH_MXC91321) || defined(CONFIG_ARCH_MXC91231) +#define MXC_PMIC_DVS_SPEED 0x1 +#else +#define MXC_PMIC_DVS_SPEED 0x3 +#endif + +/*! + * Implementing Level 1 CRM Gate Control. Level 2 gate control + * is provided at module level using LPMD registers + * + * @param group The desired clock gate control register bits. + * Possible values are 0 through 6 + * @param opt The desired option requesting clock to run during stop + * and wait modes or just during the stop mode. Possible + * values are GATE_STOP_WAIT and GATE_STOP. + * + */ +void mxc_pm_clockgate(int group, int opt); + +/*! + * Implementing steps required to transition to low-power modes + * + * @param mode The desired low-power mode. Possible values are, + * WAIT_MODE, STOP_MODE or DSM_MODE + * + */ +void mxc_pm_lowpower(int mode); + +/*! + * Enables acknowledgement from module when entering stop or DSM mode. + * + * @param ack The desired module acknowledgement to enable. + * + */ +void mxc_pm_lp_ack_enable(int ack); + +/*! + * Disables acknowledgement from module when entering stop or DSM mode. + * + * @param ack The desired module acknowledgement to disable. + * + */ +void mxc_pm_lp_ack_disable(int ack); + +/*! + * Implementing steps required to set Integer Scaling + * + * @param armfreq The desired ARM frequency. AHB and IP + * frequency are changed depending on ARM + * frequency and the divider values. + * @param ahbfreq The desired AHB frequency + * @param ipfreq The desired IP frequency + * + * @return Returns 0 on success or + * Returns -PLL_LESS_ARM_ERR if pllfreq is less than + * desired core freq + */ +int mxc_pm_intscale(long armfreq, long ahbfreq, long ipfreq); + +/*! + * To calculate MFI, MFN, MFD values. Using this the output frequency + * whose value is calculated using, + * 2 * REF_FREQ * (MF / PDF), where + * REF_FREQ is 26 Mhz + * MF = MFI + (MFN + MFD) + * PDF is assumed to be 1 + * + * @param armfreq The desired ARM frequency + * @param ahbfreq The desired AHB frequency + * @param ipfreq The desired IP frequency + * + * @return Returns 0 on success or + * Returns -1 on error + */ +int mxc_pm_pllscale(long armfreq, long ahbfreq, long ipfreq); + +/*! + * To change AP core frequency and/or voltage suitably + * + * @param armfreq The desired ARM frequency + * @param ahbfreq The desired AHB frequency + * @param ipfreq The desired IP frequency + * + * @return Returns -ERR_FREQ_INVALID on failure + * Returns 0 on success + */ +int mxc_pm_dvfs(unsigned long armfreq, long ahbfreq, long ipfreq); + +extern void mxc_pm_arch_entry(void *entry, u32 size); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/sdram_autogating.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/sdram_autogating.h @@ -0,0 +1,56 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup DVFS Dynamic Voltage and Frequency Scaling (DVFS) Driver + */ + +/*! + * @file arch-mxc/sdram_autogating.h + * + * @brief This file contains the SDRAM autogating function prototypes + * + * + * @ingroup PM + */ + +#ifndef __ASM_ARCH_SDRAM_AUTOGATING_H__ +#define __ASM_ARCH_SDRAM_AUTOGATING_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include + + +#ifdef CONFIG_ARCH_MX51 +extern void start_sdram_autogating(void); +extern void stop_sdram_autogating(void); +extern int sdram_autogating_active(void); +#else +static inline void start_sdram_autogating(void) +{} + +static inline void stop_sdram_autogating(void) +{} + +static inline int sdram_autogating_active(void) +{ + return 0; +} +#endif + +#endif /*__KERNEL__ */ +#endif /* __ASM_ARCH_MXC_DVFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mtd-xip.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mtd-xip.h @@ -4,6 +4,7 @@ * Do not include this file directly. It's included from linux/mtd/xip.h * * Copyright (C) 2008 Darius Augulis , Teltonika, Inc. + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -11,12 +12,14 @@ * */ +#include +#include +#include #include #ifndef __ARCH_IMX_MTD_XIP_H__ #define __ARCH_IMX_MTD_XIP_H__ -#ifdef CONFIG_ARCH_MX1 /* AITC registers */ #define AITC_BASE IO_ADDRESS(AVIC_BASE_ADDR) #define NIPNDH (AITC_BASE + 0x58) @@ -26,9 +29,34 @@ /* MTD macros */ #define xip_irqpending() ((__raw_readl(INTENABLEH) & __raw_readl(NIPNDH)) \ || (__raw_readl(INTENABLEL) & __raw_readl(NIPNDL))) +#ifdef CONFIG_ARCH_MX1 #define xip_currtime() (__raw_readl(TIMER_BASE + MXC_TCN)) #define xip_elapsed_since(x) (signed)((__raw_readl(TIMER_BASE + MXC_TCN) - (x)) / 96) #define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (0)) +#else + +extern struct clocksource *mtd_xip_clksrc; + +#define xip_currtime() (unsigned long)clocksource_read(mtd_xip_clksrc) + +#if CLOCK_TICK_RATE > 1000000 +#define NUMERATOR 1 +#define DENOMINATOR (CLOCK_TICK_RATE/1000000 + 1) +#else +#define NUMERATOR (1000000/CLOCK_TICK_RATE) +#define DENOMINATOR 1 +#endif + +static inline unsigned long xip_elapsed_since(unsigned long x) +{ + return (((xip_currtime() - x) * NUMERATOR) / DENOMINATOR); +} + +/* + * Wait For Interrupt command for XIP kernel to put CPU in Idle mode + */ +#define xip_cpu_idle() arch_idle() + #endif /* CONFIG_ARCH_MX1 */ #endif /* __ARCH_IMX_MTD_XIP_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/pcmcia.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/pcmcia.h @@ -0,0 +1,218 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_PCMCIA_H__ +#define __ASM_ARCH_MXC_PCMCIA_H__ + +#include + +#define WINDOW_SIZE 0x1000000 /* The size of a window: 16M */ +#define PCMCIA_WINDOWS 5 /* How many windows / socket */ +#define SOCKET_NO 1 /* How many sockets */ + +#define ATTRIBUTE_MEMORY_WINDOW 0 +#define IO_WINDOW 1 +#define COMMON_MEMORY_WINDOW 2 + +/* + * PCMCIA socket + */ +#define PCMCIAPrtSp WINDOW_SIZE /* PCMCIA window size */ +#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ +#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ +#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ +#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ + +#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ +#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ +#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ +#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ + +#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ + (PCMCIA_MEM_BASE_ADDR + (Nb) * PCMCIASp) + +#define _PCMCIAAttr(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ + +#define _PCMCIAIO(Nb) /* PCMCIA Attribute [0..1] */ \ + (_PCMCIA (Nb) + (IO_WINDOW) * PCMCIAPrtSp) +#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ + (_PCMCIA (Nb) + (COMMON_MEMORY_WINDOW) * PCMCIAPrtSp) + +#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ +#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ +#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ +#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ + +/* + * Module: PCMCIA, Addr Range: 0xB8004000 - 0xB8004FFF, Size: 4 Kbyte + */ +#define PCMCIA_BASE_ADDR (PCMCIA_CTL_BASE_ADDR) /* PCMCIA Base Address */ +#define PCMCIA_IO_ADDR(x) (* (volatile u32 *)PCMCIA_IO_ADDRESS(x)) + +#define _reg_PCMCIA_PIPR PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x00) /* PCMCIA input pins register */ +#define _reg_PCMCIA_PSCR PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x04) /* PCMCIA Status Changed Register */ +#define _reg_PCMCIA_PER PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x08) /* PCMCIA Enable Register */ + +/* win: 0-4 */ +#define _reg_PCMCIA_PBR(win) PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x0C + 4 * (win)) /* PCMCIA Base Register x */ +#define _reg_PCMCIA_POR(win) PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x28 + 4 * (win)) /* PCMCIA Option Register x */ +#define _reg_PCMCIA_POFR(win) PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x44 + 4 * (win)) /* PCMCIA Offset Register x */ + +#define _reg_PCMCIA_PGCR PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x60) /* PCMCIA General Control Register */ +#define _reg_PCMCIA_PGSR PCMCIA_IO_ADDR(PCMCIA_BASE_ADDR + 0x64) /* PCMCIA General Status Register */ + +/* PCMCIA_PIPR - PCMCIA Input Pins Register - fields */ +#define PCMCIA_PIPR_POWERON (1 << 8) /* card indicates "power on" */ +#define PCMCIA_PIPR_RDY (1 << 7) /* card is ready */ +#define PCMCIA_PIPR_BVD2 (1 << 6) /* battery voltage 2/SPKR in */ +#define PCMCIA_PIPR_BVD1 (1 << 5) /* battery voltage 1/STSCHG */ +#define PCMCIA_PIPR_CD (3 << 3) /* card detect 1 and 2 */ +#define PCMCIA_PIPR_WP (1 << 2) /* write protect switch enabled */ +#define PCMCIA_PIPR_VS (3 << 0) /* voltage sense bits */ +#define PCMCIA_PIPR_VS_5V (1 << 0) /* 5v */ + +/* PCMCIA_PSCR - PCMCIA Status Change Register - fields */ +#define PCMCIA_PSCR_POWC (1 << 11) /* */ +#define PCMCIA_PSCR_RDYR (1 << 10) /* */ +#define PCMCIA_PSCR_RDYF (1 << 9) /* */ +#define PCMCIA_PSCR_RDYH (1 << 8) /* */ +#define PCMCIA_PSCR_RDYL (1 << 7) /* */ +#define PCMCIA_PSCR_BVDC2 (1 << 6) /* */ +#define PCMCIA_PSCR_BVDC1 (1 << 5) /* */ +#define PCMCIA_PSCR_CDC2 (1 << 4) /* */ +#define PCMCIA_PSCR_CDC1 (1 << 3) /* */ +#define PCMCIA_PSCR_WPC (1 << 2) /* */ +#define PCMCIA_PSCR_VSC2 (1 << 1) /* */ +#define PCMCIA_PSCR_VSC1 (1 << 0) /* */ + +/* PCMCIA_PER - PCMCIA Enable Register - fields */ +#define PCMCIA_PER_ERRINTEN (1 << 12) /* error interrupt enable */ +#define PCMCIA_PER_POWERONEN (1 << 11) /* power on interrupt enable */ +#define PCMCIA_PER_RDYRE (1 << 10) /* RDY/nIREQ pin rising edge */ +#define PCMCIA_PER_RDYFE (1 << 9) /* RDY/nIREQ pin falling edge */ +#define PCMCIA_PER_RDYHE (1 << 8) /* RDY/nIREQ pin high */ +#define PCMCIA_PER_RDYLE (1 << 7) /* RDY/nIREQ pin low */ +#define PCMCIA_PER_BVDE2 (1 << 6) /* battery voltage 2/SPKR in */ +#define PCMCIA_PER_BVDE1 (1 << 5) /* battery voltage 1/STSCHG */ +#define PCMCIA_PER_CDE2 (1 << 4) /* card detect 2 */ +#define PCMCIA_PER_CDE1 (1 << 3) /* card detect 1 */ +#define PCMCIA_PER_WPE (1 << 2) /* write protect */ +#define PCMCIA_PER_VSE2 (1 << 1) /* voltage sense 2 */ +#define PCMCIA_PER_VSE1 (1 << 0) /* voltage sense 1 */ + +/* PCMCIA_POR[0-4] - PCMCIA Option Registers 0-4 - fields */ +#define PCMCIA_POR_PV (1 << 29) /* set iff bank is valid */ +#define PCMCIA_POR_WPEN (1 << 28) /* write protect (WP) input signal is enabled */ +#define PCMCIA_POR_WP (1 << 27) /* write protected */ + +#define PCMCIA_POR_PRS_SHIFT (25) +#define PCMCIA_POR_PRS(x) (((x) & 0x3) << PCMCIA_POR_PRS_SHIFT ) +#define PCMCIA_POR_PRS_MASK PCMCIA_POR_PRS(3) /* PCMCIA region select */ +#define PCMCIA_POR_PRS_COMMON (0) /* values of POR_PRS field */ +#define PCMCIA_POR_PRS_TRUE_IDE (1) +#define PCMCIA_POR_PRS_ATTRIBUTE (2) +#define PCMCIA_POR_PRS_IO (3) + +#define PCMCIA_POR_PPS_8 (1 << 24) /* PCMCIA Port size = 8bits */ +#define PCMCIA_POR_PPS_16 (0 << 24) /* PCMCIA Port size = 16bits */ + +#define PCMCIA_POR_PSL_SHIFT (17) /* strobe length */ +#define PCMCIA_POR_PSL(x) (((x) & 0x7F) << PCMCIA_POR_PSL_SHIFT) +#define PCMCIA_POR_PSL_MASK PCMCIA_POR_PSL(0x7f) + +#define PCMCIA_POR_PSST_SHIFT (11) /* strobe setup time */ +#define PCMCIA_POR_PSST(x) (((x) & 0x3F) << PCMCIA_POR_PSST_SHIFT) +#define PCMCIA_POR_PSST_MASK PCMCIA_POR_PSST(0x3f) + +#define PCMCIA_POR_PSHT_SHIFT (5) /* strobe hold time */ +#define PCMCIA_POR_PSHT(x) (((x) & 0x3F) << PCMCIA_POR_PSHT_SHIFT) +#define PCMCIA_POR_PSHT_MASK PCMCIA_POR_PSHT(0x3f) + +#define PCMCIA_POR_BSIZE_SHIFT (0) /* bank size */ +#define PCMCIA_POR_BSIZE(x) (((x) & 0x1F) << PCMCIA_POR_BSIZE_SHIFT) +#define PCMCIA_POR_BSIZE_MASK PCMCIA_POR_BSIZE(0x1F) + +/* some handy BSIZE values */ +#define POR_BSIZE_1 PCMCIA_POR_BSIZE(0x00) +#define POR_BSIZE_2 PCMCIA_POR_BSIZE(0x01) +#define POR_BSIZE_4 PCMCIA_POR_BSIZE(0x03) +#define POR_BSIZE_8 PCMCIA_POR_BSIZE(0x02) +#define POR_BSIZE_16 PCMCIA_POR_BSIZE(0x06) +#define POR_BSIZE_32 PCMCIA_POR_BSIZE(0x07) +#define POR_BSIZE_64 PCMCIA_POR_BSIZE(0x05) +#define POR_BSIZE_128 PCMCIA_POR_BSIZE(0x04) +#define POR_BSIZE_256 PCMCIA_POR_BSIZE(0x0C) +#define POR_BSIZE_512 PCMCIA_POR_BSIZE(0x0D) +#define POR_BSIZE_1K PCMCIA_POR_BSIZE(0x0F) +#define POR_BSIZE_2K PCMCIA_POR_BSIZE(0x0E) + +#define POR_BSIZE_4K PCMCIA_POR_BSIZE(0x0A) +#define POR_BSIZE_8K PCMCIA_POR_BSIZE(0x0B) +#define POR_BSIZE_16K PCMCIA_POR_BSIZE(0x09) +#define POR_BSIZE_32K PCMCIA_POR_BSIZE(0x08) +#define POR_BSIZE_64K PCMCIA_POR_BSIZE(0x18) +#define POR_BSIZE_128K PCMCIA_POR_BSIZE(0x19) +#define POR_BSIZE_256K PCMCIA_POR_BSIZE(0x1B) +#define POR_BSIZE_512K PCMCIA_POR_BSIZE(0x1A) +#define POR_BSIZE_1M PCMCIA_POR_BSIZE(0x1E) +#define POR_BSIZE_2M PCMCIA_POR_BSIZE(0x1F) +#define POR_BSIZE_4M PCMCIA_POR_BSIZE(0x1D) +#define POR_BSIZE_8M PCMCIA_POR_BSIZE(0x1C) +#define POR_BSIZE_16M PCMCIA_POR_BSIZE(0x14) +#define POR_BSIZE_32M PCMCIA_POR_BSIZE(0x15) +#define POR_BSIZE_64M PCMCIA_POR_BSIZE(0x17) + +/* Window size */ +#define POR_1 0x1 +#define POR_2 0x2 +#define POR_4 0x4 +#define POR_8 0x8 +#define POR_16 0x10 +#define POR_32 0x20 +#define POR_64 0x40 +#define POR_128 0x80 +#define POR_256 0x100 +#define POR_512 0x200 + +#define POR_1K 0x400 +#define POR_2K 0x800 +#define POR_4K 0x1000 +#define POR_8K 0x2000 +#define POR_16K 0x4000 +#define POR_32K 0x8000 +#define POR_64K 0x10000 +#define POR_128K 0x20000 +#define POR_256K 0x40000 +#define POR_512K 0x80000 + +#define POR_1M 0x100000 +#define POR_2M 0x200000 +#define POR_4M 0x400000 +#define POR_8M 0x800000 +#define POR_16M 0x1000000 +#define POR_32M 0x2000000 +#define POR_64M 0x4000000 + +/* PCMCIA_PGCR - PCMCIA General Control Register - fields */ +#define PCMCIA_PGCR_LPMEN (1 << 3) /* Low power Mode Enable */ +#define PCMCIA_PGCR_SPKREN (1 << 2) /* SPKROUT routing enable */ +#define PCMCIA_PGCR_POE (1 << 1) /* Controller out enable */ +#define PCMCIA_PGCR_RESET (1 << 0) /* Card reset */ + +/* PCMCIA_PGSR - PCMCIA General Status Register - fields */ +#define PCMCIA_PGSR_NWINE (1 << 4) /* No Window error */ +#define PCMCIA_PGSR_LPE (1 << 3) /* Low Power error */ +#define PCMCIA_PGSR_SE (1 << 2) /* Size error */ +#define PCMCIA_PGSR_CDE (1 << 1) /* Card Detect error */ +#define PCMCIA_PGSR_WPE (1 << 0) /* Write Protect error */ + +#endif /* __ASM_ARCH_MXC_PCMCIA_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_timer.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_timer.h @@ -0,0 +1,157 @@ +/* + * mxc_timer.h + * + * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) + * + * Platform independent (i.MX1, i.MX2, i.MX3) definition for timer handling. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ + +#ifndef __PLAT_MXC_TIMER_H +#define __PLAT_MXC_TIMER_H + +#include +#include + +#ifdef CONFIG_ARCH_IMX +#define TIMER_BASE IO_ADDRESS(TIM1_BASE_ADDR) +#define TIMER_INTERRUPT TIM1_INT + +#define TCTL_VAL TCTL_CLK_PCLK1 +#define TCTL_IRQEN (1<<4) +#define TCTL_FRR (1<<8) +#define TCTL_CLK_PCLK1 (1<<1) +#define TCTL_CLK_PCLK1_4 (2<<1) +#define TCTL_CLK_TIN (3<<1) +#define TCTL_CLK_32 (4<<1) + +#define MXC_TCTL 0x00 +#define MXC_TPRER 0x04 +#define MXC_TCMP 0x08 +#define MXC_TCR 0x0c +#define MXC_TCN 0x10 +#define MXC_TSTAT 0x14 +#define TSTAT_CAPT (1<<1) +#define TSTAT_COMP (1<<0) + +static inline void gpt_irq_disable(void) +{ + unsigned int tmp; + + tmp = __raw_readl(TIMER_BASE + MXC_TCTL); + __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); +} + +static inline void gpt_irq_enable(void) +{ + __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, + TIMER_BASE + MXC_TCTL); +} + +static void gpt_irq_acknowledge(void) +{ + __raw_writel(0, TIMER_BASE + MXC_TSTAT); +} + +#elif defined(CONFIG_ARCH_MX2) +#define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) +#define TIMER_INTERRUPT MXC_INT_GPT1 + +#define MXC_TCTL 0x00 +#define TCTL_VAL TCTL_CLK_PCLK1 +#define TCTL_CLK_PCLK1 (1<<1) +#define TCTL_CLK_PCLK1_4 (2<<1) +#define TCTL_IRQEN (1<<4) +#define TCTL_FRR (1<<8) +#define MXC_TPRER 0x04 +#define MXC_TCMP 0x08 +#define MXC_TCR 0x0c +#define MXC_TCN 0x10 +#define MXC_TSTAT 0x14 +#define TSTAT_CAPT (1<<1) +#define TSTAT_COMP (1<<0) + +static inline void gpt_irq_disable(void) +{ + unsigned int tmp; + + tmp = __raw_readl(TIMER_BASE + MXC_TCTL); + __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); +} + +static inline void gpt_irq_enable(void) +{ + __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, + TIMER_BASE + MXC_TCTL); +} + +static void gpt_irq_acknowledge(void) +{ + __raw_writel(TSTAT_CAPT | TSTAT_COMP, TIMER_BASE + MXC_TSTAT); +} + +#else +#define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) +#define TIMER_INTERRUPT MXC_INT_GPT + +#define MXC_TCTL 0x00 +#define TCTL_VAL (TCTL_CLK_HIGH_FREQ | TCTL_WAITEN) +#define TCTL_CLK_IPG (1<<6) +#define TCTL_CLK_HIGH_FREQ (2<<6) +#define TCTL_FRR (1<<9) +#define TCTL_WAITEN (1<<3) + +#define MXC_TPRER 0x04 +#define MXC_TSTAT 0x08 +#define TSTAT_OF1 (1<<0) +#define TSTAT_OF2 (1<<1) +#define TSTAT_OF3 (1<<2) +#define TSTAT_IF1 (1<<3) +#define TSTAT_IF2 (1<<4) +#define TSTAT_ROV (1<<5) +#define MXC_IR 0x0c +#define MXC_TCMP 0x10 +#define MXC_TCMP2 0x14 +#define MXC_TCMP3 0x18 +#define MXC_TCR 0x1c +#define MXC_TCN 0x24 + +static inline void gpt_irq_disable(void) +{ + __raw_writel(0, TIMER_BASE + MXC_IR); +} + +static inline void gpt_irq_enable(void) +{ + __raw_writel(1<<0, TIMER_BASE + MXC_IR); +} + +static inline void gpt_irq_acknowledge(void) +{ + __raw_writel(TSTAT_OF1, TIMER_BASE + MXC_TSTAT); +} +#endif /* CONFIG_ARCH_MX3 */ + +#define TCTL_SWR (1<<15) +#define TCTL_CC (1<<10) +#define TCTL_OM (1<<9) +#define TCTL_CAP_RIS (1<<6) +#define TCTL_CAP_FAL (2<<6) +#define TCTL_CAP_RIS_FAL (3<<6) +#define TCTL_CAP_ENA (1<<5) +#define TCTL_TEN (1<<0) + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/timex.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/timex.h @@ -22,10 +22,14 @@ #if defined CONFIG_ARCH_MX1 #define CLOCK_TICK_RATE 16000000 -#elif defined CONFIG_ARCH_MX2 +#elif defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX25 #define CLOCK_TICK_RATE 13300000 -#elif defined CONFIG_ARCH_MX3 +#elif defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX35 #define CLOCK_TICK_RATE 16625000 +#elif defined CONFIG_ARCH_MX37 +#define CLOCK_TICK_RATE 8000000 +#elif defined CONFIG_ARCH_MX51 +#define CLOCK_TICK_RATE 8000000 #endif #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/dptc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/dptc.h @@ -0,0 +1,186 @@ + +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_DPTC_H__ +#define __ASM_ARCH_MXC_DPTC_H__ + +#include + +/*! + * DPTC proc file system entry name + */ +#define PROC_NODE_NAME "dptc" + +int __init init_dptc_controller(dvfs_dptc_params_s * params); + +/*! + * This function enables the DPTC module. this function updates the DPTC + * thresholds, updates the PMIC, unmasks the DPTC interrupt and enables + * the DPTC module + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * + * @return 0 if DPTC module was enabled else returns -EINVAL. + */ +int start_dptc(dvfs_dptc_params_s * params); +/*! + * This function disables the DPTC module. + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * + * @return 0 if DPTC module was disabled else returns -EINVAL. + */ +int stop_dptc(dvfs_dptc_params_s * params); +/*! + * This function updates the drivers current working point index. This index is + * used for access the current DTPC table entry and it corresponds to the + * current CPU working point measured by the DPTC hardware. + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * @param new_wp New working point index value to be set. + * + */ +void set_dptc_wp(dvfs_dptc_params_s * params, int new_wp); +/*! + * This function updates the DPTC threshold registers. + * + * @param dvfs_dptc_tables_ptr pointer to the DPTC translation table. + * @param wp current wp value. + * @param freq_index translation table index of the current CPU + * frequency. + * + */ +void update_dptc_thresholds(dvfs_dptc_tables_s * dptc_tables_ptr, + int wp, int freq_index); +/*! + * This function adds a new entry to the DPTC log buffer. + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * @param dptc_log pointer to the DPTC log buffer structure. + * @param wp value of the working point index written + * to the log buffer. + * @param freq_index value of the frequency index written to + * the log buffer. + * + * @return number of log buffer entries. + * + */ + +void add_dptc_log_entry(dvfs_dptc_params_s * params, + dptc_log_s * dptc_log, int wp, int freq_index); + +/*! + * This function updates the CPU voltage, produced by PMIC, by calling PMIC + * driver functions. + * + * @param dptc_tables_ptr pointer to the DPTC translation table. + * @param wp current wp value. + */ +void set_pmic_voltage(dvfs_dptc_tables_s * dptc_tables_ptr, int wp); + +/*! + * This function enables the DPTC reference circuits. + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * @param rc_state each high bit specifies which + * reference circuite to enable. + * @return 0 on success, error code on failure + */ +int enable_ref_circuits(dvfs_dptc_params_s * params, unsigned char rc_state); + +/*! + * This function disables the DPTC reference circuits. + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * @param rc_state each high bit specifies which + * reference circuite to disable + * @return 0 on success, error code on failure + */ +int disable_ref_circuits(dvfs_dptc_params_s * params, unsigned char rc_state); + +/*! + * This function is the DPTC Interrupt handler. + * This function wakes-up the dptc_workqueue_handler function that handles the + * DPTC interrupt. + */ +void dptc_irq(void); + +/*! + * This function updates the drivers current frequency index.This index is + * used for access the current DTPC table entry and it corresponds to the + * current CPU frequency (each CPU frequency has a separate index number + * according to the loaded DPTC table). + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + * @param freq_index New frequency index value to be set. + * + * @return 0 if the frequency index was updated (the new index is a + * valid index and the DPTC module isn't active) else returns + * -EINVAL. + * + */ +int set_dptc_curr_freq(dvfs_dptc_params_s * params, unsigned int freq_index); + +#ifdef CONFIG_MXC_DVFS_SDMA +/* + * DPTC SDMA callback. + * Updates the PMIC voltage + * + * @param params pointer to the DVFS & DPTC driver parameters structure. + */ +void dptc_sdma_callback(dvfs_dptc_params_s * params); +#endif + +/*! + * This function is called to put the DPTC in a low power state. + * + * @param pdev the device structure used to give information on which + * device to suspend (not relevant for DPTC) + * @param state the power state the device is entering + * + * @return The function always returns 0. + */ +int mxc_dptc_suspend(struct platform_device *pdev, pm_message_t state); + +/*! + * This function is called to put the DPTC in a low power state. + * + */ +void dptc_suspend(void); + +/*! + * This function is called to resume the DPTC from a low power state. + * + * @param pdev the device structure used to give information on which + * device to suspend (not relevant for DPTC) + * + * @return The function always returns 0. + */ +int mxc_dptc_resume(struct platform_device *dev); + +/*! + * This function is called to resume the DPTC from a low power state. + * + */ +void dptc_resume(void); + +/*! + * This function initializes DPTC according to turbo mode status + * + * @param status Turbo mode disable, 1 - turbo mode enabled + * + */ +void dptc_set_turbo_mode(unsigned int status); + +#endif /* __ASM_ARCH_MXC_DPTC_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/fsl_usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/fsl_usb.h @@ -0,0 +1,91 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * USB Host side, platform-specific functionality. + */ + +#include +#include + +static void fsl_setup_phy(struct ehci_hcd *ehci, + enum fsl_usb2_phy_modes phy_mode, + int port_offset); + +static inline void fsl_platform_usb_setup(struct ehci_hcd *ehci) +{ + struct fsl_usb2_platform_data *pdata; + + pdata = ehci_to_hcd(ehci)->self.controller->platform_data; + fsl_setup_phy(ehci, pdata->phy_mode, 0); +} + +static inline void fsl_platform_set_host_mode(struct usb_hcd *hcd) +{ + unsigned int temp; + struct fsl_usb2_platform_data *pdata; + + pdata = hcd->self.controller->platform_data; + + if (pdata->xcvr_ops && pdata->xcvr_ops->set_host) + pdata->xcvr_ops->set_host(); + + /* set host mode */ + temp = readl(hcd->regs + 0x1a8); + writel(temp | USBMODE_CM_HOST, hcd->regs + 0x1a8); +} + +/* Needed for enable PP and i2c/serial transceivers */ +static inline void +fsl_platform_set_vbus_power(struct fsl_usb2_platform_data *pdata, int on) +{ + u32 temp; + + /* HCSPARAMS */ + temp = readl(pdata->regs + 0x104); + /* Port Power Control */ + if (temp & HCSPARAMS_PPC) { + temp = readl(pdata->regs + FSL_SOC_USB_PORTSC1); + if (on) + temp |= PORT_POWER; + else + temp &= ~PORT_POWER; + + writel(temp, pdata->regs + FSL_SOC_USB_PORTSC1); + } + + if (pdata->xcvr_ops && pdata->xcvr_ops->set_vbus_power) + pdata->xcvr_ops->set_vbus_power(pdata->xcvr_ops, pdata, on); +} + +/* Set USB AHB burst length for host */ +static inline void fsl_platform_set_ahb_burst(struct usb_hcd *hcd) +{ + struct fsl_usb2_platform_data *pdata; + unsigned int temp; + + pdata = hcd->self.controller->platform_data; + if (pdata->change_ahb_burst) { + temp = readl(hcd->regs + FSL_SOC_USB_SBUSCFG); + writel((temp & (~(0x7))) | pdata->ahb_burst_mode, + hcd->regs + FSL_SOC_USB_SBUSCFG); + } + + /* Increase TX fifo threshold for USB+ATA for i.mx35 2.0 */ + if (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1) { + temp = readl(hcd->regs + FSL_SOC_USB_TXFILLTUNING); + /* Change TX FIFO threshold to be 0x20 */ + writel((temp & (~(0x3f << 16))) | (0x20 << 16), + hcd->regs + FSL_SOC_USB_TXFILLTUNING); + } +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/spba.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/spba.h @@ -0,0 +1,66 @@ + +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup SPBA Shared Peripheral Bus Arbiter (SPBA) + * @ingroup MSL_MX31 MSL_MX35 MSL_MX37 MSL_MX51 MSL_MXC91321 + */ + +/*! + * @file arch-mxc/spba.h + * @brief This file contains the Shared Peripheral Bus Arbiter (spba) API. + * + * @ingroup SPBA + */ + +#ifndef __ASM_ARCH_MXC_SPBA_H__ +#define __ASM_ARCH_MXC_SPBA_H__ + +#ifdef __KERNEL__ + +#define MXC_SPBA_RAR_MASK 0x7 + +/*! + * Defines three SPBA masters: A - ARM, C - SDMA (no master B for MX31) + */ +enum spba_masters { + SPBA_MASTER_A = 1, + SPBA_MASTER_B = 2, + SPBA_MASTER_C = 4, +}; + +/*! + * This function allows the three masters (A, B, C) to take ownership of a + * shared peripheral. + * + * @param mod specified module as defined in \b enum \b #spba_module + * @param master one of more (or-ed together) masters as defined in \b enum \b #spba_masters + * + * @return 0 if successful; -1 otherwise. + */ +int spba_take_ownership(int mod, int master); + +/*! + * This function releases the ownership for a shared peripheral. + * + * @param mod specified module as defined in \b enum \b #spba_module + * @param master one of more (or-ed together) masters as defined in \b enum \b #spba_masters + * + * @return 0 if successful; -1 otherwise. + */ +int spba_rel_ownership(int mod, int master); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_SPBA_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/io.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/io.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -14,29 +14,33 @@ /* Allow IO space to be anywhere in the memory */ #define IO_SPACE_LIMIT 0xffffffff -#ifdef CONFIG_ARCH_MX3 -#define __arch_ioremap __mx3_ioremap -#define __arch_iounmap __iounmap - -static inline void __iomem * -__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) -{ - if (mtype == MT_DEVICE) { - /* Access all peripherals below 0x80000000 as nonshared device - * but leave l2cc alone. - */ - if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) || - (phys_addr >= 0x30000000 + SZ_1M))) - mtype = MT_DEVICE_NONSHARED; - } +extern void __iomem *__mxc_ioremap(unsigned long cookie, size_t size, + unsigned int mtype); - return __arm_ioremap(phys_addr, size, mtype); -} -#endif +#define __arch_ioremap(a, s, f) __mxc_ioremap(a, s, f) +#define __arch_iounmap __iounmap /* io address mapping macro */ #define __io(a) __typesafe_io(a) #define __mem_pci(a) (a) +/*! + * This function is called to read a CPLD register over CSPI. + * + * @param offset number of the cpld register to be read + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int __weak spi_cpld_read(unsigned int offset); + +/*! + * This function is called to write to a CPLD register over CSPI. + * + * @param offset number of the cpld register to be written + * @param reg_val value to be written + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int __weak spi_cpld_write(unsigned int offset, unsigned int reg_val); #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/entry-macro.S +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -1,6 +1,6 @@ /* * Copyright (C) 2007 Lennert Buytenhek - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -18,10 +18,14 @@ .endm .macro get_irqnr_preamble, base, tmp +#ifdef CONFIG_MXC_TZIC + ldr \base, =TZIC_IO_ADDRESS(TZIC_BASE_ADDR) +#else ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR) #ifdef CONFIG_MXC_IRQ_PRIOR ldr r4, [\base, #AVIC_NIMASK] #endif +#endif .endm .macro arch_ret_to_user, tmp1, tmp2 @@ -31,6 +35,32 @@ @ and returns its number in irqnr @ and returns if an interrupt occured in irqstat .macro get_irqnr_and_base, irqnr, irqstat, base, tmp +#ifdef CONFIG_MXC_TZIC + @ Load offset & priority of the highest priority + @ interrupt pending. + @ 0xD80 is HIPND0 register + ldr \irqnr, =0 + ldr \irqstat, =0x0D80 +1000: + ldr \tmp, [\irqstat, \base] + cmp \tmp, #0 + bne 1001f + addeq \irqnr, \irqnr, #32 + addeq \irqstat, \irqstat, #4 + cmp \irqnr, #128 + blo 1000b + b 2001f +1001: ldr \irqstat, =1 +1002: tst \tmp, \irqstat + bne 2002f + movs \tmp, \tmp, lsr #1 + addne \irqnr, \irqnr, #1 + bne 1002b +2001: + ldr \irqnr, =0 +2002: + movs \irqnr, \irqnr +#else @ Load offset & priority of the highest priority @ interrupt pending from AVIC_NIVECSR ldr \irqstat, [\base, #0x40] @@ -44,6 +74,7 @@ strne \tmp, [\base, #AVIC_NIMASK] streq r4, [\base, #AVIC_NIMASK] #endif +#endif .endm @ irq priority table (not used) --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/clock.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/clock.h @@ -1,5 +1,5 @@ /* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * * This program is free software; you can redistribute it and/or @@ -38,6 +38,8 @@ struct clk *parent; /* Secondary clock to enable/disable with this clock */ struct clk *secondary; + /* Current clock rate */ + unsigned long rate; /* Reference count of clock enable/disable */ __s8 usecount; /* Register bit position for clock's enable/disable control. */ @@ -45,8 +47,9 @@ /* Register address for clock's enable/disable control. */ void __iomem *enable_reg; u32 flags; - /* get the current clock rate (always a fresh value) */ - unsigned long (*get_rate) (struct clk *); + /* Function ptr to recalculate the clock's rate based on parent + clock's rate */ + void (*recalc) (struct clk *); /* Function ptr to set the clock to a new rate. The rate must match a supported rate returned from round_rate. Leave blank if clock is not programmable */ @@ -66,6 +69,16 @@ int clk_register(struct clk *clk); void clk_unregister(struct clk *clk); +int clk_get_usecount(struct clk *clk); +int clk_set_pll_dither(struct clk *clk, unsigned int pll_ppm); + +/* Clock flags */ +#define RATE_PROPAGATES (1 << 0) /* Program children too */ +#define ALWAYS_ENABLED (1 << 1) /* Clock cannot be disabled */ +#define RATE_FIXED (1 << 2) /* Fixed clock rate */ +#define CPU_FREQ_TRIG_UPDATE (1 << 3) /* CPUFREQ trig update */ +#define AHB_HIGH_SET_POINT (1 << 4) /* Requires max AHB clock */ +#define AHB_MED_SET_POINT (1 << 5) /* Requires med AHB clock */ unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_uart.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_uart.h @@ -0,0 +1,275 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup UART Universal Asynchronous Receiver Transmitter (UART) Driver + */ + +/*! + * @file arch-mxc/mxc_uart.h + * + * @brief This file contains the UART configuration structure definition. + * + * + * @ingroup UART + */ + +#ifndef __ASM_ARCH_MXC_UART_H__ +#define __ASM_ARCH_MXC_UART_H__ + +#ifdef __KERNEL__ + +#include +#include + +/* + * The modes of the UART ports + */ +#define MODE_DTE 0 +#define MODE_DCE 1 +/* + * Is the UART configured to be a IR port + */ +#define IRDA 0 +#define NO_IRDA 1 + +/*! + * This structure is used to store the the physical and virtual + * addresses of the UART DMA receive buffer. + */ +typedef struct { + /*! + * DMA Receive buffer virtual address + */ + char *rx_buf; + /*! + * DMA Receive buffer physical address + */ + dma_addr_t rx_handle; +} mxc_uart_rxdmamap; + +/*! + * This structure is a way for the low level driver to define their own + * \b uart_port structure. This structure includes the core \b uart_port + * structure that is provided by Linux as an element and has other + * elements that are specifically required by this low-level driver. + */ +typedef struct { + /*! + * The port structure holds all the information about the UART + * port like base address, and so on. + */ + struct uart_port port; + /*! + * Flag to determine if the interrupts are muxed. + */ + int ints_muxed; + /*! + * Array that holds the receive and master interrupt numbers + * when the interrupts are not muxed. + */ + int irqs[2]; + /*! + * Flag to determine the DTE/DCE mode. + */ + int mode; + /*! + * Flag to hold the IR mode of the port. + */ + int ir_mode; + /*! + * Flag to enable/disable the UART port. + */ + int enabled; + /*! + * Flag to indicate if we wish to use hardware-driven hardware + * flow control. + */ + int hardware_flow; + /*! + * Holds the threshold value at which the CTS line is deasserted in + * case we use hardware-driven hardware flow control. + */ + unsigned int cts_threshold; + /*! + * Flag to enable/disable DMA data transfer. + */ + int dma_enabled; + /*! + * Holds the DMA receive buffer size. + */ + int dma_rxbuf_size; + /*! + * DMA Receive buffers information + */ + mxc_uart_rxdmamap *rx_dmamap; + /*! + * DMA RX buffer id + */ + int dma_rxbuf_id; + /*! + * DMA Transmit buffer virtual address + */ + char *tx_buf; + /*! + * DMA Transmit buffer physical address + */ + dma_addr_t tx_handle; + /*! + * Holds the RxFIFO threshold value. + */ + unsigned int rx_threshold; + /*! + * Holds the TxFIFO threshold value. + */ + unsigned int tx_threshold; + /*! + * Information whether this is a shared UART + */ + unsigned int shared; + /*! + * Clock id for UART clock + */ + struct clk *clk; + /*! + * Information whether RXDMUXSEL must be set or not for IR port + */ + int rxd_mux; + int ir_tx_inv; + int ir_rx_inv; + /*! + * DMA ID for transmit + */ + mxc_dma_device_t dma_tx_id; + /*! + * DMA ID for receive + */ + mxc_dma_device_t dma_rx_id; +} uart_mxc_port; + +/* Address offsets of the UART registers */ +#define MXC_UARTURXD 0x000 /* Receive reg */ +#define MXC_UARTUTXD 0x040 /* Transmitter reg */ +#define MXC_UARTUCR1 0x080 /* Control reg 1 */ +#define MXC_UARTUCR2 0x084 /* Control reg 2 */ +#define MXC_UARTUCR3 0x088 /* Control reg 3 */ +#define MXC_UARTUCR4 0x08C /* Control reg 4 */ +#define MXC_UARTUFCR 0x090 /* FIFO control reg */ +#define MXC_UARTUSR1 0x094 /* Status reg 1 */ +#define MXC_UARTUSR2 0x098 /* Status reg 2 */ +#define MXC_UARTUESC 0x09C /* Escape character reg */ +#define MXC_UARTUTIM 0x0A0 /* Escape timer reg */ +#define MXC_UARTUBIR 0x0A4 /* BRM incremental reg */ +#define MXC_UARTUBMR 0x0A8 /* BRM modulator reg */ +#define MXC_UARTUBRC 0x0AC /* Baud rate count reg */ +#define MXC_UARTONEMS 0x0B0 /* One millisecond reg */ +#define MXC_UARTUTS 0x0B4 /* Test reg */ + +/* Bit definations of UCR1 */ +#define MXC_UARTUCR1_ADEN 0x8000 +#define MXC_UARTUCR1_ADBR 0x4000 +#define MXC_UARTUCR1_TRDYEN 0x2000 +#define MXC_UARTUCR1_IDEN 0x1000 +#define MXC_UARTUCR1_RRDYEN 0x0200 +#define MXC_UARTUCR1_RXDMAEN 0x0100 +#define MXC_UARTUCR1_IREN 0x0080 +#define MXC_UARTUCR1_TXMPTYEN 0x0040 +#define MXC_UARTUCR1_RTSDEN 0x0020 +#define MXC_UARTUCR1_SNDBRK 0x0010 +#define MXC_UARTUCR1_TXDMAEN 0x0008 +#define MXC_UARTUCR1_ATDMAEN 0x0004 +#define MXC_UARTUCR1_DOZE 0x0002 +#define MXC_UARTUCR1_UARTEN 0x0001 + +/* Bit definations of UCR2 */ +#define MXC_UARTUCR2_ESCI 0x8000 +#define MXC_UARTUCR2_IRTS 0x4000 +#define MXC_UARTUCR2_CTSC 0x2000 +#define MXC_UARTUCR2_CTS 0x1000 +#define MXC_UARTUCR2_PREN 0x0100 +#define MXC_UARTUCR2_PROE 0x0080 +#define MXC_UARTUCR2_STPB 0x0040 +#define MXC_UARTUCR2_WS 0x0020 +#define MXC_UARTUCR2_RTSEN 0x0010 +#define MXC_UARTUCR2_ATEN 0x0008 +#define MXC_UARTUCR2_TXEN 0x0004 +#define MXC_UARTUCR2_RXEN 0x0002 +#define MXC_UARTUCR2_SRST 0x0001 + +/* Bit definations of UCR3 */ +#define MXC_UARTUCR3_DTREN 0x2000 +#define MXC_UARTUCR3_PARERREN 0x1000 +#define MXC_UARTUCR3_FRAERREN 0x0800 +#define MXC_UARTUCR3_DSR 0x0400 +#define MXC_UARTUCR3_DCD 0x0200 +#define MXC_UARTUCR3_RI 0x0100 +#define MXC_UARTUCR3_RXDSEN 0x0040 +#define MXC_UARTUCR3_AWAKEN 0x0010 +#define MXC_UARTUCR3_DTRDEN 0x0008 +#define MXC_UARTUCR3_RXDMUXSEL 0x0004 +#define MXC_UARTUCR3_INVT 0x0002 + +/* Bit definations of UCR4 */ +#define MXC_UARTUCR4_CTSTL_OFFSET 10 +#define MXC_UARTUCR4_CTSTL_MASK (0x3F << 10) +#define MXC_UARTUCR4_INVR 0x0200 +#define MXC_UARTUCR4_ENIRI 0x0100 +#define MXC_UARTUCR4_REF16 0x0040 +#define MXC_UARTUCR4_IRSC 0x0020 +#define MXC_UARTUCR4_TCEN 0x0008 +#define MXC_UARTUCR4_OREN 0x0002 +#define MXC_UARTUCR4_DREN 0x0001 + +/* Bit definations of UFCR */ +#define MXC_UARTUFCR_RFDIV 0x0200 /* Ref freq div is set to 2 */ +#define MXC_UARTUFCR_RFDIV_OFFSET 7 +#define MXC_UARTUFCR_RFDIV_MASK (0x7 << 7) +#define MXC_UARTUFCR_TXTL_OFFSET 10 +#define MXC_UARTUFCR_DCEDTE 0x0040 + +/* Bit definations of URXD */ +#define MXC_UARTURXD_ERR 0x4000 +#define MXC_UARTURXD_OVRRUN 0x2000 +#define MXC_UARTURXD_FRMERR 0x1000 +#define MXC_UARTURXD_BRK 0x0800 +#define MXC_UARTURXD_PRERR 0x0400 + +/* Bit definations of USR1 */ +#define MXC_UARTUSR1_PARITYERR 0x8000 +#define MXC_UARTUSR1_RTSS 0x4000 +#define MXC_UARTUSR1_TRDY 0x2000 +#define MXC_UARTUSR1_RTSD 0x1000 +#define MXC_UARTUSR1_FRAMERR 0x0400 +#define MXC_UARTUSR1_RRDY 0x0200 +#define MXC_UARTUSR1_AGTIM 0x0100 +#define MXC_UARTUSR1_DTRD 0x0080 +#define MXC_UARTUSR1_AWAKE 0x0010 + +/* Bit definations of USR2 */ +#define MXC_UARTUSR2_TXFE 0x4000 +#define MXC_UARTUSR2_IDLE 0x1000 +#define MXC_UARTUSR2_RIDELT 0x0400 +#define MXC_UARTUSR2_RIIN 0x0200 +#define MXC_UARTUSR2_DCDDELT 0x0040 +#define MXC_UARTUSR2_DCDIN 0x0020 +#define MXC_UARTUSR2_TXDC 0x0008 +#define MXC_UARTUSR2_ORE 0x0002 +#define MXC_UARTUSR2_RDR 0x0001 +#define MXC_UARTUSR2_BRCD 0x0004 + +/* Bit definations of UTS */ +#define MXC_UARTUTS_LOOP 0x1000 + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_UART_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mxc_scc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mxc_scc.h @@ -0,0 +1,45 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file arch-mxc/mxc_scc.h + * + * @brief This is intended to be the file which contains all of code or changes + * needed to port the driver. + * + * @ingroup MXCSCC + */ + +#ifndef __ASM_ARCH_MXC_SCC_H__ +#define __ASM_ARCH_MXC_SCC_H__ + +#include + +/*! + * Expected to come from platform header files. + * This symbol must be the address of the SCC + */ +#define SCC_BASE SCC_BASE_ADDR + +/*! + * This must be the interrupt line number of the SCM interrupt. + */ +#define INT_SCC_SCM MXC_INT_SCC_SCM + +/*! + * if #USE_SMN_INTERRUPT is defined, this must be the interrupt line number of + * the SMN interrupt. + */ +#define INT_SCC_SMN MXC_INT_SCC_SMN + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/mx51.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/mx51.h @@ -0,0 +1,519 @@ +/* + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_MX51_H__ +#define __ASM_ARCH_MXC_MX51_H__ + +#ifndef __ASM_ARCH_MXC_HARDWARE_H__ +#error "Do not include directly." +#endif + +/*! + * @file arch-mxc/mx51.h + * @brief This file contains register definitions. + * + * @ingroup MSL_MX51 + */ + +/*! + * Register an interrupt handler for the SMN as well as the SCC. In some + * implementations, the SMN is not connected at all, and in others, it is + * on the same interrupt line as the SCM. Comment this line out accordingly + */ +#define USE_SMN_INTERRUPT + +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive Irda data. + */ +#define MXC_UART_IR_RXDMUX 0x0004 +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive UART data. + */ +#define MXC_UART_RXDMUX 0x0004 + +/*! + * This option is used to set or clear the dspdma bit in the SDMA config + * register. + */ +#define MXC_SDMA_DSPDMA 0 + +/*! + * Define this option to specify we are using the newer SDMA module. + */ +#define MXC_SDMA_V2 + +/*! + * The maximum frequency that the pixel clock can be at so as to + * activate DVFS-PER. + */ +#define DVFS_MAX_PIX_CLK 54000000 + + /* + * IRAM + */ +#define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ +#define IRAM_BASE_ADDR_VIRT 0xFA3E0000 +#define IRAM_PARTITIONS 16 +#define IRAM_PARTITIONS_TO1 12 +#define IRAM_SIZE (IRAM_PARTITIONS*SZ_8K) /* 128KB */ + +#if defined(CONFIG_MXC_SECURITY_SCC2) \ + || defined(CONFIG_MXC_SECURITY_SCC2_MODULE) +#define SCC_IRAM_SIZE SZ_16K +#else +#define SCC_IRAM_SIZE 0 +#endif + +#ifdef CONFIG_SDMA_IRAM +#define SDMA_IRAM_SIZE CONFIG_SDMA_IRAM_SIZE +#else +#define SDMA_IRAM_SIZE 0 +#endif + +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define SND_RAM_SIZE 0x6000 +#else +#define SND_RAM_SIZE 0 +#endif + +#ifdef CONFIG_MXC_VPU_IRAM +#define VPU_IRAM_SIZE 0x11000 +#else +#define VPU_IRAM_SIZE 0 +#endif + +#if (IRAM_SIZE < (SDMA_IRAM_SIZE + SND_RAM_SIZE + VPU_IRAM_SIZE + \ + SCC_IRAM_SIZE)) +#error "IRAM size exceeded" +#endif + +#define SCC_IRAM_BASE_ADDR (IRAM_BASE_ADDR + IRAM_SIZE - SCC_IRAM_SIZE) +#define VPU_IRAM_BASE_ADDR (SCC_IRAM_BASE_ADDR - VPU_IRAM_SIZE) +#define SND_RAM_BASE_ADDR (VPU_IRAM_BASE_ADDR - SND_RAM_SIZE) +#define SDMA_IRAM_BASE_ADDR (SND_RAM_BASE_ADDR - SDMA_IRAM_SIZE) +#define IDLE_IRAM_BASE_ADDR (SDMA_IRAM_BASE_ADDR - SZ_4K) +#define SUSPEND_IRAM_BASE_ADDR (IDLE_IRAM_BASE_ADDR - SZ_4K) +/* + * NFC + */ +#define NFC_BASE_ADDR_AXI 0xCFFF0000 /* NAND flash AXI */ +#define NFC_BASE_ADDR_AXI_VIRT 0xF9000000 +#define NFC_AXI_SIZE SZ_64K + +/* + * Graphics Memory of GPU + */ +#define GPU_GMEM_BASE_ADDR 0x20000000 +#define GPU_BASE_ADDR 0x30000000 +#define GPU2D_BASE_ADDR 0xD0000000 + +#define TZIC_BASE_ADDR 0x8FFFC000 +#define TZIC_BASE_ADDR_VIRT 0xFA100000 +#define TZIC_SIZE SZ_16K + +#define DEBUG_BASE_ADDR 0x60000000 +#define DEBUG_BASE_ADDR_VIRT 0xFA200000 +#define DEBUG_SIZE SZ_1M +#define ETB_BASE_ADDR (DEBUG_BASE_ADDR + 0x00001000) +#define ETM_BASE_ADDR (DEBUG_BASE_ADDR + 0x00002000) +#define TPIU_BASE_ADDR (DEBUG_BASE_ADDR + 0x00003000) +#define CTI0_BASE_ADDR (DEBUG_BASE_ADDR + 0x00004000) +#define CTI1_BASE_ADDR (DEBUG_BASE_ADDR + 0x00005000) +#define CTI2_BASE_ADDR (DEBUG_BASE_ADDR + 0x00006000) +#define CTI3_BASE_ADDR (DEBUG_BASE_ADDR + 0x00007000) +#define CORTEX_DBG_BASE_ADDR (DEBUG_BASE_ADDR + 0x00008000) + +/* + * SPBA global module enabled #0 + */ +#define SPBA0_BASE_ADDR 0x70000000 +#define SPBA0_BASE_ADDR_VIRT 0xFB100000 +#define SPBA0_SIZE SZ_1M + +#define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) +#define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) +#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) +#define CSPI1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) +#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) +#define MMC_SDHC3_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) +#define MMC_SDHC4_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) +#define SPDIF_BASE_ADDR (SPBA0_BASE_ADDR + 0x00028000) +#define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00030000) +#define SLIM_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00034000) +#define HSI2C_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00038000) +#define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) + +/*! + * defines for SPBA modules + */ +#define SPBA_SDHC1 0x04 +#define SPBA_SDHC2 0x08 +#define SPBA_UART3 0x0C +#define SPBA_CSPI1 0x10 +#define SPBA_SSI2 0x14 +#define SPBA_SDHC3 0x20 +#define SPBA_SDHC4 0x24 +#define SPBA_SPDIF 0x28 +#define SPBA_ATA 0x30 +#define SPBA_SLIM 0x34 +#define SPBA_HSI2C 0x38 +#define SPBA_CTRL 0x3C + +/* + * AIPS 1 + */ +#define AIPS1_BASE_ADDR 0x73F00000 +#define AIPS1_BASE_ADDR_VIRT 0xFB000000 +#define AIPS1_SIZE SZ_1M + +#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) +#define GPIO1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) +#define GPIO2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) +#define GPIO3_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) +#define GPIO4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) +#define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) +#define WDOG1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) +#define WDOG2_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) +#define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) +#define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) +#define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) +#define EPIT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) +#define EPIT2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) +#define PWM1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) +#define PWM2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) +#define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) +#define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000C0000) +#define SRC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000) +#define CCM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000) +#define GPC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D8000) + +#define DVFSPER_BASE_ADDR (GPC_BASE_ADDR + 0x1C4) +/*! + * Defines for modules using static and dynamic DMA channels + */ +#define MXC_DMA_CHANNEL_IRAM 30 +#define MXC_DMA_CHANNEL_SPDIF_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_UART3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC1 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MMC2 MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_SSI2_RX MXC_DMA_DYNAMIC_CHANNEL +#ifdef CONFIG_SDMA_IRAM +#define MXC_DMA_CHANNEL_SSI2_TX (MXC_DMA_CHANNEL_IRAM + 1) +#else /*CONFIG_SDMA_IRAM */ +#define MXC_DMA_CHANNEL_SSI2_TX MXC_DMA_DYNAMIC_CHANNEL +#endif /*CONFIG_SDMA_IRAM */ +#define MXC_DMA_CHANNEL_CSPI1_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI1_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI2_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_CSPI3_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_RX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_ATA_TX MXC_DMA_DYNAMIC_CHANNEL +#define MXC_DMA_CHANNEL_MEMORY MXC_DMA_DYNAMIC_CHANNEL + +/* + * AIPS 2 + */ +#define AIPS2_BASE_ADDR 0x83F00000 +#define AIPS2_BASE_ADDR_VIRT 0xFB200000 +#define AIPS2_SIZE SZ_1M + +#define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) +#define PLL2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) +#define PLL3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000) +#define AHBMAX_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) +#define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) +#define CSU_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000) +#define ARM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000) +#define OWIRE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) +#define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A8000) +#define CSPI2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) +#define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) +#define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B4000) +#define ROMCP_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B8000) +#define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000BC000) +#define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) +#define I2C2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) +#define I2C1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) +#define SSI1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) +#define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) +#define M4IF_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) +#define ESDCTL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D9000) +#define WEIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DA000) +#define NFC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DB000) +#define EMI_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DBF00) +#define MIPI_HSC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) +#define ATA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) +#define SIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E4000) +#define SSI3BASE_ADDR (AIPS2_BASE_ADDR + 0x000E8000) +#define FEC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) +#define TVE_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F0000) +#define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) +#define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) + +/* + * Memory regions and CS + */ +#define GPU_CTRL_BASE_ADDR 0x30000000 +#define IPU_CTRL_BASE_ADDR 0x40000000 +#define CSD0_BASE_ADDR 0x90000000 +#define CSD1_BASE_ADDR 0xA0000000 +#define CS0_BASE_ADDR 0xB0000000 +#define CS1_BASE_ADDR 0xB8000000 +#define CS2_BASE_ADDR 0xC0000000 +#define CS3_BASE_ADDR 0xC8000000 +#define CS4_BASE_ADDR 0xCC000000 +#define CS5_BASE_ADDR 0xCE000000 + +/*! + * This macro defines the physical to virtual address mapping for all the + * peripheral modules. It is used by passing in the physical address as x + * and returning the virtual address. If the physical address is not mapped, + * it returns 0xDEADBEEF + */ +#define IO_ADDRESS(x) \ + (void __force __iomem *) \ + ((((x) >= (unsigned long)IRAM_BASE_ADDR) && \ + ((x) < (unsigned long)IRAM_BASE_ADDR + IRAM_SIZE)) ? \ + IRAM_IO_ADDRESS(x):\ + (((x) >= (unsigned long)TZIC_BASE_ADDR) && \ + ((x) < (unsigned long)TZIC_BASE_ADDR + TZIC_SIZE)) ? \ + TZIC_IO_ADDRESS(x):\ + (((x) >= (unsigned long)DEBUG_BASE_ADDR) && \ + ((x) < (unsigned long)DEBUG_BASE_ADDR + DEBUG_SIZE)) ? \ + DEBUG_IO_ADDRESS(x):\ + (((x) >= (unsigned long)SPBA0_BASE_ADDR) && \ + ((x) < (unsigned long)SPBA0_BASE_ADDR + SPBA0_SIZE)) ? \ + SPBA0_IO_ADDRESS(x):\ + (((x) >= (unsigned long)AIPS1_BASE_ADDR) && \ + ((x) < (unsigned long)AIPS1_BASE_ADDR + AIPS1_SIZE)) ? \ + AIPS1_IO_ADDRESS(x):\ + (((x) >= (unsigned long)AIPS2_BASE_ADDR) && \ + ((x) < (unsigned long)AIPS2_BASE_ADDR + AIPS2_SIZE)) ? \ + AIPS2_IO_ADDRESS(x):\ + (((x) >= (unsigned long)NFC_BASE_ADDR_AXI) && \ + ((x) < (unsigned long)NFC_BASE_ADDR_AXI + NFC_AXI_SIZE)) ? \ + NFC_BASE_ADDR_AXI_IO_ADDRESS(x):\ + 0xDEADBEEF) + +/* + * define the address mapping macros: in physical address order + */ +#define IRAM_IO_ADDRESS(x) \ + (((x) - IRAM_BASE_ADDR) + IRAM_BASE_ADDR_VIRT) + +#define TZIC_IO_ADDRESS(x) \ + (((x) - TZIC_BASE_ADDR) + TZIC_BASE_ADDR_VIRT) + +#define DEBUG_IO_ADDRESS(x) \ + (((x) - DEBUG_BASE_ADDR) + DEBUG_BASE_ADDR_VIRT) + +#define SPBA0_IO_ADDRESS(x) \ + (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) + +#define AIPS1_IO_ADDRESS(x) \ + (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) + +#define AIPS2_IO_ADDRESS(x) \ + (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) + +#define NFC_BASE_ADDR_AXI_IO_ADDRESS(x) \ + (((x) - NFC_BASE_ADDR_AXI) + NFC_BASE_ADDR_AXI_VIRT) + +#define IS_MEM_DEVICE_NONSHARED(x) 0 + +/* + * DMA request assignments + */ +#define DMA_REQ_SSI3_TX1 47 +#define DMA_REQ_SSI3_RX1 46 +#define DMA_REQ_SPDIF 45 +#define DMA_REQ_UART3_TX 44 +#define DMA_REQ_UART3_RX 43 +#define DMA_REQ_SLIM_B_TX 42 +#define DMA_REQ_SDHC4 41 +#define DMA_REQ_SDHC3 40 +#define DMA_REQ_CSPI_TX 39 +#define DMA_REQ_CSPI_RX 38 +#define DMA_REQ_SSI3_TX2 37 +#define DMA_REQ_IPU 36 +#define DMA_REQ_SSI3_RX2 35 +#define DMA_REQ_EPIT2 34 +#define DMA_REQ_CTI2_1 33 +#define DMA_REQ_EMI_WR 32 +#define DMA_REQ_CTI2_0 31 +#define DMA_REQ_EMI_RD 30 +#define DMA_REQ_SSI1_TX1 29 +#define DMA_REQ_SSI1_RX1 28 +#define DMA_REQ_SSI1_TX2 27 +#define DMA_REQ_SSI1_RX2 26 +#define DMA_REQ_SSI2_TX1 25 +#define DMA_REQ_SSI2_RX1 24 +#define DMA_REQ_SSI2_TX2 23 +#define DMA_REQ_SSI2_RX2 22 +#define DMA_REQ_SDHC2 21 +#define DMA_REQ_SDHC1 20 +#define DMA_REQ_UART1_TX 19 +#define DMA_REQ_UART1_RX 18 +#define DMA_REQ_UART2_TX 17 +#define DMA_REQ_UART2_RX 16 +#define DMA_REQ_GPU 15 +#define DMA_REQ_EXTREQ1 14 +#define DMA_REQ_FIRI_TX 13 +#define DMA_REQ_FIRI_RX 12 +#define DMA_REQ_HS_I2C_RX 11 +#define DMA_REQ_HS_I2C_TX 10 +#define DMA_REQ_CSPI2_TX 9 +#define DMA_REQ_CSPI2_RX 8 +#define DMA_REQ_CSPI1_TX 7 +#define DMA_REQ_CSPI1_RX 6 +#define DMA_REQ_SLIM_B 5 +#define DMA_REQ_ATA_TX_END 4 +#define DMA_REQ_ATA_TX 3 +#define DMA_REQ_ATA_RX 2 +#define DMA_REQ_GPC 1 +#define DMA_REQ_VPU 0 + +/* + * Interrupt numbers + */ +#define MXC_INT_BASE 0 +#define MXC_INT_RESV0 0 +#define MXC_INT_MMC_SDHC1 1 +#define MXC_INT_MMC_SDHC2 2 +#define MXC_INT_MMC_SDHC3 3 +#define MXC_INT_MMC_SDHC4 4 +#define MXC_INT_RESV5 5 +#define MXC_INT_SDMA 6 +#define MXC_INT_IOMUX 7 +#define MXC_INT_NFC 8 +#define MXC_INT_VPU 9 +#define MXC_INT_IPU_ERR 10 +#define MXC_INT_IPU_SYN 11 +#define MXC_INT_GPU 12 +#define MXC_INT_RESV13 13 +#define MXC_INT_USB_H1 14 +#define MXC_INT_EMI 15 +#define MXC_INT_USB_H2 16 +#define MXC_INT_USB_H3 17 +#define MXC_INT_USB_OTG 18 +#define MXC_INT_SAHARA_H0 19 +#define MXC_INT_SAHARA_H1 20 +#define MXC_INT_SCC_SMN 21 +#define MXC_INT_SCC_STZ 22 +#define MXC_INT_SCC_SCM 23 +#define MXC_INT_SRTC_NTZ 24 +#define MXC_INT_SRTC_TZ 25 +#define MXC_INT_RTIC 26 +#define MXC_INT_CSU 27 +#define MXC_INT_SLIM_B 28 +#define MXC_INT_SSI1 29 +#define MXC_INT_SSI2 30 +#define MXC_INT_UART1 31 +#define MXC_INT_UART2 32 +#define MXC_INT_UART3 33 +#define MXC_INT_RESV34 34 +#define MXC_INT_RESV35 35 +#define MXC_INT_CSPI1 36 +#define MXC_INT_CSPI2 37 +#define MXC_INT_CSPI 38 +#define MXC_INT_GPT 39 +#define MXC_INT_EPIT1 40 +#define MXC_INT_EPIT2 41 +#define MXC_INT_GPIO1_INT7 42 +#define MXC_INT_GPIO1_INT6 43 +#define MXC_INT_GPIO1_INT5 44 +#define MXC_INT_GPIO1_INT4 45 +#define MXC_INT_GPIO1_INT3 46 +#define MXC_INT_GPIO1_INT2 47 +#define MXC_INT_GPIO1_INT1 48 +#define MXC_INT_GPIO1_INT0 49 +#define MXC_INT_GPIO1_LOW 50 +#define MXC_INT_GPIO1_HIGH 51 +#define MXC_INT_GPIO2_LOW 52 +#define MXC_INT_GPIO2_HIGH 53 +#define MXC_INT_GPIO3_LOW 54 +#define MXC_INT_GPIO3_HIGH 55 +#define MXC_INT_GPIO4_LOW 56 +#define MXC_INT_GPIO4_HIGH 57 +#define MXC_INT_WDOG1 58 +#define MXC_INT_WDOG2 59 +#define MXC_INT_KPP 60 +#define MXC_INT_PWM1 61 +#define MXC_INT_I2C1 62 +#define MXC_INT_I2C2 63 +#define MXC_INT_HS_I2C 64 +#define MXC_INT_RESV65 65 +#define MXC_INT_RESV66 66 +#define MXC_INT_SIM_IPB 67 +#define MXC_INT_SIM_DAT 68 +#define MXC_INT_IIM 69 +#define MXC_INT_ATA 70 +#define MXC_INT_CCM1 71 +#define MXC_INT_CCM2 72 +#define MXC_INT_GPC1 73 +#define MXC_INT_GPC2 74 +#define MXC_INT_SRC 75 +#define MXC_INT_NM 76 +#define MXC_INT_PMU 77 +#define MXC_INT_CTI_IRQ 78 +#define MXC_INT_CTI1_TG0 79 +#define MXC_INT_CTI1_TG1 80 +#define MXC_INT_MCG_ERR 81 +#define MXC_INT_MCG_TMR 82 +#define MXC_INT_MCG_FUNC 83 +#define MXC_INT_GPU2_IRQ 84 +#define MXC_INT_GPU2_BUSY 85 +#define MXC_INT_RESV86 86 +#define MXC_INT_FEC 87 +#define MXC_INT_OWIRE 88 +#define MXC_INT_CTI1_TG2 89 +#define MXC_INT_SJC 90 +#define MXC_INT_SPDIF 91 +#define MXC_INT_TVE 92 +#define MXC_INT_FIRI 93 +#define MXC_INT_PWM2 94 +#define MXC_INT_SLIM_EXP 95 +#define MXC_INT_SSI3 96 +#define MXC_INT_EMI_BOOT 97 +#define MXC_INT_CTI1_TG3 98 +#define MXC_INT_SMC_RX 99 +#define MXC_INT_VPU_IDLE 100 +#define MXC_INT_EMI_NFC 101 +#define MXC_INT_GPU_IDLE 102 + +/* gpio and gpio based interrupt handling */ +#define GPIO_DR 0x00 +#define GPIO_GDIR 0x04 +#define GPIO_PSR 0x08 +#define GPIO_ICR1 0x0C +#define GPIO_ICR2 0x10 +#define GPIO_IMR 0x14 +#define GPIO_ISR 0x18 +#define GPIO_INT_LOW_LEV 0x0 +#define GPIO_INT_HIGH_LEV 0x1 +#define GPIO_INT_RISE_EDGE 0x2 +#define GPIO_INT_FALL_EDGE 0x3 +#define GPIO_INT_NONE 0x4 + +#endif /* __ASM_ARCH_MXC_MX51_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/dma.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/dma.h @@ -0,0 +1,293 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_DMA_H__ +#define __ASM_ARCH_MXC_DMA_H__ + +#include + +#define MXC_DMA_DYNAMIC_CHANNEL 255 + +#define MXC_DMA_DONE 0x0 +#define MXC_DMA_REQUEST_TIMEOUT 0x1 +#define MXC_DMA_TRANSFER_ERROR 0x2 + +/*! This defines the list of device ID's for DMA */ +typedef enum mxc_dma_device { + MXC_DMA_UART1_RX, + MXC_DMA_UART1_TX, + MXC_DMA_UART2_RX, + MXC_DMA_UART2_TX, + MXC_DMA_UART3_RX, + MXC_DMA_UART3_TX, + MXC_DMA_UART4_RX, + MXC_DMA_UART4_TX, + MXC_DMA_UART5_RX, + MXC_DMA_UART5_TX, + MXC_DMA_UART6_RX, + MXC_DMA_UART6_TX, + MXC_DMA_MMC1_WIDTH_1, + MXC_DMA_MMC1_WIDTH_4, + MXC_DMA_MMC2_WIDTH_1, + MXC_DMA_MMC2_WIDTH_4, + MXC_DMA_SSI1_8BIT_RX0, + MXC_DMA_SSI1_8BIT_TX0, + MXC_DMA_SSI1_16BIT_RX0, + MXC_DMA_SSI1_16BIT_TX0, + MXC_DMA_SSI1_24BIT_RX0, + MXC_DMA_SSI1_24BIT_TX0, + MXC_DMA_SSI1_8BIT_RX1, + MXC_DMA_SSI1_8BIT_TX1, + MXC_DMA_SSI1_16BIT_RX1, + MXC_DMA_SSI1_16BIT_TX1, + MXC_DMA_SSI1_24BIT_RX1, + MXC_DMA_SSI1_24BIT_TX1, + MXC_DMA_SSI2_8BIT_RX0, + MXC_DMA_SSI2_8BIT_TX0, + MXC_DMA_SSI2_16BIT_RX0, + MXC_DMA_SSI2_16BIT_TX0, + MXC_DMA_SSI2_24BIT_RX0, + MXC_DMA_SSI2_24BIT_TX0, + MXC_DMA_SSI2_8BIT_RX1, + MXC_DMA_SSI2_8BIT_TX1, + MXC_DMA_SSI2_16BIT_RX1, + MXC_DMA_SSI2_16BIT_TX1, + MXC_DMA_SSI2_24BIT_RX1, + MXC_DMA_SSI2_24BIT_TX1, + MXC_DMA_FIR_RX, + MXC_DMA_FIR_TX, + MXC_DMA_CSPI1_RX, + MXC_DMA_CSPI1_TX, + MXC_DMA_CSPI2_RX, + MXC_DMA_CSPI2_TX, + MXC_DMA_CSPI3_RX, + MXC_DMA_CSPI3_TX, + MXC_DMA_ATA_RX, + MXC_DMA_ATA_TX, + MXC_DMA_MEMORY, + MXC_DMA_FIFO_MEMORY, + MXC_DMA_DSP_PACKET_DATA0_RD, + MXC_DMA_DSP_PACKET_DATA0_WR, + MXC_DMA_DSP_PACKET_DATA1_RD, + MXC_DMA_DSP_PACKET_DATA1_WR, + MXC_DMA_DSP_LOG0_CHNL, + MXC_DMA_DSP_LOG1_CHNL, + MXC_DMA_DSP_LOG2_CHNL, + MXC_DMA_DSP_LOG3_CHNL, + MXC_DMA_CSI_RX, + MXC_DMA_SPDIF_16BIT_TX, + MXC_DMA_SPDIF_16BIT_RX, + MXC_DMA_SPDIF_32BIT_TX, + MXC_DMA_SPDIF_32BIT_RX, + MXC_DMA_ASRC_A_RX, + MXC_DMA_ASRC_A_TX, + MXC_DMA_ASRC_B_RX, + MXC_DMA_ASRC_B_TX, + MXC_DMA_ASRC_C_RX, + MXC_DMA_ASRC_C_TX, + MXC_DMA_ASRCA_ESAI, + MXC_DMA_ASRCB_ESAI, + MXC_DMA_ASRCC_ESAI, + MXC_DMA_ASRCA_SSI1_TX0, + MXC_DMA_ASRCA_SSI1_TX1, + MXC_DMA_ASRCA_SSI2_TX0, + MXC_DMA_ASRCA_SSI2_TX1, + MXC_DMA_ASRCB_SSI1_TX0, + MXC_DMA_ASRCB_SSI1_TX1, + MXC_DMA_ASRCB_SSI2_TX0, + MXC_DMA_ASRCB_SSI2_TX1, + MXC_DMA_ESAI_16BIT_RX, + MXC_DMA_ESAI_16BIT_TX, + MXC_DMA_ESAI_24BIT_RX, + MXC_DMA_ESAI_24BIT_TX, + MXC_DMA_TEST_RAM2D2RAM, + MXC_DMA_TEST_RAM2RAM2D, + MXC_DMA_TEST_RAM2D2RAM2D, + MXC_DMA_TEST_RAM2RAM, + MXC_DMA_TEST_HW_CHAINING, + MXC_DMA_TEST_SW_CHAINING +} mxc_dma_device_t; + +/*! This defines the prototype of callback funtion registered by the drivers */ +typedef void (*mxc_dma_callback_t) (void *arg, int error_status, + unsigned int count); + +/*! This defines the type of DMA transfer requested */ +typedef enum mxc_dma_mode { + MXC_DMA_MODE_READ, + MXC_DMA_MODE_WRITE, +} mxc_dma_mode_t; + +/*! This defines the DMA channel parameters */ +typedef struct mxc_dma_channel { + unsigned int active:1; /*!< When there has a active tranfer, it is set to 1 */ + unsigned int lock; /*!< Defines the channel is allocated or not */ + int curr_buf; /*!< Current buffer */ + mxc_dma_mode_t mode; /*!< Read or Write */ + unsigned int channel; /*!< Channel info */ + unsigned int dynamic:1; /*!< Channel not statically allocated when 1 */ + char *dev_name; /*!< Device name */ + void *private; /*!< Private structure for platform */ + mxc_dma_callback_t cb_fn; /*!< The callback function */ + void *cb_args; /*!< The argument of callback function */ +} mxc_dma_channel_t; + +/*! This structure contains the information about a dma transfer */ +typedef struct mxc_dma_requestbuf { + dma_addr_t src_addr; /*!< source address */ + dma_addr_t dst_addr; /*!< destination address */ + int num_of_bytes; /*!< the length of this transfer : bytes */ +} mxc_dma_requestbuf_t; + +/*! This struct contains the information for asrc special*/ +struct dma_channel_asrc_info { + u32 channs; /*!< data channels in asrc */ +}; + +/*! This struct contains the information for device special*/ +struct dma_channel_info { + struct dma_channel_asrc_info asrc; /*!< asrc special information */ +}; + +#if defined(CONFIG_ARCH_MX27) || defined(CONFIG_ARCH_MX21) +#include +#else +#include +#endif + +/*! + * This function is generally called by the driver at open time. + * The DMA driver would do any initialization steps that is required + * to get the channel ready for data transfer. + * + * @param channel_id a pre-defined id. The peripheral driver would specify + * the id associated with its peripheral. This would be + * used by the DMA driver to identify the peripheral + * requesting DMA and do the necessary setup on the + * channel associated with the particular peripheral. + * The DMA driver could use static or dynamic DMA channel + * allocation. + * @param dev_name module name or device name + * @param data the customized parameter for special channel. + * @return returns a negative number on error if request for a DMA channel did not + * succeed, returns the channel number to be used on success. + */ +extern int mxc_dma_request_ext(mxc_dma_device_t channel_id, char *dev_name, + struct dma_channel_info *info); + +static inline int mxc_dma_request(mxc_dma_device_t channel_id, char *dev_name) +{ + return mxc_dma_request_ext(channel_id, dev_name, NULL); +} + +/*! + * This function is generally called by the driver at close time. The DMA + * driver would do any cleanup associated with this channel. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +extern int mxc_dma_free(int channel_num); + +/*! + * This function would just configure the buffers specified by the user into + * dma channel. The caller must call mxc_dma_enable to start this transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param dma_buf an array of physical addresses to the user defined + * buffers. The caller must guarantee the dma_buf is + * available until the transfer is completed. + * @param num_buf number of buffers in the array + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not be + * added with DMA for transfer. On Success, it returns 0 + */ +extern int mxc_dma_config(int channel_num, mxc_dma_requestbuf_t *dma_buf, + int num_buf, mxc_dma_mode_t mode); + +/*! + * This function would just configure the scatterlist specified by the + * user into dma channel. This is a slight variation of mxc_dma_config(), + * it is provided for the convenience of drivers that have a scatterlist + * passed into them. It is the calling driver's responsibility to have the + * correct physical address filled in the "dma_address" field of the + * scatterlist. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param sg a scatterlist of buffers. The caller must guarantee + * the dma_buf is available until the transfer is + * completed. + * @param num_buf number of buffers in the array + * @param num_of_bytes total number of bytes to transfer. If set to 0, this + * would imply to use the length field of the scatterlist + * for each DMA transfer. Else it would calculate the size + * for each DMA transfer. + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not + * be added with DMA for transfer. On Success, it returns 0 + */ +extern int mxc_dma_sg_config(int channel_num, struct scatterlist *sg, + int num_buf, int num_of_bytes, + mxc_dma_mode_t mode); + +/*! + * This function is provided if the driver would like to set/change its + * callback function. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param callback a callback function to provide notification on transfer + * completion, user could specify NULL if he does not wish + * to be notified + * @param arg an argument that gets passed in to the callback + * function, used by the user to do any driver specific + * operations. + * @return this function returns a negative number on error if the callback + * could not be set for the channel or 0 on success + */ +extern int mxc_dma_callback_set(int channel_num, mxc_dma_callback_t callback, + void *arg); + +/*! + * This stops the DMA channel and any ongoing transfers. Subsequent use of + * mxc_dma_enable() will restart the channel and restart the transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +extern int mxc_dma_disable(int channel_num); + +/*! + * This starts DMA transfer. Or it restarts DMA on a stopped channel + * previously stopped with mxc_dma_disable(). + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +extern int mxc_dma_enable(int channel_num); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/include/mach/pmic_audio.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/include/mach/pmic_audio.h @@ -0,0 +1,2315 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_PMIC_AUDIO_H__ +#define __ASM_ARCH_MXC_PMIC_AUDIO_H__ + +/*! + * @defgroup PMIC_AUDIO PMIC Audio Driver + * @ingroup PMIC_DRVRS + */ + +/*! + * @file arch-mxc/pmic_audio.h + * @brief External definitions for the PMIC Audio Client driver. + * + * The PMIC Audio driver and this API were developed to support the + * audio playback, recording, and mixing capabilities of the power + * management ICs that are available from Freescale Semiconductor, Inc. + * + * The following table shows which audio-related capabilities are supported + * by each power management IC: + * + * @ingroup PMIC_AUDIO + */ + +#include +#include + +/*************************************************************************** + * TYPEDEFS AND ENUMERATIONS * + ***************************************************************************/ + +/*! + * @name General Setup and Audio Device Access Typedefs and Enumerations + * Typedefs and enumerations that are used for initial access to the + * PMIC Audio hardware. + */ +/*@{*/ + +/*! + * @typedef PMIC_AUDIO_HANDLE + * @brief Define typedef for a handle to the PMIC Audio hardware. + * + * Define a "handle" that is returned when the PMIC Audio hardware + * is opened. This handle grants exclusive access to the PMIC Audio + * hardware and must be used in all subsequent function calls. When access + * to the PMIC Audio hardware is no longer required, then a close + * operation must be done with this handle. The handle is no longer valid + * if the close operation was successful. + */ +typedef long *PMIC_AUDIO_HANDLE; + +/*! + * @enum PMIC_AUDIO_EVENTS + * @brief Identify the audio events that have been detected and should be + * handled. + * + * This enumeration defines all of the possible PMIC Audio events. Multiple + * events may be selected when defining a mask and multiple events may be + * signalled together. + * + * Note that the MICROPHONE_DETECT and MICROPHONE_REMOVED events may also be + * used to signal the operation of a serial or parallel microphone switch + * when used with a combined headset+microphone device. In that case the + * HEADSET_DETECT state must also be checked to determine if it's only the + * microphone switch being operated or whether the microphone has truly been + * inserted/removed (along with the headset). + */ +typedef enum { + HEADSET_DETECTED = 1, /*!< Detected headset insertion. */ + HEADSET_STEREO = 2, /*!< Detected stereo headset device. */ + HEADSET_MONO = 4, /*!< Detected mono headset device. */ + HEADSET_THERMAL_SHUTDOWN = 8, /*!< Detected output amplifier + shutdown due to thermal + limits . */ + HEADSET_SHORT_CIRCUIT = 16, /*!< Detected output amplifier + short circuit condition + . */ + HEADSET_REMOVED = 32, /*!< Detected headset removal. */ + MICROPHONE_DETECTED = 64, /*!< Detected microphone insertion. */ + MICROPHONE_REMOVED = 128, /*!< Detected microphone removal. */ + PTT_BUTTON_PRESS = 256, /*!< Detected PTT button down + . */ + PTT_BUTTON_RANGE = 512, /*!< Detected PTT button within + voltage range + . */ + PTT_SHORT_OR_INVALID = 1024 /*!< Detected PTT button outside + of voltage range or invalid + device . */ +} PMIC_AUDIO_EVENTS; + +/*! + * @typedef PMIC_AUDIO_CALLBACK + * @brief Typedef for PMIC Audio event notification callback function. + * + * Define a typedef for the PMIC Audio event notification callback + * function. The signalled events are passed to the function as the first + * argument. The callback function should then process whatever events it + * can and then return the set of unhandled events (if any). + */ +typedef PMIC_AUDIO_EVENTS(*PMIC_AUDIO_CALLBACK) (const PMIC_AUDIO_EVENTS event); + +typedef struct { + int hs_state; + int event_type; +} PMIC_HS_STATE; + +/*! + * @enum PMIC_AUDIO_SOURCE + * @brief Select an audio signal processing component. + * + * This enumeration defines all of the possible PMIC audio signal handling + * components which can be acquired by calling pmic_audio_open(). + * + * Note that the EXTERNAL_STEREO_IN selection is used to simply gain access + * to the stereo input pins. The stereo input signal can then be routed + * directly to the output amplifiers. In this case, no signal processing is + * done by either the Voice CODEC or the Stereo DAC. + */ +typedef enum { + STEREO_DAC, /*!< Open connection to Stereo DAC. */ + VOICE_CODEC, /*!< Open connection to Voice CODEC. */ + EXTERNAL_STEREO_IN /*!< Open connection to external stereo inputs. */ +} PMIC_AUDIO_SOURCE; + +/*@}*/ + +/*! + * @name Data Bus Setup and Configuration Typedefs and Enumerations + * Typedefs and enumerations that are used to define and configure + * the data bus protocol in order to communicate with the Stereo DAC + * or the Voice CODEC. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_DATA_BUS + * @brief Select the data bus used to transfer data between the host and + * Voice CODEC and/or the Stereo DAC. + * + * This enumeration defines all of the possible PMIC audio data buses that + * can be used to transfer data between the host and the Voice CODEC and/or + * the Stereo DAC on the PMIC. + * + * Note that the same data bus may be used to transfer audio data to/from + * the Voice CODEC and the Stereo DAC. However, in this case, the data bus + * must be configured for network mode with different timeslots assigned to + * the Voice CODEC and the Stereo DAC. Also, the sampling rates must be + * identical for both the Voice CODEC and the Stereo DAC in order to avoid + * a data bus timing conflict and audio signal distortion. + */ +typedef enum { + AUDIO_DATA_BUS_1, /*!< Use data bus 1 for audio data. */ + AUDIO_DATA_BUS_2 /*!< Use data bus 2 for audio data. */ +} PMIC_AUDIO_DATA_BUS; + +/*! + * @enum PMIC_AUDIO_BUS_PROTOCOL + * @brief Select the data bus protocol to be used. + * + * This enumeration defines all of the possible PMIC audio data bus protocols + * that may be selected. + */ +typedef enum { + NORMAL_MSB_JUSTIFIED_MODE, /*!< Transmit and receive audio data + in normal MSB-justified mode. */ + NETWORK_MODE, /*!< Transmit and receive audio data + in network mode. */ + I2S_MODE, /*!< Transmit and receive audio data + in I2S mode. */ + SPD_IF_MODE /*!< Transmit and receive audio data + in SPD/IF mode . */ +} PMIC_AUDIO_BUS_PROTOCOL; + +/*! + * @enum PMIC_AUDIO_BUS_MODE + * @brief Select the data bus mode to be used. + * + * This enumeration defines all of the possible PMIC audio data bus modes + * that may be selected. When configured in BUS_MASTER_MODE, the PMIC is + * responsible for supplying the data bus clock signals. Alternatively, + * when configured in BUS_SLAVE_MODE, the PMIC will use the data bus clock + * signals that are supplied by the bus master. + */ +typedef enum { + BUS_MASTER_MODE = 0, /*!< Operate as bus master. */ + BUS_SLAVE_MODE = 1 /*!< Operate as bus slave. */ +} PMIC_AUDIO_BUS_MODE; + +/*! + * @enum PMIC_AUDIO_CLOCK_IN_SOURCE + * @brief Select the clock signal source when in bus master mode. + * + * This enumeration defines all of the possible PMIC audio clock signal + * sources that may be selected. One of these clock signal sources must + * be selected in order to use either the Voice CODEC or the Stereo DAC. + * + * When configured in BUS_MASTER_MODE, the PMIC's onboard PLL circuits + * will also be driven by the selected clock input signal. + */ +typedef enum { + CLOCK_IN_DEFAULT, /*!< Just use default (power-up) clock input. */ + CLOCK_IN_CLIA, /*!< Use the CLIA clock source (Stereo DAC + default) . */ + CLOCK_IN_CLIB, /*!< Use the CLIB clock source (Voice CODEC + default) . */ + CLOCK_IN_CLKIN, /*!< Use the CLKIN clock source + . */ + CLOCK_IN_MCLK, /*!< Disable the internal PLL and use the MCLK + clock source (Stereo DAC only) + . */ + CLOCK_IN_FSYNC, /*!< Internal PLL input from external framesync + (Stereo DAC only) . */ + CLOCK_IN_BITCLK /*!< Internal PLL input from external bitclock + (Stereo DAC only) */ +} PMIC_AUDIO_CLOCK_IN_SOURCE; + +/*! + * @enum PMIC_AUDIO_CLOCK_INVERT + * @brief Select whether to invert the frame sync or bit clock signals. + * + * This enumeration enables or disables the inversion of the incoming + * frame sync or bit clock signals. + */ +typedef enum { + NO_INVERT = 0, /*!< Do not invert the clock signals. */ + INVERT_BITCLOCK = 1, /*!< Invert the BCLK input signal. */ + INVERT_FRAMESYNC = 2 /*!< Invert the FSYNC input signal. */ +} PMIC_AUDIO_CLOCK_INVERT; + +/*! + * @enum PMIC_AUDIO_NUMSLOTS + * @brief Select whether to invert the frame sync or bit clock signals. + * + * This enumeration defines all of the possible number of timeslots that may + * be selected when the PMIC is configured as the data bus master. One of these + * options must be selected if the Stereo DAC is to provide the data bus + * clock signals. + * + * Note that the Voice CODEC currently only allows USE_4_TIMESLOTS when + * operating in data bus master mode. + */ +typedef enum { + USE_2_TIMESLOTS, /*!< Configure for 2 timeslots. */ + USE_4_TIMESLOTS, /*!< Configure for 4 timeslots. */ + USE_8_STAR_TIMESLOTS, /*!< Configure for 8 (Left, Right, 6 other) timeslots. */ + USE_8_TIMESLOTS /*!< Configure for 8 timeslots. */ +} PMIC_AUDIO_NUMSLOTS; + +/*! + * @enum PMIC_AUDIO_STDAC_SAMPLING_RATE + * @brief Select the audio data sampling rate for the Stereo DAC. + * + * This enumeration defines all of the possible sampling rates currently + * supported by the Stereo DAC. One of these sampling rates must be selected + * and it must match that of the audio stream or else signal distortion will + * occur. + */ +typedef enum { + STDAC_RATE_8_KHZ, /*!< Use 8 kHz sampling rate. */ + STDAC_RATE_11_025_KHZ, /*!< Use 11.025 kHz sampling rate. */ + STDAC_RATE_12_KHZ, /*!< Use 12 kHz sampling rate. */ + STDAC_RATE_16_KHZ, /*!< Use 16 kHz sampling rate. */ + STDAC_RATE_22_050_KHZ, /*!< Use 22.050 kHz sampling rate. */ + STDAC_RATE_24_KHZ, /*!< Use 24 kHz sampling rate. */ + STDAC_RATE_32_KHZ, /*!< Use 32 kHz sampling rate. */ + STDAC_RATE_44_1_KHZ, /*!< Use 44.1 kHz sampling rate. */ + STDAC_RATE_48_KHZ, /*!< Use 48 kHz sampling rate. */ + STDAC_RATE_64_KHZ, /*!< Use 64 kHz sampling rate + . */ + STDAC_RATE_96_KHZ /*!< Use 96 kHz sampling rate. + . */ +} PMIC_AUDIO_STDAC_SAMPLING_RATE; + +/*! + * @enum PMIC_AUDIO_VCODEC_SAMPLING_RATE + * @brief Select the audio data sampling rate for the Voice CODEC. + * + * This enumeration defines all of the possible sampling rates currently + * supported by the Voice CODEC. One of these sampling rates must be selected + * and it must match that of the audio stream or else signal distortion will + * occur. + */ +typedef enum { + VCODEC_RATE_8_KHZ, /*!< Use 8 kHz sampling rate. */ + VCODEC_RATE_16_KHZ, /*!< Use 16 kHz sampling rate. */ +} PMIC_AUDIO_VCODEC_SAMPLING_RATE; + +/*! + * @enum PMIC_AUDIO_ANTI_POP_RAMP_SPEED + * @brief Select the anti-pop circuitry's ramp up speed. + * + * This enumeration defines all of the possible ramp up speeds for the + * anti-pop circuitry. A slow ramp up speed may be required in order to + * avoid the popping noise that is typically generated during the insertion + * or removal of a headset or microphone. + */ +typedef enum { + ANTI_POP_RAMP_FAST, /*!< Select fast ramp up. */ + ANTI_POP_RAMP_SLOW /*!< Select slow ramp up. */ +} PMIC_AUDIO_ANTI_POP_RAMP_SPEED; + +/*@}*/ + +/*! + * @name General Voice CODEC Configuration Typedefs and Enumerations + * Typedefs and enumerations that are used to define and configure + * the basic operating options for the Voice CODEC. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ + * @brief Select the Voice CODEC input clock frequency. + * + * This enumeration defines all of the supported Voice CODEC input clock + * frequencies. One of these frequencies must be selected in order to + * properly configure the Voice CODEC to operate at the required sampling + * rate. + */ +typedef enum { + VCODEC_CLI_13MHZ, /*!< Clock frequency is 13MHz. */ + VCODEC_CLI_15_36MHZ, /*!< Clock frequency is 15.36MHz. */ + VCODEC_CLI_16_8MHZ, /*!< Clock frequency is 16.8MHz + . */ + VCODEC_CLI_26MHZ, /*!< Clock frequency is 26MHz. */ + VCODEC_CLI_33_6MHZ, /*!< Clock frequency is 33.6MHz. */ +} PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ; + +/*! + * @enum PMIC_AUDIO_VCODEC_CONFIG + * @brief Select the Voice CODEC configuration options. + * + * This enumeration is used to enable/disable each of the Voice CODEC options. + * This includes the use of highpass digital filters and audio signal + * loopback modes. + * + * Note that resetting the digital filters is now handled by the + * pmic_audio_digital_filter_reset() API. + */ +typedef enum { + DITHERING = 1, /*!< Enable/disable dithering. */ + INPUT_HIGHPASS_FILTER = 2, /*!< Enable/disable the input high + pass digital filter. */ + OUTPUT_HIGHPASS_FILTER = 4, /*!< Enable/disable the output high + pass digital filter. */ + ANALOG_LOOPBACK = 8, /*!< Enable/disable the analog + loopback path + . */ + DIGITAL_LOOPBACK = 16, /*!< Enable/disable the digital + loopback path. */ + VCODEC_MASTER_CLOCK_OUTPUTS = 32, /*!< Enable/disable the bus master + clock outputs. */ + TRISTATE_TS = 64 /*!< Enable/disable FSYNC, BITCLK, + and TX tristate. */ +} PMIC_AUDIO_VCODEC_CONFIG; + +/*@}*/ + +/*! + * @name General Stereo DAC Configuration Typedefs and Enumerations + * Typedefs and enumerations that are used to define and configure + * the basic operating options for the Stereo DAC. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_STDAC_CLOCK_IN_FREQ + * @brief Select the Stereo DAC input clock frequency. + * + * This enumeration defines all of the supported Stereo DAC input clock + * frequencies. One of these frequencies must be selected in order to + * properly configure the Stereo DAC to operate at the required sampling + * rate. + */ +typedef enum { + STDAC_CLI_3_36864MHZ, /*!< Clock frequency is 3.36864MHz + . */ + STDAC_CLI_12MHZ, /*!< Clock frequency is 12MHz. + . */ + STDAC_CLI_13MHZ, /*!< Clock frequency is 13MHz. */ + STDAC_CLI_15_36MHZ, /*!< Clock frequency is 15.36MHz. */ + STDAC_CLI_16_8MHZ, /*!< Clock frequency is 16.8MHz + . */ + STDAC_CLI_26MHZ, /*!< Clock frequency is 26MHz. */ + STDAC_CLI_33_6MHZ, /*!< Clock frequency is 33.6MHz. */ + STDAC_MCLK_PLL_DISABLED, /*!< Use MCLK and disable internal PLL. */ + STDAC_FSYNC_IN_PLL, /*!< Use FSYNC as internal PLL input. */ + STDAC_BCLK_IN_PLL /*!< Use BCLK as internal PLL input. */ +} PMIC_AUDIO_STDAC_CLOCK_IN_FREQ; + +/*! + * @enum PMIC_AUDIO_STDAC_CONFIG + * @brief Select the Stereo DAC configuration options. + * + * This enumeration is used to enable/disable each of the Stereo DAC options. + */ +typedef enum { + STDAC_MASTER_CLOCK_OUTPUTS = 1 /*!< Enable/disable the bus master clock + outputs. */ +} PMIC_AUDIO_STDAC_CONFIG; + +/*@}*/ + +/*! + * @name Voice CODEC Audio Port Mixing Typedefs and Enumerations + * Typedefs and enumerations that are used for setting up the audio mixer + * within the Voice CODEC. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_VCODEC_TIMESLOT + * @brief Select the Stereo DAC configuration options. + * + * This enumeration is used to select the timeslot for both the primary and + * secondary (for mc13783-only) audio channels to the Voice CODEC. + */ +typedef enum { + USE_TS0, /*!< Use timeslot 0 for audio signal source + . */ + USE_TS1, /*!< Use timeslot 1 for audio signal source + . */ + USE_TS2, /*!< Use timeslot 2 for audio signal source + . */ + USE_TS3 /*!< Use timeslot 3 for audio signal source + . */ +} PMIC_AUDIO_VCODEC_TIMESLOT; + +/*! + * @enum PMIC_AUDIO_VCODEC_MIX_IN_GAIN + * @brief Select the secondary channel input gain for the Voice CODEC mixer. + * + * This enumeration selects the secondary channel input gain for the Voice + * CODEC mixer. + */ +typedef enum { + VCODEC_NO_MIX, /*!< No audio mixing . */ + VCODEC_MIX_IN_0DB, /*!< Mix with 0dB secondary channel gain + . */ + VCODEC_MIX_IN_MINUS_6DB, /*!< Mix with -6dB secondary channel gain + . */ + VCODEC_MIX_IN_MINUS_12DB, /*!< Mix with -12dB secondary channel gain + . */ +} PMIC_AUDIO_VCODEC_MIX_IN_GAIN; + +/*! + * @enum PMIC_AUDIO_VCODEC_MIX_OUT_GAIN + * @brief Select the output gain for the Voice CODEC mixer. + * + * This enumeration selects the output gain for the Voice CODEC mixer. + */ +typedef enum { + VCODEC_MIX_OUT_0DB, /*!< Select 0dB mixer output gain + . */ + VCODEC_MIX_OUT_MINUS_6DB, /*!< Select -6dB mixer output gain + . */ +} PMIC_AUDIO_VCODEC_MIX_OUT_GAIN; + +/*@}*/ + +/*! + * @name Stereo DAC Audio Port Mixing Typedefs and Enumerations + * Typedefs and enumerations that are used for setting up the audio mixer + * within the Stereo DAC. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_STDAC_TIMESLOTS + * @brief Select the timeslots used to transmit the left and right audio + * channels to the Stereo DAC. + * + * This enumeration is used to select the timeslots used to transmit the + * data corresponding to the left and right audio channels to the Stereo + * DAC. + */ +typedef enum { + USE_TS0_TS1, /*!< Use timeslots 0 and 1 for left and + right channels, respectively. */ + USE_TS2_TS3, /*!< Use timeslots 2 and 3 for left and + right channels, respectively + . */ + USE_TS4_TS5, /*!< Use timeslots 4 and 5 for left and + right channels, respectively + . */ + USE_TS6_TS7 /*!< Use timeslots 6 and 7 for left and + right channels, respectively + . */ +} PMIC_AUDIO_STDAC_TIMESLOTS; + +/*! + * @enum PMIC_AUDIO_STDAC_MIX_IN_GAIN + * @brief Select the secondary channel input gain for the Stereo DAC mixer. + * + * This enumeration is used to select the secondary channel input gain for + * the Stereo DAC mixer. + */ +typedef enum { + STDAC_NO_MIX, /*!< No mixing, keep separate left + and right audio channels. */ + STDAC_MIX_IN_0DB, /*!< Mix left and right audio channels + together with 0dB secondary + channel gain. */ + STDAC_MIX_IN_MINUS_6DB, /*!< Mix left and right audio channels + together with -6dB secondary + channel gain. */ + STDAC_MIX_IN_MINUS_12DB /*!< Mix left and right audio channels + together with -12dB secondary + channel gain . */ +} PMIC_AUDIO_STDAC_MIX_IN_GAIN; + +/*! + * @enum PMIC_AUDIO_STDAC_MIX_OUT_GAIN + * @brief Select the output gain for the Stereo DAC mixer. + * + * This enumeration is used to select the output gain for the Stereo DAC + * mixer. + */ +typedef enum { + STDAC_MIX_OUT_0DB, /*!< Select 0dB mixer output gain. */ + STDAC_MIX_OUT_MINUS_6DB, /*!< Select -6dB mixer output gain + . */ +} PMIC_AUDIO_STDAC_MIX_OUT_GAIN; + +/*@}*/ + +/*! + * @name Microphone Input Typedefs and Enumerations + * Typedefs and enumerations that are used for selecting and setting up + * one or more or microphone inputs for recording. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_MIC_BIAS + * @brief Select the microphone bias circuit to be enabled/disabled. + * + * This enumeration lists all of the available microphone bias circuits that + * may be enabled or disabled. + */ +typedef enum { + NO_BIAS = 0, /*!< No microphone bias circuit selected. */ + MIC_BIAS1 = 1, /*!< Enable/disable microphone bias 1 circuit. */ + MIC_BIAS2 = 2, /*!< Enable/disable microphone bias 2 circuit. */ +} PMIC_AUDIO_MIC_BIAS; + +/*! + * @enum PMIC_AUDIO_INPUT_PORT + * @brief Select an audio input port for recording. + * + * This enumeration lists all of the available audio input ports that may + * be selected for a recording operation. + */ +typedef enum { + NO_MIC, /*!< No microphone input selected. */ + MIC1_LEFT, /*!< Enable left/mono channel microphone input + . */ + MIC1_RIGHT_MIC_MONO, /*!< Enable right channel microphone input. */ + MIC2_AUX, /*!< Enable auxiliary microphone input. */ + TXIN_EXT /*!< Enable external mono input. */ +} PMIC_AUDIO_INPUT_PORT; + +/*! + * @enum PMIC_AUDIO_INPUT_MIC_STATE + * @brief Control whether the input microphone is on/off. + * + * This enumeration allows the currently selected input microphone amplifier + * to be turned on/off. + */ +typedef enum { + MICROPHONE_ON, /*!< Turn microphone input on for recording. */ + MICROPHONE_OFF /*!< Turn microphone input off (mute). */ +} PMIC_AUDIO_INPUT_MIC_STATE; + +/*! + * @enum PMIC_AUDIO_INPUT_CONFIG + * @brief Enable/disable the audio input options. + * + * This enumeration allows for enabling/disabling any of the audio input + * section options. + */ +typedef enum { + MIC_AMP_AUTO_DISABLE = 1 /*!< Enable/disable automatic disabling of + microphone input amplifiers following + headset insertion/removal */ +} PMIC_AUDIO_INPUT_CONFIG; + +/*! + * @enum PMIC_AUDIO_MIC_AMP_MODE + * @brief Select the operating mode for the microphone amplifiers. + * + * This enumeration is used to select the operating mode for the microphone + * amplifier. + */ +typedef enum { + AMP_OFF, /*!< Disable input amplifier. */ + VOLTAGE_TO_VOLTAGE, /*!< Operate input amplifier in + voltage-to-voltage mode + . */ + CURRENT_TO_VOLTAGE /*!< Operate input amplifier in + current-to-voltage mode */ +} PMIC_AUDIO_MIC_AMP_MODE; + +/*! + * @enum PMIC_AUDIO_MIC_GAIN + * @brief Select the microphone amplifier gain level. + * + * This enumeration lists all of the available microphone amplifier gain + * levels. + */ +typedef enum { + MIC_GAIN_MINUS_8DB, /*!< Select -8dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_7DB, /*!< Select -7dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_6DB, /*!< Select -6dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_5DB, /*!< Select -5dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_4DB, /*!< Select -4dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_3DB, /*!< Select -3dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_2DB, /*!< Select -2dB microphone amplifier gain + . */ + MIC_GAIN_MINUS_1DB, /*!< Select -1dB microphone amplifier gain + . */ + MIC_GAIN_0DB, /*!< Select 0dB microphone amplifier gain. */ + MIC_GAIN_PLUS_1DB, /*!< Select 1dB microphone amplifier gain. */ + MIC_GAIN_PLUS_2DB, /*!< Select 2dB microphone amplifier gain. */ + MIC_GAIN_PLUS_3DB, /*!< Select 3dB microphone amplifier gain. */ + MIC_GAIN_PLUS_4DB, /*!< Select 4dB microphone amplifier gain. */ + MIC_GAIN_PLUS_5DB, /*!< Select 5dB microphone amplifier gain. */ + MIC_GAIN_PLUS_6DB, /*!< Select 6dB microphone amplifier gain. */ + MIC_GAIN_PLUS_7DB, /*!< Select 7dB microphone amplifier gain. */ + MIC_GAIN_PLUS_8DB, /*!< Select 8dB microphone amplifier gain. */ + MIC_GAIN_PLUS_9DB, /*!< Select 9dB microphone amplifier gain. */ + MIC_GAIN_PLUS_10DB, /*!< Select 10dB microphone amplifier gain. */ + MIC_GAIN_PLUS_11DB, /*!< Select 11dB microphone amplifier gain. */ + MIC_GAIN_PLUS_12DB, /*!< Select 12dB microphone amplifier gain. */ + MIC_GAIN_PLUS_13DB, /*!< Select 13dB microphone amplifier gain. */ + MIC_GAIN_PLUS_14DB, /*!< Select 14dB microphone amplifier gain. */ + MIC_GAIN_PLUS_15DB, /*!< Select 15dB microphone amplifier gain. */ + MIC_GAIN_PLUS_16DB, /*!< Select 16dB microphone amplifier gain. */ + MIC_GAIN_PLUS_17DB, /*!< Select 17dB microphone amplifier gain. */ + MIC_GAIN_PLUS_18DB, /*!< Select 18dB microphone amplifier gain. */ + MIC_GAIN_PLUS_19DB, /*!< Select 19dB microphone amplifier gain. */ + MIC_GAIN_PLUS_20DB, /*!< Select 20dB microphone amplifier gain. */ + MIC_GAIN_PLUS_21DB, /*!< Select 21dB microphone amplifier gain. */ + MIC_GAIN_PLUS_22DB, /*!< Select 22dB microphone amplifier gain. */ + MIC_GAIN_PLUS_23DB, /*!< Select 23dB microphone amplifier gain. */ + MIC_GAIN_PLUS_24DB, /*!< Select 24dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_25DB, /*!< Select 25dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_26DB, /*!< Select 26dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_27DB, /*!< Select 27dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_28DB, /*!< Select 28dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_29DB, /*!< Select 29dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_30DB, /*!< Select 30dB microphone amplifier gain + . */ + MIC_GAIN_PLUS_31DB /*!< Select 31dB microphone amplifier gain + . */ +} PMIC_AUDIO_MIC_GAIN; + +/*@}*/ + +/*! + * @name Audio Output Section Typedefs and Enumerations + * Typedefs and enumerations that are used for selecting and setting up + * one or more or audio output ports for playback. + */ +/*@{*/ + +/*! + * @enum PMIC_AUDIO_OUTPUT_PORT + * @brief Select the audio output port. + * + * This enumeration lists all of the available audio output ports. One or + * more may be selected as desired to handle the output audio stream from + * either the Voice CODEC or the Stereo DAC. + */ +typedef enum { + MONO_SPEAKER = 1, /*!< Select mono output speaker. */ + MONO_LOUDSPEAKER = 2, /*!< Select mono loudspeaker + . */ + MONO_ALERT = 4, /*!< Select mono alert output */ + MONO_EXTOUT = 8, /*!< Select mono external output */ + MONO_CDCOUT = 16, /*!< Select dedicated Voice CODEC output + . */ + STEREO_LEFT_LOW_POWER = 32, /*!< Select stereo left channel low power + output . */ + STEREO_HEADSET_LEFT = 64, /*!< Select stereo headset left channel. */ + STEREO_HEADSET_RIGHT = 128, /*!< Select stereo headset right channel. */ + STEREO_OUT_LEFT = 256, /*!< Select stereo external left channel + output . */ + STEREO_OUT_RIGHT = 512 /*!< Select stereo external right channel + output . */ +} PMIC_AUDIO_OUTPUT_PORT; + +/*! + * @enum PMIC_AUDIO_OUTPUT_CONFIG + * @brief Enable/disable the audio output section options. + * + * This enumeration is used to enable/disable any of the audio output section + * options. + */ +typedef enum { + MONO_SPEAKER_INVERT_OUT_ONLY = 1, /*!< Enable/disable the non-inverted + mono speaker output */ + MONO_LOUDSPEAKER_COMMON_BIAS = 2, /*!< Enable/disable the loudspeaker + output amplifier common bias + . */ + HEADSET_DETECT_ENABLE = 4, /*!< Enable/disable headset + insertion/removal detection + . */ + STEREO_HEADSET_AMP_AUTO_DISABLE = 8 /*!< Enable/disable automatic + disabling of the stereo headset + output amplifiers following + headset insertion/removal. */ +} PMIC_AUDIO_OUTPUT_CONFIG; + +/*! + * @enum PMIC_AUDIO_STEREO_IN_GAIN + * @brief Select the amplifier gain for the external stereo inputs. + * + * This enumeration is used to select the amplifier gain level to be used for + * the external stereo inputs. + */ +typedef enum { + STEREO_IN_GAIN_0DB, /*!< Select 0dB external stereo signal + input gain. */ + STEREO_IN_GAIN_PLUS_18DB /*!< Select 18dB external stereo signal + input gain . */ +} PMIC_AUDIO_STEREO_IN_GAIN; + +/*! + * @enum PMIC_AUDIO_OUTPUT_PGA_GAIN + * @brief Select the output PGA amplifier gain level. + * + * This enumeration is used to select the output PGA amplifier gain level. + */ +typedef enum { + OUTPGA_GAIN_MINUS_33DB, /*!< Select -33dB output PGA gain + . */ + OUTPGA_GAIN_MINUS_30DB, /*!< Select -30dB output PGA gain + . */ + OUTPGA_GAIN_MINUS_27DB, /*!< Select -27dB output PGA gain + . */ + OUTPGA_GAIN_MINUS_24DB, /*!< Select -24dB output PGA gain. */ + OUTPGA_GAIN_MINUS_21DB, /*!< Select -21dB output PGA gain. */ + OUTPGA_GAIN_MINUS_18DB, /*!< Select -18dB output PGA gain. */ + OUTPGA_GAIN_MINUS_15DB, /*!< Select -15dB output PGA gain. */ + OUTPGA_GAIN_MINUS_12DB, /*!< Select -12dB output PGA gain. */ + OUTPGA_GAIN_MINUS_9DB, /*!< Select -9dB output PGA gain. */ + OUTPGA_GAIN_MINUS_6DB, /*!< Select -6dB output PGA gain. */ + OUTPGA_GAIN_MINUS_3DB, /*!< Select -3dB output PGA gain. */ + OUTPGA_GAIN_0DB, /*!< Select 0dB output PGA gain. */ + OUTPGA_GAIN_PLUS_3DB, /*!< Select 3dB output PGA gain. */ + OUTPGA_GAIN_PLUS_6DB, /*!< Select 6dB output PGA gain. */ + OUTPGA_GAIN_PLUS_9DB, /*!< Select 9dB output PGA gain. + . */ + OUTPGA_GAIN_PLUS_12DB, /*!< Select 12dB output PGA gain + . */ + OUTPGA_GAIN_PLUS_15DB, /*!< Select 15dB output PGA gain + . */ + OUTPGA_GAIN_PLUS_18DB, /*!< Select 18dB output PGA gain + . */ + OUTPGA_GAIN_PLUS_21DB /*!< Select 21dB output PGA gain + . */ +} PMIC_AUDIO_OUTPUT_PGA_GAIN; + +/*! + * @enum PMIC_AUDIO_OUTPUT_BALANCE_GAIN + * @brief Select the left/right channel balance gain level. + * + * This enumeration is used to select the balance gain level that is to be + * separately applied to the left and right audio channels. + */ +typedef enum { + BAL_GAIN_MINUS_21DB, /*!< Select -21dB channel balance + gain . */ + BAL_GAIN_MINUS_18DB, /*!< Select -18dB channel balance + gain . */ + BAL_GAIN_MINUS_15DB, /*!< Select -15dB channel balance + gain . */ + BAL_GAIN_MINUS_12DB, /*!< Select -12dB channel balance + gain . */ + BAL_GAIN_MINUS_9DB, /*!< Select -9dB channel balance + gain . */ + BAL_GAIN_MINUS_6DB, /*!< Select -6dB channel balance + gain . */ + BAL_GAIN_MINUS_3DB, /*!< Select -3dB channel balance + gain . */ + BAL_GAIN_0DB /*!< Select 0dB channel balance gain. */ +} PMIC_AUDIO_OUTPUT_BALANCE_GAIN; + +/*! + * @enum PMIC_AUDIO_MONO_ADDER_MODE + * @brief Select the output mono adder operating mode. + * + * This enumeration is used to select the operating mode for the mono adder + * in the audio output section. + */ +typedef enum { + MONO_ADDER_OFF, /*!< Disable mono adder (keep separate + left and right channels). */ + MONO_ADD_LEFT_RIGHT, /*!< Add left and right channels. */ + MONO_ADD_OPPOSITE_PHASE, /*!< Add left and right channels but + with outputs in opposite phase + . */ + STEREO_OPPOSITE_PHASE /*!< Keep separate left and right + channels but invert phase of + left channel . */ +} PMIC_AUDIO_MONO_ADDER_MODE; + +/*! + * @enum PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN + * @brief Select the mono adder output amplifier gain level. + * + * This enumeration is used to select the output amplifier gain level for + * the mono adder. + */ +typedef enum { + MONOADD_GAIN_MINUS_6DB, /*!< Select -6dB mono adder output gain + . */ + MONOADD_GAIN_MINUS_3DB, /*!< Select -3dB mono adder output gain + . */ + MONOADD_GAIN_0DB /*!< Select 0dB mono adder output gain. */ +} PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN; + +/*@}*/ + +/*************************************************************************** + * PMIC-SPECIFIC DEFINITIONS * + ***************************************************************************/ + +/*! + * @name Definition of PMIC-specific Capabilities + * Constants that are used to define PMIC-specific capabilities. + */ +/*@{*/ + +/*! + * Define the minimum Stereo DAC sampling rate (Hz). + */ +extern const unsigned MIN_STDAC_SAMPLING_RATE_HZ; +/*! + * Define the maximum Stereo DAC sampling rate (Hz). + */ +extern const unsigned MAX_STDAC_SAMPLING_RATE_HZ; + +/*@}*/ + +#define DEBUG_AUDIO + +#ifdef __KERNEL__ + +/*************************************************************************** + * PMIC API DEFINITIONS * + ***************************************************************************/ + +/*! + * @name General Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Audio + * hardware. + */ +/*@{*/ + +/*! + * This function enables the Headset detection mechanism in hardware + */ +PMIC_STATUS pmic_audio_set_autodetect(int val); + +/*! + * @brief Request exclusive access to the PMIC Audio hardware. + * + * Attempt to open and gain exclusive access to a key PMIC audio hardware + * component (e.g., the Stereo DAC or the Voice CODEC). Depending upon the + * type of audio operation that is desired and the nature of the audio data + * stream, the Stereo DAC and/or the Voice CODEC will be a required hardware + * component and needs to be acquired by calling this function. + * + * If the open request is successful, then a numeric handle is returned + * and this handle must be used in all subsequent function calls to complete + * the configuration of either the Stereo DAC or the Voice CODEC and along + * with any other associated audio hardware components that will be needed. + * + * The same handle must also be used in the close call when use of the PMIC + * audio hardware is no longer required. + * + * The open request will fail if the requested audio hardware component has + * already been acquired by a previous open call but not yet closed. + * + * @param[out] handle Device handle to be used for subsequent PMIC + * Connectivity API calls. + * @param[in] device The required PMIC audio hardware component. + * + * @retval PMIC_SUCCESS If the open request was successful + * @retval PMIC_PARAMETER_ERROR If the handle argument is NULL. + * @retval PMIC_ERROR If the audio hardware component is + * unavailable. + */ +PMIC_STATUS pmic_audio_open(PMIC_AUDIO_HANDLE * const handle, + const PMIC_AUDIO_SOURCE device); + +/*! + * @brief Terminate further access to the PMIC audio hardware. + * + * Terminate further access to the PMIC audio hardware that was previously + * acquired by calling pmic_audio_open(). This now allows another thread to + * successfully call pmic_audio_open() to gain access. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the close request was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_close(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Configure the data bus protocol to be used. + * + * Provide the parameters needed to properly configure the audio data bus + * protocol so that data can be read/written to either the Stereo DAC or + * the Voice CODEC. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] busID Select data bus to be used. + * @param[in] protocol Select the data bus protocol. + * @param[in] masterSlave Select the data bus timing mode. + * @param[in] numSlots Define the number of timeslots (only if in + * master mode). + * + * @retval PMIC_SUCCESS If the protocol was successful configured. + * @retval PMIC_PARAMETER_ERROR If the handle or the protocol parameters + * are invalid. + */ +PMIC_STATUS pmic_audio_set_protocol(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_DATA_BUS busID, + const PMIC_AUDIO_BUS_PROTOCOL protocol, + const PMIC_AUDIO_BUS_MODE masterSlave, + const PMIC_AUDIO_NUMSLOTS numSlots); + +/*! + * @brief Retrieve the current data bus protocol configuration. + * + * Retrieve the parameters that define the current audio data bus protocol. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] busID The data bus being used. + * @param[out] protocol The data bus protocol being used. + * @param[out] masterSlave The data bus timing mode being used. + * @param[out] numSlots The number of timeslots being used (if in + * master mode). + * + * @retval PMIC_SUCCESS If the protocol was successful retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_get_protocol(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_DATA_BUS * const busID, + PMIC_AUDIO_BUS_PROTOCOL * const protocol, + PMIC_AUDIO_BUS_MODE * const masterSlave, + PMIC_AUDIO_NUMSLOTS * const numSlots); + +/*! + * @brief Enable the Stereo DAC or the Voice CODEC. + * + * Explicitly enable the Stereo DAC or the Voice CODEC to begin audio + * playback or recording as required. This should only be done after + * successfully configuring all of the associated audio components (e.g., + * microphones, amplifiers, etc.). + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the device was successful enabled. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the device could not be enabled. + */ +PMIC_STATUS pmic_audio_enable(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Disable the Stereo DAC or the Voice CODEC. + * + * Explicitly disable the Stereo DAC or the Voice CODEC to end audio + * playback or recording as required. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the device was successful disabled. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the device could not be disabled. + */ +PMIC_STATUS pmic_audio_disable(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Reset the selected audio hardware control registers to their + * power on state. + * + * This resets all of the audio hardware control registers currently + * associated with the device handle back to their power on states. For + * example, if the handle is associated with the Stereo DAC and a + * specific output port and output amplifiers, then this function will + * reset all of those components to their power on state. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the reset operation was successful. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + * @retval PMIC_ERROR If the reset was unsuccessful. + */ +PMIC_STATUS pmic_audio_reset(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Reset all audio hardware control registers to their power on state. + * + * This resets all of the audio hardware control registers back to their + * power on states. Use this function with care since it also invalidates + * (i.e., automatically closes) all currently opened device handles. + * + * @retval PMIC_SUCCESS If the reset operation was successful. + * @retval PMIC_ERROR If the reset was unsuccessful. + */ +PMIC_STATUS pmic_audio_reset_all(void); + +/*! + * @brief Set the Audio callback function. + * + * Register a callback function that will be used to signal PMIC audio + * events. For example, the OSS audio driver should register a callback + * function in order to be notified of headset connect/disconnect events. + * + * @param[in] func A pointer to the callback function. + * @param[in] eventMask A mask selecting events to be notified. + * @param[in] hs_state To know the headset state. + * + * @retval PMIC_SUCCESS If the callback was successfully + * registered. + * @retval PMIC_PARAMETER_ERROR If the handle or the eventMask is invalid. + */ +PMIC_STATUS pmic_audio_set_callback(void *func, + const PMIC_AUDIO_EVENTS eventMask, + PMIC_HS_STATE * hs_state); + +/*! + * @brief Deregisters the existing audio callback function. + * + * Deregister the callback function that was previously registered by calling + * pmic_audio_set_callback(). + * + * + * @retval PMIC_SUCCESS If the callback was successfully + * deregistered. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_clear_callback(void); + +/*! + * @brief Get the current audio callback function settings. + * + * Get the current callback function and event mask. + * + * @param[out] func The current callback function. + * @param[out] eventMask The current event selection mask. + * + * @retval PMIC_SUCCESS If the callback information was + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle is invalid. + */ +PMIC_STATUS pmic_audio_get_callback(PMIC_AUDIO_CALLBACK * const func, + PMIC_AUDIO_EVENTS * const eventMask); + +/*! + * @brief Enable the anti-pop circuitry to avoid extra noise when inserting + * or removing a external device (e.g., a headset). + * + * Enable the use of the built-in anti-pop circuitry to prevent noise from + * being generated when an external audio device is inserted or removed + * from an audio plug. A slow ramp speed may be needed to avoid extra noise. + * + * @param[in] rampSpeed The desired anti-pop circuitry ramp speed. + * + * @retval PMIC_SUCCESS If the anti-pop circuitry was successfully + * enabled. + * @retval PMIC_ERROR If the anti-pop circuitry could not be + * enabled. + */ +PMIC_STATUS pmic_audio_antipop_enable(const PMIC_AUDIO_ANTI_POP_RAMP_SPEED + rampSpeed); + +/*! + * @brief Disable the anti-pop circuitry. + * + * Disable the use of the built-in anti-pop circuitry to prevent noise from + * being generated when an external audio device is inserted or removed + * from an audio plug. + * + * @retval PMIC_SUCCESS If the anti-pop circuitry was successfully + * disabled. + * @retval PMIC_ERROR If the anti-pop circuitry could not be + * disabled. + */ +PMIC_STATUS pmic_audio_antipop_disable(void); + +/*! + * @brief Performs a reset of the Voice CODEC/Stereo DAC digital filter. + * + * This function performs a reset of the digital filter using the back-to-back + * SPI write procedure. + * + * @retval PMIC_SUCCESS If the digital filter was successfully + * reset. + * @retval PMIC_ERROR If the digital filter could not be reset. + */ +PMIC_STATUS pmic_audio_digital_filter_reset(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Get the most recent PTT button voltage reading. + * + * This function returns the most recent reading for the PTT button voltage. + * The value may be used during the processing of the PTT_BUTTON_RANGE event + * as part of the headset ID detection process. + * + * @retval PMIC_SUCCESS If the most recent PTT button voltage was + * returned. + * @retval PMIC_PARAMETER_ERROR If a NULL pointer argument was given. + */ +PMIC_STATUS pmic_audio_get_ptt_button_level(unsigned int *const level); + +#ifdef DEBUG_AUDIO + +/*! + * @brief Provide a hexadecimal dump of all PMIC audio registers (DEBUG only). + * + * This function is intended strictly for debugging purposes only (i.e., + * the DEBUG macro must be defined) and will print the current values of the + * following PMIC registers: + * + * - AUD_CODEC (Voice CODEC state) + * - ST_DAC (Stereo DAC state) + * - RX_AUD_AMPS (audio input section state) + * - TX_AUD_AMPS (audio output section state) + * + * The register fields will also be decoded. + */ +void pmic_audio_dump_registers(void); + +#endif /* DEBUG */ + +/*@}*/ + +/*! + * @name General Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice + * CODEC hardware. + */ +/*@{*/ + +/*! + * @brief Set the Voice CODEC clock source and operating characteristics. + * + * Define the Voice CODEC clock source and operating characteristics. This + * must be done before the Voice CODEC is enabled. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] clockIn Select the clock signal source. + * @param[in] clockFreq Select the clock signal frequency. + * @param[in] samplingRate Select the audio data sampling rate. + * @param[in] invert Enable inversion of the frame sync and/or + * bit clock inputs. + * + * @retval PMIC_SUCCESS If the Voice CODEC clock settings were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or clock configuration was + * invalid. + * @retval PMIC_ERROR If the Voice CODEC clock configuration + * could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_clock(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_CLOCK_IN_SOURCE + clockIn, + const PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ + clockFreq, + const PMIC_AUDIO_VCODEC_SAMPLING_RATE + samplingRate, + const PMIC_AUDIO_CLOCK_INVERT invert); + +/*! + * @brief Get the Voice CODEC clock source and operating characteristics. + * + * Get the current Voice CODEC clock source and operating characteristics. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] clockIn The clock signal source. + * @param[out] clockFreq The clock signal frequency. + * @param[out] samplingRate The audio data sampling rate. + * @param[out] invert Inversion of the frame sync and/or + * bit clock inputs is enabled/disabled. + * + * @retval PMIC_SUCCESS If the Voice CODEC clock settings were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle invalid. + * @retval PMIC_ERROR If the Voice CODEC clock configuration + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_clock(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_CLOCK_IN_SOURCE * + const clockIn, + PMIC_AUDIO_VCODEC_CLOCK_IN_FREQ * + const clockFreq, + PMIC_AUDIO_VCODEC_SAMPLING_RATE * + const samplingRate, + PMIC_AUDIO_CLOCK_INVERT * const invert); + +/*! + * @brief Set the Voice CODEC primary audio channel timeslot. + * + * Set the Voice CODEC primary audio channel timeslot. This function must be + * used if the default timeslot for the primary audio channel is to be changed. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] timeslot Select the primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC primary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC primary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_TIMESLOT + timeslot); + +/*! + * @brief Get the current Voice CODEC primary audio channel timeslot. + * + * Get the current Voice CODEC primary audio channel timeslot. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] timeslot The primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC primary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC primary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_VCODEC_TIMESLOT * + const timeslot); + +/*! + * @brief Set the Voice CODEC secondary recording audio channel timeslot. + * + * Set the Voice CODEC secondary audio channel timeslot. This function must be + * used if the default timeslot for the secondary audio channel is to be + * changed. The secondary audio channel timeslot is used to transmit the audio + * data that was recorded by the Voice CODEC from the secondary audio input + * channel. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] timeslot Select the secondary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC secondary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC secondary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_vcodec_set_secondary_txslot(const PMIC_AUDIO_HANDLE + handle, + const + PMIC_AUDIO_VCODEC_TIMESLOT + timeslot); + +/*! + * @brief Get the Voice CODEC secondary recording audio channel timeslot. + * + * Get the Voice CODEC secondary audio channel timeslot. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] timeslot The secondary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Voice CODEC secondary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC secondary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_secondary_txslot(const PMIC_AUDIO_HANDLE + handle, + PMIC_AUDIO_VCODEC_TIMESLOT * + const timeslot); + +/*! + * @brief Set/Enable the Voice CODEC options. + * + * Set or enable various Voice CODEC options. The available options include + * the use of dithering, highpass digital filters, and loopback modes. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The Voice CODEC options to enable. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or Voice CODEC options + * were invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * successfully set/enabled. + */ +PMIC_STATUS pmic_audio_vcodec_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_CONFIG config); + +/*! + * @brief Clear/Disable the Voice CODEC options. + * + * Clear or disable various Voice CODEC options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The Voice CODEC options to be cleared/disabled. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the Voice CODEC options + * were invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * cleared/disabled. + */ +PMIC_STATUS pmic_audio_vcodec_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_CONFIG + config); + +/*! + * @brief Get the current Voice CODEC options. + * + * Get the current Voice CODEC options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] config The current set of Voice CODEC options. + * + * @retval PMIC_SUCCESS If the Voice CODEC options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC options could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_VCODEC_CONFIG * + const config); + +/*! + * @brief Enable the Voice CODEC bypass audio pathway. + * + * Enables the Voice CODEC bypass pathway for audio data. This allows direct + * output of the voltages on the TX data bus line to the output amplifiers + * (bypassing the digital-to-analog converters within the Voice CODEC). + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC bypass was successfully + * enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC bypass could not be + * enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_bypass(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Disable the Voice CODEC bypass audio pathway. + * + * Disables the Voice CODEC bypass pathway for audio data. This means that + * the TX data bus line will deliver digital data to the digital-to-analog + * converters within the Voice CODEC. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC bypass was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC bypass could not be + * disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_bypass(const PMIC_AUDIO_HANDLE handle); + +/*@}*/ + +/*! + * @name General Stereo DAC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Stereo + * DAC hardware. + */ +/*@{*/ + +/*! + * @brief Set the Stereo DAC clock source and operating characteristics. + * + * Define the Stereo DAC clock source and operating characteristics. This + * must be done before the Stereo DAC is enabled. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] clockIn Select the clock signal source. + * @param[in] clockFreq Select the clock signal frequency. + * @param[in] samplingRate Select the audio data sampling rate. + * @param[in] invert Enable inversion of the frame sync and/or + * bit clock inputs. + * + * @retval PMIC_SUCCESS If the Stereo DAC clock settings were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or clock configuration was + * invalid. + * @retval PMIC_ERROR If the Stereo DAC clock configuration + * could not be set. + */ +PMIC_STATUS pmic_audio_stdac_set_clock(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_CLOCK_IN_SOURCE clockIn, + const PMIC_AUDIO_STDAC_CLOCK_IN_FREQ + clockFreq, + const PMIC_AUDIO_STDAC_SAMPLING_RATE + samplingRate, + const PMIC_AUDIO_CLOCK_INVERT invert); + +/*! + * @brief Get the Stereo DAC clock source and operating characteristics. + * + * Get the current Stereo DAC clock source and operating characteristics. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] clockIn The clock signal source. + * @param[out] clockFreq The clock signal frequency. + * @param[out] samplingRate The audio data sampling rate. + * @param[out] invert Inversion of the frame sync and/or + * bit clock inputs is enabled/disabled. + * + * @retval PMIC_SUCCESS If the Stereo DAC clock settings were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle invalid. + * @retval PMIC_ERROR If the Stereo DAC clock configuration + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_clock(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_CLOCK_IN_SOURCE * + const clockIn, + PMIC_AUDIO_STDAC_SAMPLING_RATE * + const samplingRate, + PMIC_AUDIO_STDAC_CLOCK_IN_FREQ * + const clockFreq, + PMIC_AUDIO_CLOCK_INVERT * const invert); + +/*! + * @brief Set the Stereo DAC primary audio channel timeslot. + * + * Set the Stereo DAC primary audio channel timeslot. This function must be + * used if the default timeslot for the primary audio channel is to be changed. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] timeslot Select the primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Stereo DAC primary audio channel + * timeslot was successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio channel timeslot + * was invalid. + * @retval PMIC_ERROR If the Stereo DAC primary audio channel + * timeslot could not be set. + */ +PMIC_STATUS pmic_audio_stdac_set_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_TIMESLOTS + timeslot); + +/*! + * @brief Get the current Stereo DAC primary audio channel timeslot. + * + * Get the current Stereo DAC primary audio channel timeslot. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] timeslot The primary audio channel timeslot. + * + * @retval PMIC_SUCCESS If the Stereo DAC primary audio channel + * timeslot was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC primary audio channel + * timeslot could not be retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_rxtx_timeslot(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STDAC_TIMESLOTS * + const timeslot); + +/*! + * @brief Set/Enable the Stereo DAC options. + * + * Set or enable various Stereo DAC options. The available options include + * enabling/disabling the bus master clock outputs. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The Stereo DAC options to enable. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or Stereo DAC options + * were invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * successfully set/enabled. + */ +PMIC_STATUS pmic_audio_stdac_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_CONFIG config); + +/*! + * @brief Clear/Disable the Stereo DAC options. + * + * Clear or disable various Stereo DAC options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The Stereo DAC options to be cleared/disabled. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the Stereo DAC options + * were invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * cleared/disabled. + */ +PMIC_STATUS pmic_audio_stdac_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_CONFIG config); + +/*! + * @brief Get the current Stereo DAC options. + * + * Get the current Stereo DAC options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] config The current set of Stereo DAC options. + * + * @retval PMIC_SUCCESS If the Stereo DAC options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC options could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_stdac_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STDAC_CONFIG * const config); + +/*@}*/ + +/*! + * @name Audio Input Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC audio + * input hardware. + */ +/*@{*/ + +/*! + * @brief Set/Enable the audio input section options. + * + * Set or enable various audio input section options. The only available + * option right now is to enable the automatic disabling of the microphone + * input amplifiers when a microphone/headset is inserted or removed. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The audio input section options to enable. + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully configured. + * @retval PMIC_PARAMETER_ERROR If the handle or audio input section + * options were invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be successfully set/enabled. + */ +PMIC_STATUS pmic_audio_input_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_CONFIG config); + +/*! + * @brief Clear/Disable the audio input section options. + * + * Clear or disable various audio input section options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The audio input section options to be + * cleared/disabled. + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully cleared/disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or the audio input section + * options were invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be cleared/disabled. + */ +PMIC_STATUS pmic_audio_input_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_CONFIG config); + +/*! + * @brief Get the current audio input section options. + * + * Get the current audio input section options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] config The current set of audio input section options. + * + * @retval PMIC_SUCCESS If the audio input section options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the audio input section options could + * not be retrieved. + */ +PMIC_STATUS pmic_audio_input_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_CONFIG * const config); + +/*@}*/ + +/*! + * @name Audio Recording Using the Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice CODEC + * to perform audio recording. + */ +/*@{*/ + +/*! + * @brief Select the microphone inputs to be used for Voice CODEC recording. + * + * Select left and right microphone inputs for Voice CODEC + * recording. It is possible to disable or not use a particular microphone + * input channel by specifying NO_MIC as a parameter. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] leftChannel Select the left microphone input channel. + * @param[in] rightChannel Select the right microphone input channel. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input ports + * were invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be successfully enabled. + */ +PMIC_STATUS pmic_audio_vcodec_set_mic(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_PORT leftChannel, + const PMIC_AUDIO_INPUT_PORT rightChannel); + +/*! + * @brief Get the current microphone inputs being used for Voice CODEC + * recording. + * + * Get the left and right microphone inputs currently being + * used for Voice CODEC recording. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] leftChannel The left microphone input channel. + * @param[out] rightChannel The right microphone input channel. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_mic(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_PORT * const leftChannel, + PMIC_AUDIO_INPUT_PORT * + const rightChannel); + +/*! + * @brief Enable/disable the microphone input. + * + * This function enables/disables the current microphone input channel. The + * input amplifier is automatically turned off when the microphone input is + * disabled. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] leftChannel The left microphone input channel state. + * @param[in] rightChannel the right microphone input channel state. + * + * @retval PMIC_SUCCESS If the microphone input channels were + * successfully reconfigured. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input states + * were invalid. + * @retval PMIC_ERROR If the microphone input channels could + * not be reconfigured. + */ +PMIC_STATUS pmic_audio_vcodec_set_mic_on_off(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_INPUT_MIC_STATE + leftChannel, + const PMIC_AUDIO_INPUT_MIC_STATE + rightChannel); + +/*! + * @brief Return the current state of the microphone inputs. + * + * This function returns the current state (on/off) of the microphone + * input channels. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] leftChannel The current left microphone input channel + * state. + * @param[out] rightChannel the current right microphone input channel + * state. + * + * @retval PMIC_SUCCESS If the microphone input channel states + * were successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input channel states + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_mic_on_off(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_INPUT_MIC_STATE * + const leftChannel, + PMIC_AUDIO_INPUT_MIC_STATE * + const rightChannel); + +/*! + * @brief Set the microphone input amplifier mode and gain level. + * + * This function sets the current microphone input amplifier operating mode + * and gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] leftChannelMode The left microphone input amplifier mode. + * @param[in] leftChannelGain The left microphone input amplifier gain level. + * @param[in] rightChannelMode The right microphone input amplifier mode. + * @param[in] rightChannelGain The right microphone input amplifier gain + * level. + * + * @retval PMIC_SUCCESS If the microphone input amplifiers were + * successfully reconfigured. + * @retval PMIC_PARAMETER_ERROR If the handle or microphone input amplifier + * modes or gain levels were invalid. + * @retval PMIC_ERROR If the microphone input amplifiers could + * not be reconfigured. + */ +PMIC_STATUS pmic_audio_vcodec_set_record_gain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_AMP_MODE + leftChannelMode, + const PMIC_AUDIO_MIC_GAIN + leftChannelGain, + const PMIC_AUDIO_MIC_AMP_MODE + rightChannelMode, + const PMIC_AUDIO_MIC_GAIN + rightChannelGain); + +/*! + * @brief Get the current microphone input amplifier mode and gain level. + * + * This function gets the current microphone input amplifier operating mode + * and gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] leftChannelMode The left microphone input amplifier mode. + * @param[out] leftChannelGain The left microphone input amplifier gain level. + * @param[out] rightChannelMode The right microphone input amplifier mode. + * @param[out] rightChannelGain The right microphone input amplifier gain + * level. + * + * @retval PMIC_SUCCESS If the microphone input amplifier modes + * and gain levels were successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the microphone input amplifier modes + * and gain levels could not be retrieved. + */ +PMIC_STATUS pmic_audio_vcodec_get_record_gain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_MIC_AMP_MODE * + const leftChannelMode, + PMIC_AUDIO_MIC_GAIN * + const leftChannelGain, + PMIC_AUDIO_MIC_AMP_MODE * + const rightChannelMode, + PMIC_AUDIO_MIC_GAIN * + const rightChannelGain); + +/*! + * @brief Enable a microphone bias circuit. + * + * This function enables one of the available microphone bias circuits. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] biasCircuit The microphone bias circuit to be enabled. + * + * @retval PMIC_SUCCESS If the microphone bias circuit was + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or selected microphone bias + * circuit was invalid. + * @retval PMIC_ERROR If the microphone bias circuit could not + * be enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_micbias(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_BIAS + biasCircuit); + +/*! + * @brief Disable a microphone bias circuit. + * + * This function disables one of the available microphone bias circuits. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] biasCircuit The microphone bias circuit to be disabled. + * + * @retval PMIC_SUCCESS If the microphone bias circuit was + * successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or selected microphone bias + * circuit was invalid. + * @retval PMIC_ERROR If the microphone bias circuit could not + * be disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_micbias(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MIC_BIAS + biasCircuit); + +/*@}*/ + +/*! + * @name Audio Playback Using the Voice CODEC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Voice CODEC + * to perform audio playback. + */ +/*@{*/ + +/*! + * @brief Configure and enable the Voice CODEC mixer. + * + * This function configures and enables the Voice CODEC mixer. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] rxSecondaryTimeslot The timeslot used for the secondary audio + * channel. + * @param[in] gainIn The secondary audio channel gain level. + * @param[in] gainOut The mixer output gain level. + * + * @retval PMIC_SUCCESS If the Voice CODEC mixer was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mixer configuration + * was invalid. + * @retval PMIC_ERROR If the Voice CODEC mixer could not be + * reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_vcodec_enable_mixer(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_VCODEC_TIMESLOT + rxSecondaryTimeslot, + const PMIC_AUDIO_VCODEC_MIX_IN_GAIN + gainIn, + const PMIC_AUDIO_VCODEC_MIX_OUT_GAIN + gainOut); + +/*! + * @brief Disable the Voice CODEC mixer. + * + * This function disables the Voice CODEC mixer. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Voice CODEC mixer was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Voice CODEC mixer could not be + * disabled. + */ +PMIC_STATUS pmic_audio_vcodec_disable_mixer(const PMIC_AUDIO_HANDLE handle); + +/*@}*/ + +/*! + * @name Audio Playback Using the Stereo DAC Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC Stereo DAC + * to perform audio playback. + */ +/*@{*/ + +/*! + * @brief Configure and enable the Stereo DAC mixer. + * + * This function configures and enables the Stereo DAC mixer. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] rxSecondaryTimeslot The timeslot used for the secondary audio + * channel. + * @param[in] gainIn The secondary audio channel gain level. + * @param[in] gainOut The mixer output gain level. + * + * @retval PMIC_SUCCESS If the Stereo DAC mixer was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mixer configuration + * was invalid. + * @retval PMIC_ERROR If the Stereo DAC mixer could not be + * reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_stdac_enable_mixer(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STDAC_TIMESLOTS + rxSecondaryTimeslot, + const PMIC_AUDIO_STDAC_MIX_IN_GAIN + gainIn, + const PMIC_AUDIO_STDAC_MIX_OUT_GAIN + gainOut); + +/*! + * @brief Disable the Stereo DAC mixer. + * + * This function disables the Stereo DAC mixer. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the Stereo DAC mixer was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the Stereo DAC mixer could not be + * disabled. + */ +PMIC_STATUS pmic_audio_stdac_disable_mixer(const PMIC_AUDIO_HANDLE handle); + +/*@}*/ + +/*! + * @name Audio Output Section Setup and Configuration APIs + * Functions for general setup and configuration of the PMIC audio output + * section to support playback. + */ +/*@{*/ + +/*! + * @brief Select the audio output ports. + * + * This function selects the audio output ports to be used. This also enables + * the appropriate output amplifiers. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] port The audio output ports to be used. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * acquired. + * @retval PMIC_PARAMETER_ERROR If the handle or output ports were + * invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * acquired. + */ +PMIC_STATUS pmic_audio_output_set_port(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PORT port); + +/*! + * @brief Deselect/disable the audio output ports. + * + * This function disables the audio output ports that were previously enabled + * by calling pmic_audio_output_set_port(). + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] port The audio output ports to be disabled. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle or output ports were + * invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * disabled. + */ +PMIC_STATUS pmic_audio_output_clear_port(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PORT port); + +/*! + * @brief Get the current audio output ports. + * + * This function retrieves the audio output ports that are currently being + * used. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] port The audio output ports currently being used. + * + * @retval PMIC_SUCCESS If the audio output ports were successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the audio output ports could not be + * retrieved. + */ +PMIC_STATUS pmic_audio_output_get_port(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_PORT * const port); + +/*! + * @brief Set the gain level for the external stereo inputs. + * + * This function sets the gain levels for the external stereo inputs. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] gain The external stereo input gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the gain level could not be set. + */ +PMIC_STATUS pmic_audio_output_set_stereo_in_gain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_STEREO_IN_GAIN + gain); + +/*! + * @brief Get the current gain level for the external stereo inputs. + * + * This function retrieves the current gain levels for the external stereo + * inputs. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] gain The current external stereo input gain + * level. + * + * @retval PMIC_SUCCESS If the gain level was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the gain level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_stereo_in_gain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_STEREO_IN_GAIN * + const gain); + +/*! + * @brief Set the output PGA gain level. + * + * This function sets the audio output PGA gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] gain The output PGA gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the gain level could not be set. + */ +PMIC_STATUS pmic_audio_output_set_pgaGain(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_PGA_GAIN + gain); + +/*! + * @brief Get the output PGA gain level. + * + * This function retrieves the current audio output PGA gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] gain The current output PGA gain level. + * + * @retval PMIC_SUCCESS If the gain level was successfully + * retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the gain level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_pgaGain(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_PGA_GAIN * + const gain); + +/*! + * @brief Enable the output mixer. + * + * This function enables the output mixer for the audio stream that + * corresponds to the current handle (i.e., the Voice CODEC, Stereo DAC, or + * the external stereo inputs). + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mixer was successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mixer could not be enabled. + */ +PMIC_STATUS pmic_audio_output_enable_mixer(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Disable the output mixer. + * + * This function disables the output mixer for the audio stream that + * corresponds to the current handle (i.e., the Voice CODEC, Stereo DAC, or + * the external stereo inputs). + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mixer was successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mixer could not be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_mixer(const PMIC_AUDIO_HANDLE handle); + +/*! + * @brief Configure and enable the output balance amplifiers. + * + * This function configures and enables the output balance amplifiers. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] leftGain The desired left channel gain level. + * @param[in] rightGain The desired right channel gain level. + * + * @retval PMIC_SUCCESS If the output balance amplifiers were + * successfully configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or gain levels were invalid. + * @retval PMIC_ERROR If the output balance amplifiers could not + * be reconfigured or enabled. + */ +PMIC_STATUS pmic_audio_output_set_balance(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_BALANCE_GAIN + leftGain, + const PMIC_AUDIO_OUTPUT_BALANCE_GAIN + rightGain); + +/*! + * @brief Get the current output balance amplifier gain levels. + * + * This function retrieves the current output balance amplifier gain levels. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] leftGain The current left channel gain level. + * @param[out] rightGain The current right channel gain level. + * + * @retval PMIC_SUCCESS If the output balance amplifier gain levels + * were successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the output balance amplifier gain levels + * could be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_balance(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_BALANCE_GAIN * + const leftGain, + PMIC_AUDIO_OUTPUT_BALANCE_GAIN * + const rightGain); + +/*! + * @brief Configure and enable the output mono adder. + * + * This function configures and enables the output mono adder. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] mode The desired mono adder operating mode. + * + * @retval PMIC_SUCCESS If the mono adder was successfully + * configured and enabled. + * @retval PMIC_PARAMETER_ERROR If the handle or mono adder mode was + * invalid. + * @retval PMIC_ERROR If the mono adder could not be reconfigured + * or enabled. + */ +PMIC_STATUS pmic_audio_output_enable_mono_adder(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_MONO_ADDER_MODE + mode); + +/*! + * @brief Disable the output mono adder. + * + * This function disables the output mono adder. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the mono adder was successfully + * disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mono adder could not be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_mono_adder(const PMIC_AUDIO_HANDLE + handle); + +/*! + * @brief Configure the mono adder output gain level. + * + * This function configures the mono adder output amplifier gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] gain The desired output gain level. + * + * @retval PMIC_SUCCESS If the mono adder output amplifier gain + * level was successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or gain level was invalid. + * @retval PMIC_ERROR If the mono adder output amplifier gain + * level could not be reconfigured. + */ +PMIC_STATUS pmic_audio_output_set_mono_adder_gain(const PMIC_AUDIO_HANDLE + handle, + const + PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN + gain); + +/*! + * @brief Get the current mono adder output gain level. + * + * This function retrieves the current mono adder output amplifier gain level. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] gain The current output gain level. + * + * @retval PMIC_SUCCESS If the mono adder output amplifier gain + * level was successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the mono adder output amplifier gain + * level could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_mono_adder_gain(const PMIC_AUDIO_HANDLE + handle, + PMIC_AUDIO_MONO_ADDER_OUTPUT_GAIN + * const gain); + +/*! + * @brief Set various audio output section options. + * + * This function sets one or more audio output section configuration + * options. The currently supported options include whether to disable + * the non-inverting mono speaker output, enabling the loudspeaker common + * bias circuit, enabling detection of headset insertion/removal, and + * whether to automatically disable the headset amplifiers when a headset + * insertion/removal has been detected. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The desired audio output section + * configuration options to be set. + * + * @retval PMIC_SUCCESS If the desired configuration options were + * all successfully set. + * @retval PMIC_PARAMETER_ERROR If the handle or configuration options + * were invalid. + * @retval PMIC_ERROR If the desired configuration options + * could not be set. + */ +PMIC_STATUS pmic_audio_output_set_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_CONFIG config); + +/*! + * @brief Clear various audio output section options. + * + * This function clears one or more audio output section configuration + * options. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[in] config The desired audio output section + * configuration options to be cleared. + * + * @retval PMIC_SUCCESS If the desired configuration options were + * all successfully cleared. + * @retval PMIC_PARAMETER_ERROR If the handle or configuration options + * were invalid. + * @retval PMIC_ERROR If the desired configuration options + * could not be cleared. + */ +PMIC_STATUS pmic_audio_output_clear_config(const PMIC_AUDIO_HANDLE handle, + const PMIC_AUDIO_OUTPUT_CONFIG + config); + +/*! + * @brief Get the current audio output section options. + * + * This function retrieves the current audio output section configuration + * option settings. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * @param[out] config The current audio output section + * configuration option settings. + * + * @retval PMIC_SUCCESS If the current configuration options were + * successfully retrieved. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the current configuration options + * could not be retrieved. + */ +PMIC_STATUS pmic_audio_output_get_config(const PMIC_AUDIO_HANDLE handle, + PMIC_AUDIO_OUTPUT_CONFIG * + const config); + +/*! + * @brief Enable the phantom ground circuit that is used to help identify + * the type of headset that has been inserted. + * + * This function enables the phantom ground circuit that is used to help + * identify the type of headset (e.g., stereo or mono) that has been inserted. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the phantom ground circuit was + * successfully enabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the phantom ground circuit could not + * be enabled. + */ +PMIC_STATUS pmic_audio_output_enable_phantom_ground(void); + +/*! + * @brief Disable the phantom ground circuit that is used to help identify + * the type of headset that has been inserted. + * + * This function disables the phantom ground circuit that is used to help + * identify the type of headset (e.g., stereo or mono) that has been inserted. + * + * @param[in] handle Device handle from pmic_audio_open() call. + * + * @retval PMIC_SUCCESS If the phantom ground circuit was + * successfully disabled. + * @retval PMIC_PARAMETER_ERROR If the handle was invalid. + * @retval PMIC_ERROR If the phantom ground circuit could not + * be disabled. + */ +PMIC_STATUS pmic_audio_output_disable_phantom_ground(void); + +/*! + * @brief Enable/Disable fm output + * + * This function enables/disables the fm output. + * + * @param[in] enable True to enable and false to disable + * + * @retval PMIC_SUCCESS If the fm output was + * successfully enable or disabled + * @retval PMIC_ERROR If the operation fails + */ +PMIC_STATUS pmic_audio_fm_output_enable(bool enable); + +/*@}*/ + +#endif /* __KERNEL__ */ + +#endif /* __ASM_ARCH_MXC_PMIC_AUDIO_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/sdma_malloc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/sdma_malloc.c @@ -0,0 +1,387 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file plat-mxc/sdma/sdma_malloc.c + * @brief This file contains functions for SDMA non-cacheable buffers allocation + * + * SDMA (Smart DMA) is used for transferring data between MCU and peripherals + * + * @ingroup SDMA + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DEBUG 0 + +#if DEBUG +#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args) +#else +#define DPRINTK(fmt, args...) +#endif + +#ifdef CONFIG_SDMA_IRAM +#define IRAM_VIRT_BASE IRAM_BASE_ADDR_VIRT +#define IRAM_PHYS_BASE IRAM_BASE_ADDR +#if (CONFIG_SDMA_IRAM_SIZE&0x3FF) +#error "IRAM size of SDMA should be multiple of 1Kbytes" +#else +#define IRAM_SDMA_SIZE CONFIG_SDMA_IRAM_SIZE /* 4K */ +#endif +#define IRAM_UNIT_SIZE 512 +#define IRAM_POOL_SIZE (IRAM_SDMA_SIZE/IRAM_UNIT_SIZE) + +#define IS_IRAM_VIRT(x) (((x)IRAM_SDMA_SIZE)?0:1) + +#define IS_IRAM_PHYS(x) (((x)IRAM_SDMA_SIZE)?0:1) +#endif /*CONFIG_SDMA_IRAM */ + +/*! + * Defines SDMA non-cacheable buffers pool + */ +static struct dma_pool *pool; + +#ifdef CONFIG_SDMA_IRAM +typedef struct iram_head_s { + struct list_head list; +} iram_head_t; + +static spinlock_t iram_pool_lock = SPIN_LOCK_UNLOCKED; +static struct list_head iram_free_list; +static unsigned char iram_pool_flag[IRAM_POOL_SIZE]; + +static void sdma_iram_free(void *buf); +#endif /*CONFIG_SDMA_IRAM */ + +/*! + * SDMA memory conversion hashing structure + */ +typedef struct { + struct list_head node; + int use_count; + /*! Virtual address */ + void *virt; + /*! Physical address */ + unsigned long phys; +} virt_phys_struct; + +static struct list_head buf_map; + +/*! + * Defines the size of each buffer in SDMA pool. + * The size must be at least 512 bytes, because + * sdma channel control blocks array size is 512 bytes + */ +#define SDMA_POOL_SIZE 1024 + +/*! + * Adds new buffer structure into conversion hash tables + * + * @param vf SDMA memory conversion hashing structure + * + * @return 1 on success, 0 on fail + */ +static int add_entry(virt_phys_struct * vf) +{ + virt_phys_struct *p; + + vf->phys &= PAGE_MASK; + vf->virt = (void *)((u32) vf->virt & PAGE_MASK); + + list_for_each_entry(p, &buf_map, node) { + if (p->virt == vf->virt) { + p->use_count++; + return 0; + } + } + + p = kmalloc(sizeof(virt_phys_struct), GFP_KERNEL); + if (p == 0) { + return -ENOMEM; + } + + *p = *vf; + p->use_count = 1; + list_add_tail(&p->node, &buf_map); + + DPRINTK("added vaddr 0x%p, paddr 0x%08X to list\n", p->virt, p->phys); + + return 0; +} + +/*! + * Deletes buffer stracture from conversion hash tables + * + * @param buf SDMA memory buffer virtual addr + * + * @return 0 on success, -1 on fail + */ +static int delete_entry(void *buf) +{ + virt_phys_struct *p; + + buf = (void *)((u32) buf & PAGE_MASK); + + list_for_each_entry(p, &buf_map, node) { + if (p->virt == buf) { + p->use_count--; + break; + } + } + + if (p->use_count == 0) { + list_del(&p->node); + kfree(p); + } + + return 0; +} + +/*! + * Virtual to physical address conversion functio + * + * @param buf pointer to virtual address + * + * @return physical address + */ +unsigned long sdma_virt_to_phys(void *buf) +{ + u32 offset = (u32) buf & (~PAGE_MASK); + virt_phys_struct *p; + + DPRINTK("searching for vaddr 0x%p\n", buf); + +#ifdef CONFIG_SDMA_IRAM + if (IS_IRAM_VIRT((unsigned long)buf)) { + if ((unsigned long)buf & (IRAM_UNIT_SIZE - 1)) { + printk(KERN_WARNING "%s buffer offset = %ld\n", + __FUNCTION__, (unsigned long)buf); + } + return (unsigned long)buf + IRAM_PHYS_BASE - IRAM_VIRT_BASE; + } +#endif /*CONFIG_SDMA_IRAM */ + + list_for_each_entry(p, &buf_map, node) { + if ((u32) p->virt == ((u32) buf & PAGE_MASK)) { + return p->phys | offset; + } + } + + if (virt_addr_valid(buf)) { + return virt_to_phys(buf); + } + + printk(KERN_WARNING + "SDMA malloc: could not translate virt address 0x%p\n", buf); + return 0; +} + +/*! + * Physical to virtual address conversion functio + * + * @param buf pointer to physical address + * + * @return virtual address + */ +void *sdma_phys_to_virt(unsigned long buf) +{ + u32 offset = buf & (~PAGE_MASK); + virt_phys_struct *p; + +#ifdef CONFIG_SDMA_IRAM + if (IS_IRAM_PHYS((unsigned long)buf)) { + if (buf & (IRAM_UNIT_SIZE - 1)) { + printk(KERN_WARNING "%s buffer offset = %ld\n", + __FUNCTION__, (unsigned long)buf); + } + return (void *)buf + IRAM_VIRT_BASE - IRAM_PHYS_BASE; + } +#endif /*CONFIG_SDMA_IRAM */ + + list_for_each_entry(p, &buf_map, node) { + if (p->phys == (buf & PAGE_MASK)) { + return (void *)((u32) p->virt | offset); + } + } + + printk(KERN_WARNING + "SDMA malloc: could not translate phys address 0x%lx\n", buf); + return 0; +} + +/*! + * Allocates uncacheable buffer + * + * @param size size of allocated buffer + * @return pointer to buffer + */ +void *sdma_malloc(size_t size) +{ + void *buf; + dma_addr_t dma_addr; + virt_phys_struct vf; + + if (size > SDMA_POOL_SIZE) { + printk(KERN_WARNING + "size in sdma_malloc is more than %d bytes\n", + SDMA_POOL_SIZE); + buf = 0; + } else { + buf = dma_pool_alloc(pool, GFP_KERNEL, &dma_addr); + if (buf > 0) { + vf.virt = buf; + vf.phys = dma_addr; + + if (add_entry(&vf) < 0) { + dma_pool_free(pool, buf, dma_addr); + buf = 0; + } + } + } + + DPRINTK("allocated vaddr 0x%p\n", buf); + return buf; +} + +/*! + * Frees uncacheable buffer + * + * @param buf buffer pointer for deletion + */ +void sdma_free(void *buf) +{ +#ifdef CONFIG_SDMA_IRAM + if (IS_IRAM_VIRT((unsigned long)buf)) { + sdma_iram_free(buf); + return; + } +#endif /*CONFIG_SDMA_IRAM */ + + dma_pool_free(pool, buf, sdma_virt_to_phys(buf)); + delete_entry(buf); +} + +#ifdef CONFIG_SDMA_IRAM +/*! + * Allocates uncacheable buffer from IRAM + */ +void *sdma_iram_malloc(size_t size) +{ + void *buf = NULL; + int index = -1; + unsigned long flags; + if (size > IRAM_UNIT_SIZE) { + printk(KERN_WARNING + "size in sdma_iram_malloc is more than %d bytes\n", + IRAM_UNIT_SIZE); + } else { + spin_lock_irqsave(&iram_pool_lock, flags); + if (!list_empty(&iram_free_list)) { + buf = + list_entry(iram_free_list.next, iram_head_t, list); + list_del(iram_free_list.next); + index = + ((unsigned long)buf - + IRAM_VIRT_BASE) / IRAM_UNIT_SIZE; + if (index < 0 || index >= IRAM_POOL_SIZE) { + spin_unlock_irqrestore(&iram_pool_lock, flags); + printk(KERN_ERR "The iram pool has crashed\n"); + return NULL; + } + if (iram_pool_flag[index]) { + spin_unlock_irqrestore(&iram_pool_lock, flags); + printk(KERN_WARNING + "iram block %d already has been allocated \n", + index); + } + iram_pool_flag[index] = 1; + } + spin_unlock_irqrestore(&iram_pool_lock, flags); + if ((unsigned long)buf & (IRAM_UNIT_SIZE - 1)) { + printk(KERN_WARNING + "the start address is not align of %d, buffer offset %ld\n", + IRAM_UNIT_SIZE, (unsigned long)buf); + + buf = PTR_ALIGN(buf, IRAM_UNIT_SIZE); + } + } + return buf; +} + +/*! + * Free uncacheable buffer into IRAM. + */ +static void sdma_iram_free(void *buf) +{ + iram_head_t *p; + int index; + unsigned long flags; + /* The check of parameter will be done in sdma_free */ + index = ((unsigned long)buf - IRAM_VIRT_BASE) / IRAM_UNIT_SIZE; + spin_lock_irqsave(&iram_pool_lock, flags); + p = (iram_head_t *) ((unsigned long)buf & (~(IRAM_UNIT_SIZE - 1))); + list_add_tail(&(p->list), &iram_free_list); + if (iram_pool_flag[index]) { + iram_pool_flag[index] = 0; + spin_unlock_irqrestore(&iram_pool_lock, flags); + } else { + printk(KERN_WARNING + "Free %p which IRAM block %d is already freed\n", buf, + index); + spin_unlock_irqrestore(&iram_pool_lock, flags); + } +} + +/*! + * Initialized the free list of IRAM. + */ +static void iram_pool_init(void) +{ + int i; + iram_head_t *p; + memset(iram_pool_flag, 0, IRAM_POOL_SIZE); + INIT_LIST_HEAD(&iram_free_list); + for (i = 0; i < IRAM_POOL_SIZE; i++) { + p = (iram_head_t *) (IRAM_VIRT_BASE + i * IRAM_UNIT_SIZE); + list_add_tail(&(p->list), &iram_free_list); + } +} +#endif /*CONFIG_SDMA_IRAM */ + +/*! + * SDMA buffers pool initialization function + */ +void __init init_sdma_pool(void) +{ +#ifdef CONFIG_SDMA_IRAM + iram_pool_init(); +#endif /*CONFIG_SDMA_IRAM */ + + pool = dma_pool_create("SDMA", NULL, SDMA_POOL_SIZE, 0, 0); + + INIT_LIST_HEAD(&buf_map); +} + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Linux SDMA API"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/dma_sdma.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/dma_sdma.c @@ -0,0 +1,697 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file plat-mxc/sdma/dma_sdma.c + * @brief Front-end to the DMA handling. This handles the allocation/freeing + * of DMA channels, and provides a unified interface to the machines + * DMA facilities. This file contains functions for Smart DMA. + * + * @ingroup SDMA + */ + +#include +#include +#include +#include +#include + +#ifdef CONFIG_MXC_SDMA_API + +static mxc_dma_channel_t mxc_sdma_channels[MAX_DMA_CHANNELS]; +static mxc_dma_channel_private_t mxc_sdma_private[MAX_DMA_CHANNELS]; + +extern struct clk *mxc_sdma_ahb_clk, *mxc_sdma_ipg_clk; + +/*! + * Tasket to handle processing the channel buffers + * + * @param arg channel id + */ +static void mxc_sdma_channeltasklet(unsigned long arg) +{ + dma_request_t request_t; + dma_channel_params chnl_param; + mxc_dma_channel_t *chnl_info; + mxc_dma_channel_private_t *data_priv; + int bd_intr = 0, error = MXC_DMA_DONE; + + chnl_info = &mxc_sdma_channels[arg]; + data_priv = chnl_info->private; + chnl_param = + mxc_sdma_get_channel_params(chnl_info->channel)->chnl_params; + + mxc_dma_get_config(arg, &request_t, data_priv->buf_tail); + + while (request_t.bd_done == 0) { + bd_intr = mxc_dma_get_bd_intr(arg, data_priv->buf_tail); + if ((data_priv->buf_tail += 1) >= chnl_param.bd_number) { + data_priv->buf_tail = 0; + } + chnl_info->active = 0; + if (request_t.bd_error) { + error = MXC_DMA_TRANSFER_ERROR; + } + + if (bd_intr != 0) { + chnl_info->cb_fn(chnl_info->cb_args, error, + request_t.count); + error = MXC_DMA_DONE; + } + + if (data_priv->buf_tail == chnl_info->curr_buf) { + break; + } + memset(&request_t, 0, sizeof(dma_request_t)); + mxc_dma_get_config(arg, &request_t, data_priv->buf_tail); + } +} + +/*! + * This function is generally called by the driver at open time. + * The DMA driver would do any initialization steps that is required + * to get the channel ready for data transfer. + * + * @param channel_id a pre-defined id. The peripheral driver would specify + * the id associated with its peripheral. This would be + * used by the DMA driver to identify the peripheral + * requesting DMA and do the necessary setup on the + * channel associated with the particular peripheral. + * The DMA driver could use static or dynamic DMA channel + * allocation. + * @param dev_name module name or device name + * @return returns a negative number on error if request for a DMA channel did not + * succeed, returns the channel number to be used on success. + */ +int mxc_dma_request_ext(mxc_dma_device_t channel_id, char *dev_name, + struct dma_channel_info *info) +{ + mxc_sdma_channel_params_t *chnl; + mxc_dma_channel_private_t *data_priv; + int ret = 0, i = 0, channel_num = 0; + mxc_sdma_channel_ext_params_t *p; + + chnl = mxc_sdma_get_channel_params(channel_id); + if (chnl == NULL) { + return -EINVAL; + } + + if (info) { + if (!chnl->chnl_params.ext) + return -EINVAL; + p = (mxc_sdma_channel_ext_params_t *)chnl; + memcpy(&p->chnl_ext_params.info, info, sizeof(info)); + } + + + /* Enable the SDMA clock */ + clk_enable(mxc_sdma_ahb_clk); + clk_enable(mxc_sdma_ipg_clk); + + channel_num = chnl->channel_num; + if (chnl->channel_num == MXC_DMA_DYNAMIC_CHANNEL) { + /* Get the first free channel */ + for (i = (MAX_DMA_CHANNELS - 1); i > 0; i--) { + /* See if channel is available */ + if ((mxc_sdma_channels[i].dynamic != 1) + || (mxc_sdma_channels[i].lock != 0)) { + continue; + } + channel_num = i; + /* Check to see if we can get this channel */ + ret = mxc_request_dma(&channel_num, dev_name); + if (ret == 0) { + break; + } else { + continue; + } + } + if (ret != 0) { + /* No free channel */ + goto err_ret; + } + } else { + if (mxc_sdma_channels[chnl->channel_num].lock == 1) { + ret = -ENODEV; + goto err_ret; + } + ret = mxc_request_dma(&channel_num, dev_name); + if (ret != 0) { + goto err_ret; + } + } + + ret = mxc_dma_setup_channel(channel_num, &chnl->chnl_params); + + if (ret == 0) { + if (chnl->chnl_priority != MXC_SDMA_DEFAULT_PRIORITY) { + ret = + mxc_dma_set_channel_priority(channel_num, + chnl->chnl_priority); + if (ret != 0) { + pr_info("Failed to set channel prority,\ + continue with the existing \ + priority\n"); + goto err_ret; + } + } + mxc_sdma_channels[channel_num].lock = 1; + if ((chnl->chnl_params.transfer_type == per_2_emi) + || (chnl->chnl_params.transfer_type == dsp_2_emi)) { + mxc_sdma_channels[channel_num].mode = MXC_DMA_MODE_READ; + } else { + mxc_sdma_channels[channel_num].mode = + MXC_DMA_MODE_WRITE; + } + mxc_sdma_channels[channel_num].channel = channel_id; + data_priv = mxc_sdma_channels[channel_num].private; + tasklet_init(&data_priv->chnl_tasklet, + mxc_sdma_channeltasklet, channel_num); + if ((channel_id == MXC_DMA_ATA_RX) + || (channel_id == MXC_DMA_ATA_TX)) { + data_priv->intr_after_every_bd = 0; + } else { + data_priv->intr_after_every_bd = 1; + } + } + err_ret: + if (ret != 0) { + clk_disable(mxc_sdma_ahb_clk); + clk_disable(mxc_sdma_ipg_clk); + channel_num = -ENODEV; + } + + return channel_num; +} + +/*! + * This function is generally called by the driver at close time. The DMA + * driver would do any cleanup associated with this channel. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_free(int channel_num) +{ + mxc_dma_channel_private_t *data_priv; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (mxc_sdma_channels[channel_num].lock != 1) { + return -ENODEV; + } + + mxc_free_dma(channel_num); + + /* Disable the SDMA clock */ + clk_disable(mxc_sdma_ahb_clk); + clk_disable(mxc_sdma_ipg_clk); + + mxc_sdma_channels[channel_num].lock = 0; + mxc_sdma_channels[channel_num].active = 0; + mxc_sdma_channels[channel_num].curr_buf = 0; + data_priv = mxc_sdma_channels[channel_num].private; + data_priv->buf_tail = 0; + tasklet_kill(&data_priv->chnl_tasklet); + + return 0; +} + +/*! + * Callback function called from the SDMA Interrupt routine + * + * @param arg driver specific argument that was registered + */ +static void mxc_dma_chnl_callback(void *arg) +{ + int priv; + mxc_dma_channel_private_t *data_priv; + + priv = (int)arg; + data_priv = mxc_sdma_channels[priv].private; + /* Process the buffers in a tasklet */ + tasklet_schedule(&data_priv->chnl_tasklet); +} + +/*! + * This function would just configure the buffers specified by the user into + * dma channel. The caller must call mxc_dma_enable to start this transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param dma_buf an array of physical addresses to the user defined + * buffers. The caller must guarantee the dma_buf is + * available until the transfer is completed. + * @param num_buf number of buffers in the array + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not be + * added with DMA for transfer. On Success, it returns 0 + */ +int mxc_dma_config(int channel_num, mxc_dma_requestbuf_t * dma_buf, + int num_buf, mxc_dma_mode_t mode) +{ + int ret = 0, i = 0, prev_buf; + mxc_dma_channel_t *chnl_info; + mxc_dma_channel_private_t *data_priv; + mxc_sdma_channel_params_t *chnl; + dma_channel_params chnl_param; + dma_request_t request_t; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (num_buf <= 0) { + return -EINVAL; + } + + chnl_info = &mxc_sdma_channels[channel_num]; + data_priv = chnl_info->private; + if (chnl_info->lock != 1) { + return -ENODEV; + } + + /* Check to see if all buffers are taken */ + if (chnl_info->active == 1) { + return -EBUSY; + } + + chnl = mxc_sdma_get_channel_params(chnl_info->channel); + chnl_param = chnl->chnl_params; + + /* Re-setup the SDMA channel if the transfer direction is changed */ + if ((chnl_param.peripheral_type != MEMORY) && (mode != chnl_info->mode)) { + if (chnl_param.peripheral_type == DSP) { + if (mode == MXC_DMA_MODE_READ) { + chnl_param.transfer_type = dsp_2_emi; + } else { + chnl_param.transfer_type = emi_2_dsp; + } + } else if (chnl_param.peripheral_type == FIFO_MEMORY) { + if (mode == MXC_DMA_MODE_READ) + chnl_param.per_address = MXC_FIFO_MEM_SRC_FIXED; + else + chnl_param.per_address = + MXC_FIFO_MEM_DEST_FIXED; + } else { + if (mode == MXC_DMA_MODE_READ) { + chnl_param.transfer_type = per_2_emi; + } else { + chnl_param.transfer_type = emi_2_per; + } + } + chnl_param.callback = mxc_dma_chnl_callback; + chnl_param.arg = (void *)channel_num; + ret = mxc_dma_setup_channel(channel_num, &chnl_param); + if (ret != 0) { + return ret; + } + if (chnl->chnl_priority != MXC_SDMA_DEFAULT_PRIORITY) { + ret = + mxc_dma_set_channel_priority(channel_num, + chnl->chnl_priority); + if (ret != 0) { + pr_info("Failed to set channel prority,\ + continue with the existing \ + priority\n"); + } + } + chnl_info->mode = mode; + } + + for (i = 0; i < num_buf; i++, dma_buf++) { + /* Check to see if all buffers are taken */ + if (chnl_info->active == 1) { + break; + } + request_t.destAddr = (__u8 *) dma_buf->dst_addr; + request_t.sourceAddr = (__u8 *) dma_buf->src_addr; + if (chnl_param.peripheral_type == ASRC) + request_t.count = dma_buf->num_of_bytes / 4; + else + request_t.count = dma_buf->num_of_bytes; + request_t.bd_cont = 1; + ret = mxc_dma_set_config(channel_num, &request_t, + chnl_info->curr_buf); + if (ret != 0) { + break; + } + if (data_priv->intr_after_every_bd == 0) { + if (i == num_buf - 1) { + mxc_dma_set_bd_intr(channel_num, + chnl_info->curr_buf, 1); + } else { + mxc_dma_set_bd_intr(channel_num, + chnl_info->curr_buf, 0); + } + } + + prev_buf = chnl_info->curr_buf; + if ((chnl_info->curr_buf += 1) >= chnl_param.bd_number) { + chnl_info->curr_buf = 0; + } + if (chnl_info->curr_buf == data_priv->buf_tail) { + if ((data_priv->intr_after_every_bd == 0) + && (i != num_buf - 1)) { + /* + * Set the BD_INTR flag on the last BD that + * was queued + */ + mxc_dma_set_bd_intr(channel_num, prev_buf, 1); + } + chnl_info->active = 1; + } + } + + if (i == 0) { + return -EBUSY; + } + return 0; +} + +/*! + * This function would just configure the scatterlist specified by the + * user into dma channel. This is a slight variation of mxc_dma_config(), + * it is provided for the convenience of drivers that have a scatterlist + * passed into them. It is the calling driver's responsibility to have the + * correct physical address filled in the "dma_address" field of the + * scatterlist. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param sg a scatterlist of buffers. The caller must guarantee + * the dma_buf is available until the transfer is + * completed. + * @param num_buf number of buffers in the array + * @param num_of_bytes total number of bytes to transfer. If set to 0, this + * would imply to use the length field of the scatterlist + * for each DMA transfer. Else it would calculate the size + * for each DMA transfer. + * @param mode specifies whether this is READ or WRITE operation + * @return This function returns a negative number on error if buffer could not + * be added with DMA for transfer. On Success, it returns 0 + */ +int mxc_dma_sg_config(int channel_num, struct scatterlist *sg, + int num_buf, int num_of_bytes, mxc_dma_mode_t mode) +{ + int ret = 0, i = 0; + mxc_dma_requestbuf_t *dma_buf; + + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (mxc_sdma_channels[channel_num].lock != 1) { + return -ENODEV; + } + + dma_buf = + (mxc_dma_requestbuf_t *) kmalloc(num_buf * + sizeof(mxc_dma_requestbuf_t), + GFP_KERNEL); + + if (dma_buf == NULL) { + return -EFAULT; + } + + for (i = 0; i < num_buf; i++) { + if (mode == MXC_DMA_MODE_READ) { + (dma_buf + i)->dst_addr = sg->dma_address; + } else { + (dma_buf + i)->src_addr = sg->dma_address; + } + + if ((num_of_bytes > sg->length) || (num_of_bytes == 0)) { + (dma_buf + i)->num_of_bytes = sg->length; + } else { + (dma_buf + i)->num_of_bytes = num_of_bytes; + } + sg++; + num_of_bytes -= (dma_buf + i)->num_of_bytes; + } + + ret = mxc_dma_config(channel_num, dma_buf, num_buf, mode); + kfree(dma_buf); + return ret; +} + +/*! + * This function is provided if the driver would like to set/change its + * callback function. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @param callback a callback function to provide notification on transfer + * completion, user could specify NULL if he does not wish + * to be notified + * @param arg an argument that gets passed in to the callback + * function, used by the user to do any driver specific + * operations. + * @return this function returns a negative number on error if the callback + * could not be set for the channel or 0 on success + */ +int mxc_dma_callback_set(int channel_num, + mxc_dma_callback_t callback, void *arg) +{ + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (mxc_sdma_channels[channel_num].lock != 1) { + return -ENODEV; + } + + mxc_sdma_channels[channel_num].cb_fn = callback; + mxc_sdma_channels[channel_num].cb_args = arg; + + mxc_dma_set_callback(channel_num, mxc_dma_chnl_callback, + (void *)channel_num); + + return 0; +} + +/*! + * This stops the DMA channel and any ongoing transfers. Subsequent use of + * mxc_dma_enable() will restart the channel and restart the transfer. + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_disable(int channel_num) +{ + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (mxc_sdma_channels[channel_num].lock != 1) { + return -ENODEV; + } + + mxc_dma_stop(channel_num); + return 0; +} + +/*! + * This starts DMA transfer. Or it restarts DMA on a stopped channel + * previously stopped with mxc_dma_disable(). + * + * @param channel_num the channel number returned at request time. This + * would be used by the DMA driver to identify the calling + * driver and do the necessary cleanup on the channel + * associated with the particular peripheral + * @return returns a negative number on error or 0 on success + */ +int mxc_dma_enable(int channel_num) +{ + if ((channel_num >= MAX_DMA_CHANNELS) || (channel_num < 0)) { + return -EINVAL; + } + + if (mxc_sdma_channels[channel_num].lock != 1) { + return -ENODEV; + } + + mxc_dma_start(channel_num); + return 0; +} + +/*! + * Initializes dma structure with dma_operations + * + * @param dma dma structure + * @return returns 0 on success + */ +static int __init mxc_dma_init(void) +{ + int i; + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + mxc_sdma_channels[i].active = 0; + mxc_sdma_channels[i].lock = 0; + mxc_sdma_channels[i].curr_buf = 0; + mxc_sdma_channels[i].dynamic = 1; + mxc_sdma_private[i].buf_tail = 0; + mxc_sdma_channels[i].private = &mxc_sdma_private[i]; + } + /* + * Make statically allocated channels unavailable for dynamic channel + * requests + */ + mxc_get_static_channels(mxc_sdma_channels); + + return 0; +} + +arch_initcall(mxc_dma_init); + +#else +int mxc_request_dma(int *channel, const char *devicename) +{ + return -ENODEV; +} + +int mxc_dma_setup_channel(int channel, dma_channel_params * p) +{ + return -ENODEV; +} + +int mxc_dma_set_channel_priority(unsigned int channel, unsigned int priority) +{ + return -ENODEV; +} + +int mxc_dma_set_config(int channel, dma_request_t * p, int bd_index) +{ + return -ENODEV; +} + +int mxc_dma_get_config(int channel, dma_request_t * p, int bd_index) +{ + return -ENODEV; +} + +int mxc_dma_start(int channel) +{ + return -ENODEV; +} + +int mxc_dma_stop(int channel) +{ + return -ENODEV; +} + +void mxc_free_dma(int channel) +{ +} + +void mxc_dma_set_callback(int channel, dma_callback_t callback, void *arg) +{ +} + +void *sdma_malloc(size_t size) +{ + return 0; +} + +void sdma_free(void *buf) +{ +} + +void *sdma_phys_to_virt(unsigned long buf) +{ + return 0; +} + +unsigned long sdma_virt_to_phys(void *buf) +{ + return 0; +} + +int mxc_dma_request(mxc_dma_device_t channel_id, char *dev_name) +{ + return -ENODEV; +} + +int mxc_dma_free(int channel_num) +{ + return -ENODEV; +} + +int mxc_dma_config(int channel_num, mxc_dma_requestbuf_t * dma_buf, + int num_buf, mxc_dma_mode_t mode) +{ + return -ENODEV; +} + +int mxc_dma_sg_config(int channel_num, struct scatterlist *sg, + int num_buf, int num_of_bytes, mxc_dma_mode_t mode) +{ + return -ENODEV; +} + +int mxc_dma_callback_set(int channel_num, mxc_dma_callback_t callback, + void *arg) +{ + return -ENODEV; +} + +int mxc_dma_disable(int channel_num) +{ + return -ENODEV; +} + +int mxc_dma_enable(int channel_num) +{ + return -ENODEV; +} + +EXPORT_SYMBOL(mxc_request_dma); +EXPORT_SYMBOL(mxc_dma_setup_channel); +EXPORT_SYMBOL(mxc_dma_set_channel_priority); +EXPORT_SYMBOL(mxc_dma_set_config); +EXPORT_SYMBOL(mxc_dma_get_config); +EXPORT_SYMBOL(mxc_dma_start); +EXPORT_SYMBOL(mxc_dma_stop); +EXPORT_SYMBOL(mxc_free_dma); +EXPORT_SYMBOL(mxc_dma_set_callback); +EXPORT_SYMBOL(sdma_malloc); +EXPORT_SYMBOL(sdma_free); +EXPORT_SYMBOL(sdma_phys_to_virt); +EXPORT_SYMBOL(sdma_virt_to_phys); + +#endif + +EXPORT_SYMBOL(mxc_dma_request_ext); +EXPORT_SYMBOL(mxc_dma_free); +EXPORT_SYMBOL(mxc_dma_config); +EXPORT_SYMBOL(mxc_dma_sg_config); +EXPORT_SYMBOL(mxc_dma_callback_set); +EXPORT_SYMBOL(mxc_dma_disable); +EXPORT_SYMBOL(mxc_dma_enable); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Linux SDMA API"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/Makefile @@ -0,0 +1,18 @@ +ifneq ($(KBUILD_SRC),) +ccflags-y += -I$(KBUILD_SRC)/arch/arm/plat-mxc/sdma/iapi/include \ + -I$(KBUILD_SRC)/include/linux \ + -DMCU -DOS=LINUX \ + -DL_I_T_T_L_E_ENDIAN=0 -DB_I_G_ENDIAN=1 \ + -DENDIANNESS=L_I_T_T_L_E_ENDIAN +else +ccflags-y += -Iarch/arm/plat-mxc/sdma/iapi/include \ + -Iinclude/linux \ + -DMCU -DOS=LINUX \ + -DL_I_T_T_L_E_ENDIAN=0 -DB_I_G_ENDIAN=1 \ + -DENDIANNESS=L_I_T_T_L_E_ENDIAN +endif + +obj-y += dma_sdma.o +obj-$(CONFIG_MXC_SDMA_API) += sdma.o +obj-$(CONFIG_MXC_SDMA_API) += iapi/ +obj-$(CONFIG_MXC_SDMA_API) += sdma_malloc.o --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/sdma.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/sdma.c @@ -0,0 +1,1481 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file plat-mxc/sdma/sdma.c + * @brief This file contains functions for Smart DMA API + * + * SDMA (Smart DMA) is used for transferring data between MCU and peripherals + * + * @ingroup SDMA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "iapi.h" + +#define M3_BASE_ADDRESS CSD0_BASE_ADDR +#define CHAD(ch) sdma_data[0].cd->ccb_ptr[ch].channelDescriptor + +/*! + * SDMA status mutex + */ +static struct semaphore sdma_status_mutex; + +/*! + * SDMA channel sleep queues + */ +//static struct semaphore sdma_sleep_mutex[MAX_DMA_CHANNELS]; +static wait_queue_head_t sdma_sleep_queue[MAX_DMA_CHANNELS]; + +/*! + * SDMA channel synchronization + */ +static struct semaphore sdma_synch_mutex[MAX_DMA_CHANNELS]; + +/*! + * SDMA buffers pool initialization function + */ +extern void init_sdma_pool(void); + +/*! + * Flags are save and restored during interrupt handler + */ +unsigned long flags; + +struct clk *mxc_sdma_ahb_clk, *mxc_sdma_ipg_clk; + +/*! + * Structure containing sdma channels information. + */ +typedef struct { + /*! Channel number */ + int channel; + /*! Channel usage name */ + int in_use; + /*! Name of device using the channel */ + char devicename[MAX_DEVNAME_LENGTH]; + /*! Transfer type. Needed for setting SDMA script */ + sdma_transferT transfer_type; + /*! Peripheral type. Needed for setting SDMA script */ + sdma_periphT peripheral_type; + /*! Watermark level of device's fifo */ + __u32 watermark_level; + /*! Peripheral event id */ + int event_id; + /*! Peripheral event id2 (for channels that use 2 events) */ + int event_id2; + /*! Running status (boolean) */ + int running; + /*! buffer descriptors number */ + int bd_number; + /*! callback function */ + dma_callback_t callback; + /*! callback argument */ + void *arg; + /*! SDMA data access word size */ + unsigned long word_size:8; + /*! channel descriptor pointer */ + channelDescriptor *cd; +} sdma_struct; + +/*! + * Used to save the status of channels. + */ +static sdma_struct sdma_data[MAX_DMA_CHANNELS]; + +/*! + * Stores the start address of the SDMA scripts + */ +static sdma_script_start_addrs sdma_script_addrs; + +extern void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_add); + +/*! + * Init sleep mutex of the channel + * + * @param channel channel number + */ +static void sdma_init_sleep(int channel) +{ + init_waitqueue_head(&sdma_sleep_queue[channel]); +} + +/*! + * Puts channel to sleep + * + * @param channel channel number + */ +static void sdma_sleep_channel(int channel) +{ + while ((iapi_SDMAIntr & (1 << channel)) == 0) { + wait_event_interruptible(sdma_sleep_queue[channel], + ((iapi_SDMAIntr & (1 << channel)) != + 0)); + } +} + +/*! + * Wake up channel from sleep + * + * @param channel channel number + */ +static void sdma_wakeup_channel(int channel) +{ + wake_up_interruptible(&sdma_sleep_queue[channel]); +} + +/*! + * Sdma interrupt handler routine. + * Calls channels callback function + * + * @param irq the interrupt number + * @param dev_id driver private data + * @return the function returns \b IRQ_RETVAL(1) - interrupt was handled + */ +static irqreturn_t sdma_int_handler(int irq, void *dev_id) +{ + IRQ_Handler(); + return IRQ_RETVAL(1); +} + +/*! + * I.API channel callback function + * + * @param cd channel descriptor structure + * @param channel_data SDMA struct of the current channel + */ +static void iapi_interrupt_callback(channelDescriptor * cd, + sdma_struct * channel_data) +{ + int channel; + dma_callback_t callback; + void *arg; + + channel = channel_data->channel; + + channel_data->running = 0; + + arg = channel_data->arg; + + if (arg == 0) { + arg = (void *)&channel; + } + + callback = channel_data->callback; + + if (callback != 0) { + callback(arg); + } +} + +/*! + * Returns pc of SDMA script according to peripheral and transfer type + * + * @param peripheral_type peripheral type + * @param transfer_type transfer type + * + * @return PC of SDMA script +*/ +static unsigned short sdma_get_pc(sdma_periphT peripheral_type, + sdma_transferT transfer_type) +{ + int res = 0; + + if (peripheral_type == MEMORY) { + switch (transfer_type) { + case emi_2_int: + res = sdma_script_addrs.mxc_sdma_ap_2_ap_addr; + break; + case emi_2_emi: + res = sdma_script_addrs.mxc_sdma_ap_2_ap_addr; + break; + case int_2_emi: + res = sdma_script_addrs.mxc_sdma_ap_2_ap_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == DSP) { + switch (transfer_type) { + case emi_2_dsp: + res = sdma_script_addrs.mxc_sdma_ap_2_bp_addr; + break; + case dsp_2_emi: + res = sdma_script_addrs.mxc_sdma_bp_2_ap_addr; + break; + case dsp_2_emi_loop: + res = + sdma_script_addrs. + mxc_sdma_loopback_on_dsp_side_addr; + break; + case emi_2_dsp_loop: + res = + sdma_script_addrs.mxc_sdma_mcu_interrupt_only_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == FIRI) { + switch (transfer_type) { + case per_2_int: + res = sdma_script_addrs.mxc_sdma_firi_2_per_addr; + break; + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_firi_2_mcu_addr; + break; + case int_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_firi_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_firi_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == UART) { + switch (transfer_type) { + case per_2_int: + res = sdma_script_addrs.mxc_sdma_uart_2_per_addr; + break; + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_uart_2_mcu_addr; + break; + case int_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_app_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_app_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == UART_SP) { + switch (transfer_type) { + case per_2_int: + res = sdma_script_addrs.mxc_sdma_uartsh_2_per_addr; + break; + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_uartsh_2_mcu_addr; + break; + case int_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_shp_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_shp_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == ATA) { + switch (transfer_type) { + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_ata_2_mcu_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_ata_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == CSPI || peripheral_type == EXT || + peripheral_type == SSI) { + switch (transfer_type) { + case per_2_int: + res = sdma_script_addrs.mxc_sdma_app_2_per_addr; + break; + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_app_2_mcu_addr; + break; + case int_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_app_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_app_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == SSI_SP || peripheral_type == MMC || + peripheral_type == SDHC || peripheral_type == CSPI_SP || + peripheral_type == ESAI || peripheral_type == MSHC_SP) { + switch (transfer_type) { + case per_2_int: + res = sdma_script_addrs.mxc_sdma_shp_2_per_addr; + break; + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_shp_2_mcu_addr; + break; + case int_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_shp_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_shp_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == ASRC) { + switch (transfer_type) { + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_asrc_2_mcu_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_asrc_2_mcu_addr; + break; + case per_2_per: + res = sdma_script_addrs.mxc_sdma_per_2_per_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == MSHC) { + switch (transfer_type) { + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_mshc_2_mcu_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_mshc_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == CCM) { + switch (transfer_type) { + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_dptc_dvfs_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == FIFO_MEMORY) { + res = sdma_script_addrs.mxc_sdma_ap_2_ap_fixed_addr; + } else if (peripheral_type == SPDIF) { + switch (transfer_type) { + case per_2_emi: + res = sdma_script_addrs.mxc_sdma_spdif_2_mcu_addr; + break; + case emi_2_per: + res = sdma_script_addrs.mxc_sdma_mcu_2_spdif_addr; + break; + default: + res = -EINVAL; + } + } else if (peripheral_type == IPU_MEMORY) { + if (transfer_type == emi_2_per) { + res = sdma_script_addrs.mxc_sdma_ext_mem_2_ipu_addr; + } else { + res = -EINVAL; + } + } + + if (res < 0) { + printk(KERN_ERR "SDMA script not found\n"); + } + + return res; + +} + +static inline int sdma_asrc_set_info(dma_channel_params *p, + script_data *pcontext, int eflags) +{ + dma_channel_ext_params *ep = (dma_channel_ext_params *) p; + unsigned int wml, tmp, wml1, wml2; + struct dma_channel_asrc_info *info = &(ep->info.asrc); + wml = 0; + if (p->transfer_type == per_2_per) { + if (!p->ext) + return wml; + wml1 = p->watermark_level; + wml2 = ep->watermark_level2; + if (info->channs) { + wml |= (info->channs & SDMA_ASRC_INFO_N_MASK) << + SDMA_ASRC_INFO_N_OFF; + if (ep->p2p_dir) + wml2 *= info->channs & SDMA_ASRC_INFO_N_MASK; + else + wml1 *= info->channs & SDMA_ASRC_INFO_N_MASK; + } + if (info->channs & 1) { + if (ep->p2p_dir) + wml |= SDMA_ASRC_P2P_INFO_PS; + else + wml |= SDMA_ASRC_P2P_INFO_PA; + } + if (wml1 > wml2) { + tmp = wml2 & SDMA_ASRC_P2P_INFO_LWML_MASK; + wml |= tmp << SDMA_ASRC_P2P_INFO_LWML_OFF; + tmp = wml1 & SDMA_ASRC_P2P_INFO_HWML_MASK; + wml |= tmp << SDMA_ASRC_P2P_INFO_HWML_OFF; + if (eflags & (1 << 31)) + wml |= SDMA_ASRC_P2P_INFO_LWE; + if (eflags & (1 << 30)) + wml |= SDMA_ASRC_P2P_INFO_HWE; + } else { + tmp = wml1 & SDMA_ASRC_P2P_INFO_LWML_MASK; + wml |= tmp << SDMA_ASRC_P2P_INFO_LWML_OFF; + tmp = wml2 & SDMA_ASRC_P2P_INFO_HWML_MASK; + wml |= tmp << SDMA_ASRC_P2P_INFO_HWML_OFF; + wml |= eflags >> 2; + tmp = pcontext->event_mask2; + pcontext->event_mask2 = pcontext->event_mask1; + pcontext->event_mask1 = tmp; + } + } else { + if (p->ext && info->channs) { + wml |= (info->channs & SDMA_ASRC_INFO_N_MASK) << + SDMA_ASRC_INFO_N_OFF; + tmp = (info->channs * p->watermark_level) & + SDMA_ASRC_INFO_WML_MASK; + wml |= tmp << SDMA_ASRC_INFO_WML_OFF; + } else { + tmp = (p->watermark_level & SDMA_ASRC_INFO_WML_MASK); + wml |= tmp << SDMA_ASRC_INFO_WML_OFF; + } + + if (p->transfer_type == per_2_emi) + wml |= SDMA_ASRC_INFO_TXFR_DIR; + + if (p->ext && (info->channs & 1)) { + if (p->transfer_type == per_2_emi) + wml |= SDMA_ASRC_INFO_PS; + else + wml |= SDMA_ASRC_INFO_PA; + } + wml |= eflags; + } + return wml; +} + +/*! + * Downloads channel context according to channel parameters + * + * @param channel channel number + * @param p channel parameters + */ +static int sdma_load_context(int channel, dma_channel_params * p) +{ + script_data context; + int res; + int event1_greater_than_32; + int event2_greater_than_32; + dma_channel_ext_params *ep = (dma_channel_ext_params *) p; + + res = 0; + + memset(&context, 0, sizeof(script_data)); + context.load_address = sdma_get_pc(p->peripheral_type, + p->transfer_type); + + if (context.load_address > 0) { + if ((p->peripheral_type != MEMORY) + && (p->peripheral_type != DSP)) { + /* Handle multiple event channels differently */ + if (p->event_id2) { + if (p->event_id2 < 32) { + context.event_mask2 = + 0x1 << p->event_id2; + event2_greater_than_32 = 0; + } else { + context.event_mask2 = + 0x1 << (p->event_id2 - 32); + event2_greater_than_32 = 1 << 31; + } + if (p->event_id < 32) { + context.event_mask1 = + 0x1 << p->event_id; + event1_greater_than_32 = 0; + } else { + context.event_mask1 = + 0x1 << (p->event_id - 32); + event1_greater_than_32 = 1 << 30; + } + } else { + event1_greater_than_32 = 0; + event2_greater_than_32 = 0; + if (p->event_id < 32) { + context.event_mask1 = + 0x1 << p->event_id; + context.event_mask2 = 0; + } else { + context.event_mask1 = 0; + context.event_mask2 = + 0x1 << (p->event_id - 32); + } + } + + if (p->ext) + context.wml = ep->info_bits; + /* Watermark Level */ + if (p->peripheral_type == ASRC) { + context.wml |= sdma_asrc_set_info(p, + &context, + event2_greater_than_32 + | + event1_greater_than_32); + } else + context.wml |= event2_greater_than_32 | + event1_greater_than_32 | p->watermark_level; + + /* Address */ + context.shp_addr = (unsigned long)(p->per_address); + if (p->ext) + context.per_addr = ep->per_address2; + iapi_IoCtl(sdma_data[channel].cd, + IAPI_CHANGE_PERIPHADDR, p->per_address); + } else { + context.wml = M3_BASE_ADDRESS; + } + + sdma_data[channel].transfer_type = p->transfer_type; + sdma_data[channel].peripheral_type = p->peripheral_type; + sdma_data[channel].watermark_level = p->watermark_level; + iapi_AssignScript(sdma_data[channel].cd, &context); + } else { + res = context.load_address; + } + + return res; +} + +/*! + * Setup channel according to parameters. Must be called once after mxc_request_dma() + * + * @param channel channel number + * @param p channel parameters pointer + * @return 0 on success, error code on fail + */ +int mxc_dma_setup_channel(int channel, dma_channel_params * p) +{ + int err = 0; + int i; + + mxc_dma_stop(channel); + + for (i = 0; i < sdma_data[channel].bd_number; i++) { + iapi_IoCtl(sdma_data[channel].cd, + (i << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_STATUS, (unsigned long)0); + } + + sdma_data[channel].bd_number = (p->bd_number <= 0) ? 1 : p->bd_number; + + sdma_data[channel].word_size = p->word_size; + + sdma_data[channel].event_id = p->event_id; + sdma_data[channel].event_id2 = p->event_id2; + + sdma_data[channel].callback = p->callback; + + sdma_data[channel].arg = p->arg; + + err = iapi_IoCtl(sdma_data[channel].cd, + IAPI_CHANGE_BDNUM, sdma_data[channel].bd_number); + + if (err < 0) { + printk(KERN_ERR "Failed allocating buffer \ +descriptors (0x%x)\n", err); + err = -ENOMEM; + goto setup_channel_fail; + } + + if (channel != 0) { + switch (p->transfer_type) { + case dsp_2_per: + break; + case emi_2_per: + case int_2_per: + case per_2_int: + case per_2_emi: + case per_2_per: + /* + * Peripheral <------> Memory + * evtOvr = 0 dspOvr = 1 + */ + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_OWNERSHIP, + (OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + if (p->event_id) { + err = iapi_SetChannelEventMapping(p->event_id, + 0x1 << + channel); + } + if (!err && p->event_id2) { + err = iapi_SetChannelEventMapping(p->event_id2, + 0x1 << + channel); + } + break; + case emi_2_dsp: + case int_2_dsp: + case dsp_2_int: + case dsp_2_emi: + case dsp_2_dsp: + /* + * DSP <-----------> Memory + * evtOvr = 1 dspOvr = 0 + */ + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_OWNERSHIP, + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + break; + case emi_2_int: + case emi_2_emi: + case int_2_int: + case int_2_emi: + case emi_2_dsp_loop: + case dsp_2_emi_loop: + /* evtOvr = 1 dspOvr = 1 */ + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_OWNERSHIP, + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + break; + case per_2_dsp: + /* evtOvr = 0 dspOvr = 0 */ + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_OWNERSHIP, + (OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + err = iapi_SetChannelEventMapping(p->event_id, + 0x1 << channel); + break; + default: + break; + printk(KERN_ERR "Wrong SDMA transfer type\n"); + err = -EINVAL; + } + if (err == 0) { + err = sdma_load_context(channel, p); + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_PRIORITY, + MXC_SDMA_DEFAULT_PRIORITY); + } + } + setup_channel_fail: + return err; +} + +/*! + * Setup the channel priority. This can be used to change the default priority + * for the channel. + * + * @param channel channel number + * @param priority priority to be set for the channel + * + * @return 0 on success, error code on failure + */ +int mxc_dma_set_channel_priority(unsigned int channel, unsigned int priority) +{ + if (priority < MXC_SDMA_MIN_PRIORITY + || priority > MXC_SDMA_MAX_PRIORITY) { + return -EINVAL; + } + return iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_PRIORITY, + priority); +} + +/*! + * Allocates dma channel. + * If channel's value is 0, then the function allocates a free channel + * dynamically and sets its value to channel. + * Else allocates requested channel if it is free. + * If the channel is busy or no free channels (in dynamic allocation) -EBUSY returned. + * + * @param channel pointer to channel number + * @param devicename device name + * @return 0 on success, error code on fail + */ +int mxc_request_dma(int *channel, const char *devicename) +{ + int i, res; + + res = 0; + + down(&sdma_status_mutex); + + /* Dynamic allocation */ + if (*channel == 0) { + for (i = MAX_DMA_CHANNELS - 1; i > 0; i--) { +#ifdef CONFIG_SDMA_IRAM + /*TODO:It will be removed after DPTC used UDMA interface */ + if (i >= MXC_DMA_CHANNEL_IRAM) + continue; +#endif /*CONFIG_SDMA_IRAM */ + if (!sdma_data[i].in_use) { + *channel = i; + break; + } + } + } + + if (*channel > 0 && *channel < MAX_DMA_CHANNELS && + sdma_data[*channel].in_use == 0) { + res = iapi_Open(sdma_data[0].cd, *channel); + + if (res < 0) { + printk(KERN_ERR "Failed iapi_Open channel %d, 0x%x\n", + *channel, res); + } else { + sdma_data[*channel].in_use = 1; + strcpy(sdma_data[*channel].devicename, devicename); + sdma_data[*channel].cd = CHAD(*channel); + + iapi_IoCtl(sdma_data[*channel].cd, IAPI_CHANGE_SYNCH, + CALLBACK_ISR); + iapi_IoCtl(sdma_data[*channel].cd, + IAPI_CHANGE_CALLBACKFUNC, + (unsigned long)iapi_interrupt_callback); + iapi_IoCtl(sdma_data[*channel].cd, + IAPI_CHANGE_USER_ARG, + (unsigned long)&(sdma_data[*channel])); + } + } else { + res = -EBUSY; + } + + up(&sdma_status_mutex); + + return res; +} + +/*! + * Configures request parameters. Can be called multiple times after + * mxc_request_dma() and mxc_dma_setup_channel(). + * + * + * @param channel channel number + * @param p request parameters pointer + * @param bd_index index of buffer descriptor to set + * @return 0 on success, error code on fail + */ +int mxc_dma_set_config(int channel, dma_request_t * p, int bd_index) +{ + unsigned char param; + + if (!sdma_data[channel].in_use) { + return -EINVAL; + } + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_TRANSFER_CD, sdma_data[channel].word_size); + + param = BD_DONE | BD_INTR | BD_EXTD; + + if (sdma_data[channel].bd_number > 1 && p->bd_cont == 1) { + param |= BD_CONT; + } + + if (bd_index == sdma_data[channel].bd_number - 1) { + param |= BD_WRAP; + } + + switch (sdma_data[channel].transfer_type) { + case emi_2_per: + case dsp_2_per: + case int_2_per: + case emi_2_dsp: + case int_2_dsp: + case emi_2_dsp_loop: + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_BUFFERADDR, + (unsigned long)p->sourceAddr); + break; + case per_2_int: + case per_2_emi: + case per_2_dsp: + case dsp_2_int: + case dsp_2_emi: + case dsp_2_dsp: + case dsp_2_emi_loop: + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_BUFFERADDR, + (unsigned long)p->destAddr); + break; + case emi_2_int: + case emi_2_emi: + case int_2_int: + case int_2_emi: + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_BUFFERADDR, + (unsigned long)p->sourceAddr); + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_EXTDBUFFERADDR, + (unsigned long)p->destAddr); + break; + default: + break; + } + + /* Change the endianness for DSP to MCU Data transfers */ + if (sdma_data[channel].transfer_type == dsp_2_emi || + sdma_data[channel].transfer_type == emi_2_dsp) { + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_SET_ENDIANNESS, + SET_BIT_ALL); + } + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_COUNT, p->count); + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | IAPI_CHANGE_SET_STATUS, param); + + return 0; +} + +/*! + * Configures the BD_INTR bit on a buffer descriptor parameters. + * + * + * @param channel channel number + * @param bd_index index of buffer descriptor to set + * @param bd_intr flag to set or clear the BD_INTR bit + * @return 0 on success, error code on fail + */ +void mxc_dma_set_bd_intr(int channel, int bd_index, int bd_intr) +{ + unsigned long param; + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_STATUS, (unsigned long)¶m); + + if (bd_intr) { + param |= BD_INTR; + } else { + param &= ~BD_INTR; + } + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | IAPI_CHANGE_SET_STATUS, param); + +} + +/*! + * Gets the BD_INTR bit on a buffer descriptor. + * + * + * @param channel channel number + * @param bd_index index of buffer descriptor to set + * + * @return returns the BD_INTR bit status + */ +int mxc_dma_get_bd_intr(int channel, int bd_index) +{ + unsigned long bd_status = 0; + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_STATUS, (unsigned long)&bd_status); + + return (bd_status & BD_INTR); +} + +/*! + * Stop the current transfer + * + * @param channel channel number + * @param buffer_number number of buffers (beginning with 0), + * whose done bits should be reset to 0 + */ +int mxc_dma_reset(int channel, int buffer_number) +{ + unsigned char param = 0; + int i = 0; + + if (!sdma_data[channel].in_use) { + return -EINVAL; + } + + /* clear the BD_DONE bits for all the necessary buffers */ + for (i = 0; i < buffer_number; i++) { + + iapi_IoCtl(sdma_data[channel].cd, (i << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_STATUS, (unsigned long)¶m); + + /* clear the BD_DONE bit of the buffer */ + param = param & (~BD_DONE); + + iapi_IoCtl(sdma_data[channel].cd, (i << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_STATUS, param); + } + + return 0; +} + +/*! + * Returns request parameters. + * + * @param channel channel number + * @param p request parameters pointer + * @param bd_index index of buffer descriptor to get + * @return 0 on success, error code on fail + */ +int mxc_dma_get_config(int channel, dma_request_t * p, int bd_index) +{ + int err = 0; + unsigned long bd_status; + unsigned long bd_count; + __u8 *sourceAddr; + __u8 *destAddr; + + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_STATUS, (unsigned long)&bd_status); + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_COUNT, (unsigned long)&bd_count); + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_BUFFERADDR, (unsigned long)&sourceAddr); + + switch (sdma_data[channel].transfer_type) { + case emi_2_per: + case dsp_2_per: + case int_2_per: + case emi_2_dsp: + case int_2_dsp: + case emi_2_dsp_loop: + p->sourceAddr = sourceAddr; + break; + case per_2_int: + case per_2_emi: + case per_2_dsp: + case dsp_2_int: + case dsp_2_emi: + case dsp_2_dsp: + case dsp_2_emi_loop: + p->destAddr = sourceAddr; + break; + case emi_2_int: + case emi_2_emi: + case int_2_int: + case int_2_emi: + p->sourceAddr = sourceAddr; + iapi_IoCtl(sdma_data[channel].cd, + (bd_index << BD_NUM_OFFSET) | + IAPI_CHANGE_GET_EXTDBUFFERADDR, + (unsigned long)&destAddr); + p->destAddr = destAddr; + break; + default: + break; + } + + p->count = bd_count; + p->bd_done = bd_status & BD_DONE; + p->bd_cont = bd_status & BD_CONT; + p->bd_error = bd_status & BD_RROR; + + return err; +} + +/*! + * This function is used by MXC IPC's write_ex2. It passes the pointer to the + * data control structure to iapi_write_ipcv2() + * + * @param channel SDMA channel number + * @param ctrl_ptr Data Control structure pointer + */ +int mxc_sdma_write_ipcv2(int channel, void *ctrl_ptr) +{ + return iapi_Write_ipcv2(sdma_data[channel].cd, ctrl_ptr); +} + +/*! + * This function is used by MXC IPC's read_ex2. It passes the pointer to the + * data control structure to iapi_read_ipcv2() + * + * @param channel SDMA channel number + * @param ctrl_ptr Data Control structure pointer + */ +int mxc_sdma_read_ipcv2(int channel, void *ctrl_ptr) +{ + return iapi_Read_ipcv2(sdma_data[channel].cd, ctrl_ptr); +} + +/*! + * Starts dma channel. + * + * @param channel channel number + */ +int mxc_dma_start(int channel) +{ + if (sdma_data[channel].running == 0) { + sdma_data[channel].running = 1; + iapi_StartChannel(channel); + } + + return 0; +} + +/*! + * Stops dma channel. + * + * @param channel channel number + */ +int mxc_dma_stop(int channel) +{ + iapi_StopChannel(channel); + sdma_data[channel].running = 0; + + return 0; +} + +/*! + * Frees dma channel. + * + * @param channel channel number + */ +void mxc_free_dma(int channel) +{ + int i; + + mxc_dma_stop(channel); + + if (sdma_data[channel].event_id != 0) { + iapi_SetChannelEventMapping(sdma_data[channel].event_id, 0x0); + } + if (sdma_data[channel].event_id2 != 0) { + iapi_SetChannelEventMapping(sdma_data[channel].event_id2, 0x0); + } + + sdma_data[channel].event_id = 0; + + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_PRIORITY, 0x0); + iapi_IoCtl(sdma_data[channel].cd, IAPI_CHANGE_OWNERSHIP, + (OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + + for (i = 0; i < sdma_data[channel].bd_number; i++) { + iapi_IoCtl(sdma_data[channel].cd, + (i << BD_NUM_OFFSET) | + IAPI_CHANGE_SET_STATUS, (unsigned long)0); + } + + iapi_Close(sdma_data[channel].cd); + + strcpy(sdma_data[channel].devicename, "not used"); + + sdma_data[channel].in_use = 0; +} + +/*! + * Initializes channel's priorities + * + */ +static void __init init_priorities(void) +{ + iapi_IoCtl(sdma_data[0].cd, IAPI_CHANGE_PRIORITY, 0x7); +} + +/*! + * Initializes events table + */ +static void __init init_event_table(void) +{ + int channel; + + for (channel = 0; channel < MAX_DMA_CHANNELS; channel++) { + iapi_SetChannelEventMapping(channel, 0); + } +} + +/*! + * Sets callback function. Used with standard dma api + * for supporting interrupts + * + * @param channel channel number + * @param callback callback function pointer + * @param arg argument for callback function + */ +void mxc_dma_set_callback(int channel, dma_callback_t callback, void *arg) +{ + sdma_data[channel].callback = callback; + sdma_data[channel].arg = arg; +} + +/*! + * Synchronization function used by I.API + * + * @param channel channel number + */ +static int getChannel(int channel) +{ + if (irqs_disabled() || in_atomic()) { + if (down_trylock(&sdma_synch_mutex[channel])) { + return -EBUSY; + } + } else { + if (down_interruptible(&sdma_synch_mutex[channel])) { + return -EBUSY; + } + } + + return 0; +} + +/*! + * Synchronization function used by I.API + * + * @param channel channel number + */ +static int releaseChannel(int channel) +{ + up(&sdma_synch_mutex[channel]); + return 0; +} + +/*! + * Unmask interrupt function. Used by I.API + * + */ +static void unmask_sdma_interrupt(void) +{ + /* Commented out tp take care of the PREEMPT_RT option + * local_irq_restore(flags); + */ +} + +/*! + * Mask interrupt function. Used by I.API + * + */ +static void mask_sdma_interrupt(void) +{ + /* Commented to take of the PREEMPT_RT option + * local_irq_save(flags); + */ +} + +/*! + * Initializes I.API + */ +static void __init init_iapi_struct(void) +{ + channelDescriptor *cd; + + printk(KERN_INFO "Using SDMA I.API\n"); + + iapi_Malloc = &sdma_malloc; +#ifdef CONFIG_SDMA_IRAM + iapi_iram_Malloc = &sdma_iram_malloc; +#endif /*CONFIG_SDMA_IRAM */ + + iapi_Free = &sdma_free; + iapi_Virt2Phys = (void *(*)(void *))&sdma_virt_to_phys; + iapi_Phys2Virt = (void *(*)(void *))&sdma_phys_to_virt; + iapi_memset = &memset; + iapi_memcpy = &memcpy; + + iapi_GotoSleep = &sdma_sleep_channel; + iapi_WakeUp = &sdma_wakeup_channel; + iapi_InitSleep = &sdma_init_sleep; + iapi_ReleaseChannel = &releaseChannel; + iapi_GetChannel = &getChannel; + + iapi_EnableInterrupts = &unmask_sdma_interrupt; + iapi_DisableInterrupts = &mask_sdma_interrupt; + + cd = kmalloc(sizeof(channelDescriptor), GFP_KERNEL); + + memset(cd, 0, sizeof(channelDescriptor)); + + sdma_data[0].cd = cd; +} + +/*! + * Initializes channel synchronization mutexes + */ +static void __init init_mutexes(void) +{ + int i; + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + init_MUTEX(&sdma_synch_mutex[i]); + } + + init_MUTEX(&sdma_status_mutex); +} + +/*! + * Channels status read proc file system function + * + * @param buf pointer to the buffer the data shuld be written to. + * @param start pointer to the pointer where the new data is + * written to. + * procedure should update the start pointer to point to + * where in the buffer the data was written. + * @param offset offset from start of the file + * @param count number of bytes to read. + * @param eof pointer to eof flag. sould be set to 1 when + * reaching eof. + * @param data driver specific data pointer. + * + * @return number byte read from the log buffer. + */ +static int proc_read_channels(char *buf, char **start, off_t offset, int count, + int *eof, void *data) +{ + char *log; + char *log_ptr; + char tmp[48]; + int i; + + log = kmalloc(4096, GFP_KERNEL); + memset(log, 0, 4096); + log_ptr = log; + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + if (sdma_data[i].in_use == 0) { + continue; + } + + memset(tmp, 0, 48); + sprintf(tmp, "Channel %d: %s\n", i, sdma_data[i].devicename); + + strcpy(log_ptr, tmp); + log_ptr += strlen(tmp); + } + + if (offset > strlen(log)) { + *eof = 1; + count = 0; + } else { + if (offset + count > strlen(log)) { + count = strlen(log) - offset; + *eof = 1; + } else { + *eof = 0; + } + + memcpy(buf, log, count); + *start = buf; + kfree(log); + } + + return count; +} + +/*! + * SDMA proc file system read function + */ +static int __init init_proc_fs(void) +{ + struct proc_dir_entry *sdma_proc_dir; + int res; + + res = 0; + + sdma_proc_dir = proc_mkdir("sdma", NULL); + create_proc_read_entry("channels", 0, sdma_proc_dir, + proc_read_channels, NULL); + + if (res < 0) { + printk(KERN_WARNING "Failed create SDMA proc entry\n"); + } + + return res; +} + +/*! + * Initializes SDMA private data + */ +static void __init init_sdma_data(void) +{ + int i; + + memset(sdma_data, 0, sizeof(sdma_struct) * MAX_DMA_CHANNELS); + sdma_data[0].in_use = 1; + strcpy(sdma_data[0].devicename, "MCU"); + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + sdma_data[i].channel = i; + } +} + +#if defined(CONFIG_MXC_SUPER_GEM) +/*! + * Initialize the Super GEM SDMA channel + * + * @return returns -1 on error, 0 on success. + */ +static int __init init_super_gem(void) +{ + channelDescriptor *cd; + script_data context; + int res = 0; + + res = iapi_Open(sdma_data[0].cd, MXC_DMA_CHANNEL_GEM); + if (res < 0) { + return -1; + } + sdma_data[MXC_DMA_CHANNEL_GEM].in_use = 1; + cd = CHAD(MXC_DMA_CHANNEL_GEM); + memset(&context, 0, sizeof(script_data)); + context.load_address = sdma_script_addrs.mxc_sdma_utra_addr; + context.wml = M3_BASE_ADDRESS; + res = iapi_AssignScript(cd, &context); + if (res < 0) { + iapi_Close(cd); + sdma_data[MXC_DMA_CHANNEL_GEM].in_use = 0; + return -1; + } + res = + iapi_IoCtl(cd, IAPI_CHANGE_OWNERSHIP, + (OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT) | + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU) | + (OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP)); + if (res < 0) { + iapi_Close(cd); + sdma_data[MXC_DMA_CHANNEL_GEM].in_use = 0; + return -1; + } + /* Set EP=1, which is required to start SuperGem script the first time */ + /* This can be done only on the AP side */ + SDMA_H_EVTPEND |= 1 << MXC_DMA_CHANNEL_GEM; + + res = + iapi_SetChannelEventMapping(DMA_REQ_GEM, 1 << MXC_DMA_CHANNEL_GEM); + if (res < 0) { + iapi_Close(cd); + sdma_data[MXC_DMA_CHANNEL_GEM].in_use = 0; + return -1; + } + + return 0; +} +#endif + +/*! + * Initializes dma + */ +int __init sdma_init(void) +{ + int res = 0; + configs_data confreg_data; + + /* Initialize to the default values */ + confreg_data = iapi_ConfigDefaults; + + confreg_data.dspdma = 0; + /* Set ACR bit */ + mxc_sdma_ahb_clk = clk_get(NULL, "sdma_ahb_clk"); + mxc_sdma_ipg_clk = clk_get(NULL, "sdma_ipg_clk"); + clk_enable(mxc_sdma_ahb_clk); + clk_enable(mxc_sdma_ipg_clk); + if (clk_get_rate(mxc_sdma_ahb_clk) / clk_get_rate(mxc_sdma_ipg_clk) < 2) { + printk(KERN_INFO "Setting SDMA ACR\n"); + confreg_data.acr = 1; + } + + init_sdma_data(); + + init_sdma_pool(); + + res = request_irq(MXC_INT_SDMA, sdma_int_handler, 0, "mxcsdma", 0); + + if (res < 0) { + goto sdma_init_fail; + } + + init_mutexes(); + + init_iapi_struct(); + + mxc_sdma_get_script_info(&sdma_script_addrs); + + res = iapi_Init(sdma_data[0].cd, &confreg_data, + sdma_script_addrs.mxc_sdma_start_addr, + sdma_script_addrs.mxc_sdma_ram_code_size * 2, + sdma_script_addrs.mxc_sdma_ram_code_start_addr); + + if (res < 0) { + free_irq(MXC_INT_SDMA, 0); + goto sdma_init_fail; + } + + init_priorities(); + + init_event_table(); + +#if defined(CONFIG_MXC_SUPER_GEM) + res = init_super_gem(); + if (res < 0) { + free_irq(MXC_INT_SDMA, 0); + goto sdma_init_fail; + } +#endif + + init_proc_fs(); + + printk(KERN_INFO "MXC DMA API initialized\n"); + + clk_disable(mxc_sdma_ahb_clk); + clk_disable(mxc_sdma_ipg_clk); + return res; + + sdma_init_fail: + printk(KERN_ERR "Error 0x%x in sdma_init\n", res); + clk_disable(mxc_sdma_ahb_clk); + clk_disable(mxc_sdma_ipg_clk); + return res; + +} + +arch_initcall(sdma_init); + +EXPORT_SYMBOL(mxc_request_dma); +EXPORT_SYMBOL(mxc_free_dma); +EXPORT_SYMBOL(mxc_dma_setup_channel); +EXPORT_SYMBOL(mxc_dma_set_channel_priority); +EXPORT_SYMBOL(mxc_dma_set_config); +EXPORT_SYMBOL(mxc_dma_get_config); +EXPORT_SYMBOL(mxc_dma_set_bd_intr); +EXPORT_SYMBOL(mxc_dma_get_bd_intr); +EXPORT_SYMBOL(mxc_dma_reset); +EXPORT_SYMBOL(mxc_sdma_write_ipcv2); +EXPORT_SYMBOL(mxc_sdma_read_ipcv2); +EXPORT_SYMBOL(mxc_dma_start); +EXPORT_SYMBOL(mxc_dma_stop); +EXPORT_SYMBOL(sdma_malloc); +EXPORT_SYMBOL(sdma_free); +EXPORT_SYMBOL(mxc_dma_set_callback); +EXPORT_SYMBOL(sdma_virt_to_phys); +EXPORT_SYMBOL(sdma_phys_to_virt); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MXC Linux SDMA API"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for I.API sources. +# + +obj-y := src/ \ No newline at end of file --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddle.h @@ -0,0 +1,52 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiMiddle.h + * + * $Id iapiMiddle.h $ + * + * Description: + * prototypes for middle level function of I.API + * + * + * + * + * $Log iapiMiddle.h + * + * ***************************************************************************/ + +#ifndef _iapiMiddle_h +#define _iapiMiddle_h + +/* **************************************************************************** + * Include File Section + ******************************************************************************/ +#include "sdmaStruct.h" +#ifdef MCU +#include "iapiMiddleMcu.h" +#endif /* MCU */ + +/* **************************************************************************** + * Public Function Prototype Section + ******************************************************************************/ +bufferDescriptor * iapi_AllocBD (channelControlBlock * ccb_p); +int iapi_AllocContext(contextData ** ctxd_p, unsigned char channel); +int iapi_AllocChannelDesc(channelDescriptor ** cd_p, unsigned char channel); +int iapi_ChangeChannelDesc (channelDescriptor * cd_p, + unsigned char whatToChange, unsigned long newval); +void iapi_InitializeCallbackISR (void (* func_p)(channelDescriptor * cd_p, + void * arg)); +int iapi_InitializeMemory (channelControlBlock * ccb_p); + +#endif /* iapiMiddle_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapiMiddleMcu.h @@ -0,0 +1,41 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiMiddleMcu.h + * + * $Id iapiMiddleMcu.h $ + * + * Description: + * prototypes for middle level function of I.API + * + * + * + * + * $Log iapiMiddleMcu.h + * + * ***************************************************************************/ + +#ifndef _iapiMiddleMcu_h +#define _iapiMiddleMcu_h + +/* **************************************************************************** + * Include File Section + ******************************************************************************/ +#include "sdmaStruct.h" + +/* **************************************************************************** + * Public Function Prototype Section + ******************************************************************************/ + +#endif /* iapiMiddleMcu_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapi.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapi.h @@ -0,0 +1,49 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapi.h + * + * $Id iapi.h $ + * + * Description: + * Unique include for the whole IAPI library. + * + * + * http//compass.mot.com/go/115342679 + * + * $Log iapi.h $ + * + * ***************************************************************************/ + +#ifndef _iapi_h +#define _iapi_h + +/* **************************************************************************** + * Include File Section + * ***************************************************************************/ + +#include "sdmaStruct.h" +#include "iapiDefaults.h" +#include "iapiLow.h" +#include "iapiMiddle.h" +#include "iapiHigh.h" + +#ifdef MCU +#include "iapiLowMcu.h" +#include "iapiMiddleMcu.h" +#endif /* MCU */ + + + +#endif /* _iapi_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/epm.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/epm.h @@ -0,0 +1,187 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_SDMA_REGS_H__ +#define __ASM_ARCH_MXC_SDMA_REGS_H__ + +#include + +/* SDMA Reg definition */ +#define SDMA_BASE_IO_ADDR IO_ADDRESS(SDMA_BASE_ADDR) + +#define SDMA_H_C0PTR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x000)) +#define SDMA_H_INTR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x004)) +#define SDMA_H_STATSTOP *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x008)) +#define SDMA_H_START *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x00C)) +#define SDMA_H_EVTOVR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x010)) +#define SDMA_H_DSPOVR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x014)) +#define SDMA_H_HOSTOVR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x018)) +#define SDMA_H_EVTPEND *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x01C)) +#define SDMA_H_DSPENBL *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x020)) +#define SDMA_H_RESET *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x024)) +#define SDMA_H_EVTERR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x028)) +#define SDMA_H_INTRMSK *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x02C)) +#define SDMA_H_PSW *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x030)) +#define SDMA_H_EVTERRDBG *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x034)) +#define SDMA_H_CONFIG *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x038)) +#define SDMA_ONCE_ENB *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x040)) +#define SDMA_ONCE_DATA *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x044)) +#define SDMA_ONCE_INSTR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x048)) +#define SDMA_ONCE_STAT *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x04C)) +#define SDMA_ONCE_CMD *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x050)) +#define SDMA_EVT_MIRROR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x054)) +#define SDMA_ILLINSTADDR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x058)) +#define SDMA_CHN0ADDR *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x05C)) +#define SDMA_ONCE_RTB *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x060)) +#define SDMA_XTRIG_CONF1 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x070)) +#define SDMA_XTRIG_CONF2 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x074)) + +#ifdef MXC_SDMA_V2 +#define SDMA_CHNENBL_0 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x200)) +#define SDMA_CHNENBL_1 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x204)) +#define SDMA_CHNENBL_2 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x208)) +#define SDMA_CHNENBL_3 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x20C)) +#define SDMA_CHNENBL_4 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x210)) +#define SDMA_CHNENBL_5 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x214)) +#define SDMA_CHNENBL_6 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x218)) +#define SDMA_CHNENBL_7 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x21C)) +#define SDMA_CHNENBL_8 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x220)) +#define SDMA_CHNENBL_9 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x224)) +#define SDMA_CHNENBL_10 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x228)) +#define SDMA_CHNENBL_11 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x22C)) +#define SDMA_CHNENBL_12 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x230)) +#define SDMA_CHNENBL_13 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x234)) +#define SDMA_CHNENBL_14 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x238)) +#define SDMA_CHNENBL_15 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x23C)) +#define SDMA_CHNENBL_16 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x240)) +#define SDMA_CHNENBL_17 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x244)) +#define SDMA_CHNENBL_18 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x248)) +#define SDMA_CHNENBL_19 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x24C)) +#define SDMA_CHNENBL_20 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x250)) +#define SDMA_CHNENBL_21 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x254)) +#define SDMA_CHNENBL_22 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x258)) +#define SDMA_CHNENBL_23 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x25C)) +#define SDMA_CHNENBL_24 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x260)) +#define SDMA_CHNENBL_25 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x264)) +#define SDMA_CHNENBL_26 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x268)) +#define SDMA_CHNENBL_27 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x26C)) +#define SDMA_CHNENBL_28 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x270)) +#define SDMA_CHNENBL_29 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x274)) +#define SDMA_CHNENBL_30 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x278)) +#define SDMA_CHNENBL_31 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x27C)) +#define SDMA_CHNENBL_32 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x280)) +#define SDMA_CHNENBL_33 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x284)) +#define SDMA_CHNENBL_34 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x288)) +#define SDMA_CHNENBL_35 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x28C)) +#define SDMA_CHNENBL_36 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x290)) +#define SDMA_CHNENBL_37 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x294)) +#define SDMA_CHNENBL_38 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x298)) +#define SDMA_CHNENBL_39 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x29C)) +#define SDMA_CHNENBL_40 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A0)) +#define SDMA_CHNENBL_41 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A4)) +#define SDMA_CHNENBL_42 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2A8)) +#define SDMA_CHNENBL_43 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2AC)) +#define SDMA_CHNENBL_44 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B0)) +#define SDMA_CHNENBL_45 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B4)) +#define SDMA_CHNENBL_46 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2B8)) +#define SDMA_CHNENBL_47 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x2BC)) + +#define SDMA_ONCE_COUNT *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x300)) +#define SDMA_ONCE_ECTL *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x304)) +#define SDMA_ONCE_EAA *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x308)) +#define SDMA_ONCE_EAB *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x30C)) +#define SDMA_ONCE_EAM *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x310)) +#define SDMA_ONCE_ED *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x314)) +#define SDMA_ONCE_EDM *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x318)) +#define SDMA_ONCE_PCMATCH *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x31C)) + +#else + +#define SDMA_CHNENBL_0 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x080)) +#define SDMA_CHNENBL_1 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x084)) +#define SDMA_CHNENBL_2 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x088)) +#define SDMA_CHNENBL_3 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x08C)) +#define SDMA_CHNENBL_4 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x090)) +#define SDMA_CHNENBL_5 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x094)) +#define SDMA_CHNENBL_6 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x098)) +#define SDMA_CHNENBL_7 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x09C)) +#define SDMA_CHNENBL_8 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A0)) +#define SDMA_CHNENBL_9 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A4)) +#define SDMA_CHNENBL_10 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0A8)) +#define SDMA_CHNENBL_11 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0AC)) +#define SDMA_CHNENBL_12 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B0)) +#define SDMA_CHNENBL_13 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B4)) +#define SDMA_CHNENBL_14 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0B8)) +#define SDMA_CHNENBL_15 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0BC)) +#define SDMA_CHNENBL_16 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C0)) +#define SDMA_CHNENBL_17 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C4)) +#define SDMA_CHNENBL_18 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0C8)) +#define SDMA_CHNENBL_19 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0CC)) +#define SDMA_CHNENBL_20 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D0)) +#define SDMA_CHNENBL_21 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D4)) +#define SDMA_CHNENBL_22 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0D8)) +#define SDMA_CHNENBL_23 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0DC)) +#define SDMA_CHNENBL_24 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E0)) +#define SDMA_CHNENBL_25 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E4)) +#define SDMA_CHNENBL_26 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0E8)) +#define SDMA_CHNENBL_27 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0EC)) +#define SDMA_CHNENBL_28 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F0)) +#define SDMA_CHNENBL_29 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F4)) +#define SDMA_CHNENBL_30 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0F8)) +#define SDMA_CHNENBL_31 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x0FC)) + +#define SDMA_ONCE_COUNT *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x200)) +#define SDMA_ONCE_ECTL *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x204)) +#define SDMA_ONCE_EAA *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x208)) +#define SDMA_ONCE_EAB *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x20C)) +#define SDMA_ONCE_EAM *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x210)) +#define SDMA_ONCE_ED *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x214)) +#define SDMA_ONCE_EDM *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x218)) +#define SDMA_ONCE_PCMATCH *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x21C)) + +#endif /* MXC_SDMA_V2 */ + +#define SDMA_CHNPRI_0 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x100)) +#define SDMA_CHNPRI_1 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x104)) +#define SDMA_CHNPRI_2 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x108)) +#define SDMA_CHNPRI_3 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x10C)) +#define SDMA_CHNPRI_4 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x110)) +#define SDMA_CHNPRI_5 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x114)) +#define SDMA_CHNPRI_6 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x118)) +#define SDMA_CHNPRI_7 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x11C)) +#define SDMA_CHNPRI_8 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x120)) +#define SDMA_CHNPRI_9 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x124)) +#define SDMA_CHNPRI_10 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x128)) +#define SDMA_CHNPRI_11 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x12C)) +#define SDMA_CHNPRI_12 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x130)) +#define SDMA_CHNPRI_13 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x134)) +#define SDMA_CHNPRI_14 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x138)) +#define SDMA_CHNPRI_15 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x13C)) +#define SDMA_CHNPRI_16 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x140)) +#define SDMA_CHNPRI_17 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x144)) +#define SDMA_CHNPRI_18 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x148)) +#define SDMA_CHNPRI_19 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x14C)) +#define SDMA_CHNPRI_20 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x150)) +#define SDMA_CHNPRI_21 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x154)) +#define SDMA_CHNPRI_22 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x158)) +#define SDMA_CHNPRI_23 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x15C)) +#define SDMA_CHNPRI_24 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x160)) +#define SDMA_CHNPRI_25 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x164)) +#define SDMA_CHNPRI_26 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x168)) +#define SDMA_CHNPRI_27 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x16C)) +#define SDMA_CHNPRI_28 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x170)) +#define SDMA_CHNPRI_29 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x174)) +#define SDMA_CHNPRI_30 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x178)) +#define SDMA_CHNPRI_31 *((volatile unsigned long *)(SDMA_BASE_IO_ADDR + 0x17C)) + +#endif /* _mcuEpm_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapiLowMcu.h @@ -0,0 +1,60 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiLowMcu.h + * + * $Id iapiLowMcu.h $ + * + * Description: + * prototypes for low level function of I.API of MCU side only + * + * + * + * + * $Log iapiLowMcu.h $ + * + * ***************************************************************************/ + +#ifndef _iapiLowMcu_h +#define _iapiLowMcu_h + +/****************************************************************************** + * Include File Section + *****************************************************************************/ +#include "sdmaStruct.h" +#include "iapiDefaults.h" + +/* **************************************************************************** + * Public Function Prototype Section + * ***************************************************************************/ + + +void iapi_InitChannelTables ( void ); +int iapi_ChannelConfig(unsigned char channel, unsigned eventOverride, + unsigned mcuOverride, unsigned dspOverride); +int iapi_Channel0Command(channelDescriptor * cd_p, void * buf, + unsigned short nbyte, unsigned char command); +void iapi_lowGetScript(channelDescriptor * cd_p, void * buf, unsigned short size, + unsigned long address); +void iapi_lowGetContext(channelDescriptor * cd_p, void * buf, + unsigned char channel); +void iapi_lowSetScript(channelDescriptor * cd_p, void * buf, unsigned short nbyte, + unsigned long destAddr); +void iapi_lowSetContext(channelDescriptor * cd_p, void * buf, + unsigned char channel); +int iapi_lowAssignScript(channelDescriptor * cd_p, script_data * data_p); + +int iapi_lowSetChannelEventMapping(unsigned char event, unsigned long channel_map); + +#endif /* _iapiLowMcu_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapiLow.h @@ -0,0 +1,78 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiLow.h + * + * $Id iapiLow.h $ + * + * Description: + * prototypes for low level function of I.API + * + * + * + * + * $Log iapiLow.h + * + * ***************************************************************************/ + +#ifndef _iapiLow_h +#define _iapiLow_h + +/* **************************************************************************** + * Boolean identifiers + *****************************************************************************/ +#define NO_OS 0 +#define LINUX 1 +#define SYMBIAN 2 +#define WINCE 3 + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "sdmaStruct.h" +#include "iapiDefaults.h" +#include "iapiOS.h" +#ifdef MCU +#include "iapiLowMcu.h" +#endif /*MCU*/ +#if OS == NO_OS +#include +#elif OS == LINUX +#include +#endif + + +/* **************************************************************************** + * Macro-command Section + *****************************************************************************/ + +#define GOTO_SLEEP(x) (iapi_GotoSleep)(x) +#define INIT_SLEEP(x) (iapi_InitSleep)(x) + +/* **************************************************************************** + * Public Function Prototype Section + *****************************************************************************/ +void iapi_lowStartChannel ( unsigned char channel ); +void iapi_lowStopChannel ( unsigned char channel ); +void iapi_AttachCallbackISR (channelDescriptor * cd_p, + void (* func_p)(channelDescriptor * cd_p, void * arg)); +void iapi_DetachCallbackISR (channelDescriptor * cd_p); +void iapi_ChangeCallbackISR (channelDescriptor * cd_p, + void (* func_p)(channelDescriptor * cd_p, void * arg)); +void iapi_lowSynchChannel ( unsigned char channel ); +void iapi_SetBufferDescriptor(bufferDescriptor *bd_p, unsigned char command, + unsigned char status, unsigned short count, + void * buffAddr, void * extBufferAddr); + +#endif /* _iapiLow_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/iapiOS.h @@ -0,0 +1,96 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiOS.h + * + * $Id iapiOS.h $ + * + * Description: + * prototypes for OS level function of I.API + * + * + * + * + * $Log iapiOS.h + * + * ***************************************************************************/ + +#ifndef _iapiOS_h +#define _iapiOS_h + +/* **************************************************************************** + * Boolean identifiers + *****************************************************************************/ +#define NO_OS 0 +#define LINUX 1 +#define SYMBIAN 2 +#define WINCE 3 + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "sdmaStruct.h" +#include "iapiDefaults.h" +#ifdef MCU +#include "iapiLowMcu.h" +#endif /*MCU*/ +#if OS == NO_OS +#include +#elif OS == LINUX +#include +#endif + +/* **************************************************************************** + * Macro-command Section + *****************************************************************************/ +#define SDMA_ERAM 0 +#define SDMA_IRAM 1 +#ifdef CONFIG_SDMA_IRAM +#define MALLOC(x, s) (s == SDMA_ERAM)? (* iapi_Malloc)(x):(* iapi_iram_Malloc)(x) +#else /*CONFIG_SDMA_IRAM */ +#define MALLOC(x, s) (* iapi_Malloc)(x) +#endif /*CONFIG_SDMA_IRAM */ +#define FREE(x) if (x!=NULL) (* iapi_Free)(x) + +#define GOTO_SLEEP(x) (iapi_GotoSleep)(x) +#define INIT_SLEEP(x) (iapi_InitSleep)(x) + +/* **************************************************************************** + * Public Function Prototype Section + *****************************************************************************/ + +#ifdef CONFIG_SDMA_IRAM +extern void*(* iapi_iram_Malloc) (size_t size); +#endif /*CONFIG_SDMA_IRAM*/ + +extern void*(* iapi_Malloc) (size_t size); +extern void (* iapi_Free) (void * ptr); + +extern void*(* iapi_Virt2Phys) (void * ptr); +extern void*(* iapi_Phys2Virt) (void * ptr); + +extern void (* iapi_WakeUp)(int); +extern void (* iapi_GotoSleep)(int); +extern void (* iapi_InitSleep)(int); + +extern void*(* iapi_memcpy)(void *dest, const void *src, size_t count); +extern void*(* iapi_memset)(void *dest, int c, size_t count); + +extern void (* iapi_EnableInterrupts)(void); +extern void (* iapi_DisableInterrupts)(void); + +extern int (* iapi_GetChannel)(int); +extern int (* iapi_ReleaseChannel)(int); + +#endif /* _iapiOS_h */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/include/sdmaStruct.h @@ -0,0 +1,426 @@ +/****************************************************************************** + * + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: sdmaStruct.h + * + * $Id sdmaStruct.h $ + * + * Description: provides necessary definitions and inclusion for ipcmStruct.c + * + * $Log $ + * + *****************************************************************************/ +#ifndef _sdmaStruct_h +#define _sdmaStruct_h + +/* **************************************************************************** + * Include File Section + ******************************************************************************/ + +/* **************************************************************************** + * Macro-command Section + ******************************************************************************/ + +/** + * Identifier NULL + */ +#ifndef NULL +#define NULL 0 +#endif + +/** + * Boolean identifiers + */ +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +/** + * Number of channels + */ +#define CH_NUM 32 +/** + * Number of events + */ +#ifdef MXC_SDMA_V2 +#define EVENTS_NUM 48 +#else +#define EVENTS_NUM 32 +#endif +/** + * Channel configuration + */ +#define DONT_OWN_CHANNEL 0 +#define OWN_CHANNEL 1 + +/** + * Ownership (value defined to computed decimal value) + */ +#define CH_OWNSHP_OFFSET_EVT 0 +#define CH_OWNSHP_OFFSET_MCU 1 +#define CH_OWNSHP_OFFSET_DSP 2 +/** + * Indexof the greg which holds address to start a script from when channel + * becomes current. + */ +#define SDMA_NUMBER_GREGS 8 + +/** + * Channel contexts management + */ + +#define CHANNEL_CONTEXT_BASE_ADDRESS 0x800 +/** + * Buffer descriptor status values. + */ +#define BD_DONE 0x01 +#define BD_WRAP 0x02 +#define BD_CONT 0x04 +#define BD_INTR 0x08 +#define BD_RROR 0x10 +#define BD_LAST 0x20 +#define BD_EXTD 0x80 + + +/** + * Data Node descriptor status values. + */ +#define DND_END_OF_FRAME 0x80 +#define DND_END_OF_XFER 0x40 +#define DND_DONE 0x20 +#define DND_UNUSED 0x01 + +/** + * IPCV2 descriptor status values. + */ +#define BD_IPCV2_END_OF_FRAME 0x40 + + +#define IPCV2_MAX_NODES 50 +/** + * Error bit set in the CCB status field by the SDMA, + * in setbd routine, in case of a transfer error + */ +#define DATA_ERROR 0x10000000 + +/** + * Buffer descriptor commands. + */ +#define C0_ADDR 0x01 +#define C0_LOAD 0x02 +#define C0_DUMP 0x03 +#define C0_SETCTX 0x07 +#define C0_GETCTX 0x03 +#define C0_SETDM 0x01 +#define C0_SETPM 0x04 +#define C0_GETDM 0x02 +#define C0_GETPM 0x08 +/** + * Transfer types, encoded in the BD command field + */ +#define TRANSFER_32BIT 0x00 +#define TRANSFER_8BIT 0x01 +#define TRANSFER_16BIT 0x02 +#define TRANSFER_24BIT 0x03 +/** + * Change endianness indicator in the BD command field + */ +#define CHANGE_ENDIANNESS 0x80 +/** + * Size in bytes + */ +#define SDMA_BD_SIZE 8 +#define SDMA_EXTENDED_BD_SIZE 12 +#define BD_NUMBER 4 +/** + * Channel interrupt policy + */ +#define DEFAULT_POLL 0 +#define CALLBACK_ISR 1 +/** + * Channel status + */ +#define UNINITIALIZED 0 +#define INITIALIZED 1 + +/** + * IoCtl particular values + */ +#define SET_BIT_ALL 0xFFFFFFFF +#define BD_NUM_OFFSET 16 +#define BD_NUM_MASK 0xFFFF0000 + +/** + * Maximum values for IoCtl calls, used in high or middle level calls + */ +#define MAX_BD_NUM 256 +#define MAX_BD_SIZE 65536 +#define MAX_BLOCKING 2 +#define MAX_SYNCH 2 +#define MAX_OWNERSHIP 8 +#define MAX_CH_PRIORITY 8 +#define MAX_TRUST 2 +#define MAX_WML 256 + + +/** + * Access to channelDescriptor fields + */ +enum { + IAPI_CHANNELNUMBER, + IAPI_BUFFERDESCNUMBER, + IAPI_BUFFERSIZE, + IAPI_BLOCKING, + IAPI_CALLBACKSYNCH, + IAPI_OWNERSHIP, + IAPI_PRIORITY, + IAPI_TRUST, + IAPI_UNUSED, + IAPI_CALLBACKISR_PTR, + IAPI_CCB_PTR, + IAPI_BDWRAP, + IAPI_WML +}; + +/** + * Default values for channel descriptor - nobody ownes the channel + */ +#define CD_DEFAULT_OWNERSHIP 7 + + +/** + * User Type Section + */ + +/** + * Command/Mode/Count of buffer descriptors + */ + +#if (ENDIANNESS==B_I_G_ENDIAN) +typedef struct iapi_modeCount_ipcv2 { + unsigned long status : 8; /**< L, E , D bits stored here */ + unsigned long reserved : 8; + unsigned long count : 16; /**< + +#include "epm.h" +#include "iapiLow.h" + +/* **************************************************************************** + * Function Section + *****************************************************************************/ +#ifdef MCU + +/* ***************************************************************************/ +/**Send a command on SDMA's channel zero. + * Check if buffer descriptor is already used by the sdma, if yes return + * an error as c0BDNum is wrong. + * + * Notes\n + * There is an upgrade in the script on the Context load command and + * the fact that the context structure has a fixed length of 20 or 24 + * depending on SDMA versions. + * + * @return + * - IAPI_SUCCESS + * - -iapi_errno if failure + */ +int +iapi_Channel0Command( channelDescriptor * cd_p, void * buf, + unsigned short nbyte, unsigned char command) +{ + channelControlBlock * ccb_p; + bufferDescriptor * bd_p; + int result = IAPI_SUCCESS; + unsigned char chNum; + + + /* + * Check data structures are properly initialized + */ + /* Channel descriptor validity */ + if (cd_p == NULL){ + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Channel control block validity */ + if (cd_p->ccb_ptr == NULL){ + result = IAPI_ERR_CCB_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Control block & Descriptpor associated with the channel being worked on */ + chNum = cd_p->channelNumber; + ccb_p = cd_p->ccb_ptr; + + /* Is channel already in use ? */ + if (ccb_p->baseBDptr != NULL ) { + result = IAPI_ERR_BD_ALLOCATED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + return -result; + } + + /* Allocation of buffer descriptors */ + bd_p = (bufferDescriptor *)MALLOC(sizeof( bufferDescriptor ), SDMA_ERAM); + if (bd_p != NULL) { + ccb_p->baseBDptr = (bufferDescriptor *)iapi_Virt2Phys(bd_p); + } else { + result = IAPI_ERR_BD_ALLOCATION | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + return -result; + } + + /* Buffer descriptor setting */ + iapi_SetBufferDescriptor( bd_p, command , BD_WRAP|BD_DONE|BD_INTR , nbyte, + buf,NULL); + + /* Actually the transfer */ + iapi_lowStartChannel( cd_p->channelNumber ); + iapi_lowSynchChannel( cd_p->channelNumber ); + + /* Cleaning of allocation */ + FREE( bd_p ); + ccb_p->baseBDptr = NULL; + + return IAPI_SUCCESS; + +} + +/* ***************************************************************************/ +/**Starts the channel (core specific register) + * + * Algorithm:\n + * - Bit numbered "channel" of HostEnStartReg register is set + * + * @param channel channel to start + * + * @return none + */ +void +iapi_lowStartChannel (unsigned char channel) +{ + SDMA_H_START |= 1 << channel; +} + +/* ***************************************************************************/ +/**Stops the channel (core specific register) + * + * Algorithm: + * - Bit numbered "channel" of HostEnStopReg register is cleared + * + * Notes:\n + * - This is a write one to clear register + * + * @param channel channel to stop + * + * @return none + */ +void +iapi_lowStopChannel (unsigned char channel) +{ + SDMA_H_STATSTOP &= 1 << channel; +} + +/* ***************************************************************************/ +/**Initialize the initial priority of registers and channel enable + * RAM from the MCU side. No channels are enabled, all priorities are set to 0. + * + * @return none + */ +void +iapi_InitChannelTables(void) +{ + + /* No channel is enabled*/ + iapi_memset((void *)&SDMA_CHNENBL_0, 0x00, sizeof(unsigned long)*EVENTS_NUM); + /* All channels have priority 0*/ + iapi_memset((void *)&SDMA_CHNPRI_0, 0x00, sizeof(unsigned long)*CH_NUM); +} + +/* ***************************************************************************/ +/** The host enable (HE), hosts override (HO), dsp enable (DE), dsp override + * (DO) registers are involved here. + * Host and Dsp enable registers are here to signify that the MCU or DSP side + * have prepared the appropriate buffers and are now ready. If the channel is + * owned by the MCU the override bit for that channel needs to be cleared : + * the host allows the channel to be used.\n + * + * Then the override bits can define (mcuOverride dspOverride):\n + * - 0 0 channel is public: transfer to/from MCU to DSP + * - 0 1 channel if owned by DSP + * - 1 0 channel if owned by MCU + * - 1 1 channel zero config + * + * See also :\n + * IAPI Table 1.1 "Channel configuration properties" + * + * @param channel channel to configure + * @param eventOverride event ownership + * @param mcuOverride ARM ownership + * @param dspOverride DSP ownership + * + * @return + * - -iapi_errno if the 3 override parameters are all set + * - IAPI_SUCCESS in other cases (valid cases) + */ +int +iapi_ChannelConfig (unsigned char channel, unsigned eventOverride, + unsigned mcuOverride, unsigned dspOverride) +{ + int result = IAPI_SUCCESS; + + if ( ( eventOverride == 1 ) && + ( mcuOverride == 1 ) && + ( dspOverride == 1 ) ){ + result = IAPI_ERR_CONFIG_OVERRIDE ; + iapi_errno = result; + return -result; + } else { + /* + * DSP side + */ + if ( dspOverride ){ + SDMA_H_DSPOVR &= ~( 1 << channel ); + } else { + SDMA_H_DSPOVR |= ( 1 << channel ); + } + /* + * Event + */ + if ( eventOverride ){ + SDMA_H_EVTOVR &= ~( 1 << channel ); + } else { + SDMA_H_EVTOVR |= ( 1 << channel ); + } + /* + * MCU side + */ + if ( mcuOverride ) { + SDMA_H_HOSTOVR &= ~( 1 << channel ); + } else { + SDMA_H_HOSTOVR |= ( 1 << channel ); + } + } + return IAPI_SUCCESS; +} +/* ***************************************************************************/ +/**Load the context data of a channel from SDMA + * + * Algorithm:\n + * - Setup BD with appropiate parameters + * - Start channel + * - Poll for answer + * + * @param *cd_p channel descriptor for channel 0 + * @param *buf pointer to receive context data + * @param channel channel for which the context data is requested + * + * @return none + */ +void +iapi_lowGetContext(channelDescriptor * cd_p, void * buf, unsigned char channel) +{ + bufferDescriptor * bd_p; + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + + /*Setup buffer descriptor with channel 0 command*/ + iapi_SetBufferDescriptor(&bd_p[0], + C0_GETDM, + (unsigned char)(BD_DONE | BD_INTR | BD_WRAP | BD_EXTD), + (unsigned short)sizeof(contextData)/4, + buf, + (void *)(CHANNEL_CONTEXT_BASE_ADDRESS + (sizeof(contextData)*channel/4))); + /* Receive, polling method*/ + iapi_lowStartChannel(cd_p->channelNumber); + iapi_lowSynchChannel(cd_p->channelNumber); +} +/* ***************************************************************************/ +/**Read "size" byte /2 at SDMA address (address) and write them in buf + * + * Algorithm:\n + * - Setup BD with appropiate parameters (C0_GETPM) + * - Start channel + * - Poll for answer + * + * Notes\n + * - Parameter "size" is in bytes, it represents the size of "buf", e.g. + * the size in bytes of the script to be loaded. + * - Parameter "address" denotes the RAM address for the script in SDMA + * + * @param *cd_p channel descriptor for channel 0 + * @param *buf pointer to receive the data + * @param size number of bytes to read + * @param address address in SDMA RAM to start reading from + * + * @return none + */ +void +iapi_lowGetScript(channelDescriptor * cd_p, void * buf, unsigned short size, + unsigned long address) +{ + bufferDescriptor * bd_p; + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + + /*Setup buffer descriptor with channel 0 command*/ + iapi_SetBufferDescriptor(&bd_p[0], + C0_GETPM, + (unsigned char)(BD_DONE | BD_INTR | BD_WRAP | BD_EXTD), + (unsigned short)size/2,/*count in shorts*/ + buf, + (void *)address); + /* Receive, polling method*/ + iapi_lowStartChannel(cd_p->channelNumber); + iapi_lowSynchChannel(cd_p->channelNumber); +} + +/* ***************************************************************************/ +/**Load a SDMA script to SDMA + * + * Algorithm:\n + * - Setup BD with appropiate parameters (C0_SETPM) + * - Start channel + * - Poll for answer + * + * Notes\b + * - Parameter "size" is in bytes, it represents the size of "buf", e.g. + * the size in bytes of the script to be uploaded. + * - Parameter "address" denotes the RAM address for the script in SDMA + * + * @param *cd_p channel descriptor for channel 0 + * @param *buf pointer to the script + * @param size size of the script, in bytes + * @param address address in SDMA RAM to place the script + * + * @return none + */ +void +iapi_lowSetScript(channelDescriptor * cd_p, void * buf, unsigned short size, + unsigned long address) +{ + bufferDescriptor * bd_p; + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + + /*Setup buffer descriptor with channel 0 command*/ + iapi_SetBufferDescriptor(&bd_p[0], + C0_SETPM, + (unsigned char)(BD_DONE | BD_INTR | BD_WRAP | BD_EXTD), + (unsigned short)size/2,/*count in shorts*/ + buf, + (void *)(address)); + /* Receive, polling method*/ + iapi_lowStartChannel(cd_p->channelNumber); + iapi_lowSynchChannel(cd_p->channelNumber); +} + + +/* ***************************************************************************/ +/**Load the context for a channel to SDMA + * + * Algorithm:\n + * - Send context and poll for answer. + * + * @param *cd_p channel descriptor for channel 0 + * @param *buf pointer to context data + * @param channel channel to place the context for + * + * @return none + */ +void +iapi_lowSetContext(channelDescriptor * cd_p, void * buf, unsigned char channel) +{ + + bufferDescriptor * local_bd_p; +#ifdef SDMA_SKYE + + unsigned char command =0; + + local_bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + + + command = channel <<3 ; + command = command | C0_SETCTX; + iapi_SetBufferDescriptor( &local_bd_p[0], + command, + (unsigned char)(BD_DONE | BD_INTR | BD_WRAP), + (unsigned short)(sizeof(contextData)/4), + buf, + NULL); +#else + + local_bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + + + + + iapi_SetBufferDescriptor( &local_bd_p[0], + C0_SETDM, + (unsigned char)(BD_DONE | BD_INTR | BD_WRAP|BD_EXTD), + (unsigned short)(sizeof(contextData)/4), + buf, + (void *)(2048+(sizeof(contextData)/4)*channel)); +#endif + /* Send */ + iapi_lowStartChannel( cd_p->channelNumber ); + iapi_lowSynchChannel( cd_p->channelNumber ); + +} + +/* ***************************************************************************/ +/**Associate specified channel with the script starting at the + * specified address. Channel 0 command is used to load the set-up context + * for the channel. The address used must be generated by the GUI tool + * used to create RAM images for SDMA. + * + * Algorithm:\n + * - Set-up and load the context. + * + * @param *cd_p pointer to the channel descriptor of the channel + * @param *data_p: pointer to the data identifying the script to be associated + * with the channel + * + * @return + * - IAPI_SUCCESS : OK + * - -iapi_errno : operation failed, return negated value of iapi_errno + */ + +int +iapi_lowAssignScript(channelDescriptor * cd_p, script_data * data_p) +{ + contextData * chContext; /* context to be loaded for the channel */ + channelDescriptor * cd0_p; /* pointer to channel descriptor of channel 0*/ + int result = IAPI_SUCCESS; + + /*Verify passed data*/ + if(cd_p == NULL || data_p == NULL) + { + result = IAPI_ERR_INVALID_PARAMETER; + iapi_errno = result; + return -result; + } + + /* Allocate context and initialize PC to required script start adress*/ + chContext = (contextData *) MALLOC(sizeof(contextData), SDMA_ERAM); + if (chContext == NULL) + { + result = IAPI_ERR_B_ALLOC_FAILED | cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + iapi_memset(chContext, 0x00, sizeof(contextData)); + chContext->channelState.pc = data_p->load_address; + + /* Send by context the event mask,base address for peripheral + * and watermark level + */ + chContext->gReg[0] = data_p->event_mask2; + chContext->gReg[1] = data_p->event_mask1; + chContext->gReg[6] = data_p->shp_addr; + chContext->gReg[7] = data_p->wml; + if (data_p->per_addr) + chContext->gReg[2] = data_p->per_addr; + + /* Set transmited data to the CD*/ + cd_p->watermarkLevel = data_p->wml; + cd_p->eventMask1 = data_p->event_mask1; + cd_p->eventMask2 = data_p->event_mask2; + + /* Get the cd0_p*/ + cd0_p = (cd_p->ccb_ptr - cd_p->channelNumber)->channelDescriptor; + + /*load the context*/ + iapi_lowSetContext(cd0_p, chContext, cd_p->channelNumber); + + /* release allocated memory*/ + FREE(chContext); + + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/** Set the channels to be triggered by an event. The for every channel that + *must be triggered by the event, the corresponding bit from channel_map + *parameter must be set to 1. (e.g. for the event to trigger channels 31 and + *0 one must pass 0x80000001) + * + * + * Algorithm:\n + * - Update the register from Channel Enable RAM with the channel_map + * + * @param event event for which to set the channel association + * @param channel_map channels to be triggered by event. Put the corresponding + * bit from this 32-bit value to 1 for every channel that should be + * triggered by the event. + * + * @return + * - IAPI_SUCCESS : OK + * - -iapi_errno : operation failed, return negated value of iapi_errno + */ +int +iapi_lowSetChannelEventMapping(unsigned char event, unsigned long channel_map) +{ + volatile unsigned long * channelEnableMatx; + int result = IAPI_SUCCESS; + + /* Check validity of event*/ + if (event < EVENTS_NUM) + { + channelEnableMatx = &SDMA_CHNENBL_0; + channelEnableMatx[event] |= channel_map; + return result; + } + else + { + result = IAPI_ERR_INVALID_PARAMETER | event; + iapi_errno = result; + return -result; + } +} + +#endif /* MCU */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiMiddle.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiMiddle.c @@ -0,0 +1,623 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiMiddle.c + * + * $Id iapiMiddle.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the MIDDLE level functions of the I.API. + * + * + * + * + * $Log iapiMiddle.c $ + * + *****************************************************************************/ + + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "epm.h" +#include + +#include "iapiLow.h" +#include "iapiMiddle.h" + +/* **************************************************************************** + * Global Variable Section + *****************************************************************************/ + + +/* **************************************************************************** + * Function Section + *****************************************************************************/ + +/* ***************************************************************************/ +/**Allocates one Buffer Descriptor structure using information present in the + * channel descriptor. + * + * @param *ccb_p channel control block used to get the channel descriptor + * + * @return + * - pointer on the new Buffer Descriptor + * - NULL if allocation failed + * + */ +bufferDescriptor * +iapi_AllocBD (channelControlBlock * ccb_p) + +{ + bufferDescriptor * ptrBD = NULL; + + if (ccb_p->channelDescriptor->bufferDescNumber != 0){ +#ifdef CONFIG_SDMA_IRAM + channelDescriptor * cd_p = ccb_p->channelDescriptor; + if(cd_p->channelNumber >= MXC_DMA_CHANNEL_IRAM) { + ptrBD = (bufferDescriptor *) + MALLOC( ccb_p->channelDescriptor->bufferDescNumber * + sizeof(bufferDescriptor), SDMA_IRAM); + } else +#endif /*CONFIG_SDMA_IRAM*/ + { + ptrBD = (bufferDescriptor *) + MALLOC( ccb_p->channelDescriptor->bufferDescNumber * + sizeof(bufferDescriptor), SDMA_ERAM); + } + } + if (ptrBD != NULL) { + ptrBD->mode.command = 0; + ptrBD->mode.status = 0; + ptrBD->mode.count = 0; + ptrBD->bufferAddr = NULL; + } + + return ptrBD; +} + +/* ***************************************************************************/ +/**Allocate one channel context data structure. + * + * @param **ctxd_p pointer to context data to be allocated + * @param channel channel number of context data structure + * + * @return + * - IAPI_SUCCESS + * - -iapi_errno if allocation failed + */ +int +iapi_AllocContext(contextData ** ctxd_p, unsigned char channel) +{ + contextData * ctxData; + int result = IAPI_SUCCESS; + + if (*ctxd_p != NULL){ + result = IAPI_ERR_CC_ALREADY_DEFINED | IAPI_ERR_CH_AVAILABLE | channel; + iapi_errno = result; + return -result; + } + + ctxData = (contextData *)MALLOC(sizeof(contextData), SDMA_ERAM); + + if (ctxData !=NULL) { + *ctxd_p = ctxData; + return IAPI_SUCCESS; + + } else { + *ctxd_p = NULL; + result = IAPI_ERR_CC_ALLOC_FAILED | IAPI_ERR_CH_AVAILABLE | channel; + iapi_errno = result; + return -result; + } +} + +/* ***************************************************************************/ +/**Allocates channel description and fill in with default values. + * + * Algorithm:\n + * - Check channel properties. + * - Then modifies the properties of the channel description with default + * + * @param **cd_p pointer to channel descriptor to be allocated + * @param channel channel number of channel descriptor + * + * @return + * - IAPI_SUCCESS + * - -iapi_errno if allocation failed + * + */ +int +iapi_AllocChannelDesc (channelDescriptor ** cd_p, unsigned char channel) +{ +#ifdef MCU + volatile unsigned long * chPriorities = &SDMA_CHNPRI_0; +#endif /* MCU */ + channelDescriptor * tmpCDptr; + int result = IAPI_SUCCESS; + + + if (*cd_p != NULL){ + result = IAPI_ERR_CD_ALREADY_DEFINED | IAPI_ERR_CH_AVAILABLE | channel; + iapi_errno = result; + return -result; + } + + tmpCDptr = (channelDescriptor *)MALLOC(sizeof(channelDescriptor), SDMA_ERAM); + + if (tmpCDptr != NULL){ + iapi_memcpy(tmpCDptr, &iapi_ChannelDefaults, sizeof (channelDescriptor)); + tmpCDptr->channelNumber = channel; +#ifdef MCU + if (chPriorities[channel] != 0) { + tmpCDptr->priority = chPriorities[channel]; + } else { + chPriorities[channel] = tmpCDptr->priority; + } +#endif + * cd_p = tmpCDptr ; + return IAPI_SUCCESS; + } else { + * cd_p = NULL; + result = IAPI_ERR_CD_ALLOC_FAILED | IAPI_ERR_CH_AVAILABLE | channel; + iapi_errno = result; + return -result; + } +} + +/* ***************************************************************************/ +/**Changes channel description information after performing sanity checks. + * + * Algorithm:\n + * - Check channel properties. + * - Then modifies the properties of the channel description. + * + * @param *cd_p channel descriptor of the channel to change + * @param whatToChange control code indicating the desired change + * @param newval new value + * + * @return + * - IAPI_SUCCESS + * - IAPI_FAILURE if change failed + * + */ +int +iapi_ChangeChannelDesc (channelDescriptor * cd_p, unsigned char whatToChange, + unsigned long newval) +{ + bufferDescriptor * tmpBDptr; + unsigned char index = 0; + int result = IAPI_SUCCESS; + + /* verify parameter validity */ + if (cd_p == NULL) { + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* verify channel descriptor initialization */ + if (cd_p->ccb_ptr == NULL){ + result = IAPI_ERR_CCB_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + /* verify channel is not in use */ + tmpBDptr = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for (index=cd_p->bufferDescNumber ; index>0 ; index--){ + if (tmpBDptr->mode.status & BD_DONE){ + result = IAPI_ERR_CH_IN_USE | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + tmpBDptr++; + } + + /* Select the change accorded to the selector given in parameter */ + switch (whatToChange){ + + /* + * Channel Number + */ + case IAPI_CHANNELNUMBER: + /* Channel number can not be changed (description remains attached) */ + result = IAPI_ERR_CD_CHANGE_CH_NUMBER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + + /* + * Buffer Descriptor Number + */ + case IAPI_BUFFERDESCNUMBER: + if (newval < MAX_BD_NUM){ + if (newval != cd_p->bufferDescNumber){ + /* Free memory used for previous old data */ + if (cd_p->ccb_ptr->baseBDptr != NULL){ + tmpBDptr = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for (index=0 ; index < cd_p->bufferDescNumber ; index++){ + if (tmpBDptr->bufferAddr != NULL){ + if (cd_p->trust == FALSE) { + FREE(iapi_Phys2Virt(tmpBDptr->bufferAddr)); + } + } + tmpBDptr ++ ; + } + FREE((bufferDescriptor *)iapi_Phys2Virt((cd_p->ccb_ptr)->baseBDptr)); + } + (cd_p->ccb_ptr)->baseBDptr = NULL; + (cd_p->ccb_ptr)->currentBDptr = NULL; + /* Allocate and initialize structures */ + cd_p->bufferDescNumber = (unsigned char)newval; + cd_p->ccb_ptr->status.openedInit = FALSE; + if (IAPI_SUCCESS !=iapi_InitializeMemory (cd_p->ccb_ptr)) + { + result = IAPI_ERR_BD_ALLOCATION | cd_p->channelNumber; + iapi_errno = result; + return -result; + } + cd_p->ccb_ptr->status.openedInit = TRUE; + } + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + /* + * Buffer size + */ + case IAPI_BUFFERSIZE: + if (newval < MAX_BD_SIZE) + { + if (newval != cd_p->bufferSize) + { + /* Free memory used for previous old data */ + if (cd_p->ccb_ptr->baseBDptr != NULL) + { + tmpBDptr = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for (index=0 ; index < cd_p->bufferDescNumber ; index++) + { + if (cd_p->trust == FALSE) + { + FREE(iapi_Phys2Virt(tmpBDptr->bufferAddr)); + } + tmpBDptr ++ ; + } + FREE((bufferDescriptor *)iapi_Phys2Virt((cd_p->ccb_ptr)->baseBDptr)); + } + (cd_p->ccb_ptr)->baseBDptr = NULL; + (cd_p->ccb_ptr)->currentBDptr = NULL; + /* Allocate and initialize structures */ + cd_p->bufferSize = (unsigned short)newval; + cd_p->ccb_ptr->status.openedInit = FALSE; + if (IAPI_SUCCESS !=iapi_InitializeMemory (cd_p->ccb_ptr)) + { + result = IAPI_ERR_BD_ALLOCATION | cd_p->channelNumber; + iapi_errno = result; + return -result; + } + cd_p->ccb_ptr->status.openedInit = TRUE; + } + break; + } + else + { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + + /* + * Blocking / non blocking feature + */ + case IAPI_BLOCKING: + if (newval < MAX_BLOCKING){ + cd_p->blocking = newval; + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + /* + * Synchronization method + */ + case IAPI_CALLBACKSYNCH: + if (newval < MAX_SYNCH){ + cd_p->callbackSynch = newval; + iapi_ChangeCallbackISR( cd_p, cd_p->callbackISR_ptr); + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + + /* + * Ownership of the channel + */ + case IAPI_OWNERSHIP: +#ifdef DSP + result = IAPI_ERR_NOT_ALLOWED | cd_p->channelNumber; + iapi_errno = result; + return -result; +#endif /* DSP */ +#ifdef MCU + if (newval < MAX_OWNERSHIP){ + cd_p->ownership = newval; + iapi_ChannelConfig( cd_p->channelNumber, + ( newval >> CH_OWNSHP_OFFSET_EVT ) & 1, + ( newval >> CH_OWNSHP_OFFSET_MCU ) & 1, + ( newval >> CH_OWNSHP_OFFSET_DSP ) & 1); + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + +#endif /* MCU */ + + /* + * Priority + */ + case IAPI_PRIORITY: +#ifdef DSP + result = IAPI_ERR_NOT_ALLOWED | cd_p->channelNumber; + iapi_errno = result; + return -result; +#endif /* DSP */ + +#ifdef MCU + if (newval < MAX_CH_PRIORITY){ + volatile unsigned long * ChannelPriorities = &SDMA_CHNPRI_0; + ChannelPriorities[ cd_p->channelNumber ] = newval; + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } +#endif /* MCU */ + + + /* + * "Trust" property + */ + case IAPI_TRUST: + if (newval < MAX_TRUST){ + if (cd_p->trust != newval){ + cd_p->trust = newval; + if (newval == FALSE) { + if (IAPI_SUCCESS !=iapi_InitializeMemory (cd_p->ccb_ptr)) + { + result = IAPI_ERR_BD_ALLOCATION | cd_p->channelNumber; + iapi_errno = result; + return -result; + } + } + } + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + /* + * Callback function pointer + */ + case IAPI_CALLBACKISR_PTR: + if ( (void *)newval != NULL){ + { + union { + void * voidstar; + void (* funcptr)(channelDescriptor * cd_p, void * arg); + } value; + value.voidstar = (void*) newval; + cd_p->callbackISR_ptr = value.funcptr; + } + iapi_ChangeCallbackISR( cd_p, cd_p->callbackISR_ptr); + break; + } else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + + /* + * Channel Control Block pointer + */ + case IAPI_CCB_PTR: + cd_p->ccb_ptr = (channelControlBlock *)newval; + cd_p->ccb_ptr->channelDescriptor = cd_p; + break; + + /* + * WRAP/UNWRAP + */ + case IAPI_BDWRAP: + /* point to first BD */ + tmpBDptr = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + /* to point to last BD */ + tmpBDptr += cd_p->bufferDescNumber - 1; + if (newval == TRUE){ + /* wrap last BD */ + tmpBDptr->mode.status |= BD_WRAP; + break; + } + else if (newval == FALSE){ + /* unwrap last BD */ + tmpBDptr->mode.status &= ~BD_WRAP; + break; + } + else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + + /* + * Watermark level + */ + case IAPI_WML: +#ifdef DSP + result = IAPI_ERR_NOT_ALLOWED | cd_p->channelNumber; + iapi_errno = result; + return -result; +#endif /* DSP */ +#ifdef MCU + if (newval < MAX_WML){ + if (cd_p->watermarkLevel != newval){ + cd_p->watermarkLevel = newval; + } + break; + } + else { + result = IAPI_ERR_INVALID_PARAMETER | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } +#endif /* MCU */ + + /* + * Detect errors + */ + default: + result = IAPI_ERR_CD_CHANGE_UNKNOWN | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_errno = result; + return -result; + } + + return IAPI_SUCCESS; +} + + +/* ***************************************************************************/ +/**Initialize a table of function pointers that contain the interrupt Service + * Routine callback pointers for the SDMA channels with a default value + * + * Algorithm:\n + * - Loop on each element of the global IAPI variable callbackIsrTable + * + * @param *func_p default callback functon for all SDMA channels + * + * @return none + */ +void +iapi_InitializeCallbackISR(void(* func_p)(channelDescriptor * cd_p, void * arg)) +{ + unsigned long chCnt; + + for (chCnt = 0 ; chCnt < CH_NUM ; chCnt++){ + callbackIsrTable[chCnt] = func_p; + } +} + +/* ***************************************************************************/ +/**For the specified channel control block, attach the array of buffer + * descriptors, the channel description structure and initialize channel's + * status using information in the channel descriptor. + * + * @param *ccb_p pointer to channel control block + * + * @return none + * + */ +int +iapi_InitializeMemory (channelControlBlock * ccb_p) +{ + bufferDescriptor * bd_p; + unsigned char index; + int result = IAPI_SUCCESS; + + /* Attach the array of Buffer descriptors */ + bd_p = iapi_AllocBD( ccb_p ); + if (bd_p != NULL) + { + ccb_p->baseBDptr = (bufferDescriptor *)iapi_Virt2Phys(bd_p); + ccb_p->currentBDptr = ccb_p->baseBDptr; + for(index=0 ;index < ccb_p->channelDescriptor->bufferDescNumber-1 ; index++) + { + if (ccb_p->channelDescriptor->trust == TRUE) + { + iapi_SetBufferDescriptor(bd_p, + (unsigned char)ccb_p->channelDescriptor->dataSize, + BD_CONT|BD_EXTD, ccb_p->channelDescriptor->bufferSize, + NULL, NULL); + } + else + { + if (ccb_p->channelDescriptor->bufferSize != 0) + { + iapi_SetBufferDescriptor(bd_p, + (unsigned char)ccb_p->channelDescriptor->dataSize, + BD_CONT|BD_EXTD, ccb_p->channelDescriptor->bufferSize, + MALLOC(ccb_p->channelDescriptor->bufferSize, SDMA_ERAM), NULL); + } + } + bd_p++; + } + + if (ccb_p->channelDescriptor->trust == TRUE) + { + iapi_SetBufferDescriptor(bd_p, + (unsigned char)ccb_p->channelDescriptor->dataSize, + BD_EXTD|BD_WRAP|BD_INTR, ccb_p->channelDescriptor->bufferSize, + NULL, NULL); + } + else + { + if (ccb_p->channelDescriptor->bufferSize != 0) + { + iapi_SetBufferDescriptor(bd_p, + (unsigned char)ccb_p->channelDescriptor->dataSize, + BD_EXTD|BD_WRAP|BD_INTR, + ccb_p->channelDescriptor->bufferSize, + MALLOC(ccb_p->channelDescriptor->bufferSize, SDMA_ERAM), NULL); + } + } + } + else + { + result = IAPI_ERR_BD_ALLOCATION; + return -result; + } + return result; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiDefaults.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiDefaults.c @@ -0,0 +1,110 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiDefaults.c + * + * $Id iapiDefaults.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * + * Usage: + * + * Files: + * + * +* / + * + * $Log iapiDefaults.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + ******************************************************************************/ +#include "iapiDefaults.h" + +/* **************************************************************************** + * Global Variable Section + ******************************************************************************/ + +/** + * @brief System Call-back ISRs Table + */ +void (* callbackIsrTable[CH_NUM])(channelDescriptor* cd_p, void* arg); + +/** + * @brief User registered pointers table + */ +void * userArgTable[CH_NUM]; + +/** + * @brief Pointer to the first CCB in the CCB array + */ +channelControlBlock * iapi_CCBHead = NULL; + + +/**Default channel description. + * + * Initialization values are:\n + * - channelNumber = 0 + * - bufferDescNumber = 1 + * - bufferSize = 8 + * - blocking = 0 + * - callbackSynch = DEFAULT_POLL + * - ownership = CD_DEFAULT_OWNERSHIP + * - priority = 1 + * - trust = TRUE + * - useDataSize = 0 + * - dataSize = 0 + * - forceClose = 0 + * - scriptId = 0 + * - watermarkLevel = 0 + * - eventMask1 = 0 + * - eventMask2 = 0 + * - peripheralAddr = NULL + * - callbackISR_ptr = NULL + * - iapi_channelControlBlock = NULL + */ +channelDescriptor iapi_ChannelDefaults = {0, 1, 8, 0, DEFAULT_POLL, + CD_DEFAULT_OWNERSHIP, 1, TRUE, 0, 0, 0, 0, + 0, 0x00, 0x00, 0x00, NULL, NULL}; + +/** + * Integrated error management + */ +unsigned int iapi_errno = 0; +volatile unsigned long iapi_SDMAIntr = 0; + +/* Default config register. + * Initialization values are: + * dspdma used + * Real-Time Debug pins disabled + * AHB freq / core freq = 2 + * dynamic context switch +*/ +configs_data iapi_ConfigDefaults = {1, 0, 0, 3}; + +#ifdef SDMA_SKYE +/* Default sdma State : UNDEF + *possible value are UNDEF, OPEN, LOCK, CLOSED, CLOSE_LOCK + */ + +sdmaState iapi_SdmaState= UNDEF; +#endif + +/* ***************************************************************************/ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiHigh.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiHigh.c @@ -0,0 +1,2798 @@ +/****************************************************************************** + * + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiHigh.c + * + * $Id iapiHigh.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the HIGH level functions of the I.API. + * + * + * / + * + * $Log iapiHigh.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include +#include + +#include "epm.h" +#include "iapi.h" + +/* **************************************************************************** + * External Reference Section (for compatibility with already developed code) + *****************************************************************************/ +static void iapi_read_ipcv2_callback(struct iapi_channelDescriptor* cd_p, void* data); + +/* **************************************************************************** + * Global Variable Section + *****************************************************************************/ +#define MAX_CHANNEL 32 + +static dataNodeDescriptor* dnd_read_control_struct[MAX_CHANNEL]; + +/* MASK to get Nullify all the bits of Status in Data Node descriptor apart from L, E and D*/ + +#define GET_LED_MASK 0xE0 + +/*Table defines mapping of Data Node Descriptor to Buffer Descriptor status*/ + +static unsigned char dnd_2_bd_status[]= +{ +0x85, /*00 L = 0, E = 0, D = 0*/ +0x00, /*01*/ +0x00, /*02*/ +0x00, /*03*/ +0x00, /*04*/ +0x00, /*05*/ +0x00, /*06*/ +0x00, /*07*/ +0x00, /*08*/ +0x00, /*09*/ +0x00, /*0A*/ +0x00, /*0B*/ +0x00, /*0C*/ +0x00, /*0D*/ +0x00, /*0E*/ +0x00, /*0F*/ +0x00, /*10*/ +0x00,/*11*/ +0x00,/*12*/ +0x00,/*13*/ +0x00,/*14*/ +0x00,/*15*/ +0x00,/*16*/ +0x00,/*17*/ +0x00,/*18*/ +0x00,/*19*/ +0x00,/*1A*/ +0x00,/*1B*/ +0x00,/*1C*/ +0x00,/*1D*/ +0x00,/*1E*/ +0x00,/*1F*/ +0x84,/*20 L = 0, E = 0, D = 1 */ +0x00,/*21*/ +0x00,/*22*/ +0x00,/*23*/ +0x00,/*24*/ +0x00,/*25*/ +0x00,/*26*/ +0x00,/*27*/ +0x00,/*28*/ +0x00,/*29*/ +0x00,/*2A*/ +0x00,/*2B*/ +0x00,/*2C*/ +0x00,/*2D*/ +0x00,/*2E*/ +0x00,/*2F*/ +0x00,/*30*/ +0x00,/*31*/ +0x00,/*32*/ +0x00,/*33*/ +0x00,/*34*/ +0x00,/*35*/ +0x00,/*36*/ +0x00,/*37*/ +0x00,/*38*/ +0x00,/*39*/ +0x00,/*3A*/ +0x00,/*3B*/ +0x00,/*3C*/ +0x00,/*3D*/ +0x00,/*3E*/ +0x00,/*3F*/ +0xAB,/*40 L = 0, E = 1, D = 0*/ +0x00,/*41*/ +0x00,/*42*/ +0x00,/*43*/ +0x00,/*44*/ +0x00,/*45*/ +0x00,/*46*/ +0x00,/*47*/ +0x00,/*48*/ +0x00,/*49*/ +0x00,/*4A*/ +0x00,/*4B*/ +0x00,/*4C*/ +0x00,/*4D*/ +0x00,/*4E*/ +0x00,/*4F*/ +0x00,/*50*/ +0x00,/*51*/ +0x00,/*52*/ +0x00,/*53*/ +0x00,/*54*/ +0x00,/*55*/ +0x00,/*56*/ +0x00,/*57*/ +0x00,/*58*/ +0x00,/*59*/ +0x00,/*5A*/ +0x00,/*5B*/ +0x00,/*5C*/ +0x00,/*5D*/ +0x00,/*5E*/ +0x00,/*5F*/ +0xAA,/*60 L = 0, E = 1, D = 1*/ +0x00,/*61*/ +0x00,/*62*/ +0x00,/*63*/ +0x00,/*64*/ +0x00,/*65*/ +0x00,/*66*/ +0x00,/*67*/ +0x00,/*68*/ +0x00,/*69*/ +0x00,/*6A*/ +0x00,/*6B*/ +0x00,/*6C*/ +0x00,/*6D*/ +0x00,/*6E*/ +0x00,/*6F*/ +0x00,/*70*/ +0x00,/*71*/ +0x00,/*72*/ +0x00,/*73*/ +0x00,/*74*/ +0x00,/*75*/ +0x00,/*76*/ +0x00,/*77*/ +0x00,/*78*/ +0x00,/*79*/ +0x00,/*7A*/ +0x00,/*7B*/ +0x00,/*7C*/ +0x00,/*7D*/ +0x00,/*7E*/ +0x00,/*7F*/ +0xC5,/*80 L = 1, E = 0, D = 0*/ +0x00,/*81*/ +0x00,/*82*/ +0x00,/*83*/ +0x00,/*84*/ +0x00,/*85*/ +0x00,/*86*/ +0x00,/*87*/ +0x00,/*88*/ +0x00,/*89*/ +0x00,/*8A*/ +0x00,/*8B*/ +0x00,/*8C*/ +0x00,/*8D*/ +0x00,/*8E*/ +0x00,/*8F*/ +0x00,/*90*/ +0x00,/*91*/ +0x00,/*92*/ +0x00,/*93*/ +0x00,/*94*/ +0x00,/*95*/ +0x00,/*96*/ +0x00,/*97*/ +0x00,/*98*/ +0x00,/*99*/ +0x00,/*9A*/ +0x00,/*9B*/ +0x00,/*9C*/ +0x00,/*9D*/ +0x00,/*9E*/ +0x00,/*9F*/ +0xC4,/*A0 L = 1, E = 0, D = 1*/ +0x00,/*A1*/ +0x00,/*A2*/ +0x00,/*A3*/ +0x00,/*A4*/ +0x00,/*A5*/ +0x00,/*A6*/ +0x00,/*A7*/ +0x00,/*A8*/ +0x00,/*A9*/ +0x00,/*AA*/ +0x00,/*AB*/ +0x00,/*AC*/ +0x00,/*AD*/ +0x00,/*AE*/ +0x00,/*AF*/ +0x00,/*B0*/ +0x00,/*B1*/ +0x00,/*B2*/ +0x00,/*B3*/ +0x00,/*B4*/ +0x00,/*B5*/ +0x00,/*B6*/ +0x00,/*B7*/ +0x00,/*B8*/ +0x00,/*B9*/ +0x00,/*BA*/ +0x00,/*BB*/ +0x00,/*BC*/ +0x00,/*BD*/ +0x00,/*BE*/ +0x00,/*BF*/ +0xEB,/*C0 L = 1, E = 1, D = 0*/ +0x00,/*C1*/ +0x00,/*C2*/ +0x00,/*C3*/ +0x00,/*C4*/ +0x00,/*C5*/ +0x00,/*C6*/ +0x00,/*C7*/ +0x00,/*C8*/ +0x00,/*C9*/ +0x00,/*CA*/ +0x00,/*CB*/ +0x00,/*CC*/ +0x00,/*CD*/ +0x00,/*CE*/ +0x00,/*CF*/ +0x00,/*D0*/ +0x00,/*D1*/ +0x00,/*D2*/ +0x00,/*D3*/ +0x00,/*D4*/ +0x00,/*D5*/ +0x00,/*D6*/ +0x00,/*D7*/ +0x00,/*D8*/ +0x00,/*D9*/ +0x00,/*DA*/ +0x00,/*DB*/ +0x00,/*DC*/ +0x00,/*DD*/ +0x00,/*DE*/ +0x00,/*DF*/ +0xEA,/*E0 L = 1, E = 1, D = 1*/ +0x00,/*E1*/ +0x00,/*E2*/ +0x00,/*E3*/ +0x00,/*E4*/ +0x00,/*E5*/ +0x00,/*E6*/ +0x00,/*E7*/ +0x00,/*E8*/ +0x00,/*E9*/ +0x00,/*EA*/ +0x00,/*EB*/ +0x00,/*EC*/ +0x00,/*ED*/ +0x00,/*EE*/ +0x00,/*EF*/ +0x00,/*F0*/ +0x00,/*F1*/ +0x00,/*F2*/ +0x00,/*F3*/ +0x00,/*F4*/ +0x00,/*F5*/ +0x00,/*F6*/ +0x00,/*F7*/ +0x00,/*F8*/ +0x00,/*F9*/ +0x00,/*FA*/ +0x00,/*FB*/ +0x00,/*FC*/ +0x00,/*FD*/ +0x00,/*FE*/ +0x00/*FF*/ +}; +/* **************************************************************************** + * Function Section + *****************************************************************************/ + +/* ***************************************************************************/ +/**Opens an SDMA channel to be used by the library. + * + * Algorithm:\n + * + * - Check if initialization is necessary. + * - Check that user initialized OS dependant functions. + * - Test validity of input parameters + * - Check whole channel control block data structure + * - Finish initializations (tables with default values) + * - Initialize channel 0 is dedicated to communications with SDMA + * - Check channel control block definition + * - if the channel descriptor is not initialized, initialize it with + * the default value + * - If buffer descriptor already allocated, exit with iapi_errno filled + * complete the lowest bits with the number of 'D' bits set + * - Buffer Descriptors allocation + * - Channel's configuration properties (mcu side only) + * - read/write direction => enable/disable channel setting + * + * @param *cd_p -If channelNumber is 0, it is pointer to channel descriptor for the channnel 0 to be opened and + has default values. + * For other channels,this function should be called after channel 0 has been opened, and it is channel descriptor for + channel 0.Must be allocated. + * @param channelNumber channel to be opened + * + * @return + * - IAPI_SUCCESS : OK + * - -iapi_errno : close failed, return negated value of iapi_errno + */ +int +iapi_Open (channelDescriptor * cd_p, unsigned char channelNumber) +{ + channelControlBlock * ccb_p; + channelControlBlock * local_ccb_p; + channelDescriptor * local_cd_p; + bufferDescriptor * bd_p; + unsigned char index = 0; + int result = IAPI_SUCCESS; +#ifdef MCU + volatile unsigned long * channelPriorityMatx; +#endif /* MCU */ + + + /* + * 1. Check if initialization is necessary + */ + if (cd_p == NULL){ + result = IAPI_ERR_CD_UNINITIALIZED | + IAPI_ERR_CH_AVAILABLE | channelNumber; + iapi_errno = result; + return -result; + } + + /* Verify these functions every time*/ + if((iapi_GetChannel == NULL)||(iapi_ReleaseChannel == NULL)) + { + result = IAPI_ERR_NO_OS_FN | channelNumber; + iapi_errno = result; + return -result; + } + + /* Try to aquire channel*/ + if(iapi_GetChannel(channelNumber) != 0) + { + result = IAPI_ERR_CH_IN_USE | channelNumber; + iapi_errno = result; + return -result; + } + + if (channelNumber == 0 && cd_p->ccb_ptr == NULL){ + /* Verify that the user initialized all OS dependant functions required + * by the library. + */ + if((iapi_Malloc == NULL)||(iapi_Free == NULL)||(iapi_Virt2Phys == NULL)|| + (iapi_Phys2Virt == NULL)||(iapi_GotoSleep == NULL)|| + (iapi_WakeUp == NULL)||(iapi_InitSleep == NULL)||(iapi_memset == NULL)|| + (iapi_memcpy == NULL)) + { + result = IAPI_ERR_NO_OS_FN | channelNumber; + iapi_errno = result; + iapi_ReleaseChannel(channelNumber); + return -result; + } + /* Whole channel control block data structure */ + ccb_p = (channelControlBlock *) + MALLOC(CH_NUM*sizeof(channelControlBlock), SDMA_IRAM); + if (ccb_p == NULL){ + result = IAPI_ERR_CCB_ALLOC_FAILED | + IAPI_ERR_CH_AVAILABLE | channelNumber; + iapi_errno = result; + iapi_ReleaseChannel(channelNumber); + return -result; + } + /* Zero-out the CCB structures array just allocated*/ + iapi_memset(ccb_p, 0x00, CH_NUM*sizeof(channelControlBlock)); + /* Save the address of the CCB structures array*/ + iapi_CCBHead = ccb_p; + + cd_p->ccb_ptr = (struct iapi_channelControlBlock *)ccb_p; + ccb_p->channelDescriptor = cd_p; +#ifdef MCU + /* finish initializations */ + iapi_InitChannelTables(); +#endif /* MCU */ + /* Channel 0 is dedicated to communications with SDMA */ + cd_p->ownership = ((DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_EVT ) | + ( OWN_CHANNEL << CH_OWNSHP_OFFSET_MCU ) | + (DONT_OWN_CHANNEL << CH_OWNSHP_OFFSET_DSP )); + cd_p->bufferDescNumber = 1; + } + + /* + * 2. Check channel control block + */ + ccb_p = cd_p->ccb_ptr; + if (ccb_p == NULL){ + result = IAPI_ERR_NO_CCB_DEFINED | IAPI_ERR_CH_AVAILABLE|channelNumber; + iapi_errno = result; + iapi_ReleaseChannel(channelNumber); + return -result; + } + + /* Control block & Descriptor associated with the channel being worked on */ + local_ccb_p = &ccb_p[channelNumber]; + local_cd_p = ccb_p[channelNumber].channelDescriptor; + + /* If the channel is not initialized, initialize it with the default value */ + if (local_cd_p == NULL){ + result = iapi_AllocChannelDesc (&local_cd_p, channelNumber); + if ( result!= IAPI_SUCCESS) + { + iapi_ReleaseChannel(channelNumber); + return result; //is allready negated from iapi_AllocChannelDesc + } + + local_cd_p->ccb_ptr = (struct iapi_channelControlBlock *)local_ccb_p; + local_ccb_p->channelDescriptor = local_cd_p; + } + + /* + * 3. If buffer descriptor already allocated, exit with iapi_errno filled + */ + if ( local_ccb_p->baseBDptr != NULL ){ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(local_ccb_p->baseBDptr); + result = IAPI_ERR_BD_ALLOCATED; + for (index=1 ; index< local_cd_p->bufferDescNumber ; index++){ + if ((bd_p->mode.status & BD_DONE) == BD_DONE){ + /* complete the lowest bits with the number of 'D' bits set */ + result++; + } + bd_p++; + } + iapi_errno = result; + iapi_ReleaseChannel(channelNumber); + return -result; + } + + /* + * 4. Buffer Descriptors allocation + */ + iapi_InitializeMemory(local_ccb_p); + +#ifdef MCU + /* + * 5. Channel's configuration properties (mcu side only) + */ + iapi_ChannelConfig( channelNumber, + ( local_cd_p->ownership >> CH_OWNSHP_OFFSET_EVT ) & 1UL, + ( local_cd_p->ownership >> CH_OWNSHP_OFFSET_MCU ) & 1UL, + ( local_cd_p->ownership >> CH_OWNSHP_OFFSET_DSP ) & 1UL); +#endif /* MCU */ + + /* Setting interrupt handling */ + iapi_ChangeCallbackISR(local_cd_p, local_cd_p->callbackISR_ptr); + + /* Call initialization fn for polling synch on this channel*/ + INIT_SLEEP(channelNumber); + + /* No user arg pointer yet*/ + userArgTable[cd_p->channelNumber]= NULL; + + /* + * 6. read/write direction => enable/disable channel + */ +#ifdef MCU + channelPriorityMatx = &SDMA_CHNPRI_0; + channelPriorityMatx[channelNumber] = 1; +#endif /* MCU */ + + local_ccb_p->status.openedInit = TRUE; + iapi_ReleaseChannel(channelNumber); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/** Attempts to read nbyte from the data buffer descriptor associated with the + * channel channelNumber, into the user's data buffer pointed to by buf. + * + * Algorithm:\n + * - Check data structures are properly initialized: + * - Channel descriptor validity + * - Control block & Descriptor associated with the channel being worked on + * - Check initialization has been done for trusted channels + * - If transfer data size is used, check validity of combination transfer + * size/requested bytes + * - Set the 'D' done bits on all buffer descriptors + * - Starting of the channel + * - Synchronization mechanism handling: + * - for callback: just exit function + * - for polling: call the synchronization function then read data from + * buffer until either nbyte parameter is reached or all buffer descriptors + * have been processed. + * + * Notes:\n + * 1) Virtual DMA SDMA channels are unidirectional, an iapi_Read authorized + * on a channel means that we are expecting to receive from the SDMA. The + * meaning of an interrupt received from the SDMA is therefore that the + * data has been copied from the SDMA to the host's data buffers and is + * already passed on upper layers of the application.\n + * + * @param *cd_p chanenl descriptor for the channel to read from + * @param *buf buffer to receive the data + * @param nbyte number of bytes to read from channel + * + * @return + * - number of bytes read + * - -iapi_errno : in case of failure return negated value of iapi_errno + */ +int +iapi_Read (channelDescriptor * cd_p, void * buf, unsigned short nbyte) +{ + int index = 0; + int readBytes; + int toRead; + int result = IAPI_SUCCESS; + unsigned int copyFinished; + int bufsize; + bufferDescriptor * bd_p; + channelControlBlock * ccb_p; + unsigned char * local_buf; + unsigned char chNum; + unsigned char div; + + iapi_errno = IAPI_ERR_NO_ERROR; + + /* + * 1. Check data structures are properly initialized + */ + /* Channel descriptor validity */ + if (cd_p == NULL){ + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Channel control block validity */ + if (cd_p->ccb_ptr == NULL){ + result = IAPI_ERR_CCB_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Control block & Descriptor associated with the channel being worked on */ + chNum = cd_p->channelNumber; + ccb_p = cd_p->ccb_ptr; + + /* Try to aquire channel*/ + if(iapi_GetChannel(chNum) != 0) + { + result = IAPI_ERR_CH_IN_USE | chNum; + iapi_errno = result; + return -result; + } + + /* Check if channel is already opened/initialized */ + if (ccb_p->status.openedInit == FALSE) { + result = IAPI_ERR_CHANNEL_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + + /* Buffer descriptor validity */ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + if (bd_p == NULL ){ + result = IAPI_ERR_BD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + + + /* Check initialization has been done for trusted channels */ + if (cd_p->trust == TRUE) { + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + for(index=0 ; index < cd_p->bufferDescNumber ; index++){ + if ((bd_p->bufferAddr == NULL) || (bd_p->mode.count == 0)){ + result = IAPI_ERR_BD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + } + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + /*If transfer data size is used, check that the required read length is + * divisible by transfer data size expressed in bytes + */ + if(cd_p->useDataSize) + { + /*Check for divisibility only if data size different then 8bit*/ + if(cd_p->dataSize != TRANSFER_8BIT) + { + switch(cd_p->dataSize) + { + case TRANSFER_32BIT: + div = 4; + break; + case TRANSFER_16BIT: + div = 2; + break; + case TRANSFER_24BIT: + div = 3; + break; + /*we should not get to default*/ + default: + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + /*check the total number of bytes requested*/ + if((nbyte % div) != 0) + { + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + /*now check the length of every BD*/ + for(index=0 ; index < cd_p->bufferDescNumber ; index++) + { + if((bd_p->mode.count % div) != 0) + { + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + } + } + + /* + * 2. Set the 'D' done bits on all buffer descriptors + */ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + for (index=0 ; index < cd_p->bufferDescNumber ; index++) { + bd_p->mode.status |= BD_DONE; + bd_p++; + } + + /* + * 3. Starting of the channel + */ + iapi_lowStartChannel (chNum); + ccb_p->status.execute = TRUE; + readBytes = 0; + + /* + * 4. Synchronization mechanism handling + */ + if( cd_p->callbackSynch == DEFAULT_POLL){ + iapi_SynchChannel(chNum); + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + toRead = nbyte; + copyFinished = FALSE; + local_buf = (unsigned char *)buf; + + /* + * Check the 'RROR' bit on all buffer descriptors, set error number + * and return IAPI_FAILURE if set. + */ + for (index=0 ; index < cd_p->bufferDescNumber ; index++) + { + if(bd_p->mode.status & BD_RROR) + { + result = IAPI_ERR_RROR_BIT_READ | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + + + /* + * 5. Read loop + */ + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + while (!copyFinished) + { + if (!(bd_p->mode.status & BD_DONE)) + { + if (cd_p->trust == FALSE) { + bufsize = cd_p->bufferSize; + } else { + bufsize = bd_p->mode.count; + } + /*if L bit is set, read only "count" bytes and exit the loop*/ + if(bd_p->mode.status & BD_LAST) + { + bufsize = bd_p->mode.count; + copyFinished = TRUE; + } + if (toRead > bufsize) + { + if (cd_p->trust == FALSE) + { + iapi_memcpy(local_buf, iapi_Phys2Virt(bd_p->bufferAddr), bufsize); + local_buf += bufsize; + } + readBytes += bufsize; + toRead -= bufsize; + /*advance bd_p only if bit L is not set. The loop will exit anyway.*/ + if(!(bd_p->mode.status & BD_LAST)) + { + if (bd_p->mode.status & BD_WRAP) + { + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + } + else if(((bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr) + + (cd_p->bufferDescNumber - 1)*sizeof(bufferDescriptor)) != bd_p) + { + bd_p++; + } + else + { + /* finished here : end of buffer descriptors */ + copyFinished = TRUE; + } + } + } + else + { + if (cd_p->trust == FALSE) + { + iapi_memcpy(local_buf, iapi_Phys2Virt(bd_p->bufferAddr), toRead); + local_buf += toRead; + } + readBytes += toRead; + toRead = 0; + /* finished successfully : readBytes = nbytes */ + copyFinished = TRUE; + } + } + else + { + /* finished here : buffer not already done*/ + copyFinished = TRUE; + } + } + iapi_ReleaseChannel(chNum); + } + + /* + *If synchronization type is callback, the user of I.API must + *release the channel + */ + return readBytes; +} + +/* ***************************************************************************/ +/*Attempts to write nbyte from the buffer pointed to by buf to the channel + * data buffers associated with the opened channel number channelNumber + * + * Algorithm:\n + * + * - Check data structures are properly initialized: + * - Channel descriptor validity + * - Channel control block validity + * - Buffer descriptor validity + * - If transfer data size is used, check validity of combination transfer + * size/requested bytes + * - Write loop\n + * Write occurs in the buffer acceded form buffer descriptor and continues + * to the "next" buffer which can be:\n + * -# the last BD of the ring so re-start from beginning\n + * -# the last BD of the BD array but no ring so finish\n + * -# (general case) the next BD in the BD array\n + * And copy continues until data fit in the current buffer or the nbyte + * parameter is reached. + * - Starting of the channel + * + * Notes:\n + * 1) Virtual DMA SDMA channels are unidirectionnal, an iapi_Write authorized + * on a channel means that we are expecting to send to the SDMA. The + * meaning of an interrupt received from the SDMA is therfore that the + * data has been delivered to the SDMA. + * + * @param *cd_p chanenl descriptor for the channel to write to + * @param *buf buffer with data to be written + * @param nbyte number of bytes to write to channel + * + * @return + * - number of bytes written + * - -iapi_errno if failure + */ +int +iapi_Write (channelDescriptor * cd_p, void * buf, unsigned short nbyte) +{ + unsigned int writtenBytes = 0; + unsigned int toWrite; + int result = IAPI_SUCCESS; + unsigned int copyFinished; + unsigned int buffsize; + unsigned int index = 0; + bufferDescriptor * bd_p; + channelControlBlock * ccb_p; + unsigned char * local_buf; + unsigned char chNum; + unsigned char div; + + iapi_errno = IAPI_ERR_NO_ERROR; + + /* + * 1. Check data structures are properly initialized + */ + /* Channel descriptor validity */ + if (cd_p == NULL){ + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Channel control block validity */ + if (cd_p->ccb_ptr == NULL){ + result = IAPI_ERR_CCB_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Control block & Descriptpor associated with the channel being worked on */ + chNum = cd_p->channelNumber; + ccb_p = cd_p->ccb_ptr; + + /* Try to aquire channel*/ + if(iapi_GetChannel(chNum) != 0) + { + result = IAPI_ERR_CH_IN_USE | chNum; + iapi_errno = result; + return -result; + } + + /* Buffer descriptor validity */ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + if (bd_p == NULL ){ + result = IAPI_ERR_BD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + + /* Check initialization has been done for trusted channels */ + if (cd_p->trust == TRUE) { + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + for(index=0 ; index < cd_p->bufferDescNumber ; index++){ + if ((bd_p->bufferAddr == NULL) || (bd_p->mode.count == 0)){ + result = IAPI_ERR_BD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + } + + + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + /*If transfer data size is used, check that the required write length is + * divisible by transfer data size expressed in bytes + */ + if(cd_p->useDataSize) + { + /*Check for divisibility only if data size different then 8bit*/ + if(cd_p->dataSize != TRANSFER_8BIT) + { + switch(cd_p->dataSize) + { + case TRANSFER_32BIT: + div = 4; + break; + case TRANSFER_16BIT: + div = 2; + break; + case TRANSFER_24BIT: + div = 3; + break; + /*we should not get to default*/ + default: + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + /*check the total number of bytes requested*/ + if((nbyte % div) != 0) + { + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + /*now check the length of every BD*/ + for(index=0 ; index < cd_p->bufferDescNumber ; index++) + { + if((bd_p->mode.count % div) != 0) + { + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + } + } + + /* + * 2. Write loop + */ + + local_buf = (unsigned char *)buf; + toWrite = nbyte; + copyFinished = FALSE; + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + + while (!copyFinished){ + + /* variable buffsize contains the nb of bytes that the SDMA will transfer at each pass of the while loop*/ + + /* in NON trusted mode, buffsize is copied from Channel descriptor bufferSize (same size for all transfers) */ + if (cd_p->trust == FALSE) { + buffsize = cd_p->bufferSize; + } + /* in TRUSTED mode, it's up to the user to specify the size of each buffer thru an IoCtl call */ + /* This IoCtl has directly modified the bd_p->mode.count */ + /* therefore, buffersize is copied from the bd_p->mode.count */ + else { + buffsize = bd_p->mode.count; + } + + /* in any mode (trusted or non trusted), the transfer size must be overridden by */ + /* "toWrite" when there is less remaining bytes to transfer than the current buffer size */ + if (toWrite < buffsize) { + buffsize = toWrite; + } + + + if (!(bd_p->mode.status & BD_DONE)){ + /* More data to write than a single buffer can contain */ + if (cd_p->trust == FALSE ){ + iapi_memcpy(iapi_Phys2Virt(bd_p->bufferAddr), local_buf, buffsize); + local_buf += buffsize; + } + + /* update the BD count that will be used by the SDMA to transfer the proper nb of bytes */ + bd_p->mode.count = buffsize; + + bd_p->mode.status |= BD_DONE; + writtenBytes += buffsize; + toWrite -= buffsize; + /* Prepares access to the "next" buffer */ + /* - case 1 - finished successfully : writtenBytes = nbytes */ + if (toWrite == 0) { + copyFinished = TRUE; + } + /* - case 2 - Last BD and WRAP bit set so re-start from beginning */ + /*else if ((bd_p->mode.status & BD_WRAP)){ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + }*/ + /* - case 3 - Last BD of the BD but nor ring*/ + else if (((bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr) + + (cd_p->bufferDescNumber - 1) * sizeof(bufferDescriptor)) == bd_p){ + copyFinished = TRUE; + } + /* - case 4 - general : next BD in the BD array */ + else { + bd_p++; + } + + } else { + /* finished here : buffer not already done */ + copyFinished = TRUE; + } + } + + ccb_p->currentBDptr = ccb_p->baseBDptr; + + /* + * 3. Starting of the channel + */ + iapi_lowStartChannel(chNum); + ccb_p->status.execute = TRUE; + + if( cd_p->callbackSynch == DEFAULT_POLL) + { + iapi_SynchChannel(chNum); + /* + * Check the 'RROR' bit on all buffer descriptors, set error number + * and return IAPI_FAILURE if set. + */ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + for (index=0 ; index < cd_p->bufferDescNumber ; index++) + { + if(bd_p->mode.status & BD_RROR) + { + result = IAPI_ERR_RROR_BIT_WRITE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + iapi_ReleaseChannel(chNum); + } + + /* + *If synchronization type is callback, the user of I.API must + *release the channel + */ + return writtenBytes; +} + + + + +/* ***************************************************************************/ +/* This function is used to receive data from the SDMA. + * + * Algorithm:\n + * + * The data control structure would be copied to IPCv1 complied Buffer + * Descriptor Array. This array shall be allocated from non cacheable memory. + * It would then provide this buffer descriptor array as an input to SDMA using + * channel control block and then configure the Host Enable (HE) or + * DSP enable (DE) bit of SDMA for the channel used for this transfer depending + * on the source. + * + * Notes:\n + * Virtual DMA channels are unidirectional, an iapi_Write_ipcv2 authorized + * on a channel means that source processor is expecting to send to the destination + * processor. The meaning of an interrupt received from the SDMA notifies that the + * data has been delivered to the destination processor. + * + * @param *cd_p chanenl descriptor for the channel to receive from + * @param *data_control_struct_ipcv2 + + * Data Control structure: + * ------------------------- + * | Data Node Descriptor 1| + * ------------------------- + * | Data Node Descriptor 2| + * ------------------------- + * | : | + * | : | + * ------------------------- + * |Data Node Descriptor n | + * ------------------------- + * + * Data Node Descriptor (Buffer Descriptor): + *------------------------------------------------------------------------------ + *| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 … 0| + *------------------------------------------------------------------------------ + *| L E D R R R R R |<---- Reserved ----> |<- Length-> | + *------------------------------------------------------------------------------ + *| <---------------------------- Data Ptr ----------------------------------->| + *------------------------------------------------------------------------------ + * + * L bit (LAST): If set, means that this buffer of data is the last buffer of the frame + * E bit (END): If set, we reached the end of the buffers passed to the function + * D bit (DONE): Only valid on the read callback. When set, means that the buffer has been + * filled by the SDMA. + * Length: Length of data pointed by this node in bytes + * Data Ptr: Pointer to the data pointed to by this node. + * The Function Shall not be called for the same channel unless the Read callback has been + * received for channel for which it has been called already. + * + * @return + * - IAPI_SUCCESS on success, IAPI_ERROR otherwise + * + *- -iapi_errno if failure + */ + +int iapi_Read_ipcv2( channelDescriptor * cd_p, void * data_control_struct_ipcv2) +{ + channelControlBlock * ccb_p; + + +/* The Parameters passed are considered to be validated by the upper layers*/ + + bufferDescriptor_ipcv1_v2 *bd_ipcv2_p; + dataNodeDescriptor *dnd_p = (dataNodeDescriptor*)data_control_struct_ipcv2; + + ccb_p = cd_p->ccb_ptr; + iapi_errno = IAPI_ERR_NO_ERROR; + + if(ccb_p->baseBDptr == NULL) +{ + iapi_errno = IAPI_ERR_BD_UNINITIALIZED; + return -(IAPI_ERR_BD_UNINITIALIZED); +} + + ccb_p->currentBDptr = ccb_p->baseBDptr; + + /* Copy the data Node descriptor information to new BDs */ + bd_ipcv2_p = (bufferDescriptor_ipcv1_v2*)iapi_Phys2Virt(ccb_p->baseBDptr); + + while(1) + { + bd_ipcv2_p->bufferAddr = dnd_p->bufferAddr; + bd_ipcv2_p->mode.count = dnd_p->mode.count; +#ifdef MCU + bd_ipcv2_p->mode.endianness = 1; +#endif +#ifdef DSP + bd_ipcv2_p->mode.endianness = 0; +#endif + + bd_ipcv2_p->mode.status = dnd_2_bd_status[dnd_p->mode.status & GET_LED_MASK]; + + if((dnd_p->mode.status & DND_END_OF_XFER) != 0) + { + /* Break the loop at End of Transfer */ + break; + + } + bd_ipcv2_p++; + dnd_p++; + + } + /* + * Store the buffer address + */ + dnd_read_control_struct[cd_p->channelNumber] = (dataNodeDescriptor*)data_control_struct_ipcv2; + /* + * Register the Call Back + */ + + iapi_AttachCallbackISR(cd_p, iapi_read_ipcv2_callback); + + /* + * Starting of the channel + */ + iapi_lowStartChannel(cd_p->channelNumber); + ccb_p->status.execute = TRUE; + + return IAPI_SUCCESS; + +} + + +/* ***************************************************************************/ +/* + * The function is used send a group of buffers to SDMA. + * Algorithm:\n + * + * The data control structure would be copied to IPCv1 complied Buffer + * Descriptor Array. This array shall be allocated from non cacheable memory. + * It would then provide this buffer descriptor array as an input to SDMA using + * channel control block and then configure the Host Enable (HE) or + * DSP enable (DE) bit of SDMA for the channel used for this transfer depending + * on the source. + * The Function Shall not be called for the same channel unless the Read callback has been + * received for channel for which it has been called already. + * + * Notes:\n + * Virtual DMA channels are unidirectional, an iapi_Write_ipcv2 authorized + * on a channel means that source processor is expecting to send to the destination + * processor. The meaning of an interrupt received from the SDMA notifies that the + * data has been delivered to the destination processor. + * + * @param *cd_p chanenl descriptor for the channel to write to + * @param *data_control_struct_ipcv2 + + * Data Control structure: + * ------------------------- + * | Data Node Descriptor 1| + * ------------------------- + * | Data Node Descriptor 2| + * ------------------------- + * | : | + * | : | + * ------------------------- + * |Data Node Descriptor n | + * ------------------------- + * + * Data Node Descriptor (Buffer Descriptor): + *------------------------------------------------------------------------------ + *| 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 … 0| + *------------------------------------------------------------------------------ + *| L E D R R R R R |<---- Reserved ----> |<- Length-> | + *------------------------------------------------------------------------------ + *| <---------------------------- Data Ptr ----------------------------------->| + *------------------------------------------------------------------------------ + * + * L bit (LAST): If set, means that this buffer of data is the last buffer of the frame + * E bit (END): If set, we reached the end of the buffers passed to the function + * D bit (DONE): Only valid on the read callback. When set, means that the buffer has been + * filled by the SDMA. + * Length: Length of data pointed by this node in bytes + * Data Ptr: Pointer to the data pointed to by this node. + * + * + * @return + * - iapi sucess on success. + * - -iapi_errno if failure + */ + +int iapi_Write_ipcv2( channelDescriptor * cd_p, void * data_control_struct_ipcv2) +{ + + channelControlBlock * ccb_p; + +/* The Parameters passed are considered to be validated by the upper layers*/ + + bufferDescriptor_ipcv1_v2 *bd_ipcv2_p; + dataNodeDescriptor *dnd_p = (dataNodeDescriptor*)data_control_struct_ipcv2; + ccb_p = cd_p->ccb_ptr; + iapi_errno = IAPI_ERR_NO_ERROR; + + if(ccb_p->baseBDptr == NULL) +{ + iapi_errno = IAPI_ERR_BD_UNINITIALIZED; + return -(IAPI_ERR_BD_UNINITIALIZED); +} + + + ccb_p->currentBDptr = ccb_p->baseBDptr; + + bd_ipcv2_p = (bufferDescriptor_ipcv1_v2*)iapi_Phys2Virt(ccb_p->currentBDptr); + /* Copy the data Node descriptor information to new BDs */ + while(1) + { + bd_ipcv2_p->bufferAddr = dnd_p->bufferAddr; + bd_ipcv2_p->mode.count = dnd_p->mode.count; + +#ifdef MCU + bd_ipcv2_p->mode.endianness = 1; +#endif +#ifdef DSP + bd_ipcv2_p->mode.endianness = 0; +#endif + + bd_ipcv2_p->mode.status = dnd_2_bd_status[dnd_p->mode.status & GET_LED_MASK]; + + if((dnd_p->mode.status & DND_END_OF_XFER) != 0) + { + /* Break the loop at End of Transfer */ + break; + } + bd_ipcv2_p++; + dnd_p++; + + } + + /* + * Starting of the channel + */ + iapi_lowStartChannel(cd_p->channelNumber); + ccb_p->status.execute = TRUE; + + return IAPI_SUCCESS; + +} + +/* ***************************************************************************/ +/** Call back ISR for the IPCv2 Receive. + * + * Algorithm:\n + * - This would copy back the informationfrom IPCv1 BD to IPCv2 BD on + * the receiving processor + * + * @return + * - void + */ + +void iapi_read_ipcv2_callback(struct iapi_channelDescriptor* cd_p, void* data) +{ + dataNodeDescriptor *dnd_p = dnd_read_control_struct[cd_p->channelNumber];//cd_p->ccb_ptr->channelDNDBuffer; + bufferDescriptor_ipcv1_v2 *bd_ipcv2_p = (bufferDescriptor_ipcv1_v2*)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + int index = MAX_BD_NUM - 1; + + + do + { + dnd_p->mode.status = 0; + dnd_p->mode.count = bd_ipcv2_p->mode.count; + + dnd_p->mode.status |= bd_ipcv2_p->mode.status & BD_DONE ? 0x00 : DND_DONE ; + dnd_p->mode.status |= bd_ipcv2_p->mode.status & BD_IPCV2_END_OF_FRAME ? DND_END_OF_FRAME : 0x00; + dnd_p->mode.status |= bd_ipcv2_p->mode.status & BD_LAST ? DND_END_OF_XFER : 0x00; + cd_p->ccb_ptr->currentBDptr = (bufferDescriptor*)iapi_Virt2Phys(bd_ipcv2_p); + + if((bd_ipcv2_p->mode.status & BD_LAST) != 0 || + (bd_ipcv2_p->mode.status & BD_CONT) == 0 + ) + break; + dnd_p++; + bd_ipcv2_p++; + + }while(index--); + + /*Call back the Original ISR */ + cd_p->callbackISR_ptr(cd_p, data); +} + +/* ***************************************************************************/ +/**Terminates a channel. + * + * Algorithm:\n + * - Check input parameters ans data structures + * - Check that all buffes have been processed (test all 'D' bits) + * - Stop the channel execution + * - Free alocated memory structures + * - Re-instantiate default interrupt handling + * + * @param *cd_p chanenl descriptor for the channel to close + * + * @return + * - IAPI_SUCCESS : OK + * - -iapi_errno : close failed + */ +int +iapi_Close (channelDescriptor * cd_p) +{ + int index = 0; + int result = IAPI_SUCCESS; + unsigned char chNum; + bufferDescriptor * bd_p; + channelControlBlock * ccb_p; + + /* + * 1. Check input parameters ans data structures + */ + if (cd_p != NULL){ + if (cd_p->ccb_ptr != NULL) { + chNum = cd_p->channelNumber; + ccb_p = cd_p->ccb_ptr; + } else { + result = IAPI_ERR_NO_CCB_DEFINED | IAPI_ERR_CH_AVAILABLE; + iapi_errno = result; + return -result; + } + } else { + result = IAPI_ERR_CD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE; + iapi_errno = result; + return -result; + } + /* Try to aquire channel*/ + if(iapi_GetChannel(chNum) != 0) + { + result = IAPI_ERR_CH_IN_USE | chNum; + iapi_errno = result; + return -result; + } + + /* + * 2. Check that all buffes have been processed (test all 'D' bits), + * only if the forceClose bit in channel descriptor is set to FALSE + */ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + if (bd_p == NULL){ + result = IAPI_ERR_BD_UNINITIALIZED | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + return -result; + } + if(cd_p->forceClose == FALSE) + { + for (index=cd_p->bufferDescNumber ; index>0 ; index--){ + if (bd_p->mode.status & BD_DONE){ + result = IAPI_ERR_CLOSE | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } + bd_p++; + } + } + /*if the closing is forced,mark channel unused,set BD ownership to processor*/ + else + { + ccb_p->status.execute = FALSE; + for (index=cd_p->bufferDescNumber ; index>0 ; index--) + { + bd_p->mode.status &= ~BD_DONE; + bd_p++; + } + } + + /* + * 3. Stop the channel execution + */ + iapi_lowStopChannel(chNum); + + /* + * 4. Free alocated memory structures + */ + if (cd_p->trust == FALSE ){ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr); + for (index=cd_p->bufferDescNumber ; index>0 ; index--){ + FREE (iapi_Phys2Virt(bd_p->bufferAddr)); + bd_p++; + } + } + + /* + * 5. Re-instantiate default interrupt handling + */ + iapi_DetachCallbackISR (cd_p); + FREE ((bufferDescriptor *)iapi_Phys2Virt(ccb_p->baseBDptr)); + FREE (cd_p); + ccb_p->baseBDptr = NULL; + ccb_p->currentBDptr = NULL; + ccb_p->channelDescriptor = NULL; + ccb_p->status.openedInit = FALSE; + + iapi_ReleaseChannel(chNum); + + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**The request argument selects the control function to be performed. + * + * Algorithm:\n + * + * - Check data structures are properly initialized: + * - Channel descriptor validity + * - Channel control block validity + * - The ctlRequest parameter contains in the lower 16 bits the control code of + * the change to be performed, and in the upper 16 bits, the BD to be + * modified if the change affects a BD od the channel. + * - Selection of the parameter to change and appropriate sanity checks: + * - Channel Descriptor: changes the pointer to the channel descriptor + * structure, the pointer to the new channel descriptor is given in the third + * argument call + * - Buffer Descriptor Number: changes the number of buffer descriptor for the + * channel + * - Buffer size: changes the size of the data buffers pointed to by the + * buffer descriptor; note that all buffer descriptors are assumed to have the + * same size for a given buffer descripotr chain + * - Blocking policy: changes the blocking policy for the read and write calls + * - Ownership: changes direction: turnaround + * - Synchronization method: changes the callback type, default or user. The* + * callback function table is set accordingly + * - Trust property: trust can only be changed through ChangeChannelDesc first + * request, this guarantees the close/open sequence for the channel + * - Callback Interrupt service routine pointer: changes the callback function + * pointer, when this method is used, to replace it with a new one + * - Channel control block pointer: not available + * - Priority: changes the channel priority directly in SDMA register + * - Watermark level: changes the value of the peripheral watermark level that + * passed to the script. The new value is passed in the third parameter call. + * - Wrap bit: changes to set to 1 the Wrap bit of the last buffer descriptor + * + * @param *cd_p channel descriptor for the channel to modify + * @param ctlRequest request control code and, if tha case, number of BD to be + * changed + * @param param parameter for the modification + * + * @return + * - IAPI_SUCCESS : OK + * - -iapi_errno : operation failed + */ +int +iapi_IoCtl (channelDescriptor * cd_p, unsigned long ctlRequest, + unsigned long param) +{ + int retvalue; + int result = IAPI_SUCCESS; + unsigned char chNum; + unsigned long clean_ctlRequest; /* lower 16 bits of the ctlRequest*/ + unsigned long bd_num; /* upper 16 bits of the ctlRequest*/ + + /* + * 1. Check data structures are properly initialized + */ + /* Channel descriptor validity */ + if (cd_p == NULL){ + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Channel control block validity */ + if (cd_p->ccb_ptr == NULL){ + result = IAPI_ERR_CCB_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Control block & Descriptor associated with the channel being worked on */ + chNum = cd_p->channelNumber; + + /* Remove, if exists, BD number specified in upper bits of ctlRequest*/ + clean_ctlRequest = ctlRequest & (~BD_NUM_MASK); + + /* Extract, if exists, BD number specified in upper bits of ctlRequest*/ + bd_num = (ctlRequest & BD_NUM_MASK) >> BD_NUM_OFFSET; + + /* Check that the bd_num is valid*/ + if(bd_num > cd_p->bufferDescNumber) + { + result = IAPI_ERR_INVALID_PARAMETER | chNum; + iapi_errno = result; + return -result; + } + + /*All checks OK, try to aquire channel*/ + if(iapi_GetChannel(chNum) != 0) + { + result = IAPI_ERR_CH_IN_USE | chNum; + iapi_errno = result; + return -result; + } + + /* + * 2. Selection of the parameter to change and appropriate sanity checks + */ + switch (clean_ctlRequest){ + + /* + * Channel Descriptor + * --- Changes the pointer to the channel descriptor structure: the pointer + * to the new channel descriptor is given in the third argument call. + */ + case IAPI_CHANGE_CHANDESC: + if ((void *) param == NULL) { + result = IAPI_ERR_INVALID_PARAMETER; + iapi_errno = result; + iapi_ReleaseChannel(chNum); + return -result; + } else { + channelDescriptor * chParam = (channelDescriptor *)param; + if (chParam->channelNumber != chNum){ + /* Release ch so it can be aquired by the Close fn*/ + iapi_ReleaseChannel(chNum); + result = iapi_Close(cd_p); + if (result == IAPI_SUCCESS){ + FREE((void*)cd_p); + iapi_AllocChannelDesc (&cd_p, chParam->channelNumber); + iapi_memcpy((void*)cd_p, (void*)chParam, sizeof (channelDescriptor)); + /* Channel is released allready, so Open can get the channel*/ + result = iapi_Open(cd_p, chParam->channelNumber); + if(result != IAPI_SUCCESS) + { + return result; /* error code already set in iapi_Open*/ + } + } else { + return result; /* error code already set in iapi_Close*/ + } + } else { + result = IAPI_ERR_CD_CHANGE | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + iapi_ReleaseChannel(chNum); + iapi_errno = result; + return -result; + } + return IAPI_SUCCESS; + } + + /* + * Buffer Descriptor Number + * --- Changes the number of buffer descriptor for the channel. + */ + case IAPI_CHANGE_BDNUM: + result = iapi_ChangeChannelDesc(cd_p, IAPI_BUFFERDESCNUMBER, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Buffer size + * --- Changes the size of the data buffers pointed to by the buffer + * descriptor; note that all buffer descriptors are assumed to have the + * same size for a given buffer descripotr chain. + */ + case IAPI_CHANGE_BUFFSIZE: + result = iapi_ChangeChannelDesc(cd_p, IAPI_BUFFERSIZE, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Blocking policy + * --- Changes the blocking policy for the read and write calls. + */ + case IAPI_CHANGE_CHANBLOCK: + result = iapi_ChangeChannelDesc(cd_p, IAPI_BLOCKING, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Ownership + * --- Changes direction: turnaround + */ + case IAPI_CHANGE_OWNERSHIP: + result = iapi_ChangeChannelDesc(cd_p, IAPI_OWNERSHIP, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Synchronization method + * --- Changes the callback type, default or user. The callback function + * table is set accordingly. + */ + case IAPI_CHANGE_SYNCH: + result = iapi_ChangeChannelDesc(cd_p, IAPI_CALLBACKSYNCH, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Trust property + * --- trust can only be changed through ChangeChannelDesc first request, + * this guarantees the close/open sequence for the channel. + */ + case IAPI_CHANGE_TRUST: + result = iapi_ChangeChannelDesc(cd_p, IAPI_TRUST, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Callback Interrupt service routine pointer + * --- Cahnges the callback function pointer, when this method is used, to + * replace it with a new one. + */ + case IAPI_CHANGE_CALLBACKFUNC: + result = iapi_ChangeChannelDesc(cd_p, IAPI_CALLBACKISR_PTR, param); + iapi_ReleaseChannel(chNum); + return result; + + /* + * Channel control block pointer + * --- NA + */ + case IAPI_CHANGE_CHANCCB: + result = iapi_ChangeChannelDesc(cd_p, IAPI_CCB_PTR, param); + iapi_ReleaseChannel(chNum); + return result; + +#ifdef MCU + /* + * Priority + * --- Changes the channel priority directly in SDMA register + */ + case IAPI_CHANGE_PRIORITY: + { + volatile unsigned long * ChannelPriorities = &SDMA_CHNPRI_0; + if(param < MAX_CH_PRIORITY) + { + ChannelPriorities[ cd_p->channelNumber ] = param; + } + else + { + iapi_ReleaseChannel(chNum); + return IAPI_FAILURE; + } + } + break; +#endif /* MCU */ + + /* + * Wrap + * --- Set to 1 the wrap bit of the last buffer descriptor of the array. + * it provides the possibility to have a circular buffer structure. + */ + case IAPI_CHANGE_BDWRAP: + { + result = iapi_ChangeChannelDesc(cd_p,IAPI_BDWRAP , param); + iapi_ReleaseChannel(chNum); + return result; + } + + /* + * Watermark + * --- Changes the value of the peripheral watermark level that triggers + * a DMA request. It impacts context of the channel, therefore channel 0 + * must be started to update the context with this new value. + */ + case IAPI_CHANGE_WATERMARK: + { + result = iapi_ChangeChannelDesc(cd_p,IAPI_WML , param); + iapi_ReleaseChannel(chNum); + return result; + } + /* + * INTR + * --- Set the INTR bit on specified BD or on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_SET_BDINTR: + { + bufferDescriptor * bde_p; + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status |= BD_INTR; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status |= BD_INTR; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * INTR + * --- Unset the INTR bit on specified BD or on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_UNSET_BDINTR: + { + bufferDescriptor * bde_p; + + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status &= ~BD_INTR; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status &= ~BD_INTR; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } +/* + * EventMask1 + * --- Changes the value of the eventMask1 + */ + case IAPI_CHANGE_EVTMASK1: + { + cd_p->eventMask1 = param; + } + break; + /* + * EventMask2 + * --- Changes the value of the eventMask2 + */ + case IAPI_CHANGE_EVTMASK2: + { + cd_p->eventMask2 = param; + } + break; + /* + * Peripheral Address + * --- Changes the value of the peripheralAddr + */ + case IAPI_CHANGE_PERIPHADDR: + { + cd_p->peripheralAddr = param; + } + break; + /* + * Cont + * --- Set the CONT bit on specified BD on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_SET_BDCONT: + { + bufferDescriptor * bde_p; + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status |= BD_CONT; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status |= BD_CONT; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * Cont + * --- Unset the CONT bit on specified BD or on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_UNSET_BDCONT: + { + bufferDescriptor * bde_p; + + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status &= ~BD_CONT; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status &= ~BD_CONT; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + + /* + * EXTD + * --- Set the EXTD bit on specified BD or on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_SET_BDEXTD: + { + bufferDescriptor * bde_p; + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status |= BD_EXTD; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status |= BD_EXTD; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * EXTD + * --- Unset the EXTD bit on specified BD or on all BD's if SET_BIT_ALL + * is passed as parameter. + */ + case IAPI_CHANGE_UNSET_BDEXTD: + { + bufferDescriptor * bde_p; + + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.status &= ~BD_EXTD; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.status &= ~BD_EXTD; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + + /* + * TRANSFER SIZE to be used for this channel + * --- Set the transfer size used indicator and code for transfer size in + * the CD + */ +case IAPI_CHANGE_SET_TRANSFER_CD: + { + bufferDescriptor * bde_p; + int j = 0; + retvalue = IAPI_SUCCESS; + if((param == TRANSFER_8BIT) || (param == TRANSFER_16BIT) || + (param == TRANSFER_24BIT) || (param == TRANSFER_32BIT)) + { + cd_p->useDataSize = TRUE; + cd_p->dataSize = param; + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.command = param; + bde_p++; + } + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + + + /* + * USER_ARG + * --- Set the user selectable pointer to be received by the callback + * function, if IRQ synch is used + */ + case IAPI_CHANGE_USER_ARG: + { + userArgTable[cd_p->channelNumber]= (void*)param; + iapi_ReleaseChannel(chNum); + return IAPI_SUCCESS; + } + /* + * FORCE_CLOSE + * --- Set the forceClose bit in channelDescriptor to value passed in param. + * If this bit is TRUE, the channel in closed even if some BD are still + * owned by the SDMA. + */ + case IAPI_CHANGE_FORCE_CLOSE: + { + retvalue = IAPI_SUCCESS; + if((param == TRUE) || (param == FALSE)) + { + cd_p->forceClose = param; + } + else + { + iapi_errno = IAPI_ERR_INVALID_PARAMETER | cd_p->channelNumber; + retvalue = -iapi_errno; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * TRANSFER type + * --- Set the last 2 bits in the command field of the BD to specify the + * transfer type 8, 16, 24, or 32 bits on all BD's, allready set in the CD + */ + case IAPI_CHANGE_SET_TRANSFER: + { + bufferDescriptor * bde_p; + int j = 0; + + retvalue = IAPI_SUCCESS; + if((param == TRANSFER_8BIT)||(param == TRANSFER_16BIT)|| + (param == TRANSFER_24BIT)||(param == TRANSFER_32BIT)) + { + bde_p = cd_p->ccb_ptr->baseBDptr; + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.command = param; + bde_p++; + } + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * BUFFER address + * --- Change buffer address in BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_SET_BUFFERADDR: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + + /* DO NOT translate address to physical */ + bde_p->bufferAddr = (void*)param; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * BUFFER address + * --- Get the buffer address from the BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_GET_BUFFERADDR: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Translate to virtual*/ + *((unsigned long*)param) = (unsigned long)bde_p->bufferAddr; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * EXTENDED BUFFER address + * --- Change extended buffer address in BD specified in the upper 16 bits + * of the ctlRequest. + */ + case IAPI_CHANGE_SET_EXTDBUFFERADDR: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + + /* DO NOT translate address to physical. The user might want something else + *here + */ + bde_p->extBufferAddr = (void*)param; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * EXTENDED BUFFER address + * --- Get extended buffer address from the BD specified in the upper 16 bits + * of the ctlRequest. + */ + case IAPI_CHANGE_GET_EXTDBUFFERADDR: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + + /* DO NOT translate address to vitual - user knows what is here. + */ + *((unsigned long*)param) = (unsigned long)bde_p->extBufferAddr; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * COMMAND field + * --- Change command field in BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_SET_COMMAND: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Update command field*/ + bde_p->mode.command = param; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * COMMAND field + * --- Get the command field from the BD specified in the upper 16 bits + * of the ctlRequest. + */ + case IAPI_CHANGE_GET_COMMAND: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Get the command field*/ + *((unsigned long*)param) = bde_p->mode.command; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * COUNT field + * --- Change count field in BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_SET_COUNT: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Update count field*/ + bde_p->mode.count = param; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * COUNT field + * --- Get the count field of the BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_GET_COUNT: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Update count field*/ + *((unsigned long*)param) = bde_p->mode.count; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * STATUS field + * --- Change status field in BD specified in the upper 16 bits of the + * ctlRequest. + */ + case IAPI_CHANGE_SET_STATUS: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Update status field*/ + bde_p->mode.status = param; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + /* + * STATUS field + * --- Get the status field of the BD specified in the upper 16 bits + * of the ctlRequest. + */ + case IAPI_CHANGE_GET_STATUS: + { + bufferDescriptor * bde_p; + retvalue = IAPI_SUCCESS; + + /* Get pointer to the BD structure to change*/ + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bde_p+= bd_num; + /* Update status field*/ + *((unsigned long*)param) = bde_p->mode.status; + + iapi_ReleaseChannel(chNum); + return retvalue; + } + +#ifdef MCU + /* + * Endianness + * --- Set the ENDIANNESS indicator in the command filed of the specified BD + * or on all BD's if SET_BIT_ALL is passed as parameter. + */ + case IAPI_CHANGE_SET_ENDIANNESS: + { + bufferDescriptor * bde_p; + int j = 0; + + retvalue = IAPI_SUCCESS; + if(param == SET_BIT_ALL) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + for(j = 0; j < cd_p->bufferDescNumber; j++) + { + bde_p->mode.command = CHANGE_ENDIANNESS; + bde_p++; + } + } + else if(param < cd_p->bufferDescNumber) + { + bde_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr) + + param; + bde_p->mode.command = CHANGE_ENDIANNESS; + } + else + { + retvalue = IAPI_FAILURE; + } + iapi_ReleaseChannel(chNum); + return retvalue; + } +#endif + +#ifdef SDMA_SKYE +#ifdef MCU + + /* + * SDMA State + * --- Enter the SDMA into LOCK Mode. No RAM updation allowed except same Context + * update with same PC Value. + */ + case IAPI_ENTER_LOCK_MODE: + { + if(param == RESET_CLEAR_LOCK) + { + SDMA_SDMA_LOCK = (1 << RESET_CLR_BIT_OFFSET); + SDMA_SDMA_LOCK = (1 << LOCK_BIT_OFFSET); + iapi_SdmaState = LOCK; + } + else if(param == RESET_NOCLEAR_LOCK) + { + SDMA_SDMA_LOCK = (1 << LOCK_BIT_OFFSET); + iapi_SdmaState = LOCK; + } + + } + break; + +#endif +#endif + default: + retvalue = IAPI_ERR_CD_CHANGE_UNKNOWN | IAPI_ERR_CH_AVAILABLE | chNum; + iapi_errno = retvalue; + iapi_ReleaseChannel(chNum); + return -retvalue; + } + + + iapi_ReleaseChannel(chNum); + return IAPI_SUCCESS; +} +/* ***************************************************************************/ +/**Initialization of the SDMA - opening of channel 0, download RAM image. + * + * Algorithm:\n + * - open channel 0 + * - if ram_image pointer passed is not NULL, download RAM image to SDMA + * + * @param + * - cd_p channel descriptor pointer for channel 0 + * - ram_image pointer to RAM image to download, or NULL if this operation + * is not required + * - code_size size of the RAM image, in bytes + * - start_addr start address for the RAM image + * + * @return + * - IAPI_SUCCESS if all operations were successful + * - negated I.API error code if any operation failed + */ +#ifdef MCU +int +iapi_Init(channelDescriptor * cd_p, configs_data * config_p, unsigned short* ram_image, + unsigned short code_size, unsigned long start_addr) +{ +#endif +#ifdef DSP +int +iapi_Init(channelDescriptor * cd_p) +{ +#endif + +int retvalue = IAPI_SUCCESS; /* Variable to store the results from I.API calls */ + + /* Check initialization not allredy done*/ + if(iapi_CCBHead != NULL) + { + retvalue = IAPI_ERR_NOT_ALLOWED; + iapi_errno = retvalue; + return -retvalue; + } + /* Be sure SDMA has not started yet */ +#ifdef MCU + SDMA_H_C0PTR = 0x0; +#endif +#ifdef DSP + SDMA_D_C0PTR = 0x0; +#endif + + /*Try to open channel 0*/ + retvalue = iapi_Open(cd_p, 0); + if(retvalue != IAPI_SUCCESS) + { + return retvalue; + } + +#ifdef MCU + /* Set Command Channel (Channel Zero) */ + SDMA_CHN0ADDR = 0x4050; + + /* Set bits of CONFIG register but with static context switching */ + SDMA_H_CONFIG = (config_p->dspdma << 12) | (config_p->rtdobs << 11) | + (config_p->acr << 4) | (0); + + /* Send the address for the host channel table to the SDMA*/ + SDMA_H_C0PTR = (unsigned long)iapi_Virt2Phys(iapi_CCBHead); + /* If required, download the RAM image for SDMA*/ + if(ram_image != NULL) + { + retvalue = iapi_SetScript(cd_p, (void*)ram_image, code_size, + start_addr); + } + + /* Set bits of CONFIG register with given context switching mode */ + SDMA_H_CONFIG = (config_p->dspdma << 12) | (config_p->rtdobs << 11) | + (config_p->acr << 4) | (config_p->csm); + +#endif +#ifdef DSP + /* Send the address for the host channel table to the SDMA*/ + SDMA_D_C0PTR = (unsigned long)iapi_Virt2Phys(iapi_CCBHead); +#endif + +#ifdef SDMA_SKYE + iapi_SdmaState = OPEN; +#endif + + return retvalue; +} + + +/* ***************************************************************************/ +/**High layer interface for starting a channel + * + * Algorithm:\n + * - call low layer function for starting a channel + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_StartChannel(unsigned char channel) +{ + iapi_lowStartChannel(channel); + return IAPI_SUCCESS; +} +/* ***************************************************************************/ +/**High layer interface for stopping a channel + * + * Algorithm:\n + * - call low layer function for stopping a channel + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_StopChannel(unsigned char channel) +{ + iapi_lowStopChannel(channel); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**High layer interface for synchronising a channel + * + * Algorithm:\n + * - call low layer function for stopping a channel + * + * @return + * - IAPI_SUCCESS + */ +int iapi_SynchChannel(unsigned char channel) +{ + iapi_lowSynchChannel(channel); + return IAPI_SUCCESS; +} + +#ifdef MCU +/* ***************************************************************************/ +/**High layer interface for getting program memory data from SDMA + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_GetScript(channelDescriptor * cd_p, void * buf, unsigned short size, + unsigned long address) +{ + iapi_lowGetScript(cd_p, buf, size, address); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**High layer interface for getting data memory from SDMA + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_GetContext(channelDescriptor * cd_p, void * buf, + unsigned char channel) +{ + iapi_lowGetContext(cd_p, buf, channel); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**High layer interface for set program memory data to SDMA - e.g. scripts + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_SetScript(channelDescriptor * cd_p, void * buf, unsigned short nbyte, + unsigned long destAddr) +{ + iapi_lowSetScript(cd_p, buf, nbyte, destAddr); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**High layer interface for set data memory to SDMA - e.g. contexts. + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_SetContext(channelDescriptor * cd_p, void * buf, + unsigned char channel) +{ + iapi_lowSetContext(cd_p, buf, channel); + return IAPI_SUCCESS; +} + +/* ***************************************************************************/ +/**High layer interface used to associate specified channel with a script. + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_AssignScript(channelDescriptor * cd_p, script_data * data_p) +{ + /* VERIFY THAT THE CHANNEL IT IS OPENED !!!!*/ + return iapi_lowAssignScript(cd_p, data_p); +} + +/* ***************************************************************************/ +/**High layer interface used to associate specified channel with a script. + * + * Algorithm:\n + * - call coresponding low layer function + * + * @return + * - IAPI_SUCCESS + */ +int +iapi_SetChannelEventMapping(unsigned char event, unsigned long channel_map) +{ + return iapi_lowSetChannelEventMapping(event, channel_map); +} +#endif + + + +#ifdef DSP +#define SDMA_DI SDMA_D_INTR +void IRQ_Handler(); +#pragma interrupt IRQ_Handler +#endif + +#ifdef MCU +#define SDMA_DI SDMA_H_INTR +#endif + +#ifndef IRQ_KEYWORD +#define IRQ_KEYWORD +#endif /* IRQ_KEYWORD */ + +/* ***************************************************************************/ +/** + *@brief Find the first set bit in data parameter. + * + * Find the first set bit in unsigned integer parameter data. Data is scanned + * from MSB to LSB, searching for the set bit. The value returned is the + * offset from the most significant bit of data. If bit 31 is set, the value + * returned is zero. If no bits are set, a value of 32 is returned. This is compliant + * with the MCore FF1 instruction. + * + * + * + * @param + * - data: variable to check + * + * @return + * - the offset of the most significant bit set from the MSB + */ +unsigned int +quartz_FF1( unsigned int data ) +{ + register unsigned int result = 0; + while ( (result <= 31 ) && !( data & 0x80000000U) ) + { + data <<= 1U; + result++; + } + + return result; +} + +IRQ_KEYWORD +void +IRQ_Handler(void) +{ + unsigned int intrReg;/* interrupt register mask for clearing the interrupt bit */ + unsigned char chNum; /* SDMA channel number generating the a IRQ*/ + + /* Disable interrupts */ + iapi_DisableInterrupts(); + /* + * Clear interrupt in SDMA DI register => ACK to the SDMA the IT request. + * Get each interrupt number, clear them one after the other. + */ + if(SDMA_DI != 0) + { + chNum = (unsigned char)(CH_NUM - 1 - quartz_FF1(SDMA_DI)); + intrReg = (unsigned int)(1 << chNum); + } + else + { + chNum = 32; + intrReg = 0; + } + + while (intrReg != 0) + { + SDMA_DI &= intrReg; + iapi_SDMAIntr |= intrReg; + iapi_WakeUp(chNum); + if (callbackIsrTable[chNum] != NULL) + { + /* release channel before callback, so IoCtl's are available*/ + iapi_ReleaseChannel(chNum); + callbackIsrTable[chNum](iapi_CCBHead[chNum].channelDescriptor, + userArgTable[chNum]); + } + + chNum = (unsigned char)(CH_NUM - 1 - quartz_FF1(SDMA_DI)); + intrReg = (unsigned int)(1 << chNum); + } + + /* Enable interrupts */ + iapi_EnableInterrupts(); +} + +/* ***************************************************************************/ +/** + *@brief Perform a memory copy operation, in the memory of the same processor + * + * Size bytes are copied from the src address to dest address. It is used + * the channel pointed by cd_p, which must be configured prior to this call: + * opened, associated with the script to perform the operation - DSP_2_DSP, + * or MCU_2_MCU - and have the synchronization option set. + * + * + * + * @param + * - cd_p: channel configured to perform DSP_2_DSP or MCU_2_MCU transfers + * - dest: destination memory address + * - src : source memory address + * - size: number of bytes to copy from src to dest + * + * @return + * - the offset of the most significant bit set from the MSB + */ + +int iapi_MemCopy(channelDescriptor * cd_p, void* dest, void* src, unsigned long size) +{ + int result = IAPI_SUCCESS; + bufferDescriptor * bd_p; + + /* Channel descriptor validity */ + if (cd_p == NULL) + { + result = IAPI_ERR_CD_UNINITIALIZED; + iapi_errno = result; + return -result; + } + + /* Check and set correct parameter */ + if(cd_p->trust != TRUE) + { + result = iapi_ChangeChannelDesc(cd_p, IAPI_TRUST, TRUE); + } + + if(cd_p->bufferDescNumber != 1) + { + result = iapi_ChangeChannelDesc(cd_p, IAPI_BUFFERDESCNUMBER, 1); + if(result != IAPI_SUCCESS) + { + return result; + } + } + + if(cd_p->bufferSize != size) + { + result = iapi_ChangeChannelDesc(cd_p, IAPI_BUFFERSIZE, size); + if(result != IAPI_SUCCESS) + { + return result; + } + } + /* Set addresses*/ + bd_p = (bufferDescriptor *)iapi_Phys2Virt(cd_p->ccb_ptr->baseBDptr); + bd_p->bufferAddr = iapi_Virt2Phys(src); + bd_p->extBufferAddr = iapi_Virt2Phys(dest); + + /* Set mode*/ + bd_p->mode.count = size; + bd_p->mode.command = 0x00; + bd_p->mode.status = BD_INTR|BD_EXTD|BD_DONE|BD_WRAP; + + /*Decide if we sleep or not*/ + if(cd_p->callbackSynch == DEFAULT_POLL) + { + iapi_StartChannel(cd_p->channelNumber); + /* Call synchronization routine*/ + iapi_SynchChannel(cd_p->channelNumber); + } + else + { + /* Just start the channel*/ + iapi_StartChannel(cd_p->channelNumber); + } + + return result; +} + +/* ***************************************************************************/ +/**Return the channel number from the channel descriptor + * + * @param cd_p pointer to channel descriptor to obtain the channel number + * + * @return + * - the channel number + * + */ +int iapi_GetChannelNumber(channelDescriptor * cd_p) +{ + return cd_p->channelNumber; +} + +/* ***************************************************************************/ +/**Return the error bit from the current BD of the channel + * + * + * @param cd_p pointer to channel descriptor + * + * @return + * - 0 if no error detected + * - BD_RROR | DATA_ERROR if error detected + * + */ +unsigned long iapi_GetError(channelDescriptor * cd_p) +{ + return ((cd_p->ccb_ptr->currentBDptr->mode.status & BD_RROR) | + (*(unsigned long*)&cd_p->ccb_ptr->status & DATA_ERROR)); +} + +/* ***************************************************************************/ +/**Return the count from the current BD of the channel + * + * + * @param cd_p pointer to channel descriptor + * + * @return + * - count field of the current BD for the channel + * + */ +int iapi_GetCount(channelDescriptor * cd_p) +{ + return (int)(cd_p->ccb_ptr->currentBDptr->mode.count); +} + +/* ***************************************************************************/ +/**Return the sum of counts for all the BD's owned by the processor for + * the channel specified by the received parameter. + * + * + * @param cd_p pointer to channel descriptor + * + * @return + * - sum of count fields + * + */ +int iapi_GetCountAll(channelDescriptor * cd_p) +{ + int retval = 0; + int i = 0; + bufferDescriptor* bd_p; + + bd_p = cd_p->ccb_ptr->baseBDptr; + + while((i < cd_p->bufferDescNumber) && ((bd_p->mode.status & BD_DONE) == 0)) + { + retval += bd_p->mode.count; + i++; + bd_p++; + } + return retval; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/Makefile @@ -0,0 +1,18 @@ +# +# Makefile for I.API sources. +# +ifneq ($(KBUILD_SRC),) +ccflags-y += -I$(KBUILD_SRC)/arch/arm/plat-mxc/sdma/iapi/include \ + -I$(KBUILD_SRC)/include/linux \ + -DMCU -DOS=LINUX \ + -DL_I_T_T_L_E_ENDIAN=0 -DB_I_G_ENDIAN=1 \ + -DENDIANNESS=L_I_T_T_L_E_ENDIAN +else +ccflags-y += -Iarch/arm/plat-mxc/sdma/iapi/include \ + -Iinclude/linux \ + -DMCU -DOS=LINUX \ + -DL_I_T_T_L_E_ENDIAN=0 -DB_I_G_ENDIAN=1 \ + -DENDIANNESS=L_I_T_T_L_E_ENDIAN +endif + +obj-y += iapiLow.o iapiLowMcu.o iapiMiddle.o iapiMiddleMcu.o iapiHigh.o iapiDefaults.o iapiOS.o --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiMiddleMcu.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiMiddleMcu.c @@ -0,0 +1,52 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiMiddleMcu.c + * + * $Id iapiMiddleMcu.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the MIDDLE level functions of the I.API specific to MCU. + * + * + * + * + * $Log iapiMiddleMcu.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "epm.h" +#include + +#include "iapiLow.h" +#include "iapiMiddle.h" + +/* **************************************************************************** + * Global Variable Section + *****************************************************************************/ + +/*extern void * __HEAP_START; +extern void * __HEAP_END; +*/ + +/* **************************************************************************** + * Function Section + *****************************************************************************/ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiLow.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiLow.c @@ -0,0 +1,149 @@ +/****************************************************************************** + * + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiLow.c + * + * $Id iapiLow.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the LOW level functions of the I.API. + * + * + * / + * + * $Log iapiLow.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "epm.h" +#include "iapiLow.h" + +/** + * Function Section + */ + + +/* ***************************************************************************/ +/**Records an ISR callback function pointer into the ISR callback + * function table + * + * @param cd_p channel descriptor to attach callback to + * @param func_p pointer to the callback function to be registered + * + * @return none + */ +void +iapi_AttachCallbackISR (channelDescriptor * cd_p, + void (* func_p)(channelDescriptor * cd_p, void * arg)) + +{ + if (cd_p->callbackSynch == CALLBACK_ISR) { + iapi_DisableInterrupts(); + callbackIsrTable[cd_p->channelNumber] = func_p; + iapi_EnableInterrupts(); + } else if (cd_p->callbackSynch == DEFAULT_POLL) { + callbackIsrTable[cd_p->channelNumber] = NULL; + } else { + iapi_errno = IAPI_ERR_CALLBACKSYNCH_UNKNOWN | IAPI_ERR_CH_AVAILABLE | + cd_p->channelNumber; + } +} + + +/* ***************************************************************************/ +/**Detaches (removes) an ISR callback function pointer from the ISR callback + * function table + * + * Algorithm:\n + * - Attach a null function to replace the original one. + * + * @param cd_p channel descriptor to detach callback from + * + * @return none + */ +void +iapi_DetachCallbackISR (channelDescriptor * cd_p) + +{ + iapi_AttachCallbackISR (cd_p, NULL); +} + +/* ***************************************************************************/ +/**Updates an ISR callback function pointer into the ISR callback function + * table + * + * Algorithm:\n + * - Detach the old function pointer (if any) and attach the new one + * + * @param cd_p channel descriptor to attach callback to + * @param func_p pointer to the callback function to be registered + * + * @return none + */ +void +iapi_ChangeCallbackISR (channelDescriptor * cd_p, + void (* func_p)(channelDescriptor * cd_p, void * arg)) +{ + iapi_DetachCallbackISR(cd_p); + iapi_AttachCallbackISR(cd_p, func_p); +} + +/* ***************************************************************************/ +/**Loop while the channel is not done on the SDMA + * + * Algorithm:\n + * - Loop doing nothing but checking the I.API global variable to indicate + * that the channel has been completed (interrupt from SDMA) + * + * Notes:\n + * - The ISR must update the I.API global variable iapi_SDMAIntr. + * + * @param channel channel number to poll on + * + * @return none + */ +void +iapi_lowSynchChannel (unsigned char channel) +{ + while (!((1UL << channel) & iapi_SDMAIntr)) ; + iapi_SDMAIntr &= ~(1UL << channel); +} + +/* ***************************************************************************/ +/**Fill the buffer descriptor with the values given in parameter. + * + * @return none + */ +void +iapi_SetBufferDescriptor( bufferDescriptor * bd_p, unsigned char command, + unsigned char status, unsigned short count, + void * buffAddr, void * extBufferAddr) +{ + bd_p->mode.command = command; + bd_p->mode.status = status; + bd_p->mode.count = count; + if (buffAddr != NULL) { + bd_p->bufferAddr = iapi_Virt2Phys(buffAddr); + } else { + bd_p->bufferAddr = buffAddr; + } + bd_p->extBufferAddr = extBufferAddr; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiOS.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiOS.c @@ -0,0 +1,64 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiOS.c + * + * $Id iapiOS.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the OS level functions of the I.API - are OS dependant and must + * be provided by the user of I.API. + * + * + * / + * + * $Log iapiOS.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "epm.h" +#include "iapiLow.h" + +/** + * Function Section + */ +#ifdef CONFIG_SDMA_IRAM +void*(* iapi_iram_Malloc) (size_t size); +#endif /*CONFIG_SDMA_IRAM*/ + +void*(* iapi_Malloc) (size_t size); +void (* iapi_Free) (void * ptr); + +void*(* iapi_Virt2Phys) (void * ptr); +void*(* iapi_Phys2Virt) (void * ptr); + +void (* iapi_WakeUp)(int); +void (* iapi_GotoSleep)(int); +void (* iapi_InitSleep)(int); + +void*(* iapi_memcpy)(void *dest, const void *src, size_t count); +void*(* iapi_memset)(void *dest, int c, size_t count); + +void (* iapi_EnableInterrupts)(void); +void (* iapi_DisableInterrupts)(void); + +int (* iapi_GetChannel)(int); +int (* iapi_ReleaseChannel)(int); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-mxc/sdma/iapi/src/iapiLowDsp.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-mxc/sdma/iapi/src/iapiLowDsp.c @@ -0,0 +1,79 @@ +/****************************************************************************** + * + * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + * + ****************************************************************************** + * + * File: iapiLowDsp.c + * + * $Id iapiLowDsp.c $ + * + * Description: + * This library is written in C to guarantee functionality and integrity in + * the usage of SDMA virtual DMA channels. This API (Application Programming + * Interface) allow SDMA channels' access in an OPEN, READ, WRITE, CLOSE + * fashion. + * These are the LOW level functions of the I.API specific to MCU. + * + * + * + * + * $Log iapiLowDsp.c $ + * + *****************************************************************************/ + +/* **************************************************************************** + * Include File Section + *****************************************************************************/ +#include "epm.h" +#include "iapiLow.h" + +/* **************************************************************************** + * Function Section + *****************************************************************************/ +#ifdef DSP + +/* ***************************************************************************/ +/**Starts the channel (core specific register) + * + * Algorithm:\n + * - Bit numbered "channel" of DspEnStartReg register is set + * + * @param channel channel to start + * + * @return none + */ +void +iapi_lowStartChannel (unsigned char channel) +{ + SDMA_D_START |= (1 << channel); +} + +/* ***************************************************************************/ +/**Stops the channel (core specific register) + * + * Algorithm: + * - Bit numbered "channel" of DspEnStopReg register is cleared + * + * Notes:\n + * - This is a write one to clear register + * + * @param channel channel to stop + * + * @return none + */ +void +iapi_lowStopChannel (unsigned char channel) +{ + SDMA_D_STATSTOP &= (1 << channel); +} + +#endif /* DSP */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/devices.c @@ -0,0 +1,804 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "iomux.h" +#include "sdma_script_code.h" +#include "sdma_script_code_v2.h" +#include "board-mx35_3stack.h" + +void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_addr) +{ + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = -1; + + sdma_script_addr->mxc_sdma_uart_2_per_addr = uart_2_per_ADDR; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_app_addr = per_2_app_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR; + + sdma_script_addr->mxc_sdma_per_2_per_addr = p_2_p_ADDR; + + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = + uartsh_2_per_ADDR; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = + uartsh_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_shp_addr = per_2_shp_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR; + + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR; + + sdma_script_addr->mxc_sdma_app_2_per_addr = app_2_per_ADDR; + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_shp_2_per_addr = shp_2_per_ADDR; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR; + + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = -1; + + sdma_script_addr->mxc_sdma_spdif_2_mcu_addr = spdif_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_spdif_addr = mcu_2_spdif_ADDR; + + sdma_script_addr->mxc_sdma_asrc_2_mcu_addr = asrc__mcu_ADDR; + + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = -1; + sdma_script_addr->mxc_sdma_ext_mem_2_ipu_addr = + ext_mem__ipu_ram_ADDR; + sdma_script_addr->mxc_sdma_descrambler_addr = -1; + + sdma_script_addr->mxc_sdma_start_addr = + (unsigned short *)sdma_code; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; + sdma_script_addr->mxc_sdma_ram_code_start_addr = + RAM_CODE_START_ADDR; + } else { + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR_V2; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = -1; + + sdma_script_addr->mxc_sdma_uart_2_per_addr = uart_2_per_ADDR_V2; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR_V2; + sdma_script_addr->mxc_sdma_per_2_app_addr = per_2_app_ADDR_V2; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR_V2; + + sdma_script_addr->mxc_sdma_per_2_per_addr = p_2_p_ADDR_V2; + + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = + uartsh_2_per_ADDR_V2; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = + uartsh_2_mcu_ADDR_V2; + sdma_script_addr->mxc_sdma_per_2_shp_addr = per_2_shp_ADDR_V2; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR_V2; + + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR_V2; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR_V2; + + sdma_script_addr->mxc_sdma_app_2_per_addr = app_2_per_ADDR_V2; + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR_V2; + sdma_script_addr->mxc_sdma_shp_2_per_addr = shp_2_per_ADDR_V2; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR_V2; + + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = -1; + + sdma_script_addr->mxc_sdma_spdif_2_mcu_addr = + spdif_2_mcu_ADDR_V2; + sdma_script_addr->mxc_sdma_mcu_2_spdif_addr = + mcu_2_spdif_ADDR_V2; + + sdma_script_addr->mxc_sdma_asrc_2_mcu_addr = asrc__mcu_ADDR_V2; + + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = -1; + sdma_script_addr->mxc_sdma_ext_mem_2_ipu_addr = + ext_mem__ipu_ram_ADDR_V2; + sdma_script_addr->mxc_sdma_descrambler_addr = -1; + + sdma_script_addr->mxc_sdma_start_addr = + (unsigned short *)sdma_code_v2; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; + sdma_script_addr->mxc_sdma_ram_code_start_addr = + RAM_CODE_START_ADDR_V2; + } +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_RTC_MXC) || defined(CONFIG_RTC_MXC_MODULE) +static struct resource rtc_resources[] = { + { + .start = RTC_BASE_ADDR, + .end = RTC_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_RTC, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device mxc_rtc_device = { + .name = "mxc_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; +static void mxc_init_rtc(void) +{ + (void)platform_device_register(&mxc_rtc_device); +} +#else +static inline void mxc_init_rtc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_MC9SDZ60_RTC) || defined(CONFIG_MXC_MC9SDZ60_RTC_MODULE) +static struct resource pmic_rtc_resources[] = { + { + .start = MXC_PSEUDO_IRQ_RTC, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device pmic_rtc_device = { + .name = "pmic_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(pmic_rtc_resources), + .resource = pmic_rtc_resources, +}; +static void pmic_init_rtc(void) +{ + platform_device_register(&pmic_rtc_device); +} +#else +static void pmic_init_rtc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_WATCHDOG) || defined(CONFIG_MXC_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = WDOG1_BASE_ADDR, + .end = WDOG1_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_wdt_device = { + .name = "mxc_wdt", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void mxc_init_wdt(void) +{ + (void)platform_device_register(&mxc_wdt_device); +} +#else +static inline void mxc_init_wdt(void) +{ +} +#endif + +#if defined(CONFIG_MXC_IPU) || defined(CONFIG_MXC_IPU_MODULE) +static struct mxc_ipu_config mxc_ipu_data = { + .rev = 2, +}; + +static struct resource ipu_resources[] = { + { + .start = IPU_CTRL_BASE_ADDR, + .end = IPU_CTRL_BASE_ADDR + SZ_4K, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_IPU_SYN, + .flags = IORESOURCE_IRQ, + }, + { + .start = MXC_INT_IPU_ERR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxc_ipu_device = { + .name = "mxc_ipu", + .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ipu_data, + }, + .num_resources = ARRAY_SIZE(ipu_resources), + .resource = ipu_resources, +}; + +static void mxc_init_ipu(void) +{ + platform_device_register(&mxc_ipu_device); +} +#else +static inline void mxc_init_ipu(void) +{ +} +#endif + +/* SPI controller and device data */ +#if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) + +#ifdef CONFIG_SPI_MXC_SELECT1 +/*! + * Resource definition for the CSPI1 + */ +static struct resource mxcspi1_resources[] = { + [0] = { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI1 */ +static struct mxc_spi_master mxcspi1_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI1 */ +static struct platform_device mxcspi1_device = { + .name = "mxc_spi", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi1_data, + }, + .num_resources = ARRAY_SIZE(mxcspi1_resources), + .resource = mxcspi1_resources, +}; + +#endif /* CONFIG_SPI_MXC_SELECT1 */ + +#ifdef CONFIG_SPI_MXC_SELECT2 +/*! + * Resource definition for the CSPI2 + */ +static struct resource mxcspi2_resources[] = { + [0] = { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI2 */ +static struct mxc_spi_master mxcspi2_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI2 */ +static struct platform_device mxcspi2_device = { + .name = "mxc_spi", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi2_data, + }, + .num_resources = ARRAY_SIZE(mxcspi2_resources), + .resource = mxcspi2_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT2 */ + +static inline void mxc_init_spi(void) +{ + /* SPBA configuration for CSPI2 - MCU is set */ + spba_take_ownership(SPBA_CSPI2, SPBA_MASTER_A); +#ifdef CONFIG_SPI_MXC_SELECT1 + if (platform_device_register(&mxcspi1_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_1\n"); +#endif /* CONFIG_SPI_MXC_SELECT1 */ +#ifdef CONFIG_SPI_MXC_SELECT2 + if (platform_device_register(&mxcspi2_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_2\n"); +#endif /* CONFIG_SPI_MXC_SELECT2 */ +} +#else +static inline void mxc_init_spi(void) +{ +} +#endif + +/* I2C controller and device data */ +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +/*! + * Resource definition for the I2C1 + */ +static struct resource mxci2c1_resources[] = { + [0] = { + .start = I2C_BASE_ADDR, + .end = I2C_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C, + .end = MXC_INT_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c1_data = { + .i2c_clk = 100000, +}; +#endif + +/*! + * Resource definition for the I2C2 + */ +static struct resource mxci2c2_resources[] = { + [0] = { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c2_data = { + .i2c_clk = 100000, +}; + +#ifdef CONFIG_I2C_MXC_SELECT3 +/*! + * Resource definition for the I2C3 + */ +static struct resource mxci2c3_resources[] = { + [0] = { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c3_data = { + .i2c_clk = 100000, +}; +#endif + +/*! Device Definition for MXC I2C1 */ +static struct platform_device mxci2c_devices[] = { +#ifdef CONFIG_I2C_MXC_SELECT1 + { + .name = "mxc_i2c", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c1_data, + }, + .num_resources = ARRAY_SIZE(mxci2c1_resources), + .resource = mxci2c1_resources,}, +#endif + { + .name = "mxc_i2c_slave", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c2_data, + }, + .num_resources = ARRAY_SIZE(mxci2c2_resources), + .resource = mxci2c2_resources,}, +#ifdef CONFIG_I2C_MXC_SELECT3 + { + .name = "mxc_i2c", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c3_data, + }, + .num_resources = ARRAY_SIZE(mxci2c3_resources), + .resource = mxci2c3_resources,}, +#endif +}; + +static inline void mxc_init_i2c(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxci2c_devices); i++) { + if (platform_device_register(&mxci2c_devices[i]) < 0) + dev_err(&mxci2c_devices[i].dev, + "Unable to register I2C device\n"); + } +} +#else +static inline void mxc_init_i2c(void) +{ +} +#endif + +struct mxc_gpio_port mxc_gpio_ports[] = { + [0] = { + .chip.label = "gpio-0", + .base = IO_ADDRESS(GPIO1_BASE_ADDR), + .irq = MXC_INT_GPIO1, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + }, + [1] = { + .chip.label = "gpio-1", + .base = IO_ADDRESS(GPIO2_BASE_ADDR), + .irq = MXC_INT_GPIO2, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 + }, + [2] = { + .chip.label = "gpio-2", + .base = IO_ADDRESS(GPIO3_BASE_ADDR), + .irq = MXC_INT_GPIO3, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 + } +}; + +int __init mxc_register_gpios(void) +{ + return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); +} + +static struct platform_device mxc_dma_device = { + .name = "mxc_dma", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_dma(void) +{ + (void)platform_device_register(&mxc_dma_device); +} + +static struct resource spdif_resources[] = { + { + .start = SPDIF_BASE_ADDR, + .end = SPDIF_BASE_ADDR + 0x50, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_spdif_platform_data mxc_spdif_data = { + .spdif_tx = 1, + .spdif_rx = 1, + .spdif_clk_44100 = 3, /* spdif_ext_clk source for 44.1KHz */ + .spdif_clk_48000 = 0, /* audio osc source */ + .spdif_clkid = 0, + .spdif_clk = NULL, /* spdif bus clk */ +}; + +static struct platform_device mxc_alsa_spdif_device = { + .name = "mxc_alsa_spdif", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_spdif_data, + }, + .num_resources = ARRAY_SIZE(spdif_resources), + .resource = spdif_resources, +}; + +static inline void mxc_init_spdif(void) +{ + mxc_spdif_data.spdif_clk = clk_get(NULL, "spdif_ipg_clk"); + clk_put(mxc_spdif_data.spdif_clk); + mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_clk"); + clk_put(mxc_spdif_data.spdif_core_clk); + mxc_spdif_data.spdif_audio_clk = clk_get(NULL, "spdif_audio_clk"); + clk_put(mxc_spdif_data.spdif_audio_clk); + platform_device_register(&mxc_alsa_spdif_device); +} + +static struct platform_device mxc_alsa_surround_device = { + .name = "imx-3stack-wm8580", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static void mxc_init_surround_audio(void) +{ + platform_device_register(&mxc_alsa_surround_device); +} + +static struct mxc_audio_platform_data mxc_bt_audio_data; + +static struct platform_device mxc_bt_alsa_device = { + .name = "imx-3stack-bt", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_bt_audio_data, + }, + +}; + +static void mxc_init_bt_audio(void) +{ + mxc_bt_audio_data.src_port = 2; + mxc_bt_audio_data.ext_port = 5; + mxc_bt_audio_data.ext_ram = 1; + platform_device_register(&mxc_bt_alsa_device); +} + +static struct resource asrc_resources[] = { + { + .start = ASRC_BASE_ADDR, + .end = ASRC_BASE_ADDR + 0x9C, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_asrc_platform_data mxc_asrc_data; + +static struct platform_device mxc_asrc_device = { + .name = "mxc_asrc", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_asrc_data, + }, + .num_resources = ARRAY_SIZE(asrc_resources), + .resource = asrc_resources, +}; + +static inline void mxc_init_asrc(void) +{ + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) + mxc_asrc_data.channel_bits = 3; + else + mxc_asrc_data.channel_bits = 4; + + mxc_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); + clk_put(mxc_asrc_data.asrc_core_clk); + mxc_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_audio_clk"); + clk_set_rate(mxc_asrc_data.asrc_audio_clk, 768000); + clk_put(mxc_asrc_data.asrc_audio_clk); + platform_device_register(&mxc_asrc_device); +} + +#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) + +static struct resource flexcan1_resources[] = { + { + .start = CAN1_BASE_ADDR, + .end = CAN1_BASE_ADDR + 0x97F, + .flags = IORESOURCE_MEM,}, + { + .start = MXC_INT_CAN1, + .end = MXC_INT_CAN1, + .flags = IORESOURCE_IRQ,} +}; + +static struct resource flexcan2_resources[] = { + { + .start = CAN2_BASE_ADDR, + .end = CAN2_BASE_ADDR + 0x97F, + .flags = IORESOURCE_MEM,}, + { + .start = MXC_INT_CAN2, + .end = MXC_INT_CAN2, + .flags = IORESOURCE_IRQ,} +}; + +static struct platform_device flexcan_devices[] = { + { + .name = "FlexCAN", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &flexcan_data[0], + }, + .num_resources = ARRAY_SIZE(flexcan1_resources), + .resource = flexcan1_resources,}, + { + .name = "FlexCAN", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &flexcan_data[1], + }, + .num_resources = ARRAY_SIZE(flexcan2_resources), + .resource = flexcan2_resources,}, +}; + +static inline void mxc_init_flexcan(void) +{ + platform_device_register(&flexcan_devices[0]); + platform_device_register(&flexcan_devices[1]); +} +#else +static inline void mxc_init_flexcan(void) +{ +} +#endif + +#if defined(CONFIG_HW_RANDOM_FSL_RNGC) || \ +defined(CONFIG_HW_RANDOM_FSL_RNGC_MODULE) +static struct resource rngc_resources[] = { + { + .start = RNGC_BASE_ADDR, + .end = RNGC_BASE_ADDR + 0x34, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_RNG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device fsl_rngc_device = { + .name = "fsl_rngc", + .id = -1, + .num_resources = ARRAY_SIZE(rngc_resources), + .resource = rngc_resources, +}; + +static inline void mxc_init_rngc(void) +{ + platform_device_register(&fsl_rngc_device); +} +#else +static inline void mxc_init_rngc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_IIM) || defined(CONFIG_MXC_IIM_MODULE) +static struct resource mxc_iim_resources[] = { + { + .start = IIM_BASE_ADDR, + .end = IIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_iim_device = { + .name = "mxc_iim", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_iim_resources), + .resource = mxc_iim_resources +}; + +static inline void mxc_init_iim(void) +{ + if (platform_device_register(&mxc_iim_device) < 0) + dev_err(&mxc_iim_device.dev, + "Unable to register mxc iim device\n"); +} +#else +static inline void mxc_init_iim(void) +{ +} +#endif + +static struct resource mxc_gpu_resources[] = { + { + .start = MXC_INT_GPU2D, + .end = MXC_INT_GPU2D, + .name = "gpu_2d_irq", + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device gpu_device = { + .name = "mxc_gpu", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_gpu_resources), + .resource = mxc_gpu_resources, +}; + +static void __init mxc_init_gpu(void) +{ + platform_device_register(&gpu_device); +} + +int __init mxc_init_devices(void) +{ + mxc_init_wdt(); + mxc_init_ipu(); + mxc_init_spi(); + mxc_init_i2c(); + pmic_init_rtc(); + mxc_init_rtc(); + mxc_init_dma(); + mxc_init_bt_audio(); + mxc_init_spdif(); + mxc_init_surround_audio(); + mxc_init_asrc(); + mxc_init_flexcan(); + mxc_init_rngc(); + mxc_init_iim(); + mxc_init_gpu(); + + /* SPBA configuration for SSI2 - SDMA and MCU are set */ + spba_take_ownership(SPBA_SSI2, SPBA_MASTER_C | SPBA_MASTER_A); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/sdma_script_code.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/sdma_script_code.h @@ -0,0 +1,254 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/******************************************************************************* + + SDMA RELEASE LABEL: "SS15_RINGO" + +*******************************************************************************/ + +#ifndef __SDMA_SCRIPT_CODE_H__ +#define __SDMA_SCRIPT_CODE_H__ + +/*! +* SDMA ROM scripts start addresses and sizes +*/ + +#define start_ADDR 0 +#define start_SIZE 22 + +#define core_ADDR 80 +#define core_SIZE 232 + +#define common_ADDR 312 +#define common_SIZE 330 + +#define ap_2_ap_ADDR 642 +#define ap_2_ap_SIZE 41 + +#define app_2_mcu_ADDR 683 +#define app_2_mcu_SIZE 64 + +#define mcu_2_app_ADDR 747 +#define mcu_2_app_SIZE 70 + +#define uart_2_mcu_ADDR 817 +#define uart_2_mcu_SIZE 75 + +#define shp_2_mcu_ADDR 892 +#define shp_2_mcu_SIZE 69 + +#define mcu_2_shp_ADDR 961 +#define mcu_2_shp_SIZE 72 + +#define per_2_shp_ADDR 1033 +#define per_2_shp_SIZE 78 + +#define shp_2_per_ADDR 1111 +#define shp_2_per_SIZE 72 + +#define uartsh_2_mcu_ADDR 1183 +#define uartsh_2_mcu_SIZE 69 + +#define mcu_2_ata_ADDR 1252 +#define mcu_2_ata_SIZE 81 + +#define ata_2_mcu_ADDR 1333 +#define ata_2_mcu_SIZE 96 + +#define loop_DMAs_routines_ADDR 1429 +#define loop_DMAs_routines_SIZE 227 + +#define test_ADDR 1656 +#define test_SIZE 63 + +#define signature_ADDR 1023 +#define signature_SIZE 1 + +/*! +* SDMA RAM scripts start addresses and sizes +*/ + +#define app_2_per_ADDR 6144 +#define app_2_per_SIZE 66 + +#define asrc__mcu_ADDR 6210 +#define asrc__mcu_SIZE 114 + +#define ext_mem__ipu_ram_ADDR 6324 +#define ext_mem__ipu_ram_SIZE 123 + +#define mcu_2_spdif_ADDR 6447 +#define mcu_2_spdif_SIZE 103 + +#define p_2_p_ADDR 6550 +#define p_2_p_SIZE 254 + +#define per_2_app_ADDR 6804 +#define per_2_app_SIZE 74 + +#define spdif_2_mcu_ADDR 6878 +#define spdif_2_mcu_SIZE 47 + +#define uart_2_per_ADDR 6925 +#define uart_2_per_SIZE 73 + +#define uartsh_2_per_ADDR 6998 +#define uartsh_2_per_SIZE 67 + +/*! +* SDMA RAM image start address and size +*/ + +#define RAM_CODE_START_ADDR 6144 +#define RAM_CODE_SIZE 921 + +/*! +* Buffer that holds the SDMA RAM image +*/ +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static const short sdma_code[] = { + 0xc1e3, 0x57db, 0x52fb, 0x6ac3, 0x52f3, 0x6ad7, 0x008f, 0x00d5, + 0x7d01, 0x008d, 0x05a0, 0x0478, 0x7d03, 0x0479, 0x7d1c, 0x7c21, + 0x0479, 0x7c14, 0x6ddd, 0x56ee, 0x62c8, 0x7e28, 0x0660, 0x7d02, + 0x0210, 0x0212, 0x6ac8, 0x7f22, 0x0212, 0x6ac8, 0x7f1f, 0x0212, + 0x6ac8, 0x7f1c, 0x2003, 0x4800, 0x7cef, 0x9836, 0x6ddd, 0x7802, + 0x62c8, 0x6ac8, 0x9835, 0x6dde, 0x0015, 0x7802, 0x62c8, 0x6ac8, + 0x9835, 0x0015, 0x0015, 0x7801, 0x62d8, 0x7c08, 0x6ddf, 0x7f06, + 0x0000, 0x4d00, 0x7d05, 0xc1fa, 0x57db, 0x9806, 0xc273, 0x0454, + 0xc20a, 0x9801, 0xc1d9, 0xc1e3, 0x56f3, 0x57db, 0x047a, 0x7d07, + 0x072f, 0x076e, 0x7d02, 0x6ec7, 0x9855, 0x6ed7, 0x9855, 0x074f, + 0x076e, 0x7d02, 0x6e01, 0x9855, 0x6e05, 0x5ce3, 0x048f, 0x0410, + 0x3c0f, 0x5c93, 0x0eff, 0x06bf, 0x06d5, 0x7d01, 0x068d, 0x05a6, + 0x5deb, 0x55fb, 0x008e, 0x0768, 0x7d02, 0x0769, 0x7c04, 0x06d4, + 0x7d01, 0x008c, 0x04a0, 0x06a0, 0x076f, 0x7d0c, 0x076e, 0x7d05, + 0x7802, 0x62c8, 0x5a05, 0x7c2b, 0x9887, 0x7802, 0x5205, 0x6ac8, + 0x7c26, 0x9887, 0x076e, 0x7d05, 0x7802, 0x620b, 0x5a05, 0x7c21, + 0x9887, 0x7802, 0x5205, 0x6a0b, 0x7c1c, 0x6a28, 0x7f1a, 0x0768, + 0x7d02, 0x0769, 0x7c0a, 0x4c00, 0x7c08, 0x0768, 0x7d03, 0x5a05, + 0x7f11, 0x9894, 0x5205, 0x7e0e, 0x5493, 0x4e00, 0x7ccb, 0x0000, + 0x54e3, 0x55eb, 0x4d00, 0x7d0a, 0xc1fa, 0x57db, 0x9856, 0x68cc, + 0x98a2, 0x680c, 0x009e, 0x0007, 0x54e3, 0xd8a8, 0xc20a, 0x9844, + 0x55eb, 0x009d, 0x058c, 0x0aff, 0x0211, 0x1aff, 0x05ba, 0x05a0, + 0x04b2, 0x04ad, 0x0454, 0x0006, 0x0e70, 0x0611, 0x5616, 0xc13c, + 0x7d2a, 0x5ade, 0x008e, 0xc14e, 0x7c26, 0x5be0, 0x5ef0, 0x5ce8, + 0x0688, 0x08ff, 0x0011, 0x28ff, 0x00bc, 0x53f6, 0x05df, 0x7d0b, + 0x6dc5, 0x03df, 0x7d03, 0x6bd5, 0xd903, 0x98df, 0x6b05, 0xc5f5, + 0x7e27, 0x7f29, 0x98df, 0x6d01, 0x03df, 0x7d05, 0x6bd5, 0xc61f, + 0x7e18, 0x7f1a, 0x98df, 0x6b05, 0xc595, 0x7e07, 0x7f06, 0x52de, + 0x53e6, 0xc159, 0x7dd7, 0x0200, 0x98b7, 0x0007, 0x6004, 0x680c, + 0x53f6, 0x028e, 0x00a3, 0xc256, 0x048b, 0x0498, 0x0454, 0x068a, + 0x98df, 0x0207, 0x680c, 0x6ddf, 0x0107, 0x68ff, 0x60d0, 0x98e8, + 0x0207, 0x68ff, 0x6d28, 0x0107, 0x6004, 0x680c, 0x98e8, 0x0007, + 0x68ff, 0x60d0, 0x98e8, 0x0288, 0x03a5, 0x3b03, 0x3d03, 0x4d00, + 0x7d0a, 0x0804, 0x00a5, 0x00da, 0x7d1a, 0x02a0, 0x7b01, 0x65d8, + 0x7eee, 0x65ff, 0x7eec, 0x0804, 0x02d0, 0x7d11, 0x4b00, 0x7c0f, + 0x008a, 0x3003, 0x6dcf, 0x6bdf, 0x0015, 0x0015, 0x7b02, 0x65d8, + 0x0000, 0x7edd, 0x63ff, 0x7edb, 0x3a03, 0x6dcd, 0x6bdd, 0x008a, + 0x7b02, 0x65d8, 0x0000, 0x7ed3, 0x65ff, 0x7ed1, 0x0006, 0xc1d9, + 0xc1e3, 0x57db, 0x52f3, 0x047a, 0x7d06, 0x0479, 0x7c02, 0x6ac6, + 0x993c, 0x6ac7, 0x993c, 0x6a01, 0x008f, 0x00d5, 0x7d01, 0x008d, + 0x05a0, 0x5deb, 0x56fb, 0x0478, 0x7d4e, 0x0479, 0x7c1f, 0x0015, + 0x0388, 0x047a, 0x7d03, 0x62c8, 0x7e39, 0x9950, 0x620a, 0x7e38, + 0x0808, 0x7801, 0x0217, 0x5a06, 0x7f34, 0x2301, 0x047a, 0x7d03, + 0x62c8, 0x7e2c, 0x995d, 0x620a, 0x7e2b, 0x0808, 0x7801, 0x0217, + 0x5a26, 0x7f27, 0x2301, 0x4b00, 0x7ce4, 0x997c, 0x0015, 0x0015, + 0x0015, 0x047a, 0x7d09, 0x7806, 0x0b00, 0x62c8, 0x5a06, 0x0b01, + 0x62c8, 0x5a26, 0x7c13, 0x997c, 0x7806, 0x0b00, 0x620b, 0x5a06, + 0x0b01, 0x620b, 0x5a26, 0x7c0c, 0x0b70, 0x0311, 0x5313, 0x0000, + 0x55eb, 0x4d00, 0x7d11, 0xc1fa, 0x57db, 0x993c, 0x68cc, 0x9989, + 0x680c, 0x0007, 0x0479, 0x7c02, 0x008b, 0x9990, 0x0017, 0x00a3, + 0x0b70, 0x0311, 0x5313, 0xc213, 0xc20a, 0x9931, 0x0b70, 0x0311, + 0x5313, 0x076c, 0x7c01, 0xc1d9, 0x5efb, 0x068a, 0x076b, 0x7c01, + 0xc1d9, 0x5ef3, 0x59db, 0x58d3, 0x018f, 0x0110, 0x390f, 0x008b, + 0xc13c, 0x7d2b, 0x5ac0, 0x5bc8, 0xc14e, 0x7c27, 0x0388, 0x0689, + 0x5ce3, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x073e, 0x4d00, 0x7d18, + 0x0870, 0x0011, 0x077e, 0x7d09, 0x077d, 0x7d02, 0x5228, 0x99c1, + 0x52f8, 0x54db, 0x02bc, 0x02cc, 0x7c09, 0x077c, 0x7d02, 0x5228, + 0x99ca, 0x52f8, 0x54d3, 0x02bc, 0x02cc, 0x7d09, 0x0400, 0x99b8, + 0x008b, 0x52c0, 0x53c8, 0xc159, 0x7dd6, 0x0200, 0x99a8, 0x08ff, + 0x00bf, 0x077f, 0x7d15, 0x0488, 0x00d5, 0x7d01, 0x008d, 0x05a0, + 0x5deb, 0x028f, 0x0212, 0x0212, 0x3aff, 0x05da, 0x7c02, 0x073e, + 0x99f3, 0x02a4, 0x02dd, 0x7d02, 0x073e, 0x99f3, 0x075e, 0x99f3, + 0x55eb, 0x0598, 0x5deb, 0x52f3, 0x54fb, 0x076a, 0x7d26, 0x076c, + 0x7d01, 0x9a30, 0x076b, 0x7c57, 0x0769, 0x7d04, 0x0768, 0x7d02, + 0x0e01, 0x9a0a, 0x5893, 0x00d6, 0x7d01, 0x008e, 0x5593, 0x05a0, + 0x5d93, 0x06a0, 0x7802, 0x5502, 0x5d04, 0x7c1d, 0x4e00, 0x7c08, + 0x0769, 0x7d03, 0x5502, 0x7e17, 0x9a17, 0x5d04, 0x7f14, 0x0689, + 0x5093, 0x4800, 0x7d01, 0x9a02, 0x9a7b, 0x0015, 0x7806, 0x5502, + 0x5d04, 0x074f, 0x5502, 0x5d24, 0x072f, 0x7c01, 0x9a7b, 0x0017, + 0x076f, 0x7c01, 0x2001, 0x5593, 0x009d, 0x0007, 0xda82, 0x99d0, + 0x6cd3, 0x0769, 0x7d04, 0x0768, 0x7d02, 0x0e01, 0x9a3f, 0x5893, + 0x00d6, 0x7d01, 0x008e, 0x5593, 0x05a0, 0x5d93, 0x06a0, 0x7802, + 0x5502, 0x6dc8, 0x7c0f, 0x4e00, 0x7c08, 0x0769, 0x7d03, 0x5502, + 0x7e09, 0x9a4c, 0x6dc8, 0x7f06, 0x0689, 0x5093, 0x4800, 0x7d01, + 0x9a37, 0x9a7b, 0x9a75, 0x6ac3, 0x0769, 0x7d04, 0x0768, 0x7d02, + 0x0e01, 0x9a62, 0x5893, 0x00d6, 0x7d01, 0x008e, 0x5593, 0x05a0, + 0x5d93, 0x06a0, 0x7802, 0x65c8, 0x5d04, 0x7c0f, 0x4e00, 0x7c08, + 0x0769, 0x7d03, 0x65c8, 0x7e09, 0x9a6f, 0x5d04, 0x7f06, 0x0689, + 0x5093, 0x4800, 0x7d01, 0x9a5a, 0x9a7b, 0x5593, 0x009d, 0x0007, + 0x6cff, 0xda82, 0x99d0, 0x0000, 0x54e3, 0x55eb, 0x4d00, 0x7c01, + 0x99d0, 0x99b8, 0x54e3, 0x55eb, 0x0aff, 0x0211, 0x1aff, 0x077f, + 0x7c02, 0x05a0, 0x9a8f, 0x009d, 0x058c, 0x05ba, 0x05a0, 0x0210, + 0x04ba, 0x04ad, 0x0454, 0x0006, 0xc1e3, 0x57db, 0x52f3, 0x6ac5, + 0x52fb, 0x6ad3, 0x008f, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5deb, + 0x0478, 0x7d03, 0x0479, 0x7d20, 0x7c25, 0x0479, 0x7c19, 0x59e3, + 0x56ee, 0x61c8, 0x7e2e, 0x62c8, 0x7e2c, 0x65c8, 0x7e2a, 0x0660, + 0x7d03, 0x0112, 0x0112, 0x9ab6, 0x0512, 0x0512, 0x0211, 0x02a9, + 0x02ad, 0x6ac8, 0x7f1e, 0x2003, 0x4800, 0x7ceb, 0x51e3, 0x9ad0, + 0x7802, 0x62c8, 0x6ac8, 0x9acf, 0x6dce, 0x0015, 0x7802, 0x62c8, + 0x6ac8, 0x9acf, 0x6dcf, 0x0015, 0x0015, 0x7801, 0x62d8, 0x7c09, + 0x6ddf, 0x7f07, 0x0000, 0x55eb, 0x4d00, 0x7d06, 0xc1fa, 0x57db, + 0x9a9a, 0x0007, 0x68ff, 0xc213, 0xc20a, 0x9a95, 0xc1d9, 0xc1e3, + 0x57db, 0x52f3, 0x047a, 0x7d02, 0x6ad7, 0x9ae7, 0x6a05, 0x008f, + 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x56fb, 0x0015, 0x0015, 0x0015, + 0x047a, 0x7d07, 0x7804, 0x5206, 0x6ac8, 0x5226, 0x6ac8, 0x7c0f, + 0x9b01, 0x7804, 0x5206, 0x6a0b, 0x5226, 0x6a0b, 0x7c0a, 0x6a28, + 0x7f08, 0x0000, 0x4d00, 0x7d07, 0xc1fa, 0x57db, 0x9ae7, 0xc273, + 0x9b0a, 0xc277, 0x0454, 0xc20a, 0x9ae0, 0xc1e3, 0x57db, 0x52f3, + 0x6ad5, 0x56fb, 0x028e, 0x1a94, 0x6ac3, 0x62c8, 0x0269, 0x7d1e, + 0x1e94, 0x6ee3, 0x62d0, 0x5aeb, 0x62c8, 0x0248, 0x6ed3, 0x6ac8, + 0x2694, 0x52eb, 0x6ad5, 0x6ee3, 0x62c8, 0x026e, 0x7d27, 0x6ac8, + 0x7f23, 0x2501, 0x4d00, 0x7d26, 0x028e, 0x1a98, 0x6ac3, 0x62c8, + 0x6ec3, 0x0260, 0x7df1, 0x62d0, 0xc27a, 0x9b52, 0x6ee3, 0x008f, + 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x62c8, 0x026e, 0x7d0e, + 0x6ac8, 0x7f0a, 0x2001, 0x7cf9, 0x6add, 0x7f06, 0x0000, 0x4d00, + 0x7d09, 0xc1fa, 0x57db, 0x9b11, 0x0007, 0x6aff, 0x62d0, 0xc27a, + 0x0458, 0x0454, 0x6add, 0x7ff8, 0xc20a, 0x9b0e, 0xc1d9, 0xc1e3, + 0x57db, 0x52f3, 0x6ad5, 0x56fb, 0x028e, 0x1a94, 0x5202, 0x0269, + 0x7d17, 0x1e94, 0x5206, 0x0248, 0x5a06, 0x2694, 0x5206, 0x026e, + 0x7d26, 0x6ac8, 0x7f22, 0x2501, 0x4d00, 0x7d27, 0x028e, 0x1a98, + 0x5202, 0x0260, 0x7df3, 0x6add, 0x7f18, 0x62d0, 0xc27a, 0x9b95, + 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5206, 0x026e, + 0x7d0e, 0x6ac8, 0x7f0a, 0x2001, 0x7cf9, 0x6add, 0x7f06, 0x0000, + 0x4d00, 0x7d0b, 0xc1fa, 0x57db, 0x9b5b, 0x0007, 0x6aff, 0x6add, + 0x7ffc, 0x62d0, 0xc27a, 0x0458, 0x0454, 0x6add, 0x7ff6, 0xc20a, + 0x9b58 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/Makefile.boot +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/Makefile.boot @@ -0,0 +1,9 @@ +ifeq ($(CONFIG_MACH_MX35EVB), y) + zreladdr-y := 0x90008000 +params_phys-y := 0x90000100 +initrd_phys-y := 0x90800000 +else + zreladdr-y := 0x80008000 +params_phys-y := 0x80000100 +initrd_phys-y := 0x80800000 +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/sdma_script_code_v2.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/sdma_script_code_v2.h @@ -0,0 +1,234 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/******************************************************************************* + + SDMA RELEASE LABEL: "SDMA_RINGO.03.00.00" + +*******************************************************************************/ + +#ifndef SDMA_SCRIPT_CODE_V2_H +#define SDMA_SCRIPT_CODE_V2_H + +/*! +* SDMA ROM scripts start addresses and sizes +*/ + +#define start_ADDR_V2 0 +#define start_SIZE_V2 24 + +#define core_ADDR_V2 80 +#define core_SIZE_V2 233 + +#define common_ADDR_V2 313 +#define common_SIZE_V2 416 + +#define ap_2_ap_ADDR_V2 729 +#define ap_2_ap_SIZE_V2 41 + +#define app_2_mcu_ADDR_V2 770 +#define app_2_mcu_SIZE_V2 64 + +#define mcu_2_app_ADDR_V2 834 +#define mcu_2_app_SIZE_V2 70 + +#define uart_2_mcu_ADDR_V2 904 +#define uart_2_mcu_SIZE_V2 75 + +#define shp_2_mcu_ADDR_V2 979 +#define shp_2_mcu_SIZE_V2 69 + +#define mcu_2_shp_ADDR_V2 1048 +#define mcu_2_shp_SIZE_V2 72 + +#define per_2_shp_ADDR_V2 1120 +#define per_2_shp_SIZE_V2 78 + +#define shp_2_per_ADDR_V2 1198 +#define shp_2_per_SIZE_V2 72 + +#define uartsh_2_mcu_ADDR_V2 1270 +#define uartsh_2_mcu_SIZE_V2 69 + +#define mcu_2_ata_ADDR_V2 1339 +#define mcu_2_ata_SIZE_V2 90 + +#define ata_2_mcu_ADDR_V2 1429 +#define ata_2_mcu_SIZE_V2 102 + +#define app_2_per_ADDR_V2 1531 +#define app_2_per_SIZE_V2 66 + +#define per_2_app_ADDR_V2 1597 +#define per_2_app_SIZE_V2 74 + +#define loop_DMAs_routines_ADDR_V2 1671 +#define loop_DMAs_routines_SIZE_V2 240 + +#define test_ADDR_V2 1911 +#define test_SIZE_V2 63 + +#define signature_ADDR_V2 1022 +#define signature_SIZE_V2 1 + +/*! +* SDMA RAM scripts start addresses and sizes +*/ + +#define asrc__mcu_ADDR_V2 6144 +#define asrc__mcu_SIZE_V2 116 + +#define ext_mem__ipu_ram_ADDR_V2 6260 +#define ext_mem__ipu_ram_SIZE_V2 123 + +#define mcu_2_spdif_ADDR_V2 6383 +#define mcu_2_spdif_SIZE_V2 103 + +#define p_2_p_ADDR_V2 6486 +#define p_2_p_SIZE_V2 260 + +#define spdif_2_mcu_ADDR_V2 6746 +#define spdif_2_mcu_SIZE_V2 47 + +#define uart_2_per_ADDR_V2 6793 +#define uart_2_per_SIZE_V2 73 + +#define uartsh_2_per_ADDR_V2 6866 +#define uartsh_2_per_SIZE_V2 67 + +/*! +* SDMA RAM image start address and size +*/ + +#define RAM_CODE_START_ADDR_V2 6144 +#define RAM_CODE_SIZE_V2 789 + +/*! +* Buffer that holds the SDMA RAM image +*/ + +static const short sdma_code_v2[] = { + 0xc230, 0xc23a, 0x56f3, 0x57db, 0x047a, 0x7d07, 0x072f, 0x076e, + 0x7d02, 0x6ec7, 0x9813, 0x6ed7, 0x9813, 0x074f, 0x076e, 0x7d02, + 0x6e01, 0x9813, 0x6e05, 0x5ce3, 0x048f, 0x0410, 0x3c0f, 0x5c93, + 0x0e03, 0x0611, 0x1eff, 0x06bf, 0x06d5, 0x7d01, 0x068d, 0x05a6, + 0x5deb, 0x55fb, 0x008e, 0x076a, 0x7d02, 0x076b, 0x7c04, 0x06d4, + 0x7d01, 0x008c, 0x04a0, 0x06a0, 0x076f, 0x7d0c, 0x076e, 0x7d05, + 0x7802, 0x62c8, 0x5a05, 0x7c2b, 0x9847, 0x7802, 0x5205, 0x6ac8, + 0x7c26, 0x9847, 0x076e, 0x7d05, 0x7802, 0x620b, 0x5a05, 0x7c21, + 0x9847, 0x7802, 0x5205, 0x6a0b, 0x7c1c, 0x6a28, 0x7f1a, 0x076a, + 0x7d02, 0x076b, 0x7c0a, 0x4c00, 0x7c08, 0x076a, 0x7d03, 0x5a05, + 0x7f11, 0x9854, 0x5205, 0x7e0e, 0x5493, 0x4e00, 0x7ccb, 0x0000, + 0x54e3, 0x55eb, 0x4d00, 0x7d0a, 0xc251, 0x57db, 0x9814, 0x68cc, + 0x9862, 0x680c, 0x009e, 0x0007, 0x54e3, 0xd868, 0xc261, 0x9802, + 0x55eb, 0x009d, 0x058c, 0x0aff, 0x0211, 0x1aff, 0x05ba, 0x05a0, + 0x04b2, 0x04ad, 0x0454, 0x0006, 0x0e70, 0x0611, 0x5616, 0xc18a, + 0x7d2a, 0x5ade, 0x008e, 0xc19c, 0x7c26, 0x5be0, 0x5ef0, 0x5ce8, + 0x0688, 0x08ff, 0x0011, 0x28ff, 0x00bc, 0x53f6, 0x05df, 0x7d0b, + 0x6dc5, 0x03df, 0x7d03, 0x6bd5, 0xd8c3, 0x989f, 0x6b05, 0xc6e7, + 0x7e27, 0x7f29, 0x989f, 0x6d01, 0x03df, 0x7d05, 0x6bd5, 0xc711, + 0x7e18, 0x7f1a, 0x989f, 0x6b05, 0xc687, 0x7e07, 0x7f06, 0x52de, + 0x53e6, 0xc1a8, 0x7dd7, 0x0200, 0x9877, 0x0007, 0x6004, 0x680c, + 0x53f6, 0x028e, 0x00a3, 0xc2ad, 0x048b, 0x0498, 0x0454, 0x068a, + 0x989f, 0x0207, 0x680c, 0x6ddf, 0x0107, 0x68ff, 0x60d0, 0x98a8, + 0x0207, 0x68ff, 0x6d28, 0x0107, 0x6004, 0x680c, 0x98a8, 0x0007, + 0x68ff, 0x60d0, 0x98a8, 0x0288, 0x03a5, 0x3b03, 0x3d03, 0x4d00, + 0x7d0a, 0x0804, 0x00a5, 0x00da, 0x7d1a, 0x02a0, 0x7b01, 0x65d8, + 0x7eee, 0x65ff, 0x7eec, 0x0804, 0x02d0, 0x7d11, 0x4b00, 0x7c0f, + 0x008a, 0x3003, 0x6dcf, 0x6bdf, 0x0015, 0x0015, 0x7b02, 0x65d8, + 0x0000, 0x7edd, 0x63ff, 0x7edb, 0x3a03, 0x6dcd, 0x6bdd, 0x008a, + 0x7b02, 0x65d8, 0x0000, 0x7ed3, 0x65ff, 0x7ed1, 0x0006, 0xc230, + 0xc23a, 0x57db, 0x52f3, 0x047a, 0x7d06, 0x0479, 0x7c02, 0x6ac6, + 0x98fc, 0x6ac7, 0x98fc, 0x6a01, 0x008f, 0x00d5, 0x7d01, 0x008d, + 0x05a0, 0x5deb, 0x56fb, 0x0478, 0x7d4e, 0x0479, 0x7c1f, 0x0015, + 0x0388, 0x047a, 0x7d03, 0x62c8, 0x7e39, 0x9910, 0x620a, 0x7e38, + 0x0808, 0x7801, 0x0217, 0x5a06, 0x7f34, 0x2301, 0x047a, 0x7d03, + 0x62c8, 0x7e2c, 0x991d, 0x620a, 0x7e2b, 0x0808, 0x7801, 0x0217, + 0x5a26, 0x7f27, 0x2301, 0x4b00, 0x7ce4, 0x993c, 0x0015, 0x0015, + 0x0015, 0x047a, 0x7d09, 0x7806, 0x0b00, 0x62c8, 0x5a06, 0x0b01, + 0x62c8, 0x5a26, 0x7c13, 0x993c, 0x7806, 0x0b00, 0x620b, 0x5a06, + 0x0b01, 0x620b, 0x5a26, 0x7c0c, 0x0b70, 0x0311, 0x5313, 0x0000, + 0x55eb, 0x4d00, 0x7d11, 0xc251, 0x57db, 0x98fc, 0x68cc, 0x9949, + 0x680c, 0x0007, 0x0479, 0x7c02, 0x008b, 0x9950, 0x0017, 0x00a3, + 0x0b70, 0x0311, 0x5313, 0xc26a, 0xc261, 0x98f1, 0x0b70, 0x0311, + 0x5313, 0x076c, 0x7c01, 0xc230, 0x5efb, 0x068a, 0x076b, 0x7c01, + 0xc230, 0x5ef3, 0x59db, 0x58d3, 0x018f, 0x0110, 0x390f, 0x008b, + 0xc18a, 0x7d2b, 0x5ac0, 0x5bc8, 0xc19c, 0x7c27, 0x0388, 0x0689, + 0x5ce3, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x073e, 0x4d00, 0x7d18, + 0x0870, 0x0011, 0x077e, 0x7d09, 0x077d, 0x7d02, 0x5228, 0x9981, + 0x52f8, 0x54db, 0x02bc, 0x02cc, 0x7c09, 0x077c, 0x7d02, 0x5228, + 0x998a, 0x52f8, 0x54d3, 0x02bc, 0x02cc, 0x7d09, 0x0400, 0x9978, + 0x008b, 0x52c0, 0x53c8, 0xc1a8, 0x7dd6, 0x0200, 0x9968, 0x08ff, + 0x00bf, 0x077f, 0x7d1b, 0x0488, 0x00d5, 0x7d01, 0x008d, 0x05a0, + 0x5deb, 0x028f, 0x32ff, 0x0210, 0x32ff, 0x0210, 0x0212, 0x0217, + 0x0217, 0x32ff, 0x0212, 0x05da, 0x7c02, 0x073e, 0x99b9, 0x02a4, + 0x02dd, 0x7d02, 0x073e, 0x99b9, 0x075e, 0x99b9, 0x55eb, 0x0598, + 0x5deb, 0x52f3, 0x54fb, 0x076a, 0x7d26, 0x076c, 0x7d01, 0x99f6, + 0x076b, 0x7c57, 0x0769, 0x7d04, 0x0768, 0x7d02, 0x0e01, 0x99d0, + 0x5893, 0x00d6, 0x7d01, 0x008e, 0x5593, 0x05a0, 0x5d93, 0x06a0, + 0x7802, 0x5502, 0x5d04, 0x7c1d, 0x4e00, 0x7c08, 0x0769, 0x7d03, + 0x5502, 0x7e17, 0x99dd, 0x5d04, 0x7f14, 0x0689, 0x5093, 0x4800, + 0x7d01, 0x99c8, 0x9a41, 0x0015, 0x7806, 0x5502, 0x5d04, 0x074d, + 0x5502, 0x5d24, 0x072d, 0x7c01, 0x9a41, 0x0017, 0x076d, 0x7c01, + 0x2001, 0x5593, 0x009d, 0x0007, 0xda48, 0x9990, 0x6cd3, 0x0769, + 0x7d04, 0x0768, 0x7d02, 0x0e01, 0x9a05, 0x5893, 0x00d6, 0x7d01, + 0x008e, 0x5593, 0x05a0, 0x5d93, 0x06a0, 0x7802, 0x5502, 0x6dc8, + 0x7c0f, 0x4e00, 0x7c08, 0x0769, 0x7d03, 0x5502, 0x7e09, 0x9a12, + 0x6dc8, 0x7f06, 0x0689, 0x5093, 0x4800, 0x7d01, 0x99fd, 0x9a41, + 0x9a3b, 0x6ac3, 0x0769, 0x7d04, 0x0768, 0x7d02, 0x0e01, 0x9a28, + 0x5893, 0x00d6, 0x7d01, 0x008e, 0x5593, 0x05a0, 0x5d93, 0x06a0, + 0x7802, 0x65c8, 0x5d04, 0x7c0f, 0x4e00, 0x7c08, 0x0769, 0x7d03, + 0x65c8, 0x7e09, 0x9a35, 0x5d04, 0x7f06, 0x0689, 0x5093, 0x4800, + 0x7d01, 0x9a20, 0x9a41, 0x5593, 0x009d, 0x0007, 0x6cff, 0xda48, + 0x9990, 0x0000, 0x54e3, 0x55eb, 0x4d00, 0x7c01, 0x9990, 0x9978, + 0x54e3, 0x55eb, 0x0aff, 0x0211, 0x1aff, 0x077f, 0x7c02, 0x05a0, + 0x9a55, 0x009d, 0x058c, 0x05ba, 0x05a0, 0x0210, 0x04ba, 0x04ad, + 0x0454, 0x0006, 0xc230, 0xc23a, 0x57db, 0x52f3, 0x047a, 0x7d02, + 0x6ad7, 0x9a63, 0x6a05, 0x008f, 0x00d5, 0x7d01, 0x008d, 0x05a0, + 0x56fb, 0x0015, 0x0015, 0x0015, 0x047a, 0x7d07, 0x7804, 0x5206, + 0x6ac8, 0x5226, 0x6ac8, 0x7c0f, 0x9a7d, 0x7804, 0x5206, 0x6a0b, + 0x5226, 0x6a0b, 0x7c0a, 0x6a28, 0x7f08, 0x0000, 0x4d00, 0x7d07, + 0xc251, 0x57db, 0x9a63, 0xc2ca, 0x9a86, 0xc2ce, 0x0454, 0xc261, + 0x9a5c, 0xc23a, 0x57db, 0x52f3, 0x6ad5, 0x56fb, 0x028e, 0x1a94, + 0x6ac3, 0x62c8, 0x0269, 0x7d1e, 0x1e94, 0x6ee3, 0x62d0, 0x5aeb, + 0x62c8, 0x0248, 0x6ed3, 0x6ac8, 0x2694, 0x52eb, 0x6ad5, 0x6ee3, + 0x62c8, 0x026e, 0x7d27, 0x6ac8, 0x7f23, 0x2501, 0x4d00, 0x7d26, + 0x028e, 0x1a98, 0x6ac3, 0x62c8, 0x6ec3, 0x0260, 0x7df1, 0x62d0, + 0xc2d1, 0x9ace, 0x6ee3, 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, + 0x05a0, 0x62c8, 0x026e, 0x7d0e, 0x6ac8, 0x7f0a, 0x2001, 0x7cf9, + 0x6add, 0x7f06, 0x0000, 0x4d00, 0x7d09, 0xc251, 0x57db, 0x9a8d, + 0x0007, 0x6aff, 0x62d0, 0xc2d1, 0x0458, 0x0454, 0x6add, 0x7ff8, + 0xc261, 0x9a8a, 0xc230, 0xc23a, 0x57db, 0x52f3, 0x6ad5, 0x56fb, + 0x028e, 0x1a94, 0x5202, 0x0269, 0x7d17, 0x1e94, 0x5206, 0x0248, + 0x5a06, 0x2694, 0x5206, 0x026e, 0x7d26, 0x6ac8, 0x7f22, 0x2501, + 0x4d00, 0x7d27, 0x028e, 0x1a98, 0x5202, 0x0260, 0x7df3, 0x6add, + 0x7f18, 0x62d0, 0xc2d1, 0x9b11, 0x008f, 0x2001, 0x00d5, 0x7d01, + 0x008d, 0x05a0, 0x5206, 0x026e, 0x7d0e, 0x6ac8, 0x7f0a, 0x2001, + 0x7cf9, 0x6add, 0x7f06, 0x0000, 0x4d00, 0x7d0b, 0xc251, 0x57db, + 0x9ad7, 0x0007, 0x6aff, 0x6add, 0x7ffc, 0x62d0, 0xc2d1, 0x0458, + 0x0454, 0x6add, 0x7ff6, 0xc261, 0x9ad4 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/Kconfig @@ -0,0 +1,111 @@ +menu "MX35 Options" + depends on ARCH_MX35 + +config FORCE_MAX_ZONEORDER + int "MAX_ORDER" + default "13" + +config MX35_OPTIONS + bool + default y + select CPU_V6 + select ARM_ERRATA_364296 + select ARM_ERRATA_411920 + select CACHE_L2X0 + select OUTER_CACHE + select USB_ARCH_HAS_EHCI + select ARCH_HAS_EVTMON + select ARCH_HAS_RNGC + +config MACH_MX35_3DS + bool "Support MX35 3STACK platforms" + default y + select MXC_PSEUDO_IRQS if MXC_PMIC_MC9SDZ60 + help + Include support for MX35 3STACK platform. This includes specific + configurations for the board and its peripherals. + +config MACH_MX35EVB + bool "Support MX35EVB platforms" + default n + help + Include support for MX35EVB platform. This includes specific + configurations for the board and its peripherals. + +config MX35_DOZE_DURING_IDLE + bool "Enter Doze mode during idle" + help + Turning on this option will put the CPU into Doze mode during idle. + The default is to enter Wait mode during idle. Doze mode during + idle will save additional power over Wait mode. + +config MXC_SDMA_API + bool "Use SDMA API" + default y + help + This selects the Freescale MXC SDMA API. + If unsure, say N. + +menu "SDMA options" + depends on MXC_SDMA_API + +config SDMA_IRAM + bool "Use Internal RAM for SDMA transfer" + default n + help + Support Internal RAM as SDMA buffer or control structures + +config SDMA_IRAM_SIZE + hex "Reserved bytes of IRAM for SDMA (0x800-0x1000)" + range 0x800 0x1000 + depends on SDMA_IRAM + default "0x1000" + help + Set the size of IRAM for SDMA. It must be a multiple of 512bytes. +endmenu + +config ARCH_MXC_HAS_NFC_V2 + bool "MXC NFC Hardware Version 2" + depends on ARCH_MX35 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 3 + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V2_1 + bool "MXC NFC Hardware Version 2.1" + depends on ARCH_MXC_HAS_NFC_V2 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 2.1 + If unsure, say N. + +menu "Device options" + +config I2C_MXC_SELECT1 + bool "Enable I2C1 module" + default y + depends on I2C_MXC + help + Enable MX35 I2C1 module. + +config I2C_MXC_SELECT2 + bool "Enable I2C2 module" + default n + depends on I2C_MXC + help + Enable MX35 I2C2 module. + +config I2C_MXC_SELECT3 + bool "Enable I2C3 module" + default n + depends on I2C_MXC + help + Enable MX35 I2C3 module. + +endmenu + +config MXC_PSEUDO_IRQS + bool + +endmenu --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/dma.c @@ -0,0 +1,1046 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +#include "serial.h" + +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define soc_trans_type int_2_per +#else +#define soc_trans_type emi_2_per +#endif + +#define MXC_SPDIF_TXFIFO_WML 8 +#define MXC_SPDIF_RXFIFO_WML 8 +#define MXC_SPDIF_TX_REG 0x2C +#define MXC_SPDIF_RX_REG 0x14 + +#define MXC_SSI_TX0_REG 0x0 +#define MXC_SSI_TX1_REG 0x4 +#define MXC_SSI_RX0_REG 0x8 +#define MXC_SSI_RX1_REG 0xC +#define MXC_SSI_TXFIFO_WML 0x4 +#define MXC_SSI_RXFIFO_WML 0x6 + +#define MXC_ASRC_FIFO_WML 0x40 +#define MXC_ASRCA_RX_REG 0x60 +#define MXC_ASRCA_TX_REG 0x64 +#define MXC_ASRCB_RX_REG 0x68 +#define MXC_ASRCB_TX_REG 0x6C +#define MXC_ASRCC_RX_REG 0x70 +#define MXC_ASRCC_TX_REG 0x74 + +#define MXC_ESAI_TX_REG 0x00 +#define MXC_ESAI_RX_REG 0x04 +#define MXC_ESAI_FIFO_WML 0x40 + +struct mxc_sdma_info_entry_s { + mxc_dma_device_t device; + void *chnl_info; +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_rx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_RXTL, + .per_address = UART1_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART1_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_tx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_TXTL, + .per_address = UART1_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART1_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_rx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_RXTL, + .per_address = UART2_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART2_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_tx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_TXTL, + .per_address = UART2_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART2_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_rx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_RXTL, + .per_address = UART3_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART3_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_tx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_TXTL, + .per_address = UART3_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART3_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_16bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF_TX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_32bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF_TX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_32bit_rx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_RXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_RX_REG, + .peripheral_type = SPDIF, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SPDIF_RX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_memory_params = { + .chnl_params = { + .peripheral_type = MEMORY, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrca_rx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML, + .per_address = ASRC_BASE_ADDR + MXC_ASRCA_RX_REG, + .peripheral_type = ASRC, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ASRC_DMA1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrca_tx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML, + .per_address = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrcb_rx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML, + .per_address = ASRC_BASE_ADDR + MXC_ASRCB_RX_REG, + .peripheral_type = ASRC, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ASRC_DMA2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrcb_tx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML, + .per_address = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrcc_rx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML * 3, + .per_address = ASRC_BASE_ADDR + MXC_ASRCC_RX_REG, + .peripheral_type = ASRC, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ASRC_DMA3, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCC_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_asrcc_tx_params = { + .chnl_params = { + .watermark_level = MXC_ASRC_FIFO_WML * 3, + .per_address = ASRC_BASE_ADDR + MXC_ASRCC_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ASRC_DMA6, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCC_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrca_ssi1_tx0_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .event_id2 = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_SSI1_TX0, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrca_ssi1_tx1_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .event_id2 = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_SSI1_TX1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrca_ssi2_tx0_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .event_id2 = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_SSI2_TX0, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrca_ssi2_tx1_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .event_id2 = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_SSI2_TX1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcb_ssi1_tx0_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .event_id2 = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_SSI1_TX0, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcb_ssi1_tx1_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .event_id2 = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_SSI1_TX1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcb_ssi2_tx0_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .event_id2 = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_SSI2_TX0, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcb_ssi2_tx1_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .event_id2 = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_SSI_TXFIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_SSI2_TX1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrca_esai_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_ESAI_TX, + .event_id2 = DMA_REQ_ASRC_DMA4, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_ESAI_FIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCA_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCA_ESAI, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcb_esai_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_ESAI_TX, + .event_id2 = DMA_REQ_ASRC_DMA5, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_ESAI_FIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCB_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCB_ESAI, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_ext_params_t mxc_sdma_asrcc_esai_params = { + .chnl_ext_params = { + .common = { + .watermark_level = + MXC_ASRC_FIFO_WML >> 1, + .per_address = + ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ASRC, + .transfer_type = per_2_per, + .event_id = DMA_REQ_ESAI_TX, + .event_id2 = DMA_REQ_ASRC_DMA6, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .ext = 1, + }, + .p2p_dir = 0, + .info_bits = + SDMA_ASRC_P2P_INFO_CONT | SDMA_ASRC_P2P_INFO_SP | + SDMA_ASRC_P2P_INFO_DP, + .watermark_level2 = MXC_ASRC_FIFO_WML, + .per_address2 = ASRC_BASE_ADDR + MXC_ASRCC_TX_REG, + }, + .channel_num = MXC_DMA_CHANNEL_ASRCC_ESAI, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_16bit_rx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_RX_REG, + .peripheral_type = ESAI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ESAI_RX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_16bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ESAI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_ESAI_TX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_24bit_rx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_RX_REG, + .peripheral_type = ESAI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ESAI_RX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_24bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ESAI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_ESAI_TX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static struct mxc_sdma_info_entry_s mxc_sdma_active_dma_info[] = { + {MXC_DMA_UART1_RX, &mxc_sdma_uart1_rx_params}, + {MXC_DMA_UART1_TX, &mxc_sdma_uart1_tx_params}, + {MXC_DMA_UART2_RX, &mxc_sdma_uart2_rx_params}, + {MXC_DMA_UART2_TX, &mxc_sdma_uart2_tx_params}, + {MXC_DMA_UART3_RX, &mxc_sdma_uart3_rx_params}, + {MXC_DMA_UART3_TX, &mxc_sdma_uart3_tx_params}, + {MXC_DMA_SPDIF_16BIT_TX, &mxc_sdma_spdif_16bit_tx_params}, + {MXC_DMA_SPDIF_32BIT_TX, &mxc_sdma_spdif_32bit_tx_params}, + {MXC_DMA_SPDIF_32BIT_RX, &mxc_sdma_spdif_32bit_rx_params}, + {MXC_DMA_SSI1_8BIT_RX0, &mxc_sdma_ssi1_8bit_rx0_params}, + {MXC_DMA_SSI1_8BIT_TX0, &mxc_sdma_ssi1_8bit_tx0_params}, + {MXC_DMA_SSI1_16BIT_RX0, &mxc_sdma_ssi1_16bit_rx0_params}, + {MXC_DMA_SSI1_16BIT_TX0, &mxc_sdma_ssi1_16bit_tx0_params}, + {MXC_DMA_SSI1_24BIT_RX0, &mxc_sdma_ssi1_24bit_rx0_params}, + {MXC_DMA_SSI1_24BIT_TX0, &mxc_sdma_ssi1_24bit_tx0_params}, + {MXC_DMA_SSI1_8BIT_RX1, &mxc_sdma_ssi1_8bit_rx1_params}, + {MXC_DMA_SSI1_8BIT_TX1, &mxc_sdma_ssi1_8bit_tx1_params}, + {MXC_DMA_SSI1_16BIT_RX1, &mxc_sdma_ssi1_16bit_rx1_params}, + {MXC_DMA_SSI1_16BIT_TX1, &mxc_sdma_ssi1_16bit_tx1_params}, + {MXC_DMA_SSI1_24BIT_RX1, &mxc_sdma_ssi1_24bit_rx1_params}, + {MXC_DMA_SSI1_24BIT_TX1, &mxc_sdma_ssi1_24bit_tx1_params}, + {MXC_DMA_SSI2_8BIT_RX0, &mxc_sdma_ssi2_8bit_rx0_params}, + {MXC_DMA_SSI2_8BIT_TX0, &mxc_sdma_ssi2_8bit_tx0_params}, + {MXC_DMA_SSI2_16BIT_RX0, &mxc_sdma_ssi2_16bit_rx0_params}, + {MXC_DMA_SSI2_16BIT_TX0, &mxc_sdma_ssi2_16bit_tx0_params}, + {MXC_DMA_SSI2_24BIT_RX0, &mxc_sdma_ssi2_24bit_rx0_params}, + {MXC_DMA_SSI2_24BIT_TX0, &mxc_sdma_ssi2_24bit_tx0_params}, + {MXC_DMA_SSI2_8BIT_RX1, &mxc_sdma_ssi2_8bit_rx1_params}, + {MXC_DMA_SSI2_8BIT_TX1, &mxc_sdma_ssi2_8bit_tx1_params}, + {MXC_DMA_SSI2_16BIT_RX1, &mxc_sdma_ssi2_16bit_rx1_params}, + {MXC_DMA_SSI2_16BIT_TX1, &mxc_sdma_ssi2_16bit_tx1_params}, + {MXC_DMA_SSI2_24BIT_RX1, &mxc_sdma_ssi2_24bit_rx1_params}, + {MXC_DMA_SSI2_24BIT_TX1, &mxc_sdma_ssi2_24bit_tx1_params}, + {MXC_DMA_ASRC_A_RX, &mxc_sdma_asrca_rx_params}, + {MXC_DMA_ASRC_A_TX, &mxc_sdma_asrca_tx_params}, + {MXC_DMA_ASRC_B_RX, &mxc_sdma_asrcb_rx_params}, + {MXC_DMA_ASRC_B_TX, &mxc_sdma_asrcb_tx_params}, + {MXC_DMA_ASRC_C_RX, &mxc_sdma_asrcc_rx_params}, + {MXC_DMA_ASRC_C_TX, &mxc_sdma_asrcc_tx_params}, + {MXC_DMA_ASRCA_SSI1_TX0, &mxc_sdma_asrca_ssi1_tx0_params}, + {MXC_DMA_ASRCA_SSI1_TX1, &mxc_sdma_asrca_ssi1_tx1_params}, + {MXC_DMA_ASRCA_SSI2_TX0, &mxc_sdma_asrca_ssi2_tx0_params}, + {MXC_DMA_ASRCA_SSI2_TX1, &mxc_sdma_asrca_ssi2_tx1_params}, + {MXC_DMA_ASRCB_SSI1_TX0, &mxc_sdma_asrcb_ssi1_tx0_params}, + {MXC_DMA_ASRCB_SSI1_TX1, &mxc_sdma_asrcb_ssi1_tx1_params}, + {MXC_DMA_ASRCB_SSI2_TX0, &mxc_sdma_asrcb_ssi2_tx0_params}, + {MXC_DMA_ASRCB_SSI2_TX1, &mxc_sdma_asrcb_ssi2_tx1_params}, + {MXC_DMA_ASRCA_ESAI, &mxc_sdma_asrca_esai_params}, + {MXC_DMA_ASRCB_ESAI, &mxc_sdma_asrcb_esai_params}, + {MXC_DMA_ASRCC_ESAI, &mxc_sdma_asrcc_esai_params}, + {MXC_DMA_ESAI_16BIT_RX, &mxc_sdma_esai_16bit_rx_params}, + {MXC_DMA_ESAI_16BIT_TX, &mxc_sdma_esai_16bit_tx_params}, + {MXC_DMA_ESAI_24BIT_RX, &mxc_sdma_esai_24bit_rx_params}, + {MXC_DMA_ESAI_24BIT_TX, &mxc_sdma_esai_24bit_tx_params}, + {MXC_DMA_MEMORY, &mxc_sdma_memory_params}, +}; + +static int mxc_sdma_info_entrys = + sizeof(mxc_sdma_active_dma_info) / sizeof(mxc_sdma_active_dma_info[0]); +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id) +{ + struct mxc_sdma_info_entry_s *p = mxc_sdma_active_dma_info; + int i; + + for (i = 0; i < mxc_sdma_info_entrys; i++, p++) { + if (p->device == channel_id) + return p->chnl_info; + } + return NULL; +} + +EXPORT_SYMBOL(mxc_sdma_get_channel_params); + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t *chnl) +{ + /* No channels statically allocated for MX35 */ +#ifdef CONFIG_SDMA_IRAM + int i; + for (i = MXC_DMA_CHANNEL_IRAM; i < MAX_DMA_CHANNELS; i++) + chnl[i].dynamic = 0; +#endif +} + +EXPORT_SYMBOL(mxc_get_static_channels); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_pins.h @@ -0,0 +1,333 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX35_PINS_H__ +#define __ASM_ARCH_MXC_MX35_PINS_H__ + +/*! + * @file arch-mxc/mx35_pins.h + * + * @brief MX35 I/O Pin List + * + * @ingroup GPIO_MX35 + */ + +#ifndef __ASSEMBLY__ + +/*! + * @name IOMUX/PAD Bit field definitions + */ + +/*! @{ */ + +/*! + * In order to identify pins more effectively, each mux-controlled pin's + * enumerated value is constructed in the following way: + * + * ------------------------------------------------------------------- + * 31-29 | 28 - 24 |23 - 21| 20 - 10| 9 - 0 + * ------------------------------------------------------------------- + * IO_P | IO_I | RSVD | PAD_I | MUX_I + * ------------------------------------------------------------------- + * + * Bit 0 to 7 contains MUX_I used to identify the register + * offset (base is IOMUX_module_base ) defined in the Section + * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The similar field + * definitions are used for the pad control register.the MX35_PIN_A0 is + * defined in the enumeration: ( 0x28 << MUX_I) |( 0x368 << PAD_I) + * So the absolute address is: IOMUX_module_base + 0x28. + * The pad control register offset is: 0x368. + */ + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * MUX control register offset + */ +#define MUX_I 0 +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * PAD control register offset + */ +#define PAD_I 10 + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * reserved filed + */ +#define RSVD_I 21 + +#define NON_GPIO_I 0x7 +#define PIN_TO_MUX_MASK ((1<<(PAD_I - MUX_I)) - 1) +#define PIN_TO_PAD_MASK ((1<<(RSVD_I - PAD_I)) - 1) +#define NON_MUX_I PIN_TO_MUX_MASK + +#define _MXC_BUILD_PIN(gp, gi, mi, pi) \ + (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ + ((mi) << MUX_I) | ((pi) << PAD_I)) + +#define _MXC_BUILD_GPIO_PIN(gp, gi, mi, pi) \ + _MXC_BUILD_PIN(gp, gi, mi, pi) + +#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ + _MXC_BUILD_PIN(NON_GPIO_I, 0, mi, pi) + +#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) +#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) + +/*! @} End IOMUX/PAD Bit field definitions */ + +/*! + * This enumeration is constructed based on the Section + * "sw_pad_ctl & sw_mux_ctl details" of the MX35 IC Spec. Each enumerated + * value is constructed based on the rules described above. + */ +enum iomux_pins { + MX35_PIN_CAPTURE = _MXC_BUILD_GPIO_PIN(0, 4, 0x4, 0x328), + MX35_PIN_COMPARE = _MXC_BUILD_GPIO_PIN(0, 5, 0x8, 0x32C), + MX35_PIN_WATCHDOG_RST = _MXC_BUILD_GPIO_PIN(0, 6, 0xC, 0x330), + MX35_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 0x10, 0x334), + MX35_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 0x14, 0x338), + MX35_PIN_GPIO2_0 = _MXC_BUILD_GPIO_PIN(1, 0, 0x18, 0x33C), + MX35_PIN_GPIO3_0 = _MXC_BUILD_GPIO_PIN(2, 0, 0x1C, 0x340), + MX35_PIN_CLKO = _MXC_BUILD_GPIO_PIN(0, 8, 0x20, 0x34C), + + MX35_PIN_POWER_FAIL = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x360), + MX35_PIN_VSTBY = _MXC_BUILD_GPIO_PIN(0, 7, 0x24, 0x364), + MX35_PIN_A0 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x368), + MX35_PIN_A1 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x36C), + MX35_PIN_A2 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x370), + MX35_PIN_A3 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x374), + MX35_PIN_A4 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x378), + MX35_PIN_A5 = _MXC_BUILD_NON_GPIO_PIN(0x3C, 0x37C), + MX35_PIN_A6 = _MXC_BUILD_NON_GPIO_PIN(0x40, 0x380), + MX35_PIN_A7 = _MXC_BUILD_NON_GPIO_PIN(0x44, 0x384), + MX35_PIN_A8 = _MXC_BUILD_NON_GPIO_PIN(0x48, 0x388), + MX35_PIN_A9 = _MXC_BUILD_NON_GPIO_PIN(0x4C, 0x38C), + MX35_PIN_A10 = _MXC_BUILD_NON_GPIO_PIN(0x50, 0x390), + MX35_PIN_MA10 = _MXC_BUILD_NON_GPIO_PIN(0x54, 0x394), + MX35_PIN_A11 = _MXC_BUILD_NON_GPIO_PIN(0x58, 0x398), + MX35_PIN_A12 = _MXC_BUILD_NON_GPIO_PIN(0x5C, 0x39C), + MX35_PIN_A13 = _MXC_BUILD_NON_GPIO_PIN(0x60, 0x3A0), + MX35_PIN_A14 = _MXC_BUILD_NON_GPIO_PIN(0x64, 0x3A4), + MX35_PIN_A15 = _MXC_BUILD_NON_GPIO_PIN(0x68, 0x3A8), + MX35_PIN_A16 = _MXC_BUILD_NON_GPIO_PIN(0x6C, 0x3AC), + MX35_PIN_A17 = _MXC_BUILD_NON_GPIO_PIN(0x70, 0x3B0), + MX35_PIN_A18 = _MXC_BUILD_NON_GPIO_PIN(0x74, 0x3B4), + MX35_PIN_A19 = _MXC_BUILD_NON_GPIO_PIN(0x78, 0x3B8), + MX35_PIN_A20 = _MXC_BUILD_NON_GPIO_PIN(0x7C, 0x3BC), + MX35_PIN_A21 = _MXC_BUILD_NON_GPIO_PIN(0x80, 0x3C0), + MX35_PIN_A22 = _MXC_BUILD_NON_GPIO_PIN(0x84, 0x3C4), + MX35_PIN_A23 = _MXC_BUILD_NON_GPIO_PIN(0x88, 0x3C8), + MX35_PIN_A24 = _MXC_BUILD_NON_GPIO_PIN(0x8C, 0x3CC), + MX35_PIN_A25 = _MXC_BUILD_NON_GPIO_PIN(0x90, 0x3D0), + + MX35_PIN_EB0 = _MXC_BUILD_NON_GPIO_PIN(0x94, 0x46C), + MX35_PIN_EB1 = _MXC_BUILD_NON_GPIO_PIN(0x98, 0x470), + MX35_PIN_OE = _MXC_BUILD_NON_GPIO_PIN(0x9C, 0x474), + MX35_PIN_CS0 = _MXC_BUILD_NON_GPIO_PIN(0xA0, 0x478), + MX35_PIN_CS1 = _MXC_BUILD_NON_GPIO_PIN(0xA4, 0x47C), + MX35_PIN_CS2 = _MXC_BUILD_NON_GPIO_PIN(0xA8, 0x480), + MX35_PIN_CS3 = _MXC_BUILD_NON_GPIO_PIN(0xAC, 0x484), + MX35_PIN_CS4 = _MXC_BUILD_GPIO_PIN(0, 20, 0xB0, 0x488), + MX35_PIN_CS5 = _MXC_BUILD_GPIO_PIN(0, 21, 0xB4, 0x48C), + MX35_PIN_NFCE_B = _MXC_BUILD_GPIO_PIN(0, 22, 0xB8, 0x490), + + MX35_PIN_LBA = _MXC_BUILD_NON_GPIO_PIN(0xBC, 0x498), + MX35_PIN_BCLK = _MXC_BUILD_NON_GPIO_PIN(0xC0, 0x49C), + MX35_PIN_RW = _MXC_BUILD_NON_GPIO_PIN(0xC4, 0x4A0), + + MX35_PIN_NFWE_B = _MXC_BUILD_GPIO_PIN(1, 18, 0xC8, 0x4CC), + MX35_PIN_NFRE_B = _MXC_BUILD_GPIO_PIN(1, 19, 0xCC, 0x4D0), + MX35_PIN_NFALE = _MXC_BUILD_GPIO_PIN(1, 20, 0xD0, 0x4D4), + MX35_PIN_NFCLE = _MXC_BUILD_GPIO_PIN(1, 21, 0xD4, 0x4D8), + MX35_PIN_NFWP_B = _MXC_BUILD_GPIO_PIN(1, 22, 0xD8, 0x4DC), + MX35_PIN_NFRB = _MXC_BUILD_GPIO_PIN(1, 23, 0xDC, 0x4E0), + + MX35_PIN_D15 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4E4), + MX35_PIN_D14 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4E8), + MX35_PIN_D13 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4EC), + MX35_PIN_D12 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F0), + MX35_PIN_D11 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F4), + MX35_PIN_D10 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4F8), + MX35_PIN_D9 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x4FC), + MX35_PIN_D8 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x500), + MX35_PIN_D7 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x504), + MX35_PIN_D6 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x508), + MX35_PIN_D5 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x50C), + MX35_PIN_D4 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x510), + MX35_PIN_D3 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x514), + MX35_PIN_D2 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x518), + MX35_PIN_D1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x51C), + MX35_PIN_D0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x520), + + MX35_PIN_CSI_D8 = _MXC_BUILD_GPIO_PIN(0, 20, 0xE0, 0x524), + MX35_PIN_CSI_D9 = _MXC_BUILD_GPIO_PIN(0, 21, 0xE4, 0x528), + MX35_PIN_CSI_D10 = _MXC_BUILD_GPIO_PIN(0, 22, 0xE8, 0x52C), + MX35_PIN_CSI_D11 = _MXC_BUILD_GPIO_PIN(0, 23, 0xEC, 0x530), + MX35_PIN_CSI_D12 = _MXC_BUILD_GPIO_PIN(0, 24, 0xF0, 0x534), + MX35_PIN_CSI_D13 = _MXC_BUILD_GPIO_PIN(0, 25, 0xF4, 0x538), + MX35_PIN_CSI_D14 = _MXC_BUILD_GPIO_PIN(0, 26, 0xF8, 0x53C), + MX35_PIN_CSI_D15 = _MXC_BUILD_GPIO_PIN(0, 27, 0xFC, 0x540), + MX35_PIN_CSI_MCLK = _MXC_BUILD_GPIO_PIN(0, 28, 0x100, 0x544), + MX35_PIN_CSI_VSYNC = _MXC_BUILD_GPIO_PIN(0, 29, 0x104, 0x548), + MX35_PIN_CSI_HSYNC = _MXC_BUILD_GPIO_PIN(0, 30, 0x108, 0x54C), + MX35_PIN_CSI_PIXCLK = _MXC_BUILD_GPIO_PIN(0, 31, 0x10C, 0x550), + + MX35_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(1, 24, 0x110, 0x554), + MX35_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(1, 25, 0x114, 0x558), + MX35_PIN_I2C2_CLK = _MXC_BUILD_GPIO_PIN(1, 26, 0x118, 0x55C), + MX35_PIN_I2C2_DAT = _MXC_BUILD_GPIO_PIN(1, 27, 0x11C, 0x560), + + MX35_PIN_STXD4 = _MXC_BUILD_GPIO_PIN(1, 28, 0x120, 0x564), + MX35_PIN_SRXD4 = _MXC_BUILD_GPIO_PIN(1, 29, 0x124, 0x568), + MX35_PIN_SCK4 = _MXC_BUILD_GPIO_PIN(1, 30, 0x128, 0x56C), + MX35_PIN_STXFS4 = _MXC_BUILD_GPIO_PIN(1, 31, 0x12C, 0x570), + MX35_PIN_STXD5 = _MXC_BUILD_GPIO_PIN(0, 0, 0x130, 0x574), + MX35_PIN_SRXD5 = _MXC_BUILD_GPIO_PIN(0, 1, 0x134, 0x578), + MX35_PIN_SCK5 = _MXC_BUILD_GPIO_PIN(0, 2, 0x138, 0x57C), + MX35_PIN_STXFS5 = _MXC_BUILD_GPIO_PIN(0, 3, 0x13C, 0x580), + + MX35_PIN_SCKR = _MXC_BUILD_GPIO_PIN(0, 4, 0x140, 0x584), + MX35_PIN_FSR = _MXC_BUILD_GPIO_PIN(0, 5, 0x144, 0x588), + MX35_PIN_HCKR = _MXC_BUILD_GPIO_PIN(0, 6, 0x148, 0x58C), + MX35_PIN_SCKT = _MXC_BUILD_GPIO_PIN(0, 7, 0x14C, 0x590), + MX35_PIN_FST = _MXC_BUILD_GPIO_PIN(0, 8, 0x150, 0x594), + MX35_PIN_HCKT = _MXC_BUILD_GPIO_PIN(0, 9, 0x154, 0x598), + MX35_PIN_TX5_RX0 = _MXC_BUILD_GPIO_PIN(0, 10, 0x158, 0x59C), + MX35_PIN_TX4_RX1 = _MXC_BUILD_GPIO_PIN(0, 11, 0x15C, 0x5A0), + MX35_PIN_TX3_RX2 = _MXC_BUILD_GPIO_PIN(0, 12, 0x160, 0x5A4), + MX35_PIN_TX2_RX3 = _MXC_BUILD_GPIO_PIN(0, 13, 0x164, 0x5A8), + MX35_PIN_TX1 = _MXC_BUILD_GPIO_PIN(0, 14, 0x168, 0x5AC), + MX35_PIN_TX0 = _MXC_BUILD_GPIO_PIN(0, 15, 0x16C, 0x5B0), + + MX35_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(0, 16, 0x170, 0x5B4), + MX35_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(0, 17, 0x174, 0x5B8), + MX35_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(0, 18, 0x178, 0x5BC), + MX35_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(0, 19, 0x17C, 0x5C0), + MX35_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(2, 4, 0x180, 0x5C4), + MX35_PIN_CSPI1_SPI_RDY = _MXC_BUILD_GPIO_PIN(2, 5, 0x184, 0x5C8), + + MX35_PIN_RXD1 = _MXC_BUILD_GPIO_PIN(2, 6, 0x188, 0x5CC), + MX35_PIN_TXD1 = _MXC_BUILD_GPIO_PIN(2, 7, 0x18C, 0x5D0), + MX35_PIN_RTS1 = _MXC_BUILD_GPIO_PIN(2, 8, 0x190, 0x5D4), + MX35_PIN_CTS1 = _MXC_BUILD_GPIO_PIN(2, 9, 0x194, 0x5D8), + MX35_PIN_RXD2 = _MXC_BUILD_GPIO_PIN(2, 10, 0x198, 0x5DC), + MX35_PIN_TXD2 = _MXC_BUILD_GPIO_PIN(2, 11, 0x19C, 0x5E0), + MX35_PIN_RTS2 = _MXC_BUILD_GPIO_PIN(2, 12, 0x1A0, 0x5E4), + MX35_PIN_CTS2 = _MXC_BUILD_GPIO_PIN(2, 13, 0x1A4, 0x5E8), + + MX35_PIN_USBOTG_PWR = _MXC_BUILD_GPIO_PIN(2, 14, 0x1A8, 0x60C), + MX35_PIN_USBOTG_OC = _MXC_BUILD_GPIO_PIN(2, 15, 0x1AC, 0x610), + + MX35_PIN_LD0 = _MXC_BUILD_GPIO_PIN(1, 0, 0x1B0, 0x614), + MX35_PIN_LD1 = _MXC_BUILD_GPIO_PIN(1, 1, 0x1B4, 0x618), + MX35_PIN_LD2 = _MXC_BUILD_GPIO_PIN(1, 2, 0x1B8, 0x61C), + MX35_PIN_LD3 = _MXC_BUILD_GPIO_PIN(1, 3, 0x1BC, 0x620), + MX35_PIN_LD4 = _MXC_BUILD_GPIO_PIN(1, 4, 0x1C0, 0x624), + MX35_PIN_LD5 = _MXC_BUILD_GPIO_PIN(1, 5, 0x1C4, 0x628), + MX35_PIN_LD6 = _MXC_BUILD_GPIO_PIN(1, 6, 0x1C8, 0x62C), + MX35_PIN_LD7 = _MXC_BUILD_GPIO_PIN(1, 7, 0x1CC, 0x630), + MX35_PIN_LD8 = _MXC_BUILD_GPIO_PIN(1, 8, 0x1D0, 0x634), + MX35_PIN_LD9 = _MXC_BUILD_GPIO_PIN(1, 9, 0x1D4, 0x638), + MX35_PIN_LD10 = _MXC_BUILD_GPIO_PIN(1, 10, 0x1D8, 0x63C), + MX35_PIN_LD11 = _MXC_BUILD_GPIO_PIN(1, 11, 0x1DC, 0x640), + MX35_PIN_LD12 = _MXC_BUILD_GPIO_PIN(1, 12, 0x1E0, 0x644), + MX35_PIN_LD13 = _MXC_BUILD_GPIO_PIN(1, 13, 0x1E4, 0x648), + MX35_PIN_LD14 = _MXC_BUILD_GPIO_PIN(1, 14, 0x1E8, 0x64C), + MX35_PIN_LD15 = _MXC_BUILD_GPIO_PIN(1, 15, 0x1EC, 0x650), + MX35_PIN_LD16 = _MXC_BUILD_GPIO_PIN(1, 16, 0x1F0, 0x654), + MX35_PIN_LD17 = _MXC_BUILD_GPIO_PIN(1, 17, 0x1F4, 0x658), + MX35_PIN_LD18 = _MXC_BUILD_GPIO_PIN(2, 24, 0x1F8, 0x65C), + MX35_PIN_LD19 = _MXC_BUILD_GPIO_PIN(2, 25, 0x1FC, 0x660), + MX35_PIN_LD20 = _MXC_BUILD_GPIO_PIN(2, 26, 0x200, 0x664), + MX35_PIN_LD21 = _MXC_BUILD_GPIO_PIN(2, 27, 0x204, 0x668), + MX35_PIN_LD22 = _MXC_BUILD_GPIO_PIN(2, 28, 0x208, 0x66C), + MX35_PIN_LD23 = _MXC_BUILD_GPIO_PIN(2, 29, 0x20C, 0x670), + + MX35_PIN_D3_HSYNC = _MXC_BUILD_GPIO_PIN(2, 30, 0x210, 0x674), + MX35_PIN_D3_FPSHIFT = _MXC_BUILD_GPIO_PIN(2, 31, 0x214, 0x678), + MX35_PIN_D3_DRDY = _MXC_BUILD_GPIO_PIN(0, 0, 0x218, 0x67C), + MX35_PIN_CONTRAST = _MXC_BUILD_GPIO_PIN(0, 1, 0x21C, 0x680), + MX35_PIN_D3_VSYNC = _MXC_BUILD_GPIO_PIN(0, 2, 0x220, 0x684), + MX35_PIN_D3_REV = _MXC_BUILD_GPIO_PIN(0, 3, 0x224, 0x688), + MX35_PIN_D3_CLS = _MXC_BUILD_GPIO_PIN(0, 4, 0x228, 0x68C), + MX35_PIN_D3_SPL = _MXC_BUILD_GPIO_PIN(0, 5, 0x22C, 0x690), + + MX35_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(0, 6, 0x230, 0x694), + MX35_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(0, 7, 0x234, 0x698), + MX35_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 8, 0x238, 0x69C), + MX35_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 9, 0x23C, 0x6A0), + MX35_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 10, 0x240, 0x6A4), + MX35_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 11, 0x244, 0x6A8), + MX35_PIN_SD2_CMD = _MXC_BUILD_GPIO_PIN(1, 0, 0x248, 0x6AC), + MX35_PIN_SD2_CLK = _MXC_BUILD_GPIO_PIN(1, 1, 0x24C, 0x6B0), + MX35_PIN_SD2_DATA0 = _MXC_BUILD_GPIO_PIN(1, 2, 0x250, 0x6B4), + MX35_PIN_SD2_DATA1 = _MXC_BUILD_GPIO_PIN(1, 3, 0x254, 0x6B8), + MX35_PIN_SD2_DATA2 = _MXC_BUILD_GPIO_PIN(1, 4, 0x258, 0x6BC), + MX35_PIN_SD2_DATA3 = _MXC_BUILD_GPIO_PIN(1, 5, 0x25C, 0x6C0), + + MX35_PIN_ATA_CS0 = _MXC_BUILD_GPIO_PIN(1, 6, 0x260, 0x6C4), + MX35_PIN_ATA_CS1 = _MXC_BUILD_GPIO_PIN(1, 7, 0x264, 0x6C8), + MX35_PIN_ATA_DIOR = _MXC_BUILD_GPIO_PIN(1, 8, 0x268, 0x6CC), + MX35_PIN_ATA_DIOW = _MXC_BUILD_GPIO_PIN(1, 9, 0x26C, 0x6D0), + MX35_PIN_ATA_DMACK = _MXC_BUILD_GPIO_PIN(1, 10, 0x270, 0x6D4), + MX35_PIN_ATA_RESET_B = _MXC_BUILD_GPIO_PIN(1, 11, 0x274, 0x6D8), + MX35_PIN_ATA_IORDY = _MXC_BUILD_GPIO_PIN(1, 12, 0x278, 0x6DC), + MX35_PIN_ATA_DATA0 = _MXC_BUILD_GPIO_PIN(1, 13, 0x27C, 0x6E0), + MX35_PIN_ATA_DATA1 = _MXC_BUILD_GPIO_PIN(1, 14, 0x280, 0x6E4), + MX35_PIN_ATA_DATA2 = _MXC_BUILD_GPIO_PIN(1, 15, 0x284, 0x6E8), + MX35_PIN_ATA_DATA3 = _MXC_BUILD_GPIO_PIN(1, 16, 0x288, 0x6EC), + MX35_PIN_ATA_DATA4 = _MXC_BUILD_GPIO_PIN(1, 17, 0x28C, 0x6F0), + MX35_PIN_ATA_DATA5 = _MXC_BUILD_GPIO_PIN(1, 18, 0x290, 0x6F4), + MX35_PIN_ATA_DATA6 = _MXC_BUILD_GPIO_PIN(1, 19, 0x294, 0x6F8), + MX35_PIN_ATA_DATA7 = _MXC_BUILD_GPIO_PIN(1, 20, 0x298, 0x6FC), + MX35_PIN_ATA_DATA8 = _MXC_BUILD_GPIO_PIN(1, 21, 0x29C, 0x700), + MX35_PIN_ATA_DATA9 = _MXC_BUILD_GPIO_PIN(1, 22, 0x2A0, 0x704), + MX35_PIN_ATA_DATA10 = _MXC_BUILD_GPIO_PIN(1, 23, 0x2A4, 0x708), + MX35_PIN_ATA_DATA11 = _MXC_BUILD_GPIO_PIN(1, 24, 0x2A8, 0x70C), + MX35_PIN_ATA_DATA12 = _MXC_BUILD_GPIO_PIN(1, 25, 0x2AC, 0x710), + MX35_PIN_ATA_DATA13 = _MXC_BUILD_GPIO_PIN(1, 26, 0x2B0, 0x714), + MX35_PIN_ATA_DATA14 = _MXC_BUILD_GPIO_PIN(1, 27, 0x2B4, 0x718), + MX35_PIN_ATA_DATA15 = _MXC_BUILD_GPIO_PIN(1, 28, 0x2B8, 0x71C), + MX35_PIN_ATA_INTRQ = _MXC_BUILD_GPIO_PIN(1, 29, 0x2BC, 0x720), + MX35_PIN_ATA_BUFF_EN = _MXC_BUILD_GPIO_PIN(1, 30, 0x2C0, 0x724), + MX35_PIN_ATA_DMARQ = _MXC_BUILD_GPIO_PIN(1, 31, 0x2C4, 0x728), + MX35_PIN_ATA_DA0 = _MXC_BUILD_GPIO_PIN(2, 0, 0x2C8, 0x72C), + MX35_PIN_ATA_DA1 = _MXC_BUILD_GPIO_PIN(2, 1, 0x2CC, 0x730), + MX35_PIN_ATA_DA2 = _MXC_BUILD_GPIO_PIN(2, 2, 0x2D0, 0x734), + + MX35_PIN_MLB_CLK = _MXC_BUILD_GPIO_PIN(2, 3, 0x2D4, 0x738), + MX35_PIN_MLB_DAT = _MXC_BUILD_GPIO_PIN(2, 4, 0x2D8, 0x73C), + MX35_PIN_MLB_SIG = _MXC_BUILD_GPIO_PIN(2, 5, 0x2DC, 0x740), + + MX35_PIN_FEC_TX_CLK = _MXC_BUILD_GPIO_PIN(2, 6, 0x2E0, 0x744), + MX35_PIN_FEC_RX_CLK = _MXC_BUILD_GPIO_PIN(2, 7, 0x2E4, 0x748), + MX35_PIN_FEC_RX_DV = _MXC_BUILD_GPIO_PIN(2, 8, 0x2E8, 0x74C), + MX35_PIN_FEC_COL = _MXC_BUILD_GPIO_PIN(2, 9, 0x2EC, 0x750), + MX35_PIN_FEC_RDATA0 = _MXC_BUILD_GPIO_PIN(2, 10, 0x2F0, 0x754), + MX35_PIN_FEC_TDATA0 = _MXC_BUILD_GPIO_PIN(2, 11, 0x2F4, 0x758), + MX35_PIN_FEC_TX_EN = _MXC_BUILD_GPIO_PIN(2, 12, 0x2F8, 0x75C), + MX35_PIN_FEC_MDC = _MXC_BUILD_GPIO_PIN(2, 13, 0x2FC, 0x760), + MX35_PIN_FEC_MDIO = _MXC_BUILD_GPIO_PIN(2, 14, 0x300, 0x764), + MX35_PIN_FEC_TX_ERR = _MXC_BUILD_GPIO_PIN(2, 15, 0x304, 0x768), + MX35_PIN_FEC_RX_ERR = _MXC_BUILD_GPIO_PIN(2, 16, 0x308, 0x76C), + MX35_PIN_FEC_CRS = _MXC_BUILD_GPIO_PIN(2, 17, 0x30C, 0x770), + MX35_PIN_FEC_RDATA1 = _MXC_BUILD_GPIO_PIN(2, 18, 0x310, 0x774), + MX35_PIN_FEC_TDATA1 = _MXC_BUILD_GPIO_PIN(2, 19, 0x314, 0x778), + MX35_PIN_FEC_RDATA2 = _MXC_BUILD_GPIO_PIN(2, 20, 0x318, 0x77C), + MX35_PIN_FEC_TDATA2 = _MXC_BUILD_GPIO_PIN(2, 21, 0x31C, 0x780), + MX35_PIN_FEC_RDATA3 = _MXC_BUILD_GPIO_PIN(2, 22, 0x320, 0x784), + MX35_PIN_FEC_TDATA3 = _MXC_BUILD_GPIO_PIN(2, 23, 0x324, 0x788), +}; + +#endif +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/usb.h @@ -0,0 +1,104 @@ +/* + * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, struct fsl_usb2_platform_data *config); + +extern int fsl_usb_host_init(struct platform_device *pdev); +extern void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbh2_active(void); +extern void gpio_usbh2_inactive(void); +extern int gpio_usbotg_utmi_active(void); +extern void gpio_usbotg_utmi_inactive(void); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config; +#define PDATA (&dr_utmi_config) + + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/board-mx35_3stack.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/board-mx35_3stack.h @@ -0,0 +1,201 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX35_3STACK_H__ +#define __ASM_ARCH_MXC_BOARD_MX35_3STACK_H__ + +#ifdef CONFIG_MACH_MX35_3DS + +/*! + * @defgroup BRDCFG_MX35 Board Configuration Options + * @ingroup MSL_MX35 + */ + +/*! + * @file mach-mx35/board-mx35_3stack.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX35 3STACK Platform. + * + * @ingroup BRDCFG_MX35 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART EVB board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DTE +#define UART2_IR NO_IRDA +#define UART2_ENABLED 1 + +/* UART 3 configuration */ +#define UART3_MODE MODE_DTE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +#define MXC_PSEUDO_PARENT MXC_INT_FORCE + +enum { + MCU_INT_HEADPHONE = 0, + MCU_INT_GPS, + MCU_INT_SD1_CD, + MCU_INT_SD1_WP, + MCU_INT_SD2_CD, + MCU_INT_SD2_WP, + MCU_INT_POWER_KEY, + MCU_INT_RTC, + MCU_INT_TS_ADC, + MCU_INT_KEYPAD, +}; + +#define MXC_PSEUDO_IRQ_HEADPHONE (MXC_PSEUDO_IO_BASE + MCU_INT_HEADPHONE) +#define MXC_PSEUDO_IRQ_GPS (MXC_PSEUDO_IO_BASE + MCU_INT_GPS) +#define MXC_PSEUDO_IRQ_SD1_CD (MXC_PSEUDO_IO_BASE + MCU_INT_SD1_CD) +#define MXC_PSEUDO_IRQ_SD1_WP (MXC_PSEUDO_IO_BASE + MCU_INT_SD1_WP) +#define MXC_PSEUDO_IRQ_SD2_CD (MXC_PSEUDO_IO_BASE + MCU_INT_SD2_CD) +#define MXC_PSEUDO_IRQ_SD2_WP (MXC_PSEUDO_IO_BASE + MCU_INT_SD2_WP) +#define MXC_PSEUDO_IRQ_POWER_KEY (MXC_PSEUDO_IO_BASE + MCU_INT_POWER_KEY) +#define MXC_PSEUDO_IRQ_KEYPAD (MXC_PSEUDO_IO_BASE + MCU_INT_KEYPAD) +#define MXC_PSEUDO_IRQ_RTC (MXC_PSEUDO_IO_BASE + MCU_INT_RTC) +#define MXC_PSEUDO_IRQ_TS_ADC (MXC_PSEUDO_IO_BASE + MCU_INT_TS_ADC) + +/*! + * @name debug board parameters + */ +/*! @{ */ +/*! + * Base address of debug board + */ +#define DEBUG_BASE_ADDRESS CS5_BASE_ADDR + +/* External ethernet LAN9217 base address */ +#define LAN9217_BASE_ADDR DEBUG_BASE_ADDRESS + +/* External UART */ +#define UARTA_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x08000) +#define UARTB_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x10000) + +#define BOARD_IO_ADDR (DEBUG_BASE_ADDRESS + 0x20000) + +/* LED switchs */ +#define LED_SWITCH_REG 0x00 +/* buttons */ +#define SWITCH_BUTTON_REG 0x08 +/* status, interrupt */ +#define INTR_STATUS_REG 0x10 +#define INTR_RESET_REG 0x20 +/*CPLD configuration*/ +#define CONFIG1_REG 0x28 +#define CONFIG2_REG 0x30 +/*interrupt mask */ +#define INTR_MASK_REG 0x38 + +/* magic word for debug CPLD */ +#define MAGIC_NUMBER1_REG 0x40 +#define MAGIC_NUMBER2_REG 0x48 +/* CPLD code version */ +#define CPLD_CODE_VER_REG 0x50 +/* magic word for debug CPLD */ +#define MAGIC3_NUMBER3_REG 0x58 +/* module reset register*/ +#define CONTROL_REG 0x60 +/* CPU ID and Personality ID*/ +#define IDENT_REG 0x68 + +/* For interrupts like xuart, enet etc */ +#define EXPIO_PARENT_INT MX35_PIN_GPIO1_1 + +#define EXPIO_INT_ENET_INT (MXC_BOARD_IRQ_START + 0) +#define EXPIO_INT_XUARTA_INT (MXC_BOARD_IRQ_START + 1) +#define EXPIO_INT_XUARTB_INT (MXC_BOARD_IRQ_START + 2) +#define EXPIO_INT_BUTTONA_INT (MXC_BOARD_IRQ_START + 3) +#define EXPIO_INT_BUTTONB_INT (MXC_BOARD_IRQ_START + 4) + +/*! This is System IRQ used by LAN9217 for interrupt generation taken + * from platform.h + */ +#define LAN9217_IRQ EXPIO_INT_ENET_INT + +/*! This is base virtual address of debug board*/ +extern unsigned int mx35_3stack_board_io; + +#define MXC_BD_LED1 (1) +#define MXC_BD_LED2 (1 << 1) +#define MXC_BD_LED3 (1 << 2) +#define MXC_BD_LED4 (1 << 3) +#define MXC_BD_LED5 (1 << 4) +#define MXC_BD_LED6 (1 << 5) +#define MXC_BD_LED7 (1 << 6) +#define MXC_BD_LED8 (1 << 7) +#define MXC_BD_LED_ON(led) +#define MXC_BD_LED_OFF(led) + +/*! @} */ + +#define AHB_FREQ 133000000 +#define IPG_FREQ 66500000 + +extern void mx35_3stack_gpio_init(void) __init; +extern void gpio_tsc_active(void); +extern void gpio_tsc_inactive(void); +extern unsigned int sdhc_get_card_det_status(struct device *dev); +extern int sdhc_write_protect(struct device *dev); +extern void gpio_can_active(int id); +extern void gpio_can_inactive(int id); +extern struct flexcan_platform_data flexcan_data[]; +extern int __init mx35_3stack_init_mc13892(void); +extern int __init mx35_3stack_init_mc9s08dz60(void); +extern int is_suspend_ops_started(void); + +#endif /* CONFIG_MACH_MX35_3DS */ +#endif /* __ASM_ARCH_MXC_BOARD_MX35_3STACK_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/pm.c @@ -0,0 +1,87 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include + +/*! + * @defgroup MSL_MX35 i.MX35 Machine Specific Layer (MSL) + */ + +int suspend_ops_started; +int is_suspend_ops_started(void) +{ + return suspend_ops_started; +} +/*! + * @file mach-mx35/pm.c + * @brief This file contains suspend operations + * + * @ingroup MSL_MX35 + */ +static int mx35_suspend_enter(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_MEM: + mxc_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mxc_cpu_lp_set(STOP_POWER_ON); + break; + default: + return -EINVAL; + } + /* Executing CP15 (Wait-for-Interrupt) Instruction */ + cpu_do_idle(); + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int mx35_suspend_prepare(void) +{ + suspend_ops_started = 1; + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static void mx35_suspend_finish(void) +{ + suspend_ops_started = 0; +} + +static int mx35_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +struct platform_suspend_ops mx35_suspend_ops = { + .valid = mx35_pm_valid, + .prepare = mx35_suspend_prepare, + .enter = mx35_suspend_enter, + .finish = mx35_suspend_finish, +}; + +static int __init mx35_pm_init(void) +{ + pr_info("Static Power Management for Freescale i.MX35\n"); + suspend_set_ops(&mx35_suspend_ops); + + return 0; +} + +late_initcall(mx35_pm_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/cpu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/cpu.c @@ -0,0 +1,82 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mach-mx35/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX35 + */ + +#include +#include +#include +#include +#include +#include + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + + /* Setup Peripheral Port Remap register for AVIC */ + asm("ldr r0, =0xC0000015 \n\ + mcr p15, 0, r0, c15, c2, 4"); + /*TODO:Add code to check chip version */ + + if (!system_rev) + mxc_set_system_rev(0x35, CHIP_REV_1_0); + +} + +/*! + * Post CPU init code + * + * @return 0 always + */ +static int __init post_cpu_init(void) +{ + void *l2_base; + unsigned long aips_reg; + + /* Initialize L2 cache */ + l2_base = ioremap(L2CC_BASE_ADDR, SZ_4K); + if (l2_base) + l2x0_init(l2_base, 0x00030024, 0x00000000); + + /* + * S/W workaround: Clear the off platform peripheral modules + * Supervisor Protect bit for SDMA to access them. + */ + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + + return 0; +} + +postcore_initcall(post_cpu_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack_irq.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack_irq.c @@ -0,0 +1,375 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "board-mx35_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx35/mx35_3stack_irq.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX35 + */ +#ifdef CONFIG_MXC_PSEUDO_IRQS + +/* + * The interrupt status and mask variables. + */ +static unsigned long pseudo_irq_pending; +static unsigned long pseudo_irq_enable; +static unsigned long pseudo_irq_wakeup; +static unsigned long pseudo_suspend; +static atomic_t pseudo_irq_state = ATOMIC_INIT(0); + +/* + * The declaration of handler of two work queue. + * The one is the work queue to indentify the events from MCU. + * The another is the work queue to change the events mask. + */ +static void mcu_event_handler(struct work_struct *work); +static void mcu_state_handler(struct work_struct *work); +static void mcu_event_delay(unsigned long data); + +/*! + * The work structure for mcu events. + */ +static DECLARE_WORK(mcu_event_ws, mcu_event_handler); +static DECLARE_WORK(mcu_state_ws, mcu_state_handler); +static DEFINE_TIMER(mcu_delay_timer, mcu_event_delay, HZ, 0); + +static inline void mxc_pseudo_irq_ack(void) +{ + disable_irq(MXC_PSEUDO_PARENT); + atomic_set(&pseudo_irq_state, 0); +} + +static inline void mxc_pseudo_irq_trigger(void) +{ + if (!atomic_xchg(&pseudo_irq_state, 1)) + enable_irq(MXC_PSEUDO_PARENT); +} + +/* + * mask a pseudo interrupt by setting the bit in the mask variable. + * @param irq a pseudo virtual irq number + */ +static void pseudo_mask_irq(u32 irq) +{ + int index = irq - MXC_PSEUDO_IO_BASE; + clear_bit(index, &pseudo_irq_enable); +} + +/* + * disable a pseudo interrupt by triggerring a work queue + * @param irq a pseudo virtual irq number + */ +static void pseudo_disable_irq(u32 irq) +{ + struct irq_desc *desc = irq_desc + irq; + desc->chip->mask(irq); + desc->status |= IRQ_MASKED; + schedule_work(&mcu_state_ws); +} + +/* + * Acknowledge a pseudo interrupt by clearing the bit in the isr variable. + * @param irq a pseudo virtual irq number + */ +static void pseudo_ack_irq(u32 irq) +{ + int index = irq - MXC_PSEUDO_IO_BASE; + /* clear the interrupt status */ + clear_bit(index, &pseudo_irq_pending); +} + +/* + * unmask a pseudo interrupt by clearing the bit in the imr. + * @param irq a pseudo virtual irq number + */ +static void pseudo_unmask_irq(u32 irq) +{ + int index = irq - MXC_PSEUDO_IO_BASE; + + set_bit(index, &pseudo_irq_enable); + + if (test_bit(index, &pseudo_irq_pending)) + mxc_pseudo_irq_trigger(); +} + +/* + * Enable a pseudo interrupt by triggerring a work queue + * @param irq a pseudo virtual irq number + */ +static void pseudo_enable_irq(u32 irq) +{ + struct irq_desc *desc = irq_desc + irq; + desc->chip->unmask(irq); + desc->status &= ~IRQ_MASKED; + schedule_work(&mcu_state_ws); +} + +/* + * set pseudo irq as a wake-up source. + * @param irq a pseudo virtual irq number + * @param enable enable as wake-up if equal to non-ero + * @return This function return 0 on success + */ +static int pseudo_set_wake_irq(u32 irq, u32 enable) +{ + int index = irq - MXC_PSEUDO_IO_BASE; + + if (index >= MXC_MAX_PSEUDO_IO_LINES) + return -ENODEV; + + if (enable) { + if (!pseudo_irq_wakeup) + enable_irq_wake(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0)); + pseudo_irq_wakeup |= (1 << index); + } else { + pseudo_irq_wakeup &= ~(1 << index); + if (!pseudo_irq_wakeup) + disable_irq_wake(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0)); + } + return 0; +} + +static struct irq_chip pseudo_irq_chip = { + .ack = pseudo_ack_irq, + .mask = pseudo_mask_irq, + .disable = pseudo_disable_irq, + .unmask = pseudo_unmask_irq, + .enable = pseudo_enable_irq, + .set_wake = pseudo_set_wake_irq, +}; + +static void mxc_pseudo_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 pseudo_irq; + u32 index, mask; + + desc->chip->mask(irq); + mxc_pseudo_irq_ack(); + + mask = pseudo_irq_enable; + index = pseudo_irq_pending; + + if (unlikely(!(index & mask))) { + printk(KERN_ERR "\nPseudo IRQ: Spurious interrupt:0x%0x\n\n", + index); + pr_info("IEN=0x%x, PENDING=0x%x\n", mask, index); + return; + } + + index = index & mask; + pseudo_irq = MXC_PSEUDO_IO_BASE; + for (; index != 0; index >>= 1, pseudo_irq++) { + struct irq_desc *d; + if ((index & 1) == 0) + continue; + d = irq_desc + pseudo_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nPseudo irq: %d unhandeled\n", + pseudo_irq); + BUG(); /* oops */ + } + d->handle_irq(pseudo_irq, d); + d->chip->ack(pseudo_irq); + } +} + +static void mcu_event_delay(unsigned long data) +{ + schedule_work(&mcu_event_ws); +} + +/*! + * This function is called when mcu interrupt occurs on the processor. + * It is the interrupt handler for the mcu. + * + * @param irq the irq number + * @param dev_id the pointer on the device + * + * @return The function returns IRQ_HANDLED when handled. + */ +static irqreturn_t mcu_irq_handler(int irq, void *dev_id) +{ + disable_irq_nosync(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0)); + if (pseudo_suspend) + mod_timer(&mcu_delay_timer, jiffies + HZ); + else + schedule_work(&mcu_event_ws); + + return IRQ_HANDLED; +} + +/*! + * This function is the work handler of mcu interrupt. + * It reads the events status and trigger the pseudo irq. + */ +static void mcu_event_handler(struct work_struct *work) +{ + int i, err; + unsigned int flag1, flag2; + + /* read int flags and ack int */ + for (i = 0; i < 3; i++) { + err = mcu_pmic_read_reg(REG_MCU_INT_FLAG_1, &flag1, 0xFFFFFFFF); + err |= mcu_pmic_read_reg(REG_MCU_INT_FLAG_2, + &flag2, 0xFFFFFFFF); + err |= mcu_pmic_write_reg(REG_MCU_INT_FLAG_1, 0, 0xFFFFFFFF); + err |= mcu_pmic_write_reg(REG_MCU_INT_FLAG_2, 0, 0xFFFFFFFF); + if (err == 0) + break; + } + + if (i >= 3) { + printk(KERN_ERR "Reads MCU event fail\n"); + goto no_new_events; + } + + for (i = 0; flag1 && (i < MCU_INT_RTC); i++, flag1 >>= 1) + if (flag1 & 1) + set_bit(i, &pseudo_irq_pending); + + for (i = MCU_INT_RTC; flag2 && (i <= MCU_INT_KEYPAD); i++, flag2 >>= 1) + if (flag2 & 1) + set_bit(i, &pseudo_irq_pending); + no_new_events: + if (pseudo_irq_pending & pseudo_irq_enable) + mxc_pseudo_irq_trigger(); + enable_irq(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0)); +} + +static void mcu_state_handler(struct work_struct *work) +{ + int err, i; + unsigned int event1, event2; + event1 = pseudo_irq_enable & ((1 << MCU_INT_RTC) - 1); + event2 = pseudo_irq_enable >> MCU_INT_RTC; + + if (is_suspend_ops_started()) + return; + + for (i = 0; i < 3; i++) { + err = mcu_pmic_write_reg(REG_MCU_INT_ENABLE_1, event1, 0xFF); + err |= mcu_pmic_write_reg(REG_MCU_INT_ENABLE_2, event2, 0xFF); + if (err == 0) + break; + } + if (i >= 3) + printk(KERN_ERR "Change MCU event mask fail\n"); +} + +static int __init mxc_pseudo_init(void) +{ + int i; + + /* disable the interrupt and clear the status */ + pseudo_irq_pending = 0; + pseudo_irq_enable = 0; + + pr_info("3-Stack Pseudo interrupt rev=0.1v\n"); + + for (i = MXC_PSEUDO_IO_BASE; + i < (MXC_PSEUDO_IO_BASE + MXC_MAX_PSEUDO_IO_LINES); i++) { + set_irq_chip(i, &pseudo_irq_chip); + set_irq_handler(i, handle_simple_irq); + set_irq_flags(i, IRQF_VALID); + } + + set_irq_flags(MXC_PSEUDO_PARENT, IRQF_NOAUTOEN); + set_irq_handler(MXC_PSEUDO_PARENT, mxc_pseudo_irq_handler); + + /* Set and install PMIC IRQ handler */ + mxc_request_iomux(MX35_PIN_GPIO1_0, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_GPIO1_0, PAD_CTL_PKE_NONE); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_GPIO1_0), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX35_PIN_GPIO1_0)); + + set_irq_type(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0), IRQF_TRIGGER_RISING); + if (request_irq(IOMUX_TO_IRQ(MX35_PIN_GPIO1_0), mcu_irq_handler, + 0, "MCU_IRQ", 0)) { + printk(KERN_ERR "mcu request irq failed\n"); + return -1; + } + return 0; +} + +fs_initcall_sync(mxc_pseudo_init); + +static int mxc_pseudo_irq_suspend(struct platform_device *dev, + pm_message_t mesg) +{ + int err, i; + unsigned int event1, event2; + + if (!pseudo_irq_wakeup) + return 0; + + event1 = pseudo_irq_wakeup & ((1 << MCU_INT_RTC) - 1); + event2 = pseudo_irq_wakeup >> MCU_INT_RTC; + + for (i = 0; i < 3; i++) { + err = mcu_pmic_write_reg(REG_MCU_INT_ENABLE_1, event1, 0xFF); + err |= mcu_pmic_write_reg(REG_MCU_INT_ENABLE_2, event2, 0xFF); + if (err == 0) + break; + } + pseudo_suspend = 1; + return err; +} + +static int mxc_pseudo_irq_resume(struct platform_device *dev) +{ + if (!pseudo_irq_wakeup) + return 0; + + schedule_work(&mcu_state_ws); + pseudo_suspend = 0; + return 0; +} + +static struct platform_driver mxc_pseudo_irq_driver = { + .driver = { + .name = "mxc_pseudo_irq", + }, + .suspend = mxc_pseudo_irq_suspend, + .resume = mxc_pseudo_irq_resume, +}; + +static int __init mxc_pseudo_sysinit(void) +{ + return platform_driver_register(&mxc_pseudo_irq_driver); +} + +late_initcall(mxc_pseudo_sysinit); +#endif /* CONFIG_MXC_PSEUDO_IRQS */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mm.c @@ -0,0 +1,77 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +/*! + * @file mach-mx35/mm.c + * + * @brief This file creates static mapping between physical to virtual memory. + * + * @ingroup Memory_MX35 + */ + +/*! + * This structure defines the MX35 memory map. + */ +static struct map_desc mx35_io_desc[] __initdata = { + { + .virtual = IRAM_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX35_IRAM_BASE_ADDR), + .length = MX35_IRAM_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = X_MEMC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), + .length = X_MEMC_SIZE, + .type = MT_DEVICE}, + { + .virtual = NFC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(NFC_BASE_ADDR), + .length = NFC_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = AVIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AVIC_BASE_ADDR), + .length = AVIC_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED}, +}; + +/*! + * This function initializes the memory map. It is called during the + * system startup to create static physical to virtual memory map for + * the IO modules. + */ +void __init mx35_map_io(void) +{ + iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/Makefile @@ -0,0 +1,19 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := system.o iomux.o cpu.o mm.o clock.o devices.o serial.o +obj-$(CONFIG_MXC_SDMA_API) += dma.o +obj-$(CONFIG_MACH_MX35_3DS) += mx35_3stack.o mx35_3stack_gpio.o mx35_3stack_cpld.o dvfs.o mx35_3stack_pmic_mc13892.o mx35_3stack_pmic_mc9s08dz60.o +obj-$(CONFIG_MACH_MX35EVB) += mx35evb.o mx35evb_cpld.o mx35evb_gpio.o + +obj-$(CONFIG_MXC_PSEUDO_IRQS) += mx35_3stack_irq.o +obj-$(CONFIG_PM) += pm.o + +obj-$(CONFIG_USB_EHCI_ARC_H2) += usb_h2.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/system.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/system.c @@ -0,0 +1,134 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX35 i.MX35 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx35/system.c + * @brief This file contains idle and reset functions. + * + * @ingroup MSL_MX35 + */ + +/*! +* MX35 low-power mode +*/ +enum mx35_low_pwr_mode { + MX35_RUN_MODE, + MX35_WAIT_MODE, + MX35_DOZE_MODE, + MX35_STOP_MODE +}; + +extern int mxc_jtag_enabled; + +/*! + * This function is used to set cpu low power mode before WFI instruction + * + * @param mode indicates different kinds of power modes + */ +void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode) +{ + unsigned int lpm; + unsigned long reg; + + /*read CCMR value */ + reg = __raw_readl(MXC_CCM_CCMR); + + switch (mode) { + case WAIT_UNCLOCKED_POWER_OFF: + lpm = MX35_DOZE_MODE; + break; + + case STOP_POWER_ON: + case STOP_POWER_OFF: + lpm = MX35_STOP_MODE; + /* Enabled Well Bias */ + reg |= MXC_CCM_CCMR_WBEN; + if (!board_is_rev(BOARD_REV_1)) + reg |= MXC_CCM_CCMR_VSTBY; + break; + + case WAIT_CLOCKED: + case WAIT_UNCLOCKED: + default: + /* Wait is the default mode used when idle. */ + lpm = MX35_WAIT_MODE; + break; + } + + /* program LPM bit */ + reg = (reg & (~MXC_CCM_CCMR_LPM_MASK)) | lpm << MXC_CCM_CCMR_LPM_OFFSET; + /* program Interrupt holdoff bit */ + reg = reg | MXC_CCM_CCMR_WFI; + /* TBD: PMIC has put the voltage back to Normal if the voltage ready */ + /* counter finished */ + reg = reg | MXC_CCM_CCMR_STBY_EXIT_SRC; + + __raw_writel(reg, MXC_CCM_CCMR); +} + +EXPORT_SYMBOL(mxc_cpu_lp_set); + +/*! + * This function puts the CPU into idle mode. It is called by default_idle() + * in process.c file. + */ +void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks. + */ + if (!mxc_jtag_enabled) { +#ifdef CONFIG_MX35_DOZE_DURING_IDLE + /*set as Doze mode */ + mxc_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); +#else + /* set as Wait mode */ + mxc_cpu_lp_set(WAIT_UNCLOCKED); +#endif + cpu_do_idle(); + } +} + +/* + * This function resets the system. It is called by machine_restart(). + * + * @param mode indicates different kinds of resets + */ +void arch_reset(char mode) +{ + unsigned long reg; + + reg = __raw_readl(MXC_CCM_CGR0); + reg |= + (MXC_CCM_CGR0_ESDHC1_MASK | MXC_CCM_CGR0_ESDHC2_MASK | + MXC_CCM_CGR0_ESDHC3_MASK); + __raw_writel(reg, MXC_CCM_CGR0); + + /* Assert SRS signal */ + mxc_wd_reset(); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack_gpio.c @@ -0,0 +1,1378 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "board-mx35_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx35/mx35_3stack_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO_MX35 + */ + +/*! + * This system-wise GPIO function initializes the pins during system startup. + * All the statically linked device drivers should put the proper GPIO + * initialization code inside this function. It is called by \b fixup_mx31ads() + * during system startup. This function is board specific. + */ +void mx35_3stack_gpio_init(void) +{ + /* config CS5 */ + mxc_request_iomux(MX35_PIN_CS5, MUX_CONFIG_FUNC); + + /* configure capture pin for ckil input */ + mxc_request_iomux(MX35_PIN_CAPTURE, MUX_CONFIG_ALT4); + mxc_iomux_set_pad(MX35_PIN_CAPTURE, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_100K_PU | PAD_CTL_PUE_PUD); + mxc_iomux_set_input(MUX_IN_CCM_32K_MUXED, INPUT_CTL_PATH0); + +} + +/*! + * Setup GPIO for a UART port to be active + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_active(int port, int no_irda) +{ + /* + * Configure the IOMUX control registers for the UART signals + */ + switch (port) { + /* UART 1 IOMUX Configs */ + case 0: + mxc_request_iomux(MX35_PIN_RXD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TXD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_RTS1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CTS1, MUX_CONFIG_FUNC); + + mxc_iomux_set_pad(MX35_PIN_RXD1, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_TXD1, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_RTS1, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_CTS1, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + + break; + /* UART 2 IOMUX Configs */ + case 1: + mxc_request_iomux(MX35_PIN_TXD2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_RXD2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_RTS2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CTS2, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_RXD2, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_TXD2, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_RTS2, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_CTS2, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + break; + /* UART 3 IOMUX Configs */ + case 2: + mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_ALT2); + mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_ALT2); + mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_ALT2); + mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_ALT2); + + mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX35_PIN_FEC_COL, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + + mxc_iomux_set_input(MUX_IN_UART3_UART_RTS_B, INPUT_CTL_PATH2); + mxc_iomux_set_input(MUX_IN_UART3_UART_RXD_MUX, INPUT_CTL_PATH3); + break; + default: + break; + } + +} + +EXPORT_SYMBOL(gpio_uart_active); + +/*! + * Setup GPIO for a UART port to be inactive + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_inactive(int port, int no_irda) +{ + switch (port) { + case 0: + gpio_request(IOMUX_TO_GPIO(MX35_PIN_RXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_TXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_RTS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CTS1), NULL); + + mxc_free_iomux(MX35_PIN_RXD1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_TXD1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_RTS1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CTS1, MUX_CONFIG_GPIO); + break; + case 1: + gpio_request(IOMUX_TO_GPIO(MX35_PIN_RXD2), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_TXD2), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_RTS2), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CTS2), NULL); + + mxc_free_iomux(MX35_PIN_RXD2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_TXD2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_RTS2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CTS2, MUX_CONFIG_GPIO); + break; + case 2: + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TX_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RX_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_COL), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RX_DV), NULL); + + mxc_free_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_GPIO); + + mxc_iomux_set_input(MUX_IN_UART3_UART_RTS_B, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_UART3_UART_RXD_MUX, INPUT_CTL_PATH0); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_uart_inactive); + +/*! + * Configure the IOMUX GPR register to receive shared SDMA UART events + * + * @param port a UART port + */ +void config_uartdma_event(int port) +{ +} + +EXPORT_SYMBOL(config_uartdma_event); + +void gpio_fec_active(void) +{ + mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC); + +#define FEC_PAD_CTL_COMMON (PAD_CTL_DRV_3_3V|PAD_CTL_PUE_PUD| \ + PAD_CTL_ODE_CMOS|PAD_CTL_DRV_NORMAL|PAD_CTL_SRE_SLOW) + mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, FEC_PAD_CTL_COMMON | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_COL, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA0, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA0, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_TX_EN, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_MDC, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_MDIO, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_22K_PU); + mxc_iomux_set_pad(MX35_PIN_FEC_TX_ERR, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RX_ERR, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_CRS, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA1, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA1, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA2, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA2, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_RDATA3, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX35_PIN_FEC_TDATA3, + FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS | + PAD_CTL_PKE_NONE | PAD_CTL_100K_PD); +#undef FEC_PAD_CTL_COMMON + /* Pull GPIO1_5 to be high for routing signal to FEC */ + if (board_is_rev(BOARD_REV_2)) { + mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX35_PIN_COMPARE, PAD_CTL_DRV_NORMAL | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_DRV_3_3V | PAD_CTL_PUE_PUD | + PAD_CTL_SRE_SLOW); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_COMPARE), "compare"); + gpio_direction_output(IOMUX_TO_GPIO(MX35_PIN_COMPARE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX35_PIN_COMPARE), 1); + } + + /* FEC enable */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 1); + /* FEC reset */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 0); + msleep(10); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 1); + msleep(100); +} + +EXPORT_SYMBOL(gpio_fec_active); + +void gpio_fec_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TX_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RX_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RX_DV), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_COL), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RDATA0), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TDATA0), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TX_EN), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_MDC), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_MDIO), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TX_ERR), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RX_ERR), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_CRS), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RDATA1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TDATA1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RDATA2), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TDATA2), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_RDATA3), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_FEC_TDATA3), NULL); + + mxc_free_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_GPIO); + + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 0); + + /* Free GPIO1_5 */ + if (board_is_rev(BOARD_REV_2)) { + gpio_free(IOMUX_TO_GPIO(MX35_PIN_COMPARE)); + mxc_free_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); + } +} + +EXPORT_SYMBOL(gpio_fec_inactive); + +/*! + * Setup GPIO for an I2C device to be active + * + * @param i2c_num an I2C device + */ +void gpio_i2c_active(int i2c_num) +{ + +#define PAD_CONFIG (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | PAD_CTL_ODE_OpenDrain) + + switch (i2c_num) { + case 0: + mxc_request_iomux(MX35_PIN_I2C1_CLK, MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_I2C1_DAT, MUX_CONFIG_SION); + + mxc_iomux_set_pad(MX35_PIN_I2C1_CLK, PAD_CONFIG); + mxc_iomux_set_pad(MX35_PIN_I2C1_DAT, PAD_CONFIG); + break; + case 1: + mxc_request_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_SION); + + mxc_iomux_set_pad(MX35_PIN_I2C2_CLK, PAD_CONFIG); + mxc_iomux_set_pad(MX35_PIN_I2C2_DAT, PAD_CONFIG); + + break; + case 2: + mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_ALT1); + mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX35_PIN_TX3_RX2, PAD_CONFIG); + mxc_iomux_set_pad(MX35_PIN_TX2_RX3, PAD_CONFIG); + break; + default: + break; + } + +#undef PAD_CONFIG + +} + +EXPORT_SYMBOL(gpio_i2c_active); + +/*! + * Setup GPIO for an I2C device to be inactive + * + * @param i2c_num an I2C device + */ +void gpio_i2c_inactive(int i2c_num) +{ + switch (i2c_num) { + case 0: + break; + case 1: + break; + case 2: + mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_GPIO); + mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_GPIO); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_i2c_inactive); + +/*! + * Setup GPIO for a CSPI device to be active + * + * @param cspi_mod an CSPI device + */ +void gpio_spi_active(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + mxc_request_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSPI1_SPI_RDY, MUX_CONFIG_FUNC); + + mxc_iomux_set_pad(MX35_PIN_CSPI1_MOSI, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PD | PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX35_PIN_CSPI1_MISO, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PD | PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SS0, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SS1, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PU | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SCLK, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PD | PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX35_PIN_CSPI1_SPI_RDY, + PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PU | PAD_CTL_DRV_NORMAL); + break; + case 1: + /* SPI2 */ + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_spi_active); + +/*! + * Setup GPIO for a CSPI device to be inactive + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_MOSI), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_MISO), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_SS0), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_SS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_SCLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CSPI1_SPI_RDY), NULL); + + mxc_free_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_CSPI1_SPI_RDY, MUX_CONFIG_GPIO); + break; + case 1: + /* SPI2 */ + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_spi_inactive); + +/*! + * Setup GPIO for LCD to be active + */ +void gpio_lcd_active(void) +{ + mxc_request_iomux(MX35_PIN_LD0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD6, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD7, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD8, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD9, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD10, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD11, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD12, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD13, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD14, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD15, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD16, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_LD17, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_D3_VSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_D3_HSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_D3_FPSHIFT, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_D3_DRDY, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CONTRAST, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_lcd_active); + +/*! + * Setup GPIO for LCD to be inactive + */ +void gpio_lcd_inactive(void) +{ +} + +EXPORT_SYMBOL(gpio_lcd_inactive); + +/*! + * Setup pin for touchscreen + */ +void gpio_tsc_active(void) +{ + unsigned int pad_val = PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU; + mxc_request_iomux(MX35_PIN_CAPTURE, MUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX35_PIN_CAPTURE, pad_val); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_CAPTURE), "capture"); + gpio_direction_input(IOMUX_TO_GPIO(MX35_PIN_CAPTURE)); +} + +/*! + * Release pin for touchscreen + */ +void gpio_tsc_inactive(void) +{ + gpio_free(IOMUX_TO_GPIO(MX35_PIN_CAPTURE)); + mxc_free_iomux(MX35_PIN_CAPTURE, MUX_CONFIG_GPIO); +} + +/*! + * Setup GPIO for SDHC to be active + * + * @param module SDHC module number + */ +void gpio_sdhc_active(int module) +{ + unsigned int pad_val; + + switch (module) { + case 0: + mxc_request_iomux(MX35_PIN_SD1_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD1_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD1_DATA0, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD1_DATA1, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD1_DATA2, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD1_DATA3, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) +#else + /* MUX4_CTR , 0: SD2 to WIFI, 1:SD2 to SD1 8bit */ + if (board_is_rev(BOARD_REV_2)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, + 7, 1); + mxc_request_iomux(MX35_PIN_SD2_CMD, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_CLK, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA0, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA1, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); +#endif + + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD1_CMD, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA1, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA2, pad_val); + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_MAX | PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD1_CLK, pad_val); + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, pad_val); +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) +#else + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, pad_val); + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_MAX | PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val); +#endif + break; + case 1: + /* MUX4_CTR , 0: SD2 to WIFI, 1:SD2 to SD1 8bit */ + if (board_is_rev(BOARD_REV_2)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, + 7, 0); + mxc_request_iomux(MX35_PIN_SD2_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA0, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA1, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA2, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX35_PIN_SD2_DATA3, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST; + + mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, pad_val); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA2, pad_val); + + pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX | + PAD_CTL_100K_PU | PAD_CTL_SRE_FAST; + + mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, pad_val); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_active); + +/*! + * Setup GPIO for SDHC1 to be inactive + * + * @param module SDHC module number + */ +void gpio_sdhc_inactive(int module) +{ + switch (module) { + case 0: + mxc_free_iomux(MX35_PIN_SD1_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD1_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD1_DATA0, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD1_DATA1, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD1_DATA2, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD1_DATA3, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_CMD, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_CLK, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA0, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA1, + MUX_CONFIG_ALT2 | MUX_CONFIG_SION); + + mxc_iomux_set_pad(MX35_PIN_SD1_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD1_CMD, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_CMD, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + break; + case 1: + mxc_free_iomux(MX35_PIN_SD2_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA0, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA1, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA2, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_free_iomux(MX35_PIN_SD2_DATA3, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + + mxc_iomux_set_pad(MX35_PIN_SD2_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_CMD, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_inactive); + +/* + * Probe for the card. If present the GPIO data would be set. + */ +unsigned int sdhc_get_card_det_status(struct device *dev) +{ + unsigned int ret; + + if (to_platform_device(dev)->id == 0) { + if (0 != pmic_gpio_get_designation_bit_val(2, &ret)) + printk(KERN_ERR "Get cd status error."); + return ret; + } else { /* config the det pin for SDHC2 */ + return 0; + } +} + +EXPORT_SYMBOL(sdhc_get_card_det_status); + +/*! + * Get pin value to detect write protection + */ +int sdhc_write_protect(struct device *dev) +{ + unsigned int rc = 0; + + if (0 != pmic_gpio_get_designation_bit_val(3, &rc)) + printk(KERN_ERR "Get wp status error."); + return rc; +} + +EXPORT_SYMBOL(sdhc_write_protect); + +/* + * USB Host2 + */ +int gpio_usbh2_active(void) +{ + if (board_is_rev(BOARD_REV_2)) { + /* MUX3_CTR to be low for USB Host2 DP&DM */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 6, 0); + /* CAN_PWDN to be high for USB Host2 Power&OC */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 1, 1); + } + + mxc_request_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_ALT2); + mxc_iomux_set_pad(MX35_PIN_I2C2_CLK, 0x0040); + + mxc_request_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_ALT2); + mxc_iomux_set_input(MUX_IN_USB_UH2_USB_OC, INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX35_PIN_I2C2_DAT, 0x01c0); + + return 0; +} + +EXPORT_SYMBOL(gpio_usbh2_active); + +void gpio_usbh2_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX35_PIN_I2C2_DAT), NULL); + mxc_free_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_I2C2_CLK), NULL); + mxc_free_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_usbh2_inactive); + +/* + * USB OTG UTMI + */ +int gpio_usbotg_utmi_active(void) +{ + mxc_request_iomux(MX35_PIN_USBOTG_PWR, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_USBOTG_PWR, 0x0040); + mxc_request_iomux(MX35_PIN_USBOTG_OC, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_USBOTG_OC, 0x01c0); + + return 0; +} + +EXPORT_SYMBOL(gpio_usbotg_utmi_active); + +void gpio_usbotg_utmi_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX35_PIN_USBOTG_PWR), NULL); + mxc_free_iomux(MX35_PIN_USBOTG_PWR, MUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_USBOTG_OC), NULL); + mxc_free_iomux(MX35_PIN_USBOTG_OC, MUX_CONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_usbotg_utmi_inactive); + +void gpio_sensor_active(void) +{ + /*CSI D6 */ + mxc_request_iomux(MX35_PIN_TX1, MUX_CONFIG_ALT6); + /*CSI D7 */ + mxc_request_iomux(MX35_PIN_TX0, MUX_CONFIG_ALT6); + mxc_request_iomux(MX35_PIN_CSI_D8, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D9, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D10, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D11, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D12, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D13, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D14, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_D15, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_HSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_MCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_PIXCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_CSI_VSYNC, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_sensor_active); + +void gpio_sensor_inactive(void) +{ + mxc_request_iomux(MX35_PIN_TX1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX0, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_sensor_inactive); + +/*! + * Setup GPIO for spdif tx/rx to be active + */ +void gpio_spdif_active(void) +{ + /* SPDIF OUT */ + mxc_request_iomux(MX35_PIN_STXD5, MUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX35_PIN_STXD5, PAD_CTL_PKE_NONE | PAD_CTL_PUE_PUD); + /* SPDIF IN */ + mxc_request_iomux(MX35_PIN_SRXD5, MUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX35_PIN_SRXD5, PAD_CTL_PKE_ENABLE + | PAD_CTL_100K_PU | PAD_CTL_HYS_SCHMITZ); + /* SPDIF ext clock */ + mxc_request_iomux(MX35_PIN_SCK5, MUX_CONFIG_ALT1); + if (board_is_rev(BOARD_REV_2)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 5, 1); + else + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 0, 1); +} + +EXPORT_SYMBOL(gpio_spdif_active); + +/*! + * Setup GPIO for spdif tx/rx to be inactive + */ +void gpio_spdif_inactive(void) +{ + /* SPDIF OUT */ + mxc_free_iomux(MX35_PIN_STXD5, MUX_CONFIG_ALT1); + /* SPDIF IN */ + mxc_free_iomux(MX35_PIN_SRXD5, MUX_CONFIG_ALT1); + /* SPDIF ext clock */ + mxc_free_iomux(MX35_PIN_SCK5, MUX_CONFIG_ALT1); +} + +EXPORT_SYMBOL(gpio_spdif_inactive); + +/*! + * This function activates DAM ports 3 to enable + * audio I/O. + */ +void gpio_activate_audio_ports(void) +{ + unsigned int pad_val; + + mxc_request_iomux(MX35_PIN_STXD4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SRXD4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SCK4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_STXFS4, MUX_CONFIG_FUNC); + + pad_val = PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_PUE_PUD; + mxc_iomux_set_pad(MX35_PIN_STXD4, pad_val); + mxc_iomux_set_pad(MX35_PIN_SRXD4, pad_val); + mxc_iomux_set_pad(MX35_PIN_SCK4, pad_val); + mxc_iomux_set_pad(MX35_PIN_STXFS4, pad_val); +} + +EXPORT_SYMBOL(gpio_activate_audio_ports); + +/*! + * This function deactivates DAM ports 3 to disable + * audio I/O. + */ +void gpio_inactivate_audio_ports(void) +{ + mxc_free_iomux(MX35_PIN_STXD4, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_SRXD4, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_SCK4, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_STXFS4, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_inactivate_audio_ports); + +/*! + * This function activates DAM ports 5 to enable + * audio I/O. + */ +void gpio_activate_bt_audio_port(void) +{ + unsigned int pad_val; + + mxc_request_iomux(MX35_PIN_STXD5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SRXD5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SCK5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_STXFS5, MUX_CONFIG_FUNC); + + pad_val = PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_PUE_PUD; + mxc_iomux_set_pad(MX35_PIN_STXD5, pad_val); + mxc_iomux_set_pad(MX35_PIN_SRXD5, pad_val); + mxc_iomux_set_pad(MX35_PIN_SCK5, pad_val); + mxc_iomux_set_pad(MX35_PIN_STXFS5, pad_val); + if (board_is_rev(BOARD_REV_2)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 5, 0); + else + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 0, 0); +} + +EXPORT_SYMBOL(gpio_activate_bt_audio_port); + +/*! + * Setup GPIO for bluetooth audio to be inactive + */ +void gpio_inactivate_bt_audio_port(void) +{ + mxc_free_iomux(MX35_PIN_STXD5, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_SRXD5, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_SCK5, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_STXFS5, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_inactivate_bt_audio_port); + +/*! + * Setup GPIO for ATA interface + * + */ +void gpio_ata_active(void) +{ + unsigned int ata_ctl_pad_cfg, ata_dat_pad_cfg; + + /* HDD_ENBALE */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 3, 0); + /* Power On the HDD */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 1); + msleep(300); + + /*IOMUX Settings */ + /*PATA_DIOR */ + mxc_request_iomux(MX35_PIN_ATA_DIOR, MUX_CONFIG_FUNC); + /*PATA_DIOW */ + mxc_request_iomux(MX35_PIN_ATA_DIOW, MUX_CONFIG_FUNC); + /*PATA_DMARQ_B */ + mxc_request_iomux(MX35_PIN_ATA_DMARQ, MUX_CONFIG_FUNC); + /*PATA_DMACK */ + mxc_request_iomux(MX35_PIN_ATA_DMACK, MUX_CONFIG_FUNC); + /*PATA_RESET_B */ + mxc_request_iomux(MX35_PIN_ATA_RESET_B, MUX_CONFIG_FUNC); + /*PATA_IORDY */ + mxc_request_iomux(MX35_PIN_ATA_IORDY, MUX_CONFIG_FUNC); + /*PATA_INTRQ_B */ + mxc_request_iomux(MX35_PIN_ATA_INTRQ, MUX_CONFIG_FUNC); + /*PATA_CS_0 */ + mxc_request_iomux(MX35_PIN_ATA_CS0, MUX_CONFIG_FUNC); + /*PATA_CS_1 */ + mxc_request_iomux(MX35_PIN_ATA_CS1, MUX_CONFIG_FUNC); + /*PATA_DA0 */ + mxc_request_iomux(MX35_PIN_ATA_DA0, MUX_CONFIG_FUNC); + /*PATA_DA1 */ + mxc_request_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_FUNC); + /*PATA_DA2 */ + mxc_request_iomux(MX35_PIN_ATA_DA2, MUX_CONFIG_FUNC); + /* BUFFER_ENABLE - HDD_ENABLE_B */ + mxc_request_iomux(MX35_PIN_ATA_BUFF_EN, MUX_CONFIG_FUNC); + + /*PATA_D0 */ + mxc_request_iomux(MX35_PIN_ATA_DATA0, MUX_CONFIG_FUNC); + /*PATA_D1 */ + mxc_request_iomux(MX35_PIN_ATA_DATA1, MUX_CONFIG_FUNC); + /*PATA_D2 */ + mxc_request_iomux(MX35_PIN_ATA_DATA2, MUX_CONFIG_FUNC); + /*PATA_D3 */ + mxc_request_iomux(MX35_PIN_ATA_DATA3, MUX_CONFIG_FUNC); + /*PATA_D4 */ + mxc_request_iomux(MX35_PIN_ATA_DATA4, MUX_CONFIG_FUNC); + /*PATA_D5 */ + mxc_request_iomux(MX35_PIN_ATA_DATA5, MUX_CONFIG_FUNC); + /*PATA_D6 */ + mxc_request_iomux(MX35_PIN_ATA_DATA6, MUX_CONFIG_FUNC); + /*PATA_D7 */ + mxc_request_iomux(MX35_PIN_ATA_DATA7, MUX_CONFIG_FUNC); + /*PATA_D8 */ + mxc_request_iomux(MX35_PIN_ATA_DATA8, MUX_CONFIG_FUNC); + /*PATA_D9 */ + mxc_request_iomux(MX35_PIN_ATA_DATA9, MUX_CONFIG_FUNC); + /*PATA_D10 */ + mxc_request_iomux(MX35_PIN_ATA_DATA10, MUX_CONFIG_FUNC); + /*PATA_D11 */ + mxc_request_iomux(MX35_PIN_ATA_DATA11, MUX_CONFIG_FUNC); + /*PATA_D12 */ + mxc_request_iomux(MX35_PIN_ATA_DATA12, MUX_CONFIG_FUNC); + /*PATA_D13 */ + mxc_request_iomux(MX35_PIN_ATA_DATA13, MUX_CONFIG_FUNC); + /*PATA_D14 */ + mxc_request_iomux(MX35_PIN_ATA_DATA14, MUX_CONFIG_FUNC); + /*PATA_D15 */ + mxc_request_iomux(MX35_PIN_ATA_DATA15, MUX_CONFIG_FUNC); + + /* IOMUX Pad Settings */ + ata_ctl_pad_cfg = PAD_CTL_SRE_SLOW | PAD_CTL_DRV_NORMAL | + PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | + PAD_CTL_HYS_CMOS | PAD_CTL_DRV_3_3V; + ata_dat_pad_cfg = PAD_CTL_SRE_FAST | PAD_CTL_DRV_MAX | + PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_3_3V; + + mxc_iomux_set_pad(MX35_PIN_ATA_DMARQ, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DIOR, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DIOW, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DMACK, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_RESET_B, PAD_CTL_SRE_SLOW | + PAD_CTL_DRV_NORMAL | PAD_CTL_ODE_CMOS | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | + PAD_CTL_100K_PU | PAD_CTL_HYS_CMOS | + PAD_CTL_DRV_3_3V); + mxc_iomux_set_pad(MX35_PIN_ATA_IORDY, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_INTRQ, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_CS0, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_CS1, ata_ctl_pad_cfg); + + mxc_iomux_set_pad(MX35_PIN_ATA_DATA0, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA1, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA2, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA3, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA4, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA5, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA6, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA7, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA8, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA9, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA10, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA11, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA12, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA13, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA14, ata_dat_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DATA15, ata_dat_pad_cfg); + + mxc_iomux_set_pad(MX35_PIN_ATA_DA0, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DA1, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_DA2, ata_ctl_pad_cfg); + mxc_iomux_set_pad(MX35_PIN_ATA_BUFF_EN, ata_ctl_pad_cfg); +} + +EXPORT_SYMBOL(gpio_ata_active); + +/*! + * Restore ATA interface pins to reset values + * + */ +void gpio_ata_inactive(void) +{ + /*Turn off the IOMUX for ATA group B signals */ + mxc_free_iomux(MX35_PIN_ATA_DATA0, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA1, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA2, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA3, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA4, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA5, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA6, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA7, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA8, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA9, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA10, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA11, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA12, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA13, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA14, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DATA15, MUX_CONFIG_FUNC); + + /* Config the multiplex pin of ATA interface DIR, DA0-2, INTRQ, DMARQ */ + mxc_free_iomux(MX35_PIN_ATA_DMARQ, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DIOR, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DIOW, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DMACK, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_RESET_B, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_IORDY, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_INTRQ, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_CS0, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_CS1, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DA0, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_DA2, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_ATA_BUFF_EN, MUX_CONFIG_FUNC); + + /* Power Off the HDD */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 0); + /* HDD_ENBALE */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 3, 1); +} + +EXPORT_SYMBOL(gpio_ata_inactive); + +/*! + * This function activates ESAI ports to enable + * surround sound I/O + */ +void gpio_activate_esai_ports(void) +{ + unsigned int pad_val; + /* ESAI TX - WM8580 */ + mxc_request_iomux(MX35_PIN_HCKT, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SCKT, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FST, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_FUNC); + + /* ESAI RX - AK5702 */ + /*mxc_request_iomux(MX35_PIN_HCKR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SCKR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FSR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_TX4_RX1, MUX_CONFIG_FUNC);*/ + + pad_val = PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_PUE_PUD; + /* ESAI TX - WM8580 */ + mxc_iomux_set_pad(MX35_PIN_SCKT, pad_val); + mxc_iomux_set_pad(MX35_PIN_FST, pad_val); + mxc_iomux_set_pad(MX35_PIN_TX0, pad_val); + mxc_iomux_set_pad(MX35_PIN_TX1, pad_val); + mxc_iomux_set_pad(MX35_PIN_TX2_RX3, pad_val); + + /* ESAI RX - AK5702 */ + /*mxc_iomux_set_pad(MX35_PIN_SCKR, pad_val); + mxc_iomux_set_pad(MX35_PIN_FSR, pad_val); + mxc_iomux_set_pad(MX35_PIN_TX3_RX2, pad_val); + mxc_iomux_set_pad(MX35_PIN_TX4_RX1, pad_val);*/ + + pad_val = + PAD_CTL_DRV_HIGH | PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_PUE_PUD; + + /* ESAI TX - WM8580 */ + mxc_iomux_set_pad(MX35_PIN_HCKT, pad_val); + /* ESAI RX - AK5702 */ + /*mxc_iomux_set_pad(MX35_PIN_HCKR, pad_val);*/ +} + +EXPORT_SYMBOL(gpio_activate_esai_ports); + +/*! + * This function deactivates ESAI ports to disable + * surround sound I/O + */ +void gpio_deactivate_esai_ports(void) +{ + + mxc_free_iomux(MX35_PIN_HCKT, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_SCKT, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_FST, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_TX0, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_TX1, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_FUNC); + /*mxc_free_iomux(MX35_PIN_HCKR, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_SCKR, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_FSR, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX35_PIN_TX4_RX1, MUX_CONFIG_GPIO);*/ +} + +EXPORT_SYMBOL(gpio_deactivate_esai_ports); + +/*! + * This function enable and reset GPS GPIO + */ +void gpio_gps_active(void) +{ + /* Pull GPIO1_5 to be low for routing signal to UART3/GPS */ + if (board_is_rev(BOARD_REV_2)) { + mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX35_PIN_COMPARE, PAD_CTL_DRV_NORMAL | + PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_DRV_3_3V | PAD_CTL_PUE_PUD | + PAD_CTL_SRE_SLOW); + gpio_direction_output(IOMUX_TO_GPIO(MX35_PIN_COMPARE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX35_PIN_COMPARE), 0); + } + + /* PWR_EN_GPS is set to be 0, will be toggled on in app by ioctl */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0); + + /* GPS 32KHz clock enbale */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 7, 1); + + /* GPS reset */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 0); + msleep(5); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 1); + msleep(5); +} + +EXPORT_SYMBOL(gpio_gps_active); + +/*! + * This function get GPS GPIO status. + */ +int gpio_gps_access(int para) +{ + unsigned int gps_val; + + if (para & 0x4) { /* Read GPIO */ + if (para & 0x1) /* Read PWR_EN */ + pmic_gpio_get_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, + &gps_val); + else /* Read nReset */ + pmic_gpio_get_bit_val(MCU_GPIO_REG_RESET_1, 5, + &gps_val); + return gps_val; + } else { /* Write GPIO */ + gps_val = (para & 0x2) ? 1 : 0; + if (para & 0x1) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, + gps_val); + else + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, gps_val); + } + return 0; +} + +EXPORT_SYMBOL(gpio_gps_access); + +/*! + * This function disable GPS GPIO + */ +void gpio_gps_inactive(void) +{ + /* GPS disable */ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0); + /* Free GPIO1_5 */ + if (board_is_rev(BOARD_REV_2)) + mxc_free_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_gps_inactive); + +/*! + * The MLB gpio configuration routine + */ +void gpio_mlb_active(void) +{ + mxc_request_iomux(MX35_PIN_MLB_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_MLB_SIG, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_MLB_DAT, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_mlb_active); + +void gpio_mlb_inactive(void) +{ + mxc_free_iomux(MX35_PIN_MLB_CLK, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_MLB_SIG, MUX_CONFIG_FUNC); + mxc_free_iomux(MX35_PIN_MLB_DAT, MUX_CONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_mlb_inactive); + +void gpio_can_active(int id) +{ + int pad; + + switch (id) { + case 0: + pad = PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | \ + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH; + mxc_request_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_ALT1); + mxc_request_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX35_PIN_I2C2_CLK, pad); + mxc_iomux_set_pad(MX35_PIN_I2C2_DAT, pad); + mxc_iomux_set_input(MUX_IN_CAN1_CANRX, INPUT_CTL_PATH0); + break; + case 1: + pad = PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU; + mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_ALT1); + mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX35_PIN_FEC_MDC, pad); + mxc_iomux_set_pad(MX35_PIN_FEC_MDIO, pad); + mxc_iomux_set_input(MUX_IN_CAN2_CANRX, INPUT_CTL_PATH2); + break; + default: + printk(KERN_ERR "NO such device\n"); + } +} + +void gpio_can_inactive(int id) +{ + switch (id) { + case 0: + mxc_free_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_ALT1); + mxc_free_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_ALT1); + mxc_iomux_set_input(MUX_IN_CAN1_CANRX, INPUT_CTL_PATH0); + break; + case 1: + mxc_free_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_ALT1); + mxc_free_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_ALT1); + mxc_iomux_set_input(MUX_IN_CAN2_CANRX, INPUT_CTL_PATH0); + break; + default: + printk(KERN_ERR "NO such device\n"); + } +} + +void gpio_pmic_active(void) +{ + unsigned int pad_val = PAD_CTL_SRE_SLOW | PAD_CTL_DRV_NORMAL + | PAD_CTL_HYS_CMOS | PAD_CTL_100K_PU | PAD_CTL_DRV_3_3V; + mxc_request_iomux(MX35_PIN_GPIO2_0, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX35_PIN_GPIO2_0, pad_val); + gpio_request(IOMUX_TO_GPIO(MX35_PIN_GPIO2_0), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX35_PIN_GPIO2_0)); +} + +EXPORT_SYMBOL(gpio_pmic_active); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/clock.c @@ -0,0 +1,1934 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "crm_regs.h" + +#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ +#define PROPAGATE_RATE_DIS 2 + +struct timer_list dptcen_timer; +static int cpu_curr_wp; +static struct cpu_wp *cpu_wp_tbl; +static int cpu_wp_nr; +static int cpu_wp_offset; + +static struct clk mcu_pll_clk; +static struct clk peri_pll_clk; +static struct clk ipg_clk; +static struct clk ckih_clk; +static struct clk ckie_clk; +static struct clk ahb_clk; +static struct clk cpu_clk; + +#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel)) +#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF) +#define CLK_CODE_AHB(c) (((c) >> 8) & 0xFF) +#define CLK_CODE_PATH(c) ((c) & 0xFF) + +static int __get_arm_div(unsigned long pdr0, int *fi, int *fd); + +static int g_clk_mux_auto[8] = { + CLK_CODE(1, 3, 0), CLK_CODE(1, 2, 1), CLK_CODE(2, 1, 1), -1, + CLK_CODE(1, 6, 0), CLK_CODE(1, 4, 1), CLK_CODE(2, 2, 1), -1, +}; + +static int g_clk_mux_consumer[16] = { + CLK_CODE(1, 4, 0), CLK_CODE(1, 3, 1), CLK_CODE(2, 2, 0), -1, + -1, -1, CLK_CODE(4, 1, 0), CLK_CODE(1, 5, 0), + CLK_CODE(1, 8, 0), CLK_CODE(1, 6, 1), CLK_CODE(2, 4, 0), -1, + -1, -1, CLK_CODE(4, 2, 0), -1, +}; + +static int g_hsp_div_table[3][16] = { + {4, 3, 2, -1, -1, -1, 1, 5, 4, 3, 2, -1, -1, -1, 1, -1}, + {-1, -1, -1, -1, -1, -1, -1, -1, 8, 6, 4, -1, -1, -1, 2, -1}, + {3, -1, -1, -1, -1, -1, -1, -1, 3, -1, -1, -1, -1, -1, -1, -1}, +}; + +static void __calc_dividers(u32 div, u32 *pre, u32 *post, u32 base) +{ + u32 min_pre, temp_pre, old_err, err; + min_pre = (div - 1) / base + 1; + old_err = 8; + for (temp_pre = 8; temp_pre >= min_pre; temp_pre--) { + if (div > (temp_pre * base)) + break; + if (div < (temp_pre * temp_pre)) + continue; + err = div % temp_pre; + if (err == 0) { + *pre = temp_pre; + break; + } + err = temp_pre - err; + if (err < old_err) { + old_err = err; + *pre = temp_pre; + } + } + *post = (div + *pre - 1) / *pre; +} + +static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post) +{ + if (div >= 512) { + *pre = 8; + *post = 64; + } else if (div >= 64) { + __calc_dividers(div, pre, post, 64); + } else if (div <= 8) { + *pre = div; + *post = 1; + } else { + *pre = 1; + *post = div; + } +} + +static void __calc_two_dividers(u32 div, u32 *pre, u32 *post) +{ + if (div >= 64) { + *pre = *post = 8; + } else if (div > 8) { + __calc_dividers(div, pre, post, 8); + } else { + *pre = 1; + *post = div; + } +} + +static unsigned long _clk_per_post_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 pre, post; + u32 div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + __calc_pre_post_dividers(div, &pre, &post); + + return clk->parent->rate / (pre * post); +} + +static unsigned long _clk_round_rate(struct clk *clk, unsigned long rate) +{ + u32 pre, post; + u32 div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + __calc_two_dividers(div, &pre, &post); + return clk->parent->rate / (pre * post); + } else + return clk->parent->rate / div; +} + +static int __switch_cpu_wp(struct clk *clk, unsigned long rate) +{ + int i; + u32 reg_value; + if (cpu_wp_tbl[cpu_curr_wp].cpu_rate < rate) { + for (i = cpu_curr_wp + 2; i < cpu_wp_nr; i += 2) { + if (rate == cpu_wp_tbl[i].cpu_rate) + goto found; + } + return -EINVAL; + } else { + for (i = cpu_curr_wp - 2; i >= 0; i -= 2) { + if (rate == cpu_wp_tbl[i].cpu_rate) + goto found; + } + return -EINVAL; + } + found: + reg_value = __raw_readl(MXC_CCM_PDR0); + reg_value = (reg_value & ~(MXC_CCM_PDR0_CON_MUX_DIV_MASK | + MXC_CCM_PDR0_AUTO_MUX_DIV_MASK)) | + cpu_wp_tbl[i].pdr0_reg; + __raw_writel(reg_value, MXC_CCM_PDR0); + + if (cpu_wp_tbl[i].pll_rate != cpu_wp_tbl[cpu_curr_wp].pll_rate) + clk_set_rate(clk->parent, cpu_wp_tbl[i].pll_rate); + cpu_curr_wp = i; + clk->rate = rate; + return 0; +} + +static int __switch_cpu_rate(struct clk *clk, unsigned long rate) +{ + int prev; + unsigned long tmp; + int arm_div, fi, fd, start, end; + u32 reg_value; + + if (cpu_wp_tbl[cpu_curr_wp].cpu_rate < rate) { + start = cpu_curr_wp + 2; + end = cpu_wp_nr; + prev = cpu_curr_wp; + } else { + start = cpu_wp_offset + 2; + end = cpu_curr_wp; + prev = cpu_wp_offset; + } + while (start < end) { + arm_div = __get_arm_div(cpu_wp_tbl[start].pdr0_reg, &fi, &fd); + tmp = (mcu_pll_clk.rate * fi) / (arm_div * fd); + if (tmp == rate) { + prev = start; + break; + } + if (tmp < rate) { + if (prev < start) + prev = start; + } else { + break; + } + start += 2; + } + if (start >= end) + return -EINVAL; + + if (prev == cpu_curr_wp) + return 0; + + reg_value = __raw_readl(MXC_CCM_PDR0); + reg_value = (reg_value & ~(MXC_CCM_PDR0_CON_MUX_DIV_MASK | + MXC_CCM_PDR0_AUTO_MUX_DIV_MASK)) | + cpu_wp_tbl[prev].pdr0_reg; + __raw_writel(reg_value, MXC_CCM_PDR0); + + cpu_curr_wp = prev; + clk->rate = rate; + return 0; +} + +static int __get_arm_div(unsigned long pdr0, int *fi, int *fd) +{ + int *pclk_mux; + if ((pdr0 & MXC_CCM_PDR0_AUTO_CON) + || (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) + pclk_mux = + g_clk_mux_consumer + + ((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> + MXC_CCM_PDR0_CON_MUX_DIV_OFFSET); + else { + pclk_mux = g_clk_mux_auto + + ((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >> + MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET); + } + + if ((*pclk_mux) == -1) { + BUG(); + return -EINVAL; + } + + if (fi && fd) { + if (!CLK_CODE_PATH(*pclk_mux)) { + *fi = *fd = 1; + return CLK_CODE_ARM(*pclk_mux); + } + if ((pdr0 & MXC_CCM_PDR0_AUTO_CON) + || (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) { + *fi = 3; + *fd = 4; + } else { + *fi = 2; + *fd = 3; + } + } + return CLK_CODE_ARM(*pclk_mux); +} + +static int __get_ahb_div(unsigned long pdr0) +{ + int *pclk_mux; + if ((pdr0 & MXC_CCM_PDR0_AUTO_CON) + || (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) { + pclk_mux = + g_clk_mux_consumer + + ((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> + MXC_CCM_PDR0_CON_MUX_DIV_OFFSET); + } else { + pclk_mux = g_clk_mux_auto + + ((pdr0 & MXC_CCM_PDR0_AUTO_MUX_DIV_MASK) >> + MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET); + } + + if ((*pclk_mux) == -1) { + BUG(); + return -EINVAL; + } + return CLK_CODE_AHB(*pclk_mux); +} + +static void sync_cpu_wb(void) +{ + int i; + struct cpu_wp *p; + unsigned long reg = __raw_readl(MXC_CCM_PDR0); + if ((reg & MXC_CCM_PDR0_AUTO_CON) + || (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) { + reg &= MXC_CCM_PDR0_CON_MUX_DIV_MASK; + } else { + reg &= MXC_CCM_PDR0_AUTO_MUX_DIV_MASK; + } + for (i = 0; i < cpu_wp_nr; i++) { + p = cpu_wp_tbl + cpu_curr_wp; + if (p->pdr0_reg == (reg & 0xF0E00)) + break; + cpu_curr_wp = (cpu_curr_wp + 1) % cpu_wp_nr; + } + cpu_wp_offset = cpu_curr_wp & 1; +} + +static int _clk_enable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg |= 3 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + + return 0; +} + +static void _clk_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(3 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); +} + +static void _clk_emi_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(3 << clk->enable_shift); + reg |= (1 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); +} + +static int _clk_asrc_enable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(MXC_CCM_COSR); + __raw_writel(reg | MXC_CCM_COSR_ASRC_AUDIO_EN, MXC_CCM_COSR); + return 0; +} + +static void _clk_asrc_disable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(MXC_CCM_COSR); + __raw_writel(reg & (~MXC_CCM_COSR_ASRC_AUDIO_EN), MXC_CCM_COSR); +} + +static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + signed long pd = 1; /* Pre-divider */ + signed long mfi; /* Multiplication Factor (Integer part) */ + signed long mfn; /* Multiplication Factor (Integer part) */ + signed long mfd; /* Multiplication Factor (Denominator Part) */ + signed long tmp; + u32 ref_freq = clk->parent->rate; + + if ((clk == &mcu_pll_clk) + && (clk->parent->rate == cpu_wp_tbl[cpu_curr_wp].pll_rate)) { + __raw_writel(cpu_wp_tbl[cpu_curr_wp].pll_reg, MXC_CCM_MPCTL); + clk->rate = rate; + return 0; + } + + while (((ref_freq / pd) * 10) > rate) + pd++; + + if ((ref_freq / pd) < PRE_DIV_MIN_FREQ) + return -EINVAL; + + /* the ref_freq/2 in the following is to round up */ + mfi = (((rate / 2) * pd) + (ref_freq / 2)) / ref_freq; + if (mfi < 5 || mfi > 15) + return -EINVAL; + + /* pick a mfd value that will work + * then solve for mfn */ + mfd = ref_freq / 50000; + + /* + * pll_freq * pd * mfd + * mfn = -------------------- - (mfi * mfd) + * 2 * ref_freq + */ + /* the tmp/2 is for rounding */ + tmp = ref_freq / 10000; + mfn = + ((((((rate / 2) + (tmp / 2)) / tmp) * pd) * mfd) / 10000) - + (mfi * mfd); + + mfn = mfn & 0x3ff; + pd--; + mfd--; + + /* Change the Pll value */ + reg = (mfi << MXC_CCM_PCTL_MFI_OFFSET) | + (mfn << MXC_CCM_PCTL_MFN_OFFSET) | + (mfd << MXC_CCM_PCTL_MFD_OFFSET) | (pd << MXC_CCM_PCTL_PD_OFFSET); + + if (clk == &mcu_pll_clk) + __raw_writel(reg, MXC_CCM_MPCTL); + else if (clk == &peri_pll_clk) + __raw_writel(reg, MXC_CCM_PPCTL); + + clk->rate = rate; + return 0; +} + +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) +{ + if ((rate < ahb_clk.rate) || (rate % ahb_clk.rate != 0)) { + printk(KERN_ERR "Wrong rate %lu in _clk_cpu_set_rate\n", rate); + return -EINVAL; + } + + if (clk->rate == rate) + return 0; + + if (clk->parent->rate == cpu_wp_tbl[cpu_curr_wp].pll_rate) + return __switch_cpu_wp(clk, rate); + return __switch_cpu_rate(clk, rate); +} + +static void _clk_pll_recalc(struct clk *clk) +{ + long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; + unsigned long reg = 0; + s64 temp; + + ref_clk = ckih_clk.rate; + + if (clk == &mcu_pll_clk) + reg = __raw_readl(MXC_CCM_MPCTL); + else if (clk == &peri_pll_clk) + reg = __raw_readl(MXC_CCM_PPCTL); + else + BUG(); + + pdf = (reg & MXC_CCM_PCTL_PD_MASK) >> MXC_CCM_PCTL_PD_OFFSET; + mfd = (reg & MXC_CCM_PCTL_MFD_MASK) >> MXC_CCM_PCTL_MFD_OFFSET; + mfi = (reg & MXC_CCM_PCTL_MFI_MASK) >> MXC_CCM_PCTL_MFI_OFFSET; + mfi = (mfi <= 5) ? 5 : mfi; + mfn = mfn_abs = reg & MXC_CCM_PCTL_MFN_MASK; + + if (mfn >= 0x200) { + mfn |= 0xFFFFFE00; + mfn_abs = -mfn; + } + + ref_clk *= 2; + ref_clk /= pdf + 1; + + temp = (u64) ref_clk * mfn_abs; + do_div(temp, mfd + 1); + if (mfn < 0) + temp = -temp; + temp = (ref_clk * mfi) + temp; + + clk->rate = temp; +} + +static int _clk_peri_pll_enable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(MXC_CCM_CCMR); + reg |= MXC_CCM_CCMR_UPE; + __raw_writel(reg, MXC_CCM_CCMR); + + /* No lock bit on MX31, so using max time from spec */ + udelay(80); + + return 0; +} + +static void _clk_peri_pll_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_UPE; + __raw_writel(reg, MXC_CCM_CCMR); +} + +#define PDR0(mask, off) ((__raw_readl(MXC_CCM_PDR0) & mask) >> off) +#define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) & mask) >> off) +#define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) & mask) >> off) +#define PDR3(mask, off) ((__raw_readl(MXC_CCM_PDR3) & mask) >> off) +#define PDR4(mask, off) ((__raw_readl(MXC_CCM_PDR4) & mask) >> off) + +static void _clk_cpu_recalc(struct clk *clk) +{ + unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0); + int arm_div, fi, fd; + if (clk->parent->rate == cpu_wp_tbl[cpu_curr_wp].pll_rate) { + clk->rate = cpu_wp_tbl[cpu_curr_wp].cpu_rate; + } else { + arm_div = __get_arm_div(pdr0, &fi, &fd); + clk->rate = (clk->parent->rate * fi) / (arm_div * fd); + } +} + +static void _clk_hclk_recalc(struct clk *clk) +{ + unsigned long ahb_div, pdr0 = __raw_readl(MXC_CCM_PDR0); + ahb_div = __get_ahb_div(pdr0); + clk->rate = clk->parent->rate / ahb_div; +} + +static void _clk_ipg_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate / 2; +} + +static void _clk_nfc_recalc(struct clk *clk) +{ + unsigned long nfc_pdf; + + nfc_pdf = PDR4(MXC_CCM_PDR4_NFC_PODF_MASK, + MXC_CCM_PDR4_NFC_PODF_OFFSET); + clk->rate = clk->parent->rate / (nfc_pdf + 1); +} + +static void _clk_hsp_recalc(struct clk *clk) +{ + int hsp_pdf; + unsigned long reg; + reg = __raw_readl(MXC_CCM_PDR0); + + if ((reg & MXC_CCM_PDR0_AUTO_CON) + || (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) { + hsp_pdf = + (reg & MXC_CCM_PDR0_HSP_PODF_MASK) >> + MXC_CCM_PDR0_HSP_PODF_OFFSET; + reg = + (reg & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> + MXC_CCM_PDR0_CON_MUX_DIV_OFFSET; + if (hsp_pdf < 3) { + hsp_pdf = g_hsp_div_table[hsp_pdf][reg]; + if (hsp_pdf > 0) + clk->rate = clk->parent->rate / hsp_pdf; + } + } else { + clk->rate = clk->parent->rate; + } +} + +static void _clk_mlb_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate * 2; +} + +static void _clk_usb_recalc(struct clk *clk) +{ + unsigned long usb_podf, usb_prdf; + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + usb_podf = PDR4(MXC_CCM_PDR4_USB_PODF_MASK, + MXC_CCM_PDR4_USB_PODF_OFFSET); + usb_prdf = PDR4(MXC_CCM_PDR4_USB_PRDF_MASK, + MXC_CCM_PDR4_USB_PRDF_OFFSET); + clk->rate = + clk->parent->rate / ((usb_prdf + 1) * (usb_podf + 1)); + } else { + usb_podf = PDR4(MXC_CCM_PDR4_USB_PODF_MASK_V2, + MXC_CCM_PDR4_USB_PODF_OFFSET); + clk->rate = clk->parent->rate / (usb_podf + 1); + } +} + +static int _clk_usb_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 podf, prdf; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + __calc_two_dividers(div, &prdf, &podf); + reg = __raw_readl(MXC_CCM_PDR4) & + ~(MXC_CCM_PDR4_USB_PODF_MASK | MXC_CCM_PDR4_USB_PRDF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR4_USB_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR4_USB_PRDF_OFFSET; + } else { + podf = div - 1; + reg = + __raw_readl(MXC_CCM_PDR4) & ~MXC_CCM_PDR4_USB_PODF_MASK_V2; + reg |= (podf - 1) << MXC_CCM_PDR4_USB_PODF_OFFSET; + } + __raw_writel(reg, MXC_CCM_PDR4); + clk->rate = rate; + return 0; +} + +static void _clk_csi_recalc(struct clk *clk) +{ + u32 podf, prdf; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = PDR2(MXC_CCM_PDR2_CSI_PRDF_MASK, + MXC_CCM_PDR2_CSI_PRDF_OFFSET); + podf = + PDR2(MXC_CCM_PDR2_CSI_PODF_MASK, + MXC_CCM_PDR2_CSI_PODF_OFFSET); + clk->rate = clk->parent->rate / ((prdf + 1) * (podf + 1)); + } else { + podf = + PDR2(MXC_CCM_PDR2_CSI_PODF_MASK_V2, + MXC_CCM_PDR2_CSI_PODF_OFFSET); + clk->rate = clk->parent->rate / (podf + 1); + } +} + +static int _clk_csi_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 prdf, podf; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + __calc_two_dividers(div, &prdf, &podf); + reg = __raw_readl(MXC_CCM_PDR2) & + ~(MXC_CCM_PDR2_CSI_PRDF_MASK | MXC_CCM_PDR2_CSI_PODF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR2_CSI_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR2_CSI_PRDF_OFFSET; + } else { + reg = + __raw_readl(MXC_CCM_PDR2) & ~MXC_CCM_PDR2_CSI_PODF_MASK_V2; + reg |= (div - 1) << MXC_CCM_PDR2_CSI_PODF_OFFSET; + } + + /* Set CSI clock divider */ + __raw_writel(reg, MXC_CCM_PDR2); + clk->rate = rate; + return 0; +} + +static int _clk_csi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + if (parent == &cpu_clk) + reg = __raw_readl(MXC_CCM_PDR2) | MXC_CCM_PDR2_CSI_M_U; + else if (parent == &peri_pll_clk) + reg = __raw_readl(MXC_CCM_PDR2) & (~MXC_CCM_PDR2_CSI_M_U); + else + return -EINVAL; + __raw_writel(reg, MXC_CCM_PDR2); + return 0; +} + +static void _clk_per_recalc(struct clk *clk) +{ + u32 podf = 0, prdf = 0; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + if (clk->parent == &cpu_clk) { + prdf = PDR4(MXC_CCM_PDR4_PER0_PRDF_MASK, + MXC_CCM_PDR4_PER0_PRDF_OFFSET); + podf = PDR4(MXC_CCM_PDR4_PER0_PODF_MASK, + MXC_CCM_PDR4_PER0_PODF_OFFSET); + } else { + podf = PDR0(MXC_CCM_PDR0_PER_PODF_MASK, + MXC_CCM_PDR0_PER_PODF_OFFSET); + } + clk->rate = clk->parent->rate / ((podf + 1) * (prdf + 1)); + } else { + if (clk->parent == &ahb_clk) + podf = PDR0(MXC_CCM_PDR0_PER_PODF_MASK, + MXC_CCM_PDR0_PER_PODF_OFFSET); + else if (clk->parent == &cpu_clk) { + podf = PDR4(MXC_CCM_PDR4_PER0_PODF_MASK_V2, + MXC_CCM_PDR4_PER0_PODF_OFFSET); + } + clk->rate = clk->parent->rate / (podf + 1); + } +} + +static void _clk_uart_per_recalc(struct clk *clk) +{ + unsigned long podf, prdf; + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = PDR4(MXC_CCM_PDR4_UART_PRDF_MASK, + MXC_CCM_PDR4_UART_PRDF_OFFSET); + podf = PDR4(MXC_CCM_PDR4_UART_PODF_MASK, + MXC_CCM_PDR4_UART_PODF_OFFSET); + clk->rate = clk->parent->rate / ((prdf + 1) * (podf + 1)); + } else { + podf = + PDR4(MXC_CCM_PDR4_UART_PODF_MASK_V2, + MXC_CCM_PDR4_UART_PODF_OFFSET); + clk->rate = clk->parent->rate / (podf + 1); + } + +} + +static int _clk_uart_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 prdf, podf; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + /* Set UART clock divider */ + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + __calc_two_dividers(div, &prdf, &podf); + reg = __raw_readl(MXC_CCM_PDR4) & + ~(MXC_CCM_PDR4_UART_PRDF_MASK | + MXC_CCM_PDR4_UART_PODF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR4_UART_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR4_UART_PRDF_OFFSET; + } else { + reg = + __raw_readl(MXC_CCM_PDR4) & ~MXC_CCM_PDR4_UART_PODF_MASK_V2; + reg |= (div - 1) << MXC_CCM_PDR4_UART_PODF_OFFSET; + } + __raw_writel(reg, MXC_CCM_PDR4); + clk->rate = rate; + return 0; +} + +static void _clk_ssi_recalc(struct clk *clk) +{ + unsigned long ssi_pdf, ssi_prepdf; + + if (clk->id == 1) { + ssi_pdf = PDR2(MXC_CCM_PDR2_SSI2_PODF_MASK, + MXC_CCM_PDR2_SSI2_PODF_OFFSET); + ssi_prepdf = PDR2(MXC_CCM_PDR2_SSI2_PRDF_MASK, + MXC_CCM_PDR2_SSI2_PRDF_OFFSET); + } else { + ssi_pdf = PDR2(MXC_CCM_PDR2_SSI1_PODF_MASK, + MXC_CCM_PDR2_SSI1_PODF_OFFSET); + ssi_prepdf = PDR2(MXC_CCM_PDR2_SSI1_PRDF_MASK, + MXC_CCM_PDR2_SSI1_PRDF_OFFSET); + } + clk->rate = clk->parent->rate / ((ssi_prepdf + 1) * (ssi_pdf + 1)); +} + +static int _clk_ssi_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + if (clk->id == 1) { + reg = __raw_readl(MXC_CCM_PDR2) & + ~(MXC_CCM_PDR2_SSI2_PRDF_MASK | + MXC_CCM_PDR2_SSI2_PODF_MASK); + reg |= (post - 1) << MXC_CCM_PDR2_SSI2_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_PDR2_SSI2_PRDF_OFFSET; + } else { + reg = __raw_readl(MXC_CCM_PDR2) & + ~(MXC_CCM_PDR2_SSI1_PRDF_MASK | + MXC_CCM_PDR2_SSI1_PODF_MASK); + reg |= (post - 1) << MXC_CCM_PDR2_SSI1_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_PDR2_SSI1_PRDF_OFFSET; + } + __raw_writel(reg, MXC_CCM_PDR2); + + clk->rate = rate; + return 0; +} + +static void _clk_mstick1_recalc(struct clk *clk) +{ + unsigned long prdf, podf; + prdf = PDR1(MXC_CCM_PDR1_MSHC_PRDF_MASK, MXC_CCM_PDR1_MSHC_PRDF_OFFSET); + podf = PDR1(MXC_CCM_PDR1_MSHC_PODF_MASK, MXC_CCM_PDR1_MSHC_PODF_OFFSET); + clk->rate = clk->parent->rate / ((prdf + 1) * (podf + 1)); +} + +static int _clk_mstick1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + reg = __raw_readl(MXC_CCM_PDR1) & + ~(MXC_CCM_PDR1_MSHC_PRDF_MASK | MXC_CCM_PDR1_MSHC_PODF_MASK); + reg |= (post - 1) << MXC_CCM_PDR1_MSHC_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_PDR1_MSHC_PRDF_OFFSET; + __raw_writel(reg, MXC_CCM_PDR1); + + clk->rate = rate; + return 0; +} + +static int _clk_mstick1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + if (parent == &cpu_clk) + reg = __raw_readl(MXC_CCM_PDR1) | MXC_CCM_PDR1_MSHC_M_U; + else if (parent == &peri_pll_clk) + reg = __raw_readl(MXC_CCM_PDR1) & (~MXC_CCM_PDR1_MSHC_M_U); + else + return -EINVAL; + __raw_writel(reg, MXC_CCM_PDR1); + return 0; +} + +static void _clk_spdif_recalc(struct clk *clk) +{ + unsigned long prdf, podf; + prdf = + PDR3(MXC_CCM_PDR3_SPDIF_PRDF_MASK, MXC_CCM_PDR3_SPDIF_PRDF_OFFSET); + podf = + PDR3(MXC_CCM_PDR3_SPDIF_PODF_MASK, MXC_CCM_PDR3_SPDIF_PODF_OFFSET); + clk->rate = clk->parent->rate / ((prdf + 1) * (podf + 1)); +} + +static int _clk_spdif_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + reg = __raw_readl(MXC_CCM_PDR3) & + ~(MXC_CCM_PDR3_SPDIF_PRDF_MASK | MXC_CCM_PDR3_SPDIF_PODF_MASK); + reg |= (post - 1) << MXC_CCM_PDR3_SPDIF_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_PDR3_SPDIF_PRDF_OFFSET; + __raw_writel(reg, MXC_CCM_PDR3); + + clk->rate = rate; + return 0; +} + +static int _clk_spdif_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + if (parent == &cpu_clk) + reg = __raw_readl(MXC_CCM_PDR3) | MXC_CCM_PDR3_SPDIF_M_U; + else if (parent == &peri_pll_clk) + reg = __raw_readl(MXC_CCM_PDR3) & (~MXC_CCM_PDR3_SPDIF_M_U); + else + return -EINVAL; + __raw_writel(reg, MXC_CCM_PDR3); + return 0; +} + +static void _clk_asrc_recalc(struct clk *clk) +{ + unsigned long div; + div = __raw_readl(MXC_CCM_COSR) & MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK; + div = div >> MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET; + clk->rate = clk->parent->rate / (div + 1); +} + +static int _clk_asrc_set_rate(struct clk *clk, unsigned long rate) +{ + int div; + unsigned long reg; + if (clk->parent->rate % rate) + return -EINVAL; + + div = clk->parent->rate / rate; + reg = __raw_readl(MXC_CCM_COSR) & (~MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK); + reg |= (div - 1) << MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_COSR); + clk->rate = rate; + return 0; +} + +static void _clk_sdhc_recalc(struct clk *clk) +{ + u32 podf = 0, prdf = 0; + + switch (clk->id) { + case 0: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = PDR3(MXC_CCM_PDR3_ESDHC1_PRDF_MASK, + MXC_CCM_PDR3_ESDHC1_PRDF_OFFSET); + podf = PDR3(MXC_CCM_PDR3_ESDHC1_PODF_MASK, + MXC_CCM_PDR3_ESDHC1_PODF_OFFSET); + } else + podf = PDR3(MXC_CCM_PDR3_ESDHC1_PODF_MASK_V2, + MXC_CCM_PDR3_ESDHC1_PODF_OFFSET); + break; + case 1: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = PDR3(MXC_CCM_PDR3_ESDHC2_PRDF_MASK, + MXC_CCM_PDR3_ESDHC2_PRDF_OFFSET); + podf = PDR3(MXC_CCM_PDR3_ESDHC2_PODF_MASK, + MXC_CCM_PDR3_ESDHC2_PODF_OFFSET); + } else + podf = PDR3(MXC_CCM_PDR3_ESDHC2_PODF_MASK_V2, + MXC_CCM_PDR3_ESDHC2_PODF_OFFSET); + break; + case 2: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = PDR3(MXC_CCM_PDR3_ESDHC3_PRDF_MASK, + MXC_CCM_PDR3_ESDHC3_PRDF_OFFSET); + podf = PDR3(MXC_CCM_PDR3_ESDHC3_PODF_MASK, + MXC_CCM_PDR3_ESDHC3_PODF_OFFSET); + } else + podf = PDR3(MXC_CCM_PDR3_ESDHC3_PODF_MASK_V2, + MXC_CCM_PDR3_ESDHC3_PODF_OFFSET); + break; + default: + return; + } + clk->rate = clk->parent->rate / ((podf + 1) * (prdf + 1)); +} + +static int _clk_sdhc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 prdf, podf; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) + __calc_pre_post_dividers(div, &prdf, &podf); + + switch (clk->id) { + case 0: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + reg = __raw_readl(MXC_CCM_PDR3) & + ~(MXC_CCM_PDR3_ESDHC1_PRDF_MASK | + MXC_CCM_PDR3_ESDHC1_PODF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR3_ESDHC1_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR3_ESDHC1_PRDF_OFFSET; + } else { + reg = __raw_readl(MXC_CCM_PDR3) & + ~MXC_CCM_PDR3_ESDHC1_PODF_MASK_V2; + reg |= (div - 1) << MXC_CCM_PDR3_ESDHC1_PODF_OFFSET; + } + break; + case 1: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + reg = __raw_readl(MXC_CCM_PDR3) & + ~(MXC_CCM_PDR3_ESDHC2_PRDF_MASK | + MXC_CCM_PDR3_ESDHC2_PODF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR3_ESDHC2_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR3_ESDHC2_PRDF_OFFSET; + } else { + reg = __raw_readl(MXC_CCM_PDR3) & + ~MXC_CCM_PDR3_ESDHC2_PODF_MASK_V2; + reg |= (div - 1) << MXC_CCM_PDR3_ESDHC2_PODF_OFFSET; + } + break; + case 2: + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + reg = __raw_readl(MXC_CCM_PDR3) & + ~(MXC_CCM_PDR3_ESDHC3_PRDF_MASK | + MXC_CCM_PDR3_ESDHC3_PODF_MASK); + reg |= (podf - 1) << MXC_CCM_PDR3_ESDHC3_PODF_OFFSET; + reg |= (prdf - 1) << MXC_CCM_PDR3_ESDHC3_PRDF_OFFSET; + } else { + reg = __raw_readl(MXC_CCM_PDR3) & + ~MXC_CCM_PDR3_ESDHC3_PODF_MASK_V2; + reg |= (div - 1) << MXC_CCM_PDR3_ESDHC3_PODF_OFFSET; + } + break; + default: + return -EINVAL; + } + __raw_writel(reg, MXC_CCM_PDR3); + + clk->rate = rate; + return 0; +} + +static struct clk ckih_clk = { + .name = "ckih", + .rate = CKIH_CLK_FREQ, + .flags = RATE_FIXED, +}; + +static struct clk int_32k_clk = { + .name = "int_32k", + .rate = CKIL_CLK_FREQ, + .flags = RATE_FIXED, +}; + +static struct clk ext_32k_clk = { + .name = "ext_32k", + .rate = CKIL_EXT_FREQ, + .flags = RATE_FIXED, +}; + +static int _clk_ckil_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + if (parent == &int_32k_clk) { + reg = __raw_readl(MXC_CCM_PDR0) & (~MXC_CCM_PDR0_CKIL_SEL); + clk->rate = parent->rate; + } else if (parent == &ext_32k_clk) { + reg = __raw_readl(MXC_CCM_PDR0) | MXC_CCM_PDR0_CKIL_SEL; + clk->rate = parent->rate; + } else + return -EINVAL; + __raw_writel(reg, MXC_CCM_PDR0); + return 0; +} + +static int _clk_ckil_set_rate(struct clk *clk, unsigned long rate) +{ + clk->rate = clk->parent->rate; + return 0; +} + +static struct clk ckil_clk = { + .name = "ckil", + .parent = &ext_32k_clk, + .set_parent = _clk_ckil_set_parent, + .set_rate = _clk_ckil_set_rate, +}; + +static int _clk_ckie_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_PMCR2) & ~MXC_CCM_PMCR2_OSC_AUDIO_DOWN; + __raw_writel(reg, MXC_CCM_PMCR2); + + return 0; +} + +static void _clk_ckie_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_PMCR2) | MXC_CCM_PMCR2_OSC_AUDIO_DOWN; + __raw_writel(reg, MXC_CCM_PMCR2); +} + +static struct clk ckie_clk = { + .name = "ckie", + .rate = CKIE_CLK_FREQ, + .flags = RATE_FIXED, + .enable = _clk_ckie_enable, + .disable = _clk_ckie_disable, +}; + +static struct clk mcu_pll_clk = { + .name = "mcu_pll", + .parent = &ckih_clk, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk peri_pll_clk = { + .name = "peri_pll", + .parent = &ckih_clk, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .enable = _clk_peri_pll_enable, + .disable = _clk_peri_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static struct clk cpu_clk = { + .name = "cpu_clk", + .parent = &mcu_pll_clk, + .recalc = _clk_cpu_recalc, + .set_rate = _clk_cpu_set_rate, +}; + +static struct clk ahb_clk = { + .name = "ahb_clk", + .parent = &cpu_clk, + .recalc = _clk_hclk_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .recalc = _clk_ipg_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk perclk_clk = { + .name = "perclk_clk", + .parent = &ahb_clk, + .recalc = _clk_per_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk uart_per_clk = { + .name = "uart_per_clk", + .parent = &peri_pll_clk, + .recalc = _clk_uart_per_recalc, + .round_rate = _clk_round_rate, + .set_rate = _clk_uart_set_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk asrc_clk[] = { + { + .name = "asrc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ASRC_OFFSET, + .disable = _clk_disable,}, + { + .name = "asrc_audio_clk", + .parent = &ckie_clk, + .recalc = _clk_asrc_recalc, + .round_rate = _clk_round_rate, + .set_rate = _clk_asrc_set_rate, + .enable = _clk_asrc_enable, + .disable = _clk_asrc_disable,}, +}; + +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ATA_OFFSET, + .disable = _clk_disable, +}; + +static struct clk can_clk[] = { + { + .name = "can_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CAN1_OFFSET, + .disable = _clk_disable,}, + { + .name = "can_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CAN2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk cspi_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CSPI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CSPI2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ect_clk = { + .name = "ect_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ECT_OFFSET, + .disable = _clk_disable, +}; + +static struct clk emi_clk = { + .name = "emi_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EMI_OFFSET, + .disable = _clk_emi_disable, +}; + +static struct clk epit_clk[] = { + { + .name = "epit_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT1_OFFSET, + .disable = _clk_disable,}, + { + .name = "epit_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk esai_clk = { + .name = "esai_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ESAI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk sdhc_clk[] = { + { + .name = "sdhc_clk", + .id = 0, + .parent = &peri_pll_clk, + .recalc = _clk_sdhc_recalc, + .set_rate = _clk_sdhc_set_rate, + .round_rate = _clk_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ESDHC1_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdhc_clk", + .id = 1, + .parent = &peri_pll_clk, + .recalc = _clk_sdhc_recalc, + .set_rate = _clk_sdhc_set_rate, + .round_rate = _clk_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ESDHC2_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdhc_clk", + .id = 2, + .parent = &peri_pll_clk, + .recalc = _clk_sdhc_recalc, + .set_rate = _clk_sdhc_set_rate, + .round_rate = _clk_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ESDHC3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk fec_clk = { + .name = "fec_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_FEC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk gpt_clk = { + .name = "gpt_clk", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_GPT_OFFSET, + .disable = _clk_disable, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_I2C1_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_I2C2_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 2, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_I2C3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ipu_clk = { + .name = "ipu_clk", + .parent = &cpu_clk, + .recalc = _clk_hsp_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_IPU_OFFSET, + .disable = _clk_disable, +}; + +static struct clk kpp_clk = { + .name = "kpp_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_KPP_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mlb_clk = { + .name = "mlb_clk", + .parent = &ahb_clk, + .recalc = _clk_mlb_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MLB_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mstick_clk = { + .name = "mstick_clk", + .id = 0, + .parent = &peri_pll_clk, + .recalc = _clk_mstick1_recalc, + .set_rate = _clk_mstick1_set_rate, + .round_rate = _clk_per_post_round_rate, + .set_parent = _clk_mstick1_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MSHC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk owire_clk = { + .name = "owire_clk", + .parent = &perclk_clk, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_OWIRE_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk pwm_clk = { + .name = "pwm_clk", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_PWM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rng_clk = { + .name = "rng_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_RNGC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_RTC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rtic_clk = { + .name = "rtic_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_RTIC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk scc_clk = { + .name = "scc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SCC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk sdma_clk[] = { + { + .name = "sdma_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SDMA_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdma_ipg_clk", + .parent = &ipg_clk,} +}; + +static struct clk spba_clk = { + .name = "spba_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SPBA_OFFSET, + .disable = _clk_disable, +}; + +static struct clk spdif_clk[] = { + { + .name = "spdif_clk", + .parent = &peri_pll_clk, + .recalc = _clk_spdif_recalc, + .set_rate = _clk_spdif_set_rate, + .round_rate = _clk_per_post_round_rate, + .set_parent = _clk_spdif_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SPDIF_OFFSET, + .disable = _clk_disable,}, + { + .name = "spdif_audio_clk", + .parent = &ckie_clk,}, + { + .name = "spdif_ipg_clk", + .parent = &ipg_clk,}, +}; + +static struct clk ssi_clk[] = { + { + .name = "ssi_clk", + .parent = &peri_pll_clk, + .recalc = _clk_ssi_recalc, + .set_rate = _clk_ssi_set_rate, + .round_rate = _clk_per_post_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SSI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "ssi_clk", + .id = 1, + .parent = &peri_pll_clk, + .recalc = _clk_ssi_recalc, + .set_rate = _clk_ssi_set_rate, + .round_rate = _clk_per_post_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SSI2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk uart_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &uart_per_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_UART1_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 1, + .parent = &uart_per_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_UART2_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 2, + .parent = &uart_per_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_UART3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk usb_clk[] = { + { + .name = "usb_clk", + .parent = &peri_pll_clk, + .recalc = _clk_usb_recalc, + .round_rate = _clk_round_rate, + .set_rate = _clk_usb_set_rate,}, + { + .name = "usb_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_USBOTG_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk wdog_clk = { + .name = "wdog_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_WDOG_OFFSET, + .disable = _clk_disable, +}; + +static struct clk csi_clk = { + .name = "csi_clk", + .parent = &peri_pll_clk, + .recalc = _clk_csi_recalc, + .round_rate = _clk_round_rate, + .set_rate = _clk_csi_set_rate, + .set_parent = _clk_csi_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR3, + .enable_shift = MXC_CCM_CGR3_CSI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR3, + .enable_shift = MXC_CCM_CGR3_IIM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk nfc_clk = { + .name = "nfc_clk", + .parent = &ahb_clk, + .recalc = _clk_nfc_recalc, +}; + +static unsigned long _clk_cko1_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div = 0, div1 = 1; + + div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + if (div > 64) { + div = (div + 1) >> 1; + div1++; + } + + if (div > 128) + div = 64; + return clk->parent->rate / (div * div1); +} + +static int _clk_cko1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div, div1 = 0; + u32 prdf, podf; + + div = clk->parent->rate / rate; + if ((clk->parent->rate / div) != rate) + return -EINVAL; + if (div > 64) { + div1 = MXC_CCM_COSR_CLKOUTDIV_1; + div >>= 1; + } else { + div1 = 0; + } + + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + __calc_two_dividers(div, &prdf, &podf); + reg = __raw_readl(MXC_CCM_COSR) & + ~(MXC_CCM_COSR_CLKOUT_PREDIV_MASK | + MXC_CCM_COSR_CLKOUT_PRODIV_MASK | + MXC_CCM_COSR_CLKOUTDIV_1); + reg |= ((prdf - 1) << MXC_CCM_COSR_CLKOUT_PREDIV_OFFSET) + | ((podf - 1) << MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET) + | div1; + } else { + reg = __raw_readl(MXC_CCM_COSR) & + ~(MXC_CCM_COSR_CLKOUT_PRODIV_MASK_V2 | + MXC_CCM_COSR_CLKOUTDIV_1); + reg |= ((div - 1) << MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET) | div1; + } + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static void _clk_cko1_recalc(struct clk *clk) +{ + u32 prdf = 1; + u32 podf, div1; + u32 reg = __raw_readl(MXC_CCM_COSR); + + div1 = 1 << ((reg & MXC_CCM_COSR_CLKOUTDIV_1) != 0); + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 1) { + prdf = (reg & MXC_CCM_COSR_CLKOUT_PREDIV_MASK) >> + MXC_CCM_COSR_CLKOUT_PREDIV_OFFSET; + podf = (reg & MXC_CCM_COSR_CLKOUT_PRODIV_MASK) >> + MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET; + } else + podf = (reg & MXC_CCM_COSR_CLKOUT_PRODIV_MASK_V2) >> + MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET; + + clk->rate = clk->parent->rate / (div1 * (podf + 1) * (prdf + 1)); +} + +static int _clk_cko1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOSEL_MASK; + + if (parent == &ckil_clk) { + reg &= ~MXC_CCM_COSR_CKIL_CKIH_MASK; + reg |= 0 << MXC_CCM_COSR_CLKOSEL_OFFSET; + } else if (parent == &ckih_clk) { + reg |= 1 << MXC_CCM_COSR_CLKOSEL_OFFSET; + } else if (parent == &ckie_clk) + reg |= 2 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &peri_pll_clk) + reg |= 6 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &cpu_clk) + reg |= 7 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ahb_clk) + reg |= 8 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ipg_clk) + reg |= 9 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &usb_clk[1]) + reg |= 0xB << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &sdhc_clk[1]) + reg |= 0xC << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ssi_clk[1]) + reg |= 0xD << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &mlb_clk) + reg |= 0xE << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &csi_clk) + reg |= 0x11 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &spdif_clk[0]) + reg |= 0x12 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &uart_clk[0]) + reg |= 0x13 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &asrc_clk[1]) + reg |= 0x14 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if ((parent == &nfc_clk) && (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) + reg |= 0x17 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if ((parent == &ipu_clk) && (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1)) + reg |= 0x18 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else + return -EINVAL; + + __raw_writel(reg, MXC_CCM_COSR); + return 0; +} + +static int _clk_cko1_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) | MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static void _clk_cko1_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); +} + +static struct clk cko1_clk = { + .name = "cko1_clk", + .recalc = _clk_cko1_recalc, + .set_rate = _clk_cko1_set_rate, + .round_rate = _clk_cko1_round_rate, + .set_parent = _clk_cko1_set_parent, + .enable = _clk_cko1_enable, + .disable = _clk_cko1_disable, +}; + +static struct clk gpu2d_clk = { + .name = "gpu2d_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR3, + .enable_shift = MXC_CCM_CGR3_GPU2D_OFFSET, + .disable = _clk_disable, +}; + +static struct clk *mxc_clks[] = { + &int_32k_clk, + &ext_32k_clk, + &ckih_clk, + &ckil_clk, + &ckie_clk, + &mcu_pll_clk, + &peri_pll_clk, + &cpu_clk, + &ahb_clk, + &ipg_clk, + &perclk_clk, + &uart_per_clk, + &asrc_clk[0], + &asrc_clk[1], + &ata_clk, + &can_clk[0], + &can_clk[1], + &cspi_clk[0], + &cspi_clk[1], + &ect_clk, + &emi_clk, + &epit_clk[0], + &epit_clk[1], + &esai_clk, + &sdhc_clk[0], + &sdhc_clk[1], + &sdhc_clk[2], + &fec_clk, + &gpt_clk, + &i2c_clk[0], + &i2c_clk[1], + &i2c_clk[2], + &ipu_clk, + &kpp_clk, + &mlb_clk, + &mstick_clk, + &owire_clk, + &rng_clk, + &pwm_clk, + &rtc_clk, + &rtic_clk, + &scc_clk, + &sdma_clk[0], + &sdma_clk[1], + &spba_clk, + &spdif_clk[0], + &spdif_clk[1], + &spdif_clk[2], + &ssi_clk[0], + &ssi_clk[1], + &uart_clk[0], + &uart_clk[1], + &uart_clk[2], + &usb_clk[0], + &usb_clk[1], + &wdog_clk, + &csi_clk, + &iim_clk, + &nfc_clk, + &cko1_clk, + &gpu2d_clk, +}; + +extern void propagate_rate(struct clk *tclk); + +static void mxc_clockout_scan(void) +{ + u32 reg = __raw_readl(MXC_CCM_COSR) & MXC_CCM_COSR_CLKOSEL_MASK; + reg >>= MXC_CCM_COSR_CLKOSEL_OFFSET; + switch (reg) { + case 0: + cko1_clk.parent = &ckil_clk; + break; + case 1: + cko1_clk.parent = &ckih_clk; + break; + case 2: + cko1_clk.parent = &ckie_clk; + break; + case 6: + cko1_clk.parent = &peri_pll_clk; + break; + case 7: + cko1_clk.parent = &cpu_clk; + break; + case 8: + cko1_clk.parent = &ahb_clk; + break; + case 9: + cko1_clk.parent = &ipg_clk; + break; + case 0xB: + cko1_clk.parent = &usb_clk[1]; + break; + case 0xC: + cko1_clk.parent = &sdhc_clk[1]; + break; + case 0xD: + cko1_clk.parent = &ssi_clk[1]; + break; + case 0xE: + cko1_clk.parent = &mlb_clk; + break; + case 0x11: + cko1_clk.parent = &csi_clk; + break; + case 0x12: + cko1_clk.parent = &spdif_clk[0]; + break; + case 0x13: + cko1_clk.parent = &uart_clk[0]; + break; + case 0x14: + cko1_clk.parent = &asrc_clk[1]; + break; + case 0x17: + cko1_clk.parent = &nfc_clk; + break; + case 0x18: + cko1_clk.parent = &ipu_clk; + break; + } +} + +static void mxc_update_clocks(void) +{ + unsigned long reg; + reg = __raw_readl(MXC_CCM_PDR0); + if ((!(reg & MXC_CCM_PDR0_AUTO_CON)) + && (cpu_is_mx35_rev(CHIP_REV_2_0) < 1)) + ipu_clk.parent = &ahb_clk; + + if (reg & MXC_CCM_PDR0_PER_SEL) + perclk_clk.parent = &cpu_clk; + + reg = __raw_readl(MXC_CCM_PDR1); + if (reg & MXC_CCM_PDR1_MSHC_M_U) + mstick_clk.parent = &cpu_clk; + + reg = __raw_readl(MXC_CCM_PDR2); + if (reg & MXC_CCM_PDR2_CSI_M_U) + csi_clk.parent = &cpu_clk; + if (reg & MXC_CCM_PDR2_SSI_M_U) { + ssi_clk[0].parent = &cpu_clk; + ssi_clk[1].parent = &cpu_clk; + } + + reg = __raw_readl(MXC_CCM_PDR3); + if (reg & MXC_CCM_PDR3_SPDIF_M_U) + spdif_clk[0].parent = &cpu_clk; + + if (reg & MXC_CCM_PDR3_UART_M_U) + uart_per_clk.parent = &cpu_clk; + + if (reg & MXC_CCM_PDR3_ESDHC_M_U) { + sdhc_clk[0].parent = &cpu_clk; + sdhc_clk[1].parent = &cpu_clk; + sdhc_clk[2].parent = &cpu_clk; + } + + reg = __raw_readl(MXC_CCM_PDR4); + if (reg & MXC_CCM_PDR4_USB_M_U) + usb_clk[0].parent = &cpu_clk; + + mxc_clockout_scan(); +} + +int __init mx35_clocks_init(void) +{ + struct clk **clkp; + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + + /* Turn off all possible clocks */ + __raw_writel(MXC_CCM_CGR0_ECT_MASK | MXC_CCM_CGR0_EMI_MASK | + MXC_CCM_CGR0_ESDHC1_MASK | MXC_CCM_CGR0_ESDHC2_MASK | + MXC_CCM_CGR0_ESDHC3_MASK, + MXC_CCM_CGR0); + __raw_writel(MXC_CCM_CGR1_GPIO1_MASK | MXC_CCM_CGR1_GPIO2_MASK | + MXC_CCM_CGR1_GPIO3_MASK | MXC_CCM_CGR1_GPT_MASK | + MXC_CCM_CGR1_IOMUXC_MASK, MXC_CCM_CGR1); + __raw_writel(MXC_CCM_CGR2_MAX_MASK | MXC_CCM_CGR2_SPBA_MASK | + MXC_CCM_CGR2_AUDMUX_MASK | MXC_CCM_CGR2_MAX_ENABLE, + MXC_CCM_CGR2); + __raw_writel(MXC_CCM_CGR3_IIM_MASK, MXC_CCM_CGR3); + __raw_writel((__raw_readl(MXC_CCM_PMCR2) | + MXC_CCM_PMCR2_OSC24M_DOWN | + MXC_CCM_PMCR2_OSC_AUDIO_DOWN), MXC_CCM_PMCR2); + mxc_update_clocks(); + pr_info("Clock input source is %ld\n", ckih_clk.rate); + + /* Determine which high frequency clock source is coming in */ + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + sync_cpu_wb(); + + /* This will propagate to all children and init all the clock rates */ + propagate_rate(&ckih_clk); + propagate_rate(&ext_32k_clk); + propagate_rate(&ckie_clk); + + clk_enable(&mcu_pll_clk); + clk_enable(&gpt_clk); + clk_enable(&emi_clk); + clk_enable(&iim_clk); + clk_enable(&spba_clk); + + /* Init serial PLL according */ + clk_set_rate(&peri_pll_clk, 300000000); + + clk_enable(&peri_pll_clk); + + mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/usb_dr.c @@ -0,0 +1,110 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "usb.h" + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_UTMI_WIDE, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbotg_utmi_active, + .gpio_usb_inactive = gpio_usbotg_utmi_inactive, + .transceiver = "utmi", +}; + + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)(USB_OTGREGS_BASE), + .end = (u32)(USB_OTGREGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USBOTG, + .flags = IORESOURCE_IRQ, + }, +}; + + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device __maybe_unused dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + /* i.MX35 1.0 should work in INCR mode */ + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) { + PDATA->change_ahb_burst = 1; + PDATA->ahb_burst_mode = 0; + } + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); + + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/iomux.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/iomux.c @@ -0,0 +1,206 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup GPIO_MX35 Board GPIO and Muxing Setup + * @ingroup MSL_MX35 + */ +/*! + * @file mach-mx35/iomux.c + * + * @brief I/O Muxing control functions + * + * @ingroup GPIO_MX35 + */ + +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/*! + * IOMUX register (base) addresses + */ +#define IOMUXGPR (IO_ADDRESS(IOMUXC_BASE_ADDR)) +#define IOMUXSW_MUX_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 4) +#define IOMUXSW_MUX_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x324) +#define IOMUXSW_PAD_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x328) +#define IOMUXSW_PAD_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x790) +#define IOMUXSW_INPUT_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x7A8) +#define IOMUXSW_INPUT_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x9F4) + +#define MUX_PIN_NUM_MAX \ + (((IOMUXSW_PAD_END - IOMUXSW_PAD_CTL) >> 2) + 1) +#define MUX_INPUT_NUM_MUX \ + (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1) + +#define PIN_TO_IOMUX_INDEX(pin) ((PIN_TO_IOMUX_PAD(pin) - 0x328) >> 2) + +static DEFINE_SPINLOCK(gpio_mux_lock); +static u8 iomux_pin_res_table[MUX_PIN_NUM_MAX]; + +/*! + * This function is used to configure a pin through the IOMUX module. + * FIXED ME: for backward compatible. Will be static function! + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param cfg an output function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + u32 ret = 0; + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + void *mux_reg = IOMUXGPR + PIN_TO_IOMUX_MUX(pin); + u8 *rp; + + BUG_ON(pin_index > MUX_PIN_NUM_MAX); + BUG_ON((mux_reg > IOMUXSW_MUX_END) || (mux_reg < IOMUXSW_MUX_CTL)); + + spin_lock(&gpio_mux_lock); + __raw_writel(cfg, mux_reg); + /* + * Log a warning if a pin changes ownership + */ + rp = iomux_pin_res_table + pin_index; + if ((cfg & *rp) && (*rp != cfg)) { + /*Console: how to do */ + printk(KERN_ERR "iomux_config_mux: Warning: iomux pin" + " config changed, index=%d register=%p, " + " prev=0x%x new=0x%x\n", pin_index, mux_reg, + *rp, cfg); + ret = -EINVAL; + } + *rp = cfg; + spin_unlock(&gpio_mux_lock); + + return ret; +} + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + u32 gpio = IOMUX_TO_GPIO(pin); + int ret = iomux_config_mux(pin, cfg); + if (gpio < MXC_GPIO_IRQS) { + if (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_GPIO) || + (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_FUNC) && + ((pin == MX35_PIN_GPIO1_0) || (pin == MX35_PIN_GPIO1_1) || + (pin == MX35_PIN_GPIO2_0) || (pin == MX35_PIN_GPIO3_0)))) + ret |= gpio_request(gpio, NULL); + } + return ret; +} + +EXPORT_SYMBOL(mxc_request_iomux); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + u8 *rp = iomux_pin_res_table + pin_index; + u32 gpio = IOMUX_TO_GPIO(pin); + + BUG_ON((pin_index > MUX_PIN_NUM_MAX)); + + *rp = 0; + if (gpio < MXC_GPIO_IRQS) { + if (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_GPIO) || + (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_FUNC) && + ((pin == MX35_PIN_GPIO1_0) || (pin == MX35_PIN_GPIO1_1) || + (pin == MX35_PIN_GPIO2_0) || (pin == MX35_PIN_GPIO3_0)))) + gpio_free(gpio); + } +} + +EXPORT_SYMBOL(mxc_free_iomux); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config) +{ + void *pad_reg = IOMUXGPR + PIN_TO_IOMUX_PAD(pin); + + BUG_ON((pad_reg > IOMUXSW_PAD_END) || (pad_reg < IOMUXSW_PAD_CTL)); + + spin_lock(&gpio_mux_lock); + __raw_writel(config, pad_reg); + spin_unlock(&gpio_mux_lock); +} + +EXPORT_SYMBOL(mxc_iomux_set_pad); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en) +{ + u32 l; + + spin_lock(&gpio_mux_lock); + l = __raw_readl(IOMUXGPR); + + if (en) + l |= gp; + else + l &= ~gp; + + __raw_writel(l, IOMUXGPR); + spin_unlock(&gpio_mux_lock); +} + +EXPORT_SYMBOL(mxc_iomux_set_gpr); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b + * #iomux_input_select_t + * @param config the binary value of elements defined in \b + * #iomux_input_config_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config) +{ + void *reg = IOMUXSW_INPUT_CTL + (input << 2); + + BUG_ON(input >= MUX_INPUT_NUM_MUX); + + __raw_writel(config, reg); +} + +EXPORT_SYMBOL(mxc_iomux_set_input); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack_pmic_mc13892.c @@ -0,0 +1,392 @@ +/* + * mx35-3stack-pmic-mc13892.c -- i.MX35 3STACK Driver for Atlas MC13892 PMIC + */ + /* + * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +#define STANDBYSECINV_LSH 11 +#define STANDBYSECINV_WID 1 + +/* regulator standby mask */ +#define GEN1_STBY_MASK (1 << 1) +#define IOHI_STBY_MASK (1 << 4) +#define DIG_STBY_MASK (1 << 10) +#define GEN2_STBY_MASK (1 << 13) +#define PLL_STBY_MASK (1 << 16) +#define USB2_STBY_MASK (1 << 19) + +#define GEN3_STBY_MASK (1 << 1) +#define CAM_STBY_MASK (1 << 7) +#define VIDEO_STBY_MASK (1 << 13) +#define AUDIO_STBY_MASK (1 << 16) +#define SD_STBY_MASK (1 << 19) + +/* 0x92412 */ +#define REG_MODE_0_ALL_MASK (GEN1_STBY_MASK | \ + IOHI_STBY_MASK | DIG_STBY_MASK | \ + GEN2_STBY_MASK | PLL_STBY_MASK | \ + USB2_STBY_MASK) +/* 0x92082 */ +#define REG_MODE_1_ALL_MASK (GEN3_STBY_MASK | \ + CAM_STBY_MASK | VIDEO_STBY_MASK | \ + AUDIO_STBY_MASK | SD_STBY_MASK) + +/* CPU */ +static struct regulator_consumer_supply sw1_consumers[] = { + { + .supply = "cpu_vcc", + } +}; + +static struct regulator_consumer_supply vcam_consumers[] = { + { + /* sgtl5000 */ + .supply = "VDDA", + .dev_name = "0-000a", + }, +}; + +struct mc13892; + +static struct regulator_init_data sw1_init = { + .constraints = { + .name = "SW1", + .min_uV = mV_to_uV(600), + .max_uV = mV_to_uV(1375), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .valid_modes_mask = 0, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 700000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(sw1_consumers), + .consumer_supplies = sw1_consumers, +}; + +static struct regulator_init_data sw2_init = { + .constraints = { + .name = "SW2", + .min_uV = mV_to_uV(900), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 1200000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + .state_standby = { + .uV = 1000000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data sw3_init = { + .constraints = { + .name = "SW3", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw4_init = { + .constraints = { + .name = "SW4", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data viohi_init = { + .constraints = { + .name = "VIOHI", + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb_init = { + .constraints = { + .name = "VUSB", + .boot_on = 1, + } +}; + +static struct regulator_init_data swbst_init = { + .constraints = { + .name = "SWBST", + } +}; + +static struct regulator_init_data vdig_init = { + .constraints = { + .name = "VDIG", + .min_uV = mV_to_uV(1050), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vpll_init = { + .constraints = { + .name = "VPLL", + .min_uV = mV_to_uV(1050), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb2_init = { + .constraints = { + .name = "VUSB2", + .min_uV = mV_to_uV(2400), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vvideo_init = { + .constraints = { + .name = "VVIDEO", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vaudio_init = { + .constraints = { + .name = "VAUDIO", + .min_uV = mV_to_uV(2300), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vsd_init = { + .constraints = { + .name = "VSD", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vcam_init = { + .constraints = { + .name = "VCAM", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL, + }, + .num_consumer_supplies = ARRAY_SIZE(vcam_consumers), + .consumer_supplies = vcam_consumers, +}; + +static struct regulator_init_data vgen1_init = { + .constraints = { + .name = "VGEN1", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vgen2_init = { + .constraints = { + .name = "VGEN2", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vgen3_init = { + .constraints = { + .name = "VGEN3", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(2900), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data gpo1_init = { + .constraints = { + .name = "GPO1", + } +}; + +static struct regulator_init_data gpo2_init = { + .constraints = { + .name = "GPO2", + } +}; + +static struct regulator_init_data gpo3_init = { + .constraints = { + .name = "GPO3", + } +}; + +static struct regulator_init_data gpo4_init = { + .constraints = { + .name = "GPO4", + } +}; + +static struct regulator_init_data pwg1_init = { + .constraints = { + .name = "PWG1", + } +}; + +static struct regulator_init_data pwg2_init = { + .constraints = { + .name = "PWG2", + } +}; + +/*! + * the event handler for power on event + */ +static void power_on_evt_handler(void) +{ + pr_info("pwr on event1 is received \n"); +} + +/*! + * pmic board initialization code + */ +static int init_mc13892(void) +{ + unsigned int value; + pmic_event_callback_t power_key_event; + + if (!board_is_rev(BOARD_REV_2)) + return -1; + + /* subscribe PWRON1 event. */ + power_key_event.param = NULL; + power_key_event.func = (void *)power_on_evt_handler; + pmic_event_subscribe(EVENT_PWRONI, power_key_event); + + pmic_read_reg(REG_POWER_CTL2, &value, 0xffffff); + /* Bit 11 (STANDBYSECINV): Active Low */ + value |= 0x00800; + /* Bit 12 (WDIRESET): enable */ + value |= 0x01000; + pmic_write_reg(REG_POWER_CTL2, value, 0xffffff); + + /* Battery charger default settings */ + /* current limit = 1200mA, PLIM = 1000mw, disable auto charge */ + value = 0x210068; + pmic_write_reg(REG_CHARGE, value, 0x018078); + + /* enable standby controll for regulators */ + pmic_read_reg(REG_MODE_0, &value, 0xffffff); + value &= ~REG_MODE_0_ALL_MASK; + value |= (DIG_STBY_MASK | PLL_STBY_MASK | \ + USB2_STBY_MASK); + pmic_write_reg(REG_MODE_0, value, 0xffffff); + + pmic_read_reg(REG_MODE_1, &value, 0xffffff); + value |= REG_MODE_1_ALL_MASK; + pmic_write_reg(REG_MODE_1, value, 0xffffff); + + return 0; +} + +static int mc13892_regulator_init(struct mc13892 *mc13892) +{ + mc13892_register_regulator(mc13892, MC13892_SW1, &sw1_init); + mc13892_register_regulator(mc13892, MC13892_SW2, &sw2_init); + mc13892_register_regulator(mc13892, MC13892_SW3, &sw3_init); + mc13892_register_regulator(mc13892, MC13892_SW4, &sw4_init); + mc13892_register_regulator(mc13892, MC13892_SWBST, &swbst_init); + mc13892_register_regulator(mc13892, MC13892_VIOHI, &viohi_init); + mc13892_register_regulator(mc13892, MC13892_VPLL, &vpll_init); + mc13892_register_regulator(mc13892, MC13892_VDIG, &vdig_init); + mc13892_register_regulator(mc13892, MC13892_VSD, &vsd_init); + mc13892_register_regulator(mc13892, MC13892_VUSB2, &vusb2_init); + mc13892_register_regulator(mc13892, MC13892_VVIDEO, &vvideo_init); + mc13892_register_regulator(mc13892, MC13892_VAUDIO, &vaudio_init); + mc13892_register_regulator(mc13892, MC13892_VCAM, &vcam_init); + mc13892_register_regulator(mc13892, MC13892_VGEN1, &vgen1_init); + mc13892_register_regulator(mc13892, MC13892_VGEN2, &vgen2_init); + mc13892_register_regulator(mc13892, MC13892_VGEN3, &vgen3_init); + mc13892_register_regulator(mc13892, MC13892_VUSB, &vusb_init); + mc13892_register_regulator(mc13892, MC13892_GPO1, &gpo1_init); + mc13892_register_regulator(mc13892, MC13892_GPO2, &gpo2_init); + mc13892_register_regulator(mc13892, MC13892_GPO3, &gpo3_init); + mc13892_register_regulator(mc13892, MC13892_GPO4, &gpo4_init); + mc13892_register_regulator(mc13892, MC13892_PWGT1, &pwg1_init); + mc13892_register_regulator(mc13892, MC13892_PWGT2, &pwg2_init); + + init_mc13892(); + return 0; +} + +static struct mc13892_platform_data mc13892_plat = { + .init = mc13892_regulator_init, +}; + +static struct i2c_board_info __initdata mc13892_i2c_device = { + I2C_BOARD_INFO("mc13892", 0x08), + .irq = IOMUX_TO_IRQ(MX35_PIN_GPIO2_0), + .platform_data = &mc13892_plat, +}; + +int __init mx35_3stack_init_mc13892(void) +{ + return i2c_register_board_info(0, &mc13892_i2c_device, 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/usb_h2.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/usb_h2.c @@ -0,0 +1,63 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +#include +#include +#include "usb.h" + +static struct fsl_usb2_platform_data usbh2_config = { + .name = "Host 2", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_SERIAL, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbh2_active, + .gpio_usb_inactive = gpio_usbh2_inactive, + .transceiver = "serial", +}; + +static struct resource usbh2_resources[] = { + [0] = { + .start = (u32) (USB_H2REGS_BASE), + .end = (u32) (USB_H2REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USBHS, + .flags = IORESOURCE_IRQ, + }, +}; + + +static int __init usbh2_init(void) +{ + pr_debug("%s: \n", __func__); + + /* i.MX35 1.0 should work in INCR mode */ + if (cpu_is_mx35_rev(CHIP_REV_2_0) < 0) { + usbh2_config.change_ahb_burst = 1; + usbh2_config.ahb_burst_mode = 0; + } + + host_pdev_register(usbh2_resources, ARRAY_SIZE(usbh2_resources), + &usbh2_config); + return 0; +} +module_init(usbh2_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/crm_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/crm_regs.h @@ -0,0 +1,430 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ARCH_ARM_MACH_MX35_CRM_REGS_H__ +#define __ARCH_ARM_MACH_MX35_CRM_REGS_H__ + +#define CKIH_CLK_FREQ 24000000 +#define CKIE_CLK_FREQ 24576000 +#define CKIL_CLK_FREQ 32000 +#define CKIL_EXT_FREQ 32768 + +#define MXC_CCM_BASE ((char *)IO_ADDRESS(CCM_BASE_ADDR)) + +/* Register addresses */ +#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) +#define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04) +#define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08) +#define MXC_CCM_PDR2 (MXC_CCM_BASE + 0x0C) +#define MXC_CCM_PDR3 (MXC_CCM_BASE + 0x10) +#define MXC_CCM_PDR4 (MXC_CCM_BASE + 0x14) +#define MXC_CCM_RCSR (MXC_CCM_BASE + 0x18) +#define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x1C) +#define MXC_CCM_PPCTL (MXC_CCM_BASE + 0x20) +#define MXC_CCM_ACMR (MXC_CCM_BASE + 0x24) +#define MXC_CCM_COSR (MXC_CCM_BASE + 0x28) +#define MXC_CCM_CGR0 (MXC_CCM_BASE + 0x2C) +#define MXC_CCM_CGR1 (MXC_CCM_BASE + 0x30) +#define MXC_CCM_CGR2 (MXC_CCM_BASE + 0x34) +#define MXC_CCM_CGR3 (MXC_CCM_BASE + 0x38) +#define MXC_CCM_RESV (MXC_CCM_BASE + 0x3C) +#define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x40) +#define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x44) +#define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x48) +#define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x4C) +#define MXC_CCM_LTR0 (MXC_CCM_BASE + 0x50) +#define MXC_CCM_LTR1 (MXC_CCM_BASE + 0x54) +#define MXC_CCM_LTR2 (MXC_CCM_BASE + 0x58) +#define MXC_CCM_LTR3 (MXC_CCM_BASE + 0x5C) +#define MXC_CCM_LTBR0 (MXC_CCM_BASE + 0x60) +#define MXC_CCM_LTBR1 (MXC_CCM_BASE + 0x64) +#define MXC_CCM_PMCR0 (MXC_CCM_BASE + 0x68) +#define MXC_CCM_PMCR1 (MXC_CCM_BASE + 0x6C) +#define MXC_CCM_PMCR2 (MXC_CCM_BASE + 0x70) + +/* Register bit definitions */ +#define MXC_CCM_CCMR_WFI (1 << 30) +#define MXC_CCM_CCMR_STBY_EXIT_SRC (1 << 29) +#define MXC_CCM_CCMR_VSTBY (1 << 28) +#define MXC_CCM_CCMR_WBEN (1 << 27) +#define MXC_CCM_CCMR_VOL_RDY_CNT_OFFSET 20 +#define MXC_CCM_CCMR_VOL_RDY_CNT_MASK (0xF << 20) +#define MXC_CCM_CCMR_ROMW_OFFSET 18 +#define MXC_CCM_CCMR_ROMW_MASK (0x3 << 18) +#define MXC_CCM_CCMR_RAMW_OFFSET 21 +#define MXC_CCM_CCMR_RAMW_MASK (0x3 << 21) +#define MXC_CCM_CCMR_LPM_OFFSET 14 +#define MXC_CCM_CCMR_LPM_MASK (0x3 << 14) +#define MXC_CCM_CCMR_UPE (1 << 9) +#define MXC_CCM_CCMR_MPE (1 << 3) + +#define MXC_CCM_PDR0_PER_SEL (1 << 26) +#define MXC_CCM_PDR0_IPU_HND_BYP (1 << 23) +#define MXC_CCM_PDR0_HSP_PODF_OFFSET 20 +#define MXC_CCM_PDR0_HSP_PODF_MASK (0x3 << 20) +#define MXC_CCM_PDR0_CON_MUX_DIV_OFFSET 16 +#define MXC_CCM_PDR0_CON_MUX_DIV_MASK (0xF << 16) +#define MXC_CCM_PDR0_CKIL_SEL (1 << 15) +#define MXC_CCM_PDR0_PER_PODF_OFFSET 12 +#define MXC_CCM_PDR0_PER_PODF_MASK (0xF << 12) +#define MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET 9 +#define MXC_CCM_PDR0_AUTO_MUX_DIV_MASK (0x7 << 9) +#define MXC_CCM_PDR0_AUTO_CON 0x1 + +#define MXC_CCM_PDR1_MSHC_PRDF_OFFSET 28 +#define MXC_CCM_PDR1_MSHC_PRDF_MASK (0x7 << 28) +#define MXC_CCM_PDR1_MSHC_PODF_OFFSET 22 +#define MXC_CCM_PDR1_MSHC_PODF_MASK (0x3F << 22) +#define MXC_CCM_PDR1_MSHC_M_U (1 << 7) + +#define MXC_CCM_PDR2_SSI2_PRDF_OFFSET 27 +#define MXC_CCM_PDR2_SSI2_PRDF_MASK (0x7 << 27) +#define MXC_CCM_PDR2_SSI1_PRDF_OFFSET 24 +#define MXC_CCM_PDR2_SSI1_PRDF_MASK (0x7 << 24) +#define MXC_CCM_PDR2_CSI_PRDF_OFFSET 19 +#define MXC_CCM_PDR2_CSI_PRDF_MASK (0x7 << 19) +#define MXC_CCM_PDR2_CSI_PODF_OFFSET 16 +#define MXC_CCM_PDR2_CSI_PODF_MASK (0x7 << 16) +#define MXC_CCM_PDR2_SSI2_PODF_OFFSET 8 +#define MXC_CCM_PDR2_SSI2_PODF_MASK (0x3F << 8) +#define MXC_CCM_PDR2_CSI_M_U (1 << 7) +#define MXC_CCM_PDR2_SSI_M_U (1 << 6) +#define MXC_CCM_PDR2_SSI1_PODF_OFFSET 0 +#define MXC_CCM_PDR2_SSI1_PODF_MASK (0x3F) + +/* Extra definitions for Chip Version 2*/ +#define MXC_CCM_PDR2_CSI_PODF_MASK_V2 (0x3F << 16) + +#define MXC_CCM_PDR3_SPDIF_PRDF_OFFSET 29 +#define MXC_CCM_PDR3_SPDIF_PRDF_MASK (0x7 << 29) +#define MXC_CCM_PDR3_SPDIF_PODF_OFFSET 23 +#define MXC_CCM_PDR3_SPDIF_PODF_MASK (0x3F << 23) +#define MXC_CCM_PDR3_SPDIF_M_U (1 << 22) +#define MXC_CCM_PDR3_ESDHC3_PRDF_OFFSET 19 +#define MXC_CCM_PDR3_ESDHC3_PRDF_MASK (0x7 << 19) +#define MXC_CCM_PDR3_ESDHC3_PODF_OFFSET 16 +#define MXC_CCM_PDR3_ESDHC3_PODF_MASK (0x7 << 16) +#define MXC_CCM_PDR3_UART_M_U (1 << 15) +#define MXC_CCM_PDR3_ESDHC2_PRDF_OFFSET 11 +#define MXC_CCM_PDR3_ESDHC2_PRDF_MASK (0x7 << 11) +#define MXC_CCM_PDR3_ESDHC2_PODF_OFFSET 8 +#define MXC_CCM_PDR3_ESDHC2_PODF_MASK (0x7 << 8) +#define MXC_CCM_PDR3_ESDHC_M_U (1 << 6) +#define MXC_CCM_PDR3_ESDHC1_PRDF_OFFSET 3 +#define MXC_CCM_PDR3_ESDHC1_PRDF_MASK (0x7 << 3) +#define MXC_CCM_PDR3_ESDHC1_PODF_OFFSET 0 +#define MXC_CCM_PDR3_ESDHC1_PODF_MASK (0x7) + +/* Extra definitions for Chip Version 2 */ +#define MXC_CCM_PDR3_ESDHC3_PODF_MASK_V2 (0x3F << 16) +#define MXC_CCM_PDR3_ESDHC2_PODF_MASK_V2 (0x3F << 8) +#define MXC_CCM_PDR3_ESDHC1_PODF_MASK_V2 0x3F + +#define MXC_CCM_PDR4_NFC_PODF_OFFSET 28 +#define MXC_CCM_PDR4_NFC_PODF_MASK (0xF << 28) +#define MXC_CCM_PDR4_USB_PRDF_OFFSET 25 +#define MXC_CCM_PDR4_USB_PRDF_MASK (0x7 << 25) +#define MXC_CCM_PDR4_USB_PODF_OFFSET 22 +#define MXC_CCM_PDR4_USB_PODF_MASK (0x7 << 22) +#define MXC_CCM_PDR4_PER0_PRDF_OFFSET 19 +#define MXC_CCM_PDR4_PER0_PRDF_MASK (0x7 << 19) +#define MXC_CCM_PDR4_PER0_PODF_OFFSET 16 +#define MXC_CCM_PDR4_PER0_PODF_MASK (0x7 << 16) +#define MXC_CCM_PDR4_UART_PRDF_OFFSET 13 +#define MXC_CCM_PDR4_UART_PRDF_MASK (0x7 << 13) +#define MXC_CCM_PDR4_UART_PODF_OFFSET 10 +#define MXC_CCM_PDR4_UART_PODF_MASK (0x7 << 10) +#define MXC_CCM_PDR4_USB_M_U (1 << 9) + +/* Extra definitions for Chip Version 2 */ +#define MXC_CCM_PDR4_USB_PODF_MASK_V2 (0x3F << 22) +#define MXC_CCM_PDR4_PER0_PODF_MASK_V2 (0x3F << 16) +#define MXC_CCM_PDR4_UART_PODF_MASK_V2 (0x3F << 10) + +/* Bit definitions for RCSR */ +#define MXC_CCM_RCSR_BUS_WIDTH (1 << 29) +#define MXC_CCM_RCSR_BUS_16BIT (1 << 29) +#define MXC_CCM_RCSR_PAGE_SIZE (3 << 27) +#define MXC_CCM_RCSR_PAGE_512 (0 << 27) +#define MXC_CCM_RCSR_PAGE_2K (1 << 27) +#define MXC_CCM_RCSR_PAGE_4K1 (2 << 27) +#define MXC_CCM_RCSR_PAGE_4K2 (3 << 27) +#define MXC_CCM_RCSR_SOFT_RESET (1 << 15) +#define MXC_CCM_RCSR_NF16B (1 << 14) +#define MXC_CCM_RCSR_NFC_4K (1 << 9) +#define MXC_CCM_RCSR_NFC_FMS (1 << 8) + +/* Bit definitions for both MCU, PERIPHERAL PLL control registers */ +#define MXC_CCM_PCTL_BRM 0x80000000 +#define MXC_CCM_PCTL_PD_OFFSET 26 +#define MXC_CCM_PCTL_PD_MASK (0xF << 26) +#define MXC_CCM_PCTL_MFD_OFFSET 16 +#define MXC_CCM_PCTL_MFD_MASK (0x3FF << 16) +#define MXC_CCM_PCTL_MFI_OFFSET 10 +#define MXC_CCM_PCTL_MFI_MASK (0xF << 10) +#define MXC_CCM_PCTL_MFN_OFFSET 0 +#define MXC_CCM_PCTL_MFN_MASK 0x3FF + +/* Bit definitions for Audio clock mux register*/ +#define MXC_CCM_ACMR_ESAI_CLK_SEL_OFFSET 12 +#define MXC_CCM_ACMR_ESAI_CLK_SEL_MASK (0xF << 12) +#define MXC_CCM_ACMR_SPDIF_CLK_SEL_OFFSET 8 +#define MXC_CCM_ACMR_SPDIF_CLK_SEL_MASK (0xF << 8) +#define MXC_CCM_ACMR_SSI1_CLK_SEL_OFFSET 4 +#define MXC_CCM_ACMR_SSI1_CLK_SEL_MASK (0xF << 4) +#define MXC_CCM_ACMR_SSI2_CLK_SEL_OFFSET 0 +#define MXC_CCM_ACMR_SSI2_CLK_SEL_MASK (0xF << 0) + +/* Extra definitions for Version 2 */ +#define MXC_CCM_ACMR_CKILH_PODF0_OFFSET 16 +#define MXC_CCM_ACMR_CKILH_PODF1_OFFSET 19 +#define MXC_CCM_ACMR_CKILH_PODF2_OFFSET 22 +#define MXC_CCM_ACMR_CKILH_PODF3_OFFSET 25 +#define MXC_CCM_ACMR_CKILH_PODF_MASK 0x7 + +/* Bit definitions for Clock gating Register*/ +#define MXC_CCM_CGR0_ASRC_OFFSET 0 +#define MXC_CCM_CGR0_ASRC_MASK (0x3 << 0) +#define MXC_CCM_CGR0_ATA_OFFSET 2 +#define MXC_CCM_CGR0_ATA_MASK (0x3 << 2) +#define MXC_CCM_CGR0_CAN1_OFFSET 6 +#define MXC_CCM_CGR0_CAN1_MASK (0x3 << 6) +#define MXC_CCM_CGR0_CAN2_OFFSET 8 +#define MXC_CCM_CGR0_CAN2_MASK (0x3 << 8) +#define MXC_CCM_CGR0_CSPI1_OFFSET 10 +#define MXC_CCM_CGR0_CSPI1_MASK (0x3 << 10) +#define MXC_CCM_CGR0_CSPI2_OFFSET 12 +#define MXC_CCM_CGR0_CSPI2_MASK (0x3 << 12) +#define MXC_CCM_CGR0_ECT_OFFSET 14 +#define MXC_CCM_CGR0_ECT_MASK (0x3 << 14) +#define MXC_CCM_CGR0_EMI_OFFSET 18 +#define MXC_CCM_CGR0_EMI_MASK (0x3 << 18) +#define MXC_CCM_CGR0_EPIT1_OFFSET 20 +#define MXC_CCM_CGR0_EPIT1_MASK (0x3 << 20) +#define MXC_CCM_CGR0_EPIT2_OFFSET 22 +#define MXC_CCM_CGR0_EPIT2_MASK (0x3 << 22) +#define MXC_CCM_CGR0_ESAI_OFFSET 24 +#define MXC_CCM_CGR0_ESAI_MASK (0x3 << 24) +#define MXC_CCM_CGR0_ESDHC1_OFFSET 26 +#define MXC_CCM_CGR0_ESDHC1_MASK (0x3 << 26) +#define MXC_CCM_CGR0_ESDHC2_OFFSET 28 +#define MXC_CCM_CGR0_ESDHC2_MASK (0x3 << 28) +#define MXC_CCM_CGR0_ESDHC3_OFFSET 30 +#define MXC_CCM_CGR0_ESDHC3_MASK (0x3 << 30) + +#define MXC_CCM_CGR1_FEC_OFFSET 0 +#define MXC_CCM_CGR1_FEC_MASK (0x3 << 0) +#define MXC_CCM_CGR1_GPIO1_OFFSET 2 +#define MXC_CCM_CGR1_GPIO1_MASK (0x3 << 2) +#define MXC_CCM_CGR1_GPIO2_OFFSET 4 +#define MXC_CCM_CGR1_GPIO2_MASK (0x3 << 4) +#define MXC_CCM_CGR1_GPIO3_OFFSET 6 +#define MXC_CCM_CGR1_GPIO3_MASK (0x3 << 6) +#define MXC_CCM_CGR1_GPT_OFFSET 8 +#define MXC_CCM_CGR1_GPT_MASK (0x3 << 8) +#define MXC_CCM_CGR1_I2C1_OFFSET 10 +#define MXC_CCM_CGR1_I2C1_MASK (0x3 << 10) +#define MXC_CCM_CGR1_I2C2_OFFSET 12 +#define MXC_CCM_CGR1_I2C2_MASK (0x3 << 12) +#define MXC_CCM_CGR1_I2C3_OFFSET 14 +#define MXC_CCM_CGR1_I2C3_MASK (0x3 << 14) +#define MXC_CCM_CGR1_IOMUXC_OFFSET 16 +#define MXC_CCM_CGR1_IOMUXC_MASK (0x3 << 16) +#define MXC_CCM_CGR1_IPU_OFFSET 18 +#define MXC_CCM_CGR1_IPU_MASK (0x3 << 18) +#define MXC_CCM_CGR1_KPP_OFFSET 20 +#define MXC_CCM_CGR1_KPP_MASK (0x3 << 20) +#define MXC_CCM_CGR1_MLB_OFFSET 22 +#define MXC_CCM_CGR1_MLB_MASK (0x3 << 22) +#define MXC_CCM_CGR1_MSHC_OFFSET 24 +#define MXC_CCM_CGR1_MSHC_MASK (0x3 << 24) +#define MXC_CCM_CGR1_OWIRE_OFFSET 26 +#define MXC_CCM_CGR1_OWIRE_MASK (0x3 << 26) +#define MXC_CCM_CGR1_PWM_OFFSET 28 +#define MXC_CCM_CGR1_PWM_MASK (0x3 << 28) +#define MXC_CCM_CGR1_RNGC_OFFSET 30 +#define MXC_CCM_CGR1_RNGC_MASK (0x3 << 30) + +#define MXC_CCM_CGR2_RTC_OFFSET 0 +#define MXC_CCM_CGR2_RTC_MASK (0x3 << 0) +#define MXC_CCM_CGR2_RTIC_OFFSET 2 +#define MXC_CCM_CGR2_RTIC_MASK (0x3 << 2) +#define MXC_CCM_CGR2_SCC_OFFSET 4 +#define MXC_CCM_CGR2_SCC_MASK (0x3 << 4) +#define MXC_CCM_CGR2_SDMA_OFFSET 6 +#define MXC_CCM_CGR2_SDMA_MASK (0x3 << 6) +#define MXC_CCM_CGR2_SPBA_OFFSET 8 +#define MXC_CCM_CGR2_SPBA_MASK (0x3 << 8) +#define MXC_CCM_CGR2_SPDIF_OFFSET 10 +#define MXC_CCM_CGR2_SPDIF_MASK (0x3 << 10) +#define MXC_CCM_CGR2_SSI1_OFFSET 12 +#define MXC_CCM_CGR2_SSI1_MASK (0x3 << 12) +#define MXC_CCM_CGR2_SSI2_OFFSET 14 +#define MXC_CCM_CGR2_SSI2_MASK (0x3 << 14) +#define MXC_CCM_CGR2_UART1_OFFSET 16 +#define MXC_CCM_CGR2_UART1_MASK (0x3 << 16) +#define MXC_CCM_CGR2_UART2_OFFSET 18 +#define MXC_CCM_CGR2_UART2_MASK (0x3 << 18) +#define MXC_CCM_CGR2_UART3_OFFSET 20 +#define MXC_CCM_CGR2_UART3_MASK (0x3 << 20) +#define MXC_CCM_CGR2_USBOTG_OFFSET 22 +#define MXC_CCM_CGR2_USBOTG_MASK (0x3 << 22) +#define MXC_CCM_CGR2_WDOG_OFFSET 24 +#define MXC_CCM_CGR2_WDOG_MASK (0x3 << 24) +#define MXC_CCM_CGR2_MAX_OFFSET 26 +#define MXC_CCM_CGR2_MAX_MASK (0x3 << 26) +#define MXC_CCM_CGR2_MAX_ENABLE (0x2 << 26) +#define MXC_CCM_CGR2_AUDMUX_OFFSET 30 +#define MXC_CCM_CGR2_AUDMUX_MASK (0x3 << 30) + +#define MXC_CCM_CGR3_CSI_OFFSET 0 +#define MXC_CCM_CGR3_CSI_MASK (0x3 << 0) +#define MXC_CCM_CGR3_IIM_OFFSET 2 +#define MXC_CCM_CGR3_IIM_MASK (0x3 << 2) +#define MXC_CCM_CGR3_GPU2D_OFFSET 4 +#define MXC_CCM_CGR3_GPU2D_MASK (0x3 << 4) +/* + * LTR0 register offsets + */ +#define MXC_CCM_LTR0_DNTHR_OFFSET 16 +#define MXC_CCM_LTR0_DNTHR_MASK (0x3F << 16) +#define MXC_CCM_LTR0_UPTHR_OFFSET 22 +#define MXC_CCM_LTR0_UPTHR_MASK (0x3F << 22) +#define MXC_CCM_LTR0_DIV3CK_OFFSET 1 +#define MXC_CCM_LTR0_DIV3CK_MASK (0x3 << 1) + +/* + * LTR1 register offsets + */ +#define MXC_CCM_LTR1_PNCTHR_OFFSET 0 +#define MXC_CCM_LTR1_PNCTHR_MASK 0x3F +#define MXC_CCM_LTR1_UPCNT_OFFSET 6 +#define MXC_CCM_LTR1_UPCNT_MASK (0xFF << 6) +#define MXC_CCM_LTR1_DNCNT_OFFSET 14 +#define MXC_CCM_LTR1_DNCNT_MASK (0xFF << 14) +#define MXC_CCM_LTR1_LTBRSR_MASK 0x400000 +#define MXC_CCM_LTR1_LTBRSR_OFFSET 22 +#define MXC_CCM_LTR1_LTBRSR 0x400000 +#define MXC_CCM_LTR1_LTBRSH 0x800000 + +/* + * LTR2 bit definitions. x ranges from 0 for WSW9 to 6 for WSW15 + */ +#define MXC_CCM_LTR2_WSW_OFFSET(x) (11 + (x) * 3) +#define MXC_CCM_LTR2_WSW_MASK(x) (0x7 << MXC_CCM_LTR2_WSW_OFFSET((x))) +#define MXC_CCM_LTR2_EMAC_OFFSET 0 +#define MXC_CCM_LTR2_EMAC_MASK 0x1FF + +/* + * LTR3 bit definitions. x ranges from 0 for WSW0 to 8 for WSW8 + */ +#define MXC_CCM_LTR3_WSW_OFFSET(x) (5 + (x) * 3) +#define MXC_CCM_LTR3_WSW_MASK(x) (0x7 << MXC_CCM_LTR3_WSW_OFFSET((x))) + +#define DVSUP_TURBO 0 +#define DVSUP_HIGH 1 +#define DVSUP_MEDIUM 2 +#define DVSUP_LOW 3 +#define MXC_CCM_PMCR0_DVSUP_TURBO (DVSUP_TURBO << 28) +#define MXC_CCM_PMCR0_DVSUP_HIGH (DVSUP_HIGH << 28) +#define MXC_CCM_PMCR0_DVSUP_MEDIUM (DVSUP_MEDIUM << 28) +#define MXC_CCM_PMCR0_DVSUP_LOW (DVSUP_LOW << 28) +#define MXC_CCM_PMCR0_DVSUP_OFFSET 28 +#define MXC_CCM_PMCR0_DVSUP_MASK (0x3 << 28) +#define MXC_CCM_PMCR0_DVFS_UPDATE_FINISH 0x01000000 +#define MXC_CCM_PMCR0_DVFEV 0x00800000 +#define MXC_CCM_PMCR0_DVFIS 0x00400000 +#define MXC_CCM_PMCR0_LBMI 0x00200000 +#define MXC_CCM_PMCR0_LBFL 0x00100000 +#define MXC_CCM_PMCR0_LBCF_4 (0x0 << 18) +#define MXC_CCM_PMCR0_LBCF_8 (0x1 << 18) +#define MXC_CCM_PMCR0_LBCF_12 (0x2 << 18) +#define MXC_CCM_PMCR0_LBCF_16 (0x3 << 18) +#define MXC_CCM_PMCR0_LBCF_OFFSET 18 +#define MXC_CCM_PMCR0_LBCF_MASK (0x3 << 18) +#define MXC_CCM_PMCR0_PTVIS 0x00020000 +#define MXC_CCM_PMCR0_DVFS_START 0x00010000 +#define MXC_CCM_PMCR0_DVFS_START_MASK 0x1 << 16) +#define MXC_CCM_PMCR0_FSVAIM 0x00008000 +#define MXC_CCM_PMCR0_FSVAI_OFFSET 13 +#define MXC_CCM_PMCR0_FSVAI_MASK (0x3 << 13) +#define MXC_CCM_PMCR0_DPVCR 0x00001000 +#define MXC_CCM_PMCR0_DPVV 0x00000800 +#define MXC_CCM_PMCR0_WFIM 0x00000400 +#define MXC_CCM_PMCR0_DRCE3 0x00000200 +#define MXC_CCM_PMCR0_DRCE2 0x00000100 +#define MXC_CCM_PMCR0_DRCE1 0x00000080 +#define MXC_CCM_PMCR0_DRCE0 0x00000040 +#define MXC_CCM_PMCR0_DCR 0x00000020 +#define MXC_CCM_PMCR0_DVFEN 0x00000010 +#define MXC_CCM_PMCR0_PTVAIM 0x00000008 +#define MXC_CCM_PMCR0_PTVAI_OFFSET 1 +#define MXC_CCM_PMCR0_PTVAI_MASK (0x3 << 1) +#define MXC_CCM_PMCR0_DPTEN 0x00000001 + +#define MXC_CCM_PMCR1_DVGP_OFFSET 0 +#define MXC_CCM_PMCR1_DVGP_MASK (0xF) + +#define MXC_CCM_PMCR1_PLLRDIS (0x1 << 7) +#define MXC_CCM_PMCR1_EMIRQ_EN (0x1 << 8) + +#define MXC_CCM_DCVR_ULV_MASK (0x3FF << 22) +#define MXC_CCM_DCVR_ULV_OFFSET 22 +#define MXC_CCM_DCVR_LLV_MASK (0x3FF << 12) +#define MXC_CCM_DCVR_LLV_OFFSET 12 +#define MXC_CCM_DCVR_ELV_MASK (0x3FF << 2) +#define MXC_CCM_DCVR_ELV_OFFSET 2 + +#define MXC_CCM_PDR2_MST2_PDF_MASK (0x3F << 7) +#define MXC_CCM_PDR2_MST2_PDF_OFFSET 7 +#define MXC_CCM_PDR2_MST1_PDF_MASK 0x3F +#define MXC_CCM_PDR2_MST1_PDF_OFFSET 0 + +#define MXC_CCM_COSR_CLKOSEL_MASK 0x1F +#define MXC_CCM_COSR_CLKOSEL_OFFSET 0 +#define MXC_CCM_COSR_CLKOEN (1 << 5) +#define MXC_CCM_COSR_CLKOUTDIV_1 (1 << 6) +#define MXC_CCM_COSR_CLKOUT_PREDIV_MASK (0x7 << 13) +#define MXC_CCM_COSR_CLKOUT_PREDIV_OFFSET 13 +#define MXC_CCM_COSR_CLKOUT_PRODIV_MASK (0x7 << 10) +#define MXC_CCM_COSR_CLKOUT_PRODIV_OFFSET 10 +#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_MASK (0x3 << 16) +#define MXC_CCM_COSR_SSI1_RX_SRC_SEL_OFFSET 16 +#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_MASK (0x3 << 18) +#define MXC_CCM_COSR_SSI1_TX_SRC_SEL_OFFSET 18 +#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_MASK (0x3 << 20) +#define MXC_CCM_COSR_SSI2_RX_SRC_SEL_OFFSET 20 +#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_MASK (0x3 << 22) +#define MXC_CCM_COSR_SSI2_TX_SRC_SEL_OFFSET 22 +#define MXC_CCM_COSR_ASRC_AUDIO_EN (1 << 24) +#define MXC_CCM_COSR_ASRC_AUDIO_PODF_MASK (0x3F << 26) +#define MXC_CCM_COSR_ASRC_AUDIO_PODF_OFFSET 26 + +/* extra definitions for Version 2 */ +#define MXC_CCM_COSR_CKIL_CKIH_MASK (1 << 7) +#define MXC_CCM_COSR_CKIL_CKIH_OFFSET 7 +#define MXC_CCM_COSR_CLKOUT_PRODIV_MASK_V2 (0x3F << 10) + +/* + * PMCR0 register offsets + */ +#define MXC_CCM_PMCR0_LBFL_OFFSET 20 +#define MXC_CCM_PMCR0_DFSUP0_OFFSET 30 +#define MXC_CCM_PMCR0_DFSUP1_OFFSET 31 + +/* + * PMCR2 register definitions + */ +#define MXC_CCM_PMCR2_OSC24M_DOWN (1 << 16) +#define MXC_CCM_PMCR2_OSC_AUDIO_DOWN (1 << 17) + +#endif /* __ARCH_ARM_MACH_MX3_CRM_REGS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/iomux.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/iomux.h @@ -0,0 +1,295 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MACH_MX35_IOMUX_H__ +#define __MACH_MX35_IOMUX_H__ + +#include +#include +#include "mx35_pins.h" + +/*! + * @file mach-mx35/iomux.h + * + * @brief I/O Muxing control definitions and functions + * + * @ingroup GPIO_MX35 + */ + +typedef unsigned int iomux_pin_name_t; + +/*! + * various IOMUX functions + */ +typedef enum iomux_pin_config { + MUX_CONFIG_FUNC = 0, /*!< used as function */ + MUX_CONFIG_ALT1, /*!< used as alternate function 1 */ + MUX_CONFIG_ALT2, /*!< used as alternate function 2 */ + MUX_CONFIG_ALT3, /*!< used as alternate function 3 */ + MUX_CONFIG_ALT4, /*!< used as alternate function 4 */ + MUX_CONFIG_ALT5, /*!< used as alternate function 5 */ + MUX_CONFIG_ALT6, /*!< used as alternate function 6 */ + MUX_CONFIG_ALT7, /*!< used as alternate function 7 */ + MUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */ + MUX_CONFIG_GPIO = MUX_CONFIG_ALT5, /*!< used as GPIO */ +} iomux_pin_cfg_t; + +/*! + * various IOMUX pad functions + */ +typedef enum iomux_pad_config { + PAD_CTL_DRV_3_3V = 0x0 << 13, + PAD_CTL_DRV_1_8V = 0x1 << 13, + PAD_CTL_HYS_CMOS = 0x0 << 8, + PAD_CTL_HYS_SCHMITZ = 0x1 << 8, + PAD_CTL_PKE_NONE = 0x0 << 7, + PAD_CTL_PKE_ENABLE = 0x1 << 7, + PAD_CTL_PUE_KEEPER = 0x0 << 6, + PAD_CTL_PUE_PUD = 0x1 << 6, + PAD_CTL_100K_PD = 0x0 << 4, + PAD_CTL_47K_PU = 0x1 << 4, + PAD_CTL_100K_PU = 0x2 << 4, + PAD_CTL_22K_PU = 0x3 << 4, + PAD_CTL_ODE_CMOS = 0x0 << 3, + PAD_CTL_ODE_OpenDrain = 0x1 << 3, + PAD_CTL_DRV_NORMAL = 0x0 << 1, + PAD_CTL_DRV_HIGH = 0x1 << 1, + PAD_CTL_DRV_MAX = 0x2 << 1, + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0 +} iomux_pad_config_t; + +/*! + * various IOMUX general purpose functions + */ +typedef enum iomux_gp_func { + MUX_SDCTL_CSD0_SEL = 0x1 << 0, + MUX_SDCTL_CSD1_SEL = 0x1 << 1, + MUX_TAMPER_DETECT_EN = 0x1 << 2, +} iomux_gp_func_t; + +/*! + * various IOMUX input select register index + */ +typedef enum iomux_input_select { + MUX_IN_AMX_P5_RXCLK = 0, + MUX_IN_AMX_P5_RXFS, + MUX_IN_AMX_P6_DA, + MUX_IN_AMX_P6_DB, + MUX_IN_AMX_P6_RXCLK, + MUX_IN_AMX_P6_RXFS, + MUX_IN_AMX_P6_TXCLK, + MUX_IN_AMX_P6_TXFS, + MUX_IN_CAN1_CANRX, + MUX_IN_CAN2_CANRX, + MUX_IN_CCM_32K_MUXED, + MUX_IN_CCM_PMIC_RDY, + MUX_IN_CSPI1_SS2_B, + MUX_IN_CSPI1_SS3_B, + MUX_IN_CSPI2_CLK_IN, + MUX_IN_CSPI2_DATAREADY_B, + MUX_IN_CSPI2_MISO, + MUX_IN_CSPI2_MOSI, + MUX_IN_CSPI2_SS0_B, + MUX_IN_CSPI2_SS1_B, + MUX_IN_CSPI2_SS2_B, + MUX_IN_CSPI2_SS3_B, + MUX_IN_EMI_WEIM_DTACK_B, + MUX_IN_ESDHC1_DAT4_IN, + MUX_IN_ESDHC1_DAT5_IN, + MUX_IN_ESDHC1_DAT6_IN, + MUX_IN_ESDHC1_DAT7_IN, + MUX_IN_ESDHC3_CARD_CLK_IN, + MUX_IN_ESDHC3_CMD_IN, + MUX_IN_ESDHC3_DAT0, + MUX_IN_ESDHC3_DAT1, + MUX_IN_ESDHC3_DAT2, + MUX_IN_ESDHC3_DAT3, + MUX_IN_GPIO1_IN_0, + MUX_IN_GPIO1_IN_10, + MUX_IN_GPIO1_IN_11, + MUX_IN_GPIO1_IN_1, + MUX_IN_GPIO1_IN_20, + MUX_IN_GPIO1_IN_21, + MUX_IN_GPIO1_IN_22, + MUX_IN_GPIO1_IN_2, + MUX_IN_GPIO1_IN_3, + MUX_IN_GPIO1_IN_4, + MUX_IN_GPIO1_IN_5, + MUX_IN_GPIO1_IN_6, + MUX_IN_GPIO1_IN_7, + MUX_IN_GPIO1_IN_8, + MUX_IN_GPIO1_IN_9, + MUX_IN_GPIO2_IN_0, + MUX_IN_GPIO2_IN_10, + MUX_IN_GPIO2_IN_11, + MUX_IN_GPIO2_IN_12, + MUX_IN_GPIO2_IN_13, + MUX_IN_GPIO2_IN_14, + MUX_IN_GPIO2_IN_15, + MUX_IN_GPIO2_IN_16, + MUX_IN_GPIO2_IN_17, + MUX_IN_GPIO2_IN_18, + MUX_IN_GPIO2_IN_19, + MUX_IN_GPIO2_IN_1, + MUX_IN_GPIO2_IN_20, + MUX_IN_GPIO2_IN_21, + MUX_IN_GPIO2_IN_22, + MUX_IN_GPIO2_IN_23, + MUX_IN_GPIO2_IN_24, + MUX_IN_GPIO2_IN_25, + MUX_IN_GPIO2_IN_26, + MUX_IN_GPIO2_IN_27, + MUX_IN_GPIO2_IN_28, + MUX_IN_GPIO2_IN_29, + MUX_IN_GPIO2_IN_2, + MUX_IN_GPIO2_IN_30, + MUX_IN_GPIO2_IN_31, + MUX_IN_GPIO2_IN_3, + MUX_IN_GPIO2_IN_4, + MUX_IN_GPIO2_IN_5, + MUX_IN_GPIO2_IN_6, + MUX_IN_GPIO2_IN_7, + MUX_IN_GPIO2_IN_8, + MUX_IN_GPIO2_IN_9, + MUX_IN_GPIO3_IN_0, + MUX_IN_GPIO3_IN_10, + MUX_IN_GPIO3_IN_11, + MUX_IN_GPIO3_IN_12, + MUX_IN_GPIO3_IN_13, + MUX_IN_GPIO3_IN_14, + MUX_IN_GPIO3_IN_15, + MUX_IN_GPIO3_IN_4, + MUX_IN_GPIO3_IN_5, + MUX_IN_GPIO3_IN_6, + MUX_IN_GPIO3_IN_7, + MUX_IN_GPIO3_IN_8, + MUX_IN_GPIO3_IN_9, + MUX_IN_I2C3_SCL_IN, + MUX_IN_I2C3_SDA_IN, + MUX_IN_IPU_DISPB_D0_VSYNC, + MUX_IN_IPU_DISPB_D12_VSYNC, + MUX_IN_IPU_DISPB_SD_D, + MUX_IN_IPU_SENSB_DATA_0, + MUX_IN_IPU_SENSB_DATA_1, + MUX_IN_IPU_SENSB_DATA_2, + MUX_IN_IPU_SENSB_DATA_3, + MUX_IN_IPU_SENSB_DATA_4, + MUX_IN_IPU_SENSB_DATA_5, + MUX_IN_IPU_SENSB_DATA_6, + MUX_IN_IPU_SENSB_DATA_7, + MUX_IN_KPP_COL_0, + MUX_IN_KPP_COL_1, + MUX_IN_KPP_COL_2, + MUX_IN_KPP_COL_3, + MUX_IN_KPP_COL_4, + MUX_IN_KPP_COL_5, + MUX_IN_KPP_COL_6, + MUX_IN_KPP_COL_7, + MUX_IN_KPP_ROW_0, + MUX_IN_KPP_ROW_1, + MUX_IN_KPP_ROW_2, + MUX_IN_KPP_ROW_3, + MUX_IN_KPP_ROW_4, + MUX_IN_KPP_ROW_5, + MUX_IN_KPP_ROW_6, + MUX_IN_KPP_ROW_7, + MUX_IN_OWIRE_BATTERY_LINE, + MUX_IN_SPDIF_HCKT_CLK2, + MUX_IN_SPDIF_SPDIF_IN1, + MUX_IN_UART3_UART_RTS_B, + MUX_IN_UART3_UART_RXD_MUX, + MUX_IN_USB_OTG_DATA_0, + MUX_IN_USB_OTG_DATA_1, + MUX_IN_USB_OTG_DATA_2, + MUX_IN_USB_OTG_DATA_3, + MUX_IN_USB_OTG_DATA_4, + MUX_IN_USB_OTG_DATA_5, + MUX_IN_USB_OTG_DATA_6, + MUX_IN_USB_OTG_DATA_7, + MUX_IN_USB_OTG_DIR, + MUX_IN_USB_OTG_NXT, + MUX_IN_USB_UH2_DATA_0, + MUX_IN_USB_UH2_DATA_1, + MUX_IN_USB_UH2_DATA_2, + MUX_IN_USB_UH2_DATA_3, + MUX_IN_USB_UH2_DATA_4, + MUX_IN_USB_UH2_DATA_5, + MUX_IN_USB_UH2_DATA_6, + MUX_IN_USB_UH2_DATA_7, + MUX_IN_USB_UH2_DIR, + MUX_IN_USB_UH2_NXT, + MUX_IN_USB_UH2_USB_OC, +} iomux_input_select_t; + +/*! + * various IOMUX input functions + */ +typedef enum iomux_input_config { + INPUT_CTL_PATH0 = 0x0, + INPUT_CTL_PATH1, + INPUT_CTL_PATH2, + INPUT_CTL_PATH3, + INPUT_CTL_PATH4, + INPUT_CTL_PATH5, + INPUT_CTL_PATH6, + INPUT_CTL_PATH7, +} iomux_input_cfg_t; + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b + * #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b + * #iomux_input_select_t + * @param config the binary value of elements defined in \b + * #iomux_input_cfg_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config); +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/dvfs.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/dvfs.c @@ -0,0 +1,606 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file dvfs.c + * + * @brief A simplied driver for the Freescale Semiconductor MXC DVFS module. + * + * Upon initialization, the DVFS driver initializes the DVFS hardware + * sets up driver nodes attaches to the DVFS interrupt and initializes internal + * data structures. When the DVFS interrupt occurs the driver checks the cause + * of the interrupt (lower frequency, increase frequency or emergency) and + * changes the CPU voltage according to translation table that is loaded into + * the driver. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/* + * The frequency of div_3_clk will affect the dvfs sample rate.. + */ +#define DVFS_DIV3CK (3 << MXC_CCM_LTR0_DIV3CK_OFFSET) + +/* + * Panic threshold. Panic frequency change request + * will be sent if DVFS counter value will be more than this value. + */ +#define DVFS_PNCTHR (63 << MXC_CCM_LTR1_PNCTHR_OFFSET) + +/* + * Load tracking buffer source: 1 for ld_add; 0 for pre_ld_add + */ +#define DVFS_LTBRSR (1 << MXC_CCM_LTR1_LTBRSR_OFFSET) + +/* EMAC defines how many samples are included in EMA calculation */ +#define DVFS_EMAC (0x20 << MXC_CCM_LTR2_EMAC_OFFSET) + +/* + * Frequency increase threshold. Increase frequency change request + * will be sent if DVFS counter value will be more than this value. + */ +#define DVFS_UPTHR(val) (val << MXC_CCM_LTR0_UPTHR_OFFSET) + +/* + * Frequency decrease threshold. Decrease frequency change request + * will be sent if DVFS counter value will be less than this value. + */ +#define DVFS_DNTHR(val) (val << MXC_CCM_LTR0_DNTHR_OFFSET) + +/* + * DNCNT defines the amount of times the down threshold should be exceeded + * before DVFS will trigger frequency decrease request. + */ +#define DVFS_DNCNT(val) (val << MXC_CCM_LTR1_DNCNT_OFFSET) + +/* + * UPCNT defines the amount of times the up threshold should be exceeded + * before DVFS will trigger frequency increase request. + */ +#define DVFS_UPCNT(val) (val << MXC_CCM_LTR1_UPCNT_OFFSET) + +#define DVFS_DVSUP(val) (val << MXC_CCM_PMCR0_DVSUP_OFFSET) + +#define MXC_DVFS_MAX_WP_NUM 2 + +enum { + FSVAI_FREQ_NOCHANGE = 0x0, + FSVAI_FREQ_INCREASE, + FSVAI_FREQ_DECREASE, + FSVAI_FREQ_EMERG, +}; + +struct dvfs_wp { + unsigned long cpu_rate; + u32 core_voltage; + u32 dvsup; + u32 dnthr; + u32 upthr; + u32 dncnt; + u32 upcnt; +}; + +/* the default working points for MX35 TO2 DVFS. */ +static struct dvfs_wp dvfs_wp_tbl[MXC_DVFS_MAX_WP_NUM] = { + {399000000, 1200000, DVFS_DVSUP(DVSUP_LOW), DVFS_DNTHR(18), + DVFS_UPTHR(31), DVFS_DNCNT(0x33), + DVFS_UPCNT(0x33)}, +/* TBD: Need to set default voltage according to published data sheet */ + {532000000, 1350000, DVFS_DVSUP(DVSUP_TURBO), DVFS_DNTHR(18), + DVFS_UPTHR(30), DVFS_DNCNT(0x33), + DVFS_UPCNT(0x33)} +}; + +static u8 dvfs_wp_num = MXC_DVFS_MAX_WP_NUM; + + /* Used for tracking the number of interrupts */ +static u32 dvfs_nr_up[MXC_DVFS_MAX_WP_NUM]; +static u32 dvfs_nr_dn[MXC_DVFS_MAX_WP_NUM]; +static unsigned long stored_cpu_rate; /* cpu rate before DVFS starts */ +static u32 stored_pmcr0; +static int dvfs_is_active; /* indicate DVFS is active or not */ + +static struct delayed_work dvfs_work; + +/* + * Clock structures + */ +static struct clk *cpu_clk; +static struct regulator *core_reg; + +const static u8 ltr_gp_weight[] = { + 0, /* 0 */ + 0, + 0, + 0, + 0, + 0, /* 5 */ + 0, + 0, + 0, + 0, + 0, /* 10 */ + 0, + 0, + 0, + 0, + 0, /* 15 */ +}; + +DEFINE_SPINLOCK(mxc_dvfs_lock); + +/*! + * This function sets the weight of general purpose signals + * @param gp_id number of general purpose bit + * @param weight the weight of the general purpose bit + */ +static void set_gp_weight(int gp_id, u8 weight) +{ + u32 reg; + + if (gp_id < 9) { + reg = __raw_readl(MXC_CCM_LTR3); + reg = (reg & ~(MXC_CCM_LTR3_WSW_MASK(gp_id))) | + (weight << MXC_CCM_LTR3_WSW_OFFSET(gp_id)); + __raw_writel(reg, MXC_CCM_LTR3); + } else if (gp_id < 16) { + reg = __raw_readl(MXC_CCM_LTR2); + reg = (reg & ~(MXC_CCM_LTR2_WSW_MASK(gp_id))) | + (weight << MXC_CCM_LTR2_WSW_OFFSET(gp_id)); + __raw_writel(reg, MXC_CCM_LTR2); + } +} + +/*! + * This function sets upper threshold, lower threshold, + * up-counter, down-counter for load tracking. + * @param upthr upper threshold + * @param dnthr lower threshold + * @param upcnt up counter + * @param dncnt down counter + */ +static void set_ltr_thres_counter(u32 upthr, u32 dnthr, u32 upcnt, u32 dncnt) +{ + u32 reg; + reg = __raw_readl(MXC_CCM_LTR0); + reg = + (reg & + ~(MXC_CCM_LTR0_UPTHR_MASK | + MXC_CCM_LTR0_DNTHR_MASK)) | upthr | dnthr; + __raw_writel(reg, MXC_CCM_LTR0); + + reg = __raw_readl(MXC_CCM_LTR1); + reg = + (reg & + ~(MXC_CCM_LTR1_UPCNT_MASK | + MXC_CCM_LTR1_DNCNT_MASK)) | upcnt | dncnt; + __raw_writel(reg, MXC_CCM_LTR1); +} + +/*! + * This function is called for module initialization. + * It sets up the DVFS hardware. + * It sets default values for DVFS thresholds and counters. The default + * values was chosen from a set of different reasonable values. They was tested + * and the default values in the driver gave the best results. + * More work should be done to find optimal values. + * + * @return 0 if successful; non-zero otherwise. + * + */ +static int init_dvfs_controller(void) +{ + u32 i, reg; + + /* setup LTR0 */ + reg = __raw_readl(MXC_CCM_LTR0); + reg = (reg & ~(MXC_CCM_LTR0_DIV3CK_MASK)) | DVFS_DIV3CK; + __raw_writel(reg, MXC_CCM_LTR0); + + /* set up LTR1 */ + reg = __raw_readl(MXC_CCM_LTR1); + reg = (reg & ~(MXC_CCM_LTR1_PNCTHR_MASK | MXC_CCM_LTR1_LTBRSR_MASK)); + reg = reg | DVFS_PNCTHR | DVFS_LTBRSR; + __raw_writel(reg, MXC_CCM_LTR1); + + /* setup LTR2 */ + reg = __raw_readl(MXC_CCM_LTR2); + reg = (reg & ~(MXC_CCM_LTR2_EMAC_MASK)) | DVFS_EMAC; + __raw_writel(reg, MXC_CCM_LTR2); + + /* Set general purpose weights to 0 */ + for (i = 0; i < 16; i++) + set_gp_weight(i, ltr_gp_weight[i]); + + /* ARM interrupt, mask load buf full interrupt */ + reg = __raw_readl(MXC_CCM_PMCR0); + reg |= MXC_CCM_PMCR0_DVFIS | MXC_CCM_PMCR0_LBMI; + __raw_writel(reg, MXC_CCM_PMCR0); + + return 0; +} + +static void dvfs_workqueue_handler(struct work_struct *work) +{ + u32 pmcr0 = stored_pmcr0; + u32 fsvai = (pmcr0 & MXC_CCM_PMCR0_FSVAI_MASK) >> + MXC_CCM_PMCR0_FSVAI_OFFSET; + u32 dvsup = (pmcr0 & MXC_CCM_PMCR0_DVSUP_MASK) >> + MXC_CCM_PMCR0_DVSUP_OFFSET; + u32 curr_cpu; + u8 curr_dvfs; + + if (!dvfs_is_active) + return; + + if (fsvai == FSVAI_FREQ_NOCHANGE) { + /* Do nothing. Freq change is not required */ + printk(KERN_WARNING "fsvai should not be 0\n"); + goto exit; + } + + if (((dvsup == DVSUP_LOW) && (fsvai == FSVAI_FREQ_DECREASE)) || + ((dvsup == DVSUP_TURBO) && ((fsvai == FSVAI_FREQ_INCREASE) || + (fsvai == FSVAI_FREQ_EMERG)))) { + /* Interrupt should be disabled in these cases according to + * the spec since DVFS is already at lowest (highest) state */ + printk(KERN_WARNING "Something is wrong?\n"); + goto exit; + } + + /*Disable DPTC voltage update */ + pmcr0 = pmcr0 & ~MXC_CCM_PMCR0_DPVCR; + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + curr_cpu = clk_get_rate(cpu_clk); + for (curr_dvfs = 0; curr_dvfs < dvfs_wp_num; curr_dvfs++) { + if (dvfs_wp_tbl[curr_dvfs].cpu_rate == curr_cpu) { + if (fsvai == FSVAI_FREQ_DECREASE) { + curr_dvfs--; + dvfs_nr_dn[dvsup]++; + /*reduce frequency and then voltage */ + clk_set_rate(cpu_clk, + dvfs_wp_tbl[curr_dvfs].cpu_rate); + regulator_set_voltage(core_reg, + dvfs_wp_tbl[curr_dvfs]. + core_voltage, + dvfs_wp_tbl[curr_dvfs]. + core_voltage); + pr_info("Decrease frequency to: %ld \n", + dvfs_wp_tbl[curr_dvfs].cpu_rate); + } else { + /*increase freq to the highest one */ + curr_dvfs = dvfs_wp_num - 1; + dvfs_nr_up[dvsup]++; + /*Increase voltage and then frequency */ + regulator_set_voltage(core_reg, + dvfs_wp_tbl[curr_dvfs]. + core_voltage, + dvfs_wp_tbl[curr_dvfs]. + core_voltage); + clk_set_rate(cpu_clk, + dvfs_wp_tbl[curr_dvfs].cpu_rate); + pr_info("Increase frequency to: %ld \n", + dvfs_wp_tbl[curr_dvfs].cpu_rate); + } + pmcr0 = (pmcr0 & ~MXC_CCM_PMCR0_DVSUP_MASK) + | (dvfs_wp_tbl[curr_dvfs].dvsup); + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + set_ltr_thres_counter(dvfs_wp_tbl[curr_dvfs].upthr, + dvfs_wp_tbl[curr_dvfs].dnthr, + dvfs_wp_tbl[curr_dvfs].upcnt, + dvfs_wp_tbl[curr_dvfs].dncnt); + break; + } + } + + exit: + /* unmask interrupt */ + pmcr0 = pmcr0 & ~MXC_CCM_PMCR0_FSVAIM; + __raw_writel(pmcr0, MXC_CCM_PMCR0); + /*DVFS update finish */ + pmcr0 = (pmcr0 | MXC_CCM_PMCR0_DVFS_UPDATE_FINISH); + __raw_writel(pmcr0, MXC_CCM_PMCR0); +} + +static irqreturn_t dvfs_irq(int irq, void *dev_id) +{ + + u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); + + /* Config dvfs_start bit */ + pmcr0 = pmcr0 | MXC_CCM_PMCR0_DVFS_START; + /*Mask interrupt */ + pmcr0 = pmcr0 | MXC_CCM_PMCR0_FSVAIM; + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + stored_pmcr0 = pmcr0; + schedule_delayed_work(&dvfs_work, 0); + + return IRQ_RETVAL(1); +} + +/*! + * This function enables the DVFS module. + */ +static int start_dvfs(void) +{ + u32 reg = 0; + unsigned long flags; + u8 i; + + if (dvfs_is_active) { + pr_info("DVFS is already started\n"); + return 0; + } + + spin_lock_irqsave(&mxc_dvfs_lock, flags); + + stored_cpu_rate = clk_get_rate(cpu_clk); + for (i = 0; i < dvfs_wp_num; i++) { + if (dvfs_wp_tbl[i].cpu_rate == stored_cpu_rate) { + /*Set LTR0 and LTR1 */ + set_ltr_thres_counter(dvfs_wp_tbl[i].upthr, + dvfs_wp_tbl[i].dnthr, + dvfs_wp_tbl[i].upcnt, + dvfs_wp_tbl[i].dncnt); + + reg = __raw_readl(MXC_CCM_PMCR0); + reg = + (reg & ~MXC_CCM_PMCR0_DVSUP_MASK) | (dvfs_wp_tbl[i]. + dvsup); + /* enable dvfs and interrupt */ + reg = + (reg & ~MXC_CCM_PMCR0_FSVAIM) | MXC_CCM_PMCR0_DVFEN; + + __raw_writel(reg, MXC_CCM_PMCR0); + + dvfs_is_active = 1; + pr_info("DVFS Starts\n"); + break; + } + } + + spin_unlock_irqrestore(&mxc_dvfs_lock, flags); + if (dvfs_is_active) + return 0; + else + return 1; +} + +/*! + * This function disables the DVFS module. + */ +static void stop_dvfs(void) +{ + u32 pmcr0; + unsigned long curr_cpu = clk_get_rate(cpu_clk); + u8 index; + + if (dvfs_is_active) { + + pmcr0 = __raw_readl(MXC_CCM_PMCR0); + /* disable dvfs and its interrupt */ + pmcr0 = (pmcr0 & ~MXC_CCM_PMCR0_DVFEN) | MXC_CCM_PMCR0_FSVAIM; + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + if (stored_cpu_rate < curr_cpu) { + for (index = 0; index < dvfs_wp_num; index++) { + if (dvfs_wp_tbl[index].cpu_rate == + stored_cpu_rate) + break; + } + clk_set_rate(cpu_clk, stored_cpu_rate); + regulator_set_voltage(core_reg, + dvfs_wp_tbl[index].core_voltage, + dvfs_wp_tbl[index].core_voltage); + } else if (stored_cpu_rate > curr_cpu) { + for (index = 0; index < dvfs_wp_num; index++) { + if (dvfs_wp_tbl[index].cpu_rate == + stored_cpu_rate) + break; + } + regulator_set_voltage(core_reg, + dvfs_wp_tbl[index].core_voltage, + dvfs_wp_tbl[index].core_voltage); + clk_set_rate(cpu_clk, stored_cpu_rate); + } + + dvfs_is_active = 0; + } + + pr_info("DVFS is stopped\n"); +} + +static ssize_t dvfs_enable_store(struct sys_device *dev, struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "1") != NULL) { + if (start_dvfs() != 0) + printk(KERN_ERR "Failed to start DVFS\n"); + } else if (strstr(buf, "0") != NULL) { + stop_dvfs(); + } + + return size; +} + +static ssize_t dvfs_status_show(struct sys_device *dev, struct sysdev_attribute *attr, + char *buf) +{ + int size = 0, i; + + if (dvfs_is_active) + size = sprintf(buf, "DVFS is enabled\n"); + else + size = sprintf(buf, "DVFS is disabled\n"); + + size += sprintf((buf + size), "UP:\t"); + for (i = 0; i < MXC_DVFS_MAX_WP_NUM; i++) + size += sprintf((buf + size), "%d\t", dvfs_nr_up[i]); + size += sprintf((buf + size), "\n"); + + size += sprintf((buf + size), "DOWN:\t"); + for (i = 0; i < MXC_DVFS_MAX_WP_NUM; i++) + size += sprintf((buf + size), "%d\t", dvfs_nr_dn[i]); + size += sprintf((buf + size), "\n"); + + return size; +} + +static ssize_t dvfs_status_store(struct sys_device *dev, struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "reset") != NULL) { + int i; + for (i = 0; i < MXC_DVFS_MAX_WP_NUM; i++) { + dvfs_nr_up[i] = 0; + dvfs_nr_dn[i] = 0; + } + } + + return size; +} + +static SYSDEV_ATTR(enable, 0200, NULL, dvfs_enable_store); +static SYSDEV_ATTR(status, 0644, dvfs_status_show, dvfs_status_store); + +static struct sysdev_class dvfs_sysclass = { + .name = "dvfs", +}; + +static struct sys_device dvfs_device = { + .id = 0, + .cls = &dvfs_sysclass, +}; + +static int dvfs_sysdev_ctrl_init(void) +{ + int err; + + err = sysdev_class_register(&dvfs_sysclass); + if (!err) + err = sysdev_register(&dvfs_device); + if (!err) { + err = sysdev_create_file(&dvfs_device, &attr_enable); + err = sysdev_create_file(&dvfs_device, &attr_status); + } + + return err; +} + +static void dvfs_sysdev_ctrl_exit(void) +{ + sysdev_remove_file(&dvfs_device, &attr_enable); + sysdev_remove_file(&dvfs_device, &attr_status); + sysdev_unregister(&dvfs_device); + sysdev_class_unregister(&dvfs_sysclass); +} + +static int __init dvfs_init(void) +{ + int err = 0; + u8 index; + unsigned long curr_cpu; + + if (cpu_is_mx35_rev(CHIP_REV_1_0) == 1) { + /* + * Don't support DVFS for auto path in TO1 because + * the voltages under 399M are all 1.2v + */ + if (!(__raw_readl(MXC_CCM_PDR0) & MXC_CCM_PDR0_AUTO_CON)) { + pr_info("MX35 TO1 auto path, no need to use DVFS \n"); + return -1; + } + } + + cpu_clk = clk_get(NULL, "cpu_clk"); + curr_cpu = clk_get_rate(cpu_clk); + + if (board_is_rev(BOARD_REV_2)) + core_reg = regulator_get(NULL, "SW2"); + else + core_reg = regulator_get(NULL, "SW3"); + + dvfs_is_active = 0; + + /*Set voltage */ + for (index = 0; index < dvfs_wp_num; index++) { + if (dvfs_wp_tbl[index].cpu_rate == curr_cpu + && !IS_ERR(core_reg)) { + regulator_set_voltage(core_reg, + dvfs_wp_tbl[index].core_voltage, + dvfs_wp_tbl[index].core_voltage); + break; + } + } + + err = init_dvfs_controller(); + if (err) { + printk(KERN_ERR "DVFS: Unable to initialize DVFS"); + return err; + } + + INIT_DELAYED_WORK(&dvfs_work, dvfs_workqueue_handler); + + /* request the DVFS interrupt */ + err = request_irq(MXC_INT_DVFS, dvfs_irq, IRQF_DISABLED, "dvfs", NULL); + if (err) { + printk(KERN_ERR "DVFS: Unable to attach to DVFS interrupt"); + return err; + } + + err = dvfs_sysdev_ctrl_init(); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for dvfs"); + return err; + } + + return err; +} + +static void __exit dvfs_cleanup(void) +{ + stop_dvfs(); + + /* release the DVFS interrupt */ + free_irq(MXC_INT_DVFS, NULL); + + dvfs_sysdev_ctrl_exit(); + + clk_put(cpu_clk); + regulator_put(core_reg); +} + +module_init(dvfs_init); +module_exit(dvfs_cleanup); + +MODULE_AUTHOR("Freescale Seminconductor, Inc."); +MODULE_DESCRIPTION("DVFS driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack.c @@ -0,0 +1,1290 @@ +/* + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include +#include + +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "board-mx35_3stack.h" +#include "crm_regs.h" +#include "iomux.h" + +/*! + * @file mach-mx35/mx35_3stack.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX35 + */ + +unsigned int mx35_3stack_board_io; + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +/* MTD NOR flash */ + +#if defined(CONFIG_MTD_MXC) || defined(CONFIG_MTD_MXC_MODULE) + +static struct mtd_partition mxc_nor_partitions[] = { + { + .name = "Bootloader", + .size = 512 * 1024, + .offset = 0x00000000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "nor.Kernel", + .size = 4 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = 0}, + { + .name = "nor.userfs", + .size = 30 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = 0}, + { + .name = "nor.rootfs", + .size = 28 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE}, + { + .name = "FIS directory", + .size = 12 * 1024, + .offset = 0x01FE0000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "Redboot config", + .size = MTDPART_SIZ_FULL, + .offset = 0x01FFF000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, +}; + +static struct flash_platform_data mxc_flash_data = { + .map_name = "cfi_probe", + .width = 2, + .parts = mxc_nor_partitions, + .nr_parts = ARRAY_SIZE(mxc_nor_partitions), +}; + +static struct resource mxc_flash_resource = { + .start = 0xa0000000, + .end = 0xa0000000 + 0x04000000 - 1, + .flags = IORESOURCE_MEM, + +}; + +static struct platform_device mxc_nor_mtd_device = { + .name = "mxc_nor_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_flash_data, + }, + .num_resources = 1, + .resource = &mxc_flash_resource, +}; + +static void mxc_init_nor_mtd(void) +{ + (void)platform_device_register(&mxc_nor_mtd_device); +} +#else +static void mxc_init_nor_mtd(void) +{ +} +#endif + +/* MTD NAND flash */ + +#if defined(CONFIG_MTD_NAND_MXC) || defined(CONFIG_MTD_NAND_MXC_MODULE) \ +|| defined(CONFIG_MTD_NAND_MXC_V2) || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) + +static struct mtd_partition mxc_nand_partitions[] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 3 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.configure", + .offset = MTDPART_OFS_APPEND, + .size = 8 * 1024 * 1024}, + { + .name = "nand.userfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +static struct flash_platform_data mxc_nand_data = { + .parts = mxc_nand_partitions, + .nr_parts = ARRAY_SIZE(mxc_nand_partitions), + .width = 1, +}; + +static struct platform_device mxc_nand_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ + if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) + mxc_nand_data.width = 2; + + platform_device_register(&mxc_nand_mtd_device); +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +static struct mxc_lcd_platform_data lcd_data = { + .io_reg = "LCD" +}; + +static struct platform_device lcd_dev = { + .name = "lcd_claa", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = (void *)&lcd_data, + }, +}; + +static void mxc_init_lcd(void) +{ + platform_device_register(&lcd_dev); +} + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +/* mxc lcd driver */ +static struct platform_device mxc_fb_device = { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, +}; + +static void mxc_init_fb(void) +{ + (void)platform_device_register(&mxc_fb_device); +} +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +#if defined(CONFIG_BACKLIGHT_MXC) +static struct platform_device mxcbl_devices[] = { +#if defined(CONFIG_BACKLIGHT_MXC_IPU) || defined(CONFIG_BACKLIGHT_MXC_IPU_MODULE) + { + .name = "mxc_ipu_bl", + .id = 0, + .dev = { + .platform_data = (void *)3, /* DISP # for this backlight */ + }, + } +#endif +}; + +static inline void mxc_init_bl(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(mxcbl_devices); i++) { + platform_device_register(&mxcbl_devices[i]); + } +} +#else +static inline void mxc_init_bl(void) +{ +} +#endif + +#if defined(CONFIG_MXC_MLB) || defined(CONFIG_MXC_MLB_MODULE) +static struct resource mlb_resource[] = { + [0] = { + .start = MLB_BASE_ADDR, + .end = MLB_BASE_ADDR + 0x300, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MLB, + .end = MXC_INT_MLB, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mxc_mlb_platform_data mlb_data = { + .buf_address = IRAM_BASE_ADDR_VIRT + MLB_IRAM_ADDR_OFFSET, + .phy_address = IRAM_BASE_ADDR + MLB_IRAM_ADDR_OFFSET, + .reg_nvcc = "VVIDEO", + .mlb_clk = "mlb_clk", +}; + +static struct platform_device mlb_dev = { + .name = "mxc_mlb", + .id = 0, + .dev = { + .platform_data = &mlb_data, + }, + .num_resources = ARRAY_SIZE(mlb_resource), + .resource = mlb_resource, +}; + +static inline void mxc_init_mlb(void) +{ + platform_device_register(&mlb_dev); +} +#else +static inline void mxc_init_mlb(void) +{ +} +#endif + +static void mxc_unifi_hardreset(int pin_level) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 1, pin_level & 0x01); +} + +static void mxc_unifi_enable(int en) +{ + if (en) { + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 1); + msleep(10); + } else + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 0); +} + +static struct mxc_unifi_platform_data unifi_data = { + .hardreset = mxc_unifi_hardreset, + .enable = mxc_unifi_enable, + .reg_gpo1 = "GPO2", + .reg_gpo2 = "GPO3", + .reg_1v5_ana_bb = "PWGT1", + .reg_vdd_vpa = "VAUDIO", + .reg_1v5_dd = "SW1", + .host_id = 1, +}; + +struct mxc_unifi_platform_data *get_unifi_plat_data(void) +{ + return &unifi_data; +} + +EXPORT_SYMBOL(get_unifi_plat_data); + +static int tsc2007_get_pendown_state(void) +{ + return !gpio_get_value(IOMUX_TO_GPIO(MX35_PIN_CAPTURE)); +} + +static int tsc2007_init(void) +{ + return 0; +} + +static void tsc2007_exit(void) +{ +} + +struct tsc2007_platform_data tsc2007_data = { + .model = 2007, + .x_plate_ohms = 400, + .get_pendown_state = tsc2007_get_pendown_state, + .init_platform_hw = tsc2007_init, + .exit_platform_hw = tsc2007_exit, +}; + +static struct mxc_camera_platform_data camera_data = { + .core_regulator = "SW1", + .io_regulator = "VAUDIO", + .analog_regulator = NULL, + .gpo_regulator = "PWGT1", + .mclk = 27000000, +}; + +void si4702_reset(void) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 4, 0); + msleep(100); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 4, 1); + msleep(100); +} + +void si4702_clock_ctl(int flag) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 7, flag); +} + +static void si4702_gpio_get(void) +{ +} + +static void si4702_gpio_put(void) +{ +} + +static struct mxc_fm_platform_data si4702_data = { + .reg_vio = "VSD", + .reg_vdd = NULL, + .gpio_get = si4702_gpio_get, + .gpio_put = si4702_gpio_put, + .reset = si4702_reset, + .clock_ctl = si4702_clock_ctl, + .sksnr = 0, + .skcnt = 0, + .band = 0, + .space = 100, + .seekth = 0xa, +}; + +static void adv7180_pwdn(int pwdn) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 1, pwdn); +} + +static void adv7180_reset(void) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 6, 0); + msleep(5); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 6, 1); + msleep(5); +} + +static struct mxc_tvin_platform_data adv7180_data = { + .dvddio_reg = NULL, + .dvdd_reg = "SW3", + .avdd_reg = "PWGT2", + .pvdd_reg = NULL, + .pwdn = adv7180_pwdn, + .reset = adv7180_reset, +}; + +static struct i2c_board_info mxc_i2c_board_info[] __initdata = { + { + .type = "max8660", + .addr = 0x34, + }, + { + .type = "tsc2007", + .addr = 0x48, + .platform_data = &tsc2007_data, + .irq = IOMUX_TO_IRQ(MX35_PIN_CAPTURE), + }, + { + .type = "ov2640", + .addr = 0x30, + .platform_data = (void *)&camera_data, + }, + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, + { + .type = "ak4647-i2c", + .addr = 0x12, + }, +#if defined(CONFIG_I2C_SLAVE_CLIENT) + { + .type = "i2c-slave-client", + .addr = 0x55, + }, +#endif + { + .type = "si4702", + .addr = 0x10, + .platform_data = (void *)&si4702_data, + }, + { + .type = "adv7180", + .addr = 0x21, + .platform_data = (void *)&adv7180_data, + }, +}; + +static struct spi_board_info mxc_spi_board_info[] __initdata = { + { + .modalias = "wm8580_spi", + .max_speed_hz = 8000000, /* max spi SCK clock speed in HZ */ + .bus_num = 1, + .chip_select = 1, + }, +}; + +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +static struct resource smsc911x_resources[] = { + { + .start = LAN9217_BASE_ADDR, + .end = LAN9217_BASE_ADDR + 0x100, + .flags = IORESOURCE_MEM, + }, + { + .start = LAN9217_IRQ, + .end = LAN9217_IRQ, + .flags = IORESOURCE_IRQ, + } +}; + +struct smsc911x_platform_config smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, +}; + +static struct platform_device smsc_lan9217_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &smsc911x_config, + }, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, +}; + +static void mxc_init_enet(void) +{ + platform_device_register(&smsc_lan9217_device); +} +#else +static inline void mxc_init_enet(void) +{ +} +#endif + +#if defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE) +extern void gpio_fec_active(void); +extern void gpio_fec_inactive(void); +static int fec_enable(void); +static int fec_disable(void); +static struct resource mxc_fec_resources[] = { + { + .start = MXC_FEC_BASE_ADDR, + .end = MXC_FEC_BASE_ADDR + 0xfff, + .flags = IORESOURCE_MEM + }, { + .start = MXC_INT_FEC, + .end = MXC_INT_FEC, + .flags = IORESOURCE_IRQ + }, +}; + +static struct fec_platform_data mxc_fec_data = { + .init = fec_enable, + .uninit = fec_disable, +}; + +struct platform_device mxc_fec_device = { + .name = "fec", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_fec_data, + }, + .num_resources = ARRAY_SIZE(mxc_fec_resources), + .resource = mxc_fec_resources, +}; + +static int fec_enable(void) +{ + mxc_fec_data.vddio_reg = regulator_get(&mxc_fec_device.dev, "VGEN1"); + + if (IS_ERR(mxc_fec_data.vddio_reg)) + return -EINVAL; + regulator_enable(mxc_fec_data.vddio_reg); + gpio_fec_active(); + return 0; +} + +static int fec_disable(void) +{ + if (IS_ERR(mxc_fec_data.vddio_reg)) + return -EINVAL; + + gpio_fec_inactive(); + regulator_disable(mxc_fec_data.vddio_reg); + regulator_put(mxc_fec_data.vddio_reg); + return 0; +} + +static __init int mxc_init_fec(void) +{ + return platform_device_register(&mxc_fec_device); +} +#else +static inline int mxc_init_fec(void) +{ + return 0; +} +#endif + +#if defined(CONFIG_MMC_IMX_ESDHCI) || defined(CONFIG_MMC_IMX_ESDHCI_MODULE) +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_32_33, +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) + .caps = MMC_CAP_4_BIT_DATA, +#else + .caps = MMC_CAP_8_BIT_DATA, +#endif + .min_clk = 150000, + .max_clk = 52000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "sdhc_clk", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MX35_INT_MMC_SDHC1, + .end = MX35_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = MXC_PSEUDO_IRQ_SD1_CD, + .end = MXC_PSEUDO_IRQ_SD1_CD, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxsdhci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | + MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 50000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "sdhc_clk", +}; + +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxcsdhc2_device = { + .name = "mxsdhci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; +#endif + +static inline void mxc_init_mmc(void) +{ + (void)platform_device_register(&mxcsdhc1_device); +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) + (void)platform_device_register(&mxcsdhc2_device); +#endif +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +#ifdef CONFIG_MXC_PSEUDO_IRQS +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxc_pseudo_irq_device = { + .name = "mxc_pseudo_irq", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline int mxc_init_pseudo_irq(void) +{ + return platform_device_register(&mxc_pseudo_irq_device); +} + +late_initcall(mxc_init_pseudo_irq); + +/*! + * Power Key interrupt handler. + */ +static irqreturn_t power_key_int(int irq, void *dev_id) +{ + pr_info(KERN_INFO "on-off key pressed\n"); + return 0; +} + +/*! + * Power Key initialization. + */ +static int __init mxc_init_power_key(void) +{ + if (!board_is_rev(BOARD_REV_2)) { + /*Set power key as wakeup resource */ + int irq, ret; + irq = MXC_PSEUDO_IRQ_POWER_KEY; + set_irq_type(irq, IRQF_TRIGGER_RISING); + ret = request_irq(irq, power_key_int, 0, "power_key", 0); + if (ret) + pr_info("register on-off key interrupt failed\n"); + else + enable_irq_wake(irq); + return ret; + } + return 0; +} + +late_initcall(mxc_init_power_key); +#endif + +#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE) +extern void gpio_ata_active(void); +extern void gpio_ata_inactive(void); + +static int ata_init(struct platform_device *pdev) +{ + /* Configure the pins */ + gpio_ata_active(); + + return 0; +} + +static void ata_exit(void) +{ + /* Free the pins */ + gpio_ata_inactive(); +} + +static struct fsl_ata_platform_data ata_data = { + .adma_flag = 1, /* 0:smart dma, 1:ADMA */ + .udma_mask = 0x3F, + .mwdma_mask = 0x1F, + .pio_mask = ATA_PIO4, + .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2, + .max_sg = MXC_IDE_DMA_BD_NR, + .init = ata_init, + .exit = ata_exit, + .core_reg = NULL, /*"LDO2", */ + .io_reg = NULL, /*"LDO3", */ +}; + +static struct resource pata_fsl_resources[] = { + [0] = { /* I/O */ + .start = ATA_BASE_ADDR, + .end = ATA_BASE_ADDR + 0x000000C8, + .flags = IORESOURCE_MEM, + }, + [2] = { /* IRQ */ + .start = MXC_INT_ATA, + .end = MXC_INT_ATA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pata_fsl_device = { + .name = "pata_fsl", + .id = -1, + .num_resources = ARRAY_SIZE(pata_fsl_resources), + .resource = pata_fsl_resources, + .dev = { + .platform_data = &ata_data, + .coherent_dma_mask = ~0, + }, +}; + +static void __init mxc_init_pata(void) +{ + (void)platform_device_register(&pata_fsl_device); +} +#else /* CONFIG_PATA_FSL */ +static void __init mxc_init_pata(void) +{ +} +#endif /* CONFIG_PATA_FSL */ + +#if defined(CONFIG_GPS_IOCTRL) || defined(CONFIG_GPS_IOCTRL_MODULE) +static struct mxc_gps_platform_data gps_data = { + .core_reg = "SW3", + .analog_reg = "PWGT2", +}; + +static struct platform_device mxc_gps_device = { + .name = "gps_ioctrl", + .id = 0, + .dev = { + .platform_data = &gps_data, + }, +}; + +static void __init mxc_init_gps(void) +{ + (void)platform_device_register(&mxc_gps_device); +} +#else +static void __init mxc_init_gps(void) +{ +} +#endif + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); + +#ifdef CONFIG_DISCONTIGMEM + do { + int nid; + mi->nr_banks = MXC_NUMNODES; + for (nid = 0; nid < mi->nr_banks; nid++) + SET_NODE(mi, nid); + } while (0); +#endif +} + +static void bt_reset(void) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 2, 0); + msleep(5); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 2, 1); +} + +static struct mxc_bt_platform_data mxc_bt_data = { + .bt_vdd = "GPO2", + .bt_vdd_parent = NULL, + .bt_vusb = NULL, + .bt_vusb_parent = NULL, + .bt_reset = bt_reset, +}; + +static struct platform_device mxc_bt_device = { + .name = "mxc_bt", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_bt_data, + }, +}; + +static void mxc_init_bluetooth(void) +{ + (void)platform_device_register(&mxc_bt_device); +} + +#if defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000_MODULE) + +static int sgtl5000_headphone_det_status(void) +{ + int ret = 0; + if (0 != pmic_gpio_get_designation_bit_val(0, &ret)) + printk(KERN_ERR "Get headphone status error."); + return ret; +} + +static int mxc_sgtl5000_plat_init(void); +static int mxc_sgtl5000_plat_finit(void); +static int mxc_sgtl5000_amp_enable(int enable); + +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 1, + .src_port = 1, + .ext_port = 4, + .hp_irq = MXC_PSEUDO_IRQ_HEADPHONE, + .hp_status = sgtl5000_headphone_det_status, + .amp_enable = mxc_sgtl5000_amp_enable, + .sysclk = 12000000, + .init = mxc_sgtl5000_plat_init, + .finit = mxc_sgtl5000_plat_finit, +}; + +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", + .dev = { + .release = mxc_nop_release, + .platform_data = &sgtl5000_data, + }, +}; + +static int mxc_sgtl5000_plat_init(void) +{ + struct regulator *reg; + reg = regulator_get(&mxc_sgtl5000_device.dev, "SPKR"); + if (IS_ERR(reg)) + return -EINVAL; + sgtl5000_data.priv = reg; + return 0; +} + +static int mxc_sgtl5000_plat_finit(void) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + if (reg) { + regulator_put(reg); + sgtl5000_data.priv = NULL; + } + return 0; +} + +static int mxc_sgtl5000_amp_enable(int enable) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + + if (!reg) + return -EINVAL; + if (enable) + regulator_enable(reg); + else + regulator_disable(reg); + return 0; +} + +static void mxc_init_sgtl5000(void) +{ + struct clk *cko1, *parent; + unsigned long rate; + + /* for board v1.1 do nothing */ + if (!board_is_rev(BOARD_REV_2)) + return; + + cko1 = clk_get(NULL, "cko1_clk"); + if (IS_ERR(cko1)) + return; + parent = clk_get(NULL, "ckih"); + if (IS_ERR(parent)) + return; + clk_set_parent(cko1, parent); + rate = clk_round_rate(cko1, 12000000); + if (rate < 8000000 || rate > 27000000) { + printk(KERN_ERR "Error: SGTL5000 mclk freq %d out of range!\n", + (unsigned int)rate); + clk_put(parent); + clk_put(cko1); + return; + } + clk_set_rate(cko1, rate); + clk_enable(cko1); + sgtl5000_data.sysclk = rate; + platform_device_register(&mxc_sgtl5000_device); +} +#else +static void mxc_init_sgtl5000(void) +{ +} +#endif + +#if defined(CONFIG_SND_SOC_IMX_3STACK_AK4647) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_AK4647_MODULE) +static int mxc_ak4647_amp_enable(int enable) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, enable); + return 0; +} + +static int mxc_ak4647_plat_init(void) +{ + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 0); + msleep(1); + pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 1); + return 0; +} + +static int ak4647_headphone_det_status(void) +{ + int ret = 0; + if (0 != pmic_gpio_get_designation_bit_val(0, &ret)) + printk(KERN_ERR "Get headphone status error."); + return ret; +} + +static struct mxc_audio_platform_data mxc_ak4647_data = { + .ssi_num = 1, + .src_port = 1, + .ext_port = 4, + .amp_enable = mxc_ak4647_amp_enable, + .init = mxc_ak4647_plat_init, + .hp_status = ak4647_headphone_det_status, + .intr_id_hp = MXC_PSEUDO_IRQ_HEADPHONE, +}; + +static struct platform_device mxc_alsa_device = { + .name = "imx-3stack-ak4647", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ak4647_data, + }, + +}; + +static void mxc_init_ak4647(void) +{ + platform_device_register(&mxc_alsa_device); +} +#else +static void mxc_init_ak4647(void) +{ +} +#endif + +#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) +static void flexcan_xcvr_enable(int id, int en) +{ + static int pwdn; + + if (id < 0 || id > 1) + return; + + if (en) { + if (!(pwdn++)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, + 1, 0); + } else { + if (!(--pwdn)) + pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, + 1, 1); + } +} + +struct flexcan_platform_data flexcan_data[] = { + { + .core_reg = "GPO2", + .io_reg = NULL, + .xcvr_enable = flexcan_xcvr_enable, + .active = gpio_can_active, + .inactive = gpio_can_inactive,}, + { + .core_reg = "GPO2", + .io_reg = NULL, + .xcvr_enable = flexcan_xcvr_enable, + .active = gpio_can_active, + .inactive = gpio_can_inactive,}, +}; +#endif + +/*! + * fixup for mx35 3stack board v1.0 (MAX8660) + */ +static void mx35_3stack_fixup_for_board_v1(void) +{ +#if defined(CONFIG_MXC_MLB) || defined(CONFIG_MXC_MLB_MODULE) + mlb_data.reg_nvcc = "LDO6"; +#endif + +#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE) + unifi_data.reg_gpo1 = NULL; + unifi_data.reg_gpo2 = NULL; + unifi_data.reg_1v5_ana_bb = "SW4"; + unifi_data.reg_vdd_vpa = "SW1"; + unifi_data.reg_1v5_dd = "SW4"; +#endif + camera_data.analog_regulator = "LDO7"; + camera_data.core_regulator = NULL; + camera_data.io_regulator = NULL; + camera_data.gpo_regulator = NULL; + camera_data.mclk = 20000000; + + adv7180_data.dvddio_reg = NULL; + adv7180_data.dvdd_reg = NULL; + adv7180_data.avdd_reg = NULL; + adv7180_data.pvdd_reg = NULL; + + si4702_data.reg_vio = "SW1"; + si4702_data.reg_vdd = NULL; + +#if defined(CONFIG_GPS_IOCTRL) || defined(CONFIG_GPS_IOCTRL_MODULE) + gps_data.core_reg = "SW1"; + gps_data.analog_reg = "SW2"; +#endif + + mxc_bt_data.bt_vdd = "SW1"; + +#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) + flexcan_data[0].core_reg = "SW1"; + flexcan_data[1].core_reg = "SW1"; +#endif +} + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + mxc_cpu_common_init(); + + early_console_setup(saved_command_line); + mxc_register_gpios(); + mxc_init_devices(); + if (!board_is_rev(BOARD_REV_2)) + mx35_3stack_fixup_for_board_v1(); + mx35_3stack_gpio_init(); + mxc_init_enet(); + mxc_init_nor_mtd(); + mxc_init_nand_mtd(); + + mx35_3stack_init_mc13892(); + mx35_3stack_init_mc9s08dz60(); + mxc_init_lcd(); + mxc_init_fb(); + mxc_init_bl(); + mxc_init_sgtl5000(); + mxc_init_ak4647(); + + i2c_register_board_info(0, mxc_i2c_board_info, + ARRAY_SIZE(mxc_i2c_board_info)); + + spi_register_board_info(mxc_spi_board_info, + ARRAY_SIZE(mxc_spi_board_info)); + mxc_init_mmc(); + mxc_init_pata(); + mxc_init_bluetooth(); + mxc_init_gps(); + mxc_init_mlb(); + mxc_init_fec(); +} + +#define PLL_PCTL_REG(brmo, pd, mfd, mfi, mfn) \ + (((brmo) << 31) + (((pd) - 1) << 26) + (((mfd) - 1) << 16) + \ + ((mfi) << 10) + mfn) + +/* For 24MHz input clock */ +#define PLL_665MHZ PLL_PCTL_REG(1, 1, 48, 13, 41) +#define PLL_532MHZ PLL_PCTL_REG(1, 1, 12, 11, 1) +#define PLL_399MHZ PLL_PCTL_REG(0, 1, 16, 8, 5) + +/* working point(wp): 0,1 - 133MHz; 2,3 - 266MHz; 4,5 - 399MHz;*/ +/* auto input clock table */ +static struct cpu_wp cpu_wp_auto[] = { + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 133000000, + .pdr0_reg = (0x2 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 133000000, + .pdr0_reg = (0x6 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 266000000, + .pdr0_reg = (0x1 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 266000000, + .pdr0_reg = (0x5 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 399000000, + .pdr0_reg = (0x0 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 399000000, + .pdr0_reg = (0x6 << MXC_CCM_PDR0_AUTO_MUX_DIV_OFFSET),}, +}; + +/* consumer input clock table */ +static struct cpu_wp cpu_wp_con[] = { + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 133000000, + .pdr0_reg = (0x6 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 133000000, + .pdr0_reg = (0xE << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 266000000, + .pdr0_reg = (0x2 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 266000000, + .pdr0_reg = (0xA << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 399000000, + .pdr0_reg = (0x1 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 399000000, + .pdr0_reg = (0x9 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 532000000, + .pdr0_reg = (0x0 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 532000000, + .pdr0_reg = (0x8 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, + { + .pll_reg = PLL_665MHZ, + .pll_rate = 665000000, + .cpu_rate = 665000000, + .pdr0_reg = (0x7 << MXC_CCM_PDR0_CON_MUX_DIV_OFFSET),}, +}; + +struct cpu_wp *get_cpu_wp(int *wp) +{ + if (cpu_is_mx35_rev(CHIP_REV_2_0) >= 1) { + *wp = 9; + return cpu_wp_con; + } else { + if (__raw_readl(MXC_CCM_PDR0) & MXC_CCM_PDR0_AUTO_CON) { + *wp = 9; + return cpu_wp_con; + } else { + *wp = 6; + return cpu_wp_auto; + } + } +} + +static void __init mx35_3stack_timer_init(void) +{ + mx35_clocks_init(); +} + +static struct sys_timer mxc_timer = { + .init = mx35_3stack_timer_init, +}; + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX35_3DS data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX35_3DS, "Freescale MX35 3-Stack Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx35_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/serial.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/serial.h @@ -0,0 +1,132 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX35_SERIAL_H__ +#define __ARCH_ARM_MACH_MX35_SERIAL_H__ + +/*! + * @file mach-mx35/serial.h + * + * @ingroup MSL_MX35 + */ +#include + +/* UART 1 configuration */ +/*! + * This option allows to choose either an interrupt-driven software controlled + * hardware flow control (set this option to 0) or hardware-driven hardware + * flow control (set this option to 1). + */ +#define UART1_HW_FLOW 1 +/*! + * This specifies the threshold at which the CTS pin is deasserted by the + * RXFIFO. Set this value in Decimal to anything from 0 to 32 for + * hardware-driven hardware flow control. Read the HW spec while specifying + * this value. When using interrupt-driven software controlled hardware + * flow control set this option to -1. + */ +#define UART1_UCR4_CTSTL 16 +/*! + * This is option to enable (set this option to 1) or disable DMA data transfer + */ +#define UART1_DMA_ENABLE 0 +/*! + * Specify the size of the DMA receive buffer. The minimum buffer size is 512 + * bytes. The buffer size should be a multiple of 256. + */ +#define UART1_DMA_RXBUFSIZE 1024 +/*! + * Specify the MXC UART's Receive Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the RxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_RXTL 16 +/*! + * Specify the MXC UART's Transmit Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the TxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_TXTL 16 +/* UART 2 configuration */ +#define UART2_HW_FLOW 1 +#define UART2_UCR4_CTSTL 16 +#define UART2_DMA_ENABLE 0 +#define UART2_DMA_RXBUFSIZE 1024 +#define UART2_UFCR_RXTL 16 +#define UART2_UFCR_TXTL 16 +/* UART 3 configuration */ +#define UART3_HW_FLOW 1 +#define UART3_UCR4_CTSTL 16 +#define UART3_DMA_ENABLE 1 +#define UART3_DMA_RXBUFSIZE 1024 +#define UART3_UFCR_RXTL 16 +#define UART3_UFCR_TXTL 16 + +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +/* + * Is the MUXED interrupt output sent to the ARM core + */ +#define INTS_NOTMUXED 0 +#define INTS_MUXED 1 +/* UART 1 configuration */ +/*! + * This define specifies whether the muxed ANDed interrupt line or the + * individual interrupts from the UART port is integrated with the ARM core. + * There exists a define like this for each UART port. Valid values that can + * be used are \b INTS_NOTMUXED or \b INTS_MUXED. + */ +#define UART1_MUX_INTS INTS_MUXED +/*! + * This define specifies the transmitter interrupt number or the interrupt + * number of the ANDed interrupt in case the interrupts are muxed. There exists + * a define like this for each UART port. + */ +#define UART1_INT1 MXC_INT_UART1 +/*! + * This define specifies the receiver interrupt number. If the interrupts of + * the UART are muxed, then we specify here a dummy value -1. There exists a + * define like this for each UART port. + */ +#define UART1_INT2 -1 +/*! + * This specifies the master interrupt number. If the interrupts of the UART + * are muxed, then we specify here a dummy value of -1. There exists a define + * like this for each UART port. + */ +#define UART1_INT3 -1 +/*! + * This specifies if the UART is a shared peripheral. It holds the shared + * peripheral number if it is shared or -1 if it is not shared. There exists + * a define like this for each UART port. + */ +#define UART1_SHARED_PERI -1 +/* UART 2 configuration */ +#define UART2_MUX_INTS INTS_MUXED +#define UART2_INT1 MXC_INT_UART2 +#define UART2_INT2 -1 +#define UART2_INT3 -1 +#define UART2_SHARED_PERI -1 +/* UART 3 configuration */ +#define UART3_MUX_INTS INTS_MUXED +#define UART3_INT1 MXC_INT_UART3 +#define UART3_INT2 -1 +#define UART3_INT3 -1 +#define UART3_SHARED_PERI SPBA_UART3 + +#endif /* __ARCH_ARM_MACH_MX35_SERIAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack_pmic_mc9s08dz60.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack_pmic_mc9s08dz60.c @@ -0,0 +1,104 @@ +/* + * mx35-3stack-pmic-mc9s08dz60.c -- i.MX35 3STACK Driver for MCU PMIC + */ + /* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" +#include "board-mx35_3stack.h" + +static struct regulator_init_data lcd_init = { + .constraints = { + .name = "LCD", + } +}; + +static struct regulator_init_data wifi_init = { + .constraints = { + .name = "WIFI", + } +}; + +static struct regulator_init_data hdd_init = { + .constraints = { + .name = "HDD", + } +}; + +static struct regulator_init_data gps_init = { + .constraints = { + .name = "GPS", + } +}; + +static struct regulator_init_data spkr_init = { + .constraints = { + .name = "SPKR", + } +}; + +static int mc9s08dz60_regulator_init(struct mc9s08dz60 *mc9s08dz60) +{ + if (!board_is_rev(BOARD_REV_2)) + return 0; + + mc9s08dz60_register_regulator( + mc9s08dz60, MC9S08DZ60_LCD, &lcd_init); + mc9s08dz60_register_regulator(mc9s08dz60, + MC9S08DZ60_WIFI, &wifi_init); + mc9s08dz60_register_regulator( + mc9s08dz60, MC9S08DZ60_HDD, &hdd_init); + mc9s08dz60_register_regulator( + mc9s08dz60, MC9S08DZ60_GPS, &gps_init); + mc9s08dz60_register_regulator(mc9s08dz60, + MC9S08DZ60_SPKR, &spkr_init); + return 0; +} + +static struct mc9s08dz60_platform_data mc9s08dz60_plat = { + .init = mc9s08dz60_regulator_init, +}; + +static struct i2c_board_info __initdata mc9s08dz60_i2c_device = { + I2C_BOARD_INFO("mc9s08dz60", 0x69), + .platform_data = &mc9s08dz60_plat, +}; + +static struct resource mc9s08dz60_keypad_resource = { + .start = MXC_PSEUDO_IRQ_KEYPAD, + .end = MXC_PSEUDO_IRQ_KEYPAD, + .flags = IORESOURCE_IRQ, +}; + +static struct platform_device mc9s08dz60_keypad_dev = { + .name = "mc9s08dz60keypad", + .num_resources = 1, + .resource = &mc9s08dz60_keypad_resource, +}; + +int __init mx35_3stack_init_mc9s08dz60(void) +{ + int retval = 0; + retval = i2c_register_board_info(0, &mc9s08dz60_i2c_device, 1); + if (retval == 0) + platform_device_register(&mc9s08dz60_keypad_dev); + return retval; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/serial.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/serial.c @@ -0,0 +1,179 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file mach-mx35/serial.c + * + * @brief This file contains the UART initiliazation. + * + * @ingroup MSL_MX35 + */ +#include +#include +#include +#include +#include +#include +#include "serial.h" +#include "board-mx35_3stack.h" + +#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) + +/*! + * This is an array where each element holds information about a UART port, + * like base address of the UART, interrupt numbers etc. This structure is + * passed to the serial_core.c file. Based on which UART is used, the core file + * passes back the appropriate port structure as an argument to the control + * functions. + */ +static uart_mxc_port mxc_ports[] = { + [0] = { + .port = { + .membase = (void *)IO_ADDRESS(UART1_BASE_ADDR), + .mapbase = UART1_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART1_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .ints_muxed = UART1_MUX_INTS, + .irqs = {UART1_INT2, UART1_INT3}, + .mode = UART1_MODE, + .ir_mode = UART1_IR, + .enabled = UART1_ENABLED, + .hardware_flow = UART1_HW_FLOW, + .cts_threshold = UART1_UCR4_CTSTL, + .dma_enabled = UART1_DMA_ENABLE, + .dma_rxbuf_size = UART1_DMA_RXBUFSIZE, + .rx_threshold = UART1_UFCR_RXTL, + .tx_threshold = UART1_UFCR_TXTL, + .shared = UART1_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART1_TX, + .dma_rx_id = MXC_DMA_UART1_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, + [1] = { + .port = { + .membase = (void *)IO_ADDRESS(UART2_BASE_ADDR), + .mapbase = UART2_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART2_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 1, + }, + .ints_muxed = UART2_MUX_INTS, + .irqs = {UART2_INT2, UART2_INT3}, + .mode = UART2_MODE, + .ir_mode = UART2_IR, + .enabled = UART2_ENABLED, + .hardware_flow = UART2_HW_FLOW, + .cts_threshold = UART2_UCR4_CTSTL, + .dma_enabled = UART2_DMA_ENABLE, + .dma_rxbuf_size = UART2_DMA_RXBUFSIZE, + .rx_threshold = UART2_UFCR_RXTL, + .tx_threshold = UART2_UFCR_TXTL, + .shared = UART2_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART2_TX, + .dma_rx_id = MXC_DMA_UART2_RX, + .rxd_mux = MXC_UART_IR_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#if UART3_ENABLED == 1 + [2] = { + .port = { + .membase = (void *)IO_ADDRESS(UART3_BASE_ADDR), + .mapbase = UART3_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART3_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 2, + }, + .ints_muxed = UART3_MUX_INTS, + .irqs = {UART3_INT2, UART3_INT3}, + .mode = UART3_MODE, + .ir_mode = UART3_IR, + .enabled = UART3_ENABLED, + .hardware_flow = UART3_HW_FLOW, + .cts_threshold = UART3_UCR4_CTSTL, + .dma_enabled = UART3_DMA_ENABLE, + .dma_rxbuf_size = UART3_DMA_RXBUFSIZE, + .rx_threshold = UART3_UFCR_RXTL, + .tx_threshold = UART3_UFCR_TXTL, + .shared = UART3_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART3_TX, + .dma_rx_id = MXC_DMA_UART3_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#endif +}; + +static struct platform_device mxc_uart_device1 = { + .name = "mxcintuart", + .id = 0, + .dev = { + .platform_data = &mxc_ports[0], + }, +}; + +static struct platform_device mxc_uart_device2 = { + .name = "mxcintuart", + .id = 1, + .dev = { + .platform_data = &mxc_ports[1], + }, +}; + +#if UART3_ENABLED == 1 +static struct platform_device mxc_uart_device3 = { + .name = "mxcintuart", + .id = 2, + .dev = { + .platform_data = &mxc_ports[2], + }, +}; +#endif + +static int __init mxc_init_uart(void) +{ + /* Register all the MXC UART platform device structures */ + platform_device_register(&mxc_uart_device1); + platform_device_register(&mxc_uart_device2); + + /* Grab ownership of shared UARTs 3 and 4, only when enabled */ +#if UART3_ENABLED == 1 +#if UART3_DMA_ENABLE == 1 + spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART3_DMA_ENABLE */ + platform_device_register(&mxc_uart_device3); +#endif /* UART3_ENABLED */ + + return 0; +} + +#else +static int __init mxc_init_uart(void) +{ + return 0; +} +#endif + +arch_initcall(mxc_init_uart); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx35/mx35_3stack_cpld.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx35/mx35_3stack_cpld.c @@ -0,0 +1,161 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "board-mx35_3stack.h" +#include "crm_regs.h" +#include "iomux.h" + +/*! + * @file mach-mx35/mx35_3stack_cpld.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX35 + */ +static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 expio_irq; + u32 index, mask; + desc->chip->mask(irq); /* irq = gpio irq number */ + + index = __raw_readw(mx35_3stack_board_io + INTR_STATUS_REG); + mask = __raw_readw(mx35_3stack_board_io + INTR_MASK_REG); + + if (unlikely(!(index & (~mask)))) { + printk(KERN_ERR "\nEXPIO: Spurious interrupt:0x%0x\n\n", index); + pr_info("CPLD IMR(0x38)=0x%x, PENDING(0x28)=0x%x\n", mask, + index); + goto out; + } + index = index & (~mask); + expio_irq = MXC_BOARD_IRQ_START; + for (; index != 0; index >>= 1, expio_irq++) { + struct irq_desc *d; + if ((index & 1) == 0) + continue; + d = irq_desc + expio_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nEXPIO irq: %d unhandeled\n", + expio_irq); + BUG(); /* oops */ + } + d->handle_irq(expio_irq, d); + } + + out: + desc->chip->ack(irq); + desc->chip->unmask(irq); +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ + u16 reg, expio = MXC_IRQ_TO_EXPIO(irq); + + reg = __raw_readw(mx35_3stack_board_io + INTR_MASK_REG); + /* mask the interrupt */ + __raw_writew(reg | (1 << expio), mx35_3stack_board_io + INTR_MASK_REG); +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* clear the interrupt status */ + __raw_writew(1 << expio, mx35_3stack_board_io + INTR_RESET_REG); + __raw_writew(0, mx35_3stack_board_io + INTR_RESET_REG); + /* mask the interrupt */ + expio_mask_irq(irq); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ + u16 reg, expio = MXC_IRQ_TO_EXPIO(irq); + + reg = __raw_readw(mx35_3stack_board_io + INTR_MASK_REG); + /* unmask the interrupt */ + __raw_writew(reg & (~(1 << expio)), + mx35_3stack_board_io + INTR_MASK_REG); +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static int __init mxc_expio_init(void) +{ + int i; + + mx35_3stack_board_io = (u32) ioremap(BOARD_IO_ADDR, SZ_4K); + if (mx35_3stack_board_io == 0) + return -ENOMEM; + + if ((__raw_readw(mx35_3stack_board_io + MAGIC_NUMBER1_REG) != 0xAAAA) || + (__raw_readw(mx35_3stack_board_io + MAGIC_NUMBER2_REG) != 0x5555)) + return -ENODEV; + + pr_info("3-Stack Debug board detected, rev = 0x%04X\n", + readw(mx35_3stack_board_io + CPLD_CODE_VER_REG)); + + /* + * Configure INT line as GPIO input + */ + mxc_request_iomux(EXPIO_PARENT_INT, MUX_CONFIG_FUNC); + gpio_request(IOMUX_TO_GPIO(EXPIO_PARENT_INT), NULL); + gpio_direction_input(IOMUX_TO_GPIO(EXPIO_PARENT_INT)); + + /* disable the interrupt and clear the status */ + __raw_writew(0, mx35_3stack_board_io + INTR_MASK_REG); + __raw_writew(0xFFFF, mx35_3stack_board_io + INTR_RESET_REG); + __raw_writew(0, mx35_3stack_board_io + INTR_RESET_REG); + __raw_writew(0x1F, mx35_3stack_board_io + INTR_MASK_REG); + for (i = MXC_BOARD_IRQ_START; i < (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS); + i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(IOMUX_TO_IRQ(EXPIO_PARENT_INT), IRQF_TRIGGER_LOW); + set_irq_chained_handler(IOMUX_TO_IRQ(EXPIO_PARENT_INT), + mxc_expio_irq_handler); + return 0; +} + +arch_initcall(mxc_expio_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/evtmon_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/evtmon_regs.h @@ -0,0 +1,86 @@ +/* + * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * @file evtmon_regs.h + * + * @brief EVTMON Register definitions + * + * @ingroup MXC_Oprofile + */ +#ifndef _EVTMON_REGS_INCLUDED_ +#define _EVTMON_REGS_INCLUDED_ + +#include + +#define MXC_CRM_AP_BASE (IO_ADDRESS(CRM_AP_BASE_ADDR)) +#define ECT_CTI_BASE (IO_ADDRESS(ECT_CTIO_BASE_ADDR)) +#define CLKCTR_BASE_ADDR (IO_ADDRESS(CLKCTL_BASE_ADDR)) +#define L2CC_BASE_ADDRESS (IO_ADDRESS(L2CC_BASE_ADDR)) +#define L2EM_BASE_ADDRESS (IO_ADDRESS(EVTMON_BASE_ADDR)) + +/* L2 INT settings */ +#define L2EM_ENABLE_OVERFLOWINT 0x1 +#define L2EM_ENABLE_CNTINCRINT 0x3 +#define L2EM_ENABLE_MASK 0x1 +#define L2EM_INT_EDGE 0x2 +#define L2EM_INT_HIGH 0x4 +#define L2EM_INT_CLK_CYCLES (0x0 << 3) + +/* Reg definitions for EVTMON */ +#define L2EM_CTRL (L2EM_BASE_ADDRESS + 0x0) +#define L2EM_STAT (L2EM_BASE_ADDRESS + 0x4) +#define L2EM_CC(nr) (L2EM_BASE_ADDRESS + 0x8 +(4*nr)) +#define L2EM_CNT(nr) (L2EM_BASE_ADDRESS + 0x20 +(4*nr)) + +/* Reg definitions for CLK_CTL */ +#define CLKCTL_SET_CTRL (CLKCTR_BASE_ADDR + 0x04) + +/* Reg definitions for ECT */ +#define ECT_CTI_CONTROL (ECT_CTI_BASE + 0x0) +#define ECT_CTI_LOCK (ECT_CTI_BASE + 0x8) +#define ECT_CTI_INEN(nr) (ECT_CTI_BASE + 0x20 + (4*nr)) +#define ECT_CTI_OUTEN(nr) (ECT_CTI_BASE + 0xA0 + (4*nr)) +#define ECT_CTI_INTACK (ECT_CTI_BASE + 0x10) +#define ECT_CTI_TRIGOUTSTATUS (ECT_CTI_BASE + 0x134) + +#define ENABLE_L2CACHE 0x1 +#define EVTMON_ENABLE 0x001 /* Enable EVTMON */ +#define EVT_UNUSED 0x100 +#define MAX_PMUCOUNTERS 3 + +#ifdef CONFIG_OPROFILE_ARM11_EVTMON +#define ECT_WORKAROUND +#endif + +#ifdef ECT_WORKAROUND +#define ENABLE_CTI_CLOCK 0x00000020 +#define UNLOCK_ECT_CODE 0x0ACCE550 +#define ECT_CTI_CHAN_2 0x4 +#define ECT_CTI_CHAN_3 0x8 +#define ECT_CTI_TRIGIN_1 1 +#define ECT_CTI_TRIGIN_7 7 +#define ECT_CTI_TRIGOUT_2 2 +#define ECT_CTI_TRIGOUT_6 6 +#define ENABLE_ECT 0x1 +#define ACK_TRIG_OUT_2 0x4 +#define EM_SET_INT L2EM_ENABLE_CNTINCRINT +#define EVENT_OVERFLOW_INT MXC_INT_ECT +#else +#define EVENT_OVERFLOW_INT ARM11_PMU_IRQ +#define EM_SET_INT L2EM_ENABLE_OVERFLOWINT +#endif + +int l2em_configure_counter(int nr, int type); +void write_l2counter(int nr, u32 val); +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_arm11_core.h +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_arm11_core.h @@ -35,6 +35,8 @@ #define CCNT 2 #define CPU_COUNTER(cpu, counter) ((cpu) * 3 + (counter)) +#define PMU_ENABLE 0x001 /* Enable counters */ +#define PMU_OVERFLOWBIT_MASK 0x700 int arm11_setup_pmu(void); int arm11_start_pmu(void); @@ -42,4 +44,15 @@ int arm11_request_interrupts(int *, int); void arm11_release_interrupts(int *, int); +#ifdef CONFIG_OPROFILE_ARM11_EVTMON +extern int arm11_evtmon_setup_ctrs(void); +extern void arm11_evtmon_stop(void); +extern int arm11_evtmon_start(void); +extern int arm11_evtmon_detect(void); +#else +#define arm11_evtmon_setup_ctrs() do {} while(0) +#define arm11_evtmon_stop() do {} while(0) +#define arm11_evtmon_start() do {} while(0) +#define arm11_evtmon_detect() do {} while(0) +#endif #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_v6.c +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_v6.c @@ -28,16 +28,21 @@ #include "op_counter.h" #include "op_arm_model.h" #include "op_model_arm11_core.h" +#include "evtmon_regs.h" static int irqs[] = { #ifdef CONFIG_ARCH_OMAP2 3, #endif +#ifdef CONFIG_ARCH_MXC + EVENT_OVERFLOW_INT, +#endif }; static void armv6_pmu_stop(void) { arm11_stop_pmu(); + arm11_evtmon_stop(); arm11_release_interrupts(irqs, ARRAY_SIZE(irqs)); } @@ -46,21 +51,31 @@ int ret; ret = arm11_request_interrupts(irqs, ARRAY_SIZE(irqs)); - if (ret >= 0) + if (ret >= 0){ ret = arm11_start_pmu(); + arm11_evtmon_start(); + } return ret; } +static int armv6_setup_pmu(void) +{ + arm11_setup_pmu(); + arm11_evtmon_setup_ctrs(); + return 0; +} + static int armv6_detect_pmu(void) { + arm11_evtmon_detect(); return 0; } struct op_arm_model_spec op_armv6_spec = { .init = armv6_detect_pmu, .num_counters = 3, - .setup_ctrs = arm11_setup_pmu, + .setup_ctrs = armv6_setup_pmu, .start = armv6_pmu_start, .stop = armv6_pmu_stop, .name = "arm/armv6", --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_arm11_core.c +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_arm11_core.c @@ -13,7 +13,12 @@ #include "op_counter.h" #include "op_arm_model.h" #include "op_model_arm11_core.h" +#include "evtmon_regs.h" +#define NEED_OPROFILE_CCNT_FIX +#ifdef NEED_OPROFILE_CCNT_FIX /* Workaround to correctly map from user space counters to kernel space counters */ +struct op_counter_config tmp; +#endif /* * ARM11 PMU support */ @@ -63,6 +68,12 @@ arm11_write_pmnc(PMCR_OFL_PMN0 | PMCR_OFL_PMN1 | PMCR_OFL_CCNT | PMCR_C | PMCR_P); +#ifdef NEED_OPROFILE_CCNT_FIX /* Workaround to correctly map from user space counters to kernel space counters */ + tmp = counter_config[PMN0]; + counter_config[PMN0] = counter_config[PMN1]; + counter_config[PMN1] = counter_config[CCNT]; + counter_config[CCNT] = tmp; +#endif for (pmnc = 0, cnt = PMN0; cnt <= CCNT; cnt++) { unsigned long event; @@ -119,16 +130,49 @@ unsigned int cnt; u32 pmnc; +#ifdef ECT_WORKAROUND + /* Disable L2_EVTMON */ + __raw_writel((__raw_readl(L2EM_CTRL) & ~EVTMON_ENABLE), L2EM_CTRL); + + /* Disable ARM11 PMU while retaining interrupts and overflow bits */ + pmnc = arm11_read_pmnc(); + pmnc &= ~(PMU_ENABLE | PMU_OVERFLOWBIT_MASK); + arm11_write_pmnc(pmnc); + + while (__raw_readl(ECT_CTI_TRIGOUTSTATUS) & ECT_CTI_CHAN_2) + __raw_writel(ACK_TRIG_OUT_2, ECT_CTI_INTACK); + + pmnc = arm11_read_pmnc(); + + /* Re-enable ARM11 PMU */ + pmnc |= PMU_ENABLE; + arm11_write_pmnc(pmnc); + + /* Re-enable L2_EVTMON */ + __raw_writel((__raw_readl(L2EM_CTRL) | L2EM_ENABLE_MASK), L2EM_CTRL); +#else pmnc = arm11_read_pmnc(); +#endif for (cnt = PMN0; cnt <= CCNT; cnt++) { if ((pmnc & (PMCR_OFL_PMN0 << cnt)) && (pmnc & (PMCR_IEN_PMN0 << cnt))) { arm11_reset_counter(cnt); +#ifdef NEED_OPROFILE_CCNT_FIX /* Workaround to correctly map from user space counters to kernel space counters */ + if (cnt == PMN0) + oprofile_add_sample(regs, CPU_COUNTER(smp_processor_id(), PMN1)); + else if (cnt == PMN1) + oprofile_add_sample(regs, CPU_COUNTER(smp_processor_id(), CCNT)); + else if (cnt == CCNT) + oprofile_add_sample(regs, CPU_COUNTER(smp_processor_id(), PMN0)); +#else oprofile_add_sample(regs, CPU_COUNTER(smp_processor_id(), cnt)); +#endif } } +#ifndef ECT_WORKAROUND /* Clear counter flag(s) */ arm11_write_pmnc(pmnc); +#endif return IRQ_HANDLED; } --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/Makefile @@ -9,6 +9,7 @@ oprofile-y := $(DRIVER_OBJS) common.o backtrace.o oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o +oprofile-$(CONFIG_OPROFILE_ARM11_EVTMON) += op_model_arm11_evtmon.o oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o oprofile-$(CONFIG_OPROFILE_ARMV7) += op_model_v7.o --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_arm11.c +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_arm11.c @@ -0,0 +1,477 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup MXC_Oprofile ARM11 Driver for Oprofile + */ + +/*! + * @file op_model_arm11.c + * + *Based on the op_model_xscale.c driver by author Zwane Mwaikambo + * + * @ingroup MXC_Oprofile + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "op_counter.h" +#include "op_arm_model.h" +#include "evtmon_regs.h" + +/*! + * defines used in ARM11 performance unit + */ +#define PMU_ENABLE 0x001 /* Enable counters */ +#define EVTMON_ENABLE 0x001 /* Enable EVTMON */ +#define PMN_RESET 0x002 /* Reset event counters */ +#define CCNT_RESET 0x004 /* Reset clock counter */ +#define PMU_RESET (CCNT_RESET | PMN_RESET) +#define PMU_CNT64 0x008 /* Make CCNT count every 64th cycle */ + +#define PMU_FLAG_CR0 0x080 +#define PMU_FLAG_CR1 0x100 +#define PMU_FLAG_CC 0x200 + +/*! + * Different types of events that can be counted by the ARM11 PMU + * as used by Oprofile userspace. + */ +#define EVT_ICACHE_MISS 0x00 +#define EVT_STALL_INSTR 0x01 +#define EVT_DATA_STALL 0x02 +#define EVT_ITLB_MISS 0x03 +#define EVT_DTLB_MISS 0x04 +#define EVT_BRANCH 0x05 +#define EVT_BRANCH_MISS 0x06 +#define EVT_INSTRUCTION 0x07 +#define EVT_DCACHE_FULL_STALL_CONTIG 0x09 +#define EVT_DCACHE_ACCESS 0x0A +#define EVT_DCACHE_MISS 0x0B +#define EVT_DCACE_WRITE_BACK 0x0C +#define EVT_PC_CHANGED 0x0D +#define EVT_TLB_MISS 0x0F +#define EVT_BCU_REQUEST 0x10 +#define EVT_BCU_FULL 0x11 +#define EVT_BCU_DRAIN 0x12 +#define EVT_ETMEXTOT0 0x20 +#define EVT_ETMEXTOT1 0x21 +/* EVT_CCNT is not hardware defined */ +#define EVT_CCNT 0xFE +#define EVT_INCREMENT 0xFF +#define EVT_UNUSED 0x100 + +#define ECT_WORKAROUND + +#define COUNTER_MSB 0x80000000 +#define ENABLE_L2CACHE 0x1 +#define ENABLE_EVTBUS 0x100000 +#define PMU_OVERFLOWBIT_MASK 0x700 +#define VAR_NUM 0x0 +#define REV_NUM 0x2 + +#ifdef ECT_WORKAROUND +#define ENABLE_CTI_CLOCK 0x00000020 +#define UNLOCK_ECT_CODE 0x0ACCE550 +#define ECT_CTI_CHAN_2 0x4 +#define ECT_CTI_CHAN_3 0x8 +#define ECT_CTI_TRIGIN_1 1 +#define ECT_CTI_TRIGIN_7 7 +#define ECT_CTI_TRIGOUT_2 2 +#define ECT_CTI_TRIGOUT_6 6 +#define ENABLE_ECT 0x1 +#define ACK_TRIG_OUT_2 0x4 +#define EM_SET_INT L2EM_ENABLE_CNTINCRINT +#define EVENT_OVERFLOW_INT INT_ECT +#else +#define EVENT_OVERFLOW_INT ARM11_PMU_IRQ +#define EM_SET_INT L2EM_ENABLE_OVERFLOWINT +#endif + +struct pmu_counter { + volatile unsigned long ovf; + unsigned long reset_counter; +}; + +static unsigned int r0p2_or_older_core; +enum { CCNT, PMN0, PMN1, MAX_PMUCOUNTERS }; +enum { EMC0 = MAX_PMUCOUNTERS, EMC1, EMC2, EMC3, MAX_L2COUNTERS }; + +static struct pmu_counter results[MAX_L2COUNTERS]; + +struct pmu_type { + int id; + char *name; + int num_counters; + unsigned int int_enable; + unsigned int cnt_ovf[MAX_L2COUNTERS]; + unsigned int int_mask[MAX_L2COUNTERS]; +}; + +static struct pmu_type pmu_parms[] = { + { + .id = 0, + .name = "arm/arm11", + .num_counters = MAX_L2COUNTERS, + .int_mask = {[PMN0] = 0x10,[PMN1] = 0x20, + [CCNT] = 0x40,[EMC0] = 0x800,[EMC1] = 0x400,[EMC2] = + 0x200,[EMC3] = 0x100}, + .cnt_ovf = {[CCNT] = 0x400,[PMN0] = 0x100, + [PMN1] = 0x200,[EMC0] = 0x1,[EMC1] = 0x2,[EMC2] = + 0x4,[EMC3] = 0x8}, + }, +}; + +static struct pmu_type *pmu; + +extern void l2_evtbus_enable(void); +extern void l2_evtbus_disable(void); + +/*! + * function is used to write the EVTMON counter configuration register. + */ +static int l2em_configure_counter(int nr, int type) +{ + /* Configure the counter event source */ + __raw_writel(((type << 2) & 0x7c), L2EM_CC(nr)); + if (type) + __raw_writel((__raw_readl(L2EM_CC(nr)) | EM_SET_INT), + L2EM_CC(nr)); + + return 0; +} + +/*! + * function is used to write the EVTMON counters + */ +static void write_l2counter(int nr, u32 val) +{ + __raw_writel(val, L2EM_CNT(nr)); +} + +/*! + * function is used to write the control register for the ARM11 performance counters + */ +static void write_pmnc(u32 val) +{ + pr_debug("PMC value written is %#08x\n", val); + __asm__ __volatile__("mcr p15, 0, %0, c15, c12, 0"::"r"(val)); +} + +/*! + * function is used to read the control register for the ARM11 performance counters + */ +static u32 read_pmnc(void) +{ + u32 val; + pr_debug("In function %s\n", __FUNCTION__); + __asm__ __volatile__("mrc p15, 0, %0, c15, c12, 0":"=r"(val)); + pr_debug("PMC value read is %#08x\n", val); + return val; +} + +/*! + * function is used to read the ARM11 performance counters + */ +static u32 read_counter(int counter) +{ + u32 val = 0; + pr_debug("In function %s\n", __FUNCTION__); + + switch (counter) { + case CCNT: + __asm__ __volatile__("mrc p15, 0, %0, c15, c12, 1":"=r"(val)); + break; + case PMN0: + __asm__ __volatile__("mrc p15, 0, %0, c15, c12, 2":"=r"(val)); + break; + case PMN1: + __asm__ __volatile__("mrc p15, 0, %0, c15, c12, 3":"=r"(val)); + break; + } + + pr_debug("counter %d value read is %#08x\n", counter, val); + return val; +} + +/*! + * function is used to write to the ARM11 performance counters + */ +static void write_counter(int counter, u32 val) +{ + pr_debug("counter %d value written is %#08x\n", counter, val); + + switch (counter) { + case CCNT: + __asm__ __volatile__("mcr p15, 0, %0, c15, c12, 1": :"r"(val)); + break; + case PMN0: + __asm__ __volatile__("mcr p15, 0, %0, c15, c12, 2": :"r"(val)); + break; + case PMN1: + __asm__ __volatile__("mcr p15, 0, %0, c15, c12, 3": :"r"(val)); + break; + } +} + +/*! + * function is used to check the status of the ARM11 performance counters + */ +static int arm11_setup_ctrs(void) +{ + u32 pmnc = 0; + int i; + + for (i = CCNT; i < MAX_L2COUNTERS; i++) { + if (counter_config[i].enabled) + continue; + counter_config[i].event = EVT_UNUSED; + } + + if (counter_config[PMN0].enabled) + pmnc |= (counter_config[PMN0].event << 20); + + if (counter_config[PMN1].enabled) + pmnc |= (counter_config[PMN1].event << 12); + + pr_debug("arm11_setup_ctrs: pmnc: %#08x\n", pmnc); + write_pmnc(pmnc); + + for (i = CCNT; i < MAX_L2COUNTERS; i++) { + if (counter_config[i].event == EVT_UNUSED) { + counter_config[i].event = 0; + pmu->int_enable &= ~pmu->int_mask[i]; + pr_debug + ("arm11_setup_ctrs: The counter event is %d for counter%d\n", + counter_config[i].event, i); + continue; + } + + results[i].reset_counter = counter_config[i].count; + if (i < MAX_PMUCOUNTERS) + write_counter(i, -(u32) counter_config[i].count); + else { + write_l2counter(i - EMC0, + -(u32) counter_config[i].count); + l2em_configure_counter(i - EMC0, + counter_config[i].event); + } + pmu->int_enable |= pmu->int_mask[i]; + pr_debug + ("arm11_setup_ctrs: The values of int mask and enables are %x, %x\n", + pmu->int_mask[i], pmu->int_enable); + + pr_debug("arm11_setup_ctrs: counter%d %#08x from %#08lx\n", i, + read_counter(i), counter_config[i].count); + } + + return 0; +} + +/*! + * function is the interrupt service handler for the ARM11 performance counters + */ +static irqreturn_t arm11_pmu_interrupt(int irq, void *arg, struct pt_regs *regs) +{ + int i; + u32 pmnc, emcs; + + /* Disable L2_EVTMON */ + emcs = __raw_readl(L2EM_STAT); + __raw_writel((__raw_readl(L2EM_CTRL) & ~EVTMON_ENABLE), L2EM_CTRL); + + /* Disable ARM11 PMU while retaining interrupts and overflow bits */ + pmnc = read_pmnc(); + pmnc &= ~(PMU_ENABLE | PMU_OVERFLOWBIT_MASK); + write_pmnc(pmnc); + + /* Read the overflow flag bits */ + pmnc = read_pmnc(); + +#ifdef ECT_WORKAROUND + for (i = CCNT; i < MAX_PMUCOUNTERS; i++) { +#else + for (i = CCNT; i < MAX_L2COUNTERS; i++) { +#endif + /* Process the counters only if respective overflow interrupt is enabled */ + if (!(pmu->int_mask[i] & pmu->int_enable)) { + continue; + } + + /* As per ARM11 errata ARM11 cores with revision less than or equal to R0P2 + * have known bug i.e., missing overflow interrupt for two events(event + * no 0x7 and 0x22) due to double increament for cycle. In this case we will + * discard the sample as the pc value belongs to different interrupt. + */ + if (r0p2_or_older_core && !(pmnc & pmu->cnt_ovf[i]) + && !(read_counter(i) & COUNTER_MSB)) { + write_counter(i, -(u32) (results[i].reset_counter)); + } + + /* Check for the overflowed counter by checking set overflow flag bits */ + if (!(pmnc & pmu->cnt_ovf[i]) && !(emcs & pmu->cnt_ovf[i])) { + continue; + } + + /* Reload the overflowed counter with preset value and + * add the sample for respective event. + */ + pr_debug("arm11_pmu_interrupt: writing to file\n"); + if (i < MAX_PMUCOUNTERS) + write_counter(i, -(u32) results[i].reset_counter); + else + write_l2counter(i - EMC0, + -(u32) counter_config[i].count); + + oprofile_add_sample(regs, i); + } + + /* Clear overflow flags */ + write_pmnc(pmnc); + +#ifdef ECT_WORKAROUND + /* + * If ECTTRIGOUT signal is interrupt it should be acknowledged + * until trigger is off. + */ + while (__raw_readl(ECT_CTI_TRIGOUTSTATUS) & ECT_CTI_CHAN_2) + __raw_writel(ACK_TRIG_OUT_2, ECT_CTI_INTACK); +#endif + + /* Re-enable ARM11 PMU */ + pmnc |= PMU_ENABLE; + write_pmnc(pmnc); + + /* Re-enable L2_EVTMON */ + __raw_writel((__raw_readl(L2EM_CTRL) | L2EM_ENABLE_MASK), L2EM_CTRL); + + return IRQ_HANDLED; +} + +/*! + * function used to start the ARM11 performance counters + */ +static void arm11_pmu_stop(void) +{ + u32 pmnc = read_pmnc(); + + pmnc &= ~PMU_ENABLE; + write_pmnc(pmnc); + /* Disable the EVTMON */ + __raw_writel((__raw_readl(L2EM_CTRL) & ~EVTMON_ENABLE), L2EM_CTRL); + + /* Disable the EVTBUS */ + l2_evtbus_disable(); + + free_irq(EVENT_OVERFLOW_INT, results); +} + +/*! + * function used to start the ARM11 performance counters + */ +static int arm11_pmu_start(void) +{ + int ret; + u32 pmnc = read_pmnc(); + + ret = request_irq(EVENT_OVERFLOW_INT, arm11_pmu_interrupt, SA_INTERRUPT, + "ARM11 PMU", (void *)results); + pr_debug("requested IRQ\n"); + + if (ret < 0) { + printk(KERN_ERR + "oprofile: unable to request IRQ%d for ARM11 PMU\n", + ARM11_PMU_IRQ); + return ret; + } + + /* Enable the EVTBUS */ + l2_evtbus_enable(); + +#ifdef ECT_WORKAROUND + __raw_writel(ENABLE_CTI_CLOCK, CLKCTL_SET_CTRL); + /* Unlock the AHB Interface */ + __raw_writel(UNLOCK_ECT_CODE, ECT_CTI_LOCK); + /* Trigger to Channel Mapping */ + __raw_writel(ECT_CTI_CHAN_2, ECT_CTI_INEN(ECT_CTI_TRIGIN_1)); + /* Channel to triggers mapping */ + __raw_writel(ECT_CTI_CHAN_2, ECT_CTI_OUTEN(ECT_CTI_TRIGOUT_2)); + /* Trigger to Channel Mapping */ + __raw_writel(ECT_CTI_CHAN_3, ECT_CTI_INEN(ECT_CTI_TRIGIN_7)); + /* Channel to triggers mapping */ + __raw_writel(ECT_CTI_CHAN_3, ECT_CTI_OUTEN(ECT_CTI_TRIGOUT_6)); + /* Enable CTI Logic */ + __raw_writel(ENABLE_ECT, ECT_CTI_CONTROL); +#endif + pmnc |= pmu->int_enable; + pmnc |= PMU_ENABLE; + + write_pmnc(pmnc); + pr_debug("arm11_pmu_start: pmnc: %#08x mask: %08x\n", pmnc, + pmu->int_enable); + + /* Enable EVTMON with Edge triggered interrupt of one Clock Cycle */ + __raw_writel((__raw_readl(L2EM_CTRL) | + (L2EM_INT_EDGE | L2EM_INT_CLK_CYCLES)), L2EM_CTRL); + __raw_writel((__raw_readl(L2EM_CTRL) | L2EM_ENABLE_MASK), L2EM_CTRL); + + return 0; +} + +/*! + * function detect the ARM11 performance counters + */ +static int arm11_detect_pmu(void) +{ + int ret = 0; + u32 id, rev; + + id = (read_cpuid(CPUID_ID) >> 0x10) & 0xF; + + switch (id) { + case 7: + pmu = &pmu_parms[0]; + rev = read_cpuid(CPUID_ID); + /* Check if the ARM11 core is less than or equal to R0P2 */ + if ((((rev >> 0x14) & 0xF) == VAR_NUM) + && (((rev & 0xF) <= REV_NUM))) { + r0p2_or_older_core = 1; + } + break; + default: + ret = -ENODEV; + break; + } + + if (!ret) { + op_arm_spec.name = pmu->name; + op_arm_spec.num_counters = pmu->num_counters; + pr_debug("arm11_detect_pmu: detected %s PMU\n", pmu->name); + } + + return ret; +} + +struct op_arm_model_spec op_arm_spec = { + .init = arm11_detect_pmu, + .setup_ctrs = arm11_setup_ctrs, + .start = arm11_pmu_start, + .stop = arm11_pmu_stop, +}; --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_arm11_evtmon.c +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_arm11_evtmon.c @@ -0,0 +1,188 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup MXC_Oprofile ARM11 EVTMON Driver for Oprofile + */ + +/*! + * @file op_model_arm11_evtmon.c + * + *Based on the op_model_xscale.c driver by author Zwane Mwaikambo + * + * @ingroup MXC_Oprofile + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "op_counter.h" +#include "op_arm_model.h" +#include "evtmon_regs.h" + +struct pmu_counter { + volatile unsigned long ovf; + unsigned long reset_counter; +}; + +enum { EMC0 = MAX_PMUCOUNTERS, EMC1, EMC2, EMC3, MAX_L2COUNTERS }; + +static struct pmu_counter results[MAX_L2COUNTERS]; + +struct pmu_type { + int id; + char *name; + int num_counters; + unsigned int int_enable; + unsigned int cnt_ovf[MAX_L2COUNTERS]; + unsigned int int_mask[MAX_L2COUNTERS]; +}; + +static struct pmu_type pmu_parms[] = { + { + .id = 0, + .int_mask = {[EMC0] = 0x800,[EMC1] = 0x400,[EMC2] = + 0x200,[EMC3] = 0x100}, + .cnt_ovf = {[EMC0] = 0x1,[EMC1] = 0x2,[EMC2] = 0x4,[EMC3] = 0x8}, + }, +}; + +static struct pmu_type *pmu; + +extern void l2x0_evtbus_enable(void); +extern void l2x0_evtbus_disable(void); + +/*! + * function is used to write the EVTMON counter configuration register. + */ +int l2em_configure_counter(int nr, int type) +{ + /* Configure the counter event source */ + __raw_writel(((type << 2) & 0x7c), L2EM_CC(nr)); + if (type) + __raw_writel((__raw_readl(L2EM_CC(nr)) | EM_SET_INT), + L2EM_CC(nr)); + + return 0; +} + +/*! + * function is used to write the EVTMON counters + */ +void write_l2counter(int nr, u32 val) +{ + __raw_writel(val, L2EM_CNT(nr)); +} + +/*! + * function is used to check the status of the ARM11 evtmon counters + */ +int arm11_evtmon_setup_ctrs(void) +{ + int i; + + for (i = EMC0; i < MAX_L2COUNTERS; i++) { + if (counter_config[i].enabled) + continue; + counter_config[i].event = EVT_UNUSED; + } + + for (i = EMC0; i < MAX_L2COUNTERS; i++) { + if (counter_config[i].event == EVT_UNUSED) { + counter_config[i].event = 0; + pmu->int_enable &= ~pmu->int_mask[i]; + pr_debug + ("arm11_setup_ctrs: The counter event is %lu for counter%d\n", + counter_config[i].event, i); + continue; + } + + results[i].reset_counter = counter_config[i].count; + write_l2counter(i - EMC0, -(u32) counter_config[i].count); + l2em_configure_counter(i - EMC0, counter_config[i].event); + + pmu->int_enable |= pmu->int_mask[i]; + pr_debug + ("arm11_setup_ctrs: The values of int mask and enables are %x, %x\n", + pmu->int_mask[i], pmu->int_enable); + + } + + return 0; +} + +/*! + * function used to start the ARM11 evtmon counters + */ +void arm11_evtmon_stop(void) +{ + + /* Disable the EVTMON */ + __raw_writel((__raw_readl(L2EM_CTRL) & ~EVTMON_ENABLE), L2EM_CTRL); + + /* Disable the EVTBUS */ + l2x0_evtbus_disable(); + +} + +/*! + * function used to start the ARM11 evtmon counters + */ +int arm11_evtmon_start(void) +{ + + /* Enable the EVTBUS */ + l2x0_evtbus_enable(); + +#ifdef ECT_WORKAROUND + __raw_writel(ENABLE_CTI_CLOCK, CLKCTL_SET_CTRL); + /* Unlock the AHB Interface */ + __raw_writel(UNLOCK_ECT_CODE, ECT_CTI_LOCK); + /* Trigger to Channel Mapping */ + __raw_writel(ECT_CTI_CHAN_2, ECT_CTI_INEN(ECT_CTI_TRIGIN_1)); + /* Channel to triggers mapping */ + __raw_writel(ECT_CTI_CHAN_2, ECT_CTI_OUTEN(ECT_CTI_TRIGOUT_2)); + /* Trigger to Channel Mapping */ + __raw_writel(ECT_CTI_CHAN_3, ECT_CTI_INEN(ECT_CTI_TRIGIN_7)); + /* Channel to triggers mapping */ + __raw_writel(ECT_CTI_CHAN_3, ECT_CTI_OUTEN(ECT_CTI_TRIGOUT_6)); + /* Enable CTI Logic */ + __raw_writel(ENABLE_ECT, ECT_CTI_CONTROL); +#endif + + /* Enable EVTMON with Edge triggered interrupt of one Clock Cycle */ + __raw_writel((__raw_readl(L2EM_CTRL) | + (L2EM_INT_EDGE | L2EM_INT_CLK_CYCLES)), L2EM_CTRL); + __raw_writel((__raw_readl(L2EM_CTRL) | L2EM_ENABLE_MASK), L2EM_CTRL); + + return 0; +} + +/*! + * function detect the ARM11 evtmon counters + */ +int arm11_evtmon_detect(void) +{ + int ret = 0; + + pmu = &pmu_parms[0]; + op_armv6_spec.num_counters = MAX_L2COUNTERS; + + return ret; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/oprofile/op_model_v7.c +++ linux-fsl-imx51-2.6.31/arch/arm/oprofile/op_model_v7.c @@ -371,6 +371,9 @@ #ifdef CONFIG_ARCH_OMAP3 INT_34XX_BENCH_MPU_EMUL, #endif +#ifdef CONFIG_ARCH_MXC + MXC_INT_PMU, +#endif }; static void armv7_pmnc_stop(void) --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mx25_3stack_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mx25_3stack_gpio.c @@ -0,0 +1,1367 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "board-mx25_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx25/mx25_3stack_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO_MX25 + */ +static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { +}; + +static struct mxc_iomux_pin_cfg __initdata sim_iomux_pins[] = { + /* SIM1 */ + /* SIM1 CLK */ + { + MX25_PIN_CSI_D2, MUX_CONFIG_ALT4, + PAD_CTL_SRE_FAST | + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_CMOS | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM1 RST */ + { + MX25_PIN_CSI_D3, MUX_CONFIG_ALT4, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_CMOS | PAD_CTL_47K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM1 VEN */ + { + MX25_PIN_CSI_D4, MUX_CONFIG_ALT4, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_CMOS | PAD_CTL_100K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM1 TX */ + { + MX25_PIN_CSI_D5, MUX_CONFIG_ALT4, + PAD_CTL_SRE_FAST | + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_CMOS | PAD_CTL_22K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_OpenDrain | PAD_CTL_PKE_ENABLE, + }, + /* SIM1 PD */ + { + MX25_PIN_CSI_D6, MUX_CONFIG_ALT4, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_CMOS | PAD_CTL_22K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM2 */ + /* SIM2 CLK */ + { + MX25_PIN_CSI_D8, MUX_CONFIG_ALT4, + PAD_CTL_DRV_NORMAL | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM2 RST */ + { + MX25_PIN_CSI_D9, MUX_CONFIG_ALT4, + PAD_CTL_DRV_NORMAL | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM2 VEN */ + { + MX25_PIN_CSI_MCLK, MUX_CONFIG_ALT4, + PAD_CTL_DRV_NORMAL | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_100K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_NONE, + }, + /* SIM2 TX */ + { + MX25_PIN_CSI_VSYNC, MUX_CONFIG_ALT4, + PAD_CTL_DRV_NORMAL | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, + /* SIM2 PD */ + { + MX25_PIN_CSI_HSYNC, MUX_CONFIG_ALT4, + PAD_CTL_DRV_NORMAL | PAD_CTL_DRV_3_3V | + PAD_CTL_HYS_SCHMITZ | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE, + }, +}; + +static int __initdata enable_sim = { 0 }; +static int __init sim_setup(char *__unused) +{ + enable_sim = 1; + return 1; +} + +__setup("sim", sim_setup); + +/*! + * This system-wide GPIO function initializes the pins during system startup. + * All the statically linked device drivers should put the proper GPIO + * initialization code inside this function. It is called by + * \b fixup_mx25_3stack() during system startup. This function is board + * specific. + */ +void __init mx25_3stack_gpio_init(void) +{ + int i, num = 0; + struct mxc_iomux_pin_cfg *pin_ptr; + + for (i = 0; i < ARRAY_SIZE(mxc_iomux_pins); i++) { + mxc_request_iomux(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].mux_mode); + if (mxc_iomux_pins[i].pad_cfg) + mxc_iomux_set_pad(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].pad_cfg); + if (mxc_iomux_pins[i].in_select) + mxc_iomux_set_input(mxc_iomux_pins[i].in_select, + mxc_iomux_pins[i].in_mode); + } + + if (enable_sim) { + pin_ptr = sim_iomux_pins; + num = ARRAY_SIZE(sim_iomux_pins); + } + + for (i = 0; i < num; i++) { + mxc_request_iomux(pin_ptr[i].pin, pin_ptr[i].mux_mode); + if (pin_ptr[i].pad_cfg) + mxc_iomux_set_pad(pin_ptr[i].pin, pin_ptr[i].pad_cfg); + if (pin_ptr[i].in_select) + mxc_iomux_set_input(pin_ptr[i].in_select, + pin_ptr[i].in_mode); + } +} + +/*! + * Activate a UART port + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_active(int port, int no_irda) +{ + /* + * Configure the IOMUX control registers for the UART signals + */ + switch (port) { + case 0: + /* UART 1 IOMUX Configs */ + mxc_request_iomux(MX25_PIN_UART1_RXD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART1_TXD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART1_RTS, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART1_CTS, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX25_PIN_UART1_RXD, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX25_PIN_UART1_TXD, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX25_PIN_UART1_RTS, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX25_PIN_UART1_CTS, + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + + break; + case 1: + /* UART 2 IOMUX Configs */ + mxc_request_iomux(MX25_PIN_UART2_RXD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART2_TXD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART2_RTS, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_UART2_CTS, MUX_CONFIG_FUNC); + mxc_iomux_set_pad(MX25_PIN_UART2_RXD, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX25_PIN_UART2_TXD, PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + mxc_iomux_set_pad(MX25_PIN_UART2_RTS, + PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX25_PIN_UART2_CTS, PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD); + break; + case 2: + /* UART 3 IOMUX Configs */ + mxc_request_iomux(MX25_PIN_KPP_ROW0, MUX_CONFIG_ALT1); /*RXD*/ + mxc_request_iomux(MX25_PIN_KPP_ROW1, MUX_CONFIG_ALT1); /*TXD*/ + mxc_request_iomux(MX25_PIN_KPP_ROW2, MUX_CONFIG_ALT1); /*RTS*/ + mxc_request_iomux(MX25_PIN_KPP_ROW3, MUX_CONFIG_ALT1); /*CTS*/ + + mxc_iomux_set_input(MUX_IN_UART3_IPP_UART_RTS_B, + INPUT_CTL_PATH1); + mxc_iomux_set_input(MUX_IN_UART3_IPP_UART_RXD_MUX, + INPUT_CTL_PATH1); + break; + case 3: + /* UART 4 IOMUX Configs */ + mxc_request_iomux(MX25_PIN_LD8, MUX_CONFIG_ALT2); /*RXD*/ + mxc_request_iomux(MX25_PIN_LD9, MUX_CONFIG_ALT2); /*TXD*/ + mxc_request_iomux(MX25_PIN_LD10, MUX_CONFIG_ALT2); /*RTS*/ + mxc_request_iomux(MX25_PIN_LD11, MUX_CONFIG_ALT2); /*CTS*/ + + mxc_iomux_set_input(MUX_IN_UART4_IPP_UART_RTS_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_UART4_IPP_UART_RXD_MUX, + INPUT_CTL_PATH0); + case 4: + /* UART 5 IOMUX Configs */ + mxc_request_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_ALT1); /*RXD*/ + mxc_request_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_ALT1); /*TXD*/ + mxc_request_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_ALT1); /*RTS*/ + mxc_request_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_ALT1); /*CTS*/ + + mxc_iomux_set_input(MUX_IN_UART5_IPP_UART_RTS_B, + INPUT_CTL_PATH1); + mxc_iomux_set_input(MUX_IN_UART5_IPP_UART_RXD_MUX, + INPUT_CTL_PATH1); + default: + break; + } +} +EXPORT_SYMBOL(gpio_uart_active); + +/*! + * Inactivate a UART port + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_inactive(int port, int no_irda) +{ + switch (port) { + case 0: + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART1_RXD), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART1_TXD), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART1_RTS), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART1_CTS), NULL); + + mxc_free_iomux(MX25_PIN_UART1_RXD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART1_TXD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART1_RTS, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART1_CTS, MUX_CONFIG_GPIO); + break; + case 1: + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART2_RXD), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART2_TXD), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART2_RTS), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART2_CTS), NULL); + + mxc_free_iomux(MX25_PIN_UART2_RXD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART2_TXD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART2_RTS, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART2_CTS, MUX_CONFIG_GPIO); + break; + case 2: + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW3), NULL); + + mxc_free_iomux(MX25_PIN_KPP_ROW0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW3, MUX_CONFIG_GPIO); + break; + case 3: + mxc_free_iomux(MX25_PIN_LD8, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD9, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD10, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD11, MUX_CONFIG_FUNC); + break; + case 4: + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D3), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D4), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D5), NULL); + + mxc_free_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_GPIO); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_uart_inactive); + +/*! + * Configure the IOMUX GPR register to receive shared SDMA UART events + * + * @param port a UART port + */ +void config_uartdma_event(int port) +{ +} +EXPORT_SYMBOL(config_uartdma_event); + +/*! + * Activate Keypad + */ +void gpio_keypad_active(void) +{ + mxc_request_iomux(MX25_PIN_KPP_ROW0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_ROW1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_ROW2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_ROW3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_COL0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_COL1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_COL2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_KPP_COL3, MUX_CONFIG_FUNC); + +#define KPP_PAD_CTL_ROW (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | \ + PAD_CTL_100K_PU) +#define KPP_PAD_CTL_COL (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | \ + PAD_CTL_100K_PU | PAD_CTL_ODE_OpenDrain) + + mxc_iomux_set_pad(MX25_PIN_KPP_ROW0, KPP_PAD_CTL_ROW); + mxc_iomux_set_pad(MX25_PIN_KPP_ROW1, KPP_PAD_CTL_ROW); + mxc_iomux_set_pad(MX25_PIN_KPP_ROW2, KPP_PAD_CTL_ROW); + mxc_iomux_set_pad(MX25_PIN_KPP_ROW3, KPP_PAD_CTL_ROW); + mxc_iomux_set_pad(MX25_PIN_KPP_COL0, KPP_PAD_CTL_COL); + mxc_iomux_set_pad(MX25_PIN_KPP_COL1, KPP_PAD_CTL_COL); + mxc_iomux_set_pad(MX25_PIN_KPP_COL2, KPP_PAD_CTL_COL); + mxc_iomux_set_pad(MX25_PIN_KPP_COL3, KPP_PAD_CTL_COL); + +#undef KPP_PAD_CTL_ROW +#undef KPP_PAD_CTL_COL +} +EXPORT_SYMBOL(gpio_keypad_active); + +/*! + * Inactivate Keypad + */ +void gpio_keypad_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_ROW3), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_COL0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_COL1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_COL2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_KPP_COL3), NULL); + + mxc_free_iomux(MX25_PIN_KPP_ROW0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_ROW3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_COL0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_COL1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_COL2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_KPP_COL3, MUX_CONFIG_GPIO); +} +EXPORT_SYMBOL(gpio_keypad_inactive); + +/*! + * Activate FEC + */ +void gpio_fec_active(void) +{ + mxc_request_iomux(MX25_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_MDC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_MDIO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_POWER_FAIL, MUX_CONFIG_FUNC); /* PHY INT */ + +#define FEC_PAD_CTL1 (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PUE_PUD | \ + PAD_CTL_PKE_ENABLE) +#define FEC_PAD_CTL2 (PAD_CTL_PUE_PUD) + + mxc_iomux_set_pad(MX25_PIN_FEC_TX_CLK, FEC_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_FEC_RX_DV, FEC_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_FEC_RDATA0, FEC_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_FEC_TDATA0, FEC_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_FEC_TX_EN, FEC_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_FEC_MDC, FEC_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_FEC_MDIO, FEC_PAD_CTL1 | PAD_CTL_22K_PU); + mxc_iomux_set_pad(MX25_PIN_FEC_RDATA1, FEC_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_FEC_TDATA1, FEC_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_POWER_FAIL, FEC_PAD_CTL1); + + /* + * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins. + * Assert FEC_RESET_B, then power up the PHY by asserting + * FEC_ENABLE, at the same time lifting FEC_RESET_B. + * + * FEC_RESET_B: gpio2[3] is ALT 5 mode of pin D12 + * FEC_ENABLE_B: gpio4[8] is ALT 5 mode of pin A17 + */ + mxc_request_iomux(MX25_PIN_A17, MUX_CONFIG_ALT5); /* FEC_EN */ + mxc_request_iomux(MX25_PIN_D12, MUX_CONFIG_ALT5); /* FEC_RESET_B */ + + mxc_iomux_set_pad(MX25_PIN_A17, PAD_CTL_ODE_OpenDrain); + mxc_iomux_set_pad(MX25_PIN_D12, 0); + + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A17), "a17"); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_D12), "d12"); + + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_A17), 0); /* FEC_EN */ + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_D12), 0); /* FEC_RESET_B */ + + /* drop PHY power */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A17), 0); /* FEC_EN */ + + /* assert reset */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D12), 0); /* FEC_RESET_B */ + udelay(2); /* spec says 1us min */ + + /* turn on PHY power and lift reset */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A17), 1); /* FEC_EN */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D12), 1); /* FEC_RESET_B */ + +#undef FEC_PAD_CTL_COMMON +#undef FEC_PAD_CTL1 +#undef FEC_PAD_CTL2 +} +EXPORT_SYMBOL(gpio_fec_active); + +/*! + * Inactivate FEC + */ +void gpio_fec_inactive(void) +{ + /* + * Turn off the PHY. + */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A17), 0); + + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_TX_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_RX_DV), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_RDATA0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_TDATA0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_TX_EN), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_MDC), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_MDIO), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_RDATA1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_TDATA1), NULL); + + mxc_free_iomux(MX25_PIN_FEC_TX_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_RX_DV, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_RDATA0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_TDATA0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_TX_EN, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_MDC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_MDIO, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_RDATA1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_TDATA1, MUX_CONFIG_GPIO); + mxc_request_iomux(MX25_PIN_POWER_FAIL, MUX_CONFIG_FUNC); /* PHY INT */ + + mxc_free_iomux(MX25_PIN_A17, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_D12, MUX_CONFIG_GPIO); /* FEC_RESET_B */ + + /* We keep pin A17, so FEC_ENABLE doesn't float */ +} +EXPORT_SYMBOL(gpio_fec_inactive); + +/*! + * Activate an I2C device + * + * @param i2c_num an I2C device + */ +void gpio_i2c_active(int i2c_num) +{ +#define I2C_PAD_CTL (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | \ + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_ODE_OpenDrain) + + switch (i2c_num) { + case 0: + /*I2C1*/ + mxc_request_iomux(MX25_PIN_I2C1_CLK, MUX_CONFIG_SION); + mxc_request_iomux(MX25_PIN_I2C1_DAT, MUX_CONFIG_SION); + mxc_iomux_set_pad(MX25_PIN_I2C1_CLK, I2C_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_I2C1_DAT, I2C_PAD_CTL); + break; + case 1: + /*I2C2*/ + mxc_request_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_ALT2); /*SCL*/ + mxc_request_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_ALT2); /*SDA*/ + mxc_iomux_set_pad(MX25_PIN_GPIO_C, I2C_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_GPIO_D, I2C_PAD_CTL); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SCL_IN, INPUT_CTL_PATH1); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SDA_IN, INPUT_CTL_PATH1); + +#if 0 + /* Or use FEC pins if it is not used */ + mxc_request_iomux(MX25_PIN_FEC_RDATA1, MUX_CONFIG_ALT1); /*SCL*/ + mxc_request_iomux(MX25_PIN_FEC_RX_DV, MUX_CONFIG_ALT1); /*SDA*/ + mxc_iomux_set_pad(MX25_PIN_FEC_RDATA1, I2C_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_FEC_RX_DV, I2C_PAD_CTL); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SCL_IN, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SDA_IN, INPUT_CTL_PATH0); +#endif + + break; + case 2: + /*I2C3*/ + mxc_request_iomux(MX25_PIN_HSYNC, MUX_CONFIG_ALT2); /*SCL*/ + mxc_request_iomux(MX25_PIN_VSYNC, MUX_CONFIG_ALT2); /*SDA*/ + mxc_iomux_set_pad(MX25_PIN_HSYNC, I2C_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_VSYNC, I2C_PAD_CTL); + mxc_iomux_set_input(MUX_IN_I2C3_IPP_SCL_IN, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_I2C3_IPP_SDA_IN, INPUT_CTL_PATH0); + break; + default: + break; + } +#undef I2C_PAD_CTL +} +EXPORT_SYMBOL(gpio_i2c_active); + +/*! + * Inactivate an I2C device + * + * @param i2c_num an I2C device + */ +void gpio_i2c_inactive(int i2c_num) +{ + switch (i2c_num) { + case 0: + /*I2C1*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_I2C1_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_I2C1_DAT), NULL); + mxc_free_iomux(MX25_PIN_I2C1_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_I2C1_DAT, MUX_CONFIG_GPIO); + break; + case 1: + /*I2C2*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_C), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_D), NULL); + mxc_free_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_GPIO); + +#if 0 + /* Or use FEC pins if not in use */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_RDATA1, NULL); /*SCL*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_FEC_RX_DV, NULL); /*SDA*/ + mxc_free_iomux(MX25_PIN_FEC_RDATA1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_FEC_RX_DV, MUX_CONFIG_GPIO); +#endif + + break; + case 2: + /*I2C3*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_HSYNC), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_VSYNC), NULL); + mxc_free_iomux(MX25_PIN_HSYNC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_VSYNC, MUX_CONFIG_GPIO); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_i2c_inactive); + +/*! + * Activate a CSPI device + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_active(int cspi_mod) +{ +#define SPI_PAD_CTL1 (PAD_CTL_HYS_SCHMITZ|PAD_CTL_PKE_ENABLE| \ + PAD_CTL_100K_PU) +#define SPI_PAD_CTL2 (PAD_CTL_HYS_SCHMITZ|PAD_CTL_PKE_ENABLE| \ + PAD_CTL_PUE_PUD|PAD_CTL_100K_PU) + + switch (cspi_mod) { + case 0: + /* SPI1 */ + mxc_request_iomux(MX25_PIN_CSPI1_MOSI, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSPI1_MISO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSPI1_SS0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSPI1_SS1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSPI1_SCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSPI1_RDY, MUX_CONFIG_FUNC); +#ifndef CONFIG_CAN_FLEXCAN /* MX25 3-stack uses this pin for CAN2 */ + mxc_request_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_ALT5); /*SS2*/ +#endif + mxc_request_iomux(MX25_PIN_VSTBY_ACK, MUX_CONFIG_ALT2); /*SS3*/ + + /* Or if VSTBY_ACK is being used */ + /*mxc_request_iomux(MX25_PIN_NF_CE0, MUX_CONFIG_ALT1);*/ /*SS3*/ + + mxc_iomux_set_pad(MX25_PIN_CSPI1_MOSI, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSPI1_MISO, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSPI1_SS0, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSPI1_SS1, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSPI1_SCLK, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSPI1_RDY, SPI_PAD_CTL1); +#ifndef CONFIG_CAN_FLEXCAN /* MX25 3-stack uses this pin for CAN2 */ + mxc_iomux_set_pad(MX25_PIN_GPIO_C, SPI_PAD_CTL2); +#endif + mxc_iomux_set_pad(MX25_PIN_VSTBY_ACK, SPI_PAD_CTL1); + + mxc_iomux_set_input(MUX_IN_CSPI1_IPP_IND_SS3_B, + INPUT_CTL_PATH1); + break; + case 1: + /* SPI2 */ + mxc_request_iomux(MX25_PIN_LD12, MUX_CONFIG_ALT2); /*MOSI*/ + mxc_request_iomux(MX25_PIN_LD13, MUX_CONFIG_ALT2); /*MISO*/ + mxc_request_iomux(MX25_PIN_LD14, MUX_CONFIG_ALT2); /*SCLK*/ + mxc_request_iomux(MX25_PIN_LD15, MUX_CONFIG_ALT2); /*RDY*/ + mxc_request_iomux(MX25_PIN_OE_ACD, MUX_CONFIG_ALT2); /*SS0*/ + mxc_request_iomux(MX25_PIN_CONTRAST, MUX_CONFIG_ALT2); /*SS1*/ + mxc_request_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_ALT7); /*SS2*/ + mxc_request_iomux(MX25_PIN_UART2_RTS, MUX_CONFIG_ALT6); /*SS3*/ + + mxc_iomux_set_pad(MX25_PIN_LD12, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_LD13, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_LD14, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_LD15, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_OE_ACD, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_CONTRAST, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_GPIO_C, SPI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_UART2_RTS, SPI_PAD_CTL2); + + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_CSPI_CLK_IN, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_IND_DATAREADY_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_IND_MISO, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_IND_MOSI, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_IND_SS0_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI2_IPP_IND_SS1_B, + INPUT_CTL_PATH0); + break; + case 2: + /* SPI3 */ + mxc_request_iomux(MX25_PIN_EB0, MUX_CONFIG_ALT6); /*SS0*/ + mxc_request_iomux(MX25_PIN_EB1, MUX_CONFIG_ALT6); /*SS1*/ + mxc_request_iomux(MX25_PIN_CS4, MUX_CONFIG_ALT6); /*MOSI*/ + mxc_request_iomux(MX25_PIN_CS5, MUX_CONFIG_ALT6); /*MISO*/ + mxc_request_iomux(MX25_PIN_ECB, MUX_CONFIG_ALT6); /*SCLK*/ + mxc_request_iomux(MX25_PIN_LBA, MUX_CONFIG_ALT6); /*RDY*/ + mxc_request_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_ALT7); /*SS2*/ + mxc_request_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_ALT7); /*SS3*/ + + mxc_iomux_set_pad(MX25_PIN_EB0, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_EB1, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CS4, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CS5, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_ECB, SPI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_LBA, SPI_PAD_CTL1); + + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_CSPI_CLK_IN, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_DATAREADY_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_MISO, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_MOSI, INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_SS0_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_SS1_B, + INPUT_CTL_PATH0); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_SS2_B, + INPUT_CTL_PATH1); + mxc_iomux_set_input(MUX_IN_CSPI3_IPP_IND_SS3_B, + INPUT_CTL_PATH0); + break; + default: + break; + } +#undef SPI_PAD_CTL1 +#undef SPI_PAD_CTL2 +} +EXPORT_SYMBOL(gpio_spi_active); + +/*! + * Inactivate a CSPI device + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_MOSI), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_MISO), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_SS0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_SS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_SCLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSPI1_RDY), NULL); +#ifndef CONFIG_CAN_FLEXCAN /* MX25 3-stack uses this pin for CAN2 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_C), NULL); /*SS2*/ +#endif + gpio_request(IOMUX_TO_GPIO(MX25_PIN_VSTBY_ACK), NULL); /*SS3*/ + + mxc_free_iomux(MX25_PIN_CSPI1_MOSI, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSPI1_MISO, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSPI1_SS0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSPI1_SS1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSPI1_SCLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSPI1_RDY, MUX_CONFIG_GPIO); +#ifndef CONFIG_CAN_FLEXCAN /* MX25 3-stack uses this pin for CAN2 */ + mxc_free_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_GPIO); +#endif + mxc_free_iomux(MX25_PIN_VSTBY_ACK, MUX_CONFIG_GPIO); + break; + case 1: + /* SPI2 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD12), NULL); /*MOSI*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD13), NULL); /*MISO*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD14), NULL); /*SCLK*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD15), NULL); /*RDY*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_OE_ACD), NULL); /*SS0*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CONTRAST), NULL); /*SS1*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_C), NULL); /*SS2*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_UART2_RTS), NULL); /*SS3*/ + + mxc_free_iomux(MX25_PIN_LD12, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD13, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD14, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD15, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_OE_ACD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CONTRAST, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_UART2_RTS, MUX_CONFIG_GPIO); + break; + case 2: + /* SPI3 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_EB0), NULL); /*SS0*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_EB1), NULL); /*SS1*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CS4), NULL); /*MOSI*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CS5), NULL); /*MISO*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_ECB), NULL); /*SCLK*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LBA), NULL); /*RDY*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_D), NULL); /*SS2*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D9), NULL); /*SS3*/ + + mxc_free_iomux(MX25_PIN_EB0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_EB1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CS4, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CS5, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_ECB, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LBA, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_GPIO); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_spi_inactive); + +/*! + * Activate LCD + */ +void gpio_lcdc_active(void) +{ + mxc_request_iomux(MX25_PIN_LD0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD6, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD7, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD8, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD9, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD10, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD11, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD12, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD13, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD14, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LD15, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_GPIO_E, MUX_CONFIG_ALT2); /*D16*/ + mxc_request_iomux(MX25_PIN_GPIO_F, MUX_CONFIG_ALT2); /*D17*/ + mxc_request_iomux(MX25_PIN_HSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_VSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_LSCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_OE_ACD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CONTRAST, MUX_CONFIG_FUNC); + +#define LCD_PAD_CTL (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU) + mxc_iomux_set_pad(MX25_PIN_LD0, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD1, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD2, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD3, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD4, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD5, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD6, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD7, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD8, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD9, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD10, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD11, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD12, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD13, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD14, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD15, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_GPIO_E, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_GPIO_F, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_HSYNC, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_VSYNC, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LSCLK, LCD_PAD_CTL | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_OE_ACD, LCD_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CONTRAST, LCD_PAD_CTL); +} +EXPORT_SYMBOL(gpio_lcdc_active); + +/*! + * Inactivate LCD + */ +void gpio_lcdc_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD3), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD4), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD5), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD6), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD7), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_E), NULL); /*D16*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_F), NULL); /*D17*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_HSYNC), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_VSYNC), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LSCLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_OE_ACD), NULL); + + mxc_free_iomux(MX25_PIN_LD0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD4, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD5, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD6, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD7, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD8, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD9, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD10, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD11, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD12, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD13, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD14, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_LD15, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_GPIO_E, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_GPIO_F, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_HSYNC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_VSYNC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LSCLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_OE_ACD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CONTRAST, MUX_CONFIG_FUNC); +} +EXPORT_SYMBOL(gpio_lcdc_inactive); + +/*! + * Activate SDHC + * + * @param module SDHC module number + */ +void gpio_sdhc_active(int module) +{ +#define SDHC_PAD_CTL (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD | \ + PAD_CTL_47K_PU | PAD_CTL_SRE_FAST) + + switch (module) { + case 0: + /* SDHC1 */ + mxc_request_iomux(MX25_PIN_SD1_CMD, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX25_PIN_SD1_CLK, + MUX_CONFIG_FUNC | MUX_CONFIG_SION); + mxc_request_iomux(MX25_PIN_SD1_DATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_SD1_DATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_SD1_DATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_SD1_DATA3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_A14, MUX_CONFIG_ALT5); /*SD1_WP*/ + mxc_request_iomux(MX25_PIN_A15, MUX_CONFIG_ALT5); /*SD1_DET*/ + + mxc_iomux_set_pad(MX25_PIN_SD1_CMD, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_SD1_CLK, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_SD1_DATA0, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_SD1_DATA1, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_SD1_DATA2, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_SD1_DATA3, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_A14, PAD_CTL_DRV_NORMAL); + mxc_iomux_set_pad(MX25_PIN_A15, PAD_CTL_DRV_NORMAL); + + /* Set write protect and card detect gpio as inputs */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A14), "a14"); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A15), "a15"); + gpio_direction_input(IOMUX_TO_GPIO(MX25_PIN_A14)); /*SD1_WP*/ + gpio_direction_input(IOMUX_TO_GPIO(MX25_PIN_A15)); /*SD1_DET*/ + + break; + case 1: + /* SDHC2 */ + mxc_request_iomux(MX25_PIN_LD8, + MUX_CONFIG_ALT6 | MUX_CONFIG_SION); /*CMD*/ + mxc_request_iomux(MX25_PIN_LD9, + MUX_CONFIG_ALT6 | MUX_CONFIG_SION); /*CLK*/ + mxc_request_iomux(MX25_PIN_LD10, MUX_CONFIG_ALT6); /*DAT0*/ + mxc_request_iomux(MX25_PIN_LD11, MUX_CONFIG_ALT6); /*DAT1*/ + mxc_request_iomux(MX25_PIN_LD12, MUX_CONFIG_ALT6); /*DAT2*/ + mxc_request_iomux(MX25_PIN_LD13, MUX_CONFIG_ALT6); /*DAT3*/ + + mxc_iomux_set_pad(MX25_PIN_LD8, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD9, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD10, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD11, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD12, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_LD13, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D2, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D3, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D4, SDHC_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D5, SDHC_PAD_CTL); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_sdhc_active); + +/*! + * Inactivate SDHC + * + * @param module SDHC module number + */ +void gpio_sdhc_inactive(int module) +{ + switch (module) { + case 0: + /* SDHC1 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_CMD), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_CLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_DATA0), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_DATA1), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_DATA2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_SD1_DATA3), NULL); + + mxc_free_iomux(MX25_PIN_SD1_CMD, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_SD1_CLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_SD1_DATA0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_SD1_DATA1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_SD1_DATA2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_SD1_DATA3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_A14, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_A15, MUX_CONFIG_GPIO); + break; + case 1: + /* SDHC2 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD8), NULL); /*CMD*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD9), NULL); /*CLK*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD10), NULL); /*DAT0*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD11), NULL); /*DAT1*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD12), NULL); /*DAT2*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_LD13), NULL); /*DAT3*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D2), NULL); /*DAT4*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D3), NULL); /*DAT5*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D4), NULL); /*DAT6*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D5), NULL); /*DAT7*/ + + mxc_free_iomux(MX25_PIN_LD8, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD9, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD10, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD11, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD12, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_LD13, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_GPIO); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_sdhc_inactive); + +/* + * Probe for the card. If present the GPIO data would be set. + */ +unsigned int sdhc_get_card_det_status(struct device *dev) +{ + unsigned int ret = 0; + + ret = gpio_get_value(IOMUX_TO_GPIO(MX25_PIN_A15)); + return ret; +} +EXPORT_SYMBOL(sdhc_get_card_det_status); + +/*! + * Get pin value to detect write protection + */ +int sdhc_write_protect(struct device *dev) +{ + unsigned int rc = 0; + + rc = gpio_get_value(IOMUX_TO_GPIO(MX25_PIN_A14)); + return rc; +} +EXPORT_SYMBOL(sdhc_write_protect); + +/* + * USB Host2 + * + * This configuration uses the on-chip FS/LS serial transceiver. + * USBPHY2_{DP,DM} pins are not muxed. + * We just need to grab USBH2_PWR, USBH2_OC and the Bluetooth/USB + * mux control signal. + */ +int gpio_usbh2_active(void) +{ + if (mxc_request_iomux(MX25_PIN_D9, MUX_CONFIG_ALT6) || /* PWR */ + mxc_request_iomux(MX25_PIN_D8, MUX_CONFIG_ALT6) || /* OC */ + mxc_request_iomux(MX25_PIN_A21, MUX_CONFIG_ALT5)) { /* BT_USB_CS */ + return -EINVAL; + } + + /* + * This pin controls the mux that switches between + * the J18 connector and the on-board bluetooth module. + * dir: 0 = out + * pin: 0 = J18, 1 = BT + */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A21), "a21"); + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_A21), 0); + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A21), 0); + + return 0; +} +EXPORT_SYMBOL(gpio_usbh2_active); + +void gpio_usbh2_inactive(void) +{ + mxc_free_iomux(MX25_PIN_D9, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_D8, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_A21, MUX_CONFIG_GPIO); +} + +/* + * USB OTG UTMI + * + * This configuration uses the on-chip UTMI transceiver. + * USBPHY1_{VBUS,DP,DM,UID,RREF} pins are not muxed. + * We just need to grab the USBOTG_PWR and USBOTG_OC pins. + */ +int gpio_usbotg_utmi_active(void) +{ + if (mxc_request_iomux(MX25_PIN_GPIO_A, MUX_CONFIG_ALT2) || /* PWR */ + mxc_request_iomux(MX25_PIN_GPIO_B, MUX_CONFIG_ALT2)) { /* OC */ + return -EINVAL; + } + return 0; +} +EXPORT_SYMBOL(gpio_usbotg_utmi_active); + +void gpio_usbotg_utmi_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_A), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_B), NULL); + + mxc_free_iomux(MX25_PIN_GPIO_A, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_GPIO_B, MUX_CONFIG_GPIO); +} +EXPORT_SYMBOL(gpio_usbotg_utmi_inactive); + +/*! + * Activate camera sensor + */ +void gpio_sensor_active(void) +{ + mxc_request_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D6, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D7, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D8, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_HSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_MCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_PIXCLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_CSI_VSYNC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX25_PIN_A19, MUX_CONFIG_ALT5); /*CSI_PWDN*/ + mxc_request_iomux(MX25_PIN_A20, MUX_CONFIG_ALT5); /*CMOS_RST*/ + + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A19), "a19"); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A20), "a20"); + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_A19), 0); /*CSI_PWDN*/ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A19), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_A20), 0); /*CMOS_RST*/ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A20), 0); + mdelay(20); + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_A20), 1); + +#define CSI_PAD_CTL1 (PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU) +#define CSI_PAD_CTL2 (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | \ + PAD_CTL_100K_PU) + + mxc_iomux_set_pad(MX25_PIN_CSI_D2, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_D3, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_D4, CSI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_CSI_D5, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_D6, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_D7, CSI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_CSI_D8, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_D9, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_HSYNC, CSI_PAD_CTL1); + mxc_iomux_set_pad(MX25_PIN_CSI_MCLK, PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PU | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_CSI_PIXCLK, CSI_PAD_CTL2); + mxc_iomux_set_pad(MX25_PIN_CSI_VSYNC, CSI_PAD_CTL1); +} +EXPORT_SYMBOL(gpio_sensor_active); + +/*! + * Inactivate camera sensor + */ +void gpio_sensor_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D2), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D3), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D4), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D5), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D6), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D7), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D8), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_D9), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_HSYNC), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_MCLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_PIXCLK), NULL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_CSI_VSYNC), NULL); + + mxc_free_iomux(MX25_PIN_A19, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_A20, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D6, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D7, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D8, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_HSYNC, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_MCLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_PIXCLK, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_CSI_VSYNC, MUX_CONFIG_GPIO); +} +EXPORT_SYMBOL(gpio_sensor_inactive); + +/*! + * Activate ESAI ports to enable surround sound I/O + */ +void gpio_activate_esai_ports(void) +{ + mxc_request_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_ALT3); /*SCKR*/ + mxc_request_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_ALT3); /*FSR*/ + mxc_request_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_ALT3); /*HCKR*/ + mxc_request_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_ALT3); /*SCKT*/ + mxc_request_iomux(MX25_PIN_CSI_D6, MUX_CONFIG_ALT3); /*FST*/ + mxc_request_iomux(MX25_PIN_CSI_D7, MUX_CONFIG_ALT3); /*HCKT*/ + mxc_request_iomux(MX25_PIN_CSI_D8, MUX_CONFIG_ALT3); /*TX5_RX0*/ + mxc_request_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_ALT3); /*TX4_RX1*/ + mxc_request_iomux(MX25_PIN_CSI_MCLK, MUX_CONFIG_ALT3); /*TX3_RX2*/ + mxc_request_iomux(MX25_PIN_CSI_VSYNC, MUX_CONFIG_ALT3); /*TX2_RX3*/ + mxc_request_iomux(MX25_PIN_CSI_HSYNC, MUX_CONFIG_ALT3); /*TX1*/ + mxc_request_iomux(MX25_PIN_CSI_PIXCLK, MUX_CONFIG_ALT3); /*TX0*/ + +#define ESAI_PAD_CTL (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | \ + PAD_CTL_100K_PU | PAD_CTL_PUE_PUD) + mxc_iomux_set_pad(MX25_PIN_CSI_D2, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D3, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D4, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D5, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D6, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D7, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D8, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_D9, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_MCLK, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_VSYNC, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_HSYNC, ESAI_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_CSI_PIXCLK, ESAI_PAD_CTL); + +#undef ESAI_PAD_CTL +} +EXPORT_SYMBOL(gpio_activate_esai_ports); + +/*! + * Inactivate ESAI ports to disable surround sound I/O + */ +void gpio_deactivate_esai_ports(void) +{ + mxc_free_iomux(MX25_PIN_CSI_D2, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D3, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D4, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D5, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D6, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D7, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D8, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_D9, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_MCLK, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_VSYNC, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_HSYNC, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_CSI_PIXCLK, MUX_CONFIG_FUNC); +} +EXPORT_SYMBOL(gpio_deactivate_esai_ports); + + +/*! + * Activate CAN + */ +void gpio_can_active(int id) +{ +#define CAN_PAD_CTL (PAD_CTL_DRV_3_3V | PAD_CTL_PKE_NONE | PAD_CTL_ODE_CMOS | \ + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW) +#define CAN_PAD_IN_CTL (PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE) + + switch (id) { + case 0: + /* CAN1 */ + mxc_request_iomux(MX25_PIN_GPIO_A, MUX_CONFIG_ALT6); /*TXCAN*/ + mxc_request_iomux(MX25_PIN_GPIO_B, MUX_CONFIG_ALT6); /*RXCAN*/ + + mxc_iomux_set_pad(MX25_PIN_GPIO_A, CAN_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_GPIO_B, CAN_PAD_IN_CTL); + + mxc_iomux_set_input(MUX_IN_CAN1_IPP_IND_CANRX, INPUT_CTL_PATH1); + break; + case 1: + /* CAN2 */ + mxc_request_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_ALT6); /*TXCAN*/ + mxc_request_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_ALT6); /*RXCAN*/ + mxc_request_iomux(MX25_PIN_D14, MUX_CONFIG_ALT5); /*PWDN*/ + + mxc_iomux_set_pad(MX25_PIN_GPIO_C, CAN_PAD_CTL); + mxc_iomux_set_pad(MX25_PIN_GPIO_D, CAN_PAD_IN_CTL); + mxc_iomux_set_pad(MX25_PIN_D14, CAN_PAD_CTL); + + mxc_iomux_set_input(MUX_IN_CAN2_IPP_IND_CANRX, INPUT_CTL_PATH1); + + /* Configure CAN_PWDN as output */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_D14), "d14"); + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_D14), 0); + + /* Enable input by setting PWDN/TLE6250.INH low (gpio4 bit6) */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D14), 0); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_can_active); + +/*! + * Inactivate CAN + */ +void gpio_can_inactive(int id) +{ + switch (id) { + case 0: + /* CAN1 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_A), NULL); /*TXCAN*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_B), NULL); /*RXCAN*/ + + mxc_free_iomux(MX25_PIN_GPIO_A, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_GPIO_B, MUX_CONFIG_FUNC); + + break; + case 1: + /* CAN2 */ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_C), NULL); /*TXCAN*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_GPIO_D), NULL); /*RXCAN*/ + + mxc_free_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_FUNC); + mxc_free_iomux(MX25_PIN_GPIO_D, MUX_CONFIG_FUNC); + + /* Disable input by setting PWDN/TLE6250.INH high */ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D14), 1); + mxc_free_iomux(MX25_PIN_D14, MUX_CONFIG_ALT5); + break; + default: + break; + } +} +EXPORT_SYMBOL(gpio_can_inactive); + +/*! + * This function activates DAM port 4 to enable + * audio I/O. + */ +void gpio_activate_audio_ports(void) +{ + mxc_request_iomux(MX25_PIN_EB0, MUX_CONFIG_ALT4); /*SSI4_STXD*/ + mxc_request_iomux(MX25_PIN_EB1, MUX_CONFIG_ALT4); /*SSI4_SRXD*/ + mxc_request_iomux(MX25_PIN_RW, MUX_CONFIG_ALT4); /*SSI4_STXFS*/ + mxc_request_iomux(MX25_PIN_OE, MUX_CONFIG_ALT4); /*SSI4_SCK*/ + mxc_request_iomux(MX25_PIN_A10, MUX_CONFIG_ALT5); /*HP_DEC*/ + mxc_request_iomux(MX25_PIN_D13, MUX_CONFIG_ALT5); /*AMP_SHUTDOWN*/ + + mxc_iomux_set_pad(MX25_PIN_EB0, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_EB1, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_RW, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_OE, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX25_PIN_D13, PAD_CTL_DRV_3_3V); + + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A10), "a10"); + gpio_direction_input(IOMUX_TO_GPIO(MX25_PIN_A10)); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_D13), "d13"); + gpio_direction_output(IOMUX_TO_GPIO(MX25_PIN_D13), 0); +} +EXPORT_SYMBOL(gpio_activate_audio_ports); + +/*! + * This function inactivates DAM port 4 for + * audio I/O + */ +void gpio_inactive_audio_ports(void) +{ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_EB0), NULL); /*SSI4_STXD*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_EB1), NULL); /*SSI4_SRXD*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_RW), NULL); /*SSI4_STXFS*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_OE), NULL); /*SSI4_SCK*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A10), NULL); /*HP_DEC*/ + gpio_request(IOMUX_TO_GPIO(MX25_PIN_D13), NULL); /*AMP_SHUTDOWN*/ + + mxc_free_iomux(MX25_PIN_EB0, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_EB1, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_RW, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_OE, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_A10, MUX_CONFIG_GPIO); + mxc_free_iomux(MX25_PIN_D13, MUX_CONFIG_GPIO); +} +EXPORT_SYMBOL(gpio_inactive_audio_ports); + +int headphone_det_status(void) +{ + return gpio_get_value(IOMUX_TO_GPIO(MX25_PIN_A10)); +} +EXPORT_SYMBOL(headphone_det_status); + +void sgtl5000_enable_amp(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D13), 1); +} +EXPORT_SYMBOL(sgtl5000_enable_amp); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/devices.c @@ -0,0 +1,615 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "iomux.h" +#include "sdma_script_code.h" +#include "board-mx25_3stack.h" + +void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_addr) +{ + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = -1; + + sdma_script_addr->mxc_sdma_uart_2_per_addr = uart_2_per_ADDR; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_app_addr = per_2_app_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR; + + sdma_script_addr->mxc_sdma_per_2_per_addr = -1; + + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = uartsh_2_per_ADDR; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = uartsh_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_shp_addr = per_2_shp_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR; + + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR; + + sdma_script_addr->mxc_sdma_app_2_per_addr = app_2_per_ADDR; + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_shp_2_per_addr = shp_2_per_ADDR; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR; + + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = -1; + + sdma_script_addr->mxc_sdma_spdif_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_spdif_addr = -1; + + sdma_script_addr->mxc_sdma_asrc_2_mcu_addr = -1; + + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = -1; + sdma_script_addr->mxc_sdma_ext_mem_2_ipu_addr = ext_mem__ipu_ram_ADDR; + sdma_script_addr->mxc_sdma_descrambler_addr = -1; + + sdma_script_addr->mxc_sdma_start_addr = (unsigned short *)sdma_code; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; + sdma_script_addr->mxc_sdma_ram_code_start_addr = RAM_CODE_START_ADDR; +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_RTC_DRV_IMXDI) || defined(CONFIG_RTC_DRV_IMXDI_MODULE) +static struct resource rtc_resources[] = { + { + .start = SRTC_BASE_ADDR, + .end = SRTC_BASE_ADDR + 0x40, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_DRYICE_NORM, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device imxdi_rtc_device = { + .name = "imxdi_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; +static void mxc_init_rtc(void) +{ + (void)platform_device_register(&imxdi_rtc_device); +} +#else +static inline void mxc_init_rtc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_WATCHDOG) || defined(CONFIG_MXC_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = WDOG1_BASE_ADDR, + .end = WDOG1_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_wdt_device = { + .name = "mxc_wdt", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void mxc_init_wdt(void) +{ + (void)platform_device_register(&mxc_wdt_device); +} +#else +static inline void mxc_init_wdt(void) +{ +} +#endif + +/* SPI controller and device data */ +#if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) + +#ifdef CONFIG_SPI_MXC_SELECT1 +/*! + * Resource definition for the CSPI1 + */ +static struct resource mxcspi1_resources[] = { + [0] = { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI1 */ +static struct mxc_spi_master mxcspi1_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI1 */ +static struct platform_device mxcspi1_device = { + .name = "mxc_spi", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi1_data, + }, + .num_resources = ARRAY_SIZE(mxcspi1_resources), + .resource = mxcspi1_resources, +}; + +#endif /* CONFIG_SPI_MXC_SELECT1 */ + +#ifdef CONFIG_SPI_MXC_SELECT2 +/*! + * Resource definition for the CSPI2 + */ +static struct resource mxcspi2_resources[] = { + [0] = { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI2 */ +static struct mxc_spi_master mxcspi2_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI2 */ +static struct platform_device mxcspi2_device = { + .name = "mxc_spi", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi2_data, + }, + .num_resources = ARRAY_SIZE(mxcspi2_resources), + .resource = mxcspi2_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT2 */ + +#ifdef CONFIG_SPI_MXC_SELECT3 +/*! + * Resource definition for the CSPI3 + */ +static struct resource mxcspi3_resources[] = { + [0] = { + .start = CSPI3_BASE_ADDR, + .end = CSPI3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI3, + .end = MXC_INT_CSPI3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI3 */ +static struct mxc_spi_master mxcspi3_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI3 */ +static struct platform_device mxcspi3_device = { + .name = "mxc_spi", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi3_data, + }, + .num_resources = ARRAY_SIZE(mxcspi3_resources), + .resource = mxcspi3_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT3 */ + +static inline void mxc_init_spi(void) +{ + spba_take_ownership(SPBA_CSPI2, SPBA_MASTER_A); + spba_take_ownership(SPBA_CSPI3, SPBA_MASTER_A); + +#ifdef CONFIG_SPI_MXC_SELECT1 + if (platform_device_register(&mxcspi1_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_1\n"); +#endif /* CONFIG_SPI_MXC_SELECT1 */ +#ifdef CONFIG_SPI_MXC_SELECT2 + if (platform_device_register(&mxcspi2_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_2\n"); +#endif /* CONFIG_SPI_MXC_SELECT2 */ +#ifdef CONFIG_SPI_MXC_SELECT3 + if (platform_device_register(&mxcspi3_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_3\n"); +#endif /* CONFIG_SPI_MXC_SELECT3 */ +} +#else +static inline void mxc_init_spi(void) +{ +} +#endif + +/* I2C controller and device data */ +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +/*! + * Resource definition for the I2C1 + */ +static struct resource mxci2c1_resources[] = { + [0] = { + .start = I2C_BASE_ADDR, + .end = I2C_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C, + .end = MXC_INT_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c1_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT2 +/*! + * Resource definition for the I2C2 + */ +static struct resource mxci2c2_resources[] = { + [0] = { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c2_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT3 +/*! + * Resource definition for the I2C3 + */ +static struct resource mxci2c3_resources[] = { + [0] = { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c3_data = { + .i2c_clk = 100000, +}; +#endif + +/*! Device Definition for MXC I2C1 */ +static struct platform_device mxci2c_devices[] = { +#ifdef CONFIG_I2C_MXC_SELECT1 + { + .name = "mxc_i2c", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c1_data, + }, + .num_resources = ARRAY_SIZE(mxci2c1_resources), + .resource = mxci2c1_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 + { + .name = "mxc_i2c", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c2_data, + }, + .num_resources = ARRAY_SIZE(mxci2c2_resources), + .resource = mxci2c2_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT3 + { + .name = "mxc_i2c", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c3_data, + }, + .num_resources = ARRAY_SIZE(mxci2c3_resources), + .resource = mxci2c3_resources,}, +#endif +}; + +static inline void mxc_init_i2c(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxci2c_devices); i++) { + if (platform_device_register(&mxci2c_devices[i]) < 0) + dev_err(&mxci2c_devices[i].dev, + "Unable to register I2C device\n"); + } +} +#else +static inline void mxc_init_i2c(void) +{ +} +#endif + +struct mxc_gpio_port mxc_gpio_ports[] = { + [0] = { + .chip.label = "gpio-0", + .base = IO_ADDRESS(GPIO1_BASE_ADDR), + .irq = MXC_INT_GPIO1, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + }, + [1] = { + .chip.label = "gpio-1", + .base = IO_ADDRESS(GPIO2_BASE_ADDR), + .irq = MXC_INT_GPIO2, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 + }, + [2] = { + .chip.label = "gpio-2", + .base = IO_ADDRESS(GPIO3_BASE_ADDR), + .irq = MXC_INT_GPIO3, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 + }, + [3] = { + .chip.label = "gpio-3", + .base = IO_ADDRESS(GPIO4_BASE_ADDR), + .irq = MXC_INT_GPIO4, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 + } +}; + +int __init mxc_register_gpios(void) +{ + return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); +} + +static inline void mxc_init_ssi(void) +{ + /* SPBA configuration for SSI - SDMA and MCU are set */ + spba_take_ownership(SPBA_SSI1, SPBA_MASTER_A | SPBA_MASTER_C); + spba_take_ownership(SPBA_SSI2, SPBA_MASTER_A | SPBA_MASTER_C); +} + +static struct platform_device mxc_dma_device = { + .name = "mxc_dma", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_dma(void) +{ + (void)platform_device_register(&mxc_dma_device); +} + +/* imx adc driver */ +#if defined(CONFIG_IMX_ADC) || defined(CONFIG_IMX_ADC_MODULE) + +static struct resource imx_adc_resources[] = { + [0] = { + .start = MXC_INT_TSC, + .end = MXC_INT_TSC, + .flags = IORESOURCE_IRQ, + }, + [1] = { + .start = TSC_BASE_ADDR, + .end = TSC_BASE_ADDR + PAGE_SIZE, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device imx_adc_device = { + .name = "imx_adc", + .id = 0, + .num_resources = ARRAY_SIZE(imx_adc_resources), + .resource = imx_adc_resources, + .dev = { + .release = NULL, + }, +}; +static void imx_init_adc(void) +{ + (void)platform_device_register(&imx_adc_device); +} +#else +static void imx_init_adc(void) +{ +} +#endif + +#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) + +static struct resource flexcan1_resources[] = { + { + .start = CAN1_BASE_ADDR, + .end = CAN1_BASE_ADDR + 0x97F, + .flags = IORESOURCE_MEM,}, + { + .start = MXC_INT_CAN1, + .end = MXC_INT_CAN1, + .flags = IORESOURCE_IRQ,} +}; +static struct resource flexcan2_resources[] = { + { + .start = CAN3_BASE_ADDR, + .end = CAN3_BASE_ADDR + 0x97F, + .flags = IORESOURCE_MEM,}, + { + .start = MXC_INT_CAN2, + .end = MXC_INT_CAN2, + .flags = IORESOURCE_IRQ,} +}; + +static struct platform_device flexcan_devices[] = { + { + .name = "FlexCAN", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &flexcan_data[0], + }, + .num_resources = ARRAY_SIZE(flexcan1_resources), + .resource = flexcan1_resources,}, + { + .name = "FlexCAN", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &flexcan_data[1], + }, + .num_resources = ARRAY_SIZE(flexcan2_resources), + .resource = flexcan2_resources,}, +}; + +static inline void mxc_init_flexcan(void) +{ +#ifdef CONFIG_FLEXCAN_MXC_SELECT1 + /* MX25 3stack doesn't use CAN1 */ + platform_device_register(&flexcan_devices[0]); +#endif + platform_device_register(&flexcan_devices[1]); +} +#else +static inline void mxc_init_flexcan(void) +{ +} +#endif + +static struct platform_device mxc_alsa_surround_device = { + .name = "imx-3stack-wm8580", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static void mxc_init_surround_audio(void) +{ + platform_device_register(&mxc_alsa_surround_device); +} + +#if defined(CONFIG_MXC_IIM) || defined(CONFIG_MXC_IIM_MODULE) +static struct resource mxc_iim_resources[] = { + { + .start = IIM_BASE_ADDR, + .end = IIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_iim_device = { + .name = "mxc_iim", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_iim_resources), + .resource = mxc_iim_resources +}; + +static inline void mxc_init_iim(void) +{ + if (platform_device_register(&mxc_iim_device) < 0) + dev_err(&mxc_iim_device.dev, + "Unable to register mxc iim device\n"); +} +#else +static inline void mxc_init_iim(void) +{ +} +#endif + +static int __init mxc_init_devices(void) +{ + mxc_init_wdt(); + mxc_init_spi(); + mxc_init_i2c(); + mxc_init_dma(); + mxc_init_ssi(); + mxc_init_surround_audio(); + mxc_init_rtc(); + imx_init_adc(); + mxc_init_flexcan(); + mxc_init_iim(); + + return 0; +} + +arch_initcall(mxc_init_devices); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mx25_pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mx25_pins.h @@ -0,0 +1,250 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX25_PINS_H__ +#define __ASM_ARCH_MXC_MX25_PINS_H__ + +/*! + * @file arch-mxc/mx25_pins.h + * + * @brief MX25 I/O Pin List + * + * @ingroup GPIO_MX25 + */ + +#ifndef __ASSEMBLY__ + +/*! + * @name IOMUX/PAD Bit field definitions + */ + +/*! @{ */ + +/*! + * In order to identify pins more effectively, each mux-controlled pin's + * enumerated value is constructed in the following way: + * + * ------------------------------------------------------------------- + * 31-29 | 28 - 24 |23 - 21| 20 - 10| 9 - 0 + * ------------------------------------------------------------------- + * IO_P | IO_I | RSVD | PAD_I | MUX_I + * ------------------------------------------------------------------- + * + * Bit 0 to 7 contains MUX_I used to identify the register + * offset (base is IOMUX_module_base ) defined in the Section + * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. Similar field + * definitions are used for the pad control register. For example, + * MX25_PIN_A14 is defined in the enumeration: + * ( 0x10 << MUX_I) | ( 0x230 << PAD_I) + * So the absolute address is: IOMUX_module_base + 0x10. + * The pad control register offset is: 0x230. + */ + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * MUX control register offset + */ +#define MUX_I 0 +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * PAD control register offset + */ +#define PAD_I 10 + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * reserved filed + */ +#define RSVD_I 21 + +#define NON_GPIO_I 0x7 +#define PIN_TO_MUX_MASK ((1<<(PAD_I - MUX_I)) - 1) +#define PIN_TO_PAD_MASK ((1<<(RSVD_I - PAD_I)) - 1) +#define NON_MUX_I PIN_TO_MUX_MASK + +#define _MXC_BUILD_PIN(gp, gi, mi, pi) \ + (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ + ((mi) << MUX_I) | ((pi) << PAD_I)) + +#define _MXC_BUILD_GPIO_PIN(gp, gi, mi, pi) \ + _MXC_BUILD_PIN(gp, gi, mi, pi) + +#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ + _MXC_BUILD_PIN(NON_GPIO_I, 0, mi, pi) + +#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) +#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) + +/*! @} End IOMUX/PAD Bit field definitions */ + +enum iomux_pins { + MX25_PIN_A10 = _MXC_BUILD_GPIO_PIN(3, 0, 0x8, 0x0), + MX25_PIN_A13 = _MXC_BUILD_GPIO_PIN(3, 1, 0x0c, 0x22C), + MX25_PIN_A14 = _MXC_BUILD_GPIO_PIN(1, 0, 0x10, 0x230), + MX25_PIN_A15 = _MXC_BUILD_GPIO_PIN(1, 1, 0x14, 0x234), + MX25_PIN_A16 = _MXC_BUILD_GPIO_PIN(1, 2, 0x18, 0x0), + MX25_PIN_A17 = _MXC_BUILD_GPIO_PIN(1, 3, 0x1c, 0x238), + MX25_PIN_A18 = _MXC_BUILD_GPIO_PIN(1, 4, 0x20, 0x23c), + MX25_PIN_A19 = _MXC_BUILD_GPIO_PIN(1, 5, 0x24, 0x240), + MX25_PIN_A20 = _MXC_BUILD_GPIO_PIN(1, 6, 0x28, 0x244), + MX25_PIN_A21 = _MXC_BUILD_GPIO_PIN(1, 7, 0x2c, 0x248), + MX25_PIN_A22 = _MXC_BUILD_GPIO_PIN(1, 8, 0x30, 0x0), + MX25_PIN_A23 = _MXC_BUILD_GPIO_PIN(1, 9, 0x34, 0x24c), + MX25_PIN_A24 = _MXC_BUILD_GPIO_PIN(1, 10, 0x38, 0x250), + MX25_PIN_A25 = _MXC_BUILD_GPIO_PIN(1, 11, 0x3c, 0x254), + MX25_PIN_EB0 = _MXC_BUILD_GPIO_PIN(1, 12, 0x40, 0x258), + MX25_PIN_EB1 = _MXC_BUILD_GPIO_PIN(1, 13, 0x44, 0x25c), + MX25_PIN_OE = _MXC_BUILD_GPIO_PIN(1, 14, 0x48, 0x260), + MX25_PIN_CS0 = _MXC_BUILD_GPIO_PIN(3, 2, 0x4c, 0x0), + MX25_PIN_CS1 = _MXC_BUILD_GPIO_PIN(3, 3, 0x50, 0x0), + MX25_PIN_CS4 = _MXC_BUILD_GPIO_PIN(2, 20, 0x54, 0x264), + MX25_PIN_CS5 = _MXC_BUILD_GPIO_PIN(2, 21, 0x58, 0x268), + MX25_PIN_NF_CE0 = _MXC_BUILD_GPIO_PIN(2, 22, 0x5c, 0x26c), + MX25_PIN_ECB = _MXC_BUILD_GPIO_PIN(2, 23, 0x60, 0x270), + MX25_PIN_LBA = _MXC_BUILD_GPIO_PIN(2, 24, 0x64, 0x274), + MX25_PIN_BCLK = _MXC_BUILD_GPIO_PIN(3, 4, 0x68, 0x0), + MX25_PIN_RW = _MXC_BUILD_GPIO_PIN(2, 25, 0x6c, 0x278), + MX25_PIN_NFWE_B = _MXC_BUILD_GPIO_PIN(2, 26, 0x70, 0x0), + MX25_PIN_NFRE_B = _MXC_BUILD_GPIO_PIN(2, 27, 0x74, 0x0), + MX25_PIN_NFALE = _MXC_BUILD_GPIO_PIN(2, 28, 0x78, 0x0), + MX25_PIN_NFCLE = _MXC_BUILD_GPIO_PIN(2, 29, 0x7c, 0x0), + MX25_PIN_NFWP_B = _MXC_BUILD_GPIO_PIN(2, 30, 0x80, 0x0), + MX25_PIN_NFRB = _MXC_BUILD_GPIO_PIN(2, 31, 0x84, 0x27c), + MX25_PIN_D15 = _MXC_BUILD_GPIO_PIN(3, 5, 0x88, 0x280), + MX25_PIN_D14 = _MXC_BUILD_GPIO_PIN(3, 6, 0x8c, 0x284), + MX25_PIN_D13 = _MXC_BUILD_GPIO_PIN(3, 7, 0x90, 0x288), + MX25_PIN_D12 = _MXC_BUILD_GPIO_PIN(3, 8, 0x94, 0x28c), + MX25_PIN_D11 = _MXC_BUILD_GPIO_PIN(3, 9, 0x98, 0x290), + MX25_PIN_D10 = _MXC_BUILD_GPIO_PIN(3, 10, 0x9c, 0x294), + MX25_PIN_D9 = _MXC_BUILD_GPIO_PIN(3, 11, 0xa0, 0x298), + MX25_PIN_D8 = _MXC_BUILD_GPIO_PIN(3, 12, 0xa4, 0x29c), + MX25_PIN_D7 = _MXC_BUILD_GPIO_PIN(3, 13, 0xa8, 0x2a0), + MX25_PIN_D6 = _MXC_BUILD_GPIO_PIN(3, 14, 0xac, 0x2a4), + MX25_PIN_D5 = _MXC_BUILD_GPIO_PIN(3, 15, 0xb0, 0x2a8), + MX25_PIN_D4 = _MXC_BUILD_GPIO_PIN(3, 16, 0xb4, 0x2ac), + MX25_PIN_D3 = _MXC_BUILD_GPIO_PIN(3, 17, 0xb8, 0x2b0), + MX25_PIN_D2 = _MXC_BUILD_GPIO_PIN(3, 18, 0xbc, 0x2b4), + MX25_PIN_D1 = _MXC_BUILD_GPIO_PIN(3, 19, 0xc0, 0x2b8), + MX25_PIN_D0 = _MXC_BUILD_GPIO_PIN(3, 20, 0xc4, 0x2bc), + MX25_PIN_LD0 = _MXC_BUILD_GPIO_PIN(1, 15, 0xc8, 0x2c0), + MX25_PIN_LD1 = _MXC_BUILD_GPIO_PIN(1, 16, 0xcc, 0x2c4), + MX25_PIN_LD2 = _MXC_BUILD_GPIO_PIN(1, 17, 0xd0, 0x2c8), + MX25_PIN_LD3 = _MXC_BUILD_GPIO_PIN(1, 18, 0xd4, 0x2cc), + MX25_PIN_LD4 = _MXC_BUILD_GPIO_PIN(1, 19, 0xd8, 0x2d0), + MX25_PIN_LD5 = _MXC_BUILD_GPIO_PIN(0, 19, 0xdc, 0x2d4), + MX25_PIN_LD6 = _MXC_BUILD_GPIO_PIN(0, 20, 0xe0, 0x2d8), + MX25_PIN_LD7 = _MXC_BUILD_GPIO_PIN(0, 21, 0xe4, 0x2dc), + MX25_PIN_LD8 = _MXC_BUILD_NON_GPIO_PIN(0xe8, 0x2e0), + MX25_PIN_LD9 = _MXC_BUILD_NON_GPIO_PIN(0xec, 0x2e4), + MX25_PIN_LD10 = _MXC_BUILD_NON_GPIO_PIN(0xf0, 0x2e8), + MX25_PIN_LD11 = _MXC_BUILD_NON_GPIO_PIN(0xf4, 0x2ec), + MX25_PIN_LD12 = _MXC_BUILD_NON_GPIO_PIN(0xf8, 0x2f0), + MX25_PIN_LD13 = _MXC_BUILD_NON_GPIO_PIN(0xfc, 0x2f4), + MX25_PIN_LD14 = _MXC_BUILD_NON_GPIO_PIN(0x100, 0x2f8), + MX25_PIN_LD15 = _MXC_BUILD_NON_GPIO_PIN(0x104, 0x2fc), + MX25_PIN_HSYNC = _MXC_BUILD_GPIO_PIN(0, 22, 0x108, 0x300), + MX25_PIN_VSYNC = _MXC_BUILD_GPIO_PIN(0, 23, 0x10c, 0x304), + MX25_PIN_LSCLK = _MXC_BUILD_GPIO_PIN(0, 24, 0x110, 0x308), + MX25_PIN_OE_ACD = _MXC_BUILD_GPIO_PIN(0, 25, 0x114, 0x30c), + MX25_PIN_CONTRAST = _MXC_BUILD_NON_GPIO_PIN(0x118, 0x310), + MX25_PIN_PWM = _MXC_BUILD_GPIO_PIN(0, 26, 0x11c, 0x314), + MX25_PIN_CSI_D2 = _MXC_BUILD_GPIO_PIN(0, 27, 0x120, 0x318), + MX25_PIN_CSI_D3 = _MXC_BUILD_GPIO_PIN(0, 28, 0x124, 0x31c), + MX25_PIN_CSI_D4 = _MXC_BUILD_GPIO_PIN(0, 29, 0x128, 0x320), + MX25_PIN_CSI_D5 = _MXC_BUILD_GPIO_PIN(0, 30, 0x12c, 0x324), + MX25_PIN_CSI_D6 = _MXC_BUILD_GPIO_PIN(0, 31, 0x130, 0x328), + MX25_PIN_CSI_D7 = _MXC_BUILD_GPIO_PIN(0, 6, 0x134, 0x32c), + MX25_PIN_CSI_D8 = _MXC_BUILD_GPIO_PIN(0, 7, 0x138, 0x330), + MX25_PIN_CSI_D9 = _MXC_BUILD_GPIO_PIN(3, 21, 0x13c, 0x334), + MX25_PIN_CSI_MCLK = _MXC_BUILD_GPIO_PIN(0, 8, 0x140, 0x338), + MX25_PIN_CSI_VSYNC = _MXC_BUILD_GPIO_PIN(0, 9, 0x144, 0x33c), + MX25_PIN_CSI_HSYNC = _MXC_BUILD_GPIO_PIN(0, 10, 0x148, 0x340), + MX25_PIN_CSI_PIXCLK = _MXC_BUILD_GPIO_PIN(0, 11, 0x14c, 0x344), + MX25_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(0, 12, 0x150, 0x348), + MX25_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(0, 13, 0x154, 0x34c), + MX25_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(0, 14, 0x158, 0x350), + MX25_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(0, 15, 0x15c, 0x354), + MX25_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(0, 16, 0x160, 0x358), + MX25_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(0, 17, 0x164, 0x35c), + MX25_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(0, 18, 0x168, 0x360), + MX25_PIN_CSPI1_RDY = _MXC_BUILD_GPIO_PIN(1, 22, 0x16c, 0x364), + MX25_PIN_UART1_RXD = _MXC_BUILD_GPIO_PIN(3, 22, 0x170, 0x368), + MX25_PIN_UART1_TXD = _MXC_BUILD_GPIO_PIN(3, 23, 0x174, 0x36c), + MX25_PIN_UART1_RTS = _MXC_BUILD_GPIO_PIN(3, 24, 0x178, 0x370), + MX25_PIN_UART1_CTS = _MXC_BUILD_GPIO_PIN(3, 25, 0x17c, 0x374), + MX25_PIN_UART2_RXD = _MXC_BUILD_GPIO_PIN(3, 26, 0x180, 0x378), + MX25_PIN_UART2_TXD = _MXC_BUILD_GPIO_PIN(3, 27, 0x184, 0x37c), + MX25_PIN_UART2_RTS = _MXC_BUILD_GPIO_PIN(3, 28, 0x188, 0x380), + MX25_PIN_UART2_CTS = _MXC_BUILD_GPIO_PIN(3, 29, 0x18c, 0x384), + MX25_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(1, 23, 0x190, 0x388), + MX25_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(1, 24, 0x194, 0x38c), + MX25_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(1, 25, 0x198, 0x390), + MX25_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(1, 26, 0x19c, 0x394), + MX25_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(1, 27, 0x1a0, 0x398), + MX25_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(1, 28, 0x1a4, 0x39c), + MX25_PIN_KPP_ROW0 = _MXC_BUILD_GPIO_PIN(1, 29, 0x1a8, 0x3a0), + MX25_PIN_KPP_ROW1 = _MXC_BUILD_GPIO_PIN(1, 30, 0x1ac, 0x3a4), + MX25_PIN_KPP_ROW2 = _MXC_BUILD_GPIO_PIN(1, 31, 0x1b0, 0x3a8), + MX25_PIN_KPP_ROW3 = _MXC_BUILD_GPIO_PIN(2, 0, 0x1b4, 0x3ac), + MX25_PIN_KPP_COL0 = _MXC_BUILD_GPIO_PIN(2, 1, 0x1b8, 0x3b0), + MX25_PIN_KPP_COL1 = _MXC_BUILD_GPIO_PIN(2, 2, 0x1bc, 0x3b4), + MX25_PIN_KPP_COL2 = _MXC_BUILD_GPIO_PIN(2, 3, 0x1c0, 0x3b8), + MX25_PIN_KPP_COL3 = _MXC_BUILD_GPIO_PIN(2, 4, 0x1c4, 0x3bc), + MX25_PIN_FEC_MDC = _MXC_BUILD_GPIO_PIN(2, 5, 0x1c8, 0x3c0), + MX25_PIN_FEC_MDIO = _MXC_BUILD_GPIO_PIN(2, 6, 0x1cc, 0x3c4), + MX25_PIN_FEC_TDATA0 = _MXC_BUILD_GPIO_PIN(2, 7, 0x1d0, 0x3c8), + MX25_PIN_FEC_TDATA1 = _MXC_BUILD_GPIO_PIN(2, 8, 0x1d4, 0x3cc), + MX25_PIN_FEC_TX_EN = _MXC_BUILD_GPIO_PIN(2, 9, 0x1d8, 0x3d0), + MX25_PIN_FEC_RDATA0 = _MXC_BUILD_GPIO_PIN(2, 10, 0x1dc, 0x3d4), + MX25_PIN_FEC_RDATA1 = _MXC_BUILD_GPIO_PIN(2, 11, 0x1e0, 0x3d8), + MX25_PIN_FEC_RX_DV = _MXC_BUILD_GPIO_PIN(2, 12, 0x1e4, 0x3dc), + MX25_PIN_FEC_TX_CLK = _MXC_BUILD_GPIO_PIN(2, 13, 0x1e8, 0x3e0), + MX25_PIN_RTCK = _MXC_BUILD_GPIO_PIN(2, 14, 0x1ec, 0x3e4), + MX25_PIN_DE_B = _MXC_BUILD_GPIO_PIN(1, 20, 0x1f0, 0x3ec), + MX25_PIN_TDO = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x3e8), + MX25_PIN_GPIO_A = _MXC_BUILD_GPIO_PIN(0, 0, 0x1f4, 0x3f0), + MX25_PIN_GPIO_B = _MXC_BUILD_GPIO_PIN(0, 1, 0x1f8, 0x3f4), + MX25_PIN_GPIO_C = _MXC_BUILD_GPIO_PIN(0, 2, 0x1fc, 0x3f8), + MX25_PIN_GPIO_D = _MXC_BUILD_GPIO_PIN(0, 3, 0x200, 0x3fc), + MX25_PIN_GPIO_E = _MXC_BUILD_GPIO_PIN(0, 4, 0x204, 0x400), + MX25_PIN_GPIO_F = _MXC_BUILD_GPIO_PIN(0, 5, 0x208, 0x404), + MX25_PIN_EXT_ARMCLK = _MXC_BUILD_GPIO_PIN(2, 15, 0x20c, 0x0), + MX25_PIN_UPLL_BYPCLK = _MXC_BUILD_GPIO_PIN(2, 16, 0x210, 0x0), + MX25_PIN_VSTBY_REQ = _MXC_BUILD_GPIO_PIN(2, 17, 0x214, 0x408), + MX25_PIN_VSTBY_ACK = _MXC_BUILD_GPIO_PIN(2, 18, 0x218, 0x40c), + MX25_PIN_POWER_FAIL = _MXC_BUILD_GPIO_PIN(2, 19, 0x21c, 0x410), + MX25_PIN_CLKO = _MXC_BUILD_GPIO_PIN(1, 21, 0x220, 0x414), + MX25_PIN_BOOT_MODE0 = _MXC_BUILD_GPIO_PIN(3, 30, 0x224, 0x0), + MX25_PIN_BOOT_MODE1 = _MXC_BUILD_GPIO_PIN(3, 31, 0x228, 0x0), + + MX25_PIN_CTL_GRP_DVS_MISC = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x418), + MX25_PIN_CTL_GRP_DSE_FEC = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x41c), + MX25_PIN_CTL_GRP_DVS_JTAG = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x420), + MX25_PIN_CTL_GRP_DSE_NFC = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x424), + MX25_PIN_CTL_GRP_DSE_CSI = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x428), + MX25_PIN_CTL_GRP_DSE_WEIM = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x42c), + MX25_PIN_CTL_GRP_DSE_DDR = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x430), + MX25_PIN_CTL_GRP_DVS_CRM = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x434), + MX25_PIN_CTL_GRP_DSE_KPP = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x438), + MX25_PIN_CTL_GRP_DSE_SDHC1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x43c), + MX25_PIN_CTL_GRP_DSE_LCD = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x440), + MX25_PIN_CTL_GRP_DSE_UART = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x444), + MX25_PIN_CTL_GRP_DVS_NFC = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x448), + MX25_PIN_CTL_GRP_DVS_CSI = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x44c), + MX25_PIN_CTL_GRP_DSE_CSPI1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x450), + MX25_PIN_CTL_GRP_DDRTYPE = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x454), + MX25_PIN_CTL_GRP_DVS_SDHC1 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x458), + MX25_PIN_CTL_GRP_DVS_LCD = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x45c) +}; + +#endif +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/sdma_script_code.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/sdma_script_code.h @@ -0,0 +1,159 @@ + +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/************************************************************************ + + SDMA RELEASE LABEL: "SS15_SENNA" + +************************************************************************/ + +#ifndef SDMA_SCRIPT_CODE_H +#define SDMA_SCRIPT_CODE_H + +/*! + * SDMA ROM scripts start addresses and sizes + */ +#define start_ADDR 0 +#define start_SIZE 22 + +#define core_ADDR 80 +#define core_SIZE 233 + +#define common_ADDR 313 +#define common_SIZE 416 + +#define ap_2_ap_ADDR 729 +#define ap_2_ap_SIZE 41 + +#define app_2_mcu_ADDR 770 +#define app_2_mcu_SIZE 64 + +#define mcu_2_app_ADDR 834 +#define mcu_2_app_SIZE 70 + +#define uart_2_mcu_ADDR 904 +#define uart_2_mcu_SIZE 75 + +#define shp_2_mcu_ADDR 979 +#define shp_2_mcu_SIZE 69 + +#define mcu_2_shp_ADDR 1048 +#define mcu_2_shp_SIZE 72 + +#define uartsh_2_mcu_ADDR 1120 +#define uartsh_2_mcu_SIZE 69 + +#define app_2_per_ADDR 1189 +#define app_2_per_SIZE 66 + +#define per_2_app_ADDR 1255 +#define per_2_app_SIZE 74 + +#define per_2_shp_ADDR 1329 +#define per_2_shp_SIZE 78 + +#define shp_2_per_ADDR 1407 +#define shp_2_per_SIZE 72 + +#define mcu_2_ata_ADDR 1479 +#define mcu_2_ata_SIZE 81 + +#define ata_2_mcu_ADDR 1560 +#define ata_2_mcu_SIZE 96 + +#define loop_DMAs_routines_ADDR 1656 +#define loop_DMAs_routines_SIZE 227 + +#define test_ADDR 1883 +#define test_SIZE 63 + +#define signature_ADDR 1022 +#define signature_SIZE 1 + +/*! + * SDMA RAM scripts start addresses and sizes + */ +#define ext_mem__ipu_ram_ADDR 6144 +#define ext_mem__ipu_ram_SIZE 123 + +#define uart_2_per_ADDR 6267 +#define uart_2_per_SIZE 73 + +#define uartsh_2_per_ADDR 6340 +#define uartsh_2_per_SIZE 67 + +/*! + * SDMA RAM image start address and size + */ +#define RAM_CODE_START_ADDR 6144 +#define RAM_CODE_SIZE 263 + +/*! + * Buffer that holds the SDMA RAM image + */ +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static const short sdma_code[] = { + 0x0e70, 0x0611, 0x5616, 0xc18a, 0x7d2a, 0x5ade, 0x008e, 0xc19c, + 0x7c26, 0x5be0, 0x5ef0, 0x5ce8, 0x0688, 0x08ff, 0x0011, 0x28ff, + 0x00bc, 0x53f6, 0x05df, 0x7d0b, 0x6dc5, 0x03df, 0x7d03, 0x6bd5, + 0xd84f, 0x982b, 0x6b05, 0xc6d8, 0x7e27, 0x7f29, 0x982b, 0x6d01, + 0x03df, 0x7d05, 0x6bd5, 0xc702, 0x7e18, 0x7f1a, 0x982b, 0x6b05, + 0xc678, 0x7e07, 0x7f06, 0x52de, 0x53e6, 0xc1a8, 0x7dd7, 0x0200, + 0x9803, 0x0007, 0x6004, 0x680c, 0x53f6, 0x028e, 0x00a3, 0xc2ad, + 0x048b, 0x0498, 0x0454, 0x068a, 0x982b, 0x0207, 0x680c, 0x6ddf, + 0x0107, 0x68ff, 0x60d0, 0x9834, 0x0207, 0x68ff, 0x6d28, 0x0107, + 0x6004, 0x680c, 0x9834, 0x0007, 0x68ff, 0x60d0, 0x9834, 0x0288, + 0x03a5, 0x3b03, 0x3d03, 0x4d00, 0x7d0a, 0x0804, 0x00a5, 0x00da, + 0x7d1a, 0x02a0, 0x7b01, 0x65d8, 0x7eee, 0x65ff, 0x7eec, 0x0804, + 0x02d0, 0x7d11, 0x4b00, 0x7c0f, 0x008a, 0x3003, 0x6dcf, 0x6bdf, + 0x0015, 0x0015, 0x7b02, 0x65d8, 0x0000, 0x7edd, 0x63ff, 0x7edb, + 0x3a03, 0x6dcd, 0x6bdd, 0x008a, 0x7b02, 0x65d8, 0x0000, 0x7ed3, + 0x65ff, 0x7ed1, 0x0006, 0xc23a, 0x57db, 0x52f3, 0x6ad5, 0x56fb, + 0x028e, 0x1a94, 0x6ac3, 0x62c8, 0x0269, 0x7d1e, 0x1e94, 0x6ee3, + 0x62d0, 0x5aeb, 0x62c8, 0x0248, 0x6ed3, 0x6ac8, 0x2694, 0x52eb, + 0x6ad5, 0x6ee3, 0x62c8, 0x026e, 0x7d27, 0x6ac8, 0x7f23, 0x2501, + 0x4d00, 0x7d26, 0x028e, 0x1a98, 0x6ac3, 0x62c8, 0x6ec3, 0x0260, + 0x7df1, 0x62d0, 0xc2d1, 0x98c0, 0x6ee3, 0x008f, 0x2001, 0x00d5, + 0x7d01, 0x008d, 0x05a0, 0x62c8, 0x026e, 0x7d0e, 0x6ac8, 0x7f0a, + 0x2001, 0x7cf9, 0x6add, 0x7f06, 0x0000, 0x4d00, 0x7d09, 0xc251, + 0x57db, 0x987f, 0x0007, 0x6aff, 0x62d0, 0xc2d1, 0x0458, 0x0454, + 0x6add, 0x7ff8, 0xc261, 0x987c, 0xc230, 0xc23a, 0x57db, 0x52f3, + 0x6ad5, 0x56fb, 0x028e, 0x1a94, 0x5202, 0x0269, 0x7d17, 0x1e94, + 0x5206, 0x0248, 0x5a06, 0x2694, 0x5206, 0x026e, 0x7d26, 0x6ac8, + 0x7f22, 0x2501, 0x4d00, 0x7d27, 0x028e, 0x1a98, 0x5202, 0x0260, + 0x7df3, 0x6add, 0x7f18, 0x62d0, 0xc2d1, 0x9903, 0x008f, 0x2001, + 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5206, 0x026e, 0x7d0e, 0x6ac8, + 0x7f0a, 0x2001, 0x7cf9, 0x6add, 0x7f06, 0x0000, 0x4d00, 0x7d0b, + 0xc251, 0x57db, 0x98c9, 0x0007, 0x6aff, 0x6add, 0x7ffc, 0x62d0, + 0xc2d1, 0x0458, 0x0454, 0x6add, 0x7ff6, 0xc261, 0x98c6 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/Makefile.boot +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x80008000 +params_phys-y := 0x80000100 +initrd_phys-y := 0x80800000 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/board-mx25_3stack.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/board-mx25_3stack.h @@ -0,0 +1,173 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX25_3STACK_H__ +#define __ASM_ARCH_MXC_BOARD_MX25_3STACK_H__ + +#ifdef CONFIG_MACH_MX25_3DS + +/*! + * @defgroup BRDCFG_MX25 Board Configuration Options + * @ingroup MSL_MX25 + */ + +/*! + * @file mach-mx25/board-mx25_3stack.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX25 3STACK Platform. + * + * @ingroup BRDCFG_MX25 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART board-level configurations + */ +/*! @{ */ +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR NO_IRDA +#define UART2_ENABLED 1 + +/* UART 3 configuration */ +#define UART3_MODE MODE_DTE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 0 + +/* UART 4 configuration */ +#define UART4_MODE MODE_DTE +#define UART4_IR NO_IRDA +#define UART4_ENABLED 0 + +/* UART 5 configuration */ +#define UART5_MODE MODE_DTE +#define UART5_IR NO_IRDA +#define UART5_ENABLED 0 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +/*! + * @name debug board parameters + */ +/*! @{ */ +/*! + * Base address of debug board + */ +#define DEBUG_BASE_ADDRESS 0x78000000 /* Use a dummy base address */ + +/* External ethernet LAN9217 base address */ +#define LAN9217_BASE_ADDR DEBUG_BASE_ADDRESS + +/* External UART */ +#define UARTA_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x08000) +#define UARTB_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x10000) + +#define BOARD_IO_ADDR 0x20000 + +/* LED switchs */ +#define LED_SWITCH_REG (BOARD_IO_ADDR + 0x00) +/* buttons */ +#define SWITCH_BUTTON_REG (BOARD_IO_ADDR + 0x08) +/* status, interrupt */ +#define INTR_STATUS_REG (BOARD_IO_ADDR + 0x10) +#define INTR_RESET_REG (BOARD_IO_ADDR + 0x20) +/*CPLD configuration*/ +#define CONFIG1_REG (BOARD_IO_ADDR + 0x28) +#define CONFIG2_REG (BOARD_IO_ADDR + 0x30) +/*interrupt mask */ +#define INTR_MASK_REG (BOARD_IO_ADDR + 0x38) + +/* magic word for debug CPLD */ +#define MAGIC_NUMBER1_REG (BOARD_IO_ADDR + 0x40) +#define MAGIC_NUMBER2_REG (BOARD_IO_ADDR + 0x48) +/* CPLD code version */ +#define CPLD_CODE_VER_REG (BOARD_IO_ADDR + 0x50) +/* magic word for debug CPLD */ +#define MAGIC3_NUMBER3_REG (BOARD_IO_ADDR + 0x58) +/* module reset register*/ +#define CONTROL_REG (BOARD_IO_ADDR + 0x60) +/* CPU ID and Personality ID*/ +#define IDENT_REG (BOARD_IO_ADDR + 0x68) + +/* For interrupts like xuart, enet etc */ +#define EXPIO_PARENT_INT MX25_PIN_GPIO1_1 + +#define EXPIO_INT_ENET_INT (MXC_BOARD_IRQ_START + 0) +#define EXPIO_INT_XUARTA_INT (MXC_BOARD_IRQ_START + 1) +#define EXPIO_INT_XUARTB_INT (MXC_BOARD_IRQ_START + 2) + +/*! This is System IRQ used by LAN9217 for interrupt generation taken + * from platform.h + */ +#define LAN9217_IRQ EXPIO_INT_ENET_INT + +/*! This is base virtual address of debug board*/ +extern unsigned int mx25_3stack_board_io; + +#define MXC_BD_LED1 (1 << 0) +#define MXC_BD_LED2 (1 << 1) +#define MXC_BD_LED3 (1 << 2) +#define MXC_BD_LED4 (1 << 3) +#define MXC_BD_LED5 (1 << 4) +#define MXC_BD_LED6 (1 << 5) +#define MXC_BD_LED7 (1 << 6) +#define MXC_BD_LED8 (1 << 7) +#define MXC_BD_LED_ON(led) +#define MXC_BD_LED_OFF(led) + +#define MXC_DEFAULT_INTENSITY 127 +#define MXC_INTENSITY_OFF 0 + +/*! @} */ + +extern void mx25_3stack_gpio_init(void) __init; +extern int headphone_det_status(void); +extern void sgtl5000_enable_amp(void); +extern unsigned int sdhc_get_card_det_status(struct device *dev); +extern int sdhc_write_protect(struct device *dev); +extern void gpio_can_active(int id); +extern void gpio_can_inactive(int id); +extern struct flexcan_platform_data flexcan_data[]; +extern void mx2fb_set_brightness(uint8_t); +extern int __init mx25_3stack_init_mc34704(void); + +#endif /* CONFIG_MACH_MX25_3DS */ +#endif /* __ASM_ARCH_MXC_BOARD_MX25_3STACK_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/Kconfig @@ -0,0 +1,96 @@ +menu "MX25 Options" + depends on ARCH_MX25 + +config MX25_OPTIONS + bool + default y + select CPU_ARM926T + select USB_ARCH_HAS_EHCI + +config MACH_MX25_3DS + bool "Support MX25 3STACK platforms" + default y + help + Include support for MX25 3STACK platform. This includes specific + configurations for the board and its peripherals. + +config MX25_DOZE_DURING_IDLE + bool "Enter Doze mode during idle" + help + Turning on this option will put the CPU into Doze mode during idle. + The default is to enter Wait mode during idle. Doze mode during + idle will save additional power over Wait mode. + +config MXC_SDMA_API + bool "Use SDMA API" + default y + help + This selects the Freescale MXC SDMA API. + If unsure, say N. + +menu "SDMA options" + depends on MXC_SDMA_API + +config SDMA_IRAM + bool "Use Internal RAM for SDMA transfer" + default n + help + Support Internal RAM as SDMA buffer or control structures + +config SDMA_IRAM_SIZE + hex "Reserved bytes of IRAM for SDMA (0x800-0x1000)" + range 0x800 0x1000 + depends on SDMA_IRAM + default "0x1000" + help + Set the size of IRAM for SDMA. It must be a multiple of 512bytes. +endmenu + +config ARCH_MXC_HAS_NFC_V2 + bool "MXC NFC Hardware Version 2" + depends on ARCH_MX25 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 2 + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V2_1 + bool "MXC NFC Hardware Version 2.1" + depends on ARCH_MXC_HAS_NFC_V2 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 2.1 + If unsure, say N. + +menu "Device options" + +config I2C_MXC_SELECT1 + bool "Enable I2C1 module" + default y + depends on I2C_MXC + help + Enable MX25 I2C1 module. + +config I2C_MXC_SELECT2 + bool "Enable I2C2 module" + default n + depends on I2C_MXC + help + Enable MX25 I2C2 module. + +config I2C_MXC_SELECT3 + bool "Enable I2C3 module" + default n + depends on I2C_MXC + help + Enable MX25 I2C3 module. + +config FLEXCAN_MXC_SELECT1 + bool "Enable FlexCAN1 module" + depends on CAN_FLEXCAN + help + Enable MX25 FlexCAN1 module. + +endmenu + +endmenu --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/dma.c @@ -0,0 +1,663 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include + +#include "serial.h" + +#ifdef CONFIG_SND_MXC_SOC_IRAM +#define soc_trans_type int_2_per +#else +#define soc_trans_type emi_2_per +#endif + +#define MXC_SSI_TX0_REG 0x0 +#define MXC_SSI_TX1_REG 0x4 +#define MXC_SSI_RX0_REG 0x8 +#define MXC_SSI_RX1_REG 0xC +#define MXC_SSI_TXFIFO_WML 0x4 +#define MXC_SSI_RXFIFO_WML 0x6 + +#define MXC_ESAI_TX_REG 0x00 +#define MXC_ESAI_RX_REG 0x04 +#define MXC_ESAI_FIFO_WML 0x40 + +struct mxc_sdma_info_entry_s { + mxc_dma_device_t device; + mxc_sdma_channel_params_t *chnl_info; +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_rx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_RXTL, + .per_address = UART1_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART1_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_tx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_TXTL, + .per_address = UART1_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART1_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_rx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_RXTL, + .per_address = UART2_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART2_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_tx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_TXTL, + .per_address = UART2_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART2_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_rx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_RXTL, + .per_address = UART3_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART3_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_tx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_TXTL, + .per_address = UART3_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART3_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart4_rx_params = { + .chnl_params = { + .watermark_level = UART4_UFCR_RXTL, + .per_address = UART4_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART4_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART4_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart4_tx_params = { + .chnl_params = { + .watermark_level = UART4_UFCR_TXTL, + .per_address = UART4_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART4_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART4_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart5_rx_params = { + .chnl_params = { + .watermark_level = UART5_UFCR_RXTL, + .per_address = UART5_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART5_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART5_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart5_tx_params = { + .chnl_params = { + .watermark_level = UART5_UFCR_TXTL, + .per_address = UART5_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART5_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART5_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX0, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX0, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX0, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX0, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX0, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX0, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX0, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX0, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX0, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX0, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX0, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX0, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_memory_params = { + .chnl_params = { + .peripheral_type = MEMORY, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_16bit_rx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_RX_REG, + .peripheral_type = ESAI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ESAI_RX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_16bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ESAI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_ESAI_TX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_24bit_rx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_RX_REG, + .peripheral_type = ESAI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ESAI_RX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_esai_24bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_ESAI_FIFO_WML, + .per_address = ESAI_BASE_ADDR + MXC_ESAI_TX_REG, + .peripheral_type = ESAI, + .transfer_type = soc_trans_type, + .event_id = DMA_REQ_ESAI_TX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ESAI_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static struct mxc_sdma_info_entry_s mxc_sdma_active_dma_info[] = { + {MXC_DMA_UART1_RX, &mxc_sdma_uart1_rx_params}, + {MXC_DMA_UART1_TX, &mxc_sdma_uart1_tx_params}, + {MXC_DMA_UART2_RX, &mxc_sdma_uart2_rx_params}, + {MXC_DMA_UART2_TX, &mxc_sdma_uart2_tx_params}, + {MXC_DMA_UART3_RX, &mxc_sdma_uart3_rx_params}, + {MXC_DMA_UART3_TX, &mxc_sdma_uart3_tx_params}, + {MXC_DMA_UART4_RX, &mxc_sdma_uart4_rx_params}, + {MXC_DMA_UART4_TX, &mxc_sdma_uart4_tx_params}, + {MXC_DMA_UART5_RX, &mxc_sdma_uart5_rx_params}, + {MXC_DMA_UART5_TX, &mxc_sdma_uart5_tx_params}, + {MXC_DMA_SSI1_8BIT_RX0, &mxc_sdma_ssi1_8bit_rx0_params}, + {MXC_DMA_SSI1_8BIT_TX0, &mxc_sdma_ssi1_8bit_tx0_params}, + {MXC_DMA_SSI1_16BIT_RX0, &mxc_sdma_ssi1_16bit_rx0_params}, + {MXC_DMA_SSI1_16BIT_TX0, &mxc_sdma_ssi1_16bit_tx0_params}, + {MXC_DMA_SSI1_24BIT_RX0, &mxc_sdma_ssi1_24bit_rx0_params}, + {MXC_DMA_SSI1_24BIT_TX0, &mxc_sdma_ssi1_24bit_tx0_params}, + {MXC_DMA_SSI1_8BIT_RX1, &mxc_sdma_ssi1_8bit_rx1_params}, + {MXC_DMA_SSI1_8BIT_TX1, &mxc_sdma_ssi1_8bit_tx1_params}, + {MXC_DMA_SSI1_16BIT_RX1, &mxc_sdma_ssi1_16bit_rx1_params}, + {MXC_DMA_SSI1_16BIT_TX1, &mxc_sdma_ssi1_16bit_tx1_params}, + {MXC_DMA_SSI1_24BIT_RX1, &mxc_sdma_ssi1_24bit_rx1_params}, + {MXC_DMA_SSI1_24BIT_TX1, &mxc_sdma_ssi1_24bit_tx1_params}, + {MXC_DMA_SSI2_8BIT_RX0, &mxc_sdma_ssi2_8bit_rx0_params}, + {MXC_DMA_SSI2_8BIT_TX0, &mxc_sdma_ssi2_8bit_tx0_params}, + {MXC_DMA_SSI2_16BIT_RX0, &mxc_sdma_ssi2_16bit_rx0_params}, + {MXC_DMA_SSI2_16BIT_TX0, &mxc_sdma_ssi2_16bit_tx0_params}, + {MXC_DMA_SSI2_24BIT_RX0, &mxc_sdma_ssi2_24bit_rx0_params}, + {MXC_DMA_SSI2_24BIT_TX0, &mxc_sdma_ssi2_24bit_tx0_params}, + {MXC_DMA_SSI2_8BIT_RX1, &mxc_sdma_ssi2_8bit_rx1_params}, + {MXC_DMA_SSI2_8BIT_TX1, &mxc_sdma_ssi2_8bit_tx1_params}, + {MXC_DMA_SSI2_16BIT_RX1, &mxc_sdma_ssi2_16bit_rx1_params}, + {MXC_DMA_SSI2_16BIT_TX1, &mxc_sdma_ssi2_16bit_tx1_params}, + {MXC_DMA_SSI2_24BIT_RX1, &mxc_sdma_ssi2_24bit_rx1_params}, + {MXC_DMA_SSI2_24BIT_TX1, &mxc_sdma_ssi2_24bit_tx1_params}, + {MXC_DMA_ESAI_16BIT_RX, &mxc_sdma_esai_16bit_rx_params}, + {MXC_DMA_ESAI_16BIT_TX, &mxc_sdma_esai_16bit_tx_params}, + {MXC_DMA_ESAI_24BIT_RX, &mxc_sdma_esai_24bit_rx_params}, + {MXC_DMA_ESAI_24BIT_TX, &mxc_sdma_esai_24bit_tx_params}, + {MXC_DMA_MEMORY, &mxc_sdma_memory_params}, +}; + +static int mxc_sdma_info_entrys = + sizeof(mxc_sdma_active_dma_info) / sizeof(mxc_sdma_active_dma_info[0]); +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id) +{ + struct mxc_sdma_info_entry_s *p = mxc_sdma_active_dma_info; + int i; + + for (i = 0; i < mxc_sdma_info_entrys; i++, p++) { + if (p->device == channel_id) + return p->chnl_info; + } + return NULL; +} +EXPORT_SYMBOL(mxc_sdma_get_channel_params); + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t *chnl) +{ +#ifdef CONFIG_SDMA_IRAM + int i; + for (i = MXC_DMA_CHANNEL_IRAM; i < MAX_DMA_CHANNELS; i++) + chnl[i].dynamic = 0; +#endif +} +EXPORT_SYMBOL(mxc_get_static_channels); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/usb.h @@ -0,0 +1,103 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbotg_utmi_active(void); +extern void gpio_usbotg_utmi_inactive(void); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, + struct fsl_usb2_platform_data + *config); + +extern int fsl_usb_host_init(struct platform_device *pdev); +extern void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbh2_active(void); +extern void gpio_usbh2_inactive(void); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config; +#define PDATA (&dr_utmi_config) + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/pm.c @@ -0,0 +1,103 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX25 i.MX25 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx25/pm.c + * @brief This file contains suspend operations + * + * @ingroup MSL_MX25 + */ +static unsigned int cgcr0, cgcr1, cgcr2; + +static int mx25_suspend_enter(suspend_state_t state) +{ + unsigned int reg; + + switch (state) { + case PM_SUSPEND_MEM: + mxc_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mxc_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + break; + default: + return -EINVAL; + } + /* Executing CP15 (Wait-for-Interrupt) Instruction */ + cpu_do_idle(); + + reg = (__raw_readl(MXC_CCM_CGCR0) & ~MXC_CCM_CGCR0_STOP_MODE_MASK) | + cgcr0; + __raw_writel(reg, MXC_CCM_CGCR0); + + reg = (__raw_readl(MXC_CCM_CGCR1) & ~MXC_CCM_CGCR1_STOP_MODE_MASK) | + cgcr1; + __raw_writel(reg, MXC_CCM_CGCR1); + + reg = (__raw_readl(MXC_CCM_CGCR2) & ~MXC_CCM_CGCR2_STOP_MODE_MASK) | + cgcr2; + __raw_writel(reg, MXC_CCM_CGCR2); + + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int mx25_suspend_prepare(void) +{ + cgcr0 = __raw_readl(MXC_CCM_CGCR0) & MXC_CCM_CGCR0_STOP_MODE_MASK; + cgcr1 = __raw_readl(MXC_CCM_CGCR1) & MXC_CCM_CGCR1_STOP_MODE_MASK; + cgcr2 = __raw_readl(MXC_CCM_CGCR2) & MXC_CCM_CGCR2_STOP_MODE_MASK; + + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static void mx25_suspend_finish(void) +{ +} + +static int mx25_pm_valid(suspend_state_t state) +{ + return state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX; +} + +struct platform_suspend_ops mx25_suspend_ops = { + .valid = mx25_pm_valid, + .prepare = mx25_suspend_prepare, + .enter = mx25_suspend_enter, + .finish = mx25_suspend_finish, +}; + +static int __init mx25_pm_init(void) +{ + pr_info("Static Power Management for Freescale i.MX25\n"); + suspend_set_ops(&mx25_suspend_ops); + + return 0; +} + +late_initcall(mx25_pm_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/cpu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/cpu.c @@ -0,0 +1,60 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mach-mx25/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX25 + */ + +#include +#include +#include +#include +#include + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + if (!system_rev) + mxc_set_system_rev(0x25, CHIP_REV_1_0); +} + +static int __init post_cpu_init(void) +{ + void __iomem *base; + unsigned int reg; + + base = IO_ADDRESS(AIPS1_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + base = IO_ADDRESS(AIPS2_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + return 0; +} +postcore_initcall(post_cpu_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mx25_3stack_cpld.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mx25_3stack_cpld.c @@ -0,0 +1,246 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include "board-mx25_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx25/mx25_3stack_cpld.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX25 + */ + +extern int mxc_spi_poll_transfer(struct spi_device *spi, + struct spi_transfer *t); +static int __init mxc_expio_init(void); + +struct spi_device *cpld_spi; + +/*! + * This function is used to tranfer data to CPLD regs over CSPI + */ +static inline int mx25_3ds_cpld_rw(u8 *buf, size_t len) +{ + struct spi_transfer t = { + .tx_buf = (const void *)buf, + .rx_buf = buf, + .len = len, + .cs_change = 0, + .delay_usecs = 0, + }; + + if (!cpld_spi) + return -1; + + mxc_spi_poll_transfer(cpld_spi, &t); + return 0; +} + +/*! + * This function is called to read a CPLD register over CSPI. + * + * @param offset number of the cpld register to be read + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int spi_cpld_read(unsigned int offset) +{ + unsigned int frame[2]; + unsigned int reg_num = offset >> 1; + unsigned int data = 0; + + frame[0] = (1 << 13) | ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | 0x0200001f); + mx25_3ds_cpld_rw((u8 *) frame, 2); + data = (frame[1] >> 6) & 0xFFFF; + + reg_num = (offset + 2) >> 1; + frame[0] = (1 << 13) | ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | 0x0200001f); + mx25_3ds_cpld_rw((u8 *) frame, 2); + + data |= (((frame[1] >> 6) & 0xFFFF) << 16); + return data; +} +EXPORT_SYMBOL(spi_cpld_read); + +/*! + * This function is called to write to a CPLD register over CSPI. + * + * @param offset number of the cpld register to be written + * @param reg_val value to be written + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int spi_cpld_write(unsigned int offset, unsigned int reg_val) +{ + unsigned int frame[2] = { 0, 0 }; + unsigned int reg_num = offset >> 1; + unsigned int data = reg_val; + + frame[0] = ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | + ((data & 0x0000FFFF) << 6) | 0x03C00027); + mx25_3ds_cpld_rw((u8 *) frame, 2); + + reg_num = (offset + 2) >> 1; + data = reg_val >> 16; + frame[0] = 0; + frame[1] = 0; + frame[0] = ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | + ((data & 0x0000FFFF) << 6) | 0x03C00027); + + mx25_3ds_cpld_rw((u8 *) frame, 2); + + return 0; +} +EXPORT_SYMBOL(spi_cpld_write); + +static int __init mx25_3ds_cpld_probe(struct spi_device *spi) +{ + unsigned int i = 0; + + spi->bits_per_word = 46; + cpld_spi = spi; + + spi_setup(spi); + i = spi_cpld_read(CPLD_CODE_VER_REG); + pr_info("3-Stack Debug board detected, rev = 0x%04X\n", i); + spi_cpld_write(LED_SWITCH_REG, 0xFF); + + /* disable the interrupt and clear the status */ + spi_cpld_write(INTR_MASK_REG, 0); + spi_cpld_write(INTR_RESET_REG, 0xFFFF); + spi_cpld_write(INTR_RESET_REG, 0); + spi_cpld_write(INTR_MASK_REG, 0x1E); + + mxc_expio_init(); + return 0; +} + +/*! + * This structure contains pointers to the CPLD callback functions. + */ +static struct spi_driver mx25_3ds_cpld_driver = { + .driver = { + .name = "cpld_spi", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = mx25_3ds_cpld_probe, +}; + +static int __init mx25_3ds_cpld_init(void) +{ + pr_info("Registering the CPLD Driver\n"); + return spi_register_driver(&mx25_3ds_cpld_driver); +} +device_initcall(mx25_3ds_cpld_init); + +static int __initdata is_dbg_removed = { 0 }; +static int __init remove_dbg_setup(char *__unused) +{ + is_dbg_removed = 1; + return 0; +} +__setup("remove_dbg", remove_dbg_setup); + +static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 expio_irq; + struct irq_desc *d; + + desc->chip->mask(irq); /* irq = gpio irq number */ + + expio_irq = MXC_BOARD_IRQ_START; + + d = irq_desc + expio_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nEXPIO irq: %d unhandled\n", expio_irq); + BUG(); /* oops */ + } + d->handle_irq(expio_irq, d); + + desc->chip->ack(irq); + desc->chip->unmask(irq); +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + /* clear the interrupt status */ + spi_cpld_write(INTR_RESET_REG, 1); + spi_cpld_write(INTR_RESET_REG, 0); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static int __init mxc_expio_init(void) +{ + int i; + + if (is_dbg_removed) + return 0; + + /* + * Configure INT line as GPIO input + */ + mxc_request_iomux(MX25_PIN_PWM, MUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX25_PIN_PWM, PAD_CTL_PUE_PUD); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_PWM), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX25_PIN_PWM)); + + for (i = MXC_BOARD_IRQ_START; i < (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS); + i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(IOMUX_TO_IRQ(MX25_PIN_PWM), IRQF_TRIGGER_LOW); + set_irq_chained_handler(IOMUX_TO_IRQ(MX25_PIN_PWM), + mxc_expio_irq_handler); + + return 0; +} + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mx25_3stack_pmic_mc34704.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mx25_3stack_pmic_mc34704.c @@ -0,0 +1,147 @@ +/* + * mx25-3stack-pmic-mc34704.c -- i.MX25 3STACK Driver for MC34704 PMIC + */ + /* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +struct mc34704; + +static struct regulator_consumer_supply rcpu_consumers[] = { + { + /* sgtl5000 */ + .supply = "VDDA", + .dev_name = "0-000a", + }, +}; + +static struct regulator_consumer_supply rddr_consumers[] = { + { + /* sgtl5000 */ + .supply = "VDDIO", + .dev_name = "0-000a", + }, +}; + +static struct regulator_init_data rbklt_init = { + .constraints = { + .name = "REG1_BKLT", + .min_uV = + mV_to_uV(REG1_V_MV * (1000 + REG1_DVS_MIN_PCT * 10) / + 1000), + .max_uV = + mV_to_uV(REG1_V_MV * (1000 + REG1_DVS_MAX_PCT * 10) / + 1000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data rcpu_init = { + .constraints = { + .name = "REG2_CPU", + .min_uV = + mV_to_uV(REG2_V_MV * (1000 + REG2_DVS_MIN_PCT * 10) / + 1000), + .max_uV = + mV_to_uV(REG2_V_MV * (1000 + REG2_DVS_MAX_PCT * 10) / + 1000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(rcpu_consumers), + .consumer_supplies = rcpu_consumers, +}; + +static struct regulator_init_data rcore_init = { + .constraints = { + .name = "REG3_CORE", + .min_uV = + mV_to_uV(REG3_V_MV * (1000 + REG3_DVS_MIN_PCT * 10) / + 1000), + .max_uV = + mV_to_uV(REG3_V_MV * (1000 + REG3_DVS_MAX_PCT * 10) / + 1000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data rddr_init = { + .constraints = { + .name = "REG4_DDR", + .min_uV = + mV_to_uV(REG4_V_MV * (1000 + REG4_DVS_MIN_PCT * 10) / + 1000), + .max_uV = + mV_to_uV(REG4_V_MV * (1000 + REG4_DVS_MAX_PCT * 10) / + 1000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(rddr_consumers), + .consumer_supplies = rddr_consumers, +}; + +static struct regulator_init_data rpers_init = { + .constraints = { + .name = "REG5_PERS", + .min_uV = + mV_to_uV(REG5_V_MV * (1000 + REG5_DVS_MIN_PCT * 10) / + 1000), + .max_uV = + mV_to_uV(REG5_V_MV * (1000 + REG5_DVS_MAX_PCT * 10) / + 1000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static int mc34704_regulator_init(struct mc34704 *mc34704) +{ + mc34704_register_regulator(mc34704, MC34704_BKLT, &rbklt_init); + mc34704_register_regulator(mc34704, MC34704_CPU, &rcpu_init); + mc34704_register_regulator(mc34704, MC34704_CORE, &rcore_init); + mc34704_register_regulator(mc34704, MC34704_DDR, &rddr_init); + mc34704_register_regulator(mc34704, MC34704_PERS, &rpers_init); + + return 0; +} + +static struct mc34704_platform_data mc34704_plat = { + .init = mc34704_regulator_init, +}; + +static struct i2c_board_info __initdata mc34704_i2c_device = { + .type = "mc34704", + .addr = 0x54, + .platform_data = &mc34704_plat, +}; + +int __init mx25_3stack_init_mc34704(void) +{ + return i2c_register_board_info(0, &mc34704_i2c_device, 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mm.c @@ -0,0 +1,82 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +/*! + * @file mach-mx25/mm.c + * + * @brief This file creates static mapping between physical to virtual memory. + * + * @ingroup Memory_MX25 + */ + +/*! + * This structure defines the MX25 memory map. + */ +static struct map_desc mx25_io_desc[] __initdata = { + { + .virtual = IRAM_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(IRAM_BASE_ADDR), + .length = IRAM_SIZE, + .type = MT_DEVICE}, + { + .virtual = X_MEMC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), + .length = X_MEMC_SIZE, + .type = MT_DEVICE}, + { + .virtual = NFC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(NFC_BASE_ADDR), + .length = NFC_SIZE, + .type = MT_DEVICE}, + { + .virtual = ROMP_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(ROMP_BASE_ADDR), + .length = ROMP_SIZE, + .type = MT_DEVICE}, + { + .virtual = ASIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(ASIC_BASE_ADDR), + .length = ASIC_SIZE, + .type = MT_DEVICE}, + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE}, + { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE}, + { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE}, +}; + +/*! + * This function initializes the memory map. It is called during the + * system startup to create static physical to virtual memory map for + * the IO modules. + */ +void __init mx25_map_io(void) +{ + iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc)); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/Makefile @@ -0,0 +1,18 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := system.o iomux.o cpu.o mm.o clock.o bus_freq.o devices.o serial.o +obj-$(CONFIG_MXC_SDMA_API) += dma.o +obj-$(CONFIG_SPI_MXC) += mx25_3stack_cpld.o +obj-$(CONFIG_MACH_MX25_3DS) += mx25_3stack.o mx25_3stack_gpio.o mx25_3stack_pmic_mc34704.o + +obj-$(CONFIG_USB_EHCI_ARC_H2) += usb_h2.o + +obj-$(CONFIG_PM) += pm.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/system.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/system.c @@ -0,0 +1,151 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX25 i.MX25 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx25/system.c + * @brief This file contains idle and reset functions. + * + * @ingroup MSL_MX25 + */ + +/*! + * MX25 low-power mode + */ +enum mx25_low_pwr_mode { + MX25_RUN_MODE, + MX25_WAIT_MODE, + MX25_DOZE_MODE, + MX25_STOP_MODE +}; + +extern int mxc_jtag_enabled; + +/*! + * This function is used to set cpu low power mode before WFI instruction + * + * @param mode indicates different kinds of power modes + */ +void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode) +{ + unsigned int lpm; + unsigned long reg; + unsigned int pmcr2, lpimr; + unsigned int cgcr0, cgcr1, cgcr2; + struct irq_desc *desc; + int i; + + /*read CCTL value */ + reg = __raw_readl(MXC_CCM_CCTL); + + switch (mode) { + case WAIT_UNCLOCKED_POWER_OFF: + lpm = MX25_DOZE_MODE; + break; + + case STOP_POWER_ON: + case STOP_POWER_OFF: + lpm = MX25_STOP_MODE; + /* The clock of LCDC/SLCDC, SDMA, RTIC, RNGC, MAX, CAN + and EMI needs to be gated on when entering Stop mode. + */ + cgcr0 = __raw_readl(MXC_CCM_CGCR0); + cgcr1 = __raw_readl(MXC_CCM_CGCR1); + cgcr2 = __raw_readl(MXC_CCM_CGCR2); + __raw_writel(cgcr0 | MXC_CCM_CGCR0_STOP_MODE_MASK, + MXC_CCM_CGCR0); + __raw_writel(cgcr1 | MXC_CCM_CGCR1_STOP_MODE_MASK, + MXC_CCM_CGCR1); + __raw_writel(cgcr2 | MXC_CCM_CGCR2_STOP_MODE_MASK, + MXC_CCM_CGCR2); + /* The interrupts which are not wake-up sources need + be mask when entering Stop mode. + */ + lpimr = MXC_CCM_LPIMR0_MASK; + for (i = 0; i < 32; i++) { + desc = irq_desc + i; + if ((desc->status & IRQ_WAKEUP) != 0) + lpimr &= ~(1 << i); + } + __raw_writel(lpimr, MXC_CCM_LPIMR0); + lpimr = MXC_CCM_LPIMR1_MASK; + for (i = 32; i < 64; i++) { + desc = irq_desc + i; + if ((desc->status & IRQ_WAKEUP) != 0) + lpimr &= ~(1 << (i - 32)); + } + __raw_writel(lpimr, MXC_CCM_LPIMR1); + + if (mode == STOP_POWER_OFF) { + pmcr2 = __raw_readl(MXC_CCM_PMCR2); + pmcr2 |= (MXC_CCM_PMCR2_OSC24M_DOWN | + MXC_CCM_PMCR2_VSTBY); + __raw_writel(pmcr2, MXC_CCM_PMCR2); + } + break; + + case WAIT_CLOCKED: + case WAIT_UNCLOCKED: + default: + /* Wait is the default mode used when idle. */ + lpm = MX25_WAIT_MODE; + break; + } + + /* program LP CTL bit */ + reg = ((reg & (~MXC_CCM_CCTL_LP_CTL_MASK)) | + lpm << MXC_CCM_CCTL_LP_CTL_OFFSET); + + __raw_writel(reg, MXC_CCM_CCTL); +} + +/*! + * This function puts the CPU into idle mode. It is called by default_idle() + * in process.c file. + */ +void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks. + */ + if (!mxc_jtag_enabled) { + /* set as Wait mode */ + mxc_cpu_lp_set(WAIT_UNCLOCKED); + cpu_do_idle(); + } +} + +/* + * This function resets the system. It is called by machine_restart(). + * + * @param mode indicates different kinds of resets + */ +void arch_reset(char mode) +{ + /* Assert SRS signal */ + mxc_wd_reset(); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/clock.c @@ -0,0 +1,1739 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* based on mach-mx27/clock.c */ + +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +#define OSC24M_CLK_FREQ 24000000 /* 24M reference clk */ +#define OSC32K_CLK_FREQ 32768 /* 32.768k oscillator in */ + +#if defined CONFIG_CPU_FREQ_IMX +#define AHB_CLK_DEFAULT 133000000 +#define ARM_SRC_DEFAULT 532000000 +#endif + +static struct clk mpll_clk; +static struct clk upll_clk; +static struct clk ahb_clk; +static struct clk upll_24610k_clk; +int cpu_wp_nr; + +static int _clk_enable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(clk->enable_reg); + reg |= 1 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + + return 0; +} + +static void _clk_disable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(1 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); +} + +static int _clk_upll_enable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(MXC_CCM_CCTL); + reg &= ~MXC_CCM_CCTL_UPLL_DISABLE; + __raw_writel(reg, MXC_CCM_CCTL); + + while ((__raw_readl(MXC_CCM_UPCTL) & MXC_CCM_UPCTL_LF) == 0) ; + + return 0; +} + +static void _clk_upll_disable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(MXC_CCM_CCTL); + reg |= MXC_CCM_CCTL_UPLL_DISABLE; + __raw_writel(reg, MXC_CCM_CCTL); +} + +static int _perclk_enable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(MXC_CCM_CGCR0); + reg |= 1 << clk->id; + __raw_writel(reg, MXC_CCM_CGCR0); + + return 0; +} + +static void _perclk_disable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(MXC_CCM_CGCR0); + reg &= ~(1 << clk->id); + __raw_writel(reg, MXC_CCM_CGCR0); +} + +static void _clk_pll_recalc(struct clk *clk) +{ + unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; + unsigned long ref_clk; + unsigned long reg; + unsigned long long temp; + + ref_clk = clk->parent->rate; + + if (clk == &mpll_clk) { + reg = __raw_readl(MXC_CCM_MPCTL); + pdf = (reg & MXC_CCM_MPCTL_PD_MASK) >> MXC_CCM_MPCTL_PD_OFFSET; + mfd = + (reg & MXC_CCM_MPCTL_MFD_MASK) >> MXC_CCM_MPCTL_MFD_OFFSET; + mfi = + (reg & MXC_CCM_MPCTL_MFI_MASK) >> MXC_CCM_MPCTL_MFI_OFFSET; + mfn = + (reg & MXC_CCM_MPCTL_MFN_MASK) >> MXC_CCM_MPCTL_MFN_OFFSET; + } else if (clk == &upll_clk) { + reg = __raw_readl(MXC_CCM_UPCTL); + pdf = (reg & MXC_CCM_UPCTL_PD_MASK) >> MXC_CCM_UPCTL_PD_OFFSET; + mfd = + (reg & MXC_CCM_UPCTL_MFD_MASK) >> MXC_CCM_UPCTL_MFD_OFFSET; + mfi = + (reg & MXC_CCM_UPCTL_MFI_MASK) >> MXC_CCM_UPCTL_MFI_OFFSET; + mfn = + (reg & MXC_CCM_UPCTL_MFN_MASK) >> MXC_CCM_UPCTL_MFN_OFFSET; + } else { + BUG(); /* oops */ + } + + mfi = (mfi <= 5) ? 5 : mfi; + temp = 2LL * ref_clk * mfn; + do_div(temp, mfd + 1); + temp = 2LL * ref_clk * mfi + temp; + do_div(temp, pdf + 1); + + clk->rate = temp; +} + +static unsigned long _clk_cpu_round_rate(struct clk *clk, unsigned long rate) +{ + int div = clk->parent->rate / rate; + + if (clk->parent->rate % rate) + div++; + + if (div > 4) + div = 4; + + return clk->parent->rate / div; +} + +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long div = 0x0, reg = 0x0; + unsigned long cctl = __raw_readl(MXC_CCM_CCTL); + +#if defined CONFIG_CPU_FREQ_IMX + struct cpu_wp *cpu_wp; + unsigned long ahb_clk_div = 0; + unsigned long arm_src = 0; + int i; + + cpu_wp = get_cpu_wp(&cpu_wp_nr); + for (i = 0; i < cpu_wp_nr; i++) { + if (cpu_wp[i].cpu_rate == rate) { + div = cpu_wp[i].cpu_podf; + ahb_clk_div = cpu_wp[i].cpu_rate / AHB_CLK_DEFAULT - 1; + arm_src = + (cpu_wp[i].pll_rate == ARM_SRC_DEFAULT) ? 0 : 1; + break; + } + } + if (i == cpu_wp_nr) + return -EINVAL; + reg = (cctl & ~MXC_CCM_CCTL_ARM_MASK) | + (div << MXC_CCM_CCTL_ARM_OFFSET); + reg = (reg & ~MXC_CCM_CCTL_AHB_MASK) | + (ahb_clk_div << MXC_CCM_CCTL_AHB_OFFSET); + reg = (reg & ~MXC_CCM_CCTL_ARM_SRC) | + (arm_src << MXC_CCM_CCTL_ARM_SRC_OFFSET); + __raw_writel(reg, MXC_CCM_CCTL); + clk->rate = rate; +#else + div = clk->parent->rate / rate; + + if (div > 4 || div < 1 || ((clk->parent->rate / div) != rate)) + return -EINVAL; + div--; + + reg = + (cctl & ~MXC_CCM_CCTL_ARM_MASK) | (div << MXC_CCM_CCTL_ARM_OFFSET); + __raw_writel(reg, MXC_CCM_CCTL); + clk->rate = rate; +#endif + + return 0; +} + +static void _clk_cpu_recalc(struct clk *clk) +{ + unsigned long div; + unsigned long cctl = __raw_readl(MXC_CCM_CCTL); + + div = (cctl & MXC_CCM_CCTL_ARM_MASK) >> MXC_CCM_CCTL_ARM_OFFSET; + + clk->rate = clk->parent->rate / (div + 1); + + if (cctl & MXC_CCM_CCTL_ARM_SRC) { + clk->rate *= 3; + clk->rate /= 4; + } +} + +static void _clk_ahb_recalc(struct clk *clk) +{ + unsigned long div; + unsigned long cctl = __raw_readl(MXC_CCM_CCTL); + + div = (cctl & MXC_CCM_CCTL_AHB_MASK) >> MXC_CCM_CCTL_AHB_OFFSET; + + clk->rate = clk->parent->rate / (div + 1); +} + +static void *pcdr_a[4] = { + MXC_CCM_PCDR0, MXC_CCM_PCDR1, MXC_CCM_PCDR2, MXC_CCM_PCDR3 +}; +static void _clk_perclkx_recalc(struct clk *clk) +{ + unsigned long perclk_pdf; + unsigned long pcdr; + + if (clk->id < 0 || clk->id > 15) + return; + + pcdr = __raw_readl(pcdr_a[clk->id >> 2]); + + perclk_pdf = + (pcdr >> ((clk->id & 3) << 3)) & MXC_CCM_PCDR1_PERDIV1_MASK; + + clk->rate = clk->parent->rate / (perclk_pdf + 1); +} + +static unsigned long _clk_perclkx_round_rate(struct clk *clk, + unsigned long rate) +{ + unsigned long div; + + div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + if (div > 64) + div = 64; + + return clk->parent->rate / div; +} + +static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long reg; + unsigned long div; + + if (clk->id < 0 || clk->id > 15) + return -EINVAL; + + div = clk->parent->rate / rate; + if (div > 64 || div < 1 || ((clk->parent->rate / div) != rate)) + return -EINVAL; + div--; + + reg = + __raw_readl(pcdr_a[clk->id >> 2]) & ~(MXC_CCM_PCDR1_PERDIV1_MASK << + ((clk->id & 3) << 3)); + reg |= div << ((clk->id & 3) << 3); + __raw_writel(reg, pcdr_a[clk->id >> 2]); + + clk->rate = rate; + + return 0; +} + +static int _clk_perclkx_set_parent(struct clk *clk, struct clk *parent) +{ + unsigned long mcr; + + if (parent != &upll_clk && parent != &ahb_clk) + return -EINVAL; + + clk->parent = parent; + mcr = __raw_readl(MXC_CCM_MCR); + if (parent == &upll_clk) + mcr |= (1 << clk->id); + else + mcr &= ~(1 << clk->id); + + __raw_writel(mcr, MXC_CCM_MCR); + + return 0; +} + +static int _clk_perclkx_set_parent3(struct clk *clk, struct clk *parent) +{ + unsigned long mcr = __raw_readl(MXC_CCM_MCR); + int bit; + + if (parent != &upll_clk && parent != &ahb_clk && + parent != &upll_24610k_clk) + return -EINVAL; + + switch (clk->id) { + case 2: + bit = MXC_CCM_MCR_ESAI_CLK_MUX_OFFSET; + break; + case 13: + bit = MXC_CCM_MCR_SSI1_CLK_MUX_OFFSET; + break; + case 14: + bit = MXC_CCM_MCR_SSI2_CLK_MUX_OFFSET; + break; + default: + return -EINVAL; + } + + if (parent == &upll_24610k_clk) { + mcr |= 1 << bit; + __raw_writel(mcr, MXC_CCM_MCR); + clk->parent = parent; + } else { + mcr &= ~(1 << bit); + __raw_writel(mcr, MXC_CCM_MCR); + return _clk_perclkx_set_parent(clk, parent); + } + + return 0; +} + +static void _clk_ipg_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate / 2; /* Always AHB / 2 */ +} + +static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate) +{ + return clk->parent->round_rate(clk->parent, rate); +} + +static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) +{ + int ret; + + ret = clk->parent->set_rate(clk->parent, rate); + if (ret == 0) + clk->rate = rate; + return ret; +} + +/* Top-level clocks */ + +static struct clk osc24m_clk = { + .name = "osc24m", + .rate = OSC24M_CLK_FREQ, + .flags = RATE_PROPAGATES, +}; + +static struct clk osc32k_clk = { + .name = "osc32k", + .rate = OSC32K_CLK_FREQ, + .flags = RATE_PROPAGATES, +}; + +static struct clk mpll_clk = { + .name = "mpll", + .parent = &osc24m_clk, + .recalc = _clk_pll_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk upll_clk = { + .name = "upll", + .parent = &osc24m_clk, + .recalc = _clk_pll_recalc, + .enable = _clk_upll_enable, + .disable = _clk_upll_disable, + .flags = RATE_PROPAGATES, +}; + +static void _clk_24610k_recalc(struct clk *clk) +{ + long long temp = clk->parent->rate * 2461LL; + + do_div(temp, 24000); + + clk->rate = temp; /* Always (UPLL * 24.61 / 240) */ +} + +static struct clk upll_24610k_clk = { + .name = "upll_24610k", + .parent = &upll_clk, + .recalc = _clk_24610k_recalc, + .flags = RATE_PROPAGATES, +}; + +/* Mid-level clocks */ + +static struct clk cpu_clk = { /* ARM clock */ + .name = "cpu_clk", + .parent = &mpll_clk, + .set_rate = _clk_cpu_set_rate, + .recalc = _clk_cpu_recalc, + .round_rate = _clk_cpu_round_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk ahb_clk = { /* a.k.a. HCLK */ + .name = "ahb_clk", + .parent = &cpu_clk, + .recalc = _clk_ahb_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .recalc = _clk_ipg_recalc, + .flags = RATE_PROPAGATES, +}; + +/* Bottom-level clocks */ + +struct clk usb_ahb_clk = { + .name = "usb_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_USBOTG_OFFSET, + .disable = _clk_disable, +}; + +struct clk rtic_clk = { + .name = "rtic_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_RTIC_OFFSET, + .disable = _clk_disable, +}; + +struct clk emi_clk = { + .name = "emi_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_EMI_OFFSET, + .disable = _clk_disable, +}; + +struct clk brom_clk = { + .name = "brom_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_BROM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk per_clk[] = { + { + .name = "per_csi_clk", + .id = 0, + .parent = &upll_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_epit_clk", + .id = 1, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_esai_clk", + .id = 2, + .parent = &ahb_clk, /* can be AHB or UPLL or 24.61MHz */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent3, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_esdhc1_clk", + .id = 3, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_esdhc2_clk", + .id = 4, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_gpt_clk", + .id = 5, + .parent = &ahb_clk, /* Must be AHB */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_i2c_clk", + .id = 6, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_lcdc_clk", + .id = 7, + .parent = &upll_clk, /* Must be UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_nfc_clk", + .id = 8, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_owire_clk", + .id = 9, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_pwm_clk", + .id = 10, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_sim1_clk", + .id = 11, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_sim2_clk", + .id = 12, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_ssi1_clk", + .id = 13, + .parent = &ahb_clk, /* can be AHB or UPLL or 24.61MHz */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent3, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_ssi2_clk", + .id = 14, + .parent = &ahb_clk, /* can be AHB or UPLL or 24.61MHz */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent3, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, + { + .name = "per_uart_clk", + .id = 15, + .parent = &ahb_clk, /* can be AHB or UPLL */ + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .set_parent = _clk_perclkx_set_parent, + .recalc = _clk_perclkx_recalc, + .enable = _perclk_enable, + .disable = _perclk_disable, + .flags = RATE_PROPAGATES,}, +}; + +struct clk nfc_clk = { + .name = "nfc_clk", + .id = 0, + .parent = &per_clk[8], +}; + +struct clk audmux_clk = { + .name = "audmux_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_AUDMUX_OFFSET, + .disable = _clk_disable, +}; + +struct clk ata_clk[] = { + { + .name = "ata_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_ATA_OFFSET, + .disable = _clk_disable, + .secondary = &ata_clk[1],}, + { + .name = "ata_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_ATA_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk can_clk[] = { + { + .name = "can_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CAN1_OFFSET, + .disable = _clk_disable,}, + { + .name = "can_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CAN2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk csi_clk[] = { + { + .name = "csi_clk", + .id = 0, + .parent = &per_clk[0], + .secondary = &csi_clk[1],}, + { + .name = "csi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CSI_OFFSET, + .disable = _clk_disable, + .secondary = &csi_clk[2],}, + { + .name = "csi_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_CSI_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk cspi_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CSPI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CSPI2_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_CSPI3_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk dryice_clk = { + .name = "dryice_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_DRYICE_OFFSET, + .disable = _clk_disable, +}; + +struct clk ect_clk = { + .name = "ect_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_ECT_OFFSET, + .disable = _clk_disable, +}; + +struct clk epit1_clk[] = { + { + .name = "epit_clk", + .id = 0, + .parent = &per_clk[1], + .secondary = &epit1_clk[1],}, + { + .name = "epit_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_EPIT1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk epit2_clk[] = { + { + .name = "epit_clk", + .id = 1, + .parent = &per_clk[1], + .secondary = &epit2_clk[1],}, + { + .name = "epit_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_EPIT2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk esai_clk[] = { + { + .name = "esai_clk", + .id = 0, + .parent = &per_clk[2], + .secondary = &esai_clk[1],}, + { + .name = "esai_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_ESAI_OFFSET, + .disable = _clk_disable, + .secondary = &esai_clk[2],}, + { + .name = "esai_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_ESAI_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk esdhc1_clk[] = { + { + .name = "esdhc_clk", + .id = 0, + .parent = &per_clk[3], + .secondary = &esdhc1_clk[1],}, + { + .name = "esdhc_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_ESDHC1_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc1_clk[2],}, + { + .name = "esdhc_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_ESDHC1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk esdhc2_clk[] = { + { + .name = "esdhc_clk", + .id = 1, + .parent = &per_clk[4], + .secondary = &esdhc2_clk[1],}, + { + .name = "esdhc_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_ESDHC2_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc2_clk[2],}, + { + .name = "esdhc_ahb_clk", + .id = 1, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_ESDHC2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk fec_clk[] = { + { + .name = "fec_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_FEC_OFFSET, + .disable = _clk_disable, + .secondary = &fec_clk[1],}, + { + .name = "fec_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_FEC_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk gpio_clk[] = { + { + .name = "gpio_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPIO1_OFFSET, + .disable = _clk_disable,}, + { + .name = "gpio_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPIO2_OFFSET, + .disable = _clk_disable,}, + { + .name = "gpio_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPIO3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk gpt1_clk[] = { + { + .name = "gpt_clk", + .id = 0, + .parent = &per_clk[5], + .secondary = &gpt1_clk[1],}, + { + .name = "gpt_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPT1_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk gpt2_clk[] = { + { + .name = "gpt_clk", + .id = 1, + .parent = &per_clk[5], + .secondary = &gpt1_clk[1],}, + { + .name = "gpt_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPT2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk gpt3_clk[] = { + { + .name = "gpt_clk", + .id = 2, + .parent = &per_clk[5], + .secondary = &gpt1_clk[1],}, + { + .name = "gpt_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPT3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk gpt4_clk[] = { + { + .name = "gpt_clk", + .id = 3, + .parent = &per_clk[5], + .secondary = &gpt1_clk[1],}, + { + .name = "gpt_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_GPT4_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &per_clk[6],}, + { + .name = "i2c_clk", + .id = 1, + .parent = &per_clk[6],}, + { + .name = "i2c_clk", + .id = 2, + .parent = &per_clk[6],}, +}; + +struct clk iim_clk = { + .name = "iim_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_IIM_OFFSET, + .disable = _clk_disable, +}; + +struct clk iomuxc_clk = { + .name = "iomuxc_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_IOMUXC_OFFSET, + .disable = _clk_disable, +}; + +struct clk kpp_clk = { + .name = "kpp_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_KPP_OFFSET, + .disable = _clk_disable, +}; + +struct clk lcdc_clk[] = { + { + .name = "lcdc_clk", + .id = 0, + .parent = &per_clk[7], + .secondary = &lcdc_clk[1], + .round_rate = _clk_parent_round_rate, + .set_rate = _clk_parent_set_rate,}, + { + .name = "lcdc_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_LCDC_OFFSET, + .disable = _clk_disable, + .secondary = &lcdc_clk[2],}, + { + .name = "lcdc_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_LCDC_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk owire_clk[] = { + { + .name = "owire_clk", + .id = 0, + .parent = &per_clk[9], + .secondary = &owire_clk[1],}, + { + .name = "owire_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_OWIRE_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk pwm1_clk[] = { + { + .name = "pwm_clk", + .id = 0, + .parent = &per_clk[10], + .secondary = &pwm1_clk[1],}, + { + .name = "pwm_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR1, + .enable_shift = MXC_CCM_CGCR1_PWM1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk pwm2_clk[] = { + { + .name = "pwm_clk", + .id = 1, + .parent = &per_clk[10], + .secondary = &pwm2_clk[1],}, + { + .name = "pwm_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_PWM2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk pwm3_clk[] = { + { + .name = "pwm_clk", + .id = 2, + .parent = &per_clk[10], + .secondary = &pwm3_clk[1],}, + { + .name = "pwm_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_PWM3_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk pwm4_clk[] = { + { + .name = "pwm_clk", + .id = 3, + .parent = &per_clk[10], + .secondary = &pwm4_clk[1],}, + { + .name = "pwm_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_PWM3_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk rng_clk = { + .name = "rng_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_RNGB_OFFSET, + .disable = _clk_disable, +}; + +struct clk scc_clk = { + .name = "scc_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SCC_OFFSET, + .disable = _clk_disable, +}; + +struct clk sdma_clk[] = { + { + .name = "sdma_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SDMA_OFFSET, + .disable = _clk_disable, + .secondary = &sdma_clk[1],}, + { + .name = "sdma_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_SDMA_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk sim1_clk[] = { + { + .name = "sim1_clk", + .id = 0, + .parent = &per_clk[11], + .secondary = &sim1_clk[1],}, + { + .name = "sim_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SIM1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk sim2_clk[] = { + { + .name = "sim2_clk", + .id = 1, + .parent = &per_clk[12], + .secondary = &sim2_clk[1],}, + { + .name = "sim_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SIM2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk slcdc_clk[] = { + { + .name = "slcdc_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SLCDC_OFFSET, + .disable = _clk_disable, + .secondary = &slcdc_clk[1],}, + { + .name = "slcdc_ahb_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR0, + .enable_shift = MXC_CCM_CGCR0_HCLK_SLCDC_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk spba_clk = { + .name = "spba_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SPBA_OFFSET, + .disable = _clk_disable, +}; + +struct clk ssi1_clk[] = { + { + .name = "ssi_clk", + .id = 0, + .parent = &per_clk[13], + .secondary = &ssi1_clk[1],}, + { + .name = "ssi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SSI1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk ssi2_clk[] = { + { + .name = "ssi_clk", + .id = 1, + .parent = &per_clk[14], + .secondary = &ssi2_clk[1],}, + { + .name = "ssi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_SSI2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk tchscrn_clk = { + .name = "tchscrn_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_TCHSCRN_OFFSET, + .disable = _clk_disable, +}; + +struct clk uart1_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &per_clk[15], + .secondary = &uart1_clk[1],}, + { + .name = "uart_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_UART1_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk uart2_clk[] = { + { + .name = "uart_clk", + .id = 1, + .parent = &per_clk[15], + .secondary = &uart2_clk[1],}, + { + .name = "uart_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_UART2_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk uart3_clk[] = { + { + .name = "uart_clk", + .id = 2, + .parent = &per_clk[15], + .secondary = &uart3_clk[1],}, + { + .name = "uart_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_UART3_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk uart4_clk[] = { + { + .name = "uart_clk", + .id = 3, + .parent = &per_clk[15], + .secondary = &uart4_clk[1],}, + { + .name = "uart_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_UART4_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk uart5_clk[] = { + { + .name = "uart_clk", + .id = 4, + .parent = &per_clk[15], + .secondary = &uart5_clk[1],}, + { + .name = "uart_ipg_clk", + .id = 4, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_UART5_OFFSET, + .disable = _clk_disable,}, +}; + +struct clk wdog_clk = { + .name = "wdog_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGCR2, + .enable_shift = MXC_CCM_CGCR2_WDOG_OFFSET, + .disable = _clk_disable, +}; + +static unsigned long _clk_usb_round_rate(struct clk *clk, unsigned long rate) +{ + unsigned long div; + + div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + if (div > 64) + return -EINVAL; + + return clk->parent->rate / div; +} + +static int _clk_usb_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long reg; + unsigned long div; + + div = clk->parent->rate / rate; + + if (clk->parent->rate / div != rate) + return -EINVAL; + if (div > 64) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CCTL) & ~MXC_CCM_CCTL_USB_DIV_MASK; + reg |= (div - 1) << MXC_CCM_CCTL_USB_DIV_OFFSET; + __raw_writel(reg, MXC_CCM_CCTL); + + return 0; +} + +static void _clk_usb_recalc(struct clk *clk) +{ + unsigned long div = + __raw_readl(MXC_CCM_CCTL) & MXC_CCM_CCTL_USB_DIV_MASK; + + div >>= MXC_CCM_CCTL_USB_DIV_OFFSET; + + clk->rate = clk->parent->rate / (div + 1); +} + +static int _clk_usb_set_parent(struct clk *clk, struct clk *parent) +{ + unsigned long mcr; + + if (parent != &upll_clk && parent != &ahb_clk) + return -EINVAL; + + clk->parent = parent; + mcr = __raw_readl(MXC_CCM_MCR); + if (parent == &ahb_clk) + mcr |= (1 << MXC_CCM_MCR_USB_CLK_MUX_OFFSET); + else + mcr &= ~(1 << MXC_CCM_MCR_USB_CLK_MUX_OFFSET); + + __raw_writel(mcr, MXC_CCM_MCR); + + return 0; +} + +static struct clk usb_clk = { + .name = "usb_clk", + .parent = &upll_clk, + .recalc = _clk_usb_recalc, + .set_rate = _clk_usb_set_rate, + .round_rate = _clk_usb_round_rate, + .set_parent = _clk_usb_set_parent, +}; + +/* CLKO */ + +static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) +{ + unsigned long div; + + div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + if (div > 64) + return -EINVAL; + + return clk->parent->rate / div; +} + +static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) +{ + unsigned long reg; + unsigned long div; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + if (div > 64) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_MCR) & ~MXC_CCM_MCR_CLKO_DIV_MASK; + reg |= (div - 1) << MXC_CCM_MCR_CLKO_DIV_OFFSET; + __raw_writel(reg, MXC_CCM_MCR); + + return 0; +} + +static void _clk_clko_recalc(struct clk *clk) +{ + unsigned long div = + __raw_readl(MXC_CCM_MCR) & MXC_CCM_MCR_CLKO_DIV_MASK; + + div >>= MXC_CCM_MCR_CLKO_DIV_OFFSET; + + clk->rate = clk->parent->rate / (div + 1); +} + +static struct clk *clko_sources[] = { + &osc32k_clk, /* 0x0 */ + &osc24m_clk, /* 0x1 */ + &cpu_clk, /* 0x2 */ + &ahb_clk, /* 0x3 */ + &ipg_clk, /* 0x4 */ + NULL, /* 0x5 */ + NULL, /* 0x6 */ + NULL, /* 0x7 */ + NULL, /* 0x8 */ + NULL, /* 0x9 */ + &per_clk[0], /* 0xA */ + &per_clk[2], /* 0xB */ + &per_clk[13], /* 0xC */ + &per_clk[14], /* 0xD */ + &usb_clk, /* 0xE */ + NULL, /* 0xF */ +}; + +#define NR_CLKO_SOURCES (sizeof(clko_sources) / sizeof(struct clk *)) + +static int _clk_clko_set_parent(struct clk *clk, struct clk *parent) +{ + unsigned long reg = + __raw_readl(MXC_CCM_MCR) & ~MXC_CCM_MCR_CLKO_SEL_MASK; + struct clk **src; + int i; + + for (i = 0, src = clko_sources; i < NR_CLKO_SOURCES; i++, src++) + if (*src == parent) + break; + + if (i == NR_CLKO_SOURCES) + return -EINVAL; + + clk->parent = parent; + + reg |= i << MXC_CCM_MCR_CLKO_SEL_OFFSET; + + __raw_writel(reg, MXC_CCM_MCR); + + return 0; +} + +static struct clk clko_clk = { + .name = "clko_clk", + .recalc = _clk_clko_recalc, + .set_rate = _clk_clko_set_rate, + .round_rate = _clk_clko_round_rate, + .set_parent = _clk_clko_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_MCR, + .enable_shift = MXC_CCM_MCR_CLKO_EN_OFFSET, + .disable = _clk_disable, +}; + +static struct clk *mxc_clks[] = { + &osc24m_clk, + &osc32k_clk, + &mpll_clk, + &upll_clk, + &cpu_clk, + &ahb_clk, + &ipg_clk, + &usb_ahb_clk, + &per_clk[0], + &per_clk[1], + &per_clk[2], + &per_clk[3], + &per_clk[4], + &per_clk[5], + &per_clk[6], + &per_clk[7], + &per_clk[8], + &per_clk[9], + &per_clk[10], + &per_clk[11], + &per_clk[12], + &per_clk[13], + &per_clk[14], + &per_clk[15], + &nfc_clk, + &audmux_clk, + &ata_clk[0], + &ata_clk[1], + &can_clk[0], + &can_clk[1], + &csi_clk[0], + &csi_clk[1], + &csi_clk[2], + &cspi_clk[0], + &cspi_clk[1], + &cspi_clk[2], + &dryice_clk, + &ect_clk, + &epit1_clk[0], + &epit1_clk[1], + &epit2_clk[0], + &epit2_clk[1], + &esai_clk[0], + &esai_clk[1], + &esai_clk[2], + &esdhc1_clk[0], + &esdhc1_clk[1], + &esdhc1_clk[2], + &esdhc2_clk[0], + &esdhc2_clk[1], + &esdhc2_clk[2], + &fec_clk[0], + &fec_clk[1], + &gpio_clk[0], + &gpio_clk[1], + &gpio_clk[2], + &gpt1_clk[0], + &gpt1_clk[1], + &gpt2_clk[0], + &gpt2_clk[1], + &gpt3_clk[0], + &gpt3_clk[1], + &gpt4_clk[0], + &gpt4_clk[1], + &i2c_clk[0], + &i2c_clk[1], + &i2c_clk[2], + &iim_clk, + &iomuxc_clk, + &kpp_clk, + &lcdc_clk[0], + &lcdc_clk[1], + &lcdc_clk[2], + &owire_clk[0], + &owire_clk[1], + &pwm1_clk[0], + &pwm1_clk[1], + &pwm2_clk[0], + &pwm2_clk[1], + &pwm3_clk[0], + &pwm3_clk[1], + &pwm4_clk[0], + &pwm4_clk[1], + &rng_clk, + &scc_clk, + &sdma_clk[0], + &sdma_clk[1], + &sim1_clk[0], + &sim1_clk[1], + &sim2_clk[0], + &sim2_clk[1], + &slcdc_clk[0], + &slcdc_clk[1], + &spba_clk, + &ssi1_clk[0], + &ssi1_clk[1], + &ssi2_clk[0], + &ssi2_clk[1], + &tchscrn_clk, + &uart1_clk[0], + &uart1_clk[1], + &uart2_clk[0], + &uart2_clk[1], + &uart3_clk[0], + &uart3_clk[1], + &uart4_clk[0], + &uart4_clk[1], + &uart5_clk[0], + &uart5_clk[1], + &wdog_clk, + &usb_clk, + &clko_clk, +}; + +/*! + * Function to get timer clock rate early in boot process before clock tree is + * initialized. + * + * @return Clock rate for timer + */ +unsigned long __init clk_early_get_timer_rate(void) +{ + upll_clk.recalc(&upll_clk); + per_clk[5].recalc(&per_clk[5]); + per_clk[5].enable(&per_clk[5]); + + return per_clk[5].rate; +} + +extern void propagate_rate(struct clk *tclk); + +int __init mx25_clocks_init(unsigned long fref) +{ + int i; + struct clk **clkp; + + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + + /* Turn off all possible clocks */ + __raw_writel((1 << MXC_CCM_CGCR0_HCLK_EMI_OFFSET), MXC_CCM_CGCR0); + + __raw_writel((1 << MXC_CCM_CGCR1_GPT1_OFFSET) | + (1 << MXC_CCM_CGCR1_IIM_OFFSET), MXC_CCM_CGCR1); + __raw_writel(1 << MXC_CCM_CGCR2_SCC_OFFSET, MXC_CCM_CGCR2); + + /* Init all perclk sources to ahb clock*/ + for (i = 0; i < (sizeof(per_clk) / sizeof(struct clk)); i++) + per_clk[i].set_parent(&per_clk[i], &ahb_clk); + + /* This will propagate to all children and init all the clock rates */ + propagate_rate(&osc24m_clk); + propagate_rate(&osc32k_clk); + + /* GPT clock must be derived from AHB clock */ + clk_set_rate(&per_clk[5], ahb_clk.rate / 10); + + /* LCDC clock must be derived from UPLL clock */ + clk_set_parent(&per_clk[7], &upll_clk); + clk_set_rate(&per_clk[7], upll_clk.rate); + + /* the NFC clock must be derived from AHB clock */ + clk_set_parent(&per_clk[8], &ahb_clk); + clk_set_rate(&per_clk[8], ahb_clk.rate / 6); + + /* sim clock */ + clk_set_rate(&per_clk[11], ahb_clk.rate / 2); + + /* the csi clock must be derived from UPLL clock */ + clk_set_parent(&per_clk[0], &upll_clk); + clk_set_rate(&per_clk[0], upll_clk.rate / 5); + + pr_info("Clock input source is %ld\n", osc24m_clk.rate); + + clk_enable(&emi_clk); + clk_enable(&gpio_clk[0]); + clk_enable(&gpio_clk[1]); + clk_enable(&gpio_clk[2]); + clk_enable(&iim_clk); + clk_enable(&gpt1_clk[0]); + clk_enable(&iomuxc_clk); + clk_enable(&scc_clk); + + mxc_timer_init(&gpt1_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/mx25_3stack.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/mx25_3stack.c @@ -0,0 +1,738 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include + +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "board-mx25_3stack.h" +#include "crm_regs.h" +#include "iomux.h" + +/*! + * @file mach-mx25/mx25_3stack.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX25 + */ + +unsigned int mx25_3stack_board_io; + +/* working point(wp): 0 - 399MHz; 1 - 266MHz; 2 - 133MHz; */ +/* 24MHz input clock table */ +static struct cpu_wp cpu_wp_mx25[] = { + { + .pll_rate = 399000000, + .cpu_rate = 399000000, + .cpu_podf = 0x0, + .cpu_voltage = 1450000}, + { + .pll_rate = 532000000, + .cpu_rate = 266000000, + .cpu_podf = 0x1, + .cpu_voltage = 1340000}, + { + .pll_rate = 532000000, + .cpu_rate = 133000000, + .cpu_podf = 0x3, + .cpu_voltage = 1340000}, +}; +struct cpu_wp *get_cpu_wp(int *wp) +{ + *wp = 3; + return cpu_wp_mx25; +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE) +static u16 keymapping[16] = { + KEY_UP, KEY_DOWN, KEY_VOLUMEDOWN, KEY_HOME, + KEY_RIGHT, KEY_LEFT, KEY_ENTER, KEY_VOLUMEUP, + KEY_F6, KEY_F8, KEY_F9, KEY_F10, + KEY_F1, KEY_F2, KEY_F3, KEY_POWER, +}; + +static struct resource mxc_kpp_resources[] = { + [0] = { + .start = MXC_INT_KPP, + .end = MXC_INT_KPP, + .flags = IORESOURCE_IRQ, + } +}; + +static struct keypad_data keypad_plat_data = { + .rowmax = 4, + .colmax = 4, + .irq = MXC_INT_KPP, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +/* mxc keypad driver */ +static struct platform_device mxc_keypad_device = { + .name = "mxc_keypad", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_kpp_resources), + .resource = mxc_kpp_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &keypad_plat_data, + }, +}; + +static void mxc_init_keypad(void) +{ + (void)platform_device_register(&mxc_keypad_device); +} +#else +static inline void mxc_init_keypad(void) +{ +} +#endif + +/* MTD NAND flash */ + +#if defined(CONFIG_MTD_NAND_MXC_V2) || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) + +static struct mtd_partition mxc_nand_partitions[] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 3 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.configure", + .offset = MTDPART_OFS_APPEND, + .size = 8 * 1024 * 1024}, + { + .name = "nand.userfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +static struct flash_platform_data mxc_nand_data = { + .parts = mxc_nand_partitions, + .nr_parts = ARRAY_SIZE(mxc_nand_partitions), + .width = 1, +}; + +static struct platform_device mxc_nand_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ + if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) + mxc_nand_data.width = 2; + + platform_device_register(&mxc_nand_mtd_device); +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ + defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static const char fb_default_mode[] = "CPT-VGA"; + +/* mxc lcd driver */ +static struct platform_device mxc_fb_device = { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &fb_default_mode, + .coherent_dma_mask = 0xFFFFFFFF, + }, +}; + +/* + * Power on/off CPT VGA panel. + */ +void board_power_lcd(int on) +{ + if (on) + mx2fb_set_brightness(MXC_DEFAULT_INTENSITY); + else + mx2fb_set_brightness(MXC_INTENSITY_OFF); +} +EXPORT_SYMBOL_GPL(board_power_lcd); + +static void mxc_init_fb(void) +{ + (void)platform_device_register(&mxc_fb_device); +} +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +#if defined(CONFIG_BACKLIGHT_MXC) +static struct platform_device mxcbl_devices[] = { +#if defined(CONFIG_BACKLIGHT_MXC_LCDC) || \ + defined(CONFIG_BACKLIGHT_MXC_LCDC_MODULE) + { + .name = "mxc_lcdc_bl", + .id = 0, + }, +#endif +}; + +static inline void mxc_init_bl(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxcbl_devices); i++) + platform_device_register(&mxcbl_devices[i]); +} +#else +static inline void mxc_init_bl(void) +{ +} +#endif + +/*! + * Power Key interrupt handler. + */ +static irqreturn_t power_key_int(int irq, void *dev_id) +{ + pr_info("on-off key pressed\n"); + return 0; +} + +/*! + * Power Key initialization. + */ +static int __init mxc_init_power_key(void) +{ + /*Set power key as wakeup resource */ + int irq, ret; + + mxc_request_iomux(MX25_PIN_A25, MUX_CONFIG_ALT5); + mxc_iomux_set_pad(MX25_PIN_A25, PAD_CTL_DRV_NORMAL); + gpio_request(IOMUX_TO_GPIO(MX25_PIN_A25), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX25_PIN_A25)); + + irq = IOMUX_TO_IRQ(MX25_PIN_A25); + set_irq_type(irq, IRQF_TRIGGER_RISING); + ret = request_irq(irq, power_key_int, 0, "power_key", 0); + if (ret) + pr_info("register on-off key interrupt failed\n"); + else + enable_irq_wake(irq); + + return ret; +} + +late_initcall(mxc_init_power_key); + +static struct spi_board_info mxc_spi_board_info[] __initdata = { + { + .modalias = "cpld_spi", + .max_speed_hz = 18000000, + .bus_num = 1, + .chip_select = 0, + .mode = SPI_MODE_2, + }, + { + .modalias = "wm8580_spi", + .max_speed_hz = 8000000, /* max spi SCK clock speed in HZ */ + .bus_num = 1, + .chip_select = 1, + }, +}; + +static struct mxc_camera_platform_data camera_data = { + .core_regulator = NULL, + .io_regulator = NULL, + .analog_regulator = NULL, + .gpo_regulator = NULL, + .mclk = 24000000, +}; + +static struct i2c_board_info mxc_i2c_board_info[] __initdata = { + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, + { + .type = "ak5702-i2c", + .addr = 0x13, + }, + { + .type = "ov2640", + .addr = 0x30, + .platform_data = (void *)&camera_data, + }, +}; + +#if defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000_MODULE) +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 2, + .src_port = 1, + .ext_port = 4, + .hp_irq = IOMUX_TO_IRQ(MX25_PIN_A10), + .hp_status = headphone_det_status, + .sysclk = 8300000, +}; + +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", + .dev = { + .release = mxc_nop_release, + .platform_data = &sgtl5000_data, + }, +}; + +static void mxc_init_sgtl5000(void) +{ + struct clk *cko1, *parent; + unsigned long rate; + + /* cko1 clock */ + mxc_request_iomux(MX25_PIN_CLKO, MUX_CONFIG_FUNC); + + cko1 = clk_get(NULL, "clko_clk"); + if (IS_ERR(cko1)) + return; + parent = clk_get(NULL, "ipg_clk"); + if (IS_ERR(parent)) + return; + clk_set_parent(cko1, parent); + rate = clk_round_rate(cko1, 13000000); + if (rate < 8000000 || rate > 27000000) { + pr_err("Error: SGTL5000 mclk freq %ld out of range!\n", rate); + clk_put(parent); + clk_put(cko1); + return; + } + clk_set_rate(cko1, rate); + clk_enable(cko1); + sgtl5000_data.sysclk = rate; + sgtl5000_enable_amp(); + platform_device_register(&mxc_sgtl5000_device); +} +#else +static inline void mxc_init_sgtl5000(void) +{ +} +#endif + +#if defined(CONFIG_SND_SOC_IMX_3STACK_AK5702) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_AK5702_MODULE) +static struct platform_device mxc_ak5702_device = { + .name = "imx-3stack-ak5702", + .dev = { + .release = mxc_nop_release, + }, +}; + +static void mxc_init_ak5702(void) +{ + platform_device_register(&mxc_ak5702_device); +} +#else +static inline void mxc_init_ak5702(void) +{ +} +#endif + +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +static struct resource smsc911x_resources[] = { + { + .start = LAN9217_BASE_ADDR, + .end = LAN9217_BASE_ADDR + 255, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_BOARD_IRQ_START, + .flags = IORESOURCE_IRQ, + } +}; + +struct smsc911x_platform_config smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .flags = 0x8000 | SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, +}; + +static struct platform_device smsc_lan9217_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &smsc911x_config, + }, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, +}; + +static int __init mxc_init_enet(void) +{ + (void)platform_device_register(&smsc_lan9217_device); + return 0; +} +#else +static int __init mxc_init_enet(void) +{ + return 0; +} +#endif + +late_initcall(mxc_init_enet); + +#if defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE) +static struct resource mxc_fec_resources[] = { + { + .start = FEC_BASE_ADDR, + .end = FEC_BASE_ADDR + 0xfff, + .flags = IORESOURCE_MEM + }, { + .start = MXC_INT_FEC, + .end = MXC_INT_FEC, + .flags = IORESOURCE_IRQ + }, +}; + +struct platform_device mxc_fec_device = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_fec_resources), + .resource = mxc_fec_resources, +}; + +static __init int mxc_init_fec(void) +{ + return platform_device_register(&mxc_fec_device); +} +#else +static inline int mxc_init_fec(void) +{ + return 0; +} +#endif + +#if defined(CONFIG_IMX_SIM) || defined(CONFIG_IMX_SIM_MODULE) +/* Used to configure the SIM bus */ +static struct mxc_sim_platform_data sim1_data = { + .clk_rate = 5000000, + .clock_sim = "sim1_clk", + .power_sim = NULL, + .init = NULL, + .exit = NULL, + .detect = 1, +}; + +/*! + * Resource definition for the SIM + */ +static struct resource mxc_sim1_resources[] = { + [0] = { + .start = SIM1_BASE_ADDR, + .end = SIM1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_SIM1, + .end = MXC_INT_SIM1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for IMX SIM */ +static struct platform_device mxc_sim1_device = { + .name = "mxc_sim", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &sim1_data, + }, + .num_resources = ARRAY_SIZE(mxc_sim1_resources), + .resource = mxc_sim1_resources, +}; + +static inline void mxc_init_sim(void) +{ + (void)platform_device_register(&mxc_sim1_device); +} +#else +static inline void mxc_init_sim(void) +{ +} +#endif + +#if defined(CONFIG_MMC_IMX_ESDHCI) || defined(CONFIG_MMC_IMX_ESDHCI_MODULE) +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_29_30 | MMC_VDD_32_33, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 400000, + .max_clk = 52000000, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_SDHC1, + .end = MXC_INT_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = IOMUX_TO_IRQ(MX25_PIN_A15), + .end = IOMUX_TO_IRQ(MX25_PIN_A15), + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxsdhci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +#ifdef CONFIG_MMC_IMX_ESDHCI_SELECT2 +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_29_30 | MMC_VDD_32_33, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 400000, + .max_clk = 52000000, + .card_fixed = 1, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .clock_mmc = "esdhc2_clk", +}; + +/*! + * Resource definition for the SDHC2 + */ +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_SDHC2, + .end = MXC_INT_SDHC2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC2 */ +static struct platform_device mxcsdhc2_device = { + .name = "mxsdhci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; +#endif + +static inline void mxc_init_mmc(void) +{ + (void)platform_device_register(&mxcsdhc1_device); +#ifdef CONFIG_MMC_IMX_ESDHCI_SELECT2 + (void)platform_device_register(&mxcsdhc2_device); +#endif +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +static void __init mx25_3stack_timer_init(void) +{ + mx25_clocks_init(24000000); +} + +static struct sys_timer mxc_timer = { + .init = mx25_3stack_timer_init, +}; + +#if defined(CONFIG_CAN_FLEXCAN) || defined(CONFIG_CAN_FLEXCAN_MODULE) +static void flexcan_xcvr_enable(int id, int en) +{ + static int pwdn; + + if (id != 1) /* MX25 3-stack uses only CAN2 */ + return; + + if (en) { + if (!pwdn++) + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D14), 0); + } else { + if (!--pwdn) + gpio_set_value(IOMUX_TO_GPIO(MX25_PIN_D14), 1); + } +} + +struct flexcan_platform_data flexcan_data[] = { + { + .core_reg = NULL, + .io_reg = NULL, + .xcvr_enable = flexcan_xcvr_enable, + .active = gpio_can_active, + .inactive = gpio_can_inactive,}, + { + .core_reg = NULL, + .io_reg = NULL, + .xcvr_enable = flexcan_xcvr_enable, + .active = gpio_can_active, + .inactive = gpio_can_inactive,}, +}; +#endif + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); + +#ifdef CONFIG_DISCONTIGMEM + do { + int nid; + mi->nr_banks = MXC_NUMNODES; + for (nid = 0; nid < mi->nr_banks; nid++) + SET_NODE(mi, nid); + } while (0); +#endif +} + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + pr_info("AIPS1 VA base: 0x%p\n", IO_ADDRESS(AIPS1_BASE_ADDR)); + mxc_cpu_common_init(); + mxc_register_gpios(); + mx25_3stack_gpio_init(); + early_console_setup(saved_command_line); + mxc_init_keypad(); +#ifdef CONFIG_I2C + i2c_register_board_info(0, mxc_i2c_board_info, + ARRAY_SIZE(mxc_i2c_board_info)); +#endif + spi_register_board_info(mxc_spi_board_info, + ARRAY_SIZE(mxc_spi_board_info)); + mx25_3stack_init_mc34704(); + mxc_init_fb(); + mxc_init_bl(); + mxc_init_nand_mtd(); + mxc_init_sgtl5000(); + mxc_init_ak5702(); + mxc_init_mmc(); + mxc_init_sim(); + mxc_init_fec(); +} + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX25_3DS data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX25_3DS, "Freescale MX25 3-Stack Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx25_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/usb_dr.c @@ -0,0 +1,122 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable); + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_UTMI_WIDE, + .power_budget = 500, /* via RT9706 */ + .gpio_usb_active = gpio_usbotg_utmi_active, + .gpio_usb_inactive = gpio_usbotg_utmi_inactive, + .transceiver = "utmi", + .wake_up_enable = _wake_up_enable, +}; + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)(USB_OTGREGS_BASE), + .end = (u32)(USB_OTGREGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device __maybe_unused dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable) +{ + if (get_usb_mode(pdata) == FSL_USB_DR_DEVICE) { + if (enable) + USBCTRL |= (UCTRL_OWIE | UCTRL_VBUS_WKUP_EN); + else { + USBCTRL &= ~UCTRL_OWIE; + USBCTRL &= ~UCTRL_VBUS_WKUP_EN; + } + } else { + if (enable) + USBCTRL |= UCTRL_OWIE; + else + USBCTRL &= ~UCTRL_OWIE; + } +} + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); + + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/bus_freq.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/bus_freq.c @@ -0,0 +1,102 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file bus_freq.c + * + * @brief A common API for the Freescale Semiconductor i.MXC CPUfreq module + * and DVFS CORE module. + * + * The APIs are for setting bus frequency to low or high. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include + +int low_bus_freq_mode; +int high_bus_freq_mode; +char *gp_reg_id = "REG3_CORE"; + +int set_low_bus_freq(void) +{ + return 0; +} + +int set_high_bus_freq(int high_bus_freq) +{ + return 0; +} + +int low_freq_bus_used(void) +{ + return 0; +} + +/*! + * This is the probe routine for the bus frequency driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit busfreq_probe(struct platform_device *pdev) +{ + low_bus_freq_mode = 0; + high_bus_freq_mode = 0; + + return 0; +} + +static struct platform_driver busfreq_driver = { + .driver = { + .name = "busfreq", + }, + .probe = busfreq_probe, +}; + +/*! + * Initialise the busfreq_driver. + * + * @return The function always returns 0. + */ + +static int __init busfreq_init(void) +{ + if (platform_driver_register(&busfreq_driver) != 0) { + printk(KERN_ERR "busfreq_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "Bus freq driver module loaded\n"); + return 0; +} + +static void __exit busfreq_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&busfreq_driver); +} + +module_init(busfreq_init); +module_exit(busfreq_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("BusFreq driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/iomux.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/iomux.c @@ -0,0 +1,199 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup GPIO_MX25 Board GPIO and Muxing Setup + * @ingroup MSL_MX25 + */ +/*! + * @file mach-mx25/iomux.c + * + * @brief I/O Muxing control functions + * + * @ingroup GPIO_MX25 + */ + +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/*! + * IOMUX register (base) addresses + */ +#define IOMUXGPR (IO_ADDRESS(IOMUXC_BASE_ADDR)) +#define IOMUXSW_MUX_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x008) +#define IOMUXSW_MUX_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x228) +#define IOMUXSW_PAD_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x22C) +#define IOMUXSW_PAD_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x414) +#define IOMUXSW_INPUT_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x460) +#define IOMUXSW_INPUT_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x580) + +#define MUX_PIN_NUM_MAX \ + (((IOMUXSW_MUX_END - IOMUXSW_MUX_CTL) >> 2) + 1) +#define MUX_INPUT_NUM_MUX \ + (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1) + +#define PIN_TO_IOMUX_INDEX(pin) (PIN_TO_IOMUX_MUX(pin) >> 2) + +static DEFINE_SPINLOCK(gpio_mux_lock); +static u8 iomux_pin_res_table[MUX_PIN_NUM_MAX]; +#define MUX_USED 0x80 + +/*! + * This function is used to configure a pin through the IOMUX module. + * FIXED ME: for backward compatible. Will be static function! + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param cfg an output function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + u32 ret = 0; + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + void *mux_reg = IOMUXGPR + PIN_TO_IOMUX_MUX(pin); + u8 *rp; + + BUG_ON(pin_index > MUX_PIN_NUM_MAX); + BUG_ON((mux_reg > IOMUXSW_MUX_END) || (mux_reg < IOMUXSW_MUX_CTL)); + spin_lock(&gpio_mux_lock); + __raw_writel(cfg, mux_reg); + /* + * Log a warning if a pin changes ownership + */ + rp = iomux_pin_res_table + pin_index; + if (*rp && *rp != (cfg | MUX_USED)) { + /*Console: how to do */ + printk(KERN_ERR "iomux_config_mux: Warning: iomux pin" + " config changed, index=%d register=%p, " + " prev=0x%x new=0x%x\n", pin_index, mux_reg, + *rp, cfg); + ret = -EINVAL; + } + *rp = cfg | MUX_USED; + spin_unlock(&gpio_mux_lock); + + return ret; +} + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + int ret = iomux_config_mux(pin, cfg); + if (IOMUX_TO_GPIO(pin) < MXC_GPIO_IRQS) { + if (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_GPIO) || + (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_FUNC) && + ((pin == MX25_PIN_GPIO_A) || (pin == MX25_PIN_GPIO_B) || + (pin == MX25_PIN_GPIO_C) || (pin == MX25_PIN_GPIO_D) || + (pin == MX25_PIN_GPIO_E) || (pin == MX25_PIN_GPIO_F)))) + ret |= gpio_request(IOMUX_TO_GPIO(pin), NULL); + } + return ret; +} +EXPORT_SYMBOL(mxc_request_iomux); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg) +{ + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + u8 *rp = iomux_pin_res_table + pin_index; + + BUG_ON((pin_index > MUX_PIN_NUM_MAX)); + + *rp = 0; + if (IOMUX_TO_GPIO(pin) < MXC_GPIO_IRQS) { + if (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_GPIO) || + (((cfg & (~MUX_CONFIG_SION)) == MUX_CONFIG_FUNC) && + ((pin == MX25_PIN_GPIO_A) || (pin == MX25_PIN_GPIO_B) || + (pin == MX25_PIN_GPIO_C) || (pin == MX25_PIN_GPIO_D) || + (pin == MX25_PIN_GPIO_E) || (pin == MX25_PIN_GPIO_F)))) + gpio_free(IOMUX_TO_GPIO(pin)); + } +} +EXPORT_SYMBOL(mxc_free_iomux); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config) +{ + void *pad_reg = IOMUXGPR + PIN_TO_IOMUX_PAD(pin); + + BUG_ON((pad_reg > IOMUXSW_PAD_END) || (pad_reg < IOMUXSW_PAD_CTL)); + + __raw_writel(config, pad_reg); +} +EXPORT_SYMBOL(mxc_iomux_set_pad); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en) +{ + u32 l; + + spin_lock(&gpio_mux_lock); + l = __raw_readl(IOMUXGPR); + + if (en) + l |= gp; + else + l &= ~gp; + + __raw_writel(l, IOMUXGPR); + spin_unlock(&gpio_mux_lock); +} +EXPORT_SYMBOL(mxc_iomux_set_gpr); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b + * #iomux_input_select_t + * @param config the binary value of elements defined in \b + * #iomux_input_config_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config) +{ + void *reg = IOMUXSW_INPUT_CTL + (input << 2); + + BUG_ON(input >= MUX_INPUT_NUM_MUX); + + __raw_writel(config, reg); +} +EXPORT_SYMBOL(mxc_iomux_set_input); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/usb_h2.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/usb_h2.c @@ -0,0 +1,97 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable) +{ + if (enable) + USBCTRL |= UCTRL_H2WIE; + else + USBCTRL &= ~UCTRL_H2WIE; +} + +static struct fsl_usb2_platform_data usbh2_config = { + .name = "Host 2", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_SERIAL, + .power_budget = 500, /* via RT9702 */ + .gpio_usb_active = gpio_usbh2_active, + .gpio_usb_inactive = gpio_usbh2_inactive, + .transceiver = "serial", /* on-chip */ + .wake_up_enable = _wake_up_enable, +}; + +static struct resource usbh2_resources[] = { + [0] = { + .start = (u32) (USB_H2REGS_BASE), + .end = (u32) (USB_H2REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_HTG, + .flags = IORESOURCE_IRQ, + }, +}; + +void usbh2_get_xcvr_power(struct device *dev) +{ + struct regulator *usbh2_regux; + + usbh2_regux = regulator_get(dev, "GPO1"); + regulator_enable(usbh2_regux); + ((struct fsl_usb2_platform_data *)dev->platform_data)-> + xcvr_pwr->regu1 = usbh2_regux; + + usbh2_regux = regulator_get(dev, "GPO3"); + regulator_enable(usbh2_regux); + ((struct fsl_usb2_platform_data *)dev->platform_data)-> + xcvr_pwr->regu2 = usbh2_regux; +} +EXPORT_SYMBOL(usbh2_get_xcvr_power); + +void usbh2_put_xcvr_power(struct device *dev) +{ + struct regulator *usbh2_regux; + + usbh2_regux = ((struct fsl_usb2_platform_data *)dev-> + platform_data)->xcvr_pwr->regu2; + regulator_disable(usbh2_regux); + regulator_put(usbh2_regux); + + usbh2_regux = ((struct fsl_usb2_platform_data *)dev-> + platform_data)->xcvr_pwr->regu1; + regulator_disable(usbh2_regux); + regulator_put(usbh2_regux); +} +EXPORT_SYMBOL(usbh2_put_xcvr_power); + +static int __init usbh2_init(void) +{ + pr_debug("%s: \n", __func__); + + host_pdev_register(usbh2_resources, ARRAY_SIZE(usbh2_resources), + &usbh2_config); + return 0; +} +module_init(usbh2_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/crm_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/crm_regs.h @@ -0,0 +1,215 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX25_CRM_REGS_H__ +#define __ARCH_ARM_MACH_MX25_CRM_REGS_H__ + +#include + +#define MXC_CCM_BASE ((char *)IO_ADDRESS(CCM_BASE_ADDR)) + +/* Register offsets */ +#define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x00) +#define MXC_CCM_UPCTL (MXC_CCM_BASE + 0x04) +#define MXC_CCM_CCTL (MXC_CCM_BASE + 0x08) +#define MXC_CCM_CGCR0 (MXC_CCM_BASE + 0x0C) +#define MXC_CCM_CGCR1 (MXC_CCM_BASE + 0x10) +#define MXC_CCM_CGCR2 (MXC_CCM_BASE + 0x14) +#define MXC_CCM_PCDR0 (MXC_CCM_BASE + 0x18) +#define MXC_CCM_PCDR1 (MXC_CCM_BASE + 0x1C) +#define MXC_CCM_PCDR2 (MXC_CCM_BASE + 0x20) +#define MXC_CCM_PCDR3 (MXC_CCM_BASE + 0x24) +#define MXC_CCM_RCSR (MXC_CCM_BASE + 0x28) +#define MXC_CCM_CRDR (MXC_CCM_BASE + 0x2C) +#define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x30) +#define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x34) +#define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x38) +#define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x3C) +#define MXC_CCM_LTR0 (MXC_CCM_BASE + 0x40) +#define MXC_CCM_LTR1 (MXC_CCM_BASE + 0x44) +#define MXC_CCM_LTR2 (MXC_CCM_BASE + 0x48) +#define MXC_CCM_LTR3 (MXC_CCM_BASE + 0x4C) +#define MXC_CCM_LTBR0 (MXC_CCM_BASE + 0x50) +#define MXC_CCM_LTBR1 (MXC_CCM_BASE + 0x54) +#define MXC_CCM_PMCR0 (MXC_CCM_BASE + 0x58) +#define MXC_CCM_PMCR1 (MXC_CCM_BASE + 0x5C) +#define MXC_CCM_PMCR2 (MXC_CCM_BASE + 0x60) +#define MXC_CCM_MCR (MXC_CCM_BASE + 0x64) +#define MXC_CCM_LPIMR0 (MXC_CCM_BASE + 0x68) +#define MXC_CCM_LPIMR1 (MXC_CCM_BASE + 0x6C) + +#define MXC_CCM_MPCTL_BRMO (1 << 31) +#define MXC_CCM_MPCTL_PD_OFFSET 26 +#define MXC_CCM_MPCTL_PD_MASK (0xf << 26) +#define MXC_CCM_MPCTL_MFD_OFFSET 16 +#define MXC_CCM_MPCTL_MFD_MASK (0x3ff << 16) +#define MXC_CCM_MPCTL_MFI_OFFSET 10 +#define MXC_CCM_MPCTL_MFI_MASK (0xf << 10) +#define MXC_CCM_MPCTL_MFN_OFFSET 0 +#define MXC_CCM_MPCTL_MFN_MASK 0x3ff +#define MXC_CCM_MPCTL_LF (1 << 15) + +#define MXC_CCM_UPCTL_BRMO (1 << 31) +#define MXC_CCM_UPCTL_PD_OFFSET 26 +#define MXC_CCM_UPCTL_PD_MASK (0xf << 26) +#define MXC_CCM_UPCTL_MFD_OFFSET 16 +#define MXC_CCM_UPCTL_MFD_MASK (0x3ff << 16) +#define MXC_CCM_UPCTL_MFI_OFFSET 10 +#define MXC_CCM_UPCTL_MFI_MASK (0xf << 10) +#define MXC_CCM_UPCTL_MFN_OFFSET 0 +#define MXC_CCM_UPCTL_MFN_MASK 0x3ff +#define MXC_CCM_UPCTL_LF (1 << 15) + +#define MXC_CCM_CCTL_ARM_OFFSET 30 +#define MXC_CCM_CCTL_ARM_MASK (0x3 << 30) +#define MXC_CCM_CCTL_AHB_OFFSET 28 +#define MXC_CCM_CCTL_AHB_MASK (0x3 << 28) +#define MXC_CCM_CCTL_MPLL_RST (1 << 27) +#define MXC_CCM_CCTL_UPLL_RST (1 << 26) +#define MXC_CCM_CCTL_LP_CTL_OFFSET 24 +#define MXC_CCM_CCTL_LP_CTL_MASK (0x3 << 24) +#define MXC_CCM_CCTL_LP_MODE_RUN (0x0 << 24) +#define MXC_CCM_CCTL_LP_MODE_WAIT (0x1 << 24) +#define MXC_CCM_CCTL_LP_MODE_DOZE (0x2 << 24) +#define MXC_CCM_CCTL_LP_MODE_STOP (0x3 << 24) +#define MXC_CCM_CCTL_UPLL_DISABLE (1 << 23) +#define MXC_CCM_CCTL_MPLL_BYPASS (1 << 22) +#define MXC_CCM_CCTL_USB_DIV_OFFSET 16 +#define MXC_CCM_CCTL_USB_DIV_MASK (0x3 << 16) +#define MXC_CCM_CCTL_CG_CTRL (1 << 15) +#define MXC_CCM_CCTL_ARM_SRC (1 << 14) +#define MXC_CCM_CCTL_ARM_SRC_OFFSET 14 + +#define MXC_CCM_CGCR0_HCLK_ATA_OFFSET 16 +#define MXC_CCM_CGCR0_HCLK_BROM_OFFSET 17 +#define MXC_CCM_CGCR0_HCLK_CSI_OFFSET 18 +#define MXC_CCM_CGCR0_HCLK_EMI_OFFSET 19 +#define MXC_CCM_CGCR0_HCLK_ESAI_OFFSET 20 +#define MXC_CCM_CGCR0_HCLK_ESDHC1_OFFSET 21 +#define MXC_CCM_CGCR0_HCLK_ESDHC2_OFFSET 22 +#define MXC_CCM_CGCR0_HCLK_FEC_OFFSET 23 +#define MXC_CCM_CGCR0_HCLK_LCDC_OFFSET 24 +#define MXC_CCM_CGCR0_HCLK_RTIC_OFFSET 25 +#define MXC_CCM_CGCR0_HCLK_SDMA_OFFSET 26 +#define MXC_CCM_CGCR0_HCLK_SLCDC_OFFSET 27 +#define MXC_CCM_CGCR0_HCLK_USBOTG_OFFSET 28 + +#define MXC_CCM_CGCR0_PER_CSI_OFFSET 0 +#define MXC_CCM_CGCR0_PER_EPIT_OFFSET 1 +#define MXC_CCM_CGCR0_PER_ESAI_OFFSET 2 +#define MXC_CCM_CGCR0_PER_ESDHC1_OFFSET 3 +#define MXC_CCM_CGCR0_PER_ESDHC2_OFFSET 4 +#define MXC_CCM_CGCR0_PER_GPT_OFFSET 5 +#define MXC_CCM_CGCR0_PER_I2C_OFFSET 6 +#define MXC_CCM_CGCR0_PER_LCDC_OFFSET 7 +#define MXC_CCM_CGCR0_PER_NFC_OFFSET 8 +#define MXC_CCM_CGCR0_PER_OWIRE_OFFSET 9 +#define MXC_CCM_CGCR0_PER_PWM_OFFSET 10 +#define MXC_CCM_CGCR0_PER_SIM1_OFFSET 11 +#define MXC_CCM_CGCR0_PER_SIM2_OFFSET 12 +#define MXC_CCM_CGCR0_PER_SSI1_OFFSET 13 +#define MXC_CCM_CGCR0_PER_SSI2_OFFSET 14 +#define MXC_CCM_CGCR0_PER_UART_OFFSET 15 + +#define MXC_CCM_CGCR1_AUDMUX_OFFSET 0 +#define MXC_CCM_CGCR1_ATA_OFFSET 1 +#define MXC_CCM_CGCR1_CAN1_OFFSET 2 +#define MXC_CCM_CGCR1_CAN2_OFFSET 3 +#define MXC_CCM_CGCR1_CSI_OFFSET 4 +#define MXC_CCM_CGCR1_CSPI1_OFFSET 5 +#define MXC_CCM_CGCR1_CSPI2_OFFSET 6 +#define MXC_CCM_CGCR1_CSPI3_OFFSET 7 +#define MXC_CCM_CGCR1_DRYICE_OFFSET 8 +#define MXC_CCM_CGCR1_ECT_OFFSET 9 +#define MXC_CCM_CGCR1_EPIT1_OFFSET 10 +#define MXC_CCM_CGCR1_EPIT2_OFFSET 11 +#define MXC_CCM_CGCR1_ESAI_OFFSET 12 +#define MXC_CCM_CGCR1_ESDHC1_OFFSET 13 +#define MXC_CCM_CGCR1_ESDHC2_OFFSET 14 +#define MXC_CCM_CGCR1_FEC_OFFSET 15 +#define MXC_CCM_CGCR1_GPIO1_OFFSET 16 +#define MXC_CCM_CGCR1_GPIO2_OFFSET 17 +#define MXC_CCM_CGCR1_GPIO3_OFFSET 18 +#define MXC_CCM_CGCR1_GPT1_OFFSET 19 +#define MXC_CCM_CGCR1_GPT2_OFFSET 20 +#define MXC_CCM_CGCR1_GPT3_OFFSET 21 +#define MXC_CCM_CGCR1_GPT4_OFFSET 22 +#define MXC_CCM_CGCR1_I2C1_OFFSET 23 +#define MXC_CCM_CGCR1_I2C2_OFFSET 24 +#define MXC_CCM_CGCR1_I2C3_OFFSET 25 +#define MXC_CCM_CGCR1_IIM_OFFSET 26 +#define MXC_CCM_CGCR1_IOMUXC_OFFSET 27 +#define MXC_CCM_CGCR1_KPP_OFFSET 28 +#define MXC_CCM_CGCR1_LCDC_OFFSET 29 +#define MXC_CCM_CGCR1_OWIRE_OFFSET 30 +#define MXC_CCM_CGCR1_PWM1_OFFSET 31 + +#define MXC_CCM_CGCR2_PWM2_OFFSET (32-32) +#define MXC_CCM_CGCR2_PWM3_OFFSET (33-32) +#define MXC_CCM_CGCR2_PWM4_OFFSET (34-32) +#define MXC_CCM_CGCR2_RNGB_OFFSET (35-32) +#define MXC_CCM_CGCR2_RTIC_OFFSET (36-32) +#define MXC_CCM_CGCR2_SCC_OFFSET (37-32) +#define MXC_CCM_CGCR2_SDMA_OFFSET (38-32) +#define MXC_CCM_CGCR2_SIM1_OFFSET (39-32) +#define MXC_CCM_CGCR2_SIM2_OFFSET (40-32) +#define MXC_CCM_CGCR2_SLCDC_OFFSET (41-32) +#define MXC_CCM_CGCR2_SPBA_OFFSET (42-32) +#define MXC_CCM_CGCR2_SSI1_OFFSET (43-32) +#define MXC_CCM_CGCR2_SSI2_OFFSET (44-32) +#define MXC_CCM_CGCR2_TCHSCRN_OFFSET (45-32) +#define MXC_CCM_CGCR2_UART1_OFFSET (46-32) +#define MXC_CCM_CGCR2_UART2_OFFSET (47-32) +#define MXC_CCM_CGCR2_UART3_OFFSET (48-32) +#define MXC_CCM_CGCR2_UART4_OFFSET (49-32) +#define MXC_CCM_CGCR2_UART5_OFFSET (50-32) +#define MXC_CCM_CGCR2_WDOG_OFFSET (51-32) + +#define MXC_CCM_CGCR0_STOP_MODE_MASK \ + ((1 << MXC_CCM_CGCR0_HCLK_SLCDC_OFFSET) | \ + (1 << MXC_CCM_CGCR0_HCLK_RTIC_OFFSET) | \ + (1 << MXC_CCM_CGCR0_HCLK_EMI_OFFSET) | \ + (1 << MXC_CCM_CGCR0_HCLK_BROM_OFFSET)) + +#define MXC_CCM_CGCR1_STOP_MODE_MASK ((1 << MXC_CCM_CGCR1_IIM_OFFSET) | \ + (1 << MXC_CCM_CGCR1_CAN2_OFFSET) | \ + (1 << MXC_CCM_CGCR1_CAN1_OFFSET)) + +#define MXC_CCM_CGCR2_STOP_MODE_MASK ((1 << MXC_CCM_CGCR2_SPBA_OFFSET) | \ + (1 << MXC_CCM_CGCR2_SDMA_OFFSET) | \ + (1 << MXC_CCM_CGCR2_RTIC_OFFSET)) + +#define MXC_CCM_PCDR1_PERDIV1_MASK 0x3f + +#define MXC_CCM_RCSR_NF16B (1 << 14) + +#define MXC_CCM_PMCR2_VSTBY (1 << 17) +#define MXC_CCM_PMCR2_OSC24M_DOWN (1 << 16) + +#define MXC_CCM_MCR_USB_XTAL_MUX_OFFSET 31 +#define MXC_CCM_MCR_CLKO_EN_OFFSET 30 +#define MXC_CCM_MCR_CLKO_DIV_OFFSET 24 +#define MXC_CCM_MCR_CLKO_DIV_MASK (0x3F << 24) +#define MXC_CCM_MCR_CLKO_SEL_OFFSET 20 +#define MXC_CCM_MCR_CLKO_SEL_MASK (0xF << 20) +#define MXC_CCM_MCR_ESAI_CLK_MUX_OFFSET 19 +#define MXC_CCM_MCR_SSI2_CLK_MUX_OFFSET 18 +#define MXC_CCM_MCR_SSI1_CLK_MUX_OFFSET 17 +#define MXC_CCM_MCR_USB_CLK_MUX_OFFSET 16 + +#define MXC_CCM_MCR_PER_CLK_MUX_MASK (0xFFFF << 0) + +#define MXC_CCM_LPIMR0_MASK 0xFFFFFFFF +#define MXC_CCM_LPIMR1_MASK 0xFFFFFFFF + +#endif /* __ARCH_ARM_MACH_MX25_CRM_REGS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/iomux.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/iomux.h @@ -0,0 +1,233 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MACH_MX25_IOMUX_H__ +#define __MACH_MX25_IOMUX_H__ + +#include +#include +#include "mx25_pins.h" + +/*! + * @file mach-mx25/iomux.h + * + * @brief I/O Muxing control definitions and functions + * + * @ingroup GPIO_MX25 + */ + +typedef unsigned int iomux_pin_name_t; + +/*! + * IOMUX functions + * SW_MUX_CTL + */ +typedef enum iomux_pin_config { + MUX_CONFIG_FUNC = 0, /*!< used as function */ + MUX_CONFIG_ALT1, /*!< used as alternate function 1 */ + MUX_CONFIG_ALT2, /*!< used as alternate function 2 */ + MUX_CONFIG_ALT3, /*!< used as alternate function 3 */ + MUX_CONFIG_ALT4, /*!< used as alternate function 4 */ + MUX_CONFIG_ALT5, /*!< used as alternate function 5 */ + MUX_CONFIG_ALT6, /*!< used as alternate function 6 */ + MUX_CONFIG_ALT7, /*!< used as alternate function 7 */ + MUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */ + MUX_CONFIG_GPIO = MUX_CONFIG_ALT5, /*!< used as GPIO */ +} iomux_pin_cfg_t; + +/*! + * IOMUX pad functions + * SW_PAD_CTL + */ +typedef enum iomux_pad_config { + PAD_CTL_DRV_3_3V = 0x0 << 13, + PAD_CTL_DRV_1_8V = 0x1 << 13, + PAD_CTL_HYS_CMOS = 0x0 << 8, + PAD_CTL_HYS_SCHMITZ = 0x1 << 8, + PAD_CTL_PKE_NONE = 0x0 << 7, + PAD_CTL_PKE_ENABLE = 0x1 << 7, + PAD_CTL_PUE_KEEPER = 0x0 << 6, + PAD_CTL_PUE_PULL = 0x1 << 6, + PAD_CTL_PUE_PUD = 0x1 << 6, + PAD_CTL_100K_PD = 0x0 << 4, + PAD_CTL_47K_PU = 0x1 << 4, + PAD_CTL_100K_PU = 0x2 << 4, + PAD_CTL_22K_PU = 0x3 << 4, + PAD_CTL_ODE_CMOS = 0x0 << 3, + PAD_CTL_ODE_OpenDrain = 0x1 << 3, + PAD_CTL_DRV_NORMAL = 0x0 << 1, + PAD_CTL_DRV_HIGH = 0x1 << 1, + PAD_CTL_DRV_MAX = 0x2 << 1, + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0 +} iomux_pad_config_t; + +/*! + * IOMUX general purpose functions + * IOMUXC_GPR1 + */ +typedef enum iomux_gp_func { + MUX_SDCTL_CSD0_SEL = 0x1 << 0, + MUX_SDCTL_CSD1_SEL = 0x1 << 1, +} iomux_gp_func_t; + +/*! + * IOMUX SELECT_INPUT register index + * Base register is IOMUXSW_INPUT_CTL in iomux.c + */ +typedef enum iomux_input_select { + MUX_IN_AUDMUX_P4_INPUT_DA_AMX = 0, + MUX_IN_AUDMUX_P4_INPUT_DB_AMX, + MUX_IN_AUDMUX_P4_INPUT_RXCLK_AMX, + MUX_IN_AUDMUX_P4_INPUT_RXFS_AMX, + MUX_IN_AUDMUX_P4_INPUT_TXCLK_AMX, + MUX_IN_AUDMUX_P4_INPUT_TXFS_AMX, + MUX_IN_AUDMUX_P7_INPUT_DA_AMX, + MUX_IN_AUDMUX_P7_INPUT_TXFS_AMX, + MUX_IN_CAN1_IPP_IND_CANRX, + MUX_IN_CAN2_IPP_IND_CANRX, + MUX_IN_CSI_IPP_CSI_D_0, + MUX_IN_CSI_IPP_CSI_D_1, + MUX_IN_CSPI1_IPP_IND_SS3_B, + MUX_IN_CSPI2_IPP_CSPI_CLK_IN, + MUX_IN_CSPI2_IPP_IND_DATAREADY_B, + MUX_IN_CSPI2_IPP_IND_MISO, + MUX_IN_CSPI2_IPP_IND_MOSI, + MUX_IN_CSPI2_IPP_IND_SS0_B, + MUX_IN_CSPI2_IPP_IND_SS1_B, + MUX_IN_CSPI3_IPP_CSPI_CLK_IN, + MUX_IN_CSPI3_IPP_IND_DATAREADY_B, + MUX_IN_CSPI3_IPP_IND_MISO, + MUX_IN_CSPI3_IPP_IND_MOSI, + MUX_IN_CSPI3_IPP_IND_SS0_B, + MUX_IN_CSPI3_IPP_IND_SS1_B, + MUX_IN_CSPI3_IPP_IND_SS2_B, + MUX_IN_CSPI3_IPP_IND_SS3_B, + MUX_IN_ESDHC1_IPP_DAT4_IN, + MUX_IN_ESDHC1_IPP_DAT5_IN, + MUX_IN_ESDHC1_IPP_DAT6_IN, + MUX_IN_ESDHC1_IPP_DAT7_IN, + MUX_IN_ESDHC2_IPP_CARD_CLK_IN, + MUX_IN_ESDHC2_IPP_CMD_IN, + MUX_IN_ESDHC2_IPP_DAT0_IN, + MUX_IN_ESDHC2_IPP_DAT1_IN, + MUX_IN_ESDHC2_IPP_DAT2_IN, + MUX_IN_ESDHC2_IPP_DAT3_IN, + MUX_IN_ESDHC2_IPP_DAT4_IN, + MUX_IN_ESDHC2_IPP_DAT5_IN, + MUX_IN_ESDHC2_IPP_DAT6_IN, + MUX_IN_ESDHC2_IPP_DAT7_IN, + MUX_IN_FEC_FEC_COL, + MUX_IN_FEC_FEC_CRS, + MUX_IN_FEC_FEC_RDATA_2, + MUX_IN_FEC_FEC_RDATA_3, + MUX_IN_FEC_FEC_RX_CLK, + MUX_IN_FEC_FEC_RX_ER, + MUX_IN_I2C2_IPP_SCL_IN, + MUX_IN_I2C2_IPP_SDA_IN, + MUX_IN_I2C3_IPP_SCL_IN, + MUX_IN_I2C3_IPP_SDA_IN, + MUX_IN_KPP_IPP_IND_COL_4, + MUX_IN_KPP_IPP_IND_COL_5, + MUX_IN_KPP_IPP_IND_COL_6, + MUX_IN_KPP_IPP_IND_COL_7, + MUX_IN_KPP_IPP_IND_ROW_4, + MUX_IN_KPP_IPP_IND_ROW_5, + MUX_IN_KPP_IPP_IND_ROW_6, + MUX_IN_KPP_IPP_IND_ROW_7, + MUX_IN_SIM1_PIN_SIM_RCVD1_IN, + MUX_IN_SIM1_PIN_SIM_SIMPD1, + MUX_IN_SIM1_SIM_RCVD1_IO, + MUX_IN_SIM2_PIN_SIM_RCVD1_IN, + MUX_IN_SIM2_PIN_SIM_SIMPD1, + MUX_IN_SIM2_SIM_RCVD1_IO, + MUX_IN_UART3_IPP_UART_RTS_B, + MUX_IN_UART3_IPP_UART_RXD_MUX, + MUX_IN_UART4_IPP_UART_RTS_B, + MUX_IN_UART4_IPP_UART_RXD_MUX, + MUX_IN_UART5_IPP_UART_RTS_B, + MUX_IN_UART5_IPP_UART_RXD_MUX, + MUX_IN_USB_TOP_IPP_IND_OTG_USB_OC, + MUX_IN_USB_TOP_IPP_IND_UH2_USB_OC, +} iomux_input_select_t; + +/*! + * IOMUX input functions + * SW_SELECT_INPUT bits 2-0 + */ +typedef enum iomux_input_config { + INPUT_CTL_PATH0 = 0x0, + INPUT_CTL_PATH1, + INPUT_CTL_PATH2, + INPUT_CTL_PATH3, + INPUT_CTL_PATH4, + INPUT_CTL_PATH5, + INPUT_CTL_PATH6, + INPUT_CTL_PATH7, +} iomux_input_cfg_t; + +struct mxc_iomux_pin_cfg { + iomux_pin_name_t pin; + u8 mux_mode; + u16 pad_cfg; + u8 in_select; + u8 in_mode; +}; + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param cfg an input function as defined in \b #iomux_pin_cfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b + * #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b + * #iomux_input_select_t + * @param config the binary value of elements defined in \b + * #iomux_input_cfg_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config); +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/serial.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/serial.h @@ -0,0 +1,158 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX25_SERIAL_H__ +#define __ARCH_ARM_MACH_MX25_SERIAL_H__ + +/*! + * @file mach-mx25/serial.h + * + * @ingroup MSL_MX25 + */ +#include + +/* UART 1 configuration */ +/*! + * This option allows to choose either an interrupt-driven software controlled + * hardware flow control (set this option to 0) or hardware-driven hardware + * flow control (set this option to 1). + */ +#define UART1_HW_FLOW 1 +/*! + * This specifies the threshold at which the CTS pin is deasserted by the + * RXFIFO. Set this value in Decimal to anything from 0 to 32 for + * hardware-driven hardware flow control. Read the HW spec while specifying + * this value. When using interrupt-driven software controlled hardware + * flow control set this option to -1. + */ +#define UART1_UCR4_CTSTL 16 +/*! + * This is option to enable (set this option to 1) or disable DMA data transfer + */ +#define UART1_DMA_ENABLE 0 +/*! + * Specify the size of the DMA receive buffer. The minimum buffer size is 512 + * bytes. The buffer size should be a multiple of 256. + */ +#define UART1_DMA_RXBUFSIZE 1024 +/*! + * Specify the MXC UART's Receive Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the RxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_RXTL 16 +/*! + * Specify the MXC UART's Transmit Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the TxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_TXTL 16 +/* UART 2 configuration */ +#define UART2_HW_FLOW 0 +#define UART2_UCR4_CTSTL (-1) +#define UART2_DMA_ENABLE 0 +#define UART2_DMA_RXBUFSIZE 512 +#define UART2_UFCR_RXTL 16 +#define UART2_UFCR_TXTL 16 +/* UART 3 configuration */ +#define UART3_HW_FLOW 1 +#define UART3_UCR4_CTSTL 16 +#define UART3_DMA_ENABLE 1 +#define UART3_DMA_RXBUFSIZE 1024 +#define UART3_UFCR_RXTL 16 +#define UART3_UFCR_TXTL 16 +/* UART 4 configuration */ +#define UART4_HW_FLOW 1 +#define UART4_UCR4_CTSTL 16 +#define UART4_DMA_ENABLE 1 +#define UART4_DMA_RXBUFSIZE 1024 +#define UART4_UFCR_RXTL 16 +#define UART4_UFCR_TXTL 16 +/* UART 5 configuration */ +#define UART5_HW_FLOW 1 +#define UART5_UCR4_CTSTL 16 +#define UART5_DMA_ENABLE 1 +#define UART5_DMA_RXBUFSIZE 1024 +#define UART5_UFCR_RXTL 16 +#define UART5_UFCR_TXTL 16 + +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +/* + * Is the MUXED interrupt output sent to the ARM core + */ +#define INTS_NOTMUXED 0 +#define INTS_MUXED 1 +/* UART 1 configuration */ +/*! + * This define specifies whether the muxed ANDed interrupt line or the + * individual interrupts from the UART port is integrated with the ARM core. + * There exists a define like this for each UART port. Valid values that can + * be used are \b INTS_NOTMUXED or \b INTS_MUXED. + */ +#define UART1_MUX_INTS INTS_MUXED +/*! + * This define specifies the transmitter interrupt number or the interrupt + * number of the ANDed interrupt in case the interrupts are muxed. There exists + * a define like this for each UART port. + */ +#define UART1_INT1 MXC_INT_UART1 +/*! + * This define specifies the receiver interrupt number. If the interrupts of + * the UART are muxed, then we specify here a dummy value -1. There exists a + * define like this for each UART port. + */ +#define UART1_INT2 (-1) +/*! + * This specifies the master interrupt number. If the interrupts of the UART + * are muxed, then we specify here a dummy value of -1. There exists a define + * like this for each UART port. + */ +#define UART1_INT3 (-1) +/*! + * This specifies if the UART is a shared peripheral. It holds the shared + * peripheral number if it is shared or -1 if it is not shared. There exists + * a define like this for each UART port. + */ +#define UART1_SHARED_PERI (-1) +/* UART 2 configuration */ +#define UART2_MUX_INTS INTS_MUXED +#define UART2_INT1 MXC_INT_UART2 +#define UART2_INT2 (-1) +#define UART2_INT3 (-1) +#define UART2_SHARED_PERI (-1) +/* UART 3 configuration */ +#define UART3_MUX_INTS INTS_MUXED +#define UART3_INT1 MXC_INT_UART3 +#define UART3_INT2 (-1) +#define UART3_INT3 (-1) +#define UART3_SHARED_PERI SPBA_UART3 +/* UART 4 configuration */ +#define UART4_MUX_INTS INTS_MUXED +#define UART4_INT1 MXC_INT_UART4 +#define UART4_INT2 (-1) +#define UART4_INT3 (-1) +#define UART4_SHARED_PERI SPBA_UART4 +/* UART 5 configuration */ +#define UART5_MUX_INTS INTS_MUXED +#define UART5_INT1 MXC_INT_UART5 +#define UART5_INT2 (-1) +#define UART5_INT3 (-1) +#define UART5_SHARED_PERI SPBA_UART5 + +#endif /* __ARCH_ARM_MACH_MX25_SERIAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx25/serial.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx25/serial.c @@ -0,0 +1,263 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file mach-mx25/serial.c + * + * @brief This file contains the UART initiliazation. + * + * @ingroup MSL_MX25 + */ +#include +#include +#include +#include +#include +#include +#include "serial.h" +#include "board-mx25_3stack.h" + +#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) + +/*! + * This is an array where each element holds information about a UART port, + * like base address of the UART, interrupt numbers etc. This structure is + * passed to the serial_core.c file. Based on which UART is used, the core file + * passes back the appropriate port structure as an argument to the control + * functions. + */ +static uart_mxc_port mxc_ports[] = { + [0] = { + .port = { + .membase = (void *)IO_ADDRESS(UART1_BASE_ADDR), + .mapbase = UART1_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART1_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .ints_muxed = UART1_MUX_INTS, + .irqs = {UART1_INT2, UART1_INT3}, + .mode = UART1_MODE, + .ir_mode = UART1_IR, + .enabled = UART1_ENABLED, + .hardware_flow = UART1_HW_FLOW, + .cts_threshold = UART1_UCR4_CTSTL, + .dma_enabled = UART1_DMA_ENABLE, + .dma_rxbuf_size = UART1_DMA_RXBUFSIZE, + .rx_threshold = UART1_UFCR_RXTL, + .tx_threshold = UART1_UFCR_TXTL, + .shared = UART1_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART1_TX, + .dma_rx_id = MXC_DMA_UART1_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, + [1] = { + .port = { + .membase = (void *)IO_ADDRESS(UART2_BASE_ADDR), + .mapbase = UART2_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART2_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 1, + }, + .ints_muxed = UART2_MUX_INTS, + .irqs = {UART2_INT2, UART2_INT3}, + .mode = UART2_MODE, + .ir_mode = UART2_IR, + .enabled = UART2_ENABLED, + .hardware_flow = UART2_HW_FLOW, + .cts_threshold = UART2_UCR4_CTSTL, + .dma_enabled = UART2_DMA_ENABLE, + .dma_rxbuf_size = UART2_DMA_RXBUFSIZE, + .rx_threshold = UART2_UFCR_RXTL, + .tx_threshold = UART2_UFCR_TXTL, + .shared = UART2_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART2_TX, + .dma_rx_id = MXC_DMA_UART2_RX, + .rxd_mux = MXC_UART_IR_RXDMUX, + }, +#if UART3_ENABLED == 1 + [2] = { + .port = { + .membase = (void *)IO_ADDRESS(UART3_BASE_ADDR), + .mapbase = UART3_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART3_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 2, + }, + .ints_muxed = UART3_MUX_INTS, + .irqs = {UART3_INT2, UART3_INT3}, + .mode = UART3_MODE, + .ir_mode = UART3_IR, + .enabled = UART3_ENABLED, + .hardware_flow = UART3_HW_FLOW, + .cts_threshold = UART3_UCR4_CTSTL, + .dma_enabled = UART3_DMA_ENABLE, + .dma_rxbuf_size = UART3_DMA_RXBUFSIZE, + .rx_threshold = UART3_UFCR_RXTL, + .tx_threshold = UART3_UFCR_TXTL, + .shared = UART3_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART3_TX, + .dma_rx_id = MXC_DMA_UART3_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, +#endif +#if UART4_ENABLED == 1 + [3] = { + .port = { + .membase = (void *)IO_ADDRESS(UART4_BASE_ADDR), + .mapbase = UART4_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART4_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 3, + }, + .ints_muxed = UART4_MUX_INTS, + .irqs = {UART4_INT2, UART4_INT3}, + .mode = UART4_MODE, + .ir_mode = UART4_IR, + .enabled = UART4_ENABLED, + .hardware_flow = UART4_HW_FLOW, + .cts_threshold = UART4_UCR4_CTSTL, + .dma_enabled = UART4_DMA_ENABLE, + .dma_rxbuf_size = UART4_DMA_RXBUFSIZE, + .rx_threshold = UART4_UFCR_RXTL, + .tx_threshold = UART4_UFCR_TXTL, + .shared = UART4_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART4_TX, + .dma_rx_id = MXC_DMA_UART4_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, +#endif +#if UART5_ENABLED == 1 + [4] = { + .port = { + .membase = (void *)IO_ADDRESS(UART5_BASE_ADDR), + .mapbase = UART5_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART5_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 4, + }, + .ints_muxed = UART5_MUX_INTS, + .irqs = {UART5_INT2, UART5_INT3}, + .mode = UART5_MODE, + .ir_mode = UART5_IR, + .enabled = UART5_ENABLED, + .hardware_flow = UART5_HW_FLOW, + .cts_threshold = UART5_UCR4_CTSTL, + .dma_enabled = UART5_DMA_ENABLE, + .dma_rxbuf_size = UART5_DMA_RXBUFSIZE, + .rx_threshold = UART5_UFCR_RXTL, + .tx_threshold = UART5_UFCR_TXTL, + .shared = UART5_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART5_TX, + .dma_rx_id = MXC_DMA_UART5_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, +#endif +}; + +static struct platform_device mxc_uart_device1 = { + .name = "mxcintuart", + .id = 0, + .dev = { + .platform_data = &mxc_ports[0], + }, +}; + +static struct platform_device mxc_uart_device2 = { + .name = "mxcintuart", + .id = 1, + .dev = { + .platform_data = &mxc_ports[1], + }, +}; + +#if UART3_ENABLED == 1 +static struct platform_device mxc_uart_device3 = { + .name = "mxcintuart", + .id = 2, + .dev = { + .platform_data = &mxc_ports[2], + }, +}; +#endif +#if UART4_ENABLED == 1 +static struct platform_device mxc_uart_device4 = { + .name = "mxcintuart", + .id = 3, + .dev = { + .platform_data = &mxc_ports[3], + }, +}; +#endif +#if UART5_ENABLED == 1 +static struct platform_device mxc_uart_device5 = { + .name = "mxcintuart", + .id = 4, + .dev = { + .platform_data = &mxc_ports[4], + }, +}; +#endif + +static int __init mxc_init_uart(void) +{ + /* Register all the MXC UART platform device structures */ + platform_device_register(&mxc_uart_device1); + platform_device_register(&mxc_uart_device2); + + /* Grab ownership of shared UARTs 3 and 4, only when enabled */ +#if UART3_ENABLED == 1 +#if UART3_DMA_ENABLE == 1 + spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART3_DMA_ENABLE */ + platform_device_register(&mxc_uart_device3); +#endif /* UART3_ENABLED */ +#if UART4_ENABLED == 1 +#if UART4_DMA_ENABLE == 1 + spba_take_ownership(UART4_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART4_SHARED_PERI, SPBA_MASTER_A); +#endif /* UARTr_DMA_ENABLE */ + platform_device_register(&mxc_uart_device4); +#endif /* UART4_ENABLED */ +#if UART5_ENABLED == 1 +#if UART5_DMA_ENABLE == 1 + spba_take_ownership(UART5_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART5_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART5_DMA_ENABLE */ + platform_device_register(&mxc_uart_device5); +#endif /* UART5_ENABLED */ + + return 0; +} + +#else +static int __init mxc_init_uart(void) +{ + return 0; +} +#endif + +arch_initcall(mxc_init_uart); --- linux-fsl-imx51-2.6.31.orig/arch/arm/vfp/vfpmodule.c +++ linux-fsl-imx51-2.6.31/arch/arm/vfp/vfpmodule.c @@ -382,12 +382,19 @@ #endif /* CONFIG_PM */ /* - * Synchronise the hardware VFP state of a thread other than current with the - * saved one. This function is used by the ptrace mechanism. + * Synchronise the hardware VFP state of a thread with the saved one. + * This function is used by the ptrace mechanism and the signal handler path. */ -#ifdef CONFIG_SMP void vfp_sync_state(struct thread_info *thread) { + unsigned int cpu = get_cpu(); + u32 fpexc = fmrx(FPEXC); + int vfp_enabled; + int self; + + vfp_enabled = fpexc & FPEXC_EN; + self = thread == current_thread_info(); +#ifdef CONFIG_SMP /* * On SMP systems, the VFP state is automatically saved at every * context switch. We mark the thread VFP state as belonging to a @@ -395,18 +402,22 @@ * needed. */ thread->vfpstate.hard.cpu = NR_CPUS; -} -#else -void vfp_sync_state(struct thread_info *thread) -{ - unsigned int cpu = get_cpu(); - u32 fpexc = fmrx(FPEXC); - /* - * If VFP is enabled, the previous state was already saved and - * last_VFP_context updated. + * Only the current thread's saved VFP context can be out-of-date. + * For others there is nothing else to do, since we already ensured + * force loading above. + */ + if (!self) + goto out; +#endif + /* + * If the VFP is enabled only the current thread's saved VFP + * context can get out-of-date. For other threads the context + * was updated when the current thread started to use the VFP. + * This also means that the context will be reloaded next time + * the thread uses the VFP, so no need to enforce it. */ - if (fpexc & FPEXC_EN) + if (vfp_enabled && !self) goto out; if (!last_VFP_context[cpu]) @@ -415,8 +426,14 @@ /* * Save the last VFP state on this CPU. */ - fmxr(FPEXC, fpexc | FPEXC_EN); + if (!vfp_enabled) + fmxr(FPEXC, fpexc | FPEXC_EN); vfp_save_state(last_VFP_context[cpu], fpexc); + /* + * Disable VFP in case it was enabled so that the force reload + * can happen. + */ + fpexc &= ~FPEXC_EN; fmxr(FPEXC, fpexc); /* @@ -428,10 +445,13 @@ out: put_cpu(); } -#endif #include +#if defined(CONFIG_ARCH_MX51) && defined(CONFIG_NEON) +#include +#endif + /* * VFP support code initialisation. */ @@ -498,7 +518,8 @@ * load/store instructions, integer and single * precision floating point operations. */ - if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100) + if (((fmrx(MVFR1) & 0x000fff00) == 0x00011100) + && cpu_is_mx51_rev(CHIP_REV_3_0) > 0) elf_hwcap |= HWCAP_NEON; #endif } --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/devices.c @@ -3,7 +3,7 @@ * * Embedded Alley Solutions, Inc * -* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. +* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -20,19 +20,33 @@ #include #include #include +#include +#include +#include #include #include #include +#include #include #include #include #include #include #include +#include +#include +#include +#include +#include static u64 common_dmamask = DMA_BIT_MASK(32); +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + static struct resource appuart_resources[] = { { .start = IRQ_UARTAPP_INTERNAL, @@ -48,7 +62,7 @@ .flags = IORESOURCE_IRQ, }, { .start = REGS_UARTAPP1_PHYS, - .end = REGS_UARTAPP1_PHYS + REGS_UARTAPP_SIZE, + .end = REGS_UARTAPP1_PHYS + REGS_UARTAPP_SIZE - 1, .flags = IORESOURCE_MEM, }, { /* Rx DMA channel */ @@ -63,20 +77,33 @@ }, }; + struct platform_device stmp3xxx_appuart = { .name = "stmp3xxx-appuart", .id = 0, .resource = appuart_resources, .num_resources = ARRAY_SIZE(appuart_resources), .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, }; +struct platform_device stmp3xxx_dbguart = { + .name = "stmp3xxx-dbguart", + .id = -1, + .dev = { + .release = mxc_nop_release, + }, +}; + struct platform_device stmp3xxx_watchdog = { .name = "stmp3xxx_wdt", .id = -1, + .dev = { + .release = mxc_nop_release, + }, }; static struct resource ts_resource[] = { @@ -94,23 +121,39 @@ struct platform_device stmp3xxx_touchscreen = { .name = "stmp3xxx_ts", .id = -1, + .dev = { + .release = mxc_nop_release, + }, .resource = ts_resource, .num_resources = ARRAY_SIZE(ts_resource), }; +static struct resource keyboard_resource[] = { + { + .flags = IORESOURCE_IRQ, + .start = IRQ_LRADC_CH0, + .end = IRQ_LRADC_CH0, + }, +}; + /* * Keypad device */ struct platform_device stmp3xxx_keyboard = { .name = "stmp3xxx-keyboard", .id = -1, + .dev = { + .release = mxc_nop_release, + }, + .resource = keyboard_resource, + .num_resources = ARRAY_SIZE(keyboard_resource), }; static struct resource gpmi_resources[] = { { .flags = IORESOURCE_MEM, .start = REGS_GPMI_PHYS, - .end = REGS_GPMI_PHYS + REGS_GPMI_SIZE, + .end = REGS_GPMI_PHYS + REGS_GPMI_SIZE - 1, }, { .flags = IORESOURCE_IRQ, .start = IRQ_GPMI_DMA, @@ -126,6 +169,7 @@ .name = "gpmi", .id = -1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -137,7 +181,7 @@ { .flags = IORESOURCE_MEM, .start = REGS_SSP1_PHYS, - .end = REGS_SSP1_PHYS + REGS_SSP_SIZE, + .end = REGS_SSP1_PHYS + REGS_SSP_SIZE - 1, }, { .flags = IORESOURCE_DMA, .start = STMP3XXX_DMA(1, STMP3XXX_BUS_APBH), @@ -155,8 +199,9 @@ struct platform_device stmp3xxx_mmc = { .name = "stmp3xxx-mmc", - .id = 1, + .id = -1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -164,44 +209,10 @@ .num_resources = ARRAY_SIZE(mmc1_resource), }; -static struct resource usb_resources[] = { - { - .start = REGS_USBCTRL_PHYS, - .end = REGS_USBCTRL_PHYS + SZ_4K, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_USB_CTRL, - .end = IRQ_USB_CTRL, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device stmp3xxx_udc = { - .name = "fsl-usb2-udc", - .id = -1, - .dev = { - .dma_mask = &common_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = usb_resources, - .num_resources = ARRAY_SIZE(usb_resources), -}; - -struct platform_device stmp3xxx_ehci = { - .name = "fsl-ehci", - .id = -1, - .dev = { - .dma_mask = &common_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = usb_resources, - .num_resources = ARRAY_SIZE(usb_resources), -}; - static struct resource rtc_resources[] = { { .start = REGS_RTC_PHYS, - .end = REGS_RTC_PHYS + REGS_RTC_SIZE, + .end = REGS_RTC_PHYS + REGS_RTC_SIZE - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_RTC_ALARM, @@ -217,6 +228,9 @@ struct platform_device stmp3xxx_rtc = { .name = "stmp3xxx-rtc", .id = -1, + .dev = { + .release = mxc_nop_release, + }, .resource = rtc_resources, .num_resources = ARRAY_SIZE(rtc_resources), }; @@ -224,7 +238,7 @@ static struct resource ssp1_resources[] = { { .start = REGS_SSP1_PHYS, - .end = REGS_SSP1_PHYS + REGS_SSP_SIZE, + .end = REGS_SSP1_PHYS + REGS_SSP_SIZE - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_SSP1_DMA, @@ -240,7 +254,7 @@ static struct resource ssp2_resources[] = { { .start = REGS_SSP2_PHYS, - .end = REGS_SSP2_PHYS + REGS_SSP_SIZE, + .end = REGS_SSP2_PHYS + REGS_SSP_SIZE - 1, .flags = IORESOURCE_MEM, }, { .start = IRQ_SSP2_DMA, @@ -257,6 +271,7 @@ .name = "stmp3xxx_ssp", .id = 1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -268,6 +283,7 @@ .name = "stmp3xxx_ssp", .id = 2, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -287,16 +303,22 @@ }, { .flags = IORESOURCE_MEM, .start = REGS_LCDIF_PHYS, - .end = REGS_LCDIF_PHYS + REGS_LCDIF_SIZE, + .end = REGS_LCDIF_PHYS + REGS_LCDIF_SIZE - 1, }, }; +static struct stmp3xxx_platform_fb_data stmp3xxx_framebuffer_pdata = { + .list = LIST_HEAD_INIT(stmp3xxx_framebuffer_pdata.list), +}; + struct platform_device stmp3xxx_framebuffer = { .name = "stmp3xxx-fb", .id = -1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &stmp3xxx_framebuffer_pdata, }, .num_resources = ARRAY_SIZE(fb_resource), .resource = fb_resource, @@ -330,22 +352,108 @@ struct platform_device stmp3xxx_backlight = { .name = "stmp3xxx-bl", .id = -1, + .dev = { + .release = mxc_nop_release, + }, }; struct platform_device stmp3xxx_rotdec = { .name = "stmp3xxx-rotdec", .id = -1, + .dev = { + .release = mxc_nop_release, + }, +}; + +static const struct stmp3xxx_persistent_bit_config +stmp3xxx_persistent_bit_tab[] = { + { .reg = 0, .start = 0, .width = 1, + .name = "CLOCKSOURCE" }, + { .reg = 0, .start = 1, .width = 1, + .name = "ALARM_WAKE_EN" }, + { .reg = 0, .start = 2, .width = 1, + .name = "ALARM_EN" }, + { .reg = 0, .start = 3, .width = 1, + .name = "CLK_SECS" }, + { .reg = 0, .start = 4, .width = 1, + .name = "XTAL24MHZ_PWRUP" }, + { .reg = 0, .start = 5, .width = 1, + .name = "XTAL32MHZ_PWRUP" }, + { .reg = 0, .start = 6, .width = 1, + .name = "XTAL32_FREQ" }, + { .reg = 0, .start = 7, .width = 1, + .name = "ALARM_WAKE" }, + { .reg = 0, .start = 8, .width = 5, + .name = "MSEC_RES" }, + { .reg = 0, .start = 13, .width = 1, + .name = "DISABLE_XTALOK" }, + { .reg = 0, .start = 14, .width = 2, + .name = "LOWERBIAS" }, + { .reg = 0, .start = 16, .width = 1, + .name = "DISABLE_PSWITCH" }, + { .reg = 0, .start = 17, .width = 1, + .name = "AUTO_RESTART" }, + { .reg = 0, .start = 18, .width = 14, + .name = "SPARE_ANALOG" }, + + { .reg = 1, .start = 0, .width = 1, + .name = "FORCE_RECOVERY" }, + { .reg = 1, .start = 1, .width = 1, + .name = "NAND_SECONDARY_BOOT" }, + { .reg = 1, .start = 2, .width = 1, + .name = "NAND_SDK_BLOCK_REWRITE" }, + { .reg = 1, .start = 3, .width = 1, + .name = "SD_SPEED_ENABLE" }, + { .reg = 1, .start = 4, .width = 1, + .name = "SD_INIT_SEQ_1_DISABLE" }, + { .reg = 1, .start = 5, .width = 1, + .name = "SD_CMD0_DISABLE" }, + { .reg = 1, .start = 6, .width = 1, + .name = "SD_INIT_SEQ_2_ENABLE" }, + { .reg = 1, .start = 7, .width = 1, + .name = "OTG_ATL_ROLE_BIT" }, + { .reg = 1, .start = 8, .width = 1, + .name = "OTG_HNP_BIT" }, + { .reg = 1, .start = 9, .width = 1, + .name = "USB_LOW_POWER_MODE" }, + { .reg = 1, .start = 10, .width = 1, + .name = "SKIP_CHECKDISK" }, + { .reg = 1, .start = 11, .width = 1, + .name = "USB_BOOT_PLAYER_MODE" }, + { .reg = 1, .start = 12, .width = 1, + .name = "ENUMERATE_500MA_TWICE" }, + { .reg = 1, .start = 13, .width = 19, + .name = "SPARE_GENERAL" }, + + { .reg = 2, .start = 0, .width = 32, + .name = "SPARE_2" }, + { .reg = 3, .start = 0, .width = 32, + .name = "SPARE_3" }, + { .reg = 4, .start = 0, .width = 32, + .name = "SPARE_4" }, + { .reg = 5, .start = 0, .width = 32, + .name = "SPARE_5" }, +}; + +static struct stmp3xxx_platform_persistent_data stmp3xxx_persistent_data = { + .bit_config_tab = stmp3xxx_persistent_bit_tab, + .bit_config_cnt = ARRAY_SIZE(stmp3xxx_persistent_bit_tab), }; struct platform_device stmp3xxx_persistent = { .name = "stmp3xxx-persistent", .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &stmp3xxx_persistent_data, + }, }; struct platform_device stmp3xxx_dcp_bootstream = { .name = "stmp3xxx-dcpboot", .id = -1, .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, @@ -369,21 +477,87 @@ .resource = dcp_resources, .num_resources = ARRAY_SIZE(dcp_resources), .dev = { + .release = mxc_nop_release, .dma_mask = &common_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, }; static struct resource battery_resource[] = { - { + {/* 0 */ .flags = IORESOURCE_IRQ, .start = IRQ_VDD5V, .end = IRQ_VDD5V, }, + {/* 1 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_DCDC4P2_BO, + .end = IRQ_DCDC4P2_BO, + }, + {/* 2 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_BATT_BRNOUT, + .end = IRQ_BATT_BRNOUT, + }, + {/* 3 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_VDDD_BRNOUT, + .end = IRQ_VDDD_BRNOUT, + }, + {/* 4 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_VDD18_BRNOUT, + .end = IRQ_VDD18_BRNOUT, + }, + {/* 5 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_VDDIO_BRNOUT, + .end = IRQ_VDDIO_BRNOUT, + }, + {/* 6 */ + .flags = IORESOURCE_IRQ, + .start = IRQ_VDD5V_DROOP, + .end = IRQ_VDD5V_DROOP, + }, + }; struct platform_device stmp3xxx_battery = { .name = "stmp3xxx-battery", .resource = battery_resource, + .dev = { + .release = mxc_nop_release, + } , .num_resources = ARRAY_SIZE(battery_resource), }; + +struct resource viim_resources[] = { + [0] = { + .start = REGS_DIGCTL_PHYS, + .end = REGS_DIGCTL_PHYS + PAGE_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = REGS_OCOTP_PHYS, + .end = REGS_OCOTP_PHYS + PAGE_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device stmp3xxx_viim = { + .name = "mxs_viim", + .id = 0, + .dev = { + .release = mxc_nop_release, + } , + .resource = viim_resources, + .num_resources = ARRAY_SIZE(viim_resources), +}; + +struct platform_device stmp3xxx_spdif = { + .name = "stmp3xxx-spdif", + .id = -1, + .dev = { + .release = mxc_nop_release, + } , +}; --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/core.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/core.c @@ -23,6 +23,8 @@ #include #include #include +#include +#include static int __stmp3xxx_reset_block(void __iomem *hwreg, int just_enable) { @@ -114,15 +116,22 @@ } EXPORT_SYMBOL(stmp3xxx_reset_block); -struct platform_device stmp3xxx_dbguart = { - .name = "stmp3xxx-dbguart", - .id = -1, -}; +static void stmp3xxx_machine_restart(char mode, const char *cmd) +{ + arch_reset(mode, cmd); + printk(KERN_ERR"stmp3xxx_machine_restart failed -- System halted\n"); + for (;;) + continue; +} void __init stmp3xxx_init(void) { - /* Turn off auto-slow and other tricks */ - stmp3xxx_clearl(0x7f00000, REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS); + /* Re-route machine restart to our own handler */ + arm_pm_restart = stmp3xxx_machine_restart; stmp3xxx_dma_init(); + + stmp3xxx_setl(BM_RTC_PERSISTENT0_XTAL32KHZ_PWRUP | + BM_RTC_PERSISTENT0_XTAL24MHZ_PWRUP, + REGS_RTC_BASE + HW_RTC_PERSISTENT0); } --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/Kconfig @@ -8,12 +8,14 @@ config ARCH_STMP37XX bool "Freescale SMTP37xx" select CPU_ARM926T + select FIQ ---help--- STMP37xx refers to 3700 through 3769 chips config ARCH_STMP378X bool "Freescale STMP378x" select CPU_ARM926T + select FIQ ---help--- STMP378x refers to 3780 through 3789 chips @@ -32,6 +34,8 @@ endchoice +source arch/arm/mach-stmp378x/Kconfig + endmenu endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/lradc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/lradc.c @@ -0,0 +1,332 @@ +/* + * Freescale STMP37XX/STMP378X LRADC helper routines + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int channels[8]; + +int hw_lradc_use_channel(int channel) +{ + if (channel < 0 || channel > 7) + return -EINVAL; + channels[channel]++; + return 0; +} +EXPORT_SYMBOL(hw_lradc_use_channel); + +int hw_lradc_unuse_channel(int channel) +{ + if (channel < 0 || channel > 7) + return -EINVAL; + channels[channel]--; + return 0; +} +EXPORT_SYMBOL(hw_lradc_unuse_channel); + +void hw_lradc_reinit(int enable_ground_ref, unsigned freq) +{ + stmp3xxx_setl(BM_LRADC_CTRL0_SFTRST, REGS_LRADC_BASE + HW_LRADC_CTRL0); + udelay(1); + stmp3xxx_clearl(BM_LRADC_CTRL0_SFTRST, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + + /* Clear the Clock Gate for normal operation */ + stmp3xxx_clearl(BM_LRADC_CTRL0_CLKGATE, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + + if (enable_ground_ref) + stmp3xxx_setl(BM_LRADC_CTRL0_ONCHIP_GROUNDREF, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + else + stmp3xxx_clearl(BM_LRADC_CTRL0_ONCHIP_GROUNDREF, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + + stmp3xxx_clearl(BM_LRADC_CTRL3_CYCLE_TIME, + REGS_LRADC_BASE + HW_LRADC_CTRL3); + stmp3xxx_setl(BF(freq, LRADC_CTRL3_CYCLE_TIME), + REGS_LRADC_BASE + HW_LRADC_CTRL3); + + stmp3xxx_clearl(BM_LRADC_CTRL4_LRADC6SELECT | + BM_LRADC_CTRL4_LRADC7SELECT, + REGS_LRADC_BASE + HW_LRADC_CTRL4); + stmp3xxx_setl(BF(VDDIO_VOLTAGE_CH, LRADC_CTRL4_LRADC6SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4); + stmp3xxx_setl(BF(BATTERY_VOLTAGE_CH, LRADC_CTRL4_LRADC7SELECT), + REGS_LRADC_BASE + HW_LRADC_CTRL4); +} + +int hw_lradc_init_ladder(int channel, int trigger, unsigned sampling) +{ + /* + * check if the lradc channel is present in this product + */ + if (!hw_lradc_present(channel)) + return -ENODEV; + + hw_lradc_configure_channel(channel, !0 /* div2 */ , + 0 /* acc */ , + 0 /* num_samples */ ); + + /* Setup the trigger loop forever */ + hw_lradc_set_delay_trigger(trigger, 1 << channel, + 1 << trigger, 0, sampling); + + /* Clear the accumulator & NUM_SAMPLES */ + stmp3xxx_clearl(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn(channel)); + return 0; +} + +EXPORT_SYMBOL(hw_lradc_init_ladder); + +int hw_lradc_stop_ladder(int channel, int trigger) +{ + /* + * check if the lradc channel is present in this product + */ + if (!hw_lradc_present(channel)) + return -ENODEV; + hw_lradc_clear_delay_trigger(trigger, 1 << channel, 1 << trigger); + return 0; +} + +EXPORT_SYMBOL(hw_lradc_stop_ladder); + +int hw_lradc_present(int channel) +{ + if (channel < 0 || channel > 7) + return 0; + return __raw_readl(REGS_LRADC_BASE + HW_LRADC_STATUS) + & (1 << (16 + channel)); +} + +EXPORT_SYMBOL(hw_lradc_present); + +void hw_lradc_configure_channel(int channel, int enable_div2, + int enable_acc, int samples) +{ + if (enable_div2) + stmp3xxx_setl(BF(1 << channel, LRADC_CTRL2_DIVIDE_BY_TWO), + REGS_LRADC_BASE + HW_LRADC_CTRL2); + else + stmp3xxx_clearl(BF(1 << channel, LRADC_CTRL2_DIVIDE_BY_TWO), + REGS_LRADC_BASE + HW_LRADC_CTRL2); + + /* Clear the accumulator & NUM_SAMPLES */ + stmp3xxx_clearl(0xFFFFFFFF, REGS_LRADC_BASE + HW_LRADC_CHn(channel)); + + /* Sets NUM_SAMPLES bitfield of HW_LRADC_CHn register. */ + stmp3xxx_clearl(BM_LRADC_CHn_NUM_SAMPLES, + REGS_LRADC_BASE + HW_LRADC_CHn(channel)); + stmp3xxx_setl(BF(samples, LRADC_CHn_NUM_SAMPLES), + REGS_LRADC_BASE + HW_LRADC_CHn(channel)); + + if (enable_acc) + stmp3xxx_setl(BM_LRADC_CHn_ACCUMULATE, + REGS_LRADC_BASE + HW_LRADC_CHn(channel)); + else + stmp3xxx_clearl(BM_LRADC_CHn_ACCUMULATE, + REGS_LRADC_BASE + HW_LRADC_CHn(channel)); +} + +EXPORT_SYMBOL(hw_lradc_configure_channel); + +void hw_lradc_set_delay_trigger(int trigger, u32 trigger_lradc, + u32 delay_triggers, u32 loops, u32 delays) +{ + /* set TRIGGER_LRADCS in HW_LRADC_DELAYn */ + stmp3xxx_setl(BF(trigger_lradc, LRADC_DELAYn_TRIGGER_LRADCS), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + stmp3xxx_setl(BF(delay_triggers, LRADC_DELAYn_TRIGGER_DELAYS), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + + stmp3xxx_clearl(BM_LRADC_DELAYn_LOOP_COUNT | BM_LRADC_DELAYn_DELAY, + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + stmp3xxx_setl(BF(loops, LRADC_DELAYn_LOOP_COUNT), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + stmp3xxx_setl(BF(delays, LRADC_DELAYn_DELAY), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); +} + +EXPORT_SYMBOL(hw_lradc_set_delay_trigger); + +void hw_lradc_clear_delay_trigger(int trigger, u32 trigger_lradc, + u32 delay_triggers) +{ + stmp3xxx_clearl(BF(trigger_lradc, LRADC_DELAYn_TRIGGER_LRADCS), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + stmp3xxx_clearl(BF(delay_triggers, LRADC_DELAYn_TRIGGER_DELAYS), + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); +} + +EXPORT_SYMBOL(hw_lradc_clear_delay_trigger); + +void hw_lradc_set_delay_trigger_kick(int trigger, int value) +{ + if (value) + stmp3xxx_setl(BM_LRADC_DELAYn_KICK, + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); + else + stmp3xxx_clearl(BM_LRADC_DELAYn_KICK, + REGS_LRADC_BASE + HW_LRADC_DELAYn(trigger)); +} + +EXPORT_SYMBOL(hw_lradc_set_delay_trigger_kick); + +u32 hw_lradc_vddio(void) +{ + /* Clear the Soft Reset and Clock Gate for normal operation */ + stmp3xxx_clearl(BM_LRADC_CTRL0_SFTRST | BM_LRADC_CTRL0_CLKGATE, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + + /* + * Clear the divide by two for channel 6 since + * it has a HW divide-by-two built in. + */ + stmp3xxx_clearl(BF(1 << VDDIO_VOLTAGE_CH, LRADC_CTRL2_DIVIDE_BY_TWO), + REGS_LRADC_BASE + HW_LRADC_CTRL2); + + /* Clear the accumulator & NUM_SAMPLES */ + stmp3xxx_clearl(0xFFFFFFFF, + REGS_LRADC_BASE + HW_LRADC_CHn(VDDIO_VOLTAGE_CH)); + + /* Clear the interrupt flag */ + stmp3xxx_clearl(BM_LRADC_CTRL1_LRADC6_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1); + + /* + * Get VddIO; this is the max scale value for the button resistor + * ladder. + * schedule ch 6: + */ + stmp3xxx_setl(BF(1 << VDDIO_VOLTAGE_CH, LRADC_CTRL0_SCHEDULE), + REGS_LRADC_BASE + HW_LRADC_CTRL0); + + /* wait for completion */ + while ((__raw_readl(REGS_LRADC_BASE + HW_LRADC_CTRL1) + & BM_LRADC_CTRL1_LRADC6_IRQ) != BM_LRADC_CTRL1_LRADC6_IRQ) + cpu_relax(); + + /* Clear the interrupt flag */ + stmp3xxx_clearl(BM_LRADC_CTRL1_LRADC6_IRQ, + REGS_LRADC_BASE + HW_LRADC_CTRL1); + + /* read ch 6 value. */ + return __raw_readl(REGS_LRADC_BASE + HW_LRADC_CHn(6)) + & BM_LRADC_CHn_VALUE; +} + +EXPORT_SYMBOL(hw_lradc_vddio); + +static u32 lradc_registers[0x16]; +static int do_gate; + +static int hw_lradc_suspend(struct sys_device *dev, pm_message_t state) +{ + int i; + + do_gate = 1; + for (i = 0; i < ARRAY_SIZE(channels); i++) + if (channels[i] > 0) { + do_gate = 0; + break; + } + + for (i = 0; i < ARRAY_SIZE(lradc_registers); i++) + lradc_registers[i] = __raw_readl(REGS_LRADC_BASE + (i << 4)); + + if (do_gate) + stmp3xxx_setl(BM_LRADC_CTRL0_CLKGATE, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + return 0; +} + +static int hw_lradc_resume(struct sys_device *dev) +{ + int i; + + if (do_gate) { + stmp3xxx_setl(BM_LRADC_CTRL0_SFTRST, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + udelay(10); + stmp3xxx_clearl(BM_LRADC_CTRL0_SFTRST | + BM_LRADC_CTRL0_CLKGATE, + REGS_LRADC_BASE + HW_LRADC_CTRL0); + } + for (i = 0; i < ARRAY_SIZE(lradc_registers); i++) + __raw_writel(lradc_registers[i], REGS_LRADC_BASE + (i << 4)); + return 0; +} + +static struct sysdev_class stmp3xxx_lradc_sysclass = { + .name = "stmp3xxx-lradc", +#ifdef CONFIG_PM + .suspend = hw_lradc_suspend, + .resume = hw_lradc_resume, +#endif +}; + +static struct sys_device stmp3xxx_lradc_device = { + .id = -1, + .cls = &stmp3xxx_lradc_sysclass, +}; + +static int __initdata lradc_freq = LRADC_CLOCK_6MHZ; + +static int __init lradc_freq_setup(char *str) +{ + long freq; + + if (strict_strtol(str, 0, &freq) < 0) + return 0; + + if (freq < 0) + return 0; + if (freq >= 6) + lradc_freq = LRADC_CLOCK_6MHZ; + else if (freq >= 4) + lradc_freq = LRADC_CLOCK_4MHZ; + else if (freq >= 3) + lradc_freq = LRADC_CLOCK_3MHZ; + else if (freq >= 2) + lradc_freq = LRADC_CLOCK_2MHZ; + else + return 0; + return 1; +} + +__setup("lradc_freq=", lradc_freq_setup); + +static int __init hw_lradc_init(void) +{ + hw_lradc_reinit(0, lradc_freq); + sysdev_class_register(&stmp3xxx_lradc_sysclass); + sysdev_register(&stmp3xxx_lradc_device); + return 0; +} + +subsys_initcall(hw_lradc_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/dma.c @@ -94,15 +94,15 @@ switch (STMP3XXX_DMA_BUS(channel)) { case STMP3XXX_BUS_APBH: - sem = __raw_readl(REGS_APBH_BASE + HW_APBH_CHn_SEMA + - STMP3XXX_DMA_CHANNEL(channel) * 0x70); + sem = __raw_readl(REGS_APBH_BASE + + HW_APBH_CHn_SEMA(STMP3XXX_DMA_CHANNEL(channel))); sem &= BM_APBH_CHn_SEMA_PHORE; sem >>= BP_APBH_CHn_SEMA_PHORE; break; case STMP3XXX_BUS_APBX: - sem = __raw_readl(REGS_APBX_BASE + HW_APBX_CHn_SEMA + - STMP3XXX_DMA_CHANNEL(channel) * 0x70); + sem = __raw_readl(REGS_APBX_BASE + + HW_APBX_CHn_SEMA(STMP3XXX_DMA_CHANNEL(channel))); sem &= BM_APBX_CHn_SEMA_PHORE; sem >>= BP_APBX_CHn_SEMA_PHORE; break; @@ -187,13 +187,13 @@ switch (STMP3XXX_DMA_BUS(channel)) { case STMP3XXX_BUS_APBH: - c = REGS_APBH_BASE + HW_APBH_CHn_NXTCMDAR + 0x70 * ch; - s = REGS_APBH_BASE + HW_APBH_CHn_SEMA + 0x70 * ch; + c = REGS_APBH_BASE + HW_APBH_CHn_NXTCMDAR(ch); + s = REGS_APBH_BASE + HW_APBH_CHn_SEMA(ch); break; case STMP3XXX_BUS_APBX: - c = REGS_APBX_BASE + HW_APBX_CHn_NXTCMDAR + 0x70 * ch; - s = REGS_APBX_BASE + HW_APBX_CHn_SEMA + 0x70 * ch; + c = REGS_APBX_BASE + HW_APBX_CHn_NXTCMDAR(ch); + s = REGS_APBX_BASE + HW_APBX_CHn_SEMA(ch); break; default: @@ -212,13 +212,13 @@ { switch (STMP3XXX_DMA_BUS(channel)) { case STMP3XXX_BUS_APBH: - return (__raw_readl(REGS_APBH_BASE + HW_APBH_CHn_SEMA + - 0x70 * STMP3XXX_DMA_CHANNEL(channel))) & + return (__raw_readl(REGS_APBH_BASE + + HW_APBH_CHn_SEMA(STMP3XXX_DMA_CHANNEL(channel)))) & BM_APBH_CHn_SEMA_PHORE; case STMP3XXX_BUS_APBX: - return (__raw_readl(REGS_APBX_BASE + HW_APBX_CHn_SEMA + - 0x70 * STMP3XXX_DMA_CHANNEL(channel))) & + return (__raw_readl(REGS_APBX_BASE + + HW_APBX_CHn_SEMA(STMP3XXX_DMA_CHANNEL(channel)))) & BM_APBX_CHn_SEMA_PHORE; default: BUG(); @@ -323,7 +323,7 @@ unsigned count) { void __iomem *c; - u32 mask_clr, mask; + u32 mask_clr, mask, reg; BUG_ON(chain->free_count < count); chain->free_count -= count; @@ -333,12 +333,12 @@ switch (chain->bus) { case STMP3XXX_BUS_APBH: - c = REGS_APBH_BASE + HW_APBH_CHn_SEMA + 0x70 * chain->channel; + c = REGS_APBH_BASE + HW_APBH_CHn_SEMA(chain->channel); mask_clr = BM_APBH_CHn_SEMA_INCREMENT_SEMA; mask = BF(count, APBH_CHn_SEMA_INCREMENT_SEMA); break; case STMP3XXX_BUS_APBX: - c = REGS_APBX_BASE + HW_APBX_CHn_SEMA + 0x70 * chain->channel; + c = REGS_APBX_BASE + HW_APBX_CHn_SEMA(chain->channel); mask_clr = BM_APBX_CHn_SEMA_INCREMENT_SEMA; mask = BF(count, APBX_CHn_SEMA_INCREMENT_SEMA); break; @@ -349,8 +349,11 @@ /* Set counting semaphore (kicks off transfer). Assumes peripheral has been set up correctly */ - stmp3xxx_clearl(mask_clr, c); - stmp3xxx_setl(mask, c); + reg = __raw_readl(c); + reg &= ~mask_clr; + __raw_writel(reg, c); + reg |= mask; + __raw_writel(reg, c); } EXPORT_SYMBOL(stmp37xx_circ_advance_active); @@ -373,6 +376,7 @@ void stmp3xxx_dma_set_alt_target(int channel, int function) { + u32 reg; #if defined(CONFIG_ARCH_STMP37XX) unsigned bits = 4; #elif defined(CONFIG_ARCH_STMP378X) @@ -398,8 +402,11 @@ default: BUG(); } - stmp3xxx_clearl(mask << shift, c); - stmp3xxx_setl(mask << shift, c); + reg = __raw_readl(c); + reg &= ~(mask << shift); + __raw_writel(reg, c); + reg |= mask; + __raw_writel(reg, c); } EXPORT_SYMBOL(stmp3xxx_dma_set_alt_target); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/power-test.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/power-test.c @@ -0,0 +1,213 @@ +/* + * Power consumption test module + * + * Author: Dmitrij Frasenyak + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct regulator *reg; +static struct regulator *freg; + +static struct timer_list pt_timer; +static int timer_delay = 5*60*1000; /* 5min */ +static DEFINE_MUTEX(run_mutex); + + +#define REG_GET() do {\ + if (!reg) {\ + reg = regulator_get(NULL, "power-test-1");\ + if (!reg || IS_ERR(reg)) {\ + reg = NULL ; return -ENODEV;\ + } \ + } \ +} while (0); + +static void timer_func(unsigned long data) +{ + regulator_set_current_limit(reg, 0, 0); + mutex_unlock(&run_mutex); +} + +static ssize_t pt_mode_set(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + REG_GET(); + if (buf[0] == 'f') + regulator_set_mode(reg, REGULATOR_MODE_FAST); + else + regulator_set_mode(reg, REGULATOR_MODE_NORMAL); + return size; +} + +static ssize_t pt_mode_show(struct device *d, struct device_attribute *attr, + char *buf) +{ + REG_GET(); + if (regulator_get_mode(reg) == REGULATOR_MODE_FAST) + return snprintf(buf, 5, "fast\n"); + else + return snprintf(buf, 7, "normal\n"); +} + +static ssize_t pt_val_fset(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + int i, ret; + ret = sscanf(buf, "%u", &i); + if (ret != 1) + return -EINVAL; + + if (!freg) { + freg = regulator_get(NULL, "stmp3xxx-bl-1"); + if (!freg || IS_ERR(freg)) { + freg = NULL ; return -ENODEV; + } + } + regulator_set_mode(freg, REGULATOR_MODE_NORMAL); + + if (!regulator_set_current_limit(freg, i, i)) + printk(KERN_ERR "got backlight reg\n"); + else + printk(KERN_ERR "failed to get backlight reg"); + + return size; +} + + +static ssize_t pt_val_set(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + int i, ret; + REG_GET(); + + ret = sscanf(buf, "%u", &i); + if (ret != 1) + return -EINVAL; + + mutex_lock(&run_mutex); + if (!regulator_set_current_limit(reg, i, i)) { + mod_timer(&pt_timer, + jiffies + msecs_to_jiffies(timer_delay)); + return size; + } else { + mutex_unlock(&run_mutex); + return -EPERM; + } + +} + +static ssize_t pt_val_show(struct device *d, struct device_attribute *attr, + char *buf) +{ + REG_GET(); + return sprintf(buf, "%d\n", regulator_get_current_limit(reg)); +} + +static ssize_t pt_timeout_set(struct device *d, struct device_attribute *attr, + const char *buf, size_t size) +{ + int i, ret; + REG_GET(); + + ret = sscanf(buf, "%u", &i); + if (ret != 1) + return -EINVAL; + + mutex_lock(&run_mutex); + timer_delay = 1000*i ; + mutex_unlock(&run_mutex); + + return size; +} + +static ssize_t pt_timeout_show(struct device *d, struct device_attribute *attr, + char *buf) +{ + REG_GET(); + return sprintf(buf, "%d\n", timer_delay); +} + +static DEVICE_ATTR(mode, 0644, pt_mode_show, pt_mode_set); +static DEVICE_ATTR(val, 0644, pt_val_show, pt_val_set); +static DEVICE_ATTR(fval, 0644, pt_val_show, pt_val_fset); +static DEVICE_ATTR(timeout, 0644, pt_timeout_show, pt_timeout_set); + +static int stmp3xxx_power_test_remove(struct platform_device *pdev) +{ + if (reg) + regulator_put(reg); + + device_remove_file(&pdev->dev, &dev_attr_mode); + device_remove_file(&pdev->dev, &dev_attr_val); + device_remove_file(&pdev->dev, &dev_attr_timeout); + device_remove_file(&pdev->dev, &dev_attr_fval); + return 0; +} + +static int stmp3xxx_power_test_probe(struct platform_device *pdev) +{ + int ret; + init_timer(&pt_timer); + pt_timer.data = 0; + pt_timer.function = timer_func; + + ret = device_create_file(&pdev->dev, &dev_attr_mode); + ret |= device_create_file(&pdev->dev, &dev_attr_val); + ret |= device_create_file(&pdev->dev, &dev_attr_fval); + ret |= device_create_file(&pdev->dev, &dev_attr_timeout); + return ret; +} + +static struct platform_driver stmp3xxx_power_test_driver = { + .probe = stmp3xxx_power_test_probe, + .remove = stmp3xxx_power_test_remove, + .driver = { + .name = "stmp3xxx-power-test", + .owner = THIS_MODULE, + }, +}; + +struct platform_device stmp3xxx_pt = { + .name = "stmp3xxx-power-test", + .id = -1, +}; + +static int __init stmp3xxx_power_test_init(void) +{ + + platform_device_register(&stmp3xxx_pt); + return platform_driver_register(&stmp3xxx_power_test_driver); +} + +static void __exit stmp3xxx_power_test_exit(void) +{ + platform_driver_unregister(&stmp3xxx_power_test_driver); + platform_device_unregister(&stmp3xxx_pt); +} + +MODULE_AUTHOR(""); +MODULE_DESCRIPTION("Power test driver"); +MODULE_LICENSE("GPL"); + +module_init(stmp3xxx_power_test_init); +module_exit(stmp3xxx_power_test_exit); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/usb.h @@ -0,0 +1,101 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, struct fsl_usb2_platform_data *config); + +static void usb_host_phy_resume(struct fsl_usb2_platform_data *); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +#if defined(CONFIG_UTMI_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config; +#define PDATA (&dr_utmi_config) +#endif + + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/unique-id.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/unique-id.c @@ -0,0 +1,198 @@ +/* + * Unique ID manipulation sysfs access generic functions + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +static int unlock; +static spinlock_t u_lock; +static const unsigned long UID_AUTOLOCK_TIMEOUT = HZ * 60 * 3; +static struct timer_list u_timer; + +static void uid_timer_autolock(unsigned long param) +{ + struct timer_list *tmr = (struct timer_list *)param; + + if (spin_trylock(&u_lock)) { + if (unlock) + pr_debug("%s: locked down.\n", __func__); + unlock = 0; + spin_unlock(&u_lock); + } + mod_timer(tmr, jiffies + UID_AUTOLOCK_TIMEOUT); +} + +static LIST_HEAD(uid_provider_list); + +struct uid_provider { + struct kobject *kobj; + struct list_head list; + struct uid_ops *ops; + void *context; +}; + +static struct uid_provider *uid_provider_find(const char *name); + +#define UID_FWD_SYSFS_FILE(var, file, param) \ + static ssize_t var##_show(struct kobject *kobj, \ + struct kobj_attribute *attr, char *buf) \ + { \ + struct uid_provider *p = \ + uid_provider_find(kobject_name(kobj)); \ + ssize_t r; \ + BUG_ON(p == NULL); \ + r = (p->ops && p->ops->file##_show) ? \ + p->ops->file##_show(p->context, buf, param) : 0;\ + return r; \ + } \ + \ + static ssize_t var##_store(struct kobject *kobj, \ + struct kobj_attribute *attr, const char *buf, \ + size_t count) \ + { \ + struct uid_provider *p = \ + uid_provider_find(kobject_name(kobj)); \ + ssize_t r; \ + int ul; \ + BUG_ON(p == NULL); \ + spin_lock(&u_lock); \ + ul = unlock; \ + spin_unlock(&u_lock); \ + if (ul) \ + r = (p->ops && p->ops->file##_store) ? \ + p->ops->file##_store(p->context, buf, count, param) \ + : count; \ + else \ + r = -EACCES; \ + return r; \ + } + +struct kobject *uid_kobj; + +#define UID_ATTR(_name, _varname) \ + static struct kobj_attribute _varname##_attr = \ + __ATTR(_name, 0644, _varname##_show, _varname##_store) + +UID_FWD_SYSFS_FILE(id, id, 1); +UID_FWD_SYSFS_FILE(id_bin, id, 0); +UID_ATTR(id, id); +UID_ATTR(id.bin, id_bin); + +static struct attribute *uid_attrs[] = { + &id_attr.attr, + &id_bin_attr.attr, + NULL +}; + +static struct attribute_group uid_attr_group = { + .attrs = uid_attrs, +}; + +struct kobject *uid_provider_init(const char *name, + struct uid_ops *ops, void *context) +{ + struct uid_provider *new; + int err; + + new = kzalloc(sizeof(*new), GFP_KERNEL); + if (!new) { + err = -ENOMEM; + goto out; + } + + new->kobj = kobject_create_and_add(name, uid_kobj); + if (!new->kobj) { + err = -ENOMEM; + goto out; + } + new->ops = ops; + new->context = context; + + err = sysfs_create_group(new->kobj, &uid_attr_group); + if (err) + goto out2; + + list_add_tail(&new->list, &uid_provider_list); + return new->kobj; +out2: + kobject_del(new->kobj); +out: + kfree(new); + return ERR_PTR(err); +} +EXPORT_SYMBOL_GPL(uid_provider_init); + +static struct uid_provider *uid_provider_find(const char *name) +{ + struct uid_provider *p; + + list_for_each_entry(p, &uid_provider_list, list) { + if (strcmp(kobject_name(p->kobj), name) == 0) + return p; + } + return NULL; +} + +void uid_provider_remove(const char *name) +{ + struct uid_provider *p; + + p = uid_provider_find(name); + if (!p) + return; + kobject_del(p->kobj); + list_del(&p->list); + kfree(p); +} +EXPORT_SYMBOL_GPL(uid_provider_remove); + +static int uid_sysfs_init(void) +{ + int error; + + uid_kobj = kobject_create_and_add("uid", NULL); + if (!uid_kobj) { + error = -ENOMEM; + goto out1; + } + + spin_lock_init(&u_lock); + setup_timer(&u_timer, uid_timer_autolock, (unsigned long)&u_timer); + + /* try to lock each 3 minutes */ + mod_timer(&u_timer, jiffies + UID_AUTOLOCK_TIMEOUT); + return 0; + +out1: + printk(KERN_ERR"%s failed, error %d.", __func__, error); + return error; +} + +module_param(unlock, int, 0600) +core_initcall(uid_sysfs_init); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("dmitry pervushin "); +MODULE_DESCRIPTION("Unique ID simple framework"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/mmc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/mmc.c @@ -0,0 +1,148 @@ +/* + * Freescale STMP37XX/STMP378X MMC pin multiplexing + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_MACH_STMP378X) +#define MMC_POWER PINID_PWM3 +#define MMC_WP PINID_PWM4 +#elif defined(CONFIG_MACH_STMP37XX) +#define MMC_POWER PINID_PWM3 +#define MMC_WP PINID_PWM4 +#else +#define MMC_POWER PINID_NO_PIN +#define MMC_WP PINID_NO_PIN +#endif + +static int mmc_drive_power; +static int mmc_wp_supported; + +static struct pin_desc mmc_pins_desc[] = { + { PINID_SSP1_DATA0, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, + { PINID_SSP1_DATA1, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, + { PINID_SSP1_DATA2, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, + { PINID_SSP1_DATA3, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, + { PINID_SSP1_CMD, PIN_FUN1, PIN_8MA, PIN_3_3V, 1 }, + { PINID_SSP1_SCK, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, + { PINID_SSP1_DETECT, PIN_FUN1, PIN_8MA, PIN_3_3V, 0 }, +}; + +static struct pin_group mmc_pins = { + .pins = mmc_pins_desc, + .nr_pins = ARRAY_SIZE(mmc_pins_desc), +}; + +int stmp3xxxmmc_get_wp(void) +{ + if (mmc_wp_supported) + return gpio_get_value(MMC_WP); + + return 0; +} + +int stmp3xxxmmc_hw_init_ssp1(void) +{ + int ret; + + mmc_drive_power = stmp3xxx_valid_pin(MMC_POWER); + mmc_wp_supported = stmp3xxx_valid_pin(MMC_WP); + + ret = stmp3xxx_request_pin_group(&mmc_pins, "mmc"); + if (ret) + goto out; + + if (mmc_wp_supported) { + /* Configure write protect GPIO pin */ + ret = gpio_request(MMC_WP, "mmc wp"); + if (ret) + goto out_wp; + + gpio_set_value(MMC_WP, 0); + gpio_direction_input(MMC_WP); + } + + if (mmc_drive_power) { + /* Configure POWER pin as gpio to drive power to MMC slot */ + ret = gpio_request(MMC_POWER, "mmc power"); + if (ret) + goto out_power; + + gpio_direction_output(MMC_POWER, 0); + mdelay(100); + } + + return 0; + +out_power: + if (mmc_wp_supported) + gpio_free(MMC_WP); +out_wp: + stmp3xxx_release_pin_group(&mmc_pins, "mmc"); +out: + return ret; +} + +void stmp3xxxmmc_hw_release_ssp1(void) +{ + if (mmc_drive_power) + gpio_free(MMC_POWER); + + if (mmc_wp_supported) + gpio_free(MMC_WP); + + stmp3xxx_release_pin_group(&mmc_pins, "mmc"); +} + +void stmp3xxxmmc_cmd_pullup_ssp1(int enable) +{ + stmp3xxx_pin_pullup(PINID_SSP1_CMD, enable, "mmc"); +} + +unsigned long stmp3xxxmmc_setclock_ssp1(unsigned long hz) +{ + struct clk *ssp = clk_get(NULL, "ssp"), *parent; + char *p; + long r; + + /* using SSP1, no timeout, clock rate 1 */ + __raw_writel(BF(2, SSP_TIMING_CLOCK_DIVIDE) | + BF(0xFFFF, SSP_TIMING_TIMEOUT), + REGS_SSP1_BASE + HW_SSP_TIMING); + + if (hz > 1000000) + p = "io"; + else + p = "osc_24M"; + + parent = clk_get(NULL, p); + clk_set_parent(ssp, parent); + r = clk_set_rate(ssp, 2 * hz / 1000); + clk_put(parent); + clk_put(ssp); + + return hz; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/dcp-bootstream.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/dcp-bootstream.c @@ -0,0 +1,304 @@ +/* + * Freescale STMP378X DCP driver for bootstream update. Only handles the OTP KEY + * case and can only encrypt/decrypt. + * + * Author: Pantelis Antoniou + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +/* use this channel (same as the ROM) */ +#define ROM_DCP_CHAN 3 + +/* Defines the channel mask for the rom dcp channel */ +#define ROM_DCP_CHAN_MASK (1 << ROM_DCP_CHAN) + +/* Defines the initialization value for the dcp control register */ +#define DCP_CTRL_INIT \ + (BM_DCP_CTRL_GATHER_RESIDUAL_WRITES | \ + BM_DCP_CTRL_ENABLE_CONTEXT_CACHING) + +/* Defines the initialization value for the dcp channel control register */ +#define DCP_CHANNELCTRL_INIT \ + BF(ROM_DCP_CHAN_MASK, DCP_CHANNELCTRL_ENABLE_CHANNEL) + +/* DCP work packet 1 value used to calculate CBC-MAC over the image header */ +#define DCP_PKT1_ENCRYPT \ + (BM_DCP_PACKET1_DECR_SEMAPHORE | \ + BM_DCP_PACKET1_ENABLE_CIPHER | \ + BM_DCP_PACKET1_CIPHER_ENCRYPT | \ + BM_DCP_PACKET1_CIPHER_INIT | \ + BM_DCP_PACKET1_OTP_KEY) + +/* DCP work packet 1 value used to decrypt DEK in key dictionary */ +#define DCP_PKT1_DECRYPT \ + (BM_DCP_PACKET1_DECR_SEMAPHORE | \ + BM_DCP_PACKET1_ENABLE_CIPHER | \ + BM_DCP_PACKET1_CIPHER_INIT | \ + BM_DCP_PACKET1_OTP_KEY) + +/* DCP (decryption) work packet definition */ +struct hw_dcp_packet { + uint32_t pNext; /* next dcp work packet address */ + uint32_t pkt1; /* dcp work packet 1 (control 0) */ + uint32_t pkt2; /* dcp work packet 2 (control 1) */ + uint32_t pSrc; /* source buffer address */ + uint32_t pDst; /* destination buffer address */ + uint32_t size; /* buffer size in bytes */ + uint32_t pPayload; /* payload buffer address */ + uint32_t stat; /* dcp status (written by dcp) */ +}; + +struct dma_area { + struct hw_dcp_packet hw_packet; + uint16_t block[16]; +}; + +struct stmp3xxx_dcp_bootstream_data { + struct device *dev; + struct dma_area *dma_area; + dma_addr_t dma_area_phys; +}; + +/* Only one instance allowed, so this is OK */ +static struct stmp3xxx_dcp_bootstream_data *global_dbd; + +static int stmp3xxx_dcp_bootstream_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct stmp3xxx_dcp_bootstream_data *dbd = global_dbd; + struct dma_area *da = dbd->dma_area; + void __user *argp = (void __user *)arg; + unsigned long timeout; + + /* be paranoid */ + if (dbd == NULL) + return -EBADF; + + if (cmd != DBS_ENC && cmd != DBS_DEC) + return -EINVAL; + + /* copy to (aligned) block */ + if (copy_from_user(da->block, argp, 16)) + return -EFAULT; + + /* Soft reset and remove the clock gate */ + stmp3xxx_setl(BM_DCP_CTRL_SFTRST, REGS_DCP_BASE + HW_DCP_CTRL); + + /* At 24Mhz, it takes no more than 4 clocks (160 ns) Maximum for + * the part to reset, reading the register twice should + * be sufficient to get 4 clks delay. + */ + __raw_readl(REGS_DCP_BASE + HW_DCP_CTRL); + __raw_readl(REGS_DCP_BASE + HW_DCP_CTRL); + + stmp3xxx_clearl(BM_DCP_CTRL_SFTRST | BM_DCP_CTRL_CLKGATE, + REGS_DCP_BASE + HW_DCP_CTRL); + + /* Initialize control registers */ + __raw_writel(DCP_CTRL_INIT, REGS_DCP_BASE + HW_DCP_CTRL); + __raw_writel(DCP_CHANNELCTRL_INIT, REGS_DCP_BASE + HW_DCP_CHANNELCTRL); + + /* The loader does not enable context switching. Give the context + * buffer pointer an illegal address so if context switching is + * inadvertantly enabled, the dcp will return an error instead of + * trashing good memory. The dcp dma cannot access rom, so any rom + * address will do. + */ + __raw_writel(0xFFFF0000, REGS_DCP_BASE + HW_DCP_CONTEXT); + + stmp3xxx_clearl(-1, REGS_DCP_BASE + HW_DCP_CHnSTAT(ROM_DCP_CHAN)); + stmp3xxx_clearl(-1, REGS_DCP_BASE + HW_DCP_STAT); + + da->hw_packet.pNext = 0; + da->hw_packet.pkt1 = BM_DCP_PACKET1_DECR_SEMAPHORE | + BM_DCP_PACKET1_ENABLE_CIPHER | BM_DCP_PACKET1_OTP_KEY | + BM_DCP_PACKET1_INTERRUPT | + (cmd == DBS_ENC ? BM_DCP_PACKET1_CIPHER_ENCRYPT : 0); + da->hw_packet.pkt2 = BF(0, DCP_PACKET2_CIPHER_CFG) | + BF(0, DCP_PACKET2_KEY_SELECT) | + BF(BV_DCP_PACKET2_CIPHER_MODE__ECB, DCP_PACKET2_CIPHER_MODE) | + BF(BV_DCP_PACKET2_CIPHER_SELECT__AES128, DCP_PACKET2_CIPHER_SELECT); + da->hw_packet.pSrc = dbd->dma_area_phys + + offsetof(struct dma_area, block); + da->hw_packet.pDst = da->hw_packet.pSrc; /* in-place */ + da->hw_packet.size = 16; + da->hw_packet.pPayload = 0; + da->hw_packet.stat = 0; + + /* Load the work packet pointer and bump the channel semaphore */ + __raw_writel(dbd->dma_area_phys + + offsetof(struct dma_area, hw_packet), + REGS_DCP_BASE + HW_DCP_CHnCMDPTR(ROM_DCP_CHAN)); + __raw_writel(BF(1, DCP_CHnSEMA_INCREMENT), + REGS_DCP_BASE + HW_DCP_CHnSEMA(ROM_DCP_CHAN)); + + timeout = jiffies + msecs_to_jiffies(100); + + while (time_before(jiffies, timeout) && + (__raw_readl(REGS_DCP_BASE + HW_DCP_STAT) & + BF(ROM_DCP_CHAN_MASK, DCP_STAT_IRQ)) == 0) + cpu_relax(); + + if (!time_before(jiffies, timeout)) { + dev_err(dbd->dev, "Timeout while waiting STAT\n"); + return -ETIMEDOUT; + } + + if ((__raw_readl(REGS_DCP_BASE + HW_DCP_CHnSTAT(ROM_DCP_CHAN)) + & 0xff) != 0) { + dev_err(dbd->dev, "Channel stat error 0x%02x\n", + __raw_readl(REGS_DCP_BASE + + HW_DCP_CHnSTAT(ROM_DCP_CHAN)) & 0xff); + return -EFAULT; + } + + if (copy_to_user(argp, da->block, 16)) + return -EFAULT; + + return 0; +} + +static struct file_operations stmp3xxx_dcp_bootstream_fops = { + .owner = THIS_MODULE, + .ioctl = stmp3xxx_dcp_bootstream_ioctl, +}; + +static struct miscdevice stmp3xxx_dcp_bootstream_misc = { + .minor = MISC_DYNAMIC_MINOR, + .name = "dcpboot", + .fops = &stmp3xxx_dcp_bootstream_fops, +}; + +static int __devinit stmp3xxx_dcp_bootstream_probe(struct platform_device *pdev) +{ + struct stmp3xxx_dcp_bootstream_data *dbd; + int err; + + /* we only allow a single device */ + if (global_dbd != NULL) + return -ENODEV; + + dbd = kzalloc(sizeof(*dbd), GFP_KERNEL); + if (dbd == NULL) + return -ENOMEM; + memset(dbd, 0, sizeof(*dbd)); + + dbd->dev = &pdev->dev; + platform_set_drvdata(pdev, dbd); + + err = misc_register(&stmp3xxx_dcp_bootstream_misc); + if (err != 0) { + dev_err(&pdev->dev, "Unable to register misc device\n"); + goto err_done; + } + + dbd->dma_area = dma_alloc_coherent(&pdev->dev, sizeof(*dbd->dma_area), + &dbd->dma_area_phys, GFP_KERNEL); + if (dbd->dma_area == NULL) { + dev_err(&pdev->dev, "Unable to allocate DMAable memory\n"); + goto err_dereg; + } + + global_dbd = dbd; + + return 0; + +err_dereg: + misc_deregister(&stmp3xxx_dcp_bootstream_misc); +err_done: + kfree(dbd); + return err; +} + +static int stmp3xxx_dcp_bootstream_remove(struct platform_device *pdev) +{ + struct stmp3xxx_dcp_bootstream_data *dbd; + + dbd = platform_get_drvdata(pdev); + platform_set_drvdata(pdev, NULL); + + dma_free_coherent(&pdev->dev, sizeof(*dbd->dma_area), + dbd->dma_area, dbd->dma_area_phys); + misc_deregister(&stmp3xxx_dcp_bootstream_misc); + + kfree(dbd); + + global_dbd = NULL; + + return 0; +} + +#ifdef CONFIG_PM +static int stmp3xxx_dcp_bootstream_suspend(struct platform_device *pdev, + pm_message_t state) +{ + return 0; +} + +static int stmp3xxx_dcp_bootstream_resume(struct platform_device *pdev) +{ + return 0; +} +#else +#define stmp3xxx_dcp_bootstream_suspend NULL +#define stmp3xxx_dcp_bootstream_resume NULL +#endif + +static struct platform_driver stmp3xxx_dcp_bootstream_driver = { + .probe = stmp3xxx_dcp_bootstream_probe, + .remove = stmp3xxx_dcp_bootstream_remove, + .suspend = stmp3xxx_dcp_bootstream_suspend, + .resume = stmp3xxx_dcp_bootstream_resume, + .driver = { + .name = "stmp3xxx-dcpboot", + .owner = THIS_MODULE, + }, +}; + +static int __init stmp3xxx_dcp_bootstream_init(void) +{ + return platform_driver_register(&stmp3xxx_dcp_bootstream_driver); +} + +static void __exit stmp3xxx_dcp_bootstream_exit(void) +{ + platform_driver_unregister(&stmp3xxx_dcp_bootstream_driver); +} + +MODULE_AUTHOR("Pantelis Antoniou "); +MODULE_DESCRIPTION("DCP bootstream driver"); +MODULE_LICENSE("GPL"); + +module_init(stmp3xxx_dcp_bootstream_init); +module_exit(stmp3xxx_dcp_bootstream_exit); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/Makefile @@ -2,4 +2,22 @@ # Makefile for the linux kernel. # # Object file lists. -obj-y += core.o timer.o irq.o dma.o clock.o pinmux.o devices.o +obj-y += core.o timer.o irq.o dma.o clock.o pinmux.o devices.o \ + lradc.o spi.o mmc.o \ + power-test.o + +obj-$(CONFIG_ARCH_STMP378X) += dcp-bootstream.o usb_common.o utmixc.o + +# Power Management +obj-$(CONFIG_CPU_FREQ) += cpufreq.o + +obj-$(CONFIG_STMP3XXX_UNIQUE_ID) += unique-id.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif + +# charging/current limitation testing +obj-m += power-test.o + + --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/clock.c @@ -3,7 +3,7 @@ * * Author: Vitaly Wool * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -15,7 +15,6 @@ * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ -#define DEBUG #include #include #include @@ -30,6 +29,7 @@ #include #include #include +#include #include "clock.h" @@ -39,6 +39,7 @@ static struct clk pll_clk; static struct clk cpu_clk; static struct clk hclk; +extern int cpufreq_trig_needed; static int propagate_rate(struct clk *); @@ -52,6 +53,14 @@ return clk && !IS_ERR(clk) && clk->ops; } +int clk_get_usage(struct clk *clk) +{ + if (unlikely(!clk_good(clk))) + return 0; + + return clk->usage; +} + static int std_clk_enable(struct clk *clk) { if (clk->enable_reg) { @@ -219,6 +228,7 @@ * 108 * ns_cycle <= 875 * div */ u32 ns_cycle = 1000000 / rate; + ns_cycle *= 2; /* Fix calculate double frequency */ u32 div, reg_val; u32 lowest_result = (u32) -1; u32 lowest_div = 0, lowest_fracdiv = 0; @@ -358,6 +368,7 @@ reg_val = __raw_readl(REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU); reg_val &= ~0x3F; reg_val |= clkctrl_cpu; + __raw_writel(reg_val, REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU); for (i = 10000; i; i--) @@ -421,6 +432,83 @@ return r; } +static int emi_set_rate(struct clk *clk, u32 rate) +{ + int ret = 0; + + if (rate < 24000) + return -EINVAL; + else { + int i; + struct stmp3xxx_emi_scaling_data sc_data; + int (*scale)(struct stmp3xxx_emi_scaling_data *) = + (void *)(STMP3XXX_OCRAM_BASE + 0x1000); + void *saved_ocram; + u32 clkctrl_emi; + u32 clkctrl_frac; + int div = 1; + /* + * We've been setting div to HW_CLKCTRL_CPU_RD() & 0x3f so far. + * TODO: verify 1 is still valid. + */ + + if (!stmp3xxx_ram_funcs_sz) + goto out; + + for (clkctrl_emi = div; clkctrl_emi < 0x3f; + clkctrl_emi += div) { + clkctrl_frac = + (pll_clk.rate * 18 + rate * clkctrl_emi / 2) / + (rate * clkctrl_emi); + if (clkctrl_frac >= 18 && clkctrl_frac <= 35) { + pr_debug("%s: clkctrl_frac found %d for %d\n", + __func__, clkctrl_frac, clkctrl_emi); + if (pll_clk.rate * 18 / + clkctrl_frac / clkctrl_emi / 100 == + rate / 100) + break; + } + } + if (clkctrl_emi >= 0x3f) + return -EINVAL; + pr_debug("%s: clkctrl_emi %d, clkctrl_frac %d\n", + __func__, clkctrl_emi, clkctrl_frac); + + saved_ocram = kmalloc(stmp3xxx_ram_funcs_sz, GFP_KERNEL); + if (!saved_ocram) + return -ENOMEM; + memcpy(saved_ocram, scale, stmp3xxx_ram_funcs_sz); + memcpy(scale, stmp3xxx_ram_freq_scale, stmp3xxx_ram_funcs_sz); + + sc_data.emi_div = clkctrl_emi; + sc_data.frac_div = clkctrl_frac; + sc_data.cur_freq = clk->rate / 1000; + sc_data.new_freq = rate / 1000; + + local_irq_disable(); + local_fiq_disable(); + + scale(&sc_data); + + local_fiq_enable(); + local_irq_enable(); + + for (i = 10000; i; i--) + if (!clk_is_busy(clk)) + break; + memcpy(scale, saved_ocram, stmp3xxx_ram_funcs_sz); + kfree(saved_ocram); + + if (!i) { + printk(KERN_ERR "couldn't set up EMI divisor\n"); + ret = -ETIMEDOUT; + goto out; + } + } +out: + return ret; +} + static long emi_get_rate(struct clk *clk) { long rate = clk->parent->rate * 18; @@ -453,10 +541,15 @@ hbus_val &= ~(BM_CLKCTRL_HBUS_DIV_FRAC_EN | BM_CLKCTRL_HBUS_DIV); + hbus_val |= 1; + clk->saved_div = cpu_val & BM_CLKCTRL_CPU_DIV_CPU; cpu_val &= ~BM_CLKCTRL_CPU_DIV_CPU; cpu_val |= 1; + __raw_writel(1 << clk->bypass_shift, + clk->bypass_reg + shift); + if (machine_is_stmp378x()) { __raw_writel(hbus_val, REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS); @@ -485,10 +578,15 @@ REGS_CLKCTRL_BASE + HW_CLKCTRL_CPU); hclk.rate = 0; } - } -#endif - __raw_writel(1 << clk->bypass_shift, clk->bypass_reg + shift); + __raw_writel(1 << clk->bypass_shift, + clk->bypass_reg + shift); + } else + __raw_writel(1 << clk->bypass_shift, + clk->bypass_reg + shift); +#else + __raw_writel(1 << clk->bypass_shift, clk->bypass_reg + shift); +#endif ret = 0; } @@ -652,6 +750,8 @@ static struct clk_ops emi_ops = { .get_rate = emi_get_rate, + .set_rate = emi_set_rate, + .set_parent = clkseq_set_parent, }; /* List of on-chip clocks */ @@ -774,7 +874,7 @@ .enable_negate = 1, .bypass_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ, .bypass_shift = 1, - .flags = NEEDS_SET_PARENT, + .flags = NEEDS_SET_PARENT | CPU_FREQ_TRIG_UPDATE, .ops = &lcdif_ops, }; @@ -857,6 +957,51 @@ .enable_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0, .enable_shift = 18, .enable_negate = 1, + .flags = CPU_FREQ_TRIG_UPDATE, + .ops = &min_ops, +}; + +static struct clk vid_clk = { + .parent = &osc_24M, +#ifdef CONFIG_MACH_STMP378X + .enable_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_FRAC1, + .enable_shift = 31, + .enable_negate = 1, +#endif + .flags = RATE_PROPAGATES, + .ops = &min_ops, +}; + +static struct clk clk_tv108M_ng = { + .parent = &vid_clk, +#ifdef CONFIG_MACH_STMP378X + .enable_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_TV, + .enable_shift = 31, + .enable_negate = 1, +#endif + .flags = FIXED_RATE, + .ops = &min_ops, +}; + +static struct clk clk_tv54M = { + .parent = &vid_clk, +#ifdef CONFIG_MACH_STMP378X + .enable_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_TV, + .enable_shift = 30, + .enable_negate = 1, +#endif + .flags = FIXED_RATE, + .ops = &min_ops, +}; + +static struct clk clk_tv27M = { + .parent = &vid_clk, +#ifdef CONFIG_MACH_STMP378X + .enable_reg = REGS_CLKCTRL_BASE + HW_CLKCTRL_TV, + .enable_shift = 30, + .enable_negate = 1, +#endif + .flags = FIXED_RATE, .ops = &min_ops, }; @@ -922,6 +1067,21 @@ }, { .con_id = "usb", .clk = &usb_clk, + }, { + .con_id = "ref_vid", + .clk = &vid_clk, + }, { + .con_id = "tv108M_ng", + .clk = &clk_tv108M_ng, + }, { + .con_id = "tv54M", + .clk = &clk_tv54M, + }, { + .con_id = "tv27M", + .clk = &clk_tv27M, + }, { + .con_id = "saif", + .clk = &saif_clk, }, }; @@ -1004,6 +1164,7 @@ int clk_enable(struct clk *clk) { unsigned long clocks_flags; + u8 pre_usage; if (unlikely(!clk_good(clk))) return -EINVAL; @@ -1013,11 +1174,18 @@ spin_lock_irqsave(&clocks_lock, clocks_flags); + pre_usage = clk->usage; clk->usage++; if (clk->ops && clk->ops->enable) clk->ops->enable(clk); spin_unlock_irqrestore(&clocks_lock, clocks_flags); + if ((clk->flags & CPU_FREQ_TRIG_UPDATE) + && (pre_usage == 0)) { + cpufreq_trig_needed = 1; + cpufreq_update_policy(0); + } + return 0; } EXPORT_SYMBOL(clk_enable); @@ -1041,6 +1209,9 @@ if (unlikely(!clk_good(clk))) return; + if (!(clk->usage)) + return; + spin_lock_irqsave(&clocks_lock, clocks_flags); if ((--clk->usage) == 0 && clk->ops->disable) @@ -1049,6 +1220,12 @@ spin_unlock_irqrestore(&clocks_lock, clocks_flags); if (clk->parent) clk_disable(clk->parent); + + if ((clk->flags & CPU_FREQ_TRIG_UPDATE) + && (clk->usage == 0)) { + cpufreq_trig_needed = 1; + cpufreq_update_policy(0); + } } EXPORT_SYMBOL(clk_disable); @@ -1094,6 +1271,26 @@ } EXPORT_SYMBOL(clk_get_parent); +static void clkctrl_enable_powersavings(void) +{ + u32 reg; + + reg = __raw_readl(REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS); + reg |= BM_CLKCTRL_HBUS_APBHDMA_AS_ENABLE | + BM_CLKCTRL_HBUS_APBXDMA_AS_ENABLE | + BM_CLKCTRL_HBUS_TRAFFIC_AS_ENABLE | + BM_CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE | + BM_CLKCTRL_HBUS_CPU_DATA_AS_ENABLE | + BM_CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE | + BM_CLKCTRL_HBUS_DCP_AS_ENABLE | + BM_CLKCTRL_HBUS_PXP_AS_ENABLE | + BM_CLKCTRL_HBUS_AUTO_SLOW_MODE; + + reg &= ~BM_CLKCTRL_HBUS_SLOW_DIV; + reg |= BV_CLKCTRL_HBUS_SLOW_DIV__BY32; + __raw_writel(reg, REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS); +} + static int __init clk_init(void) { struct clk_lookup *cl; @@ -1129,6 +1326,8 @@ clkdev_add(cl); } + clkctrl_enable_powersavings(); + return 0; } --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/timer.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/timer.c @@ -3,7 +3,7 @@ * * Embedded Alley Solutions, Inc * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -35,21 +35,21 @@ struct clock_event_device *c = dev_id; /* timer 0 */ - if (__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL0) & + if (__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(0)) & BM_TIMROT_TIMCTRLn_IRQ) { stmp3xxx_clearl(BM_TIMROT_TIMCTRLn_IRQ, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL0); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(0)); c->event_handler(c); } /* timer 1 */ - else if (__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL1) + else if (__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(1)) & BM_TIMROT_TIMCTRLn_IRQ) { stmp3xxx_clearl(BM_TIMROT_TIMCTRLn_IRQ, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(1)); stmp3xxx_clearl(BM_TIMROT_TIMCTRLn_IRQ_EN, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL1); - __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(1)); + __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(1)); } return IRQ_HANDLED; @@ -57,7 +57,7 @@ static cycle_t stmp3xxx_clock_read(struct clocksource *cs) { - return ~((__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT1) + return ~((__raw_readl(REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(1)) & 0xFFFF0000) >> 16); } @@ -66,7 +66,7 @@ struct clock_event_device *dev) { /* reload the timer */ - __raw_writel(delta, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT0); + __raw_writel(delta, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(0)); return 0; } @@ -117,8 +117,8 @@ stmp3xxx_reset_block(REGS_TIMROT_BASE, false); /* clear two timers */ - __raw_writel(0, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT0); - __raw_writel(0, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT1); + __raw_writel(0, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(0)); + __raw_writel(0, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(1)); /* configure them */ __raw_writel( @@ -126,17 +126,17 @@ BM_TIMROT_TIMCTRLn_RELOAD | BM_TIMROT_TIMCTRLn_UPDATE | BM_TIMROT_TIMCTRLn_IRQ_EN, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL0); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(0)); __raw_writel( (8 << BP_TIMROT_TIMCTRLn_SELECT) | /* 32 kHz */ BM_TIMROT_TIMCTRLn_RELOAD | BM_TIMROT_TIMCTRLn_UPDATE | BM_TIMROT_TIMCTRLn_IRQ_EN, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(1)); __raw_writel(CLOCK_TICK_RATE / HZ - 1, - REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT0); - __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(0)); + __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(1)); setup_irq(IRQ_TIMER0, &stmp3xxx_timer_irq); @@ -149,7 +149,7 @@ void stmp3xxx_suspend_timer(void) { stmp3xxx_clearl(BM_TIMROT_TIMCTRLn_IRQ_EN | BM_TIMROT_TIMCTRLn_IRQ, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL0); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(0)); stmp3xxx_setl(BM_TIMROT_ROTCTRL_CLKGATE, REGS_TIMROT_BASE + HW_TIMROT_ROTCTRL); } @@ -163,16 +163,16 @@ BM_TIMROT_TIMCTRLn_RELOAD | BM_TIMROT_TIMCTRLn_UPDATE | BM_TIMROT_TIMCTRLn_IRQ_EN, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL0); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(0)); __raw_writel( 8 << BP_TIMROT_TIMCTRLn_SELECT | /* 32 kHz */ BM_TIMROT_TIMCTRLn_RELOAD | BM_TIMROT_TIMCTRLn_UPDATE | BM_TIMROT_TIMCTRLn_IRQ_EN, - REGS_TIMROT_BASE + HW_TIMROT_TIMCTRL1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCTRLn(1)); __raw_writel(CLOCK_TICK_RATE / HZ - 1, - REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT0); - __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNT1); + REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(0)); + __raw_writel(0xFFFF, REGS_TIMROT_BASE + HW_TIMROT_TIMCOUNTn(1)); } #else --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/spi.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/spi.c @@ -0,0 +1,106 @@ +/* + * Freescale STMP37XX/STMP378X SPI module pin multiplexing + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + These pins are: + SCK (SSPx_SCK) + MOSI (SSPx_CMD) + MISO (SSPx_DATA0) + SSn (SSPx_DATA3) + Please add new pins in the same order, thanks :) +*/ +static struct pin_desc ssp_pins_desc[2][4] = { + [0] = { + { PINID_SSP1_SCK, PIN_FUN1, PIN_8MA, PIN_3_3V, 0, }, + { PINID_SSP1_CMD, PIN_FUN1, PIN_4MA, PIN_3_3V, 0, }, + { PINID_SSP1_DATA0, PIN_FUN1, PIN_4MA, PIN_3_3V, 0, }, + { PINID_SSP1_DATA3, PIN_FUN1, PIN_4MA, PIN_3_3V, 0, }, + }, + [1] = { +#if defined(CONFIG_ARCH_STMP37XX) + { PINID_GPMI_IRQ, PIN_FUN3, PIN_8MA, PIN_3_3V, 0, }, + { PINID_GPMI_RDY2, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, + { PINID_EMI_CE2N, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, + { PINID_GPMI_D03, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, +#elif defined(CONFIG_ARCH_STMP378X) + { PINID_GPMI_WRN, PIN_FUN3, PIN_8MA, PIN_3_3V, 0, }, + { PINID_GPMI_RDY1, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, + { PINID_GPMI_D00, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, + { PINID_GPMI_D03, PIN_FUN3, PIN_4MA, PIN_3_3V, 0, }, +#endif + }, +}; + +static struct pin_group ssp_pins[2] = { + [0] = { + .pins = ssp_pins_desc[0], + .nr_pins = ARRAY_SIZE(ssp_pins_desc[0]), + }, + [1] = { + .pins = ssp_pins_desc[1], + .nr_pins = ARRAY_SIZE(ssp_pins_desc[1]), + }, +}; + +int stmp37xx_spi_pins_request(char *id, int ssp) +{ + return stmp3xxx_request_pin_group(&ssp_pins[ssp-1], id); +} +EXPORT_SYMBOL_GPL(stmp37xx_spi_pins_request); + +void stmp37xx_spi_pins_release(char *id, int ssp) +{ + stmp3xxx_release_pin_group(&ssp_pins[ssp-1], id); +} +EXPORT_SYMBOL_GPL(stmp37xx_spi_pins_release); + +int stmp37xx_spi_enc_init(void *spi_dev) +{ + struct spi_device *spi = spi_dev; + struct stmp37xx_spi_platform_data *data = spi->dev.platform_data; + + gpio_request(data->irq_pin, dev_name(&spi->dev)); + gpio_direction_input(data->irq_pin); + set_irq_type(gpio_to_irq(data->irq_pin), IRQ_TYPE_EDGE_FALLING); + spi->irq = gpio_to_irq(data->irq_pin); + dev_dbg(&spi->dev, "Assigned IRQ %d(%s)\n", spi->irq, __func__); + return 0; +} + +int stmp37xx_spi_enc_release(void *spi_dev) +{ + struct spi_device *spi = spi_dev; + struct stmp37xx_spi_platform_data *data = spi->dev.platform_data; + + set_irq_type(data->irq_pin, IRQ_TYPE_NONE); + gpio_free(data->irq_pin); + return 0; +} + +MODULE_AUTHOR("dmitry pervushin "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/usb_dr.c @@ -0,0 +1,112 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_UTMI_WIDE, + .power_budget = 500, /* 500 mA max power */ + .platform_resume = usb_host_phy_resume, + .transceiver = "utmi", +}; + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)REGS_USBCTRL_PHYS, + .end = (u32)(REGS_USBCTRL_PHYS + SZ_4K), + .flags = IORESOURCE_MEM, + }, + + [1] = { + .start = IRQ_USB_CTRL, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{} + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static void usb_host_phy_resume(struct fsl_usb2_platform_data *plat) +{ + stmp3xxx_clearl(BM_USBPHY_CTRL_ENHOSTDISCONDETECT, + REGS_USBPHY_BASE + HW_USBPHY_CTRL); +} + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); + + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/rotdec.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/rotdec.c @@ -0,0 +1,39 @@ +/* + * Freescale STMP378X Rotary Encoder module pin multiplexing + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include "pinmux.h" + +#define TITLE "stmp3xxx-rotdec" + +int rotdec_pinmux_request(void) +{ + return stmp3xxx_request_pin_group(&rotdec_pins, TITLE); +} +EXPORT_SYMBOL_GPL(rotdec_pinmux_request); + +void rotdec_pinmux_free(void) +{ + stmp3xxx_release_pin_group(&spdif_pins, TITLE); +} +EXPORT_SYMBOL_GPL(rotdec_pinmux_free); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Drew Benedetti "); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/gpmi.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/gpmi.c @@ -0,0 +1,40 @@ +/* + * Freescale STMP37XX/STMP378X GPMI module pin multiplexing + * + * Author: dmitry pervushin + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +int gpmi_pinmux_request(char *title) +{ + int err = 0; + + err = stmp3xxx_request_pin_group(&gpmi_pins, title); + + return err; +} +EXPORT_SYMBOL_GPL(gpmi_pinmux_request); + +void gpmi_pinmux_free(char *title) +{ + stmp3xxx_release_pin_group(&gpmi_pins, title); +} +EXPORT_SYMBOL_GPL(gpmi_pinmux_free); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("dmitry pervushin "); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/cpufreq.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/cpufreq.c @@ -0,0 +1,573 @@ +/* + * CPU frequency scaling for Freescale STMP37XX/STMP378X + * + * Author: Vitaly Wool + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include "clock.h" + +#define VERY_HI_RATE 2000000000 +#define CLKCTRL_PLL_PWD_BIT 16 +#define CLKCTRL_PLL_BYPASS 0x1ff +#define CLKCTRL_HBUS_AUTO_SLOW_MODE_BIT 20 +#define LCD_ON_CPU_FREQ_KHZ 261820 + +static struct profile { + int cpu; + int ahb; + int emi; + int ss; + int vddd; + int vddd_bo; + int cur; + int vddio; + int vdda; + int pll_off; +} profiles[] = { + { 454740, 151580, 130910, 0, 1550000, + 1450000, 355000, 3300000, 1750000, 0 }, + { 392730, 130910, 130910, 0, 1475000, + 1375000, 225000, 3300000, 1750000, 0 }, + { 360000, 120000, 120000, 0, 1375000, + 1275000, 200000, 3300000, 1750000, 0 }, + { 261820, 130910, 130910, 0, 1275000, + 1175000, 173000, 3300000, 1750000, 0 }, +#ifdef CONFIG_STMP378X_RAM_MDDR + { 64000, 64000, 48000, 3, 1050000, + 975000, 150000, 3300000, 1750000, 0 }, + { 24000, 24000, 24000, 3, 1050000, + 975000, 150000, 3075000, 1725000, 1 }, +#else + { 64000, 64000, 96000, 3, 1050000, + 975000, 150000, 3300000, 1750000, 0 }, +#endif +}; + +static u32 clkseq_setting; +static struct regulator *cpu_regulator; +static struct clk *cpu_clk; +static struct clk *ahb_clk; +static struct clk *emi_clk; +static struct clk *usb_clk; +static struct clk *lcdif_clk; +static struct regulator *vddd; +static struct regulator *vdddbo; +static struct regulator *vddio; +static struct regulator *vdda; +static struct cpufreq_frequency_table imx_freq_table[7]; +int cpu_freq_khz_min; +int cpu_freq_khz_max; +int cpufreq_trig_needed; +int cur_freq_table_size; +int lcd_on_freq_table_size; +extern int clk_get_usage(struct clk *clk); + +static void hbus_auto_slow_mode_enable(void) +{ + __raw_writel(CLKCTRL_HBUS_AUTO_SLOW_MODE_BIT, + REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS_SET); +} + +static void hbus_auto_slow_mode_disable(void) +{ + __raw_writel(CLKCTRL_HBUS_AUTO_SLOW_MODE_BIT, + REGS_CLKCTRL_BASE + HW_CLKCTRL_HBUS_CLR); +} + +int low_freq_used(void) +{ + if ((clk_get_usage(usb_clk) == 0) + && (clk_get_usage(lcdif_clk) == 0)) + return 1; + else + return 0; + } + +static int set_freq_table(struct cpufreq_policy *policy, int end_index) +{ + int ret = 0; + int i; + + cpu_freq_khz_min = profiles[0].cpu; + cpu_freq_khz_max = profiles[0].cpu; + for (i = 0; i < end_index; i++) { + imx_freq_table[end_index - 1 - i].index = end_index - i; + imx_freq_table[end_index - 1 - i].frequency = + profiles[i].cpu; + + if ((profiles[i].cpu) < cpu_freq_khz_min) + cpu_freq_khz_min = profiles[i].cpu; + + if ((profiles[i].cpu) > cpu_freq_khz_max) + cpu_freq_khz_max = profiles[i].cpu; + } + + imx_freq_table[i].index = 0; + imx_freq_table[i].frequency = CPUFREQ_TABLE_END; + + policy->cur = clk_get_rate(cpu_clk); + policy->governor = CPUFREQ_DEFAULT_GOVERNOR; + policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min; + policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max; + + /* Manual states, that PLL stabilizes in two CLK32 periods */ + policy->cpuinfo.transition_latency = 1000; + + ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table); + + if (ret < 0) { + printk(KERN_ERR "%s: failed to register i.MXC CPUfreq\n", + __func__); + return ret; + } + + cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu); + + return ret; +} + +static int set_op(unsigned int target_freq) +{ + struct cpufreq_freqs freqs; + int ret = 0, i; + + freqs.old = clk_get_rate(cpu_clk); + freqs.cpu = 0; + +/* work around usb problem when in updater firmare mode*/ +#ifdef CONFIG_STMP_UTP + return 0; +#endif + for (i = cur_freq_table_size - 1; i > 0; i--) { + if (profiles[i].cpu <= target_freq && + target_freq < profiles[i - 1].cpu) { + freqs.new = profiles[i].cpu; + break; + } + + if (!vddd && profiles[i].cpu > freqs.old) { + /* can't safely set more than now */ + freqs.new = profiles[i + 1].cpu; + break; + } + } + + if (i == 0) + freqs.new = profiles[i].cpu; + + if (freqs.old == freqs.new) { + if (regulator_get_voltage(vddd) == profiles[i].vddd) + return 0; + } + + if (freqs.old == 24000 && freqs.new > 24000) { + /* turn pll on */ + __raw_writel(CLKCTRL_PLL_PWD_BIT, REGS_CLKCTRL_BASE + + HW_CLKCTRL_PLLCTRL0_SET); + udelay(10); + } else if (freqs.old > 24000 && freqs.new == 24000) + clkseq_setting = __raw_readl(REGS_CLKCTRL_BASE + + HW_CLKCTRL_CLKSEQ); + + if (cpu_regulator && (freqs.old < freqs.new)) { + ret = regulator_set_current_limit(cpu_regulator, + profiles[i].cur, profiles[i].cur); + if (ret) + return ret; + } + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + if (freqs.old > freqs.new) { + int ss = profiles[i].ss; + clk_set_rate(cpu_clk, profiles[i].cpu); + clk_set_rate(ahb_clk, profiles[i].ahb); + clk_set_rate(emi_clk, profiles[i].emi); + __raw_writel(BF(ss, DIGCTL_ARMCACHE_VALID_SS) | + BF(ss, DIGCTL_ARMCACHE_DRTY_SS) | + BF(ss, DIGCTL_ARMCACHE_CACHE_SS) | + BF(ss, DIGCTL_ARMCACHE_DTAG_SS) | + BF(ss, DIGCTL_ARMCACHE_ITAG_SS), + REGS_DIGCTL_BASE + HW_DIGCTL_ARMCACHE); + if (vddd && vdddbo && vddio && vdda) { + ret = regulator_set_voltage(vddd, + profiles[i].vddd, + profiles[i].vddd); + if (ret) + ret = regulator_set_voltage(vddd, + profiles[i].vddd, + profiles[i].vddd); + regulator_set_voltage(vdddbo, + profiles[i].vddd_bo, + profiles[i].vddd_bo); + + ret = regulator_set_voltage(vddio, + profiles[i].vddio, + profiles[i].vddio); + if (ret) + ret = regulator_set_voltage(vddio, + profiles[i].vddio, + profiles[i].vddio); + ret = regulator_set_voltage(vdda, + profiles[i].vdda, + profiles[i].vdda); + if (ret) + ret = regulator_set_voltage(vdda, + profiles[i].vdda, + profiles[i].vdda); + } + } else { + int ss = profiles[i].ss; + if (vddd && vdddbo && vddio && vdda) { + ret = regulator_set_voltage(vddd, + profiles[i].vddd, + profiles[i].vddd); + if (ret) + ret = regulator_set_voltage(vddd, + profiles[i].vddd, + profiles[i].vddd); + regulator_set_voltage(vdddbo, + profiles[i].vddd_bo, + profiles[i].vddd_bo); + ret = regulator_set_voltage(vddio, + profiles[i].vddio, + profiles[i].vddio); + if (ret) + ret = regulator_set_voltage(vddio, + profiles[i].vddio, + profiles[i].vddio); + ret = regulator_set_voltage(vdda, + profiles[i].vdda, + profiles[i].vdda); + if (ret) + ret = regulator_set_voltage(vdda, + profiles[i].vdda, + profiles[i].vdda); + } + __raw_writel(BF(ss, DIGCTL_ARMCACHE_VALID_SS) | + BF(ss, DIGCTL_ARMCACHE_DRTY_SS) | + BF(ss, DIGCTL_ARMCACHE_CACHE_SS) | + BF(ss, DIGCTL_ARMCACHE_DTAG_SS) | + BF(ss, DIGCTL_ARMCACHE_ITAG_SS), + REGS_DIGCTL_BASE + HW_DIGCTL_ARMCACHE); + clk_set_rate(cpu_clk, profiles[i].cpu); + clk_set_rate(ahb_clk, profiles[i].ahb); + clk_set_rate(emi_clk, profiles[i].emi); + } + udelay(100); + + if (freqs.old > 24000 && freqs.new == 24000) { + /* turn pll off */ + __raw_writel(CLKCTRL_PLL_PWD_BIT, REGS_CLKCTRL_BASE + + HW_CLKCTRL_PLLCTRL0_CLR); + __raw_writel(CLKCTRL_PLL_BYPASS, REGS_CLKCTRL_BASE + + HW_CLKCTRL_CLKSEQ); + } else if (freqs.old == 24000 && freqs.new > 24000) + __raw_writel(clkseq_setting, REGS_CLKCTRL_BASE + + HW_CLKCTRL_CLKSEQ); + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + if (cpu_regulator && (freqs.old > freqs.new)) /* will not fail */ + regulator_set_current_limit(cpu_regulator, + profiles[i].cur, + profiles[i].cur); + + return ret; +} + +static int calc_frequency_khz(int target, unsigned int relation) +{ + int i; + + if (target == clk_get_rate(cpu_clk)) + return target; + + if (relation == CPUFREQ_RELATION_H) { + for (i = cur_freq_table_size - 1; i >= 0; i--) { + if (imx_freq_table[i].frequency <= target) + return imx_freq_table[i].frequency; + } + } else if (relation == CPUFREQ_RELATION_L) { + for (i = 0; i < cur_freq_table_size; i++) { + if (imx_freq_table[i].frequency >= target) + return imx_freq_table[i].frequency; + } +} + + printk(KERN_ERR "Error: No valid cpufreq relation\n"); + return cpu_freq_khz_max; +} + +static int stmp3xxx_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + int freq_KHz; + struct cpufreq_freqs freqs; + int low_freq_bus_ready = 0; + + if (cpufreq_trig_needed == 1) { + /* Set the current working point. */ + cpufreq_trig_needed = 0; + target_freq = clk_get_rate(cpu_clk); + freq_KHz = calc_frequency_khz(target_freq, relation); + + freqs.old = target_freq; + freqs.new = freq_KHz; + freqs.cpu = 0; + freqs.flags = 0; + + low_freq_bus_ready = low_freq_used(); + if (low_freq_bus_ready) { + cur_freq_table_size = ARRAY_SIZE(profiles); + hbus_auto_slow_mode_enable(); + } else { + cur_freq_table_size = lcd_on_freq_table_size; + hbus_auto_slow_mode_disable(); + } + + set_freq_table(policy, cur_freq_table_size); + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return 0; +} + + /* + * Some governors do not respects CPU and policy lower limits + * which leads to bad things (division by zero etc), ensure + * that such things do not happen. + */ + if (target_freq < policy->cpuinfo.min_freq) + target_freq = policy->cpuinfo.min_freq; + + if (target_freq < policy->min) + target_freq = policy->min; + + freq_KHz = calc_frequency_khz(target_freq, relation); + return set_op(freq_KHz); + } + +static unsigned int stmp3xxx_getspeed(unsigned int cpu) +{ + struct cpufreq_freqs freqs; + int freq_KHz; + unsigned int target_freq; + + if (cpu) + return 0; + + if (cpufreq_trig_needed == 1) { + target_freq = clk_get_rate(cpu_clk); + freq_KHz = calc_frequency_khz(target_freq, CPUFREQ_RELATION_L); + + freqs.old = target_freq; + freqs.new = freq_KHz; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + } + + return clk_get_rate(cpu_clk); +} + + +static int stmp3xxx_verify_speed(struct cpufreq_policy *policy) +{ + if (policy->cpu != 0) + return -EINVAL; + + return cpufreq_frequency_table_verify(policy, imx_freq_table); +} + +static int __init stmp3xxx_cpu_init(struct cpufreq_policy *policy) +{ + int ret = 0; + int i; + + cpu_clk = clk_get(NULL, "cpu"); + if (IS_ERR(cpu_clk)) { + ret = PTR_ERR(cpu_clk); + goto out_cpu; + } + + ahb_clk = clk_get(NULL, "hclk"); + if (IS_ERR(ahb_clk)) { + ret = PTR_ERR(ahb_clk); + goto out_ahb; + } + + emi_clk = clk_get(NULL, "emi"); + if (IS_ERR(emi_clk)) { + ret = PTR_ERR(emi_clk); + goto out_emi; + } + + usb_clk = clk_get(NULL, "usb"); + if (IS_ERR(usb_clk)) { + ret = PTR_ERR(usb_clk); + goto out_usb; + } + + lcdif_clk = clk_get(NULL, "lcdif"); + if (IS_ERR(lcdif_clk)) { + ret = PTR_ERR(lcdif_clk); + goto out_lcd; + } + + if (policy->cpu != 0) + return -EINVAL; + + cpu_regulator = regulator_get(NULL, "cpufreq-1"); + if (IS_ERR(cpu_regulator)) { + printk(KERN_ERR "%s: failed to get CPU regulator\n", __func__); + cpu_regulator = NULL; + ret = PTR_ERR(cpu_regulator); + goto out_cur; + } + + vddd = regulator_get(NULL, "vddd"); + if (IS_ERR(vddd)) { + printk(KERN_ERR "%s: failed to get vddd regulator\n", __func__); + vddd = NULL; + ret = PTR_ERR(vddd); + goto out_cur; + } + + vdddbo = regulator_get(NULL, "vddd_bo"); + if (IS_ERR(vdddbo)) { + vdddbo = NULL; + pr_warning("unable to get vdddbo"); + ret = PTR_ERR(vdddbo); + goto out_cur; + } + + vddio = regulator_get(NULL, "vddio"); + if (IS_ERR(vddio)) { + vddio = NULL; + pr_warning("unable to get vddio"); + ret = PTR_ERR(vddio); + goto out_cur; + } + vdda = regulator_get(NULL, "vdda"); + if (IS_ERR(vdda)) { + vdda = NULL; + pr_warning("unable to get vdda"); + ret = PTR_ERR(vdda); + goto out_cur; + } + + for (i = 0; i < ARRAY_SIZE(profiles); i++) { + if ((profiles[i].cpu) == LCD_ON_CPU_FREQ_KHZ) { + lcd_on_freq_table_size = i + 1; + break; + } + } + + if (i == ARRAY_SIZE(profiles)) { + pr_warning("unable to find frequency for LCD on"); + printk(KERN_ERR "lcd_on_freq_table_size=%d\n", + lcd_on_freq_table_size); + goto out_cur; + } + + /* Set the current working point. */ + set_freq_table(policy, lcd_on_freq_table_size); + cpufreq_trig_needed = 0; + cur_freq_table_size = lcd_on_freq_table_size; + return 0; +out_cur: + if (cpu_regulator) + regulator_put(cpu_regulator); + if (vddd) + regulator_put(vddd); + if (vddio) + regulator_put(vddio); + if (vdda) + regulator_put(vdda); + + clk_put(lcdif_clk); +out_lcd: + clk_put(usb_clk); +out_usb: + clk_put(emi_clk); +out_emi: + clk_put(ahb_clk); +out_ahb: + clk_put(cpu_clk); +out_cpu: + return ret; +} + +static int stmp3xxx_cpu_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_put_attr(policy->cpu); + + /* Reset CPU to 392MHz */ + set_op(profiles[1].cpu); + + clk_put(cpu_clk); + regulator_put(cpu_regulator); + return 0; +} + +static struct cpufreq_driver stmp3xxx_driver = { + .flags = CPUFREQ_STICKY, + .verify = stmp3xxx_verify_speed, + .target = stmp3xxx_target, + .get = stmp3xxx_getspeed, + .init = stmp3xxx_cpu_init, + .exit = stmp3xxx_cpu_exit, + .name = "stmp3xxx", +}; + +static int __devinit stmp3xxx_cpufreq_init(void) +{ + return cpufreq_register_driver(&stmp3xxx_driver); +} + +static void stmp3xxx_cpufreq_exit(void) +{ + cpufreq_unregister_driver(&stmp3xxx_driver); +} + +module_init(stmp3xxx_cpufreq_init); +module_exit(stmp3xxx_cpufreq_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("CPUfreq driver for i.MX"); +MODULE_LICENSE("GPL"); + --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/clock.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/clock.h @@ -3,7 +3,7 @@ * * Author: Vitaly Wool * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -48,6 +48,23 @@ struct clk_ops *ops; }; +struct stmp3xxx_emi_scaling_data { + u32 emi_div; + u32 frac_div; + u32 cur_freq; + u32 new_freq; +}; + +#ifdef CONFIG_STMP378X_RAM_FREQ_SCALING +extern void stmp3xxx_ram_freq_scale(struct stmp3xxx_emi_scaling_data *); +extern u32 stmp3xxx_ram_funcs_sz; +#else +static inline void stmp3xxx_ram_freq_scale(struct stmp3xxx_emi_scaling_data *p) +{ +} +static u32 stmp3xxx_ram_funcs_sz; +#endif + #endif /* __ASSEMBLER__ */ /* Flags */ @@ -57,5 +74,6 @@ #define FIXED_RATE (1<<3) #define ENABLED (1<<4) #define NEEDS_SET_PARENT (1<<5) +#define CPU_FREQ_TRIG_UPDATE (1<<6) #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/utmixc.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/utmixc.c @@ -0,0 +1,82 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static struct regulator *usbotg_regux; + +static void usb_utmi_init(struct fsl_xcvr_ops *this) +{ +} + +static void usb_utmi_uninit(struct fsl_xcvr_ops *this) +{ +} + +/*! + * set vbus power + * + * @param view viewport register + * @param on power on or off + */ +static void set_power(struct fsl_xcvr_ops *this, + struct fsl_usb2_platform_data *pdata, int on) +{ + struct device *dev = &pdata->pdev->dev; + + pr_debug("real %s(on=%d) pdata=0x%p\n", __func__, on, pdata); +} + +static struct fsl_xcvr_ops utmi_ops = { + .name = "utmi", + .xcvr_type = PORTSC_PTS_UTMI, + .init = usb_utmi_init, + .uninit = usb_utmi_uninit, + .set_vbus_power = set_power, +}; + +extern void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops); + +static int __init utmixc_init(void) +{ + fsl_usb_xcvr_register(&utmi_ops); + return 0; +} + +extern void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops); + +static void __exit utmixc_exit(void) +{ + fsl_usb_xcvr_unregister(&utmi_ops); +} + +module_init(utmixc_init); +module_exit(utmixc_exit); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("utmi xcvr driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/usb_common.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/usb_common.c @@ -0,0 +1,297 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * otg_{get,set}_transceiver() are from arm/plat-omap/usb.c. + * which is Copyright (C) 2004 Texas Instruments, Inc. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + *@defgroup USB ARC OTG USB Driver + */ + +/*! + * @file usb_common.c + * + * @brief platform related part of usb driver. + * @ingroup USB + */ + +/*! + *Include files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXC_NUMBER_USB_TRANSCEIVER 6 +struct fsl_xcvr_ops *g_xc_ops[MXC_NUMBER_USB_TRANSCEIVER] = { NULL }; + +void fsl_usb_xcvr_register(struct fsl_xcvr_ops *xcvr_ops) +{ + int i; + + pr_debug("%s\n", __func__); + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (g_xc_ops[i] == NULL) { + g_xc_ops[i] = xcvr_ops; + return; + } + } + + pr_debug("Failed %s\n", __func__); +} +EXPORT_SYMBOL(fsl_usb_xcvr_register); + +void fsl_usb_xcvr_unregister(struct fsl_xcvr_ops *xcvr_ops) +{ + int i; + + pr_debug("%s\n", __func__); + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (g_xc_ops[i] == xcvr_ops) { + g_xc_ops[i] = NULL; + return; + } + } + + pr_debug("Failed %s\n", __func__); +} +EXPORT_SYMBOL(fsl_usb_xcvr_unregister); + +#if defined(CONFIG_USB_OTG) +static struct otg_transceiver *xceiv; + +/** + * otg_get_transceiver - find the (single) OTG transceiver driver + * + * Returns the transceiver driver, after getting a refcount to it; or + * null if there is no such transceiver. The caller is responsible for + * releasing that count. + */ +struct otg_transceiver *otg_get_transceiver(void) +{ + pr_debug("%s xceiv=0x%p\n", __func__, xceiv); + if (xceiv) + get_device(xceiv->dev); + return xceiv; +} +EXPORT_SYMBOL(otg_get_transceiver); + +int otg_set_transceiver(struct otg_transceiver *x) +{ + pr_debug("%s xceiv=0x%p x=0x%p\n", __func__, xceiv, x); + /* + if (x == NULL) + stmp3xxx_release_pin_group(&usb_mux_pins, "usb"); + */ + if (xceiv && x) + return -EBUSY; + xceiv = x; + return 0; +} +EXPORT_SYMBOL(otg_set_transceiver); + +static struct resource *otg_resources; + +struct resource *otg_get_resources(void) +{ + pr_debug("otg_get_resources\n"); + return otg_resources; +} +EXPORT_SYMBOL(otg_get_resources); + +int otg_set_resources(struct resource *resources) +{ + //stmp3xxx_request_pin_group(&usb_mux_pins, "usb"); + otg_resources = resources; + return 0; +} +EXPORT_SYMBOL(otg_set_resources); +#endif + +static struct fsl_xcvr_ops *fsl_usb_get_xcvr(char *name) +{ + int i; + + pr_debug("%s\n", __func__); + if (name == NULL) { + printk(KERN_ERR "get_xcvr(): No tranceiver name\n"); + return NULL; + } + + for (i = 0; i < MXC_NUMBER_USB_TRANSCEIVER; i++) { + if (strcmp(g_xc_ops[i]->name, name) == 0) { + return g_xc_ops[i]; + } + } + pr_debug("Failed %s\n", __func__); + return NULL; +} + +/* The dmamask must be set for EHCI to work */ +static u64 ehci_dmamask = ~(u32) 0; + +static int instance_id; +struct platform_device *host_pdev_register(struct resource *res, int n_res, + struct fsl_usb2_platform_data *config) +{ + struct platform_device *pdev; + int rc; + instance_id = 0; + + pr_debug("register host res=0x%p, size=%d\n", res, n_res); + + pdev = platform_device_register_simple("fsl-ehci", + instance_id, res, n_res); + if (IS_ERR(pdev)) { + pr_debug("can't register %s Host, %ld\n", + config->name, PTR_ERR(pdev)); + return NULL; + } + + pdev->dev.coherent_dma_mask = 0xffffffff; + pdev->dev.dma_mask = &ehci_dmamask; + + /* + * platform_device_add_data() makes a copy of + * the platform_data passed in. That makes it + * impossible to share the same config struct for + * all OTG devices (host,gadget,otg). So, just + * set the platorm_data pointer ourselves. + */ + rc = platform_device_add_data(pdev, config, + sizeof(struct fsl_usb2_platform_data)); + if (rc) { + platform_device_unregister(pdev); + return NULL; + } + + pr_debug(KERN_INFO "usb: %s host (%s) registered\n", config->name, + config->transceiver); + pr_debug("pdev=0x%p dev=0x%p resources=0x%p pdata=0x%p\n", + pdev, &pdev->dev, pdev->resource, pdev->dev.platform_data); + + instance_id++; + + return pdev; +} + +int usb_phy_enable(void) +{ + u32 tmp; + /* Reset USBPHY module */ + stmp3xxx_setl(BM_USBPHY_CTRL_SFTRST, + REGS_USBPHY_BASE + HW_USBPHY_CTRL); + udelay(10); + + /* Remove CLKGATE and SFTRST */ + stmp3xxx_clearl(BM_USBPHY_CTRL_CLKGATE | BM_USBPHY_CTRL_SFTRST, + REGS_USBPHY_BASE + HW_USBPHY_CTRL); + + /* Turn on the USB clocks */ + stmp3xxx_setl(BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS, + REGS_CLKCTRL_BASE + HW_CLKCTRL_PLLCTRL0); + stmp3xxx_clearl(BM_DIGCTL_CTRL_USB_CLKGATE, + REGS_DIGCTL_BASE + HW_DIGCTL_CTRL); + + /* set UTMI xcvr */ + /* Workaround an IC issue for ehci driver: + * when turn off root hub port power, EHCI set + * PORTSC reserved bits to be 0, but PTW with 0 + * means 8 bits tranceiver width, here change + * it back to be 16 bits and do PHY diable and + * then enable. + */ + tmp = __raw_readl(REGS_USBCTRL_BASE + HW_USBCTRL_PORTSC1) & ~PORTSC_PTS_MASK; + tmp |= (PORTSC_PTS_UTMI | PORTSC_PTW); + __raw_writel(tmp, REGS_USBCTRL_BASE + HW_USBCTRL_PORTSC1); + + /* Power up the PHY */ + __raw_writel(0, REGS_USBPHY_BASE + HW_USBPHY_PWD); + + /* + * Set precharge bit to cure overshoot problems at the + * start of packets + */ + stmp3xxx_setl(1, REGS_USBPHY_BASE + HW_USBPHY_CTRL); + +#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) + /* enable disconnect detector */ + /* enable disconnect detector must be after entry high speed mode*/ + /*HW_USBPHY_CTRL_SET(BM_USBPHY_CTRL_ENHOSTDISCONDETECT); + */ +#endif + return 0; +} +EXPORT_SYMBOL(usb_phy_enable); + +static int otg_used; + +int usbotg_init(struct platform_device *pdev) +{ + struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; + struct fsl_xcvr_ops *xops; + + pr_debug("%s: pdev=0x%p pdata=0x%p\n", __func__, pdev, pdata); + + xops = fsl_usb_get_xcvr(pdata->transceiver); + if (!xops) { + printk(KERN_ERR "DR transceiver ops missing\n"); + return -EINVAL; + } + pdata->xcvr_ops = xops; + pdata->xcvr_type = xops->xcvr_type; + pdata->pdev = pdev; + + otg_used = 0; + if (!otg_used) { + pr_debug("%s: grab pins\n", __func__); + if (xops->init) + xops->init(xops); + usb_phy_enable(); + } + + otg_used++; + pr_debug("%s: success\n", __func__); + return 0; +} +EXPORT_SYMBOL(usbotg_init); + +void usbotg_uninit(struct fsl_usb2_platform_data *pdata) +{ + pr_debug("%s\n", __func__); + + if (pdata->xcvr_ops && pdata->xcvr_ops->uninit) + pdata->xcvr_ops->uninit(pdata->xcvr_ops); + + pdata->regs = NULL; + otg_used--; +} +EXPORT_SYMBOL(usbotg_uninit); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/pinmux.c +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/pinmux.c @@ -3,7 +3,7 @@ * * Author: Vladislav Buzov * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -15,7 +15,7 @@ * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ -#define DEBUG +//#define DEBUG #include #include #include @@ -429,6 +429,16 @@ stmp3xxx_setl(1 << gpio, pm->pin2irq); } +static void stmp3xxx_pin_disable_irq(unsigned irq) +{ + struct stmp3xxx_pinmux_bank *pm; + unsigned gpio; + + stmp3xxx_irq_to_gpio(irq, &pm, &gpio); + stmp3xxx_clearl(1 << gpio, pm->irqen); + stmp3xxx_clearl(1 << gpio, pm->pin2irq); +} + static inline struct stmp3xxx_pinmux_bank *to_pinmux_bank(struct gpio_chip *chip) { @@ -490,22 +500,27 @@ static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc) { struct stmp3xxx_pinmux_bank *pm = get_irq_data(irq); - int gpio_irq = pm->virq; + int gpio_virq = pm->virq; u32 stat = __raw_readl(pm->irqstat); + desc->chip->mask(irq); /* irq = gpio irq number */ + while (stat) { if (stat & 1) - irq_desc[gpio_irq].handle_irq(gpio_irq, - &irq_desc[gpio_irq]); - gpio_irq++; + generic_handle_irq(gpio_virq); + gpio_virq++; stat >>= 1; } + + desc->chip->ack(irq); + desc->chip->unmask(irq); } static struct irq_chip gpio_irq_chip = { .ack = stmp3xxx_pin_ack_irq, .mask = stmp3xxx_pin_mask_irq, .unmask = stmp3xxx_pin_unmask_irq, + .disable = stmp3xxx_pin_disable_irq, .set_type = stmp3xxx_set_irqtype, }; @@ -532,7 +547,7 @@ pm->chip.free = stmp3xxx_gpio_free; pm->virq = virtual_irq_start + b * 32; - for (virq = pm->virq; virq < pm->virq; virq++) { + for (virq = pm->virq; virq < pm->virq + 32; virq++) { gpio_irq_chip.mask(virq); set_irq_chip(virq, &gpio_irq_chip); set_irq_handler(virq, handle_level_irq); --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/power.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/power.h @@ -0,0 +1,67 @@ +/* + * Freescale STMP37XX/STMP378X voltage regulator structure declarations + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __VOLTAGE_H +#define __VOLTAGE_H +#include +//#include +#include + +struct stmp3xxx_regulator { + struct regulator_desc regulator; + struct stmp3xxx_regulator *parent; + struct stmp3xxx_platform_regulator_data *rdata; + struct completion done; + + spinlock_t lock; + wait_queue_head_t wait_q; + struct notifier_block nb; + + int mode; + int cur_voltage; + int cur_current; + int next_current; +}; + + +struct stmp3xxx_platform_regulator_data { + char name[80]; + char *parent_name; + int (*reg_register)(struct stmp3xxx_regulator *sreg); + int (*set_voltage)(struct stmp3xxx_regulator *sreg, int uv); + int (*get_voltage)(struct stmp3xxx_regulator *sreg); + int (*set_current)(struct stmp3xxx_regulator *sreg, int uA); + int (*get_current)(struct stmp3xxx_regulator *sreg); + int (*enable)(struct stmp3xxx_regulator *sreg); + int (*disable)(struct stmp3xxx_regulator *sreg); + int (*is_enabled)(struct stmp3xxx_regulator *sreg); + int (*set_mode)(struct stmp3xxx_regulator *sreg, int mode); + int (*get_mode)(struct stmp3xxx_regulator *sreg); + int (*get_optimum_mode)(struct stmp3xxx_regulator *sreg, + int input_uV, int output_uV, int load_uA); + u32 control_reg; + int min_voltage; + int max_voltage; + int max_current; + struct regulation_constraints *constraints; +}; + +int stmp3xxx_register_regulator( + struct stmp3xxx_regulator *reg_data, int reg, + struct regulator_init_data *initdata); + +#endif /* __VOLTAGE_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/mmc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/mmc.h @@ -4,11 +4,20 @@ #include struct stmp3xxxmmc_platform_data { - int (*get_wp)(void); - unsigned long (*setclock)(void __iomem *base, unsigned long); - void (*cmd_pullup)(int); - int (*hw_init)(void); + int (*hw_init)(void); void (*hw_release)(void); + void (*cmd_pullup)(int enable); + int (*get_wp)(void); + unsigned long (*setclock)(unsigned long hz); + int read_uA; + int write_uA; }; + +extern unsigned long stmp3xxxmmc_setclock_ssp1(unsigned long hz); +extern void stmp3xxxmmc_cmd_pullup_ssp1(int enable); +extern void stmp3xxxmmc_hw_release_ssp1(void); +extern int stmp3xxxmmc_hw_init_ssp1(void); +extern int stmp3xxxmmc_get_wp(void); + #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/ocram-malloc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/ocram-malloc.h @@ -0,0 +1,26 @@ +/* + * Freescale STMP37XX/STMP378X OCRAM allocator interface + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_PLAT_OCRAM_MALLOC_H +#define __ASM_PLAT_OCRAM_MALLOC_H + +extern int ocram_malloc_init(void); + +extern void *ocram_malloc(size_t size, dma_addr_t *phys); +extern void ocram_free(void *tofree); + +#endif /* __ASM_PLAT_OCRAM_MALLOC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/unique-id.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/unique-id.h @@ -0,0 +1,30 @@ +/* + * Unique ID interface for ID storage providers + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __UNIQUE_ID_H +#define __UNIQUE_ID_H + +struct uid_ops { + ssize_t (*id_show)(void *context, char *page, int ascii); + ssize_t (*id_store)(void *context, const char *page, + size_t count, int ascii); +}; + +struct kobject *uid_provider_init(const char *name, + struct uid_ops *ops, void *context); +void uid_provider_remove(const char *name); +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/pwm-led.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/pwm-led.h @@ -0,0 +1,25 @@ +/* + * Freescale STMP37XX/STMP378X PWM LED arch-dependent structure + * and functions declarations + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_PLAT_PWM_LED_H +#define __ASM_PLAT_PWM_LED_H + +extern int pwm_led_pinmux_request(int, char *); +extern void pwm_led_pinmux_free(int, char *); + +#endif /* __ASM_PLAT_PWM_LED_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/regulator.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/regulator.h @@ -0,0 +1,23 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __PLAT_REGULATOR_H_ +#define __PLAT_REGULATOR_H_ +#define STMP3XXX_REG5V_NOT_USB 0 +#define STMP3XXX_REG5V_IS_USB 1 +#define STMP3XXX_VDDD 0 +#define STMP3XXX_VDDA 1 +#define STMP3XXX_VDDIO 2 +#define STMP3XXX_VDDDBO 3 +#define STMP3XXX_OVERALL_CUR 4 + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/rotdec.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/rotdec.h @@ -0,0 +1,25 @@ +/* + * Freescale STMP37XX/STMP378X dev board rotary encoder arch-dependent + * structure and functions declarations + * + * Author: Drew Benedetti + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_PLAT_ROTDEC_H +#define __ASM_PLAT_ROTDEC_H + +extern int rotdec_pinmux_request(void); +extern void rotdec_pinmux_free(void); + +#endif /* __ASM_PLAT_ROTDEC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/arc_otg.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/arc_otg.h @@ -0,0 +1,97 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_ARC_OTG_H__ +#define __ASM_ARCH_MXC_ARC_OTG_H__ + +#include + +/* + * register bits + */ + +/* x_PORTSCx */ +#define PORTSC_PTS_MASK (3 << 30)/* parallel xcvr select mask */ +#define PORTSC_PTS_UTMI (0 << 30)/* UTMI/UTMI+ */ +#define PORTSC_PTS_PHILIPS (1 << 30)/* Philips classic */ +#define PORTSC_PTS_ULPI (2 << 30)/* ULPI */ +#define PORTSC_PTS_SERIAL (3 << 30)/* serial */ +#define PORTSC_STS (1 << 29)/* serial xcvr select */ +#define PORTSC_PTW (1 << 28)/* UTMI width */ +#define PORTSC_PORT_POWER (1 << 12)/* port power */ +#define PORTSC_LS_MASK (3 << 10)/* Line State mask */ +#define PORTSC_LS_SE0 (0 << 10)/* SE0 */ +#define PORTSC_LS_K_STATE (1 << 10)/* K-state */ +#define PORTSC_LS_J_STATE (2 << 10)/* J-state */ +#define PORTSC_PORT_RESET (1 << 8)/* Port reset */ +#define PORTSC_PORT_SUSPEND (1 << 7)/* Suspend */ +#define PORTSC_PORT_FORCE_RESUME (1 << 6)/* Force port resume */ +#define PORTSC_OVER_CURRENT_CHG (1 << 5)/* over current change */ +#define PORTSC_OVER_CURRENT_ACT (1 << 4)/* over currrent active */ +#define PORTSC_PORT_EN_DIS_CHANGE (1 << 3)/* port {en,dis}able change */ +#define PORTSC_PORT_ENABLE (1 << 2)/* port enabled */ +#define PORTSC_CONNECT_STATUS_CHANGE (1 << 1)/* connect status change */ +#define PORTSC_CURRENT_CONNECT_STATUS (1 << 0)/* current connect status */ + +#define PORTSC_W1C_BITS (PORTSC_CONNECT_STATUS_CHANGE | \ + PORTSC_PORT_EN_DIS_CHANGE | \ + PORTSC_OVER_CURRENT_CHG) + +/* UOG_OTGSC Register Bits */ +/* control bits: */ +#define OTGSC_CTRL_VBUS_DISCHARGE (1 << 0) +#define OTGSC_CTRL_VBUS_CHARGE (1 << 1) +#define OTGSC_CTRL_OTG_TERM (1 << 3)/* controls DM pulldown */ +#define OTGSC_CTRL_DATA_PULSING (1 << 4) +#define OTGSC_CTRL_USB_ID_PU (1 << 5)/* enable ID pullup */ +/* current status: (R/O) */ +#define OTGSC_STS_USB_ID (1 << 8)/* 0=A-device 1=B-device */ +#define OTGSC_STS_A_VBUS_VALID (1 << 9) +#define OTGSC_STS_A_SESSION_VALID (1 << 10) +#define OTGSC_STS_B_SESSION_VALID (1 << 11) +#define OTGSC_STS_B_SESSION_END (1 << 12) +#define OTGSC_STS_1ms_TIMER (1 << 13) +#define OTGSC_STS_DATA_PULSE (1 << 14) +/* interrupt status: (write to clear) */ +#define OTGSC_IS_MASK (0x7f << 16) +#define OTGSC_IS_USB_ID (1 << 16) +#define OTGSC_IS_A_VBUS_VALID (1 << 17) +#define OTGSC_IS_A_SESSION_VALID (1 << 18) +#define OTGSC_IS_B_SESSION_VALID (1 << 19) +#define OTGSC_IS_B_SESSION_END (1 << 20) +#define OTGSC_IS_1ms_TIMER (1 << 21) +#define OTGSC_IS_DATA_PULSE (1 << 22) +/* interrupt enables: */ +#define OTGSC_IE_MASK (0x7f << 24) +#define OTGSC_IE_USB_ID (1 << 24) +#define OTGSC_IE_A_VBUS_VALID (1 << 25) +#define OTGSC_IE_A_SESSION_VALID (1 << 26) +#define OTGSC_IE_B_SESSION_VALID (1 << 27) +#define OTGSC_IE_B_SESSION_END (1 << 28) +#define OTGSC_IE_1ms_TIMER (1 << 29) +#define OTGSC_IE_DATA_PULSE (1 << 30) + +/* x_USBMODE */ +#define USBMODE_SLOM (1 << 3) /* setup lockout mode */ +#define USBMODE_ES (1 << 2) /* (big) endian select */ +#define USBMODE_CM_MASK (3 << 0) /* controller mode mask */ +#define USBMODE_CM_HOST (3 << 0) /* host */ +#define USBMODE_CM_DEVICE (2 << 0) /* device */ +#define USBMODE_CM_reserved (1 << 0) /* reserved */ + +/* USBCMD */ +#define UCMD_RUN_STOP (1 << 0) /* controller run/stop */ +#define UCMD_RESET (1 << 1) /* controller reset */ +#define UCMD_ITC_NO_THRESHOLD (~(0xff << 16))/* Interrupt Threshold Control */ + +#define HCSPARAMS_PPC (0x1<<4) /* Port Power Control */ +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/stmp3xxx.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/stmp3xxx.h @@ -3,7 +3,7 @@ * * Embedded Alley Solutions, Inc * - * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ @@ -19,9 +19,43 @@ #define __ASM_PLAT_STMP3XXX_H #include +#include +#include extern struct sys_timer stmp3xxx_timer; +struct stmpkbd_keypair { + int raw; + int kcode; +}; + +struct stmp37xx_spi_platform_data { + unsigned irq_pin; + + int (*hw_init)(void *spi); + int (*hw_release)(void *spi); +}; + +struct stmp3xxx_persistent_bit_config { + int reg; + int start; + int width; + const char *name; +}; + +struct stmp3xxx_platform_persistent_data { + const struct stmp3xxx_persistent_bit_config *bit_config_tab; + int bit_config_cnt; +}; + +#define STMP3XXX_USB_DONT_REMAP 0x00000001 +struct stmp3xxx_usb_platform_data { + unsigned flags; + int (*phy_enable)(struct platform_device *); + void (*hw_init)(void); + void (*hw_release)(void); +}; + void stmp3xxx_init_irq(struct irq_chip *chip); void stmp3xxx_init(void); int stmp3xxx_reset_block(void __iomem *hwreg, int just_enable); @@ -32,18 +66,29 @@ stmp3xxx_keyboard, stmp3xxx_gpmi, stmp3xxx_mmc, - stmp3xxx_udc, - stmp3xxx_ehci, + stmp3xxx_mmc2, stmp3xxx_rtc, stmp3xxx_spi1, stmp3xxx_spi2, stmp3xxx_backlight, stmp3xxx_rotdec, + stmp3xxx_ssp1, + stmp3xxx_ssp2, stmp3xxx_dcp, stmp3xxx_dcp_bootstream, stmp3xxx_persistent, stmp3xxx_framebuffer, - stmp3xxx_battery; + stmp3xxx_battery, + stmp378x_i2c, + stmp378x_pxp, + stmp378x_audio, + stmp3xxx_viim, + stmp3xxx_spdif; +#ifdef CONFIG_PM +suspend_state_t stmp37xx_pm_get_target(void); +int stmp37xx_pm_sleep_was_deep(void); +#endif + int stmp3xxx_ssp1_device_register(void); int stmp3xxx_ssp2_device_register(void); @@ -51,4 +96,6 @@ void stmp3xxx_release_pin_group(struct pin_group *pin_group, const char *label); int stmp3xxx_request_pin_group(struct pin_group *pin_group, const char *label); +int get_evk_board_version(void); + #endif /* __ASM_PLAT_STMP3XXX_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/fsl_usb_gadget.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/fsl_usb_gadget.h @@ -0,0 +1,40 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * USB Gadget side, platform-specific functionality. + */ + +#include + +/* Needed for i2c/serial transceivers */ +static inline void +fsl_platform_set_device_mode(struct fsl_usb2_platform_data *pdata) +{ +} + +static inline void +fsl_platform_pullup_enable(struct fsl_usb2_platform_data *pdata) +{ +} + +static inline void +fsl_platform_pullup_disable(struct fsl_usb2_platform_data *pdata) +{ +} + +static inline void +fsl_platform_set_test_mode(struct fsl_usb2_platform_data *pdata, + enum usb_test_mode mode) +{ +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/memory.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/memory.h @@ -14,9 +14,50 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H +#include +#include + /* * Physical DRAM offset. */ #define PHYS_OFFSET UL(0x40000000) +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_DMA_ZONE_SIZE +#define MXC_DMA_ZONE_SIZE ((CONFIG_DMA_ZONE_SIZE * SZ_1M) >> PAGE_SHIFT) +#else +#define MXC_DMA_ZONE_SIZE ((12 * SZ_1M) >> PAGE_SHIFT) +#endif + +static inline void __arch_adjust_zones(int node, unsigned long *zone_size, + unsigned long *zhole_size) +{ + if (node != 0) + return; + /* Create separate zone to reserve memory for DMA */ + zone_size[1] = zone_size[0] - MXC_DMA_ZONE_SIZE; + zone_size[0] = MXC_DMA_ZONE_SIZE; + zhole_size[1] = zhole_size[0]; + zhole_size[0] = 0; +} + +#define arch_adjust_zones(node, size, holes) \ + __arch_adjust_zones(node, size, holes) + +#endif +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#define ISA_DMA_THRESHOLD (0x0003ffffULL) + +#define CONSISTENT_DMA_SIZE SZ_32M + #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/dcp_bootstream_ioctl.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/dcp_bootstream_ioctl.h @@ -0,0 +1,32 @@ +/* + * Freescale STMP378X DCP driver for bootstream update. Only handles the OTP KEY + * case and can only encrypt/decrypt. + * + * Author: Pantelis Antoniou + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef DCP_BOOTSTREAM_IOCTL_H +#define DCP_BOOTSTREAM_IOCTL_H + +/* remember to have included the proper _IO definition + * file before hand. + * For user space it's + */ + +#define DBS_IOCTL_BASE 'd' + +#define DBS_ENC _IOW(DBS_IOCTL_BASE, 0x00, uint8_t[16]) +#define DBS_DEC _IOW(DBS_IOCTL_BASE, 0x01, uint8_t[16]) + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/pinmux.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/pinmux.h @@ -24,7 +24,6 @@ #include /* Pin definitions */ -#include "pins.h" #include /* @@ -94,6 +93,10 @@ /* Release pin */ void stmp3xxx_release_pin(unsigned id, const char *label); +int stmp3xxx_request_pin_group(struct pin_group *pin_group, const char *label); + +void stmp3xxx_release_pin_group(struct pin_group *pin_group, const char *label); + void stmp3xxx_set_pin_type(unsigned id, enum pin_fun fun); /* --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/lradc.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/lradc.h @@ -0,0 +1,61 @@ +/* + * Freescale STMP37XX/STMP378X LRADC helper interface + * + * Embedded Alley Solutions, Inc + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_PLAT_LRADC_H +#define __ASM_PLAT_LRADC_H + +int hw_lradc_use_channel(int); +int hw_lradc_unuse_channel(int); +extern u32 hw_lradc_vddio(void); +void hw_lradc_set_delay_trigger_kick(int trigger, int value); +void hw_lradc_configure_channel(int channel, int enable_div2, + int enable_acc, int samples); +int hw_lradc_present(int channel); +int hw_lradc_init_ladder(int channel, int trigger, unsigned sampling); +int hw_lradc_stop_ladder(int channel, int trigger); +void hw_lradc_set_delay_trigger(int trigger, u32 trigger_lradc, + u32 delay_triggers, u32 loops, u32 delays); +void hw_lradc_clear_delay_trigger(int trigger, u32 trigger_lradc, + u32 delay_triggers); + + +#define LRADC_CH0 0 +#define LRADC_CH1 1 +#define LRADC_CH2 2 +#define LRADC_CH3 3 +#define LRADC_CH4 4 +#define LRADC_CH5 5 +#define LRADC_CH6 6 +#define LRADC_CH7 7 +#define LRADC_TOUCH_X_PLUS LRADC_CH2 +#define LRADC_TOUCH_Y_PLUS LRADC_CH3 +#define LRADC_TOUCH_X_MINUS LRADC_CH4 +#define LRADC_TOUCH_Y_MINUS LRADC_CH5 +#define VDDIO_VOLTAGE_CH LRADC_CH6 +#define BATTERY_VOLTAGE_CH LRADC_CH7 + +#define LRADC_CLOCK_6MHZ 0 +#define LRADC_CLOCK_4MHZ 1 +#define LRADC_CLOCK_3MHZ 2 +#define LRADC_CLOCK_2MHZ 3 + +#define LRADC_DELAY_TRIGGER_BUTTON 0 +#define LRADC_DELAY_TRIGGER_BATTERY 1 +#define LRADC_DELAY_TRIGGER_TOUCHSCREEN 2 +#define LRADC_DELAY_TRIGGER_DIE 3 + +#endif /* __ASM_PLAT_LRADC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/fsl_usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/fsl_usb.h @@ -0,0 +1,60 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/* + * USB Host side, platform-specific functionality. + */ + +#include +#include + +/* ehci_arc_hc_driver.flags value */ +#define FSL_PLATFORM_HC_FLAGS (HCD_USB2 | HCD_MEMORY) + +static void fsl_setup_phy(struct ehci_hcd *ehci, + enum fsl_usb2_phy_modes phy_mode, + int port_offset); + +static inline void fsl_platform_usb_setup(struct ehci_hcd *ehci) +{ + struct fsl_usb2_platform_data *pdata; + + pdata = ehci_to_hcd(ehci)->self.controller->platform_data; + fsl_setup_phy(ehci, pdata->phy_mode, 0); +} + +static inline void fsl_platform_set_host_mode(struct usb_hcd *hcd) +{ + unsigned int temp; + struct fsl_usb2_platform_data *pdata; + + pdata = hcd->self.controller->platform_data; + + if (pdata->xcvr_ops && pdata->xcvr_ops->set_host) + pdata->xcvr_ops->set_host(); + + /* set host mode */ + temp = readl(hcd->regs + 0x1a8); + writel(temp | USBMODE_CM_HOST, hcd->regs + 0x1a8); +} + +/* Needed for i2c/serial transceivers */ +static inline void +fsl_platform_set_vbus_power(struct fsl_usb2_platform_data *pdata, int on) +{ +} + +/* Set USB AHB burst length for host */ +static inline void fsl_platform_set_ahb_burst(struct usb_hcd *hcd) +{ +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/plat-stmp3xxx/include/mach/gpmi.h +++ linux-fsl-imx51-2.6.31/arch/arm/plat-stmp3xxx/include/mach/gpmi.h @@ -1,12 +1,74 @@ #ifndef __MACH_GPMI_H +#include #include #include +#define GPMI_PART_CONCAT 0x8000 /* indicates that partitions + should be concatenated */ +extern int gpmi_pinmux_request(char *); +extern void gpmi_pinmux_free(char *); + +/** + * struct gpmi_platform_data - GPMI driver platform data. + * + * This structure communicates platform-specific information to the GPMI driver + * that can't be expressed as resources. + * + * @io_uA: The current limit, in uA. + * @min_prop_delay_in_ns: Minimum propagation delay of GPMI signals to and + * from the NAND Flash device, in nanoseconds. + * @max_prop_delay_in_ns: Maximum propagation delay of GPMI signals to and + * from the NAND Flash device, in nanoseconds. + * @pinmux_handler: A pointer to a function the driver will call to + * request or release the pins it needs. Pass true + * to request pins, and false to release them. + * @boot_area_size_in_bytes: The amount of space reserved for use by the boot + * ROM on the first and second chips. If this value is + * zero, it indicates we're not reserving any space + * for the boot area. + * @partition_source_types: An array of strings that name sources of + * partitioning information (e.g., the boot loader, + * the kernel command line, etc.). The function + * parse_mtd_partitions() recognizes these names and + * applies the appropriate "plugins" to discover + * partitioning information. If any is found, it will + * be applied to the "general use" MTD (it will NOT + * override the boot area protection mechanism). + * @partitions: An optional pointer to an array of partition + * descriptions. If the driver finds no partitioning + * information elsewhere, it will apply these to the + * "general use" MTD (they do NOT override the boot + * area protection mechanism). + * @partition_count: The number of elements in the partitions array. + * + * ----- Stay away from the "Unique ID" -- it will be going away soon. ----- + * + * @uid_offset: The offset into the physical medium of the + * "Unique ID" area. + * @uid_size: The size of the "Unique ID" area. + */ + struct gpmi_platform_data { - void *pins; - int nr_parts; - struct mtd_partition *parts; - const char *part_types[]; + + int io_uA; + + unsigned min_prop_delay_in_ns; + unsigned max_prop_delay_in_ns; + + int (*pinmux_handler)(bool request); + + uint32_t boot_area_size_in_bytes; + + const char **partition_source_types; + + struct mtd_partition *partitions; + unsigned partition_count; + + /* Stay away from the Unique ID - it will be going away soon. */ + + u_int32_t uid_offset; + u_int32_t uid_size; + }; #endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/cache-v7.S +++ linux-fsl-imx51-2.6.31/arch/arm/mm/cache-v7.S @@ -13,6 +13,7 @@ #include #include #include +#include #include "proc-macros.S" @@ -147,13 +148,16 @@ * - the Icache does not read data from the write buffer */ ENTRY(v7_coherent_user_range) + UNWIND(.fnstart ) dcache_line_size r2, r3 sub r3, r2, #1 bic r0, r0, r3 -1: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification +1: + USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification dsb - mcr p15, 0, r0, c7, c5, 1 @ invalidate I line + USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line add r0, r0, r2 +2: cmp r0, r1 blo 1b mov r0, #0 @@ -161,6 +165,17 @@ dsb isb mov pc, lr + +/* + * Fault handling for the cache operation above. If the virtual address in r0 + * isn't mapped, just try the next page. + */ +9001: + mov r0, r0, lsr #12 + mov r0, r0, lsl #12 + add r0, r0, #4096 + b 2b + UNWIND(.fnend ) ENDPROC(v7_coherent_kern_range) ENDPROC(v7_coherent_user_range) --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/highmem.c +++ linux-fsl-imx51-2.6.31/arch/arm/mm/highmem.c @@ -40,11 +40,16 @@ { unsigned int idx; unsigned long vaddr; + void *kmap; pagefault_disable(); if (!PageHighMem(page)) return page_address(page); + kmap = kmap_high_get(page); + if (kmap) + return kmap; + idx = type + KM_TYPE_NR * smp_processor_id(); vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); #ifdef CONFIG_DEBUG_HIGHMEM @@ -80,6 +85,9 @@ #else (void) idx; /* to kill a warning */ #endif + } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { + /* this address was obtained through kmap_high_get() */ + kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); } pagefault_enable(); } --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/mmu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mm/mmu.c @@ -936,7 +936,12 @@ * location (0xffff0000). If we aren't using high-vectors, also * create a mapping at the low-vectors virtual address. */ +#ifdef CONFIG_VECTORS_PHY_ADDR + /* use OCRAM as vector for CQ116049 */ + map.pfn = CONFIG_VECTORS_PHY_ADDR ; +#else map.pfn = __phys_to_pfn(virt_to_phys(vectors)); +#endif map.virtual = 0xffff0000; map.length = PAGE_SIZE; map.type = MT_HIGH_VECTORS; @@ -1030,4 +1035,6 @@ pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); flush_pmd_entry(pmd); } + + local_flush_tlb_all(); } --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/proc-macros.S +++ linux-fsl-imx51-2.6.31/arch/arm/mm/proc-macros.S @@ -119,8 +119,8 @@ .long 0x00 @ unused .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED - .long 0x00 @ unused - .long 0x00 @ unused + .long PTE_EXT_TEX(4) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_OUTER_UNCACHED + .long PTE_EXT_TEX(6) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_OUTER_WRITETHRU .long 0x00 @ unused .endm --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/cache-v6.S +++ linux-fsl-imx51-2.6.31/arch/arm/mm/cache-v6.S @@ -12,6 +12,7 @@ #include #include #include +#include #include "proc-macros.S" @@ -121,11 +122,13 @@ * - the Icache does not read data from the write buffer */ ENTRY(v6_coherent_user_range) - + UNWIND(.fnstart ) #ifdef HARVARD_CACHE bic r0, r0, #CACHE_LINE_SIZE - 1 -1: mcr p15, 0, r0, c7, c10, 1 @ clean D line +1: + USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line add r0, r0, #CACHE_LINE_SIZE +2: cmp r0, r1 blo 1b #endif @@ -143,6 +146,19 @@ mov pc, lr /* + * Fault handling for the cache operation above. If the virtual address in r0 + * isn't mapped, just try the next page. + */ +9001: + mov r0, r0, lsr #12 + mov r0, r0, lsl #12 + add r0, r0, #4096 + b 2b + UNWIND(.fnend ) +ENDPROC(v6_coherent_user_range) +ENDPROC(v6_coherent_kern_range) + +/* * v6_flush_kern_dcache_page(kaddr) * * Ensure that the data held in the page kaddr is written back --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/cache-l2x0.c +++ linux-fsl-imx51-2.6.31/arch/arm/mm/cache-l2x0.c @@ -17,6 +17,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include +#include #include #include @@ -24,8 +25,15 @@ #include #define CACHE_LINE_SIZE 32 +#ifdef CONFIG_OPROFILE_ARM11_EVTMON +#define L2_ENABLE_BIT 0x1 +#define L2_EVTBUS_BIT 0x100000 +#define L2_CTL_REG (l2x0_base + L2X0_CTRL) +#define L2_AUX_REG (l2x0_base + L2X0_AUX_CTRL) +#endif static void __iomem *l2x0_base; +static unsigned long l2x0_aux; static DEFINE_SPINLOCK(l2x0_lock); static inline void sync_writel(unsigned long val, unsigned long reg, @@ -53,6 +61,13 @@ cache_sync(); } +static void l2x0_flush_all(void) +{ + /* clean and invalidate all ways */ + sync_writel(0xff, L2X0_CLEAN_INV_WAY, 0xff); + cache_sync(); +} + static void l2x0_inv_range(unsigned long start, unsigned long end) { unsigned long addr; @@ -93,6 +108,49 @@ cache_sync(); } +#ifdef CONFIG_OPROFILE_ARM11_EVTMON +/*! + * Enable the EVTBUS to monitor L2 cache events + */ +void l2x0_evtbus_enable(void) +{ + unsigned int flags; + + local_irq_save(flags); + /* If L2 cache is enabled then disable L2 cache, enable L2 evtbus, + re-enable L2 cache */ + if ((readl(L2_CTL_REG) & L2_ENABLE_BIT) != 0) { + writel(0, L2_CTL_REG); + writel((readl(L2_AUX_REG)| L2_EVTBUS_BIT), L2_AUX_REG); + writel(L2_ENABLE_BIT, L2_CTL_REG); + } else { + writel((readl(L2_AUX_REG)| L2_EVTBUS_BIT), L2_AUX_REG); + } + local_irq_restore(flags); +} + +/*! + * Disable the EVTBUS + */ +void l2x0_evtbus_disable(void) +{ + unsigned int flags; + + local_irq_save(flags); + /* If L2 cache is enabled then disable L2 cache, disable L2 evtbus, + re-enable L2 cache */ + if ((readl(L2_CTL_REG) & L2_ENABLE_BIT) != 0) { + writel(0, L2_CTL_REG); + writel((readl(L2_AUX_REG)& ~L2_EVTBUS_BIT), L2_AUX_REG); + writel(L2_ENABLE_BIT, L2_CTL_REG); + } else { + writel((readl(L2_AUX_REG)& ~L2_EVTBUS_BIT), L2_AUX_REG); + } + local_irq_restore(flags); +} +EXPORT_SYMBOL(l2x0_evtbus_enable); +EXPORT_SYMBOL(l2x0_evtbus_disable); +#endif void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) { __u32 aux; @@ -105,6 +163,7 @@ aux = readl(l2x0_base + L2X0_AUX_CTRL); aux &= aux_mask; aux |= aux_val; + l2x0_aux = aux; writel(aux, l2x0_base + L2X0_AUX_CTRL); l2x0_inv_all(); @@ -115,6 +174,28 @@ outer_cache.inv_range = l2x0_inv_range; outer_cache.clean_range = l2x0_clean_range; outer_cache.flush_range = l2x0_flush_range; + outer_cache.flush_all = l2x0_flush_all; printk(KERN_INFO "L2X0 cache controller enabled\n"); } +EXPORT_SYMBOL(outer_cache); + +void l2x0_disable(void) +{ + if (readl(l2x0_base + L2X0_CTRL) + && !(readl(l2x0_base + L2X0_DEBUG_CTRL) & 0x2)) { + l2x0_flush_all(); + writel(0, l2x0_base + L2X0_CTRL); + l2x0_flush_all(); + } +} + +void l2x0_enable(void) +{ + if (!readl(l2x0_base + L2X0_CTRL)) { + writel(l2x0_aux, l2x0_base + L2X0_AUX_CTRL); + l2x0_inv_all(); + /* enable L2X0 */ + writel(1, l2x0_base + L2X0_CTRL); + } +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/proc-v6.S +++ linux-fsl-imx51-2.6.31/arch/arm/mm/proc-v6.S @@ -57,8 +57,6 @@ * to what would be the reset vector. * * - loc - location to jump to for soft reset - * - * It is assumed that: */ .align 5 ENTRY(cpu_v6_reset) @@ -176,6 +174,22 @@ mrc p15, 0, r0, c1, c0, 0 @ read control register bic r0, r0, r5 @ clear bits them orr r0, r0, r6 @ set them +#ifdef CONFIG_ARM_ERRATA_364296 + /* Workaround for the 364296 ARM1136 r0pX errata (possible cache data + * corruption with hit-under-miss enabled). The conditional code below + * (setting the undocumented bit 31 in the auxiliary control register + * and the FI bit in the control register) disables hit-under-miss + * without putting the processor into full low interrupt latency mode. + */ + ldr r6, =0x4107b360 @ id for ARM1136 r0pX + mrc p15, 0, r5, c0, c0, 0 @ get processor id + bic r5, r5, #0xf @ mask out part bits [3:0] + teq r5, r6 @ check for the faulty core + mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg + orreq r5, r5, #(1 << 31) @ set the undocumented bit 31 + mcreq p15, 0, r5, c1, c0, 1 @ write aux control reg + orreq r0, r0, #(1 << 21) @ low interrupt latency configuration +#endif mov pc, lr @ return to head.S:__ret /* --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/proc-v7.S +++ linux-fsl-imx51-2.6.31/arch/arm/mm/proc-v7.S @@ -43,7 +43,17 @@ ENDPROC(cpu_v7_proc_init) ENTRY(cpu_v7_proc_fin) - mov pc, lr + stmfd sp!, {lr} + cpsid if @ disable interrupts + bl v7_flush_kern_cache_all + mrc p15, 0, r0, c1, c0, 0 @ ctrl register + bic r0, r0, #0x1000 @ ...i............ + bic r0, r0, #0x0006 @ .............ca. + mcr p15, 0, r0, c1, c0, 0 @ disable caches + mrc p15, 0, r0, c1, c0, 1 @ auxiliary ctrl register + bic r0, r0, #0x2 @ ..............l2en. + mcr p15, 0, r0, c1, c0, 1 @ disable L2 cache + ldmfd sp!, {pc} ENDPROC(cpu_v7_proc_fin) /* @@ -54,8 +64,6 @@ * to what would be the reset vector. * * - loc - location to jump to for soft reset - * - * It is assumed that: */ .align 5 ENTRY(cpu_v7_reset) --- linux-fsl-imx51-2.6.31.orig/arch/arm/mm/mmap.c +++ linux-fsl-imx51-2.6.31/arch/arm/mm/mmap.c @@ -7,13 +7,52 @@ #include #include #include -#include -#include +#include +#include + +static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr, + unsigned long pgoff) +{ + unsigned long base = addr & ~(SHMLBA-1); + unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1); + + if (base + off <= addr) + return base + off; + + return base - off; +} #define COLOUR_ALIGN(addr,pgoff) \ ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ (((pgoff)<personality & ADDR_COMPAT_LAYOUT) + return 1; + + if (rlimit(RLIMIT_STACK) == RLIM_INFINITY) + return 1; + + return sysctl_legacy_va_layout; +} + +static unsigned long mmap_base(unsigned long rnd) +{ + unsigned long gap = rlimit(RLIMIT_STACK); + + if (gap < MIN_GAP) + gap = MIN_GAP; + else if (gap > MAX_GAP) + gap = MAX_GAP; + + return PAGE_ALIGN(TASK_SIZE - gap - rnd); +} + /* * We need to ensure that shared mappings are correctly aligned to * avoid aliasing issues with VIPT caches. We need to ensure that @@ -30,31 +69,22 @@ struct mm_struct *mm = current->mm; struct vm_area_struct *vma; unsigned long start_addr; -#ifdef CONFIG_CPU_V6 - unsigned int cache_type; - int do_align = 0, aliasing = 0; + int do_align = 0; + int aliasing = cache_is_vipt_aliasing(); /* * We only need to do colour alignment if either the I or D - * caches alias. This is indicated by bits 9 and 21 of the - * cache type register. + * caches alias. */ - cache_type = read_cpuid_cachetype(); - if (cache_type != read_cpuid_id()) { - aliasing = (cache_type | cache_type >> 12) & (1 << 11); - if (aliasing) - do_align = filp || flags & MAP_SHARED; - } -#else -#define do_align 0 -#define aliasing 0 -#endif + if (aliasing) + do_align = filp || (flags & MAP_SHARED); /* * We enforce the MAP_FIXED case. */ if (flags & MAP_FIXED) { - if (aliasing && flags & MAP_SHARED && addr & (SHMLBA - 1)) + if (aliasing && flags & MAP_SHARED && + (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) return -EINVAL; return addr; } @@ -76,7 +106,7 @@ if (len > mm->cached_hole_size) { start_addr = addr = mm->free_area_cache; } else { - start_addr = addr = TASK_UNMAPPED_BASE; + start_addr = addr = mm->mmap_base; mm->cached_hole_size = 0; } @@ -115,6 +145,128 @@ } } +unsigned long +arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, + const unsigned long len, const unsigned long pgoff, + const unsigned long flags) +{ + struct vm_area_struct *vma; + struct mm_struct *mm = current->mm; + unsigned long addr = addr0; + int do_align = 0; + int aliasing = cache_is_vipt_aliasing(); + + /* + * We only need to do colour alignment if either the I or D + * caches alias. + */ + if (aliasing) + do_align = filp || (flags & MAP_SHARED); + + /* requested length too big for entire address space */ + if (len > TASK_SIZE) + return -ENOMEM; + + if (flags & MAP_FIXED) { + if (aliasing && flags & MAP_SHARED && + (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) + return -EINVAL; + return addr; + } + + /* requesting a specific address */ + if (addr) { + if (do_align) + addr = COLOUR_ALIGN(addr, pgoff); + else + addr = PAGE_ALIGN(addr); + vma = find_vma(mm, addr); + if (TASK_SIZE - len >= addr && + (!vma || addr + len <= vma->vm_start)) + return addr; + } + + /* check if free_area_cache is useful for us */ + if (len <= mm->cached_hole_size) { + mm->cached_hole_size = 0; + mm->free_area_cache = mm->mmap_base; + } + + /* either no address requested or can't fit in requested address hole */ + addr = mm->free_area_cache; + if (do_align) { + unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff); + addr = base + len; + } + + /* make sure it can fit in the remaining address space */ + if (addr > len) { + vma = find_vma(mm, addr-len); + if (!vma || addr <= vma->vm_start) + /* remember the address as a hint for next time */ + return (mm->free_area_cache = addr-len); + } + + if (mm->mmap_base < len) + goto bottomup; + + addr = mm->mmap_base - len; + if (do_align) + addr = COLOUR_ALIGN_DOWN(addr, pgoff); + + do { + /* + * Lookup failure means no vma is above this address, + * else if new region fits below vma->vm_start, + * return with success: + */ + vma = find_vma(mm, addr); + if (!vma || addr+len <= vma->vm_start) + /* remember the address as a hint for next time */ + return (mm->free_area_cache = addr); + + /* remember the largest hole we saw so far */ + if (addr + mm->cached_hole_size < vma->vm_start) + mm->cached_hole_size = vma->vm_start - addr; + + /* try just below the current vma->vm_start */ + addr = vma->vm_start - len; + if (do_align) + addr = COLOUR_ALIGN_DOWN(addr, pgoff); + } while (len < vma->vm_start); + +bottomup: + /* + * A failed mmap() very likely causes application failure, + * so fall back to the bottom-up function here. This scenario + * can happen with large stack limits and large mmap() + * allocations. + */ + mm->cached_hole_size = ~0UL; + mm->free_area_cache = TASK_UNMAPPED_BASE; + addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); + /* + * Restore the topdown base: + */ + mm->free_area_cache = mm->mmap_base; + mm->cached_hole_size = ~0UL; + + return addr; +} + +void arch_pick_mmap_layout(struct mm_struct *mm) +{ + + if (mmap_is_legacy()) { + mm->mmap_base = TASK_UNMAPPED_BASE; + mm->get_unmapped_area = arch_get_unmapped_area; + mm->unmap_area = arch_unmap_area; + } else { + mm->mmap_base = mmap_base(0UL); + mm->get_unmapped_area = arch_get_unmapped_area_topdown; + mm->unmap_area = arch_unmap_area_topdown; + } +} /* * You really shouldn't be using read() or write() on /dev/mem. This --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/debug.S +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/debug.S @@ -49,6 +49,26 @@ 1002: .endm +#elif defined(CONFIG_CPU_V7) + + .macro addruart, rx + .endm + + .macro senduart, rd, rx + mcr p14, 0, \rd, c0, c5, 0 + .endm + + .macro busyuart, rd, rx +busy: mrc p14, 0, pc, c0, c1, 0 + bcs busy + .endm + + .macro waituart, rd, rx +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + + .endm + #elif defined(CONFIG_CPU_XSCALE) .macro addruart, rx --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/sys_arm.c +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/sys_arm.c @@ -29,41 +29,6 @@ #include #include -extern unsigned long do_mremap(unsigned long addr, unsigned long old_len, - unsigned long new_len, unsigned long flags, - unsigned long new_addr); - -/* common code for old and new mmaps */ -inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EINVAL; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - if (flags & MAP_FIXED && addr < FIRST_USER_ADDRESS) - goto out; - - error = -EBADF; - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - struct mmap_arg_struct { unsigned long addr; unsigned long len; @@ -85,29 +50,11 @@ if (a.offset & ~PAGE_MASK) goto out; - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); out: return error; } -asmlinkage unsigned long -sys_arm_mremap(unsigned long addr, unsigned long old_len, - unsigned long new_len, unsigned long flags, - unsigned long new_addr) -{ - unsigned long ret = -EINVAL; - - if (flags & MREMAP_FIXED && new_addr < FIRST_USER_ADDRESS) - goto out; - - down_write(¤t->mm->mmap_sem); - ret = do_mremap(addr, old_len, new_len, flags, new_addr); - up_write(¤t->mm->mmap_sem); - -out: - return ret; -} - /* * Perform the select(nd, in, out, ex, tv) and mmap() system * calls. --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/calls.S +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/calls.S @@ -81,7 +81,7 @@ CALL(sys_ni_syscall) /* was sys_ssetmask */ /* 70 */ CALL(sys_setreuid16) CALL(sys_setregid16) - CALL(sys_sigsuspend_wrapper) + CALL(sys_sigsuspend) CALL(sys_sigpending) CALL(sys_sethostname) /* 75 */ CALL(sys_setrlimit) @@ -172,7 +172,7 @@ /* 160 */ CALL(sys_sched_get_priority_min) CALL(sys_sched_rr_get_interval) CALL(sys_nanosleep) - CALL(sys_arm_mremap) + CALL(sys_mremap) CALL(sys_setresuid16) /* 165 */ CALL(sys_getresuid16) CALL(sys_ni_syscall) /* vm86 */ @@ -188,7 +188,7 @@ CALL(sys_rt_sigpending) CALL(sys_rt_sigtimedwait) CALL(sys_rt_sigqueueinfo) - CALL(sys_rt_sigsuspend_wrapper) + CALL(sys_rt_sigsuspend) /* 180 */ CALL(ABI(sys_pread64, sys_oabi_pread64)) CALL(ABI(sys_pwrite64, sys_oabi_pwrite64)) CALL(sys_chown16) @@ -344,8 +344,8 @@ CALL(sys_readlinkat) CALL(sys_fchmodat) CALL(sys_faccessat) -/* 335 */ CALL(sys_ni_syscall) /* eventually pselect6 */ - CALL(sys_ni_syscall) /* eventually ppoll */ +/* 335 */ CALL(sys_pselect6) + CALL(sys_ppoll) CALL(sys_unshare) CALL(sys_set_robust_list) CALL(sys_get_robust_list) @@ -355,7 +355,7 @@ CALL(sys_vmsplice) CALL(sys_move_pages) /* 345 */ CALL(sys_getcpu) - CALL(sys_ni_syscall) /* eventually epoll_pwait */ + CALL(sys_epoll_pwait) CALL(sys_kexec_load) CALL(sys_utimensat) CALL(sys_signalfd) --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/entry-common.S +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/entry-common.S @@ -373,16 +373,6 @@ b sys_clone ENDPROC(sys_clone_wrapper) -sys_sigsuspend_wrapper: - add r3, sp, #S_OFF - b sys_sigsuspend -ENDPROC(sys_sigsuspend_wrapper) - -sys_rt_sigsuspend_wrapper: - add r2, sp, #S_OFF - b sys_rt_sigsuspend -ENDPROC(sys_rt_sigsuspend_wrapper) - sys_sigreturn_wrapper: add r0, sp, #S_OFF b sys_sigreturn @@ -419,12 +409,12 @@ tst r5, #PGOFF_MASK moveq r5, r5, lsr #PAGE_SHIFT - 12 streq r5, [sp, #4] - beq do_mmap2 + beq sys_mmap_pgoff mov r0, #-EINVAL mov pc, lr #else str r5, [sp, #4] - b do_mmap2 + b sys_mmap_pgoff #endif ENDPROC(sys_mmap2) --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/signal.c +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/signal.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "ptrace.h" #include "signal.h" @@ -47,57 +48,22 @@ MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, }; -static int do_signal(sigset_t *oldset, struct pt_regs * regs, int syscall); - /* * atomically swap in the new signal mask, and wait for a signal. */ -asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask, struct pt_regs *regs) +asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) { - sigset_t saveset; - mask &= _BLOCKABLE; spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; + current->saved_sigmask = current->blocked; siginitset(¤t->blocked, mask); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - regs->ARM_r0 = -EINTR; - - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(&saveset, regs, 0)) - return regs->ARM_r0; - } -} - -asmlinkage int -sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, struct pt_regs *regs) -{ - sigset_t saveset, newset; - - /* XXX: Don't preclude handling different sized sigset_t's. */ - if (sigsetsize != sizeof(sigset_t)) - return -EINVAL; - - if (copy_from_user(&newset, unewset, sizeof(newset))) - return -EFAULT; - sigdelsetmask(&newset, ~_BLOCKABLE); - - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - current->blocked = newset; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - regs->ARM_r0 = -EINTR; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(&saveset, regs, 0)) - return regs->ARM_r0; - } + current->state = TASK_INTERRUPTIBLE; + schedule(); + set_restore_sigmask(); + return -ERESTARTNOHAND; } asmlinkage int @@ -196,6 +162,88 @@ #endif +#ifdef CONFIG_VFP + +static int preserve_vfp_context(struct vfp_sigframe __user *frame) +{ + struct thread_info *thread = current_thread_info(); + struct vfp_hard_struct *h = &thread->vfpstate.hard; + const unsigned long magic = VFP_MAGIC; + const unsigned long size = VFP_STORAGE_SIZE; + int err = 0; + + vfp_sync_state(thread); + __put_user_error(magic, &frame->magic, err); + __put_user_error(size, &frame->size, err); + + /* + * Copy the floating point registers. There can be unused + * registers see asm/hwcap.h for details. + */ + err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs, + sizeof(h->fpregs)); + /* + * Copy the status and control register. + */ + __put_user_error(h->fpscr, &frame->ufp.fpscr, err); + + /* + * Copy the exception registers. + */ + __put_user_error(h->fpexc, &frame->ufp.fpexc, err); + __put_user_error(h->fpinst, &frame->ufp.fpinst, err); + __put_user_error(h->fpinst2, &frame->ufp.fpinst2, err); + + return err ? -EFAULT : 0; +} + +static int restore_vfp_context(struct vfp_sigframe __user *frame) +{ + struct thread_info *thread = current_thread_info(); + struct vfp_hard_struct *h = &thread->vfpstate.hard; + unsigned long magic; + unsigned long size; + unsigned long fpexc; + int err = 0; + + vfp_sync_state(thread); + __get_user_error(magic, &frame->magic, err); + __get_user_error(size, &frame->size, err); + + if (err) + return -EFAULT; + if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) + return -EINVAL; + + /* + * Copy the floating point registers. There can be unused + * registers see asm/hwcap.h for details. + */ + err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs, + sizeof(h->fpregs)); + /* + * Copy the status and control register. + */ + __get_user_error(h->fpscr, &frame->ufp.fpscr, err); + + /* + * Sanitise and restore the exception registers. + */ + __get_user_error(fpexc, &frame->ufp.fpexc, err); + /* Ensure the VFP is enabled. */ + fpexc |= FPEXC_EN; + /* Ensure FPINST2 is invalid and the exception flag is cleared. */ + fpexc &= ~(FPEXC_EX | FPEXC_FP2V); + h->fpexc = fpexc; + + __get_user_error(h->fpinst, &frame->ufp.fpinst, err); + __get_user_error(h->fpinst2, &frame->ufp.fpinst2, err); + + return err ? -EFAULT : 0; +} + +#endif + /* * Do a signal return; undo the signal stack. These are aligned to 64-bit. */ @@ -254,8 +302,8 @@ err |= restore_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP -// if (err == 0) -// err |= vfp_restore_state(&sf->aux.vfp); + if (err == 0) + err |= restore_vfp_context(&aux->vfp); #endif return err; @@ -369,8 +417,8 @@ err |= preserve_iwmmxt_context(&aux->iwmmxt); #endif #ifdef CONFIG_VFP -// if (err == 0) -// err |= vfp_save_state(&sf->aux.vfp); + if (err == 0) + err |= preserve_vfp_context(&aux->vfp); #endif __put_user_error(0, &aux->end_magic, err); @@ -545,7 +593,7 @@ /* * OK, we're invoking a handler */ -static void +static int handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs * regs, int syscall) @@ -596,7 +644,7 @@ if (ret != 0) { force_sigsegv(sig, tsk); - return; + return ret; } /* @@ -610,6 +658,7 @@ recalc_sigpending(); spin_unlock_irq(&tsk->sighand->siglock); + return 0; } /* @@ -621,7 +670,7 @@ * the kernel can handle, and then we build all the user-level signal handling * stack-frames in one go after that. */ -static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall) +static void do_signal(struct pt_regs *regs, int syscall) { struct k_sigaction ka; siginfo_t info; @@ -634,7 +683,7 @@ * if so. */ if (!user_mode(regs)) - return 0; + return; if (try_to_freeze()) goto no_signal; @@ -643,9 +692,24 @@ signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { - handle_signal(signr, &ka, &info, oldset, regs, syscall); + sigset_t *oldset; + + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + oldset = ¤t->saved_sigmask; + else + oldset = ¤t->blocked; + if (handle_signal(signr, &ka, &info, oldset, regs, syscall) == 0) { + /* + * A signal was successfully delivered; the saved + * sigmask will have been stored in the signal frame, + * and will be restored by sigreturn, so we can simply + * clear the TIF_RESTORE_SIGMASK flag. + */ + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + clear_thread_flag(TIF_RESTORE_SIGMASK); + } single_step_set(current); - return 1; + return; } no_signal: @@ -697,14 +761,21 @@ regs->ARM_r0 == -ERESTARTNOINTR) { setup_syscall_restart(regs); } + + /* If there's no signal to deliver, we just put the saved sigmask + * back. + */ + if (test_thread_flag(TIF_RESTORE_SIGMASK)) { + clear_thread_flag(TIF_RESTORE_SIGMASK); + sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); + } } single_step_set(current); - return 0; } asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int thread_flags, int syscall) { if (thread_flags & _TIF_SIGPENDING) - do_signal(¤t->blocked, regs, syscall); + do_signal(regs, syscall); } --- linux-fsl-imx51-2.6.31.orig/arch/arm/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/kernel/Makefile @@ -2,7 +2,8 @@ # Makefile for the linux kernel. # -AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) +CPPFLAGS_vmlinux.lds := -DTEXT_OFFSET=$(TEXT_OFFSET) +AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) ifdef CONFIG_DYNAMIC_FTRACE CFLAGS_REMOVE_ftrace.o = -pg --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/usb_h1.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/usb_h1.c @@ -0,0 +1,54 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static struct fsl_usb2_platform_data usbh1_config = { + .name = "Host 1", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_SERIAL, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbh1_active, + .gpio_usb_inactive = gpio_usbh1_inactive, + .transceiver = "serial", +}; + +static struct resource usbh1_resources[] = { + [0] = { + .start = (u32) (USB_H1REGS_BASE), + .end = (u32) (USB_H1REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB1, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init usbh1_init(void) +{ + pr_debug("%s: \n", __func__); + + host_pdev_register(usbh1_resources, ARRAY_SIZE(usbh1_resources), + &usbh1_config); + return 0; +} +module_init(usbh1_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/devices.c @@ -1,434 +1,901 @@ /* - * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Sascha Hauer, kernel@pengutronix.de + * Author: MontaVista Software, Inc. + * * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Based on the OMAP devices.c * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. + * 2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ - -#include #include +#include +#include +#include #include -#include -#include +#include +#include + +#include + +#include #include -#include -#include -#include -#include +#include +#include +#include +#include +#include + +#include "iomux.h" +#include "crm_regs.h" +#include "sdma_script_code.h" +#include "sdma_script_code_pass2.h" + +extern struct dptc_wp dptc_wp_allfreq_26ckih[DPTC_WP_SUPPORTED]; +extern struct dptc_wp dptc_wp_allfreq_26ckih_TO_2_0[DPTC_WP_SUPPORTED]; +extern struct dptc_wp dptc_wp_allfreq_27ckih_TO_2_0[DPTC_WP_SUPPORTED]; +/* + * Clock structures + */ +static struct clk *ckih_clk; + +void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_addr) +{ + if (cpu_is_mx31_rev(CHIP_REV_1_0) == 1) { + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_start_addr = + (unsigned short *)sdma_code; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = + uartsh_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; + sdma_script_addr->mxc_sdma_ram_code_start_addr = + RAM_CODE_START_ADDR; + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = dptc_dvfs_ADDR; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = firi_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = mshc_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_app_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_per_2_shp_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = mcu_2_firi_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = mcu_2_mshc_ADDR; + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_per_addr = -1; + sdma_script_addr->mxc_sdma_uart_2_per_addr = -1; + sdma_script_addr->mxc_sdma_app_2_per_addr = -1; + } else { + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR_2; + sdma_script_addr->mxc_sdma_ap_2_ap_fixed_addr = + ap_2_ap_fixed_addr_ADDR_2; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = ap_2_bp_ADDR_2; + sdma_script_addr->mxc_sdma_ap_2_ap_fixed_addr = + ap_2_ap_fixed_addr_ADDR_2; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = bp_2_ap_ADDR_2; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR_2; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR_2; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_start_addr = + (unsigned short *)sdma_code_2; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = + uartsh_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE_2; + sdma_script_addr->mxc_sdma_ram_code_start_addr = + RAM_CODE_START_ADDR_2; + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = firi_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = mshc_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_per_2_app_addr = per_2_app_ADDR_2; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_per_2_shp_addr = per_2_shp_ADDR_2; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR_2; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = mcu_2_firi_ADDR_2; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = mcu_2_mshc_ADDR_2; + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR_2; + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_per_addr = shp_2_per_ADDR_2; + sdma_script_addr->mxc_sdma_uart_2_per_addr = -1; + sdma_script_addr->mxc_sdma_app_2_per_addr = app_2_per_ADDR_2; + } +} -#include "devices.h" +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} -static struct resource uart0[] = { - { - .start = UART1_BASE_ADDR, - .end = UART1_BASE_ADDR + 0x0B5, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_UART1, - .end = MXC_INT_UART1, - .flags = IORESOURCE_IRQ, - }, +#if defined(CONFIG_W1_MASTER_MXC) || defined(CONFIG_W1_MASTER_MXC_MODULE) +static struct mxc_w1_config mxc_w1_data = { + .search_rom_accelerator = 0, }; -struct platform_device mxc_uart_device0 = { - .name = "imx-uart", - .id = 0, - .resource = uart0, - .num_resources = ARRAY_SIZE(uart0), +static struct platform_device mxc_w1_devices = { + .name = "mxc_w1", + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_w1_data, + }, + .id = 0 }; -static struct resource uart1[] = { +static void mxc_init_owire(void) +{ + (void)platform_device_register(&mxc_w1_devices); +} +#else +static inline void mxc_init_owire(void) +{ +} +#endif + +#if defined(CONFIG_RTC_MXC) || defined(CONFIG_RTC_MXC_MODULE) +static struct resource rtc_resources[] = { { - .start = UART2_BASE_ADDR, - .end = UART2_BASE_ADDR + 0x0B5, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_UART2, - .end = MXC_INT_UART2, - .flags = IORESOURCE_IRQ, - }, + .start = RTC_BASE_ADDR, + .end = RTC_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_RTC, + .flags = IORESOURCE_IRQ, + }, }; - -struct platform_device mxc_uart_device1 = { - .name = "imx-uart", - .id = 1, - .resource = uart1, - .num_resources = ARRAY_SIZE(uart1), +static struct platform_device mxc_rtc_device = { + .name = "mxc_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, }; +static void mxc_init_rtc(void) +{ + (void)platform_device_register(&mxc_rtc_device); +} +#else +static inline void mxc_init_rtc(void) +{ +} +#endif -static struct resource uart2[] = { +#if defined(CONFIG_MXC_WATCHDOG) || defined(CONFIG_MXC_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { { - .start = UART3_BASE_ADDR, - .end = UART3_BASE_ADDR + 0x0B5, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_UART3, - .end = MXC_INT_UART3, - .flags = IORESOURCE_IRQ, - }, + .start = WDOG1_BASE_ADDR, + .end = WDOG1_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, }; -struct platform_device mxc_uart_device2 = { - .name = "imx-uart", - .id = 2, - .resource = uart2, - .num_resources = ARRAY_SIZE(uart2), +static struct platform_device mxc_wdt_device = { + .name = "mxc_wdt", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, }; -#ifdef CONFIG_ARCH_MX31 -static struct resource uart3[] = { - { - .start = UART4_BASE_ADDR, - .end = UART4_BASE_ADDR + 0x0B5, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_UART4, - .end = MXC_INT_UART4, - .flags = IORESOURCE_IRQ, - }, -}; +static void mxc_init_wdt(void) +{ + (void)platform_device_register(&mxc_wdt_device); +} +#else +static inline void mxc_init_wdt(void) +{ +} +#endif -struct platform_device mxc_uart_device3 = { - .name = "imx-uart", - .id = 3, - .resource = uart3, - .num_resources = ARRAY_SIZE(uart3), +#if defined(CONFIG_MXC_IPU) || defined(CONFIG_MXC_IPU_MODULE) +static struct mxc_ipu_config mxc_ipu_data = { + .rev = 1, }; -static struct resource uart4[] = { +static struct resource ipu_resources[] = { + { + .start = IPU_CTRL_BASE_ADDR, + .end = IPU_CTRL_BASE_ADDR + SZ_4K, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_IPU_SYN, + .flags = IORESOURCE_IRQ, + }, { - .start = UART5_BASE_ADDR, - .end = UART5_BASE_ADDR + 0x0B5, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_UART5, - .end = MXC_INT_UART5, - .flags = IORESOURCE_IRQ, - }, + .start = MXC_INT_IPU_ERR, + .flags = IORESOURCE_IRQ, + }, }; -struct platform_device mxc_uart_device4 = { - .name = "imx-uart", - .id = 4, - .resource = uart4, - .num_resources = ARRAY_SIZE(uart4), +static struct platform_device mxc_ipu_device = { + .name = "mxc_ipu", + .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ipu_data, + }, + .num_resources = ARRAY_SIZE(ipu_resources), + .resource = ipu_resources, }; -#endif /* CONFIG_ARCH_MX31 */ -/* GPIO port description */ -static struct mxc_gpio_port imx_gpio_ports[] = { - [0] = { - .chip.label = "gpio-0", - .base = IO_ADDRESS(GPIO1_BASE_ADDR), - .irq = MXC_INT_GPIO1, - .virtual_irq_start = MXC_GPIO_IRQ_START, - }, - [1] = { - .chip.label = "gpio-1", - .base = IO_ADDRESS(GPIO2_BASE_ADDR), - .irq = MXC_INT_GPIO2, - .virtual_irq_start = MXC_GPIO_IRQ_START + 32, - }, - [2] = { - .chip.label = "gpio-2", - .base = IO_ADDRESS(GPIO3_BASE_ADDR), - .irq = MXC_INT_GPIO3, - .virtual_irq_start = MXC_GPIO_IRQ_START + 64, - } +static void mxc_init_ipu(void) +{ + platform_device_register(&mxc_ipu_device); +} +#else +static inline void mxc_init_ipu(void) +{ +} +#endif + +#if defined(CONFIG_SND_MXC_PMIC) || defined(CONFIG_SND_MXC_PMIC_MODULE) +static struct mxc_audio_platform_data mxc_audio_data; + +static struct platform_device mxc_alsa_device = { + .name = "mxc_alsa", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_audio_data, + }, + }; -int __init mxc_register_gpios(void) +static void mxc_init_audio(void) { - return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); + struct clk *pll_clk; + pll_clk = clk_get(NULL, "usb_pll"); + mxc_audio_data.ssi_clk[0] = clk_get(NULL, "ssi_clk.0"); + clk_set_parent(mxc_audio_data.ssi_clk[0], pll_clk); + clk_put(mxc_audio_data.ssi_clk[0]); + if (machine_is_mx31_3ds()) { + mxc_audio_data.ssi_num = 1; + } else { + mxc_audio_data.ssi_num = 2; + mxc_audio_data.ssi_clk[1] = clk_get(NULL, "ssi_clk.1"); + clk_set_parent(mxc_audio_data.ssi_clk[1], pll_clk); + clk_put(mxc_audio_data.ssi_clk[1]); + } + clk_put(pll_clk); + mxc_audio_data.src_port = 0; + platform_device_register(&mxc_alsa_device); } +#else -static struct resource mxc_w1_master_resources[] = { - { - .start = OWIRE_BASE_ADDR, - .end = OWIRE_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, +static void mxc_init_audio(void) +{ +} + +#endif + +#if defined(CONFIG_MXC_SSI) || defined(CONFIG_MXC_SSI_MODULE) +/*! + * Resource definition for the SSI + */ +static struct resource mxcssi2_resources[] = { + [0] = { + .start = SSI2_BASE_ADDR, + .end = SSI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, }; -struct platform_device mxc_w1_master_device = { - .name = "mxc_w1", +static struct resource mxcssi1_resources[] = { + [0] = { + .start = SSI1_BASE_ADDR, + .end = SSI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +/*! Device Definition for MXC SSI */ +static struct platform_device mxc_ssi1_device = { + .name = "mxc_ssi", .id = 0, - .num_resources = ARRAY_SIZE(mxc_w1_master_resources), - .resource = mxc_w1_master_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_audio_data, + }, + .num_resources = ARRAY_SIZE(mxcssi1_resources), + .resource = mxcssi1_resources, }; -static struct resource mxc_nand_resources[] = { - { - .start = 0, /* runtime dependent */ - .end = 0, - .flags = IORESOURCE_MEM - }, { - .start = MXC_INT_NANDFC, - .end = MXC_INT_NANDFC, - .flags = IORESOURCE_IRQ - }, +static struct platform_device mxc_ssi2_device = { + .name = "mxc_ssi", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_audio_data, + }, + .num_resources = ARRAY_SIZE(mxcssi2_resources), + .resource = mxcssi2_resources, }; -struct platform_device mxc_nand_device = { - .name = "mxc_nand", +static void mxc_init_ssi(void) +{ + platform_device_register(&mxc_ssi1_device); + platform_device_register(&mxc_ssi2_device); +} +#else + +static void mxc_init_ssi(void) +{ +} +#endif + +/*! + * This is platform device structure for adding SCC + */ +#if defined(CONFIG_MXC_SECURITY_SCC) || defined(CONFIG_MXC_SECURITY_SCC_MODULE) +static struct platform_device mxc_scc_device = { + .name = "mxc_scc", .id = 0, - .num_resources = ARRAY_SIZE(mxc_nand_resources), - .resource = mxc_nand_resources, }; -static struct resource mxc_i2c0_resources[] = { - { - .start = I2C_BASE_ADDR, - .end = I2C_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C, - .end = MXC_INT_I2C, - .flags = IORESOURCE_IRQ, - }, +static void mxc_init_scc(void) +{ + platform_device_register(&mxc_scc_device); +} +#else +static inline void mxc_init_scc(void) +{ +} +#endif + +/* SPI controller and device data */ +#if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) + +#ifdef CONFIG_SPI_MXC_SELECT1 +/*! + * Resource definition for the CSPI1 + */ +static struct resource mxcspi1_resources[] = { + [0] = { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, + }, }; -struct platform_device mxc_i2c_device0 = { - .name = "imx-i2c", +/*! Platform Data for MXC CSPI1 */ +static struct mxc_spi_master mxcspi1_data = { + .maxchipselect = 4, + .spi_version = 4, +}; + +/*! Device Definition for MXC CSPI1 */ +static struct platform_device mxcspi1_device = { + .name = "mxc_spi", .id = 0, - .num_resources = ARRAY_SIZE(mxc_i2c0_resources), - .resource = mxc_i2c0_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi1_data, + }, + .num_resources = ARRAY_SIZE(mxcspi1_resources), + .resource = mxcspi1_resources, }; -static struct resource mxc_i2c1_resources[] = { - { - .start = I2C2_BASE_ADDR, - .end = I2C2_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C2, - .end = MXC_INT_I2C2, - .flags = IORESOURCE_IRQ, - }, +#endif /* CONFIG_SPI_MXC_SELECT1 */ + +#ifdef CONFIG_SPI_MXC_SELECT2 +/*! + * Resource definition for the CSPI2 + */ +static struct resource mxcspi2_resources[] = { + [0] = { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, + }, }; -struct platform_device mxc_i2c_device1 = { - .name = "imx-i2c", +/*! Platform Data for MXC CSPI2 */ +static struct mxc_spi_master mxcspi2_data = { + .maxchipselect = 4, + .spi_version = 4, +}; + +/*! Device Definition for MXC CSPI2 */ +static struct platform_device mxcspi2_device = { + .name = "mxc_spi", .id = 1, - .num_resources = ARRAY_SIZE(mxc_i2c1_resources), - .resource = mxc_i2c1_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi2_data, + }, + .num_resources = ARRAY_SIZE(mxcspi2_resources), + .resource = mxcspi2_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT2 */ + +#ifdef CONFIG_SPI_MXC_SELECT3 +/*! + * Resource definition for the CSPI3 + */ +static struct resource mxcspi3_resources[] = { + [0] = { + .start = CSPI3_BASE_ADDR, + .end = CSPI3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI3, + .end = MXC_INT_CSPI3, + .flags = IORESOURCE_IRQ, + }, }; -static struct resource mxc_i2c2_resources[] = { - { - .start = I2C3_BASE_ADDR, - .end = I2C3_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C3, - .end = MXC_INT_I2C3, - .flags = IORESOURCE_IRQ, - }, +/*! Platform Data for MXC CSPI3 */ +static struct mxc_spi_master mxcspi3_data = { + .maxchipselect = 4, + .spi_version = 4, }; -struct platform_device mxc_i2c_device2 = { - .name = "imx-i2c", +/*! Device Definition for MXC CSPI3 */ +static struct platform_device mxcspi3_device = { + .name = "mxc_spi", .id = 2, - .num_resources = ARRAY_SIZE(mxc_i2c2_resources), - .resource = mxc_i2c2_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi3_data, + }, + .num_resources = ARRAY_SIZE(mxcspi3_resources), + .resource = mxcspi3_resources, }; +#endif /* CONFIG_SPI_MXC_SELECT3 */ -#ifdef CONFIG_ARCH_MX31 -static struct resource mxcsdhc0_resources[] = { - { - .start = MMC_SDHC1_BASE_ADDR, - .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_MMC_SDHC1, - .end = MXC_INT_MMC_SDHC1, - .flags = IORESOURCE_IRQ, - }, +static inline void mxc_init_spi(void) +{ + /* SPBA configuration for CSPI2 - MCU is set */ + spba_take_ownership(SPBA_CSPI2, SPBA_MASTER_A); +#ifdef CONFIG_SPI_MXC_SELECT1 + if (platform_device_register(&mxcspi1_device) < 0) + printk("Error: Registering the SPI Controller_1\n"); +#endif /* CONFIG_SPI_MXC_SELECT1 */ +#ifdef CONFIG_SPI_MXC_SELECT2 + if (platform_device_register(&mxcspi2_device) < 0) + printk("Error: Registering the SPI Controller_2\n"); +#endif /* CONFIG_SPI_MXC_SELECT2 */ +#ifdef CONFIG_SPI_MXC_SELECT3 + if (platform_device_register(&mxcspi3_device) < 0) + printk("Error: Registering the SPI Controller_3\n"); +#endif /* CONFIG_SPI_MXC_SELECT3 */ +} +#else +static inline void mxc_init_spi(void) +{ +} +#endif + +/* I2C controller and device data */ +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +/*! + * Resource definition for the I2C1 + */ +static struct resource mxci2c1_resources[] = { + [0] = { + .start = I2C_BASE_ADDR, + .end = I2C_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C, + .end = MXC_INT_I2C, + .flags = IORESOURCE_IRQ, + }, }; -static struct resource mxcsdhc1_resources[] = { - { - .start = MMC_SDHC2_BASE_ADDR, - .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_MMC_SDHC2, - .end = MXC_INT_MMC_SDHC2, - .flags = IORESOURCE_IRQ, - }, +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c1_data = { + .i2c_clk = 100000, }; +#endif -struct platform_device mxcsdhc_device0 = { - .name = "mxc-mmc", - .id = 0, - .num_resources = ARRAY_SIZE(mxcsdhc0_resources), - .resource = mxcsdhc0_resources, +#ifdef CONFIG_I2C_MXC_SELECT2 +/*! + * Resource definition for the I2C2 + */ +static struct resource mxci2c2_resources[] = { + [0] = { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, + }, }; -struct platform_device mxcsdhc_device1 = { - .name = "mxc-mmc", - .id = 1, - .num_resources = ARRAY_SIZE(mxcsdhc1_resources), - .resource = mxcsdhc1_resources, +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c2_data = { + .i2c_clk = 100000, }; +#endif -static struct resource rnga_resources[] = { +#ifdef CONFIG_I2C_MXC_SELECT3 +/*! + * Resource definition for the I2C3 + */ +static struct resource mxci2c3_resources[] = { + [0] = { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c3_data = { + .i2c_clk = 100000, +}; +#endif + +/*! Device Definition for MXC I2C1 */ +static struct platform_device mxci2c_devices[] = { +#ifdef CONFIG_I2C_MXC_SELECT1 + { + .name = "mxc_i2c", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c1_data, + }, + .num_resources = ARRAY_SIZE(mxci2c1_resources), + .resource = mxci2c1_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 { - .start = RNGA_BASE_ADDR, - .end = RNGA_BASE_ADDR + 0x28, - .flags = IORESOURCE_MEM, - }, + .name = "mxc_i2c", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c2_data, + }, + .num_resources = ARRAY_SIZE(mxci2c2_resources), + .resource = mxci2c2_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT3 + { + .name = "mxc_i2c", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c3_data, + }, + .num_resources = ARRAY_SIZE(mxci2c3_resources), + .resource = mxci2c3_resources,}, +#endif }; -struct platform_device mxc_rnga_device = { - .name = "mxc_rnga", - .id = -1, - .num_resources = 1, - .resource = rnga_resources, +static inline void mxc_init_i2c(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxci2c_devices); i++) { + if (platform_device_register(&mxci2c_devices[i]) < 0) + dev_err(&mxci2c_devices[i].dev, + "Unable to register I2C device\n"); + } +} +#else +static inline void mxc_init_i2c(void) +{ +} +#endif + +struct mxc_gpio_port mxc_gpio_ports[] = { + [0] = { + .chip.label = "gpio-0", + .base = IO_ADDRESS(GPIO1_BASE_ADDR), + .irq = MXC_INT_GPIO1, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START, + }, + [1] = { + .chip.label = "gpio-1", + .base = IO_ADDRESS(GPIO2_BASE_ADDR), + .irq = MXC_INT_GPIO2, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32, + }, + [2] = { + .chip.label = "gpio-2", + .base = IO_ADDRESS(GPIO3_BASE_ADDR), + .irq = MXC_INT_GPIO3, + .irq_high = 0, + .virtual_irq_start = MXC_GPIO_IRQ_START + 64, + } }; -#endif /* CONFIG_ARCH_MX31 */ -/* i.MX31 Image Processing Unit */ +int __init mxc_register_gpios(void) +{ + return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); +} -/* The resource order is important! */ -static struct resource mx3_ipu_rsrc[] = { - { - .start = IPU_CTRL_BASE_ADDR, - .end = IPU_CTRL_BASE_ADDR + 0x5F, - .flags = IORESOURCE_MEM, - }, { - .start = IPU_CTRL_BASE_ADDR + 0x88, - .end = IPU_CTRL_BASE_ADDR + 0xB3, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_IPU_SYN, - .end = MXC_INT_IPU_SYN, - .flags = IORESOURCE_IRQ, - }, { - .start = MXC_INT_IPU_ERR, - .end = MXC_INT_IPU_ERR, - .flags = IORESOURCE_IRQ, - }, +#if defined(CONFIG_PCMCIA_MX31ADS) || defined(CONFIG_PCMCIA_MX31ADS_MODULE) + +static struct platform_device mx31ads_device = { + .name = "Mx31ads_pcmcia_socket", + .id = 0, + .dev.release = mxc_nop_release, }; +static inline void mxc_init_pcmcia(void) +{ + platform_device_register(&mx31ads_device); +} +#else +static inline void mxc_init_pcmcia(void) +{ +} +#endif -struct platform_device mx3_ipu = { - .name = "ipu-core", - .id = -1, - .num_resources = ARRAY_SIZE(mx3_ipu_rsrc), - .resource = mx3_ipu_rsrc, +#if defined(CONFIG_MXC_HMP4E) || defined(CONFIG_MXC_HMP4E_MODULE) +static struct platform_device hmp4e_device = { + .name = "mxc_hmp4e", + .id = 0, + .dev = { + .release = mxc_nop_release, + } }; -static struct resource fb_resources[] = { - { - .start = IPU_CTRL_BASE_ADDR + 0xB4, - .end = IPU_CTRL_BASE_ADDR + 0x1BF, - .flags = IORESOURCE_MEM, - }, +static inline void mxc_init_hmp4e(void) +{ + void __iomem *iim_reg = IO_ADDRESS(IIM_BASE_ADDR); + if (cpu_is_mx32()) + return; + + /* override fuse for Hantro HW clock */ + if (__raw_readl(iim_reg + 0x808) == 0x4) { + if (!(__raw_readl(iim_reg + 0x800) & (1 << 5))) { + writel(__raw_readl(iim_reg + 0x808) & 0xfffffffb, + iim_reg + 0x808); + } + } + + platform_device_register(&hmp4e_device); +} +#else +static inline void mxc_init_hmp4e(void) +{ +} +#endif + +static struct platform_device mxc_dma_device = { + .name = "mxc_dma", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, }; -struct platform_device mx3_fb = { - .name = "mx3_sdc_fb", - .id = -1, - .num_resources = ARRAY_SIZE(fb_resources), - .resource = fb_resources, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - }, +static inline void mxc_init_dma(void) +{ + (void)platform_device_register(&mxc_dma_device); +} + +/*! + * Resource definition for the DPTC LP + */ +static struct resource dptc_resources[] = { + [0] = { + .start = CCM_BASE_ADDR, + .end = CCM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CCM, + .end = MXC_INT_CCM, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for DPTC */ +static struct mxc_dptc_data dptc_data = { + .reg_id = "SW1A", + .clk_id = "cpu_clk", + .dptccr_reg_addr = (unsigned int)MXC_CCM_PMCR0, + .dcvr0_reg_addr = (int)MXC_CCM_DCVR0, + .gpc_cntr_reg_addr = (int)MXC_CCM_PMCR0, + .dptccr = 0xFFFFFFFF, + .dptc_wp_supported = DPTC_WP_SUPPORTED, + .dptc_wp_allfreq = dptc_wp_allfreq_26ckih, + .clk_max_val = 532000000, + .gpc_adu = 0x0, + .vai_mask = MXC_CCM_PMCR0_PTVAI_MASK, + .vai_offset = MXC_CCM_PMCR0_PTVAI_OFFSET, + .dptc_enable_bit = MXC_CCM_PMCR0_DPTEN, + .irq_mask = MXC_CCM_PMCR0_PTVAIM, + .dptc_nvcr_bit = 0x0, + .gpc_irq_bit = 0x00000000, + .init_config = + MXC_CCM_PMCR0_PTVIS | MXC_CCM_PMCR0_DRCE3 | MXC_CCM_PMCR0_DRCE1, + .enable_config = + MXC_CCM_PMCR0_DPTEN | MXC_CCM_PMCR0_DPVCR | MXC_CCM_PMCR0_DPVV, + .dcr_mask = MXC_CCM_PMCR0_DCR, +}; + +/*! Device Definition for MXC DPTC */ +static struct platform_device mxc_dptc_device = { + .name = "mxc_dptc", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dptc_data, + }, + .num_resources = ARRAY_SIZE(dptc_resources), + .resource = dptc_resources, }; -static struct resource camera_resources[] = { +static inline void mxc_init_dptc(void) +{ + if (clk_get_rate(ckih_clk) == 27000000) { + + if (mxc_cpu_is_rev(CHIP_REV_2_0) < 0) + dptc_data.dptc_wp_allfreq = NULL; + else + dptc_data.dptc_wp_allfreq = + dptc_wp_allfreq_27ckih_TO_2_0; + + } else if (clk_get_rate(ckih_clk) == 26000000 + && mxc_cpu_is_rev(CHIP_REV_2_0) == 1) { + dptc_data.dptc_wp_allfreq = dptc_wp_allfreq_26ckih_TO_2_0; + } + + (void)platform_device_register(&mxc_dptc_device); +} + +#ifdef CONFIG_MXC_VPU +static struct resource vpu_resources[] = { { - .start = IPU_CTRL_BASE_ADDR + 0x60, - .end = IPU_CTRL_BASE_ADDR + 0x87, - .flags = IORESOURCE_MEM, - }, + .start = VL2CC_BASE_ADDR, + .end = VL2CC_BASE_ADDR + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, }; -struct platform_device mx3_camera = { - .name = "mx3-camera", - .id = 0, - .num_resources = ARRAY_SIZE(camera_resources), - .resource = camera_resources, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - }, +/*! Platform Data for MXC VPU */ +static struct platform_device mxcvpu_device = { + .name = "mxc_vpu", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(vpu_resources), + .resource = vpu_resources, }; -static struct resource otg_resources[] = { +static inline void mxc_init_vpu(void) +{ + if (cpu_is_mx32()) { + if (platform_device_register(&mxcvpu_device) < 0) + printk(KERN_ERR "Error: Registering the VPU.\n"); + } +} +#else +static inline void mxc_init_vpu(void) +{ +} +#endif + +#if defined(CONFIG_HW_RANDOM_FSL_RNGA) || \ +defined(CONFIG_HW_RANDOM_FSL_RNGA_MODULE) +static struct resource rnga_resources[] = { { - .start = OTG_BASE_ADDR, - .end = OTG_BASE_ADDR + 0x1ff, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_USB3, - .end = MXC_INT_USB3, - .flags = IORESOURCE_IRQ, - }, + .start = RNGA_BASE_ADDR, + .end = RNGA_BASE_ADDR + 0x28, + .flags = IORESOURCE_MEM, + }, }; -static u64 otg_dmamask = DMA_BIT_MASK(32); - -/* OTG gadget device */ -struct platform_device mxc_otg_udc_device = { - .name = "fsl-usb2-udc", - .id = -1, - .dev = { - .dma_mask = &otg_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = otg_resources, - .num_resources = ARRAY_SIZE(otg_resources), +static struct platform_device fsl_rnga_device = { + .name = "fsl_rnga", + .id = -1, + .num_resources = 1, + .resource = rnga_resources, }; -#ifdef CONFIG_ARCH_MX35 -static struct resource mxc_fec_resources[] = { +static inline void mxc_init_rnga(void) +{ + platform_device_register(&fsl_rnga_device); +} +#else +static inline void mxc_init_rnga(void) +{ +} +#endif + +#if defined(CONFIG_MXC_IIM) || defined(CONFIG_MXC_IIM_MODULE) +static struct resource mxc_iim_resources[] = { { - .start = MXC_FEC_BASE_ADDR, - .end = MXC_FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM - }, { - .start = MXC_INT_FEC, - .end = MXC_INT_FEC, - .flags = IORESOURCE_IRQ - }, + .start = IIM_BASE_ADDR, + .end = IIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, }; -struct platform_device mxc_fec_device = { - .name = "fec", +static struct platform_device mxc_iim_device = { + .name = "mxc_iim", .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_iim_resources), + .resource = mxc_iim_resources }; + +static inline void mxc_init_iim(void) +{ + if (platform_device_register(&mxc_iim_device) < 0) + dev_err(&mxc_iim_device.dev, + "Unable to register mxc iim device\n"); +} +#else +static inline void mxc_init_iim(void) +{ +} #endif -static int mx3_devices_init(void) +int __init mxc_init_devices(void) { - if (cpu_is_mx31()) { - mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; - mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; - mxc_register_device(&mxc_rnga_device, NULL); - } - if (cpu_is_mx35()) { - mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; - mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; - } + mxc_init_wdt(); + mxc_init_ipu(); + mxc_init_spi(); + mxc_init_i2c(); + mxc_init_rtc(); + mxc_init_owire(); + mxc_init_pcmcia(); + mxc_init_scc(); + mxc_init_ssi(); + mxc_init_hmp4e(); + mxc_init_dma(); + mxc_init_audio(); + ckih_clk = clk_get(NULL, "ckih"); + mxc_init_dptc(); + mxc_init_vpu(); + mxc_init_rnga(); + mxc_init_iim(); + /* SPBA configuration for SSI2 - SDMA and MCU are set */ + spba_take_ownership(SPBA_SSI2, SPBA_MASTER_C | SPBA_MASTER_A); return 0; } - -subsys_initcall(mx3_devices_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/sdma_script_code.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/sdma_script_code.h @@ -0,0 +1,581 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __SDMA_SCRIPT_CODE_H__ +#define __SDMA_SCRIPT_CODE_H__ + +/*! +* Following define start address of start script +*/ +#define start_ADDR 0 +/*! +* Following define size of start script +*/ +#define start_SIZE 21 + +/*! +* Following define start address of core script +*/ +#define core_ADDR 80 +/*! +* Following define size of core script +*/ +#define core_SIZE 152 + +/*! +* Following define start address of common script +*/ +#define common_ADDR 232 +/*! +* Following define size of common script +*/ +#define common_SIZE 191 + +/*! +* Following define start address of burst_copy script +*/ +#define burst_copy_ADDR 423 +/*! +* Following define size of burst_copy script +*/ +#define burst_copy_SIZE 87 + +/*! +* Following define start address of dsp_2_burst script +*/ +#define dsp_2_burst_ADDR 510 +/*! +* Following define size of dsp_2_burst script +*/ +#define dsp_2_burst_SIZE 24 + +/*! +* Following define start address of burst_2_dsp script +*/ +#define burst_2_dsp_ADDR 534 +/*! +* Following define size of burst_2_dsp script +*/ +#define burst_2_dsp_SIZE 24 + +/*! +* Following define start address of dsp_copy script +*/ +#define dsp_copy_ADDR 558 +/*! +* Following define size of dsp_copy script +*/ +#define dsp_copy_SIZE 86 + +/*! +* Following define start address of mcu_2_mcu script +*/ +#define mcu_2_mcu_ADDR 644 +/*! +* Following define size of mcu_2_mcu script +*/ +#define mcu_2_mcu_SIZE 79 + +/*! +* Following define start address of mcu_2_per script +*/ +#define mcu_2_per_ADDR 723 +/*! +* Following define size of mcu_2_per script +*/ +#define mcu_2_per_SIZE 88 + +/*! +* Following define start address of test script +*/ +#define test_ADDR 811 +/*! +* Following define size of test script +*/ +#define test_SIZE 63 + +/*! +* Following define start address of mcu_2_dsp script +*/ +#define mcu_2_dsp_ADDR 874 +/*! +* Following define size of mcu_2_dsp script +*/ +#define mcu_2_dsp_SIZE 30 + +/*! +* Following define start address of mcu_2_dsp_2buf script +*/ +#define mcu_2_dsp_2buf_ADDR 904 +/*! +* Following define size of mcu_2_dsp_2buf script +*/ +#define mcu_2_dsp_2buf_SIZE 113 + +/*! +* Following define start address of dsp_2_mcu script +*/ +#define dsp_2_mcu_ADDR 1017 +/*! +* Following define size of dsp_2_mcu script +*/ +#define dsp_2_mcu_SIZE 30 + +/*! +* Following define start address of dsp_2_mcu_2buf script +*/ +#define dsp_2_mcu_2buf_ADDR 1047 +/*! +* Following define size of dsp_2_mcu_2buf script +*/ +#define dsp_2_mcu_2buf_SIZE 113 + +/*! +* Following define start address of dsp_2_dsp script +*/ +#define dsp_2_dsp_ADDR 1160 +/*! +* Following define size of dsp_2_dsp script +*/ +#define dsp_2_dsp_SIZE 64 + +/*! +* Following define start address of per_2_mcu script +*/ +#define per_2_mcu_ADDR 1224 +/*! +* Following define size of per_2_mcu script +*/ +#define per_2_mcu_SIZE 121 + +/*! +* Following define start address of dsp_2_per_2buf script +*/ +#define dsp_2_per_2buf_ADDR 1345 +/*! +* Following define size of dsp_2_per_2buf script +*/ +#define dsp_2_per_2buf_SIZE 164 + +/*! +* Following define start address of per_2_dsp_2buf script +*/ +#define per_2_dsp_2buf_ADDR 1509 +/*! +* Following define size of per_2_dsp_2buf script +*/ +#define per_2_dsp_2buf_SIZE 168 + +/*! +* Following define start address of per_2_per script +*/ +#define per_2_per_ADDR 1677 +/*! +* Following define size of per_2_per script +*/ +#define per_2_per_SIZE 67 + +/*! +* Following define start address of error_dsp script +*/ +#define error_dsp_ADDR 1744 +/*! +* Following define size of error_dsp script +*/ +#define error_dsp_SIZE 34 + +/*! +* Following define start address of ap_2_ap script +*/ +#define ap_2_ap_ADDR 6144 +/*! +* Following define size of ap_2_ap script +*/ +#define ap_2_ap_SIZE 294 + +/*! +* Following define start address of app_2_mcu script +*/ +#define app_2_mcu_ADDR 6438 +/*! +* Following define size of app_2_mcu script +*/ +#define app_2_mcu_SIZE 101 + +/*! +* Following define start address of ata_2_mcu script +*/ +#define ata_2_mcu_ADDR 6539 +/*! +* Following define size of ata_2_mcu script +*/ +#define ata_2_mcu_SIZE 110 + +/*! +* Following define start address of dptc_dvfs script +*/ +#define dptc_dvfs_ADDR 6649 +/*! +* Following define size of dptc_dvfs script +*/ +#define dptc_dvfs_SIZE 274 + +/*! +* Following define start address of error script +*/ +#define error_ADDR 6923 +/*! +* Following define size of error script +*/ +#define error_SIZE 73 + +/*! +* Following define start address of firi_2_mcu script +*/ +#define firi_2_mcu_ADDR 6996 +/*! +* Following define size of firi_2_mcu script +*/ +#define firi_2_mcu_SIZE 114 + +/*! +* Following define start address of mcu_2_app script +*/ +#define mcu_2_app_ADDR 7110 +/*! +* Following define size of mcu_2_app script +*/ +#define mcu_2_app_SIZE 127 + +/*! +* Following define start address of mcu_2_ata script +*/ +#define mcu_2_ata_ADDR 7237 +/*! +* Following define size of mcu_2_ata script +*/ +#define mcu_2_ata_SIZE 87 + +/*! +* Following define start address of mcu_2_firi script +*/ +#define mcu_2_firi_ADDR 7324 +/*! +* Following define size of mcu_2_firi script +*/ +#define mcu_2_firi_SIZE 77 + +/*! +* Following define start address of mcu_2_mshc script +*/ +#define mcu_2_mshc_ADDR 7401 +/*! +* Following define size of mcu_2_mshc script +*/ +#define mcu_2_mshc_SIZE 48 + +/*! +* Following define start address of mcu_2_shp script +*/ +#define mcu_2_shp_ADDR 7449 +/*! +* Following define size of mcu_2_shp script +*/ +#define mcu_2_shp_SIZE 123 + +/*! +* Following define start address of mshc_2_mcu script +*/ +#define mshc_2_mcu_ADDR 7572 +/*! +* Following define size of mshc_2_mcu script +*/ +#define mshc_2_mcu_SIZE 60 + +/*! +* Following define start address of shp_2_mcu script +*/ +#define shp_2_mcu_ADDR 7632 +/*! +* Following define size of shp_2_mcu script +*/ +#define shp_2_mcu_SIZE 101 + +/*! +* Following define start address of uart_2_mcu script +*/ +#define uart_2_mcu_ADDR 7733 +/*! +* Following define size of uart_2_mcu script +*/ +#define uart_2_mcu_SIZE 105 + +/*! +* Following define start address of uartsh_2_mcu script +*/ +#define uartsh_2_mcu_ADDR 7838 +/*! +* Following define size of uartsh_2_mcu script +*/ +#define uartsh_2_mcu_SIZE 98 + +/*! +* Following define the start address of sdma ram +*/ + +#define RAM_CODE_START_ADDR 6144 +/*! +* Following define the size of sdma ram +*/ +#define RAM_CODE_SIZE 1792 + +/*! +* This function returns buffer that holds the image of SDMA RAM. +* This is required to start on a 4-byte aligned boundary on some platforms +* for SDMA to work properly. +* +* @return pointer to buffer that holds the image of SDMA RAM +*/ + +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static short sdma_code[] = { + 0xc0ec, 0x7d59, 0x0970, 0x0111, 0x5111, 0x5ad1, 0x5bd9, 0xc0fe, + 0x5ce1, 0x7d02, 0x0200, 0x9806, 0x08ff, 0x0011, 0x28ff, 0x00bc, + 0x05df, 0x7d4b, 0x06df, 0x7d2f, 0x6dc5, 0x6ed5, 0x5ef1, 0x0288, + 0xd81a, 0x9854, 0x0b04, 0x00d3, 0x7d20, 0x06a5, 0x3e03, 0x3d03, + 0x03a5, 0x3b03, 0x008b, 0x058b, 0x7802, 0x63d8, 0x0000, 0x7e72, + 0x63ff, 0x7e70, 0x02a5, 0x008a, 0x4e00, 0x7d01, 0x983d, 0x6dcf, + 0x6edf, 0x0015, 0x0015, 0x7802, 0x63d8, 0x0000, 0x7e63, 0x63ff, + 0x7e61, 0x3a03, 0x008a, 0x6dcd, 0x6edd, 0x7801, 0x63d8, 0x7e5a, + 0x63ff, 0x7e58, 0x0006, 0x6dc5, 0x6e07, 0x5ef1, 0x0288, 0xd8f7, + 0x7e02, 0x7f04, 0x9854, 0x0007, 0x68cc, 0x6b28, 0x54e1, 0x0089, + 0xdb13, 0x0188, 0x5ce1, 0x9854, 0x52d1, 0x53d9, 0x54e1, 0xc10d, + 0x7dad, 0x0200, 0x9800, 0x0200, 0x9800, 0x06df, 0x7d06, 0x6d23, + 0x6ed5, 0x5ef1, 0x0288, 0xd8cd, 0x9854, 0x5ef1, 0x6e07, 0x6d03, + 0x0b04, 0x00d3, 0x7d59, 0x06a5, 0x3e03, 0x3d03, 0x4d00, 0x7d09, + 0x03a5, 0x00a3, 0x0588, 0x008b, 0xd8c9, 0x7ed8, 0x620c, 0x7ed6, + 0x008d, 0x4e00, 0x7c25, 0x0a20, 0x00da, 0x7c22, 0x6503, 0x3d1f, + 0x02a5, 0x00a2, 0x0215, 0x0215, 0x6a18, 0x6a28, 0x7fc7, 0x0a20, + 0x0b08, 0x00da, 0x7c06, 0x6b18, 0x6b28, 0x7fc0, 0x0000, 0x2020, + 0x9889, 0x0688, 0x0015, 0x0015, 0x6818, 0x6828, 0x7fb7, 0x98c2, + 0x0007, 0x6a0c, 0x54e1, 0x0089, 0xdb0f, 0x0188, 0x5ce1, 0x9854, + 0x0b04, 0x00d3, 0x7d21, 0x0389, 0x1b12, 0x048b, 0x0688, 0x0015, + 0x0015, 0x0588, 0x038c, 0x0a08, 0x05da, 0x008d, 0x7c01, 0x008a, + 0x05a0, 0x7803, 0x620b, 0x5a03, 0x1b01, 0x7e98, 0x008b, 0x00a4, + 0x038c, 0x7803, 0x5203, 0x6a0b, 0x1b01, 0x6a28, 0x7f8f, 0x0000, + 0x4d00, 0x7ce8, 0x008e, 0x3803, 0xd8c9, 0x7e88, 0x620c, 0x7e86, + 0x9854, 0x7802, 0x6209, 0x6a29, 0x0006, 0x3e03, 0x4e00, 0x7d11, + 0x0b04, 0x03a6, 0x02db, 0x7d01, 0x038a, 0x02a3, 0x048a, 0x008b, + 0x7802, 0x6329, 0x6bc8, 0x7ebc, 0x63c8, 0x7ebc, 0x008c, 0x4800, + 0x7d15, 0x0488, 0x0015, 0x0015, 0x6edf, 0x7803, 0x632b, 0x6bc8, + 0x0000, 0x7eae, 0x63c8, 0x7eae, 0x008c, 0x3803, 0x6edd, 0x7803, + 0x6329, 0x6bc8, 0x0000, 0x7ea4, 0x63c8, 0x7ea4, 0x0006, 0x3d03, + 0x4d00, 0x7d0e, 0x0b04, 0x03a5, 0x02db, 0x7d01, 0x038a, 0x02a3, + 0x048a, 0x008b, 0x7802, 0x63c8, 0x6b09, 0x7e1e, 0x7f1e, 0x008c, + 0x0488, 0x0015, 0x0015, 0x6dcf, 0x0288, 0x008a, 0x0d08, 0x02dd, + 0x7c01, 0x008d, 0x7802, 0x63c8, 0x6b0b, 0x7e0e, 0x6b28, 0x7f0d, + 0x0000, 0x02dd, 0x7c02, 0x2208, 0x990d, 0x008c, 0x3803, 0x65c0, + 0x6dc5, 0x7802, 0x63c8, 0x6b09, 0x6b28, 0x0006, 0x0870, 0x0011, + 0x5010, 0xc0ec, 0x7d5e, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, + 0x7d02, 0x0200, 0x992c, 0x6ec3, 0x6d07, 0x5df0, 0x0dff, 0x0511, + 0x1dff, 0x05bc, 0x4d00, 0x7d44, 0x0b70, 0x0311, 0x522b, 0x5313, + 0x02b9, 0x4a00, 0x7c04, 0x6a28, 0x7f3a, 0x0400, 0x993c, 0x008f, + 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x0a03, 0x0212, 0x02bc, 0x0210, + 0x4a00, 0x7d1c, 0x4a02, 0x7d20, 0x4a01, 0x7d23, 0x0b70, 0x0311, + 0x53eb, 0x62c8, 0x7e24, 0x0360, 0x7d02, 0x0210, 0x0212, 0x6a09, + 0x7f1e, 0x0212, 0x6a09, 0x7f1b, 0x0212, 0x6a09, 0x7f18, 0x2003, + 0x4800, 0x7cef, 0x0b70, 0x0311, 0x5313, 0x997d, 0x0015, 0x0015, + 0x7802, 0x62c8, 0x6a0b, 0x997c, 0x0015, 0x7802, 0x62c8, 0x6a0a, + 0x997c, 0x7802, 0x62c8, 0x6a09, 0x7c02, 0x0000, 0x993a, 0xdb13, + 0x6a28, 0x7ffd, 0x008b, 0x52c3, 0x53cb, 0xc10d, 0x7da5, 0x0200, + 0x992c, 0x0200, 0x9929, 0xc19d, 0xc0ec, 0x7d69, 0x0c70, 0x0411, + 0x5414, 0x5ac4, 0x028c, 0x58da, 0x5efa, 0xc0fe, 0x56fa, 0x7d02, + 0x0200, 0x9994, 0x6d07, 0x5bca, 0x5cd2, 0x0bff, 0x0311, 0x1bff, + 0x04bb, 0x0415, 0x53da, 0x4c00, 0x7d47, 0x0a70, 0x0211, 0x552a, + 0x5212, 0x008d, 0x00bb, 0x4800, 0x7c07, 0x05b9, 0x4d00, 0x7c13, + 0x6928, 0x7f2d, 0x0400, 0x99a5, 0x008f, 0x0015, 0x04d8, 0x7d01, + 0x008c, 0x04a0, 0x0015, 0x7802, 0x55c6, 0x6d0b, 0x7e29, 0x6d28, + 0x7f1e, 0x0000, 0x99a3, 0x1e20, 0x5506, 0x2620, 0x008d, 0x0560, + 0x7c08, 0x065f, 0x55c6, 0x063f, 0x7e1b, 0x6d0a, 0x7f10, 0x4c00, + 0x7d1b, 0x04d8, 0x7d02, 0x008c, 0x0020, 0x04a0, 0x0015, 0x7802, + 0x55c6, 0x6d0b, 0x7e0d, 0x6d28, 0x7f02, 0x0000, 0x99ec, 0x0007, + 0x680c, 0x6d0c, 0x6507, 0x6d07, 0x6d2b, 0x6d28, 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0x6928, 0x7f0b, + 0x0400, 0x9daa, 0x5206, 0x7e10, 0x6a0b, 0x6928, 0x7f04, 0x0000, + 0x2504, 0x7d0c, 0x9daa, 0x0007, 0x680c, 0x680c, 0x6207, 0x6a07, + 0x6a2b, 0x6a28, 0x0007, 0x680c, 0x0007, 0x0454, 0x6928, 0x7ff3, + 0x5010, 0x52c0, 0xc10d, 0x7dcf, 0x0200, 0x9d9b, 0x0200, 0x9d97, + 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d5e, 0x5010, 0x5ac0, 0x5bc8, + 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, 0x9dd7, 0x6d07, 0x5df0, + 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d44, 0x0a70, 0x0211, + 0x532a, 0x5212, 0x03b9, 0x4b00, 0x7c04, 0x6a28, 0x7f3a, 0x0400, + 0x9de6, 0x008f, 0x05d8, 0x7d01, 0x008d, 0x05a0, 0x0b03, 0x0312, + 0x03bc, 0x0310, 0x4b00, 0x7d1c, 0x4b02, 0x7d20, 0x4b01, 0x7d23, + 0x0a70, 0x0211, 0x52ea, 0x5306, 0x7e24, 0x0260, 0x7d02, 0x0310, + 0x0312, 0x6b09, 0x7f1e, 0x0312, 0x6b09, 0x7f1b, 0x0312, 0x6b09, + 0x7f18, 0x2003, 0x4800, 0x7cef, 0x0a70, 0x0211, 0x5212, 0x9e27, + 0x0015, 0x0015, 0x7802, 0x5306, 0x6b0b, 0x9e26, 0x0015, 0x7802, + 0x5306, 0x6b0a, 0x9e26, 0x7802, 0x5306, 0x6b09, 0x7c02, 0x0000, + 0x9de4, 0xdb13, 0x6928, 0x7ffd, 0x008a, 0x52c0, 0x53c8, 0xc10d, + 0x7da6, 0x0200, 0x9dd7, 0x0200, 0x9dd3, 0x0870, 0x0011, 0x5010, + 0xc0ec, 0x7d5b, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, + 0x0200, 0x9e3b, 0x0b70, 0x0311, 0x6ec3, 0x6d07, 0x5df0, 0x0dff, + 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d3d, 0x522b, 0x02b9, 0x4a00, + 0x7c04, 0x6a28, 0x7f33, 0x0400, 0x9e4d, 0x028e, 0x1a94, 0x6ac3, + 0x62c8, 0x0269, 0x7d1b, 0x1e94, 0x6ec3, 0x6ed3, 0x62c8, 0x0248, + 0x6ac8, 0x2694, 0x6ec3, 0x62c8, 0x026e, 0x7d31, 0x6a09, 0x7f1e, + 0x2501, 0x4d00, 0x7d1f, 0x028e, 0x1a98, 0x6ac3, 0x62c8, 0x6ec3, + 0x0260, 0x7df1, 0x6a28, 0x7f12, 0xdb47, 0x9e8c, 0x6ee3, 0x008f, + 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x62c8, 0x026e, 0x7d17, + 0x6a09, 0x7f04, 0x2001, 0x7cf9, 0x0000, 0x9e4b, 0x0289, 0xdb13, + 0x018a, 0x9e9b, 0x6a28, 0x7ffa, 0x0b70, 0x0311, 0x5013, 0x52c0, + 0x53c8, 0xc10d, 0x7da8, 0x0200, 0x9e3b, 0x0200, 0x9e38, 0x6a28, + 0x7fed, 0xdb47, 0x9e9b, 0x0458, 0x0454, 0x9e8c, 0xc19d, 0x0870, + 0x0011, 0xc0ec, 0x7d54, 0x5010, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, + 0x56f8, 0x7d02, 0x0200, 0x9ea5, 0x0b70, 0x0311, 0x6d07, 0x5df0, + 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d36, 0x522b, 0x02b9, + 0x4a00, 0x7c04, 0x6928, 0x7f2c, 0x0400, 0x9eb6, 0x028e, 0x1a94, + 0x5202, 0x0269, 0x7d16, 0x1e94, 0x5206, 0x0248, 0x5a06, 0x2694, + 0x5206, 0x026e, 0x7d2e, 0x6a09, 0x7f1b, 0x2501, 0x4d00, 0x7d1c, + 0x028e, 0x1a98, 0x5202, 0x0260, 0x7df3, 0x6a28, 0x7f11, 0xdb47, + 0x9eee, 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5206, + 0x026e, 0x7d17, 0x6a09, 0x7f04, 0x2001, 0x7cf9, 0x0000, 0x9eb4, + 0x0289, 0xdb13, 0x018a, 0x9efd, 0x6928, 0x7ffa, 0x0b70, 0x0311, + 0x5013, 0x52c0, 0x53c8, 0xc10d, 0x7db0, 0x0200, 0x9ea5, 0x0200, + 0x9ea1, 0x6a28, 0x7fed, 0xdb47, 0x9efd, 0x0458, 0x0454, 0x9eee, + 0x9eee +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx31_pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx31_pins.h @@ -0,0 +1,429 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX31_PINS_H__ +#define __ASM_ARCH_MXC_MX31_PINS_H__ + +/*! + * @file arch-mxc/mx31_pins.h + * + * @brief MX31 I/O Pin List + * + * @ingroup GPIO_MX31 + */ + +#ifndef __ASSEMBLY__ + +/*! + * @name IOMUX/PAD Bit field definitions + */ + +/*! @{ */ + +/*! + * In order to identify pins more effectively, each mux-controlled pin's + * enumerated value is constructed in the following way: + * + * ------------------------------------------------------------------- + * 31-29 | 28 - 24 |23 - 21| 20 | 19 - 18 | 17 - 10| 9 - 8 | 7 - 0 + * ------------------------------------------------------------------- + * IO_P | IO_I | RSVD | PAD_F | PAD_I | MUX_F | MUX_I + * ------------------------------------------------------------------- + * + * Bit 0 to 7 contains MUX_I used to identify the register + * offset (0-based. base is IOMUX_module_base + 0xC) defined in the Section + * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. Bit 8 to 9 is MUX_F which + * contains the offset value defined WITHIN the same register (each IOMUX + * control register contains four 8-bit fields for four different pins). The + * similar field definitions are used for the pad control register. + * For example, the MX31_PIN_A0 is defined in the enumeration: + * ( 73 << MUX_I) | (0 << MUX_F)|( 98 << PAD_I) | (0 << PAD_F) + * It means the mux control register is at register offset 73. So the absolute + * address is: 0xC+73*4=0x130 0 << MUX_F means the control bits are at the + * least significant bits within the register. The pad control register offset + * is: 0x154+98*4=0x2DC and also occupy the least significant bits within the + * register. + */ + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * MUX control register index (0-based) + */ +#define MUX_I 0 + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * field within IOMUX control register for control bits + * (legal values are 0, 1, 2, 3) + */ +#define MUX_F 8 + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * PAD control register index (0-based) + */ +#define PAD_I 10 + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * field within PAD control register for control bits + * (legal values are 0, 1, 2) + */ +#define PAD_F 18 + +#define _MXC_BUILD_PIN(gp,gi,mi,mf,pi,pf) \ + ((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | ((mi) << MUX_I) | \ + ((mf) << MUX_F) | ((pi) << PAD_I) | ((pf) << PAD_F) + +#define _MXC_BUILD_GPIO_PIN(gp,gi,mi,mf,pi,pf) \ + _MXC_BUILD_PIN(gp,gi,mi,mf,pi,pf) +#define _MXC_BUILD_NON_GPIO_PIN(mi,mf,pi,pf) \ + _MXC_BUILD_PIN(7,0,mi,mf,pi,pf) + +/*! + * This enumeration is constructed based on the Section + * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated + * value is constructed based on the rules described above. + */ +enum iomux_pins { + MX31_PIN_CSPI3_MISO = _MXC_BUILD_NON_GPIO_PIN(0, 3, 1, 2), + MX31_PIN_CSPI3_SCLK = _MXC_BUILD_NON_GPIO_PIN(0, 2, 1, 1), + MX31_PIN_CSPI3_SPI_RDY = _MXC_BUILD_NON_GPIO_PIN(0, 1, 1, 0), + MX31_PIN_TTM_PAD = _MXC_BUILD_NON_GPIO_PIN(0, 0, 0, 2), + MX31_PIN_ATA_RESET_B = _MXC_BUILD_GPIO_PIN(2, 31, 1, 3, 3, 0), + MX31_PIN_CE_CONTROL = _MXC_BUILD_NON_GPIO_PIN(1, 2, 2, 2), + MX31_PIN_CLKSS = _MXC_BUILD_NON_GPIO_PIN(1, 1, 2, 1), + MX31_PIN_CSPI3_MOSI = _MXC_BUILD_NON_GPIO_PIN(1, 0, 2, 0), + MX31_PIN_ATA_CS1 = _MXC_BUILD_GPIO_PIN(2, 27, 2, 3, 4, 1), + MX31_PIN_ATA_DIOR = _MXC_BUILD_GPIO_PIN(2, 28, 2, 2, 4, 0), + MX31_PIN_ATA_DIOW = _MXC_BUILD_GPIO_PIN(2, 29, 2, 1, 3, 2), + MX31_PIN_ATA_DMACK = _MXC_BUILD_GPIO_PIN(2, 30, 2, 0, 3, 1), + MX31_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(1, 29, 3, 3, 5, 2), + MX31_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(1, 30, 3, 2, 5, 1), + MX31_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(1, 31, 3, 1, 5, 0), + MX31_PIN_ATA_CS0 = _MXC_BUILD_GPIO_PIN(2, 26, 3, 0, 4, 2), + MX31_PIN_D3_SPL = _MXC_BUILD_NON_GPIO_PIN(4, 3, 7, 0), + MX31_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(1, 26, 4, 2, 6, 2), + MX31_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(1, 27, 4, 1, 6, 1), + MX31_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(1, 28, 4, 0, 6, 0), + MX31_PIN_VSYNC3 = _MXC_BUILD_NON_GPIO_PIN(5, 3, 8, 1), + MX31_PIN_CONTRAST = _MXC_BUILD_NON_GPIO_PIN(5, 2, 8, 0), + MX31_PIN_D3_REV = _MXC_BUILD_NON_GPIO_PIN(5, 1, 7, 2), + MX31_PIN_D3_CLS = _MXC_BUILD_NON_GPIO_PIN(5, 0, 7, 1), + MX31_PIN_SER_RS = _MXC_BUILD_GPIO_PIN(2, 25, 6, 3, 9, 2), + MX31_PIN_PAR_RS = _MXC_BUILD_NON_GPIO_PIN(6, 2, 9, 1), + MX31_PIN_WRITE = _MXC_BUILD_NON_GPIO_PIN(6, 1, 9, 0), + MX31_PIN_READ = _MXC_BUILD_NON_GPIO_PIN(6, 0, 8, 2), + MX31_PIN_SD_D_IO = _MXC_BUILD_GPIO_PIN(2, 21, 7, 3, 11, 0), + MX31_PIN_SD_D_CLK = _MXC_BUILD_GPIO_PIN(2, 22, 7, 2, 10, 2), + MX31_PIN_LCS0 = _MXC_BUILD_GPIO_PIN(2, 23, 7, 1, 10, 1), + MX31_PIN_LCS1 = _MXC_BUILD_GPIO_PIN(2, 24, 7, 0, 10, 0), + MX31_PIN_HSYNC = _MXC_BUILD_NON_GPIO_PIN(8, 3, 12, 1), + MX31_PIN_FPSHIFT = _MXC_BUILD_NON_GPIO_PIN(8, 2, 12, 0), + MX31_PIN_DRDY0 = _MXC_BUILD_NON_GPIO_PIN(8, 1, 11, 2), + MX31_PIN_SD_D_I = _MXC_BUILD_GPIO_PIN(2, 20, 8, 0, 11, 1), + MX31_PIN_LD15 = _MXC_BUILD_NON_GPIO_PIN(9, 3, 13, 2), + MX31_PIN_LD16 = _MXC_BUILD_NON_GPIO_PIN(9, 2, 13, 1), + MX31_PIN_LD17 = _MXC_BUILD_NON_GPIO_PIN(9, 1, 13, 0), + MX31_PIN_VSYNC0 = _MXC_BUILD_NON_GPIO_PIN(9, 0, 12, 2), + MX31_PIN_LD11 = _MXC_BUILD_NON_GPIO_PIN(10, 3, 15, 0), + MX31_PIN_LD12 = _MXC_BUILD_NON_GPIO_PIN(10, 2, 14, 2), + MX31_PIN_LD13 = _MXC_BUILD_NON_GPIO_PIN(10, 1, 14, 1), + MX31_PIN_LD14 = _MXC_BUILD_NON_GPIO_PIN(10, 0, 14, 0), + MX31_PIN_LD7 = _MXC_BUILD_NON_GPIO_PIN(11, 3, 16, 1), + MX31_PIN_LD8 = _MXC_BUILD_NON_GPIO_PIN(11, 2, 16, 0), + MX31_PIN_LD9 = _MXC_BUILD_NON_GPIO_PIN(11, 1, 15, 2), + MX31_PIN_LD10 = _MXC_BUILD_NON_GPIO_PIN(11, 0, 15, 1), + MX31_PIN_LD3 = _MXC_BUILD_NON_GPIO_PIN(12, 3, 17, 2), + MX31_PIN_LD4 = _MXC_BUILD_NON_GPIO_PIN(12, 2, 17, 1), + MX31_PIN_LD5 = _MXC_BUILD_NON_GPIO_PIN(12, 1, 17, 0), + MX31_PIN_LD6 = _MXC_BUILD_NON_GPIO_PIN(12, 0, 16, 2), + MX31_PIN_USBH2_DATA1 = _MXC_BUILD_NON_GPIO_PIN(13, 3, 19, 0), + MX31_PIN_LD0 = _MXC_BUILD_NON_GPIO_PIN(13, 2, 18, 2), + MX31_PIN_LD1 = _MXC_BUILD_NON_GPIO_PIN(13, 1, 18, 1), + MX31_PIN_LD2 = _MXC_BUILD_NON_GPIO_PIN(13, 0, 18, 0), + MX31_PIN_USBH2_DIR = _MXC_BUILD_NON_GPIO_PIN(14, 3, 20, 1), + MX31_PIN_USBH2_STP = _MXC_BUILD_NON_GPIO_PIN(14, 2, 20, 0), + MX31_PIN_USBH2_NXT = _MXC_BUILD_NON_GPIO_PIN(14, 1, 19, 2), + MX31_PIN_USBH2_DATA0 = _MXC_BUILD_NON_GPIO_PIN(14, 0, 19, 1), + MX31_PIN_USBOTG_DATA5 = _MXC_BUILD_NON_GPIO_PIN(15, 3, 21, 2), + MX31_PIN_USBOTG_DATA6 = _MXC_BUILD_NON_GPIO_PIN(15, 2, 21, 1), + MX31_PIN_USBOTG_DATA7 = _MXC_BUILD_NON_GPIO_PIN(15, 1, 21, 0), + MX31_PIN_USBH2_CLK = _MXC_BUILD_NON_GPIO_PIN(15, 0, 20, 2), + MX31_PIN_USBOTG_DATA1 = _MXC_BUILD_NON_GPIO_PIN(16, 3, 23, 0), + MX31_PIN_USBOTG_DATA2 = _MXC_BUILD_NON_GPIO_PIN(16, 2, 22, 2), + MX31_PIN_USBOTG_DATA3 = _MXC_BUILD_NON_GPIO_PIN(16, 1, 22, 1), + MX31_PIN_USBOTG_DATA4 = _MXC_BUILD_NON_GPIO_PIN(16, 0, 22, 0), + MX31_PIN_USBOTG_DIR = _MXC_BUILD_NON_GPIO_PIN(17, 3, 24, 1), + MX31_PIN_USBOTG_STP = _MXC_BUILD_NON_GPIO_PIN(17, 2, 24, 0), + MX31_PIN_USBOTG_NXT = _MXC_BUILD_NON_GPIO_PIN(17, 1, 23, 2), + MX31_PIN_USBOTG_DATA0 = _MXC_BUILD_NON_GPIO_PIN(17, 0, 23, 1), + MX31_PIN_USB_PWR = _MXC_BUILD_GPIO_PIN(0, 29, 18, 3, 25, 2), + MX31_PIN_USB_OC = _MXC_BUILD_GPIO_PIN(0, 30, 18, 2, 25, 1), + MX31_PIN_USB_BYP = _MXC_BUILD_GPIO_PIN(0, 31, 18, 1, 25, 0), + MX31_PIN_USBOTG_CLK = _MXC_BUILD_NON_GPIO_PIN(18, 0, 24, 2), + MX31_PIN_TDO = _MXC_BUILD_NON_GPIO_PIN(19, 3, 27, 0), + MX31_PIN_TRSTB = _MXC_BUILD_NON_GPIO_PIN(19, 2, 26, 2), + MX31_PIN_DE_B = _MXC_BUILD_NON_GPIO_PIN(19, 1, 26, 1), + MX31_PIN_SJC_MOD = _MXC_BUILD_NON_GPIO_PIN(19, 0, 26, 0), + MX31_PIN_RTCK = _MXC_BUILD_NON_GPIO_PIN(20, 3, 28, 1), + MX31_PIN_TCK = _MXC_BUILD_NON_GPIO_PIN(20, 2, 28, 0), + MX31_PIN_TMS = _MXC_BUILD_NON_GPIO_PIN(20, 1, 27, 2), + MX31_PIN_TDI = _MXC_BUILD_NON_GPIO_PIN(20, 0, 27, 1), + MX31_PIN_KEY_COL4 = _MXC_BUILD_GPIO_PIN(1, 22, 21, 3, 29, 2), + MX31_PIN_KEY_COL5 = _MXC_BUILD_GPIO_PIN(1, 23, 21, 2, 29, 1), + MX31_PIN_KEY_COL6 = _MXC_BUILD_GPIO_PIN(1, 24, 21, 1, 29, 0), + MX31_PIN_KEY_COL7 = _MXC_BUILD_GPIO_PIN(1, 25, 21, 0, 28, 2), + MX31_PIN_KEY_COL0 = _MXC_BUILD_NON_GPIO_PIN(22, 3, 31, 0), + MX31_PIN_KEY_COL1 = _MXC_BUILD_NON_GPIO_PIN(22, 2, 30, 2), + MX31_PIN_KEY_COL2 = _MXC_BUILD_NON_GPIO_PIN(22, 1, 30, 1), + MX31_PIN_KEY_COL3 = _MXC_BUILD_NON_GPIO_PIN(22, 0, 30, 0), + MX31_PIN_KEY_ROW4 = _MXC_BUILD_GPIO_PIN(1, 18, 23, 3, 32, 1), + MX31_PIN_KEY_ROW5 = _MXC_BUILD_GPIO_PIN(1, 19, 23, 2, 32, 0), + MX31_PIN_KEY_ROW6 = _MXC_BUILD_GPIO_PIN(1, 20, 23, 1, 31, 2), + MX31_PIN_KEY_ROW7 = _MXC_BUILD_GPIO_PIN(1, 21, 23, 0, 31, 1), + MX31_PIN_KEY_ROW0 = _MXC_BUILD_NON_GPIO_PIN(24, 3, 33, 2), + MX31_PIN_KEY_ROW1 = _MXC_BUILD_NON_GPIO_PIN(24, 2, 33, 1), + MX31_PIN_KEY_ROW2 = _MXC_BUILD_NON_GPIO_PIN(24, 1, 33, 0), + MX31_PIN_KEY_ROW3 = _MXC_BUILD_NON_GPIO_PIN(24, 0, 32, 2), + MX31_PIN_TXD2 = _MXC_BUILD_GPIO_PIN(0, 28, 25, 3, 35, 0), + MX31_PIN_RTS2 = _MXC_BUILD_NON_GPIO_PIN(25, 2, 34, 2), + MX31_PIN_CTS2 = _MXC_BUILD_NON_GPIO_PIN(25, 1, 34, 1), + MX31_PIN_BATT_LINE = _MXC_BUILD_GPIO_PIN(1, 17, 25, 0, 34, 0), + MX31_PIN_RI_DTE1 = _MXC_BUILD_GPIO_PIN(1, 14, 26, 3, 36, 1), + MX31_PIN_DCD_DTE1 = _MXC_BUILD_GPIO_PIN(1, 15, 26, 2, 36, 0), + MX31_PIN_DTR_DCE2 = _MXC_BUILD_GPIO_PIN(1, 16, 26, 1, 35, 2), + MX31_PIN_RXD2 = _MXC_BUILD_GPIO_PIN(0, 27, 26, 0, 35, 1), + MX31_PIN_RI_DCE1 = _MXC_BUILD_GPIO_PIN(1, 10, 27, 3, 37, 2), + MX31_PIN_DCD_DCE1 = _MXC_BUILD_GPIO_PIN(1, 11, 27, 2, 37, 1), + MX31_PIN_DTR_DTE1 = _MXC_BUILD_GPIO_PIN(1, 12, 27, 1, 37, 0), + MX31_PIN_DSR_DTE1 = _MXC_BUILD_GPIO_PIN(1, 13, 27, 0, 36, 2), + MX31_PIN_RTS1 = _MXC_BUILD_GPIO_PIN(1, 6, 28, 3, 39, 0), + MX31_PIN_CTS1 = _MXC_BUILD_GPIO_PIN(1, 7, 28, 2, 38, 2), + MX31_PIN_DTR_DCE1 = _MXC_BUILD_GPIO_PIN(1, 8, 28, 1, 38, 1), + MX31_PIN_DSR_DCE1 = _MXC_BUILD_GPIO_PIN(1, 9, 28, 0, 38, 0), + MX31_PIN_CSPI2_SCLK = _MXC_BUILD_NON_GPIO_PIN(29, 3, 40, 1), + MX31_PIN_CSPI2_SPI_RDY = _MXC_BUILD_NON_GPIO_PIN(29, 2, 40, 0), + MX31_PIN_RXD1 = _MXC_BUILD_GPIO_PIN(1, 4, 29, 1, 39, 2), + MX31_PIN_TXD1 = _MXC_BUILD_GPIO_PIN(1, 5, 29, 0, 39, 1), + MX31_PIN_CSPI2_MISO = _MXC_BUILD_NON_GPIO_PIN(30, 3, 41, 2), + MX31_PIN_CSPI2_SS0 = _MXC_BUILD_NON_GPIO_PIN(30, 2, 41, 1), + MX31_PIN_CSPI2_SS1 = _MXC_BUILD_NON_GPIO_PIN(30, 1, 41, 0), + MX31_PIN_CSPI2_SS2 = _MXC_BUILD_NON_GPIO_PIN(30, 0, 40, 2), + MX31_PIN_CSPI1_SS2 = _MXC_BUILD_NON_GPIO_PIN(31, 3, 43, 0), + MX31_PIN_CSPI1_SCLK = _MXC_BUILD_NON_GPIO_PIN(31, 2, 42, 2), + MX31_PIN_CSPI1_SPI_RDY = _MXC_BUILD_NON_GPIO_PIN(31, 1, 42, 1), + MX31_PIN_CSPI2_MOSI = _MXC_BUILD_NON_GPIO_PIN(31, 0, 42, 0), + MX31_PIN_CSPI1_MOSI = _MXC_BUILD_NON_GPIO_PIN(32, 3, 44, 1), + MX31_PIN_CSPI1_MISO = _MXC_BUILD_NON_GPIO_PIN(32, 2, 44, 0), + MX31_PIN_CSPI1_SS0 = _MXC_BUILD_NON_GPIO_PIN(32, 1, 43, 2), + MX31_PIN_CSPI1_SS1 = _MXC_BUILD_NON_GPIO_PIN(32, 0, 43, 1), + MX31_PIN_STXD6 = _MXC_BUILD_GPIO_PIN(0, 23, 33, 3, 45, 2), + MX31_PIN_SRXD6 = _MXC_BUILD_GPIO_PIN(0, 24, 33, 2, 45, 1), + MX31_PIN_SCK6 = _MXC_BUILD_GPIO_PIN(0, 25, 33, 1, 45, 0), + MX31_PIN_SFS6 = _MXC_BUILD_GPIO_PIN(0, 26, 33, 0, 44, 2), + MX31_PIN_STXD5 = _MXC_BUILD_GPIO_PIN(0, 21, 34, 3, 47, 0), + MX31_PIN_SRXD5 = _MXC_BUILD_GPIO_PIN(0, 22, 34, 2, 46, 2), + MX31_PIN_SCK5 = _MXC_BUILD_NON_GPIO_PIN(34, 1, 46, 1), + MX31_PIN_SFS5 = _MXC_BUILD_NON_GPIO_PIN(34, 0, 46, 0), + MX31_PIN_STXD4 = _MXC_BUILD_GPIO_PIN(0, 19, 35, 3, 48, 1), + MX31_PIN_SRXD4 = _MXC_BUILD_GPIO_PIN(0, 20, 35, 2, 48, 0), + MX31_PIN_SCK4 = _MXC_BUILD_NON_GPIO_PIN(35, 1, 47, 2), + MX31_PIN_SFS4 = _MXC_BUILD_NON_GPIO_PIN(35, 0, 47, 1), + MX31_PIN_STXD3 = _MXC_BUILD_GPIO_PIN(0, 17, 36, 3, 49, 2), + MX31_PIN_SRXD3 = _MXC_BUILD_GPIO_PIN(0, 18, 36, 2, 49, 1), + MX31_PIN_SCK3 = _MXC_BUILD_NON_GPIO_PIN(36, 1, 49, 0), + MX31_PIN_SFS3 = _MXC_BUILD_NON_GPIO_PIN(36, 0, 48, 2), + MX31_PIN_CSI_HSYNC = _MXC_BUILD_GPIO_PIN(2, 18, 37, 3, 51, 0), + MX31_PIN_CSI_PIXCLK = _MXC_BUILD_GPIO_PIN(2, 19, 37, 2, 50, 2), + MX31_PIN_I2C_CLK = _MXC_BUILD_NON_GPIO_PIN(37, 1, 50, 1), + MX31_PIN_I2C_DAT = _MXC_BUILD_NON_GPIO_PIN(37, 0, 50, 0), + MX31_PIN_CSI_D14 = _MXC_BUILD_GPIO_PIN(2, 14, 38, 3, 52, 1), + MX31_PIN_CSI_D15 = _MXC_BUILD_GPIO_PIN(2, 15, 38, 2, 52, 0), + MX31_PIN_CSI_MCLK = _MXC_BUILD_GPIO_PIN(2, 16, 38, 1, 51, 2), + MX31_PIN_CSI_VSYNC = _MXC_BUILD_GPIO_PIN(2, 17, 38, 0, 51, 1), + MX31_PIN_CSI_D10 = _MXC_BUILD_GPIO_PIN(2, 10, 39, 3, 53, 2), + MX31_PIN_CSI_D11 = _MXC_BUILD_GPIO_PIN(2, 11, 39, 2, 53, 1), + MX31_PIN_CSI_D12 = _MXC_BUILD_GPIO_PIN(2, 12, 39, 1, 53, 0), + MX31_PIN_CSI_D13 = _MXC_BUILD_GPIO_PIN(2, 13, 39, 0, 52, 2), + MX31_PIN_CSI_D6 = _MXC_BUILD_GPIO_PIN(2, 6, 40, 3, 55, 0), + MX31_PIN_CSI_D7 = _MXC_BUILD_GPIO_PIN(2, 7, 40, 2, 54, 2), + MX31_PIN_CSI_D8 = _MXC_BUILD_GPIO_PIN(2, 8, 40, 1, 54, 1), + MX31_PIN_CSI_D9 = _MXC_BUILD_GPIO_PIN(2, 9, 40, 0, 54, 0), + MX31_PIN_M_REQUEST = _MXC_BUILD_NON_GPIO_PIN(41, 3, 56, 1), + MX31_PIN_M_GRANT = _MXC_BUILD_NON_GPIO_PIN(41, 2, 56, 0), + MX31_PIN_CSI_D4 = _MXC_BUILD_GPIO_PIN(2, 4, 41, 1, 55, 2), + MX31_PIN_CSI_D5 = _MXC_BUILD_GPIO_PIN(2, 5, 41, 0, 55, 1), + MX31_PIN_PC_RST = _MXC_BUILD_NON_GPIO_PIN(42, 3, 57, 2), + MX31_PIN_IOIS16 = _MXC_BUILD_NON_GPIO_PIN(42, 2, 57, 1), + MX31_PIN_PC_RW_B = _MXC_BUILD_NON_GPIO_PIN(42, 1, 57, 0), + MX31_PIN_PC_POE = _MXC_BUILD_NON_GPIO_PIN(42, 0, 56, 2), + MX31_PIN_PC_VS1 = _MXC_BUILD_NON_GPIO_PIN(43, 3, 59, 0), + MX31_PIN_PC_VS2 = _MXC_BUILD_NON_GPIO_PIN(43, 2, 58, 2), + MX31_PIN_PC_BVD1 = _MXC_BUILD_NON_GPIO_PIN(43, 1, 58, 1), + MX31_PIN_PC_BVD2 = _MXC_BUILD_NON_GPIO_PIN(43, 0, 58, 0), + MX31_PIN_PC_CD2_B = _MXC_BUILD_NON_GPIO_PIN(44, 3, 60, 1), + MX31_PIN_PC_WAIT_B = _MXC_BUILD_NON_GPIO_PIN(44, 2, 60, 0), + MX31_PIN_PC_READY = _MXC_BUILD_NON_GPIO_PIN(44, 1, 59, 2), + MX31_PIN_PC_PWRON = _MXC_BUILD_NON_GPIO_PIN(44, 0, 59, 1), + MX31_PIN_D2 = _MXC_BUILD_NON_GPIO_PIN(45, 3, 61, 2), + MX31_PIN_D1 = _MXC_BUILD_NON_GPIO_PIN(45, 2, 61, 1), + MX31_PIN_D0 = _MXC_BUILD_NON_GPIO_PIN(45, 1, 61, 0), + MX31_PIN_PC_CD1_B = _MXC_BUILD_NON_GPIO_PIN(45, 0, 60, 2), + MX31_PIN_D6 = _MXC_BUILD_NON_GPIO_PIN(46, 3, 63, 0), + MX31_PIN_D5 = _MXC_BUILD_NON_GPIO_PIN(46, 2, 62, 2), + MX31_PIN_D4 = _MXC_BUILD_NON_GPIO_PIN(46, 1, 62, 1), + MX31_PIN_D3 = _MXC_BUILD_NON_GPIO_PIN(46, 0, 62, 0), + MX31_PIN_D10 = _MXC_BUILD_NON_GPIO_PIN(47, 3, 64, 1), + MX31_PIN_D9 = _MXC_BUILD_NON_GPIO_PIN(47, 2, 64, 0), + MX31_PIN_D8 = _MXC_BUILD_NON_GPIO_PIN(47, 1, 63, 2), + MX31_PIN_D7 = _MXC_BUILD_NON_GPIO_PIN(47, 0, 63, 1), + MX31_PIN_D14 = _MXC_BUILD_NON_GPIO_PIN(48, 3, 65, 2), + MX31_PIN_D13 = _MXC_BUILD_NON_GPIO_PIN(48, 2, 65, 1), + MX31_PIN_D12 = _MXC_BUILD_NON_GPIO_PIN(48, 1, 65, 0), + MX31_PIN_D11 = _MXC_BUILD_NON_GPIO_PIN(48, 0, 64, 2), + MX31_PIN_NFWP_B = _MXC_BUILD_GPIO_PIN(0, 14, 49, 3, 67, 0), + MX31_PIN_NFCE_B = _MXC_BUILD_GPIO_PIN(0, 15, 49, 2, 66, 2), + MX31_PIN_NFRB = _MXC_BUILD_GPIO_PIN(0, 16, 49, 1, 66, 1), + MX31_PIN_D15 = _MXC_BUILD_NON_GPIO_PIN(49, 0, 66, 0), + MX31_PIN_NFWE_B = _MXC_BUILD_GPIO_PIN(0, 10, 50, 3, 68, 1), + MX31_PIN_NFRE_B = _MXC_BUILD_GPIO_PIN(0, 11, 50, 2, 68, 0), + MX31_PIN_NFALE = _MXC_BUILD_GPIO_PIN(0, 12, 50, 1, 67, 2), + MX31_PIN_NFCLE = _MXC_BUILD_GPIO_PIN(0, 13, 50, 0, 67, 1), + MX31_PIN_SDQS0 = _MXC_BUILD_NON_GPIO_PIN(51, 3, 69, 2), + MX31_PIN_SDQS1 = _MXC_BUILD_NON_GPIO_PIN(51, 2, 69, 1), + MX31_PIN_SDQS2 = _MXC_BUILD_NON_GPIO_PIN(51, 1, 69, 0), + MX31_PIN_SDQS3 = _MXC_BUILD_NON_GPIO_PIN(51, 0, 68, 2), + MX31_PIN_SDCKE0 = _MXC_BUILD_NON_GPIO_PIN(52, 3, 71, 0), + MX31_PIN_SDCKE1 = _MXC_BUILD_NON_GPIO_PIN(52, 2, 70, 2), + MX31_PIN_SDCLK = _MXC_BUILD_NON_GPIO_PIN(52, 1, 70, 1), + MX31_PIN_SDCLK_B = _MXC_BUILD_NON_GPIO_PIN(52, 0, 70, 0), + MX31_PIN_RW = _MXC_BUILD_NON_GPIO_PIN(53, 3, 72, 1), + MX31_PIN_RAS = _MXC_BUILD_NON_GPIO_PIN(53, 2, 72, 0), + MX31_PIN_CAS = _MXC_BUILD_NON_GPIO_PIN(53, 1, 71, 2), + MX31_PIN_SDWE = _MXC_BUILD_NON_GPIO_PIN(53, 0, 71, 1), + MX31_PIN_CS5 = _MXC_BUILD_NON_GPIO_PIN(54, 3, 73, 2), + MX31_PIN_ECB = _MXC_BUILD_NON_GPIO_PIN(54, 2, 73, 1), + MX31_PIN_LBA = _MXC_BUILD_NON_GPIO_PIN(54, 1, 73, 0), + MX31_PIN_BCLK = _MXC_BUILD_NON_GPIO_PIN(54, 0, 72, 2), + MX31_PIN_CS1 = _MXC_BUILD_NON_GPIO_PIN(55, 3, 75, 0), + MX31_PIN_CS2 = _MXC_BUILD_NON_GPIO_PIN(55, 2, 74, 2), + MX31_PIN_CS3 = _MXC_BUILD_NON_GPIO_PIN(55, 1, 74, 1), + MX31_PIN_CS4 = _MXC_BUILD_NON_GPIO_PIN(55, 0, 74, 0), + MX31_PIN_EB0 = _MXC_BUILD_NON_GPIO_PIN(56, 3, 76, 1), + MX31_PIN_EB1 = _MXC_BUILD_NON_GPIO_PIN(56, 2, 76, 0), + MX31_PIN_OE = _MXC_BUILD_NON_GPIO_PIN(56, 1, 75, 2), + MX31_PIN_CS0 = _MXC_BUILD_NON_GPIO_PIN(56, 0, 75, 1), + MX31_PIN_DQM0 = _MXC_BUILD_NON_GPIO_PIN(57, 3, 77, 2), + MX31_PIN_DQM1 = _MXC_BUILD_NON_GPIO_PIN(57, 2, 77, 1), + MX31_PIN_DQM2 = _MXC_BUILD_NON_GPIO_PIN(57, 1, 77, 0), + MX31_PIN_DQM3 = _MXC_BUILD_NON_GPIO_PIN(57, 0, 76, 2), + MX31_PIN_SD28 = _MXC_BUILD_NON_GPIO_PIN(58, 3, 79, 0), + MX31_PIN_SD29 = _MXC_BUILD_NON_GPIO_PIN(58, 2, 78, 2), + MX31_PIN_SD30 = _MXC_BUILD_NON_GPIO_PIN(58, 1, 78, 1), + MX31_PIN_SD31 = _MXC_BUILD_NON_GPIO_PIN(58, 0, 78, 0), + MX31_PIN_SD24 = _MXC_BUILD_NON_GPIO_PIN(59, 3, 80, 1), + MX31_PIN_SD25 = _MXC_BUILD_NON_GPIO_PIN(59, 2, 80, 0), + MX31_PIN_SD26 = _MXC_BUILD_NON_GPIO_PIN(59, 1, 79, 2), + MX31_PIN_SD27 = _MXC_BUILD_NON_GPIO_PIN(59, 0, 79, 1), + MX31_PIN_SD20 = _MXC_BUILD_NON_GPIO_PIN(60, 3, 81, 2), + MX31_PIN_SD21 = _MXC_BUILD_NON_GPIO_PIN(60, 2, 81, 1), + MX31_PIN_SD22 = _MXC_BUILD_NON_GPIO_PIN(60, 1, 81, 0), + MX31_PIN_SD23 = _MXC_BUILD_NON_GPIO_PIN(60, 0, 80, 2), + MX31_PIN_SD16 = _MXC_BUILD_NON_GPIO_PIN(61, 3, 83, 0), + MX31_PIN_SD17 = _MXC_BUILD_NON_GPIO_PIN(61, 2, 82, 2), + MX31_PIN_SD18 = _MXC_BUILD_NON_GPIO_PIN(61, 1, 82, 1), + MX31_PIN_SD19 = _MXC_BUILD_NON_GPIO_PIN(61, 0, 82, 0), + MX31_PIN_SD12 = _MXC_BUILD_NON_GPIO_PIN(62, 3, 84, 1), + MX31_PIN_SD13 = _MXC_BUILD_NON_GPIO_PIN(62, 2, 84, 0), + MX31_PIN_SD14 = _MXC_BUILD_NON_GPIO_PIN(62, 1, 83, 2), + MX31_PIN_SD15 = _MXC_BUILD_NON_GPIO_PIN(62, 0, 83, 1), + MX31_PIN_SD8 = _MXC_BUILD_NON_GPIO_PIN(63, 3, 85, 2), + MX31_PIN_SD9 = _MXC_BUILD_NON_GPIO_PIN(63, 2, 85, 1), + MX31_PIN_SD10 = _MXC_BUILD_NON_GPIO_PIN(63, 1, 85, 0), + MX31_PIN_SD11 = _MXC_BUILD_NON_GPIO_PIN(63, 0, 84, 2), + MX31_PIN_SD4 = _MXC_BUILD_NON_GPIO_PIN(64, 3, 87, 0), + MX31_PIN_SD5 = _MXC_BUILD_NON_GPIO_PIN(64, 2, 86, 2), + MX31_PIN_SD6 = _MXC_BUILD_NON_GPIO_PIN(64, 1, 86, 1), + MX31_PIN_SD7 = _MXC_BUILD_NON_GPIO_PIN(64, 0, 86, 0), + MX31_PIN_SD0 = _MXC_BUILD_NON_GPIO_PIN(65, 3, 88, 1), + MX31_PIN_SD1 = _MXC_BUILD_NON_GPIO_PIN(65, 2, 88, 0), + MX31_PIN_SD2 = _MXC_BUILD_NON_GPIO_PIN(65, 1, 87, 2), + MX31_PIN_SD3 = _MXC_BUILD_NON_GPIO_PIN(65, 0, 87, 1), + MX31_PIN_A24 = _MXC_BUILD_NON_GPIO_PIN(66, 3, 89, 2), + MX31_PIN_A25 = _MXC_BUILD_NON_GPIO_PIN(66, 2, 89, 1), + MX31_PIN_SDBA1 = _MXC_BUILD_NON_GPIO_PIN(66, 1, 89, 0), + MX31_PIN_SDBA0 = _MXC_BUILD_NON_GPIO_PIN(66, 0, 88, 2), + MX31_PIN_A20 = _MXC_BUILD_NON_GPIO_PIN(67, 3, 91, 0), + MX31_PIN_A21 = _MXC_BUILD_NON_GPIO_PIN(67, 2, 90, 2), + MX31_PIN_A22 = _MXC_BUILD_NON_GPIO_PIN(67, 1, 90, 1), + MX31_PIN_A23 = _MXC_BUILD_NON_GPIO_PIN(67, 0, 90, 0), + MX31_PIN_A16 = _MXC_BUILD_NON_GPIO_PIN(68, 3, 92, 1), + MX31_PIN_A17 = _MXC_BUILD_NON_GPIO_PIN(68, 2, 92, 0), + MX31_PIN_A18 = _MXC_BUILD_NON_GPIO_PIN(68, 1, 91, 2), + MX31_PIN_A19 = _MXC_BUILD_NON_GPIO_PIN(68, 0, 91, 1), + MX31_PIN_A12 = _MXC_BUILD_NON_GPIO_PIN(69, 3, 93, 2), + MX31_PIN_A13 = _MXC_BUILD_NON_GPIO_PIN(69, 2, 93, 1), + MX31_PIN_A14 = _MXC_BUILD_NON_GPIO_PIN(69, 1, 93, 0), + MX31_PIN_A15 = _MXC_BUILD_NON_GPIO_PIN(69, 0, 92, 2), + MX31_PIN_A9 = _MXC_BUILD_NON_GPIO_PIN(70, 3, 95, 0), + MX31_PIN_A10 = _MXC_BUILD_NON_GPIO_PIN(70, 2, 94, 2), + MX31_PIN_MA10 = _MXC_BUILD_NON_GPIO_PIN(70, 1, 94, 1), + MX31_PIN_A11 = _MXC_BUILD_NON_GPIO_PIN(70, 0, 94, 0), + MX31_PIN_A5 = _MXC_BUILD_NON_GPIO_PIN(71, 3, 96, 1), + MX31_PIN_A6 = _MXC_BUILD_NON_GPIO_PIN(71, 2, 96, 0), + MX31_PIN_A7 = _MXC_BUILD_NON_GPIO_PIN(71, 1, 95, 2), + MX31_PIN_A8 = _MXC_BUILD_NON_GPIO_PIN(71, 0, 95, 1), + MX31_PIN_A1 = _MXC_BUILD_NON_GPIO_PIN(72, 3, 97, 2), + MX31_PIN_A2 = _MXC_BUILD_NON_GPIO_PIN(72, 2, 97, 1), + MX31_PIN_A3 = _MXC_BUILD_NON_GPIO_PIN(72, 1, 97, 0), + MX31_PIN_A4 = _MXC_BUILD_NON_GPIO_PIN(72, 0, 96, 2), + MX31_PIN_DVFS1 = _MXC_BUILD_NON_GPIO_PIN(73, 3, 99, 0), + MX31_PIN_VPG0 = _MXC_BUILD_NON_GPIO_PIN(73, 2, 98, 2), + MX31_PIN_VPG1 = _MXC_BUILD_NON_GPIO_PIN(73, 1, 98, 1), + MX31_PIN_A0 = _MXC_BUILD_NON_GPIO_PIN(73, 0, 98, 0), + MX31_PIN_CKIL = _MXC_BUILD_NON_GPIO_PIN(74, 3, 100, 1), + MX31_PIN_POWER_FAIL = _MXC_BUILD_NON_GPIO_PIN(74, 2, 100, 0), + MX31_PIN_VSTBY = _MXC_BUILD_NON_GPIO_PIN(74, 1, 99, 2), + MX31_PIN_DVFS0 = _MXC_BUILD_NON_GPIO_PIN(74, 0, 99, 1), + MX31_PIN_BOOT_MODE1 = _MXC_BUILD_NON_GPIO_PIN(75, 3, 101, 2), + MX31_PIN_BOOT_MODE2 = _MXC_BUILD_NON_GPIO_PIN(75, 2, 101, 1), + MX31_PIN_BOOT_MODE3 = _MXC_BUILD_NON_GPIO_PIN(75, 1, 101, 0), + MX31_PIN_BOOT_MODE4 = _MXC_BUILD_NON_GPIO_PIN(75, 0, 100, 2), + MX31_PIN_RESET_IN_B = _MXC_BUILD_NON_GPIO_PIN(76, 3, 103, 0), + MX31_PIN_POR_B = _MXC_BUILD_NON_GPIO_PIN(76, 2, 102, 2), + MX31_PIN_CLKO = _MXC_BUILD_NON_GPIO_PIN(76, 1, 102, 1), + MX31_PIN_BOOT_MODE0 = _MXC_BUILD_NON_GPIO_PIN(76, 0, 102, 0), + MX31_PIN_STX0 = _MXC_BUILD_GPIO_PIN(1, 1, 77, 3, 104, 1), + MX31_PIN_SRX0 = _MXC_BUILD_GPIO_PIN(1, 2, 77, 2, 104, 0), + MX31_PIN_SIMPD0 = _MXC_BUILD_GPIO_PIN(1, 3, 77, 1, 103, 2), + MX31_PIN_CKIH = _MXC_BUILD_NON_GPIO_PIN(77, 0, 103, 1), + MX31_PIN_GPIO3_1 = _MXC_BUILD_GPIO_PIN(2, 1, 78, 3, 105, 2), + MX31_PIN_SCLK0 = _MXC_BUILD_GPIO_PIN(2, 2, 78, 2, 105, 1), + MX31_PIN_SRST0 = _MXC_BUILD_GPIO_PIN(2, 3, 78, 1, 105, 0), + MX31_PIN_SVEN0 = _MXC_BUILD_GPIO_PIN(1, 0, 78, 0, 104, 2), + MX31_PIN_GPIO1_4 = _MXC_BUILD_GPIO_PIN(0, 4, 79, 3, 107, 0), + MX31_PIN_GPIO1_5 = _MXC_BUILD_GPIO_PIN(0, 5, 79, 2, 106, 2), + MX31_PIN_GPIO1_6 = _MXC_BUILD_GPIO_PIN(0, 6, 79, 1, 106, 1), + MX31_PIN_GPIO3_0 = _MXC_BUILD_GPIO_PIN(2, 0, 79, 0, 106, 0), + MX31_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 80, 3, 108, 1), + MX31_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 80, 2, 108, 0), + MX31_PIN_GPIO1_2 = _MXC_BUILD_GPIO_PIN(0, 2, 80, 1, 107, 2), + MX31_PIN_GPIO1_3 = _MXC_BUILD_GPIO_PIN(0, 3, 80, 0, 107, 1), + MX31_PIN_CAPTURE = _MXC_BUILD_GPIO_PIN(0, 7, 81, 3, 109, 2), + MX31_PIN_COMPARE = _MXC_BUILD_GPIO_PIN(0, 8, 81, 2, 109, 1), + MX31_PIN_WATCHDOG_RST = _MXC_BUILD_NON_GPIO_PIN(81, 1, 109, 0), + MX31_PIN_PWMO = _MXC_BUILD_GPIO_PIN(0, 9, 81, 0, 108, 2), +}; + +#endif +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx31ads.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx31ads.c @@ -1,7 +1,7 @@ /* * Copyright (C) 2000 Deep Blue Solutions Ltd * Copyright (C) 2002 Shane Nay (shane@minirl.com) - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,19 +23,30 @@ #include #include #include +#include +#include +#include +#include +#include #include #include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include + +#include +#endif #include #include #include +#include #include #include #include #include -#include -#include -#include #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 #include @@ -43,8 +54,13 @@ #include #endif -#include "devices.h" - +#include +#include +#include + +#include "board-mx31ads.h" +#include "crm_regs.h" +#include "iomux.h" /*! * @file mx31ads.c * @@ -53,6 +69,95 @@ * @ingroup System */ +extern void mx31ads_gpio_init(void) __init; + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_CS89x0) || defined(CONFIG_CS89x0_MODULE) +/*! Null terminated portlist used to probe for the CS8900A device on ISA Bus + * Add 3 to reset the page window before probing (fixes eth probe when deployed + * using nand_boot) + */ +unsigned int netcard_portlist[] = { (u32)CS8900A_BASE_ADDRESS + 3, 0 }; + +EXPORT_SYMBOL(netcard_portlist); +/*! + * The CS8900A has 4 IRQ pins, which is software selectable, CS8900A interrupt + * pin 0 is used for interrupt generation. + */ +unsigned int cs8900_irq_map[] = { CS8900AIRQ, 0, 0, 0 }; + +EXPORT_SYMBOL(cs8900_irq_map); +#endif + +#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE) + +/* Keypad keycodes for the EVB 8x8 + * keypad. POWER and PTT keys don't generate + * any interrupts via this driver so they are + * not support. Change any keys as u like! + */ +static u16 keymapping[64] = { + KEY_SELECT, KEY_LEFT, KEY_DOWN, KEY_RIGHT, + KEY_UP, KEY_F12, KEY_END, KEY_BACK, + KEY_F1, KEY_SENDFILE, KEY_HOME, KEY_F6, + KEY_VOLUMEUP, KEY_F8, KEY_F9, KEY_F10, + KEY_3, KEY_2, KEY_1, KEY_4, + KEY_VOLUMEDOWN, KEY_7, KEY_5, KEY_6, + KEY_9, KEY_LEFTSHIFT, KEY_8, KEY_0, + KEY_KPASTERISK, KEY_RECORD, KEY_Q, KEY_W, + KEY_A, KEY_S, KEY_D, KEY_E, + KEY_F, KEY_R, KEY_T, KEY_Y, + KEY_TAB, KEY_F7, KEY_CAPSLOCK, KEY_Z, + KEY_X, KEY_C, KEY_V, KEY_G, + KEY_B, KEY_H, KEY_N, KEY_M, + KEY_J, KEY_K, KEY_U, KEY_I, + KEY_SPACE, KEY_F2, KEY_DOT, KEY_ENTER, + KEY_L, KEY_BACKSPACE, KEY_P, KEY_O, +}; + +static struct resource mxc_kpp_resources[] = { + [0] = { + .start = MXC_INT_KPP, + .end = MXC_INT_KPP, + .flags = IORESOURCE_IRQ, + } +}; + +static struct keypad_data evb_8_by_8_keypad = { + .rowmax = 8, + .colmax = 8, + .irq = MXC_INT_KPP, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +/* mxc keypad driver */ +static struct platform_device mxc_keypad_device = { + .name = "mxc_keypad", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_kpp_resources), + .resource = mxc_kpp_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &evb_8_by_8_keypad, + }, +}; + +static void mxc_init_keypad(void) +{ + (void)platform_device_register(&mxc_keypad_device); +} +#else +static inline void mxc_init_keypad(void) +{ +} +#endif + #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) /*! * The serial port definition structure. @@ -96,29 +201,470 @@ return 0; } #endif +/* MTD NOR flash */ + +#if defined(CONFIG_MTD_MXC) || defined(CONFIG_MTD_MXC_MODULE) + +static struct mtd_partition mxc_nor_partitions[] = { + { + .name = "Bootloader", + .size = 512 * 1024, + .offset = 0x00000000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "nor.Kernel", + .size = 2 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = 0}, + { + .name = "nor.userfs", + .size = 14 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = 0}, + { + .name = "nor.rootfs", + .size = 12 * 1024 * 1024, + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE}, + { + .name = "FIS directory", + .size = 12 * 1024, + .offset = 0x01FE0000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, + { + .name = "Redboot config", + .size = MTDPART_SIZ_FULL, + .offset = 0x01FFF000, + .mask_flags = MTD_WRITEABLE /* force read-only */ + }, +}; + +static struct flash_platform_data mxc_flash_data = { + .map_name = "cfi_probe", + .width = 2, + .parts = mxc_nor_partitions, + .nr_parts = ARRAY_SIZE(mxc_nor_partitions), +}; + +static struct resource mxc_flash_resource = { + .start = 0xa0000000, + .end = 0xa0000000 + 0x02000000 - 1, + .flags = IORESOURCE_MEM, + +}; + +static struct platform_device mxc_nor_mtd_device = { + .name = "mxc_nor_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_flash_data, + }, + .num_resources = 1, + .resource = &mxc_flash_resource, +}; + +static void mxc_init_nor_mtd(void) +{ + (void)platform_device_register(&mxc_nor_mtd_device); +} +#else +static void mxc_init_nor_mtd(void) +{ +} +#endif + +/* NAND Flash Partitions */ +#ifdef CONFIG_MTD_PARTITIONS + +static struct mtd_partition nand_flash_partitions[4] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 22 * 1024 * 1024}, + { + .name = "nand.userfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +#endif + +/* MTD NAND flash */ + +#if defined(CONFIG_MTD_NAND_MXC) \ + || defined(CONFIG_MTD_NAND_MXC_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V2) \ + || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) + +static struct flash_platform_data mxc_nand_data = { + #ifdef CONFIG_MTD_PARTITIONS + .parts = nand_flash_partitions, + .nr_parts = ARRAY_SIZE(nand_flash_partitions), + #endif + .width = 1, +}; + +static struct platform_device mxc_nand_mtd_device = { + .name = "mxc_nand_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static struct platform_device mxc_nandv2_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ + if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) { + mxc_nand_data.width = 2; + } + if (cpu_is_mx31()) { + (void)platform_device_register(&mxc_nand_mtd_device); + } + if (cpu_is_mx32()) { + (void)platform_device_register(&mxc_nandv2_mtd_device); + } +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +/* i.MX MTD NAND Flash Controller */ + +#if defined(CONFIG_MTD_NAND_IMX_NFC) || defined(CONFIG_MTD_NAND_IMX_NFC_MODULE) + +/* Resources for this device. */ + +static struct resource imx_nfc_resources[] = { + { + .flags = IORESOURCE_MEM, + .start = NFC_BASE_ADDR + 0x000, + .end = NFC_BASE_ADDR + 0x840 - 1, + .name = IMX_NFC_BUFFERS_ADDR_RES_NAME, + }, + { + .flags = IORESOURCE_MEM, + .start = NFC_BASE_ADDR + 0xE00, + .end = NFC_BASE_ADDR + 0xE20 - 1, + .name = IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME, + }, + { + .flags = IORESOURCE_IRQ, + .start = MXC_INT_NANDFC, + .end = MXC_INT_NANDFC, + .name = IMX_NFC_INTERRUPT_RES_NAME, + }, +}; + +/** + * imx_nfc_set_page_size() - Tells the hardware the page size. + * + * @data_size_in_bytes: The page size in bytes (e.g., 512, 2048, etc.). This + * size refers specifically to the the data bytes in the + * page, *not* including out-of-band bytes. The return + * value is zero if the operation succeeded. Do not + * interpret a non-zero value as an error code - it only + * indicates failure. The driver will decide what error + * code to return to its caller. + */ +static int imx_nfc_set_page_size(unsigned int data_size_in_bytes) +{ + + unsigned long x = __raw_readl(MXC_CCM_RCSR); + + switch (data_size_in_bytes) { + + case 512: + x &= ~MXC_CCM_RCSR_NFMS; + break; + + case 2048: + x |= MXC_CCM_RCSR_NFMS; + break; + + default: + return !0; + break; + + } + + __raw_writel(x, MXC_CCM_RCSR); + + return 0; + +} + +/* + * Platform-specific information about this device. Some of the details depend + * on the SoC. See imx_init_nfc() below for code that fills in the rest. + */ -#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) -static struct imxuart_platform_data uart_pdata = { - .flags = IMXUART_HAVE_RTSCTS, +static struct imx_nfc_platform_data imx_nfc_platform_data = { + .force_ce = false, + .target_cycle_in_ns = 50, + .clock_name = "nfc_clk", + .set_page_size = imx_nfc_set_page_size, + .interleave = false, + #ifdef CONFIG_MTD_PARTITIONS + .partitions = nand_flash_partitions, + .partition_count = ARRAY_SIZE(nand_flash_partitions), + #endif +}; + +/* The structure that represents the NFC device. */ + +static struct platform_device imx_nfc_device = { + .name = IMX_NFC_DRIVER_NAME, + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &imx_nfc_platform_data, + }, + .resource = imx_nfc_resources, + .num_resources = ARRAY_SIZE(imx_nfc_resources), }; -static unsigned int uart_pins[] = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1 +/** + * imx_init_nfc() - Sets up the NFC for this platform. + * + * This function sets up data structures representing the NFC device on this + * platform and registers the device with the platform management system. + */ + +static void imx_nfc_init(void) +{ + + /* + * A field in the Reset Control and Source Register register tells us + * the bus width. + */ + + if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) + imx_nfc_platform_data.bus_width_in_bits = 16; + else + imx_nfc_platform_data.bus_width_in_bits = 8; + + /* + * Discover the type of SoC we're running on and, based on that, fill in + * some details about the NFC. + */ + + if (cpu_is_mx31()) { + imx_nfc_platform_data.major_version = 1; + imx_nfc_platform_data.minor_version = 0; + } else if (cpu_is_mx32()) { + imx_nfc_platform_data.major_version = 2; + imx_nfc_platform_data.minor_version = 0; + } else { + pr_err("imx_nfc: Can't identify the SoC\n"); + BUG(); + } + + /* Register the NFC device. */ + + (void)platform_device_register(&imx_nfc_device); + +} + +#else + +static inline void imx_nfc_init(void) +{ +} + +#endif /* i.MX MTD NAND Flash Controller */ + +static struct spi_board_info mxc_spi_board_info[] __initdata = { + { + .modalias = "pmic_spi", + .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), + .max_speed_hz = 4000000, + .bus_num = 2, + .chip_select = 0, + }, +}; + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static const char fb_default_mode[] = "Sharp-QVGA"; + +/* mxc lcd driver */ +static struct platform_device mxc_fb_device = { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &fb_default_mode, + .coherent_dma_mask = 0xFFFFFFFF, + }, }; -static inline void mxc_init_imx_uart(void) +static void mxc_init_fb(void) { - mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); - mxc_register_device(&mxc_uart_device0, &uart_pdata); + (void)platform_device_register(&mxc_fb_device); } -#else /* !SERIAL_IMX */ -static inline void mxc_init_imx_uart(void) +#else +static inline void mxc_init_fb(void) { } -#endif /* !SERIAL_IMX */ +#endif + +#if defined(CONFIG_BACKLIGHT_MXC) +static struct platform_device mxcbl_devices[] = { +#if defined(CONFIG_BACKLIGHT_MXC_PMIC) || defined(CONFIG_BACKLIGHT_MXC_PMIC_MODULE) + { + .name = "mxc_pmic_bl", + .id = 0, + .dev = { + .platform_data = (void *)-1, /* DISP # for this backlight */ + }, + }, + { + .name = "mxc_pmic_bl", + .id = 1, + .dev = { + .platform_data = (void *)0, /* DISP # for this backlight */ + }, + }, +#endif +#if defined(CONFIG_BACKLIGHT_MXC_IPU) || defined(CONFIG_BACKLIGHT_MXC_IPU_MODULE) + { + .name = "mxc_ipu_bl", + .id = 0, + .dev = { + .platform_data = (void *)3, /* DISP # for this backlight */ + }, + }, +#endif +}; +static inline void mxc_init_bl(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(mxcbl_devices); i++) { + platform_device_register(&mxcbl_devices[i]); + } +} +#else +static inline void mxc_init_bl(void) +{ +} +#endif + +/*! + * Data structures and data for mt9v111 camera. + */ +static struct mxc_camera_platform_data camera_mt9v111_data = { + .mclk = 27000000, +}; + +/*! + * Data structures and data for ov2640 camera. + */ +static struct mxc_camera_platform_data camera_ov2640_data = { + .core_regulator = NULL, + .io_regulator = NULL, + .analog_regulator = NULL, + .gpo_regulator = NULL, + .mclk = 24000000, +}; + +/*! + * Info to register i2c devices. + */ +static struct i2c_board_info mxc_i2c_info[] __initdata = { + { + .type = "mt9v111", + .addr = 0x48, + .platform_data = (void *)&camera_mt9v111_data, + }, + { + .type = "ov2640", + .addr = 0x30, + .platform_data = (void *)&camera_ov2640_data, + }, +}; + +#if defined(CONFIG_MXC_FIR) || defined(CONFIG_MXC_FIR_MODULE) +/*! + * Resource definition for the FIR + */ +static struct resource mxcir_resources[] = { + [0] = { + .start = UART2_BASE_ADDR, + .end = UART2_BASE_ADDR + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_UART2, + .end = MXC_INT_UART2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = FIRI_BASE_ADDR, + .end = FIRI_BASE_ADDR + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [3] = { + .start = MXC_INT_FIRI, + .end = MXC_INT_FIRI, + .flags = IORESOURCE_IRQ, + }, + [4] = { + .start = MXC_INT_UART2, + .end = MXC_INT_UART2, + .flags = IORESOURCE_IRQ, + } +}; + +static struct mxc_ir_platform_data ir_data = { + .uart_ir_mux = 1, + .ir_rx_invert = MXC_IRDA_RX_INV, + .ir_tx_invert = MXC_IRDA_TX_INV, +}; + +/*! Device Definition for MXC FIR */ +static struct platform_device mxcir_device = { + .name = "mxcir", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &ir_data, + }, + .num_resources = ARRAY_SIZE(mxcir_resources), + .resource = mxcir_resources, +}; + +static inline void mxc_init_ir(void) +{ + ir_data.uart_clk = clk_get(NULL, "uart_clk.1");; + (void)platform_device_register(&mxcir_device); +} +#else +static inline void mxc_init_ir(void) +{ +} +#endif static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc) { @@ -187,7 +733,10 @@ /* * Configure INT line as GPIO input */ - mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); + mxc_request_iomux(MX31_PIN_GPIO1_4, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_4), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_4)); /* disable the interrupt and clear the status */ __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); @@ -462,6 +1011,121 @@ }; #endif +/* MMC device data */ + +#if defined(CONFIG_MMC_MXC) || defined(CONFIG_MMC_MXC_MODULE) +extern unsigned int sdhc_get_card_det_status(struct device *dev); +extern int sdhc_init_card_det(int id); + +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30, + .min_clk = 150000, + .max_clk = 25000000, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .power_mmc = "VMMC1", +}; +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30, + .min_clk = 150000, + .max_clk = 25000000, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .power_mmc = "VMMC2", +}; +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC1, + .end = MXC_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! + * Resource definition for the SDHC2 + */ +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxcmci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +/*! Device Definition for MXC SDHC2 */ +static struct platform_device mxcsdhc2_device = { + .name = "mxcmci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; + +static inline void mxc_init_mmc(void) +{ + int cd_irq; + + cd_irq = sdhc_init_card_det(0); + if (cd_irq) { + mxcsdhc1_device.resource[2].start = cd_irq; + mxcsdhc1_device.resource[2].end = cd_irq; + } + + cd_irq = sdhc_init_card_det(1); + if (cd_irq) { + mxcsdhc2_device.resource[2].start = cd_irq; + mxcsdhc2_device.resource[2].end = cd_irq; + } + + spba_take_ownership(SPBA_SDHC1, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc1_device); + spba_take_ownership(SPBA_SDHC2, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc2_device); +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + #if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE) static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 @@ -489,6 +1153,147 @@ } #endif +#if (defined(CONFIG_MXC_PMIC_MC13783) || \ + defined(CONFIG_MXC_PMIC_MC13783_MODULE)) \ + && (defined(CONFIG_SND_MXC_PMIC) || defined(CONFIG_SND_MXC_PMIC_MODULE)) +extern void gpio_activate_audio_ports(void); + +static void __init mxc_init_pmic_audio(void) +{ + struct clk *ckih_clk; + struct clk *cko_clk; + + /* Enable 26 mhz clock on CKO1 for PMIC audio */ + ckih_clk = clk_get(NULL, "ckih"); + cko_clk = clk_get(NULL, "cko1_clk"); + if (IS_ERR(ckih_clk) || IS_ERR(cko_clk)) { + printk(KERN_ERR "Unable to set CKO1 output to CKIH\n"); + } else { + clk_set_parent(cko_clk, ckih_clk); + clk_set_rate(cko_clk, clk_get_rate(ckih_clk)); + clk_enable(cko_clk); + } + clk_put(ckih_clk); + clk_put(cko_clk); + + gpio_activate_audio_ports(); +} +#else +static void __inline mxc_init_pmic_audio(void) +{ +} +#endif + +/* IDE device data */ +#if defined(CONFIG_BLK_DEV_IDE_MXC) || defined(CONFIG_BLK_DEV_IDE_MXC_MODULE) + +/*! Platform Data for MXC IDE */ +static struct mxc_ide_platform_data mxc_ide_data = { + .power_drive = NULL, + .power_io = NULL, +}; + +static struct platform_device mxc_ide_device = { + .name = "mxc_ide", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ide_data, + }, +}; + +static inline void mxc_init_ide(void) +{ + if (platform_device_register(&mxc_ide_device) < 0) + printk(KERN_ERR "Error: Registering the ide.\n"); +} +#else +static inline void mxc_init_ide(void) +{ +} +#endif + +#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE) +extern void gpio_ata_active(void); +extern void gpio_ata_inactive(void); + +static int ata_init(struct platform_device *pdev) +{ + /* Configure the pins */ + gpio_ata_active(); + + return 0; +} + +static void ata_exit(void) +{ + /* Free the pins */ + gpio_ata_inactive(); +} + +static struct fsl_ata_platform_data ata_data = { + .udma_mask = ATA_UDMA3, /* board can handle up to UDMA3 */ + .mwdma_mask = ATA_MWDMA2, + .pio_mask = ATA_PIO4, + .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2, + .max_sg = MXC_IDE_DMA_BD_NR, + .init = ata_init, + .exit = ata_exit, + .core_reg = NULL, /*"LDO2", */ + .io_reg = NULL, /*"LDO3", */ +}; + +static struct resource pata_fsl_resources[] = { + [0] = { /* I/O */ + .start = ATA_BASE_ADDR + 0x00, + .end = ATA_BASE_ADDR + 0xD8, + .flags = IORESOURCE_MEM, + }, + [2] = { /* IRQ */ + .start = MXC_INT_ATA, + .end = MXC_INT_ATA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pata_fsl_device = { + .name = "pata_fsl", + .id = -1, + .num_resources = ARRAY_SIZE(pata_fsl_resources), + .resource = pata_fsl_resources, + .dev = { + .platform_data = &ata_data, + .coherent_dma_mask = ~0, + }, +}; + +static void __init mxc_init_pata(void) +{ + (void)platform_device_register(&pata_fsl_device); +} +#else /* CONFIG_PATA_FSL */ +static void __init mxc_init_pata(void) +{ +} +#endif /* CONFIG_PATA_FSL */ + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); +} + /*! * This structure defines static mappings for the i.MX31ADS board. */ @@ -526,20 +1331,126 @@ */ static void __init mxc_board_init(void) { + mxc_cpu_common_init(); + early_console_setup(saved_command_line); + mxc_init_devices(); + mxc_init_pmic_audio(); + mxc_register_gpios(); + mx31ads_gpio_init(); + mxc_init_keypad(); mxc_init_extuart(); - mxc_init_imx_uart(); mxc_init_i2c(); + mxc_init_nor_mtd(); + mxc_init_nand_mtd(); + imx_nfc_init(); + + i2c_register_board_info(0, mxc_i2c_info, ARRAY_SIZE(mxc_i2c_info)); + spi_register_board_info(mxc_spi_board_info, + ARRAY_SIZE(mxc_spi_board_info)); + + mxc_init_fb(); + mxc_init_bl(); + mxc_init_ir(); + mxc_init_mmc(); + mxc_init_ide(); + mxc_init_pata(); } static void __init mx31ads_timer_init(void) { - mx31_clocks_init(26000000); + unsigned long ckih = 26000000; + + if ((__raw_readw(PBC_BASE_ADDRESS + PBC_BSTAT) & + CKIH_27MHZ_BIT_SET) != 0) { + ckih = 27000000; + } + + mx31_clocks_init(ckih); } static struct sys_timer mx31ads_timer = { .init = mx31ads_timer_init, }; + +#define PLL_PCTL_REG(pd, mfd, mfi, mfn) \ + ((((pd) - 1) << 26) + (((mfd) - 1) << 16) + ((mfi) << 10) + mfn) + +/* For 26MHz input clock */ +#define PLL_532MHZ PLL_PCTL_REG(1, 13, 10, 3) +#define PLL_399MHZ PLL_PCTL_REG(1, 52, 7, 35) +#define PLL_133MHZ PLL_PCTL_REG(2, 26, 5, 3) + +/* For 27MHz input clock */ +#define PLL_532_8MHZ PLL_PCTL_REG(1, 15, 9, 13) +#define PLL_399_6MHZ PLL_PCTL_REG(1, 18, 7, 7) +#define PLL_133_2MHZ PLL_PCTL_REG(3, 5, 7, 2) + +#define PDR0_REG(mcu, max, hsp, ipg, nfc) \ + (MXC_CCM_PDR0_MCU_DIV_##mcu | MXC_CCM_PDR0_MAX_DIV_##max | \ + MXC_CCM_PDR0_HSP_DIV_##hsp | MXC_CCM_PDR0_IPG_DIV_##ipg | \ + MXC_CCM_PDR0_NFC_DIV_##nfc) + +/* working point(wp): 0 - 133MHz; 1 - 266MHz; 2 - 399MHz; 3 - 532MHz */ +/* 26MHz input clock table */ +static struct cpu_wp cpu_wp_26[] = { + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 133000000, + .pdr0_reg = PDR0_REG(4, 4, 4, 2, 6),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 266000000, + .pdr0_reg = PDR0_REG(2, 4, 4, 2, 6),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 399000000, + .pdr0_reg = PDR0_REG(1, 3, 3, 2, 6),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 532000000, + .pdr0_reg = PDR0_REG(1, 4, 4, 2, 6),}, +}; + +/* 27MHz input clock table */ +static struct cpu_wp cpu_wp_27[] = { + { + .pll_reg = PLL_532_8MHZ, + .pll_rate = 532800000, + .cpu_rate = 133200000, + .pdr0_reg = PDR0_REG(4, 4, 4, 2, 6),}, + { + .pll_reg = PLL_532_8MHZ, + .pll_rate = 532800000, + .cpu_rate = 266400000, + .pdr0_reg = PDR0_REG(2, 4, 4, 2, 6),}, + { + .pll_reg = PLL_399_6MHZ, + .pll_rate = 399600000, + .cpu_rate = 399600000, + .pdr0_reg = PDR0_REG(1, 3, 3, 2, 6),}, + { + .pll_reg = PLL_532_8MHZ, + .pll_rate = 532800000, + .cpu_rate = 532800000, + .pdr0_reg = PDR0_REG(1, 4, 4, 2, 6),}, +}; + +struct cpu_wp *get_cpu_wp(int *wp) +{ + *wp = 4; + if ((__raw_readw(PBC_BASE_ADDRESS + PBC_BSTAT) & + CKIH_27MHZ_BIT_SET) != 0) { + return cpu_wp_27; + } else { + return cpu_wp_26; + } +} + /* * The following uses standard kernel macros defined in arch.h in order to * initialize __mach_desc_MX31ADS data structure. @@ -549,6 +1460,7 @@ .phys_io = AIPS1_BASE_ADDR, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq, .init_machine = mxc_board_init, --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/dptc.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/dptc.c @@ -0,0 +1,103 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dptc.c + * + * @brief DPTC table for the Freescale Semiconductor MXC DPTC module. + * + * @ingroup PM + */ + +#include +#include + +struct dptc_wp dptc_wp_allfreq_26ckih[DPTC_WP_SUPPORTED] = { + /* 532MHz */ + /* dcvr0 dcvr1 dcvr2 dcvr3 voltage */ + /* wp0 */ + {0xffc00000, 0x95c00000, 0xffc00000, 0xe5800000, 1625}, + {0xffc00000, 0x95e3e8e4, 0xffc00000, 0xe5b6fda0, 1600}, + {0xffc00000, 0x95e3e8e4, 0xffc00000, 0xe5b6fda0, 1575}, + {0xffc00000, 0x95e3e8e8, 0xffc00000, 0xe5f70da4, 1550}, + {0xffc00000, 0x9623f8e8, 0xffc00000, 0xe6371da8, 1525}, + /* wp5 */ + {0xffc00000, 0x966408f0, 0xffc00000, 0xe6b73db0, 1500}, + {0xffc00000, 0x96e428f4, 0xffc00000, 0xe7776dbc, 1475}, + {0xffc00000, 0x976448fc, 0xffc00000, 0xe8379dc8, 1450}, + {0xffc00000, 0x97e46904, 0xffc00000, 0xe977ddd8, 1425}, + {0xffc00000, 0x98a48910, 0xffc00000, 0xeab81de8, 1400}, + /* wp10 */ + {0xffc00000, 0x9964b918, 0xffc00000, 0xebf86df8, 1375}, + {0xffc00000, 0xffe4e924, 0xffc00000, 0xfff8ae08, 1350}, + {0xffc00000, 0xffe5192c, 0xffc00000, 0xfff8fe1c, 1350}, + {0xffc00000, 0xffe54938, 0xffc00000, 0xfff95e2c, 1350}, + {0xffc00000, 0xffe57944, 0xffc00000, 0xfff9ae44, 1350}, + /* wp15 */ + {0xffc00000, 0xffe5b954, 0xffc00000, 0xfffa0e58, 1350}, + {0xffc00000, 0xffe5e960, 0xffc00000, 0xfffa6e70, 1350}, +}; + +struct dptc_wp dptc_wp_allfreq_26ckih_TO_2_0[DPTC_WP_SUPPORTED] = { + /* Mx31 TO 2.0 Offset table */ + /* 532MHz */ + /* dcvr0 dcvr1 dcvr2 dcvr3 voltage */ + /* wp0 */ + {0xffc00000, 0x9E265978, 0xffc00000, 0xE4371D9C, 1625}, + {0xffc00000, 0x9E665978, 0xffc00000, 0xE4772D9C, 1600}, + {0xffc00000, 0x9EA65978, 0xffc00000, 0xE4772DA0, 1575}, + {0xffc00000, 0x9EE66978, 0xffc00000, 0xE4B73DA0, 1550}, + {0xffc00000, 0x9F26697C, 0xffc00000, 0xE4F73DA0, 1525}, + /* wp5 */ + {0xffc00000, 0x9F66797C, 0xffc00000, 0xE5774DA4, 1500}, + {0xffc00000, 0x9FE6797C, 0xffc00000, 0xE5F75DA4, 1475}, + {0xffc00000, 0xA026897C, 0xffc00000, 0xE6776DA4, 1450}, + {0xffc00000, 0xA0A6897C, 0xffc00000, 0xE6F77DA8, 1425}, + {0xffc00000, 0xA0E69980, 0xffc00000, 0xE7B78DAC, 1400}, + /* wp10 */ + {0xffc00000, 0xA1669980, 0xffc00000, 0xE8379DAC, 1375}, + {0xffc00000, 0xA1A6A980, 0xffc00000, 0xE8F7ADB0, 1350}, + {0xffc00000, 0xA226B984, 0xffc00000, 0xE9F7CDB0, 1325}, + {0xffc00000, 0xA2A6C984, 0xffc00000, 0xEAB7DDB4, 1300}, + {0xffc00000, 0xA326C988, 0xffc00000, 0xEBB7FDB8, 1275}, + /* wp15 */ + {0xffc00000, 0xA3A6D988, 0xffc00000, 0xECB80DBC, 1250}, + {0xffc00000, 0xA426E988, 0xffc00000, 0xEDB82DC0, 1225}, +}; + +struct dptc_wp dptc_wp_allfreq_27ckih_TO_2_0[DPTC_WP_SUPPORTED] = { + /* Mx31 TO 2.0 Offset table */ + /* 532MHz */ + /* dcvr0 dcvr1 dcvr2 dcvr3 voltage */ + /* wp0 */ + {0xffc00000, 0x9864E920, 0xffc00000, 0xDBB50D1C, 1625}, + {0xffc00000, 0x98A4E920, 0xffc00000, 0xDBF51D1C, 1600}, + {0xffc00000, 0x98E4E920, 0xffc00000, 0xDBF51D20, 1575}, + {0xffc00000, 0x9924F920, 0xffc00000, 0xDC352D20, 1550}, + {0xffc00000, 0x9924F924, 0xffc00000, 0xDC752D20, 1525}, + /* wp5 */ + {0xffc00000, 0x99650924, 0xffc00000, 0xDCF53D24, 1500}, + {0xffc00000, 0x99E50924, 0xffc00000, 0xDD754D24, 1475}, + {0xffc00000, 0x9A251924, 0xffc00000, 0xDDF55D24, 1450}, + {0xffc00000, 0x9AA51924, 0xffc00000, 0xDE756D28, 1425}, + {0xffc00000, 0x9AE52928, 0xffc00000, 0xDF357D2C, 1400}, + /* wp10 */ + {0xffc00000, 0x9B652928, 0xffc00000, 0xDFB58D2C, 1375}, + {0xffc00000, 0x9BA53928, 0xffc00000, 0xE0759D30, 1350}, + {0xffc00000, 0x9C254928, 0xffc00000, 0xE135BD30, 1325}, + {0xffc00000, 0x9CA55928, 0xffc00000, 0xE1F5CD34, 1300}, + {0xffc00000, 0x9D25592C, 0xffc00000, 0xE2F5ED38, 1275}, + /* wp15 */ + {0xffc00000, 0x9DA5692C, 0xffc00000, 0xE3F5FD38, 1250}, + {0xffc00000, 0x9E25792C, 0xffc00000, 0xE4F61D3C, 1225}, +}; --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/Kconfig @@ -4,9 +4,17 @@ select ARCH_HAS_RNGA bool -config ARCH_MX35 +config MX3_OPTIONS bool - select ARCH_MXC_IOMUX_V3 + default y + select CPU_V6 + select ARM_ERRATA_364296 + select ARM_ERRATA_411920 + select CACHE_L2X0 + select OUTER_CACHE + select USB_ARCH_HAS_EHCI + select ARCH_HAS_EVTMON + select ARCH_HAS_RNGA comment "MX3 platforms:" @@ -81,7 +89,7 @@ config MACH_PCM043 bool "Support Phytec pcm043 (i.MX35) platforms" - select ARCH_MX35 +# select ARCH_MX35 help Include support for Phytec pcm043 platform. This includes specific configurations for the board and its peripherals. @@ -92,12 +100,72 @@ help Include support for Atmark Armadillo-500 platform. This includes specific configurations for the board and its peripherals. + Include support for Phytec pcm043 platform. This includes + specific configurations for the board and its peripherals. + +config MXC_SDMA_API + bool "Use SDMA API" + default y + help + This selects the Freescale MXC SDMA API. + If unsure, say N. + +menu "SDMA options" + depends on MXC_SDMA_API + +config SDMA_IRAM + bool "Use Internal RAM for SDMA transfer" + default n + help + Support Internal RAM as SDMA buffer or control structures + +config SDMA_IRAM_SIZE + hex "Reserved bytes of IRAM for SDMA (0x800-0x2000)" + range 0x800 0x2000 + depends on SDMA_IRAM + default "0x1000" + help + Set the size of IRAM for SDMA. It must be multiple of 512bytes. +endmenu + +config ARCH_MXC_HAS_NFC_V1 + bool "MXC NFC Hardware Version 1" + depends on !(MACH_MX31ADS && XIP_KERNEL) + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 1 + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V2 + bool "MXC NFC Hardware Version 2" + depends on !(MACH_MX31ADS && XIP_KERNEL) + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 2 + If unsure, say N. + +menu "Device options" + +config I2C_MXC_SELECT1 + bool "Enable I2C1 module" + default y + depends on I2C_MXC + help + Enable MX31 I2C1 module. -config MACH_MX35_3DS - bool "Support MX35PDK platform" - select ARCH_MX35 +config I2C_MXC_SELECT2 + bool "Enable I2C2 module" default n + depends on I2C_MXC help - Include support for MX35PDK platform. This includes specific - configurations for the board and its peripherals. + Enable MX31 I2C2 module. + +config I2C_MXC_SELECT3 + bool "Enable I2C3 module" + default n + depends on I2C_MXC + help + Enable MX31 I2C3 module. + +endmenu endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/dma.c @@ -0,0 +1,745 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +#include "serial.h" + +#define MXC_MMC_BUFFER_ACCESS 0x38 +#define MXC_SSI_TX0_REG 0x0 +#define MXC_SSI_TX1_REG 0x4 +#define MXC_SSI_RX0_REG 0x8 +#define MXC_SSI_RX1_REG 0xC +#define MXC_FIRI_TXFIFO 0x14 +#define MXC_SDHC_MMC_WML 16 +#define MXC_SDHC_SD_WML 64 +#define MXC_SSI_TXFIFO_WML 0x4 +#define MXC_SSI_RXFIFO_WML 0x6 +#define MXC_FIRI_WML 16 + +#ifdef CONFIG_SDMA_IRAM +#define trans_type int_2_per +#else +#define trans_type emi_2_per +#endif + +typedef struct mxc_sdma_info_entry_s { + mxc_dma_device_t device; + mxc_sdma_channel_params_t *chnl_info; +} mxc_sdma_info_entry_t; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_rx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_RXTL, + .per_address = UART1_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART1_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_tx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_TXTL, + .per_address = UART1_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART1_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_rx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_RXTL, + .per_address = UART2_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART2_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_tx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_TXTL, + .per_address = UART2_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART2_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_rx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_RXTL, + .per_address = UART3_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART3_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_tx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_TXTL, + .per_address = UART3_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART3_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart4_rx_params = { + .chnl_params = { + .watermark_level = UART4_UFCR_RXTL, + .per_address = UART4_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART4_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART4_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart4_tx_params = { + .chnl_params = { + .watermark_level = UART4_UFCR_TXTL, + .per_address = UART4_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART4_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART4_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart5_rx_params = { + .chnl_params = { + .watermark_level = UART5_UFCR_RXTL, + .per_address = UART5_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART5_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART5_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart5_tx_params = { + .chnl_params = { + .watermark_level = UART5_UFCR_TXTL, + .per_address = UART5_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART5_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART5_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = trans_type, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = trans_type, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = trans_type, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = trans_type, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = trans_type, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_fir_rx_params = { + .chnl_params = { + .watermark_level = MXC_FIRI_WML, + .per_address = FIRI_BASE_ADDR, + .peripheral_type = FIRI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_FIRI_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_FIR_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_fir_tx_params = { + .chnl_params = { + .watermark_level = MXC_FIRI_WML, + .per_address = FIRI_BASE_ADDR + MXC_FIRI_TXFIFO, + .peripheral_type = FIRI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_FIRI_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_FIR_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_memory_params = { + .chnl_params = { + .peripheral_type = MEMORY, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_fifo_memory_params = { + .chnl_params = { + .peripheral_type = FIFO_MEMORY, + .per_address = MXC_FIFO_MEM_DEST_FIXED, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + .event_id = 0, + }, + .channel_num = MXC_DMA_CHANNEL_FIFO_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_rx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR, + .peripheral_type = ATA, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_RX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_tx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR + 0x18, + .peripheral_type = ATA, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_TX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; +static mxc_sdma_info_entry_t mxc_sdma_active_dma_info[] = { + {MXC_DMA_UART1_RX, &mxc_sdma_uart1_rx_params}, + {MXC_DMA_UART1_TX, &mxc_sdma_uart1_tx_params}, + {MXC_DMA_UART2_RX, &mxc_sdma_uart2_rx_params}, + {MXC_DMA_UART2_TX, &mxc_sdma_uart2_tx_params}, + {MXC_DMA_UART3_RX, &mxc_sdma_uart3_rx_params}, + {MXC_DMA_UART3_TX, &mxc_sdma_uart3_tx_params}, + {MXC_DMA_UART4_RX, &mxc_sdma_uart4_rx_params}, + {MXC_DMA_UART4_TX, &mxc_sdma_uart4_tx_params}, + {MXC_DMA_UART5_RX, &mxc_sdma_uart5_rx_params}, + {MXC_DMA_UART5_TX, &mxc_sdma_uart5_tx_params}, + {MXC_DMA_MMC1_WIDTH_1, &mxc_sdma_mmc1_width1_params}, + {MXC_DMA_MMC1_WIDTH_4, &mxc_sdma_mmc1_width4_params}, + {MXC_DMA_MMC2_WIDTH_1, &mxc_sdma_mmc2_width1_params}, + {MXC_DMA_MMC2_WIDTH_4, &mxc_sdma_mmc2_width4_params}, + {MXC_DMA_SSI1_8BIT_RX0, &mxc_sdma_ssi1_8bit_rx0_params}, + {MXC_DMA_SSI1_8BIT_TX0, &mxc_sdma_ssi1_8bit_tx0_params}, + {MXC_DMA_SSI1_16BIT_RX0, &mxc_sdma_ssi1_16bit_rx0_params}, + {MXC_DMA_SSI1_16BIT_TX0, &mxc_sdma_ssi1_16bit_tx0_params}, + {MXC_DMA_SSI1_24BIT_RX0, &mxc_sdma_ssi1_24bit_rx0_params}, + {MXC_DMA_SSI1_24BIT_TX0, &mxc_sdma_ssi1_24bit_tx0_params}, + {MXC_DMA_SSI1_8BIT_RX1, &mxc_sdma_ssi1_8bit_rx1_params}, + {MXC_DMA_SSI1_8BIT_TX1, &mxc_sdma_ssi1_8bit_tx1_params}, + {MXC_DMA_SSI1_16BIT_RX1, &mxc_sdma_ssi1_16bit_rx1_params}, + {MXC_DMA_SSI1_16BIT_TX1, &mxc_sdma_ssi1_16bit_tx1_params}, + {MXC_DMA_SSI1_24BIT_RX1, &mxc_sdma_ssi1_24bit_rx1_params}, + {MXC_DMA_SSI1_24BIT_TX1, &mxc_sdma_ssi1_24bit_tx1_params}, + {MXC_DMA_SSI2_8BIT_RX0, &mxc_sdma_ssi2_8bit_rx0_params}, + {MXC_DMA_SSI2_8BIT_TX0, &mxc_sdma_ssi2_8bit_tx0_params}, + {MXC_DMA_SSI2_16BIT_RX0, &mxc_sdma_ssi2_16bit_rx0_params}, + {MXC_DMA_SSI2_16BIT_TX0, &mxc_sdma_ssi2_16bit_tx0_params}, + {MXC_DMA_SSI2_24BIT_RX0, &mxc_sdma_ssi2_24bit_rx0_params}, + {MXC_DMA_SSI2_24BIT_TX0, &mxc_sdma_ssi2_24bit_tx0_params}, + {MXC_DMA_SSI2_8BIT_RX1, &mxc_sdma_ssi2_8bit_rx1_params}, + {MXC_DMA_SSI2_8BIT_TX1, &mxc_sdma_ssi2_8bit_tx1_params}, + {MXC_DMA_SSI2_16BIT_RX1, &mxc_sdma_ssi2_16bit_rx1_params}, + {MXC_DMA_SSI2_16BIT_TX1, &mxc_sdma_ssi2_16bit_tx1_params}, + {MXC_DMA_SSI2_24BIT_RX1, &mxc_sdma_ssi2_24bit_rx1_params}, + {MXC_DMA_SSI2_24BIT_TX1, &mxc_sdma_ssi2_24bit_tx1_params}, + {MXC_DMA_FIR_RX, &mxc_sdma_fir_rx_params}, + {MXC_DMA_FIR_TX, &mxc_sdma_fir_tx_params}, + {MXC_DMA_MEMORY, &mxc_sdma_memory_params}, + {MXC_DMA_FIFO_MEMORY, &mxc_sdma_fifo_memory_params}, + {MXC_DMA_ATA_RX, &mxc_sdma_ata_rx_params}, + {MXC_DMA_ATA_TX, &mxc_sdma_ata_tx_params}, +}; + +static int mxc_sdma_info_entrys = + sizeof(mxc_sdma_active_dma_info) / sizeof(mxc_sdma_active_dma_info[0]); + +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id) +{ + mxc_sdma_info_entry_t *p = mxc_sdma_active_dma_info; + int i; + + for (i = 0; i < mxc_sdma_info_entrys; i++, p++) { + if (p->device == channel_id) { + return p->chnl_info; + } + } + return NULL; +} + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t * chnl) +{ +#ifdef CONFIG_SDMA_IRAM + int i; + for (i = MXC_DMA_CHANNEL_IRAM; i < MAX_DMA_CHANNELS; i++) + chnl[i].dynamic = 0; +#endif /*CONFIG_SDMA_IRAM */ +} + +EXPORT_SYMBOL(mxc_sdma_get_channel_params); +EXPORT_SYMBOL(mxc_get_static_channels); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/dvfs_v2.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/dvfs_v2.c @@ -0,0 +1,535 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dvfs_v2.c + * + * @brief A simplied driver for the Freescale Semiconductor MXC DVFS module. + * + * Upon initialization, the DVFS driver initializes the DVFS hardware + * sets up driver nodes attaches to the DVFS interrupt and initializes internal + * data structures. When the DVFS interrupt occurs the driver checks the cause + * of the interrupt (lower frequency, increase frequency or emergency) and changes + * the CPU voltage according to translation table that is loaded into the driver. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "iomux.h" +#include "crm_regs.h" + +static int dvfs_is_active; + +/* Used for tracking the number of interrupts */ +static u32 dvfs_nr_up[4]; +static u32 dvfs_nr_dn[4]; + +/* + * Clock structures + */ +static struct clk *cpu_clk; +static struct clk *ahb_clk; + +enum { + FSVAI_FREQ_NOCHANGE = 0x0, + FSVAI_FREQ_INCREASE, + FSVAI_FREQ_DECREASE, + FSVAI_FREQ_EMERG, +}; + +/* + * Frequency increase threshold. Increase frequency change request + * will be sent if DVFS counter value will be more than this value. + */ +#define DVFS_UPTHR (30 << MXC_CCM_LTR0_UPTHR_OFFSET) + +/* + * Frequency decrease threshold. Decrease frequency change request + * will be sent if DVFS counter value will be less than this value. + */ +#define DVFS_DNTHR (18 << MXC_CCM_LTR0_DNTHR_OFFSET) + +/* + * With the ARM clocked at 532, this setting yields a DIV_3_CLK of 2.03 kHz. + */ +#define DVFS_DIV3CK (3 << MXC_CCM_LTR0_DIV3CK_OFFSET) + +/* + * DNCNT defines the amount of times the down threshold should be exceeded + * before DVFS will trigger frequency decrease request. + */ +#define DVFS_DNCNT (0x33 << MXC_CCM_LTR1_DNCNT_OFFSET) + +/* + * UPCNT defines the amount of times the up threshold should be exceeded + * before DVFS will trigger frequency increase request. + */ +#define DVFS_UPCNT (0x33 << MXC_CCM_LTR1_UPCNT_OFFSET) + +/* + * Panic threshold. Panic frequency change request + * will be sent if DVFS counter value will be more than this value. + */ +#define DVFS_PNCTHR (63 << MXC_CCM_LTR1_PNCTHR_OFFSET) + +/* + * Load tracking buffer source: 1 for ld_add; 0 for pre_ld_add + */ +#define DVFS_LTBRSR (1 << MXC_CCM_LTR1_LTBRSR_OFFSET) + +/* EMAC defines how many samples are included in EMA calculation */ +#define DVFS_EMAC (0x20 << MXC_CCM_LTR2_EMAC_OFFSET) + +const static u8 ltr_gp_weight[] = { + 0, /* 0 */ + 0, + 0, + 0, + 0, + 0, /* 5 */ + 0, + 0, + 0, + 0, + 0, /* 10 */ + 0, + 7, + 7, + 7, + 7, /* 15 */ +}; + +DEFINE_SPINLOCK(mxc_dvfs_lock); + +/*! + * This function sets the weight of general purpose signals + * @param gp_id number of general purpose bit + * @param weight the weight of the general purpose bit + */ +static void set_gp_weight(int gp_id, u8 weight) +{ + u32 reg; + + if (gp_id < 9) { + reg = __raw_readl(MXC_CCM_LTR3); + reg = (reg & ~(MXC_CCM_LTR3_WSW_MASK(gp_id))) | + (weight << MXC_CCM_LTR3_WSW_OFFSET(gp_id)); + __raw_writel(reg, MXC_CCM_LTR3); + } else if (gp_id < 16) { + reg = __raw_readl(MXC_CCM_LTR2); + reg = (reg & ~(MXC_CCM_LTR2_WSW_MASK(gp_id))) | + (weight << MXC_CCM_LTR2_WSW_OFFSET(gp_id)); + __raw_writel(reg, MXC_CCM_LTR2); + } +} + +static int start_dvfs(void) +{ + u32 reg; + unsigned long flags; + + if (dvfs_is_active) { + return 0; + } + + spin_lock_irqsave(&mxc_dvfs_lock, flags); + + reg = __raw_readl(MXC_CCM_PMCR0); + + /* enable dvfs and interrupt */ + reg = (reg & ~MXC_CCM_PMCR0_FSVAIM) | MXC_CCM_PMCR0_DVFEN; + + __raw_writel(reg, MXC_CCM_PMCR0); + + dvfs_is_active = 1; + + spin_unlock_irqrestore(&mxc_dvfs_lock, flags); + + pr_info("DVFS is started\n"); + + return 0; +} + +#define MXC_CCM_LTR0_CONFIG_MASK (MXC_CCM_LTR0_UPTHR_MASK | \ + MXC_CCM_LTR0_DNTHR_MASK | \ + MXC_CCM_LTR0_DIV3CK_MASK) +#define MXC_CCM_LTR0_CONFIG_VAL (DVFS_UPTHR | DVFS_DNTHR | DVFS_DIV3CK) + +#define MXC_CCM_LTR1_CONFIG_MASK (MXC_CCM_LTR1_UPCNT_MASK | \ + MXC_CCM_LTR1_DNCNT_MASK | \ + MXC_CCM_LTR1_PNCTHR_MASK | \ + MXC_CCM_LTR1_LTBRSR_MASK) +#define MXC_CCM_LTR1_CONFIG_VAL (DVFS_UPCNT | DVFS_DNCNT | \ + DVFS_PNCTHR | DVFS_LTBRSR) + +/*! + * This function is called for module initialization. + * It sets up the DVFS hardware. + * It sets default values for DVFS thresholds and counters. The default + * values was chosen from a set of different reasonable values. They was tested + * and the default values in the driver gave the best results. + * More work should be done to find optimal values. + * + * @return 0 if successful; non-zero otherwise. + * + */ +static int init_dvfs_controller(void) +{ + u32 i, reg; + + /* Configure 2 MC13783 DVFS pins */ + mxc_request_iomux(MX31_PIN_DVFS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_DVFS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); + + /* Configure MC13783 voltage ready input pin */ + mxc_request_iomux(MX31_PIN_GPIO1_5, OUTPUTCONFIG_GPIO, + INPUTCONFIG_FUNC); + + /* setup LTR0 */ + reg = __raw_readl(MXC_CCM_LTR0); + reg = (reg & ~(MXC_CCM_LTR0_CONFIG_MASK)) | MXC_CCM_LTR0_CONFIG_VAL; + __raw_writel(reg, MXC_CCM_LTR0); + + /* set up LTR1 */ + reg = __raw_readl(MXC_CCM_LTR1); + reg = (reg & ~(MXC_CCM_LTR1_CONFIG_MASK)) | MXC_CCM_LTR1_CONFIG_VAL; + __raw_writel(reg, MXC_CCM_LTR1); + + /* setup LTR2 */ + reg = __raw_readl(MXC_CCM_LTR2); + reg = (reg & ~(MXC_CCM_LTR2_EMAC_MASK)) | DVFS_EMAC; + __raw_writel(reg, MXC_CCM_LTR2); + + /* Set general purpose weights to 0 */ + for (i = 0; i < 16; i++) { + set_gp_weight(i, ltr_gp_weight[i]); + } + + /* ARM interrupt, mask load buf full interrupt */ + reg = __raw_readl(MXC_CCM_PMCR0); + reg |= MXC_CCM_PMCR0_DVFIS | MXC_CCM_PMCR0_LBMI; + __raw_writel(reg, MXC_CCM_PMCR0); + + /* configuring EMI Handshake and PLL relock disable */ + reg = __raw_readl(MXC_CCM_PMCR1); + reg |= MXC_CCM_PMCR1_PLLRDIS; + reg |= MXC_CCM_PMCR1_EMIRQ_EN; + __raw_writel(reg, MXC_CCM_PMCR1); + + return 0; +} + +static irqreturn_t dvfs_irq(int irq, void *dev_id) +{ + u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); + u32 fsvai = (pmcr0 & MXC_CCM_PMCR0_FSVAI_MASK) >> + MXC_CCM_PMCR0_FSVAI_OFFSET; + u32 dvsup = (pmcr0 & MXC_CCM_PMCR0_DVSUP_MASK) >> + MXC_CCM_PMCR0_DVSUP_OFFSET; + u32 curr_ahb, curr_cpu, rate; + + /* Should not be here if FSVAIM is set */ + BUG_ON(pmcr0 & MXC_CCM_PMCR0_FSVAIM); + + if (fsvai == FSVAI_FREQ_NOCHANGE) { + /* Do nothing. Freq change is not required */ + printk(KERN_WARNING "fsvai should not be 0\n"); + return IRQ_HANDLED; + } + + if (!(pmcr0 & MXC_CCM_PMCR0_UPDTEN)) { + /* Do nothing. DVFS didn't finish previous flow update */ + return IRQ_HANDLED; + } + + if (((dvsup == DVSUP_LOW) && (fsvai == FSVAI_FREQ_DECREASE)) || + ((dvsup == DVSUP_TURBO) && ((fsvai == FSVAI_FREQ_INCREASE) || + (fsvai == FSVAI_FREQ_EMERG)))) { + /* Interrupt should be disabled in these cases according to + * the spec since DVFS is already at lowest (highest) state */ + printk(KERN_WARNING "Something is wrong?\n"); + return IRQ_HANDLED; + } + + curr_ahb = clk_get_rate(ahb_clk); + if (fsvai == FSVAI_FREQ_DECREASE) { + curr_cpu = clk_get_rate(cpu_clk); + rate = ((curr_cpu / curr_ahb) - 1) * curr_ahb; + if ((cpu_is_mx31_rev(CHIP_REV_2_0) < 0) && + ((curr_cpu / curr_ahb) == 4)) { + rate = ((curr_cpu / curr_ahb) - 2) * curr_ahb; + } + dvfs_nr_dn[dvsup]++; + } else { + rate = 4 * curr_ahb; + dvfs_nr_up[dvsup]++; + } + + clk_set_rate(cpu_clk, rate); + return IRQ_HANDLED; +} + +/*! + * This function disables the DVFS module. + */ +static void stop_dvfs(void) +{ + u32 pmcr0, dvsup; + unsigned long flags; + u32 curr_ahb = clk_get_rate(ahb_clk); + + if (dvfs_is_active) { + spin_lock_irqsave(&mxc_dvfs_lock, flags); + + pmcr0 = __raw_readl(MXC_CCM_PMCR0); + dvsup = (pmcr0 & MXC_CCM_PMCR0_DVSUP_MASK) >> + MXC_CCM_PMCR0_DVSUP_OFFSET; + if (dvsup != DVSUP_TURBO) { + /* Use sw delay to insure volt/freq change */ + clk_set_rate(cpu_clk, (4 * curr_ahb)); + udelay(200); + } + + pmcr0 = __raw_readl(MXC_CCM_PMCR0); + /* disable dvfs and its interrupt */ + pmcr0 = (pmcr0 & ~MXC_CCM_PMCR0_DVFEN) | MXC_CCM_PMCR0_FSVAIM; + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + dvfs_is_active = 0; + + spin_unlock_irqrestore(&mxc_dvfs_lock, flags); + } + + pr_info("DVFS is stopped\n"); +} + +void pmic_voltage_init(void) +{ + t_regulator_voltage volt; + + /* Enable 4 mc13783 output voltages */ + pmic_write_reg(REG_ARBITRATION_SWITCHERS, (1 << 5), (1 << 5)); + + /* Set mc13783 DVS speed 25mV each 4us */ + pmic_write_reg(REG_SWITCHERS_4, (0 << 6), (3 << 6)); + + if (cpu_is_mx31()) + volt.sw1a = SW1A_1_625V; + else + volt.sw1a = SW1A_1_425V; + + pmic_power_regulator_set_voltage(SW_SW1A, volt); + + volt.sw1a = SW1A_1_25V; + pmic_power_switcher_set_dvs(SW_SW1A, volt); + + if (cpu_is_mx32()) { + volt.sw1a = SW1A_0_975V; + pmic_power_switcher_set_stby(SW_SW1A, volt); + } + + volt.sw1b = SW1A_1_25V; + pmic_power_switcher_set_dvs(SW_SW1B, volt); + + volt.sw1b = SW1A_1_25V; + pmic_power_switcher_set_stby(SW_SW1B, volt); +} + +static ssize_t dvfs_enable_store(struct sys_device *dev, struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "1") != NULL) { + if (start_dvfs() != 0) { + printk(KERN_ERR "Failed to start DVFS\n"); + } + } else if (strstr(buf, "0") != NULL) { + stop_dvfs(); + } + + return size; +} + +static ssize_t dvfs_status_show(struct sys_device *dev, struct sysdev_attribute *attr, + char *buf) +{ + int size = 0; + + if (dvfs_is_active) { + size = sprintf(buf, "DVFS is enabled\n"); + } else { + size = sprintf(buf, "DVFS is disabled\n"); + } + size += + sprintf((buf + size), "UP:\t%d\t%d\t%d\t%d\n", dvfs_nr_up[0], + dvfs_nr_up[1], dvfs_nr_up[2], dvfs_nr_up[3]); + size += + sprintf((buf + size), "DOWN:\t%d\t%d\t%d\t%d\n\n", dvfs_nr_dn[0], + dvfs_nr_dn[1], dvfs_nr_dn[2], dvfs_nr_dn[3]); + + return size; +} + +static ssize_t dvfs_status_store(struct sys_device *dev, struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "reset") != NULL) { + int i; + for (i = 0; i < 4; i++) { + dvfs_nr_up[i] = 0; + dvfs_nr_dn[i] = 0; + } + } + + return size; +} + +static ssize_t dvfs_debug_show(struct sys_device *dev, struct sysdev_attribute *attr, + char *buf) +{ + int size = 0; + u32 curr_ahb, curr_cpu; + + curr_ahb = clk_get_rate(ahb_clk); + curr_cpu = clk_get_rate(cpu_clk); + + pr_debug("ahb %d, cpu %d\n", curr_ahb, curr_cpu); + + return size; +} + +static ssize_t dvfs_debug_store(struct sys_device *dev, struct sysdev_attribute *attr, + const char *buf, size_t size) +{ + u32 curr_ahb, curr_cpu, rate = 0; + + curr_ahb = clk_get_rate(ahb_clk); + curr_cpu = clk_get_rate(cpu_clk); + + if (strstr(buf, "inc") != NULL) { + rate = 4 * curr_ahb; + pr_debug("inc to %d\n", rate); + } + + if (strstr(buf, "dec") != NULL) { + rate = ((curr_cpu / curr_ahb) - 1) * curr_ahb; + if ((cpu_is_mx31_rev(CHIP_REV_2_0) < 0) && + ((curr_cpu / curr_ahb) == 4)) + rate = ((curr_cpu / curr_ahb) - 2) * curr_ahb; + + pr_debug("dec to %d\n", rate); + } + + clk_set_rate(cpu_clk, rate); + + return size; +} + +static SYSDEV_ATTR(enable, 0200, NULL, dvfs_enable_store); +static SYSDEV_ATTR(status, 0644, dvfs_status_show, dvfs_status_store); +static SYSDEV_ATTR(debug, 0644, dvfs_debug_show, dvfs_debug_store); + +static struct sysdev_class dvfs_sysclass = { + .name = "dvfs", +}; + +static struct sys_device dvfs_device = { + .id = 0, + .cls = &dvfs_sysclass, +}; + +static int dvfs_sysdev_ctrl_init(void) +{ + int err; + + err = sysdev_class_register(&dvfs_sysclass); + if (!err) + err = sysdev_register(&dvfs_device); + if (!err) { + err = sysdev_create_file(&dvfs_device, &attr_enable); + err = sysdev_create_file(&dvfs_device, &attr_status); + err = sysdev_create_file(&dvfs_device, &attr_debug); + } + + return err; +} + +static void dvfs_sysdev_ctrl_exit(void) +{ + sysdev_remove_file(&dvfs_device, &attr_enable); + sysdev_remove_file(&dvfs_device, &attr_status); + sysdev_unregister(&dvfs_device); + sysdev_class_unregister(&dvfs_sysclass); +} + +static int __init dvfs_init(void) +{ + int err = 0; + pmic_voltage_init(); + + cpu_clk = clk_get(NULL, "cpu_clk"); + ahb_clk = clk_get(NULL, "ahb_clk"); + err = init_dvfs_controller(); + if (err) { + printk(KERN_ERR "DVFS: Unable to initialize DVFS"); + return err; + } + + /* request the DVFS interrupt */ + err = request_irq(MXC_INT_CCM_DVFS, dvfs_irq, IRQF_DISABLED, "dvfs", NULL); + if (err) { + printk(KERN_ERR "DVFS: Unable to attach to DVFS interrupt"); + } + + err = dvfs_sysdev_ctrl_init(); + if (err) { + printk(KERN_ERR + "DVFS: Unable to register sysdev entry for dvfs"); + return err; + } + + return err; +} + +static void __exit dvfs_cleanup(void) +{ + stop_dvfs(); + + /* release the DVFS interrupt */ + free_irq(MXC_INT_CCM_DVFS, NULL); + + dvfs_sysdev_ctrl_exit(); + + clk_put(cpu_clk); + clk_put(ahb_clk); +} + +module_init(dvfs_init); +module_exit(dvfs_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("DVFS driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx3_3stack_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx3_3stack_gpio.c @@ -0,0 +1,1311 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "board-mx3_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx3/mx3_3stack_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO_MX31 + */ + +/*! + * Setup GPIO for a UART port to be active + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_active(int port, int no_irda) +{ + /* + * Configure the IOMUX control registers for the UART signals + */ + switch (port) { + /* UART 1 IOMUX Configs */ + case 0: + mxc_request_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + /* UART 2 IOMUX Configs */ + case 1: + mxc_request_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + mxc_request_iomux(MX31_PIN_RTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + /* UART 3 IOMUX Configs */ + case 2: + mxc_request_iomux(MX31_PIN_CSPI3_MOSI, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_MISO, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_SCLK, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_SPI_RDY, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + default: + break; + } + + /* + * TODO: Configure the Pad registers for the UART pins + */ +} + +/*! + * Setup GPIO for a UART port to be inactive + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_inactive(int port, int no_irda) +{ + switch (port) { + case 0: + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_TXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RTS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), NULL); + + mxc_free_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + break; + case 1: + gpio_request(IOMUX_TO_GPIO(MX31_PIN_TXD2), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RXD2), NULL); + + mxc_free_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + default: + break; + } +} + +/*! + * Configure the IOMUX GPR register to receive shared SDMA UART events + * + * @param port a UART port + */ +void config_uartdma_event(int port) +{ + switch (port) { + case 1: + /* Configure to receive UART 2 SDMA events */ + mxc_iomux_set_gpr(MUX_PGP_FIRI, false); + break; + case 2: + /* Configure to receive UART 3 SDMA events */ + mxc_iomux_set_gpr(MUX_CSPI1_UART3, true); + break; + case 4: + /* Configure to receive UART 5 SDMA events */ + mxc_iomux_set_gpr(MUX_CSPI3_UART5_SEL, true); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_uart_active); +EXPORT_SYMBOL(gpio_uart_inactive); +EXPORT_SYMBOL(config_uartdma_event); + +/*! + * Setup GPIO for Keypad to be active + * + */ +void gpio_keypad_active(void) +{ + /* + * Configure the IOMUX control register for keypad signals. + */ + mxc_request_iomux(MX31_PIN_KEY_COL0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_keypad_active); + +/*! + * Setup GPIO for Keypad to be inactive + * + */ +void gpio_keypad_inactive(void) +{ + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_COL0), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_COL1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_COL2), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_COL3), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_ROW0), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_ROW1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_KEY_ROW2), NULL); + + mxc_free_iomux(MX31_PIN_KEY_COL0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_COL1, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_COL2, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_COL3, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_ROW0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_ROW1, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_KEY_ROW2, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_keypad_inactive); + +void gpio_power_key_active(void) +{ + mxc_request_iomux(MX31_PIN_GPIO1_2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); + mxc_iomux_set_pad(MX31_PIN_GPIO1_2, PAD_CTL_PKE_NONE); +} + +EXPORT_SYMBOL(gpio_power_key_active); + +/*! + * Setup GPIO for a CSPI device to be active + * + * @param cspi_mod an CSPI device + */ +void gpio_spi_active(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + /* setup GPR for CSPI BB */ + iomux_config_gpr(MUX_PGP_CSPI_BB, true); + /* CSPI1 clock and RDY use full UART ALT1 mode */ + mxc_request_iomux(MX31_PIN_DSR_DCE1, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_RI_DCE1, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + case 1: + /* SPI2 */ + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 2: + /* SPI3 */ + /* + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + */ + break; + default: + break; + } +} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_active(void) +{ + /* + * Configure the IOMUX control register for 1-wire signals. + */ + iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_pad(MX31_PIN_BATT_LINE, PAD_CTL_LOOPBACK); +} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_inactive(void) +{ + /* + * Configure the IOMUX control register for 1-wire signals. + */ + iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_owire_active); +EXPORT_SYMBOL(gpio_owire_inactive); + +/*! + * Setup GPIO for a CSPI device to be inactive + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + /* setup GPR for CSPI BB */ + iomux_config_gpr(MUX_PGP_CSPI_BB, false); + /* CSPI1 clock and RDY use full UART ALT1 mode */ + mxc_free_iomux(MX31_PIN_DSR_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_RI_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 1: + /* SPI2 */ + mxc_free_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 2: + /* SPI3 */ + break; + default: + break; + } +} + +/*! + * Setup GPIO for an I2C device to be active + * + * @param i2c_num an I2C device + */ +void gpio_i2c_active(int i2c_num) +{ + switch (i2c_num) { + case 0: + mxc_request_iomux(MX31_PIN_I2C_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_I2C_DAT, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 1: + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + case 2: + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + default: + break; + } + +} + +/*! + * Setup GPIO for an I2C device to be inactive + * + * @param i2c_num an I2C device + */ +void gpio_i2c_inactive(int i2c_num) +{ + switch (i2c_num) { + case 0: + mxc_free_iomux(MX31_PIN_I2C_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_I2C_DAT, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 1: + mxc_free_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, + INPUTCONFIG_ALT1); + mxc_free_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, + INPUTCONFIG_ALT1); + break; + case 2: + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_ALT1); + break; + default: + break; + } +} + +/*! + * This function configures the IOMux block for PMIC standard operations. + * + */ +void gpio_pmic_active(void) +{ + mxc_request_iomux(MX31_PIN_GPIO1_3, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); +} + +EXPORT_SYMBOL(gpio_pmic_active); + +/*! + * Setup GPIO for SDHC to be active + * + * @param module SDHC module number + */ +void gpio_sdhc_active(int module) +{ + switch (module) { + case 0: + mxc_request_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + mxc_iomux_set_pad(MX31_PIN_SD1_CLK, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + mxc_iomux_set_pad(MX31_PIN_SD1_CMD, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, + (PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST + | PAD_CTL_100K_PU)); + + /* + * Active the Buffer Enable Pin only if there is + * a card in slot. + * To fix the card voltage issue caused by + * bi-directional chip TXB0108 on 3Stack + */ + if (gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1))) + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 0); + else + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 1); + break; + case 1: + mxc_request_iomux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_READY, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_VS1, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_active); + +/*! + * Setup GPIO for SDHC1 to be inactive + * + * @param module SDHC module number + */ +void gpio_sdhc_inactive(int module) +{ + switch (module) { + case 0: + mxc_free_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + mxc_iomux_set_pad(MX31_PIN_SD1_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_CMD, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + + /* Buffer Enable Pin of SD, Active HI */ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 0); + break; + case 1: + /* TODO:what are the pins for SDHC2? */ + mxc_free_iomux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_READY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_VS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_FUNC, + INPUTCONFIG_NONE); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_inactive); + +/* + * Probe for the card. If present the GPIO data would be set. + */ +unsigned int sdhc_get_card_det_status(struct device *dev) +{ + int ret; + + if (to_platform_device(dev)->id == 0) { + ret = gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); + /* + * Active the Buffer Enable Pin only if there is + * a card in slot. + * To fix the card voltage issue caused by + * bi-directional chip TXB0108 on 3Stack + */ + if (ret) + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 0); + else + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 1); + return ret; + } else + return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); +} + +EXPORT_SYMBOL(sdhc_get_card_det_status); + +/* + * Return the card detect pin. + */ +int sdhc_init_card_det(int id) +{ + if (id == 0) { + /* Buffer Enable Pin, Active HI */ + mxc_request_iomux(MX31_PIN_GPIO3_0, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), "gpio3_0"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_GPIO3_0), 0); + + /* CD Pin */ + mxc_request_iomux(MX31_PIN_GPIO3_1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_iomux_set_pad(MX31_PIN_GPIO3_1, PAD_CTL_PKE_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "gpio3_1"); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); + return IOMUX_TO_IRQ(MX31_PIN_GPIO3_1); + } else { + iomux_config_mux(MX31_PIN_GPIO1_2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + return IOMUX_TO_IRQ(MX31_PIN_GPIO1_2); + + } +} + +EXPORT_SYMBOL(sdhc_init_card_det); + +/*! + * Get SD1_WP ADIN7 of ATLAS pin value to detect write protection + */ +int sdhc_write_protect(struct device *dev) +{ + unsigned short rc = 0; + + pmic_adc_convert(GEN_PURPOSE_AD7, &rc); + if (rc > 0) + return 1; + else + return 0; +} + +EXPORT_SYMBOL(sdhc_write_protect); + +/*! + * Setup GPIO for LCD to be active + * + */ +void gpio_lcd_active(void) +{ + + mxc_request_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD16 + mxc_request_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD17 + mxc_request_iomux(MX31_PIN_VSYNC3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // VSYNC + mxc_request_iomux(MX31_PIN_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // HSYNC + mxc_request_iomux(MX31_PIN_FPSHIFT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLK + mxc_request_iomux(MX31_PIN_CONTRAST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CONTR + +#ifdef CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL + mxc_request_iomux(MX31_PIN_DRDY0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* DRDY */ + mxc_request_iomux(MX31_PIN_D3_REV, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* REV */ + mxc_request_iomux(MX31_PIN_D3_SPL, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* SPL */ + mxc_request_iomux(MX31_PIN_D3_CLS, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* CLS */ +#else + /* ensure that LCDIO(1.8V) has been turn on */ + /* active reset line GPIO */ + mxc_request_iomux(MX31_PIN_LCS1, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS1), "lcs1"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_LCS1), 0); + /* do reset */ + mdelay(10); /* tRES >= 100us */ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_LCS1), 1); + + /* enable data */ + mxc_request_iomux(MX31_PIN_SER_RS, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SER_RS), "ser_rs"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_SER_RS), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SER_RS), 1); +#endif +} + +/*! + * Setup GPIO for LCD to be inactive + * + */ +void gpio_lcd_inactive(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SER_RS), 0); +} + +/*! + * Switch to the specified sensor - MX31 ADS has two + * + */ +void gpio_sensor_select(int sensor) +{ +} + +/*! + * Setup GPIO for sensor to be active + * + */ +void gpio_sensor_active(void) +{ + gpio_sensor_select(0); + + /* + * Configure the iomuxen for the CSI. + */ + + mxc_request_iomux(MX31_PIN_CSI_D5, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "csi_d5"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 0); + + mxc_request_iomux(MX31_PIN_CSI_D6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D10, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D11, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D12, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D13, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D14, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D15, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_HSYNC, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_MCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_PIXCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_VSYNC, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + if (mxc_request_iomux(MX31_PIN_A23, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) + == 0) { + printk(KERN_ERR "%s:REGEN set request gpio ok\n", __func__); + } else { + printk(KERN_ERR "%s:REGEN set error, request gpio error\n", + __func__); + return; + } + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SD_D_IO), "sd_d_io"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_SD_D_IO), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SD_D_IO), 1); +} + +EXPORT_SYMBOL(gpio_sensor_active); + +void gpio_sensor_reset(bool flag) +{ +} + +EXPORT_SYMBOL(gpio_sensor_reset); + +/*! + * Setup GPIO for sensor to be inactive + * + */ +void gpio_sensor_inactive(void) +{ + mxc_free_iomux(MX31_PIN_CSI_D5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_MCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_PIXCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_VSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_sensor_inactive); + +/*! + * Setup GPIO for ATA interface + * + */ +void gpio_ata_active(void) +{ + /* + * Configure the GPR for ATA group B signals + */ + mxc_iomux_set_gpr(MUX_PGP_ATA_8 | MUX_PGP_ATA_5 | MUX_PGP_ATA_4 | + MUX_PGP_ATA_3 | MUX_PGP_ATA_2, false); + + mxc_iomux_set_gpr(MUX_PGP_ATA_9 | MUX_PGP_ATA_7 | MUX_PGP_ATA_6 | + MUX_PGP_ATA_1, true); + + /* + * Configure the IOMUX for ATA group B signals + */ + + mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D0 + mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D1 + mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D2 + mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D3 + mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D4 + mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D5 + mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D6 + mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D7 + mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D8 + mxc_request_iomux(MX31_PIN_SCK3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D9 + mxc_request_iomux(MX31_PIN_SFS3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D10 + mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D11 + mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D12 + mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D13 + mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D14 + mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D15 + + /* Config the multiplex pin of ATA interface DIR, DA0-2, INTRQ, DMARQ */ + mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DMARQ_B + mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_INTRQ_B + mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA0 + mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA1 + mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA2 + mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_BUFFER_DIR + + /* HDD_ENABLE_B(H:Disable,L:Enable) */ + mxc_request_iomux(MX31_PIN_CSI_D4, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); // HDD_ENABLE_B + gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D4), "csi_d4"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D4), 0); + mdelay(10); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D4), 0); + mdelay(10); + + /* These ATA pins are common to Group A and Group B */ + + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_PWMO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + /* Need fast slew rate for UDMA mode */ + +#define ATA_DAT_PAD_CFG (PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE | PAD_CTL_100K_PU) + mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, ATA_DAT_PAD_CFG); // data 0 + mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, ATA_DAT_PAD_CFG); // data 1 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, ATA_DAT_PAD_CFG); // data 2 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, ATA_DAT_PAD_CFG); // data 3 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, ATA_DAT_PAD_CFG); // data 4 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, ATA_DAT_PAD_CFG); // data 5 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, ATA_DAT_PAD_CFG); // data 6 + mxc_iomux_set_pad(MX31_PIN_STXD3, ATA_DAT_PAD_CFG); // data 7 + mxc_iomux_set_pad(MX31_PIN_SRXD3, ATA_DAT_PAD_CFG); // data 8 + mxc_iomux_set_pad(MX31_PIN_SCK3, ATA_DAT_PAD_CFG); // data 9 + mxc_iomux_set_pad(MX31_PIN_SFS3, ATA_DAT_PAD_CFG); // data 10 + mxc_iomux_set_pad(MX31_PIN_STXD6, ATA_DAT_PAD_CFG); // data 11 + mxc_iomux_set_pad(MX31_PIN_SRXD6, ATA_DAT_PAD_CFG); // data 12 + mxc_iomux_set_pad(MX31_PIN_SCK6, ATA_DAT_PAD_CFG); // data 13 + mxc_iomux_set_pad(MX31_PIN_CAPTURE, ATA_DAT_PAD_CFG); // data 14 + mxc_iomux_set_pad(MX31_PIN_COMPARE, ATA_DAT_PAD_CFG); // data 15 +#undef ATA_DAT_PAD_CFG + +#define ATA_CTL_PAD_CFG (PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE) + mxc_iomux_set_pad(MX31_PIN_KEY_COL4, ATA_CTL_PAD_CFG); // ATA_DMARQ); + mxc_iomux_set_pad(MX31_PIN_KEY_ROW6, ATA_CTL_PAD_CFG); // ATA_INTRQ); + mxc_iomux_set_pad(MX31_PIN_KEY_COL5, ATA_CTL_PAD_CFG); // + mxc_iomux_set_pad(MX31_PIN_KEY_COL6, ATA_CTL_PAD_CFG); // + mxc_iomux_set_pad(MX31_PIN_KEY_COL7, ATA_CTL_PAD_CFG); // + mxc_iomux_set_pad(MX31_PIN_KEY_ROW7, ATA_CTL_PAD_CFG); // + + mxc_iomux_set_pad(MX31_PIN_ATA_CS0, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_CS1, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DIOR, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DIOW, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DMACK, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_RESET_B, ATA_CTL_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_PWMO, ATA_CTL_PAD_CFG); +#undef ATA_CTL_PAD_CFG +} + +EXPORT_SYMBOL(gpio_ata_active); + +/*! + * Restore ATA interface pins to reset values + * + */ +void gpio_ata_inactive(void) +{ + /* + * Turn off ATA group B signals + */ + mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D0 + mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D1 + mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D2 + mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D3 + mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D4 + mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D5 + mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D6 + mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D7 + mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D8 + mxc_request_iomux(MX31_PIN_SCK3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D9 + mxc_request_iomux(MX31_PIN_SFS3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D10 + mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D11 + mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D12 + mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D13 + mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D14 + mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D15 + + /* Config the multiplex pin of ATA interface DIR, DA0-2, INTRQ, DMARQ */ + mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_DMARQ_B + mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_INTRQ_B + mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_DA0 + mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_DA1 + mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_DA2 + mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_BUFFER_DIR + + /* HDD_BUFF_EN (H:A->B, L:B->A) and HDD_ENABLE_B(H:Disable,L:Enable) */ + mxc_free_iomux(MX31_PIN_CSI_D4, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + + /* These ATA pins are common to Group A and Group B */ + + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PWMO, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + + /* Needed fast slew rate for UDMA mode */ + +#define ATA_DAT_PAD_CFG (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_NORMAL | PAD_CTL_PKE_NONE) + mxc_iomux_set_pad(MX31_PIN_KEY_COL4, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_KEY_ROW6, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_KEY_COL5, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_KEY_COL6, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_KEY_COL7, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_KEY_ROW7, ATA_DAT_PAD_CFG); + + mxc_iomux_set_pad(MX31_PIN_ATA_CS0, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_CS1, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DIOR, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DIOW, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_DMACK, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_ATA_RESET_B, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_PWMO, ATA_DAT_PAD_CFG); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_STXD3, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SRXD3, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SCK3, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SFS3, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_STXD6, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SRXD6, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SCK6, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_CAPTURE, ATA_DAT_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_COMPARE, ATA_DAT_PAD_CFG); +#undef ATA_DAT_PAD_CFG +} + +EXPORT_SYMBOL(gpio_ata_inactive); + +/* *INDENT-OFF* */ +/* + * USB Host 1 + * pins conflict with SPI1, ATA, UART3 + */ +int gpio_usbh1_active(void) +{ + return 0; +} + +EXPORT_SYMBOL(gpio_usbh1_active); + +void gpio_usbh1_inactive(void) +{ + /* Do nothing as pins don't have/support GPIO mode */ + +} + +EXPORT_SYMBOL(gpio_usbh1_inactive); + +/* + * USB Host 2 + * pins conflict with UART5, PCMCIA + */ +int gpio_usbh2_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBH2_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_PC_VS2, /* USBH2_DATA2 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_PC_BVD1, /* USBH2_DATA3 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_PC_BVD2, /* USBH2_DATA4 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_PC_RST, /* USBH2_DATA5 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_IOIS16, /* USBH2_DATA6 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_PC_RW_B, /* USBH2_DATA7 */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1)) { + return -EINVAL; + } + mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | + PAD_CTL_PKE_NONE)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_STP, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_VS2, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_BVD1, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_BVD2, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_RST, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_IOIS16, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_RW_B, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_request_iomux(MX31_PIN_USB_BYP, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), "usb_byp"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), 0); + mdelay(1); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), 1); + return 0; +} + +EXPORT_SYMBOL(gpio_usbh2_active); + +void gpio_usbh2_inactive(void) +{ + mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_STP, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_VS2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_BVD1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_BVD2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_RST, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_IOIS16, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_PC_RW_B, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + + mxc_free_iomux(MX31_PIN_USBH2_CLK, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_USBH2_DIR, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_USBH2_NXT, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_USBH2_STP, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_USBH2_DATA0, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_USBH2_DATA1, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + + mxc_free_iomux(MX31_PIN_PC_VS2, /* USBH2_DATA2 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_BVD1, /* USBH2_DATA3 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_BVD2, /* USBH2_DATA4 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_RST, /* USBH2_DATA5 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_IOIS16, /* USBH2_DATA6 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_PC_RW_B, /* USBH2_DATA7 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + + mxc_free_iomux(MX31_PIN_USB_BYP, /* USBH2 PHY reset */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); +} + +EXPORT_SYMBOL(gpio_usbh2_inactive); + +/* + * USB OTG HS port + */ +int gpio_usbotg_hs_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA2, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA3, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA4, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA5, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA6, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA7, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC)) { + return -EINVAL; + } + + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + /* reset transceiver */ + mxc_request_iomux(MX31_PIN_USB_PWR, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_USB_PWR), "usb_pwr"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_USB_PWR), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_USB_PWR), 0); + mdelay(1); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_USB_PWR), 1); + + return 0; +} + +EXPORT_SYMBOL(gpio_usbotg_hs_active); + +void gpio_usbotg_hs_inactive(void) +{ + mxc_free_iomux(MX31_PIN_USB_PWR, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_usbotg_hs_inactive); + +/*! + * USB OTG FS port + */ +int gpio_usbotg_fs_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA2, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA3, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA4, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA5, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA6, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA7, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USB_PWR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC)) + return -EINVAL; + return 0; +} + +EXPORT_SYMBOL(gpio_usbotg_fs_active); + +void gpio_usbotg_fs_inactive(void) +{ + /* Do nothing as pins doesn't have/support GPIO mode */ + +} + +EXPORT_SYMBOL(gpio_usbotg_fs_inactive); + +/*! + * GPS GPIO + */ +void gpio_gps_active(void) +{ + /* POWER_EN */ + mxc_request_iomux(MX31_PIN_SCLK0, + OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SCLK0), "sclk0"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_SCLK0), 0); + /* Reset Pin */ + mxc_request_iomux(MX31_PIN_DCD_DTE1, + OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DCD_DTE1), "dcd_dte1"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DCD_DTE1), 0); + + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SCLK0), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_DCD_DTE1), 0); + + msleep(5); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_DCD_DTE1), 1); + msleep(5); +} + +EXPORT_SYMBOL(gpio_gps_active); + +int gpio_gps_access(int para) +{ + iomux_pin_name_t pin; + pin = (para & 0x1) ? MX31_PIN_SCLK0 : MX31_PIN_DCD_DTE1; + + if (para & 0x4) /* Read GPIO */ + return gpio_get_value(IOMUX_TO_GPIO(pin)); + else if (para & 0x2) /* Write GPIO */ + gpio_set_value(IOMUX_TO_GPIO(pin), 1); + else + gpio_set_value(IOMUX_TO_GPIO(pin), 0); + return 0; +} + +EXPORT_SYMBOL(gpio_gps_access); + +void gpio_gps_inactive(void) +{ + mxc_free_iomux(MX31_PIN_DCD_DTE1, + OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_SCLK0, + OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_gps_inactive); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx31ads_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx31ads_gpio.c @@ -0,0 +1,1561 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "board-mx31ads.h" +#include "iomux.h" + +/*! + * @file mach-mx3/mx31ads_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO_MX31 + */ + +void gpio_activate_audio_ports(void); + +/*! + * This system-wise GPIO function initializes the pins during system startup. + * All the statically linked device drivers should put the proper GPIO initialization + * code inside this function. It is called by \b fixup_mx31ads() during + * system startup. This function is board specific. + */ +void mx31ads_gpio_init(void) +{ + /* config CS4 */ + mxc_request_iomux(MX31_PIN_CS4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + /*Connect DAM ports 4 & 5 to enable audio I/O */ + gpio_activate_audio_ports(); +} + +/*! + * Setup GPIO for a UART port to be active + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_active(int port, int no_irda) +{ + unsigned int pbc_bctrl1_clr = 0, pbc_bctrl2_set = 0, pbc_bctrl2_clr = 0; + /* + * Configure the IOMUX control registers for the UART signals + */ + switch (port) { + /* UART 1 IOMUX Configs */ + case 0: + mxc_request_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_DTR_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_DSR_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RI_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_DCD_DCE1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + /* Enable the transceiver */ + pbc_bctrl1_clr |= PBC_BCTRL1_UENCE; + pbc_bctrl2_set |= PBC_BCTRL2_USELC; + break; + /* UART 2 IOMUX Configs */ + case 1: + mxc_request_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + if (no_irda == 1) { + mxc_request_iomux(MX31_PIN_RTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CTS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_DTR_DCE2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + pbc_bctrl1_clr |= PBC_BCTRL1_UENCE; + pbc_bctrl2_clr |= PBC_BCTRL2_USELC; + } else { + pbc_bctrl1_clr |= PBC_BCTRL1_IREN; + pbc_bctrl2_clr |= PBC_BCTRL2_IRDA_MOD; + } + break; + /* UART 3 IOMUX Configs */ + case 2: + mxc_request_iomux(MX31_PIN_CSPI3_MOSI, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_MISO, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_SCLK, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI3_SPI_RDY, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + + pbc_bctrl1_clr |= PBC_BCTRL1_UENB; + pbc_bctrl2_clr |= PBC_BCTRL2_USELB; + break; + /* UART 4 IOMUX Configs */ + case 3: + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + + pbc_bctrl1_clr |= PBC_BCTRL1_UENB; + pbc_bctrl2_set |= PBC_BCTRL2_USELB; + break; + /* UART 5 IOMUX Configs */ + case 4: + mxc_request_iomux(MX31_PIN_PC_VS2, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_PC_RST, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + + pbc_bctrl1_clr |= PBC_BCTRL1_UENA; + pbc_bctrl2_set |= PBC_BCTRL2_USELA; + break; + default: + break; + } + + __raw_writew(pbc_bctrl1_clr, PBC_BASE_ADDRESS + PBC_BCTRL1_CLEAR); + __raw_writew(pbc_bctrl2_set, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + __raw_writew(pbc_bctrl2_clr, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + /* + * TODO: Configure the Pad registers for the UART pins + */ +} + +/*! + * Setup GPIO for a UART port to be inactive + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_inactive(int port, int no_irda) +{ + unsigned int pbc_bctrl1_set = 0; + + switch (port) { + case 0: + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_TXD1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RTS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RI_DCE1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), NULL); + + mxc_free_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_DTR_DCE1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_DSR_DCE1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RI_DCE1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_DCD_DCE1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + + pbc_bctrl1_set |= PBC_BCTRL1_UENCE; + break; + case 1: + gpio_request(IOMUX_TO_GPIO(MX31_PIN_TXD2), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_RXD2), NULL); + + mxc_free_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + + if (no_irda == 1) { + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), NULL); + mxc_free_iomux(MX31_PIN_DTR_DCE2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + + pbc_bctrl1_set |= PBC_BCTRL1_UENCE; + } else { + pbc_bctrl1_set |= PBC_BCTRL1_IREN; + } + break; + case 2: + pbc_bctrl1_set |= PBC_BCTRL1_UENB; + break; + case 3: + gpio_request(IOMUX_TO_GPIO(MX31_PIN_ATA_CS0), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_ATA_CS1), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR), NULL); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW), NULL); + + mxc_free_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + + pbc_bctrl1_set |= PBC_BCTRL1_UENB; + break; + case 4: + pbc_bctrl1_set |= PBC_BCTRL1_UENA; + break; + default: + break; + } + __raw_writew(pbc_bctrl1_set, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); +} + +/*! + * Configure the IOMUX GPR register to receive shared SDMA UART events + * + * @param port a UART port + */ +void config_uartdma_event(int port) +{ + switch (port) { + case 1: + /* Configure to receive UART 2 SDMA events */ + mxc_iomux_set_gpr(MUX_PGP_FIRI, false); + break; + case 2: + /* Configure to receive UART 3 SDMA events */ + mxc_iomux_set_gpr(MUX_CSPI1_UART3, true); + break; + case 4: + /* Configure to receive UART 5 SDMA events */ + mxc_iomux_set_gpr(MUX_CSPI3_UART5_SEL, true); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_uart_active); +EXPORT_SYMBOL(gpio_uart_inactive); +EXPORT_SYMBOL(config_uartdma_event); + +/*! + * Setup GPIO for Keypad to be active + * + */ +void gpio_keypad_active(void) +{ + /* + * Configure the IOMUX control register for keypad signals. + */ + mxc_request_iomux(MX31_PIN_KEY_COL0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW4, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW5, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_keypad_active); + +/*! + * Setup GPIO for Keypad to be inactive + * + */ +void gpio_keypad_inactive(void) +{ + mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + + mxc_request_iomux(MX31_PIN_KEY_ROW4, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_ROW5, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_keypad_inactive); + +void gpio_power_key_active(void) +{ +} +EXPORT_SYMBOL(gpio_power_key_active); + +/*! + * Setup GPIO for a CSPI device to be active + * + * @param cspi_mod an CSPI device + */ +void gpio_spi_active(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + /* SPI1 */ + mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 1: + /* SPI2 */ + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 2: + /* SPI3 */ + /* + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + */ + break; + default: + break; + } +} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_active(void) +{ + /* + * Configure the IOMUX control register for 1-wire signals. + */ + iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_pad(MX31_PIN_BATT_LINE, PAD_CTL_LOOPBACK); +} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_inactive(void) +{ + /* + * Configure the IOMUX control register for 1-wire signals. + */ + iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_owire_active); +EXPORT_SYMBOL(gpio_owire_inactive); + +/*! + * Setup GPIO for a CSPI device to be inactive + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ + /* Do nothing as CSPI pins doesn't have/support GPIO mode */ +} + +/*! + * Setup GPIO for an I2C device to be active + * + * @param i2c_num an I2C device + */ +void gpio_i2c_active(int i2c_num) +{ + switch (i2c_num) { + case 0: + mxc_request_iomux(MX31_PIN_I2C_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_I2C_DAT, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + break; + case 1: + mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + case 2: + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + default: + break; + } + +} + +/*! + * Setup GPIO for an I2C device to be inactive + * + * @param i2c_num an I2C device + */ +void gpio_i2c_inactive(int i2c_num) +{ + switch (i2c_num) { + case 0: + break; + case 1: + break; + case 2: + mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_GPIO, + INPUTCONFIG_ALT1); + break; + default: + break; + } +} + +/*! + * This function configures the IOMux block for PMIC standard operations. + * + */ +void gpio_pmic_active(void) +{ + mxc_request_iomux(MX31_PIN_GPIO1_3, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), NULL); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); +} + +EXPORT_SYMBOL(gpio_pmic_active); + +/*! + * This function activates DAM ports 4 & 5 to enable + * audio I/O. Thsi function is called from mx31ads_gpio_init + * function, which is board-specific. + */ +void gpio_activate_audio_ports(void) +{ + /* config Audio ports (4 & 5) */ + mxc_request_iomux(MX31_PIN_SCK4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SRXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_STXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SFS4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SCK5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SRXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_STXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SFS5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); +} + +/*! + * Setup GPIO for SDHC to be active + * + * @param module SDHC module number + */ +void gpio_sdhc_active(int module) +{ + switch (module) { + case 0: + mxc_request_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + mxc_iomux_set_pad(MX31_PIN_SD1_CLK, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_SD1_CMD, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + break; + case 1: + mxc_request_iomux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_READY, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_VS1, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + mxc_request_iomux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_ALT1, + INPUTCONFIG_ALT1); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_active); + +/*! + * Setup GPIO for SDHC1 to be inactive + * + * @param module SDHC module number + */ +void gpio_sdhc_inactive(int module) +{ + switch (module) { + case 0: + mxc_request_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + + mxc_iomux_set_pad(MX31_PIN_SD1_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_CMD, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW)); + break; + case 1: + /* TODO:what are the pins for SDHC2? */ + mxc_request_iomux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PC_READY, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PC_VS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_inactive); + +/* + * Probe for the card. If present the GPIO data would be set. + */ +int sdhc_get_card_det_status(struct device *dev) +{ + if (to_platform_device(dev)->id == 0) { + return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)); + } else { + return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2)); + } +} + +EXPORT_SYMBOL(sdhc_get_card_det_status); + +/* + * Return the card detect pin. + */ +int sdhc_init_card_det(int id) +{ + if (id == 0) { + iomux_config_mux(MX31_PIN_GPIO1_1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + return IOMUX_TO_IRQ(MX31_PIN_GPIO1_1); + } else { + iomux_config_mux(MX31_PIN_GPIO1_2, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + return IOMUX_TO_IRQ(MX31_PIN_GPIO1_2); + + } +} + +EXPORT_SYMBOL(sdhc_init_card_det); + +/*! + * Setup GPIO for LCD to be active + * + */ +void gpio_lcd_active(void) +{ + u16 temp; + + mxc_request_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD16 + mxc_request_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD17 + mxc_request_iomux(MX31_PIN_VSYNC3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // VSYNC + mxc_request_iomux(MX31_PIN_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // HSYNC + mxc_request_iomux(MX31_PIN_FPSHIFT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLK + mxc_request_iomux(MX31_PIN_DRDY0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // DRDY + mxc_request_iomux(MX31_PIN_D3_REV, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // REV + mxc_request_iomux(MX31_PIN_CONTRAST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CONTR + mxc_request_iomux(MX31_PIN_D3_SPL, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // SPL + mxc_request_iomux(MX31_PIN_D3_CLS, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLS + + temp = PBC_BCTRL1_LCDON; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); +} + +/*! + * Setup GPIO for LCD to be inactive + * + */ +void gpio_lcd_inactive(void) +{ + u16 pbc_bctrl1_set = 0; + + pbc_bctrl1_set = (u16) PBC_BCTRL1_LCDON; + __raw_writew(pbc_bctrl1_set, PBC_BASE_ADDRESS + PBC_BCTRL1_SET + 2); +} + +/*! + * Setup pins for SLCD to be active + * + */ +void slcd_gpio_config(void) +{ + u16 temp; + + /* Reset smart lcd */ + temp = PBC_BCTRL2_LDC_RST0; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + msleep(2); + /* Bring out of reset */ + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + msleep(2); + + mxc_request_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + mxc_request_iomux(MX31_PIN_READ, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* read */ + mxc_request_iomux(MX31_PIN_WRITE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* write */ + mxc_request_iomux(MX31_PIN_PAR_RS, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* RS */ + mxc_request_iomux(MX31_PIN_LCS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* chip select */ + + /* Enable smart lcd interface */ + temp = PBC_BCTRL2_LDCIO_EN; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); +} + +/*! + * Switch to the specified sensor - MX31 ADS has two + * + */ +void gpio_sensor_select(int sensor) +{ + u16 temp; + + switch (sensor) { + case 0: +#ifdef CONFIG_MXC_CAMERA_MC521DA + temp = 0x100; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); +#else + temp = PBC_BCTRL1_SENSOR2_ON; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_CLEAR); + temp = PBC_BCTRL1_SENSOR1_ON; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); +#endif + break; + case 1: + temp = PBC_BCTRL1_SENSOR1_ON; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_CLEAR); + temp = PBC_BCTRL1_SENSOR2_ON; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); + break; + default: + break; + } +} + +/*! + * Setup GPIO for sensor to be active + * + */ +void gpio_sensor_active(void) +{ + gpio_sensor_select(0); + + /* + * Configure the iomuxen for the CSI. + */ + + mxc_request_iomux(MX31_PIN_CSI_D4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D10, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D11, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D12, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D13, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D14, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_D15, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_HSYNC, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_MCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_PIXCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_CSI_VSYNC, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + +#ifdef CONFIG_MXC_IPU_CAMERA_16BIT + /* + * The other 4 data bits are multiplexed on MX31. + */ + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_ALT2, + INPUTCONFIG_ALT2); +#endif + + /* + * Now enable the CSI buffers + */ + + __raw_writew(PBC_BCTRL2_CSI_EN, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + +#ifdef CONFIG_MXC_IPU_CAMERA_16BIT + /* + * Enable the other buffer for the additional 4 data bits. + */ + __raw_writew(PBC_BCTRL4_CSI_MSB_EN, + PBC_BASE_ADDRESS + PBC_BCTRL4_CLEAR); +#endif +} + +EXPORT_SYMBOL(gpio_sensor_active); + +void gpio_sensor_reset(bool flag) +{ + u16 temp; + + if (flag) { + temp = 0x200; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_CLEAR); + } else { + temp = 0x200; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL1_SET); + } +} + +EXPORT_SYMBOL(gpio_sensor_reset); + +/*! + * Setup GPIO for sensor to be inactive + * + */ +void gpio_sensor_inactive(void) +{ + mxc_free_iomux(MX31_PIN_CSI_D4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_D15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_MCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_PIXCLK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_free_iomux(MX31_PIN_CSI_VSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); +} + +EXPORT_SYMBOL(gpio_sensor_inactive); + +/*! + * Setup GPIO for ATA interface + * + */ +void gpio_ata_active(void) +{ + /* + * Configure the GPR for ATA group B signals + */ + __raw_writew(PBC_BCTRL2_ATA_SEL, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + __raw_writew(PBC_BCTRL2_ATA_EN, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + + mxc_iomux_set_gpr(MUX_PGP_ATA_7 | MUX_PGP_ATA_6 | MUX_PGP_ATA_2 | + MUX_PGP_ATA_1, true); + + /* + * Configure the IOMUX for ATA group B signals + */ + + mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D0 + mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D1 + mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D2 + mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D3 + mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D4 + mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D5 + mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D6 + mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D7 + mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D8 + mxc_request_iomux(MX31_PIN_SCK3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D9 + mxc_request_iomux(MX31_PIN_SFS3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D10 + mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D11 + mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D12 + mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D13 + mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D14 + mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D15 + + mxc_request_iomux(MX31_PIN_USBH2_STP, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DMARQ_B + mxc_request_iomux(MX31_PIN_USBH2_CLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_INTRQ_B + mxc_request_iomux(MX31_PIN_USBH2_NXT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA0 + mxc_request_iomux(MX31_PIN_USBH2_DATA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA1 + mxc_request_iomux(MX31_PIN_USBH2_DATA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA2 + mxc_request_iomux(MX31_PIN_USBH2_DIR, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_BUFFER_DIR + + /* These ATA pins are common to Group A and Group B */ + + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_PWMO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + /* Need fast slew rate for UDMA mode */ + + mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 0 + mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 1 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 2 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 3 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 4 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 5 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 6 + mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 7 + mxc_iomux_set_pad(MX31_PIN_SRXD3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 8 + mxc_iomux_set_pad(MX31_PIN_SCK3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 9 + mxc_iomux_set_pad(MX31_PIN_SFS3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 10 + mxc_iomux_set_pad(MX31_PIN_STXD6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 11 + mxc_iomux_set_pad(MX31_PIN_SRXD6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 12 + mxc_iomux_set_pad(MX31_PIN_SCK6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 13 + mxc_iomux_set_pad(MX31_PIN_CAPTURE, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 14 + mxc_iomux_set_pad(MX31_PIN_COMPARE, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 12 + + /* + * Turn off default pullups on high asserted control signals. + * These are pulled down externally, so it will just waste + * power and create voltage divider action to pull them up + * on chip. + */ + mxc_iomux_set_pad(MX31_PIN_USBH2_STP, PAD_CTL_PKE_NONE); // ATA_DMARQ + mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, PAD_CTL_PKE_NONE); // ATA_INTRQ +} + +EXPORT_SYMBOL(gpio_ata_active); + +/*! + * Restore ATA interface pins to reset values + * + */ +void gpio_ata_inactive(void) +{ + __raw_writew(PBC_BCTRL2_ATA_EN, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + /* + * Turn off ATA group B signals + */ + mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D7 + mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D8 + mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D11 + mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D12 + mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D13 + mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D14 + mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D15 + + /* These ATA pins are common to Group A and Group B */ + + mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + + /* Needed fast slew rate for UDMA mode */ + + mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 0 + mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 1 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 2 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 3 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 4 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 5 + mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 6 + mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 7 + mxc_iomux_set_pad(MX31_PIN_SRXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 8 + mxc_iomux_set_pad(MX31_PIN_SCK3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 9 + mxc_iomux_set_pad(MX31_PIN_SFS3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 10 + mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 11 + mxc_iomux_set_pad(MX31_PIN_SRXD6, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 12 + mxc_iomux_set_pad(MX31_PIN_SCK6, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 13 + mxc_iomux_set_pad(MX31_PIN_CAPTURE, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 14 + mxc_iomux_set_pad(MX31_PIN_COMPARE, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 12 +} + +EXPORT_SYMBOL(gpio_ata_inactive); + +/*! + * Setup EDIO/IOMUX for external UART. + * + * @param port UART port + * @param irq Interrupt line to allocate + * @param handler Function to be called when the IRQ occurs + * @param irq_flags Interrupt type flags + * @param devname An ascii name for the claiming device + * @param dev_id A cookie passed back to the handler function + * @return Returns 0 if the interrupt was successfully requested, + * otherwise returns an error code. + */ +int extuart_intr_setup(unsigned int port, unsigned int irq, + irqreturn_t(*handler) (int, void *), + unsigned long irq_flags, const char *devname, + void *dev_id) +{ + return 0; +} + +/*! + * Get the EDIO interrupt, clear if set. + * + * @param port UART port + */ +void extuart_intr_clear(unsigned int port) +{ +} + +/*! + * Do IOMUX configs required to put the + * pin back in low power mode. + * + * @param port UART port + * @param irq Interrupt line to free + * @param dev_id Device identity to free + * @return Returns 0 if the interrupt was successfully freed, + * otherwise returns an error code. + */ +int extuart_intr_cleanup(unsigned int port, unsigned int irq, void *dev_id) +{ + return 0; +} + +/* *INDENT-OFF* */ +/* + * USB Host 1 + * pins conflict with SPI1, ATA, UART3 + */ +int gpio_usbh1_active(void) +{ + if (mxc_request_iomux(MX31_PIN_CSPI1_MOSI, /* USBH1_RXDM */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_MISO, /* USBH1_RXDP */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_SS0, /* USBH1_TXDM */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_SS1, /* USBH1_TXDP */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_SS2, /* USBH1_RCV */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_SCLK, /* USBH1_OEB (_TXOE) */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1) || + mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, /* USBH1_FS */ + OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1)) { + return -EINVAL; + } + + mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, /* USBH1_RXDM */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, /* USBH1_RXDP */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, /* USBH1_TXDM */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, /* USBH1_TXDP */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, /* USBH1_RCV */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, /* USBH1_OEB (_TXOE) */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, /* USBH1_FS */ + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true); + + __raw_writew(PBC_BCTRL3_FSH_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); /* enable FSH */ + __raw_writew(PBC_BCTRL3_FSH_SEL, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); /* Group B */ + __raw_writew(PBC_BCTRL3_FSH_MOD, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); /* single ended */ + __raw_writew(PBC_BCTRL3_FSH_VBUS_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); /* enable FSH VBUS */ + + return 0; +} + +EXPORT_SYMBOL(gpio_usbh1_active); + +void gpio_usbh1_inactive(void) +{ + /* Do nothing as pins don't have/support GPIO mode */ + +} + +EXPORT_SYMBOL(gpio_usbh1_inactive); + +/* + * USB Host 2 + * pins conflict with UART5, PCMCIA + */ +int gpio_usbh2_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBH2_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBH2_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_PC_VS2, /* USBH2_DATA2 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_PC_BVD1, /* USBH2_DATA3 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_PC_BVD2, /* USBH2_DATA4 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_PC_RST, /* USBH2_DATA5 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_IOIS16, /* USBH2_DATA6 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_PC_RW_B, /* USBH2_DATA7 */ + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFWE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFRE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFALE, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFCLE, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFWP_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE) || + mxc_request_iomux(MX31_PIN_NFCE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE)) { + return -EINVAL; + } + +#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) + mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); + mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */ + mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */ + mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */ + mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */ + mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */ + mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */ +#undef H2_PAD_CFG + + mxc_iomux_set_gpr(MUX_PGP_UH2, true); + + __raw_writew(PBC_BCTRL3_HSH_SEL, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); /* enable HSH select */ + __raw_writew(PBC_BCTRL3_HSH_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); /* enable HSH */ + + return 0; +} + +EXPORT_SYMBOL(gpio_usbh2_active); + +void gpio_usbh2_inactive(void) +{ + iomux_config_gpr(MUX_PGP_UH2, false); + + iomux_config_pad(MX31_PIN_USBH2_CLK, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_USBH2_DIR, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_USBH2_NXT, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_USBH2_STP, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_USBH2_DATA0, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_USBH2_DATA1, + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_SRXD6, /* USBH2_DATA2 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_STXD6, /* USBH2_DATA3 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_SFS3, /* USBH2_DATA4 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_SCK3, /* USBH2_DATA5 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_SRXD3, /* USBH2_DATA6 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + iomux_config_pad(MX31_PIN_STXD3, /* USBH2_DATA7 */ + (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); + + mxc_free_iomux(MX31_PIN_NFWE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_NFRE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_NFALE, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_NFCLE, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_NFWP_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_NFCE_B, + OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + + __raw_writew(PBC_BCTRL3_HSH_SEL, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); + __raw_writew(PBC_BCTRL3_HSH_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); +} + +EXPORT_SYMBOL(gpio_usbh2_inactive); + +/* + * USB OTG HS port + */ +int gpio_usbotg_hs_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA2, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA3, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA4, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA5, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA6, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA7, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC)) { + return -EINVAL; + } + + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, + (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST)); + + /* enable OTG/HS */ + __raw_writew(PBC_BCTRL3_OTG_HS_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); + /* disable OTG/FS */ + __raw_writew(PBC_BCTRL3_OTG_FS_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); + return 0; +} + +EXPORT_SYMBOL(gpio_usbotg_hs_active); + +void gpio_usbotg_hs_inactive(void) +{ + /* Do nothing as pins doesn't have/support GPIO mode */ + +} + +EXPORT_SYMBOL(gpio_usbotg_hs_inactive); + +/* + * USB OTG FS port + */ +int gpio_usbotg_fs_active(void) +{ + if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA1, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA2, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA3, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA4, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA5, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA6, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DATA7, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_CLK, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_DIR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_NXT, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USBOTG_STP, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || + mxc_request_iomux(MX31_PIN_USB_PWR, + OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC)) { + return -EINVAL; + } + + /* disable OTG/HS */ + __raw_writew(PBC_BCTRL3_OTG_HS_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); + /* enable OTG/FS */ + __raw_writew(PBC_BCTRL3_OTG_FS_EN, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); + +#if defined(CONFIG_MC13783_MXC) + /* Select PMIC transceiver */ + __raw_writew(PBC_BCTRL3_OTG_FS_SEL, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); +#endif + return 0; + +} + +EXPORT_SYMBOL(gpio_usbotg_fs_active); + +void gpio_usbotg_fs_inactive(void) +{ + /* Do nothing as pins doesn't have/support GPIO mode */ + +} + +EXPORT_SYMBOL(gpio_usbotg_fs_inactive); +/* *INDENT-ON* */ + +/*! + * Setup GPIO for PCMCIA interface + * + */ +void gpio_pcmcia_active(void) +{ + u16 temp; + + mxc_request_iomux(MX31_PIN_SDBA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SDBA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + iomux_config_mux(MX31_PIN_LBA, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_RW, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_EB0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_EB1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_OE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + iomux_config_mux(MX31_PIN_IOIS16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_POE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_READY, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_RST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_RW_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_VS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_VS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + iomux_config_mux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_FUNC, + INPUTCONFIG_FUNC); + + /* PCMCIA VPP, VCC Enable, 1 = power on */ + temp = PBC_BCTRL2_VPP_EN | PBC_BCTRL2_VCC_EN; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + + /* Set up Card2 Select pin for PCMCIA, 0 = PCMCIA & SD2 */ + temp = PBC_BCTRL3_CARD2_SEL; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL3_CLEAR); + + /* PCMCIA Enable, 0 = enable */ + temp = PBC_BCTRL4_PCMCIA_EN; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL4_CLEAR); + mdelay(1); +} + +EXPORT_SYMBOL(gpio_pcmcia_active); + +/*! + * Setup GPIO for pcmcia to be inactive + */ +void gpio_pcmcia_inactive(void) +{ + u16 temp; + + /* PCMCIA Enable, 0 = enable */ + temp = PBC_BCTRL4_PCMCIA_EN; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL4_SET); + + /* Set up Card2 Select pin for PCMCIA, 0 = PCMCIA & SD2 */ + temp = PBC_BCTRL3_CARD2_SEL; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL3_SET); + + /* PCMCIA VPP, VCC Enable, 1 = power on */ + temp = PBC_BCTRL2_VPP_EN | PBC_BCTRL2_VCC_EN; + __raw_writew(temp, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); +} + +EXPORT_SYMBOL(gpio_pcmcia_inactive); +/*! + * Setup IR to be used by UART and FIRI + */ +void gpio_firi_init(void) +{ + gpio_uart_active(1, 0); +} + +EXPORT_SYMBOL(gpio_firi_init); + +/*! + * Setup IR to be used by UART + */ +void gpio_firi_inactive(void) +{ + unsigned int pbc_bctrl2_set = 0, pbc_bctrl2_clr = 0; + + iomux_config_gpr(MUX_PGP_FIRI, false); + mxc_request_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + pbc_bctrl2_set |= PBC_BCTRL2_IRDA_MOD; + __raw_writew(pbc_bctrl2_set, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + + pbc_bctrl2_clr |= PBC_BCTRL2_IRDA_MOD; + __raw_writew(pbc_bctrl2_clr, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); +} + +EXPORT_SYMBOL(gpio_firi_inactive); + +/*! + * Setup IR to be used by FIRI + */ +void gpio_firi_active(void *fir_cong_reg_base, unsigned int tpp_mask) +{ + unsigned int pbc_bctrl2_set = 0, pbc_bctrl2_clr = 0; + unsigned int cr; + + iomux_config_gpr(MUX_PGP_FIRI, true); + + cr = readl(fir_cong_reg_base); + cr &= ~tpp_mask; + writel(cr, fir_cong_reg_base); + + pbc_bctrl2_clr |= PBC_BCTRL2_IRDA_MOD; + __raw_writew(pbc_bctrl2_clr, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + + pbc_bctrl2_set |= PBC_BCTRL2_IRDA_MOD; + __raw_writew(pbc_bctrl2_set, PBC_BASE_ADDRESS + PBC_BCTRL2_SET); + + cr = readl(fir_cong_reg_base); + cr |= tpp_mask; + writel(cr, fir_cong_reg_base); + + __raw_writew(pbc_bctrl2_clr, PBC_BASE_ADDRESS + PBC_BCTRL2_CLEAR); + + cr = readl(fir_cong_reg_base); + cr &= ~tpp_mask; + writel(cr, fir_cong_reg_base); +} + +EXPORT_SYMBOL(gpio_firi_active); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx3_3stack.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx3_3stack.c @@ -0,0 +1,1075 @@ +/* + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include + +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "board-mx3_3stack.h" +#include "crm_regs.h" +#include "iomux.h" +/*! + * @file mach-mx3/mx3_3stack.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX31 + */ + +extern void mxc_map_io(void); +extern void mxc_init_irq(void); +extern void mxc_cpu_init(void) __init; +extern void mxc_cpu_common_init(void); +extern void __init early_console_setup(char *); +extern int mxc_init_devices(void); + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE) +static u16 keymapping[12] = { + KEY_UP, KEY_DOWN, 0, 0, + KEY_RIGHT, KEY_LEFT, KEY_ENTER, 0, + KEY_F6, KEY_F8, KEY_F9, KEY_F10, +}; + +static struct resource mxc_kpp_resources[] = { + [0] = { + .start = MXC_INT_KPP, + .end = MXC_INT_KPP, + .flags = IORESOURCE_IRQ, + } +}; + +static struct keypad_data keypad_plat_data = { + .rowmax = 3, + .colmax = 4, + .irq = MXC_INT_KPP, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +/* mxc keypad driver */ +static struct platform_device mxc_keypad_device = { + .name = "mxc_keypad", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_kpp_resources), + .resource = mxc_kpp_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &keypad_plat_data, + }, +}; + +static void mxc_init_keypad(void) +{ + (void)platform_device_register(&mxc_keypad_device); +} +#else +static inline void mxc_init_keypad(void) +{ +} +#endif + +/* MTD NAND flash */ +#if defined(CONFIG_MTD_NAND_MXC) || defined(CONFIG_MTD_NAND_MXC_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V2) || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) + +static struct mtd_partition mxc_nand_partitions[] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 180 * 1024 * 1024}, + { + .name = "nand.configure", + .offset = MTDPART_OFS_APPEND, + .size = 8 * 1024 * 1024}, + { + .name = "nand.userfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +static struct flash_platform_data mxc_nand_data = { + .parts = mxc_nand_partitions, + .nr_parts = ARRAY_SIZE(mxc_nand_partitions), + .width = 1, +}; + +static struct platform_device mxc_nand_mtd_device = { + .name = "mxc_nand_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static struct platform_device mxc_nandv2_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ + if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) { + mxc_nand_data.width = 2; + } + if (cpu_is_mx31()) { + (void)platform_device_register(&mxc_nand_mtd_device); + } + if (cpu_is_mx32()) { + (void)platform_device_register(&mxc_nandv2_mtd_device); + } +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +static void lcd_reset(void) +{ + /* ensure that LCDIO(1.8V) has been turn on */ + /* active reset line GPIO */ + mxc_request_iomux(MX31_PIN_LCS1, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_LCS1), "lcs1"); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_LCS1), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_LCS1), 0); + /* do reset */ + msleep(10); /* tRES >= 100us */ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_LCS1), 1); + msleep(60); +#ifdef CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_LCS1), 0); +#endif +} + +static struct mxc_lcd_platform_data lcd_data = { + .io_reg = "VGEN", +#ifdef CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL + .core_reg = "GPO1", +#else + .core_reg = "VMMC1", +#endif + .reset = lcd_reset, +}; + +static struct mxc_camera_platform_data camera_data = { + .core_regulator = "VVIB", + .io_regulator = "VMMC1", + .analog_regulator = "SW2B", + .gpo_regulator = "GPO3", + .mclk = 27000000, +}; + +struct mxc_tvout_platform_data tvout_data = { + .io_reg = "VGEN", + .core_reg = "GPO3", + .analog_reg = "GPO1", + .detect_line = 49, +}; + +void si4702_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SRST0), 0); + msleep(100); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SRST0), 1); + msleep(100); +} + +void si4702_clock_ctl(int flag) +{ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_SIMPD0), flag); +} + +static void si4702_gpio_get(void) +{ + /* reset pin */ + mxc_request_iomux(MX31_PIN_SRST0, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SRST0), "srst0"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_SRST0), 0); + + mxc_request_iomux(MX31_PIN_SIMPD0, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SIMPD0), "simpd0"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_SIMPD0), 0); +} + +static void si4702_gpio_put(void) +{ + mxc_free_iomux(MX31_PIN_SRST0, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + mxc_free_iomux(MX31_PIN_SIMPD0, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); +} + +static struct mxc_fm_platform_data si4702_data = { + .reg_vio = "GPO3", + .reg_vdd = "VMMC1", + .gpio_get = si4702_gpio_get, + .gpio_put = si4702_gpio_put, + .reset = si4702_reset, + .clock_ctl = si4702_clock_ctl, + .sksnr = 0, + .skcnt = 0, + .band = 0, + .space = 100, + .seekth = 0xa, +}; + +/* setup GPIO for mma7450 */ +static void gpio_mma7450_get(void) +{ + mxc_request_iomux(MX31_PIN_STX0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_iomux_set_pad(MX31_PIN_STX0, PAD_CTL_PKE_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_STX0), "stx0"); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_STX0)); + + mxc_request_iomux(MX31_PIN_SRX0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_iomux_set_pad(MX31_PIN_SRX0, PAD_CTL_PKE_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_SRX0), "srx0"); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SRX0)); +} + +static void gpio_mma7450_put(void) +{ + mxc_free_iomux(MX31_PIN_STX0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); + mxc_free_iomux(MX31_PIN_SRX0, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO); +} + +static struct mxc_mma7450_platform_data mma7450_data = { + .reg_dvdd_io = "GPO3", + .reg_avdd = "VMMC1", + .gpio_pin_get = gpio_mma7450_get, + .gpio_pin_put = gpio_mma7450_put, + .int1 = IOMUX_TO_IRQ(MX31_PIN_STX0), + .int2 = IOMUX_TO_IRQ(MX31_PIN_SRX0), +}; + +static struct i2c_board_info mxc_i2c_board_info[] __initdata = { + { + .type = "ov2640", + .addr = 0x30, + .platform_data = (void *)&camera_data,}, + { + .type = "ch7024", + .addr = 0x76, + .platform_data = (void *)&tvout_data, + .irq = IOMUX_TO_IRQ(MX31_PIN_BATT_LINE),}, + { + .type = "si4702", + .addr = 0x10, + .platform_data = (void *)&si4702_data, + }, + { + .type = "mma7450", + .addr = 0x1d, + .platform_data = (void *)&mma7450_data, + }, +}; + +static struct spi_board_info mxc_spi_board_info[] __initdata = { + { + .modalias = "pmic_spi", + .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), + .max_speed_hz = 4000000, + .bus_num = 2, + .chip_select = 2, + }, + { + .modalias = "lcd_spi", + .platform_data = (void *)&lcd_data, + .max_speed_hz = 5000000, + .bus_num = 1, + .chip_select = 2, + }, +}; + +/*lan9217 device*/ +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +static struct resource smsc911x_resources[] = { + { + .start = LAN9217_BASE_ADDR, + .end = LAN9217_BASE_ADDR + 0x100, + .flags = IORESOURCE_MEM, + }, + { + .start = LAN9217_IRQ, + .end = LAN9217_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +struct smsc911x_platform_config smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, +}; + +static struct platform_device smsc_lan9217_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &smsc911x_config, + }, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, +}; +static void mxc_init_enet(void) +{ + (void)platform_device_register(&smsc_lan9217_device); +} +#else +static inline void mxc_init_enet(void) +{ +} +#endif + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static const char fb_default_mode[] = "Epson-VGA"; + +/* mxc lcd driver */ +static struct platform_device mxc_fb_device = { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &fb_default_mode, + .coherent_dma_mask = 0xFFFFFFFF, + }, +}; + +static struct platform_device mxc_fb_wvga_device = { + .name = "lcd_claa", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &lcd_data, + }, +}; + +static void mxc_init_fb(void) +{ + (void)platform_device_register(&mxc_fb_device); + (void)platform_device_register(&mxc_fb_wvga_device); +} +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +#if defined(CONFIG_BACKLIGHT_MXC) +static struct platform_device mxcbl_devices[] = { +#if defined(CONFIG_BACKLIGHT_MXC_IPU) || defined(CONFIG_BACKLIGHT_MXC_IPU_MODULE) + { + .name = "mxc_ipu_bl", + .id = 0, + .dev = { + .platform_data = (void *)3, /* DISP # for this backlight */ + }, + }, +#endif +}; +static inline void mxc_init_bl(void) +{ + int i; + for (i = 0; i < ARRAY_SIZE(mxcbl_devices); i++) { + platform_device_register(&mxcbl_devices[i]); + } +} +#else +static inline void mxc_init_bl(void) +{ +} +#endif + +#if defined(CONFIG_FB_MXC_TVOUT_CH7024) || \ + defined(CONFIG_FB_MXC_TVOUT_CH7024_MODULE) +static int mxc_init_ch7024(void) +{ + /* request gpio for phone jack detect */ + mxc_request_iomux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + mxc_iomux_set_pad(MX31_PIN_BATT_LINE, PAD_CTL_PKE_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_BATT_LINE), "batt_line"); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_BATT_LINE)); + + return 0; +} +#else +static inline int mxc_init_ch7024(void) +{ + return 0; +} +#endif + +static u32 brd_io; + +static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 imr_val; + u32 int_valid; + u32 expio_irq; + + desc->chip->mask(irq); /* irq = gpio irq number */ + + imr_val = __raw_readw(brd_io + INTR_MASK_REG); + int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val; + + if (unlikely(!int_valid)) { + goto out; + } + + expio_irq = MXC_BOARD_IRQ_START; + for (; int_valid != 0; int_valid >>= 1, expio_irq++) { + struct irq_desc *d; + if ((int_valid & 1) == 0) + continue; + d = irq_desc + expio_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nEXPIO irq: %d unhandled\n", + expio_irq); + BUG(); /* oops */ + } + d->handle_irq(expio_irq, d); + } + + out: + desc->chip->ack(irq); + desc->chip->unmask(irq); +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ + u16 reg; + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* mask the interrupt */ + reg = __raw_readw(brd_io + INTR_MASK_REG); + reg |= (1 << expio); + __raw_writew(reg, brd_io + INTR_MASK_REG); +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* clear the interrupt status */ + __raw_writew(1 << expio, brd_io + INTR_RESET_REG); + __raw_writew(0, brd_io + INTR_RESET_REG); + /* mask the interrupt */ + expio_mask_irq(irq); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ + u16 reg; + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* unmask the interrupt */ + reg = __raw_readw(brd_io + INTR_MASK_REG); + reg &= ~(1 << expio); + __raw_writew(reg, brd_io + INTR_MASK_REG); +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static int __init mxc_expio_init(void) +{ + int i; + + brd_io = (u32) ioremap(BOARD_IO_ADDR, SZ_4K); + if (brd_io == 0) + return -ENOMEM; + + if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) || + (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) || + (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) { + iounmap((void *)brd_io); + brd_io = 0; + return -ENODEV; + } + + pr_info("3-Stack Debug board detected, rev = 0x%04X\n", + readw(brd_io + CPLD_CODE_VER_REG)); + + /* + * Configure INT line as GPIO input + */ + mxc_request_iomux(MX31_PIN_GPIO1_1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "gpio1_1"); + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)); + + /* disable the interrupt and clear the status */ + __raw_writew(0, brd_io + INTR_MASK_REG); + __raw_writew(0xFFFF, brd_io + INTR_RESET_REG); + __raw_writew(0, brd_io + INTR_RESET_REG); + __raw_writew(0x1F, brd_io + INTR_MASK_REG); + for (i = MXC_BOARD_IRQ_START; i < (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS); i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(EXPIO_PARENT_INT, IRQF_TRIGGER_LOW); + set_irq_chained_handler(EXPIO_PARENT_INT, mxc_expio_irq_handler); + + return 0; +} + +#if (defined(CONFIG_MXC_PMIC_MC13783) || \ + defined(CONFIG_MXC_PMIC_MC13783_MODULE)) \ + && (defined(CONFIG_SND_MXC_PMIC) || defined(CONFIG_SND_MXC_PMIC_MODULE)) +static void __init mxc_init_pmic_audio(void) +{ + struct clk *ckih_clk; + struct clk *cko_clk; + + /* Enable 26 mhz clock on CKO1 for PMIC audio */ + ckih_clk = clk_get(NULL, "ckih"); + cko_clk = clk_get(NULL, "cko1_clk"); + if (IS_ERR(ckih_clk) || IS_ERR(cko_clk)) { + printk(KERN_ERR "Unable to set CKO1 output to CKIH\n"); + } else { + clk_set_parent(cko_clk, ckih_clk); + clk_set_rate(cko_clk, clk_get_rate(ckih_clk)); + clk_enable(cko_clk); + } + clk_put(ckih_clk); + clk_put(cko_clk); + + /* config Audio ports (4 & 5) */ + mxc_request_iomux(MX31_PIN_SCK4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SRXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_STXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SFS4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SCK5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SRXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_STXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + mxc_request_iomux(MX31_PIN_SFS5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); +} +#else +static void __inline mxc_init_pmic_audio(void) +{ +} +#endif + +/* MMC device data */ + +#if defined(CONFIG_MMC_MXC) || defined(CONFIG_MMC_MXC_MODULE) +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_32_33, + .min_clk = 150000, + .max_clk = 25000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .power_mmc = "GPO1", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC1, + .end = MXC_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | + MMC_VDD_31_32, + .min_clk = 150000, + .max_clk = 25000000, + .card_fixed = 1, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .power_mmc = "VMMC2", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxcmci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +/*! Device Definition for MXC SDHC2 */ +static struct platform_device mxcsdhc2_device = { + .name = "mxcmci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; + +static inline void mxc_init_mmc(void) +{ + int cd_irq; + + cd_irq = sdhc_init_card_det(0); + if (cd_irq) { + mxcsdhc1_device.resource[2].start = cd_irq; + mxcsdhc1_device.resource[2].end = cd_irq; + } + + cd_irq = sdhc_init_card_det(1); + if (cd_irq) { + mxcsdhc2_device.resource[2].start = cd_irq; + mxcsdhc2_device.resource[2].end = cd_irq; + } + + spba_take_ownership(SPBA_SDHC1, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc1_device); + + spba_take_ownership(SPBA_SDHC2, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc2_device); +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); + +#ifdef CONFIG_DISCONTIGMEM + do { + int nid; + mi->nr_banks = MXC_NUMNODES; + for (nid = 0; nid < mi->nr_banks; nid++) { + SET_NODE(mi, nid); + } + } while (0); +#endif +} + +/* IDE device data */ +#if defined(CONFIG_BLK_DEV_IDE_MXC) || defined(CONFIG_BLK_DEV_IDE_MXC_MODULE) + +/*! Platform Data for MXC IDE */ +static struct mxc_ide_platform_data mxc_ide_data = { + .power_drive = "GPO2", + .power_io = "GPO3", +}; + +static struct platform_device mxc_ide_device = { + .name = "mxc_ide", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ide_data, + }, +}; + +static inline void mxc_init_ide(void) +{ + if (platform_device_register(&mxc_ide_device) < 0) + printk(KERN_ERR "Error: Registering the ide.\n"); +} +#else +static inline void mxc_init_ide(void) +{ +} +#endif + +#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE) +extern void gpio_ata_active(void); +extern void gpio_ata_inactive(void); + +static int ata_init(struct platform_device *pdev) +{ + /* Configure the pins */ + gpio_ata_active(); + + return 0; +} + +static void ata_exit(void) +{ + /* Free the pins */ + gpio_ata_inactive(); +} + +static struct fsl_ata_platform_data ata_data = { + .udma_mask = ATA_UDMA3, /* board can handle up to UDMA3 */ + .mwdma_mask = ATA_MWDMA2, + .pio_mask = ATA_PIO4, + .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2, + .max_sg = MXC_IDE_DMA_BD_NR, + .init = ata_init, + .exit = ata_exit, + .core_reg = "GPO2", /*"LDO2", */ + .io_reg = "GPO3", /*"LDO3", */ +}; + +static struct resource pata_fsl_resources[] = { + [0] = { /* I/O */ + .start = ATA_BASE_ADDR + 0x00, + .end = ATA_BASE_ADDR + 0xD8, + .flags = IORESOURCE_MEM, + }, + [2] = { /* IRQ */ + .start = MXC_INT_ATA, + .end = MXC_INT_ATA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pata_fsl_device = { + .name = "pata_fsl", + .id = -1, + .num_resources = ARRAY_SIZE(pata_fsl_resources), + .resource = pata_fsl_resources, + .dev = { + .platform_data = &ata_data, + .coherent_dma_mask = ~0, + }, +}; + +static void __init mxc_init_pata(void) +{ + (void)platform_device_register(&pata_fsl_device); +} +#else /* CONFIG_PATA_FSL */ +static void __init mxc_init_pata(void) +{ +} +#endif /* CONFIG_PATA_FSL */ + +static void bt_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), 1); +} + +static struct mxc_bt_platform_data mxc_bt_data = { + .bt_vdd = "VMMC2", + .bt_vdd_parent = "GPO1", + .bt_vusb = NULL, + .bt_vusb_parent = "GPO3", + .bt_reset = bt_reset, +}; + +static struct platform_device mxc_bt_device = { + .name = "mxc_bt", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_bt_data, + }, +}; + +static void mxc_init_bluetooth(void) +{ + (void)platform_device_register(&mxc_bt_device); +} + +static void mxc_unifi_hardreset(int pin_level) +{ + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), pin_level & 0x01); +} + +static struct mxc_unifi_platform_data unifi_data = { + .hardreset = mxc_unifi_hardreset, + + /* GPO3 -> enables SW2B 1.8V out - this becomes 1V8 on personality + * board, then 1V8_EXT, then BT_VUSB + */ + .reg_gpo1 = "GPO3", + + /* GPO4 -> WiFi_PWEN, but this signal is not used on current boards */ + .reg_gpo2 = "GPO4", + + .reg_1v5_ana_bb = "VRF1", /* VRF1 -> WL_1V5ANA and WL_1V5BB */ + .reg_vdd_vpa = "VMMC2", /* VMMC2 -> WL_VDD and WL_VPA */ + .reg_1v5_dd = "VRF2", /* VRF2 -> WL_1V5DD */ + + .host_id = 1, +}; + +struct mxc_unifi_platform_data *get_unifi_plat_data(void) +{ + return &unifi_data; +} + +EXPORT_SYMBOL(get_unifi_plat_data); + +#if defined(CONFIG_GPS_IOCTRL) || defined(CONFIG_GPS_IOCTRL_MODULE) +static struct mxc_gps_platform_data gps_data = { + .core_reg = "GPO3", + .analog_reg = "GPO1", +}; + +static struct platform_device mxc_gps_device = { + .name = "gps_ioctrl", + .id = -1, + .dev = { + .platform_data = &gps_data, + }, +}; + +static void __init mxc_init_gps(void) +{ + (void)platform_device_register(&mxc_gps_device); +} +#else +static void __init mxc_init_gps(void) +{ +} +#endif + +static void __init mx3_3stack_timer_init(void) +{ + mx31_clocks_init(26000000); +} + +static struct sys_timer mxc_timer = { + .init = mx3_3stack_timer_init, +}; + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + /* config CS5 for debug board */ + mxc_request_iomux(MX31_PIN_CS5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); + + mxc_cpu_common_init(); + mxc_register_gpios(); + early_console_setup(saved_command_line); + mxc_init_devices(); + + /*Pull down MX31_PIN_USB_BYP to reset USB3317 */ + mxc_request_iomux(MX31_PIN_USB_BYP, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), "usb_byp"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_USB_BYP), 0); + mxc_free_iomux(MX31_PIN_USB_BYP, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); + + /* Reset BT/WiFi chip */ + mxc_request_iomux(MX31_PIN_DCD_DCE1, OUTPUTCONFIG_GPIO, + INPUTCONFIG_NONE); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), "dcd_dce1"); + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), 0); + gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1), 0); + + mxc_init_pmic_audio(); + mxc_expio_init(); + mxc_init_keypad(); + mxc_init_enet(); + mxc_init_nand_mtd(); + mxc_init_ch7024(); + mx3_3stack_init_mc13783(); + + i2c_register_board_info(0, mxc_i2c_board_info, + ARRAY_SIZE(mxc_i2c_board_info)); + spi_register_board_info(mxc_spi_board_info, + ARRAY_SIZE(mxc_spi_board_info)); + + mxc_init_fb(); + mxc_init_bl(); + mxc_init_mmc(); + mxc_init_ide(); + mxc_init_pata(); + mxc_init_bluetooth(); + mxc_init_gps(); +} + +#define PLL_PCTL_REG(pd, mfd, mfi, mfn) \ + ((((pd) - 1) << 26) + (((mfd) - 1) << 16) + ((mfi) << 10) + mfn) + +/* For 26MHz input clock */ +#define PLL_532MHZ PLL_PCTL_REG(1, 13, 10, 3) +#define PLL_399MHZ PLL_PCTL_REG(1, 52, 7, 35) +#define PLL_133MHZ PLL_PCTL_REG(2, 26, 5, 3) + +#define PDR0_REG(mcu, max, hsp, ipg, nfc) \ + (MXC_CCM_PDR0_MCU_DIV_##mcu | MXC_CCM_PDR0_MAX_DIV_##max | \ + MXC_CCM_PDR0_HSP_DIV_##hsp | MXC_CCM_PDR0_IPG_DIV_##ipg | \ + MXC_CCM_PDR0_NFC_DIV_##nfc) + +/* working point(wp): 0 - 133MHz; 1 - 266MHz; 2 - 399MHz; 3 - 532MHz */ +/* 26MHz input clock table */ +static struct cpu_wp cpu_wp_26[] = { + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 133000000, + .pdr0_reg = PDR0_REG(4, 4, 4, 2, 6),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 266000000, + .pdr0_reg = PDR0_REG(2, 4, 4, 2, 6),}, + { + .pll_reg = PLL_399MHZ, + .pll_rate = 399000000, + .cpu_rate = 399000000, + .pdr0_reg = PDR0_REG(1, 3, 3, 2, 6),}, + { + .pll_reg = PLL_532MHZ, + .pll_rate = 532000000, + .cpu_rate = 532000000, + .pdr0_reg = PDR0_REG(1, 4, 4, 2, 6),}, +}; + +struct cpu_wp *get_cpu_wp(int *wp) +{ + *wp = 4; + return cpu_wp_26; +} + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX3_3STACK data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX31_3DS, "Freescale MX31/MX32 3-Stack Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx31_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/sdma_script_code_pass2.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/sdma_script_code_pass2.h @@ -0,0 +1,434 @@ +/* + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/******************************************************************************* + + SDMA RELEASE LABEL: "SS15_MX31" + +*******************************************************************************/ + +#ifndef __SDMA_SCRIPT_CODE_PASS2_H__ +#define __SDMA_SCRIPT_CODE_PASS2_H__ + +/*! +* SDMA ROM scripts start addresses and sizes +*/ + +#define start_ADDR_2 0 +#define start_SIZE_2 20 + +#define core_ADDR_2 80 +#define core_SIZE_2 152 + +#define common_ADDR_2 232 +#define common_SIZE_2 191 + +#define ap_2_ap_ADDR_2 423 +#define ap_2_ap_SIZE_2 294 + +#define bp_2_bp_ADDR_2 717 +#define bp_2_bp_SIZE_2 112 + +#define ap_2_bp_ADDR_2 829 +#define ap_2_bp_SIZE_2 200 + +#define bp_2_ap_ADDR_2 1029 +#define bp_2_ap_SIZE_2 223 + +#define app_2_mcu_ADDR_2 1252 +#define app_2_mcu_SIZE_2 101 + +#define mcu_2_app_ADDR_2 1353 +#define mcu_2_app_SIZE_2 127 + +#define uart_2_mcu_ADDR_2 1480 +#define uart_2_mcu_SIZE_2 105 + +#define uartsh_2_mcu_ADDR_2 1585 +#define uartsh_2_mcu_SIZE_2 98 + +#define mcu_2_shp_ADDR_2 1683 +#define mcu_2_shp_SIZE_2 123 + +#define shp_2_mcu_ADDR_2 1806 +#define shp_2_mcu_SIZE_2 101 + +#define error_ADDR_2 1907 +#define error_SIZE_2 73 + +#define test_ADDR_2 1980 +#define test_SIZE_2 63 + +#define signature_ADDR_2 1023 +#define signature_SIZE_2 1 + +/*! +* SDMA RAM scripts start addresses and sizes +*/ + +#define ap_2_ap_fixed_addr_ADDR_2 6144 +#define ap_2_ap_fixed_addr_SIZE_2 68 + +#define app_2_mcu_patched_ADDR_2 6212 +#define app_2_mcu_patched_SIZE_2 104 + +#undef app_2_mcu_ADDR_2 +#undef app_2_mcu_SIZE_2 + +/*mapping the app_2_mcu start address to the patched(RAM)script start address*/ +#define app_2_mcu_ADDR_2 app_2_mcu_patched_ADDR_2 +#define app_2_mcu_SIZE_2 app_2_mcu_patched_SIZE_2 + +#define app_2_per_ADDR_2 6316 +#define app_2_per_SIZE_2 105 + +#define ata_2_mcu_ADDR_2 6421 +#define ata_2_mcu_SIZE_2 110 + +#define firi_2_mcu_ADDR_2 6531 +#define firi_2_mcu_SIZE_2 114 + +#define loop_DMAs_fixed_addr_ADDR_2 6645 +#define loop_DMAs_fixed_addr_SIZE_2 90 + +#define mcu_2_app_patched_ADDR_2 6735 +#define mcu_2_app_patched_SIZE_2 129 + +#undef mcu_2_app_ADDR_2 +#undef mcu_2_app_SIZE_2 + +/*mapping the mcu_2_app start address to the patched(RAM)script start address*/ +#define mcu_2_app_ADDR_2 mcu_2_app_patched_ADDR_2 +#define mcu_2_app_SIZE_2 mcu_2_app_patched_SIZE_2 + +#define mcu_2_ata_ADDR_2 6864 +#define mcu_2_ata_SIZE_2 87 + +#define mcu_2_firi_ADDR_2 6951 +#define mcu_2_firi_SIZE_2 77 + +#define mcu_2_mshc_ADDR_2 7028 +#define mcu_2_mshc_SIZE_2 48 + +#define mcu_2_shp_patched_ADDR_2 7076 +#define mcu_2_shp_patched_SIZE_2 125 + +#undef mcu_2_shp_ADDR_2 +#undef mcu_2_shp_SIZE_2 + +/*mapping the mcu_2_shp start address to the patched(RAM)script start address*/ +#define mcu_2_shp_ADDR_2 mcu_2_shp_patched_ADDR_2 +#define mcu_2_shp_SIZE_2 mcu_2_shp_patched_SIZE_2 + +#define mshc_2_mcu_ADDR_2 7201 +#define mshc_2_mcu_SIZE_2 60 + +#define per_2_app_ADDR_2 7261 +#define per_2_app_SIZE_2 131 + +#define per_2_shp_ADDR_2 7392 +#define per_2_shp_SIZE_2 131 + +#define shp_2_mcu_patched_ADDR_2 7523 +#define shp_2_mcu_patched_SIZE_2 104 + +#undef shp_2_mcu_ADDR_2 +#undef shp_2_mcu_SIZE_2 + +/*mapping the shp_2_mcu start address to the patched(RAM)script start address*/ +#define shp_2_mcu_ADDR_2 shp_2_mcu_patched_ADDR_2 +#define shp_2_mcu_SIZE_2 shp_2_mcu_patched_SIZE_2 + +#define shp_2_per_ADDR_2 7627 +#define shp_2_per_SIZE_2 109 + +#define uart_2_mcu_patched_ADDR_2 7736 +#define uart_2_mcu_patched_SIZE_2 106 + +#undef uart_2_mcu_ADDR_2 +#undef uart_2_mcu_SIZE_2 + +/*mapping the uart_2_mcu start address to the patched(RAM)script start address*/ +#define uart_2_mcu_ADDR_2 uart_2_mcu_patched_ADDR_2 +#define uart_2_mcu_SIZE_2 uart_2_mcu_patched_SIZE_2 + +#define uartsh_2_mcu_patched_ADDR_2 7842 +#define uartsh_2_mcu_patched_SIZE_2 99 + +#undef uartsh_2_mcu_ADDR_2 +#undef uartsh_2_mcu_SIZE_2 + +/* + * mapping the uartsh_2_mcu start address to the patched(RAM)script + * start address + */ +#define uartsh_2_mcu_ADDR_2 uartsh_2_mcu_patched_ADDR_2 +#define uartsh_2_mcu_SIZE_2 uartsh_2_mcu_patched_SIZE_2 + +/*! +* SDMA RAM image start address and size +*/ + +#define RAM_CODE_START_ADDR_2 6144 +#define RAM_CODE_SIZE_2 1797 + +/*! +* Buffer that holds the SDMA RAM image +*/ + +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static const short sdma_code_2[] = { + 0x0970, 0x0111, 0x5111, 0x5ef9, 0xc0ec, 0x7d23, 0x5ad1, 0x5bd9, + 0xc0fe, 0x7c1f, 0x5ce1, 0x5de9, 0x5ef1, 0x08ff, 0x0011, 0x28ff, + 0x00bc, 0x048e, 0x56f9, 0x0660, 0x7d05, 0x0661, 0x7c2b, 0x6c07, + 0x6d13, 0x9821, 0x0661, 0x7d26, 0x6c17, 0x6d03, 0x028d, 0x058c, + 0x048a, 0xd9f5, 0x7e08, 0x7f07, 0x54e1, 0x52d1, 0x53d9, 0xc10d, + 0x7dde, 0x0200, 0x9804, 0x0660, 0x7d03, 0x6007, 0x52f1, 0x9832, + 0x6003, 0x52e9, 0x00a2, 0x0007, 0x6a0c, 0x6a0c, 0x6207, 0x6a07, + 0x6a2b, 0x6a28, 0x0007, 0x6a0c, 0x54e1, 0xc795, 0x048b, 0x0498, + 0x0454, 0x9825, 0x0800, 0x983c, 0x0870, 0x0011, 0x5010, 0xc0ec, + 0x7d61, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x984a, 0x6ec3, 0x6d07, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x4d00, 0x7d45, 0x0b70, 0x0311, 0x522b, 0x5313, 0x02b9, 0x4a00, + 0x7c04, 0x6a28, 0x7f3b, 0x0400, 0x985a, 0x008f, 0x00d5, 0x7d01, + 0x008d, 0x05a0, 0x0a03, 0x0212, 0x02bc, 0x0210, 0x4a00, 0x7d1c, + 0x4a02, 0x7d20, 0x4a01, 0x7d23, 0x0b70, 0x0311, 0x53eb, 0x62c8, + 0x7e25, 0x0360, 0x7d02, 0x0210, 0x0212, 0x6a09, 0x7f1f, 0x0212, + 0x6a09, 0x7f1c, 0x0212, 0x6a09, 0x7f19, 0x2003, 0x4800, 0x7cef, + 0x0b70, 0x0311, 0x5313, 0x989b, 0x0015, 0x0015, 0x7802, 0x62c8, + 0x6a0b, 0x989a, 0x0015, 0x7802, 0x62c8, 0x6a0a, 0x989a, 0x7802, + 0x62c8, 0x6a09, 0x7c03, 0x6a28, 0x0000, 0x9858, 0xc77b, 0x6a28, + 0x7ffd, 0x0870, 0x0011, 0x5010, 0x52c0, 0x53c8, 0xc10d, 0x7da2, + 0x0200, 0x984a, 0x0200, 0x9847, 0x0870, 0x0011, 0x5010, 0xc0ec, + 0x7d62, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x98b2, 0x6ec3, 0x6dd7, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x4d00, 0x7d46, 0x0b70, 0x0311, 0x522b, 0x5313, 0x02b9, 0x4a00, + 0x7c04, 0x62ff, 0x7e3c, 0x0400, 0x98c2, 0x008f, 0x00d5, 0x7d01, + 0x008d, 0x05a0, 0x0a03, 0x0212, 0x02bc, 0x0210, 0x4a00, 0x7d28, + 0x4a02, 0x7d20, 0x4a01, 0x7d19, 0x6ddd, 0x0b70, 0x0311, 0x53eb, + 0x62c8, 0x7e25, 0x0360, 0x7d02, 0x0210, 0x0212, 0x6ac8, 0x7f1f, + 0x0212, 0x6ac8, 0x7f1c, 0x0212, 0x6ac8, 0x7f19, 0x2003, 0x4800, + 0x7cef, 0x0b70, 0x0311, 0x5313, 0x9905, 0x6ddd, 0x7802, 0x62c8, + 0x6ac8, 0x9904, 0x6dde, 0x0015, 0x7802, 0x62c8, 0x6ac8, 0x9904, + 0x0015, 0x0015, 0x7801, 0x62d8, 0x7c02, 0x0000, 0x98c0, 0xc777, + 0x62ff, 0x7efd, 0x0870, 0x0011, 0x5010, 0x52c0, 0x53c8, 0xc10d, + 0x7da1, 0x0200, 0x98b2, 0x0200, 0x98af, 0xc19d, 0xc0ec, 0x7d69, + 0x0c70, 0x0411, 0x5414, 0x5ac4, 0x028c, 0x58da, 0x5efa, 0xc0fe, + 0x56fa, 0x7d02, 0x0200, 0x991e, 0x6d07, 0x5bca, 0x5cd2, 0x0bff, + 0x0311, 0x1bff, 0x04bb, 0x0415, 0x53da, 0x4c00, 0x7d47, 0x0a70, + 0x0211, 0x552a, 0x5212, 0x008d, 0x00bb, 0x4800, 0x7c07, 0x05b9, + 0x4d00, 0x7c13, 0x6928, 0x7f2d, 0x0400, 0x992f, 0x008f, 0x0015, + 0x04d8, 0x7d01, 0x008c, 0x04a0, 0x0015, 0x7802, 0x55c6, 0x6d0b, + 0x7e29, 0x6d28, 0x7f1e, 0x0000, 0x992d, 0x1e20, 0x5506, 0x2620, + 0x008d, 0x0560, 0x7c08, 0x065f, 0x55c6, 0x063f, 0x7e1b, 0x6d0a, + 0x7f10, 0x4c00, 0x7d1b, 0x04d8, 0x7d02, 0x008c, 0x0020, 0x04a0, + 0x0015, 0x7802, 0x55c6, 0x6d0b, 0x7e0d, 0x6d28, 0x7f02, 0x0000, + 0x9976, 0x0007, 0x680c, 0x6d0c, 0x6507, 0x6d07, 0x6d2b, 0x6d28, + 0x0007, 0x680c, 0x0007, 0x54d2, 0x0454, 0x9979, 0x6928, 0x7ff1, + 0x54d2, 0x008a, 0x52c0, 0x53c8, 0xc10d, 0x0288, 0x7d9f, 0x0200, + 0x991e, 0x0200, 0x9916, 0x1e10, 0x0870, 0x0011, 0x5010, 0xc0ec, + 0x7d39, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x998a, 0x6d07, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, + 0x7d17, 0x6ec3, 0x62c8, 0x7e28, 0x0264, 0x7d08, 0x0b70, 0x0311, + 0x522b, 0x02b9, 0x4a00, 0x7c18, 0x0400, 0x9999, 0x0212, 0x3aff, + 0x008a, 0x05d8, 0x7d01, 0x008d, 0x0a10, 0x6ed3, 0x6ac8, 0xd9d4, + 0x6a28, 0x7f17, 0x0b70, 0x0311, 0x5013, 0xd9ec, 0x52c0, 0x53c8, + 0xc10d, 0x7dd0, 0x0200, 0x998a, 0x008f, 0x00d5, 0x7d01, 0x008d, + 0xd9d4, 0x9997, 0x0200, 0x9987, 0x0007, 0x68cc, 0x6a28, 0x7f01, + 0x99d2, 0x0007, 0x6a0c, 0x6a0c, 0x6207, 0x6a07, 0x6a2b, 0x6a28, + 0x0007, 0x680c, 0x0454, 0x99b0, 0x05a0, 0x1e08, 0x6ec3, 0x0388, + 0x3b03, 0x0015, 0x0015, 0x7802, 0x62c8, 0x6a0b, 0x7ee5, 0x6a28, + 0x7fe8, 0x0000, 0x6ec1, 0x008b, 0x7802, 0x62c8, 0x6a09, 0x7edc, + 0x6a28, 0x7fdf, 0x2608, 0x0006, 0x55f0, 0x6207, 0x02a5, 0x0dff, + 0x0511, 0x1dff, 0x04b5, 0x049a, 0x0006, 0x0388, 0x028d, 0x3a03, + 0x4a00, 0x7c33, 0x028c, 0x3a03, 0x4a00, 0x7d0c, 0x0804, 0x00a2, + 0x00db, 0x7d24, 0x03a0, 0x0498, 0x7802, 0x6209, 0x6a29, 0x7e24, + 0x620c, 0x7e22, 0x0804, 0x03d0, 0x7d19, 0x0820, 0x028c, 0x3a1f, + 0x00a2, 0x03d0, 0x7c02, 0x008b, 0x3003, 0x03a0, 0x0015, 0x0015, + 0x6818, 0x7e12, 0x6828, 0x7f10, 0x0000, 0x0820, 0x03d8, 0x7df5, + 0x0804, 0x03d0, 0x7d03, 0x008b, 0x3003, 0x9a15, 0x008b, 0x7802, + 0x6209, 0x6a29, 0x7e01, 0x620c, 0x0006, 0x0804, 0x03d0, 0x7df6, + 0x048b, 0x3403, 0x03a4, 0x0415, 0x0415, 0x0d0f, 0x0511, 0x1df0, + 0x0808, 0x04d0, 0x7c01, 0x008c, 0x58c1, 0x04a0, 0x7803, 0x620b, + 0x5a05, 0x1d01, 0x7ee9, 0x50c1, 0x05a0, 0x7803, 0x5205, 0x6a0b, + 0x1d01, 0x6a28, 0x7fe1, 0x0000, 0x4c00, 0x7ce7, 0x9a26, 0x0870, + 0x0011, 0x5010, 0xc0ec, 0x7d7a, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, + 0x56f8, 0x7d02, 0x0200, 0x9a55, 0x6d03, 0x6ed3, 0x0dff, 0x0511, + 0x1dff, 0x05bc, 0x5df8, 0x4d00, 0x7d5e, 0x0b70, 0x0311, 0x522b, + 0x5313, 0x02b9, 0x4a00, 0x7c04, 0x62ff, 0x7e3f, 0x0400, 0x9a65, + 0x008f, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5ddb, 0x0d03, 0x0512, + 0x05bc, 0x0510, 0x5dd3, 0x4d00, 0x7d27, 0x4d02, 0x7d20, 0x4d01, + 0x7d1a, 0x0b70, 0x0311, 0x53eb, 0x0360, 0x7d05, 0x6509, 0x7e25, + 0x620a, 0x7e23, 0x9a8f, 0x620a, 0x7e20, 0x6509, 0x7e1e, 0x0512, + 0x0512, 0x02ad, 0x6ac8, 0x7f19, 0x2003, 0x4800, 0x7ced, 0x0b70, + 0x0311, 0x5313, 0x9aaa, 0x7802, 0x6209, 0x6ac8, 0x9aa9, 0x0015, + 0x7802, 0x620a, 0x6ac8, 0x9aa9, 0x0015, 0x0015, 0x7802, 0x620b, + 0x6ac8, 0x7c03, 0x0000, 0x55db, 0x9a63, 0x0007, 0x68cc, 0x680c, + 0x55d3, 0x4d00, 0x7d03, 0x4d02, 0x7d02, 0x9ab8, 0x0017, 0x0017, + 0x55db, 0x009d, 0x55fb, 0x05a0, 0x08ff, 0x0011, 0x18ff, 0x0010, + 0x04b8, 0x04ad, 0x0454, 0x62ff, 0x7ee8, 0x0870, 0x0011, 0x5010, + 0x52c0, 0x53c8, 0xc10d, 0x7d89, 0x0200, 0x9a55, 0x0200, 0x9a52, + 0xc19d, 0xc0ec, 0x7d52, 0x0c70, 0x0411, 0x5414, 0x5ac4, 0x028c, + 0x58da, 0x5efa, 0xc0fe, 0x56fa, 0x7d02, 0x0200, 0x9ad9, 0x6d03, + 0x5bca, 0x5cd2, 0x0bff, 0x0311, 0x1bff, 0x04bb, 0x0415, 0x53da, + 0x0a70, 0x0211, 0x4c00, 0x7d28, 0x552a, 0x05bb, 0x4d00, 0x7c02, + 0x0400, 0x9aec, 0x4c01, 0x7d0f, 0x008f, 0x0015, 0x04d8, 0x7d01, + 0x008c, 0x0020, 0x04a0, 0x0015, 0x7802, 0x650b, 0x5d06, 0x0000, + 0x7e0c, 0x7f0d, 0x9aea, 0x650a, 0x7e08, 0x008d, 0x0011, 0x0010, + 0x05a8, 0x065f, 0x5d06, 0x063f, 0x7f02, 0x0007, 0x680c, 0x0007, + 0x5012, 0x54d0, 0x0454, 0x9b16, 0x5012, 0x54d0, 0x0473, 0x7c06, + 0x552a, 0x05b9, 0x4d00, 0x7c02, 0x0400, 0x9b18, 0x52c0, 0x53c8, + 0xc10d, 0x0288, 0x7db6, 0x0200, 0x9ad9, 0x0200, 0x9ad1, 0x0870, + 0x0011, 0x5010, 0xc0ec, 0x7d46, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, + 0x56f8, 0x7d02, 0x0200, 0x9b2d, 0x0b70, 0x0311, 0x6ed3, 0x6d03, + 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d2b, 0x522b, 0x02b9, + 0x4a00, 0x7c04, 0x62c8, 0x7e1f, 0x0400, 0x9b3e, 0x008f, 0x00d5, + 0x7d01, 0x008d, 0x05a0, 0x0060, 0x7c05, 0x6edd, 0x6209, 0x7e16, + 0x6ac8, 0x7f11, 0x0015, 0x0060, 0x7c05, 0x6ede, 0x620a, 0x7e0e, + 0x6ac8, 0x7f09, 0x6edf, 0x0015, 0x7802, 0x620b, 0x6ac8, 0x0000, + 0x7e05, 0x7f01, 0x9b3c, 0x0007, 0x68cc, 0x9b68, 0x0007, 0x6a0c, + 0x0454, 0x62c8, 0x7ef8, 0x5013, 0x52c0, 0x53c8, 0xc10d, 0x7dbd, + 0x0200, 0x9b2d, 0x0200, 0x9b2a, 0xc19d, 0x0870, 0x0011, 0xc0ec, + 0x7d29, 0x5010, 0x5ac0, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x9b7b, 0x0870, 0x0011, 0x6d03, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x4d00, 0x7d12, 0x5228, 0x02b9, 0x4a00, 0x7c02, 0x0400, 0x9b8a, + 0x620b, 0x7e06, 0x5a06, 0x7f06, 0x0000, 0x2504, 0x7d05, 0x9b8a, + 0x0007, 0x680c, 0x0007, 0x0454, 0x5010, 0x52c0, 0xc10d, 0x7ddb, + 0x0200, 0x9b7b, 0x0200, 0x9b77, 0xc19d, 0x0870, 0x0011, 0xc0ec, + 0x7d76, 0x5010, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, + 0x0200, 0x9bab, 0x6d03, 0x0d03, 0x0512, 0x05bc, 0x0510, 0x5dd0, + 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x5df8, 0x4d00, 0x7d57, 0x0a70, + 0x0211, 0x532a, 0x5212, 0x03b9, 0x4b00, 0x7c02, 0x0400, 0x9bbf, + 0x008f, 0x05d8, 0x7d01, 0x008d, 0x05a0, 0x5dda, 0x55d2, 0x4d00, + 0x7d27, 0x4d02, 0x7d20, 0x4d01, 0x7d1a, 0x0a70, 0x0211, 0x52ea, + 0x0260, 0x7d05, 0x6509, 0x7e25, 0x630a, 0x7e23, 0x9be3, 0x630a, + 0x7e20, 0x6509, 0x7e1e, 0x0512, 0x0512, 0x03ad, 0x5b06, 0x7f19, + 0x2003, 0x4800, 0x7ced, 0x0a70, 0x0211, 0x5212, 0x9bfe, 0x7802, + 0x6309, 0x5b06, 0x9bfd, 0x0015, 0x7802, 0x630a, 0x5b06, 0x9bfd, + 0x0015, 0x0015, 0x7802, 0x630b, 0x5b06, 0x7c03, 0x55da, 0x0000, + 0x9bbd, 0x0007, 0x680c, 0x55d2, 0x4d00, 0x7d03, 0x4d02, 0x7d02, + 0x9c0b, 0x0017, 0x0017, 0x55da, 0x009d, 0x55fa, 0x05a0, 0x08ff, + 0x0011, 0x18ff, 0x0010, 0x04b8, 0x04ad, 0x0454, 0x0870, 0x0011, + 0x5010, 0x52c0, 0x53c8, 0xc10d, 0x7d8e, 0x0200, 0x9bab, 0x0200, + 0x9ba7, 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d35, 0x5010, 0x5ac0, + 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, 0x9c28, 0x0870, 0x0011, + 0x6d07, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d1c, 0x5228, + 0x02b9, 0x4a00, 0x7c04, 0x6928, 0x7f0b, 0x0400, 0x9c37, 0x5206, + 0x7e10, 0x6a0b, 0x6928, 0x7f04, 0x0000, 0x2504, 0x7d0c, 0x9c37, + 0x0007, 0x680c, 0x680c, 0x6207, 0x6a07, 0x6a2b, 0x6a28, 0x0007, + 0x680c, 0x0007, 0x0454, 0x6928, 0x7ff3, 0x5010, 0x52c0, 0xc10d, + 0x7dcf, 0x0200, 0x9c28, 0x0200, 0x9c24, 0x0870, 0x0011, 0x5010, + 0xc0ec, 0x7d7c, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, + 0x0200, 0x9c63, 0x6ed3, 0x6dc5, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x5df8, 0x4d00, 0x7d60, 0x0b70, 0x0311, 0x522b, 0x5313, 0x02b9, + 0x4a00, 0x7c02, 0x0400, 0x9c73, 0x008f, 0x00d5, 0x7d01, 0x008d, + 0x05a0, 0x5ddb, 0x0d03, 0x0512, 0x05bc, 0x0510, 0x5dd3, 0x4d00, + 0x7d2c, 0x4d02, 0x7d24, 0x4d01, 0x7d1e, 0x59e3, 0x0b70, 0x0311, + 0x53eb, 0x61c8, 0x7e2b, 0x62c8, 0x7e29, 0x65c8, 0x7e27, 0x0360, + 0x7d03, 0x0112, 0x0112, 0x9c9e, 0x0512, 0x0512, 0x0211, 0x02a9, + 0x02ad, 0x6ac8, 0x7f1b, 0x2003, 0x4800, 0x7ceb, 0x0b70, 0x0311, + 0x5313, 0x51e3, 0x9cbb, 0x7802, 0x62c8, 0x6ac8, 0x9cba, 0x6dce, + 0x0015, 0x7802, 0x62c8, 0x6ac8, 0x9cba, 0x6dcf, 0x0015, 0x0015, + 0x7801, 0x62d8, 0x7c03, 0x0000, 0x55db, 0x9c71, 0x0007, 0x68ff, + 0x55d3, 0x4d00, 0x7d03, 0x4d02, 0x7d02, 0x9cc8, 0x0017, 0x0017, + 0x55db, 0x009d, 0x55fb, 0x05a0, 0x08ff, 0x0011, 0x18ff, 0x0010, + 0x04b8, 0x04ad, 0x0454, 0x62c8, 0x7ee9, 0x0870, 0x0011, 0x5010, + 0x52c0, 0x53c8, 0xc10d, 0x7d87, 0x0200, 0x9c63, 0x0200, 0x9c60, + 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d7c, 0x5010, 0x5ac0, 0x5bc8, + 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, 0x9ce7, 0x6dc5, 0x0d03, + 0x0512, 0x05bc, 0x0510, 0x5dd0, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x5df8, 0x4d00, 0x7d5d, 0x0a70, 0x0211, 0x532a, 0x5212, 0x03b9, + 0x4b00, 0x7c02, 0x0400, 0x9cfb, 0x008f, 0x05d8, 0x7d01, 0x008d, + 0x05a0, 0x5dda, 0x55d2, 0x4d00, 0x7d2c, 0x4d02, 0x7d24, 0x4d01, + 0x7d1e, 0x59e2, 0x0a70, 0x0211, 0x52ea, 0x61c8, 0x7e2c, 0x63c8, + 0x7e2a, 0x65c8, 0x7e28, 0x0260, 0x7d03, 0x0112, 0x0112, 0x9d22, + 0x0512, 0x0512, 0x0311, 0x03a9, 0x03ad, 0x5b06, 0x7f1c, 0x2003, + 0x4800, 0x7ceb, 0x0a70, 0x0211, 0x5212, 0x51e2, 0x9d40, 0x7802, + 0x63c8, 0x5b06, 0x9d3f, 0x6dce, 0x0015, 0x7802, 0x63c8, 0x5b06, + 0x9d3f, 0x6dcf, 0x0015, 0x0015, 0x7802, 0x63c8, 0x5b06, 0x7c03, + 0x55da, 0x0000, 0x9cf9, 0x0007, 0x68ff, 0x55d2, 0x4d00, 0x7d03, + 0x4d02, 0x7d02, 0x9d4d, 0x0017, 0x0017, 0x55da, 0x009d, 0x55fa, + 0x05a0, 0x08ff, 0x0011, 0x18ff, 0x0010, 0x04b8, 0x04ad, 0x0454, + 0x0870, 0x0011, 0x5010, 0x52c0, 0x53c8, 0xc10d, 0x7d88, 0x0200, + 0x9ce7, 0x0200, 0x9ce3, 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d61, + 0x5010, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x9d6a, 0x6d07, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, + 0x7d45, 0x0a70, 0x0211, 0x532a, 0x5212, 0x03b9, 0x4b00, 0x7c04, + 0x6a28, 0x7f3b, 0x0400, 0x9d79, 0x008f, 0x05d8, 0x7d01, 0x008d, + 0x05a0, 0x0b03, 0x0312, 0x03bc, 0x0310, 0x4b00, 0x7d1c, 0x4b02, + 0x7d20, 0x4b01, 0x7d23, 0x0a70, 0x0211, 0x52ea, 0x5306, 0x7e25, + 0x0260, 0x7d02, 0x0310, 0x0312, 0x6b09, 0x7f1f, 0x0312, 0x6b09, + 0x7f1c, 0x0312, 0x6b09, 0x7f19, 0x2003, 0x4800, 0x7cef, 0x0a70, + 0x0211, 0x5212, 0x9dba, 0x0015, 0x0015, 0x7802, 0x5306, 0x6b0b, + 0x9db9, 0x0015, 0x7802, 0x5306, 0x6b0a, 0x9db9, 0x7802, 0x5306, + 0x6b09, 0x7c03, 0x6b28, 0x0000, 0x9d77, 0xc77b, 0x6928, 0x7ffd, + 0x0870, 0x0011, 0x5010, 0x52c0, 0x53c8, 0xc10d, 0x7da3, 0x0200, + 0x9d6a, 0x0200, 0x9d66, 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d60, + 0x5010, 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, + 0x9dd2, 0x6dd7, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, + 0x7d46, 0x0a70, 0x0211, 0x532a, 0x5212, 0x03b9, 0x4b00, 0x7c02, + 0x0400, 0x9de1, 0x008f, 0x05d8, 0x7d01, 0x008d, 0x05a0, 0x0b03, + 0x0312, 0x03bc, 0x0310, 0x4b00, 0x7d28, 0x4b02, 0x7d20, 0x4b01, + 0x7d19, 0x6ddd, 0x0a70, 0x0211, 0x52ea, 0x5306, 0x7e27, 0x0260, + 0x7d02, 0x0310, 0x0312, 0x6bc8, 0x7f21, 0x0312, 0x6bc8, 0x7f1e, + 0x0312, 0x6bc8, 0x7f1b, 0x2003, 0x4800, 0x7cef, 0x0a70, 0x0211, + 0x5212, 0x9e23, 0x6ddd, 0x7802, 0x5306, 0x6bc8, 0x9e22, 0x6dde, + 0x0015, 0x7802, 0x5306, 0x6bc8, 0x9e22, 0x0015, 0x0015, 0x7802, + 0x5306, 0x6bc8, 0x7c03, 0x0000, 0xde32, 0x9ddf, 0xc777, 0x0870, + 0x0011, 0x5010, 0x52c0, 0x53c8, 0xc10d, 0x7da4, 0x0200, 0x9dd2, + 0x0200, 0x9dce, 0x63ff, 0x0368, 0x7d02, 0x0369, 0x7def, 0x0006, + 0x0870, 0x0011, 0x5010, 0xc0ec, 0x7d5c, 0x5ac0, 0x5bc8, 0x5ef8, + 0xc0fe, 0x56f8, 0x7d02, 0x0200, 0x9e3e, 0x0b70, 0x0311, 0x6ec3, + 0x6d07, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d3e, + 0x522b, 0x02b9, 0x4a00, 0x7c04, 0x6a28, 0x7f34, 0x0400, 0x9e50, + 0x028e, 0x1a94, 0x6ac3, 0x62c8, 0x0269, 0x7d1b, 0x1e94, 0x6ec3, + 0x6ed3, 0x62c8, 0x0248, 0x6ac8, 0x2694, 0x6ec3, 0x62c8, 0x026e, + 0x7d32, 0x6a09, 0x7f1f, 0x2501, 0x4d00, 0x7d20, 0x028e, 0x1a98, + 0x6ac3, 0x62c8, 0x6ec3, 0x0260, 0x7df1, 0x6a28, 0x7f13, 0xc7af, + 0x9e90, 0x6ee3, 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, + 0x62c8, 0x026e, 0x7d18, 0x6a09, 0x7f05, 0x2001, 0x7cf9, 0x6a28, + 0x0000, 0x9e4e, 0x0289, 0xc77b, 0x018a, 0x9e9f, 0x6a28, 0x7ffa, + 0x0b70, 0x0311, 0x5013, 0x52c0, 0x53c8, 0xc10d, 0x7da7, 0x0200, + 0x9e3e, 0x0200, 0x9e3b, 0x6a28, 0x7fed, 0xc7af, 0x9e9f, 0x0458, + 0x0454, 0x9e90, 0xc19d, 0x0870, 0x0011, 0xc0ec, 0x7d55, 0x5010, + 0x5ac0, 0x5bc8, 0x5ef8, 0xc0fe, 0x56f8, 0x7d02, 0x0200, 0x9ea9, + 0x0b70, 0x0311, 0x6d07, 0x5df0, 0x0dff, 0x0511, 0x1dff, 0x05bc, + 0x4d00, 0x7d37, 0x522b, 0x02b9, 0x4a00, 0x7c04, 0x6928, 0x7f2d, + 0x0400, 0x9eba, 0x028e, 0x1a94, 0x5202, 0x0269, 0x7d16, 0x1e94, + 0x5206, 0x0248, 0x5a06, 0x2694, 0x5206, 0x026e, 0x7d2f, 0x6a09, + 0x7f1c, 0x2501, 0x4d00, 0x7d1d, 0x028e, 0x1a98, 0x5202, 0x0260, + 0x7df3, 0x6a28, 0x7f12, 0xc7af, 0x9ef3, 0x008f, 0x2001, 0x00d5, + 0x7d01, 0x008d, 0x05a0, 0x5206, 0x026e, 0x7d18, 0x6a09, 0x7f05, + 0x2001, 0x7cf9, 0x6a28, 0x0000, 0x9eb8, 0x0289, 0xc77b, 0x018a, + 0x9f02, 0x6928, 0x7ffa, 0x0b70, 0x0311, 0x5013, 0x52c0, 0x53c8, + 0xc10d, 0x7daf, 0x0200, 0x9ea9, 0x0200, 0x9ea5, 0x6a28, 0x7fed, + 0xc7af, 0x9f02, 0x0458, 0x0454, 0x9ef3 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/board-mx3_3stack.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/board-mx3_3stack.h @@ -0,0 +1,153 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__ +#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__ + +#ifdef CONFIG_MACH_MX31_3DS +/*! + * @defgroup BRDCFG_MX31 Board Configuration Options + * @ingroup MSL_MX31 + */ + +/*! + * @file mach-mx3/board-mx3_3stack.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX31 3STACK Platform. + * + * @ingroup BRDCFG_MX31 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART EVB board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR NO_IRDA +#define UART2_ENABLED 1 +/* UART 3 configuration */ +#define UART3_MODE MODE_DTE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 +/* UART 4 configuration */ +#define UART4_MODE MODE_DTE +#define UART4_IR NO_IRDA +#define UART4_ENABLED 0 /* Disable UART 4 as its pins are shared with ATA */ +/* UART 5 configuration */ +#define UART5_MODE MODE_DTE +#define UART5_IR NO_IRDA +#define UART5_ENABLED 0 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +#define DEBUG_BASE_ADDRESS CS5_BASE_ADDR +/* LAN9217 ethernet base address */ +#define LAN9217_BASE_ADDR DEBUG_BASE_ADDRESS +/* External UART */ +#define UARTA_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x8000) +#define UARTB_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x10000) + +#define BOARD_IO_ADDR (DEBUG_BASE_ADDRESS + 0x20000) +/* LED switchs */ +#define LED_SWITCH_REG 0x00 +/* buttons */ +#define SWITCH_BUTTONS_REG 0x08 +/* status, interrupt */ +#define INTR_STATUS_REG 0x10 +#define INTR_MASK_REG 0x38 +#define INTR_RESET_REG 0x20 +/* magic word for debug CPLD */ +#define MAGIC_NUMBER1_REG 0x40 +#define MAGIC_NUMBER2_REG 0x48 +/* CPLD code version */ +#define CPLD_CODE_VER_REG 0x50 +/* magic word for debug CPLD */ +#define MAGIC_NUMBER3_REG 0x58 +/* module reset register*/ +#define MODULE_RESET_REG 0x60 +/* CPU ID and Personality ID */ +#define MCU_BOARD_ID_REG 0x68 + +/* interrupts like external uart , external ethernet etc*/ +#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) + +#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) +#define EXPIO_INT_ENET (MXC_BOARD_IRQ_START + 0) +#define EXPIO_INT_XUART_A (MXC_BOARD_IRQ_START + 1) +#define EXPIO_INT_XUART_B (MXC_BOARD_IRQ_START + 2) +#define EXPIO_INT_BUTTON_A (MXC_BOARD_IRQ_START + 3) +#define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4) + +/*! This is System IRQ used by LAN9217 */ +#define LAN9217_IRQ EXPIO_INT_ENET + +/*! LED definition*/ +#define MXC_BD_LED1 (1) +#define MXC_BD_LED2 (1 << 1) +#define MXC_BD_LED3 (1 << 2) +#define MXC_BD_LED4 (1 << 3) +#define MXC_BD_LED5 (1 << 4) +#define MXC_BD_LED6 (1 << 5) +#define MXC_BD_LED7 (1 << 6) +#define MXC_BD_LED8 (1 << 7) + +#define MXC_BD_LED_ON(led) +#define MXC_BD_LED_OFF(led) + +extern unsigned int sdhc_get_card_det_status(struct device *dev); +extern int sdhc_init_card_det(int id); +extern int sdhc_write_protect(struct device *dev); + +extern int __init mx3_3stack_init_mc13783(void); + +#endif /* CONFIG_MACH_MX31_3DS */ +#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/usb.h @@ -0,0 +1,116 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbotg_fs_active(void); +extern void gpio_usbotg_fs_inactive(void); +extern int gpio_usbotg_hs_active(void); +extern void gpio_usbotg_hs_inactive(void); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, struct fsl_usb2_platform_data *config); + +extern int fsl_usb_host_init(struct platform_device *pdev); +extern void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbh1_active(void); +extern void gpio_usbh1_inactive(void); +extern int gpio_usbh2_active(void); +extern void gpio_usbh2_inactive(void); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +#if defined(CONFIG_ISP1504_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_1504_config; +#define PDATA (&dr_1504_config) +#elif defined(CONFIG_ISP1301_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_1301_config; +#define PDATA (&dr_1301_config) +#elif defined(CONFIG_MC13783_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_13783_config; +#define PDATA (&dr_13783_config) +#endif + + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mx3_3stack_pmic_mc13783.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mx3_3stack_pmic_mc13783.c @@ -0,0 +1,272 @@ +/* + * mx3-3stack-pmic-mc13783.c -- i.MX3 3STACK Driver for Atlas MC13783 PMIC + */ + /* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) + +struct mc13783; + +static struct regulator_init_data violo_init = { + .constraints = { + .min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */ + .max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vdig_init = { + .constraints = { + .min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */ + .max_uV = mV_to_uV(1800), /* mc13783 allows max of 1800. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vgen_init = { + .constraints = { + .min_uV = mV_to_uV(1100), /* mc13783 allows min of 1100. */ + .max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vrfdig_init = { + .constraints = { + .min_uV = mV_to_uV(1200), /* mc13783 allows min of 1200. */ + .max_uV = mV_to_uV(1875), /* mc13783 allows max of 1875. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vrfref_init = { + .constraints = { + .min_uV = mV_to_uV(2475), /* mc13783 allows min of 2475. */ + .max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vrfcp_init = { + .constraints = { + .min_uV = mV_to_uV(2700), /* mc13783 allows min of 2700. */ + .max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vsim_init = { + .constraints = { + .min_uV = mV_to_uV(1800), /* mc13783 allows min of 1800. */ + .max_uV = mV_to_uV(2900), /* mc13783 allows max of 2900. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vesim_init = { + .constraints = { + .min_uV = mV_to_uV(1800), /* mc13783 allows min of 1800. */ + .max_uV = mV_to_uV(2900), /* mc13783 allows max of 2900. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vcam_init = { + .constraints = { + .min_uV = mV_to_uV(1500), /* mc13783 allows min of 1500. */ + .max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vvib_init = { + .constraints = { + .min_uV = mV_to_uV(1300), /* mc13783 allows min of 1300. */ + .max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vrf_init = { + .constraints = { + .min_uV = mV_to_uV(1500), /* mc13783 allows min of 1500. */ + .max_uV = mV_to_uV(2775), /* mc13783 allows max of 2775. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vmmc_init = { + .constraints = { + .min_uV = mV_to_uV(1600), /* mc13783 allows min of 1600. */ + .max_uV = mV_to_uV(3000), /* mc13783 allows max of 3000. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data sw3_init = { + .constraints = { + .min_uV = mV_to_uV(5000), /* mc13783 allows min of 5000. */ + .max_uV = mV_to_uV(5500), /* mc13783 allows max of 5500. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw1_init = { + .constraints = { + .min_uV = mV_to_uV(1200), /* mc13783 allows min of 900. */ + .max_uV = mV_to_uV(1600), /* mc13783 allows max of 2200. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE + | REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_FAST + | REGULATOR_MODE_NORMAL + | REGULATOR_MODE_IDLE + | REGULATOR_MODE_STANDBY, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = mV_to_uV(1250), + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data sw_init = { + .constraints = { + .min_uV = mV_to_uV(1200), /* mc13783 allows min of 900. */ + .max_uV = mV_to_uV(2200), /* mc13783 allows max of 2200. */ + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vaudio_init = { + .constraints = { + .boot_on = 1, + } +}; + +static struct regulator_init_data viohi_init = { + .constraints = { + .boot_on = 1, + } +}; + +static struct regulator_init_data gpo1_init = { + .constraints = { + .boot_on = 1, + } +}; + +static struct regulator_init_data gpo4_init = { + .constraints = { + }, +}; + +static struct regulator_init_data gpo_init = { + .constraints = { + }, +}; + +static int mc13783_regulator_init(void *data) +{ + struct mc13783 *mc13783 = data; + unsigned int value; + + /*most regulators are controled by standby signal*/ + /*except violo*/ + pmic_read_reg(REG_REGULATOR_MODE_0, &value, 0xffffff); + value |= 0x492412; + pmic_write_reg(REG_REGULATOR_MODE_0, value, 0xffffff); + pmic_read_reg(REG_REGULATOR_MODE_1, &value, 0xffffff); + value |= 0x492492; + pmic_write_reg(REG_REGULATOR_MODE_1, value, 0xffffff); + /*also sw3 is controled by standby signal*/ + pmic_read_reg(REG_SWITCHERS_5, &value, 0xffffff); + value |= 0x200000; + pmic_write_reg(REG_SWITCHERS_5, value, 0xffffff); + + mc13783_register_regulator(mc13783, MC13783_SW1A, &sw1_init); + mc13783_register_regulator(mc13783, MC13783_SW1B, &sw_init); + mc13783_register_regulator(mc13783, MC13783_SW2A, &sw_init); + mc13783_register_regulator(mc13783, MC13783_SW2B, &sw_init); + mc13783_register_regulator(mc13783, MC13783_SW3, &sw3_init); + mc13783_register_regulator(mc13783, MC13783_VMMC1, &vmmc_init); + mc13783_register_regulator(mc13783, MC13783_VMMC2, &vmmc_init); + mc13783_register_regulator(mc13783, MC13783_VVIB, &vvib_init); + mc13783_register_regulator(mc13783, MC13783_VIOHI, &viohi_init); + mc13783_register_regulator(mc13783, MC13783_VIOLO, &violo_init); + mc13783_register_regulator(mc13783, MC13783_VDIG, &vdig_init); + mc13783_register_regulator(mc13783, MC13783_VRFDIG, &vrfdig_init); + mc13783_register_regulator(mc13783, MC13783_VRFREF, &vrfref_init); + mc13783_register_regulator(mc13783, MC13783_VRFCP, &vrfcp_init); + mc13783_register_regulator(mc13783, MC13783_VRF1, &vrf_init); + mc13783_register_regulator(mc13783, MC13783_VRF2, &vrf_init); + mc13783_register_regulator(mc13783, MC13783_VAUDIO, &vaudio_init); + mc13783_register_regulator(mc13783, MC13783_VCAM, &vcam_init); + mc13783_register_regulator(mc13783, MC13783_VGEN, &vgen_init); + mc13783_register_regulator(mc13783, MC13783_VSIM, &vsim_init); + mc13783_register_regulator(mc13783, MC13783_VESIM, &vesim_init); + mc13783_register_regulator(mc13783, MC13783_GPO1, &gpo1_init); + + gpo_init.supply_regulator_dev = &(mc13783->pmic.pdev[MC13783_GPO1]->dev); + mc13783_register_regulator(mc13783, MC13783_GPO2, &gpo_init); + mc13783_register_regulator(mc13783, MC13783_GPO3, &gpo_init); + mc13783_register_regulator(mc13783, MC13783_GPO4, &gpo4_init); + + return 0; +} + +static struct pmic_platform_data mc13783_plat = { + .init = mc13783_regulator_init, + .power_key_irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2), +}; + +static struct spi_board_info __initdata mc13783_spi_device = { + .modalias = "pmic_spi", + .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), + .max_speed_hz = 4000000, + .bus_num = 2, + .platform_data = &mc13783_plat, + .chip_select = 2, +}; + +int __init mx3_3stack_init_mc13783(void) +{ + return spi_register_board_info(&mc13783_spi_device, 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/pm.c @@ -0,0 +1,103 @@ +/* + * linux/arch/arm/mach-mx3/pm.c + * + * MX3 Power Management Routines + * + * Original code for the SA11x0: + * Copyright (c) 2001 Cliff Brake + * + * Modified for the PXA250 by Nicolas Pitre: + * Copyright (c) 2002 Monta Vista Software, Inc. + * + * Modified for the OMAP1510 by David Singleton: + * Copyright (c) 2002 Monta Vista Software, Inc. + * + * Cleanup 2004 for OMAP1510/1610 by Dirk Behme + * + * Modified for the MX31 + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +/* + * TODO: whatta save? + */ + +static int mx31_suspend_enter(suspend_state_t state) +{ + printk(KERN_INFO "Hi, from mx31_pm_enter\n"); + switch (state) { + case PM_SUSPEND_MEM: + mxc_pm_lowpower(DSM_MODE); + break; + case PM_SUSPEND_STANDBY: + mxc_pm_lowpower(STOP_MODE); + break; + default: + return -1; + } + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int mx31_suspend_prepare(void) +{ + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static void mx31_suspend_finish(void) +{ + return; +} + +static int mx31_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +struct platform_suspend_ops mx31_suspend_ops = { + .valid = mx31_pm_valid, + .prepare = mx31_suspend_prepare, + .enter = mx31_suspend_enter, + .finish = mx31_suspend_finish, +}; + +static int __init mx31_pm_init(void) +{ + printk(KERN_INFO "Power Management for Freescale MX31\n"); + suspend_set_ops(&mx31_suspend_ops); + + return 0; +} + +late_initcall(mx31_pm_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/cpu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/cpu.c @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2001 Deep Blue Solutions Ltd. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/*! + * @file mach-mx3/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX31 + */ + +#include +#include +#include +#include +#include +#include + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + /* Setup Peripheral Port Remap register for AVIC */ + asm("ldr r0, =0xC0000015 \n\ + mcr p15, 0, r0, c15, c2, 4"); + if (!system_rev) { + mxc_set_system_rev(0x31, CHIP_REV_2_0); + } +} + +/*! + * Post CPU init code + * + * @return 0 always + */ +static int __init post_cpu_init(void) +{ + volatile unsigned long aips_reg; + + /* + * S/W workaround: Clear the off platform peripheral modules + * Supervisor Protect bit for SDMA to access them. + */ + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + + return 0; +} + +postcore_initcall(post_cpu_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mm.c @@ -30,7 +30,6 @@ #include #include - /*! * @file mm.c * @@ -43,7 +42,7 @@ * This table defines static virtual address mappings for I/O regions. * These are the mappings common across all MX3 boards. */ -static struct map_desc mxc_io_desc[] __initdata = { +static struct map_desc mx31_io_desc[] __initdata = { { .virtual = X_MEMC_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), @@ -64,6 +63,16 @@ .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_DEVICE_NONSHARED + }, { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE_NONSHARED + }, { + .virtual = MX31_IRAM_BASE_ADDR_VIRT & 0xFFF00000, + .pfn = __phys_to_pfn(MX31_IRAM_BASE_ADDR & 0xFFF00000), + .length = SZ_1M, + .type = MT_DEVICE_NONSHARED }, }; @@ -76,14 +85,7 @@ { mxc_set_cpu_type(MXC_CPU_MX31); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); -} - -void __init mx35_map_io(void) -{ - mxc_set_cpu_type(MXC_CPU_MX35); - - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); } #ifdef CONFIG_CACHE_L2X0 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/Makefile @@ -4,18 +4,25 @@ # Object file lists. -obj-y := mm.o devices.o -obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o -obj-$(CONFIG_ARCH_MX35) += clock-imx35.o -obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o +obj-y := system.o iomux.o cpu.o mm.o clock.o dptc.o devices.o serial.o dma.o mxc_pm.o dvfs_v2.o +obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o mx31ads_gpio.o obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o obj-$(CONFIG_MACH_PCM037) += pcm037.o obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o -obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o +obj-$(CONFIG_MACH_MX31_3DS) += mx3_3stack.o mx3_3stack_gpio.o mx3_3stack_pmic_mc13783.o obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o obj-$(CONFIG_MACH_QONG) += qong.o obj-$(CONFIG_MACH_PCM043) += pcm043.o obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o -obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o + +# power management +obj-$(CONFIG_PM) += pm.o + +obj-$(CONFIG_USB_EHCI_ARC_H1) += usb_h1.o +obj-$(CONFIG_USB_EHCI_ARC_H2) += usb_h2.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/system.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/system.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX31 i.MX31 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx3/system.c + * @brief This file contains idle and reset functions. + * + * @ingroup MSL_MX31 + */ + +static int clks_initialized = 0; +static struct clk *sdma_clk, *mbx_clk, *ipu_clk, *mpeg_clk, *vpu_clk, *usb_clk, + *rtic_clk, *nfc_clk, *emi_clk; + +extern int mxc_jtag_enabled; + +/*! + * This function puts the CPU into idle mode. It is called by default_idle() + * in process.c file. + */ +void arch_idle(void) +{ + int emi_gated_off = 0; + + /* + * This should do all the clock switching + * and wait for interrupt tricks. + */ + if (!mxc_jtag_enabled) { + if (clks_initialized == 0) { + clks_initialized = 1; + sdma_clk = clk_get(NULL, "sdma_ahb_clk"); + ipu_clk = clk_get(NULL, "ipu_clk"); + if (cpu_is_mx31()) { + mpeg_clk = clk_get(NULL, "mpeg4_clk"); + mbx_clk = clk_get(NULL, "mbx_clk"); + } else { + vpu_clk = clk_get(NULL, "vpu_clk"); + } + usb_clk = clk_get(NULL, "usb_ahb_clk"); + rtic_clk = clk_get(NULL, "rtic_clk"); + nfc_clk = clk_get(NULL, "nfc_clk"); + emi_clk = clk_get(NULL, "emi_clk"); + } + + if ((clk_get_usecount(sdma_clk) == 0) + && (clk_get_usecount(ipu_clk) <= 1) + && (clk_get_usecount(usb_clk) == 0) + && (clk_get_usecount(rtic_clk) == 0) + && (clk_get_usecount(mpeg_clk) == 0) + && (clk_get_usecount(mbx_clk) == 0) + && (clk_get_usecount(nfc_clk) == 0) + && (clk_get_usecount(vpu_clk) == 0)) { + emi_gated_off = 1; + clk_disable(emi_clk); + } + + cpu_do_idle(); + if (emi_gated_off == 1) { + clk_enable(emi_clk); + } + } +} + +/* + * This function resets the system. It is called by machine_restart(). + * + * @param mode indicates different kinds of resets + */ +void arch_reset(char mode) +{ + /* Assert SRS signal */ + mxc_wd_reset(); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/clock.c @@ -1,5 +1,5 @@ /* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2008 by Sascha Hauer * * This program is free software; you can redistribute it and/or @@ -17,23 +17,27 @@ * MA 02110-1301, USA. */ +#include #include #include #include #include #include #include - -#include -#include - #include #include +#include +#include #include +#include #include "crm_regs.h" #define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ +#define PROPAGATE_RATE_DIS 2 + +static int cpu_clk_set_wp(int wp); +struct timer_list dptcen_timer; static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post) { @@ -68,17 +72,17 @@ } static struct clk mcu_pll_clk; +static struct clk mcu_main_clk; +static struct clk usb_pll_clk; static struct clk serial_pll_clk; static struct clk ipg_clk; static struct clk ckih_clk; +static struct clk ahb_clk; -static int cgr_enable(struct clk *clk) +static int _clk_enable(struct clk *clk) { u32 reg; - if (!clk->enable_reg) - return 0; - reg = __raw_readl(clk->enable_reg); reg |= 3 << clk->enable_shift; __raw_writel(reg, clk->enable_reg); @@ -86,69 +90,150 @@ return 0; } -static void cgr_disable(struct clk *clk) +static void _clk_disable(struct clk *clk) { u32 reg; - if (!clk->enable_reg) - return; - reg = __raw_readl(clk->enable_reg); reg &= ~(3 << clk->enable_shift); - - /* special case for EMI clock */ - if (clk->enable_reg == MXC_CCM_CGR2 && clk->enable_shift == 8) - reg |= (1 << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); } -static unsigned long pll_ref_get_rate(void) +static void _clk_emi_disable(struct clk *clk) { - unsigned long ccmr; - unsigned int prcs; + u32 reg; - ccmr = __raw_readl(MXC_CCM_CCMR); - prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; - if (prcs == 0x1) - return CKIL_CLK_FREQ * 1024; - else - return clk_get_rate(&ckih_clk); + reg = __raw_readl(clk->enable_reg); + reg &= ~(3 << clk->enable_shift); + reg |= (1 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); } -static unsigned long usb_pll_get_rate(struct clk *clk) +static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) { - unsigned long reg; + u32 reg; + signed long pd = 1; /* Pre-divider */ + signed long mfi; /* Multiplication Factor (Integer part) */ + signed long mfn; /* Multiplication Factor (Integer part) */ + signed long mfd; /* Multiplication Factor (Denominator Part) */ + signed long tmp; + u32 ref_freq = clk_get_rate(clk->parent); + + while (((ref_freq / pd) * 10) > rate) + pd++; + + if ((ref_freq / pd) < PRE_DIV_MIN_FREQ) + return -EINVAL; + + /* the ref_freq/2 in the following is to round up */ + mfi = (((rate / 2) * pd) + (ref_freq / 2)) / ref_freq; + if (mfi < 5 || mfi > 15) + return -EINVAL; + + /* pick a mfd value that will work + * then solve for mfn */ + mfd = ref_freq / 50000; - reg = __raw_readl(MXC_CCM_UPCTL); + /* + * pll_freq * pd * mfd + * mfn = -------------------- - (mfi * mfd) + * 2 * ref_freq + */ + /* the tmp/2 is for rounding */ + tmp = ref_freq / 10000; + mfn = + ((((((rate / 2) + (tmp / 2)) / tmp) * pd) * mfd) / 10000) - + (mfi * mfd); + + mfn = mfn & 0x3ff; + pd--; + mfd--; + + /* Change the Pll value */ + reg = (mfi << MXC_CCM_PCTL_MFI_OFFSET) | + (mfn << MXC_CCM_PCTL_MFN_OFFSET) | + (mfd << MXC_CCM_PCTL_MFD_OFFSET) | (pd << MXC_CCM_PCTL_PD_OFFSET); + + if (clk == &mcu_pll_clk) + __raw_writel(reg, MXC_CCM_MPCTL); + else if (clk == &usb_pll_clk) + __raw_writel(reg, MXC_CCM_UPCTL); + else if (clk == &serial_pll_clk) + __raw_writel(reg, MXC_CCM_SRPCTL); - return mxc_decode_pll(reg, pll_ref_get_rate()); + clk->rate = rate; + return 0; } -static unsigned long serial_pll_get_rate(struct clk *clk) +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) { - unsigned long reg; + if ((rate < ahb_clk.rate) || (rate % ahb_clk.rate != 0)) { + printk(KERN_ERR "Wrong rate %lu in _clk_cpu_set_rate\n", rate); + return -EINVAL; + } - reg = __raw_readl(MXC_CCM_SRPCTL); + cpu_clk_set_wp(rate / ahb_clk.rate - 1); - return mxc_decode_pll(reg, pll_ref_get_rate()); + return PROPAGATE_RATE_DIS; } -static unsigned long mcu_pll_get_rate(struct clk *clk) +static void _clk_pll_recalc(struct clk *clk) { + long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; unsigned long reg, ccmr; + s64 temp; + unsigned int prcs; ccmr = __raw_readl(MXC_CCM_CCMR); + prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; + if (prcs == 0x1) + ref_clk = CKIL_CLK_FREQ * 1024; + else + ref_clk = clk_get_rate(&ckih_clk); + + if (clk == &mcu_pll_clk) { + if ((ccmr & MXC_CCM_CCMR_MPE) == 0) { + clk->rate = ref_clk; + return; + } + if ((ccmr & MXC_CCM_CCMR_MDS) != 0) { + clk->rate = ref_clk; + return; + } + reg = __raw_readl(MXC_CCM_MPCTL); + } else if (clk == &usb_pll_clk) + reg = __raw_readl(MXC_CCM_UPCTL); + else if (clk == &serial_pll_clk) + reg = __raw_readl(MXC_CCM_SRPCTL); + else { + BUG(); + return; + } - if (!(ccmr & MXC_CCM_CCMR_MPE) || (ccmr & MXC_CCM_CCMR_MDS)) - return clk_get_rate(&ckih_clk); + pdf = (reg & MXC_CCM_PCTL_PD_MASK) >> MXC_CCM_PCTL_PD_OFFSET; + mfd = (reg & MXC_CCM_PCTL_MFD_MASK) >> MXC_CCM_PCTL_MFD_OFFSET; + mfi = (reg & MXC_CCM_PCTL_MFI_MASK) >> MXC_CCM_PCTL_MFI_OFFSET; + mfi = (mfi <= 5) ? 5 : mfi; + mfn = mfn_abs = reg & MXC_CCM_PCTL_MFN_MASK; + + if (mfn >= 0x200) { + mfn |= 0xFFFFFE00; + mfn_abs = -mfn; + } + + ref_clk *= 2; + ref_clk /= pdf + 1; - reg = __raw_readl(MXC_CCM_MPCTL); + temp = (u64) ref_clk * mfn_abs; + do_div(temp, mfd + 1); + if (mfn < 0) + temp = -temp; + temp = (ref_clk * mfi) + temp; - return mxc_decode_pll(reg, pll_ref_get_rate()); + clk->rate = temp; } -static int usb_pll_enable(struct clk *clk) +static int _clk_usb_pll_enable(struct clk *clk) { u32 reg; @@ -162,7 +247,7 @@ return 0; } -static void usb_pll_disable(struct clk *clk) +static void _clk_usb_pll_disable(struct clk *clk) { u32 reg; @@ -171,7 +256,7 @@ __raw_writel(reg, MXC_CCM_CCMR); } -static int serial_pll_enable(struct clk *clk) +static int _clk_serial_pll_enable(struct clk *clk) { u32 reg; @@ -185,7 +270,7 @@ return 0; } -static void serial_pll_disable(struct clk *clk) +static void _clk_serial_pll_disable(struct clk *clk) { u32 reg; @@ -198,53 +283,103 @@ #define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) & mask) >> off) #define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) & mask) >> off) -static unsigned long mcu_main_get_rate(struct clk *clk) +static void _clk_mcu_main_recalc(struct clk *clk) { u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); - if ((pmcr0 & MXC_CCM_PMCR0_DFSUP1) == MXC_CCM_PMCR0_DFSUP1_SPLL) - return clk_get_rate(&serial_pll_clk); - else - return clk_get_rate(&mcu_pll_clk); + if ((pmcr0 & MXC_CCM_PMCR0_DFSUP1) == MXC_CCM_PMCR0_DFSUP1_SPLL) { + serial_pll_clk.recalc(&serial_pll_clk); + clk->rate = serial_pll_clk.rate; + } else { + mcu_pll_clk.recalc(&mcu_pll_clk); + clk->rate = mcu_pll_clk.rate; + } +} + +static void _clk_cpu_recalc(struct clk *clk) +{ + unsigned long mcu_pdf; + + mcu_pdf = PDR0(MXC_CCM_PDR0_MCU_PODF_MASK, + MXC_CCM_PDR0_MCU_PODF_OFFSET); + clk->rate = clk->parent->rate / (mcu_pdf + 1); } -static unsigned long ahb_get_rate(struct clk *clk) +static void _clk_hclk_recalc(struct clk *clk) { unsigned long max_pdf; max_pdf = PDR0(MXC_CCM_PDR0_MAX_PODF_MASK, MXC_CCM_PDR0_MAX_PODF_OFFSET); - return clk_get_rate(clk->parent) / (max_pdf + 1); + clk->rate = clk->parent->rate / (max_pdf + 1); } -static unsigned long ipg_get_rate(struct clk *clk) +static void _clk_ipg_recalc(struct clk *clk) { unsigned long ipg_pdf; ipg_pdf = PDR0(MXC_CCM_PDR0_IPG_PODF_MASK, MXC_CCM_PDR0_IPG_PODF_OFFSET); - return clk_get_rate(clk->parent) / (ipg_pdf + 1); + clk->rate = clk->parent->rate / (ipg_pdf + 1); } -static unsigned long nfc_get_rate(struct clk *clk) +static void _clk_nfc_recalc(struct clk *clk) { unsigned long nfc_pdf; nfc_pdf = PDR0(MXC_CCM_PDR0_NFC_PODF_MASK, MXC_CCM_PDR0_NFC_PODF_OFFSET); - return clk_get_rate(clk->parent) / (nfc_pdf + 1); + clk->rate = clk->parent->rate / (nfc_pdf + 1); + +} + +static int _clk_nfc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + if (div > 8) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_PDR0) & ~MXC_CCM_PDR0_NFC_PODF_MASK; + reg |= (div - 1) << MXC_CCM_PDR0_NFC_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_PDR0); + + clk->rate = rate; + + return 0; + } -static unsigned long hsp_get_rate(struct clk *clk) +static unsigned long _clk_nfc_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div = clk->parent->rate / rate; + + if (clk->parent->rate % rate) + div++; + + if (div > 8) + return -EINVAL; + + return clk->parent->rate / div; + +} + +static void _clk_hsp_recalc(struct clk *clk) { unsigned long hsp_pdf; hsp_pdf = PDR0(MXC_CCM_PDR0_HSP_PODF_MASK, MXC_CCM_PDR0_HSP_PODF_OFFSET); - return clk_get_rate(clk->parent) / (hsp_pdf + 1); + clk->rate = clk->parent->rate / (hsp_pdf + 1); } -static unsigned long usb_get_rate(struct clk *clk) +static void _clk_usb_recalc(struct clk *clk) { unsigned long usb_pdf, usb_prepdf; @@ -252,10 +387,10 @@ MXC_CCM_PDR1_USB_PODF_OFFSET); usb_prepdf = PDR1(MXC_CCM_PDR1_USB_PRDF_MASK, MXC_CCM_PDR1_USB_PRDF_OFFSET); - return clk_get_rate(clk->parent) / (usb_prepdf + 1) / (usb_pdf + 1); + clk->rate = clk->parent->rate / (usb_prepdf + 1) / (usb_pdf + 1); } -static unsigned long csi_get_rate(struct clk *clk) +static void _clk_csi_recalc(struct clk *clk) { u32 reg, pre, post; @@ -266,10 +401,10 @@ post = (reg & MXC_CCM_PDR0_CSI_PODF_MASK) >> MXC_CCM_PDR0_CSI_PODF_OFFSET; post++; - return clk_get_rate(clk->parent) / (pre * post); + clk->rate = clk->parent->rate / (pre * post); } -static unsigned long csi_round_rate(struct clk *clk, unsigned long rate) +static unsigned long _clk_csi_round_rate(struct clk *clk, unsigned long rate) { u32 pre, post, parent = clk_get_rate(clk->parent); u32 div = parent / rate; @@ -282,7 +417,7 @@ return parent / (pre * post); } -static int csi_set_rate(struct clk *clk, unsigned long rate) +static int _clk_csi_set_rate(struct clk *clk, unsigned long rate) { u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); @@ -300,10 +435,20 @@ reg |= (pre - 1) << MXC_CCM_PDR0_CSI_PRDF_OFFSET; __raw_writel(reg, MXC_CCM_PDR0); + clk->rate = rate; return 0; } -static unsigned long ssi1_get_rate(struct clk *clk) +static void _clk_per_recalc(struct clk *clk) +{ + unsigned long per_pdf; + + per_pdf = PDR0(MXC_CCM_PDR0_PER_PODF_MASK, + MXC_CCM_PDR0_PER_PODF_OFFSET); + clk->rate = clk->parent->rate / (per_pdf + 1); +} + +static void _clk_ssi1_recalc(struct clk *clk) { unsigned long ssi1_pdf, ssi1_prepdf; @@ -311,10 +456,10 @@ MXC_CCM_PDR1_SSI1_PODF_OFFSET); ssi1_prepdf = PDR1(MXC_CCM_PDR1_SSI1_PRE_PODF_MASK, MXC_CCM_PDR1_SSI1_PRE_PODF_OFFSET); - return clk_get_rate(clk->parent) / (ssi1_prepdf + 1) / (ssi1_pdf + 1); + clk->rate = clk->parent->rate / (ssi1_prepdf + 1) / (ssi1_pdf + 1); } -static unsigned long ssi2_get_rate(struct clk *clk) +static void _clk_ssi2_recalc(struct clk *clk) { unsigned long ssi2_pdf, ssi2_prepdf; @@ -322,10 +467,10 @@ MXC_CCM_PDR1_SSI2_PODF_OFFSET); ssi2_prepdf = PDR1(MXC_CCM_PDR1_SSI2_PRE_PODF_MASK, MXC_CCM_PDR1_SSI2_PRE_PODF_OFFSET); - return clk_get_rate(clk->parent) / (ssi2_prepdf + 1) / (ssi2_pdf + 1); + clk->rate = clk->parent->rate / (ssi2_prepdf + 1) / (ssi2_pdf + 1); } -static unsigned long firi_get_rate(struct clk *clk) +static void _clk_firi_recalc(struct clk *clk) { unsigned long firi_pdf, firi_prepdf; @@ -333,10 +478,10 @@ MXC_CCM_PDR1_FIRI_PODF_OFFSET); firi_prepdf = PDR1(MXC_CCM_PDR1_FIRI_PRE_PODF_MASK, MXC_CCM_PDR1_FIRI_PRE_PODF_OFFSET); - return clk_get_rate(clk->parent) / (firi_prepdf + 1) / (firi_pdf + 1); + clk->rate = clk->parent->rate / (firi_prepdf + 1) / (firi_pdf + 1); } -static unsigned long firi_round_rate(struct clk *clk, unsigned long rate) +static unsigned long _clk_firi_round_rate(struct clk *clk, unsigned long rate) { u32 pre, post; u32 parent = clk_get_rate(clk->parent); @@ -351,7 +496,7 @@ } -static int firi_set_rate(struct clk *clk, unsigned long rate) +static int _clk_firi_set_rate(struct clk *clk, unsigned long rate) { u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); @@ -369,232 +514,724 @@ reg |= (post - 1) << MXC_CCM_PDR1_FIRI_PODF_OFFSET; __raw_writel(reg, MXC_CCM_PDR1); + clk->rate = rate; return 0; } -static unsigned long mbx_get_rate(struct clk *clk) +static void _clk_mbx_recalc(struct clk *clk) { - return clk_get_rate(clk->parent) / 2; + clk->rate = clk->parent->rate / 2; } -static unsigned long mstick1_get_rate(struct clk *clk) +static void _clk_mstick1_recalc(struct clk *clk) { unsigned long msti_pdf; msti_pdf = PDR2(MXC_CCM_PDR2_MST1_PDF_MASK, MXC_CCM_PDR2_MST1_PDF_OFFSET); - return clk_get_rate(clk->parent) / (msti_pdf + 1); + clk->rate = clk->parent->rate / (msti_pdf + 1); } -static unsigned long mstick2_get_rate(struct clk *clk) +static void _clk_mstick2_recalc(struct clk *clk) { unsigned long msti_pdf; msti_pdf = PDR2(MXC_CCM_PDR2_MST2_PDF_MASK, MXC_CCM_PDR2_MST2_PDF_OFFSET); - return clk_get_rate(clk->parent) / (msti_pdf + 1); -} - -static unsigned long ckih_rate; - -static unsigned long clk_ckih_get_rate(struct clk *clk) -{ - return ckih_rate; + clk->rate = clk->parent->rate / (msti_pdf + 1); } static struct clk ckih_clk = { - .get_rate = clk_ckih_get_rate, + .name = "ckih", + .rate = 0, /* determined later (26 or 27 MHz) */ + .flags = RATE_PROPAGATES, +}; + +static struct clk ckil_clk = { + .name = "ckil", + .rate = CKIL_CLK_FREQ, + .flags = RATE_PROPAGATES, }; static struct clk mcu_pll_clk = { + .name = "mcu_pll", .parent = &ckih_clk, - .get_rate = mcu_pll_get_rate, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .flags = RATE_PROPAGATES, }; static struct clk mcu_main_clk = { + .name = "mcu_main_clk", .parent = &mcu_pll_clk, - .get_rate = mcu_main_get_rate, + .recalc = _clk_mcu_main_recalc, }; static struct clk serial_pll_clk = { + .name = "serial_pll", .parent = &ckih_clk, - .get_rate = serial_pll_get_rate, - .enable = serial_pll_enable, - .disable = serial_pll_disable, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .enable = _clk_serial_pll_enable, + .disable = _clk_serial_pll_disable, + .flags = RATE_PROPAGATES, }; static struct clk usb_pll_clk = { + .name = "usb_pll", .parent = &ckih_clk, - .get_rate = usb_pll_get_rate, - .enable = usb_pll_enable, - .disable = usb_pll_disable, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .enable = _clk_usb_pll_enable, + .disable = _clk_usb_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static struct clk cpu_clk = { + .name = "cpu_clk", + .parent = &mcu_main_clk, + .recalc = _clk_cpu_recalc, + .set_rate = _clk_cpu_set_rate, }; static struct clk ahb_clk = { + .name = "ahb_clk", .parent = &mcu_main_clk, - .get_rate = ahb_get_rate, + .recalc = _clk_hclk_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk per_clk = { + .name = "per_clk", + .parent = &usb_pll_clk, + .recalc = _clk_per_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk perclk_clk = { + .name = "perclk_clk", + .parent = &ipg_clk, + .flags = RATE_PROPAGATES, +}; + +static struct clk cspi_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_CSPI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_CSPI2_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CSPI3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .recalc = _clk_ipg_recalc, + .flags = RATE_PROPAGATES, +}; + +static struct clk emi_clk = { + .name = "emi_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_EMI_OFFSET, + .disable = _clk_emi_disable, +}; + +static struct clk gpt_clk = { + .name = "gpt_clk", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_GPT_OFFSET, + .disable = _clk_disable, +}; + +static struct clk pwm_clk = { + .name = "pwm", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_PWM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk epit_clk[] = { + { + .name = "epit_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT1_OFFSET, + .disable = _clk_disable,}, + { + .name = "epit_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk nfc_clk = { + .name = "nfc_clk", + .parent = &ahb_clk, + .recalc = _clk_nfc_recalc, + .set_rate = _clk_nfc_set_rate, + .round_rate = _clk_nfc_round_rate, +}; + +static struct clk scc_clk = { + .name = "scc_clk", + .parent = &ipg_clk, +}; + +static struct clk ipu_clk = { + .name = "ipu_clk", + .parent = &mcu_main_clk, + .recalc = _clk_hsp_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_IPU_OFFSET, + .disable = _clk_disable, +}; + +static struct clk kpp_clk = { + .name = "kpp_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_KPP_OFFSET, + .disable = _clk_disable, +}; + +static struct clk wdog_clk = { + .name = "wdog_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_WDOG_OFFSET, + .disable = _clk_disable, +}; +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_RTC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk usb_clk[] = { + { + .name = "usb_clk", + .parent = &usb_pll_clk, + .recalc = _clk_usb_recalc,}, + { + .name = "usb_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_USBOTG_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk csi_clk = { + .name = "csi_clk", + .parent = &serial_pll_clk, + .recalc = _clk_csi_recalc, + .round_rate = _clk_csi_round_rate, + .set_rate = _clk_csi_set_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_CSI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk uart_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_UART1_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_UART2_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 2, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART3_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 3, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART4_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 4, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART5_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C1_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C2_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 2, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk owire_clk = { + .name = "owire_clk", + .parent = &perclk_clk, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_OWIRE_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk sdhc_clk[] = { + { + .name = "sdhc_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SD_MMC1_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdhc_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SD_MMC2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ssi_clk[] = { + { + .name = "ssi_clk", + .parent = &serial_pll_clk, + .recalc = _clk_ssi1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SSI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "ssi_clk", + .id = 1, + .parent = &serial_pll_clk, + .recalc = _clk_ssi2_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SSI2_OFFSET, + .disable = _clk_disable,}, }; -#define DEFINE_CLOCK(name, i, er, es, gr, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .enable = cgr_enable, \ - .disable = cgr_disable, \ - .secondary = s, \ - .parent = p, \ - } - -#define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = getsetround##_get_rate, \ - .set_rate = getsetround##_set_rate, \ - .round_rate = getsetround##_round_rate, \ - .enable = cgr_enable, \ - .disable = cgr_disable, \ - .secondary = s, \ - .parent = p, \ - } - -DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); - -DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk); -DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CGR0, 22, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(ssi1_clk, 0, MXC_CCM_CGR0, 24, ssi1_get_rate, NULL, &serial_pll_clk); -DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CGR0, 26, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CGR0, 28, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(i2c3_clk, 2, MXC_CCM_CGR0, 30, NULL, NULL, &perclk_clk); - -DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk); -DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(kpp_clk, 0, MXC_CCM_CGR1, 20, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ipu_clk, 0, MXC_CCM_CGR1, 22, hsp_get_rate, NULL, &mcu_main_clk); -DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CGR1, 24, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CGR1, 26, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CGR1, 28, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(owire_clk, 0, MXC_CCM_CGR1, 30, NULL, NULL, &perclk_clk); - -DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CGR2, 0, ssi2_get_rate, NULL, &serial_pll_clk); -DEFINE_CLOCK(cspi1_clk, 0, MXC_CCM_CGR2, 2, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(cspi2_clk, 1, MXC_CCM_CGR2, 4, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(mbx_clk, 0, MXC_CCM_CGR2, 6, mbx_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(emi_clk, 0, MXC_CCM_CGR2, 8, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(rtic_clk, 0, MXC_CCM_CGR2, 10, NULL, NULL, &ahb_clk); -DEFINE_CLOCK1(firi_clk, 0, MXC_CCM_CGR2, 12, firi, NULL, &usb_pll_clk); - -DEFINE_CLOCK(sdma_clk2, 0, NULL, 0, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ - }, - -static struct clk_lookup lookups[] = { - _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi1_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi2_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi3_clk) - _REGISTER_CLOCK(NULL, "gpt", gpt_clk) - _REGISTER_CLOCK(NULL, "pwm", pwm_clk) - _REGISTER_CLOCK(NULL, "wdog", wdog_clk) - _REGISTER_CLOCK(NULL, "rtc", rtc_clk) - _REGISTER_CLOCK(NULL, "epit", epit1_clk) - _REGISTER_CLOCK(NULL, "epit", epit2_clk) - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) - _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) - _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) - _REGISTER_CLOCK(NULL, "kpp", kpp_clk) - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) - _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk) - _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) - _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) - _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) - _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) - _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) - _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) - _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) - _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) - _REGISTER_CLOCK(NULL, "firi", firi_clk) - _REGISTER_CLOCK(NULL, "ata", ata_clk) - _REGISTER_CLOCK(NULL, "rtic", rtic_clk) - _REGISTER_CLOCK(NULL, "rng", rng_clk) - _REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1) - _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2) - _REGISTER_CLOCK(NULL, "mstick", mstick1_clk) - _REGISTER_CLOCK(NULL, "mstick", mstick2_clk) - _REGISTER_CLOCK(NULL, "scc", scc_clk) - _REGISTER_CLOCK(NULL, "iim", iim_clk) - _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) - _REGISTER_CLOCK(NULL, "mbx", mbx_clk) +static struct clk firi_clk = { + .name = "firi_clk", + .parent = &usb_pll_clk, + .round_rate = _clk_firi_round_rate, + .set_rate = _clk_firi_set_rate, + .recalc = _clk_firi_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_FIRI_OFFSET, + .disable = _clk_disable, }; +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ATA_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mbx_clk = { + .name = "mbx_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, + .recalc = _clk_mbx_recalc, +}; + +static struct clk vpu_clk = { + .name = "vpu_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, + .recalc = _clk_mbx_recalc, +}; + +static struct clk rtic_clk = { + .name = "rtic_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_RTIC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rng_clk = { + .name = "rng_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_RNG_OFFSET, + .disable = _clk_disable, +}; + +static struct clk sdma_clk[] = { + { + .name = "sdma_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SDMA_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdma_ipg_clk", + .parent = &ipg_clk,} +}; + +static struct clk mpeg4_clk = { + .name = "mpeg4_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, + .disable = _clk_disable, +}; + +static struct clk vl2cc_clk = { + .name = "vl2cc_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mstick_clk[] = { + { + .name = "mstick_clk", + .id = 0, + .parent = &usb_pll_clk, + .recalc = _clk_mstick1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MEMSTICK1_OFFSET, + .disable = _clk_disable,}, + { + .name = "mstick_clk", + .id = 1, + .parent = &usb_pll_clk, + .recalc = _clk_mstick2_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MEMSTICK2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_IIM_OFFSET, + .disable = _clk_disable, +}; + +static unsigned long _clk_cko1_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div, parent = clk_get_rate(clk->parent); + + div = parent / rate; + if (parent % rate) + div++; + + if (div > 8) + div = 16; + else if (div > 4) + div = 8; + else if (div > 2) + div = 4; + + return parent / div; +} + +static int _clk_cko1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, parent = clk_get_rate(clk->parent); + + div = parent / rate; + + if (div == 16) + div = 4; + else if (div == 8) + div = 3; + else if (div == 4) + div = 2; + else if (div == 2) + div = 1; + else if (div == 1) + div = 0; + else + return -EINVAL; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOUTDIV_MASK; + reg |= div << MXC_CCM_COSR_CLKOUTDIV_OFFSET; + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static void _clk_cko1_recalc(struct clk *clk) +{ + u32 div; + + div = __raw_readl(MXC_CCM_COSR) & MXC_CCM_COSR_CLKOUTDIV_MASK >> + MXC_CCM_COSR_CLKOUTDIV_OFFSET; + + clk->rate = clk->parent->rate / (1 << div); +} + +static int _clk_cko1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOSEL_MASK; + + if (parent == &mcu_main_clk) + reg |= 0 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ipg_clk) + reg |= 1 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &usb_pll_clk) + reg |= 2 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == mcu_main_clk.parent) + reg |= 3 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ahb_clk) + reg |= 5 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &cpu_clk) + reg |= 6 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &serial_pll_clk) + reg |= 7 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ckih_clk) + reg |= 8 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &emi_clk) + reg |= 9 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ipu_clk) + reg |= 0xA << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &nfc_clk) + reg |= 0xB << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &uart_clk[0]) + reg |= 0xC << MXC_CCM_COSR_CLKOSEL_OFFSET; + else + return -EINVAL; + + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static int _clk_cko1_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) | MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static void _clk_cko1_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); +} + +static struct clk cko1_clk = { + .name = "cko1_clk", + .recalc = _clk_cko1_recalc, + .set_rate = _clk_cko1_set_rate, + .round_rate = _clk_cko1_round_rate, + .set_parent = _clk_cko1_set_parent, + .enable = _clk_cko1_enable, + .disable = _clk_cko1_disable, +}; + +static struct clk *mxc_clks[] = { + &ckih_clk, + &ckil_clk, + &mcu_pll_clk, + &usb_pll_clk, + &serial_pll_clk, + &mcu_main_clk, + &cpu_clk, + &ahb_clk, + &per_clk, + &perclk_clk, + &cko1_clk, + &emi_clk, + &cspi_clk[0], + &cspi_clk[1], + &cspi_clk[2], + &ipg_clk, + &gpt_clk, + &pwm_clk, + &wdog_clk, + &rtc_clk, + &epit_clk[0], + &epit_clk[1], + &nfc_clk, + &ipu_clk, + &kpp_clk, + &usb_clk[0], + &usb_clk[1], + &csi_clk, + &uart_clk[0], + &uart_clk[1], + &uart_clk[2], + &uart_clk[3], + &uart_clk[4], + &i2c_clk[0], + &i2c_clk[1], + &i2c_clk[2], + &owire_clk, + &sdhc_clk[0], + &sdhc_clk[1], + &ssi_clk[0], + &ssi_clk[1], + &firi_clk, + &ata_clk, + &rtic_clk, + &rng_clk, + &sdma_clk[0], + &sdma_clk[1], + &mstick_clk[0], + &mstick_clk[1], + &scc_clk, + &iim_clk, +}; + +static int cpu_curr_wp; +static struct cpu_wp *cpu_wp_tbl; + +static int cpu_wp_nr; + +extern void propagate_rate(struct clk *tclk); + int __init mx31_clocks_init(unsigned long fref) { u32 reg; - int i; + struct clk **clkp; - ckih_rate = fref; + ckil_clk.rate = 32768; + ckih_clk.rate = fref; - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); - /* change the csi_clk parent if necessary */ - reg = __raw_readl(MXC_CCM_CCMR); - if (!(reg & MXC_CCM_CCMR_CSCS)) - if (clk_set_parent(&csi_clk, &usb_pll_clk)) - pr_err("%s: error changing csi_clk parent\n", __func__); + if (cpu_is_mx31()) { + clk_register(&mpeg4_clk); + clk_register(&mbx_clk); + } else { + clk_register(&vpu_clk); + clk_register(&vl2cc_clk); + } + /* CCMR stby control */ + reg = __raw_readl(MXC_CCM_CCMR); + reg |= MXC_CCM_CCMR_VSTBY | MXC_CCM_CCMR_WAMO; + __raw_writel(reg, MXC_CCM_CCMR); /* Turn off all possible clocks */ - __raw_writel((3 << 4), MXC_CCM_CGR0); + __raw_writel(MXC_CCM_CGR0_GPT_MASK, MXC_CCM_CGR0); __raw_writel(0, MXC_CCM_CGR1); - __raw_writel((3 << 8) | (3 << 14) | (3 << 16)| - 1 << 27 | 1 << 28, /* Bit 27 and 28 are not defined for - MX32, but still required to be set */ - MXC_CCM_CGR2); - /* - * Before turning off usb_pll make sure ipg_per_clk is generated - * by ipg_clk and not usb_pll. - */ - __raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 << 24), MXC_CCM_CCMR); + reg = MXC_CCM_CGR2_EMI_MASK | /*For MX32 */ + MXC_CCM_CGR2_IPMUX1_MASK | /*For MX32 */ + MXC_CCM_CGR2_IPMUX2_MASK | /*For MX32 */ + MXC_CCM_CGR2_MXCCLKENSEL_MASK | /*For MX32 */ + MXC_CCM_CGR2_CHIKCAMPEN_MASK | /*For MX32 */ + MXC_CCM_CGR2_OVRVPUBUSY_MASK | /*For MX32 */ + 0x3 << 27 | /*Bit 27 and 28 are not defined for MX32, + but still requires to be set */ + MXC_CCM_CGR2_APMSYSCLKSEL_MASK | MXC_CCM_CGR2_AOMENA_MASK; + __raw_writel(reg, MXC_CCM_CGR2); + + clk_disable(&cko1_clk); + clk_disable(&usb_pll_clk); - usb_pll_disable(&usb_pll_clk); + pr_info("Clock input source is %ld\n", ckih_clk.rate); - pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); + /* This will propagate to all children and init all the clock rates */ + propagate_rate(&ckih_clk); clk_enable(&gpt_clk); clk_enable(&emi_clk); @@ -602,15 +1239,173 @@ clk_enable(&serial_pll_clk); - if (mx31_revision() >= CHIP_REV_2_0) { - reg = __raw_readl(MXC_CCM_PMCR1); - /* No PLL restart on DVFS switch; enable auto EMI handshake */ - reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN; - __raw_writel(reg, MXC_CCM_PMCR1); + cpu_curr_wp = cpu_clk.rate / ahb_clk.rate - 1; + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + + /* Init serial PLL according */ + clk_set_rate(&serial_pll_clk, (cpu_wp_tbl[2].pll_rate)); + + if (cpu_is_mx31_rev(CHIP_REV_2_0) < 0) { + /* replace 399MHz wp with 266MHz one */ + memcpy(&cpu_wp_tbl[2], &cpu_wp_tbl[1], sizeof(cpu_wp_tbl[0])); } - mxc_timer_init(&ipg_clk); + mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); return 0; } +#define MXC_PMCR0_DVFS_MASK (MXC_CCM_PMCR0_DVSUP_MASK | \ + MXC_CCM_PMCR0_UDSC_MASK | \ + MXC_CCM_PMCR0_VSCNT_MASK | \ + MXC_CCM_PMCR0_DPVCR) + +#define MXC_PDR0_MAX_MCU_MASK (MXC_CCM_PDR0_MAX_PODF_MASK | \ + MXC_CCM_PDR0_MCU_PODF_MASK | \ + MXC_CCM_PDR0_HSP_PODF_MASK | \ + MXC_CCM_PDR0_IPG_PODF_MASK | \ + MXC_CCM_PDR0_NFC_PODF_MASK) + +static DEFINE_SPINLOCK(mxc_dfs_lock); + +static void dptcen_after_timeout(unsigned long ptr) +{ + unsigned long flags = 0; + + spin_lock_irqsave(&mxc_dfs_lock, flags); + + /* + * If DPTC is still active and core is running in Turbo mode + */ + if (dptcen_timer.data == cpu_wp_nr - 1) { + dptc_resume(DPTC_GP_ID); + } + spin_unlock_irqrestore(&mxc_dfs_lock, flags); +} + +/*! + * Setup cpu clock based on working point. + * @param wp cpu freq working point (0 is the slowest) + * @return 0 on success or error code on failure. + */ +static int cpu_clk_set_wp(int wp) +{ + struct cpu_wp *p; + u32 dvsup; + u32 pmcr0, pmcr1; + u32 pdr0; + u32 cgr2 = 0x80000000; + u32 vscnt = MXC_CCM_PMCR0_VSCNT_2; + u32 udsc = MXC_CCM_PMCR0_UDSC_DOWN; + void __iomem *ipu_base = IO_ADDRESS(IPU_CTRL_BASE_ADDR); + u32 ipu_conf; + + if (wp >= cpu_wp_nr || wp < 0) { + printk(KERN_ERR "Wrong wp: %d for cpu_clk_set_wp\n", wp); + return -EINVAL; + } + if (wp == cpu_curr_wp) { + return 0; + } + + pmcr0 = __raw_readl(MXC_CCM_PMCR0); + pmcr1 = __raw_readl(MXC_CCM_PMCR1); + pdr0 = __raw_readl(MXC_CCM_PDR0); + + if (!(pmcr0 & MXC_CCM_PMCR0_UPDTEN)) { + return -EBUSY; + } + + if (wp > cpu_curr_wp) { + /* going faster */ + if (wp == (cpu_wp_nr - 1)) { + /* Only update vscnt going into Turbo */ + vscnt = MXC_CCM_PMCR0_VSCNT_8; + } + udsc = MXC_CCM_PMCR0_UDSC_UP; + } + + p = &cpu_wp_tbl[wp]; + + dvsup = (cpu_wp_nr - 1 - wp) << MXC_CCM_PMCR0_DVSUP_OFFSET; + + if ((mcu_main_clk.rate == 399000000) && (p->cpu_rate == 532000000)) { + cgr2 = __raw_readl(MXC_CCM_CGR2); + cgr2 &= 0x7fffffff; + vscnt = 0; + pmcr0 = (pmcr0 & ~MXC_PMCR0_DVFS_MASK) | dvsup | vscnt; + pr_debug("manul dvfs, dvsup = %x\n", dvsup); + __raw_writel(cgr2, MXC_CCM_CGR2); + __raw_writel(pmcr0, MXC_CCM_PMCR0); + udelay(100); + } + + if (mcu_main_clk.rate == p->pll_rate) { + /* No pll switching and relocking needed */ + pmcr0 |= MXC_CCM_PMCR0_DFSUP0_PDR; + } else { + /* pll switching and relocking needed */ + pmcr0 ^= MXC_CCM_PMCR0_DFSUP1; /* flip MSB bit */ + pmcr0 &= ~(MXC_CCM_PMCR0_DFSUP0); + } + + pmcr0 = (pmcr0 & ~MXC_PMCR0_DVFS_MASK) | dvsup | vscnt | udsc; + /* also enable DVFS hardware */ + pmcr0 |= MXC_CCM_PMCR0_DVFEN; + + __raw_writel(pmcr0, MXC_CCM_PMCR0); + + /* IPU and DI submodule must be on for PDR0 update to take effect */ + if (!clk_get_usecount(&ipu_clk)) + ipu_clk.enable(&ipu_clk); + ipu_conf = __raw_readl(ipu_base); + if (!(ipu_conf & 0x40)) + __raw_writel(ipu_conf | 0x40, ipu_base); + + __raw_writel((pdr0 & ~MXC_PDR0_MAX_MCU_MASK) | p->pdr0_reg, + MXC_CCM_PDR0); + + if ((pmcr0 & MXC_CCM_PMCR0_DFSUP0) == MXC_CCM_PMCR0_DFSUP0_PLL) { + /* prevent pll restart */ + pmcr1 |= 0x80; + __raw_writel(pmcr1, MXC_CCM_PMCR1); + /* PLL and post divider update */ + if ((pmcr0 & MXC_CCM_PMCR0_DFSUP1) == MXC_CCM_PMCR0_DFSUP1_SPLL) { + __raw_writel(p->pll_reg, MXC_CCM_SRPCTL); + serial_pll_clk.rate = p->pll_rate; + mcu_main_clk.parent = &serial_pll_clk; + } else { + __raw_writel(p->pll_reg, MXC_CCM_MPCTL); + mcu_pll_clk.rate = p->pll_rate; + mcu_main_clk.parent = &mcu_pll_clk; + } + } + + if ((cgr2 & 0x80000000) == 0x0) { + pr_debug("start auto dvfs\n"); + cgr2 |= 0x80000000; + __raw_writel(cgr2, MXC_CCM_CGR2); + } + + mcu_main_clk.rate = p->pll_rate; + cpu_clk.rate = p->cpu_rate; + + cpu_curr_wp = wp; + + /* Restore IPU_CONF setting */ + __raw_writel(ipu_conf, ipu_base); + if (!clk_get_usecount(&ipu_clk)) + ipu_clk.disable(&ipu_clk); + + if (wp == cpu_wp_nr - 1) { + init_timer(&dptcen_timer); + dptcen_timer.expires = jiffies + 2; + dptcen_timer.function = dptcen_after_timeout; + dptcen_timer.data = wp; + add_timer(&dptcen_timer); + } else { + dptc_suspend(DPTC_GP_ID); + } + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/usb_dr.c @@ -0,0 +1,129 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include "usb.h" + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_13783_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_SERIAL, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbotg_fs_active, + .gpio_usb_inactive = gpio_usbotg_fs_inactive, + .transceiver = "mc13783", +}; + +static struct fsl_usb2_platform_data __maybe_unused dr_1301_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_SERIAL, + .power_budget = 150, /* 150 mA max power */ + .gpio_usb_active = gpio_usbotg_fs_active, + .gpio_usb_inactive = gpio_usbotg_fs_inactive, + .transceiver = "isp1301", +}; + +static struct fsl_usb2_platform_data __maybe_unused dr_1504_config = { + .name = "DR", + .platform_init = usbotg_init, + .platform_uninit = usbotg_uninit, + .phy_mode = FSL_USB2_PHY_ULPI, + .power_budget = 150, /* 150 mA max power */ + .gpio_usb_active = gpio_usbotg_hs_active, + .gpio_usb_inactive = gpio_usbotg_hs_inactive, + .transceiver = "isp1504", +}; + + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)(USB_OTGREGS_BASE), + .end = (u32)(USB_OTGREGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB3, + .flags = IORESOURCE_IRQ, + }, +}; + + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device __maybe_unused dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); +#ifdef CONFIG_USB_GADGET_WAKE_UP + /* set udc may and should wakeup */ + device_init_wakeup(&(dr_udc_device.dev), 1); +#endif + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/iomux.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/iomux.c @@ -1,181 +1,260 @@ /* - * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright (C) 2008 by Sascha Hauer - * Copyright (C) 2009 by Valentin Longchamp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup GPIO_MX31 Board GPIO and Muxing Setup + * @ingroup MSL_MX31 + */ +/*! + * @file mach-mx3/iomux.c + * + * @brief I/O Muxing control functions + * + * @ingroup GPIO_MX31 + */ + +#include #include #include -#include -#include #include #include -#include +#include "iomux.h" -/* - * IOMUX register (base) addresses +/*! + * 4 control fields per MUX register */ -#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) -#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000) -#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004) -#define IOMUXGPR (IOMUX_BASE + 0x008) -#define IOMUXSW_MUX_CTL (IOMUX_BASE + 0x00C) -#define IOMUXSW_PAD_CTL (IOMUX_BASE + 0x154) - -static DEFINE_SPINLOCK(gpio_mux_lock); +#define MUX_CTL_FIELDS 4 -#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) +/*! + * 3 control fields per PAD register + */ +#define PAD_CTL_FIELDS 3 -unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG]; -/* - * set the mode for a IOMUX pin. +/*! + * Maximum number of MUX pins + * Number of pins = (highest iomux reg - lowest iomux reg + 1) * (4 pins/reg) */ -int mxc_iomux_mode(unsigned int pin_mode) -{ - u32 field, l, mode, ret = 0; - void __iomem *reg; +#define MUX_PIN_NUM_MAX \ + (((u32 *)IOMUXSW_MUX_END - (u32 *)IOMUXSW_MUX_CTL + 1) * MUX_CTL_FIELDS) - reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK); - field = pin_mode & 0x3; - mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; +/*! + * Number of pad controls = + * (highest pad ctl reg - lowest pad ctl reg + 1) * (3 pins/reg) + */ +#define PAD_CTL_NUM_MAX \ + (((u32 *)IOMUXSW_PAD_END - (u32 *)IOMUXSW_PAD_CTL + 1) * PAD_CTL_FIELDS) - spin_lock(&gpio_mux_lock); +#define PIN_TO_IOMUX_INDEX(pin) ((pin >> MUX_I) & ((1 << (MUX_F - MUX_I)) - 1)) +#define PIN_TO_IOMUX_FIELD(pin) ((pin >> MUX_F) & ((1 << (PAD_I - MUX_F)) - 1)) - l = __raw_readl(reg); - l &= ~(0xff << (field * 8)); - l |= mode << (field * 8); - __raw_writel(l, reg); +/*! + * 8 bits for each MUX control field + */ +#define MUX_CTL_BIT_LEN 8 - spin_unlock(&gpio_mux_lock); +/*! + * 10 bits for each PAD control field + */ +#define MUX_PAD_BIT_LEN 10 - return ret; -} -EXPORT_SYMBOL(mxc_iomux_mode); +/*! + * IOMUX register (base) addresses + */ +#define IOMUXGPR (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x008) /*!< General purpose */ +#define IOMUXSW_MUX_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x00C) /*!< MUX control */ +#define IOMUXSW_MUX_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x150) /*!< last MUX control register */ +#define IOMUXSW_PAD_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x154) /*!< Pad control */ +#define IOMUXSW_PAD_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x308) /*!< last Pad control register */ +#define IOMUXINT_OBS1 (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x000) /*!< Observe interrupts 1 */ +#define IOMUXINT_OBS2 (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x004) /*!< Observe interrupts 2 */ + +/* len - mask bit length; fld - mask bit field. Example, to have the mask: + * 0xFF000000, use GET_FIELD_MASK(8, 3). Translate in plain language: + * "set the 3rd (0-based) 8-bit-long field to all 1's */ +#define GET_FIELD_MASK(len, fld) (((1 << len) - 1) << (len * fld)) +static DEFINE_SPINLOCK(gpio_mux_lock); +static u8 iomux_pin_res_table[MUX_PIN_NUM_MAX]; -/* - * This function configures the pad value for a IOMUX pin. +/*! + * This function is used to configure a pin through the IOMUX module. + * FIXED ME: for backward compatible. Will be static function! + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + * + * @return 0 if successful; Non-zero otherwise */ -void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) +int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in) { - u32 field, l; void __iomem *reg; + u32 l, ret = 0; + u32 mux_index = PIN_TO_IOMUX_INDEX(pin); + u32 mux_field = PIN_TO_IOMUX_FIELD(pin); + u32 mux_mask = GET_FIELD_MASK(MUX_CTL_BIT_LEN, mux_field); + u8 *rp; - pin &= IOMUX_PADNUM_MASK; - reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4; - field = (pin + 2) % 3; - - pr_debug("%s: reg offset = 0x%x, field = %d\n", - __func__, (pin + 2) / 3, field); + BUG_ON((mux_index > (MUX_PIN_NUM_MAX / MUX_CTL_FIELDS - 1)) || + (mux_field >= MUX_CTL_FIELDS)); + reg = IOMUXSW_MUX_CTL + (mux_index * 4); spin_lock(&gpio_mux_lock); - l = __raw_readl(reg); - l &= ~(0x1ff << (field * 10)); - l |= config << (field * 10); + l = (l & (~mux_mask)) | + (((out << 4) | in) << (mux_field * MUX_CTL_BIT_LEN)); __raw_writel(l, reg); - - spin_unlock(&gpio_mux_lock); -} -EXPORT_SYMBOL(mxc_iomux_set_pad); - -/* - * allocs a single pin: - * - reserves the pin so that it is not claimed by another driver - * - setups the iomux according to the configuration - */ -int mxc_iomux_alloc_pin(const unsigned int pin, const char *label) -{ - unsigned pad = pin & IOMUX_PADNUM_MASK; - - if (pad >= (PIN_MAX + 1)) { - printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", - pad, label ? label : "?"); - return -EINVAL; + /* + * Log a warning if a pin changes ownership + */ + rp = iomux_pin_res_table + mux_index * MUX_CTL_FIELDS + mux_field; + if (out & *rp && *rp != ((out << 4) | in)) { + /* + * Don't call printk if we're tweaking the console uart or + * we'll deadlock. + */ + if (pin != MX31_PIN_CTS1 && + pin != MX31_PIN_RTS1 && + pin != MX31_PIN_DCD_DCE1 && + pin != MX31_PIN_DSR_DTE1 && + pin != MX31_PIN_DTR_DTE1 && + pin != MX31_PIN_RI_DCE1 && + pin != MX31_PIN_DSR_DCE1 && + pin != MX31_PIN_DTR_DCE1 && + pin != MX31_PIN_RXD1 && pin != MX31_PIN_TXD1) { + printk(KERN_ERR "iomux_config_mux: Warning: iomux pin" + " config changed, index=%d field=%d, " + " prev=0x%x new=0x%x\n", mux_index, mux_field, + *rp, (out << 4) | in); + } + ret = -EINVAL; } + *rp = (out << 4) | in; + spin_unlock(&gpio_mux_lock); - if (test_and_set_bit(pad, mxc_pin_alloc_map)) { - printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", - pad, label ? label : "?"); - return -EBUSY; - } - mxc_iomux_mode(pin); - - return 0; + return ret; } -EXPORT_SYMBOL(mxc_iomux_alloc_pin); -int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, - const char *label) +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in) { - unsigned int *p = pin_list; - int i; - int ret = -EINVAL; - - for (i = 0; i < count; i++) { - ret = mxc_iomux_alloc_pin(*p, label); - if (ret) - goto setup_error; - p++; + int ret = iomux_config_mux(pin, out, in); + if (out == OUTPUTCONFIG_GPIO && in == INPUTCONFIG_GPIO) { + ret |= gpio_request(IOMUX_TO_GPIO(pin), NULL); } - return 0; - -setup_error: - mxc_iomux_release_multiple_pins(pin_list, i); return ret; } -EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins); -void mxc_iomux_release_pin(const unsigned int pin) +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in) { - unsigned pad = pin & IOMUX_PADNUM_MASK; - - if (pad < (PIN_MAX + 1)) - clear_bit(pad, mxc_pin_alloc_map); + u32 mux_index = PIN_TO_IOMUX_INDEX(pin); + u32 mux_field = PIN_TO_IOMUX_FIELD(pin); + u8 *rp = iomux_pin_res_table + mux_index * MUX_CTL_FIELDS + mux_field; + + BUG_ON((mux_index > (MUX_PIN_NUM_MAX / MUX_CTL_FIELDS - 1)) || + (mux_field >= MUX_CTL_FIELDS)); + + *rp = 0; + if (out == OUTPUTCONFIG_GPIO && in == INPUTCONFIG_GPIO) { + gpio_free(IOMUX_TO_GPIO(pin)); + } } -EXPORT_SYMBOL(mxc_iomux_release_pin); -void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count) +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config) { - unsigned int *p = pin_list; - int i; + void __iomem *reg; + u32 l; + u32 pad_index = (pin >> PAD_I) & ((1 << (PAD_F - PAD_I)) - 1); + u32 pad_field = (pin >> PAD_F) & ((1 << (MUX_IO_I - PAD_F)) - 1); + u32 pad_mask = GET_FIELD_MASK(MUX_PAD_BIT_LEN, pad_field); - for (i = 0; i < count; i++) { - mxc_iomux_release_pin(*p); - p++; - } + BUG_ON((pad_index > (PAD_CTL_NUM_MAX / PAD_CTL_FIELDS - 1)) || + (pad_field >= PAD_CTL_FIELDS)); + + reg = IOMUXSW_PAD_CTL + (pad_index * 4); + spin_lock(&gpio_mux_lock); + l = __raw_readl(reg); + l = (l & (~pad_mask)) | (config << (pad_field * MUX_PAD_BIT_LEN)); + __raw_writel(l, reg); + spin_unlock(&gpio_mux_lock); } -EXPORT_SYMBOL(mxc_iomux_release_multiple_pins); /* + * FIXED ME: for backward compatible. to be removed! + */ +void iomux_config_pad(iomux_pin_name_t pin, u32 config) +{ + mxc_iomux_set_pad(pin, config); +} + +/*! * This function enables/disables the general purpose function for a particular * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable */ -void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en) +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en) { u32 l; spin_lock(&gpio_mux_lock); l = __raw_readl(IOMUXGPR); - if (en) + if (en) { l |= gp; - else + } else { l &= ~gp; - + } __raw_writel(l, IOMUXGPR); spin_unlock(&gpio_mux_lock); } + +/*! + * FIXED ME: for backward compatible. to be removed! + */ +void iomux_config_gpr(iomux_gp_func_t gp, bool en) +{ + mxc_iomux_set_gpr(gp, en); +} + +EXPORT_SYMBOL(mxc_request_iomux); +EXPORT_SYMBOL(mxc_free_iomux); +EXPORT_SYMBOL(mxc_iomux_set_pad); EXPORT_SYMBOL(mxc_iomux_set_gpr); +EXPORT_SYMBOL(iomux_config_pad); +EXPORT_SYMBOL(iomux_config_gpr); +EXPORT_SYMBOL(iomux_config_mux); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/mxc_pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/mxc_pm.c @@ -0,0 +1,440 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup DPM_MX31 Power Management + * @ingroup MSL_MX31 + */ +/*! + * @file mach-mx3/mxc_pm.c + * + * @brief This file provides all the kernel level and user level API + * definitions for the CRM_MCU and DPLL in mx3. + * + * @ingroup DPM_MX31 + */ + +/* + * Include Files + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "crm_regs.h" + +/* Local defines */ +#define FREQ_COMP_TOLERANCE 200 /* tolerance percentage times 100 */ +#define MCU_PLL_MAX_FREQ 600000000 /* Maximum frequency MCU PLL clock */ +#define MCU_PLL_MIN_FREQ 160000000 /* Minimum frequency MCU PLL clock */ +#define NFC_MAX_FREQ 20000000 /* Maximum frequency NFC clock */ +#define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ + +static struct clk *mcu_pll_clk; +static struct clk *cpu_clk; +static struct clk *ahb_clk; +static struct clk *ipg_clk; + +/*! + * Spinlock to protect CRM register accesses + */ +static DEFINE_SPINLOCK(mxc_crm_lock); + +/*! + * This function is called to modify the contents of a CCM_MCU register + * + * @param reg_offset the CCM_MCU register that will read + * @param mask the mask to be used to clear the bits that are to be modified + * @param data the data that should be written to the register + */ +void mxc_ccm_modify_reg(void *reg_offset, unsigned int mask, + unsigned int data) +{ + unsigned long flags; + unsigned long reg; + + spin_lock_irqsave(&mxc_crm_lock, flags); + reg = __raw_readl(reg_offset); + reg = (reg & (~mask)) | data; + __raw_writel(reg, reg_offset); + spin_unlock_irqrestore(&mxc_crm_lock, flags); +} + +/*! + * Compare two frequences using allowable tolerance + * + * The MX3 PLL can generate many frequencies. This function + * compares the generated frequency to the requested frequency + * and determines it they are within and acceptable tolerance. + * + * @param freq1 desired frequency + * @param freq2 generated frequency + * + * @return Returns 0 is frequencies are within talerance + * and non-zero is they are not. + */ +static int freq_equal(unsigned long freq1, unsigned long freq2) +{ + if (freq1 > freq2) { + return (freq1 - freq2) <= (freq1 / FREQ_COMP_TOLERANCE); + } + return (freq2 - freq1) <= (freq1 / FREQ_COMP_TOLERANCE); +} + +/*! + * Calculate new MCU clock dividers for the PDR0 regiser. + * + * @param mcu_main_clk PLL output frequency (Hz) + * @param arm_freq desired ARM frequency (Hz) + * @param max_freq desired MAX frequency (Hz) + * @param ip_freq desired IP frequency (Hz) + * @param mask were to return PDR0 mask + * @param value were to return PDR0 value + * + * @return Returns 0 on success or + * Returns non zero if error + * PLL_LESS_ARM_ERR if pll frequency is less than + * desired core frequency + * FREQ_OUT_OF_RANGE if desided frequencies ar not + * possible with the current mcu pll frequency. + */ +static int +cal_pdr0_value(unsigned long mcu_main_clk, + long arm_freq, + long max_freq, + long ip_freq, unsigned long *mask, unsigned long *value) +{ + unsigned long arm_div; /* ARM core clock divider */ + unsigned long max_div; /* MAX clock divider */ + unsigned long ipg_div; /* IPG clock divider */ + unsigned long nfc_div; /* NFC (Nand Flash Controller) clock divider */ + unsigned long hsp_div; /* HSP clock divider */ + + if (arm_freq > mcu_main_clk) { + return -PLL_LESS_ARM_ERR; + } + + arm_div = mcu_main_clk / arm_freq; + if ((arm_div == 0) || !freq_equal(arm_freq, mcu_main_clk / arm_div)) { + return FREQ_OUT_OF_RANGE; + } + max_div = mcu_main_clk / max_freq; + if ((max_div == 0) || !freq_equal(max_freq, mcu_main_clk / max_div)) { + return FREQ_OUT_OF_RANGE; + } + hsp_div = max_div; + + ipg_div = max_freq / ip_freq; + if ((ipg_div == 0) || !freq_equal(ip_freq, max_freq / ipg_div)) { + return FREQ_OUT_OF_RANGE; + } + + nfc_div = ((max_freq - 1000000) / NFC_MAX_FREQ) + 1; + + /* All of the divider values have been calculated. + * Now change the hardware register. */ + + *mask = MXC_CCM_PDR0_HSP_PODF_MASK | + MXC_CCM_PDR0_NFC_PODF_MASK | + MXC_CCM_PDR0_IPG_PODF_MASK | + MXC_CCM_PDR0_MAX_PODF_MASK | MXC_CCM_PDR0_MCU_PODF_MASK; + + *value = ((hsp_div - 1) << MXC_CCM_PDR0_HSP_PODF_OFFSET) | + ((nfc_div - 1) << MXC_CCM_PDR0_NFC_PODF_OFFSET) | + ((ipg_div - 1) << MXC_CCM_PDR0_IPG_PODF_OFFSET) | + ((max_div - 1) << MXC_CCM_PDR0_MAX_PODF_OFFSET) | + ((arm_div - 1) << MXC_CCM_PDR0_MCU_PODF_OFFSET); + + return 0; +} + +/*! + * Integer clock scaling + * + * Change main arm clock frequencies without changing the PLL. + * The integer dividers are changed to produce the desired + * frequencies. The number of valid frequency are limited and + * are determined by the current MCU PLL frequency + * + * @param arm_freq desired ARM frequency (Hz) + * @param max_freq desired MAX frequency (Hz) + * @param ip_freq desired IP frequency (Hz) + * + * @return Returns 0 on success or + * Returns non zero if error + * PLL_LESS_ARM_ERR if pll frequency is less than + * desired core frequency + * FREQ_OUT_OF_RANGE if desided frequencies ar not + * possible with the current mcu pll frequency. + */ +int mxc_pm_intscale(long arm_freq, long max_freq, long ip_freq) +{ + unsigned long mcu_main_clk; /* mcu clock domain main clock */ + unsigned long mask; + unsigned long value; + int ret_value; + + printk(KERN_INFO "arm_freq=%ld, max_freq=%ld, ip_freq=%ld\n", + arm_freq, max_freq, ip_freq); + //print_frequencies(); /* debug */ + + mcu_main_clk = clk_get_rate(mcu_pll_clk); + ret_value = cal_pdr0_value(mcu_main_clk, arm_freq, max_freq, ip_freq, + &mask, &value); + if ((arm_freq != clk_round_rate(cpu_clk, arm_freq)) || + (max_freq != clk_round_rate(ahb_clk, max_freq)) || + (ip_freq != clk_round_rate(ipg_clk, ip_freq))) { + return -EINVAL; + } + + if ((max_freq != clk_get_rate(ahb_clk)) || + (ip_freq != clk_get_rate(ipg_clk))) { + return -EINVAL; + } + + if (arm_freq != clk_get_rate(cpu_clk)) { + ret_value = clk_set_rate(cpu_clk, arm_freq); + } + return ret_value; +} + +/*! + * PLL clock scaling + * + * Change MCU PLL frequency and adjust derived clocks. Integer + * dividers are used generate the derived clocks so changed to produce + * the desired the valid frequencies are limited by the desired ARM + * frequency. + * + * The clock source for the MCU is set to the MCU PLL. + * + * @param arm_freq desired ARM frequency (Hz) + * @param max_freq desired MAX frequency (Hz) + * @param ip_freq desired IP frequency (Hz) + * + * @return Returns 0 on success or + * Returns non zero if error + * PLL_LESS_ARM_ERR if pll frequency is less than + * desired core frequency + * FREQ_OUT_OF_RANGE if desided frequencies ar not + * possible with the current mcu pll frequency. + */ +int mxc_pm_pllscale(long arm_freq, long max_freq, long ip_freq) +{ + signed long pll_freq = 0; /* target pll frequency */ + unsigned long old_pll; + unsigned long mask; + unsigned long value; + int ret_value; + + printk(KERN_INFO "arm_freq=%ld, max_freq=%ld, ip_freq=%ld\n", + arm_freq, max_freq, ip_freq); + //print_frequencies(); + + do { + pll_freq += arm_freq; + if ((pll_freq > MCU_PLL_MAX_FREQ) || (pll_freq / 8 > arm_freq)) { + return FREQ_OUT_OF_RANGE; + } + if (pll_freq < MCU_PLL_MIN_FREQ) { + ret_value = 111; + } else { + ret_value = + cal_pdr0_value(pll_freq, arm_freq, max_freq, + ip_freq, &mask, &value); + } + } while (ret_value != 0); + + old_pll = clk_get_rate(mcu_pll_clk); + if (pll_freq > old_pll) { + /* if pll freq is increasing then change dividers first */ + mxc_ccm_modify_reg(MXC_CCM_PDR0, mask, value); + ret_value = clk_set_rate(mcu_pll_clk, pll_freq); + } else { + /* if pll freq is decreasing then change pll first */ + ret_value = clk_set_rate(mcu_pll_clk, pll_freq); + mxc_ccm_modify_reg(MXC_CCM_PDR0, mask, value); + } + //print_frequencies(); + return ret_value; +} + +/*! + * Implementing steps required to transition to low-power modes + * + * @param mode The desired low-power mode. Possible values are, + * WAIT_MODE, DOZE_MODE, STOP_MODE or DSM_MODE + * + */ +void mxc_pm_lowpower(int mode) +{ + unsigned int lpm; + int enable_flag; + unsigned long reg; + + local_irq_disable(); + enable_flag = 0; + + switch (mode) { + case STOP_MODE: + /* State Retention mode */ + lpm = 2; + /* Disable timer interrupt */ + disable_irq(MXC_INT_GPT); + enable_flag = 1; + + /* Enable Well Bias and set VSTBY + * VSTBY pin will be asserted during SR mode. This asks the + * PM IC to set the core voltage to the standby voltage + * Must clear the MXC_CCM_CCMR_SBYCS bit as well */ + mxc_ccm_modify_reg(MXC_CCM_CCMR, + MXC_CCM_CCMR_WBEN | MXC_CCM_CCMR_VSTBY | + MXC_CCM_CCMR_SBYCS, + MXC_CCM_CCMR_WBEN | MXC_CCM_CCMR_VSTBY | + MXC_CCM_CCMR_SBYCS); + + mxc_ccm_modify_reg(MXC_CCM_CCMR, + MXC_CCM_CCMR_LPM_MASK, + lpm << MXC_CCM_CCMR_LPM_OFFSET); + cpu_do_idle(); + break; + + case DSM_MODE: + /* Deep Sleep Mode */ + lpm = 3; + /* Disable timer interrupt */ + disable_irq(MXC_INT_GPT); + enable_flag = 1; + /* Enabled Well Bias + * SBYCS = 0, MCU clock source is disabled*/ + mxc_ccm_modify_reg(MXC_CCM_CCMR, + MXC_CCM_CCMR_WBEN | MXC_CCM_CCMR_VSTBY | + MXC_CCM_CCMR_SBYCS | MXC_CCM_CCMR_LPM_MASK, + MXC_CCM_CCMR_WBEN | MXC_CCM_CCMR_VSTBY | + MXC_CCM_CCMR_SBYCS | + (lpm << MXC_CCM_CCMR_LPM_OFFSET)); + + /* wake up by keypad */ + reg = __raw_readl(MXC_CCM_WIMR); + reg &= ~(1 << 18); + __raw_writel(reg, MXC_CCM_WIMR); + + flush_cache_all(); + l2x0_disable(); + + mxc_pm_arch_entry(IO_ADDRESS(MX31_NFC_BASE_ADDR), 2048); + printk(KERN_INFO "Resume from DSM\n"); + + l2x0_enable(); + mxc_init_irq(); + + break; + default: + case WAIT_MODE: + /* Wait is the default mode used when idle. */ + reg = __raw_readl(MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_LPM_MASK; + __raw_writel(reg, MXC_CCM_CCMR); + break; + } + + if (enable_flag) { + /* Enable timer interrupt */ + enable_irq(MXC_INT_GPT); + } + local_irq_enable(); +} + +#ifdef CONFIG_MXC_DVFS +/*! + * Changes MCU frequencies using dvfs. + * + * @param armfreq desired ARM frequency in Hz + * @param ahbfreq desired AHB frequency in Hz + * @param ipfreq desired IP frequency in Hz + * + * @return Returns 0 on success, non-zero on error + */ +int mxc_pm_dvfs(unsigned long armfreq, long ahbfreq, long ipfreq) +{ + int ret_value; + int i; + + if (ahbfreq != 133000000) { + return FREQ_OUT_OF_RANGE; + } + if (ipfreq != 66500000) { + return FREQ_OUT_OF_RANGE; + } + ret_value = FREQ_OUT_OF_RANGE; + for (i = 0; i < dvfs_states_tbl->num_of_states; i++) { + if (dvfs_states_tbl->freqs[i] == armfreq) { + ret_value = dvfs_set_state(i); + break; + } + } + + return ret_value; +} +#endif /* CONFIG_MXC_DVFS */ + +/*! + * This function is used to load the module. + * + * @return Returns an Integer on success + */ +static int __init mxc_pm_init_module(void) +{ + printk(KERN_INFO "Low-Level PM Driver module loaded\n"); + + mcu_pll_clk = clk_get(NULL, "mcu_pll"); + cpu_clk = clk_get(NULL, "cpu_clk"); + ahb_clk = clk_get(NULL, "ahb_clk"); + ipg_clk = clk_get(NULL, "ipg_clk"); + return 0; +} + +/*! + * This function is used to unload the module + */ +static void __exit mxc_pm_cleanup_module(void) +{ + clk_put(mcu_pll_clk); + clk_put(cpu_clk); + clk_put(ahb_clk); + clk_put(ipg_clk); + printk(KERN_INFO "Low-Level PM Driver module Unloaded\n"); +} + +module_init(mxc_pm_init_module); +module_exit(mxc_pm_cleanup_module); + +EXPORT_SYMBOL(mxc_pm_intscale); +EXPORT_SYMBOL(mxc_pm_pllscale); +EXPORT_SYMBOL(mxc_pm_lowpower); +#ifdef CONFIG_MXC_DVFS +EXPORT_SYMBOL(mxc_pm_dvfs); +#endif + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("MX3 Low-level Power Management Driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/usb_h2.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/usb_h2.c @@ -0,0 +1,70 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static struct fsl_usb2_platform_data usbh2_config = { + .name = "Host 2", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_ULPI, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbh2_active, + .gpio_usb_inactive = gpio_usbh2_inactive, + .transceiver = "isp1504", +}; + +static struct resource usbh2_resources[] = { + [0] = { + .start = (u32) (USB_H2REGS_BASE), + .end = (u32) (USB_H2REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB2, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init usbh2_init(void) +{ + pr_debug("%s: \n", __func__); + + if (machine_is_mx31_3ds()) { + struct regulator *usbh2_regux; + usbh2_config.xcvr_pwr = + kmalloc(sizeof(struct fsl_xcvr_power), GFP_KERNEL); + if (!(usbh2_config.xcvr_pwr)) + return -ENOMEM; + + usbh2_regux = regulator_get(NULL, "GPO1"); + usbh2_config.xcvr_pwr->regu1 = usbh2_regux; + usbh2_regux = regulator_get(NULL, "GPO3"); + usbh2_config.xcvr_pwr->regu2 = usbh2_regux; + } + + host_pdev_register(usbh2_resources, ARRAY_SIZE(usbh2_resources), + &usbh2_config); + return 0; +} +module_init(usbh2_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/crm_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/crm_regs.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2008 by Sascha Hauer * * This program is free software; you can redistribute it and/or @@ -24,7 +24,7 @@ #define CKIH_CLK_FREQ_27MHZ 27000000 #define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define MXC_CCM_BASE ((char *)IO_ADDRESS(CCM_BASE_ADDR)) /* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) @@ -55,6 +55,7 @@ #define MXC_CCM_PDR2 (MXC_CCM_BASE + 0x64) /* Register bit definitions */ +#define MXC_CCM_CCMR_VSTBY (1 << 28) #define MXC_CCM_CCMR_WBEN (1 << 27) #define MXC_CCM_CCMR_CSCS (1 << 25) #define MXC_CCM_CCMR_PERCS (1 << 24) @@ -66,6 +67,7 @@ #define MXC_CCM_CCMR_LPM_MASK (0x3 << 14) #define MXC_CCM_CCMR_FIRS_OFFSET 11 #define MXC_CCM_CCMR_FIRS_MASK (0x3 << 11) +#define MXC_CCM_CCMR_WAMO (1 << 10) #define MXC_CCM_CCMR_UPE (1 << 9) #define MXC_CCM_CCMR_SPE (1 << 8) #define MXC_CCM_CCMR_MDS (1 << 7) @@ -91,6 +93,47 @@ #define MXC_CCM_PDR0_MCU_PODF_OFFSET 0 #define MXC_CCM_PDR0_MCU_PODF_MASK 0x7 +#define MXC_CCM_PDR0_HSP_DIV_1 (0x0 << 11) +#define MXC_CCM_PDR0_HSP_DIV_2 (0x1 << 11) +#define MXC_CCM_PDR0_HSP_DIV_3 (0x2 << 11) +#define MXC_CCM_PDR0_HSP_DIV_4 (0x3 << 11) +#define MXC_CCM_PDR0_HSP_DIV_5 (0x4 << 11) +#define MXC_CCM_PDR0_HSP_DIV_6 (0x5 << 11) +#define MXC_CCM_PDR0_HSP_DIV_7 (0x6 << 11) +#define MXC_CCM_PDR0_HSP_DIV_8 (0x7 << 11) + +#define MXC_CCM_PDR0_IPG_DIV_1 (0x0 << 6) +#define MXC_CCM_PDR0_IPG_DIV_2 (0x1 << 6) +#define MXC_CCM_PDR0_IPG_DIV_3 (0x2 << 6) +#define MXC_CCM_PDR0_IPG_DIV_4 (0x3 << 6) + +#define MXC_CCM_PDR0_MAX_DIV_1 (0x0 << 3) +#define MXC_CCM_PDR0_MAX_DIV_2 (0x1 << 3) +#define MXC_CCM_PDR0_MAX_DIV_3 (0x2 << 3) +#define MXC_CCM_PDR0_MAX_DIV_4 (0x3 << 3) +#define MXC_CCM_PDR0_MAX_DIV_5 (0x4 << 3) +#define MXC_CCM_PDR0_MAX_DIV_6 (0x5 << 3) +#define MXC_CCM_PDR0_MAX_DIV_7 (0x6 << 3) +#define MXC_CCM_PDR0_MAX_DIV_8 (0x7 << 3) + +#define MXC_CCM_PDR0_NFC_DIV_1 (0x0 << 8) +#define MXC_CCM_PDR0_NFC_DIV_2 (0x1 << 8) +#define MXC_CCM_PDR0_NFC_DIV_3 (0x2 << 8) +#define MXC_CCM_PDR0_NFC_DIV_4 (0x3 << 8) +#define MXC_CCM_PDR0_NFC_DIV_5 (0x4 << 8) +#define MXC_CCM_PDR0_NFC_DIV_6 (0x5 << 8) +#define MXC_CCM_PDR0_NFC_DIV_7 (0x6 << 8) +#define MXC_CCM_PDR0_NFC_DIV_8 (0x7 << 8) + +#define MXC_CCM_PDR0_MCU_DIV_1 0x0 +#define MXC_CCM_PDR0_MCU_DIV_2 0x1 +#define MXC_CCM_PDR0_MCU_DIV_3 0x2 +#define MXC_CCM_PDR0_MCU_DIV_4 0x3 +#define MXC_CCM_PDR0_MCU_DIV_5 0x4 +#define MXC_CCM_PDR0_MCU_DIV_6 0x5 +#define MXC_CCM_PDR0_MCU_DIV_7 0x6 +#define MXC_CCM_PDR0_MCU_DIV_8 0x7 + #define MXC_CCM_PDR1_USB_PRDF_OFFSET 30 #define MXC_CCM_PDR1_USB_PRDF_MASK (0x3 << 30) #define MXC_CCM_PDR1_USB_PODF_OFFSET 27 @@ -109,7 +152,120 @@ #define MXC_CCM_PDR1_SSI1_PODF_MASK 0x3F /* Bit definitions for RCSR */ -#define MXC_CCM_RCSR_NF16B 0x80000000 +#define MXC_CCM_RCSR_NF16B (0x1 << 31) +#define MXC_CCM_RCSR_NFMS (0x1 << 30) + +/* Bit definitions for both MCU, USB and SR PLL control registers */ +#define MXC_CCM_PCTL_BRM 0x80000000 +#define MXC_CCM_PCTL_PD_OFFSET 26 +#define MXC_CCM_PCTL_PD_MASK (0xF << 26) +#define MXC_CCM_PCTL_MFD_OFFSET 16 +#define MXC_CCM_PCTL_MFD_MASK (0x3FF << 16) +#define MXC_CCM_PCTL_MFI_OFFSET 10 +#define MXC_CCM_PCTL_MFI_MASK (0xF << 10) +#define MXC_CCM_PCTL_MFN_OFFSET 0 +#define MXC_CCM_PCTL_MFN_MASK 0x3FF + +#define MXC_CCM_CGR0_SD_MMC1_OFFSET 0 +#define MXC_CCM_CGR0_SD_MMC1_MASK (0x3 << 0) +#define MXC_CCM_CGR0_SD_MMC2_OFFSET 2 +#define MXC_CCM_CGR0_SD_MMC2_MASK (0x3 << 2) +#define MXC_CCM_CGR0_GPT_OFFSET 4 +#define MXC_CCM_CGR0_GPT_MASK (0x3 << 4) +#define MXC_CCM_CGR0_EPIT1_OFFSET 6 +#define MXC_CCM_CGR0_EPIT1_MASK (0x3 << 6) +#define MXC_CCM_CGR0_EPIT2_OFFSET 8 +#define MXC_CCM_CGR0_EPIT2_MASK (0x3 << 8) +#define MXC_CCM_CGR0_IIM_OFFSET 10 +#define MXC_CCM_CGR0_IIM_MASK (0x3 << 10) +#define MXC_CCM_CGR0_ATA_OFFSET 12 +#define MXC_CCM_CGR0_ATA_MASK (0x3 << 12) +#define MXC_CCM_CGR0_SDMA_OFFSET 14 +#define MXC_CCM_CGR0_SDMA_MASK (0x3 << 14) +#define MXC_CCM_CGR0_CSPI3_OFFSET 16 +#define MXC_CCM_CGR0_CSPI3_MASK (0x3 << 16) +#define MXC_CCM_CGR0_RNG_OFFSET 18 +#define MXC_CCM_CGR0_RNG_MASK (0x3 << 18) +#define MXC_CCM_CGR0_UART1_OFFSET 20 +#define MXC_CCM_CGR0_UART1_MASK (0x3 << 20) +#define MXC_CCM_CGR0_UART2_OFFSET 22 +#define MXC_CCM_CGR0_UART2_MASK (0x3 << 22) +#define MXC_CCM_CGR0_SSI1_OFFSET 24 +#define MXC_CCM_CGR0_SSI1_MASK (0x3 << 24) +#define MXC_CCM_CGR0_I2C1_OFFSET 26 +#define MXC_CCM_CGR0_I2C1_MASK (0x3 << 26) +#define MXC_CCM_CGR0_I2C2_OFFSET 28 +#define MXC_CCM_CGR0_I2C2_MASK (0x3 << 28) +#define MXC_CCM_CGR0_I2C3_OFFSET 30 +#define MXC_CCM_CGR0_I2C3_MASK (0x3 << 30) + +#define MXC_CCM_CGR1_HANTRO_OFFSET 0 +#define MXC_CCM_CGR1_HANTRO_MASK (0x3 << 0) +#define MXC_CCM_CGR1_MEMSTICK1_OFFSET 2 +#define MXC_CCM_CGR1_MEMSTICK1_MASK (0x3 << 2) +#define MXC_CCM_CGR1_MEMSTICK2_OFFSET 4 +#define MXC_CCM_CGR1_MEMSTICK2_MASK (0x3 << 4) +#define MXC_CCM_CGR1_CSI_OFFSET 6 +#define MXC_CCM_CGR1_CSI_MASK (0x3 << 6) +#define MXC_CCM_CGR1_RTC_OFFSET 8 +#define MXC_CCM_CGR1_RTC_MASK (0x3 << 8) +#define MXC_CCM_CGR1_WDOG_OFFSET 10 +#define MXC_CCM_CGR1_WDOG_MASK (0x3 << 10) +#define MXC_CCM_CGR1_PWM_OFFSET 12 +#define MXC_CCM_CGR1_PWM_MASK (0x3 << 12) +#define MXC_CCM_CGR1_SIM_OFFSET 14 +#define MXC_CCM_CGR1_SIM_MASK (0x3 << 14) +#define MXC_CCM_CGR1_ECT_OFFSET 16 +#define MXC_CCM_CGR1_ECT_MASK (0x3 << 16) +#define MXC_CCM_CGR1_USBOTG_OFFSET 18 +#define MXC_CCM_CGR1_USBOTG_MASK (0x3 << 18) +#define MXC_CCM_CGR1_KPP_OFFSET 20 +#define MXC_CCM_CGR1_KPP_MASK (0x3 << 20) +#define MXC_CCM_CGR1_IPU_OFFSET 22 +#define MXC_CCM_CGR1_IPU_MASK (0x3 << 22) +#define MXC_CCM_CGR1_UART3_OFFSET 24 +#define MXC_CCM_CGR1_UART3_MASK (0x3 << 24) +#define MXC_CCM_CGR1_UART4_OFFSET 26 +#define MXC_CCM_CGR1_UART4_MASK (0x3 << 26) +#define MXC_CCM_CGR1_UART5_OFFSET 28 +#define MXC_CCM_CGR1_UART5_MASK (0x3 << 28) +#define MXC_CCM_CGR1_OWIRE_OFFSET 30 +#define MXC_CCM_CGR1_OWIRE_MASK (0x3 << 30) + +#define MXC_CCM_CGR2_SSI2_OFFSET 0 +#define MXC_CCM_CGR2_SSI2_MASK (0x3 << 0) +#define MXC_CCM_CGR2_CSPI1_OFFSET 2 +#define MXC_CCM_CGR2_CSPI1_MASK (0x3 << 2) +#define MXC_CCM_CGR2_CSPI2_OFFSET 4 +#define MXC_CCM_CGR2_CSPI2_MASK (0x3 << 4) +#define MXC_CCM_CGR2_GACC_OFFSET 6 +#define MXC_CCM_CGR2_GACC_MASK (0x3 << 6) +#define MXC_CCM_CGR2_EMI_OFFSET 8 +#define MXC_CCM_CGR2_EMI_MASK (0x3 << 8) +#define MXC_CCM_CGR2_RTIC_OFFSET 10 +#define MXC_CCM_CGR2_RTIC_MASK (0x3 << 10) +#define MXC_CCM_CGR2_FIRI_OFFSET 12 +#define MXC_CCM_CGR2_FIRI_MASK (0x3 << 12) +#define MXC_CCM_CGR2_IPMUX1_OFFSET 14 +#define MXC_CCM_CGR2_IPMUX1_MASK (0x3 << 14) +#define MXC_CCM_CGR2_IPMUX2_OFFSET 16 +#define MXC_CCM_CGR2_IPMUX2_MASK (0x3 << 16) + +/* These new CGR2 bits are added in MX32 */ +#define MXC_CCM_CGR2_APMSYSCLKSEL_OFFSET 18 +#define MXC_CCM_CGR2_APMSYSCLKSEL_MASK (0x3 << 18) +#define MXC_CCM_CGR2_APMSSICLKSEL_OFFSET 20 +#define MXC_CCM_CGR2_APMSSICLKSEL_MASK (0x3 << 20) +#define MXC_CCM_CGR2_APMPERCLKSEL_OFFSET 22 +#define MXC_CCM_CGR2_APMPERCLKSEL_MASK (0x3 << 22) +#define MXC_CCM_CGR2_MXCCLKENSEL_OFFSET 24 +#define MXC_CCM_CGR2_MXCCLKENSEL_MASK (0x1 << 24) +#define MXC_CCM_CGR2_CHIKCAMPEN_OFFSET 25 +#define MXC_CCM_CGR2_CHIKCAMPEN_MASK (0x1 << 25) +#define MXC_CCM_CGR2_OVRVPUBUSY_OFFSET 26 +#define MXC_CCM_CGR2_OVRVPUBUSY_MASK (0x1 << 26) +#define MXC_CCM_CGR2_APMENA_OFFSET 30 +#define MXC_CCM_CGR2_AOMENA_MASK (0x1 << 30) /* * LTR0 register offsets --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/iomux.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/iomux.h @@ -0,0 +1,186 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MACH_MX31_IOMUX_H__ +#define __MACH_MX31_IOMUX_H__ + +#include +#include +#include "mx31_pins.h" + +typedef unsigned int iomux_pin_name_t; +/*! + * @file mach-mx3/iomux.h + * + * @brief I/O Muxing control definitions and functions + * + * @ingroup GPIO_MX31 + */ + +/*! + * various IOMUX output functions + */ +typedef enum iomux_output_config { + OUTPUTCONFIG_GPIO = 0, /*!< used as GPIO */ + OUTPUTCONFIG_FUNC, /*!< used as function */ + OUTPUTCONFIG_ALT1, /*!< used as alternate function 1 */ + OUTPUTCONFIG_ALT2, /*!< used as alternate function 2 */ + OUTPUTCONFIG_ALT3, /*!< used as alternate function 3 */ + OUTPUTCONFIG_ALT4, /*!< used as alternate function 4 */ + OUTPUTCONFIG_ALT5, /*!< used as alternate function 5 */ + OUTPUTCONFIG_ALT6 /*!< used as alternate function 6 */ +} iomux_pin_ocfg_t; + +/*! + * various IOMUX input functions + */ +typedef enum iomux_input_config { + INPUTCONFIG_NONE = 0, /*!< not configured for input */ + INPUTCONFIG_GPIO = 1 << 0, /*!< used as GPIO */ + INPUTCONFIG_FUNC = 1 << 1, /*!< used as function */ + INPUTCONFIG_ALT1 = 1 << 2, /*!< used as alternate function 1 */ + INPUTCONFIG_ALT2 = 1 << 3 /*!< used as alternate function 2 */ +} iomux_pin_icfg_t; + +/*! + * various IOMUX pad functions + */ +typedef enum iomux_pad_config { + PAD_CTL_NOLOOPBACK = 0x0 << 9, + PAD_CTL_LOOPBACK = 0x1 << 9, + PAD_CTL_PKE_NONE = 0x0 << 8, + PAD_CTL_PKE_ENABLE = 0x1 << 8, + PAD_CTL_PUE_KEEPER = 0x0 << 7, + PAD_CTL_PUE_PUD = 0x1 << 7, + PAD_CTL_100K_PD = 0x0 << 5, + PAD_CTL_100K_PU = 0x1 << 5, + PAD_CTL_47K_PU = 0x2 << 5, + PAD_CTL_22K_PU = 0x3 << 5, + PAD_CTL_HYS_CMOS = 0x0 << 4, + PAD_CTL_HYS_SCHMITZ = 0x1 << 4, + PAD_CTL_ODE_CMOS = 0x0 << 3, + PAD_CTL_ODE_OpenDrain = 0x1 << 3, + PAD_CTL_DRV_NORMAL = 0x0 << 1, + PAD_CTL_DRV_HIGH = 0x1 << 1, + PAD_CTL_DRV_MAX = 0x2 << 1, + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0 +} iomux_pad_config_t; + +/*! + * various IOMUX general purpose functions + */ +typedef enum iomux_gp_func { + MUX_PGP_FIRI = 0x1 << 0, + MUX_DDR_MODE = 0x1 << 1, + MUX_PGP_CSPI_BB = 0x1 << 2, + MUX_PGP_ATA_1 = 0x1 << 3, + MUX_PGP_ATA_2 = 0x1 << 4, + MUX_PGP_ATA_3 = 0x1 << 5, + MUX_PGP_ATA_4 = 0x1 << 6, + MUX_PGP_ATA_5 = 0x1 << 7, + MUX_PGP_ATA_6 = 0x1 << 8, + MUX_PGP_ATA_7 = 0x1 << 9, + MUX_PGP_ATA_8 = 0x1 << 10, + MUX_PGP_UH2 = 0x1 << 11, + MUX_SDCTL_CSD0_SEL = 0x1 << 12, + MUX_SDCTL_CSD1_SEL = 0x1 << 13, + MUX_CSPI1_UART3 = 0x1 << 14, + MUX_EXTDMAREQ2_MBX_SEL = 0x1 << 15, + MUX_TAMPER_DETECT_EN = 0x1 << 16, + MUX_PGP_USB_4WIRE = 0x1 << 17, + MUX_PGB_USB_COMMON = 0x1 << 18, + MUX_SDHC_MEMSTICK1 = 0x1 << 19, + MUX_SDHC_MEMSTICK2 = 0x1 << 20, + MUX_PGP_SPLL_BYP = 0x1 << 21, + MUX_PGP_UPLL_BYP = 0x1 << 22, + MUX_PGP_MSHC1_CLK_SEL = 0x1 << 23, + MUX_PGP_MSHC2_CLK_SEL = 0x1 << 24, + MUX_CSPI3_UART5_SEL = 0x1 << 25, + MUX_PGP_ATA_9 = 0x1 << 26, + MUX_PGP_USB_SUSPEND = 0x1 << 27, + MUX_PGP_USB_OTG_LOOPBACK = 0x1 << 28, + MUX_PGP_USB_HS1_LOOPBACK = 0x1 << 29, + MUX_PGP_USB_HS2_LOOPBACK = 0x1 << 30, + MUX_CLKO_DDR_MODE = 0x1 << 31, +} iomux_gp_func_t; + +/*! + * This function is used to configure a pin through the IOMUX module. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + * @return 0 if successful; Non-zero otherwise + */ +int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pins + * @param config ORed value of elements defined in \b #iomux_pad_config_t + */ +void iomux_config_pad(iomux_pin_name_t pin, __u32 config); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void iomux_config_gpr(iomux_gp_func_t gp, bool en); + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param out an output function as defined in \b #iomux_pin_ocfg_t + * @param in an input function as defined in \b #iomux_pin_icfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_ocfg_t out, + iomux_pin_icfg_t in); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); + +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/serial.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/serial.h @@ -0,0 +1,175 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX3_SERIAL_H__ +#define __ARCH_ARM_MACH_MX3_SERIAL_H__ + +/*! + * @file mach-mx3/serial.h + * + * @ingroup MSL_MX31 + */ +#include + +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +#define MXC_UART_NR 5 +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive Irda data. + */ +#define MXC_UART_IR_RXDMUX 0x0004 +/*! + * This option is used to set or clear the RXDMUXSEL bit in control reg 3. + * Certain platforms need this bit to be set in order to receive UART data. + */ +#define MXC_UART_RXDMUX 0x0004 + +/* UART 1 configuration */ +/*! + * This option allows to choose either an interrupt-driven software controlled + * hardware flow control (set this option to 0) or hardware-driven hardware + * flow control (set this option to 1). + */ +/* UART used as wakeup source */ +#define UART1_HW_FLOW 0 +/*! + * This specifies the threshold at which the CTS pin is deasserted by the + * RXFIFO. Set this value in Decimal to anything from 0 to 32 for + * hardware-driven hardware flow control. Read the HW spec while specifying + * this value. When using interrupt-driven software controlled hardware + * flow control set this option to -1. + */ +#define UART1_UCR4_CTSTL 16 +/*! + * This is option to enable (set this option to 1) or disable DMA data transfer + */ +#define UART1_DMA_ENABLE 0 +/*! + * Specify the size of the DMA receive buffer. The minimum buffer size is 512 + * bytes. The buffer size should be a multiple of 256. + */ +#define UART1_DMA_RXBUFSIZE 1024 +/*! + * Specify the MXC UART's Receive Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the RxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_RXTL 16 +/*! + * Specify the MXC UART's Transmit Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the TxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_TXTL 16 +/* UART 2 configuration */ +#define UART2_HW_FLOW 0 +#define UART2_UCR4_CTSTL -1 +#define UART2_DMA_ENABLE 0 +#define UART2_DMA_RXBUFSIZE 512 +#define UART2_UFCR_RXTL 16 +#define UART2_UFCR_TXTL 16 +/* UART 3 configuration */ +#define UART3_HW_FLOW 1 +#define UART3_UCR4_CTSTL 16 +#define UART3_DMA_ENABLE 1 +#define UART3_DMA_RXBUFSIZE 1024 +#define UART3_UFCR_RXTL 16 +#define UART3_UFCR_TXTL 16 +/* UART 4 configuration */ +#define UART4_HW_FLOW 1 +#define UART4_UCR4_CTSTL 16 +#define UART4_DMA_ENABLE 0 +#define UART4_DMA_RXBUFSIZE 512 +#define UART4_UFCR_RXTL 16 +#define UART4_UFCR_TXTL 16 +/* UART 5 configuration */ +#define UART5_HW_FLOW 1 +#define UART5_UCR4_CTSTL 16 +#define UART5_DMA_ENABLE 0 +#define UART5_DMA_RXBUFSIZE 512 +#define UART5_UFCR_RXTL 16 +#define UART5_UFCR_TXTL 16 +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +/* + * Is the MUXED interrupt output sent to the ARM core + */ +#define INTS_NOTMUXED 0 +#define INTS_MUXED 1 +/* UART 1 configuration */ +/*! + * This define specifies whether the muxed ANDed interrupt line or the + * individual interrupts from the UART port is integrated with the ARM core. + * There exists a define like this for each UART port. Valid values that can + * be used are \b INTS_NOTMUXED or \b INTS_MUXED. + */ +#define UART1_MUX_INTS INTS_MUXED +/*! + * This define specifies the transmitter interrupt number or the interrupt + * number of the ANDed interrupt in case the interrupts are muxed. There exists + * a define like this for each UART port. + */ +#define UART1_INT1 MXC_INT_UART1 +/*! + * This define specifies the receiver interrupt number. If the interrupts of + * the UART are muxed, then we specify here a dummy value -1. There exists a + * define like this for each UART port. + */ +#define UART1_INT2 -1 +/*! + * This specifies the master interrupt number. If the interrupts of the UART + * are muxed, then we specify here a dummy value of -1. There exists a define + * like this for each UART port. + */ +#define UART1_INT3 -1 +/*! + * This specifies if the UART is a shared peripheral. It holds the shared + * peripheral number if it is shared or -1 if it is not shared. There exists + * a define like this for each UART port. + */ +#define UART1_SHARED_PERI -1 +/* UART 2 configuration */ +#define UART2_MUX_INTS INTS_MUXED +#define UART2_INT1 MXC_INT_UART2 +#define UART2_INT2 -1 +#define UART2_INT3 -1 +#define UART2_SHARED_PERI -1 +/* UART 3 configuration */ +#define UART3_MUX_INTS INTS_MUXED +#define UART3_INT1 MXC_INT_UART3 +#define UART3_INT2 -1 +#define UART3_INT3 -1 +#define UART3_SHARED_PERI SPBA_UART3 +/* UART 4 configuration */ +#define UART4_MUX_INTS INTS_MUXED +#define UART4_INT1 MXC_INT_UART4 +#define UART4_INT2 -1 +#define UART4_INT3 -1 +#define UART4_SHARED_PERI -1 +/* UART 5 configuration */ +#define UART5_MUX_INTS INTS_MUXED +#define UART5_INT1 MXC_INT_UART5 +#define UART5_INT2 -1 +#define UART5_INT3 -1 +#define UART5_SHARED_PERI -1 + +#endif /* __ARCH_ARM_MACH_MX3_SERIAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/board-mx31ads.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/board-mx31ads.h @@ -0,0 +1,329 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__ +#define __ASM_ARCH_MXC_BOARD_MX31ADS_H__ + +#ifdef CONFIG_MACH_MX31ADS +/*! + * @defgroup BRDCFG_MX31 Board Configuration Options + * @ingroup MSL_MX31 + */ + +/*! + * @file mach-mx3/board-mx31ads.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX31 ADS Platform. + * + * @ingroup BRDCFG_MX31 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART EVB board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR IRDA +#ifdef CONFIG_MXC_FIR_MODULE +#define UART2_ENABLED 0 +#else +#define UART2_ENABLED 1 +#endif +/* UART 3 configuration */ +#define UART3_MODE MODE_DTE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 +/* UART 4 configuration */ +#define UART4_MODE MODE_DTE +#define UART4_IR NO_IRDA +#define UART4_ENABLED 0 /* Disable UART 4 as its pins are shared with ATA */ +/* UART 5 configuration */ +#define UART5_MODE MODE_DTE +#define UART5_IR NO_IRDA +#define UART5_ENABLED 1 + +#define MXC_LL_EXTUART_PADDR (CS4_BASE_ADDR + 0x10000) +#define MXC_LL_EXTUART_VADDR CS4_IO_ADDRESS(MXC_LL_EXTUART_PADDR) +#undef MXC_LL_EXTUART_16BIT_BUS + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +/*! + * @name PBC Controller parameters + */ +/*! @{ */ +/*! + * Base address of PBC controller + */ +#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) +/* Offsets for the PBC Controller register */ +/*! + * PBC Board status register offset + */ +#define PBC_BSTAT 0x000002 +/*! + * PBC Board control register 1 set address. + */ +#define PBC_BCTRL1_SET 0x000004 +/*! + * PBC Board control register 1 clear address. + */ +#define PBC_BCTRL1_CLEAR 0x000006 +/*! + * PBC Board control register 2 set address. + */ +#define PBC_BCTRL2_SET 0x000008 +/*! + * PBC Board control register 2 clear address. + */ +#define PBC_BCTRL2_CLEAR 0x00000A +/*! + * PBC Board control register 3 set address. + */ +#define PBC_BCTRL3_SET 0x00000C +/*! + * PBC Board control register 3 clear address. + */ +#define PBC_BCTRL3_CLEAR 0x00000E +/*! + * PBC Board control register 4 set address. + */ +#define PBC_BCTRL4_SET 0x000010 +/*! + * PBC Board control register 4 clear address. + */ +#define PBC_BCTRL4_CLEAR 0x000012 +/*! + * PBC Board status register 1. + */ +#define PBC_BSTAT1 0x000014 +/*! + * PBC Board interrupt status register. + */ +#define PBC_INTSTATUS 0x000016 +/*! + * PBC Board interrupt current status register. + */ +#define PBC_INTCURR_STATUS 0x000018 +/*! + * PBC Interrupt mask register set address. + */ +#define PBC_INTMASK_SET 0x00001A +/*! + * PBC Interrupt mask register clear address. + */ +#define PBC_INTMASK_CLEAR 0x00001C + +/*! + * External UART A. + */ +#define PBC_SC16C652_UARTA 0x010000 +/*! + * External UART B. + */ +#define PBC_SC16C652_UARTB 0x010010 +/*! + * Ethernet Controller IO base address. + */ +#define PBC_CS8900A_IOBASE 0x020000 +/*! + * Ethernet Controller Memory base address. + */ +#define PBC_CS8900A_MEMBASE 0x021000 +/*! + * Ethernet Controller DMA base address. + */ +#define PBC_CS8900A_DMABASE 0x022000 +/*! + * External chip select 0. + */ +#define PBC_XCS0 0x040000 +/*! + * LCD Display enable. + */ +#define PBC_LCD_EN_B 0x060000 +/*! + * Code test debug enable. + */ +#define PBC_CODE_B 0x070000 +/*! + * PSRAM memory select. + */ +#define PBC_PSRAM_B 0x5000000 + +/* PBC Board Status Register 1 bit definitions */ +#define PBC_BSTAT1_NF_DET 0x0001 /* NAND flash card. 0 = connected */ +#define PBC_BSTAT1_KP_ON 0x0002 /* KPP board. 0 = connected */ +#define PBC_BSTAT1_LS 0x0004 /* KPP:LightSense signal */ +#define PBC_BSTAT1_ATA_IOCS16 0x0008 /* ATA_IOCS16 signal */ +#define PBC_BSTAT1_ATA_CBLID 0x0010 /* ATA_CBLID signal */ +#define PBC_BSTAT1_ATA_DASP 0x0020 /* ATA_DASP signal */ +#define PBC_BSTAT1_PWR_RDY 0x0040 /* MC13783 power. 1 = ready */ +#define PBC_BSTAT1_SD1_WP 0x0080 /* 0 = SD1 card is write protected */ +#define PBC_BSTAT1_SD2_WP 0x0100 /* 0 = SD2 card is write protected */ +#define PBC_BSTAT1_FS1 0x0200 /* KPP:FlipSense1 signal */ +#define PBC_BSTAT1_FS2 0x0400 /* KPP:FlipSense2 signal */ +#define PBC_BSTAT1_PTT 0x0800 /* KPP:PTT signal */ +#define PBC_BSTAT1_MC13783_IN 0x1000 /* MC13783 board. 0 = connected. */ + +/* PBC Board Control Register 1 bit definitions */ +#define PBC_BCTRL1_ERST 0x0001 /* Ethernet Reset */ +#define PBC_BCTRL1_URST 0x0002 /* Reset External UART controller */ +#define PBC_BCTRL1_UENA 0x0004 /* Enable UART A transceiver */ +#define PBC_BCTRL1_UENB 0x0008 /* Enable UART B transceiver */ +#define PBC_BCTRL1_UENCE 0x0010 /* Enable UART CE transceiver */ +#define PBC_BCTRL1_IREN 0x0020 /* Enable the IRDA transmitter */ +#define PBC_BCTRL1_LED0 0x0040 /* Used to control LED 0 (green) */ +#define PBC_BCTRL1_LED1 0x0080 /* Used to control LED 1 (yellow) */ +#define PBC_BCTRL1_SENSOR1_ON 0x0600 /* Enable Sensor 1 */ +#define PBC_BCTRL1_SENSOR2_ON 0x3000 /* Enable Sensor 2 */ +#define PBC_BCTRL1_BEND 0x4000 /* Big Endian Select */ +#define PBC_BCTRL1_LCDON 0x8000 /* Enable the LCD */ + +/* PBC Board Control Register 2 bit definitions */ +#define PBC_BCTRL2_USELA 0x0001 /* UART A Select, 0 = UART1, 1 = UART5 */ +#define PBC_BCTRL2_USELB 0x0002 /* UART B Select, 0 = UART3, 1 = UART5 */ +#define PBC_BCTRL2_USELC 0x0004 /* UART C Select, 0 = UART2, 1 = UART1 */ +#define PBC_BCTRL2_UMODENA 0x0008 /* UART A Modem Signals Enable, 0 = enabled */ +#define PBC_BCTRL2_UMODENC 0x0008 /* UART C Modem Signals Enable, 0 = enabled */ +#define PBC_BCTRL2_CSI_EN 0x0020 /* Enable the CSI interface, 0 = enabled */ +#define PBC_BCTRL2_ATA_EN 0x0040 /* Enable the ATA interface, 0 = enabled */ +#define PBC_BCTRL2_ATA_SEL 0x0080 /* ATA Select, 0 = group A, 1 = group B */ +#define PBC_BCTRL2_IRDA_MOD 0x0100 /* IRDA Mode (see CPLD spec) */ +#define PBC_BCTRL2_LDC_RST0 0x0200 /* LCD 0 Reset, 1 = reset signal asserted */ +#define PBC_BCTRL2_LDC_RST1 0x0400 /* LCD 1 Reset, 1 = reset signal asserted */ +#define PBC_BCTRL2_LDC_RST2 0x0800 /* LCD 2 Reset, 1 = reset signal asserted */ +#define PBC_BCTRL2_LDCIO_EN 0x1000 /* LCD GPIO Enable, 0 = enabled */ +#define PBC_BCTRL2_CT_CS 0x2000 /* Code Test Chip Select, = Code Test selected */ +#define PBC_BCTRL2_VPP_EN 0x4000 /* PCMCIA VPP Enable, 1 = power on */ +#define PBC_BCTRL2_VCC_EN 0x8000 /* PCMCIA VCC Enable, 1 = power on */ + +/* PBC Board Control Register 3 bit definitions */ +#define PBC_BCTRL3_OTG_FS_SEL 0x0001 /* USB OTG Full Speed Select, 0 = PMIC, 1 = CPU */ +#define PBC_BCTRL3_OTG_FS_EN 0x0002 /* USB OTG Full Speed Enable, 0 = enabled */ +#define PBC_BCTRL3_FSH_SEL 0x0004 /* USB Full Speed Host Select, 0 = Group A, 1 = Group B */ +#define PBC_BCTRL3_FSH_EN 0x0008 /* USB Full Speed Host Enable, 0 = enabled */ +#define PBC_BCTRL3_HSH_SEL 0x0010 /* USB High Speed Host Select, 0 = Group A, 1 = Group B */ +#define PBC_BCTRL3_HSH_EN 0x0020 /* USB High Speed Host Enable, 0 = enabled */ +#define PBC_BCTRL3_FSH_MOD 0x0040 /* USB Full Speed Host Mode, 0 = Differential, 1 = Single ended */ +#define PBC_BCTRL3_OTG_HS_EN 0x0080 /* USB OTG High Speed Enable, 0 = enabled */ +#define PBC_BCTRL3_OTG_VBUS_EN 0x0100 /* USB OTG VBUS Regulator Enable, 0 = enabled */ +#define PBC_BCTRL3_FSH_VBUS_EN 0x0200 /* USB Full Speed Host VBUS Regulator Enable, 0 = enabled */ +#define PBC_BCTRL3_CARD1_SEL 0x0400 /* Card1 Select, 0 = SD1, 1 = MS1 */ +#define PBC_BCTRL3_CARD2_SEL 0x0800 /* Card2 Select, 0 = PCMCIA & SD2, 1 = MS2 */ +#define PBC_BCTRL3_SYNTH_RST 0x1000 /* Audio Synthesizer Reset, 0 = reset asserted */ +#define PBC_BCTRL3_VSIM_EN 0x2000 /* VSIM Regulator Enable, 1 = enabled */ +#define PBC_BCTRL3_VESIM_EN 0x4000 /* VESIM Regulator Enable, 1 = enabled */ +#define PBC_BCTRL3_SPI3_RESET 0x8000 /* CSPI3 Connector Reset, 0 = reset asserted */ + +/* PBC Board Control Register 4 bit definitions */ +#define PBC_BCTRL4_CSI_MSB_EN 0x0001 /* CSI MSB Enable, 0 = CSI_Data[3:0] enabled */ +#define PBC_BCTRL4_REGEN_SEL 0x0002 /* Regulator Enable Select, 0 = enabled */ +#define PBC_BCTRL4_USER_OFF 0x0004 /* User Off Indication, 1 = user off confirmation */ +#define PBC_BCTRL4_VIB_EN 0x0008 /* Vibrator Enable, 1 = enabled */ +#define PBC_BCTRL4_PCMCIA_EN 0x0010 /* PCMCIA Enable, 0 = buffer enabled */ + +#define CKIH_27MHZ_BIT_SET (1 << 4) + +#define PBC_INT_CS8900A 4 +/*! @} */ + +#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS) +#define PBC_INTCURR_STATUS_REG (PBC_INTCURR_STATUS + PBC_BASE_ADDRESS) +#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS) +#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) +#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) + +#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) +#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) +#define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1) +#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2) +#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3) +#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4) +#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5) +#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6) +#define EXPIO_INT_RES7 (MXC_EXP_IO_BASE + 7) +#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8) +#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9) +#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10) +#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11) +#define EXPIO_INT_SYNTH_IRQ (MXC_EXP_IO_BASE + 12) +#define EXPIO_INT_CE_INT1 (MXC_EXP_IO_BASE + 13) +#define EXPIO_INT_CE_INT2 (MXC_EXP_IO_BASE + 14) +#define EXPIO_INT_RES15 (MXC_EXP_IO_BASE + 15) + +#define MXC_MAX_EXP_IO_LINES 16 + +/*! + * @name Defines Base address and IRQ used for CS8900A Ethernet Controller on MXC Boards + */ +/*! @{*/ +/*! This is System IRQ used by CS8900A for interrupt generation taken from platform.h */ +#define CS8900AIRQ EXPIO_INT_ENET_INT +/*! This is I/O Base address used to access registers of CS8900A on MXC ADS */ +#define CS8900A_BASE_ADDRESS (PBC_BASE_ADDRESS + PBC_CS8900A_IOBASE + 0x300) +/*! @} */ + +#define MXC_PMIC_INT_LINE IOMUX_TO_IRQ(MX31_PIN_GPIO1_3) + +#define AHB_FREQ 133000000 +#define IPG_FREQ 66500000 + +#define MXC_BD_LED1 (1 << 6) +#define MXC_BD_LED2 (1 << 7) +#define MXC_BD_LED_ON(led) \ + __raw_writew(led, PBC_BASE_ADDRESS + PBC_BCTRL1_SET) +#define MXC_BD_LED_OFF(led) \ + __raw_writew(led, PBC_BASE_ADDRESS + PBC_BCTRL1_CLEAR) + +#endif /* CONFIG_MACH_MX31ADS */ +#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx3/serial.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx3/serial.c @@ -0,0 +1,267 @@ +/* + * Copyright 2006-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file mach-mx3/serial.c + * + * @brief This file contains the UART initiliazation. + * + * @ingroup MSL_MX31 + */ +#include +#include +#include +#include +#include +#include +#include "serial.h" +#include "board-mx31ads.h" +#include "board-mx3_3stack.h" + +#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) + +/*! + * This is an array where each element holds information about a UART port, + * like base address of the UART, interrupt numbers etc. This structure is + * passed to the serial_core.c file. Based on which UART is used, the core file + * passes back the appropriate port structure as an argument to the control + * functions. + */ +static uart_mxc_port mxc_ports[MXC_UART_NR] = { + [0] = { + .port = { + .membase = (void *)IO_ADDRESS(UART1_BASE_ADDR), + .mapbase = UART1_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART1_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .ints_muxed = UART1_MUX_INTS, + .irqs = {UART1_INT2, UART1_INT3}, + .mode = UART1_MODE, + .ir_mode = UART1_IR, + .enabled = UART1_ENABLED, + .hardware_flow = UART1_HW_FLOW, + .cts_threshold = UART1_UCR4_CTSTL, + .dma_enabled = UART1_DMA_ENABLE, + .dma_rxbuf_size = UART1_DMA_RXBUFSIZE, + .rx_threshold = UART1_UFCR_RXTL, + .tx_threshold = UART1_UFCR_TXTL, + .shared = UART1_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART1_TX, + .dma_rx_id = MXC_DMA_UART1_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, + [1] = { + .port = { + .membase = (void *)IO_ADDRESS(UART2_BASE_ADDR), + .mapbase = UART2_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART2_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 1, + }, + .ints_muxed = UART2_MUX_INTS, + .irqs = {UART2_INT2, UART2_INT3}, + .mode = UART2_MODE, + .ir_mode = UART2_IR, + .enabled = UART2_ENABLED, + .hardware_flow = UART2_HW_FLOW, + .cts_threshold = UART2_UCR4_CTSTL, + .dma_enabled = UART2_DMA_ENABLE, + .dma_rxbuf_size = UART2_DMA_RXBUFSIZE, + .rx_threshold = UART2_UFCR_RXTL, + .tx_threshold = UART2_UFCR_TXTL, + .shared = UART2_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART2_TX, + .dma_rx_id = MXC_DMA_UART2_RX, + .rxd_mux = MXC_UART_IR_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#if UART3_ENABLED == 1 + [2] = { + .port = { + .membase = (void *)IO_ADDRESS(UART3_BASE_ADDR), + .mapbase = UART3_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART3_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 2, + }, + .ints_muxed = UART3_MUX_INTS, + .irqs = {UART3_INT2, UART3_INT3}, + .mode = UART3_MODE, + .ir_mode = UART3_IR, + .enabled = UART3_ENABLED, + .hardware_flow = UART3_HW_FLOW, + .cts_threshold = UART3_UCR4_CTSTL, + .dma_enabled = UART3_DMA_ENABLE, + .dma_rxbuf_size = UART3_DMA_RXBUFSIZE, + .rx_threshold = UART3_UFCR_RXTL, + .tx_threshold = UART3_UFCR_TXTL, + .shared = UART3_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART3_TX, + .dma_rx_id = MXC_DMA_UART3_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#endif +#if UART4_ENABLED == 1 + [3] = { + .port = { + .membase = (void *)IO_ADDRESS(UART4_BASE_ADDR), + .mapbase = UART4_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART4_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 3, + }, + .ints_muxed = UART4_MUX_INTS, + .irqs = {UART4_INT2, UART4_INT3}, + .mode = UART4_MODE, + .ir_mode = UART4_IR, + .enabled = UART4_ENABLED, + .hardware_flow = UART4_HW_FLOW, + .cts_threshold = UART4_UCR4_CTSTL, + .dma_enabled = UART4_DMA_ENABLE, + .dma_rxbuf_size = UART4_DMA_RXBUFSIZE, + .rx_threshold = UART4_UFCR_RXTL, + .tx_threshold = UART4_UFCR_TXTL, + .shared = UART4_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART4_TX, + .dma_rx_id = MXC_DMA_UART4_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#endif +#if UART5_ENABLED == 1 + [4] = { + .port = { + .membase = (void *)IO_ADDRESS(UART5_BASE_ADDR), + .mapbase = UART5_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART5_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 4, + }, + .ints_muxed = UART5_MUX_INTS, + .irqs = {UART5_INT2, UART5_INT3}, + .mode = UART5_MODE, + .ir_mode = UART5_IR, + .enabled = UART5_ENABLED, + .hardware_flow = UART5_HW_FLOW, + .cts_threshold = UART5_UCR4_CTSTL, + .dma_enabled = UART5_DMA_ENABLE, + .dma_rxbuf_size = UART5_DMA_RXBUFSIZE, + .rx_threshold = UART5_UFCR_RXTL, + .tx_threshold = UART5_UFCR_TXTL, + .shared = UART5_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART5_TX, + .dma_rx_id = MXC_DMA_UART5_RX, + .rxd_mux = MXC_UART_RXDMUX, + .ir_tx_inv = MXC_IRDA_TX_INV, + .ir_rx_inv = MXC_IRDA_RX_INV, + }, +#endif +}; + +static struct platform_device mxc_uart_device1 = { + .name = "mxcintuart", + .id = 0, + .dev = { + .platform_data = &mxc_ports[0], + }, +}; + +static struct platform_device mxc_uart_device2 = { + .name = "mxcintuart", + .id = 1, + .dev = { + .platform_data = &mxc_ports[1], + }, +}; + +#if UART3_ENABLED == 1 +static struct platform_device mxc_uart_device3 = { + .name = "mxcintuart", + .id = 2, + .dev = { + .platform_data = &mxc_ports[2], + }, +}; +#endif + +#if UART4_ENABLED == 1 +static struct platform_device mxc_uart_device4 = { + .name = "mxcintuart", + .id = 3, + .dev = { + .platform_data = &mxc_ports[3], + }, +}; +#endif + +#if UART5_ENABLED == 1 +static struct platform_device mxc_uart_device5 = { + .name = "mxcintuart", + .id = 4, + .dev = { + .platform_data = &mxc_ports[4], + }, +}; +#endif + +static int __init mxc_init_uart(void) +{ + /* Register all the MXC UART platform device structures */ + platform_device_register(&mxc_uart_device1); + platform_device_register(&mxc_uart_device2); + + /* Grab ownership of shared UARTs 3 and 4, only when enabled */ +#if UART3_ENABLED == 1 +#if UART3_DMA_ENABLE == 1 + spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART3_DMA_ENABLE */ + platform_device_register(&mxc_uart_device3); +#endif /* UART3_ENABLED */ + +#if UART4_ENABLED == 1 + platform_device_register(&mxc_uart_device4); +#endif /* UART4_ENABLED */ + +#if UART5_ENABLED == 1 + platform_device_register(&mxc_uart_device5); +#endif /* UART5_ENABLED */ + return 0; +} + +#else +static int __init mxc_init_uart(void) +{ + return 0; +} +#endif + +arch_initcall(mxc_init_uart); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/usb_h1.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/usb_h1.c @@ -0,0 +1,142 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" +#include "iomux.h" + + +/* + * USB Host1 HS port + */ +static int gpio_usbh1_active(void) +{ + /* Set USBH1_STP to GPIO and toggle it */ + mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_GPIO | + IOMUX_CONFIG_SION); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), "usbh1_stp"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1); + + /* Signal only used on MX51-3DS for reset to PHY.*/ + if (machine_is_mx51_3ds()) { + mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX51_PIN_EIM_D17, PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_KEEPER | + PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), "eim_d17"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), 1); + } + + msleep(100); + + return 0; +} + +void gpio_usbh1_setback_stp(void) +{ + /* setback USBH1_STP to be function */ + mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_SRE_FAST | + PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW); + gpio_free(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP)); +} +EXPORT_SYMBOL(gpio_usbh1_setback_stp); + +static void gpio_usbh1_inactive(void) +{ + /* Signal only used on MX51-3DS for reset to PHY.*/ + if (machine_is_mx51_3ds()) { + gpio_free(IOMUX_TO_GPIO(MX51_PIN_EIM_D17)); + mxc_free_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_GPIO); + } + + mxc_free_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_GPIO); + gpio_free(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP)); +} + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable) +{ + if (enable) + USBCTRL |= UCTRL_H1WIE; + else + USBCTRL &= ~UCTRL_H1WIE; +} + +static void usbotg_clock_gate(bool on) +{ + struct clk *usboh3_clk = clk_get(NULL, "usboh3_clk"); + struct clk *usb_ahb_clk = clk_get(NULL, "usb_ahb_clk"); + + if (on) { + clk_enable(usb_ahb_clk); + clk_enable(usboh3_clk); + } else { + clk_disable(usboh3_clk); + clk_disable(usb_ahb_clk); + } + + clk_put(usboh3_clk); + clk_put(usb_ahb_clk); +} + +static struct fsl_usb2_platform_data usbh1_config = { + .name = "Host 1", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_ULPI, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbh1_active, + .gpio_usb_inactive = gpio_usbh1_inactive, + .wake_up_enable = _wake_up_enable, + .usb_clock_for_pm = usbotg_clock_gate, + .transceiver = "isp1504", +}; + +static struct resource usbh1_resources[] = { + [0] = { + .start = (u32) (USB_H1REGS_BASE), + .end = (u32) (USB_H1REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_H1, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init usbh1_init(void) +{ + pr_debug("%s: \n", __func__); + + host_pdev_register(usbh1_resources, + ARRAY_SIZE(usbh1_resources), &usbh1_config); + + return 0; +} + +module_init(usbh1_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/devices.c @@ -0,0 +1,1354 @@ +/* + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sdma_script_code.h" +#include "iomux.h" +#include "crm_regs.h" + +/* Flag used to indicate when IRAM has been initialized */ +int iram_ready; +/* Flag used to indicate if dvfs_core is active. */ +int dvfs_core_is_active; + +void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_addr) +{ + /* AP<->BP */ + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_ap_2_ap_fixed_addr = -1; + + /*misc */ + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + + /* firi */ + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = -1; + + /* uart */ + sdma_script_addr->mxc_sdma_uart_2_per_addr = uart_2_per_ADDR; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR; + + /* UART SH */ + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = uartsh_2_per_ADDR; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = uartsh_2_mcu_ADDR; + + /* SHP */ + sdma_script_addr->mxc_sdma_per_2_shp_addr = per_2_shp_ADDR; + sdma_script_addr->mxc_sdma_shp_2_per_addr = shp_2_per_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR; + + /* ATA */ + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR; + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR; + + /* app */ + sdma_script_addr->mxc_sdma_app_2_per_addr = app_2_per_ADDR; + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_per_2_app_addr = per_2_app_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR; + + /* MSHC */ + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = -1; + + /* spdif */ + sdma_script_addr->mxc_sdma_spdif_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_spdif_addr = mcu_2_spdif_ADDR; + + /* IPU */ + sdma_script_addr->mxc_sdma_ext_mem_2_ipu_addr = ext_mem__ipu_ram_ADDR; + + /* DVFS */ + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = -1; + + /* core */ + sdma_script_addr->mxc_sdma_start_addr = (unsigned short *)sdma_code; + sdma_script_addr->mxc_sdma_ram_code_start_addr = RAM_CODE_START_ADDR; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_W1_MASTER_MXC) || defined(CONFIG_W1_MASTER_MXC_MODULE) +static struct resource w1_resources[] = { + { + .start = MXC_INT_OWIRE, + .flags = IORESOURCE_IRQ, + } +}; + +static struct mxc_w1_config mxc_w1_data = { + .search_rom_accelerator = 1, +}; + +static struct platform_device mxc_w1_devices = { + .name = "mxc_w1", + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_w1_data, + }, + .num_resources = ARRAY_SIZE(w1_resources), + .resource = w1_resources, + .id = 0 +}; + +static void mxc_init_owire(void) +{ + (void)platform_device_register(&mxc_w1_devices); +} +#else +static inline void mxc_init_owire(void) +{ +} +#endif + +#if defined(CONFIG_RTC_DRV_MXC_V2) || defined(CONFIG_RTC_DRV_MXC_V2_MODULE) +static struct mxc_srtc_platform_data srtc_data = { + .srtc_sec_mode_addr = 0x83F98840, +}; + +static struct resource rtc_resources[] = { + { + .start = SRTC_BASE_ADDR, + .end = SRTC_BASE_ADDR + 0x40, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_SRTC_NTZ, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device mxc_rtc_device = { + .name = "mxc_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &srtc_data, + }, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; +static void mxc_init_rtc(void) +{ + (void)platform_device_register(&mxc_rtc_device); +} +#else +static inline void mxc_init_rtc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_WATCHDOG) || defined(CONFIG_MXC_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { + { + .start = WDOG1_BASE_ADDR, + .end = WDOG1_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_wdt_device = { + .name = "mxc_wdt", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void mxc_init_wdt(void) +{ + (void)platform_device_register(&mxc_wdt_device); +} +#else +static inline void mxc_init_wdt(void) +{ +} +#endif + +#if defined(CONFIG_MXC_PWM) +static struct resource pwm_resources[] = { + { + .start = PWM1_BASE_ADDR, + .end = PWM1_BASE_ADDR + 0x14, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_pwm_device = { + .name = "mxc_pwm", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(pwm_resources), + .resource = pwm_resources, +}; + +static void mxc_init_pwm(void) +{ + printk(KERN_INFO "mxc_pwm_device registered\n"); + if (platform_device_register(&mxc_pwm_device) < 0) + printk(KERN_ERR "registration of mxc_pwm device failed\n"); +} +#else +static void mxc_init_pwm(void) +{ + +} +#endif + +#if defined(CONFIG_BACKLIGHT_PWM) +static struct platform_pwm_backlight_data mxc_pwm_backlight_data = { + .pwm_id = 0, + .max_brightness = 255, + .dft_brightness = 128, + .pwm_period_ns = 78770, +}; + +static struct platform_device mxc_pwm_backlight_device = { + .name = "pwm-backlight", + .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_pwm_backlight_data, + }, +}; + +static void mxc_init_pwm_backlight(void) +{ + printk(KERN_INFO "pwm-backlight device registered\n"); + if (platform_device_register(&mxc_pwm_backlight_device) < 0) + printk(KERN_ERR + "registration of pwm-backlight device failed\n"); +} +#else +static void mxc_init_pwm_backlight(void) +{ + +} +#endif + +#if defined(CONFIG_MXC_IPU_V3) || defined(CONFIG_MXC_IPU_V3_MODULE) +static struct mxc_ipu_config mxc_ipu_data = { + .rev = 1, +}; + +static struct resource ipu_resources[] = { + { + .start = IPU_CTRL_BASE_ADDR, + .end = IPU_CTRL_BASE_ADDR + SZ_512M, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_IPU_SYN, + .flags = IORESOURCE_IRQ, + }, + { + .start = MXC_INT_IPU_ERR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxc_ipu_device = { + .name = "mxc_ipu", + .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ipu_data, + }, + .num_resources = ARRAY_SIZE(ipu_resources), + .resource = ipu_resources, +}; + +static void mxc_init_ipu(void) +{ + void __iomem *reg_hsc_mcd = IO_ADDRESS(MIPI_HSC_BASE_ADDR); + void __iomem *reg_hsc_mxt_conf = IO_ADDRESS(MIPI_HSC_BASE_ADDR + 0x800); + struct clk *clk; + uint32_t temp; + + /* Select IPUv3 h/w version */ + if (cpu_is_mx51_rev(CHIP_REV_2_0) > 0) + mxc_ipu_data.rev = 2; + + mxc_ipu_data.di_clk[0] = clk_get(NULL, "ipu_di0_clk"); + mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di1_clk"); + /* Temporarily setup MIPI module to legacy mode */ + clk = clk_get(NULL, "mipi_hsp_clk"); + if (!IS_ERR(clk)) { + clk_enable(clk); + + /* Temporarily setup MIPI module to legacy mode */ + __raw_writel(0xF00, reg_hsc_mcd); + + /* CSI mode reserved*/ + temp = __raw_readl(reg_hsc_mxt_conf); + __raw_writel(temp | 0x0FF, reg_hsc_mxt_conf); + + if (cpu_is_mx51_rev(CHIP_REV_2_0) > 0) { + temp = __raw_readl(reg_hsc_mxt_conf); + __raw_writel(temp | 0x10000, reg_hsc_mxt_conf); + } + + clk_disable(clk); + clk_put(clk); + } + platform_device_register(&mxc_ipu_device); +} +#else +static inline void mxc_init_ipu(void) +{ +} +#endif + +#if defined(CONFIG_MXC_VPU) || defined(CONFIG_MXC_VPU_MODULE) +static struct resource vpu_resources[] = { + [0] = { + .start = VPU_IRAM_BASE_ADDR, + .end = VPU_IRAM_BASE_ADDR + VPU_IRAM_SIZE, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IO_ADDRESS(SRC_BASE_ADDR), + .end = IO_ADDRESS(SRC_BASE_ADDR), + .flags = IORESOURCE_MEM, + }, +}; + +/*! Platform Data for MXC VPU */ +static struct platform_device mxcvpu_device = { + .name = "mxc_vpu", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(vpu_resources), + .resource = vpu_resources, +}; + +static inline void mxc_init_vpu(void) +{ + if (platform_device_register(&mxcvpu_device) < 0) + printk(KERN_ERR "Error: Registering the VPU.\n"); +} +#else +static inline void mxc_init_vpu(void) +{ +} +#endif + +/*! + * This is platform device structure for adding SCC + */ +#if defined(CONFIG_MXC_SECURITY_SCC) || defined(CONFIG_MXC_SECURITY_SCC_MODULE) +static struct platform_device mxc_scc_device = { + .name = "mxc_scc", + .id = 0, +}; +static void mxc_init_scc(void) +{ + platform_device_register(&mxc_scc_device); +} +#else +#define SCM_RD_DELAY 1000000 /* in nanoseconds */ +#define SEC_TO_NANOSEC 1000000000 /*Second to nanoseconds */ +static inline void mxc_init_scc(void) +{ + uint32_t reg_value; + uint32_t reg_mask = 0; + uint8_t *UMID_base; + uint32_t *MAP_base; + uint8_t i; + uint32_t partition_no; + uint32_t scc_partno; + void *scm_ram_base; + void *scc_base; + uint8_t iram_partitions = 16; + struct timespec stime; + struct timespec curtime; + long scm_rd_timeout = 0; + long cur_ns = 0; + long start_ns = 0; + + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) + iram_partitions = 12; + + scc_base = ioremap((uint32_t) SCC_BASE_ADDR, 0x140); + if (scc_base == NULL) { + printk(KERN_ERR "FAILED TO MAP IRAM REGS\n"); + return; + } + scm_ram_base = ioremap((uint32_t) IRAM_BASE_ADDR, IRAM_SIZE); + if (scm_ram_base == NULL) { + printk(KERN_ERR "FAILED TO MAP IRAM\n"); + return; + } + + /* Wait for any running SCC operations to finish or fail */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - stime.tv_nsec; + else{ + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + && ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_FAIL)); + + /* Check for failures */ + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) { + /* Special message for bad secret key fuses */ + if (reg_value & SCM_STATUS_KST_BAD_KEY) + printk(KERN_ERR "INVALID SCC KEY FUSE PATTERN\n"); + else + printk(KERN_ERR "SECURE RAM FAILURE\n"); + + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + + scm_rd_timeout = 0; + /* Release final two partitions for SCC2 driver */ + scc_partno = iram_partitions - (SCC_IRAM_SIZE / SZ_8K); + for (partition_no = scc_partno; partition_no < iram_partitions; + partition_no++) { + reg_value = (((partition_no << SCM_ZCMD_PART_SHIFT) & + SCM_ZCMD_PART_MASK) | ((0x03 << SCM_ZCMD_CCMD_SHIFT) & + SCM_ZCMD_CCMD_MASK)); + __raw_writel(reg_value, scc_base + SCM_ZCMD_REG); + udelay(1); + /* Wait for zeroization to complete */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - + stime.tv_nsec; + else { + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_READY) && ((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_FAIL) && (scm_rd_timeout <= SCM_RD_DELAY)); + + if (scm_rd_timeout > SCM_RD_DELAY) + printk(KERN_ERR "SCM Status Register Read timeout" + "for Partition No:%d", partition_no); + + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + break; + } + + /*Check all expected partitions released */ + reg_value = __raw_readl(scc_base + SCM_PART_OWNERS_REG); + if ((reg_value & reg_mask) != 0) { + printk(KERN_ERR "FAILED TO RELEASE IRAM PARTITION\n"); + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + reg_mask = 0; + scm_rd_timeout = 0; + /* Allocate remaining partitions for general use */ + for (partition_no = 0; partition_no < scc_partno; partition_no++) { + /* Supervisor mode claims a partition for it's own use + by writing zero to SMID register.*/ + __raw_writel(0, scc_base + (SCM_SMID0_REG + 8 * partition_no)); + + /* Wait for any zeroization to complete */ + getnstimeofday(&stime); + do { + reg_value = __raw_readl(scc_base + SCM_STATUS_REG); + getnstimeofday(&curtime); + if (curtime.tv_nsec > stime.tv_nsec) + scm_rd_timeout = curtime.tv_nsec - + stime.tv_nsec; + else{ + /*Converted second to nanosecond and add to + nsec when current nanosec is less than + start time nanosec.*/ + cur_ns = (curtime.tv_sec * SEC_TO_NANOSEC) + + curtime.tv_nsec; + start_ns = (stime.tv_sec * SEC_TO_NANOSEC) + + stime.tv_nsec; + scm_rd_timeout = cur_ns - start_ns; + } + } while (((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_READY) && ((reg_value & SCM_STATUS_SRS_MASK) != + SCM_STATUS_SRS_FAIL) && (scm_rd_timeout <= SCM_RD_DELAY)); + + if (scm_rd_timeout > SCM_RD_DELAY) + printk(KERN_ERR "SCM Status Register Read timeout" + "for Partition No:%d", partition_no); + + if ((reg_value & SCM_STATUS_SRS_MASK) != SCM_STATUS_SRS_READY) + break; + /* Set UMID=0 and permissions for universal data + read/write access */ + MAP_base = scm_ram_base + (partition_no * 0x2000); + UMID_base = (uint8_t *) MAP_base + 0x10; + for (i = 0; i < 16; i++) + UMID_base[i] = 0; + + MAP_base[0] = (SCM_PERM_NO_ZEROIZE | SCM_PERM_HD_SUP_DISABLE | + SCM_PERM_HD_READ | SCM_PERM_HD_WRITE | + SCM_PERM_HD_EXECUTE | SCM_PERM_TH_READ | + SCM_PERM_TH_WRITE); + reg_mask |= (3 << (2 * (partition_no))); + } + + /* Check all expected partitions allocated */ + reg_value = __raw_readl(scc_base + SCM_PART_OWNERS_REG); + if ((reg_value & reg_mask) != reg_mask) { + printk(KERN_ERR "FAILED TO ACQUIRE IRAM PARTITION\n"); + iounmap(scm_ram_base); + iounmap(scc_base); + return; + } + + iounmap(scm_ram_base); + iounmap(scc_base); + printk(KERN_INFO "IRAM READY\n"); + iram_ready = 1; +} +#endif + +/* SPI controller and device data */ +#if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) + +#ifdef CONFIG_SPI_MXC_SELECT1 +/*! + * Resource definition for the CSPI1 + */ +static struct resource mxcspi1_resources[] = { + [0] = { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +extern void mx51_babbage_gpio_spi_chipselect_active(int cspi_mode, int status, + int chipselect); +extern void mx51_babbage_gpio_spi_chipselect_inactive(int cspi_mode, int status, + int chipselect); +/*! Platform Data for MXC CSPI1 */ +static struct mxc_spi_master mxcspi1_data = { + .maxchipselect = 4, + .spi_version = 23, +}; + +/*! Device Definition for MXC CSPI1 */ +static struct platform_device mxcspi1_device = { + .name = "mxc_spi", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi1_data, + }, + .num_resources = ARRAY_SIZE(mxcspi1_resources), + .resource = mxcspi1_resources, +}; + +#endif /* CONFIG_SPI_MXC_SELECT1 */ + +#ifdef CONFIG_SPI_MXC_SELECT2 +/*! + * Resource definition for the CSPI2 + */ +static struct resource mxcspi2_resources[] = { + [0] = { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI2 */ +static struct mxc_spi_master mxcspi2_data = { + .maxchipselect = 4, + .spi_version = 23, +}; + +/*! Device Definition for MXC CSPI2 */ +static struct platform_device mxcspi2_device = { + .name = "mxc_spi", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi2_data, + }, + .num_resources = ARRAY_SIZE(mxcspi2_resources), + .resource = mxcspi2_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT2 */ + +#ifdef CONFIG_SPI_MXC_SELECT3 +/*! + * Resource definition for the CSPI3 + */ +static struct resource mxcspi3_resources[] = { + [0] = { + .start = CSPI3_BASE_ADDR, + .end = CSPI3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI, + .end = MXC_INT_CSPI, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI3 */ +static struct mxc_spi_master mxcspi3_data = { + .maxchipselect = 4, + .spi_version = 7, +}; + +/*! Device Definition for MXC CSPI3 */ +static struct platform_device mxcspi3_device = { + .name = "mxc_spi", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi3_data, + }, + .num_resources = ARRAY_SIZE(mxcspi3_resources), + .resource = mxcspi3_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT3 */ + +void __init mxc_init_spi(void) +{ + /* SPBA configuration for CSPI2 - MCU is set */ + spba_take_ownership(SPBA_CSPI1, SPBA_MASTER_A); +#ifdef CONFIG_SPI_MXC_SELECT1 + if (machine_is_mx51_babbage()) { + mxcspi1_data.chipselect_active = + mx51_babbage_gpio_spi_chipselect_active; + mxcspi1_data.chipselect_inactive = + mx51_babbage_gpio_spi_chipselect_inactive; + } + if (platform_device_register(&mxcspi1_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_1\n"); +#endif /* CONFIG_SPI_MXC_SELECT1 */ +#ifdef CONFIG_SPI_MXC_SELECT2 + if (platform_device_register(&mxcspi2_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_2\n"); +#endif /* CONFIG_SPI_MXC_SELECT2 */ +#ifdef CONFIG_SPI_MXC_SELECT3 + if (platform_device_register(&mxcspi3_device) < 0) + printk(KERN_ERR "Error: Registering the SPI Controller_3\n"); +#endif /* CONFIG_SPI_MXC_SELECT3 */ +} +#else +void __init mxc_init_spi(void) +{ +} +#endif + +/* I2C controller and device data */ +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +/*! + * Resource definition for the I2C1 + */ +static struct resource mxci2c1_resources[] = { + [0] = { + .start = I2C1_BASE_ADDR, + .end = I2C1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C1, + .end = MXC_INT_I2C1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c1_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT2 +/*! + * Resource definition for the I2C2 + */ +static struct resource mxci2c2_resources[] = { + [0] = { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c2_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT3 +/*! + * Resource definition for the I2C3 + */ +static struct resource mxci2c3_resources[] = { + [0] = { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c3_data = { + .i2c_clk = 100000, +}; +#endif + +/*! Device Definition for MXC I2C1 */ +static struct platform_device mxci2c_devices[] = { +#ifdef CONFIG_I2C_MXC_SELECT1 + { + .name = "mxc_i2c", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c1_data, + }, + .num_resources = ARRAY_SIZE(mxci2c1_resources), + .resource = mxci2c1_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 + { + .name = "mxc_i2c", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c2_data, + }, + .num_resources = ARRAY_SIZE(mxci2c2_resources), + .resource = mxci2c2_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT3 + { + .name = "mxc_i2c", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c3_data, + }, + .num_resources = ARRAY_SIZE(mxci2c3_resources), + .resource = mxci2c3_resources,}, +#endif +}; + +static inline void mxc_init_i2c(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxci2c_devices); i++) { + if (platform_device_register(&mxci2c_devices[i]) < 0) + dev_err(&mxci2c_devices[i].dev, + "Unable to register I2C device\n"); + } +} +#else +static inline void mxc_init_i2c(void) +{ +} +#endif + +#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE) +static struct resource mxci2c_hs_resources[] = { + [0] = { + .start = HSI2C_DMA_BASE_ADDR, + .end = HSI2C_DMA_BASE_ADDR + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_HS_I2C, + .end = MXC_INT_HS_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c_hs_data = { + .i2c_clk = 400000, +}; + +static struct platform_device mxci2c_hs_device = { + .name = "mxc_i2c_hs", + .id = 3, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c_hs_data, + }, + .num_resources = ARRAY_SIZE(mxci2c_hs_resources), + .resource = mxci2c_hs_resources +}; + +static inline void mxc_init_i2c_hs(void) +{ + if (platform_device_register(&mxci2c_hs_device) < 0) + dev_err(&mxci2c_hs_device.dev, + "Unable to register High Speed I2C device\n"); +} +#else +static inline void mxc_init_i2c_hs(void) +{ +} +#endif + +#if defined(CONFIG_FB_MXC_TVOUT_TVE) || defined(CONFIG_FB_MXC_TVOUT_TVE_MODULE) +static struct resource tve_resources[] = { + { + .start = TVE_BASE_ADDR, + .end = TVE_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_TVE, + .flags = IORESOURCE_IRQ, + }, +}; +static struct tve_platform_data tve_data = { + .dac_reg = "VVIDEO", + .dig_reg = "VDIG", +}; + +static struct platform_device mxc_tve_device = { + .name = "tve", + .dev = { + .platform_data = &tve_data, + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(tve_resources), + .resource = tve_resources, +}; + +void __init mxc_init_tve(void) +{ + platform_device_register(&mxc_tve_device); +} +#else +static inline void mxc_init_tve(void) +{ +} +#endif + +/*! + * Resource definition for the DVFS CORE + */ +static struct resource dvfs_core_resources[] = { + [0] = { + .start = MXC_DVFS_CORE_BASE, + .end = MXC_DVFS_CORE_BASE + 4 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for DVFS CORE */ +struct mxc_dvfs_platform_data dvfs_core_data = { + .reg_id = "SW1", + .clk1_id = "cpu_clk", + .clk2_id = "gpc_dvfs_clk", + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .gpc_vcr_reg_addr = MXC_GPC_VCR, + .ccm_cdcr_reg_addr = MXC_CCM_CDCR, + .ccm_cacrr_reg_addr = MXC_CCM_CACRR, + .ccm_cdhipr_reg_addr = MXC_CCM_CDHIPR, + .dvfs_thrs_reg_addr = MXC_DVFSTHRS, + .dvfs_coun_reg_addr = MXC_DVFSCOUN, + .dvfs_emac_reg_addr = MXC_DVFSEMAC, + .dvfs_cntr_reg_addr = MXC_DVFSCNTR, + .prediv_mask = 0x1F800, + .prediv_offset = 11, + .prediv_val = 3, + .div3ck_mask = 0xE0000000, + .div3ck_offset = 29, + .div3ck_val = 2, + .emac_val = 0x08, + .upthr_val = 25, + .dnthr_val = 9, + .pncthr_val = 33, + .upcnt_val = 10, + .dncnt_val = 10, + .delay_time = 30, + .num_wp = 3, +}; + +/*! Device Definition for MXC DVFS core */ +static struct platform_device mxc_dvfs_core_device = { + .name = "mxc_dvfs_core", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dvfs_core_data, + }, + .num_resources = ARRAY_SIZE(dvfs_core_resources), + .resource = dvfs_core_resources, +}; + +static inline void mxc_init_dvfs_core(void) +{ + if (platform_device_register(&mxc_dvfs_core_device) < 0) + dev_err(&mxc_dvfs_core_device.dev, + "Unable to register DVFS core device\n"); +} + +/*! + * Resource definition for the DVFS PER + */ +static struct resource dvfs_per_resources[] = { + [0] = { + .start = DVFSPER_BASE_ADDR, + .end = DVFSPER_BASE_ADDR + 2 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC DVFS PER*/ +struct mxc_dvfsper_data dvfs_per_data = { + .reg_id = "SW2", + .clk_id = "gpc_dvfs_clk", + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .gpc_vcr_reg_addr = MXC_GPC_VCR, + .gpc_adu = 0x0, + .vai_mask = MXC_DVFSPMCR0_FSVAI_MASK, + .vai_offset = MXC_DVFSPMCR0_FSVAI_OFFSET, + .dvfs_enable_bit = MXC_DVFSPMCR0_DVFEN, + .irq_mask = MXC_DVFSPMCR0_FSVAIM, + .div3_offset = 0, + .div3_mask = 0x7, + .div3_div = 2, + .lp_high = 1200000, + .lp_low = 1200000, +}; + +/*! Device Definition for MXC DVFS Peripheral*/ +static struct platform_device mxc_dvfs_per_device = { + .name = "mxc_dvfsper", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dvfs_per_data, + }, + .num_resources = ARRAY_SIZE(dvfs_per_resources), + .resource = dvfs_per_resources, +}; + +static inline void mxc_init_dvfs_per(void) +{ + if (platform_device_register(&mxc_dvfs_per_device) < 0) { + dev_err(&mxc_dvfs_per_device.dev, + "Unable to register DVFS device\n"); + } else { + printk(KERN_INFO "mxc_init_dvfs_per initialised\n"); + } + return; +} + +struct mxc_gpio_port mxc_gpio_ports[] = { + [0] = { + .chip.label = "gpio-0", + .base = IO_ADDRESS(GPIO1_BASE_ADDR), + .irq = MXC_INT_GPIO1_LOW, + .irq_high = MXC_INT_GPIO1_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + }, + [1] = { + .chip.label = "gpio-1", + .base = IO_ADDRESS(GPIO2_BASE_ADDR), + .irq = MXC_INT_GPIO2_LOW, + .irq_high = MXC_INT_GPIO2_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 + }, + [2] = { + .chip.label = "gpio-2", + .base = IO_ADDRESS(GPIO3_BASE_ADDR), + .irq = MXC_INT_GPIO3_LOW, + .irq_high = MXC_INT_GPIO3_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 + }, + [3] = { + .chip.label = "gpio-3", + .base = IO_ADDRESS(GPIO4_BASE_ADDR), + .irq = MXC_INT_GPIO4_LOW, + .irq_high = MXC_INT_GPIO4_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 + } +}; + +int __init mxc_register_gpios(void) +{ + return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); +} + +static struct platform_device mxc_dma_device = { + .name = "mxc_dma", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_dma(void) +{ + (void)platform_device_register(&mxc_dma_device); +} + +static struct resource spdif_resources[] = { + { + .start = SPDIF_BASE_ADDR, + .end = SPDIF_BASE_ADDR + 0x50, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_spdif_platform_data mxc_spdif_data = { + .spdif_tx = 1, + .spdif_rx = 0, + .spdif_clk_44100 = 0, /* spdif_ext_clk source for 44.1KHz */ + .spdif_clk_48000 = 7, /* audio osc source */ + .spdif_clkid = 0, + .spdif_clk = NULL, /* spdif bus clk */ +}; + +static struct platform_device mxc_alsa_spdif_device = { + .name = "mxc_alsa_spdif", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_spdif_data, + }, + .num_resources = ARRAY_SIZE(spdif_resources), + .resource = spdif_resources, +}; + +static inline void mxc_init_spdif(void) +{ + mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk"); + clk_put(mxc_spdif_data.spdif_core_clk); + platform_device_register(&mxc_alsa_spdif_device); +} + +static struct platform_device mx51_lpmode_device = { + .name = "mx51_lpmode", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mx51_init_lpmode(void) +{ + (void)platform_device_register(&mx51_lpmode_device); +} + +static struct platform_device busfreq_device = { + .name = "busfreq", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_busfreq(void) +{ + (void)platform_device_register(&busfreq_device); +} + +static struct platform_device sdram_autogating_device = { + .name = "sdram_autogating", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_sdram_autogating(void) +{ + (void)platform_device_register(&sdram_autogating_device); +} + +#if defined(CONFIG_MXC_IIM) || defined(CONFIG_MXC_IIM_MODULE) +static struct resource mxc_iim_resources[] = { + { + .start = IIM_BASE_ADDR, + .end = IIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_iim_device = { + .name = "mxc_iim", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_iim_resources), + .resource = mxc_iim_resources +}; + +static inline void mxc_init_iim(void) +{ + if (platform_device_register(&mxc_iim_device) < 0) + dev_err(&mxc_iim_device.dev, + "Unable to register mxc iim device\n"); +} +#else +static inline void mxc_init_iim(void) +{ +} +#endif + +static struct resource mxc_gpu_resources[] = { + [0] = { + .start = MXC_INT_GPU2_IRQ, + .end = MXC_INT_GPU2_IRQ, + .name = "gpu_2d_irq", + .flags = IORESOURCE_IRQ,}, + [1] = { + .start = MXC_INT_GPU, + .end = MXC_INT_GPU, + .name = "gpu_3d_irq", + .flags = IORESOURCE_IRQ,}, + [2] = { + .start = GPU2D_BASE_ADDR, + .end = GPU2D_BASE_ADDR + SZ_4K - 1, + .name = "gpu_2d_registers", + .flags = IORESOURCE_MEM,}, + [3] = { + .start = GPU_BASE_ADDR, + .end = GPU_BASE_ADDR + SZ_128K - 1, + .name = "gpu_3d_registers", + .flags = IORESOURCE_MEM,}, + [4] = { + .start = GPU_GMEM_BASE_ADDR, + .end = GPU_GMEM_BASE_ADDR + SZ_128K - 1, + .name = "gpu_graphics_mem", + .flags = IORESOURCE_MEM,}, +}; + +static struct platform_device gpu_device = { + .name = "mxc_gpu", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_gpu_resources), + .resource = mxc_gpu_resources, +}; + +static void __init mxc_init_gpu(void) +{ + platform_device_register(&gpu_device); +} + +static struct resource mxc_gpu2d_resources[] = { + { + .start = GPU2D_BASE_ADDR, + .end = GPU2D_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .flags = IORESOURCE_MEM, + }, + { + .flags = IORESOURCE_MEM, + }, +}; + +#if defined(CONFIG_UIO_PDRV_GENIRQ) || defined(CONFIG_UIO_PDRV_GENIRQ_MODULE) +static struct clk *gpu_clk; + +int gpu2d_open(struct uio_info *info, struct inode *inode) +{ + gpu_clk = clk_get(NULL, "gpu2d_clk"); + if (IS_ERR(gpu_clk)) + return PTR_ERR(gpu_clk); + + return clk_enable(gpu_clk); +} + +int gpu2d_release(struct uio_info *info, struct inode *inode) +{ + if (IS_ERR(gpu_clk)) + return PTR_ERR(gpu_clk); + + clk_disable(gpu_clk); + clk_put(gpu_clk); + return 0; +} + +static int gpu2d_mmap(struct uio_info *info, struct vm_area_struct *vma) +{ + int mi = vma->vm_pgoff; + if (mi < 0) + return -EINVAL; + + vma->vm_flags |= VM_IO | VM_RESERVED; + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); + + return remap_pfn_range(vma, + vma->vm_start, + info->mem[mi].addr >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +} + +static struct uio_info gpu2d_info = { + .name = "imx_gpu2d", + .version = "1", + .irq = MXC_INT_GPU2_IRQ, + .open = gpu2d_open, + .release = gpu2d_release, + .mmap = gpu2d_mmap, +}; + +static struct platform_device mxc_gpu2d_device = { + .name = "uio_pdrv_genirq", + .dev = { + .release = mxc_nop_release, + .platform_data = &gpu2d_info, + .coherent_dma_mask = 0xFFFFFFFF, + }, + .num_resources = ARRAY_SIZE(mxc_gpu2d_resources), + .resource = mxc_gpu2d_resources, +}; + +static inline void mxc_init_gpu2d(void) +{ + dma_alloc_coherent(&mxc_gpu2d_device.dev, SZ_8K, &mxc_gpu2d_resources[1].start, GFP_DMA); + mxc_gpu2d_resources[1].end = mxc_gpu2d_resources[1].start + SZ_8K - 1; + + dma_alloc_coherent(&mxc_gpu2d_device.dev, 88 * SZ_1K, &mxc_gpu2d_resources[2].start, GFP_DMA); + mxc_gpu2d_resources[2].end = mxc_gpu2d_resources[2].start + (88 * SZ_1K) - 1; + + platform_device_register(&mxc_gpu2d_device); +} +#else +static inline void mxc_init_gpu2d(void) +{ +} +#endif + +int __init mxc_init_devices(void) +{ + mxc_init_wdt(); + mxc_init_spi(); + mxc_init_i2c(); + mxc_init_i2c_hs(); + mxc_init_rtc(); + mxc_init_scc(); + mxc_init_dma(); + mxc_init_owire(); + mxc_init_ipu(); + mxc_init_vpu(); + mxc_init_spdif(); + mxc_init_tve(); + mx51_init_lpmode(); + mxc_init_busfreq(); + mxc_init_sdram_autogating(); + mxc_init_dvfs_core(); + mxc_init_dvfs_per(); + mxc_init_iim(); + mxc_init_gpu(); + mxc_init_gpu2d(); + mxc_init_pwm(); + mxc_init_pwm_backlight(); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/sdram_autogating.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/sdram_autogating.c @@ -0,0 +1,188 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file sdram_autogating.c + * + * @brief Enable auto clock gating of the EMI_FAST clock using M4IF. + * + * The APIs are for enabling and disabling automatic clock gating of EMI_FAST. + * + * @ingroup PM + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +static struct device *sdram_autogating_dev; +#define M4IF_CNTL_REG0 0x8c +#define M4IF_CNTL_REG1 0x90 + +/* Flag used to indicate if SDRAM M4IF autoclock gating feature is active. */ +static int sdram_autogating_is_active; +static int sdram_autogating_paused; + +void start_sdram_autogating(void); +void stop_sdram_autogating(void); +int sdram_autogating_active(void); + +static void enable(void) +{ + u32 reg; + + /* Set the Fast arbitration Power saving timer */ + reg = __raw_readl((IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG1)); + reg &= ~0xFF; + reg |= 0x09; + __raw_writel(reg, (IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG1)); + /*Allow for automatic gating of the EMI internal clock. + * If this is done, emi_intr CCGR bits should be set to 11. + */ + reg = __raw_readl((IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG0)); + reg &= ~0x5; + __raw_writel(reg, (IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG0)); + + sdram_autogating_is_active = 1; +} + +static void disable(void) +{ + u32 reg; + + reg = __raw_readl((IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG0)); + reg |= 0x4; + __raw_writel(reg, (IO_ADDRESS(M4IF_BASE_ADDR) + M4IF_CNTL_REG0)); + sdram_autogating_is_active = 0; +} + +int sdram_autogating_active() +{ + return sdram_autogating_is_active; +} + +void start_sdram_autogating() +{ + if (sdram_autogating_paused) { + enable(); + sdram_autogating_paused = 0; + } +} + +void stop_sdram_autogating() +{ + if (sdram_autogating_is_active) { + sdram_autogating_paused = 1; + disable(); + } +} + +static ssize_t sdram_autogating_enable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (sdram_autogating_is_active) + return sprintf(buf, + "M4IF autoclock gating for EMI_FAST enabled\n"); + else + return sprintf(buf, + "M4IF autoclock gating for EMI_FAST disabled\n"); +} + +static ssize_t sdram_autogating_enable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + if (strstr(buf, "1") != NULL) + enable(); + else if (strstr(buf, "0") != NULL) { + if (sdram_autogating_is_active) + disable(); + } + return size; +} + +static DEVICE_ATTR(enable, 0644, sdram_autogating_enable_show, + sdram_autogating_enable_store); + +/*! + * This is the probe routine for the auto clockgating of sdram driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit sdram_autogating_probe(struct platform_device *pdev) +{ + int err = 0; + + sdram_autogating_dev = &pdev->dev; + + err = sysfs_create_file(&sdram_autogating_dev->kobj, + &dev_attr_enable.attr); + if (err) { + printk(KERN_ERR + "Unable to register sysdev entry for sdram_autogating"); + return err; + } + + sdram_autogating_is_active = 0; + + return 0; +} + +static struct platform_driver sdram_autogating_driver = { + .driver = { + .name = "sdram_autogating", + }, + .probe = sdram_autogating_probe, +}; + +/*! + * Initialise the sdram_autogating_driver. + * + * @return The function always returns 0. + */ + +static int __init sdram_autogating_init(void) +{ + if (platform_driver_register(&sdram_autogating_driver) != 0) { + printk(KERN_ERR "sdram_autogating_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "sdram autogating driver module loaded\n"); + return 0; +} + +static void __exit sdram_autogating_cleanup(void) +{ + sysfs_remove_file(&sdram_autogating_dev->kobj, &dev_attr_enable.attr); + + /* Unregister the device structure */ + platform_driver_unregister(&sdram_autogating_driver); +} + +module_init(sdram_autogating_init); +module_exit(sdram_autogating_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("sdram_autogating driver"); +MODULE_LICENSE("GPL"); + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_pins.h @@ -0,0 +1,361 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX51_PINS_H__ +#define __ASM_ARCH_MXC_MX51_PINS_H__ + +/*! + * @file arch-mxc/mx51_pins.h + * + * @brief MX51 I/O Pin List + * + * @ingroup GPIO_MX51 + */ + +#ifndef __ASSEMBLY__ + +/*! + * @name IOMUX/PAD Bit field definitions + */ + +/*! @{ */ + +/*! + * In order to identify pins more effectively, each mux-controlled pin's + * enumerated value is constructed in the following way: + * + * ------------------------------------------------------------------- + * 31-29 | 28 - 24 | 23 - 21 | 20 - 10| 9 - 0 + * ------------------------------------------------------------------- + * IO_P | IO_I | GPIO_I | PAD_I | MUX_I + * ------------------------------------------------------------------- + * + * Bit 0 to 9 contains MUX_I used to identify the register + * offset (0-based. base is IOMUX_module_base) defined in the Section + * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The + * similar field definitions are used for the pad control register. + * For example, the MX51_PIN_ETM_D0 is defined in the enumeration: + * ( (0x28 - MUX_I_START) << MUX_I)|( (0x250 - PAD_I_START) << PAD_I) + * It means the mux control register is at register offset 0x28. The pad control + * register offset is: 0x250 and also occupy the least significant bits + * within the register. + */ + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * MUX control register offset + */ +#define MUX_I 0 +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * PAD control register offset + */ +#define PAD_I 10 +/*! + * Starting bit position within each entry of \b iomux_pins to represent which + * mux mode is for GPIO (0-based) + */ +#define GPIO_I 21 + +#define NON_GPIO_PORT 0x7 +#define PIN_TO_MUX_MASK ((1 << (PAD_I - MUX_I)) - 1) +#define PIN_TO_PAD_MASK ((1 << (GPIO_I - PAD_I)) - 1) +#define PIN_TO_ALT_GPIO_MASK ((1 << (MUX_IO_I - GPIO_I)) - 1) + +#define NON_MUX_I PIN_TO_MUX_MASK +#define MUX_I_START 0x001C +#define PAD_I_START 0x3F0 +#define INPUT_CTL_START 0x8C4 +#define INPUT_CTL_START_TO1 0x928 +#define MUX_I_END (PAD_I_START - 4) + +#define _MXC_BUILD_PIN(gp, gi, ga, mi, pi) \ + (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ + ((mi) << MUX_I) | \ + ((pi - PAD_I_START) << PAD_I) | \ + ((ga) << GPIO_I)) + +#define _MXC_BUILD_GPIO_PIN(gp, gi, ga, mi, pi) \ + _MXC_BUILD_PIN(gp, gi, ga, mi, pi) + +#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ + _MXC_BUILD_PIN(NON_GPIO_PORT, 0, 0, mi, pi) + +#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) +#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) +#define PIN_TO_ALT_GPIO(pin) ((pin >> GPIO_I) & PIN_TO_ALT_GPIO_MASK) +#define PIN_TO_IOMUX_INDEX(pin) (PIN_TO_IOMUX_MUX(pin) >> 2) + +/*! @} End IOMUX/PAD Bit field definitions */ + +/*! + * This enumeration is constructed based on the Section + * "sw_pad_ctl & sw_mux_ctl details" of the MX51 IC Spec. Each enumerated + * value is constructed based on the rules described above. + */ +enum iomux_pins { + MX51_PIN_EIM_DA0 = _MXC_BUILD_NON_GPIO_PIN(0x1C, 0x7A8), + MX51_PIN_EIM_DA1 = _MXC_BUILD_NON_GPIO_PIN(0x20, 0x7A8), + MX51_PIN_EIM_DA2 = _MXC_BUILD_NON_GPIO_PIN(0x24, 0x7A8), + MX51_PIN_EIM_DA3 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x7A8), + MX51_PIN_EIM_DA4 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x7AC), + MX51_PIN_EIM_DA5 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x7AC), + MX51_PIN_EIM_DA6 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x7AC), + MX51_PIN_EIM_DA7 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x7AC), + MX51_PIN_EIM_DA8 = _MXC_BUILD_NON_GPIO_PIN(0x3C, 0x7B0), + MX51_PIN_EIM_DA9 = _MXC_BUILD_NON_GPIO_PIN(0x40, 0x7B0), + MX51_PIN_EIM_DA10 = _MXC_BUILD_NON_GPIO_PIN(0x44, 0x7B0), + MX51_PIN_EIM_DA11 = _MXC_BUILD_NON_GPIO_PIN(0x48, 0x7B0), + MX51_PIN_EIM_DA12 = _MXC_BUILD_NON_GPIO_PIN(0x4C, 0x7BC), + MX51_PIN_EIM_DA13 = _MXC_BUILD_NON_GPIO_PIN(0x50, 0x7BC), + MX51_PIN_EIM_DA14 = _MXC_BUILD_NON_GPIO_PIN(0x54, 0x7BC), + MX51_PIN_EIM_DA15 = _MXC_BUILD_NON_GPIO_PIN(0x58, 0x7BC), + MX51_PIN_EIM_D16 = _MXC_BUILD_GPIO_PIN(1, 0, 1, 0x5C, 0x3F0), + MX51_PIN_EIM_D17 = _MXC_BUILD_GPIO_PIN(1, 1, 1, 0x60, 0x3F4), + MX51_PIN_EIM_D18 = _MXC_BUILD_GPIO_PIN(1, 2, 1, 0x64, 0x3F8), + MX51_PIN_EIM_D19 = _MXC_BUILD_GPIO_PIN(1, 3, 1, 0x68, 0x3FC), + MX51_PIN_EIM_D20 = _MXC_BUILD_GPIO_PIN(1, 4, 1, 0x6C, 0x400), + MX51_PIN_EIM_D21 = _MXC_BUILD_GPIO_PIN(1, 5, 1, 0x70, 0x404), + MX51_PIN_EIM_D22 = _MXC_BUILD_GPIO_PIN(1, 6, 1, 0x74, 0x408), + MX51_PIN_EIM_D23 = _MXC_BUILD_GPIO_PIN(1, 7, 1, 0x78, 0x40C), + MX51_PIN_EIM_D24 = _MXC_BUILD_GPIO_PIN(1, 8, 1, 0x7C, 0x410), + MX51_PIN_EIM_D25 = _MXC_BUILD_NON_GPIO_PIN(0x80, 0x414), + MX51_PIN_EIM_D26 = _MXC_BUILD_NON_GPIO_PIN(0x84, 0x418), + MX51_PIN_EIM_D27 = _MXC_BUILD_GPIO_PIN(1, 9, 1, 0x88, 0x41C), + MX51_PIN_EIM_D28 = _MXC_BUILD_NON_GPIO_PIN(0x8C, 0x420), + MX51_PIN_EIM_D29 = _MXC_BUILD_NON_GPIO_PIN(0x90, 0x424), + MX51_PIN_EIM_D30 = _MXC_BUILD_NON_GPIO_PIN(0x94, 0x428), + MX51_PIN_EIM_D31 = _MXC_BUILD_NON_GPIO_PIN(0x98, 0x42C), + MX51_PIN_EIM_A16 = _MXC_BUILD_GPIO_PIN(1, 10, 1, 0x9C, 0x430), + MX51_PIN_EIM_A17 = _MXC_BUILD_GPIO_PIN(1, 11, 1, 0xA0, 0x434), + MX51_PIN_EIM_A18 = _MXC_BUILD_GPIO_PIN(1, 12, 1, 0xA4, 0x438), + MX51_PIN_EIM_A19 = _MXC_BUILD_GPIO_PIN(1, 13, 1, 0xA8, 0x43C), + MX51_PIN_EIM_A20 = _MXC_BUILD_GPIO_PIN(1, 14, 1, 0xAC, 0x440), + MX51_PIN_EIM_A21 = _MXC_BUILD_GPIO_PIN(1, 15, 1, 0xB0, 0x444), + MX51_PIN_EIM_A22 = _MXC_BUILD_GPIO_PIN(1, 16, 1, 0xB4, 0x448), + MX51_PIN_EIM_A23 = _MXC_BUILD_GPIO_PIN(1, 17, 1, 0xB8, 0x44C), + MX51_PIN_EIM_A24 = _MXC_BUILD_GPIO_PIN(1, 18, 1, 0xBC, 0x450), + MX51_PIN_EIM_A25 = _MXC_BUILD_GPIO_PIN(1, 19, 1, 0xC0, 0x454), + MX51_PIN_EIM_A26 = _MXC_BUILD_GPIO_PIN(1, 20, 1, 0xC4, 0x458), + MX51_PIN_EIM_A27 = _MXC_BUILD_GPIO_PIN(1, 21, 1, 0xC8, 0x45C), + MX51_PIN_EIM_EB0 = _MXC_BUILD_NON_GPIO_PIN(0xCC, 0x460), + MX51_PIN_EIM_EB1 = _MXC_BUILD_NON_GPIO_PIN(0xD0, 0x464), + MX51_PIN_EIM_EB2 = _MXC_BUILD_GPIO_PIN(1, 22, 1, 0xD4, 0x468), + MX51_PIN_EIM_EB3 = _MXC_BUILD_GPIO_PIN(1, 23, 1, 0xD8, 0x46C), + MX51_PIN_EIM_OE = _MXC_BUILD_GPIO_PIN(1, 24, 1, 0xDC, 0x470), + MX51_PIN_EIM_CS0 = _MXC_BUILD_GPIO_PIN(1, 25, 1, 0xE0, 0x474), + MX51_PIN_EIM_CS1 = _MXC_BUILD_GPIO_PIN(1, 26, 1, 0xE4, 0x478), + MX51_PIN_EIM_CS2 = _MXC_BUILD_GPIO_PIN(1, 27, 1, 0xE8, 0x47C), + MX51_PIN_EIM_CS3 = _MXC_BUILD_GPIO_PIN(1, 28, 1, 0xEC, 0x480), + MX51_PIN_EIM_CS4 = _MXC_BUILD_GPIO_PIN(1, 29, 1, 0xF0, 0x484), + MX51_PIN_EIM_CS5 = _MXC_BUILD_GPIO_PIN(1, 30, 1, 0xF4, 0x488), + MX51_PIN_EIM_DTACK = _MXC_BUILD_GPIO_PIN(1, 31, 1, 0xF8, 0x48C), + MX51_PIN_EIM_LBA = _MXC_BUILD_GPIO_PIN(2, 1, 1, 0xFC, 0x494), + MX51_PIN_EIM_CRE = _MXC_BUILD_GPIO_PIN(2, 2, 1, 0x100, 0x4A0), + MX51_PIN_DRAM_CS1 = _MXC_BUILD_NON_GPIO_PIN(0x104, 0x4D0), + MX51_PIN_NANDF_WE_B = _MXC_BUILD_GPIO_PIN(2, 3, 3, 0x108, 0x4E4), + MX51_PIN_NANDF_RE_B = _MXC_BUILD_GPIO_PIN(2, 4, 3, 0x10C, 0x4E8), + MX51_PIN_NANDF_ALE = _MXC_BUILD_GPIO_PIN(2, 5, 3, 0x110, 0x4EC), + MX51_PIN_NANDF_CLE = _MXC_BUILD_GPIO_PIN(2, 6, 3, 0x114, 0x4F0), + MX51_PIN_NANDF_WP_B = _MXC_BUILD_GPIO_PIN(2, 7, 3, 0x118, 0x4F4), + MX51_PIN_NANDF_RB0 = _MXC_BUILD_GPIO_PIN(2, 8, 3, 0x11C, 0x4F8), + MX51_PIN_NANDF_RB1 = _MXC_BUILD_GPIO_PIN(2, 9, 3, 0x120, 0x4FC), + MX51_PIN_NANDF_RB2 = _MXC_BUILD_GPIO_PIN(2, 10, 3, 0x124, 0x500), + MX51_PIN_NANDF_RB3 = _MXC_BUILD_GPIO_PIN(2, 11, 3, 0x128, 0x504), + MX51_PIN_GPIO_NAND = _MXC_BUILD_GPIO_PIN(2, 12, 3, 0x12C, 0x514), + MX51_PIN_NANDF_RB4 = MX51_PIN_GPIO_NAND, + MX51_PIN_NANDF_RB5 = _MXC_BUILD_GPIO_PIN(2, 13, 3, 0x130, 0x5D8), + MX51_PIN_NANDF_RB6 = _MXC_BUILD_GPIO_PIN(2, 14, 3, 0x134, 0x5DC), + MX51_PIN_NANDF_RB7 = _MXC_BUILD_GPIO_PIN(2, 15, 3, 0x138, 0x5E0), + MX51_PIN_NANDF_CS0 = _MXC_BUILD_GPIO_PIN(2, 16, 3, 0x130, 0x518), + MX51_PIN_NANDF_CS1 = _MXC_BUILD_GPIO_PIN(2, 17, 3, 0x134, 0x51C), + MX51_PIN_NANDF_CS2 = _MXC_BUILD_GPIO_PIN(2, 18, 3, 0x138, 0x520), + MX51_PIN_NANDF_CS3 = _MXC_BUILD_GPIO_PIN(2, 19, 3, 0x13C, 0x524), + MX51_PIN_NANDF_CS4 = _MXC_BUILD_GPIO_PIN(2, 20, 3, 0x140, 0x528), + MX51_PIN_NANDF_CS5 = _MXC_BUILD_GPIO_PIN(2, 21, 3, 0x144, 0x52C), + MX51_PIN_NANDF_CS6 = _MXC_BUILD_GPIO_PIN(2, 22, 3, 0x148, 0x530), + MX51_PIN_NANDF_CS7 = _MXC_BUILD_GPIO_PIN(2, 23, 3, 0x14C, 0x534), + MX51_PIN_NANDF_RDY_INT = _MXC_BUILD_GPIO_PIN(2, 24, 3, 0x150, 0x538), + MX51_PIN_NANDF_D15 = _MXC_BUILD_GPIO_PIN(2, 25, 3, 0x154, 0x53C), + MX51_PIN_NANDF_D14 = _MXC_BUILD_GPIO_PIN(2, 26, 3, 0x158, 0x540), + MX51_PIN_NANDF_D13 = _MXC_BUILD_GPIO_PIN(2, 27, 3, 0x15C, 0x544), + MX51_PIN_NANDF_D12 = _MXC_BUILD_GPIO_PIN(2, 28, 3, 0x160, 0x548), + MX51_PIN_NANDF_D11 = _MXC_BUILD_GPIO_PIN(2, 29, 3, 0x164, 0x54C), + MX51_PIN_NANDF_D10 = _MXC_BUILD_GPIO_PIN(2, 30, 3, 0x168, 0x550), + MX51_PIN_NANDF_D9 = _MXC_BUILD_GPIO_PIN(2, 31, 3, 0x16C, 0x554), + MX51_PIN_NANDF_D8 = _MXC_BUILD_GPIO_PIN(3, 0, 3, 0x170, 0x558), + MX51_PIN_NANDF_D7 = _MXC_BUILD_GPIO_PIN(3, 1, 3, 0x174, 0x55C), + MX51_PIN_NANDF_D6 = _MXC_BUILD_GPIO_PIN(3, 2, 3, 0x178, 0x560), + MX51_PIN_NANDF_D5 = _MXC_BUILD_GPIO_PIN(3, 3, 3, 0x17C, 0x564), + MX51_PIN_NANDF_D4 = _MXC_BUILD_GPIO_PIN(3, 4, 3, 0x180, 0x568), + MX51_PIN_NANDF_D3 = _MXC_BUILD_GPIO_PIN(3, 5, 3, 0x184, 0x56C), + MX51_PIN_NANDF_D2 = _MXC_BUILD_GPIO_PIN(3, 6, 3, 0x188, 0x570), + MX51_PIN_NANDF_D1 = _MXC_BUILD_GPIO_PIN(3, 7, 3, 0x18C, 0x574), + MX51_PIN_NANDF_D0 = _MXC_BUILD_GPIO_PIN(3, 8, 3, 0x190, 0x578), + MX51_PIN_CSI1_D8 = _MXC_BUILD_GPIO_PIN(2, 12, 3, 0x194, 0x57C), + MX51_PIN_CSI1_D9 = _MXC_BUILD_GPIO_PIN(2, 13, 3, 0x198, 0x580), + MX51_PIN_CSI1_D10 = _MXC_BUILD_NON_GPIO_PIN(0x19C, 0x584), + MX51_PIN_CSI1_D11 = _MXC_BUILD_NON_GPIO_PIN(0x1A0, 0x588), + MX51_PIN_CSI1_D12 = _MXC_BUILD_NON_GPIO_PIN(0x1A4, 0x58C), + MX51_PIN_CSI1_D13 = _MXC_BUILD_NON_GPIO_PIN(0x1A8, 0x590), + MX51_PIN_CSI1_D14 = _MXC_BUILD_NON_GPIO_PIN(0x1AC, 0x594), + MX51_PIN_CSI1_D15 = _MXC_BUILD_NON_GPIO_PIN(0x1B0, 0x598), + MX51_PIN_CSI1_D16 = _MXC_BUILD_NON_GPIO_PIN(0x1B4, 0x59C), + MX51_PIN_CSI1_D17 = _MXC_BUILD_NON_GPIO_PIN(0x1B8, 0x5A0), + MX51_PIN_CSI1_D18 = _MXC_BUILD_NON_GPIO_PIN(0x1BC, 0x5A4), + MX51_PIN_CSI1_D19 = _MXC_BUILD_NON_GPIO_PIN(0x1C0, 0x5A8), + MX51_PIN_CSI1_VSYNC = _MXC_BUILD_GPIO_PIN(2, 14, 3, 0x1C4, 0x5AC), + MX51_PIN_CSI1_HSYNC = _MXC_BUILD_GPIO_PIN(2, 15, 3, 0x1C8, 0x5B0), + MX51_PIN_CSI1_PIXCLK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5B4), + MX51_PIN_CSI1_MCLK = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x5B8), + MX51_PIN_CSI1_PKE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x860), + MX51_PIN_CSI2_D12 = _MXC_BUILD_GPIO_PIN(3, 9, 3, 0x1CC, 0x5BC), + MX51_PIN_CSI2_D13 = _MXC_BUILD_GPIO_PIN(3, 10, 3, 0x1D0, 0x5C0), + MX51_PIN_CSI2_D14 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1D4, 0x5C4), + MX51_PIN_CSI2_D15 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1D8, 0x5C8), + MX51_PIN_CSI2_D16 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1DC, 0x5CC), + MX51_PIN_CSI2_D17 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1E0, 0x5D0), + MX51_PIN_CSI2_D18 = _MXC_BUILD_GPIO_PIN(3, 11, 3, 0x1E4, 0x5D4), + MX51_PIN_CSI2_D19 = _MXC_BUILD_GPIO_PIN(3, 12, 3, 0x1E8, 0x5D8), + MX51_PIN_CSI2_VSYNC = _MXC_BUILD_GPIO_PIN(3, 13, 3, 0x1EC, 0x5DC), + MX51_PIN_CSI2_HSYNC = _MXC_BUILD_GPIO_PIN(3, 14, 3, 0x1F0, 0x5E0), + MX51_PIN_CSI2_PIXCLK = _MXC_BUILD_GPIO_PIN(3, 15, 3, 0x1F4, 0x5E4), + MX51_PIN_CSI2_PKE0 = _MXC_BUILD_NON_GPIO_PIN(NON_MUX_I, 0x81C), + MX51_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(3, 16, 3, 0x1F8, 0x5E8), + MX51_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(3, 17, 3, 0x1FC, 0x5EC), + MX51_PIN_AUD3_BB_TXD = _MXC_BUILD_GPIO_PIN(3, 18, 3, 0x200, 0x5F0), + MX51_PIN_AUD3_BB_RXD = _MXC_BUILD_GPIO_PIN(3, 19, 3, 0x204, 0x5F4), + MX51_PIN_AUD3_BB_CK = _MXC_BUILD_GPIO_PIN(3, 20, 3, 0x208, 0x5F8), + MX51_PIN_AUD3_BB_FS = _MXC_BUILD_GPIO_PIN(3, 21, 3, 0x20C, 0x5FC), + MX51_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(3, 22, 3, 0x210, 0x600), + MX51_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(3, 23, 3, 0x214, 0x604), + MX51_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(3, 24, 3, 0x218, 0x608), + MX51_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(3, 25, 3, 0x21C, 0x60C), + MX51_PIN_CSPI1_RDY = _MXC_BUILD_GPIO_PIN(3, 26, 3, 0x220, 0x610), + MX51_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(3, 27, 3, 0x224, 0x614), + MX51_PIN_UART1_RXD = _MXC_BUILD_GPIO_PIN(3, 28, 3, 0x228, 0x618), + MX51_PIN_UART1_TXD = _MXC_BUILD_GPIO_PIN(3, 29, 3, 0x22C, 0x61C), + MX51_PIN_UART1_RTS = _MXC_BUILD_GPIO_PIN(3, 30, 3, 0x230, 0x620), + MX51_PIN_UART1_CTS = _MXC_BUILD_GPIO_PIN(3, 31, 3, 0x234, 0x624), + MX51_PIN_UART2_RXD = _MXC_BUILD_GPIO_PIN(0, 20, 3, 0x238, 0x628), + MX51_PIN_UART2_TXD = _MXC_BUILD_GPIO_PIN(0, 21, 3, 0x23C, 0x62C), + MX51_PIN_UART3_RXD = _MXC_BUILD_GPIO_PIN(0, 22, 3, 0x240, 0x630), + MX51_PIN_UART3_TXD = _MXC_BUILD_GPIO_PIN(0, 23, 3, 0x244, 0x634), + MX51_PIN_OWIRE_LINE = _MXC_BUILD_GPIO_PIN(0, 24, 3, 0x248, 0x638), + MX51_PIN_KEY_ROW0 = _MXC_BUILD_NON_GPIO_PIN(0x24C, 0x63C), + MX51_PIN_KEY_ROW1 = _MXC_BUILD_NON_GPIO_PIN(0x250, 0x640), + MX51_PIN_KEY_ROW2 = _MXC_BUILD_NON_GPIO_PIN(0x254, 0x644), + MX51_PIN_KEY_ROW3 = _MXC_BUILD_NON_GPIO_PIN(0x258, 0x648), + MX51_PIN_KEY_COL0 = _MXC_BUILD_NON_GPIO_PIN(0x25C, 0x64C), + MX51_PIN_KEY_COL1 = _MXC_BUILD_NON_GPIO_PIN(0x260, 0x650), + MX51_PIN_KEY_COL2 = _MXC_BUILD_NON_GPIO_PIN(0x264, 0x654), + MX51_PIN_KEY_COL3 = _MXC_BUILD_NON_GPIO_PIN(0x268, 0x658), + MX51_PIN_KEY_COL4 = _MXC_BUILD_NON_GPIO_PIN(0x26C, 0x65C), + MX51_PIN_KEY_COL5 = _MXC_BUILD_NON_GPIO_PIN(0x270, 0x660), + MX51_PIN_USBH1_CLK = _MXC_BUILD_GPIO_PIN(0, 25, 2, 0x278, 0x678), + MX51_PIN_USBH1_DIR = _MXC_BUILD_GPIO_PIN(0, 26, 2, 0x27C, 0x67C), + MX51_PIN_USBH1_STP = _MXC_BUILD_GPIO_PIN(0, 27, 2, 0x280, 0x680), + MX51_PIN_USBH1_NXT = _MXC_BUILD_GPIO_PIN(0, 28, 2, 0x284, 0x684), + MX51_PIN_USBH1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 11, 2, 0x288, 0x688), + MX51_PIN_USBH1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 12, 2, 0x28C, 0x68C), + MX51_PIN_USBH1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 13, 2, 0x290, 0x690), + MX51_PIN_USBH1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 14, 2, 0x294, 0x694), + MX51_PIN_USBH1_DATA4 = _MXC_BUILD_GPIO_PIN(0, 15, 2, 0x298, 0x698), + MX51_PIN_USBH1_DATA5 = _MXC_BUILD_GPIO_PIN(0, 16, 2, 0x29C, 0x69C), + MX51_PIN_USBH1_DATA6 = _MXC_BUILD_GPIO_PIN(0, 17, 2, 0x2A0, 0x6A0), + MX51_PIN_USBH1_DATA7 = _MXC_BUILD_GPIO_PIN(0, 18, 2, 0x2A4, 0x6A4), + MX51_PIN_DI1_PIN11 = _MXC_BUILD_GPIO_PIN(2, 0, 4, 0x2A8, 0x6A8), + MX51_PIN_DI1_PIN12 = _MXC_BUILD_GPIO_PIN(2, 1, 4, 0x2AC, 0x6AC), + MX51_PIN_DI1_PIN13 = _MXC_BUILD_GPIO_PIN(2, 2, 4, 0x2B0, 0x6B0), + MX51_PIN_DI1_D0_CS = _MXC_BUILD_GPIO_PIN(2, 3, 4, 0x2B4, 0x6B4), + MX51_PIN_DI1_D1_CS = _MXC_BUILD_GPIO_PIN(2, 4, 4, 0x2B8, 0x6B8), + MX51_PIN_DISPB2_SER_DIN = _MXC_BUILD_GPIO_PIN(2, 5, 4, 0x2BC, 0x6BC), + MX51_PIN_DISPB2_SER_DIO = _MXC_BUILD_GPIO_PIN(2, 6, 4, 0x2C0, 0x6C0), + MX51_PIN_DISPB2_SER_CLK = _MXC_BUILD_GPIO_PIN(2, 7, 4, 0x2C4, 0x6C4), + MX51_PIN_DISPB2_SER_RS = _MXC_BUILD_GPIO_PIN(2, 8, 4, 0x2C8, 0x6C8), + MX51_PIN_DISP1_DAT0 = _MXC_BUILD_NON_GPIO_PIN(0x2CC, 0x6CC), + MX51_PIN_DISP1_DAT1 = _MXC_BUILD_NON_GPIO_PIN(0x2D0, 0x6D0), + MX51_PIN_DISP1_DAT2 = _MXC_BUILD_NON_GPIO_PIN(0x2D4, 0x6D4), + MX51_PIN_DISP1_DAT3 = _MXC_BUILD_NON_GPIO_PIN(0x2D8, 0x6D8), + MX51_PIN_DISP1_DAT4 = _MXC_BUILD_NON_GPIO_PIN(0x2DC, 0x6DC), + MX51_PIN_DISP1_DAT5 = _MXC_BUILD_NON_GPIO_PIN(0x2E0, 0x6E0), + MX51_PIN_DISP1_DAT6 = _MXC_BUILD_NON_GPIO_PIN(0x2E4, 0x6E4), + MX51_PIN_DISP1_DAT7 = _MXC_BUILD_NON_GPIO_PIN(0x2E8, 0x6E8), + MX51_PIN_DISP1_DAT8 = _MXC_BUILD_NON_GPIO_PIN(0x2EC, 0x6EC), + MX51_PIN_DISP1_DAT9 = _MXC_BUILD_NON_GPIO_PIN(0x2F0, 0x6F0), + MX51_PIN_DISP1_DAT10 = _MXC_BUILD_NON_GPIO_PIN(0x2F4, 0x6F4), + MX51_PIN_DISP1_DAT11 = _MXC_BUILD_NON_GPIO_PIN(0x2F8, 0x6F8), + MX51_PIN_DISP1_DAT12 = _MXC_BUILD_NON_GPIO_PIN(0x2FC, 0x6FC), + MX51_PIN_DISP1_DAT13 = _MXC_BUILD_NON_GPIO_PIN(0x300, 0x700), + MX51_PIN_DISP1_DAT14 = _MXC_BUILD_NON_GPIO_PIN(0x304, 0x704), + MX51_PIN_DISP1_DAT15 = _MXC_BUILD_NON_GPIO_PIN(0x308, 0x708), + MX51_PIN_DISP1_DAT16 = _MXC_BUILD_NON_GPIO_PIN(0x30C, 0x70C), + MX51_PIN_DISP1_DAT17 = _MXC_BUILD_NON_GPIO_PIN(0x310, 0x710), + MX51_PIN_DISP1_DAT18 = _MXC_BUILD_NON_GPIO_PIN(0x314, 0x714), + MX51_PIN_DISP1_DAT19 = _MXC_BUILD_NON_GPIO_PIN(0x318, 0x718), + MX51_PIN_DISP1_DAT20 = _MXC_BUILD_NON_GPIO_PIN(0x31C, 0x71C), + MX51_PIN_DISP1_DAT21 = _MXC_BUILD_NON_GPIO_PIN(0x320, 0x720), + MX51_PIN_DISP1_DAT22 = _MXC_BUILD_NON_GPIO_PIN(0x324, 0x724), + MX51_PIN_DISP1_DAT23 = _MXC_BUILD_NON_GPIO_PIN(0x328, 0x728), + MX51_PIN_DI1_PIN3 = _MXC_BUILD_NON_GPIO_PIN(0x32C, 0x72C), + MX51_PIN_DI1_PIN2 = _MXC_BUILD_NON_GPIO_PIN(0x330, 0x734), + MX51_PIN_DI_GP1 = _MXC_BUILD_NON_GPIO_PIN(0x334, 0x73C), + MX51_PIN_DI_GP2 = _MXC_BUILD_NON_GPIO_PIN(0x338, 0x740), + MX51_PIN_DI_GP3 = _MXC_BUILD_NON_GPIO_PIN(0x33C, 0x744), + MX51_PIN_DI2_PIN4 = _MXC_BUILD_NON_GPIO_PIN(0x340, 0x748), + MX51_PIN_DI2_PIN2 = _MXC_BUILD_NON_GPIO_PIN(0x344, 0x74C), + MX51_PIN_DI2_PIN3 = _MXC_BUILD_NON_GPIO_PIN(0x348, 0x750), + MX51_PIN_DI2_DISP_CLK = _MXC_BUILD_NON_GPIO_PIN(0x34C, 0x754), + MX51_PIN_DI_GP4 = _MXC_BUILD_NON_GPIO_PIN(0x350, 0x758), + MX51_PIN_DISP2_DAT0 = _MXC_BUILD_NON_GPIO_PIN(0x354, 0x75C), + MX51_PIN_DISP2_DAT1 = _MXC_BUILD_NON_GPIO_PIN(0x358, 0x760), + MX51_PIN_DISP2_DAT2 = _MXC_BUILD_NON_GPIO_PIN(0x35C, 0x764), + MX51_PIN_DISP2_DAT3 = _MXC_BUILD_NON_GPIO_PIN(0x360, 0x768), + MX51_PIN_DISP2_DAT4 = _MXC_BUILD_NON_GPIO_PIN(0x364, 0x76C), + MX51_PIN_DISP2_DAT5 = _MXC_BUILD_NON_GPIO_PIN(0x368, 0x770), + MX51_PIN_DISP2_DAT6 = _MXC_BUILD_GPIO_PIN(0, 19, 5, 0x36C, 0x774), + MX51_PIN_DISP2_DAT7 = _MXC_BUILD_GPIO_PIN(0, 29, 5, 0x370, 0x778), + MX51_PIN_DISP2_DAT8 = _MXC_BUILD_GPIO_PIN(0, 30, 5, 0x374, 0x77C), + MX51_PIN_DISP2_DAT9 = _MXC_BUILD_GPIO_PIN(0, 31, 5, 0x378, 0x780), + MX51_PIN_DISP2_DAT10 = _MXC_BUILD_NON_GPIO_PIN(0x37C, 0x784), + MX51_PIN_DISP2_DAT11 = _MXC_BUILD_NON_GPIO_PIN(0x380, 0x788), + MX51_PIN_DISP2_DAT12 = _MXC_BUILD_NON_GPIO_PIN(0x384, 0x78C), + MX51_PIN_DISP2_DAT13 = _MXC_BUILD_NON_GPIO_PIN(0x388, 0x790), + MX51_PIN_DISP2_DAT14 = _MXC_BUILD_NON_GPIO_PIN(0x38C, 0x794), + MX51_PIN_DISP2_DAT15 = _MXC_BUILD_NON_GPIO_PIN(0x390, 0x798), + MX51_PIN_SD1_CMD = _MXC_BUILD_NON_GPIO_PIN(0x394, 0x79C), + MX51_PIN_SD1_CLK = _MXC_BUILD_NON_GPIO_PIN(0x398, 0x7A0), + MX51_PIN_SD1_DATA0 = _MXC_BUILD_NON_GPIO_PIN(0x39C, 0x7A4), + MX51_PIN_SD1_DATA1 = _MXC_BUILD_NON_GPIO_PIN(0x3A0, 0x7A8), + MX51_PIN_SD1_DATA2 = _MXC_BUILD_NON_GPIO_PIN(0x3A4, 0x7AC), + MX51_PIN_SD1_DATA3 = _MXC_BUILD_NON_GPIO_PIN(0x3A8, 0x7B0), + MX51_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 1, 0x3AC, 0x7B4), + MX51_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 1, 0x3B0, 0x7B8), + MX51_PIN_SD2_CMD = _MXC_BUILD_NON_GPIO_PIN(0x3B4, 0x7BC), + MX51_PIN_SD2_CLK = _MXC_BUILD_NON_GPIO_PIN(0x3B8, 0x7C0), + MX51_PIN_SD2_DATA0 = _MXC_BUILD_NON_GPIO_PIN(0x3BC, 0x7C4), + MX51_PIN_SD2_DATA1 = _MXC_BUILD_NON_GPIO_PIN(0x3C0, 0x7C8), + MX51_PIN_SD2_DATA2 = _MXC_BUILD_NON_GPIO_PIN(0x3C4, 0x7CC), + MX51_PIN_SD2_DATA3 = _MXC_BUILD_NON_GPIO_PIN(0x3C8, 0x7D0), + MX51_PIN_GPIO1_2 = _MXC_BUILD_GPIO_PIN(0, 2, 0, 0x3CC, 0x7D4), + MX51_PIN_GPIO1_3 = _MXC_BUILD_GPIO_PIN(0, 3, 0, 0x3D0, 0x7D8), + MX51_PIN_PMIC_INT_REQ = _MXC_BUILD_NON_GPIO_PIN(0x3D4, 0x7FC), + MX51_PIN_GPIO1_4 = _MXC_BUILD_GPIO_PIN(0, 4, 0, 0x3D8, 0x804), + MX51_PIN_GPIO1_5 = _MXC_BUILD_GPIO_PIN(0, 5, 0, 0x3DC, 0x808), + MX51_PIN_GPIO1_6 = _MXC_BUILD_GPIO_PIN(0, 6, 0, 0x3E0, 0x80C), + MX51_PIN_GPIO1_7 = _MXC_BUILD_GPIO_PIN(0, 7, 0, 0x3E4, 0x810), + MX51_PIN_GPIO1_8 = _MXC_BUILD_GPIO_PIN(0, 8, 0, 0x3E8, 0x814), + MX51_PIN_GPIO1_9 = _MXC_BUILD_GPIO_PIN(0, 9, 0, 0x3EC, 0x818), +}; + +#endif /* __ASSEMBLY__ */ +#endif /* __ASM_ARCH_MXC_MX51_PINS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_babbage.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_babbage.c @@ -0,0 +1,1118 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "board-mx51_babbage.h" +#include "iomux.h" +#include "crm_regs.h" +#include + +/*! + * @file mach-mx51/mx51_babbage.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX51 + */ +extern void __init mx51_babbage_io_init(void); +extern struct cpu_wp *(*get_cpu_wp)(int *wp); +extern void (*set_num_cpu_wp)(int num); +static int num_cpu_wp = 3; + +/* working point(wp): 0 - 800MHz; 1 - 166.25MHz; */ +static struct cpu_wp cpu_wp_auto[] = { + { + .pll_rate = 1000000000, + .cpu_rate = 1000000000, + .pdf = 0, + .mfi = 10, + .mfd = 11, + .mfn = 5, + .cpu_podf = 0, + .cpu_voltage = 1175000,}, + { + .pll_rate = 800000000, + .cpu_rate = 800000000, + .pdf = 0, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_podf = 0, + .cpu_voltage = 1100000,}, + { + .pll_rate = 800000000, + .cpu_rate = 166250000, + .pdf = 4, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_podf = 4, + .cpu_voltage = 850000,}, +}; + +static struct fb_videomode video_modes[] = { + { + /* 720p60 TV output */ + "720P60", 60, 1280, 720, 13468, + 260, 109, + 25, 4, + 1, 1, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | + FB_SYNC_EXT, + FB_VMODE_NONINTERLACED, + 0,}, + { + /* MITSUBISHI LVDS panel */ + "XGA", 60, 1024, 768, 15385, + 220, 40, + 21, 7, + 60, 10, + 0, + FB_VMODE_NONINTERLACED, + 0,}, +}; + +struct cpu_wp *mx51_babbage_get_cpu_wp(int *wp) +{ + *wp = num_cpu_wp; + return cpu_wp_auto; +} + +void mx51_babbage_set_num_cpu_wp(int num) +{ + num_cpu_wp = num; + return; +} +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE) +static u16 keymapping[24] = { + KEY_1, KEY_2, KEY_3, KEY_F1, KEY_UP, KEY_F2, + KEY_4, KEY_5, KEY_6, KEY_LEFT, KEY_SELECT, KEY_RIGHT, + KEY_7, KEY_8, KEY_9, KEY_F3, KEY_DOWN, KEY_F4, + KEY_0, KEY_OK, KEY_ESC, KEY_ENTER, KEY_MENU, KEY_BACK, +}; + +static struct resource mxc_kpp_resources[] = { + [0] = { + .start = MXC_INT_KPP, + .end = MXC_INT_KPP, + .flags = IORESOURCE_IRQ, + } +}; + +static struct keypad_data keypad_plat_data = { + .rowmax = 4, + .colmax = 6, + .irq = MXC_INT_KPP, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +/* mxc keypad driver */ +static struct platform_device mxc_keypad_device = { + .name = "mxc_keypad", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_kpp_resources), + .resource = mxc_kpp_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &keypad_plat_data, + }, +}; + +static void mxc_init_keypad(void) +{ + (void)platform_device_register(&mxc_keypad_device); +} +#else +static inline void mxc_init_keypad(void) +{ +} +#endif + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ + defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static struct resource mxcfb_resources[] = { + [0] = { + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_fb_platform_data fb_data[] = { + { + .interface_pix_fmt = IPU_PIX_FMT_RGB24, + .mode_str = "1024x768M-16@60", + }, + { + .interface_pix_fmt = IPU_PIX_FMT_RGB565, + .mode_str = "1024x768M-16@60", + }, +}; + +static struct platform_device mxc_fb_device[] = { + { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + .platform_data = &fb_data[0], + }, + .num_resources = ARRAY_SIZE(mxcfb_resources), + .resource = mxcfb_resources, + }, + { + .name = "mxc_sdc_fb", + .id = 1, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + .platform_data = &fb_data[1], + }, + }, + { + .name = "mxc_sdc_fb", + .id = 2, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, + }, +}; + +static int __initdata enable_vga = { 0 }; +static int __initdata enable_wvga = { 0 }; +static int __initdata enable_tv = { 0 }; +static int __initdata enable_mitsubishi_xga = { 0 }; + +static void wvga_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 1); +} + +static struct mxc_lcd_platform_data lcd_wvga_data = { + .reset = wvga_reset, +}; + +static struct platform_device lcd_wvga_device = { + .name = "lcd_claa", + .dev = { + .release = mxc_nop_release, + .platform_data = &lcd_wvga_data, + }, +}; + +static int handle_edid(int *pixclk) +{ +#if 0 + int err = 0; + int dvi = 0; + int fb0 = 0; + int fb1 = 1; + struct fb_var_screeninfo screeninfo; + struct i2c_adapter *adp; + + memset(&screeninfo, 0, sizeof(screeninfo)); + + adp = i2c_get_adapter(1); + + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) { + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_HSYNC), 1); + msleep(1); + } + err = read_edid(adp, &screeninfo, &dvi); + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_HSYNC), 0); + + if (!err) { + printk(KERN_INFO " EDID read\n"); + if (!dvi) { + enable_vga = 1; + fb0 = 1; /* fb0 will be VGA */ + fb1 = 0; /* fb1 will be DVI or TV */ + } + + /* Handle TV modes */ + /* This logic is fairly complex yet still doesn't handle all + possibilities. Once a customer knows the platform + configuration, this should be simplified to what is desired. + */ + if (screeninfo.xres == 1920 && screeninfo.yres != 1200) { + /* MX51 can't handle clock speeds for anything larger.*/ + if (!enable_tv) + enable_tv = 1; + if (enable_vga || enable_wvga || enable_tv == 2) + enable_tv = 2; + fb_data[0].mode = &(video_modes[0]); + if (!enable_wvga) + fb_data[1].mode_str = "800x600M-16@60"; + } else if (screeninfo.xres > 1280 && screeninfo.yres > 1024) { + if (!enable_wvga) { + fb_data[fb0].mode_str = "1280x1024M-16@60"; + fb_data[fb1].mode_str = NULL; + } else { + /* WVGA is preset so the DVI can't be > this. */ + fb_data[0].mode_str = "1024x768M-16@60"; + } + } else if (screeninfo.xres > 0 && screeninfo.yres > 0) { + if (!enable_wvga) { + fb_data[fb0].mode = + kzalloc(sizeof(struct fb_videomode), + GFP_KERNEL); + fb_var_to_videomode(fb_data[fb0].mode, + &screeninfo); + fb_data[fb0].mode_str = NULL; + if (screeninfo.xres >= 1280 && + screeninfo.yres > 720) + fb_data[fb1].mode_str = NULL; + else if (screeninfo.xres > 1024 && + screeninfo.yres > 768) + fb_data[fb1].mode_str = + "800x600M-16@60"; + else if (screeninfo.xres > 800 && + screeninfo.yres > 600) + fb_data[fb1].mode_str = + "1024x768M-16@60"; + } else { + /* A WVGA panel was specified and an EDID was + read thus there is a DVI monitor attached. */ + if (screeninfo.xres >= 1024) + fb_data[0].mode_str = "1024x768M-16@60"; + else if (screeninfo.xres >= 800) + fb_data[0].mode_str = "800x600M-16@60"; + else + fb_data[0].mode_str = "640x480M-16@60"; + } + } + } +#endif + return 0; +} + +extern int g_di1_tvout; +static int __init mxc_init_fb(void) +{ + int pixclk = 0; + + if (!machine_is_mx51_babbage()) + return 0; + + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 1) { + enable_vga = 1; + fb_data[0].mode_str = NULL; + fb_data[1].mode_str = NULL; + } + g_di1_tvout = 1; + + /* DI1: Dumb LCD */ + if (enable_wvga) { + fb_data[1].interface_pix_fmt = IPU_PIX_FMT_RGB565; + fb_data[1].mode_str = "800x480M-16@55"; + } + + /* DI0: lVDS */ + if (enable_mitsubishi_xga) { + fb_data[0].interface_pix_fmt = IPU_PIX_FMT_LVDS666; + fb_data[0].mode = &(video_modes[1]); + + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_D0_CS), 0); + msleep(1); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_D0_CS), 1); + + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_D12), 1); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_D13), 1); + } + + /* DVI Detect */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_NANDF_D12), "nandf_d12"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_NANDF_D12)); + /* DVI Reset - Assert for i2c disabled mode */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), "dispb2_ser_din"); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 0); + /* DVI Power-down */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), "dispb2_ser_di0"); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), 1); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), 0); + + (void)platform_device_register(&lcd_wvga_device); + + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 2) + handle_edid(&pixclk); + + if (enable_vga) { + printk(KERN_INFO "VGA monitor is primary\n"); + g_di1_tvout = 0; + } else if (enable_wvga) { + printk(KERN_INFO "WVGA LCD panel is primary\n"); + g_di1_tvout = 0; + } else if (enable_tv == 2) + printk(KERN_INFO "HDTV is primary\n"); + else + printk(KERN_INFO "DVI monitor is primary\n"); + + if (enable_tv) { + printk(KERN_INFO "HDTV is specified as %d\n", enable_tv); + fb_data[1].interface_pix_fmt = IPU_PIX_FMT_YUV444; + fb_data[1].mode = &(video_modes[0]); + } + + /* Once a customer knows the platform configuration, + this should be simplified to what is desired. + */ + if (enable_vga || enable_wvga || enable_tv == 2) { + /* + * DI1 -> DP-BG channel: + * + * dev di-out-fmt default-videmode + * + * 1. VGA RGB 1024x768M-16@60 + * 2. WVGA RGB 800x480M-16@55 + * 3. TVE YUV video_modes[0] + */ + (void)platform_device_register(&mxc_fb_device[1]); + if (fb_data[0].mode_str || fb_data[0].mode) + /* + * DI0 -> DC channel: + * + * dev di-out-fmt default-videmode + * + * 1. LVDS RGB video_modes[1] + * 2. DVI RGB 1024x768M-16@60 + */ + (void)platform_device_register(&mxc_fb_device[0]); + } else { + /* + * DI0 -> DP-BG channel: + * + * dev di-out-fmt default-videmode + * + * 1. LVDS RGB video_modes[1] + * 2. DVI RGB 1024x768M-16@60 + */ + (void)platform_device_register(&mxc_fb_device[0]); + if (fb_data[1].mode_str || fb_data[1].mode) + /* + * DI1 -> DC channel: + * + * dev di-out-fmt default-videmode + * + * 1. VGA RGB 1024x768M-16@60 + * 2. WVGA RGB 800x480M-16@55 + * 3. TVE YUV video_modes[0] + */ + (void)platform_device_register(&mxc_fb_device[1]); + } + + /* + * DI0/1 DP-FG channel: + */ + (void)platform_device_register(&mxc_fb_device[2]); + + return 0; +} +device_initcall(mxc_init_fb); + +static int __init vga_setup(char *__unused) +{ + enable_vga = 1; + return 1; +} + +__setup("vga", vga_setup); + +static int __init wvga_setup(char *__unused) +{ + enable_wvga = 1; + return 1; +} + +__setup("wvga", wvga_setup); + +static int __init mitsubishi_xga_setup(char *__unused) +{ + enable_mitsubishi_xga = 1; + return 1; +} + +__setup("mitsubishi_xga", mitsubishi_xga_setup); + +static int __init tv_setup(char *s) +{ + enable_tv = 1; + if (strcmp(s, "2") == 0 || strcmp(s, "=2") == 0) + enable_tv = 2; + return 1; +} + +__setup("hdtv", tv_setup); +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +static void dvi_reset(void) +{ + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 0); + msleep(50); + + /* do reset */ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 1); + msleep(20); /* tRES >= 50us */ + + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIN), 0); +} + +static struct mxc_lcd_platform_data dvi_data = { + .core_reg = "VGEN1", + .io_reg = "VGEN3", + .reset = dvi_reset, +}; + +static void vga_reset(void) +{ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), "eim_a19"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 0); + msleep(50); + /* do reset */ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 1); + msleep(10); /* tRES >= 50us */ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 0); +} + +static struct mxc_lcd_platform_data vga_data = { + .core_reg = "VCAM", + .io_reg = "VGEN3", + .analog_reg = "VAUDIO", + .reset = vga_reset, +}; + +static void si4702_reset(void) +{ + return; + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), 0); + msleep(100); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), 1); + msleep(100); +} + +static void si4702_clock_ctl(int flag) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A18), flag); + msleep(100); +} + +static void si4702_gpio_get(void) +{ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A18), "eim_a18"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A18), 0); +} + +static void si4702_gpio_put(void) +{ +} + +static struct mxc_fm_platform_data si4702_data = { + .reg_vio = "SW4", + .reg_vdd = "VIOHI", + .gpio_get = si4702_gpio_get, + .gpio_put = si4702_gpio_put, + .reset = si4702_reset, + .clock_ctl = si4702_clock_ctl, +}; + +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +static struct mxc_camera_platform_data camera_data = { + .io_regulator = "SW4", + .analog_regulator = "VIOHI", + .mclk = 24000000, + .csi = 0, +}; + +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { + { + .type = "ov3640", + .addr = 0x3C, + .platform_data = (void *)&camera_data, + }, +}; +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 +static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, +}; +#endif + +#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE) +static struct i2c_board_info mxc_i2c_hs_board_info[] __initdata = { + { + .type = "sii9022", + .addr = 0x39, + .platform_data = &dvi_data, + }, + { + .type = "ch7026", + .addr = 0x75, + .platform_data = &vga_data, + }, + { + .type = "si4702", + .addr = 0x10, + .platform_data = (void *)&si4702_data, + }, +}; +#endif + +#endif + +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +static struct mtd_partition mxc_spi_nor_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 0x00040000,}, + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL,}, + +}; + +static struct mtd_partition mxc_dataflash_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 0x000100000,}, + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL,}, +}; + +static struct flash_platform_data mxc_spi_flash_data[] = { + { + .name = "mxc_spi_nor", + .parts = mxc_spi_nor_partitions, + .nr_parts = ARRAY_SIZE(mxc_spi_nor_partitions), + .type = "sst25vf016b",}, + { + .name = "mxc_dataflash", + .parts = mxc_dataflash_partitions, + .nr_parts = ARRAY_SIZE(mxc_dataflash_partitions), + .type = "at45db321d",} +}; +#endif + +static struct spi_board_info mxc_spi_nor_device[] __initdata = { +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) + { + .modalias = "mxc_spi_nor", + .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 1, + .chip_select = 1, + .platform_data = &mxc_spi_flash_data[0],}, +#endif +}; + +static struct spi_board_info mxc_dataflash_device[] __initdata = { +#if defined(CONFIG_MTD_MXC_DATAFLASH) \ + || defined(CONFIG_MTD_MXC_DATAFLASH_MODULE) + { + .modalias = "mxc_dataflash", + .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 1, + .chip_select = 1, + .platform_data = &mxc_spi_flash_data[1],}, +#endif +}; + +#if defined(CONFIG_MMC_IMX_ESDHCI) || defined(CONFIG_MMC_IMX_ESDHCI_MODULE) +static int sdhc_write_protect(struct device *dev) +{ + unsigned short rc = 0; + + if (to_platform_device(dev)->id == 0) + rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); + else + rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5)); + + return rc; +} + +static unsigned int sdhc_get_card_det_status(struct device *dev) +{ + int ret; + + if (to_platform_device(dev)->id == 0) { + ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); + return ret; + } else { /* config the det pin for SDHC2 */ + if (board_is_rev(BOARD_REV_2)) + /* BB2.5 */ + ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); + else + /* BB2.0 */ + ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); + return ret; + } +} + +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 400000, + .max_clk = 52000000, + .card_inserted_state = 1, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", + .power_mmc = NULL, +}; + +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | + MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 50000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC1, + .end = MXC_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = IOMUX_TO_IRQ(MX51_PIN_GPIO1_0), + .end = IOMUX_TO_IRQ(MX51_PIN_GPIO1_0), + .flags = IORESOURCE_IRQ, + }, +}; + +/*! + * Resource definition for the SDHC2 + */ +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = IOMUX_TO_IRQ(MX51_PIN_GPIO1_6), + .end = IOMUX_TO_IRQ(MX51_PIN_GPIO1_6), + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxsdhci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +/*! Device Definition for MXC SDHC2 */ +static struct platform_device mxcsdhc2_device = { + .name = "mxsdhci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; + +static inline void mxc_init_mmc(void) +{ + if (board_is_rev(BOARD_REV_2)) { + /* BB2.5 */ + mxcsdhc2_resources[2].start = + IOMUX_TO_IRQ(MX51_PIN_GPIO1_6); /* SD2 CD */ + mxcsdhc2_resources[2].end = + IOMUX_TO_IRQ(MX51_PIN_GPIO1_6); /* SD2 CD */ + } + + (void)platform_device_register(&mxcsdhc1_device); + (void)platform_device_register(&mxcsdhc2_device); +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +#if defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000_MODULE) +static int mxc_sgtl5000_amp_enable(int enable); + +static int headphone_det_status(void) +{ + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 2) + return (gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_NANDF_D14)) == 0); + + return gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_NANDF_CS0)); +} + +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 3, + .hp_irq = IOMUX_TO_IRQ(MX51_PIN_NANDF_CS0), + .hp_status = headphone_det_status, + .amp_enable = mxc_sgtl5000_amp_enable, + .sysclk = 12288000, +}; + +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", + .dev = { + .release = mxc_nop_release, + .platform_data = &sgtl5000_data, + }, +}; + +static int mxc_sgtl5000_amp_enable(int enable) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A23), enable ? 1 : 0); + return 0; +} + +static void mxc_init_sgtl5000(void) +{ + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 2) { + sgtl5000_data.sysclk = 26000000; + } + + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A23), "eim_a23"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A23), 0); + + platform_device_register(&mxc_sgtl5000_device); +} +#else +static inline void mxc_init_sgtl5000(void) +{ +} +#endif + +#if defined CONFIG_FEC +static struct resource mxc_fec_resources[] = { + { + .start = FEC_BASE_ADDR, + .end = FEC_BASE_ADDR + 0xfff, + .flags = IORESOURCE_MEM + }, { + .start = MXC_INT_FEC, + .end = MXC_INT_FEC, + .flags = IORESOURCE_IRQ + }, +}; + +struct platform_device mxc_fec_device = { + .name = "fec", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_fec_resources), + .resource = mxc_fec_resources, +}; + +static __init int mxc_init_fec(void) +{ + return platform_device_register(&mxc_fec_device); +} +#else +static inline int mxc_init_fec(void) +{ + return 0; +} +#endif + +#if defined(CONFIG_GPIO_BUTTON_MXC) || \ + defined(CONFIG_GPIO_BUTTON_MXC_MODULE) + +#define MXC_BUTTON_GPIO_PIN MX51_PIN_EIM_DTACK + +static struct mxc_gpio_button_data gpio_button_data = { + .name = "Power Button (CM)", + .gpio = MXC_BUTTON_GPIO_PIN, + .irq = IOMUX_TO_IRQ(MXC_BUTTON_GPIO_PIN), + .key = KEY_POWER, +}; + +static struct platform_device gpio_button_device = { + .name = "gpio_button", + .dev = { + .release = mxc_nop_release, + .platform_data = &gpio_button_data, + }, +}; + +static inline void mxc_init_gpio_button(void) +{ + gpio_request(IOMUX_TO_GPIO(MXC_BUTTON_GPIO_PIN), "button"); + gpio_direction_input(IOMUX_TO_GPIO(MXC_BUTTON_GPIO_PIN)); + platform_device_register(&gpio_button_device); +} +#else +static inline void mxc_init_gpio_button(void) +{ +} +#endif + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + char *str; + int size = SZ_512M - SZ_32M; + struct tag *t; + + mxc_cpu_init(); + + get_cpu_wp = mx51_babbage_get_cpu_wp; + set_num_cpu_wp = mx51_babbage_set_num_cpu_wp; + + for_each_tag(t, tags) { + if (t->hdr.tag != ATAG_CMDLINE) + continue; + str = t->u.cmdline.cmdline; + str = strstr(str, "mem="); + if (str != NULL) { + str += 4; + size = memparse(str, &str); + if (size == 0 || size == SZ_512M) + return; + } + } + + for_each_tag(t, tags) { + if (t->hdr.tag != ATAG_MEM) + continue; + + t->u.mem.size = size; +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ + defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) + mxcfb_resources[0].start = t->u.mem.start + size; + mxcfb_resources[0].end = t->u.mem.start + SZ_512M - 1; +#endif + } +} + +#define PWGT1SPIEN (1<<15) +#define PWGT2SPIEN (1<<16) +#define USEROFFSPI (1<<3) + +static void mxc_power_off(void) +{ + /* We can do power down one of two ways: + Set the power gating + Set USEROFFSPI */ + + /* Set the power gate bits to power down */ + pmic_write_reg(REG_POWER_MISC, (PWGT1SPIEN|PWGT2SPIEN), + (PWGT1SPIEN|PWGT2SPIEN)); +} + +/*! + * Power Key interrupt handler. + */ +static irqreturn_t power_key_int(int irq, void *dev_id) +{ + pr_info(KERN_INFO "PWR key pressed\n"); + return 0; +} + +/*! + * Power Key initialization. + */ +static int __init mxc_init_power_key(void) +{ + /* Set power key as wakeup resource */ + int irq, ret; + irq = IOMUX_TO_IRQ(MX51_PIN_EIM_A27); + set_irq_type(irq, IRQF_TRIGGER_RISING); + ret = request_irq(irq, power_key_int, 0, "power_key", 0); + if (ret) + pr_info("register on-off key interrupt failed\n"); + else + enable_irq_wake(irq); + return ret; +} + +late_initcall(mxc_init_power_key); + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + mxc_cpu_common_init(); + mxc_register_gpios(); + mx51_babbage_io_init(); + early_console_setup(saved_command_line); + + mxc_init_devices(); + + mxc_init_keypad(); + mxc_init_mmc(); + mxc_init_gpio_button(); + mx51_babbage_init_mc13892(); + + if (board_is_rev(BOARD_REV_2)) + /* BB2.5 */ + spi_register_board_info(mxc_dataflash_device, + ARRAY_SIZE(mxc_dataflash_device)); + else + /* BB2.0 */ + spi_register_board_info(mxc_spi_nor_device, + ARRAY_SIZE(mxc_spi_nor_device)); + +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 + i2c_register_board_info(1, mxc_i2c1_board_info, + ARRAY_SIZE(mxc_i2c1_board_info)); +#endif +#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE) + if (cpu_is_mx51_rev(CHIP_REV_2_0) >= 1) { + vga_data.core_reg = NULL; + vga_data.io_reg = NULL; + vga_data.analog_reg = NULL; + } + i2c_register_board_info(3, mxc_i2c_hs_board_info, + ARRAY_SIZE(mxc_i2c_hs_board_info)); +#endif + +#endif + pm_power_off = mxc_power_off; + mxc_init_fec(); + mxc_init_sgtl5000(); +} + +static void __init mx51_babbage_timer_init(void) +{ + /* Change the CPU voltages for TO2*/ + if (cpu_is_mx51_rev(CHIP_REV_2_0) <= 1) { + cpu_wp_auto[0].cpu_voltage = 1175000; + cpu_wp_auto[1].cpu_voltage = 1100000; + cpu_wp_auto[2].cpu_voltage = 1000000; + } + + mx51_clocks_init(32768, 24000000, 22579200, 24576000); +} + +static struct sys_timer mxc_timer = { + .init = mx51_babbage_timer_init, +}; + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX51_BABBAGE data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx51_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/sdma_script_code.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/sdma_script_code.h @@ -0,0 +1,170 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/******************************************************************************* + + SDMA RELEASE LABEL: "SS15_ELVIS" + +*******************************************************************************/ + +#ifndef __SDMA_SCRIPT_CODE_H__ +#define __SDMA_SCRIPT_CODE_H__ + +/*! +* SDMA ROM scripts start addresses and sizes +*/ + +#define start_ADDR 0 +#define start_SIZE 24 + +#define core_ADDR 80 +#define core_SIZE 232 + +#define common_ADDR 312 +#define common_SIZE 330 + +#define ap_2_ap_ADDR 642 +#define ap_2_ap_SIZE 41 + +#define app_2_mcu_ADDR 683 +#define app_2_mcu_SIZE 64 + +#define mcu_2_app_ADDR 747 +#define mcu_2_app_SIZE 70 + +#define uart_2_mcu_ADDR 817 +#define uart_2_mcu_SIZE 75 + +#define shp_2_mcu_ADDR 892 +#define shp_2_mcu_SIZE 69 + +#define mcu_2_shp_ADDR 961 +#define mcu_2_shp_SIZE 72 + +#define app_2_per_ADDR 1033 +#define app_2_per_SIZE 66 + +#define per_2_app_ADDR 1099 +#define per_2_app_SIZE 74 + +#define per_2_shp_ADDR 1173 +#define per_2_shp_SIZE 78 + +#define shp_2_per_ADDR 1251 +#define shp_2_per_SIZE 72 + +#define uartsh_2_mcu_ADDR 1323 +#define uartsh_2_mcu_SIZE 69 + +#define mcu_2_ata_ADDR 1392 +#define mcu_2_ata_SIZE 81 + +#define ata_2_mcu_ADDR 1473 +#define ata_2_mcu_SIZE 96 + +#define loop_DMAs_routines_ADDR 1569 +#define loop_DMAs_routines_SIZE 227 + +#define test_ADDR 1796 +#define test_SIZE 63 + +#define signature_ADDR 1023 +#define signature_SIZE 1 + +/*! +* SDMA RAM scripts start addresses and sizes +*/ + +#define ext_mem__ipu_ram_ADDR 6144 +#define ext_mem__ipu_ram_SIZE 123 + +#define mcu_2_spdif_ADDR 6267 +#define mcu_2_spdif_SIZE 59 + +#define uart_2_per_ADDR 6326 +#define uart_2_per_SIZE 73 + +#define uartsh_2_per_ADDR 6399 +#define uartsh_2_per_SIZE 67 + +/*! +* SDMA RAM image start address and size +*/ + +#define RAM_CODE_START_ADDR 6144 +#define RAM_CODE_SIZE 322 + +/*! +* Buffer that holds the SDMA RAM image +*/ +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static const short sdma_code[] = { + 0x0e70, 0x0611, 0x5616, 0xc13c, 0x7d2a, 0x5ade, 0x008e, 0xc14e, + 0x7c26, 0x5be0, 0x5ef0, 0x5ce8, 0x0688, 0x08ff, 0x0011, 0x28ff, + 0x00bc, 0x53f6, 0x05df, 0x7d0b, 0x6dc5, 0x03df, 0x7d03, 0x6bd5, + 0xd84f, 0x982b, 0x6b05, 0xc681, 0x7e27, 0x7f29, 0x982b, 0x6d01, + 0x03df, 0x7d05, 0x6bd5, 0xc6ab, 0x7e18, 0x7f1a, 0x982b, 0x6b05, + 0xc621, 0x7e07, 0x7f06, 0x52de, 0x53e6, 0xc159, 0x7dd7, 0x0200, + 0x9803, 0x0007, 0x6004, 0x680c, 0x53f6, 0x028e, 0x00a3, 0xc256, + 0x048b, 0x0498, 0x0454, 0x068a, 0x982b, 0x0207, 0x680c, 0x6ddf, + 0x0107, 0x68ff, 0x60d0, 0x9834, 0x0207, 0x68ff, 0x6d28, 0x0107, + 0x6004, 0x680c, 0x9834, 0x0007, 0x68ff, 0x60d0, 0x9834, 0x0288, + 0x03a5, 0x3b03, 0x3d03, 0x4d00, 0x7d0a, 0x0804, 0x00a5, 0x00da, + 0x7d1a, 0x02a0, 0x7b01, 0x65d8, 0x7eee, 0x65ff, 0x7eec, 0x0804, + 0x02d0, 0x7d11, 0x4b00, 0x7c0f, 0x008a, 0x3003, 0x6dcf, 0x6bdf, + 0x0015, 0x0015, 0x7b02, 0x65d8, 0x0000, 0x7edd, 0x63ff, 0x7edb, + 0x3a03, 0x6dcd, 0x6bdd, 0x008a, 0x7b02, 0x65d8, 0x0000, 0x7ed3, + 0x65ff, 0x7ed1, 0x0006, 0xc1d9, 0xc1e3, 0x57db, 0x52f3, 0x6a01, + 0x008f, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5deb, 0x56fb, 0x0478, + 0x7d28, 0x0479, 0x7c16, 0x0015, 0x0015, 0x0388, 0x620a, 0x0808, + 0x7801, 0x0217, 0x5a06, 0x7f1d, 0x620a, 0x0808, 0x7801, 0x0217, + 0x5a26, 0x7f17, 0x2301, 0x4b00, 0x7cf1, 0x0b70, 0x0311, 0x5313, + 0x98aa, 0x0015, 0x0015, 0x0015, 0x7804, 0x620b, 0x5a06, 0x620b, + 0x5a26, 0x7c07, 0x0000, 0x55eb, 0x4d00, 0x7d06, 0xc1fa, 0x57db, + 0x9880, 0x0007, 0x680c, 0xc213, 0xc20a, 0x987d, 0xc1e3, 0x57db, + 0x52f3, 0x6ad5, 0x56fb, 0x028e, 0x1a94, 0x6ac3, 0x62c8, 0x0269, + 0x7d1e, 0x1e94, 0x6ee3, 0x62d0, 0x5aeb, 0x62c8, 0x0248, 0x6ed3, + 0x6ac8, 0x2694, 0x52eb, 0x6ad5, 0x6ee3, 0x62c8, 0x026e, 0x7d27, + 0x6ac8, 0x7f23, 0x2501, 0x4d00, 0x7d26, 0x028e, 0x1a98, 0x6ac3, + 0x62c8, 0x6ec3, 0x0260, 0x7df1, 0x62d0, 0xc27a, 0x98fb, 0x6ee3, + 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x62c8, 0x026e, + 0x7d0e, 0x6ac8, 0x7f0a, 0x2001, 0x7cf9, 0x6add, 0x7f06, 0x0000, + 0x4d00, 0x7d09, 0xc1fa, 0x57db, 0x98ba, 0x0007, 0x6aff, 0x62d0, + 0xc27a, 0x0458, 0x0454, 0x6add, 0x7ff8, 0xc20a, 0x98b7, 0xc1d9, + 0xc1e3, 0x57db, 0x52f3, 0x6ad5, 0x56fb, 0x028e, 0x1a94, 0x5202, + 0x0269, 0x7d17, 0x1e94, 0x5206, 0x0248, 0x5a06, 0x2694, 0x5206, + 0x026e, 0x7d26, 0x6ac8, 0x7f22, 0x2501, 0x4d00, 0x7d27, 0x028e, + 0x1a98, 0x5202, 0x0260, 0x7df3, 0x6add, 0x7f18, 0x62d0, 0xc27a, + 0x993e, 0x008f, 0x2001, 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x5206, + 0x026e, 0x7d0e, 0x6ac8, 0x7f0a, 0x2001, 0x7cf9, 0x6add, 0x7f06, + 0x0000, 0x4d00, 0x7d0b, 0xc1fa, 0x57db, 0x9904, 0x0007, 0x6aff, + 0x6add, 0x7ffc, 0x62d0, 0xc27a, 0x0458, 0x0454, 0x6add, 0x7ff6, + 0xc20a, 0x9901 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/Makefile.boot +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x90008000 +params_phys-y := 0x90000100 +initrd_phys-y := 0x90800000 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/board-mx51_babbage.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/board-mx51_babbage.h @@ -0,0 +1,85 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX51_BABBAGE_H__ +#define __ASM_ARCH_MXC_BOARD_MX51_BABBAGE_H__ + +/*! + * @defgroup BRDCFG_MX51 Board Configuration Options + * @ingroup MSL_MX51 + */ + +/*! + * @file mach-mx51/board-mx51_babbage.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX51 Babbage Platform. + * + * @ingroup BRDCFG_MX51 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR IRDA +#define UART2_ENABLED 1 +/* UART 3 configuration */ +#define UART3_MODE MODE_DTE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +extern int __init mx51_babbage_init_mc13892(void); + +#endif /* __ASM_ARCH_MXC_BOARD_MX51_BABBAGE_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/Kconfig @@ -0,0 +1,94 @@ +menu "MX51 Options" + depends on ARCH_MX51 + +config FORCE_MAX_ZONEORDER + int "MAX_ORDER" + default "13" + +config MX51_OPTIONS + bool + default y + select CPU_V7 + select USB_ARCH_HAS_EHCI + select MXC_TZIC + +config MACH_MX51_3DS + bool "Support MX51 3-Stack platforms" + default y + help + Include support for MX51 3-Stack platform. This includes specific + configurations for the board and its peripherals. + +config MACH_MX51_BABBAGE + bool "Support MX51 BABBAGE platforms" + help + Include support for MX51 Babbage platform. This includes specific + configurations for the board and its peripherals. + +config MXC_SDMA_API + bool "Use SDMA API" + default y + help + This selects the Freescale MXC SDMA API. + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V3 + bool "MXC NFC Hardware Version 3" + depends on ARCH_MX51 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 3 + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V3_2 + bool "MXC NFC Hardware Version 3.2" + depends on ARCH_MXC_HAS_NFC_V3 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 3.1 + If unsure, say N. + +menu "SDMA options" + depends on MXC_SDMA_API + +config SDMA_IRAM + bool "Use Internal RAM for SDMA transfer" + default n + help + Support Internal RAM as SDMA buffer or control structures + +config SDMA_IRAM_SIZE + hex "Reserved bytes of IRAM for SDMA (0x800-0x1000)" + range 0x800 0x1000 + depends on SDMA_IRAM + default "0x1000" + help + Set the size of IRAM for SDMA. It must be a multiple of 512bytes. +endmenu + +menu "Device options" + +config I2C_MXC_SELECT1 + bool "Enable I2C1 module" + default y + depends on I2C_MXC + help + Enable MX51 I2C1 module. + +config I2C_MXC_SELECT2 + bool "Enable I2C2 module" + default n + depends on I2C_MXC + help + Enable MX51 I2C2 module. + +config I2C_MXC_SELECT3 + bool "Enable I2C3 module" + default n + depends on I2C_MXC + help + Enable MX51 I2C3 module. + +endmenu + +endmenu --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/dma.c @@ -0,0 +1,666 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +#include "serial.h" + +#define MXC_MMC_BUFFER_ACCESS 0x20 +#define MXC_SDHC_MMC_WML 64 +#define MXC_SDHC_SD_WML 256 +#define MXC_SSI_TX0_REG 0x0 +#define MXC_SSI_TX1_REG 0x4 +#define MXC_SSI_RX0_REG 0x8 +#define MXC_SSI_RX1_REG 0xC +#define MXC_SSI_TXFIFO_WML 0x4 +#define MXC_SSI_RXFIFO_WML 0x6 +#define MXC_SPDIF_TXFIFO_WML 0x8 +#define MXC_SPDIF_TX_REG 0x2C + +typedef struct mxc_sdma_info_entry_s { + mxc_dma_device_t device; + mxc_sdma_channel_params_t *chnl_info; +} mxc_sdma_info_entry_t; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_rx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_RXTL, + .per_address = UART1_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART1_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_tx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_TXTL, + .per_address = UART1_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART1_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_rx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_RXTL, + .per_address = UART2_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART2_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_tx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_TXTL, + .per_address = UART2_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART2_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_rx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_RXTL, + .per_address = UART3_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART3_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_tx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_TXTL, + .per_address = UART3_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART3_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_memory_params = { + .chnl_params = { + .peripheral_type = MEMORY, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_rx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR, + .peripheral_type = ATA, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_RX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_tx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR + 0x18, + .peripheral_type = ATA, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_TX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_16bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_32bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_info_entry_t mxc_sdma_active_dma_info[] = { + {MXC_DMA_UART1_RX, &mxc_sdma_uart1_rx_params}, + {MXC_DMA_UART1_TX, &mxc_sdma_uart1_tx_params}, + {MXC_DMA_UART2_RX, &mxc_sdma_uart2_rx_params}, + {MXC_DMA_UART2_TX, &mxc_sdma_uart2_tx_params}, + {MXC_DMA_UART3_RX, &mxc_sdma_uart3_rx_params}, + {MXC_DMA_UART3_TX, &mxc_sdma_uart3_tx_params}, + {MXC_DMA_MMC1_WIDTH_1, &mxc_sdma_mmc1_width1_params}, + {MXC_DMA_MMC1_WIDTH_4, &mxc_sdma_mmc1_width4_params}, + {MXC_DMA_MMC2_WIDTH_1, &mxc_sdma_mmc2_width1_params}, + {MXC_DMA_MMC2_WIDTH_4, &mxc_sdma_mmc2_width4_params}, + {MXC_DMA_SSI1_8BIT_RX0, &mxc_sdma_ssi1_8bit_rx0_params}, + {MXC_DMA_SSI1_8BIT_TX0, &mxc_sdma_ssi1_8bit_tx0_params}, + {MXC_DMA_SSI1_16BIT_RX0, &mxc_sdma_ssi1_16bit_rx0_params}, + {MXC_DMA_SSI1_16BIT_TX0, &mxc_sdma_ssi1_16bit_tx0_params}, + {MXC_DMA_SSI1_24BIT_RX0, &mxc_sdma_ssi1_24bit_rx0_params}, + {MXC_DMA_SSI1_24BIT_TX0, &mxc_sdma_ssi1_24bit_tx0_params}, + {MXC_DMA_SSI1_8BIT_RX1, &mxc_sdma_ssi1_8bit_rx1_params}, + {MXC_DMA_SSI1_8BIT_TX1, &mxc_sdma_ssi1_8bit_tx1_params}, + {MXC_DMA_SSI1_16BIT_RX1, &mxc_sdma_ssi1_16bit_rx1_params}, + {MXC_DMA_SSI1_16BIT_TX1, &mxc_sdma_ssi1_16bit_tx1_params}, + {MXC_DMA_SSI1_24BIT_RX1, &mxc_sdma_ssi1_24bit_rx1_params}, + {MXC_DMA_SSI1_24BIT_TX1, &mxc_sdma_ssi1_24bit_tx1_params}, + {MXC_DMA_SSI2_8BIT_RX0, &mxc_sdma_ssi2_8bit_rx0_params}, + {MXC_DMA_SSI2_8BIT_TX0, &mxc_sdma_ssi2_8bit_tx0_params}, + {MXC_DMA_SSI2_16BIT_RX0, &mxc_sdma_ssi2_16bit_rx0_params}, + {MXC_DMA_SSI2_16BIT_TX0, &mxc_sdma_ssi2_16bit_tx0_params}, + {MXC_DMA_SSI2_24BIT_RX0, &mxc_sdma_ssi2_24bit_rx0_params}, + {MXC_DMA_SSI2_24BIT_TX0, &mxc_sdma_ssi2_24bit_tx0_params}, + {MXC_DMA_SSI2_8BIT_RX1, &mxc_sdma_ssi2_8bit_rx1_params}, + {MXC_DMA_SSI2_8BIT_TX1, &mxc_sdma_ssi2_8bit_tx1_params}, + {MXC_DMA_SSI2_16BIT_RX1, &mxc_sdma_ssi2_16bit_rx1_params}, + {MXC_DMA_SSI2_16BIT_TX1, &mxc_sdma_ssi2_16bit_tx1_params}, + {MXC_DMA_SSI2_24BIT_RX1, &mxc_sdma_ssi2_24bit_rx1_params}, + {MXC_DMA_SSI2_24BIT_TX1, &mxc_sdma_ssi2_24bit_tx1_params}, + {MXC_DMA_MEMORY, &mxc_sdma_memory_params}, + {MXC_DMA_ATA_RX, &mxc_sdma_ata_rx_params}, + {MXC_DMA_ATA_TX, &mxc_sdma_ata_tx_params}, + {MXC_DMA_SPDIF_16BIT_TX, &mxc_sdma_spdif_16bit_tx_params}, + {MXC_DMA_SPDIF_32BIT_TX, &mxc_sdma_spdif_32bit_tx_params}, +}; + +static int mxc_sdma_info_entrys = + sizeof(mxc_sdma_active_dma_info) / sizeof(mxc_sdma_active_dma_info[0]); + +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id) +{ + mxc_sdma_info_entry_t *p = mxc_sdma_active_dma_info; + int i; + + for (i = 0; i < mxc_sdma_info_entrys; i++, p++) { + if (p->device == channel_id) + return p->chnl_info; + + } + return NULL; +} + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t *chnl) +{ +#ifdef CONFIG_SDMA_IRAM + int i; + for (i = MXC_DMA_CHANNEL_IRAM; i < MAX_DMA_CHANNELS; i++) + chnl[i].dynamic = 0; +#endif +} + +EXPORT_SYMBOL(mxc_sdma_get_channel_params); +EXPORT_SYMBOL(mxc_get_static_channels); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_babbage_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_babbage_gpio.c @@ -0,0 +1,795 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +#include "iomux.h" + +/*! + * @file mach-mx51/mx51_babbage_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO + */ + +static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { + { + MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A18, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A19, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A20, IOMUX_CONFIG_GPIO, + (PAD_CTL_PKE_ENABLE), + }, + { + MX51_PIN_EIM_A21, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_EIM_A23, IOMUX_CONFIG_GPIO, + }, + { /*MDIO */ + MX51_PIN_EIM_EB2, IOMUX_CONFIG_ALT3, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_22K_PU | PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PULL), + }, + { /*RDATA[1] */ + + MX51_PIN_EIM_EB3, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*RDATA[2] */ + MX51_PIN_EIM_CS2, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*RDATA[3] */ + MX51_PIN_EIM_CS3, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*RX_ER */ + MX51_PIN_EIM_CS4, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*CRS */ + MX51_PIN_EIM_CS5, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { + MX51_PIN_EIM_DTACK, IOMUX_CONFIG_GPIO, + (PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_EIM_LBA, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_NANDF_RB2, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { + MX51_PIN_NANDF_RB3, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { + MX51_PIN_NANDF_RB4, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*RDATA[0] */ + MX51_PIN_NANDF_RB6, IOMUX_CONFIG_ALT1, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { /*TDATA[0] */ + MX51_PIN_NANDF_RB7, IOMUX_CONFIG_ALT1, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { + MX51_PIN_NANDF_CS0, IOMUX_CONFIG_GPIO, + PAD_CTL_100K_PU, + }, + { + MX51_PIN_NANDF_CS1, IOMUX_CONFIG_GPIO, + }, + { /*TX_ER */ + MX51_PIN_NANDF_CS2, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { + MX51_PIN_NANDF_CS3, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { /*TDATA[1] */ + MX51_PIN_NANDF_CS4, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { /*TDATA[2] */ + MX51_PIN_NANDF_CS5, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { /*TDATA[3] */ + MX51_PIN_NANDF_CS6, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { /*TX_EN */ + MX51_PIN_NANDF_CS7, IOMUX_CONFIG_ALT1, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DRV_HIGH), + }, + { /*TX_CLK */ + MX51_PIN_NANDF_RDY_INT, IOMUX_CONFIG_ALT1, + (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE), + }, + { + MX51_PIN_GPIO1_8, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_MEDIUM | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_VOT_HIGH), + }, + { + MX51_PIN_DI_GP4, IOMUX_CONFIG_ALT4, + }, + { + MX51_PIN_DISPB2_SER_DIN, IOMUX_CONFIG_GPIO, + 0, + MUX_IN_GPIO3_IPP_IND_G_IN_5_SELECT_INPUT, + INPUT_CTL_PATH1, + }, +#ifdef CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL + { /* DISP2_DAT16 */ + MX51_PIN_DISP1_DAT22, IOMUX_CONFIG_ALT5, + }, + { /* DISP2_DAT17 */ + MX51_PIN_DISP1_DAT23, IOMUX_CONFIG_ALT5, + }, + { + MX51_PIN_DI1_D1_CS, IOMUX_CONFIG_ALT4, + (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + MUX_IN_GPIO3_IPP_IND_G_IN_4_SELECT_INPUT, INPUT_CTL_PATH1, + }, +#endif + /* LVDS GPIO control */ + { + MX51_PIN_DI1_D0_CS, IOMUX_CONFIG_ALT4, + (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_CSI2_D12, IOMUX_CONFIG_ALT3, + (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_CSI2_D13, IOMUX_CONFIG_ALT3, + (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_NANDF_D12, IOMUX_CONFIG_GPIO, + 0, + }, + { + MX51_PIN_I2C1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + 0x1E4, + }, + { + MX51_PIN_I2C1_DAT, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + 0x1E4, + }, + { + MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT1, + }, + { + MX51_PIN_GPIO1_3, IOMUX_CONFIG_ALT2 | IOMUX_CONFIG_SION, + (PAD_CTL_SRE_FAST | PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE), + MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_CTL_PATH3, + }, + { + MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_CLK */ + MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_DIR */ + MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_NXT */ + MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_DATA0 */ + MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA1 */ + MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA2 */ + MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA3 */ + MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA4 */ + MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA5 */ + MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA6 */ + MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA7 */ + MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { + MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_GPIO1_0, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_GPIO1_1, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_SD2_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_GPIO1_4, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_GPIO1_5, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_GPIO1_6, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { /* Detect pin GPIO BB2.0 and BB2.5 */ + MX51_PIN_UART3_RXD, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_UART1_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH0, + }, + { + MX51_PIN_UART1_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_UART1_RTS, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH), + MUX_IN_UART1_IPP_UART_RTS_B_SELECT_INPUT, + INPUT_CTL_PATH0, + }, + { + MX51_PIN_UART1_CTS, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH), + }, + { + MX51_PIN_AUD3_BB_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_CK, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_AUD3_BB_FS, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | + PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_CSPI1_SS1, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + /* Camera on expansion board */ + { /* camera reset */ + MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { /* camera low power */ + MX51_PIN_CSI2_D19, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_LOW | + PAD_CTL_SRE_SLOW), + }, + { /* CSI1_DATA_EN need to be pulled up */ + MX51_PIN_DI_GP3, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_HSC_MIPI_MIX_IPP_IND_SENS2_DATA_EN_SELECT_INPUT, + INPUT_CTL_PATH1, + }, + { + MX51_PIN_CSI1_D10, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D11, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D12, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D13, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D14, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D15, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D16, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D17, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D18, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D19, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_SRE_SLOW), + }, + { + MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_SRE_SLOW), + }, + { + MX51_PIN_EIM_D18, IOMUX_CONFIG_GPIO, + (PAD_CTL_DRV_HIGH | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_KEEPER | PAD_CTL_100K_PU | PAD_CTL_SRE_FAST), + }, +}; + +static int __initdata enable_w1 = { 0 }; +static int __init w1_setup(char *__unused) +{ + enable_w1 = 1; + return 1; +} + +__setup("w1", w1_setup); + +void __init mx51_babbage_io_init(void) +{ + int i; + + /* Work-around For external USB HUB chip to use default configuration + by reseting hub with i2c lines pulled low */ + mxc_request_iomux(MX51_PIN_GPIO1_7, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX51_PIN_GPIO1_7, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_7), "gpio1_7"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_7), 0); + + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 1) { + /* Drive I2C1 SDA line low */ + mxc_request_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_GPIO1_3, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), "gpio1_3"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), 0); + + /* Drive I2C1 SCL line low */ + mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_GPIO1_2, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_2), "gpio1_2"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_2), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_2), 0); + + msleep(5); + mxc_free_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_ALT2); + } + + /* USB HUB RESET - De-assert USB HUB RESET_N */ + msleep(1); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_7), 0); + msleep(1); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_7), 1); + + for (i = 0; i < ARRAY_SIZE(mxc_iomux_pins); i++) { + mxc_request_iomux(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].mux_mode); + if (mxc_iomux_pins[i].pad_cfg) + mxc_iomux_set_pad(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].pad_cfg); + if (mxc_iomux_pins[i].in_select) + mxc_iomux_set_input(mxc_iomux_pins[i].in_select, + mxc_iomux_pins[i].in_mode); + } + + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8), "gpio1_8"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0), "gpio1_0"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1), "gpio1_1"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8)); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); /* SD1 CD */ + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); /* SD1 WP */ + if (board_is_rev(BOARD_REV_2)) { + /* SD2 CD for BB2.5 */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6), "gpio1_6"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); + } else { + /* SD2 CD for BB2.0 */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4), "gpio1_4"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_4)); + } + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), "gpio1_5"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5)); /* SD2 WP */ + + /* reset FEC PHY */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A20), "eim_a20"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A20), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A20), 0); + msleep(10); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A20), 1); + + /* reset FM */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), "eim_a21"); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), 0); + msleep(10); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A21), 1); + + if (cpu_is_mx51_rev(CHIP_REV_1_1) == 1) { + /* MX51_PIN_EIM_CRE - De-assert USB PHY RESETB */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), "eim_cre"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), 1); + + /* hphone_det_b */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_NANDF_CS0), "nandf_cs0"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_NANDF_CS0)); + } else { + mxc_free_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_ALT2); + mxc_free_iomux(MX51_PIN_EIM_LBA, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX51_PIN_NANDF_CS0, IOMUX_CONFIG_GPIO); + + /* i2c1 SDA */ + mxc_request_iomux(MX51_PIN_EIM_D16, + IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MUX_IN_I2C1_IPP_SDA_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX51_PIN_EIM_D16, PAD_CTL_SRE_FAST | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE); + + /* i2c1 SCL */ + mxc_request_iomux(MX51_PIN_EIM_D19, + IOMUX_CONFIG_ALT4 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MUX_IN_I2C1_IPP_SCL_IN_SELECT_INPUT, + INPUT_CTL_PATH0); + mxc_iomux_set_pad(MX51_PIN_EIM_D19, PAD_CTL_SRE_FAST | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE); + + /* i2c2 SDA */ + mxc_request_iomux(MX51_PIN_KEY_COL5, + IOMUX_CONFIG_ALT3 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT, + INPUT_CTL_PATH1); + mxc_iomux_set_pad(MX51_PIN_KEY_COL5, + PAD_CTL_SRE_FAST | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE); + + /* i2c2 SCL */ + mxc_request_iomux(MX51_PIN_KEY_COL4, + IOMUX_CONFIG_ALT3 | IOMUX_CONFIG_SION); + mxc_iomux_set_input(MUX_IN_I2C2_IPP_SCL_IN_SELECT_INPUT, + INPUT_CTL_PATH1); + mxc_iomux_set_pad(MX51_PIN_KEY_COL4, + PAD_CTL_SRE_FAST | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE); + + /* Drive 26M_OSC_EN line high */ + mxc_request_iomux(MX51_PIN_DI1_PIN12, IOMUX_CONFIG_ALT4); + mxc_iomux_set_pad(MX51_PIN_DI1_PIN12, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DI1_PIN12), "di1_pin12"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_PIN12), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_PIN12), 1); + + /* Drive USB_CLK_EN_B line low */ + mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX51_PIN_EIM_D17, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), "eim_d17"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D17), 0); + + /* MX51_PIN_EIM_D21 - De-assert USB PHY RESETB */ + mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX51_PIN_EIM_D21, PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_KEEPER | + PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D21), "eim_d21"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D21), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D21), 1); + + /* hphone_det_b */ + mxc_request_iomux(MX51_PIN_NANDF_D14, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_NANDF_D14, PAD_CTL_100K_PU); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_NANDF_D14), "nandf_d14"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_NANDF_D14)); + + /* audio_clk_en_b */ + mxc_request_iomux(MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSPI1_RDY, PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_KEEPER | + PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSPI1_RDY), "cspi1_rdy"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSPI1_RDY), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSPI1_RDY), 0); + + /* power key */ + mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT1); + mxc_iomux_set_pad(MX51_PIN_EIM_A27, PAD_CTL_SRE_FAST | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_HYS_NONE); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A27), "eim_a27"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_A27)); + } + + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) { + /* DVI_I2C_ENB = 0 tristates the DVI I2C level shifter */ + mxc_request_iomux(MX51_PIN_CSI2_HSYNC, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX51_PIN_CSI2_HSYNC, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI2_HSYNC), "csi2_hsync"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI2_HSYNC), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_HSYNC), 0); + /* TO3 doesn't need pad to drive CSI_DATA_EN[0] high */ + mxc_request_iomux(MX51_PIN_DI_GP3, IOMUX_CONFIG_ALT0); + } + + /* Deassert VGA reset to free i2c bus */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), "eim_a19"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A19), 1); + + /* LCD related gpio */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), "di1_d1_cs"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DI1_D0_CS), "di1_d0_cs"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI2_D12), "csi2_d12"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI2_D13), "csi2_d13"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_D0_CS), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI2_D12), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI2_D13), 0); + + /* Camera reset */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D23), "eim_d23"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D23), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D23), 1); + + /* Camera low power */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI2_D19), "csi2_d19"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI2_D19), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI2_D19), 0); + + /* OSC_EN */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D18), "eim_d18"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D18), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D18), 1); + + if (enable_w1) { + /* OneWire */ + mxc_request_iomux(MX51_PIN_OWIRE_LINE, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_OWIRE_LINE, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST | + PAD_CTL_100K_PU | PAD_CTL_PUE_PULL); + } else { + /* SPDIF Out */ + mxc_request_iomux(MX51_PIN_OWIRE_LINE, IOMUX_CONFIG_ALT6); + mxc_iomux_set_pad(MX51_PIN_OWIRE_LINE, PAD_CTL_DRV_HIGH | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_100K_PU | PAD_CTL_SRE_FAST); + } +} + +/* workaround for ecspi chipselect pin may not keep correct level when idle */ +void mx51_babbage_gpio_spi_chipselect_active(int cspi_mode, int status, + int chipselect) +{ + u32 gpio; + + switch (cspi_mode) { + case 1: + switch (chipselect) { + case 0x1: + mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX51_PIN_CSPI1_SS0, + PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + break; + case 0x2: + gpio = IOMUX_TO_GPIO(MX51_PIN_CSPI1_SS0); + mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_GPIO); + gpio_request(gpio, "cspi1_ss0"); + gpio_direction_output(gpio, 0); + gpio_set_value(gpio, 1 & (~status)); + break; + default: + break; + } + break; + case 2: + break; + case 3: + break; + default: + break; + } +} +EXPORT_SYMBOL(mx51_babbage_gpio_spi_chipselect_active); + +void mx51_babbage_gpio_spi_chipselect_inactive(int cspi_mode, int status, + int chipselect) +{ + switch (cspi_mode) { + case 1: + switch (chipselect) { + case 0x1: + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX51_PIN_CSPI1_SS0, + IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO); + break; + case 0x2: + mxc_free_iomux(MX51_PIN_CSPI1_SS0, IOMUX_CONFIG_GPIO); + break; + default: + break; + } + break; + case 2: + break; + case 3: + break; + default: + break; + } +} +EXPORT_SYMBOL(mx51_babbage_gpio_spi_chipselect_inactive); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_3stack_pmic_mc13892.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_3stack_pmic_mc13892.c @@ -0,0 +1,353 @@ +/* + * mx51-3stack-pmic-mc13892.c -- i.MX51 3STACK Driver for Atlas MC13892 PMIC + */ + /* + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +#define STANDBYSECINV_LSH 11 +#define STANDBYSECINV_WID 1 + +/* Coin cell charger enable */ +#define CIONCHEN_LSH 23 +#define CIONCHEN_WID 1 +/* Coin cell charger voltage setting */ +#define VCOIN_LSH 20 +#define VCOIN_WID 3 + +/* Coin Charger voltage */ +#define VCOIN_2_5V 0x0 +#define VCOIN_2_7V 0x1 +#define VCOIN_2_8V 0x2 +#define VCOIN_2_9V 0x3 +#define VCOIN_3_0V 0x4 +#define VCOIN_3_1V 0x5 +#define VCOIN_3_2V 0x6 +#define VCOIN_3_3V 0x7 + +/* Keeps VSRTC and CLK32KMCU on for all states */ +#define DRM_LSH 4 +#define DRM_WID 1 + +/* CPU */ +static struct regulator_consumer_supply sw1_consumers[] = { + { + .supply = "cpu_vcc", + } +}; + +struct mc13892; + +static struct regulator_init_data sw1_init = { + .constraints = { + .name = "SW1", + .min_uV = mV_to_uV(600), + .max_uV = mV_to_uV(1375), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .valid_modes_mask = 0, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 850000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(sw1_consumers), + .consumer_supplies = sw1_consumers, +}; + +static struct regulator_init_data sw2_init = { + .constraints = { + .name = "SW2", + .min_uV = mV_to_uV(900), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 950000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data sw3_init = { + .constraints = { + .name = "SW3", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw4_init = { + .constraints = { + .name = "SW4", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data viohi_init = { + .constraints = { + .name = "VIOHI", + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb_init = { + .constraints = { + .name = "VUSB", + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data swbst_init = { + .constraints = { + .name = "SWBST", + } +}; + +static struct regulator_init_data vdig_init = { + .constraints = { + .name = "VDIG", + .min_uV = mV_to_uV(1050), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vpll_init = { + .constraints = { + .name = "VPLL", + .min_uV = mV_to_uV(1050), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb2_init = { + .constraints = { + .name = "VUSB2", + .min_uV = mV_to_uV(2400), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vvideo_init = { + .constraints = { + .name = "VVIDEO", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vaudio_init = { + .constraints = { + .name = "VAUDIO", + .min_uV = mV_to_uV(2300), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vsd_init = { + .constraints = { + .name = "VSD", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vcam_init = { + .constraints = { + .name = "VCAM", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL, + } +}; + +static struct regulator_init_data vgen1_init = { + .constraints = { + .name = "VGEN1", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vgen2_init = { + .constraints = { + .name = "VGEN2", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + } +}; + +static struct regulator_init_data vgen3_init = { + .constraints = { + .name = "VGEN3", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(2900), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data gpo1_init = { + .constraints = { + .name = "GPO1", + } +}; + +static struct regulator_init_data gpo2_init = { + .constraints = { + .name = "GPO2", + } +}; + +static struct regulator_init_data gpo3_init = { + .constraints = { + .name = "GPO3", + } +}; + +static struct regulator_init_data gpo4_init = { + .constraints = { + .name = "GPO4", + } +}; + +/*! + * the event handler for power on event + */ +static void power_on_evt_handler(void) +{ + pr_info("pwr on event1 is received \n"); +} + +static int mc13892_regulator_init(struct mc13892 *mc13892) +{ + unsigned int value; + pmic_event_callback_t power_key_event; + int register_mask; + + printk("Initializing regulators for 3-stack.\n"); + if (mxc_cpu_is_rev(CHIP_REV_2_0) < 0) + sw2_init.constraints.state_mem.uV = 1100000; + else if (mxc_cpu_is_rev(CHIP_REV_2_0) == 1) { + sw2_init.constraints.state_mem.uV = 1250000; + sw1_init.constraints.state_mem.uV = 1000000; + } + + /* subscribe PWRON1 event to enable ON_OFF key */ + power_key_event.param = NULL; + power_key_event.func = (void *)power_on_evt_handler; + pmic_event_subscribe(EVENT_PWRONI, power_key_event); + + /* Bit 4 DRM: keep VSRTC and CLK32KMCU on for all states */ +#if defined(CONFIG_RTC_DRV_MXC_V2) || defined(CONFIG_RTC_DRV_MXC_V2_MODULE) + value = BITFVAL(DRM, 1); + register_mask = BITFMASK(DRM); + pmic_write_reg(REG_POWER_CTL0, value, register_mask); +#endif + /* Set the STANDBYSECINV bit, so that STANDBY pin is + * interpreted as active low. + */ + value = BITFVAL(STANDBYSECINV, 1); + register_mask = BITFMASK(STANDBYSECINV); + pmic_write_reg(REG_POWER_CTL2, value, register_mask); + + /* Enable coin cell charger */ + value = BITFVAL(CIONCHEN, 1) | BITFVAL(VCOIN, VCOIN_3_0V); + register_mask = BITFMASK(CIONCHEN) | BITFMASK(VCOIN); + pmic_write_reg(REG_POWER_CTL0, value, register_mask); + + mc13892_register_regulator(mc13892, MC13892_SW1, &sw1_init); + mc13892_register_regulator(mc13892, MC13892_SW2, &sw2_init); + mc13892_register_regulator(mc13892, MC13892_SW3, &sw3_init); + mc13892_register_regulator(mc13892, MC13892_SW4, &sw4_init); + mc13892_register_regulator(mc13892, MC13892_SWBST, &swbst_init); + mc13892_register_regulator(mc13892, MC13892_VIOHI, &viohi_init); + mc13892_register_regulator(mc13892, MC13892_VPLL, &vpll_init); + mc13892_register_regulator(mc13892, MC13892_VDIG, &vdig_init); + mc13892_register_regulator(mc13892, MC13892_VSD, &vsd_init); + mc13892_register_regulator(mc13892, MC13892_VUSB2, &vusb2_init); + mc13892_register_regulator(mc13892, MC13892_VVIDEO, &vvideo_init); + mc13892_register_regulator(mc13892, MC13892_VAUDIO, &vaudio_init); + mc13892_register_regulator(mc13892, MC13892_VCAM, &vcam_init); + mc13892_register_regulator(mc13892, MC13892_VGEN1, &vgen1_init); + mc13892_register_regulator(mc13892, MC13892_VGEN2, &vgen2_init); + mc13892_register_regulator(mc13892, MC13892_VGEN3, &vgen3_init); + mc13892_register_regulator(mc13892, MC13892_VUSB, &vusb_init); + mc13892_register_regulator(mc13892, MC13892_GPO1, &gpo1_init); + mc13892_register_regulator(mc13892, MC13892_GPO2, &gpo2_init); + mc13892_register_regulator(mc13892, MC13892_GPO3, &gpo3_init); + mc13892_register_regulator(mc13892, MC13892_GPO4, &gpo4_init); + + return 0; +} + +static struct mc13892_platform_data mc13892_plat = { + .init = mc13892_regulator_init, +}; + +static struct i2c_board_info __initdata mc13892_i2c_device = { + I2C_BOARD_INFO("mc13892", 0x08), + .irq = IOMUX_TO_IRQ(MX51_PIN_GPIO1_5), + .platform_data = &mc13892_plat, +}; + +int __init mx51_3stack_init_mc13892(void) +{ + return i2c_register_board_info(1, &mc13892_i2c_device, 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/dummy_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/dummy_gpio.c @@ -0,0 +1,113 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include + +void gpio_uart_active(int port, int no_irda) {} +EXPORT_SYMBOL(gpio_uart_active); + +void gpio_uart_inactive(int port, int no_irda) {} +EXPORT_SYMBOL(gpio_uart_inactive); + +void gpio_gps_active(void) {} +EXPORT_SYMBOL(gpio_gps_active); + +void gpio_gps_inactive(void) {} +EXPORT_SYMBOL(gpio_gps_inactive); + +void config_uartdma_event(int port) {} +EXPORT_SYMBOL(config_uartdma_event); + +void gpio_spi_active(int cspi_mod) {} +EXPORT_SYMBOL(gpio_spi_active); + +void gpio_spi_inactive(int cspi_mod) {} +EXPORT_SYMBOL(gpio_spi_inactive); + +void gpio_owire_active(void) {} +EXPORT_SYMBOL(gpio_owire_active); + +void gpio_owire_inactive(void) {} +EXPORT_SYMBOL(gpio_owire_inactive); + +void gpio_i2c_active(int i2c_num) {} +EXPORT_SYMBOL(gpio_i2c_active); + +void gpio_i2c_inactive(int i2c_num) {} +EXPORT_SYMBOL(gpio_i2c_inactive); + +void gpio_i2c_hs_active(void) {} +EXPORT_SYMBOL(gpio_i2c_hs_active); + +void gpio_i2c_hs_inactive(void) {} +EXPORT_SYMBOL(gpio_i2c_hs_inactive); + +void gpio_pmic_active(void) {} +EXPORT_SYMBOL(gpio_pmic_active); + +void gpio_activate_audio_ports(void) {} +EXPORT_SYMBOL(gpio_activate_audio_ports); + +void gpio_sdhc_active(int module) {} +EXPORT_SYMBOL(gpio_sdhc_active); + +void gpio_sdhc_inactive(int module) {} +EXPORT_SYMBOL(gpio_sdhc_inactive); + +void gpio_sensor_select(int sensor) {} + +void gpio_sensor_active(unsigned int csi) {} +EXPORT_SYMBOL(gpio_sensor_active); + +void gpio_sensor_inactive(unsigned int csi) {} +EXPORT_SYMBOL(gpio_sensor_inactive); + +void gpio_ata_active(void) {} +EXPORT_SYMBOL(gpio_ata_active); + +void gpio_ata_inactive(void) {} +EXPORT_SYMBOL(gpio_ata_inactive); + +void gpio_nand_active(void) {} +EXPORT_SYMBOL(gpio_nand_active); + +void gpio_nand_inactive(void) {} +EXPORT_SYMBOL(gpio_nand_inactive); + +void gpio_keypad_active(void) {} +EXPORT_SYMBOL(gpio_keypad_active); + +void gpio_keypad_inactive(void) {} +EXPORT_SYMBOL(gpio_keypad_inactive); + +int gpio_usbotg_hs_active(void) +{ + return 0; +} +EXPORT_SYMBOL(gpio_usbotg_hs_active); + +void gpio_usbotg_hs_inactive(void) {} +EXPORT_SYMBOL(gpio_usbotg_hs_inactive); + +void gpio_fec_active(void) {} +EXPORT_SYMBOL(gpio_fec_active); + +void gpio_fec_inactive(void) {} +EXPORT_SYMBOL(gpio_fec_inactive); + +void gpio_spdif_active(void) {} +EXPORT_SYMBOL(gpio_spdif_active); + +void gpio_spdif_inactive(void) {} +EXPORT_SYMBOL(gpio_spdif_inactive); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/board-mx51_3stack.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/board-mx51_3stack.h @@ -0,0 +1,125 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX51_3STACK_H__ +#define __ASM_ARCH_MXC_BOARD_MX51_3STACK_H__ + +/*! + * @defgroup BRDCFG_MX51 Board Configuration Options + * @ingroup MSL_MX51 + */ + +/*! + * @file mach-mx51/board-mx51_3stack.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX51 3Stack Platform. + * + * @ingroup BRDCFG_MX51 + */ + +/* + * Include Files + */ +#include + +/*! + * @name MXC UART board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR NO_IRDA +#define UART2_ENABLED 1 +/* UART 3 configuration */ +#define UART3_MODE MODE_DCE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +#define DEBUG_BOARD_BASE_ADDRESS(n) (n) +/* LAN9217 ethernet base address */ +#define LAN9217_BASE_ADDR(n) (DEBUG_BOARD_BASE_ADDRESS(n)) +/* External UART */ +#define UARTA_BASE_ADDR(n) (DEBUG_BOARD_BASE_ADDRESS(n) + 0x8000) +#define UARTB_BASE_ADDR(n) (DEBUG_BOARD_BASE_ADDRESS(n) + 0x10000) + +#define BOARD_IO_ADDR(n) (DEBUG_BOARD_BASE_ADDRESS(n) + 0x20000) +/* LED switchs */ +#define LED_SWITCH_REG 0x00 +/* buttons */ +#define SWITCH_BUTTONS_REG 0x08 +/* status, interrupt */ +#define INTR_STATUS_REG 0x10 +#define INTR_MASK_REG 0x38 +#define INTR_RESET_REG 0x20 +/* magic word for debug CPLD */ +#define MAGIC_NUMBER1_REG 0x40 +#define MAGIC_NUMBER2_REG 0x48 +/* CPLD code version */ +#define CPLD_CODE_VER_REG 0x50 +/* magic word for debug CPLD */ +#define MAGIC_NUMBER3_REG 0x58 +/* module reset register*/ +#define MODULE_RESET_REG 0x60 +/* CPU ID and Personality ID */ +#define MCU_BOARD_ID_REG 0x68 + +/* interrupts like external uart , external ethernet etc*/ +#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX51_PIN_GPIO1_6) + +#define EXPIO_INT_ENET (MXC_BOARD_IRQ_START + 0) +#define EXPIO_INT_XUART_A (MXC_BOARD_IRQ_START + 1) +#define EXPIO_INT_XUART_B (MXC_BOARD_IRQ_START + 2) +#define EXPIO_INT_BUTTON_A (MXC_BOARD_IRQ_START + 3) +#define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4) + +/*! This is System IRQ used by LAN9217 */ +#define LAN9217_IRQ EXPIO_INT_ENET + +extern int __init mx51_3stack_init_mc13892(void); + +#endif /* __ASM_ARCH_MXC_BOARD_MX51_3STACK_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/usb.h @@ -0,0 +1,112 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbotg_hs_active(void); +extern void gpio_usbotg_hs_inactive(void); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, struct fsl_usb2_platform_data *config); + +extern int fsl_usb_host_init(struct platform_device *pdev); +extern void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbotg_utmi_active(void); +extern void gpio_usbotg_utmi_inactive(void); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +#if defined(CONFIG_ISP1301_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_1301_config; +#define PDATA (&dr_1301_config) +#elif defined(CONFIG_MC13783_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_13783_config; +#define PDATA (&dr_13783_config) +#elif defined(CONFIG_UTMI_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config; +#define PDATA (&dr_utmi_config) +#endif + + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/lpmodes.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/lpmodes.c @@ -0,0 +1,309 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mx51_lpmodes.c + * + * @brief Driver for the Freescale Semiconductor MXC low power modes setup. + * + * MX51 is designed to play and video with minimal power consumption. + * This driver enables the platform to enter and exit audio and video low + * power modes. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +#define ARM_LP_CLK 166250000 +#define GP_LPM_VOLTAGE 775000 +#define GP_NORMAL_VOLTAGE 1050000 + +static int org_cpu_rate; +int lp_video_mode; +int lp_audio_mode; +static struct device *lpmode_dev; +struct regulator *gp_core; + +void enter_lp_video_mode(void) +{ +} + +void exit_lp_video_mode(void) +{ +} + +void enter_lp_audio_mode(void) +{ + struct clk *tclk; + int ret; + + struct clk *p_clk; + struct clk *amode_parent_clk; + + + tclk = clk_get(NULL, "ipu_clk"); + if (clk_get_usecount(tclk) != 0) { + printk(KERN_INFO + "Cannot enter AUDIO LPM mode - display is still active\n"); + return; + } + + tclk = clk_get(NULL, "cpu_clk"); + org_cpu_rate = clk_get_rate(tclk); + +#ifdef CHANGE_DDR2_TO_PLL2 + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "axi_a_clk")); + + /* Set CPU clock to be derived from PLL2 instead of PLL1 */ + tclk = clk_get(NULL, "pll1_sw_clk"); + clk_set_parent(tclk, clk_get(NULL, "pll2")); + clk_enable(tclk); + + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "ddr_hf_clk")); +#endif + + /*Change the DDR freq to 133Mhz. */ + tclk = clk_get(NULL, "ddr_hf_clk"); + clk_set_rate(tclk, clk_round_rate(tclk, 133000000)); + + tclk = clk_get(NULL, "cpu_clk"); + ret = clk_set_rate(tclk, ARM_LP_CLK); + if (ret != 0) + printk(KERN_DEBUG "cannot set CPU clock rate\n"); + clk_put(tclk); + /* Set the voltage to 0.775v for the GP domain. */ + ret = regulator_set_voltage(gp_core, GP_LPM_VOLTAGE, GP_LPM_VOLTAGE); + if (ret < 0) + printk(KERN_DEBUG "COULD NOT SET GP VOLTAGE!!!\n"); + + tclk = clk_get(NULL, "periph_apm_clk"); + amode_parent_clk = clk_get(NULL, "lp_apm"); + p_clk = clk_get_parent(tclk); + /* Make sure osc_clk is the parent of lp_apm. */ + clk_set_parent(amode_parent_clk, clk_get(NULL, "osc")); + /* Set the parent of periph_apm_clk to be lp_apm */ + clk_set_parent(tclk, amode_parent_clk); + + amode_parent_clk = tclk; + + tclk = clk_get(NULL, "main_bus_clk"); + p_clk = clk_get_parent(tclk); + /* Set the parent of main_bus_clk to be periph_apm_clk */ + clk_set_parent(tclk, amode_parent_clk); + + clk_set_rate(clk_get(NULL, "axi_a_clk"), 24000000); + clk_set_rate(clk_get(NULL, "axi_b_clk"), 24000000); + clk_set_rate(clk_get(NULL, "ahb_clk"), 24000000); + clk_set_rate(clk_get(NULL, "emi_slow_clk"), 24000000); + clk_set_rate(clk_get(NULL, "nfc_clk"), 12000000); + + /* disable PLL3 */ + tclk = clk_get(NULL, "pll3"); + if (tclk->usecount == 1) + clk_disable(tclk); + + /* disable PLL2 */ + tclk = clk_get(NULL, "pll2"); + if (tclk->usecount == 1) + clk_disable(tclk); + + /* disable PLL1 */ + tclk = clk_get(NULL, "pll1_main_clk"); + if (tclk->usecount == 1) + clk_disable(tclk); + + lp_audio_mode = 1; +} + +void exit_lp_audio_mode(void) +{ + struct clk *tclk; + struct clk *p_clk; + struct clk *rmode_parent_clk; + int ret; + + /* Set the voltage to 1.05v for the GP domain. */ + ret = regulator_set_voltage(gp_core, + GP_NORMAL_VOLTAGE, GP_NORMAL_VOLTAGE); + if (ret < 0) + printk(KERN_DEBUG "COULD NOT SET GP VOLTAGE!!!\n"); + + rmode_parent_clk = clk_get(NULL, "pll2"); + clk_enable(rmode_parent_clk); + + tclk = clk_get(NULL, "main_bus_clk"); + p_clk = clk_get_parent(tclk); + + /* Set the dividers before setting the parent clock. */ + clk_set_rate(clk_get(NULL, "axi_a_clk"), 6000000); + clk_set_rate(clk_get(NULL, "axi_b_clk"), 4800000); + clk_set_rate(clk_get(NULL, "ahb_clk"), 4800000); + clk_set_rate(clk_get(NULL, "emi_slow_clk"), 4800000); + clk_set_rate(clk_get(NULL, "nfc_clk"), 1200000); + /* Set the parent of main_bus_clk to be pll2 */ + clk_set_parent(tclk, rmode_parent_clk); + +#ifdef CHANGE_DDR2_TO_PLL2 + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "axi_a_clk")); + + /* Set CPU clock to be derived from PLL1 instead of PLL2 */ + tclk = clk_get(NULL, "pll1_sw_clk"); + clk_set_parent(tclk, clk_get(NULL, "pll1_main_clk")); + clk_disable(tclk); + + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "ddr_hf_clk")); +#endif + + tclk = clk_get(NULL, "cpu_clk"); + ret = clk_set_rate(tclk, org_cpu_rate); + if (ret != 0) + printk(KERN_DEBUG "cannot set CPU clock rate\n"); + clk_put(tclk); + + tclk = clk_get(NULL, "cpu_clk"); + + ret = clk_set_rate(tclk, org_cpu_rate); + if (ret != 0) + printk(KERN_DEBUG "cannot set CPU clock rate\n"); + + + /*Change the DDR freq to 200MHz*/ + tclk = clk_get(NULL, "ddr_hf_clk"); + clk_set_rate(tclk, clk_round_rate(tclk, 200000000)); + lp_audio_mode = 0; + +} + +static ssize_t lp_curr_mode(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (lp_video_mode) + return sprintf(buf, "in lp_video_mode\n"); + else if (lp_audio_mode) + return sprintf(buf, "in lp_audio_mode\n"); + else + return sprintf(buf, "in normal mode\n"); +} + +static ssize_t set_lp_mode(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + printk(KERN_DEBUG "In set_lp_mode() \n"); + + if (strstr(buf, "enable_lp_video") != NULL) { + if (!lp_video_mode) + enter_lp_video_mode(); + } else if (strstr(buf, "disable_lp_video") != NULL) { + if (lp_video_mode) + exit_lp_video_mode(); + } else if (strstr(buf, "enable_lp_audio") != NULL) { + if (!lp_audio_mode) + enter_lp_audio_mode(); + } else if (strstr(buf, "disable_lp_audio") != NULL) { + if (lp_audio_mode) + exit_lp_audio_mode(); + } + return size; +} + +static DEVICE_ATTR(lp_modes, 0644, lp_curr_mode, set_lp_mode); + +/*! + * This is the probe routine for the lp_mode driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit mx51_lpmode_probe(struct platform_device *pdev) +{ + u32 res = 0; + lpmode_dev = &pdev->dev; + + res = sysfs_create_file(&lpmode_dev->kobj, &dev_attr_lp_modes.attr); + if (res) { + printk(KERN_ERR + "lpmode_dev: Unable to register sysdev entry for lpmode_dev"); + return res; + } + + if (res != 0) { + printk(KERN_ERR "lpmode_dev: Unable to start"); + return res; + } + gp_core = regulator_get(NULL, "SW1"); + lp_video_mode = 0; + lp_audio_mode = 0; + + return 0; +} + +static struct platform_driver mx51_lpmode_driver = { + .driver = { + .name = "mx51_lpmode", + }, + .probe = mx51_lpmode_probe, +}; + +/*! + * Initialise the mx51_lpmode_driver. + * + * @return The function always returns 0. + */ + +static int __init lpmode_init(void) +{ + if (platform_driver_register(&mx51_lpmode_driver) != 0) { + printk(KERN_ERR "mx37_lpmode_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "LPMode driver module loaded\n"); + return 0; +} + +static void __exit lpmode_cleanup(void) +{ + sysfs_remove_file(&lpmode_dev->kobj, &dev_attr_lp_modes.attr); + + /* Unregister the device structure */ + platform_driver_unregister(&mx51_lpmode_driver); +} + +module_init(lpmode_init); +module_exit(lpmode_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("LPMode driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/pm.c @@ -0,0 +1,221 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +static struct cpu_wp *cpu_wp_tbl; +static struct clk *cpu_clk; + +#if defined(CONFIG_CPU_FREQ) +static int org_freq; +extern int cpufreq_suspended; +extern int set_cpu_freq(int wp); +#endif + + +static struct device *pm_dev; +struct clk *gpc_dvfs_clk; +extern void cpu_do_suspend_workaround(u32 sdclk_iomux_addr); +extern void cpu_cortexa8_do_idle(void *); +extern struct cpu_wp *(*get_cpu_wp)(int *wp); + +extern int iram_ready; +void *suspend_iram_base; +void (*suspend_in_iram)(void *sdclk_iomux_addr) = NULL; + +static int mx51_suspend_enter(suspend_state_t state) +{ + void __iomem *sdclk_iomux_addr = IO_ADDRESS(IOMUXC_BASE_ADDR + 0x4b8); + + if (gpc_dvfs_clk == NULL) + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs_clk"); + /* gpc clock is needed for SRPG */ + clk_enable(gpc_dvfs_clk); + switch (state) { + case PM_SUSPEND_MEM: + mxc_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mxc_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + break; + default: + return -EINVAL; + } + + if (tzic_enable_wake(0) != 0) + return -EAGAIN; + + if (state == PM_SUSPEND_MEM) { + local_flush_tlb_all(); + flush_cache_all(); + + /* Run the suspend code from iRAM. */ + suspend_in_iram(sdclk_iomux_addr); + + /*clear the EMPGC0/1 bits */ + __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR); + __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); + } else { + if ((mxc_cpu_is_rev(CHIP_REV_2_0)) < 0) { + /* do cpu_idle_workaround */ + u32 l2_iram_addr = IDLE_IRAM_BASE_ADDR; + if (!iram_ready) + return 0; + if (l2_iram_addr > 0x1FFE8000) + cpu_cortexa8_do_idle(IO_ADDRESS(l2_iram_addr)); + } else { + cpu_do_idle(); + } + } + clk_disable(gpc_dvfs_clk); + + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int mx51_suspend_prepare(void) +{ +#if defined(CONFIG_CPU_FREQ) + struct cpufreq_freqs freqs; + org_freq = clk_get_rate(cpu_clk); + freqs.old = org_freq / 1000; + freqs.new = cpu_wp_tbl[0].cpu_rate / 1000; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_suspended = 1; + if (clk_get_rate(cpu_clk) != cpu_wp_tbl[0].cpu_rate) { + set_cpu_freq(cpu_wp_tbl[0].cpu_rate); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } +#endif + return 0; +} + +/* + * Called before devices are re-setup. + */ +static void mx51_suspend_finish(void) +{ +#if defined(CONFIG_CPU_FREQ) + struct cpufreq_freqs freqs; + + freqs.old = clk_get_rate(cpu_clk) / 1000; + freqs.new = org_freq / 1000; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_suspended = 0; + + if (org_freq != clk_get_rate(cpu_clk)) { + set_cpu_freq(org_freq); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } +#endif +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static void mx51_suspend_end(void) +{ +} + +static int mx51_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +struct platform_suspend_ops mx51_suspend_ops = { + .valid = mx51_pm_valid, + .prepare = mx51_suspend_prepare, + .enter = mx51_suspend_enter, + .finish = mx51_suspend_finish, + .end = mx51_suspend_end, +}; + + +static int __devinit mx51_pm_probe(struct platform_device *pdev) +{ + pm_dev = &pdev->dev; + return 0; +} + +static struct platform_driver mx51_pm_driver = { + .driver = { + .name = "mx51_pm", + }, + .probe = mx51_pm_probe, +}; + +static int __init pm_init(void) +{ + int cpu_wp_nr; + + pr_info("Static Power Management for Freescale i.MX51\n"); + if (platform_driver_register(&mx51_pm_driver) != 0) { + printk(KERN_ERR "mx51_pm_driver register failed\n"); + return -ENODEV; + } + suspend_set_ops(&mx51_suspend_ops); + /* Move suspend routine into iRAM */ + suspend_iram_base = IO_ADDRESS(SUSPEND_IRAM_BASE_ADDR); + memcpy(suspend_iram_base, cpu_do_suspend_workaround, SZ_4K); + /* Need to remap the area here since we want the memory region + to be executable. */ + suspend_iram_base = __arm_ioremap(SUSPEND_IRAM_BASE_ADDR, SZ_4K, + MT_HIGH_VECTORS); + suspend_in_iram = (void *)suspend_iram_base; + + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + + cpu_clk = clk_get(NULL, "cpu_clk"); + if (IS_ERR(cpu_clk)) { + printk(KERN_DEBUG "%s: failed to get cpu_clk\n", __func__); + return PTR_ERR(cpu_clk); + } + printk(KERN_INFO "PM driver module loaded\n"); + + return 0; +} + + +static void __exit pm_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&mx51_pm_driver); +} + +module_init(pm_init); +module_exit(pm_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("PM driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/cpu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/cpu.c @@ -0,0 +1,66 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file mach-mx51/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX51 + */ + +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + if (!system_rev) + mxc_set_system_rev(0x51, CHIP_REV_1_0); +} + +static int __init post_cpu_init(void) +{ + void __iomem *base; + unsigned int reg; + + /* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */ + reg = 0x8; + __raw_writel(reg, MXC_CORTEXA8_PLAT_AMC); + + base = IO_ADDRESS(AIPS1_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + base = IO_ADDRESS(AIPS2_BASE_ADDR); + __raw_writel(0x0, base + 0x40); + __raw_writel(0x0, base + 0x44); + __raw_writel(0x0, base + 0x48); + __raw_writel(0x0, base + 0x4C); + reg = __raw_readl(base + 0x50) & 0x00FFFFFF; + __raw_writel(reg, base + 0x50); + + return 0; +} + +postcore_initcall(post_cpu_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_babbage_pmic_mc13892.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_babbage_pmic_mc13892.c @@ -0,0 +1,424 @@ +/* + * mx51-babbage-pmic-mc13892.c -- i.MX51 Babbage Driver for Atlas MC13892 PMIC + */ + /* + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + + /* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/* + * Convenience conversion. + * Here atm, maybe there is somewhere better for this. + */ +#define mV_to_uV(mV) (mV * 1000) +#define uV_to_mV(uV) (uV / 1000) +#define V_to_uV(V) (mV_to_uV(V * 1000)) +#define uV_to_V(uV) (uV_to_mV(uV) / 1000) + +/* Coin cell charger enable */ +#define CIONCHEN_LSH 23 +#define CIONCHEN_WID 1 +/* Coin cell charger voltage setting */ +#define VCOIN_LSH 20 +#define VCOIN_WID 3 + +/* Coin Charger voltage */ +#define VCOIN_2_5V 0x0 +#define VCOIN_2_7V 0x1 +#define VCOIN_2_8V 0x2 +#define VCOIN_2_9V 0x3 +#define VCOIN_3_0V 0x4 +#define VCOIN_3_1V 0x5 +#define VCOIN_3_2V 0x6 +#define VCOIN_3_3V 0x7 + +/* Keeps VSRTC and CLK32KMCU on for all states */ +#define DRM_LSH 4 +#define DRM_WID 1 + +/* regulator standby mask */ +#define GEN1_STBY_MASK (1 << 1) +#define IOHI_STBY_MASK (1 << 4) +#define DIG_STBY_MASK (1 << 10) +#define GEN2_STBY_MASK (1 << 13) +#define PLL_STBY_MASK (1 << 16) +#define USB2_STBY_MASK (1 << 19) + +#define GEN3_STBY_MASK (1 << 1) +#define CAM_STBY_MASK (1 << 7) +#define VIDEO_STBY_MASK (1 << 13) +#define AUDIO_STBY_MASK (1 << 16) +#define SD_STBY_MASK (1 << 19) + +/* 0x92412 */ +#define REG_MODE_0_ALL_MASK (GEN1_STBY_MASK |\ + DIG_STBY_MASK | GEN2_STBY_MASK |\ + PLL_STBY_MASK) +/* 0x92082 */ +#define REG_MODE_1_ALL_MASK (CAM_STBY_MASK | VIDEO_STBY_MASK |\ + AUDIO_STBY_MASK | SD_STBY_MASK) + +/* switch mode setting */ +#define SW1MODE_LSB 0 +#define SW2MODE_LSB 10 +#define SW3MODE_LSB 0 +#define SW4MODE_LSB 8 + +#define SWMODE_MASK 0xF +#define SWMODE_AUTO 0x8 + +/* CPU */ +static struct regulator_consumer_supply sw1_consumers[] = { + { + .supply = "cpu_vcc", + } +}; + +static struct regulator_consumer_supply vdig_consumers[] = { + { + /* sgtl5000 */ + .supply = "VDDA", + .dev_name = "1-000a", + }, + { + /* sgtl5000 */ + .supply = "VDDD", + .dev_name = "1-000a", + }, +}; + +static struct regulator_consumer_supply vvideo_consumers[] = { + { + /* sgtl5000 */ + .supply = "VDDIO", + .dev_name = "1-000a", + }, +}; + +struct mc13892; + +static struct regulator_init_data sw1_init = { + .constraints = { + .name = "SW1", + .min_uV = mV_to_uV(600), + .max_uV = mV_to_uV(1375), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .valid_modes_mask = 0, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 850000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + }, + .num_consumer_supplies = ARRAY_SIZE(sw1_consumers), + .consumer_supplies = sw1_consumers, +}; + +static struct regulator_init_data sw2_init = { + .constraints = { + .name = "SW2", + .min_uV = mV_to_uV(900), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + .state_mem = { + .uV = 950000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + } +}; + +static struct regulator_init_data sw3_init = { + .constraints = { + .name = "SW3", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data sw4_init = { + .constraints = { + .name = "SW4", + .min_uV = mV_to_uV(1100), + .max_uV = mV_to_uV(1850), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data viohi_init = { + .constraints = { + .name = "VIOHI", + .always_on = 1, + .boot_on = 1, + } +}; + +static struct regulator_init_data vusb_init = { + .constraints = { + .name = "VUSB", + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data swbst_init = { + .constraints = { + .name = "SWBST", + } +}; + +static struct regulator_init_data vdig_init = { + .constraints = { + .name = "VDIG", + .min_uV = mV_to_uV(1650), + .max_uV = mV_to_uV(1650), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(vdig_consumers), + .consumer_supplies = vdig_consumers, +}; + +static struct regulator_init_data vpll_init = { + .constraints = { + .name = "VPLL", + .min_uV = mV_to_uV(1050), + .max_uV = mV_to_uV(1800), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data vusb2_init = { + .constraints = { + .name = "VUSB2", + .min_uV = mV_to_uV(2400), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .boot_on = 1, + .always_on = 1, + } +}; + +static struct regulator_init_data vvideo_init = { + .constraints = { + .name = "VVIDEO", + .min_uV = mV_to_uV(2775), + .max_uV = mV_to_uV(2775), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .apply_uV =1, + }, + .num_consumer_supplies = ARRAY_SIZE(vvideo_consumers), + .consumer_supplies = vvideo_consumers, +}; + +static struct regulator_init_data vaudio_init = { + .constraints = { + .name = "VAUDIO", + .min_uV = mV_to_uV(2300), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vsd_init = { + .constraints = { + .name = "VSD", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vcam_init = { + .constraints = { + .name = "VCAM", + .min_uV = mV_to_uV(2500), + .max_uV = mV_to_uV(3000), + .valid_ops_mask = + REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL, + } +}; + +static struct regulator_init_data vgen1_init = { + .constraints = { + .name = "VGEN1", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(1200), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + } +}; + +static struct regulator_init_data vgen2_init = { + .constraints = { + .name = "VGEN2", + .min_uV = mV_to_uV(1200), + .max_uV = mV_to_uV(3150), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + } +}; + +static struct regulator_init_data vgen3_init = { + .constraints = { + .name = "VGEN3", + .min_uV = mV_to_uV(1800), + .max_uV = mV_to_uV(2900), + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + .always_on = 1, + } +}; + +static struct regulator_init_data gpo1_init = { + .constraints = { + .name = "GPO1", + } +}; + +static struct regulator_init_data gpo2_init = { + .constraints = { + .name = "GPO2", + } +}; + +static struct regulator_init_data gpo3_init = { + .constraints = { + .name = "GPO3", + } +}; + +static struct regulator_init_data gpo4_init = { + .constraints = { + .name = "GPO4", + } +}; + +static int mc13892_regulator_init(struct mc13892 *mc13892) +{ + unsigned int value, register_mask; + printk("Initializing regulators for Babbage.\n"); + if (mxc_cpu_is_rev(CHIP_REV_2_0) < 0) + sw2_init.constraints.state_mem.uV = 1100000; + else if (mxc_cpu_is_rev(CHIP_REV_2_0) == 1) { + sw2_init.constraints.state_mem.uV = 1250000; + sw1_init.constraints.state_mem.uV = 1000000; + } + + /* enable standby controll for all regulators */ + pmic_read_reg(REG_MODE_0, &value, 0xffffff); + value |= REG_MODE_0_ALL_MASK; + pmic_write_reg(REG_MODE_0, value, 0xffffff); + + pmic_read_reg(REG_MODE_1, &value, 0xffffff); + value |= REG_MODE_1_ALL_MASK; + pmic_write_reg(REG_MODE_1, value, 0xffffff); + + /* enable switch audo mode */ + pmic_read_reg(REG_IDENTIFICATION, &value, 0xffffff); + /* only for mc13892 2.0A */ + if ((value & 0x0000FFFF) == 0x45d0) { + pmic_read_reg(REG_SW_4, &value, 0xffffff); + register_mask = (SWMODE_MASK << SW1MODE_LSB) | + (SWMODE_MASK << SW2MODE_LSB); + value &= ~register_mask; + value |= (SWMODE_AUTO << SW1MODE_LSB) | + (SWMODE_AUTO << SW2MODE_LSB); + pmic_write_reg(REG_SW_4, value, 0xffffff); + + pmic_read_reg(REG_SW_5, &value, 0xffffff); + register_mask = (SWMODE_MASK << SW3MODE_LSB) | + (SWMODE_MASK << SW4MODE_LSB); + value &= ~register_mask; + value |= (SWMODE_AUTO << SW3MODE_LSB) | + (SWMODE_AUTO << SW4MODE_LSB); + pmic_write_reg(REG_SW_5, value, 0xffffff); + } + + /* Enable coin cell charger */ + value = BITFVAL(CIONCHEN, 1) | BITFVAL(VCOIN, VCOIN_3_0V); + register_mask = BITFMASK(CIONCHEN) | BITFMASK(VCOIN); + pmic_write_reg(REG_POWER_CTL0, value, register_mask); + +#if defined(CONFIG_RTC_DRV_MXC_V2) || defined(CONFIG_RTC_DRV_MXC_V2_MODULE) + value = BITFVAL(DRM, 1); + register_mask = BITFMASK(DRM); + pmic_write_reg(REG_POWER_CTL0, value, register_mask); +#endif + + mc13892_register_regulator(mc13892, MC13892_SW1, &sw1_init); + mc13892_register_regulator(mc13892, MC13892_SW2, &sw2_init); + mc13892_register_regulator(mc13892, MC13892_SW3, &sw3_init); + mc13892_register_regulator(mc13892, MC13892_SW4, &sw4_init); + mc13892_register_regulator(mc13892, MC13892_SWBST, &swbst_init); + mc13892_register_regulator(mc13892, MC13892_VIOHI, &viohi_init); + mc13892_register_regulator(mc13892, MC13892_VPLL, &vpll_init); + mc13892_register_regulator(mc13892, MC13892_VDIG, &vdig_init); + mc13892_register_regulator(mc13892, MC13892_VSD, &vsd_init); + mc13892_register_regulator(mc13892, MC13892_VUSB2, &vusb2_init); + mc13892_register_regulator(mc13892, MC13892_VVIDEO, &vvideo_init); + mc13892_register_regulator(mc13892, MC13892_VAUDIO, &vaudio_init); + mc13892_register_regulator(mc13892, MC13892_VCAM, &vcam_init); + mc13892_register_regulator(mc13892, MC13892_VGEN1, &vgen1_init); + mc13892_register_regulator(mc13892, MC13892_VGEN2, &vgen2_init); + mc13892_register_regulator(mc13892, MC13892_VGEN3, &vgen3_init); + mc13892_register_regulator(mc13892, MC13892_VUSB, &vusb_init); + mc13892_register_regulator(mc13892, MC13892_GPO1, &gpo1_init); + mc13892_register_regulator(mc13892, MC13892_GPO2, &gpo2_init); + mc13892_register_regulator(mc13892, MC13892_GPO3, &gpo3_init); + mc13892_register_regulator(mc13892, MC13892_GPO4, &gpo4_init); + + regulator_has_full_constraints(); + + return 0; +} + +static struct mc13892_platform_data mc13892_plat = { + .init = mc13892_regulator_init, +}; + +static struct spi_board_info __initdata mc13892_spi_device = { + .modalias = "pmic_spi", + .irq = IOMUX_TO_IRQ(MX51_PIN_GPIO1_8), + .max_speed_hz = 1000000, /* max spi SCK clock speed in HZ */ + .bus_num = 1, + .chip_select = 0, + .platform_data = &mc13892_plat, +}; + + +int __init mx51_babbage_init_mc13892(void) +{ + return spi_register_board_info(&mc13892_spi_device, 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mm.c @@ -0,0 +1,84 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +/*! + * @file mach-mx51/mm.c + * + * @brief This file creates static mapping between physical to virtual memory. + * + * @ingroup Memory_MX51 + */ + +/*! + * This structure defines the MX51 memory map. + */ +static struct map_desc mx51_io_desc[] __initdata = { + { + .virtual = IRAM_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(IRAM_BASE_ADDR), + .length = IRAM_SIZE, + .type = MT_DEVICE}, + { + .virtual = DEBUG_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(DEBUG_BASE_ADDR), + .length = DEBUG_SIZE, + .type = MT_DEVICE}, + { + .virtual = TZIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(TZIC_BASE_ADDR), + .length = TZIC_SIZE, + .type = MT_DEVICE}, + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE}, + { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE}, + { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE}, + { + .virtual = NFC_BASE_ADDR_AXI_VIRT, + .pfn = __phys_to_pfn(NFC_BASE_ADDR_AXI), + .length = NFC_AXI_SIZE, + .type = MT_DEVICE}, +}; + +/*! + * This function initializes the memory map. It is called during the + * system startup to create static physical to virtual memory map for + * the IO modules. + */ +void __init mx51_map_io(void) +{ + u32 tzic_addr; + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) + tzic_addr = 0x8FFFC000; + else + tzic_addr = 0xE0003000; + + mx51_io_desc[2].pfn = __phys_to_pfn(tzic_addr); + iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/Makefile @@ -0,0 +1,21 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + + +obj-y := system.o iomux.o cpu.o mm.o clock.o devices.o serial.o dma.o lpmodes.o pm.o sdram_autogating.o bus_freq.o + +obj-y += dummy_gpio.o + +obj-$(CONFIG_CPU_V7) += wfi.o suspend.o +obj-$(CONFIG_MACH_MX51_3DS) += mx51_3stack.o mx51_3stack_gpio.o mx51_3stack_pmic_mc13892.o +obj-$(CONFIG_MACH_MX51_BABBAGE) += mx51_babbage.o mx51_babbage_gpio.o mx51_babbage_pmic_mc13892.o + +obj-$(CONFIG_USB_EHCI_ARC_H1) += usb_h1.o +obj-$(CONFIG_USB_EHCI_ARC_H2) += usb_h2.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/system.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/system.c @@ -0,0 +1,187 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX51 i.MX51 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx51/system.c + * @brief This file contains idle and reset functions. + * + * @ingroup MSL_MX51 + */ + +extern int mxc_jtag_enabled; +extern int iram_ready; +static struct clk *gpc_dvfs_clk; + +extern void cpu_cortexa8_do_idle(void *addr); + + +/* set cpu low power mode before WFI instruction */ +void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode) +{ + u32 plat_lpc, arm_srpgcr, ccm_clpcr; + u32 empgc0, empgc1; + int stop_mode = 0; + + /* always allow platform to issue a deep sleep mode request */ + plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) & + ~(MXC_CORTEXA8_PLAT_LPC_DSM); + ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK); + arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR); + empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR); + empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR); + + switch (mode) { + case WAIT_CLOCKED: + break; + case WAIT_UNCLOCKED: + ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET); + break; + case WAIT_UNCLOCKED_POWER_OFF: + case STOP_POWER_OFF: + plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM + | MXC_CORTEXA8_PLAT_LPC_DBG_DSM; + if (mode == WAIT_UNCLOCKED_POWER_OFF) { + ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET); + ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY; + stop_mode = 0; + } else { + ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET); + ccm_clpcr |= (0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET); + ccm_clpcr |= MXC_CCM_CLPCR_VSTBY; + ccm_clpcr |= MXC_CCM_CLPCR_SBYOS; + stop_mode = 1; + } + + arm_srpgcr |= MXC_SRPGCR_PCR; + if (stop_mode) { + empgc0 |= MXC_SRPGCR_PCR; + empgc1 |= MXC_SRPGCR_PCR; + } + + if (tzic_enable_wake(1) != 0) + return; + break; + case STOP_POWER_ON: + ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET); + break; + default: + printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode); + return; + } + + __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC); + __raw_writel(ccm_clpcr, MXC_CCM_CLPCR); + __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR); + __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR); + if (stop_mode) { + __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR); + __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR); + } +} + +void mxc_pg_enable(struct platform_device *pdev) +{ + if (pdev == NULL) + return; + + if (strcmp(pdev->name, "mxc_ipu") == 0) { + __raw_writel(MXC_PGCR_PCR, MXC_PGC_IPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_IPU_PGSR); + } else if (strcmp(pdev->name, "mxc_vpu") == 0) { + __raw_writel(MXC_PGCR_PCR, MXC_PGC_VPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_VPU_PGSR); + } +} + +EXPORT_SYMBOL(mxc_pg_enable); + +void mxc_pg_disable(struct platform_device *pdev) +{ + if (pdev == NULL) + return; + + if (strcmp(pdev->name, "mxc_ipu") == 0) { + __raw_writel(0x0, MXC_PGC_IPU_PGCR); + if (__raw_readl(MXC_PGC_IPU_PGSR) & MXC_PGSR_PSR) + dev_dbg(&pdev->dev, "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_IPU_PGSR); + } else if (strcmp(pdev->name, "mxc_vpu") == 0) { + __raw_writel(0x0, MXC_PGC_VPU_PGCR); + if (__raw_readl(MXC_PGC_VPU_PGSR) & MXC_PGSR_PSR) + dev_dbg(&pdev->dev, "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_VPU_PGSR); + } +} + +EXPORT_SYMBOL(mxc_pg_disable); + +/* To change the idle power mode, need to set arch_idle_mode to a different + * power mode as in enum mxc_cpu_pwr_mode. + * May allow dynamically changing the idle mode. + */ +static int arch_idle_mode = WAIT_UNCLOCKED_POWER_OFF; +/*! + * This function puts the CPU into idle mode. It is called by default_idle() + * in process.c file. + */ +void arch_idle(void) +{ + if (likely(!mxc_jtag_enabled)) { + if (gpc_dvfs_clk == NULL) + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs_clk"); + /* gpc clock is needed for SRPG */ + clk_enable(gpc_dvfs_clk); + mxc_cpu_lp_set(arch_idle_mode); + if ((mxc_cpu_is_rev(CHIP_REV_2_0)) < 0) { + u32 l2_iram_addr = IDLE_IRAM_BASE_ADDR; + + if (!iram_ready) + return; + + if (l2_iram_addr > 0x1FFE8000) + cpu_cortexa8_do_idle(IO_ADDRESS(l2_iram_addr)); + } else { + cpu_do_idle(); + } + clk_disable(gpc_dvfs_clk); + } +} + +/* + * This function resets the system. It is called by machine_restart(). + * + * @param mode indicates different kinds of resets + */ +void arch_reset(char mode) +{ + /* Workaround to reset NFC_CONFIG3 register + * due to the chip warm reset does not reset it + */ + __raw_writel(0x20600, IO_ADDRESS(NFC_BASE_ADDR) + 0x28); + + /* Assert SRS signal */ + mxc_wd_reset(); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/clock.c @@ -0,0 +1,3957 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "crm_regs.h" + +static unsigned long pll_base[] = { + (unsigned long)MXC_DPLL1_BASE, + (unsigned long)MXC_DPLL2_BASE, + (unsigned long)MXC_DPLL3_BASE, +}; + +static struct clk pll1_main_clk; +static struct clk pll1_sw_clk; +static struct clk pll2_sw_clk; +static struct clk pll3_sw_clk; +static struct clk lp_apm_clk; +static struct clk tve_clk; +static struct clk emi_fast_clk; +static struct clk emi_slow_clk; +static struct clk emi_intr_clk; +static struct clk ddr_clk; +static struct clk ipu_clk[]; +static struct clk axi_a_clk; +static struct clk axi_b_clk; +static struct clk ddr_hf_clk; +static struct clk mipi_hsp_clk; +static struct clk gpu3d_clk; +static struct clk gpu2d_clk; +static struct clk vpu_clk[]; +static int cpu_curr_wp; +static struct cpu_wp *cpu_wp_tbl; + +int cpu_wp_nr; +int lp_high_freq; +int lp_med_freq; + +#define SPIN_DELAY 1000000 /* in nanoseconds */ + +extern int mxc_jtag_enabled; +extern int cpufreq_trig_needed; +extern int low_bus_freq_mode; + +static int cpu_clk_set_wp(int wp); +extern void propagate_rate(struct clk *tclk); +struct cpu_wp *(*get_cpu_wp)(int *wp); +void (*set_num_cpu_wp)(int num); + +static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post) +{ + u32 min_pre, temp_pre, old_err, err; + + if (div >= 512) { + *pre = 8; + *post = 64; + } else if (div >= 8) { + min_pre = (div - 1) / 64 + 1; + old_err = 8; + for (temp_pre = 8; temp_pre >= min_pre; temp_pre--) { + err = div % temp_pre; + if (err == 0) { + *pre = temp_pre; + break; + } + err = temp_pre - err; + if (err < old_err) { + old_err = err; + *pre = temp_pre; + } + } + *post = (div + *pre - 1) / *pre; + } else if (div < 8) { + *pre = div; + *post = 1; + } +} + +static int _clk_enable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg |= MXC_CCM_CCGR_CG_MASK << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + + if (clk->flags & AHB_HIGH_SET_POINT) + lp_high_freq++; + else if (clk->flags & AHB_MED_SET_POINT) + lp_med_freq++; + + + return 0; +} + +static int _clk_enable_inrun(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); + reg |= 1 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + return 0; +} + +static void _clk_disable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); + + if (clk->flags & AHB_HIGH_SET_POINT) + lp_high_freq--; + else if (clk->flags & AHB_MED_SET_POINT) + lp_med_freq--; +} + +static void _clk_disable_inwait(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); + reg |= 1 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); +} + +/* + * For the 4-to-1 muxed input clock + */ +static inline u32 _get_mux(struct clk *parent, struct clk *m0, + struct clk *m1, struct clk *m2, struct clk *m3) +{ + if (parent == m0) + return 0; + else if (parent == m1) + return 1; + else if (parent == m2) + return 2; + else if (parent == m3) + return 3; + else + BUG(); + + return 0; +} + +/* + * For the ddr muxed input clock + */ +static inline u32 _get_mux_ddr(struct clk *parent, struct clk *m0, + struct clk *m1, struct clk *m2, struct clk *m3, struct clk *m4) +{ + if (parent == m0) + return 0; + else if (parent == m1) + return 1; + else if (parent == m2) + return 2; + else if (parent == m3) + return 3; + else if (parent == m4) + return 4; + else + BUG(); + + return 0; +} + +static inline unsigned long _get_pll_base(struct clk *pll) +{ + if (pll == &pll1_main_clk) + return pll_base[0]; + else if (pll == &pll2_sw_clk) + return pll_base[1]; + else if (pll == &pll3_sw_clk) + return pll_base[2]; + else + BUG(); + + return 0; +} + +static struct clk ckih_clk = { + .name = "ckih", + .flags = RATE_PROPAGATES, +}; + +static struct clk ckih2_clk = { + .name = "ckih2", + .flags = RATE_PROPAGATES, +}; + +static struct clk osc_clk = { + .name = "osc", + .flags = RATE_PROPAGATES, +}; + +static struct clk ckil_clk = { + .name = "ckil", + .flags = RATE_PROPAGATES, +}; + +static void _fpm_recalc(struct clk *clk) +{ + clk->rate = ckil_clk.rate * 512; + if ((__raw_readl(MXC_CCM_CCR) & MXC_CCM_CCR_FPM_MULT_MASK) != 0) + clk->rate *= 2; + +} + +static int _fpm_enable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg |= MXC_CCM_CCR_FPM_EN; + __raw_writel(reg, MXC_CCM_CCR); + return 0; +} + +static void _fpm_disable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg &= ~MXC_CCM_CCR_FPM_EN; + __raw_writel(reg, MXC_CCM_CCR); +} + +static struct clk fpm_clk = { + .name = "fpm_clk", + .parent = &ckil_clk, + .recalc = _fpm_recalc, + .enable = _fpm_enable, + .disable = _fpm_disable, + .flags = RATE_PROPAGATES, +}; + +static void _fpm_div2_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate / 2; +} + +static struct clk fpm_div2_clk = { + .name = "fpm_div2_clk", + .parent = &fpm_clk, + .recalc = _fpm_div2_recalc, + .flags = RATE_PROPAGATES, +}; + +static void _clk_pll_recalc(struct clk *clk) +{ + long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; + unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl; + unsigned long pllbase; + s64 temp; + + pllbase = _get_pll_base(clk); + + dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL); + pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM; + dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN; + + if (pll_hfsm == 0) { + dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP); + dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD); + dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN); + } else { + dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP); + dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD); + dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN); + } + pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK; + mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET; + mfi = (mfi <= 5) ? 5 : mfi; + mfd = dp_mfd & MXC_PLL_DP_MFD_MASK; + mfn = mfn_abs = dp_mfn & MXC_PLL_DP_MFN_MASK; + /* Sign extend to 32-bits */ + if (mfn >= 0x04000000) { + mfn |= 0xFC000000; + mfn_abs = -mfn; + } + + ref_clk = 2 * clk->parent->rate; + if (dbl != 0) + ref_clk *= 2; + + ref_clk /= (pdf + 1); + temp = (u64) ref_clk * mfn_abs; + do_div(temp, mfd + 1); + if (mfn < 0) + temp = -temp; + temp = (ref_clk * mfi) + temp; + + clk->rate = temp; +} + +static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, reg1; + u32 pllbase; + struct timespec nstimeofday; + struct timespec curtime; + + long mfi, pdf, mfn, mfd = 999999; + s64 temp64; + unsigned long quad_parent_rate; + unsigned long pll_hfsm, dp_ctl; + + pllbase = _get_pll_base(clk); + + quad_parent_rate = 4*clk->parent->rate; + pdf = mfi = -1; + while (++pdf < 16 && mfi < 5) + mfi = rate * (pdf+1) / quad_parent_rate; + if (mfi > 15) + return -1; + pdf--; + + temp64 = rate*(pdf+1) - quad_parent_rate*mfi; + do_div(temp64, quad_parent_rate/1000000); + mfn = (long)temp64; + + dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL); + /* use dpdck0_2 */ + __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL); + pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM; + if (pll_hfsm == 0) { + reg = mfi<<4 | pdf; + __raw_writel(reg, pllbase + MXC_PLL_DP_OP); + __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD); + __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN); + } else { + reg = mfi<<4 | pdf; + __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP); + __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD); + __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN); + } + /* If auto restart is disabled, restart the PLL and + * wait for it to lock. + */ + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL); + if (reg & MXC_PLL_DP_CTL_UPEN) { + reg = __raw_readl(pllbase + MXC_PLL_DP_CONFIG); + if (!(reg & MXC_PLL_DP_CONFIG_AREN)) { + reg1 = __raw_readl(pllbase + MXC_PLL_DP_CTL); + reg1 |= MXC_PLL_DP_CTL_RST; + __raw_writel(reg1, pllbase + MXC_PLL_DP_CTL); + } + /* Wait for lock */ + getnstimeofday(&nstimeofday); + while (!(__raw_readl(pllbase + MXC_PLL_DP_CTL) + & MXC_PLL_DP_CTL_LRF)) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("pll_set_rate: pll relock failed\n"); + } + } + clk->rate = rate; + return 0; +} + +static int _clk_pll_enable(struct clk *clk) +{ + u32 reg; + u32 pllbase; + struct timespec nstimeofday; + struct timespec curtime; + + pllbase = _get_pll_base(clk); + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); + + /* Wait for lock */ + getnstimeofday(&nstimeofday); + while (!(__raw_readl(pllbase + MXC_PLL_DP_CTL) & MXC_PLL_DP_CTL_LRF)) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("pll relock failed\n"); + } + return 0; +} + +static void _clk_pll_disable(struct clk *clk) +{ + u32 reg; + u32 pllbase; + + pllbase = _get_pll_base(clk); + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); +} + +static struct clk pll1_main_clk = { + .name = "pll1_main_clk", + .parent = &osc_clk, + .recalc = _clk_pll_recalc, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CCSR); + + if (parent == &pll1_main_clk) { + reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); + /* Set the step_clk parent to be lp_apm, to save power. */ + mux = _get_mux(&lp_apm_clk, &lp_apm_clk, NULL, &pll2_sw_clk, + &pll3_sw_clk); + reg = __raw_readl(MXC_CCM_CCSR); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (mux << MXC_CCM_CCSR_STEP_SEL_OFFSET); + } else { + if (parent == &lp_apm_clk) { + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + reg = __raw_readl(MXC_CCM_CCSR); + mux = _get_mux(parent, &lp_apm_clk, NULL, &pll2_sw_clk, + &pll3_sw_clk); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (mux << MXC_CCM_CCSR_STEP_SEL_OFFSET); + } else { + mux = _get_mux(parent, &lp_apm_clk, NULL, &pll2_sw_clk, + &pll3_sw_clk); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (mux << MXC_CCM_CCSR_STEP_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CCSR); + reg = __raw_readl(MXC_CCM_CCSR); + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + + } + } + __raw_writel(reg, MXC_CCM_CCSR); + + return 0; +} + +static void _clk_pll1_sw_recalc(struct clk *clk) +{ + u32 reg, div; + div = 1; + reg = __raw_readl(MXC_CCM_CCSR); + + if (clk->parent == &pll2_sw_clk) { + div = ((reg & MXC_CCM_CCSR_PLL2_PODF_MASK) >> + MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1; + } else if (clk->parent == &pll3_sw_clk) { + div = ((reg & MXC_CCM_CCSR_PLL3_PODF_MASK) >> + MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1; + } + clk->rate = clk->parent->rate / div; +} + +/* pll1 switch clock */ +static struct clk pll1_sw_clk = { + .name = "pll1_sw_clk", + .parent = &pll1_main_clk, + .set_parent = _clk_pll1_sw_set_parent, + .recalc = _clk_pll1_sw_recalc, + .flags = RATE_PROPAGATES, +}; + +static int _clk_pll2_sw_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CCSR); + + if (parent == &pll2_sw_clk) { + reg &= ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL; + } else { + reg = (reg & ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL); + reg |= MXC_CCM_CCSR_PLL2_SW_CLK_SEL; + } + __raw_writel(reg, MXC_CCM_CCSR); + return 0; +} + +/* same as pll2_main_clk. These two clocks should always be the same */ +static struct clk pll2_sw_clk = { + .name = "pll2", + .parent = &osc_clk, + .recalc = _clk_pll_recalc, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .set_rate = _clk_pll_set_rate, + .set_parent = _clk_pll2_sw_set_parent, + .flags = RATE_PROPAGATES, +}; + +/* same as pll3_main_clk. These two clocks should always be the same */ +static struct clk pll3_sw_clk = { + .name = "pll3", + .parent = &osc_clk, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + if (parent == &osc_clk) + reg = __raw_readl(MXC_CCM_CCSR) & ~MXC_CCM_CCSR_LP_APM_SEL; + else if (parent == &fpm_clk) + reg = __raw_readl(MXC_CCM_CCSR) | MXC_CCM_CCSR_LP_APM_SEL; + else + return -EINVAL; + + __raw_writel(reg, MXC_CCM_CCSR); + + return 0; +} + +static struct clk lp_apm_clk = { + .name = "lp_apm", + .parent = &osc_clk, + .set_parent = _clk_lp_apm_set_parent, + .flags = RATE_PROPAGATES, +}; + +static void _clk_arm_recalc(struct clk *clk) +{ + u32 cacrr, div; + + cacrr = __raw_readl(MXC_CCM_CACRR); + div = (cacrr & MXC_CCM_CACRR_ARM_PODF_MASK) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) +{ + u32 i; + for (i = 0; i < cpu_wp_nr; i++) { + if (rate == cpu_wp_tbl[i].cpu_rate) + break; + } + if (i >= cpu_wp_nr) + return -EINVAL; + cpu_clk_set_wp(i); + + return 0; +} + +static unsigned long _clk_cpu_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 i; + u32 wp; + + for (i = 0; i < cpu_wp_nr; i++) { + if (rate == cpu_wp_tbl[i].cpu_rate) + break; + } + + if (i > cpu_wp_nr) + wp = 0; + + return cpu_wp_tbl[wp].cpu_rate; +} + + +static struct clk cpu_clk = { + .name = "cpu_clk", + .parent = &pll1_sw_clk, + .recalc = _clk_arm_recalc, + .set_rate = _clk_cpu_set_rate, + .round_rate = _clk_cpu_round_rate, +}; + +static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + struct timespec nstimeofday; + struct timespec curtime; + + mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL); + + reg = __raw_readl(MXC_CCM_CBCMR) & ~MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CBCMR); + + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & + MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("pll _clk_periph_apm_set_parent failed\n"); + } + return 0; +} + +static struct clk periph_apm_clk = { + .name = "periph_apm_clk", + .parent = &pll1_sw_clk, + .set_parent = _clk_periph_apm_set_parent, + .flags = RATE_PROPAGATES, +}; + +/* TODO: Need to sync with GPC to determine if DVFS is in place so that + * the DVFS_PODF divider can be applied in CDCR register. + */ +static void _clk_main_bus_recalc(struct clk *clk) +{ + u32 div = 0; + + if (dvfs_per_divider_active() || low_bus_freq_mode) + div = (__raw_readl(MXC_CCM_CDCR) & 0x3); + clk->rate = clk->parent->rate / (div + 1); +} + +static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + if (parent == &pll2_sw_clk) { + reg = __raw_readl(MXC_CCM_CBCDR) & + ~MXC_CCM_CBCDR_PERIPH_CLK_SEL; + } else if (parent == &periph_apm_clk) { + reg = __raw_readl(MXC_CCM_CBCDR) | MXC_CCM_CBCDR_PERIPH_CLK_SEL; + } else { + return -EINVAL; + } + __raw_writel(reg, MXC_CCM_CBCDR); + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static struct clk main_bus_clk = { + .name = "main_bus_clk", + .parent = &pll2_sw_clk, + .set_parent = _clk_main_bus_set_parent, + .recalc = _clk_main_bus_recalc, + .flags = RATE_PROPAGATES, +}; + +static void _clk_axi_a_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_AXI_A_PODF_MASK) >> + MXC_CCM_CBCDR_AXI_A_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_axi_a_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_AXI_A_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_AXI_A_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & MXC_CCM_CDHIPR_AXI_A_PODF_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("pll _clk_axi_a_set_rate failed\n"); + } + clk->rate = rate; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static unsigned long _clk_axi_a_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + + +static struct clk axi_a_clk = { + .name = "axi_a_clk", + .parent = &main_bus_clk, + .recalc = _clk_axi_a_recalc, + .set_rate = _clk_axi_a_set_rate, + .round_rate = _clk_axi_a_round_rate, + .flags = RATE_PROPAGATES, +}; + +static void _clk_ddr_hf_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_DDR_PODF_MASK) >> + MXC_CCM_CBCDR_DDR_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_ddr_hf_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static int _clk_ddr_hf_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_DDR_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_DDR_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & MXC_CCM_CDHIPR_DDR_PODF_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("clk_ddr_hf_set_rate failed\n"); + } + clk->rate = rate; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static struct clk ddr_hf_clk = { + .name = "ddr_hf_clk", + .parent = &pll1_sw_clk, + .recalc = _clk_ddr_hf_recalc, + .round_rate = _clk_ddr_hf_round_rate, + .set_rate = _clk_ddr_hf_set_rate, + .flags = RATE_PROPAGATES, +}; + +static void _clk_axi_b_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_AXI_B_PODF_MASK) >> + MXC_CCM_CBCDR_AXI_B_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_axi_b_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_AXI_B_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_AXI_B_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & MXC_CCM_CDHIPR_AXI_B_PODF_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("_clk_axi_b_set_rate failed\n"); + } + + clk->rate = rate; + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static unsigned long _clk_axi_b_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + + +static struct clk axi_b_clk = { + .name = "axi_b_clk", + .parent = &main_bus_clk, + .recalc = _clk_axi_b_recalc, + .set_rate = _clk_axi_b_set_rate, + .round_rate = _clk_axi_b_round_rate, + .flags = RATE_PROPAGATES, +}; + +static void _clk_ahb_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >> + MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + + +static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_AHB_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_AHB_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & MXC_CCM_CDHIPR_AHB_PODF_BUSY) { + getnstimeofday(&curtime); + if (curtime.tv_nsec - nstimeofday.tv_nsec > SPIN_DELAY) + panic("_clk_ahb_set_rate failed\n"); + } + clk->rate = rate; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static unsigned long _clk_ahb_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + + +static struct clk ahb_clk = { + .name = "ahb_clk", + .parent = &main_bus_clk, + .recalc = _clk_ahb_recalc, + .set_rate = _clk_ahb_set_rate, + .round_rate = _clk_ahb_round_rate, + .flags = RATE_PROPAGATES, +}; + +static int _clk_max_enable(struct clk *clk) +{ + u32 reg; + + _clk_enable(clk); + + /* Handshake with MAX when LPM is entered. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg &= ~MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); + + return 0; +} + + +static void _clk_max_disable(struct clk *clk) +{ + u32 reg; + + _clk_disable_inwait(clk); + + /* No Handshake with MAX when LPM is entered as its disabled. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg |= MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); +} + + +static struct clk ahb_max_clk = { + .name = "max_clk", + .parent = &ahb_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG14_OFFSET, + .enable = _clk_max_enable, + .disable = _clk_max_disable, +}; + +static int _clk_emi_slow_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + reg = __raw_readl(MXC_CCM_CBCDR); + if (parent == &ahb_clk) { + reg |= MXC_CCM_CBCDR_EMI_CLK_SEL; + } else if (parent == &main_bus_clk) { + reg &= ~MXC_CCM_CBCDR_EMI_CLK_SEL; + } else { + BUG(); + } + __raw_writel(reg, MXC_CCM_CBCDR); + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static void _clk_emi_slow_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_EMI_PODF_MASK) >> + MXC_CCM_CBCDR_EMI_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_emi_slow_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_EMI_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_EMI_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & MXC_CCM_CDHIPR_EMI_PODF_BUSY) { + getnstimeofday(&curtime); + if ((curtime.tv_nsec - nstimeofday.tv_nsec) > SPIN_DELAY) + panic("_clk_emi_slow_set_rate failed\n"); + } + clk->rate = rate; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + return 0; +} + +static unsigned long _clk_emi_slow_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + + +static struct clk emi_slow_clk = { + .name = "emi_slow_clk", + .parent = &main_bus_clk, + .set_parent = _clk_emi_slow_set_parent, + .recalc = _clk_emi_slow_recalc, + .set_rate = _clk_emi_slow_set_rate, + .round_rate = _clk_emi_slow_round_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG8_OFFSET, + .disable = _clk_disable_inwait, + .flags = RATE_PROPAGATES, +}; + +static struct clk ahbmux1_clk = { + .name = "ahbmux1_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG8_OFFSET, + .disable = _clk_disable_inwait, +}; + +static struct clk ahbmux2_clk = { + .name = "ahbmux2_clk", + .id = 0, + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG9_OFFSET, + .disable = _clk_disable_inwait, +}; + + +static struct clk emi_fast_clk = { + .name = "emi_fast_clk", + .parent = &ddr_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG7_OFFSET, + .disable = _clk_disable_inwait, +}; + +static struct clk emi_intr_clk = { + .name = "emi_intr_clk", + .parent = &ahb_clk, + .secondary = &ahbmux2_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static void _clk_ipg_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >> + MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .recalc = _clk_ipg_recalc, + .flags = RATE_PROPAGATES, +}; + +static void _clk_ipg_per_recalc(struct clk *clk) +{ + u32 reg, prediv1, prediv2, podf; + + if (clk->parent == &main_bus_clk || clk->parent == &lp_apm_clk) { + /* the main_bus_clk is the one before the DVFS engine */ + reg = __raw_readl(MXC_CCM_CBCDR); + prediv1 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED1_MASK) >> + MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET) + 1; + prediv2 = ((reg & MXC_CCM_CBCDR_PERCLK_PRED2_MASK) >> + MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET) + 1; + podf = ((reg & MXC_CCM_CBCDR_PERCLK_PODF_MASK) >> + MXC_CCM_CBCDR_PERCLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv1 * prediv2 * podf); + } else if (clk->parent == &ipg_clk) { + clk->rate = ipg_clk.rate; + } else { + BUG(); + } +} + +static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &main_bus_clk, &lp_apm_clk, &ipg_clk, NULL); + if (mux == 2) { + reg |= MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL; + } else { + reg &= ~MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL; + if (mux == 0) + reg &= ~MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL; + else + reg |= MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL; + } + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + +static struct clk ipg_perclk = { + .name = "ipg_perclk", + .parent = &lp_apm_clk, + .recalc = _clk_ipg_per_recalc, + .set_parent = _clk_ipg_per_set_parent, + .flags = RATE_PROPAGATES, +}; + +static int _clk_ipmux_enable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg |= 1 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + + return 0; +} + +static void _clk_ipmux_disable(struct clk *clk) +{ + u32 reg; + reg = __raw_readl(clk->enable_reg); + reg &= ~(0x1 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); +} + +static struct clk ipumux1_clk = { + .name = "ipumux1", + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG6_1_OFFSET, + .enable = _clk_ipmux_enable, + .disable = _clk_ipmux_disable, +}; + +static struct clk ipumux2_clk = { + .name = "ipumux2", + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG6_2_OFFSET, + .enable = _clk_ipmux_enable, + .disable = _clk_ipmux_disable, +}; + + +static struct clk aips_tz1_clk = { + .name = "aips_tz1_clk", + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static struct clk aips_tz2_clk = { + .name = "aips_tz2_clk", + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG13_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static struct clk gpc_dvfs_clk = { + .name = "gpc_dvfs_clk", + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static int _clk_sdma_enable(struct clk *clk) +{ + u32 reg; + + _clk_enable(clk); + + /* Handshake with SDMA when LPM is entered. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg &= ~MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); + + return 0; +} + +static void _clk_sdma_disable(struct clk *clk) +{ + u32 reg; + + _clk_disable(clk); + /* No handshake with SDMA as its not enabled. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg |= MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); +} + + +static struct clk sdma_clk[] = { + { + .name = "sdma_ahb_clk", + .parent = &ahb_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG15_OFFSET, + .enable = _clk_sdma_enable, + .disable = _clk_sdma_disable, + }, + { + .name = "sdma_ipg_clk", + .parent = &ipg_clk, +#ifdef CONFIG_SDMA_IRAM + .secondary = &emi_intr_clk, +#endif + }, +}; + +static int _clk_ipu_enable(struct clk *clk) +{ + u32 reg; + + _clk_enable(clk); + /* Handshake with IPU when certain clock rates are changed. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg &= ~MXC_CCM_CCDR_IPU_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + + /* Handshake with IPU when LPM is entered as its enabled. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg &= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); + + start_sdram_autogating(); + + return 0; +} + +static void _clk_ipu_disable(struct clk *clk) +{ + u32 reg; + + if (sdram_autogating_active()) + stop_sdram_autogating(); + + _clk_disable(clk); + + /* No handshake with IPU whe dividers are changed + * as its not enabled. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_IPU_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + + /* No handshake with IPU when LPM is entered as its not enabled. */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg |= MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); +} + +static int _clk_ipu_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &ahb_clk, + &emi_slow_clk); + reg = (reg & ~MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + + +static struct clk ipu_clk[] = { + { + .name = "ipu_clk", + .parent = &ahb_clk, + .secondary = &ipu_clk[1], + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG5_OFFSET, + .enable = _clk_ipu_enable, + .disable = _clk_ipu_disable, + .set_parent = _clk_ipu_set_parent, + .flags = CPU_FREQ_TRIG_UPDATE | AHB_MED_SET_POINT | RATE_PROPAGATES, + }, + { + .name = "ipu_sec_clk", + .parent = &emi_fast_clk, + .secondary = &ahbmux1_clk, + } +}; + +static int _clk_ipu_di_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR2); + reg &= ~MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(clk->id); + if (parent == &pll3_sw_clk) + ; + else if (parent == &osc_clk) + reg |= 1 << MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(clk->id); + else if (parent == &ckih_clk) + reg |= 2 << MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(clk->id); + else if (parent == &tve_clk) + reg |= 3 << MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(clk->id); + else /* Assume any other clock is external clock pin */ + reg |= 4 << MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(clk->id); + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_ipu_di_recalc(struct clk *clk) +{ + u32 reg, div, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + mux = (reg & MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(clk->id)) >> + MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(clk->id); + if (mux == 0) { + reg = __raw_readl(MXC_CCM_CDCDR) & + MXC_CCM_CDCDR_DI_CLK_PRED_MASK; + div = (reg >> MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET) + 1; + clk->rate = clk->parent->rate / div; + } else if (mux == 3) { + clk->rate = clk->parent->rate / 8; + } else { + clk->rate = clk->parent->rate; + } +} + +static int _clk_ipu_di_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CDCDR); + reg &= ~MXC_CCM_CDCDR_DI_CLK_PRED_MASK; + reg |= (div - 1) << MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CDCDR); + + clk->rate = rate; + + return 0; +} + +static unsigned long _clk_ipu_di_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk ipu_di_clk[] = { + { + .name = "ipu_di0_clk", + .id = 0, + .parent = &pll3_sw_clk, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG5_OFFSET, + .recalc = _clk_ipu_di_recalc, + .set_parent = _clk_ipu_di_set_parent, + .round_rate = _clk_ipu_di_round_rate, + .set_rate = _clk_ipu_di_set_rate, + .enable = _clk_enable, + .disable = _clk_disable, + .flags = RATE_PROPAGATES, + }, + { + .name = "ipu_di1_clk", + .id = 1, + .parent = &pll3_sw_clk, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG6_OFFSET, + .recalc = _clk_ipu_di_recalc, + .set_parent = _clk_ipu_di_set_parent, + .round_rate = _clk_ipu_di_round_rate, + .set_rate = _clk_ipu_di_set_rate, + .enable = _clk_enable, + .disable = _clk_disable, + .flags = RATE_PROPAGATES, + }, +}; + +static int _clk_csi0_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, NULL); + reg = (reg & ~MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_csi0_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + reg = __raw_readl(MXC_CCM_CSCDR4); + pred = ((reg & MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK) >> + MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK) >> + MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); +} + +static unsigned long _clk_csi0_round_rate(struct clk *clk, unsigned long rate) +{ + u32 pre, post; + u32 div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + __calc_pre_post_dividers(div, &pre, &post); + + return clk->parent->rate / (pre * post); +} + +static int _clk_csi0_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + /* Set CSI clock divider */ + reg = __raw_readl(MXC_CCM_CSCDR4) & + ~(MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK | + MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK); + reg |= (post - 1) << MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR4); + + clk->rate = rate; + return 0; +} + +static struct clk csi0_clk = { + .name = "csi_mclk1", + .parent = &pll3_sw_clk, + .set_parent = _clk_csi0_set_parent, + .recalc = _clk_csi0_recalc, + .round_rate = _clk_csi0_round_rate, + .set_rate = _clk_csi0_set_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG2_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_csi1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, NULL); + reg = (reg & ~MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_csi1_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + reg = __raw_readl(MXC_CCM_CSCDR4); + pred = ((reg & MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK) >> + MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK) >> + MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); +} + +static unsigned long _clk_csi1_round_rate(struct clk *clk, unsigned long rate) +{ + u32 pre, post; + u32 div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + __calc_pre_post_dividers(div, &pre, &post); + + return clk->parent->rate / (pre * post); +} + +static int _clk_csi1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + /* Set CSI clock divider */ + reg = __raw_readl(MXC_CCM_CSCDR4) & + ~(MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK | + MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK); + reg |= (post - 1) << MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR4); + + clk->rate = rate; + return 0; +} + +static struct clk csi1_clk = { + .name = "csi_mclk2", + .parent = &pll3_sw_clk, + .set_parent = _clk_csi1_set_parent, + .recalc = _clk_csi1_recalc, + .round_rate = _clk_csi1_round_rate, + .set_rate = _clk_csi1_set_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG3_OFFSET, + .disable = _clk_disable, +}; + + +static int _clk_hsc_enable(struct clk *clk) +{ + u32 reg; + + _clk_enable(clk); + /* Handshake with IPU when certain clock rates are changed. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg &= ~MXC_CCM_CCDR_HSC_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + + reg = __raw_readl(MXC_CCM_CLPCR); + reg &= ~MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); + + return 0; +} + +static void _clk_hsc_disable(struct clk *clk) +{ + u32 reg; + + _clk_disable(clk); + /* No handshake with HSC as its not enabled. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_HSC_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + + reg = __raw_readl(MXC_CCM_CLPCR); + reg |= MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); +} + +static struct clk mipi_esc_clk = { + .name = "mipi_esc_clk", + .parent = &pll2_sw_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG5_OFFSET, +}; + +static struct clk mipi_hsc2_clk = { + .name = "mipi_hsc2_clk", + .parent = &pll2_sw_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG4_OFFSET, + .secondary = &mipi_esc_clk, +}; + +static struct clk mipi_hsc1_clk = { + .name = "mipi_hsc1_clk", + .parent = &pll2_sw_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG3_OFFSET, + .secondary = &mipi_hsc2_clk, +}; + +static struct clk mipi_hsp_clk = { + .name = "mipi_hsp_clk", + .parent = &ipu_clk[0], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG6_OFFSET, + .enable = _clk_hsc_enable, + .disable = _clk_hsc_disable, + .secondary = &mipi_hsc1_clk, +}; + +static int _clk_tve_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + + if (parent == &pll3_sw_clk) { + reg &= ~(MXC_CCM_CSCMR1_TVE_CLK_SEL); + } else if (parent == &osc_clk) { + reg |= MXC_CCM_CSCMR1_TVE_CLK_SEL; + reg &= MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL; + } else if (parent == &ckih_clk) { + reg |= MXC_CCM_CSCMR1_TVE_CLK_SEL; + reg |= MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL; + } else { + BUG(); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + return 0; +} + +static void _clk_tve_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CDCDR) & + MXC_CCM_CDCDR_TVE_CLK_PRED_MASK; + div = (reg >> MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET) + 1; + clk->rate = clk->parent->rate / div; + } else { + clk->rate = clk->parent->rate; + } +} + +static unsigned long _clk_tve_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) + return -EINVAL; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static int _clk_tve_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) + return -EINVAL; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + div--; + reg = __raw_readl(MXC_CCM_CDCDR) & ~MXC_CCM_CDCDR_TVE_CLK_PRED_MASK; + reg |= div << MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CDCDR); + clk->rate = rate; + return 0; +} + +static int _clk_tve_enable(struct clk *clk) +{ + _clk_enable(clk); + if (clk_get_parent(&ipu_di_clk[1]) != clk) { + clk_enable(&ipu_di_clk[1]); + ipu_di_clk[1].set_parent(&ipu_di_clk[1], clk); + ipu_di_clk[1].parent = clk; + } + return 0; +} + +static void _clk_tve_disable(struct clk *clk) +{ + _clk_disable(clk); + if (clk_get_parent(&ipu_di_clk[1]) == clk) { + clk_disable(&ipu_di_clk[1]); + ipu_di_clk[1].set_parent(&ipu_di_clk[1], &pll3_sw_clk); + ipu_di_clk[1].parent = &pll3_sw_clk; + } +} + +static struct clk tve_clk = { + .name = "tve_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_tve_set_parent, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG15_OFFSET, + .recalc = _clk_tve_recalc, + .round_rate = _clk_tve_round_rate, + .set_rate = _clk_tve_set_rate, + .enable = _clk_tve_enable, + .disable = _clk_tve_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +}; + +static struct clk spba_clk = { + .name = "spba_clk", + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG0_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static void _clk_uart_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_uart_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_UART_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk uart_main_clk = { + .name = "uart_main_clk", + .parent = &pll2_sw_clk, + .recalc = _clk_uart_recalc, + .set_parent = _clk_uart_set_parent, + .flags = RATE_PROPAGATES, +}; + +static struct clk uart1_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &uart_main_clk, + .secondary = &uart1_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG4_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +#ifdef UART1_DMA_ENABLE + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +#endif + }, + { + .name = "uart_ipg_clk", + .id = 0, + .parent = &ipg_clk, +#ifdef UART1_DMA_ENABLE + .secondary = &aips_tz1_clk, +#endif + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG3_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk uart2_clk[] = { + { + .name = "uart_clk", + .id = 1, + .parent = &uart_main_clk, + .secondary = &uart2_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG6_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +#ifdef UART2_DMA_ENABLE + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +#endif + }, + { + .name = "uart_ipg_clk", + .id = 1, + .parent = &ipg_clk, +#ifdef UART2_DMA_ENABLE + .secondary = &aips_tz1_clk, +#endif + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG5_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk uart3_clk[] = { + { + .name = "uart_clk", + .id = 2, + .parent = &uart_main_clk, + .secondary = &uart3_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +#ifdef UART3_DMA_ENABLE + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +#endif + }, + { + .name = "uart_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk gpt_clk[] = { + { + .name = "gpt_clk", + .parent = &ipg_perclk, + .id = 0, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &gpt_clk[1], + }, + { + .name = "gpt_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "gpt_32k_clk", + .id = 0, + .parent = &ckil_clk, + }, +}; + +static struct clk pwm1_clk[] = { + { + .name = "pwm", + .parent = &ipg_perclk, + .id = 0, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG6_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &pwm1_clk[1], + }, + { + .name = "pwm_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG5_OFFSET, + .enable = _clk_enable_inrun, /*Active only when ARM is running. */ + .disable = _clk_disable, + }, + { + .name = "pwm_32k_clk", + .id = 0, + .parent = &ckil_clk, + }, +}; + +static struct clk pwm2_clk[] = { + { + .name = "pwm", + .parent = &ipg_perclk, + .id = 1, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &pwm2_clk[1], + }, + { + .name = "pwm_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG7_OFFSET, + .enable = _clk_enable_inrun, /*Active only when ARM is running. */ + .disable = _clk_disable, + }, + { + .name = "pwm_32k_clk", + .id = 1, + .parent = &ckil_clk, + }, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "i2c_clk", + .id = 1, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static void _clk_hsi2c_serial_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR3); + prediv = ((reg & MXC_CCM_CSCDR3_HSI2C_CLK_PRED_MASK) >> + MXC_CCM_CSCDR3_HSI2C_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR3_HSI2C_CLK_PODF_MASK) >> + MXC_CCM_CSCDR3_HSI2C_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static struct clk hsi2c_serial_clk = { + .name = "hsi2c_serial_clk", + .id = 0, + .parent = &pll3_sw_clk, + .secondary = &spba_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG11_OFFSET, + .recalc = _clk_hsi2c_serial_recalc, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk hsi2c_clk = { + .name = "hsi2c_clk", + .id = 0, + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +}; + +static void _clk_cspi_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR2); + prediv = ((reg & MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_cspi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk cspi_main_clk = { + .name = "cspi_main_clk", + .parent = &pll3_sw_clk, + .recalc = _clk_cspi_recalc, + .set_parent = _clk_cspi_set_parent, + .flags = RATE_PROPAGATES, +}; + +static struct clk cspi1_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &cspi_main_clk, + .secondary = &cspi1_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "cspi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG9_OFFSET, + .enable = _clk_enable_inrun, /*Active only when ARM is running. */ + .disable = _clk_disable, + }, +}; + +static struct clk cspi2_clk[] = { + { + .name = "cspi_clk", + .id = 1, + .parent = &cspi_main_clk, + .secondary = &cspi2_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "cspi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG11_OFFSET, + .enable = _clk_enable_inrun, /*Active only when ARM is running. */ + .disable = _clk_disable, + }, +}; + +static struct clk cspi3_clk[] = { + { + .name = "cspi_clk", + .id = 2, + .parent = &cspi_main_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG13_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &cspi3_clk[1], + }, + { + .name = "cspi_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + }, +}; + +static int _clk_ssi_lp_apm_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &ckih_clk, &lp_apm_clk, &ckih2_clk, NULL); + reg = __raw_readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi_lp_apm_clk = { + .name = "ssi_lp_apm_clk", + .parent = &ckih_clk, + .set_parent = _clk_ssi_lp_apm_set_parent, +}; + +static void _clk_ssi1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CS1CDR); + prediv = ((reg & MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK) >> + MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK) >> + MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} +static int _clk_ssi1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, + &pll3_sw_clk, &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi1_clk[] = { + { + .name = "ssi_clk", + .id = 0, + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi1_set_parent, + .secondary = &ssi1_clk[1], + .recalc = _clk_ssi1_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &ssi1_clk[2], + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_dep_clk", + .id = 0, + .parent = &aips_tz2_clk, +#ifdef CONFIG_SND_MXC_SOC_IRAM + .secondary = &emi_intr_clk, +#else + .secondary = &emi_fast_clk, +#endif + }, +}; + +static void _clk_ssi2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CS2CDR); + prediv = ((reg & MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK) >> + MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK) >> + MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_ssi2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, + &pll3_sw_clk, &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi2_clk[] = { + { + .name = "ssi_clk", + .id = 1, + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi2_set_parent, + .secondary = &ssi2_clk[1], + .recalc = _clk_ssi2_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG11_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &ssi2_clk[2], + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_dep_clk", + .id = 1, + .parent = &spba_clk, +#ifdef CONFIG_SND_MXC_SOC_IRAM + .secondary = &emi_intr_clk, +#else + .secondary = &emi_fast_clk, +#endif + }, +}; + +static void _clk_ssi_ext1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + clk->rate = clk->parent->rate; + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CS1CDR); + prediv = ((reg & MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_MASK) >> + MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_MASK) >> + MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv * podf); + } +} + +static int _clk_ssi_ext1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &ssi1_clk[0]) { + reg |= MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL; + } else { + reg &= ~MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &ssi_lp_apm_clk); + reg = (reg & ~MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi_ext1_clk = { + .name = "ssi_ext1_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi_ext1_set_parent, + .recalc = _clk_ssi_ext1_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG14_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static void _clk_ssi_ext2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + clk->rate = clk->parent->rate; + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CS2CDR); + prediv = ((reg & MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_MASK) >> + MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_MASK) >> + MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv * podf); + } +} + +static int _clk_ssi_ext2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &ssi2_clk[0]) { + reg |= MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL; + } else { + reg &= ~MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &ssi_lp_apm_clk); + reg = (reg & ~MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi_ext2_clk = { + .name = "ssi_ext2_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi_ext2_set_parent, + .recalc = _clk_ssi_ext2_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG15_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG15_OFFSET, + .disable = _clk_disable, +}; + +static struct clk tmax1_clk = { + .name = "tmax1_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG0_OFFSET, + .disable = _clk_disable, + }; + +static struct clk tmax2_clk = { + .name = "tmax2_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG1_OFFSET, + .disable = _clk_disable, +}; + +static struct clk tmax3_clk = { + .name = "tmax3_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG2_OFFSET, + .disable = _clk_disable, +}; + +static void _clk_usboh3_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_usboh3_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk usboh3_clk[] = { + { + .name = "usboh3_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_usboh3_set_parent, + .recalc = _clk_usboh3_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG14_OFFSET, + .disable = _clk_disable, + .secondary = &usboh3_clk[1], + .flags = AHB_MED_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "usb_sec_clk", + .parent = &tmax2_clk, + .secondary = &emi_fast_clk, + }, +}; +static struct clk usb_ahb_clk = { + .name = "usb_ahb_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG13_OFFSET, + .disable = _clk_disable, +}; + +static void _clk_usb_phy_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + if (clk->parent == &pll3_sw_clk) { + reg = __raw_readl(MXC_CCM_CDCDR); + prediv = ((reg & MXC_CCM_CDCDR_USB_PHY_PRED_MASK) >> + MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_USB_PHY_PODF_MASK) >> + MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); + } else + clk->rate = clk->parent->rate; +} + +static int _clk_usb_phy_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &osc_clk) + reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL; + else if (parent == &pll3_sw_clk) + reg |= MXC_CCM_CSCMR1_USB_PHY_CLK_SEL; + else + BUG(); + + __raw_writel(reg, MXC_CCM_CSCMR1); + return 0; +} + +static struct clk usb_phy_clk = { + .name = "usb_phy_clk", + .parent = &pll3_sw_clk, + .secondary = &tmax3_clk, + .set_parent = _clk_usb_phy_set_parent, + .recalc = _clk_usb_phy_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG0_OFFSET, + .disable = _clk_disable, +}; + +static struct clk esdhc_dep_clks = { + .name = "sd_dep_clk", + .parent = &spba_clk, + .secondary = &emi_fast_clk, +}; + + +static void _clk_esdhc1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_esdhc1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc1_clk[] = { + { + .name = "esdhc_clk", + .id = 0, + .parent = &pll3_sw_clk, + .set_parent = _clk_esdhc1_set_parent, + .recalc = _clk_esdhc1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG1_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc1_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &esdhc1_clk[2], + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG0_OFFSET, + .disable = _clk_disable, + }, + { + .name = "esdhc_sec_clk", + .id = 0, + .parent = &tmax3_clk, + .secondary = &esdhc_dep_clks, + }, + +}; + +static void _clk_esdhc2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_esdhc2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc2_clk[] = { + { + .name = "esdhc_clk", + .id = 1, + .parent = &pll3_sw_clk, + .set_parent = _clk_esdhc2_set_parent, + .recalc = _clk_esdhc2_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG3_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc2_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &esdhc2_clk[2], + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG2_OFFSET, + .disable = _clk_disable, + }, + { + .name = "esdhc_sec_clk", + .id = 0, + .parent = &tmax2_clk, + .secondary = &esdhc_dep_clks, + }, +}; + +static int _clk_esdhc3_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &esdhc1_clk[0]) + reg &= ~MXC_CCM_CSCMR1_ESDHC3_CLK_SEL; + else if (parent == &esdhc2_clk[0]) + reg |= MXC_CCM_CSCMR1_ESDHC3_CLK_SEL; + else + BUG(); + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc3_clk[] = { + { + .name = "esdhc_clk", + .id = 2, + .parent = &esdhc1_clk[0], + .set_parent = _clk_esdhc3_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG5_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc3_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .secondary = &esdhc3_clk[2], + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG4_OFFSET, + .disable = _clk_disable, + }, + { + .name = "esdhc_sec_clk", + .id = 0, + .parent = &ahb_max_clk, + .secondary = &esdhc_dep_clks, + }, +}; + + +static int _clk_esdhc4_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &esdhc1_clk[0]) + reg &= ~MXC_CCM_CSCMR1_ESDHC4_CLK_SEL; + else if (parent == &esdhc2_clk[0]) + reg |= MXC_CCM_CSCMR1_ESDHC4_CLK_SEL; + else + BUG(); + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc4_clk[] = { + { + .name = "esdhc_clk", + .id = 3, + .parent = &esdhc1_clk[0], + .set_parent = _clk_esdhc4_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG7_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc4_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .secondary = &esdhc4_clk[2], + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG6_OFFSET, + .disable = _clk_disable, + }, + { + .name = "esdhc_sec_clk", + .id = 0, + .parent = &tmax3_clk, + .secondary = &esdhc_dep_clks, + }, +}; + +static int _clk_sim_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, NULL); + reg = __raw_readl(MXC_CCM_CSCMR2) & ~MXC_CCM_CSCMR2_SIM_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR2_SIM_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_sim_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + reg = __raw_readl(MXC_CCM_CSCDR2); + pred = ((reg & MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK) >> + MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK) >> + MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); +} + +static unsigned long _clk_sim_round_rate(struct clk *clk, unsigned long rate) +{ + u32 pre, post; + u32 div = clk->parent->rate / rate; + if (clk->parent->rate % rate) + div++; + + __calc_pre_post_dividers(div, &pre, &post); + + return clk->parent->rate / (pre * post); +} + +static int _clk_sim_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + u32 pre, post; + + div = clk->parent->rate / rate; + + if ((clk->parent->rate / div) != rate) + return -EINVAL; + + __calc_pre_post_dividers(div, &pre, &post); + + /* Set SIM clock divider */ + reg = __raw_readl(MXC_CCM_CSCDR2) & + ~(MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK | + MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK); + reg |= (post - 1) << MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET; + reg |= (pre - 1) << MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR2); + + clk->rate = rate; + return 0; + +} + +static struct clk sim_clk[] = { + { + .name = "sim_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_sim_set_parent, + .secondary = &sim_clk[1], + .recalc = _clk_sim_recalc, + .round_rate = _clk_sim_round_rate, + .set_rate = _clk_sim_set_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG2_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "sim_ipg_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG1_OFFSET, + .disable = _clk_disable, + }, +}; + +static void _clk_nfc_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR); + div = ((reg & MXC_CCM_CBCDR_NFC_PODF_MASK) >> + MXC_CCM_CBCDR_NFC_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_nfc_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + /* + * Compute the divider we'd have to use to reach the target rate. + */ + + div = clk->parent->rate / rate; + + /* + * If there's a remainder after the division, then we have to increment + * the divider. There are two reasons for this: + * + * 1) The frequency we round to must be LESS THAN OR EQUAL to the + * target. We aren't allowed to round to a frequency that is higher + * than the target. + * + * 2) This also catches the case where target rate is less than the + * parent rate, which implies a divider of zero. We can't allow a + * divider of zero. + */ + + if (clk->parent->rate % rate) + div++; + + /* + * The divider for this clock is 3 bits wide, so we can't possibly + * divide the parent by more than eight. + */ + + if (div > 8) + return -EINVAL; + + return clk->parent->rate / div; + +} + +static int _clk_nfc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + struct timespec nstimeofday; + struct timespec curtime; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + + + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_NFC_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR_NFC_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR); + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & + MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY){ + getnstimeofday(&curtime); + if ((curtime.tv_nsec - nstimeofday.tv_nsec) > SPIN_DELAY) + panic("_clk_nfc_set_rate failed\n"); + } + clk->rate = rate; + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + + return 0; +} + +static struct clk emi_enfc_clk = { + .name = "nfc_clk", + .parent = &emi_slow_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG10_OFFSET, + .disable = _clk_disable_inwait, + .recalc = _clk_nfc_recalc, + .round_rate = _clk_nfc_round_rate, + .set_rate = _clk_nfc_set_rate, +}; + +static int _clk_spdif_xtal_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &osc_clk, &ckih_clk, &ckih2_clk, NULL); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk spdif_xtal_clk = { + .name = "spdif_xtal_clk", + .parent = &osc_clk, + .set_parent = _clk_spdif_xtal_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG15_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_spdif0_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + reg |= MXC_CCM_CSCMR2_SPDIF0_COM; + if (parent != &ssi1_clk[0]) { + reg &= ~MXC_CCM_CSCMR2_SPDIF0_COM; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &spdif_xtal_clk); + reg = (reg & ~MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET); + } + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_spdif0_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + if (clk->parent == &ssi1_clk[0]) { + clk->rate = clk->parent->rate; + } else { + reg = __raw_readl(MXC_CCM_CDCDR); + pred = ((reg & MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK) >> + MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK) >> + MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); + } +} + +static struct clk spdif0_clk[] = { + { + .name = "spdif_clk", + .id = 0, + .parent = &pll3_sw_clk, + .set_parent = _clk_spdif0_set_parent, + .recalc = _clk_spdif0_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG13_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "spdif_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG15_OFFSET, + .disable = _clk_disable, + }, +}; + +static int _clk_spdif1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + reg |= MXC_CCM_CSCMR2_SPDIF1_COM; + if (parent != &ssi2_clk[0]) { + reg &= ~MXC_CCM_CSCMR2_SPDIF1_COM; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &spdif_xtal_clk); + reg = (reg & ~MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET); + } + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_spdif1_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + if (clk->parent == &ssi2_clk[0]) { + clk->rate = clk->parent->rate; + } else { + reg = __raw_readl(MXC_CCM_CDCDR); + pred = ((reg & MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK) >> + MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK) >> + MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); + } +} + +static struct clk spdif1_clk[] = { + { + .name = "spdif_clk", + .id = 1, + .parent = &pll3_sw_clk, + .set_parent = _clk_spdif1_set_parent, + .recalc = _clk_spdif1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG14_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "spdif_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG15_OFFSET, + .disable = _clk_disable, + }, +}; + +static int _clk_ddr_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, reg2, mux; + struct timespec nstimeofday; + struct timespec curtime; + + reg = __raw_readl(MXC_CCM_CBCMR); + reg2 = __raw_readl(MXC_CCM_CBCDR); + mux = _get_mux_ddr(parent, &axi_a_clk, &axi_b_clk, &emi_slow_clk, &ahb_clk, &ddr_hf_clk); + if (mux < 4) { + reg = (reg & ~MXC_CCM_CBCMR_DDR_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + reg2 = (reg2 & ~MXC_CCM_CBCDR_DDR_HF_SEL); + } else { + reg2 = (reg2 & ~MXC_CCM_CBCDR_DDR_HF_SEL) | + (MXC_CCM_CBCDR_DDR_HF_SEL); + } + __raw_writel(reg2, MXC_CCM_CBCDR); + getnstimeofday(&nstimeofday); + while (__raw_readl(MXC_CCM_CDHIPR) & + MXC_CCM_CDHIPR_DDR_HF_CLK_SEL_BUSY){ + getnstimeofday(&curtime); + if ((curtime.tv_nsec - nstimeofday.tv_nsec) > SPIN_DELAY) + panic("_clk_ddr_set_parent failed\n"); + } + return 0; +} + +static struct clk ddr_clk = { + .name = "ddr_clk", + .parent = &ddr_hf_clk, + .set_parent = _clk_ddr_set_parent, + .flags = RATE_PROPAGATES, +}; + +static int _clk_arm_axi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &emi_slow_clk, &ahb_clk); + reg = (reg & ~MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + +static struct clk arm_axi_clk = { + .name = "arm_axi_clk", + .parent = &axi_a_clk, + .set_parent = _clk_arm_axi_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG1_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_vpu_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &emi_slow_clk, &ahb_clk); + reg = (reg & ~MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + +static int _clk_vpu_enable(struct clk *clk) +{ + /* Set VPU's parent to be axi_a or ahb when its enabled. */ + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) { + clk_set_parent(&vpu_clk[0], &ahb_clk); + clk_set_parent(&vpu_clk[1], &ahb_clk); + } else { + clk_set_parent(&vpu_clk[0], &axi_a_clk); + clk_set_parent(&vpu_clk[1], &axi_a_clk); + } + + return _clk_enable(clk); + +} + +static void _clk_vpu_disable(struct clk *clk) +{ + _clk_disable(clk); + + /* Set VPU's parent to be axi_b when its disabled. */ + clk_set_parent(&vpu_clk[0], &axi_b_clk); + clk_set_parent(&vpu_clk[1], &axi_b_clk); +} + +static struct clk vpu_clk[] = { + { + .name = "vpu_clk", + .set_parent = _clk_vpu_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG4_OFFSET, + .disable = _clk_disable, + .secondary = &vpu_clk[1], + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "vpu_core_clk", + .set_parent = _clk_vpu_set_parent, + .enable = _clk_vpu_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG3_OFFSET, + .disable = _clk_vpu_disable, + .secondary = &vpu_clk[2], + }, + { + .name = "vpu_emi_clk", + .parent = &emi_fast_clk, +#ifdef CONFIG_MXC_VPU_IRAM + .secondary = &emi_intr_clk, +#endif + } +}; + +static int _clk_lpsr_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CLPCR); + mux = _get_mux(parent, &ckil_clk, &fpm_clk, &fpm_div2_clk, NULL); + reg = (reg & ~MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK) | + (mux << MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CLPCR); + + return 0; +} + +static struct clk lpsr_clk = { + .name = "lpsr_clk", + .parent = &ckil_clk, + .set_parent = _clk_lpsr_set_parent, +}; + +static void _clk_pgc_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCDR1); + div = (reg & MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET; + div = 1 >> div; + clk->rate = clk->parent->rate / div; +} + +static struct clk pgc_clk = { + .name = "pgc_clk", + .parent = &ipg_clk, + .recalc = _clk_pgc_recalc, +}; + +/*usb OTG clock */ + +static struct clk usb_clk = { + .name = "usb_clk", + .rate = 60000000, +}; + +static struct clk usb_utmi_clk = { + .name = "usb_utmi_clk", + .enable = _clk_enable, + .enable_reg = MXC_CCM_CSCMR1, + .enable_shift = MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ckil_clk, + .secondary = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG14_OFFSET, + .disable = _clk_disable, +}; + +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG0_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +}; + +static struct clk owire_clk = { + .name = "owire_clk", + .parent = &ipg_perclk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG11_OFFSET, + .disable = _clk_disable, +}; + + +static struct clk fec_clk[] = { + { + .name = "fec_clk", + .parent = &ipg_clk, + .secondary = &fec_clk[1], + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG12_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "fec_sec1_clk", + .parent = &tmax2_clk, + .secondary = &fec_clk[2], + }, + { + .name = "fec_sec2_clk", + .parent = &aips_tz2_clk, + .secondary = &emi_fast_clk, + }, +}; + +static struct clk sahara_clk[] = { + { + .name = "sahara_clk", + .parent = &ahb_clk, + .secondary = &sahara_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "sahara_sec_clk", + .parent = &tmax1_clk, + .secondary = &emi_fast_clk, + } +}; + +static struct clk scc_clk[] = { + { + .name = "scc_clk", + .parent = &ahb_clk, + .secondary = &scc_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG15_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "scc_sec_clk", + .parent = &tmax1_clk, + .secondary = &emi_fast_clk, + } +}; + + +static int _clk_gpu3d_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &emi_slow_clk, &ahb_clk); + reg = (reg & ~MXC_CCM_CBCMR_GPU_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + +static struct clk gpu3d_clk = { + .name = "gpu3d_clk", + .parent = &axi_a_clk, + .set_parent = _clk_gpu3d_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG1_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +}; + +static struct clk garb_clk = { + .name = "garb_clk", + .parent = &axi_a_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG2_OFFSET, + .disable = _clk_disable, +}; + +static struct clk emi_garb_clk = { + .name = "emi_garb_clk", + .parent = &axi_a_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG4_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_gpu2d_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CBCMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &emi_slow_clk, &ahb_clk); + reg = (reg & ~MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK) | + (mux << MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CBCMR); + + return 0; +} + +static struct clk gpu2d_clk = { + .name = "gpu2d_clk", + .parent = &axi_a_clk, + .set_parent = _clk_gpu2d_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR6, + .enable_shift = MXC_CCM_CCGR6_CG7_OFFSET, + .disable = _clk_disable, + .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, +}; + +static struct clk *mxc_clks[] = { + &osc_clk, + &ckih_clk, + &ckih2_clk, + &ckil_clk, + &fpm_clk, + &fpm_div2_clk, + &pll1_main_clk, + &pll1_sw_clk, + &pll2_sw_clk, + &pll3_sw_clk, + &ipumux1_clk, + &ipumux2_clk, + &gpc_dvfs_clk, + &lp_apm_clk, + &cpu_clk, + &periph_apm_clk, + &main_bus_clk, + &axi_a_clk, + &axi_b_clk, + &ahb_clk, + &ahb_max_clk, + &ipg_clk, + &ipg_perclk, + &ahbmux1_clk, + &ahbmux2_clk, + &aips_tz1_clk, + &aips_tz2_clk, + &sdma_clk[0], + &sdma_clk[1], + &ipu_clk[0], + &ipu_clk[1], + &ipu_di_clk[0], + &ipu_di_clk[1], + &tve_clk, + &csi0_clk, + &csi1_clk, + &uart_main_clk, + &uart1_clk[0], + &uart1_clk[1], + &uart2_clk[0], + &uart2_clk[1], + &uart3_clk[0], + &uart3_clk[1], + &spba_clk, + &i2c_clk[0], + &i2c_clk[1], + &hsi2c_clk, + &hsi2c_serial_clk, + &gpt_clk[0], + &gpt_clk[1], + &gpt_clk[2], + &pwm1_clk[0], + &pwm1_clk[1], + &pwm1_clk[2], + &pwm2_clk[0], + &pwm2_clk[1], + &pwm2_clk[2], + &cspi_main_clk, + &cspi1_clk[0], + &cspi1_clk[1], + &cspi2_clk[0], + &cspi2_clk[1], + &cspi3_clk[0], + &cspi3_clk[1], + &ssi_lp_apm_clk, + &ssi1_clk[0], + &ssi1_clk[1], + &ssi1_clk[2], + &ssi2_clk[0], + &ssi2_clk[1], + &ssi2_clk[2], + &ssi_ext1_clk, + &ssi_ext2_clk, + &iim_clk, + &tmax1_clk, + &tmax2_clk, + &tmax3_clk, + &usboh3_clk[0], + &usboh3_clk[1], + &usb_ahb_clk, + &usb_phy_clk, + &usb_utmi_clk, + &usb_clk, + &esdhc1_clk[0], + &esdhc1_clk[1], + &esdhc2_clk[0], + &esdhc2_clk[1], + &esdhc3_clk[0], + &esdhc3_clk[1], + &esdhc4_clk[0], + &esdhc4_clk[1], + &esdhc_dep_clks, + &sim_clk[0], + &sim_clk[1], + &emi_slow_clk, + &ddr_clk, + &emi_enfc_clk, + &emi_fast_clk, + &emi_intr_clk, + &spdif_xtal_clk, + &spdif0_clk[0], + &spdif0_clk[1], + &spdif1_clk[0], + &spdif1_clk[1], + &arm_axi_clk, + &vpu_clk[0], + &vpu_clk[1], + &vpu_clk[2], + &lpsr_clk, + &pgc_clk, + &rtc_clk, + &ata_clk, + &owire_clk, + &fec_clk[0], + &fec_clk[1], + &fec_clk[2], + &mipi_hsc1_clk, + &mipi_hsc2_clk, + &mipi_esc_clk, + &mipi_hsp_clk, + &sahara_clk[0], + &sahara_clk[1], + &gpu3d_clk, + &garb_clk, + &emi_garb_clk, + &ddr_hf_clk, + &gpu2d_clk, + &scc_clk[0], + &scc_clk[1], +}; + +static void clk_tree_init(void) +{ + u32 reg, reg2, dp_ctl; + + ipg_perclk.set_parent(&ipg_perclk, &lp_apm_clk); + + /* + *Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at + * 8MHz, its derived from lp_apm. + */ + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~MXC_CCM_CBCDR_PERCLK_PRED1_MASK; + reg &= ~MXC_CCM_CBCDR_PERCLK_PRED2_MASK; + reg &= ~MXC_CCM_CBCDR_PERCLK_PODF_MASK; + reg |= (2 << MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET); + __raw_writel(reg, MXC_CCM_CBCDR); + + /* set pll1_main_clk parent */ + pll1_main_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[0] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll1_main_clk.parent = &fpm_clk; + /* set pll2_sw_clk parent */ + pll2_sw_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[1] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll2_sw_clk.parent = &fpm_clk; + /* set pll3_clk parent */ + pll3_sw_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[2] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll3_sw_clk.parent = &fpm_clk; + + /* set emi_slow_clk parent */ + emi_slow_clk.parent = &main_bus_clk; + reg = __raw_readl(MXC_CCM_CBCDR); + if ((reg & MXC_CCM_CBCDR_EMI_CLK_SEL) != 0) + emi_slow_clk.parent = &ahb_clk; + + /* set ipg_perclk parent */ + ipg_perclk.parent = &lp_apm_clk; + reg = __raw_readl(MXC_CCM_CBCMR); + if ((reg & MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL) != 0) { + ipg_perclk.parent = &ipg_clk; + } else { + if ((reg & MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL) == 0) + ipg_perclk.parent = &main_bus_clk; + } + + /* set DDR clock parent */ + reg = __raw_readl(MXC_CCM_CBCMR) & MXC_CCM_CBCMR_DDR_CLK_SEL_MASK; + reg >>= MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET; + reg2 = __raw_readl(MXC_CCM_CBCDR) & MXC_CCM_CBCDR_DDR_HF_SEL; + reg2 >>= MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET; + + if (reg2) { + ddr_clk.parent = &ddr_hf_clk; + } else { + if (reg == 0) { + ddr_clk.parent = &axi_a_clk; + } else if (reg == 1) { + ddr_clk.parent = &axi_b_clk; + } else if (reg == 2) { + ddr_clk.parent = &emi_slow_clk; + } else { + ddr_clk.parent = &ahb_clk; + } + } +} + +int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2) +{ + struct clk **clkp; + int i = 0, j = 0, reg; + int wp_cnt = 0; + + /* Turn off all possible clocks */ + if (mxc_jtag_enabled) { + __raw_writel(1 << MXC_CCM_CCGR0_CG0_OFFSET | + 1 << MXC_CCM_CCGR0_CG1_OFFSET | + 3 << MXC_CCM_CCGR0_CG3_OFFSET | + 3 << MXC_CCM_CCGR0_CG4_OFFSET | + 3 << MXC_CCM_CCGR0_CG8_OFFSET | + 3 << MXC_CCM_CCGR0_CG9_OFFSET | + 1 << MXC_CCM_CCGR0_CG12_OFFSET | + 1 << MXC_CCM_CCGR0_CG13_OFFSET | + 1 << MXC_CCM_CCGR0_CG14_OFFSET, MXC_CCM_CCGR0); + } else { + __raw_writel(1 << MXC_CCM_CCGR0_CG0_OFFSET | + 1 << MXC_CCM_CCGR0_CG1_OFFSET | + 1 << MXC_CCM_CCGR0_CG2_OFFSET | + 3 << MXC_CCM_CCGR0_CG3_OFFSET | + 3 << MXC_CCM_CCGR0_CG8_OFFSET | + 3 << MXC_CCM_CCGR0_CG9_OFFSET | + 1 << MXC_CCM_CCGR0_CG12_OFFSET | + 1 << MXC_CCM_CCGR0_CG13_OFFSET | + 3 << MXC_CCM_CCGR0_CG14_OFFSET, MXC_CCM_CCGR0); + } + __raw_writel(0, MXC_CCM_CCGR1); + __raw_writel(0, MXC_CCM_CCGR2); + __raw_writel(0, MXC_CCM_CCGR3); + __raw_writel(1 << MXC_CCM_CCGR4_CG8_OFFSET, MXC_CCM_CCGR4); + + __raw_writel(1 << MXC_CCM_CCGR5_CG2_OFFSET | + 1 << MXC_CCM_CCGR5_CG6_1_OFFSET | + 1 << MXC_CCM_CCGR5_CG6_2_OFFSET | + 3 << MXC_CCM_CCGR5_CG7_OFFSET | + 1 << MXC_CCM_CCGR5_CG8_OFFSET | + 3 << MXC_CCM_CCGR5_CG9_OFFSET | + 1 << MXC_CCM_CCGR5_CG10_OFFSET | + 3 << MXC_CCM_CCGR5_CG11_OFFSET, MXC_CCM_CCGR5); + + __raw_writel(1 << MXC_CCM_CCGR6_CG4_OFFSET, MXC_CCM_CCGR6); + + ckil_clk.rate = ckil; + osc_clk.rate = osc; + ckih_clk.rate = ckih1; + ckih2_clk.rate = ckih2; + + clk_tree_init(); + + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + + /*Setup the LPM bypass bits */ + reg = __raw_readl(MXC_CCM_CLPCR); + reg |= MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS + | MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS + | MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS + | MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS + | MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS; + __raw_writel(reg, MXC_CCM_CLPCR); + + /* Disable the handshake with HSC block as its not + * initialised right now. + */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_HSC_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + + /* This will propagate to all children and init all the clock rates */ + propagate_rate(&osc_clk); + propagate_rate(&ckih_clk); + propagate_rate(&ckih2_clk); + propagate_rate(&ckil_clk); + propagate_rate(&pll1_sw_clk); + propagate_rate(&pll2_sw_clk); + + clk_enable(&cpu_clk); + clk_enable(&main_bus_clk); + + reg = __raw_readl(MXC_CCM_CBCDR) & MXC_CCM_CBCDR_DDR_HF_SEL; + reg >>= MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET; + + if (reg) + clk_set_parent(&ddr_clk, &ddr_hf_clk); + else + clk_set_parent(&ddr_clk, &axi_a_clk); + + /* Initialise the parents to be axi_b, parents are set to + * axi_a when the clocks are enabled. + */ + clk_set_parent(&vpu_clk[0], &axi_b_clk); + clk_set_parent(&vpu_clk[1], &axi_b_clk); + clk_set_parent(&gpu3d_clk, &axi_a_clk); + clk_set_parent(&gpu2d_clk, &axi_a_clk); + + /* move cspi to 24MHz */ + clk_set_parent(&cspi_main_clk, &lp_apm_clk); + clk_set_rate(&cspi_main_clk, 12000000); + /*move the spdif0 to spdif_xtal_ckl */ + clk_set_parent(&spdif0_clk[0], &spdif_xtal_clk); + /*set the SPDIF dividers to 1 */ + reg = __raw_readl(MXC_CCM_CDCDR); + reg &= ~MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK; + reg &= ~MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK; + __raw_writel(reg, MXC_CCM_CDCDR); + + /* move the spdif1 to 24MHz */ + clk_set_parent(&spdif1_clk[0], &spdif_xtal_clk); + /* set the spdif1 dividers to 1 */ + reg = __raw_readl(MXC_CCM_CDCDR); + reg &= ~MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK; + reg &= ~MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK; + __raw_writel(reg, MXC_CCM_CDCDR); + + /* Move SSI clocks to SSI_LP_APM clock */ + clk_set_parent(&ssi_lp_apm_clk, &lp_apm_clk); + + clk_set_parent(&ssi1_clk[0], &ssi_lp_apm_clk); + /* set the SSI dividers to divide by 2 */ + reg = __raw_readl(MXC_CCM_CS1CDR); + reg &= ~MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK; + reg &= ~MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK; + reg |= 1 << MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CS1CDR); + + clk_set_parent(&ssi2_clk[0], &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CS2CDR); + reg &= ~MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK; + reg &= ~MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK; + reg |= 1 << MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CS2CDR); + + /* Change the SSI_EXT1_CLK to be sourced from SSI1_CLK_ROOT */ + clk_set_parent(&ssi_ext1_clk, &ssi1_clk[0]); + clk_set_parent(&ssi_ext2_clk, &ssi2_clk[0]); + + /* move usb_phy_clk to 24MHz */ + clk_set_parent(&usb_phy_clk, &osc_clk); + + /* set usboh3_clk to pll2 */ + clk_set_parent(&usboh3_clk[0], &pll2_sw_clk); + reg = __raw_readl(MXC_CCM_CSCDR1); + reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK; + reg |= 4 << MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET; + reg |= 1 << MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR1); + + /* Set the current working point. */ + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + /* Update the cpu working point table based on the PLL1 freq + * at boot time + */ + if (pll1_main_clk.rate <= cpu_wp_tbl[cpu_wp_nr - 1].cpu_rate) + wp_cnt = 1; + else if (pll1_main_clk.rate <= cpu_wp_tbl[1].cpu_rate && + pll1_main_clk.rate > cpu_wp_tbl[2].cpu_rate) + wp_cnt = cpu_wp_nr - 1; + else + wp_cnt = cpu_wp_nr; + + cpu_wp_tbl[0].cpu_rate = pll1_main_clk.rate; + + if (wp_cnt == 1) { + cpu_wp_tbl[0] = cpu_wp_tbl[cpu_wp_nr - 1]; + memset(&cpu_wp_tbl[cpu_wp_nr - 1], 0, sizeof(struct cpu_wp)); + memset(&cpu_wp_tbl[cpu_wp_nr - 2], 0, sizeof(struct cpu_wp)); + } else if (wp_cnt < cpu_wp_nr) { + for (i = 0; i < wp_cnt; i++) + cpu_wp_tbl[i] = cpu_wp_tbl[i+1]; + memset(&cpu_wp_tbl[i], 0, sizeof(struct cpu_wp)); + } + + if (wp_cnt < cpu_wp_nr) { + set_num_cpu_wp(wp_cnt); + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + } + + + for (j = 0; j < cpu_wp_nr; j++) { + if ((ddr_clk.parent == &ddr_hf_clk)) { + /* Change the CPU podf divider based on the boot up + * pll1 rate. + */ + cpu_wp_tbl[j].cpu_podf = + (pll1_main_clk.rate / cpu_wp_tbl[j].cpu_rate) + - 1; + if (pll1_main_clk.rate/(cpu_wp_tbl[j].cpu_podf + 1) > + cpu_wp_tbl[j].cpu_rate) { + cpu_wp_tbl[j].cpu_podf++; + cpu_wp_tbl[j].cpu_rate = + pll1_main_clk.rate/ + (1000 * (cpu_wp_tbl[j].cpu_podf + 1)); + cpu_wp_tbl[j].cpu_rate *= 1000; + } + if (pll1_main_clk.rate/(cpu_wp_tbl[j].cpu_podf + 1) < + cpu_wp_tbl[j].cpu_rate) { + cpu_wp_tbl[j].cpu_rate = pll1_main_clk.rate; + } + } + cpu_wp_tbl[j].pll_rate = pll1_main_clk.rate; + } + /* Set the current working point. */ + for (i = 0; i < cpu_wp_nr; i++) { + if (clk_get_rate(&cpu_clk) == cpu_wp_tbl[i].cpu_rate) { + cpu_curr_wp = i; + break; + } + } + if (i > cpu_wp_nr) + BUG(); + + propagate_rate(&osc_clk); + propagate_rate(&pll1_sw_clk); + propagate_rate(&pll2_sw_clk); + + /*Allow for automatic gating of the EMI internal clock. + * If this is done, emi_intr CCGR bits should be set to 11. + */ + reg = __raw_readl((IO_ADDRESS(M4IF_BASE_ADDR) + 0x8c)); + reg &= ~0x1; + __raw_writel(reg, (IO_ADDRESS(M4IF_BASE_ADDR) + 0x8c)); + + clk_set_parent(&arm_axi_clk, &axi_a_clk); + clk_set_parent(&ipu_clk[0], &axi_b_clk); + clk_set_parent(&uart_main_clk, &pll2_sw_clk); + + clk_set_parent(&emi_slow_clk, &ahb_clk); + clk_set_rate(&emi_slow_clk, clk_round_rate(&emi_slow_clk, 130000000)); + + /* Change the NFC clock rate to be 1:4 ratio with emi clock. */ + clk_set_rate(&emi_enfc_clk, clk_round_rate(&emi_enfc_clk, + (clk_get_rate(&emi_slow_clk))/4)); + + mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); + return 0; +} + +/*! + * Setup cpu clock based on working point. + * @param wp cpu freq working point + * @return 0 on success or error code on failure. + */ +static int cpu_clk_set_wp(int wp) +{ + struct cpu_wp *p; + u32 reg; + u32 stat; + + if (wp == cpu_curr_wp) + return 0; + + p = &cpu_wp_tbl[wp]; + + /* + * If DDR clock is sourced from PLL1, we cannot drop PLL1 freq. + * Use the ARM_PODF to change the freq of the core, leave the PLL1 + * freq unchanged. + */ + if (ddr_clk.parent == &ddr_hf_clk) { + reg = __raw_readl(MXC_CCM_CACRR); + reg &= ~MXC_CCM_CACRR_ARM_PODF_MASK; + reg |= cpu_wp_tbl[wp].cpu_podf << MXC_CCM_CACRR_ARM_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CACRR); + cpu_curr_wp = wp; + cpu_clk.rate = cpu_wp_tbl[wp].cpu_rate; + } else { + struct timespec nstimeofday; + struct timespec curtime; + + /* Change the ARM clock to requested frequency */ + /* First move the ARM clock to step clock which is running + * at 24MHz. + */ + + /* Change the source of pll1_sw_clk to be the step_clk */ + reg = __raw_readl(MXC_CCM_CCSR); + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); + + /* Stop the PLL */ + reg = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + reg &= ~MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + + /* PDF and MFI */ + reg = p->pdf | p->mfi << MXC_PLL_DP_OP_MFI_OFFSET; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_OP); + + /* MFD */ + __raw_writel(p->mfd, MXC_DPLL1_BASE + MXC_PLL_DP_MFD); + + /* MFI */ + __raw_writel(p->mfn, MXC_DPLL1_BASE + MXC_PLL_DP_MFN); + + reg = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + reg |= MXC_PLL_DP_CTL_UPEN; + /* Set the UPEN bits */ + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + /* Forcefully restart the PLL */ + reg |= MXC_PLL_DP_CTL_RST; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + + /* Wait for the PLL to lock */ + getnstimeofday(&nstimeofday); + do { + getnstimeofday(&curtime); + if ((curtime.tv_nsec - nstimeofday.tv_nsec) > SPIN_DELAY) + panic("pll1 relock failed\n"); + stat = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL) & + MXC_PLL_DP_CTL_LRF; + } while (!stat); + + reg = __raw_readl(MXC_CCM_CCSR); + /* Move the PLL1 back to the pll1_main_clk */ + reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); + + cpu_curr_wp = wp; + + pll1_sw_clk.rate = cpu_wp_tbl[wp].cpu_rate; + pll1_main_clk.rate = pll1_sw_clk.rate; + cpu_clk.rate = pll1_sw_clk.rate; + } + +#if defined(CONFIG_CPU_FREQ) + cpufreq_trig_needed = 1; +#endif + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/usb_dr.c @@ -0,0 +1,207 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static int usbotg_init_ext(struct platform_device *pdev); +static void usbotg_uninit_ext(struct fsl_usb2_platform_data *pdata); +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable); +static void usbotg_clock_gate(bool on); + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = { + .name = "DR", + .platform_init = usbotg_init_ext, + .platform_uninit = usbotg_uninit_ext, + .phy_mode = FSL_USB2_PHY_UTMI_WIDE, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbotg_hs_active, + .gpio_usb_inactive = gpio_usbotg_hs_inactive, + .usb_clock_for_pm = usbotg_clock_gate, + .wake_up_enable = _wake_up_enable, + .transceiver = "utmi", +}; + + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)(USB_OTGREGS_BASE), + .end = (u32)(USB_OTGREGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +/* Notes: configure USB clock*/ +static int usbotg_init_ext(struct platform_device *pdev) +{ + struct clk *usb_clk; + + usb_clk = clk_get(NULL, "usboh3_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usb_phy_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + /*derive clock from oscillator */ + usb_clk = clk_get(NULL, "usb_utmi_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + + return usbotg_init(pdev); +} + +static void usbotg_uninit_ext(struct fsl_usb2_platform_data *pdata) +{ + struct clk *usb_clk; + + usb_clk = clk_get(NULL, "usboh3_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usb_phy_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + + usbotg_uninit(pdata); +} + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable) +{ + if (get_usb_mode(pdata) == FSL_USB_DR_DEVICE) { + if (enable) { + USBCTRL |= UCTRL_OWIE; + USBCTRL_HOST2 |= UCTRL_H2OVBWK_EN; + USB_PHY_CTR_FUNC |= USB_UTMI_PHYCTRL_CONF2; + } else { + USBCTRL &= ~UCTRL_OWIE; + USBCTRL_HOST2 &= ~UCTRL_H2OVBWK_EN; + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_CONF2; + } + } else { + if (enable) { + USBCTRL |= UCTRL_OWIE; + USBCTRL_HOST2 |= (1 << 5); + } else { + USBCTRL &= ~UCTRL_OWIE; + USBCTRL_HOST2 &= ~(1 << 5); + } + } +} + +static void usbotg_clock_gate(bool on) +{ + struct clk *usb_clk; + + if (on) { + usb_clk = clk_get(NULL, "usb_ahb_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usboh3_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usb_phy_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + /*derive clock from oscillator */ + usb_clk = clk_get(NULL, "usb_utmi_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + } else { + usb_clk = clk_get(NULL, "usboh3_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usb_phy_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + + usb_clk = clk_get(NULL, "usb_ahb_clk"); + clk_disable(usb_clk); + clk_put(usb_clk); + } +} + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); + + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/bus_freq.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/bus_freq.c @@ -0,0 +1,581 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file bus_freq.c + * + * @brief A common API for the Freescale Semiconductor i.MXC CPUfreq module + * and DVFS CORE module. + * + * The APIs are for setting bus frequency to low or high. + * + * @ingroup PM + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +#define LP_NORMAL_CLK 133000000 +#define LP_MED_CLK 83125000 +#define LP_APM_CLK 24000000 +#define NAND_LP_APM_CLK 12000000 +#define DDR_LOW_FREQ_CLK 133000000 +#define DDR_NORMAL_CLK 200000000 +#define AXI_A_NORMAL_CLK 166250000 +#define AXI_A_CLK_NORMAL_DIV 4 +#define AXI_B_CLK_NORMAL_DIV 5 +#define AHB_CLK_NORMAL_DIV AXI_B_CLK_NORMAL_DIV +#define EMI_SLOW_CLK_NORMAL_DIV AXI_B_CLK_NORMAL_DIV +#define NFC_CLK_NORMAL_DIV 4 + +static struct clk *ddr_clk; +static struct clk *pll2; +static struct clk *main_bus_clk; +static struct clk *axi_a_clk; +static struct clk *axi_b_clk; +static struct clk *cpu_clk; +static struct clk *ddr_hf_clk; +static struct clk *nfc_clk; +static struct clk *ahb_clk; +static struct clk *vpu_clk; +static struct clk *vpu_core_clk; +static struct clk *emi_slow_clk; +static struct clk *ddr_clk; +static struct clk *ipu_clk; +static struct clk *periph_apm_clk; +static struct clk *lp_apm; +static struct clk *osc; +static struct clk *gpc_dvfs_clk; +static struct clk *mipi_hsp_clk; +struct regulator *lp_regulator; +int low_bus_freq_mode; +int high_bus_freq_mode; +int bus_freq_scaling_initialized; +char *gp_reg_id = "SW1"; +char *lp_reg_id = "SW2"; + +static struct cpu_wp *cpu_wp_tbl; +static struct device *busfreq_dev; +static int busfreq_suspended; +/* True if bus_frequency is scaled not using DVFS-PER */ +int bus_freq_scaling_is_active; + +extern int lp_high_freq; +extern int lp_med_freq; +extern int dvfs_core_is_active; +extern struct cpu_wp *(*get_cpu_wp)(int *wp); +extern int cpu_wp_nr; + +struct dvfs_wp dvfs_core_setpoint[] = { + {33, 8, 33, 10, 10, 0x08}, + {26, 0, 33, 20, 10, 0x08}, + {28, 8, 33, 20, 30, 0x08}, + {29, 0, 33, 20, 10, 0x08},}; + +#define DISABLE_PLL1 + +int set_low_bus_freq(void) +{ + struct clk *tclk; + u32 reg; + + if (busfreq_suspended) + return 0; + + if (bus_freq_scaling_initialized) { + if (clk_get_rate(cpu_clk) != cpu_wp_tbl[cpu_wp_nr - 1].cpu_rate) + return 0; + + stop_dvfs_per(); + + stop_sdram_autogating(); +#ifdef DISABLE_PLL1 + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "axi_a_clk")); + + /* Set CPU clock to be derived from PLL2 instead of PLL1 */ + tclk = clk_get(NULL, "pll1_sw_clk"); + clk_set_parent(tclk, clk_get(NULL, "pll2")); + clk_enable(tclk); + + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "ddr_hf_clk")); +#endif + + /*Change the DDR freq to 133Mhz. */ + clk_set_rate(ddr_hf_clk, + clk_round_rate(ddr_hf_clk, DDR_LOW_FREQ_CLK)); + + clk_enable(gpc_dvfs_clk); + + /* Setup the GPC. */ + reg = __raw_readl(MXC_GPC_VCR); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + + reg |= (1 << MXC_GPCVCR_VCNTU_OFFSET) | + (0 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, MXC_GPC_VCR); + + reg = __raw_readl(MXC_GPC_CNTR); + reg &= ~(MXC_GPCCNTR_ADU_MASK | MXC_GPCCNTR_FUPD_MASK); + reg |= MXC_GPCCNTR_FUPD; + __raw_writel(reg, MXC_GPC_CNTR); + + /* Enable DVFS-PER */ + reg = __raw_readl(MXC_DVFSPER_PMCR0); + reg &= ~(MXC_DVFSPER_PMCR0_UDCS_MASK | + MXC_DVFSPER_PMCR0_ENABLE_MASK); + reg |= MXC_DVFSPER_PMCR0_ENABLE; + __raw_writel(reg, MXC_DVFSPER_PMCR0); + + /* Set the dvfs-podf to divide by 4. */ + reg = __raw_readl(MXC_CCM_CDCR); + reg &= ~MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK; + reg |= 3 << MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CDCR); + + /* Setup the GPC */ + reg = __raw_readl(MXC_GPC_VCR) & ~MXC_GPCVCR_VINC_MASK; + /* Set VINC to 0. */ + reg |= 0 << MXC_GPCVCR_VINC_OFFSET; + __raw_writel(reg, MXC_GPC_VCR); + + reg = __raw_readl(MXC_GPC_CNTR); + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, MXC_GPC_CNTR); + while (__raw_readl(MXC_GPC_CNTR) & MXC_GPCCNTR_STRT) + udelay(10); + + /* Disable DVFS-PER */ + reg = __raw_readl(MXC_DVFSPER_PMCR0); + reg &= ~MXC_DVFSPER_PMCR0_ENABLE; + __raw_writel(reg, MXC_DVFSPER_PMCR0); + + /* Set the dividers to be close to 24Mhz from 166.25MHz*/ + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~(MXC_CCM_CBCDR_AXI_A_PODF_MASK + | MXC_CCM_CBCDR_AXI_B_PODF_MASK + | MXC_CCM_CBCDR_AHB_PODF_MASK + | MXC_CCM_CBCDR_EMI_PODF_MASK + | MXC_CCM_CBCDR_NFC_PODF_OFFSET); + reg |= (6 << MXC_CCM_CBCDR_AXI_A_PODF_OFFSET + | 6 << MXC_CCM_CBCDR_AXI_B_PODF_OFFSET + | 6 << MXC_CCM_CBCDR_AHB_PODF_OFFSET + | 6 << MXC_CCM_CBCDR_EMI_PODF_OFFSET + | 3 << MXC_CCM_CBCDR_NFC_PODF_OFFSET); + __raw_writel(reg, MXC_CCM_CBCDR); + + while (__raw_readl(MXC_CCM_CDHIPR) & 0x1F) + udelay(10); + + low_bus_freq_mode = 1; + high_bus_freq_mode = 0; + clk_set_parent(main_bus_clk, pll2); + } + return 0; +} + +int set_high_bus_freq(int high_bus_freq) +{ + u32 reg; + struct clk *tclk; + + if (bus_freq_scaling_initialized) { + stop_sdram_autogating(); + + if (low_bus_freq_mode) { + reg = __raw_readl(MXC_CCM_CBCDR); + reg &= ~(MXC_CCM_CBCDR_AXI_A_PODF_MASK + | MXC_CCM_CBCDR_AXI_B_PODF_MASK + | MXC_CCM_CBCDR_AHB_PODF_MASK + | MXC_CCM_CBCDR_EMI_PODF_MASK + | MXC_CCM_CBCDR_NFC_PODF_OFFSET); + reg |= (3 << MXC_CCM_CBCDR_AXI_A_PODF_OFFSET + | 4 << MXC_CCM_CBCDR_AXI_B_PODF_OFFSET + | 4 << MXC_CCM_CBCDR_AHB_PODF_OFFSET + | 4 << MXC_CCM_CBCDR_EMI_PODF_OFFSET + | 3 << MXC_CCM_CBCDR_NFC_PODF_OFFSET); + __raw_writel(reg, MXC_CCM_CBCDR); + while (__raw_readl(MXC_CCM_CDHIPR) & 0x1F) + udelay(10); + + /* Setup the GPC. */ + reg = __raw_readl(MXC_GPC_VCR); + reg &= ~(MXC_GPCVCR_VINC_MASK | MXC_GPCVCR_VCNTU_MASK | + MXC_GPCVCR_VCNT_MASK); + + reg |= (1 << MXC_GPCVCR_VCNTU_OFFSET) | + (0 << MXC_GPCVCR_VCNT_OFFSET); + __raw_writel(reg, MXC_GPC_VCR); + + reg = __raw_readl(MXC_GPC_CNTR); + reg &= ~(MXC_GPCCNTR_ADU_MASK | MXC_GPCCNTR_FUPD_MASK); + reg |= MXC_GPCCNTR_FUPD; + __raw_writel(reg, MXC_GPC_CNTR); + + /* Enable DVFS-PER */ + reg = __raw_readl(MXC_DVFSPER_PMCR0); + reg |= MXC_DVFSPER_PMCR0_UDCS; + reg |= MXC_DVFSPER_PMCR0_ENABLE; + __raw_writel(reg, MXC_DVFSPER_PMCR0); + + /* Set the dvfs-podf to divide by 1. */ + reg = __raw_readl(MXC_CCM_CDCR); + reg &= ~MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK; + reg |= 1 << MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CDCR); + + /* Setup the GPC */ + reg = __raw_readl(MXC_GPC_VCR) & ~MXC_GPCVCR_VINC_MASK; + /* Set VINC to 1. */ + reg |= 1 << MXC_GPCVCR_VINC_OFFSET; + __raw_writel(reg, MXC_GPC_VCR); + + reg = __raw_readl(MXC_GPC_CNTR); + reg |= MXC_GPCCNTR_STRT; + __raw_writel(reg, MXC_GPC_CNTR); + while (__raw_readl(MXC_GPC_CNTR) & MXC_GPCCNTR_STRT) + udelay(10); + + /* Disable DVFS-PER */ + reg = __raw_readl(MXC_DVFSPER_PMCR0); + reg &= ~MXC_DVFSPER_PMCR0_ENABLE; + __raw_writel(reg, MXC_DVFSPER_PMCR0); + + low_bus_freq_mode = 0; + clk_set_parent(main_bus_clk, pll2); + clk_disable(gpc_dvfs_clk); +#ifdef DISABLE_PLL1 + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "axi_a_clk")); + + /* Set CPU clock to be derived from PLL1 instead of PLL2 */ + tclk = clk_get(NULL, "pll1_sw_clk"); + clk_set_parent(tclk, clk_get(NULL, "pll1_main_clk")); + clk_disable(tclk); + + tclk = clk_get(NULL, "ddr_clk"); + clk_set_parent(tclk, clk_get(NULL, "ddr_hf_clk")); +#endif + /*Change the DDR freq to 200MHz*/ + clk_set_rate(ddr_hf_clk, + clk_round_rate(ddr_hf_clk, DDR_NORMAL_CLK)); + + start_dvfs_per(); + } + if (bus_freq_scaling_is_active) { + /* + * If the CPU freq is 800MHz, set the bus to the high setpoint + * (133MHz) and DDR to 200MHz. + */ + if (clk_get_rate(cpu_clk) != cpu_wp_tbl[cpu_wp_nr - 1].cpu_rate) + high_bus_freq = 1; + + if (((clk_get_rate(ahb_clk) == LP_MED_CLK) && lp_high_freq) || + high_bus_freq) { + /* Set to the high setpoint. */ + high_bus_freq_mode = 1; + clk_set_rate(ahb_clk, + clk_round_rate(ahb_clk, LP_NORMAL_CLK)); + clk_set_rate(ddr_hf_clk, + clk_round_rate(ddr_hf_clk, DDR_NORMAL_CLK)); + } + if (!lp_high_freq && !high_bus_freq) { + /* Set to the medium setpoint. */ + high_bus_freq_mode = 0; + low_bus_freq_mode = 0; + clk_set_rate(ddr_hf_clk, + clk_round_rate(ddr_hf_clk, DDR_LOW_FREQ_CLK)); + clk_set_rate(ahb_clk, + clk_round_rate(ahb_clk, LP_MED_CLK)); + } + } + start_sdram_autogating(); + } + return 0; +} + +int low_freq_bus_used(void) +{ + if ((clk_get_usecount(ipu_clk) == 0) + && (clk_get_usecount(vpu_clk) == 0) + && (lp_high_freq == 0) + && (lp_med_freq == 0)) + return 1; + else + return 0; +} + +void setup_pll(void) +{ +} + +static ssize_t bus_freq_scaling_enable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (bus_freq_scaling_is_active) + return sprintf(buf, "Bus frequency scaling is enabled\n"); + else + return sprintf(buf, "Bus frequency scaling is disabled\n"); +} + +static ssize_t bus_freq_scaling_enable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u32 reg; + + + if (strstr(buf, "1") != NULL) { + if (dvfs_per_active()) { + printk(KERN_INFO "bus frequency scaling cannot be\ + enabled when DVFS-PER is active\n"); + return size; + } + + /* Initialize DVFS-PODF to 0. */ + reg = __raw_readl(MXC_CCM_CDCR); + reg &= ~MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK; + __raw_writel(reg, MXC_CCM_CDCR); + clk_set_parent(main_bus_clk, pll2); + + bus_freq_scaling_is_active = 1; + } + else if (strstr(buf, "0") != NULL) { + if (bus_freq_scaling_is_active) + set_high_bus_freq(1); + bus_freq_scaling_is_active = 0; + } + return size; +} + +static int busfreq_suspend(struct platform_device *pdev, pm_message_t message) +{ + if (low_bus_freq_mode) + set_high_bus_freq(1); + busfreq_suspended = 1; + return 0; +} + +static int busfreq_resume(struct platform_device *pdev) +{ + busfreq_suspended = 0; + return 0; +} + +static DEVICE_ATTR(enable, 0644, bus_freq_scaling_enable_show, + bus_freq_scaling_enable_store); + +/*! + * This is the probe routine for the bus frequency driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit busfreq_probe(struct platform_device *pdev) +{ + int err = 0; + + busfreq_dev = &pdev->dev; + + main_bus_clk = clk_get(NULL, "main_bus_clk"); + if (IS_ERR(main_bus_clk)) { + printk(KERN_DEBUG "%s: failed to get main_bus_clk\n", + __func__); + return PTR_ERR(main_bus_clk); + } + + pll2 = clk_get(NULL, "pll2"); + if (IS_ERR(pll2)) { + printk(KERN_DEBUG "%s: failed to get pll2\n", __func__); + return PTR_ERR(pll2); + } + + axi_a_clk = clk_get(NULL, "axi_a_clk"); + if (IS_ERR(axi_a_clk)) { + printk(KERN_DEBUG "%s: failed to get axi_a_clk\n", + __func__); + return PTR_ERR(axi_a_clk); + } + + axi_b_clk = clk_get(NULL, "axi_b_clk"); + if (IS_ERR(axi_b_clk)) { + printk(KERN_DEBUG "%s: failed to get axi_b_clk\n", + __func__); + return PTR_ERR(axi_b_clk); + } + + ddr_hf_clk = clk_get(NULL, "ddr_hf_clk"); + if (IS_ERR(ddr_hf_clk)) { + printk(KERN_DEBUG "%s: failed to get ddr_hf_clk\n", + __func__); + return PTR_ERR(ddr_hf_clk); + } + + emi_slow_clk = clk_get(NULL, "emi_slow_clk"); + if (IS_ERR(emi_slow_clk)) { + printk(KERN_DEBUG "%s: failed to get emi_slow_clk\n", + __func__); + return PTR_ERR(emi_slow_clk); + } + + nfc_clk = clk_get(NULL, "nfc_clk"); + if (IS_ERR(nfc_clk)) { + printk(KERN_DEBUG "%s: failed to get nfc_clk\n", + __func__); + return PTR_ERR(nfc_clk); + } + + ahb_clk = clk_get(NULL, "ahb_clk"); + if (IS_ERR(ahb_clk)) { + printk(KERN_DEBUG "%s: failed to get ahb_clk\n", + __func__); + return PTR_ERR(ahb_clk); + } + + vpu_core_clk = clk_get(NULL, "vpu_core_clk"); + if (IS_ERR(vpu_core_clk)) { + printk(KERN_DEBUG "%s: failed to get vpu_core_clk\n", + __func__); + return PTR_ERR(vpu_core_clk); + } + + ddr_clk = clk_get(NULL, "ddr_clk"); + if (IS_ERR(ddr_clk)) { + printk(KERN_DEBUG "%s: failed to get ddr_clk\n", + __func__); + return PTR_ERR(ddr_clk); + } + + cpu_clk = clk_get(NULL, "cpu_clk"); + if (IS_ERR(cpu_clk)) { + printk(KERN_DEBUG "%s: failed to get cpu_clk\n", + __func__); + return PTR_ERR(cpu_clk); + } + + ipu_clk = clk_get(NULL, "ipu_clk"); + if (IS_ERR(ipu_clk)) { + printk(KERN_DEBUG "%s: failed to get ipu_clk\n", + __func__); + return PTR_ERR(ipu_clk); + } + + mipi_hsp_clk = clk_get(NULL, "mipi_hsp_clk"); + if (IS_ERR(mipi_hsp_clk)) { + printk(KERN_DEBUG "%s: failed to get mipi_hsp_clk\n", + __func__); + return PTR_ERR(mipi_hsp_clk); + } + + vpu_clk = clk_get(NULL, "vpu_clk"); + if (IS_ERR(vpu_clk)) { + printk(KERN_DEBUG "%s: failed to get vpu_clk\n", + __func__); + return PTR_ERR(vpu_clk); + } + + periph_apm_clk = clk_get(NULL, "periph_apm_clk"); + if (IS_ERR(periph_apm_clk)) { + printk(KERN_DEBUG "%s: failed to get periph_apm_clk\n", + __func__); + return PTR_ERR(periph_apm_clk); + } + + lp_apm = clk_get(NULL, "lp_apm"); + if (IS_ERR(lp_apm)) { + printk(KERN_DEBUG "%s: failed to get lp_apm\n", + __func__); + return PTR_ERR(lp_apm); + } + + osc = clk_get(NULL, "osc"); + if (IS_ERR(osc)) { + printk(KERN_DEBUG "%s: failed to get osc\n", __func__); + return PTR_ERR(osc); + } + + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs_clk"); + if (IS_ERR(gpc_dvfs_clk)) { + printk(KERN_DEBUG "%s: failed to get gpc_dvfs_clk\n", __func__); + return PTR_ERR(gpc_dvfs_clk); + } + + err = sysfs_create_file(&busfreq_dev->kobj, &dev_attr_enable.attr); + if (err) { + printk(KERN_ERR + "Unable to register sysdev entry for BUSFREQ"); + return err; + } + + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + low_bus_freq_mode = 0; + high_bus_freq_mode = 1; + bus_freq_scaling_is_active = 0; + bus_freq_scaling_initialized = 1; + + return 0; +} + +static struct platform_driver busfreq_driver = { + .driver = { + .name = "busfreq", + }, + .probe = busfreq_probe, + .suspend = busfreq_suspend, + .resume = busfreq_resume, +}; + +/*! + * Initialise the busfreq_driver. + * + * @return The function always returns 0. + */ + +static int __init busfreq_init(void) +{ + if (platform_driver_register(&busfreq_driver) != 0) { + printk(KERN_ERR "busfreq_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "Bus freq driver module loaded\n"); + return 0; +} + +static void __exit busfreq_cleanup(void) +{ + sysfs_remove_file(&busfreq_dev->kobj, &dev_attr_enable.attr); + + /* Unregister the device structure */ + platform_driver_unregister(&busfreq_driver); + bus_freq_scaling_initialized = 0; +} + +module_init(busfreq_init); +module_exit(busfreq_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("BusFreq driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/iomux.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/iomux.c @@ -0,0 +1,244 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup GPIO_MX51 Board GPIO and Muxing Setup + * @ingroup MSL_MX51 + */ +/*! + * @file mach-mx51/iomux.c + * + * @brief I/O Muxing control functions + * + * @ingroup GPIO_MX51 + */ + +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/*! + * IOMUX register (base) addresses + */ +#define IOMUXGPR0 (IO_ADDRESS(IOMUXC_BASE_ADDR)) +#define IOMUXGPR1 (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x004) +#define IOMUXSW_MUX_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR)) +#define IOMUXSW_MUX_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + MUX_I_END) +#define IOMUXSW_PAD_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + PAD_I_START) +#define IOMUXSW_INPUT_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR)) + +#define MUX_PIN_NUM_MAX ((MUX_I_END >> 2) + 1) + +static u8 iomux_pin_res_table[MUX_PIN_NUM_MAX]; +static DEFINE_SPINLOCK(gpio_mux_lock); + +static inline void * _get_mux_reg(iomux_pin_name_t pin) +{ + u32 mux_reg = PIN_TO_IOMUX_MUX(pin); + + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) { + if ((pin == MX51_PIN_NANDF_RB5) || + (pin == MX51_PIN_NANDF_RB6) || + (pin == MX51_PIN_NANDF_RB7)) + ; /* Do nothing */ + else if (mux_reg >= 0x2FC) + mux_reg += 8; + else if (mux_reg >= 0x130) + mux_reg += 0xC; + } + return IOMUXSW_MUX_CTL + mux_reg; +} + +static inline void * _get_pad_reg(iomux_pin_name_t pin) +{ + u32 pad_reg = PIN_TO_IOMUX_PAD(pin); + + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) { + if ((pin == MX51_PIN_NANDF_RB5) || + (pin == MX51_PIN_NANDF_RB6) || + (pin == MX51_PIN_NANDF_RB7)) + ; /* Do nothing */ + else if (pad_reg == 0x4D0 - PAD_I_START) + pad_reg += 0x4C; + else if (pad_reg == 0x860 - PAD_I_START) + pad_reg += 0x9C; + else if (pad_reg >= 0x804 - PAD_I_START) + pad_reg += 0xB0; + else if (pad_reg >= 0x7FC - PAD_I_START) + pad_reg += 0xB4; + else if (pad_reg >= 0x4E4 - PAD_I_START) + pad_reg += 0xCC; + else + pad_reg += 8; + } + return IOMUXSW_PAD_CTL + pad_reg; +} + +static inline void * _get_mux_end(void) +{ + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) + return(IO_ADDRESS(IOMUXC_BASE_ADDR) + (0x3F8 - 4)); + else + return(IO_ADDRESS(IOMUXC_BASE_ADDR) + (0x3F0 - 4)); +} + +/*! + * This function is used to configure a pin through the IOMUX module. + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config a configuration as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + u32 ret = 0; + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + void __iomem *mux_reg = _get_mux_reg(pin); + u32 mux_data = 0; + u8 *rp; + + BUG_ON((mux_reg > _get_mux_end()) || (mux_reg < IOMUXSW_MUX_CTL)); + spin_lock(&gpio_mux_lock); + + if (config == IOMUX_CONFIG_GPIO) + mux_data = PIN_TO_ALT_GPIO(pin); + else + mux_data = config; + + __raw_writel(mux_data, mux_reg); + + /* + * Log a warning if a pin changes ownership + */ + rp = iomux_pin_res_table + pin_index; + if ((mux_data & *rp) && (*rp != mux_data)) { + /* + * Don't call printk if we're tweaking the console uart or + * we'll deadlock. + */ + printk(KERN_ERR "iomux_config_mux: Warning: iomux pin" + " config changed, reg=%p, " + " prev=0x%x new=0x%x\n", mux_reg, *rp, mux_data); + ret = -EINVAL; + } + *rp = mux_data; + spin_unlock(&gpio_mux_lock); + return ret; +} + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config a configuration as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + int ret = iomux_config_mux(pin, config); + int gpio = IOMUX_TO_GPIO(pin); + + if (!ret && (gpio < MXC_GPIO_IRQS) && ((config == IOMUX_CONFIG_GPIO) + || (config == PIN_TO_ALT_GPIO(pin)))) + ret |= gpio_request(gpio, NULL); + + return ret; +} +EXPORT_SYMBOL(mxc_request_iomux); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + u8 *rp = iomux_pin_res_table + pin_index; + int gpio = IOMUX_TO_GPIO(pin); + + *rp = 0; + if ((gpio < MXC_GPIO_IRQS) + && ((config == IOMUX_CONFIG_GPIO) + || (config == PIN_TO_ALT_GPIO(pin)))) + gpio_free(gpio); + +} +EXPORT_SYMBOL(mxc_free_iomux); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config) +{ + void __iomem *pad_reg = _get_pad_reg(pin); + + BUG_ON(pad_reg < IOMUXSW_PAD_CTL); + __raw_writel(config, pad_reg); +} +EXPORT_SYMBOL(mxc_iomux_set_pad); + +unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin) +{ + void __iomem *pad_reg = _get_pad_reg(pin); + + return __raw_readl(pad_reg); +} +EXPORT_SYMBOL(mxc_iomux_get_pad); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b #iomux_input_select_t + * @param config the binary value of elements defined in \b #iomux_input_config_t + * */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config) +{ + void __iomem *reg; + + if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) { + if (input == MUX_IN_IPU_IPP_DI_0_IND_DISPB_SD_D_SELECT_INPUT) + input -= 4; + else if (input == MUX_IN_IPU_IPP_DI_1_IND_DISPB_SD_D_SELECT_INPUT) + input -= 3; + else if (input >= MUX_IN_KPP_IPP_IND_COL_6_SELECT_INPUT) + input -= 2; + else if (input >= MUX_IN_HSC_MIPI_MIX_PAR_SISG_TRIG_SELECT_INPUT) + input -= 5; + else if (input >= MUX_IN_HSC_MIPI_MIX_IPP_IND_SENS1_DATA_EN_SELECT_INPUT) + input -= 3; + else if (input >= MUX_IN_ECSPI2_IPP_IND_SS_B_3_SELECT_INPUT) + input -= 2; + else if (input >= MUX_IN_CCM_PLL1_BYPASS_CLK_SELECT_INPUT) + input -= 1; + + reg = IOMUXSW_INPUT_CTL + (input << 2) + INPUT_CTL_START_TO1; + } else { + reg = IOMUXSW_INPUT_CTL + (input << 2) + INPUT_CTL_START; + } + + BUG_ON(input >= MUX_INPUT_NUM_MUX); + __raw_writel(config, reg); +} +EXPORT_SYMBOL(mxc_iomux_set_input); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/wfi.S +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/wfi.S @@ -0,0 +1,426 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +#define ARM_CTRL_DCACHE 1 << 2 +#define ARM_AUXCR_L2EN 1 << 1 +/* + * cpu_cortexa8_do_idle() + * + * Idle the processor (eg, wait for interrupt). + * + * IRQs are already disabled. + */ +ENTRY(cpu_cortexa8_do_idle) + + mrc p15, 0, r1, c1, c0, 1 @ R1 = auxiliary control reg + ands r2, r1, #ARM_AUXCR_L2EN @ Check if L2 is disabled + beq SkipL2Access + + mrc p15, 0, r2, c1, c0, 0 @ R2 = system control reg + bic r2, r2, #ARM_CTRL_DCACHE @ Disable DCache + mcr p15, 0, r2, c1, c0, 0 @ Update system control reg + + bic r1, r1, #ARM_AUXCR_L2EN @ Disable L2 cache + mcr p15, 0, r1, c1, c0, 1 @ Update aux control reg + + ldr r1, =(0x0 << 6) @ A[6] = 0 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x00] @ Save tag info + + ldr r1, =(0x1 << 6) @ A[6] = 1 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x04] @ Save tag info + + ldr r1, =(0x0 << 3) @ A[6:3] = b0000 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x08] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x0C] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x10] @ Store data info + + ldr r1, =(0x1 << 3) @ A[6:3] = b0001 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x14] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x18] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x1C] @ Store data info + + ldr r1, =(0x2 << 3) @ A[6:3] = b0010 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x20] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x24] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x28] @ Store data info + + ldr r1, =(0x3 << 3) @ A[6:3] = b0011 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x2C] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x30] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x34] @ Store data info + + ldr r1, =(0x4 << 3) @ A[6:3] = b0100 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x38] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x3C] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x40] @ Store data info + + ldr r1, =(0x5 << 3) @ A[6:3] = b0101 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x44] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x48] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x4C] @ Store data info + + ldr r1, =(0x6 << 3) @ A[6:3] = b0110 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x50] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x54] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x58] @ Store data info + + ldr r1, =(0x7 << 3) @ A[6:3] = b0111 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x5C] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x60] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x64] @ Store data info + + ldr r1, =(0x8 << 3) @ A[6:3] = b1000 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x68] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x6C] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x70] @ Store data info + + ldr r1, =(0x9 << 3) @ A[6:3] = b1001 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x74] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x78] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x7C] @ Store data info + + ldr r1, =(0xA << 3) @ A[6:3] = b1010 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x80] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x84] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x88] @ Store data info + + ldr r1, =(0xB << 3) @ A[6:3] = b1011 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x8C] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x90] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0x94] @ Store data info + + ldr r1, =(0xC << 3) @ A[6:3] = b1100 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0x98] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0x9C] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0xA0] @ Store data info + + ldr r1, =(0xD << 3) @ A[6:3] = b1101 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xA4] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0xA8] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0xAC] @ Store data info + + ldr r1, =(0xE << 3) @ A[6:3] = b1110 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xB0] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0xB4] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0xB8] @ Store data info + + ldr r1, =(0xF << 3) @ A[6:3] = b1111 + mcr p15, 0, r1, c15, c9, 3 @ Read L2 Data RAM into L2 data 0-2 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xBC] @ Store data info + mrc p15, 0, r2, c15, c8, 1 @ Move L2 data 1 register to R2 + str r2, [r0, #0xC0] @ Store data info + mrc p15, 0, r2, c15, c8, 5 @ Move L2 data 2 register to R2 + str r2, [r0, #0xC4] @ Store data info + + ldr r1, =(0x2 << 29) | (0x0 << 6) @ WAY = A[31:29] = 2, A[6] = 0 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xC8] @ Save tag info + + ldr r1, =(0x2 << 29) | (0x1 << 6) @ WAY = A[31:29] = 2, A[6] = 1 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xCC] @ Save tag info + + ldr r1, =(0x4 << 29) | (0x0 << 6) @ WAY = A[31:29] = 4, A[6] = 0 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xD0] @ Save tag info + + ldr r1, =(0x4 << 29) | (0x1 << 6) @ WAY = A[31:29] = 4, A[6] = 1 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xD4] @ Save tag info + + ldr r1, =(0x6 << 29) | (0x0 << 6) @ WAY = A[31:29] = 6, A[6] = 0 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xD8] @ Save tag info + + ldr r1, =(0x6 << 29) | (0x1 << 6) @ WAY = A[31:29] = 6, A[6] = 1 + mcr p15, 0, r1, c15, c9, 2 @ Read L2 tag RAM into L2 data 0 register + mrc p15, 0, r2, c15, c8, 0 @ Move L2 data 0 register to R2 + str r2, [r0, #0xDC] @ Save tag info + + .long 0xe320f003 @ Opcode for WFI + + ldr r1, =(0x0 << 6) @ A[6] = 0 + ldr r2, [r0, #0x00] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x1 << 6) @ A[6] = 1 + ldr r2, [r0, #0x04] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x0 << 3) @ A[6:3] = b0000 + ldr r2, [r0, #0x08] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x0C] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x10] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x1 << 3) @ A[6:3] = b0001 + ldr r2, [r0, #0x14] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x18] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x1C] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x2 << 3) @ A[6:3] = b0010 + ldr r2, [r0, #0x20] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x24] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x28] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x3 << 3) @ A[6:3] = b0011 + ldr r2, [r0, #0x2C] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x30] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x34] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x4 << 3) @ A[6:3] = b0100 + ldr r2, [r0, #0x38] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x3C] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x40] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x5 << 3) @ A[6:3] = b0101 + ldr r2, [r0, #0x44] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x48] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x4C] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x6 << 3) @ A[6:3] = b0110 + ldr r2, [r0, #0x50] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x54] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x58] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x7 << 3) @ A[6:3] = b0111 + ldr r2, [r0, #0x5C] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x60] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x64] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x8 << 3) @ A[6:3] = b1000 + ldr r2, [r0, #0x68] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x6C] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x70] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x9 << 3) @ A[6:3] = b1001 + ldr r2, [r0, #0x74] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x78] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x7C] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xA << 3) @ A[6:3] = b1010 + ldr r2, [r0, #0x80] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x84] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x88] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xB << 3) @ A[6:3] = b1011 + ldr r2, [r0, #0x8C] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x90] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0x94] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xC << 3) @ A[6:3] = b1100 + ldr r2, [r0, #0x98] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0x9C] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0xA0] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xD << 3) @ A[6:3] = b1101 + ldr r2, [r0, #0xA4] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0xA8] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0xAC] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xE << 3) @ A[6:3] = b1110 + ldr r2, [r0, #0xB0] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0xB4] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0xB8] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0xF << 3) @ A[6:3] = b1111 + ldr r2, [r0, #0xBC] @ Load data info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + ldr r2, [r0, #0xC0] @ Load data info + mcr p15, 0, r2, c15, c8, 1 @ Move R2 to L2 data 1 register + ldr r2, [r0, #0xC4] @ Load data info + mcr p15, 0, r2, c15, c8, 5 @ Move R2 to L2 data 2 register + mcr p15, 0, r1, c15, c8, 3 @ Write L2 data 0-2 registers to L2 data RAM + + ldr r1, =(0x2 << 29) | (0x0 << 6) @ WAY = A[31:29] = 2, A[6] = 0 + ldr r2, [r0, #0xC8] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x2 << 29) | (0x1 << 6) @ WAY = A[31:29] = 2, A[6] = 1 + ldr r2, [r0, #0xCC] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x4 << 29) | (0x0 << 6) @ WAY = A[31:29] = 4, A[6] = 0 + ldr r2, [r0, #0xD0] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x4 << 29) | (0x1 << 6) @ WAY = A[31:29] = 4, A[6] = 1 + ldr r2, [r0, #0xD4] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x6 << 29) | (0x0 << 6) @ WAY = A[31:29] = 6, A[6] = 0 + ldr r2, [r0, #0xD8] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + ldr r1, =(0x6 << 29) | (0x1 << 6) @ WAY = A[31:29] = 6, A[6] = 1 + ldr r2, [r0, #0xDC] @ Load tag info + mcr p15, 0, r2, c15, c8, 0 @ Move R2 to L2 data 0 register + mcr p15, 0, r1, c15, c8, 2 @ Write L2 data 0 register to L2 tag RAM + + mrc p15, 0, r1, c1, c0, 1 @ R1 = auxiliary control reg + orr r1, r1, #ARM_AUXCR_L2EN @ Enable L2 cache + mcr p15, 0, r1, c1, c0, 1 @ Update aux control reg + + mrc p15, 0, r2, c1, c0, 0 @ R2 = system control reg + orr r2, r2, #ARM_CTRL_DCACHE @ Enable DCache + mcr p15, 0, r2, c1, c0, 0 @ Update system control reg + + b Done + +SkipL2Access: + .long 0xe320f003 @ Opcode for WFI + +Done: + mov pc, lr + + .type cortexa8_idle_workaround, #object +ENTRY(cortexa8_idle_workaround) + .word cpu_cortexa8_do_idle + .size cortexa8_idle_workaround, . - cortexa8_idle_workaround --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/suspend.S +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/suspend.S @@ -0,0 +1,153 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +#define ARM_CTRL_DCACHE 1 << 2 +#define ARM_CTRL_ICACHE 1 << 12 +#define ARM_AUXCR_L2EN 1 << 1 + + +/* + * cpu_do_suspend_workaround() + * + * Suspend the processor (eg, wait for interrupt). + * + * IRQs are already disabled. + */ +ENTRY(cpu_do_suspend_workaround) + stmfd sp!, {r4,r5,r6,r7,r9,r10,r11} @ Save registers + + mov r6, r0 @save iomux address + /* Disable L1 caches */ + mrc p15, 0, r0, c1, c0, 0 @ R0 = system control reg + bic r0, r0, #ARM_CTRL_ICACHE @ Disable ICache + bic r0, r0, #ARM_CTRL_DCACHE @ Disable DCache + mcr p15, 0, r0, c1, c0, 0 @ Update system control reg + + mrc p15, 1, r0, c0, c0, 1 @ Read CLIDR + ands r3, r0, #0x7000000 @ Isolate level of coherency + mov r3, r3, lsr #23 @ Cache level value (naturally aligned) + beq FinishedClean + mov r10, #0 +Loop1Clean: + add r2, r10, r10, lsr #1 @ Work out cache level + mov r1, r0, lsr r2 @ R0 bottom 3 bits = Cache Type for this level + and r1, r1, #7 @ Get those 3 bits alone + cmp r1, #2 + blt SkipClean @ No cache or only instruction cache at this level + mcr p15, 2, r10, c0, c0, 0 @ Write the Cache Size selection register + mov r1, #0 + .long 0xF57FF06F @ ISB + mrc p15, 1, r1, c0, c0, 0 @ Reads current Cache Size ID register + and r2, r1, #7 @ Extract the line length field + add r2, r2, #4 @ Add 4 for the line length offset (log2 16 bytes) + ldr r4, =0x3FF + ands r4, r4, r1, lsr #3 @ R4 is the max number on the way size (right aligned) + clz r5, r4 @ R5 is the bit position of the way size increment + ldr r7, =0x00007FFF + ands r7, r7, r1, lsr #13 @ R7 is the max number of the index size (right aligned) +Loop2Clean: + mov r9, r4 @ R9 working copy of the max way size (right aligned) +Loop3Clean: + orr r11, r10, r9, lsl r5 @ Factor in the way number and cache number into R11 + orr r11, r11, r7, lsl r2 @ Factor in the index number + mcr p15, 0, r11, c7, c14, 2 @ Clean and invalidate by set/way + subs r9, r9, #1 @ Decrement the way number + bge Loop3Clean + subs r7, r7, #1 @ Decrement the index + bge Loop2Clean +SkipClean: + add r10, r10, #2 @ Increment the cache number + cmp r3, r10 + bgt Loop1Clean + +FinishedClean: + + /* Disable L2 cache */ + mrc p15, 0, r0, c1, c0, 1 @ R0 = auxiliary control reg + bic r0, r0, #ARM_AUXCR_L2EN @ Disable L2 cache + mcr p15, 0, r0, c1, c0, 1 @ Update aux control reg + + /*Set the DDR drive strength to low */ + ldr r10, [r6] + and r10, r10, #0xF1 @ clear bits 2-1 + str r10, [r6] + + .long 0xe320f003 @ Opcode for WFI + + /*Set the DDR drive strength to max */ + orr r10, r10, #0x06 @ set bits 2-1 + str r10, [r6] + + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ Invalidate inst cache + + /* Invalidate data caches */ + mrc p15, 1, r0, c0, c0, 1 @ Read CLIDR + ands r3, r0, #0x7000000 @ Isolate level of coherency + mov r3, r3, lsr #23 @ Cache level value (naturally aligned) + beq FinishedInvalidate + mov r10, #0 +Loop1Invalidate: + add r2, r10, r10, lsr #1 @ Work out cache level + mov r1, r0, lsr r2 @ R0 bottom 3 bits = Cache Type for this level + and r1, r1, #7 @ Get those 3 bits alone + cmp r1, #2 + blt SkipInvalidate @ No cache or only instruction cache at this level + mcr p15, 2, r10, c0, c0, 0 @ Write the Cache Size selection register + mov r1, #0 + .long 0xF57FF06F @ ISB + mrc p15, 1, r1, c0, c0, 0 @ Reads current Cache Size ID register + and r2, r1, #7 @ Extract the line length field + add r2, r2, #4 @ Add 4 for the line length offset (log2 16 bytes) + ldr r4, =0x3FF + ands r4, r4, r1, lsr #3 @ R4 is the max number on the way size (right aligned) + clz r5, r4 @ R5 is the bit position of the way size increment + ldr r7, =0x00007FFF + ands r7, r7, r1, lsr #13 @ R7 is the max number of the index size (right aligned) +Loop2Invalidate: + mov r9, r4 @ R9 working copy of the max way size (right aligned) +Loop3Invalidate: + orr r11, r10, r9, lsl r5 @ Factor in the way number and cache number into R11 + orr r11, r11, r7, lsl r2 @ Factor in the index number + mcr p15, 0, r11, c7, c6, 2 @ Invalidate by set/way + subs r9, r9, #1 @ Decrement the way number + bge Loop3Invalidate + subs r7, r7, #1 @ Decrement the index + bge Loop2Invalidate +SkipInvalidate: + add r10, r10, #2 @ Increment the cache number + cmp r3, r10 + bgt Loop1Invalidate + +FinishedInvalidate: + + /* Enable L2 cache */ + mrc p15, 0, r0, c1, c0, 1 @ R0 = auxiliary control reg + orr r0, r0, #ARM_AUXCR_L2EN @ Enable L2 cache + mcr p15, 0, r0, c1, c0, 1 @ Update aux control reg + + /* Enable L1 caches */ + mrc p15, 0, r0, c1, c0, 0 @ R0 = system control reg + orr r0, r0, #ARM_CTRL_ICACHE @ Enable ICache + orr r0, r0, #ARM_CTRL_DCACHE @ Enable DCache + mcr p15, 0, r0, c1, c0, 0 @ Update system control reg + + /* Restore registers */ + ldmfd sp!, {r4,r5,r6,r7,r9,r10,r11} + mov pc, lr + + .type cpu_do_suspend, #object +ENTRY(cpu_do_suspend) + .word cpu_do_suspend_workaround + .size cpu_do_suspend_workaround, . - cpu_do_suspend_workaround --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/usb_h2.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/usb_h2.c @@ -0,0 +1,90 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" +#include "iomux.h" + +/* + * USB Host2 HS port + */ +static int gpio_usbh2_active(void) +{ + /* Set USBH2_STP to GPIO and toggle it */ + mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), "eim_a26"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1); + + msleep(100); + + return 0; +} + +void gpio_usbh2_setback_stp(void) +{ + /* setback USBH2_STP to be function */ + mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2); +} +EXPORT_SYMBOL(gpio_usbh2_setback_stp); + +static void gpio_usbh2_inactive(void) +{ + gpio_free(IOMUX_TO_GPIO(MX51_PIN_EIM_A26)); + mxc_free_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_GPIO); +} + +static struct fsl_usb2_platform_data usbh2_config = { + .name = "Host 2", + .platform_init = fsl_usb_host_init, + .platform_uninit = fsl_usb_host_uninit, + .operating_mode = FSL_USB2_MPH_HOST, + .phy_mode = FSL_USB2_PHY_ULPI, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbh2_active, + .gpio_usb_inactive = gpio_usbh2_inactive, + .transceiver = "isp1504", +}; + +static struct resource usbh2_resources[] = { + [0] = { + .start = (u32) (USB_H2REGS_BASE), + .end = (u32) (USB_H2REGS_BASE + 0x1ff), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_H2, + .flags = IORESOURCE_IRQ, + }, +}; + +static int __init usbh2_init(void) +{ + pr_debug("%s: \n", __func__); + + if (machine_is_mx51_3ds() || + (machine_is_mx51_babbage() && (cpu_is_mx51_rev(CHIP_REV_2_0) >= 1))) + return 0; + + host_pdev_register(usbh2_resources, ARRAY_SIZE(usbh2_resources), + &usbh2_config); + return 0; +} + +module_init(usbh2_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/crm_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/crm_regs.h @@ -0,0 +1,691 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ARCH_ARM_MACH_MX51_CRM_REGS_H__ +#define __ARCH_ARM_MACH_MX51_CRM_REGS_H__ + +#define MXC_CCM_BASE ((char *)IO_ADDRESS(CCM_BASE_ADDR)) +#define MXC_DPLL1_BASE IO_ADDRESS(PLL1_BASE_ADDR) +#define MXC_DPLL2_BASE IO_ADDRESS(PLL2_BASE_ADDR) +#define MXC_DPLL3_BASE IO_ADDRESS(PLL3_BASE_ADDR) + +/* PLL Register Offsets */ +#define MXC_PLL_DP_CTL 0x00 +#define MXC_PLL_DP_CONFIG 0x04 +#define MXC_PLL_DP_OP 0x08 +#define MXC_PLL_DP_MFD 0x0C +#define MXC_PLL_DP_MFN 0x10 +#define MXC_PLL_DP_MFNMINUS 0x14 +#define MXC_PLL_DP_MFNPLUS 0x18 +#define MXC_PLL_DP_HFS_OP 0x1C +#define MXC_PLL_DP_HFS_MFD 0x20 +#define MXC_PLL_DP_HFS_MFN 0x24 +#define MXC_PLL_DP_MFN_TOGC 0x28 +#define MXC_PLL_DP_DESTAT 0x2c + +/* PLL Register Bit definitions */ +#define MXC_PLL_DP_CTL_MUL_CTRL 0x2000 +#define MXC_PLL_DP_CTL_DPDCK0_2_EN 0x1000 +#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET 12 +#define MXC_PLL_DP_CTL_ADE 0x800 +#define MXC_PLL_DP_CTL_REF_CLK_DIV 0x400 +#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK (3 << 8) +#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET 8 +#define MXC_PLL_DP_CTL_HFSM 0x80 +#define MXC_PLL_DP_CTL_PRE 0x40 +#define MXC_PLL_DP_CTL_UPEN 0x20 +#define MXC_PLL_DP_CTL_RST 0x10 +#define MXC_PLL_DP_CTL_RCP 0x8 +#define MXC_PLL_DP_CTL_PLM 0x4 +#define MXC_PLL_DP_CTL_BRM0 0x2 +#define MXC_PLL_DP_CTL_LRF 0x1 + +#define MXC_PLL_DP_CONFIG_BIST 0x8 +#define MXC_PLL_DP_CONFIG_SJC_CE 0x4 +#define MXC_PLL_DP_CONFIG_AREN 0x2 +#define MXC_PLL_DP_CONFIG_LDREQ 0x1 + +#define MXC_PLL_DP_OP_MFI_OFFSET 4 +#define MXC_PLL_DP_OP_MFI_MASK (0xF << 4) +#define MXC_PLL_DP_OP_PDF_OFFSET 0 +#define MXC_PLL_DP_OP_PDF_MASK 0xF + +#define MXC_PLL_DP_MFD_OFFSET 0 +#define MXC_PLL_DP_MFD_MASK 0x07FFFFFF + +#define MXC_PLL_DP_MFN_OFFSET 0x0 +#define MXC_PLL_DP_MFN_MASK 0x07FFFFFF + +#define MXC_PLL_DP_MFN_TOGC_TOG_DIS (1 << 17) +#define MXC_PLL_DP_MFN_TOGC_TOG_EN (1 << 16) +#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET 0x0 +#define MXC_PLL_DP_MFN_TOGC_CNT_MASK 0xFFFF + +#define MXC_PLL_DP_DESTAT_TOG_SEL (1 << 31) +#define MXC_PLL_DP_DESTAT_MFN 0x07FFFFFF + +/* Register addresses of CCM*/ +#define MXC_CCM_CCR (MXC_CCM_BASE + 0x00) +#define MXC_CCM_CCDR (MXC_CCM_BASE + 0x04) +#define MXC_CCM_CSR (MXC_CCM_BASE + 0x08) +#define MXC_CCM_CCSR (MXC_CCM_BASE + 0x0C) +#define MXC_CCM_CACRR (MXC_CCM_BASE + 0x10) +#define MXC_CCM_CBCDR (MXC_CCM_BASE + 0x14) +#define MXC_CCM_CBCMR (MXC_CCM_BASE + 0x18) +#define MXC_CCM_CSCMR1 (MXC_CCM_BASE + 0x1C) +#define MXC_CCM_CSCMR2 (MXC_CCM_BASE + 0x20) +#define MXC_CCM_CSCDR1 (MXC_CCM_BASE + 0x24) +#define MXC_CCM_CS1CDR (MXC_CCM_BASE + 0x28) +#define MXC_CCM_CS2CDR (MXC_CCM_BASE + 0x2C) +#define MXC_CCM_CDCDR (MXC_CCM_BASE + 0x30) +#define MXC_CCM_CHSCDR (MXC_CCM_BASE + 0x34) +#define MXC_CCM_CSCDR2 (MXC_CCM_BASE + 0x38) +#define MXC_CCM_CSCDR3 (MXC_CCM_BASE + 0x3C) +#define MXC_CCM_CSCDR4 (MXC_CCM_BASE + 0x40) +#define MXC_CCM_CWDR (MXC_CCM_BASE + 0x44) +#define MXC_CCM_CDHIPR (MXC_CCM_BASE + 0x48) +#define MXC_CCM_CDCR (MXC_CCM_BASE + 0x4C) +#define MXC_CCM_CTOR (MXC_CCM_BASE + 0x50) +#define MXC_CCM_CLPCR (MXC_CCM_BASE + 0x54) +#define MXC_CCM_CISR (MXC_CCM_BASE + 0x58) +#define MXC_CCM_CIMR (MXC_CCM_BASE + 0x5C) +#define MXC_CCM_CCOSR (MXC_CCM_BASE + 0x60) +#define MXC_CCM_CGPR (MXC_CCM_BASE + 0x64) +#define MXC_CCM_CCGR0 (MXC_CCM_BASE + 0x68) +#define MXC_CCM_CCGR1 (MXC_CCM_BASE + 0x6C) +#define MXC_CCM_CCGR2 (MXC_CCM_BASE + 0x70) +#define MXC_CCM_CCGR3 (MXC_CCM_BASE + 0x74) +#define MXC_CCM_CCGR4 (MXC_CCM_BASE + 0x78) +#define MXC_CCM_CCGR5 (MXC_CCM_BASE + 0x7C) +#define MXC_CCM_CCGR6 (MXC_CCM_BASE + 0x80) +#define MXC_CCM_CMEOR (MXC_CCM_BASE + 0x84) + +/* Define the bits in register CCR */ +#define MXC_CCM_CCR_COSC_EN (1 << 12) +#define MXC_CCM_CCR_FPM_MULT_MASK (1 << 11) +#define MXC_CCM_CCR_CAMP2_EN (1 << 10) +#define MXC_CCM_CCR_CAMP1_EN (1 << 9) +#define MXC_CCM_CCR_FPM_EN (1 << 8) +#define MXC_CCM_CCR_OSCNT_OFFSET (0) +#define MXC_CCM_CCR_OSCNT_MASK (0xFF) + +/* Define the bits in register CCDR */ +#define MXC_CCM_CCDR_HSC_HS_MASK (0x1 << 18) +#define MXC_CCM_CCDR_IPU_HS_MASK (0x1 << 17) +#define MXC_CCM_CCDR_EMI_HS_MASK (0x1 << 16) + +/* Define the bits in register CSR */ +#define MXC_CCM_CSR_COSR_READY (1 << 5) +#define MXC_CCM_CSR_LVS_VALUE (1 << 4) +#define MXC_CCM_CSR_CAMP2_READY (1 << 3) +#define MXC_CCM_CSR_CAMP1_READY (1 << 2) +#define MXC_CCM_CSR_FPM_READY (1 << 1) +#define MXC_CCM_CSR_REF_EN_B (1 << 0) + +/* Define the bits in register CCSR */ +#define MXC_CCM_CCSR_LP_APM_SEL (0x1 << 9) +#define MXC_CCM_CCSR_STEP_SEL_OFFSET (7) +#define MXC_CCM_CCSR_STEP_SEL_MASK (0x3 << 7) +#define MXC_CCM_CCSR_PLL2_PODF_OFFSET (5) +#define MXC_CCM_CCSR_PLL2_PODF_MASK (0x3 << 5) +#define MXC_CCM_CCSR_PLL3_PODF_OFFSET (3) +#define MXC_CCM_CCSR_PLL3_PODF_MASK (0x3 << 3) +#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (1 << 2) +#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL (1 << 1) +#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL (1 << 0) + +/* Define the bits in register CACRR */ +#define MXC_CCM_CACRR_ARM_PODF_OFFSET (0) +#define MXC_CCM_CACRR_ARM_PODF_MASK (0x7) + +/* Define the bits in register CBCDR */ +#define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26) +#define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25) +#define MXC_CCM_CBCDR_DDR_HF_SEL_OFFSET (30) +#define MXC_CCM_CBCDR_DDR_HF_SEL (0x1 << 30) +#define MXC_CCM_CBCDR_DDR_PODF_OFFSET (27) +#define MXC_CCM_CBCDR_DDR_PODF_MASK (0x7 << 27) +#define MXC_CCM_CBCDR_EMI_PODF_OFFSET (22) +#define MXC_CCM_CBCDR_EMI_PODF_MASK (0x7 << 22) +#define MXC_CCM_CBCDR_AXI_B_PODF_OFFSET (19) +#define MXC_CCM_CBCDR_AXI_B_PODF_MASK (0x7 << 19) +#define MXC_CCM_CBCDR_AXI_A_PODF_OFFSET (16) +#define MXC_CCM_CBCDR_AXI_A_PODF_MASK (0x7 << 16) +#define MXC_CCM_CBCDR_NFC_PODF_OFFSET (13) +#define MXC_CCM_CBCDR_NFC_PODF_MASK (0x7 << 13) +#define MXC_CCM_CBCDR_AHB_PODF_OFFSET (10) +#define MXC_CCM_CBCDR_AHB_PODF_MASK (0x7 << 10) +#define MXC_CCM_CBCDR_IPG_PODF_OFFSET (8) +#define MXC_CCM_CBCDR_IPG_PODF_MASK (0x3 << 8) +#define MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET (6) +#define MXC_CCM_CBCDR_PERCLK_PRED1_MASK (0x3 << 6) +#define MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET (3) +#define MXC_CCM_CBCDR_PERCLK_PRED2_MASK (0x7 << 3) +#define MXC_CCM_CBCDR_PERCLK_PODF_OFFSET (0) +#define MXC_CCM_CBCDR_PERCLK_PODF_MASK (0x7) + +/* Define the bits in register CBCMR */ +#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_OFFSET (14) +#define MXC_CCM_CBCMR_VPU_AXI_CLK_SEL_MASK (0x3 << 14) +#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET (12) +#define MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK (0x3 << 12) +#define MXC_CCM_CBCMR_DDR_CLK_SEL_OFFSET (10) +#define MXC_CCM_CBCMR_DDR_CLK_SEL_MASK (0x3 << 10) +#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_OFFSET (8) +#define MXC_CCM_CBCMR_ARM_AXI_CLK_SEL_MASK (0x3 << 8) +#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_OFFSET (6) +#define MXC_CCM_CBCMR_IPU_HSP_CLK_SEL_MASK (0x3 << 6) +#define MXC_CCM_CBCMR_GPU_CLK_SEL_OFFSET (4) +#define MXC_CCM_CBCMR_GPU_CLK_SEL_MASK (0x3 << 4) +#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_OFFSET (14) +#define MXC_CCM_CBCMR_GPU2D_CLK_SEL_MASK (0x3 << 14) +#define MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL (0x1 << 1) +#define MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL (0x1 << 0) + +/* Define the bits in register CSCMR1 */ +#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET (30) +#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK (0x3 << 30) +#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET (28) +#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK (0x3 << 28) +#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET (26) +#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL (0x1 << 26) +#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET (24) +#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK (0x3 << 24) +#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET (22) +#define MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK (0x3 << 22) +#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET (20) +#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK (0x3 << 20) +#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL (0x1 << 19) +#define MXC_CCM_CSCMR1_ESDHC4_CLK_SEL (0x1 << 18) +#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET (16) +#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK (0x3 << 16) +#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET (14) +#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK (0x3 << 14) +#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET (12) +#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK (0x3 << 12) +#define MXC_CCM_CSCMR1_SSI3_CLK_SEL (0x1 << 11) +#define MXC_CCM_CSCMR1_VPU_RCLK_SEL (0x1 << 10) +#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_OFFSET (8) +#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL_MASK (0x3 << 8) +#define MXC_CCM_CSCMR1_TVE_CLK_SEL (0x1 << 7) +#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL (0x1 << 6) +#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET (4) +#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK (0x3 << 4) +#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_OFFSET (2) +#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL_MASK (0x3 << 2) +#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1) +#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL (0x1) + +/* Define the bits in register CSCMR2 */ +#define MXC_CCM_CSCMR2_DI_CLK_SEL_OFFSET(n) (26+n*3) +#define MXC_CCM_CSCMR2_DI_CLK_SEL_MASK(n) (0x7 << (26+n*3)) +#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_OFFSET (24) +#define MXC_CCM_CSCMR2_CSI_MCLK2_CLK_SEL_MASK (0x3 << 24) +#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_OFFSET (22) +#define MXC_CCM_CSCMR2_CSI_MCLK1_CLK_SEL_MASK (0x3 << 22) +#define MXC_CCM_CSCMR2_ESC_CLK_SEL_OFFSET (20) +#define MXC_CCM_CSCMR2_ESC_CLK_SEL_MASK (0x3 << 20) +#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_OFFSET (18) +#define MXC_CCM_CSCMR2_HSC2_CLK_SEL_MASK (0x3 << 18) +#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_OFFSET (16) +#define MXC_CCM_CSCMR2_HSC1_CLK_SEL_MASK (0x3 << 16) +#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_OFFSET (14) +#define MXC_CCM_CSCMR2_HSI2C_CLK_SEL_MASK (0x3 << 14) +#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_OFFSET (12) +#define MXC_CCM_CSCMR2_FIRI_CLK_SEL_MASK (0x3 << 12) +#define MXC_CCM_CSCMR2_SIM_CLK_SEL_OFFSET (10) +#define MXC_CCM_CSCMR2_SIM_CLK_SEL_MASK (0x3 << 10) +#define MXC_CCM_CSCMR2_SLIMBUS_COM (0x1 << 9) +#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_OFFSET (6) +#define MXC_CCM_CSCMR2_SLIMBUS_CLK_SEL_MASK (0x7 << 6) +#define MXC_CCM_CSCMR2_SPDIF1_COM (1 << 5) +#define MXC_CCM_CSCMR2_SPDIF0_COM (1 << 4) +#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET (2) +#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK (0x3 << 2) +#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET (0) +#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK (0x3) + +/* Define the bits in register CSCDR1 */ +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET (22) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK (0x7 << 22) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET (19) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK (0x7 << 19) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET (16) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET (14) +#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK (0x3 << 14) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET (11) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK (0x7 << 11) +#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET (8) +#define MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK (0x7 << 8) +#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET (6) +#define MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK (0x3 << 6) +#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET (3) +#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK (0x7 << 3) +#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK (0x7) + +/* Define the bits in register CS1CDR and CS2CDR */ +#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_OFFSET (22) +#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PRED_MASK (0x7 << 22) +#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_OFFSET (16) +#define MXC_CCM_CS1CDR_SSI_EXT1_CLK_PODF_MASK (0x3F << 16) +#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET (6) +#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET (0) +#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK (0x3F) + +#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_OFFSET (22) +#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PRED_MASK (0x7 << 22) +#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_OFFSET (16) +#define MXC_CCM_CS2CDR_SSI_EXT2_CLK_PODF_MASK (0x3F << 16) +#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET (6) +#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET (0) +#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK (0x3F) + +/* Define the bits in register CDCDR */ +#define MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET (28) +#define MXC_CCM_CDCDR_TVE_CLK_PRED_MASK (0x7 << 28) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET (25) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0x7 << 25) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET (19) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x3F << 19) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET (16) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET (9) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK (0x3F << 9) +#define MXC_CCM_CDCDR_DI_CLK_PRED_OFFSET (6) +#define MXC_CCM_CDCDR_DI_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET (3) +#define MXC_CCM_CDCDR_USB_PHY_PRED_MASK (0x7 << 3) +#define MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET (0) +#define MXC_CCM_CDCDR_USB_PHY_PODF_MASK (0x7) + +/* Define the bits in register CHSCCDR */ +#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_OFFSET (12) +#define MXC_CCM_CHSCCDR_ESC_CLK_PRED_MASK (0x7 << 12) +#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_OFFSET (6) +#define MXC_CCM_CHSCCDR_ESC_CLK_PODF_MASK (0x3F << 6) +#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_OFFSET (3) +#define MXC_CCM_CHSCCDR_HSC2_CLK_PODF_MASK (0x7 << 3) +#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_OFFSET (0) +#define MXC_CCM_CHSCCDR_HSC1_CLK_PODF_MASK (0x7) + +/* Define the bits in register CSCDR2 */ +#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET (25) +#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25) +#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET (19) +#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK (0x3F << 19) +#define MXC_CCM_CSCDR2_SIM_CLK_PRED_OFFSET (16) +#define MXC_CCM_CSCDR2_SIM_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CSCDR2_SIM_CLK_PODF_OFFSET (9) +#define MXC_CCM_CSCDR2_SIM_CLK_PODF_MASK (0x3F << 9) +#define MXC_CCM_CSCDR2_SLIMBUS_CLK_PRED_OFFSET (6) +#define MXC_CCM_CSCDR2_SLIMBUS_PRED_MASK (0x7 << 6) +#define MXC_CCM_CSCDR2_SLIMBUS_PODF_OFFSET (0) +#define MXC_CCM_CSCDR2_SLIMBUS_PODF_MASK (0x3F) + +/* Define the bits in register CSCDR3 */ +#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_OFFSET (16) +#define MXC_CCM_CSCDR3_HSI2C_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_OFFSET (9) +#define MXC_CCM_CSCDR3_HSI2C_CLK_PODF_MASK (0x3F << 9) +#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_OFFSET (6) +#define MXC_CCM_CSCDR3_FIRI_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSCDR3_FIRI_CLK_PODF_MASK (0x3F) + +/* Define the bits in register CSCDR4 */ +#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_OFFSET (16) +#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_OFFSET (9) +#define MXC_CCM_CSCDR4_CSI_MCLK2_CLK_PODF_MASK (0x3F << 9) +#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_OFFSET (6) +#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSCDR4_CSI_MCLK1_CLK_PODF_MASK (0x3F) + +/* Define the bits in register CDHIPR */ +#define MXC_CCM_CDHIPR_ARM_PODF_BUSY (1 << 16) +#define MXC_CCM_CDHIPR_DDR_HF_CLK_SEL_BUSY (1 << 8) +#define MXC_CCM_CDHIPR_DDR_PODF_BUSY (1 << 7) +#define MXC_CCM_CDHIPR_EMI_CLK_SEL_BUSY (1 << 6) +#define MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY (1 << 5) +#define MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY (1 << 4) +#define MXC_CCM_CDHIPR_AHB_PODF_BUSY (1 << 3) +#define MXC_CCM_CDHIPR_EMI_PODF_BUSY (1 << 2) +#define MXC_CCM_CDHIPR_AXI_B_PODF_BUSY (1 << 1) +#define MXC_CCM_CDHIPR_AXI_A_PODF_BUSY (1 << 0) + +/* Define the bits in register CDCR */ +#define MXC_CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER (0x1 << 2) +#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET (0) +#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK (0x3) + +/* Define the bits in register CLPCR */ +#define MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS (0x1 << 23) +#define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS (0x1 << 22) +#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS (0x1 << 21) +#define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS (0x1 << 20) +#define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS (0x1 << 19) +#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS (0x1 << 18) +#define MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS (0x1 << 17) +#define MXC_CCM_CLPCR_BYPASS_RNGC_LPM_HS (0x1 << 16) +#define MXC_CCM_CLPCR_COSC_PWRDOWN (0x1 << 11) +#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET (9) +#define MXC_CCM_CLPCR_STBY_COUNT_MASK (0x3 << 9) +#define MXC_CCM_CLPCR_VSTBY (0x1 << 8) +#define MXC_CCM_CLPCR_DIS_REF_OSC (0x1 << 7) +#define MXC_CCM_CLPCR_SBYOS (0x1 << 6) +#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM (0x1 << 5) +#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET (3) +#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK (0x3 << 3) +#define MXC_CCM_CLPCR_LPM_OFFSET (0) +#define MXC_CCM_CLPCR_LPM_MASK (0x3) + +/* Define the bits in register CISR */ +#define MXC_CCM_CISR_ARM_PODF_LOADED (0x1 << 25) +#define MXC_CCM_CISR_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21) +#define MXC_CCM_CISR_AHB_PODF_LOADED (0x1 << 20) +#define MXC_CCM_CISR_EMI_PODF_LOADED (0x1 << 19) +#define MXC_CCM_CISR_AXI_B_PODF_LOADED (0x1 << 18) +#define MXC_CCM_CISR_AXI_A_PODF_LOADED (0x1 << 17) +#define MXC_CCM_CISR_DIVIDER_LOADED (0x1 << 16) +#define MXC_CCM_CISR_COSC_READY (0x1 << 6) +#define MXC_CCM_CISR_CKIH2_READY (0x1 << 5) +#define MXC_CCM_CISR_CKIH_READY (0x1 << 4) +#define MXC_CCM_CISR_FPM_READY (0x1 << 3) +#define MXC_CCM_CISR_LRF_PLL3 (0x1 << 2) +#define MXC_CCM_CISR_LRF_PLL2 (0x1 << 1) +#define MXC_CCM_CISR_LRF_PLL1 (0x1) + +/* Define the bits in register CIMR */ +#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED (0x1 << 25) +#define MXC_CCM_CIMR_MASK_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21) +#define MXC_CCM_CIMR_MASK_EMI_PODF_LOADED (0x1 << 20) +#define MXC_CCM_CIMR_MASK_AXI_C_PODF_LOADED (0x1 << 19) +#define MXC_CCM_CIMR_MASK_AXI_B_PODF_LOADED (0x1 << 18) +#define MXC_CCM_CIMR_MASK_AXI_A_PODF_LOADED (0x1 << 17) +#define MXC_CCM_CIMR_MASK_DIVIDER_LOADED (0x1 << 16) +#define MXC_CCM_CIMR_MASK_COSC_READY (0x1 << 5) +#define MXC_CCM_CIMR_MASK_CKIH_READY (0x1 << 4) +#define MXC_CCM_CIMR_MASK_FPM_READY (0x1 << 3) +#define MXC_CCM_CIMR_MASK_LRF_PLL3 (0x1 << 2) +#define MXC_CCM_CIMR_MASK_LRF_PLL2 (0x1 << 1) +#define MXC_CCM_CIMR_MASK_LRF_PLL1 (0x1) + +/* Define the bits in register CCOSR */ +#define MXC_CCM_CCOSR_CKO2_EN_OFFSET (0x1 << 24) +#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET (21) +#define MXC_CCM_CCOSR_CKO2_DIV_MASK (0x7 << 21) +#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET (16) +#define MXC_CCM_CCOSR_CKO2_SEL_MASK (0x1F << 16) +#define MXC_CCM_CCOSR_CKOL_EN (0x1 << 7) +#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET (4) +#define MXC_CCM_CCOSR_CKOL_DIV_MASK (0x7 << 4) +#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET (0) +#define MXC_CCM_CCOSR_CKOL_SEL_MASK (0xF) + +/* Define the bits in registers CGPR */ +#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (0x1 << 4) +#define MXC_CCM_CGPR_FPM_SEL (0x1 << 3) +#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_OFFSET (0) +#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_MASK (0x7) + +/* Define the bits in registers CCGRx */ +#define MXC_CCM_CCGR_CG_MASK 0x3 + +#define MXC_CCM_CCGR0_CG15_OFFSET 30 +#define MXC_CCM_CCGR0_CG15_MASK (0x3 << 30) +#define MXC_CCM_CCGR0_CG14_OFFSET 28 +#define MXC_CCM_CCGR0_CG14_MASK (0x3 << 28) +#define MXC_CCM_CCGR0_CG13_OFFSET 26 +#define MXC_CCM_CCGR0_CG13_MASK (0x3 << 26) +#define MXC_CCM_CCGR0_CG12_OFFSET 24 +#define MXC_CCM_CCGR0_CG12_MASK (0x3 << 24) +#define MXC_CCM_CCGR0_CG11_OFFSET 22 +#define MXC_CCM_CCGR0_CG11_MASK (0x3 << 22) +#define MXC_CCM_CCGR0_CG10_OFFSET 20 +#define MXC_CCM_CCGR0_CG10_MASK (0x3 << 20) +#define MXC_CCM_CCGR0_CG9_OFFSET 18 +#define MXC_CCM_CCGR0_CG9_MASK (0x3 << 18) +#define MXC_CCM_CCGR0_CG8_OFFSET 16 +#define MXC_CCM_CCGR0_CG8_MASK (0x3 << 16) +#define MXC_CCM_CCGR0_CG7_OFFSET 14 +#define MXC_CCM_CCGR0_CG6_OFFSET 12 +#define MXC_CCM_CCGR0_CG5_OFFSET 10 +#define MXC_CCM_CCGR0_CG5_MASK (0x3 << 10) +#define MXC_CCM_CCGR0_CG4_OFFSET 8 +#define MXC_CCM_CCGR0_CG4_MASK (0x3 << 8) +#define MXC_CCM_CCGR0_CG3_OFFSET 6 +#define MXC_CCM_CCGR0_CG3_MASK (0x3 << 6) +#define MXC_CCM_CCGR0_CG2_OFFSET 4 +#define MXC_CCM_CCGR0_CG2_MASK (0x3 << 4) +#define MXC_CCM_CCGR0_CG1_OFFSET 2 +#define MXC_CCM_CCGR0_CG1_MASK (0x3 << 2) +#define MXC_CCM_CCGR0_CG0_OFFSET 0 +#define MXC_CCM_CCGR0_CG0_MASK 0x3 + +#define MXC_CCM_CCGR1_CG15_OFFSET 30 +#define MXC_CCM_CCGR1_CG14_OFFSET 28 +#define MXC_CCM_CCGR1_CG13_OFFSET 26 +#define MXC_CCM_CCGR1_CG12_OFFSET 24 +#define MXC_CCM_CCGR1_CG11_OFFSET 22 +#define MXC_CCM_CCGR1_CG10_OFFSET 20 +#define MXC_CCM_CCGR1_CG9_OFFSET 18 +#define MXC_CCM_CCGR1_CG8_OFFSET 16 +#define MXC_CCM_CCGR1_CG7_OFFSET 14 +#define MXC_CCM_CCGR1_CG6_OFFSET 12 +#define MXC_CCM_CCGR1_CG5_OFFSET 10 +#define MXC_CCM_CCGR1_CG4_OFFSET 8 +#define MXC_CCM_CCGR1_CG3_OFFSET 6 +#define MXC_CCM_CCGR1_CG2_OFFSET 4 +#define MXC_CCM_CCGR1_CG1_OFFSET 2 +#define MXC_CCM_CCGR1_CG0_OFFSET 0 + +#define MXC_CCM_CCGR2_CG15_OFFSET 30 +#define MXC_CCM_CCGR2_CG14_OFFSET 28 +#define MXC_CCM_CCGR2_CG13_OFFSET 26 +#define MXC_CCM_CCGR2_CG12_OFFSET 24 +#define MXC_CCM_CCGR2_CG11_OFFSET 22 +#define MXC_CCM_CCGR2_CG10_OFFSET 20 +#define MXC_CCM_CCGR2_CG9_OFFSET 18 +#define MXC_CCM_CCGR2_CG8_OFFSET 16 +#define MXC_CCM_CCGR2_CG7_OFFSET 14 +#define MXC_CCM_CCGR2_CG6_OFFSET 12 +#define MXC_CCM_CCGR2_CG5_OFFSET 10 +#define MXC_CCM_CCGR2_CG4_OFFSET 8 +#define MXC_CCM_CCGR2_CG3_OFFSET 6 +#define MXC_CCM_CCGR2_CG2_OFFSET 4 +#define MXC_CCM_CCGR2_CG1_OFFSET 2 +#define MXC_CCM_CCGR2_CG0_OFFSET 0 + +#define MXC_CCM_CCGR3_CG15_OFFSET 30 +#define MXC_CCM_CCGR3_CG14_OFFSET 28 +#define MXC_CCM_CCGR3_CG13_OFFSET 26 +#define MXC_CCM_CCGR3_CG12_OFFSET 24 +#define MXC_CCM_CCGR3_CG11_OFFSET 22 +#define MXC_CCM_CCGR3_CG10_OFFSET 20 +#define MXC_CCM_CCGR3_CG9_OFFSET 18 +#define MXC_CCM_CCGR3_CG8_OFFSET 16 +#define MXC_CCM_CCGR3_CG7_OFFSET 14 +#define MXC_CCM_CCGR3_CG6_OFFSET 12 +#define MXC_CCM_CCGR3_CG5_OFFSET 10 +#define MXC_CCM_CCGR3_CG4_OFFSET 8 +#define MXC_CCM_CCGR3_CG3_OFFSET 6 +#define MXC_CCM_CCGR3_CG2_OFFSET 4 +#define MXC_CCM_CCGR3_CG1_OFFSET 2 +#define MXC_CCM_CCGR3_CG0_OFFSET 0 + +#define MXC_CCM_CCGR4_CG15_OFFSET 30 +#define MXC_CCM_CCGR4_CG14_OFFSET 28 +#define MXC_CCM_CCGR4_CG13_OFFSET 26 +#define MXC_CCM_CCGR4_CG12_OFFSET 24 +#define MXC_CCM_CCGR4_CG11_OFFSET 22 +#define MXC_CCM_CCGR4_CG10_OFFSET 20 +#define MXC_CCM_CCGR4_CG9_OFFSET 18 +#define MXC_CCM_CCGR4_CG8_OFFSET 16 +#define MXC_CCM_CCGR4_CG7_OFFSET 14 +#define MXC_CCM_CCGR4_CG6_OFFSET 12 +#define MXC_CCM_CCGR4_CG5_OFFSET 10 +#define MXC_CCM_CCGR4_CG4_OFFSET 8 +#define MXC_CCM_CCGR4_CG3_OFFSET 6 +#define MXC_CCM_CCGR4_CG2_OFFSET 4 +#define MXC_CCM_CCGR4_CG1_OFFSET 2 +#define MXC_CCM_CCGR4_CG0_OFFSET 0 + +#define MXC_CCM_CCGR5_CG15_OFFSET 30 +#define MXC_CCM_CCGR5_CG14_OFFSET 28 +#define MXC_CCM_CCGR5_CG14_MASK (0x3 << 28) +#define MXC_CCM_CCGR5_CG13_OFFSET 26 +#define MXC_CCM_CCGR5_CG13_MASK (0x3 << 26) +#define MXC_CCM_CCGR5_CG12_OFFSET 24 +#define MXC_CCM_CCGR5_CG12_MASK (0x3 << 24) +#define MXC_CCM_CCGR5_CG11_OFFSET 22 +#define MXC_CCM_CCGR5_CG11_MASK (0x3 << 22) +#define MXC_CCM_CCGR5_CG10_OFFSET 20 +#define MXC_CCM_CCGR5_CG10_MASK (0x3 << 20) +#define MXC_CCM_CCGR5_CG9_OFFSET 18 +#define MXC_CCM_CCGR5_CG9_MASK (0x3 << 18) +#define MXC_CCM_CCGR5_CG8_OFFSET 16 +#define MXC_CCM_CCGR5_CG8_MASK (0x3 << 16) +#define MXC_CCM_CCGR5_CG7_OFFSET 14 +#define MXC_CCM_CCGR5_CG7_MASK (0x3 << 14) +#define MXC_CCM_CCGR5_CG6_1_OFFSET 12 +#define MXC_CCM_CCGR5_CG6_2_OFFSET 13 +#define MXC_CCM_CCGR5_CG5_OFFSET 10 +#define MXC_CCM_CCGR5_CG4_OFFSET 8 +#define MXC_CCM_CCGR5_CG3_OFFSET 6 +#define MXC_CCM_CCGR5_CG2_OFFSET 4 +#define MXC_CCM_CCGR5_CG2_MASK (0x3 << 4) +#define MXC_CCM_CCGR5_CG1_OFFSET 2 +#define MXC_CCM_CCGR5_CG0_OFFSET 0 +#define MXC_CCM_CCGR6_CG7_OFFSET 14 +#define MXC_CCM_CCGR6_CG7_MASK (0x3 << 14) +#define MXC_CCM_CCGR6_CG6_OFFSET 12 +#define MXC_CCM_CCGR6_CG6_MASK (0x3 << 12) +#define MXC_CCM_CCGR6_CG5_OFFSET 10 +#define MXC_CCM_CCGR6_CG5_MASK (0x3 << 10) +#define MXC_CCM_CCGR6_CG4_OFFSET 8 +#define MXC_CCM_CCGR6_CG4_MASK (0x3 << 8) +#define MXC_CCM_CCGR6_CG3_OFFSET 6 +#define MXC_CCM_CCGR6_CG2_OFFSET 4 +#define MXC_CCM_CCGR6_CG1_OFFSET 2 +#define MXC_CCM_CCGR6_CG0_OFFSET 0 + +#define MXC_CORTEXA8_BASE IO_ADDRESS(ARM_BASE_ADDR) +#define MXC_GPC_BASE IO_ADDRESS(GPC_BASE_ADDR) +#define MXC_DPTC_LP_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x80) +#define MXC_DPTC_GP_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x100) +#define MXC_DVFS_CORE_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x180) +#define MXC_DVFS_PER_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x1C4) +#define MXC_PGC_IPU_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x220) +#define MXC_PGC_VPU_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x240) +#define MXC_PGC_GPU_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x260) +#define MXC_SRPG_NEON_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x280) +#define MXC_SRPG_ARM_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2A0) +#define MXC_SRPG_EMPGC0_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2C0) +#define MXC_SRPG_EMPGC1_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2D0) +#define MXC_SRPG_MEGAMIX_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2E0) +#define MXC_SRPG_EMI_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x300) + +/* CORTEXA8 platform */ +#define MXC_CORTEXA8_PLAT_PVID (MXC_CORTEXA8_BASE + 0x0) +#define MXC_CORTEXA8_PLAT_GPC (MXC_CORTEXA8_BASE + 0x4) +#define MXC_CORTEXA8_PLAT_PIC (MXC_CORTEXA8_BASE + 0x8) +#define MXC_CORTEXA8_PLAT_LPC (MXC_CORTEXA8_BASE + 0xC) +#define MXC_CORTEXA8_PLAT_NEON_LPC (MXC_CORTEXA8_BASE + 0x10) +#define MXC_CORTEXA8_PLAT_ICGC (MXC_CORTEXA8_BASE + 0x14) +#define MXC_CORTEXA8_PLAT_AMC (MXC_CORTEXA8_BASE + 0x18) +#define MXC_CORTEXA8_PLAT_NMC (MXC_CORTEXA8_BASE + 0x20) +#define MXC_CORTEXA8_PLAT_NMS (MXC_CORTEXA8_BASE + 0x24) + +/* DVFS CORE */ +#define MXC_DVFSTHRS (MXC_DVFS_CORE_BASE + 0x00) +#define MXC_DVFSCOUN (MXC_DVFS_CORE_BASE + 0x04) +#define MXC_DVFSSIG1 (MXC_DVFS_CORE_BASE + 0x08) +#define MXC_DVFSSIG0 (MXC_DVFS_CORE_BASE + 0x0C) +#define MXC_DVFSGPC0 (MXC_DVFS_CORE_BASE + 0x10) +#define MXC_DVFSGPC1 (MXC_DVFS_CORE_BASE + 0x14) +#define MXC_DVFSGPBT (MXC_DVFS_CORE_BASE + 0x18) +#define MXC_DVFSEMAC (MXC_DVFS_CORE_BASE + 0x1C) +#define MXC_DVFSCNTR (MXC_DVFS_CORE_BASE + 0x20) +#define MXC_DVFSLTR0_0 (MXC_DVFS_CORE_BASE + 0x24) +#define MXC_DVFSLTR0_1 (MXC_DVFS_CORE_BASE + 0x28) +#define MXC_DVFSLTR1_0 (MXC_DVFS_CORE_BASE + 0x2C) +#define MXC_DVFSLTR1_1 (MXC_DVFS_CORE_BASE + 0x30) +#define MXC_DVFSPT0 (MXC_DVFS_CORE_BASE + 0x34) +#define MXC_DVFSPT1 (MXC_DVFS_CORE_BASE + 0x38) +#define MXC_DVFSPT2 (MXC_DVFS_CORE_BASE + 0x3C) +#define MXC_DVFSPT3 (MXC_DVFS_CORE_BASE + 0x40) + +/* DVFS PER */ +#define MXC_DVFSPER_LTR0 (MXC_DVFS_PER_BASE) +#define MXC_DVFSPER_LTR1 (MXC_DVFS_PER_BASE + 0x04) +#define MXC_DVFSPER_LTR2 (MXC_DVFS_PER_BASE + 0x08) +#define MXC_DVFSPER_LTR3 (MXC_DVFS_PER_BASE + 0x0C) +#define MXC_DVFSPER_LTBR0 (MXC_DVFS_PER_BASE + 0x10) +#define MXC_DVFSPER_LTBR1 (MXC_DVFS_PER_BASE + 0x14) +#define MXC_DVFSPER_PMCR0 (MXC_DVFS_PER_BASE + 0x18) +#define MXC_DVFSPER_PMCR1 (MXC_DVFS_PER_BASE + 0x1C) + +/* GPC */ +#define MXC_GPC_CNTR (MXC_GPC_BASE + 0x0) +#define MXC_GPC_PGR (MXC_GPC_BASE + 0x4) +#define MXC_GPC_VCR (MXC_GPC_BASE + 0x8) +#define MXC_GPC_ALL_PU (MXC_GPC_BASE + 0xC) +#define MXC_GPC_NEON (MXC_GPC_BASE + 0x10) + +/* PGC */ +#define MXC_PGC_IPU_PGCR (MXC_PGC_IPU_BASE + 0x0) +#define MXC_PGC_IPU_PGSR (MXC_PGC_IPU_BASE + 0xC) +#define MXC_PGC_VPU_PGCR (MXC_PGC_VPU_BASE + 0x0) +#define MXC_PGC_VPU_PGSR (MXC_PGC_VPU_BASE + 0xC) +#define MXC_PGC_GPU_PGCR (MXC_PGC_GPU_BASE + 0x0) +#define MXC_PGC_GPU_PGSR (MXC_PGC_GPU_BASE + 0xC) + +#define MXC_PGCR_PCR 1 +#define MXC_SRPGCR_PCR 1 +#define MXC_EMPGCR_PCR 1 +#define MXC_PGSR_PSR 1 + + +#define MXC_CORTEXA8_PLAT_LPC_DSM (1 << 0) +#define MXC_CORTEXA8_PLAT_LPC_DBG_DSM (1 << 1) + +/* SRPG */ +#define MXC_SRPG_NEON_SRPGCR (MXC_SRPG_NEON_BASE + 0x0) +#define MXC_SRPG_NEON_PUPSCR (MXC_SRPG_NEON_BASE + 0x4) +#define MXC_SRPG_NEON_PDNSCR (MXC_SRPG_NEON_BASE + 0x8) + +#define MXC_SRPG_ARM_SRPGCR (MXC_SRPG_ARM_BASE + 0x0) +#define MXC_SRPG_ARM_PUPSCR (MXC_SRPG_ARM_BASE + 0x4) +#define MXC_SRPG_ARM_PDNSCR (MXC_SRPG_ARM_BASE + 0x8) + +#define MXC_SRPG_EMPGC0_SRPGCR (MXC_SRPG_EMPGC0_BASE + 0x0) +#define MXC_SRPG_EMPGC0_PUPSCR (MXC_SRPG_EMPGC0_BASE + 0x4) +#define MXC_SRPG_EMPGC0_PDNSCR (MXC_SRPG_EMPGC0_BASE + 0x8) + +#define MXC_SRPG_EMPGC1_SRPGCR (MXC_SRPG_EMPGC1_BASE + 0x0) +#define MXC_SRPG_EMPGC1_PUPSCR (MXC_SRPG_EMPGC1_BASE + 0x4) +#define MXC_SRPG_EMPGC1_PDNSCR (MXC_SRPG_EMPGC1_BASE + 0x8) + +#define MXC_SRPG_MEGAMIX_SRPGCR (MXC_SRPG_MEGAMIX_BASE + 0x0) +#define MXC_SRPG_MEGAMIX_PUPSCR (MXC_SRPG_MEGAMIX_BASE + 0x4) +#define MXC_SRPG_MEGAMIX_PDNSCR (MXC_SRPG_MEGAMIX_BASE + 0x8) + +#define MXC_SRPGC_EMI_SRPGCR (MXC_SRPGC_EMI_BASE + 0x0) +#define MXC_SRPGC_EMI_PUPSCR (MXC_SRPGC_EMI_BASE + 0x4) +#define MXC_SRPGC_EMI_PDNSCR (MXC_SRPGC_EMI_BASE + 0x8) + +#endif /* __ARCH_ARM_MACH_MX51_CRM_REGS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/iomux.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/iomux.h @@ -0,0 +1,246 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MACH_MX51_IOMUX_H__ +#define __MACH_MX51_IOMUX_H__ + +#include +#include +#include "mx51_pins.h" + +/*! + * @file mach-mx51/iomux.h + * + * @brief I/O Muxing control definitions and functions + * + * @ingroup GPIO_MX51 + */ + +typedef unsigned int iomux_pin_name_t; + +/*! + * various IOMUX output functions + */ +typedef enum iomux_config { + IOMUX_CONFIG_ALT0, /*!< used as alternate function 0 */ + IOMUX_CONFIG_ALT1, /*!< used as alternate function 1 */ + IOMUX_CONFIG_ALT2, /*!< used as alternate function 2 */ + IOMUX_CONFIG_ALT3, /*!< used as alternate function 3 */ + IOMUX_CONFIG_ALT4, /*!< used as alternate function 4 */ + IOMUX_CONFIG_ALT5, /*!< used as alternate function 5 */ + IOMUX_CONFIG_ALT6, /*!< used as alternate function 6 */ + IOMUX_CONFIG_ALT7, /*!< used as alternate function 7 */ + IOMUX_CONFIG_GPIO, /*!< added to help user use GPIO mode */ + IOMUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */ +} iomux_pin_cfg_t; + +/*! + * various IOMUX pad functions + */ +typedef enum iomux_pad_config { + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0, + PAD_CTL_DRV_LOW = 0x0 << 1, + PAD_CTL_DRV_MEDIUM = 0x1 << 1, + PAD_CTL_DRV_HIGH = 0x2 << 1, + PAD_CTL_DRV_MAX = 0x3 << 1, + PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, + PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3, + PAD_CTL_100K_PD = 0x0 << 4, + PAD_CTL_47K_PU = 0x1 << 4, + PAD_CTL_100K_PU = 0x2 << 4, + PAD_CTL_22K_PU = 0x3 << 4, + PAD_CTL_PUE_KEEPER = 0x0 << 6, + PAD_CTL_PUE_PULL = 0x1 << 6, + PAD_CTL_PKE_NONE = 0x0 << 7, + PAD_CTL_PKE_ENABLE = 0x1 << 7, + PAD_CTL_HYS_NONE = 0x0 << 8, + PAD_CTL_HYS_ENABLE = 0x1 << 8, + PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9, + PAD_CTL_DDR_INPUT_DDR = 0x1 << 9, + PAD_CTL_DRV_VOT_LOW = 0x0 << 13, + PAD_CTL_DRV_VOT_HIGH = 0x1 << 13, +} iomux_pad_config_t; + +/*! + * various IOMUX input select register index + */ +typedef enum iomux_input_select { + MUX_IN_AUDMUX_P4_INPUT_DA_AMX_SELECT_I = 0, + MUX_IN_AUDMUX_P4_INPUT_DB_AMX_SELECT_I, + MUX_IN_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P5_INPUT_RXFS_AMX_SELECT, + MUX_IN_AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_DA_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_DB_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_RXCLK_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_RXFS_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_TXCLK_AMX_SELECT_INPUT, + MUX_IN_AUDMUX_P6_INPUT_TXFS_AMX_SELECT_INPUT, + MUX_IN_CCM_IPP_DI_CLK_SELECT_INPUT, + /* TO2 */ + MUX_IN_CCM_IPP_DI1_CLK_SELECT_INPUT, + MUX_IN_CCM_PLL1_BYPASS_CLK_SELECT_INPUT, + MUX_IN_CCM_PLL2_BYPASS_CLK_SELECT_INPUT, + MUX_IN_CSPI_IPP_CSPI_CLK_IN_SELECT_INPUT, + MUX_IN_CSPI_IPP_IND_MISO_SELECT_INPUT, + MUX_IN_CSPI_IPP_IND_MOSI_SELECT_INPUT, + MUX_IN_CSPI_IPP_IND_SS_B_1_SELECT_INPUT, + MUX_IN_CSPI_IPP_IND_SS_B_2_SELECT_INPUT, + MUX_IN_CSPI_IPP_IND_SS_B_3_SELECT_INPUT, + MUX_IN_DPLLIP1_L1T_TOG_EN_SELECT_INPUT, + /* TO2 */ + MUX_IN_ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT, + MUX_IN_ECSPI2_IPP_IND_SS_B_3_SELECT_INPUT, + MUX_IN_EMI_IPP_IND_RDY_INT_SELECT_INPUT, + MUX_IN_ESDHC3_IPP_DAT0_IN_SELECT_INPUT, + MUX_IN_ESDHC3_IPP_DAT1_IN_SELECT_INPUT, + MUX_IN_ESDHC3_IPP_DAT2_IN_SELECT_INPUT, + MUX_IN_ESDHC3_IPP_DAT3_IN_SELECT_INPUT, + MUX_IN_FEC_FEC_COL_SELECT_INPUT, + MUX_IN_FEC_FEC_CRS_SELECT_INPUT, + MUX_IN_FEC_FEC_MDI_SELECT_INPUT, + MUX_IN_FEC_FEC_RDATA_0_SELECT_INPUT, + MUX_IN_FEC_FEC_RDATA_1_SELECT_INPUT, + MUX_IN_FEC_FEC_RDATA_2_SELECT_INPUT, + MUX_IN_FEC_FEC_RDATA_3_SELECT_INPUT, + MUX_IN_FEC_FEC_RX_CLK_SELECT_INPUT, + MUX_IN_FEC_FEC_RX_DV_SELECT_INPUT, + MUX_IN_FEC_FEC_RX_ER_SELECT_INPUT, + MUX_IN_FEC_FEC_TX_CLK_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_1_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_2_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_4_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_5_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_6_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_7_SELECT_INPUT, + MUX_IN_GPIO3_IPP_IND_G_IN_8_SELECT_INPUT, + /* TO2 */ + MUX_IN_GPIO3_IPP_IND_G_IN_12_SELECT_INPUT, + MUX_IN_HSC_MIPI_MIX_IPP_IND_SENS1_DATA_EN_SELECT_INPUT, + MUX_IN_HSC_MIPI_MIX_IPP_IND_SENS2_DATA_EN_SELECT_INPUT, + /* TO2 */ + MUX_IN_HSC_MIPI_MIX_PAR_VSYNC_SELECT_INPUT, + /* TO2 */ + MUX_IN_HSC_MIPI_MIX_PAR_DI_WAIT_SELECT_INPUT, + MUX_IN_HSC_MIPI_MIX_PAR_SISG_TRIG_SELECT_INPUT, + MUX_IN_I2C1_IPP_SCL_IN_SELECT_INPUT, + MUX_IN_I2C1_IPP_SDA_IN_SELECT_INPUT, + MUX_IN_I2C2_IPP_SCL_IN_SELECT_INPUT, + MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT, + + MUX_IN_IPU_IPP_DI_0_IND_DISPB_SD_D_SELECT_INPUT, + + MUX_IN_IPU_IPP_DI_1_IND_DISPB_SD_D_SELECT_INPUT, + + MUX_IN_KPP_IPP_IND_COL_6_SELECT_INPUT, + MUX_IN_KPP_IPP_IND_COL_7_SELECT_INPUT, + MUX_IN_KPP_IPP_IND_ROW_4_SELECT_INPUT, + MUX_IN_KPP_IPP_IND_ROW_5_SELECT_INPUT, + MUX_IN_KPP_IPP_IND_ROW_6_SELECT_INPUT, + MUX_IN_KPP_IPP_IND_ROW_7_SELECT_INPUT, + MUX_IN_UART1_IPP_UART_RTS_B_SELECT_INPUT, + MUX_IN_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, + MUX_IN_UART2_IPP_UART_RTS_B_SELECT_INPUT, + MUX_IN_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, + MUX_IN_UART3_IPP_UART_RTS_B_SELECT_INPUT, + MUX_IN_UART3_IPP_UART_RXD_MUX_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_CLK_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_0_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_1_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_2_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_3_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_4_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_5_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_6_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DATA_7_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_DIR_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_NXT_SELECT_INPUT, + MUX_IN_USBOH3_IPP_IND_UH3_STP_SELECT_INPUT, + MUX_INPUT_NUM_MUX, +} iomux_input_select_t; + +/*! + * various IOMUX input functions + */ +typedef enum iomux_input_config { + INPUT_CTL_PATH0 = 0x0, + INPUT_CTL_PATH1, + INPUT_CTL_PATH2, + INPUT_CTL_PATH3, + INPUT_CTL_PATH4, + INPUT_CTL_PATH5, + INPUT_CTL_PATH6, + INPUT_CTL_PATH7, +} iomux_input_config_t; + +struct mxc_iomux_pin_cfg { + iomux_pin_name_t pin; + u8 mux_mode; + u16 pad_cfg; + u8 in_select; + u8 in_mode; +}; + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in + * \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); + +/*! + * This function gets the current pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @return current pad value + */ +unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in + * \b #iomux_input_select_t + * @param config the binary value of elements defined in \b #iomux_input_config_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config); + +#endif /* __MACH_MX51_IOMUX_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/serial.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/serial.h @@ -0,0 +1,127 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX51_SERIAL_H__ +#define __ARCH_ARM_MACH_MX51_SERIAL_H__ + +#include + +/* UART 1 configuration */ +/*! + * This option allows to choose either an interrupt-driven software controlled + * hardware flow control (set this option to 0) or hardware-driven hardware + * flow control (set this option to 1). + */ +/* UART used as wakeup source */ +#define UART1_HW_FLOW 0 +/*! + * This specifies the threshold at which the CTS pin is deasserted by the + * RXFIFO. Set this value in Decimal to anything from 0 to 32 for + * hardware-driven hardware flow control. Read the HW spec while specifying + * this value. When using interrupt-driven software controlled hardware + * flow control set this option to -1. + */ +#define UART1_UCR4_CTSTL 16 +/*! + * This is option to enable (set this option to 1) or disable DMA data transfer + */ +#define UART1_DMA_ENABLE 0 +/*! + * Specify the size of the DMA receive buffer. The minimum buffer size is 512 + * bytes. The buffer size should be a multiple of 256. + */ +#define UART1_DMA_RXBUFSIZE 1024 +/*! + * Specify the MXC UART's Receive Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the RxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_RXTL 16 +/*! + * Specify the MXC UART's Transmit Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the TxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_TXTL 16 +/* UART 2 configuration */ +#define UART2_HW_FLOW 0 +#define UART2_UCR4_CTSTL -1 +#define UART2_DMA_ENABLE 0 +#define UART2_DMA_RXBUFSIZE 512 +#define UART2_UFCR_RXTL 16 +#define UART2_UFCR_TXTL 16 +/* UART 3 configuration */ +#define UART3_HW_FLOW 1 +#define UART3_UCR4_CTSTL 16 +#define UART3_DMA_ENABLE 1 +#define UART3_DMA_RXBUFSIZE 1024 +#define UART3_UFCR_RXTL 16 +#define UART3_UFCR_TXTL 16 +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +/* + * Is the MUXED interrupt output sent to the ARM core + */ +#define INTS_NOTMUXED 0 +#define INTS_MUXED 1 +/* UART 1 configuration */ +/*! + * This define specifies whether the muxed ANDed interrupt line or the + * individual interrupts from the UART port is integrated with the ARM core. + * There exists a define like this for each UART port. Valid values that can + * be used are \b INTS_NOTMUXED or \b INTS_MUXED. + */ +#define UART1_MUX_INTS INTS_MUXED +/*! + * This define specifies the transmitter interrupt number or the interrupt + * number of the ANDed interrupt in case the interrupts are muxed. There exists + * a define like this for each UART port. + */ +#define UART1_INT1 MXC_INT_UART1 +/*! + * This define specifies the receiver interrupt number. If the interrupts of + * the UART are muxed, then we specify here a dummy value -1. There exists a + * define like this for each UART port. + */ +#define UART1_INT2 -1 +/*! + * This specifies the master interrupt number. If the interrupts of the UART + * are muxed, then we specify here a dummy value of -1. There exists a define + * like this for each UART port. + */ +#define UART1_INT3 -1 +/*! + * This specifies if the UART is a shared peripheral. It holds the shared + * peripheral number if it is shared or -1 if it is not shared. There exists + * a define like this for each UART port. + */ +#define UART1_SHARED_PERI -1 +/* UART 2 configuration */ +#define UART2_MUX_INTS INTS_MUXED +#define UART2_INT1 MXC_INT_UART2 +#define UART2_INT2 -1 +#define UART2_INT3 -1 +#define UART2_SHARED_PERI -1 +/* UART 3 configuration */ +#define UART3_MUX_INTS INTS_MUXED +#define UART3_INT1 MXC_INT_UART3 +#define UART3_INT2 -1 +#define UART3_INT3 -1 +#define UART3_SHARED_PERI SPBA_UART3 + +#endif /* __ARCH_ARM_MACH_MX51_SERIAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_3stack.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_3stack.c @@ -0,0 +1,1313 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include + +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "board-mx51_3stack.h" +#include "iomux.h" +#include "crm_regs.h" + +/*! + * @file mach-mx51/mx51_3stack.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX51 + */ +extern void __init mx51_3stack_io_init(void); +extern struct cpu_wp *(*get_cpu_wp)(int *wp); +extern void (*set_num_cpu_wp)(int num); +static int num_cpu_wp = 3; + +/* working point(wp): 0 - 800MHz; 1 - 166.25MHz; */ +static struct cpu_wp cpu_wp_auto[] = { + { + .pll_rate = 1000000000, + .cpu_rate = 1000000000, + .pdf = 0, + .mfi = 10, + .mfd = 11, + .mfn = 5, + .cpu_podf = 0, + .cpu_voltage = 1175000,}, + { + .pll_rate = 800000000, + .cpu_rate = 800000000, + .pdf = 0, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_podf = 0, + .cpu_voltage = 1100000,}, + { + .pll_rate = 800000000, + .cpu_rate = 166250000, + .pdf = 4, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_podf = 4, + .cpu_voltage = 850000,}, +}; + +struct cpu_wp *mx51_3stack_get_cpu_wp(int *wp) +{ + *wp = num_cpu_wp; + return cpu_wp_auto; +} + +void mx51_3stack_set_num_cpu_wp(int num) +{ + num_cpu_wp = num; + return; +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE) +static u16 keymapping[24] = { + KEY_1, KEY_2, KEY_3, KEY_F1, KEY_UP, KEY_F2, + KEY_4, KEY_5, KEY_6, KEY_LEFT, KEY_SELECT, KEY_RIGHT, + KEY_7, KEY_8, KEY_9, KEY_F3, KEY_DOWN, KEY_F4, + KEY_0, KEY_OK, KEY_ESC, KEY_ENTER, KEY_MENU, KEY_BACK, +}; + +static struct resource mxc_kpp_resources[] = { + [0] = { + .start = MXC_INT_KPP, + .end = MXC_INT_KPP, + .flags = IORESOURCE_IRQ, + } +}; + +static struct keypad_data keypad_plat_data = { + .rowmax = 4, + .colmax = 6, + .irq = MXC_INT_KPP, + .learning = 0, + .delay = 2, + .matrix = keymapping, +}; + +/* mxc keypad driver */ +static struct platform_device mxc_keypad_device = { + .name = "mxc_keypad", + .id = 0, + .num_resources = ARRAY_SIZE(mxc_kpp_resources), + .resource = mxc_kpp_resources, + .dev = { + .release = mxc_nop_release, + .platform_data = &keypad_plat_data, + }, +}; + +static void mxc_init_keypad(void) +{ + (void)platform_device_register(&mxc_keypad_device); +} +#else +static inline void mxc_init_keypad(void) +{ +} +#endif + +/* NAND Flash Partitions */ +#ifdef CONFIG_MTD_PARTITIONS + +static struct mtd_partition nand_flash_partitions[] = { + { + .name = "bootloader", + .offset = 0, + .size = 3 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 5 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs1", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs2", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +#endif + +/* MTD NAND flash */ +#if defined(CONFIG_MTD_NAND_MXC) \ + || defined(CONFIG_MTD_NAND_MXC_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V2) \ + || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V3) \ + || defined(CONFIG_MTD_NAND_MXC_V3_MODULE) + +extern void gpio_nand_active(void); +extern void gpio_nand_inactive(void); + +static int nand_init(void) +{ + /* Configure the pins */ + gpio_nand_active(); + return 0; +} + +static void nand_exit(void) +{ + /* Free the pins */ + gpio_nand_inactive(); +} + +static struct flash_platform_data mxc_nand_data = { + #ifdef CONFIG_MTD_PARTITIONS + .parts = nand_flash_partitions, + .nr_parts = ARRAY_SIZE(nand_flash_partitions), + #endif + .width = 1, + .init = nand_init, + .exit = nand_exit, +}; + +static struct platform_device mxc_nandv2_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ + (void)platform_device_register(&mxc_nandv2_mtd_device); +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +/* i.MX MTD NAND Flash Controller */ + +#if defined(CONFIG_MTD_NAND_IMX_NFC) || defined(CONFIG_MTD_NAND_IMX_NFC_MODULE) + +/* Resources for this device. */ + +static struct resource imx_nfc_resources[] = { + { + .flags = IORESOURCE_MEM, + .start = NFC_BASE_ADDR_AXI + 0x0000, + .end = NFC_BASE_ADDR_AXI + 0x1200 - 1, + .name = IMX_NFC_BUFFERS_ADDR_RES_NAME, + }, + { + .flags = IORESOURCE_MEM, + .start = NFC_BASE_ADDR_AXI + 0x1E00, + .end = NFC_BASE_ADDR_AXI + 0x1E44 - 1, + .name = IMX_NFC_PRIMARY_REGS_ADDR_RES_NAME, + }, + { + .flags = IORESOURCE_MEM, + .start = NFC_BASE_ADDR + 0x00, + .end = NFC_BASE_ADDR + 0x34 - 1, + .name = IMX_NFC_SECONDARY_REGS_ADDR_RES_NAME, + }, + { + .flags = IORESOURCE_IRQ, + .start = MXC_INT_NFC, + .end = MXC_INT_NFC, + .name = IMX_NFC_INTERRUPT_RES_NAME, + }, +}; + +/* + * Platform-specific information about this device. Some of the details depend + * on the SoC. See imx_init_nfc() below for code that fills in the rest. + */ + +static struct imx_nfc_platform_data imx_nfc_platform_data = { + .nfc_major_version = 3, + .nfc_minor_version = 2, + .force_ce = false, + .target_cycle_in_ns = 30, + .clock_name = "nfc_clk", + .set_page_size = 0, + .interleave = false, + #ifdef CONFIG_MTD_PARTITIONS + .partitions = nand_flash_partitions, + .partition_count = ARRAY_SIZE(nand_flash_partitions), + #endif +}; + +/* The structure that represents the NFC device. */ + +static struct platform_device imx_nfc_device = { + .name = IMX_NFC_DRIVER_NAME, + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &imx_nfc_platform_data, + }, + .resource = imx_nfc_resources, + .num_resources = ARRAY_SIZE(imx_nfc_resources), +}; + +/** + * imx_init_nfc() - Sets up the NFC for this platform. + * + * This function sets up data structures representing the NFC device on this + * platform and registers the device with the platform management system. + */ + +static void imx_nfc_init(void) +{ + (void)platform_device_register(&imx_nfc_device); +} + +#else + +static inline void imx_nfc_init(void) +{ +} + +#endif /* i.MX MTD NAND Flash Controller */ + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \ + defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) + +static struct mxc_fb_platform_data fb_data[] = { + { + .interface_pix_fmt = IPU_PIX_FMT_RGB666, + }, + { + .interface_pix_fmt = IPU_PIX_FMT_YUV444, + }, +}; + +static struct platform_device mxc_fb_device[] = { + { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + .platform_data = &fb_data[0], + }, + }, + { + .name = "mxc_sdc_fb", + .id = 1, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + .platform_data = &fb_data[1], + }, + }, + { + .name = "mxc_sdc_fb", + .id = 2, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, + }, +}; + +static void lcd_reset_to2(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 0); + ipu_reset_disp_panel(); + + return; +} + +static void lcd_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_RS), 0); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_RS), "ser_rs"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_RS), 0); + /* do reset */ + msleep(10); /* tRES >= 100us */ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_RS), 1); + msleep(60); +} + +static struct mxc_lcd_platform_data lcd_data = { + .core_reg = "VIOHI", + .io_reg = "SW4", + .reset = lcd_reset, +}; + +static struct platform_device mxc_lcd_device = { + .name = "lcd_spi", + .dev = { + .release = mxc_nop_release, + .platform_data = &lcd_data, + }, +}; + +static void wvga_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 1); +} + +static struct mxc_lcd_platform_data lcd_wvga_data = { + .reset = wvga_reset, +}; + +static struct platform_device lcd_wvga_device = { + .name = "lcd_claa", + .dev = { + .release = mxc_nop_release, + .platform_data = &lcd_wvga_data, + }, +}; + +extern int g_di1_tvout; +static void mxc_init_fb(void) +{ + g_di1_tvout = 1; + if (cpu_is_mx51_rev(CHIP_REV_2_0) > 0) + lcd_data.reset = lcd_reset_to2; + + (void)platform_device_register(&mxc_lcd_device); + (void)platform_device_register(&lcd_wvga_device); + + (void)platform_device_register(&mxc_fb_device[0]); + (void)platform_device_register(&mxc_fb_device[1]); + (void)platform_device_register(&mxc_fb_device[2]); +} +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +static struct platform_device mxcbl_device = { + .name = "mxc_mc13892_bl", +}; + +static inline void mxc_init_bl(void) +{ + platform_device_register(&mxcbl_device); +} + +void si4702_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_DTACK), 0); + msleep(100); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_DTACK), 1); + msleep(100); +} + +void si4702_clock_ctl(int flag) +{ +} + +static void si4702_gpio_get(void) +{ + /* reset pin */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_DTACK), "eim_dtack"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_DTACK), 0); +} + +static void si4702_gpio_put(void) +{ +} + +static struct mxc_fm_platform_data si4702_data = { + .reg_vio = "SW4", + .reg_vdd = "VIOHI", + .gpio_get = si4702_gpio_get, + .gpio_put = si4702_gpio_put, + .reset = si4702_reset, + .clock_ctl = si4702_clock_ctl, + .sksnr = 0, + .skcnt = 0, + .band = 0, + .space = 100, + .seekth = 0xa, +}; + +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { +}; +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 +static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { + { + .type = "wm8903-i2c", + .addr = 0x1a, + }, + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, + { + .type = "tsc2007", + .addr = 0x48, + .irq = IOMUX_TO_IRQ(MX51_PIN_GPIO1_5), + }, + { + .type = "si4702", + .addr = 0x10, + .platform_data = (void *)&si4702_data, + }, +}; +#endif +#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE) +static struct mxc_camera_platform_data camera_data = { + .io_regulator = "SW4", + .analog_regulator = "VIOHI", + .mclk = 24000000, + .csi = 0, +}; +static struct mxc_lightsensor_platform_data ls_data = { + .vdd_reg = NULL, + .rext = 100, +}; + +static struct i2c_board_info mxc_i2c_hs_board_info[] __initdata = { + { + .type = "ov3640", + .addr = 0x3C, + .platform_data = (void *)&camera_data, + }, + { + .type = "isl29003", + .addr = 0x44, + .platform_data = &ls_data, + }, +}; +#endif + +#endif + +static u32 cpld_base_addr; + +/*lan9217 device*/ +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +static struct resource smsc911x_resources[] = { + { + .flags = IORESOURCE_MEM, + }, + { + .start = LAN9217_IRQ, + .end = LAN9217_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +struct smsc911x_platform_config smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, +}; + +static struct platform_device smsc_lan9217_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &smsc911x_config, + }, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, +}; +static void mxc_init_enet(void) +{ + if (cpld_base_addr) { + smsc_lan9217_device.resource[0].start = + LAN9217_BASE_ADDR(cpld_base_addr); + smsc_lan9217_device.resource[0].end = + LAN9217_BASE_ADDR(cpld_base_addr) + 0x100; + (void)platform_device_register(&smsc_lan9217_device); + } +} +#else +static inline void mxc_init_enet(void) +{ +} +#endif + +#if defined(CONFIG_IMX_SIM) || defined(CONFIG_IMX_SIM_MODULE) +/* Used to configure the SIM bus */ +static struct mxc_sim_platform_data sim_data = { + .clk_rate = 4000000, + .clock_sim = "sim_clk", + .power_sim = NULL, + .init = NULL, + .exit = NULL, + .detect = 0, +}; + +/*! + * Resource definition for the SIM + */ +static struct resource mxc_sim_resources[] = { + [0] = { + .start = SIM_BASE_ADDR, + .end = SIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_SIM_IPB, + .end = MXC_INT_SIM_IPB, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = MXC_INT_SIM_DAT, + .end = MXC_INT_SIM_DAT, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for IMX SIM */ +static struct platform_device mxc_sim_device = { + .name = "mxc_sim", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &sim_data, + }, + .num_resources = ARRAY_SIZE(mxc_sim_resources), + .resource = mxc_sim_resources, +}; + +static inline void mxc_init_sim(void) +{ + (void)platform_device_register(&mxc_sim_device); +} +#else +static inline void mxc_init_sim(void) +{ +} +#endif + +#if defined(CONFIG_MMC_IMX_ESDHCI) || defined(CONFIG_MMC_IMX_ESDHCI_MODULE) +/*! + * Get WP pin value to detect write protection + */ +int sdhc_write_protect(struct device *dev) +{ + unsigned short rc = 0; + + if (to_platform_device(dev)->id == 0) + rc = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); + else + rc = 0; + return rc; +} + +/* + * Probe for the card. If present the GPIO data would be set. + */ +unsigned int sdhc_get_card_det_status(struct device *dev) +{ + int ret; + + if (to_platform_device(dev)->id == 0) { + ret = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); + return ret; + } else { /* config the det pin for SDHC2 */ + return 0; + } +} + +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_32_33, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 52000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", + .power_mmc = NULL, +}; +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | + MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 50000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC1, + .end = MXC_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = IOMUX_TO_IRQ(MX51_PIN_GPIO1_0), + .end = IOMUX_TO_IRQ(MX51_PIN_GPIO1_0), + .flags = IORESOURCE_IRQ, + }, +}; + +/*! + * Resource definition for the SDHC2 + */ +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxsdhci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +/*! Device Definition for MXC SDHC2 */ +static struct platform_device mxcsdhc2_device = { + .name = "mxsdhci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; + +static inline void mxc_init_mmc(void) +{ + (void)platform_device_register(&mxcsdhc1_device); + (void)platform_device_register(&mxcsdhc2_device); +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +static u32 brd_io; +static void expio_ack_irq(u32 irq); + +static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 imr_val; + u32 int_valid; + u32 expio_irq; + + desc->chip->mask(irq); /* irq = gpio irq number */ + + imr_val = __raw_readw(brd_io + INTR_MASK_REG); + int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val; + + if (unlikely(!int_valid)) + goto out; + + expio_irq = MXC_BOARD_IRQ_START; + for (; int_valid != 0; int_valid >>= 1, expio_irq++) { + struct irq_desc *d; + if ((int_valid & 1) == 0) + continue; + d = irq_desc + expio_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nEXPIO irq: %d unhandled\n", + expio_irq); + BUG(); /* oops */ + } + d->handle_irq(expio_irq, d); + } + + out: + desc->chip->ack(irq); + desc->chip->unmask(irq); +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ + u16 reg; + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* mask the interrupt */ + reg = __raw_readw(brd_io + INTR_MASK_REG); + reg |= (1 << expio); + __raw_writew(reg, brd_io + INTR_MASK_REG); +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* clear the interrupt status */ + __raw_writew(1 << expio, brd_io + INTR_RESET_REG); + __raw_writew(0, brd_io + INTR_RESET_REG); + /* mask the interrupt */ + expio_mask_irq(irq); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ + u16 reg; + u32 expio = MXC_IRQ_TO_EXPIO(irq); + /* unmask the interrupt */ + reg = __raw_readw(brd_io + INTR_MASK_REG); + reg &= ~(1 << expio); + __raw_writew(reg, brd_io + INTR_MASK_REG); +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static int __init mxc_expio_init(void) +{ + int i; + + brd_io = (u32) ioremap(BOARD_IO_ADDR(CS5_BASE_ADDR), SZ_4K); + if (brd_io == 0) + return -ENOMEM; + + if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) || + (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) || + (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) { + pr_info("3-Stack Debug board not detected \n"); + cpld_base_addr = 0; + return -ENODEV; + } else { + cpld_base_addr = CS5_BASE_ADDR; + } + + pr_info("3-Stack Debug board detected, rev = 0x%04X\n", + readw(brd_io + CPLD_CODE_VER_REG)); + + /* + * Configure INT line as GPIO input + */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6), "gpio1_6"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_6)); + + /* disable the interrupt and clear the status */ + __raw_writew(0, brd_io + INTR_MASK_REG); + __raw_writew(0xFFFF, brd_io + INTR_RESET_REG); + __raw_writew(0, brd_io + INTR_RESET_REG); + __raw_writew(0x1F, brd_io + INTR_MASK_REG); + for (i = MXC_BOARD_IRQ_START; i < (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS); + i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(EXPIO_PARENT_INT, IRQF_TRIGGER_LOW); + set_irq_chained_handler(EXPIO_PARENT_INT, mxc_expio_irq_handler); + + return 0; +} + +#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE) +extern void gpio_ata_active(void); +extern void gpio_ata_inactive(void); + +static int ata_init(struct platform_device *pdev) +{ + /* Configure the pins */ + gpio_ata_active(); + return 0; +} + +static void ata_exit(void) +{ + /* Free the pins */ + gpio_ata_inactive(); +} + +static struct fsl_ata_platform_data ata_data = { + .udma_mask = ATA_UDMA3, + .mwdma_mask = ATA_MWDMA2, + .pio_mask = ATA_PIO4, + .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2, + .max_sg = MXC_IDE_DMA_BD_NR, + .init = ata_init, + .exit = ata_exit, + .core_reg = NULL, + .io_reg = NULL, +}; + +static struct resource pata_fsl_resources[] = { + [0] = { + .start = ATA_BASE_ADDR, + .end = ATA_BASE_ADDR + 0x000000C8, + .flags = IORESOURCE_MEM,}, + [2] = { + .start = MXC_INT_ATA, + .end = MXC_INT_ATA, + .flags = IORESOURCE_IRQ,}, +}; + +static struct platform_device pata_fsl_device = { + .name = "pata_fsl", + .id = -1, + .num_resources = ARRAY_SIZE(pata_fsl_resources), + .resource = pata_fsl_resources, + .dev = { + .platform_data = &ata_data, + .coherent_dma_mask = ~0,}, +}; + +static void __init mxc_init_pata(void) +{ + (void)platform_device_register(&pata_fsl_device); +} +#else /* CONFIG_PATA_FSL */ +static void __init mxc_init_pata(void) +{ +} +#endif /* CONFIG_PATA_FSL */ + +#if defined(CONFIG_TOUCHSCREEN_TSC2007) \ + || defined(CONFIG_TOUCHSCREEN_TSC2007_MODULE) + +static int __init mxc_init_touchscreen(void) +{ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), "gpio1_5"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5)); + + return 0; +} +#else +static int __init mxc_init_touchscreen(void) +{ + return 0; +} +#endif + +static int __init mxc_init_srpgconfig(void) +{ + struct clk *gpcclk = clk_get(NULL, "gpc_dvfs_clk"); + clk_enable(gpcclk); + + /* Setup the number of clock cycles to wait for SRPG + * power up and power down requests. + */ + __raw_writel(0x010F0201, MXC_SRPG_ARM_PUPSCR); + __raw_writel(0x010F0201, MXC_SRPG_NEON_PUPSCR); + __raw_writel(0x00000008, MXC_SRPG_EMPGC0_PUPSCR); + __raw_writel(0x00000008, MXC_SRPG_EMPGC1_PUPSCR); + + __raw_writel(0x01010101, MXC_SRPG_ARM_PDNSCR); + __raw_writel(0x01010101, MXC_SRPG_NEON_PDNSCR); + __raw_writel(0x00000018, MXC_SRPG_EMPGC0_PDNSCR); + __raw_writel(0x00000018, MXC_SRPG_EMPGC1_PDNSCR); + + clk_disable(gpcclk); + clk_put(gpcclk); + + return 0; +} + +#if defined(CONFIG_SND_SOC_IMX_3STACK_WM8903) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_WM8903_MODULE) +static struct mxc_audio_platform_data wm8903_data; + +static struct platform_device mxc_wm8903_device = { + .name = "imx-3stack-wm8903", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &wm8903_data, + }, +}; + +static void __init mxc_init_wm8903(void) +{ + wm8903_data.ssi_clk[0] = clk_get(NULL, "ssi_clk.0"); + clk_put(wm8903_data.ssi_clk[0]); + + wm8903_data.ssi_clk[1] = clk_get(NULL, "ssi_clk.1"); + clk_put(wm8903_data.ssi_clk[1]); + + wm8903_data.ssi_num = 1; + wm8903_data.src_port = 2; + wm8903_data.ext_port = 3; + + (void)platform_device_register(&mxc_wm8903_device); +} +#else +static void __init mxc_init_wm8903(void) +{ +} +#endif + +#if defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000_MODULE) +static int mxc_sgtl5000_plat_init(void); +static int mxc_sgtl5000_plat_finit(void); +static int mxc_sgtl5000_amp_enable(int enable); + +int headphone_det_status(void) +{ + return gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26)); +} + +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 3, + .hp_irq = IOMUX_TO_IRQ(MX51_PIN_EIM_A26), + .hp_status = headphone_det_status, + .amp_enable = mxc_sgtl5000_amp_enable, + .sysclk = 12000000, + .init = mxc_sgtl5000_plat_init, + .finit = mxc_sgtl5000_plat_finit, +}; + +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", + .dev = { + .release = mxc_nop_release, + .platform_data = &sgtl5000_data, + }, +}; + +static int mxc_sgtl5000_plat_init(void) +{ + struct regulator *reg; + reg = regulator_get(&mxc_sgtl5000_device.dev, "GPO2"); + if (IS_ERR(reg)) + return -EINVAL; + sgtl5000_data.priv = reg; + return 0; +} + +static int mxc_sgtl5000_plat_finit(void) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + if (reg) { + regulator_put(reg); + sgtl5000_data.priv = NULL; + } + return 0; +} + +static int mxc_sgtl5000_amp_enable(int enable) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + + if (!reg) + return -EINVAL; + if (enable) + regulator_enable(reg); + else + regulator_disable(reg); + return 0; +} + +static void mxc_init_sgtl5000(void) +{ + platform_device_register(&mxc_sgtl5000_device); +} +#else +static inline void mxc_init_sgtl5000(void) +{ +} +#endif + +static void bt_reset(void) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D19), 1); +} + +static struct mxc_bt_platform_data mxc_bt_data = { + .bt_vdd = NULL, + .bt_vdd_parent = NULL, + .bt_vusb = "SW4", + .bt_vusb_parent = NULL, + .bt_reset = bt_reset, +}; + +static struct platform_device mxc_bt_device = { + .name = "mxc_bt", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_bt_data, + }, +}; + +static void mxc_init_bluetooth(void) +{ + (void)platform_device_register(&mxc_bt_device); +} + +static void mxc_unifi_hardreset(int pin_level) +{ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D19), pin_level & 0x01); +} + +static struct mxc_unifi_platform_data unifi_data = { + .hardreset = mxc_unifi_hardreset, + .reg_vdd_vpa = "VSD", + .reg_1v5_dd = "VGEN1", + .host_id = 1, +}; + +struct mxc_unifi_platform_data *get_unifi_plat_data(void) +{ + return &unifi_data; +} + +EXPORT_SYMBOL(get_unifi_plat_data); + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); + + get_cpu_wp = mx51_3stack_get_cpu_wp; + set_num_cpu_wp = mx51_3stack_set_num_cpu_wp; +#ifdef CONFIG_DISCONTIGMEM + do { + int nid; + mi->nr_banks = MXC_NUMNODES; + for (nid = 0; nid < mi->nr_banks; nid++) + SET_NODE(mi, nid); + + } while (0); +#endif +} + +#if defined(CONFIG_GPS_IOCTRL) || defined(CONFIG_GPS_IOCTRL_MODULE) +static struct mxc_gps_platform_data gps_data = { + .core_reg = "VIOHI", + .analog_reg = "SW4", +}; + +static struct platform_device mxc_gps_device = { + .name = "gps_ioctrl", + .id = -1, + .dev = { + .platform_data = &gps_data, + }, +}; + +static void __init mxc_init_gps(void) +{ + (void)platform_device_register(&mxc_gps_device); +} + +int gpio_gps_access(int para) +{ + iomux_pin_name_t pin; + pin = (para & 0x1) ? MX51_PIN_EIM_CS2 : MX51_PIN_EIM_CRE; + + if (para & 0x4) /* Read GPIO */ + return gpio_get_value(IOMUX_TO_GPIO(pin)); + else if (para & 0x2) /* Write GPIO */ + gpio_set_value(IOMUX_TO_GPIO(pin), 1); + else + gpio_set_value(IOMUX_TO_GPIO(pin), 0); + return 0; +} +EXPORT_SYMBOL(gpio_gps_access); +#else +static void __init mxc_init_gps(void) +{ +} +#endif + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + int err; + + mxc_cpu_common_init(); + mxc_register_gpios(); + mx51_3stack_io_init(); + early_console_setup(saved_command_line); + mxc_init_devices(); + + mxc_expio_init(); + mxc_init_enet(); + mxc_init_pata(); + mxc_init_fb(); + mxc_init_bl(); + mxc_init_keypad(); + mxc_init_nand_mtd(); + imx_nfc_init(); + mxc_init_mmc(); + mxc_init_sim(); + mxc_init_srpgconfig(); + mx51_3stack_init_mc13892(); + +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 + i2c_register_board_info(1, mxc_i2c1_board_info, + ARRAY_SIZE(mxc_i2c1_board_info)); +#endif +#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE) + i2c_register_board_info(3, mxc_i2c_hs_board_info, + ARRAY_SIZE(mxc_i2c_hs_board_info)); +#endif + +#endif + mxc_init_touchscreen(); + mxc_init_wm8903(); + mxc_init_sgtl5000(); + mxc_init_bluetooth(); + mxc_init_gps(); + + err = mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_GPIO); + if (err) + printk(KERN_ERR "Error: bt reset request gpio failed!\n"); + else { + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D19), "eim_d19"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D19), 0); + } +} + +static void __init mx51_3stack_timer_init(void) +{ + /* Change the CPU voltages for TO2*/ + if (cpu_is_mx51_rev(CHIP_REV_2_0) <= 1) { + cpu_wp_auto[0].cpu_voltage = 1175000; + cpu_wp_auto[1].cpu_voltage = 1100000; + cpu_wp_auto[2].cpu_voltage = 1000000; + } + + mx51_clocks_init(32768, 24000000, 22579200, 24576000); +} + +static struct sys_timer mxc_timer = { + .init = mx51_3stack_timer_init, +}; + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX51_3STACK data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx51_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/serial.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/serial.c @@ -0,0 +1,169 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file mach-mx51/serial.c + * + * @brief This file contains the UART initiliazation. + * + * @ingroup MSL_MX51 + */ +#include +#include +#include +#include +#include +#include +#include "serial.h" +#include "board-mx51_3stack.h" + +#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) + +/*! + * This is an array where each element holds information about a UART port, + * like base address of the UART, interrupt numbers etc. This structure is + * passed to the serial_core.c file. Based on which UART is used, the core file + * passes back the appropriate port structure as an argument to the control + * functions. + */ +static uart_mxc_port mxc_ports[] = { + [0] = { + .port = { + .membase = (void *)IO_ADDRESS(UART1_BASE_ADDR), + .mapbase = UART1_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART1_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .ints_muxed = UART1_MUX_INTS, + .irqs = {UART1_INT2, UART1_INT3}, + .mode = UART1_MODE, + .ir_mode = UART1_IR, + .enabled = UART1_ENABLED, + .hardware_flow = UART1_HW_FLOW, + .cts_threshold = UART1_UCR4_CTSTL, + .dma_enabled = UART1_DMA_ENABLE, + .dma_rxbuf_size = UART1_DMA_RXBUFSIZE, + .rx_threshold = UART1_UFCR_RXTL, + .tx_threshold = UART1_UFCR_TXTL, + .shared = UART1_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART1_TX, + .dma_rx_id = MXC_DMA_UART1_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, + [1] = { + .port = { + .membase = (void *)IO_ADDRESS(UART2_BASE_ADDR), + .mapbase = UART2_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART2_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 1, + }, + .ints_muxed = UART2_MUX_INTS, + .irqs = {UART2_INT2, UART2_INT3}, + .mode = UART2_MODE, + .ir_mode = UART2_IR, + .enabled = UART2_ENABLED, + .hardware_flow = UART2_HW_FLOW, + .cts_threshold = UART2_UCR4_CTSTL, + .dma_enabled = UART2_DMA_ENABLE, + .dma_rxbuf_size = UART2_DMA_RXBUFSIZE, + .rx_threshold = UART2_UFCR_RXTL, + .tx_threshold = UART2_UFCR_TXTL, + .shared = UART2_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART2_TX, + .dma_rx_id = MXC_DMA_UART2_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, + [2] = { + .port = { + .membase = (void *)IO_ADDRESS(UART3_BASE_ADDR), + .mapbase = UART3_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART3_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 2, + }, + .ints_muxed = UART3_MUX_INTS, + .irqs = {UART3_INT2, UART3_INT3}, + .mode = UART3_MODE, + .ir_mode = UART3_IR, + .enabled = UART3_ENABLED, + .hardware_flow = UART3_HW_FLOW, + .cts_threshold = UART3_UCR4_CTSTL, + .dma_enabled = UART3_DMA_ENABLE, + .dma_rxbuf_size = UART3_DMA_RXBUFSIZE, + .rx_threshold = UART3_UFCR_RXTL, + .tx_threshold = UART3_UFCR_TXTL, + .shared = UART3_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART3_TX, + .dma_rx_id = MXC_DMA_UART3_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, +}; + +static struct platform_device mxc_uart_device1 = { + .name = "mxcintuart", + .id = 0, + .dev = { + .platform_data = &mxc_ports[0], + }, +}; + +static struct platform_device mxc_uart_device2 = { + .name = "mxcintuart", + .id = 1, + .dev = { + .platform_data = &mxc_ports[1], + }, +}; + +static struct platform_device mxc_uart_device3 = { + .name = "mxcintuart", + .id = 2, + .dev = { + .platform_data = &mxc_ports[2], + }, +}; + +static int __init mxc_init_uart(void) +{ + /* Register all the MXC UART platform device structures */ + platform_device_register(&mxc_uart_device1); + platform_device_register(&mxc_uart_device2); + + /* Grab ownership of shared UARTs 3 and 4, only when enabled */ +#if UART3_ENABLED == 1 +#if UART3_DMA_ENABLE == 1 + spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART3_DMA_ENABLE */ + platform_device_register(&mxc_uart_device3); +#endif /* UART3_ENABLED */ + + return 0; +} + +#else +static int __init mxc_init_uart(void) +{ + return 0; +} +#endif + +arch_initcall(mxc_init_uart); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx51/mx51_3stack_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx51/mx51_3stack_gpio.c @@ -0,0 +1,851 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "iomux.h" + +/*! + * @file mach-mx51/mx51_3stack_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO + */ +#define ATA_PAD_CONFIG (PAD_CTL_DRV_HIGH | PAD_CTL_DRV_VOT_HIGH) + +static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { + /* CSI0 */ + { + MX51_PIN_CSI1_D8, IOMUX_CONFIG_ALT3, + PAD_CTL_PKE_ENABLE, + MUX_IN_GPIO3_IPP_IND_G_IN_12_SELECT_INPUT, + INPUT_CTL_PATH1, + }, + { + MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3, + PAD_CTL_PKE_ENABLE, + }, + { + MX51_PIN_CSI1_D10, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D11, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D12, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D13, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D14, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D15, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D16, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D17, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D18, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_D19, IOMUX_CONFIG_ALT0, PAD_CTL_HYS_NONE, + }, + { + MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_SRE_SLOW), + }, + { + MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_SRE_SLOW), + }, + { + MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION, + (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_MEDIUM | PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_VOT_HIGH), + MUX_IN_HSC_MIPI_MIX_IPP_IND_SENS2_DATA_EN_SELECT_INPUT, + INPUT_CTL_PATH0, + }, + { /* SPI1 */ + MX51_PIN_CSPI1_MISO, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_CSPI1_MOSI, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_CSPI1_RDY, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_OWIRE_LINE, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP2_DAT15, IOMUX_CONFIG_ALT5, + }, + { + MX51_PIN_DI_GP2, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_DI_GP3, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL0, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL1, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL2, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL3, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL4, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_COL5, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_ROW0, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_ROW1, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_ROW2, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_KEY_ROW3, IOMUX_CONFIG_ALT0, + }, + { /* AUD3_TXD */ + MX51_PIN_AUD3_BB_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_100K_PU | + PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), + }, + { /* AUD3_RXD */ + MX51_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_100K_PU | + PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), + }, + { /* AUD3_CLK */ + MX51_PIN_AUD3_BB_CK, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_100K_PU | + PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), + }, + { /* AUD3_FS */ + MX51_PIN_AUD3_BB_FS, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | + PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_100K_PU | + PAD_CTL_HYS_NONE | PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), + }, + { + MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT1, + (PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { + MX51_PIN_EIM_EB2, IOMUX_CONFIG_ALT1, + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | PAD_CTL_100K_PD, + }, + { + MX51_PIN_EIM_DTACK, IOMUX_CONFIG_GPIO, + (PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_EIM_CS2, IOMUX_CONFIG_GPIO, + (PAD_CTL_DRV_HIGH | PAD_CTL_HYS_NONE | PAD_CTL_PUE_KEEPER | + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_EIM_CRE, IOMUX_CONFIG_GPIO, + (PAD_CTL_DRV_HIGH | PAD_CTL_HYS_NONE | PAD_CTL_PUE_KEEPER | + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DI_GP4, IOMUX_CONFIG_ALT2, + }, + { + MX51_PIN_DISPB2_SER_DIN, IOMUX_CONFIG_GPIO, + 0, + MUX_IN_GPIO3_IPP_IND_G_IN_5_SELECT_INPUT, + INPUT_CTL_PATH1, + }, + { + MX51_PIN_DISPB2_SER_RS, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_DISPB2_SER_DIO, IOMUX_CONFIG_GPIO, + }, + { /* TO2 */ + MX51_PIN_DI1_D1_CS, IOMUX_CONFIG_ALT4, + }, + { /* TO2 */ + MX51_PIN_DI1_D0_CS, IOMUX_CONFIG_ALT1, + }, + { /* TO2 */ + MX51_PIN_DI1_PIN11, IOMUX_CONFIG_ALT1, + }, + { /* TO2 */ + MX51_PIN_DI1_PIN12, IOMUX_CONFIG_ALT1, + }, + { /* TO2 */ + MX51_PIN_DI1_PIN13, IOMUX_CONFIG_ALT1, + }, +#ifdef CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL + { + MX51_PIN_DISP1_DAT0, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT1, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT2, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT3, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT4, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT5, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT6, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT7, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT8, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT9, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT10, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT11, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT12, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT13, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT14, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT15, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT16, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT17, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT18, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT19, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT20, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT21, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT22, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_DISP1_DAT23, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_DRV_LOW | PAD_CTL_SRE_FAST), + }, +#endif + { + MX51_PIN_I2C1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + 0x1E4, + }, + { + MX51_PIN_I2C1_DAT, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + 0x1E4, + }, + { + MX51_PIN_GPIO1_6, IOMUX_CONFIG_GPIO, + }, + { + MX51_PIN_GPIO1_7, IOMUX_CONFIG_ALT2, + (PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL | + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE | + PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT2 | IOMUX_CONFIG_SION, + (PAD_CTL_SRE_FAST | PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE), + MUX_IN_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_CTL_PATH3, + }, + { + MX51_PIN_GPIO1_3, IOMUX_CONFIG_ALT2 | IOMUX_CONFIG_SION, + (PAD_CTL_SRE_FAST | PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_100K_PU | PAD_CTL_HYS_ENABLE), + MUX_IN_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_CTL_PATH3, + }, + { + MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_CLK */ + MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_DIR */ + MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_NXT */ + MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_KEEPER | + PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_DDR_INPUT_CMOS), + }, + { /* USBH1_DATA0 */ + MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA1 */ + MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA2 */ + MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA3 */ + MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA4 */ + MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA5 */ + MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA6 */ + MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USBH1_DATA7 */ + MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE), + }, + { /* USB1_OC */ + MX51_PIN_GPIO1_9, IOMUX_CONFIG_ALT1, + (PAD_CTL_SRE_SLOW | PAD_CTL_DRV_LOW | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PUE_KEEPER | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE), + }, + { /* USB1_PWR */ + MX51_PIN_GPIO1_8, IOMUX_CONFIG_ALT1, + (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_NONE | PAD_CTL_HYS_ENABLE), + }, + { + MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_GPIO1_0, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_GPIO1_1, IOMUX_CONFIG_GPIO | IOMUX_CONFIG_SION, + (PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU), + }, + { + MX51_PIN_SD2_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA0, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA1, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA2, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0, + (PAD_CTL_DRV_MAX | PAD_CTL_22K_PU | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_UART1_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH0, + }, + { + MX51_PIN_UART1_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_UART1_RTS, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH), + MUX_IN_UART1_IPP_UART_RTS_B_SELECT_INPUT, + INPUT_CTL_PATH0, + }, + { + MX51_PIN_UART1_CTS, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH), + }, + { + MX51_PIN_UART2_RXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH2, + }, + { + MX51_PIN_UART2_TXD, IOMUX_CONFIG_ALT0, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_EIM_D26, IOMUX_CONFIG_ALT4, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART2_IPP_UART_RTS_B_SELECT_INPUT, + INPUT_CTL_PATH3, + }, + { + MX51_PIN_EIM_D25, IOMUX_CONFIG_ALT4, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_UART3_RXD, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART3_IPP_UART_RXD_MUX_SELECT_INPUT, + INPUT_CTL_PATH4, + }, + { + MX51_PIN_UART3_TXD, IOMUX_CONFIG_ALT1, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, + { + MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + MUX_IN_UART3_IPP_UART_RTS_B_SELECT_INPUT, + INPUT_CTL_PATH3, + }, + { + MX51_PIN_EIM_D24, IOMUX_CONFIG_ALT3, + (PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_KEEPER | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST), + }, +}; + +static struct mxc_iomux_pin_cfg __initdata ata_iomux_pins[] = { + { + MX51_PIN_NANDF_ALE, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CS2, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CS3, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CS4, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CS5, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CS6, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_CLE, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_RB0, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + /* TO 2.0 */ + { + MX51_PIN_GPIO_NAND, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + /* TO 1.0 */ + { + MX51_PIN_NANDF_RB5, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_RB1, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D0, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D1, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D2, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D3, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D4, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D5, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D6, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D7, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D8, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D9, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D10, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D11, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D12, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D13, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D14, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, + { + MX51_PIN_NANDF_D15, IOMUX_CONFIG_ALT1, + ATA_PAD_CONFIG, + }, +}; + +static struct mxc_iomux_pin_cfg __initdata nand_iomux_pins[] = { + { + MX51_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS2, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS3, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS4, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS5, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS6, IOMUX_CONFIG_ALT0, + }, + { + MX51_PIN_NANDF_CS7, IOMUX_CONFIG_ALT0, + }, + /* TO2 */ + { + MX51_PIN_GPIO_NAND, IOMUX_CONFIG_ALT0, + }, + /* TO1 */ + { + MX51_PIN_NANDF_RB5, IOMUX_CONFIG_ALT0, + }, +}; + +static struct mxc_iomux_pin_cfg __initdata sim_iomux_pins[] = { + { + MX51_PIN_NANDF_CS4, IOMUX_CONFIG_ALT6, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_PKE_ENABLE, + }, + { + MX51_PIN_NANDF_CS5, IOMUX_CONFIG_ALT6, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | + PAD_CTL_PUE_KEEPER | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_PKE_ENABLE, + }, + { + MX51_PIN_NANDF_CS6, IOMUX_CONFIG_ALT6, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_100K_PD | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_PKE_ENABLE, + }, + { + MX51_PIN_NANDF_CS7, IOMUX_CONFIG_ALT6, + PAD_CTL_DRV_HIGH | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_22K_PU | + PAD_CTL_PUE_PULL | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_PKE_ENABLE, + }, +}; + +static int __initdata enable_ata = { 0 }; +static int __init ata_setup(char *__unused) +{ + enable_ata = 1; + return 1; +} + +__setup("ata", ata_setup); + +static int __initdata enable_sim = { 0 }; +static int __init sim_setup(char *__unused) +{ + enable_sim = 1; + return 1; +} + +__setup("sim", sim_setup); + +void __init mx51_3stack_io_init(void) +{ + int i, num; + struct mxc_iomux_pin_cfg *pin_ptr; + + for (i = 0; i < ARRAY_SIZE(mxc_iomux_pins); i++) { + mxc_request_iomux(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].mux_mode); + if (mxc_iomux_pins[i].pad_cfg) + mxc_iomux_set_pad(mxc_iomux_pins[i].pin, + mxc_iomux_pins[i].pad_cfg); + if (mxc_iomux_pins[i].in_select) + mxc_iomux_set_input(mxc_iomux_pins[i].in_select, + mxc_iomux_pins[i].in_mode); + } + + if (enable_ata) { + pin_ptr = ata_iomux_pins; + num = ARRAY_SIZE(ata_iomux_pins); + } else if (enable_sim) { + pin_ptr = sim_iomux_pins; + num = ARRAY_SIZE(sim_iomux_pins); + } else { + pin_ptr = nand_iomux_pins; + num = ARRAY_SIZE(nand_iomux_pins); + } + + for (i = 0; i < num; i++) { + mxc_request_iomux(pin_ptr[i].pin, pin_ptr[i].mux_mode); + if (pin_ptr[i].pad_cfg) + mxc_iomux_set_pad(pin_ptr[i].pin, pin_ptr[i].pad_cfg); + if (pin_ptr[i].in_select) + mxc_iomux_set_input(pin_ptr[i].in_select, + pin_ptr[i].in_mode); + } + + /* TO3 doesn't need pad to drive CSI_DATA_EN[0] high */ + if (cpu_is_mx51_rev(CHIP_REV_3_0) > 0) + mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT0); + + /* Camera low power */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI1_D8), "csi1_d8"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D8), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D8), 0); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_EB2), "eim_eb2"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_EB2), 0); /* TO1 */ + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_EB2), 0); /* TO1 */ + + /* Camera reset */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), "csi1_d9"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 1); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), "di1_d1_cs"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 0); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0), "gpio1_0"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); /* SD1 CD */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1), "gpio1_1"); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1)); /* SD1 WP */ + + /* EIM_D16 */ + /* osc_en is shared by SPDIF */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_D16), "eim_d16"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D16), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D16), 1); + + /* LCD related gpio */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), "di1_d1_cs"); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), "dispb2_ser_di0"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DI1_D1_CS), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_DISPB2_SER_DIO), 0); + + /* GPS related gpio */ + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_CS2), "eim_cs2"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CS2), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS2), 0); + gpio_request(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), "eim_cre"); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CRE), 1); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx27ads_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx27ads_defconfig @@ -0,0 +1,1756 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.28 +# Wed Apr 22 10:24:31 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX51 is not set +# CONFIG_ARCH_MX3 is not set +CONFIG_ARCH_MX27=y +# CONFIG_ARCH_MX25 is not set + +# +# MX27 Options +# +CONFIG_MX27_OPTIONS=y +CONFIG_MACH_MX27ADS=y +CONFIG_ARCH_MXC_HAS_NFC_V1=y + +# +# Device options +# +CONFIG_I2C_MXC_SELECT1=y +# CONFIG_I2C_MXC_SELECT2 is not set +CONFIG_MXC_EMMA=y +CONFIG_DMA_ZONE_SIZE=24 +CONFIG_ISP1301_MXC=y +CONFIG_MXC_USB_SU6=y +# CONFIG_MXC_USB_SB3 is not set +# CONFIG_MXC_USB_DU6 is not set +# CONFIG_MXC_USB_DB4 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +# CONFIG_CPU_V6 is not set +# CONFIG_CPU_V7 is not set +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0 root=/dev/mtdblock2 rw ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_MCS_FIR is not set +# CONFIG_MXC_FIR is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +# CONFIG_IEEE80211_CRYPT_WEP is not set +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set +CONFIG_MTD_MXC=y + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_NAND_MXC=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_C2PORT is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +CONFIG_CS89x0=y +CONFIG_CS89x0_NONISA_IRQ=y +# CONFIG_FEC is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_MXC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MXC_IIM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +CONFIG_SPI_MXC_SELECT2=y +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +CONFIG_W1_MASTER_MXC=m + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2751 is not set +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2438 is not set +# CONFIG_W1_SLAVE_DS2433_CRC is not set +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_W1_SLAVE_BQ27000 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=y + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_EMMA_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_DMA is not set +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +CONFIG_MXC_CAMERA_OV2640_EMMA=y +# CONFIG_MXC_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640 is not set +# CONFIG_MXC_CAMERA_OV3640 is not set +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_EMMA_OUTPUT=y +CONFIG_VIDEO_MXC_OUTPUT_FBSYNC=y +CONFIG_VIDEO_MXC_OPL=y +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CH7026 is not set +CONFIG_FB_MXC_TVOUT=y +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_LCDC=y +CONFIG_BACKLIGHT_MXC_PMIC=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +# CONFIG_SND_MXC_SPDIF is not set +CONFIG_SND_MXC_PMIC=y +# CONFIG_HEADSET_DETECT_ENABLE is not set +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# Special HID drivers +# +CONFIG_HID_COMPAT=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BRIGHT=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DELL=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GYRATION=m +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_THRUSTMASTER_FF is not set +# CONFIG_ZEROPLUS_FF is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H1=y +# CONFIG_USB_EHCI_ARC_H2 is not set +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_EHCI_ARC_OTG_WAKE_UP is not set +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +CONFIG_USB_EHCI_FSL_1301=y +# CONFIG_USB_EHCI_FSL_1504 is not set +# CONFIG_USB_EHCI_FSL_UTMI is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# + +# +# see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_WAKE_UP is not set +# CONFIG_USB_GADGET_FSL_MC13783 is not set +CONFIG_USB_GADGET_FSL_1301=y +# CONFIG_USB_GADGET_FSL_1504 is not set +# CONFIG_USB_GADGET_FSL_UTMI is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_MXC=y +# CONFIG_MMC_IMX_ESDHCI is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_MXC=y +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_DMADEVICES is not set +# CONFIG_REGULATOR is not set +# CONFIG_UIO is not set + +# +# MXC support drivers +# + +# +# MXC SSI support +# +CONFIG_MXC_SSI=y + +# +# MXC Digital Audio Multiplexer support +# +CONFIG_MXC_DAM=y + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +CONFIG_MXC_PMIC_MC13783=y +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_SPI is not set +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +CONFIG_MXC_PMIC_CHARDEV=y + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13783_ADC=y +CONFIG_MXC_MC13783_AUDIO=y +CONFIG_MXC_MC13783_RTC=y +CONFIG_MXC_MC13783_LIGHT=y +CONFIG_MXC_MC13783_BATTERY=y +CONFIG_MXC_MC13783_CONNECTIVITY=y +CONFIG_MXC_MC13783_POWER=y +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +CONFIG_MXC_SECURITY_SCC=y +# CONFIG_SCC_DEBUG is not set + +# +# SAHARA2 Security Hardware Support +# +CONFIG_MXC_SAHARA=y +CONFIG_MXC_SAHARA_USER_MODE=y +# CONFIG_MXC_SAHARA_POLL_MODE is not set + +# +# MXC MPEG4 Encoder Kernel module support +# + +# +# MXC HARDWARE EVENT +# +CONFIG_MXC_HWEVENT=y + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_REGISTER_V4 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_FRAME_POINTER=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx31ads_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx31ads_defconfig @@ -0,0 +1,1707 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26 +# Tue Sep 16 10:19:21 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_OPROFILE_ARMV6=y +CONFIG_OPROFILE_ARM11_CORE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX51 is not set +CONFIG_ARCH_MX3=y +# CONFIG_ARCH_MX27 is not set +# CONFIG_ARCH_MX21 is not set +CONFIG_ARCH_MXC_HAS_NFC_V1=y +CONFIG_I2C_MXC_SELECT1=y +# CONFIG_I2C_MXC_SELECT2 is not set + +# +# MX3 Options +# +CONFIG_MX3_OPTIONS=y +CONFIG_MACH_MX31ADS=y +# CONFIG_MACH_MX31_3DS is not set +# CONFIG_MX3_DOZE_DURING_IDLE is not set +CONFIG_MXC_SDMA_API=y + +# +# SDMA options +# +# CONFIG_SDMA_IRAM is not set +CONFIG_ARCH_MXC_HAS_NFC_V2=y + +# +# Device options +# +# CONFIG_I2C_MXC_SELECT3 is not set +CONFIG_ARCH_HAS_EVTMON=y +CONFIG_DMA_ZONE_SIZE=24 +CONFIG_ISP1504_MXC=y + +# +# Processor Type +# +CONFIG_CPU_32=y +# CONFIG_CPU_ARM926T is not set +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +# CONFIG_CPU_V7 is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +# CONFIG_PCMCIA_IOCTL is not set + +# +# PC-card bridges +# +CONFIG_PCMCIA_MX31ADS=m + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0 root=/dev/mtdblock2 rw ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_MCS_FIR is not set +CONFIG_MXC_FIR=m +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +# CONFIG_IEEE80211_CRYPT_WEP is not set +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set +CONFIG_MTD_MXC=y + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_NAND_MXC_V2=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set + +# +# Voltage and Current regulators +# +CONFIG_REGULATOR_API=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_MC13783=y +# CONFIG_REGULATOR_WM8350 is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PCMCIA is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_CS89x0=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +CONFIG_PCMCIA_PCNET=m +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_MXC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_CS is not set +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +# CONFIG_SPI_MXC_SELECT1 is not set +CONFIG_SPI_MXC_SELECT2=y +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_W1=y +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +CONFIG_W1_MASTER_MXC=y +# CONFIG_W1_MASTER_DS1WM is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2751 is not set +CONFIG_W1_SLAVE_DS2433=y +# CONFIG_W1_SLAVE_DS2433_CRC is not set +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=y + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_MXC_CAMERA_MC521DA is not set +CONFIG_MXC_CAMERA_MICRON111=y +# CONFIG_MXC_CAMERA_OV2640 is not set +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_MXC_IPU_PRP_VF_SDC=y +CONFIG_MXC_IPU_PRP_ENC=y +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_W9968CF is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +CONFIG_FB_MXC_TVOUT=y +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_IPU=y +CONFIG_BACKLIGHT_MXC_PMIC=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_MXC_SPDIF is not set +CONFIG_SND_MXC_PMIC=y +# CONFIG_SND_MXC_PLAYBACK_MIXING is not set +# CONFIG_HEADSET_DETECT_ENABLE is not set + +# +# SPI devices +# + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set +# CONFIG_SND_MXC_SOC is not set +# CONFIG_SND_MXC_SOC_IRAM is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8350 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8580 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8903 is not set + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H1=y +CONFIG_USB_EHCI_ARC_H2=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +CONFIG_USB_EHCI_FSL_1504=y +# CONFIG_USB_EHCI_FSL_UTMI is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# Belcarra USBLAN Networking for USB +# +# CONFIG_USB_USBLAN is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +CONFIG_USB_GADGET_FSL_1504=y +# CONFIG_USB_GADGET_FSL_UTMI is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SPI is not set +CONFIG_MMC_MXC=y +# CONFIG_MMC_IMX_ESDHCI is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_MXC=y +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_UIO is not set + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V1=y +CONFIG_MXC_IPU_PF=y + +# +# MXC SSI support +# +CONFIG_MXC_SSI=y + +# +# MXC Digital Audio Multiplexer support +# +CONFIG_MXC_DAM=y + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +CONFIG_MXC_PMIC_MC13783=y +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +CONFIG_MXC_PMIC_CHARDEV=y + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13783_ADC=y +CONFIG_MXC_MC13783_AUDIO=y +CONFIG_MXC_MC13783_RTC=y +CONFIG_MXC_MC13783_LIGHT=y +CONFIG_MXC_MC13783_BATTERY=y +CONFIG_MXC_MC13783_CONNECTIVITY=y +CONFIG_MXC_MC13783_POWER=y + +# +# Advanced Power Management devices +# + +# +# MXC Security Drivers +# +CONFIG_MXC_SECURITY_SCC=y +# CONFIG_SCC_DEBUG is not set +CONFIG_MXC_SECURITY_RNG=y +# CONFIG_MXC_RNG_TEST_DRIVER is not set +# CONFIG_MXC_RNG_DEBUG is not set +CONFIG_MXC_SECURITY_CORE=y + +# +# MXC MPEG4 Encoder Kernel module support +# +CONFIG_MXC_HMP4E=y +# CONFIG_MXC_HMP4E_DEBUG is not set + +# +# MXC HARDWARE EVENT +# +CONFIG_MXC_HWEVENT=y + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx35_3stack_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx35_3stack_defconfig @@ -0,0 +1,1986 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Sat Dec 5 22:30:18 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_OPROFILE_ARMV6=y +CONFIG_OPROFILE_ARM11_CORE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_DMA_ZONE_SIZE=24 +CONFIG_UTMI_MXC=y + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX25 is not set +CONFIG_ARCH_MX35=y +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MX51 is not set +CONFIG_MXC_SDMA_API=y +CONFIG_SDMA_IRAM=y +CONFIG_SDMA_IRAM_SIZE=0x1000 +CONFIG_ARCH_MXC_HAS_NFC_V2=y +CONFIG_I2C_MXC_SELECT1=y +# CONFIG_I2C_MXC_SELECT2 is not set +# CONFIG_I2C_MXC_SELECT3 is not set +CONFIG_ARCH_MXC_HAS_NFC_V2_1=y + +# +# MX35 Options +# +CONFIG_FORCE_MAX_ZONEORDER=13 +CONFIG_MX35_OPTIONS=y +CONFIG_MACH_MX35_3DS=y +# CONFIG_MACH_MX35EVB is not set +# CONFIG_MX35_DOZE_DURING_IDLE is not set + +# +# SDMA options +# + +# +# Device options +# +CONFIG_MXC_PSEUDO_IRQS=y +CONFIG_ARCH_HAS_EVTMON=y +# CONFIG_MXC_IRQ_PRIOR is not set +# CONFIG_MXC_PWM is not set +CONFIG_ARCH_HAS_RNGC=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y +CONFIG_ARM_ERRATA_411920=y +CONFIG_ARM_ERRATA_364296=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock8 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y + +# +# CAN Device Drivers +# +CONFIG_CAN_VCAN=y +# CONFIG_CAN_DEV is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_CAN_FLEXCAN=m +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set +CONFIG_MTD_MXC=y + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MXC_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC_V2=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_FEC is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_AX8817X is not set +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_MXC is not set +CONFIG_KEYBOARD_MC9S08DZ60=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +CONFIG_TOUCHSCREEN_TSC2007=y +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_FM_SI4702=m +CONFIG_MXC_IIM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_IMX is not set +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +# CONFIG_SPI_MXC_SELECT2 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=m + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +CONFIG_MXC_CAMERA_OV2640=m +# CONFIG_MXC_CAMERA_OV3640 is not set +CONFIG_MXC_TVIN_ADV7180=m +CONFIG_MXC_IPU_PRP_VF_SDC=m +CONFIG_MXC_IPU_PRP_ENC=m +CONFIG_MXC_IPU_CSI_ENC=m +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL=y +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_IPU=y +CONFIG_BACKLIGHT_MXC_MC13892=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_MXC_SPDIF=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_SSI=y +CONFIG_SND_MXC_SOC_ESAI=y +CONFIG_SND_MXC_SOC_IRAM=y +CONFIG_SND_SOC_IMX_3STACK_SGTL5000=y +CONFIG_SND_SOC_IMX_3STACK_AK4647=y +CONFIG_SND_SOC_IMX_3STACK_WM8580=y +# CONFIG_SND_SOC_IMX_3STACK_AK5702 is not set +CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM8580=y +CONFIG_SND_SOC_SGTL5000=y +CONFIG_SND_SOC_AK4647=y +CONFIG_SND_SOC_BLUETOOTH=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +# CONFIG_HID_NTRIG is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H2=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +# CONFIG_USB_EHCI_FSL_1504 is not set +CONFIG_USB_EHCI_FSL_UTMI=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set +CONFIG_SDIO_UNIFI_FS=m + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_MXC is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_IMX_ESDHCI=m +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_MXC=y +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_RTC_DRV_IMXDI is not set +CONFIG_RTC_MC13892=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_MC9S08DZ60=y +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V1=y +CONFIG_MXC_IPU_PF=y + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +# CONFIG_MXC_PMIC_MC13783 is not set +CONFIG_MXC_PMIC_MC13892=y +CONFIG_MXC_PMIC_I2C=y +# CONFIG_MXC_PMIC_SPI is not set +# CONFIG_MXC_PMIC_MC34704 is not set +CONFIG_MXC_PMIC_MC9SDZ60=y +# CONFIG_MXC_PMIC_CHARDEV is not set + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13892_ADC=y +CONFIG_MXC_MC13892_RTC=y +CONFIG_MXC_MC13892_LIGHT=y +# CONFIG_MXC_MC13892_BATTERY is not set +# CONFIG_MXC_MC13892_CONNECTIVITY is not set +CONFIG_MXC_MC13892_POWER=y +CONFIG_MXC_PMIC_MC9S08DZ60=y +# CONFIG_MXC_MC9SDZ60_RTC is not set + +# +# MXC Security Drivers +# +CONFIG_MXC_SECURITY_SCC=y +# CONFIG_SCC_DEBUG is not set +CONFIG_MXC_SECURITY_RNG=y +CONFIG_MXC_RNG_TEST_DRIVER=y +# CONFIG_MXC_RNG_DEBUG is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# + +# +# MXC Asynchronous Sample Rate Converter support +# +CONFIG_MXC_ASRC=y + +# +# MXC Bluetooth support +# +CONFIG_MXC_BLUETOOTH=m + +# +# Broadcom GPS ioctrl support +# +CONFIG_GPS_IOCTRL=m + +# +# MXC Media Local Bus Driver +# +CONFIG_MXC_MLB=m + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx233_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx233_defconfig @@ -0,0 +1,1789 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Tue Nov 17 16:37:19 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_STMP3XXX=y +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Freescale STMP3xxx implementations +# +# CONFIG_ARCH_STMP37XX is not set +CONFIG_ARCH_STMP378X=y +# CONFIG_MACH_STMP37XX is not set +CONFIG_MACH_STMP378X=y +CONFIG_FB_STMP37XX_LMS350=y +CONFIG_FB_STMP37XX_LMS430=y +CONFIG_FB_STMP378X_TVENC=y +CONFIG_STMP3XXX_UNIQUE_ID=y +CONFIG_STMP3XXX_UNIQUE_ID_OTP=y +CONFIG_STMP378X_RAM_FREQ_SCALING=y +# CONFIG_STMP378X_RAM_MDDR is not set +CONFIG_STMP378X_RAM_DDR=y +CONFIG_DMA_ZONE_SIZE=12 +CONFIG_UTMI_MXC=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0,115200 root=/dev/mmcblk0p2 rootwait lcd_panel=lms350" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_MULTIQ is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_DRR is not set + +# +# Classification +# +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +# CONFIG_MTD_NAND_GPMI_LBA is not set +CONFIG_MTD_NAND_GPMI=y +CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES=y +CONFIG_MTD_NAND_GPMI_BCH=y +CONFIG_MTD_NAND_GPMI_TA1=y +CONFIG_MTD_NAND_GPMI_TA3=y +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=128 +CONFIG_MTD_UBI_BEB_RESERVE=2 +CONFIG_MTD_UBI_GLUEBI=y + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=y +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +CONFIG_ENC28J60=y +# CONFIG_ENC28J60_WRITEVERIFY is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_STMP3XXX=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_STMP3XXX=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_STMP3XXX_ROTDEC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_MXS_VIIM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_STMP_DBG=y +CONFIG_SERIAL_STMP_DBG_CONSOLE=y +CONFIG_SERIAL_STMP_APP=y +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_STMP378X=m +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_STMP3XXX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_BATTERY_STMP3XXX=y +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_STMP3XXX_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +# CONFIG_VIDEO_ALLOW_V4L1 is not set +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEOBUF_GEN=y +CONFIG_VIDEOBUF_DMA_CONTIG=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_PXP=y +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_ZC0301 is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_RADIO_STFM1000 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_STMP37XX=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_STMP37XX=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_STMP3XXX_SOC=y +CONFIG_SND_STMP3XXX_SOC_DAI=y +CONFIG_SND_STMP3XXX_SOC_SPDIF_DAI=y +CONFIG_SND_STMP3XXX_SOC_STMP3780_DEVB=y +CONFIG_SND_STMP3XXX_SOC_STMP3780_DEVB_SPDIF=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_STMP378X_CODEC=y +CONFIG_SND_SOC_STMP3XXX_SPDIF=y +# CONFIG_SOUND_PRIME is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +# CONFIG_USB_EHCI_FSL_1504 is not set +CONFIG_USB_EHCI_FSL_UTMI=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_STMP_UTP is not set +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +CONFIG_MMC_STMP3XXX=y +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +# CONFIG_LEDS_CLASS is not set + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_STMP3XXX=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +CONFIG_REGULATOR_STMP3XXX=y +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_XATTR is not set +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_SECURITY_ROOTPLUG is not set +# CONFIG_SECURITY_TOMOYO is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_CRYPTODEV=y + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_STMP3XXX_DCP=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx37_3stack_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx37_3stack_defconfig @@ -0,0 +1,1997 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Thu Oct 29 15:36:51 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_DMA_ZONE_SIZE=32 +CONFIG_UTMI_MXC=y + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX35 is not set +CONFIG_ARCH_MX37=y +# CONFIG_ARCH_MX51 is not set +CONFIG_MXC_SDMA_API=y +CONFIG_SDMA_IRAM=y +CONFIG_SDMA_IRAM_SIZE=0x1000 +CONFIG_I2C_MXC_SELECT1=y +CONFIG_I2C_MXC_SELECT2=y +# CONFIG_I2C_MXC_SELECT3 is not set + +# +# MX37 Options +# +CONFIG_MX37_OPTIONS=y +CONFIG_MACH_MX37_3DS=y + +# +# SDMA options +# +CONFIG_ARCH_MXC_HAS_NFC_V3=y +CONFIG_ARCH_MXC_HAS_NFC_V3_1=y + +# +# Device options +# +CONFIG_MXC_TZIC=y +CONFIG_ARCH_HAS_EVTMON=y +# CONFIG_MXC_IRQ_PRIOR is not set +# CONFIG_MXC_PWM is not set +CONFIG_ARCH_HAS_RNGC=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y +CONFIG_ARM_ERRATA_411920=y +# CONFIG_ARM_ERRATA_364296 is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_MXC is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC_V3=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_AX8817X is not set +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +CONFIG_KEYBOARD_MPR084=y +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_MXC is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +CONFIG_TOUCHSCREEN_TSC2007=y +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_FM_SI4702 is not set +CONFIG_MXC_IIM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_FSL_RNGC is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_IMX is not set +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +# CONFIG_SPI_MXC_SELECT1 is not set +CONFIG_SPI_MXC_SELECT2=y +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_SENSORS_ISL29003=y +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_WM8350_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +CONFIG_MFD_WM8350=y +CONFIG_MFD_WM8350_CONFIG_MODE_0=y +CONFIG_MFD_WM8350_I2C=y +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_MXC_CAMERA is not set +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL=y +CONFIG_FB_MXC_TVOUT_TVE=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_WM8350=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_MXC_SPDIF=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_SSI=y +# CONFIG_SND_MXC_SOC_IRAM is not set +CONFIG_SND_SOC_IMX_3STACK_WM8350=y +# CONFIG_SND_SOC_IMX_3STACK_SGTL5000 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8580 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK5702 is not set +# CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM8350=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +# CONFIG_HID_NTRIG is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +# CONFIG_USB_EHCI_FSL_1504 is not set +CONFIG_USB_EHCI_FSL_UTMI=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +# CONFIG_USB_STATIC_IRAM_PPH is not set +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set +CONFIG_SDIO_UNIFI_FS=m + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_MXC is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_IMX_ESDHCI=m +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_WM8350 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_MXC is not set +CONFIG_RTC_DRV_MXC_V2=y +# CONFIG_RTC_DRV_IMXDI is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_WM8350=y +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3=y +CONFIG_MXC_IPU_V3D=y + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +# CONFIG_MXC_PMIC_MC13783 is not set +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_SCC2 is not set +# CONFIG_MXC_SECURITY_RNG is not set + +# +# SAHARA2 Security Hardware Support +# +# CONFIG_MXC_SAHARA is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +CONFIG_MXC_VPU_IRAM=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# +CONFIG_MXC_BLUETOOTH=m + +# +# Broadcom GPS ioctrl support +# +CONFIG_GPS_IOCTRL=m + +# +# MXC Media Local Bus Driver +# + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx31_3stack_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx31_3stack_defconfig @@ -0,0 +1,2020 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Thu Oct 29 16:30:12 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_OPROFILE_ARMV6=y +CONFIG_OPROFILE_ARM11_CORE=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_DMA_ZONE_SIZE=24 + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +CONFIG_ARCH_MX3=y +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MX51 is not set +CONFIG_ARCH_MX31=y +CONFIG_MX3_OPTIONS=y + +# +# MX3 platforms: +# +# CONFIG_MACH_MX31ADS is not set +# CONFIG_MACH_PCM037 is not set +# CONFIG_MACH_MX31LITE is not set +CONFIG_MACH_MX31_3DS=y +# CONFIG_MACH_MX31MOBOARD is not set +# CONFIG_MACH_MX31LILLY is not set +# CONFIG_MACH_QONG is not set +# CONFIG_MACH_PCM043 is not set +# CONFIG_MACH_ARMADILLO5X0 is not set +CONFIG_MXC_SDMA_API=y + +# +# SDMA options +# +# CONFIG_SDMA_IRAM is not set +CONFIG_ARCH_MXC_HAS_NFC_V1=y +CONFIG_ARCH_MXC_HAS_NFC_V2=y + +# +# Device options +# +CONFIG_I2C_MXC_SELECT1=y +# CONFIG_I2C_MXC_SELECT2 is not set +# CONFIG_I2C_MXC_SELECT3 is not set +CONFIG_ARCH_HAS_EVTMON=y +CONFIG_ISP1504_MXC=y +# CONFIG_MXC_IRQ_PRIOR is not set +# CONFIG_MXC_PWM is not set +CONFIG_ARCH_HAS_RNGA=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y +CONFIG_ARM_ERRATA_411920=y +CONFIG_ARM_ERRATA_364296=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_MXC is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC=y +CONFIG_MTD_NAND_MXC_V2=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MTD_NAND_MXC_ECC_CORRECTION_OPTION2 is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +CONFIG_USB_USBNET=m +# CONFIG_USB_NET_AX8817X is not set +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_MXC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_FM_SI4702=m +CONFIG_MXC_IIM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_MXC_RNGA is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_IMX is not set +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +CONFIG_SPI_MXC_SELECT2=y +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_MXC_MMA7450=m +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=m + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +CONFIG_MXC_CAMERA_OV2640=m +# CONFIG_MXC_CAMERA_OV3640 is not set +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_MXC_IPU_PRP_VF_SDC=m +CONFIG_MXC_IPU_PRP_ENC=m +CONFIG_MXC_IPU_CSI_ENC=m +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VIDEO_CLASS is not set +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CH7026 is not set +CONFIG_FB_MXC_TVOUT_CH7024=y +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_IPU=y +CONFIG_BACKLIGHT_MXC_PMIC=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +# CONFIG_SND_MXC_SPDIF is not set +CONFIG_SND_MXC_PMIC=y +# CONFIG_SND_MXC_PLAYBACK_MIXING is not set +# CONFIG_HEADSET_DETECT_ENABLE is not set +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +# CONFIG_HID_NTRIG is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +# CONFIG_USB_EHCI_ARC_H1 is not set +CONFIG_USB_EHCI_ARC_H2=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +CONFIG_USB_EHCI_FSL_1504=y +# CONFIG_USB_EHCI_FSL_UTMI is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +# CONFIG_USB_STATIC_IRAM_PPH is not set +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +CONFIG_USB_GADGET_FSL_1504=y +# CONFIG_USB_GADGET_FSL_UTMI is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set +CONFIG_SDIO_UNIFI_FS=m + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +CONFIG_MMC_MXC=m +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_IMX_ESDHCI is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_MXC=y +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_RTC_DRV_IMXDI is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +CONFIG_REGULATOR_MC13783=y +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V1=y +CONFIG_MXC_IPU_PF=y + +# +# MXC SSI support +# +CONFIG_MXC_SSI=y + +# +# MXC Digital Audio Multiplexer support +# +CONFIG_MXC_DAM=y + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +CONFIG_MXC_PMIC_MC13783=y +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_SPI is not set +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +CONFIG_MXC_PMIC_CHARDEV=y + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13783_ADC=y +CONFIG_MXC_MC13783_AUDIO=y +CONFIG_MXC_MC13783_RTC=y +CONFIG_MXC_MC13783_LIGHT=y +CONFIG_MXC_MC13783_BATTERY=y +CONFIG_MXC_MC13783_CONNECTIVITY=y +CONFIG_MXC_MC13783_POWER=y +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +CONFIG_MXC_SECURITY_SCC=y +# CONFIG_SCC_DEBUG is not set +CONFIG_MXC_SECURITY_RNG=y +# CONFIG_MXC_RNG_TEST_DRIVER is not set +# CONFIG_MXC_RNG_DEBUG is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +CONFIG_MXC_HMP4E=y +# CONFIG_MXC_HMP4E_DEBUG is not set + +# +# MXC HARDWARE EVENT +# +CONFIG_MXC_HWEVENT=y + +# +# MXC VPU(Video Processing Unit) support +# +# CONFIG_MXC_VPU is not set + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# +CONFIG_MXC_BLUETOOTH=m + +# +# Broadcom GPS ioctrl support +# +CONFIG_GPS_IOCTRL=m + +# +# MXC Media Local Bus Driver +# + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx51_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx51_defconfig @@ -0,0 +1,2102 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Sat Dec 5 00:11:48 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_DMA_ZONE_SIZE=64 +CONFIG_UTMI_MXC=y + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX37 is not set +CONFIG_ARCH_MX51=y +CONFIG_MXC_SDMA_API=y +CONFIG_SDMA_IRAM=y +CONFIG_SDMA_IRAM_SIZE=0x1000 +CONFIG_I2C_MXC_SELECT1=y +CONFIG_I2C_MXC_SELECT2=y +# CONFIG_I2C_MXC_SELECT3 is not set +CONFIG_FORCE_MAX_ZONEORDER=13 +CONFIG_ARCH_MXC_HAS_NFC_V3=y + +# +# MX51 Options +# +CONFIG_MX51_OPTIONS=y +CONFIG_MACH_MX51_3DS=y +CONFIG_MACH_MX51_BABBAGE=y +CONFIG_ARCH_MXC_HAS_NFC_V3_2=y + +# +# SDMA options +# + +# +# Device options +# +CONFIG_MXC_TZIC=y +# CONFIG_MXC_IRQ_PRIOR is not set +# CONFIG_MXC_PWM is not set +CONFIG_MXC_DVFS_PER=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=y +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_MXC is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_MXC_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC_V3=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_FSL=m +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +CONFIG_FEC=y +# CONFIG_FEC2 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_HSO is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_MXC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_MXC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_FM_SI4702=m +CONFIG_MXC_IIM=y +CONFIG_IMX_SIM=m + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_IMX is not set +CONFIG_I2C_MXC=y +CONFIG_I2C_MXC_HS=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +# CONFIG_SPI_MXC_SELECT2 is not set +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS2482 is not set +CONFIG_W1_MASTER_MXC=m +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2431 is not set +# CONFIG_W1_SLAVE_DS2751 is not set +# CONFIG_W1_SLAVE_DS2433 is not set +CONFIG_W1_SLAVE_DS2438=m +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_W1_SLAVE_BQ27000 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +CONFIG_APM_POWER=y +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_SENSORS_ISL29003=y +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +CONFIG_MEDIA_TUNER_CUSTOMISE=y +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=m + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640 is not set +CONFIG_MXC_CAMERA_OV3640=m +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_MXC_IPU_PRP_VF_SDC=m +CONFIG_MXC_IPU_PRP_ENC=m +CONFIG_MXC_IPU_CSI_ENC=m +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_VIDEO_OVCAMCHIP is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set +# CONFIG_RADIO_TEA5764 is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL=y +CONFIG_FB_MXC_TVOUT_TVE=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +CONFIG_FB_MXC_CH7026=y +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_MC13892=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_MXC_SPDIF=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_SSI=y +CONFIG_SND_MXC_SOC_IRAM=y +CONFIG_SND_SOC_IMX_3STACK_SGTL5000=y +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8580 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK5702 is not set +# CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_SGTL5000=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DRAGONRISE is not set +CONFIG_HID_EZKEY=m +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=m +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=m +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +# CONFIG_HID_NTRIG is not set +CONFIG_HID_PANTHERLORD=m +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H1=y +# CONFIG_USB_EHCI_ARC_H2 is not set +# CONFIG_USB_EHCI_ARC_OTG is not set +# CONFIG_USB_STATIC_IRAM is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=y +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set +CONFIG_SDIO_UNIFI_FS=m + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_MXC is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_IMX_ESDHCI=y +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_MC13892=y +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_BD2802 is not set + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGERS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +# CONFIG_RTC_DRV_IMXDI is not set +CONFIG_RTC_MC13892=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +CONFIG_REGULATOR_MC13892=y +CONFIG_UIO=y +# CONFIG_UIO_PDRV is not set +CONFIG_UIO_PDRV_GENIRQ=m +# CONFIG_UIO_SMX is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_STAGING is not set + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3=y + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +# CONFIG_MXC_PMIC_MC13783 is not set +CONFIG_MXC_PMIC_MC13892=y +CONFIG_MXC_PMIC_I2C=y +CONFIG_MXC_PMIC_SPI=y +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +# CONFIG_MXC_PMIC_CHARDEV is not set + +# +# MXC PMIC Client Drivers +# +CONFIG_MXC_MC13892_ADC=y +CONFIG_MXC_MC13892_RTC=y +CONFIG_MXC_MC13892_LIGHT=y +CONFIG_MXC_MC13892_BATTERY=y +CONFIG_MXC_MC13892_CONNECTIVITY=y +CONFIG_MXC_MC13892_POWER=y +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +CONFIG_MXC_SECURITY_SCC2=y +CONFIG_SCC_DEBUG=y +# CONFIG_MXC_SECURITY_RNG is not set + +# +# SAHARA2 Security Hardware Support +# +# CONFIG_MXC_SAHARA is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +CONFIG_MXC_VPU_IRAM=y +# CONFIG_MXC_VPU_DEBUG is not set + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# +CONFIG_MXC_BLUETOOTH=m + +# +# Broadcom GPS ioctrl support +# +CONFIG_GPS_IOCTRL=m + +# +# MXC Media Local Bus Driver +# + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +CONFIG_JBD=y +CONFIG_JBD2=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx233_updater_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx233_updater_defconfig @@ -0,0 +1,1103 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Mon Nov 30 12:33:29 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-updater" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set + +# +# RCU Subsystem +# +# CONFIG_CLASSIC_RCU is not set +CONFIG_TREE_RCU=y +# CONFIG_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_RELAY=y +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +# CONFIG_MODULE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_FREEZER is not set + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +CONFIG_ARCH_STMP3XXX=y +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Freescale STMP3xxx implementations +# +# CONFIG_ARCH_STMP37XX is not set +CONFIG_ARCH_STMP378X=y +# CONFIG_MACH_STMP37XX is not set +CONFIG_MACH_STMP378X=y +# CONFIG_FB_STMP37XX_LMS350 is not set +CONFIG_FB_STMP37XX_LMS430=y +# CONFIG_FB_STMP378X_TVENC is not set +# CONFIG_STMP3XXX_UNIQUE_ID is not set +# CONFIG_STMP378X_RAM_FREQ_SCALING is not set +CONFIG_DMA_ZONE_SIZE=12 +CONFIG_UTMI_MXC=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAM0,115200 rdinit=/linuxrc" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +# CONFIG_SUSPEND is not set +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_STANDALONE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +# CONFIG_MTD_NAND_GPMI_LBA is not set +CONFIG_MTD_NAND_GPMI=y +CONFIG_MTD_NAND_GPMI_SYSFS_ENTRIES=y +CONFIG_MTD_NAND_GPMI_BCH=y +CONFIG_MTD_NAND_GPMI_TA1=y +CONFIG_MTD_NAND_GPMI_TA3=y +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=128 +CONFIG_MTD_UBI_BEB_RESERVE=2 +CONFIG_MTD_UBI_GLUEBI=y + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MXS_VIIM is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_STMP_DBG=y +CONFIG_SERIAL_STMP_DBG_CONSOLE=y +# CONFIG_SERIAL_STMP_APP is not set +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_STMP3XXX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_STMP37XX=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_STMP37XX=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_ARC=y +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=y +CONFIG_STMP_UTP=y +# CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +CONFIG_MMC_STMP3XXX=y +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +CONFIG_REGULATOR_STMP3XXX=y +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +# CONFIG_UBIFS_FS_ZLIB is not set +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_STMP3XXX_DCP is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx35evb_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx35evb_defconfig @@ -0,0 +1,976 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MXC91321 is not set +# CONFIG_ARCH_MX37 is not set +CONFIG_ARCH_MX35=y +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX27 is not set +# CONFIG_ARCH_MX21 is not set +CONFIG_MXC_SDMA_API=y + +# +# MX35 Options +# +# CONFIG_MACH_MX35_3DS is not set +CONFIG_MACH_MX35EVB=y +# CONFIG_MX35_DOZE_DURING_IDLE is not set + +# +# Device options +# +CONFIG_ARCH_HAS_EVTMON=y +CONFIG_DMA_ZONE_SIZE=24 + +# +# Processor Type +# +CONFIG_CPU_32=y +# CONFIG_CPU_ARM926T is not set +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_L2X0=y + +# +# Bus support +# +CONFIG_ISA=y +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +# CONFIG_PCMCIA_IOCTL is not set + +# +# PC-card bridges +# +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PROBE=y + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_SUSPEND_UP_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +# CONFIG_IEEE80211_CRYPT_WEP is not set +# CONFIG_IEEE80211_CRYPT_CCMP is not set +# CONFIG_IEEE80211_CRYPT_TKIP is not set +# CONFIG_IEEE80211_SOFTMAC is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_PARPORT is not set +# CONFIG_PNP is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_PSI240I is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +# CONFIG_AC3200 is not set +# CONFIG_APRICOT is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_FEC is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +CONFIG_PCMCIA_PCNET=m +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_MXC_MU is not set +# CONFIG_MXC_SUPER_GEM is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +# CONFIG_SPI_MXC_SELECT2 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MXC_WATCHDOG=y + +# +# ISA-based Watchdog Cards +# +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +# CONFIG_HID is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# On-The-Go and USB Peripheral Support +# +# CONFIG_OTG is not set + +# +# +# + +# +# +# +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_MXC=y +# CONFIG_RTC_DRV_MXC_V2 is not set + +# +# MXC support drivers +# +# CONFIG_MXC_IPU is not set + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +# CONFIG_MXC_PMIC is not set + +# +# Advanced Power Management devices +# + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_RNG is not set +# CONFIG_MXC_SECURITY_RTIC is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +CONFIG_MXC_HWEVENT=y + +# +# MXC VPU(Video Processing Unit) support +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set +CONFIG_INSTRUMENTATION=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_OPROFILE_ARMV6=y +CONFIG_OPROFILE_ARM11_CORE=y +CONFIG_OPROFILE_ARM11_EVTMON=y +# CONFIG_MARKERS is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/configs/imx25_3stack_defconfig +++ linux-fsl-imx51-2.6.31/arch/arm/configs/imx25_3stack_defconfig @@ -0,0 +1,1933 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Mon Nov 2 15:32:48 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_DMA_ZONE_SIZE=24 +CONFIG_UTMI_MXC=y +CONFIG_UTMI_MXC_OTG=m + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX3 is not set +CONFIG_ARCH_MX25=y +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX37 is not set +# CONFIG_ARCH_MX51 is not set +CONFIG_MXC_SDMA_API=y +CONFIG_SDMA_IRAM=y +CONFIG_SDMA_IRAM_SIZE=0x1000 +CONFIG_ARCH_MXC_HAS_NFC_V2=y +CONFIG_I2C_MXC_SELECT1=y +# CONFIG_I2C_MXC_SELECT2 is not set +# CONFIG_I2C_MXC_SELECT3 is not set + +# +# MX25 Options +# +CONFIG_MX25_OPTIONS=y +CONFIG_MACH_MX25_3DS=y +# CONFIG_MX25_DOZE_DURING_IDLE is not set + +# +# SDMA options +# +CONFIG_ARCH_MXC_HAS_NFC_V2_1=y + +# +# Device options +# +# CONFIG_FLEXCAN_MXC_SELECT1 is not set +# CONFIG_MXC_IRQ_PRIOR is not set +# CONFIG_MXC_PWM is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +# CONFIG_CAN_BCM is not set + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_DEV is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_CAN_FLEXCAN=y +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +# CONFIG_MCS_FIR is not set +# CONFIG_MXC_FIR is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_MXC is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_IMX_NFC is not set +CONFIG_MTD_NAND_MXC_V2=y +# CONFIG_MTD_NAND_MXC_SWECC is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +CONFIG_SMSC911X=y +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_FEC is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_MXC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +CONFIG_TOUCHSCREEN_IMX_ADC=y +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_MXC_IIM=y +CONFIG_IMX_SIM=m + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_IMX is not set +CONFIG_I2C_MXC=y +# CONFIG_I2C_MXC_HS is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_SLAVE is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MXC=y +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_MXC_SELECT1=y +# CONFIG_SPI_MXC_SELECT2 is not set +# CONFIG_SPI_MXC_SELECT3 is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_MXC_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TDA9875 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_ADV7343 is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=m + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_CSI_CAMERA=m +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +CONFIG_MXC_CAMERA_OV2640=m +# CONFIG_MXC_CAMERA_OV3640 is not set +# CONFIG_MXC_TVIN_ADV7180 is not set +# CONFIG_VIDEO_MXC_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_V4L_USB_DRIVERS is not set +# CONFIG_RADIO_ADAPTERS is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_MXC=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_LCDC=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +# CONFIG_SND_MXC_SPDIF is not set +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_SSI=y +CONFIG_SND_MXC_SOC_ESAI=m +CONFIG_SND_MXC_SOC_IRAM=y +CONFIG_SND_SOC_IMX_3STACK_SGTL5000=y +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +CONFIG_SND_SOC_IMX_3STACK_WM8580=m +CONFIG_SND_SOC_IMX_3STACK_AK5702=m +# CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_AK5702=m +CONFIG_SND_SOC_WM8580=m +CONFIG_SND_SOC_SGTL5000=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_KYE is not set +CONFIG_HID_GYRATION=y +# CONFIG_HID_KENSINGTON is not set +CONFIG_HID_LOGITECH=y +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_NTRIG is not set +CONFIG_HID_PANTHERLORD=y +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H2=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_STATIC_IRAM is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +# CONFIG_USB_EHCI_FSL_1301 is not set +# CONFIG_USB_EHCI_FSL_1504 is not set +CONFIG_USB_EHCI_FSL_UTMI=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_STATIC_IRAM_PPH=y +CONFIG_USB_ARC=m +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_MXC is not set +# CONFIG_MMC_SPI is not set +CONFIG_MMC_IMX_ESDHCI=y +# CONFIG_MMC_IMX_ESDHCI_SELECT2 is not set +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +CONFIG_RTC_DRV_IMXDI=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +CONFIG_REGULATOR_MC34704=y +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# MXC support drivers +# + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +CONFIG_MXC_PMIC=y +# CONFIG_MXC_PMIC_MC13783 is not set +# CONFIG_MXC_PMIC_MC13892 is not set +CONFIG_MXC_PMIC_MC34704=y +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +CONFIG_MXC_PMIC_CHARDEV=y + +# +# MXC PMIC Client Drivers +# +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_RNG is not set +# CONFIG_MXC_DRYICE is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# + +# +# MXC Asynchronous Sample Rate Converter support +# + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# + +# +# i.MX ADC support +# +CONFIG_IMX_ADC=y + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/devices.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/devices.c @@ -0,0 +1,1085 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "sdma_script_code.h" +#include "crm_regs.h" + +/* Flag used to indicate if dvfs_core is active. */ +int dvfs_core_is_active; + +extern struct dptc_wp dptc_gp_wp_allfreq[DPTC_GP_WP_SUPPORTED]; +extern struct dptc_wp dptc_lp_wp_allfreq[DPTC_LP_WP_SUPPORTED]; + +void mxc_sdma_get_script_info(sdma_script_start_addrs * sdma_script_addr) +{ + sdma_script_addr->mxc_sdma_app_2_mcu_addr = app_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_ap_2_ap_addr = ap_2_ap_ADDR; + sdma_script_addr->mxc_sdma_ap_2_bp_addr = -1; + sdma_script_addr->mxc_sdma_bp_2_ap_addr = -1; + sdma_script_addr->mxc_sdma_loopback_on_dsp_side_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_app_addr = mcu_2_app_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_shp_addr = mcu_2_shp_ADDR; + sdma_script_addr->mxc_sdma_mcu_interrupt_only_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_mcu_addr = shp_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_start_addr = (unsigned short *)sdma_code; + sdma_script_addr->mxc_sdma_uartsh_2_mcu_addr = uartsh_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_uart_2_mcu_addr = uart_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_ram_code_size = RAM_CODE_SIZE; + sdma_script_addr->mxc_sdma_ram_code_start_addr = RAM_CODE_START_ADDR; + sdma_script_addr->mxc_sdma_dptc_dvfs_addr = dptc_dvfs_ADDR; + sdma_script_addr->mxc_sdma_firi_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_firi_2_per_addr = -1; + sdma_script_addr->mxc_sdma_mshc_2_mcu_addr = -1; + sdma_script_addr->mxc_sdma_per_2_app_addr = -1; + sdma_script_addr->mxc_sdma_per_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_per_2_shp_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_ata_addr = mcu_2_ata_ADDR; + sdma_script_addr->mxc_sdma_mcu_2_firi_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_mshc_addr = -1; + sdma_script_addr->mxc_sdma_ata_2_mcu_addr = ata_2_mcu_ADDR; + sdma_script_addr->mxc_sdma_uartsh_2_per_addr = -1; + sdma_script_addr->mxc_sdma_shp_2_per_addr = -1; + sdma_script_addr->mxc_sdma_uart_2_per_addr = -1; + sdma_script_addr->mxc_sdma_app_2_per_addr = -1; + sdma_script_addr->mxc_sdma_mcu_2_spdif_addr = mcu_2_spdif_marley_ADDR; +} + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +#if defined(CONFIG_W1_MASTER_MXC) || defined(CONFIG_W1_MASTER_MXC_MODULE) +static struct mxc_w1_config mxc_w1_data = { + .search_rom_accelerator = 0, +}; + +static struct platform_device mxc_w1_devices = { + .name = "mxc_w1", + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_w1_data, + }, + .id = 0 +}; + +static void mxc_init_owire(void) +{ + (void)platform_device_register(&mxc_w1_devices); +} +#else +static inline void mxc_init_owire(void) +{ +} +#endif + +#if defined(CONFIG_RTC_DRV_MXC_V2) || defined(CONFIG_RTC_DRV_MXC_V2_MODULE) +static struct mxc_srtc_platform_data srtc_data = { + .srtc_sec_mode_addr = 0xC3FAC80C, +}; + +static struct resource rtc_resources[] = { + { + .start = SRTC_BASE_ADDR, + .end = SRTC_BASE_ADDR + 0x40, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_SRTC_NTZ, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device mxc_rtc_device = { + .name = "mxc_rtc", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &srtc_data, + }, + .num_resources = ARRAY_SIZE(rtc_resources), + .resource = rtc_resources, +}; +static void mxc_init_rtc(void) +{ + (void)platform_device_register(&mxc_rtc_device); +} +#else +static inline void mxc_init_rtc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_WATCHDOG) || defined(CONFIG_MXC_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { + { + .start = WDOG1_BASE_ADDR, + .end = WDOG1_BASE_ADDR + 0x30, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_wdt_device = { + .name = "mxc_wdt", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void mxc_init_wdt(void) +{ + (void)platform_device_register(&mxc_wdt_device); +} +#else +static inline void mxc_init_wdt(void) +{ +} +#endif + +#if defined(CONFIG_MXC_IPU_V3) || defined(CONFIG_MXC_IPU_V3_MODULE) +static struct mxc_ipu_config mxc_ipu_data = { + .rev = 1, +}; + +static struct resource ipu_resources[] = { + { + .start = IPU_CTRL_BASE_ADDR, + .end = IPU_CTRL_BASE_ADDR + SZ_512M, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_IPU_SYN, + .flags = IORESOURCE_IRQ, + }, + { + .start = MXC_INT_IPU_ERR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxc_ipu_device = { + .name = "mxc_ipu", + .id = -1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_ipu_data, + }, + .num_resources = ARRAY_SIZE(ipu_resources), + .resource = ipu_resources, +}; + +static void mxc_init_ipu(void) +{ + mxc_ipu_data.di_clk[1] = clk_get(NULL, "ipu_di_clk"); + + platform_device_register(&mxc_ipu_device); +} +#else +static inline void mxc_init_ipu(void) +{ +} +#endif + +/*! + * This is platform device structure for adding SCC + */ +#if defined(CONFIG_MXC_SECURITY_SCC) || defined(CONFIG_MXC_SECURITY_SCC_MODULE) +static struct platform_device mxc_scc_device = { + .name = "mxc_scc", + .id = 0, +}; + +static void mxc_init_scc(void) +{ + platform_device_register(&mxc_scc_device); +} +#else +static inline void mxc_init_scc(void) +{ + uint32_t reg_value; + uint8_t *UMID_base; + uint32_t *MAP_base; + uint8_t i; + uint32_t partition_no; + uint32_t scc_partno; + void *scm_ram_base; + void *scc_base; + + scc_base = ioremap((uint32_t) SCC_BASE_ADDR, 0x140); + if (scc_base == NULL) { + printk(KERN_ERR "FAILED TO MAP IRAM REGS\n"); + return; + } + scm_ram_base = ioremap((uint32_t) IRAM_BASE_ADDR, IRAM_SIZE); + if (scm_ram_base == NULL) { + printk(KERN_ERR "FAILED TO MAP IRAM\n"); + return; + } + + for (partition_no = 0; partition_no < 9; partition_no++) { + reg_value = ((partition_no << SCM_ZCMD_PART_SHIFT) & + SCM_ZCMD_PART_MASK) | ((0x03 << + SCM_ZCMD_CCMD_SHIFT) + & SCM_ZCMD_CCMD_MASK); + __raw_writel(reg_value, scc_base + SCM_ZCMD_REG); + + while ((__raw_readl(scc_base + SCM_STATUS_REG) & + SCM_STATUS_SRS_READY) != SCM_STATUS_SRS_READY) ; + + __raw_writel(0, scc_base + (SCM_SMID0_REG + 8 * partition_no)); + + reg_value = __raw_readl(scc_base + SCM_PART_OWNERS_REG); + + if (((reg_value >> (2 * (partition_no))) & 3) != 3) { + printk(KERN_ERR "FAILED TO ACQUIRE IRAM PARTITION\n"); + iounmap(scm_ram_base); + return; + } + + MAP_base = scm_ram_base + (partition_no * 0x2000); + UMID_base = (uint8_t *) MAP_base + 0x10; + + for (i = 0; i < 16; i++) + UMID_base[i] = 0; + + MAP_base[0] = SCM_PERM_NO_ZEROIZE | SCM_PERM_HD_SUP_DISABLE | + SCM_PERM_HD_READ | SCM_PERM_HD_WRITE | + SCM_PERM_TH_READ | SCM_PERM_TH_WRITE; + + } + + /*Freeing 2 partitions for SCC2 */ + scc_partno = 9 - (SCC_IRAM_SIZE / SZ_8K); + for (partition_no = scc_partno; partition_no < 9; partition_no++) { + reg_value = ((partition_no << SCM_ZCMD_PART_SHIFT) & + SCM_ZCMD_PART_MASK) | ((0x03 << + SCM_ZCMD_CCMD_SHIFT) + & SCM_ZCMD_CCMD_MASK); + __raw_writel(reg_value, scc_base + SCM_ZCMD_REG); + + while ((__raw_readl(scc_base + SCM_STATUS_REG) & + SCM_STATUS_SRS_READY) != SCM_STATUS_SRS_READY) ; + } + iounmap(scm_ram_base); + iounmap(scc_base); + printk(KERN_INFO "IRAM READY\n"); + +} +#endif + +/* SPI controller and device data */ +#if defined(CONFIG_SPI_MXC) || defined(CONFIG_SPI_MXC_MODULE) + +#ifdef CONFIG_SPI_MXC_SELECT1 +/*! + * Resource definition for the CSPI1 + */ +static struct resource mxcspi1_resources[] = { + [0] = { + .start = CSPI1_BASE_ADDR, + .end = CSPI1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI1, + .end = MXC_INT_CSPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI1 */ +static struct mxc_spi_master mxcspi1_data = { + .maxchipselect = 4, + .spi_version = 23, +}; + +/*! Device Definition for MXC CSPI1 */ +static struct platform_device mxcspi1_device = { + .name = "mxc_spi", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi1_data, + }, + .num_resources = ARRAY_SIZE(mxcspi1_resources), + .resource = mxcspi1_resources, +}; + +#endif /* CONFIG_SPI_MXC_SELECT1 */ + +#ifdef CONFIG_SPI_MXC_SELECT2 +/*! + * Resource definition for the CSPI2 + */ +static struct resource mxcspi2_resources[] = { + [0] = { + .start = CSPI2_BASE_ADDR, + .end = CSPI2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI2, + .end = MXC_INT_CSPI2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI2 */ +static struct mxc_spi_master mxcspi2_data = { + .maxchipselect = 4, + .spi_version = 23, +}; + +/*! Device Definition for MXC CSPI2 */ +static struct platform_device mxcspi2_device = { + .name = "mxc_spi", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi2_data, + }, + .num_resources = ARRAY_SIZE(mxcspi2_resources), + .resource = mxcspi2_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT2 */ + +#ifdef CONFIG_SPI_MXC_SELECT3 +/*! + * Resource definition for the CSPI3 + */ +static struct resource mxcspi3_resources[] = { + [0] = { + .start = CSPI3_BASE_ADDR, + .end = CSPI3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_CSPI3, + .end = MXC_INT_CSPI3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC CSPI3 */ +static struct mxc_spi_master mxcspi3_data = { + .maxchipselect = 4, + .spi_version = 23, +}; + +/*! Device Definition for MXC CSPI3 */ +static struct platform_device mxcspi3_device = { + .name = "mxc_spi", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxcspi3_data, + }, + .num_resources = ARRAY_SIZE(mxcspi3_resources), + .resource = mxcspi3_resources, +}; +#endif /* CONFIG_SPI_MXC_SELECT3 */ + +void __init mxc_init_spi(void) +{ + /* SPBA configuration for CSPI2 - MCU is set */ + spba_take_ownership(SPBA_CSPI2, SPBA_MASTER_A); +#ifdef CONFIG_SPI_MXC_SELECT1 + if (platform_device_register(&mxcspi1_device) < 0) + printk("Error: Registering the SPI Controller_1\n"); +#endif /* CONFIG_SPI_MXC_SELECT1 */ +#ifdef CONFIG_SPI_MXC_SELECT2 + if (platform_device_register(&mxcspi2_device) < 0) + printk("Error: Registering the SPI Controller_2\n"); +#endif /* CONFIG_SPI_MXC_SELECT2 */ +#ifdef CONFIG_SPI_MXC_SELECT3 + if (platform_device_register(&mxcspi3_device) < 0) + printk("Error: Registering the SPI Controller_3\n"); +#endif /* CONFIG_SPI_MXC_SELECT3 */ +} +#else +void __init mxc_init_spi(void) +{ +} +#endif + +/* I2C controller and device data */ +#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE) + +#ifdef CONFIG_I2C_MXC_SELECT1 +/*! + * Resource definition for the I2C1 + */ +static struct resource mxci2c1_resources[] = { + [0] = { + .start = I2C_BASE_ADDR, + .end = I2C_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C, + .end = MXC_INT_I2C, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c1_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT2 +/*! + * Resource definition for the I2C2 + */ +static struct resource mxci2c2_resources[] = { + [0] = { + .start = I2C2_BASE_ADDR, + .end = I2C2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C2, + .end = MXC_INT_I2C2, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c2_data = { + .i2c_clk = 100000, +}; +#endif + +#ifdef CONFIG_I2C_MXC_SELECT3 +/*! + * Resource definition for the I2C3 + */ +static struct resource mxci2c3_resources[] = { + [0] = { + .start = I2C3_BASE_ADDR, + .end = I2C3_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_I2C3, + .end = MXC_INT_I2C3, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC I2C */ +static struct mxc_i2c_platform_data mxci2c3_data = { + .i2c_clk = 100000, +}; +#endif + +/*! Device Definition for MXC I2C1 */ +static struct platform_device mxci2c_devices[] = { +#ifdef CONFIG_I2C_MXC_SELECT1 + { + .name = "mxc_i2c", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c1_data, + }, + .num_resources = ARRAY_SIZE(mxci2c1_resources), + .resource = mxci2c1_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT2 + { + .name = "mxc_i2c", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c2_data, + }, + .num_resources = ARRAY_SIZE(mxci2c2_resources), + .resource = mxci2c2_resources,}, +#endif +#ifdef CONFIG_I2C_MXC_SELECT3 + { + .name = "mxc_i2c", + .id = 2, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxci2c3_data, + }, + .num_resources = ARRAY_SIZE(mxci2c3_resources), + .resource = mxci2c3_resources,}, +#endif +}; + +static inline void mxc_init_i2c(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxci2c_devices); i++) { + if (platform_device_register(&mxci2c_devices[i]) < 0) + dev_err(&mxci2c_devices[i].dev, + "Unable to register I2C device\n"); + } +} +#else +static inline void mxc_init_i2c(void) +{ +} +#endif + +struct tve_platform_data tve_data = { + .dac_reg = "VVIDEO", + .dig_reg = "VDIG", +}; + +static struct resource tve_resources[] = { + { + .start = TVE_BASE_ADDR, + .end = TVE_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_TVOUT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxc_tve_device = { + .name = "tve", + .dev = { + .release = mxc_nop_release, + .platform_data = &tve_data, + }, + .num_resources = ARRAY_SIZE(tve_resources), + .resource = tve_resources, +}; + +void __init mxc_init_tve(void) +{ + platform_device_register(&mxc_tve_device); +} + +/*! + * Resource definition for the DVFS CORE + */ +static struct resource dvfs_core_resources[] = { + [0] = { + .start = MXC_DVFS_CORE_BASE, + .end = MXC_DVFS_CORE_BASE + 4 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for DVFS CORE */ +struct mxc_dvfs_platform_data dvfs_core_data = { + .reg_id = "SW1", + .clk1_id = "cpu_clk", + .clk2_id = "gpc_dvfs_clk", + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .gpc_vcr_reg_addr = MXC_GPC_VCR, + .ccm_cdcr_reg_addr = MXC_CCM_CDCR, + .ccm_cacrr_reg_addr = MXC_CCM_CACRR, + .ccm_cdhipr_reg_addr = MXC_CCM_CDHIPR, + .dvfs_thrs_reg_addr = MXC_DVFSTHRS, + .dvfs_coun_reg_addr = MXC_DVFSCOUN, + .dvfs_emac_reg_addr = MXC_DVFSEMAC, + .dvfs_cntr_reg_addr = MXC_DVFSCNTR, + .prediv_mask = 0x3800, + .prediv_offset = 11, + .prediv_val = 1, + .div3ck_mask = 0x00000006, + .div3ck_offset = 1, + .div3ck_val = 3, + .emac_val = 0x08, + .upthr_val = 30, + .dnthr_val = 10, + .pncthr_val = 33, + .upcnt_val = 5, + .dncnt_val = 5, + .delay_time = 100, + .num_wp = 3, +}; + +/*! Device Definition for MXC DVFS core */ +static struct platform_device mxc_dvfs_core_device = { + .name = "mxc_dvfs_core", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dvfs_core_data, + }, + .num_resources = ARRAY_SIZE(dvfs_core_resources), + .resource = dvfs_core_resources, +}; + +static inline void mxc_init_dvfs_core(void) +{ + if (platform_device_register(&mxc_dvfs_core_device) < 0) + dev_err(&mxc_dvfs_core_device.dev, + "Unable to register DVFS core device\n"); +} + +/*! + * Resource definition for the DPTC GP + */ +static struct resource dptc_gp_resources[] = { + [0] = { + .start = MXC_DPTC_GP_BASE, + .end = MXC_DPTC_GP_BASE + 8 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for DPTC GP */ +struct mxc_dptc_data dptc_gp_data = { + .reg_id = "SW1", + .clk_id = "cpu_clk", + .dptccr_reg_addr = MXC_GP_DPTCCR, + .dcvr0_reg_addr = MXC_GP_DCVR0, + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .dptccr = MXC_GPCCNTR_DPTC0CR, + .dptc_wp_supported = DPTC_GP_WP_SUPPORTED, + .dptc_wp_allfreq = dptc_gp_wp_allfreq, + .clk_max_val = 532000000, + .gpc_adu = MXC_GPCCNTR_ADU, + .vai_mask = MXC_DPTCCR_VAI_MASK, + .vai_offset = MXC_DPTCCR_VAI_OFFSET, + .dptc_enable_bit = MXC_DPTCCR_DEN, + .irq_mask = MXC_DPTCCR_VAIM, + .dptc_nvcr_bit = MXC_DPTCCR_DPNVCR, + .gpc_irq_bit = MXC_GPCCNTR_GPCIRQ, + .init_config = + MXC_DPTCCR_DRCE0 | MXC_DPTCCR_DRCE1 | MXC_DPTCCR_DRCE2 | + MXC_DPTCCR_DRCE3 | MXC_DPTCCR_DCR_128 | MXC_DPTCCR_DPNVCR | + MXC_DPTCCR_DPVV, + .enable_config = + MXC_DPTCCR_DEN | MXC_DPTCCR_DPNVCR | MXC_DPTCCR_DPVV | + MXC_DPTCCR_DSMM, + .dcr_mask = MXC_DPTCCR_DCR_256, +}; + +/*! + * Resource definition for the DPTC LP + */ +static struct resource dptc_lp_resources[] = { + [0] = { + .start = MXC_DPTC_LP_BASE, + .end = MXC_DPTC_LP_BASE + 8 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC DPTC LP */ +struct mxc_dptc_data dptc_lp_data = { + .reg_id = "SW2", + .clk_id = "ahb_clk", + .dptccr_reg_addr = MXC_LP_DPTCCR, + .dcvr0_reg_addr = MXC_LP_DCVR0, + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .dptccr = MXC_GPCCNTR_DPTC1CR, + .dptc_wp_supported = DPTC_LP_WP_SUPPORTED, + .dptc_wp_allfreq = dptc_lp_wp_allfreq, + .clk_max_val = 133000000, + .gpc_adu = 0x0, + .vai_mask = MXC_DPTCCR_VAI_MASK, + .vai_offset = MXC_DPTCCR_VAI_OFFSET, + .dptc_enable_bit = MXC_DPTCCR_DEN, + .irq_mask = MXC_DPTCCR_VAIM, + .dptc_nvcr_bit = MXC_DPTCCR_DPNVCR, + .gpc_irq_bit = MXC_GPCCNTR_GPCIRQ, + .init_config = + MXC_DPTCCR_DRCE0 | MXC_DPTCCR_DRCE1 | MXC_DPTCCR_DRCE2 | + MXC_DPTCCR_DRCE3 | MXC_DPTCCR_DCR_128 | MXC_DPTCCR_DPNVCR | + MXC_DPTCCR_DPVV, + .enable_config = + MXC_DPTCCR_DEN | MXC_DPTCCR_DPNVCR | MXC_DPTCCR_DPVV | + MXC_DPTCCR_DSMM, + .dcr_mask = MXC_DPTCCR_DCR_256, +}; + +/*! Device Definition for MXC DPTC */ +static struct platform_device mxc_dptc_devices[] = { + { + .name = "mxc_dptc", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dptc_gp_data, + }, + .num_resources = ARRAY_SIZE(dptc_gp_resources), + .resource = dptc_gp_resources, + }, + { + .name = "mxc_dptc", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &dptc_lp_data, + }, + .num_resources = ARRAY_SIZE(dptc_lp_resources), + .resource = dptc_lp_resources, + }, +}; + +static inline void mxc_init_dptc(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mxc_dptc_devices); i++) { + if (platform_device_register(&mxc_dptc_devices[i]) < 0) + dev_err(&mxc_dptc_devices[i].dev, + "Unable to register DPTC device\n"); + } +} + +struct mxc_gpio_port mxc_gpio_ports[] = { + [0] = { + .chip.label = "gpio-0", + .base = IO_ADDRESS(GPIO1_BASE_ADDR), + .irq = MXC_INT_GPIO1_LOW, + .irq_high = MXC_INT_GPIO1_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + }, + [1] = { + .chip.label = "gpio-1", + .base = IO_ADDRESS(GPIO2_BASE_ADDR), + .irq = MXC_INT_GPIO2_LOW, + .irq_high = MXC_INT_GPIO2_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 + }, + [2] = { + .chip.label = "gpio-2", + .base = IO_ADDRESS(GPIO3_BASE_ADDR), + .irq = MXC_INT_GPIO3_LOW, + .irq_high = MXC_INT_GPIO3_HIGH, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 + } +}; + +int __init mxc_register_gpios(void) +{ + return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); +} + +#if defined(CONFIG_MXC_VPU) || defined(CONFIG_MXC_VPU_MODULE) +static struct resource vpu_resources[] = { + [0] = { + .start = VPU_IRAM_BASE_ADDR, + .end = VPU_IRAM_BASE_ADDR + VPU_IRAM_SIZE, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IO_ADDRESS(SRC_BASE_ADDR), + .end = IO_ADDRESS(SRC_BASE_ADDR), + .flags = IORESOURCE_MEM, + }, +}; + +/*! Platform Data for MXC VPU */ +static struct platform_device mxcvpu_device = { + .name = "mxc_vpu", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(vpu_resources), + .resource = vpu_resources, +}; + +static inline void mxc_init_vpu(void) +{ + if (platform_device_register(&mxcvpu_device) < 0) + printk(KERN_ERR "Error: Registering the VPU.\n"); +} +#else +static inline void mxc_init_vpu(void) +{ +} +#endif + +static struct platform_device mxc_dma_device = { + .name = "mxc_dma", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_dma(void) +{ + (void)platform_device_register(&mxc_dma_device); +} + +static struct resource spdif_resources[] = { + { + .start = SPDIF_BASE_ADDR, + .end = SPDIF_BASE_ADDR + 0x50, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mxc_spdif_platform_data mxc_spdif_data = { + .spdif_tx = 1, + .spdif_rx = 0, + .spdif_clk_44100 = 0, + .spdif_clk_48000 = 3, + .spdif_clk = NULL, + .spdif_core_clk = NULL, +}; + +static struct platform_device mxc_alsa_spdif_device = { + .name = "mxc_alsa_spdif", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_spdif_data, + }, + .num_resources = ARRAY_SIZE(spdif_resources), + .resource = spdif_resources, +}; + +static inline void mxc_init_spdif(void) +{ + struct clk *ckih_clk; + ckih_clk = clk_get(NULL, "ckih"); + mxc_spdif_data.spdif_core_clk = clk_get(NULL, "spdif_xtal_clk"); + clk_set_parent(mxc_spdif_data.spdif_core_clk, ckih_clk); + clk_put(ckih_clk); + clk_put(mxc_spdif_data.spdif_core_clk); + platform_device_register(&mxc_alsa_spdif_device); +} + +static struct platform_device mx37_lpmode_device = { + .name = "mx37_lpmode", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mx37_init_lpmode(void) +{ + (void)platform_device_register(&mx37_lpmode_device); +} + +static struct platform_device busfreq_device = { + .name = "busfreq", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, +}; + +static inline void mxc_init_busfreq(void) +{ + (void)platform_device_register(&busfreq_device); +} + +/*! + * Resource definition for the DVFS PER + */ +static struct resource dvfs_per_resources[] = { + [0] = { + .start = DVFSPER_BASE_ADDR, + .end = DVFSPER_BASE_ADDR + 2 * SZ_16 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_GPC1, + .end = MXC_INT_GPC1, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Platform Data for MXC DVFS Peripheral */ +struct mxc_dvfsper_data dvfs_per_data = { + .reg_id = "SW2", + .clk_id = "gpc_dvfs_clk", + .gpc_cntr_reg_addr = MXC_GPC_CNTR, + .gpc_vcr_reg_addr = MXC_GPC_VCR, + .gpc_adu = 0x0, + .vai_mask = MXC_DVFSPMCR0_FSVAI_MASK, + .vai_offset = MXC_DVFSPMCR0_FSVAI_OFFSET, + .dvfs_enable_bit = MXC_DVFSPMCR0_DVFEN, + .irq_mask = MXC_DVFSPMCR0_FSVAIM, + .div3_offset = 1, + .div3_mask = 0x3, + .div3_div = 3, + .lp_high = 1200000, + .lp_low = 1050000, +}; + +/*! Device Definition for MXC DVFS Peripheral */ +static struct platform_device mxc_dvfs_per_device = { + .name = "mxc_dvfsper", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &dvfs_per_data, + }, + .num_resources = ARRAY_SIZE(dvfs_per_resources), + .resource = dvfs_per_resources, +}; + +static inline void mxc_init_dvfs_per(void) +{ + if (platform_device_register(&mxc_dvfs_per_device) < 0) { + dev_err(&mxc_dvfs_per_device.dev, + "Unable to register DVFS Peripheral device\n"); + } else { + printk(KERN_INFO "mxc_init_dvfs_per initialised\n"); + } + return; +} + +#if defined(CONFIG_HW_RANDOM_FSL_RNGC) || \ +defined(CONFIG_HW_RANDOM_FSL_RNGC_MODULE) +static struct resource rngc_resources[] = { + { + .start = RNGC_BASE_ADDR, + .end = RNGC_BASE_ADDR + 0x34, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_INT_RNG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device fsl_rngc_device = { + .name = "fsl_rngc", + .id = -1, + .num_resources = ARRAY_SIZE(rngc_resources), + .resource = rngc_resources, +}; + +static inline void mxc_init_rngc(void) +{ + platform_device_register(&fsl_rngc_device); +} +#else +static inline void mxc_init_rngc(void) +{ +} +#endif + +#if defined(CONFIG_MXC_IIM) || defined(CONFIG_MXC_IIM_MODULE) +static struct resource mxc_iim_resources[] = { + { + .start = IIM_BASE_ADDR, + .end = IIM_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mxc_iim_device = { + .name = "mxc_iim", + .id = 0, + .dev = { + .release = mxc_nop_release, + }, + .num_resources = ARRAY_SIZE(mxc_iim_resources), + .resource = mxc_iim_resources +}; + +static inline void mxc_init_iim(void) +{ + if (platform_device_register(&mxc_iim_device) < 0) + dev_err(&mxc_iim_device.dev, + "Unable to register mxc iim device\n"); +} +#else +static inline void mxc_init_iim(void) +{ +} +#endif + +int __init mxc_init_srpgconfig(void) +{ + struct clk *gpcclk = clk_get(NULL, "gpc_dvfs_clk"); + clk_enable(gpcclk); + + /* Setup the number of clock cycles to wait for SRPG + * power up and power down requests. + */ + __raw_writel(0x03023030, MXC_SRPGC_ARM_PUPSCR); + __raw_writel(0x50, MXC_EMPGC0_ARM_PUPSCR); + + __raw_writel(0x30033030, MXC_SRPGC_ARM_PDNSCR); + __raw_writel(0x50, MXC_EMPGC0_ARM_PDNSCR); + + clk_disable(gpcclk); + clk_put(gpcclk); + + return 0; +} + +int __init mxc_init_devices(void) +{ + mxc_init_wdt(); + mxc_init_ipu(); + mxc_init_spi(); + mxc_init_i2c(); + mxc_init_rtc(); + mxc_init_owire(); + mxc_init_scc(); + mxc_init_dma(); + mxc_init_vpu(); + mxc_init_spdif(); + mxc_init_tve(); + mx37_init_lpmode(); + mxc_init_busfreq(); + mxc_init_dvfs_core(); + mxc_init_dvfs_per(); + mxc_init_dptc(); + mxc_init_rngc(); + mxc_init_iim(); + + /* SPBA configuration for SSI2 - SDMA and MCU are set */ + spba_take_ownership(SPBA_SSI2, SPBA_MASTER_C | SPBA_MASTER_A); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/sdma_script_code.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/sdma_script_code.h @@ -0,0 +1,203 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + +/*! + * @file sdma_script_code.h + * @brief This file contains functions of SDMA scripts code initialization + * + * The file was generated automatically. Based on sdma scripts library. + * + * @ingroup SDMA + */ +/******************************************************************************* + + SDMA RELEASE LABEL: "SS15_MARLEY" + +*******************************************************************************/ + +#ifndef __SDMA_SCRIPT_CODE_H__ +#define __SDMA_SCRIPT_CODE_H__ + +/*! +* SDMA ROM scripts start addresses and sizes +*/ + +#define start_ADDR 0 +#define start_SIZE 20 + +#define core_ADDR 80 +#define core_SIZE 232 + +#define common_ADDR 312 +#define common_SIZE 330 + +#define ap_2_ap_ADDR 642 +#define ap_2_ap_SIZE 41 + +#define app_2_mcu_ADDR 683 +#define app_2_mcu_SIZE 64 + +#define mcu_2_app_ADDR 747 +#define mcu_2_app_SIZE 70 + +#define uart_2_mcu_ADDR 817 +#define uart_2_mcu_SIZE 75 + +#define shp_2_mcu_ADDR 892 +#define shp_2_mcu_SIZE 69 + +#define mcu_2_shp_ADDR 961 +#define mcu_2_shp_SIZE 72 + +#define uartsh_2_mcu_ADDR 1033 +#define uartsh_2_mcu_SIZE 69 + +#define mcu_2_ata_ADDR 1102 +#define mcu_2_ata_SIZE 81 + +#define ata_2_mcu_ADDR 1183 +#define ata_2_mcu_SIZE 96 + +#define burstDMA__2__burstDMA_routine_ADDR 1279 +#define burstDMA__2__burstDMA_routine_SIZE 227 + +#define test_ADDR 1506 +#define test_SIZE 63 + +#define signature_ADDR 1023 +#define signature_SIZE 1 + +/*! +* SDMA RAM scripts start addresses and sizes +*/ + +#define dptc_dvfs_ADDR 6144 +#define dptc_dvfs_SIZE 270 + +#define ext_mem__ipu_ram_ADDR 6414 +#define ext_mem__ipu_ram_SIZE 123 + +#define mcu_2_mshc_ADDR 6537 +#define mcu_2_mshc_SIZE 54 + +#define mcu_2_spdif_marley_ADDR 6591 +#define mcu_2_spdif_marley_SIZE 161 + +#define mshc_2_mcu_ADDR 6752 +#define mshc_2_mcu_SIZE 54 + +/*! +* SDMA RAM image start address and size +*/ + +#define RAM_CODE_START_ADDR 6144 +#define RAM_CODE_SIZE 662 + +/*! +* Buffer that holds the SDMA RAM image +*/ +__attribute__ ((__aligned__(4))) +#ifndef CONFIG_XIP_KERNEL +const +#endif +static const short sdma_code[] = { + 0xc13c, 0x7d70, 0x0800, 0x0970, 0x0111, 0x5111, 0x5ac1, 0x5bc9, + 0x028e, 0xc14e, 0x068a, 0x7c66, 0x5dd9, 0x5ce1, 0x0bff, 0x0311, + 0x1bff, 0x03bc, 0x5bd1, 0x1a5c, 0x6ac3, 0x63c8, 0x0363, 0x7c05, + 0x036f, 0x7d27, 0x0374, 0x7c76, 0x9874, 0xd907, 0x3c06, 0x4c00, + 0x7df7, 0x028f, 0x1a04, 0x6a20, 0x620b, 0x6f20, 0x301f, 0x00aa, + 0x0462, 0x7c04, 0x4a00, 0x7d0b, 0x2001, 0x9837, 0x048a, 0x620b, + 0x2201, 0x1c01, 0x1801, 0x02dc, 0x7d02, 0x301f, 0x00aa, 0x048f, + 0x1c04, 0x6c04, 0x0488, 0x3c1f, 0x6c2b, 0x0045, 0x028e, 0x1a5c, + 0x9818, 0x058f, 0x1d0c, 0x6d20, 0x650b, 0x007d, 0x7c01, 0x1d08, + 0x007c, 0x7c01, 0x1d04, 0x6d20, 0x650b, 0x0488, 0x3c1f, 0x0417, + 0x0417, 0x0417, 0x0417, 0x059c, 0x6d20, 0x028e, 0x1a34, 0x6ad7, + 0x0488, 0x0804, 0x7802, 0x650b, 0x6dc8, 0x008c, 0x1a28, 0x6ad7, + 0x63c8, 0x034c, 0x6bc8, 0x54d1, 0x4c00, 0x7d06, 0x0065, 0x7c02, + 0x0101, 0x0025, 0x0400, 0x9814, 0x52c1, 0x53c9, 0x54e1, 0x0453, + 0xc159, 0x7d95, 0x0200, 0x9800, 0x55d9, 0x6d04, 0x54d1, 0x058a, + 0x2508, 0x6dc7, 0x0373, 0x7c03, 0x65c8, 0x6d0b, 0x2408, 0x0372, + 0x7c04, 0x65c8, 0x6d0b, 0x2408, 0x9889, 0x6cce, 0x65c8, 0x6d0a, + 0x2404, 0x6d28, 0x6504, 0x5dd9, 0x5cd1, 0x6ad7, 0x6ae3, 0x63c8, + 0x0334, 0x6bc8, 0x0370, 0x7cad, 0x0c60, 0x0411, 0x04bb, 0x4c00, + 0x7da8, 0x0410, 0x1c30, 0x0410, 0x04bb, 0x046d, 0x7d0a, 0x047d, + 0x7c03, 0x047c, 0x7c01, 0x9841, 0x003b, 0x003a, 0x0039, 0x0058, + 0x98b8, 0x047d, 0x7d03, 0x047c, 0x7d01, 0x9841, 0x005b, 0xd8fc, + 0x1d18, 0x6d20, 0x650b, 0x0510, 0x003a, 0x0039, 0x0038, 0x00ad, + 0xd907, 0x0c30, 0x0410, 0x04bb, 0x003c, 0x003d, 0x00ac, 0xd8fc, + 0x007b, 0x7c04, 0x003d, 0x003c, 0x1d0c, 0x98d9, 0x048f, 0x1c14, + 0x6c20, 0x640b, 0x4401, 0x7d04, 0x005d, 0x005c, 0x1d0c, 0x98d9, + 0x0310, 0x3b30, 0x4b30, 0x7d01, 0x1b10, 0x0310, 0x003d, 0x003c, + 0x00ab, 0x6ad7, 0x63c8, 0x6d20, 0x650b, 0x0560, 0x7d03, 0x005e, + 0xd8f0, 0x9841, 0x003e, 0x0c80, 0x0410, 0x0394, 0xd8f0, 0x640b, + 0x037f, 0x7d02, 0x1a14, 0x98ed, 0x1a0c, 0x6ad7, 0x6cc8, 0x9841, + 0x0c7f, 0x0410, 0x03b4, 0x04b8, 0x03ac, 0x640b, 0x6bc8, 0x028e, + 0x1a04, 0x6ad7, 0x6cc8, 0x0006, 0x058f, 0x1d08, 0x6d20, 0x650b, + 0x007d, 0x7c01, 0x1d38, 0x007c, 0x7c01, 0x1d1c, 0x0006, 0x048b, + 0x042c, 0x0454, 0x042b, 0x6ad7, 0x6cc8, 0x0006, 0x0e70, 0x0611, + 0x5616, 0xc13c, 0x7d2a, 0x5ade, 0x008e, 0xc14e, 0x7c26, 0x5be0, + 0x5ef0, 0x5ce8, 0x0688, 0x08ff, 0x0011, 0x28ff, 0x00bc, 0x53f6, + 0x05df, 0x7d0b, 0x6dc5, 0x03df, 0x7d03, 0x6bd5, 0xd95d, 0x9939, + 0x6b05, 0xc55f, 0x7e27, 0x7f29, 0x9939, 0x6d01, 0x03df, 0x7d05, + 0x6bd5, 0xc589, 0x7e18, 0x7f1a, 0x9939, 0x6b05, 0xc4ff, 0x7e07, + 0x7f06, 0x52de, 0x53e6, 0xc159, 0x7dd7, 0x0200, 0x9911, 0x0007, + 0x6004, 0x680c, 0x53f6, 0x028e, 0x00a3, 0xc256, 0x048b, 0x0498, + 0x0454, 0x068a, 0x9939, 0x0207, 0x680c, 0x6ddf, 0x0107, 0x68ff, + 0x60d0, 0x9942, 0x0207, 0x68ff, 0x6d28, 0x0107, 0x6004, 0x680c, + 0x9942, 0x0007, 0x68ff, 0x60d0, 0x9942, 0x0288, 0x03a5, 0x3b03, + 0x3d03, 0x4d00, 0x7d0a, 0x0804, 0x00a5, 0x00da, 0x7d1a, 0x02a0, + 0x7b01, 0x65d8, 0x7eee, 0x65ff, 0x7eec, 0x0804, 0x02d0, 0x7d11, + 0x4b00, 0x7c0f, 0x008a, 0x3003, 0x6dcf, 0x6bdf, 0x0015, 0x0015, + 0x7b02, 0x65d8, 0x0000, 0x7edd, 0x63ff, 0x7edb, 0x3a03, 0x6dcd, + 0x6bdd, 0x008a, 0x7b02, 0x65d8, 0x0000, 0x7ed3, 0x65ff, 0x7ed1, + 0x0006, 0xc1d9, 0x0b70, 0x0311, 0x5313, 0x58d3, 0x008b, 0x5efb, + 0xc13c, 0x7d2b, 0x5ac0, 0x5bc8, 0xc14e, 0x7c27, 0x6d01, 0x0388, + 0x0dff, 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d1a, 0x0e70, 0x0611, + 0x522e, 0x02b9, 0x4a00, 0x7c07, 0x52fe, 0x50d3, 0x02b8, 0x4a00, + 0x7c02, 0x0400, 0x999e, 0x56fb, 0x620b, 0x7e06, 0x5a06, 0x7f06, + 0x0000, 0x2504, 0x7d05, 0x999e, 0x0007, 0x680c, 0x0007, 0x0454, + 0x008b, 0x52c0, 0x53c8, 0xc159, 0x7dd6, 0x0200, 0x9990, 0xc1d9, + 0xc1e3, 0x0800, 0x005f, 0x00ac, 0x58e3, 0x0478, 0x7d5c, 0x0479, + 0x7d01, 0x0515, 0x0515, 0xda38, 0xda57, 0x0479, 0x7d26, 0x54e3, + 0x047f, 0x7d12, 0x50eb, 0x56fb, 0x0015, 0x52db, 0x7806, 0x5402, + 0x5c06, 0x1a01, 0x5402, 0x5c26, 0x1a01, 0x54e3, 0x043f, 0x5ce3, + 0x4d00, 0x7d4e, 0x0479, 0x7d14, 0x047f, 0x7d01, 0xda57, 0x52f3, + 0x6a21, 0x56db, 0x7803, 0x620b, 0x5a06, 0x1e01, 0x7f34, 0x7e33, + 0x6200, 0x5af3, 0x047f, 0x7dde, 0x9a20, 0x54e3, 0x047f, 0x7cda, + 0x54e3, 0x047f, 0x7d01, 0xda57, 0x54eb, 0x0fff, 0x0711, 0x1fff, + 0x56db, 0x52f3, 0x6a21, 0x630b, 0x028b, 0x03bf, 0xda32, 0x5b06, + 0x2401, 0x4c00, 0x7d0b, 0x1e01, 0x038a, 0x03b7, 0x0312, 0x0312, + 0xda32, 0x5b06, 0x1e01, 0x2401, 0x4c00, 0x7ced, 0x0b70, 0x0311, + 0x5313, 0x7f09, 0x7e08, 0x6200, 0x5af3, 0x54e3, 0x047f, 0x7db2, + 0x57db, 0xc1fa, 0x99cd, 0x0007, 0x680c, 0x54e3, 0x0478, 0x7c02, + 0x0800, 0x9a2e, 0x0479, 0x7d01, 0x0517, 0x0517, 0x5deb, 0xc213, + 0xc20a, 0x99c1, 0x0808, 0x7801, 0x0317, 0x0006, 0x020a, 0x0006, + 0x070a, 0xda36, 0x1a05, 0x0215, 0x5adb, 0x0708, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x080c, + 0x00d5, 0x7d01, 0x008d, 0x05a0, 0x4800, 0x7dd2, 0x58eb, 0x0006, + 0xc1d9, 0x0b70, 0x0311, 0x5313, 0x58d3, 0x008b, 0x5efb, 0xc13c, + 0x7d2b, 0x5ac0, 0x5bc8, 0xc14e, 0x7c27, 0x0388, 0x6d05, 0x0dff, + 0x0511, 0x1dff, 0x05bc, 0x4d00, 0x7d1a, 0x0e70, 0x0611, 0x522e, + 0x02b9, 0x4a00, 0x7c07, 0x52fe, 0x50d3, 0x02b8, 0x4a00, 0x7c02, + 0x0400, 0x9a75, 0x56fb, 0x5206, 0x7e08, 0x6a0b, 0x6a28, 0x7f04, + 0x0000, 0x2504, 0x7d04, 0x9a75, 0x680c, 0x0007, 0x0454, 0x008b, + 0x52c0, 0x53c8, 0xc159, 0x7dd6, 0x0200, 0x9a67 +}; +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/Makefile.boot +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x40008000 +params_phys-y := 0x40000100 +initrd_phys-y := 0x40800000 --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mx37_3stack_pmic_wm8350.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mx37_3stack_pmic_wm8350.c @@ -0,0 +1,384 @@ +/* + * mx37-3stack-pmic-wm8350.c -- i.MX37 3STACK Driver for Wolfson WM8350 PMIC + * + * Copyright 2007 Wolfson Microelectronics PLC. + * Copyright 2008-2009 Freescale Semiconductor Inc. + * + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "iomux.h" + +/* CPU */ +static struct regulator_consumer_supply dcdc1_consumers[] = { + { + .supply = "cpu_vcc", + } +}; + +static struct regulator_consumer_supply dcdc3_consumers[] = { + { + .supply = "AVDD", + .dev_name = "1-001a", + }, + { + .supply = "HPVDD", + .dev_name = "1-001a", + }, +}; + +static struct regulator_init_data dcdc1_data = { + .constraints = { + .name = "DCDC1", + .min_uV = 850000, + .max_uV = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_FAST, + .state_mem = { + .uV = 1050000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + .initial_state = PM_SUSPEND_MEM, + .always_on = 1, + .boot_on = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(dcdc1_consumers), + .consumer_supplies = dcdc1_consumers, +}; + +/* MX37 LP */ +static struct regulator_init_data dcdc4_data = { + .constraints = { + .name = "DCDC4", + .min_uV = 1000000, + .max_uV = 1250000, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | + REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_NORMAL | + REGULATOR_MODE_FAST, + .state_mem = { + .uV = 1250000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + .initial_state = PM_SUSPEND_MEM, + .always_on = 1, + .boot_on = 1, + }, +}; + +/* DDR RAM */ +static struct regulator_init_data dcdc6_data = { + .constraints = { + .name = "DCDC6", + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .state_mem = { + .uV = 1800000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + .state_disk = { + .mode = REGULATOR_MODE_NORMAL, + .enabled = 0, + }, + .always_on = 1, + .boot_on = 1, + .initial_state = PM_SUSPEND_MEM, + }, +}; + +static struct regulator_init_data dcdc3_data = { + .constraints = { + .name = "DCDC3", + .min_uV = 3300000, + .max_uV = 3300000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .apply_uV = 1, + }, + .num_consumer_supplies = ARRAY_SIZE(dcdc3_consumers), + .consumer_supplies = dcdc3_consumers, +}; + +static struct regulator_init_data ldo1_data = { + .constraints = { + .name = "LDO1", + .min_uV = 2800000, + .max_uV = 2800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + }, +}; + +static struct regulator_init_data ldo2_data = { + .constraints = { + .name = "LDO2", + .min_uV = 2500000, + .max_uV = 2500000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + }, +}; + +static struct regulator_init_data ldo3_data = { + .constraints = { + .name = "LDO3", + .min_uV = 1200000, + .max_uV = 1200000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + }, +}; + +static struct regulator_init_data ldo4_data = { + .constraints = { + .name = "LDO4", + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .apply_uV = 1, + .always_on = 1, + .boot_on = 1, + }, +}; + +static struct regulator_init_data isinka_data = { + .constraints = { + .name = "ISINKA", + .min_uA = 0, + .max_uA = 225000, + .valid_ops_mask = REGULATOR_CHANGE_CURRENT, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + }, +}; + +static struct regulator_init_data dcdc5_data = { + .constraints = { + .name = "DCDC5", + .min_uV = 0, + .max_uV = 5000000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + }, +}; + +static struct regulator_init_data dcdc2_data = { + .constraints = { + .name = "DCDC2", + .min_uV = 0, + .max_uV = 5000000, + .valid_modes_mask = REGULATOR_MODE_NORMAL, + }, +}; + +static void wm8350_nop_release(struct device *dev) +{ + /* Nothing */ +} + +static int wm8350_check_fb(struct fb_info *info) +{ + return (to_platform_device(info->device)->id == 0); +} + +struct wm8350_bl_platform_data wm8350_bl_data = { + .isink = WM8350_ISINK_A, + .dcdc = WM8350_DCDC_5, + .voltage_ramp = WM8350_DC5_RMP_20V, + .retries = 5, + .max_brightness = 63, + .power = FB_BLANK_UNBLANK, + .brightness = 50, + .check_fb = wm8350_check_fb, +}; + +static struct platform_device mxc_wm8350_devices[] = { + { + .name = "wm8350-bl", + .id = 2, + .dev = { + .release = wm8350_nop_release, + .platform_data = &wm8350_bl_data, + }, + }, +}; + +static struct wm8350_audio_platform_data imx_3stack_wm8350_setup = { + .vmid_discharge_msecs = 1000, + .drain_msecs = 30, + .cap_discharge_msecs = 700, + .vmid_charge_msecs = 700, + .vmid_s_curve = WM8350_S_CURVE_SLOW, + .dis_out4 = WM8350_DISCHARGE_SLOW, + .dis_out3 = WM8350_DISCHARGE_SLOW, + .dis_out2 = WM8350_DISCHARGE_SLOW, + .dis_out1 = WM8350_DISCHARGE_SLOW, + .vroi_out4 = WM8350_TIE_OFF_500R, + .vroi_out3 = WM8350_TIE_OFF_500R, + .vroi_out2 = WM8350_TIE_OFF_500R, + .vroi_out1 = WM8350_TIE_OFF_500R, + .vroi_enable = 0, + .codec_current_on = WM8350_CODEC_ISEL_1_0, + .codec_current_standby = WM8350_CODEC_ISEL_0_5, + .codec_current_charge = WM8350_CODEC_ISEL_1_5, +}; + +struct mxc_audio_platform_data imx_3stack_audio_platform_data = { + .ssi_num = 2, + .src_port = 2, + .ext_port = 5, +}; + +static struct platform_device *imx_snd_device; + +static int mx37_wm8350_init(struct wm8350 *wm8350) +{ + int i, ret; + + for (i = 0; i < ARRAY_SIZE(mxc_wm8350_devices); i++) { + if (platform_device_register(&mxc_wm8350_devices[i]) < 0) + dev_err(&mxc_wm8350_devices[i].dev, + "Unable to register WM8350 device\n"); + } + + wm8350->pmic.isink_A_dcdc = WM8350_DCDC_5; + + /*Note: Needs to be moved into a regulator function. */ + /* Configuring -- GPIO 7 pin */ + if (wm8350_gpio_config(wm8350, 7, WM8350_GPIO_DIR_OUT, 0, + WM8350_GPIO_ACTIVE_LOW, WM8350_GPIO_PULL_NONE, + WM8350_GPIO_INVERT_OFF, + WM8350_GPIO_DEBOUNCE_OFF) == 0) + wm8350_set_bits(wm8350, WM8350_GPIO_PIN_STATUS, 1 << 7); + else + printk(KERN_ERR "Error in setting Wolfson GPIO pin 7 \n"); + /* enable gpio4:USB_VBUS_EN */ + ret = + wm8350_gpio_config(wm8350, 4, WM8350_GPIO_DIR_IN, + WM8350_GPIO4_MR_IN, WM8350_GPIO_ACTIVE_HIGH, + WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, + WM8350_GPIO_DEBOUNCE_OFF); + if (ret) + printk(KERN_ERR "Error in setting USB VBUS enable pin\n"); + + wm8350_register_regulator(wm8350, WM8350_DCDC_1, &dcdc1_data); + wm8350_register_regulator(wm8350, WM8350_DCDC_2, &dcdc2_data); + wm8350_register_regulator(wm8350, WM8350_DCDC_3, &dcdc3_data); + wm8350_register_regulator(wm8350, WM8350_DCDC_4, &dcdc4_data); + wm8350_register_regulator(wm8350, WM8350_DCDC_5, &dcdc5_data); + wm8350_register_regulator(wm8350, WM8350_DCDC_6, &dcdc6_data); + wm8350_register_regulator(wm8350, WM8350_LDO_1, &ldo1_data); + wm8350_register_regulator(wm8350, WM8350_LDO_2, &ldo2_data); + wm8350_register_regulator(wm8350, WM8350_LDO_3, &ldo3_data); + wm8350_register_regulator(wm8350, WM8350_LDO_4, &ldo4_data); + wm8350_register_regulator(wm8350, WM8350_ISINK_A, &isinka_data); + + /* register sound */ + pr_info("Registering imx37_snd_device"); + wm8350->codec.platform_data = &imx_3stack_wm8350_setup; + + imx_snd_device = platform_device_alloc("wm8350-imx-3stack-audio", -1); + if (!imx_snd_device) { + ret = -ENOMEM; + goto err; + } + imx_3stack_audio_platform_data.priv = wm8350; + + imx_snd_device->dev.platform_data = &imx_3stack_audio_platform_data; + ret = platform_device_add(imx_snd_device); + if (ret) + goto snd_err; + + return 0; + +snd_err: + platform_device_put(imx_snd_device); + +err: + kfree(wm8350->reg_cache); + return ret; +} + +struct wm8350_platform_data __initdata mx37_wm8350_pdata = { + .init = mx37_wm8350_init, +}; + +static struct i2c_board_info __initdata wm8350_i2c_device = { + I2C_BOARD_INFO("wm8350", 0x1a), + .platform_data = &mx37_wm8350_pdata, + .irq = IOMUX_TO_IRQ(MX37_PIN_GPIO1_4), +}; + +static __init int mxc_init_i2c(void) +{ + i2c_register_board_info(1, &wm8350_i2c_device, 1); + return 0; +} + +subsys_initcall(mxc_init_i2c); + +static __init int wm8350_regulator_init(void) +{ + int i = 0; + int ret = 0; + struct regulator *regulator; + char *wm8350_global_regulator[] = { + "DCDC1", + "DCDC3", + "DCDC4", + "DCDC6", + "LDO3", + }; + + /* for board v2.0 later, do nothing here */ + if (board_is_rev(BOARD_REV_2)) + return 0; + while ((i < ARRAY_SIZE(wm8350_global_regulator)) && + !IS_ERR_VALUE( + (unsigned long)(regulator = + regulator_get(NULL, + wm8350_global_regulator + [i])))) { + regulator_enable(regulator); + if (strcmp(wm8350_global_regulator[i], "DCDC4") == 0) + ret = + regulator_set_voltage(regulator, 1250000, 1250000); + else if (strcmp(wm8350_global_regulator[i], "DCDC1") == 0) { + ret = + regulator_set_voltage(regulator, 1050000, 1050000); + regulator_set_mode(regulator, REGULATOR_MODE_FAST); + } + i++; + } + return ret; +} + +late_initcall(wm8350_regulator_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/dptc.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/dptc.c @@ -0,0 +1,69 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file dptc_gp.c + * + * @brief DPTC table for the Freescale Semiconductor MXC DPTC module. + * + * @ingroup PM + */ + +#include +#include + +struct dptc_wp dptc_gp_wp_allfreq[DPTC_GP_WP_SUPPORTED] = { + /* 532MHz */ + /* dcvr0 dcvr1 dcvr2 + dcvr3 voltage */ + /* wp0 */ + {DCVR(107, 108, 112), DCVR(122, 123, 127), DCVR(133, 134, 139), + DCVR(115, 116, 121), 1000}, + {DCVR(107, 108, 113), DCVR(122, 123, 127), DCVR(133, 134, 139), + DCVR(115, 117, 122), 975}, + {DCVR(107, 109, 113), DCVR(122, 123, 127), DCVR(133, 134, 139), + DCVR(115, 117, 122), 950}, + {DCVR(107, 109, 114), DCVR(122, 123, 127), DCVR(133, 135, 140), + DCVR(115, 117, 122), 925}, + {DCVR(108, 109, 115), DCVR(122, 123, 127), DCVR(133, 136, 142), + DCVR(115, 117, 123), 900}, + {DCVR(108, 110, 115), DCVR(122, 123, 127), DCVR(133, 136, 142), + DCVR(115, 117, 123), 875}, + {DCVR(108, 110, 115), DCVR(122, 124, 128), DCVR(133, 136, 143), + DCVR(115, 118, 124), 850}, +}; + +struct dptc_wp dptc_lp_wp_allfreq[DPTC_LP_WP_SUPPORTED] = { + /* 532MHz */ + /* dcvr0 dcvr1 dcvr2 + dcvr3 regulator voltage */ + /* wp0 */ + {DCVR(141, 143, 149), DCVR(155, 157, 162), DCVR(106, 108, 112), + DCVR(124, 126, 130), 1200}, + {DCVR(141, 143, 149), DCVR(155, 157, 162), DCVR(106, 108, 113), + DCVR(124, 126, 131), 1175}, + {DCVR(141, 144, 150), DCVR(155, 157, 163), DCVR(106, 108, 113), + DCVR(124, 126, 131), 1150}, + {DCVR(141, 144, 151), DCVR(155, 157, 163), DCVR(106, 108, 114), + DCVR(124, 126, 131), 1125}, + {DCVR(142, 144, 152), DCVR(155, 157, 163), DCVR(107, 109, 114), + DCVR(125, 127, 132), 1100}, + {DCVR(142, 145, 153), DCVR(155, 157, 164), DCVR(107, 109, 115), + DCVR(125, 127, 133), 1075}, + {DCVR(142, 145, 153), DCVR(155, 158, 164), DCVR(107, 109, 116), + DCVR(125, 127, 133), 1050}, + {DCVR(142, 145, 154), DCVR(155, 158, 165), DCVR(107, 110, 117), + DCVR(125, 127, 134), 1025}, + {DCVR(142, 146, 156), DCVR(155, 158, 165), DCVR(107, 110, 117), + DCVR(125, 128, 135), 1000}, +}; --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/Kconfig +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/Kconfig @@ -0,0 +1,90 @@ +menu "MX37 Options" + depends on ARCH_MX37 + +config MX37_OPTIONS + bool + default y + select CPU_V6 + select ARM_ERRATA_411920 + select CACHE_L2X0 + select OUTER_CACHE + select USB_ARCH_HAS_EHCI + select ARCH_HAS_EVTMON + select MXC_TZIC + select ARCH_HAS_RNGC + +config MACH_MX37_3DS + bool "Support MX37 3-Stack platforms" + default y + select MFD_WM8350_CONFIG_MODE_0 + help + Include support for MX37 3-Stack platform. This includes specific + configurations for the board and its peripherals. + +config MXC_SDMA_API + bool "Use SDMA API" + default y + help + This selects the Freescale MXC SDMA API. + If unsure, say N. + +menu "SDMA options" + depends on MXC_SDMA_API + +config SDMA_IRAM + bool "Use Internal RAM for SDMA transfer" + default n + help + Support Internal RAM as SDMA buffer or control structures + +config SDMA_IRAM_SIZE + hex "Reserved bytes of IRAM for SDMA (0x800-0x1000)" + range 0x800 0x1000 + depends on SDMA_IRAM + default "0x1000" + help + Set the size of IRAM for SDMA. It must be a multiple of 512bytes. +endmenu + +config ARCH_MXC_HAS_NFC_V3 + bool "MXC NFC Hardware Version 3" + depends on ARCH_MX37 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 3 + If unsure, say N. + +config ARCH_MXC_HAS_NFC_V3_1 + bool "MXC NFC Hardware Version 3.1" + depends on ARCH_MXC_HAS_NFC_V3 + default y + help + This selects the Freescale MXC Nand Flash Controller Hardware Version 3.1 + If unsure, say N. + +menu "Device options" + +config I2C_MXC_SELECT1 + bool "Enable I2C1 module" + default y + depends on I2C_MXC + help + Enable MX37 I2C1 module. + +config I2C_MXC_SELECT2 + bool "Enable I2C2 module" + default n + depends on I2C_MXC + help + Enable MX37 I2C2 module. + +config I2C_MXC_SELECT3 + bool "Enable I2C3 module" + default n + depends on I2C_MXC + help + Enable MX37 I2C3 module. + +endmenu + +endmenu --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mx37_3stack_gpio.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mx37_3stack_gpio.c @@ -0,0 +1,1029 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "iomux.h" + +/*! + * @file mx37_3stack_gpio.c + * + * @brief This file contains all the GPIO setup functions for the board. + * + * @ingroup GPIO + */ + +void gpio_activate_audio_ports(void); + +/*! + * Setup GPIO for a UART port to be active + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_active(int port, int no_irda) +{ + /* + * Configure the IOMUX control registers for the UART signals + * and enable the UART transceivers + */ + switch (port) { + /* UART 1 IOMUX Configs */ + case 0: + mxc_request_iomux(MX37_PIN_UART1_RXD, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_UART1_RXD, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_iomux_set_input(MUX_IN_UART1_UART_RXD_MUX, INPUT_CTL_PATH4); + mxc_request_iomux(MX37_PIN_UART1_TXD, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_UART1_TXD, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_request_iomux(MX37_PIN_UART1_RTS, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_UART1_RTS, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_input(MUX_IN_UART1_UART_RTS_B, INPUT_CTL_PATH4); + mxc_request_iomux(MX37_PIN_UART1_CTS, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_UART1_CTS, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + break; + case 1: + mxc_request_iomux(MX37_PIN_UART1_DCD, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_UART1_DCD, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_iomux_set_input(MUX_IN_UART2_UART_RXD_MUX, INPUT_CTL_PATH1); + mxc_request_iomux(MX37_PIN_UART1_RI, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_UART1_RI, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_request_iomux(MX37_PIN_UART1_DSR, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_UART1_DSR, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_input(MUX_IN_UART2_UART_RTS_B, INPUT_CTL_PATH1); + mxc_request_iomux(MX37_PIN_UART1_DTR, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_UART1_DTR, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + break; + case 2: + mxc_request_iomux(MX37_PIN_AUD3_BB_TXD, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_AUD3_BB_TXD, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_iomux_set_input(MUX_IN_UART3_UART_RXD_MUX, INPUT_CTL_PATH0); + mxc_request_iomux(MX37_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_AUD3_BB_RXD, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST); + mxc_request_iomux(MX37_PIN_AUD3_BB_CK, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_AUD3_BB_CK, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_input(MUX_IN_UART3_UART_RTS_B, INPUT_CTL_PATH0); + mxc_request_iomux(MX37_PIN_AUD3_BB_FS, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_AUD3_BB_FS, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH); + break; + default: + break; + } +} + +/*! + * Setup GPIO for a UART port to be inactive + * + * @param port a UART port + * @param no_irda indicates if the port is used for SIR + */ +void gpio_uart_inactive(int port, int no_irda) +{ + /* + * Configure the IOMUX control registers for the UART signals + * and disable the UART transceivers + */ + switch (port) { + case 0: + mxc_request_iomux(MX37_PIN_UART1_RXD, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_TXD, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_RTS, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_CTS, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_RXD, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_TXD, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_RTS, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_CTS, IOMUX_CONFIG_GPIO); + break; + case 1: + mxc_request_iomux(MX37_PIN_UART1_DCD, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_RI, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_DSR, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_UART1_DTR, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_DCD, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_RI, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_DSR, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_UART1_DTR, IOMUX_CONFIG_GPIO); + break; + /* UART 3 IOMUX Configs */ + case 2: + mxc_request_iomux(MX37_PIN_AUD3_BB_TXD, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_AUD3_BB_TXD, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_AUD3_BB_RXD, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_AUD3_BB_RXD, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_AUD3_BB_CK, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_AUD3_BB_CK, IOMUX_CONFIG_GPIO); + mxc_request_iomux(MX37_PIN_AUD3_BB_FS, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_AUD3_BB_FS, IOMUX_CONFIG_GPIO); + break; + default: + break; + } +} + +/*! + * Configure the IOMUX GPR register to receive shared SDMA UART events + * + * @param port a UART port + */ +void config_uartdma_event(int port) +{ + +} + +EXPORT_SYMBOL(gpio_uart_active); +EXPORT_SYMBOL(gpio_uart_inactive); +EXPORT_SYMBOL(config_uartdma_event); + +/*! + * Setup GPIO for a CSPI device to be active + * + * @param cspi_mod an CSPI device + */ +void gpio_spi_active(int cspi_mod) +{ + switch (cspi_mod) { + case 0: + break; + case 1: + /* SPI2 */ + mxc_request_iomux(MX37_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_CSPI2_MISO, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_GRP_H9, PAD_CTL_HYS_ENABLE); + + mxc_request_iomux(MX37_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_CSPI2_MOSI, PAD_CTL_SRE_FAST); + + mxc_request_iomux(MX37_PIN_UART1_CTS, IOMUX_CONFIG_ALT3); + mxc_iomux_set_pad(MX37_PIN_UART1_CTS, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE); + + mxc_request_iomux(MX37_PIN_CSPI2_SCLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_CSPI2_SCLK, PAD_CTL_HYS_ENABLE | + PAD_CTL_SRE_FAST); + + mxc_request_iomux(MX37_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_CSPI2_SS1, PAD_CTL_SRE_FAST); + + mxc_request_iomux(MX37_PIN_CSPI2_SS0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_CSPI2_SS0, PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_GRP_H10, PAD_CTL_HYS_ENABLE); + break; + case 2: + break; + default: + break; + } +} + +/*! + * Setup GPIO for a CSPI device to be inactive + * + * @param cspi_mod a CSPI device + */ +void gpio_spi_inactive(int cspi_mod) +{ +} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_active(void) +{ + /*TODO*/} + +/*! + * Setup 1-Wire to be active + */ +void gpio_owire_inactive(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_owire_active); +EXPORT_SYMBOL(gpio_owire_inactive); + +/*! + * Setup GPIO for an I2C device to be active + * + * @param i2c_num an I2C device + */ +void gpio_i2c_active(int i2c_num) +{ + iomux_pad_config_t regval = 0; + + switch (i2c_num) { + case 0: + /* Touch */ + /* select I2C1_SCK as daisy chain input */ + mxc_request_iomux(MX37_PIN_I2C1_CLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_input(MUX_IN_I2C1_SCL, INPUT_CTL_PATH1); + /* OpenDrain enabled, 100k PU enabled */ + regval = + PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_PKE_ENABLE; + mxc_iomux_set_pad(MX37_PIN_I2C1_CLK, regval); + + /*select I2C1_SDA as daisy chain input */ + mxc_request_iomux(MX37_PIN_I2C1_DAT, IOMUX_CONFIG_ALT0); + mxc_iomux_set_input(MUX_IN_I2C1_SDA, INPUT_CTL_PATH1); + mxc_iomux_set_pad(MX37_PIN_I2C1_DAT, regval); + mxc_iomux_set_pad(MX37_PIN_GRP_H3, PAD_CTL_HYS_ENABLE); + break; + case 1: + /* PMIC */ + /*select I2C2_SCL as daisy chain input */ + mxc_iomux_set_input(MUX_IN_I2C2_SCL, INPUT_CTL_PATH1); + regval = PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PULL | PAD_CTL_100K_PU | + PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_DRV_HIGH; + mxc_iomux_set_pad(MX37_PIN_GPIO1_0, regval); + mxc_request_iomux(MX37_PIN_GPIO1_0, + (IOMUX_CONFIG_SION | IOMUX_CONFIG_ALT2)); + + /*select I2C2_SDA as daisy chain input */ + mxc_iomux_set_input(MUX_IN_I2C2_SDA, INPUT_CTL_PATH1); + mxc_iomux_set_pad(MX37_PIN_GPIO1_1, regval); + mxc_request_iomux(MX37_PIN_GPIO1_1, + (IOMUX_CONFIG_SION | IOMUX_CONFIG_ALT2)); + break; + case 2: + break; + default: + break; + } +} + +/*! + * Setup GPIO for an I2C device to be inactive + * + * @param i2c_num an I2C device + */ +void gpio_i2c_inactive(int i2c_num) +{ + /*TODO*/} + +/*! + * This function activates DAM ports 4 & 5 to enable + * audio I/O. + */ +void gpio_activate_audio_ports(void) +{ + unsigned int pad_val; + + /* AUD4_TXD */ + mxc_request_iomux(MX37_PIN_DISP1_DAT20, IOMUX_CONFIG_ALT5); + /* AUD4_RXD */ + mxc_request_iomux(MX37_PIN_DISP1_DAT21, IOMUX_CONFIG_ALT5); + /* AUD4_TXC */ + mxc_request_iomux(MX37_PIN_DISP1_DAT22, IOMUX_CONFIG_ALT5); + /* AUD4_TXFS */ + mxc_request_iomux(MX37_PIN_DISP1_DAT23, IOMUX_CONFIG_ALT5); + + pad_val = PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST; + mxc_iomux_set_pad(MX37_PIN_AUD5_WB_CK, PAD_CTL_100K_PU | pad_val); + mxc_request_iomux(MX37_PIN_AUD5_WB_CK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_AUD5_WB_RXD, pad_val); + mxc_request_iomux(MX37_PIN_AUD5_WB_RXD, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_AUD5_WB_TXD, pad_val); + mxc_request_iomux(MX37_PIN_AUD5_WB_TXD, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_AUD5_WB_FS, PAD_CTL_100K_PU | pad_val); + mxc_request_iomux(MX37_PIN_AUD5_WB_FS, IOMUX_CONFIG_ALT0); + + /* Enable hysteresis for AUD5_WB_CK, AUD5_WB_RXD, AUD5_WB_TXD, AUD5_WB_FS */ + mxc_iomux_set_pad(MX37_PIN_GRP_H5, PAD_CTL_HYS_ENABLE); +} + +EXPORT_SYMBOL(gpio_activate_audio_ports); + +/*! + * Setup GPIO for SDHC to be active + * + * @param module SDHC module number + */ +void gpio_sdhc_active(int module) +{ + switch (module) { + case 0: + mxc_request_iomux(MX37_PIN_SD1_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD1_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD1_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD1_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD1_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD1_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_iomux_set_pad(MX37_PIN_SD1_CMD, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD1_CLK, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA0, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA1, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA2, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA3, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + + /* Write Protected Pin */ + mxc_request_iomux(MX37_PIN_CSPI1_SS0, + IOMUX_CONFIG_SION | IOMUX_CONFIG_ALT4); + mxc_iomux_set_pad(MX37_PIN_CSPI1_SS0, + PAD_CTL_DRV_HIGH | PAD_CTL_HYS_NONE | + PAD_CTL_SRE_FAST); + /* + * SW workaround for the eSDHC1 Write Protected feature + * The PSR of CSPI1_SS0 (GPIO3_2) should be read. + */ + gpio_request(IOMUX_TO_GPIO(MX37_PIN_CSPI1_SS0), "cspi1_ss0"); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_CSPI1_SS0), 0); + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_CSPI1_SS0), 1); + break; + case 1: + mxc_request_iomux(MX37_PIN_SD2_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD2_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD2_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD2_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD2_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_request_iomux(MX37_PIN_SD2_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_iomux_set_pad(MX37_PIN_SD2_CMD, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD2_CLK, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA0, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA1, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA2, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA3, + PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_PUE_PULL | + PAD_CTL_47K_PU | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_active); + +/*! + * Setup GPIO for SDHC1 to be inactive + * + * @param module SDHC module number + */ +void gpio_sdhc_inactive(int module) +{ + switch (module) { + case 0: + mxc_free_iomux(MX37_PIN_SD1_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD1_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD1_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD1_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD1_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD1_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_iomux_set_pad(MX37_PIN_SD1_CLK, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD1_CMD, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA0, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA1, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA2, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD1_DATA3, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + + /* Free Write Protected Pin */ + mxc_free_iomux(MX37_PIN_CSPI1_SS0, + IOMUX_CONFIG_SION | IOMUX_CONFIG_ALT4); + mxc_iomux_set_pad(MX37_PIN_CSPI1_SS0, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + break; + case 1: + mxc_free_iomux(MX37_PIN_SD2_CLK, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD2_CMD, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD2_DATA0, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD2_DATA1, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD2_DATA2, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + mxc_free_iomux(MX37_PIN_SD2_DATA3, + IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); + + mxc_iomux_set_pad(MX37_PIN_SD2_CLK, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD2_CMD, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA0, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA1, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA2, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA3, + (PAD_CTL_DRV_LOW | PAD_CTL_SRE_SLOW)); + break; + default: + break; + } +} + +EXPORT_SYMBOL(gpio_sdhc_inactive); + +/* + * Probe for the card. If present the GPIO data would be set. + */ +int sdhc_get_card_det_status(struct device *dev) +{ + int ret; + u32 gpio = IOMUX_TO_GPIO(MX37_PIN_OWIRE_LINE); + + if (to_platform_device(dev)->id == 0) { + if (board_is_rev(BOARD_REV_2)) + ret = gpio_get_value(IOMUX_TO_GPIO(MX37_PIN_GPIO1_4)); + else + ret = gpio_get_value(gpio); + return ret; + } else { /* config the det pin for SDHC2 */ + return 0; + } +} + +EXPORT_SYMBOL(sdhc_get_card_det_status); + +/* + * Return the card detect pin. + */ +int sdhc_init_card_det(int id) +{ + u32 gpio; + + if (id == 0) { + if (board_is_rev(BOARD_REV_2)) { + gpio = IOMUX_TO_GPIO(MX37_PIN_GPIO1_4); + mxc_request_iomux(MX37_PIN_GPIO1_4, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX37_PIN_GPIO1_4, + PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_NONE | PAD_CTL_SRE_FAST); + gpio_request(gpio, "gpio1_4"); + gpio_direction_input(gpio); + return IOMUX_TO_IRQ(MX37_PIN_GPIO1_4); + } else { + gpio = IOMUX_TO_GPIO(MX37_PIN_OWIRE_LINE); + mxc_request_iomux(MX37_PIN_OWIRE_LINE, + IOMUX_CONFIG_ALT4); + mxc_iomux_set_pad(MX37_PIN_OWIRE_LINE, + PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_NONE | PAD_CTL_SRE_FAST); + gpio_request(gpio, "owire_line"); + gpio_direction_input(gpio); + return IOMUX_TO_IRQ(MX37_PIN_OWIRE_LINE); + } + } else { /* config the det pin for SDHC2 */ + return 0; + + } +} + +EXPORT_SYMBOL(sdhc_init_card_det); + +/*! + * Get CSPI1_SS0 pin value to detect write protection + */ +int sdhc_write_protect(struct device *dev) +{ + unsigned short rc = 0; + + rc = gpio_get_value(IOMUX_TO_GPIO(MX37_PIN_CSPI1_SS0)); + if (rc > 0) + return 1; + else + return 0; +} + +EXPORT_SYMBOL(sdhc_write_protect); + +/*! + * Setup GPIO for LCD to be active + * + */ +void gpio_lcd_active(void) +{ + mxc_request_iomux(MX37_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_PAD_DI1_PIN3, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_DISP_CLK, IOMUX_CONFIG_ALT0); +} + +/*! + * Setup GPIO for LCD to be inactive + * + */ +void gpio_lcd_inactive(void) +{ + /*TODO*/} + +/*! + * Setup pins for SLCD to be active + * + */ +void slcd_gpio_config(void) +{ + /*TODO*/} + +/*! + * Switch to the specified sensor - MX33 ADS has two + * + */ +void gpio_sensor_select(int sensor) +{ + /*TODO*/} + +/*! + * Setup GPIO for sensor to be active + * + */ +void gpio_sensor_active(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_sensor_active); + +/*! + * Setup GPIO for sensor to be inactive + * + */ +void gpio_sensor_inactive(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_sensor_inactive); + +/*! + * Setup GPIO for ATA interface + * + */ +void gpio_ata_active(void) +{ + /*IOMUX Settings */ + /*PATA_DMARQ_B */ + mxc_request_iomux(MX37_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT1); + /*PATA_DIOR */ + mxc_request_iomux(MX37_PIN_NANDF_ALE, IOMUX_CONFIG_ALT1); + /*PATA_DIOW */ + mxc_request_iomux(MX37_PIN_NANDF_CLE, IOMUX_CONFIG_ALT1); + /*PATA_DMACK */ + mxc_request_iomux(MX37_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT1); + /*PATA_RESET_B */ + mxc_request_iomux(MX37_PIN_NANDF_RB, IOMUX_CONFIG_ALT1); + /*PATA_IORDY */ + mxc_request_iomux(MX37_PIN_NANDF_CS0, IOMUX_CONFIG_ALT1); + /*PATA_INTRQ_B */ + mxc_request_iomux(MX37_PIN_NANDF_CS1, IOMUX_CONFIG_ALT1); + /*PATA_CS_0 */ + mxc_request_iomux(MX37_PIN_NANDF_CS2, IOMUX_CONFIG_ALT1); + /*PATA_CS_1 */ + mxc_request_iomux(MX37_PIN_NANDF_CS3, IOMUX_CONFIG_ALT1); + + /*PATA_D0 */ + mxc_request_iomux(MX37_PIN_EIM_D0, IOMUX_CONFIG_ALT1); + /*PATA_D1 */ + mxc_request_iomux(MX37_PIN_EIM_D1, IOMUX_CONFIG_ALT1); + /*PATA_D2 */ + mxc_request_iomux(MX37_PIN_EIM_D2, IOMUX_CONFIG_ALT1); + /*PATA_D3 */ + mxc_request_iomux(MX37_PIN_EIM_D3, IOMUX_CONFIG_ALT1); + /*PATA_D4 */ + mxc_request_iomux(MX37_PIN_EIM_D4, IOMUX_CONFIG_ALT1); + /*PATA_D5 */ + mxc_request_iomux(MX37_PIN_EIM_D5, IOMUX_CONFIG_ALT1); + /*PATA_D6 */ + mxc_request_iomux(MX37_PIN_EIM_D6, IOMUX_CONFIG_ALT1); + /*PATA_D7 */ + mxc_request_iomux(MX37_PIN_EIM_D7, IOMUX_CONFIG_ALT1); + /*PATA_D8 */ + mxc_request_iomux(MX37_PIN_EIM_D8, IOMUX_CONFIG_ALT1); + /*PATA_D9 */ + mxc_request_iomux(MX37_PIN_EIM_D9, IOMUX_CONFIG_ALT1); + /*PATA_D10 */ + mxc_request_iomux(MX37_PIN_EIM_D10, IOMUX_CONFIG_ALT1); + /*PATA_D11 */ + mxc_request_iomux(MX37_PIN_EIM_D11, IOMUX_CONFIG_ALT1); + /*PATA_D12 */ + mxc_request_iomux(MX37_PIN_EIM_D12, IOMUX_CONFIG_ALT1); + /*PATA_D13 */ + mxc_request_iomux(MX37_PIN_EIM_D13, IOMUX_CONFIG_ALT1); + /*PATA_D14 */ + mxc_request_iomux(MX37_PIN_EIM_D14, IOMUX_CONFIG_ALT1); + /*PATA_D15 */ + mxc_request_iomux(MX37_PIN_EIM_D15, IOMUX_CONFIG_ALT1); + /*PATA_DA0 */ + mxc_request_iomux(MX37_PIN_SD2_DATA3, IOMUX_CONFIG_ALT1); + /*PATA_DA1 */ + mxc_request_iomux(MX37_PIN_SD2_DATA2, IOMUX_CONFIG_ALT1); + /*PATA_DA2 */ + mxc_request_iomux(MX37_PIN_SD2_DATA1, IOMUX_CONFIG_ALT1); + + /* BUFFER_ENABLE - HDD_ENABLE_B */ + mxc_request_iomux(MX37_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT1); + + /* IOMUX Pad Settings */ + mxc_iomux_set_pad(MX37_PIN_EIM_D0, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D1, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D2, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D3, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D4, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D5, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D6, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D7, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D8, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D9, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D10, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D11, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D12, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D13, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D14, 0xc0); + mxc_iomux_set_pad(MX37_PIN_EIM_D15, 0xc0); + + mxc_iomux_set_pad(MX37_PIN_NANDF_RE_B, 0x0080); + mxc_iomux_set_pad(MX37_PIN_NANDF_CS1, 0x0020); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA3, 0x00); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA2, 0x00); + mxc_iomux_set_pad(MX37_PIN_SD2_DATA1, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_ALE, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_CS2, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_CS3, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_WE_B, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_CLE, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_WP_B, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_RB, 0x00); + mxc_iomux_set_pad(MX37_PIN_NANDF_CS0, 0x0020); + +} + +EXPORT_SYMBOL(gpio_ata_active); + +/*! + * Restore ATA interface pins to reset values + * + */ +void gpio_ata_inactive(void) +{ + /*Turn off the IOMUX for ATA group B signals */ + mxc_request_iomux(MX37_PIN_EIM_D0, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D1, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D2, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D3, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D4, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D5, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D6, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D7, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D8, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D9, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D10, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D11, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D12, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D13, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D14, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_EIM_D15, IOMUX_CONFIG_ALT0); + + /* Config the multiplex pin of ATA interface DIR, DA0-2, INTRQ, DMARQ */ + mxc_request_iomux(MX37_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_SD2_DATA2, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_SD2_DATA1, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0); + + /* HDD_BUFF_EN (H:A->B, L:B->A) and HDD_ENABLE_B(H:Disable,L:Enable) */ + mxc_free_iomux(MX37_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0); + + /* These ATA pins are common to Group A and Group B */ + mxc_request_iomux(MX37_PIN_NANDF_CS2, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_CS3, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_RB, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX37_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0); + +} + +EXPORT_SYMBOL(gpio_ata_inactive); + +/*! + * Setup GPIO for Keypad to be active + * + */ +void gpio_keypad_active(void) +{ + int pad_val; + + /* + * Configure the IOMUX control register for keypad signals. + */ + /*KEY_INT */ + mxc_request_iomux(MX37_PIN_GPIO1_3, IOMUX_CONFIG_ALT0); + /*KEY_WAKE */ + mxc_request_iomux(MX37_PIN_DISP1_DAT18, IOMUX_CONFIG_ALT4); + + /* fast slew rate */ + pad_val = (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_22K_PU | \ + PAD_CTL_ODE_OPENDRAIN_ENABLE | PAD_CTL_HYS_NONE | \ + PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW); + /*KEY_INT */ + mxc_iomux_set_pad(MX37_PIN_GPIO1_3, pad_val); + + /* fast slew rate */ + pad_val = (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | \ + PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_HYS_NONE | \ + PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW); + /*KEY_WAKE */ + mxc_iomux_set_pad(MX37_PIN_DISP1_DAT18, pad_val); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_DISP1_DAT18), "disp1_dat18"); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_DISP1_DAT18), 0); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_GPIO1_3), "gpio1_3"); + gpio_direction_input(IOMUX_TO_GPIO(MX37_PIN_GPIO1_3)); + + /* drive initial value */ + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_DISP1_DAT18), 1); +} + +EXPORT_SYMBOL(gpio_keypad_active); + +/*! + * Setup GPIO for Keypad to be inactive + * + */ +void gpio_keypad_inactive(void) +{ + /*KEY_INT */ + mxc_request_iomux(MX37_PIN_GPIO1_3, IOMUX_CONFIG_ALT0); + /*KEY_WAKE */ + mxc_request_iomux(MX37_PIN_DISP1_DAT18, IOMUX_CONFIG_ALT0); +} + +EXPORT_SYMBOL(gpio_keypad_inactive); + +/* + * USB OTG HS port + */ +int gpio_usbotg_hs_active(void) +{ + /*TODO*/ return 0; +} + +EXPORT_SYMBOL(gpio_usbotg_hs_active); + +void gpio_usbotg_hs_inactive(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_usbotg_hs_inactive); + +/*! + * Setup GPIO for PCMCIA interface + * + */ +void gpio_pcmcia_active(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_pcmcia_active); + +/*! + * Setup GPIO for pcmcia to be inactive + */ +void gpio_pcmcia_inactive(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_pcmcia_inactive); + +/*! + * Setup GPIO for fec to be active + */ +void gpio_fec_active(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_fec_active); +/*! + * Setup GPIO for fec to be inactive + */ +void gpio_fec_inactive(void) +{ + /*TODO*/} + +EXPORT_SYMBOL(gpio_fec_inactive); + +void gpio_spdif_active(void) +{ + iomux_pad_config_t regval = 0; + regval = + PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | PAD_CTL_PKE_ENABLE | + PAD_CTL_100K_PU; + mxc_iomux_set_pad(MX37_PIN_AUD3_BB_RXD, regval); + mxc_request_iomux(MX37_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT1); +} + +EXPORT_SYMBOL(gpio_spdif_active); + +void gpio_spdif_inactive(void) +{ + mxc_free_iomux(MX37_PIN_AUD3_BB_RXD, IOMUX_CONFIG_ALT1); +} + +EXPORT_SYMBOL(gpio_spdif_inactive); + +void gpio_pmic_active(void) +{ + mxc_request_iomux(MX37_PIN_OWIRE_LINE, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX37_PIN_OWIRE_LINE, PAD_CTL_SRE_SLOW | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_DRV_MEDIUM | + PAD_CTL_100K_PU | + PAD_CTL_HYS_ENABLE | + PAD_CTL_DRV_VOT_HIGH | PAD_CTL_DDR_INPUT_CMOS); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_OWIRE_LINE), "owire_line"); + gpio_direction_input(IOMUX_TO_GPIO(MX37_PIN_OWIRE_LINE)); +} + +EXPORT_SYMBOL(gpio_pmic_active); + +void gpio_gps_active(void) +{ + /* PWR_EN */ + mxc_request_iomux(MX37_PIN_EIM_OE, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX37_PIN_EIM_OE, PAD_CTL_100K_PU | + PAD_CTL_DRV_HIGH | PAD_CTL_HYS_NONE | + PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_EIM_OE), "eim_oe"); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_EIM_OE), 0); + + /* RESET */ + mxc_request_iomux(MX37_PIN_EIM_BCLK, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX37_PIN_EIM_BCLK, PAD_CTL_DRV_HIGH | + PAD_CTL_HYS_NONE | PAD_CTL_ODE_OPENDRAIN_NONE | + PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_EIM_BCLK), "eim_bclk"); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_EIM_BCLK), 0); + + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_EIM_OE), 0); + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_EIM_BCLK), 0); + + msleep(5); + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_EIM_BCLK), 1); + + msleep(5); +} + +EXPORT_SYMBOL(gpio_gps_active); + +int gpio_gps_access(int para) +{ + iomux_pin_name_t pin; + pin = (para & 0x1) ? MX37_PIN_EIM_OE : MX37_PIN_EIM_BCLK; + + if (para & 0x4) + return gpio_get_value(IOMUX_TO_GPIO(pin)); + else if (para & 0x2) + gpio_set_value(IOMUX_TO_GPIO(pin), 1); + else + gpio_set_value(IOMUX_TO_GPIO(pin), 0); + + return 0; +} + +EXPORT_SYMBOL(gpio_gps_access); + +void gpio_gps_inactive(void) +{ + mxc_free_iomux(MX37_PIN_EIM_BCLK, IOMUX_CONFIG_GPIO); + mxc_free_iomux(MX37_PIN_EIM_OE, IOMUX_CONFIG_GPIO); +} + +EXPORT_SYMBOL(gpio_gps_inactive); + +int headphone_det_status(void) +{ + return gpio_get_value(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXFS)); +} + +EXPORT_SYMBOL(headphone_det_status); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/dma.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/dma.c @@ -0,0 +1,666 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include +#include +#include +#include + +#include "serial.h" + +#define MXC_MMC_BUFFER_ACCESS 0x20 +#define MXC_SDHC_MMC_WML 512 +#define MXC_SDHC_SD_WML 512 +#define MXC_SSI_TX0_REG 0x0 +#define MXC_SSI_TX1_REG 0x4 +#define MXC_SSI_RX0_REG 0x8 +#define MXC_SSI_RX1_REG 0xC +#define MXC_SSI_TXFIFO_WML 0x4 +#define MXC_SSI_RXFIFO_WML 0x6 +#define MXC_SPDIF_TXFIFO_WML 0x0 +#define MXC_SPDIF_TX_REG 0x2C + +typedef struct mxc_sdma_info_entry_s { + mxc_dma_device_t device; + mxc_sdma_channel_params_t *chnl_info; +} mxc_sdma_info_entry_t; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_rx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_RXTL, + .per_address = UART1_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART1_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart1_tx_params = { + .chnl_params = { + .watermark_level = UART1_UFCR_TXTL, + .per_address = UART1_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART1_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART1_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_rx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_RXTL, + .per_address = UART2_BASE_ADDR, + .peripheral_type = UART, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART2_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart2_tx_params = { + .chnl_params = { + .watermark_level = UART2_UFCR_TXTL, + .per_address = UART2_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART2_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART2_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_rx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_RXTL, + .per_address = UART3_BASE_ADDR, + .peripheral_type = UART_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_UART3_RX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_uart3_tx_params = { + .chnl_params = { + .watermark_level = UART3_UFCR_TXTL, + .per_address = UART3_BASE_ADDR + MXC_UARTUTXD, + .peripheral_type = UART_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_UART3_TX, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_UART3_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc1_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML, + .per_address = + MMC_SDHC1_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC1, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width1_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_MMC_WML / 32, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_mmc2_width4_params = { + .chnl_params = { + .watermark_level = MXC_SDHC_SD_WML / 8, + .per_address = + MMC_SDHC2_BASE_ADDR + MXC_MMC_BUFFER_ACCESS, + .peripheral_type = MMC, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SDHC2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MMC2, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI1_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi1_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI1_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI1_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI1_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx0_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX0_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX1, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_8bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_8BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_16bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_rx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_RXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_RX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_SSI2_RX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_RX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ssi2_24bit_tx1_params = { + .chnl_params = { + .watermark_level = MXC_SSI_TXFIFO_WML, + .per_address = SSI2_BASE_ADDR + MXC_SSI_TX1_REG, + .peripheral_type = SSI_SP, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SSI2_TX2, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SSI2_TX, + .chnl_priority = 2, +}; + +static mxc_sdma_channel_params_t mxc_sdma_memory_params = { + .chnl_params = { + .peripheral_type = MEMORY, + .transfer_type = emi_2_emi, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_MEMORY, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_rx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR, + .peripheral_type = ATA, + .transfer_type = per_2_emi, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_RX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_RX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_ata_tx_params = { + .chnl_params = { + .watermark_level = MXC_IDE_DMA_WATERMARK, + .per_address = ATA_DMA_BASE_ADDR + 0x18, + .peripheral_type = ATA, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_ATA_TX_END, + .event_id2 = DMA_REQ_ATA_TX, + .bd_number = MXC_IDE_DMA_BD_NR, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_ATA_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_16bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF_TX, + .bd_number = 32, + .word_size = TRANSFER_16BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_channel_params_t mxc_sdma_spdif_32bit_tx_params = { + .chnl_params = { + .watermark_level = MXC_SPDIF_TXFIFO_WML, + .per_address = SPDIF_BASE_ADDR + MXC_SPDIF_TX_REG, + .peripheral_type = SPDIF, + .transfer_type = emi_2_per, + .event_id = DMA_REQ_SPDIF_TX, + .bd_number = 32, + .word_size = TRANSFER_32BIT, + }, + .channel_num = MXC_DMA_CHANNEL_SPDIF_TX, + .chnl_priority = MXC_SDMA_DEFAULT_PRIORITY, +}; + +static mxc_sdma_info_entry_t mxc_sdma_active_dma_info[] = { + {MXC_DMA_UART1_RX, &mxc_sdma_uart1_rx_params}, + {MXC_DMA_UART1_TX, &mxc_sdma_uart1_tx_params}, + {MXC_DMA_UART2_RX, &mxc_sdma_uart2_rx_params}, + {MXC_DMA_UART2_TX, &mxc_sdma_uart2_tx_params}, + {MXC_DMA_UART3_RX, &mxc_sdma_uart3_rx_params}, + {MXC_DMA_UART3_TX, &mxc_sdma_uart3_tx_params}, + {MXC_DMA_MMC1_WIDTH_1, &mxc_sdma_mmc1_width1_params}, + {MXC_DMA_MMC1_WIDTH_4, &mxc_sdma_mmc1_width4_params}, + {MXC_DMA_MMC2_WIDTH_1, &mxc_sdma_mmc2_width1_params}, + {MXC_DMA_MMC2_WIDTH_4, &mxc_sdma_mmc2_width4_params}, + {MXC_DMA_SSI1_8BIT_RX0, &mxc_sdma_ssi1_8bit_rx0_params}, + {MXC_DMA_SSI1_8BIT_TX0, &mxc_sdma_ssi1_8bit_tx0_params}, + {MXC_DMA_SSI1_16BIT_RX0, &mxc_sdma_ssi1_16bit_rx0_params}, + {MXC_DMA_SSI1_16BIT_TX0, &mxc_sdma_ssi1_16bit_tx0_params}, + {MXC_DMA_SSI1_24BIT_RX0, &mxc_sdma_ssi1_24bit_rx0_params}, + {MXC_DMA_SSI1_24BIT_TX0, &mxc_sdma_ssi1_24bit_tx0_params}, + {MXC_DMA_SSI1_8BIT_RX1, &mxc_sdma_ssi1_8bit_rx1_params}, + {MXC_DMA_SSI1_8BIT_TX1, &mxc_sdma_ssi1_8bit_tx1_params}, + {MXC_DMA_SSI1_16BIT_RX1, &mxc_sdma_ssi1_16bit_rx1_params}, + {MXC_DMA_SSI1_16BIT_TX1, &mxc_sdma_ssi1_16bit_tx1_params}, + {MXC_DMA_SSI1_24BIT_RX1, &mxc_sdma_ssi1_24bit_rx1_params}, + {MXC_DMA_SSI1_24BIT_TX1, &mxc_sdma_ssi1_24bit_tx1_params}, + {MXC_DMA_SSI2_8BIT_RX0, &mxc_sdma_ssi2_8bit_rx0_params}, + {MXC_DMA_SSI2_8BIT_TX0, &mxc_sdma_ssi2_8bit_tx0_params}, + {MXC_DMA_SSI2_16BIT_RX0, &mxc_sdma_ssi2_16bit_rx0_params}, + {MXC_DMA_SSI2_16BIT_TX0, &mxc_sdma_ssi2_16bit_tx0_params}, + {MXC_DMA_SSI2_24BIT_RX0, &mxc_sdma_ssi2_24bit_rx0_params}, + {MXC_DMA_SSI2_24BIT_TX0, &mxc_sdma_ssi2_24bit_tx0_params}, + {MXC_DMA_SSI2_8BIT_RX1, &mxc_sdma_ssi2_8bit_rx1_params}, + {MXC_DMA_SSI2_8BIT_TX1, &mxc_sdma_ssi2_8bit_tx1_params}, + {MXC_DMA_SSI2_16BIT_RX1, &mxc_sdma_ssi2_16bit_rx1_params}, + {MXC_DMA_SSI2_16BIT_TX1, &mxc_sdma_ssi2_16bit_tx1_params}, + {MXC_DMA_SSI2_24BIT_RX1, &mxc_sdma_ssi2_24bit_rx1_params}, + {MXC_DMA_SSI2_24BIT_TX1, &mxc_sdma_ssi2_24bit_tx1_params}, + {MXC_DMA_MEMORY, &mxc_sdma_memory_params}, + {MXC_DMA_ATA_RX, &mxc_sdma_ata_rx_params}, + {MXC_DMA_ATA_TX, &mxc_sdma_ata_tx_params}, + {MXC_DMA_SPDIF_16BIT_TX, &mxc_sdma_spdif_16bit_tx_params}, + {MXC_DMA_SPDIF_32BIT_TX, &mxc_sdma_spdif_32bit_tx_params}, +}; + +static int mxc_sdma_info_entrys = + sizeof(mxc_sdma_active_dma_info) / sizeof(mxc_sdma_active_dma_info[0]); + +/*! + * This functions Returns the SDMA paramaters associated for a module + * + * @param channel_id the ID of the module requesting DMA + * @return returns the sdma parameters structure for the device + */ +mxc_sdma_channel_params_t *mxc_sdma_get_channel_params(mxc_dma_device_t + channel_id) +{ + mxc_sdma_info_entry_t *p = mxc_sdma_active_dma_info; + int i; + + for (i = 0; i < mxc_sdma_info_entrys; i++, p++) { + if (p->device == channel_id) { + return p->chnl_info; + } + } + return NULL; +} + +/*! + * This functions marks the SDMA channels that are statically allocated + * + * @param chnl the channel array used to store channel information + */ +void mxc_get_static_channels(mxc_dma_channel_t * chnl) +{ +#ifdef CONFIG_SDMA_IRAM + int i; + for (i = MXC_DMA_CHANNEL_IRAM; i < MAX_DMA_CHANNELS; i++) + chnl[i].dynamic = 0; +#endif +} + +EXPORT_SYMBOL(mxc_sdma_get_channel_params); +EXPORT_SYMBOL(mxc_get_static_channels); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/usb.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/usb.h @@ -0,0 +1,112 @@ +/* + * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + +extern int usbotg_init(struct platform_device *pdev); +extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata); +extern int gpio_usbotg_hs_active(void); +extern void gpio_usbotg_hs_inactive(void); +extern struct platform_device *host_pdev_register(struct resource *res, + int n_res, struct fsl_usb2_platform_data *config); + +extern int gpio_usbotg_utmi_active(void); +extern void gpio_usbotg_utmi_inactive(void); +static int usbotg_init_ext(struct platform_device *pdev); +static void usbotg_uninit_ext(struct fsl_usb2_platform_data *pdata); + +/* + * Determine which platform_data struct to use for the DR controller, + * based on which transceiver is configured. + * PDATA is a pointer to it. + */ +#if defined(CONFIG_ISP1301_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_1301_config; +#define PDATA (&dr_1301_config) +#elif defined(CONFIG_MC13783_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_13783_config; +#define PDATA (&dr_13783_config) +#elif defined(CONFIG_UTMI_MXC) +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config; +#define PDATA (&dr_utmi_config) +#endif + + +/* + * Used to set pdata->operating_mode before registering the platform_device. + * If OTG is configured, the controller operates in OTG mode, + * otherwise it's either host or device. + */ +#ifdef CONFIG_USB_OTG +#define DR_UDC_MODE FSL_USB2_DR_OTG +#define DR_HOST_MODE FSL_USB2_DR_OTG +#else +#define DR_UDC_MODE FSL_USB2_DR_DEVICE +#define DR_HOST_MODE FSL_USB2_DR_HOST +#endif + + +#ifdef CONFIG_USB_EHCI_ARC_OTG +static inline void dr_register_host(struct resource *r, int rs) +{ + PDATA->operating_mode = DR_HOST_MODE; + host_pdev_register(r, rs, PDATA); +} +#else +static inline void dr_register_host(struct resource *r, int rs) +{ +} +#endif + +#ifdef CONFIG_USB_GADGET_ARC +static struct platform_device dr_udc_device; + +static inline void dr_register_udc(void) +{ + PDATA->operating_mode = DR_UDC_MODE; + dr_udc_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_udc_device)) + printk(KERN_ERR "usb: can't register DR gadget\n"); + else + printk(KERN_INFO "usb: DR gadget (%s) registered\n", + PDATA->transceiver); +} +#else +static inline void dr_register_udc(void) +{ +} +#endif + +#ifdef CONFIG_USB_OTG +static struct platform_device dr_otg_device; + +/* + * set the proper operating_mode and + * platform_data pointer, then register the + * device. + */ +static inline void dr_register_otg(void) +{ + PDATA->operating_mode = FSL_USB2_DR_OTG; + dr_otg_device.dev.platform_data = PDATA; + + if (platform_device_register(&dr_otg_device)) + printk(KERN_ERR "usb: can't register otg device\n"); + else + printk(KERN_INFO "usb: DR OTG registered\n"); +} +#else +static inline void dr_register_otg(void) +{ +} +#endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/pm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/pm.c @@ -0,0 +1,126 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include + +static struct cpu_wp *cpu_wp_tbl; +static struct clk *cpu_clk; + +#if defined(CONFIG_CPU_FREQ) +static int org_freq; +extern int cpufreq_suspended; +extern int set_cpu_freq(int wp); +#endif + +static int mx37_suspend_enter(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_MEM: + mxc_cpu_lp_set(STOP_POWER_OFF); + break; + case PM_SUSPEND_STANDBY: + mxc_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + break; + default: + return -EINVAL; + } + + if (tzic_enable_wake(0) != 0) + return -EAGAIN; + + cpu_do_idle(); + + return 0; +} + +/* + * Called after processes are frozen, but before we shut down devices. + */ +static int mx37_suspend_prepare(void) +{ +#if defined(CONFIG_CPU_FREQ) + struct cpufreq_freqs freqs; + org_freq = clk_get_rate(cpu_clk); + freqs.old = org_freq / 1000; + freqs.new = cpu_wp_tbl[0].cpu_rate / 1000; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_suspended = 1; + if (clk_get_rate(cpu_clk) != cpu_wp_tbl[0].cpu_rate) { + set_cpu_freq(cpu_wp_tbl[0].cpu_rate); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } +#endif + return 0; +} + +/* + * Called after devices are re-setup, but before processes are thawed. + */ +static void mx37_suspend_finish(void) +{ +#if defined(CONFIG_CPU_FREQ) + struct cpufreq_freqs freqs; + + freqs.old = clk_get_rate(cpu_clk) / 1000; + freqs.new = org_freq / 1000; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_suspended = 0; + + if (org_freq != clk_get_rate(cpu_clk)) { + set_cpu_freq(org_freq); + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } +#endif +} + +static int mx37_pm_valid(suspend_state_t state) +{ + return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); +} + +struct platform_suspend_ops mx37_suspend_ops = { + .valid = mx37_pm_valid, + .prepare = mx37_suspend_prepare, + .enter = mx37_suspend_enter, + .finish = mx37_suspend_finish, +}; + +static int __init mx37_pm_init(void) +{ + int cpu_wp_nr; + + pr_info("Static Power Management for Freescale i.MX37\n"); + suspend_set_ops(&mx37_suspend_ops); + + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + + cpu_clk = clk_get(NULL, "cpu_clk"); + if (IS_ERR(cpu_clk)) { + printk(KERN_DEBUG "%s: failed to get cpu_clk\n", __func__); + return PTR_ERR(cpu_clk); + } + return 0; +} + +late_initcall(mx37_pm_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/cpu.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/cpu.c @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2001 Deep Blue Solutions Ltd. + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/*! + * @file mach-mx37/cpu.c + * + * @brief This file contains the CPU initialization code. + * + * @ingroup MSL_MX37 + */ + +#include +#include +#include +#include +#include +#include + +/*! + * CPU initialization. It is called by fixup_mxc_board() + */ +void __init mxc_cpu_init(void) +{ + if (!system_rev) { + mxc_set_system_rev(0x37, CHIP_REV_1_0); + } +} + +#define MXC_ARM1176_BASE IO_ADDRESS(ARM1176_BASE_ADDR) + +/*! + * Post CPU init code + * + * @return 0 always + */ +static int __init post_cpu_init(void) +{ + u32 reg; + void *l2_base; + volatile unsigned long aips_reg; + + /* Set ALP bits to 000. Set ALP_EN bit in Arm Memory Controller reg. */ + reg = __raw_readl(MXC_ARM1176_BASE + 0x1C); + reg = 0x8; + __raw_writel(reg, MXC_ARM1176_BASE + 0x1C); + + /* Initialize L2 cache */ + l2_base = ioremap(L2CC_BASE_ADDR, SZ_4K); + if (l2_base) { + l2x0_init(l2_base, 0x0003001B, 0x00000000); + } + + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS1_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS1_BASE_ADDR + 0x50)); + + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x40)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x44)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x48)); + __raw_writel(0x0, IO_ADDRESS(AIPS2_BASE_ADDR + 0x4C)); + aips_reg = __raw_readl(IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + aips_reg &= 0x00FFFFFF; + __raw_writel(aips_reg, IO_ADDRESS(AIPS2_BASE_ADDR + 0x50)); + + return 0; +} + +postcore_initcall(post_cpu_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mm.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mm.c @@ -0,0 +1,82 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include + +/*! + * @file mach-mx37/mm.c + * + * @brief This file creates static mapping between physical to virtual memory. + * + * @ingroup Memory_MX37 + */ + +/*! + * This structure defines the MX37 memory map. + */ +static struct map_desc mx37_io_desc[] __initdata = { + { + .virtual = IRAM_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(IRAM_BASE_ADDR), + .length = IRAM_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = PLATFORM_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(PLATFORM_BASE_ADDR), + .length = PLATFORM_SIZE, + .type = MT_DEVICE}, + { + .virtual = DEBUG_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(DEBUG_BASE_ADDR), + .length = DEBUG_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = TZIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(TZIC_BASE_ADDR), + .length = TZIC_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED}, + { + .virtual = NFC_BASE_ADDR_AXI_VIRT, + .pfn = __phys_to_pfn(NFC_BASE_ADDR_AXI), + .length = NFC_AXI_SIZE, + .type = MT_DEVICE}, +}; + +/*! + * This function initializes the memory map. It is called during the + * system startup to create static physical to virtual memory map for + * the IO modules. + */ +void __init mx37_map_io(void) +{ + iotable_init(mx37_io_desc, ARRAY_SIZE(mx37_io_desc)); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/Makefile +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/Makefile @@ -0,0 +1,19 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := system.o iomux.o cpu.o mm.o clock.o devices.o serial.o dma.o dptc.o bus_freq.o + + +obj-$(CONFIG_MACH_MX37_3DS) += mx37_3stack.o mx37_3stack_gpio.o +obj-$(CONFIG_SPI_MXC) += mx37_3stack_cpld.o +obj-$(CONFIG_REGULATOR_WM8350) += mx37_3stack_pmic_wm8350.o + +# power management +obj-$(CONFIG_PM) += pm.o + +ifneq ($(strip $(CONFIG_USB_GADGET_ARC) $(CONFIG_USB_EHCI_ARC_OTG)),) + obj-y += usb_dr.o +endif --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mx37_pins.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mx37_pins.h @@ -0,0 +1,256 @@ +/* + * Copyright 2007-2008 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_MXC_MX37_PINS_H__ +#define __ASM_ARCH_MXC_MX37_PINS_H__ + +/*! + * @file arch-mxc/mx37_pins.h + * + * @brief MX37 I/O Pin List + * + * @ingroup GPIO_MX37 + */ + +#ifndef __ASSEMBLY__ + +/*! + * @name IOMUX/PAD Bit field definitions + */ + +/*! @{ */ + +/*! + * In order to identify pins more effectively, each mux-controlled pin's + * enumerated value is constructed in the following way: + * + * ------------------------------------------------------------------- + * 31-29 | 28 - 24 | 23 | 22 - 20 | 19 - 10| 9 - 0 + * ------------------------------------------------------------------- + * IO_P | IO_I | RSVD_I | GPIO_I | PAD_I | MUX_I + * ------------------------------------------------------------------- + * + * Bit 0 to 9 contains MUX_I used to identify the register + * offset (0-based. base is IOMUX_module_base) defined in the Section + * "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The + * similar field definitions are used for the pad control register. + * For example, the MX37_PIN_ETM_D0 is defined in the enumeration: + * ( (0x28 - MUX_I_START) << MUX_I)|( (0x250 - PAD_I_START) << PAD_I) + * It means the mux control register is at register offset 0x28. The pad control + * register offset is: 0x250 and also occupy the least significant bits + * within the register. + */ + +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * MUX control register offset + */ +#define MUX_I 0 +/*! + * Starting bit position within each entry of \b iomux_pins to represent the + * PAD control register offset + */ +#define PAD_I 10 +/*! + * Starting bit position within each entry of \b iomux_pins to represent which + * mux mode is for GPIO (0-based) + */ +#define GPIO_I 20 +/*! + * Starting bit position which is reserved. + */ +#define RSVD_I 23 + +#define NON_GPIO_PORT 0x7 +#define PIN_TO_MUX_MASK ((1 << (PAD_I - MUX_I)) -1) +#define PIN_TO_PAD_MASK ((1 << (GPIO_I - PAD_I)) - 1) +#define PIN_TO_ALT_GPIO_MASK ((1 << (RSVD_I - GPIO_I)) - 1) + +#define NON_MUX_I PIN_TO_MUX_MASK +#define MUX_I_START 0x0008 +#define MUX_I_END (PAD_I_START - 4) +#define PAD_I_START 0x230 +#define PAD_I_END (INPUT_CTL_START - 4) +#define INPUT_CTL_START 0x508 +#define INPUT_CTL_END 0x614 + +#define _MXC_BUILD_PIN(gp, gi, ga, mi, pi) \ + (((gp) << MUX_IO_P) | ((gi) << MUX_IO_I) | \ + ((mi - MUX_I_START) << MUX_I) | \ + ((pi - PAD_I_START) << PAD_I) | \ + ((ga) << GPIO_I)) + +#define _MXC_BUILD_GPIO_PIN(gp, gi, ga, mi, pi) \ + _MXC_BUILD_PIN(gp, gi, ga, mi, pi) + +#define _MXC_BUILD_NON_GPIO_PIN(mi, pi) \ + _MXC_BUILD_PIN(NON_GPIO_PORT, 0, 0, mi, pi) + +#define PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) +#define PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) +#define PIN_TO_ALT_GPIO(pin) ((pin >> GPIO_I) & PIN_TO_ALT_GPIO_MASK) +#define PIN_TO_IOMUX_INDEX(pin) (PIN_TO_IOMUX_MUX(pin) >> 2) + +/*! @} End IOMUX/PAD Bit field definitions */ + +/*! + * This enumeration is constructed based on the Section + * "sw_pad_ctl & sw_mux_ctl details" of the MX37 IC Spec. Each enumerated + * value is constructed based on the rules described above. + */ +enum iomux_pins { + MX37_PIN_KEY_ROW0 = _MXC_BUILD_NON_GPIO_PIN(0x8, 0x230), + MX37_PIN_KEY_ROW1 = _MXC_BUILD_NON_GPIO_PIN(0xC, 0x234), + MX37_PIN_KEY_ROW2 = _MXC_BUILD_NON_GPIO_PIN(0x10, 0x238), + MX37_PIN_KEY_ROW3 = _MXC_BUILD_NON_GPIO_PIN(0x14, 0x23C), + MX37_PIN_KEY_ROW4 = _MXC_BUILD_NON_GPIO_PIN(0x18, 0x240), + MX37_PIN_KEY_ROW5 = _MXC_BUILD_NON_GPIO_PIN(0x1C, 0x244), + MX37_PIN_KEY_ROW6 = _MXC_BUILD_NON_GPIO_PIN(0x20, 0x248), + MX37_PIN_KEY_ROW7 = _MXC_BUILD_NON_GPIO_PIN(0x24, 0x24C), + MX37_PIN_ETM_D0 = _MXC_BUILD_NON_GPIO_PIN(0x28, 0x250), + MX37_PIN_ETM_D1 = _MXC_BUILD_NON_GPIO_PIN(0x2C, 0x254), + MX37_PIN_ETM_D2 = _MXC_BUILD_NON_GPIO_PIN(0x30, 0x258), + MX37_PIN_ETM_D3 = _MXC_BUILD_NON_GPIO_PIN(0x34, 0x25C), + MX37_PIN_ETM_D4 = _MXC_BUILD_NON_GPIO_PIN(0x38, 0x260), + MX37_PIN_ETM_D5 = _MXC_BUILD_NON_GPIO_PIN(0x3C, 0x264), + MX37_PIN_ETM_D6 = _MXC_BUILD_NON_GPIO_PIN(0x40, 0x268), + MX37_PIN_ETM_D7 = _MXC_BUILD_NON_GPIO_PIN(0x44, 0x26C), + MX37_PIN_EIM_EB0 = _MXC_BUILD_GPIO_PIN(0, 15, 3, 0x48, 0x2A8), + MX37_PIN_EIM_EB1 = _MXC_BUILD_GPIO_PIN(0, 14, 3, 0x4C, 0x2AC), + MX37_PIN_EIM_OE = _MXC_BUILD_GPIO_PIN(0, 13, 3, 0x50, 0x2B0), + MX37_PIN_EIM_CS0 = _MXC_BUILD_GPIO_PIN(1, 0, 1, 0x54, 0x2B4), + MX37_PIN_EIM_CS1 = _MXC_BUILD_GPIO_PIN(1, 1, 1, 0x58, 0x2B8), + MX37_PIN_EIM_ECB = _MXC_BUILD_GPIO_PIN(0, 12, 3, 0x5C, 0x2BC), + MX37_PIN_EIM_LBA = _MXC_BUILD_GPIO_PIN(0, 11, 3, 0x60, 0x2C0), + MX37_PIN_EIM_BCLK = _MXC_BUILD_GPIO_PIN(0, 10, 3, 0x64, 0x2C4), + MX37_PIN_EIM_RW = _MXC_BUILD_GPIO_PIN(0, 9, 3, 0x68, 0x2C8), + MX37_PIN_NANDF_WE_B = _MXC_BUILD_GPIO_PIN(1, 2, 4, 0x6C, 0x2CC), + MX37_PIN_NANDF_RE_B = _MXC_BUILD_GPIO_PIN(1, 3, 4, 0x70, 0x2D0), + MX37_PIN_NANDF_ALE = _MXC_BUILD_GPIO_PIN(1, 4, 4, 0x74, 0x2D4), + MX37_PIN_NANDF_CLE = _MXC_BUILD_GPIO_PIN(1, 5, 4, 0x78, 0x2D8), + MX37_PIN_NANDF_WP_B = _MXC_BUILD_GPIO_PIN(1, 6, 4, 0x7C, 0x2DC), + MX37_PIN_NANDF_RB = _MXC_BUILD_GPIO_PIN(1, 7, 4, 0x80, 0x2E0), + MX37_PIN_NANDF_CS0 = _MXC_BUILD_GPIO_PIN(1, 8, 4, 0x84, 0x2E4), + MX37_PIN_NANDF_CS1 = _MXC_BUILD_GPIO_PIN(1, 9, 4, 0x88, 0x2E8), + MX37_PIN_NANDF_CS2 = _MXC_BUILD_GPIO_PIN(1, 10, 4, 0x8C, 0x2EC), + MX37_PIN_NANDF_CS3 = _MXC_BUILD_GPIO_PIN(1, 11, 4, 0x90, 0x2F0), + MX37_PIN_EIM_D15 = _MXC_BUILD_NON_GPIO_PIN(0x94, 0x2F4), + MX37_PIN_EIM_D14 = _MXC_BUILD_NON_GPIO_PIN(0x98, 0x2F8), + MX37_PIN_EIM_D13 = _MXC_BUILD_NON_GPIO_PIN(0x9C, 0x2FC), + MX37_PIN_EIM_D12 = _MXC_BUILD_NON_GPIO_PIN(0xA0, 0x300), + MX37_PIN_EIM_D11 = _MXC_BUILD_NON_GPIO_PIN(0xA4, 0x304), + MX37_PIN_EIM_D10 = _MXC_BUILD_NON_GPIO_PIN(0xA8, 0x308), + MX37_PIN_EIM_D9 = _MXC_BUILD_NON_GPIO_PIN(0xAC, 0x30C), + MX37_PIN_EIM_D8 = _MXC_BUILD_GPIO_PIN(0, 8, 3, 0xB0, 0x310), + MX37_PIN_EIM_D7 = _MXC_BUILD_GPIO_PIN(2, 27, 3, 0xB4, 0x314), + MX37_PIN_EIM_D6 = _MXC_BUILD_GPIO_PIN(2, 26, 3, 0xB8, 0x318), + MX37_PIN_EIM_D5 = _MXC_BUILD_GPIO_PIN(2, 25, 3, 0xBC, 0x31C), + MX37_PIN_EIM_D4 = _MXC_BUILD_GPIO_PIN(2, 24, 3, 0xC0, 0x320), + MX37_PIN_EIM_D3 = _MXC_BUILD_GPIO_PIN(2, 23, 3, 0xC4, 0x324), + MX37_PIN_EIM_D2 = _MXC_BUILD_GPIO_PIN(2, 22, 3, 0xC8, 0x328), + MX37_PIN_EIM_D1 = _MXC_BUILD_GPIO_PIN(2, 21, 3, 0xCC, 0x32C), + MX37_PIN_EIM_D0 = _MXC_BUILD_GPIO_PIN(2, 20, 3, 0xD0, 0x330), + MX37_PIN_SD1_CMD = _MXC_BUILD_GPIO_PIN(0, 16, 3, 0xD4, 0x334), + MX37_PIN_SD1_CLK = _MXC_BUILD_GPIO_PIN(0, 17, 3, 0xD8, 0x338), + MX37_PIN_SD1_DATA0 = _MXC_BUILD_GPIO_PIN(0, 18, 3, 0xDC, 0x33C), + MX37_PIN_SD1_DATA1 = _MXC_BUILD_GPIO_PIN(0, 19, 3, 0xE0, 0x340), + MX37_PIN_SD1_DATA2 = _MXC_BUILD_GPIO_PIN(0, 20, 3, 0xE4, 0x344), + MX37_PIN_SD1_DATA3 = _MXC_BUILD_GPIO_PIN(0, 21, 3, 0xE8, 0x348), + MX37_PIN_SD2_CMD = _MXC_BUILD_GPIO_PIN(0, 22, 3, 0xEC, 0x34C), + MX37_PIN_SD2_CLK = _MXC_BUILD_GPIO_PIN(0, 23, 3, 0xF0, 0x350), + MX37_PIN_SD2_DATA0 = _MXC_BUILD_GPIO_PIN(0, 24, 3, 0xF4, 0x354), + MX37_PIN_SD2_DATA1 = _MXC_BUILD_GPIO_PIN(0, 25, 3, 0xF8, 0x358), + MX37_PIN_SD2_DATA2 = _MXC_BUILD_GPIO_PIN(0, 26, 3, 0xFC, 0x35C), + MX37_PIN_SD2_DATA3 = _MXC_BUILD_GPIO_PIN(0, 27, 3, 0x100, 0x360), + MX37_PIN_I2C1_CLK = _MXC_BUILD_GPIO_PIN(1, 12, 4, 0x104, 0x364), + MX37_PIN_I2C1_DAT = _MXC_BUILD_GPIO_PIN(1, 13, 4, 0x108, 0x368), + MX37_PIN_AUD3_BB_TXD = _MXC_BUILD_GPIO_PIN(1, 14, 4, 0x10C, 0x36C), + MX37_PIN_AUD3_BB_RXD = _MXC_BUILD_GPIO_PIN(1, 15, 4, 0x110, 0x370), + MX37_PIN_AUD3_BB_CK = _MXC_BUILD_GPIO_PIN(1, 16, 4, 0x114, 0x374), + MX37_PIN_AUD3_BB_FS = _MXC_BUILD_GPIO_PIN(1, 17, 4, 0x118, 0x378), + MX37_PIN_AUD5_RXFS = _MXC_BUILD_GPIO_PIN(1, 18, 4, 0x11C, 0x37C), + MX37_PIN_AUD5_RXC = _MXC_BUILD_GPIO_PIN(1, 19, 4, 0x120, 0x380), + MX37_PIN_AUD5_WB_TXD = _MXC_BUILD_GPIO_PIN(1, 20, 4, 0x124, 0x384), + MX37_PIN_AUD5_WB_RXD = _MXC_BUILD_GPIO_PIN(1, 21, 4, 0x128, 0x388), + MX37_PIN_AUD5_WB_CK = _MXC_BUILD_GPIO_PIN(1, 22, 4, 0x12C, 0x38C), + MX37_PIN_AUD5_WB_FS = _MXC_BUILD_GPIO_PIN(1, 23, 4, 0x130, 0x390), + MX37_PIN_CSPI1_MOSI = _MXC_BUILD_GPIO_PIN(2, 0, 4, 0x134, 0x394), + MX37_PIN_CSPI1_MISO = _MXC_BUILD_GPIO_PIN(2, 1, 4, 0x138, 0x398), + MX37_PIN_CSPI1_SS0 = _MXC_BUILD_GPIO_PIN(2, 2, 4, 0x13C, 0x39C), + MX37_PIN_CSPI1_SS1 = _MXC_BUILD_GPIO_PIN(2, 3, 4, 0x140, 0x3A0), + MX37_PIN_CSPI1_SCLK = _MXC_BUILD_GPIO_PIN(2, 4, 4, 0x144, 0x3A4), + MX37_PIN_CSPI2_MOSI = _MXC_BUILD_GPIO_PIN(2, 5, 4, 0x148, 0x3A8), + MX37_PIN_CSPI2_MISO = _MXC_BUILD_GPIO_PIN(2, 6, 4, 0x14C, 0x3AC), + MX37_PIN_CSPI2_SS0 = _MXC_BUILD_GPIO_PIN(2, 7, 4, 0x150, 0x3B0), + MX37_PIN_CSPI2_SS1 = _MXC_BUILD_GPIO_PIN(2, 8, 4, 0x154, 0x3B4), + MX37_PIN_CSPI2_SCLK = _MXC_BUILD_GPIO_PIN(2, 9, 4, 0x158, 0x3B8), + MX37_PIN_UART1_RXD = _MXC_BUILD_GPIO_PIN(1, 24, 4, 0x15C, 0x3BC), + MX37_PIN_UART1_TXD = _MXC_BUILD_GPIO_PIN(1, 25, 4, 0x160, 0x3C0), + MX37_PIN_UART1_RTS = _MXC_BUILD_GPIO_PIN(1, 26, 4, 0x164, 0x3C4), + MX37_PIN_UART1_CTS = _MXC_BUILD_GPIO_PIN(1, 27, 4, 0x168, 0x3C8), + MX37_PIN_UART1_DTR = _MXC_BUILD_GPIO_PIN(1, 28, 4, 0x16C, 0x3CC), + MX37_PIN_UART1_DSR = _MXC_BUILD_GPIO_PIN(1, 29, 4, 0x170, 0x3D0), + MX37_PIN_UART1_RI = _MXC_BUILD_GPIO_PIN(1, 30, 4, 0x174, 0x3D4), + MX37_PIN_UART1_DCD = _MXC_BUILD_GPIO_PIN(1, 31, 4, 0x178, 0x3D8), + MX37_PIN_OWIRE_LINE = _MXC_BUILD_GPIO_PIN(0, 31, 4, 0x17C, 0x3DC), + MX37_PIN_JTAG_DE_B = _MXC_BUILD_NON_GPIO_PIN(0x180, 0x3E0), + MX37_PIN_DI1_PIN11 = _MXC_BUILD_GPIO_PIN(2, 10, 4, 0x184, 0x3E4), + MX37_PIN_DI1_PIN12 = _MXC_BUILD_GPIO_PIN(2, 11, 4, 0x188, 0x3E8), + MX37_PIN_DI1_PIN13 = _MXC_BUILD_GPIO_PIN(2, 12, 4, 0x18C, 0x3EC), + MX37_PIN_DI1_D0_CS = _MXC_BUILD_GPIO_PIN(2, 13, 4, 0x190, 0x3F0), + MX37_PIN_DI1_PIN15 = _MXC_BUILD_GPIO_PIN(0, 30, 4, 0x194, 0), + MX37_PIN_DISP1_DAT0 = _MXC_BUILD_NON_GPIO_PIN(0x198, 0x3F4), + MX37_PIN_DISP1_DAT1 = _MXC_BUILD_NON_GPIO_PIN(0x19C, 0x3F8), + MX37_PIN_DISP1_DAT2 = _MXC_BUILD_NON_GPIO_PIN(0x1A0, 0x3FC), + MX37_PIN_DISP1_DAT3 = _MXC_BUILD_NON_GPIO_PIN(0x1A4, 0x400), + MX37_PIN_DISP1_DAT4 = _MXC_BUILD_NON_GPIO_PIN(0x1A8, 0x404), + MX37_PIN_DISP1_DAT5 = _MXC_BUILD_NON_GPIO_PIN(0x1AC, 0x408), + MX37_PIN_DISP1_DAT6 = _MXC_BUILD_NON_GPIO_PIN(0x1B0, 0x40C), + MX37_PIN_DISP1_DAT7 = _MXC_BUILD_NON_GPIO_PIN(0x1B4, 0x410), + MX37_PIN_DISP1_DAT8 = _MXC_BUILD_NON_GPIO_PIN(0x1B8, 0x414), + MX37_PIN_DISP1_DAT9 = _MXC_BUILD_NON_GPIO_PIN(0x1BC, 0x418), + MX37_PIN_DISP1_DAT10 = _MXC_BUILD_NON_GPIO_PIN(0x1C0, 0x41C), + MX37_PIN_DISP1_DAT11 = _MXC_BUILD_NON_GPIO_PIN(0x1C4, 0x420), + MX37_PIN_DISP1_DAT12 = _MXC_BUILD_NON_GPIO_PIN(0x1C8, 0x424), + MX37_PIN_DISP1_DAT13 = _MXC_BUILD_NON_GPIO_PIN(0x1CC, 0x428), + MX37_PIN_DISP1_DAT14 = _MXC_BUILD_NON_GPIO_PIN(0x1D0, 0x42C), + MX37_PIN_DISP1_DAT15 = _MXC_BUILD_NON_GPIO_PIN(0x1D4, 0x430), + MX37_PIN_DISP1_DAT16 = _MXC_BUILD_GPIO_PIN(0, 28, 4, 0x1D8, 0x434), + MX37_PIN_DISP1_DAT17 = _MXC_BUILD_GPIO_PIN(0, 29, 4, 0x1DC, 0x438), + MX37_PIN_DISP1_DAT18 = _MXC_BUILD_GPIO_PIN(2, 14, 4, 0x1E0, 0x43C), + MX37_PIN_DISP1_DAT19 = _MXC_BUILD_GPIO_PIN(2, 15, 4, 0x1E4, 0x440), + MX37_PIN_DISP1_DAT20 = _MXC_BUILD_GPIO_PIN(2, 16, 4, 0x1E8, 0x444), + MX37_PIN_DISP1_DAT21 = _MXC_BUILD_GPIO_PIN(2, 17, 4, 0x1EC, 0x448), + MX37_PIN_DISP1_DAT22 = _MXC_BUILD_GPIO_PIN(2, 18, 4, 0x1F0, 0x44C), + MX37_PIN_DISP1_DAT23 = _MXC_BUILD_GPIO_PIN(2, 18, 4, 0x1F4, 0x450), + MX37_PIN_PAD_DI1_PIN3 = _MXC_BUILD_GPIO_PIN(2, 29, 4, 0x1F8, 0), + MX37_PIN_DISP_CLK = _MXC_BUILD_GPIO_PIN(2, 30, 4, 0x1FC, 0), + MX37_PIN_DI1_PIN2 = _MXC_BUILD_GPIO_PIN(2, 31, 4, 0x200, 0), + MX37_PIN_BOOT_MODE1 = _MXC_BUILD_NON_GPIO_PIN(0x204, 0x454), + MX37_PIN_BOOT_MODE0 = _MXC_BUILD_NON_GPIO_PIN(0x208, 0x458), + MX37_PIN_WDOG_RST = _MXC_BUILD_GPIO_PIN(2, 28, 1, 0x20C, 0x464), + MX37_PIN_GPIO1_0 = _MXC_BUILD_GPIO_PIN(0, 0, 0, 0x210, 0x468), + MX37_PIN_GPIO1_1 = _MXC_BUILD_GPIO_PIN(0, 1, 0, 0x214, 0x46C), + MX37_PIN_GPIO1_2 = _MXC_BUILD_GPIO_PIN(0, 2, 1, 0x218, 0x470), + MX37_PIN_GPIO1_3 = _MXC_BUILD_GPIO_PIN(0, 3, 0, 0x21C, 0x474), + MX37_PIN_GPIO1_4 = _MXC_BUILD_GPIO_PIN(0, 4, 0, 0x220, 0x478), + MX37_PIN_GPIO1_5 = _MXC_BUILD_GPIO_PIN(0, 5, 0, 0x224, 0x47C), + MX37_PIN_GPIO1_6 = _MXC_BUILD_GPIO_PIN(0, 6, 0, 0x228, 0x480), + MX37_PIN_GPIO1_7 = _MXC_BUILD_GPIO_PIN(0, 7, 0, 0x22C, 0x484), + MX37_PIN_GRP_H10 = _MXC_BUILD_NON_GPIO_PIN(0x230, 0x490), + MX37_PIN_GRP_H9 = _MXC_BUILD_NON_GPIO_PIN(0x230, 0x494), + MX37_PIN_GRP_H3 = _MXC_BUILD_NON_GPIO_PIN(0x230, 0x4D0), + MX37_PIN_GRP_H5 = _MXC_BUILD_NON_GPIO_PIN(0x230, 0x4EC), +}; + +#endif /* */ +#endif /* */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/system.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/system.c @@ -0,0 +1,170 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#define DEBUG +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "crm_regs.h" + +/*! + * @defgroup MSL_MX37 i.MX37 Machine Specific Layer (MSL) + */ + +/*! + * @file mach-mx37/system.c + * @brief This file contains idle and reset functions. + * + * @ingroup MSL_MX37 + */ + +extern int mxc_jtag_enabled; +extern int low_bus_freq_mode; + +static struct clk *gpc_dvfs_clk; + +/* set cpu low power mode before WFI instruction */ +void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode) +{ + u32 plat_lpc, gpc_pgr, arm_srpgcr, empgcr0, empgcr1, ccm_clpcr; + /* always allow platform to issue a deep sleep mode request */ + plat_lpc = __raw_readl(MXC_ARM1176_PLAT_LPC) & + ~(MXC_ARM1176_PLAT_LPC_DSM); + + ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK); + gpc_pgr = __raw_readl(MXC_GPC_PGR) & ~(MXC_GPC_PGR_ARMPG_MASK); + arm_srpgcr = __raw_readl(MXC_SRPGC_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR); + empgcr0 = __raw_readl(MXC_EMPGC0_ARM_EMPGCR) & ~(MXC_EMPGCR_PCR); + empgcr1 = __raw_readl(MXC_EMPGC1_ARM_EMPGCR) & ~(MXC_EMPGCR_PCR); + + switch (mode) { + case WAIT_CLOCKED: + break; + case WAIT_UNCLOCKED: + ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET); + break; + case WAIT_UNCLOCKED_POWER_OFF: + case STOP_POWER_OFF: + plat_lpc |= MXC_ARM1176_PLAT_LPC_DSM; + if (mode == WAIT_UNCLOCKED_POWER_OFF) + ccm_clpcr |= (0x1 << MXC_CCM_CLPCR_LPM_OFFSET); + else { + ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET); + ccm_clpcr |= (0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET); + ccm_clpcr |= MXC_CCM_CLPCR_VSTBY; + ccm_clpcr |= MXC_CCM_CLPCR_SBYOS; + } + + gpc_pgr |= (0x1 << MXC_GPC_PGR_ARMPG_OFFSET); + arm_srpgcr |= MXC_SRPGCR_PCR; + empgcr0 |= MXC_EMPGCR_PCR; + empgcr1 |= MXC_EMPGCR_PCR; + + if (tzic_enable_wake(1) != 0) + return; + break; + case STOP_POWER_ON: + ccm_clpcr |= (0x2 << MXC_CCM_CLPCR_LPM_OFFSET); + break; + default: + printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode); + return; + } + + __raw_writel(plat_lpc, MXC_ARM1176_PLAT_LPC); + __raw_writel(ccm_clpcr, MXC_CCM_CLPCR); + __raw_writel(gpc_pgr, MXC_GPC_PGR); + __raw_writel(arm_srpgcr, MXC_SRPGC_ARM_SRPGCR); + if ((mxc_cpu_is_rev(CHIP_REV_1_0)) != 1) + __raw_writel(empgcr0, MXC_EMPGC0_ARM_EMPGCR); + + flush_cache_all(); + + if (gpc_dvfs_clk == NULL) + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs_clk"); + + /* gpc clock is needed for SRPG */ + clk_enable(gpc_dvfs_clk); +} + +void mxc_pg_enable(struct platform_device *pdev) +{ + if (pdev == NULL) + return; + + if (strcmp(pdev->name, "mxc_ipu") == 0) { + __raw_writel(MXC_PGCR_PCR, MXC_PGC_IPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_IPU_PGSR); + } else if (strcmp(pdev->name, "mxc_vpu") == 0) { + __raw_writel(MXC_PGCR_PCR, MXC_PGC_VPU_PGCR); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_VPU_PGSR); + } +} + +EXPORT_SYMBOL(mxc_pg_enable); + +void mxc_pg_disable(struct platform_device *pdev) +{ + if (pdev == NULL) + return; + + if (strcmp(pdev->name, "mxc_ipu") == 0) { + __raw_writel(0x0, MXC_PGC_IPU_PGCR); + if (__raw_readl(MXC_PGC_IPU_PGSR) & MXC_PGSR_PSR) + dev_dbg(&pdev->dev, "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_IPU_PGSR); + } else if (strcmp(pdev->name, "mxc_vpu") == 0) { + __raw_writel(0x0, MXC_PGC_VPU_PGCR); + if (__raw_readl(MXC_PGC_VPU_PGSR) & MXC_PGSR_PSR) + dev_dbg(&pdev->dev, "power gating successful\n"); + __raw_writel(MXC_PGSR_PSR, MXC_PGC_VPU_PGSR); + } +} + +EXPORT_SYMBOL(mxc_pg_disable); + +/* To change the idle power mode, need to set arch_idle_mode to a different + * power mode as in enum mxc_cpu_pwr_mode. + * May allow dynamically changing the idle mode. + */ +static int arch_idle_mode = WAIT_UNCLOCKED_POWER_OFF; + +/*! + * This function puts the CPU into idle mode. It is called by default_idle() + * in process.c file. + */ +void arch_idle(void) +{ + if (likely(!mxc_jtag_enabled)) { + mxc_cpu_lp_set(arch_idle_mode); + cpu_do_idle(); + /* gpc clock is needed for SRPG */ + clk_disable(gpc_dvfs_clk); + } +} + +/* + * This function resets the system. It is called by machine_restart(). + * + * @param mode indicates different kinds of resets + */ +void arch_reset(char mode) +{ + /* Assert SRS signal */ + mxc_wd_reset(); +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/clock.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/clock.c @@ -0,0 +1,3189 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "crm_regs.h" +#include "iomux.h" + +extern int mxc_jtag_enabled; +extern int cpufreq_trig_needed; +extern int dvfs_core_is_active; + +static unsigned long pll_base[] = { + (unsigned long)MXC_DPLL1_BASE, + (unsigned long)MXC_DPLL2_BASE, + (unsigned long)MXC_DPLL3_BASE, +}; + +static struct clk pll1_main_clk; +static struct clk pll1_sw_clk; +static struct clk pll2_sw_clk; +static struct clk pll3_sw_clk; +static struct clk lp_apm_clk; +static struct clk emi_core_clk; +static struct clk emi_fast_clk; +static struct clk emi_slow_clk; +static struct clk emi_intr_clk; +static struct clk ddr_clk; +static struct clk ipu_clk[]; +static struct clk axi_a_clk; +static struct clk axi_b_clk; +static struct clk axi_c_clk; +static struct clk ahb_clk; + +int cpu_wp_nr; +int lp_high_freq; +int lp_med_freq; +static int cpu_curr_wp; +static struct cpu_wp *cpu_wp_tbl; + +extern void propagate_rate(struct clk *tclk); +extern void board_ref_clk_rate(unsigned long *ckil, unsigned long *osc, + unsigned long *ckih); +static int cpu_clk_set_wp(int wp); + +static int _clk_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg |= MXC_CCM_CCGR_CG_MASK << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); + + return 0; +} + +static void _clk_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); +} + +static void _clk_disable_inwait(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(clk->enable_reg); + reg &= ~(MXC_CCM_CCGR_CG_MASK << clk->enable_shift); + reg |= 1 << clk->enable_shift; + __raw_writel(reg, clk->enable_reg); +} + +/* + * For the 4-to-1 muxed input clock + */ +static inline u32 _get_mux(struct clk *parent, struct clk *m0, + struct clk *m1, struct clk *m2, struct clk *m3) +{ + if (parent == m0) { + return 0; + } else if (parent == m1) { + return 1; + } else if (parent == m2) { + return 2; + } else if (parent == m3) { + return 3; + } else { + BUG(); + } + return 0; +} + +static inline unsigned long _get_pll_base(struct clk *pll) +{ + if (pll == &pll1_main_clk) { + return pll_base[0]; + } else if (pll == &pll2_sw_clk) { + return pll_base[1]; + } else if (pll == &pll3_sw_clk) { + return pll_base[2]; + } else { + BUG(); + } + return 0; +} + +static struct clk ckih_clk = { + .name = "ckih", + .flags = RATE_PROPAGATES, +}; + +static struct clk osc_clk = { + .name = "osc", + .flags = RATE_PROPAGATES, +}; + +static struct clk ckil_clk = { + .name = "ckil", + .flags = RATE_PROPAGATES, +}; + +static void _fpm_recalc(struct clk *clk) +{ + clk->rate = ckil_clk.rate * 512; + if ((__raw_readl(MXC_CCM_CCR) & MXC_CCM_CCR_FPM_MULT_MASK) != 0) { + clk->rate *= 2; + } +} + +static int _fpm_enable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg |= MXC_CCM_CCR_FPM_EN; + __raw_writel(reg, MXC_CCM_CCR); + return 0; +} + +static void _fpm_disable(struct clk *clk) +{ + u32 reg = __raw_readl(MXC_CCM_CCR); + reg &= ~MXC_CCM_CCR_FPM_EN; + __raw_writel(reg, MXC_CCM_CCR); +} + +static struct clk fpm_clk = { + .name = "fpm_clk", + .parent = &ckil_clk, + .recalc = _fpm_recalc, + .enable = _fpm_enable, + .disable = _fpm_disable, + .flags = RATE_PROPAGATES, +}; + +static void _fpm_div2_recalc(struct clk *clk) +{ + clk->rate = clk->parent->rate / 2; +} + +static struct clk fpm_div2_clk = { + .name = "fpm_div2_clk", + .parent = &fpm_clk, + .recalc = _fpm_div2_recalc, + .flags = RATE_PROPAGATES, +}; + +static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 pllbase; + + long mfi, pdf, mfn, mfd = 999999; + s64 temp64; + unsigned long quad_parent_rate; + unsigned long pll_hfsm, dp_ctl; + + pllbase = _get_pll_base(clk); + + quad_parent_rate = 4*clk->parent->rate; + pdf = mfi = -1; + while (++pdf < 16 && mfi < 5) + mfi = rate * (pdf+1) / quad_parent_rate; + if (mfi > 15) + return -1; + pdf--; + + temp64 = rate*(pdf+1) - quad_parent_rate*mfi; + do_div(temp64, quad_parent_rate/1000000); + mfn = (long)temp64; + + dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL); + /* use dpdck0_2 */ + __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL); + pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM; + if (pll_hfsm == 0) { + reg = mfi<<4 | pdf; + __raw_writel(reg, pllbase + MXC_PLL_DP_OP); + __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD); + __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN); + } else { + reg = mfi<<4 | pdf; + __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP); + __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD); + __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN); + } + + return 0; +} + +static void _clk_pll_recalc(struct clk *clk) +{ + long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; + unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl; + unsigned long pllbase; + s64 temp; + + pllbase = _get_pll_base(clk); + + dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL); + pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM; + dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN; + + if (pll_hfsm == 0) { + dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP); + dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD); + dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN); + } else { + dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP); + dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD); + dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN); + } + pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK; + mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET; + mfi = (mfi <= 5) ? 5 : mfi; + mfd = dp_mfd & MXC_PLL_DP_MFD_MASK; + mfn = mfn_abs = dp_mfn & MXC_PLL_DP_MFN_MASK; + /* Sign extend to 32-bits */ + if (mfn >= 0x04000000) { + mfn |= 0xFC000000; + mfn_abs = -mfn; + } + + ref_clk = 2 * clk->parent->rate; + if (dbl != 0) { + ref_clk *= 2; + } + ref_clk /= (pdf + 1); + temp = (u64) ref_clk *mfn_abs; + do_div(temp, mfd + 1); + if (mfn < 0) + temp = -temp; + temp = (ref_clk * mfi) + temp; + + clk->rate = temp; +} + +static int _clk_pll_enable(struct clk *clk) +{ + u32 reg; + u32 pllbase; + + pllbase = _get_pll_base(clk); + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); + + /* Wait for lock */ + while (!(__raw_readl(pllbase + MXC_PLL_DP_CTL) & MXC_PLL_DP_CTL_LRF)) ; + + return 0; +} + +static void _clk_pll_disable(struct clk *clk) +{ + u32 reg; + u32 pllbase; + + pllbase = _get_pll_base(clk); + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); +} + +static struct clk pll1_main_clk = { + .name = "pll1_main_clk", + .parent = &osc_clk, + .recalc = _clk_pll_recalc, + .set_rate = _clk_pll_set_rate, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CCSR); + + if (parent == &pll1_main_clk) { + reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + } else { + mux = _get_mux(parent, &lp_apm_clk, NULL, &pll2_sw_clk, + &pll3_sw_clk); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (mux << MXC_CCM_CCSR_STEP_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CCSR); + reg = __raw_readl(MXC_CCM_CCSR); + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + } + __raw_writel(reg, MXC_CCM_CCSR); + return 0; +} + +static void _clk_pll1_sw_recalc(struct clk *clk) +{ + u32 reg, div; + div = 1; + reg = __raw_readl(MXC_CCM_CCSR); + + if (clk->parent == &pll2_sw_clk) { + div = ((reg & MXC_CCM_CCSR_PLL2_PODF_MASK) >> + MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1; + } else if (clk->parent == &pll3_sw_clk) { + div = ((reg & MXC_CCM_CCSR_PLL3_PODF_MASK) >> + MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1; + } + clk->rate = clk->parent->rate / div; +} + +/* pll1 switch clock */ +static struct clk pll1_sw_clk = { + .name = "pll1_sw_clk", + .parent = &pll1_main_clk, + .set_parent = _clk_pll1_sw_set_parent, + .recalc = _clk_pll1_sw_recalc, + .flags = RATE_PROPAGATES, +}; + +/* same as pll2_main_clk. These two clocks should always be the same */ +static struct clk pll2_sw_clk = { + .name = "pll2", + .parent = &osc_clk, + .set_rate = _clk_pll_set_rate, + .recalc = _clk_pll_recalc, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .flags = RATE_PROPAGATES, +}; + +/* same as pll3_main_clk. These two clocks should always be the same */ +static struct clk pll3_sw_clk = { + .name = "pll3", + .parent = &osc_clk, + .recalc = _clk_pll_recalc, + .enable = _clk_pll_enable, + .disable = _clk_pll_disable, + .flags = RATE_PROPAGATES, +}; + +static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + if (parent == &osc_clk) { + reg = __raw_readl(MXC_CCM_CCSR) & ~MXC_CCM_CCSR_LP_APM_SEL; + } else if (parent == &fpm_clk) { + reg = __raw_readl(MXC_CCM_CCSR) | MXC_CCM_CCSR_LP_APM_SEL; + } else { + return -EINVAL; + } + __raw_writel(reg, MXC_CCM_CCSR); + + return 0; +} + +static struct clk lp_apm_clk = { + .name = "lp_apm", + .parent = &osc_clk, + .set_parent = _clk_lp_apm_set_parent, + .flags = RATE_PROPAGATES, +}; + +static void _clk_arm_recalc(struct clk *clk) +{ + u32 cacrr, div; + + cacrr = __raw_readl(MXC_CCM_CACRR); + div = (cacrr & MXC_CCM_CACRR_ARM_PODF_MASK) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) +{ + u32 i; + for (i = 0; i < cpu_wp_nr; i++) { + if (rate == cpu_wp_tbl[i].cpu_rate) + break; + } + if (i > cpu_wp_nr) + return -EINVAL; + cpu_clk_set_wp(i); + + return 0; +} + +static unsigned long _clk_cpu_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 i; + u32 wp; + + for (i = 0; i < cpu_wp_nr; i++) { + if (rate == cpu_wp_tbl[i].cpu_rate) + break; + } + + if (i > cpu_wp_nr) + wp = 0; + + return cpu_wp_tbl[wp].cpu_rate; +} + +static struct clk cpu_clk = { + .name = "cpu_clk", + .parent = &pll1_sw_clk, + .recalc = _clk_arm_recalc, + .set_rate = _clk_cpu_set_rate, + .round_rate = _clk_cpu_round_rate, +}; + +static int _clk_periph_apm_set_parent(struct clk *clk, + struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll3_sw_clk, &lp_apm_clk, NULL); + + reg = __raw_readl(MXC_CCM_CAMR) & ~MXC_CCM_CAMR_PERIPH_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CAMR_PERIPH_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static struct clk periph_apm_clk = { + .name = "periph_apm_clk", + .parent = &pll1_sw_clk, + .set_parent = _clk_periph_apm_set_parent, + .flags = RATE_PROPAGATES, +}; + +static void _clk_main_bus_recalc(struct clk *clk) +{ + u32 div; + + if (dvfs_per_divider_active()) { + div = __raw_readl(MXC_CCM_CDCR) + & MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK; + clk->rate = clk->parent->rate/(div + 1); + } else + clk->rate = clk->parent->rate; +} + +static int _clk_main_bus_set_rate(struct clk *clk, unsigned long rate) +{ + u32 div = 0; + if (dvfs_per_divider_active()) { + div = __raw_readl(MXC_CCM_CDCR) + & MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK; + } + clk->rate = clk->parent->rate/(div + 1); + + return 0; +} +static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, stat; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.enable(&emi_intr_clk); + + if (parent == &pll2_sw_clk) { + reg = __raw_readl(MXC_CCM_CBCDR6) & + ~MXC_CCM_CBCDR6_PERIPH_CLK_SEL; + } else if (parent == &periph_apm_clk) { + reg = __raw_readl(MXC_CCM_CBCDR6) | + MXC_CCM_CBCDR6_PERIPH_CLK_SEL; + } else { + return -EINVAL; + } + __raw_writel(reg, MXC_CCM_CBCDR6); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.disable(&emi_intr_clk); + + return 0; +} + +static struct clk main_bus_clk = { + .name = "main_bus_clk", + .parent = &pll2_sw_clk, + .set_parent = _clk_main_bus_set_parent, + .set_rate = _clk_main_bus_set_rate, + .recalc = _clk_main_bus_recalc, + .flags = RATE_PROPAGATES, +}; + +static int _clk_axi_a_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (ddr_clk.parent == &axi_a_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + + reg = __raw_readl(MXC_CCM_CBCDR3); + reg &= ~MXC_CCM_CBCDR3_AXI_A_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR3_AXI_A_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR3); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + clk->rate = rate; + + if (ddr_clk.parent == &axi_a_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + + return 0; +} + +static void _clk_axi_a_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR3); + div = ((reg & MXC_CCM_CBCDR3_AXI_A_PODF_MASK) >> + MXC_CCM_CBCDR3_AXI_A_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_axi_a_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk axi_a_clk = { + .name = "axi_a_clk", + .parent = &main_bus_clk, + .recalc = _clk_axi_a_recalc, + .set_rate = _clk_axi_a_set_rate, + .round_rate = _clk_axi_a_round_rate, + .flags = RATE_PROPAGATES, +}; + +static int _clk_axi_b_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (ddr_clk.parent == &axi_b_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + + reg = __raw_readl(MXC_CCM_CBCDR4); + reg &= ~MXC_CCM_CBCDR4_AXI_B_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR4_AXI_B_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR4); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + clk->rate = rate; + + if (ddr_clk.parent == &axi_c_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + + return 0; +} + +static void _clk_axi_b_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR4); + div = ((reg & MXC_CCM_CBCDR4_AXI_B_PODF_MASK) >> + MXC_CCM_CBCDR4_AXI_B_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_axi_b_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk axi_b_clk = { + .name = "axi_b_clk", + .parent = &main_bus_clk, + .recalc = _clk_axi_b_recalc, + .set_rate = _clk_axi_b_set_rate, + .round_rate = _clk_axi_b_round_rate, + .flags = RATE_PROPAGATES, +}; + +static int _clk_axi_c_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (ddr_clk.parent == &axi_c_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + + reg = __raw_readl(MXC_CCM_CBCDR5); + reg &= ~MXC_CCM_CBCDR5_AXI_C_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR5_AXI_C_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR5); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + clk->rate = rate; + + if (ddr_clk.parent == &axi_c_clk && emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + + return 0; +} + +static void _clk_axi_c_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR5); + div = ((reg & MXC_CCM_CBCDR5_AXI_C_PODF_MASK) >> + MXC_CCM_CBCDR5_AXI_C_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_axi_c_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk axi_c_clk = { + .name = "axi_c_clk", + .parent = &main_bus_clk, + .recalc = _clk_axi_c_recalc, + .set_rate = _clk_axi_c_set_rate, + .round_rate = _clk_axi_c_round_rate, + .flags = RATE_PROPAGATES, +}; + +static void _clk_ahb_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR2); + div = ((reg & MXC_CCM_CBCDR2_AHB_PODF_MASK) >> + MXC_CCM_CBCDR2_AHB_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CBCDR2); + reg &= ~MXC_CCM_CBCDR2_AHB_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR2_AHB_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR2); + + clk->rate = rate; + + return 0; +} + +static unsigned long _clk_ahb_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk ahb_clk = { + .name = "ahb_clk", + .parent = &main_bus_clk, + .recalc = _clk_ahb_recalc, + .set_rate = _clk_ahb_set_rate, + .round_rate = _clk_ahb_round_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk ahb_max_clk = { + .name = "max_clk", + .parent = &ahb_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static int _clk_emi_core_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.enable(&emi_intr_clk); + + reg = __raw_readl(MXC_CCM_CBCDR6); + reg &= ~MXC_CCM_CBCDR6_EMI_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR6_EMI_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR6); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + + clk->rate = rate; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.disable(&emi_intr_clk); + + return 0; +} + +static void _clk_emi_core_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR6); + div = ((reg & MXC_CCM_CBCDR6_EMI_PODF_MASK) >> + MXC_CCM_CBCDR6_EMI_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_emi_core_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + u32 stat; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.enable(&emi_intr_clk); + + if ((ipu_clk[0].parent == &emi_core_clk) && + (ipu_clk[0].usecount == 0)) + ipu_clk[0].enable(&ipu_clk[0]); + + reg = __raw_readl(MXC_CCM_CBCDR6); + if (parent == &ahb_clk) { + reg |= MXC_CCM_CBCDR6_EMI_CLK_SEL; + } else if (parent == &main_bus_clk) { + reg &= ~MXC_CCM_CBCDR6_EMI_CLK_SEL; + } else { + BUG(); + } + __raw_writel(reg, MXC_CCM_CBCDR6); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.disable(&emi_intr_clk); + if ((ipu_clk[0].parent == &emi_core_clk) && + (ipu_clk[0].usecount == 0)) + ipu_clk[0].disable(&ipu_clk[0]); + + return 0; +} + +static unsigned long _clk_emi_core_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk emi_core_clk = { + .name = "emi_core_clk", + .set_parent = _clk_emi_core_set_parent, + .recalc = _clk_emi_core_recalc, + .set_rate = _clk_emi_core_set_rate, + .round_rate = _clk_emi_core_round_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk ahbmux1_clk = { + .name = "ahbmux1_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG4_OFFSET, + .disable = _clk_disable_inwait, +}; + +static struct clk ahbmux2_clk = { + .name = "ahbmux2_clk", + .id = 0, + .parent = &emi_core_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG7_OFFSET, + .disable = _clk_disable_inwait, +}; + +static struct clk emi_fast_clk = { + .name = "emi_fast_clk", + .parent = &emi_core_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG12_OFFSET, + .disable = _clk_disable_inwait, +}; + +static struct clk emi_slow_clk = { + .name = "emi_slow_clk", + .parent = &emi_core_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG13_OFFSET, + .disable = _clk_disable_inwait, +}; + +static int _clk_emi_intr_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 4)) + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CBCDR7); + reg &= ~MXC_CCM_CBCDR7_IPG_INIT_MEM_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR7_IPG_INT_MEM_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR7); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + + clk->rate = rate; + + return 0; +} + +static void _clk_emi_intr_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR7); + div = ((reg & MXC_CCM_CBCDR7_IPG_INIT_MEM_PODF_MASK) >> + MXC_CCM_CBCDR7_IPG_INT_MEM_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static unsigned long _clk_emi_intr_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 4) + div = 4; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk emi_intr_clk = { + .name = "emi_intr_clk", + .parent = &emi_core_clk, + .secondary = &ahbmux2_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG14_OFFSET, + .disable = _clk_disable_inwait, + .recalc = _clk_emi_intr_recalc, + .set_rate = _clk_emi_intr_set_rate, + .round_rate = _clk_emi_intr_round_rate, +}; + +static void _clk_ipg_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR2); + div = ((reg & MXC_CCM_CBCDR2_IPG_PODF_MASK) >> + MXC_CCM_CBCDR2_IPG_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .recalc = _clk_ipg_recalc, + .flags = RATE_PROPAGATES, +}; + +static void _clk_ipg_per_recalc(struct clk *clk) +{ + u32 reg, prediv1, prediv2, podf; + + if (clk->parent == &main_bus_clk || clk->parent == &lp_apm_clk) { + /* the main_bus_clk is the one before the DVFS engine */ + reg = __raw_readl(MXC_CCM_CBCDR2); + prediv1 = ((reg & MXC_CCM_CBCDR2_PERCLK_PRED1_MASK) >> + MXC_CCM_CBCDR2_PERCLK_PRED1_OFFSET) + 1; + prediv2 = ((reg & MXC_CCM_CBCDR2_PERCLK_PRED2_MASK) >> + MXC_CCM_CBCDR2_PERCLK_PRED2_OFFSET) + 1; + podf = ((reg & MXC_CCM_CBCDR2_PERCLK_PODF_MASK) >> + MXC_CCM_CBCDR2_PERCLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv1 * prediv2 * podf); + } else if (clk->parent == &ipg_clk) { + clk->rate = ipg_clk.rate; + } else { + BUG(); + } +} + +static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR1); + mux = _get_mux(parent, &main_bus_clk, &lp_apm_clk, &ipg_clk, NULL); + if (mux == 2) { + reg |= MXC_CCM_CSCMR1_PERCLK_IPG_CLK_SEL; + } else { + reg &= ~MXC_CCM_CSCMR1_PERCLK_IPG_CLK_SEL; + if (mux == 0) { + reg &= ~MXC_CCM_CSCMR1_PERCLK_LP_APM_CLK_SEL; + } else { + reg |= MXC_CCM_CSCMR1_PERCLK_LP_APM_CLK_SEL; + } + } + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ipg_perclk = { + .name = "ipg_perclk", + .parent = &ipg_clk, + .recalc = _clk_ipg_per_recalc, + .set_parent = _clk_ipg_per_set_parent, + .flags = RATE_PROPAGATES, +}; + +static struct clk aips_tz1_clk = { + .name = "aips_tz1_clk", + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG13_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static struct clk aips_tz2_clk = { + .name = "aips_tz2_clk", + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG14_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable_inwait, +}; + +static struct clk gpc_dvfs_clk = { + .name = "gpc_dvfs_clk", + .parent = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG15_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk sdma_clk[] = { + { + .name = "sdma_ahb_clk", + .parent = &ahb_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG0_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "sdma_ipg_clk", + .parent = &ipg_clk, +#ifdef CONFIG_SDMA_IRAM + .secondary = &emi_intr_clk, +#endif + }, +}; + +static int _clk_tve_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + + if (parent == &pll3_sw_clk) { + reg &= ~(MXC_CCM_CSCMR1_TVE_CLK_SEL); + } else if (parent == &osc_clk) { + reg |= MXC_CCM_CSCMR1_TVE_CLK_SEL; + reg &= MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL; + } else if (parent == &ckih_clk) { + reg |= MXC_CCM_CSCMR1_TVE_CLK_SEL; + reg |= MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL; + } else { + BUG(); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + return 0; +} + +static void _clk_tve_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CDCDR) & + MXC_CCM_CDCDR_TVE_CLK_PRED_MASK; + div = (reg >> MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET) + 1; + clk->rate = clk->parent->rate / div; + } else { + clk->rate = clk->parent->rate; + } +} + +static unsigned long _clk_tve_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) { + return -EINVAL; + } + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static int _clk_tve_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (reg & MXC_CCM_CSCMR1_TVE_CLK_SEL) { + return -EINVAL; + } + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) { + return -EINVAL; + } + + div--; + reg = __raw_readl(MXC_CCM_CDCDR) & ~MXC_CCM_CDCDR_TVE_CLK_PRED_MASK; + reg |= div << MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CDCDR); + clk->rate = rate; + return 0; +} + +static struct clk tve_clk = { + .name = "tve_clk", + .parent = &pll3_sw_clk, + .secondary = &aips_tz1_clk, + .set_parent = _clk_tve_set_parent, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG10_OFFSET, + .recalc = _clk_tve_recalc, + .round_rate = _clk_tve_round_rate, + .set_rate = _clk_tve_set_rate, + .enable = _clk_enable, + .disable = _clk_disable, + .flags = RATE_PROPAGATES, +}; + +static struct clk spba_clk = { + .name = "spba_clk", + .parent = &ipg_clk, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG1_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static void _clk_uart_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_UART_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_UART_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_uart_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_UART_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static int _clk_uart_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, post_div = 1; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 64) || (div == 1)) + return -EINVAL; + + if (div > 8) { + int i = 1; + while ((div / (2 * i)) > 8) + i++; + post_div = i * 2; + div = div / post_div; + } + + reg = __raw_readl(MXC_CCM_CSCDR1); + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PRED_MASK; + reg |= (div - 1) << MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET | + (post_div - 1) << MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR1); + clk->rate = rate; + + return 0; +} + +static unsigned long _clk_uart_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 64) + div = 64; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk uart_main_clk = { + .name = "uart_main_clk", + .parent = &pll2_sw_clk, + .secondary = &emi_fast_clk, + .recalc = _clk_uart_recalc, + .set_parent = _clk_uart_set_parent, + .set_rate = _clk_uart_set_rate, + .round_rate = _clk_uart_round_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk uart1_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &uart_main_clk, + .secondary = &uart1_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG5_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "uart_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG4_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk uart2_clk[] = { + { + .name = "uart_clk", + .id = 1, + .parent = &uart_main_clk, + .secondary = &uart2_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "uart_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG6_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk uart3_clk[] = { + { + .name = "uart_clk", + .id = 2, + .parent = &uart_main_clk, + .secondary = &uart3_clk[1], + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "uart_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk gpt_clk[] = { + { + .name = "gpt_clk", + .id = 0, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + .secondary = &gpt_clk[1], + }, + { + .name = "gpt_ipg_clk", + .parent = &ipg_clk, + .id = 0, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "gpt_32k_clk", + .id = 0, + .parent = &ckil_clk, + }, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG14_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "i2c_clk", + .id = 1, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG15_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "i2c_clk", + .id = 2, + .parent = &ipg_perclk, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG0_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static void _clk_cspi_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR2); + prediv = ((reg & MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK) >> + MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_cspi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static int _clk_cspi_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, post_div = 1; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 512) || (div == 1)) + return -EINVAL; + + if (div > 8) { + int i = 1; + while ((div / (2 * i)) > 8) + i++; + post_div = i * 2; + div = div / post_div; + } + + reg = __raw_readl(MXC_CCM_CSCDR2); + reg &= ~MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK; + reg |= (div - 1) << MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET; + reg |= (post_div - 1) << MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CSCDR2); + clk->rate = rate; + + return 0; +} + +static unsigned long _clk_cspi_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 512) + div = 8; + else if (div == 1) + div = 2; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk cspi_main_clk = { + .name = "cspi_main_clk", + .parent = &pll3_sw_clk, + .recalc = _clk_cspi_recalc, + .set_parent = _clk_cspi_set_parent, + .set_rate = _clk_cspi_set_rate, + .round_rate = _clk_cspi_round_rate, + .flags = RATE_PROPAGATES, +}; + +static struct clk cspi1_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &cspi_main_clk, + .secondary = &cspi1_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "cspi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk cspi2_clk[] = { + { + .name = "cspi_clk", + .id = 1, + .parent = &cspi_main_clk, + .secondary = &cspi2_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "cspi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static struct clk cspi3_clk[] = { + { + .name = "cspi_clk", + .id = 2, + .parent = &cspi_main_clk, + .secondary = &cspi3_clk[1], + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "cspi_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .secondary = &aips_tz2_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG11_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, +}; + +static int _clk_ssi_lp_apm_set_parent(struct clk *clk, + struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + + if (parent == &ckih_clk) { + reg &= ~MXC_CCM_CSCMR1_SSI_APM_CLK_SEL; + } else if (parent == &lp_apm_clk) { + reg |= MXC_CCM_CSCMR1_SSI_APM_CLK_SEL; + } else { + BUG(); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + return 0; +} + +static struct clk ssi_lp_apm_clk = { + .name = "ssi_lp_apm_clk", + .parent = &ckih_clk, + .set_parent = _clk_ssi_lp_apm_set_parent, +}; + +static void _clk_ssi1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CS1CDR); + prediv = ((reg & MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK) >> + MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK) >> + MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} +static int _clk_ssi1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, + &pll3_sw_clk, &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi1_clk[] = { + { + .name = "ssi_clk", + .id = 0, + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi1_set_parent, + .secondary = &ssi1_clk[1], + .recalc = _clk_ssi1_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG8_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &ssi1_clk[2], + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG7_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_dep_clk", + .id = 0, + .parent = &aips_tz2_clk, +#ifdef CONFIG_SND_MXC_SOC_IRAM + .secondary = &emi_intr_clk, +#else + .secondary = &emi_fast_clk, +#endif + }, +}; + +static void _clk_ssi2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CS2CDR); + prediv = ((reg & MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK) >> + MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK) >> + MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_ssi2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, + &pll3_sw_clk, &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi2_clk[] = { + { + .name = "ssi_clk", + .id = 1, + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi2_set_parent, + .secondary = &ssi2_clk[1], + .recalc = _clk_ssi2_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG10_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .secondary = &ssi2_clk[2], + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG9_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, + }, + { + .name = "ssi_dep_clk", + .id = 1, + .parent = &spba_clk, +#ifdef CONFIG_SND_MXC_SOC_IRAM + .secondary = &emi_intr_clk, +#else + .secondary = &emi_fast_clk, +#endif + }, +}; + +static void _clk_ssi_ext1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + clk->rate = clk->parent->rate; + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CSECDR1); + prediv = ((reg & MXC_CCM_CSECDR1_SSI_EXT1_CLK_PRED_MASK) >> + MXC_CCM_CSECDR1_SSI_EXT1_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSECDR1_SSI_EXT1_CLK_PODF_MASK) >> + MXC_CCM_CSECDR1_SSI_EXT1_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv * podf); + } +} + +static int _clk_ssi_ext1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &ssi1_clk[0]) { + reg |= MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL; + } else { + reg &= ~MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &ssi_lp_apm_clk); + reg = (reg & ~MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi_ext1_clk = { + .name = "ssi_ext1_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi_ext1_set_parent, + .recalc = _clk_ssi_ext1_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG11_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static void _clk_ssi_ext2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + clk->rate = clk->parent->rate; + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL) == 0) { + reg = __raw_readl(MXC_CCM_CSECDR2); + prediv = ((reg & MXC_CCM_CSECDR2_SSI_EXT2_CLK_PRED_MASK) >> + MXC_CCM_CSECDR2_SSI_EXT2_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSECDR2_SSI_EXT2_CLK_PODF_MASK) >> + MXC_CCM_CSECDR2_SSI_EXT2_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (prediv * podf); + } +} + +static int _clk_ssi_ext2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &ssi2_clk[0]) { + reg |= MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL; + } else { + reg &= ~MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &ssi_lp_apm_clk); + reg = (reg & ~MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk ssi_ext2_clk = { + .name = "ssi_ext2_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_ssi_ext2_set_parent, + .recalc = _clk_ssi_ext2_recalc, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG12_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG15_OFFSET, + .disable = _clk_disable, +}; + +static struct clk tmax1_clk = { + .name = "tmax1_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG0_OFFSET, + .disable = _clk_disable, +}; + +static struct clk tmax2_clk = { + .name = "tmax2_clk", + .id = 0, + .parent = &ahb_clk, + .secondary = &ahb_max_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG1_OFFSET, + .disable = _clk_disable, +}; + +static void _clk_usboh2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_USBOH2_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_USBOH2_CLK_PRED_OFFSET) + 1; + if (prediv == 1) + BUG(); + podf = ((reg & MXC_CCM_CSCDR1_USBOH2_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_USBOH2_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_usboh2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_USBOH2_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_USBOH2_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +/* + * This is USB core clock. + ** need access DDR/iram, TMAX + */ +static struct clk usb_core_clk[] = { + { + .name = "usb_ahb_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG11_OFFSET, + .disable = _clk_disable, + .secondary = &usb_core_clk[1], + }, + { + .name = "usb_tmax_clk", + .parent = &tmax1_clk, + .secondary = &usb_core_clk[2], + }, + { + .name = "usb_ddr_clk", + .parent = &emi_fast_clk, +#if defined CONFIG_USB_STATIC_IRAM_PPH || defined CONFIG_USB_STATIC_IRAM + .secondary = &usb_core_clk[3], +#endif + }, + /* iram patch, need access internal ram */ + { + .name = "usb_iram_clk", + .parent = &emi_intr_clk, + }, +}; + +/* used for connecting external PHY */ +static struct clk usboh2_clk = { + .name = "usboh2_clk", + .parent = &pll3_sw_clk, + .set_parent = _clk_usboh2_set_parent, + .recalc = _clk_usboh2_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG12_OFFSET, + .disable = _clk_disable, +}; + +static void _clk_usb_phy_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + if (clk->parent == &pll3_sw_clk) { + reg = __raw_readl(MXC_CCM_CDCDR); + prediv = ((reg & MXC_CCM_CDCDR_USB_PHY_PRED_MASK) >> + MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_USB_PHY_PODF_MASK) >> + MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); + } else + clk->rate = clk->parent->rate; +} + +static int _clk_usb_phy_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &osc_clk) { + reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL; + } else if (parent == &pll3_sw_clk) { + reg |= MXC_CCM_CSCMR1_USB_PHY_CLK_SEL; + } else { + BUG(); + } + + __raw_writel(reg, MXC_CCM_CSCMR1); + return 0; +} + +static struct clk usb_phy_clk = { + .name = "usb_phy_clk", + .parent = &osc_clk, + .set_parent = _clk_usb_phy_set_parent, + .recalc = _clk_usb_phy_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG6_OFFSET, + .disable = _clk_disable, +}; + +static struct clk esdhc_dep_clks = { + .name = "sd_dep_clk", + .parent = &spba_clk, + .secondary = &emi_fast_clk, +}; + + +static void _clk_esdhc1_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_esdhc1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc1_clk[] = { + { + .name = "esdhc_clk", + .id = 0, + .parent = &pll3_sw_clk, + .set_parent = _clk_esdhc1_set_parent, + .recalc = _clk_esdhc1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG14_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc1_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG13_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc1_clk[2], + }, + { + .name = "esdhc1_sec_clk", + .parent = &tmax2_clk, + .secondary = &esdhc_dep_clks, + }, +}; + +static void _clk_esdhc2_recalc(struct clk *clk) +{ + u32 reg, prediv, podf; + + reg = __raw_readl(MXC_CCM_CSCDR1); + prediv = ((reg & MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK) >> + MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET) + 1; + + clk->rate = clk->parent->rate / (prediv * podf); +} + +static int _clk_esdhc2_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &lp_apm_clk); + reg = __raw_readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK; + reg |= mux << MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc2_clk[] = { + { + .name = "esdhc_clk", + .id = 1, + .parent = &pll3_sw_clk, + .set_parent = _clk_esdhc2_set_parent, + .recalc = _clk_esdhc2_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG0_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc2_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR2, + .enable_shift = MXC_CCM_CCGR2_CG15_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc2_clk[2], + }, + { + .name = "esdhc2_sec_clk", + .parent = &ahb_max_clk, + .secondary = &esdhc_dep_clks, + }, +}; + +static int _clk_esdhc3_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &esdhc1_clk[0]) { + reg &= ~MXC_CCM_CSCMR1_ESDHC3_CLK_SEL; + } else if (parent == &esdhc2_clk[0]) { + reg |= MXC_CCM_CSCMR1_ESDHC3_CLK_SEL; + } else { + BUG(); + } + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk esdhc3_clk[] = { + { + .name = "esdhc_clk", + .id = 2, + .parent = &esdhc1_clk[0], + .set_parent = _clk_esdhc3_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG2_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc3_clk[1], + }, + { + .name = "esdhc_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG1_OFFSET, + .disable = _clk_disable, + .secondary = &esdhc3_clk[2], + }, + { + .name = "esdhc3_sec_clk", + .parent = &ahb_max_clk, + .secondary = &esdhc_dep_clks, + }, + +}; + +static void _clk_nfc_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CBCDR7); + div = ((reg & MXC_CCM_CBCDR7_NFC_PODF_MASK) >> + MXC_CCM_CBCDR7_NFC_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / div; +} + +static int _clk_nfc_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, stat; + + div = clk->parent->rate / rate; + if (div == 0) + div++; + if (((clk->parent->rate / div) != rate) || (div > 8)) + return -EINVAL; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.enable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.enable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.enable(&emi_intr_clk); + + reg = __raw_readl(MXC_CCM_CBCDR7); + reg &= ~MXC_CCM_CBCDR7_NFC_PODF_MASK; + reg |= (div - 1) << MXC_CCM_CBCDR7_NFC_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CBCDR7); + + /* Set the Load-dividers bit in CCM */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_LOAD_DIVIDERS; + __raw_writel(reg, MXC_CCM_CCDR); + + do { + stat = __raw_readl(MXC_CCM_CCDR) & MXC_CCM_CCDR_LOAD_DIVIDERS; + } while (stat); + clk->rate = rate; + + if (emi_fast_clk.usecount == 0) + emi_fast_clk.disable(&emi_fast_clk); + if (emi_slow_clk.usecount == 0) + emi_slow_clk.disable(&emi_slow_clk); + if (emi_intr_clk.usecount == 0) + emi_intr_clk.disable(&emi_intr_clk); + + return 0; +} + +static unsigned long _clk_nfc_round_rate(struct clk *clk, + unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + if (div > 8) + div = 8; + else if (div == 0) + div++; + return clk->parent->rate / div; +} + +static struct clk nfc_clk = { + .name = "nfc_clk", + .parent = &emi_core_clk, + .secondary = &emi_slow_clk, + .recalc = _clk_nfc_recalc, + .set_rate = _clk_nfc_set_rate, + .round_rate = _clk_nfc_round_rate, +}; + +static int _clk_spdif_xtal_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CSCMR1); + if (parent == &osc_clk) { + reg &= ~MXC_CCM_CSCMR1_SPDIF_CLK_SEL; + } else if (parent == &ckih_clk) { + reg |= MXC_CCM_CSCMR1_SPDIF_CLK_SEL; + } else { + BUG(); + } + __raw_writel(reg, MXC_CCM_CSCMR1); + + return 0; +} + +static struct clk spdif_xtal_clk = { + .name = "spdif_xtal_clk", + .parent = &osc_clk, + .set_parent = _clk_spdif_xtal_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG10_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_spdif0_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + reg |= MXC_CCM_CSCMR2_SPDIF0_COM; + if (parent != &ssi1_clk[0]) { + reg &= ~MXC_CCM_CSCMR2_SPDIF0_COM; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &spdif_xtal_clk); + reg = (reg & ~MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET); + } + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_spdif0_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + if (clk->parent == &ssi1_clk[0]) { + clk->rate = clk->parent->rate; + } else { + reg = __raw_readl(MXC_CCM_CDCDR); + pred = ((reg & MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK) >> + MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK) >> + MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); + } +} + +static struct clk spdif0_clk[] = { + { + .name = "spdif_clk", + .id = 0, + .parent = &pll3_sw_clk, + .secondary = &spdif0_clk[1], + .set_parent = _clk_spdif0_set_parent, + .recalc = _clk_spdif0_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG11_OFFSET, + .disable = _clk_disable, + }, + { + .name = "spdif_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG10_OFFSET, + .disable = _clk_disable, + }, +}; + +static int _clk_spdif1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + + reg = __raw_readl(MXC_CCM_CSCMR2); + reg |= MXC_CCM_CSCMR2_SPDIF1_COM; + if (parent != &ssi2_clk[0]) { + reg &= ~MXC_CCM_CSCMR2_SPDIF1_COM; + mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, + &spdif_xtal_clk); + reg = (reg & ~MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK) | + (mux << MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET); + } + __raw_writel(reg, MXC_CCM_CSCMR2); + + return 0; +} + +static void _clk_spdif1_recalc(struct clk *clk) +{ + u32 reg, pred, podf; + + if (clk->parent == &ssi2_clk[0]) { + clk->rate = clk->parent->rate; + } else { + reg = __raw_readl(MXC_CCM_CDCDR); + pred = ((reg & MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK) >> + MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET) + 1; + podf = ((reg & MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK) >> + MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET) + 1; + clk->rate = clk->parent->rate / (pred * podf); + } +} + +static struct clk spdif1_clk[] = { + { + .name = "spdif_clk", + .id = 1, + .parent = &pll3_sw_clk, + .secondary = &spdif1_clk[1], + .set_parent = _clk_spdif1_set_parent, + .recalc = _clk_spdif1_recalc, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG12_OFFSET, + .disable = _clk_disable, + }, + { + .name = "spdif_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .secondary = &spba_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR1, + .enable_shift = MXC_CCM_CCGR1_CG10_OFFSET, + .disable = _clk_disable, + }, +}; + +static int _clk_ipu_enable(struct clk *clk) +{ + u32 reg; + + _clk_enable(clk); + /* Handshake with IPU when certain clock rates are changed. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg &= ~MXC_CCM_CCDR_IPU_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); + return 0; +} + +static void _clk_ipu_disable(struct clk *clk) +{ + u32 reg; + _clk_disable(clk); + + /* No handshake with IPU as its not enabled. */ + reg = __raw_readl(MXC_CCM_CCDR); + reg |= MXC_CCM_CCDR_IPU_HS_MASK; + __raw_writel(reg, MXC_CCM_CCDR); +} + +static int _clk_ipu_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CAMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &axi_c_clk, + &emi_core_clk); + reg = (reg & ~MXC_CCM_CAMR_IPU_HSP_CLK_SEL_MASK) | + (mux << MXC_CCM_CAMR_IPU_HSP_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static struct clk ipu_clk[] = { + { + .name = "ipu_clk", + .parent = &axi_a_clk, + .secondary = &ipu_clk[1], + .set_parent = _clk_ipu_set_parent, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG15_OFFSET, + .enable = _clk_ipu_enable, + .disable = _clk_ipu_disable, + .flags = CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "ipu_sec_clk", + .parent = &emi_fast_clk, + .secondary = &ahbmux1_clk, + } +}; + +static int _clk_ipu_di_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + if (parent == &tve_clk) { + mxc_iomux_set_gpr(MUX_IPUv3D_CAMP, false, 0); + } else if (parent == &ckih_clk) { + mxc_iomux_set_gpr(MUX_IPUv3D_CAMP, true, 0); + reg = __raw_readl(MXC_CCM_CSCMR1); + reg |= MXC_CCM_CSCMR1_DI_CLK_SEL; + __raw_writel(reg, MXC_CCM_CSCMR1); + } else if (parent == &osc_clk) { + mxc_iomux_set_gpr(MUX_IPUv3D_CAMP, true, 0); + reg = __raw_readl(MXC_CCM_CSCMR1); + reg &= ~MXC_CCM_CSCMR1_DI_CLK_SEL; + __raw_writel(reg, MXC_CCM_CSCMR1); + } else { + return -EINVAL; + } + + return 0; +} + +static void _clk_ipu_di_recalc(struct clk *clk) +{ + if (clk->parent == &tve_clk) { + clk->rate = clk->parent->rate / 8; + } else { + clk->rate = clk->parent->rate; + } +} + +static struct clk ipu_di_clk = { + .name = "ipu_di_clk", + .parent = &tve_clk, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG14_OFFSET, + .recalc = _clk_ipu_di_recalc, + .set_parent = _clk_ipu_di_set_parent, + .enable = _clk_enable, + .disable = _clk_disable, +}; + +static int _clk_ddr_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CAMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &axi_c_clk, + &emi_core_clk); + reg = (reg & ~MXC_CCM_CAMR_DDR_CLK_SEL_MASK) | + (mux << MXC_CCM_CAMR_DDR_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static struct clk ddr_clk = { + .name = "ddr_clk", + .parent = &axi_c_clk, + .set_parent = _clk_ddr_set_parent, +}; + +static int _clk_arm_axi_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CAMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &axi_c_clk, + &emi_core_clk); + reg = (reg & ~MXC_CCM_CAMR_ARM_AXI_CLK_SEL_MASK) | + (mux << MXC_CCM_CAMR_ARM_AXI_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static struct clk arm_axi_clk = { + .name = "arm_axi_clk", + .parent = &axi_a_clk, + .set_parent = _clk_arm_axi_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR0, + .enable_shift = MXC_CCM_CCGR0_CG1_OFFSET, + .disable = _clk_disable, +}; + +static int _clk_vpu_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CAMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &axi_c_clk, + &emi_core_clk); + reg = (reg & ~MXC_CCM_CAMR_VPU_AXI_CLK_SEL_MASK) | + (mux << MXC_CCM_CAMR_VPU_AXI_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static int _clk_vpu_core_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CAMR); + mux = _get_mux(parent, &axi_a_clk, &axi_b_clk, &axi_c_clk, + &emi_core_clk); + reg = (reg & ~MXC_CCM_CAMR_VPU_CLK_SEL_MASK) | + (mux << MXC_CCM_CAMR_VPU_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CAMR); + + return 0; +} + +static struct clk vpu_clk[] = { + { + .name = "vpu_clk", + .parent = &axi_a_clk, + .set_parent = _clk_vpu_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG7_OFFSET, + .disable = _clk_disable, + .secondary = &vpu_clk[1], + .flags = CPU_FREQ_TRIG_UPDATE, + }, + { + .name = "vpu_core_clk", + .parent = &axi_a_clk, + .secondary = &vpu_clk[2], + .set_parent = _clk_vpu_core_set_parent, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGR5_CG6_OFFSET, + .disable = _clk_disable, + }, + { + .name = "vpu_emi_clk", + .parent = &emi_fast_clk, +#ifdef CONFIG_MXC_VPU_IRAM + .secondary = &emi_intr_clk, +#endif + } +}; + +static int _clk_lpsr_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg, mux; + reg = __raw_readl(MXC_CCM_CLPCR); + mux = _get_mux(parent, &ckil_clk, &fpm_clk, &fpm_div2_clk, NULL); + reg = (reg & ~MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK) | + (mux << MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CLPCR); + + return 0; +} + +static struct clk lpsr_clk = { + .name = "lpsr_clk", + .parent = &ckil_clk, + .set_parent = _clk_lpsr_set_parent, +}; + +static void _clk_pgc_recalc(struct clk *clk) +{ + u32 reg, div; + + reg = __raw_readl(MXC_CCM_CSCDR1); + div = (reg & MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK) >> + MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET; + div = 1 >> div; + clk->rate = clk->parent->rate / div; +} + +static struct clk pgc_clk = { + .name = "pgc_clk", + .parent = &ipg_clk, + .recalc = _clk_pgc_recalc, +}; + +/*usb OTG clock */ +/*Notes: in mx37, usb clock get from UTMI PHY, always 60MHz*/ + +static struct clk usb_clk = { + .name = "usb_clk", + .rate = 60000000, +}; + +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ckil_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR4, + .enable_shift = MXC_CCM_CCGR4_CG13_OFFSET, + .disable = _clk_disable, +}; + +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG14_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rng_clk = { + .name = "rng_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CCGR3, + .enable_shift = MXC_CCM_CCGR3_CG5_OFFSET, + .disable = _clk_disable, +}; + +static struct clk scc_clk = { + .name = "scc_clk", + .parent = &ipg_clk, + .secondary = &emi_fast_clk, +}; + +static void cko1_recalc(struct clk *clk) +{ + unsigned long rate; + u32 reg; + + reg = __raw_readl(MXC_CCM_CCOSR); + reg &= MXC_CCM_CCOSR_CKOL_DIV_MASK; + reg = reg >> MXC_CCM_CCOSR_CKOL_DIV_OFFSET; + rate = clk->parent->rate; + clk->rate = rate / (reg + 1); +} + +static int cko1_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CCOSR); + reg |= MXC_CCM_CCOSR_CKOL_EN; + __raw_writel(reg, MXC_CCM_CCOSR); + return 0; +} + +static void cko1_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_CCOSR); + reg &= ~MXC_CCM_CCOSR_CKOL_EN; + __raw_writel(reg, MXC_CCM_CCOSR); +} + +static int cko1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div; + + div = (clk->parent->rate/rate - 1) & 0x7; + reg = __raw_readl(MXC_CCM_CCOSR); + reg &= ~MXC_CCM_CCOSR_CKOL_DIV_MASK; + reg |= div << MXC_CCM_CCOSR_CKOL_DIV_OFFSET; + __raw_writel(reg, MXC_CCM_CCOSR); + return 0; +} + +static unsigned long cko1_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div; + + div = clk->parent->rate / rate; + div = div < 1 ? 1 : div; + div = div > 8 ? 8 : div; + return clk->parent->rate / div; +} + +static int cko1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 sel, reg; + + if (parent == &cpu_clk) + sel = 0; + else if (parent == &pll1_sw_clk) + sel = 1; + else if (parent == &pll2_sw_clk) + sel = 2; + else if (parent == &pll3_sw_clk) + sel = 3; + else if (parent == &emi_core_clk) + sel = 4; + else if (parent == &nfc_clk) + sel = 6; + else if (parent == &vpu_clk[1]) + sel = 7; + else if (parent == &ipu_di_clk) + sel = 8; + else if (parent == &ahb_clk) + sel = 11; + else if (parent == &ipg_clk) + sel = 12; + else if (parent == &ipg_perclk) + sel = 13; + else + return -EINVAL; + + reg = __raw_readl(MXC_CCM_CCOSR); + reg &= ~MXC_CCM_CCOSR_CKOL_SEL_MASK; + reg |= sel << MXC_CCM_CCOSR_CKOL_SEL_OFFSET; + __raw_writel(reg, MXC_CCM_CCOSR); + return 0; +} +static struct clk cko1_clk = { + .name = "cko1_clk", + .recalc = cko1_recalc, + .enable = cko1_enable, + .disable = cko1_disable, + .set_rate = cko1_set_rate, + .round_rate = cko1_round_rate, + .set_parent = cko1_set_parent, +}; + +static struct clk *mxc_clks[] = { + &osc_clk, + &ckih_clk, + &ckil_clk, + &fpm_clk, + &fpm_div2_clk, + &pll1_main_clk, + &pll1_sw_clk, + &pll2_sw_clk, + &pll3_sw_clk, + &gpc_dvfs_clk, + &lp_apm_clk, + &cpu_clk, + &periph_apm_clk, + &main_bus_clk, + &axi_a_clk, + &axi_b_clk, + &axi_c_clk, + &ahb_clk, + &ahb_max_clk, + &aips_tz1_clk, + &aips_tz2_clk, + &ipg_clk, + &ipg_perclk, + &sdma_clk[0], + &sdma_clk[1], + &ipu_clk[0], + &ipu_clk[1], + &ipu_di_clk, + &tve_clk, + &uart_main_clk, + &uart1_clk[0], + &uart1_clk[1], + &uart2_clk[0], + &uart2_clk[1], + &uart3_clk[0], + &uart3_clk[1], + &spba_clk, + &i2c_clk[0], + &i2c_clk[1], + &i2c_clk[2], + &gpt_clk[0], + &gpt_clk[1], + &gpt_clk[2], + &cspi_main_clk, + &cspi1_clk[0], + &cspi1_clk[1], + &cspi2_clk[0], + &cspi2_clk[1], + &cspi3_clk[0], + &cspi3_clk[1], + &ssi_lp_apm_clk, + &ssi1_clk[0], + &ssi1_clk[1], + &ssi2_clk[0], + &ssi2_clk[1], + &ssi_ext1_clk, + &ssi_ext2_clk, + &iim_clk, + &tmax1_clk, + &tmax2_clk, + &ahbmux1_clk, + &ahbmux2_clk, + &usb_core_clk[0], + &usb_core_clk[1], + &usb_core_clk[2], + &usb_core_clk[3], + &usboh2_clk, + &usb_phy_clk, + &usb_clk, + &esdhc1_clk[0], + &esdhc1_clk[1], + &esdhc1_clk[2], + &esdhc2_clk[0], + &esdhc2_clk[1], + &esdhc2_clk[2], + &esdhc3_clk[0], + &esdhc3_clk[1], + &esdhc3_clk[2], + &esdhc_dep_clks, + &emi_core_clk, + &emi_fast_clk, + &emi_slow_clk, + &emi_intr_clk, + &nfc_clk, + &spdif_xtal_clk, + &spdif0_clk[0], + &spdif0_clk[1], + &spdif1_clk[0], + &spdif1_clk[1], + &ddr_clk, + &arm_axi_clk, + &vpu_clk[0], + &vpu_clk[1], + &vpu_clk[2], + &lpsr_clk, + &pgc_clk, + &rtc_clk, + &ata_clk, + &rng_clk, + &scc_clk, + &cko1_clk, +}; + +static void clk_tree_init(void) +{ + u32 reg, dp_ctl; + + ipg_perclk.set_parent(&ipg_perclk, &lp_apm_clk); + + /* + *Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at + * 8MHz, its derived from lp_apm. + */ + reg = __raw_readl(MXC_CCM_CBCDR2); + reg &= ~MXC_CCM_CBCDR2_PERCLK_PRED1_MASK; + reg &= ~MXC_CCM_CBCDR2_PERCLK_PRED2_MASK; + reg &= ~MXC_CCM_CBCDR2_PERCLK_PODF_MASK; + reg |= (2 << MXC_CCM_CBCDR2_PERCLK_PRED1_OFFSET); + __raw_writel(reg, MXC_CCM_CBCDR2); + + /* set pll1_main_clk parent */ + pll1_main_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[0] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll1_main_clk.parent = &fpm_clk; + /* set pll2_sw_clk parent */ + pll2_sw_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[1] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll2_sw_clk.parent = &fpm_clk; + /* set pll3_clk parent */ + pll3_sw_clk.parent = &osc_clk; + dp_ctl = __raw_readl(pll_base[2] + MXC_PLL_DP_CTL); + if ((dp_ctl & MXC_PLL_DP_CTL_REF_CLK_SEL_MASK) == 0) + pll3_sw_clk.parent = &fpm_clk; + + /* set emi_core_clk parent */ + emi_core_clk.parent = &main_bus_clk; + reg = __raw_readl(MXC_CCM_CBCDR6); + if ((reg & MXC_CCM_CBCDR6_EMI_CLK_SEL) != 0) { + emi_core_clk.parent = &ahb_clk; + } + + /* set ipg_perclk parent */ + ipg_perclk.parent = &lp_apm_clk; + reg = __raw_readl(MXC_CCM_CSCMR1); + if ((reg & MXC_CCM_CSCMR1_PERCLK_IPG_CLK_SEL) != 0) { + ipg_perclk.parent = &ipg_clk; + } else { + if ((reg & MXC_CCM_CSCMR1_PERCLK_LP_APM_CLK_SEL) == 0) + ipg_perclk.parent = &main_bus_clk; + } + + /* set DDR clock parent */ + reg = __raw_readl(MXC_CCM_CAMR) & MXC_CCM_CAMR_DDR_CLK_SEL_MASK; + reg >>= MXC_CCM_CAMR_DDR_CLK_SEL_OFFSET; + if (reg == 0) { + ddr_clk.parent = &axi_a_clk; + } else if (reg == 1) { + ddr_clk.parent = &axi_b_clk; + } else if (reg == 2) { + ddr_clk.parent = &axi_c_clk; + } else { + ddr_clk.parent = &emi_core_clk; + } +} + +int __init mx37_clocks_init(unsigned long ckil, unsigned long osc, unsigned long ckih1, unsigned long ckih2) +{ + struct clk **clkp; + u32 reg; + int i; + + /* Turn off all possible clocks */ + if (mxc_jtag_enabled) { + __raw_writel((1 << MXC_CCM_CCGR0_CG0_OFFSET) | + (1 << MXC_CCM_CCGR0_CG1_OFFSET) | + (1 << MXC_CCM_CCGR0_CG2_OFFSET) | + (1 << MXC_CCM_CCGR0_CG12_OFFSET) | + (1 << MXC_CCM_CCGR0_CG13_OFFSET) | + (1 << MXC_CCM_CCGR0_CG7_OFFSET) | + (1 << MXC_CCM_CCGR0_CG14_OFFSET), MXC_CCM_CCGR0); + } else { + __raw_writel((1 << MXC_CCM_CCGR0_CG0_OFFSET) | + (1 << MXC_CCM_CCGR0_CG1_OFFSET) | + (1 << MXC_CCM_CCGR0_CG12_OFFSET) | + (1 << MXC_CCM_CCGR0_CG13_OFFSET) | + (1 << MXC_CCM_CCGR0_CG7_OFFSET) | + (1 << MXC_CCM_CCGR0_CG14_OFFSET), MXC_CCM_CCGR0); + } + __raw_writel(0, MXC_CCM_CCGR1); + + /* TMAX clocks. */ + reg = __raw_readl(MXC_CCM_CCGR1); + reg |= 1 << MXC_CCM_CCGR1_CG0_OFFSET; + reg |= 1 << MXC_CCM_CCGR1_CG1_OFFSET; + __raw_writel(reg, MXC_CCM_CCGR1); + __raw_writel(0, MXC_CCM_CCGR2); + __raw_writel(0, MXC_CCM_CCGR3); + __raw_writel(0, MXC_CCM_CCGR4); + /* Initialise the EMI clocks to be OFF when ARM is in WAIT mode. */ + __raw_writel((1 << MXC_CCM_CCGR5_CG4_OFFSET) | + (1 << MXC_CCM_CCGR5_CG12_OFFSET) | + (1 << MXC_CCM_CCGR5_CG13_OFFSET) | + (1 << MXC_CCM_CCGR5_CG14_OFFSET) | + MXC_CCM_CCGR5_CG11_MASK, MXC_CCM_CCGR5); + + ckil_clk.rate = ckil; + ckih_clk.rate = ckih1; + osc_clk.rate = osc; + + clk_tree_init(); + + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + + reg = __raw_readl(MXC_CCM_CCSR); + /*STEP_CLK mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); + - make sure its source is lp_apm */ + reg &= ~MXC_CCM_CCSR_STEP_SEL_MASK; + __raw_writel(reg, MXC_CCM_CCSR); + + /* This will propagate to all children and init all the clock rates */ + propagate_rate(&osc_clk); + propagate_rate(&ckih_clk); + propagate_rate(&ckil_clk); + + _clk_pll_disable(&pll3_sw_clk); + + clk_enable(&cpu_clk); + clk_enable(&main_bus_clk); + + /* Move UART to run from pll2_sw_clk */ + clk_set_parent(&uart_main_clk, &pll2_sw_clk); + + /* Set the UART dividers to divide by 10, so the UART_CLK is 66.5MHz. */ + reg = __raw_readl(MXC_CCM_CSCDR1); + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PRED_MASK; + reg |= (4 << MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) | + (1 << MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET); + __raw_writel(reg, MXC_CCM_CSCDR1); + + /* move cspi to 24MHz */ + clk_set_parent(&cspi_main_clk, &lp_apm_clk); + clk_set_rate(&cspi_main_clk, 12000000); + + /*move the spdif0 to spdif_xtal_ckl */ + clk_set_parent(&spdif0_clk[0], &spdif_xtal_clk); + /*set the SPDIF dividers to 1 */ + reg = __raw_readl(MXC_CCM_CDCDR); + reg &= ~MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK; + reg &= ~MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK; + __raw_writel(reg, MXC_CCM_CDCDR); + + /* move the spdif1 to 24MHz */ + clk_set_parent(&spdif1_clk[0], &spdif_xtal_clk); + /* set the spdif1 dividers to 1 */ + reg = __raw_readl(MXC_CCM_CDCDR); + reg &= ~MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK; + reg &= ~MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK; + __raw_writel(reg, MXC_CCM_CDCDR); + + /* Move SSI clocks to SSI_LP_APM clock */ + clk_set_parent(&ssi_lp_apm_clk, &lp_apm_clk); + + clk_set_parent(&ssi1_clk[0], &ssi_lp_apm_clk); + /* set the SSI dividers to divide by 2 */ + reg = __raw_readl(MXC_CCM_CS1CDR); + reg &= ~MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK; + reg &= ~MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK; + reg |= 1 << MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CS1CDR); + + clk_set_parent(&ssi2_clk[0], &ssi_lp_apm_clk); + reg = __raw_readl(MXC_CCM_CS2CDR); + reg &= ~MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK; + reg &= ~MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK; + reg |= 1 << MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET; + __raw_writel(reg, MXC_CCM_CS2CDR); + + /* Change the SSI_EXT1_CLK to be sourced from SSI1_CLK_ROOT */ + clk_set_parent(&ssi_ext1_clk, &ssi1_clk[0]); + clk_set_parent(&ssi_ext2_clk, &ssi2_clk[0]); + + propagate_rate(&ssi_lp_apm_clk); + + clk_set_parent(&arm_axi_clk, &emi_core_clk); + + clk_set_parent(&ipu_clk[0], &axi_a_clk); + clk_set_parent(&vpu_clk[0], &axi_a_clk); + clk_set_parent(&vpu_clk[1], &axi_a_clk); + + clk_set_rate(&emi_intr_clk, clk_round_rate(&emi_intr_clk, 66000000)); + /* Change the NFC clock rate to be 1:3 ratio with emi clock. */ + clk_set_rate(&nfc_clk, clk_round_rate(&nfc_clk, + (clk_get_rate(&emi_slow_clk))/3)); + + clk_set_parent(&usb_phy_clk, &osc_clk); + + clk_set_parent(&periph_apm_clk, &lp_apm_clk); + + clk_set_parent(&cko1_clk, &ipg_perclk); + clk_set_rate(&cko1_clk, 8000000); + + /* Set the current working point. */ + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + for (i = 0; i < cpu_wp_nr; i++) { + if (clk_get_rate(&cpu_clk) == cpu_wp_tbl[i].cpu_rate) { + cpu_curr_wp = i; + break; + } + } + if (i > cpu_wp_nr) + BUG(); + + propagate_rate(&osc_clk); + propagate_rate(&pll1_sw_clk); + propagate_rate(&pll2_sw_clk); + +#ifdef DVFS_SW_WORKAROUND + clk_set_parent(&periph_apm_clk, &pll3_sw_clk); + + clk_set_parent(&main_bus_clk, &periph_apm_clk); + clk_disable(&pll2_sw_clk); + clk_set_rate(&pll2_sw_clk, 266000000); + pll2_sw_clk.recalc(&pll2_sw_clk); + clk_enable(&pll2_sw_clk); + clk_set_parent(&main_bus_clk, &pll2_sw_clk); + + clk_set_rate(&ahb_clk, clk_round_rate(&ahb_clk, 130000000)); + clk_set_rate(&axi_b_clk, clk_round_rate(&axi_b_clk, 110000000)); + clk_set_rate(&axi_c_clk, clk_round_rate(&axi_c_clk, 166000000)); + clk_set_rate(&axi_a_clk, clk_round_rate(&axi_a_clk, 130000000)); + + clk_set_parent(&emi_core_clk, &ahb_clk); + clk_set_rate(&emi_core_clk, clk_round_rate(&emi_core_clk, 130000000)); + clk_set_rate(&emi_intr_clk, clk_round_rate(&emi_intr_clk, 66000000)); + + clk_set_rate(&axi_c_clk, clk_round_rate(&axi_c_clk, 130000000)); + clk_set_parent(&ddr_clk, &axi_c_clk); + /* Set the UART dividers to divide by 6, so the UART_CLK is 66.5MHz. */ + reg = __raw_readl(MXC_CCM_CSCDR1); + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR1_UART_CLK_PRED_MASK; + reg |= (3 << MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET) | + (0 << MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET); + __raw_writel(reg, MXC_CCM_CSCDR1); +#endif + + mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); + + return 0; +} + +/*! + * Setup cpu clock based on working point. + * @param wp cpu freq working point + * @return 0 on success or error code on failure. + */ +static int cpu_clk_set_wp(int wp) +{ + struct cpu_wp *p; + u32 reg; + u32 stat; + + if (wp == cpu_curr_wp) + return 0; + + p = &cpu_wp_tbl[wp]; + + if (!dvfs_core_is_active) { + /* Change the ARM clock to requested frequency */ + /* First move the ARM clock to step clock */ + /* which is running at 24MHz. */ + + /* Change the source of pll1_sw_clk to be the step_clk */ + reg = __raw_readl(MXC_CCM_CCSR); + reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); + + /* Stop the PLL */ + reg = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + reg &= ~MXC_PLL_DP_CTL_UPEN; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + + /* PDF and MFI */ + reg = p->pdf | p->mfi << MXC_PLL_DP_OP_MFI_OFFSET; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_OP); + + /* MFD */ + __raw_writel(p->mfd, MXC_DPLL1_BASE + MXC_PLL_DP_MFD); + + /* MFI */ + __raw_writel(p->mfn, MXC_DPLL1_BASE + MXC_PLL_DP_MFN); + + reg = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + reg |= MXC_PLL_DP_CTL_UPEN; + /* Set the UPEN bits */ + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + /* Forcefully restart the PLL */ + reg |= MXC_PLL_DP_CTL_RST; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CTL); + + /* Wait for the PLL to lock */ + do { + stat = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL) & + MXC_PLL_DP_CTL_LRF; + } while (!stat); + + reg = __raw_readl(MXC_CCM_CCSR); + /* Move the PLL1 back to the pll1_main_clk */ + reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL; + __raw_writel(reg, MXC_CCM_CCSR); + } + cpu_curr_wp = wp; + + pll1_sw_clk.rate = cpu_wp_tbl[wp].cpu_rate; + pll1_main_clk.rate = pll1_sw_clk.rate; + cpu_clk.rate = pll1_sw_clk.rate; + +#if defined(CONFIG_CPU_FREQ) + cpufreq_trig_needed = 1; +#endif + + if (wp == 0) + dptc_resume(DPTC_GP_ID); + else + dptc_suspend(DPTC_GP_ID); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/usb_dr.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/usb_dr.c @@ -0,0 +1,165 @@ +/* + * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include "usb.h" + +static void usbotg_pm_clock(bool on); +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable); + +/* + * platform data structs + * - Which one to use is determined by CONFIG options in usb.h + * - operating_mode plugged at run time + */ +static struct fsl_usb2_platform_data __maybe_unused dr_utmi_config = { + .name = "DR", + .platform_init = usbotg_init_ext, + .platform_uninit = usbotg_uninit_ext, + .phy_mode = FSL_USB2_PHY_UTMI_WIDE, + .power_budget = 500, /* 500 mA max power */ + .gpio_usb_active = gpio_usbotg_hs_active, + .gpio_usb_inactive = gpio_usbotg_hs_inactive, + .usb_clock_for_pm = usbotg_pm_clock, + .wake_up_enable = _wake_up_enable, + .transceiver = "utmi", +}; + + +/* + * resources + */ +static struct resource otg_resources[] = { + [0] = { + .start = (u32)(OTG_BASE_ADDR), + .end = (u32)(OTG_BASE_ADDR + 0x620), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_USB_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + + +static u64 dr_udc_dmamask = ~(u32) 0; +static void dr_udc_release(struct device *dev) +{ +} + +/* + * platform device structs + * dev.platform_data field plugged at run time + */ +static struct platform_device dr_udc_device = { + .name = "fsl-usb2-udc", + .id = -1, + .dev = { + .release = dr_udc_release, + .dma_mask = &dr_udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +static u64 dr_otg_dmamask = ~(u32) 0; +static void dr_otg_release(struct device *dev) +{} + +static struct platform_device __maybe_unused dr_otg_device = { + .name = "fsl-usb2-otg", + .id = -1, + .dev = { + .release = dr_otg_release, + .dma_mask = &dr_otg_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .resource = otg_resources, + .num_resources = ARRAY_SIZE(otg_resources), +}; + +/* Notes: configure USB clock*/ +static int usbotg_init_ext(struct platform_device *pdev) +{ + struct clk *usb_clk, *usboh2_clk; + int ret; + + usboh2_clk = clk_get(NULL, "usboh2_clk"); + clk_enable(usboh2_clk); + + usb_clk = clk_get(NULL, "usb_phy_clk"); + clk_enable(usb_clk); + clk_put(usb_clk); + + ret = usbotg_init(pdev); + + /* this clock is no use after set portsc PTS bit */ + clk_disable(usboh2_clk); + clk_put(usboh2_clk); + + return ret; +} + +static void usbotg_pm_clock(bool on) +{ + struct clk *usb_clk; + + usb_clk = clk_get(NULL, "usb_phy_clk"); + /* close and open usb phy clock for suspend and resume */ + if (on) { + clk_enable(usb_clk); + } else { + clk_disable(usb_clk); + } + clk_put(usb_clk); +} + +static void usbotg_uninit_ext(struct fsl_usb2_platform_data *pdata) +{ + usbotg_pm_clock(false); + usbotg_uninit(pdata); +} + +static void _wake_up_enable(struct fsl_usb2_platform_data *pdata, bool enable) +{ + if (get_usb_mode(pdata) == FSL_USB_DR_DEVICE) { + if (enable) { + USBCTRL |= (UCTRL_OWIE | UCTRL_VBUS_WKUP_EN); + USB_PHY_CTR_FUNC |= USB_UTMI_PHYCTRL_CONF2; + } else { + USBCTRL &= ~UCTRL_OWIE; + USBCTRL &= ~UCTRL_VBUS_WKUP_EN; + USB_PHY_CTR_FUNC &= ~USB_UTMI_PHYCTRL_CONF2; + } + } +} + +static int __init usb_dr_init(void) +{ + pr_debug("%s: \n", __func__); + + dr_register_otg(); + dr_register_host(otg_resources, ARRAY_SIZE(otg_resources)); + dr_register_udc(); + device_init_wakeup(&(dr_udc_device.dev), 1); + return 0; +} + +module_init(usb_dr_init); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/bus_freq.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/bus_freq.c @@ -0,0 +1,462 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @file bus_freq.c + * + * @brief A common API for the Freescale Semiconductor i.MXC CPUfreq module + * and DVFS CORE module. + * + * The APIs are for setting bus frequency to low or high. + * + * @ingroup PM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "iomux.h" +#include "crm_regs.h" + +#define GP_LPM_VOLTAGE 850000 +#define LP_LPM_VOLTAGE 1050000 +#define LP_LOWFREQ_VOLTAGE 1050000 +#define LP_NORMAL_VOLTAGE 1200000 +#define GP_LPAPM_FREQ 200000000 + +DEFINE_SPINLOCK(bus_freq_lock); + +struct clk *main_bus_clk; +struct clk *pll2; +struct clk *pll1; +struct clk *axi_a_clk; +struct clk *axi_b_clk; +struct clk *axi_c_clk; +struct clk *emi_core_clk; +struct clk *emi_intr_clk; +struct clk *nfc_clk; +struct clk *ahb_clk; +struct clk *vpu_clk; +struct clk *vpu_core_clk; +struct clk *arm_axi_clk; +struct clk *ddr_clk; +struct clk *ipu_clk; +struct clk *periph_apm_clk; +struct clk *lp_apm; +struct clk *cpu_clk; +struct clk *osc; +struct clk *uart_clk; +struct regulator *lp_regulator; +int low_bus_freq_mode; +int high_bus_freq_mode; +char *gp_reg_id = "SW1"; +char *lp_reg_id = "SW2"; +static struct cpu_wp *cpu_wp_tbl; +static int busfreq_suspended; +/* True if bus_frequency is scaled not using DVFS-PER */ +int bus_freq_scaling_is_active; + +struct dvfs_wp dvfs_core_setpoint[] = { + {33, 8, 33, 10, 10, 0x08}, + {26, 0, 33, 20, 10, 0x08}, + {28, 8, 33, 20, 30, 0x08}, + {26, 0, 33, 20, 10, 0x08},}; + +int set_low_bus_freq(void) +{ + int ret = 0; + unsigned long flags; + unsigned long lp_lpm_clk; + + if (busfreq_suspended) + return ret; + + if (low_bus_freq_mode || (clk_get_rate(cpu_clk) != GP_LPAPM_FREQ)) { + return ret; + } + + stop_dvfs_per(); + + spin_lock_irqsave(&bus_freq_lock, flags); + + lp_lpm_clk = clk_get_rate(periph_apm_clk) / 8; + + /* Set the parent of peripheral_apm_clk to be pll1 */ + clk_set_parent(periph_apm_clk, pll1); + /* Set the LP clocks */ + clk_set_parent(main_bus_clk, periph_apm_clk); + + clk_set_rate(axi_a_clk, clk_round_rate(axi_a_clk, lp_lpm_clk)); + clk_set_rate(axi_b_clk, clk_round_rate(axi_b_clk, lp_lpm_clk)); + clk_set_rate(axi_c_clk, clk_round_rate(axi_c_clk, lp_lpm_clk)); + clk_set_rate(emi_core_clk, clk_round_rate(emi_core_clk, lp_lpm_clk)); + clk_set_rate(ahb_clk, clk_round_rate(ahb_clk, lp_lpm_clk)); + /* Set the emi_intr_clk to be at 24MHz. */ + clk_set_rate(emi_intr_clk, clk_round_rate(emi_intr_clk, lp_lpm_clk)); + + low_bus_freq_mode = 1; + high_bus_freq_mode = 0; + + spin_unlock_irqrestore(&bus_freq_lock, flags); + + /* Set the voltage to 1.05V for the LP domain. */ + ret = regulator_set_voltage(lp_regulator, 1050000, 1050000); + udelay(100); + if (ret < 0) { + printk(KERN_ERR "COULD NOT SET LP VOLTAGE!!!!!!\n"); + return ret; + } + + return ret; +} + +int set_high_bus_freq(int high_bus_freq) +{ + int ret = 0; + unsigned long flags; + unsigned long lp_lpm_clk; + + if (!low_bus_freq_mode) + return ret; + + if (dvfs_per_active()) + return ret; + + /* Set the voltage to 1.25V for the LP domain. */ + ret = regulator_set_voltage(lp_regulator, 1250000, 1250000); + udelay(100); + if (ret < 0) { + printk(KERN_ERR "COULD NOT SET LP VOLTAGE!!!!!!\n"); + return ret; + } + + spin_lock_irqsave(&bus_freq_lock, flags); + + low_bus_freq_mode = 0; + + /* Set the LP clocks. */ + lp_lpm_clk = clk_get_rate(periph_apm_clk); + clk_set_rate(axi_a_clk, clk_round_rate(axi_a_clk, lp_lpm_clk/5)); + clk_set_rate(axi_b_clk, clk_round_rate(axi_b_clk, lp_lpm_clk/5)); + clk_set_rate(axi_c_clk, clk_round_rate(axi_c_clk, lp_lpm_clk/5)); + clk_set_rate(emi_core_clk, clk_round_rate(emi_core_clk, lp_lpm_clk/5)); + clk_set_rate(ahb_clk, clk_round_rate(ahb_clk, lp_lpm_clk/5)); + /* Set emi_intr clock back to divide by 2. */ + clk_set_rate(emi_intr_clk, clk_round_rate(emi_intr_clk, lp_lpm_clk/10)); + + /* Set the parent of main_bus_clk to be pll2 */ + clk_set_parent(main_bus_clk, pll2); + + high_bus_freq_mode = 1; + + spin_unlock_irqrestore(&bus_freq_lock, flags); + + start_dvfs_per(); + return ret; +} + +int low_freq_bus_used(void) +{ + if ((clk_get_usecount(ipu_clk) == 0) + && (clk_get_usecount(vpu_clk) == 0)) + return 1; + else + return 0; +} + +void setup_pll(void) +{ + u32 reg; + u32 hfsm; + struct cpu_wp *p; + + /* Setup the DPLL registers */ + hfsm = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CTL) & + MXC_PLL_DP_CTL_HFSM; + reg = __raw_readl(MXC_DPLL1_BASE + MXC_PLL_DP_CONFIG); + reg &= ~MXC_PLL_DP_CONFIG_AREN; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_CONFIG); + + if (hfsm) { + /* Running at lower frequency, need to bump up. */ + p = &cpu_wp_tbl[0]; + /* PDF and MFI */ + reg = p->pdf | p->mfi << MXC_PLL_DP_OP_MFI_OFFSET; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_OP); + + /* MFD */ + __raw_writel(p->mfd, MXC_DPLL1_BASE + MXC_PLL_DP_MFD); + + /* MFI */ + __raw_writel(p->mfn, MXC_DPLL1_BASE + MXC_PLL_DP_MFN); + } else { + /* Running at high frequency, need to lower it. */ + p = &cpu_wp_tbl[1]; + /* PDF and MFI */ + reg = p->pdf | p->mfi << MXC_PLL_DP_OP_MFI_OFFSET; + __raw_writel(reg, MXC_DPLL1_BASE + MXC_PLL_DP_HFS_OP); + + /* MFD */ + __raw_writel(p->mfd, MXC_DPLL1_BASE + MXC_PLL_DP_HFS_MFD); + + /* MFN */ + __raw_writel(p->mfn, MXC_DPLL1_BASE + MXC_PLL_DP_HFS_MFN); + } + if (clk_get_usecount(pll2) != 0) { + /* Set the temporal frequency to be PLL2 */ + /* Set PLL2_PODF to be 3. */ + reg = __raw_readl(MXC_CCM_CCSR); + reg |= 2 << MXC_CCM_CCSR_PLL2_PODF_OFFSET; + __raw_writel(reg, MXC_CCM_CCSR); + /* Set the parent of STEP_CLK to be PLL2 */ + reg = __raw_readl(MXC_CCM_CCSR); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (2 << MXC_CCM_CCSR_STEP_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CCSR); + } else { + /* Set the temporal frequency to be lp-apm */ + /* Set the parent of STEP_CLK to be lp-apm */ + reg = __raw_readl(MXC_CCM_CCSR); + reg = (reg & ~MXC_CCM_CCSR_STEP_SEL_MASK) | + (0 << MXC_CCM_CCSR_STEP_SEL_OFFSET); + __raw_writel(reg, MXC_CCM_CCSR); + } +} + +static int busfreq_suspend(struct platform_device *pdev, pm_message_t message) +{ + if (low_bus_freq_mode) + set_high_bus_freq(1); + busfreq_suspended = 1; + return 0; +} + +static int busfreq_resume(struct platform_device *pdev) +{ + busfreq_suspended = 0; + return 0; +} + +/*! + * This is the probe routine for the bus frequency driver. + * + * @param pdev The platform device structure + * + * @return The function returns 0 on success + * + */ +static int __devinit busfreq_probe(struct platform_device *pdev) +{ + int cpu_wp_nr; + + main_bus_clk = clk_get(NULL, "main_bus_clk"); + if (IS_ERR(main_bus_clk)) { + printk(KERN_DEBUG "%s: failed to get main_bus_clk\n", __func__); + return PTR_ERR(main_bus_clk); + } + + pll2 = clk_get(NULL, "pll2"); + if (IS_ERR(pll2)) { + printk(KERN_DEBUG "%s: failed to get pll2\n", __func__); + return PTR_ERR(pll2); + } + + axi_a_clk = clk_get(NULL, "axi_a_clk"); + if (IS_ERR(axi_a_clk)) { + printk(KERN_DEBUG "%s: failed to get axi_a_clk\n", __func__); + return PTR_ERR(axi_a_clk); + } + + axi_b_clk = clk_get(NULL, "axi_b_clk"); + if (IS_ERR(axi_b_clk)) { + printk(KERN_DEBUG "%s: failed to get axi_b_clk\n", __func__); + return PTR_ERR(axi_b_clk); + } + + axi_c_clk = clk_get(NULL, "axi_c_clk"); + if (IS_ERR(axi_c_clk)) { + printk(KERN_DEBUG "%s: failed to get axi_c_clk\n", __func__); + return PTR_ERR(axi_c_clk); + } + + emi_core_clk = clk_get(NULL, "emi_core_clk"); + if (IS_ERR(emi_core_clk)) { + printk(KERN_DEBUG "%s: failed to get emi_core_clk\n", __func__); + return PTR_ERR(emi_core_clk); + } + + emi_intr_clk = clk_get(NULL, "emi_intr_clk"); + if (IS_ERR(emi_intr_clk)) { + printk(KERN_DEBUG "%s: failed to get emi_intr_clk\n", __func__); + return PTR_ERR(emi_intr_clk); + } + + nfc_clk = clk_get(NULL, "nfc_clk"); + if (IS_ERR(nfc_clk)) { + printk(KERN_DEBUG "%s: failed to get nfc_clk\n", __func__); + return PTR_ERR(nfc_clk); + } + + ahb_clk = clk_get(NULL, "ahb_clk"); + if (IS_ERR(ahb_clk)) { + printk(KERN_DEBUG "%s: failed to get ahb_clk\n", __func__); + return PTR_ERR(ahb_clk); + } + + vpu_core_clk = clk_get(NULL, "vpu_core_clk"); + if (IS_ERR(vpu_core_clk)) { + printk(KERN_DEBUG "%s: failed to get vpu_core_clk\n", __func__); + return PTR_ERR(vpu_core_clk); + } + + arm_axi_clk = clk_get(NULL, "arm_axi_clk"); + if (IS_ERR(arm_axi_clk)) { + printk(KERN_DEBUG "%s: failed to get arm_axi_clk\n", __func__); + return PTR_ERR(arm_axi_clk); + } + + ddr_clk = clk_get(NULL, "ddr_clk"); + if (IS_ERR(ddr_clk)) { + printk(KERN_DEBUG "%s: failed to get ddr_clk\n", __func__); + return PTR_ERR(ddr_clk); + } + + ipu_clk = clk_get(NULL, "ipu_clk"); + if (IS_ERR(ipu_clk)) { + printk(KERN_DEBUG "%s: failed to get ipu_clk\n", __func__); + return PTR_ERR(ipu_clk); + } + + vpu_clk = clk_get(NULL, "vpu_clk"); + if (IS_ERR(vpu_clk)) { + printk(KERN_DEBUG "%s: failed to get vpu_clk\n", __func__); + return PTR_ERR(vpu_clk); + } + + periph_apm_clk = clk_get(NULL, "periph_apm_clk"); + if (IS_ERR(periph_apm_clk)) { + printk(KERN_DEBUG "%s: failed to get periph_apm_clk\n", + __func__); + return PTR_ERR(periph_apm_clk); + } + + lp_apm = clk_get(NULL, "lp_apm"); + if (IS_ERR(lp_apm)) { + printk(KERN_DEBUG "%s: failed to get lp_apm\n", __func__); + return PTR_ERR(lp_apm); + } + + cpu_clk = clk_get(NULL, "cpu_clk"); + if (IS_ERR(cpu_clk)) { + printk(KERN_DEBUG "%s: failed to get cpu_clk\n", __func__); + return PTR_ERR(cpu_clk); + } + + osc = clk_get(NULL, "osc"); + if (IS_ERR(osc)) { + printk(KERN_DEBUG "%s: failed to get osc\n", __func__); + return PTR_ERR(osc); + } + + uart_clk = clk_get(NULL, "uart_clk.0"); + if (IS_ERR(uart_clk)) { + printk(KERN_DEBUG "%s: failed to get uart_clk-0\n", __func__); + return PTR_ERR(uart_clk); + } + + pll1 = clk_get(NULL, "pll1_sw_clk"); + if (IS_ERR(pll1)) { + printk(KERN_DEBUG "%s: failed to get pll1_sw_clk\n", __func__); + return PTR_ERR(pll1); + } + + lp_regulator = regulator_get(NULL, lp_reg_id); + if (IS_ERR(lp_regulator)) { + clk_put(ahb_clk); + printk(KERN_DEBUG "%s: failed to get lp regulator\n", __func__); + return PTR_ERR(lp_regulator); + } + + low_bus_freq_mode = 0; + high_bus_freq_mode = 1; + + cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr); + + return 0; +} + +static struct platform_driver busfreq_driver = { + .driver = { + .name = "busfreq", + }, + .probe = busfreq_probe, + .suspend = busfreq_suspend, + .resume = busfreq_resume, +}; + +/*! + * Initialise the busfreq_driver. + * + * @return The function always returns 0. + */ +static int __init busfreq_init(void) +{ + if (platform_driver_register(&busfreq_driver) != 0) { + printk(KERN_ERR "busfreq_driver register failed\n"); + return -ENODEV; + } + + printk(KERN_INFO "Bus freq driver module loaded\n"); + return 0; +} + +static void __exit busfreq_cleanup(void) +{ + /* Unregister the device structure */ + platform_driver_unregister(&busfreq_driver); + + clk_put(main_bus_clk); + clk_put(pll2); + clk_put(axi_a_clk); + clk_put(axi_b_clk); + clk_put(axi_c_clk); + clk_put(emi_core_clk); + clk_put(emi_intr_clk); + clk_put(nfc_clk); + clk_put(ahb_clk); + clk_put(vpu_core_clk); + clk_put(arm_axi_clk); + clk_put(ddr_clk); + clk_put(ipu_clk); + clk_put(periph_apm_clk); + clk_put(lp_apm); + clk_put(osc); + clk_put(pll1); + clk_put(pll2); + regulator_put(lp_regulator); + +} + +module_init(busfreq_init); +module_exit(busfreq_cleanup); + +MODULE_AUTHOR("Freescale Semiconductor, Inc."); +MODULE_DESCRIPTION("BusFreq driver"); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/iomux.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/iomux.c @@ -0,0 +1,202 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/*! + * @defgroup GPIO_MX37 Board GPIO and Muxing Setup + * @ingroup MSL_MX37 + */ +/*! + * @file mach-mx37/iomux.c + * + * @brief I/O Muxing control functions + * + * @ingroup GPIO_MX37 + */ + +#include +#include +#include +#include +#include +#include +#include "iomux.h" + +/*! + * IOMUX register (base) addresses + */ +#define IOMUXGPR0 (IO_ADDRESS(IOMUXC_BASE_ADDR)) /*!< General purpose 0 */ +#define IOMUXGPR1 (IO_ADDRESS(IOMUXC_BASE_ADDR) + 0x004) /*!< General purpose 1 */ +#define IOMUXSW_MUX_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + MUX_I_START) /*!< MUX control */ +#define IOMUXSW_MUX_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + PAD_I_END) /*!< last MUX control register */ +#define IOMUXSW_PAD_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + PAD_I_START) /*!< Pad control */ +#define IOMUXSW_PAD_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + PAD_I_END) /*!< last Pad control register */ +#define IOMUXSW_INPUT_CTL (IO_ADDRESS(IOMUXC_BASE_ADDR) + INPUT_CTL_START) /*!< input select register */ +#define IOMUXSW_INPUT_END (IO_ADDRESS(IOMUXC_BASE_ADDR) + INPUT_CTL_END) /*!< last input select register */ + +#define MUX_PIN_NUM_MAX (((IOMUXSW_MUX_END - IOMUXSW_MUX_CTL) >> 2) + 1) +#define MUX_INPUT_NUM_MUX (((IOMUXSW_INPUT_END - IOMUXSW_INPUT_CTL) >> 2) + 1) + +static u8 iomux_pin_res_table[MUX_PIN_NUM_MAX]; +static DEFINE_SPINLOCK(gpio_mux_lock); + +/*! + * This function is used to configure a pin through the IOMUX module. + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config a configuration as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + u32 ret = 0; + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + void *mux_reg = IOMUXSW_MUX_CTL + PIN_TO_IOMUX_MUX(pin); + u32 mux_data = 0; + u8 *rp; + + BUG_ON((mux_reg > IOMUXSW_MUX_END) || (mux_reg < IOMUXSW_MUX_CTL)); + spin_lock(&gpio_mux_lock); + + if (config == IOMUX_CONFIG_GPIO) { + mux_data = PIN_TO_ALT_GPIO(pin); + } else { + mux_data = config; + } + + __raw_writel(mux_data, mux_reg); + + /* + * Log a warning if a pin changes ownership + */ + rp = iomux_pin_res_table + pin_index; + if ((mux_data & *rp) && (*rp != mux_data)) { + /* + * Don't call printk if we're tweaking the console uart or + * we'll deadlock. + */ + printk(KERN_ERR "iomux_config_mux: Warning: iomux pin" + " config changed, pin=%p, " + " prev=0x%x new=0x%x\n", mux_reg, *rp, mux_data); + ret = -EINVAL; + } + *rp = mux_data; + spin_unlock(&gpio_mux_lock); + return ret; +} + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config a configuration as defined in \b #iomux_pin_cfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + int ret = iomux_config_mux(pin, config); + int gpio = IOMUX_TO_GPIO(pin); + + if (!ret && (gpio < MXC_GPIO_IRQS) && ((config == IOMUX_CONFIG_GPIO) + || (config == PIN_TO_ALT_GPIO(pin)))) { + ret |= gpio_request(gpio, NULL); + } + return ret; +} + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config) +{ + u32 pin_index = PIN_TO_IOMUX_INDEX(pin); + u8 *rp = iomux_pin_res_table + pin_index; + int gpio = IOMUX_TO_GPIO(pin); + + BUG_ON(pin_index > MUX_PIN_NUM_MAX); + *rp = 0; + if ((gpio < MXC_GPIO_IRQS) && ((config == IOMUX_CONFIG_GPIO) + || (config == PIN_TO_ALT_GPIO(pin)))) { + gpio_free(gpio); + } +} + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config) +{ + void *pad_reg = IOMUXSW_PAD_CTL + PIN_TO_IOMUX_PAD(pin); + + BUG_ON((pad_reg > IOMUXSW_PAD_END) || (pad_reg < IOMUXSW_PAD_CTL)); + spin_lock(&gpio_mux_lock); + __raw_writel(config, pad_reg); + spin_unlock(&gpio_mux_lock); +} + +unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin) +{ + void *pad_reg = IOMUXSW_PAD_CTL + PIN_TO_IOMUX_PAD(pin); + return __raw_readl(pad_reg); +} + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + * @param index 0 for GPR0 and 1 for GPR1 + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en, u8 index) +{ + volatile u32 l; + + spin_lock(&gpio_mux_lock); + l = __raw_readl(IOMUXGPR0 + (index << 2)); + if (en) { + l |= gp; + } else { + l &= ~gp; + } + __raw_writel(l, IOMUXGPR0 + (index << 2)); + spin_unlock(&gpio_mux_lock); +} + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b #iomux_input_select_t + * @param config the binary value of elements defined in \b #iomux_input_config_t + * */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config) +{ + void *reg = IOMUXSW_INPUT_CTL + (input << 2); + + BUG_ON(input >= MUX_INPUT_NUM_MUX); + __raw_writel(config, reg); +} + +EXPORT_SYMBOL(mxc_request_iomux); +EXPORT_SYMBOL(mxc_free_iomux); +EXPORT_SYMBOL(mxc_iomux_set_input); +EXPORT_SYMBOL(mxc_iomux_set_pad); +EXPORT_SYMBOL(mxc_iomux_set_gpr); --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/board-mx37_3stack.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/board-mx37_3stack.h @@ -0,0 +1,118 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ASM_ARCH_MXC_BOARD_MX37_3STACK_H__ +#define __ASM_ARCH_MXC_BOARD_MX37_3STACK_H__ + +/*! + * @defgroup BRDCFG_MX37 Board Configuration Options + * @ingroup MSL_MX37 + */ + +/*! + * @file mach-mx37/board-mx37_3stack.h + * + * @brief This file contains all the board level configuration options. + * + * It currently hold the options defined for MX31 ADS Platform. + * + * @ingroup BRDCFG_MX37 + */ + +/* + * Include Files + */ +#include +#include + +/*! + * @name MXC UART EVB board level configurations + */ +/*! @{ */ +/*! + * Specifies if the Irda transmit path is inverting + */ +#define MXC_IRDA_TX_INV 0 +/*! + * Specifies if the Irda receive path is inverting + */ +#define MXC_IRDA_RX_INV 0 + +/* UART 1 configuration */ +/*! + * This define specifies if the UART port is configured to be in DTE or + * DCE mode. There exists a define like this for each UART port. Valid + * values that can be used are \b MODE_DTE or \b MODE_DCE. + */ +#define UART1_MODE MODE_DCE +/*! + * This define specifies if the UART is to be used for IRDA. There exists a + * define like this for each UART port. Valid values that can be used are + * \b IRDA or \b NO_IRDA. + */ +#define UART1_IR NO_IRDA +/*! + * This define is used to enable or disable a particular UART port. If + * disabled, the UART will not be registered in the file system and the user + * will not be able to access it. There exists a define like this for each UART + * port. Specify a value of 1 to enable the UART and 0 to disable it. + */ +#define UART1_ENABLED 1 +/*! @} */ +/* UART 2 configuration */ +#define UART2_MODE MODE_DCE +#define UART2_IR NO_IRDA +#define UART2_ENABLED 1 +/* UART 3 configuration */ +#define UART3_MODE MODE_DCE +#define UART3_IR NO_IRDA +#define UART3_ENABLED 1 + +#define MXC_LL_UART_PADDR UART1_BASE_ADDR +#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) + +#define DEBUG_BASE_ADDRESS 0x78000000 /* Use a Dummy base address */ +/* LAN9217 ethernet base address */ +#define LAN9217_BASE_ADDR DEBUG_BASE_ADDRESS +/* External UART */ +#define UARTA_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x8000) +#define UARTB_BASE_ADDR (DEBUG_BASE_ADDRESS + 0x10000) + +#define BOARD_IO_ADDR 0x20000 +/* LED switchs */ +#define LED_SWITCH_REG BOARD_IO_ADDR + 0x00 +/* buttons */ +#define SWITCH_BUTTONS_REG BOARD_IO_ADDR + 0x08 +/* status, interrupt */ +#define INTR_STATUS_REG BOARD_IO_ADDR + 0x10 +#define INTR_MASK_REG BOARD_IO_ADDR + 0x38 +#define INTR_RESET_REG BOARD_IO_ADDR + 0x20 +/* magic word for debug CPLD */ +#define MAGIC_NUMBER1_REG BOARD_IO_ADDR + 0x40 +#define MAGIC_NUMBER2_REG BOARD_IO_ADDR + 0x48 +/* CPLD code version */ +#define CPLD_CODE_VER_REG BOARD_IO_ADDR + 0x50 + +extern unsigned int sdhc_get_card_det_status(struct device *dev); +extern int sdhc_write_protect(struct device *dev); +extern int sdhc_init_card_det(int id); +extern struct tve_platform_data tve_data; +extern struct mxc_dptc_data dptc_lp_data; +extern struct mxc_dptc_data dptc_gp_data; +extern struct mxc_dvfs_platform_data dvfs_core_data; +extern struct mxc_dvfsper_data dvfs_per_data; +extern char *gp_reg_id; +extern char *lp_reg_id; + +extern int headphone_det_status(void); +#endif /* __ASM_ARCH_MXC_BOARD_MX37_3STACK_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/crm_regs.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/crm_regs.h @@ -0,0 +1,616 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ARCH_ARM_MACH_MX37_CRM_REGS_H__ +#define __ARCH_ARM_MACH_MX37_CRM_REGS_H__ + +#define MXC_CCM_BASE ((char *)IO_ADDRESS(CCM_BASE_ADDR)) +#define MXC_DPLL1_BASE IO_ADDRESS(PLL0_BASE_ADDR) +#define MXC_DPLL2_BASE IO_ADDRESS(PLL1_BASE_ADDR) +#define MXC_DPLL3_BASE IO_ADDRESS(PLL2_BASE_ADDR) + +/* PLL Register Offsets */ +#define MXC_PLL_DP_CTL 0x00 +#define MXC_PLL_DP_CONFIG 0x04 +#define MXC_PLL_DP_OP 0x08 +#define MXC_PLL_DP_MFD 0x0C +#define MXC_PLL_DP_MFN 0x10 +#define MXC_PLL_DP_MFNMINUS 0x14 +#define MXC_PLL_DP_MFNPLUS 0x18 +#define MXC_PLL_DP_HFS_OP 0x1C +#define MXC_PLL_DP_HFS_MFD 0x20 +#define MXC_PLL_DP_HFS_MFN 0x24 +#define MXC_PLL_DP_MFN_TOGC 0x28 +#define MXC_PLL_DP_DESTAT 0x2c + +/* PLL Register Bit definitions */ +#define MXC_PLL_DP_CTL_MUL_CTRL 0x2000 +#define MXC_PLL_DP_CTL_DPDCK0_2_EN 0x1000 +#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET 12 +#define MXC_PLL_DP_CTL_ADE 0x800 +#define MXC_PLL_DP_CTL_REF_CLK_DIV 0x400 +#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK (3 << 8) +#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET 8 +#define MXC_PLL_DP_CTL_HFSM 0x80 +#define MXC_PLL_DP_CTL_PRE 0x40 +#define MXC_PLL_DP_CTL_UPEN 0x20 +#define MXC_PLL_DP_CTL_RST 0x10 +#define MXC_PLL_DP_CTL_RCP 0x8 +#define MXC_PLL_DP_CTL_PLM 0x4 +#define MXC_PLL_DP_CTL_BRM0 0x2 +#define MXC_PLL_DP_CTL_LRF 0x1 + +#define MXC_PLL_DP_CONFIG_BIST 0x8 +#define MXC_PLL_DP_CONFIG_SJC_CE 0x4 +#define MXC_PLL_DP_CONFIG_AREN 0x2 +#define MXC_PLL_DP_CONFIG_LDREQ 0x1 + +#define MXC_PLL_DP_OP_MFI_OFFSET 4 +#define MXC_PLL_DP_OP_MFI_MASK (0xF << 4) +#define MXC_PLL_DP_OP_PDF_OFFSET 0 +#define MXC_PLL_DP_OP_PDF_MASK 0xF + +#define MXC_PLL_DP_MFD_OFFSET 0 +#define MXC_PLL_DP_MFD_MASK 0x07FFFFFF + +#define MXC_PLL_DP_MFN_OFFSET 0x0 +#define MXC_PLL_DP_MFN_MASK 0x07FFFFFF + +#define MXC_PLL_DP_MFN_TOGC_TOG_DIS (1 << 17) +#define MXC_PLL_DP_MFN_TOGC_TOG_EN (1 << 16) +#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET 0x0 +#define MXC_PLL_DP_MFN_TOGC_CNT_MASK 0xFFFF + +#define MXC_PLL_DP_DESTAT_TOG_SEL (1 << 31) +#define MXC_PLL_DP_DESTAT_MFN 0x07FFFFFF + +/* Register addresses of CCM*/ +#define MXC_CCM_CCR (MXC_CCM_BASE + 0x00) +#define MXC_CCM_CCDR (MXC_CCM_BASE + 0x04) +#define MXC_CCM_CSR (MXC_CCM_BASE + 0x08) +#define MXC_CCM_CCSR (MXC_CCM_BASE + 0x0C) +#define MXC_CCM_CACRR (MXC_CCM_BASE + 0x10) +#define MXC_CCM_CBCDR2 (MXC_CCM_BASE + 0x18) +#define MXC_CCM_CBCDR3 (MXC_CCM_BASE + 0x1C) +#define MXC_CCM_CBCDR4 (MXC_CCM_BASE + 0x20) +#define MXC_CCM_CBCDR5 (MXC_CCM_BASE + 0x24) +#define MXC_CCM_CBCDR6 (MXC_CCM_BASE + 0x28) +#define MXC_CCM_CBCDR7 (MXC_CCM_BASE + 0x2C) +#define MXC_CCM_CAMR (MXC_CCM_BASE + 0x30) +#define MXC_CCM_CSCMR1 (MXC_CCM_BASE + 0x34) +#define MXC_CCM_CSCMR2 (MXC_CCM_BASE + 0x38) +#define MXC_CCM_CSCDR1 (MXC_CCM_BASE + 0x3C) +#define MXC_CCM_CS1CDR (MXC_CCM_BASE + 0x40) +#define MXC_CCM_CS2CDR (MXC_CCM_BASE + 0x44) +#define MXC_CCM_CSECDR1 (MXC_CCM_BASE + 0x48) +#define MXC_CCM_CSECDR2 (MXC_CCM_BASE + 0x4C) +#define MXC_CCM_CECDR (MXC_CCM_BASE + 0x50) +#define MXC_CCM_CDCDR (MXC_CCM_BASE + 0x54) +#define MXC_CCM_CH1CDR (MXC_CCM_BASE + 0x58) +#define MXC_CCM_CH2CDR (MXC_CCM_BASE + 0x5C) +#define MXC_CCM_CSCDR2 (MXC_CCM_BASE + 0x60) +#define MXC_CCM_CR2 (MXC_CCM_BASE + 0x64) +#define MXC_CCM_CDHIPR (MXC_CCM_BASE + 0x68) +#define MXC_CCM_CDCR (MXC_CCM_BASE + 0x6C) +#define MXC_CCM_CTOR (MXC_CCM_BASE + 0x70) +#define MXC_CCM_CLPCR (MXC_CCM_BASE + 0x74) +#define MXC_CCM_CISR (MXC_CCM_BASE + 0x78) +#define MXC_CCM_CIMR (MXC_CCM_BASE + 0x7C) +#define MXC_CCM_CCOSR (MXC_CCM_BASE + 0x80) +#define MXC_CCM_CGPR (MXC_CCM_BASE + 0x84) +#define MXC_CCM_CCGR0 (MXC_CCM_BASE + 0x88) +#define MXC_CCM_CCGR1 (MXC_CCM_BASE + 0x8C) +#define MXC_CCM_CCGR2 (MXC_CCM_BASE + 0x90) +#define MXC_CCM_CCGR3 (MXC_CCM_BASE + 0x94) +#define MXC_CCM_CCGR4 (MXC_CCM_BASE + 0x98) +#define MXC_CCM_CCGR5 (MXC_CCM_BASE + 0x9C) +#define MXC_CCM_CMEOR (MXC_CCM_BASE + 0xA0) + +/* Define the bits in register CCR */ +#define MXC_CCM_CCR_COSC_EN (1 << 11) +#define MXC_CCM_CCR_FPM_MULT_MASK (1 << 10) +#define MXC_CCM_CCR_CAMP_EN (1 << 9) +#define MXC_CCM_CCR_FPM_EN (1 << 8) +#define MXC_CCM_CCR_OSCNT_OFFSET (0) +#define MXC_CCM_CCR_OSCNT_MASK (0xFF) + +/* Define the bits in register CCDR */ +#define MXC_CCM_CCDR_IPU_HS_MASK (0x1 << 17) +#define MXC_CCM_CCDR_EMI_HS_MASK (0x1 << 16) +#define MXC_CCM_CCDR_LOAD_DIVIDERS (0x1 << 0) + +/* Define the bits in register CSR */ +#define MXC_CCM_CSR_COSR_READY (1 << 4) +#define MXC_CCM_CSR_LVS_VALUE (1 << 3) +#define MXC_CCM_CSR_CAMP_READY (1 << 2) +#define MXC_CCM_CSR_FPM_READY (1 << 1) +#define MXC_CCM_CSR_REF_EN_B (1 << 0) + +/* Define the bits in register CCSR */ +#define MXC_CCM_CCSR_LP_APM_SEL (0x1 << 9) +#define MXC_CCM_CCSR_STEP_SEL_OFFSET (7) +#define MXC_CCM_CCSR_STEP_SEL_MASK (0x3 << 7) +#define MXC_CCM_CCSR_PLL2_PODF_OFFSET (5) +#define MXC_CCM_CCSR_PLL2_PODF_MASK (0x3 << 5) +#define MXC_CCM_CCSR_PLL3_PODF_OFFSET (3) +#define MXC_CCM_CCSR_PLL3_PODF_MASK (0x3 << 3) +#define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (1 << 2) +#define MXC_CCM_CCSR_PLL2_SW_CLK_SEL (1 << 1) +#define MXC_CCM_CCSR_PLL3_SW_CLK_SEL (1 << 0) + +/* Define the bits in register CACRR */ +#define MXC_CCM_CACRR_ARM_PODF_OFFSET (0) +#define MXC_CCM_CACRR_ARM_PODF_MASK (0x7) + +/* Define the bits in register CBCDR2 */ +#define MXC_CCM_CBCDR2_AHB_PODF_OFFSET (10) +#define MXC_CCM_CBCDR2_AHB_PODF_MASK (0x7 << 10) +#define MXC_CCM_CBCDR2_IPG_PODF_OFFSET (8) +#define MXC_CCM_CBCDR2_IPG_PODF_MASK (0x3 << 8) +#define MXC_CCM_CBCDR2_PERCLK_PRED1_OFFSET (6) +#define MXC_CCM_CBCDR2_PERCLK_PRED1_MASK (0x3 << 6) +#define MXC_CCM_CBCDR2_PERCLK_PRED2_OFFSET (3) +#define MXC_CCM_CBCDR2_PERCLK_PRED2_MASK (0x7 << 3) +#define MXC_CCM_CBCDR2_PERCLK_PODF_OFFSET (0) +#define MXC_CCM_CBCDR2_PERCLK_PODF_MASK (0x7) + +/* Define the bits in register CBCDR3 */ +#define MXC_CCM_CBCDR3_AXI_A_PODF_OFFSET (0) +#define MXC_CCM_CBCDR3_AXI_A_PODF_MASK (0x7) + +/* Define the bits in register CBCDR4 */ +#define MXC_CCM_CBCDR4_AXI_B_PODF_OFFSET (0) +#define MXC_CCM_CBCDR4_AXI_B_PODF_MASK (0x7) + +/* Define the bits in register CBCDR5 */ +#define MXC_CCM_CBCDR5_AXI_C_PODF_OFFSET (0) +#define MXC_CCM_CBCDR5_AXI_C_PODF_MASK (0x7) + +/* Define the bits in register CBCDR6 */ +#define MXC_CCM_CBCDR6_EMI_PODF_OFFSET (0) +#define MXC_CCM_CBCDR6_EMI_PODF_MASK (0x7) +#define MXC_CCM_CBCDR6_EMI_CLK_SEL (0x1 << 3) +#define MXC_CCM_CBCDR6_PERIPH_CLK_SEL (0x1 << 4) + +/* Define the bits in register CBCDR7 */ +#define MXC_CCM_CBCDR7_IPG_INT_MEM_PODF_OFFSET (3) +#define MXC_CCM_CBCDR7_IPG_INIT_MEM_PODF_MASK (0x3 << 3) +#define MXC_CCM_CBCDR7_NFC_PODF_OFFSET (0) +#define MXC_CCM_CBCDR7_NFC_PODF_MASK (0x7) + +/* Define the bits in register CAMR */ +#define MXC_CCM_CAMR_PERIPH_CLK_SEL_OFFSET (12) +#define MXC_CCM_CAMR_PERIPH_CLK_SEL_MASK (0x3 << 12) +#define MXC_CCM_CAMR_DDR_CLK_SEL_OFFSET (10) +#define MXC_CCM_CAMR_DDR_CLK_SEL_MASK (0x3 << 10) +#define MXC_CCM_CAMR_ARM_AXI_CLK_SEL_OFFSET (8) +#define MXC_CCM_CAMR_ARM_AXI_CLK_SEL_MASK (0x3 << 8) +#define MXC_CCM_CAMR_VPU_CLK_SEL_OFFSET (6) +#define MXC_CCM_CAMR_VPU_CLK_SEL_MASK (0x3 << 6) +#define MXC_CCM_CAMR_VPU_AXI_CLK_SEL_OFFSET (4) +#define MXC_CCM_CAMR_VPU_AXI_CLK_SEL_MASK (0x3 << 4) +#define MXC_CCM_CAMR_IPU_HSP_CLK_SEL_OFFSET (2) +#define MXC_CCM_CAMR_IPU_HSP_CLK_SEL_MASK (0x3 << 2) + +/* Define the bits in register CSCMR1 */ +#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_OFFSET (30) +#define MXC_CCM_CSCMR1_SSI_EXT2_CLK_SEL_MASK (0x3 << 30) +#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_OFFSET (28) +#define MXC_CCM_CSCMR1_SSI_EXT1_CLK_SEL_MASK (0x3 << 28) +#define MXC_CCM_CSCMR1_DI_CLK_SEL (0x1 << 27) +#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET (26) +#define MXC_CCM_CSCMR1_USB_PHY_CLK_SEL (0x1 << 26) +#define MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET (24) +#define MXC_CCM_CSCMR1_UART_CLK_SEL_MASK (0x3 << 24) +#define MXC_CCM_CSCMR1_USBOH2_CLK_SEL_OFFSET (22) +#define MXC_CCM_CSCMR1_USBOH2_CLK_SEL_MASK (0x3 << 22) +#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_OFFSET (20) +#define MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_MASK (0x3 << 20) +#define MXC_CCM_CSCMR1_ESDHC3_CLK_SEL (0x1 << 19) +#define MXC_CCM_CSCMR1_PERCLK_IPG_CLK_SEL (0x1 << 18) +#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_OFFSET (16) +#define MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_MASK (0x3 << 16) +#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_OFFSET (14) +#define MXC_CCM_CSCMR1_SSI1_CLK_SEL_MASK (0x3 << 14) +#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_OFFSET (12) +#define MXC_CCM_CSCMR1_SSI2_CLK_SEL_MASK (0x3 << 12) +#define MXC_CCM_CSCMR1_SSI_APM_CLK_SEL (0x1 << 9) +#define MXC_CCM_CSCMR1_SPDIF_CLK_SEL (0x1 << 8) +#define MXC_CCM_CSCMR1_TVE_CLK_SEL (0x1 << 7) +#define MXC_CCM_CSCMR1_TVE_EXT_CLK_SEL (0x1 << 6) +#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_OFFSET (4) +#define MXC_CCM_CSCMR1_CSPI_CLK_SEL_MASK (0x3 << 4) +#define MXC_CCM_CSCMR1_PERCLK_LP_APM_CLK_SEL (0x1 << 2) +#define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1) +#define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL (0x1) + +/* Define the bits in register CSCMR2 */ +#define MXC_CCM_CSCMR2_SPDIF1_COM (1 << 5) +#define MXC_CCM_CSCMR2_SPDIF0_COM (1 << 4) +#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_OFFSET (2) +#define MXC_CCM_CSCMR2_SPDIF1_CLK_SEL_MASK (0x3 << 2) +#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_OFFSET (0) +#define MXC_CCM_CSCMR2_SPDIF0_CLK_SEL_MASK (0x3) + +/* Define the bits in register CSCDR1 */ +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_OFFSET (22) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PRED_MASK (0x7 << 22) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_OFFSET (19) +#define MXC_CCM_CSCDR1_ESDHC2_MSHC2_CLK_PODF_MASK (0x7 << 19) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_OFFSET (16) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CSCDR1_PGC_CLK_PODF_OFFSET (14) +#define MXC_CCM_CSCDR1_PGC_CLK_PODF_MASK (0x3 << 14) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_OFFSET (11) +#define MXC_CCM_CSCDR1_ESDHC1_MSHC1_CLK_PODF_MASK (0x7 << 11) +#define MXC_CCM_CSCDR1_USBOH2_CLK_PRED_OFFSET (8) +#define MXC_CCM_CSCDR1_USBOH2_CLK_PRED_MASK (0x7 << 8) +#define MXC_CCM_CSCDR1_USBOH2_CLK_PODF_OFFSET (6) +#define MXC_CCM_CSCDR1_USBOH2_CLK_PODF_MASK (0x3 << 6) +#define MXC_CCM_CSCDR1_UART_CLK_PRED_OFFSET (3) +#define MXC_CCM_CSCDR1_UART_CLK_PRED_MASK (0x7 << 3) +#define MXC_CCM_CSCDR1_UART_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSCDR1_UART_CLK_PODF_MASK (0x7) + +/* Define the bits in register CS1CDR and CS2CDR */ +#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_OFFSET (6) +#define MXC_CCM_CS1CDR_SSI1_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_OFFSET (0) +#define MXC_CCM_CS1CDR_SSI1_CLK_PODF_MASK (0x3F) + +#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_OFFSET (6) +#define MXC_CCM_CS2CDR_SSI2_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_OFFSET (0) +#define MXC_CCM_CS2CDR_SSI2_CLK_PODF_MASK (0x3F) + +/* Define the bits in register CSECDR1 and CSECDR2 */ +#define MXC_CCM_CSECDR1_SSI_EXT1_CLK_PRED_OFFSET (6) +#define MXC_CCM_CSECDR1_SSI_EXT1_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CSECDR1_SSI_EXT1_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSECDR1_SSI_EXT1_CLK_PODF_MASK (0x3F) + +#define MXC_CCM_CSECDR2_SSI_EXT2_CLK_PRED_OFFSET (6) +#define MXC_CCM_CSECDR2_SSI_EXT2_CLK_PRED_MASK (0x7 << 6) +#define MXC_CCM_CSECDR2_SSI_EXT2_CLK_PODF_OFFSET (0) +#define MXC_CCM_CSECDR2_SSI_EXT2_CLK_PODF_MASK (0x3F) + +/* Define the bits in register CDCDR */ +#define MXC_CCM_CDCDR_TVE_CLK_PRED_OFFSET (28) +#define MXC_CCM_CDCDR_TVE_CLK_PRED_MASK (0x7 << 28) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET (25) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0x7 << 25) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET (19) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x3F << 19) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_OFFSET (16) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK (0x7 << 16) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_OFFSET (9) +#define MXC_CCM_CDCDR_SPDIF1_CLK_PODF_MASK (0x3F << 9) +#define MXC_CCM_CDCDR_USB_PHY_PRED_OFFSET (4) +#define MXC_CCM_CDCDR_USB_PHY_PRED_MASK (0x7 << 4) +#define MXC_CCM_CDCDR_USB_PHY_PODF_OFFSET (1) +#define MXC_CCM_CDCDR_USB_PHY_PODF_MASK (0x7 << 1) + +/* Define the bits in register CSCDR2 */ +#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET (25) +#define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25) +#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_OFFSET (19) +#define MXC_CCM_CSCDR2_CSPI_CLK_PODF_MASK (0x3F << 19) + +/* Define the bits in register CDHIPR */ +#define MXC_CCM_CDHIPR_ARM_PODF_BUSY (1 << 16) +#define MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY (1 << 4) +#define MXC_CCM_CDHIPR_EMI_PODF_BUSY (1 << 3) +#define MXC_CCM_CDHIPR_AXI_C_PODF_BUSY (1 << 2) +#define MXC_CCM_CDHIPR_AXI_B_PODF_BUSY (1 << 1) +#define MXC_CCM_CDHIPR_AXI_A_PODF_BUSY (1 << 0) + +/* Define the bits in register CDCR */ +#define MXC_CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER (0x1 << 2) +#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_OFFSET (0) +#define MXC_CCM_CDCR_PERIPH_CLK_DVFS_PODF_MASK (0x3) + +/* Define the bits in register CLPCR */ +#define MXC_CCM_CLPCR_BYPASS_SCC_LPM_HS (0x1 << 22) +#define MXC_CCM_CLPCR_BYPASS_MAX_LPM_HS (0x1 << 21) +#define MXC_CCM_CLPCR_BYPASS_SDMA_LPM_HS (0x1 << 20) +#define MXC_CCM_CLPCR_BYPASS_EMI_LPM_HS (0x1 << 19) +#define MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS (0x1 << 18) +#define MXC_CCM_CLPCR_BYPASS_RTIC_LPM_HS (0x1 << 17) +#define MXC_CCM_CLPCR_BYPASS_RNGC_LPM_HS (0x1 << 16) +#define MXC_CCM_CLPCR_COSC_PWRDOWN (0x1 << 11) +#define MXC_CCM_CLPCR_STBY_COUNT_OFFSET (9) +#define MXC_CCM_CLPCR_STBY_COUNT_MASK (0x3 << 9) +#define MXC_CCM_CLPCR_VSTBY (0x1 << 8) +#define MXC_CCM_CLPCR_DIS_REF_OSC (0x1 << 7) +#define MXC_CCM_CLPCR_SBYOS (0x1 << 6) +#define MXC_CCM_CLPCR_ARM_CLK_DIS_ON_LPM (0x1 << 5) +#define MXC_CCM_CLPCR_LPSR_CLK_SEL_OFFSET (3) +#define MXC_CCM_CLPCR_LPSR_CLK_SEL_MASK (0x3 << 3) +#define MXC_CCM_CLPCR_LPM_OFFSET (0) +#define MXC_CCM_CLPCR_LPM_MASK (0x3) + +/* Define the bits in register CISR */ +#define MXC_CCM_CISR_ARM_PODF_LOADED (0x1 << 25) +#define MXC_CCM_CISR_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21) +#define MXC_CCM_CISR_EMI_PODF_LOADED (0x1 << 20) +#define MXC_CCM_CISR_AXI_C_PODF_LOADED (0x1 << 19) +#define MXC_CCM_CISR_AXI_B_PODF_LOADED (0x1 << 18) +#define MXC_CCM_CISR_AXI_A_PODF_LOADED (0x1 << 17) +#define MXC_CCM_CISR_DIVIDER_LOADED (0x1 << 16) +#define MXC_CCM_CISR_COSC_READY (0x1 << 5) +#define MXC_CCM_CISR_CKIH_READY (0x1 << 4) +#define MXC_CCM_CISR_FPM_READY (0x1 << 3) +#define MXC_CCM_CISR_LRF_PLL3 (0x1 << 2) +#define MXC_CCM_CISR_LRF_PLL2 (0x1 << 1) +#define MXC_CCM_CISR_LRF_PLL1 (0x1) + +/* Define the bits in register CIMR */ +#define MXC_CCM_CIMR_MASK_ARM_PODF_LOADED (0x1 << 25) +#define MXC_CCM_CIMR_MASK_NFC_IPG_INT_MEM_PODF_LOADED (0x1 << 21) +#define MXC_CCM_CIMR_MASK_EMI_PODF_LOADED (0x1 << 20) +#define MXC_CCM_CIMR_MASK_AXI_C_PODF_LOADED (0x1 << 19) +#define MXC_CCM_CIMR_MASK_AXI_B_PODF_LOADED (0x1 << 18) +#define MXC_CCM_CIMR_MASK_AXI_A_PODF_LOADED (0x1 << 17) +#define MXC_CCM_CIMR_MASK_DIVIDER_LOADED (0x1 << 16) +#define MXC_CCM_CIMR_MASK_COSC_READY (0x1 << 5) +#define MXC_CCM_CIMR_MASK_CKIH_READY (0x1 << 4) +#define MXC_CCM_CIMR_MASK_FPM_READY (0x1 << 3) +#define MXC_CCM_CIMR_MASK_LRF_PLL3 (0x1 << 2) +#define MXC_CCM_CIMR_MASK_LRF_PLL2 (0x1 << 1) +#define MXC_CCM_CIMR_MASK_LRF_PLL1 (0x1) + +/* Define the bits in register CCOSR */ +#define MXC_CCM_CCOSR_CKO2_EN_OFFSET (0x1 << 24) +#define MXC_CCM_CCOSR_CKO2_DIV_OFFSET (21) +#define MXC_CCM_CCOSR_CKO2_DIV_MASK (0x7 << 21) +#define MXC_CCM_CCOSR_CKO2_SEL_OFFSET (16) +#define MXC_CCM_CCOSR_CKO2_SEL_MASK (0x1F << 16) +#define MXC_CCM_CCOSR_CKOL_EN (0x1 << 7) +#define MXC_CCM_CCOSR_CKOL_DIV_OFFSET (4) +#define MXC_CCM_CCOSR_CKOL_DIV_MASK (0x7 << 4) +#define MXC_CCM_CCOSR_CKOL_SEL_OFFSET (0) +#define MXC_CCM_CCOSR_CKOL_SEL_MASK (0xF) + +/* Define the bits in registers CGPR */ +#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (0x1 << 4) +#define MXC_CCM_CGPR_FPM_SEL (0x1 << 3) +#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_OFFSET (0) +#define MXC_CCM_CGPR_VL_L2BIST_CLKDIV_MASK (0x7) + +/* Define the bits in registers CCGRx */ +#define MXC_CCM_CCGR_CG_MASK 0x3 + +#define MXC_CCM_CCGR0_CG15_OFFSET 30 +#define MXC_CCM_CCGR0_CG14_OFFSET 28 +#define MXC_CCM_CCGR0_CG14_MASK (0x3 << 28) +#define MXC_CCM_CCGR0_CG13_OFFSET 26 +#define MXC_CCM_CCGR0_CG13_MASK (0x3 << 26) +#define MXC_CCM_CCGR0_CG12_OFFSET 24 +#define MXC_CCM_CCGR0_CG12_MASK (0x3 << 24) +#define MXC_CCM_CCGR0_CG11_OFFSET 22 +#define MXC_CCM_CCGR0_CG10_OFFSET 20 +#define MXC_CCM_CCGR0_CG9_OFFSET 18 +#define MXC_CCM_CCGR0_CG8_OFFSET 16 +#define MXC_CCM_CCGR0_CG7_OFFSET 14 +#define MXC_CCM_CCGR0_CG6_OFFSET 12 +#define MXC_CCM_CCGR0_CG5_OFFSET 10 +#define MXC_CCM_CCGR0_CG4_OFFSET 8 +#define MXC_CCM_CCGR0_CG3_OFFSET 6 +#define MXC_CCM_CCGR0_CG2_OFFSET 4 +#define MXC_CCM_CCGR0_CG2_MASK (0x3 << 4) +#define MXC_CCM_CCGR0_CG1_OFFSET 2 +#define MXC_CCM_CCGR0_CG1_MASK (0x3 << 2) +#define MXC_CCM_CCGR0_CG0_OFFSET 0 +#define MXC_CCM_CCGR0_CG0_MASK 0x3 + +#define MXC_CCM_CCGR1_CG15_OFFSET 30 +#define MXC_CCM_CCGR1_CG14_OFFSET 28 +#define MXC_CCM_CCGR1_CG13_OFFSET 26 +#define MXC_CCM_CCGR1_CG12_OFFSET 24 +#define MXC_CCM_CCGR1_CG11_OFFSET 22 +#define MXC_CCM_CCGR1_CG10_OFFSET 20 +#define MXC_CCM_CCGR1_CG9_OFFSET 18 +#define MXC_CCM_CCGR1_CG8_OFFSET 16 +#define MXC_CCM_CCGR1_CG7_OFFSET 14 +#define MXC_CCM_CCGR1_CG6_OFFSET 12 +#define MXC_CCM_CCGR1_CG5_OFFSET 10 +#define MXC_CCM_CCGR1_CG4_OFFSET 8 +#define MXC_CCM_CCGR1_CG3_OFFSET 6 +#define MXC_CCM_CCGR1_CG2_OFFSET 4 +#define MXC_CCM_CCGR1_CG1_OFFSET 2 +#define MXC_CCM_CCGR1_CG0_OFFSET 0 + +#define MXC_CCM_CCGR2_CG15_OFFSET 30 +#define MXC_CCM_CCGR2_CG14_OFFSET 28 +#define MXC_CCM_CCGR2_CG13_OFFSET 26 +#define MXC_CCM_CCGR2_CG12_OFFSET 24 +#define MXC_CCM_CCGR2_CG11_OFFSET 22 +#define MXC_CCM_CCGR2_CG10_OFFSET 20 +#define MXC_CCM_CCGR2_CG9_OFFSET 18 +#define MXC_CCM_CCGR2_CG8_OFFSET 16 +#define MXC_CCM_CCGR2_CG7_OFFSET 14 +#define MXC_CCM_CCGR2_CG6_OFFSET 12 +#define MXC_CCM_CCGR2_CG5_OFFSET 10 +#define MXC_CCM_CCGR2_CG4_OFFSET 8 +#define MXC_CCM_CCGR2_CG3_OFFSET 6 +#define MXC_CCM_CCGR2_CG2_OFFSET 4 +#define MXC_CCM_CCGR2_CG1_OFFSET 2 +#define MXC_CCM_CCGR2_CG0_OFFSET 0 + +#define MXC_CCM_CCGR3_CG15_OFFSET 30 +#define MXC_CCM_CCGR3_CG14_OFFSET 28 +#define MXC_CCM_CCGR3_CG13_OFFSET 26 +#define MXC_CCM_CCGR3_CG12_OFFSET 24 +#define MXC_CCM_CCGR3_CG11_OFFSET 22 +#define MXC_CCM_CCGR3_CG10_OFFSET 20 +#define MXC_CCM_CCGR3_CG9_OFFSET 18 +#define MXC_CCM_CCGR3_CG8_OFFSET 16 +#define MXC_CCM_CCGR3_CG7_OFFSET 14 +#define MXC_CCM_CCGR3_CG6_OFFSET 12 +#define MXC_CCM_CCGR3_CG5_OFFSET 10 +#define MXC_CCM_CCGR3_CG4_OFFSET 8 +#define MXC_CCM_CCGR3_CG3_OFFSET 6 +#define MXC_CCM_CCGR3_CG2_OFFSET 4 +#define MXC_CCM_CCGR3_CG1_OFFSET 2 +#define MXC_CCM_CCGR3_CG0_OFFSET 0 + +#define MXC_CCM_CCGR4_CG15_OFFSET 30 +#define MXC_CCM_CCGR4_CG14_OFFSET 28 +#define MXC_CCM_CCGR4_CG13_OFFSET 26 +#define MXC_CCM_CCGR4_CG12_OFFSET 24 +#define MXC_CCM_CCGR4_CG11_OFFSET 22 +#define MXC_CCM_CCGR4_CG10_OFFSET 20 +#define MXC_CCM_CCGR4_CG9_OFFSET 18 +#define MXC_CCM_CCGR4_CG8_OFFSET 16 +#define MXC_CCM_CCGR4_CG7_OFFSET 14 +#define MXC_CCM_CCGR4_CG6_OFFSET 12 +#define MXC_CCM_CCGR4_CG5_OFFSET 10 +#define MXC_CCM_CCGR4_CG4_OFFSET 8 +#define MXC_CCM_CCGR4_CG3_OFFSET 6 +#define MXC_CCM_CCGR4_CG2_OFFSET 4 +#define MXC_CCM_CCGR4_CG1_OFFSET 2 +#define MXC_CCM_CCGR4_CG0_OFFSET 0 + +#define MXC_CCM_CCGR5_CG15_OFFSET 30 +#define MXC_CCM_CCGR5_CG14_OFFSET 28 +#define MXC_CCM_CCGR5_CG14_MASK (0x3 << 28) +#define MXC_CCM_CCGR5_CG13_OFFSET 26 +#define MXC_CCM_CCGR5_CG13_MASK (0x3 << 26) +#define MXC_CCM_CCGR5_CG12_OFFSET 24 +#define MXC_CCM_CCGR5_CG12_MASK (0x3 << 24) +#define MXC_CCM_CCGR5_CG11_OFFSET 22 +#define MXC_CCM_CCGR5_CG11_MASK (0x3 << 22) +#define MXC_CCM_CCGR5_CG10_OFFSET 20 +#define MXC_CCM_CCGR5_CG9_OFFSET 18 +#define MXC_CCM_CCGR5_CG8_OFFSET 16 +#define MXC_CCM_CCGR5_CG7_OFFSET 14 +#define MXC_CCM_CCGR5_CG6_OFFSET 12 +#define MXC_CCM_CCGR5_CG5_OFFSET 10 +#define MXC_CCM_CCGR5_CG4_OFFSET 8 +#define MXC_CCM_CCGR5_CG3_OFFSET 6 +#define MXC_CCM_CCGR5_CG2_OFFSET 4 +#define MXC_CCM_CCGR5_CG1_OFFSET 2 +#define MXC_CCM_CCGR5_CG0_OFFSET 0 + +#define MXC_ARM1176_BASE IO_ADDRESS(ARM1176_BASE_ADDR) +#define MXC_GPC_BASE IO_ADDRESS(GPC_BASE_ADDR) +#define MXC_DPTC_LP_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x80) +#define MXC_DPTC_GP_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x100) +#define MXC_DVFS_CORE_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x180) +#define MXC_DVFS_PER_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x1C4) +#define MXC_PGC_IPU_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x220) +#define MXC_PGC_VPU_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x240) +#define MXC_SRPGC_EMI_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x280) +#define MXC_SRPGC_ARM_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2A0) +#define MXC_EMPGC0_ARM_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2C0) +#define MXC_EMPGC1_ARM_BASE IO_ADDRESS(GPC_BASE_ADDR + 0x2D0) + +/* ARM1176 platform */ +#define MXC_ARM1176_PLAT_PVID (MXC_ARM1176_BASE + 0x0) +#define MXC_ARM1176_PLAT_GPC (MXC_ARM1176_BASE + 0x4) +#define MXC_ARM1176_PLAT_PIC (MXC_ARM1176_BASE + 0x8) +#define MXC_ARM1176_PLAT_L2SO (MXC_ARM1176_BASE + 0xC) +#define MXC_ARM1176_PLAT_EMSO (MXC_ARM1176_BASE + 0x10) +#define MXC_ARM1176_PLAT_LPC (MXC_ARM1176_BASE + 0x14) +#define MXC_ARM1176_PLAT_ICGC (MXC_ARM1176_BASE + 0x18) +#define MXC_ARM1176_PLAT_AMC (MXC_ARM1176_BASE + 0x1C) + +/* GPC */ +#define MXC_GPC_CNTR (MXC_GPC_BASE + 0x0) +#define MXC_GPC_PGR (MXC_GPC_BASE + 0x4) +#define MXC_GPC_VCR (MXC_GPC_BASE + 0x8) + +/* DVFS CORE */ +#define MXC_DVFSTHRS (MXC_DVFS_CORE_BASE + 0x00) +#define MXC_DVFSCOUN (MXC_DVFS_CORE_BASE + 0x04) +#define MXC_DVFSSIG1 (MXC_DVFS_CORE_BASE + 0x08) +#define MXC_DVFSSIG0 (MXC_DVFS_CORE_BASE + 0x0C) +#define MXC_DVFSGPC0 (MXC_DVFS_CORE_BASE + 0x10) +#define MXC_DVFSGPC1 (MXC_DVFS_CORE_BASE + 0x14) +#define MXC_DVFSGPBT (MXC_DVFS_CORE_BASE + 0x18) +#define MXC_DVFSEMAC (MXC_DVFS_CORE_BASE + 0x1C) +#define MXC_DVFSCNTR (MXC_DVFS_CORE_BASE + 0x20) +#define MXC_DVFSLTR0_0 (MXC_DVFS_CORE_BASE + 0x24) +#define MXC_DVFSLTR0_1 (MXC_DVFS_CORE_BASE + 0x28) +#define MXC_DVFSLTR1_0 (MXC_DVFS_CORE_BASE + 0x2C) +#define MXC_DVFSLTR1_1 (MXC_DVFS_CORE_BASE + 0x30) +#define MXC_DVFSPT0 (MXC_DVFS_CORE_BASE + 0x34) +#define MXC_DVFSPT1 (MXC_DVFS_CORE_BASE + 0x38) +#define MXC_DVFSPT2 (MXC_DVFS_CORE_BASE + 0x3C) +#define MXC_DVFSPT3 (MXC_DVFS_CORE_BASE + 0x40) + +/* DPTC GP */ +#define MXC_GP_DPTCCR (MXC_DPTC_GP_BASE + 0x00) +#define MXC_GP_DPTCDBG (MXC_DPTC_GP_BASE + 0x04) +#define MXC_GP_DCVR0 (MXC_DPTC_GP_BASE + 0x08) +#define MXC_GP_DCVR1 (MXC_DPTC_GP_BASE + 0x0C) +#define MXC_GP_DCVR2 (MXC_DPTC_GP_BASE + 0x10) +#define MXC_GP_DCVR3 (MXC_DPTC_GP_BASE + 0x14) + +/* DPTC LP */ +#define MXC_LP_DPTCCR (MXC_DPTC_LP_BASE + 0x00) +#define MXC_LP_DPTCDBG (MXC_DPTC_LP_BASE + 0x04) +#define MXC_LP_DCVR0 (MXC_DPTC_LP_BASE + 0x08) +#define MXC_LP_DCVR1 (MXC_DPTC_LP_BASE + 0x0C) +#define MXC_LP_DCVR2 (MXC_DPTC_LP_BASE + 0x10) +#define MXC_LP_DCVR3 (MXC_DPTC_LP_BASE + 0x14) + +#define MXC_DPTCCR_DRCE3 0x00400000 +#define MXC_DPTCCR_DRCE2 0x00200000 +#define MXC_DPTCCR_DRCE1 0x00100000 +#define MXC_DPTCCR_DRCE0 0x00080000 +#define MXC_DPTCCR_DCR_256 0x00060000 +#define MXC_DPTCCR_DCR_128 0x00040000 +#define MXC_DPTCCR_DCR_64 0x00020000 +#define MXC_DPTCCR_DCR_32 0x00000000 +#define MXC_DPTCCR_DSMM 0x00000040 +#define MXC_DPTCCR_DPNVCR 0x00000020 +#define MXC_DPTCCR_DPVV 0x00000010 +#define MXC_DPTCCR_VAIM 0x00000008 +#define MXC_DPTCCR_VAI_OFFSET 1 +#define MXC_DPTCCR_VAI_MASK 0x00000006 +#define MXC_DPTCCR_DEN 0x00000001 + +#define MXC_GPCCNTR_DPTC0CR 0x00040000 +#define MXC_GPCCNTR_DPTC1CR 0x00080000 +#define MXC_GPCCNTR_GPCIRQ 0x00100000 + +/* SRPG */ +#define MXC_SRPGC_EMI_SRPGCR (MXC_SRPGC_EMI_BASE + 0x0) +#define MXC_SRPGC_ARM_SRPGCR (MXC_SRPGC_ARM_BASE + 0x0) +#define MXC_EMPGC0_ARM_PUPSCR (MXC_EMPGC0_ARM_BASE + 0x4) +#define MXC_EMPGC0_ARM_PDNSCR (MXC_EMPGC0_ARM_BASE + 0x8) + + +#define MXC_EMPGC0_ARM_EMPGCR (MXC_EMPGC0_ARM_BASE + 0x0) +#define MXC_EMPGC1_ARM_EMPGCR (MXC_EMPGC1_ARM_BASE + 0x0) +#define MXC_SRPGC_ARM_PUPSCR (MXC_SRPGC_ARM_BASE + 0x4) +#define MXC_SRPGC_ARM_PDNSCR (MXC_SRPGC_ARM_BASE + 0x8) + +#define MXC_PGC_IPU_PGCR (MXC_PGC_IPU_BASE + 0x0) +#define MXC_PGC_IPU_PGSR (MXC_PGC_IPU_BASE + 0xC) +#define MXC_PGC_VPU_PGCR (MXC_PGC_VPU_BASE + 0x0) +#define MXC_PGC_VPU_PGSR (MXC_PGC_VPU_BASE + 0xC) + +#define MXC_ARM1176_PLAT_LPC_DSM (1 << 16) +#define MXC_ARM1176_PLAT_LPC_DBG_DSM (1 << 17) + +#define MXC_GPC_PGR_ARMPG_OFFSET 8 +#define MXC_GPC_PGR_ARMPG_MASK (3 << 8) + +#define MXC_PGCR_PCR 1 +#define MXC_SRPGCR_PCR 1 +#define MXC_EMPGCR_PCR 1 + +#define MXC_PGSR_PSR 1 + +#endif /* __ARCH_ARM_MACH_MX37_CRM_REGS_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/iomux.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/iomux.h @@ -0,0 +1,228 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __MACH_MX37_IOMUX_H__ +#define __MACH_MX37_IOMUX_H__ + +#include +#include +#include "mx37_pins.h" + +/*! + * @file mach-mx37/iomux.h + * + * @brief I/O Muxing control definitions and functions + * + * @ingroup GPIO_MX37 + */ + +typedef unsigned int iomux_pin_name_t; + +/*! + * various IOMUX output functions + */ +typedef enum iomux_config { + IOMUX_CONFIG_ALT0, /*!< used as alternate function 0 */ + IOMUX_CONFIG_ALT1, /*!< used as alternate function 1 */ + IOMUX_CONFIG_ALT2, /*!< used as alternate function 2 */ + IOMUX_CONFIG_ALT3, /*!< used as alternate function 3 */ + IOMUX_CONFIG_ALT4, /*!< used as alternate function 4 */ + IOMUX_CONFIG_ALT5, /*!< used as alternate function 5 */ + IOMUX_CONFIG_ALT6, /*!< used as alternate function 6 */ + IOMUX_CONFIG_ALT7, /*!< used as alternate function 7 */ + IOMUX_CONFIG_GPIO, /*!< added to help user use GPIO mode */ + IOMUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */ +} iomux_pin_cfg_t; + +/*! + * various IOMUX pad functions + */ +typedef enum iomux_pad_config { + PAD_CTL_SRE_SLOW = 0x0 << 0, + PAD_CTL_SRE_FAST = 0x1 << 0, + PAD_CTL_DRV_LOW = 0x0 << 1, + PAD_CTL_DRV_MEDIUM = 0x1 << 1, + PAD_CTL_DRV_HIGH = 0x2 << 1, + PAD_CTL_DRV_MAX = 0x3 << 1, + PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, + PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3, + PAD_CTL_100K_PD = 0x0 << 4, + PAD_CTL_47K_PU = 0x1 << 4, + PAD_CTL_100K_PU = 0x2 << 4, + PAD_CTL_22K_PU = 0x3 << 4, + PAD_CTL_PUE_KEEPER = 0x0 << 6, + PAD_CTL_PUE_PULL = 0x1 << 6, + PAD_CTL_PKE_NONE = 0x0 << 7, + PAD_CTL_PKE_ENABLE = 0x1 << 7, + PAD_CTL_HYS_NONE = 0x0 << 8, + PAD_CTL_HYS_ENABLE = 0x1 << 8, + PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9, + PAD_CTL_DDR_INPUT_DDR = 0x1 << 9, + PAD_CTL_DRV_VOT_LOW = 0x0 << 13, + PAD_CTL_DRV_VOT_HIGH = 0x1 << 13, +} iomux_pad_config_t; + +/*! + * various IOMUX general purpose functions + */ +typedef enum iomux_gp_func { + MUX_IPD_ESDHC_DREQ_B = 0x0 << 0, + MUX_XDRQ = 0x1 << 0, + MUX_EMI_DMA_ACCESS_1 = 0x0 << 4, + MUX_KEY_COL2 = 0x1 << 4, + MUX_TAMPER_DETECT_EN = 0x1 << 8, + MUX_IPUv3D_TVE = 0x0 << 12, + MUX_IPUv3D_CAMP = 0x1 << 12, +} iomux_gp_func_t; + +/*! + * various IOMUX input select register index + */ +typedef enum iomux_input_select { + MUX_IN_CCM_PLL1_BYPASS_CLK = 0, + MUX_IN_CCM_PLL2_BYPASS_CLK, + MUX_IN_CCM_PLL3_BYPASS_CLK, + MUX_IN_CSPI3_CSPI_CLK, + MUX_IN_CSPI3_MISO, + MUX_IN_CSPI3_MOSI, + MUX_IN_EMI_READ_MADDR_DATA_0, + MUX_IN_EMI_READ_MADDR_DATA_10, + MUX_IN_EMI_READ_MADDR_DATA_11, + MUX_IN_EMI_READ_MADDR_DATA_12, + MUX_IN_EMI_READ_MADDR_DATA_13, + MUX_IN_EMI_READ_MADDR_DATA_14, + MUX_IN_EMI_READ_MADDR_DATA_15, + MUX_IN_EMI_READ_MADDR_DATA_1, + MUX_IN_EMI_READ_MADDR_DATA_2, + MUX_IN_EMI_READ_MADDR_DATA_3, + MUX_IN_EMI_READ_MADDR_DATA_4, + MUX_IN_EMI_READ_MADDR_DATA_5, + MUX_IN_EMI_READ_MADDR_DATA_6, + MUX_IN_EMI_READ_MADDR_DATA_7, + MUX_IN_EMI_READ_MADDR_DATA_8, + MUX_IN_EMI_READ_MADDR_DATA_9, + MUX_IN_EMI_NFC_READ_DATA_IN_0, + MUX_IN_EMI_NFC_READ_DATA_IN_10, + MUX_IN_EMI_NFC_READ_DATA_IN_11, + MUX_IN_EMI_NFC_READ_DATA_IN_12, + MUX_IN_EMI_NFC_READ_DATA_IN_13, + MUX_IN_EMI_NFC_READ_DATA_IN_14, + MUX_IN_EMI_NFC_READ_DATA_IN_15, + MUX_IN_EMI_NFC_READ_DATA_IN_1, + MUX_IN_EMI_NFC_READ_DATA_IN_2, + MUX_IN_EMI_NFC_READ_DATA_IN_3, + MUX_IN_EMI_NFC_READ_DATA_IN_4, + MUX_IN_EMI_NFC_READ_DATA_IN_5, + MUX_IN_EMI_NFC_READ_DATA_IN_6, + MUX_IN_EMI_NFC_READ_DATA_IN_7, + MUX_IN_EMI_NFC_READ_DATA_IN_8, + MUX_IN_EMI_NFC_READ_DATA_IN_9, + MUX_IN_FEC_FEC_COL, + MUX_IN_FEC_FEC_CRS, MUX_IN_FEC_FEC_MDI, + MUX_IN_FEC_FEC_RDATA_0, + MUX_IN_FEC_FEC_RX_CLK, + MUX_IN_FEC_FEC_RX_DV, + MUX_IN_FEC_FEC_RX_ER, + MUX_IN_FEC_FEC_TX_CLK, + MUX_IN_I2C1_SCL, + MUX_IN_I2C1_SDA, + MUX_IN_I2C2_SCL, + MUX_IN_I2C2_SDA, + MUX_IN_I2C3_SCL, + MUX_IN_I2C3_SDA, + MUX_IN_IPU_DI_0_IND_DISPB_D0_VSYNC, + MUX_IN__IPU_DI_0_IND_DISPB_SD_D, + MUX_IN_KPP_ROW_0, + MUX_IN_KPP_ROW_1, + MUX_IN_KPP_ROW_2, + MUX_IN_KPP_ROW_3, + MUX_IN_KPP_ROW_4, + MUX_IN_KPP_ROW_5, + MUX_IN_KPP_ROW_6, + MUX_IN_KPP_ROW_7, + MUX_IN_UART1_UART_RTS_B, + MUX_IN_UART1_UART_RXD_MUX, + MUX_IN_UART2_UART_RTS_B, + MUX_IN_UART2_UART_RXD_MUX, + MUX_IN_UART3_UART_RTS_B, + MUX_IN_UART3_UART_RXD_MUX, +} iomux_input_select_t; + +/*! + * various IOMUX input functions + */ +typedef enum iomux_input_config { + INPUT_CTL_PATH0 = 0x0, + INPUT_CTL_PATH1, + INPUT_CTL_PATH2, + INPUT_CTL_PATH3, + INPUT_CTL_PATH4, + INPUT_CTL_PATH5, + INPUT_CTL_PATH6, + INPUT_CTL_PATH7, +} iomux_input_config_t; + +/*! + * Request ownership for an IO pin. This function has to be the first one + * being called before that pin is used. The caller has to check the + * return value to make sure it returns 0. + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + * + * @return 0 if successful; Non-zero otherwise + */ +int mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); + +/*! + * Release ownership for an IO pin + * + * @param pin a name defined by \b iomux_pin_name_t + * @param config config as defined in \b #iomux_pin_ocfg_t + */ +void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config); + +/*! + * This function enables/disables the general purpose function for a particular + * signal. + * + * @param gp one signal as defined in \b #iomux_gp_func_t + * @param en \b #true to enable; \b #false to disable + * @param index 0 for GPR0 and 1 for GPR1 + */ +void mxc_iomux_set_gpr(iomux_gp_func_t gp, bool en, u8 index); + +/*! + * This function configures the pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @param config the ORed value of elements defined in \b #iomux_pad_config_t + */ +void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config); + +/*! + * This function gets the current pad value for a IOMUX pin. + * + * @param pin a pin number as defined in \b #iomux_pin_name_t + * @return current pad value + */ +unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin); + +/*! + * This function configures input path. + * + * @param input index of input select register as defined in \b #iomux_input_select_t + * @param config the binary value of elements defined in \b #iomux_input_config_t + */ +void mxc_iomux_set_input(iomux_input_select_t input, u32 config); + +#endif /* __MACH_MX37_IOMUX_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mx37_3stack_cpld.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mx37_3stack_cpld.c @@ -0,0 +1,233 @@ +/* + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include "board-mx37_3stack.h" +#include "iomux.h" + +/*! + * @file mach-mx37/mx37_3stack_cpld.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX37 + */ + +extern int mxc_spi_poll_transfer(struct spi_device *spi, + struct spi_transfer *t); +static int __init mxc_expio_init(void); + +struct spi_device *cpld_spi; + +/*! + * This function is used to tranfer data to CPLD regs over CSPI + */ +static inline int mx37_3ds_cpld_rw(u8 * buf, size_t len) +{ + struct spi_transfer t = { + .tx_buf = (const void *)buf, + .rx_buf = buf, + .len = len, + .cs_change = 0, + .delay_usecs = 0, + }; + mxc_spi_poll_transfer(cpld_spi, &t); + return 0; +} + +/*! + * This function is called to read a CPLD register over CSPI. + * + * @param offset number of the cpld register to be read + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int spi_cpld_read(unsigned int offset) +{ + unsigned int frame[2]; + unsigned int reg_num = offset >> 1; + unsigned int data = 0; + + frame[0] = (1 << 13) | ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | 0x0200001f); + mx37_3ds_cpld_rw((u8 *) frame, 2); + data = (frame[1] >> 6) & 0xFFFF; + + reg_num = (offset + 2) >> 1; + frame[0] = (1 << 13) | ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | 0x0200001f); + mx37_3ds_cpld_rw((u8 *) frame, 2); + + data |= (((frame[1] >> 6) & 0xFFFF) << 16); + return data; +} +EXPORT_SYMBOL(spi_cpld_read); + +/*! + * This function is called to write to a CPLD register over CSPI. + * + * @param offset number of the cpld register to be written + * @param reg_val value to be written + * + * @return Returns 0 on success -1 on failure. + */ +unsigned int spi_cpld_write(unsigned int offset, unsigned int reg_val) +{ + unsigned int frame[2] = { 0, 0 }; + unsigned int reg_num = offset >> 1; + unsigned int data = reg_val; + + frame[0] = ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | + ((data & 0x0000FFFF) << 6) | 0x03C00027); + mx37_3ds_cpld_rw((u8 *) frame, 2); + + reg_num = (offset + 2) >> 1; + data = reg_val >> 16; + frame[0] = 0; + frame[1] = 0; + frame[0] = ((reg_num & 0x0001FFFF) >> 5) | 0x00001000; + frame[1] = (((reg_num & 0x0000001F) << 27) | + ((data & 0x0000FFFF) << 6) | 0x03C00027); + + mx37_3ds_cpld_rw((u8 *) frame, 2); + + return 0; +} +EXPORT_SYMBOL(spi_cpld_write); + +static int __init mx37_3ds_cpld_probe(struct spi_device *spi) +{ + unsigned int i = 0; + + spi->bits_per_word = 46; + cpld_spi = spi; + + spi_setup(spi); + i = spi_cpld_read(CPLD_CODE_VER_REG); + pr_info("3-Stack Debug board detected, rev = 0x%04X\n", i); + spi_cpld_write(LED_SWITCH_REG, 0xFF); + + /* disable the interrupt and clear the status */ + spi_cpld_write(INTR_MASK_REG, 0); + spi_cpld_write(INTR_RESET_REG, 0xFFFF); + spi_cpld_write(INTR_RESET_REG, 0); + spi_cpld_write(INTR_MASK_REG, 0x1E); + + mxc_expio_init(); + return 0; +} + +/*! + * This structure contains pointers to the CPLD callback functions. + */ +static struct spi_driver mx37_3ds_cpld_driver = { + .driver = { + .name = "cpld_spi", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = mx37_3ds_cpld_probe, +}; + +static int __init mx37_3ds_cpld_init(void) +{ + pr_debug("Registering the CPLD Driver\n"); + return spi_register_driver(&mx37_3ds_cpld_driver); +} + +device_initcall(mx37_3ds_cpld_init); + +static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) +{ + u32 expio_irq; + struct irq_desc *d; + + desc->chip->mask(irq); /* irq = gpio irq number */ + + expio_irq = MXC_BOARD_IRQ_START; + + d = irq_desc + expio_irq; + if (unlikely(!(d->handle_irq))) { + printk(KERN_ERR "\nEXPIO irq: %d unhandled\n", expio_irq); + BUG(); /* oops */ + } + d->handle_irq(expio_irq, d); + + desc->chip->ack(irq); + desc->chip->unmask(irq); +} + +/* + * Disable an expio pin's interrupt by setting the bit in the imr. + * @param irq an expio virtual irq number + */ +static void expio_mask_irq(u32 irq) +{ +} + +/* + * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. + * @param irq an expanded io virtual irq number + */ +static void expio_ack_irq(u32 irq) +{ + /* clear the interrupt status */ + spi_cpld_write(INTR_RESET_REG, 1); + spi_cpld_write(INTR_RESET_REG, 0); +} + +/* + * Enable a expio pin's interrupt by clearing the bit in the imr. + * @param irq a expio virtual irq number + */ +static void expio_unmask_irq(u32 irq) +{ +} + +static struct irq_chip expio_irq_chip = { + .ack = expio_ack_irq, + .mask = expio_mask_irq, + .unmask = expio_unmask_irq, +}; + +static int __init mxc_expio_init(void) +{ + int i; + int pad_val; + + /* + * Configure INT line as GPIO input + */ + mxc_request_iomux(MX37_PIN_GPIO1_2, IOMUX_CONFIG_GPIO); + pad_val = mxc_iomux_get_pad(MX37_PIN_GPIO1_2); + pad_val |= PAD_CTL_PUE_PULL; + mxc_iomux_set_pad(MX37_PIN_GPIO1_2, pad_val); + gpio_direction_input(IOMUX_TO_GPIO(MX37_PIN_GPIO1_2)); + + for (i = MXC_BOARD_IRQ_START; i < (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS); + i++) { + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } + set_irq_type(IOMUX_TO_IRQ(MX37_PIN_GPIO1_2), IRQF_TRIGGER_LOW); + set_irq_chained_handler(IOMUX_TO_IRQ(MX37_PIN_GPIO1_2), + mxc_expio_irq_handler); + return 0; +} + --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/serial.h +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/serial.h @@ -0,0 +1,127 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#ifndef __ARCH_ARM_MACH_MX37_SERIAL_H__ +#define __ARCH_ARM_MACH_MX37_SERIAL_H__ + +#include + +/* UART 1 configuration */ +/*! + * This option allows to choose either an interrupt-driven software controlled + * hardware flow control (set this option to 0) or hardware-driven hardware + * flow control (set this option to 1). + */ +/* UART used as wakeup source */ +#define UART1_HW_FLOW 0 +/*! + * This specifies the threshold at which the CTS pin is deasserted by the + * RXFIFO. Set this value in Decimal to anything from 0 to 32 for + * hardware-driven hardware flow control. Read the HW spec while specifying + * this value. When using interrupt-driven software controlled hardware + * flow control set this option to -1. + */ +#define UART1_UCR4_CTSTL 16 +/*! + * This is option to enable (set this option to 1) or disable DMA data transfer + */ +#define UART1_DMA_ENABLE 0 +/*! + * Specify the size of the DMA receive buffer. The minimum buffer size is 512 + * bytes. The buffer size should be a multiple of 256. + */ +#define UART1_DMA_RXBUFSIZE 1024 +/*! + * Specify the MXC UART's Receive Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the RxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_RXTL 16 +/*! + * Specify the MXC UART's Transmit Trigger Level. This controls the threshold at + * which a maskable interrupt is generated by the TxFIFO. Set this value in + * Decimal to anything from 0 to 32. Read the HW spec while specifying this + * value. + */ +#define UART1_UFCR_TXTL 16 +/* UART 2 configuration */ +#define UART2_HW_FLOW 0 +#define UART2_UCR4_CTSTL -1 +#define UART2_DMA_ENABLE 0 +#define UART2_DMA_RXBUFSIZE 512 +#define UART2_UFCR_RXTL 16 +#define UART2_UFCR_TXTL 16 +/* UART 3 configuration */ +#define UART3_HW_FLOW 1 +#define UART3_UCR4_CTSTL 16 +#define UART3_DMA_ENABLE 0 +#define UART3_DMA_RXBUFSIZE 1024 +#define UART3_UFCR_RXTL 16 +#define UART3_UFCR_TXTL 16 +/* + * UART Chip level Configuration that a user may not have to edit. These + * configuration vary depending on how the UART module is integrated with + * the ARM core + */ +/* + * Is the MUXED interrupt output sent to the ARM core + */ +#define INTS_NOTMUXED 0 +#define INTS_MUXED 1 +/* UART 1 configuration */ +/*! + * This define specifies whether the muxed ANDed interrupt line or the + * individual interrupts from the UART port is integrated with the ARM core. + * There exists a define like this for each UART port. Valid values that can + * be used are \b INTS_NOTMUXED or \b INTS_MUXED. + */ +#define UART1_MUX_INTS INTS_MUXED +/*! + * This define specifies the transmitter interrupt number or the interrupt + * number of the ANDed interrupt in case the interrupts are muxed. There exists + * a define like this for each UART port. + */ +#define UART1_INT1 MXC_INT_UART1 +/*! + * This define specifies the receiver interrupt number. If the interrupts of + * the UART are muxed, then we specify here a dummy value -1. There exists a + * define like this for each UART port. + */ +#define UART1_INT2 -1 +/*! + * This specifies the master interrupt number. If the interrupts of the UART + * are muxed, then we specify here a dummy value of -1. There exists a define + * like this for each UART port. + */ +#define UART1_INT3 -1 +/*! + * This specifies if the UART is a shared peripheral. It holds the shared + * peripheral number if it is shared or -1 if it is not shared. There exists + * a define like this for each UART port. + */ +#define UART1_SHARED_PERI -1 +/* UART 2 configuration */ +#define UART2_MUX_INTS INTS_MUXED +#define UART2_INT1 MXC_INT_UART2 +#define UART2_INT2 -1 +#define UART2_INT3 -1 +#define UART2_SHARED_PERI -1 +/* UART 3 configuration */ +#define UART3_MUX_INTS INTS_MUXED +#define UART3_INT1 MXC_INT_UART3 +#define UART3_INT2 -1 +#define UART3_INT3 -1 +#define UART3_SHARED_PERI SPBA_UART3 + +#endif /* __ARCH_ARM_MACH_MX37_SERIAL_H__ */ --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/mx37_3stack.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/mx37_3stack.c @@ -0,0 +1,969 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE) +#include +#include +#include + +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "board-mx37_3stack.h" +#include "iomux.h" +#include "crm_regs.h" + +/*! + * @file mach-mx37/mx37_3stack.c + * + * @brief This file contains the board specific initialization routines. + * + * @ingroup MSL_MX37 + */ +extern void gpio_lcd_active(void); +extern void mxc_init_srpgconfig(void); + +/* working point(wp): 0 - 532MHz; 1 - 200MHz; */ +static struct cpu_wp cpu_wp_auto[] = { + { + .pll_rate = 532000000, + .cpu_rate = 532000000, + .pdf = 0, + .mfi = 5, + .mfd = 23, + .mfn = 13, + .cpu_voltage = 1050000,}, + { + .pll_rate = 200000000, + .cpu_rate = 200000000, + .pdf = 3, + .mfi = 8, + .mfd = 2, + .mfn = 1, + .cpu_voltage = 850000,}, +}; + +struct cpu_wp *get_cpu_wp(int *wp) +{ + *wp = 2; + return cpu_wp_auto; +} + +#if defined(CONFIG_REGULATOR_MC13892) \ + || defined(CONFIG_REGULATOR_MC13892_MODULE) +static int mc13892_reg_int(void) +{ + int i = 0; + unsigned int value; + struct regulator *regulator; + struct cpu_wp *cpu_wp_tbl1; + int cpu_wp_nr1; + char *reg_name[] = { + "SW1", + "SW2", + "SW3", + "SW4", + "SW1_STBY", + "SW2_STBY", + "SW3_STBY", + "SW4_STBY", + "SW1_DVS", + "SW2_DVS", + "SWBST", + "VIOHI", + "VPLL", + "VDIG", + "VSD", + "VUSB2", + "VVIDEO", + "VAUDIO", + "VCAM", + "VGEN1", + "VGEN2", + "VGEN3", + "USB", + "GPO1", + "GPO2", + "GPO3", + "GPO4", + }; + + /* for board v1.1 do nothing */ + if (!board_is_rev(BOARD_REV_2)) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(reg_name); i++) { + regulator = regulator_get(NULL, reg_name[i]); + if (regulator != ERR_PTR(-ENOENT)) { + regulator_enable(regulator); + regulator_put(regulator); + } + } + for (i = 0; i < ARRAY_SIZE(reg_name); i++) { + if ((strcmp(reg_name[i], "VIOHI") == 0) || + (strcmp(reg_name[i], "VPLL") == 0) || + (strcmp(reg_name[i], "VDIG") == 0) || + (strcmp(reg_name[i], "VGEN2") == 0)) + continue; + regulator = regulator_get(NULL, reg_name[i]); + if (regulator != ERR_PTR(-ENOENT)) { + regulator_disable(regulator); + regulator_put(regulator); + } + } + + /* Set the current working point. */ + cpu_wp_tbl1 = get_cpu_wp(&cpu_wp_nr1); + for (i = 0; i < cpu_wp_nr1; i++) + cpu_wp_tbl1[i].cpu_voltage += 50000; + + /* Bit 4 DRM: keep VSRTC and CLK32KMCU on for all states */ + pmic_read_reg(REG_POWER_CTL0, &value, 0xffffff); + value |= 0x000010; + pmic_write_reg(REG_POWER_CTL0, value, 0xffffff); + + return 0; +} + +late_initcall(mc13892_reg_int); +#endif + +static void mxc_nop_release(struct device *dev) +{ + /* Nothing */ +} + +/* MTD NAND flash */ +#if defined(CONFIG_MTD_NAND_MXC) || defined(CONFIG_MTD_NAND_MXC_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V2) || defined(CONFIG_MTD_NAND_MXC_V2_MODULE) \ + || defined(CONFIG_MTD_NAND_MXC_V3) + +static struct mtd_partition mxc_nand_partitions[] = { + { + .name = "nand.bootloader", + .offset = 0, + .size = 2 * 1024 * 1024}, + { + .name = "nand.kernel", + .offset = MTDPART_OFS_APPEND, + .size = 4 * 1024 * 1024}, + { + .name = "nand.rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs1", + .offset = MTDPART_OFS_APPEND, + .size = 256 * 1024 * 1024}, + { + .name = "nand.userfs2", + .offset = MTDPART_OFS_APPEND, + .size = 512 * 1024 * 1024}, + { + .name = "nand.userfs3", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL}, +}; + +static struct flash_platform_data mxc_nand_data = { + .parts = mxc_nand_partitions, + .nr_parts = ARRAY_SIZE(mxc_nand_partitions), + .width = 1, +}; + +static struct platform_device mxc_nandv2_mtd_device = { + .name = "mxc_nandv2_flash", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_nand_data, + }, +}; + +static void mxc_init_nand_mtd(void) +{ +// if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) { +// mxc_nand_data.width = 2; +// } + (void)platform_device_register(&mxc_nandv2_mtd_device); +} +#else +static inline void mxc_init_nand_mtd(void) +{ +} +#endif + +static void lcd_reset(void) +{ + static int first; + + /* ensure that LCDIO(1.8V) has been turn on */ + /* active reset line GPIO */ + if (!first) { + mxc_request_iomux(MX37_PIN_GPIO1_5, IOMUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_GPIO1_5), "gpio1_5"); + first = 1; + } + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_GPIO1_5), 0); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_GPIO1_5), 0); + /* do reset */ + msleep(10); /* tRES >= 100us */ + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_GPIO1_5), 1); + msleep(60); +} + +static struct mxc_lcd_platform_data lcd_data = { + .core_reg = "VVIDEO", + .io_reg = "SW4", + .reset = lcd_reset, +}; + +#if defined(CONFIG_KEYBOARD_MPR084) || defined(CONFIG_KEYBOARD_MPR084_MODULE) +/*! + * These functions are used to configure and the GPIO pins for keypad to + * activate and deactivate it. + */ +extern void gpio_keypad_active(void); + +extern void gpio_keypad_inactive(void); + +static u16 keymap[] = { + KEY_DOWN, KEY_LEFT, KEY_ENTER, + KEY_RIGHT, KEY_UP, KEY_LEFTALT, + KEY_TAB, KEY_ESC, +}; + +static struct mxc_keyp_platform_data keypad_data = { + .matrix = keymap, + .active = gpio_keypad_active, + .inactive = gpio_keypad_inactive, + .vdd_reg = "VGEN2", +}; +#else + +static struct mxc_keyp_platform_data keypad_data = {}; + +#endif + +static struct mxc_lightsensor_platform_data ls_data = { + .vdd_reg = "VGEN2", + .rext = 100, +}; + +#if defined(CONFIG_TOUCHSCREEN_TSC2007) || defined(CONFIG_TOUCHSCREEN_TSC2007_MODULE) +static int tsc2007_get_pendown_state(void) +{ + return !gpio_get_value(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXFS)); +} + +static int tsc2007_init(void) +{ + int pad_val; + + mxc_request_iomux(MX37_PIN_AUD5_RXFS, IOMUX_CONFIG_GPIO); + pad_val = PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU; + mxc_iomux_set_pad(MX37_PIN_AUD5_RXFS, pad_val); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXFS), "aud5_rxfs"); + gpio_direction_input(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXFS)); + return 0; +} + +static void tsc2007_exit(void) +{ +} + +struct tsc2007_platform_data tsc2007_data = { + .model = 2007, + .x_plate_ohms = 400, + .get_pendown_state = tsc2007_get_pendown_state, + .init_platform_hw = tsc2007_init, + .exit_platform_hw = tsc2007_exit, +}; +#else +struct tsc2007_platform_data tsc2007_data; +#endif + +static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { + { + .type = "tsc2007", + .addr = 0x48, + .irq = IOMUX_TO_IRQ(MX37_PIN_AUD5_RXFS), + .platform_data = &tsc2007_data, + }, + { + .type = "mpr084", + .addr = 0x5D, + .platform_data = &keypad_data, + .irq = IOMUX_TO_IRQ(MX37_PIN_GPIO1_3), + }, + { + .type = "isl29003", + .addr = 0x44, + .platform_data = &ls_data, + }, +}; + +static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { + { + .type = "mc13892", + .addr = 0x08, + .platform_data = (void *)MX37_PIN_OWIRE_LINE, + }, + { + .type = "sgtl5000-i2c", + .addr = 0x0a, + }, +}; + +static struct spi_board_info mxc_spi_board_info[] __initdata = { + { + .modalias = "cpld_spi", + .max_speed_hz = 27000000, + .bus_num = 2, + .chip_select = 0, + }, + { + .modalias = "lcd_spi", + .max_speed_hz = 5000000, + .bus_num = 2, + .platform_data = &lcd_data, + .chip_select = 1,}, +}; + +#if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE) +static struct platform_device mxc_fb_device[] = { + { + .name = "mxc_sdc_fb", + .id = 0, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, + }, + { + .name = "mxc_sdc_fb", + .id = 1, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, + }, + { + .name = "mxc_sdc_fb", + .id = 2, + .dev = { + .release = mxc_nop_release, + .coherent_dma_mask = 0xFFFFFFFF, + }, + }, +}; + +extern int g_di1_tvout; +static void mxc_init_fb(void) +{ + g_di1_tvout = 1; + (void)platform_device_register(&mxc_fb_device[0]); + (void)platform_device_register(&mxc_fb_device[1]); + (void)platform_device_register(&mxc_fb_device[2]); + gpio_lcd_active(); +} +#else +static inline void mxc_init_fb(void) +{ +} +#endif + +static struct platform_device mxcbl_device = { + .name = "mxc_mc13892_bl", +}; + +static inline void mxc_init_bl(void) +{ + platform_device_register(&mxcbl_device); +} + +/*lan9217 device*/ +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +static struct resource smsc911x_resources[] = { + { + .start = LAN9217_BASE_ADDR, + .end = LAN9217_BASE_ADDR + 255, + .flags = IORESOURCE_MEM, + }, + { + .start = MXC_BOARD_IRQ_START, + .flags = IORESOURCE_IRQ, + }, +}; + +struct smsc911x_platform_config smsc911x_config = { + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .flags = 0x8000 | SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, +}; + +static struct platform_device smsc_lan9217_device = { + .name = "smsc911x", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &smsc911x_config, + }, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, +}; + +static int __init mxc_init_enet(void) +{ + (void)platform_device_register(&smsc_lan9217_device); + return 0; +} +#else +static int __init mxc_init_enet(void) +{ + return 0; +} +#endif + +late_initcall(mxc_init_enet); + +#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE) +extern void gpio_ata_active(void); +extern void gpio_ata_inactive(void); + +static int ata_init(struct platform_device *pdev) +{ + /* Configure the pins */ + gpio_ata_active(); + + return 0; +} + +static void ata_exit(void) +{ + /* Free the pins */ + gpio_ata_inactive(); +} + +static struct fsl_ata_platform_data ata_data = { + .udma_mask = ATA_UDMA3, /* board can handle up to UDMA3 */ + .mwdma_mask = ATA_MWDMA2, + .pio_mask = ATA_PIO4, + .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2, + .max_sg = MXC_IDE_DMA_BD_NR, + .init = ata_init, + .exit = ata_exit, + .core_reg = NULL, /*"LDO2", */ + .io_reg = NULL, /*"LDO3", */ +}; + +static struct resource pata_fsl_resources[] = { + [0] = { /* I/O */ + .start = ATA_BASE_ADDR, + .end = ATA_BASE_ADDR + 0x000000C8, + .flags = IORESOURCE_MEM, + }, + [2] = { /* IRQ */ + .start = MXC_INT_ATA, + .end = MXC_INT_ATA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device pata_fsl_device = { + .name = "pata_fsl", + .id = -1, + .num_resources = ARRAY_SIZE(pata_fsl_resources), + .resource = pata_fsl_resources, + .dev = { + .platform_data = &ata_data, + .coherent_dma_mask = ~0, + }, +}; + +static void __init mxc_init_pata(void) +{ + (void)platform_device_register(&pata_fsl_device); +} +#else /* CONFIG_PATA_FSL */ +static void __init mxc_init_pata(void) +{ +} +#endif /* CONFIG_PATA_FSL */ + +/*! + * Board specific fixup function. It is called by \b setup_arch() in + * setup.c file very early on during kernel starts. It allows the user to + * statically fill in the proper values for the passed-in parameters. None of + * the parameters is used currently. + * + * @param desc pointer to \b struct \b machine_desc + * @param tags pointer to \b struct \b tag + * @param cmdline pointer to the command line + * @param mi pointer to \b struct \b meminfo + */ +static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mxc_cpu_init(); + +#ifdef CONFIG_DISCONTIGMEM + do { + int nid; + mi->nr_banks = MXC_NUMNODES; + for (nid = 0; nid < mi->nr_banks; nid++) { + SET_NODE(mi, nid); + } + } while (0); +#endif +} + +static void mxc_unifi_hardreset(int pin_level) +{ + struct regulator *gpo4; + + if (board_is_rev(BOARD_REV_2)) { + gpo4 = regulator_get(NULL, "GPO4"); + if (!IS_ERR(gpo4)) { + if (pin_level & 0x01) + regulator_enable(gpo4); + else + regulator_disable(gpo4); + } + regulator_put(gpo4); + } else { + mxc_request_iomux(MX37_PIN_AUD5_RXC, IOMUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), "aud5_rxc"); + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), + pin_level & 0x01); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), 0); + mxc_free_iomux(MX37_PIN_AUD5_RXC, IOMUX_CONFIG_GPIO); + } +} + +static struct mxc_unifi_platform_data unifi_data = { + .hardreset = mxc_unifi_hardreset, + .enable = NULL, + .reg_1v5_ana_bb = "VGEN1", + .reg_vdd_vpa = "VCAM", + .reg_1v5_dd = "VGEN1", + .host_id = 1, +}; + +struct mxc_unifi_platform_data *get_unifi_plat_data(void) +{ + return &unifi_data; +} + +EXPORT_SYMBOL(get_unifi_plat_data); + +#if defined(CONFIG_MMC_IMX_ESDHCI) || defined(CONFIG_MMC_IMX_ESDHCI_MODULE) +static struct mxc_mmc_platform_data mmc1_data = { + .ocr_mask = MMC_VDD_32_33, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 52000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", +}; + +/*! + * Resource definition for the SDHC1 + */ +static struct resource mxcsdhc1_resources[] = { + [0] = { + .start = MMC_SDHC1_BASE_ADDR, + .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC1, + .end = MXC_INT_MMC_SDHC1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +/*! Device Definition for MXC SDHC1 */ +static struct platform_device mxcsdhc1_device = { + .name = "mxsdhci", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc1_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc1_resources), + .resource = mxcsdhc1_resources, +}; + +static struct mxc_mmc_platform_data mmc2_data = { + .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30 | + MMC_VDD_31_32, + .caps = MMC_CAP_4_BIT_DATA, + .min_clk = 150000, + .max_clk = 50000000, + .card_inserted_state = 0, + .status = sdhc_get_card_det_status, + .wp_status = sdhc_write_protect, + .clock_mmc = "esdhc_clk", +}; + +static struct resource mxcsdhc2_resources[] = { + [0] = { + .start = MMC_SDHC2_BASE_ADDR, + .end = MMC_SDHC2_BASE_ADDR + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MXC_INT_MMC_SDHC2, + .end = MXC_INT_MMC_SDHC2, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 0, + .end = 0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device mxcsdhc2_device = { + .name = "mxsdhci", + .id = 1, + .dev = { + .release = mxc_nop_release, + .platform_data = &mmc2_data, + }, + .num_resources = ARRAY_SIZE(mxcsdhc2_resources), + .resource = mxcsdhc2_resources, +}; + +static inline void mxc_init_mmc(void) +{ + int cd_irq; + + cd_irq = sdhc_init_card_det(0); + if (cd_irq) { + mxcsdhc1_device.resource[2].start = cd_irq; + mxcsdhc1_device.resource[2].end = cd_irq; + } + + spba_take_ownership(SPBA_SDHC1, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc1_device); + cd_irq = sdhc_init_card_det(1); + if (cd_irq) { + mxcsdhc2_device.resource[2].start = cd_irq; + mxcsdhc2_device.resource[2].end = cd_irq; + } + spba_take_ownership(SPBA_SDHC2, SPBA_MASTER_A | SPBA_MASTER_C); + (void)platform_device_register(&mxcsdhc2_device); +} +#else +static inline void mxc_init_mmc(void) +{ +} +#endif + +static void bt_reset(void) +{ + struct regulator *gpo4; + if (board_is_rev(BOARD_REV_2)) { + gpo4 = regulator_get(NULL, "GPO4"); + if (!IS_ERR(gpo4)) + regulator_enable(gpo4); + regulator_put(gpo4); + } else { + mxc_request_iomux(MX37_PIN_AUD5_RXC, IOMUX_CONFIG_GPIO); + gpio_request(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), "aud5_rxc"); + gpio_set_value(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), 1); + gpio_direction_output(IOMUX_TO_GPIO(MX37_PIN_AUD5_RXC), 0); + } +} + +static struct mxc_bt_platform_data mxc_bt_data = { + .bt_vdd = "VGEN2", + .bt_vdd_parent = NULL, + .bt_vusb = "SW4", + .bt_vusb_parent = NULL, + .bt_reset = bt_reset, +}; + +static struct platform_device mxc_bt_device = { + .name = "mxc_bt", + .id = 0, + .dev = { + .release = mxc_nop_release, + .platform_data = &mxc_bt_data, + }, +}; + +static void mxc_init_bluetooth(void) +{ + (void)platform_device_register(&mxc_bt_device); +} + +#if defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000) \ + || defined(CONFIG_SND_SOC_IMX_3STACK_SGTL5000_MODULE) +static int mxc_sgtl5000_plat_init(void); +static int mxc_sgtl5000_plat_finit(void); +static int mxc_sgtl5000_amp_enable(int enable); + +static struct mxc_audio_platform_data sgtl5000_data = { + .ssi_num = 1, + .src_port = 2, + .ext_port = 5, + .hp_irq = IOMUX_TO_IRQ(MX37_PIN_AUD5_RXFS), + .hp_status = headphone_det_status, + .amp_enable = mxc_sgtl5000_amp_enable, + .init = mxc_sgtl5000_plat_init, + .finit = mxc_sgtl5000_plat_finit, +}; + +static struct platform_device mxc_sgtl5000_device = { + .name = "imx-3stack-sgtl5000", + .dev = { + .release = mxc_nop_release, + .platform_data = &sgtl5000_data, + }, +}; + +static int mxc_sgtl5000_plat_init(void) +{ + struct regulator *reg; + reg = regulator_get(&mxc_sgtl5000_device.dev, "GPO2"); + if (IS_ERR(reg)) + return -EINVAL; + sgtl5000_data.priv = reg; + return 0; +} + +static int mxc_sgtl5000_plat_finit(void) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + if (reg) { + regulator_put(reg); + sgtl5000_data.priv = NULL; + } + return 0; +} + +static int mxc_sgtl5000_amp_enable(int enable) +{ + struct regulator *reg; + reg = sgtl5000_data.priv; + + if (!reg) + return -EINVAL; + if (enable) + regulator_enable(reg); + else + regulator_disable(reg); + return 0; +} + +static void mxc_init_sgtl5000(void) +{ + int err, pin; + struct clk *cko1, *parent; + unsigned long rate; + + /* for board v1.1 do nothing */ + if (!board_is_rev(BOARD_REV_2)) + return; + + pin = MX37_PIN_AUD5_RXFS; + err = mxc_request_iomux(pin, IOMUX_CONFIG_GPIO); + if (err) { + sgtl5000_data.hp_irq = -1; + printk(KERN_ERR "Error: sgtl5000_init request gpio failed!\n"); + return; + } + mxc_iomux_set_pad(pin, PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU); + gpio_request(IOMUX_TO_GPIO(pin), "aud5_rxfs"); + gpio_direction_input(IOMUX_TO_GPIO(pin)); + + /* cko1 clock */ + mxc_request_iomux(MX37_PIN_GPIO1_6, IOMUX_CONFIG_ALT2); + + cko1 = clk_get(NULL, "cko1_clk"); + if (IS_ERR(cko1)) + return; + parent = clk_get(NULL, "ipg_perclk"); + if (IS_ERR(parent)) + return; + clk_set_parent(cko1, parent); + rate = clk_round_rate(cko1, 13000000); + if (rate < 8000000 || rate > 27000000) { + printk(KERN_ERR "Error: SGTL5000 mclk freq %d out of range!\n", + rate); + clk_put(parent); + clk_put(cko1); + return; + } + clk_set_rate(cko1, rate); + clk_enable(cko1); + sgtl5000_data.sysclk = rate; + platform_device_register(&mxc_sgtl5000_device); +} +#else +static inline void mxc_init_sgtl5000(void) +{ +} +#endif + +/*! + * fixup for mx37 3stack board v1.1(wm8350) + */ +static void mx37_3stack_fixup_for_board_v1(void) +{ + dptc_gp_data.reg_id = "DCDC1"; + dptc_lp_data.reg_id = "DCDC4"; + gp_reg_id = "DCDC1"; + lp_reg_id = "DCDC4"; + tve_data.dac_reg = "LDO2"; + tve_data.dig_reg = "LDO3"; + lcd_data.core_reg = "LDO1"; + lcd_data.io_reg = "DCDC6"; + dvfs_core_data.reg_id = "DCDC1"; + dvfs_per_data.reg_id = "DCDC4"; + ls_data.vdd_reg = "DCDC3"; + mxc_bt_data.bt_vdd = "DCDC3"; + mxc_bt_data.bt_vusb = "DCDC6"; + + unifi_data.reg_1v5_ana_bb = NULL; /* VMAIN is used on v1 board */ + unifi_data.reg_vdd_vpa = NULL; + unifi_data.reg_1v5_dd = NULL; + /*Set the CPU voltage to be higher for the lower setpoint + * When set to 0.85V, under certain situations, the voltage drops + * below 0.85V and the system hangs. + */ + cpu_wp_auto[1].cpu_voltage = 925000; + +#if defined(CONFIG_KEYBOARD_MPR084) || defined(CONFIG_KEYBOARD_MPR084_MODULE) + keypad_data.vdd_reg = "DCDC3"; +#endif +} + +#if defined(CONFIG_GPS_IOCTRL) || defined(CONFIG_GPS_IOCTRL_MODULE) +static struct mxc_gps_platform_data gps_data = { + .core_reg = "VIOHI", + .analog_reg = "SW3", +}; + +static struct platform_device mxc_gps_device = { + .name = "gps_ioctrl", + .id = 0, + .dev = { + .platform_data = &gps_data, + }, +}; + +static void __init mxc_init_gps(void) +{ + (void)platform_device_register(&mxc_gps_device); +} +#else +static void __init mxc_init_gps(void) +{ +} +#endif + +/*! + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + mxc_cpu_common_init(); + mxc_init_srpgconfig(); + mxc_register_gpios(); + early_console_setup(saved_command_line); + mxc_init_devices(); + if (!board_is_rev(BOARD_REV_2)) + mx37_3stack_fixup_for_board_v1(); + i2c_register_board_info(0, mxc_i2c0_board_info, + ARRAY_SIZE(mxc_i2c0_board_info)); + i2c_register_board_info(1, mxc_i2c1_board_info, + ARRAY_SIZE(mxc_i2c1_board_info)); + + spi_register_board_info(mxc_spi_board_info, + ARRAY_SIZE(mxc_spi_board_info)); + mxc_init_nand_mtd(); + mxc_init_mmc(); + mxc_init_pata(); + mxc_init_fb(); + mxc_init_bl(); + mxc_init_bluetooth(); + mxc_init_gps(); + mxc_init_sgtl5000(); +} + +static void __init mx37_3stack_timer_init(void) +{ + mx37_clocks_init(32768, 24000000, 22579200, 0); +} + +static struct sys_timer mxc_timer = { + .init = mx37_3stack_timer_init, +}; + +/* + * The following uses standard kernel macros define in arch.h in order to + * initialize __mach_desc_MX37_3STACK data structure. + */ +/* *INDENT-OFF* */ +MACHINE_START(MX37_3DS, "Freescale MX37 3-Stack Board") + /* Maintainer: Freescale Semiconductor, Inc. */ + .phys_io = AIPS1_BASE_ADDR, + .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .fixup = fixup_mxc_board, + .map_io = mx37_map_io, + .init_irq = mxc_init_irq, + .init_machine = mxc_board_init, + .timer = &mxc_timer, +MACHINE_END --- linux-fsl-imx51-2.6.31.orig/arch/arm/mach-mx37/serial.c +++ linux-fsl-imx51-2.6.31/arch/arm/mach-mx37/serial.c @@ -0,0 +1,169 @@ +/* + * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/*! + * @file mach-mx37/serial.c + * + * @brief This file contains the UART initiliazation. + * + * @ingroup MSL_MX37 + */ +#include +#include +#include +#include +#include +#include +#include "serial.h" +#include "board-mx37_3stack.h" + +#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE) + +/*! + * This is an array where each element holds information about a UART port, + * like base address of the UART, interrupt numbers etc. This structure is + * passed to the serial_core.c file. Based on which UART is used, the core file + * passes back the appropriate port structure as an argument to the control + * functions. + */ +static uart_mxc_port mxc_ports[] = { + [0] = { + .port = { + .membase = (void *)IO_ADDRESS(UART1_BASE_ADDR), + .mapbase = UART1_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART1_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .ints_muxed = UART1_MUX_INTS, + .irqs = {UART1_INT2, UART1_INT3}, + .mode = UART1_MODE, + .ir_mode = UART1_IR, + .enabled = UART1_ENABLED, + .hardware_flow = UART1_HW_FLOW, + .cts_threshold = UART1_UCR4_CTSTL, + .dma_enabled = UART1_DMA_ENABLE, + .dma_rxbuf_size = UART1_DMA_RXBUFSIZE, + .rx_threshold = UART1_UFCR_RXTL, + .tx_threshold = UART1_UFCR_TXTL, + .shared = UART1_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART1_TX, + .dma_rx_id = MXC_DMA_UART1_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, + [1] = { + .port = { + .membase = (void *)IO_ADDRESS(UART2_BASE_ADDR), + .mapbase = UART2_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART2_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 1, + }, + .ints_muxed = UART2_MUX_INTS, + .irqs = {UART2_INT2, UART2_INT3}, + .mode = UART2_MODE, + .ir_mode = UART2_IR, + .enabled = UART2_ENABLED, + .hardware_flow = UART2_HW_FLOW, + .cts_threshold = UART2_UCR4_CTSTL, + .dma_enabled = UART2_DMA_ENABLE, + .dma_rxbuf_size = UART2_DMA_RXBUFSIZE, + .rx_threshold = UART2_UFCR_RXTL, + .tx_threshold = UART2_UFCR_TXTL, + .shared = UART2_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART2_TX, + .dma_rx_id = MXC_DMA_UART2_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, + [2] = { + .port = { + .membase = (void *)IO_ADDRESS(UART3_BASE_ADDR), + .mapbase = UART3_BASE_ADDR, + .iotype = SERIAL_IO_MEM, + .irq = UART3_INT1, + .fifosize = 32, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 2, + }, + .ints_muxed = UART3_MUX_INTS, + .irqs = {UART3_INT2, UART3_INT3}, + .mode = UART3_MODE, + .ir_mode = UART3_IR, + .enabled = UART3_ENABLED, + .hardware_flow = UART3_HW_FLOW, + .cts_threshold = UART3_UCR4_CTSTL, + .dma_enabled = UART3_DMA_ENABLE, + .dma_rxbuf_size = UART3_DMA_RXBUFSIZE, + .rx_threshold = UART3_UFCR_RXTL, + .tx_threshold = UART3_UFCR_TXTL, + .shared = UART3_SHARED_PERI, + .dma_tx_id = MXC_DMA_UART3_TX, + .dma_rx_id = MXC_DMA_UART3_RX, + .rxd_mux = MXC_UART_RXDMUX, + }, +}; + +static struct platform_device mxc_uart_device1 = { + .name = "mxcintuart", + .id = 0, + .dev = { + .platform_data = &mxc_ports[0], + }, +}; + +static struct platform_device mxc_uart_device2 = { + .name = "mxcintuart", + .id = 1, + .dev = { + .platform_data = &mxc_ports[1], + }, +}; + +static struct platform_device mxc_uart_device3 = { + .name = "mxcintuart", + .id = 2, + .dev = { + .platform_data = &mxc_ports[2], + }, +}; + +static int __init mxc_init_uart(void) +{ + /* Register all the MXC UART platform device structures */ + platform_device_register(&mxc_uart_device1); + platform_device_register(&mxc_uart_device2); + + /* Grab ownership of shared UARTs 3 and 4, only when enabled */ +#if UART3_ENABLED == 1 +#if UART3_DMA_ENABLE == 1 + spba_take_ownership(UART3_SHARED_PERI, (SPBA_MASTER_A | SPBA_MASTER_C)); +#else + spba_take_ownership(UART3_SHARED_PERI, SPBA_MASTER_A); +#endif /* UART3_DMA_ENABLE */ + platform_device_register(&mxc_uart_device3); +#endif /* UART3_ENABLED */ + + return 0; +} + +#else +static int __init mxc_init_uart(void) +{ + return 0; +} +#endif + +arch_initcall(mxc_init_uart); --- linux-fsl-imx51-2.6.31.orig/arch/m68k/kernel/sys_m68k.c +++ linux-fsl-imx51-2.6.31/arch/m68k/kernel/sys_m68k.c @@ -30,37 +30,16 @@ #include #include -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff) { - return do_mmap2(addr, len, prot, flags, fd, pgoff); + /* + * This is wrong for sun3 - there PAGE_SIZE is 8Kb, + * so we need to shift the argument down by 1; m68k mmap64(3) + * (in libc) expects the last argument of mmap2 in 4Kb units. + */ + return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); } /* @@ -91,57 +70,11 @@ if (a.offset & ~PAGE_MASK) goto out; - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); -out: - return error; -} - -#if 0 -struct mmap_arg_struct64 { - __u32 addr; - __u32 len; - __u32 prot; - __u32 flags; - __u64 offset; /* 64 bits */ - __u32 fd; -}; - -asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg) -{ - int error = -EFAULT; - struct file * file = NULL; - struct mmap_arg_struct64 a; - unsigned long pgoff; - - if (copy_from_user(&a, arg, sizeof(a))) - return -EFAULT; - - if ((long)a.offset & ~PAGE_MASK) - return -EINVAL; - - pgoff = a.offset >> PAGE_SHIFT; - if ((a.offset >> PAGE_SHIFT) != pgoff) - return -EINVAL; - - if (!(a.flags & MAP_ANONYMOUS)) { - error = -EBADF; - file = fget(a.fd); - if (!file) - goto out; - } - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, + a.offset >> PAGE_SHIFT); out: return error; } -#endif struct sel_arg_struct { unsigned long n; --- linux-fsl-imx51-2.6.31.orig/arch/microblaze/kernel/sys_microblaze.c +++ linux-fsl-imx51-2.6.31/arch/microblaze/kernel/sys_microblaze.c @@ -63,46 +63,14 @@ return error; } -asmlinkage long -sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct file *file = NULL; - int ret = -EBADF; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) { - printk(KERN_INFO "no fd in mmap\r\n"); - goto out; - } - } - - down_write(¤t->mm->mmap_sem); - ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); -out: - return ret; -} - asmlinkage long sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, off_t pgoff) { - int err = -EINVAL; - - if (pgoff & ~PAGE_MASK) { - printk(KERN_INFO "no pagemask in mmap\r\n"); - goto out; - } + if (pgoff & ~PAGE_MASK) + return -EINVAL; - err = sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); -out: - return err; + return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); } /* --- linux-fsl-imx51-2.6.31.orig/arch/microblaze/kernel/syscall_table.S +++ linux-fsl-imx51-2.6.31/arch/microblaze/kernel/syscall_table.S @@ -196,7 +196,7 @@ .long sys_ni_syscall /* reserved for streams2 */ .long sys_vfork /* 190 */ .long sys_getrlimit - .long sys_mmap2 /* mmap2 */ + .long sys_mmap_pgoff /* mmap2 */ .long sys_truncate64 .long sys_ftruncate64 .long sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/mn10300/include/asm/mman.h +++ linux-fsl-imx51-2.6.31/arch/mn10300/include/asm/mman.h @@ -25,4 +25,9 @@ #define MCL_CURRENT 1 /* lock all current mappings */ #define MCL_FUTURE 2 /* lock all future mappings */ +#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */ + +#define arch_mmap_check(addr, len, flags) \ + (((flags) & MAP_FIXED && (addr) < MIN_MAP_ADDR) ? -EINVAL : 0) + #endif /* _ASM_MMAN_H */ --- linux-fsl-imx51-2.6.31.orig/arch/mn10300/kernel/sys_mn10300.c +++ linux-fsl-imx51-2.6.31/arch/mn10300/kernel/sys_mn10300.c @@ -24,47 +24,13 @@ #include -#define MIN_MAP_ADDR PAGE_SIZE /* minimum fixed mmap address */ - -/* - * memory mapping syscall - */ -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct file *file = NULL; - long error = -EINVAL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - - if (flags & MAP_FIXED && addr < MIN_MAP_ADDR) - goto out; - - error = -EBADF; - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - asmlinkage long old_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long offset) { if (offset & ~PAGE_MASK) return -EINVAL; - return sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); + return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); } struct sel_arg_struct { --- linux-fsl-imx51-2.6.31.orig/arch/mn10300/kernel/entry.S +++ linux-fsl-imx51-2.6.31/arch/mn10300/kernel/entry.S @@ -578,7 +578,7 @@ .long sys_ni_syscall /* reserved for streams2 */ .long sys_vfork /* 190 */ .long sys_getrlimit - .long sys_mmap2 + .long sys_mmap_pgoff .long sys_truncate64 .long sys_ftruncate64 .long sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/xtensa/include/asm/unistd.h +++ linux-fsl-imx51-2.6.31/arch/xtensa/include/asm/unistd.h @@ -189,7 +189,7 @@ /* File Map / Shared Memory Operations */ #define __NR_mmap2 80 -__SYSCALL( 80, xtensa_mmap2, 6) +__SYSCALL( 80, sys_mmap_pgoff, 6) #define __NR_munmap 81 __SYSCALL( 81, sys_munmap, 2) #define __NR_mprotect 82 --- linux-fsl-imx51-2.6.31.orig/arch/xtensa/include/asm/syscall.h +++ linux-fsl-imx51-2.6.31/arch/xtensa/include/asm/syscall.h @@ -13,8 +13,6 @@ asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*); asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*); asmlinkage long xtensa_pipe(int __user *); -asmlinkage long xtensa_mmap2(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long, unsigned long); asmlinkage long xtensa_ptrace(long, long, long, long); asmlinkage long xtensa_sigreturn(struct pt_regs*); asmlinkage long xtensa_rt_sigreturn(struct pt_regs*); --- linux-fsl-imx51-2.6.31.orig/arch/xtensa/kernel/Makefile +++ linux-fsl-imx51-2.6.31/arch/xtensa/kernel/Makefile @@ -27,7 +27,8 @@ -e 's/(\(\.text\.[a-z]*\))/(\1.literal \1)/g' quiet_cmd__cpp_lds_S = LDS $@ - cmd__cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ $< | sed $(sed-y) >$@ + cmd__cpp_lds_S = $(CPP) $(cpp_flags) -P -C -Uxtensa -D__ASSEMBLY__ $< \ + | sed $(sed-y) >$@ $(obj)/vmlinux.lds: $(src)/vmlinux.lds.S FORCE $(call if_changed_dep,_cpp_lds_S) --- linux-fsl-imx51-2.6.31.orig/arch/xtensa/kernel/syscall.c +++ linux-fsl-imx51-2.6.31/arch/xtensa/kernel/syscall.c @@ -57,31 +57,6 @@ return error; } - -asmlinkage long xtensa_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg) { unsigned long ret; --- linux-fsl-imx51-2.6.31.orig/arch/sh/mm/mmap.c +++ linux-fsl-imx51-2.6.31/arch/sh/mm/mmap.c @@ -54,7 +54,8 @@ /* We do not accept a shared mapping if it would violate * cache aliasing constraints. */ - if ((flags & MAP_SHARED) && (addr & shm_align_mask)) + if ((flags & MAP_SHARED) && + ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask)) return -EINVAL; return addr; } --- linux-fsl-imx51-2.6.31.orig/arch/sh/kernel/process_64.c +++ linux-fsl-imx51-2.6.31/arch/sh/kernel/process_64.c @@ -367,7 +367,7 @@ void flush_thread(void) { - /* Called by fs/exec.c (flush_old_exec) to remove traces of a + /* Called by fs/exec.c (setup_new_exec) to remove traces of a * previously running executable. */ #ifdef CONFIG_SH_FPU if (last_task_used_math == current) { --- linux-fsl-imx51-2.6.31.orig/arch/sh/kernel/sys_sh.c +++ linux-fsl-imx51-2.6.31/arch/sh/kernel/sys_sh.c @@ -26,37 +26,13 @@ #include #include -static inline long -do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, - unsigned long flags, int fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - asmlinkage int old_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, int fd, unsigned long off) { if (off & ~PAGE_MASK) return -EINVAL; - return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT); + return sys_mmap_pgoff(addr, len, prot, flags, fd, off>>PAGE_SHIFT); } asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, @@ -72,7 +48,7 @@ pgoff >>= PAGE_SHIFT - 12; - return do_mmap2(addr, len, prot, flags, fd, pgoff); + return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); } /* --- linux-fsl-imx51-2.6.31.orig/arch/blackfin/mach-common/entry.S +++ linux-fsl-imx51-2.6.31/arch/blackfin/mach-common/entry.S @@ -1434,7 +1434,7 @@ .long _sys_ni_syscall /* streams2 */ .long _sys_vfork /* 190 */ .long _sys_getrlimit - .long _sys_mmap2 + .long _sys_mmap_pgoff .long _sys_truncate64 .long _sys_ftruncate64 .long _sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/blackfin/kernel/sys_bfin.c +++ linux-fsl-imx51-2.6.31/arch/blackfin/kernel/sys_bfin.c @@ -44,39 +44,6 @@ #include #include -/* common code for old and new mmaps */ -static inline long -do_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); - out: - return error; -} - -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2(addr, len, prot, flags, fd, pgoff); -} - asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags) { return sram_alloc_with_lsl(size, flags); --- linux-fsl-imx51-2.6.31.orig/arch/s390/include/asm/kvm.h +++ linux-fsl-imx51-2.6.31/arch/s390/include/asm/kvm.h @@ -1,6 +1,5 @@ #ifndef __LINUX_KVM_S390_H #define __LINUX_KVM_S390_H - /* * asm-s390/kvm.h - KVM s390 specific structures and definitions * @@ -24,6 +23,8 @@ /* no IOAPIC for s390 */ }; +#define __KVM_S390 + /* for KVM_GET_REGS and KVM_SET_REGS */ struct kvm_regs { /* general purpose regs for s390 */ --- linux-fsl-imx51-2.6.31.orig/arch/s390/include/asm/compat.h +++ linux-fsl-imx51-2.6.31/arch/s390/include/asm/compat.h @@ -180,7 +180,7 @@ #endif -static inline void __user *compat_alloc_user_space(long len) +static inline void __user *arch_compat_alloc_user_space(long len) { unsigned long stack; --- linux-fsl-imx51-2.6.31.orig/arch/s390/kernel/sys_s390.c +++ linux-fsl-imx51-2.6.31/arch/s390/kernel/sys_s390.c @@ -33,32 +33,6 @@ #include #include "entry.h" -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - long error = -EBADF; - struct file * file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - /* * Perform the select(nd, in, out, ex, tv) and mmap() system * calls. Linux for S/390 isn't able to handle more than 5 @@ -82,7 +56,7 @@ if (copy_from_user(&a, arg, sizeof(a))) goto out; - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); out: return error; } @@ -99,7 +73,7 @@ if (a.offset & ~PAGE_MASK) goto out; - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); out: return error; } --- linux-fsl-imx51-2.6.31.orig/arch/s390/kernel/compat_linux.c +++ linux-fsl-imx51-2.6.31/arch/s390/kernel/compat_linux.c @@ -722,38 +722,6 @@ u32 offset; }; -/* common code for old and new mmaps */ -static inline long do_mmap2( - unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct file * file = NULL; - unsigned long error = -EBADF; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - if (!IS_ERR((void *) error) && error + len >= 0x80000000ULL) { - /* Result is out of bounds. */ - do_munmap(current->mm, addr, len); - error = -ENOMEM; - } - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - - asmlinkage unsigned long old32_mmap(struct mmap_arg_struct_emu31 __user *arg) { @@ -767,7 +735,8 @@ if (a.offset & ~PAGE_MASK) goto out; - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, + a.offset >> PAGE_SHIFT); out: return error; } @@ -780,7 +749,7 @@ if (copy_from_user(&a, arg, sizeof(a))) goto out; - error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); + error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); out: return error; } --- linux-fsl-imx51-2.6.31.orig/arch/s390/kvm/kvm-s390.c +++ linux-fsl-imx51-2.6.31/arch/s390/kvm/kvm-s390.c @@ -115,10 +115,16 @@ int kvm_dev_ioctl_check_extension(long ext) { + int r; + switch (ext) { + case KVM_CAP_S390_PSW: + r = 1; + break; default: - return 0; + r = 0; } + return r; } /* Section: vm related */ @@ -422,8 +428,10 @@ vcpu_load(vcpu); if (atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_RUNNING) rc = -EBUSY; - else - vcpu->arch.sie_block->gpsw = psw; + else { + vcpu->run->psw_mask = psw.mask; + vcpu->run->psw_addr = psw.addr; + } vcpu_put(vcpu); return rc; } @@ -505,9 +513,6 @@ switch (kvm_run->exit_reason) { case KVM_EXIT_S390_SIEIC: - vcpu->arch.sie_block->gpsw.mask = kvm_run->s390_sieic.mask; - vcpu->arch.sie_block->gpsw.addr = kvm_run->s390_sieic.addr; - break; case KVM_EXIT_UNKNOWN: case KVM_EXIT_S390_RESET: break; @@ -515,6 +520,9 @@ BUG(); } + vcpu->arch.sie_block->gpsw.mask = kvm_run->psw_mask; + vcpu->arch.sie_block->gpsw.addr = kvm_run->psw_addr; + might_fault(); do { @@ -529,8 +537,6 @@ /* intercept cannot be handled in-kernel, prepare kvm-run */ kvm_run->exit_reason = KVM_EXIT_S390_SIEIC; kvm_run->s390_sieic.icptcode = vcpu->arch.sie_block->icptcode; - kvm_run->s390_sieic.mask = vcpu->arch.sie_block->gpsw.mask; - kvm_run->s390_sieic.addr = vcpu->arch.sie_block->gpsw.addr; kvm_run->s390_sieic.ipa = vcpu->arch.sie_block->ipa; kvm_run->s390_sieic.ipb = vcpu->arch.sie_block->ipb; rc = 0; @@ -542,6 +548,9 @@ rc = 0; } + kvm_run->psw_mask = vcpu->arch.sie_block->gpsw.mask; + kvm_run->psw_addr = vcpu->arch.sie_block->gpsw.addr; + if (vcpu->sigset_active) sigprocmask(SIG_SETMASK, &sigsaved, NULL); --- linux-fsl-imx51-2.6.31.orig/arch/m32r/kernel/syscall_table.S +++ linux-fsl-imx51-2.6.31/arch/m32r/kernel/syscall_table.S @@ -191,7 +191,7 @@ .long sys_ni_syscall /* streams2 */ .long sys_vfork /* 190 */ .long sys_getrlimit - .long sys_mmap2 + .long sys_mmap_pgoff .long sys_truncate64 .long sys_ftruncate64 .long sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/m32r/kernel/sys_m32r.c +++ linux-fsl-imx51-2.6.31/arch/m32r/kernel/sys_m32r.c @@ -76,30 +76,6 @@ return oldval; } -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - /* * sys_ipc() is the de-multiplexer for the SysV IPC calls.. * --- linux-fsl-imx51-2.6.31.orig/arch/x86/Kconfig +++ linux-fsl-imx51-2.6.31/arch/x86/Kconfig @@ -366,6 +366,12 @@ # Following is an alphabetically sorted list of 32 bit extended platforms # Please maintain the alphabetic order if and when there are additions +config X86_LPIA + bool "LPIA-compatible" + depends on X86_32 && X86_PC + help + Choose this option if your computer is an LPIA platform. + config X86_ELAN bool "AMD Elan" depends on X86_32 @@ -2082,6 +2088,8 @@ source "drivers/Kconfig" +source "ubuntu/Kconfig" + source "drivers/firmware/Kconfig" source "fs/Kconfig" --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/mmu.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/mmu.h @@ -7,12 +7,19 @@ /* * The x86 doesn't have a mmu context, but * we put the segment information here. + * + * exec_limit is used to track the range PROT_EXEC + * mappings span. */ typedef struct { void *ldt; int size; struct mutex lock; void *vdso; +#ifdef CONFIG_X86_32 + struct desc_struct user_cs; + unsigned long exec_limit; +#endif } mm_context_t; #ifdef CONFIG_SMP --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/elf.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/elf.h @@ -197,15 +197,8 @@ set_fs(USER_DS); \ } while (0) -#define COMPAT_SET_PERSONALITY(ex) \ -do { \ - if (test_thread_flag(TIF_IA32)) \ - clear_thread_flag(TIF_ABI_PENDING); \ - else \ - set_thread_flag(TIF_ABI_PENDING); \ - current->personality |= force_personality32; \ -} while (0) - +void set_personality_ia32(void); +#define COMPAT_SET_PERSONALITY(ex) set_personality_ia32() #define COMPAT_ELF_PLATFORM ("i686") /* @@ -299,6 +292,8 @@ #ifdef CONFIG_X86_32 +#define STACK_RND_MASK (0x7ff) + #define VDSO_HIGH_BASE (__fix_to_virt(FIX_VDSO)) #define ARCH_DLINFO ARCH_DLINFO_IA32(vdso_enabled) --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/desc.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/desc.h @@ -5,6 +5,7 @@ #include #include #include +#include static inline void fill_ldt(struct desc_struct *desc, const struct user_desc *info) @@ -93,6 +94,9 @@ #define load_TLS(t, cpu) native_load_tls(t, cpu) #define set_ldt native_set_ldt +#ifdef CONFIG_X86_32 +#define load_user_cs_desc native_load_user_cs_desc +#endif /*CONFIG_X86_32*/ #define write_ldt_entry(dt, entry, desc) \ native_write_ldt_entry(dt, entry, desc) @@ -379,4 +383,25 @@ _set_gate(n, GATE_INTERRUPT, addr, 0x3, ist, __KERNEL_CS); } +#ifdef CONFIG_X86_32 +static inline void set_user_cs(struct desc_struct *desc, unsigned long limit) +{ + limit = (limit - 1) / PAGE_SIZE; + desc->a = limit & 0xffff; + desc->b = (limit & 0xf0000) | 0x00c0fb00; +} + +static inline void native_load_user_cs_desc(int cpu, struct mm_struct *mm) +{ + get_cpu_gdt_table(cpu)[GDT_ENTRY_DEFAULT_USER_CS] = (mm)->context.user_cs; +} + +#define arch_add_exec_range arch_add_exec_range +#define arch_remove_exec_range arch_remove_exec_range +#define arch_flush_exec_range arch_flush_exec_range +extern void arch_add_exec_range(struct mm_struct *mm, unsigned long limit); +extern void arch_remove_exec_range(struct mm_struct *mm, unsigned long limit); +extern void arch_flush_exec_range(struct mm_struct *mm); +#endif /* CONFIG_X86_32 */ + #endif /* _ASM_X86_DESC_H */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/syscalls.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/syscalls.h @@ -55,8 +55,6 @@ struct oldold_utsname; struct old_utsname; -asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long, unsigned long); asmlinkage int old_mmap(struct mmap_arg_struct __user *); asmlinkage int old_select(struct sel_arg_struct __user *); asmlinkage int sys_ipc(uint, int, int, int, void __user *, long); --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/thread_info.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/thread_info.h @@ -86,7 +86,6 @@ #define TIF_NOTSC 16 /* TSC is not accessible in userland */ #define TIF_IA32 17 /* 32bit process */ #define TIF_FORK 18 /* ret_from_fork */ -#define TIF_ABI_PENDING 19 #define TIF_MEMDIE 20 #define TIF_DEBUG 21 /* uses debug registers */ #define TIF_IO_BITMAP 22 /* uses I/O bitmap */ @@ -110,7 +109,6 @@ #define _TIF_NOTSC (1 << TIF_NOTSC) #define _TIF_IA32 (1 << TIF_IA32) #define _TIF_FORK (1 << TIF_FORK) -#define _TIF_ABI_PENDING (1 << TIF_ABI_PENDING) #define _TIF_DEBUG (1 << TIF_DEBUG) #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) #define _TIF_FREEZE (1 << TIF_FREEZE) --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/sys_ia32.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/sys_ia32.h @@ -62,9 +62,6 @@ asmlinkage long sys32_personality(unsigned long); asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32); -asmlinkage long sys32_mmap2(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long, unsigned long); - struct oldold_utsname; struct old_utsname; asmlinkage long sys32_olduname(struct oldold_utsname __user *); --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/processor.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/processor.h @@ -179,7 +179,7 @@ unsigned int *ecx, unsigned int *edx) { /* ecx is often an input as well as an output. */ - asm("cpuid" + asm volatile("cpuid" : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), @@ -403,7 +403,17 @@ extern asmlinkage void ignore_sysret(void); #else /* X86_64 */ #ifdef CONFIG_CC_STACKPROTECTOR -DECLARE_PER_CPU(unsigned long, stack_canary); +/* + * Make sure stack canary segment base is cached-aligned: + * "For Intel Atom processors, avoid non zero segment base address + * that is not aligned to cache line boundary at all cost." + * (Optim Ref Manual Assembly/Compiler Coding Rule 15.) + */ +struct stack_canary { + char __pad[20]; /* canary at %gs:20 */ + unsigned long canary; +}; +DECLARE_PER_CPU(struct stack_canary, stack_canary) ____cacheline_aligned; #endif #endif /* X86_64 */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/amd_iommu.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/amd_iommu.h @@ -30,6 +30,7 @@ extern void amd_iommu_flush_all_domains(void); extern void amd_iommu_flush_all_devices(void); extern void amd_iommu_shutdown(void); +extern void amd_iommu_apply_erratum_63(u16 devid); #else static inline int amd_iommu_init(void) { return -ENODEV; } static inline void amd_iommu_detect(void) { } --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/system.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/system.h @@ -31,7 +31,7 @@ "movl %P[task_canary](%[next]), %%ebx\n\t" \ "movl %%ebx, "__percpu_arg([stack_canary])"\n\t" #define __switch_canary_oparam \ - , [stack_canary] "=m" (per_cpu_var(stack_canary)) + , [stack_canary] "=m" (per_cpu_var(stack_canary.canary)) #define __switch_canary_iparam \ , [task_canary] "i" (offsetof(struct task_struct, stack_canary)) #else /* CC_STACKPROTECTOR */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/paravirt.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/paravirt.h @@ -139,6 +139,9 @@ void (*store_gdt)(struct desc_ptr *); void (*store_idt)(struct desc_ptr *); void (*set_ldt)(const void *desc, unsigned entries); +#ifdef CONFIG_X86_32 + void (*load_user_cs_desc)(int cpu, struct mm_struct *mm); +#endif /*CONFIG_X86_32*/ unsigned long (*store_tr)(void); void (*load_tls)(struct thread_struct *t, unsigned int cpu); #ifdef CONFIG_X86_64 @@ -528,10 +531,11 @@ #define EXTRA_CLOBBERS #define VEXTRA_CLOBBERS #else /* CONFIG_X86_64 */ +/* [re]ax isn't an arg, but the return val */ #define PVOP_VCALL_ARGS \ unsigned long __edi = __edi, __esi = __esi, \ - __edx = __edx, __ecx = __ecx -#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax + __edx = __edx, __ecx = __ecx, __eax = __eax +#define PVOP_CALL_ARGS PVOP_VCALL_ARGS #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) @@ -543,6 +547,7 @@ "=c" (__ecx) #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) +/* void functions are still allowed [re]ax for scratch */ #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS @@ -617,8 +622,8 @@ VEXTRA_CLOBBERS, \ pre, post, ##__VA_ARGS__) -#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \ - ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ +#define __PVOP_VCALLEESAVE(op, pre, post, ...) \ + ____PVOP_VCALL(op.func, CLBR_RET_REG, \ PVOP_VCALLEE_CLOBBERS, , \ pre, post, ##__VA_ARGS__) @@ -955,6 +960,12 @@ { PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries); } +#ifdef CONFIG_X86_32 +static inline void load_user_cs_desc(unsigned int cpu, struct mm_struct *mm) +{ + PVOP_VCALL2(pv_cpu_ops.load_user_cs_desc, cpu, mm); +} +#endif /*CONFIG_X86_32*/ static inline void store_gdt(struct desc_ptr *dtr) { PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr); @@ -1565,42 +1576,22 @@ static inline unsigned long __raw_local_save_flags(void) { - unsigned long f; - - asm volatile(paravirt_alt(PARAVIRT_CALL) - : "=a"(f) - : paravirt_type(pv_irq_ops.save_fl), - paravirt_clobber(CLBR_EAX) - : "memory", "cc"); - return f; + return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl); } static inline void raw_local_irq_restore(unsigned long f) { - asm volatile(paravirt_alt(PARAVIRT_CALL) - : "=a"(f) - : PV_FLAGS_ARG(f), - paravirt_type(pv_irq_ops.restore_fl), - paravirt_clobber(CLBR_EAX) - : "memory", "cc"); + PVOP_VCALLEE1(pv_irq_ops.restore_fl, f); } static inline void raw_local_irq_disable(void) { - asm volatile(paravirt_alt(PARAVIRT_CALL) - : - : paravirt_type(pv_irq_ops.irq_disable), - paravirt_clobber(CLBR_EAX) - : "memory", "eax", "cc"); + PVOP_VCALLEE0(pv_irq_ops.irq_disable); } static inline void raw_local_irq_enable(void) { - asm volatile(paravirt_alt(PARAVIRT_CALL) - : - : paravirt_type(pv_irq_ops.irq_enable), - paravirt_clobber(CLBR_EAX) - : "memory", "eax", "cc"); + PVOP_VCALLEE0(pv_irq_ops.irq_enable); } static inline unsigned long __raw_local_irq_save(void) --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/mce.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/mce.h @@ -214,5 +214,11 @@ static inline void mce_log_therm_throt_event(__u64 status) {} #endif +#ifdef CONFIG_X86_THERMAL_VECTOR +extern void mcheck_intel_therm_init(void); +#else +static inline void mcheck_intel_therm_init(void) { } +#endif + #endif /* __KERNEL__ */ #endif /* _ASM_X86_MCE_H */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/kvm_host.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/kvm_host.h @@ -249,7 +249,8 @@ void (*new_cr3)(struct kvm_vcpu *vcpu); int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); void (*free)(struct kvm_vcpu *vcpu); - gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); + gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, + u32 *error); void (*prefetch_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page); int (*sync_page)(struct kvm_vcpu *vcpu, @@ -618,6 +619,7 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, u32 error_code); +bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); int kvm_pic_set_irq(void *opaque, int irq, int level); @@ -641,6 +643,10 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu); void kvm_mmu_unload(struct kvm_vcpu *vcpu); void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); +gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); +gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); +gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); +gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); @@ -654,6 +660,7 @@ int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); int complete_pio(struct kvm_vcpu *vcpu); +bool kvm_check_iopl(struct kvm_vcpu *vcpu); struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn); @@ -664,20 +671,6 @@ return (struct kvm_mmu_page *)page_private(page); } -static inline u16 kvm_read_fs(void) -{ - u16 seg; - asm("mov %%fs, %0" : "=g"(seg)); - return seg; -} - -static inline u16 kvm_read_gs(void) -{ - u16 seg; - asm("mov %%gs, %0" : "=g"(seg)); - return seg; -} - static inline u16 kvm_read_ldt(void) { u16 ldt; @@ -685,16 +678,6 @@ return ldt; } -static inline void kvm_load_fs(u16 sel) -{ - asm("mov %0, %%fs" : : "rm"(sel)); -} - -static inline void kvm_load_gs(u16 sel) -{ - asm("mov %0, %%gs" : : "rm"(sel)); -} - static inline void kvm_load_ldt(u16 sel) { asm("lldt %0" : : "rm"(sel)); --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/compat.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/compat.h @@ -204,7 +204,7 @@ return (u32)(unsigned long)uptr; } -static inline void __user *compat_alloc_user_space(long len) +static inline void __user *arch_compat_alloc_user_space(long len) { struct pt_regs *regs = task_pt_regs(current); return (void __user *)regs->sp - len; --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/stackprotector.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/stackprotector.h @@ -78,14 +78,14 @@ #ifdef CONFIG_X86_64 percpu_write(irq_stack_union.stack_canary, canary); #else - percpu_write(stack_canary, canary); + percpu_write(stack_canary.canary, canary); #endif } static inline void setup_stack_canary_segment(int cpu) { #ifdef CONFIG_X86_32 - unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu) - 20; + unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu); struct desc_struct *gdt_table = get_cpu_gdt_table(cpu); struct desc_struct desc; --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/checksum_32.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/checksum_32.h @@ -161,7 +161,8 @@ "adcl $0, %0 ;\n" : "=&r" (sum) : "r" (saddr), "r" (daddr), - "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)); + "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) + : "memory"); return csum_fold(sum); } --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/kvm_x86_emulate.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/kvm_x86_emulate.h @@ -54,13 +54,23 @@ struct x86_emulate_ops { /* * read_std: Read bytes of standard (non-emulated/special) memory. - * Used for instruction fetch, stack operations, and others. + * Used for descriptor reading. * @addr: [IN ] Linear address from which to read. * @val: [OUT] Value read from memory, zero-extended to 'u_long'. * @bytes: [IN ] Number of bytes to read from memory. */ int (*read_std)(unsigned long addr, void *val, - unsigned int bytes, struct kvm_vcpu *vcpu); + unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error); + + /* + * fetch: Read bytes of standard (non-emulated/special) memory. + * Used for instruction fetch. + * @addr: [IN ] Linear address from which to read. + * @val: [OUT] Value read from memory, zero-extended to 'u_long'. + * @bytes: [IN ] Number of bytes to read from memory. + */ + int (*fetch)(unsigned long addr, void *val, + unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error); /* * read_emulated: Read bytes from emulated/special memory area. @@ -129,7 +139,7 @@ u8 seg_override; unsigned int d; unsigned long regs[NR_VCPU_REGS]; - unsigned long eip; + unsigned long eip, eip_orig; /* modrm */ u8 modrm; u8 modrm_mod; @@ -168,6 +178,7 @@ /* Execution mode, passed to the emulator. */ #define X86EMUL_MODE_REAL 0 /* Real mode. */ +#define X86EMUL_MODE_VM86 1 /* Virtual 8086 mode. */ #define X86EMUL_MODE_PROT16 2 /* 16-bit protected mode. */ #define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */ #define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/include/asm/uv/uv_hub.h +++ linux-fsl-imx51-2.6.31/arch/x86/include/asm/uv/uv_hub.h @@ -18,6 +18,8 @@ #include #include #include +#include +#include /* @@ -420,9 +422,14 @@ static inline void uv_hub_send_ipi(int pnode, int apicid, int vector) { unsigned long val; + unsigned long dmode = dest_Fixed; + + if (vector == NMI_VECTOR) + dmode = dest_NMI; val = (1UL << UVH_IPI_INT_SEND_SHFT) | - ((apicid & 0x3f) << UVH_IPI_INT_APIC_ID_SHFT) | + ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) | + (dmode << UVH_IPI_INT_DELIVERY_MODE_SHFT) | (vector << UVH_IPI_INT_VECTOR_SHFT); uv_write_global_mmr64(pnode, UVH_IPI_INT, val); } --- linux-fsl-imx51-2.6.31.orig/arch/x86/power/hibernate_asm_32.S +++ linux-fsl-imx51-2.6.31/arch/x86/power/hibernate_asm_32.S @@ -27,10 +27,17 @@ ret ENTRY(restore_image) + movl mmu_cr4_features, %ecx movl resume_pg_dir, %eax subl $__PAGE_OFFSET, %eax movl %eax, %cr3 + jecxz 1f # cr4 Pentium and higher, skip if zero + andl $~(X86_CR4_PGE), %ecx + movl %ecx, %cr4; # turn off PGE + movl %cr3, %eax; # flush TLB + movl %eax, %cr3 +1: movl restore_pblist, %edx .p2align 4,,7 @@ -54,16 +61,8 @@ movl $swapper_pg_dir, %eax subl $__PAGE_OFFSET, %eax movl %eax, %cr3 - /* Flush TLB, including "global" things (vmalloc) */ movl mmu_cr4_features, %ecx jecxz 1f # cr4 Pentium and higher, skip if zero - movl %ecx, %edx - andl $~(X86_CR4_PGE), %edx - movl %edx, %cr4; # turn off PGE -1: - movl %cr3, %eax; # flush TLB - movl %eax, %cr3 - jecxz 1f # cr4 Pentium and higher, skip if zero movl %ecx, %cr4; # turn PGE back on 1: --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/fault.c +++ linux-fsl-imx51-2.6.31/arch/x86/mm/fault.c @@ -807,8 +807,10 @@ up_read(&mm->mmap_sem); /* Kernel mode? Handle exceptions or die: */ - if (!(error_code & PF_USER)) + if (!(error_code & PF_USER)) { no_context(regs, error_code, address); + return; + } /* User-space => ok to do another page fault: */ if (is_prefetch(regs, error_code, address)) --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/init.c +++ linux-fsl-imx51-2.6.31/arch/x86/mm/init.c @@ -77,6 +77,7 @@ #else static inline void set_nx(void) { + nx_enabled = _PAGE_NX && ((__supported_pte_mask & _PAGE_NX) == _PAGE_NX); } #endif @@ -212,6 +213,14 @@ set_nx(); if (nx_enabled) printk(KERN_INFO "NX (Execute Disable) protection: active\n"); + else +#ifdef CONFIG_X86_32 + printk(KERN_INFO "Using x86 segment limits to approximate " + "NX protection\n"); +#else + printk(KERN_WARNING "Warning: NX (Execute Disable) protection " + "missing in CPU or disabled in BIOS!\n"); +#endif /* Enable PSE if available */ if (cpu_has_pse) --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/pageattr.c +++ linux-fsl-imx51-2.6.31/arch/x86/mm/pageattr.c @@ -143,6 +143,7 @@ mb(); } +EXPORT_SYMBOL_GPL(clflush_cache_range); static void __cpa_flush_all(void *arg) { @@ -822,6 +823,7 @@ { struct cpa_data cpa; int ret, cache, checkalias; + unsigned long baddr = 0; /* * Check, if we are requested to change a not supported @@ -853,6 +855,11 @@ */ WARN_ON_ONCE(1); } + /* + * Save address for cache flush. *addr is modified in the call + * to __change_page_attr_set_clr() below. + */ + baddr = *addr; } /* Must avoid aliasing mappings in the highmem code */ @@ -900,7 +907,7 @@ cpa_flush_array(addr, numpages, cache, cpa.flags, pages); } else - cpa_flush_range(*addr, numpages, cache); + cpa_flush_range(baddr, numpages, cache); } else cpa_flush_all(cache); --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/tlb.c +++ linux-fsl-imx51-2.6.31/arch/x86/mm/tlb.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -129,6 +130,10 @@ union smp_flush_state *f; cpu = smp_processor_id(); +#ifdef CONFIG_X86_32 + if (current->active_mm) + load_user_cs_desc(cpu, current->active_mm); +#endif /* * orig_rax contains the negated interrupt vector. * Use that to determine where the sender put the data. --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/Makefile +++ linux-fsl-imx51-2.6.31/arch/x86/mm/Makefile @@ -1,6 +1,11 @@ obj-y := init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \ pat.o pgtable.o gup.o +# Make sure __phys_addr has no stackprotector +nostackp := $(call cc-option, -fno-stack-protector) +CFLAGS_ioremap.o := $(nostackp) +CFLAGS_init.o := $(nostackp) + obj-$(CONFIG_SMP) += tlb.o obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o --- linux-fsl-imx51-2.6.31.orig/arch/x86/mm/mmap.c +++ linux-fsl-imx51-2.6.31/arch/x86/mm/mmap.c @@ -29,13 +29,26 @@ #include #include #include +#include + +static unsigned int stack_maxrandom_size(void) +{ + unsigned int max = 0; + if ((current->flags & PF_RANDOMIZE) && + !(current->personality & ADDR_NO_RANDOMIZE)) { + max = ((-1U) & STACK_RND_MASK) << PAGE_SHIFT; + } + + return max; +} + /* * Top of mmap area (just below the process stack). * - * Leave an at least ~128 MB hole. + * Leave an at least ~128 MB hole with possible stack randomization. */ -#define MIN_GAP (128*1024*1024) +#define MIN_GAP (128*1024*1024UL + stack_maxrandom_size()) #define MAX_GAP (TASK_SIZE/6*5) /* @@ -118,6 +131,11 @@ } else { mm->mmap_base = mmap_base(); mm->get_unmapped_area = arch_get_unmapped_area_topdown; +#ifdef CONFIG_X86_32 + if (!nx_enabled && !(current->personality & READ_IMPLIES_EXEC) + && mmap_is_ia32()) + mm->get_unmapped_exec_area = arch_get_unmapped_exec_area; +#endif mm->unmap_area = arch_unmap_area_topdown; } } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/head_32.S +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/head_32.S @@ -439,7 +439,6 @@ jne 1f movl $per_cpu__gdt_page,%eax movl $per_cpu__stack_canary,%ecx - subl $20, %ecx movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) shrl $16, %ecx movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/process_64.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/process_64.c @@ -525,6 +525,18 @@ current->personality &= ~READ_IMPLIES_EXEC; } +void set_personality_ia32(void) +{ + /* inherit personality from parent */ + + /* Make sure to be in 32bit mode */ + set_thread_flag(TIF_IA32); + current->personality |= force_personality32; + + /* Prepare the first "return" to user space */ + current_thread_info()->status |= TS_COMPAT; +} + asmlinkage long sys_clone(unsigned long clone_flags, unsigned long newsp, void __user *parent_tid, void __user *child_tid, struct pt_regs *regs) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/reboot.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/reboot.c @@ -217,6 +217,15 @@ DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), }, }, + { /* Handle problems with rebooting on Dell Dimension 9200 */ + .callback = set_bios_reboot, + .ident = "Dell Dimension 9200", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), + DMI_MATCH(DMI_BOARD_NAME, "0CT017"), + }, + }, { /* Handle problems with rebooting on HP laptops */ .callback = set_bios_reboot, .ident = "HP Compaq Laptop", @@ -257,6 +266,34 @@ DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), }, }, +#ifdef CONFIG_X86_LPIA + { /* Handle problems with rebooting on Intel Crown Beach board */ + .callback = set_bios_reboot, + .ident = "Intel Crown Beach board", + .matches = { + /* Currently the DMI info is not customized and indicates + * OEM need change that */ + DMI_MATCH(DMI_SYS_VENDOR, "To Be Filled By O.E.M."), + DMI_MATCH(DMI_PRODUCT_NAME, "To Be Filled By O.E.M."), + }, + }, +#endif + { /* Handle problems with rebooting on Dell XPS710 */ + .callback = set_bios_reboot, + .ident = "Dell XPS710", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), + }, + }, + { /* Handle problems with rebooting on ASUS P4S800 */ + .callback = set_bios_reboot, + .ident = "ASUS P4S800", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "P4S800"), + }, + }, { } }; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/pci-calgary_64.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/pci-calgary_64.c @@ -318,13 +318,15 @@ pdev = to_pci_dev(dev); + /* search up the device tree for an iommu */ pbus = pdev->bus; - - /* is the device behind a bridge? Look for the root bus */ - while (pbus->parent) + do { + tbl = pci_iommu(pbus); + if (tbl && tbl->it_busno == pbus->number) + break; + tbl = NULL; pbus = pbus->parent; - - tbl = pci_iommu(pbus); + } while (pbus); BUG_ON(tbl && (tbl->it_busno != pbus->number)); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/setup.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/setup.c @@ -107,6 +107,7 @@ #ifdef CONFIG_X86_64 #include #endif +#include #ifndef ARCH_SETUP #define ARCH_SETUP @@ -1030,6 +1031,8 @@ conswitchp = &dummy_con; #endif #endif + + mcheck_intel_therm_init(); } #ifdef CONFIG_X86_32 --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/sys_x86_64.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/sys_x86_64.c @@ -23,26 +23,11 @@ unsigned long fd, unsigned long off) { long error; - struct file *file; - error = -EINVAL; if (off & ~PAGE_MASK) goto out; - error = -EBADF; - file = NULL; - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, off >> PAGE_SHIFT); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); + error = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); out: return error; } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/paravirt.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/paravirt.c @@ -369,6 +369,9 @@ .read_tscp = native_read_tscp, .load_tr_desc = native_load_tr_desc, .set_ldt = native_set_ldt, +#ifdef CONFIG_X86_32 + .load_user_cs_desc = native_load_user_cs_desc, +#endif /*CONFIG_X86_32*/ .load_gdt = native_load_gdt, .load_idt = native_load_idt, .store_gdt = native_store_gdt, --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/kvm.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/kvm.c @@ -34,7 +34,6 @@ struct kvm_para_state { u8 mmu_queue[MMU_QUEUE_SIZE]; int mmu_queue_len; - enum paravirt_lazy_mode mode; }; static DEFINE_PER_CPU(struct kvm_para_state, para_state); @@ -77,7 +76,7 @@ { struct kvm_para_state *state = kvm_para_state(); - if (state->mode != PARAVIRT_LAZY_MMU) { + if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) { kvm_mmu_op(buffer, len); return; } @@ -185,10 +184,7 @@ static void kvm_enter_lazy_mmu(void) { - struct kvm_para_state *state = kvm_para_state(); - paravirt_enter_lazy_mmu(); - state->mode = paravirt_get_lazy_mode(); } static void kvm_leave_lazy_mmu(void) @@ -197,7 +193,6 @@ mmu_queue_flush(state); paravirt_leave_lazy_mmu(); - state->mode = paravirt_get_lazy_mode(); } static void __init paravirt_ops_setup(void) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/process_32.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/process_32.c @@ -299,6 +299,8 @@ void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) { + int cpu; + set_user_gs(regs, 0); regs->fs = 0; set_fs(USER_DS); @@ -308,6 +310,11 @@ regs->cs = __USER_CS; regs->ip = new_ip; regs->sp = new_sp; + + cpu = get_cpu(); + load_user_cs_desc(cpu, current->mm); + put_cpu(); + /* * Free the old FP and other extended state */ @@ -354,7 +361,8 @@ /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */ __unlazy_fpu(prev_p); - + if (next_p->mm) + load_user_cs_desc(cpu, next_p->mm); /* we're going to use this soon, after a few expensive things */ if (next_p->fpu_counter > 5) @@ -495,3 +503,40 @@ return 0; } +static void modify_cs(struct mm_struct *mm, unsigned long limit) +{ + mm->context.exec_limit = limit; + set_user_cs(&mm->context.user_cs, limit); + if (mm == current->mm) { + int cpu; + + cpu = get_cpu(); + load_user_cs_desc(cpu, mm); + put_cpu(); + } +} + +void arch_add_exec_range(struct mm_struct *mm, unsigned long limit) +{ + if (limit > mm->context.exec_limit) + modify_cs(mm, limit); +} + +void arch_remove_exec_range(struct mm_struct *mm, unsigned long old_end) +{ + struct vm_area_struct *vma; + unsigned long limit = PAGE_SIZE; + + if (old_end == mm->context.exec_limit) { + for (vma = mm->mmap; vma; vma = vma->vm_next) + if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit)) + limit = vma->vm_end; + modify_cs(mm, limit); + } +} + +void arch_flush_exec_range(struct mm_struct *mm) +{ + mm->context.exec_limit = 0; + set_user_cs(&mm->context.user_cs, 0); +} --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/tlb_uv.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/tlb_uv.c @@ -843,8 +843,8 @@ GFP_KERNEL, cpu_to_node(cur_cpu)); uv_bau_retry_limit = 1; - uv_nshift = uv_hub_info->n_val; - uv_mmask = (1UL << uv_hub_info->n_val) - 1; + uv_nshift = uv_hub_info->m_val; + uv_mmask = (1UL << uv_hub_info->m_val) - 1; nblades = uv_num_possible_blades(); uv_bau_table_bases = (struct bau_control **) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/amd_iommu_init.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/amd_iommu_init.c @@ -240,7 +240,7 @@ writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); } -static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) +static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit) { u32 ctrl; @@ -509,6 +509,26 @@ amd_iommu_dev_table[devid].data[i] |= (1 << _bit); } +static int get_dev_entry_bit(u16 devid, u8 bit) +{ + int i = (bit >> 5) & 0x07; + int _bit = bit & 0x1f; + + return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit; +} + + +void amd_iommu_apply_erratum_63(u16 devid) +{ + int sysmgt; + + sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | + (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); + + if (sysmgt == 0x01) + set_dev_entry_bit(devid, DEV_ENTRY_IW); +} + /* Writes the specific IOMMU for a device into the rlookup table */ static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) { @@ -537,6 +557,8 @@ if (flags & ACPI_DEVFLAG_LINT1) set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); + amd_iommu_apply_erratum_63(devid); + set_iommu_for_device(iommu, devid); } @@ -893,7 +915,7 @@ * ****************************************************************************/ -static int __init iommu_setup_msi(struct amd_iommu *iommu) +static int iommu_setup_msi(struct amd_iommu *iommu) { int r; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/traps.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/traps.c @@ -118,6 +118,67 @@ if (!user_mode_vm(regs)) die(str, regs, err); } + +static inline int +__compare_user_cs_desc(const struct desc_struct *desc1, + const struct desc_struct *desc2) +{ + return ((desc1->limit0 != desc2->limit0) || + (desc1->limit != desc2->limit) || + (desc1->base0 != desc2->base0) || + (desc1->base1 != desc2->base1) || + (desc1->base2 != desc2->base2)); +} + +/* + * lazy-check for CS validity on exec-shield binaries: + * + * the original non-exec stack patch was written by + * Solar Designer . Thanks! + */ +static int +check_lazy_exec_limit(int cpu, struct pt_regs *regs, long error_code) +{ + struct desc_struct *desc1, *desc2; + struct vm_area_struct *vma; + unsigned long limit; + + if (current->mm == NULL) + return 0; + + limit = -1UL; + if (current->mm->context.exec_limit != -1UL) { + limit = PAGE_SIZE; + spin_lock(¤t->mm->page_table_lock); + for (vma = current->mm->mmap; vma; vma = vma->vm_next) + if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit)) + limit = vma->vm_end; + vma = get_gate_vma(current); + if (vma && (vma->vm_flags & VM_EXEC) && (vma->vm_end > limit)) + limit = vma->vm_end; + spin_unlock(¤t->mm->page_table_lock); + if (limit >= TASK_SIZE) + limit = -1UL; + current->mm->context.exec_limit = limit; + } + set_user_cs(¤t->mm->context.user_cs, limit); + + desc1 = ¤t->mm->context.user_cs; + desc2 = get_cpu_gdt_table(cpu) + GDT_ENTRY_DEFAULT_USER_CS; + + if (__compare_user_cs_desc(desc1, desc2)) { + /* + * The CS was not in sync - reload it and retry the + * instruction. If the instruction still faults then + * we won't hit this branch next time around. + */ + load_user_cs_desc(cpu, current->mm); + + return 1; + } + + return 0; +} #endif static void __kprobes @@ -276,6 +337,20 @@ if (!user_mode(regs)) goto gp_in_kernel; +#ifdef CONFIG_X86_32 +{ + int cpu; + int ok; + + cpu = get_cpu(); + ok = check_lazy_exec_limit(cpu, regs, error_code); + put_cpu(); + + if (ok) + return; +} +#endif + tsk->thread.error_code = error_code; tsk->thread.trap_no = 13; @@ -892,11 +967,29 @@ } #ifdef CONFIG_X86_32 +/* + * The fixup code for errors in iret jumps to here (iret_exc). It loses + * the original trap number and erorr code. The bogus trap 32 and error + * code 0 are what the vanilla kernel delivers via: + * DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0, 1) + * + * NOTE: Because of the final "1" in the macro we need to enable interrupts. + * + * In case of a general protection fault in the iret instruction, we + * need to check for a lazy CS update for exec-shield. + */ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) { siginfo_t info; + int ok; + int cpu; local_irq_enable(); + cpu = get_cpu(); + ok = check_lazy_exec_limit(cpu, regs, error_code); + put_cpu(); + if (ok) return; + info.si_signo = SIGILL; info.si_errno = 0; info.si_code = ILL_BADSTK; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/alternative.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/alternative.c @@ -417,6 +417,8 @@ void __init alternative_instructions(void) { + unsigned long flags; + /* The patching is not fully atomic, so try to avoid local interruptions that might execute the to be patched code. Other CPUs are not running. */ @@ -433,7 +435,9 @@ * patching. */ + local_irq_save(flags); apply_alternatives(__alt_instructions, __alt_instructions_end); + local_irq_restore(flags); /* switch to patch-once-at-boottime-only mode and free the * tables in case we know the number of CPUs will never ever @@ -463,7 +467,9 @@ alternatives_smp_switch(0); } #endif + local_irq_save(flags); apply_paravirt(__parainstructions, __parainstructions_end); + local_irq_restore(flags); if (smp_alt_once) free_init_pages("SMP alternatives", --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/ptrace.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/ptrace.c @@ -417,14 +417,14 @@ { if (kbuf) { unsigned long *k = kbuf; - while (count > 0) { + while (count >= sizeof(*k)) { *k++ = getreg(target, pos); count -= sizeof(*k); pos += sizeof(*k); } } else { unsigned long __user *u = ubuf; - while (count > 0) { + while (count >= sizeof(*u)) { if (__put_user(getreg(target, pos), u++)) return -EFAULT; count -= sizeof(*u); @@ -443,14 +443,14 @@ int ret = 0; if (kbuf) { const unsigned long *k = kbuf; - while (count > 0 && !ret) { + while (count >= sizeof(*k) && !ret) { ret = putreg(target, pos, *k++); count -= sizeof(*k); pos += sizeof(*k); } } else { const unsigned long __user *u = ubuf; - while (count > 0 && !ret) { + while (count >= sizeof(*u) && !ret) { unsigned long word; ret = __get_user(word, u++); if (ret) @@ -1223,14 +1223,14 @@ { if (kbuf) { compat_ulong_t *k = kbuf; - while (count > 0) { + while (count >= sizeof(*k)) { getreg32(target, pos, k++); count -= sizeof(*k); pos += sizeof(*k); } } else { compat_ulong_t __user *u = ubuf; - while (count > 0) { + while (count >= sizeof(*u)) { compat_ulong_t word; getreg32(target, pos, &word); if (__put_user(word, u++)) @@ -1251,14 +1251,14 @@ int ret = 0; if (kbuf) { const compat_ulong_t *k = kbuf; - while (count > 0 && !ret) { + while (count >= sizeof(*k) && !ret) { ret = putreg32(target, pos, *k++); count -= sizeof(*k); pos += sizeof(*k); } } else { const compat_ulong_t __user *u = ubuf; - while (count > 0 && !ret) { + while (count >= sizeof(*u) && !ret) { compat_ulong_t word; ret = __get_user(word, u++); if (ret) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/i8253.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/i8253.c @@ -21,8 +21,10 @@ #ifdef CONFIG_X86_32 static void pit_disable_clocksource(void); +static void pit_enable_clocksource(void); #else static inline void pit_disable_clocksource(void) { } +static inline void pit_enable_clocksource(void) { } #endif /* @@ -67,7 +69,7 @@ break; case CLOCK_EVT_MODE_RESUME: - /* Nothing to do here */ + pit_enable_clocksource(); break; } spin_unlock(&i8253_lock); @@ -200,19 +202,27 @@ .shift = 20, }; +int pit_cs_registered; static void pit_disable_clocksource(void) { - /* - * Use mult to check whether it is registered or not - */ - if (pit_cs.mult) { + if (pit_cs_registered) { clocksource_unregister(&pit_cs); - pit_cs.mult = 0; + pit_cs_registered = 0; + } +} + +static void pit_enable_clocksource(void) +{ + if (!pit_cs_registered && !clocksource_register(&pit_cs)) { + pit_cs_registered = 1; } } + + static int __init init_pit_clocksource(void) { + int ret; /* * Several reasons not to register PIT as a clocksource: * @@ -226,7 +236,10 @@ pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift); - return clocksource_register(&pit_cs); + ret = clocksource_register(&pit_cs); + if (!ret) + pit_cs_registered = 1; + return ret; } arch_initcall(init_pit_clocksource); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/amd_iommu.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/amd_iommu.c @@ -485,8 +485,6 @@ int i; for (i = 0; i <= amd_iommu_last_bdf; ++i) { - if (amd_iommu_pd_table[i] == NULL) - continue; iommu = amd_iommu_rlookup_table[i]; if (!iommu) @@ -1114,6 +1112,8 @@ amd_iommu_dev_table[devid].data[1] = 0; amd_iommu_dev_table[devid].data[2] = 0; + amd_iommu_apply_erratum_63(devid); + /* decrease reference counter */ domain->dev_cnt -= 1; @@ -1873,10 +1873,10 @@ struct pci_dev *dev = NULL; struct dma_ops_domain *dma_dom; struct amd_iommu *iommu; - u16 devid; + u16 devid, __devid; while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { - devid = calc_devid(dev->bus->number, dev->devfn); + __devid = devid = calc_devid(dev->bus->number, dev->devfn); if (devid > amd_iommu_last_bdf) continue; devid = amd_iommu_alias_table[devid]; @@ -1891,6 +1891,10 @@ init_unity_mappings_for_device(dma_dom, devid); dma_dom->target_dev = devid; + attach_device(iommu, &dma_dom->domain, devid); + if (__devid != devid) + attach_device(iommu, &dma_dom->domain, __devid); + list_add_tail(&dma_dom->list, &iommu_pd_list); } } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/sys_i386_32.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/sys_i386_32.c @@ -24,31 +24,6 @@ #include -asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - int error = -EBADF; - struct file *file = NULL; - struct mm_struct *mm = current->mm; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(&mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(&mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - /* * Perform the select(nd, in, out, ex, tv) and mmap() system * calls. Linux/i386 didn't use to be able to handle more than @@ -77,7 +52,7 @@ if (a.offset & ~PAGE_MASK) goto out; - err = sys_mmap2(a.addr, a.len, a.prot, a.flags, + err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); out: return err; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/syscall_table_32.S +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/syscall_table_32.S @@ -191,7 +191,7 @@ .long sys_ni_syscall /* reserved for streams2 */ .long ptregs_vfork /* 190 */ .long sys_getrlimit - .long sys_mmap2 + .long sys_mmap_pgoff .long sys_truncate64 .long sys_ftruncate64 .long sys_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/process.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/process.c @@ -94,18 +94,6 @@ { struct task_struct *tsk = current; -#ifdef CONFIG_X86_64 - if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) { - clear_tsk_thread_flag(tsk, TIF_ABI_PENDING); - if (test_tsk_thread_flag(tsk, TIF_IA32)) { - clear_tsk_thread_flag(tsk, TIF_IA32); - } else { - set_tsk_thread_flag(tsk, TIF_IA32); - current_thread_info()->status |= TS_COMPAT; - } - } -#endif - clear_tsk_thread_flag(tsk, TIF_DEBUG); tsk->thread.debugreg0 = 0; @@ -622,6 +610,16 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) { unsigned long range_end = mm->brk + 0x02000000; - return randomize_range(mm->brk, range_end, 0) ? : mm->brk; + unsigned long bump = 0; +#ifdef CONFIG_X86_32 + /* in the case of NX emulation, shove the brk segment way out of the + way of the exec randomization area, since it can collide with + future allocations if not. */ + if ( (mm->get_unmapped_exec_area == arch_get_unmapped_exec_area) && + (mm->brk < 0x08000000) ) { + bump = (TASK_SIZE/6); + } +#endif + return bump + (randomize_range(mm->brk, range_end, 0) ? : mm->brk); } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/e820.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/e820.c @@ -1378,8 +1378,8 @@ if (mb < 16) return 1024*1024; - /* To 32MB for anything above that */ - return 32*1024*1024; + /* To 64MB for anything above that */ + return 64*1024*1024; } #define MAX_RESOURCE_SIZE ((resource_size_t)-1) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/pci-gart_64.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/pci-gart_64.c @@ -856,7 +856,7 @@ #endif if (isdigit(*p) && get_option(&p, &arg)) iommu_size = arg; - if (!strncmp(p, "fullflush", 8)) + if (!strncmp(p, "fullflush", 9)) iommu_fullflush = 1; if (!strncmp(p, "nofullflush", 11)) iommu_fullflush = 0; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/kvmclock.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/kvmclock.c @@ -50,8 +50,8 @@ struct timespec ts; int low, high; - low = (int)__pa(&wall_clock); - high = ((u64)__pa(&wall_clock) >> 32); + low = (int)__pa_symbol(&wall_clock); + high = ((u64)__pa_symbol(&wall_clock) >> 32); native_write_msr(MSR_KVM_WALL_CLOCK, low, high); vcpu_time = &get_cpu_var(hv_clock); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/pci-dma.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/pci-dma.c @@ -203,7 +203,7 @@ if (!strncmp(p, "allowdac", 8)) forbid_dac = 0; if (!strncmp(p, "nodac", 5)) - forbid_dac = -1; + forbid_dac = 1; if (!strncmp(p, "usedac", 6)) { forbid_dac = -1; return 1; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/apic/x2apic_uv_x.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/apic/x2apic_uv_x.c @@ -352,14 +352,14 @@ for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { alias.v = uv_read_local_mmr(redir_addrs[i].alias); - if (alias.s.base == 0) { + if (alias.s.enable && alias.s.base == 0) { *size = (1UL << alias.s.m_alias); redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; return; } } - BUG(); + *base = *size = 0; } enum map_type {map_wb, map_uc}; @@ -609,12 +609,12 @@ uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size; uv_cpu_hub_info(cpu)->m_val = m_val; - uv_cpu_hub_info(cpu)->n_val = m_val; + uv_cpu_hub_info(cpu)->n_val = n_val; uv_cpu_hub_info(cpu)->numa_blade_id = blade; uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; uv_cpu_hub_info(cpu)->pnode = pnode; uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; - uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; + uv_cpu_hub_info(cpu)->gpa_mask = (1UL << (m_val + n_val)) - 1; uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/apic/es7000_32.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/apic/es7000_32.c @@ -167,7 +167,7 @@ { /* MPENTIUMIII */ if (boot_cpu_data.x86 == 6 && - (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) + (boot_cpu_data.x86_model >= 7 && boot_cpu_data.x86_model <= 11)) return 1; return 0; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/intel_cacheinfo.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -93,7 +93,7 @@ { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */ { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */ { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */ - { 0xd7, LVL_3, 2038 }, /* 8-way set assoc, 64 byte line size */ + { 0xd7, LVL_3, 2048 }, /* 8-way set assoc, 64 byte line size */ { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */ { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */ @@ -101,6 +101,9 @@ { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */ { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */ { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ + { 0xea, LVL_3, 12288 }, /* 24-way set assoc, 64 byte line size */ + { 0xeb, LVL_3, 18432 }, /* 24-way set assoc, 64 byte line size */ + { 0xec, LVL_3, 24576 }, /* 24-way set assoc, 64 byte line size */ { 0x00, 0, 0} }; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/common.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/common.c @@ -799,6 +799,19 @@ /* Filter out anything that depends on CPUID levels we don't have */ filter_cpuid_features(c, true); +#ifdef CONFIG_X86_32 + /* + * emulation of NX with segment limits unfortunately means + * we have to disable the fast system calls, due to the way that + * sysexit clears the segment limits on return. + * If we have NX, then we don't need to do this. + */ +#ifdef CONFIG_X86_PAE + if (!test_cpu_cap(c, X86_FEATURE_NX)) +#endif + clear_cpu_cap(c, X86_FEATURE_SEP); +#endif /*CONFIG_X86_32*/ + /* If the model name is still unset, do table lookup. */ if (!c->x86_model_id[0]) { const char *p; @@ -1043,7 +1056,7 @@ #else /* CONFIG_X86_64 */ #ifdef CONFIG_CC_STACKPROTECTOR -DEFINE_PER_CPU(unsigned long, stack_canary); +DEFINE_PER_CPU(struct stack_canary, stack_canary) ____cacheline_aligned; #endif /* Make sure %fs and %gs are initialized properly in idle threads */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/perfctr-watchdog.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -711,7 +711,7 @@ switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: if (boot_cpu_data.x86 != 6 && boot_cpu_data.x86 != 15 && - boot_cpu_data.x86 != 16) + boot_cpu_data.x86 != 16 && boot_cpu_data.x86 != 17) return; wd_ops = &k7_wd_ops; break; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/mcheck/therm_throt.c @@ -34,20 +34,33 @@ /* How long to wait between reporting thermal events */ #define CHECK_INTERVAL (300 * HZ) -static DEFINE_PER_CPU(__u64, next_check) = INITIAL_JIFFIES; -static DEFINE_PER_CPU(unsigned long, thermal_throttle_count); -static DEFINE_PER_CPU(bool, thermal_throttle_active); +/* + * Current thermal throttling state: + */ +struct thermal_state { + bool is_throttled; + + u64 next_check; + unsigned long throttle_count; + unsigned long last_throttle_count; +}; + +static DEFINE_PER_CPU(struct thermal_state, thermal_state); + +static atomic_t therm_throt_en = ATOMIC_INIT(0); -static atomic_t therm_throt_en = ATOMIC_INIT(0); +static u32 lvtthmr_init __read_mostly; #ifdef CONFIG_SYSFS #define define_therm_throt_sysdev_one_ro(_name) \ static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL) #define define_therm_throt_sysdev_show_func(name) \ -static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev, \ - struct sysdev_attribute *attr, \ - char *buf) \ + \ +static ssize_t therm_throt_sysdev_show_##name( \ + struct sys_device *dev, \ + struct sysdev_attribute *attr, \ + char *buf) \ { \ unsigned int cpu = dev->id; \ ssize_t ret; \ @@ -55,7 +68,7 @@ preempt_disable(); /* CPU hotplug */ \ if (cpu_online(cpu)) \ ret = sprintf(buf, "%lu\n", \ - per_cpu(thermal_throttle_##name, cpu)); \ + per_cpu(thermal_state, cpu).name); \ else \ ret = 0; \ preempt_enable(); \ @@ -63,11 +76,11 @@ return ret; \ } -define_therm_throt_sysdev_show_func(count); -define_therm_throt_sysdev_one_ro(count); +define_therm_throt_sysdev_show_func(throttle_count); +define_therm_throt_sysdev_one_ro(throttle_count); static struct attribute *thermal_throttle_attrs[] = { - &attr_count.attr, + &attr_throttle_count.attr, NULL }; @@ -93,33 +106,39 @@ * 1 : Event should be logged further, and a message has been * printed to the syslog. */ -static int therm_throt_process(int curr) +static int therm_throt_process(bool is_throttled) { - unsigned int cpu = smp_processor_id(); - __u64 tmp_jiffs = get_jiffies_64(); - bool was_throttled = __get_cpu_var(thermal_throttle_active); - bool is_throttled = __get_cpu_var(thermal_throttle_active) = curr; + struct thermal_state *state; + unsigned int this_cpu; + bool was_throttled; + u64 now; + + this_cpu = smp_processor_id(); + now = get_jiffies_64(); + state = &per_cpu(thermal_state, this_cpu); + + was_throttled = state->is_throttled; + state->is_throttled = is_throttled; if (is_throttled) - __get_cpu_var(thermal_throttle_count)++; + state->throttle_count++; - if (!(was_throttled ^ is_throttled) && - time_before64(tmp_jiffs, __get_cpu_var(next_check))) + if (time_before64(now, state->next_check) && + state->throttle_count != state->last_throttle_count) return 0; - __get_cpu_var(next_check) = tmp_jiffs + CHECK_INTERVAL; + state->next_check = now + CHECK_INTERVAL; + state->last_throttle_count = state->throttle_count; /* if we just entered the thermal event */ if (is_throttled) { - printk(KERN_CRIT "CPU%d: Temperature above threshold, " - "cpu clock throttled (total events = %lu)\n", - cpu, __get_cpu_var(thermal_throttle_count)); + printk(KERN_CRIT "CPU%d: Temperature above threshold, cpu clock throttled (total events = %lu)\n", this_cpu, state->throttle_count); add_taint(TAINT_MACHINE_CHECK); return 1; } if (was_throttled) { - printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu); + printk(KERN_INFO "CPU%d: Temperature/speed normal\n", this_cpu); return 1; } @@ -213,7 +232,7 @@ __u64 msr_val; rdmsrl(MSR_IA32_THERM_STATUS, msr_val); - if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT)) + if (therm_throt_process((msr_val & THERM_STATUS_PROCHOT) != 0)) mce_log_therm_throt_event(msr_val); } @@ -237,6 +256,18 @@ ack_APIC_irq(); } +void __init mcheck_intel_therm_init(void) +{ + /* + * This function is only called on boot CPU. Save the init thermal + * LVT value on BSP and use that value to restore APs' thermal LVT + * entry BIOS programmed later + */ + if (cpu_has(&boot_cpu_data, X86_FEATURE_ACPI) && + cpu_has(&boot_cpu_data, X86_FEATURE_ACC)) + lvtthmr_init = apic_read(APIC_LVTTHMR); +} + void intel_init_thermal(struct cpuinfo_x86 *c) { unsigned int cpu = smp_processor_id(); @@ -253,7 +284,20 @@ * since it might be delivered via SMI already: */ rdmsr(MSR_IA32_MISC_ENABLE, l, h); - h = apic_read(APIC_LVTTHMR); + + /* + * The initial value of thermal LVT entries on all APs always reads + * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI + * sequence to them and LVT registers are reset to 0s except for + * the mask bits which are set to 1s when APs receive INIT IPI. + * Always restore the value that BIOS has programmed on AP based on + * BSP's info we saved since BIOS is always setting the same value + * for all threads/cores + */ + apic_write(APIC_LVTTHMR, lvtthmr_init); + + h = lvtthmr_init; + if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", cpu); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/mcheck/mce.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/mcheck/mce.c @@ -1327,13 +1327,14 @@ struct timer_list *t = &__get_cpu_var(mce_timer); int *n = &__get_cpu_var(next_interval); + setup_timer(t, mcheck_timer, smp_processor_id()); + if (mce_ignore_ce) return; *n = check_interval * HZ; if (!*n) return; - setup_timer(t, mcheck_timer, smp_processor_id()); t->expires = round_jiffies(jiffies + *n); add_timer_on(t, smp_processor_id()); } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c @@ -232,28 +232,23 @@ return 0; } -struct get_freq_data { - unsigned int speed; - unsigned int processor; -}; - -static void get_freq_data(void *_data) +static void get_freq_data(void *_speed) { - struct get_freq_data *data = _data; + unsigned int *speed = _speed; - data->speed = speedstep_get_frequency(data->processor); + *speed = speedstep_get_frequency(speedstep_processor); } static unsigned int speedstep_get(unsigned int cpu) { - struct get_freq_data data = { .processor = cpu }; + unsigned int speed; /* You're supposed to ensure CPU is online. */ - if (smp_call_function_single(cpu, get_freq_data, &data, 1) != 0) + if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0) BUG(); - dprintk("detected %u kHz as current frequency\n", data.speed); - return data.speed; + dprintk("detected %u kHz as current frequency\n", speed); + return speed; } /** --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c @@ -45,6 +45,7 @@ CPU_DOTHAN_A1, CPU_DOTHAN_A2, CPU_DOTHAN_B0, + CPU_DOTHAN_C0, CPU_MP4HT_D0, CPU_MP4HT_E0, }; @@ -54,6 +55,7 @@ [CPU_DOTHAN_A1] = { 6, 13, 1 }, [CPU_DOTHAN_A2] = { 6, 13, 2 }, [CPU_DOTHAN_B0] = { 6, 13, 6 }, + [CPU_DOTHAN_C0] = { 6, 13, 8 }, [CPU_MP4HT_D0] = {15, 3, 4 }, [CPU_MP4HT_E0] = {15, 4, 1 }, }; @@ -196,6 +198,88 @@ }; #undef OP + +#define OPEX(mhz, base, mva, mvb, mvc, mvd) \ +{ \ + .frequency = (mhz) * 1000, \ + .index = (((mhz)/(base)) << 8) | ((mva - 700) / 16) \ +} + +/* Intel Pentium M processor 730 / 1.60 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_1596[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1116, 1111, 1084, 1079), + OPEX(1330, 133, 1244, 1233, 1180, 1169), + OPEX(1596, 133, 1356, 1356, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; + +/* Intel Pentium M processor 740 / 1.73 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_1729[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1100, 1093, 1068, 1066), + OPEX(1330, 133, 1212, 1198, 1148, 1143), + OPEX(1729, 133, 1356, 1356, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; + +/* Intel Pentium M processor 750 / 1.86 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_1862[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1084, 1080, 1068, 1056), + OPEX(1330, 133, 1180, 1172, 1132, 1124), + OPEX(1596, 133, 1276, 1264, 1196, 1192), + OPEX(1862, 133, 1356, 1356, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; + +/* Intel Pentium M processor 760 / 2.00 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_1995[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1084, 1070, 1052, 1048), + OPEX(1330, 133, 1164, 1152, 1116, 1109), + OPEX(1596, 133, 1244, 1233, 1180, 1169), + OPEX(1995, 133, 1356, 1356, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; +/* Intel Pentium M processor 770 / 2.13 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_2128[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1068, 1065, 1052, 1042), + OPEX(1330, 133, 1148, 1142, 1100, 1097), + OPEX(1596, 133, 1228, 1218, 1164, 1151), + OPEX(1862, 133, 1308, 1295, 1212, 1206), + OPEX(2128, 133, 1372, 1372, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; + +/* Intel Pentium M processor 780 / 2.26 GHz (Sonoma) */ +static struct cpufreq_frequency_table sonoma_2261[] = +{ + OPEX( 798, 133, 988, 988, 988, 988), + OPEX(1064, 133, 1068, 1064, 1052, 1037), + OPEX(1330, 133, 1148, 1139, 1100, 1087), + OPEX(1596, 133, 1228, 1215, 1148, 1136), + OPEX(1862, 133, 1292, 1291, 1196, 1186), + OPEX(2261, 133, 1404, 1404, 1260, 1260), + { .frequency = CPUFREQ_TABLE_END } +}; + +#undef OPEX + +#define SONOMA(cpuid, max, base, name) \ +{ .cpu_id = cpuid, \ + .model_name = "Intel(R) Pentium(R) M processor " name "GHz", \ + .max_freq = (max)*1000, \ + .op_points = sonoma_##max, \ +} + + #define _BANIAS(cpuid, max, name) \ { .cpu_id = cpuid, \ .model_name = "Intel(R) Pentium(R) M processor " name "MHz", \ @@ -218,6 +302,15 @@ BANIAS(1600), BANIAS(1700), + /* Builtin tables for Dothan C0 CPUs, a.k.a Sonoma */ + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1596, 133, "1.60"), + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1729, 133, "1.73"), + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1862, 133, "1.86"), + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1995, 133, "2.00"), + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 2128, 133, "2.13"), + SONOMA(&cpu_ids[CPU_DOTHAN_C0], 2261, 133, "2.26"), + + /* NULL model_name is a wildcard */ { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL }, { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL }, --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/cpufreq/Makefile +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/cpufreq/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO) += speedstep-centrino.o obj-$(CONFIG_X86_P4_CLOCKMOD) += p4-clockmod.o obj-$(CONFIG_X86_CPUFREQ_NFORCE2) += cpufreq-nforce2.o + --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/cpu/cpufreq/powernow-k8.c @@ -605,9 +605,10 @@ return 0; } -static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry) +static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, + unsigned int entry) { - data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; + powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; } static void print_basics(struct powernow_k8_data *data) @@ -914,13 +915,13 @@ "bad value %d.\n", i, index); printk(KERN_ERR PFX "Please report to BIOS " "manufacturer\n"); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); if (!(hi & HW_PSTATE_VALID_MASK)) { dprintk("invalid pstate %d, ignoring\n", index); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } @@ -970,7 +971,7 @@ /* verify frequency is OK */ if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { dprintk("invalid freq %u kHz, ignoring\n", freq); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } @@ -978,7 +979,7 @@ * BIOSs are using "off" to indicate invalid */ if (vid == VID_OFF) { dprintk("invalid vid %u, ignoring\n", vid); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } @@ -997,7 +998,7 @@ dprintk("double low frequency table entry, " "ignoring it.\n"); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } else cntlofreq = i; @@ -1009,7 +1010,7 @@ (unsigned int) (data->acpi_data.states[i].core_frequency * 1000)); - invalidate_entry(data, i); + invalidate_entry(powernow_table, i); continue; } } --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/acpi/cstate.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/acpi/cstate.c @@ -48,7 +48,7 @@ * P4, Core and beyond CPUs */ if (c->x86_vendor == X86_VENDOR_INTEL && - (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 14))) + (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f))) flags->bm_control = 0; } EXPORT_SYMBOL(acpi_processor_power_init_bm_check); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kernel/acpi/processor.c +++ linux-fsl-imx51-2.6.31/arch/x86/kernel/acpi/processor.c @@ -79,7 +79,8 @@ struct cpuinfo_x86 *c = &cpu_data(pr->id); pr->pdc = NULL; - if (c->x86_vendor == X86_VENDOR_INTEL) + if (c->x86_vendor == X86_VENDOR_INTEL || + c->x86_vendor == X86_VENDOR_CENTAUR) init_intel_pdc(pr, c); return; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/mmu.h +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/mmu.h @@ -37,6 +37,12 @@ #define PT32_ROOT_LEVEL 2 #define PT32E_ROOT_LEVEL 3 +#define PFERR_PRESENT_MASK (1U << 0) +#define PFERR_WRITE_MASK (1U << 1) +#define PFERR_USER_MASK (1U << 2) +#define PFERR_RSVD_MASK (1U << 3) +#define PFERR_FETCH_MASK (1U << 4) + static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) { if (unlikely(vcpu->kvm->arch.n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/lapic.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/lapic.c @@ -464,7 +464,7 @@ if (apic_get_reg(apic, APIC_TMICT) == 0) return 0; - remaining = hrtimer_expires_remaining(&apic->lapic_timer.timer); + remaining = hrtimer_get_remaining(&apic->lapic_timer.timer); if (ktime_to_ns(remaining) < 0) remaining = ktime_set(0, 0); @@ -567,12 +567,21 @@ { ktime_t now = apic->lapic_timer.timer.base->get_time(); - apic->lapic_timer.period = apic_get_reg(apic, APIC_TMICT) * + apic->lapic_timer.period = (u64)apic_get_reg(apic, APIC_TMICT) * APIC_BUS_CYCLE_NS * apic->divide_count; atomic_set(&apic->lapic_timer.pending, 0); if (!apic->lapic_timer.period) return; + /* + * Do not allow the guest to program periodic timers with small + * interval, since the hrtimers are not throttled by the host + * scheduler. + */ + if (apic_lvtt_period(apic)) { + if (apic->lapic_timer.period < NSEC_PER_MSEC/2) + apic->lapic_timer.period = NSEC_PER_MSEC/2; + } hrtimer_start(&apic->lapic_timer.timer, ktime_add_ns(now, apic->lapic_timer.period), --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/mmu.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/mmu.c @@ -123,12 +123,6 @@ #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ | PT64_NX_MASK) -#define PFERR_PRESENT_MASK (1U << 0) -#define PFERR_WRITE_MASK (1U << 1) -#define PFERR_USER_MASK (1U << 2) -#define PFERR_RSVD_MASK (1U << 3) -#define PFERR_FETCH_MASK (1U << 4) - #define PT_DIRECTORY_LEVEL 2 #define PT_PAGE_TABLE_LEVEL 1 @@ -1524,7 +1518,7 @@ { struct page *page; - gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); + gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); if (gpa == UNMAPPED_GVA) return NULL; @@ -2032,8 +2026,11 @@ spin_unlock(&vcpu->kvm->mmu_lock); } -static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) +static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr, + u32 access, u32 *error) { + if (error) + *error = 0; return vaddr; } @@ -2622,7 +2619,7 @@ gpa_t gpa; int r; - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); + gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL); spin_lock(&vcpu->kvm->mmu_lock); r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); @@ -2633,7 +2630,8 @@ void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) { - while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { + while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES && + !list_empty(&vcpu->kvm->arch.active_mmu_pages)) { struct kvm_mmu_page *sp; sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, @@ -2712,12 +2710,6 @@ ASSERT(vcpu); - if (vcpu->kvm->arch.n_requested_mmu_pages) - vcpu->kvm->arch.n_free_mmu_pages = - vcpu->kvm->arch.n_requested_mmu_pages; - else - vcpu->kvm->arch.n_free_mmu_pages = - vcpu->kvm->arch.n_alloc_mmu_pages; /* * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. * Therefore we need to allocate shadow page tables in the first @@ -3064,7 +3056,7 @@ else audit_mappings_page(vcpu, ent, va, level - 1); } else { - gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); + gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL); gfn_t gfn = gpa >> PAGE_SHIFT; pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn); hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/x86_emulate.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/x86_emulate.c @@ -60,6 +60,7 @@ #define SrcImmByte (6<<4) /* 8-bit sign-extended immediate operand. */ #define SrcOne (7<<4) /* Implied '1' */ #define SrcImmUByte (8<<4) /* 8-bit unsigned immediate operand. */ +#define SrcImmU (9<<4) /* Immediate operand, unsigned */ #define SrcMask (0xf<<4) /* Generic ModRM decode. */ #define ModRM (1<<8) @@ -72,6 +73,7 @@ #define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ #define GroupMask 0xff /* Group number stored in bits 0:7 */ +#define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */ /* Source 2 operand type */ #define Src2None (0<<29) #define Src2CL (1<<29) @@ -151,7 +153,7 @@ ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov, ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov, DstMem | SrcReg | ModRM | Mov, ModRM | DstReg, - DstReg | SrcMem | ModRM | Mov, Group | Group1A, + 0, Group | Group1A, /* 0x90 - 0x97 */ DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, /* 0x98 - 0x9F */ @@ -195,12 +197,12 @@ ByteOp | SrcImmUByte, SrcImmUByte, /* 0xE8 - 0xEF */ SrcImm | Stack, SrcImm | ImplicitOps, - SrcImm | Src2Imm16, SrcImmByte | ImplicitOps, + 0, SrcImmByte | ImplicitOps, SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, /* 0xF0 - 0xF7 */ 0, 0, 0, 0, - ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3, + ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3, /* 0xF8 - 0xFF */ ImplicitOps, 0, ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps, Group | Group4, Group | Group5, @@ -208,15 +210,21 @@ static u32 twobyte_table[256] = { /* 0x00 - 0x0F */ - 0, Group | GroupDual | Group7, 0, 0, 0, 0, ImplicitOps, 0, - ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0, + 0, Group | GroupDual | Group7, 0, 0, + 0, 0, ImplicitOps | Priv, 0, + ImplicitOps | Priv, ImplicitOps | Priv, 0, 0, + 0, ImplicitOps | ModRM, 0, 0, /* 0x10 - 0x1F */ 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0, /* 0x20 - 0x2F */ - ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0, + ModRM | ImplicitOps | Priv, ModRM | Priv, + ModRM | ImplicitOps | Priv, ModRM | Priv, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x30 - 0x3F */ - ImplicitOps, 0, ImplicitOps, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + ImplicitOps | Priv, 0, ImplicitOps | Priv, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, /* 0x40 - 0x47 */ DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov, @@ -306,21 +314,29 @@ SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0, [Group7*8] = - 0, 0, ModRM | SrcMem, ModRM | SrcMem, + 0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv, SrcNone | ModRM | DstMem | Mov, 0, - SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp, + SrcMem16 | ModRM | Mov | Priv, SrcMem | ModRM | ByteOp | Priv, }; static u32 group2_table[] = { [Group7*8] = - SrcNone | ModRM, 0, 0, SrcNone | ModRM, + SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM, SrcNone | ModRM | DstMem | Mov, 0, SrcMem16 | ModRM | Mov, 0, }; /* EFLAGS bit definitions. */ +#define EFLG_ID (1<<21) +#define EFLG_VIP (1<<20) +#define EFLG_VIF (1<<19) +#define EFLG_AC (1<<18) +#define EFLG_IOPL (3<<12) +#define EFLG_NT (1<<14) #define EFLG_OF (1<<11) #define EFLG_DF (1<<10) +#define EFLG_IF (1<<9) +#define EFLG_TF (1<<8) #define EFLG_SF (1<<7) #define EFLG_ZF (1<<6) #define EFLG_AF (1<<4) @@ -589,7 +605,7 @@ if (linear < fc->start || linear >= fc->end) { size = min(15UL, PAGE_SIZE - offset_in_page(linear)); - rc = ops->read_std(linear, fc->data, size, ctxt->vcpu); + rc = ops->fetch(linear, fc->data, size, ctxt->vcpu, NULL); if (rc) return rc; fc->start = linear; @@ -605,6 +621,9 @@ { int rc = 0; + /* x86 instructions are limited to 15 bytes. */ + if (eip + size - ctxt->decode.eip_orig > 15) + return X86EMUL_UNHANDLEABLE; eip += ctxt->cs_base; while (size--) { rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++); @@ -641,11 +660,11 @@ op_bytes = 3; *address = 0; rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, - ctxt->vcpu); + ctxt->vcpu, NULL); if (rc) return rc; rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, - ctxt->vcpu); + ctxt->vcpu, NULL); return rc; } @@ -863,12 +882,13 @@ /* Shadow copy of register state. Committed on successful emulation. */ memset(c, 0, sizeof(struct decode_cache)); - c->eip = kvm_rip_read(ctxt->vcpu); + c->eip = c->eip_orig = kvm_rip_read(ctxt->vcpu); ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS); memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); switch (mode) { case X86EMUL_MODE_REAL: + case X86EMUL_MODE_VM86: case X86EMUL_MODE_PROT16: def_op_bytes = def_ad_bytes = 2; break; @@ -1027,6 +1047,7 @@ c->src.type = OP_MEM; break; case SrcImm: + case SrcImmU: c->src.type = OP_IMM; c->src.ptr = (unsigned long *)c->eip; c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes; @@ -1044,6 +1065,19 @@ c->src.val = insn_fetch(s32, 4, c->eip); break; } + if ((c->d & SrcMask) == SrcImmU) { + switch (c->src.bytes) { + case 1: + c->src.val &= 0xff; + break; + case 2: + c->src.val &= 0xffff; + break; + case 4: + c->src.val &= 0xffffffff; + break; + } + } break; case SrcImmByte: case SrcImmUByte: @@ -1164,6 +1198,49 @@ return rc; } +static int emulate_popf(struct x86_emulate_ctxt *ctxt, + struct x86_emulate_ops *ops, + void *dest, int len) +{ + int rc; + unsigned long val, change_mask; + int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; + int cpl = kvm_x86_ops->get_cpl(ctxt->vcpu); + + rc = emulate_pop(ctxt, ops, &val, len); + if (rc != X86EMUL_CONTINUE) + return rc; + + change_mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_OF + | EFLG_TF | EFLG_DF | EFLG_NT | EFLG_AC | EFLG_ID; + + switch(ctxt->mode) { + case X86EMUL_MODE_PROT64: + case X86EMUL_MODE_PROT32: + case X86EMUL_MODE_PROT16: + if (cpl == 0) + change_mask |= EFLG_IOPL; + if (cpl <= iopl) + change_mask |= EFLG_IF; + break; + case X86EMUL_MODE_VM86: + if (iopl < 3) { + kvm_inject_gp(ctxt->vcpu, 0); + return X86EMUL_PROPAGATE_FAULT; + } + change_mask |= EFLG_IF; + break; + default: /* real mode */ + change_mask |= (EFLG_IOPL | EFLG_IF); + break; + } + + *(unsigned long *)dest = + (ctxt->eflags & ~change_mask) | (val & change_mask); + + return rc; +} + static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) { @@ -1375,6 +1452,57 @@ ctxt->interruptibility = mask; } +static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt) +{ + int iopl; + if (ctxt->mode == X86EMUL_MODE_REAL) + return false; + if (ctxt->mode == X86EMUL_MODE_VM86) + return true; + iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT; + return kvm_x86_ops->get_cpl(ctxt->vcpu) > iopl; +} + +static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt, + struct x86_emulate_ops *ops, + u16 port, u16 len) +{ + struct kvm_segment tr_seg; + int r; + u16 io_bitmap_ptr; + u8 perm, bit_idx = port & 0x7; + unsigned mask = (1 << len) - 1; + + kvm_get_segment(ctxt->vcpu, &tr_seg, VCPU_SREG_TR); + if (tr_seg.unusable) + return false; + if (tr_seg.limit < 103) + return false; + r = ops->read_std(tr_seg.base + 102, &io_bitmap_ptr, 2, ctxt->vcpu, + NULL); + if (r != X86EMUL_CONTINUE) + return false; + if (io_bitmap_ptr + port/8 > tr_seg.limit) + return false; + r = ops->read_std(tr_seg.base + io_bitmap_ptr + port/8, &perm, 1, + ctxt->vcpu, NULL); + if (r != X86EMUL_CONTINUE) + return false; + if ((perm >> bit_idx) & mask) + return false; + return true; +} + +static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt, + struct x86_emulate_ops *ops, + u16 port, u16 len) +{ + if (emulator_bad_iopl(ctxt)) + if (!emulator_io_port_access_allowed(ctxt, ops, port, len)) + return false; + return true; +} + int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) { @@ -1396,6 +1524,12 @@ memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); saved_eip = c->eip; + /* Privileged instruction can be executed only in CPL=0 */ + if ((c->d & Priv) && kvm_x86_ops->get_cpl(ctxt->vcpu)) { + kvm_inject_gp(ctxt->vcpu, 0); + goto done; + } + if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs)) memop = c->modrm_ea; @@ -1528,7 +1662,12 @@ break; case 0x6c: /* insb */ case 0x6d: /* insw/insd */ - if (kvm_emulate_pio_string(ctxt->vcpu, NULL, + if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], + (c->d & ByteOp) ? 1 : c->op_bytes)) { + kvm_inject_gp(ctxt->vcpu, 0); + goto done; + } + if (kvm_emulate_pio_string(ctxt->vcpu, NULL, 1, (c->d & ByteOp) ? 1 : c->op_bytes, c->rep_prefix ? @@ -1544,6 +1683,11 @@ return 0; case 0x6e: /* outsb */ case 0x6f: /* outsw/outsd */ + if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX], + (c->d & ByteOp) ? 1 : c->op_bytes)) { + kvm_inject_gp(ctxt->vcpu, 0); + goto done; + } if (kvm_emulate_pio_string(ctxt->vcpu, NULL, 0, (c->d & ByteOp) ? 1 : c->op_bytes, @@ -1677,7 +1821,10 @@ c->dst.type = OP_REG; c->dst.ptr = (unsigned long *) &ctxt->eflags; c->dst.bytes = c->op_bytes; - goto pop_instruction; + rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes); + if (rc != X86EMUL_CONTINUE) + goto done; + break; case 0xa0 ... 0xa1: /* mov */ c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX]; c->dst.val = c->src.val; @@ -1837,7 +1984,13 @@ case 0xef: /* out (e/r)ax,dx */ port = c->regs[VCPU_REGS_RDX]; io_dir_in = 0; - do_io: if (kvm_emulate_pio(ctxt->vcpu, NULL, io_dir_in, + do_io: + if (!emulator_io_permited(ctxt, ops, port, + (c->d & ByteOp) ? 1 : c->op_bytes)) { + kvm_inject_gp(ctxt->vcpu, 0); + goto done; + } + if (kvm_emulate_pio(ctxt->vcpu, NULL, io_dir_in, (c->d & ByteOp) ? 1 : c->op_bytes, port) != 0) { c->eip = saved_eip; @@ -1862,13 +2015,21 @@ c->dst.type = OP_NONE; /* Disable writeback. */ break; case 0xfa: /* cli */ - ctxt->eflags &= ~X86_EFLAGS_IF; - c->dst.type = OP_NONE; /* Disable writeback. */ + if (emulator_bad_iopl(ctxt)) + kvm_inject_gp(ctxt->vcpu, 0); + else { + ctxt->eflags &= ~X86_EFLAGS_IF; + c->dst.type = OP_NONE; /* Disable writeback. */ + } break; case 0xfb: /* sti */ - toggle_interruptibility(ctxt, X86_SHADOW_INT_STI); - ctxt->eflags |= X86_EFLAGS_IF; - c->dst.type = OP_NONE; /* Disable writeback. */ + if (emulator_bad_iopl(ctxt)) + kvm_inject_gp(ctxt->vcpu, 0); + else { + toggle_interruptibility(ctxt, X86_SHADOW_INT_STI); + ctxt->eflags |= X86_EFLAGS_IF; + c->dst.type = OP_NONE; /* Disable writeback. */ + } break; case 0xfc: /* cld */ ctxt->eflags &= ~EFLG_DF; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/vmx.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/vmx.c @@ -577,7 +577,7 @@ */ vmx->host_state.ldt_sel = kvm_read_ldt(); vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel; - vmx->host_state.fs_sel = kvm_read_fs(); + savesegment(fs, vmx->host_state.fs_sel); if (!(vmx->host_state.fs_sel & 7)) { vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel); vmx->host_state.fs_reload_needed = 0; @@ -585,7 +585,7 @@ vmcs_write16(HOST_FS_SELECTOR, 0); vmx->host_state.fs_reload_needed = 1; } - vmx->host_state.gs_sel = kvm_read_gs(); + savesegment(gs, vmx->host_state.gs_sel); if (!(vmx->host_state.gs_sel & 7)) vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel); else { @@ -613,27 +613,21 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx) { - unsigned long flags; - if (!vmx->host_state.loaded) return; ++vmx->vcpu.stat.host_state_reload; vmx->host_state.loaded = 0; if (vmx->host_state.fs_reload_needed) - kvm_load_fs(vmx->host_state.fs_sel); + loadsegment(fs, vmx->host_state.fs_sel); if (vmx->host_state.gs_ldt_reload_needed) { kvm_load_ldt(vmx->host_state.ldt_sel); - /* - * If we have to reload gs, we must take care to - * preserve our gs base. - */ - local_irq_save(flags); - kvm_load_gs(vmx->host_state.gs_sel); #ifdef CONFIG_X86_64 - wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE)); + load_gs_index(vmx->host_state.gs_sel); + wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gs); +#else + loadsegment(gs, vmx->host_state.gs_sel); #endif - local_irq_restore(flags); } reload_tss(); save_msrs(vmx->guest_msrs, vmx->save_nmsrs); @@ -661,7 +655,7 @@ if (vcpu->cpu != cpu) { vcpu_clear(vmx); kvm_migrate_timers(vcpu); - vpid_sync_vcpu_all(vmx); + set_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests); local_irq_disable(); list_add(&vmx->local_vcpus_link, &per_cpu(vcpus_on_cpu, cpu)); @@ -1217,12 +1211,9 @@ if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) { /* CR3 accesses and invlpg don't need to cause VM Exits when EPT enabled */ - min &= ~(CPU_BASED_CR3_LOAD_EXITING | - CPU_BASED_CR3_STORE_EXITING | - CPU_BASED_INVLPG_EXITING); - if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS, - &_cpu_based_exec_control) < 0) - return -EIO; + _cpu_based_exec_control &= ~(CPU_BASED_CR3_LOAD_EXITING | + CPU_BASED_CR3_STORE_EXITING | + CPU_BASED_INVLPG_EXITING); rdmsr(MSR_IA32_VMX_EPT_VPID_CAP, vmx_capability.ept, vmx_capability.vpid); } @@ -1572,7 +1563,6 @@ vcpu->arch.cr0 = cr0; vmx_set_cr4(vcpu, vcpu->arch.cr4); *hw_cr0 |= X86_CR0_PE | X86_CR0_PG; - *hw_cr0 &= ~X86_CR0_WP; } else if (!is_paging(vcpu)) { /* From nonpaging to paging */ vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, @@ -1581,9 +1571,10 @@ CPU_BASED_CR3_STORE_EXITING)); vcpu->arch.cr0 = cr0; vmx_set_cr4(vcpu, vcpu->arch.cr4); - if (!(vcpu->arch.cr0 & X86_CR0_WP)) - *hw_cr0 &= ~X86_CR0_WP; } + + if (!(cr0 & X86_CR0_WP)) + *hw_cr0 &= ~X86_CR0_WP; } static void ept_update_paging_mode_cr4(unsigned long *hw_cr4, @@ -2223,8 +2214,8 @@ vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */ vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */ vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */ - vmcs_write16(HOST_FS_SELECTOR, kvm_read_fs()); /* 22.2.4 */ - vmcs_write16(HOST_GS_SELECTOR, kvm_read_gs()); /* 22.2.4 */ + vmcs_write16(HOST_FS_SELECTOR, 0); /* 22.2.4 */ + vmcs_write16(HOST_GS_SELECTOR, 0); /* 22.2.4 */ vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */ #ifdef CONFIG_X86_64 rdmsrl(MSR_FS_BASE, a); @@ -2413,7 +2404,7 @@ if (vmx->vpid != 0) vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); - vmx->vcpu.arch.cr0 = 0x60000010; + vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; vmx_set_cr0(&vmx->vcpu, vmx->vcpu.arch.cr0); /* enter rmode */ vmx_set_cr4(&vmx->vcpu, 0); vmx_set_efer(&vmx->vcpu, 0); @@ -2841,6 +2832,8 @@ unsigned long val; int dr, reg; + if (!kvm_require_cpl(vcpu, 0)) + return 1; dr = vmcs_readl(GUEST_DR7); if (dr & DR7_GD) { /* --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/i8254.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/i8254.c @@ -116,7 +116,7 @@ * itself with the initial count and continues counting * from there. */ - remaining = hrtimer_expires_remaining(&ps->pit_timer.timer); + remaining = hrtimer_get_remaining(&ps->pit_timer.timer); elapsed = ps->pit_timer.period - ktime_to_ns(remaining); elapsed = mod_64(elapsed, ps->pit_timer.period); @@ -433,6 +433,9 @@ struct kvm_kpit_channel_state *s; addr &= KVM_PIT_CHANNEL_MASK; + if (addr == 3) + return; + s = &pit_state->channels[addr]; mutex_lock(&pit_state->lock); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/svm.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/svm.c @@ -569,11 +569,12 @@ save->rip = 0x0000fff0; svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip; - /* - * cr0 val on cpu init should be 0x60000010, we enable cpu - * cache by default. the orderly way is to enable cache in bios. + /* This is the guest-visible cr0 value. + * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0. */ - save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP; + svm->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; + kvm_set_cr0(&svm->vcpu, svm->vcpu.arch.cr0); + save->cr4 = X86_CR4_PAE; /* rdx = ?? */ @@ -709,6 +710,8 @@ rdtscll(tsc_this); delta = vcpu->arch.host_tsc - tsc_this; svm->vmcb->control.tsc_offset += delta; + if (is_nested(svm)) + svm->hsave->control.tsc_offset += delta; vcpu->cpu = cpu; kvm_migrate_timers(vcpu); svm->asid_generation = 0; @@ -1954,10 +1957,14 @@ switch (ecx) { case MSR_IA32_TIME_STAMP_COUNTER: { - u64 tsc; + u64 tsc_offset; + + if (is_nested(svm)) + tsc_offset = svm->hsave->control.tsc_offset; + else + tsc_offset = svm->vmcb->control.tsc_offset; - rdtscll(tsc); - *data = svm->vmcb->control.tsc_offset + tsc; + *data = tsc_offset + native_read_tsc(); break; } case MSR_K6_STAR: @@ -2044,10 +2051,17 @@ switch (ecx) { case MSR_IA32_TIME_STAMP_COUNTER: { - u64 tsc; + u64 tsc_offset = data - native_read_tsc(); + u64 g_tsc_offset = 0; + + if (is_nested(svm)) { + g_tsc_offset = svm->vmcb->control.tsc_offset - + svm->hsave->control.tsc_offset; + svm->hsave->control.tsc_offset = tsc_offset; + } + + svm->vmcb->control.tsc_offset = tsc_offset + g_tsc_offset; - rdtscll(tsc); - svm->vmcb->control.tsc_offset = data - tsc; break; } case MSR_K6_STAR: @@ -2495,8 +2509,8 @@ sync_lapic_to_cr8(vcpu); save_host_msrs(vcpu); - fs_selector = kvm_read_fs(); - gs_selector = kvm_read_gs(); + savesegment(fs, fs_selector); + savesegment(gs, gs_selector); ldt_selector = kvm_read_ldt(); svm->host_cr2 = kvm_read_cr2(); if (!is_nested(svm)) @@ -2587,10 +2601,15 @@ kvm_write_cr2(svm->host_cr2); - kvm_load_fs(fs_selector); - kvm_load_gs(gs_selector); - kvm_load_ldt(ldt_selector); load_host_msrs(vcpu); + loadsegment(fs, fs_selector); +#ifdef CONFIG_X86_64 + load_gs_index(gs_selector); + wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gs); +#else + loadsegment(gs, gs_selector); +#endif + kvm_load_ldt(ldt_selector); reload_tss(vcpu); --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/x86.c +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/x86.c @@ -215,6 +215,19 @@ } /* + * Checks if cpl <= required_cpl; if true, return true. Otherwise queue + * a #GP and return false. + */ +bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl) +{ + if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl) + return true; + kvm_queue_exception_e(vcpu, GP_VECTOR, 0); + return false; +} +EXPORT_SYMBOL_GPL(kvm_require_cpl); + +/* * Load the pae pdptrs. Return true is they are all valid. */ int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3) @@ -936,6 +949,7 @@ case MSR_P6_EVNTSEL0: case MSR_P6_EVNTSEL1: case MSR_K7_EVNTSEL0: + case MSR_K8_INT_PENDING_MSG: data = 0; break; case MSR_MTRRcap: @@ -1082,8 +1096,8 @@ case KVM_CAP_NR_MEMSLOTS: r = KVM_MEMORY_SLOTS; break; - case KVM_CAP_PV_MMU: - r = !tdp_enabled; + case KVM_CAP_PV_MMU: /* obsolete */ + r = 0; break; case KVM_CAP_IOMMU: r = iommu_found(); @@ -1416,6 +1430,8 @@ if (cpuid->nent < 1) goto out; + if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) + cpuid->nent = KVM_MAX_CPUID_ENTRIES; r = -ENOMEM; cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent); if (!cpuid_entries) @@ -1435,6 +1451,10 @@ for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) do_cpuid_ent(&cpuid_entries[nent], func, 0, &nent, cpuid->nent); + r = -E2BIG; + if (nent >= cpuid->nent) + goto out_free; + r = -EFAULT; if (copy_to_user(entries, cpuid_entries, nent * sizeof(struct kvm_cpuid_entry2))) @@ -2106,14 +2126,41 @@ return dev; } -static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes, - struct kvm_vcpu *vcpu) +gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) +{ + u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; + return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error); +} + + gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) +{ + u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; + access |= PFERR_FETCH_MASK; + return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error); +} + +gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) +{ + u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; + access |= PFERR_WRITE_MASK; + return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error); +} + +/* uses this to access any guest's mapped memory without checking CPL */ +gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) +{ + return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error); +} + +static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes, + struct kvm_vcpu *vcpu, u32 access, + u32 *error) { void *data = val; int r = X86EMUL_CONTINUE; while (bytes) { - gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); + gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error); unsigned offset = addr & (PAGE_SIZE-1); unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset); int ret; @@ -2136,14 +2183,37 @@ return r; } +/* used for instruction fetching */ +static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes, + struct kvm_vcpu *vcpu, u32 *error) +{ + u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; + return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, + access | PFERR_FETCH_MASK, error); +} + +static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes, + struct kvm_vcpu *vcpu, u32 *error) +{ + u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; + return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, + error); +} + +static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes, + struct kvm_vcpu *vcpu, u32 *error) +{ + return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error); +} + static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes, - struct kvm_vcpu *vcpu) + struct kvm_vcpu *vcpu, u32 *error) { void *data = val; int r = X86EMUL_CONTINUE; while (bytes) { - gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); + gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error); unsigned offset = addr & (PAGE_SIZE-1); unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset); int ret; @@ -2174,6 +2244,7 @@ { struct kvm_io_device *mmio_dev; gpa_t gpa; + u32 error_code; if (vcpu->mmio_read_completed) { memcpy(val, vcpu->mmio_data, bytes); @@ -2181,17 +2252,20 @@ return X86EMUL_CONTINUE; } - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); + gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code); + + if (gpa == UNMAPPED_GVA) { + kvm_inject_page_fault(vcpu, addr, error_code); + return X86EMUL_PROPAGATE_FAULT; + } /* For APIC access vmexit */ if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) goto mmio; - if (kvm_read_guest_virt(addr, val, bytes, vcpu) + if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL) == X86EMUL_CONTINUE) return X86EMUL_CONTINUE; - if (gpa == UNMAPPED_GVA) - return X86EMUL_PROPAGATE_FAULT; mmio: /* @@ -2233,11 +2307,12 @@ { struct kvm_io_device *mmio_dev; gpa_t gpa; + u32 error_code; - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); + gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code); if (gpa == UNMAPPED_GVA) { - kvm_inject_page_fault(vcpu, addr, 2); + kvm_inject_page_fault(vcpu, addr, error_code); return X86EMUL_PROPAGATE_FAULT; } @@ -2311,7 +2386,7 @@ char *kaddr; u64 val; - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); + gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL); if (gpa == UNMAPPED_GVA || (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) @@ -2391,7 +2466,7 @@ rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS); - kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu); + kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL); printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n", context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]); @@ -2399,7 +2474,8 @@ EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); static struct x86_emulate_ops emulate_ops = { - .read_std = kvm_read_guest_virt, + .read_std = kvm_read_guest_virt_system, + .fetch = kvm_fetch_guest_virt, .read_emulated = emulator_read_emulated, .write_emulated = emulator_write_emulated, .cmpxchg_emulated = emulator_cmpxchg_emulated, @@ -2442,8 +2518,9 @@ vcpu->arch.emulate_ctxt.vcpu = vcpu; vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); vcpu->arch.emulate_ctxt.mode = + (!(vcpu->arch.cr0 & X86_CR0_PE)) ? X86EMUL_MODE_REAL : (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) - ? X86EMUL_MODE_REAL : cs_l + ? X86EMUL_MODE_VM86 : cs_l ? X86EMUL_MODE_PROT64 : cs_db ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; @@ -2516,12 +2593,17 @@ gva_t q = vcpu->arch.pio.guest_gva; unsigned bytes; int ret; + u32 error_code; bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count; if (vcpu->arch.pio.in) - ret = kvm_write_guest_virt(q, p, bytes, vcpu); + ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code); else - ret = kvm_read_guest_virt(q, p, bytes, vcpu); + ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code); + + if (ret == X86EMUL_PROPAGATE_FAULT) + kvm_inject_page_fault(vcpu, q, error_code); + return ret; } @@ -2542,7 +2624,7 @@ if (io->in) { r = pio_copy_data(vcpu); if (r) - return r; + goto out; } delta = 1; @@ -2569,7 +2651,7 @@ kvm_register_write(vcpu, VCPU_REGS_RSI, val); } } - +out: io->count -= io->cur_count; io->cur_count = 0; @@ -2623,6 +2705,11 @@ { struct kvm_io_device *pio_dev; unsigned long val; + + if(!in) + KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, handler); + else + KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, handler); vcpu->run->exit_reason = KVM_EXIT_IO; vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; @@ -2635,13 +2722,6 @@ vcpu->arch.pio.down = 0; vcpu->arch.pio.rep = 0; - if (vcpu->run->io.direction == KVM_EXIT_IO_IN) - KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, - handler); - else - KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, - handler); - val = kvm_register_read(vcpu, VCPU_REGS_RAX); memcpy(vcpu->arch.pio_data, &val, 4); @@ -2663,6 +2743,11 @@ int ret = 0; struct kvm_io_device *pio_dev; + if(!in) + KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, handler); + else + KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, handler); + vcpu->run->exit_reason = KVM_EXIT_IO; vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; vcpu->run->io.size = vcpu->arch.pio.size = size; @@ -2674,13 +2759,6 @@ vcpu->arch.pio.down = down; vcpu->arch.pio.rep = rep; - if (vcpu->run->io.direction == KVM_EXIT_IO_IN) - KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, - handler); - else - KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, - handler); - if (!count) { kvm_x86_ops->skip_emulated_instruction(vcpu); return 1; @@ -2715,10 +2793,8 @@ if (!vcpu->arch.pio.in) { /* string PIO write */ ret = pio_copy_data(vcpu); - if (ret == X86EMUL_PROPAGATE_FAULT) { - kvm_inject_gp(vcpu, 0); + if (ret == X86EMUL_PROPAGATE_FAULT) return 1; - } if (ret == 0 && pio_dev) { pio_string_write(pio_dev, vcpu); complete_pio(vcpu); @@ -2898,6 +2974,11 @@ a3 &= 0xFFFFFFFF; } + if (kvm_x86_ops->get_cpl(vcpu) != 0) { + ret = -KVM_EPERM; + goto out; + } + switch (nr) { case KVM_HC_VAPIC_POLL_IRQ: ret = 0; @@ -2909,6 +2990,7 @@ ret = -KVM_ENOSYS; break; } +out: kvm_register_write(vcpu, VCPU_REGS_RAX, ret); ++vcpu->stat.hypercalls; return r; @@ -3179,6 +3261,9 @@ if (!kvm_x86_ops->update_cr8_intercept) return; + if (!vcpu->arch.apic) + return; + if (!vcpu->arch.apic->vapic_addr) max_irr = kvm_lapic_find_highest_irr(vcpu); else @@ -3701,7 +3786,6 @@ static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, struct desc_struct *seg_desc) { - gpa_t gpa; struct descriptor_table dtable; u16 index = selector >> 3; @@ -3711,16 +3795,15 @@ kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc); return 1; } - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base); - gpa += index * 8; - return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8); + return kvm_read_guest_virt_system(dtable.base + index*8, + seg_desc, sizeof(*seg_desc), + vcpu, NULL); } /* allowed just for 8 bytes segments */ static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, struct desc_struct *seg_desc) { - gpa_t gpa; struct descriptor_table dtable; u16 index = selector >> 3; @@ -3728,12 +3811,22 @@ if (dtable.limit < index * 8 + 7) return 1; - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base); - gpa += index * 8; - return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8); + return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL); +} + +static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu, + struct desc_struct *seg_desc) +{ + u32 base_addr; + + base_addr = seg_desc->base0; + base_addr |= (seg_desc->base1 << 16); + base_addr |= (seg_desc->base2 << 24); + + return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL); } -static u32 get_tss_base_addr(struct kvm_vcpu *vcpu, +static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu, struct desc_struct *seg_desc) { u32 base_addr; @@ -3742,7 +3835,7 @@ base_addr |= (seg_desc->base1 << 16); base_addr |= (seg_desc->base2 << 24); - return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr); + return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL); } static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg) @@ -3938,7 +4031,7 @@ sizeof tss_segment_16)) goto out; - if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc), + if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc), &tss_segment_16, sizeof tss_segment_16)) goto out; @@ -3946,7 +4039,7 @@ tss_segment_16.prev_task_link = old_tss_sel; if (kvm_write_guest(vcpu->kvm, - get_tss_base_addr(vcpu, nseg_desc), + get_tss_base_addr_write(vcpu, nseg_desc), &tss_segment_16.prev_task_link, sizeof tss_segment_16.prev_task_link)) goto out; @@ -3977,7 +4070,7 @@ sizeof tss_segment_32)) goto out; - if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc), + if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc), &tss_segment_32, sizeof tss_segment_32)) goto out; @@ -3985,7 +4078,7 @@ tss_segment_32.prev_task_link = old_tss_sel; if (kvm_write_guest(vcpu->kvm, - get_tss_base_addr(vcpu, nseg_desc), + get_tss_base_addr_write(vcpu, nseg_desc), &tss_segment_32.prev_task_link, sizeof tss_segment_32.prev_task_link)) goto out; @@ -4008,7 +4101,7 @@ u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR); u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR); - old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base); + old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL); /* FIXME: Handle errors. Failure to read either TSS or their * descriptors should generate a pagefault. @@ -4099,13 +4192,7 @@ vcpu->arch.cr2 = sregs->cr2; mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3; - - down_read(&vcpu->kvm->slots_lock); - if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT)) - vcpu->arch.cr3 = sregs->cr3; - else - set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests); - up_read(&vcpu->kvm->slots_lock); + vcpu->arch.cr3 = sregs->cr3; kvm_set_cr8(vcpu, sregs->cr8); @@ -4221,7 +4308,7 @@ vcpu_load(vcpu); down_read(&vcpu->kvm->slots_lock); - gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr); + gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL); up_read(&vcpu->kvm->slots_lock); tr->physical_address = gpa; tr->valid = gpa != UNMAPPED_GVA; --- linux-fsl-imx51-2.6.31.orig/arch/x86/kvm/paging_tmpl.h +++ linux-fsl-imx51-2.6.31/arch/x86/kvm/paging_tmpl.h @@ -497,18 +497,23 @@ } } -static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) +static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access, + u32 *error) { struct guest_walker walker; gpa_t gpa = UNMAPPED_GVA; int r; - r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0); + r = FNAME(walk_addr)(&walker, vcpu, vaddr, + !!(access & PFERR_WRITE_MASK), + !!(access & PFERR_USER_MASK), + !!(access & PFERR_FETCH_MASK)); if (r) { gpa = gfn_to_gpa(walker.gfn); gpa |= vaddr & ~PAGE_MASK; - } + } else if (error) + *error = walker.error_code; return gpa; } --- linux-fsl-imx51-2.6.31.orig/arch/x86/xen/spinlock.c +++ linux-fsl-imx51-2.6.31/arch/x86/xen/spinlock.c @@ -187,7 +187,6 @@ struct xen_spinlock *prev; int irq = __get_cpu_var(lock_kicker_irq); int ret; - unsigned long flags; u64 start; /* If kicker interrupts not initialized yet, just spin */ @@ -199,16 +198,12 @@ /* announce we're spinning */ prev = spinning_lock(xl); - flags = __raw_local_save_flags(); - if (irq_enable) { - ADD_STATS(taken_slow_irqenable, 1); - raw_local_irq_enable(); - } - ADD_STATS(taken_slow, 1); ADD_STATS(taken_slow_nested, prev != NULL); do { + unsigned long flags; + /* clear pending */ xen_clear_irq_pending(irq); @@ -228,6 +223,12 @@ goto out; } + flags = __raw_local_save_flags(); + if (irq_enable) { + ADD_STATS(taken_slow_irqenable, 1); + raw_local_irq_enable(); + } + /* * Block until irq becomes pending. If we're * interrupted at this point (after the trylock but @@ -238,13 +239,15 @@ * pending. */ xen_poll_irq(irq); + + raw_local_irq_restore(flags); + ADD_STATS(taken_slow_spurious, !xen_test_irq_pending(irq)); } while (!xen_test_irq_pending(irq)); /* check for spurious wakeups */ kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); out: - raw_local_irq_restore(flags); unspinning_lock(xl, prev); spin_time_accum_blocked(start); @@ -323,8 +326,13 @@ smp_wmb(); /* make sure no writes get moved after unlock */ xl->lock = 0; /* release lock */ - /* make sure unlock happens before kick */ - barrier(); + /* + * Make sure unlock happens before checking for waiting + * spinners. We need a strong barrier to enforce the + * write-read ordering to different memory locations, as the + * CPU makes no implied guarantees about their ordering. + */ + mb(); if (unlikely(xl->spinners)) xen_spin_unlock_slow(xl); --- linux-fsl-imx51-2.6.31.orig/arch/x86/xen/enlighten.c +++ linux-fsl-imx51-2.6.31/arch/x86/xen/enlighten.c @@ -51,6 +51,7 @@ #include #include #include +#include #include "xen-ops.h" #include "mmu.h" @@ -177,6 +178,7 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx, unsigned int *cx, unsigned int *dx) { + unsigned maskebx = ~0; unsigned maskecx = ~0; unsigned maskedx = ~0; @@ -184,9 +186,16 @@ * Mask out inconvenient features, to try and disable as many * unsupported kernel subsystems as possible. */ - if (*ax == 1) { + switch (*ax) { + case 1: maskecx = cpuid_leaf1_ecx_mask; maskedx = cpuid_leaf1_edx_mask; + break; + + case 0xb: + /* Suppress extended topology stuff */ + maskebx = 0; + break; } asm(XEN_EMULATE_PREFIX "cpuid" @@ -196,6 +205,7 @@ "=d" (*dx) : "0" (*ax), "2" (*cx)); + *bx &= maskebx; *cx &= maskecx; *dx &= maskedx; } @@ -322,6 +332,24 @@ xen_mc_issue(PARAVIRT_LAZY_CPU); } +#ifdef CONFIG_X86_32 +static void xen_load_user_cs_desc(int cpu, struct mm_struct *mm) +{ + void *gdt; + xmaddr_t mgdt; + u64 descriptor; + struct desc_struct user_cs; + + gdt = &get_cpu_gdt_table(cpu)[GDT_ENTRY_DEFAULT_USER_CS]; + mgdt = virt_to_machine(gdt); + + user_cs = mm->context.user_cs; + descriptor = (u64) user_cs.a | ((u64) user_cs.b) << 32; + + HYPERVISOR_update_descriptor(mgdt.maddr, descriptor); +} +#endif /*CONFIG_X86_32*/ + static void xen_load_gdt(const struct desc_ptr *dtr) { unsigned long va = dtr->address; @@ -330,18 +358,28 @@ unsigned long frames[pages]; int f; - /* A GDT can be up to 64k in size, which corresponds to 8192 - 8-byte entries, or 16 4k pages.. */ + /* + * A GDT can be up to 64k in size, which corresponds to 8192 + * 8-byte entries, or 16 4k pages.. + */ BUG_ON(size > 65536); BUG_ON(va & ~PAGE_MASK); for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { int level; - pte_t *ptep = lookup_address(va, &level); + pte_t *ptep; unsigned long pfn, mfn; void *virt; + /* + * The GDT is per-cpu and is in the percpu data area. + * That can be virtually mapped, so we need to do a + * page-walk to get the underlying MFN for the + * hypercall. The page can also be in the kernel's + * linear range, so we need to RO that mapping too. + */ + ptep = lookup_address(va, &level); BUG_ON(ptep == NULL); pfn = pte_pfn(*ptep); @@ -358,6 +396,44 @@ BUG(); } +/* + * load_gdt for early boot, when the gdt is only mapped once + */ +static __init void xen_load_gdt_boot(const struct desc_ptr *dtr) +{ + unsigned long va = dtr->address; + unsigned int size = dtr->size + 1; + unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; + unsigned long frames[pages]; + int f; + + /* + * A GDT can be up to 64k in size, which corresponds to 8192 + * 8-byte entries, or 16 4k pages.. + */ + + BUG_ON(size > 65536); + BUG_ON(va & ~PAGE_MASK); + + for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { + pte_t pte; + unsigned long pfn, mfn; + + pfn = virt_to_pfn(va); + mfn = pfn_to_mfn(pfn); + + pte = pfn_pte(pfn, PAGE_KERNEL_RO); + + if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) + BUG(); + + frames[f] = mfn; + } + + if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) + BUG(); +} + static void load_TLS_descriptor(struct thread_struct *t, unsigned int cpu, unsigned int i) { @@ -581,6 +657,29 @@ preempt_enable(); } +/* + * Version of write_gdt_entry for use at early boot-time needed to + * update an entry as simply as possible. + */ +static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, + const void *desc, int type) +{ + switch (type) { + case DESC_LDT: + case DESC_TSS: + /* ignore */ + break; + + default: { + xmaddr_t maddr = virt_to_machine(&dt[entry]); + + if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) + dt[entry] = *(struct desc_struct *)desc; + } + + } +} + static void xen_load_sp0(struct tss_struct *tss, struct thread_struct *thread) { @@ -887,6 +986,9 @@ .load_tr_desc = paravirt_nop, .set_ldt = xen_set_ldt, +#ifdef CONFIG_X86_32 + .load_user_cs_desc = xen_load_user_cs_desc, +#endif /*CONFIG_X86_32*/ .load_gdt = xen_load_gdt, .load_idt = xen_load_idt, .load_tls = xen_load_tls, @@ -965,6 +1067,23 @@ .emergency_restart = xen_emergency_restart, }; +/* + * Set up the GDT and segment registers for -fstack-protector. Until + * we do this, we have to be careful not to call any stack-protected + * function, which is most of the kernel. + */ +static void __init xen_setup_stackprotector(void) +{ + pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; + pv_cpu_ops.load_gdt = xen_load_gdt_boot; + + setup_stack_canary_segment(0); + switch_to_new_gdt(0); + + pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; + pv_cpu_ops.load_gdt = xen_load_gdt; +} + /* First C function to be called on Xen boot */ asmlinkage void __init xen_start_kernel(void) { @@ -983,14 +1102,34 @@ pv_apic_ops = xen_apic_ops; pv_mmu_ops = xen_mmu_ops; -#ifdef CONFIG_X86_64 /* - * Setup percpu state. We only need to do this for 64-bit - * because 32-bit already has %fs set properly. + * Set up some pagetable state before starting to set any ptes. */ - load_percpu_segment(0); + + /* Prevent unwanted bits from being set in PTEs. */ + __supported_pte_mask &= ~_PAGE_GLOBAL; + if (!xen_initial_domain()) + __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); + + __supported_pte_mask |= _PAGE_IOMAP; + +#ifdef CONFIG_X86_64 + /* Work out if we support NX */ + check_efer(); #endif + xen_setup_features(); + + /* Get mfn list */ + if (!xen_feature(XENFEAT_auto_translated_physmap)) + xen_build_dynamic_phys_to_machine(); + + /* + * Set up kernel GDT and segment registers, mainly so that + * -fstack-protector code can be executed. + */ + xen_setup_stackprotector(); + xen_init_irq_ops(); xen_init_cpuid_mask(); @@ -1001,8 +1140,6 @@ set_xen_basic_apic_ops(); #endif - xen_setup_features(); - if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; @@ -1019,22 +1156,8 @@ xen_smp_init(); - /* Get mfn list */ - if (!xen_feature(XENFEAT_auto_translated_physmap)) - xen_build_dynamic_phys_to_machine(); - pgd = (pgd_t *)xen_start_info->pt_base; - /* Prevent unwanted bits from being set in PTEs. */ - __supported_pte_mask &= ~_PAGE_GLOBAL; - if (!xen_initial_domain()) - __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); - -#ifdef CONFIG_X86_64 - /* Work out if we support NX */ - check_efer(); -#endif - /* Don't do the full vcpu_info placement stuff until we have a possible map and a non-dummy shared_info. */ per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; --- linux-fsl-imx51-2.6.31.orig/arch/x86/xen/Makefile +++ linux-fsl-imx51-2.6.31/arch/x86/xen/Makefile @@ -8,6 +8,7 @@ # Make sure early boot has no stackprotector nostackp := $(call cc-option, -fno-stack-protector) CFLAGS_enlighten.o := $(nostackp) +CFLAGS_mmu.o := $(nostackp) obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ time.o xen-asm.o xen-asm_$(BITS).o \ @@ -16,3 +17,4 @@ obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o + --- linux-fsl-imx51-2.6.31.orig/arch/x86/xen/smp.c +++ linux-fsl-imx51-2.6.31/arch/x86/xen/smp.c @@ -236,6 +236,7 @@ ctxt->user_regs.ss = __KERNEL_DS; #ifdef CONFIG_X86_32 ctxt->user_regs.fs = __KERNEL_PERCPU; + ctxt->user_regs.gs = __KERNEL_STACK_CANARY; #else ctxt->gs_base_kernel = per_cpu_offset(cpu); #endif --- linux-fsl-imx51-2.6.31.orig/arch/x86/pci/i386.c +++ linux-fsl-imx51-2.6.31/arch/x86/pci/i386.c @@ -129,7 +129,7 @@ continue; if (!r->start || pci_claim_resource(dev, idx) < 0) { - dev_info(&dev->dev, "BAR %d: can't allocate resource\n", idx); + dev_warn(&dev->dev, "BAR %d: can't allocate resource\n", idx); /* * Something is wrong with the region. * Invalidate the resource to prevent @@ -169,7 +169,7 @@ (unsigned long long) r->end, r->flags, disabled, pass); if (pci_claim_resource(dev, idx) < 0) { - dev_info(&dev->dev, "BAR %d: can't allocate resource\n", idx); + dev_warn(&dev->dev, "BAR %d: can't allocate resource\n", idx); /* We'll assign a new address later */ r->end -= r->start; r->start = 0; --- linux-fsl-imx51-2.6.31.orig/arch/x86/ia32/ia32entry.S +++ linux-fsl-imx51-2.6.31/arch/x86/ia32/ia32entry.S @@ -21,8 +21,8 @@ #define __AUDIT_ARCH_LE 0x40000000 #ifndef CONFIG_AUDITSYSCALL -#define sysexit_audit int_ret_from_sys_call -#define sysretl_audit int_ret_from_sys_call +#define sysexit_audit ia32_ret_from_sys_call +#define sysretl_audit ia32_ret_from_sys_call #endif #define IA32_NR_syscalls ((ia32_syscall_end - ia32_sys_call_table)/8) @@ -39,18 +39,23 @@ .endm /* clobbers %eax */ - .macro CLEAR_RREGS _r9=rax + .macro CLEAR_RREGS offset=0, _r9=rax xorl %eax,%eax - movq %rax,R11(%rsp) - movq %rax,R10(%rsp) - movq %\_r9,R9(%rsp) - movq %rax,R8(%rsp) + movq %rax,\offset+R11(%rsp) + movq %rax,\offset+R10(%rsp) + movq %\_r9,\offset+R9(%rsp) + movq %rax,\offset+R8(%rsp) .endm /* * Reload arg registers from stack in case ptrace changed them. * We don't reload %eax because syscall_trace_enter() returned - * the value it wants us to use in the table lookup. + * the %rax value we should see. Instead, we just truncate that + * value to 32 bits again as we did on entry from user mode. + * If it's a new value set by user_regset during entry tracing, + * this matches the normal truncation of the user-mode value. + * If it's -1 to make us punt the syscall, then (u32)-1 is still + * an appropriately invalid value. */ .macro LOAD_ARGS32 offset, _r9=0 .if \_r9 @@ -60,6 +65,7 @@ movl \offset+48(%rsp),%edx movl \offset+56(%rsp),%esi movl \offset+64(%rsp),%edi + movl %eax,%eax /* zero extension */ .endm .macro CFI_STARTPROC32 simple @@ -153,7 +159,7 @@ testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) CFI_REMEMBER_STATE jnz sysenter_tracesys - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja ia32_badsys sysenter_do_call: IA32_ARG_FIXUP @@ -172,6 +178,10 @@ movl RIP-R11(%rsp),%edx /* User %eip */ CFI_REGISTER rip,rdx RESTORE_ARGS 1,24,1,1,1,1 + xorq %r8,%r8 + xorq %r9,%r9 + xorq %r10,%r10 + xorq %r11,%r11 popfq CFI_ADJUST_CFA_OFFSET -8 /*CFI_RESTORE rflags*/ @@ -191,7 +201,7 @@ movl $AUDIT_ARCH_I386,%edi /* 1st arg: audit arch */ call audit_syscall_entry movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall number */ - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja ia32_badsys movl %ebx,%edi /* reload 1st syscall arg */ movl RCX-ARGOFFSET(%rsp),%esi /* reload 2nd syscall arg */ @@ -200,9 +210,9 @@ movl RDI-ARGOFFSET(%rsp),%r8d /* reload 5th syscall arg */ .endm - .macro auditsys_exit exit,ebpsave=RBP + .macro auditsys_exit exit testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) - jnz int_ret_from_sys_call + jnz ia32_ret_from_sys_call TRACE_IRQS_ON sti movl %eax,%esi /* second arg, syscall return value */ @@ -213,13 +223,13 @@ call audit_syscall_exit GET_THREAD_INFO(%r10) movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ - movl \ebpsave-ARGOFFSET(%rsp),%ebp /* reload user register value */ movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi cli TRACE_IRQS_OFF testl %edi,TI_flags(%r10) - jnz int_with_check - jmp \exit + jz \exit + CLEAR_RREGS -ARGOFFSET + jmp int_with_check .endm sysenter_auditsys: @@ -244,7 +254,7 @@ call syscall_trace_enter LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */ RESTORE_REST - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja int_ret_from_sys_call /* sysenter_tracesys has set RAX(%rsp) */ jmp sysenter_do_call CFI_ENDPROC @@ -310,7 +320,7 @@ testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) CFI_REMEMBER_STATE jnz cstar_tracesys - cmpl $IA32_NR_syscalls-1,%eax + cmpq $IA32_NR_syscalls-1,%rax ja ia32_badsys cstar_do_call: IA32_ARG_FIXUP 1 @@ -329,6 +339,9 @@ CFI_REGISTER rip,rcx movl EFLAGS-ARGOFFSET(%rsp),%r11d /*CFI_REGISTER rflags,r11*/ + xorq %r10,%r10 + xorq %r9,%r9 + xorq %r8,%r8 TRACE_IRQS_ON movl RSP-ARGOFFSET(%rsp),%esp CFI_RESTORE rsp @@ -343,7 +356,7 @@ jmp cstar_dispatch sysretl_audit: - auditsys_exit sysretl_from_sys_call, RCX /* user %ebp in RCX slot */ + auditsys_exit sysretl_from_sys_call #endif cstar_tracesys: @@ -353,14 +366,14 @@ #endif xchgl %r9d,%ebp SAVE_REST - CLEAR_RREGS r9 + CLEAR_RREGS 0, r9 movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */ movq %rsp,%rdi /* &pt_regs -> arg1 */ call syscall_trace_enter LOAD_ARGS32 ARGOFFSET, 1 /* reload args from stack in case ptrace changed it */ RESTORE_REST xchgl %ebp,%r9d - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja int_ret_from_sys_call /* cstar_tracesys has set RAX(%rsp) */ jmp cstar_do_call END(ia32_cstar_target) @@ -418,13 +431,15 @@ orl $TS_COMPAT,TI_status(%r10) testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) jnz ia32_tracesys - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja ia32_badsys ia32_do_call: IA32_ARG_FIXUP call *ia32_sys_call_table(,%rax,8) # xxx: rip relative ia32_sysret: movq %rax,RAX-ARGOFFSET(%rsp) +ia32_ret_from_sys_call: + CLEAR_RREGS -ARGOFFSET jmp int_ret_from_sys_call ia32_tracesys: @@ -435,15 +450,15 @@ call syscall_trace_enter LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */ RESTORE_REST - cmpl $(IA32_NR_syscalls-1),%eax + cmpq $(IA32_NR_syscalls-1),%rax ja int_ret_from_sys_call /* ia32_tracesys has set RAX(%rsp) */ jmp ia32_do_call END(ia32_syscall) ia32_badsys: movq $0,ORIG_RAX-ARGOFFSET(%rsp) - movq $-ENOSYS,RAX-ARGOFFSET(%rsp) - jmp int_ret_from_sys_call + movq $-ENOSYS,%rax + jmp ia32_sysret quiet_ni_syscall: movq $-ENOSYS,%rax @@ -687,7 +702,7 @@ .quad quiet_ni_syscall /* streams2 */ .quad stub32_vfork /* 190 */ .quad compat_sys_getrlimit - .quad sys32_mmap2 + .quad sys_mmap_pgoff .quad sys32_truncate64 .quad sys32_ftruncate64 .quad sys32_stat64 /* 195 */ --- linux-fsl-imx51-2.6.31.orig/arch/x86/ia32/sys_ia32.c +++ linux-fsl-imx51-2.6.31/arch/x86/ia32/sys_ia32.c @@ -155,9 +155,6 @@ asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg) { struct mmap_arg_struct a; - struct file *file = NULL; - unsigned long retval; - struct mm_struct *mm ; if (copy_from_user(&a, arg, sizeof(a))) return -EFAULT; @@ -165,22 +162,8 @@ if (a.offset & ~PAGE_MASK) return -EINVAL; - if (!(a.flags & MAP_ANONYMOUS)) { - file = fget(a.fd); - if (!file) - return -EBADF; - } - - mm = current->mm; - down_write(&mm->mmap_sem); - retval = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, + return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset>>PAGE_SHIFT); - if (file) - fput(file); - - up_write(&mm->mmap_sem); - - return retval; } asmlinkage long sys32_mprotect(unsigned long start, size_t len, @@ -553,30 +536,6 @@ return ret; } -asmlinkage long sys32_mmap2(unsigned long addr, unsigned long len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct mm_struct *mm = current->mm; - unsigned long error; - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - return -EBADF; - } - - down_write(&mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(&mm->mmap_sem); - - if (file) - fput(file); - return error; -} - asmlinkage long sys32_olduname(struct oldold_utsname __user *name) { char *arch = "x86_64"; --- linux-fsl-imx51-2.6.31.orig/arch/x86/ia32/ia32_aout.c +++ linux-fsl-imx51-2.6.31/arch/x86/ia32/ia32_aout.c @@ -308,14 +308,15 @@ if (retval) return retval; - regs->cs = __USER32_CS; - regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 = - regs->r13 = regs->r14 = regs->r15 = 0; - /* OK, This is the point of no return */ set_personality(PER_LINUX); set_thread_flag(TIF_IA32); - clear_thread_flag(TIF_ABI_PENDING); + + setup_new_exec(bprm); + + regs->cs = __USER32_CS; + regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 = + regs->r13 = regs->r14 = regs->r15 = 0; current->mm->end_code = ex.a_text + (current->mm->start_code = N_TXTADDR(ex)); --- linux-fsl-imx51-2.6.31.orig/arch/x86/vdso/vdso32-setup.c +++ linux-fsl-imx51-2.6.31/arch/x86/vdso/vdso32-setup.c @@ -331,7 +331,7 @@ if (compat) addr = VDSO_HIGH_BASE; else { - addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0); + addr = get_unmapped_area_prot(NULL, 0, PAGE_SIZE, 0, 0, 1); if (IS_ERR_VALUE(addr)) { ret = addr; goto up_fail; --- linux-fsl-imx51-2.6.31.orig/arch/frv/kernel/sys_frv.c +++ linux-fsl-imx51-2.6.31/arch/frv/kernel/sys_frv.c @@ -32,9 +32,6 @@ unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff) { - int error = -EBADF; - struct file * file = NULL; - /* As with sparc32, make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE we have.... */ @@ -42,69 +39,10 @@ trying to map something we can't */ if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1)) return -EINVAL; - pgoff >>= PAGE_SHIFT - 12; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - goto out; - } - - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - - if (file) - fput(file); -out: - return error; -} - -#if 0 /* DAVIDM - do we want this */ -struct mmap_arg_struct64 { - __u32 addr; - __u32 len; - __u32 prot; - __u32 flags; - __u64 offset; /* 64 bits */ - __u32 fd; -}; - -asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg) -{ - int error = -EFAULT; - struct file * file = NULL; - struct mmap_arg_struct64 a; - unsigned long pgoff; - - if (copy_from_user(&a, arg, sizeof(a))) - return -EFAULT; - - if ((long)a.offset & ~PAGE_MASK) - return -EINVAL; - - pgoff = a.offset >> PAGE_SHIFT; - if ((a.offset >> PAGE_SHIFT) != pgoff) - return -EINVAL; - - if (!(a.flags & MAP_ANONYMOUS)) { - error = -EBADF; - file = fget(a.fd); - if (!file) - goto out; - } - a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - down_write(¤t->mm->mmap_sem); - error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); -out: - return error; + return sys_mmap_pgoff(addr, len, prot, flags, fd, + pgoff >> (PAGE_SHIFT - 12)); } -#endif /* * sys_ipc() is the de-multiplexer for the SysV IPC calls.. --- linux-fsl-imx51-2.6.31.orig/arch/ia64/include/asm/compat.h +++ linux-fsl-imx51-2.6.31/arch/ia64/include/asm/compat.h @@ -198,7 +198,7 @@ } static __inline__ void __user * -compat_alloc_user_space (long len) +arch_compat_alloc_user_space (long len) { struct pt_regs *regs = task_pt_regs(current); return (void __user *) (((regs->r12 & 0xffffffff) & -16) - len); --- linux-fsl-imx51-2.6.31.orig/arch/ia64/hp/sim/simserial.c +++ linux-fsl-imx51-2.6.31/arch/ia64/hp/sim/simserial.c @@ -395,7 +395,7 @@ { if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + (cmd != TIOCMIWAIT)) { if (tty->flags & (1 << TTY_IO_ERROR)) return -EIO; } @@ -433,16 +433,6 @@ case TIOCMIWAIT: printk(KERN_INFO "rs_ioctl: TIOCMIWAIT: called\n"); return 0; - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - printk(KERN_INFO "rs_ioctl: TIOCGICOUNT called\n"); - return 0; - case TIOCSERGWILD: case TIOCSERSWILD: /* "setserial -W" is called in Debian boot */ --- linux-fsl-imx51-2.6.31.orig/arch/ia64/kernel/sys_ia64.c +++ linux-fsl-imx51-2.6.31/arch/ia64/kernel/sys_ia64.c @@ -100,51 +100,7 @@ asmlinkage unsigned long ia64_brk (unsigned long brk) { - unsigned long rlim, retval, newbrk, oldbrk; - struct mm_struct *mm = current->mm; - - /* - * Most of this replicates the code in sys_brk() except for an additional safety - * check and the clearing of r8. However, we can't call sys_brk() because we need - * to acquire the mmap_sem before we can do the test... - */ - down_write(&mm->mmap_sem); - - if (brk < mm->end_code) - goto out; - newbrk = PAGE_ALIGN(brk); - oldbrk = PAGE_ALIGN(mm->brk); - if (oldbrk == newbrk) - goto set_brk; - - /* Always allow shrinking brk. */ - if (brk <= mm->brk) { - if (!do_munmap(mm, newbrk, oldbrk-newbrk)) - goto set_brk; - goto out; - } - - /* Check against unimplemented/unmapped addresses: */ - if ((newbrk - oldbrk) > RGN_MAP_LIMIT || REGION_OFFSET(newbrk) > RGN_MAP_LIMIT) - goto out; - - /* Check against rlimit.. */ - rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur; - if (rlim < RLIM_INFINITY && brk - mm->start_data > rlim) - goto out; - - /* Check against existing mmap mappings. */ - if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE)) - goto out; - - /* Ok, looks good - let it rip. */ - if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk) - goto out; -set_brk: - mm->brk = brk; -out: - retval = mm->brk; - up_write(&mm->mmap_sem); + unsigned long retval = sys_brk(brk); force_successful_syscall_return(); return retval; } @@ -185,39 +141,6 @@ return 0; } -static inline unsigned long -do_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, unsigned long pgoff) -{ - struct file *file = NULL; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - file = fget(fd); - if (!file) - return -EBADF; - - if (!file->f_op || !file->f_op->mmap) { - addr = -ENODEV; - goto out; - } - } - - /* Careful about overflows.. */ - len = PAGE_ALIGN(len); - if (!len || len > TASK_SIZE) { - addr = -EINVAL; - goto out; - } - - down_write(¤t->mm->mmap_sem); - addr = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - -out: if (file) - fput(file); - return addr; -} - /* * mmap2() is like mmap() except that the offset is expressed in units * of PAGE_SIZE (instead of bytes). This allows to mmap2() (pieces @@ -226,7 +149,7 @@ asmlinkage unsigned long sys_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, long pgoff) { - addr = do_mmap2(addr, len, prot, flags, fd, pgoff); + addr = sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff); if (!IS_ERR((void *) addr)) force_successful_syscall_return(); return addr; @@ -238,7 +161,7 @@ if (offset_in_page(off) != 0) return -EINVAL; - addr = do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT); + addr = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT); if (!IS_ERR((void *) addr)) force_successful_syscall_return(); return addr; --- linux-fsl-imx51-2.6.31.orig/block/blk-sysfs.c +++ linux-fsl-imx51-2.6.31/block/blk-sysfs.c @@ -40,7 +40,12 @@ { struct request_list *rl = &q->rq; unsigned long nr; - int ret = queue_var_store(&nr, page, count); + int ret; + + if (!q->request_fn) + return -EINVAL; + + ret = queue_var_store(&nr, page, count); if (nr < BLKDEV_MIN_RQ) nr = BLKDEV_MIN_RQ; --- linux-fsl-imx51-2.6.31.orig/block/blk-map.c +++ linux-fsl-imx51-2.6.31/block/blk-map.c @@ -201,6 +201,9 @@ for (i = 0; i < iov_count; i++) { unsigned long uaddr = (unsigned long)iov[i].iov_base; + if (!iov[i].iov_len) + return -EINVAL; + if (uaddr & queue_dma_alignment(q)) { unaligned = 1; break; --- linux-fsl-imx51-2.6.31.orig/block/blk-core.c +++ linux-fsl-imx51-2.6.31/block/blk-core.c @@ -1163,7 +1163,7 @@ const int unplug = bio_unplug(bio); int rw_flags; - if (bio_barrier(bio) && bio_has_data(bio) && + if (bio_barrier(bio) && (q->next_ordered == QUEUE_ORDERED_NONE)) { bio_endio(bio, -EOPNOTSUPP); return 0; --- linux-fsl-imx51-2.6.31.orig/block/elevator.c +++ linux-fsl-imx51-2.6.31/block/elevator.c @@ -101,16 +101,22 @@ return 0; /* - * Don't merge if failfast settings don't match. + * Don't merge if failfast settings don't match. Note readahead + * requests are always mapped to failfast. * * FIXME: The negation in front of each condition is necessary * because bio and request flags use different bit positions * and the accessors return those bits directly. This * ugliness will soon go away. */ - if (!bio_failfast_dev(bio) != !blk_failfast_dev(rq) || - !bio_failfast_transport(bio) != !blk_failfast_transport(rq) || - !bio_failfast_driver(bio) != !blk_failfast_driver(rq)) + if (!(bio_rw_ahead(bio) || bio_failfast_dev(bio)) != + !blk_failfast_dev(rq)) + return 0; + if (!(bio_rw_ahead(bio) || bio_failfast_transport(bio)) != + !blk_failfast_transport(rq)) + return 0; + if (!(bio_rw_ahead(bio) || bio_failfast_driver(bio)) != + !blk_failfast_driver(rq)) return 0; if (!elv_iosched_allow_merge(rq, bio)) --- linux-fsl-imx51-2.6.31.orig/scripts/Makefile.build +++ linux-fsl-imx51-2.6.31/scripts/Makefile.build @@ -269,7 +269,8 @@ # Linker scripts preprocessor (.lds.S -> .lds) # --------------------------------------------------------------------------- quiet_cmd_cpp_lds_S = LDS $@ - cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $< + cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \ + -D__ASSEMBLY__ -o $@ $< $(obj)/%.lds: $(src)/%.lds.S FORCE $(call if_changed_dep,cpp_lds_S) --- linux-fsl-imx51-2.6.31.orig/scripts/Kbuild.include +++ linux-fsl-imx51-2.6.31/scripts/Kbuild.include @@ -105,12 +105,12 @@ # Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586) cc-option = $(call try-run,\ - $(CC) $(KBUILD_CFLAGS) $(1) -c -xc /dev/null -o "$$TMP",$(1),$(2)) + $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -xc /dev/null -o "$$TMP",$(1),$(2)) # cc-option-yn # Usage: flag := $(call cc-option-yn,-march=winchip-c6) cc-option-yn = $(call try-run,\ - $(CC) $(KBUILD_CFLAGS) $(1) -c -xc /dev/null -o "$$TMP",y,n) + $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -xc /dev/null -o "$$TMP",y,n) # cc-option-align # Prefix align with either -falign or -malign @@ -143,6 +143,12 @@ # $(Q)$(MAKE) $(build)=dir build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj +### +# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= +# Usage: +# $(Q)$(MAKE) $(modbuiltin)=dir +modbuiltin := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.modbuiltin obj + # Prefix -I with $(srctree) if it is not an absolute path. # skip if -I has no parameter addtree = $(if $(patsubst -I%,%,$(1)), \ --- linux-fsl-imx51-2.6.31.orig/scripts/Makefile.modbuiltin +++ linux-fsl-imx51-2.6.31/scripts/Makefile.modbuiltin @@ -0,0 +1,55 @@ +# ========================================================================== +# Generating modules.builtin +# ========================================================================== + +src := $(obj) + +PHONY := __modbuiltin +__modbuiltin: + +-include include/config/auto.conf +# tristate.conf sets tristate variables to uppercase 'Y' or 'M' +# That way, we get the list of built-in modules in obj-Y +-include include/config/tristate.conf + +include scripts/Kbuild.include + +# The filename Kbuild has precedence over Makefile +kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) +kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) +include $(kbuild-file) + +include scripts/Makefile.lib +__subdir-Y := $(patsubst %/,%,$(filter %/, $(obj-Y))) +subdir-Y += $(__subdir-Y) +subdir-ym := $(sort $(subdir-y) $(subdir-Y) $(subdir-m)) +subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) +obj-Y := $(addprefix $(obj)/,$(obj-Y)) + +modbuiltin-subdirs := $(patsubst %,%/modules.builtin, $(subdir-ym)) +modbuiltin-mods := $(filter %.ko, $(obj-Y:.o=.ko)) +modbuiltin-target := $(obj)/modules.builtin + +__modbuiltin: $(modbuiltin-target) $(subdir-ym) + @: + +$(modbuiltin-target): $(subdir-ym) FORCE + $(Q)(for m in $(modbuiltin-mods); do echo kernel/$$m; done; \ + cat /dev/null $(modbuiltin-subdirs)) > $@ + +PHONY += FORCE + +FORCE: + +# Descending +# --------------------------------------------------------------------------- + +PHONY += $(subdir-ym) +$(subdir-ym): + $(Q)$(MAKE) $(modbuiltin)=$@ + + +# Declare the contents of the .PHONY variable as phony. We keep that +# information in a variable se we can use it in if_changed and friends. + +.PHONY: $(PHONY) --- linux-fsl-imx51-2.6.31.orig/scripts/kallsyms.c +++ linux-fsl-imx51-2.6.31/scripts/kallsyms.c @@ -585,7 +585,7 @@ { const char *tail = str; - while (*tail != '_') + while (*tail == '_') tail++; return tail - str; --- linux-fsl-imx51-2.6.31.orig/scripts/kconfig/confdata.c +++ linux-fsl-imx51-2.6.31/scripts/kconfig/confdata.c @@ -677,7 +677,7 @@ struct symbol *sym; const char *str; const char *name; - FILE *out, *out_h; + FILE *out, *tristate, *out_h; time_t now; int i, l; @@ -692,9 +692,16 @@ if (!out) return 1; + tristate = fopen(".tmpconfig_tristate", "w"); + if (!tristate) { + fclose(out); + return 1; + } + out_h = fopen(".tmpconfig.h", "w"); if (!out_h) { fclose(out); + fclose(tristate); return 1; } @@ -707,6 +714,9 @@ "# %s" "#\n", sym_get_string_value(sym), ctime(&now)); + fprintf(tristate, "#\n" + "# Automatically generated - do not edit\n" + "\n"); fprintf(out_h, "/*\n" " * Automatically generated C config: don't edit\n" " * Linux kernel version: %s\n" @@ -727,10 +737,14 @@ break; case mod: fprintf(out, "CONFIG_%s=m\n", sym->name); + fprintf(tristate, "CONFIG_%s=M\n", sym->name); fprintf(out_h, "#define CONFIG_%s_MODULE 1\n", sym->name); break; case yes: fprintf(out, "CONFIG_%s=y\n", sym->name); + if (sym->type == S_TRISTATE) + fprintf(tristate, "CONFIG_%s=Y\n", + sym->name); fprintf(out_h, "#define CONFIG_%s 1\n", sym->name); break; } @@ -772,6 +786,7 @@ } } fclose(out); + fclose(tristate); fclose(out_h); name = getenv("KCONFIG_AUTOHEADER"); @@ -779,6 +794,11 @@ name = "include/linux/autoconf.h"; if (rename(".tmpconfig.h", name)) return 1; + name = getenv("KCONFIG_TRISTATE"); + if (!name) + name = "include/config/tristate.conf"; + if (rename(".tmpconfig_tristate", name)) + return 1; name = conf_get_autoconfig_name(); /* * This must be the last step, kbuild has a dependency on auto.conf --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control.stub.in +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control.stub.in @@ -0,0 +1,10 @@ +Source: SRCPKGNAME +Section: devel +Priority: optional +Maintainer: Ubuntu Kernel Team +Standards-Version: 3.6.1 +Build-Depends: debhelper (>= 3), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync +Build-Depends-Indep: xmlto, docbook-utils, gs, transfig, bzip2, sharutils +Build-Conflicts: findutils (= 4.4.1-1ubuntu1) +Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-karmic.git + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/copyright +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/copyright @@ -0,0 +1,30 @@ +This is the Ubuntu prepackaged version of the Linux kernel. +Linux was written by Linus Torvalds +and others. + +This package was put together by the Ubuntu Kernel Team, from +sources retrieved from upstream linux git. +The sources may be found at most Linux ftp sites, including +ftp://ftp.kernel.org/pub/linux/kernel/ + +This package is currently maintained by the +Ubuntu Kernel Team + +Linux is copyrighted by Linus Torvalds and others. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; version 2 dated June, 1991. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. + +On Ubuntu Linux systems, the complete text of the GNU General +Public License v2 can be found in `/usr/share/common-licenses/GPL-2'. --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/NOTES +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/NOTES @@ -0,0 +1,4 @@ +eSCO patch removed. Replaced upstream with a disable_esco module parm. +airprime: Module gone, use option driver instead +AppArmor: Patch is all there and ported. Ooops when enabled, so default + off (still can be enabled apparmor=1) --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/changelog +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/changelog @@ -0,0 +1,3907 @@ +linux-fsl-imx51 (2.6.31-612.33) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #931913 + + [ Upstream Kernel Changes ] + + * Fix for buffer overflow in ldm_frag_add not sufficient + - LP: #922371 + - CVE-2011-2182 + + -- Paolo Pisati Tue, 14 Feb 2012 19:55:37 +0100 + +linux-fsl-imx51 (2.6.31-612.32) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #906939 + + [ Upstream Kernel Changes ] + + * Revert "core: Fix memory leak/corruption on VLAN GRO_DROP, + CVE-2011-1576" + * resource: add helpers for fetching rlimits + * use cache type functions for arch_get_unmapped_area + * topdown mmap support + * TPM: Zero buffer after copying to userspace, CVE-2011-1162 + - LP: #899463 + - CVE-2011-1162 + * hfs: fix hfs_find_init() sb->ext_tree NULL ptr oops, CVE-2011-2203 + - LP: #899466 + - CVE-2011-2203 + * KEYS: Fix a NULL pointer deref in the user-defined key type, + CVE-2011-4110 + - LP: #894369, #unable to handle kernel NULL pointer dereference at 0000000000000008 + - CVE-2011-4110 + * gro: reset vlan_tci on reuse + - LP: #844361, #902317 + - CVE-2011-1576 + + -- Andy Whitcroft Tue, 20 Dec 2011 15:31:26 +0000 + +linux-fsl-imx51 (2.6.31-612.31) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #899736 + + [ Upstream Kernel Changes ] + + * xfs: Fix possible memory corruption in xfs_readlink, CVE-2011-4077 + - LP: #887298 + - CVE-2011-4077 + * jbd/jbd2: validate sb->s_first in journal_get_superblock() + - LP: #893148 + - CVE-2011-4132 + * hfs: add sanity check for file name length, CVE-2011-4330 + - LP: #894374 + - CVE-2011-4330 + + -- Paolo Pisati Mon, 05 Dec 2011 09:32:22 +0100 + +linux-fsl-imx51 (2.6.31-612.30) lucid-proposed; urgency=low + + * Release Tracking Bug + - LP: #888698 + + [ Herton Ronaldo Krzesinski ] + + * [Config] Use debian.env earlier + + [ Upstream Kernel Changes ] + + * NLM: Don't hang forever on NLM unlock requests - CVE-2011-2491 + - LP: #869237 + - CVE-2011-2491 + * cifs: clean up cifs_find_smb_ses (try #2), CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * cifs: fix NULL pointer dereference in cifs_find_smb_ses, CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * cifs: check for NULL session password, CVE-2011-1585 + - LP: #869208 + - CVE-2011-1585 + * gre: fix netns vs proto registration ordering, CVE-2011-1767 + - LP: #869213 + - CVE-2011-1767 + * netns xfrm: fixup xfrm6_tunnel error propagation, CVE-2011-1768 + - LP: #869215, #823296 + - CVE-2011-1768 + * tunnels: fix netns vs proto registration ordering, CVE-2011-1768 + - LP: #869215 + - CVE-2011-1768 + + -- Paolo Pisati Fri, 11 Nov 2011 12:34:18 +0100 + +linux-fsl-imx51 (2.6.31-611.29) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #873059 + + [ Upstream Kernel Changes ] + + * cifs: fix possible memory corruption in CIFSFindNext, CVE-2011-3191 + - LP: #834135 + - CVE-2011-3191 + * befs: Validate length of long symbolic links, CVE-2011-2928 + - LP: #834124 + - CVE-2011-2928 + * gro: Only reset frag0 when skb can be pulled, CVE-2011-2723 + - LP: #844371 + - CVE-2011-2723 + * Validate size of EFI GUID partition entries, CVE-2011-1776 + - LP: #844365 + - CVE-2011-1776 + * inet_diag: fix inet_diag_bc_audit(), CVE-2011-2213 + - LP: #838421 + - CVE-2011-2213 + * Bluetooth: Prevent buffer overflow in l2cap config request, + CVE-2011-2497 + - LP: #838423 + - CVE-2011-2497 + * core: Fix memory leak/corruption on VLAN GRO_DROP, CVE-2011-1576 + - LP: #844361 + - CVE-2011-1576 + * crypto: Move md5_transform to lib/md5.c, CVE-2011-3188 + - LP: #827462, #834129 + - CVE-2011-3188 + * net: Compute protocol sequence numbers and fragment IDs using MD5, + CVE-2011-3188 + - LP: #827462, #834129 + - CVE-2011-3188 + * ext4: correctly calculate number of blocks for fiemap, CVE-2011-2695 + - LP: #474597, #583414, #819574 + - CVE-2011-2695 + * ext4: Fix max file size and logical block counting of extent format + file, CVE-2011-2695 + - LP: #819574 + - CVE-2011-2695 + * cifs: always do is_path_accessible check in cifs_mount, CVE-2011-3363 + - LP: #866034 + - CVE-2011-3363 + * cifs: add fallback in is_path_accessible for old servers, CVE-2011-3363 + - LP: #866034 + - CVE-2011-3363 + * Make TASKSTATS require root access, CVE-2011-2494 + - LP: #866021 + - CVE-2011-2494 + * proc: restrict access to /proc/PID/io, CVE-2011-2495 + - LP: #866025 + - CVE-2011-2495 + * proc: fix a race in do_io_accounting(), CVE-2011-2495 + - LP: #866025 + - CVE-2011-2495 + * staging: comedi: fix infoleak to userspace, CVE-2011-2909 + - LP: #869261 + - CVE-2011-2909 + * sctp: fix to calc the INIT/INIT-ACK chunk length correctly is set, + CVE-2011-1573 + - LP: #869205 + - CVE-2011-1573 + * perf tools: do not look at ./config for configuration, CVE-2011-2905 + - LP: #869259 + - CVE-2011-2905 + * net_sched: Fix qdisc_notify() - CVE-2011-2525 + - LP: #869250 + - CVE-2011-2525 + * nl80211: fix overflow in ssid_len - CVE-2011-2517 + - LP: #869245 + - CVE-2011-2517 + * mm: avoid wrapping vm_pgoff in mremap() - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + * vm: fix vm_pgoff wrap in stack expansion - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + * vm: fix vm_pgoff wrap in upward expansion - CVE-2011-2496 + - LP: #869243 + - CVE-2011-2496 + + -- Paolo Pisati Thu, 13 Oct 2011 12:19:09 +0200 + +linux-fsl-imx51 (2.6.31-610.28) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #837802 + + [ Upstream Kernel Changes ] + + * ipv6: make fragment identifications less predictable, CVE-2011-2699 + - LP: #827685 + - CVE-2011-2699 + * perf: Fix software event overflow, CVE-2011-2918 + - LP: #834121 + - CVE-2011-2918 + * proc: fix oops on invalid /proc//maps access, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + + -- Paolo Pisati Wed, 31 Aug 2011 10:26:26 +0200 + +linux-fsl-imx51 (2.6.31-610.27) lucid-proposed; urgency=low + + * Release tracking bug + - LP: #829160 + + [ Upstream Kernel Changes ] + + * fs/partitions/efi.c: corrupted GUID partition tables can cause kernel + oops + - LP: #795418 + - CVE-2011-1577 + * Fix corrupted OSF partition table parsing + - LP: #796606 + - CVE-2011-1163 + * can: Add missing socket check in can/bcm release. + - LP: #796502 + - CVE-2011-1598 + * proc: protect mm start_code/end_code in /proc/pid/stat + - LP: #799906 + - CVE-2011-0726 + * sctp: Fix a race between ICMP protocol unreachable and connect() + * tty: Make tiocgicount a handler, CVE-2010-4076, CVE-2010-4077 + - LP: #794034 + - CVE-2010-4077 + * filter: make sure filters dont read uninitialized memory CVE-2010-4158 + - LP: #721282 + - CVE-2010-4158 + * bio: take care not overflow page count when mapping/copying user data + CVE-2010-4162 + - LP: #721441 + - CVE-2010-4162 + * block: check for proper length of iov entries in blk_rq_map_user_iov() + - LP: #721504 + - CVE-2010-4163 + * block: check for proper length of iov entries earlier in + blk_rq_map_user_iov(), CVE-2010-4163 + - LP: #721504 + - CVE-2010-4163 + * rds: Integer overflow in RDS cmsg handling, CVE-2010-4175 + - LP: #721455 + - CVE-2010-4175 + * bluetooth: Fix missing NULL check CVE-2010-4242 + - LP: #714846 + - CVE-2010-4242 + * IB/uverbs: Handle large number of entries in poll CQ CVE-2010-4649 + - LP: #800121 + - CVE-2010-4649 + * epoll: prevent creating circular epoll structures CVE-2011-1082 + - LP: #800758 + - CVE-2011-1082 + * nfs4: Ensure that ACL pages sent over NFS were not allocated from the + slab (v3) CVE-2011-1090 + - LP: #800775 + * ldm: corrupted partition table can cause kernel oops CVE-2011-1012 + - LP: #801083 + - CVE-2011-1012 + * netfilter: ipt_CLUSTERIP: fix buffer overflow CVE-2011-2534 + - LP: #801473 + - CVE-2011-2534 + * netfilter: arp_tables: fix infoleak to userspace CVE-2011-1170 + - LP: #801480 + - CVE-2011-1170 + * netfilter: ip_tables: fix infoleak to userspace CVE-2011-1171 + - LP: #801482 + - CVE-2011-1171 + * ipv6: netfilter: ip6_tables: fix infoleak to userspace CVE-2011-1172 + - LP: #801483 + - CVE-2011-1172 + * econet: 4 byte infoleak to the network CVE-2011-1173 + - LP: #801484 + - CVE-2011-1173 + * net: Limit socket I/O iovec total length to INT_MAX. + - LP: #708839 + * fs/partitions: Validate map_count in Mac partition tables - + CVE-2011-1010 + - LP: #804225 + - CVE-2011-1010 + * drm: fix unsigned vs signed comparison issue in modeset ctl ioctl, + CVE-2011-1013 + - LP: #804229 + - CVE-2011-1013 + * exec: copy-and-paste the fixes into compat_do_execve() paths - + CVE-2010-4243 + - LP: #804234 + - CVE-2010-4243 + * taskstats: don't allow duplicate entries in listener mode, + CVE-2011-2484 + - LP: #806390 + - CVE-2011-2484 + * dccp: handle invalid feature options length, CVE-2011-1770 + - LP: #806375 + - CVE-2011-1770 + * pagemap: close races with suid execve, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * report errors in /proc/*/*map* sanely, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * close race in /proc/*/environ, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * auxv: require the target to be tracable (or yourself), CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * deal with races in /proc/*/{syscall, stack, personality}, CVE-2011-1020 + - LP: #813026 + - CVE-2011-1020 + * dccp: fix oops on Reset after close, CVE-2011-1093 + - LP: #814087 + - CVE-2011-1093 + * net: add limit for socket backlog CVE-2010-4251 + - LP: #807462 + * tcp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * ipv6: udp: Optimise multicast reception + - LP: #807462 + * ipv4: udp: Optimise multicast reception + - LP: #807462 + * udp: multicast RX should increment SNMP/sk_drops counter in allocation + failures CVE-2010-4251 + - LP: #807462 + * udp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * llc: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * sctp: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * tipc: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * x25: use limited socket backlog CVE-2010-4251 + - LP: #807462 + * net: backlog functions rename CVE-2010-4251 + - LP: #807462 + * net: sk_add_backlog() take rmem_alloc into account CVE-2010-4805 + - LP: #809318 + * Bluetooth: sco: fix information leak to userspace, CVE-2011-1078 + - LP: #816542 + - CVE-2011-1078 + * Bluetooth: bnep: fix buffer overflow, CVE-2011-1079 + - LP: #816544 + - CVE-2011-1079 + * bridge: netfilter: fix information leak, CVE-2011-1080 + - LP: #816545 + - CVE-2011-1080 + * char/tpm: Fix unitialized usage of data buffer, CVE-2011-1160 + - LP: #816546 + - CVE-2011-1160 + * irda: validate peer name and attribute lengths, CVE-2011-1180 + - LP: #816547 + - CVE-2011-1180 + * gro: Reset dev pointer on reuse, CVE-2011-1478 + - LP: #816549 + - CVE-2011-1478 + * gro: reset skb_iif on reuse, CVE-2011-1478 + - LP: #816549 + - CVE-2011-1478 + * rose_loopback_timer sets VC number <= ROSE_DEFAULT_MAXVC, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * ROSE: prevent heap corruption with bad facilities, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * rose: Add length checks to CALL_REQUEST parsing, CVE-2011-1493 + - LP: #816550 + - CVE-2011-1493 + * Bluetooth: l2cap and rfcomm: fix 1 byte infoleak to userspace. + - LP: #819569 + - CVE-2011-2492 + * Add mount option to check uid of device being mounted = expect uid, + CVE-2011-1833 + - LP: #732628 + - CVE-2011-1833 + + -- Paolo Pisati Mon, 20 Jun 2011 11:09:38 +0200 + +linux-fsl-imx51 (2.6.31-609.26) lucid; urgency=low + + [ Paolo Pisati ] + + * Tracking bug + - LP: #795219 + * [Config] Disable parport_pc on fsl-imx51 + - LP: #601226 + + [ Upstream Kernel Changes ] + + * ALSA: sound/pci/rme9652: prevent reading uninitialized stack memory + - LP: #712723, #712737 + * can-bcm: fix minor heap overflow + - LP: #710680 + * drivers/video/via/ioctl.c: prevent reading uninitialized stack memory + - LP: #712744 + * gdth: integer overflow in ioctl + - LP: #711797 + * inet_diag: Make sure we actually run the same bytecode we audited, CVE-2010-3880 + - LP: #711865 + - CVE-2010-3880 + * net: fix rds_iovec page count overflow, CVE-2010-3865 + - LP: #709153 + - CVE-2010-3865 + * net: packet: fix information leak to userland, CVE-2010-3876 + - LP: #711045 + - CVE-2010-3876 + * net: tipc: fix information leak to userland, CVE-2010-3877 + - LP: #711291 + - CVE-2010-3877 + * net: Truncate recvfrom and sendto length to INT_MAX. + - LP: #708839 + * posix-cpu-timers: workaround to suppress the problems with mt exec + - LP: #712609 + * sys_semctl: fix kernel stack leakage + - LP: #712749 + * x25: Patch to fix bug 15678 - x25 accesses fields beyond end of packet. + - LP: #709372 + * memory corruption in X.25 facilities parsing + - LP: #709372 + * net: ax25: fix information leak to userland, CVE-2010-3875 + - LP: #710714 + - CVE-2010-3875 + * net: ax25: fix information leak to userland harder, CVE-2010-3875 + - LP: #710714 + - CVE-2010-3875 + * fs/partitions/ldm.c: fix oops caused by corrupted partition table, CVE-2011-1017 + - LP: #771382 + - CVE-2011-1017 + * net: clear heap allocations for privileged ethtool actions + - LP: #771445 + * Prevent rt_sigqueueinfo and rt_tgsigqueueinfo from spoofing the signal code + - LP: #772543 + * Relax si_code check in rt_sigqueueinfo and rt_tgsigqueueinfo + - LP: #772543 + * exec: make argv/envp memory visible to oom-killer + - LP: #768408 + * next_pidmap: fix overflow condition + - LP: #784727 + * proc: do proper range check on readdir offset + - LP: #784727 + * mpt2sas: prevent heap overflows and unchecked reads + - LP: #787145 + * agp: fix arbitrary kernel memory writes + - LP: #788684 + * can: add missing socket check in can/raw release + - LP: #788694 + * agp: fix OOM and buffer overflow + - LP: #788700 + * do_exit(): make sure that we run with get_fs() == USER_DS - CVE-2010-4258 + - LP: #723945 + - CVE-2010-4258 + * x25: Prevent crashing when parsing bad X.25 facilities - CVE-2010-4164 + - LP: #731199 + - CVE-2010-4164 + * install_special_mapping skips security_file_mmap check - CVE-2010-4346 + - LP: #731971 + - CVE-2010-4346 + * econet: Fix crash in aun_incoming() - CVE-2010-4342 + - LP: #736394 + - CVE-2010-4342 + * sound: Prevent buffer overflow in OSS load_mixer_volumes - CVE-2010-4527 + - LP: #737073 + - CVE-2010-4527 + * irda: prevent integer underflow in IRLMP_ENUMDEVICES, CVE-2010-4529 + - LP: #737823 + - CVE-2010-4529 + * CAN: Use inode instead of kernel address for /proc file - CVE-2010-4565 + - LP: #765007 + - CVE-2010-4565 + * av7110: check for negative array offset - CVE-2011-0521 + - LP: #767526 + - CVE-2011-0521 + * xfs: prevent leaking uninitialized stack memory in FSGEOMETRY_V1 - CVE-2011-0711 + - LP: #767740 + - CVE-2011-0711 + * xfs: zero proper structure size for geometry calls - CVE-2011-0711 + - LP: #767740 + - CVE-2011-0711 + * ALSA: caiaq - Fix possible string-buffer overflow - CVE-2011-0712 + - LP: #768448 + - CVE-2011-0712 + * RDMA/cma: Fix crash in request handlers - CVE-2011-0695 + - LP: #770369 + - CVE-2011-0695 + * IB/cm: Bump reference count on cm_id before invoking callback - CVE-2011-0695 + - LP: #770369 + - CVE-2011-0695 + * Treat writes as new when holes span across page boundaries - CVE-2011-0463 + - LP: #770483 + - CVE-2011-0463 + * usb: iowarrior: don't trust report_size for buffer size - CVE-2010-4656 + - LP: #771484 + - CVE-2010-4656 + * tty: icount changeover for other main devices, CVE-2010-4076, CVE-2010-4077 + - LP: #720189 + - CVE-2010-4077 + + -- Paolo Pisati Fri, 27 May 2011 18:09:53 +0200 + +linux-fsl-imx51 (2.6.31-608.25) lucid; urgency=low + + * No change rebuild, package with proper debdiff. + + -- Tim Gardner Thu, 10 Mar 2011 01:53:53 -0700 + +linux-fsl-imx51 (2.6.31-608.24) lucid; urgency=low + + * Fix packaging FTBS + + -- Tim Gardner Wed, 09 Mar 2011 02:19:20 -0700 + +linux-fsl-imx51 (2.6.31-608.23) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * ARM: 5746/1: Handle possible translation errors in ARMv6/v7 + coherent_user_range + - LP: #605042 + + -- Tim Gardner Tue, 08 Mar 2011 06:27:45 -0700 + +linux-fsl-imx51 (2.6.31-608.22) lucid; urgency=low + + [ Tim Gardner ] + + * rebased to 2.6.31-22.72 + * Tracking bug + - LP: #713266 + + [ Upstream Kernel Changes ] + + * Karmic SRU: thinkpad-acpi: lock down video output state access, CVE-2010-3448 + - LP: #706999 + - CVE-2010-3448 + * USB: serial/mos*: prevent reading uninitialized stack memory, + CVE-2010-4074 + - LP: #706149 + - CVE-2010-4074 + * KVM: Fix fs/gs reload oops with invalid ldt + - LP: #707000 + - CVE-2010-3698 + * drivers/video/sis/sis_main.c: prevent reading uninitialized stack + memory, CVE-2010-4078 + - LP: #707579 + - CVE-2010-4078 + * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory, + CVE-2010-4079 + - LP: #707649 + - CVE-2010-4079 + + [ Upstream Kernel Changes ] + + * ipc: initialize structure memory to zero for compat functions + * tcp: Increase TCP_MAXSEG socket option minimum. + - CVE-2010-4165 + * perf_events: Fix perf_counter_mmap() hook in mprotect() + - CVE-2010-4169 + * af_unix: limit unix_tot_inflight + - CVE-2010-4249 + + -- Tim Gardner Fri, 04 Feb 2011 11:39:27 -0700 + +linux-fsl-imx51 (2.6.31-608.21) lucid-proposed; urgency=low + + [ Leann Ogasawara ] + + * Rebased to 2.6.31-22.70 + + [ Ubuntu: 2.6.31-22.70 ] + + - LP: #683474 + * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer + dereference" + * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges" + * Revert "SAUCE: AF_ECONET prevent kernel stack overflow" + * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE + - CVE-2010-2538 + * xfs: validate untrusted inode numbers during lookup + - CVE-2010-2943 + * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED + - CVE-2010-2943 + * xfs: remove block number from inode lookup code + - CVE-2010-2943 + * xfs: fix untrusted inode number lookup + - CVE-2010-2943 + * drm/i915: Sanity check pread/pwrite + - CVE-2010-2962 + * drm/i915: Rephrase pwrite bounds checking to avoid any potential overflow + - CVE-2010-2962 + * tracing: Do not allow llseek to set_ftrace_filter + - CVE-2010-3079 + * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack memory + - CVE-2010-3296 + * drivers/net/eql.c: prevent reading uninitialized stack memory + - CVE-2010-3297 + * drivers/net/usb/hso.c: prevent reading uninitialized memory + - CVE-2010-3298 + * setup_arg_pages: diagnose excessive argument size + - CVE-2010-3858 + * net: clear heap allocation for ETHTOOL_GRXCLSRLALL + - CVE-2010-3861 + * ipc: shm: fix information leak to userland + - CVE-2010-4072 + * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849 + - CVE-2010-3849 + * econet: fix CVE-2010-3850 + - CVE-2010-3850 + * econet: fix CVE-2010-3848 + - CVE-2010-3848 + + [ Ubuntu: 2.6.31-22.69 ] + + * SAUCE: AF_ECONET prevent kernel stack overflow + - CVE-2010-3848 + * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges + - CVE-2010-3850 + * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference + - CVE-2010-3849 + + [ Ubuntu: 2.6.31-22.68 ] + + * SAUCE: docs -- fix doc strings for fc_event_seq + * SAUCE: (no-up) Modularize vesafb -- fix initialization + - LP: #611471 + * SAUCE: sched: update load count only once per cpu in 10 tick update window + - LP: #513848 + * SAUCE: agp/intel: Add second set of PCI-IDs for B43 + - LP: #640214 + * SAUCE: drm/i915: Add second set of PCI-IDs for B43 + - LP: #640214 + * SAUCE: Fix compile error on ia64, powerpc, and sparc + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + [ Ubuntu: 2.6.31-22.67 ] + + * Local privilege escalation vulnerability in RDS sockets + - CVE-2010-3904 + * v4l: disable dangerous buggy compat function + - CVE-2010-2963 + * mm: Do not assume ENOMEM when looking at a split stack vma + - LP: #646114 + * mm: Use helper to find real vma with stack guard page + - LP: #646114 + * Fix race in tty_fasync() properly + - CVE-2009-4895 + * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files + - CVE-2010-2066 + * xfs: prevent swapext from operating on write-only files + - CVE-2010-2226 + * cifs: Fix a kernel BUG with remote OS/2 server (try #3) + - CVE-2010-2248 + * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH + - CVE-2010-2478 + * l2tp: Fix oops in pppol2tp_xmit + - CVE-2010-2495 + * nfsd4: bug in read_buf + - CVE-2010-2521 + * CIFS: Fix a malicious redirect problem in the DNS lookup code + - CVE-2010-2524 + * GFS2: rename causes kernel Oops + - CVE-2010-2798 + * net sched: fix some kernel memory leaks + - CVE-2010-2942 + * jfs: don't allow os2 xattr namespace overlap with others + - CVE-2010-2946 + * irda: Correctly clean up self->ias_obj on irda_bind() failure. + - CVE-2010-2954 + * wireless extensions: fix kernel heap content leak + - CVE-2010-2955 + * ext4: consolidate in_range() definitions + - CVE-2010-3015 + * aio: check for multiplication overflow in do_io_submit + - CVE-2010-3067 + * xfs: prevent reading uninitialized stack memory + - CVE-2010-3078 + * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open() + - CVE-2010-3080 + * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL + - CVE-2010-3084 + * rose: Fix signedness issues wrt. digi count. + - CVE-2010-3310 + * sctp: Do not reset the packet during sctp_packet_config(). + - CVE-2010-3432 + * Fix pktcdvd ioctl dev_minor range check + - CVE-2010-3437 + * ALSA: prevent heap corruption in snd_ctl_new() + - CVE-2010-3442 + * net sched: fix kernel leak in act_police + - CVE-2010-3477 + * Fix out-of-bounds reading in sctp_asoc_get_hmac() + - CVE-2010-3705 + * ocfs2: Don't walk off the end of fast symlinks. + - CVE-2010-NNN2 + + -- Leann Ogasawara Thu, 02 Dec 2010 10:08:36 -0800 + +linux-fsl-imx51 (2.6.31-608.20) lucid-proposed; urgency=low + + [ Brad Figg ] + + * Rebased to 2.6.31-22.66 + + [ Ubuntu: 2.6.31-22.66 ] + + * SAUCE: (no-up) Modularize vesafb -- fix initialization + - LP: #611471 + * SAUCE: sched: update load count only once per cpu in 10 tick update + window + - LP: #513848 + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + [ Ubuntu: 2.6.31-22.65 ] + + * x86-64, compat: Test %rax for the syscall number, not %eax + - CVE-2010-3301 + * x86-64, compat: Retruncate rax after ia32 syscall entry tracing + - CVE-2010-3301 + * compat: Make compat_alloc_user_space() incorporate the access_ok() + - CVE-2010-3081 + + -- Brad Figg Wed, 22 Sep 2010 10:49:56 -0700 + +linux-fsl-imx51 (2.6.31-608.19) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebased to 2.6.31-22.63 + + [ Ubuntu: 2.6.31-22.63 ] + + * drm: Initialize ioctl struct when no user data is present + - CVE-2010-2803 + * can: add limit for nframes and clean up signed/unsigned variables + - CVE-2010-2959 + * mm: keep a guard page below a grow-down stack segment + - CVE-2010-2240 + * mm: fix missing page table unmap for stack guard page failure case + - CVE-2010-2240 + * mm: fix page table unmap for stack guard page properly + - CVE-2010-2240 + * mm: fix up some user-visible effects of the stack guard page + - CVE-2010-2240 + * x86: don't send SIGBUS for kernel page faults + - CVE-2010-2240 + + -- Stefan Bader Wed, 18 Aug 2010 17:04:18 +0200 + +linux-fsl-imx51 (2.6.31-608.18) lucid-proposed; urgency=low + + [ Bryan Wu ] + + * SAUCE: revert commit 41e74a1f7f90b0c092e9e153f7d8b685af2a980e + - LP: #546649, #457878 + + [ Upstream Kernel Changes ] + + * fec: use interrupt for MDIO completion indication + - LP: #546649, #457878 + * ENGR00121057 switch low power mode only support in mc13892 2.0a + - LP: #615722 + + -- Stefan Bader Wed, 11 Aug 2010 13:58:02 +0200 + +linux-fsl-imx51 (2.6.31-608.17) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebased to 2.6.31-22.61 (security) + + [ Ubuntu: 2.6.31-22.61 ] + + * sctp: Fix skb_over_panic resulting from multiple invalid parameter + errors (CVE-2010-1173) (v4) + - CVE-2010-1173 + * sctp: fix append error cause to ERROR chunk correctly + - CVE-2010-1173 + * GFS2: Fix writing to non-page aligned gfs2_quota structures + - CVE-2010-1436 + * KEYS: find_keyring_by_name() can gain access to a freed keyring + - CVE-2010-1437 + * sparc64: Fix sun4u execute bit check in TSB I-TLB load. + - CVE-2010-1451 + * Btrfs: check for read permission on src file in the clone ioctl + - CVE-2010-1636 + * GFS2: Fix permissions checking for setflags ioctl() + - CVE-2010-1641 + * Btrfs: should add a permission check for setfacl + - CVE-2010-2071 + * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets + - CVE-2010-2492 + + -- Stefan Bader Sat, 31 Jul 2010 11:39:31 +0200 + +linux-fsl-imx51 (2.6.31-608.15) lucid-proposed; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-22.61 + * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958 + - LP: #570500, #576274 + + [ Bryan Wu ] + + * SAUCE: IMX51: fix stgl5000 regulator_get failing error + - LP: #567157 + + [ Mattias Walstrom ] + + * (pre-upstream) FEC: Fix kernel panic in fec_set_mac_address. + - LP: #575558 + + [ Upstream Kernel Changes ] + + * ENGR00120510 atlas switch mode control + * ENGR00120456 mx51: set VIOHI always on + * ENGR00121069: MX51: Complete the constraints for the various + regulators. + * ENGR00121385 MX51: Leave MC13892 VUSB Turned on for USB OTG to work + * netdev/fec: fix ifconfig eth0 down hang issue + - LP: #559065 + + [ Ubuntu: 2.6.31-22.61 ] + + * SAUCE: docs -- fix doc strings for fc_event_seq + * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958 + - LP: #570500, #576274 + * SAUCE: sched: update load count only once per cpu in 10 tick update + window + - LP: #513848 + * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume + - LP: #531309 + * PCI: Ensure we re-enable devices on resume + - LP: #566149 + + -- Stefan Bader Mon, 14 Jun 2010 11:58:42 +0200 + +linux-fsl-imx51 (2.6.31-608.14) lucid-security; urgency=low + + [ Stefan Bader ] + + * Rebase to 2.6.31-22.60 + + [ Ubuntu: 2.6.31-22.60 ] + + * kvm: restrict writing of segment selectors to segment registers + - CVE-2010-0419 + * USB: usbfs: properly clean up the as structure on error paths + - CVE-2010-1083 + * Bluetooth: Fix potential bad memory access with sysfs files + - CVE-2010-1084 + * ALSA: hda-intel: Avoid divide by zero crash + - CVE-2010-1085 + * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered + by an invalid Payload Pointer + - CVE-2010-1086 + * GFS2: Skip check for mandatory locks when unlocking + - CVE-2010-0727 + * tipc: Fix oops on send prior to entering networked mode (v3) + - CVE-2010-1187 + * inotify: do not reuse watch descriptors + - LP: #485556 + * idr: fix a critical misallocation bug, take#2 + - LP: #485556 + * tty: release_one_tty() forgets to put pids + - CVE-2010-1162 + * reiserfs: fix permissions on .reiserfs_priv + - CVE-2010-1146 + * fix LOOKUP_FOLLOW on automount "symlinks" + - CVE-2010-1088 + * NFS: Fix an Oops when truncating a file + - CVE-2010-1087 + * Attempt #2 to handle null nameidata + - CVE-2010-1148 + * r8169: Fix receive buffer length when MTU is between 1515 and 1536 + - CVE-2009-4537 + * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs) + - CVE-2009-4537 + * KVM: Use kvm_{read,write}_guest_virt() to read and write segment + descriptors + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check CPL level during privilege instruction + emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Add Virtual-8086 mode of emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: fix memory access during x86 emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Check IOPL level during io instruction emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86 emulator: Fix popf emulation + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: VMX: Use macros instead of hex value on cr0 initialization + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: SVM: Reset cr0 properly on vcpu reset + - CVE-2010-0298 + - CVE-2010-0306 + * KVM: x86: disable paravirt mmu reporting + - CVE-2010-0298 + - CVE-2010-0306 + + -- Stefan Bader Tue, 25 May 2010 17:54:29 +0000 + +linux-fsl-imx51 (2.6.31-607.13) lucid; urgency=low + + [ Bryan Wu ] + + * SAUCE: (upstream) netdev/fec: fix phy_speed caculating + - LP: #546649, #457878 + * SAUCE: (upstream) netdev/fec: fix performance impact from mdio poll + operation + - LP: #546649, #457878 + + -- Andy Whitcroft Wed, 14 Apr 2010 12:08:46 +0100 + +linux-fsl-imx51 (2.6.31-607.12) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-21.59 + + [ Ubuntu: 2.6.31-21.59 ] + + * [Config] generic-pae switch to M586TSC + - LP: #519448 + * (pre-stable) drm/i915: Increase fb alignment to 64k + - LP: #404064 + * Input: i8042 - bypass AUX IRQ delivery test on laptops + - LP: #534448 + * SAUCE: Fix volume hotkeys for Dell Studio 1557 + - LP: #465250 + * SAUCE: aufs: Fix header files inclusion in debug.h + - LP: #517151 + * [Config] Enable all CGROUP configuration options + - LP: #480739 + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + - LP: #509730 + * [Config] ext3 defaults to ordered mode + - LP: #510067 + * [Config] Fix sub-flavours package conflicts + - LP: #454827 + * PCI/cardbus: Add a fixup hook and fix powerpc + - LP: #455723 + * fnctl: f_modown should call write_lock_irqsave/restore + - LP: #519436 + * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C + - LP: #516325 + * tg3: Add 57788, remove 57720 + - LP: #515390 + * HID: ignore all recent SoundGraph iMON devices + - LP: #488443 + * Input: ALPS - add interleaved protocol support (Dell E6x00 series) + - LP: #296610 + * acerhdf: limit modalias matching to supported + - LP: #509730 + * ASoC: Do not write to invalid registers on the wm9712. + - LP: #509730 + * cifs: NULL out tcon, pSesInfo, and srvTcp pointers when chasing DFS + referrals + - LP: #509730 + * clockevents: Prevent clockevent_devices list corruption on cpu hotplug + - LP: #509730 + * dma: at_hdmac: correct incompatible type for argument 1 of + 'spin_lock_bh' + - LP: #509730 + * drivers/net/usb: Correct code taking the size of a pointer + - LP: #509730 + * Libertas: fix buffer overflow in lbs_get_essid() + - LP: #509730 + * md: Fix unfortunate interaction with evms + - LP: #509730 + * pata_cmd64x: fix overclocking of UDMA0-2 modes + - LP: #509730 + * pata_hpt3x2n: fix clock turnaround + - LP: #509730 + * SCSI: fc class: fix fc_transport_init error handling + - LP: #509730 + * sound: sgio2audio/pdaudiocf/usb-audio: initialize PCM buffer + - LP: #509730 + * USB: emi62: fix crash when trying to load EMI 6|2 firmware + - LP: #509730 + * USB: Fix a bug on appledisplay.c regarding signedness + - LP: #509730 + * USB: musb: gadget_ep0: avoid SetupEnd interrupt + - LP: #509730 + * USB: option: support hi speed for modem Haier CE100 + - LP: #490068, #509730 + * x86, cpuid: Add "volatile" to asm in native_cpuid() + - LP: #509730 + * e100: Use pci pool to work around GFP_ATOMIC order 5 memory allocation + failure + - LP: #509730 + * e100: Fix broken cbs accounting due to missing memset. + - LP: #509730 + * hostap: Revert a toxic part of the conversion to net_device_ops + - LP: #509730 + * hwmon: (fschmd) Fix check on unsigned in watchdog_write() + - LP: #509730 + * hwmon: (sht15) Off-by-one error in array index + incorrect constants + - LP: #509730 + * i2c/tsl2550: Fix lux value in extended mode + - LP: #509730 + * ipv6: reassembly: use seperate reassembly queues for conntrack and + local delivery + - LP: #509730 + * S390: dasd: support DIAG access for read-only devices + - LP: #509730 + * udf: Try harder when looking for VAT inode + - LP: #509730 + * V4L/DVB (13596): ov511.c typo: lock => unlock + - LP: #509730 + * x86/ptrace: make genregs[32]_get/set more robust + - LP: #509730 + * XFS bug in log recover with quota (bugzilla id 855) + - LP: #509730 + * generic_permission: MAY_OPEN is not write access + - LP: #509730 + * memcg: avoid oom-killing innocent task in case of use_hierarchy + - LP: #509730 + * Input: atkbd - add force relese key quirk for Samsung R59P/R60P/R61P + - LP: #253874, #509730 + * Add unlocked version of inode_add_bytes() function + - LP: #509730 + * ext4: fix sleep inside spinlock issue with quota and dealloc (#14739) + - LP: #509730 + * Linux 2.6.31.10 + - LP: #509730 + * Linux 2.6.31.11 + - LP: #509730 + * quota: decouple fs reserved space from quota reservation + - LP: #510674 + * ext4: Convert to generic reserved quota's space management. + - LP: #510674 + * hwmon: (adt7462) Fix pin 28 monitoring + - LP: #510674 + * netfilter: nf_ct_ftp: fix out of bounds read in update_nl_seq() + - LP: #510674 + * quota: Fix dquot_transfer for filesystems different from ext4 + - LP: #510674 + * fix braindamage in audit_tree.c untag_chunk() + - LP: #510674 + * fix more leaks in audit_tree.c tag_chunk() + - LP: #510674 + * ACPI: sleep: another HP DMI entry for init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: add DMI entry for SCI_EN resume quirk on HP dv4 + - LP: #453963, #510674 + * ACPI: sleep: another HP/Compaq DMI entries for + init_set_sci_en_on_resume + - LP: #453963, #510674 + * ACPI: DMI init_set_sci_en_on_resume for HP-Compaq C700 + - LP: #453963, #510674 + * Linux 2.6.31.12 + - LP: #510674 + + [ Ubuntu: 2.6.31-20.58 ] + + * Revert "[Upstream] e1000: enhance frame fragment detection" + - CVE-2009-4536 + * Revert "[Upstream] e1000e: enhance frame fragment detection" + - CVE-2009-4538 + * e1000: enhance frame fragment detection + - CVE-2009-4536 + * e1000/e1000e: don't use small hardware rx buffers + - CVE-2009-4536 + * e1000e: enhance frame fragment detection + - CVE-2009-4538 + * KVM: PIT: control word is write-only + - CVE-2010-0309 + * connector: Delete buggy notification code. + - CVE-2010-0410 + * Fix potential crash with sys_move_pages + - CVE-2010-0415 + * futex: Handle user space corruption gracefully + - CVE-2010-0622 + * futex_lock_pi() key refcnt fix + - CVE-2010-0623 + * Split 'flush_old_exec' into two functions + - CVE-2010-0307 + * Fix 'flush_old_exec()/setup_new_exec()' split + - CVE-2010-0307 + * x86: get rid of the insane TIF_ABI_PENDING bit + - CVE-2010-0307 + * powerpc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * sparc: TIF_ABI_PENDING bit removal + - CVE-2010-0307 + * x86: set_personality_ia32() misses force_personality32 + - CVE-2010-0307 + + -- Andy Whitcroft Wed, 31 Mar 2010 21:44:01 +0100 + +linux-fsl-imx51 (2.6.31-606.11) lucid; urgency=low + + [ Bryan Wu ] + + * [Config]: turn off CONFIG_FIXED_PHY for fsl-imx51 + - LP: #457878 + * [Config] built in SMSC_PHY driver for fsl-imx51 + - LP: #457878 + + [ Upstream Kernel Changes ] + + * netdev/fec.c: add phylib supporting to enable carrier detection + - LP: #457878 + * netdev/fec: fix compiling warning + - LP: #457878 + + -- Stefan Bader Fri, 26 Mar 2010 22:00:03 +0100 + +linux-fsl-imx51 (2.6.31-605.10) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * leds-mc13892: fix suspend/resume + - LP: #537083 + + -- Andy Whitcroft Fri, 19 Mar 2010 19:43:08 +0000 + +linux-fsl-imx51 (2.6.31-605.9) lucid; urgency=low + + [ Andy Whitcroft ] + + * Revert "include modules.builtin in the binary debs" + * include modules.builtin in the binary debs + + [ Bryan Wu ] + + * SAUCE: IMX51: skip ATA PASS THROUGH command for USB storage disk from + JMicron + - LP: #499881 + + [ Upstream Kernel Changes ] + + * ARM: 5677/1: ARM support for + TIF_RESTORE_SIGMASK/pselect6/ppoll/epoll_pwait + - LP: #319729 + * leds/mc13892: Use workqueue for setting LED brightness + - LP: #531696 + * ARM: 5882/1: ARM: Fix uncompress code compile for different defines of + flush(void) + - LP: #319240 + * ARM: 5884/1: arm: Fix DCC console for v7 + - LP: #319240 + * ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot() + - LP: #319240 + * ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work + - LP: #319240 + * ARM: 5888/1: arm: Update comments in cacheflush.h and remove + unnecessary V6 and V7 comments + - LP: #319240 + * arm: disable L2 cache in the v7 finish function + * arm: invalidate TLBs when enabling mmu + + -- Andy Whitcroft Tue, 09 Mar 2010 13:52:16 +0000 + +linux-fsl-imx51 (2.6.31-605.8) lucid; urgency=low + + [ Upstream Kernel Changes ] + + * ARM: VFP: add support to sync the VFP state of the current thread + - LP: #507503 + * ARM: VFP: preserve the HW context when calling signal handlers + - LP: #507503 + + -- Andy Whitcroft Tue, 23 Feb 2010 10:51:17 +0000 + +linux-fsl-imx51 (2.6.31-605.7) lucid; urgency=low + + [ Bryan Wu ] + + * Add 3 missing files to prerm remove file list + - LP: #345623, #415832 + + [ Loïc Minier ] + + * Add modules.builtin.bin to prerm rm list + - LP: #516584 + + [ Upstream Kernel Changes ] + + * Ubuntu: SAUCE: IMX51: Revert a BSP kernel ENGR00115370 patch which was + changed in latest BSP + * ENGR00119582 V4L2 capture:Fix race condition for accessing kernel + resource + * ENGR00119635 MX23 fix wrong state transition of enable lcd controller + * ENGR00119578 v4l2 output: fix fb setting for display 5 + * ENGR00116787 change pmic event handling method + * ENGR00119693 Uniform handling NFC INT bit clearance + * ENGR00119720 IPUv3:Fix wrong UV offset set in CPMEM when idmac crops + * ENGR00119847 [MX23_BSP] Support polled read/write for debug UART + * ENGR00119583 MX35: Add regulators' standby control + * ENGR00119710 MXC V4L2 output:Support YUYV and UYVY input pixel format + * ENGR00119034 V4L2 overlay:Use DP to do CSC for preview on DPFG + * ENGR00119899 Add FEC iomux config and PHY reset. + * ENGR00119975 IPUv3:Inform user when IDMAC UV-offset overflows + * ENGR00120126 mx51: add mem resources in platform device for gpu2d and + gpu3d. + * ENGR00120054 MX51: Increase VPU IRAM size to support decoder + * ENGR00116049-1 [imx23] Addition of FIQ system for chip errata/bo's + * ENGR00116049-2 [imx23] Addition of FIQ system for chip errata/bo's + * ENGR00119976 v4l2 output: use mannual buffer select for display channel + * ENGR00120370 v4l2 output: fix display fail for blank fb during video + play + * Ubuntu: SAUCE: IMX51: export symbol of ipu_clear_buffer_ready function + * syslog: distinguish between /proc/kmsg and syscalls + - LP: #515623 + + -- Andy Whitcroft Mon, 22 Feb 2010 15:52:35 +0000 + +linux-fsl-imx51 (2.6.31-604.6) lucid; urgency=low + + [ Andy Whitcroft ] + + * kbuild: generate modules.builtin + * include modules.builtin in the binary debs + * SAUCE: async_populate_rootfs: move rootfs init earlier + * rebase to Ubuntu-2.6.31-20.57 + + [ Bryan Wu ] + + * [Config] Enable CONFIG_THUMBEE for fsl-imx51 branch + * [Config] Enable CONFIG_DEBUG_KERNEL for ARM branch + - LP: #513241 + * [Config] Enable CONFIG_TIMER_STATS for fsl-imx51 kernel + - LP: #513241 + + [ Surbhi Palande ] + + * SAUCE: Make populate_rootfs asynchronous + + [ Ubuntu: 2.6.31-20.57 ] + + * SAUCE: x86: brk away from exec rand area + - LP: #452175 + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Samsung + Q210/P210 laptops + - LP: #385683 + * SAUCE: (drop after 2.6.31) input: Add hotkey quirk for Fujitsu Amilo + 1848+u + - LP: #458503 + * Revert "[Upstream] (drop after 2.6.31) acerhdf: fix fan control for + AOA150 model" + - LP: #494633 + * [Config] Disable CONFIG_USB_DEVICEFS + - LP: #488274 + * Revert "ext4: Don't update superblock write time when filesystem is + read-only" + - LP: #496816 + * Revert "ide: try to use PIO Mode 0 during probe if possible" + - LP: #503430 + * Revert "isdn: isdn_ppp: Use SKB list facilities instead of home-grown + implementation." + - LP: #503430 + * nilfs2: fix kernel oops in error case of nilfs_ioctl_move_blocks + - LP: #494633 + * cifs: don't use CIFSGetSrvInodeNumber in is_path_accessible + - LP: #494633 + * cifs: clean up handling when server doesn't consistently support inode + numbers + - LP: #494633 + * cifs: clear server inode number flag while autodisabling + - LP: #494633 + * CIFS: fix oops in cifs_lookup during net boot + - LP: #494633 + * CIFS: Duplicate data on appending to some Samba servers + - LP: #494633 + * rtl8187: Fix kernel oops when device is removed when LEDS enabled + - LP: #494633 + * md: don't clear endpoint for resync when resync is interrupted. + - LP: #494633 + * md/raid5: make sure curr_sync_completes is uptodate when reshape starts + - LP: #494633 + * md/raid1/raid10: add a cond_resched + - LP: #494633 + * ALSA: usb-audio: fix combine_word problem + - LP: #494633 + * ALSA: hda - Dell Studio 1557 hd-audio quirk + - LP: #494633 + * ALSA: AACI: fix AC97 multiple-open bug + - LP: #494633 + * ALSA: AACI: fix recording bug + - LP: #494633 + * jffs2: Fix memory corruption in jffs2_read_inode_range() + - LP: #494633 + * sound: rawmidi: disable active-sensing-on-close by default + - LP: #494633 + * sound: rawmidi: fix checking of O_APPEND when opening MIDI device + - LP: #494633 + * sound: rawmidi: fix double init when opening MIDI device with O_APPEND + - LP: #494633 + * sound: rawmidi: fix MIDI device O_APPEND error handling + - LP: #494633 + * highmem: Fix race in debug_kmap_atomic() which could cause warn_count + to underflow + - LP: #494633 + * highmem: Fix debug_kmap_atomic() to also handle KM_IRQ_PTE, KM_NMI, and + KM_NMI_PTE + - LP: #494633 + * powerpc: Fix DEBUG_HIGHMEM build break from d4515646699 + - LP: #494633 + * kmap: fix build errors with DEBUG_HIGHMEM enabled + - LP: #494633 + * V4L/DVB (13169): bttv: Fix potential out-of-order field processing + - LP: #494633 + * V4L/DVB (13170): bttv: Fix reversed polarity error when switching video + standard + - LP: #494633 + * V4L/DVB (13109): tda18271: fix signedness issue in + tda18271_rf_tracking_filters_init + - LP: #494633 + * V4L/DVB (13107): tda18271: fix overflow in FM radio frequency + calculation + - LP: #494633 + * V4L/DVB (13190): em28xx: fix panic that can occur when starting audio + streaming + - LP: #494633 + * V4L/DVB (13079): dib0700: fixed xc2028 firmware loading kernel oops + - LP: #494633 + * V4L/DVB (13230): s2255drv: Don't conditionalize video buffer completion + on waiting processes + - LP: #494633 + * uids: Prevent tear down race + - LP: #494633 + * pps: events reporting fix up + - LP: #494633 + * pps: locking scheme fix up for PPS_GETPARAMS + - LP: #494633 + * rtc: v3020: fix v3020_mmio_read_bit() + - LP: #494633 + * fs: add missing compat_ptr handling for FS_IOC_RESVSP ioctl + - LP: #494633 + * memcg: fix wrong pointer initialization at page migration when memcg is + disabled. + - LP: #494633 + * pidns: fix a leak in /proc dentries and inodes with pid namespaces. + - LP: #494633 + * page allocator: Do not allow interrupts to use ALLOC_HARDER + - LP: #494633 + * page allocator: always wake kswapd when restarting an allocation + attempt after direct reclaim failed + - LP: #494633 + * tty_port: If we are opened non blocking we still need to raise the + carrier + - LP: #494633 + * tty: cp210x: Fix carrier handling + - LP: #494633 + * USB: ohci: quirk AMD prefetch for USB 1.1 ISO transfer + - LP: #494633 + * USB: usbmon: fix bug in mon_buff_area_shrink + - LP: #494633 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #494633 + * USB: cdc_acm: Fix race condition when opening tty + - LP: #494633 + * USB: xhci: Fix bug memory free after failed initialization. + - LP: #494633 + * USB: xhci: Fix TRB physical to virtual address translation. + - LP: #494633 + * USB: xhci: Fix scratchpad deallocation. + - LP: #494633 + * iwlwifi: Use RTS/CTS as the preferred protection mechanism for 6000 + series + - LP: #494633 + * iwlwifi: Fix issue on file transfer stalled in HT mode + - LP: #494633 + * ima: replace GFP_KERNEL with GFP_NOFS + - LP: #494633 + * NFSv4: Fix a cache validation bug which causes getcwd() to return + ENOENT + - LP: #494633 + * fuse: reject O_DIRECT flag also in fuse_create + - LP: #494633 + * ASoC: Fix suspend with active audio streams + - LP: #494633 + * ASoC: AIC23: Fixing infinite loop in resume path + - LP: #494633 + * b43: Work around mac80211 race condition + - LP: #494633 + * rfkill: fix miscdev ops + - LP: #494633 + * thinkpad-acpi: fix sign of ERESTARTSYS return + - LP: #494633 + * Enable ACPI PDC handshake for VIA/Centaur CPUs + - LP: #494633 + * V4L/DVB (13436): cxusb: Fix hang on DViCO FusionHDTV DVB-T Dual Digital + 4 (rev 1) + - LP: #494633 + * V4L/DVB (13321): radio-gemtek-pci: fix double mutex_lock + - LP: #494633 + * V4L/DVB (12948): v4l1-compat: fix VIDIOC_G_STD handling + - LP: #494633 + * V4L/DVB (12280): gspca - sonixj: Remove auto gain/wb/expo for the + ov7660 sensor. + - LP: #494633 + * V4L/DVB (12356): gspca - sonixj: Webcam 0c45:6148 added + - LP: #494633 + * V4L/DVB (12501): gspca - sonixj: Do the ov7660 sensor work again. + - LP: #494633 + * V4L/DVB (12691): gspca - sonixj: Don't use mdelay(). + - LP: #494633 + * V4L/DVB (12696): gspca - sonixj / sn9c102: Two drivers for 0c45:60fc + and 0c45:613e. + - LP: #494633 + * drm/i915: Select CONFIG_SHMEM + - LP: #494633 + * drm: work around EDIDs with bad htotal/vtotal values + - LP: #494633, #460664 + * drm/i915: Fix IRQ stall issue on Ironlake + - LP: #494633 + * udp: Fix udp_poll() and ioctl() + - LP: #494633 + * acenic: Pass up error code from ace_load_firmware() + - LP: #494633 + * pkt_sched: pedit use proper struct + - LP: #494633 + * net: fix sk_forward_alloc corruption + - LP: #494633 + * bonding: Modify hash transmit policies to use the packet's source MAC + address + - LP: #494633 + * sfc: Set ip_summed correctly for page buffers passed to GRO + - LP: #494633 + * sparc64: replace parentheses in pmul() + - LP: #494633 + * sparc: Move of_set_property_mutex acquisition outside of devtree_lock + grab. + - LP: #494633 + * sched: Fix boot crash by zalloc()ing most of the cpu masks + - LP: #494633 + * sched: Fix isolcpus boot option + - LP: #494633 + * V4L/DVB (13202): smsusb: add autodetection support for three additional + Hauppauge USB IDs + - LP: #494633 + * V4L/DVB (13313): saa7134: add support for FORCE_TS_VALID mode for mpeg + ts input + - LP: #494633 + * V4L/DVB (13314): saa7134: set ts_force_val for the Hauppauge WinTV + HVR-1150 + - LP: #494633 + * speedstep-ich: fix error caused by + 394122ab144dae4b276d74644a2f11c44a60ac5c + - LP: #494633 + * USB: EHCI: don't send Clear-TT-Buffer following a STALL + - LP: #494633 + * USB: musb_gadget: fix STALL handling + - LP: #494633 + * usb: amd5536udc: fixed shared interrupt bug and warning oops + - LP: #494633 + * USB: ftdi_sio: Keep going when write errors are encountered. + - LP: #494633 + * USB: work around for EHCI with quirky periodic schedules + - LP: #435352, #494633 + * tty_port: handle the nonblocking open of a dead port corner case + - LP: #494633 + * pxamci: call mmc_remove_host() before freeing resources + - LP: #494633 + * param: don't complain about unused module parameters. + - LP: #494633 + * modules: don't export section names of empty sections via sysfs + - LP: #494633 + * md: revert incorrect fix for read error handling in raid1. + - LP: #494633 + * perf_event: Adjust frequency and unthrottle for non-group-leader events + - LP: #494633 + * hso: fix soft-lockup + - LP: #494633 + * block: use after free bug in __blkdev_get + - LP: #494633 + * hwmon: (adt7475) Fix temperature fault flags + - LP: #494633 + * hwmon: (adt7475) Cache limits for 60 seconds + - LP: #494633 + * agp/intel: new host bridge support + - LP: #494633 + * netfilter: nf_nat: fix NAT issue in 2.6.30.4+ + - LP: #494633 + * netfilter: xt_connlimit: fix regression caused by zero family value + - LP: #494633 + * b43: Fix DMA TX bounce buffer copying + - LP: #494633 + * crypto: padlock-aes - Use the correct mask when checking whether + copying is required + - LP: #494633 + * sky2: set carrier off in probe + - LP: #494633 + * ath5k: Linear PCDAC code fixes + - LP: #494633 + * i2c: Fix userspace_device list corruption + - LP: #494633 + * acerhdf: fix fan control for AOA150 model + - LP: #494633 + * drm/fb: fix FBIOGET/PUT_VSCREENINFO pixel clock handling + - LP: #494633 + * tty/of_serial: add missing ns16550a id + - LP: #494633 + * V4L/DVB (13255): gspca - m5602-s5k4aa: Add vflip quirk for the + Bruneinit laptop + - LP: #494633 + * V4L/DVB (13256): gspca - m5602-s5k4aa: Add another MSI GX700 vflip + quirk + - LP: #494633 + * V4L/DVB (13257): gspca - m5602-s5k4aa: Add vflip for Fujitsu Amilo Xi + 2528 + - LP: #494633 + * PCI: Prevent AER driver from being loaded on non-root port PCIE devices + - LP: #494633 + * acerhdf: additional BIOS versions + - LP: #494633 + * acerhdf: return temperature in milidegree instead of degree + - LP: #494633 + * Input: keyboard - fix braille keyboard keysym generation + - LP: #494633 + * Linux 2.6.31.7 + - LP: #494633 + * ext4: Fix memory leak fix when mounting an ext4 filesystem + - LP: #496816 + * jbd2: Fail to load a journal if it is too short + - LP: #496816 + * jbd2: round commit timer up to avoid uncommitted transaction + - LP: #496816 + * ext4: fix journal ref count in move_extent_par_page + - LP: #496816 + * ext4: Fix bugs in mballoc's stream allocation mode + - LP: #496816 + * ext4: Avoid group preallocation for closed files + - LP: #496816 + * jbd2: Annotate transaction start also for jbd2_journal_restart() + - LP: #496816 + * ext4: Fix possible deadlock between ext4_truncate() and + ext4_get_blocks() + - LP: #496816 + * ext4: reject too-large filesystems on 32-bit kernels + - LP: #496816 + * ext4: Add feature set check helper for mount & remount paths + - LP: #496816 + * ext4: Add missing unlock_new_inode() call in extent migration code + - LP: #496816 + * ext4: Allow rename to create more than EXT4_LINK_MAX subdirectories + - LP: #496816 + * ext4: Limit number of links that can be created by ext4_link() + - LP: #496816 + * ext4: Restore wbc->range_start in ext4_da_writepages() + - LP: #496816 + * ext4: fix cache flush in ext4_sync_file + - LP: #496816 + * ext4: Fix wrong comparisons in mext_check_arguments() + - LP: #496816 + * ext4: Remove unneeded BUG_ON() in ext4_move_extents() + - LP: #496816 + * ext4: Return exchanged blocks count to user space in failure + - LP: #496816 + * ext4: Take page lock before looking at attached buffer_heads flags + - LP: #496816 + * ext4: print more sysadmin-friendly message in check_block_validity() + - LP: #496816 + * ext4: Use bforget() in no journal mode for + ext4_journal_{forget,revoke}() + - LP: #496816 + * ext4: Assure that metadata blocks are written during fsync in no + journal mode + - LP: #496816 + * ext4: Make non-journal fsync work properly + - LP: #496816 + * ext4: move ext4_mb_init_group() function earlier in the mballoc.c + - LP: #496816 + * ext4: check for need init flag in ext4_mb_load_buddy + - LP: #496816 + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #496816 + * ext4: Always set dx_node's fake_dirent explicitly. + - LP: #496816 + * ext4: Fix initalization of s_flex_groups + - LP: #496816 + * ext4: Fix include/trace/events/ext4.h to work with Systemtap + - LP: #496816 + * ext4: Fix small typo for move_extent_per_page() + - LP: #496816 + * ext4: Replace get_ext_path macro with an inline funciton + - LP: #496816 + * ext4: Replace BUG_ON() with ext4_error() in move_extents.c + - LP: #496816 + * ext4: Add null extent check to ext_get_path + - LP: #496816 + * ext4: Fix different block exchange issue in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: limit block allocations for indirect-block files to < 2^32 + - LP: #496816 + * ext4: store EXT4_EXT_MIGRATE in i_state instead of i_flags + - LP: #496816 + * ext4: Fix the alloc on close after a truncate hueristic + - LP: #496816 + * ext4: Fix hueristic which avoids group preallocation for closed files + - LP: #496816 + * ext4: Adjust ext4_da_writepages() to write out larger contiguous chunks + - LP: #496816 + * ext4: release reserved quota when block reservation for delalloc retry + - LP: #496816 + * ext4: Split uninitialized extents for direct I/O + - LP: #496816 + * ext4: Use end_io callback to avoid direct I/O fallback to buffered I/O + - LP: #496816 + * ext4: async direct IO for holes and fallocate support + - LP: #496816 + * ext4: EXT4_IOC_MOVE_EXT: Check for different original and donor inodes + first + - LP: #496816 + * ext4: Avoid updating the inode table bh twice in no journal mode + - LP: #496816 + * ext4: Make sure ext4_dirty_inode() updates the inode in no journal mode + - LP: #496816 + * ext4: Handle nested ext4_journal_start/stop calls without a journal + - LP: #496816 + * ext4: Fix time encoding with extra epoch bits + - LP: #496816 + * ext4: fix a BUG_ON crash by checking that page has buffers attached to + it + - LP: #496816 + * ext4: retry failed direct IO allocations + - LP: #496816 + * ext4: discard preallocation when restarting a transaction during + truncate + - LP: #496816 + * ext4: fix ext4_ext_direct_IO()'s return value after converting uninit + extents + - LP: #496816 + * ext4: skip conversion of uninit extents after direct IO if there isn't + any + - LP: #496816 + * ext4: code clean up for dio fallocate handling + - LP: #496816 + * ext4: Fix return value of ext4_split_unwritten_extents() to fix direct + I/O + - LP: #496816 + * ext4: fix potential buffer head leak when add_dirent_to_buf() returns + ENOSPC + - LP: #496816 + * ext4: avoid divide by zero when trying to mount a corrupted file system + - LP: #496816 + * ext4: fix the returned block count if EXT4_IOC_MOVE_EXT fails + - LP: #496816 + * ext4: fix lock order problem in ext4_move_extents() + - LP: #496816 + * ext4: fix possible recursive locking warning in EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: plug a buffer_head leak in an error path of ext4_iget() + - LP: #496816 + * ext4: make sure directory and symlink blocks are revoked + - LP: #496816 + * ext4: fix i_flags access in ext4_da_writepages_trans_blocks() + - LP: #496816 + * ext4: journal all modifications in ext4_xattr_set_handle + - LP: #496816 + * ext4: don't update the superblock in ext4_statfs() + - LP: #496816 + * ext4: fix uninit block bitmap initialization when s_meta_first_bg is + non-zero + - LP: #496816 + * ext4: fix block validity checks so they work correctly with meta_bg + - LP: #496816 + * ext4: avoid issuing unnecessary barriers + - LP: #496816 + * ext4: fix error handling in ext4_ind_get_blocks() + - LP: #496816 + * ext4: make trim/discard optional (and off by default) + - LP: #496816 + * ext4: make "norecovery" an alias for "noload" + - LP: #496816 + * ext4: Fix double-free of blocks with EXT4_IOC_MOVE_EXT + - LP: #496816 + * ext4: initialize moved_len before calling ext4_move_extents() + - LP: #496816 + * ext4: move_extent_per_page() cleanup + - LP: #496816 + * jbd2: Add ENOMEM checking in and for + jbd2_journal_write_metadata_buffer() + - LP: #496816 + * ext4: Return the PTR_ERR of the correct pointer in + setup_new_group_blocks() + - LP: #496816 + * ext4: Avoid data / filesystem corruption when write fails to copy data + - LP: #496816 + * ext4: wait for log to commit when umounting + - LP: #496816 + * ext4: remove blocks from inode prealloc list on failure + - LP: #496816 + * ext4: ext4_get_reserved_space() must return bytes instead of blocks + - LP: #496816 + * ext4: quota macros cleanup + - LP: #496816 + * ext4: fix incorrect block reservation on quota transfer. + - LP: #496816 + * ext4: Wait for proper transaction commit on fsync + - LP: #496816 + * SCSI: megaraid_sas: fix 64 bit sense pointer truncation + - LP: #496816 + * SCSI: osd_protocol.h: Add missing #include + - LP: #496816 + * SCSI: scsi_lib_dma: fix bug with dma maps on nested scsi objects + - LP: #496816 + * signal: Fix alternate signal stack check + - LP: #496816 + * ext4: Fix potential fiemap deadlock (mmap_sem vs. i_data_sem) + - LP: #496816 + * Linux 2.6.31.8 + - LP: #496816 + * USB: option: add pid for ZTE + - LP: #503430 + * USB: usb-storage: fix bug in fill_inquiry + - LP: #503430 + * firewire: ohci: handle receive packets with a data length of zero + - LP: #503430 + * ALSA: hda - Terradici HDA controllers does not support 64-bit mode + - LP: #503430 + * ALSA: hrtimer - Fix lock-up + - LP: #503430 + * ath5k: allow setting txpower to 0 + - LP: #503430 + * ath5k: enable EEPROM checksum check + - LP: #503430 + * bsdacct: fix uid/gid misreporting + - LP: #503430 + * debugfs: fix create mutex racy fops and private data + - LP: #503430 + * devpts_get_tty() should validate inode + - LP: #503430 + * futex: Take mmap_sem for get_user_pages in fault_in_user_writeable + - LP: #503430 + * hfs: fix a potential buffer overflow + - LP: #503430 + * hrtimer: Fix /proc/timer_list regression + - LP: #503430 + * jbd2: don't wipe the journal on a failed journal checksum + - LP: #503430 + * KVM: s390: Make psw available on all exits, not just a subset + - LP: #503430 + * md/bitmap: protect against bitmap removal while being updated. + - LP: #503430 + * pata_hpt{37x|3x2n}: fix timing register masks (take 2) + - LP: #503430 + * pxa/em-x270: fix usb hub power up/reset sequence + - LP: #503430 + * ssb: Fix range check in sprom write + - LP: #503430 + * SUNRPC: IS_ERR/PTR_ERR confusion + - LP: #503430 + * USB: Close usb_find_interface race v3 + - LP: #503430 + * USB: musb_gadget_ep0: fix unhandled endpoint 0 IRQs, again + - LP: #503430 + * USB: option.c: add support for D-Link DWM-162-U5 + - LP: #503430 + * USB: usb-storage: add BAD_SENSE flag + - LP: #503430 + * USB: usbtmc: repeat usb_bulk_msg until whole message is transfered + - LP: #503430 + * V4L/DVB: Fix test in copy_reg_bits() + - LP: #503430 + * x86: Add new Intel CPU cache size descriptors + - LP: #503430 + * x86/amd-iommu: attach devices to pre-allocated domains early + - LP: #503430 + * x86/amd-iommu: un__init iommu_setup_msi + - LP: #503430 + * x86, apic: Enable lapic nmi watchdog on AMD Family 11h + - LP: #503430 + * x86: ASUS P4S800 reboot=bios quirk + - LP: #366682, #503430 + * x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking + up the PCI tree + - LP: #503430 + * x86: Fix iommu=nodac parameter handling + - LP: #503430 + * x86: Fix typo in Intel CPU cache size descriptor + - LP: #503430 + * x86: GART: pci-gart_64.c: Use correct length in strncmp + - LP: #503430 + * drm/radeon/kms: Add quirk for HIS X1300 board + - LP: #503430 + * drm/radeon/kms: fix legacy crtc2 dpms + - LP: #503430 + * mac80211: Fix bug in computing crc over dynamic IEs in beacon + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in mincore() + - LP: #503430 + * mm: hugetlb: fix hugepage memory leak in walk_page_range() + - LP: #503430 + * powerpc: Fix usage of 64-bit instruction in 32-bit altivec code + - LP: #503430 + * Serial: Do not read IIR in serial8250_start_tx when UART_BUG_TXEN + - LP: #503430 + * ide: Serialize CMD643 and CMD646 to fix a hardware bug with SSD + - LP: #503430 + * ide: fix ioctl to pass requested transfer mode to ide_find_dma_mode + instead of UDMA6 + - LP: #503430 + * slc90e66: fix UDMA handling + - LP: #503430 + * Au1x00: fix crash when trying register_netdev() + - LP: #503430 + * b44 WOL setup: one-bit-off stack corruption kernel panic fix + - LP: #503430 + * b44: Fix wedge when using netconsole. + - LP: #503430 + * gro: Fix illegal merging of trailer trash + - LP: #503430 + * ip_fragment: also adjust skb->truesize for packets not owned by a + socket + - LP: #503430 + * net: Fix the rollback test in dev_change_name() + - LP: #503430 + * NET: smc91x: Fix irq flags + - LP: #503430 + * smsc9420: prevent BUG() if ethtool is called with interface down + - LP: #503430 + * vlan: Fix register_vlan_dev() error path + - LP: #503430 + * sparc64: Fix definition of VMEMMAP_SIZE. + - LP: #503430 + * sunsab: Do not set sunsab_reg.cons right before registering minors. + - LP: #503430 + * sunsu: Fix detection of SU ports which are RSC console or control. + - LP: #503430 + * serial: suncore: Add 'ignore_line' argument to + sunserial_console_match(). + - LP: #503430 + * serial: suncore: Fix RSC/LOM handling in sunserial_console_termios(). + - LP: #503430 + * sunsu: Pass true 'ignore_line' to console match when RSC or LOM + console. + - LP: #503430 + * sunsu: Use sunserial_console_termios() in sunsu_console_setup(). + - LP: #503430 + * sparc64: Don't specify IRQF_SHARED for LDC interrupts. + - LP: #503430 + * sparc64: Fix overly strict range type matching for PCI devices. + - LP: #503430 + * sparc64: Fix stack debugging IRQ stack regression. + - LP: #503430 + * sparc: Set UTS_MACHINE correctly. + - LP: #503430 + * x86/mce: Set up timer unconditionally + - LP: #503430 + * b43legacy: avoid PPC fault during resume + - LP: #503430 + * p54usb: Remove DMA buffer from stack + - LP: #503430 + * x86: Under BIOS control, restore AP's APIC_LVTTHMR to the BSP value + - LP: #503430 + * ACPI: Use the ARB_DISABLE for the CPU which model id is less than 0x0f. + - LP: #503430, #481765 + * asus-laptop: change light sens default values. + - LP: #503430 + * backlight: lcd - Fix wrong sizeof + - LP: #503430 + * drm/i915: Avoid NULL dereference with component_only tv_modes + - LP: #503430, #494045 + * drm/i915: Fix CRT hotplug detect by checking really no channels + attached + - LP: #503430 + * drm/i915: Fix LVDS stability issue on Ironlake + - LP: #503430 + * drm/i915: save/restore BLC histogram control reg across suspend/resume + - LP: #503430, #292256 + * drm/i915: PineView only has LVDS and CRT ports + - LP: #503430 + * ext3: Fix data / filesystem corruption when write fails to copy data + - LP: #503430 + * ipvs: zero usvc and udest + - LP: #503430 + * ipw2100: fix rebooting hang with driver loaded + - LP: #503430 + * jffs2: Fix long-standing bug with symlink garbage collection. + - LP: #503430 + * matroxfb: fix problems with display stability + - LP: #503430 + * net: Fix userspace RTM_NEWLINK notifications. + - LP: #503430 + * thinkpad-acpi: fix default brightness_mode for R50e/R51 + - LP: #503430 + * thinkpad-acpi: preserve rfkill state across suspend/resume + - LP: #503430 + * V4L/DVB (13116): gspca - ov519: Webcam 041e:4067 added. + - LP: #503430 + * powerpc/therm_adt746x: Record pwm invert bit at module load time] + - LP: #503430 + * drm/i915: Fix sync to vblank when VGA output is turned off + - LP: #503430, #494461 + * Linux 2.6.31.9 + - LP: #503430 + * drm/i915: Refactor save/restore code + - LP: #504273 + * drm/i915: Ironlake suspend/resume support + - LP: #504273 + * drm/i915: Fix and cleanup DPLL calculation for Ironlake + - LP: #504273 + * drm/i915: HDMI hardware workaround for Ironlake + - LP: #504273 + * drm/i915: Add more registers save/restore for Ironlake suspend + - LP: #504273 + * drm/i915: Add ACPI OpRegion support for Ironlake + - LP: #504273 + * drm/i915: Add display hotplug event on Ironlake + - LP: #504273 + * cdc_ether: additional Ericsson MBM PID's to the whitelist + - LP: #476071 + * drm/i915: remove loop in Ironlake interrupt handler + - LP: #510722 + * modules: Skip empty sections when exporting section notes + - LP: #511129 + * ath5k: Fix eeprom checksum check for custom sized eeproms + - LP: #506180 + + [ Ubuntu: 2.6.31-19.56 ] + + * [Upstream] e1000: enhance frame fragment detection + - CVE-2009-4536 + * [Upstream] e1000e: enhance frame fragment detection + - CVE-2009-4538 + * hfs: fix a potential buffer overflow + - CVE-2009-4020 + * KVM: x86 emulator: limit instructions to 15 bytes + - CVE-2009-4031 + * ext4: Avoid null pointer dereference when decoding EROFS w/o a journal + - CVE-2009-4308 + * firewire: ohci: handle receive packets with a data length of zero + - CVE-2009-4138 + * fasync: split 'fasync_helper()' into separate add/remove functions + - CVE-2009-4141 + * ipv6: skb_dst() can be NULL in ipv6_hop_jumbo(). + - CVE-2010-0006 + * kernel/signal.c: fix kernel information leak with print-fatal-signals=1 + - CVE-2010-0003 + * netfilter: ebtables: enforce CAP_NET_ADMIN + - CVE-2010-0007 + * untangle the do_mremap() mess + - CVE-2010-0291 + + -- Andy Whitcroft Tue, 09 Feb 2010 10:44:08 +0000 + +linux-fsl-imx51 (2.6.31-603.5) lucid; urgency=low + + [ Bryan Wu ] + + * [Config] Enable devtmpfs for fsl-imx51 kernel + - LP: #512321 + * SAUCE: IMX51: only export NEON flag to userspace on Freescale iMX51 + rev3.x or later silicon + - LP: #507416 + + [ Heiko Carstens ] + + * (pre-stable) driver-core: fix devtmpfs crash on s390 + - LP: #512370 + + [ Kay Sievers ] + + * (pre-stable) Driver-Core: devtmpfs - set root directory mode to 0755 + - LP: #512370 + + [ Upstream Kernel Changes ] + + * ENGR00119069 V4L2 capture: Do not change current crop setting for tvin. + * ENGR00118830 Update NAND driver scan scheme to support new nand type + * ENGR00118946 imx23: enable wake up from USB 5V + * ENGR00119150 Bluetooth: Handsfree audio has noise + * ENGR00118610 MX23: Add double buffering for PXP + * ENGR00118872 Write bootstream to kernel by kobs with BCH ECC + * ENGR00119199: ipu: add clock nodes for pixel clocks + * ENGR00119202: Fix DVFS-PER related bugs. + * ENGR00119203 MX23: Correct VDDD value for CPU frequency 360 MHz + * ENGR00119004 v4l2 output: fix kernel dump + * ENGR00119242 Add wait timeout support to void dead loop in NAND driver + * ENGR00119263: MX51 : Fix pll_set_rate function + * ENGR00119075 fix iMX23 USB initialization cause wrong power status + * ENGR00118892 MX23: iMX233 disable lcd clock when LCD off + * ENGR00119063 MX23: fix system halt rather than reboot when watchdog + timeout + * ENGR00119324 Put GPMI NAND flash scan scheme code to the common NAND + directory + * ENGR00114151 800x600-16@60 video not play correctly + * ENGR00119275 ipuv3: dmfc size control + * ENGR00119443 [MX23_BSP] GPMI driver computes wrong block size for + K9GAG08U0D + * ENGR00119136 ipuv3: support 720p for ipu lib + * ENGR00119274 TVE: HDTV can not work + * ENGR00119104 MX23 ALSA: Resolve the problem of record from line-in + * ENGR00119081 V4l2 capture:Support NV12 output pixel format for still + capture + * ENGR00119179 TVE: fix system hang for tvout + * ENGR00119070 IPUv3 FB:Support DP local alpha in pixel + * ENGR00119432 MX35 system can't re-boot up when SD/MMC boot is used. + * ENGR00119296 Fix iMX23 display abnormal when change frequency + * ENGR00119484 Update NFC INT wait timeout value to 1s + * ENGR00119504 MX25: Change nand partition for bootloader to 3M byte + * ENGR00119532 MX35: Change nand partition for bootloader to 3M bytes + * ENGR00119305 imx23: fix ethernet standby issue + * ENGR00115370 ipuv3: add display control + * ENGR00119531 ipuv3: dmfc setting restore during resume + * Driver Core: devtmpfs - kernel-maintained tmpfs-based /dev + - LP: #512321 + + -- Andy Whitcroft Wed, 27 Jan 2010 10:30:45 +0000 + +linux-fsl-imx51 (2.6.31-602.4) lucid; urgency=low + + [ Amit Kucheria ] + + * Update to official 2.6.31 BSP release from Freescale + + [ Andy Whitcroft ] + + * drop a number of modules no longer built + + [ Bryan Wu ] + + * [Config] Update configs after applying .31 patchset from Freescale + * [Config] Sync with imx51_defconfig from Freescale BSP + + [ Upstream Kernel Changes ] + + * Update to official 2.6.31 BSP release from Freescale. + + -- Andy Whitcroft Mon, 11 Jan 2010 16:26:27 +0000 + +linux-fsl-imx51 (2.6.31-601.3) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-17.54 + + [ Dinh Nguyen ] + + * SAUCE: Workaround for SATA drive failure on Ubuntu installation + - LP: #431963 + + [ Ubuntu: 2.6.31-17.54 ] + + * security merge of Ubuntu-2.6.31-16.53 + + [ Ubuntu: 2.6.31-16.53 ] + + * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT + - LP: #492659 + - CVE-2009-4131 + + -- Andy Whitcroft Wed, 16 Dec 2009 11:59:38 +0000 + +linux-fsl-imx51 (2.6.31-601.2) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-17.53 + + [ Ubuntu: 2.6.31-17.53 ] + + * SAUCE: AppArmor: Fix oops after profile removal + - LP: #475619 + * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds + - LP: #437258 + * SAUCE: AppArmor: Fix cap audit_caching preemption disabling + - LP: #479102 + * SAUCE: AppArmor: Fix refcounting bug causing leak of creds + - LP: #479115 + * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe + transition. + - LP: #480112 + * Revert "[Upstream] (drop after 2.6.31) usb-storage: Workaround devices + with bogus sense size" + - LP: #461556 + * Revert "[Upstream] (drop after 2.6.31) Input: synaptics - add another + Protege M300 to rate blacklist" + - LP: #480144 + * [Config] udeb: Add squashfs to fs-core-modules + - LP: #352615 + * Revert "e1000e: swap max hw supported frame size between 82574 and + 82583" + - LP: #461556 + * Revert "drm/i915: Fix FDI M/N setting according with correct color + depth" + - LP: #480144 + * Revert "agp/intel: Add B43 chipset support" + - LP: #480144 + * Revert "drm/i915: add B43 chipset support" + - LP: #480144 + * Revert "ACPI: Attach the ACPI device to the ACPI handle as early as + possible" + - LP: #327499, #480144 + * SCSI: Retry ADD_TO_MLQUEUE return value for EH commands + - LP: #461556 + * SCSI: Fix protection scsi_data_buffer leak + - LP: #461556 + * SCSI: sg: Free data buffers after calling blk_rq_unmap_user + - LP: #461556 + * ARM: pxa: workaround errata #37 by not using half turbo switching + - LP: #461556 + * tracing/filters: Fix memory leak when setting a filter + - LP: #461556 + * x86/paravirt: Use normal calling sequences for irq enable/disable + - LP: #461556 + * USB: ftdi_sio: remove tty->low_latency + - LP: #461556 + * USB: ftdi_sio: remove unused rx_byte counter + - LP: #461556 + * USB: ftdi_sio: clean up read completion handler + - LP: #461556 + * USB: ftdi_sio: re-implement read processing + - LP: #461556 + * USB: pl2303: fix error characters not being reported to ldisc + - LP: #461556 + * USB: digi_acceleport: Fix broken unthrottle. + - LP: #461556 + * USB: serial: don't call release without attach + - LP: #461556 + * USB: option: Toshiba G450 device id + - LP: #461556 + * USB: ipaq: fix oops when device is plugged in + - LP: #461556 + * USB: cp210x: Add support for the DW700 UART + - LP: #461556 + * USB: Fix throttling in generic usbserial driver + - LP: #461556 + * USB: storage: When a device returns no sense data, call it a Hardware + Error + - LP: #400652, #461556 + * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0 + - LP: #461556 + * intel-iommu: Cope with broken HP DC7900 BIOS + - LP: #461556 + * futex: Detect mismatched requeue targets + - LP: #461556 + * futex: Fix wakeup race by setting TASK_INTERRUPTIBLE before queue_me() + - LP: #461556 + * tpm-fixup-pcrs-sysfs-file-update + - LP: #461556 + * TPM: fix pcrread + - LP: #461556 + * Bluetooth: Disconnect HIDRAW devices on disconnect + - LP: #461556 + * Bluetooth: Add extra device reference counting for connections + - LP: #461556 + * Bluetooth: Let HIDP grab the device reference for connections + - LP: #461556 + * connector: Keep the skb in cn_callback_data + - LP: #461556 + * connector: Provide the sender's credentials to the callback + - LP: #461556 + * connector: Removed the destruct_data callback since it is always + kfree_skb() + - LP: #461556 + * dm/connector: Only process connector packages from privileged processes + - LP: #461556 + * dst/connector: Disallow unpliviged users to configure dst + - LP: #461556 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - LP: #461556 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - LP: #461556 + * e1000e: swap max hw supported frame size between 82574 and 82583 + - LP: #461556, #445572 + * MAINTAINERS: Fix Riku Voipio's address + - LP: #461556 + * macintosh: Don't assume i2c device probing always succeeds + - LP: #461556 + * i2c: Hide probe errors caused by ACPI resource conflicts + - LP: #461556 + * ALSA: Don't assume i2c device probing always succeeds + - LP: #461556 + * bsdacct: switch credentials for writing to the accounting file + - LP: #461556 + * sysfs: Allow sysfs_notify_dirent to be called from interrupt context. + - LP: #461556 + * Staging: rt2860sta: prevent a panic when disabling when associated + - LP: #461556, #404626 + * usb-storage: Workaround devices with bogus sense size + - LP: #461556, #446146 + * iwlwifi: incorrect method used for finding valid OTP blocks + - LP: #461556 + * mac80211: fix vlan and optimise RX + - LP: #461556 + * tty: Make flush_to_ldisc() locking more robust + - LP: #461556 + * Linux 2.6.31.5 + - LP: #461556 + * fs: pipe.c null pointer dereference + - LP: #480144 + * pci: increase alignment to make more space for hidden code + - LP: #407824, #480144, #474577 + * libata: fix internal command failure handling + - LP: #480144 + * libata: fix PMP initialization + - LP: #480144 + * sata_nv: make sure link is brough up online when skipping hardreset + - LP: #480144 + * nfs: Fix nfs_parse_mount_options() kfree() leak + - LP: #480144 + * KVM: use proper hrtimer function to retrieve expiration time + - LP: #480144 + * KVM: ignore reads from AMDs C1E enabled MSR + - LP: #480144 + * futex: Handle spurious wake up + - LP: #480144 + * futex: Check for NULL keys in match_futex + - LP: #480144 + * futex: Move drop_futex_key_refs out of spinlock'ed region + - LP: #480144 + * futex: Fix spurious wakeup for requeue_pi really + - LP: #480144 + * ahci: revert "Restore SB600 sata controller 64 bit DMA" + - LP: #480144 + * sparc64: Set IRQF_DISABLED on LDC channel IRQs. + - LP: #480144 + * watchdog: Fix rio watchdog probe function + - LP: #480144 + * Input: synaptics - add another Protege M300 to rate blacklist + - LP: #480144 + * dm snapshot: free exception store on init failure + - LP: #480144 + * dm snapshot: sort by chunk size to fix race + - LP: #480144 + * dm log: userspace fix incorrect luid cast in userspace_ctr + - LP: #480144 + * dm: add missing del_gendisk to alloc_dev error path + - LP: #480144 + * dm: dec_pending needs locking to save error value + - LP: #480144 + * dm exception store: fix failed set_chunk_size error path + - LP: #480144 + * dm snapshot: lock snapshot while supplying status + - LP: #480144 + * dm snapshot: require non zero chunk size by end of ctr + - LP: #480144 + * dm snapshot: use unsigned integer chunk size + - LP: #480144 + * ray_cs: Fix copy_from_user handling + - LP: #480144 + * mbind(): fix leak of never putback pages + - LP: #480144 + * do_mbind(): fix memory leak + - LP: #480144 + * 8250_pci: add IBM Saturn serial card + - LP: #480144 + * dpt_i2o: Fix up copy*user + - LP: #480144 + * dpt_i2o: Fix typo of EINVAL + - LP: #480144 + * hfsplus: refuse to mount volumes larger than 2TB + - LP: #480144 + * Driver core: fix driver_register() return value + - LP: #480144 + * param: fix lots of bugs with writing charp params from sysfs, by + leaking mem. + - LP: #480144 + * param: fix NULL comparison on oom + - LP: #480144 + * param: fix setting arrays of bool + - LP: #480144 + * USB: serial: sierra driver send_setup() autopm fix + - LP: #480144 + * USB: option: Patch for Huawei Mobile Broadband E270+ Modem + - LP: #480144 + * USB: option: Support for AIRPLUS MCD650 Datacard + - LP: #480144 + * USB: option: TLAYTECH TUE800 support + - LP: #456264, #480144 + * libertas if_usb: Fix crash on 64-bit machines + - LP: #480144 + * cpuidle: always return with interrupts enabled + - LP: #480144 + * virtio: order used ring after used index read + - LP: #480144 + * CIFS: Fixing to avoid invalid kfree() in cifs_get_tcp_session() + - LP: #480144 + * mac80211: fix for incorrect sequence number on hostapd injected frames + - LP: #480144 + * mac80211: check interface is down before type change + - LP: #480144 + * x86, UV: Fix information in __uv_hub_info structure + - LP: #480144 + * x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi() + - LP: #480144 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - LP: #480144 + * mm: remove incorrect swap_count() from try_to_unuse() + - LP: #480144 + * x86-64: Fix register leak in 32-bit syscall audting + - LP: #480144 + * nilfs2: fix dirty page accounting leak causing hang at write + - LP: #480144 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #480144 + * drm/i915: fix to setup display reference clock control on Ironlake + - LP: #480144 + * drm/i915: fix panel fitting filter coefficient select for Ironlake + - LP: #480144 + * agp/intel: Add B43 chipset support + - LP: #480144 + * drm/i915: add B43 chipset support + - LP: #480144 + * xen/hvc: make sure console output is always emitted, with explicit + polling + - LP: #480144 + * xen: mask extended topology info in cpuid + - LP: #480144 + * sgi-gru: decrapfiy options_write() function + - LP: #480144 + * KVM: get_tss_base_addr() should return a gpa_t + - LP: #480144 + * fuse: prevent fuse_put_request on invalid pointer + - LP: #480144 + * fuse: fix kunmap in fuse_ioctl_copy_user + - LP: #480144 + * x86/amd-iommu: Workaround for erratum 63 + - LP: #480144 + * fsnotify: do not set group for a mark before it is on the i_list + - LP: #480144 + * mips: fix build of vmlinux.lds + - LP: #480144 + * alpha: fix build after vmlinux.lds.S cleanup + - LP: #480144 + * ACPI / PCI: Fix NULL pointer dereference in acpi_get_pci_dev() (rev. 2) + - LP: #480144 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - LP: #480144 + * b43: Fix Bugzilla #14181 and the bug from the previous 'fix' + - LP: #476154, #480144 + * pata_sc1200: Fix crash on boot + - LP: #480144 + * AF_UNIX: Fix deadlock on connecting to shutdown socket (CVE-2009-3621) + - LP: #480144 + * ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@ + - LP: #480144 + * bonding: fix a race condition in calls to slave MII ioctls + - LP: #480144 + * hwmon: (it87) Fix VID reading on IT8718F/IT8720F + - LP: #480144 + * netlink: fix typo in initialization (CVE-2009-3612) + - LP: #480144 + * nfs: Avoid overrun when copying client IP address string + - LP: #480144 + * nfs: Panic when commit fails + - LP: #480144 + * NFSv4: Fix a bug when the server returns NFS4ERR_RESOURCE + - LP: #480144 + * NFSv4: Fix two unbalanced put_rpccred() issues. + - LP: #459265, #480144 + * NFSv4: Kill nfs4_renewd_prepare_shutdown() + - LP: #480144 + * NFSv4: The link() operation should return any delegation on the file + - LP: #480144 + * powerpc: Remove SMP warning from PowerMac cpufreq + - LP: #480144 + * vmscan: limit VM_EXEC protection to file pages + - LP: #480144 + * x86: mce: Clean up thermal throttling state tracking code + - LP: #480144 + * x86: mce: Fix thermal throttling message storm + - LP: #453444, #480144 + * iwlwifi: fix potential rx buffer loss + - LP: #480144 + * iwlwifi: reduce noise when skb allocation fails + - LP: #480144 + * x86/amd-iommu: Un__init function required on shutdown + - LP: #480144 + * KVM: Prevent kvm_init from corrupting debugfs structures + - LP: #480144 + * powerpc/pmac: Fix PowerSurge SMP IPI allocation + - LP: #480144 + * powerpc/pmac: Fix issues with sleep on some powerbooks + - LP: #480144 + * powerpc/pci: Fix regression in powerpc MSI-X + - LP: #480144 + * powerpc: Fix some late PowerMac G5 with PCIe ATI graphics + - LP: #480144 + * sata_via: Remove redundant device ID for VIA VT8261 + - LP: #480144 + * pata_via: extend the rev_max for VT6330 + - LP: #480144 + * PM / yenta: Split resume into early and late parts (rev. 4) + - LP: #480144 + * Linux 2.6.31.6 + - LP: #480144 + + [ Ubuntu: 2.6.31-16.52 ] + + * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable + permissions + - CVE-2009-3939 + * fs: pipe.c null pointer dereference + - CVE-2009-3547 + * netlink: fix typo in initialization + - CVE-2009-3612 + * drm/r128: Add test for initialisation to all ioctls that require it + - CVE-2009-3620 + * AF_UNIX: Fix deadlock on connecting to shutdown socket + - CVE-2009-3621 + * nfsd4: use common rpc_cred for all callbacks + - CVE-2009-3623 + * KEYS: get_instantiation_keyring() should inc the keyring refcount in + all cases + - CVE-2009-3624 + * connector: Keep the skb in cn_callback_data + - CVE-2009-3725 + * connector: Provide the sender's credentials to the callback + - CVE-2009-3725 + * connector: Fix incompatible pointer type warning + - CVE-2009-3725 + * uvesafb/connector: Disallow unpliviged users to send netlink packets + - CVE-2009-3725 + * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs + - CVE-2009-3725 + * dst/connector: Disallow unpliviged users to configure dst + - CVE-2009-3725 + * dm/connector: Only process connector packages from privileged processes + - CVE-2009-3725 + * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff() + - CVE-2009-3888 + * isdn: hfc_usb: Fix read buffer overflow + - CVE-2009-4005 + * gdth: Prevent negative offsets in ioctl CVE-2009-3080 + - CVE-2009-3080 + * mac80211: fix spurious delBA handling + - LP: #491301 + * mac80211: fix two remote exploits + - LP: #491301 + * ipv4: additional update of dev_net(dev) to struct *net in ip_fragment.c + - LP: #491301 + + [ Ubuntu: 2.6.31-15.50 ] + + * SAUCE: Fix nx_enable reporting + - LP: #454285 + + -- Andy Whitcroft Fri, 04 Dec 2009 20:48:31 +0000 + +linux-fsl-imx51 (2.6.31-600.1) lucid; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-15.49 + + [ Ubuntu: 2.6.31-15.49 ] + + * [Upstream] (drop after 2.6.31) usb-storage: Workaround devices with + bogus sense size + - LP: #446146 + * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied + - LP: #453335 + * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem + - LP: #458299 + * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly + - LP: #462824 + * SAUCE: AppArmor: AppArmor disallows truncate of deleted files. + - LP: #451375 + * SAUCE: [x86] fix report of cs-limit nx-emulation + - LP: #454285 + * Revert "SAUCE: trace: add trace_event for the open() syscall" + * SAUCE: trace: add trace events for open(), exec() and uselib() + - LP: #462111 + * SAUCE: Fix sub-flavour script to not stop on missing directories + - LP: #453073 + * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege + M300 to rate blacklist + - LP: #433801 + * PM: Make warning in suspend_test_finish() less likely to happen + - LP: #464552 + + [ Ubuntu: 2.6.31-14.48 ] + + * Add more e100 firmware to nic-modules + - LP: #451872 + * Add qla1280 firmware to scsi-modules + - LP: #381037 + + [ Ubuntu: 2.6.31-14.47 ] + + * SAUCE: dell-laptop: Store the HW switch status internally rather than + requerying every time + - LP: #430809 + * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop + - LP: #430809 + + -- Andy Whitcroft Tue, 03 Nov 2009 11:20:59 +0000 + +linux-fsl-imx51 (2.6.31-105.14) karmic; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-14.46 + * [Config] update configs since rebase to Ubuntu-2.6.31-14.46 + * lirc update dropped module lirc_mceusb2 + + [ Upstream Kernel Changes ] + + * mxc spi: fix spi driver for 2.6.31 + - LP: #427289, #446140 + + [ Ubuntu: 2.6.31-14.46 ] + + * reinstate armel.mk with no flavours + - LP: #449637 + * [Upstream] elevator: fix fastfail checks to allow merge of readahead + requests + - LP: #444915 + * [Upstream] block: silently error unsupported empty barriers too + - LP: #420423 + * SAUCE: AppArmor: Fix mediation of "deleted" paths + - LP: #415632 + * [Config] CONFIG_X86_MCE + https://lists.ubuntu.com/archives/kernel-team/2009-October/007584.html + * Revert "appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903" - Use patch from 2.6.31.4 which is slightly different. + * x86: fix csum_ipv6_magic asm memory clobber + * tty: Avoid dropping ldisc_mutex over hangup tty re-initialization + * x86: Don't leak 64-bit kernel register values to 32-bit processes + * tracing: correct module boundaries for ftrace_release + * ftrace: check for failure for all conversions + * futex: fix requeue_pi key imbalance + * futex: Move exit_pi_state() call to release_mm() + * futex: Nullify robust lists after cleanup + * futex: Fix locking imbalance + * NOHZ: update idle state also when NOHZ is inactive + * ima: ecryptfs fix imbalance message + * libata: fix incorrect link online check during probe + * sound: via82xx: move DXS volume controls to PCM interface + * ASoC: WM8350 capture PGA mutes are inverted + * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID + * KVM: VMX: flush TLB with INVEPT on cpu migration + * KVM: fix LAPIC timer period overflow + * KVM: SVM: Fix tsc offset adjustment when running nested + * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly + * net: Fix wrong sizeof + * mm: add_to_swap_cache() must not sleep + * sis5513: fix PIO setup for ATAPI devices + * PIT fixes to unbreak suspend/resume (bug #14222) + * IMA: open new file for read + * ACPI: Clarify resource conflict message + * ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression + * net: restore tx timestamping for accelerated vlans + * net: unix: fix sending fds in multiple buffers + * tun: Return -EINVAL if neither IFF_TUN nor IFF_TAP is set. + * tcp: fix CONFIG_TCP_MD5SIG + CONFIG_PREEMPT timer BUG() + * net: Fix sock_wfree() race + * smsc95xx: fix transmission where ZLP is expected + * sky2: Set SKY2_HW_RAM_BUFFER in sky2_init + * appletalk: Fix skb leak when ipddp interface is not loaded + * ax25: Fix possible oops in ax25_make_new + * ax25: Fix SIOCAX25GETINFO ioctl + * sit: fix off-by-one in ipip6_tunnel_get_prl + * Linux 2.6.31.4 + * drm/i915: Fix FDI M/N setting according with correct color depth + - LP: #416792 + + [ Ubuntu: 2.6.31-13.45 ] + + * [Config] Add sd_mod to scsi-modules udeb for powerpc + * SAUCE: Update to LIRC 0.8.6 + - LP: #432678 + * [Config] CONFIG_X86_PAT=y + https://lists.ubuntu.com/archives/kernel-team/2009-October/007477.html + https://lists.ubuntu.com/archives/kernel-team/2009-October/007534.html + * [Config] Add armel arch to linux-libc-dev arches. + - LP: #449637 + * e1000e: swap max hw supported frame size between 82574 and 82583 + * drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI. + - LP: #392017 + * ALSA: hda - Add quirks for some HP laptops + - LP: #449742 + * ALSA: hda - Add support for HP dv6 + - LP: #449742 + + [ Ubuntu: 2.6.31-13.44 ] + + * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584 + * appletalk: Fix skb leak when ipddp interface is not loaded, + CVE-2009-2903 + Note - This patch causes an ABI change in the symbol aarp_send_ddp + which I'm ignoring. + + -- Andy Whitcroft Tue, 13 Oct 2009 15:59:33 +0100 + +linux-fsl-imx51 (2.6.31-104.13) karmic; urgency=low + + [ Andy Whitcroft ] + + * fix FTBFS due to sound being built in + + -- Andy Whitcroft Sat, 10 Oct 2009 18:58:18 +0100 + +linux-fsl-imx51 (2.6.31-104.12) karmic; urgency=low + + [ Alan Tull ] + + * SAUCE: IMX51: A hack which allows the sound driver to initialize. + + [ Amit Kucheria ] + + * Disable CONFIG_UEVENT_HELPER_PATH + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-13.42 + * rebase to Ubuntu-2.6.31-13.43 + + [ Brad Figg ] + + * CONFIG: IMX51: change SGTL5000 driver to be builtin instead of a + module. + + [ Colin Watson ] + + * Use section 'admin' rather than 'base' + + [ Jeremy Kerr ] + + * SAUCE: drivers/net/fec: Convert to a platform bus driver + - LP: #438687 + + [ Tim Gardner ] + + * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y + - LP: #416325 + + [ Upstream Kernel Changes ] + + * ENGR00107785 sgtl5000: adc power savings + * sgtl5000 audio: more porting to 2.6.31 + * sgtl5000: add line in function + + [ Ubuntu: 2.6.31-13.43 ] + + * Revert "[Upstream] acerhdf: Limit modalias matching to supported + boards" + * Use section 'admin' rather than 'base' + * SAUCE: AppArmor: Set error code after structure initialization. + - LP: #427948 + * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation + - LP: #446595 + * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc + * [Upstream] acerhdf: Limit modalias matching to supported boards + (supersedes previous revert made by Andy Whitcroft) + - LP: #435958 + + [ Ubuntu: 2.6.31-13.42 ] + + * SAUCE: (drop after 2.6.31) input: Add support for filtering input + events + - LP: #430809 + * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi + toggle switch press + - LP: #430809 + * SAUCE: Raise the default console 'quiet' level to 2 + This supresses all but critical and emergency level messages. + https://lists.ubuntu.com/archives/kernel-team/2009-October/007476.html + * TTY: fix typos + * Linux 2.6.31.3 + * V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J + - LP: #433904 + + [ Ubuntu: 2.6.31-12.41 ] + + * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y + - LP: #416325 + * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT + The original patch failed to work for amd64. + - LP: #430694 + * ALSA: hda - Add a white-list for MSI option + Upstream cherry-pick: Infrastructure support for #445580 + * ALSA: hda - Add HP Pavilion dv4t-1300 to MSI whitelist + - LP: #445580 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-T350P + - LP: #410933 + * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO + VGN-B1VP + - LP: #410933 + + [ Ubuntu: 2.6.31-12.40 ] + + * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros + - LP: #430694 + * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915 + - LP: #430694 + * V4L/DVB (12352): gspca - vc032x: Fix mi1310_soc preview and LED + - LP: #310760 + + -- Andy Whitcroft Fri, 09 Oct 2009 14:50:27 +0100 + +linux-fsl-imx51 (2.6.31-103.11) karmic; urgency=low + + [ Amit Kucheria ] + + * [Config] Disable LMPCM_USB + * [Config] Disable rt3070sta in staging + - LP: #423767 + * [Config] Add asix to d-i modules + - LP: #431283 + * [Config] Enable MXC_SAHARA + * ARM: IMX51: Change default_bpp to 32 + - LP: #440104 + + [ Andy Whitcroft ] + + * SAUCE: ubuntu-insert-changes -- follow abstracted debian + * rebase to Ubuntu-2.6.31-12.39 + * rt3070sta has been disabled + + [ Tim Gardner ] + + * [Config] Added cpio as a build dependency. + + [ Upstream Kernel Changes ] + + * ABI + + [ Ubuntu: 2.6.31-12.39 ] + + * install the full changelog with the binary package + * changelog -- explicitly note rebases and clean history + * Revert "SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless + adapters" + * Revert "SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from + going negative during unlink" + * Revert "SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object" + * Revert "SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs + a persistent object" + * Revert "drm/i915: Check that the relocation points to within the + target" + * Revert "drm/i915: fix tiling on IGDNG" + * Revert "Driver core: add new device to bus's list before probing" + * Revert "HID: completely remove apple mightymouse from blacklist" + * Revert "KVM: x86: check for cr3 validity in ioctl_set_sregs" + All reverts superseded by corresponding v2.6.31.2 patches + * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules + - LP: #439456 + * [Config] Enabled CONFIG_SND_HDA_HWDEP + - LP: #443117 + * [Config] Add cpio as a build dependency. + * [Config] Set default I/O scheduler back to CFQ for desktop flavours + - LP: #381300 + * KVM: VMX: Fix EPT with WP bit change during paging + * pata_amd: do not filter out valid modes in nv_mode_filter + * p54usb: add Zcomax XG-705A usbid + * x86: Increase MIN_GAP to include randomized stack + * serial: bfin_5xx: fix building as module when early printk is enabled + * USB: option.c Add support for ZTE AC2726 EVDO modem + * USB: option: TELIT UC864G support + * video: s3c_fb.c: fix build with CONFIG_HOTPLUG=n + * kbuild: fix cc1 options check to ensure we do not use -fPIC when + compiling + * drivers/mfd/ab3100-core.c: fix powerpc build error + * thinkpad-acpi: don't ask about brightness_mode for fw. 1V and 1R + * ACPI: pci_slot.ko wants a 64-bit _SUN + * fbcon: only unbind from console if successfully registered + * kallsyms: fix segfault in prefix_underscores_count() + * sisfb: change SiS_DDC_Port type to SISIOADDRESS + * mmc_spi: fail gracefully if host or card do not support the switch + command + * alpha: AGP update (fixes compile failure) + * fs: make sure data stored into inode is properly seen before unlocking + new inode + * eCryptfs: Handle unrecognized tag 3 cipher codes + * eCryptfs: Check for O_RDONLY lower inodes when opening lower files + * eCryptfs: Filename encryption only supports password auth tokens + * eCryptfs: Validate global auth tok keys + * eCryptfs: Prevent lower dentry from going negative during unlink + * Re-enable Lanman security + * xen: make -fstack-protector work under Xen + * xen: only enable interrupts while actually blocking for spinlock + * xen: use stronger barrier after unlocking lock + * xen: check EFER for NX before setting up GDT mapping + * perf_counter: Fix perf_copy_attr() pointer arithmetic + * perf tools: Fix buffer allocation + * tty: serial/pcmcia: add ID for Advantech card + * PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend() + * PM / yenta: Fix cardbus suspend/resume regression + * sony-laptop: check for rfkill hard block at load time + * nilfs2: fix missing zero-fill initialization of btree node cache + * ar9170usb: add usbid for TP-Link TL-WN821N v2 + * mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver + * mtd: ofpart: Check availability of reg property instead of name + property + * mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G + * USB: serial: ftdi_sio: new hardware support - hameg power supply + * USB: add PIDs for FTDI based OpenDCC hardware + * USB: serial: ftdi: handle gnICE+ JTAG adaptors + * USB: CDC WDM driver doesn't support non-blocking reads + * USB: fix cdc-acm regression in open + * cdc_acm: Fix to use modern speed interfaces + * tty: remove dtr/rts use from the driver open methods + * tty: gigaset: really fix chars_in_buffer + * kaweth: Fix memory leak in kaweth_control() + * x86: SGI UV: Fix IPI macros + * USB: serial: pl2303: new hardware support - sanwa multimeter + * USB: storage: fix a resume path GFP_NOIO must be used + * USB: usb-storage fails to attach to Huawei Datacard cdrom device + * USB: usbtmc: sanity checks for DEV_DEP_MSG_IN urbs + * USB: sl811-hcd: Fix device disconnect: + * drm/i915: remove restore in resume + * drm/i915: Only destroy a constructed mmap offset + * drm/i915: prevent FIFO calculation overflows on 32 bits with high + dotclocks + * drm/i915: Add buffer to inactive list immediately during fault + * drm/i915: Check that the relocation points to within the target + * drm/i915: Fix typo for wrong LVDS clock setting on IGDNG + * drm/i915: Fix SSC frequence for IGDNG + * drm/i915: Remove DAC disable in CRT force detect on IGDNG + * drm/i915: Fix LVDS panel fitting on Arrandale + * drm/I915: Use the CRT DDC to get the EDID for DVI-connector on Mac + * drm/i915: fix tiling on IGDNG + * agp/intel: Fix the pre-9xx chipset flush. + * nfsd4: fix null dereference creating nfsv4 callback client + * can: fix NOHZ local_softirq_pending 08 warning + * ahci: restore pci_intx() handling + * pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume + * net ax25: Fix signed comparison in the sockopt handler + * net: Make the copy length in af_packet sockopt handler unsigned + * pty_write: don't do a tty_wakeup() when the buffers are full + * KVM: fix cpuid E2BIG handling for extended request types + * KVM: MMU: fix missing locking in alloc_mmu_pages + * KVM: MMU: fix bogus alloc_mmu_pages assignment + * KVM: Protect update_cr8_intercept() when running without an apic + * Fix NULL ptr regression in powernow-k8 + * perf tools: do not complain if root is owning perf.data + * netfilter: nf_nat: fix inverted logic for persistent NAT mappings + * netfilter: nf_conntrack: netns fix re reliable conntrack event delivery + * netfilter: bridge: refcount fix + * netfilter: ebt_ulog: fix checkentry return value + * ath5k: Wakeup fixes + * ath5k: do not release irq across suspend/resume + * Driver core: add new device to bus's list before probing + * tty: Add a full port_close function + * tty: USB hangup is racy + * tty: USB can now use the shutdown method for kref based freeing of + ports + * hwmon: (asus_atk0110) Add maintainer information + * tty: USB serial termios bits + * usb-serial: change referencing of port and serial structures + * usb-serial: put subroutines in logical order + * usb-serial: change logic of serial lookups + * usb-serial: acquire references when a new tty is installed + * usb-serial: fix termios initialization logic + * usb-serial: rename subroutines + * usb-serial: add missing tests and debug lines + * usb-serial: straighten out serial_open + * USB serial: update the console driver + * USB: xhci: Work around for chain bit in link TRBs. + * USB: xhci: Fix slot and endpoint context debugging. + * USB: xhci: Configure endpoint code refactoring. + * USB: xhci: Set correct max packet size for HS/FS control endpoints. + * USB: xhci: Support full speed devices. + * USB: xhci: Handle stalled control endpoints. + * USB: xhci: Add quirk for Fresco Logic xHCI hardware. + * USB: xhci: Make TRB completion code comparison readable. + * USB: xhci: Handle babbling endpoints correctly. + * USB: xhci: Don't touch xhci_td after it's freed. + * USB: xhci: Check URB's actual transfer buffer size. + * USB: xhci: Check URB_SHORT_NOT_OK before setting short packet status. + * USB: xhci: Set -EREMOTEIO when xHC gives bad transfer length. + * USB: xhci: Support interrupt transfers. + * USB: Fix SS endpoint companion descriptor parsing. + * /proc/kcore: work around a BUG() + * hugetlb: restore interleaving of bootmem huge pages (2.6.31) + * page-allocator: limit the number of MIGRATE_RESERVE pageblocks per zone + * mm: munlock use follow_page + * mm: fix anonymous dirtying + * mmap: avoid unnecessary anon_vma lock acquisition in vma_adjust() + * Fix idle time field in /proc/uptime + * drm/i915: Handle ERESTARTSYS during page fault + * em28xx: ir-kbd-i2c init data needs a persistent object + * saa7134: ir-kbd-i2c init data needs a persistent object + * powerpc/8xx: Fix regression introduced by cache coherency rewrite + * powerpc: Fix incorrect setting of __HAVE_ARCH_PTE_SPECIAL + * HID: completely remove apple mightymouse from blacklist + * mptsas : PAE Kernel more than 4 GB kernel panic + * NOMMU: Fix MAP_PRIVATE mmap() of objects where the data can be mapped + directly + * iwlwifi: Handle new firmware file with ucode build number in header + * iwlwifi: update 1000 series API version to match firmware + * iwlagn: modify digital SVR for 1000 + * iwlwifi: traverse linklist to find the valid OTP block + * iwlwifi: fix unloading driver while scanning + * Linux 2.6.31.2 + + [ Ubuntu: 2.6.31-11.38 ] + + * [Upstream] acerhdf: Limit modalias matching to supported boards + - LP: #435958 + * [Config] Added sata_via to d-i/modules/sata-modules + - LP: #434827 + * SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless adapters + - LP: #439285 + * [Upstream] i915: Fix i2c init message + - LP: #409361 + * [Config] Add sym53c8xx.ko to virtual sub-flavour + - LP: #439415 + * sched: Disable NEW_FAIR_SLEEPERS for now + - LP: #436342 + * ACPI video: ignore buggy _BQC + * ACPI video: work-around BIOS AML bug in _BQC + - LP: #428910 + * ALSA: hda - Added quirk to enable sound on Toshiba NB200 + - LP: #438318 + + [ Ubuntu: 2.6.31-11.37 ] + + * [Config] Increase kernel log buffer to 256K for amd64 flavours + - LP: #424810 + * [Config] Set HZ=100 for amd64 flavours + - LP: #438234 + * [Upstream] e1000e: Emit notice instead of an error when + pci_enable_pcie_error_reporting() fails + - LP: #436370 + * n_tty: honor opost flag for echoes + * n_tty: move echoctl check and clean up logic + - LP: #438310 + * Revert "[Upstream] drm/i915: Check that the relocation points to within + the target" - Use upstream cherry-pick. + * drm/i915: Check that the relocation points to within the target + - LP: #429241 + * drm/i915: fix tiling on IGDNG + * drm/i915: add B43 chipset support + * agp/intel: Add B43 chipset support + Intel request from kernel team mailing list. + * HID: completely remove apple mightymouse from blacklist + - LP: #428111 + + -- Andy Whitcroft Tue, 06 Oct 2009 20:42:17 +0100 + +linux-fsl-imx51 (2.6.31-102.10) karmic; urgency=low + + [ Andy Whitcroft ] + + * rebase to Ubuntu-2.6.31-11.36 + + [ Ubuntu: 2.6.31-11.36 ] + + * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a + persistent object + * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a + persistent object + * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device + - LP: #416482 + * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going + negative during unlink + * sg: fix oops in the error path in sg_build_indirect() + * mpt2sas : Rescan topology from Interrupt context instead of work thread + * mpt2sas: Prevent sending command to FW while Host Reset + * mpt2sas: setting SDEV into RUNNING state from Interrupt context + * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg + * SCSI: fix oops during scsi scanning + * SCSI: libsrp: fix memory leak in srp_ring_free() + * cfg80211: fix looping soft lockup in find_ie() + * ath5k: write PCU registers on initial reset + * binfmt_elf: fix PT_INTERP bss handling + * TPM: Fixup boot probe timeout for tpm_tis driver + * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined! + * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices + * fix undefined reference to user_shm_unlock + * perf_counter: Fix buffer overflow in perf_copy_attr() + * perf_counter: Start counting time enabled when group leader gets + enabled + * powerpc/perf_counters: Reduce stack usage of power_check_constraints + * powerpc: Fix bug where perf_counters breaks oprofile + * powerpc/ps3: Workaround for flash memory I/O error + * block: don't assume device has a request list backing in nr_requests + store + * agp/intel: remove restore in resume + * ALSA: cs46xx - Fix minimum period size + * ASoC: Fix WM835x Out4 capture enumeration + * sound: oxygen: work around MCE when changing volume + * mlx4_core: Allocate and map sufficient ICM memory for EQ context + * perf stat: Change noise calculation to use stddev + * x86: Fix x86_model test in es7000_apic_is_cluster() + * x86/i386: Make sure stack-protector segment base is cache aligned + * PCI: apply nv_msi_ht_cap_quirk on resume too + * x86, pat: Fix cacheflush address in change_page_attr_set_clr() + * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() + with highmem + * KVM guest: do not batch pte updates from interrupt context + * KVM: Fix coalesced interrupt reporting in IOAPIC + * KVM: VMX: Check cpl before emulating debug register access + * KVM guest: fix bogus wallclock physical address calculation + * KVM: x86: Disallow hypercalls for guest callers in rings > 0 + * KVM: VMX: Fix cr8 exiting control clobbering by EPT + * KVM: x86 emulator: Implement zero-extended immediate decoding + * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list + * KVM: x86 emulator: fix jmp far decoding (opcode 0xea) + * KVM: limit lapic periodic timer frequency + * libata: fix off-by-one error in ata_tf_read_block() + * PCI quirk: update 82576 device ids in SR-IOV quirks list + * PCI: Unhide the SMBus on the Compaq Evo D510 USDT + * powerpc/pseries: Fix to handle slb resize across migration + * Linux 2.6.31.1 + + [ Ubuntu: 2.6.31-10.35 ] + + * Disable CONFIG_UEVENT_HELPER_PATH + * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD + * remove the tlsup driver + * remove lmpcm logitech driver support + * Add 3 missing files to prerm remove file list + - LP: #345623, #415832 + * [Upstream] drm/i915: Check that the relocation points to within the + target + - LP: #429241 + * [Config] Set CONFIG_EXT4_FS=y on ports architectures + * SAUCE: Added quirk to recognize GE0301 3G modem as an interface. + - LP: #348861 + * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list" + * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list" + Upstream suggests that this is not the right approach. + * [Config] Set default I/O scheduler to DEADLINE + CFQ seems to have some load related problems which are often exacerbated by sreadahead. + - LP: #381300 + * SAUCE: ipw2200: Enable LED by default + - LP: #21367 + * ALSA: hda - Add support for new AMD HD audio devices + - LP: #430564 + + -- Andy Whitcroft Fri, 25 Sep 2009 13:27:17 -0700 + +linux-fsl-imx51 (2.6.31-101.9) karmic; urgency=low + + [ Amit Kucheria ] + + * ARM: IMX51: Fix USB errors + * ARM: IMX51: Copy over the 2.6.28 version of fec.c + - LP: #418238 + * ARM: IMX51: Make fec ethernet driver compile + * [Config] Disable FEC2 for imx51 + + -- Andy Whitcroft Tue, 22 Sep 2009 17:16:14 -0700 + +linux-fsl-imx51 (2.6.31-101.8) karmic; urgency=low + + [ Alan Tull ] + + * ARM: IMX51: ENGR00114681 pcm: set minimum period to 2k + * ARM: IMX51: ENGR00114820-1 Revert SGTL5000: Enable amixer controls + Jack/Speaker Function + * ARM: IMX51: ENGR00114820-2 sgtl5000: pop fixes + * ARM: IMX51: ENGR00114867 MX51: tristate i2c levelshifter + * ARM: IMX51: ENGR00115688 dvi: disable edid read + * ARM: IMX51: ENGR00115618-1 sgtl5000: power reduction pop fix + * ARM: IMX51: ENGR00115618-2 sgtl5000: power savings + * ARM: IMX51: ENGR00115754 sgtl5000: power mic bias earlier + + [ Amit Kucheria ] + + * [Config] Run updateconfigs after rebasing to 2.6.31-rc8 + * ARM: IMX51: Make sgt5000 driver compile + * [Upstream] Remove X86 dependency for the rt3070 driver + - LP: #423767 + * [Config] Enable rt3070 from staging for imx51 + - LP: #423767 + * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR to 0 + * [Config] imx51: Enable APM_EMULATION as per imx51_defconfig + * ARM: IMX51: Fix compile of mxc_dataflash.c by replacing bus_id + * ARM: IMX51: Don't let the dataflash driver hitch a ride on CONFIG_MTD + * [Config] imx51: disable MTD_MXC_DATAFLASH + * [Config] Run updateconfigs after rebasing to 2.6.31 final + * [Config] imx51: updateconfigs after applying sdk-1.6 patches + * ARM: IMX51: Remove cpu_is_mx2/cpu_is_mx3 definition from hardware.h + * ARM: IMX51: Paramters to module_param_call should be NULL + + [ Ann Thornton ] + + * ARM: IMX51: ENGR00113055-1 Add ability to read and user EDID info + * ARM: IMX51: ENGR00113055-2 Added ability to read EDID data and use it + to set monitor. + * ARM: IMX51: ENGR00114026 MX51 Prevent 2nd initialization of + framebuffer. + * ARM: IMX51: ENGR00114023-1 Support for dual monitors. + * ARM: IMX51: ENGR00114023-2 MX51: Add support for dual monitors. + * ARM: IMX51: ENGR00114024 Enable 720p via HDMI + + [ Arik Gubeskys ] + + * ARM: IMX51: ENGR00114210 IPU IC bypass mode: move display configuration + to the FB driver + + [ b00984 ] + + * ARM: IMX51: ENGR00113773 Add apm support for mc13892 battery + * ARM: IMX51: ENGR00114655 mitsubishi lvds xga lcd support for babbage + 2.5 + + [ Dinh Nguyen ] + + * ARM: IMX51: ENGR00114282 MX51: Disable L2 SRPG + * ARM: IMX51: ENGR00114453 MX51: Add support for keypad on Babbage 2.5 + board + + [ Guoqing Jiang ] + + * ARM: IMX51: ENGR00113618 Audio: Workaround for sgtl5000 codec suspend + failure issue on MX25 + + [ Jason ] + + * ARM: IMX51: ENGR00114157-1 Add SPI data flash driver support + * ARM: IMX51: ENGR00114157-2 Add SPI data flash support for MX51 + babbage2.5 + * ARM: IMX51: ENGR00114189 Enlarge the rootfs partition to accommodate + Gnome-mobile + * ARM: IMX51: ENGR00113990 Fix for mtd_oobtest test failure + * ARM: IMX51: ENGR00114882 Reset NFC delay line register + * ARM: IMX51: ENGR00114880 Data abort on NFC memory byte access + * ARM: IMX51: ENGR00115329 Enable NFC symmetric mode on MX51 + * ARM: IMX51: ENGR00115330 Fix ECC mode setting for MX51TO3 + * ARM: IMX51: ENGR00115336 Fix setting NFC FW for 16bit nand flash + support on MX51 + + [ JasonHua ] + + * ARM: IMX51: ENGR00113106 MX25 Camera: Some kernel message dumped when + remove ov2640_camera + + [ Katherine Lu ] + + * ARM: IMX51: ENGR00114097 MX51 Babbage: Register backlight device only + display card attached + * ARM: IMX51: ENGR00113546 MX51: set PLL2 as UART parent clk + * ARM: IMX51: ENGR00114139 MX51 Babbage: remove MC13892 backlight device + * ARM: IMX51: ENGR00114166 MX51 Babbage: can not reboot from SPI NOR + * ARM: IMX51: ENGR00114037 MX31: LCD can not resume after entering + standby + * ARM: IMX51: ENGR00114881 MX51: Disable SAHARA by default + * ARM: IMX51: ENGR00114803 eCSPI Hang when acessing from multi modules + + [ Lily Zhang ] + + * ARM: IMX51: ENGR00113197-1 Fix Write pending issue with hwclock + function + * ARM: IMX51: ENGR00113197-2 disable RTC clock when it's not active + * ARM: IMX51: ENGR00110228 Fix GPT timer stop issue + * ARM: IMX51: ENGR00113662 enable coin cell charger + * ARM: IMX51: ENGR00114328-1 SRTC: Change wait time for write operations + * ARM: IMX51: ENGR00114328-2 BBG: Keep VRTC and CKIL active for SRTC + * ARM: IMX51: ENGR00114345 Set MC13892 irq as wakeup resource + * ARM: IMX51: ENGR00114738 MX51 BBG: Add OneWire support + + [ Lionel.Xu ] + + * ARM: IMX51: ENGR00107200 MX25: The SW workaround for left/right channel + random swap issue + * ARM: IMX51: ENGR00113470 MX37 ALSA ADC: Resolve the issue that arecord + can't work + * ARM: IMX51: ENGR00115113 SGTL5000: Jack Function/Speaker Function + + [ Liu Ying ] + + * ARM: IMX51: ENGR00113541 IPUv3:Support IC combing with local alpha + contained in pixel + * ARM: IMX51: ENGR00113673 IPUv3:Fix RGB to RGB pixel format changing + with IC PRP_VF + * ARM: IMX51: ENGR00114324-1 Enhance mmap implement of IIM driver + * ARM: IMX51: ENGR00114611 Support RGB565 pixel format for WVGA panel on + BBG2.5 + * ARM: IMX51: ENGR00114617 Support OV3640 camera on BBG2.5 accessory + board + * ARM: IMX51: ENGR00114663-1 Add function comments for mmap function of + IIM driver + + [ Nancy Chen ] + + * ARM: IMX51: ENGR00114374 USB: Failed to unload USB host module + * ARM: IMX51: ENGR00114685 MX51: Change the GP voltages for 167MHz and + 800MHz + * ARM: IMX51: ENGR00114689 CPUFREQ: Add conservative governor support + * ARM: IMX51: ENGR00114686 DVFS-CORE: Use GPC STRT bit to control DVFS + * ARM: IMX51: ENGR00114686-1 MX51: Enable other CPUFREQ governors + * ARM: IMX51: ENGR00114736 Fix build break by adding mxc_dvfs.h + * ARM: IMX51: ENGR00114871 MX51: Add command line to enable peripheral SW + Freq scaling + * ARM: IMX51: ENGR00114963 MX51: CPUFREQ is not trigged if DVFS CORE is + enabled + * ARM: IMX51: ENGR00115013 MX51: System doesn't enter APM mode if DVFS + CORE enabled + + [ Patrick Turley ] + + * ARM: IMX51: ENGR00107929 /proc/cpu/clocks Corrupts memory + * ARM: IMX51: ENGR00103310 Initial imx_nfc NAND Flash MTD driver + * ARM: IMX51: ENGR00115700: mxc_nd2 driver panics the kernel when booting + on i.MX25 + + [ Raj Rajasekaran ] + + * ARM: IMX51: ENGR00107366 DryIce: DryIce unit test failed with RTC + enabled. + + [ Ranjani Vaidyanathan-RA5478 ] + + * ARM: IMX51: ENGR00114937: MX51: Move USBOH3 and USB-PHY to source from + PLL2 and 24MHz. + * ARM: IMX51: ENGR00115321: MX51: Change STOP mode voltage based on DS0.3 + datasheet. + * ARM: IMX51: ENGR00115334: MX51: Donot scale arm_axi_clk in peripheral + bus scaling. + + [ Richard Zhu ] + + * ARM: IMX51: ENGR00113376 [MX37] SD can't detected after fast + removal/insertion + * ARM: IMX51: ENGR00113607 Refine and unify the definitions of the two + mmc host + * ARM: IMX51: ENGR00114325-1: SIM: Add MX25 support + + [ Rob Herring ] + + * ARM: IMX51: ENGR00114598 mx51: add missing fb memory resource setup + * ARM: IMX51: ENGR00114599 mx51: Add gpu2d uio driver + * ARM: IMX51: ENGR00115613 ipuv3: enable DMFC watermark for sync channels + + [ Robby Cai ] + + * ARM: IMX51: ENGR00114911 make video buffer cacheable to improve video + performance + + [ Tim Gardner ] + + * [Config] Don't include ABI or version in vmlinuz name in kernel-image + - LP: #359049 + + [ Wallace Wang ] + + * ARM: IMX51: ENGR00114140 SSI: TX fail if RX is enabled before TX + * ARM: IMX51: ENGR00114625 BABBAGE: Add spdif support + * ARM: IMX51: ENGR00114851 MX51: Fix SSI1 SDMA data transfer failure + + [ William Lai ] + + * ARM: IMX51: ENGR00114609 MX35 ASRC: Support SPDIF in/out + * ARM: IMX51: ENGR00114644-1 MX51 PWM: Add pwm and backlight devices + * ARM: IMX51: ENGR00114644-2 MX51 PWM: Correction for the PWM + + [ Wu Guoxing ] + + * ARM: IMX51: ENGR00114622 GPU: add platform device + * ARM: IMX51: ENGR00114692 GPU: use axi_a_clk for both 2d and 3d + * ARM: IMX51: ENGR00114962 : change gpu UIO driver to module + + [ Xinyu Chen ] + + * ARM: IMX51: ENGR00114989 MX35 SPDIF driver failed to play 48KHz audio + + [ Zhou Jingyu ] + + * ARM: IMX51: ENGR00114145 disable pmic charger on Babbage + * ARM: IMX51: ENGR00113543 fix bug in mc13892 ADC suspend + + [ Ubuntu: 2.6.31-10.34 ] + + * [Upstream] ext3: Don't update superblock write time when filesystem is + read-only + - LP: #427622 + + [ Ubuntu: 2.6.31-10.33 ] + + * [Upstream] dvb-usb: fix tuning with Cinergy T2 + - LP: #421258 + * [Config] Unconditionally copy files from sub-flavours lists. + (really, really fix it this time) + - LP: #423426 + * [Config] Set CONFIG_CACHEFILES=m for all flavours + * ext4: Don't update superblock write time when filesystem is read-only + - LP: #427822 + + [ Ubuntu: 2.6.31-10.32 ] + + * [Config] enable module support for memory stick + - LP: #159951 + * [Config] Unconditionally copy files from sub-flavours lists. + - LP: #423426 + + [ Ubuntu: 2.6.31-10.31 ] + + * rebase to v2.6.31 final + * [Config] Recommend grub-pc in linux-image + - LP: #385741 + * [Upstream] Pull latest update of lenovo-sl-laptop + * [Upstream] (drop after 2.6.31) acerhdf: fix fan control for AOA150 + model + - LP: #426691 + * [Config] De-macro some package names. + * rebase to 2.6.31 final. + + [ Ubuntu: 2.6.31-10.30 ] + + * [Config] Enable CONFIG_USB_DEVICEFS + - LP: #417748 + * [Config] Populate the config-update template a bit more + * rebase to v2.6.31-rc9 + * [Config] update configs following rebase to v2.6.31-rc9 + * [Config] update ports configs following rebase to v2.6.31-rc9 + * SAUCE: wireless: hostap, fix oops due to early probing interrupt + - LP: #254837 + * [Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) + white-list + - LP: #281732 + * [Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) + white-list + - LP: #281732 + * SAUCE: AppArmor: Fix profile attachment for regexp based profile names + - LP: #419308 + * SAUCE: AppArmor: Return the correct error codes on profile + addition/removal + - LP: #408473 + * SAUCE: AppArmor: Fix OOPS in profile listing, and display full list + - LP: #408454 + * SAUCE: AppArmor: Fix mapping of pux to new internal permission format + - LP: #419222 + * SAUCE: AppArmor: Fix change_profile failure + - LP: #401931 + * SAUCE: AppArmor: Tell git to ignore generated include files + - LP: #419505 + * [Upstream] acpi: video: Loosen strictness of video bus detection code + - LP: #333386 + * SAUCE: Remove ov511 driver from ubuntu subdirectory + * [Config] Exclude char-modules from non-x86 udeb creation + * SAUCE: Notify the ACPI call chain of AC events + * [Config] CONFIG_SATA_VIA=m + - LP: #403385 + * [Config] Build in all phylib support modules. + * [Config] Don't fail when sub-flavour files are missing + - LP: #423426 + * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR=0 + - LP: #423513 + * Rebased against v2.6.31-rc9 + + [ Ubuntu: 2.6.31-9.29 ] + + * [Upstream] agp/intel: support for new chip variant of IGDNG mobile + - LP: #419993 + * [Config] d-i/modules: Add new char-modules file, initialize with + intel-agp + - LP: #420605 + * Rebased against 2.6.31-rc8 plus some inotify regression patches: + up through git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git + adda766193ea1cf3137484a9521972d080d0b7af. + + [ Ubuntu: 2.6.31-8.28 ] + + * [Config] Let nic-shared-modules depends on crypto-modules + - LP: #360966 + * [Upstream] (drop after 2.6.31) drm/i915: increase default latency + constant + - LP: #412492 + * [Upstream]: (drop after 2.6.31) dell-laptop: don't change softblock + status if HW switch is disabled + - LP: #418721 + * [Upstream]: (drop after 2.6.31) compal-laptop: Add support for known + Compal made Dell laptops + * [Upstream]: (drop after 2.6.31) compal-laptop: Replace sysfs support + with rfkill support + * [Config] Add acpiphp to virtual sub-flavour + - LP: #364916 + * Drop KSM patch set for now because of instabilities with encrypted swap. + - LP: #418781 + + [ Ubuntu: 2.6.31-7.27 ] + + * [Config] updateconfigs updateportsconfigs after 2.6.31-rc7 rebase + * SAUCE: (drop after 2.6.31) Added KSM from mmotm-2009-08-20-19-18 + Replaces previous ksm patches from 2.6.31-6.25 + * [Config] KSM=y + + [ Ubuntu: 2.6.31-6.26 ] + + * [Config] enable CONFIG_AUFS_BR_RAMFS + - LP: #414738 + * split out debian directory ready for abstraction + * add printdebian target to find branch target + * abstracted debian -- debian/files is not abstracted + * abstracted debian -- packages must be built in debian/ + * abstracted debian -- kernel-wedge needs to work in debian/ + * abstracted debian -- ensure we install the copyright file + * abstracted-debian -- drop the debian directories from headers + * abstracted-debian -- drop the debian directories from headers part 2 + * SAUCE: ubuntu-insert-changes -- follow abstracted debian + * [Upstream] aoe: ensure we initialise the request_queue correctly V2 + - LP: #410198 + * [Config] Ports: Disable CONFIG_CPU_FREQ_DEBUG on powerpc-smp + * [Config] Ports: Re-enable windfarm modules on powerpc64-smp + - LP: #413150 + * [Config] Ports: Build all cpu frequency scaling governors into ports + kernels + * [Config] Ports: Build ext2 and ext3 modules into ports kernels + * [Config] Ports: CONFIG_PACKET=y for all ports kernels + * [Config] Ports: Enable PS3 network driver + * abstracted debian -- call $(DEBIAN)/rules using make + * [Config] Abstract the debian directory + * SAUCE: Improve error reporting in postinst + - LP: #358564 + + -- Andy Whitcroft Fri, 18 Sep 2009 13:10:41 +0100 + +linux-fsl-imx51 (2.6.31-100.7) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Removed debug package rules + + -- Tim Gardner Mon, 24 Aug 2009 06:43:24 -0600 + +linux-fsl-imx51 (2.6.31-100.6) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Add rsync as a build dependency + + -- Tim Gardner Sun, 23 Aug 2009 18:09:36 -0600 + +linux-fsl-imx51 (2.6.31-100.5) karmic; urgency=low + + [ Tim Gardner ] + + * [Config] Do not generate a doc package + * [Config] Do not produce a source package + * [Config] Only create one headers package + - LP: #417264 + + -- Tim Gardner Sun, 23 Aug 2009 12:09:28 -0600 + +linux-fsl-imx51 (2.6.31-100.4) karmic; urgency=low + + [ Andy Whitcroft ] + + * abstracted debian -- kernel-wedge needs to work in debian/ + * abstracted debian -- ensure we install the copyright file + * abstracted-debian -- drop the debian directories from headers + * abstracted-debian -- drop the debian directories from headers part 2 + + -- Tim Gardner Thu, 20 Aug 2009 10:13:41 -0600 + +linux-fsl-imx51 (2.6.31-100.3) karmic; urgency=low + + * UBUNTU: [Config] Produce headers packages of the form linux-headers-2.6.31-ABI + * UBUNTU: Bump ABI to 100 in order to avoid collisions with other kernel packages + * UBUNTU: [Config] Removed libc-dev from the control file + * UBUNTU: [Config] Implement abstracted debian build for fsl-imx51 + + -- Tim Gardner Mon, 17 Aug 2009 08:29:47 -0600 + +linux-fsl-imx51 (2.6.31-99.2) karmic; urgency=low + + * Dummy entry + + -- Tim Gardner Mon, 10 Aug 2009 12:33:47 -0600 + +linux-fsl-imx51 (2.6.31-0.1) karmic; urgency=low + + [ Alan Tull ] + + * ARM: IMX51: ENGR00109149 mx51 sgtl5000: correct platform data to vddd + 1.2v + - LP: #396601 + * ARM: IMX51: ENGR00109155 sgtl5000: add reg_cache + - LP: #396601 + * ARM: IMX51: ENGR00110076 sgtl5000: fix audio pops + - LP: #396601 + * ARM: IMX51: ENGR00111670-3 sgtl5000: Use internal vddd reg for sgtl5000 + rev 0x11 + - LP: #396601 + * ARM: IMX51: ENGR00112020 sgtl5000: resume fixes + - LP: #396601 + * ARM: IMX51: ENGR00112462 sgtl5000: don't mute adc in digital mute + - LP: #396601 + + [ Amit Kucheria ] + + * AUTO: Delete unncessary ABI/arch/flavours + * AUTO: Start new changelog and revert to known abi + * ARM: IMX51: Add SoC and board support for Freescale mx51 platform + * ARM: IMX51: Move board-mx51* header files to the correct location + * ARM: IMX51: Clean-up the craziness of including mxc_uart.h _everywhere_ + * ARM: IMX51: Make it compile. + * ARM: IMX51: Unconditionally disable CONFIG_GPIOLIB + * ARM: IMX51: Make ARCH_MXC auto-enable ARCH_MXC_CANONICAL + * ARM: IMX51: Enable ZONE_DMA for ARCH_MXC + * ARM: IMX51: Compile-in the IMX51 cpufreq driver by default + * ARM: IMX51: Fix isl29003 HWMON driver for i2c changes + * ARM: IMX51: Make video capture drivers compile + * ARM: Make ARM arch aware of ubuntu/ drivers + * ARM: IMX51: #include io.h to access __raw_writel and family + * ARM: IMX51: Fix compile of pmix_battery.c by replacing bus_id + * SAUCE: Add the rebase-branch script to this branch + * SAUCE: Customize rebase-branch script for this branch + * [Config] Make package name a variable for rebase-branch script + * [Config] rebase-branch script: We don't store generated files anymore + * [Config] Changed package name to linux-fsl-imx51 + * [Config] Add babbage flavour and only deal with armel arch + * [Config] Commmit Babbage kernel configs + * [Config] Put dummy -0.0 ABI to skip abi check + + [ Ann Thornton ] + + * ARM: IMX51: ENGR00109027-1 MX51 3-stack Fix suspend mode for regulator. + - LP: #396601 + * ARM: IMX51: ENGR00109244-1 MX51 Add GPO* regulators. + - LP: #396601 + * ARM: IMX51: ENGR00110536-1 Made files less regulator specific. + - LP: #396601 + * ARM: IMX51: ENGR00110536-4 mc13892: Added pmic_alloc_data function + - LP: #396601 + * ARM: IMX51: ENGR00110536-5 MX51: Got rid of compiler warning. + - LP: #396601 + + [ Arik Gubeskys ] + + * ARM: IMX51: ENGR00110765 Support of 720p in IPU/TVE + - LP: #396601 + + [ b02550 ] + + * ARM: IMX51: ENGR00112566 IPUv3: Reduce waiting time of ipu interrupt. + - LP: #396601 + * ARM: IMX51: ENGR00113242 IPUv3: Add new ioctl to get ipu channel type + of fb. + - LP: #396601 + + [ Brad Figg ] + + * ARM: IMX51: Add defines for DMA_MODE_READ/WRITE/MASK for pata_fsl + * ARM: IMX51: codec structure was moved to the card structure + * ARM: IMX51: snd_soc_machine structure replaced with snd_soc_card. + * ARM: IMX51: Get to bus_id by calling dev_name. + * ARM: IMX51: Added external declaration for mxc_map_io. + * ARM: IMX51: Removed the mxc_gpio_port structure. + * ARM: IMX51: mxc_timer_init prototype + * ARM: IMX51: Fix up merge error in Kconfig + * ARM: IMX51: Changed from snd_card_new to snd_card_create + * ARM: IMX51: ENGR00109027-2 API changes for new regulator interface. + - LP: #396601 + * ARM: IMX51: ENGR00107699 ipu: support new ipu device lib + - LP: #396601 + * ARM: IMX51: ENGR00108699 [MX51] eMMC4.3 card support + - LP: #396601 + * ARM: IMX51: ENGR00109146 DVFS: System can not go to APM if DVFS core is + enabled + - LP: #396601 + * ARM: IMX51: ENGR00111297 Fix vpu compiling error on mx31 + - LP: #396601 + * ARM: IMX51: ENGR00110257 unifi_fs: re-initialize chip every time insert + module + - LP: #396601 + * ARM: IMX51: ENGR00111670-5 MX51: Add Babbage2 platform support + - LP: #396601 + * ARM: IMX51: ENGR00106025-1 RTC: Add IMX DryIce RTC driver + - LP: #396601 + * ARM: IMX51: Add pmic_battery.h include file. + - LP: #396601 + * ARM: IMX51: ENGR00070770 MX51 SIM driver + - LP: #396601 + * ARM: IMX51: ENGR00112611 use resource_size instead of 'r->end - + r->start + 1' in usb dirver. + - LP: #396601 + * ARM: IMX51: ENGR00112081 Host mode not detecting device when OTG port + is in OTG mode + - LP: #396601 + * ARM: IMX51: ENGR00112509 : [MX37] failed to test our MSC driver with + USBCV 1.3. + - LP: #396601 + * ARM: IMX51: Added fsl_devices.h which is now a required file. + - LP: #396601 + * ARM: IMX51: Added gps_ioctrl/Kconfig and gps_ioctrl/agpsgpiodev.c + - LP: #396601 + * ARM: IMX51: ENGR00112121 eSDHC driver enhancementes + - LP: #396601 + * ARM: IMX51: ENGR00113154 TZIC: Correct Wakeup registers + - LP: #396601 + * ARM: IMX51: Adding missing file drivers/mxc/asrc/mxc_asrc.c + - LP: #396601 + * ARM: IMX51: Adding missing file include/linux/mxc_asrc.h + - LP: #396601 + * ARM: IMX51: ENGR00112918-1: Add support for SW controlled frequency + scaling. + - LP: #396601 + * ARM: IMX51: ENGR00093265 Add ASRC script and ASRC p2p script support in + SDMA driver + - LP: #396601 + * ARM: IMX51: ENGR00096014-1 ASRC-ESAI per_2_per transfer + - LP: #396601 + * ARM: IMX51: ENGR00096014-2 ASRC-SSI per_2_per transfer + - LP: #396601 + * ARM: IMX51: ENGR00113464 Fix compiling error for MX31-ads, MX31-3stack + and MX35-3stack + - LP: #396601 + + [ Ding Qiang ] + + * ARM: IMX51: ENGR00111976 Fix IPUv3 U/V offset setting issue + - LP: #396601 + + [ Dinh Nguyen ] + + * ARM: IMX51: Fix plat-mxc/timer.c to handle imx51 + * ARM: IMX51: IPU irq handler deadlock fix + * ARM: IMX51: ENGR00111670-4 ehci: move machine specific host2 init + - LP: #396601 + * ARM: IMX51: ENGR00112269 MX51: Warning is reported when rmmod g_ether + - LP: #396601 + + [ Jason ] + + * ARM: IMX51: ENGR00113505 Disable NAND driver interleave mode support + - LP: #396601 + + [ Jason Chen ] + + * ARM: IMX51: ENGR00109264 ipuv3 : CSC not correct for PP task + - LP: #396601 + * ARM: IMX51: ENGR00108639 ipuv3: add IC overlay support + - LP: #396601 + + [ Jason Liu ] + + * ARM: IMX51: UPSTREAM: FENCE: Do not use OOB with MLC NAND + + [ JasonHua ] + + * ARM: IMX51: ENGR00112920 MX51: Add GPS to support 2.6.28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00113294 GPS:Make gps driver default menuconfig to be + module config + - LP: #396601 + + [ Jun Li ] + + * ARM: IMX51: ENGR00111644 i.MX51 usb gadget mass storage data in failure + - LP: #396601 + * ARM: IMX51: ENGR00113254 build in usb drivers in default for i.MX51 + - LP: #396601 + * ARM: IMX51: ENGR00112832 fix copyright problem with Huashan USB gadget + patch + - LP: #396601 + + [ Katherine Lu ] + + * ARM: IMX51: ENGR00108533 Fix isl29003 may not be recognized after + system reboot + - LP: #396601 + * ARM: IMX51: ENGR00108706 Fix _ipu_dp_set_csc_coefficients can not set + the right csc value + - LP: #396601 + * ARM: IMX51: ENGR00108078 SPI: fail when spi IRQ number is zero + - LP: #396601 + * ARM: IMX51: ENGR00112870 SPI: workaround for chipselect pin may not + keep correct level + - LP: #396601 + * ARM: IMX51: ENGR00113473 MX51: Bluetooth not work when lp_apm be the + parent clk of uart + - LP: #396601 + + [ Lily Zhang ] + + * ARM: IMX51: ENGR00108339 Add TV Encoder V2 support for MX51 TO2 + - LP: #396601 + * ARM: IMX51: ENGR00107483 Revert [MX37] failed to test our MSC driver + with USBCV 1.3." + - LP: #396601 + * ARM: IMX51: ENGR00107688 ASOC: Resolve 24/32-bit mono wav playing + problem on sgtl5000 + - LP: #396601 + * ARM: IMX51: ENGR00111294 Not enter suspend state when the keypad is + pressed + - LP: #396601 + * ARM: IMX51: ENGR00111028 Fix boot failure on MX51 MC13892 1.1 board + with VBAT 4.2v + - LP: #396601 + * ARM: IMX51: ENGR00111996 Fix camera suspend issue in MX51 + - LP: #396601 + * ARM: IMX51: ENGR00112014 Add ATA support for MX51 3DS in 28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00112237 Add FM support in MX51 28 kernel + - LP: #396601 + * ARM: IMX51: ENGR00112275 fix break in imx51_defconfig + - LP: #396601 + * ARM: IMX51: ENGR00112841 MX51 BBG2: Add Power Key support + - LP: #396601 + * ARM: IMX51: ENGR00112977 Support the removal of debug board in MX51 + 3Stack + - LP: #396601 + + [ Lionel.Xu ] + + * ARM: IMX51: ENGR00110748 SGTL5000: Shut down i2s sclk/lrclk after audio + playback stops + - LP: #396601 + * ARM: IMX51: ENGR00111918 SGTL5000: Enable amixer controls Jack + Function/Speaker Function + - LP: #396601 + + [ Liu Ying ] + + * ARM: IMX51: ENGR00109084 IPUv3: Add DP SRM updates when + enabling/disabling DP_FG + - LP: #396601 + * ARM: IMX51: ENGR00106026-4 MX51: Add IIM platform device + - LP: #396601 + * ARM: IMX51: ENGR00109633 V4L2 capture: Fix enable/disable ov3640 + camera's mclk issue + - LP: #396601 + * ARM: IMX51: ENGR00109721 IPUv3:Fix the issue of resizing from 1280*720 + to 800*480 + - LP: #396601 + * ARM: IMX51: ENGR00110740-4 MX51:Build-in IIM driver + - LP: #396601 + * ARM: IMX51: ENGR00112265 MX51:GPIO change to enable CLAA WVGA panel + - LP: #396601 + * ARM: IMX51: ENGR00112184 IPUv3:Correct resersed input/output IRT EOF + bits + - LP: #396601 + * ARM: IMX51: ENGR00112716 MX51:Change CSI1 HSYNC and CSI1 VSYNC pads to + be GPIO pins + - LP: #396601 + * ARM: IMX51: ENGR00111687 IPUv3:Support IC local alpha blending + - LP: #396601 + * ARM: IMX51: ENGR00113088 MX51:Fix artifacts display issue on CLAA WVGA + panel + - LP: #396601 + * ARM: IMX51: ENGR00113302 MX51 Babbage:Support CLAA WVGA lcd panel + - LP: #396601 + * ARM: IMX51: ENGR00113478 IPUv1:Fix video play break without resizing + and rotation + - LP: #396601 + * ARM: IMX51: ENGR00106026-5 Add mxc IIM driver support + + [ Michal Ludvig ] + + * ARM: IMX51: ENGR00112200 Add cryptodev device + - LP: #396601 + + [ Nancy Chen ] + + * ARM: IMX51: ENGR00108856 Fix DVFS core can not be resumed from low + power mode + - LP: #396601 + * ARM: IMX51: ENGR00112279 DVFS CORE: Frequency and voltage keep changing + up and down + - LP: #396601 + + [ Raj Rajasekaran ] + + * ARM: IMX51: ENGR00104641: scc2_internals.h license info incorrect + - LP: #396601 + + [ Ran ] + + * ARM: IMX51: ENGR00113176: MX51:Add IPU vdi support + - LP: #396601 + + [ Ranjani Vaidyanathan-RA5478 ] + + * ARM: IMX51: ENGR00112123: MX51:Core at incorrect frequency at the lower + GP voltage. + - LP: #396601 + * ARM: IMX51: ENGR00108842-1 : Enable booting with CPU frequency set in + redboot. + - LP: #396601 + * ARM: IMX51: ENGR00108842-2 : MX51: Add support for CPU freq at 1GHz. + - LP: #396601 + * ARM: IMX51: ENGR00113058: MX51: BBG2 does not boot if freq in redboot + is not set to 1GHz. + - LP: #396601 + * ARM: IMX51: ENGR00112918-2: MX51: Add support for SW controlled + frequency scaling. + - LP: #396601 + + [ Richard Zhao ] + + * ARM: IMX51: ENGR00108905 sgtl5000: remove unneeded check of + spk_amp_event + - LP: #396601 + * ARM: IMX51: ENGR00109268 unifi_fs: don't reset chip if power is on by + default + - LP: #396601 + * ARM: IMX51: ENGR00109685 sgtl5000: fix headphone detect + - LP: #396601 + * ARM: IMX51: ENGR00111296: sgtl5000: fix Playback Volume min not 0 + - LP: #396601 + * ARM: IMX51: ENGR00112374 Make unifi v6 work + - LP: #396601 + + [ Richard Zhu ] + + * ARM: IMX51: ENGR00110144 [MX51]Two esdhc port can't work + simultaneously. + - LP: #396601 + * ARM: IMX51: ENGR00111242-2-MX51-3DS Enable the CONFIG_MMC_UNSAFE_RESUME + - LP: #396601 + * ARM: IMX51: ENGR00111242-3-MX51-DEF Enable the CONFIG_MMC_UNSAFE_RESUME + option + - LP: #396601 + * ARM: IMX51: ENGR00113061 [MX51] Enable the eSDHC slot2 on 2.6.28 + - LP: #396601 + + [ Rob Herring ] + + * ARM: IMX51: UPSTREAM: Add more cache memory types macros + * ARM: IMX51: ENGR00111670-1 ch7026: Return error when not present + - LP: #396601 + * ARM: IMX51: ENGR00111670-2 mxcfb: support mode string on command line + - LP: #396601 + * ARM: IMX51: ENGR00112201 mtd: export nand_do_read/write_ops functions + - LP: #396601 + + [ Robby Cai ] + + * ARM: IMX51: ENGR00111086 Add SYS SW Reset control for VPU + - LP: #396601 + + [ Sam Yang ] + + * ARM: IMX51: ENGR00111733 Onewire: Kernel dump when inserted mxc_w1 + module + - LP: #396601 + * ARM: IMX51: ENGR00112155 Error bool definition in ipu.h for user space + c++ compiler + - LP: #396601 + + [ Sammy He ] + + * ARM: IMX51: ENGR00108541 fix system crash issue due to trying to + display 1 frame on the LCD + - LP: #396601 + + [ Tim Gardner ] + + * [Config] Default arch is armel + + [ Wallace Wang ] + + * ARM: IMX51: ENGR00109285 SD/MMC: The SD card interrupt can't be + detected after system resume + - LP: #396601 + * ARM: IMX51: ENGR00111746 Sgtl5000: Bug fix + - LP: #396601 + * ARM: IMX51: ENGR00111751 Fix bug in the I2S Master mode + - LP: #396601 + * ARM: IMX51: ENGR00111946 Watchdog: oops when watchdog resume + - LP: #396601 + + [ William Lai ] + + * ARM: IMX51: ENGR00112889 ASRC driver multi-instance support + - LP: #396601 + + [ Wu Guoxing ] + + * ARM: IMX51: ENGR00111499 mx51:GPU 2D Clock Support + - LP: #396601 + * ARM: IMX51: ENGR00112010 mx51:set gpu3d clock parent to ahb clock + - LP: #396601 + * ARM: IMX51: ENGR00112203-2 mx51:CONFIG_FORCE_MAX_ZONEORDER Support + - LP: #396601 + * ARM: IMX51: ENGR00112238-2 mx51: change CONFIG_FORCE_MAX_ZONEORDER + - LP: #396601 + + [ Xiexiaobo ] + + * ARM: IMX51: ENGR00112477 SDHC: Remove GPIO pin inactive/active on + suspend/resume + - LP: #396601 + + [ Xinyu Chen ] + + * ARM: IMX51: ENGR00111681 MX51 Enable oprofile for L1 + - LP: #396601 + + [ Zhou Jingyu ] + + * ARM: IMX51: ENGR00109543 Sets mc13892 CHRGRAW scaling to divide by 5 + - LP: #396601 + * ARM: IMX51: ENGR00101496 MC13892 battery driver + - LP: #396601 + * ARM: IMX51: ENGR00111992 Support multiple ADC channel co-work + - LP: #396601 + + -- Amit Kucheria Fri, 07 Aug 2009 09:35:53 +0100 --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules @@ -0,0 +1,223 @@ +#!/usr/bin/make -f +# +# $(DEBIAN)/rules for Ubuntu linux +# +# Use this however you want, just give credit where credit is due. +# +# Copyright (c) 2007 Ben Collins +# + +ifeq ($(DEBIAN),) +DEBIAN=$(shell awk -F= '($$1 == "DEBIAN") { print $$2 }' $$new; \ + done + flavours="$(wildcard $(DEBIAN)/control.d/vars.* $(DEBIAN)/sub-flavours/*.vars)";\ + for i in $$flavours; do \ + $(SHELL) $(DEBIAN)/scripts/control-create $$i | \ + sed -e 's/PKGVER/$(release)/g' \ + -e 's/ABINUM/$(abinum)/g' \ + -e 's/SRCPKGNAME/$(src_pkg_name)/g' \ + >> $(DEBIAN)/control.stub; \ + done + cp $(DEBIAN)/control.stub $(DEBIAN)/control + +.PHONY: debian/control +debian/control: $(DEBIAN)/control.stub + rm -rf $(builddir)/modules $(builddir)/firmware \ + $(builddir)/kernel-versions $(builddir)/package-list \ + $(builddir)/$(DEBIAN) + mkdir -p $(builddir)/modules/$(arch)/ + cp $(DEBIAN)/d-i/modules/* $(builddir)/modules/$(arch)/ + mkdir -p $(builddir)/firmware/$(arch)/ + cp $(DEBIAN)/d-i/firmware/* $(builddir)/firmware/$(arch)/ + cp $(DEBIAN)/d-i/package-list $(DEBIAN)/d-i/kernel-versions $(builddir)/ + touch $(builddir)/modules/$(arch)/kernel-image + # kernel-wedge needs to poke around in $(DEBIAN)/ + ln -nsf $(CURDIR)/debian $(builddir)/debian + + # Some files may need to differ between architectures + if [ -d $(DEBIAN)/d-i/modules-$(arch) ]; then \ + cp $(DEBIAN)/d-i/modules-$(arch)/* \ + $(builddir)/modules/$(arch)/; \ + fi + if [ -d $(DEBIAN)/d-i/firmware-$(arch) ]; then \ + cp $(DEBIAN)/d-i/firmware-$(arch)/* \ + $(builddir)/firmware/$(arch)/; \ + fi + + # Remove unwanted stuff for this architecture + if [ -r "$(DEBIAN)/d-i/exclude-modules.$(arch)" ]; then \ + (cat $(DEBIAN)/d-i/exclude-modules.$(arch); \ + ls $(builddir)/modules/$(arch)/) | sort | uniq -d | \ + (cd $(builddir)/modules/$(arch)/; xargs rm -f); \ + fi + if [ -r "$(DEBIAN)/d-i/exclude-firmware.$(arch)" ]; then \ + (cat $(DEBIAN)/d-i/exclude-firmware.$(arch); \ + ls $(builddir)/firmware/$(arch)/) | sort | uniq -d | \ + (cd $(builddir)/firmware/$(arch)/; xargs rm -f); \ + fi + + # Per flavour module lists + flavour_modules=`ls $(DEBIAN)/d-i/modules.$(arch)-* 2>/dev/null` \ + || true; \ + if [ "$$flavour_modules" != "" ]; then \ + for flav in $$flavour_modules; do \ + name=`echo $$flav | sed 's/.*\/modules.$(arch)-//'`; \ + mkdir $(builddir)/modules/$(arch)-$$name; \ + (cd $(builddir)/modules/; tar cf - `cat ../$$flav`) | \ + (cd $(builddir)/modules/$(arch)-$$name/; tar xf -); \ + touch $(builddir)/modules/$(arch)-$$name/kernel-image; \ + done; \ + fi + flavour_firmware=`ls $(DEBIAN)/d-i/firmware.$(arch)-* 2>/dev/null` \ + || true; \ + if [ "$$flavour_firmware" != "" ]; then \ + for flav in $$flavour_firmware; do \ + name=`echo $$flav | sed 's/.*\/firmware.$(arch)-//'`; \ + mkdir $(builddir)/firmware/$(arch)-$$name; \ + (cd $(builddir)/firmware/; tar cf - `cat ../$$flav`) | \ + (cd $(builddir)/firmware/$(arch)-$$name/; tar xf -);\ + touch $(builddir)/firmware/$(arch)-$$name/kernel-image; \ + done; \ + fi + + # Some files may need to differ between flavours + flavour_module_dirs=`ls -d $(DEBIAN)/d-i/modules-$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_module_dirs" ]; then \ + for flav in $$flavour_module_dirs; do \ + name=`echo $$flav | sed 's/.*\/modules-$(arch)-//'`; \ + [ -d $(builddir)/modules/$(arch)-$$name ] || \ + cp -a $(builddir)/modules/$(arch) \ + modules/$(arch)-$$name; \ + cp $$flav/* $(builddir)/modules/$(arch)-$$name/; \ + done; \ + fi + flavour_firmware_dirs=`ls -d $(DEBIAN)/d-i/firmware-$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_firmware_dirs" ]; then \ + for flav in $$flavour_firmware_dirs; do \ + name=`echo $$flav | sed 's/.*\/firmware-$(arch)-//'`; \ + [ -d $(builddir)/firmware/$(arch)-$$name ] || \ + cp -a $(builddir)/firmware/$(arch) \ + firmware/$(arch)-$$name; \ + cp $$flav/* $(builddir)/firmware/$(arch)-$$name/; \ + done; \ + fi + + # Remove unwanted stuff for each flavour + flavour_exclude=`ls $(DEBIAN)/d-i/exclude-modules.$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_exclude" ]; then \ + for flav in $$flavour_exclude; do \ + name=`echo $$flav | sed 's/.*\/exclude-modules.$(arch)-//'`;\ + [ -d $(builddir)/modules/$(arch)-$$name ] || \ + cp -a $(builddir)/modules/$(arch) \ + $(builddir)/modules/$(arch)-$$name; \ + (cat $$flav; \ + ls $(builddir)/modules/$(arch)-$$name) | \ + sort | uniq -d | \ + (cd $(builddir)/modules/$(arch)-$$name/; \ + xargs rm -f); \ + done; \ + fi + flavour_exclude=`ls $(DEBIAN)/d-i/exclude-firmware.$(arch)-* 2>/dev/null`\ + || true; \ + if [ "$$flavour_exclude" ]; then \ + for flav in $$flavour_exclude; do \ + name=`echo $$flav | sed 's/.*\/exclude-firmware.$(arch)-//'`;\ + [ -d $(builddir)/firmware/$(arch)-$$name ] || \ + cp -a $(builddir)/firmware/$(arch) \ + $(builddir)/firmware/$(arch)-$$name; \ + (cat $$flav; \ + ls $(builddir)/firmware/$(arch)-$$name) | \ + sort | uniq -d | \ + (cd $(builddir)/firmware/$(arch)-$$name/; \ + xargs rm -f); \ + done; \ + fi + + if [ ! -d $(builddir)/modules/$(build_arch) ]; then \ + mkdir -p $(builddir)/modules/$(build_arch); \ + cp $(builddir)/modules/$(arch)/* \ + $(builddir)/modules/$(build_arch); \ + fi + if [ ! -d $(builddir)/firmware/$(build_arch) ]; then \ + mkdir -p $(builddir)/firmware/$(build_arch); \ + cp $(builddir)/firmware/$(arch)/* \ + $(builddir)/firmware/$(build_arch); \ + fi + + cp $(DEBIAN)/control.stub debian/control.stub + cd $(builddir) && kernel-wedge gen-control > $(CURDIR)/debian/control --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control @@ -0,0 +1,48 @@ +Source: linux-fsl-imx51 +Section: devel +Priority: optional +Maintainer: Ubuntu Kernel Team +Standards-Version: 3.6.1 +Build-Depends: debhelper (>= 3), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync +Build-Depends-Indep: xmlto, docbook-utils, gs, transfig, bzip2, sharutils +Build-Conflicts: findutils (= 4.4.1-1ubuntu1) +Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-karmic.git + + +Package: linux-image-2.6.31-612-imx51 +Architecture: armel +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda +Conflicts: hotplug (<< 0.0.20040105-1) +Recommends: flash-kernel +Suggests: fdutils, linux-fsl-imx51-doc-2.6.31 | linux-fsl-imx51-source-2.6.31 +Description: Linux kernel image for version 2.6.31 on I.MX51-based systems + This package contains the Linux kernel image for version 2.6.31 on + I.MX51-based systems. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports I.MX51 processors. + . + Babbage boards + . + You likely do not want to install this package directly. Instead, install + the linux-imx51 meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. + +Package: linux-headers-2.6.31-612-imx51 +Architecture: armel +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0), ${shlibs:Depends} +Description: Linux kernel headers for version 2.6.31 on I.MX51-based systems + This package provides kernel header files for version 2.6.31 on + I.MX51-based systems. + . + This is for sites that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-2.6.31-612/debian.README.gz for details. + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/package-list +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/package-list @@ -0,0 +1,119 @@ +Package: kernel-image + +Package: fat-modules +Depends: kernel-image +Priority: standard +Description: FAT filesystem support + This includes Windows FAT and VFAT support. + +Package: fs-core-modules +Depends: kernel-image +Priority: standard +Provides: jfs-modules, reiserfs-modules, xfs-modules +Description: Base filesystem modules + This includes jfs, reiserfs and xfs. + +Package: fs-secondary-modules +Depends: kernel-image, fat-modules +Priority: standard +Provides: ntfs-modules, hfs-modules +Description: Extra filesystem modules + This includes support for Windows NTFS and MacOS HFS/HFSPlus + +Package: input-modules +Depends: kernel-image, usb-modules +Priority: standard +Description: Support for various input methods + +Package: irda-modules +Depends: kernel-image, nic-shared-modules +Priority: standard +Description: Support for Infrared protocols + +Package: md-modules +Depends: kernel-image +Priority: standard +Description: Multi-device support (raid, device-mapper, lvm) + +Package: nic-modules +Depends: kernel-image, nic-shared-modules +Priority: standard +Description: Network interface support + +Package: nic-usb-modules +Depends: kernel-image, nic-shared-modules, usb-modules +Priority: standard +Description: USB network interface support + +Package: parport-modules +Depends: kernel-image +Priority: standard +Description: Parallel port support + +Package: plip-modules +Depends: kernel-image, nic-shared-modules, parport-modules +Priority: standard +Description: PLIP (parallel port) networking support + +Package: ppp-modules +Depends: kernel-image, nic-shared-modules, serial-modules +Priority: standard +Description: PPP (serial port) networking support + +Package: sata-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: SATA storage support + +Package: scsi-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: SCSI storage support + +Package: serial-modules +Depends: kernel-image +Priority: standard +Description: Serial port support + +Package: storage-core-modules +Depends: kernel-image +Priority: standard +Provides: loop-modules +Description: Core storage support + Includes core SCSI, LibATA, USB-Storage. Also includes related block + devices for CD, Disk and Tape medium (and IDE Floppy). + +Package: usb-modules +Depends: kernel-image, storage-core-modules +Priority: standard +Description: Core USB support + +Package: nfs-modules +Priority: standard +Depends: kernel-image +Description: NFS filesystem drivers + Includes the NFS client driver, and supporting modules. + +Package: block-modules +Priority: standard +Depends: kernel-image, storage-core-modules, parport-modules +Description: Block storage devices + This package contains the block storage devices, including DAC960 and + paraide. + +Package: crypto-modules +Priority: extra +Depends: kernel-image +Description: crypto modules + This package contains crypto modules. + +Package: socket-modules +Depends: kernel-image +Priority: standard +Description: Unix socket support + +Package: mouse-modules +Depends: kernel-image, input-modules, usb-modules +Priority: extra +Description: Mouse support + This package contains mouse drivers for the Linux kernel. --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/kernel-versions.in +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/kernel-versions.in @@ -0,0 +1,2 @@ +# arch version flavour installedname suffix bdep +armel PKGVER-ABINUM imx51 PKGVER-ABINUM-imx51 n --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/sata-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/sata-modules @@ -0,0 +1,2 @@ + +sata_mv --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/usb-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/usb-modules @@ -0,0 +1,9 @@ +ehci-hcd ? +isp116x-hcd +isp1760 +ohci-hcd ? +r8a66597-hcd +sl811_cs +sl811-hcd +u132-hcd +uhci-hcd ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/crypto-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/crypto-modules @@ -0,0 +1,8 @@ +aes_generic +blowfish +twofish +serpent +sha256_generic +cbc +ecb +crc32c --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/scsi-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/scsi-modules @@ -0,0 +1,114 @@ +# SCSI +raid_class ? +scsi_transport_spi ? +scsi_transport_fc ? +scsi_transport_iscsi ? +scsi_transport_sas ? +iscsi_tcp ? +libiscsi ? +amiga7xx ? +a3000 ? +a2091 ? +gvp11 ? +mvme147 ? +sgiwd93 ? +cyberstorm ? +cyberstormII ? +blz2060 ? +blz1230 ? +fastlane ? +oktagon_esp_mod ? +atari_scsi ? +mac_scsi ? +mac_esp ? +sun3_scsi ? +mvme16x ? +bvme6000 ? +sim710 ? +advansys ? +psi240i ? +BusLogic ? +dpt_i2o ? +u14-34f ? +ultrastor ? +aha152x ? +aha1542 ? +aha1740 ? +aic7xxx_old ? +ips ? +fd_mcs ? +fdomain ? +in2000 ? +g_NCR5380 ? +g_NCR5380_mmio ? +NCR53c406a ? +NCR_D700 ? +NCR_Q720_mod ? +sym53c416 ? +qlogicfas408 ? +qla1280 ? +pas16 ? +seagate ? +seagate ? +t128 ? +dmx3191d ? +dtc ? +zalon7xx ? +eata_pio ? +wd7000 ? +mca_53c9x ? +ibmmca ? +eata ? +dc395x ? +tmscsim ? +megaraid ? +atp870u ? +esp ? +gdth ? +initio ? +a100u2w ? +qlogicpti ? +ide-scsi ? +mesh ? +mac53c94 ? +pluto ? +dec_esp ? +3w-xxxx ? +3w-9xxx ? +ppa ? +imm ? +jazz_esp ? +sun3x_esp ? +fcal ? +lasi700 ? +nsp32 ? +ipr ? +hptiop ? +stex ? +osst ? +sg ? +ch ? +scsi_debug ? +aacraid ? +aic7xxx ? +aic79xx ? +aic94xx ? +arcmsr ? +acornscsi_mod ? +arxescsi ? +cumana_1 ? +cumana_2 ? +ecoscsi ? +oak ? +powertec ? +eesox ? +ibmvscsic ? +libsas ? +lpfc ? +megaraid_mm ? +megaraid_mbox ? +megaraid_sas ? +qla2xxx ? +sym53c8xx ? +qla4xxx ? +mvsas ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/fat-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/fat-modules @@ -0,0 +1,7 @@ +fat ? +vfat ? + +# Supporting modules ? +nls_cp437 ? +nls_iso8859-1 ? +nls_utf8 ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/storage-core-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/storage-core-modules @@ -0,0 +1,10 @@ +# Core stacks +usb-storage ? + +# Block level + +# Loop modules +cryptoloop + +# Needs to be here for better cdrom initrd layout +isofs --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/irda-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/irda-modules @@ -0,0 +1,30 @@ +act200l-sir +actisys-sir +ali-ircc ? +donauboe ? +esi-sir +girbil-sir +ircomm +ircomm-tty +irda +irda-usb +irlan +irnet +irport ? +irtty-sir +kingsun-sir +ks959-sir +ksdazzle-sir +litelink-sir +ma600-sir +mcp2120-sir +mcs7780 +nsc-ircc ? +old_belkin-sir +sir-dev +smsc-ircc2 ? +stir4200 +tekram-sir +via-ircc ? +vlsi_ir ? +w83977af_ir ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/block-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/block-modules @@ -0,0 +1,29 @@ +aoe +aten ? +bpck ? +bpck6 ? +cciss ? +comm ? +cpqarray ? +DAC960 ? +dstr ? +epat ? +epia ? +fit2 ? +fit3 ? +friq ? +frpw ? +kbic ? +ktti ? +nbd +on20 ? +on26 ? +paride ? +pcd ? +pd ? +pf ? +pg ? +pt ? +sx8 ? +umem ? +virtio_blk ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/mouse-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/mouse-modules @@ -0,0 +1,2 @@ +psmouse +usbmouse ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/plip-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/plip-modules @@ -0,0 +1 @@ +plip --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/ppp-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/ppp-modules @@ -0,0 +1,6 @@ +ppp_async +ppp_deflate +ppp_mppe +pppoe +pppox +ppp_synctty --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/fs-core-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/fs-core-modules @@ -0,0 +1,3 @@ +jfs +reiserfs +xfs --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/input-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/input-modules @@ -0,0 +1,21 @@ +hid-a4tech ? +hid-apple ? +hid-belkin ? +hid-bright ? +hid-cherry ? +hid-chicony ? +hid-cypress ? +hid-dell ? +hid-ezkey ? +hid-gyration ? +hid-logitech ? +hid-microsoft ? +hid-monterey ? +hid-petalynx ? +hid-pl ? +hid-samsung ? +hid-sony ? +hid-sunplus ? +hid-tmff ? +hid-zpff ? +usbhid --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/serial-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/serial-modules @@ -0,0 +1,3 @@ +generic_serial +serial_cs +synclink_cs --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/nic-usb-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/nic-usb-modules @@ -0,0 +1,12 @@ +catc ? +kaweth ? +pegasus ? +prism2_usb ? +rtl8150 ? +usbnet ? +zd1211rw ? +zd1201 ? +rt2500usb ? +rt73usb ? +rt2570 ? +asix ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/nfs-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/nfs-modules @@ -0,0 +1,4 @@ +nfs +nfs_acl ? +lockd +sunrpc --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/md-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/md-modules @@ -0,0 +1,13 @@ +dm-crypt +dm-zero +faulty +linear +multipath +raid0 +raid1 +raid10 +raid456 + +# Extras +dm-raid4-5 ? +dm-loop ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/nic-shared-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/nic-shared-modules @@ -0,0 +1,22 @@ +# PHY +8390 +mii ? + +# CRC modules +crc-ccitt +crc-itu-t +libcrc32c + +# mac80211 stuff +mac80211 +cfg80211 + +# rt2x00 lib (since rt2x00 is split across usb/pci/cb +rt2x00lib + +# Wireless 802.11 modules +lib80211 +cfg80211 +lib80211_crypt_ccmp +lib80211_crypt_tkip +lib80211_crypt_wep --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/nic-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/nic-modules @@ -0,0 +1,152 @@ +3c359 ? +3c501 ? +3c503 ? +3c505 ? +3c507 ? +3c509 ? +3c515 ? +3c523 ? +3c527 ? +3c59x ? +8139cp ? +8139too ? +82596 ? +abyss ? +ac3200 ? +adm8211 ? +airo ? +airport ? +amd8111e ? +arc4 ? +arcnet ? +arc-rawmode ? +arc-rimi ? +arlan ? +at1700 ? +atl1 ? +atl1e ? +atl2 ? +atmel ? +atmel_pci ? +b44 ? +bcm43xx ? +bcm43xx-mac80211 ? +bmac ? +bnx2 ? +bnx2x ? +bonding ? +cassini ? +com20020 ? +com20020-pci ? +com90io ? +com90xx ? +cs89x0 ? +de2104x ? +de4x5 ? +de600 ? +de620 ? +defxx ? +depca ? +dl2k ? +dmfe ? +dummy ? +e100 ? +e1000 ? +e1000e ? +e2100 ? +eepro ? +eepro100 ? +eexpress ? +epic100 ? +eql ? +es3210 ? +eth16i ? +ewrk3 ? +fealnx ? +forcedeth ? +igb ? +ps3_gelic ? +hamachi ? +hermes ? +hp ? +hp100 ? +hp-plus ? +ibmtr ? +ipddp ? +ipw2100 ? +ipw2200 ? +ipw3945 ? +ixgb ? +lance ? +lanstreamer ? +lasi_82596 ? +lne390 ? +lp486e ? +mace ? +mv643xx_eth ? +myri_sbus ? +natsemi ? +ne ? +ne2 ? +ne2k-pci ? +ne3210 ? +netconsole ? +netxen_nic ? +ni5010 ? +ni52 ? +ni65 ? +niu ? +ns83820 ? +olympic ? +orinoco ? +orinoco_pci ? +orinoco_plx ? +orinoco_tmd ? +pcnet32 ? +prism54 ? +r8169 ? +rate_control ? +rfc1051 ? +rfc1201 ? +rrunner ? +rt2400 ? +rt2500 ? +rt61pci ? +s2io ? +shaper ? +sis190 ? +sis900 ? +spidernet ? +skfp ? +skge ? +sk98lin ? +sky2 ? +smc9194 ? +smc-ultra ? +smc-ultra32 ? +starfire ? +strip ? +sunbmac ? +sundance ? +sungem ? +sungem_phy ? +sunhme ? +sunlance ? +sunqe ? +sunvnet ? +tg3 ? +tlan ? +tms380tr ? +tmspci ? +tulip ? +tun ? +typhoon ? +uli526x ? +via-rhine ? +via-velocity ? +virtio_net ? +wavelan ? +wd ? +winbond-840 ? +yellowfin ? +znet ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/parport-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/parport-modules @@ -0,0 +1,2 @@ +parport +parport_pc ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/modules/fs-secondary-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/modules/fs-secondary-modules @@ -0,0 +1,4 @@ +fuse ? +ntfs ? +hfs ? +hfsplus ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/firmware/README.txt +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/firmware/README.txt @@ -0,0 +1,4 @@ +# +# Place the names of udeb modules into this directory that require +# runtime firmware. +# --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/d-i/firmware/nic-modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/d-i/firmware/nic-modules @@ -0,0 +1,6 @@ +bnx2/bnx2-mips-06-4.6.16.fw ? +bnx2/bnx2-mips-09-4.6.17.fw ? +bnx2/bnx2-rv2p-06-4.6.16.fw ? +bnx2/bnx2-rv2p-09-4.6.15.fw ? +bnx2x-e1-4.8.53.0.fw ? +bnx2x-e1h-4.8.53.0.fw ? --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/2-binary-arch.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/2-binary-arch.mk @@ -0,0 +1,265 @@ +# We don't want make removing intermediary stamps +.SECONDARY : + +# Prepare the out-of-tree build directory + +prepare-%: $(stampdir)/stamp-prepare-% + @# Empty for make to be happy +$(stampdir)/stamp-prepare-%: target_flavour = $* +$(stampdir)/stamp-prepare-%: $(commonconfdir)/config.common.$(family) $(archconfdir)/config.common.$(arch) $(archconfdir)/config.flavour.% + @echo "Preparing $*..." + install -d $(builddir)/build-$* + touch $(builddir)/build-$*/ubuntu-build + cat $^ | sed -e 's/.*CONFIG_VERSION_SIGNATURE.*/CONFIG_VERSION_SIGNATURE="Ubuntu $(release)-$(revision)-$*"/' > $(builddir)/build-$*/.config + find $(builddir)/build-$* -name "*.ko" | xargs rm -f + $(kmake) O=$(builddir)/build-$* silentoldconfig prepare scripts + touch $@ + + +# Do the actual build, including image and modules +build-%: $(stampdir)/stamp-build-% + @# Empty for make to be happy +$(stampdir)/stamp-build-%: target_flavour = $* +$(stampdir)/stamp-build-%: $(stampdir)/stamp-prepare-% + @echo "Building $*..." + $(kmake) O=$(builddir)/build-$* $(conc_level) $(build_image) + $(kmake) O=$(builddir)/build-$* $(conc_level) modules + @touch $@ + +# Install the finished build +install-%: pkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$* +install-%: dbgpkgdir = $(CURDIR)/debian/$(dbg_pkg_name)-$* +install-%: basepkg = $(hdrs_pkg_name) +install-%: hdrdir = $(CURDIR)/debian/$(basepkg)-$*/usr/src/$(basepkg)-$* +install-%: target_flavour = $* +install-%: $(stampdir)/stamp-build-% checks-% install-headers + dh_testdir + dh_testroot + dh_clean -k -p$(bin_pkg_name)-$* + dh_clean -k -p$(hdrs_pkg_name)-$* + dh_clean -k -p$(dbg_pkg_name)-$* + + # The main image + # compress_file logic required because not all architectures + # generate a zImage automatically out of the box +ifeq ($(compress_file),) + install -m644 -D $(builddir)/build-$*/$(kernel_file) \ + $(pkgdir)/boot/$(install_file)-$(abi_release)-$* +else + install -d $(pkgdir)/boot + gzip -c9v $(builddir)/build-$*/$(kernel_file) > \ + $(pkgdir)/boot/$(install_file)-$(abi_release)-$* + chmod 644 $(pkgdir)/boot/$(install_file)-$(abi_release)-$* +endif + + install -m644 $(builddir)/build-$*/.config \ + $(pkgdir)/boot/config-$(abi_release)-$* + install -m644 $(abidir)/$* \ + $(pkgdir)/boot/abi-$(abi_release)-$* + install -m644 $(builddir)/build-$*/System.map \ + $(pkgdir)/boot/System.map-$(abi_release)-$* +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux +endif + + $(kmake) O=$(builddir)/build-$* modules_install \ + INSTALL_MOD_STRIP=1 INSTALL_MOD_PATH=$(pkgdir)/ \ + INSTALL_FW_PATH=$(pkgdir)/lib/firmware/$(abi_release)-$* + +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux +endif + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/build + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/source + + # Some initramfs-tools specific modules + install -d $(pkgdir)/lib/modules/$(abi_release)-$*/initrd + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko ]; then\ + ln -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko \ + $(pkgdir)/lib/modules/$(abi_release)-$*/initrd/; \ + fi + + # Now the image scripts + install -d $(pkgdir)/DEBIAN + for script in postinst postrm preinst prerm; do \ + sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g' \ + -e 's/=L/$(loader)/g' -e 's@=B@$(build_arch)@g' \ + $(DEBIAN)/control-scripts/$$script > $(pkgdir)/DEBIAN/$$script; \ + chmod 755 $(pkgdir)/DEBIAN/$$script; \ + done + +ifneq ($(skipsub),true) + set -e; for sub in $($(*)_sub); do \ + TO=$$sub FROM=$* ABI_RELEASE=$(abi_release) $(SHELL) \ + $(DEBIAN)/scripts/sub-flavour; \ + /sbin/depmod -b debian/$(bin_pkg_name)-$$sub \ + -ea -F debian/$(bin_pkg_name)-$$sub/boot/System.map-$(abi_release)-$* \ + $(abi_release)-$*; \ + install -d debian/$(bin_pkg_name)-$$sub/DEBIAN; \ + for script in postinst postrm preinst prerm; do \ + sed -e 's/=V/$(abi_release)-$*/g' \ + -e 's/=K/$(install_file)/g' \ + -e 's/=L/$(loader)/g' \ + -e 's@=B@$(build_arch)@g' \ + $(DEBIAN)/control-scripts/$$script > \ + debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\ + chmod 755 debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\ + done; \ + done +endif + + # The flavour specific headers image + # TODO: Would be nice if we didn't have to dupe the original builddir + install -d -m755 $(hdrdir) + cat $(builddir)/build-$*/.config | \ + sed -e 's/.*CONFIG_DEBUG_INFO=.*/# CONFIG_DEBUG_INFO is not set/g' > \ + $(hdrdir)/.config + chmod 644 $(hdrdir)/.config + $(kmake) O=$(hdrdir) silentoldconfig prepare scripts + # We'll symlink this stuff + rm -f $(hdrdir)/Makefile + rm -rf $(hdrdir)/include2 + # powerpc seems to need some .o files for external module linking. Add them in. +ifeq ($(arch),powerpc) + mkdir -p $(hdrdir)/arch/powerpc/lib + cp $(builddir)/build-$*/arch/powerpc/lib/*.o $(hdrdir)/arch/powerpc/lib +endif + # Script to symlink everything up + $(SHELL) $(DEBIAN)/scripts/link-headers "$(hdrdir)" "$(basepkg)" "$*" + # Setup the proper asm symlink + rm -f $(hdrdir)/include/asm + ln -s asm-$(asm_link) $(hdrdir)/include/asm + # The build symlink + install -d debian/$(basepkg)-$*/lib/modules/$(abi_release)-$* + ln -s /usr/src/$(basepkg)-$* \ + debian/$(basepkg)-$*/lib/modules/$(abi_release)-$*/build + # And finally the symvers + install -m644 $(builddir)/build-$*/Module.symvers \ + $(hdrdir)/Module.symvers + + # Now the header scripts + install -d $(CURDIR)/debian/$(basepkg)-$*/DEBIAN + for script in postinst; do \ + sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g' \ + $(DEBIAN)/control-scripts/headers-$$script > \ + $(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script; \ + chmod 755 $(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script; \ + done + + # + # Now drop in the arch independent headers. + # + rsync -a $(indep_hdrdir)/ $(hdrdir) + + # At the end of the package prep, call the tests + DPKG_ARCH="$(arch)" KERN_ARCH="$(build_arch)" FLAVOUR="$*" \ + VERSION="$(abi_release)" REVISION="$(revision)" \ + PREV_REVISION="$(prev_revision)" ABI_NUM="$(abinum)" \ + PREV_ABI_NUM="$(prev_abinum)" BUILD_DIR="$(builddir)/build-$*" \ + INSTALL_DIR="$(pkgdir)" SOURCE_DIR="$(CURDIR)" \ + run-parts -v $(DEBIAN)/tests + + # + # Remove files which are generated at installation by postinst, + # except for modules.order and modules.builtin + # + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.order + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.builtin + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.* + mv $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.builtin \ + $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin + mv $(pkgdir)/lib/modules/$(abi_release)-$*/_modules.order \ + $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order + +headers_tmp := $(CURDIR)/debian/tmp-headers +headers_dir := $(CURDIR)/debian/linux-libc-dev + +hmake := $(MAKE) -C $(CURDIR) O=$(headers_tmp) SUBLEVEL=$(SUBLEVEL) \ + EXTRAVERSION=-$(abinum) INSTALL_HDR_PATH=$(headers_tmp)/install \ + SHELL="$(SHELL)" ARCH=$(header_arch) + +install-arch-headers: + dh_testdir + dh_testroot + dh_clean -k -plinux-libc-dev + + rm -rf $(headers_tmp) + install -d $(headers_tmp) $(headers_dir)/usr/include/ + + $(hmake) $(defconfig) + mv $(headers_tmp)/.config $(headers_tmp)/.config.old + sed -e 's/^# \(CONFIG_MODVERSIONS\) is not set$$/\1=y/' \ + -e 's/.*CONFIG_LOCALVERSION_AUTO.*/# CONFIG_LOCALVERSION_AUTO is not set/' \ + $(headers_tmp)/.config.old > $(headers_tmp)/.config + $(hmake) silentoldconfig + $(hmake) headers_install + + ( cd $(headers_tmp)/install/include/ && \ + find . -name '.' -o -name '.*' -prune -o -print | \ + cpio -pvd --preserve-modification-time \ + $(headers_dir)/usr/include/ ) + + rm -rf $(headers_tmp) + +binary-arch-headers: install-arch-headers + dh_testdir + dh_testroot + +binary-%: pkgimg = $(bin_pkg_name)-$* +binary-%: pkghdr = $(hdrs_pkg_name)-$* +binary-%: dbgpkg = $(dbg_pkg_name)-$* +binary-%: install-% + dh_testdir + dh_testroot + + dh_installchangelogs -p$(pkgimg) + dh_installdocs -p$(pkgimg) + dh_compress -p$(pkgimg) + dh_fixperms -p$(pkgimg) + dh_installdeb -p$(pkgimg) + dh_gencontrol -p$(pkgimg) + dh_md5sums -p$(pkgimg) + dh_builddeb -p$(pkgimg) -- -Zbzip2 -z9 + + dh_installchangelogs -p$(pkghdr) + dh_installdocs -p$(pkghdr) + dh_compress -p$(pkghdr) + dh_fixperms -p$(pkghdr) + dh_shlibdeps -p$(pkghdr) + dh_installdeb -p$(pkghdr) + dh_gencontrol -p$(pkghdr) + dh_md5sums -p$(pkghdr) + dh_builddeb -p$(pkghdr) + +ifneq ($(skipsub),true) + @set -e; for sub in $($(*)_sub); do \ + pkg=$(bin_pkg_name)-$$sub; \ + dh_installchangelogs -p$$pkg; \ + dh_installdocs -p$$pkg; \ + dh_compress -p$$pkg; \ + dh_fixperms -p$$pkg; \ + dh_shlibdeps -p$$pkg; \ + dh_installdeb -p$$pkg; \ + dh_gencontrol -p$$pkg; \ + dh_md5sums -p$$pkg; \ + dh_builddeb -p$$pkg; \ + done +endif + +$(stampdir)/stamp-flavours: + @echo $(flavours) > $@ + +binary-debs: $(stampdir)/stamp-flavours $(addprefix binary-,$(flavours)) \ + binary-arch-headers + +build-arch: $(addprefix build-,$(flavours)) + +binary-arch-deps = binary-debs +ifeq ($(AUTOBUILD),) +binary-arch-deps += binary-udebs +endif +binary-arch: $(binary-arch-deps) --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/0-common-vars.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/0-common-vars.mk @@ -0,0 +1,120 @@ +# +# The source package name will be the first token from $(DEBIAN)/changelog +# +src_pkg_name=$(shell sed -n '1s/^\(.*\) (.*).*$$/\1/p' $(DEBIAN)/changelog) + +# Get some version info +release := $(shell sed -n '1s/^$(src_pkg_name).*(\(.*\)-.*).*$$/\1/p' $(DEBIAN)/changelog) +revisions := $(shell sed -n 's/^$(src_pkg_name)\ .*($(release)-\(.*\)).*$$/\1/p' $(DEBIAN)/changelog | tac) +revision ?= $(word $(words $(revisions)),$(revisions)) +prev_revisions := $(filter-out $(revision),0.0 $(revisions)) +prev_revision := $(word $(words $(prev_revisions)),$(prev_revisions)) + +family=ubuntu + +# This is an internally used mechanism for the daily kernel builds. It +# creates packages whose ABI is suffixed with a minimal representation of +# the current git HEAD sha. If .git/HEAD is not present, then it uses the +# uuidgen program, +# +# AUTOBUILD can also be used by anyone wanting to build a custom kernel +# image, or rebuild the entire set of Ubuntu packages using custom patches +# or configs. +AUTOBUILD= + +# +# This is a way to support some external variables. A good example is +# a local setup for ccache and distcc See LOCAL_ENV_CC and +# LOCAL_ENV_DISTCC_HOSTS in the definition of kmake. +# For example: +# LOCAL_ENV_CC="ccache distcc" +# LOCAL_ENV_DISTCC_HOSTS="localhost 10.0.2.5 10.0.2.221" +# +-include $(CURDIR)/../.karmic-env + +ifneq ($(AUTOBUILD),) +skipabi = true +skipmodule = true +gitver=$(shell if test -f .git/HEAD; then cat .git/HEAD; else uuidgen; fi) +gitverpre=$(shell echo $(gitver) | cut -b -3) +gitverpost=$(shell echo $(gitver) | cut -b 38-40) +abi_suffix = -$(gitverpre)$(gitverpost) +endif + +ifneq ($(NOKERNLOG),) +ubuntu_log_opts += --no-kern-log +endif +ifneq ($(PRINTSHAS),) +ubuntu_log_opts += --print-shas +endif + +abinum := $(shell echo $(revision) | sed -e 's/\..*//')$(abi_suffix) +prev_abinum := $(shell echo $(prev_revision) | sed -e 's/\..*//')$(abi_suffix) +abi_release := $(release)-$(abinum) + +uploadnum := $(shell echo $(revision) | sed -e 's/.*\.//') +ifneq ($(wildcard /CurrentlyBuilding),) + uploadnum := $(uploadnum)-Ubuntu +endif + +# We force the sublevel to be exactly what we want. The actual source may +# be an in development git tree. We want to force it here instead of +# committing changes to the top level Makefile +SUBLEVEL := $(shell echo $(release) | awk -F. '{print $$3}') + +arch := armel +abidir := $(CURDIR)/$(DEBIAN)/abi/$(release)-$(revision)/$(arch) +prev_abidir := $(CURDIR)/$(DEBIAN)/abi/$(release)-$(prev_revision)/$(arch) +commonconfdir := $(CURDIR)/$(DEBIAN)/config +archconfdir := $(CURDIR)/$(DEBIAN)/config/$(arch) +builddir := $(CURDIR)/debian/build +stampdir := $(CURDIR)/debian/stamps + +# +# The binary package name always starts with linux-image-$KVER-$ABI.$UPLOAD_NUM. There +# are places that you'll find linux-image hard coded, but I guess thats OK since the +# assumption that the binary package always starts with linux-image will never change. +# +bin_base_pkg_name=linux-image +bin_pkg_name=$(bin_base_pkg_name)-$(abi_release) +dbg_pkg_name=$(bin_base_pkg_name)-debug-$(abi_release) +hdrs_pkg_name=linux-headers-$(abi_release) + +# Support parallel= in DEB_BUILD_OPTIONS (see #209008) +# +# These 2 environment variables set the -j value of the kernel build. For example, +# CONCURRENCY_LEVEL=16 fakeroot $(DEBIAN)/rules binary-debs +# or +# DEB_BUILD_OPTIONS=parallel=16 fakeroot $(DEBIAN)/rules binary-debs +# +# The default is to use the number of CPUs. +# +COMMA=, +DEB_BUILD_OPTIONS_PARA = $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS)))) +ifneq (,$(DEB_BUILD_OPTIONS_PARA)) + CONCURRENCY_LEVEL := $(DEB_BUILD_OPTIONS_PARA) +endif + +ifeq ($(CONCURRENCY_LEVEL),) + # Check the environment + CONCURRENCY_LEVEL := $(shell echo $$CONCURRENCY_LEVEL) + # No? Then build with the number of CPUs on the host. + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := $(shell expr `getconf _NPROCESSORS_ONLN` \* 1) + endif + # Oh hell, give 'em one + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := 1 + endif +endif + +conc_level = -j$(CONCURRENCY_LEVEL) + +# target_flavour is filled in for each step +kmake = make ARCH=$(build_arch) \ + EXTRAVERSION=-$(abinum)-$(target_flavour) \ + CONFIG_DEBUG_SECTION_MISMATCH=y SUBLEVEL=$(SUBLEVEL) \ + KBUILD_BUILD_VERSION="$(uploadnum)" +ifneq ($(LOCAL_ENV_CC),) +kmake += CC=$(LOCAL_ENV_CC) DISTCC_HOSTS=$(LOCAL_ENV_DISTCC_HOSTS) +endif --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/1-maintainer.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/1-maintainer.mk @@ -0,0 +1,121 @@ +# The following targets are for the maintainer only! do not run if you don't +# know what they do. + +.PHONY: printenv updateconfigs printchanges insertchanges startnewrelease diffupstream help updateportsconfigs editportsconfigs + +help: + @echo "These are the targets in addition to the normal $(DEBIAN) ones:" + @echo + @echo " printenv : Print some variables used in the build" + @echo + @echo " updateconfigs : Update core arch configs" + @echo + @echo " editconfigs : Update core arch configs interractively" + @echo " genconfigs : Generate core arch configs in CONFIGS/*" + @echo + @echo " updateportsconfigs : Update ports arch configs" + @echo + @echo " editportsconfigs : Update ports arch configs interactivly" + @echo " genportconfigs : Generate ports arch configs in CONFIGS/*" + @echo + @echo " printchanges : Print the current changelog entries (from git)" + @echo + @echo " insertchanges : Insert current changelog entries (from git)" + @echo + @echo " startnewrelease : Start a new changelog set" + @echo + @echo " diffupstream : Diff stock kernel code against upstream (git)" + @echo + @echo " help : If you are kernel hacking, you need the professional" + @echo " version of this" + @echo + @echo "Environment variables:" + @echo + @echo " NOKERNLOG : Do not add upstream kernel commits to changelog" + @echo " CONCURRENCY_LEVEL=X" + @echo " : Use -jX for kernel compile" + @echo " PRINTSHAS : Include SHAs for commits in changelog" + +updateconfigs: + dh_testdir; + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig oldconfig + rm -rf build + +editconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig editconfig + rm -rf build + +genconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig genconfig + rm -rf build + +updateportsconfigs: + dh_testdir; + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig oldconfig ports + rm -rf build + +editportsconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig editconfig ports + rm -rf build + +genportsconfigs: + dh_testdir + $(SHELL) $(DEBIAN)/scripts/misc/kernelconfig genconfig ports + rm -rf build + +printenv: + dh_testdir + @echo "src package name = $(src_pkg_name)" + @echo "release = $(release)" + @echo "revisions = $(revisions)" + @echo "revision = $(revision)" + @echo "uploadnum = $(uploadnum)" + @echo "prev_revisions = $(prev_revisions)" + @echo "prev_revision = $(prev_revision)" + @echo "abinum = $(abinum)" + @echo "gitver = $(gitver)" + @echo "flavours = $(flavours)" + @echo "skipabi = $(skipabi)" + @echo "skipmodule = $(skipmodule)" + @echo "skipdbg = $(skipdbg)" + @echo "ubuntu_log_opts = $(ubuntu_log_opts)" +ifneq ($(SUBLEVEL),) + @echo "SUBLEVEL = $(SUBLEVEL)" +endif + @echo "CONCURRENCY_LEVEL = $(CONCURRENCY_LEVEL)" + @echo "bin package name = $(bin_pkg_name)" + @echo "hdr package name = $(hdrs_pkg_name)" + @echo "doc package name = $(doc_pkg_name)" + +printchanges: + @baseCommit=$$(git log --pretty=format:'%H %s' | \ + awk '/UBUNTU: '".*Ubuntu-$(release)-$(prev_revision)"'$$/ { print $$1; exit }'); \ + git log "$$baseCommit"..HEAD | \ + perl -w -f $(DEBIAN)/scripts/misc/git-ubuntu-log $(ubuntu_log_opts) + +insertchanges: + @perl -w -f $(DEBIAN)/scripts/misc/insert-changes.pl $(DEBIAN) + +diffupstream: + @git diff-tree -p refs/remotes/linux-2.6/master..HEAD $(shell ls | grep -vE '^(ubuntu|$(DEBIAN)|\.git.*)') + +startnewrelease: + dh_testdir + @nextminor=$(shell expr `echo $(revision) | awk -F. '{print $$2}'` + 1); \ + now="$(shell date -R)"; \ + echo "Creating new changelog set for $(abi_release).$$nextminor..."; \ + echo -e "$(src_pkg_name) ($(abi_release).$$nextminor) UNRELEASED; urgency=low\n" > $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Do not edit directly. Autogenerated at release." >> \ + $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Use the printchanges target to see the curent changes." \ + >> $(DEBIAN)/changelog.new; \ + echo " CHANGELOG: Use the insertchanges target to create the final log." \ + >> $(DEBIAN)/changelog.new; \ + echo -e "\n -- $$DEBFULLNAME <$$DEBEMAIL> $$now\n" >> \ + $(DEBIAN)/changelog.new ; \ + cat $(DEBIAN)/changelog >> $(DEBIAN)/changelog.new; \ + mv $(DEBIAN)/changelog.new $(DEBIAN)/changelog + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/5-udebs.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/5-udebs.mk @@ -0,0 +1,34 @@ +# Do udebs if not disabled in the arch-specific makefile +binary-udebs: binary-debs debian/control +ifeq ($(disable_d_i),) + @$(MAKE) --no-print-directory -f $(DEBIAN)/rules DEBIAN=$(DEBIAN) do-binary-udebs +endif + +do-binary-udebs: + dh_testdir + dh_testroot + + # unpack the kernels into a temporary directory + mkdir -p debian/d-i-${arch} + + imagelist=$$(cat $(builddir)/kernel-versions | grep ^${arch} | awk '{print $$4}') && \ + for i in $$imagelist; do \ + dpkg -x $$(ls ../$(bin_base_pkg_name)-$$i\_$(release)-$(revision)_${arch}.deb) \ + debian/d-i-${arch}; \ + /sbin/depmod -b debian/d-i-${arch} $$i; \ + done + + touch ignore-dups + export SOURCEDIR=$(CURDIR)/debian/d-i-${arch} && \ + cd $(builddir) && \ + kernel-wedge install-files && \ + kernel-wedge check + + # Build just the udebs + dilist=$$(dh_listpackages -s | grep "\-di$$") && \ + [ -z "$dilist" ] || \ + for i in $$dilist; do \ + dh_fixperms -p$$i; \ + dh_gencontrol -p$$i; \ + dh_builddeb -p$$i; \ + done --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/armel.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/armel.mk @@ -0,0 +1,11 @@ +build_arch = arm +header_arch = arm +asm_link = arm +defconfig = defconfig +flavours = imx51 +build_image = zImage +kernel_file = arch/$(build_arch)/boot/zImage +install_file = vmlinuz +no_dumpfile = true + +loader = grub --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/3-binary-indep.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/3-binary-indep.mk @@ -0,0 +1,25 @@ + +indep_hdrpkg = $(hdrs_pkg_name) +indep_hdrdir = $(CURDIR)/debian/$(indep_hdrpkg)/usr/src/$(indep_hdrpkg) +install-headers: + dh_testdir + dh_testroot + dh_clean -k -p$(indep_hdrpkg) + + install -d $(indep_hdrdir) + find . -path './debian' -prune -o -path './$(DEBIAN)' -prune \ + -o -path './include/*' -prune \ + -o -path './scripts/*' -prune -o -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) \ + -print | cpio -pd --preserve-modification-time $(indep_hdrdir) + cp -a drivers/media/dvb/dvb-core/*.h $(indep_hdrdir)/drivers/media/dvb/dvb-core + cp -a drivers/media/video/*.h $(indep_hdrdir)/drivers/media/video + cp -a drivers/media/dvb/frontends/*.h $(indep_hdrdir)/drivers/media/dvb/frontends + cp -a scripts include $(indep_hdrdir) + (find arch -name include -type d -print | \ + xargs -n1 -i: find : -type f) | \ + cpio -pd --preserve-modification-time $(indep_hdrdir) + +build-indep: +binary-indep: --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/rules.d/4-checks.mk +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/rules.d/4-checks.mk @@ -0,0 +1,26 @@ +# Check ABI for package against last release (if not same abinum) +abi-%: $(abidir)/% + @# Empty for make to be happy +$(abidir)/%: $(stampdir)/stamp-build-% + install -d $(abidir) + sed -e 's/^\(.\+\)[[:space:]]\+\(.\+\)[[:space:]]\(.\+\)$$/\3 \2 \1/' \ + $(builddir)/build-$*/Module.symvers | sort > $@ + +abi-check-%: $(abidir)/% + @perl -f $(DEBIAN)/scripts/abi-check "$*" "$(prev_abinum)" "$(abinum)" \ + "$(prev_abidir)" "$(abidir)" "$(skipabi)" + +# Check the module list against the last release (always) +module-%: $(abidir)/%.modules + @# Empty for make to be happy +$(abidir)/%.modules: $(stampdir)/stamp-build-% + install -d $(abidir) + find $(builddir)/build-$*/ -name \*.ko | \ + sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > $@ + +module-check-%: $(abidir)/%.modules + @perl -f $(DEBIAN)/scripts/module-check "$*" \ + "$(prev_abidir)" "$(abidir)" $(skipmodule) + +checks-%: abi-check-% module-check-% + @# Will be calling more stuff later --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control-scripts/postrm +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control-scripts/postrm @@ -0,0 +1,353 @@ +#! /usr/bin/perl +# -*- Mode: Cperl -*- +# image.postrm --- +# Author : Manoj Srivastava ( srivasta@glaurung.green-gryphon.com ) +# Created On : Sat May 15 11:05:13 1999 +# Created On Node : glaurung.green-gryphon.com +# Last Modified By : Manoj Srivastava +# Last Modified On : Wed Sep 13 11:26:19 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 57 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# $Id: image.postrm,v 1.31 2003/10/07 16:24:20 srivasta Exp $ +# + + +# +#use strict; #for debugging +use Cwd 'abs_path'; + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, or nettrom +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $initrd = "YES"; # initrd kernel +my $do_initrd = ''; # Normally, we don't +my $warn_initrd = 'YES'; # Normally we do +my $use_hard_links = ''; # hardlinks do not work across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # we shall not create a dangling link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my @boilerplate = (); +my @silotemplate = (); +my @quiktemplate = (); +my @palotemplate = (); +my @vmelilotemplate = (); +my $bootdevice = ''; +my $rootdevice = ''; +my $rootdisk = ''; +my $rootpartition = ''; +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_modules = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +chdir('/') or die "could not chdir to /:$!\n"; +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $warn_initrd = '' if /^\s*warn_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_modules = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $warn_initrd = "Yes" if /^\s*warn_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_modules = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + +if ($link_in_boot) { + $image_dest = "/$image_dir/"; + $image_dest =~ s|^/*|/|o; +} + +$image_dest = "$image_dest/"; +$image_dest =~ s|/+$|/|o; + +# The destdir may be gone by now. +if (-d "$image_dest") { + chdir("$image_dest") or die "could not chdir to $image_dest:$!\n"; +} + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) {$kimage = "vmlinuz"} # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) {$kimage = "vmlinuz"} # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage;} +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage;} +else {$kimage = "vmlinuz"} # default + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +sub remove_sym_link { + my $bad_image = $_[0]; + + warn "Removing symbolic link $bad_image \n"; + if ($loader =~ /lilo/i) + { + warn "Unless you used the optional flag in lilo, \n"; + } + warn " you may need to re-run your boot loader" . ($loader ? "[$loader]":"") + . "\n"; + # Remove the dangling link + unlink "$bad_image"; +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +sub CanonicalizePath { + my $path = join '/', @_; + my @work = split '/', $path; + my @out; + my $is_absolute; + + if (@work && $work[0] eq "") { $is_absolute = 1; shift @work; } + + while (@work) { + my $seg = shift @work; + if ($seg eq "." || $seg eq "") { + } elsif ($seg eq "..") { + if (@out && $out[-1] ne "..") { + pop @out; + } else { + # Leading "..", or "../..", etc. + push @out, $seg; + } + } else { + push @out, $seg; + } + } + + unshift @out, "" if $is_absolute; + return join('/', @out); +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +# This removes dangling symlinks. What do we do about hard links? Surely a +# something with the nane $image_dest . "$kimage" ought not to be left behind? +sub image_magic { + my $kimage = $_[0]; + my $image_dest = $_[1]; + + if (-l "$kimage") { + # There is a symbolic link + my $force_move = 0; + my $vmlinuz_target = readlink "$kimage"; + my $real_target = ''; + $real_target = abs_path($vmlinuz_target) if defined ($vmlinuz_target); + if (!defined($vmlinuz_target) || ! -f "$real_target") { + # what, a dangling symlink? + warn "The link " . $image_dest . "$kimage is a damaged link\n"; + # Remove the dangling link + &remove_sym_link("$kimage"); + } + else { + my $canonical_target = CanonicalizePath("$vmlinuz_target"); + if (! -e $canonical_target) { + warn "The link " . $image_dest . "$kimage is a dangling link\n"; + &remove_sym_link("$kimage"); + } + } + } +} + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + warn "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + warn "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if ($postrm_hook) { + &run_hook("postrm", $postrm_hook); +} +if (-d "/etc/kernel/postrm.d") { + warn "Examining /etc/kernel/postrm.d .\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postrm.d") && + die "Failed to process /etc/kernel/postrm.d"; +} +if (-d "/etc/kernel/postrm.d/$version") { + warn "Examining /etc/kernel/postrm.d/$version .\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postrm.d/$version") && + die "Failed to process /etc/kernel/postrm.d/$version"; +} + +# check and remove damaged and dangling symlinks +if ($ARGV[0] !~ /upgrade/) { + system("$ramdisk -d -k " . $version . " > /dev/null 2>&1"); + if (-f $realimageloc . "initrd.img-$version.bak") { + unlink $realimageloc . "initrd.img-$version.bak"; + } + image_magic($kimage, $image_dest); + image_magic($kimage . ".old", $image_dest); + image_magic("initrd.img", $image_dest) if $initrd; + image_magic("initrd.img.old", $image_dest) if $initrd; +} + +exit 0; + +__END__ + + + + + + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control-scripts/postinst +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control-scripts/postinst @@ -0,0 +1,1087 @@ +#! /usr/bin/perl +# OriginalAuthor : Manoj Srivastava ( srivasta@pilgrim.umass.edu ) +# +# Customized for Ubuntu by: Ben Collins + +#use strict; #for debugging +use Cwd 'abs_path'; + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, nettrom, arcboot or delo +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $relative_links = ""; # target machine defined +my $initrd = "YES"; # initrd kernel +my $do_initrd = ''; # Normally we do not +my $use_hard_links = ''; # hardlinks do not work across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; # List of tools to create initial ram fs. +my $notifier = "/usr/share/update-notifier/notify-reboot-required"; +my $package_name = "linux-image-$version"; +my $explicit_do_loader = 'Yes'; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; +$Loader = "ARCBOOT" if $loader =~ /^arcboot/io; +$Loader = "DELO" if $loader =~ /^delo/io; + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $silent_modules = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +my $modules_base = '/lib/modules'; +my $CONF_LOC = '/etc/kernel-img.conf'; + +# Ignore all invocations except when called on to configure. +exit 0 unless $ARGV[0] =~ /configure/; + +my $DEBUG = 0; + +# Do some preliminary sanity checks here to ensure we actually have an +# valid image dir +chdir('/') or die "could not chdir to /:$!\n"; +die "Internal Error: ($image_dir) is not a directory!\n" + unless -d $image_dir; + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; +die "Internal Error: ($realimageloc) is not a directory!\n" + unless -d $realimageloc; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlink\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $explicit_do_loader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_modules = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $explicit_do_loader = "YES" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_modules = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + + + +# For some versions of kernel-package, we had this warning in the +# postinst, but the rules did not really interpolate the value in. +# Here is a sanity check. +my $pattern = "=" . "I"; +$initrd=~ s/^$pattern$//; + +if ($link_in_boot) { + $image_dest = "/$image_dir/"; # same as realimageloc +} + +# Tack on at least one trainling / +$image_dest = "$image_dest/"; +$image_dest =~ s|^/*|/|o; +$image_dest =~ s|/+$|/|o; + +if (! -d "$image_dest") { + die "Expected Image Destination dir ($image_dest) to be a valid directory!\n"; +} + +# sanity +if (!($do_bootfloppy || $do_bootloader)) { + $do_boot_enable = ''; +} +if ($do_symlink && $no_symlink) { + warn "Both do_symlinks and no_symlinks options enabled; disabling no_symlinks\n"; + $no_symlink = 0; +} + +# most of our work is done in $image_dest (nominally /) +chdir("$image_dest") or die "could not chdir to $image_dest:$!\n"; + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) { $kimage = "vmlinuz"; } # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz"; } # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage; } +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage; } +else { $kimage = "vmlinuz"; } # Default + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + + +die "Internal Error: Could not find image (" . $realimageloc + . "$kimage-$version)\n" unless -e $realimageloc + . "$kimage-$version"; + +# search for the boot loader in the path +my $loader_exec; +($loader_exec = $loader) =~ s|.*/||; +my ($loaderloc) = grep -x, map "$_/$loader_exec", + map { length($_) ? $_ : "." } split /:/, $ENV{PATH}; + + +###################################################################### +###################################################################### +########### Test whether a relative symlinkwould be OK ####### +###################################################################### +###################################################################### +sub test_relative { + my %params = @_; + my $cwd; + + die "Internal Error: Missing Required paramater 'Old Dir' " + unless $params{'Old Dir'}; + die "Internal Error: Missing Required paramater New Dir' " + unless $params{'New Dir'}; + + + die "Internal Error: No such dir $params{'Old Dir'} " + unless -d $params{'Old Dir'}; + die "Internal Error: No such dir $params{'New Dir'} " + unless -d $params{'New Dir'}; + + warn "Test relative: testing $params{'Old Dir'} -> $params{'New Dir'}" + if $DEBUG; + chomp($cwd = `pwd`); + chdir ($params{'New Dir'}) or die "Could not chdir to $params{'New Dir'}:$!"; + my $ok = 0; + $params{'Old Dir'} =~ s|^/*||o; + if (-d $params{'Old Dir'} ) { + if (defined $params{'Test File'}) { + if (-e $params{'Old Dir'} . $params{'Test File'}) { + $ok = 1; + } + } else { + $ok = 1; # well, backward compatibility + } + } + chdir ($cwd) or die "Could not chdir to $params{'New Dir'}:$!"; + return $ok; +} + +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### +# sub CanonicalizePath { +# my $path = join '/', @_; +# my @work = split '/', $path; +# my @out; +# my $is_absolute; + +# if (@work && $work[0] eq "") { +# $is_absolute = 1; shift @work; +# } + +# while (@work) { +# my $seg = shift @work; +# if ($seg eq "." || $seg eq "") { +# } +# elsif ($seg eq "..") { +# if (@out && $out[-1] ne "..") { +# pop @out; +# } +# else { +# # Leading "..", or "../..", etc. +# push @out, $seg; +# } +# } +# else { +# push @out, $seg; +# } +# } + +# unshift @out, "" if $is_absolute; +# return join('/', @out); +# } +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### + +sub spath { + my %params = @_; + + die "Missing Required paramater 'Old'" unless $params{'Old'}; + die "Missing Required paramater 'New'" unless $params{'New'}; + + my @olddir = split '/', `readlink -q -m $params{'Old'}`; + my @newdir = split '/', `readlink -q -m $params{'New'}`; + my @outdir = @olddir; + + my $out = ''; + my $i; + for ($i = 0; $i <= $#olddir && $i <= $#newdir; $i++) { + $out++ if ($olddir[$i] ne $newdir[$i]); + shift @outdir unless $out; + unshift @outdir, ".." if $out; + } + if ($#newdir > $#olddir) { + for ($i=0; $i < $#newdir; $i++) { + unshift @outdir, ".."; + } + } + return join ('/', @outdir); +} +###################################################################### +###################################################################### +############ +###################################################################### +###################################################################### + + +# This routine actually moves the kernel image +# From: $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12) +# To: $image_dest/$kimage-$version (/vmlinuz-2.6.12) +# Note that the image is moved to a versioned destination, but ordinary +# symlinks we create otherwise are not normally versioned +sub really_move_image { + my $src_dir = $_[0]; + my $target = $_[1]; + my $dest_dir = $_[2]; + + warn "Really move image: src_dir=$src_dir, target=$target,\n destdir=$dest_dir" + if $DEBUG; + if (-e "$target") { + # we should be in dir $dest_dir == $image_dest /, normally + rename("$target", "$target.$$") || + die "failed to move " . $dest_dir . "$target:$!"; + warn "mv $target $target.$$" if $DEBUG; + } + warn "mv -f $src_dir$target $target" if $DEBUG; + my $ret = system("mv -f " . $src_dir . "$target " . + " $target"); + if ($ret) { + die("Failed to move " . $src_dir . "$target to " + . $dest_dir . "$target.\n"); + } + # Ok, now we may clobber the previous .old files + if (-e "$target.$$") { + rename("$target.$$", "$target.old") || + die "failed to move " . $dest_dir . "$target:$!"; + warn "mv $target.$$ $target " if $DEBUG; + } +} + +# Normally called after really_move_image; and only called if we asked for +# reversed link this routine reverses the symbolic link that is notmally +# created. Since the real kernel image has been moved over to +# $image_dest/$kimage-$version. So, this routine links +# From: $image_dest/$kimage-$version (/vmlinuz-2.6.12) +# To: $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12) +sub really_reverse_link { + my $src_dir = $_[0]; + my $link_name = $_[1]; + my $dest_dir = $_[2]; + warn "Really reverse link: src_dir=$src_dir, link name=$link_name\n" . + "\tdestdir=$dest_dir" if $DEBUG; + + my $Old = $dest_dir; + if (test_relative ('Old Dir' => $Old, 'New Dir' => $src_dir, + 'Test File' => "$link_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$src_dir" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + link($Old . "$link_name", $src_dir . "$link_name") || + die("Failed to link " . $dest_dir . "$link_name to " . $src_dir . + "$link_name .\n"); + warn "ln " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG; + } + else { + symlink($Old . "$link_name", $src_dir . "$link_name") || + die("Failed to symbolic-link " . $dest_dir . "$link_name to " . $src_dir + . "$link_name .\n"); + warn "ln -s " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG; + } +} + +# This routine is invoked if there is a symbolic link in place +# in $image_dest/$kimage -- so a symlink exists in the destination. +# What we are trying to determine is if we need to move the symbolic link over +# to the the .old location +sub move_p { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + my $force_move = 0; + warn "Move?: kimage=$kimage, image_dest=$image_dest, \n" . + "\timage_name=$image_name, src_dir=$src_dir" if $DEBUG; + + if ($no_symlink || $reverse_symlink) { + # we do not want links, yet we have a symbolic link here! + warn "found a symbolic link in " . $image_dest . "$kimage \n" . + "even though no_symlink is defined\n" if $no_symlink; + warn "found a symbolic link in " . $image_dest . "$kimage \n" . + "even though reverse_symlink is defined\n" if $reverse_symlink; + # make sure we change this state of affairs + $force_move = 1; + return $force_move; + } + + warn "DEBUG: OK. We found symlink, and we should have a symlink here.\n" + if $DEBUG; + my $vmlinuz_target = readlink "$kimage"; + my $real_target = ''; + my $target = `readlink -q -m "${realimageloc}${kimage-$version}"`; + $real_target = abs_path($vmlinuz_target) if defined($vmlinuz_target); + + if (!defined($vmlinuz_target) || ! -f "$real_target") { + # what, a dangling symlink? + warn "The link " . $image_dest . "$kimage is a dangling link" . + "to $real_target\n"; + $force_move = 1; + return $force_move; + } + + + warn "DEBUG: The link $kimage points to ($vmlinuz_target)\n" if $DEBUG; + warn "DEBUG: ($vmlinuz_target) is really ($real_target)\n" if $DEBUG; + my $cwd; + chomp ($cwd=`pwd`); + if ($vmlinuz_target !~ m|^/|o) { + $vmlinuz_target = $cwd . "/" . $vmlinuz_target; + $vmlinuz_target =~ s|/+|/|o; + } + $vmlinuz_target = `readlink -q -m $vmlinuz_target`; + + if ("$vmlinuz_target" ne "$target") { + warn "DEBUG: We need to handle this.\n" if $DEBUG; + if ($minimal_swap) { + warn "DEBUG: Minimal swap.\n" if $DEBUG; + if (-l "$kimage.old") { + warn "DEBUG: There is an old link at $kimage.old\n" if $DEBUG; + my $old_target = readlink "$kimage.old"; + my $real_old_target = ''; + $real_old_target=abs_path($old_target) if defined ($old_target); + + if ($real_old_target && -f "$real_old_target") { + if ($old_target !~ m|^/|o) { + $old_target = $cwd . "/" . $old_target; + $old_target =~ s|/+|/|o; + } + $old_target = `readlink -q -m $old_target`; + if ("$old_target" ne "$target") { + $force_move = 1; + warn "DEBUG: Old link ($old_target) does not point to us ($target)\n" + if $DEBUG; + } + else { # The .old points to the current + warn "$kimage.old --> $target -- doing nothing"; + $force_move = 0; + } + } + else { + warn "DEBUG: Well, the old link does not exist -- so we move\n" + if $DEBUG; + $force_move = 1; + } + } + else { + warn "DEBUG: No .old link -- OK to move\n" + if $DEBUG; + $force_move = 1; + } + } + else { + warn "DEBUG: ok, minimal swap is no-- so we move.\n" + if $DEBUG; + $force_move = 1; + } + } + else { # already have proper link + warn "$kimage($vmlinuz_target) points to $target ($real_target) -- doing nothing"; + $force_move = 0; + } + return $force_move; +} + + +# This routine moves the symbolic link around (/vmlinuz -> /vmlinuz.old) +# It pays attention to whether we should the fact whether we should be using +# hard links or not. +sub really_move_link { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "really_move_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # don't clobber $kimage.old quite yet + rename("$kimage", "$kimage.$$") || + die "failed to move " . $image_dest . "$kimage:$!"; + warn "mv $kimage $kimage.$$" if $DEBUG; + my $Old = $src_dir; + my $cwd; + + chomp($cwd=`pwd`); + if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd, + 'Test File' => "$image_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + warn "ln ${Old}${image_name} $kimage" if $DEBUG; + if (! link("${Old}${image_name}", "$kimage")) { + rename("$kimage.$$", "$kimage"); + die("Failed to link ${Old}${image_name} to " . + "${image_dest}${kimage}.\n"); + } + } + else { + warn "ln -s ${Old}${image_name} $kimage" if $DEBUG; + if (! symlink("${Old}${image_name}", "$kimage")) { + rename("$kimage.$$", "$kimage"); + die("Failed to symbolic-link ${Old}${image_name} to " . + "${image_dest}${kimage}.\n"); + } + } + + # Ok, now we may clobber the previous .old file + if (-l "$kimage.old" || ! -e "$kimage.old" ) { + rename("$kimage.$$", "$kimage.old"); + warn "mv $kimage.$$ $kimage.old" if $DEBUG; + } + else { + warn "$kimage.old is not a symlink, not clobbering\n"; + warn "rm $kimage.$$"; + unlink "$kimage.$$" if $DEBUG; + } +} + +# This routine handles a request to do symlinks, but there is no +# symlink file already there. Either we are supposed to use copy, or we are +# installing on a pristine system, or the user does not want symbolic links at +# all. We use a configuration file to tell the last two cases apart, creating +# a config file if needed. +sub handle_missing_link { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "handle_missing_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + if ($no_symlink) { + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc . + "$image_name " . " $kimage"); + if ($ret) { + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + elsif ($reverse_symlink) { + warn "mv -f $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("mv -f " . $realimageloc . "$image_name " + . "$kimage"); + if ($ret) { + die("Failed to move " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + else { + if (! $have_conffile) { + my $ret; + my $answer=''; + $do_symlink = "Yes"; + + if (open(CONF, ">$CONF_LOC")) { + print CONF "# Kernel Image management overrides\n"; + print CONF "# See kernel-img.conf(5) for details\n"; + if ($loader =~ /palo/i) { + print CONF "link_in_boot = Yes\n"; + print CONF "do_symlinks = Yes\n"; + print CONF "relative_links = Yes\n"; + print CONF "do_bootloader = No\n"; + } else { + print CONF "do_symlinks = $do_symlink\n"; + } + close CONF; + } + $have_conffile = "Yes"; + } + } + + if (! $no_symlink && $do_symlink =~ /Yes/i) { + my $Old = $realimageloc; + my $New = $image_dest; + my $Name = "$image_name"; + my $Link_Dest = "$kimage"; + + if ($reverse_symlink) { + $Old = $image_dest; + $New = $realimageloc; + $Name = "$kimage"; + $Link_Dest = $realimageloc . "$image_name"; + } + if (test_relative ('Old Dir' => $Old, + 'New Dir' => $New, + 'Test File' => $Name)) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$New" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + symlink($Old . "$Name", "$Link_Dest") || + die("Failed to symbolic-link ${Old}$Name to $Link_Dest.\n"); + warn "ln -s ${Old}$Name $Link_Dest" if $DEBUG; + + } +} + +# This routine handles the rest of the cases, where the user has requested +# non-traditional handling, like using cp, or reverse symlinks, or hard links. +sub handle_non_symlinks { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = $_[2]; + my $src_dir = $_[3]; + warn "handle_non_link: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # Save the current image. We do this in all four cases + rename("$kimage", "$kimage.$$") || + die "failed to move " . $image_dest . "$kimage:$!"; + warn "mv $kimage $kimage.$$" if $DEBUG; + + ##,#### + # case One + #`#### + if ($no_symlink) { + # Maybe /$image_dest is on a dos system? + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc + . "$image_name " . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + rename("$kimage.$$", "$kimage"); + warn "mv $kimage.$$ $kimage" if $DEBUG; + } + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + ##,#### + # case Two + #`#### + elsif ($reverse_symlink) { # Maybe /$image_dest is on a dos system? + warn "mv -f $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("mv -f " . $realimageloc . "$image_name " + . $image_dest . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + rename("$kimage.$$", "$kimage"); + warn "mv $kimage.$$ $kimage" if $DEBUG; + } + die("Failed to move " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + my $Old = $image_dest; + if (test_relative ('Old Dir' => $Old, 'New Dir' => $realimageloc, + 'Test File' => "$kimage")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$realimageloc" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + if ($use_hard_links =~ m/YES/i) { + warn "ln " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG; + if (! link($Old . "$kimage", $realimageloc . "$image_name")) { + warn "Could not link " . $image_dest . + "$kimage to $image_name :$!"; + } + } + else { + warn "ln -s " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG; + if (! symlink($Old . "$kimage", $realimageloc . "$image_name")) { + warn "Could not symlink " . $image_dest . + "$kimage to $image_name :$!"; + } + } + } + ##,#### + # case Three + #`#### + elsif ($use_hard_links =~ m/YES/i ) { + # Ok then. this ought to be a hard link, and hence fair game + # don't clobber $kimage.old quite yet + my $Old = $realimageloc; + my $cwd; + chomp($cwd=`pwd`); + if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd, + 'Test File' => "$image_name")) { + $Old =~ s|^/*||o; + } + # Special case is they are in the same dir + my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" ); + $Old ="" if $rel_path =~ m/^\s*$/o; + + warn "ln " . $Old . "$image_name " . "$kimage" if $DEBUG; + if (! link($Old . "$image_name", "$kimage")) { + warn "mv $kimage.$$ $kimage" if $DEBUG; + rename("$kimage.$$", "$kimage"); + die("Failed to link " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + ##,#### + # case Four + #`#### + else { + # We just use cp + warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG; + my $ret = system("cp -a --backup=t " . $realimageloc + . "$image_name " . "$kimage"); + if ($ret) { + if (-e "$kimage.$$") { + warn "mv $kimage.$$ $kimage" if $DEBUG; + rename("$kimage.$$", "$kimage"); + } + die("Failed to copy " . $realimageloc . "$image_name to " + . $image_dest . "$kimage .\n"); + } + } + # Ok, now we may clobber the previous .old file + warn "mv $kimage.$$ $kimage.old if -e $kimage.$$" if $DEBUG; + rename("$kimage.$$", "$kimage.old") if -e "$kimage.$$"; +} + +# This routine is responsible for setting up the symbolic links +# So, the actual kernel image lives in +# $realimageloc/$image_name (/boot/vmlinuz-2.6.12). +# This routine creates symbolic links in $image_dest/$kimage (/vmlinuz) +sub image_magic { + my $kimage = $_[0]; # Name of the symbolic link + my $image_dest = $_[1]; # The directory the links goes into + my $image_name = "$kimage-$version"; + my $src_dir = $realimageloc; + warn "image_magic: kimage=$kimage, image_dest=$image_dest\n" . + "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG; + + # Well, in any case, if the destination (the symlink we are trying + # to create) is a directory, we should do nothing, except throw a + # diagnostic. + if (-d "$kimage" ) { + die ("Hmm. $kimage is a directory, which I did not expect. I am\n" . + "trying to create a symbolic link with that name linked to \n" . + "$image_dest . Since a directory exists here, my assumptions \n" . + "are way off, and I am aborting.\n" ); + exit (3); + } + + if ($move_image) { # Maybe $image_dest is in on dos, or something? + # source dir, link name, dest dir + really_move_image( $realimageloc, $image_name, $image_dest); + really_reverse_link($realimageloc, $image_name, $image_dest) + if $reverse_symlink; + return; + } + + if (-l "$kimage") { # There is a symbolic link + warn "DEBUG: There is a symlink for $kimage\n" if $DEBUG; + my $force_move = move_p($kimage, $image_dest, $image_name, $src_dir); + + if ($force_move) { + really_move_link($kimage, $image_dest, $image_name, $src_dir); + } + } + elsif (! -e "$kimage") { + # Hmm. Pristine system? How can that be? Installing from scratch? + # Or maybe the user does not want a symbolic link here. + # Possibly they do not want a link here. (we should be in / + # here[$image_dest, really] + handle_missing_link($kimage, $image_dest, $image_name, $src_dir); + } + elsif (-e "$kimage" ) { + # OK, $kimage exists -- but is not a link + handle_non_symlinks($kimage, $image_dest, $image_name, $src_dir); + } +} + +###################################################################### +###################################################################### +###################################################################### +###################################################################### + +# We may not have any modules installed +if ( -d "$modules_base/$version" ) { + print STDERR "Running depmod.\n"; + my $ret = system("depmod -a $version"); + if ($ret) { + print STDERR "Failed to run depmod\n"; + exit(1); + } +} + + + +sub find_initrd_tool { + my $hostversion = shift; + my $version = shift; + print STDERR "Finding valid ramdisk creators.\n"; + my @ramdisks = + grep { + my $args = + "$_ " . + "--supported-host-version=$hostversion " . + "--supported-target-version=$version " . + "1>/dev/null 2>&1" + ; + system($args) == 0; + } + split (/[:,\s]+/, $ramdisk); +} + +# The initrd symlink should probably be in the same dir that the +# symlinks are in +if ($initrd) { + my $success = 0; + + # Update-initramfs is called slightly different than mkinitrd and + # mkinitramfs. XXX It should really be made compatible with this stuff + # some how. + my $upgrading = 1; + if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + $upgrading = 0; + } + my $ret = system("$ramdisk " . ($upgrading ? "-u" : "-c") . " -k " . $version . " >&2"); + $success = 1 unless $ret; + die "Failed to create initrd image.\n" unless $success; + if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + image_magic("initrd.img", $image_dest); + } + else { + if (! -e "initrd.img") { + handle_missing_link("initrd.img", $image_dest, "initrd.img-$version", + $realimageloc); + } + else { + print STDERR + "Not updating initrd symbolic links since we are being updated/reinstalled \n"; + print STDERR + "($ARGV[1] was configured last, according to dpkg)\n"; + } + } + + if ($initrd && -l "initrd" ) { + unlink "initrd"; + } + + if ($initrd && -l "$image_dir/initrd" && ! $link_in_boot) { + unlink "$image_dir/initrd"; + } +} +else { # Not making an initrd emage + if (-l "initrd.img") { + # Ooh, last image was an initrd image? in any case, we should move it. + my $target = readlink "initrd.img"; + my $real_target = ''; + $real_target = abs_path($target) if defined ($target); + + if (!defined($target) || ! -f "$real_target") { + # Eh. dangling link. can safely be removed. + unlink("initrd.img"); + } else { + if (-l "initrd.img.old" || ! -e "initrd.img.old" ) { + rename("initrd.img", "initrd.img.old"); + } else { + warn "initrd.img.old is not a symlink, not clobbering\n"; + unlink("initrd.img"); + } + } + } +} + +# Warn of a reboot +if (-x $notifier) { + system($notifier); +} + +# Let programs know not to hibernate if the kernel that would be used for +# resume-from-hibernate is likely to differ from the currently running kernel. +system("mountpoint -q /var/run"); +if ($? eq 0) { + system("touch /var/run/do-not-hibernate"); +} + +# Only change the symlinks if we are not being upgraded +if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m//og) { + image_magic($kimage, $image_dest); +} +else { + if (! -e "$kimage") { + handle_missing_link($kimage, $image_dest, "$kimage-$version", + $realimageloc); + } + else { + print STDERR + "Not updating image symbolic links since we are being updated/reinstalled \n"; + print STDERR + "($ARGV[1] was configured last, according to dpkg)\n"; + } +} + +# We used to have System.* files in / +if (-e "/System.map" || -e "/System.old") { + unlink '/System.map' if -e '/System.map'; + unlink '/System.old' if -e '/System.old'; +} + +# creating some info about kernel and initrd +if ($DEBUG) { + my $ksize=sprintf("%.0f",(stat($realimageloc . + "$kimage-$version"))[7]/1024)."kB"; + my $initrdsize=''; + if ($initrd) { + $initrdsize=sprintf("%.0f",(stat($realimageloc . + "initrd.img-$version"))[7]/1024)."kB"; + } + + print STDERR <<"EOMSG"; +A new kernel image has been installed at $realimageloc$kimage-$version + (Size: $ksize) + +Symbolic links, unless otherwise specified, can be found in $image_dest + +EOMSG + ; + + if ($initrd) { + print STDERR <<"EOMSGA"; + + Initial rootdisk image: ${realimageloc}initrd.img-$version (Size: $initrdsize) +EOMSGA + ; + } +} + +# set the env var stem +$ENV{'STEM'} = "linux"; +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if ($postinst_hook) { + &run_hook("postinst", $postinst_hook); +} + +if (-d "/etc/kernel/postinst.d") { + print STDERR "Examining /etc/kernel/postinst.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postinst.d") && + die "Failed to process /etc/kernel/postinst.d"; +} + +if (-d "/etc/kernel/postinst.d/$version") { + print STDERR "Examining /etc/kernel/postinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/postinst.d/$version") && + die "Failed to process /etc/kernel/postinst.d/$version"; +} + +LOADER: { + last unless $do_boot_enable; # Exit if explicitly asked to + + last if $loader =~ /silo/i; # SILO does not have to be executed. + last if $loader =~ /yaboot/i; # yaboot does not have to be executed. + last if $loader =~ /milo/i; # MILO does not have to be executed. + last if $loader =~ /nettrom/i; # NETTROM does not have to be executed. + last if $loader =~ /arcboot/i; # ARCBOOT does not have to be executed. + last if $loader =~ /delo/i; # DELO does not have to be executed. + last if $loader =~ /quik/i; # maintainer asked quik invocation to be ignored + + last unless $loaderloc; + last unless -x $loaderloc; + last unless $do_bootloader; + + if (-T "/etc/$loader.conf") { + # Trust and use the existing lilo.conf. + print STDERR "You already have a $Loader configuration in /etc/$loader.conf\n"; + my $ret = &run_lilo(); + exit $ret if $ret; + } +} + + +sub run_lilo (){ + my $ret; + # Try and figure out if the user really wants lilo to be run -- + # since the default is to run the boot laoder, which is ! grub -- but + # the user may be using grub now, and not changed the default. + + # So, if the user has explicitly asked for the loader to be run, or + # if there is no postinst hook, or if there is no grub installed -- + # we are OK. Or else, we ask. + if ($explicit_do_loader || (! ($postinst_hook && -x '/usr/sbin/grub'))) { + print STDERR "Running boot loader as requested\n"; + } else { + print STDERR "Ok, not running $loader\n"; + } + if ($loader =~ /^lilo/io or $loader =~ /vmelilo/io) { + print STDERR "Testing $loader.conf ... \n"; + unlink $temp_file_name; # security + $ret = system("$loaderloc -t >$temp_file_name 2>&1"); + if ($ret) { + print STDERR "Boot loader test failed\n"; + return $ret; + } + unlink "$temp_file_name"; + print STDERR "Testing successful.\n"; + print STDERR "Installing the "; + print STDERR "partition " if $loader =~ /^lilo/io; + print STDERR "boot sector... \n"; + } + + print STDERR "Running $loaderloc ... \n"; + if ($loader =~ /^elilo/io) { + $ret = system("$loaderloc 2>&1 | tee $temp_file_name"); + } else { + $ret = system("$loaderloc >$temp_file_name 2>&1"); + } + if ($ret) { + print STDERR "Boot loader failed to run\n"; + return $ret; + } + unlink $temp_file_name; + print STDERR "Installation successful.\n"; + return 0; +} + +exit 0; + +__END__ + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control-scripts/prerm +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control-scripts/prerm @@ -0,0 +1,307 @@ +#! /usr/bin/perl +# -*- Mode: Perl -*- +# image.prerm --- +# Author : root ( root@melkor.pilgrim.umass.edu ) +# Created On : Fri May 17 03:28:59 1996 +# Created On Node : melkor.pilgrim.umass.edu +# Last Modified By : Manoj Srivastava +# Last Modified On : Sat Aug 5 13:14:17 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 85 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# +# $Id: image.prerm,v 1.22 2003/10/07 16:24:20 srivasta Exp $ +# +# +#use strict; + +$|=1; +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlinks = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, or nettrom +my $image_dir = "/boot"; # where the image is located +my $clobber_modules = ''; # target machine defined +my $initrd = "YES"; # initrd kernel +my $use_hard_links = ''; # hardlinks do not wirk across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # There is no harm in checking the link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +# This should not point to /tmp, because of security risks. +my $temp_file_name = "/var/log/$loader" . "_log.$$"; + +#known variables +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_loader = ''; +my $warn_reboot = 'Yes'; # Warn that we are installing a version of + # the kernel we are running + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +my $DEBUG = 0; + +# Variables used +my $image=''; +my $ret=0; +my $seen=''; +my $answer=''; +my $running = ''; +my $WouldInvalidate = 0; + +if ($ARGV[0] && ($ARGV[0] =~ /remove/ || $ARGV[0] =~ /upgrade/)) { + if (-l "/usr/doc/linux-image-$version") { + unlink "/usr/doc/linux-image-$version"; + } +} + +# Ignore all invocations uxcept when called on to remove +exit 0 unless ($ARGV[0] && $ARGV[0] =~ /remove/) ; + +# Paranoid check to make sure that the correct value is put in there +if (! $kimage) { $kimage = "vmlinuz";} # Hmm. empty +elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz";} # these produce vmlinuz +elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage; } +elsif ($kimage =~ m/^vmlinux$/o) { my $nop = $kimage; } +else { $kimage = "vmlinuz";} # Default + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $do_initrd = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $do_initrd = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + } +} + + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + +#check to see if we are trying to remove a running kernel +# if so we abort right now. +chop($running=`uname -r`); +if ($running eq $version) { + print STDERR "WARN: Proceeding with removing running kernel image.\n"; +} + +#Now, they have an alternate kernel which they are currently running + +# This is just us being nice to lilo users. + +chdir("/") or die "could not chdir to /:$!\n"; + +if (-f "/etc/$loader.conf") { #I know, could be a link, but .. + open (LILO, "/etc/$loader.conf") || &success(); # this is not critical + while () { + chop; + s/\#.*//; # nix the comments + next unless /^\s*image\s*=\s(\S+)/o; + $image = $1; + if ($image && -e $image) { + while (defined($image) && -l $image) { + $image = readlink ($image); + } + if (defined($image) && -e $image) { + $WouldInvalidate |= $image =~ /$kimage-$version/; + } + else { + &success(); # invalid $loader.conf file + } + } + else { + &success(); # invalid $loader.conf file + } + } + close (LILO); + if ($WouldInvalidate) { + print STFERR "WARN: Proceeding with removing running kernel image.\n"; + &success(); + } +} + + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + + +## Run user hook script here, if any +if (-x "$prerm_hook") { + &run_hook("prerm", $prerm_hook); +} +if (-d "/etc/kernel/prerm.d") { + print STDERR "Examining /etc/kernel/prerm.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version /etc/kernel/prerm.d") && + die "Failed to process /etc/kernel/prerm.d"; +} +if (-d "/etc/kernel/prerm.d/$version") { + print STDERR "Examining /etc/kernel/prerm.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version " . + "/etc/kernel/prerm.d/$version") && + die "Failed to process /etc/kernel/prerm.d/$version"; +} + +sub success () { + my @files_to_remove = qw{ + modules.dep modules.isapnpmap modules.pcimap + modules.usbmap modules.parportmap + modules.generic_string modules.ieee1394map + modules.ieee1394map modules.pnpbiosmap + modules.alias modules.ccwmap modules.inputmap + modules.symbols modules.ofmap modules.seriomap + modules.alias.bin modules.builtin.bin modules.dep.bin modules.symbols.bin + }; + + foreach my $extra_file (@files_to_remove) { + if (-f "/lib/modules/$version/$extra_file") { + unlink "/lib/modules/$version/$extra_file"; + } + } + exit 0; +} + + + +&success(); +exit 0; +__END__ + + + + + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control-scripts/headers-postinst +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control-scripts/headers-postinst @@ -0,0 +1,126 @@ +#!/usr/bin/perl +# -*- Mode: Cperl -*- +# debian.postinst --- +# Author : Manoj Srivastava ( srivasta@pilgrim.umass.edu ) +# Created On : Sat Apr 27 05:42:43 1996 +# Created On Node : melkor.pilgrim.umass.edu +# Last Modified By : Manoj Srivastava +# Last Modified On : Sat Aug 5 13:20:22 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 45 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# +# +# arch-tag: 1c716174-2f0a-476d-a626-a1322e62503a +# + + +$|=1; + +# Predefined values: +my $version = "=V"; +my $kimage = "=K"; +my $package_name = "linux-image-$version"; + + +# Ignore all invocations uxcept when called on to configure. +exit 0 unless ($ARGV[0] && $ARGV[0] =~ /configure/); + +#known variables +my $image_dest = "/"; +my $realimageloc = "/boot/"; +my $silent_modules = ''; +my $modules_base = '/lib/modules'; +my $CONF_LOC = '/etc/kernel-img.conf'; +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +chdir '/usr/src' or die "Could not chdir to /usr/src:$!"; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $header_postinst_hook = "$1" if /^\s*header_postinst_hook\s*=\s*(\S+)/ig; + } + close CONF; + } +} + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + +## Run user hook script here, if any +if (-x "$header_postinst_hook") { + &run_hook("postinst", $header_postinst_hook); +} + +if (-d "/etc/kernel/header_postinst.d") { + print STDERR "Examining /etc/kernel/header_postinst.d.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/header_postinst.d") && + die "Failed to process /etc/kernel/header_postinst.d"; +} + +if (-d "/etc/kernel/header_postinst.d/$version") { + print STDERR "Examining /etc/kernel/header_postinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version " . + "--arg=$realimageloc$kimage-$version " . + "/etc/kernel/header_postinst.d/$version") && + die "Failed to process /etc/kernel/header_postinst.d/$version"; +} + +exit 0; + +__END__ --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control-scripts/preinst +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control-scripts/preinst @@ -0,0 +1,299 @@ +#! /usr/bin/perl +# -*- Mode: Cperl -*- +# image.preinst --- +# Author : Manoj Srivastava ( srivasta@tiamat.datasync.com ) +# Created On : Sun Jun 14 03:38:02 1998 +# Created On Node : tiamat.datasync.com +# Last Modified By : Manoj Srivastava +# Last Modified On : Sun Sep 24 14:04:42 2006 +# Last Machine Used: glaurung.internal.golden-gryphon.com +# Update Count : 99 +# Status : Unknown, Use with caution! +# HISTORY : +# Description : +# +# + +# +#use strict; #for debugging + +use Debconf::Client::ConfModule qw(:all); +version('2.0'); +my $capb=capb("backup"); + +$|=1; + +# Predefined values: +my $version = "=V"; +my $link_in_boot = ""; # Should be empty, mostly +my $no_symlink = ""; # Should be empty, mostly +my $reverse_symlink = ""; # Should be empty, mostly +my $do_symlink = "Yes"; # target machine defined +my $do_boot_enable = "Yes"; # target machine defined +my $do_bootfloppy = "Yes"; # target machine defined +my $do_bootloader = "Yes"; # target machine defined +my $move_image = ''; # target machine defined +my $kimage = "=K"; # Should be empty, mostly +my $loader = "=L"; # lilo, silo, quik, palo, vmelilo, nettrom + # or elilo +my $image_dir = "/boot"; # where the image is located +my $initrd = "YES"; # initrd kernel +my $use_hard_links = ''; # hardlinks do not wirk across fs boundaries +my $postinst_hook = ''; #Normally we do not +my $postrm_hook = ''; #Normally we do not +my $preinst_hook = ''; #Normally we do not +my $prerm_hook = ''; #Normally we do not +my $minimal_swap = ''; # Do not swap symlinks +my $ignore_depmod_err = ''; # normally we do not +my $relink_src_link = 'YES'; # There is no harm in checking the link +my $relink_build_link = 'YES'; # There is no harm in checking the link +my $force_build_link = ''; # There is no harm in checking the link +my $kernel_arch = "=B"; +my $ramdisk = "/usr/sbin/update-initramfs"; # List of tools to create initial ram fs. +my $package_name = "linux-image-$version"; + +my $Loader = "NoLOADER"; # +$Loader = "LILO" if $loader =~ /^lilo/io; +$Loader = "SILO" if $loader =~ /^silo/io; +$Loader = "QUIK" if $loader =~ /^quik/io; +$Loader = "yaboot" if $loader =~ /^yaboot/io; +$Loader = "PALO" if $loader =~ /^palo/io; +$Loader = "NETTROM" if $loader =~ /^nettrom/io; +$Loader = "VMELILO" if $loader =~ /^vmelilo/io; +$Loader = "ZIPL" if $loader =~ /^zipl/io; +$Loader = "ELILO" if $loader =~ /^elilo/io; + + +#known variables +my @boilerplate = (); +my @silotemplate = (); +my @quiktemplate = (); +my @palotemplate = (); +my @vmelilotemplate = (); +my $bootdevice = ''; +my $rootdevice = ''; +my $rootdisk = ''; +my $rootpartition = ''; +my $image_dest = "/"; +my $realimageloc = "/$image_dir/"; +my $have_conffile = ""; +my $CONF_LOC = '/etc/kernel-img.conf'; +my $relative_links = ''; +my $silent_loader = ''; +my $warn_reboot = ''; # Warn that we are installing a version of + # the kernel we are running + +my $modules_base = '/lib/modules'; + +die "Pre inst Internal error. Aborting." unless $version; + +exit 0 if $ARGV[0] =~ /abort-upgrade/; +exit 1 unless $ARGV[0] =~ /(install|upgrade)/; + +# remove multiple leading slashes; make sure there is at least one. +$realimageloc =~ s|^/*|/|o; +$realimageloc =~ s|/+|/|o; + +if (-r "$CONF_LOC" && -f "$CONF_LOC" ) { + if (open(CONF, "$CONF_LOC")) { + while () { + chomp; + s/\#.*$//g; + next if /^\s*$/; + + $do_symlink = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig; + $no_symlink = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig; + $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig; + $link_in_boot = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig; + $move_image = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig; + $do_boot_enable = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig; + $do_bootfloppy = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig; + $do_bootloader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig; + $relative_links = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig; + $use_hard_links = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig; + $silent_loader = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig; + $warn_reboot = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig; + $minimal_swap = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig; + $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig; + $relink_src_link = '' if /^\s*relink_src_link\s*=\s*(no|false|0)\s*$/ig; + $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig; + $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig; + + $do_symlink = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $no_symlink = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $link_in_boot = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig; + $move_image = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig; + $do_boot_enable = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig; + $do_bootfloppy = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig; + $do_bootloader = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig; + $relative_links = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig; + $use_hard_links = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig; + $silent_loader = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig; + $warn_reboot = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig; + $minimal_swap = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig; + $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig; + $relink_src_link = 'Yes' if /^\s*relink_src_link\s*=\s*(yes|true|1)\s*$/ig; + $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig; + $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig; + + $image_dest = "$1" if /^\s*image_dest\s*=\s*(\S+)/ig; + $postinst_hook = "$1" if /^\s*postinst_hook\s*=\s*(\S+)/ig; + $postrm_hook = "$1" if /^\s*postrm_hook\s*=\s*(\S+)/ig; + $preinst_hook = "$1" if /^\s*preinst_hook\s*=\s*(\S+)/ig; + $prerm_hook = "$1" if /^\s*prerm_hook\s*=\s*(\S+)/ig; + $ramdisk = "$1" if /^\s*ramdisk\s*=\s*(.+)$/ig; + } + close CONF; + $have_conffile = "Yes"; + $have_conffile = "Yes"; # stop perl complaining + } +} + +$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch; + +# About to upgrade this package from version $2 TO THIS VERSION. +# "prerm upgrade" has already been called for the old version of +# this package. + +sub find_initrd_tool { + my $hostversion = shift; + my $version = shift; + my @ramdisks = + grep { + my $args = + "$_ " . + "--supported-host-version=$hostversion " . + "--supported-target-version=$version " . + "1>/dev/null 2>&1" + ; + system($args) == 0; + } + split (/[:,\s]+/, $ramdisk); +} + +sub check { + my $version = shift; + my $lib_modules="$modules_base/$version"; + my $message = ''; + + if (-d "$lib_modules") { + opendir(DIR, $lib_modules) || die "can’t opendir $lib_modules: $!"; + my @children = readdir(DIR); + if ($#children > 1) { + my @dirs = grep { -d "$lib_modules/$_" } @children; + if ($#dirs > 1) { # we have subdirs + my $dir_message=''; + for my $dir (@dirs) { + if ($dir =~/kernel$/) { + $dir_message="An older install was detected.\n"; + } + else { + $dir_message="Module sub-directories were detected.\n" + unless $dir_message; + } + } + $message += $dir_message if $dir_message; + } + + my @links = grep { -l "$lib_modules/$_" } @children; + if ($#links > -1) { + my $links_message = ''; + for my $link (@links) { + next if ($link =~ /^build$/); + next if ($link =~ /^source$/); + $links_message = "Symbolic links were detected in $modules_base/$version.\n"; + } + $message += $links_message if $links_message; + } + my @files = grep { -f "$lib_modules/$_" } @children; + $message += "Additional files also exist in $modules_base/$version.\n" + if ($#files > -1); + } + } + else { $message .= "$lib_modules does not exist. ";} + return $message; +} + +if (-d "$modules_base/$version") { + my $errors=check($version); + warn "Info:\n$errors\n" if $errors; +} + +# set the env var stem +$ENV{'STEM'} = "linux"; + +sub exec_script { + my $type = shift; + my $script = shift; + print STDERR "Running $type hook script $script.\n"; + system ("$script $version $realimageloc$kimage-$version") && + print STDERR "User $type hook script [$script] "; + if ($?) { + if ($? == -1) { + print STDERR "failed to execute: $!\n"; + } + elsif ($? & 127) { + printf STDERR "died with signal %d, %s coredump\n", + ($? & 127), ($? & 128) ? 'with' : 'without'; + } + else { + printf STDERR "exited with value %d\n", $? >> 8; + } + exit $? >> 8; + } +} +sub run_hook { + my $type = shift; + my $script = shift; + if ($script =~ m,^/,) { + # Full path provided for the hook script + if (-x "$script") { + &exec_script($type,$script); + } + else { + die "The provided $type hook script [$script] could not be run.\n"; + } + } + else { + # Look for it in a safe path + for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') { + if (-x "$path/$script") { + &exec_script($type, "$path/$script"); + return 0; + } + } + # No luck + print STDERR "Could not find $type hook script [$script].\n"; + die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n"; + } +} + + +## Run user hook script here, if any +if (-x "$preinst_hook") { + &run_hook("preinst", $preinst_hook); +} +if (-d "/etc/kernel/preinst.d") { + print STDERR "Examining /etc/kernel/preinst.d/\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version" . + " /etc/kernel/preinst.d") && + die "Failed to process /etc/kernel/preinst.d"; +} +if (-d "/etc/kernel/preinst.d/$version") { + print STDERR "Examining /etc/kernel/preinst.d/$version.\n"; + system ("run-parts --verbose --exit-on-error --arg=$version" . + " --arg=$realimageloc$kimage-$version" . + " /etc/kernel/preinst.d/$version") && + die "Failed to process /etc/kernel/preinst.d/$version"; +} +print STDERR "Done.\n"; + +exit 0; + +__END__ + + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/tests/check-aliases +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/tests/check-aliases @@ -0,0 +1,24 @@ +#!/usr/bin/perl -w + +my %map; + +print "Checking for dupe aliases in $ENV{'FLAVOUR'}...\n"; + +$aliases = + "$ENV{'INSTALL_DIR'}/lib/modules/$ENV{'VERSION'}-$ENV{'FLAVOUR'}/modules.alias"; + +open(ALIASES, "< $aliases") or die "Could not open $aliases"; + +while () { + chomp; + my ($junk, $alias, $module) = split; + + if (defined($map{$alias})) { + printf("%s %20s / %-20s : %s \n", ("$map{$alias}" eq "$module") + ? "INT" : " ", $map{$alias}, $module, $alias); + } else { + $map{$alias} = $module; + } +} + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/tests/README +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/tests/README @@ -0,0 +1,21 @@ +Scripts placed in this directory get called one at a time by run-parts(8). +The scripts are expected to perform some sort of sanity checks on the +finished build. Scripts will be called once for each flavour. + +Some environment variables are exported to make life a little easier: + +DPKG_ARCH : The dpkg architecture (e.g. "amd64") +KERN_ARCH : The kernel architecture (e.g. "x86_64") +FLAVOUR : The specific flavour for this run (e.g. "generic") +VERSION : The full version of this build (e.g. 2.6.22-1) +REVISION : The exact revision of this build (e.g. 1.3) +PREV_REVISION : The revision prior to this one +ABI_NUM : The specific ABI number for this build (e.g. 2) +PREV_ABI_NUM : The previous ABI number. Can be the same as ABI_NUM. +BUILD_DIR : The directory where this build took place +INSTALL_DIR : The directory where the package is prepared +SOURCE_DIR : Where the main kernel source is + +Scripts are expected to have a zero exit status when no problems occur, +and non-zero when an error occurs that should stop the build. Scripts +should print whatever info they deem needed to deduce the problem. --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/config/config.common.ubuntu +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/config/config.common.ubuntu @@ -0,0 +1,2896 @@ +# +# Common config options automatically generated by splitconfig.pl +# +CONFIG_6PACK=m +CONFIG_9P_FS=m +CONFIG_AB3100_CORE=m +# CONFIG_ACCESSIBILITY is not set +CONFIG_ACORN_PARTITION=y +# CONFIG_ACORN_PARTITION_ADFS is not set +# CONFIG_ACORN_PARTITION_CUMANA is not set +# CONFIG_ACORN_PARTITION_EESOX is not set +CONFIG_ACORN_PARTITION_ICS=y +# CONFIG_ACORN_PARTITION_POWERTEC is not set +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_ACT200L_DONGLE=m +CONFIG_ACTISYS_DONGLE=m +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_AEABI=y +CONFIG_AFFS_FS=m +# CONFIG_AFS_DEBUG is not set +CONFIG_AFS_FS=m +# CONFIG_AFS_FSCACHE is not set +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +# CONFIG_AGNX is not set +CONFIG_AIO=y +CONFIG_AIRO_CS=m +CONFIG_ALIGNMENT_TRAP=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=m +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set +CONFIG_ANDROID_RAM_CONSOLE=y +# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +# CONFIG_ANDROID_TIMED_GPIO is not set +CONFIG_ANDROID_TIMED_OUTPUT=y +CONFIG_ANON_INODES=y +CONFIG_APM_EMULATION=y +CONFIG_APM_POWER=y +CONFIG_AR9170_LEDS=y +CONFIG_AR9170_USB=m +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_MSM is not set +CONFIG_ARCH_MTD_XIP=y +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX35 is not set +# CONFIG_ARCH_MX37 is not set +CONFIG_ARCH_MX51=y +CONFIG_ARCH_MXC=y +CONFIG_ARCH_MXC_HAS_NFC_V3=y +CONFIG_ARCH_MXC_HAS_NFC_V3_2=y +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_REALVIEW is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_W90X900 is not set +CONFIG_ARM=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +# CONFIG_ARM_UNWIND is not set +# CONFIG_ARPD is not set +CONFIG_ASK_IP_FIB_HASH=y +CONFIG_ASUS_OLED=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_AT76C50X_USB=m +CONFIG_ATA=y +CONFIG_ATAGS_PROC=y +CONFIG_ATALK=m +CONFIG_ATARI_PARTITION=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_OVER_ETH=m +CONFIG_ATA_SFF=y +CONFIG_ATH_COMMON=m +CONFIG_ATM=y +CONFIG_ATMEL=m +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_ATM_CLIP=y +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_DRIVERS=y +# CONFIG_ATM_DUMMY is not set +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_TCP=m +CONFIG_AUDIT=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUFS_BDEV_LOOP=y +# CONFIG_AUFS_BRANCH_MAX_1023 is not set +CONFIG_AUFS_BRANCH_MAX_127=y +# CONFIG_AUFS_BRANCH_MAX_32767 is not set +# CONFIG_AUFS_BRANCH_MAX_511 is not set +CONFIG_AUFS_BR_FUSE=y +# CONFIG_AUFS_BR_RAMFS is not set +# CONFIG_AUFS_DEBUG is not set +# CONFIG_AUFS_EXPORT is not set +CONFIG_AUFS_FS=m +CONFIG_AUFS_HINOTIFY=y +CONFIG_AUFS_POLL=y +# CONFIG_AUFS_SHWH is not set +CONFIG_AUTOFS4_FS=m +CONFIG_AUTOFS_FS=m +CONFIG_AUXDISPLAY=y +CONFIG_AVERATEC_5100P=m +CONFIG_AX25=m +CONFIG_AX25_DAMA_SLAVE=y +# CONFIG_AX88796 is not set +CONFIG_B43=m +CONFIG_B43LEGACY=m +CONFIG_B43LEGACY_DEBUG=y +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +CONFIG_B43LEGACY_HWRNG=y +CONFIG_B43LEGACY_LEDS=y +CONFIG_B43LEGACY_PIO=y +# CONFIG_B43LEGACY_PIO_MODE is not set +# CONFIG_B43_DEBUG is not set +CONFIG_B43_HWRNG=y +CONFIG_B43_LEDS=y +# CONFIG_B43_PCMCIA is not set +CONFIG_B44=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_DA903X=m +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_MXC=y +CONFIG_BACKLIGHT_MXC_MC13892=y +CONFIG_BACKLIGHT_PWM=m +CONFIG_BACKLIGHT_WM8350=m +# CONFIG_BACKTRACE_SELF_TEST is not set +CONFIG_BASE_FULL=y +CONFIG_BASE_SMALL=0 +CONFIG_BATTERY_BQ27x00=m +CONFIG_BATTERY_DA9030=m +CONFIG_BATTERY_DS2760=m +CONFIG_BATTERY_DS2782=m +CONFIG_BATTERY_MAX17040=m +CONFIG_BAYCOM_EPP=m +CONFIG_BAYCOM_PAR=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BEFS_FS=m +CONFIG_BFS_FS=m +CONFIG_BINARY_PRINTF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=m +CONFIG_BITREVERSE=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_DEV_COMPCACHE=m +# CONFIG_BLK_DEV_COMPCACHE_DEBUG is not set +# CONFIG_BLK_DEV_COMPCACHE_STATS is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_DM=y +CONFIG_BLK_DEV_DRBD=m +CONFIG_BLK_DEV_INITRD=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_MD=y +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_OSD=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_XIP is not set +CONFIG_BLOCK=y +CONFIG_BONDING=m +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BOUNCE=y +CONFIG_BPQETHER=m +CONFIG_BRANCH_PROFILE_NONE=y +CONFIG_BRIDGE=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_NETFILTER=y +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BROADCOM_PHY=m +CONFIG_BROKEN_ON_SMP=y +CONFIG_BSD_DISKLABEL=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_BT=y +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIBTUART=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIVHCI=m +CONFIG_BT_HIDP=m +CONFIG_BT_L2CAP=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_SCO=y +CONFIG_BUG=y +CONFIG_C2PORT=m +CONFIG_CACHEFILES=m +# CONFIG_CACHEFILES_DEBUG is not set +# CONFIG_CACHEFILES_HISTOGRAM is not set +CONFIG_CAN=m +CONFIG_CAN_BCM=m +# CONFIG_CAN_CALC_BITTIMING is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_CAN_DEV=m +CONFIG_CAN_RAW=m +CONFIG_CAN_SJA1000=m +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_VCAN=m +CONFIG_CAPI_AVM=y +CONFIG_CAPI_EICON=y +CONFIG_CAPI_TRACE=y +CONFIG_CARDMAN_4000=m +CONFIG_CARDMAN_4040=m +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_CDROM_PKTCDVD=y +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_CFG80211=m +CONFIG_CFG80211_DEBUGFS=y +CONFIG_CFG80211_REG_DEBUG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_CGROUP_DEVICE is not set +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_MEM_RES_CTLR=y +# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CHARGER_PCF50633=m +CONFIG_CHR_DEV_OSST=m +CONFIG_CHR_DEV_SCH=m +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_ST=m +CONFIG_CICADA_PHY=m +CONFIG_CIFS=m +# CONFIG_CIFS_DEBUG2 is not set +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_CIFS_EXPERIMENTAL=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CLASSIC_RCU=y +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +CONFIG_CODA_FS=m +# CONFIG_COMEDI is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_CONFIGFS_FS=m +CONFIG_CONNECTOR=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONSTRUCTORS=y +CONFIG_CONTEXT_SWITCH_TRACER=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_CPUSETS=y +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +# CONFIG_CPU_DCACHE_DISABLE is not set +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEBUG is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_IMX=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_HAS_ASID=y +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRAMFS=y +CONFIG_CRC16=y +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_CRC_CCITT=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_CRYPTODEV=m +CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_ZLIB=m +# CONFIG_CS89x0 is not set +CONFIG_CUSE=m +# CONFIG_DAB is not set +CONFIG_DAVICOM_PHY=m +CONFIG_DCB=y +CONFIG_DE600=m +CONFIG_DE620=m +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_INFO is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DECNET=m +CONFIG_DECNET_NF_GRABULATOR=m +# CONFIG_DECNET_ROUTER is not set +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZMA=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CFQ=y +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_HTCP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +# CONFIG_DEFAULT_NOOP is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_DEVKMEM is not set +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DEV_APPLETALK=m +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_DISPLAY_SUPPORT=m +CONFIG_DLCI=m +CONFIG_DLCI_MAX=8 +CONFIG_DLM=m +# CONFIG_DLM_DEBUG is not set +# CONFIG_DM9000 is not set +CONFIG_DMADEVICES=y +CONFIG_DMA_ZONE_SIZE=64 +CONFIG_DM_CRYPT=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_LOG_USERSPACE is not set +CONFIG_DM_MIRROR=y +CONFIG_DM_MULTIPATH=y +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +CONFIG_DM_RAID45=m +CONFIG_DM_SNAPSHOT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_ZERO=m +CONFIG_DNET=m +CONFIG_DNOTIFY=y +CONFIG_DONGLE=y +CONFIG_DRAGONRISE_FF=y +CONFIG_DS1682=m +CONFIG_DST=m +# CONFIG_DST_DEBUG is not set +CONFIG_DUMMY=m +CONFIG_DUMMY_CONSOLE=y +CONFIG_DVB_AF9013=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_B2C2_FLEXCOP=m +# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set +CONFIG_DVB_B2C2_FLEXCOP_USB=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_CAPTURE_DRIVERS=y +CONFIG_DVB_CORE=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_CX24116=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_DYNAMIC_MINORS=y +# CONFIG_DVB_FE_CUSTOMISE is not set +CONFIG_DVB_ISL6421=m +CONFIG_DVB_LGDT3305=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LNBP21=m +CONFIG_DVB_MT312=m +CONFIG_DVB_MT352=m +CONFIG_DVB_NXT200X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_PLL=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_S5H1411=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_SI21XX=m +CONFIG_DVB_STB6000=m +CONFIG_DVB_STV0288=m +CONFIG_DVB_STV0297=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_TDA10048=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUNER_CX24113=m +CONFIG_DVB_TUNER_DIB0070=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_USB=m +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_ZL10353=m +# CONFIG_DYNAMIC_DEBUG is not set +CONFIG_ECHO=m +CONFIG_ECONET=m +CONFIG_ECONET_AUNUDP=y +CONFIG_ECONET_NATIVE=y +CONFIG_ECRYPT_FS=y +CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EFI_PARTITION=y +CONFIG_EFS_FS=m +CONFIG_ELF_CORE=y +# CONFIG_EMBEDDED is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_ENABLE_WARN_DEPRECATED=y +# CONFIG_ENC28J60 is not set +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_EPOLL=y +CONFIG_EQUALIZER=m +CONFIG_ESI_DONGLE=m +CONFIG_ETHOC=m +CONFIG_EVENTFD=y +CONFIG_EVENT_TRACING=y +# CONFIG_EXOFS_DEBUG is not set +CONFIG_EXOFS_FS=m +CONFIG_EXPERIMENTAL=y +CONFIG_EXPORTFS=m +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_EZX_PCAP is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_FAT_FS=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_FB=y +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_BROADSHEET=m +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_MACMODES is not set +CONFIG_FB_MB862XX=m +CONFIG_FB_METRONOME=m +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_MXC=y +# CONFIG_FB_MXC_ASYNC_PANEL is not set +CONFIG_FB_MXC_CH7026=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +CONFIG_FB_MXC_TVOUT_TVE=y +CONFIG_FB_S1D13XXX=m +CONFIG_FB_SM501=m +# CONFIG_FB_SVGALIB is not set +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_SYS_IMAGEBLIT=m +# CONFIG_FB_TILEBLITTING is not set +CONFIG_FB_TMIO=m +CONFIG_FB_TMIO_ACCELL=y +CONFIG_FB_UDL=m +CONFIG_FB_UVESA=m +# CONFIG_FB_VIRTUAL is not set +CONFIG_FEC=y +# CONFIG_FEC2 is not set +CONFIG_FIB_RULES=y +CONFIG_FILE_LOCKING=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FIRMWARE_IN_KERNEL=y +# CONFIG_FIXED_PHY is not set +CONFIG_FLATMEM=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_FM_SI4702 is not set +CONFIG_FONTS=y +# CONFIG_FONT_10x18 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_SUN8x16 is not set +CONFIG_FORCE_MAX_ZONEORDER=13 +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FRAME_WARN=1024 +CONFIG_FREEZER=y +# CONFIG_FSAM7400 is not set +CONFIG_FSCACHE=m +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_STATS is not set +CONFIG_FSNOTIFY=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FTL=m +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +CONFIG_FUSE_FS=y +CONFIG_FUTEX=y +CONFIG_FW_LOADER=y +CONFIG_GACT_PROB=y +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GARP=m +# CONFIG_GCOV_KERNEL is not set +CONFIG_GENERIC_ACL=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_TIME=y +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +CONFIG_GIGASET_BASE=m +# CONFIG_GIGASET_DEBUG is not set +CONFIG_GIGASET_M101=m +CONFIG_GIGASET_M105=m +CONFIG_GIRBIL_DONGLE=m +CONFIG_GPIOLIB=y +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SYSFS is not set +# CONFIG_GPIO_TWL4030 is not set +CONFIG_GPS_IOCTRL=m +CONFIG_GREENASIA_FF=y +CONFIG_GROUP_SCHED=y +CONFIG_HAMRADIO=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_TLS_REG=y +CONFIG_HAVE_AOUT=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PWM=y +CONFIG_HDLC=m +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +CONFIG_HDLC_RAW=m +CONFIG_HDLC_RAW_ETH=m +CONFIG_HDLC_X25=m +# CONFIG_HEADERS_CHECK is not set +CONFIG_HERMES=m +CONFIG_HERMES_CACHE_FW_ON_INIT=y +CONFIG_HFSPLUS_FS=m +CONFIG_HFS_FS=m +CONFIG_HID=y +CONFIG_HIDRAW=y +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +# CONFIG_HID_DEBUG is not set +CONFIG_HID_DRAGONRISE=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GREENASIA=m +CONFIG_HID_GYRATION=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_KYE=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PID=y +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID_THRUSTMASTER=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_WACOM=m +CONFIG_HID_ZEROPLUS=m +# CONFIG_HIGHMEM is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_HOSTAP=m +CONFIG_HOSTAP_CS=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOTPLUG=y +CONFIG_HPFS_FS=m +# CONFIG_HTC_EGPIO is not set +CONFIG_HTC_PASIC3=m +# CONFIG_HUGETLB_PAGE is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_HWMON_VID=m +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HZ=100 +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCA=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_IMX=m +CONFIG_I2C_MXC=y +CONFIG_I2C_MXC_HS=y +CONFIG_I2C_MXC_SELECT1=y +CONFIG_I2C_MXC_SELECT2=y +# CONFIG_I2C_MXC_SELECT3 is not set +CONFIG_I2C_OCORES=m +CONFIG_I2C_PARPORT=m +CONFIG_I2C_PARPORT_LIGHT=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_SIMTEC=m +# CONFIG_I2C_SLAVE is not set +CONFIG_I2C_STUB=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +CONFIG_ICPLUS_PHY=m +CONFIG_ICS932S401=m +# CONFIG_IDE is not set +CONFIG_IEEE802154=m +CONFIG_IEEE802154_DRIVERS=m +# CONFIG_IEEE802154_FAKEHARD is not set +CONFIG_IFB=m +# CONFIG_IKCONFIG is not set +# CONFIG_IMX_ADC is not set +CONFIG_IMX_SIM=m +CONFIG_INET=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET_AH=m +CONFIG_INET_DCCP_DIAG=m +CONFIG_INET_DIAG=y +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_LRO=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INFTL=m +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=y +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_EVBUG=m +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_MIMIO=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_PCF50633_PMU=m +CONFIG_INPUT_POLLDEV=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_TABLET=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_TWL4030_PWRBUTTON=m +CONFIG_INPUT_UINPUT=m +CONFIG_INPUT_YEALINK=m +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_CFQ=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IPC_NS=y +CONFIG_IPDDP=m +CONFIG_IPDDP_DECAP=y +CONFIG_IPDDP_ENCAP=y +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_HANDLER=m +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_POWEROFF=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPPP_FILTER=y +CONFIG_IPV6=y +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_MROUTE is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_IPV6_PRIVACY=y +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SUBTREES is not set +CONFIG_IPV6_TUNNEL=m +CONFIG_IPWIRELESS=m +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_DCCP=m +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=y +# CONFIG_IP_DCCP_CCID3_DEBUG is not set +CONFIG_IP_DCCP_CCID3_RTO=100 +# CONFIG_IP_DCCP_DEBUG is not set +CONFIG_IP_DCCP_TFRC_LIB=y +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_SCTP=m +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_IPV6=y +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_TAB_BITS=12 +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_WRR=m +CONFIG_IRCOMM=m +CONFIG_IRDA=m +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_DEBUG=y +CONFIG_IRDA_FAST_RR=y +CONFIG_IRDA_ULTRA=y +CONFIG_IRLAN=m +CONFIG_IRNET=m +# CONFIG_IRQSOFF_TRACER is not set +CONFIG_IRTTY_SIR=m +CONFIG_ISCSI_TCP=m +CONFIG_ISDN=y +CONFIG_ISDN_AUDIO=y +CONFIG_ISDN_CAPI=m +CONFIG_ISDN_CAPI_CAPI20=m +CONFIG_ISDN_CAPI_CAPIDRV=m +CONFIG_ISDN_CAPI_CAPIFS=m +CONFIG_ISDN_CAPI_CAPIFS_BOOL=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +# CONFIG_ISDN_DIVERSION is not set +CONFIG_ISDN_DRV_AVMB1_AVM_CS=m +CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +CONFIG_ISDN_DRV_GIGASET=m +# CONFIG_ISDN_DRV_HISAX is not set +# CONFIG_ISDN_DRV_LOOP is not set +CONFIG_ISDN_I4L=m +CONFIG_ISDN_MPP=y +CONFIG_ISDN_PPP=y +CONFIG_ISDN_PPP_BSDCOMP=m +CONFIG_ISDN_PPP_VJ=y +CONFIG_ISDN_TTY_FAX=y +CONFIG_ISDN_X25=y +CONFIG_ISL29003=m +CONFIG_ISO9660_FS=m +CONFIG_IWM=m +# CONFIG_IWM_DEBUG is not set +CONFIG_JBD=y +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +# CONFIG_JBD_DEBUG is not set +CONFIG_JFFS2_CMODE_FAVOURLZO=y +# CONFIG_JFFS2_CMODE_NONE is not set +# CONFIG_JFFS2_CMODE_PRIORITY is not set +# CONFIG_JFFS2_CMODE_SIZE is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_SUMMARY is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFS_DEBUG is not set +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +CONFIG_JFS_STATISTICS=y +CONFIG_JOLIET=y +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_WALKERA0701=m +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_KARMA_PARTITION=y +CONFIG_KEXEC=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_GPIO is not set +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_LM8323=m +# CONFIG_KEYBOARD_MATRIX is not set +CONFIG_KEYBOARD_MXC=y +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYS=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +# CONFIG_KGDB is not set +CONFIG_KINGSUN_DONGLE=m +# CONFIG_KMEMCHECK is not set +# CONFIG_KMEMTRACE is not set +CONFIG_KPROBES=y +# CONFIG_KPROBES_SANITY_TEST is not set +CONFIG_KRETPROBES=y +CONFIG_KS8842=m +CONFIG_KS8851=m +CONFIG_KS959_DONGLE=m +CONFIG_KSDAZZLE_DONGLE=m +CONFIG_LAPB=m +CONFIG_LAPBETHER=m +# CONFIG_LATENCYTOP is not set +CONFIG_LBDAF=y +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_LCD_ILI9320=m +CONFIG_LCD_LTV350QV=m +CONFIG_LCD_PLATFORM=m +CONFIG_LCD_TDO24M=m +CONFIG_LCD_VGG2432A4=m +# CONFIG_LDM_DEBUG is not set +CONFIG_LDM_PARTITION=y +# CONFIG_LEDS is not set +CONFIG_LEDS_BD2802=m +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_DA903X=m +CONFIG_LEDS_DAC124S085=m +# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_LP3944=m +CONFIG_LEDS_MC13892=y +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_PCA955X=m +CONFIG_LEDS_PWM=m +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_WM8350=m +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=0 +CONFIG_LIB80211=m +CONFIG_LIB80211_CRYPT_CCMP=m +CONFIG_LIB80211_CRYPT_TKIP=m +CONFIG_LIB80211_CRYPT_WEP=m +# CONFIG_LIB80211_DEBUG is not set +CONFIG_LIBCRC32C=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_CS=m +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_SPI=m +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_LINE6_USB=m +CONFIG_LIRC_ATIUSB=m +CONFIG_LIRC_BT829=m +CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m +CONFIG_LIRC_DEV=m +CONFIG_LIRC_ENE0100=m +# CONFIG_LIRC_GPIO is not set +CONFIG_LIRC_I2C=m +CONFIG_LIRC_IGORPLUGUSB=m +CONFIG_LIRC_IMON=m +CONFIG_LIRC_IT87=m +CONFIG_LIRC_ITE8709=m +CONFIG_LIRC_MCEUSB=m +# CONFIG_LIRC_PARALLEL is not set +CONFIG_LIRC_SASEM=m +CONFIG_LIRC_SERIAL=m +CONFIG_LIRC_SIR=m +CONFIG_LIRC_STREAMZAP=m +CONFIG_LIRC_TTUSBIR=m +CONFIG_LITELINK_DONGLE=m +# CONFIG_LKDTM is not set +CONFIG_LLC=m +CONFIG_LLC2=m +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_LOCKD=m +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_LOCKD_V4=y +# CONFIG_LOCK_STAT is not set +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGITECH_FF=y +# CONFIG_LOGO is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_LP_CONSOLE is not set +CONFIG_LSI_ET1011C_PHY=m +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_LXT_PHY=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_M25PXX_USE_FAST_READ=y +CONFIG_MA600_DONGLE=m +CONFIG_MAC80211=m +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_DEFAULT_PS=y +CONFIG_MAC80211_DEFAULT_PS_VALUE=1 +# CONFIG_MAC80211_HWSIM is not set +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MACH_MX51_3DS=y +CONFIG_MACH_MX51_BABBAGE=y +CONFIG_MACVLAN=m +CONFIG_MAC_PARTITION=y +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_MARKERS=y +CONFIG_MARVELL_PHY=m +CONFIG_MAX_RAW_DEVS=256 +CONFIG_MCP2120_DONGLE=m +CONFIG_MCS_FIR=m +CONFIG_MD=y +CONFIG_MDIO_BITBANG=m +# CONFIG_MDIO_GPIO is not set +CONFIG_MD_AUTODETECT=y +CONFIG_MD_FAULTY=m +CONFIG_MD_LINEAR=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_MC44S803=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_MEDIA_TUNER_MXL5007T=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEILHAUS=m +# CONFIG_MEMSTICK is not set +# CONFIG_MFD_ASIC3 is not set +CONFIG_MFD_CORE=m +CONFIG_MFD_PCF50633=m +CONFIG_MFD_SM501=m +# CONFIG_MFD_SM501_GPIO is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_TMIO is not set +CONFIG_MFD_WM8350=m +CONFIG_MFD_WM8350_I2C=m +CONFIG_MFD_WM8400=m +# CONFIG_MG_DISK is not set +CONFIG_MII=y +CONFIG_MINIX_FS=m +CONFIG_MINIX_SUBPARTITION=y +CONFIG_MISC_DEVICES=y +CONFIG_MISC_FILESYSTEMS=y +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_HFCUSB=m +CONFIG_MISDN_L1OIP=m +CONFIG_MKISS=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_IMX_ESDHCI=y +# CONFIG_MMC_IMX_ESDHCI_PIO_MODE is not set +# CONFIG_MMC_MXC is not set +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_PLTFM=m +CONFIG_MMC_SPI=m +# CONFIG_MMC_TEST is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +CONFIG_MMU=y +CONFIG_MM_OWNER=y +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +# CONFIG_MOUSE_GPIO is not set +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_VSXXXAA=m +CONFIG_MSDOS_FS=y +CONFIG_MSDOS_PARTITION=y +CONFIG_MTD=y +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTD_ABSENT=m +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_BLOCK2MTD=m +CONFIG_MTD_CFI=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_CONCAT=m +CONFIG_MTD_DATAFLASH=m +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_DOC2000=m +CONFIG_MTD_DOC2001=m +CONFIG_MTD_DOC2001PLUS=m +CONFIG_MTD_DOCECC=m +CONFIG_MTD_DOCPROBE=m +CONFIG_MTD_DOCPROBE_ADDRESS=0 +# CONFIG_MTD_DOCPROBE_ADVANCED is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_IMPA7 is not set +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_LPDDR=m +CONFIG_MTD_M25P80=m +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +CONFIG_MTD_MTDRAM=m +CONFIG_MTD_MXC=y +# CONFIG_MTD_MXC_DATAFLASH is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_DISKONCHIP=m +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_IMX_NFC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_MXC_FORCE_CE is not set +# CONFIG_MTD_NAND_MXC_SWECC is not set +CONFIG_MTD_NAND_MXC_V3=y +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_ONENAND=m +CONFIG_MTD_ONENAND_2X_PROGRAM=y +CONFIG_MTD_ONENAND_GENERIC=m +# CONFIG_MTD_ONENAND_OTP is not set +CONFIG_MTD_ONENAND_SIM=m +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +CONFIG_MTD_OOPS=m +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_PHRAM=m +CONFIG_MTD_PHYSMAP=m +# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PLATRAM=m +CONFIG_MTD_QINFO_PROBE=m +CONFIG_MTD_RAM=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS=m +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +CONFIG_MTD_ROM=m +CONFIG_MTD_SLRAM=m +CONFIG_MTD_TESTS=m +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_UBI_DEBUG is not set +CONFIG_MTD_UBI_GLUEBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +# CONFIG_MTD_XIP is not set +CONFIG_MX51_OPTIONS=y +CONFIG_MXC_BLUETOOTH=y +# CONFIG_MXC_CAMERA_MC521DA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640 is not set +# CONFIG_MXC_CAMERA_OV2640_EMMA is not set +CONFIG_MXC_CAMERA_OV3640=m +# CONFIG_MXC_DAM is not set +CONFIG_MXC_DVFS_PER=y +# CONFIG_MXC_EMMA_CAMERA_MICRON111 is not set +# CONFIG_MXC_FIR is not set +# CONFIG_MXC_HMP4E is not set +CONFIG_MXC_HWEVENT=y +CONFIG_MXC_IIM=y +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_CSI_ENC=m +CONFIG_MXC_IPU_PRP_ENC=m +CONFIG_MXC_IPU_PRP_VF_SDC=m +CONFIG_MXC_IPU_V3=y +# CONFIG_MXC_IRQ_PRIOR is not set +CONFIG_MXC_MC13892_ADC=y +CONFIG_MXC_MC13892_BATTERY=y +CONFIG_MXC_MC13892_CONNECTIVITY=y +CONFIG_MXC_MC13892_LIGHT=y +CONFIG_MXC_MC13892_POWER=y +CONFIG_MXC_MC13892_RTC=y +# CONFIG_MXC_NAND_LOW_LEVEL_ERASE is not set +CONFIG_MXC_PMIC=y +# CONFIG_MXC_PMIC_CHARDEV is not set +CONFIG_MXC_PMIC_I2C=y +# CONFIG_MXC_PMIC_MC13783 is not set +CONFIG_MXC_PMIC_MC13892=y +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +CONFIG_MXC_PMIC_SPI=y +CONFIG_MXC_PWM=m +CONFIG_MXC_SAHARA=y +# CONFIG_MXC_SAHARA_POLL_MODE is not set +# CONFIG_MXC_SAHARA_USER_MODE is not set +CONFIG_MXC_SDMA_API=y +# CONFIG_MXC_SECURITY_RNG is not set +# CONFIG_MXC_SECURITY_SCC is not set +CONFIG_MXC_SECURITY_SCC2=y +# CONFIG_MXC_SSI is not set +# CONFIG_MXC_TVIN_ADV7180 is not set +CONFIG_MXC_TZIC=y +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set +CONFIG_MXC_VPU_IRAM=y +CONFIG_MXC_WATCHDOG=y +CONFIG_NAMESPACES=y +CONFIG_NATIONAL_PHY=m +CONFIG_NCPFS_EXTRAS=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_PACKET_SIGNING=y +# CONFIG_NCPFS_SMALLDOS is not set +CONFIG_NCPFS_STRONG=y +CONFIG_NCP_FS=m +# CONFIG_NDISWRAPPER is not set +CONFIG_NEON=y +CONFIG_NET=y +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETDEVICES=y +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_TPROXY=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETLABEL=y +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NETROM=m +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_9P=m +# CONFIG_NET_9P_DEBUG is not set +CONFIG_NET_ACT_GACT=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_CLS=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_CGROUP=y +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_CLS_FW=m +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_TCINDEX=m +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_DCCPPROBE is not set +# CONFIG_NET_DROP_MONITOR is not set +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6060=y +CONFIG_NET_DSA_MV88E6123_61_65=y +CONFIG_NET_DSA_MV88E6131=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_DSA_TAG_TRAILER=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_ETHERNET=y +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_NET_IPIP=m +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_NET_NS=y +CONFIG_NET_PCMCIA=y +CONFIG_NET_PKTGEN=m +CONFIG_NET_POCKET=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_FIFO=y +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_TCPPROBE=m +CONFIG_NEW_LEDS=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_NFS_FS=m +# CONFIG_NFS_FSCACHE is not set +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_V4_1 is not set +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_NF_CONNTRACK_SANE is not set +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CT_NETLINK=m +# CONFIG_NF_CT_PROTO_DCCP is not set +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NILFS2_FS=m +CONFIG_NLATTR=y +CONFIG_NLS=y +CONFIG_NLS_ASCII=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +CONFIG_NOP_TRACER=y +CONFIG_NOP_USB_XCEIV=m +CONFIG_NO_HZ=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_FS=m +# CONFIG_NTFS_RW is not set +CONFIG_NVRAM=m +CONFIG_N_HDLC=m +# CONFIG_OABI_COMPAT is not set +# CONFIG_OCFS2_DEBUG_FS is not set +CONFIG_OCFS2_DEBUG_MASKLOG=y +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_POSIX_ACL=y +CONFIG_OCFS2_FS_STATS=y +CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m +CONFIG_OLD_BELKIN_DONGLE=m +CONFIG_OMFS_FS=m +CONFIG_OPROFILE=m +CONFIG_OPROFILE_ARMV7=y +CONFIG_OSF_PARTITION=y +# CONFIG_OTUS is not set +CONFIG_P54_COMMON=m +CONFIG_P54_LEDS=y +CONFIG_P54_SPI=m +CONFIG_P54_USB=m +CONFIG_PACKARDBELL_E5=m +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PAGE_POISONING is not set +CONFIG_PANEL=m +# CONFIG_PANEL_CHANGE_MESSAGE is not set +CONFIG_PANEL_PARPORT=0 +CONFIG_PANEL_PROFILE=5 +CONFIG_PANTHERLORD_FF=y +CONFIG_PARPORT=m +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_AX88796=m +# CONFIG_PARPORT_GSC is not set +CONFIG_PARPORT_NOT_PC=y +# CONFIG_PARPORT_PC is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_PATA_FSL=y +CONFIG_PATA_PCMCIA=m +CONFIG_PCCARD=m +CONFIG_PCF50633_ADC=m +CONFIG_PCF50633_GPIO=m +CONFIG_PCF8575=m +# CONFIG_PCI_SYSCALL is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_AHA152X=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA_FDOMAIN=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_IOCTL=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_NINJA_SCSI=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_QLOGIC=m +CONFIG_PCMCIA_RAYCS=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_PCMCIA_SYM53C500=m +CONFIG_PCMCIA_WL3501=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PDA_POWER=m +CONFIG_PHONET=m +CONFIG_PHYLIB=y +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_PID_NS=y +CONFIG_PLAN9AUTH=m +CONFIG_PLIP=m +CONFIG_PM=y +CONFIG_PMIC_DA903X=y +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_DISABLE_CONSOLE is not set +CONFIG_PM_SLEEP=y +CONFIG_POHMELFS=m +CONFIG_POHMELFS_CRYPTO=y +# CONFIG_POHMELFS_DEBUG is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PPDEV=m +CONFIG_PPP=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_SYNC_TTY=m +# CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_PRINTER=m +CONFIG_PRINTK=y +# CONFIG_PRINTK_TIME is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_PRISM2_USB is not set +CONFIG_PROC_EVENTS=y +CONFIG_PROC_FS=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROC_SYSCTL=y +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +CONFIG_PROFILING=y +# CONFIG_PROVE_LOCKING is not set +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QNX4FS_FS=m +CONFIG_QSEMI_PHY=m +CONFIG_QUOTA=y +CONFIG_QUOTACTL=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_QUOTA_TREE=m +CONFIG_R3964=m +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_TEA5764=m +CONFIG_RAID_ATTRS=m +CONFIG_RAW_DRIVER=m +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RD_LZMA=y +CONFIG_REALTEK_PHY=m +CONFIG_REED_SOLOMON=m +CONFIG_REED_SOLOMON_DEC16=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_BQ24022=m +CONFIG_REGULATOR_DA903X=m +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +CONFIG_REGULATOR_LP3971=m +CONFIG_REGULATOR_MAX1586=m +CONFIG_REGULATOR_MC13892=y +CONFIG_REGULATOR_PCF50633=m +CONFIG_REGULATOR_TWL4030=y +CONFIG_REGULATOR_USERSPACE_CONSUMER=m +CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +CONFIG_REGULATOR_WM8350=m +CONFIG_REGULATOR_WM8400=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_FS=m +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_REISERFS_FS_XATTR=y +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_RELAY=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_RFD_FTL=m +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_LEDS=y +CONFIG_RING_BUFFER=y +# CONFIG_RING_BUFFER_BENCHMARK is not set +CONFIG_RIO=m +# CONFIG_RIO_OLDPCI is not set +CONFIG_RISCOM8=m +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +# CONFIG_ROMFS_BACKED_BY_MTD is not set +CONFIG_ROMFS_FS=m +CONFIG_ROMFS_ON_BLOCK=y +CONFIG_ROSE=m +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_SPKM3=m +CONFIG_RT2500USB=m +CONFIG_RT2800USB=m +CONFIG_RT2X00=m +# CONFIG_RT2X00_DEBUG is not set +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_CRYPTO=y +# CONFIG_RT2X00_LIB_DEBUGFS is not set +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_HT=y +CONFIG_RT2X00_LIB_LEDS=y +CONFIG_RT2X00_LIB_RFKILL=y +CONFIG_RT2X00_LIB_USB=m +# CONFIG_RT3070 is not set +CONFIG_RT73USB=m +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_CMOS=m +CONFIG_RTC_DRV_DS1286=m +CONFIG_RTC_DRV_DS1305=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1390=m +# CONFIG_RTC_DRV_DS1511 is not set +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_DS3234=m +CONFIG_RTC_DRV_FM3130=m +# CONFIG_RTC_DRV_IMXDI is not set +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_M41T94=m +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_M48T86=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_MAX6902=m +# CONFIG_RTC_DRV_MXC_V2 is not set +CONFIG_RTC_DRV_PCF50633=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +# CONFIG_RTC_DRV_R9701 is not set +CONFIG_RTC_DRV_RS5C348=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_STK17TA8=m +# CONFIG_RTC_DRV_TEST is not set +CONFIG_RTC_DRV_TWL4030=m +CONFIG_RTC_DRV_V3020=m +CONFIG_RTC_DRV_WM8350=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_LIB=y +CONFIG_RTC_MC13892=y +# CONFIG_RTC_MXC is not set +CONFIG_RTL8187=m +CONFIG_RTL8187_LEDS=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_RT_MUTEXES=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_RXKAD=m +# CONFIG_SAMPLES is not set +CONFIG_SATA_MV=m +CONFIG_SATA_PMP=y +CONFIG_SCC_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHED_TRACER is not set +CONFIG_SCSI=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_DEBUG is not set +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_ALUA=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DMA=y +CONFIG_SCSI_ENCLOSURE=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_FC_TGT_ATTRS=y +CONFIG_SCSI_ISCSITARGET=m +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_LOWLEVEL=y +CONFIG_SCSI_LOWLEVEL_PCMCIA=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_NETLINK=y +# CONFIG_SCSI_OSD_DEBUG is not set +CONFIG_SCSI_OSD_DPRINT_SENSE=1 +CONFIG_SCSI_OSD_INITIATOR=m +CONFIG_SCSI_OSD_ULD=m +CONFIG_SCSI_PROC_FS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=m +# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_SRP_TGT_ATTRS=y +CONFIG_SCSI_TGT=m +CONFIG_SCSI_WAIT_SCAN=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SDIO_UART=m +CONFIG_SDIO_UNIFI_FS=m +CONFIG_SDMA_IRAM=y +CONFIG_SDMA_IRAM_SIZE=0x1000 +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 +# CONFIG_SECURITY_APPARMOR_DISABLE is not set +CONFIG_SECURITY_APPARMOR_NETWORK=y +CONFIG_SECURITY_DEFAULT="apparmor" +CONFIG_SECURITY_FILE_CAPABILITIES=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_PATH=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_DISABLE=y +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_TOMOYO=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7473=m +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +CONFIG_SENSORS_ISL29003=y +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_LIS3_SPI=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_MAX1111=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_PCA9539=m +CONFIG_SENSORS_PCF8574=m +CONFIG_SENSORS_PCF8591=m +# CONFIG_SENSORS_SHT15 is not set +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SERIAL_8250=m +CONFIG_SERIAL_8250_CS=m +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_IMX is not set +CONFIG_SERIAL_MAX3100=m +CONFIG_SERIAL_MXC=y +CONFIG_SERIAL_MXC_CONSOLE=y +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_SERIO=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_RAW=m +CONFIG_SERIO_SERPORT=m +CONFIG_SGI_PARTITION=y +CONFIG_SHMEM=y +CONFIG_SIGMATEL_FIR=m +CONFIG_SIGNALFD=y +# CONFIG_SLAB is not set +CONFIG_SLABINFO=y +CONFIG_SLHC=y +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_SLIP_SMART=y +# CONFIG_SLOB is not set +CONFIG_SLOW_WORK=y +CONFIG_SLUB=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_SMC911X is not set +# CONFIG_SMC91X is not set +CONFIG_SMSC911X=y +CONFIG_SMSC_PHY=y +CONFIG_SMS_SDIO_DRV=m +CONFIG_SMS_SIANO_MDTV=m +CONFIG_SMS_USB_DRV=m +CONFIG_SND=y +CONFIG_SND_ARM=y +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_DYNAMIC_MINORS=y +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_HRTIMER=m +CONFIG_SND_HWDEP=m +CONFIG_SND_JACK=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_MPU401=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_MXC_SOC=y +CONFIG_SND_MXC_SOC_IRAM=y +CONFIG_SND_MXC_SOC_SSI=y +CONFIG_SND_MXC_SPDIF=m +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_PCM=y +CONFIG_SND_PCMCIA=y +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_PDAUDIOCF=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_RAWMIDI_SEQ=m +# CONFIG_SND_SBAWE_SEQ is not set +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_IMX_3STACK_AK4647 is not set +# CONFIG_SND_SOC_IMX_3STACK_AK5702 is not set +# CONFIG_SND_SOC_IMX_3STACK_BLUETOOTH is not set +CONFIG_SND_SOC_IMX_3STACK_SGTL5000=y +# CONFIG_SND_SOC_IMX_3STACK_WM8350 is not set +# CONFIG_SND_SOC_IMX_3STACK_WM8580 is not set +CONFIG_SND_SOC_SGTL5000=y +CONFIG_SND_SPI=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_TIMER=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +# CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VIRMIDI=m +CONFIG_SND_VXPOCKET=m +CONFIG_SND_VX_LIB=m +CONFIG_SOC_CAMERA=m +CONFIG_SOC_CAMERA_MT9M001=m +CONFIG_SOC_CAMERA_MT9M111=m +CONFIG_SOC_CAMERA_MT9T031=m +CONFIG_SOC_CAMERA_MT9V022=m +CONFIG_SOC_CAMERA_OV772X=m +CONFIG_SOC_CAMERA_PLATFORM=m +CONFIG_SOC_CAMERA_TW9910=m +CONFIG_SOFT_WATCHDOG=m +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +# CONFIG_SOUND_PRIME is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_SPECIALIX=m +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_BUTTERFLY=m +# CONFIG_SPI_DEBUG is not set +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_LM70_LLP=m +CONFIG_SPI_MASTER=y +CONFIG_SPI_MXC=y +CONFIG_SPI_MXC_SELECT1=y +# CONFIG_SPI_MXC_SELECT2 is not set +# CONFIG_SPI_MXC_SELECT3 is not set +# CONFIG_SPI_MXC_TEST_LOOPBACK is not set +CONFIG_SPI_SPIDEV=m +CONFIG_SPI_TLE62X0=m +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_SSB=m +# CONFIG_SSB_DEBUG is not set +# CONFIG_SSB_PCMCIAHOST is not set +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +CONFIG_SSB_POSSIBLE=y +CONFIG_SSFDC=m +CONFIG_STACKTRACE=y +CONFIG_STACKTRACE_SUPPORT=y +# CONFIG_STACK_TRACER is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +CONFIG_STALDRV=y +CONFIG_STANDALONE=y +CONFIG_STE10XP=m +# CONFIG_STLC45XX is not set +CONFIG_STP=m +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUN_PARTITION=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWAP=y +CONFIG_SYNCLINK_CS=m +CONFIG_SYN_COOKIES=y +CONFIG_SYSCTL=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_SYSFS=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_SYSV68_PARTITION=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSV_FS=m +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_WACOM=m +CONFIG_TASKSTATS=y +# CONFIG_TASK_DELAY_ACCT is not set +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_XACCT=y +CONFIG_TCG_ATMEL=m +CONFIG_TCG_NSC=m +CONFIG_TCG_TPM=m +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_MD5SIG=y +CONFIG_TEKRAM_DONGLE=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_TEXTSEARCH_KMP=m +CONFIG_THERMAL=m +CONFIG_THERMAL_HWMON=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_TICK_ONESHOT=y +CONFIG_TIMERFD=y +CONFIG_TIMER_STATS=y +CONFIG_TIPC=m +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_TOIM3232_DONGLE is not set +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_DA9034=m +CONFIG_TOUCHSCREEN_EETI=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_MXC=y +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_W90X900=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +# CONFIG_TPS65010 is not set +CONFIG_TRACEPOINTS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACING=y +CONFIG_TRACING_SUPPORT=y +CONFIG_TRANZPORT=m +# CONFIG_TREE_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_TTPCI_EEPROM is not set +CONFIG_TUN=m +CONFIG_TWL4030_CORE=y +CONFIG_TWL4030_USB=m +CONFIG_TWL4030_WATCHDOG=m +# CONFIG_UACCESS_WITH_MEMCPY is not set +CONFIG_UBIFS_FS=m +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +# CONFIG_UBIFS_FS_DEBUG is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_UFS_DEBUG is not set +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +CONFIG_UID16=y +CONFIG_UIO=m +CONFIG_UIO_PDRV=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_SMX=m +CONFIG_ULTRIX_PARTITION=y +CONFIG_UNIX=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_USB=y +CONFIG_USBPCWATCHDOG=m +CONFIG_USB_ACM=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_ARC=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARMLINUX=y +CONFIG_USB_ATM=m +CONFIG_USB_ATMEL=m +CONFIG_USB_AUDIO=m +CONFIG_USB_BELKIN=y +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_C67X00_HCD=m +CONFIG_USB_CATC=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_CDC_PHONET=m +CONFIG_USB_CPC=m +CONFIG_USB_CXACRU=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_DSBR=m +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_H1=y +# CONFIG_USB_EHCI_ARC_H2 is not set +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_EHCI_FSL_1301 is not set +# CONFIG_USB_EHCI_FSL_1504 is not set +# CONFIG_USB_EHCI_FSL_MC13783 is not set +CONFIG_USB_EHCI_FSL_UTMI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EMI26=m +CONFIG_USB_EMI62=m +CONFIG_USB_EPSON2888=y +CONFIG_USB_ET61X251=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_EZUSB=y +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_GADGET=y +CONFIG_USB_GADGETFS=m +# CONFIG_USB_GADGET_AMD5536UDC is not set +CONFIG_USB_GADGET_ARC=y +CONFIG_USB_GADGET_ARC_OTG=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_FSL_1301 is not set +# CONFIG_USB_GADGET_FSL_1504 is not set +# CONFIG_USB_GADGET_FSL_MC13783 is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +CONFIG_USB_GADGET_FSL_UTMI=y +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +# CONFIG_USB_GPIO_VBUS is not set +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SN9C20X_EVDEV=y +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +# CONFIG_USB_G_PRINTER is not set +CONFIG_USB_G_SERIAL=m +CONFIG_USB_HID=m +CONFIG_USB_HIDDEV=y +CONFIG_USB_HSO=m +CONFIG_USB_HWA_HCD=m +# CONFIG_USB_IBMCAM is not set +CONFIG_USB_IDMOUSE=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_IP_COMMON=m +CONFIG_USB_IP_HOST=m +CONFIG_USB_IP_VHCI_HCD=m +CONFIG_USB_IRDA=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_ISP116X_HCD=m +CONFIG_USB_ISP1760_HCD=m +CONFIG_USB_KAWETH=m +CONFIG_USB_KC2190=y +# CONFIG_USB_KONICAWC is not set +CONFIG_USB_LCD=m +CONFIG_USB_LD=m +CONFIG_USB_LED=m +CONFIG_USB_LEGOTOWER=m +# CONFIG_USB_LIBUSUAL is not set +CONFIG_USB_M5602=m +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_MON is not set +CONFIG_USB_MR800=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_OTG is not set +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_OV511 is not set +CONFIG_USB_OXU210HP_HCD=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_PRINTER=m +# CONFIG_USB_PWC is not set +CONFIG_USB_PWC_INPUT_EVDEV=y +# CONFIG_USB_QUICKCAM_MESSENGER is not set +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_RIO500=m +CONFIG_USB_RTL8150=m +CONFIG_USB_S2255=m +# CONFIG_USB_SE401 is not set +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_DEBUG=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IPW=m +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_IUU is not set +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MOTOROLA=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_QUATECH2=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +CONFIG_USB_SERIAL_SIEMENS_MPI=m +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_SI470X=m +CONFIG_USB_SISUSBVGA=m +# CONFIG_USB_SISUSBVGA_CON is not set +CONFIG_USB_SL811_CS=m +CONFIG_USB_SL811_HCD=m +CONFIG_USB_SN9C102=m +CONFIG_USB_SPEEDTOUCH=m +# CONFIG_USB_STATIC_IRAM is not set +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_ALAUDA=m +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_STORAGE_DATAFAB=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_KARMA=m +# CONFIG_USB_STORAGE_ONETOUCH is not set +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STV06XX=m +# CONFIG_USB_STV680 is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_TEST=m +CONFIG_USB_TMC=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_U132_HCD=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_USBNET=m +CONFIG_USB_USS720=m +# CONFIG_USB_VICAM is not set +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_VST=m +CONFIG_USB_WDM=m +CONFIG_USB_WUSB=m +CONFIG_USB_WUSB_CBAF=m +# CONFIG_USB_WUSB_CBAF_DEBUG is not set +CONFIG_USB_XUSBATM=m +CONFIG_USB_ZC0301=m +CONFIG_USB_ZD1201=m +# CONFIG_USB_ZERO is not set +CONFIG_USB_ZR364XX=m +# CONFIG_USER_NS is not set +# CONFIG_USER_SCHED is not set +CONFIG_UTMI_MXC=y +CONFIG_UTS_NS=y +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_I1480U=m +CONFIG_UWB_I1480U_WLP=m +CONFIG_UWB_WLP=m +CONFIG_V4L_USB_DRIVERS=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VERSION_SIGNATURE="" +CONFIG_VETH=m +CONFIG_VFAT_FS=y +CONFIG_VFP=y +CONFIG_VFPv3=y +# CONFIG_VGASTATE is not set +# CONFIG_VGA_CONSOLE is not set +CONFIG_VIDEOBUF_DVB=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_BWQCAM=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +CONFIG_VIDEO_CQCAM=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m +CONFIG_VIDEO_CX2341X=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_MEDIA=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_MT9V011=m +CONFIG_VIDEO_MXC_CAMERA=m +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +CONFIG_VIDEO_MXC_IPU_CAMERA=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_OPL is not set +CONFIG_VIDEO_MXC_OUTPUT=m +CONFIG_VIDEO_OUTPUT_CONTROL=m +# CONFIG_VIDEO_OVCAMCHIP is not set +CONFIG_VIDEO_PVRUSB2=m +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_PVRUSB2_DVB=y +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_SAA5246A=m +CONFIG_VIDEO_SAA5249=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_COMMON=m +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_W9966=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIRT_TO_BUS=y +CONFIG_VITESSE_PHY=m +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_VMSPLIT_1G is not set +# CONFIG_VMSPLIT_2G is not set +CONFIG_VMSPLIT_3G=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_VXFS_FS=m +CONFIG_W1=m +CONFIG_W1_CON=y +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_DS2490=m +# CONFIG_W1_MASTER_GPIO is not set +CONFIG_W1_MASTER_MXC=m +CONFIG_W1_SLAVE_BQ27000=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +CONFIG_W1_SLAVE_DS2438=m +# CONFIG_W1_SLAVE_DS2751 is not set +CONFIG_W1_SLAVE_DS2760=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_W35UND=m +CONFIG_WAN=y +CONFIG_WAN_ROUTER=m +CONFIG_WAN_ROUTER_DRIVERS=m +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WIMAX=m +CONFIG_WIMAX_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M=m +CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 +CONFIG_WIMAX_I2400M_SDIO=m +CONFIG_WIMAX_I2400M_USB=m +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_WIRELESS_OLD_REGULATORY is not set +CONFIG_WL12XX=m +CONFIG_WLAN_80211=y +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WM8350_POWER=m +CONFIG_WM8350_WATCHDOG=m +# CONFIG_WORKQUEUE_TRACER is not set +CONFIG_X25=m +CONFIG_X25_ASY=m +CONFIG_XFRM=y +CONFIG_XFRM_IPCOMP=m +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_USER=m +# CONFIG_XFS_DEBUG is not set +CONFIG_XFS_FS=m +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_RT=y +# CONFIG_XIP_KERNEL is not set +CONFIG_XOR_BLOCKS=m +CONFIG_YAM=m +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_ZEROPLUS_FF=y +CONFIG_ZISOFS=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA_FLAG=1 --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/config/armel/config.common.armel +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/config/armel/config.common.armel @@ -0,0 +1,3 @@ +# +# Config options for config.common.armel automatically generated by splitconfig.pl +# --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/config/armel/config.flavour.imx51 +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/config/armel/config.flavour.imx51 @@ -0,0 +1,3 @@ +# +# Config options for config.flavour.imx51 automatically generated by splitconfig.pl +# --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control.d/vars.imx51 +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control.d/vars.imx51 @@ -0,0 +1,9 @@ +arch="armel" +supported="I.MX51" +desc="I.MX51-based systems" +target="Babbage boards" +bootloader="flash-kernel" +provides="" +section_image="universe/admin" +do_debug="Yes" + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/control.d/flavour-control.stub +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/control.d/flavour-control.stub @@ -0,0 +1,52 @@ +# Items that get replaced: +# FLAVOUR +# DESC +# ARCH +# SUPPORTED +# TARGET +# BOOTLOADER +# =PROVIDES= +# +# Items marked with =FOO= are optional +# +# XXX: Leave the blank line before the first package!! + +Package: linux-image-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +#Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES= +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda +Conflicts: hotplug (<< 0.0.20040105-1) +Recommends: BOOTLOADER +Suggests: fdutils, SRCPKGNAME-doc-PKGVER | SRCPKGNAME-source-PKGVER +Description: Linux kernel image for version PKGVER on DESC + This package contains the Linux kernel image for version PKGVER on + DESC. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports SUPPORTED processors. + . + TARGET + . + You likely do not want to install this package directly. Instead, install + the linux-FLAVOUR meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. + +Package: linux-headers-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: devel +Priority: optional +Depends: coreutils | fileutils (>= 4.0), ${shlibs:Depends} +#Provides: SRCPKGNAME-headers, SRCPKGNAME-headers-2.6 +Description: Linux kernel headers for version PKGVER on DESC + This package provides kernel header files for version PKGVER on + DESC. + . + This is for sites that want the latest kernel headers. Please read + /usr/share/doc/linux-headers-PKGVER-ABINUM/debian.README.gz for details. + --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/control-create +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/control-create @@ -0,0 +1,25 @@ +#!/bin/bash + +. debian/debian.env + +vars=$1 + +. $vars + +if [ "$is_sub" = "" ]; then + flavour=$(basename $vars | sed 's/.*\.//') + stub=${DEBIAN}/control.d/flavour-control.stub +else + flavour=$(basename $vars .vars) + stub=${DEBIAN}/sub-flavours/control.stub +fi + +cat $stub | grep -v '^#' | sed \ + -e "s#FLAVOUR#$flavour#g" \ + -e "s#DESC#$desc#g" \ + -e "s#ARCH#$arch#g" \ + -e "s#SUPPORTED#$supported#g" \ + -e "s#TARGET#$target#g" \ + -e "s#BOOTLOADER#$bootloader#g" \ + -e "s#=PROVIDES=#$provides#g" \ + -e "s#=CONFLICTS=#$conflicts#g" --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/abi-check +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/abi-check @@ -0,0 +1,210 @@ +#!/usr/bin/perl -w + +my $flavour = shift; +my $prev_abinum = shift; +my $abinum = shift; +my $prev_abidir = shift; +my $abidir = shift; +my $skipabi = shift; + +my $fail_exit = 1; +my $EE = "EE:"; +my $errors = 0; +my $abiskip = 0; + +my $count; + +print "II: Checking ABI for $flavour...\n"; + +if (-f "$prev_abidir/ignore" + or -f "$prev_abidir/$flavour.ignore" or "$skipabi" eq "true") { + print "WW: Explicitly asked to ignore ABI, running in no-fail mode\n"; + $fail_exit = 0; + $abiskip = 1; + $EE = "WW:"; +} + +if ($prev_abinum != $abinum) { + print "II: Different ABI's, running in no-fail mode\n"; + $fail_exit = 0; + $EE = "WW:"; +} + +if (not -f "$abidir/$flavour" or not -f "$prev_abidir/$flavour") { + print "EE: Previous or current ABI file missing!\n"; + print " $abidir/$flavour\n" if not -f "$abidir/$flavour"; + print " $prev_abidir/$flavour\n" if not -f "$prev_abidir/$flavour"; + + # Exit if the ABI files are missing, but return status based on whether + # skip ABI was indicated. + if ("$abiskip" eq "1") { + exit(0); + } else { + exit(1); + } +} + +my %symbols; +my %symbols_ignore; +my %modules_ignore; +my %module_syms; + +# See if we have any ignores +my $ignore = 0; +print " Reading symbols/modules to ignore..."; + +for $file ("$prev_abidir/../blacklist", "$prev_abidir/../../perm-blacklist") { + if (-f $file) { + open(IGNORE, "< $file") or + die "Could not open $file"; + while () { + chomp; + if ($_ =~ m/M: (.*)/) { + $modules_ignore{$1} = 1; + } else { + $symbols_ignore{$_} = 1; + } + $ignore++; + } + close(IGNORE); + } +} +print "read $ignore symbols/modules.\n"; + +sub is_ignored($$) { + my ($mod, $sym) = @_; + + die "Missing module name in is_ignored()" if not defined($mod); + die "Missing symbol name in is_ignored()" if not defined($sym); + + if (defined($symbols_ignore{$sym}) or defined($modules_ignore{$mod})) { + return 1; + } + return 0; +} + +# Read new syms first +print " Reading new symbols ($abinum)..."; +$count = 0; +open(NEW, "< $abidir/$flavour") or + die "Could not open $abidir/$flavour"; +while () { + chomp; + m/^(EXPORT_.+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/; + $symbols{$4}{'type'} = $1; + $symbols{$4}{'loc'} = $2; + $symbols{$4}{'hash'} = $3; + $module_syms{$2} = 0; + $count++; +} +close(NEW); +print "read $count symbols.\n"; + +# Now the old symbols, checking for missing ones +print " Reading old symbols ($prev_abinum)..."; +$count = 0; +open(OLD, "< $prev_abidir/$flavour") or + die "Could not open $prev_abidir/$flavour"; +while () { + chomp; + m/^(EXPORT_.+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/; + $symbols{$4}{'old_type'} = $1; + $symbols{$4}{'old_loc'} = $2; + $symbols{$4}{'old_hash'} = $3; + $count++; +} +close(OLD); + +print "read $count symbols.\n"; + +print "II: Checking for missing symbols in new ABI..."; +$count = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'type'})) { + print "\n" if not $count; + printf(" MISS : %s%s\n", $sym, + is_ignored($symbols{$sym}{'old_loc'}, $sym) ? " (ignored)" : ""); + $count++ if !is_ignored($symbols{$sym}{'old_loc'}, $sym); + } +} +print " " if $count; +print "found $count missing symbols\n"; +if ($count) { + print "$EE Symbols gone missing (what did you do!?!)\n"; + $errors++; +} + + +print "II: Checking for new symbols in new ABI..."; +$count = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'old_type'})) { + print "\n" if not $count; + print " NEW : $sym\n"; + $count++; + } +} +print " " if $count; +print "found $count new symbols\n"; +if ($count and $prev_abinum == $abinum) { + print "WW: Found new symbols within same ABI. Not recommended\n"; +} + +print "II: Checking for changes to ABI...\n"; +$count = 0; +my $moved = 0; +my $changed_type = 0; +my $changed_hash = 0; +foreach $sym (keys(%symbols)) { + if (!defined($symbols{$sym}{'old_type'}) or + !defined($symbols{$sym}{'type'})) { + next; + } + + # Changes in location don't hurt us, but log it anyway + if ($symbols{$sym}{'loc'} ne $symbols{$sym}{'old_loc'}) { + printf(" MOVE : %-40s : %s => %s\n", $sym, $symbols{$sym}{'old_loc'}, + $symbols{$sym}{'loc'}); + $moved++; + } + + # Changes to export type are only bad if new type isn't + # EXPORT_SYMBOL. Changing things to GPL are bad. + if ($symbols{$sym}{'type'} ne $symbols{$sym}{'old_type'}) { + printf(" TYPE : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_type'}. + $symbols{$sym}{'type'}, is_ignored($symbols{$sym}{'loc'}, $sym) + ? " (ignored)" : ""); + $changed_type++ if $symbols{$sym}{'type'} ne "EXPORT_SYMBOL" + and !is_ignored($symbols{$sym}{'loc'}, $sym); + } + + # Changes to the hash are always bad + if ($symbols{$sym}{'hash'} ne $symbols{$sym}{'old_hash'}) { + printf(" HASH : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_hash'}, + $symbols{$sym}{'hash'}, is_ignored($symbols{$sym}{'loc'}, $sym) + ? " (ignored)" : ""); + $changed_hash++ if !is_ignored($symbols{$sym}{'loc'}, $sym); + $module_syms{$symbols{$sym}{'loc'}}++; + } +} + +print "WW: $moved symbols changed location\n" if $moved; +print "$EE $changed_type symbols changed export type and weren't ignored\n" if $changed_type; +print "$EE $changed_hash symbols changed hash and weren't ignored\n" if $changed_hash; + +$errors++ if $changed_hash or $changed_type; +if ($changed_hash) { + print "II: Module hash change summary...\n"; + foreach $mod (sort { $module_syms{$b} <=> $module_syms{$a} } keys %module_syms) { + next if ! $module_syms{$mod}; + printf(" %-40s: %d\n", $mod, $module_syms{$mod}); + } +} + +print "II: Done\n"; + +if ($errors) { + exit($fail_exit); +} else { + exit(0); +} --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/module-check +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/module-check @@ -0,0 +1,120 @@ +#!/usr/bin/perl -w + +$flavour = shift; +$prev_abidir = shift; +$abidir = shift; +$skipmodule = shift; + +print "II: Checking modules for $flavour..."; + +if (-f "$prev_abidir/ignore.modules" + or -f "$prev_abidir/$flavour.ignore.modules") { + print "explicitly ignoring modules\n"; + exit(0); +} + +if (not -f "$abidir/$flavour.modules" or not -f + "$prev_abidir/$flavour.modules") { + print "previous or current modules file missing!\n"; + print " $abidir/$flavour.modules\n"; + print " $prev_abidir/$flavour.modules\n"; + if (defined($skipmodule)) { + exit(0); + } else { + exit(1); + } +} + +print "\n"; + +my %modules; +my %modules_ignore; +my $missing = 0; +my $new = 0; +my $errors = 0; + +# See if we have any ignores +if (-f "$prev_abidir/../modules.ignore") { + my $ignore = 0; + open(IGNORE, "< $prev_abidir/../modules.ignore") or + die "Could not open $prev_abidir/../modules.ignore"; + print " reading modules to ignore..."; + while () { + chomp; + next if /\s*#/; + $modules_ignore{$_} = 1; + $ignore++; + } + close(IGNORE); + print "read $ignore modules.\n"; +} + +# Read new modules first +print " reading new modules..."; +$new_count = 0; +open(NEW, "< $abidir/$flavour.modules") or + die "Could not open $abidir/$flavour.modules"; +while () { + chomp; + $modules{$_} = 1; + $new_count++; +} +close(NEW); +print "read $new_count modules.\n"; + +# Now the old modules, checking for missing ones +print " reading old modules..."; +$old_count = 0; +open(OLD, "< $prev_abidir/$flavour.modules") or + die "Could not open $prev_abidir/$flavour.modules"; +while () { + chomp; + if (not defined($modules{$_})) { + print "\n" if not $missing; + $missing++; + if (not defined($modules_ignore{$_})) { + print " MISS: $_\n"; + $errors++; + } else { + print " MISS: $_ (ignored)\n"; + } + } else { + $modules{$_}++; + } + $old_count++; +} +close(OLD); +# Check for new modules +foreach $mod (keys(%modules)) { + if ($modules{$mod} < 2) { + print "\n" if not $missing and not $new; + print " NEW : $mod\n"; + $new++; + } +} +if ($new or $missing) { + print " read $old_count modules : new($new) missing($missing)\n"; +} else { + print "read $old_count modules.\n"; +} + + +# Let's see where we stand... +if ($errors) { + if (defined($skipmodule)) { + print "WW: Explicitly asked to ignore failures (probably not good)\n"; + } else { + print "EE: Missing modules (start begging for mercy)\n"; + exit 1 + } +} + +if ($new) { + print "II: New modules (you've been busy, wipe the poop off your nose)\n"; +} else { + print "II: No new modules (hope you're happy, slacker)\n"; +} + +print "II: Done\n"; + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/sub-flavour +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/sub-flavour @@ -0,0 +1,32 @@ +#!/bin/bash -e + +. debian/debian.env + +echo "SUB_PROCESS $FROM => $TO" + +export from_pkg="linux-image-$ABI_RELEASE-$FROM" +export to_pkg="linux-image-$ABI_RELEASE-$TO" + +from_moddir="debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM" +to_moddir="debian/$to_pkg/lib/modules/$ABI_RELEASE-$FROM" + +install -d "debian/$to_pkg/boot" +install -m644 debian/$from_pkg/boot/{vmlinuz,System.map,config}-$ABI_RELEASE-$FROM \ + debian/$to_pkg/boot/ + +cat ${DEBIAN}/sub-flavours/$TO.list | while read line; do + (cd debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM/kernel; + eval find $line -name '*.ko'); +done | while read mod; do + echo "SUB_INST checking: $mod" + fromdir="/lib/modules/$ABI_RELEASE-$FROM/" + egrep "^($fromdir)?kernel/$mod:" \ + $from_moddir/modules.dep | sed -e "s|^$fromdir||" -e 's/://' -e 's/ /\n/g' | \ + while read m; do + m="${fromdir}$m" + test -f debian/$to_pkg/$m && continue + echo "SUB_INST installing: $mod" + install -D -m644 debian/$from_pkg/$m \ + debian/$to_pkg/$m + done +done --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/link-headers +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/link-headers @@ -0,0 +1,42 @@ +#!/bin/bash -e + +. debian/debian.env + +hdrdir="$1" +symdir="$2" +flavour="$3" + +echo "Symlinking and copying headers for $flavour..." + +excludes="( -path ./debian -prune -o -path ./${DEBIAN} -prune -o -path ./.git ) -prune -o" + +( +find . $excludes -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) -print +find ./include ./scripts -name .gitignore -prune -o -type f -print +find ./include -mindepth 1 -maxdepth 1 $excludes -type d -print +) | ( +while read file; do + dir=$file + lastdir=$file + + if [ -e "$hdrdir/$file" -o -L "$hdrdir/$file" ]; then + continue + fi + + while [ ! -e "$hdrdir/$dir" -a ! -L "$hdrdir/$dir" ]; do + lastdir=$dir + dir=`dirname $dir` + done + # If the last item to exist is a symlink we assume all is good + if [ ! -L "$hdrdir/$dir" ]; then + # Turns things like "./foo" into "../" + deref="`echo -n $lastdir | sed -e 's/^\.//' -e's,/[^/]*,../,g'`" + item="`echo -n $lastdir | sed -e 's/^\.\///'`" + ln -s $deref$symdir/$item $hdrdir/$item + fi +done +) + +exit --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/getabis +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/getabis @@ -0,0 +1,76 @@ +#!/bin/bash + +if [ "$#" != "2" ]; then + echo "Usage: $0 " 1>&2 + exit 1 +fi + +ver=$1 +revision=$2 +abi=$(echo $revision | awk -F. '{print $1}') + +verabi=$ver-$abi +verfull=$ver-$revision + +repo_fsl="http://ports.ubuntu.com/pool/main/l/linux-fsl-imx51" + +WGET="wget --quiet -c" + +abidir="`pwd`/debian/abi/$verfull" +tmpdir="`pwd`/abi-tmp-$verfull" +origdir="`pwd`" + +test -d $tmpdir || mkdir $tmpdir + +getall() { + arch=$1 + shift + + mkdir -p $abidir/$arch + + for sub in $@; do + if [ -f $abidir/$arch/$sub ]; then + echo "Exists: $sub" + continue + fi + echo -n "Fetching $sub..." + filename=linux-image-${verabi}-${sub}_${verfull}_${arch}.deb + cd $tmpdir + for r in $repo_fsl + do + if ! [ -f $filename ]; then + $WGET $r/$filename + fi + done + if [ "$?" = "0" ]; then + echo -n "extracting..." + dpkg-deb --extract $filename tmp + if [ -f tmp/boot/abi-* ]; then + mv tmp/boot/abi-* $abidir/$arch/$sub + else + echo -n "NO ABI FILE..." + fi + (cd tmp; find lib/modules/$verabi-$sub/kernel -name '*.ko') | \ + sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > \ + $abidir/$arch/$sub.modules + rm -rf tmp $filename + echo "done." + else + echo "FAILED." + fi + cd $origdir + done +} + +# MAIN + +# Setup abi directory +mkdir -p $abidir +echo $abi > $abidir/abiname + +# NOTE: The flavours are hardcoded, because they may have changed from the +# current build. + +getall armel imx51 + +rmdir $tmpdir --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/insert-ubuntu-changes +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/insert-ubuntu-changes @@ -0,0 +1,58 @@ +#!/usr/bin/perl + +if ($#ARGV != 2) { + die "Usage: $0 \n"; +} +my ($changelog, $end, $start) = @ARGV; + +$end =~ s/.*\.//; +$start =~ s/.*\.//; + +my @changes = (); +my $output = 0; +open(CHG, ") { + if (/^\S+\s+\((.*\.(\d+))\)/) { + if ($2 <= $end) { + last; + } + if ($2 == $start) { + $output = 1; + } + if ($output) { + push(@changes, "\n [ Ubuntu: $1 ]\n\n"); + next; + } + } + next if ($output == 0); + + next if (/^\s*$/); + next if (/^\s--/); + next if (/^\s\s[^\*\s]/); + + push(@changes, $_); +} +close(CHG); + +open(CHANGELOG, "< $changelog") or die "Cannot open changelog"; +open(NEW, "> $changelog.new") or die "Cannot open new changelog"; + +$printed = 3; +while () { + if (/^ CHANGELOG: /) { + $printed--; + print NEW; + if ($printed == 0) { + print NEW @changes; + } + next; + } + print NEW; +} + +close(NEW); +close(CHANGELOG); + +rename("$changelog.new", "$changelog"); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/insert-changes.pl +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/insert-changes.pl @@ -0,0 +1,34 @@ +#!/usr/bin/perl -w + +my $debian; +$debian = $ARGV[0] if (defined $ARGV[0]); +$debian = 'debian.master' if (!defined $debian); + +system("make -s -f $debian/rules printchanges > $debian/changes"); + +open(CHANGELOG, "< $debian/changelog") or die "Cannot open changelog"; +open(CHANGES, "< $debian/changes") or die "Cannot open new changes"; +open(NEW, "> $debian/changelog.new") or die "Cannot open new changelog"; + +$printed = 0; + +while () { + if (/^ CHANGELOG: /) { + next if $printed; + + while () { + print NEW; + } + + $printed = 1; + } else { + print NEW; + } +} + +close(NEW); +close(CHANGES); +close(CHANGELOG); + +rename("$debian/changelog.new", "$debian/changelog"); +unlink("$debian/changes"); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/kernelconfig +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/kernelconfig @@ -0,0 +1,117 @@ +#!/bin/bash + +. debian/debian.env + +# Script to merge all configs and run 'make silentoldconfig' on it to wade out bad juju. +# Then split the configs into distro-commmon and flavour-specific parts + +# We have to be in the top level kernel source directory +if [ ! -f MAINTAINERS ] || [ ! -f Makefile ]; then + echo "This does not appear to be the kernel source directory." 1>&2 + exit 1 +fi + +mode=${1:?"Usage: $0 [oldconfig|editconfig]"} +case "$mode" in + oldconfig) ;; # All is good + editconfig) ;; # All is good + genconfig) ;; # All is good + *) echo "$0 called with invalid mode" 1>&2 + exit 1 ;; +esac +kerneldir="`pwd`" +confdir="$kerneldir/${DEBIAN}/config" +archs=armel +kernarch=arm +family='ubuntu' +bindir="`pwd`/${DEBIAN}/scripts/misc" +common_conf="$confdir/config.common.$family" +tmpdir=`mktemp -d` + +if [ "$mode" = "genconfig" ]; then + keep=1 + mode="oldconfig" + test -d CONFIGS || mkdir CONFIGS +fi + +test -d build || mkdir build + +for arch in $archs; do + echo "" + echo "***************************************" + echo "* Processing $arch ($kernarch) ... " + archconfdir=$confdir/$arch + flavourconfigs=$(cd $archconfdir && ls config.flavour.*) + echo flavourconfigs $flavourconfigs + + # Merge configs + # We merge config.common.ubuntu + config.common. + + # config.flavour. + + for config in $flavourconfigs; do + fullconf="$tmpdir/$arch-$config-full" + case $config in + *) + : >"$fullconf" + if [ -f $common_conf ]; then + cat $common_conf >> "$fullconf" + fi + if [ -f $archconfdir/config.common.$arch ]; then + cat $archconfdir/config.common.$arch >> "$fullconf" + fi + cat "$archconfdir/$config" >>"$fullconf" + ;; + esac + done + + for config in $flavourconfigs; do + if [ -f $archconfdir/$config ]; then + fullconf="$tmpdir/$arch-$config-full" + cat "$fullconf" > build/.config + # Call oldconfig or menuconfig + case "$mode" in + oldconfig) + # Weed out incorrect config parameters + echo "* Run silentoldconfig on $arch/$config ..." + make O=`pwd`/build ARCH=$kernarch silentoldconfig ;; + editconfig) + # Interactively edit config parameters + echo " * Run menuconfig on $arch/$config... Press a key." + read + make O=`pwd`/build ARCH=$kernarch menuconfig ;; + *) # Bad! + exit 1 ;; + esac + cat build/.config > $archconfdir/$config + if [ "$keep" = "1" ]; then + cat build/.config > CONFIGS/$arch-$config + fi + else + echo "!! Config not found $archconfdir/$config..." + fi + done + + echo "Running splitconfig.pl for $arch" + echo + + # Can we make this more robust by avoiding $tmpdir completely? + # This approach was used for now because I didn't want to change + # splitconfig.pl + (cd $archconfdir; $bindir/splitconfig.pl; mv config.common \ + config.common.$arch; cp config.common.$arch $tmpdir) +done + +rm -f $common_conf + +# Now run splitconfig.pl on all the config.common. copied to +# $tmpdir +(cd $tmpdir; $bindir/splitconfig.pl) +( + cd $confdir; + rm -f *-full + grep -v 'is UNMERGABLE' <$tmpdir/config.common >$common_conf + for arch in $archs; do + grep -v 'is UNMERGABLE' <$tmpdir/config.common.$arch \ + >$arch/config.common.$arch + done +) --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/splitconfig.pl +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/splitconfig.pl @@ -0,0 +1,111 @@ +#!/usr/bin/perl -w + +%allconfigs = (); +%common = (); + +print "Reading config's ...\n"; + +opendir(DIR, "."); + +while (defined($config = readdir(DIR))) { + # Only config.* + next if $config !~ /^config\..*/; + # Nothing that is disabled, or remnant + next if $config =~ /.*\.(default|disabled|stub)$/; + + %{$allconfigs{$config}} = (); + + print " processing $config ... "; + + open(CONFIG, "< $config"); + + while () { + # Skip comments + /^#*\s*CONFIG_(\w+)[\s=](.*)$/ or next; + + ${$allconfigs{$config}}{$1} = $2; + + $common{$1} = $2; + } + + close(CONFIG); + + print "done.\n"; +} + +closedir(DIR); + +print "\n"; + +print "Merging lists ... \n"; + +# %options - pointer to flavour config inside the allconfigs array +for $config (keys(%allconfigs)) { + my %options = %{$allconfigs{$config}}; + + print " processing $config ... "; + + for $key (keys(%common)) { + next if not defined $common{$key}; + + # If we don't have the common option, then it isn't + # common. If we do have that option, it must have the same + # value. EXCEPT where this file does not have a value at all + # which may safely be merged with any other value; the value + # will be elided during recombination of the parts. + if (!defined($options{$key})) { + # Its ok really ... let it merge + } elsif (not defined($options{$key})) { + undef $common{$key}; + } elsif ($common{$key} ne $options{$key}) { + undef $common{$key}; + } + } + + print "done.\n"; +} + +print "\n"; + +print "Creating common config ... "; + +open(COMMON, "> config.common"); +print COMMON "#\n# Common config options automatically generated by splitconfig.pl\n#\n"; + +for $key (sort(keys(%common))) { + if (not defined $common{$key}) { + print COMMON "# CONFIG_$key is UNMERGABLE\n"; + } elsif ($common{$key} eq "is not set") { + print COMMON "# CONFIG_$key is not set\n"; + } else { + print COMMON "CONFIG_$key=$common{$key}\n"; + } +} +close(COMMON); + +print "done.\n\n"; + +print "Creating stub configs ...\n"; + +for $config (keys(%allconfigs)) { + my %options = %{$allconfigs{$config}}; + + print " processing $config ... "; + + open(STUB, "> $config"); + print STUB "#\n# Config options for $config automatically generated by splitconfig.pl\n#\n"; + + for $key (sort(keys(%options))) { + next if defined $common{$key}; + + if ($options{$key} =~ /^is /) { + print STUB "# CONFIG_$key $options{$key}\n"; + } else { + print STUB "CONFIG_$key=$options{$key}\n"; + } + } + + close(STUB); + + print "done.\n"; +} --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/git-ubuntu-log +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/git-ubuntu-log @@ -0,0 +1,243 @@ +#!/usr/bin/perl -w + +use strict; +use Text::Wrap; + +my $kernel_auth = "Upstream Kernel Changes"; + +my (%map, @reverts); +my $pstate = 1; +my $no_kern_log = 0; +my $print_shas = 0; +my $first_print = 1; + +while (@ARGV) { + my $opt = $ARGV[0]; + shift; + if ($opt eq "--no-kern-log") { + $no_kern_log = 1; + } elsif ($opt eq "--print-shas") { + $print_shas = 1; + } else { + print STDERR "Unknown options: $opt\n"; + exit(1); + } +} + +sub check_reverts($) { + my ($entry) = @_; + my ($check); + + foreach $check (reverse @reverts) { + my $desc = "Revert \"" . $entry->{'desc'} . "\""; + if ($check->{'desc'} eq $desc) { + @reverts = grep($_->{'desc'} ne $desc, @reverts); + return 1; + } + } + + return 0; +} + +sub add_entry($) { + my ($entry) = @_; + my $key = $entry->{'author'}; + + # store description in array, in email->{desc list} map + if (exists $map{$key}) { + # grab ref + my $obj = $map{$key}; + + # add desc to array + push(@$obj, $entry); + } else { + # create new array, containing 1 item + my @arr = ($entry); + + # store ref to array + $map{$key} = \@arr; + } +} + +sub shortlog_entry($$$$$) { + my ($name, $desc, $bug, $cve, $commit) = @_; + my $entry; + + $desc =~ s#/pub/scm/linux/kernel/git/#/.../#g; + $desc =~ s#\[PATCH\] ##g; + + $desc =~ s#^\s*##g; + $desc =~ s# *UBUNTU: ##g; + + $entry->{'desc'} = $desc; + if ($bug ne '') { + $entry->{'bugno'} = $bug; + } + $entry->{'cve'} = $cve; + $entry->{'commit'} = $commit; + $entry->{'author'} = $name; + + if ($desc =~ /^Revert "/) { + push(@reverts, $entry); + return; + } + + return if check_reverts($entry); + + add_entry($entry); +} + +# sort comparison function +sub by_name($$) { + my ($a, $b) = @_; + + uc($a) cmp uc($b); +} + +sub shortlog_output { + my ($obj, $key, $entry); + + foreach $key (sort by_name keys %map) { + next if $key eq $kernel_auth and $no_kern_log; + + print "\n" unless $first_print; + $first_print = 0; + + # output author + printf " [ %s ]\n\n", $key; + + # output author's 1-line summaries + $obj = $map{$key}; + foreach $entry (reverse @$obj) { + print wrap(" * ", " ", $entry->{'desc'}) . "\n"; + # For non upstream changes, add other info. + if ($key ne $kernel_auth) { + if ($print_shas) { + print " - GIT-SHA " . $entry->{'commit'} . + "\n"; + } + } + if (defined($entry->{'bugno'})) { + print " - LP: #" . $entry->{'bugno'} . "\n"; + } + if (defined($entry->{'cve'})) { + print " - " . $entry->{'cve'} . "\n"; + } + } + } +} + +sub changelog_input { + my ($author, $desc, $commit, $entry, $cve); + + while () { + # get commit + if ($pstate == 1) { + next unless /^commit (.*)/; + + $commit = $1; + + $pstate++; + } + + # get author and email + elsif ($pstate == 2) { + my ($email); + + next unless /^[Aa]uthor:?\s*(.*?)\s*<(.*)>/; + + $author = $1; + $email = $2; + $desc = undef; + $cve = undef; + + # cset author fixups + if (!$author) { + $author = $email; + } + $pstate++; + } + + # skip to blank line + elsif ($pstate == 3) { + next unless /^\s*$/; + $pstate++; + } + + # skip to non-blank line + elsif ($pstate == 4) { + next unless /^\s*?(.*)/; + my $ignore = 0; + my $bug = undef; + my %bugz = (); + my $k; + + # skip lines that are obviously not + # a 1-line cset description + next if /^\s*From: /; + + chomp; + $desc = $1; + + if ($desc =~ /^ *(Revert "|)UBUNTU:/) { + while () { + $ignore = 1 if /^ *Ignore: yes/i; + if (/^ *Bug: *(#|)(.*)/i) { + foreach $k (split('(,|)*\s*#', $2)) { + $bugz{$k} = 1 if (($k ne '') and ($k =~ /[0-9]+/)); + } + } + elsif (/^ *BugLink: *http.*:\/\/.*\/([0-9]+)/i) { + $bugz{$1} = 1; + } + elsif (/^ *(CVE-.*)/) { + $cve = $1 + } + last if /^commit /; + } + } else { + $author = $kernel_auth; + $ignore = 1 if $desc =~ /Merge /; + while () { + if (/^ *Bug: *(#|)(.*)/i) { + foreach $k (split('(,|)*\s*#', $2)) { + $bugz{$k} = 1 if (($k ne '') and ($k =~ /[0-9]+/)); + } + } + elsif (/^ *BugLink: *http.*:\/\/.*\/([0-9]+)/i) { + $bugz{$1} = 1; + } + elsif (/^ *(CVE-.*)/) { + $cve = $1 + } + last if /^commit /; + } + } + + $bug = join(", #", keys(%bugz)); + if (!$ignore) { + &shortlog_entry($author, $desc, $bug, + $cve, $commit, 0); + } + + $pstate = 1; + if ($_ && /^commit (.*)/) { + $commit = $1; + $pstate++; + } + } + + else { + die "invalid parse state $pstate"; + } + } + + foreach $entry (@reverts) { + add_entry($entry); + } +} + +&changelog_input; +&shortlog_output; + +exit(0); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/scripts/misc/retag +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/scripts/misc/retag @@ -0,0 +1,34 @@ +#!/usr/bin/perl -w + +open(TAGS, "git tag -l |") or die "Could not get list of tags"; +@tags = ; +close(TAGS); + +open(LOGS, "git log --pretty=short |") or die "ERROR: Calling git log"; +my $commit = ""; + +while () { + my $origtag; + + if (m|^commit (.*)$|) { + $commit = $1; + next; + } + + m|\s*UBUNTU: (Ubuntu-2\.6\..*)| or next; + + $tag = $1; + + ($origtag) = grep(/^$tag.orig$/, @tags); + + if (!defined($origtag)) { + print "I: Adding original tag for $tag\n"; + system("git tag -m $tag $tag.orig $tag"); + } + + print "I: Tagging $tag => $commit\n"; + + system("git tag -f -m $tag $tag $commit"); +} + +close(LOGS); --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/sub-flavours/control.stub +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/sub-flavours/control.stub @@ -0,0 +1,39 @@ +# Items that get replaced: +# FLAVOUR +# DESC +# ARCH +# SUPPORTED +# TARGET +# BOOTLOADER +# =PROVIDES= +# =CONFLICTS= +# +# Items marked with =FOO= are optional +# +# XXX: Leave the blank line before the first package!! + +Package: linux-image-PKGVER-ABINUM-FLAVOUR +Architecture: ARCH +Section: admin +Priority: optional +Pre-Depends: dpkg (>= 1.10.24) +Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES= +Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3) +Conflicts: hotplug (<< 0.0.20040105-1), =CONFLICTS= +Recommends: BOOTLOADER +Suggests: fdutils, linux-doc-PKGVER | linux-source-PKGVER +Description: Linux kernel image for version PKGVER on DESC + This package contains the Linux kernel image for version PKGVER on + DESC. + . + Also includes the corresponding System.map file, the modules built by the + packager, and scripts that try to ensure that the system is not left in an + unbootable state after an update. + . + Supports SUPPORTED processors. + . + TARGET + . + You likely do not want to install this package directly. Instead, install + the linux-FLAVOUR meta-package, which will ensure that upgrades work + correctly, and that supporting packages are also installed. --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/sub-flavours/README +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/sub-flavours/README @@ -0,0 +1,12 @@ +Sub flavours are flavours that are built based on other builds. IOW, they +are usually a subset of something else. + +Requirements: + +debian/sub-flavours/.list : The file list, uses glob syntax +debian/sub-flavours/.vars : The make vars, similar to normal flavours +debian/rules.d/.mk : Add _sub var listing the , e.g. + server_sub = virtual would mean virtual is + based on the server flavour. + +Note, the vars must include a conflicts with the flavour it was built on. --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/abi/2.6.31-612.32/abiname +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/abi/2.6.31-612.32/abiname @@ -0,0 +1 @@ +612 --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/abi/2.6.31-612.32/armel/imx51 +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/abi/2.6.31-612.32/armel/imx51 @@ -0,0 +1,7489 @@ +EXPORT_SYMBOL arch/arm/plat-mxc/pwm 0x0ac810ea pwm_config +EXPORT_SYMBOL arch/arm/plat-mxc/pwm 0x126c9be2 pwm_disable +EXPORT_SYMBOL arch/arm/plat-mxc/pwm 0x69537325 pwm_free +EXPORT_SYMBOL arch/arm/plat-mxc/pwm 0x7404ed2b pwm_enable +EXPORT_SYMBOL arch/arm/plat-mxc/pwm 0xbe889207 pwm_request +EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f gf128mul_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x1068004b gf128mul_bbe +EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0 gf128mul_init_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0x3755f990 gf128mul_init_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce gf128mul_64k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd gf128mul_x_ble +EXPORT_SYMBOL crypto/gf128mul 0x83581089 gf128mul_init_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9 gf128mul_init_4k_bbe +EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6 gf128mul_lle +EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df gf128mul_4k_lle +EXPORT_SYMBOL crypto/gf128mul 0xc0890413 gf128mul_64k_lle +EXPORT_SYMBOL crypto/gf128mul 0xd60736ec gf128mul_free_64k +EXPORT_SYMBOL crypto/xor 0x5b6c00e6 xor_blocks +EXPORT_SYMBOL drivers/char/generic_serial 0x14c9f7e7 gs_close +EXPORT_SYMBOL drivers/char/generic_serial 0x2f37a09a gs_hangup +EXPORT_SYMBOL drivers/char/generic_serial 0x431da0be gs_block_til_ready +EXPORT_SYMBOL drivers/char/generic_serial 0x55f9ad80 gs_write +EXPORT_SYMBOL drivers/char/generic_serial 0x628e92a0 gs_got_break +EXPORT_SYMBOL drivers/char/generic_serial 0x6321eefc gs_write_room +EXPORT_SYMBOL drivers/char/generic_serial 0x8518bb9e gs_flush_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0x9abab85b gs_put_char +EXPORT_SYMBOL drivers/char/generic_serial 0xa27afea4 gs_setserial +EXPORT_SYMBOL drivers/char/generic_serial 0xa2ba24e9 gs_flush_chars +EXPORT_SYMBOL drivers/char/generic_serial 0xb14ed663 gs_chars_in_buffer +EXPORT_SYMBOL drivers/char/generic_serial 0xb6f9bbf9 gs_set_termios +EXPORT_SYMBOL drivers/char/generic_serial 0xcffefc25 gs_getserial +EXPORT_SYMBOL drivers/char/generic_serial 0xd423281c gs_stop +EXPORT_SYMBOL drivers/char/generic_serial 0xdadd41af gs_init_port +EXPORT_SYMBOL drivers/char/generic_serial 0xf6739b41 gs_start +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0806f9e9 ipmi_register_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0d9eaa24 ipmi_get_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1629ab87 ipmi_request_settime +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1b1ebae3 ipmi_destroy_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26f23099 ipmi_register_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2c2593f0 ipmi_request_supply_msgs +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c ipmi_alloc_smi_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x43f7e17b ipmi_get_version +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44df6d0d ipmi_unregister_smi +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x590cff8c ipmi_unregister_for_cmd +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6b6a1c06 ipmi_get_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a ipmi_addr_length +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9dd52742 ipmi_smi_add_proc_entry +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9e5999ac ipmi_set_my_address +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9ef8310c ipmi_smi_watcher_register +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa049b664 ipmi_poll_interface +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xaf061900 ipmi_smi_watcher_unregister +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb3616d7d ipmi_set_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xba52e28a ipmi_create_user +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbeb521e7 ipmi_get_my_LUN +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc8a9f57e ipmi_smi_watchdog_pretimeout +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdf3679e1 ipmi_set_maintenance_mode +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b ipmi_validate_addr +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xed19a08f ipmi_free_recv_msg +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf951699e ipmi_smi_msg_received +EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfd40c7d7 ipmi_set_gets_events +EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91 nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d __nvram_read_byte +EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0 __nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x7da28f12 nvram_check_checksum +EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f nvram_write_byte +EXPORT_SYMBOL drivers/char/nvram 0xa8813189 __nvram_write_byte +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239 vid_from_reg +EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c vid_which_vrm +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x8ad4a635 i2c_bit_add_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xb85a769e i2c_bit_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x41557c0d i2c_pca_add_numbered_bus +EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x85ddeec8 i2c_pca_add_bus +EXPORT_SYMBOL drivers/input/gameport/gameport 0x27b42c3d gameport_open +EXPORT_SYMBOL drivers/input/gameport/gameport 0x2fe09dc6 gameport_unregister_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x3bc91bc2 __gameport_register_driver +EXPORT_SYMBOL drivers/input/gameport/gameport 0x4457830e gameport_unregister_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x74431121 gameport_stop_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0x822f5fdc gameport_close +EXPORT_SYMBOL drivers/input/gameport/gameport 0x8fc9d5cc __gameport_register_port +EXPORT_SYMBOL drivers/input/gameport/gameport 0x94cc9ec1 gameport_start_polling +EXPORT_SYMBOL drivers/input/gameport/gameport 0xf54cd065 gameport_set_phys +EXPORT_SYMBOL drivers/input/input-polldev 0x417b05a6 input_allocate_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x57a01db1 input_register_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0x886f7900 input_free_polled_device +EXPORT_SYMBOL drivers/input/input-polldev 0xf72b38d8 input_unregister_polled_device +EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957 capifs_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce capifs_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf unregister_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a capi20_get_version +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f capilib_free_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586 capilib_new_ncci +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4 capi20_isinstalled +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x40c402b7 attach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x418c434e capi_ctr_down +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51 capi_info2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4a8a5766 capi20_put_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4 capi_cmsg2message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x56c359c7 capi_ctr_resume_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3 capi_message2cmsg +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43 capilib_data_b3_conf +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6d875f2d capi20_register +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6e6a809b capi_ctr_ready +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6fac976e detach_capi_ctr +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba capilib_data_b3_req +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c capi20_get_serial +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307 capi20_get_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913 capilib_release +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x91304614 capi20_set_callback +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278 register_capi_driver +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c capi_message2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27 capilib_release_appl +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaf8ad3d1 capi_ctr_handle_message +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d capi_cmd2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f capi_cmsg_header +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128 cdebbuf_free +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcec23982 capi_ctr_suspend_output +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac capi20_get_profile +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1 capi_cmsg2str +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606 capi20_manufacturer +EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfcd023e1 capi20_release +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8 b1_interrupt +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x39ea8af9 b1_free_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5323514d b1_send_message +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x55695a8f b1ctl_read_proc +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5c183eef b1_load_config +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x62dc9b02 b1_release_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x780b08f2 b1_reset_ctr +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x839a8cd5 b1_getrevision +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690 b1_irq_table +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8c3c58bf b1_loaded +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xc5d58603 b1_register_appl +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xcaaeb7bf b1_load_firmware +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376 b1_detect +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe2184772 b1_alloc_card +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe588d0e4 b1_load_t4file +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xef4f84fd b1_parse_version +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993 b1pcmcia_delcard +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e b1pcmcia_addcard_m1 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116 b1pcmcia_addcard_m2 +EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1 b1pcmcia_addcard_b1 +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x86767e12 isdn_ppp_unregister_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x9aa2ca8d isdn_ppp_register_compressor +EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xb2dedcf6 register_isdn +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0eb60a7f recv_Bchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1316bff7 mISDN_freedchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c mISDN_FsmFree +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2959b1cf mISDN_unregister_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x323e94f2 dchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3a39e444 l1_event +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3b6514fd confirm_Bsend +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd mISDN_FsmAddTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x42603f8e mISDN_register_device +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2 mISDN_FsmRestartTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x42f45038 mISDN_unregister_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c mISDN_FsmChangeState +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5d6350b6 get_next_bframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a mISDN_clock_update +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x658e1147 mISDN_freebchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6a7dfee3 mISDN_initbchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6d58a7be create_l1 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7cffb3d5 get_next_dframe +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8b237a59 recv_Echannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8bae3474 queue_ch_frame +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8fdf0a0c recv_Dchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9adf67a5 bchannel_senddata +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae mISDN_FsmDelTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb5c4261e recv_Dchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729 mISDN_register_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd18259ee mISDN_register_Bprotocol +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f mISDN_clock_get +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd3b6103e mISDN_initdchannel +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151 mISDN_FsmEvent +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd mISDN_FsmInitTimer +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb mISDN_unregister_clock +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf79519b4 recv_Bchannel_skb +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f mISDN_FsmNew +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0 mISDN_dsp_element_unregister +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7 dsp_audio_law_to_s32 +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2 dsp_audio_s16_to_law +EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8 mISDN_dsp_element_register +EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6 raid6_gfmul +EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3 raid6_gfexp +EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d raid6_gfinv +EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7 raid6_empty_zero_page +EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1 raid6_gfexi +EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x15b85659 mc44s803_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x120fda18 mt2060_attach +EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x97fdb624 mt2266_attach +EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x0ff7d9f9 mxl5005s_attach +EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xdedc5ccd qt1010_attach +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189 tuners +EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775 tuner_count +EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x5c74cbc4 xc2028_attach +EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xde1d7888 xc5000_attach +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2f2b1f42 flexcop_device_exit +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4b9ac719 flexcop_device_kfree +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x53d777fe flexcop_pass_dmx_packets +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5518ec29 flexcop_dump_reg +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x592a2f10 flexcop_sram_ctrl +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6335838a flexcop_sram_set_dest +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9ce7e048 flexcop_wan_set_speed +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa2dbb660 flexcop_device_initialize +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbee5dbd2 flexcop_device_kmalloc +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xca63b4bd flexcop_pid_feed_control +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcbb5796f flexcop_eeprom_check_mac_addr +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xdf1da4a9 flexcop_i2c_request +EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe64c3f72 flexcop_pass_dmx_data +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00cbdc37 dvb_ringbuffer_flush_spinlock_wakeup +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x052ada57 dvb_generic_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14 dvb_frontend_sleep_until +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee8494 dvb_ringbuffer_free +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c136db dvb_ringbuffer_empty +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e60b7a1 dvb_dmx_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x30d7f65a dvb_register_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x372deb3b dvb_ca_en50221_camready_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x478d71a5 dvb_dmxdev_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x47e331a2 dvb_register_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a5ad2b0 dvb_ringbuffer_read_user +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4c429232 dvb_ca_en50221_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5908fe37 dvb_dmx_swfilter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x64a6107d dvb_unregister_device +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6960fb95 dvb_ca_en50221_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6b00c62c dvb_ringbuffer_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698 dvb_filter_pes2ts_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7a9fb360 dvb_unregister_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d dvb_filter_get_ac3info +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x83d78407 dvb_generic_ioctl +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x84813a02 dvb_dmx_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x96990bf9 dvb_register_adapter +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa764a71f dvb_net_release +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0 intlog2 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xadb107f8 dvb_frontend_detach +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xba2c7e64 dvb_unregister_frontend +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1 timeval_usec_diff +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbe06030f dvb_dmxdev_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc41083f dvb_ringbuffer_write +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xde701ab2 dvb_generic_open +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe20c965c dvb_dmx_swfilter_204 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe46bf821 dvb_frontend_reinitialise +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe46f525d dvb_ca_en50221_frda_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe54b83ca dvb_ringbuffer_read +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707 intlog10 +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe8074fa5 dvb_ringbuffer_avail +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb793d0e dvb_ca_en50221_camchange_irq +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2031ad9 dvb_dmx_swfilter_packets +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf7943db0 dvb_net_init +EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0 dvb_filter_pes2ts +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x188373a8 dvb_usb_generic_write +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x19009d96 dvb_usb_nec_rc_key_to_event +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x20e14707 usb_cypress_load_firmware +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x62ad06d1 dvb_usb_get_hexline +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x965baa39 dvb_usb_generic_rw +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa7de7757 dvb_usb_device_exit +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xffeca64e dvb_usb_device_init +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2edc4728 af9005_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957 af9005_rc_keys_size +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xe0ee07a4 af9005_rc_decode +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x34f59b9e dibusb_pid_filter_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x690c6c9b dibusb2_0_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x807cd4ad dibusb_power_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x862cbd39 dibusb_read_eeprom_byte +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9bf898ec dibusb_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9df8c20a dibusb_rc_query +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb15b1e41 dibusb_dib3000mc_frontend_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb612934a dibusb2_0_streaming_ctrl +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xbaac5ae9 dibusb_dib3000mc_tuner_attach +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd4d3dddc dibusb_rc_keys +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe15df790 dibusb_i2c_algo +EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe5f646fa dibusb_pid_filter +EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x965dd921 af9013_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xbab71f24 au8522_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xc65d92a3 bcm3510_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xcfa47457 cx22702_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x0a86abda cx24113_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x5187fb0b cx24113_agc_callback +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x38a0a649 cx24116_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xbbef9e63 cx24123_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xd0d555dc cx24123_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x5e6013f5 dib0070_wbd_offset +EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf0a728c1 dib0070_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xa87c03af dib3000mb_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x2c744004 dib3000mc_pid_parse +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x301b9ab5 dib3000mc_get_tuner_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x356d6de3 dib3000mc_set_config +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x6105eae6 dib3000mc_pid_control +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x8e26e823 dib3000mc_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbf762d47 dib3000mc_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x968f8280 dib7000m_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xe934fc23 dib7000m_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x1d11b10f dib7000p_set_gpio +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2ff0d811 dib7000p_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x454a88b7 dib7000pc_detection +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x4889b82d dib7000p_i2c_enumeration +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x5e67b1fa dib7000p_get_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe5e5e19b dib7000p_set_wbd_ref +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1d508834 dibx000_get_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x300b489d dibx000_init_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x97a3de4b dibx000_exit_i2c_master +EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x59c8b51a dvb_pll_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x7b9ee71d isl6421_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x93c0bdb9 itd1000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x40660248 lgdt3305_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x1b95a785 lgdt330x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gl5 0xabf6fb30 lgs8gl5_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x52ab5bba lnbp21_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xf657885a lnbh24_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x26711460 mt312_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xd514c68d mt352_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x15bc1a5e nxt200x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x2dab7aa1 nxt6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x5fa05ea4 s5h1409_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x97b949b7 s5h1411_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x0984d72a s5h1420_get_tuner_i2c_adapter +EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xc668e404 s5h1420_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xc178d9fc si21xx_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xdef05dfc stb6000_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x149b4bf4 stv0288_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x377dab8a stv0297_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xa0f95fc5 stv0299_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xadd52821 tda10021_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x0137d9b7 tda10023_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xa37bf62e tda10048_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x454665cb tda10046_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x4ffd90ab tda10045_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x6b5c5965 tda10086_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xf8bb6bd3 tda826x_attach +EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xeb1de45a zl10353_attach +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x4dfa9ce2 cx231xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x8a396789 cx231xx_register_extension +EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3 cx2341x_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084 cx2341x_log_status +EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2 cx2341x_update +EXPORT_SYMBOL drivers/media/video/cx2341x 0x503d85dd cx2341x_ext_ctrls +EXPORT_SYMBOL drivers/media/video/cx2341x 0x504b7712 cx2341x_ctrl_query +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95 cx2341x_fill_defaults +EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4 cx2341x_mpeg_ctrls +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x6f542fa5 em28xx_register_extension +EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x96dcb052 em28xx_unregister_extension +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x07700be8 gspca_frame_add +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x32fef4c5 gspca_suspend +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x74b1655d gspca_dev_probe +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x8d911799 gspca_auto_gain_n_exposure +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c gspca_debug +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa835e0d5 gspca_resume +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xd4d7f5fe gspca_get_i_frame +EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xdc0fab18 gspca_disconnect +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_csi_enc 0x631cb49f csi_enc_deselect +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_csi_enc 0x7e14dc74 csi_enc_select +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_enc 0x0c77a97a prp_enc_deselect +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_enc 0xafd9dc5e prp_enc_select +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_vf_sdc 0x68ecdfbb prp_vf_sdc_deselect +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_vf_sdc 0x7e4b81ce prp_vf_sdc_select +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg 0x5eb1c988 prp_vf_sdc_select_bg +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg 0x600125b4 prp_vf_sdc_deselect_bg +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_still 0x761b20eb prp_still_deselect +EXPORT_SYMBOL drivers/media/video/mxc/capture/ipu_still 0xca55481b prp_still_select +EXPORT_SYMBOL drivers/media/video/mxc/capture/ov3640_camera 0x262439a2 set_mclk_rate +EXPORT_SYMBOL drivers/media/video/soc_camera 0x0458c57c soc_camera_host_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x04a5a921 soc_camera_video_stop +EXPORT_SYMBOL drivers/media/video/soc_camera 0x05b2c84e soc_camera_device_unregister +EXPORT_SYMBOL drivers/media/video/soc_camera 0x58bb91f4 soc_camera_device_register +EXPORT_SYMBOL drivers/media/video/soc_camera 0x6e2faf36 soc_camera_format_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xc3a7d324 soc_camera_xlate_by_fourcc +EXPORT_SYMBOL drivers/media/video/soc_camera 0xc443114d soc_camera_apply_sensor_flags +EXPORT_SYMBOL drivers/media/video/soc_camera 0xdebe1a17 soc_camera_video_start +EXPORT_SYMBOL drivers/media/video/soc_camera 0xf8de9ac7 soc_camera_host_unregister +EXPORT_SYMBOL drivers/media/video/tveeprom 0x60219223 tveeprom_hauppauge_analog +EXPORT_SYMBOL drivers/media/video/tveeprom 0x7ee4fa89 tveeprom_read +EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xb89dffa0 v4l_compat_translate_ioctl +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85 v4l2_ctrl_get_menu +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1c427ecb v4l2_ctrl_query_fill +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8 v4l2_prio_max +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468 v4l2_prio_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x3942d341 v4l2_chip_match_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001 v4l2_ctrl_next +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee v4l2_ctrl_get_name +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7 v4l2_chip_match_host +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69 v4l2_ctrl_query_menu_valid_items +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a v4l2_prio_open +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709 v4l2_prio_close +EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443 v4l2_prio_change +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858 v4l2_prio_init +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc369097d v4l2_ctrl_check +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xcaf13121 v4l2_chip_ident_i2c_client +EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd464e760 v4l2_ctrl_query_menu +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x201fed5c videobuf_dvb_get_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x998defbb videobuf_dvb_register_bus +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa2d3a22c videobuf_dvb_dealloc_frontends +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa6f3272a videobuf_dvb_find_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xd9659724 videobuf_dvb_alloc_frontend +EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xd9734f54 videobuf_dvb_unregister_bus +EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a v4l2_video_std_frame_period +EXPORT_SYMBOL drivers/media/video/videodev 0x0a8c9099 video_device_release +EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1 v4l2_type_names +EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595 v4l2_field_names +EXPORT_SYMBOL drivers/media/video/videodev 0x43e8e881 video_usercopy +EXPORT_SYMBOL drivers/media/video/videodev 0x54080890 video_ioctl2 +EXPORT_SYMBOL drivers/media/video/videodev 0x57625f41 video_device_alloc +EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b v4l_printk_ioctl +EXPORT_SYMBOL drivers/media/video/videodev 0x639f334a video_devdata +EXPORT_SYMBOL drivers/media/video/videodev 0x676759d3 video_device_release_empty +EXPORT_SYMBOL drivers/media/video/videodev 0x8a55bb5a video_unregister_device +EXPORT_SYMBOL drivers/media/video/videodev 0x91452721 video_register_device +EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059 v4l2_video_std_construct +EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b v4l2_norm_to_name +EXPORT_SYMBOL drivers/media/video/videodev 0xfd7b40a8 video_register_device_index +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2c2cff70 ab3100_event_unregister +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3fe8fca5 ab3100_get_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x4ae3b3c4 ab3100_event_registers_startup_state_get +EXPORT_SYMBOL drivers/mfd/ab3100-core 0x89990326 ab3100_get_register_page +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb497f00c ab3100_mask_and_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xcf37b4f0 ab3100_set_register +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf5a3bdea ab3100_get_chip_type +EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfddce5bb ab3100_event_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x251414fc pasic3_write_register +EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xf3194fdc pasic3_read_register +EXPORT_SYMBOL drivers/mfd/mfd-core 0x3fe856e1 mfd_add_devices +EXPORT_SYMBOL drivers/mfd/mfd-core 0xf200681e mfd_remove_devices +EXPORT_SYMBOL drivers/misc/c2port/core 0xabf102ae c2port_device_unregister +EXPORT_SYMBOL drivers/misc/c2port/core 0xbf02b5bb c2port_device_register +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x08adf3e3 fs_sdio_unregister_driver +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x0fc439f0 fs_sdio_disable +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x48f45786 fs_sdio_register_driver +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x56b9b555 fs_sdio_enable +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x579363c5 fs_sdio_writeb +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x73e27fb6 fs_sdio_block_rw +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x77cc0344 fs_sdio_readb +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x7fd002c2 fs_sdio_hard_reset +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0x8f539b5a fs_sdio_set_block_size +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0xa65fa09b fs_sdio_set_max_clock_speed +EXPORT_SYMBOL drivers/mmc/card/unifi_fs/unifi_fs 0xeaf19c83 fs_sdio_enable_interrupt +EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xb006864a lpddr_cmdset +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x191a5aef mtd_concat_create +EXPORT_SYMBOL drivers/mtd/mtdconcat 0x2ac6a14c mtd_concat_destroy +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x2b16a609 flexonenand_region +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x99d19300 onenand_addr +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xb8f6be2a onenand_default_bbt +EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xfef22cb1 onenand_scan_bbt +EXPORT_SYMBOL drivers/net/8390 0x20cba23c ei_close +EXPORT_SYMBOL drivers/net/8390 0x33335b3f ei_poll +EXPORT_SYMBOL drivers/net/8390 0x4daffbe6 ei_start_xmit +EXPORT_SYMBOL drivers/net/8390 0x592c6a3a ei_open +EXPORT_SYMBOL drivers/net/8390 0x710f12d7 ei_netdev_ops +EXPORT_SYMBOL drivers/net/8390 0x795096ea NS8390_init +EXPORT_SYMBOL drivers/net/8390 0xb0662d21 ei_tx_timeout +EXPORT_SYMBOL drivers/net/8390 0xc4ddda25 ei_set_multicast_list +EXPORT_SYMBOL drivers/net/8390 0xda3e84b2 __alloc_ei_netdev +EXPORT_SYMBOL drivers/net/8390 0xdd365790 ei_interrupt +EXPORT_SYMBOL drivers/net/8390 0xee0f417d ei_get_stats +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x0ed76deb hdlcdrv_register +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x10886f15 hdlcdrv_unregister +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb3109fa8 hdlcdrv_arbitrate +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xcd97f667 hdlcdrv_transmitter +EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xff201f35 hdlcdrv_receiver +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x056189b4 sirdev_write_complete +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x223365f2 sirdev_receive +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x30c92549 sirdev_raw_write +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x41ca986c sirdev_raw_read +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6cc657bb sirdev_get_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x804a5edd sirdev_put_instance +EXPORT_SYMBOL drivers/net/irda/sir-dev 0x8e0aea1d irda_unregister_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xaea9b969 sirdev_set_dtr_rts +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xdd0361d7 irda_register_dongle +EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf96ae9a8 sirdev_set_dongle +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x53b4762e free_mdio_bitbang +EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xe9ba930a alloc_mdio_bitbang +EXPORT_SYMBOL drivers/net/pppox 0x4b5fc6ec pppox_ioctl +EXPORT_SYMBOL drivers/net/pppox 0x4d8d16c4 register_pppox_proto +EXPORT_SYMBOL drivers/net/pppox 0xaf1282bd pppox_unbind_sock +EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18 unregister_pppox_proto +EXPORT_SYMBOL drivers/net/wan/hdlc 0x147db206 attach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3a884c30 unregister_hdlc_device +EXPORT_SYMBOL drivers/net/wan/hdlc 0x3f5d2087 unregister_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x7053d115 detach_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0x9d467308 alloc_hdlcdev +EXPORT_SYMBOL drivers/net/wan/hdlc 0xb398312d register_hdlc_protocol +EXPORT_SYMBOL drivers/net/wan/hdlc 0xc6f0baf9 hdlc_start_xmit +EXPORT_SYMBOL drivers/net/wan/hdlc 0xc70772fb hdlc_open +EXPORT_SYMBOL drivers/net/wan/hdlc 0xcd6d57eb hdlc_change_mtu +EXPORT_SYMBOL drivers/net/wan/hdlc 0xef2f426f hdlc_close +EXPORT_SYMBOL drivers/net/wan/hdlc 0xf1f42b89 hdlc_ioctl +EXPORT_SYMBOL drivers/net/wireless/airo 0x4d32a1d9 reset_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xa78ec6ba init_airo_card +EXPORT_SYMBOL drivers/net/wireless/airo 0xcc7c3144 stop_airo_card +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb ath_is_world_regd +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x973de58c ath_regd_init +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d ath_regd_get_band_ctl +EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xc93551dc ath_reg_notifier_apply +EXPORT_SYMBOL drivers/net/wireless/atmel 0x0e9c1bf5 init_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0x959a8141 stop_atmel_card +EXPORT_SYMBOL drivers/net/wireless/atmel 0xccc18be3 atmel_open +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0e901b65 hostap_check_sta_fw_version +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3bfc7b6f hostap_set_encryption +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3f18ff9a hostap_set_string +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x447c4e54 hostap_info_process +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4fbffb4d hostap_init_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x61ddcd32 hostap_set_antsel +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x671b2319 hostap_remove_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x69ed181f hostap_info_init +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x726ab61f hostap_80211_rx +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924 hostap_set_multicast_list_queue +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8252f057 hostap_handle_sta_tx_exc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f hostap_dump_tx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa6dcd575 hostap_remove_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa87b6be7 hostap_add_interface +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0 hostap_dump_rx_header +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b hostap_80211_get_hdrlen +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb545f670 hostap_set_hostapd_sta +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbd9642fe hostap_set_word +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbe997d4e hostap_set_auth_algs +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc0271c6b hostap_free_data +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd12c081a hostap_get_porttype +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd75466e5 prism2_update_comms_qual +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xde369a72 hostap_setup_dev +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe1a44681 hostap_set_hostapd +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xef4985d5 hostap_master_start_xmit +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf0025eb9 hostap_80211_ops +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf95f869f hostap_init_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfdaac625 hostap_init_ap_proc +EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xffd4ba4e hostap_set_roaming +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x0a80374a alloc_orinocodev +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b hermes_write_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18 orinoco_interrupt +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4 hermes_doicmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc09735e4 __orinoco_up +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e hermes_bap_pwrite +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd2d2f84d orinoco_reinit_firmware +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2 hermes_read_ltv +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5 hermes_bap_pread +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829 hermes_allocate +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d hermes_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d hermes_docmd_wait +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224 hermes_struct_init +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf252dc95 __orinoco_down +EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xfa6accab free_orinocodev +EXPORT_SYMBOL drivers/parport/parport 0x0f2ff651 parport_get_port +EXPORT_SYMBOL drivers/parport/parport 0x14468840 parport_ieee1284_epp_read_addr +EXPORT_SYMBOL drivers/parport/parport 0x1a6689d2 parport_wait_peripheral +EXPORT_SYMBOL drivers/parport/parport 0x1b0e72ea parport_ieee1284_ecp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x201ce3c2 parport_unregister_device +EXPORT_SYMBOL drivers/parport/parport 0x2a857757 parport_release +EXPORT_SYMBOL drivers/parport/parport 0x2bcdca55 parport_ieee1284_epp_write_addr +EXPORT_SYMBOL drivers/parport/parport 0x316141a8 parport_negotiate +EXPORT_SYMBOL drivers/parport/parport 0x3214dbbf parport_ieee1284_epp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x37653d1a parport_read +EXPORT_SYMBOL drivers/parport/parport 0x3796e31c parport_announce_port +EXPORT_SYMBOL drivers/parport/parport 0x47d07c9e parport_ieee1284_read_byte +EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b parport_ieee1284_interrupt +EXPORT_SYMBOL drivers/parport/parport 0x56c459c6 parport_register_port +EXPORT_SYMBOL drivers/parport/parport 0x5b429feb parport_ieee1284_write_compat +EXPORT_SYMBOL drivers/parport/parport 0x5d76d392 parport_claim_or_block +EXPORT_SYMBOL drivers/parport/parport 0x5dec4f40 parport_claim +EXPORT_SYMBOL drivers/parport/parport 0x6081f343 parport_ieee1284_ecp_read_data +EXPORT_SYMBOL drivers/parport/parport 0x651ec273 parport_set_timeout +EXPORT_SYMBOL drivers/parport/parport 0x8127947f parport_find_number +EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70 parport_irq_handler +EXPORT_SYMBOL drivers/parport/parport 0xadb157e3 parport_register_driver +EXPORT_SYMBOL drivers/parport/parport 0xb8761ecf parport_find_base +EXPORT_SYMBOL drivers/parport/parport 0xbd853451 parport_unregister_driver +EXPORT_SYMBOL drivers/parport/parport 0xca994384 parport_register_device +EXPORT_SYMBOL drivers/parport/parport 0xd9239709 parport_wait_event +EXPORT_SYMBOL drivers/parport/parport 0xdc41bdf7 parport_write +EXPORT_SYMBOL drivers/parport/parport 0xddbd9146 parport_ieee1284_ecp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xe63ca295 parport_remove_port +EXPORT_SYMBOL drivers/parport/parport 0xeae775e0 parport_put_port +EXPORT_SYMBOL drivers/parport/parport 0xed7e29f9 parport_ieee1284_epp_write_data +EXPORT_SYMBOL drivers/parport/parport 0xef9968c8 parport_ieee1284_read_nibble +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0234fe61 pcmcia_release_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0fe35334 pcmcia_disable_device +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x11fabd51 pcmcia_modify_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x123cba55 pcmcia_register_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1b541e5b pcmcia_access_configuration_register +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2c0f4dfa pcmcia_request_irq +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3ff545e8 pcmcia_loop_config +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0 pcmcia_error_func +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x565d9857 pcmcia_request_io +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x578c153f pcmcia_map_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8bb7a7e7 pcmcia_request_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x99ff079d pcmcia_get_mem_page +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa225a390 pcmcia_get_window +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb30cc338 pcmcia_unregister_driver +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbf3ccb5a pcmcia_dev_present +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd0891b6b pcmcia_request_configuration +EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12 pcmcia_error_ret +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0783d0f1 pcmcia_parse_events +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x19f6733f pcmcia_reset_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1a9be283 pcmcia_socket_dev_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1ea45b01 pcmcia_socket_list_rwsem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2 pcmcia_socket_list +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x27dadde3 pccard_register_pcmcia +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2d7071c8 pcmcia_find_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x31f6ea9e pcmcia_find_mem_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33ac8925 pcmcia_replace_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x36081b7f pcmcia_unregister_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x38c8d278 pcmcia_socket_dev_late_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x427f33d7 pcmcia_validate_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x429b585c pccard_get_first_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x52b1a8a1 pcmcia_insert_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x57e4e57c pcmcia_register_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x605090b6 pccard_static_ops +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x66e9d5f4 pcmcia_write_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x678f5e5b pcmcia_read_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x76c17463 destroy_cis_cache +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x80ea7620 pcmcia_socket_dev_early_resume +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8439a77e pccard_validate_cis +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x88cded50 pcmcia_get_socket_by_nr +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x894e1537 pcmcia_resume_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8b2eb221 pccard_get_next_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xae183222 pcmcia_suspend_card +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaeb51872 pccard_get_tuple_data +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb9721884 pccard_read_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbc114dfe pcmcia_get_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8 pcmcia_parse_tuple +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd dead_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd23e3c1a release_cis_mem +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd8d61b69 pcmcia_socket_dev_suspend +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf2a9079c pcmcia_socket_class +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf47ff7ce pcmcia_adjust_io_region +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf668ff83 pcmcia_put_socket +EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfe906786 pcmcia_eject_card +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x02738afa fcoe_ctlr_init +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x326dfb71 fcoe_ctlr_link_up +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3b07ad6f fcoe_ctlr_link_down +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x48f866c4 fcoe_ctlr_recv +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x751f1148 fcoe_ctlr_els_send +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd4549149 fcoe_ctlr_recv_flogi +EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf7b938c7 fcoe_ctlr_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02e8609b fc_exch_mgr_free +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02ea8472 fc_fabric_login +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x04a7561b fc_slave_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909 fc_seq_start_next +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x07b72b30 fc_fcp_ddp_setup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0a37933a fc_exch_mgr_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x195c80ed fc_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2195e8a2 fc_fcp_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x21a21f9d fc_exch_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x22ff5bad fc_set_mfs +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x26b27e4e fc_linkdown +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2fa0c962 fc_queuecommand +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32511ffe fc_exch_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x385a90f4 fc_change_queue_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x41ef4016 fc_get_host_port_state +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x498168f1 fc_seq_els_rsp_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x50a85811 fc_rport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x510dae62 fc_change_queue_depth +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917 fc_destroy_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x668718da fc_eh_host_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428 fc_exch_done +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6dfea85e fc_exch_get +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e082347 fc_fabric_logoff +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75b3c2b8 fc_lport_config +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x83e789b9 fc_linkup +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x860f642d fc_exch_recv +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x872c82cf fc_lport_destroy +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8965318e fc_disc_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b552ed1 fc_rport_terminate_io +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8d3f0ffa fc_get_host_port_type +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8ed851ff fc_lport_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa0b76738 __fc_frame_alloc +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa7025e7e fc_set_rport_loss_tmo +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xad5663a7 fc_eh_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb5f1936a fc_get_host_stats +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb8636f05 fc_fcp_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc74801e3 fc_frame_crc_check +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcc61984c fc_exch_mgr_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd02f41f6 fc_lport_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd1470ccb fc_exch_seq_send +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359 fc_setup_rport +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xda006849 fc_elsct_init +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe78e4fef fc_eh_device_reset +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf4346bb5 fc_fcp_complete +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60 fc_seq_exch_abort +EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfa340e62 fc_get_host_speed +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0875b918 osd_req_list_partition_collections +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0bbe5b2d osd_req_remove_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1 osd_sec_init_nosec_doall_caps +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x177f27ad osd_req_write_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2094ed77 osd_execute_request_async +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x22c807d8 osd_req_create_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3811b86d osd_req_read +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3faeaf3d osd_req_add_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x486fdffa osd_req_add_get_attr_page +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x49c5c108 osd_finalize_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4a2c6349 osd_req_decode_sense_full +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4d2ed367 osd_req_flush_collection +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5c50ccdb osd_req_get_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x66677db0 osd_req_flush_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x66b4ed08 osd_req_add_set_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x69695571 osd_dev_init +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6e95b08a osd_req_format +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x739aac73 osd_req_flush_obsd +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x76aec5c0 osd_req_read_kern +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7b377009 osd_req_remove_partition +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7cd4561a osd_end_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7fa924ff osd_auto_detect_ver +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x821fa584 osd_req_list_collection_objects +EXPORT_SYMBOL drivers/scsi/osd/libosd 0x97dddd03 osd_dev_fini +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa981eb21 osd_req_create_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xba311066 osd_req_decode_get_attr_list +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd566ecac osd_req_write +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe55b64c6 osd_req_flush_object +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5b8e88a osd_req_set_attributes +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe7f5a9ea osd_execute_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeef22da2 osd_req_list_dev_partitions +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfbac92bb osd_start_request +EXPORT_SYMBOL drivers/scsi/osd/libosd 0xff34c9a6 osd_req_list_partition_objects +EXPORT_SYMBOL drivers/scsi/osd/osd 0x1856c930 osduld_put_device +EXPORT_SYMBOL drivers/scsi/osd/osd 0x209ec094 osduld_path_lookup +EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609 osduld_unregister_test +EXPORT_SYMBOL drivers/scsi/osd/osd 0xee2e0b42 osduld_register_test +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x174cd5e4 qlogicfas408_queuecommand +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71 qlogicfas408_detect +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x4cc6c97e qlogicfas408_biosparam +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xa1bc8f34 qlogicfas408_abort +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb943b86a qlogicfas408_disable_ints +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc5bb20f0 qlogicfas408_info +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12 qlogicfas408_ihandl +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe41026a5 qlogicfas408_bus_reset +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20 qlogicfas408_get_chip_type +EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199 qlogicfas408_setup +EXPORT_SYMBOL drivers/scsi/raid_class 0x1954e5b8 raid_class_release +EXPORT_SYMBOL drivers/scsi/raid_class 0x61069d7b raid_component_add +EXPORT_SYMBOL drivers/scsi/raid_class 0x98dd9fc2 raid_class_attach +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x09c8cd58 fc_remote_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0adb28c1 fc_remote_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x127d5ebe scsi_is_fc_vport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x13b343f5 fc_remote_port_rolechg +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x23716892 fc_host_post_vendor_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2f7206ff fc_host_post_event +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x519b6a32 fc_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5c159cd4 scsi_is_fc_rport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6099116d fc_vport_terminate +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea fc_get_event_number +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x97ea04a0 fc_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9c7c6795 fc_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa8368443 fc_vport_create +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x042be9ce sas_rphy_remove +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x06563049 sas_port_add_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x099504f8 sas_rphy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0c7c247b sas_read_port_mode_page +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0e5f12e4 sas_expander_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5930275f sas_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5de13bf1 sas_remove_children +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5f62b756 sas_phy_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6502e4a0 sas_port_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6dd3a186 sas_port_alloc_num +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6fa93b28 scsi_is_sas_rphy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa6b29f97 sas_end_device_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa8bb31e6 sas_attach_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb733a070 sas_phy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbe52cd60 sas_port_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc8e25244 sas_rphy_free +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc976f0ca sas_port_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcc4406c5 scsi_is_sas_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcecbd885 sas_rphy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd0c86b81 sas_port_alloc +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd3e599f1 sas_remove_host +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd71e6566 scsi_is_sas_port +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe58b653d sas_phy_add +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf2c57eaf sas_port_delete_phy +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfcaef443 sas_port_mark_backlink +EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfeb3a450 sas_phy_delete +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09 spi_print_msg +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x714ba057 spi_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xb22d9961 spi_release_transport +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xd22eb427 spi_display_xfer_agreement +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xf3b008e5 spi_schedule_dv_device +EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xf3f4ee41 spi_attach_transport +EXPORT_SYMBOL drivers/serial/8250 0x69f4c454 serial8250_register_port +EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a serial8250_resume_port +EXPORT_SYMBOL drivers/serial/8250 0xcc248d26 serial8250_suspend_port +EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a serial8250_unregister_port +EXPORT_SYMBOL drivers/ssb/ssb 0x0aae8308 ssb_device_disable +EXPORT_SYMBOL drivers/ssb/ssb 0x16d80ccc ssb_dma_translation +EXPORT_SYMBOL drivers/ssb/ssb 0x1e466498 __ssb_driver_register +EXPORT_SYMBOL drivers/ssb/ssb 0x209c7b96 ssb_bus_resume +EXPORT_SYMBOL drivers/ssb/ssb 0x29749c08 ssb_dma_free_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x496b6f23 ssb_clockspeed +EXPORT_SYMBOL drivers/ssb/ssb 0x6c65cd43 ssb_bus_suspend +EXPORT_SYMBOL drivers/ssb/ssb 0x6fb2e3bb ssb_bus_may_powerdown +EXPORT_SYMBOL drivers/ssb/ssb 0x72e96ec6 ssb_dma_alloc_consistent +EXPORT_SYMBOL drivers/ssb/ssb 0x7d2f9481 ssb_device_is_enabled +EXPORT_SYMBOL drivers/ssb/ssb 0x87610c5a ssb_driver_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xa6fd874d ssb_dma_set_mask +EXPORT_SYMBOL drivers/ssb/ssb 0xae8706b9 ssb_bus_unregister +EXPORT_SYMBOL drivers/ssb/ssb 0xb6507efe ssb_bus_powerup +EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f ssb_admatch_base +EXPORT_SYMBOL drivers/ssb/ssb 0xcc911231 ssb_set_devtypedata +EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b ssb_admatch_size +EXPORT_SYMBOL drivers/ssb/ssb 0xed6bf416 ssb_device_enable +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x459bbb68 pod_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0x5d95bc7b variax_create_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xa27ac839 variax_remove_files +EXPORT_SYMBOL drivers/staging/line6/line6usb 0xabd96229 pod_create_files +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x1d074012 thermal_cooling_device_register +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x633255d4 thermal_cooling_device_unregister +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x7792b113 thermal_zone_unbind_cooling_device +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x7c858f42 thermal_zone_device_register +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x8d66e462 thermal_zone_device_update +EXPORT_SYMBOL drivers/thermal/thermal_sys 0x8f347e42 thermal_zone_device_unregister +EXPORT_SYMBOL drivers/thermal/thermal_sys 0xab4f8436 thermal_zone_bind_cooling_device +EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x05bbb180 sl811h_driver +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea usb_nop_xceiv_unregister +EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207 usb_nop_xceiv_register +EXPORT_SYMBOL drivers/usb/serial/usbserial 0x20f6c5f4 usb_serial_suspend +EXPORT_SYMBOL drivers/usb/serial/usbserial 0xa7b933e3 usb_serial_resume +EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c corgibl_limit_intensity +EXPORT_SYMBOL drivers/video/backlight/lcd 0x2c01aeb9 lcd_device_unregister +EXPORT_SYMBOL drivers/video/backlight/lcd 0xe99c3abe lcd_device_register +EXPORT_SYMBOL drivers/video/display/display 0x429cffc4 display_device_unregister +EXPORT_SYMBOL drivers/video/display/display 0xc2fc1e20 display_device_register +EXPORT_SYMBOL drivers/video/output 0x264297a4 video_output_register +EXPORT_SYMBOL drivers/video/output 0x7b5b7723 video_output_unregister +EXPORT_SYMBOL drivers/video/syscopyarea 0x74faa976 sys_copyarea +EXPORT_SYMBOL drivers/video/sysfillrect 0x0a38925f sys_fillrect +EXPORT_SYMBOL drivers/video/sysimgblt 0x577b59a0 sys_imageblit +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x357ea76a w1_bq27000_write +EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x9c662d59 w1_bq27000_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x04e8c175 w1_ds2760_store_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x79b48b11 w1_ds2760_read +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x818c0526 w1_ds2760_recall_eeprom +EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xbf2d98e1 w1_ds2760_write +EXPORT_SYMBOL drivers/w1/wire 0x167d6b9a w1_add_master_device +EXPORT_SYMBOL drivers/w1/wire 0x6ae52ce0 w1_remove_master_device +EXPORT_SYMBOL drivers/w1/wire 0x83f0fd28 w1_unregister_family +EXPORT_SYMBOL drivers/w1/wire 0xef9f285a w1_register_family +EXPORT_SYMBOL fs/configfs/configfs 0x04421f32 config_item_set_name +EXPORT_SYMBOL fs/configfs/configfs 0x07734e5d config_group_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0x366fdcf2 configfs_unregister_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x582df975 config_group_init +EXPORT_SYMBOL fs/configfs/configfs 0x5c862fcb config_group_find_item +EXPORT_SYMBOL fs/configfs/configfs 0x79118c6f configfs_register_subsystem +EXPORT_SYMBOL fs/configfs/configfs 0x7c499e13 configfs_undepend_item +EXPORT_SYMBOL fs/configfs/configfs 0xadd3ccb7 config_item_get +EXPORT_SYMBOL fs/configfs/configfs 0xb36dacc3 config_item_init +EXPORT_SYMBOL fs/configfs/configfs 0xb47c2cfd config_item_init_type_name +EXPORT_SYMBOL fs/configfs/configfs 0xcaeb40e4 config_item_put +EXPORT_SYMBOL fs/configfs/configfs 0xfa494949 configfs_depend_item +EXPORT_SYMBOL fs/fscache/fscache 0x07a8c4ea fscache_fsdef_index +EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576 fscache_wait_bit_interruptible +EXPORT_SYMBOL fs/fscache/fscache 0x1e748a40 __fscache_register_netfs +EXPORT_SYMBOL fs/fscache/fscache 0x246c3b75 fscache_add_cache +EXPORT_SYMBOL fs/fscache/fscache 0x2cbfd1f8 __fscache_read_or_alloc_page +EXPORT_SYMBOL fs/fscache/fscache 0x3786cd71 __fscache_relinquish_cookie +EXPORT_SYMBOL fs/fscache/fscache 0x3d7eef7a fscache_init_cache +EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318 fscache_wait_bit +EXPORT_SYMBOL fs/fscache/fscache 0x4463e7b3 __fscache_check_page_write +EXPORT_SYMBOL fs/fscache/fscache 0x496932b9 fscache_op_debug_id +EXPORT_SYMBOL fs/fscache/fscache 0x4a298d77 fscache_put_operation +EXPORT_SYMBOL fs/fscache/fscache 0x57d9447b __fscache_uncache_page +EXPORT_SYMBOL fs/fscache/fscache 0x6ab00a04 fscache_withdraw_cache +EXPORT_SYMBOL fs/fscache/fscache 0x7b3e6c31 __fscache_read_or_alloc_pages +EXPORT_SYMBOL fs/fscache/fscache 0x7c7b0e39 fscache_enqueue_operation +EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f fscache_object_states +EXPORT_SYMBOL fs/fscache/fscache 0x8aed47a5 __fscache_attr_changed +EXPORT_SYMBOL fs/fscache/fscache 0xa012abfd fscache_check_aux +EXPORT_SYMBOL fs/fscache/fscache 0xa14ebc22 fscache_object_lookup_negative +EXPORT_SYMBOL fs/fscache/fscache 0xa646b914 __fscache_wait_on_page_write +EXPORT_SYMBOL fs/fscache/fscache 0xa7118559 __fscache_write_page +EXPORT_SYMBOL fs/fscache/fscache 0xadba1b48 __fscache_acquire_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xb8fd215f fscache_io_error +EXPORT_SYMBOL fs/fscache/fscache 0xb9589094 fscache_object_slow_work_ops +EXPORT_SYMBOL fs/fscache/fscache 0xc7b6634d __fscache_update_cookie +EXPORT_SYMBOL fs/fscache/fscache 0xc7f3e70b fscache_mark_pages_cached +EXPORT_SYMBOL fs/fscache/fscache 0xcda14067 fscache_obtained_object +EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8 fscache_cache_cleared_wq +EXPORT_SYMBOL fs/fscache/fscache 0xfa5c0960 __fscache_unregister_netfs +EXPORT_SYMBOL fs/fscache/fscache 0xfe87fd1a __fscache_alloc_page +EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c nfs4_acl_nfsv4_to_posix +EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a nfs4_acl_new +EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b nfs4_acl_posix_to_nfsv4 +EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e nfs4_acl_write_who +EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4 nfs4_acl_get_whotype +EXPORT_SYMBOL fs/quota/quota_tree 0x339f4885 qtree_entry_unused +EXPORT_SYMBOL fs/quota/quota_tree 0x983cc0dc qtree_delete_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xc688aa0b qtree_write_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xd6a93769 qtree_release_dquot +EXPORT_SYMBOL fs/quota/quota_tree 0xe93fa82f qtree_read_dquot +EXPORT_SYMBOL lib/crc-ccitt 0x3771b461 crc_ccitt +EXPORT_SYMBOL lib/crc-ccitt 0x75811312 crc_ccitt_table +EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f crc_itu_t_table +EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948 crc_itu_t +EXPORT_SYMBOL lib/crc7 0xa7587646 crc7 +EXPORT_SYMBOL lib/crc7 0xd80c3603 crc7_syndrome_table +EXPORT_SYMBOL lib/libcrc32c 0x27000b29 crc32c +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd zlib_deflateInit2 +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724 zlib_deflateReset +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d zlib_deflate +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b zlib_deflate_workspacesize +EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793 zlib_deflateEnd +EXPORT_SYMBOL net/802/p8022 0x49c010d7 unregister_8022_client +EXPORT_SYMBOL net/802/p8022 0x9a4e0462 register_8022_client +EXPORT_SYMBOL net/802/p8023 0x1c983966 make_8023_client +EXPORT_SYMBOL net/802/p8023 0x580f54a4 destroy_8023_client +EXPORT_SYMBOL net/802/psnap 0x0a1b8a91 register_snap_client +EXPORT_SYMBOL net/802/psnap 0x9328bc7e unregister_snap_client +EXPORT_SYMBOL net/9p/9pnet 0x071557fd p9_client_walk +EXPORT_SYMBOL net/9p/9pnet 0x0b11ff5a p9_idpool_put +EXPORT_SYMBOL net/9p/9pnet 0x17e25b44 p9_tag_lookup +EXPORT_SYMBOL net/9p/9pnet 0x1825aaa8 v9fs_get_default_trans +EXPORT_SYMBOL net/9p/9pnet 0x28c19dc9 v9fs_unregister_trans +EXPORT_SYMBOL net/9p/9pnet 0x2d80ce5a p9_client_stat +EXPORT_SYMBOL net/9p/9pnet 0x31c0fc14 p9_client_attach +EXPORT_SYMBOL net/9p/9pnet 0x350ad2b2 p9_client_read +EXPORT_SYMBOL net/9p/9pnet 0x3d73a797 p9_errstr2errno +EXPORT_SYMBOL net/9p/9pnet 0x50a79409 p9_client_clunk +EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f p9_parse_header +EXPORT_SYMBOL net/9p/9pnet 0x70bc63b3 p9_client_cb +EXPORT_SYMBOL net/9p/9pnet 0x7310a66f p9_idpool_create +EXPORT_SYMBOL net/9p/9pnet 0x732102c5 v9fs_get_trans_by_name +EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1 p9stat_read +EXPORT_SYMBOL net/9p/9pnet 0x77ad05a8 p9_client_open +EXPORT_SYMBOL net/9p/9pnet 0x8f34fe15 p9_idpool_check +EXPORT_SYMBOL net/9p/9pnet 0x97a9d5c7 p9_client_wstat +EXPORT_SYMBOL net/9p/9pnet 0x99a7f30f p9_idpool_destroy +EXPORT_SYMBOL net/9p/9pnet 0x99aa7841 p9_idpool_get +EXPORT_SYMBOL net/9p/9pnet 0x9c964743 p9stat_free +EXPORT_SYMBOL net/9p/9pnet 0xa227a5d7 p9_client_create +EXPORT_SYMBOL net/9p/9pnet 0xa4082751 p9_client_write +EXPORT_SYMBOL net/9p/9pnet 0xb0ff6308 p9_client_fcreate +EXPORT_SYMBOL net/9p/9pnet 0xc0262e7d p9_client_version +EXPORT_SYMBOL net/9p/9pnet 0xc4d14034 p9_client_disconnect +EXPORT_SYMBOL net/9p/9pnet 0xcaa407ee p9_client_auth +EXPORT_SYMBOL net/9p/9pnet 0xd1e07a31 p9_client_remove +EXPORT_SYMBOL net/9p/9pnet 0xd27a5835 p9_client_destroy +EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d p9pdu_dump +EXPORT_SYMBOL net/9p/9pnet 0xe58a3360 p9_error_init +EXPORT_SYMBOL net/9p/9pnet 0xfe1bf427 v9fs_register_trans +EXPORT_SYMBOL net/appletalk/appletalk 0x2ca7987a atalk_find_dev_addr +EXPORT_SYMBOL net/appletalk/appletalk 0x74bef93e alloc_ltalkdev +EXPORT_SYMBOL net/appletalk/appletalk 0x7cdbb98e aarp_send_ddp +EXPORT_SYMBOL net/appletalk/appletalk 0xcc73c423 atrtr_get_dev +EXPORT_SYMBOL net/ax25/ax25 0x10c38365 ax25_linkfail_release +EXPORT_SYMBOL net/ax25/ax25 0x223c7844 ax25_send_frame +EXPORT_SYMBOL net/ax25/ax25 0x242852b9 ax25_uid_policy +EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec ax25_display_timer +EXPORT_SYMBOL net/ax25/ax25 0x4502c65a asc2ax +EXPORT_SYMBOL net/ax25/ax25 0x517c15fc ax25_hard_header +EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff ax2asc +EXPORT_SYMBOL net/ax25/ax25 0x564d9f14 ax25_findbyuid +EXPORT_SYMBOL net/ax25/ax25 0x599606bf ax25_find_cb +EXPORT_SYMBOL net/ax25/ax25 0x7e98e235 ax25_rebuild_header +EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26 ax25_protocol_release +EXPORT_SYMBOL net/ax25/ax25 0xb87d70e8 ax25_linkfail_register +EXPORT_SYMBOL net/ax25/ax25 0xc1444946 ax25cmp +EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1 null_ax25_address +EXPORT_SYMBOL net/ax25/ax25 0xdd43b973 ax25_listen_release +EXPORT_SYMBOL net/ax25/ax25 0xe50993bc ax25_listen_register +EXPORT_SYMBOL net/ax25/ax25 0xe9ea1c3d ax25_header_ops +EXPORT_SYMBOL net/bridge/bridge 0xba551d88 br_should_route_hook +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x1ab9b2b2 ebt_unregister_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x696be1c6 ebt_register_table +EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xca945a50 ebt_do_table +EXPORT_SYMBOL net/can/can 0x0bc94246 can_proto_unregister +EXPORT_SYMBOL net/can/can 0x25440cc3 can_rx_register +EXPORT_SYMBOL net/can/can 0x2aff5d4b can_send +EXPORT_SYMBOL net/can/can 0x53760cae can_rx_unregister +EXPORT_SYMBOL net/can/can 0x75b5c177 can_proto_register +EXPORT_SYMBOL net/ieee802154/nl802154 0x3f760a82 ieee802154_nl_beacon_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0x76c82e03 ieee802154_nl_assoc_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xb1ca0cf1 ieee802154_nl_scan_confirm +EXPORT_SYMBOL net/ieee802154/nl802154 0xc4c952a0 ieee802154_nl_assoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xcf880dd2 ieee802154_nl_disassoc_indic +EXPORT_SYMBOL net/ieee802154/nl802154 0xd44cef12 ieee802154_nl_disassoc_confirm +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb2e2ea38 arpt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xe15c8ec2 arpt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xfa0d56e6 arpt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x3ea5aac7 ipt_unregister_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x87be5c01 ipt_register_table +EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc977b6eb ipt_do_table +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x0feb6e54 nf_nat_mangle_udp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x34009b60 nf_nat_follow_master +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x4ad43550 nf_nat_setup_info +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x83bae360 nf_nat_mangle_tcp_packet +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa0c9508e nf_nat_protocol_register +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd2eb34df nf_nat_protocol_unregister +EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xfb640363 nf_nat_used_tuple +EXPORT_SYMBOL net/ipv4/tunnel4 0x1e79914f xfrm4_tunnel_register +EXPORT_SYMBOL net/ipv4/tunnel4 0x2ba92b47 xfrm4_tunnel_deregister +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x00c51a6c ip6t_unregister_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x24312ce1 ip6t_do_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x865c2aeb ip6t_register_table +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb25c2682 ipv6_find_hdr +EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33 ip6t_ext_hdr +EXPORT_SYMBOL net/ipv6/tunnel6 0xc8f52231 xfrm6_tunnel_register +EXPORT_SYMBOL net/ipv6/tunnel6 0xed19e725 xfrm6_tunnel_deregister +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2 xfrm6_tunnel_alloc_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193 xfrm6_tunnel_free_spi +EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1 xfrm6_tunnel_spi_lookup +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x68cda981 ircomm_disconnect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6f71c74f ircomm_close +EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8b8b904c ircomm_data_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa951c54e ircomm_open +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc33cc283 ircomm_control_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc3ef4f51 ircomm_connect_request +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc5c721ef ircomm_connect_response +EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe3d54ffb ircomm_flow_request +EXPORT_SYMBOL net/irda/irda 0x0377053a irlmp_connect_response +EXPORT_SYMBOL net/irda/irda 0x05d7cfe5 irias_add_octseq_attrib +EXPORT_SYMBOL net/irda/irda 0x066f2903 async_wrap_skb +EXPORT_SYMBOL net/irda/irda 0x06a3ee58 irias_new_integer_value +EXPORT_SYMBOL net/irda/irda 0x076ccb4b irttp_open_tsap +EXPORT_SYMBOL net/irda/irda 0x07d3647c irlmp_register_service +EXPORT_SYMBOL net/irda/irda 0x0e49e216 irttp_data_request +EXPORT_SYMBOL net/irda/irda 0x0fcf747a irlmp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x19d79c82 hashbin_lock_find +EXPORT_SYMBOL net/irda/irda 0x1b6aa033 irlmp_open_lsap +EXPORT_SYMBOL net/irda/irda 0x1c51e992 hashbin_delete +EXPORT_SYMBOL net/irda/irda 0x2036ad06 irda_param_insert +EXPORT_SYMBOL net/irda/irda 0x22b0f52d hashbin_insert +EXPORT_SYMBOL net/irda/irda 0x2f489e7f irda_notify_init +EXPORT_SYMBOL net/irda/irda 0x30827e1c irias_insert_object +EXPORT_SYMBOL net/irda/irda 0x38a20e5b irda_debug +EXPORT_SYMBOL net/irda/irda 0x3918c64a irttp_flow_request +EXPORT_SYMBOL net/irda/irda 0x3b2e9df9 hashbin_remove +EXPORT_SYMBOL net/irda/irda 0x42c7c5ce irias_find_object +EXPORT_SYMBOL net/irda/irda 0x448b8aaa irda_qos_bits_to_value +EXPORT_SYMBOL net/irda/irda 0x46c1c4a2 irlmp_unregister_service +EXPORT_SYMBOL net/irda/irda 0x519118cc irias_add_integer_attrib +EXPORT_SYMBOL net/irda/irda 0x51f1fca7 irttp_udata_request +EXPORT_SYMBOL net/irda/irda 0x5299af05 irttp_connect_request +EXPORT_SYMBOL net/irda/irda 0x538fe1e0 hashbin_get_first +EXPORT_SYMBOL net/irda/irda 0x5504cf7c hashbin_new +EXPORT_SYMBOL net/irda/irda 0x57fb1ed2 hashbin_remove_this +EXPORT_SYMBOL net/irda/irda 0x5996de18 irttp_connect_response +EXPORT_SYMBOL net/irda/irda 0x5aad87aa irias_delete_object +EXPORT_SYMBOL net/irda/irda 0x5d609063 irias_new_object +EXPORT_SYMBOL net/irda/irda 0x6621aa8a hashbin_find +EXPORT_SYMBOL net/irda/irda 0x6b043eba irda_init_max_qos_capabilies +EXPORT_SYMBOL net/irda/irda 0x6d142f0c irttp_disconnect_request +EXPORT_SYMBOL net/irda/irda 0x701e028e irias_add_string_attrib +EXPORT_SYMBOL net/irda/irda 0x7042bc54 irlmp_register_client +EXPORT_SYMBOL net/irda/irda 0x763e54a4 irlmp_unregister_client +EXPORT_SYMBOL net/irda/irda 0x7957f728 irlmp_update_client +EXPORT_SYMBOL net/irda/irda 0x8740ae17 iriap_open +EXPORT_SYMBOL net/irda/irda 0x911bb323 iriap_getvaluebyclass_request +EXPORT_SYMBOL net/irda/irda 0x91815586 irda_param_pack +EXPORT_SYMBOL net/irda/irda 0x975743b5 iriap_close +EXPORT_SYMBOL net/irda/irda 0x993ad14b irda_param_extract_all +EXPORT_SYMBOL net/irda/irda 0x9fd4d493 proc_irda +EXPORT_SYMBOL net/irda/irda 0xb401c06d irlmp_close_lsap +EXPORT_SYMBOL net/irda/irda 0xb5229f8c irlap_open +EXPORT_SYMBOL net/irda/irda 0xb6bc7ed7 irlmp_data_request +EXPORT_SYMBOL net/irda/irda 0xb9394173 irias_delete_value +EXPORT_SYMBOL net/irda/irda 0xbcd3ef13 irias_object_change_attribute +EXPORT_SYMBOL net/irda/irda 0xbe40ace9 irlmp_discovery_request +EXPORT_SYMBOL net/irda/irda 0xc98e3523 irttp_close_tsap +EXPORT_SYMBOL net/irda/irda 0xcfe617ab irlmp_connect_request +EXPORT_SYMBOL net/irda/irda 0xd1461b83 irttp_dup +EXPORT_SYMBOL net/irda/irda 0xd49f6837 irlap_close +EXPORT_SYMBOL net/irda/irda 0xde4c6b3c irlmp_service_to_hint +EXPORT_SYMBOL net/irda/irda 0xe2f84c82 hashbin_get_next +EXPORT_SYMBOL net/irda/irda 0xe5f81b7f irda_device_set_media_busy +EXPORT_SYMBOL net/irda/irda 0xe751732d async_unwrap_char +EXPORT_SYMBOL net/irda/irda 0xedd521c2 irlmp_get_discoveries +EXPORT_SYMBOL net/irda/irda 0xf3ed8173 alloc_irdadev +EXPORT_SYMBOL net/lapb/lapb 0x044290e3 lapb_register +EXPORT_SYMBOL net/lapb/lapb 0x0c9e426e lapb_getparms +EXPORT_SYMBOL net/lapb/lapb 0x45c2e437 lapb_disconnect_request +EXPORT_SYMBOL net/lapb/lapb 0x4e9f4945 lapb_data_received +EXPORT_SYMBOL net/lapb/lapb 0x98b8e5f5 lapb_connect_request +EXPORT_SYMBOL net/lapb/lapb 0xa14f4bb0 lapb_data_request +EXPORT_SYMBOL net/lapb/lapb 0xa968b7f6 lapb_unregister +EXPORT_SYMBOL net/lapb/lapb 0xcc1ff477 lapb_setparms +EXPORT_SYMBOL net/llc/llc 0x38b92846 llc_remove_pack +EXPORT_SYMBOL net/llc/llc 0x40a96938 llc_add_pack +EXPORT_SYMBOL net/llc/llc 0x52d7b2fd llc_sap_list +EXPORT_SYMBOL net/llc/llc 0x556643e3 llc_sap_list_lock +EXPORT_SYMBOL net/llc/llc 0x8337fcba llc_sap_find +EXPORT_SYMBOL net/llc/llc 0x976099fd llc_mac_hdr_init +EXPORT_SYMBOL net/llc/llc 0x9e721e8f llc_sap_open +EXPORT_SYMBOL net/llc/llc 0xa2007fe4 llc_build_and_send_ui_pkt +EXPORT_SYMBOL net/llc/llc 0xb714a74f llc_set_station_handler +EXPORT_SYMBOL net/llc/llc 0xf1ffb1f8 llc_sap_close +EXPORT_SYMBOL net/mac80211/mac80211 0x0042b1df ieee80211_generic_frame_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x14a0a084 ieee80211_alloc_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x1a483827 ieee80211_start_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0x20bad1e2 ieee80211_rts_duration +EXPORT_SYMBOL net/mac80211/mac80211 0x354884f6 ieee80211_rate_control_register +EXPORT_SYMBOL net/mac80211/mac80211 0x3cc64cc1 ieee80211_stop_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0x409f131f wiphy_to_ieee80211_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x4663c9c1 ieee80211_wake_queues +EXPORT_SYMBOL net/mac80211/mac80211 0x489c20c4 ieee80211_wake_queue +EXPORT_SYMBOL net/mac80211/mac80211 0x63c40970 ieee80211_start_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0x69850de3 ieee80211_rts_get +EXPORT_SYMBOL net/mac80211/mac80211 0x6f75725a __ieee80211_get_assoc_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x70ab339b __ieee80211_rx +EXPORT_SYMBOL net/mac80211/mac80211 0x7c9e3f80 ieee80211_ctstoself_get +EXPORT_SYMBOL net/mac80211/mac80211 0x80210fa0 ieee80211_unregister_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x84585807 ieee80211_rate_control_unregister +EXPORT_SYMBOL net/mac80211/mac80211 0x85a30361 ieee80211_get_buffered_bc +EXPORT_SYMBOL net/mac80211/mac80211 0x8c93ad36 __ieee80211_get_radio_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0x90438bca ieee80211_free_hw +EXPORT_SYMBOL net/mac80211/mac80211 0x9a97ab41 ieee80211_tx_status +EXPORT_SYMBOL net/mac80211/mac80211 0xac7aa4a7 __ieee80211_get_rx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xac923437 ieee80211_find_sta +EXPORT_SYMBOL net/mac80211/mac80211 0xaeda8641 ieee80211_stop_tx_ba_session +EXPORT_SYMBOL net/mac80211/mac80211 0xb4dff10f ieee80211_tx_status_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xb7bec582 __ieee80211_get_tx_led_name +EXPORT_SYMBOL net/mac80211/mac80211 0xc3c1db31 ieee80211_start_tx_ba_cb +EXPORT_SYMBOL net/mac80211/mac80211 0xc4341975 ieee80211_beacon_get +EXPORT_SYMBOL net/mac80211/mac80211 0xccfe7ede ieee80211_get_tkip_key +EXPORT_SYMBOL net/mac80211/mac80211 0xd601785c ieee80211_stop_queues +EXPORT_SYMBOL net/mac80211/mac80211 0xde684a92 ieee80211_stop_tx_ba_cb_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d ieee80211_beacon_loss +EXPORT_SYMBOL net/mac80211/mac80211 0xe91f8757 ieee80211_register_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xeaef2f6b ieee80211_queue_stopped +EXPORT_SYMBOL net/mac80211/mac80211 0xf481cef5 ieee80211_restart_hw +EXPORT_SYMBOL net/mac80211/mac80211 0xf561e5da ieee80211_ctstoself_duration +EXPORT_SYMBOL net/mac80211/mac80211 0xf595c1fc ieee80211_scan_completed +EXPORT_SYMBOL net/mac80211/mac80211 0xfe3e0ad8 ieee80211_rx_irqsafe +EXPORT_SYMBOL net/mac80211/mac80211 0xfed67fce ieee80211_stop_queue +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x013047a7 unregister_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0364967d ip_vs_conn_new +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0f29e7bd ip_vs_conn_out_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1f0937ae register_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x29d09c35 ip_vs_conn_put +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x330f45d8 ip_vs_conn_in_get +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x57c40387 unregister_ip_vs_app +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x9c529e41 register_ip_vs_app_inc +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa023b6f8 ip_vs_tcp_conn_listen +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8 ip_vs_proto_name +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa3eae3d4 register_ip_vs_scheduler +EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xad489701 ip_vs_skb_replace +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x0485ab2a __nf_ct_ext_add +EXPORT_SYMBOL net/netfilter/nf_conntrack 0x8aecbd3f __nf_ct_ext_destroy +EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xab4b0051 nf_ct_gre_keymap_flush +EXPORT_SYMBOL net/netfilter/x_tables 0x15accec3 xt_unregister_match +EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826 xt_free_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0x4a136754 xt_register_match +EXPORT_SYMBOL net/netfilter/x_tables 0x7819bc15 xt_unregister_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xa7c09b78 xt_register_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xb118550a xt_find_match +EXPORT_SYMBOL net/netfilter/x_tables 0xb169901b xt_unregister_targets +EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff xt_alloc_table_info +EXPORT_SYMBOL net/netfilter/x_tables 0xc4d8e700 xt_register_matches +EXPORT_SYMBOL net/netfilter/x_tables 0xdee7d6c5 xt_unregister_target +EXPORT_SYMBOL net/netfilter/x_tables 0xf6df0b06 xt_register_target +EXPORT_SYMBOL net/netfilter/x_tables 0xfebb78f6 xt_find_target +EXPORT_SYMBOL net/phonet/phonet 0x2b2979f2 pn_sock_unhash +EXPORT_SYMBOL net/phonet/phonet 0x473eae87 phonet_stream_ops +EXPORT_SYMBOL net/phonet/phonet 0x4dcb0197 phonet_proto_unregister +EXPORT_SYMBOL net/phonet/phonet 0x600c2469 pn_sock_hash +EXPORT_SYMBOL net/phonet/phonet 0xb8ff8de6 pn_sock_get_port +EXPORT_SYMBOL net/phonet/phonet 0xc72c6e26 phonet_header_ops +EXPORT_SYMBOL net/phonet/phonet 0xd8192ac6 pn_skb_send +EXPORT_SYMBOL net/phonet/phonet 0xdb0bcd55 phonet_proto_register +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x298b4eac rxrpc_kernel_begin_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3cfee9fd rxrpc_kernel_free_skb +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x58aa215f rxrpc_kernel_accept_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6befbe2a rxrpc_kernel_is_data_last +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x79ff112c rxrpc_kernel_get_abort_code +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7b80f256 rxrpc_kernel_abort_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x80839c8a rxrpc_kernel_reject_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8e931a2e key_type_rxrpc +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x91e19625 rxrpc_get_null_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9dd6c2c6 rxrpc_kernel_intercept_rx_messages +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xcdefdac0 rxrpc_kernel_get_error_number +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd0e9f4e4 rxrpc_kernel_end_call +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdeb5ab38 rxrpc_kernel_send_data +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe7a132b0 rxrpc_get_server_data_key +EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf0b3ede9 rxrpc_kernel_data_delivered +EXPORT_SYMBOL net/sunrpc/sunrpc 0x37d443f2 svc_pool_stats_open +EXPORT_SYMBOL net/tipc/tipc 0x07258f22 tipc_createport_raw +EXPORT_SYMBOL net/tipc/tipc 0x08310815 tipc_send_buf_fast +EXPORT_SYMBOL net/tipc/tipc 0x08acf310 tipc_available_nodes +EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd tipc_isconnected +EXPORT_SYMBOL net/tipc/tipc 0x1472b270 tipc_disconnect +EXPORT_SYMBOL net/tipc/tipc 0x1479cb03 tipc_deleteport +EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde tipc_set_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x16f27683 tipc_block_bearer +EXPORT_SYMBOL net/tipc/tipc 0x259b74f9 tipc_acknowledge +EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58 tipc_send2port +EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9 tipc_detach +EXPORT_SYMBOL net/tipc/tipc 0x31b0eee4 tipc_createport +EXPORT_SYMBOL net/tipc/tipc 0x3712e340 tipc_portunreliable +EXPORT_SYMBOL net/tipc/tipc 0x3976041f tipc_set_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x3e93b677 tipc_continue +EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6 tipc_portimportance +EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8 tipc_send2name +EXPORT_SYMBOL net/tipc/tipc 0x4e796163 tipc_get_port +EXPORT_SYMBOL net/tipc/tipc 0x538b228a tipc_withdraw +EXPORT_SYMBOL net/tipc/tipc 0x5637ed44 tipc_get_mode +EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c tipc_ref_valid +EXPORT_SYMBOL net/tipc/tipc 0x62a681a3 tipc_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0x64357d3c tipc_multicast +EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7 tipc_forward2port +EXPORT_SYMBOL net/tipc/tipc 0x88b5cb49 tipc_forward_buf2name +EXPORT_SYMBOL net/tipc/tipc 0x88b73627 tipc_get_addr +EXPORT_SYMBOL net/tipc/tipc 0x98633a0c tipc_send_buf +EXPORT_SYMBOL net/tipc/tipc 0x9c45558e tipc_enable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xadd203d0 tipc_connect2port +EXPORT_SYMBOL net/tipc/tipc 0xae0103c3 tipc_shutdown +EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c tipc_forward2name +EXPORT_SYMBOL net/tipc/tipc 0xb35b672c tipc_publish +EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504 tipc_send +EXPORT_SYMBOL net/tipc/tipc 0xc1726b2d tipc_recv_msg +EXPORT_SYMBOL net/tipc/tipc 0xce188240 tipc_register_media +EXPORT_SYMBOL net/tipc/tipc 0xcec8514a tipc_set_portunreturnable +EXPORT_SYMBOL net/tipc/tipc 0xd2b37b08 tipc_forward_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xd44731e5 tipc_ownidentity +EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f tipc_attach +EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc tipc_peer +EXPORT_SYMBOL net/tipc/tipc 0xe3341d85 tipc_send_buf2port +EXPORT_SYMBOL net/tipc/tipc 0xe7aece47 tipc_ispublished +EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3 tipc_get_handle +EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef tipc_disable_bearer +EXPORT_SYMBOL net/tipc/tipc 0xf33b3889 tipc_reject_msg +EXPORT_SYMBOL net/tipc/tipc 0xf3a7c6f9 tipc_send_buf2name +EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1 unregister_wan_device +EXPORT_SYMBOL net/wanrouter/wanrouter 0x3f21845e register_wan_device +EXPORT_SYMBOL net/wimax/wimax 0x20b8dd6c wimax_rfkill +EXPORT_SYMBOL net/wimax/wimax 0x6930e47f wimax_reset +EXPORT_SYMBOL net/wireless/cfg80211 0x01b352a1 wiphy_rfkill_stop_polling +EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a ieee80211_radiotap_iterator_init +EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd ieee80211_frequency_to_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x0cc57b27 wiphy_apply_custom_regulatory +EXPORT_SYMBOL net/wireless/cfg80211 0x15042dd8 cfg80211_get_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd bridge_tunnel_header +EXPORT_SYMBOL net/wireless/cfg80211 0x2c85f209 regulatory_hint_11d +EXPORT_SYMBOL net/wireless/cfg80211 0x2de0e3bc wiphy_free +EXPORT_SYMBOL net/wireless/cfg80211 0x2fa2ff49 wiphy_new +EXPORT_SYMBOL net/wireless/cfg80211 0x366af458 cfg80211_send_disassoc +EXPORT_SYMBOL net/wireless/cfg80211 0x3d816673 cfg80211_put_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x3da52740 regulatory_hint +EXPORT_SYMBOL net/wireless/cfg80211 0x455ae1ec wiphy_register +EXPORT_SYMBOL net/wireless/cfg80211 0x4cc22a04 cfg80211_hold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x59923996 cfg80211_send_rx_assoc +EXPORT_SYMBOL net/wireless/cfg80211 0x5a135cc6 cfg80211_scan_done +EXPORT_SYMBOL net/wireless/cfg80211 0x64ec1e75 cfg80211_ibss_joined +EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43 rfc1042_header +EXPORT_SYMBOL net/wireless/cfg80211 0x7352ba51 __ieee80211_get_channel +EXPORT_SYMBOL net/wireless/cfg80211 0x74147f96 cfg80211_unhold_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x748bd33f cfg80211_classify8021d +EXPORT_SYMBOL net/wireless/cfg80211 0x780c266b cfg80211_inform_bss +EXPORT_SYMBOL net/wireless/cfg80211 0x7ec0bbcc ieee80211_data_from_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x7f70d37e wiphy_unregister +EXPORT_SYMBOL net/wireless/cfg80211 0x8686cb3b cfg80211_send_rx_auth +EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732 ieee80211_hdrlen +EXPORT_SYMBOL net/wireless/cfg80211 0x92c662f7 ieee80211_data_to_8023 +EXPORT_SYMBOL net/wireless/cfg80211 0x99c4d0e9 cfg80211_inform_bss_frame +EXPORT_SYMBOL net/wireless/cfg80211 0xa1e3d221 freq_reg_info +EXPORT_SYMBOL net/wireless/cfg80211 0xab51f363 wiphy_rfkill_start_polling +EXPORT_SYMBOL net/wireless/cfg80211 0xb08cfdd0 wiphy_rfkill_set_hw_state +EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5 ieee80211_radiotap_iterator_next +EXPORT_SYMBOL net/wireless/cfg80211 0xc5e40c63 cfg80211_send_deauth +EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3 ieee80211_channel_to_frequency +EXPORT_SYMBOL net/wireless/cfg80211 0xcec74bb6 ieee80211_get_hdrlen_from_skb +EXPORT_SYMBOL net/wireless/cfg80211 0xd1eb3191 ieee80211_get_response_rate +EXPORT_SYMBOL net/wireless/cfg80211 0xd4f47846 cfg80211_send_auth_timeout +EXPORT_SYMBOL net/wireless/cfg80211 0xdb3a09bf cfg80211_michael_mic_failure +EXPORT_SYMBOL net/wireless/cfg80211 0xf21cb821 cfg80211_unlink_bss +EXPORT_SYMBOL net/wireless/cfg80211 0xf287c9b5 cfg80211_get_mesh +EXPORT_SYMBOL net/wireless/cfg80211 0xf8a082d4 cfg80211_send_assoc_timeout +EXPORT_SYMBOL net/wireless/lib80211 0x14211102 lib80211_register_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x1bcf9058 lib80211_crypt_deinit_entries +EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb lib80211_crypt_deinit_handler +EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5 print_ssid +EXPORT_SYMBOL net/wireless/lib80211 0x3b14540b lib80211_crypt_info_free +EXPORT_SYMBOL net/wireless/lib80211 0x4761beb6 lib80211_get_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0x499c2d49 lib80211_crypt_info_init +EXPORT_SYMBOL net/wireless/lib80211 0x764f3659 lib80211_unregister_crypto_ops +EXPORT_SYMBOL net/wireless/lib80211 0xa3b15cb3 lib80211_crypt_delayed_deinit +EXPORT_SYMBOL net/wireless/lib80211 0xeb3b3612 lib80211_crypt_quiescing +EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x08cb2969 snd_mixer_oss_ioctl_card +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc snd_seq_kernel_client_ctl +EXPORT_SYMBOL sound/core/seq/snd-seq 0x1d572379 snd_seq_event_port_attach +EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161 snd_seq_kernel_client_dispatch +EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038 snd_seq_delete_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329 snd_seq_expand_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb snd_seq_event_port_detach +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb04a47d8 snd_seq_create_kernel_client +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb4441e50 snd_seq_kernel_client_write_poll +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0 snd_seq_set_queue_tempo +EXPORT_SYMBOL sound/core/seq/snd-seq 0xb9b30078 snd_seq_kernel_client_enqueue_blocking +EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be snd_seq_kernel_client_enqueue +EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d snd_seq_dump_var_event +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235 snd_seq_autoload_unlock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3bcde95a snd_seq_device_new +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0 snd_seq_device_load_drivers +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2 snd_seq_autoload_lock +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29 snd_seq_device_unregister_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xd6774e26 snd_seq_device_register_driver +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x3b55d387 snd_midi_event_encode_byte +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x68b9bd07 snd_midi_event_free +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7adfa053 snd_midi_event_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x998f2126 snd_midi_event_new +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9b1825a9 snd_midi_event_no_status +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb6327286 snd_midi_event_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbc51650a snd_midi_event_reset_decode +EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe58d6519 snd_midi_event_reset_encode +EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xfd892c70 snd_virmidi_new +EXPORT_SYMBOL sound/core/snd-hwdep 0xa94bef1e snd_hwdep_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0x017f4ad1 snd_rawmidi_kernel_read +EXPORT_SYMBOL sound/core/snd-rawmidi 0x22968194 snd_rawmidi_input_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0x52941ab8 snd_rawmidi_transmit_empty +EXPORT_SYMBOL sound/core/snd-rawmidi 0x6b7ad780 snd_rawmidi_kernel_open +EXPORT_SYMBOL sound/core/snd-rawmidi 0x7288bd49 snd_rawmidi_set_ops +EXPORT_SYMBOL sound/core/snd-rawmidi 0x73c4fd06 snd_rawmidi_kernel_write +EXPORT_SYMBOL sound/core/snd-rawmidi 0x8921216a snd_rawmidi_transmit_ack +EXPORT_SYMBOL sound/core/snd-rawmidi 0x9b0e1325 snd_rawmidi_receive +EXPORT_SYMBOL sound/core/snd-rawmidi 0x9c12abed snd_rawmidi_drain_input +EXPORT_SYMBOL sound/core/snd-rawmidi 0x9d0b010e snd_rawmidi_info_select +EXPORT_SYMBOL sound/core/snd-rawmidi 0xaf34cabd snd_rawmidi_drop_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xce32dd9c snd_rawmidi_kernel_release +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe216cc15 snd_rawmidi_transmit +EXPORT_SYMBOL sound/core/snd-rawmidi 0xe8129868 snd_rawmidi_new +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf4e1ea80 snd_rawmidi_drain_output +EXPORT_SYMBOL sound/core/snd-rawmidi 0xf6993806 snd_rawmidi_output_params +EXPORT_SYMBOL sound/core/snd-rawmidi 0xff898ad0 snd_rawmidi_transmit_peek +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27 snd_mpu401_uart_interrupt_tx +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x6282ee2c snd_mpu401_uart_new +EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940 snd_mpu401_uart_interrupt +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1cbff5c5 snd_vx_create +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3de69249 snd_vx_free_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x40c418d7 snd_vx_suspend +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7389617c snd_vx_setup_firmware +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x827cc9e7 snd_vx_dsp_boot +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede snd_vx_irq_handler +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xc03a53b0 snd_vx_resume +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xde8828f1 snd_vx_dsp_load +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xe3322b27 snd_vx_check_reg_bit +EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xef87086e snd_vx_load_boot_image +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x25f24771 snd_ak4117_check_rate_and_errors +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6c6b1342 snd_ak4117_create +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x91283bab snd_ak4117_build +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x97b65a29 snd_ak4117_reg_write +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb904216e snd_ak4117_external_rate +EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcd215575 snd_ak4117_reinit +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0 snd_usbmidi_input_start +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x42facf17 snd_usb_create_midi_interface +EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d snd_usbmidi_input_stop +EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03 snd_usbmidi_disconnect +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x03c8cbb5 dm_mem_cache_client_destroy +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x55fa3588 dm_mem_cache_shrink +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x8a26f2ad dm_mem_cache_free +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41 dm_message_parse +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xad722477 dm_mem_cache_alloc +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xb89479d0 dm_mem_cache_client_create +EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xeed78c18 dm_mem_cache_grow +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738 lirc_unregister_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x621eca9f lirc_register_driver +EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xdacd7540 lirc_get_pdata +EXPORT_SYMBOL vmlinux 0x00000000 fp_printk +EXPORT_SYMBOL vmlinux 0x00000000 fp_send_sig +EXPORT_SYMBOL vmlinux 0x00000000 kern_fp_enter +EXPORT_SYMBOL vmlinux 0x00000000 per_cpu__softirq_work_list +EXPORT_SYMBOL vmlinux 0x00296841 mark_buffer_async_write +EXPORT_SYMBOL vmlinux 0x004843bf sock_kmalloc +EXPORT_SYMBOL vmlinux 0x00686af0 dev_get_by_index +EXPORT_SYMBOL vmlinux 0x007bc584 snd_power_wait +EXPORT_SYMBOL vmlinux 0x00801678 flush_scheduled_work +EXPORT_SYMBOL vmlinux 0x0087de1b ipu_csi_set_window_pos +EXPORT_SYMBOL vmlinux 0x0091e142 iw_handler_set_thrspy +EXPORT_SYMBOL vmlinux 0x009b4ceb xfrm_register_type +EXPORT_SYMBOL vmlinux 0x00be8a83 cdrom_ioctl +EXPORT_SYMBOL vmlinux 0x00c4dc87 timecounter_init +EXPORT_SYMBOL vmlinux 0x00cbe883 per_cpu__vm_event_states +EXPORT_SYMBOL vmlinux 0x00e8097b csum_partial_copy_fromiovecend +EXPORT_SYMBOL vmlinux 0x01000e51 schedule +EXPORT_SYMBOL vmlinux 0x0107d2fc path_lookup +EXPORT_SYMBOL vmlinux 0x010cfd55 snd_pcm_hw_constraint_list +EXPORT_SYMBOL vmlinux 0x01139ffc max_mapnr +EXPORT_SYMBOL vmlinux 0x01197f75 generic_setxattr +EXPORT_SYMBOL vmlinux 0x011d9c83 key_revoke +EXPORT_SYMBOL vmlinux 0x0136e0cc dev_mc_delete +EXPORT_SYMBOL vmlinux 0x0141a7e7 xfrm_state_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x015271e5 genphy_update_link +EXPORT_SYMBOL vmlinux 0x015e58fd udp_sendmsg +EXPORT_SYMBOL vmlinux 0x017002d3 mxc_dma_request_ext +EXPORT_SYMBOL vmlinux 0x01902adf netpoll_trap +EXPORT_SYMBOL vmlinux 0x01a4aab6 set_irq_chip_data +EXPORT_SYMBOL vmlinux 0x01a5752a cdrom_get_media_event +EXPORT_SYMBOL vmlinux 0x01c13bf5 register_con_driver +EXPORT_SYMBOL vmlinux 0x01c744fa km_policy_notify +EXPORT_SYMBOL vmlinux 0x01f9d3d8 phy_attach_direct +EXPORT_SYMBOL vmlinux 0x01fe3f4b unlock_page +EXPORT_SYMBOL vmlinux 0x020f9088 journal_init_inode +EXPORT_SYMBOL vmlinux 0x02124474 ip_send_check +EXPORT_SYMBOL vmlinux 0x02196324 __aeabi_idiv +EXPORT_SYMBOL vmlinux 0x021bb133 scsi_cmd_ioctl +EXPORT_SYMBOL vmlinux 0x023039e0 dcache_dir_lseek +EXPORT_SYMBOL vmlinux 0x02346042 sock_create +EXPORT_SYMBOL vmlinux 0x02589291 sock_no_getname +EXPORT_SYMBOL vmlinux 0x02649054 security_sock_rcv_skb +EXPORT_SYMBOL vmlinux 0x0283dfe3 _snd_pcm_hw_params_any +EXPORT_SYMBOL vmlinux 0x02a6ce5a crc16_table +EXPORT_SYMBOL vmlinux 0x02d9c583 dmam_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0x02ee26c1 free_pages_exact +EXPORT_SYMBOL vmlinux 0x02ee523f hci_unregister_proto +EXPORT_SYMBOL vmlinux 0x030ec695 ipu_csi_get_window_size +EXPORT_SYMBOL vmlinux 0x031f0e8b __splice_from_pipe +EXPORT_SYMBOL vmlinux 0x03318e1d qdisc_warn_nonwc +EXPORT_SYMBOL vmlinux 0x0334da4e scsi_command_size_tbl +EXPORT_SYMBOL vmlinux 0x0350e2f4 up_read +EXPORT_SYMBOL vmlinux 0x03591338 blk_init_tags +EXPORT_SYMBOL vmlinux 0x036aad6e blk_queue_invalidate_tags +EXPORT_SYMBOL vmlinux 0x037a0cba kfree +EXPORT_SYMBOL vmlinux 0x037cd516 snd_pcm_lib_readv +EXPORT_SYMBOL vmlinux 0x0386d43f pmic_adc_convert_8x +EXPORT_SYMBOL vmlinux 0x0391430d key_type_keyring +EXPORT_SYMBOL vmlinux 0x03b7d2ce inet_sk_rebuild_header +EXPORT_SYMBOL vmlinux 0x03c06156 bitmap_fold +EXPORT_SYMBOL vmlinux 0x03ccbc8e tcp_md5_hash_key +EXPORT_SYMBOL vmlinux 0x03f390b4 request_firmware +EXPORT_SYMBOL vmlinux 0x03fd2571 vm_unmap_ram +EXPORT_SYMBOL vmlinux 0x04019b77 free_buffer_head +EXPORT_SYMBOL vmlinux 0x0422fe4a inet_csk_timer_bug_msg +EXPORT_SYMBOL vmlinux 0x043a16d9 ppp_unit_number +EXPORT_SYMBOL vmlinux 0x043b8483 __kfifo_get +EXPORT_SYMBOL vmlinux 0x044fbf49 mempool_kzalloc +EXPORT_SYMBOL vmlinux 0x0482cfca __secpath_destroy +EXPORT_SYMBOL vmlinux 0x0487f831 fb_find_best_display +EXPORT_SYMBOL vmlinux 0x04ac20ea ethtool_op_set_flags +EXPORT_SYMBOL vmlinux 0x04b6fdba jbd2_journal_forget +EXPORT_SYMBOL vmlinux 0x04c1ca56 scc_allocate_partition +EXPORT_SYMBOL vmlinux 0x04cda566 snd_interval_refine +EXPORT_SYMBOL vmlinux 0x04fd2b90 dev_load +EXPORT_SYMBOL vmlinux 0x0526a4df jbd2_journal_check_available_features +EXPORT_SYMBOL vmlinux 0x0530191f jbd2_journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x054a89e4 snd_add_device_sysfs_file +EXPORT_SYMBOL vmlinux 0x055c9fe5 uart_suspend_port +EXPORT_SYMBOL vmlinux 0x055fe82e blk_remove_plug +EXPORT_SYMBOL vmlinux 0x05644047 jbd2_journal_destroy +EXPORT_SYMBOL vmlinux 0x0569120a cdev_del +EXPORT_SYMBOL vmlinux 0x056a719c mxc_dma_enable +EXPORT_SYMBOL vmlinux 0x0573137f nla_put +EXPORT_SYMBOL vmlinux 0x057ce975 hex_dump_to_buffer +EXPORT_SYMBOL vmlinux 0x057dbfe9 gpio_uart_inactive +EXPORT_SYMBOL vmlinux 0x0590e73f blk_end_request_all +EXPORT_SYMBOL vmlinux 0x05be5588 simple_sync_file +EXPORT_SYMBOL vmlinux 0x05f26f06 dev_unicast_add +EXPORT_SYMBOL vmlinux 0x0600f55b blk_get_request +EXPORT_SYMBOL vmlinux 0x06090de7 __sg_free_table +EXPORT_SYMBOL vmlinux 0x061651be strcat +EXPORT_SYMBOL vmlinux 0x0618e633 dump_fpu +EXPORT_SYMBOL vmlinux 0x062aba95 mempool_free +EXPORT_SYMBOL vmlinux 0x066c29f6 snd_ctl_remove +EXPORT_SYMBOL vmlinux 0x066f1797 phy_ethtool_sset +EXPORT_SYMBOL vmlinux 0x0679607d dev_gro_receive +EXPORT_SYMBOL vmlinux 0x067d8d35 security_release_secctx +EXPORT_SYMBOL vmlinux 0x069494aa tcp_v4_do_rcv +EXPORT_SYMBOL vmlinux 0x06c8ff8e udp_poll +EXPORT_SYMBOL vmlinux 0x06d728b1 tcp_parse_md5sig_option +EXPORT_SYMBOL vmlinux 0x06d8bae1 idr_get_new +EXPORT_SYMBOL vmlinux 0x06ec0ce3 inet6_unregister_protosw +EXPORT_SYMBOL vmlinux 0x06f2da46 mem_map +EXPORT_SYMBOL vmlinux 0x06fe3b14 default_grn +EXPORT_SYMBOL vmlinux 0x07152f32 generic_file_mmap +EXPORT_SYMBOL vmlinux 0x0719f748 kthread_bind +EXPORT_SYMBOL vmlinux 0x072a6f20 lookup_bdev +EXPORT_SYMBOL vmlinux 0x072dd5bc ipu_csi_init_interface +EXPORT_SYMBOL vmlinux 0x074d5568 __xfrm_state_destroy +EXPORT_SYMBOL vmlinux 0x078b6d8b file_fsync +EXPORT_SYMBOL vmlinux 0x07989c84 ip_fragment +EXPORT_SYMBOL vmlinux 0x0799513e d_alloc +EXPORT_SYMBOL vmlinux 0x0799aca4 local_bh_enable +EXPORT_SYMBOL vmlinux 0x0799c50a param_set_ulong +EXPORT_SYMBOL vmlinux 0x07a890c8 fb_alloc_cmap +EXPORT_SYMBOL vmlinux 0x07c9ddd1 may_umount_tree +EXPORT_SYMBOL vmlinux 0x07cc4a5d printk_timed_ratelimit +EXPORT_SYMBOL vmlinux 0x07d9b783 scsi_nl_send_vendor_msg +EXPORT_SYMBOL vmlinux 0x080663c1 cdev_alloc +EXPORT_SYMBOL vmlinux 0x0819d541 elv_add_request +EXPORT_SYMBOL vmlinux 0x084c2934 dm_table_get +EXPORT_SYMBOL vmlinux 0x084d3803 scsi_get_command +EXPORT_SYMBOL vmlinux 0x0857cf73 ipu_link_channels +EXPORT_SYMBOL vmlinux 0x0890a276 do_sync_write +EXPORT_SYMBOL vmlinux 0x08cc89ae sock_no_listen +EXPORT_SYMBOL vmlinux 0x08cd9326 scsi_cmd_print_sense_hdr +EXPORT_SYMBOL vmlinux 0x08d048cf skb_pad +EXPORT_SYMBOL vmlinux 0x08d66a3a warn_slowpath_fmt +EXPORT_SYMBOL vmlinux 0x08db5655 ipu_unlink_channels +EXPORT_SYMBOL vmlinux 0x0901485f nand_calculate_ecc +EXPORT_SYMBOL vmlinux 0x09133c81 mmc_add_host +EXPORT_SYMBOL vmlinux 0x092b007a sleep_on_timeout +EXPORT_SYMBOL vmlinux 0x0948cde9 num_physpages +EXPORT_SYMBOL vmlinux 0x098b71c6 fb_dealloc_cmap +EXPORT_SYMBOL vmlinux 0x0991626c kmem_cache_size +EXPORT_SYMBOL vmlinux 0x0992a6b9 skb_free_datagram_locked +EXPORT_SYMBOL vmlinux 0x09a4a873 splice_direct_to_actor +EXPORT_SYMBOL vmlinux 0x09a5d683 dma_release_from_coherent +EXPORT_SYMBOL vmlinux 0x09c55cec schedule_timeout_interruptible +EXPORT_SYMBOL vmlinux 0x09c8eb55 font_vga_8x16 +EXPORT_SYMBOL vmlinux 0x09cc695b vc_resize +EXPORT_SYMBOL vmlinux 0x09d45c21 down_timeout +EXPORT_SYMBOL vmlinux 0x09efe346 i2c_verify_client +EXPORT_SYMBOL vmlinux 0x0a05de8c iunique +EXPORT_SYMBOL vmlinux 0x0a1bebc5 kernel_execve +EXPORT_SYMBOL vmlinux 0x0a1cf0be ethtool_op_get_link +EXPORT_SYMBOL vmlinux 0x0a2487e0 unblock_all_signals +EXPORT_SYMBOL vmlinux 0x0a2a9654 elv_dispatch_sort +EXPORT_SYMBOL vmlinux 0x0a3131f6 strnchr +EXPORT_SYMBOL vmlinux 0x0a4747ff allocate_resource +EXPORT_SYMBOL vmlinux 0x0a983ff2 md_wait_for_blocked_rdev +EXPORT_SYMBOL vmlinux 0x0aa13d05 __raw_readsw +EXPORT_SYMBOL vmlinux 0x0acb1a3c __bitmap_shift_right +EXPORT_SYMBOL vmlinux 0x0b0d888b icmpv6_err_convert +EXPORT_SYMBOL vmlinux 0x0b1beb31 vmalloc_32_user +EXPORT_SYMBOL vmlinux 0x0b4bbd56 bitmap_startwrite +EXPORT_SYMBOL vmlinux 0x0b4e5c6c phy_stop +EXPORT_SYMBOL vmlinux 0x0b5e3059 neigh_lookup_nodev +EXPORT_SYMBOL vmlinux 0x0b5f2d2c sg_next +EXPORT_SYMBOL vmlinux 0x0b66f08a sysctl_ms_jiffies +EXPORT_SYMBOL vmlinux 0x0b742fd7 simple_strtol +EXPORT_SYMBOL vmlinux 0x0b87bf0d vlan_gro_frags +EXPORT_SYMBOL vmlinux 0x0b91dadb eth_change_mtu +EXPORT_SYMBOL vmlinux 0x0b9ce544 fput +EXPORT_SYMBOL vmlinux 0x0ba8af84 xfrm_policy_unregister_afinfo +EXPORT_SYMBOL vmlinux 0x0bac416e sync_page_range +EXPORT_SYMBOL vmlinux 0x0bbba70d snd_pcm_hw_constraint_ratnums +EXPORT_SYMBOL vmlinux 0x0bc80594 vlan_dev_real_dev +EXPORT_SYMBOL vmlinux 0x0bf460db page_readlink +EXPORT_SYMBOL vmlinux 0x0c0251a2 jbd2_journal_release_buffer +EXPORT_SYMBOL vmlinux 0x0c136f43 ethtool_op_set_sg +EXPORT_SYMBOL vmlinux 0x0c446aa6 input_close_device +EXPORT_SYMBOL vmlinux 0x0c52b33d unmap_mapping_range +EXPORT_SYMBOL vmlinux 0x0c65e73c scsi_normalize_sense +EXPORT_SYMBOL vmlinux 0x0c68df12 register_quota_format +EXPORT_SYMBOL vmlinux 0x0c700942 xfrm_find_acq_byseq +EXPORT_SYMBOL vmlinux 0x0c862ab0 proc_dointvec_ms_jiffies +EXPORT_SYMBOL vmlinux 0x0c8c9e99 scsi_show_extd_sense +EXPORT_SYMBOL vmlinux 0x0ca63df9 dmam_pool_create +EXPORT_SYMBOL vmlinux 0x0cae232b utf16s_to_utf8s +EXPORT_SYMBOL vmlinux 0x0cd5363a md_error +EXPORT_SYMBOL vmlinux 0x0d08fa18 fb_blank +EXPORT_SYMBOL vmlinux 0x0d1c3edf skb_realloc_headroom +EXPORT_SYMBOL vmlinux 0x0d3def21 idr_pre_get +EXPORT_SYMBOL vmlinux 0x0d3f57a2 _find_next_bit_le +EXPORT_SYMBOL vmlinux 0x0d514839 try_to_release_page +EXPORT_SYMBOL vmlinux 0x0d542439 __ipv6_addr_type +EXPORT_SYMBOL vmlinux 0x0d583ee6 gpio_uart_active +EXPORT_SYMBOL vmlinux 0x0d67cfed snd_pcm_set_ops +EXPORT_SYMBOL vmlinux 0x0da10ec3 security_sock_graft +EXPORT_SYMBOL vmlinux 0x0db77d3a clip_tbl_hook +EXPORT_SYMBOL vmlinux 0x0ddcff71 hci_conn_hold_device +EXPORT_SYMBOL vmlinux 0x0de64037 journal_lock_updates +EXPORT_SYMBOL vmlinux 0x0e00bb76 xfrm_user_policy +EXPORT_SYMBOL vmlinux 0x0e0957eb gpio_spdif_active +EXPORT_SYMBOL vmlinux 0x0e0c9888 snd_seq_root +EXPORT_SYMBOL vmlinux 0x0e0ec1c3 uart_get_baud_rate +EXPORT_SYMBOL vmlinux 0x0e16170f i2c_smbus_read_word_data +EXPORT_SYMBOL vmlinux 0x0e1fa02c locks_init_lock +EXPORT_SYMBOL vmlinux 0x0e2dddb5 mdiobus_register +EXPORT_SYMBOL vmlinux 0x0e34cd3f sysctl_data +EXPORT_SYMBOL vmlinux 0x0e376541 mxc_dma_stop +EXPORT_SYMBOL vmlinux 0x0e3ae13d copy_strings_kernel +EXPORT_SYMBOL vmlinux 0x0e42fba5 ndisc_send_rs +EXPORT_SYMBOL vmlinux 0x0e52592a panic +EXPORT_SYMBOL vmlinux 0x0e9c206e snd_pcm_open_substream +EXPORT_SYMBOL vmlinux 0x0ea8b7d3 qdisc_watchdog_init +EXPORT_SYMBOL vmlinux 0x0eeadf6f journal_clear_err +EXPORT_SYMBOL vmlinux 0x0ef2ce9b bt_accept_unlink +EXPORT_SYMBOL vmlinux 0x0f1c0be8 mc13892_bklit_set_ramp +EXPORT_SYMBOL vmlinux 0x0f1ef871 posix_acl_alloc +EXPORT_SYMBOL vmlinux 0x0f386461 freeze_bdev +EXPORT_SYMBOL vmlinux 0x0f3e15bc i2c_master_recv +EXPORT_SYMBOL vmlinux 0x0f628ca6 mark_info_dirty +EXPORT_SYMBOL vmlinux 0x0f87bd0a filemap_fault +EXPORT_SYMBOL vmlinux 0x0f9bb90f clocksource_register +EXPORT_SYMBOL vmlinux 0x0fa22315 pskb_copy +EXPORT_SYMBOL vmlinux 0x0fa2a45e __memzero +EXPORT_SYMBOL vmlinux 0x0fab89e9 proc_net_netfilter +EXPORT_SYMBOL vmlinux 0x0fabda0c skb_tx_hash +EXPORT_SYMBOL vmlinux 0x0fba4909 wireless_spy_update +EXPORT_SYMBOL vmlinux 0x0fc586ba down_trylock +EXPORT_SYMBOL vmlinux 0x0ff178f6 __aeabi_idivmod +EXPORT_SYMBOL vmlinux 0x0ff2b602 slhc_compress +EXPORT_SYMBOL vmlinux 0x100b8f0c kernel_getsockname +EXPORT_SYMBOL vmlinux 0x100e4d4d vfs_quota_on_path +EXPORT_SYMBOL vmlinux 0x10579454 sg_copy_from_buffer +EXPORT_SYMBOL vmlinux 0x105fd822 kernel_sock_ioctl +EXPORT_SYMBOL vmlinux 0x10605b49 br_fdb_test_addr_hook +EXPORT_SYMBOL vmlinux 0x106b49f9 mxc_dma_get_bd_intr +EXPORT_SYMBOL vmlinux 0x1072a394 csum_partial_copy_from_user +EXPORT_SYMBOL vmlinux 0x10806e2d xfrm_prepare_input +EXPORT_SYMBOL vmlinux 0x108e8985 param_get_uint +EXPORT_SYMBOL vmlinux 0x109350e8 sah_insert_mdha_algorithm +EXPORT_SYMBOL vmlinux 0x10986cc0 dquot_alloc_inode +EXPORT_SYMBOL vmlinux 0x109c58e4 sock_get_timestampns +EXPORT_SYMBOL vmlinux 0x10b15578 rfkill_set_hw_state +EXPORT_SYMBOL vmlinux 0x10bbdd60 init_special_inode +EXPORT_SYMBOL vmlinux 0x10bdbc64 rtnetlink_put_metrics +EXPORT_SYMBOL vmlinux 0x10cb3f86 uart_update_timeout +EXPORT_SYMBOL vmlinux 0x10d0daec skb_queue_head +EXPORT_SYMBOL vmlinux 0x10ee20bb default_blu +EXPORT_SYMBOL vmlinux 0x10fdc1d0 get_unmapped_area_prot +EXPORT_SYMBOL vmlinux 0x10fe1881 bd_claim +EXPORT_SYMBOL vmlinux 0x1101add2 scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x11267875 scsi_extd_sense_format +EXPORT_SYMBOL vmlinux 0x1138ca43 tty_register_driver +EXPORT_SYMBOL vmlinux 0x1163f0a7 blk_max_low_pfn +EXPORT_SYMBOL vmlinux 0x11669ec9 tty_port_close_start +EXPORT_SYMBOL vmlinux 0x11684baa dev_set_promiscuity +EXPORT_SYMBOL vmlinux 0x117093be qdisc_class_hash_init +EXPORT_SYMBOL vmlinux 0x1184e0d5 fsl_shw_get_capabilities +EXPORT_SYMBOL vmlinux 0x1199e5ef pneigh_enqueue +EXPORT_SYMBOL vmlinux 0x119b50e7 elf_check_arch +EXPORT_SYMBOL vmlinux 0x11ba48c5 ipu_csi_set_test_generator +EXPORT_SYMBOL vmlinux 0x11ca1165 nf_hook_slow +EXPORT_SYMBOL vmlinux 0x11cde446 qdisc_create_dflt +EXPORT_SYMBOL vmlinux 0x11da1035 vm_insert_page +EXPORT_SYMBOL vmlinux 0x122d861b nobh_write_begin +EXPORT_SYMBOL vmlinux 0x123fc9c0 tcp4_gro_receive +EXPORT_SYMBOL vmlinux 0x1256bf40 tty_port_free_xmit_buf +EXPORT_SYMBOL vmlinux 0x125c6af6 nobh_write_end +EXPORT_SYMBOL vmlinux 0x12841410 __blockdev_direct_IO +EXPORT_SYMBOL vmlinux 0x129e74f2 apm_get_power_status +EXPORT_SYMBOL vmlinux 0x12a694af input_unfilter_device +EXPORT_SYMBOL vmlinux 0x12da5bb2 __kmalloc +EXPORT_SYMBOL vmlinux 0x12df15f0 sk_alloc +EXPORT_SYMBOL vmlinux 0x12e1514f alloc_disk_node +EXPORT_SYMBOL vmlinux 0x12fad1cb fb_find_mode +EXPORT_SYMBOL vmlinux 0x13109245 prepare_kernel_cred +EXPORT_SYMBOL vmlinux 0x132c8282 dev_mc_unsync +EXPORT_SYMBOL vmlinux 0x134a4768 __nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x135f0536 tty_port_tty_get +EXPORT_SYMBOL vmlinux 0x1395a8a2 no_llseek +EXPORT_SYMBOL vmlinux 0x13ce775e prepare_binprm +EXPORT_SYMBOL vmlinux 0x13dd1051 ipu_disp_direct_write +EXPORT_SYMBOL vmlinux 0x13e47032 tcp_mtup_init +EXPORT_SYMBOL vmlinux 0x14005f1a dst_release +EXPORT_SYMBOL vmlinux 0x14178008 __vlan_hwaccel_rx +EXPORT_SYMBOL vmlinux 0x144ed3a1 dev_base_lock +EXPORT_SYMBOL vmlinux 0x14618ae5 dev_getbyhwaddr +EXPORT_SYMBOL vmlinux 0x1475fdae __blk_end_request_all +EXPORT_SYMBOL vmlinux 0x148ecaa4 input_allocate_device +EXPORT_SYMBOL vmlinux 0x14e0d3a1 dmam_alloc_noncoherent +EXPORT_SYMBOL vmlinux 0x1544aad4 genl_register_mc_group +EXPORT_SYMBOL vmlinux 0x1551dc51 bitmap_find_free_region +EXPORT_SYMBOL vmlinux 0x157cfcd6 nla_reserve_nohdr +EXPORT_SYMBOL vmlinux 0x1592c3a3 gpio_keypad_inactive +EXPORT_SYMBOL vmlinux 0x15aeb37e dquot_mark_dquot_dirty +EXPORT_SYMBOL vmlinux 0x15c61c31 vfs_dq_drop +EXPORT_SYMBOL vmlinux 0x15e846f9 bio_integrity_tag_size +EXPORT_SYMBOL vmlinux 0x15f20c73 ioremap_page +EXPORT_SYMBOL vmlinux 0x15fc3cdc bdi_destroy +EXPORT_SYMBOL vmlinux 0x1606d38f complete_request_key +EXPORT_SYMBOL vmlinux 0x1615b6ca tcp_initialize_rcv_mss +EXPORT_SYMBOL vmlinux 0x16305289 warn_slowpath_null +EXPORT_SYMBOL vmlinux 0x163c5e39 twl4030_i2c_read +EXPORT_SYMBOL vmlinux 0x1641373c bd_release +EXPORT_SYMBOL vmlinux 0x16479e8f panic_notifier_list +EXPORT_SYMBOL vmlinux 0x16491120 tty_shutdown +EXPORT_SYMBOL vmlinux 0x164d3e8a snd_timer_global_register +EXPORT_SYMBOL vmlinux 0x164f21e7 blk_dump_rq_flags +EXPORT_SYMBOL vmlinux 0x1656fa55 jbd2_journal_clear_err +EXPORT_SYMBOL vmlinux 0x166e74a2 cpu_v7_set_pte_ext +EXPORT_SYMBOL vmlinux 0x166eadef elv_rb_find +EXPORT_SYMBOL vmlinux 0x167f70f3 register_sound_midi +EXPORT_SYMBOL vmlinux 0x169422d7 nf_unregister_hooks +EXPORT_SYMBOL vmlinux 0x16a28a0c netdev_boot_setup_check +EXPORT_SYMBOL vmlinux 0x16aba884 simple_pin_fs +EXPORT_SYMBOL vmlinux 0x16ae8190 register_mtd_chip_driver +EXPORT_SYMBOL vmlinux 0x16bc2841 unlock_new_inode +EXPORT_SYMBOL vmlinux 0x16d6e46a load_nls_default +EXPORT_SYMBOL vmlinux 0x16e1545d set_normalized_timespec +EXPORT_SYMBOL vmlinux 0x173b2390 netdev_class_create_file +EXPORT_SYMBOL vmlinux 0x175df3fc ppp_unregister_channel +EXPORT_SYMBOL vmlinux 0x175fa11d tty_unthrottle +EXPORT_SYMBOL vmlinux 0x177c10db gpio_sdhc_inactive +EXPORT_SYMBOL vmlinux 0x17888987 jbd2_journal_invalidatepage +EXPORT_SYMBOL vmlinux 0x178a3059 otg_set_serial_peripheral +EXPORT_SYMBOL vmlinux 0x179246f1 dma_alloc_coherent +EXPORT_SYMBOL vmlinux 0x179f023d dquot_release_reserved_space +EXPORT_SYMBOL vmlinux 0x17df17bc sysctl_tcp_ecn +EXPORT_SYMBOL vmlinux 0x17ee164c __generic_block_fiemap +EXPORT_SYMBOL vmlinux 0x17fbf7ef jbd2_journal_ack_err +EXPORT_SYMBOL vmlinux 0x180e8ec6 bdput +EXPORT_SYMBOL vmlinux 0x1823ae29 mmc_align_data_size +EXPORT_SYMBOL vmlinux 0x1837a549 pmic_read_reg +EXPORT_SYMBOL vmlinux 0x183fa88b mempool_alloc_slab +EXPORT_SYMBOL vmlinux 0x18412271 jbd2_journal_abort +EXPORT_SYMBOL vmlinux 0x184b82fb mmc_vddrange_to_ocrmask +EXPORT_SYMBOL vmlinux 0x185c8497 __tracepoint_kmem_cache_alloc_node +EXPORT_SYMBOL vmlinux 0x1865e9cd nonseekable_open +EXPORT_SYMBOL vmlinux 0x186764c1 phy_sanitize_settings +EXPORT_SYMBOL vmlinux 0x18a69bbe jbd2_journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x18add96b unregister_console +EXPORT_SYMBOL vmlinux 0x18b960a9 dm_get_device +EXPORT_SYMBOL vmlinux 0x18e811d9 __breadahead +EXPORT_SYMBOL vmlinux 0x19030b6c proc_dointvec_jiffies +EXPORT_SYMBOL vmlinux 0x1925d740 snd_unregister_device +EXPORT_SYMBOL vmlinux 0x19432f89 bioset_integrity_free +EXPORT_SYMBOL vmlinux 0x194c7518 journal_ack_err +EXPORT_SYMBOL vmlinux 0x19524f50 follow_pfn +EXPORT_SYMBOL vmlinux 0x1953d896 vfs_get_dqblk +EXPORT_SYMBOL vmlinux 0x19701ae6 con_set_default_unimap +EXPORT_SYMBOL vmlinux 0x1975b247 unregister_sysctl_table +EXPORT_SYMBOL vmlinux 0x19781a50 rfkill_set_led_trigger_name +EXPORT_SYMBOL vmlinux 0x198788b4 snd_lookup_oss_minor_data +EXPORT_SYMBOL vmlinux 0x19883909 ipu_enable_channel +EXPORT_SYMBOL vmlinux 0x19895170 dm_exception_store_destroy +EXPORT_SYMBOL vmlinux 0x199ed0cd net_disable_timestamp +EXPORT_SYMBOL vmlinux 0x19ae9814 mpage_writepages +EXPORT_SYMBOL vmlinux 0x19bf8ab6 get_sb_pseudo +EXPORT_SYMBOL vmlinux 0x19e27fbc iov_iter_copy_from_user_atomic +EXPORT_SYMBOL vmlinux 0x19f3c91e journal_wipe +EXPORT_SYMBOL vmlinux 0x19fe04f8 adaptor_Exec_Descriptor_Chain +EXPORT_SYMBOL vmlinux 0x1a1cca92 bioset_free +EXPORT_SYMBOL vmlinux 0x1a24e5e2 sonet_subtract_stats +EXPORT_SYMBOL vmlinux 0x1a434478 hci_unregister_dev +EXPORT_SYMBOL vmlinux 0x1a4fc350 genl_unregister_mc_group +EXPORT_SYMBOL vmlinux 0x1a57dec1 dquot_initialize +EXPORT_SYMBOL vmlinux 0x1a65f4ad __arm_ioremap_pfn +EXPORT_SYMBOL vmlinux 0x1a6a7a7c ether_setup +EXPORT_SYMBOL vmlinux 0x1aa8b028 blk_requeue_request +EXPORT_SYMBOL vmlinux 0x1aad78e8 snd_ctl_free_one +EXPORT_SYMBOL vmlinux 0x1aae252f ip_route_me_harder +EXPORT_SYMBOL vmlinux 0x1ac4c550 snd_pcm_lib_preallocate_pages_for_all +EXPORT_SYMBOL vmlinux 0x1ace138d bitmap_allocate_region +EXPORT_SYMBOL vmlinux 0x1ad1f2e7 _memcpy_fromio +EXPORT_SYMBOL vmlinux 0x1aec01bd gpio_gps_inactive +EXPORT_SYMBOL vmlinux 0x1aec34a6 bio_integrity_endio +EXPORT_SYMBOL vmlinux 0x1b015d25 bitmap_parselist +EXPORT_SYMBOL vmlinux 0x1b054d89 gpio_gps_active +EXPORT_SYMBOL vmlinux 0x1b0e4c8c tty_port_close +EXPORT_SYMBOL vmlinux 0x1b310ab7 i2c_put_adapter +EXPORT_SYMBOL vmlinux 0x1b34cdcc blk_sync_queue +EXPORT_SYMBOL vmlinux 0x1b3acb3d block_write_full_page_endio +EXPORT_SYMBOL vmlinux 0x1b5be8bc ilookup5 +EXPORT_SYMBOL vmlinux 0x1b6314fd in_aton +EXPORT_SYMBOL vmlinux 0x1b6433d1 snd_dma_reserve_buf +EXPORT_SYMBOL vmlinux 0x1b729a6d generic_write_end +EXPORT_SYMBOL vmlinux 0x1b850cb7 jbd2_journal_init_dev +EXPORT_SYMBOL vmlinux 0x1b9981cc set_irq_wake +EXPORT_SYMBOL vmlinux 0x1b9e0ff1 scsilun_to_int +EXPORT_SYMBOL vmlinux 0x1ba45573 cdrom_mode_select +EXPORT_SYMBOL vmlinux 0x1bc34570 call_usermodehelper_setcleanup +EXPORT_SYMBOL vmlinux 0x1bc868df usb_gadget_register_driver +EXPORT_SYMBOL vmlinux 0x1bef8e1e blk_stop_queue +EXPORT_SYMBOL vmlinux 0x1c129afd find_get_pages_tag +EXPORT_SYMBOL vmlinux 0x1c324357 idr_replace +EXPORT_SYMBOL vmlinux 0x1c441935 request_key +EXPORT_SYMBOL vmlinux 0x1c7bf0d8 rfkill_set_sw_state +EXPORT_SYMBOL vmlinux 0x1c88bcc2 block_page_mkwrite +EXPORT_SYMBOL vmlinux 0x1c90fe81 block_sync_page +EXPORT_SYMBOL vmlinux 0x1caaaac9 napi_frags_finish +EXPORT_SYMBOL vmlinux 0x1cade54a __wait_on_buffer +EXPORT_SYMBOL vmlinux 0x1cc6719a register_reboot_notifier +EXPORT_SYMBOL vmlinux 0x1cda9782 netdev_bonding_change +EXPORT_SYMBOL vmlinux 0x1d027e4b snd_pcm_format_signed +EXPORT_SYMBOL vmlinux 0x1d0aaf41 scsi_kmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x1d2e87c6 do_gettimeofday +EXPORT_SYMBOL vmlinux 0x1d534fdf abort_creds +EXPORT_SYMBOL vmlinux 0x1d5510a8 journal_get_create_access +EXPORT_SYMBOL vmlinux 0x1d79bed3 bdget_disk +EXPORT_SYMBOL vmlinux 0x1d832ed6 serio_interrupt +EXPORT_SYMBOL vmlinux 0x1d854a45 invalidate_partition +EXPORT_SYMBOL vmlinux 0x1dac97ef tc_classify +EXPORT_SYMBOL vmlinux 0x1dc36131 fb_destroy_modedb +EXPORT_SYMBOL vmlinux 0x1dd571e6 fb_copy_cmap +EXPORT_SYMBOL vmlinux 0x1de77818 set_bdi_congested +EXPORT_SYMBOL vmlinux 0x1decba3b vfs_quota_sync +EXPORT_SYMBOL vmlinux 0x1df92d5d scsi_add_host_with_dma +EXPORT_SYMBOL vmlinux 0x1e097b03 pmic_adc_deinit +EXPORT_SYMBOL vmlinux 0x1e108a6a key_link +EXPORT_SYMBOL vmlinux 0x1e22b6b9 dev_change_flags +EXPORT_SYMBOL vmlinux 0x1e351d42 tcp_timewait_state_process +EXPORT_SYMBOL vmlinux 0x1e41661e __f_setown +EXPORT_SYMBOL vmlinux 0x1e49daa8 sg_init_one +EXPORT_SYMBOL vmlinux 0x1e6d26a8 strstr +EXPORT_SYMBOL vmlinux 0x1e795e01 sock_rfree +EXPORT_SYMBOL vmlinux 0x1eb1fc84 xfrm_alloc_spi +EXPORT_SYMBOL vmlinux 0x1ebc6c6c force_sig +EXPORT_SYMBOL vmlinux 0x1ec72cee __pagevec_release +EXPORT_SYMBOL vmlinux 0x1ecb9943 posix_acl_to_xattr +EXPORT_SYMBOL vmlinux 0x1edc9598 _atomic_dec_and_lock +EXPORT_SYMBOL vmlinux 0x1ee8fc8e eth_validate_addr +EXPORT_SYMBOL vmlinux 0x1efe283f __cap_full_set +EXPORT_SYMBOL vmlinux 0x1f244d05 seq_release_private +EXPORT_SYMBOL vmlinux 0x1f26f01a vfs_dq_quota_on_remount +EXPORT_SYMBOL vmlinux 0x1f348e55 journal_load +EXPORT_SYMBOL vmlinux 0x1f70d32d dma_cache_maint +EXPORT_SYMBOL vmlinux 0x1f7cc628 mempool_create +EXPORT_SYMBOL vmlinux 0x1fae7a0b wait_for_completion_timeout +EXPORT_SYMBOL vmlinux 0x1ff69dd8 vfs_fstatat +EXPORT_SYMBOL vmlinux 0x20000329 simple_strtoul +EXPORT_SYMBOL vmlinux 0x2036b803 tcp_setsockopt +EXPORT_SYMBOL vmlinux 0x206f32aa skb_clone +EXPORT_SYMBOL vmlinux 0x207275fe journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x2099a905 input_flush_device +EXPORT_SYMBOL vmlinux 0x20aac896 inetdev_by_index +EXPORT_SYMBOL vmlinux 0x20b46d0f mb_cache_entry_release +EXPORT_SYMBOL vmlinux 0x20b4ed28 ilookup5_nowait +EXPORT_SYMBOL vmlinux 0x20c1ea98 netpoll_send_udp +EXPORT_SYMBOL vmlinux 0x20c1f736 ipu_swap_channel +EXPORT_SYMBOL vmlinux 0x20c7a7a8 tcp_ioctl +EXPORT_SYMBOL vmlinux 0x20cf18a1 i2c_smbus_write_byte +EXPORT_SYMBOL vmlinux 0x20d043ea snd_pcm_limit_hw_rates +EXPORT_SYMBOL vmlinux 0x20d32d80 unregister_netdev +EXPORT_SYMBOL vmlinux 0x20f15195 qdisc_class_hash_grow +EXPORT_SYMBOL vmlinux 0x20f732f6 blk_queue_alignment_offset +EXPORT_SYMBOL vmlinux 0x20f9d267 __tracepoint_kmem_cache_free +EXPORT_SYMBOL vmlinux 0x20fcb695 tcf_em_tree_destroy +EXPORT_SYMBOL vmlinux 0x20fe982d qdisc_watchdog_cancel +EXPORT_SYMBOL vmlinux 0x210484fb alloc_netdev_mq +EXPORT_SYMBOL vmlinux 0x210bffbe gnet_stats_copy_rate_est +EXPORT_SYMBOL vmlinux 0x211331fa __divsi3 +EXPORT_SYMBOL vmlinux 0x21280105 snd_pcm_lib_preallocate_free_for_all +EXPORT_SYMBOL vmlinux 0x21288eff hci_get_route +EXPORT_SYMBOL vmlinux 0x213e6a0c elv_dispatch_add_tail +EXPORT_SYMBOL vmlinux 0x215ebd78 bitrev16 +EXPORT_SYMBOL vmlinux 0x21c3288d km_report +EXPORT_SYMBOL vmlinux 0x21cef221 input_grab_device +EXPORT_SYMBOL vmlinux 0x21d5e125 elv_abort_queue +EXPORT_SYMBOL vmlinux 0x222e7ce2 sysfs_streq +EXPORT_SYMBOL vmlinux 0x2246eb61 ip_xfrm_me_harder +EXPORT_SYMBOL vmlinux 0x226e86a9 audit_log +EXPORT_SYMBOL vmlinux 0x228045a4 i2c_smbus_write_block_data +EXPORT_SYMBOL vmlinux 0x2288378f system_state +EXPORT_SYMBOL vmlinux 0x22a73912 __tcp_put_md5sig_pool +EXPORT_SYMBOL vmlinux 0x22b325d5 kd_mksound +EXPORT_SYMBOL vmlinux 0x22b6533b xfrm_sad_getinfo +EXPORT_SYMBOL vmlinux 0x22f84840 directly_mappable_cdev_bdi +EXPORT_SYMBOL vmlinux 0x2309012f mod_timer +EXPORT_SYMBOL vmlinux 0x231cf494 up_write +EXPORT_SYMBOL vmlinux 0x23269a13 strict_strtoul +EXPORT_SYMBOL vmlinux 0x2326a5c0 sah_Alloc_Descriptor +EXPORT_SYMBOL vmlinux 0x232f6d16 init_file +EXPORT_SYMBOL vmlinux 0x2347d0d2 fsl_shw_get_results +EXPORT_SYMBOL vmlinux 0x23518914 ip_route_output_key +EXPORT_SYMBOL vmlinux 0x2364df00 xfrm_bundle_ok +EXPORT_SYMBOL vmlinux 0x236e9b9b blk_unplug +EXPORT_SYMBOL vmlinux 0x2374eee5 mxc_mmc_force_detect +EXPORT_SYMBOL vmlinux 0x23793632 snd_mixer_oss_notify_callback +EXPORT_SYMBOL vmlinux 0x23838107 __down_write +EXPORT_SYMBOL vmlinux 0x239727c1 kobject_init +EXPORT_SYMBOL vmlinux 0x23a23af1 __set_page_dirty_nobuffers +EXPORT_SYMBOL vmlinux 0x23aa9863 vfs_quota_disable +EXPORT_SYMBOL vmlinux 0x23c8f257 slhc_uncompress +EXPORT_SYMBOL vmlinux 0x23d4b257 sock_get_timestamp +EXPORT_SYMBOL vmlinux 0x23e0c0f8 blk_queue_stack_limits +EXPORT_SYMBOL vmlinux 0x23e42b28 otg_set_serial_host +EXPORT_SYMBOL vmlinux 0x23fd3028 vmalloc_node +EXPORT_SYMBOL vmlinux 0x2437de89 phy_scan_fixups +EXPORT_SYMBOL vmlinux 0x244c312d rtnl_unicast +EXPORT_SYMBOL vmlinux 0x2455c156 __clear_user +EXPORT_SYMBOL vmlinux 0x2459bbcc console_set_on_cmdline +EXPORT_SYMBOL vmlinux 0x24624544 ftrace_print_flags_seq +EXPORT_SYMBOL vmlinux 0x2497883f lease_get_mtime +EXPORT_SYMBOL vmlinux 0x2498ae97 ipu_disp_set_color_key +EXPORT_SYMBOL vmlinux 0x24a2b0a4 dentry_open +EXPORT_SYMBOL vmlinux 0x24a94b26 snd_info_get_line +EXPORT_SYMBOL vmlinux 0x24b39883 add_disk +EXPORT_SYMBOL vmlinux 0x24b758ef tty_throttle +EXPORT_SYMBOL vmlinux 0x24e43384 qdisc_watchdog_schedule +EXPORT_SYMBOL vmlinux 0x24fdac79 wake_bit_function +EXPORT_SYMBOL vmlinux 0x250113b4 memory_read_from_buffer +EXPORT_SYMBOL vmlinux 0x25144a54 blk_queue_find_tag +EXPORT_SYMBOL vmlinux 0x251930a5 pagevec_lookup_tag +EXPORT_SYMBOL vmlinux 0x252ab695 blk_queue_max_segment_size +EXPORT_SYMBOL vmlinux 0x256badce remove_inode_hash +EXPORT_SYMBOL vmlinux 0x25768deb fb_validate_mode +EXPORT_SYMBOL vmlinux 0x25820c64 fs_overflowuid +EXPORT_SYMBOL vmlinux 0x258355b4 fb_find_best_mode +EXPORT_SYMBOL vmlinux 0x2585635f lro_receive_skb +EXPORT_SYMBOL vmlinux 0x2588a1e6 fb_show_logo +EXPORT_SYMBOL vmlinux 0x25ba121c mempool_resize +EXPORT_SYMBOL vmlinux 0x25be2b3b napi_complete +EXPORT_SYMBOL vmlinux 0x25fa6f17 wait_for_completion +EXPORT_SYMBOL vmlinux 0x261c1766 __backtrace +EXPORT_SYMBOL vmlinux 0x262484f8 mii_check_media +EXPORT_SYMBOL vmlinux 0x26454e58 tty_driver_flush_buffer +EXPORT_SYMBOL vmlinux 0x26477c07 __vmalloc +EXPORT_SYMBOL vmlinux 0x26508b93 hci_send_sco +EXPORT_SYMBOL vmlinux 0x267fc65b __tasklet_hi_schedule +EXPORT_SYMBOL vmlinux 0x2691679c follow_up +EXPORT_SYMBOL vmlinux 0x26e76fb8 sysctl_udp_wmem_min +EXPORT_SYMBOL vmlinux 0x26f40f63 vm_insert_mixed +EXPORT_SYMBOL vmlinux 0x27170e34 tcf_exts_change +EXPORT_SYMBOL vmlinux 0x272e7488 cond_resched_softirq +EXPORT_SYMBOL vmlinux 0x27310d5a deactivate_locked_super +EXPORT_SYMBOL vmlinux 0x2748b8ea send_sig_info +EXPORT_SYMBOL vmlinux 0x2765b034 neigh_seq_stop +EXPORT_SYMBOL vmlinux 0x2785aee5 journal_start_commit +EXPORT_SYMBOL vmlinux 0x27864d57 memparse +EXPORT_SYMBOL vmlinux 0x27a78df7 i2c_register_driver +EXPORT_SYMBOL vmlinux 0x27b804ca security_inode_init_security +EXPORT_SYMBOL vmlinux 0x27bbf221 disable_irq_nosync +EXPORT_SYMBOL vmlinux 0x27c61ece qdisc_put_stab +EXPORT_SYMBOL vmlinux 0x27e0f6b6 invalidate_mapping_pages +EXPORT_SYMBOL vmlinux 0x27e21f2a __scsi_alloc_queue +EXPORT_SYMBOL vmlinux 0x27e5f311 sock_setsockopt +EXPORT_SYMBOL vmlinux 0x27ea0849 generic_shutdown_super +EXPORT_SYMBOL vmlinux 0x27eabbc1 bio_split +EXPORT_SYMBOL vmlinux 0x28118cb6 __get_user_1 +EXPORT_SYMBOL vmlinux 0x281c547a scsi_remove_host +EXPORT_SYMBOL vmlinux 0x282df17f task_tgid_nr_ns +EXPORT_SYMBOL vmlinux 0x28562978 skb_dma_unmap +EXPORT_SYMBOL vmlinux 0x285ac517 strict_strtoll +EXPORT_SYMBOL vmlinux 0x28806cb8 fsl_shw_get_random +EXPORT_SYMBOL vmlinux 0x2898ebc8 ipu_enable_irq +EXPORT_SYMBOL vmlinux 0x28a2ed02 scsi_build_sense_buffer +EXPORT_SYMBOL vmlinux 0x28b8da2d skb_store_bits +EXPORT_SYMBOL vmlinux 0x28bb1eb5 sah_DePhysicalise_Descriptors +EXPORT_SYMBOL vmlinux 0x28f916fe simple_write_begin +EXPORT_SYMBOL vmlinux 0x28fab3a0 vmalloc_to_page +EXPORT_SYMBOL vmlinux 0x292a67fa init_buffer +EXPORT_SYMBOL vmlinux 0x2938de1b zero_fill_bio +EXPORT_SYMBOL vmlinux 0x29537c9e alloc_chrdev_region +EXPORT_SYMBOL vmlinux 0x2955bc48 serio_unregister_child_port +EXPORT_SYMBOL vmlinux 0x2971f9f4 vcc_insert_socket +EXPORT_SYMBOL vmlinux 0x2993c783 scsi_free_command +EXPORT_SYMBOL vmlinux 0x29a1c9a5 ipu_reset +EXPORT_SYMBOL vmlinux 0x29aeedf9 fsl_shw_auth_decrypt +EXPORT_SYMBOL vmlinux 0x29bd4c46 __cap_init_eff_set +EXPORT_SYMBOL vmlinux 0x29c68153 write_cache_pages +EXPORT_SYMBOL vmlinux 0x2a27c9f6 blk_queue_end_tag +EXPORT_SYMBOL vmlinux 0x2a587e55 uart_register_driver +EXPORT_SYMBOL vmlinux 0x2a6f0335 mxc_sdma_write_ipcv2 +EXPORT_SYMBOL vmlinux 0x2a91c061 security_path_mknod +EXPORT_SYMBOL vmlinux 0x2aa0e4fc strncasecmp +EXPORT_SYMBOL vmlinux 0x2aaa3898 phy_connect_direct +EXPORT_SYMBOL vmlinux 0x2af99174 ip6_xmit +EXPORT_SYMBOL vmlinux 0x2b0ba2b0 scsi_sense_desc_find +EXPORT_SYMBOL vmlinux 0x2b20a0b4 revalidate_disk +EXPORT_SYMBOL vmlinux 0x2b3f4f97 eth_header_cache +EXPORT_SYMBOL vmlinux 0x2b40baff __down_write_nested +EXPORT_SYMBOL vmlinux 0x2b570dc0 ida_pre_get +EXPORT_SYMBOL vmlinux 0x2ba707a8 sysctl_tcp_low_latency +EXPORT_SYMBOL vmlinux 0x2bc55b91 gpio_fec_inactive +EXPORT_SYMBOL vmlinux 0x2bef1bcf ip_cmsg_recv +EXPORT_SYMBOL vmlinux 0x2c149cff rfkill_blocked +EXPORT_SYMBOL vmlinux 0x2c275892 simple_readpage +EXPORT_SYMBOL vmlinux 0x2c295799 kernel_recvmsg +EXPORT_SYMBOL vmlinux 0x2c42a287 dm_io_client_create +EXPORT_SYMBOL vmlinux 0x2c5fe9bb fb_pan_display +EXPORT_SYMBOL vmlinux 0x2c6c1acb d_prune_aliases +EXPORT_SYMBOL vmlinux 0x2c9219bf sysctl_string +EXPORT_SYMBOL vmlinux 0x2cb4ddf7 snd_card_file_add +EXPORT_SYMBOL vmlinux 0x2cc2d52d vcc_hash +EXPORT_SYMBOL vmlinux 0x2d18dc21 wait_for_key_construction +EXPORT_SYMBOL vmlinux 0x2d1e071a dma_pool_alloc +EXPORT_SYMBOL vmlinux 0x2d2fe104 user_revoke +EXPORT_SYMBOL vmlinux 0x2d6507b5 _find_next_zero_bit_le +EXPORT_SYMBOL vmlinux 0x2d666cce __xfrm_lookup +EXPORT_SYMBOL vmlinux 0x2d89342a scsi_show_sense_hdr +EXPORT_SYMBOL vmlinux 0x2d9a8866 scsi_unregister +EXPORT_SYMBOL vmlinux 0x2dbd4f42 tcp_connect +EXPORT_SYMBOL vmlinux 0x2dc101bd open_by_devnum +EXPORT_SYMBOL vmlinux 0x2dcb0123 schedule_delayed_work_on +EXPORT_SYMBOL vmlinux 0x2dd62d20 cdrom_mode_sense +EXPORT_SYMBOL vmlinux 0x2dd8b96f snd_timer_open +EXPORT_SYMBOL vmlinux 0x2dfa9905 __mxc_ioremap +EXPORT_SYMBOL vmlinux 0x2dfacf47 xfrm_state_walk +EXPORT_SYMBOL vmlinux 0x2e2ce9e0 sysctl_tcp_syncookies +EXPORT_SYMBOL vmlinux 0x2e367d6d tcp_proc_register +EXPORT_SYMBOL vmlinux 0x2e39f48e kobject_add +EXPORT_SYMBOL vmlinux 0x2e4a39f8 sysctl_udp_mem +EXPORT_SYMBOL vmlinux 0x2e7ce199 get_io_context +EXPORT_SYMBOL vmlinux 0x2ebc6612 neigh_table_clear +EXPORT_SYMBOL vmlinux 0x2ee41077 dm_register_target +EXPORT_SYMBOL vmlinux 0x2f07d729 tcp_shutdown +EXPORT_SYMBOL vmlinux 0x2f121db7 inet_dgram_connect +EXPORT_SYMBOL vmlinux 0x2f47a588 bio_init +EXPORT_SYMBOL vmlinux 0x2f4a688f free_netdev +EXPORT_SYMBOL vmlinux 0x2f56d213 backlight_device_register +EXPORT_SYMBOL vmlinux 0x2f89bb08 mmc_register_driver +EXPORT_SYMBOL vmlinux 0x2f92e5bf sb_has_dirty_inodes +EXPORT_SYMBOL vmlinux 0x2f9b52df devm_ioremap_nocache +EXPORT_SYMBOL vmlinux 0x2fb40695 udp_lib_getsockopt +EXPORT_SYMBOL vmlinux 0x2fbd82aa input_set_keycode +EXPORT_SYMBOL vmlinux 0x2fc1a6eb arp_xmit +EXPORT_SYMBOL vmlinux 0x2fd39307 ethtool_op_get_tso +EXPORT_SYMBOL vmlinux 0x2fe7d943 kmem_ptr_validate +EXPORT_SYMBOL vmlinux 0x30123eb5 icmpv6_statistics +EXPORT_SYMBOL vmlinux 0x303a36d2 scsi_execute_req +EXPORT_SYMBOL vmlinux 0x303a89ee blk_start_queue +EXPORT_SYMBOL vmlinux 0x308134ac security_sb_clone_mnt_opts +EXPORT_SYMBOL vmlinux 0x30813ced phy_connect +EXPORT_SYMBOL vmlinux 0x309f40f1 dmam_free_noncoherent +EXPORT_SYMBOL vmlinux 0x30c5d390 mdiobus_scan +EXPORT_SYMBOL vmlinux 0x30e34bd7 skb_copy_datagram_from_iovec +EXPORT_SYMBOL vmlinux 0x30e74134 tty_termios_copy_hw +EXPORT_SYMBOL vmlinux 0x30f50d56 nf_setsockopt +EXPORT_SYMBOL vmlinux 0x310917fe sort +EXPORT_SYMBOL vmlinux 0x311249f3 unmap_underlying_metadata +EXPORT_SYMBOL vmlinux 0x311ecbbc devm_ioremap +EXPORT_SYMBOL vmlinux 0x311f03c6 mc13892_bklit_get_ramp +EXPORT_SYMBOL vmlinux 0x313341a3 _set_bit_le +EXPORT_SYMBOL vmlinux 0x314580cb bt_sock_link +EXPORT_SYMBOL vmlinux 0x3147857d default_red +EXPORT_SYMBOL vmlinux 0x3151a6a1 pmic_get_version +EXPORT_SYMBOL vmlinux 0x3158cbb2 seq_open_private +EXPORT_SYMBOL vmlinux 0x3160fe10 __locks_copy_lock +EXPORT_SYMBOL vmlinux 0x31691ba8 neigh_parms_alloc +EXPORT_SYMBOL vmlinux 0x3169a903 bioset_create +EXPORT_SYMBOL vmlinux 0x31b31f5c csum_partial_copy_nocheck +EXPORT_SYMBOL vmlinux 0x31c7a15d xfrm_state_delete +EXPORT_SYMBOL vmlinux 0x31eb46b9 vcc_sklist_lock +EXPORT_SYMBOL vmlinux 0x320968dc vfs_quota_off +EXPORT_SYMBOL vmlinux 0x32113127 sk_common_release +EXPORT_SYMBOL vmlinux 0x3228b028 phy_device_free +EXPORT_SYMBOL vmlinux 0x32306b75 kill_fasync +EXPORT_SYMBOL vmlinux 0x323222ba mutex_unlock +EXPORT_SYMBOL vmlinux 0x326df9e1 vfs_stat +EXPORT_SYMBOL vmlinux 0x3285cc48 param_set_uint +EXPORT_SYMBOL vmlinux 0x328a05f1 strncpy +EXPORT_SYMBOL vmlinux 0x328c7eb4 d_add_ci +EXPORT_SYMBOL vmlinux 0x329c8f47 sock_sendmsg +EXPORT_SYMBOL vmlinux 0x32a44752 udp_prot +EXPORT_SYMBOL vmlinux 0x32b1efda input_free_device +EXPORT_SYMBOL vmlinux 0x32ce623a sg_last +EXPORT_SYMBOL vmlinux 0x3300086d __elv_add_request +EXPORT_SYMBOL vmlinux 0x333950b7 input_inject_event +EXPORT_SYMBOL vmlinux 0x333a0f9a vlan_ioctl_set +EXPORT_SYMBOL vmlinux 0x334c350c mpage_readpage +EXPORT_SYMBOL vmlinux 0x3367aa80 da903x_query_status +EXPORT_SYMBOL vmlinux 0x33819266 snd_pcm_hw_constraint_integer +EXPORT_SYMBOL vmlinux 0x339856e9 security_inode_readlink +EXPORT_SYMBOL vmlinux 0x339ab4f6 igrab +EXPORT_SYMBOL vmlinux 0x33c5fc2b map_destroy +EXPORT_SYMBOL vmlinux 0x34071326 cap_netlink_recv +EXPORT_SYMBOL vmlinux 0x3457cb68 param_set_long +EXPORT_SYMBOL vmlinux 0x34908c14 print_hex_dump_bytes +EXPORT_SYMBOL vmlinux 0x349103a2 km_new_mapping +EXPORT_SYMBOL vmlinux 0x349cba85 strchr +EXPORT_SYMBOL vmlinux 0x349d9df7 nf_register_queue_handler +EXPORT_SYMBOL vmlinux 0x34ae1692 xfrm4_prepare_output +EXPORT_SYMBOL vmlinux 0x34c153b6 inet_frags_init +EXPORT_SYMBOL vmlinux 0x34e2ae24 mxc_iomux_set_pad +EXPORT_SYMBOL vmlinux 0x34e3dc45 mb_cache_entry_alloc +EXPORT_SYMBOL vmlinux 0x34fb208a set_bh_page +EXPORT_SYMBOL vmlinux 0x34fb38d5 filp_close +EXPORT_SYMBOL vmlinux 0x351dba03 sync_page_range_nolock +EXPORT_SYMBOL vmlinux 0x353e3fa5 __get_user_4 +EXPORT_SYMBOL vmlinux 0x35698ca2 cdev_init +EXPORT_SYMBOL vmlinux 0x357281bb sock_kfree_s +EXPORT_SYMBOL vmlinux 0x3593ba5f clk_get_usecount +EXPORT_SYMBOL vmlinux 0x35c2ba9e refrigerator +EXPORT_SYMBOL vmlinux 0x35dedae8 request_firmware_nowait +EXPORT_SYMBOL vmlinux 0x35fa506d mc13892_bklit_get_blink_p +EXPORT_SYMBOL vmlinux 0x360420e5 dquot_drop +EXPORT_SYMBOL vmlinux 0x360b1afe probe_irq_mask +EXPORT_SYMBOL vmlinux 0x3610f10b neigh_seq_start +EXPORT_SYMBOL vmlinux 0x36429d09 devm_free_irq +EXPORT_SYMBOL vmlinux 0x364fb6a3 register_cdrom +EXPORT_SYMBOL vmlinux 0x365a8edf mdio_bus_type +EXPORT_SYMBOL vmlinux 0x3672b51e sk_stream_kill_queues +EXPORT_SYMBOL vmlinux 0x36794fd1 vfs_mknod +EXPORT_SYMBOL vmlinux 0x36b141ac gpio_nand_inactive +EXPORT_SYMBOL vmlinux 0x36e47222 remove_wait_queue +EXPORT_SYMBOL vmlinux 0x3704e622 fsl_shw_release_keystore +EXPORT_SYMBOL vmlinux 0x370dfd61 get_user_pages +EXPORT_SYMBOL vmlinux 0x3716678b scsi_setup_blk_pc_cmnd +EXPORT_SYMBOL vmlinux 0x37320f4a tty_register_ldisc +EXPORT_SYMBOL vmlinux 0x3744cf36 vmalloc_to_pfn +EXPORT_SYMBOL vmlinux 0x374cad53 inode_needs_sync +EXPORT_SYMBOL vmlinux 0x374de86c pid_task +EXPORT_SYMBOL vmlinux 0x374ed073 scnprintf +EXPORT_SYMBOL vmlinux 0x376f3427 splice_from_pipe_feed +EXPORT_SYMBOL vmlinux 0x377b9e86 ipu_free_irq +EXPORT_SYMBOL vmlinux 0x379627f0 mxc_free_dma +EXPORT_SYMBOL vmlinux 0x3796bdcc snd_pcm_format_little_endian +EXPORT_SYMBOL vmlinux 0x37af6a0a abort_exclusive_wait +EXPORT_SYMBOL vmlinux 0x37b2f8e5 __blk_run_queue +EXPORT_SYMBOL vmlinux 0x37befc70 jiffies_to_msecs +EXPORT_SYMBOL vmlinux 0x37c02e0e do_sync_read +EXPORT_SYMBOL vmlinux 0x37e74642 get_jiffies_64 +EXPORT_SYMBOL vmlinux 0x37f27b8d proc_mkdir +EXPORT_SYMBOL vmlinux 0x37f84f0d setup_arg_pages +EXPORT_SYMBOL vmlinux 0x37fb5ec4 ipv6_dev_get_saddr +EXPORT_SYMBOL vmlinux 0x38025de0 nand_do_write_ops +EXPORT_SYMBOL vmlinux 0x380afaeb slow_work_unregister_user +EXPORT_SYMBOL vmlinux 0x38123824 sock_create_lite +EXPORT_SYMBOL vmlinux 0x381b58c1 elv_rb_del +EXPORT_SYMBOL vmlinux 0x381c4bb1 cancel_delayed_work_sync +EXPORT_SYMBOL vmlinux 0x383e0864 tcp_v4_send_check +EXPORT_SYMBOL vmlinux 0x3851e76c simple_statfs +EXPORT_SYMBOL vmlinux 0x385430d8 clk_set_parent +EXPORT_SYMBOL vmlinux 0x3873eb72 vfs_getattr +EXPORT_SYMBOL vmlinux 0x388f9128 xfrm_state_walk_done +EXPORT_SYMBOL vmlinux 0x38975ab5 snd_timer_notify +EXPORT_SYMBOL vmlinux 0x389a3ce2 napi_skb_finish +EXPORT_SYMBOL vmlinux 0x38baa2ae arp_tbl +EXPORT_SYMBOL vmlinux 0x38e8378d pgprot_kernel +EXPORT_SYMBOL vmlinux 0x390ac3e3 qdisc_reset +EXPORT_SYMBOL vmlinux 0x39164cd4 submit_bio +EXPORT_SYMBOL vmlinux 0x394e3556 bio_integrity_add_page +EXPORT_SYMBOL vmlinux 0x395e287f snd_pcm_link_rwlock +EXPORT_SYMBOL vmlinux 0x3964673f scsi_get_host_dev +EXPORT_SYMBOL vmlinux 0x3971b4df snd_ecards_limit +EXPORT_SYMBOL vmlinux 0x397b481f set_security_override +EXPORT_SYMBOL vmlinux 0x3980aac1 unregister_reboot_notifier +EXPORT_SYMBOL vmlinux 0x39832ae8 journal_check_used_features +EXPORT_SYMBOL vmlinux 0x39ba7dff blk_fetch_request +EXPORT_SYMBOL vmlinux 0x39bf9301 _snd_pcm_hw_param_setempty +EXPORT_SYMBOL vmlinux 0x39cacb08 flock_lock_file_wait +EXPORT_SYMBOL vmlinux 0x39d66430 mc13892_bklit_get_current +EXPORT_SYMBOL vmlinux 0x39f4fe91 journal_stop +EXPORT_SYMBOL vmlinux 0x39fa0e98 kthread_stop +EXPORT_SYMBOL vmlinux 0x3a14a23d snd_ctl_boolean_stereo_info +EXPORT_SYMBOL vmlinux 0x3a2204c6 security_netlink_recv +EXPORT_SYMBOL vmlinux 0x3a2efc3a snd_device_new +EXPORT_SYMBOL vmlinux 0x3a2faceb xfrm6_prepare_output +EXPORT_SYMBOL vmlinux 0x3a567cb7 save_mount_options +EXPORT_SYMBOL vmlinux 0x3a6700d9 tty_insert_flip_string_flags +EXPORT_SYMBOL vmlinux 0x3a725f14 vfs_unlink +EXPORT_SYMBOL vmlinux 0x3a855a00 security_path_unlink +EXPORT_SYMBOL vmlinux 0x3a9b6fb9 blk_unregister_region +EXPORT_SYMBOL vmlinux 0x3aa1c767 netif_napi_add +EXPORT_SYMBOL vmlinux 0x3ab2d174 down_killable +EXPORT_SYMBOL vmlinux 0x3adc15b9 posix_acl_from_mode +EXPORT_SYMBOL vmlinux 0x3ae831b6 kref_init +EXPORT_SYMBOL vmlinux 0x3aeaff74 vfs_write +EXPORT_SYMBOL vmlinux 0x3b057159 inode_change_ok +EXPORT_SYMBOL vmlinux 0x3b17296c netdev_state_change +EXPORT_SYMBOL vmlinux 0x3b3016d3 cpufreq_unregister_notifier +EXPORT_SYMBOL vmlinux 0x3b622d0f bitmap_close_sync +EXPORT_SYMBOL vmlinux 0x3b67eb71 dev_set_allmulti +EXPORT_SYMBOL vmlinux 0x3b6e9de3 scsi_dma_unmap +EXPORT_SYMBOL vmlinux 0x3b82f50b sk_stream_wait_close +EXPORT_SYMBOL vmlinux 0x3b91f3af snd_free_pages +EXPORT_SYMBOL vmlinux 0x3ba271ea netlink_ack +EXPORT_SYMBOL vmlinux 0x3bb78130 set_current_groups +EXPORT_SYMBOL vmlinux 0x3bd1b1f6 msecs_to_jiffies +EXPORT_SYMBOL vmlinux 0x3bd3f34c ip_route_input +EXPORT_SYMBOL vmlinux 0x3c2c5af5 sprintf +EXPORT_SYMBOL vmlinux 0x3c356f1e atomic_dec_and_mutex_lock +EXPORT_SYMBOL vmlinux 0x3c3763e7 scsi_nonblockable_ioctl +EXPORT_SYMBOL vmlinux 0x3c6d1362 input_release_device +EXPORT_SYMBOL vmlinux 0x3c862fc9 scsi_report_device_reset +EXPORT_SYMBOL vmlinux 0x3c9d1211 string_get_size +EXPORT_SYMBOL vmlinux 0x3ca3f6c7 blk_queue_max_hw_segments +EXPORT_SYMBOL vmlinux 0x3ca458fe arp_send +EXPORT_SYMBOL vmlinux 0x3cc0a3bb xfrm_spd_getinfo +EXPORT_SYMBOL vmlinux 0x3cc98d9d insert_inode_locked4 +EXPORT_SYMBOL vmlinux 0x3cd66e4a set_security_override_from_ctx +EXPORT_SYMBOL vmlinux 0x3ce4ca6f disable_irq +EXPORT_SYMBOL vmlinux 0x3d3c540f elf_hwcap +EXPORT_SYMBOL vmlinux 0x3d51e530 iget_failed +EXPORT_SYMBOL vmlinux 0x3d68bd4b flow_cache_genid +EXPORT_SYMBOL vmlinux 0x3d6bdbcc skb_unlink +EXPORT_SYMBOL vmlinux 0x3d8101d8 put_page +EXPORT_SYMBOL vmlinux 0x3daa69da vfs_lstat +EXPORT_SYMBOL vmlinux 0x3db5e73c init_timer_deferrable_key +EXPORT_SYMBOL vmlinux 0x3dd1e2f3 clk_unregister +EXPORT_SYMBOL vmlinux 0x3dddb4ab jbd2_journal_wipe +EXPORT_SYMBOL vmlinux 0x3de5d380 key_alloc +EXPORT_SYMBOL vmlinux 0x3e383385 nf_hooks +EXPORT_SYMBOL vmlinux 0x3e45e9ff register_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x3e529473 scsi_scan_host +EXPORT_SYMBOL vmlinux 0x3e6caebd add_wait_queue_exclusive +EXPORT_SYMBOL vmlinux 0x3ea34173 kmem_cache_destroy +EXPORT_SYMBOL vmlinux 0x3ebee470 dquot_free_space +EXPORT_SYMBOL vmlinux 0x3ed63055 zlib_inflateReset +EXPORT_SYMBOL vmlinux 0x3edf1c16 mdiobus_alloc +EXPORT_SYMBOL vmlinux 0x3ef29c28 __pskb_pull_tail +EXPORT_SYMBOL vmlinux 0x3efa1484 sah_add_two_in_desc +EXPORT_SYMBOL vmlinux 0x3eff6173 lease_modify +EXPORT_SYMBOL vmlinux 0x3f4165bb register_sysctl_table +EXPORT_SYMBOL vmlinux 0x3f4547a7 put_unused_fd +EXPORT_SYMBOL vmlinux 0x3f5c7990 fsl_shw_hmac +EXPORT_SYMBOL vmlinux 0x3f5d2e85 put_tty_driver +EXPORT_SYMBOL vmlinux 0x3f907a43 dev_unicast_delete +EXPORT_SYMBOL vmlinux 0x3faeb1fd tty_port_init +EXPORT_SYMBOL vmlinux 0x3fb252e3 inet_dev_addr_type +EXPORT_SYMBOL vmlinux 0x3fc4bebe vfs_quota_enable +EXPORT_SYMBOL vmlinux 0x3ff62317 local_bh_disable +EXPORT_SYMBOL vmlinux 0x3ff6411c give_up_console +EXPORT_SYMBOL vmlinux 0x40123aeb idr_for_each +EXPORT_SYMBOL vmlinux 0x401963c4 bt_sock_ioctl +EXPORT_SYMBOL vmlinux 0x4034c4be proc_create_data +EXPORT_SYMBOL vmlinux 0x404aebad journal_force_commit +EXPORT_SYMBOL vmlinux 0x4059792f print_hex_dump +EXPORT_SYMBOL vmlinux 0x405c1144 get_seconds +EXPORT_SYMBOL vmlinux 0x407136b1 __put_user_8 +EXPORT_SYMBOL vmlinux 0x4073d3c9 cdrom_get_last_written +EXPORT_SYMBOL vmlinux 0x409873e3 tty_termios_baud_rate +EXPORT_SYMBOL vmlinux 0x40a27c37 scsi_dev_info_remove_list +EXPORT_SYMBOL vmlinux 0x40a6f522 __arm_ioremap +EXPORT_SYMBOL vmlinux 0x40b171d1 textsearch_destroy +EXPORT_SYMBOL vmlinux 0x40f07981 __ashldi3 +EXPORT_SYMBOL vmlinux 0x4101bbde param_set_copystring +EXPORT_SYMBOL vmlinux 0x4108e69a fb_match_mode +EXPORT_SYMBOL vmlinux 0x410ab0a0 simple_dir_inode_operations +EXPORT_SYMBOL vmlinux 0x41166725 inet_frags_init_net +EXPORT_SYMBOL vmlinux 0x412a9817 icmpv6_send +EXPORT_SYMBOL vmlinux 0x412ddc0c dcache_lock +EXPORT_SYMBOL vmlinux 0x41344088 param_get_charp +EXPORT_SYMBOL vmlinux 0x41482d8b strndup_user +EXPORT_SYMBOL vmlinux 0x416983d9 netdev_fix_features +EXPORT_SYMBOL vmlinux 0x4170174e xfrm_state_check_expire +EXPORT_SYMBOL vmlinux 0x4185cf4b radix_tree_lookup_slot +EXPORT_SYMBOL vmlinux 0x4188d439 neigh_rand_reach_time +EXPORT_SYMBOL vmlinux 0x418d9b0a __lock_page +EXPORT_SYMBOL vmlinux 0x4192dc19 hci_conn_check_link_mode +EXPORT_SYMBOL vmlinux 0x41e517d7 __getblk +EXPORT_SYMBOL vmlinux 0x41e6cc4b replace_mount_options +EXPORT_SYMBOL vmlinux 0x4211c3c1 zlib_inflateInit2 +EXPORT_SYMBOL vmlinux 0x4218a4d6 mpage_writepage +EXPORT_SYMBOL vmlinux 0x4220181e hci_free_dev +EXPORT_SYMBOL vmlinux 0x42224298 sscanf +EXPORT_SYMBOL vmlinux 0x422b2db3 tty_set_operations +EXPORT_SYMBOL vmlinux 0x425fb9bb ipu_reset_disp_panel +EXPORT_SYMBOL vmlinux 0x429d5814 cancel_dirty_page +EXPORT_SYMBOL vmlinux 0x429e6f21 phy_start_aneg +EXPORT_SYMBOL vmlinux 0x42fbde4f scsi_print_sense +EXPORT_SYMBOL vmlinux 0x430205aa __sg_alloc_table +EXPORT_SYMBOL vmlinux 0x4302d0eb free_pages +EXPORT_SYMBOL vmlinux 0x4333eadb param_set_short +EXPORT_SYMBOL vmlinux 0x43407b44 do_scc_decrypt_region +EXPORT_SYMBOL vmlinux 0x434fa55c release_console_sem +EXPORT_SYMBOL vmlinux 0x4357872f d_instantiate_unique +EXPORT_SYMBOL vmlinux 0x4371b598 get_phy_id +EXPORT_SYMBOL vmlinux 0x43ab66c3 param_array_get +EXPORT_SYMBOL vmlinux 0x43c98470 simple_dir_operations +EXPORT_SYMBOL vmlinux 0x43d6b353 bio_integrity_set_tag +EXPORT_SYMBOL vmlinux 0x43e30ca5 __put_cred +EXPORT_SYMBOL vmlinux 0x43f023a9 netdev_features_change +EXPORT_SYMBOL vmlinux 0x43f482a2 atm_init_aal5 +EXPORT_SYMBOL vmlinux 0x43f53ca9 snd_cards +EXPORT_SYMBOL vmlinux 0x43f6ea07 scsi_remove_target +EXPORT_SYMBOL vmlinux 0x440fdd3f read_cache_pages +EXPORT_SYMBOL vmlinux 0x44161c19 unregister_shrinker +EXPORT_SYMBOL vmlinux 0x44301cb3 phy_enable_interrupts +EXPORT_SYMBOL vmlinux 0x44314efb radix_tree_gang_lookup_tag_slot +EXPORT_SYMBOL vmlinux 0x444779c4 nla_find +EXPORT_SYMBOL vmlinux 0x44643b93 __aeabi_lmul +EXPORT_SYMBOL vmlinux 0x44771afb lock_rename +EXPORT_SYMBOL vmlinux 0x447ceeca proc_dointvec_userhz_jiffies +EXPORT_SYMBOL vmlinux 0x4499b1b7 gnet_stats_start_copy_compat +EXPORT_SYMBOL vmlinux 0x44b1f91a tty_unregister_driver +EXPORT_SYMBOL vmlinux 0x44b911c3 rb_replace_node +EXPORT_SYMBOL vmlinux 0x44c214d1 __wake_up_bit +EXPORT_SYMBOL vmlinux 0x44c9d94c kill_block_super +EXPORT_SYMBOL vmlinux 0x44da5d0f __csum_ipv6_magic +EXPORT_SYMBOL vmlinux 0x44e9a829 match_token +EXPORT_SYMBOL vmlinux 0x44efb718 scsi_register +EXPORT_SYMBOL vmlinux 0x45211832 fsl_shw_init_keystore_default +EXPORT_SYMBOL vmlinux 0x454f041a dev_get_by_flags +EXPORT_SYMBOL vmlinux 0x455453d1 jbd2_journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0x45545d43 del_gendisk +EXPORT_SYMBOL vmlinux 0x45568bc4 set_irq_chip +EXPORT_SYMBOL vmlinux 0x4575315d utf8s_to_utf16s +EXPORT_SYMBOL vmlinux 0x45947727 param_array_set +EXPORT_SYMBOL vmlinux 0x45a53a00 inet_stream_connect +EXPORT_SYMBOL vmlinux 0x45a55ec8 __iounmap +EXPORT_SYMBOL vmlinux 0x45bda0d5 system_serial_low +EXPORT_SYMBOL vmlinux 0x45e65a9c kmem_cache_free +EXPORT_SYMBOL vmlinux 0x45edf7df tcp_recvmsg +EXPORT_SYMBOL vmlinux 0x462a2e75 match_strlcpy +EXPORT_SYMBOL vmlinux 0x464a86d4 xfrm_input +EXPORT_SYMBOL vmlinux 0x464c7860 framebuffer_alloc +EXPORT_SYMBOL vmlinux 0x4661e311 __tracepoint_kmalloc +EXPORT_SYMBOL vmlinux 0x4683763e jbd2_journal_start +EXPORT_SYMBOL vmlinux 0x46a3f4ca snd_pcm_suspend_all +EXPORT_SYMBOL vmlinux 0x46a55f55 hci_send_acl +EXPORT_SYMBOL vmlinux 0x46d3b28c __div0 +EXPORT_SYMBOL vmlinux 0x46d66c1e set_user_nice +EXPORT_SYMBOL vmlinux 0x4719ba4e kfifo_free +EXPORT_SYMBOL vmlinux 0x472d2a9a radix_tree_lookup +EXPORT_SYMBOL vmlinux 0x475100c2 inet_get_local_port_range +EXPORT_SYMBOL vmlinux 0x479c4644 __dev_get_by_name +EXPORT_SYMBOL vmlinux 0x479c8446 ip_nat_decode_session +EXPORT_SYMBOL vmlinux 0x47cd3b2e hci_register_proto +EXPORT_SYMBOL vmlinux 0x47f757de elf_platform +EXPORT_SYMBOL vmlinux 0x482dd64d phy_ethtool_gset +EXPORT_SYMBOL vmlinux 0x483ba890 md_unregister_thread +EXPORT_SYMBOL vmlinux 0x4859b8bb rtc_year_days +EXPORT_SYMBOL vmlinux 0x486b6407 hweight64 +EXPORT_SYMBOL vmlinux 0x486d9e15 sock_tx_timestamp +EXPORT_SYMBOL vmlinux 0x48865bb7 call_usermodehelper_setup +EXPORT_SYMBOL vmlinux 0x48876f2f simple_set_mnt +EXPORT_SYMBOL vmlinux 0x48a5b067 __machine_arch_type +EXPORT_SYMBOL vmlinux 0x48c16de6 snd_pcm_lib_read +EXPORT_SYMBOL vmlinux 0x48c59316 textsearch_find_continuous +EXPORT_SYMBOL vmlinux 0x48ccccc8 jbd2_journal_get_create_access +EXPORT_SYMBOL vmlinux 0x48d10f33 __inet6_lookup_established +EXPORT_SYMBOL vmlinux 0x48d65df9 mmc_unregister_driver +EXPORT_SYMBOL vmlinux 0x48f9f12d complete_all +EXPORT_SYMBOL vmlinux 0x49086fc6 snd_pcm_sgbuf_ops_page +EXPORT_SYMBOL vmlinux 0x49603fb8 security_sb_copy_data +EXPORT_SYMBOL vmlinux 0x49926d10 ip_mc_rejoin_group +EXPORT_SYMBOL vmlinux 0x49b36b6e sock_no_sendpage +EXPORT_SYMBOL vmlinux 0x49b4b07b qdisc_tree_decrease_qlen +EXPORT_SYMBOL vmlinux 0x49cf247c ipu_update_channel_buffer +EXPORT_SYMBOL vmlinux 0x49e182c0 param_get_string +EXPORT_SYMBOL vmlinux 0x4a358252 __bitmap_subset +EXPORT_SYMBOL vmlinux 0x4a3ea5c0 snd_request_card +EXPORT_SYMBOL vmlinux 0x4a47c023 ethtool_op_set_ufo +EXPORT_SYMBOL vmlinux 0x4a52100f registered_fb +EXPORT_SYMBOL vmlinux 0x4a8ce60e snd_pcm_hw_constraint_step +EXPORT_SYMBOL vmlinux 0x4a971ec7 radix_tree_delete +EXPORT_SYMBOL vmlinux 0x4aab1c7a jbd2_journal_release_jbd_inode +EXPORT_SYMBOL vmlinux 0x4abdbbd4 snd_ctl_unregister_ioctl +EXPORT_SYMBOL vmlinux 0x4ac4cd14 nf_log_packet +EXPORT_SYMBOL vmlinux 0x4acfd8ad down_interruptible +EXPORT_SYMBOL vmlinux 0x4ada5527 input_get_keycode +EXPORT_SYMBOL vmlinux 0x4adffbf0 blk_queue_bounce +EXPORT_SYMBOL vmlinux 0x4aea4791 __strncpy_from_user +EXPORT_SYMBOL vmlinux 0x4af33e71 aio_complete +EXPORT_SYMBOL vmlinux 0x4af7a4ef gpio_owire_inactive +EXPORT_SYMBOL vmlinux 0x4afe9a77 scsi_partsize +EXPORT_SYMBOL vmlinux 0x4b26552b tcp_disconnect +EXPORT_SYMBOL vmlinux 0x4b34fbf5 block_all_signals +EXPORT_SYMBOL vmlinux 0x4b79975a save_time_delta +EXPORT_SYMBOL vmlinux 0x4b8edde9 complete_and_exit +EXPORT_SYMBOL vmlinux 0x4b9f3684 kfifo_init +EXPORT_SYMBOL vmlinux 0x4ba62d41 serio_open +EXPORT_SYMBOL vmlinux 0x4baeac38 snd_timer_global_free +EXPORT_SYMBOL vmlinux 0x4bbc3e5f pm_flags +EXPORT_SYMBOL vmlinux 0x4bd2693b fb_set_var +EXPORT_SYMBOL vmlinux 0x4bebd88f genl_register_family_with_ops +EXPORT_SYMBOL vmlinux 0x4bf0dbec scsi_print_result +EXPORT_SYMBOL vmlinux 0x4bfd22ce scsi_eh_prep_cmnd +EXPORT_SYMBOL vmlinux 0x4c1182cb bitmap_scnprintf +EXPORT_SYMBOL vmlinux 0x4c59ab16 filemap_fdatawrite +EXPORT_SYMBOL vmlinux 0x4c5c630a ipu_clear_irq +EXPORT_SYMBOL vmlinux 0x4c7f47ea tcp_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x4cb2997f neigh_event_ns +EXPORT_SYMBOL vmlinux 0x4cb51382 scc_set_sw_alarm +EXPORT_SYMBOL vmlinux 0x4cbbd171 __bitmap_weight +EXPORT_SYMBOL vmlinux 0x4cbe2fbd lock_fb_info +EXPORT_SYMBOL vmlinux 0x4cc18da1 bio_copy_kern +EXPORT_SYMBOL vmlinux 0x4d0d163d copy_page +EXPORT_SYMBOL vmlinux 0x4d315ce6 tty_get_baud_rate +EXPORT_SYMBOL vmlinux 0x4d3c153f sigprocmask +EXPORT_SYMBOL vmlinux 0x4d585db2 posix_unblock_lock +EXPORT_SYMBOL vmlinux 0x4d7350fe snd_ctl_rename_id +EXPORT_SYMBOL vmlinux 0x4d8afd8a sg_miter_stop +EXPORT_SYMBOL vmlinux 0x4d9b6d35 snd_pcm_format_size +EXPORT_SYMBOL vmlinux 0x4da5c71c per_cpu__kstat +EXPORT_SYMBOL vmlinux 0x4dc45be9 nf_log_unbind_pf +EXPORT_SYMBOL vmlinux 0x4dd23449 thaw_bdev +EXPORT_SYMBOL vmlinux 0x4dd34018 dev_addr_add_multiple +EXPORT_SYMBOL vmlinux 0x4dec6038 memscan +EXPORT_SYMBOL vmlinux 0x4df119fa __bitmap_parse +EXPORT_SYMBOL vmlinux 0x4e0009da idr_get_new_above +EXPORT_SYMBOL vmlinux 0x4e3567f7 match_int +EXPORT_SYMBOL vmlinux 0x4e48762f sock_wake_async +EXPORT_SYMBOL vmlinux 0x4e4e5a89 ppp_register_net_channel +EXPORT_SYMBOL vmlinux 0x4e532764 mmc_suspend_host +EXPORT_SYMBOL vmlinux 0x4e534a23 snd_pcm_hw_rule_add +EXPORT_SYMBOL vmlinux 0x4e5c7bc3 scsi_reset_provider +EXPORT_SYMBOL vmlinux 0x4e6aacc0 xfrm_policy_bysel_ctx +EXPORT_SYMBOL vmlinux 0x4e6e8ea7 fg_console +EXPORT_SYMBOL vmlinux 0x4e768dbe gnet_stats_start_copy +EXPORT_SYMBOL vmlinux 0x4e830a3e strnicmp +EXPORT_SYMBOL vmlinux 0x4ecef98b dev_addr_del_multiple +EXPORT_SYMBOL vmlinux 0x4ee4f9d7 seq_bitmap +EXPORT_SYMBOL vmlinux 0x4eea174a mxc_dma_callback_set +EXPORT_SYMBOL vmlinux 0x4f05d6a3 snd_timer_global_new +EXPORT_SYMBOL vmlinux 0x4f0ea0c0 up +EXPORT_SYMBOL vmlinux 0x4f20db9a d_move +EXPORT_SYMBOL vmlinux 0x4f476e96 init_cdrom_command +EXPORT_SYMBOL vmlinux 0x4f6c98c1 blk_stack_limits +EXPORT_SYMBOL vmlinux 0x4f6cba79 mb_cache_entry_free +EXPORT_SYMBOL vmlinux 0x4f816e9b snd_pcm_format_big_endian +EXPORT_SYMBOL vmlinux 0x4f8949d9 commit_creds +EXPORT_SYMBOL vmlinux 0x4fbaba21 kill_anon_super +EXPORT_SYMBOL vmlinux 0x4fbf5787 __fatal_signal_pending +EXPORT_SYMBOL vmlinux 0x4fc18ab7 generic_make_request +EXPORT_SYMBOL vmlinux 0x4fd174ab napi_gro_receive +EXPORT_SYMBOL vmlinux 0x4ff0d5f3 del_mtd_partitions +EXPORT_SYMBOL vmlinux 0x50211ee3 tcp_free_md5sig_pool +EXPORT_SYMBOL vmlinux 0x5030b993 misc_register +EXPORT_SYMBOL vmlinux 0x5036fc19 generic_cont_expand_simple +EXPORT_SYMBOL vmlinux 0x503e51ad genphy_suspend +EXPORT_SYMBOL vmlinux 0x5058be2d simple_unlink +EXPORT_SYMBOL vmlinux 0x506746b6 getrawmonotonic +EXPORT_SYMBOL vmlinux 0x506899d1 find_inode_number +EXPORT_SYMBOL vmlinux 0x50863a5b dev_alloc_skb +EXPORT_SYMBOL vmlinux 0x5093fa82 _clear_bit_le +EXPORT_SYMBOL vmlinux 0x50a0ce91 mmc_wait_for_app_cmd +EXPORT_SYMBOL vmlinux 0x50b21cf0 dma_sync_sg_for_cpu +EXPORT_SYMBOL vmlinux 0x50c3ddb5 __inet6_hash +EXPORT_SYMBOL vmlinux 0x50c45003 bio_integrity_get_tag +EXPORT_SYMBOL vmlinux 0x50d97423 kmem_cache_name +EXPORT_SYMBOL vmlinux 0x50eb5a1c bio_free +EXPORT_SYMBOL vmlinux 0x50ec822f gpio_ata_inactive +EXPORT_SYMBOL vmlinux 0x5107a5c4 seq_write +EXPORT_SYMBOL vmlinux 0x51120b06 nf_register_sockopt +EXPORT_SYMBOL vmlinux 0x5118c382 secure_dccp_sequence_number +EXPORT_SYMBOL vmlinux 0x512133a5 sock_init_data +EXPORT_SYMBOL vmlinux 0x51493d94 finish_wait +EXPORT_SYMBOL vmlinux 0x5188cc3a request_key_with_auxdata +EXPORT_SYMBOL vmlinux 0x51908eb8 __raw_writesl +EXPORT_SYMBOL vmlinux 0x51b837bf tcp_v4_destroy_sock +EXPORT_SYMBOL vmlinux 0x51be9f55 fsl_shw_hmac_precompute +EXPORT_SYMBOL vmlinux 0x51bee0e4 rtnl_notify +EXPORT_SYMBOL vmlinux 0x51c34b13 scc_engage_partition +EXPORT_SYMBOL vmlinux 0x51dce73b xfrm_state_walk_init +EXPORT_SYMBOL vmlinux 0x51ed8e0a skb_free_datagram +EXPORT_SYMBOL vmlinux 0x51ef33b8 kstrndup +EXPORT_SYMBOL vmlinux 0x52026cdf security_sb_parse_opts_str +EXPORT_SYMBOL vmlinux 0x520f7c83 hci_unregister_cb +EXPORT_SYMBOL vmlinux 0x5215eee0 __bforget +EXPORT_SYMBOL vmlinux 0x521d8d3a kblockd_schedule_work +EXPORT_SYMBOL vmlinux 0x5225843a mii_nway_restart +EXPORT_SYMBOL vmlinux 0x52354a0b mutex_trylock +EXPORT_SYMBOL vmlinux 0x5236a51b inet_csk_clear_xmit_timers +EXPORT_SYMBOL vmlinux 0x523b559a udp_disconnect +EXPORT_SYMBOL vmlinux 0x52516b78 usb_gadget_unregister_driver +EXPORT_SYMBOL vmlinux 0x52760ca9 getnstimeofday +EXPORT_SYMBOL vmlinux 0x528c709d simple_read_from_buffer +EXPORT_SYMBOL vmlinux 0x528fc362 generic_getxattr +EXPORT_SYMBOL vmlinux 0x52a58c24 ifla_policy +EXPORT_SYMBOL vmlinux 0x52ba022b xfrm_register_km +EXPORT_SYMBOL vmlinux 0x52cb821c add_timer +EXPORT_SYMBOL vmlinux 0x52e1a774 tcf_register_action +EXPORT_SYMBOL vmlinux 0x52e34467 vfs_follow_link +EXPORT_SYMBOL vmlinux 0x52e3e4a5 snd_pcm_hw_param_value +EXPORT_SYMBOL vmlinux 0x52e58c27 inet_csk_init_xmit_timers +EXPORT_SYMBOL vmlinux 0x52ebb126 param_get_ushort +EXPORT_SYMBOL vmlinux 0x530b1e98 pm_suspend +EXPORT_SYMBOL vmlinux 0x532af86b generic_file_llseek +EXPORT_SYMBOL vmlinux 0x532d3c2c phy_start +EXPORT_SYMBOL vmlinux 0x53326531 mempool_alloc_pages +EXPORT_SYMBOL vmlinux 0x533ec347 blk_queue_dma_alignment +EXPORT_SYMBOL vmlinux 0x534f070a tty_port_tty_set +EXPORT_SYMBOL vmlinux 0x53642bbb jbd2_journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x536d82f6 lro_receive_frags +EXPORT_SYMBOL vmlinux 0x538383c0 unregister_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0x5383a3b1 clk_get_parent +EXPORT_SYMBOL vmlinux 0x53840dad __tracepoint_kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0x538f3aea bdev_read_only +EXPORT_SYMBOL vmlinux 0x53a454e6 sah_add_key_out_desc +EXPORT_SYMBOL vmlinux 0x53c0767c sk_chk_filter +EXPORT_SYMBOL vmlinux 0x53c992cf scsi_report_bus_reset +EXPORT_SYMBOL vmlinux 0x53f7def3 simple_transaction_set +EXPORT_SYMBOL vmlinux 0x540835ae snd_ctl_find_id +EXPORT_SYMBOL vmlinux 0x54087805 rfkill_register +EXPORT_SYMBOL vmlinux 0x541d9e43 blk_insert_request +EXPORT_SYMBOL vmlinux 0x54290dc9 nla_validate +EXPORT_SYMBOL vmlinux 0x543501f1 boot_tvec_bases +EXPORT_SYMBOL vmlinux 0x5436e015 fb_firmware_edid +EXPORT_SYMBOL vmlinux 0x5444ffad sk_filter +EXPORT_SYMBOL vmlinux 0x544716f3 ipu_select_multi_vdi_buffer +EXPORT_SYMBOL vmlinux 0x547651b6 blk_init_queue +EXPORT_SYMBOL vmlinux 0x548107e6 inet6_bind +EXPORT_SYMBOL vmlinux 0x5497cc56 unregister_framebuffer +EXPORT_SYMBOL vmlinux 0x54b50032 clear_inode +EXPORT_SYMBOL vmlinux 0x54d42936 seq_printf +EXPORT_SYMBOL vmlinux 0x54e6fcdd net_enable_timestamp +EXPORT_SYMBOL vmlinux 0x54f866e0 textsearch_unregister +EXPORT_SYMBOL vmlinux 0x54f9a6ec setup_new_exec +EXPORT_SYMBOL vmlinux 0x552589a0 register_qdisc +EXPORT_SYMBOL vmlinux 0x5546ecaa __skb_warn_lro_forwarding +EXPORT_SYMBOL vmlinux 0x5547162c ipu_init_sync_panel +EXPORT_SYMBOL vmlinux 0x5553a870 loop_register_transfer +EXPORT_SYMBOL vmlinux 0x556e0e8d tty_driver_kref_put +EXPORT_SYMBOL vmlinux 0x5594be03 bitmap_remap +EXPORT_SYMBOL vmlinux 0x55a15e65 __destroy_inode +EXPORT_SYMBOL vmlinux 0x55ad1778 proc_symlink +EXPORT_SYMBOL vmlinux 0x55b4a859 jbd2_journal_begin_ordered_truncate +EXPORT_SYMBOL vmlinux 0x55bb8182 page_zero_new_buffers +EXPORT_SYMBOL vmlinux 0x55c4228e scsi_host_get +EXPORT_SYMBOL vmlinux 0x5600904f fb_get_color_depth +EXPORT_SYMBOL vmlinux 0x560128f0 cpu_sysdev_class +EXPORT_SYMBOL vmlinux 0x5602acff vfs_get_dqinfo +EXPORT_SYMBOL vmlinux 0x5603cf43 do_settimeofday +EXPORT_SYMBOL vmlinux 0x56120b6f xfrm_policy_insert +EXPORT_SYMBOL vmlinux 0x5614b010 xfrm_policy_walk_done +EXPORT_SYMBOL vmlinux 0x5635a60a vmalloc_user +EXPORT_SYMBOL vmlinux 0x5641605d ip_mc_join_group +EXPORT_SYMBOL vmlinux 0x564654e5 bio_alloc_bioset +EXPORT_SYMBOL vmlinux 0x565f4c68 skb_append_datato_frags +EXPORT_SYMBOL vmlinux 0x5661297b kern_path +EXPORT_SYMBOL vmlinux 0x567a516e scsi_is_sdev_device +EXPORT_SYMBOL vmlinux 0x568c5147 do_splice_from +EXPORT_SYMBOL vmlinux 0x56a1f888 inet6_add_protocol +EXPORT_SYMBOL vmlinux 0x56b1d3af netpoll_parse_options +EXPORT_SYMBOL vmlinux 0x56b65a03 security_path_mkdir +EXPORT_SYMBOL vmlinux 0x56b852f6 journal_revoke +EXPORT_SYMBOL vmlinux 0x56be9032 dma_alloc_writecombine +EXPORT_SYMBOL vmlinux 0x56c8799d scsi_kunmap_atomic_sg +EXPORT_SYMBOL vmlinux 0x56df5a59 mmc_regulator_set_ocr +EXPORT_SYMBOL vmlinux 0x56fc2015 generic_removexattr +EXPORT_SYMBOL vmlinux 0x57092fca ipv6_chk_addr +EXPORT_SYMBOL vmlinux 0x571aeabe simple_transaction_get +EXPORT_SYMBOL vmlinux 0x572e85d4 blk_lookup_devt +EXPORT_SYMBOL vmlinux 0x57326759 snd_dma_alloc_pages +EXPORT_SYMBOL vmlinux 0x57480b8f kick_iocb +EXPORT_SYMBOL vmlinux 0x575bcb99 slow_work_enqueue +EXPORT_SYMBOL vmlinux 0x5760d91f __xfrm_decode_session +EXPORT_SYMBOL vmlinux 0x57841991 snd_unregister_oss_device +EXPORT_SYMBOL vmlinux 0x578492f4 inet_select_addr +EXPORT_SYMBOL vmlinux 0x57a6504e vsnprintf +EXPORT_SYMBOL vmlinux 0x57b35a9c proc_doulongvec_ms_jiffies_minmax +EXPORT_SYMBOL vmlinux 0x57b57ebe jiffies_to_timespec +EXPORT_SYMBOL vmlinux 0x57bbafa3 blk_integrity_register +EXPORT_SYMBOL vmlinux 0x57db7242 mangle_path +EXPORT_SYMBOL vmlinux 0x57dd13de nf_reinject +EXPORT_SYMBOL vmlinux 0x57e7695d sah_Free_Link +EXPORT_SYMBOL vmlinux 0x57fb062a fb_get_buffer_offset +EXPORT_SYMBOL vmlinux 0x57fed6e3 generic_mii_ioctl +EXPORT_SYMBOL vmlinux 0x5838cb97 vfs_llseek +EXPORT_SYMBOL vmlinux 0x5838f6c9 rtc_valid_tm +EXPORT_SYMBOL vmlinux 0x5848cf88 block_truncate_page +EXPORT_SYMBOL vmlinux 0x5857e434 groups_free +EXPORT_SYMBOL vmlinux 0x5891cdf9 xfrm_policy_alloc +EXPORT_SYMBOL vmlinux 0x58943d4b phy_register_fixup +EXPORT_SYMBOL vmlinux 0x5896d4f5 journal_get_undo_access +EXPORT_SYMBOL vmlinux 0x589ab414 alloc_file +EXPORT_SYMBOL vmlinux 0x589ddad1 names_cachep +EXPORT_SYMBOL vmlinux 0x58b01986 bdi_set_max_ratio +EXPORT_SYMBOL vmlinux 0x58bad5e6 __tracepoint_kfree +EXPORT_SYMBOL vmlinux 0x58c4a58f default_unplug_io_fn +EXPORT_SYMBOL vmlinux 0x58e33a2b kernel_connect +EXPORT_SYMBOL vmlinux 0x58f99b90 ndisc_build_skb +EXPORT_SYMBOL vmlinux 0x59251cda register_gifconf +EXPORT_SYMBOL vmlinux 0x5934392b fb_register_client +EXPORT_SYMBOL vmlinux 0x59430594 __sk_dst_check +EXPORT_SYMBOL vmlinux 0x594bf15b ioport_map +EXPORT_SYMBOL vmlinux 0x594e1317 __modsi3 +EXPORT_SYMBOL vmlinux 0x594ff483 poll_initwait +EXPORT_SYMBOL vmlinux 0x596740e4 tcp_md5_hash_skb_data +EXPORT_SYMBOL vmlinux 0x596f3463 i2c_smbus_write_byte_data +EXPORT_SYMBOL vmlinux 0x59997524 dev_get_by_name +EXPORT_SYMBOL vmlinux 0x59d2f489 disk_stack_limits +EXPORT_SYMBOL vmlinux 0x59d696b6 register_module_notifier +EXPORT_SYMBOL vmlinux 0x59d8223a ioport_resource +EXPORT_SYMBOL vmlinux 0x59dbd29f scsi_device_set_state +EXPORT_SYMBOL vmlinux 0x59e5070d __do_div64 +EXPORT_SYMBOL vmlinux 0x59eb6826 scc_decrypt_region +EXPORT_SYMBOL vmlinux 0x59fd8f82 kernel_sendmsg +EXPORT_SYMBOL vmlinux 0x5a14b67a jbd2_journal_check_used_features +EXPORT_SYMBOL vmlinux 0x5a210f5e dquot_commit_info +EXPORT_SYMBOL vmlinux 0x5a22fe40 sock_no_socketpair +EXPORT_SYMBOL vmlinux 0x5a2da8d8 call_usermodehelper_stdinpipe +EXPORT_SYMBOL vmlinux 0x5a744b86 netlink_set_nonroot +EXPORT_SYMBOL vmlinux 0x5aae482b skb_copy_datagram_iovec +EXPORT_SYMBOL vmlinux 0x5aae57d8 simple_lookup +EXPORT_SYMBOL vmlinux 0x5ab53889 tcf_em_tree_validate +EXPORT_SYMBOL vmlinux 0x5abbe08b dm_table_get_mode +EXPORT_SYMBOL vmlinux 0x5ad98ee1 poll_schedule_timeout +EXPORT_SYMBOL vmlinux 0x5adaeacb phy_disconnect +EXPORT_SYMBOL vmlinux 0x5aed7988 km_state_notify +EXPORT_SYMBOL vmlinux 0x5b19634d div_s64_rem +EXPORT_SYMBOL vmlinux 0x5b4d8860 nf_register_hook +EXPORT_SYMBOL vmlinux 0x5b57b61b __free_pages +EXPORT_SYMBOL vmlinux 0x5b584cf6 alloc_buffer_head +EXPORT_SYMBOL vmlinux 0x5b882497 mod_timer_pinned +EXPORT_SYMBOL vmlinux 0x5b93edd7 blk_limits_io_min +EXPORT_SYMBOL vmlinux 0x5b97f372 submit_bh +EXPORT_SYMBOL vmlinux 0x5baa7c2d cfi_fixup +EXPORT_SYMBOL vmlinux 0x5bff1c25 blk_put_request +EXPORT_SYMBOL vmlinux 0x5c087064 mark_buffer_dirty_inode +EXPORT_SYMBOL vmlinux 0x5c18d72b gpio_usbotg_hs_active +EXPORT_SYMBOL vmlinux 0x5c46cd41 tcp_v4_md5_hash_skb +EXPORT_SYMBOL vmlinux 0x5c4d5f8d dmam_free_coherent +EXPORT_SYMBOL vmlinux 0x5c5a6efe i2c_smbus_xfer +EXPORT_SYMBOL vmlinux 0x5c64a7dd shrink_dcache_sb +EXPORT_SYMBOL vmlinux 0x5c673bc8 tty_mutex +EXPORT_SYMBOL vmlinux 0x5c7ff46d inet_listen +EXPORT_SYMBOL vmlinux 0x5c81d8ff __skb_checksum_complete_head +EXPORT_SYMBOL vmlinux 0x5c9284a0 processor_id +EXPORT_SYMBOL vmlinux 0x5c96876b update_region +EXPORT_SYMBOL vmlinux 0x5c990473 proc_dointvec_minmax +EXPORT_SYMBOL vmlinux 0x5cb848d2 do_system_keystore_slot_dealloc +EXPORT_SYMBOL vmlinux 0x5cbe7791 inet_proto_csum_replace4 +EXPORT_SYMBOL vmlinux 0x5cd8865e __serio_register_driver +EXPORT_SYMBOL vmlinux 0x5cf0f5f2 skb_abort_seq_read +EXPORT_SYMBOL vmlinux 0x5cf7d0f1 simple_transaction_release +EXPORT_SYMBOL vmlinux 0x5d12b3fc twl4030_i2c_write_u8 +EXPORT_SYMBOL vmlinux 0x5d39ea25 gpio_ata_active +EXPORT_SYMBOL vmlinux 0x5d40a2fa remove_arg_zero +EXPORT_SYMBOL vmlinux 0x5d86ab5c sock_common_recvmsg +EXPORT_SYMBOL vmlinux 0x5d9b388b snd_pcm_set_sync +EXPORT_SYMBOL vmlinux 0x5dbd67ae register_framebuffer +EXPORT_SYMBOL vmlinux 0x5de033c4 tcp_read_sock +EXPORT_SYMBOL vmlinux 0x5de672a2 elv_rq_merge_ok +EXPORT_SYMBOL vmlinux 0x5de72ecc __napi_schedule +EXPORT_SYMBOL vmlinux 0x5e470e4d devm_request_threaded_irq +EXPORT_SYMBOL vmlinux 0x5e5e5244 mxc_dma_config +EXPORT_SYMBOL vmlinux 0x5e7367e1 generic_fillattr +EXPORT_SYMBOL vmlinux 0x5e7906e8 kernel_accept +EXPORT_SYMBOL vmlinux 0x5e7f4920 snd_pcm_format_set_silence +EXPORT_SYMBOL vmlinux 0x5e8b2e76 fsl_shw_deregister_user +EXPORT_SYMBOL vmlinux 0x5e93741a udp_ioctl +EXPORT_SYMBOL vmlinux 0x5e95b1cd current_umask +EXPORT_SYMBOL vmlinux 0x5ea520c5 tcp_select_initial_window +EXPORT_SYMBOL vmlinux 0x5ebb56fb down_read +EXPORT_SYMBOL vmlinux 0x5ed040b0 pm_set_vt_switch +EXPORT_SYMBOL vmlinux 0x5edd0762 bin2bcd +EXPORT_SYMBOL vmlinux 0x5edfaaa7 netlink_dump_start +EXPORT_SYMBOL vmlinux 0x5ef22dbb nf_afinfo +EXPORT_SYMBOL vmlinux 0x5f2118a5 nand_scan_bbt +EXPORT_SYMBOL vmlinux 0x5f5c51d0 lro_flush_all +EXPORT_SYMBOL vmlinux 0x5f754e5a memset +EXPORT_SYMBOL vmlinux 0x5f7d7a91 set_device_ro +EXPORT_SYMBOL vmlinux 0x5f829e35 skb_under_panic +EXPORT_SYMBOL vmlinux 0x5f88c2dd blk_queue_max_sectors +EXPORT_SYMBOL vmlinux 0x5f9731df journal_set_features +EXPORT_SYMBOL vmlinux 0x5fcfe263 scsi_register_interface +EXPORT_SYMBOL vmlinux 0x5ff37e5f may_umount +EXPORT_SYMBOL vmlinux 0x5ff9d442 mdiobus_write +EXPORT_SYMBOL vmlinux 0x600683d3 do_unblank_screen +EXPORT_SYMBOL vmlinux 0x602c96f0 copy_to_user_fromio +EXPORT_SYMBOL vmlinux 0x602da679 rtnl_create_link +EXPORT_SYMBOL vmlinux 0x604d78cf dput +EXPORT_SYMBOL vmlinux 0x606f087c i2c_add_adapter +EXPORT_SYMBOL vmlinux 0x606f29b0 vfs_quota_on +EXPORT_SYMBOL vmlinux 0x606f64f2 __alloc_skb +EXPORT_SYMBOL vmlinux 0x60762d28 dma_release_declared_memory +EXPORT_SYMBOL vmlinux 0x608451fa simple_empty +EXPORT_SYMBOL vmlinux 0x609f1c7e synchronize_net +EXPORT_SYMBOL vmlinux 0x60a32ea9 pm_power_off +EXPORT_SYMBOL vmlinux 0x60a4efe2 ida_get_new +EXPORT_SYMBOL vmlinux 0x60a90b03 xfrm_policy_register_afinfo +EXPORT_SYMBOL vmlinux 0x60c7a315 skb_recv_datagram +EXPORT_SYMBOL vmlinux 0x60ca753a blk_plug_device_unlocked +EXPORT_SYMBOL vmlinux 0x60e01104 restore_time_delta +EXPORT_SYMBOL vmlinux 0x60e2fefe bio_map_user +EXPORT_SYMBOL vmlinux 0x60f3e6f5 proc_doulongvec_minmax +EXPORT_SYMBOL vmlinux 0x61121421 scsi_block_requests +EXPORT_SYMBOL vmlinux 0x61196c35 __mark_inode_dirty +EXPORT_SYMBOL vmlinux 0x611b2862 dcache_dir_close +EXPORT_SYMBOL vmlinux 0x612390ad netpoll_set_trap +EXPORT_SYMBOL vmlinux 0x612a4539 secpath_dup +EXPORT_SYMBOL vmlinux 0x612d9285 scm_detach_fds +EXPORT_SYMBOL vmlinux 0x61577ba5 find_get_page +EXPORT_SYMBOL vmlinux 0x615b4205 nla_reserve +EXPORT_SYMBOL vmlinux 0x618d8299 set_notify_swap_entry_free +EXPORT_SYMBOL vmlinux 0x61b7b126 simple_strtoull +EXPORT_SYMBOL vmlinux 0x61ca2027 __sk_mem_reclaim +EXPORT_SYMBOL vmlinux 0x61d3d91c sah_insert_skha_algorithm +EXPORT_SYMBOL vmlinux 0x6207d380 genl_unregister_ops +EXPORT_SYMBOL vmlinux 0x62147c35 __serio_register_port +EXPORT_SYMBOL vmlinux 0x621af6fb skb_kill_datagram +EXPORT_SYMBOL vmlinux 0x6225637e md5_transform +EXPORT_SYMBOL vmlinux 0x623851f3 udp_lib_get_port +EXPORT_SYMBOL vmlinux 0x623fa2df neigh_ifdown +EXPORT_SYMBOL vmlinux 0x6241f82c ps2_drain +EXPORT_SYMBOL vmlinux 0x62440990 bt_sock_wait_state +EXPORT_SYMBOL vmlinux 0x626f7b58 set_create_files_as +EXPORT_SYMBOL vmlinux 0x62737e1d sock_unregister +EXPORT_SYMBOL vmlinux 0x6282775f dm_kcopyd_client_destroy +EXPORT_SYMBOL vmlinux 0x62827bec security_secctx_to_secid +EXPORT_SYMBOL vmlinux 0x628e71ab snd_timer_close +EXPORT_SYMBOL vmlinux 0x629ff69c inet_frag_find +EXPORT_SYMBOL vmlinux 0x62a38f5e truncate_inode_pages_range +EXPORT_SYMBOL vmlinux 0x62b10da2 devm_ioport_map +EXPORT_SYMBOL vmlinux 0x62cc569e cpu_present_mask +EXPORT_SYMBOL vmlinux 0x62df3bab scsi_command_normalize_sense +EXPORT_SYMBOL vmlinux 0x63188e88 __scsi_device_lookup +EXPORT_SYMBOL vmlinux 0x633212d4 dquot_acquire +EXPORT_SYMBOL vmlinux 0x634625ea key_instantiate_and_link +EXPORT_SYMBOL vmlinux 0x6357a3d6 __tracepoint_kmalloc_node +EXPORT_SYMBOL vmlinux 0x635c2d91 blk_register_region +EXPORT_SYMBOL vmlinux 0x6374f86b pneigh_lookup +EXPORT_SYMBOL vmlinux 0x6389fa7d dm_dirty_log_type_register +EXPORT_SYMBOL vmlinux 0x638ba983 tcf_unregister_action +EXPORT_SYMBOL vmlinux 0x63953ceb fsl_shw_diminish_perms +EXPORT_SYMBOL vmlinux 0x63d84df7 bio_integrity_alloc +EXPORT_SYMBOL vmlinux 0x63e76af2 fsl_shw_gen_encrypt +EXPORT_SYMBOL vmlinux 0x63ecad53 register_netdevice_notifier +EXPORT_SYMBOL vmlinux 0x63efc536 radix_tree_prev_hole +EXPORT_SYMBOL vmlinux 0x63fd2b18 gnet_stats_copy_queue +EXPORT_SYMBOL vmlinux 0x6402f500 ps2_handle_response +EXPORT_SYMBOL vmlinux 0x6403e338 tcp_memory_pressure +EXPORT_SYMBOL vmlinux 0x640a7078 posix_acl_create_masq +EXPORT_SYMBOL vmlinux 0x64399bf9 dm_io +EXPORT_SYMBOL vmlinux 0x648db7a9 mark_buffer_dirty +EXPORT_SYMBOL vmlinux 0x649064a7 ip_defrag +EXPORT_SYMBOL vmlinux 0x64999478 congestion_wait +EXPORT_SYMBOL vmlinux 0x649d1d66 i2c_master_send +EXPORT_SYMBOL vmlinux 0x64ad3938 filemap_flush +EXPORT_SYMBOL vmlinux 0x64bdcf35 rfkill_set_states +EXPORT_SYMBOL vmlinux 0x650f641e alloc_etherdev_mq +EXPORT_SYMBOL vmlinux 0x650f8603 snd_pcm_format_silence_64 +EXPORT_SYMBOL vmlinux 0x651a4139 test_taint +EXPORT_SYMBOL vmlinux 0x652c922a sah_add_in_out_desc +EXPORT_SYMBOL vmlinux 0x65408378 zlib_inflate_blob +EXPORT_SYMBOL vmlinux 0x65414e67 dev_valid_name +EXPORT_SYMBOL vmlinux 0x65497657 locks_remove_posix +EXPORT_SYMBOL vmlinux 0x65c77adf unregister_binfmt +EXPORT_SYMBOL vmlinux 0x65cdc7bf dm_dirty_log_type_unregister +EXPORT_SYMBOL vmlinux 0x65e36238 skb_append +EXPORT_SYMBOL vmlinux 0x66016ec6 netlink_rcv_skb +EXPORT_SYMBOL vmlinux 0x660b37dc uart_get_divisor +EXPORT_SYMBOL vmlinux 0x6616b875 kernel_getsockopt +EXPORT_SYMBOL vmlinux 0x6623060a key_task_permission +EXPORT_SYMBOL vmlinux 0x662bbb6f block_invalidatepage +EXPORT_SYMBOL vmlinux 0x662f29a8 invalidate_inodes +EXPORT_SYMBOL vmlinux 0x66494877 mxc_iomux_set_input +EXPORT_SYMBOL vmlinux 0x665381cf __dst_free +EXPORT_SYMBOL vmlinux 0x667271b9 bitmap_end_sync +EXPORT_SYMBOL vmlinux 0x668da8d5 zlib_inflateIncomp +EXPORT_SYMBOL vmlinux 0x66cbc2d2 gpio_spi_active +EXPORT_SYMBOL vmlinux 0x66cc79c2 get_sb_ns +EXPORT_SYMBOL vmlinux 0x67053080 current_kernel_time +EXPORT_SYMBOL vmlinux 0x672f4ead nf_ct_attach +EXPORT_SYMBOL vmlinux 0x676fa7c2 mmc_wait_for_req +EXPORT_SYMBOL vmlinux 0x677209c2 bt_sock_unlink +EXPORT_SYMBOL vmlinux 0x6797adea eth_header_cache_update +EXPORT_SYMBOL vmlinux 0x67aba834 ipu_init_channel +EXPORT_SYMBOL vmlinux 0x67b27ec1 tty_std_termios +EXPORT_SYMBOL vmlinux 0x67be1d3d cpu_active_mask +EXPORT_SYMBOL vmlinux 0x67c1fd68 shrink_dcache_parent +EXPORT_SYMBOL vmlinux 0x67c2fa54 __copy_to_user +EXPORT_SYMBOL vmlinux 0x67f2cee5 udp_table +EXPORT_SYMBOL vmlinux 0x681b604f skb_checksum_help +EXPORT_SYMBOL vmlinux 0x682f045f __brelse +EXPORT_SYMBOL vmlinux 0x682f2fb5 vmap +EXPORT_SYMBOL vmlinux 0x68316f4a mxc_sdma_get_channel_params +EXPORT_SYMBOL vmlinux 0x685b0c84 ps2_handle_ack +EXPORT_SYMBOL vmlinux 0x6869613c scsi_device_put +EXPORT_SYMBOL vmlinux 0x686c1725 dquot_alloc +EXPORT_SYMBOL vmlinux 0x687ba1d5 mxc_dma_reset +EXPORT_SYMBOL vmlinux 0x6898a756 sg_init_table +EXPORT_SYMBOL vmlinux 0x6898c633 sock_wmalloc +EXPORT_SYMBOL vmlinux 0x689a05f7 fb_set_cmap +EXPORT_SYMBOL vmlinux 0x68a24153 snd_pcm_format_physical_width +EXPORT_SYMBOL vmlinux 0x68d0bb98 textsearch_prepare +EXPORT_SYMBOL vmlinux 0x68f53c1e tcf_exts_dump +EXPORT_SYMBOL vmlinux 0x68f5cfa0 dqput +EXPORT_SYMBOL vmlinux 0x69245077 pagecache_write_end +EXPORT_SYMBOL vmlinux 0x6952325c scsi_track_queue_full +EXPORT_SYMBOL vmlinux 0x6954d124 sdma_malloc +EXPORT_SYMBOL vmlinux 0x6962c91c xfrm6_find_1stfragopt +EXPORT_SYMBOL vmlinux 0x6971447a rtc_month_days +EXPORT_SYMBOL vmlinux 0x6980fe91 param_get_int +EXPORT_SYMBOL vmlinux 0x698ec71c __alloc_pages_nodemask +EXPORT_SYMBOL vmlinux 0x69927dff try_acquire_console_sem +EXPORT_SYMBOL vmlinux 0x69af2327 idr_init +EXPORT_SYMBOL vmlinux 0x69b65e61 ethtool_op_get_tx_csum +EXPORT_SYMBOL vmlinux 0x69c7ed3d register_sound_special_device +EXPORT_SYMBOL vmlinux 0x69c8c1d5 security_req_classify_flow +EXPORT_SYMBOL vmlinux 0x69d17a73 xfrm6_input_addr +EXPORT_SYMBOL vmlinux 0x69d38ed9 __scsi_print_sense +EXPORT_SYMBOL vmlinux 0x69d60429 sock_register +EXPORT_SYMBOL vmlinux 0x69e27c7a bitmap_copy_le +EXPORT_SYMBOL vmlinux 0x69f779a6 inet6_register_protosw +EXPORT_SYMBOL vmlinux 0x6a037cf1 mempool_kfree +EXPORT_SYMBOL vmlinux 0x6a2c4cb9 invalidate_bdev +EXPORT_SYMBOL vmlinux 0x6a47571d __set_personality +EXPORT_SYMBOL vmlinux 0x6a62f34d blkdev_issue_discard +EXPORT_SYMBOL vmlinux 0x6a743421 journal_force_commit_nested +EXPORT_SYMBOL vmlinux 0x6a877ab4 lookup_hash +EXPORT_SYMBOL vmlinux 0x6a87e730 ipu_calc_stripes_sizes +EXPORT_SYMBOL vmlinux 0x6ab1c590 fsl_shw_init_keystore +EXPORT_SYMBOL vmlinux 0x6ac45c28 __up_write +EXPORT_SYMBOL vmlinux 0x6ad065f4 param_set_charp +EXPORT_SYMBOL vmlinux 0x6ad1d013 tcp_getsockopt +EXPORT_SYMBOL vmlinux 0x6ad701ae __bio_clone +EXPORT_SYMBOL vmlinux 0x6ae1b566 snd_pcm_mmap_data +EXPORT_SYMBOL vmlinux 0x6aea2924 i2c_smbus_process_call +EXPORT_SYMBOL vmlinux 0x6af7d37f clk_get_rate +EXPORT_SYMBOL vmlinux 0x6b0ac740 mxc_dma_free +EXPORT_SYMBOL vmlinux 0x6b1b67d3 __bdevname +EXPORT_SYMBOL vmlinux 0x6b26d870 get_phy_device +EXPORT_SYMBOL vmlinux 0x6b2cce26 tcp_make_synack +EXPORT_SYMBOL vmlinux 0x6b2dc060 dump_stack +EXPORT_SYMBOL vmlinux 0x6b34e879 i2c_clients_command +EXPORT_SYMBOL vmlinux 0x6b5571c0 default_llseek +EXPORT_SYMBOL vmlinux 0x6b89c8a1 nlmsg_notify +EXPORT_SYMBOL vmlinux 0x6b9d7c79 dst_alloc +EXPORT_SYMBOL vmlinux 0x6bad3736 sock_no_setsockopt +EXPORT_SYMBOL vmlinux 0x6bc843dd vfs_set_dqblk +EXPORT_SYMBOL vmlinux 0x6bdcfd99 qdisc_class_hash_remove +EXPORT_SYMBOL vmlinux 0x6bebcbdd dentry_unhash +EXPORT_SYMBOL vmlinux 0x6bfa4bac snd_card_free +EXPORT_SYMBOL vmlinux 0x6bfd81e2 arp_broken_ops +EXPORT_SYMBOL vmlinux 0x6c1ce5ce strcspn +EXPORT_SYMBOL vmlinux 0x6c1dec1a bio_put +EXPORT_SYMBOL vmlinux 0x6c36a5c1 __mutex_init +EXPORT_SYMBOL vmlinux 0x6c61ce70 num_registered_fb +EXPORT_SYMBOL vmlinux 0x6c702af7 sysctl_udp_rmem_min +EXPORT_SYMBOL vmlinux 0x6c8bd25e is_bad_inode +EXPORT_SYMBOL vmlinux 0x6c930c20 tcf_hash_lookup +EXPORT_SYMBOL vmlinux 0x6c96192a blk_rq_unmap_user +EXPORT_SYMBOL vmlinux 0x6ca650f2 ppp_output_wakeup +EXPORT_SYMBOL vmlinux 0x6cbd517a nobh_writepage +EXPORT_SYMBOL vmlinux 0x6cbef833 invalidate_inode_buffers +EXPORT_SYMBOL vmlinux 0x6cdc5c6b nla_strlcpy +EXPORT_SYMBOL vmlinux 0x6ce36e7f find_or_create_page +EXPORT_SYMBOL vmlinux 0x6cef247f __strnlen_user +EXPORT_SYMBOL vmlinux 0x6d05b559 sah_get_results +EXPORT_SYMBOL vmlinux 0x6d27ef64 __bitmap_empty +EXPORT_SYMBOL vmlinux 0x6d288375 radix_tree_next_hole +EXPORT_SYMBOL vmlinux 0x6d294e43 clock_t_to_jiffies +EXPORT_SYMBOL vmlinux 0x6d32d51e blk_alloc_queue +EXPORT_SYMBOL vmlinux 0x6d340f64 tty_termios_input_baud_rate +EXPORT_SYMBOL vmlinux 0x6d514c9a blk_end_request_cur +EXPORT_SYMBOL vmlinux 0x6d653d8b blk_queue_io_opt +EXPORT_SYMBOL vmlinux 0x6d662533 _find_first_bit_le +EXPORT_SYMBOL vmlinux 0x6d6cbadc rb_last +EXPORT_SYMBOL vmlinux 0x6d778ff7 inet_frag_kill +EXPORT_SYMBOL vmlinux 0x6d9c4c54 audit_log_start +EXPORT_SYMBOL vmlinux 0x6da43cfe file_permission +EXPORT_SYMBOL vmlinux 0x6dc6a2fb sk_free +EXPORT_SYMBOL vmlinux 0x6de093e2 mxc_request_iomux +EXPORT_SYMBOL vmlinux 0x6def2db2 half_md4_transform +EXPORT_SYMBOL vmlinux 0x6e2d49a1 kmem_cache_create +EXPORT_SYMBOL vmlinux 0x6e36266a register_exec_domain +EXPORT_SYMBOL vmlinux 0x6e52c2c8 misc_deregister +EXPORT_SYMBOL vmlinux 0x6e69568b generic_write_checks +EXPORT_SYMBOL vmlinux 0x6e720ff2 rtnl_unlock +EXPORT_SYMBOL vmlinux 0x6e9dd606 __symbol_put +EXPORT_SYMBOL vmlinux 0x6eaf3f46 scsi_put_command +EXPORT_SYMBOL vmlinux 0x6ee0c75a tcf_em_register +EXPORT_SYMBOL vmlinux 0x6ef8fcd8 snd_pcm_format_linear +EXPORT_SYMBOL vmlinux 0x6efc1361 unregister_exec_domain +EXPORT_SYMBOL vmlinux 0x6efd1844 neigh_connected_output +EXPORT_SYMBOL vmlinux 0x6f1f4334 scsi_bios_ptable +EXPORT_SYMBOL vmlinux 0x6f303fe4 page_symlink_inode_operations +EXPORT_SYMBOL vmlinux 0x6f3330d5 get_super +EXPORT_SYMBOL vmlinux 0x6f561216 scsi_host_set_state +EXPORT_SYMBOL vmlinux 0x6f66c1c5 snd_dma_free_pages +EXPORT_SYMBOL vmlinux 0x6f879902 dma_unmap_sg +EXPORT_SYMBOL vmlinux 0x6f887225 scsi_remove_device +EXPORT_SYMBOL vmlinux 0x6fab193a dev_alloc_name +EXPORT_SYMBOL vmlinux 0x6fb65001 dm_get_mapinfo +EXPORT_SYMBOL vmlinux 0x6fbe7e56 security_path_link +EXPORT_SYMBOL vmlinux 0x6fdaca7a netif_napi_del +EXPORT_SYMBOL vmlinux 0x6fe2dc8f gpio_gps_access +EXPORT_SYMBOL vmlinux 0x6fe763fe i2c_get_adapter +EXPORT_SYMBOL vmlinux 0x6fecda47 sk_release_kernel +EXPORT_SYMBOL vmlinux 0x7003cedb override_creds +EXPORT_SYMBOL vmlinux 0x7006a6e3 scsi_get_device_flags_keyed +EXPORT_SYMBOL vmlinux 0x700ba66b sah_Create_Key_Link +EXPORT_SYMBOL vmlinux 0x701bad15 journal_flush +EXPORT_SYMBOL vmlinux 0x701d0ebd snprintf +EXPORT_SYMBOL vmlinux 0x704545bc get_sb_bdev +EXPORT_SYMBOL vmlinux 0x708a6b1e d_alloc_name +EXPORT_SYMBOL vmlinux 0x70902f09 follow_down +EXPORT_SYMBOL vmlinux 0x7094f8ae bt_err +EXPORT_SYMBOL vmlinux 0x70a1554e register_nls +EXPORT_SYMBOL vmlinux 0x70aac37b blk_run_queue +EXPORT_SYMBOL vmlinux 0x70adbbaf set_groups +EXPORT_SYMBOL vmlinux 0x70bc17d7 inode_wait +EXPORT_SYMBOL vmlinux 0x70c36d8b tcp_sendmsg +EXPORT_SYMBOL vmlinux 0x70ccff58 dev_driver_string +EXPORT_SYMBOL vmlinux 0x710c327c do_system_keystore_slot_read +EXPORT_SYMBOL vmlinux 0x711600e2 tcp_rcv_state_process +EXPORT_SYMBOL vmlinux 0x7129e5f8 hex_asc +EXPORT_SYMBOL vmlinux 0x7171121c overflowgid +EXPORT_SYMBOL vmlinux 0x7181a311 netdev_class_remove_file +EXPORT_SYMBOL vmlinux 0x71a50dbc register_blkdev +EXPORT_SYMBOL vmlinux 0x71b77a8d vfs_mkdir +EXPORT_SYMBOL vmlinux 0x71c7fbba rfkill_destroy +EXPORT_SYMBOL vmlinux 0x71c90087 memcmp +EXPORT_SYMBOL vmlinux 0x72081e4f block_prepare_write +EXPORT_SYMBOL vmlinux 0x7211c42a tcf_hash_search +EXPORT_SYMBOL vmlinux 0x72bb8e41 d_invalidate +EXPORT_SYMBOL vmlinux 0x72c3be87 param_set_byte +EXPORT_SYMBOL vmlinux 0x72d41631 dev_close +EXPORT_SYMBOL vmlinux 0x72d5af61 try_wait_for_completion +EXPORT_SYMBOL vmlinux 0x72e72b84 lro_vlan_hwaccel_receive_skb +EXPORT_SYMBOL vmlinux 0x72e99782 generic_file_open +EXPORT_SYMBOL vmlinux 0x72ea7b2d scsi_device_type +EXPORT_SYMBOL vmlinux 0x730ba01d dcache_readdir +EXPORT_SYMBOL vmlinux 0x734a31a8 input_set_capability +EXPORT_SYMBOL vmlinux 0x7362dd1e vfs_fstat +EXPORT_SYMBOL vmlinux 0x738d0aad xfrm_dst_ifdown +EXPORT_SYMBOL vmlinux 0x73bca232 init_net +EXPORT_SYMBOL vmlinux 0x73cec205 __neigh_event_send +EXPORT_SYMBOL vmlinux 0x73e20c1c strlcpy +EXPORT_SYMBOL vmlinux 0x73ff0847 page_put_link +EXPORT_SYMBOL vmlinux 0x743bd032 netlink_kernel_release +EXPORT_SYMBOL vmlinux 0x7447e9ff mxc_dma_setup_channel +EXPORT_SYMBOL vmlinux 0x744c0c68 param_get_byte +EXPORT_SYMBOL vmlinux 0x7466e635 iw_handler_get_thrspy +EXPORT_SYMBOL vmlinux 0x74717162 tty_hung_up_p +EXPORT_SYMBOL vmlinux 0x748327bc nf_ip6_checksum +EXPORT_SYMBOL vmlinux 0x7485e15e unregister_chrdev_region +EXPORT_SYMBOL vmlinux 0x748623e8 napi_gro_flush +EXPORT_SYMBOL vmlinux 0x748a6677 sah_Free_Descriptor +EXPORT_SYMBOL vmlinux 0x748e21e8 seq_open +EXPORT_SYMBOL vmlinux 0x74954462 timecounter_read +EXPORT_SYMBOL vmlinux 0x74e7decd nf_register_hooks +EXPORT_SYMBOL vmlinux 0x74f32c20 blk_queue_bounce_limit +EXPORT_SYMBOL vmlinux 0x74f710f5 snd_pcm_hw_constraint_ratdens +EXPORT_SYMBOL vmlinux 0x75329171 tcp_v4_md5_do_del +EXPORT_SYMBOL vmlinux 0x75484b50 skb_gro_reset_offset +EXPORT_SYMBOL vmlinux 0x7556c9b0 xfrm6_rcv +EXPORT_SYMBOL vmlinux 0x756ff1b8 kobject_get +EXPORT_SYMBOL vmlinux 0x757caa17 uart_resume_port +EXPORT_SYMBOL vmlinux 0x75b10680 call_usermodehelper_pipe +EXPORT_SYMBOL vmlinux 0x75dd71d5 ethtool_op_get_flags +EXPORT_SYMBOL vmlinux 0x75e5ed80 __xfrm_policy_check +EXPORT_SYMBOL vmlinux 0x75f809d7 call_usermodehelper_setkeys +EXPORT_SYMBOL vmlinux 0x75fee7fd __raw_writesb +EXPORT_SYMBOL vmlinux 0x7607a80f nobh_truncate_page +EXPORT_SYMBOL vmlinux 0x760a0f4f yield +EXPORT_SYMBOL vmlinux 0x760b437a unregister_inetaddr_notifier +EXPORT_SYMBOL vmlinux 0x76165984 console_start +EXPORT_SYMBOL vmlinux 0x764362dc mxc_dma_sg_config +EXPORT_SYMBOL vmlinux 0x7657b6d7 tcp_prot +EXPORT_SYMBOL vmlinux 0x7658d46d jbd2_journal_lock_updates +EXPORT_SYMBOL vmlinux 0x765f75fb pgprot_user +EXPORT_SYMBOL vmlinux 0x76aa1dae __nla_put +EXPORT_SYMBOL vmlinux 0x76bf656d __bitmap_shift_left +EXPORT_SYMBOL vmlinux 0x76cf47f6 __aeabi_llsl +EXPORT_SYMBOL vmlinux 0x76d3cd60 laptop_mode +EXPORT_SYMBOL vmlinux 0x76f30e2a sock_wfree +EXPORT_SYMBOL vmlinux 0x7715f60a tty_schedule_flip +EXPORT_SYMBOL vmlinux 0x772eaeed mmc_cleanup_queue +EXPORT_SYMBOL vmlinux 0x773db6a5 seq_lseek +EXPORT_SYMBOL vmlinux 0x773f30f7 generic_file_buffered_write +EXPORT_SYMBOL vmlinux 0x775952f0 clear_bdi_congested +EXPORT_SYMBOL vmlinux 0x775bae22 redraw_screen +EXPORT_SYMBOL vmlinux 0x776d9304 snd_pcm_sgbuf_get_chunk_size +EXPORT_SYMBOL vmlinux 0x776f2b85 framebuffer_release +EXPORT_SYMBOL vmlinux 0x77995eac dm_dirty_log_destroy +EXPORT_SYMBOL vmlinux 0x77a6f1aa ppp_input_error +EXPORT_SYMBOL vmlinux 0x77a9c101 fsl_shw_add_entropy +EXPORT_SYMBOL vmlinux 0x77aa7d74 snd_register_device_for_dev +EXPORT_SYMBOL vmlinux 0x77ecac9f zlib_inflateEnd +EXPORT_SYMBOL vmlinux 0x77fa5d1f ns_to_timespec +EXPORT_SYMBOL vmlinux 0x781460c7 inode_set_bytes +EXPORT_SYMBOL vmlinux 0x7885994b config_uartdma_event +EXPORT_SYMBOL vmlinux 0x788fe103 iomem_resource +EXPORT_SYMBOL vmlinux 0x7897f7a0 module_layout +EXPORT_SYMBOL vmlinux 0x78c84bcf inode_sub_bytes +EXPORT_SYMBOL vmlinux 0x78d04bd7 key_negate_and_link +EXPORT_SYMBOL vmlinux 0x78edd180 pmic_adc_convert +EXPORT_SYMBOL vmlinux 0x79262195 blk_peek_request +EXPORT_SYMBOL vmlinux 0x794487ee disable_hlt +EXPORT_SYMBOL vmlinux 0x79454f27 sdma_virt_to_phys +EXPORT_SYMBOL vmlinux 0x79600d4a wait_for_completion_killable +EXPORT_SYMBOL vmlinux 0x7969a08f dmam_release_declared_memory +EXPORT_SYMBOL vmlinux 0x796fc5ce scsi_get_sense_info_fld +EXPORT_SYMBOL vmlinux 0x79975854 tty_hangup +EXPORT_SYMBOL vmlinux 0x79978a63 scsi_print_command +EXPORT_SYMBOL vmlinux 0x79aa04a2 get_random_bytes +EXPORT_SYMBOL vmlinux 0x79ad224b tasklet_kill +EXPORT_SYMBOL vmlinux 0x79f86629 do_map_probe +EXPORT_SYMBOL vmlinux 0x7a1e4ba0 scsi_set_medium_removal +EXPORT_SYMBOL vmlinux 0x7a2a837d strict_strtol +EXPORT_SYMBOL vmlinux 0x7a4497db kzfree +EXPORT_SYMBOL vmlinux 0x7a6c1e3e sock_no_getsockopt +EXPORT_SYMBOL vmlinux 0x7a8a687a atm_dev_deregister +EXPORT_SYMBOL vmlinux 0x7a992dd9 blk_rq_map_sg +EXPORT_SYMBOL vmlinux 0x7aba249a wait_on_sync_kiocb +EXPORT_SYMBOL vmlinux 0x7aca3ef2 jbd2_journal_force_commit +EXPORT_SYMBOL vmlinux 0x7ad4e4f5 md_register_thread +EXPORT_SYMBOL vmlinux 0x7af63646 sync_dirty_buffer +EXPORT_SYMBOL vmlinux 0x7afb7fd6 generic_show_options +EXPORT_SYMBOL vmlinux 0x7afc9d8a unregister_sound_mixer +EXPORT_SYMBOL vmlinux 0x7b2425ac dma_alloc_from_coherent +EXPORT_SYMBOL vmlinux 0x7b57f32a ipu_disp_set_window_pos +EXPORT_SYMBOL vmlinux 0x7bde2d9a gpio_nand_active +EXPORT_SYMBOL vmlinux 0x7c32c60d vlan_gro_receive +EXPORT_SYMBOL vmlinux 0x7c330110 tty_write_room +EXPORT_SYMBOL vmlinux 0x7c46233a cpufreq_quick_get +EXPORT_SYMBOL vmlinux 0x7c4aa1b4 uart_match_port +EXPORT_SYMBOL vmlinux 0x7c60d66e getname +EXPORT_SYMBOL vmlinux 0x7c904ded unregister_module_notifier +EXPORT_SYMBOL vmlinux 0x7ca5feab dst_destroy +EXPORT_SYMBOL vmlinux 0x7cae4ad6 rfkill_unregister +EXPORT_SYMBOL vmlinux 0x7cba1bf5 blk_free_tags +EXPORT_SYMBOL vmlinux 0x7cbadcef simple_map_init +EXPORT_SYMBOL vmlinux 0x7cc035a7 __ucmpdi2 +EXPORT_SYMBOL vmlinux 0x7cc68b9d kset_unregister +EXPORT_SYMBOL vmlinux 0x7cdbe05e simple_getattr +EXPORT_SYMBOL vmlinux 0x7d099c67 gpio_fec_active +EXPORT_SYMBOL vmlinux 0x7d11c268 jiffies +EXPORT_SYMBOL vmlinux 0x7d17e7fb sock_no_sendmsg +EXPORT_SYMBOL vmlinux 0x7d532cfb __neigh_for_each_release +EXPORT_SYMBOL vmlinux 0x7d5bbb74 locks_copy_lock +EXPORT_SYMBOL vmlinux 0x7d93d648 install_exec_creds +EXPORT_SYMBOL vmlinux 0x7db584aa lock_may_read +EXPORT_SYMBOL vmlinux 0x7dceceac capable +EXPORT_SYMBOL vmlinux 0x7dfa27e5 xfrm_stateonly_find +EXPORT_SYMBOL vmlinux 0x7dfc45b5 hci_alloc_dev +EXPORT_SYMBOL vmlinux 0x7e08bb7a snd_pcm_lib_writev +EXPORT_SYMBOL vmlinux 0x7e0bd1f0 simple_rename +EXPORT_SYMBOL vmlinux 0x7e218d0a end_buffer_read_sync +EXPORT_SYMBOL vmlinux 0x7e5ab97a blk_cleanup_queue +EXPORT_SYMBOL vmlinux 0x7e6a56c2 lock_sock_nested +EXPORT_SYMBOL vmlinux 0x7e73f663 slow_work_register_user +EXPORT_SYMBOL vmlinux 0x7e77632e block_is_partially_uptodate +EXPORT_SYMBOL vmlinux 0x7e7acc15 rfkill_pause_polling +EXPORT_SYMBOL vmlinux 0x7e98dc5e snd_pcm_stop +EXPORT_SYMBOL vmlinux 0x7e9ebb05 kernel_thread +EXPORT_SYMBOL vmlinux 0x7ea1370f clk_get +EXPORT_SYMBOL vmlinux 0x7ecfcb8d splice_from_pipe_end +EXPORT_SYMBOL vmlinux 0x7ef4d2c2 napi_reuse_skb +EXPORT_SYMBOL vmlinux 0x7efebb82 sock_no_recvmsg +EXPORT_SYMBOL vmlinux 0x7f23e4e3 scsi_is_host_device +EXPORT_SYMBOL vmlinux 0x7f24de73 jiffies_to_usecs +EXPORT_SYMBOL vmlinux 0x7f63b31e _memcpy_toio +EXPORT_SYMBOL vmlinux 0x7f81abdb call_usermodehelper_freeinfo +EXPORT_SYMBOL vmlinux 0x7f8b250b bt_sock_register +EXPORT_SYMBOL vmlinux 0x7fb0cae4 cpufreq_get_policy +EXPORT_SYMBOL vmlinux 0x7fe2541b dev_mc_add +EXPORT_SYMBOL vmlinux 0x800e4ffa __muldi3 +EXPORT_SYMBOL vmlinux 0x80540efe dst_discard +EXPORT_SYMBOL vmlinux 0x805ac44f ll_rw_block +EXPORT_SYMBOL vmlinux 0x8063f83d radix_tree_gang_lookup +EXPORT_SYMBOL vmlinux 0x8072faad keyring_clear +EXPORT_SYMBOL vmlinux 0x8085c7b1 prepare_to_wait +EXPORT_SYMBOL vmlinux 0x8089a158 gnet_stats_copy_app +EXPORT_SYMBOL vmlinux 0x80962149 generic_file_splice_write +EXPORT_SYMBOL vmlinux 0x809f44f7 f_setown +EXPORT_SYMBOL vmlinux 0x80b75499 unregister_filesystem +EXPORT_SYMBOL vmlinux 0x80b94931 dma_pool_free +EXPORT_SYMBOL vmlinux 0x80ef4bc8 skb_trim +EXPORT_SYMBOL vmlinux 0x8109f506 tty_port_carrier_raised +EXPORT_SYMBOL vmlinux 0x810ea60a skb_copy_and_csum_datagram_iovec +EXPORT_SYMBOL vmlinux 0x814641ca blk_queue_max_hw_sectors +EXPORT_SYMBOL vmlinux 0x815b5dd4 match_octal +EXPORT_SYMBOL vmlinux 0x81799cee vscnprintf +EXPORT_SYMBOL vmlinux 0x817f7c82 tcp_v4_connect +EXPORT_SYMBOL vmlinux 0x81b85f45 tty_vhangup +EXPORT_SYMBOL vmlinux 0x81ee258c tcp_v4_conn_request +EXPORT_SYMBOL vmlinux 0x81f81318 mdiobus_unregister +EXPORT_SYMBOL vmlinux 0x820d225f print_mac +EXPORT_SYMBOL vmlinux 0x824087a1 __mxc_iounmap +EXPORT_SYMBOL vmlinux 0x8247f414 gpio_activate_audio_ports +EXPORT_SYMBOL vmlinux 0x8251bcc3 bitmap_release_region +EXPORT_SYMBOL vmlinux 0x8262f64b tcp_sockets_allocated +EXPORT_SYMBOL vmlinux 0x82692209 kref_set +EXPORT_SYMBOL vmlinux 0x828eaaaf elv_rb_add +EXPORT_SYMBOL vmlinux 0x82968327 atm_dev_register +EXPORT_SYMBOL vmlinux 0x82b80821 scsi_allocate_command +EXPORT_SYMBOL vmlinux 0x82db38b1 mtd_do_chip_probe +EXPORT_SYMBOL vmlinux 0x82dbe4ad remap_vmalloc_range +EXPORT_SYMBOL vmlinux 0x82e5a238 vm_get_page_prot +EXPORT_SYMBOL vmlinux 0x8320bea8 __umodsi3 +EXPORT_SYMBOL vmlinux 0x8326844f d_instantiate +EXPORT_SYMBOL vmlinux 0x836202b1 mc13892_bklit_set_blink_p +EXPORT_SYMBOL vmlinux 0x836bdb72 nand_flash_ids +EXPORT_SYMBOL vmlinux 0x83a476ce bitmap_scnlistprintf +EXPORT_SYMBOL vmlinux 0x83a689b5 inet_csk_destroy_sock +EXPORT_SYMBOL vmlinux 0x83cfda8f fsl_usb_xcvr_unregister +EXPORT_SYMBOL vmlinux 0x83dcb904 flush_old_exec +EXPORT_SYMBOL vmlinux 0x83dceee9 __lookup_one_len +EXPORT_SYMBOL vmlinux 0x83fa43e1 end_buffer_write_sync +EXPORT_SYMBOL vmlinux 0x8411f0a4 jbd2_journal_load +EXPORT_SYMBOL vmlinux 0x8424a0c0 tcp_v4_md5_lookup +EXPORT_SYMBOL vmlinux 0x842c5c5a md_done_sync +EXPORT_SYMBOL vmlinux 0x8491a29b xfrm_unregister_mode +EXPORT_SYMBOL vmlinux 0x8492b1b2 vfs_rmdir +EXPORT_SYMBOL vmlinux 0x84b183ae strncmp +EXPORT_SYMBOL vmlinux 0x84b58fa2 inet_accept +EXPORT_SYMBOL vmlinux 0x84e8306e journal_unlock_updates +EXPORT_SYMBOL vmlinux 0x84f7b073 tcf_action_dump_1 +EXPORT_SYMBOL vmlinux 0x84fed74d dm_exception_store_type_register +EXPORT_SYMBOL vmlinux 0x85014398 bio_integrity_prep +EXPORT_SYMBOL vmlinux 0x852c70b7 tcf_generic_walker +EXPORT_SYMBOL vmlinux 0x85670f1d rtnl_is_locked +EXPORT_SYMBOL vmlinux 0x8577a03d hw_event_send +EXPORT_SYMBOL vmlinux 0x85945b53 scsi_rescan_device +EXPORT_SYMBOL vmlinux 0x859c6dc7 request_threaded_irq +EXPORT_SYMBOL vmlinux 0x85a61a05 neigh_for_each +EXPORT_SYMBOL vmlinux 0x85aaae2d starget_for_each_device +EXPORT_SYMBOL vmlinux 0x85ac0411 neigh_resolve_output +EXPORT_SYMBOL vmlinux 0x85ac7f10 posix_acl_from_xattr +EXPORT_SYMBOL vmlinux 0x85df9b6c strsep +EXPORT_SYMBOL vmlinux 0x85e0cb8c kill_pid +EXPORT_SYMBOL vmlinux 0x85e7deb2 iov_iter_fault_in_readable +EXPORT_SYMBOL vmlinux 0x85e92616 gpio_i2c_active +EXPORT_SYMBOL vmlinux 0x85fc160d xfrm_unregister_km +EXPORT_SYMBOL vmlinux 0x86020efe snd_timer_interrupt +EXPORT_SYMBOL vmlinux 0x860947c3 eth_mac_addr +EXPORT_SYMBOL vmlinux 0x862e4781 dmam_alloc_coherent +EXPORT_SYMBOL vmlinux 0x8633777c generic_listxattr +EXPORT_SYMBOL vmlinux 0x86424901 sock_recvmsg +EXPORT_SYMBOL vmlinux 0x864c01e3 phy_detach +EXPORT_SYMBOL vmlinux 0x8664f62e cpufreq_update_policy +EXPORT_SYMBOL vmlinux 0x86763ee5 neigh_create +EXPORT_SYMBOL vmlinux 0x868acba5 get_options +EXPORT_SYMBOL vmlinux 0x8691c366 md_wakeup_thread +EXPORT_SYMBOL vmlinux 0x86d29516 pmic_event_unsubscribe +EXPORT_SYMBOL vmlinux 0x86e02523 inode_setattr +EXPORT_SYMBOL vmlinux 0x86fb9b05 bitmap_parse_user +EXPORT_SYMBOL vmlinux 0x87198f96 tcf_hash_new_index +EXPORT_SYMBOL vmlinux 0x871c0a7e fiemap_check_flags +EXPORT_SYMBOL vmlinux 0x873168c5 security_path_rmdir +EXPORT_SYMBOL vmlinux 0x87357e03 sah_add_two_out_desc +EXPORT_SYMBOL vmlinux 0x8742f3a8 module_put +EXPORT_SYMBOL vmlinux 0x87496797 page_follow_link_light +EXPORT_SYMBOL vmlinux 0x876a6581 sk_stream_write_space +EXPORT_SYMBOL vmlinux 0x8780dfaa filp_open +EXPORT_SYMBOL vmlinux 0x878ab3ce sysctl_tcp_adv_win_scale +EXPORT_SYMBOL vmlinux 0x87daccc7 gpio_i2c_hs_active +EXPORT_SYMBOL vmlinux 0x880eaa4e mdiobus_free +EXPORT_SYMBOL vmlinux 0x881039d0 zlib_inflate +EXPORT_SYMBOL vmlinux 0x885895ae fsync_bdev +EXPORT_SYMBOL vmlinux 0x887b7e09 skb_prepare_seq_read +EXPORT_SYMBOL vmlinux 0x88856c7a nf_unregister_sockopt +EXPORT_SYMBOL vmlinux 0x88bc2177 genphy_config_aneg +EXPORT_SYMBOL vmlinux 0x88de3246 jbd2_journal_restart +EXPORT_SYMBOL vmlinux 0x88f69f8c sk_reset_timer +EXPORT_SYMBOL vmlinux 0x890615c0 scc_release_partition +EXPORT_SYMBOL vmlinux 0x89195dc3 sonet_copy_stats +EXPORT_SYMBOL vmlinux 0x891b097d kill_litter_super +EXPORT_SYMBOL vmlinux 0x891e32b8 wait_for_completion_interruptible +EXPORT_SYMBOL vmlinux 0x8932fc74 sock_no_accept +EXPORT_SYMBOL vmlinux 0x896ac876 tcf_exts_dump_stats +EXPORT_SYMBOL vmlinux 0x897473df mktime +EXPORT_SYMBOL vmlinux 0x897e3760 ipv4_specific +EXPORT_SYMBOL vmlinux 0x89c0147e genl_sock +EXPORT_SYMBOL vmlinux 0x89d5538d fb_pad_aligned_buffer +EXPORT_SYMBOL vmlinux 0x89d66811 build_ehash_secret +EXPORT_SYMBOL vmlinux 0x89dbc490 xfrm_register_mode +EXPORT_SYMBOL vmlinux 0x89f679bf sound_class +EXPORT_SYMBOL vmlinux 0x8a119923 genphy_config_advert +EXPORT_SYMBOL vmlinux 0x8a1203a9 kref_get +EXPORT_SYMBOL vmlinux 0x8a373fd7 twl4030_i2c_write +EXPORT_SYMBOL vmlinux 0x8a4fa83b __aeabi_llsr +EXPORT_SYMBOL vmlinux 0x8a551845 bt_sock_recvmsg +EXPORT_SYMBOL vmlinux 0x8a612557 key_payload_reserve +EXPORT_SYMBOL vmlinux 0x8a71d89b blk_integrity_compare +EXPORT_SYMBOL vmlinux 0x8a7d1c31 high_memory +EXPORT_SYMBOL vmlinux 0x8a99a016 mempool_free_slab +EXPORT_SYMBOL vmlinux 0x8aa2bee9 blkdev_put +EXPORT_SYMBOL vmlinux 0x8aca4ea6 __sk_mem_schedule +EXPORT_SYMBOL vmlinux 0x8acc6de6 register_chrdev +EXPORT_SYMBOL vmlinux 0x8aee2049 qdisc_list_del +EXPORT_SYMBOL vmlinux 0x8b538938 do_system_keystore_slot_alloc +EXPORT_SYMBOL vmlinux 0x8b618d08 overflowuid +EXPORT_SYMBOL vmlinux 0x8b724159 fbcon_set_bitops +EXPORT_SYMBOL vmlinux 0x8b75d163 skb_seq_read +EXPORT_SYMBOL vmlinux 0x8b9a4149 ida_destroy +EXPORT_SYMBOL vmlinux 0x8bcd54bd skb_gso_segment +EXPORT_SYMBOL vmlinux 0x8bd16d91 have_submounts +EXPORT_SYMBOL vmlinux 0x8bd5b603 param_get_long +EXPORT_SYMBOL vmlinux 0x8c018e6c dev_kfree_skb_any +EXPORT_SYMBOL vmlinux 0x8c071d10 splice_from_pipe_next +EXPORT_SYMBOL vmlinux 0x8c28fa16 tcp_v4_syn_recv_sock +EXPORT_SYMBOL vmlinux 0x8c3ab9e0 __break_lease +EXPORT_SYMBOL vmlinux 0x8c7aa666 jbd2_journal_try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x8c7bc348 ida_remove +EXPORT_SYMBOL vmlinux 0x8c86ea70 dev_open +EXPORT_SYMBOL vmlinux 0x8c8f6478 snd_jack_set_parent +EXPORT_SYMBOL vmlinux 0x8cbba439 aio_put_req +EXPORT_SYMBOL vmlinux 0x8cbf081d inet_dgram_ops +EXPORT_SYMBOL vmlinux 0x8cc14f04 atm_charge +EXPORT_SYMBOL vmlinux 0x8ce11233 sdma_free +EXPORT_SYMBOL vmlinux 0x8ce53f98 neigh_sysctl_unregister +EXPORT_SYMBOL vmlinux 0x8ce90404 neigh_destroy +EXPORT_SYMBOL vmlinux 0x8ceddade inet_ioctl +EXPORT_SYMBOL vmlinux 0x8d182b59 dma_sync_sg_for_device +EXPORT_SYMBOL vmlinux 0x8d3894f2 _ctype +EXPORT_SYMBOL vmlinux 0x8d40e648 snd_card_disconnect +EXPORT_SYMBOL vmlinux 0x8d46a23d do_system_keystore_slot_load +EXPORT_SYMBOL vmlinux 0x8d551bef sysctl_tcp_rmem +EXPORT_SYMBOL vmlinux 0x8d5642fc wait_for_completion_interruptible_timeout +EXPORT_SYMBOL vmlinux 0x8d6baabf create_empty_buffers +EXPORT_SYMBOL vmlinux 0x8d6f81b4 __div64_32 +EXPORT_SYMBOL vmlinux 0x8d753424 gnet_stats_finish_copy +EXPORT_SYMBOL vmlinux 0x8d77392a __blk_end_request +EXPORT_SYMBOL vmlinux 0x8d78bcb7 blk_queue_softirq_done +EXPORT_SYMBOL vmlinux 0x8d96fa10 block_write_full_page +EXPORT_SYMBOL vmlinux 0x8dacca36 dquot_commit +EXPORT_SYMBOL vmlinux 0x8dcb5c27 idr_remove +EXPORT_SYMBOL vmlinux 0x8dd9cf59 fd_install +EXPORT_SYMBOL vmlinux 0x8de3f370 dmam_pool_destroy +EXPORT_SYMBOL vmlinux 0x8df3789f snd_oss_info_register +EXPORT_SYMBOL vmlinux 0x8e0b7743 ipv6_ext_hdr +EXPORT_SYMBOL vmlinux 0x8e3344f3 bio_integrity_enabled +EXPORT_SYMBOL vmlinux 0x8e3c9cc3 vprintk +EXPORT_SYMBOL vmlinux 0x8e5d78e3 inet_frags_exit_net +EXPORT_SYMBOL vmlinux 0x8e605299 bitmap_unplug +EXPORT_SYMBOL vmlinux 0x8e763ae1 send_remote_softirq +EXPORT_SYMBOL vmlinux 0x8e79cf98 snd_pcm_lib_write +EXPORT_SYMBOL vmlinux 0x8e8b0208 atm_proc_root +EXPORT_SYMBOL vmlinux 0x8ea45009 inet_csk_delete_keepalive_timer +EXPORT_SYMBOL vmlinux 0x8eb1adb5 tcp_sync_mss +EXPORT_SYMBOL vmlinux 0x8ed239cf bdi_register_dev +EXPORT_SYMBOL vmlinux 0x8ee69235 timeval_to_jiffies +EXPORT_SYMBOL vmlinux 0x8f07d8ca __wait_on_bit +EXPORT_SYMBOL vmlinux 0x8f17d40b vfs_path_lookup +EXPORT_SYMBOL vmlinux 0x8f48679a rb_prev +EXPORT_SYMBOL vmlinux 0x8f595b11 snd_major +EXPORT_SYMBOL vmlinux 0x8f69a242 __timecompare_update +EXPORT_SYMBOL vmlinux 0x8f6b3d01 sah_insert_skha_modulus +EXPORT_SYMBOL vmlinux 0x8f6b7950 set_irq_data +EXPORT_SYMBOL vmlinux 0x8f7eee1e hci_resume_dev +EXPORT_SYMBOL vmlinux 0x8f98e5a0 neigh_lookup +EXPORT_SYMBOL vmlinux 0x8f9b86b2 kfifo_alloc +EXPORT_SYMBOL vmlinux 0x8fb50dda snd_card_free_when_closed +EXPORT_SYMBOL vmlinux 0x8fb6ccdc ps2_command +EXPORT_SYMBOL vmlinux 0x8ff80726 per_cpu__softnet_data +EXPORT_SYMBOL vmlinux 0x8ffdb3b8 crc16 +EXPORT_SYMBOL vmlinux 0x8ffee319 netdev_set_master +EXPORT_SYMBOL vmlinux 0x9003480d __xfrm_route_forward +EXPORT_SYMBOL vmlinux 0x90035333 secure_tcpv6_sequence_number +EXPORT_SYMBOL vmlinux 0x9019a959 register_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0x90465fb5 I_BDEV +EXPORT_SYMBOL vmlinux 0x90485dac sock_common_getsockopt +EXPORT_SYMBOL vmlinux 0x90501d47 audit_log_end +EXPORT_SYMBOL vmlinux 0x905e6665 ___pskb_trim +EXPORT_SYMBOL vmlinux 0x907aef71 __kill_fasync +EXPORT_SYMBOL vmlinux 0x907d0c47 vmtruncate +EXPORT_SYMBOL vmlinux 0x907dc6c0 snd_pcm_lib_free_pages +EXPORT_SYMBOL vmlinux 0x90807aab make_bad_inode +EXPORT_SYMBOL vmlinux 0x90a21d96 netif_rx_ni +EXPORT_SYMBOL vmlinux 0x90a86c2b i2c_smbus_read_block_data +EXPORT_SYMBOL vmlinux 0x90b1947b bfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0x90c813f6 phy_print_status +EXPORT_SYMBOL vmlinux 0x91009452 schedule_delayed_work +EXPORT_SYMBOL vmlinux 0x91481982 __ratelimit +EXPORT_SYMBOL vmlinux 0x914e6b2c snd_card_file_remove +EXPORT_SYMBOL vmlinux 0x91521956 dget_locked +EXPORT_SYMBOL vmlinux 0x9153b984 gpio_keypad_active +EXPORT_SYMBOL vmlinux 0x91766c09 param_get_ulong +EXPORT_SYMBOL vmlinux 0x917eb7ae ethtool_op_set_tx_ipv6_csum +EXPORT_SYMBOL vmlinux 0x9186b3b8 snd_pcm_hw_param_last +EXPORT_SYMBOL vmlinux 0x919029aa __readwrite_bug +EXPORT_SYMBOL vmlinux 0x919f9353 xfrm_policy_flush +EXPORT_SYMBOL vmlinux 0x91ac85b4 consume_skb +EXPORT_SYMBOL vmlinux 0x91d67482 nf_unregister_hook +EXPORT_SYMBOL vmlinux 0x91f84b66 bt_accept_enqueue +EXPORT_SYMBOL vmlinux 0x91fa67f9 i2c_smbus_read_byte +EXPORT_SYMBOL vmlinux 0x9214ed8a param_get_bool +EXPORT_SYMBOL vmlinux 0x9228b7d4 vfs_quota_on_mount +EXPORT_SYMBOL vmlinux 0x925b3a37 napi_gro_frags +EXPORT_SYMBOL vmlinux 0x925c19ee ip_getsockopt +EXPORT_SYMBOL vmlinux 0x926401f2 sg_copy_to_buffer +EXPORT_SYMBOL vmlinux 0x929337b2 ipu_uninit_channel +EXPORT_SYMBOL vmlinux 0x92960f44 ipu_disp_set_global_alpha +EXPORT_SYMBOL vmlinux 0x92f9f567 ps2_cmd_aborted +EXPORT_SYMBOL vmlinux 0x92fe844a skb_dequeue_tail +EXPORT_SYMBOL vmlinux 0x92ffe59f fb_class +EXPORT_SYMBOL vmlinux 0x9305f8e6 cpufreq_get +EXPORT_SYMBOL vmlinux 0x93129260 tcf_exts_validate +EXPORT_SYMBOL vmlinux 0x933f7b59 sock_map_fd +EXPORT_SYMBOL vmlinux 0x93a10e63 bdget +EXPORT_SYMBOL vmlinux 0x93a6e0b2 io_schedule +EXPORT_SYMBOL vmlinux 0x93eaeb1b uart_remove_one_port +EXPORT_SYMBOL vmlinux 0x93f6b1b8 spba_take_ownership +EXPORT_SYMBOL vmlinux 0x93fca811 __get_free_pages +EXPORT_SYMBOL vmlinux 0x940baf19 __mmc_claim_host +EXPORT_SYMBOL vmlinux 0x944832d6 ftrace_print_symbols_seq +EXPORT_SYMBOL vmlinux 0x944f0b4b netif_device_detach +EXPORT_SYMBOL vmlinux 0x945da9ab ethtool_op_set_tx_csum +EXPORT_SYMBOL vmlinux 0x94712365 sk_run_filter +EXPORT_SYMBOL vmlinux 0x9481947d gpio_sdhc_active +EXPORT_SYMBOL vmlinux 0x94847b23 nf_ct_destroy +EXPORT_SYMBOL vmlinux 0x94893197 scc_monitor_security_failure +EXPORT_SYMBOL vmlinux 0x94961283 vunmap +EXPORT_SYMBOL vmlinux 0x9496aa61 clk_disable +EXPORT_SYMBOL vmlinux 0x94a4061e tcf_action_exec +EXPORT_SYMBOL vmlinux 0x94a507e8 mb_cache_entry_find_next +EXPORT_SYMBOL vmlinux 0x94da9fd6 blkdev_get +EXPORT_SYMBOL vmlinux 0x94dba649 snd_ctl_boolean_mono_info +EXPORT_SYMBOL vmlinux 0x94e307af kmalloc_caches +EXPORT_SYMBOL vmlinux 0x9501d078 __wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0x952d0a7e bt_sock_poll +EXPORT_SYMBOL vmlinux 0x954488a4 syncookie_secret +EXPORT_SYMBOL vmlinux 0x954cbb26 vsprintf +EXPORT_SYMBOL vmlinux 0x956643b5 skb_put +EXPORT_SYMBOL vmlinux 0x95728d5e i2c_release_client +EXPORT_SYMBOL vmlinux 0x95758752 sk_stream_wait_memory +EXPORT_SYMBOL vmlinux 0x958ba27f clk_put +EXPORT_SYMBOL vmlinux 0x95952cb1 vfs_readv +EXPORT_SYMBOL vmlinux 0x95dbe078 __get_user_2 +EXPORT_SYMBOL vmlinux 0x960cb5fc jbd2_journal_extend +EXPORT_SYMBOL vmlinux 0x9625aa3c vc_cons +EXPORT_SYMBOL vmlinux 0x964d1391 skb_checksum +EXPORT_SYMBOL vmlinux 0x9654709f scsi_prep_return +EXPORT_SYMBOL vmlinux 0x9663ad59 snd_info_create_card_entry +EXPORT_SYMBOL vmlinux 0x9678d643 journal_get_write_access +EXPORT_SYMBOL vmlinux 0x96870b7d cdrom_open +EXPORT_SYMBOL vmlinux 0x96898769 sysfs_format_mac +EXPORT_SYMBOL vmlinux 0x96bb2edb kmem_cache_shrink +EXPORT_SYMBOL vmlinux 0x96cca4d4 dev_remove_pack +EXPORT_SYMBOL vmlinux 0x96cd2b04 scsi_sense_key_string +EXPORT_SYMBOL vmlinux 0x96d1dbb3 snd_pcm_lib_malloc_pages +EXPORT_SYMBOL vmlinux 0x96d5f4be scsi_free_host_dev +EXPORT_SYMBOL vmlinux 0x96f03286 scc_write_register +EXPORT_SYMBOL vmlinux 0x96fce72c __netdev_alloc_page +EXPORT_SYMBOL vmlinux 0x9715dc90 inet_csk_accept +EXPORT_SYMBOL vmlinux 0x97255bdf strlen +EXPORT_SYMBOL vmlinux 0x9754ec10 radix_tree_preload +EXPORT_SYMBOL vmlinux 0x975cfa50 cpu_user +EXPORT_SYMBOL vmlinux 0x97afdc46 blk_queue_free_tags +EXPORT_SYMBOL vmlinux 0x97d51e31 scsi_host_lookup +EXPORT_SYMBOL vmlinux 0x97dd42f9 ip_mc_inc_group +EXPORT_SYMBOL vmlinux 0x9805129b __scsi_iterate_devices +EXPORT_SYMBOL vmlinux 0x9837fed1 nla_put_nohdr +EXPORT_SYMBOL vmlinux 0x986352f2 neigh_update +EXPORT_SYMBOL vmlinux 0x986c827a eth_type_trans +EXPORT_SYMBOL vmlinux 0x986e6135 fb_pad_unaligned_buffer +EXPORT_SYMBOL vmlinux 0x98a1103e bdevname +EXPORT_SYMBOL vmlinux 0x98b1a829 blk_queue_init_tags +EXPORT_SYMBOL vmlinux 0x98bc8c0a find_lock_page +EXPORT_SYMBOL vmlinux 0x98bcfa5e do_splice_to +EXPORT_SYMBOL vmlinux 0x98cddaee mxc_snoop_get_status +EXPORT_SYMBOL vmlinux 0x98f588fe kset_register +EXPORT_SYMBOL vmlinux 0x99020b14 per_cpu____irq_regs +EXPORT_SYMBOL vmlinux 0x991a8071 jbd2_journal_init_inode +EXPORT_SYMBOL vmlinux 0x992194df unlock_buffer +EXPORT_SYMBOL vmlinux 0x99421f73 skb_copy_expand +EXPORT_SYMBOL vmlinux 0x995b8fcc tcp_hashinfo +EXPORT_SYMBOL vmlinux 0x9970aec7 input_event +EXPORT_SYMBOL vmlinux 0x997c1abd read_cache_page_async +EXPORT_SYMBOL vmlinux 0x9987208c kill_pgrp +EXPORT_SYMBOL vmlinux 0x9994c0ca ps2_is_keyboard_id +EXPORT_SYMBOL vmlinux 0x999c3148 __raw_readsb +EXPORT_SYMBOL vmlinux 0x999e8297 vfree +EXPORT_SYMBOL vmlinux 0x99a9c35d tty_port_lower_dtr_rts +EXPORT_SYMBOL vmlinux 0x99ac30bd ipv6_getsockopt +EXPORT_SYMBOL vmlinux 0x99bb8806 memmove +EXPORT_SYMBOL vmlinux 0x99bfbe39 get_unused_fd +EXPORT_SYMBOL vmlinux 0x99c7a8b8 jbd2_dev_to_name +EXPORT_SYMBOL vmlinux 0x99c95fa5 unregister_sound_special +EXPORT_SYMBOL vmlinux 0x99cdc86b sysctl_tcp_reordering +EXPORT_SYMBOL vmlinux 0x99d022a8 blk_get_backing_dev_info +EXPORT_SYMBOL vmlinux 0x99d0acdc xfrm_state_alloc +EXPORT_SYMBOL vmlinux 0x99e70e6b scsi_host_put +EXPORT_SYMBOL vmlinux 0x99ea12ce panic_blink +EXPORT_SYMBOL vmlinux 0x99ed23be single_release +EXPORT_SYMBOL vmlinux 0x9a06c5b3 posix_lock_file +EXPORT_SYMBOL vmlinux 0x9a13c263 log_wait_commit +EXPORT_SYMBOL vmlinux 0x9a1dfd65 strpbrk +EXPORT_SYMBOL vmlinux 0x9a3165e2 udp_proc_unregister +EXPORT_SYMBOL vmlinux 0x9a4f5e28 __scsi_add_device +EXPORT_SYMBOL vmlinux 0x9a6591a6 phy_register_fixup_for_uid +EXPORT_SYMBOL vmlinux 0x9a8be86e blk_rq_init +EXPORT_SYMBOL vmlinux 0x9a949d4f scsi_calculate_bounce_limit +EXPORT_SYMBOL vmlinux 0x9a9cea63 sah_add_in_key_desc +EXPORT_SYMBOL vmlinux 0x9ae027e9 hci_conn_put_device +EXPORT_SYMBOL vmlinux 0x9b388444 get_zeroed_page +EXPORT_SYMBOL vmlinux 0x9b6010c0 sg_miter_next +EXPORT_SYMBOL vmlinux 0x9b612906 drop_super +EXPORT_SYMBOL vmlinux 0x9b6a678e netif_receive_skb +EXPORT_SYMBOL vmlinux 0x9b6eb137 ksize +EXPORT_SYMBOL vmlinux 0x9b98118f add_to_page_cache_locked +EXPORT_SYMBOL vmlinux 0x9b9d622c mmc_request_done +EXPORT_SYMBOL vmlinux 0x9b9f9b09 inet_unregister_protosw +EXPORT_SYMBOL vmlinux 0x9ba7089d argv_split +EXPORT_SYMBOL vmlinux 0x9bce482f __release_region +EXPORT_SYMBOL vmlinux 0x9bd38f02 gpio_pmic_active +EXPORT_SYMBOL vmlinux 0x9bd98b18 timecompare_offset +EXPORT_SYMBOL vmlinux 0x9bda9793 ip6_frag_match +EXPORT_SYMBOL vmlinux 0x9bdb85a2 generic_permission +EXPORT_SYMBOL vmlinux 0x9be8eba4 pmic_adc_get_touch_mode +EXPORT_SYMBOL vmlinux 0x9bf03884 do_system_keystore_slot_decrypt +EXPORT_SYMBOL vmlinux 0x9c012508 fb_parse_edid +EXPORT_SYMBOL vmlinux 0x9c10162e mc13892_bklit_set_dutycycle +EXPORT_SYMBOL vmlinux 0x9c1a7dca vfs_readdir +EXPORT_SYMBOL vmlinux 0x9c2571f4 __down_read +EXPORT_SYMBOL vmlinux 0x9c551c55 mmc_free_host +EXPORT_SYMBOL vmlinux 0x9c666ae0 cfb_copyarea +EXPORT_SYMBOL vmlinux 0x9c7077bd enable_hlt +EXPORT_SYMBOL vmlinux 0x9c74ccca sock_alloc_send_pskb +EXPORT_SYMBOL vmlinux 0x9c808d10 sah_Descriptor_Chain_Destroy +EXPORT_SYMBOL vmlinux 0x9c92e453 rt6_lookup +EXPORT_SYMBOL vmlinux 0x9c9323ce elevator_exit +EXPORT_SYMBOL vmlinux 0x9c953b31 md_set_array_sectors +EXPORT_SYMBOL vmlinux 0x9cb96e92 qdisc_put_rtab +EXPORT_SYMBOL vmlinux 0x9cdf476d skb_over_panic +EXPORT_SYMBOL vmlinux 0x9ceb163c memcpy_toiovec +EXPORT_SYMBOL vmlinux 0x9cfd56c5 scsi_print_status +EXPORT_SYMBOL vmlinux 0x9cfde6ce otg_get_transceiver +EXPORT_SYMBOL vmlinux 0x9d025ee2 mii_check_gmii_support +EXPORT_SYMBOL vmlinux 0x9d07a13b bio_integrity_clone +EXPORT_SYMBOL vmlinux 0x9d59653f input_register_handler +EXPORT_SYMBOL vmlinux 0x9d669763 memcpy +EXPORT_SYMBOL vmlinux 0x9d726717 simple_link +EXPORT_SYMBOL vmlinux 0x9d7d7f25 simple_release_fs +EXPORT_SYMBOL vmlinux 0x9d7e69e5 pagecache_write_begin +EXPORT_SYMBOL vmlinux 0x9db9b7d2 take_over_console +EXPORT_SYMBOL vmlinux 0x9dc98314 tcp_v4_remember_stamp +EXPORT_SYMBOL vmlinux 0x9de2855f __page_symlink +EXPORT_SYMBOL vmlinux 0x9e00bc08 inet_del_protocol +EXPORT_SYMBOL vmlinux 0x9e109963 try_to_free_buffers +EXPORT_SYMBOL vmlinux 0x9e109b57 noop_qdisc +EXPORT_SYMBOL vmlinux 0x9e120414 ida_get_new_above +EXPORT_SYMBOL vmlinux 0x9e2000a7 memcpy_toiovecend +EXPORT_SYMBOL vmlinux 0x9e20b792 snd_pcm_hw_param_first +EXPORT_SYMBOL vmlinux 0x9e7c5610 scc_encrypt_region +EXPORT_SYMBOL vmlinux 0x9e7d6bd0 __udelay +EXPORT_SYMBOL vmlinux 0x9e84519d km_policy_expired +EXPORT_SYMBOL vmlinux 0x9e9db983 snd_ctl_remove_id +EXPORT_SYMBOL vmlinux 0x9e9f1714 __bitmap_andnot +EXPORT_SYMBOL vmlinux 0x9eb44c02 usb_host_set_wakeup +EXPORT_SYMBOL vmlinux 0x9ed685ee iov_iter_advance +EXPORT_SYMBOL vmlinux 0x9edabef2 __scm_destroy +EXPORT_SYMBOL vmlinux 0x9edd162e __insert_inode_hash +EXPORT_SYMBOL vmlinux 0x9eecde16 do_brk +EXPORT_SYMBOL vmlinux 0x9ef17b56 generic_file_aio_read +EXPORT_SYMBOL vmlinux 0x9ef749e2 unregister_chrdev +EXPORT_SYMBOL vmlinux 0x9ef782c9 dquot_free_inode +EXPORT_SYMBOL vmlinux 0x9f010d9a dm_table_unplug_all +EXPORT_SYMBOL vmlinux 0x9f02e812 ipu_disp_set_gamma_correction +EXPORT_SYMBOL vmlinux 0x9f100139 jiffies_to_clock_t +EXPORT_SYMBOL vmlinux 0x9f1fb51f dma_declare_coherent_memory +EXPORT_SYMBOL vmlinux 0x9f2bdaac __bitmap_or +EXPORT_SYMBOL vmlinux 0x9f2d613e param_set_bool +EXPORT_SYMBOL vmlinux 0x9f3e3368 mmc_set_data_timeout +EXPORT_SYMBOL vmlinux 0x9f3f2939 vfs_read +EXPORT_SYMBOL vmlinux 0x9f7cbd71 grab_cache_page_write_begin +EXPORT_SYMBOL vmlinux 0x9f8a13d8 vlan_dev_vlan_id +EXPORT_SYMBOL vmlinux 0x9f903043 journal_check_available_features +EXPORT_SYMBOL vmlinux 0x9f956994 ipu_get_irq_status +EXPORT_SYMBOL vmlinux 0x9f984513 strrchr +EXPORT_SYMBOL vmlinux 0x9f99681f phy_device_create +EXPORT_SYMBOL vmlinux 0x9f9e7d1b generic_file_direct_write +EXPORT_SYMBOL vmlinux 0x9fa325c0 tcf_hash_insert +EXPORT_SYMBOL vmlinux 0x9fa94949 inet_add_protocol +EXPORT_SYMBOL vmlinux 0x9fadfeac mnt_pin +EXPORT_SYMBOL vmlinux 0x9fb3dd30 memcpy_fromiovec +EXPORT_SYMBOL vmlinux 0xa0100135 skb_copy_and_csum_dev +EXPORT_SYMBOL vmlinux 0xa03523d5 security_unix_stream_connect +EXPORT_SYMBOL vmlinux 0xa03538a4 skb_add_rx_frag +EXPORT_SYMBOL vmlinux 0xa04a01bd qdisc_class_hash_insert +EXPORT_SYMBOL vmlinux 0xa04bf965 snd_pcm_kernel_ioctl +EXPORT_SYMBOL vmlinux 0xa05c03df mempool_kmalloc +EXPORT_SYMBOL vmlinux 0xa05fd72f eth_header +EXPORT_SYMBOL vmlinux 0xa06fb594 call_usermodehelper_exec +EXPORT_SYMBOL vmlinux 0xa07455cc ipu_request_irq +EXPORT_SYMBOL vmlinux 0xa07a8d22 sleep_on +EXPORT_SYMBOL vmlinux 0xa07ac24b irq_stat +EXPORT_SYMBOL vmlinux 0xa07c7c01 security_path_rename +EXPORT_SYMBOL vmlinux 0xa0b04675 vmalloc_32 +EXPORT_SYMBOL vmlinux 0xa0c22825 scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xa0ceef51 out_of_line_wait_on_bit +EXPORT_SYMBOL vmlinux 0xa0d72ef5 simple_fill_super +EXPORT_SYMBOL vmlinux 0xa0e9078d __devm_release_region +EXPORT_SYMBOL vmlinux 0xa0fbac79 wake_up_bit +EXPORT_SYMBOL vmlinux 0xa1053ff0 tty_name +EXPORT_SYMBOL vmlinux 0xa108eb4d sysctl_optmem_max +EXPORT_SYMBOL vmlinux 0xa120d33c tty_unregister_ldisc +EXPORT_SYMBOL vmlinux 0xa12b337a redirty_page_for_writepage +EXPORT_SYMBOL vmlinux 0xa13798f8 printk_ratelimit +EXPORT_SYMBOL vmlinux 0xa1684522 devm_ioport_unmap +EXPORT_SYMBOL vmlinux 0xa16e2b4e register_sound_mixer +EXPORT_SYMBOL vmlinux 0xa1737b4d dev_kfree_skb_irq +EXPORT_SYMBOL vmlinux 0xa19ea804 do_scc_encrypt_region +EXPORT_SYMBOL vmlinux 0xa19f2c65 bitmap_endwrite +EXPORT_SYMBOL vmlinux 0xa1b759ce fb_add_videomode +EXPORT_SYMBOL vmlinux 0xa1c76e0a _cond_resched +EXPORT_SYMBOL vmlinux 0xa1f46594 d_alloc_root +EXPORT_SYMBOL vmlinux 0xa1f4ae32 i2c_use_client +EXPORT_SYMBOL vmlinux 0xa20ce1b8 net_msg_warn +EXPORT_SYMBOL vmlinux 0xa218bf61 complete +EXPORT_SYMBOL vmlinux 0xa21fb0a2 sah_Append_Link +EXPORT_SYMBOL vmlinux 0xa2324d88 snd_pcm_new_stream +EXPORT_SYMBOL vmlinux 0xa272634e sysctl_intvec +EXPORT_SYMBOL vmlinux 0xa29b1708 tcp_memory_allocated +EXPORT_SYMBOL vmlinux 0xa2a5fd77 inet_ehash_secret +EXPORT_SYMBOL vmlinux 0xa2ad0bf6 dm_table_put +EXPORT_SYMBOL vmlinux 0xa2db955a is_pmic_adc_ready +EXPORT_SYMBOL vmlinux 0xa2f55405 udp_lib_unhash +EXPORT_SYMBOL vmlinux 0xa3084e60 dm_put_device +EXPORT_SYMBOL vmlinux 0xa3101c7b contig_page_data +EXPORT_SYMBOL vmlinux 0xa31d314a simple_write_end +EXPORT_SYMBOL vmlinux 0xa3223b98 inet_frag_evictor +EXPORT_SYMBOL vmlinux 0xa329f07e register_shrinker +EXPORT_SYMBOL vmlinux 0xa336feb7 nand_manuf_ids +EXPORT_SYMBOL vmlinux 0xa34676b8 dev_add_pack +EXPORT_SYMBOL vmlinux 0xa34dc104 journal_dirty_data +EXPORT_SYMBOL vmlinux 0xa34f1ef5 crc32_le +EXPORT_SYMBOL vmlinux 0xa35abed1 blk_rq_map_user_iov +EXPORT_SYMBOL vmlinux 0xa35de80f ipv4_config +EXPORT_SYMBOL vmlinux 0xa38aba0b snd_pcm_hw_constraint_pow2 +EXPORT_SYMBOL vmlinux 0xa3a4ed03 cond_resched_lock +EXPORT_SYMBOL vmlinux 0xa3a9e22b sock_no_bind +EXPORT_SYMBOL vmlinux 0xa3e64891 register_netdev +EXPORT_SYMBOL vmlinux 0xa3f0c898 phy_driver_register +EXPORT_SYMBOL vmlinux 0xa3f0d214 tty_port_raise_dtr_rts +EXPORT_SYMBOL vmlinux 0xa420a81e bio_unmap_user +EXPORT_SYMBOL vmlinux 0xa43b9539 memcpy_fromiovecend +EXPORT_SYMBOL vmlinux 0xa443d134 phy_stop_interrupts +EXPORT_SYMBOL vmlinux 0xa458217a d_lookup +EXPORT_SYMBOL vmlinux 0xa4772743 hci_recv_fragment +EXPORT_SYMBOL vmlinux 0xa4920d62 i2c_smbus_read_i2c_block_data +EXPORT_SYMBOL vmlinux 0xa4ac0638 netif_device_attach +EXPORT_SYMBOL vmlinux 0xa501d6a8 mx51_babbage_gpio_spi_chipselect_inactive +EXPORT_SYMBOL vmlinux 0xa517cf98 deregister_atm_ioctl +EXPORT_SYMBOL vmlinux 0xa537b848 __scsi_put_command +EXPORT_SYMBOL vmlinux 0xa5446a03 netlink_clear_multicast_users +EXPORT_SYMBOL vmlinux 0xa5508624 tcf_destroy_chain +EXPORT_SYMBOL vmlinux 0xa5515050 con_is_bound +EXPORT_SYMBOL vmlinux 0xa5808bbf tasklet_init +EXPORT_SYMBOL vmlinux 0xa58b6804 nla_parse +EXPORT_SYMBOL vmlinux 0xa598e29c vesa_modes +EXPORT_SYMBOL vmlinux 0xa59fe5b2 mmc_release_host +EXPORT_SYMBOL vmlinux 0xa5ae1d7c new_inode +EXPORT_SYMBOL vmlinux 0xa5b0c9c9 scsi_adjust_queue_depth +EXPORT_SYMBOL vmlinux 0xa5b1c4e2 __blk_end_request_cur +EXPORT_SYMBOL vmlinux 0xa5c66058 in_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xa5cda817 ipu_csi_enable_mclk +EXPORT_SYMBOL vmlinux 0xa5cef8ad release_resource +EXPORT_SYMBOL vmlinux 0xa5fb8a95 mdiobus_read +EXPORT_SYMBOL vmlinux 0xa5fc2108 phy_attach +EXPORT_SYMBOL vmlinux 0xa61aa028 snd_pcm_format_unsigned +EXPORT_SYMBOL vmlinux 0xa63d85ab slhc_remember +EXPORT_SYMBOL vmlinux 0xa6423d68 sb_set_blocksize +EXPORT_SYMBOL vmlinux 0xa64f283d jbd2_journal_start_commit +EXPORT_SYMBOL vmlinux 0xa656c5ed __module_put_and_exit +EXPORT_SYMBOL vmlinux 0xa667da06 mxc_dma_set_callback +EXPORT_SYMBOL vmlinux 0xa66a40b5 proto_unregister +EXPORT_SYMBOL vmlinux 0xa68124fa hweight8 +EXPORT_SYMBOL vmlinux 0xa681fe88 generate_random_uuid +EXPORT_SYMBOL vmlinux 0xa6a87ad2 grab_cache_page_nowait +EXPORT_SYMBOL vmlinux 0xa6cd5d98 netlink_kernel_create +EXPORT_SYMBOL vmlinux 0xa6dcc773 rb_insert_color +EXPORT_SYMBOL vmlinux 0xa713f7ca clear_page_dirty_for_io +EXPORT_SYMBOL vmlinux 0xa789d0ec atm_dev_lookup +EXPORT_SYMBOL vmlinux 0xa7964aeb xfrm_state_register_afinfo +EXPORT_SYMBOL vmlinux 0xa7ba37e7 do_truncate +EXPORT_SYMBOL vmlinux 0xa7cbcbc8 get_write_access +EXPORT_SYMBOL vmlinux 0xa7ff125d eth_header_parse +EXPORT_SYMBOL vmlinux 0xa815c3ac md_check_recovery +EXPORT_SYMBOL vmlinux 0xa8182cdc sb_min_blocksize +EXPORT_SYMBOL vmlinux 0xa820ca4c inet_shutdown +EXPORT_SYMBOL vmlinux 0xa8442d5b ipu_select_buffer +EXPORT_SYMBOL vmlinux 0xa85af2ea __netdev_alloc_skb +EXPORT_SYMBOL vmlinux 0xa8742038 jbd2_journal_file_inode +EXPORT_SYMBOL vmlinux 0xa889cbeb gpio_usbotg_hs_inactive +EXPORT_SYMBOL vmlinux 0xa8a11579 fsl_shw_release_key +EXPORT_SYMBOL vmlinux 0xa8ab659e get_fs_type +EXPORT_SYMBOL vmlinux 0xa8ac4d52 copy_io_context +EXPORT_SYMBOL vmlinux 0xa8dc7a53 generic_setlease +EXPORT_SYMBOL vmlinux 0xa8e56c2d kobject_set_name +EXPORT_SYMBOL vmlinux 0xa8f23f19 neigh_parms_release +EXPORT_SYMBOL vmlinux 0xa8f7016b skb_copy_bits +EXPORT_SYMBOL vmlinux 0xa8fef7bb security_unix_may_send +EXPORT_SYMBOL vmlinux 0xa9042ca6 dm_table_get_md +EXPORT_SYMBOL vmlinux 0xa907214e dqget +EXPORT_SYMBOL vmlinux 0xa9073613 i2c_transfer +EXPORT_SYMBOL vmlinux 0xa913b746 vfs_writev +EXPORT_SYMBOL vmlinux 0xa976f287 scsi_finish_command +EXPORT_SYMBOL vmlinux 0xa9a5ea23 mxc_sdma_read_ipcv2 +EXPORT_SYMBOL vmlinux 0xa9c5adb6 __rta_fill +EXPORT_SYMBOL vmlinux 0xa9cbd416 get_empty_filp +EXPORT_SYMBOL vmlinux 0xa9ecb92c flush_dcache_page +EXPORT_SYMBOL vmlinux 0xa9f1ed23 bit_waitqueue +EXPORT_SYMBOL vmlinux 0xaa0e0fad cont_write_begin +EXPORT_SYMBOL vmlinux 0xaa21611f dma_mmap_coherent +EXPORT_SYMBOL vmlinux 0xaa396167 vfs_rename +EXPORT_SYMBOL vmlinux 0xaa4becc5 netlink_change_ngroups +EXPORT_SYMBOL vmlinux 0xaa527612 __kfifo_put +EXPORT_SYMBOL vmlinux 0xaa95b16b mxc_request_dma +EXPORT_SYMBOL vmlinux 0xaaa9a37b dev_set_mac_address +EXPORT_SYMBOL vmlinux 0xaad0d53b ip_mc_dec_group +EXPORT_SYMBOL vmlinux 0xaad3f916 set_disk_ro +EXPORT_SYMBOL vmlinux 0xaafdc258 strcasecmp +EXPORT_SYMBOL vmlinux 0xaaff96f1 phy_start_interrupts +EXPORT_SYMBOL vmlinux 0xab05ec10 netpoll_print_options +EXPORT_SYMBOL vmlinux 0xab11b2ed tcf_em_unregister +EXPORT_SYMBOL vmlinux 0xab16f67c snd_device_register +EXPORT_SYMBOL vmlinux 0xab2ba9bb clk_set_rate +EXPORT_SYMBOL vmlinux 0xab476f63 nand_do_read_ops +EXPORT_SYMBOL vmlinux 0xab486a44 inet_addr_type +EXPORT_SYMBOL vmlinux 0xab4f4324 generic_block_bmap +EXPORT_SYMBOL vmlinux 0xab53b0a8 mempool_alloc +EXPORT_SYMBOL vmlinux 0xab600421 probe_irq_off +EXPORT_SYMBOL vmlinux 0xab64527d mutex_lock_interruptible +EXPORT_SYMBOL vmlinux 0xab680c96 __down_read_trylock +EXPORT_SYMBOL vmlinux 0xab77e6ac bh_uptodate_or_lock +EXPORT_SYMBOL vmlinux 0xab9f1611 put_disk +EXPORT_SYMBOL vmlinux 0xabbd558e pmic_write_reg +EXPORT_SYMBOL vmlinux 0xabd0c91c rtc_time_to_tm +EXPORT_SYMBOL vmlinux 0xabeffa20 skb_insert +EXPORT_SYMBOL vmlinux 0xac2b60a3 xfrm_policy_delete +EXPORT_SYMBOL vmlinux 0xac32f7c7 snd_pcm_period_elapsed +EXPORT_SYMBOL vmlinux 0xac3d5d8a proto_register +EXPORT_SYMBOL vmlinux 0xac4ee90a scsi_unblock_requests +EXPORT_SYMBOL vmlinux 0xac54fc9f mempool_destroy +EXPORT_SYMBOL vmlinux 0xac5f113d cpu_all_bits +EXPORT_SYMBOL vmlinux 0xac6855b0 gen_kill_estimator +EXPORT_SYMBOL vmlinux 0xac861494 snd_device_free +EXPORT_SYMBOL vmlinux 0xac95f403 scsi_prep_state_check +EXPORT_SYMBOL vmlinux 0xac9c6d7d blk_queue_resize_tags +EXPORT_SYMBOL vmlinux 0xacb5905a snd_pcm_lib_preallocate_pages +EXPORT_SYMBOL vmlinux 0xacb85f24 jbd2_journal_set_features +EXPORT_SYMBOL vmlinux 0xacbbd823 __dev_get_by_index +EXPORT_SYMBOL vmlinux 0xacc0f0ad blk_start_request +EXPORT_SYMBOL vmlinux 0xacc8001a sync_blockdev +EXPORT_SYMBOL vmlinux 0xacca9176 seq_bitmap_list +EXPORT_SYMBOL vmlinux 0xaccabc6a in4_pton +EXPORT_SYMBOL vmlinux 0xacdaa5e4 hub_port_logical_disconnect +EXPORT_SYMBOL vmlinux 0xacdcb4c8 ethtool_op_set_tso +EXPORT_SYMBOL vmlinux 0xace1ac7c destroy_EII_client +EXPORT_SYMBOL vmlinux 0xacf4d843 match_strdup +EXPORT_SYMBOL vmlinux 0xad0413d4 match_hex +EXPORT_SYMBOL vmlinux 0xad245190 cfi_read_pri +EXPORT_SYMBOL vmlinux 0xad29eef2 __ip_select_ident +EXPORT_SYMBOL vmlinux 0xad449ec8 snd_card_set_id +EXPORT_SYMBOL vmlinux 0xad4b12d6 __devm_request_region +EXPORT_SYMBOL vmlinux 0xadaa2657 cpufreq_register_notifier +EXPORT_SYMBOL vmlinux 0xadaaab45 bio_clone +EXPORT_SYMBOL vmlinux 0xadb792c2 prepare_to_wait_exclusive +EXPORT_SYMBOL vmlinux 0xadcb72f3 tcp_sendpage +EXPORT_SYMBOL vmlinux 0xaddddde4 phy_register_fixup_for_id +EXPORT_SYMBOL vmlinux 0xade88e76 snd_malloc_pages +EXPORT_SYMBOL vmlinux 0xadf42bd5 __request_region +EXPORT_SYMBOL vmlinux 0xae02aad5 tcp_parse_options +EXPORT_SYMBOL vmlinux 0xae06a61b generic_unplug_device +EXPORT_SYMBOL vmlinux 0xae3c1c4b journal_init_dev +EXPORT_SYMBOL vmlinux 0xae502d4a dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xae5fc12b request_key_async +EXPORT_SYMBOL vmlinux 0xae6f3f4b journal_restart +EXPORT_SYMBOL vmlinux 0xaead1765 wireless_send_event +EXPORT_SYMBOL vmlinux 0xaec655c7 alloc_pages_exact +EXPORT_SYMBOL vmlinux 0xaed013b9 posix_acl_valid +EXPORT_SYMBOL vmlinux 0xaef1ccc3 usbotg_uninit +EXPORT_SYMBOL vmlinux 0xaf2c77cd fsl_usb_host_uninit +EXPORT_SYMBOL vmlinux 0xaf311e00 blk_end_request +EXPORT_SYMBOL vmlinux 0xaf50e76d elf_set_personality +EXPORT_SYMBOL vmlinux 0xaf602344 end_page_writeback +EXPORT_SYMBOL vmlinux 0xaf8aa518 system_rev +EXPORT_SYMBOL vmlinux 0xafb27d81 read_cache_page +EXPORT_SYMBOL vmlinux 0xafbacadb tcf_hash_release +EXPORT_SYMBOL vmlinux 0xafc60fb2 inode_permission +EXPORT_SYMBOL vmlinux 0xb0341fd2 sdma_phys_to_virt +EXPORT_SYMBOL vmlinux 0xb045e4ee gpio_spdif_inactive +EXPORT_SYMBOL vmlinux 0xb0574d4f open_exec +EXPORT_SYMBOL vmlinux 0xb0742be9 rtnl_set_sk_err +EXPORT_SYMBOL vmlinux 0xb0b847ac __bitmap_full +EXPORT_SYMBOL vmlinux 0xb0e10781 get_option +EXPORT_SYMBOL vmlinux 0xb0fe5ac9 n_tty_ioctl_helper +EXPORT_SYMBOL vmlinux 0xb11c4715 snd_timer_new +EXPORT_SYMBOL vmlinux 0xb121390a probe_irq_on +EXPORT_SYMBOL vmlinux 0xb123875f __tcf_em_tree_match +EXPORT_SYMBOL vmlinux 0xb13d42d5 xfrm_state_lookup_byaddr +EXPORT_SYMBOL vmlinux 0xb14c425c dev_set_mtu +EXPORT_SYMBOL vmlinux 0xb14f10ea create_proc_entry +EXPORT_SYMBOL vmlinux 0xb1672a8a blk_queue_dma_pad +EXPORT_SYMBOL vmlinux 0xb17c3419 blk_queue_ordered +EXPORT_SYMBOL vmlinux 0xb18fe10e hci_register_cb +EXPORT_SYMBOL vmlinux 0xb19760c3 bitmap_onto +EXPORT_SYMBOL vmlinux 0xb1ba4137 dm_table_get_size +EXPORT_SYMBOL vmlinux 0xb1bd3431 file_update_time +EXPORT_SYMBOL vmlinux 0xb1c3a01a oops_in_progress +EXPORT_SYMBOL vmlinux 0xb213fe8b snd_info_get_str +EXPORT_SYMBOL vmlinux 0xb224fbe2 param_get_short +EXPORT_SYMBOL vmlinux 0xb2278d01 scsi_device_get +EXPORT_SYMBOL vmlinux 0xb22fe6a3 netdev_increment_features +EXPORT_SYMBOL vmlinux 0xb2308ed9 jbd2_journal_set_triggers +EXPORT_SYMBOL vmlinux 0xb261f0ca scm_fp_dup +EXPORT_SYMBOL vmlinux 0xb2668bcd seq_puts +EXPORT_SYMBOL vmlinux 0xb2682405 utf8_to_utf32 +EXPORT_SYMBOL vmlinux 0xb2a41299 __xfrm_state_delete +EXPORT_SYMBOL vmlinux 0xb2b1dd67 unregister_tcf_proto_ops +EXPORT_SYMBOL vmlinux 0xb2bf1312 __up_read +EXPORT_SYMBOL vmlinux 0xb2d72cc7 gen_replace_estimator +EXPORT_SYMBOL vmlinux 0xb2db636a vfs_statfs +EXPORT_SYMBOL vmlinux 0xb2e11211 netif_carrier_on +EXPORT_SYMBOL vmlinux 0xb2e5ae4a snd_lookup_minor_data +EXPORT_SYMBOL vmlinux 0xb2ec68b5 blk_queue_segment_boundary +EXPORT_SYMBOL vmlinux 0xb2f639df con_copy_unimap +EXPORT_SYMBOL vmlinux 0xb31714d9 clk_enable +EXPORT_SYMBOL vmlinux 0xb320c4ef generic_file_aio_write +EXPORT_SYMBOL vmlinux 0xb32be2eb register_netdevice +EXPORT_SYMBOL vmlinux 0xb34d53cc ipv6_chk_prefix +EXPORT_SYMBOL vmlinux 0xb35cc291 snd_component_add +EXPORT_SYMBOL vmlinux 0xb376d79d radix_tree_tagged +EXPORT_SYMBOL vmlinux 0xb3836ef2 generic_writepages +EXPORT_SYMBOL vmlinux 0xb386104d skb_pull +EXPORT_SYMBOL vmlinux 0xb38dc934 ipu_clear_buffer_ready +EXPORT_SYMBOL vmlinux 0xb3941e70 xfrm_policy_byid +EXPORT_SYMBOL vmlinux 0xb3a307c6 si_meminfo +EXPORT_SYMBOL vmlinux 0xb3bbb391 genphy_resume +EXPORT_SYMBOL vmlinux 0xb3e0287e d_delete +EXPORT_SYMBOL vmlinux 0xb3e68faf get_unifi_plat_data +EXPORT_SYMBOL vmlinux 0xb3e9a34e xfrm6_rcv_spi +EXPORT_SYMBOL vmlinux 0xb3ef65a4 kernel_getpeername +EXPORT_SYMBOL vmlinux 0xb3f6e069 jbd2_journal_init_jbd_inode +EXPORT_SYMBOL vmlinux 0xb3fe02b1 down_write +EXPORT_SYMBOL vmlinux 0xb41a617f gpio_i2c_inactive +EXPORT_SYMBOL vmlinux 0xb423dba1 console_blanked +EXPORT_SYMBOL vmlinux 0xb42453d3 param_get_invbool +EXPORT_SYMBOL vmlinux 0xb43e51bf tty_port_close_end +EXPORT_SYMBOL vmlinux 0xb4709322 scsi_dev_info_add_list +EXPORT_SYMBOL vmlinux 0xb488e692 security_path_truncate +EXPORT_SYMBOL vmlinux 0xb49de6aa generic_splice_sendpage +EXPORT_SYMBOL vmlinux 0xb4c0f0a8 kernel_bind +EXPORT_SYMBOL vmlinux 0xb4c7510e scc_get_configuration +EXPORT_SYMBOL vmlinux 0xb4d9799c md_integrity_add_rdev +EXPORT_SYMBOL vmlinux 0xb4eca417 xfrm_policy_destroy +EXPORT_SYMBOL vmlinux 0xb5044271 vsscanf +EXPORT_SYMBOL vmlinux 0xb52a21d9 dma_free_coherent +EXPORT_SYMBOL vmlinux 0xb534763c sg_free_table +EXPORT_SYMBOL vmlinux 0xb54533f7 usecs_to_jiffies +EXPORT_SYMBOL vmlinux 0xb545ff15 unlock_rename +EXPORT_SYMBOL vmlinux 0xb547f5cb key_unlink +EXPORT_SYMBOL vmlinux 0xb54f7dad xrlim_allow +EXPORT_SYMBOL vmlinux 0xb58e1954 inet6_del_protocol +EXPORT_SYMBOL vmlinux 0xb5a459dc unregister_blkdev +EXPORT_SYMBOL vmlinux 0xb5ca1c46 slhc_free +EXPORT_SYMBOL vmlinux 0xb5d8fb7e dev_mc_sync +EXPORT_SYMBOL vmlinux 0xb5e0af7d blk_queue_prep_rq +EXPORT_SYMBOL vmlinux 0xb617655e read_dev_sector +EXPORT_SYMBOL vmlinux 0xb62578bb __dev_remove_pack +EXPORT_SYMBOL vmlinux 0xb63f05ac netpoll_setup +EXPORT_SYMBOL vmlinux 0xb65751b1 snd_jack_report +EXPORT_SYMBOL vmlinux 0xb657624d tty_kref_put +EXPORT_SYMBOL vmlinux 0xb659e70a skb_make_writable +EXPORT_SYMBOL vmlinux 0xb66071e7 page_symlink +EXPORT_SYMBOL vmlinux 0xb678366f int_sqrt +EXPORT_SYMBOL vmlinux 0xb6896671 crc_t10dif +EXPORT_SYMBOL vmlinux 0xb68dadc6 inet_getname +EXPORT_SYMBOL vmlinux 0xb6a61a86 qdisc_get_rtab +EXPORT_SYMBOL vmlinux 0xb6a68816 find_last_bit +EXPORT_SYMBOL vmlinux 0xb6bffb99 kstat_irqs_cpu +EXPORT_SYMBOL vmlinux 0xb6c5a973 scsi_show_result +EXPORT_SYMBOL vmlinux 0xb6c70a7d __wake_up +EXPORT_SYMBOL vmlinux 0xb6d7c6ac ps2_init +EXPORT_SYMBOL vmlinux 0xb703911e release_firmware +EXPORT_SYMBOL vmlinux 0xb714a981 console_print +EXPORT_SYMBOL vmlinux 0xb7234ff0 scc_diminish_permissions +EXPORT_SYMBOL vmlinux 0xb736cb3f generic_readlink +EXPORT_SYMBOL vmlinux 0xb7608e96 filemap_write_and_wait +EXPORT_SYMBOL vmlinux 0xb78152f8 generic_file_aio_write_nolock +EXPORT_SYMBOL vmlinux 0xb798b8e4 flow_cache_lookup +EXPORT_SYMBOL vmlinux 0xb7ad3321 ida_init +EXPORT_SYMBOL vmlinux 0xb7b61546 crc32_be +EXPORT_SYMBOL vmlinux 0xb7ccb3c7 twl4030_i2c_read_u8 +EXPORT_SYMBOL vmlinux 0xb8163d8b icmp_send +EXPORT_SYMBOL vmlinux 0xb82242d1 tcp_create_openreq_child +EXPORT_SYMBOL vmlinux 0xb826ff9b deactivate_super +EXPORT_SYMBOL vmlinux 0xb82ae47d register_console +EXPORT_SYMBOL vmlinux 0xb859f38b krealloc +EXPORT_SYMBOL vmlinux 0xb86e4ab9 random32 +EXPORT_SYMBOL vmlinux 0xb86fa9d3 ____pagevec_lru_add +EXPORT_SYMBOL vmlinux 0xb8702574 write_one_page +EXPORT_SYMBOL vmlinux 0xb87099d9 scc_read_register +EXPORT_SYMBOL vmlinux 0xb8930bf9 find_get_pages_contig +EXPORT_SYMBOL vmlinux 0xb89af9bf srandom32 +EXPORT_SYMBOL vmlinux 0xb8aa2342 __check_region +EXPORT_SYMBOL vmlinux 0xb8d42774 bio_integrity_alloc_bioset +EXPORT_SYMBOL vmlinux 0xb8e23403 dquot_reserve_space +EXPORT_SYMBOL vmlinux 0xb91a5085 sock_no_ioctl +EXPORT_SYMBOL vmlinux 0xb91d00c2 sk_stream_wait_connect +EXPORT_SYMBOL vmlinux 0xb91dc403 netlink_broadcast +EXPORT_SYMBOL vmlinux 0xb921afa3 sah_Free_Head_Descriptor +EXPORT_SYMBOL vmlinux 0xb938f32e napi_frags_skb +EXPORT_SYMBOL vmlinux 0xb94028fc mii_check_link +EXPORT_SYMBOL vmlinux 0xb95a678f udp_proc_register +EXPORT_SYMBOL vmlinux 0xb95f98d6 _memset_io +EXPORT_SYMBOL vmlinux 0xb9638db4 snd_pcm_rate_to_rate_bit +EXPORT_SYMBOL vmlinux 0xb97d4c9c mutex_lock +EXPORT_SYMBOL vmlinux 0xb985ea1b xfrm_state_update +EXPORT_SYMBOL vmlinux 0xb98a0185 rtc_tm_to_time +EXPORT_SYMBOL vmlinux 0xb98ef804 vm_stat +EXPORT_SYMBOL vmlinux 0xb9acd3d9 __put_user_2 +EXPORT_SYMBOL vmlinux 0xb9cb924d d_rehash +EXPORT_SYMBOL vmlinux 0xb9d3c390 soft_cursor +EXPORT_SYMBOL vmlinux 0xb9ed48db bio_add_pc_page +EXPORT_SYMBOL vmlinux 0xba03a05c simple_fsync +EXPORT_SYMBOL vmlinux 0xba38be49 i2c_del_driver +EXPORT_SYMBOL vmlinux 0xba3bda2a __downgrade_write +EXPORT_SYMBOL vmlinux 0xba497f13 loops_per_jiffy +EXPORT_SYMBOL vmlinux 0xba7d870a __mxc_cpu_type +EXPORT_SYMBOL vmlinux 0xba8f8b68 completion_done +EXPORT_SYMBOL vmlinux 0xbaaab8ae timespec_to_jiffies +EXPORT_SYMBOL vmlinux 0xbab18068 blk_rq_count_integrity_sg +EXPORT_SYMBOL vmlinux 0xbacca603 __skb_recv_datagram +EXPORT_SYMBOL vmlinux 0xbb07896a datagram_poll +EXPORT_SYMBOL vmlinux 0xbb15f247 revert_creds +EXPORT_SYMBOL vmlinux 0xbb167766 fb_var_to_videomode +EXPORT_SYMBOL vmlinux 0xbb189cad disallow_signal +EXPORT_SYMBOL vmlinux 0xbb2140b9 del_timer +EXPORT_SYMBOL vmlinux 0xbb3080c3 tcp_alloc_md5sig_pool +EXPORT_SYMBOL vmlinux 0xbb3796ec i2c_smbus_write_word_data +EXPORT_SYMBOL vmlinux 0xbb4ac735 ip_dev_find +EXPORT_SYMBOL vmlinux 0xbb5d343d xfrm_get_acqseq +EXPORT_SYMBOL vmlinux 0xbb6aa656 unregister_mtd_chip_driver +EXPORT_SYMBOL vmlinux 0xbb6adb77 dquot_claim_space +EXPORT_SYMBOL vmlinux 0xbb72d4fe __put_user_1 +EXPORT_SYMBOL vmlinux 0xbb99125c get_default_font +EXPORT_SYMBOL vmlinux 0xbbace00d pagevec_lookup +EXPORT_SYMBOL vmlinux 0xbbc77ca2 sock_i_ino +EXPORT_SYMBOL vmlinux 0xbbe4f1e7 sock_common_setsockopt +EXPORT_SYMBOL vmlinux 0xbbed701c kernel_sendpage +EXPORT_SYMBOL vmlinux 0xbbeeb2de blk_queue_max_phys_segments +EXPORT_SYMBOL vmlinux 0xbc05062a dma_pool_create +EXPORT_SYMBOL vmlinux 0xbc10dd97 __put_user_4 +EXPORT_SYMBOL vmlinux 0xbc303411 dev_unicast_unsync +EXPORT_SYMBOL vmlinux 0xbc34911f inode_get_bytes +EXPORT_SYMBOL vmlinux 0xbc3d7035 tcp4_gro_complete +EXPORT_SYMBOL vmlinux 0xbc48661f __set_page_dirty_buffers +EXPORT_SYMBOL vmlinux 0xbc488a8e scsi_test_unit_ready +EXPORT_SYMBOL vmlinux 0xbc4b0285 fsl_usb_xcvr_register +EXPORT_SYMBOL vmlinux 0xbc4c1581 snd_register_oss_device +EXPORT_SYMBOL vmlinux 0xbc4e9bd7 set_blocksize +EXPORT_SYMBOL vmlinux 0xbc876593 bio_add_page +EXPORT_SYMBOL vmlinux 0xbcaeab95 netlink_unicast +EXPORT_SYMBOL vmlinux 0xbcb600ee lookup_one_len +EXPORT_SYMBOL vmlinux 0xbcb9963c kobject_put +EXPORT_SYMBOL vmlinux 0xbcbcc692 kobject_del +EXPORT_SYMBOL vmlinux 0xbce08a33 generic_file_splice_read +EXPORT_SYMBOL vmlinux 0xbcebb676 gpio_spi_inactive +EXPORT_SYMBOL vmlinux 0xbcefed68 blkdev_issue_flush +EXPORT_SYMBOL vmlinux 0xbd1bdeef bio_pair_release +EXPORT_SYMBOL vmlinux 0xbd38ae42 check_disk_change +EXPORT_SYMBOL vmlinux 0xbd65ef36 ppp_register_compressor +EXPORT_SYMBOL vmlinux 0xbd96df7b unregister_qdisc +EXPORT_SYMBOL vmlinux 0xbdc44f4d dev_get_stats +EXPORT_SYMBOL vmlinux 0xbddac417 security_sb_set_mnt_opts +EXPORT_SYMBOL vmlinux 0xbdefa751 dm_table_event +EXPORT_SYMBOL vmlinux 0xbdf2580d __raw_readsl +EXPORT_SYMBOL vmlinux 0xbdf5c25c rb_next +EXPORT_SYMBOL vmlinux 0xbe043f0d mark_page_accessed +EXPORT_SYMBOL vmlinux 0xbe0e5118 nla_memcmp +EXPORT_SYMBOL vmlinux 0xbe146162 scsi_scan_target +EXPORT_SYMBOL vmlinux 0xbe2f8352 add_mtd_partitions +EXPORT_SYMBOL vmlinux 0xbe403c5e truncate_inode_pages +EXPORT_SYMBOL vmlinux 0xbe63ee40 request_resource +EXPORT_SYMBOL vmlinux 0xbe7aaf22 sock_alloc_send_skb +EXPORT_SYMBOL vmlinux 0xbe9c45e0 tty_register_device +EXPORT_SYMBOL vmlinux 0xbea81dd0 snd_info_free_entry +EXPORT_SYMBOL vmlinux 0xbeaf785d mxc_pg_enable +EXPORT_SYMBOL vmlinux 0xbec222f6 journal_create +EXPORT_SYMBOL vmlinux 0xbec5fe54 ioctl_by_bdev +EXPORT_SYMBOL vmlinux 0xbee206e7 sock_no_connect +EXPORT_SYMBOL vmlinux 0xbeed5af8 km_state_expired +EXPORT_SYMBOL vmlinux 0xbef43296 console_conditional_schedule +EXPORT_SYMBOL vmlinux 0xbf05c74b unregister_key_type +EXPORT_SYMBOL vmlinux 0xbf38795f snd_info_create_module_entry +EXPORT_SYMBOL vmlinux 0xbf638bf0 ppp_unregister_compressor +EXPORT_SYMBOL vmlinux 0xbf6c7739 usbotg_init +EXPORT_SYMBOL vmlinux 0xbf75f26a md_write_start +EXPORT_SYMBOL vmlinux 0xbf79ad29 proc_dointvec +EXPORT_SYMBOL vmlinux 0xbf7fd2f5 schedule_timeout_killable +EXPORT_SYMBOL vmlinux 0xbf895193 mii_ethtool_sset +EXPORT_SYMBOL vmlinux 0xbf9bcc8d __cap_empty_set +EXPORT_SYMBOL vmlinux 0xbfb0d0ff d_genocide +EXPORT_SYMBOL vmlinux 0xbfb31168 ndisc_send_skb +EXPORT_SYMBOL vmlinux 0xbfc0004a pmic_event_subscribe +EXPORT_SYMBOL vmlinux 0xbfe53a71 vfs_link +EXPORT_SYMBOL vmlinux 0xbfee3ad5 loop_unregister_transfer +EXPORT_SYMBOL vmlinux 0xbffc96da skb_dequeue +EXPORT_SYMBOL vmlinux 0xc02235f1 rtc_lock +EXPORT_SYMBOL vmlinux 0xc0527e2e sah_insert_skha_mode +EXPORT_SYMBOL vmlinux 0xc0580937 rb_erase +EXPORT_SYMBOL vmlinux 0xc07f8b8b netlink_set_err +EXPORT_SYMBOL vmlinux 0xc0823726 mii_ethtool_gset +EXPORT_SYMBOL vmlinux 0xc0878f42 sk_wait_data +EXPORT_SYMBOL vmlinux 0xc0b11968 register_key_type +EXPORT_SYMBOL vmlinux 0xc0bf6ead timecounter_cyc2time +EXPORT_SYMBOL vmlinux 0xc0df805f d_splice_alias +EXPORT_SYMBOL vmlinux 0xc11d8093 iov_shorten +EXPORT_SYMBOL vmlinux 0xc122ab61 qdisc_destroy +EXPORT_SYMBOL vmlinux 0xc15f9ddc scsi_init_io +EXPORT_SYMBOL vmlinux 0xc15fea6c mxc_iomux_get_pad +EXPORT_SYMBOL vmlinux 0xc15ff6f7 d_path +EXPORT_SYMBOL vmlinux 0xc1601a4f _change_bit_le +EXPORT_SYMBOL vmlinux 0xc194820a nf_getsockopt +EXPORT_SYMBOL vmlinux 0xc1cfe3e7 proc_dostring +EXPORT_SYMBOL vmlinux 0xc1d25811 pipe_unlock +EXPORT_SYMBOL vmlinux 0xc1eb6ea7 is_container_init +EXPORT_SYMBOL vmlinux 0xc1f51b5c ipv6_setsockopt +EXPORT_SYMBOL vmlinux 0xc1fc4511 _test_and_change_bit_le +EXPORT_SYMBOL vmlinux 0xc2066af0 batostr +EXPORT_SYMBOL vmlinux 0xc22616f1 __init_rwsem +EXPORT_SYMBOL vmlinux 0xc256e762 __bitmap_equal +EXPORT_SYMBOL vmlinux 0xc272a1f7 blk_complete_request +EXPORT_SYMBOL vmlinux 0xc27487dd __bug +EXPORT_SYMBOL vmlinux 0xc2b11153 sysctl_jiffies +EXPORT_SYMBOL vmlinux 0xc2e12bb9 unbind_con_driver +EXPORT_SYMBOL vmlinux 0xc2e587d1 reset_devices +EXPORT_SYMBOL vmlinux 0xc30a38fb tty_devnum +EXPORT_SYMBOL vmlinux 0xc30d127c tty_port_alloc_xmit_buf +EXPORT_SYMBOL vmlinux 0xc31298d3 set_binfmt +EXPORT_SYMBOL vmlinux 0xc34e84f7 notify_change +EXPORT_SYMBOL vmlinux 0xc359fb65 abort +EXPORT_SYMBOL vmlinux 0xc37e72b2 scsi_mode_sense +EXPORT_SYMBOL vmlinux 0xc3a0d995 kfree_skb +EXPORT_SYMBOL vmlinux 0xc3bf7f97 tcp_splice_read +EXPORT_SYMBOL vmlinux 0xc3c19d02 seq_putc +EXPORT_SYMBOL vmlinux 0xc3ca7f84 neigh_table_init +EXPORT_SYMBOL vmlinux 0xc3cf1128 in_group_p +EXPORT_SYMBOL vmlinux 0xc3cf2ece generic_osync_inode +EXPORT_SYMBOL vmlinux 0xc4055636 atm_alloc_charge +EXPORT_SYMBOL vmlinux 0xc412caac tcp_child_process +EXPORT_SYMBOL vmlinux 0xc42c4343 sock_queue_rcv_skb +EXPORT_SYMBOL vmlinux 0xc440c451 sg_alloc_table +EXPORT_SYMBOL vmlinux 0xc45d883c input_register_device +EXPORT_SYMBOL vmlinux 0xc46534cc audit_log_format +EXPORT_SYMBOL vmlinux 0xc4693892 kernel_sock_shutdown +EXPORT_SYMBOL vmlinux 0xc481e857 __napi_complete +EXPORT_SYMBOL vmlinux 0xc48c23a7 vm_map_ram +EXPORT_SYMBOL vmlinux 0xc499ae1e kstrdup +EXPORT_SYMBOL vmlinux 0xc4dfd882 snd_dma_alloc_pages_fallback +EXPORT_SYMBOL vmlinux 0xc4ef78f1 thaw_process +EXPORT_SYMBOL vmlinux 0xc50ec74d sah_Alloc_Link +EXPORT_SYMBOL vmlinux 0xc52f5714 fb_videomode_to_var +EXPORT_SYMBOL vmlinux 0xc533ad07 ip6_route_output +EXPORT_SYMBOL vmlinux 0xc5518d5d kthread_create +EXPORT_SYMBOL vmlinux 0xc58c2798 snd_card_proc_new +EXPORT_SYMBOL vmlinux 0xc595f2be bd_set_size +EXPORT_SYMBOL vmlinux 0xc5bb2f5a netpoll_poll +EXPORT_SYMBOL vmlinux 0xc5bc31eb cdrom_release +EXPORT_SYMBOL vmlinux 0xc5cfcaa2 xfrm_unregister_type +EXPORT_SYMBOL vmlinux 0xc5d98e5c journal_abort +EXPORT_SYMBOL vmlinux 0xc5e19feb kmem_cache_alloc +EXPORT_SYMBOL vmlinux 0xc6123640 ethtool_op_set_tx_hw_csum +EXPORT_SYMBOL vmlinux 0xc6184045 cpu_possible_mask +EXPORT_SYMBOL vmlinux 0xc622eeba unregister_nls +EXPORT_SYMBOL vmlinux 0xc633495b schedule_work +EXPORT_SYMBOL vmlinux 0xc64169b1 unregister_cdrom +EXPORT_SYMBOL vmlinux 0xc6afc896 snd_pcm_release_substream +EXPORT_SYMBOL vmlinux 0xc6c3f4e6 inet_release +EXPORT_SYMBOL vmlinux 0xc6e33578 genphy_restart_aneg +EXPORT_SYMBOL vmlinux 0xc722227e posix_acl_clone +EXPORT_SYMBOL vmlinux 0xc748d9bc xfrm4_rcv_encap +EXPORT_SYMBOL vmlinux 0xc758f7ee bitmap_start_sync +EXPORT_SYMBOL vmlinux 0xc7671fb5 poll_freewait +EXPORT_SYMBOL vmlinux 0xc76bff19 ppp_input +EXPORT_SYMBOL vmlinux 0xc7884409 jbd2_journal_get_write_access +EXPORT_SYMBOL vmlinux 0xc79bcd36 dm_vcalloc +EXPORT_SYMBOL vmlinux 0xc7a2eb08 bmap +EXPORT_SYMBOL vmlinux 0xc7a4fbed rtnl_lock +EXPORT_SYMBOL vmlinux 0xc7ead6bf lock_super +EXPORT_SYMBOL vmlinux 0xc7ec6c27 strspn +EXPORT_SYMBOL vmlinux 0xc7eee87e get_mem_type +EXPORT_SYMBOL vmlinux 0xc7f0e425 sah_Alloc_Head_Descriptor +EXPORT_SYMBOL vmlinux 0xc7f8874b seq_escape +EXPORT_SYMBOL vmlinux 0xc80de694 down_write_trylock +EXPORT_SYMBOL vmlinux 0xc81c09e7 jbd2_journal_errno +EXPORT_SYMBOL vmlinux 0xc84e3a3c inet_sendmsg +EXPORT_SYMBOL vmlinux 0xc86b2524 jbd2_log_start_commit +EXPORT_SYMBOL vmlinux 0xc87a707c backlight_device_unregister +EXPORT_SYMBOL vmlinux 0xc87d9e40 tcf_hash_create +EXPORT_SYMBOL vmlinux 0xc8b3d6d2 blk_plug_device +EXPORT_SYMBOL vmlinux 0xc8b57c27 autoremove_wake_function +EXPORT_SYMBOL vmlinux 0xc8ce76cc input_filter_device +EXPORT_SYMBOL vmlinux 0xc8db3dbd end_buffer_async_write +EXPORT_SYMBOL vmlinux 0xc8f45422 unregister_quota_format +EXPORT_SYMBOL vmlinux 0xc8fe8dbc hci_conn_security +EXPORT_SYMBOL vmlinux 0xc9190aca xfrm4_rcv +EXPORT_SYMBOL vmlinux 0xc9334665 tcp_proc_unregister +EXPORT_SYMBOL vmlinux 0xc93fe441 blk_queue_update_dma_pad +EXPORT_SYMBOL vmlinux 0xc9710260 pmic_adc_set_touch_mode +EXPORT_SYMBOL vmlinux 0xc998d641 icmp_err_convert +EXPORT_SYMBOL vmlinux 0xc99c8024 blk_rq_map_kern +EXPORT_SYMBOL vmlinux 0xc9b662aa filemap_write_and_wait_range +EXPORT_SYMBOL vmlinux 0xc9b76cfc make_EII_client +EXPORT_SYMBOL vmlinux 0xc9dd334f gnet_stats_copy_basic +EXPORT_SYMBOL vmlinux 0xc9de6054 ppp_channel_index +EXPORT_SYMBOL vmlinux 0xca09e9e3 journal_release_buffer +EXPORT_SYMBOL vmlinux 0xca14a020 mb_cache_create +EXPORT_SYMBOL vmlinux 0xca5dbc50 scsi_print_sense_hdr +EXPORT_SYMBOL vmlinux 0xca648291 __find_get_block +EXPORT_SYMBOL vmlinux 0xca674254 journal_errno +EXPORT_SYMBOL vmlinux 0xca7376da uart_unregister_driver +EXPORT_SYMBOL vmlinux 0xcaa33122 register_sysctl_paths +EXPORT_SYMBOL vmlinux 0xcb01f8d4 set_page_dirty_lock +EXPORT_SYMBOL vmlinux 0xcb0b538a journal_invalidatepage +EXPORT_SYMBOL vmlinux 0xcb1ebfa9 __task_pid_nr_ns +EXPORT_SYMBOL vmlinux 0xcb3fa154 cdev_index +EXPORT_SYMBOL vmlinux 0xcb6473bb uart_write_wakeup +EXPORT_SYMBOL vmlinux 0xcb6beb40 hweight32 +EXPORT_SYMBOL vmlinux 0xcb7131fb fb_get_options +EXPORT_SYMBOL vmlinux 0xcb79d83c clk_round_rate +EXPORT_SYMBOL vmlinux 0xcb9c6488 security_task_getsecid +EXPORT_SYMBOL vmlinux 0xcbc29f4e gen_new_estimator +EXPORT_SYMBOL vmlinux 0xcbdc5d47 tcp_poll +EXPORT_SYMBOL vmlinux 0xcbe205de tty_port_hangup +EXPORT_SYMBOL vmlinux 0xcbeeed44 sync_inode +EXPORT_SYMBOL vmlinux 0xcbf37eb2 elv_rb_former_request +EXPORT_SYMBOL vmlinux 0xcc060dd7 timecompare_transform +EXPORT_SYMBOL vmlinux 0xcc0eef78 inet_frags_fini +EXPORT_SYMBOL vmlinux 0xcc11fec5 rfkill_get_led_trigger_name +EXPORT_SYMBOL vmlinux 0xcc1fb551 baswap +EXPORT_SYMBOL vmlinux 0xcc36f32e fb_unregister_client +EXPORT_SYMBOL vmlinux 0xcc5005fe msleep_interruptible +EXPORT_SYMBOL vmlinux 0xcc67f979 otg_put_transceiver +EXPORT_SYMBOL vmlinux 0xcc75b59c get_sb_single +EXPORT_SYMBOL vmlinux 0xcc7fa952 local_bh_enable_ip +EXPORT_SYMBOL vmlinux 0xcc861286 xfrm_state_insert +EXPORT_SYMBOL vmlinux 0xcca270c3 ipu_init_channel_buffer +EXPORT_SYMBOL vmlinux 0xccb8647b register_md_personality +EXPORT_SYMBOL vmlinux 0xccc1cb6c fb_get_mode +EXPORT_SYMBOL vmlinux 0xcccca482 _test_and_clear_bit_le +EXPORT_SYMBOL vmlinux 0xccd9c420 clk_register +EXPORT_SYMBOL vmlinux 0xcd083b10 unregister_sound_dsp +EXPORT_SYMBOL vmlinux 0xcd1b8e40 tcf_hash_check +EXPORT_SYMBOL vmlinux 0xcd246343 __tcp_get_md5sig_pool +EXPORT_SYMBOL vmlinux 0xcd3e4b83 ilookup +EXPORT_SYMBOL vmlinux 0xcd5a8c89 open_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xcd63c845 __aeabi_lasr +EXPORT_SYMBOL vmlinux 0xcd9ad228 tty_port_block_til_ready +EXPORT_SYMBOL vmlinux 0xcdacf82c snd_ctl_add +EXPORT_SYMBOL vmlinux 0xce19bac5 register_inet6addr_notifier +EXPORT_SYMBOL vmlinux 0xce36ded6 sysctl_tcp_mem +EXPORT_SYMBOL vmlinux 0xce3ca308 copy_from_user_toio +EXPORT_SYMBOL vmlinux 0xce40e8c3 tcp_simple_retransmit +EXPORT_SYMBOL vmlinux 0xce4fb93d scsi_device_quiesce +EXPORT_SYMBOL vmlinux 0xce57864d request_key_async_with_auxdata +EXPORT_SYMBOL vmlinux 0xce5ac24f zlib_inflate_workspacesize +EXPORT_SYMBOL vmlinux 0xce83930d register_sound_dsp +EXPORT_SYMBOL vmlinux 0xce86b180 serio_close +EXPORT_SYMBOL vmlinux 0xce86ba17 sync_mapping_buffers +EXPORT_SYMBOL vmlinux 0xce8e3338 skb_find_text +EXPORT_SYMBOL vmlinux 0xce99551b gpio_owire_active +EXPORT_SYMBOL vmlinux 0xcea6f4f2 tcp_rcv_established +EXPORT_SYMBOL vmlinux 0xcec9708c journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xcecfecaa tcf_exts_destroy +EXPORT_SYMBOL vmlinux 0xced8290b inet_bind +EXPORT_SYMBOL vmlinux 0xcf048503 ip_setsockopt +EXPORT_SYMBOL vmlinux 0xcf0efef9 sockfd_lookup +EXPORT_SYMBOL vmlinux 0xcf181f8a mb_cache_entry_find_first +EXPORT_SYMBOL vmlinux 0xcf514c34 register_filesystem +EXPORT_SYMBOL vmlinux 0xcf66fa25 tcf_em_tree_dump +EXPORT_SYMBOL vmlinux 0xcf6a616d module_refcount +EXPORT_SYMBOL vmlinux 0xcf748c54 generic_read_dir +EXPORT_SYMBOL vmlinux 0xcf8c2698 fsl_usb_host_init +EXPORT_SYMBOL vmlinux 0xcf91f8a7 fib_default_rule_add +EXPORT_SYMBOL vmlinux 0xcfb9006e jiffies_to_timeval +EXPORT_SYMBOL vmlinux 0xcfc921a0 snd_pcm_hw_refine +EXPORT_SYMBOL vmlinux 0xcff53400 kref_put +EXPORT_SYMBOL vmlinux 0xcff7e554 ip_queue_xmit +EXPORT_SYMBOL vmlinux 0xcfff2b41 ipu_disable_channel +EXPORT_SYMBOL vmlinux 0xd00fccde fsl_shw_establish_key +EXPORT_SYMBOL vmlinux 0xd0104706 bdi_unregister +EXPORT_SYMBOL vmlinux 0xd0181f4f __bitmap_xor +EXPORT_SYMBOL vmlinux 0xd027a5f0 sk_stop_timer +EXPORT_SYMBOL vmlinux 0xd06fbc08 tty_check_change +EXPORT_SYMBOL vmlinux 0xd078f130 sk_stream_error +EXPORT_SYMBOL vmlinux 0xd09e5ab4 blk_queue_io_min +EXPORT_SYMBOL vmlinux 0xd0b9b8b8 snd_interval_list +EXPORT_SYMBOL vmlinux 0xd0cc6cb9 qdisc_calculate_pkt_len +EXPORT_SYMBOL vmlinux 0xd0d458c8 mb_cache_shrink +EXPORT_SYMBOL vmlinux 0xd0ee38b8 schedule_timeout_uninterruptible +EXPORT_SYMBOL vmlinux 0xd0f0e40d mmc_wait_for_cmd +EXPORT_SYMBOL vmlinux 0xd10d4041 mmc_alloc_host +EXPORT_SYMBOL vmlinux 0xd1157735 release_and_free_resource +EXPORT_SYMBOL vmlinux 0xd11cd617 scsicam_bios_param +EXPORT_SYMBOL vmlinux 0xd141dcd8 posix_test_lock +EXPORT_SYMBOL vmlinux 0xd1a93033 jbd2_journal_revoke +EXPORT_SYMBOL vmlinux 0xd1cd7ae0 load_nls +EXPORT_SYMBOL vmlinux 0xd1d08d2b close_bdev_exclusive +EXPORT_SYMBOL vmlinux 0xd201129d skb_queue_tail +EXPORT_SYMBOL vmlinux 0xd21cb310 neigh_table_init_no_netlink +EXPORT_SYMBOL vmlinux 0xd2456d8b dm_exception_store_create +EXPORT_SYMBOL vmlinux 0xd251d7b0 security_socket_getpeersec_dgram +EXPORT_SYMBOL vmlinux 0xd2555f19 jiffies_64_to_clock_t +EXPORT_SYMBOL vmlinux 0xd2557f5b hci_conn_change_link_key +EXPORT_SYMBOL vmlinux 0xd25d4f74 console_blank_hook +EXPORT_SYMBOL vmlinux 0xd26670c7 sock_no_mmap +EXPORT_SYMBOL vmlinux 0xd26a9205 mc13892_bklit_get_dutycycle +EXPORT_SYMBOL vmlinux 0xd2965f6f kthread_should_stop +EXPORT_SYMBOL vmlinux 0xd298af43 gpio_usbh1_setback_stp +EXPORT_SYMBOL vmlinux 0xd2a35f1e hci_conn_switch_role +EXPORT_SYMBOL vmlinux 0xd2bd032e nf_unregister_queue_handler +EXPORT_SYMBOL vmlinux 0xd2da3da9 fsl_shw_symmetric_encrypt +EXPORT_SYMBOL vmlinux 0xd2ef1018 scsi_device_resume +EXPORT_SYMBOL vmlinux 0xd301f936 seq_path +EXPORT_SYMBOL vmlinux 0xd3030253 release_sock +EXPORT_SYMBOL vmlinux 0xd31122d6 blk_queue_logical_block_size +EXPORT_SYMBOL vmlinux 0xd32e52c7 posix_acl_chmod_masq +EXPORT_SYMBOL vmlinux 0xd3427f73 mempool_create_node +EXPORT_SYMBOL vmlinux 0xd36f7cc6 tty_chars_in_buffer +EXPORT_SYMBOL vmlinux 0xd38f3f27 arp_find +EXPORT_SYMBOL vmlinux 0xd3929d4d __skb_checksum_complete +EXPORT_SYMBOL vmlinux 0xd398eb61 sah_Descriptor_Chain_Execute +EXPORT_SYMBOL vmlinux 0xd3a0c7fb init_task +EXPORT_SYMBOL vmlinux 0xd3a520c1 inet_csk_reset_keepalive_timer +EXPORT_SYMBOL vmlinux 0xd3ac4bd6 netif_rx +EXPORT_SYMBOL vmlinux 0xd3b9324d tcp_gro_receive +EXPORT_SYMBOL vmlinux 0xd3d96765 single_open +EXPORT_SYMBOL vmlinux 0xd3dbfbc4 _find_first_zero_bit_le +EXPORT_SYMBOL vmlinux 0xd3dcbfe9 generic_file_readonly_mmap +EXPORT_SYMBOL vmlinux 0xd40cf329 free_task +EXPORT_SYMBOL vmlinux 0xd4107e8f dma_cache_maint_page +EXPORT_SYMBOL vmlinux 0xd418e1c0 adjust_resource +EXPORT_SYMBOL vmlinux 0xd431f3ef dev_unicast_sync +EXPORT_SYMBOL vmlinux 0xd45afaf1 hci_register_dev +EXPORT_SYMBOL vmlinux 0xd472b94f do_munmap +EXPORT_SYMBOL vmlinux 0xd4753219 serio_rescan +EXPORT_SYMBOL vmlinux 0xd47f0098 mb_cache_entry_insert +EXPORT_SYMBOL vmlinux 0xd49f28d0 snd_pcm_new +EXPORT_SYMBOL vmlinux 0xd4a82010 xfrm_policy_walk +EXPORT_SYMBOL vmlinux 0xd4f77b34 block_write_begin +EXPORT_SYMBOL vmlinux 0xd51a05b4 skb_copy_and_csum_bits +EXPORT_SYMBOL vmlinux 0xd521bfa7 udp_lib_setsockopt +EXPORT_SYMBOL vmlinux 0xd5263820 mb_cache_destroy +EXPORT_SYMBOL vmlinux 0xd555d031 mpage_readpages +EXPORT_SYMBOL vmlinux 0xd56389b9 scc_zeroize_memories +EXPORT_SYMBOL vmlinux 0xd5688a7a radix_tree_insert +EXPORT_SYMBOL vmlinux 0xd57ecc92 block_read_full_page +EXPORT_SYMBOL vmlinux 0xd58c6c47 jbd2_journal_dirty_metadata +EXPORT_SYMBOL vmlinux 0xd5a6e632 put_io_context +EXPORT_SYMBOL vmlinux 0xd5c26d70 nla_append +EXPORT_SYMBOL vmlinux 0xd5d95575 inet_sock_destruct +EXPORT_SYMBOL vmlinux 0xd5eb1207 tcp_tso_segment +EXPORT_SYMBOL vmlinux 0xd5eb1a34 __starget_for_each_device +EXPORT_SYMBOL vmlinux 0xd5ec0773 skb_push +EXPORT_SYMBOL vmlinux 0xd627480b strncat +EXPORT_SYMBOL vmlinux 0xd62c833f schedule_timeout +EXPORT_SYMBOL vmlinux 0xd62c8d36 vfs_create +EXPORT_SYMBOL vmlinux 0xd64180dd sah_register +EXPORT_SYMBOL vmlinux 0xd65426ae filemap_fdatawrite_range +EXPORT_SYMBOL vmlinux 0xd6546fb5 skb_split +EXPORT_SYMBOL vmlinux 0xd65edaaf neigh_sysctl_register +EXPORT_SYMBOL vmlinux 0xd66c6228 down_read_trylock +EXPORT_SYMBOL vmlinux 0xd69f282f dquot_scan_active +EXPORT_SYMBOL vmlinux 0xd6a78d08 smp_call_function_single +EXPORT_SYMBOL vmlinux 0xd6c4cea4 bt_accept_dequeue +EXPORT_SYMBOL vmlinux 0xd6cb1954 iov_iter_copy_from_user +EXPORT_SYMBOL vmlinux 0xd6d497b3 tcp_v4_md5_do_add +EXPORT_SYMBOL vmlinux 0xd6ee688f vmalloc +EXPORT_SYMBOL vmlinux 0xd7072a67 block_commit_write +EXPORT_SYMBOL vmlinux 0xd715fe0a fget +EXPORT_SYMBOL vmlinux 0xd72bca20 sock_i_uid +EXPORT_SYMBOL vmlinux 0xd7519e19 path_get +EXPORT_SYMBOL vmlinux 0xd77a5aa5 __bitmap_and +EXPORT_SYMBOL vmlinux 0xd78ccf8b neigh_seq_next +EXPORT_SYMBOL vmlinux 0xd79b5a02 allow_signal +EXPORT_SYMBOL vmlinux 0xd7b02fae d_obtain_alias +EXPORT_SYMBOL vmlinux 0xd7b0824f tc_classify_compat +EXPORT_SYMBOL vmlinux 0xd7b37ae6 sah_Append_Desc +EXPORT_SYMBOL vmlinux 0xd7b3cf92 blk_init_queue_node +EXPORT_SYMBOL vmlinux 0xd7b69fae idr_find +EXPORT_SYMBOL vmlinux 0xd7ef8e28 test_set_page_writeback +EXPORT_SYMBOL vmlinux 0xd7f45d7c mxc_pg_disable +EXPORT_SYMBOL vmlinux 0xd803cffb posix_acl_permission +EXPORT_SYMBOL vmlinux 0xd80c52ff journal_blocks_per_page +EXPORT_SYMBOL vmlinux 0xd81bcaed tcp_check_req +EXPORT_SYMBOL vmlinux 0xd820e78f tcp_enter_memory_pressure +EXPORT_SYMBOL vmlinux 0xd8282ff0 posix_acl_equiv_mode +EXPORT_SYMBOL vmlinux 0xd82c541e xfrm_state_flush +EXPORT_SYMBOL vmlinux 0xd83791bc nf_conntrack_destroy +EXPORT_SYMBOL vmlinux 0xd838bca5 iw_handler_get_spy +EXPORT_SYMBOL vmlinux 0xd865d065 do_mmap_pgoff +EXPORT_SYMBOL vmlinux 0xd87e2fd0 fifo_set_limit +EXPORT_SYMBOL vmlinux 0xd87e62d1 netif_carrier_off +EXPORT_SYMBOL vmlinux 0xd89c31c8 mmc_resume_host +EXPORT_SYMBOL vmlinux 0xd8a28595 dquot_alloc_space +EXPORT_SYMBOL vmlinux 0xd8a2ab95 in_egroup_p +EXPORT_SYMBOL vmlinux 0xd8a36254 elv_queue_empty +EXPORT_SYMBOL vmlinux 0xd8a8cd94 ethtool_op_get_ufo +EXPORT_SYMBOL vmlinux 0xd8ade756 blk_execute_rq +EXPORT_SYMBOL vmlinux 0xd8af44b6 tcp_gro_complete +EXPORT_SYMBOL vmlinux 0xd8e484f0 register_chrdev_region +EXPORT_SYMBOL vmlinux 0xd8e4f776 mb_cache_entry_get +EXPORT_SYMBOL vmlinux 0xd91503a6 empty_zero_page +EXPORT_SYMBOL vmlinux 0xd928a4a5 security_file_permission +EXPORT_SYMBOL vmlinux 0xd95eeba4 linkwatch_fire_event +EXPORT_SYMBOL vmlinux 0xd985dc99 mempool_free_pages +EXPORT_SYMBOL vmlinux 0xd9ab10eb __netif_schedule +EXPORT_SYMBOL vmlinux 0xd9ae0a2d nf_log_register +EXPORT_SYMBOL vmlinux 0xd9bdb253 dev_disable_lro +EXPORT_SYMBOL vmlinux 0xd9c5ed66 snd_ctl_find_numid +EXPORT_SYMBOL vmlinux 0xd9ce8f0c strnlen +EXPORT_SYMBOL vmlinux 0xd9d0f0a3 i2c_del_adapter +EXPORT_SYMBOL vmlinux 0xd9d8164e blk_queue_make_request +EXPORT_SYMBOL vmlinux 0xda035133 __seq_open_private +EXPORT_SYMBOL vmlinux 0xda1a7335 kasprintf +EXPORT_SYMBOL vmlinux 0xda1fc224 cpu_cache +EXPORT_SYMBOL vmlinux 0xda37e818 nf_log_bind_pf +EXPORT_SYMBOL vmlinux 0xda3cb8b1 tcf_hash_destroy +EXPORT_SYMBOL vmlinux 0xda3da63f deny_write_access +EXPORT_SYMBOL vmlinux 0xda52acd0 fb_set_suspend +EXPORT_SYMBOL vmlinux 0xda59b6c6 snd_card_create +EXPORT_SYMBOL vmlinux 0xda5b61c7 dquot_destroy +EXPORT_SYMBOL vmlinux 0xda5ea696 _test_and_set_bit_le +EXPORT_SYMBOL vmlinux 0xda62985e snd_pcm_lib_ioctl +EXPORT_SYMBOL vmlinux 0xda7ca6cb fb_mode_is_equal +EXPORT_SYMBOL vmlinux 0xda81a2dd vfs_symlink +EXPORT_SYMBOL vmlinux 0xda8af7ad fb_find_nearest_mode +EXPORT_SYMBOL vmlinux 0xda8b5096 xfrm_cfg_mutex +EXPORT_SYMBOL vmlinux 0xdad4dcdd skb_copy +EXPORT_SYMBOL vmlinux 0xdaf66409 jbd2_log_wait_commit +EXPORT_SYMBOL vmlinux 0xdb3f00bf bio_kmalloc +EXPORT_SYMBOL vmlinux 0xdb45f05e balance_dirty_pages_ratelimited_nr +EXPORT_SYMBOL vmlinux 0xdb4c88b4 groups_alloc +EXPORT_SYMBOL vmlinux 0xdb4d7fd6 skb_queue_purge +EXPORT_SYMBOL vmlinux 0xdb6a6ceb snd_pcm_hw_constraint_minmax +EXPORT_SYMBOL vmlinux 0xdb7571a7 ps2_sendbyte +EXPORT_SYMBOL vmlinux 0xdb7e8414 ipu_set_csc_coefficients +EXPORT_SYMBOL vmlinux 0xdb864d65 iov_iter_single_seg_count +EXPORT_SYMBOL vmlinux 0xdb905a57 path_put +EXPORT_SYMBOL vmlinux 0xdb96bfcf register_atm_ioctl +EXPORT_SYMBOL vmlinux 0xdb9f674e serio_unregister_port +EXPORT_SYMBOL vmlinux 0xdbb7bc32 seq_read +EXPORT_SYMBOL vmlinux 0xdbc212c8 napi_get_frags +EXPORT_SYMBOL vmlinux 0xdbcd416e sysctl_ip_nonlocal_bind +EXPORT_SYMBOL vmlinux 0xdbe42139 cad_pid +EXPORT_SYMBOL vmlinux 0xdbe89c40 console_stop +EXPORT_SYMBOL vmlinux 0xdbeac6d1 hci_suspend_dev +EXPORT_SYMBOL vmlinux 0xdc047fc4 scsi_dev_info_list_add_keyed +EXPORT_SYMBOL vmlinux 0xdc053205 udp_memory_allocated +EXPORT_SYMBOL vmlinux 0xdc1068a3 dma_pool_destroy +EXPORT_SYMBOL vmlinux 0xdc24a3b9 mxc_dma_get_config +EXPORT_SYMBOL vmlinux 0xdc2adb35 add_taint +EXPORT_SYMBOL vmlinux 0xdc2c3003 mx51_babbage_gpio_spi_chipselect_active +EXPORT_SYMBOL vmlinux 0xdc317844 file_remove_suid +EXPORT_SYMBOL vmlinux 0xdc43a9c8 daemonize +EXPORT_SYMBOL vmlinux 0xdc43b8c8 bio_integrity_advance +EXPORT_SYMBOL vmlinux 0xdc4d448d eth_rebuild_header +EXPORT_SYMBOL vmlinux 0xdc60c7b9 snd_jack_new +EXPORT_SYMBOL vmlinux 0xdc7d6475 blk_recount_segments +EXPORT_SYMBOL vmlinux 0xdca5cd2e fsl_shw_smalloc +EXPORT_SYMBOL vmlinux 0xdca89b06 alloc_tty_driver +EXPORT_SYMBOL vmlinux 0xdcb0349b sys_close +EXPORT_SYMBOL vmlinux 0xdcbad7f9 flush_signals +EXPORT_SYMBOL vmlinux 0xdcc4d62e dm_unregister_target +EXPORT_SYMBOL vmlinux 0xdce8b028 splice_from_pipe_begin +EXPORT_SYMBOL vmlinux 0xdd016c07 unregister_con_driver +EXPORT_SYMBOL vmlinux 0xdd0a2ba2 strlcat +EXPORT_SYMBOL vmlinux 0xdd0f266d fsl_usb_xcvr_suspend +EXPORT_SYMBOL vmlinux 0xdd27fa87 memchr +EXPORT_SYMBOL vmlinux 0xdd2a9989 remove_proc_entry +EXPORT_SYMBOL vmlinux 0xdd38fea3 snd_info_register +EXPORT_SYMBOL vmlinux 0xdd6bfccd radix_tree_tag_set +EXPORT_SYMBOL vmlinux 0xddd289b2 mxc_free_iomux +EXPORT_SYMBOL vmlinux 0xddec29a9 dm_dirty_log_create +EXPORT_SYMBOL vmlinux 0xddf925e0 dev_queue_xmit +EXPORT_SYMBOL vmlinux 0xde3c68a6 cpu_online_mask +EXPORT_SYMBOL vmlinux 0xde75b689 set_irq_type +EXPORT_SYMBOL vmlinux 0xde9360ba totalram_pages +EXPORT_SYMBOL vmlinux 0xde9ac18d ip_ct_attach +EXPORT_SYMBOL vmlinux 0xdeaaec30 scsi_eh_finish_cmd +EXPORT_SYMBOL vmlinux 0xdeacf3fb ip6_frag_init +EXPORT_SYMBOL vmlinux 0xded679d3 mxc_dma_set_bd_intr +EXPORT_SYMBOL vmlinux 0xdef4286d lro_flush_pkt +EXPORT_SYMBOL vmlinux 0xdefac62a scsi_eh_restore_cmnd +EXPORT_SYMBOL vmlinux 0xdf16efc2 vfsmount_lock +EXPORT_SYMBOL vmlinux 0xdf2ebb70 __dev_getfirstbyhwtype +EXPORT_SYMBOL vmlinux 0xdf32e340 scsi_ioctl +EXPORT_SYMBOL vmlinux 0xdf3329b8 apm_queue_event +EXPORT_SYMBOL vmlinux 0xdf43a112 bio_phys_segments +EXPORT_SYMBOL vmlinux 0xdf4c8767 ns_to_timeval +EXPORT_SYMBOL vmlinux 0xdf4cb8a3 ip6_route_me_harder +EXPORT_SYMBOL vmlinux 0xdf60cc27 __print_symbol +EXPORT_SYMBOL vmlinux 0xdf728eec neigh_compat_output +EXPORT_SYMBOL vmlinux 0xdf929370 fs_overflowgid +EXPORT_SYMBOL vmlinux 0xdfb01a80 cpu_v7_dcache_clean_area +EXPORT_SYMBOL vmlinux 0xdfc5169b slhc_init +EXPORT_SYMBOL vmlinux 0xdfecbdcb gpio_sensor_active +EXPORT_SYMBOL vmlinux 0xdfedf084 blk_queue_update_dma_alignment +EXPORT_SYMBOL vmlinux 0xe000aa72 snd_timer_continue +EXPORT_SYMBOL vmlinux 0xe0025f29 inet6_ioctl +EXPORT_SYMBOL vmlinux 0xe016bb7d generic_ro_fops +EXPORT_SYMBOL vmlinux 0xe03dfed5 vcc_release_async +EXPORT_SYMBOL vmlinux 0xe056a821 kernel_setsockopt +EXPORT_SYMBOL vmlinux 0xe075d6eb iter_div_u64_rem +EXPORT_SYMBOL vmlinux 0xe0878bfe __krealloc +EXPORT_SYMBOL vmlinux 0xe09d129e inet_put_port +EXPORT_SYMBOL vmlinux 0xe0aa832c tty_pair_get_tty +EXPORT_SYMBOL vmlinux 0xe0b13336 argv_free +EXPORT_SYMBOL vmlinux 0xe0bc24a1 param_set_ushort +EXPORT_SYMBOL vmlinux 0xe0e77a8b journal_update_format +EXPORT_SYMBOL vmlinux 0xe0f670ee unregister_netdevice +EXPORT_SYMBOL vmlinux 0xe113bbbc csum_partial +EXPORT_SYMBOL vmlinux 0xe121b3e7 bio_copy_user +EXPORT_SYMBOL vmlinux 0xe160c608 bio_get_nr_vecs +EXPORT_SYMBOL vmlinux 0xe1702893 __scm_send +EXPORT_SYMBOL vmlinux 0xe1761617 security_inet_conn_request +EXPORT_SYMBOL vmlinux 0xe1a81c3a icmpv6msg_statistics +EXPORT_SYMBOL vmlinux 0xe1aa1dac snd_pcm_notify +EXPORT_SYMBOL vmlinux 0xe1c77f0f mxc_dma_disable +EXPORT_SYMBOL vmlinux 0xe1db4985 init_timer_key +EXPORT_SYMBOL vmlinux 0xe1f17b1f task_nice +EXPORT_SYMBOL vmlinux 0xe200f872 secure_dccpv6_sequence_number +EXPORT_SYMBOL vmlinux 0xe2288002 unregister_md_personality +EXPORT_SYMBOL vmlinux 0xe24d3a97 jiffies_64 +EXPORT_SYMBOL vmlinux 0xe28f7687 security_d_instantiate +EXPORT_SYMBOL vmlinux 0xe2a451c9 cfb_fillrect +EXPORT_SYMBOL vmlinux 0xe2c5f281 genphy_read_status +EXPORT_SYMBOL vmlinux 0xe2d5255a strcmp +EXPORT_SYMBOL vmlinux 0xe2e365f1 vfs_set_dqinfo +EXPORT_SYMBOL vmlinux 0xe2e8065e memdup_user +EXPORT_SYMBOL vmlinux 0xe2f61994 jbd2_journal_clear_features +EXPORT_SYMBOL vmlinux 0xe2fae716 kmemdup +EXPORT_SYMBOL vmlinux 0xe303435e phy_driver_unregister +EXPORT_SYMBOL vmlinux 0xe30c3600 __register_binfmt +EXPORT_SYMBOL vmlinux 0xe31c8061 cfi_varsize_frob +EXPORT_SYMBOL vmlinux 0xe3333db9 dma_map_sg +EXPORT_SYMBOL vmlinux 0xe3350073 in6_dev_finish_destroy +EXPORT_SYMBOL vmlinux 0xe351633f genl_register_family +EXPORT_SYMBOL vmlinux 0xe35c3615 rfkill_alloc +EXPORT_SYMBOL vmlinux 0xe35d1b5f hci_connect +EXPORT_SYMBOL vmlinux 0xe3601ba8 lock_may_write +EXPORT_SYMBOL vmlinux 0xe3612a98 dev_addr_add +EXPORT_SYMBOL vmlinux 0xe3671cd9 ipv6_skip_exthdr +EXPORT_SYMBOL vmlinux 0xe3b34de4 security_path_symlink +EXPORT_SYMBOL vmlinux 0xe3bb4f0e bio_sector_offset +EXPORT_SYMBOL vmlinux 0xe3c85cc6 set_anon_super +EXPORT_SYMBOL vmlinux 0xe3ee8b5b blk_alloc_queue_node +EXPORT_SYMBOL vmlinux 0xe3f2a0cf dquot_transfer +EXPORT_SYMBOL vmlinux 0xe3f92363 usb_host_wakeup_irq +EXPORT_SYMBOL vmlinux 0xe416570f fsl_shw_establish_keystore +EXPORT_SYMBOL vmlinux 0xe45f7762 dm_exception_store_type_unregister +EXPORT_SYMBOL vmlinux 0xe45faa46 tty_wait_until_sent +EXPORT_SYMBOL vmlinux 0xe4854cea snd_iprintf +EXPORT_SYMBOL vmlinux 0xe4a97c71 __down_write_trylock +EXPORT_SYMBOL vmlinux 0xe4c80097 cacheid +EXPORT_SYMBOL vmlinux 0xe4d029dd write_inode_now +EXPORT_SYMBOL vmlinux 0xe4d98f99 nand_default_bbt +EXPORT_SYMBOL vmlinux 0xe4da18a2 bio_integrity_split +EXPORT_SYMBOL vmlinux 0xe4f1695e cookie_check_timestamp +EXPORT_SYMBOL vmlinux 0xe51146da fasync_helper +EXPORT_SYMBOL vmlinux 0xe523ad75 synchronize_irq +EXPORT_SYMBOL vmlinux 0xe5420b45 snd_dma_get_reserved_buf +EXPORT_SYMBOL vmlinux 0xe552405f get_disk +EXPORT_SYMBOL vmlinux 0xe567405a sah_deregister +EXPORT_SYMBOL vmlinux 0xe56a9336 snd_pcm_format_width +EXPORT_SYMBOL vmlinux 0xe57878a1 in6_pton +EXPORT_SYMBOL vmlinux 0xe5867808 dlci_ioctl_set +EXPORT_SYMBOL vmlinux 0xe5a56fa6 iget5_locked +EXPORT_SYMBOL vmlinux 0xe5abb75d search_binary_handler +EXPORT_SYMBOL vmlinux 0xe5c78a99 do_blank_screen +EXPORT_SYMBOL vmlinux 0xe5df1a17 alloc_disk +EXPORT_SYMBOL vmlinux 0xe5e3e0d5 pskb_expand_head +EXPORT_SYMBOL vmlinux 0xe5ed5467 xfrm_policy_walk_init +EXPORT_SYMBOL vmlinux 0xe5ef86b7 __scsi_device_lookup_by_target +EXPORT_SYMBOL vmlinux 0xe5f40334 genl_register_ops +EXPORT_SYMBOL vmlinux 0xe635b7dc bdi_init +EXPORT_SYMBOL vmlinux 0xe6562614 udplite_table +EXPORT_SYMBOL vmlinux 0xe66803de do_SAK +EXPORT_SYMBOL vmlinux 0xe67d7758 tty_pair_get_pty +EXPORT_SYMBOL vmlinux 0xe6835aee kernel_listen +EXPORT_SYMBOL vmlinux 0xe690b8fd __ipv6_isatap_ifid +EXPORT_SYMBOL vmlinux 0xe6c034a8 ipu_disable_irq +EXPORT_SYMBOL vmlinux 0xe6c3ebb0 __raw_writesw +EXPORT_SYMBOL vmlinux 0xe6c401dd scsi_execute +EXPORT_SYMBOL vmlinux 0xe6da203b scsi_target_quiesce +EXPORT_SYMBOL vmlinux 0xe6dbdb66 i2c_smbus_read_byte_data +EXPORT_SYMBOL vmlinux 0xe6ebc016 key_create_or_update +EXPORT_SYMBOL vmlinux 0xe6fbe430 can_do_mlock +EXPORT_SYMBOL vmlinux 0xe707d823 __aeabi_uidiv +EXPORT_SYMBOL vmlinux 0xe714375c __tasklet_hi_schedule_first +EXPORT_SYMBOL vmlinux 0xe729d43b remap_pfn_range +EXPORT_SYMBOL vmlinux 0xe730a336 nf_log_unregister +EXPORT_SYMBOL vmlinux 0xe732daeb rfkill_init_sw_state +EXPORT_SYMBOL vmlinux 0xe772719a blk_queue_start_tag +EXPORT_SYMBOL vmlinux 0xe78ad1a3 mmc_detect_change +EXPORT_SYMBOL vmlinux 0xe78e2e8a inet_twsk_deschedule +EXPORT_SYMBOL vmlinux 0xe7ab8817 current_fs_time +EXPORT_SYMBOL vmlinux 0xe7b8631f posix_lock_file_wait +EXPORT_SYMBOL vmlinux 0xe7bfc72b xfrm_input_resume +EXPORT_SYMBOL vmlinux 0xe7c2f24d set_page_dirty +EXPORT_SYMBOL vmlinux 0xe7d2aca1 security_sk_classify_flow +EXPORT_SYMBOL vmlinux 0xe7d4daac seq_list_next +EXPORT_SYMBOL vmlinux 0xe7fb8dfe pmic_adc_get_touch_sample +EXPORT_SYMBOL vmlinux 0xe813c92d fsl_shw_register_user +EXPORT_SYMBOL vmlinux 0xe82718a3 blk_queue_physical_block_size +EXPORT_SYMBOL vmlinux 0xe82e5988 kernel_read +EXPORT_SYMBOL vmlinux 0xe8769729 journal_start +EXPORT_SYMBOL vmlinux 0xe8794ce1 slhc_toss +EXPORT_SYMBOL vmlinux 0xe886680d __lock_buffer +EXPORT_SYMBOL vmlinux 0xe8b4b014 bioset_integrity_create +EXPORT_SYMBOL vmlinux 0xe8cd902e hweight16 +EXPORT_SYMBOL vmlinux 0xe8d496a1 sock_release +EXPORT_SYMBOL vmlinux 0xe8e64fbc bytes_per_pixel +EXPORT_SYMBOL vmlinux 0xe8ebbdd0 gpio_sensor_inactive +EXPORT_SYMBOL vmlinux 0xe8f3178d mc13892_bklit_set_current +EXPORT_SYMBOL vmlinux 0xe9087129 vfs_dq_transfer +EXPORT_SYMBOL vmlinux 0xe90dcae0 __request_module +EXPORT_SYMBOL vmlinux 0xe914e41e strcpy +EXPORT_SYMBOL vmlinux 0xe9228d3c key_put +EXPORT_SYMBOL vmlinux 0xe935746a xfrm_lookup +EXPORT_SYMBOL vmlinux 0xe952ab4f mii_link_ok +EXPORT_SYMBOL vmlinux 0xe95c77dd xfrm_state_delete_tunnel +EXPORT_SYMBOL vmlinux 0xe9621eba udplite_prot +EXPORT_SYMBOL vmlinux 0xe9798420 vfs_fsync +EXPORT_SYMBOL vmlinux 0xe998015a brioctl_set +EXPORT_SYMBOL vmlinux 0xe99d697a generic_file_llseek_unlocked +EXPORT_SYMBOL vmlinux 0xe9bbff4f scsi_target_resume +EXPORT_SYMBOL vmlinux 0xe9d53cac netdev_rx_csum_fault +EXPORT_SYMBOL vmlinux 0xe9df1ab2 pmic_adc_init +EXPORT_SYMBOL vmlinux 0xe9e160ef jbd2_journal_update_format +EXPORT_SYMBOL vmlinux 0xea054b22 nla_policy_len +EXPORT_SYMBOL vmlinux 0xea090157 textsearch_register +EXPORT_SYMBOL vmlinux 0xea10212a int_to_scsilun +EXPORT_SYMBOL vmlinux 0xea10655a __bitmap_intersects +EXPORT_SYMBOL vmlinux 0xea147363 printk +EXPORT_SYMBOL vmlinux 0xea2d33a2 radix_tree_gang_lookup_slot +EXPORT_SYMBOL vmlinux 0xea4062c0 sock_create_kern +EXPORT_SYMBOL vmlinux 0xea6455f8 snd_timer_start +EXPORT_SYMBOL vmlinux 0xea6fcdaa genl_unregister_family +EXPORT_SYMBOL vmlinux 0xea7987f1 key_update +EXPORT_SYMBOL vmlinux 0xea85447a skb_copy_datagram_const_iovec +EXPORT_SYMBOL vmlinux 0xea858cb5 radix_tree_gang_lookup_tag +EXPORT_SYMBOL vmlinux 0xea8b7dfc prepare_creds +EXPORT_SYMBOL vmlinux 0xea9c50d6 md_integrity_register +EXPORT_SYMBOL vmlinux 0xeaa54936 keyring_search +EXPORT_SYMBOL vmlinux 0xeab4668f insert_inode_locked +EXPORT_SYMBOL vmlinux 0xeab9ec47 ipu_update_channel_offset +EXPORT_SYMBOL vmlinux 0xeadfe86a tcp_md5_hash_header +EXPORT_SYMBOL vmlinux 0xeae3dfd6 __const_udelay +EXPORT_SYMBOL vmlinux 0xeb15d70c simple_transaction_read +EXPORT_SYMBOL vmlinux 0xeb387a61 unlock_super +EXPORT_SYMBOL vmlinux 0xeb3b8105 scsi_prep_fn +EXPORT_SYMBOL vmlinux 0xeb50bd28 phy_disable_interrupts +EXPORT_SYMBOL vmlinux 0xeb830fdd ethtool_op_get_sg +EXPORT_SYMBOL vmlinux 0xeb89fc3e blk_set_default_limits +EXPORT_SYMBOL vmlinux 0xeb8f54b3 strstrip +EXPORT_SYMBOL vmlinux 0xeb955a71 fsl_shw_symmetric_decrypt +EXPORT_SYMBOL vmlinux 0xebd273a6 strict_strtoull +EXPORT_SYMBOL vmlinux 0xebeef000 __nla_put_nohdr +EXPORT_SYMBOL vmlinux 0xebfdcbdf system_serial_high +EXPORT_SYMBOL vmlinux 0xec0f343a jbd2_journal_flush +EXPORT_SYMBOL vmlinux 0xec1c33be neigh_changeaddr +EXPORT_SYMBOL vmlinux 0xec276994 rfkill_resume_polling +EXPORT_SYMBOL vmlinux 0xec3f312d sget +EXPORT_SYMBOL vmlinux 0xec794ba0 __send_remote_softirq +EXPORT_SYMBOL vmlinux 0xeca1a6f1 security_inode_permission +EXPORT_SYMBOL vmlinux 0xecc146c8 serio_unregister_driver +EXPORT_SYMBOL vmlinux 0xecd0d4a5 __bread +EXPORT_SYMBOL vmlinux 0xecde921e bh_submit_read +EXPORT_SYMBOL vmlinux 0xece9f286 generic_block_fiemap +EXPORT_SYMBOL vmlinux 0xecf4e5e6 find_vma +EXPORT_SYMBOL vmlinux 0xed2e9320 dcache_dir_open +EXPORT_SYMBOL vmlinux 0xed410914 iw_handler_set_spy +EXPORT_SYMBOL vmlinux 0xed485998 __nla_reserve +EXPORT_SYMBOL vmlinux 0xed5e39f4 mod_timer_pending +EXPORT_SYMBOL vmlinux 0xed6f8956 fsl_shw_hash +EXPORT_SYMBOL vmlinux 0xeda0d76e gen_estimator_active +EXPORT_SYMBOL vmlinux 0xedbaee5e nla_strcmp +EXPORT_SYMBOL vmlinux 0xedd6ff58 bdi_register +EXPORT_SYMBOL vmlinux 0xedd9106d __ashrdi3 +EXPORT_SYMBOL vmlinux 0xedf313bd lro_vlan_hwaccel_receive_frags +EXPORT_SYMBOL vmlinux 0xee09bf3c cdrom_number_of_slots +EXPORT_SYMBOL vmlinux 0xee2d0fc7 _local_bh_enable +EXPORT_SYMBOL vmlinux 0xee70fab9 block_write_end +EXPORT_SYMBOL vmlinux 0xee90884e dq_data_lock +EXPORT_SYMBOL vmlinux 0xeea94c5f gpio_i2c_hs_inactive +EXPORT_SYMBOL vmlinux 0xeea9dbaf bitmap_bitremap +EXPORT_SYMBOL vmlinux 0xeeb17a42 user_path_at +EXPORT_SYMBOL vmlinux 0xeedde0ea check_disk_size_change +EXPORT_SYMBOL vmlinux 0xef3d11ca per_cpu__ftrace_event_seq +EXPORT_SYMBOL vmlinux 0xef41e5d8 dev_addr_del +EXPORT_SYMBOL vmlinux 0xef65da93 snd_ctl_new1 +EXPORT_SYMBOL vmlinux 0xef6ed1ba param_set_invbool +EXPORT_SYMBOL vmlinux 0xef9fbb44 bio_uncopy_user +EXPORT_SYMBOL vmlinux 0xefba4dcc stop_tty +EXPORT_SYMBOL vmlinux 0xefcf0aea xfrm_find_acq +EXPORT_SYMBOL vmlinux 0xefdd70ce security_secid_to_secctx +EXPORT_SYMBOL vmlinux 0xeffcaf7a tty_free_termios +EXPORT_SYMBOL vmlinux 0xf0009fee put_pages_list +EXPORT_SYMBOL vmlinux 0xf009a1f2 scsi_is_target_device +EXPORT_SYMBOL vmlinux 0xf067eae9 bio_endio +EXPORT_SYMBOL vmlinux 0xf06cea93 input_unregister_handle +EXPORT_SYMBOL vmlinux 0xf0a09d9d phy_mii_ioctl +EXPORT_SYMBOL vmlinux 0xf0a26556 tty_insert_flip_string +EXPORT_SYMBOL vmlinux 0xf0b88bcb input_register_handle +EXPORT_SYMBOL vmlinux 0xf0ee2f10 phy_device_register +EXPORT_SYMBOL vmlinux 0xf0f1246c kvasprintf +EXPORT_SYMBOL vmlinux 0xf0f3f44b ip_generic_getfrag +EXPORT_SYMBOL vmlinux 0xf0f77d68 key_validate +EXPORT_SYMBOL vmlinux 0xf10bd5ba d_validate +EXPORT_SYMBOL vmlinux 0xf1336ae9 dm_kcopyd_copy +EXPORT_SYMBOL vmlinux 0xf1368f86 pfifo_qdisc_ops +EXPORT_SYMBOL vmlinux 0xf1466786 put_mnt_ns +EXPORT_SYMBOL vmlinux 0xf1514873 elv_rb_latter_request +EXPORT_SYMBOL vmlinux 0xf1617a9e inet_stream_ops +EXPORT_SYMBOL vmlinux 0xf174ed48 acquire_console_sem +EXPORT_SYMBOL vmlinux 0xf19294db bt_sock_unregister +EXPORT_SYMBOL vmlinux 0xf195c682 fb_invert_cmaps +EXPORT_SYMBOL vmlinux 0xf196ac35 ipu_init_async_panel +EXPORT_SYMBOL vmlinux 0xf19805e1 serio_reconnect +EXPORT_SYMBOL vmlinux 0xf1b4d431 dm_kcopyd_client_create +EXPORT_SYMBOL vmlinux 0xf1d14965 tcp_close +EXPORT_SYMBOL vmlinux 0xf1db1704 nla_memcpy +EXPORT_SYMBOL vmlinux 0xf1deabf2 div64_u64 +EXPORT_SYMBOL vmlinux 0xf1e98c74 avenrun +EXPORT_SYMBOL vmlinux 0xf1ed5e70 scsi_register_driver +EXPORT_SYMBOL vmlinux 0xf1fb619c snd_timer_resolution +EXPORT_SYMBOL vmlinux 0xf202d202 scsi_block_when_processing_errors +EXPORT_SYMBOL vmlinux 0xf20dabd8 free_irq +EXPORT_SYMBOL vmlinux 0xf23ccb88 md_check_no_bitmap +EXPORT_SYMBOL vmlinux 0xf2997713 tty_termios_hw_change +EXPORT_SYMBOL vmlinux 0xf2b99fc7 inet6_getname +EXPORT_SYMBOL vmlinux 0xf2bf5de3 udp_flush_pending_frames +EXPORT_SYMBOL vmlinux 0xf2cab8c3 ipv6_push_nfrag_opts +EXPORT_SYMBOL vmlinux 0xf2d17379 spba_rel_ownership +EXPORT_SYMBOL vmlinux 0xf2dfccdb netpoll_cleanup +EXPORT_SYMBOL vmlinux 0xf2e569f2 do_system_keystore_slot_encrypt +EXPORT_SYMBOL vmlinux 0xf3023758 mxc_dma_set_config +EXPORT_SYMBOL vmlinux 0xf30237cd blk_rq_map_user +EXPORT_SYMBOL vmlinux 0xf313da4e sha_transform +EXPORT_SYMBOL vmlinux 0xf338d4c3 netlink_unregister_notifier +EXPORT_SYMBOL vmlinux 0xf346231f seq_list_start_head +EXPORT_SYMBOL vmlinux 0xf3797152 snd_interval_ratnum +EXPORT_SYMBOL vmlinux 0xf397b9aa __tasklet_schedule +EXPORT_SYMBOL vmlinux 0xf39b3e82 fsl_shw_sstatus +EXPORT_SYMBOL vmlinux 0xf39bf4d9 put_cmsg +EXPORT_SYMBOL vmlinux 0xf3ad1d3a devm_iounmap +EXPORT_SYMBOL vmlinux 0xf3bf0bce __bitmap_complement +EXPORT_SYMBOL vmlinux 0xf3cd2832 xfrm_init_state +EXPORT_SYMBOL vmlinux 0xf403b4a2 mnt_unpin +EXPORT_SYMBOL vmlinux 0xf41d9aaa iget_locked +EXPORT_SYMBOL vmlinux 0xf43b1fd2 journal_extend +EXPORT_SYMBOL vmlinux 0xf43db2f9 nand_correct_data +EXPORT_SYMBOL vmlinux 0xf44c442c iput +EXPORT_SYMBOL vmlinux 0xf453523d fsl_shw_extract_key +EXPORT_SYMBOL vmlinux 0xf462d333 scsi_release_buffers +EXPORT_SYMBOL vmlinux 0xf47db853 cfb_imageblit +EXPORT_SYMBOL vmlinux 0xf494f618 mmc_regulator_get_ocrmask +EXPORT_SYMBOL vmlinux 0xf49bc67a atm_pcr_goal +EXPORT_SYMBOL vmlinux 0xf4acac38 sk_send_sigurg +EXPORT_SYMBOL vmlinux 0xf4afc222 inode_init_once +EXPORT_SYMBOL vmlinux 0xf4c37fbf sk_receive_skb +EXPORT_SYMBOL vmlinux 0xf4c93439 elevator_init +EXPORT_SYMBOL vmlinux 0xf4ca79d5 seq_release +EXPORT_SYMBOL vmlinux 0xf4eff891 dma_mark_declared_memory_occupied +EXPORT_SYMBOL vmlinux 0xf4f14de6 rtnl_trylock +EXPORT_SYMBOL vmlinux 0xf4f44d10 ndisc_mc_map +EXPORT_SYMBOL vmlinux 0xf4f52f93 dqstats +EXPORT_SYMBOL vmlinux 0xf50f6c4a snd_card_register +EXPORT_SYMBOL vmlinux 0xf51c639f interruptible_sleep_on_timeout +EXPORT_SYMBOL vmlinux 0xf526818e fsl_shw_sfree +EXPORT_SYMBOL vmlinux 0xf53d4c26 qdisc_class_hash_destroy +EXPORT_SYMBOL vmlinux 0xf54f8f05 journal_forget +EXPORT_SYMBOL vmlinux 0xf564412a __aeabi_ulcmp +EXPORT_SYMBOL vmlinux 0xf5af88e4 pipe_to_file +EXPORT_SYMBOL vmlinux 0xf5c05914 generic_segment_checks +EXPORT_SYMBOL vmlinux 0xf5c9012e timespec_trunc +EXPORT_SYMBOL vmlinux 0xf5cdf2f6 xfrm_state_add +EXPORT_SYMBOL vmlinux 0xf5cee257 inet_frag_destroy +EXPORT_SYMBOL vmlinux 0xf5d52953 d_find_alias +EXPORT_SYMBOL vmlinux 0xf5e3c47e create_mnt_ns +EXPORT_SYMBOL vmlinux 0xf5eb86ea blk_verify_command +EXPORT_SYMBOL vmlinux 0xf5ef81e1 scsi_setup_fs_cmnd +EXPORT_SYMBOL vmlinux 0xf5f88da5 send_sig +EXPORT_SYMBOL vmlinux 0xf61a01c7 dm_io_client_resize +EXPORT_SYMBOL vmlinux 0xf6253f2b rtc_dev_update_irq_enable_emul +EXPORT_SYMBOL vmlinux 0xf63f8761 tty_flip_buffer_push +EXPORT_SYMBOL vmlinux 0xf677f1b2 wake_up_process +EXPORT_SYMBOL vmlinux 0xf6bb4729 color_table +EXPORT_SYMBOL vmlinux 0xf6d3fcd7 blk_queue_merge_bvec +EXPORT_SYMBOL vmlinux 0xf6e426f5 get_sb_nodev +EXPORT_SYMBOL vmlinux 0xf6ebc03b net_ratelimit +EXPORT_SYMBOL vmlinux 0xf6f548f8 journal_destroy +EXPORT_SYMBOL vmlinux 0xf71a17bf vfs_readlink +EXPORT_SYMBOL vmlinux 0xf71e11b5 bio_integrity_trim +EXPORT_SYMBOL vmlinux 0xf72b929a bitmap_cond_end_sync +EXPORT_SYMBOL vmlinux 0xf73744c6 xfrm_state_lookup +EXPORT_SYMBOL vmlinux 0xf7384f52 downgrade_write +EXPORT_SYMBOL vmlinux 0xf73e6e60 filemap_fdatawait +EXPORT_SYMBOL vmlinux 0xf7584a9c find_font +EXPORT_SYMBOL vmlinux 0xf7623914 radix_tree_tag_clear +EXPORT_SYMBOL vmlinux 0xf765b3e0 snd_pcm_hw_constraint_msbits +EXPORT_SYMBOL vmlinux 0xf77fbb46 idr_remove_all +EXPORT_SYMBOL vmlinux 0xf7802486 __aeabi_uidivmod +EXPORT_SYMBOL vmlinux 0xf78d04ab netlink_register_notifier +EXPORT_SYMBOL vmlinux 0xf79d7761 register_sound_special +EXPORT_SYMBOL vmlinux 0xf7ae147a otg_set_transceiver +EXPORT_SYMBOL vmlinux 0xf7aee886 scsi_add_device +EXPORT_SYMBOL vmlinux 0xf7b0388e dma_mmap_writecombine +EXPORT_SYMBOL vmlinux 0xf7b7e845 __kfree_skb +EXPORT_SYMBOL vmlinux 0xf7d96f63 snd_ctl_notify +EXPORT_SYMBOL vmlinux 0xf7e98aa8 inet_register_protosw +EXPORT_SYMBOL vmlinux 0xf811e69d scsi_eh_flush_done_q +EXPORT_SYMBOL vmlinux 0xf81affaf mxc_snoop_set_config +EXPORT_SYMBOL vmlinux 0xf841a898 ipu_is_channel_busy +EXPORT_SYMBOL vmlinux 0xf85f4a43 i2c_smbus_write_i2c_block_data +EXPORT_SYMBOL vmlinux 0xf86d636b mxc_get_static_channels +EXPORT_SYMBOL vmlinux 0xf890fe7f pm_idle +EXPORT_SYMBOL vmlinux 0xf8b9a363 jbd2_journal_stop +EXPORT_SYMBOL vmlinux 0xf8ba850e tty_unregister_device +EXPORT_SYMBOL vmlinux 0xf8d04338 sah_Create_Link +EXPORT_SYMBOL vmlinux 0xf8d752b8 generic_delete_inode +EXPORT_SYMBOL vmlinux 0xf8e8b1bc blk_rq_map_integrity_sg +EXPORT_SYMBOL vmlinux 0xf8fbb4f0 __bad_xchg +EXPORT_SYMBOL vmlinux 0xf8ff27bf unload_nls +EXPORT_SYMBOL vmlinux 0xf8ff3cb1 bio_alloc +EXPORT_SYMBOL vmlinux 0xf93ea26d pipe_lock +EXPORT_SYMBOL vmlinux 0xf94167f8 nf_ip_checksum +EXPORT_SYMBOL vmlinux 0xf944a0b9 inet6_release +EXPORT_SYMBOL vmlinux 0xf97c67e0 km_query +EXPORT_SYMBOL vmlinux 0xf98d8d5a skb_dma_map +EXPORT_SYMBOL vmlinux 0xf9a482f9 msleep +EXPORT_SYMBOL vmlinux 0xf9a68705 sock_no_poll +EXPORT_SYMBOL vmlinux 0xf9b28bac interruptible_sleep_on +EXPORT_SYMBOL vmlinux 0xf9bfce74 mxc_dma_set_channel_priority +EXPORT_SYMBOL vmlinux 0xfa312eba blk_integrity_unregister +EXPORT_SYMBOL vmlinux 0xfa48b6b5 mntput_no_expire +EXPORT_SYMBOL vmlinux 0xfa6ff497 snd_timer_pause +EXPORT_SYMBOL vmlinux 0xfaa3eaf7 dev_get_flags +EXPORT_SYMBOL vmlinux 0xfab02768 arp_create +EXPORT_SYMBOL vmlinux 0xfac1891c inode_add_bytes +EXPORT_SYMBOL vmlinux 0xfac68eba arm_elf_read_implies_exec +EXPORT_SYMBOL vmlinux 0xfae70844 sk_dst_check +EXPORT_SYMBOL vmlinux 0xfae9cfa5 input_open_device +EXPORT_SYMBOL vmlinux 0xfaf98462 bitrev32 +EXPORT_SYMBOL vmlinux 0xfb0c6eda input_unregister_device +EXPORT_SYMBOL vmlinux 0xfb18973c scsi_host_alloc +EXPORT_SYMBOL vmlinux 0xfb1f5453 default_file_splice_read +EXPORT_SYMBOL vmlinux 0xfb326a5d down +EXPORT_SYMBOL vmlinux 0xfb476d45 mapping_tagged +EXPORT_SYMBOL vmlinux 0xfb54cabc snd_timer_stop +EXPORT_SYMBOL vmlinux 0xfb58121b __init_waitqueue_head +EXPORT_SYMBOL vmlinux 0xfb6aa9fa fifo_create_dflt +EXPORT_SYMBOL vmlinux 0xfb6af58d recalc_sigpending +EXPORT_SYMBOL vmlinux 0xfb7d9c45 __udivsi3 +EXPORT_SYMBOL vmlinux 0xfbc414e3 sock_no_shutdown +EXPORT_SYMBOL vmlinux 0xfbc74f64 __copy_from_user +EXPORT_SYMBOL vmlinux 0xfbd2ff1f sg_miter_start +EXPORT_SYMBOL vmlinux 0xfbe27a1c rb_first +EXPORT_SYMBOL vmlinux 0xfbe2f50e __invalidate_device +EXPORT_SYMBOL vmlinux 0xfbf49782 should_remove_suid +EXPORT_SYMBOL vmlinux 0xfc02b7ad sysctl_tcp_wmem +EXPORT_SYMBOL vmlinux 0xfc068cb4 dquot_release +EXPORT_SYMBOL vmlinux 0xfc31fe88 l2cap_load +EXPORT_SYMBOL vmlinux 0xfc39e32f ioport_unmap +EXPORT_SYMBOL vmlinux 0xfc533f85 schedule_work_on +EXPORT_SYMBOL vmlinux 0xfc79271f input_unregister_handler +EXPORT_SYMBOL vmlinux 0xfc7ec5f3 cdrom_media_changed +EXPORT_SYMBOL vmlinux 0xfc80ecfe locks_mandatory_area +EXPORT_SYMBOL vmlinux 0xfc916931 br_handle_frame_hook +EXPORT_SYMBOL vmlinux 0xfcaa04a0 out_of_line_wait_on_bit_lock +EXPORT_SYMBOL vmlinux 0xfcba07d9 blk_make_request +EXPORT_SYMBOL vmlinux 0xfcc2a43c utf32_to_utf8 +EXPORT_SYMBOL vmlinux 0xfcda63a3 node_states +EXPORT_SYMBOL vmlinux 0xfce4efcb snd_pcm_suspend +EXPORT_SYMBOL vmlinux 0xfcec0987 enable_irq +EXPORT_SYMBOL vmlinux 0xfcfa03ff fb_videomode_to_modelist +EXPORT_SYMBOL vmlinux 0xfd043431 scc_stop_monitoring_security_failure +EXPORT_SYMBOL vmlinux 0xfd1f8b9c fsl_shw_read_key +EXPORT_SYMBOL vmlinux 0xfd26bc6a wait_on_page_bit +EXPORT_SYMBOL vmlinux 0xfd2b0be5 md_write_end +EXPORT_SYMBOL vmlinux 0xfd305341 walk_stackframe +EXPORT_SYMBOL vmlinux 0xfd596da3 bio_map_kern +EXPORT_SYMBOL vmlinux 0xfd5b5b0b ipu_csi_set_window_size +EXPORT_SYMBOL vmlinux 0xfd6752de simple_rmdir +EXPORT_SYMBOL vmlinux 0xfd8dba4c add_wait_queue +EXPORT_SYMBOL vmlinux 0xfd910ce9 dev_trans_start +EXPORT_SYMBOL vmlinux 0xfd9ceb64 mxc_dma_start +EXPORT_SYMBOL vmlinux 0xfdab6de3 unregister_sound_midi +EXPORT_SYMBOL vmlinux 0xfdd6bc57 inode_init_always +EXPORT_SYMBOL vmlinux 0xfdfc0b3b fiemap_fill_next_extent +EXPORT_SYMBOL vmlinux 0xfe16775f idr_destroy +EXPORT_SYMBOL vmlinux 0xfe16e891 ip4_datagram_connect +EXPORT_SYMBOL vmlinux 0xfe271510 mutex_lock_killable +EXPORT_SYMBOL vmlinux 0xfe292d00 cdev_add +EXPORT_SYMBOL vmlinux 0xfe2a8c2b uart_add_one_port +EXPORT_SYMBOL vmlinux 0xfe3610f3 skb_recycle_check +EXPORT_SYMBOL vmlinux 0xfe474911 ppp_register_channel +EXPORT_SYMBOL vmlinux 0xfe5d4bb2 sys_tz +EXPORT_SYMBOL vmlinux 0xfe769456 unregister_netdevice_notifier +EXPORT_SYMBOL vmlinux 0xfec3c2f2 bcd2bin +EXPORT_SYMBOL vmlinux 0xfed6801e touch_atime +EXPORT_SYMBOL vmlinux 0xfedd35fc console_suspend_enabled +EXPORT_SYMBOL vmlinux 0xfef96e23 __scsi_print_command +EXPORT_SYMBOL vmlinux 0xff0f1665 vm_insert_pfn +EXPORT_SYMBOL vmlinux 0xff11d063 sah_Physicalise_Descriptors +EXPORT_SYMBOL vmlinux 0xff1b41e9 scsi_dma_map +EXPORT_SYMBOL vmlinux 0xff1e9dd8 seq_list_start +EXPORT_SYMBOL vmlinux 0xff39840c mmc_remove_host +EXPORT_SYMBOL vmlinux 0xff4f5f37 dm_io_client_destroy +EXPORT_SYMBOL vmlinux 0xff67b37f __lshrdi3 +EXPORT_SYMBOL vmlinux 0xff6878cf fb_default_cmap +EXPORT_SYMBOL vmlinux 0xff860da3 fsl_platform_set_test_mode +EXPORT_SYMBOL vmlinux 0xff964b25 param_set_int +EXPORT_SYMBOL vmlinux 0xff9ca065 fb_edid_to_monspecs +EXPORT_SYMBOL vmlinux 0xffa36ca6 snd_ctl_register_ioctl +EXPORT_SYMBOL vmlinux 0xffd1b937 start_tty +EXPORT_SYMBOL vmlinux 0xffd26dde sah_Destroy_Link +EXPORT_SYMBOL vmlinux 0xffd5a395 default_wake_function +EXPORT_SYMBOL vmlinux 0xffebb036 bio_integrity_free +EXPORT_SYMBOL vmlinux 0xfff81c35 blk_queue_set_discard +EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f crypto_it_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9 crypto_aes_expand_key +EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6 crypto_fl_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21 crypto_ft_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998 crypto_il_tab +EXPORT_SYMBOL_GPL crypto/aes_generic 0xe419fd6d crypto_aes_set_key +EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0xe554d0a5 async_memcpy +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x344a102f async_tx_submit +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xa1c3ef4b async_trigger_callback +EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xfe327461 async_tx_quiesce +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x0678b19b async_xor_zero_sum +EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xd55b530d async_xor +EXPORT_SYMBOL_GPL crypto/cryptd 0x1caf9660 cryptd_ablkcipher_child +EXPORT_SYMBOL_GPL crypto/cryptd 0x4332f0f1 cryptd_alloc_ablkcipher +EXPORT_SYMBOL_GPL crypto/cryptd 0x81b9cf89 cryptd_free_ablkcipher +EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0 des_ekey +EXPORT_SYMBOL_GPL crypto/twofish_common 0x8dc05e47 twofish_setkey +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0ddd87ca tpm_show_caps_1_2 +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x21caecc4 tpm_show_temp_deactivated +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x22a794f3 tpm_gen_interrupt +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x24c46f59 tpm_read +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2b0077d0 tpm_open +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2ec08c83 tpm_get_timeouts +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x45a853dc tpm_show_enabled +EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4acb2365 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ir_codes_real_audio_220_32_keys +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb6cd4666 ir_codes_eztv +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbb08d146 ir_codes_msi_tvanywhere_plus +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbdce6594 ir_codes_tt_1500 +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc1fea0c1 ir_codes_pv951 +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc315c128 ir_input_init +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc42bd037 ir_codes_budget_ci_old +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc6c5a7a1 ir_codes_em_terratec +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc788ef4e ir_codes_kworld_plus_tv_analog +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcdf2859f ir_codes_avermedia_m135a +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd1e0258a ir_codes_flyvideo +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd55e6891 ir_codes_gotview7135 +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd88e1c55 ir_input_keydown +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd9c7f010 ir_codes_rc5_tv +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdaa041ad ir_codes_cinergy_1400 +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdfcf23df ir_codes_norwood +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xee2f5e0e ir_codes_pinnacle_pctv_hd +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf07533a1 ir_codes_videomate_tv_pvr +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf0fc9374 ir_codes_avermedia +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf2b421aa ir_codes_genius_tvgo_a11mce +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6 ir_rc5_timer_end +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xfa177653 ir_codes_pixelview +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xfb981300 ir_codes_pinnacle_color +EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xfc54a5cd ir_codes_asus_pc39 +EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x398e0c15 microtune_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x938acf86 mxl5007t_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x238b2679 tda18271_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x14fc270f tda827x_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x3fe8a1af tda829x_probe +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xb5512adb tda829x_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xba0e8c14 tda9887_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xcc8c688b tea5761_autodetection +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xd4652765 tea5761_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xd6a0f7b9 tea5767_autodetection +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xee2dd9cf tea5767_attach +EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x38936d03 simple_tuner_attach +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0ef6b33f sms_board_setup +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x11d86fc3 smscore_getbuffer +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x1441ec8a smscore_get_device_mode +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2 smscore_registry_getmode +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x31385c3c sms_board_power +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x359a702e smscore_start_device +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x36ae6700 smscore_register_hotplug +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069 smsendian_handle_tx_message +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9 smsendian_handle_rx_message +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x4b94205b smscore_putbuffer +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7260ccd2 smscore_register_device +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098 sms_board_load_modules +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x75132297 smscore_set_board_id +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c1939e1 smscore_register_client +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277 smsendian_handle_message_header +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x819d67f3 smscore_unregister_device +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x85812320 smscore_onresponse +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8d6b64b2 smscore_get_board_id +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xaa32f17a smscore_unregister_client +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc70b1a5b smscore_unregister_hotplug +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd1938b43 sms_board_lna_control +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe01ff142 smsclient_sendrequest +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe39dd950 sms_board_event +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf1521573 sms_board_led_feedback +EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5 sms_get_board +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7 cx231xx_tuner_callback +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x231bb8dc cx231xx_dev_init +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x3eeb8ba5 cx231xx_set_mode +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x3f85e34b cx231xx_init_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x40738b46 cx231xx_capture_start +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x89b54389 cx231xx_set_alt_setting +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9417bbe1 cx231xx_init_vbi_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9d400417 cx231xx_uninit_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xa3c72ab0 cx231xx_send_gpio_cmd +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb7ae5019 cx231xx_uninit_vbi_isoc +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd61df1ae cx231xx_send_usb_command +EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xeb19abb5 cx231xx_dev_uninit +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x2b218a40 em28xx_audio_analog_set +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c em28xx_tuner_callback +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xa3341655 em28xx_set_mode +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xb952f2d8 em28xx_init_isoc +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xe466e90d em28xx_isoc_dvb_max_packetsize +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xed45b67f em28xx_uninit_isoc +EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf19189ef em28xx_audio_setup +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x0381dff7 v4l2_i2c_new_probed_subdev +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x366a8ed2 v4l2_i2c_subdev_addr +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x52484ccd v4l2_i2c_new_subdev +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x620ea20e v4l2_i2c_new_subdev_board +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x6fdeb80b v4l2_i2c_new_subdev_cfg +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xa470dad4 v4l2_i2c_new_probed_subdev_addr +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xef1b34c3 v4l2_i2c_subdev_init +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac v4l2_i2c_tuner_addrs +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e v4l_bound_align_image +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x7459f36c v4l2_int_device_register +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x8c9fa0b2 v4l2_int_device_unregister +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24 v4l2_int_device_try_attach_all +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xae42371a v4l2_int_ioctl_1 +EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xbbeca368 v4l2_int_ioctl_0 +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x08e52641 videobuf_next_field +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x28757e76 __videobuf_mmap_setup +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x32455151 videobuf_reqbufs +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3467d65e videobuf_dqbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3587b4da videobuf_streamon +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5a1faefc videobuf_iolock +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5c540c90 videobuf_mmap_setup +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x64543616 videobuf_mmap_free +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6aa7e4a5 videobuf_streamoff +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x796885ed videobuf_read_stream +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7dc487f6 videobuf_poll_stream +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7fc21ce6 videobuf_mmap_mapper +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8006831b videobuf_alloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9337ec65 videobuf_cgmbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa2d5f959 videobuf_read_one +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb08fb464 videobuf_qbuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbe1ebe8c videobuf_queue_is_busy +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc27d145e videobuf_queue_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc80b9cbc videobuf_querybuf +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc8a85cc1 videobuf_queue_cancel +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xcdbd0c25 videobuf_queue_core_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xddf76d3e videobuf_read_start +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf1680e79 videobuf_stop +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xfcd30b9f videobuf_read_stop +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xff477b52 videobuf_waiton +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xb814616c videobuf_vmalloc_free +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xbf958520 videobuf_queue_vmalloc_init +EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xe3df9517 videobuf_to_vmalloc +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x2d1a9f6a v4l2_device_register_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x5d06dc46 v4l2_device_set_name +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x6725e554 v4l2_device_disconnect +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc65f71dd v4l2_device_register +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xebdba105 v4l2_device_unregister_subdev +EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xec2a4931 v4l2_device_unregister +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x06b4af7f pcf50633_adc_async_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xd32bc4dd pcf50633_adc_sync_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x33ea6e0b pcf50633_irq_unmask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x38413a38 pcf50633_irq_mask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x42661161 pcf50633_reg_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4b02a4b4 pcf50633_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x54992f7a pcf50633_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x728dc588 pcf50633_reg_set_bit_mask +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x95dc48b0 pcf50633_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa6fa17b5 pcf50633_read_block +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd230b69d pcf50633_write_block +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xee44b1ae pcf50633_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf86df610 pcf50633_irq_mask_get +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x103aeea7 pcf50633_gpio_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x26ba19e2 pcf50633_gpio_invert_get +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x2be6e251 pcf50633_gpio_power_supply_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x49ec04ef pcf50633_gpio_invert_set +EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xe076e86f pcf50633_gpio_get +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x59a215f2 sm501_misc_control +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x603c71e0 sm501_set_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x9cd57b04 sm501_unit_power +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xa6904590 sm501_find_clock +EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xc219cb77 sm501_modify_reg +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x07701881 wm8350_unmask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x149230ab wm8350_device_init +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2cbd3f72 wm8350_set_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3d9948fa wm8350_mask_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x47c687cc wm8350_reg_unlock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4bc84496 wm8350_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5142a223 wm8350_block_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x576943a7 wm8350_gpio_config +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5def99be wm8350_read_auxadc +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7915e2c2 wm8350_clear_bits +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7a22ee1d wm8350_device_exit +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9a5a99e5 wm8350_reg_lock +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xab5b06a9 wm8350_free_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcb9f6a1f wm8350_register_irq +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcfe0de3f wm8350_reg_write +EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe59680f3 wm8350_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x53ea46db wm8400_reset_codec_reg_cache +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x7b6224ac wm8400_block_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x85ab2c8d wm8400_reg_read +EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x9a9e054d wm8400_set_bits +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4 eeprom_93cx6_multiread +EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f eeprom_93cx6_read +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x53e06f65 enclosure_remove_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x5cd997b8 enclosure_unregister +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x8246b40a enclosure_for_each_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x9fe9c1d0 enclosure_add_device +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xbd8701be enclosure_find +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xbfa31bb7 enclosure_register +EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xca80aa8b enclosure_component_register +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x093b54df sdhci_resume_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x4877be56 sdhci_suspend_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x949fa36f sdhci_remove_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa0629837 sdhci_alloc_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xbb240e61 sdhci_free_host +EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xbf2b8b1e sdhci_add_host +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x13d43863 cfi_cmdset_0200 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x45a42b36 cfi_cmdset_0001 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x6cbed095 cfi_cmdset_0003 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x958b2e64 cfi_cmdset_0002 +EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xf3673d6e cfi_cmdset_0020 +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x21850dfb DoC2k_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x417ba322 DoCMil_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x8eff7eee DoCMilPlus_init +EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659 doc_decode_ecc +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x71e2748e onenand_release +EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xd527cfb5 onenand_scan +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x071a8373 ubi_open_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0974dab9 ubi_close_volume +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0d1422fc ubi_leb_write +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0d6de5b0 ubi_leb_change +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x20b2854b ubi_get_volume_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3262bf51 ubi_leb_map +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20 ubi_sync +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x619d24d5 ubi_do_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a ubi_register_volume_notifier +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x70bfa25b ubi_open_volume_nm +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9df627b3 ubi_leb_unmap +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4 ubi_get_device_info +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xc62a72c5 ubi_is_mapped +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xcbb395fd ubi_leb_erase +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd0fcbeb2 ubi_leb_read +EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9 ubi_unregister_volume_notifier +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x044436f2 register_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5441b1b1 free_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x60908b1c can_bus_off +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8efc002b close_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa2668c9b can_get_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc6f47c9d unregister_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd6d453e7 open_candev +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe747e0d1 can_put_echo_skb +EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xed6b4831 alloc_candev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x1774ff97 alloc_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x200e69c8 register_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x47944229 unregister_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xc2173bd4 free_sja1000dev +EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500 sja1000_interrupt +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x8e22e1bf usbnet_cdc_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xbe82748c usbnet_generic_cdc_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x098e182b rndis_unbind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x369f3e95 rndis_rx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x447d41b4 rndis_status +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa7c2c611 generic_rndis_bind +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xae041ab6 rndis_command +EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf8ed45a0 rndis_tx_fixup +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x085c891c usbnet_disconnect +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x17c71f5e usbnet_suspend +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1f17bc8f usbnet_start_xmit +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x24ba744d usbnet_get_endpoints +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3886f73b usbnet_set_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3a2e23f0 usbnet_get_link +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x45311e8a usbnet_defer_kevent +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4e1a60e9 usbnet_open +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x570dba54 usbnet_nway_reset +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6fc69654 usbnet_probe +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x736e1b9b usbnet_get_drvinfo +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x78a9d4bd usbnet_get_settings +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7d55fe37 usbnet_stop +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7f72e2f3 usbnet_tx_timeout +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa4a95560 usbnet_get_ethernet_addr +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa98e1e59 usbnet_resume +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xabd3565b usbnet_set_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc8ba5e5c usbnet_skb_return +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcf0248ca usbnet_get_msglevel +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd6bc82e7 usbnet_unlink_rx_urbs +EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfab5fc68 usbnet_change_mtu +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1ad90f0f i2400m_rx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x425c5366 i2400m_tx_msg_get +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4537ad2e i2400m_release +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4e7da664 i2400m_cmd_enter_powersave +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6847942a i2400m_netdev_setup +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6a46d5f5 i2400m_set_init_config +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x72a52dcc i2400m_queue_work +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9930450a i2400m_dev_bootstrap +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa8069011 i2400m_tx +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c i2400m_bm_cmd_prepare +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xba2aa2d8 i2400m_dev_reset_handle +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe6e99813 i2400m_cmd_get_state +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xec8c0214 i2400m_tx_msg_sent +EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xed539e83 i2400m_setup +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x102242f9 lbs_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1e8997bc lbs_process_rxed_packet +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x24e12b2a lbs_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2a6b4e8f __lbs_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2f12c54c lbs_queue_event +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3ecde7f6 lbs_stop_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4ba1b691 lbs_host_to_card_done +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6f8fd314 lbs_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x78d02c8a lbs_start_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x84fda1b9 lbs_notify_command_response +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9f02c89d lbs_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbceddd48 lbs_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc4b32e6a lbs_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd2c401fd lbs_cmd_802_11_rate_adapt_rateset +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe4f0c65b lbs_host_sleep_cfg +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de lbs_debug +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x1a193232 lbtf_remove_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3785a9ce lbtf_add_card +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x4b069faa lbtf_cmd_copyback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x92f2096c lbtf_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcea0262b __lbtf_cmd +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd234294a lbtf_cmd_response_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xe612d36c lbtf_send_tx_feedback +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xfa1d512e lbtf_bcn_sent +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xa40606a0 if_usb_prog_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xaa38ccba if_usb_reset_device +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x04f1f5cd p54_free_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1141b038 p54_parse_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x22354f71 p54_register_common +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x579c4127 p54_parse_firmware +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x886057c5 p54_free_skb +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc09042cb p54_rx +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd1a98673 p54_read_eeprom +EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe7ac527d p54_init_common +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x07be6055 rt2x00mac_configure_filter +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1805d792 rt2x00mac_stop +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1c2390e0 rt2x00queue_map_txskb +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x43f68ccf rt2x00mac_config +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x47fc6d61 rt2x00mac_add_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4d6d8471 rt2x00mac_bss_info_changed +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4db0f9bc rt2x00lib_txdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x500ba62d rt2x00mac_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x60433e52 rt2x00lib_probe_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6e7aed21 rt2x00lib_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7b1a1105 rt2x00lib_rxdone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8f20be1e rt2x00mac_conf_tx +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9c40a49e rt2x00queue_get_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa2f17ea5 rt2x00mac_start +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb0953da1 rt2x00mac_set_key +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbde0090b rt2x00lib_beacondone +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc96a2eaa rt2x00lib_remove_dev +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcd8128f9 rt2x00lib_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xdc77d10c rt2x00mac_remove_interface +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xde3b43a4 rt2x00mac_get_tx_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe1a81893 rt2x00queue_get_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf90eba0b rt2x00mac_get_stats +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0b627b8c rt2x00usb_kill_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2a4644f4 rt2x00usb_regbusy_read +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2d19963c rt2x00usb_clear_entry +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3b8b0068 rt2x00usb_write_tx_data +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4851657b rt2x00usb_uninitialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x56ad1b1c rt2x00usb_vendor_request_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5f0e93ce rt2x00usb_vendor_request_large_buff +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6997aa87 rt2x00usb_initialize +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6ad920ad rt2x00usb_vendor_req_buff_lock +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x81a5984a rt2x00usb_disable_radio +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x885eb896 rt2x00usb_suspend +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa8547c97 rt2x00usb_vendor_request +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xae92014b rt2x00usb_kick_tx_queue +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb9478016 rt2x00usb_resume +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc97979b6 rt2x00usb_disconnect +EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe28d8dfe rt2x00usb_probe +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x9e0fe072 pcf50633_mbc_usb_curlim_set +EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xc6b1c4fa pcf50633_mbc_get_status +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x3d181296 wm8350_dcdc25_set_mode +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5a939f2f wm8350_ldo_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5d87aafb wm8350_register_led +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd0583513 wm8350_register_regulator +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd07752a2 wm8350_isink_set_flash +EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd3aa0994 wm8350_dcdc_set_slot +EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xa334ec7b wm8400_register_regulator +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c fcoe_wwn_from_mac +EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x4e4d54b2 fcoe_libfc_config +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x021ce2f6 iscsi_eh_target_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0a4b4d83 iscsi_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0f0b7d12 iscsi_conn_send_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0ffe5b8c iscsi_session_recovery_timedout +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x229a37df iscsi_host_add +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2337012d iscsi_itt_to_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x24cd7aa7 iscsi_requeue_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f1e9714 iscsi_session_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x33d8a4db iscsi_session_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x359bfe9c iscsi_host_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x370e70f0 iscsi_verify_itt +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x379091a8 iscsi_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f18e8d7 __iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x43df9f4b iscsi_host_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4962b868 iscsi_put_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x56aa0d91 iscsi_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5a351c22 iscsi_conn_queue_work +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5e0676b5 iscsi_complete_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6584944e iscsi_session_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6982eeb1 iscsi_itt_to_ctask +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x75443cde iscsi_host_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x756589b4 iscsi_update_cmdsn +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x84d7c43d iscsi_host_remove +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8a4c7ec0 iscsi_conn_get_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea iscsi_pool_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x94954451 iscsi_session_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa65922b6 __iscsi_get_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa8d11c05 iscsi_conn_bind +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xad89d2e9 iscsi_host_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb0d53da0 iscsi_eh_device_reset +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0 iscsi_pool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc442d1cf iscsi_conn_failure +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc6c63fde iscsi_prep_data_out_pdu +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc95500c9 iscsi_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc99d2a90 iscsi_conn_start +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf02c28d8 iscsi_set_param +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf21a829d iscsi_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf31a9484 iscsi_eh_abort +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfa60dd02 iscsi_conn_stop +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff1a8b02 iscsi_suspend_tx +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0904a232 iscsi_tcp_task_xmit +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2f43eda6 iscsi_tcp_segment_unmap +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x367ae7e0 iscsi_tcp_dgst_header +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x42e4d6ee iscsi_segment_init_linear +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x43561947 iscsi_tcp_recv_segment_is_hdr +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4609a5b1 iscsi_tcp_r2tpool_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4f60c81b iscsi_tcp_cleanup_task +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x54cd9d7d iscsi_tcp_conn_setup +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5e50c6b2 iscsi_tcp_conn_teardown +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x95be1a4b iscsi_tcp_recv_skb +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9e33ccfd iscsi_tcp_task_init +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xad4f04da iscsi_tcp_r2tpool_free +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc02cbde8 iscsi_tcp_conn_get_stats +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcbb2982c iscsi_tcp_segment_done +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd838a2bb iscsi_tcp_hdr_recv_prep +EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf8d98351 iscsi_segment_seek_sg +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0ae3f20d sas_ssp_task_response +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x22e42a90 sas_target_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x23bc660e sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2488a310 sas_slave_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3766ea46 sas_slave_destroy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3ca0d024 sas_change_queue_type +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x55ff642f sas_slave_configure +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f6c234d sas_eh_device_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x67be8690 sas_domain_release_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7e3bac5a sas_request_addr +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x81421bdf sas_register_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x834f7c22 sas_find_local_phy +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x899fe660 sas_unregister_ha +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8a649874 sas_eh_bus_reset_handler +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa9c58cb4 sas_queuecommand +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xac06bccf sas_change_queue_depth +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb36ff1db sas_phy_enable +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbf206858 sas_phy_reset +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd961668a sas_bios_param +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe6940b24 __sas_task_abort +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xed68aa41 sas_target_alloc +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf0dfd22d sas_domain_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf65de3f3 sas_ioctl +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x4fda6070 scsi_tgt_free_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x51bc3c36 scsi_host_get_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x535446e5 scsi_tgt_queue_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x604357c8 scsi_tgt_it_nexus_create +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xcb8c2fc0 scsi_tgt_alloc_queue +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd57d4ac4 scsi_tgt_tsk_mgmt_request +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xdf7bcf33 scsi_tgt_cmd_to_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe8b1e9fc scsi_host_put_command +EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfb0d9fb0 scsi_tgt_it_nexus_destroy +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0e520f3f iscsi_create_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3021bfa7 iscsi_lookup_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3e8a29fe iscsi_unblock_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5758833e iscsi_destroy_conn +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x61f528ce iscsi_alloc_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6a30b903 iscsi_session_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6cf20ca3 iscsi_register_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x745e78ac iscsi_recv_pdu +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7c993afd iscsi_unregister_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x87dc61f6 iscsi_create_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x96290dcd iscsi_destroy_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x97d533d6 iscsi_block_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9e3350dc iscsi_session_chkready +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa8008bec iscsi_host_for_each_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaf35b7ec iscsi_remove_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb0394ee9 iscsi_create_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb9c93d96 iscsi_scan_finished +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbe4843ce iscsi_free_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc621136d iscsi_conn_error_event +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcef4817a iscsi_offload_mesg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd964e3e5 iscsi_destroy_endpoint +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf0927af2 iscsi_add_session +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974 spi_populate_ppr_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac spi_populate_sync_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff spi_populate_width_msg +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x0eefafe2 srp_rport_del +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1a788e03 srp_rport_add +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x2345d380 srp_remove_host +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x7d1e1ad2 srp_attach_transport +EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xee9deb57 srp_release_transport +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34 oslec_hpf_tx +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806 oslec_snapshot +EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de oslec_create +EXPORT_SYMBOL_GPL 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+EXPORT_SYMBOL_GPL drivers/uio/uio 0x950346a2 uio_unregister_device +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x5475d14d usbatm_usb_probe +EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x9dacf51a usbatm_usb_disconnect +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1ea28ffc usb_ftdi_elan_edset_single +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x38981c79 usb_ftdi_elan_edset_output +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x426a3d62 usb_ftdi_elan_edset_input +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x5ad5eb88 ftdi_elan_gone_away +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8d6ff5c7 usb_ftdi_elan_read_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xac9f868d usb_ftdi_elan_edset_empty +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc8d50bbd usb_ftdi_elan_edset_setup +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe9d59138 usb_ftdi_elan_write_pcimem +EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf4385557 usb_ftdi_elan_edset_flush +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0c58367d usb_serial_generic_open +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0dc67bb5 usb_serial_generic_write_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2a4fed00 ezusb_set_reset +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x370a6082 usb_serial_generic_read_bulk_callback +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3c96ee1e usb_serial_deregister +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x47074436 usb_serial_generic_write +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4b6fbd45 usb_serial_port_softint +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6307d8ba usb_serial_handle_break +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6d3932d2 usb_serial_probe +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6e171e88 usb_serial_register +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x80ce0861 usb_serial_generic_resume +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8b0fcdaa ezusb_writememory +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xddbf489f usb_serial_handle_sysrq_char +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xef5cc47f usb_serial_generic_resubmit_read_urb +EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfa4b0ece usb_serial_disconnect +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921 wa_urb_enqueue_run +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x31d15a96 rpipe_ep_disable +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134 rpipe_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8729a537 wa_urb_enqueue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8848492b wa_urb_dequeue +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9c017be1 __wa_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9d0a54e8 wa_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0473d59e wusbhc_reset_all +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e wusb_cluster_id_get +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1efb35f2 wusbhc_b_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x52d2daf8 wusbhc_mmcie_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6cadc5f8 wusbhc_handle_dn +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6ea14023 wusbhc_b_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x70fc13f0 wusbhc_create +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x730ae920 wusbhc_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7393ce7e wusbhc_rh_start_port_reset +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa7829120 __wusb_dev_get_by_usb_dev +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb5fde5d3 wusbhc_chid_set +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128 wusb_cluster_id_put +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc4d0d114 wusbhc_mmcie_rm +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc4ef0f7c wusbhc_rh_resume +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc6f66a76 wusbhc_rh_control +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08 wusb_dev_destroy +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe184b8c5 wusbhc_rh_status_data +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xec81bbf8 wusbhc_rh_suspend +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xed39adbc wusbhc_giveback_urb +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4 wusbd +EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7 wusb_et_name +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x621c37b2 i1480_rceb_check +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xa193db58 i1480_cmd +EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xac3aa265 i1480_fw_upload +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1885a194 uwb_phy_rate_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x268be260 uwb_pca_base_priority_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x943bec09 uwb_ack_policy_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x96f9997a uwb_rts_cts_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa768d07f uwb_rts_cts_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb3aa3381 uwb_phy_rate_store +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd001a229 uwb_pca_base_priority_show +EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xefde0736 uwb_ack_policy_store +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57 uwb_est_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0d22d40b uwb_radio_start +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0e3976b1 uwb_rsv_create +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0e8b5c71 uwb_rsv_destroy +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x19011cff uwb_radio_stop +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1fd86d7b uwb_rc_rm +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x281a9a4d uwb_rc_get_by_dev +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2b8ec64d uwb_rc_neh_grok +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x31d60bf3 uwb_notifs_deregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x32e4375f uwb_rc_alloc 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+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8e760c9b uwb_rc_cmd_async +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234 uwb_rsv_state_str +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9ba205c2 uwb_rc_ie_add +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9e0a1bfe uwb_rc_put +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa02eceab uwb_est_find_size +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa223fe42 uwb_rc_get_by_grandpa +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa9e7b3a3 uwb_rsv_establish +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xad7fbbfc uwb_pal_unregister +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb42e32ce uwb_rsv_modify +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc1db4568 uwb_rc_neh_error +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc90091b2 uwb_rsv_accept +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcb5cb6e0 uwb_rc_dev_addr_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcf26e77f uwb_dev_try_get +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2753a37 uwb_rsv_get_usable_mas +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdde9c521 uwb_rc_init +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06 uwb_est_register +EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe2075750 uwb_rc_post_reset +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x02e584dd wlp_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x123a5de5 wlp_dev_prim_category_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x18457bf8 wlp_wss_activate_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1f185356 wlp_dev_manufacturer_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x21aeedc5 wlp_dev_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2309887b wlp_dev_prim_OUI_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x23fe778d wlp_wss_activate_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2f258c81 wlp_prepare_tx_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x336ac3d5 wlp_dev_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x491e9225 wlp_dev_serial_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x54ec00b9 wlp_uuid_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x58196300 wlp_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6dea6fd1 wlp_dev_model_name_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8432eeb0 wlp_dev_prim_OUI_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x84803709 wlp_dev_serial_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9803e49f wlp_wss_setup +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x985fa05c wlp_dev_model_name_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa392af1d wlp_dev_prim_OUI_sub_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb2a76bc3 wlp_dev_model_nr_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc99b685f wlp_wss_remove +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe0ab34b6 wlp_dev_prim_category_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe5d0a2b0 wlp_eda_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe5dc4860 wlp_neighborhood_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe66cc4b3 wlp_reset_all +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xea9af8f5 wlp_dev_prim_subcat_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xee2d9f8b wlp_receive_frame +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xefe23dbf wlp_uuid_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf1d9020b wlp_dev_manufacturer_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf48c2dd5 wlp_eda_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf7b5f623 wlp_dev_prim_OUI_sub_store +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf84910b4 wlp_dev_model_nr_show +EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfdc36742 wlp_dev_prim_subcat_store +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2c255ea0 ili9320_resume +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x5c84da45 ili9320_probe_spi +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x60457a14 ili9320_write_regs +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x7e383405 ili9320_write +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa67709a8 ili9320_suspend +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc9dfff0c ili9320_remove +EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf90d8761 ili9320_shutdown +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x999526de fb_sys_read +EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xe5661c34 fb_sys_write +EXPORT_SYMBOL_GPL drivers/w1/wire 0x365381e7 w1_read_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x3e8a2fd4 w1_write_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0x3fdf729d w1_write_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x781928bf w1_reset_select_slave +EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb w1_calc_crc8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0x841301e2 w1_reset_bus +EXPORT_SYMBOL_GPL drivers/w1/wire 0x9503e38d w1_touch_block +EXPORT_SYMBOL_GPL drivers/w1/wire 0xbd93fe68 w1_read_8 +EXPORT_SYMBOL_GPL drivers/w1/wire 0xc3869e47 w1_next_pullup +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4 dlm_new_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x64757a32 dlm_posix_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x8fe6cfb0 dlm_posix_unlock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95 dlm_lock +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328 dlm_release_lockspace +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xd913156c dlm_posix_get +EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08 dlm_unlock +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x44dff20c exportfs_decode_fh +EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x6826f88d exportfs_encode_fh +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x03dd69bd nlmsvc_ops +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0c7c8c62 nlmclnt_done +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d locks_end_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932 nlmsvc_unlock_all_by_ip +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4df40b1c nlmclnt_proc +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x585a709d nlmsvc_unlock_all_by_sb +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35 locks_in_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4 locks_start_grace +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b lockd_down +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xbf27cdb3 nlmclnt_init +EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48 lockd_up +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xbec72f98 nfsacl_decode +EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xbf9afc83 nfsacl_encode +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0e4da9ea o2nm_node_put +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0ed2200c o2hb_unregister_callback +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee o2hb_fill_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0 mlog_not_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3 o2hb_check_node_heartbeating +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553 o2net_send_message +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b o2hb_stop_all_regions +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4973ed72 o2nm_node_get +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251 mlog_and_bits +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7010b33b o2nm_get_node_by_num +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645 o2nm_this_node +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7 o2nm_configured_node_map +EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 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+EXPORT_SYMBOL_GPL net/802/garp 0x2dfd3363 garp_unregister_application +EXPORT_SYMBOL_GPL net/802/garp 0x70bef7eb garp_register_application +EXPORT_SYMBOL_GPL net/802/garp 0x8825e16d garp_init_applicant +EXPORT_SYMBOL_GPL net/802/garp 0xbe858cf9 garp_request_leave +EXPORT_SYMBOL_GPL net/802/garp 0xc6b837cb garp_request_join +EXPORT_SYMBOL_GPL net/802/garp 0xdab5f856 garp_uninit_applicant +EXPORT_SYMBOL_GPL net/802/stp 0x2d72c481 stp_proto_unregister +EXPORT_SYMBOL_GPL net/802/stp 0x83d681a2 stp_proto_register +EXPORT_SYMBOL_GPL net/ax25/ax25 0x00f55fca ax25_register_pid +EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05 ax25_bcast +EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e ax25_defaddr +EXPORT_SYMBOL_GPL net/dccp/dccp 0x03f8cfe6 dccp_connect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x0a46ad0f dccp_reqsk_send_ack +EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a dccp_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x23cf088f dccp_destroy_sock +EXPORT_SYMBOL_GPL net/dccp/dccp 0x29258764 inet_dccp_listen +EXPORT_SYMBOL_GPL net/dccp/dccp 0x2fe95fa0 dccp_death_row +EXPORT_SYMBOL_GPL net/dccp/dccp 0x3a6ec0a0 dccp_ctl_make_reset +EXPORT_SYMBOL_GPL net/dccp/dccp 0x40daaaf0 dccp_insert_option_elapsed_time +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4232ea25 dccp_recvmsg +EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4 dccp_orphan_count +EXPORT_SYMBOL_GPL net/dccp/dccp 0x44db6501 dccp_rcv_state_process +EXPORT_SYMBOL_GPL net/dccp/dccp 0x457e1565 dccp_rcv_established +EXPORT_SYMBOL_GPL net/dccp/dccp 0x467b231d dccp_disconnect +EXPORT_SYMBOL_GPL net/dccp/dccp 0x48eecd69 dccp_set_state +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d dccp_feat_list_purge +EXPORT_SYMBOL_GPL net/dccp/dccp 0x4dfbdd1b dccp_send_sync +EXPORT_SYMBOL_GPL net/dccp/dccp 0x5624c72c dccp_sync_mss +EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a dccp_state_name +EXPORT_SYMBOL_GPL net/dccp/dccp 0x6005efc7 dccp_insert_option_timestamp +EXPORT_SYMBOL_GPL net/dccp/dccp 0x62004e06 dccp_parse_options +EXPORT_SYMBOL_GPL net/dccp/dccp 0x63feb8c6 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net/dccp/dccp 0xfbf26b86 dccp_reqsk_init +EXPORT_SYMBOL_GPL net/dccp/dccp 0xfcc7fbe1 dccp_poll +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x28198497 dccp_v4_conn_request +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x89988d91 dccp_v4_connect +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x8f915b4d dccp_v4_send_check +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa55c630c dccp_invalid_packet +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xb8601ad1 dccp_v4_do_rcv +EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc3a95183 dccp_v4_request_recv_sock +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921 need_ipv4_conntrack +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xd1b07e33 nf_nat_seq_adjust_hook +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10 nf_defrag_ipv4_enable +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6 nf_nat_proto_in_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x36203d4a nf_nat_packet +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x63e9eaee nf_nat_icmp_reply_translation +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7da14855 nf_nat_get_offset +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x8c60569c nf_nat_proto_unique_tuple +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134 nf_nat_proto_nlattr_to_range +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xbcf2d7b9 nf_nat_proto_find_get +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xdc94148b nf_nat_proto_put +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe1db1256 nf_nat_proto_range_to_nlattr +EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8 nf_nat_need_gre +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x113710a8 tcp_vegas_cwnd_event +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x7d313df5 tcp_vegas_init +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x85683347 tcp_vegas_state +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x9003c625 tcp_vegas_pkts_acked +EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xdb079a0f tcp_vegas_get_info +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xc0f1627c ieee80211_iterate_active_interfaces +EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xc3bc99ed ieee80211_iterate_active_interfaces_atomic +EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a net_vs_ctl_path +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03c3c537 nf_conntrack_flush_report +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd nf_ct_port_nla_policy +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x057aa24f __nf_ct_kill_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x063a54c0 nf_conntrack_alloc +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x07363f8b nf_ct_unexpect_related +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0787594c nf_conntrack_in +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0ed92be1 nf_ct_helper_ext_add +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x12ba9e1e nf_ct_l3proto_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x16182bad nf_ct_invert_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x172a1d35 __nf_ct_try_assign_helper +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x18b149bb __nf_conntrack_helper_find_byname +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1d7b2f4e nf_ct_remove_expectations +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1d98add4 nf_conntrack_untracked +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x226eaa05 nf_conntrack_free +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2c1fc0a3 nf_ct_l3proto_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3790f6a1 nf_conntrack_helper_register +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415 nf_ct_port_nlattr_to_tuple +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x41bdd207 nf_conntrack_l4proto_unregister +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x43cdceb6 nf_ct_iterate_cleanup +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b07b1a6 nf_ct_expect_put +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9 nf_ct_alloc_hashtable +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5217342f nf_ct_expect_init +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x54f3b35d nf_conntrack_event_cb +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33 nf_conntrack_set_hashsize +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x58be4eef nf_ct_delete_from_lists +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x58c4ae21 nf_conntrack_alter_reply +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5aa42716 seq_print_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5d964d1a nf_conntrack_tuple_taken +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c nf_ct_port_nlattr_tuple_size +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6424a2ff __nf_ct_refresh_acct +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a need_conntrack +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x779b1698 nf_ct_expect_find_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710 nf_ct_l3proto_try_module_get +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7cba3cd1 nf_ct_expect_register_notifier +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 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+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf2b6f2f6 __nf_conntrack_find +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3 nf_conntrack_max +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfb7a7d97 nfnetlink_parse_nat_setup_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0xb90460e1 nf_nat_amanda_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x3f419fca nf_nat_ftp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4a508b00 set_ras_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x57f61b9f nat_h245_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x60b4b8e0 set_h245_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x762c33e6 get_h225_addr +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7760d672 set_sig_addr_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x86d2c0b8 nat_rtp_rtcp_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x89207819 nat_q931_hook +EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 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cpufreq_driver_target +EXPORT_SYMBOL_GPL vmlinux 0xd22a6341 usb_sg_wait +EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1 __round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xd34b22e9 __mmdrop +EXPORT_SYMBOL_GPL vmlinux 0xd36ed3f3 __class_create +EXPORT_SYMBOL_GPL vmlinux 0xd417e706 usb_stor_probe2 +EXPORT_SYMBOL_GPL vmlinux 0xd437ae84 elv_register +EXPORT_SYMBOL_GPL vmlinux 0xd4be1aee device_find_child +EXPORT_SYMBOL_GPL vmlinux 0xd4d6971d snd_soc_put_volsw +EXPORT_SYMBOL_GPL vmlinux 0xd4ffd01d usb_root_hub_lost_power +EXPORT_SYMBOL_GPL vmlinux 0xd50fab3f attribute_container_unregister +EXPORT_SYMBOL_GPL vmlinux 0xd541621a ata_sff_hsm_move +EXPORT_SYMBOL_GPL vmlinux 0xd5897ed4 hrtimer_forward +EXPORT_SYMBOL_GPL vmlinux 0xd5e548f8 sata_link_hardreset +EXPORT_SYMBOL_GPL vmlinux 0xd6296b13 sysfs_create_group +EXPORT_SYMBOL_GPL vmlinux 0xd6722ab9 crypto_alloc_shash +EXPORT_SYMBOL_GPL vmlinux 0xd6c0d70a regulator_get_drvdata +EXPORT_SYMBOL_GPL vmlinux 0xd6d2a6ac timed_output_dev_register +EXPORT_SYMBOL_GPL vmlinux 0xd6d889c8 sata_set_spd +EXPORT_SYMBOL_GPL vmlinux 0xd6f48af7 dm_put +EXPORT_SYMBOL_GPL vmlinux 0xd6fb5e1f bus_rescan_devices +EXPORT_SYMBOL_GPL vmlinux 0xd708e363 fuse_conn_get +EXPORT_SYMBOL_GPL vmlinux 0xd73ef534 sysdev_resume +EXPORT_SYMBOL_GPL vmlinux 0xd74071bb sata_pmp_qc_defer_cmd_switch +EXPORT_SYMBOL_GPL vmlinux 0xd741cfcf blocking_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xd768e985 regulator_has_full_constraints +EXPORT_SYMBOL_GPL vmlinux 0xd78debe1 __rtnl_link_register +EXPORT_SYMBOL_GPL vmlinux 0xd79d3c8f hid_add_device +EXPORT_SYMBOL_GPL vmlinux 0xd7c30fc4 debugfs_create_u8 +EXPORT_SYMBOL_GPL vmlinux 0xd7d0bfa1 skcipher_geniv_free +EXPORT_SYMBOL_GPL vmlinux 0xd7ede186 fat_build_inode +EXPORT_SYMBOL_GPL vmlinux 0xd7ef04ea fuse_dev_operations +EXPORT_SYMBOL_GPL vmlinux 0xd7fd22fb inode_add_to_lists +EXPORT_SYMBOL_GPL vmlinux 0xd818dd44 snd_soc_add_controls +EXPORT_SYMBOL_GPL vmlinux 0xd8487330 ata_port_schedule_eh +EXPORT_SYMBOL_GPL vmlinux 0xd861788b ring_buffer_alloc_read_page +EXPORT_SYMBOL_GPL vmlinux 0xd877f5d7 fat_sync_inode +EXPORT_SYMBOL_GPL vmlinux 0xd8c06bc2 devm_kzalloc +EXPORT_SYMBOL_GPL vmlinux 0xd90788bc ata_host_detach +EXPORT_SYMBOL_GPL vmlinux 0xd90bf12b debugfs_create_u32 +EXPORT_SYMBOL_GPL vmlinux 0xd9159c0c debugfs_create_bool +EXPORT_SYMBOL_GPL vmlinux 0xd91bbab9 imx_soc_platform +EXPORT_SYMBOL_GPL vmlinux 0xd9300760 unregister_jprobe +EXPORT_SYMBOL_GPL vmlinux 0xd97977bd kobject_get_path +EXPORT_SYMBOL_GPL vmlinux 0xd9bbfaad snd_soc_dai_set_clkdiv +EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1 async_synchronize_cookie_domain +EXPORT_SYMBOL_GPL vmlinux 0xda202b31 ring_buffer_empty_cpu +EXPORT_SYMBOL_GPL vmlinux 0xda8a1d06 rt_mutex_destroy +EXPORT_SYMBOL_GPL vmlinux 0xdab3c50f mtd_table +EXPORT_SYMBOL_GPL vmlinux 0xdab507ad sdio_memcpy_toio +EXPORT_SYMBOL_GPL vmlinux 0xdad0a299 hwmon_device_register +EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3 fb_mode_option +EXPORT_SYMBOL_GPL vmlinux 0xdb514a2f class_for_each_device +EXPORT_SYMBOL_GPL vmlinux 0xdb585d39 led_trigger_remove +EXPORT_SYMBOL_GPL vmlinux 0xdb7678a5 nand_release +EXPORT_SYMBOL_GPL vmlinux 0xdbb2a0b3 fuse_direct_io +EXPORT_SYMBOL_GPL vmlinux 0xdbc622e6 destroy_workqueue +EXPORT_SYMBOL_GPL vmlinux 0xdc049c56 spi_add_device +EXPORT_SYMBOL_GPL vmlinux 0xdc0e98d1 snd_soc_dapm_get_pin_switch +EXPORT_SYMBOL_GPL vmlinux 0xdc20f04a ata_timing_compute +EXPORT_SYMBOL_GPL vmlinux 0xdc6e5e77 ata_qc_complete +EXPORT_SYMBOL_GPL vmlinux 0xdc7efc5b debugfs_create_symlink +EXPORT_SYMBOL_GPL vmlinux 0xdc856e6d class_create_file +EXPORT_SYMBOL_GPL vmlinux 0xdca52e9e power_supply_class +EXPORT_SYMBOL_GPL vmlinux 0xdcc016d4 tcp_register_congestion_control +EXPORT_SYMBOL_GPL vmlinux 0xdd10c333 device_release_driver +EXPORT_SYMBOL_GPL vmlinux 0xdd8241df dm_rh_inc_pending +EXPORT_SYMBOL_GPL vmlinux 0xddb10fd2 ata_ehi_clear_desc +EXPORT_SYMBOL_GPL vmlinux 0xddb8e911 ata_std_bios_param +EXPORT_SYMBOL_GPL vmlinux 0xddcc1673 ata_qc_complete_multiple +EXPORT_SYMBOL_GPL vmlinux 0xddf02557 devres_close_group +EXPORT_SYMBOL_GPL vmlinux 0xde03160e scsi_target_block +EXPORT_SYMBOL_GPL vmlinux 0xde137c1d cpufreq_freq_attr_scaling_available_freqs +EXPORT_SYMBOL_GPL vmlinux 0xde36fa75 blk_abort_queue +EXPORT_SYMBOL_GPL vmlinux 0xde417b81 async_schedule_domain +EXPORT_SYMBOL_GPL vmlinux 0xde46a1a5 pskb_put +EXPORT_SYMBOL_GPL vmlinux 0xde708cf0 kset_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0xdea48124 dequeue_signal +EXPORT_SYMBOL_GPL vmlinux 0xded8ecd1 inet_twsk_schedule +EXPORT_SYMBOL_GPL vmlinux 0xdf0ceee0 devres_release_group +EXPORT_SYMBOL_GPL vmlinux 0xdf10ac17 mc13892_register_regulator +EXPORT_SYMBOL_GPL vmlinux 0xdf461842 usb_hcd_giveback_urb +EXPORT_SYMBOL_GPL vmlinux 0xdf9d15c8 cfi_qry_mode_on +EXPORT_SYMBOL_GPL vmlinux 0xdf9e6582 sg_scsi_ioctl +EXPORT_SYMBOL_GPL vmlinux 0xdfbddcf7 rtc_alarm_irq_enable +EXPORT_SYMBOL_GPL vmlinux 0xe02b2677 ata_sff_postreset +EXPORT_SYMBOL_GPL vmlinux 0xe0634f21 fat_detach +EXPORT_SYMBOL_GPL vmlinux 0xe0785868 fat_attach +EXPORT_SYMBOL_GPL vmlinux 0xe07bd527 inet_unhash +EXPORT_SYMBOL_GPL vmlinux 0xe0b21a9b usb_hcd_check_unlink_urb +EXPORT_SYMBOL_GPL vmlinux 0xe0bbfeae fat_fs_error +EXPORT_SYMBOL_GPL vmlinux 0xe0c9c965 security_inode_create +EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e xfrm_aead_get_byname +EXPORT_SYMBOL_GPL vmlinux 0xe0e0801c scsi_dh_attach +EXPORT_SYMBOL_GPL vmlinux 0xe12a38ad sdio_writeb +EXPORT_SYMBOL_GPL vmlinux 0xe15c0ce6 snd_soc_info_enum_ext +EXPORT_SYMBOL_GPL vmlinux 0xe174cb2f usb_alloc_urb +EXPORT_SYMBOL_GPL vmlinux 0xe17a42ec tcp_death_row +EXPORT_SYMBOL_GPL vmlinux 0xe18f7aec device_del +EXPORT_SYMBOL_GPL vmlinux 0xe221c8f6 register_net_sysctl_rotable +EXPORT_SYMBOL_GPL vmlinux 0xe259cc80 ata_sff_error_handler +EXPORT_SYMBOL_GPL vmlinux 0xe298c2ad ring_buffer_swap_cpu +EXPORT_SYMBOL_GPL vmlinux 0xe2a3f25e rtc_irq_register +EXPORT_SYMBOL_GPL vmlinux 0xe2a56640 dm_unregister_path_selector +EXPORT_SYMBOL_GPL vmlinux 0xe3077477 put_driver +EXPORT_SYMBOL_GPL vmlinux 0xe30a5099 sata_link_resume +EXPORT_SYMBOL_GPL vmlinux 0xe323b811 dm_rh_start_recovery +EXPORT_SYMBOL_GPL vmlinux 0xe327eb48 device_add +EXPORT_SYMBOL_GPL vmlinux 0xe3b1cf5a devres_destroy +EXPORT_SYMBOL_GPL vmlinux 0xe3f6b607 usb_buffer_unmap_sg +EXPORT_SYMBOL_GPL vmlinux 0xe3f855ed sata_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xe42eb054 usb_driver_claim_interface +EXPORT_SYMBOL_GPL vmlinux 0xe471e0b1 nf_unregister_queue_handlers +EXPORT_SYMBOL_GPL vmlinux 0xe489d3ab shmem_file_setup +EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0 ata_wait_register +EXPORT_SYMBOL_GPL vmlinux 0xe4e42fde attribute_container_register +EXPORT_SYMBOL_GPL vmlinux 0xe4e700a0 dm_device_name +EXPORT_SYMBOL_GPL vmlinux 0xe4e79bb0 __tracepoint_block_bio_complete +EXPORT_SYMBOL_GPL vmlinux 0xe4f4ffb5 led_trigger_event +EXPORT_SYMBOL_GPL vmlinux 0xe4f8593a queue_work_on +EXPORT_SYMBOL_GPL vmlinux 0xe4fa4608 hrtimer_try_to_cancel +EXPORT_SYMBOL_GPL vmlinux 0xe530071c pm_qos_remove_requirement +EXPORT_SYMBOL_GPL vmlinux 0xe56c5adf sysfs_put +EXPORT_SYMBOL_GPL vmlinux 0xe62cd598 tty_perform_flush +EXPORT_SYMBOL_GPL vmlinux 0xe6488b47 cpufreq_notify_transition +EXPORT_SYMBOL_GPL vmlinux 0xe79b2f2d snd_soc_get_volsw_s8 +EXPORT_SYMBOL_GPL vmlinux 0xe7a4ddcb dm_kill_unmapped_request +EXPORT_SYMBOL_GPL vmlinux 0xe7d02921 regulator_register_notifier +EXPORT_SYMBOL_GPL vmlinux 0xe8259227 ring_buffer_entries +EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7 dpm_suspend_start +EXPORT_SYMBOL_GPL vmlinux 0xe876c0eb console_drivers +EXPORT_SYMBOL_GPL vmlinux 0xe8789a12 eventfd_ctx_get +EXPORT_SYMBOL_GPL vmlinux 0xe89ae4e3 crypto_spawn_tfm +EXPORT_SYMBOL_GPL vmlinux 0xe8e89f25 vfs_lock_file +EXPORT_SYMBOL_GPL vmlinux 0xe917e733 ktime_add_safe +EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3 devres_free +EXPORT_SYMBOL_GPL vmlinux 0xe9587909 usb_unregister_notify +EXPORT_SYMBOL_GPL vmlinux 0xe971018e snd_soc_jack_new +EXPORT_SYMBOL_GPL vmlinux 0xe9af497d tty_put_char +EXPORT_SYMBOL_GPL vmlinux 0xe9c213d5 disk_get_part +EXPORT_SYMBOL_GPL vmlinux 0xe9e76ad1 i2c_bus_type +EXPORT_SYMBOL_GPL vmlinux 0xea065e01 task_handoff_unregister +EXPORT_SYMBOL_GPL vmlinux 0xea124bd1 gcd +EXPORT_SYMBOL_GPL vmlinux 0xea3fffb0 register_timer_hook +EXPORT_SYMBOL_GPL vmlinux 0xea418e0f atapi_cmd_type +EXPORT_SYMBOL_GPL vmlinux 0xea563a3a kallsyms_on_each_symbol +EXPORT_SYMBOL_GPL vmlinux 0xea8a8aec usb_driver_release_interface +EXPORT_SYMBOL_GPL vmlinux 0xea967044 cpufreq_register_governor +EXPORT_SYMBOL_GPL vmlinux 0xea9eefa6 device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xeadc29b2 ata_sff_port_ops +EXPORT_SYMBOL_GPL vmlinux 0xeae74760 scsi_nl_send_transport_msg +EXPORT_SYMBOL_GPL vmlinux 0xeb36bc6d imx_ssi_dai +EXPORT_SYMBOL_GPL vmlinux 0xeb5be2e6 skb_morph +EXPORT_SYMBOL_GPL vmlinux 0xeb80c3b5 tty_get_pgrp +EXPORT_SYMBOL_GPL vmlinux 0xeb9ca47d usb_get_current_frame_number +EXPORT_SYMBOL_GPL vmlinux 0xec1b043e regulator_suspend_prepare +EXPORT_SYMBOL_GPL vmlinux 0xec1dc582 sdio_release_host +EXPORT_SYMBOL_GPL vmlinux 0xec3be09f blkcipher_walk_virt +EXPORT_SYMBOL_GPL vmlinux 0xec569c09 rtc_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xec5afc74 hidraw_disconnect +EXPORT_SYMBOL_GPL vmlinux 0xeca1c0e3 inet_csk_reqsk_queue_hash_add +EXPORT_SYMBOL_GPL vmlinux 0xeca4a2cf power_supply_unregister +EXPORT_SYMBOL_GPL vmlinux 0xeceeaeec fuse_conn_kill +EXPORT_SYMBOL_GPL vmlinux 0xed2ab443 inet_twsk_purge +EXPORT_SYMBOL_GPL vmlinux 0xed30eeb6 crypto_alloc_pcomp +EXPORT_SYMBOL_GPL vmlinux 0xed819501 __module_text_address +EXPORT_SYMBOL_GPL vmlinux 0xed8b2bf5 ipv6_opt_accepted +EXPORT_SYMBOL_GPL vmlinux 0xed957660 register_pernet_subsys +EXPORT_SYMBOL_GPL vmlinux 0xedb5dd44 crypto_unregister_alg +EXPORT_SYMBOL_GPL vmlinux 0xedb86e21 usb_stor_post_reset +EXPORT_SYMBOL_GPL vmlinux 0xedce7711 inet6_csk_addr2sockaddr +EXPORT_SYMBOL_GPL vmlinux 0xee4e99ef dm_rh_update_states +EXPORT_SYMBOL_GPL vmlinux 0xee64f0c2 snd_soc_jack_report +EXPORT_SYMBOL_GPL vmlinux 0xee7bda68 remove_irq +EXPORT_SYMBOL_GPL vmlinux 0xeea11e09 cpufreq_frequency_table_verify +EXPORT_SYMBOL_GPL vmlinux 0xeec1f140 class_destroy +EXPORT_SYMBOL_GPL vmlinux 0xeee2d149 snd_soc_dapm_put_value_enum_double +EXPORT_SYMBOL_GPL vmlinux 0xef4e963e __atomic_notifier_call_chain +EXPORT_SYMBOL_GPL vmlinux 0xef4ee5b3 usb_interrupt_msg +EXPORT_SYMBOL_GPL vmlinux 0xef53536e hidinput_disconnect +EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70 round_jiffies_up_relative +EXPORT_SYMBOL_GPL vmlinux 0xef82fdba srcu_init_notifier_head +EXPORT_SYMBOL_GPL vmlinux 0xef9a1c39 register_mtd_parser +EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63 ktime_get_ts +EXPORT_SYMBOL_GPL vmlinux 0xefe21106 snmp_mib_init +EXPORT_SYMBOL_GPL vmlinux 0xf00b49e1 sysfs_chmod_file +EXPORT_SYMBOL_GPL vmlinux 0xf055e589 transport_destroy_device +EXPORT_SYMBOL_GPL vmlinux 0xf08825f9 platform_device_register +EXPORT_SYMBOL_GPL vmlinux 0xf0cdcffe ata_sas_port_start +EXPORT_SYMBOL_GPL vmlinux 0xf0e15ded kobject_create_and_add +EXPORT_SYMBOL_GPL vmlinux 0xf0f56592 blk_rq_check_limits +EXPORT_SYMBOL_GPL vmlinux 0xf13c2374 sdio_set_block_size +EXPORT_SYMBOL_GPL vmlinux 0xf1463412 execute_in_process_context +EXPORT_SYMBOL_GPL vmlinux 0xf155faef fuse_request_send_background +EXPORT_SYMBOL_GPL vmlinux 0xf184d189 kernel_power_off +EXPORT_SYMBOL_GPL vmlinux 0xf18d1d18 xfrm_inner_extract_output +EXPORT_SYMBOL_GPL vmlinux 0xf1c6844d skcipher_geniv_exit +EXPORT_SYMBOL_GPL vmlinux 0xf1c7664a __sock_recv_timestamp +EXPORT_SYMBOL_GPL vmlinux 0xf1f3e3b3 kobject_rename +EXPORT_SYMBOL_GPL vmlinux 0xf247a23f queue_delayed_work +EXPORT_SYMBOL_GPL vmlinux 0xf2bab775 debugfs_create_u64 +EXPORT_SYMBOL_GPL vmlinux 0xf2c67ff4 platform_device_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf2d068de led_trigger_unregister_simple +EXPORT_SYMBOL_GPL vmlinux 0xf2dde040 snd_soc_new_pcms +EXPORT_SYMBOL_GPL vmlinux 0xf2e31b5b queue_work +EXPORT_SYMBOL_GPL vmlinux 0xf2fca922 uart_parse_options +EXPORT_SYMBOL_GPL vmlinux 0xf33ccd90 ring_buffer_read +EXPORT_SYMBOL_GPL vmlinux 0xf33e8b90 class_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf34806ec hrtimer_get_res +EXPORT_SYMBOL_GPL vmlinux 0xf34c4e5b rtc_irq_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf3ad0f64 inet_csk_reqsk_queue_prune +EXPORT_SYMBOL_GPL vmlinux 0xf3c85672 usb_match_id +EXPORT_SYMBOL_GPL vmlinux 0xf3e45ef2 usb_unlink_urb +EXPORT_SYMBOL_GPL vmlinux 0xf3e9c394 debugfs_create_dir +EXPORT_SYMBOL_GPL vmlinux 0xf4540417 add_mtd_device +EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2 rcu_barrier_bh +EXPORT_SYMBOL_GPL vmlinux 0xf4bfbbe1 fib_rules_unregister +EXPORT_SYMBOL_GPL vmlinux 0xf4f19abc sdio_writel +EXPORT_SYMBOL_GPL vmlinux 0xf52c6322 snd_soc_dai_set_tristate +EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1 __trace_printk +EXPORT_SYMBOL_GPL vmlinux 0xf553318d cpuidle_pause_and_lock +EXPORT_SYMBOL_GPL vmlinux 0xf561fb81 snd_soc_get_volsw +EXPORT_SYMBOL_GPL vmlinux 0xf586e70d snd_soc_dapm_put_pin_switch +EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd invalidate_bh_lrus +EXPORT_SYMBOL_GPL vmlinux 0xf5a805f5 debugfs_rename +EXPORT_SYMBOL_GPL vmlinux 0xf5b1d535 usb_kill_urb +EXPORT_SYMBOL_GPL vmlinux 0xf5d4bc11 snd_soc_dapm_enable_pin +EXPORT_SYMBOL_GPL vmlinux 0xf60cbbec relay_open +EXPORT_SYMBOL_GPL vmlinux 0xf61504b0 sdev_evt_send +EXPORT_SYMBOL_GPL vmlinux 0xf62ec13b ata_cable_ignore +EXPORT_SYMBOL_GPL vmlinux 0xf65b01ea ring_buffer_iter_empty +EXPORT_SYMBOL_GPL vmlinux 0xf671e249 ata_sas_port_stop +EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73 hwrng_register +EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5 ata_timing_merge +EXPORT_SYMBOL_GPL vmlinux 0xf7378f81 tty_ldisc_ref +EXPORT_SYMBOL_GPL vmlinux 0xf78409b3 led_trigger_set_default +EXPORT_SYMBOL_GPL vmlinux 0xf7afeb18 platform_device_del +EXPORT_SYMBOL_GPL vmlinux 0xf807fd65 scatterwalk_map_and_copy +EXPORT_SYMBOL_GPL vmlinux 0xf80dc251 filter_match_preds +EXPORT_SYMBOL_GPL vmlinux 0xf81722bd snd_soc_new_ac97_codec +EXPORT_SYMBOL_GPL vmlinux 0xf8566705 dm_rh_flush +EXPORT_SYMBOL_GPL vmlinux 0xf863e82a flush_work +EXPORT_SYMBOL_GPL vmlinux 0xf8802492 print_stack_trace +EXPORT_SYMBOL_GPL vmlinux 0xf8b0935c bus_for_each_dev +EXPORT_SYMBOL_GPL vmlinux 0xf8bfe425 rtc_read_time +EXPORT_SYMBOL_GPL vmlinux 0xf8c013ad ip6_dst_blackhole +EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb ata_ratelimit +EXPORT_SYMBOL_GPL vmlinux 0xf9634bbe sysdev_create_file +EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5 __round_jiffies +EXPORT_SYMBOL_GPL vmlinux 0xf9b78867 ata_std_postreset +EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160 ata_id_xfermask +EXPORT_SYMBOL_GPL vmlinux 0xf9d49a18 k_handler +EXPORT_SYMBOL_GPL vmlinux 0xf9f12466 ring_buffer_commit_overrun_cpu +EXPORT_SYMBOL_GPL vmlinux 0xf9f390c3 eventfd_fget +EXPORT_SYMBOL_GPL vmlinux 0xfa151d94 devres_open_group +EXPORT_SYMBOL_GPL vmlinux 0xfa4a245b fat_alloc_new_dir +EXPORT_SYMBOL_GPL vmlinux 0xfa548e3e regulator_bulk_get +EXPORT_SYMBOL_GPL vmlinux 0xfa8d287c cpufreq_cpu_put +EXPORT_SYMBOL_GPL vmlinux 0xfaaf147a dm_set_device_limits +EXPORT_SYMBOL_GPL vmlinux 0xfac8ce74 bt_class +EXPORT_SYMBOL_GPL vmlinux 0xfae82ae9 crypto_mod_put +EXPORT_SYMBOL_GPL vmlinux 0xfb7da8e9 ip_route_output_flow +EXPORT_SYMBOL_GPL vmlinux 0xfbc09c74 class_remove_file +EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d register_oom_notifier +EXPORT_SYMBOL_GPL vmlinux 0xfbfc5794 class_dev_iter_exit +EXPORT_SYMBOL_GPL vmlinux 0xfc1afccb spi_write_then_read +EXPORT_SYMBOL_GPL vmlinux 0xfc57e8af md_allow_write +EXPORT_SYMBOL_GPL vmlinux 0xfc8ee353 ata_eh_thaw_port +EXPORT_SYMBOL_GPL vmlinux 0xfcb3ac72 sdio_unregister_driver +EXPORT_SYMBOL_GPL vmlinux 0xfcb5fa01 ata_bmdma_mode_filter +EXPORT_SYMBOL_GPL vmlinux 0xfcb95220 user_match +EXPORT_SYMBOL_GPL vmlinux 0xfcbd8712 trace_current_buffer_unlock_commit +EXPORT_SYMBOL_GPL vmlinux 0xfcea2af2 sysfs_add_file_to_group +EXPORT_SYMBOL_GPL vmlinux 0xfd03013c device_create +EXPORT_SYMBOL_GPL vmlinux 0xfd431d8f usb_stor_bulk_srb +EXPORT_SYMBOL_GPL vmlinux 0xfd501b6d scsi_dh_activate +EXPORT_SYMBOL_GPL vmlinux 0xfd5a00b9 spi_bitbang_transfer +EXPORT_SYMBOL_GPL vmlinux 0xfd662fca driver_register +EXPORT_SYMBOL_GPL vmlinux 0xfda253ba dm_rh_mark_nosync +EXPORT_SYMBOL_GPL vmlinux 0xfdbe57d1 default_backing_dev_info +EXPORT_SYMBOL_GPL vmlinux 0xfdc6b572 crypto_default_rng +EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c crypto_larval_error +EXPORT_SYMBOL_GPL vmlinux 0xfe3c87c2 fs_kobj +EXPORT_SYMBOL_GPL vmlinux 0xfe83666d ata_sff_check_status +EXPORT_SYMBOL_GPL vmlinux 0xfe8f11a0 crypto_alg_mod_lookup +EXPORT_SYMBOL_GPL vmlinux 0xfe990052 gpio_free +EXPORT_SYMBOL_GPL vmlinux 0xfecbff96 __mark_empty_function +EXPORT_SYMBOL_GPL vmlinux 0xfee81b8f hrtimer_get_remaining +EXPORT_SYMBOL_GPL vmlinux 0xfef564e5 snd_soc_put_value_enum_double +EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe cn_del_callback +EXPORT_SYMBOL_GPL vmlinux 0xff869e14 snd_soc_info_volsw_2r +EXPORT_SYMBOL_GPL vmlinux 0xff8d0b03 usb_create_hcd +EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb __wake_up_sync +EXPORT_SYMBOL_GPL vmlinux 0xffca17a3 snd_soc_put_volsw_2r +EXPORT_SYMBOL_GPL vmlinux 0xffd9de3f usb_stor_disconnect +EXPORT_SYMBOL_GPL vmlinux 0xffddc10c led_trigger_show --- linux-fsl-imx51-2.6.31.orig/debian.fsl-imx51/abi/2.6.31-612.32/armel/imx51.modules +++ linux-fsl-imx51-2.6.31/debian.fsl-imx51/abi/2.6.31-612.32/armel/imx51.modules @@ -0,0 +1,1430 @@ +3c574_cs +3c589_cs +6pack +8021q +8250 +8390 +9p +9pnet +a3d +ab3100-core +acecad +act200l-sir +act_gact +act_ipt +actisys-sir +act_mirred +act_nat +act_pedit +act_police +act_simple +act_skbedit +ad7414 +ad7418 +ad7877 +ad7879 +adcxx +adfs +adi +adm1021 +adm1025 +adm1026 +adm1029 +adm1031 +adm9240 +ads7828 +ads7846 +adt7462 +adt7470 +adt7473 +adt7475 +adutux +aes_generic +af_802154 +af9013 +affs +af_key +af-rxrpc +ah4 +ah6 +aha152x_cs +aiptek +aircable +airo +airo_cs +alphatrack +analog +ansi_cprng +anubis +aoe +appledisplay +appletalk +appletouch +ar9170usb +arc4 +ark3116 +arptable_filter +arp_tables +arpt_mangle +asix +asus_oled +async_memcpy +async_tx +async_xor +at24 +at25 +at76c50x-usb +at76_usb +ath +ati_remote +ati_remote2 +atmel +atmel_cs +atmtcp +atxp1 +au0828 +au8522 +aufs +authenc +auth_rpcgss +autofs +autofs4 +av5100 +avm_cs +ax25 +axnet_cs +b1 +b1pcmcia +b2c2-flexcop +b2c2-flexcop-usb +b43 +b43legacy +b44 +bas_gigaset +baycom_epp +baycom_par +baycom_ser_fdx +baycom_ser_hdx +bcm203x +bcm3510 +bcm5974 +befs +belkin_sa +berry_charge +bfs +bfusb +binfmt_aout +binfmt_misc +block2mtd +blowfish +bluecard_cs +bnep +bonding +bpa10x +bpqether +bq24022 +bq27x00_battery +br2684 +bridge +broadcom +broadsheetfb +bsd_comp +bt3c_cs +btrfs +btsdio +btuart_cs +btusb +bw-qcam +c67x00 +cachefiles +camellia +can +can-bcm +can-dev +can-raw +capi +capidrv +capifs +cast5 +cast6 +catc +cbc +ccm +cdc-acm +cdc_eem +cdc_ether +cdc-phonet +cdc_subset +cdc-wdm +cfg80211 +cfi_cmdset_0001 +cfi_cmdset_0002 +cfi_cmdset_0020 +ch +ch341 +cicada +cifs +cls_basic +cls_fw +cls_route +cls_rsvp +cls_rsvp6 +cls_tcindex +cm109 +cm4000_cs +cm4040_cs +cmtp +cobra +coda +configfs +core +cp210x +cpc-usb +c-qcam +crc32c +crc7 +crc-ccitt +crc-itu-t +cryptd +cryptodev +cryptoloop +crypto_null +cs53l32a +ctr +cts +cuse +cx22702 +cx231xx +cx231xx-alsa +cx231xx-dvb +cx2341x +cx24113 +cx24116 +cx24123 +cx25840 +cxacru +cyberjack +cypress_cy7c63 +cypress_m8 +cytherm +da9030_battery +da9034-ts +da903x +da903x_bl +davicom +db9 +dccp +dccp_diag +dccp_ipv4 +dccp_ipv6 +de600 +de620 +decnet +deflate +des_generic +dib0070 +dib3000mb +dib3000mc +dib7000m +dib7000p +dibx000_common +digi_acceleport +diskonchip +display +dlci +dlm +dm9601 +dm-crypt +dme1737 +dm-queue-length +dm-raid45 +dm-service-time +dm-zero +dnet +dn_rtmsg +doc2000 +doc2001 +doc2001plus +docecc +docprobe +drbd +ds1621 +ds1682 +ds2482 +ds2490 +ds2760_battery +ds2782_battery +dsbr100 +dtl1_cs +dummy +dvb-core +dvb-pll +dvb-usb +dvb-usb-a800 +dvb-usb-af9005 +dvb-usb-af9005-remote +dvb-usb-af9015 +dvb-usb-anysee +dvb-usb-au6610 +dvb-usb-ce6230 +dvb-usb-cinergyT2 +dvb-usb-cxusb +dvb-usb-dib0700 +dvb-usb-dibusb-common +dvb-usb-dibusb-mb +dvb-usb-dibusb-mc +dvb-usb-digitv +dvb-usb-dtt200u +dvb-usb-dtv5100 +dvb-usb-dw2102 +dvb-usb-gl861 +dvb-usb-gp8psk +dvb-usb-m920x +dvb-usb-nova-t-usb2 +dvb-usb-opera +dvb-usb-ttusb2 +dvb-usb-umt-010 +dvb-usb-vp702x +dvb-usb-vp7045 +ebt_802_3 +ebtable_broute +ebtable_filter +ebtable_nat +ebtables +ebt_among +ebt_arp +ebt_arpreply +ebt_dnat +ebt_ip +ebt_ip6 +ebt_limit +ebt_log +ebt_mark +ebt_mark_m +ebt_nflog +ebt_pkttype +ebt_redirect +ebt_snat +ebt_stp +ebt_ulog +ebt_vlan +ecb +echo +econet +eeprom +eeprom_93cx6 +eeti_ts +efs +elo +em28xx +em28xx-alsa +em28xx-dvb +em_cmp +emi26 +emi62 +em_meta +em_nbyte +empeg +em_text +em_u32 +enclosure +eql +esi-sir +esp4 +esp6 +et1011c +et61x251 +ethoc +evbug +exofs +exportfs +f71805f +f71882fg +f75375s +faulty +fb_sys_fops +fcrypt +fdomain_cs +ff-memless +fmvj18x_cs +freevxfs +fscache +ftdi-elan +ftdi_sio +ftl +fujitsu_ts +funsoft +g760a +gadgetfs +gamecon +gameport +garmin_gps +garp +g_audio +g_cdc +gcm +generic +generic_bl +generic_serial +g_ether +gf128mul +gf2k +g_file_storage +gfs2 +gigaset +girbil-sir +gl518sm +gl520sm +gl620a +gluebi +gps_gpiodrv +grip +grip_mp +g_serial +gspca_conex +gspca_etoms +gspca_finepix +gspca_m5602 +gspca_main +gspca_mars +gspca_mr97310a +gspca_ov519 +gspca_ov534 +gspca_pac207 +gspca_pac7311 +gspca_sn9c20x +gspca_sonixb +gspca_sonixj +gspca_spca500 +gspca_spca501 +gspca_spca505 +gspca_spca506 +gspca_spca508 +gspca_spca561 +gspca_sq905 +gspca_sq905c +gspca_stk014 +gspca_stv06xx +gspca_sunplus +gspca_t613 +gspca_tv8532 +gspca_vc032x +gspca_zc3xx +gtco +guillemot +gunze +hci_uart +hci_vhci +hdlc +hdlc_cisco +hdlcdrv +hdlc_fr +hdlc_ppp +hdlc_raw +hdlc_raw_eth +hdlc_x25 +hdpvr +hfcsusb +hfs +hfsplus +hid-a4tech +hid-apple +hid-belkin +hid-cherry +hid-chicony +hid-cypress +hid-drff +hid-ezkey +hid-gaff +hid-gyration +hid-kensington +hid-kye +hid-logitech +hid-microsoft +hid-monterey +hid-ntrig +hidp +hid-petalynx +hid-pl +hid-samsung +hid-sjoy +hid-sony +hid-sunplus +hid-tmff +hid-topseed +hid-wacom +hid-zpff +hostap +hostap_cs +hp4x +hpfs +hso +htc-pasic3 +hwa-hc +hwa-rc +hwmon-vid +i1480-dfu-usb +i1480-est +i1480u-wlp +i2400m +i2400m-sdio +i2400m-usb +i2c-algo-bit +i2c-algo-pca +i2c-imx +i2c-ocores +i2c-parport +i2c-parport-light +i2c-pca-platform +i2c-simtec +i2c-stub +i2c-taos-evm +i2c-tiny-usb +ibmaem +ibmpex +icplus +ics932s401 +idmouse +ifb +iforce +ili9320 +imx_sim +inexio +inftl +input-polldev +int51x1 +interact +io_edgeport +io_ti +iowarrior +ip6_queue +ip6table_filter +ip6table_mangle +ip6table_raw +ip6_tables +ip6table_security +ip6t_ah +ip6t_eui64 +ip6t_frag +ip6t_hbh +ip6t_ipv6header +ip6t_LOG +ip6t_mh +ip6t_REJECT +ip6t_rt +ip6_tunnel +ipaq +ipcomp +ipcomp6 +ipddp +ip_gre +ipip +ipmi_devintf +ipmi_msghandler +ipmi_poweroff +ipmi_si +ipmi_watchdog +ip_queue +iptable_filter +iptable_mangle +iptable_nat +iptable_raw +ip_tables +iptable_security +ipt_addrtype +ipt_ah +ipt_CLUSTERIP +ipt_ecn +ipt_ECN +ipt_LOG +ipt_MASQUERADE +ipt_NETMAP +ipt_REDIRECT +ipt_REJECT +ipt_ULOG +ipu_csi_enc +ipu_prp_enc +ipu_prp_vf_sdc +ipu_prp_vf_sdc_bg +ipu_still +ip_vs +ip_vs_dh +ip_vs_ftp +ip_vs_lblc +ip_vs_lblcr +ip_vs_lc +ip_vs_nq +ip_vs_rr +ip_vs_sed +ip_vs_sh +ip_vs_wlc +ip_vs_wrr +ipw +ipwireless +ipx +ircomm +ir-common +ircomm-tty +irda +irda-usb +ir-kbd-i2c +irlan +irnet +irtty-sir +iscsi_tcp +iscsi_trgt +isdn +isdn_bsdcomp +isight_firmware +isl29003 +isl6421 +isofs +isp116x-hcd +isp1760 +it87 +itd1000 +iwmc3200wifi +jedec_probe +jffs2 +jfs +joydev +joydump +kafs +kaweth +kbtab +kernelcapi +keyspan +keyspan_pda +keyspan_remote +khazad +kingsun-sir +kl5kusb105 +kobil_sct +ks8842 +ks8851 +ks959-sir +ksdazzle-sir +l1oip +lapb +lapbether +lcd +ldusb +lec +leds-bd2802 +leds-da903x +leds-dac124s085 +leds-lp3944 +leds-pca9532 +leds-pca955x +leds-pwm +leds-wm8350 +ledtrig-backlight +ledtrig-default-on +ledtrig-heartbeat +ledtrig-timer +legousbtower +lgdt3305 +lgdt330x +lgs8gl5 +lib80211 +lib80211_crypt_ccmp +lib80211_crypt_tkip +lib80211_crypt_wep +libcrc32c +libertas +libertas_cs +libertas_sdio +libertas_spi +libertas_tf +libertas_tf_usb +libfc +libfcoe +libiscsi +libiscsi_tcp +libosd +libsas +lightning +line6usb +linear +lirc_atiusb +lirc_bt829 +lirc_dev +lirc_ene0100 +lirc_i2c +lirc_igorplugusb +lirc_imon +lirc_it87 +lirc_ite8709 +lirc_mceusb +lirc_sasem +lirc_serial +lirc_sir +lirc_streamzap +lirc_ttusbir +lis3lv02d +lis3lv02d_spi +litelink-sir +lkkbd +llc +llc2 +lm63 +lm70 +lm75 +lm77 +lm78 +lm80 +lm83 +lm8323 +lm85 +lm87 +lm90 +lm92 +lm93 +lm95241 +lnbp21 +lockd +logger +lp +lp3971 +lpddr_cmds +lrw +ltc4215 +ltc4245 +ltv350qv +lxt +lzo +lzo_compress +lzo_decompress +m25p80 +ma600-sir +mac80211 +macvlan +magellan +map_absent +map_ram +map_rom +marvell +max1111 +max1586 +max1619 +max17040_battery +max3100 +max6650 +max6875 +mb862xxfb +mc44s803 +mcp2120-sir +mcs7780 +mcs7830 +mct_u232 +md4 +mdc800 +mdio-bitbang +memain +metronomefb +mfd-core +michael_mic +microtek +mimio +minix +mISDN_core +mISDN_dsp +mk712 +mkiss +mmc_spi +mos7720 +mos7840 +moto_modem +mpoa +msp3400 +mt2060 +mt20xx +mt2266 +mt312 +mt352 +mt9m001 +mt9m111 +mt9t031 +mt9v011 +mt9v022 +mtdconcat +mtd_dataflash +mtd_oobtest +mtdoops +mtd_pagetest +mtdram +mtd_readtest +mtd_speedtest +mtd_stresstest +mtd_subpagetest +mtd_torturetest +mtouch +multipath +mxc_v4l2_capture +mxc_v4l2_output +mxc_w1 +mxl5005s +mxl5007t +national +navman +nbd +ncpfs +net1080 +netconsole +netrom +newtonkbd +nf_conntrack +nf_conntrack_amanda +nf_conntrack_ftp +nf_conntrack_h323 +nf_conntrack_ipv4 +nf_conntrack_ipv6 +nf_conntrack_irc +nf_conntrack_netbios_ns +nf_conntrack_netlink +nf_conntrack_pptp +nf_conntrack_proto_gre +nf_conntrack_proto_sctp +nf_conntrack_proto_udplite +nf_conntrack_sip +nf_conntrack_tftp +nf_defrag_ipv4 +nf_nat +nf_nat_amanda +nf_nat_ftp +nf_nat_h323 +nf_nat_irc +nf_nat_pptp +nf_nat_proto_gre +nf_nat_proto_sctp +nf_nat_proto_udplite +nf_nat_sip +nf_nat_snmp_basic +nf_nat_tftp +nfnetlink +nfnetlink_log +nfnetlink_queue +nfs +nfs_acl +nfsd +nftl +nf_tproxy_core +n_hdlc +nilfs2 +nl802154 +nls_ascii +nls_cp1250 +nls_cp1251 +nls_cp1255 +nls_cp437 +nls_cp737 +nls_cp775 +nls_cp850 +nls_cp852 +nls_cp855 +nls_cp857 +nls_cp860 +nls_cp861 +nls_cp862 +nls_cp863 +nls_cp864 +nls_cp865 +nls_cp866 +nls_cp869 +nls_cp874 +nls_cp932 +nls_cp936 +nls_cp949 +nls_cp950 +nls_euc-jp +nls_iso8859-1 +nls_iso8859-13 +nls_iso8859-14 +nls_iso8859-15 +nls_iso8859-2 +nls_iso8859-3 +nls_iso8859-4 +nls_iso8859-5 +nls_iso8859-6 +nls_iso8859-7 +nls_iso8859-9 +nls_koi8-r +nls_koi8-ru +nls_koi8-u +nls_utf8 +nmclan_cs +nop-usb-xceiv +n_r3964 +ns558 +nsp_cs +nst +ntfs +nvram +nxt200x +nxt6000 +ocfs2 +ocfs2_dlm +ocfs2_dlmfs +ocfs2_nodemanager +ocfs2_stackglue +ocfs2_stack_o2cb +ocfs2_stack_user +old_belkin-sir +omfs +omninet +onenand +onenand_sim +oprofile +opticon +option +orinoco +orinoco_cs +osd +osdblk +osst +oti6858 +output +ov3640_camera +ov772x +oxu210hp-hcd +p54common +p54spi +p54usb +p8022 +p8023 +p9auth +panel +parkbd +parport +parport_ax88796 +pata_pcmcia +pbe5 +pc87360 +pc87427 +pca9539 +pcbc +pcf50633-adc +pcf50633-charger +pcf50633-core +pcf50633-gpio +pcf50633-input +pcf50633-regulator +pcf8574 +pcf8575 +pcf8591 +pcmcia +pcmcia_core +pcnet_cs +pcwd_usb +pda_power +pegasus +penmount +phonet +phram +physmap +pktgen +pl2303 +platform_lcd +plat-ram +plip +plusb +pn_pep +pohmelfs +powermate +ppdev +ppp_async +ppp_deflate +ppp_mppe +pppoatm +pppoe +pppol2tp +pppox +ppp_synctty +psmouse +psnap +pvrusb2 +pwm +pwm_bl +qcserial +qinfo_probe +qlogic_cs +qlogicfas408 +qnx4 +qsemi +qt1010 +quota_tree +quota_v1 +quota_v2 +r8a66597-hcd +radio-mr800 +radio-si470x +radio-tea5764 +raid0 +raid1 +raid10 +raid456 +raid6_pq +raid_class +ramzswap +raw +ray_cs +realtek +redboot +reed_solomon +reiserfs +rfd_ftl +rio +rio500 +riscom8 +rmd128 +rmd160 +rmd256 +rmd320 +rndis_host +rndis_wlan +romfs +rose +rpcsec_gss_krb5 +rpcsec_gss_spkm3 +rt2500usb +rt2800usb +rt2x00lib +rt2x00usb +rt73usb +rtc-bq4802 +rtc-cmos +rtc-ds1286 +rtc-ds1305 +rtc-ds1307 +rtc-ds1374 +rtc-ds1390 +rtc-ds1553 +rtc-ds1672 +rtc-ds1742 +rtc-ds3234 +rtc-fm3130 +rtc-isl1208 +rtc-m41t80 +rtc-m41t94 +rtc-m48t35 +rtc-m48t59 +rtc-m48t86 +rtc-max6900 +rtc-max6902 +rtc-pcf50633 +rtc-pcf8563 +rtc-pcf8583 +rtc-rs5c348 +rtc-rs5c372 +rtc-rx8025 +rtc-rx8581 +rtc-stk17ta8 +rtc-twl4030 +rtc-v3020 +rtc-wm8350 +rtc-x1205 +rtl8150 +rtl8187 +rxkad +s1d13xxxfb +s2255drv +s5h1409 +s5h1411 +s5h1420 +saa5246a +saa5249 +saa7115 +safe_serial +salsa20_generic +sata_mv +sch_atm +sch_cbq +sch_drr +sch_dsmark +sch_gred +sch_hfsc +sch_htb +sch_ingress +sch_multiq +sch_netem +sch_prio +sch_red +sch_sfq +sch_tbf +sch_teql +scsi_dh_alua +scsi_dh_emc +scsi_dh_hp_sw +scsi_dh_rdac +scsi_tgt +scsi_transport_fc +scsi_transport_iscsi +scsi_transport_sas +scsi_transport_spi +scsi_transport_srp +scsi_wait_scan +sctp +sdhci +sdhci-pltfm +sdio_uart +seed +seqiv +ser_gigaset +serial_cs +serio_raw +sermouse +serpent +serport +serqt_usb2 +ses +sha1_generic +sha256_generic +sha512_generic +si21xx +sidewinder +siemens_mpi +sierra +sir-dev +sisusbvga +sit +sja1000 +sja1000_platform +sl811_cs +sl811-hcd +slip +slram +sm501 +sm501fb +smbfs +smc91c92_cs +smsc47b397 +smsc47m1 +smsc47m192 +smsc95xx +smsdvb +smsmdtv +smssdio +smsusb +sn9c102 +snd-ak4117 +snd-dummy +snd-hrtimer +snd-hwdep +snd-mixer-oss +snd-mpu401 +snd-mpu401-uart +snd-mtpav +snd-mts64 +snd-pcm-oss +snd-pdaudiocf +snd-portman2x4 +snd-rawmidi +snd-seq +snd-seq-device +snd-seq-dummy +snd-seq-midi +snd-seq-midi-event +snd-seq-oss +snd-seq-virmidi +snd-serial-u16550 +snd-spdif +snd-usb-audio +snd-usb-caiaq +snd-usb-lib +snd-virmidi +snd-vx-lib +snd-vxpocket +soc_camera +soc_camera_platform +softdog +spaceball +spaceorb +spcp8x5 +specialix +spectrum_cs +speedtch +spi_butterfly +spidev +spi_lm70llp +squashfs +ssb +ssfdc +st +stb6000 +ste10Xp +stinger +stir4200 +stkwebcam +stowaway +stp +stv0288 +stv0297 +stv0299 +sunkbd +sunrpc +sym53c500_cs +symbolserial +synaptics_i2c +synclink_cs +syscopyarea +sysfillrect +sysimgblt +sysv +tcp_bic +tcp_highspeed +tcp_htcp +tcp_hybla +tcp_illinois +tcp_lp +tcp_probe +tcp_scalable +tcp_vegas +tcp_veno +tcp_westwood +tcp_yeah +tcrypt +tda10021 +tda10023 +tda10048 +tda1004x +tda10086 +tda18271 +tda826x +tda827x +tda8290 +tda9887 +tdo24m +tea +tea5761 +tea5767 +tekram-sir +tgr192 +thermal_sys +thmc50 +timeriomem-rng +tipc +ti_usb_3410_5052 +tle62x0 +tmdc +tmiofb +tmp401 +touchit213 +touchright +touchwin +tpm +tpm_atmel +tpm_nsc +trancevibrator +tranzport +ts_bm +tsc2007 +ts_fsm +ts_kmp +tsl2550 +tun +tuner +tuner-simple +tuner-types +tuner-xc2028 +tunnel4 +tunnel6 +turbografx +tveeprom +tvp5150 +tw9910 +twidjoy +twl4030-pwrbutton +twl4030-usb +twl4030_wdt +twofish +twofish_common +u132-hcd +ubi +ubifs +udf +udlfb +ueagle-atm +ufs +uinput +uio +uio_pdrv +uio_pdrv_genirq +uio_sercos3 +uio_smx +ums-alauda +ums-datafab +ums-freecom +ums-isd200 +ums-jumpshot +ums-karma +ums-sddr09 +ums-sddr55 +ums-usbat +unifi_fs +usb8xxx +usbatm +usb_debug +usb_gigaset +usbhid +usbip +usbip_common_mod +usblcd +usbled +usblp +usbnet +usbserial +usbsevseg +usbtest +usbtmc +usbtouchscreen +usbvision +userspace-consumer +uss720 +uvcvideo +uvesafb +uwb +v4l1-compat +v4l2-common +v4l2-int-device +vcan +veth +vgg2432a4 +vhci-hcd +videobuf-core +videobuf-dvb +videobuf-vmalloc +videodev +virtual +visor +vitesse +vstusb +vsxxxaa +vt1211 +w1_bq27000 +w1_ds2431 +w1_ds2433 +w1_ds2438 +w1_ds2760 +w1_smem +w1_therm +w35und +w83627ehf +w83627hf +w83781d +w83791d +w83792d +w83793 +w83l785ts +w83l786ng +w90p910_ts +w9966 +wacom +wacom_w8001 +walkera0701 +wanrouter +warrior +whiteheat +wimax +wire +wl12xx +wl3501_cs +wlp +wm8350 +wm8350_bl +wm8350-i2c +wm8350_power +wm8350-regulator +wm8350_wdt +wm8400-core +wm8400-regulator +wm8775 +wp512 +wusb-cbaf +wusbcore +wusb-wa +x25 +x25_asy +xc5000 +xcbc +xfrm4_mode_beet +xfrm4_mode_transport +xfrm4_mode_tunnel +xfrm4_tunnel +xfrm6_mode_beet +xfrm6_mode_ro +xfrm6_mode_transport +xfrm6_mode_tunnel +xfrm6_tunnel +xfrm_ipcomp +xfrm_user +xfs +xirc2ps_cs +xor +xpad +x_tables +xt_CLASSIFY +xt_cluster +xt_comment +xt_connbytes +xt_connlimit +xt_connmark +xt_CONNMARK +xt_CONNSECMARK +xt_conntrack +xt_dccp +xt_dscp +xt_DSCP +xt_esp +xt_hashlimit +xt_helper +xt_hl +xt_HL +xt_iprange +xtkbd +xt_LED +xt_length +xt_limit +xt_mac +xt_mark +xt_MARK +xt_multiport +xt_NFLOG +xt_NFQUEUE +xt_NOTRACK +xt_osf +xt_owner +xt_physdev +xt_pkttype +xt_policy +xt_quota +xt_rateest +xt_RATEEST +xt_realm +xt_recent +xts +xt_sctp +xt_SECMARK +xt_socket +xt_state +xt_statistic +xt_string +xt_tcpmss +xt_TCPMSS +xt_tcpudp +xt_time +xt_TPROXY +xt_TRACE +xt_u32 +xusbatm +xvmalloc +yam +yealink +zaurus +zc0301 +zd1201 +zd1211rw +zhenhua +zl10353 +zlib +zlib_deflate +zr364xx --- linux-fsl-imx51-2.6.31.orig/mm/mempolicy.c +++ linux-fsl-imx51-2.6.31/mm/mempolicy.c @@ -1024,7 +1024,7 @@ err = migrate_prep(); if (err) - return err; + goto mpol_out; } { NODEMASK_SCRATCH(scratch); @@ -1039,10 +1039,9 @@ err = -ENOMEM; NODEMASK_SCRATCH_FREE(scratch); } - if (err) { - mpol_put(new); - return err; - } + if (err) + goto mpol_out; + vma = check_range(mm, start, end, nmask, flags | MPOL_MF_INVERT, &pagelist); @@ -1058,9 +1057,11 @@ if (!err && nr_failed && (flags & MPOL_MF_STRICT)) err = -EIO; - } + } else + putback_lru_pages(&pagelist); up_write(&mm->mmap_sem); + mpol_out: mpol_put(new); return err; } --- linux-fsl-imx51-2.6.31.orig/mm/pagewalk.c +++ linux-fsl-imx51-2.6.31/mm/pagewalk.c @@ -1,6 +1,7 @@ #include #include #include +#include static int walk_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end, struct mm_walk *walk) @@ -107,6 +108,7 @@ pgd_t *pgd; unsigned long next; int err = 0; + struct vm_area_struct *vma; if (addr >= end) return err; @@ -117,11 +119,22 @@ pgd = pgd_offset(walk->mm, addr); do { next = pgd_addr_end(addr, end); + + /* skip hugetlb vma to avoid hugepage PMD being cleared + * in pmd_none_or_clear_bad(). */ + vma = find_vma(walk->mm, addr); + if (vma && is_vm_hugetlb_page(vma)) { + if (vma->vm_end < next) + next = vma->vm_end; + continue; + } + if (pgd_none_or_clear_bad(pgd)) { if (walk->pte_hole) err = walk->pte_hole(addr, next, walk); if (err) break; + pgd++; continue; } if (walk->pgd_entry) @@ -131,7 +144,8 @@ err = walk_pud_range(pgd, addr, next, walk); if (err) break; - } while (pgd++, addr = next, addr != end); + pgd++; + } while (addr = next, addr != end); return err; } --- linux-fsl-imx51-2.6.31.orig/mm/highmem.c +++ linux-fsl-imx51-2.6.31/mm/highmem.c @@ -426,16 +426,21 @@ void debug_kmap_atomic(enum km_type type) { - static unsigned warn_count = 10; + static int warn_count = 10; - if (unlikely(warn_count == 0)) + if (unlikely(warn_count < 0)) return; if (unlikely(in_interrupt())) { - if (in_irq()) { + if (in_nmi()) { + if (type != KM_NMI && type != KM_NMI_PTE) { + WARN_ON(1); + warn_count--; + } + } else if (in_irq()) { if (type != KM_IRQ0 && type != KM_IRQ1 && type != KM_BIO_SRC_IRQ && type != KM_BIO_DST_IRQ && - type != KM_BOUNCE_READ) { + type != KM_BOUNCE_READ && type != KM_IRQ_PTE) { WARN_ON(1); warn_count--; } @@ -452,7 +457,9 @@ } if (type == KM_IRQ0 || type == KM_IRQ1 || type == KM_BOUNCE_READ || - type == KM_BIO_SRC_IRQ || type == KM_BIO_DST_IRQ) { + type == KM_BIO_SRC_IRQ || type == KM_BIO_DST_IRQ || + type == KM_IRQ_PTE || type == KM_NMI || + type == KM_NMI_PTE ) { if (!irqs_disabled()) { WARN_ON(1); warn_count--; --- linux-fsl-imx51-2.6.31.orig/mm/swapfile.c +++ linux-fsl-imx51-2.6.31/mm/swapfile.c @@ -584,8 +584,12 @@ nr_swap_pages++; p->inuse_pages--; } - if (!swap_count(count)) + if (!swap_count(count)) { mem_cgroup_uncharge_swap(ent); + if (p->notify_swap_entry_free_fn) + p->notify_swap_entry_free_fn(offset); + } + return count; } @@ -1149,8 +1153,7 @@ } else retval = unuse_mm(mm, entry, page); - if (set_start_mm && - swap_count(*swap_map) < swcount) { + if (set_start_mm && *swap_map < swcount) { mmput(new_start_mm); atomic_inc(&mm->mm_users); new_start_mm = mm; @@ -2164,6 +2167,23 @@ } /* + * Sets callback for event when swap_map[offset] == 0 + * i.e. page at this swap offset is not longer used. + * + * type: identifies swap file + * fn: callback function + */ +void set_notify_swap_entry_free(unsigned type, void (*fn) (unsigned long)) +{ + struct swap_info_struct *sis; + sis = get_swap_info_struct(type); + BUG_ON(!sis); + sis->notify_swap_entry_free_fn = fn; + return; +} +EXPORT_SYMBOL(set_notify_swap_entry_free); + +/* * swap_lock prevents swap_map being freed. Don't grab an extra * reference on the swaphandle, it doesn't matter if it becomes unused. */ --- linux-fsl-imx51-2.6.31.orig/mm/mprotect.c +++ linux-fsl-imx51-2.6.31/mm/mprotect.c @@ -26,9 +26,14 @@ #include #include #include +#include #include #include +#ifndef arch_remove_exec_range +#define arch_remove_exec_range(mm, limit) do { ; } while (0) +#endif + #ifndef pgprot_modify static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) { @@ -139,7 +144,7 @@ struct mm_struct *mm = vma->vm_mm; unsigned long oldflags = vma->vm_flags; long nrpages = (end - start) >> PAGE_SHIFT; - unsigned long charged = 0; + unsigned long charged = 0, old_end = vma->vm_end; pgoff_t pgoff; int error; int dirty_accountable = 0; @@ -204,6 +209,9 @@ dirty_accountable = 1; } + if (oldflags & VM_EXEC) + arch_remove_exec_range(current->mm, old_end); + mmu_notifier_invalidate_range_start(mm, start, end); if (is_vm_hugetlb_page(vma)) hugetlb_change_protection(vma, start, end, vma->vm_page_prot); @@ -212,6 +220,7 @@ mmu_notifier_invalidate_range_end(mm, start, end); vm_stat_account(mm, oldflags, vma->vm_file, -nrpages); vm_stat_account(mm, newflags, vma->vm_file, nrpages); + perf_counter_mmap(vma); return 0; fail: @@ -300,7 +309,6 @@ error = mprotect_fixup(vma, &prev, nstart, tmp, newflags); if (error) goto out; - perf_counter_mmap(vma); nstart = tmp; if (nstart < prev->vm_end) --- linux-fsl-imx51-2.6.31.orig/mm/nommu.c +++ linux-fsl-imx51-2.6.31/mm/nommu.c @@ -1056,7 +1056,7 @@ ret = vma->vm_file->f_op->mmap(vma->vm_file, vma); if (ret == 0) { vma->vm_region->vm_top = vma->vm_region->vm_end; - return ret; + return 0; } if (ret != -ENOSYS) return ret; @@ -1073,7 +1073,8 @@ */ static int do_mmap_private(struct vm_area_struct *vma, struct vm_region *region, - unsigned long len) + unsigned long len, + unsigned long capabilities) { struct page *pages; unsigned long total, point, n, rlen; @@ -1084,13 +1085,13 @@ * shared mappings on devices or memory * - VM_MAYSHARE will be set if it may attempt to share */ - if (vma->vm_file) { + if (capabilities & BDI_CAP_MAP_DIRECT) { ret = vma->vm_file->f_op->mmap(vma->vm_file, vma); if (ret == 0) { /* shouldn't return success if we're not sharing */ BUG_ON(!(vma->vm_flags & VM_MAYSHARE)); vma->vm_region->vm_top = vma->vm_region->vm_end; - return ret; + return 0; } if (ret != -ENOSYS) return ret; @@ -1317,7 +1318,8 @@ goto error_just_free; } } - fput(region->vm_file); + if (region->vm_file) + fput(region->vm_file); kmem_cache_free(vm_region_jar, region); region = pregion; result = start; @@ -1328,7 +1330,7 @@ * - this is the hook for quasi-memory character devices to * tell us the location of a shared mapping */ - if (file && file->f_op->get_unmapped_area) { + if (capabilities & BDI_CAP_MAP_DIRECT) { addr = file->f_op->get_unmapped_area(file, addr, len, pgoff, flags); if (IS_ERR((void *) addr)) { @@ -1352,15 +1354,17 @@ } vma->vm_region = region; - add_nommu_region(region); - /* set up the mapping */ + /* set up the mapping + * - the region is filled in if BDI_CAP_MAP_DIRECT is still set + */ if (file && vma->vm_flags & VM_SHARED) ret = do_mmap_shared_file(vma); else - ret = do_mmap_private(vma, region, len); + ret = do_mmap_private(vma, region, len, capabilities); if (ret < 0) - goto error_put_region; + goto error_just_free; + add_nommu_region(region); /* okay... we have a mapping; now we have to register it */ result = vma->vm_start; @@ -1378,25 +1382,14 @@ kleave(" = %lx", result); return result; -error_put_region: - __put_nommu_region(region); - if (vma) { - if (vma->vm_file) { - fput(vma->vm_file); - if (vma->vm_flags & VM_EXECUTABLE) - removed_exe_file_vma(vma->vm_mm); - } - kmem_cache_free(vm_area_cachep, vma); - } - kleave(" = %d [pr]", ret); - return ret; - error_just_free: up_write(&nommu_region_sem); error: - fput(region->vm_file); + if (region->vm_file) + fput(region->vm_file); kmem_cache_free(vm_region_jar, region); - fput(vma->vm_file); + if (vma->vm_file) + fput(vma->vm_file); if (vma->vm_flags & VM_EXECUTABLE) removed_exe_file_vma(vma->vm_mm); kmem_cache_free(vm_area_cachep, vma); --- linux-fsl-imx51-2.6.31.orig/mm/shmem.c +++ linux-fsl-imx51-2.6.31/mm/shmem.c @@ -2298,8 +2298,7 @@ sb->s_fs_info = NULL; } -static int shmem_fill_super(struct super_block *sb, - void *data, int silent) +int shmem_fill_super(struct super_block *sb, void *data, int silent) { struct inode *inode; struct dentry *root; @@ -2519,7 +2518,7 @@ .kill_sb = kill_litter_super, }; -static int __init init_tmpfs(void) +int __init init_tmpfs(void) { int error; @@ -2576,7 +2575,7 @@ .kill_sb = kill_litter_super, }; -static int __init init_tmpfs(void) +int __init init_tmpfs(void) { BUG_ON(register_filesystem(&tmpfs_fs_type) != 0); @@ -2687,5 +2686,3 @@ vma->vm_ops = &shmem_vm_ops; return 0; } - -module_init(init_tmpfs) --- linux-fsl-imx51-2.6.31.orig/mm/memcontrol.c +++ linux-fsl-imx51-2.6.31/mm/memcontrol.c @@ -496,7 +496,13 @@ task_unlock(task); if (!curr) return 0; - if (curr->use_hierarchy) + /* + * We should check use_hierarchy of "mem" not "curr". Because checking + * use_hierarchy of "curr" here make this function true if hierarchy is + * enabled in "curr" and "curr" is a child of "mem" in *cgroup* + * hierarchy(even if use_hierarchy is disabled in "mem"). + */ + if (mem->use_hierarchy) ret = css_is_ancestor(&curr->css, &mem->css); else ret = (curr == mem); --- linux-fsl-imx51-2.6.31.orig/mm/migrate.c +++ linux-fsl-imx51-2.6.31/mm/migrate.c @@ -597,7 +597,7 @@ struct page *newpage = get_new_page(page, private, &result); int rcu_locked = 0; int charge = 0; - struct mem_cgroup *mem; + struct mem_cgroup *mem = NULL; if (!newpage) return -ENOMEM; @@ -937,6 +937,9 @@ goto out_pm; err = -ENODEV; + if (node < 0 || node >= MAX_NUMNODES) + goto out_pm; + if (!node_state(node, N_HIGH_MEMORY)) goto out_pm; --- linux-fsl-imx51-2.6.31.orig/mm/oom_kill.c +++ linux-fsl-imx51-2.6.31/mm/oom_kill.c @@ -400,7 +400,7 @@ cpuset_print_task_mems_allowed(current); task_unlock(current); dump_stack(); - mem_cgroup_print_oom_info(mem, current); + mem_cgroup_print_oom_info(mem, p); show_mem(); if (sysctl_oom_dump_tasks) dump_tasks(mem); --- linux-fsl-imx51-2.6.31.orig/mm/mincore.c +++ linux-fsl-imx51-2.6.31/mm/mincore.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -72,6 +73,42 @@ if (!vma || addr < vma->vm_start) return -ENOMEM; +#ifdef CONFIG_HUGETLB_PAGE + if (is_vm_hugetlb_page(vma)) { + struct hstate *h; + unsigned long nr_huge; + unsigned char present; + + i = 0; + nr = min(pages, (vma->vm_end - addr) >> PAGE_SHIFT); + h = hstate_vma(vma); + nr_huge = ((addr + pages * PAGE_SIZE - 1) >> huge_page_shift(h)) + - (addr >> huge_page_shift(h)) + 1; + nr_huge = min(nr_huge, + (vma->vm_end - addr) >> huge_page_shift(h)); + while (1) { + /* hugepage always in RAM for now, + * but generally it needs to be check */ + ptep = huge_pte_offset(current->mm, + addr & huge_page_mask(h)); + present = !!(ptep && + !huge_pte_none(huge_ptep_get(ptep))); + while (1) { + vec[i++] = present; + addr += PAGE_SIZE; + /* reach buffer limit */ + if (i == nr) + return nr; + /* check hugepage border */ + if (!((addr & ~huge_page_mask(h)) + >> PAGE_SHIFT)) + break; + } + } + return nr; + } +#endif + /* * Calculate how many pages there are left in the last level of the * PTE array for our address. --- linux-fsl-imx51-2.6.31.orig/mm/hugetlb.c +++ linux-fsl-imx51-2.6.31/mm/hugetlb.c @@ -1010,6 +1010,7 @@ NODE_DATA(h->hugetlb_next_nid), huge_page_size(h), huge_page_size(h), 0); + hstate_next_node(h); if (addr) { /* * Use the beginning of the huge page to store the @@ -1019,7 +1020,6 @@ m = addr; goto found; } - hstate_next_node(h); nr_nodes--; } return 0; --- linux-fsl-imx51-2.6.31.orig/mm/mlock.c +++ linux-fsl-imx51-2.6.31/mm/mlock.c @@ -139,49 +139,42 @@ } /** - * __mlock_vma_pages_range() - mlock/munlock a range of pages in the vma. + * __mlock_vma_pages_range() - mlock a range of pages in the vma. * @vma: target vma * @start: start address * @end: end address - * @mlock: 0 indicate munlock, otherwise mlock. * - * If @mlock == 0, unlock an mlocked range; - * else mlock the range of pages. This takes care of making the pages present , - * too. + * This takes care of making the pages present too. * * return 0 on success, negative error code on error. * * vma->vm_mm->mmap_sem must be held for at least read. */ static long __mlock_vma_pages_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end, - int mlock) + unsigned long start, unsigned long end) { struct mm_struct *mm = vma->vm_mm; unsigned long addr = start; struct page *pages[16]; /* 16 gives a reasonable batch */ int nr_pages = (end - start) / PAGE_SIZE; int ret = 0; - int gup_flags = 0; + int gup_flags; VM_BUG_ON(start & ~PAGE_MASK); VM_BUG_ON(end & ~PAGE_MASK); VM_BUG_ON(start < vma->vm_start); VM_BUG_ON(end > vma->vm_end); - VM_BUG_ON((!rwsem_is_locked(&mm->mmap_sem)) && - (atomic_read(&mm->mm_users) != 0)); - - /* - * mlock: don't page populate if vma has PROT_NONE permission. - * munlock: always do munlock although the vma has PROT_NONE - * permission, or SIGKILL is pending. - */ - if (!mlock) - gup_flags |= GUP_FLAGS_IGNORE_VMA_PERMISSIONS | - GUP_FLAGS_IGNORE_SIGKILL; + VM_BUG_ON(!rwsem_is_locked(&mm->mmap_sem)); + gup_flags = 0; if (vma->vm_flags & VM_WRITE) - gup_flags |= GUP_FLAGS_WRITE; + gup_flags = GUP_FLAGS_WRITE; + + /* We don't try to access the guard page of a stack vma */ + if (stack_guard_page(vma, start)) { + addr += PAGE_SIZE; + nr_pages--; + } while (nr_pages > 0) { int i; @@ -201,19 +194,10 @@ * This can happen for, e.g., VM_NONLINEAR regions before * a page has been allocated and mapped at a given offset, * or for addresses that map beyond end of a file. - * We'll mlock the the pages if/when they get faulted in. + * We'll mlock the pages if/when they get faulted in. */ if (ret < 0) break; - if (ret == 0) { - /* - * We know the vma is there, so the only time - * we cannot get a single page should be an - * error (ret < 0) case. - */ - WARN_ON(1); - break; - } lru_add_drain(); /* push cached pages to LRU */ @@ -224,28 +208,22 @@ /* * Because we lock page here and migration is blocked * by the elevated reference, we need only check for - * page truncation (file-cache only). + * file-cache page truncation. This page->mapping + * check also neatly skips over the ZERO_PAGE(), + * though if that's common we'd prefer not to lock it. */ - if (page->mapping) { - if (mlock) - mlock_vma_page(page); - else - munlock_vma_page(page); - } + if (page->mapping) + mlock_vma_page(page); unlock_page(page); - put_page(page); /* ref from get_user_pages() */ - - /* - * here we assume that get_user_pages() has given us - * a list of virtually contiguous pages. - */ - addr += PAGE_SIZE; /* for next get_user_pages() */ - nr_pages--; + put_page(page); /* ref from get_user_pages() */ } + + addr += ret * PAGE_SIZE; + nr_pages -= ret; ret = 0; } - return ret; /* count entire vma as locked_vm */ + return ret; /* 0 or negative error code */ } /* @@ -289,7 +267,7 @@ is_vm_hugetlb_page(vma) || vma == get_gate_vma(current))) { - __mlock_vma_pages_range(vma, start, end, 1); + __mlock_vma_pages_range(vma, start, end); /* Hide errors from mmap() and other callers */ return 0; @@ -310,7 +288,6 @@ return nr_pages; /* error or pages NOT mlocked */ } - /* * munlock_vma_pages_range() - munlock all pages in the vma range.' * @vma - vma containing range to be munlock()ed. @@ -330,10 +307,24 @@ * free them. This will result in freeing mlocked pages. */ void munlock_vma_pages_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) + unsigned long start, unsigned long end) { + unsigned long addr; + + lru_add_drain(); vma->vm_flags &= ~VM_LOCKED; - __mlock_vma_pages_range(vma, start, end, 0); + + for (addr = start; addr < end; addr += PAGE_SIZE) { + struct page *page = follow_page(vma, addr, FOLL_GET); + if (page) { + lock_page(page); + if (page->mapping) + munlock_vma_page(page); + unlock_page(page); + put_page(page); + } + cond_resched(); + } } /* @@ -400,18 +391,14 @@ * It's okay if try_to_unmap_one unmaps a page just after we * set VM_LOCKED, __mlock_vma_pages_range will bring it back. */ - vma->vm_flags = newflags; if (lock) { - ret = __mlock_vma_pages_range(vma, start, end, 1); - - if (ret > 0) { - mm->locked_vm -= ret; - ret = 0; - } else - ret = __mlock_posix_error_return(ret); /* translate if needed */ + vma->vm_flags = newflags; + ret = __mlock_vma_pages_range(vma, start, end); + if (ret < 0) + ret = __mlock_posix_error_return(ret); } else { - __mlock_vma_pages_range(vma, start, end, 0); + munlock_vma_pages_range(vma, start, end); } out: --- linux-fsl-imx51-2.6.31.orig/mm/memory.c +++ linux-fsl-imx51-2.6.31/mm/memory.c @@ -2612,6 +2612,31 @@ } /* + * This is like a special single-page "expand_downwards()", + * except we must first make sure that 'address-PAGE_SIZE' + * doesn't hit another vma. + * + * The "find_vma()" will do the right thing even if we wrap + */ +static inline int check_stack_guard_page(struct vm_area_struct *vma, unsigned long address) +{ + address &= PAGE_MASK; + if ((vma->vm_flags & VM_GROWSDOWN) && address == vma->vm_start) { + struct vm_area_struct *prev; + + address -= PAGE_SIZE; + prev = find_vma(vma->vm_mm, address); + + if (prev == vma) + expand_stack(vma, address); + else if (!(prev->vm_flags & VM_GROWSDOWN) || + prev->vm_end != vma->vm_start) + return -ENOMEM; + } + return 0; +} + +/* * We enter with non-exclusive mmap_sem (to exclude vma changes, * but allow concurrent faults), and pte mapped but not yet locked. * We return with mmap_sem still held, but pte unmapped and unlocked. @@ -2624,9 +2649,13 @@ spinlock_t *ptl; pte_t entry; - /* Allocate our own private page. */ pte_unmap(page_table); + /* Check if we need to add a guard page to the stack */ + if (check_stack_guard_page(vma, address) < 0) + return VM_FAULT_SIGBUS; + + /* Allocate our own private page. */ if (unlikely(anon_vma_prepare(vma))) goto oom; page = alloc_zeroed_user_highpage_movable(vma, address); @@ -2638,7 +2667,8 @@ goto oom_free_page; entry = mk_pte(page, vma->vm_page_prot); - entry = maybe_mkwrite(pte_mkdirty(entry), vma); + if (vma->vm_flags & VM_WRITE) + entry = pte_mkwrite(pte_mkdirty(entry)); page_table = pte_offset_map_lock(mm, pmd, address, &ptl); if (!pte_none(*page_table)) --- linux-fsl-imx51-2.6.31.orig/mm/page_alloc.c +++ linux-fsl-imx51-2.6.31/mm/page_alloc.c @@ -1715,7 +1715,7 @@ * See also cpuset_zone_allowed() comment in kernel/cpuset.c. */ alloc_flags &= ~ALLOC_CPUSET; - } else if (unlikely(rt_task(p))) + } else if (unlikely(rt_task(p)) && !in_interrupt()) alloc_flags |= ALLOC_HARDER; if (likely(!(gfp_mask & __GFP_NOMEMALLOC))) { @@ -1763,6 +1763,7 @@ if (NUMA_BUILD && (gfp_mask & GFP_THISNODE) == GFP_THISNODE) goto nopage; +restart: wake_all_kswapd(order, zonelist, high_zoneidx); /* @@ -1772,7 +1773,6 @@ */ alloc_flags = gfp_to_alloc_flags(gfp_mask); -restart: /* This is the last chance, in general, before the goto nopage. */ page = get_page_from_freelist(gfp_mask, nodemask, order, zonelist, high_zoneidx, alloc_flags & ~ALLOC_NO_WATERMARKS, @@ -2783,7 +2783,8 @@ { unsigned long start_pfn, pfn, end_pfn; struct page *page; - unsigned long reserve, block_migratetype; + unsigned long block_migratetype; + int reserve; /* Get the start pfn, end pfn and the number of blocks to reserve */ start_pfn = zone->zone_start_pfn; @@ -2791,6 +2792,15 @@ reserve = roundup(min_wmark_pages(zone), pageblock_nr_pages) >> pageblock_order; + /* + * Reserve blocks are generally in place to help high-order atomic + * allocations that are short-lived. A min_free_kbytes value that + * would result in more than 2 reserve blocks for atomic allocations + * is assumed to be in place to help anti-fragmentation for the + * future allocation of hugepages at runtime. + */ + reserve = min(2, reserve); + for (pfn = start_pfn; pfn < end_pfn; pfn += pageblock_nr_pages) { if (!pfn_valid(pfn)) continue; --- linux-fsl-imx51-2.6.31.orig/mm/util.c +++ linux-fsl-imx51-2.6.31/mm/util.c @@ -4,6 +4,10 @@ #include #include #include +#include +#include +#include +#include #include #define CREATE_TRACE_POINTS @@ -268,6 +272,31 @@ } EXPORT_SYMBOL_GPL(get_user_pages_fast); +SYSCALL_DEFINE6(mmap_pgoff, unsigned long, addr, unsigned long, len, + unsigned long, prot, unsigned long, flags, + unsigned long, fd, unsigned long, pgoff) +{ + struct file * file = NULL; + unsigned long retval = -EBADF; + + if (!(flags & MAP_ANONYMOUS)) { + file = fget(fd); + if (!file) + goto out; + } + + flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); + + down_write(¤t->mm->mmap_sem); + retval = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); + up_write(¤t->mm->mmap_sem); + + if (file) + fput(file); +out: + return retval; +} + /* Tracepoints definitions. */ EXPORT_TRACEPOINT_SYMBOL(kmalloc); EXPORT_TRACEPOINT_SYMBOL(kmem_cache_alloc); --- linux-fsl-imx51-2.6.31.orig/mm/swap_state.c +++ linux-fsl-imx51-2.6.31/mm/swap_state.c @@ -66,10 +66,10 @@ } /* - * add_to_swap_cache resembles add_to_page_cache_locked on swapper_space, + * __add_to_swap_cache resembles add_to_page_cache_locked on swapper_space, * but sets SwapCache flag and private instead of mapping and index. */ -int add_to_swap_cache(struct page *page, swp_entry_t entry, gfp_t gfp_mask) +static int __add_to_swap_cache(struct page *page, swp_entry_t entry) { int error; @@ -77,28 +77,37 @@ VM_BUG_ON(PageSwapCache(page)); VM_BUG_ON(!PageSwapBacked(page)); + page_cache_get(page); + SetPageSwapCache(page); + set_page_private(page, entry.val); + + spin_lock_irq(&swapper_space.tree_lock); + error = radix_tree_insert(&swapper_space.page_tree, entry.val, page); + if (likely(!error)) { + total_swapcache_pages++; + __inc_zone_page_state(page, NR_FILE_PAGES); + INC_CACHE_INFO(add_total); + } + spin_unlock_irq(&swapper_space.tree_lock); + + if (unlikely(error)) { + set_page_private(page, 0UL); + ClearPageSwapCache(page); + page_cache_release(page); + } + + return error; +} + + +int add_to_swap_cache(struct page *page, swp_entry_t entry, gfp_t gfp_mask) +{ + int error; + error = radix_tree_preload(gfp_mask); if (!error) { - page_cache_get(page); - SetPageSwapCache(page); - set_page_private(page, entry.val); - - spin_lock_irq(&swapper_space.tree_lock); - error = radix_tree_insert(&swapper_space.page_tree, - entry.val, page); - if (likely(!error)) { - total_swapcache_pages++; - __inc_zone_page_state(page, NR_FILE_PAGES); - INC_CACHE_INFO(add_total); - } - spin_unlock_irq(&swapper_space.tree_lock); + error = __add_to_swap_cache(page, entry); radix_tree_preload_end(); - - if (unlikely(error)) { - set_page_private(page, 0UL); - ClearPageSwapCache(page); - page_cache_release(page); - } } return error; } @@ -289,13 +298,24 @@ } /* + * call radix_tree_preload() while we can wait. + */ + err = radix_tree_preload(gfp_mask & GFP_KERNEL); + if (err) + break; + + /* * Swap entry may have been freed since our caller observed it. */ err = swapcache_prepare(entry); - if (err == -EEXIST) /* seems racy */ + if (err == -EEXIST) { /* seems racy */ + radix_tree_preload_end(); continue; - if (err) /* swp entry is obsolete ? */ + } + if (err) { /* swp entry is obsolete ? */ + radix_tree_preload_end(); break; + } /* * Associate the page with swap entry in the swap cache. @@ -307,8 +327,9 @@ */ __set_page_locked(new_page); SetPageSwapBacked(new_page); - err = add_to_swap_cache(new_page, entry, gfp_mask & GFP_KERNEL); + err = __add_to_swap_cache(new_page, entry); if (likely(!err)) { + radix_tree_preload_end(); /* * Initiate read into locked page and return. */ @@ -316,6 +337,7 @@ swap_readpage(new_page); return new_page; } + radix_tree_preload_end(); ClearPageSwapBacked(new_page); __clear_page_locked(new_page); swapcache_free(entry, NULL); --- linux-fsl-imx51-2.6.31.orig/mm/mmap.c +++ linux-fsl-imx51-2.6.31/mm/mmap.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -45,6 +46,18 @@ #define arch_rebalance_pgtables(addr, len) (addr) #endif +/* No sane architecture will #define these to anything else */ +#ifndef arch_add_exec_range +#define arch_add_exec_range(mm, limit) do { ; } while (0) +#endif +#ifndef arch_flush_exec_range +#define arch_flush_exec_range(mm) do { ; } while (0) +#endif +#ifndef arch_remove_exec_range +#define arch_remove_exec_range(mm, limit) do { ; } while (0) +#endif + + static void unmap_region(struct mm_struct *mm, struct vm_area_struct *vma, struct vm_area_struct *prev, unsigned long start, unsigned long end); @@ -389,6 +402,8 @@ __vma_link_list(struct mm_struct *mm, struct vm_area_struct *vma, struct vm_area_struct *prev, struct rb_node *rb_parent) { + if (vma->vm_flags & VM_EXEC) + arch_add_exec_range(mm, vma->vm_end); if (prev) { vma->vm_next = prev->vm_next; prev->vm_next = vma; @@ -491,6 +506,8 @@ rb_erase(&vma->vm_rb, &mm->mm_rb); if (mm->mmap_cache == vma) mm->mmap_cache = prev; + if (vma->vm_flags & VM_EXEC) + arch_remove_exec_range(mm, vma->vm_end); } /* @@ -570,9 +587,9 @@ /* * When changing only vma->vm_end, we don't really need - * anon_vma lock: but is that case worth optimizing out? + * anon_vma lock. */ - if (vma->anon_vma) + if (vma->anon_vma && (insert || importer || start != vma->vm_start)) anon_vma = vma->anon_vma; if (anon_vma) { spin_lock(&anon_vma->lock); @@ -800,6 +817,8 @@ } else /* cases 2, 5, 7 */ vma_adjust(prev, prev->vm_start, end, prev->vm_pgoff, NULL); + if (prev->vm_flags & VM_EXEC) + arch_add_exec_range(mm, prev->vm_end); return prev; } @@ -934,13 +953,9 @@ if (!(flags & MAP_FIXED)) addr = round_hint_to_min(addr); - error = arch_mmap_check(addr, len, flags); - if (error) - return error; - /* Careful about overflows.. */ len = PAGE_ALIGN(len); - if (!len || len > TASK_SIZE) + if (!len) return -ENOMEM; /* offset overflow? */ @@ -954,7 +969,8 @@ /* Obtain the address to map to. we verify (or select) it and ensure * that it represents a valid section of the address space. */ - addr = get_unmapped_area(file, addr, len, pgoff, flags); + addr = get_unmapped_area_prot(file, addr, len, pgoff, flags, + prot & PROT_EXEC); if (addr & ~PAGE_MASK) return addr; @@ -1272,7 +1288,12 @@ struct mm_struct *mm = current->mm; struct vm_area_struct *vma; unsigned long start_addr; + unsigned long error = arch_mmap_check(addr, len, flags); + if (error) + return error; + + /* Careful about overflows.. */ if (len > TASK_SIZE) return -ENOMEM; @@ -1439,13 +1460,17 @@ } unsigned long -get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, - unsigned long pgoff, unsigned long flags) +get_unmapped_area_prot(struct file *file, unsigned long addr, unsigned long len, + unsigned long pgoff, unsigned long flags, int exec) { unsigned long (*get_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); - get_area = current->mm->get_unmapped_area; + if (exec && current->mm->get_unmapped_exec_area) + get_area = current->mm->get_unmapped_exec_area; + else + get_area = current->mm->get_unmapped_area; + if (file && file->f_op && file->f_op->get_unmapped_area) get_area = file->f_op->get_unmapped_area; addr = get_area(file, addr, len, pgoff, flags); @@ -1459,8 +1484,81 @@ return arch_rebalance_pgtables(addr, len); } +EXPORT_SYMBOL(get_unmapped_area_prot); + +#define SHLIB_BASE 0x00110000 + +unsigned long +arch_get_unmapped_exec_area(struct file *filp, unsigned long addr0, + unsigned long len0, unsigned long pgoff, unsigned long flags) +{ + unsigned long addr = addr0, len = len0; + struct mm_struct *mm = current->mm; + struct vm_area_struct *vma; + unsigned long tmp; + + if (len > TASK_SIZE) + return -ENOMEM; + + if (flags & MAP_FIXED) + return addr; + + if (!addr) { + addr = SHLIB_BASE; + if ((current->flags & PF_RANDOMIZE) && randomize_va_space) + addr = randomize_range(addr, 0x01000000, len); + } + + if (addr) { + addr = PAGE_ALIGN(addr); + vma = find_vma(mm, addr); + if (TASK_SIZE - len >= addr && + (!vma || addr + len <= vma->vm_start)) + return addr; + } + + addr = SHLIB_BASE; + for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { + /* At this point: (!vma || addr < vma->vm_end). */ + if (TASK_SIZE - len < addr) + return -ENOMEM; + + if (!vma || addr + len <= vma->vm_start) { + /* + * Must not let a PROT_EXEC mapping get into the + * brk area: + */ + if (addr + len > mm->brk) + goto failed; + + /* + * Up until the brk area we randomize addresses + * as much as possible: + */ + if ((current->flags & PF_RANDOMIZE) && + randomize_va_space && + addr >= 0x01000000) { + tmp = randomize_range(0x01000000, + PAGE_ALIGN(max(mm->start_brk, + (unsigned long)0x08000000)), len); + vma = find_vma(mm, tmp); + if (TASK_SIZE - len >= tmp && + (!vma || tmp + len <= vma->vm_start)) + return tmp; + } + /* + * Ok, randomization didnt work out - return + * the result of the linear search: + */ + return addr; + } + addr = vma->vm_end; + } + +failed: + return current->mm->get_unmapped_area(filp, addr0, len0, pgoff, flags); +} -EXPORT_SYMBOL(get_unmapped_area); /* Look up the first VMA which satisfies addr < vm_end, NULL if none. */ struct vm_area_struct *find_vma(struct mm_struct *mm, unsigned long addr) @@ -1535,6 +1633,14 @@ return prev ? prev->vm_next : vma; } +static int over_stack_limit(unsigned long sz) +{ + if (sz < EXEC_STACK_BIAS) + return 0; + return (sz - EXEC_STACK_BIAS) > + current->signal->rlim[RLIMIT_STACK].rlim_cur; +} + /* * Verify that the stack growth is acceptable and * update accounting. This is shared with both the @@ -1551,7 +1657,7 @@ return -ENOMEM; /* Stack limit test */ - if (size > rlim[RLIMIT_STACK].rlim_cur) + if (over_stack_limit(size)) return -ENOMEM; /* mlock limit tests */ @@ -1629,9 +1735,12 @@ size = address - vma->vm_start; grow = (address - vma->vm_end) >> PAGE_SHIFT; - error = acct_stack_growth(vma, size, grow); - if (!error) - vma->vm_end = address; + error = -ENOMEM; + if (vma->vm_pgoff + (size >> PAGE_SHIFT) >= vma->vm_pgoff) { + error = acct_stack_growth(vma, size, grow); + if (!error) + vma->vm_end = address; + } } anon_vma_unlock(vma); return error; @@ -1673,10 +1782,13 @@ size = vma->vm_end - address; grow = (vma->vm_start - address) >> PAGE_SHIFT; - error = acct_stack_growth(vma, size, grow); - if (!error) { - vma->vm_start = address; - vma->vm_pgoff -= grow; + error = -ENOMEM; + if (grow <= vma->vm_pgoff) { + error = acct_stack_growth(vma, size, grow); + if (!error) { + vma->vm_start = address; + vma->vm_pgoff -= grow; + } } } anon_vma_unlock(vma); @@ -1861,10 +1973,14 @@ if (new->vm_ops && new->vm_ops->open) new->vm_ops->open(new); - if (new_below) + if (new_below) { + unsigned long old_end = vma->vm_end; + vma_adjust(vma, addr, vma->vm_end, vma->vm_pgoff + ((addr - new->vm_start) >> PAGE_SHIFT), new); - else + if (vma->vm_flags & VM_EXEC) + arch_remove_exec_range(mm, old_end); + } else vma_adjust(vma, vma->vm_start, addr, vma->vm_pgoff, new); return 0; @@ -1989,20 +2105,14 @@ if (!len) return addr; - if ((addr + len) > TASK_SIZE || (addr + len) < addr) - return -EINVAL; - - if (is_hugepage_only_range(mm, addr, len)) - return -EINVAL; - error = security_file_mmap(NULL, 0, 0, 0, addr, 1); if (error) return error; flags = VM_DATA_DEFAULT_FLAGS | VM_ACCOUNT | mm->def_flags; - error = arch_mmap_check(addr, len, flags); - if (error) + error = get_unmapped_area(NULL, addr, len, 0, MAP_FIXED); + if (error & ~PAGE_MASK) return error; /* @@ -2113,6 +2223,7 @@ vm_unacct_memory(nr_accounted); free_pgtables(tlb, vma, FIRST_USER_ADDRESS, 0); tlb_finish_mmu(tlb, 0, end); + arch_flush_exec_range(mm); /* * Walk the list again, actually closing and freeing it, @@ -2285,6 +2396,7 @@ unsigned long addr, unsigned long len, unsigned long vm_flags, struct page **pages) { + int ret; struct vm_area_struct *vma; vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL); @@ -2301,16 +2413,23 @@ vma->vm_ops = &special_mapping_vmops; vma->vm_private_data = pages; - if (unlikely(insert_vm_struct(mm, vma))) { - kmem_cache_free(vm_area_cachep, vma); - return -ENOMEM; - } + ret = security_file_mmap(NULL, 0, 0, 0, vma->vm_start, 1); + if (ret) + goto out; + + ret = insert_vm_struct(mm, vma); + if (ret) + goto out; mm->total_vm += len >> PAGE_SHIFT; perf_counter_mmap(vma); return 0; + +out: + kmem_cache_free(vm_area_cachep, vma); + return ret; } static DEFINE_MUTEX(mm_all_locks_mutex); --- linux-fsl-imx51-2.6.31.orig/mm/mremap.c +++ linux-fsl-imx51-2.6.31/mm/mremap.c @@ -247,6 +247,144 @@ return new_addr; } +static struct vm_area_struct *vma_to_resize(unsigned long addr, + unsigned long old_len, unsigned long new_len, unsigned long *p) +{ + struct mm_struct *mm = current->mm; + struct vm_area_struct *vma = find_vma(mm, addr); + + if (!vma || vma->vm_start > addr) + goto Efault; + + if (is_vm_hugetlb_page(vma)) + goto Einval; + + /* We can't remap across vm area boundaries */ + if (old_len > vma->vm_end - addr) + goto Efault; + + /* Need to be careful about a growing mapping */ + if (new_len > old_len) { + unsigned long pgoff; + + if (vma->vm_flags & (VM_DONTEXPAND | VM_PFNMAP)) + goto Efault; + pgoff = (addr - vma->vm_start) >> PAGE_SHIFT; + pgoff += vma->vm_pgoff; + if (pgoff + (new_len >> PAGE_SHIFT) < pgoff) + goto Einval; + } + + if (vma->vm_flags & VM_LOCKED) { + unsigned long locked, lock_limit; + locked = mm->locked_vm << PAGE_SHIFT; + lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; + locked += new_len - old_len; + if (locked > lock_limit && !capable(CAP_IPC_LOCK)) + goto Eagain; + } + + if (!may_expand_vm(mm, (new_len - old_len) >> PAGE_SHIFT)) + goto Enomem; + + if (vma->vm_flags & VM_ACCOUNT) { + unsigned long charged = (new_len - old_len) >> PAGE_SHIFT; + if (security_vm_enough_memory(charged)) + goto Efault; + *p = charged; + } + + return vma; + +Efault: /* very odd choice for most of the cases, but... */ + return ERR_PTR(-EFAULT); +Einval: + return ERR_PTR(-EINVAL); +Enomem: + return ERR_PTR(-ENOMEM); +Eagain: + return ERR_PTR(-EAGAIN); +} + +static unsigned long mremap_to(unsigned long addr, + unsigned long old_len, unsigned long new_addr, + unsigned long new_len) +{ + struct mm_struct *mm = current->mm; + struct vm_area_struct *vma; + unsigned long ret = -EINVAL; + unsigned long charged = 0; + unsigned long map_flags; + + if (new_addr & ~PAGE_MASK) + goto out; + + if (new_len > TASK_SIZE || new_addr > TASK_SIZE - new_len) + goto out; + + /* Check if the location we're moving into overlaps the + * old location at all, and fail if it does. + */ + if ((new_addr <= addr) && (new_addr+new_len) > addr) + goto out; + + if ((addr <= new_addr) && (addr+old_len) > new_addr) + goto out; + + ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1); + if (ret) + goto out; + + ret = do_munmap(mm, new_addr, new_len); + if (ret) + goto out; + + if (old_len >= new_len) { + ret = do_munmap(mm, addr+new_len, old_len - new_len); + if (ret && old_len != new_len) + goto out; + old_len = new_len; + } + + vma = vma_to_resize(addr, old_len, new_len, &charged); + if (IS_ERR(vma)) { + ret = PTR_ERR(vma); + goto out; + } + + map_flags = MAP_FIXED; + if (vma->vm_flags & VM_MAYSHARE) + map_flags |= MAP_SHARED; + + ret = get_unmapped_area(vma->vm_file, new_addr, new_len, vma->vm_pgoff + + ((addr - vma->vm_start) >> PAGE_SHIFT), + map_flags); + if (ret & ~PAGE_MASK) + goto out1; + + ret = move_vma(vma, addr, old_len, new_len, new_addr); + if (!(ret & ~PAGE_MASK)) + goto out; +out1: + vm_unacct_memory(charged); + +out: + return ret; +} + +static int vma_expandable(struct vm_area_struct *vma, unsigned long delta) +{ + unsigned long end = vma->vm_end + delta; + if (end < vma->vm_end) /* overflow */ + return 0; + if (vma->vm_next && vma->vm_next->vm_start < end) /* intersection */ + return 0; + if (get_unmapped_area(NULL, vma->vm_start, end - vma->vm_start, + 0, MAP_FIXED) & ~PAGE_MASK) + return 0; + return 1; +} + /* * Expand (or shrink) an existing mapping, potentially moving it at the * same time (controlled by the MREMAP_MAYMOVE flag and available VM space) @@ -280,32 +418,10 @@ if (!new_len) goto out; - /* new_addr is only valid if MREMAP_FIXED is specified */ if (flags & MREMAP_FIXED) { - if (new_addr & ~PAGE_MASK) - goto out; - if (!(flags & MREMAP_MAYMOVE)) - goto out; - - if (new_len > TASK_SIZE || new_addr > TASK_SIZE - new_len) - goto out; - - /* Check if the location we're moving into overlaps the - * old location at all, and fail if it does. - */ - if ((new_addr <= addr) && (new_addr+new_len) > addr) - goto out; - - if ((addr <= new_addr) && (addr+old_len) > new_addr) - goto out; - - ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1); - if (ret) - goto out; - - ret = do_munmap(mm, new_addr, new_len); - if (ret) - goto out; + if (flags & MREMAP_MAYMOVE) + ret = mremap_to(addr, old_len, new_addr, new_len); + goto out; } /* @@ -318,60 +434,23 @@ if (ret && old_len != new_len) goto out; ret = addr; - if (!(flags & MREMAP_FIXED) || (new_addr == addr)) - goto out; - old_len = new_len; + goto out; } /* - * Ok, we need to grow.. or relocate. + * Ok, we need to grow.. */ - ret = -EFAULT; - vma = find_vma(mm, addr); - if (!vma || vma->vm_start > addr) - goto out; - if (is_vm_hugetlb_page(vma)) { - ret = -EINVAL; - goto out; - } - /* We can't remap across vm area boundaries */ - if (old_len > vma->vm_end - addr) - goto out; - if (vma->vm_flags & (VM_DONTEXPAND | VM_PFNMAP)) { - if (new_len > old_len) - goto out; - } - if (vma->vm_flags & VM_LOCKED) { - unsigned long locked, lock_limit; - locked = mm->locked_vm << PAGE_SHIFT; - lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; - locked += new_len - old_len; - ret = -EAGAIN; - if (locked > lock_limit && !capable(CAP_IPC_LOCK)) - goto out; - } - if (!may_expand_vm(mm, (new_len - old_len) >> PAGE_SHIFT)) { - ret = -ENOMEM; + vma = vma_to_resize(addr, old_len, new_len, &charged); + if (IS_ERR(vma)) { + ret = PTR_ERR(vma); goto out; } - if (vma->vm_flags & VM_ACCOUNT) { - charged = (new_len - old_len) >> PAGE_SHIFT; - if (security_vm_enough_memory(charged)) - goto out_nc; - } - /* old_len exactly to the end of the area.. - * And we're not relocating the area. */ - if (old_len == vma->vm_end - addr && - !((flags & MREMAP_FIXED) && (addr != new_addr)) && - (old_len != new_len || !(flags & MREMAP_MAYMOVE))) { - unsigned long max_addr = TASK_SIZE; - if (vma->vm_next) - max_addr = vma->vm_next->vm_start; + if (old_len == vma->vm_end - addr) { /* can we just expand the current mapping? */ - if (max_addr - addr >= new_len) { + if (vma_expandable(vma, new_len - old_len)) { int pages = (new_len - old_len) >> PAGE_SHIFT; vma_adjust(vma, vma->vm_start, @@ -395,28 +474,27 @@ */ ret = -ENOMEM; if (flags & MREMAP_MAYMOVE) { - if (!(flags & MREMAP_FIXED)) { - unsigned long map_flags = 0; - if (vma->vm_flags & VM_MAYSHARE) - map_flags |= MAP_SHARED; - - new_addr = get_unmapped_area(vma->vm_file, 0, new_len, - vma->vm_pgoff, map_flags); - if (new_addr & ~PAGE_MASK) { - ret = new_addr; - goto out; - } - - ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1); - if (ret) - goto out; + unsigned long map_flags = 0; + if (vma->vm_flags & VM_MAYSHARE) + map_flags |= MAP_SHARED; + + new_addr = get_unmapped_area(vma->vm_file, 0, new_len, + vma->vm_pgoff + + ((addr - vma->vm_start) >> PAGE_SHIFT), + map_flags); + if (new_addr & ~PAGE_MASK) { + ret = new_addr; + goto out; } + + ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1); + if (ret) + goto out; ret = move_vma(vma, addr, old_len, new_len, new_addr); } out: if (ret & ~PAGE_MASK) vm_unacct_memory(charged); -out_nc: return ret; } --- linux-fsl-imx51-2.6.31.orig/mm/vmscan.c +++ linux-fsl-imx51-2.6.31/mm/vmscan.c @@ -1298,7 +1298,7 @@ * IO, plus JVM can create lots of anon VM_EXEC pages, * so we ignore them here. */ - if ((vm_flags & VM_EXEC) && !PageAnon(page)) { + if ((vm_flags & VM_EXEC) && page_is_file_cache(page)) { list_add(&page->lru, &l_active); continue; } --- linux-fsl-imx51-2.6.31.orig/kernel/module.c +++ linux-fsl-imx51-2.6.31/kernel/module.c @@ -1138,6 +1138,12 @@ * J. Corbet */ #if defined(CONFIG_KALLSYMS) && defined(CONFIG_SYSFS) + +static inline bool sect_empty(const Elf_Shdr *sect) +{ + return !(sect->sh_flags & SHF_ALLOC) || sect->sh_size == 0; +} + struct module_sect_attr { struct module_attribute mattr; @@ -1179,7 +1185,7 @@ /* Count loaded sections and allocate structures */ for (i = 0; i < nsect; i++) - if (sechdrs[i].sh_flags & SHF_ALLOC) + if (!sect_empty(&sechdrs[i])) nloaded++; size[0] = ALIGN(sizeof(*sect_attrs) + nloaded * sizeof(sect_attrs->attrs[0]), @@ -1197,7 +1203,7 @@ sattr = §_attrs->attrs[0]; gattr = §_attrs->grp.attrs[0]; for (i = 0; i < nsect; i++) { - if (! (sechdrs[i].sh_flags & SHF_ALLOC)) + if (sect_empty(&sechdrs[i])) continue; sattr->address = sechdrs[i].sh_addr; sattr->name = kstrdup(secstrings + sechdrs[i].sh_name, @@ -1281,7 +1287,7 @@ /* Count notes sections and allocate structures. */ notes = 0; for (i = 0; i < nsect; i++) - if ((sechdrs[i].sh_flags & SHF_ALLOC) && + if (!sect_empty(&sechdrs[i]) && (sechdrs[i].sh_type == SHT_NOTE)) ++notes; @@ -1297,7 +1303,7 @@ notes_attrs->notes = notes; nattr = ¬es_attrs->attrs[0]; for (loaded = i = 0; i < nsect; ++i) { - if (!(sechdrs[i].sh_flags & SHF_ALLOC)) + if (sect_empty(&sechdrs[i])) continue; if (sechdrs[i].sh_type == SHT_NOTE) { nattr->attr.name = mod->sect_attrs->attrs[loaded].name; --- linux-fsl-imx51-2.6.31.orig/kernel/signal.c +++ linux-fsl-imx51-2.6.31/kernel/signal.c @@ -939,7 +939,8 @@ for (i = 0; i < 16; i++) { unsigned char insn; - __get_user(insn, (unsigned char *)(regs->ip + i)); + if (get_user(insn, (unsigned char *)(regs->ip + i))) + break; printk("%02x ", insn); } } @@ -2368,9 +2369,13 @@ return -EFAULT; /* Not even root can pretend to send signals from the kernel. - Nor can they impersonate a kill(), which adds source info. */ - if (info.si_code >= 0) + * Nor can they impersonate a kill()/tgkill(), which adds source info. + */ + if (info.si_code >= 0 || info.si_code == SI_TKILL) { + /* We used to allow any < 0 si_code */ + WARN_ON_ONCE(info.si_code < 0); return -EPERM; + } info.si_signo = sig; /* POSIX.1b doesn't mention process groups. */ @@ -2384,9 +2389,13 @@ return -EINVAL; /* Not even root can pretend to send signals from the kernel. - Nor can they impersonate a kill(), which adds source info. */ - if (info->si_code >= 0) + * Nor can they impersonate a kill()/tgkill(), which adds source info. + */ + if (info->si_code >= 0 || info->si_code == SI_TKILL) { + /* We used to allow any < 0 si_code */ + WARN_ON_ONCE(info->si_code < 0); return -EPERM; + } info->si_signo = sig; return do_send_specific(tgid, pid, sig, info); --- linux-fsl-imx51-2.6.31.orig/kernel/audit_tree.c +++ linux-fsl-imx51-2.6.31/kernel/audit_tree.c @@ -277,7 +277,7 @@ owner->root = NULL; } - for (i = j = 0; i < size; i++, j++) { + for (i = j = 0; j <= size; i++, j++) { struct audit_tree *s; if (&chunk->owners[j] == p) { list_del_init(&p->list); @@ -290,7 +290,7 @@ if (!s) /* result of earlier fallback */ continue; get_tree(s); - list_replace_init(&chunk->owners[i].list, &new->owners[j].list); + list_replace_init(&chunk->owners[j].list, &new->owners[i].list); } list_replace_rcu(&chunk->hash, &new->hash); @@ -373,15 +373,17 @@ for (n = 0; n < old->count; n++) { if (old->owners[n].owner == tree) { spin_unlock(&hash_lock); - put_inotify_watch(watch); + put_inotify_watch(&old->watch); return 0; } } spin_unlock(&hash_lock); chunk = alloc_chunk(old->count + 1); - if (!chunk) + if (!chunk) { + put_inotify_watch(&old->watch); return -ENOMEM; + } mutex_lock(&inode->inotify_mutex); if (inotify_clone_watch(&old->watch, &chunk->watch) < 0) { @@ -425,7 +427,8 @@ spin_unlock(&hash_lock); inotify_evict_watch(&old->watch); mutex_unlock(&inode->inotify_mutex); - put_inotify_watch(&old->watch); + put_inotify_watch(&old->watch); /* pair to inotify_find_watch */ + put_inotify_watch(&old->watch); /* and kill it */ return 0; } --- linux-fsl-imx51-2.6.31.orig/kernel/sched_features.h +++ linux-fsl-imx51-2.6.31/kernel/sched_features.h @@ -1,4 +1,4 @@ -SCHED_FEAT(NEW_FAIR_SLEEPERS, 1) +SCHED_FEAT(NEW_FAIR_SLEEPERS, 0) SCHED_FEAT(NORMALIZED_SLEEPER, 0) SCHED_FEAT(ADAPTIVE_GRAN, 1) SCHED_FEAT(WAKEUP_PREEMPT, 1) --- linux-fsl-imx51-2.6.31.orig/kernel/acct.c +++ linux-fsl-imx51-2.6.31/kernel/acct.c @@ -491,13 +491,17 @@ u64 run_time; struct timespec uptime; struct tty_struct *tty; + const struct cred *orig_cred; + + /* Perform file operations on behalf of whoever enabled accounting */ + orig_cred = override_creds(file->f_cred); /* * First check to see if there is enough free_space to continue * the process accounting system. */ if (!check_free_space(acct, file)) - return; + goto out; /* * Fill the accounting struct with the needed info as recorded @@ -532,7 +536,8 @@ do_div(elapsed, AHZ); ac.ac_btime = get_seconds() - elapsed; /* we really need to bite the bullet and change layout */ - current_uid_gid(&ac.ac_uid, &ac.ac_gid); + ac.ac_uid = orig_cred->uid; + ac.ac_gid = orig_cred->gid; #if ACCT_VERSION==2 ac.ac_ahz = AHZ; #endif @@ -578,6 +583,8 @@ sizeof(acct_t), &file->f_pos); current->signal->rlim[RLIMIT_FSIZE].rlim_cur = flim; set_fs(fs); +out: + revert_creds(orig_cred); } /** --- linux-fsl-imx51-2.6.31.orig/kernel/fork.c +++ linux-fsl-imx51-2.6.31/kernel/fork.c @@ -544,12 +544,18 @@ /* Get rid of any futexes when releasing the mm */ #ifdef CONFIG_FUTEX - if (unlikely(tsk->robust_list)) + if (unlikely(tsk->robust_list)) { exit_robust_list(tsk); + tsk->robust_list = NULL; + } #ifdef CONFIG_COMPAT - if (unlikely(tsk->compat_robust_list)) + if (unlikely(tsk->compat_robust_list)) { compat_exit_robust_list(tsk); + tsk->compat_robust_list = NULL; + } #endif + if (unlikely(!list_empty(&tsk->pi_state_list))) + exit_pi_state_list(tsk); #endif /* Get rid of any cached register state */ --- linux-fsl-imx51-2.6.31.orig/kernel/perf_counter.c +++ linux-fsl-imx51-2.6.31/kernel/perf_counter.c @@ -469,7 +469,8 @@ struct perf_counter_context *ctx = counter->ctx; u64 run_end; - if (counter->state < PERF_COUNTER_STATE_INACTIVE) + if (counter->state < PERF_COUNTER_STATE_INACTIVE || + counter->group_leader->state < PERF_COUNTER_STATE_INACTIVE) return; counter->total_time_enabled = ctx->time - counter->tstamp_enabled; @@ -518,7 +519,7 @@ */ if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { update_context_time(ctx); - update_counter_times(counter); + update_group_times(counter); if (counter == counter->group_leader) group_sched_out(counter, cpuctx, ctx); else @@ -573,7 +574,7 @@ * in, so we can change the state safely. */ if (counter->state == PERF_COUNTER_STATE_INACTIVE) { - update_counter_times(counter); + update_group_times(counter); counter->state = PERF_COUNTER_STATE_OFF; } @@ -851,6 +852,27 @@ } /* + * Put a counter into inactive state and update time fields. + * Enabling the leader of a group effectively enables all + * the group members that aren't explicitly disabled, so we + * have to update their ->tstamp_enabled also. + * Note: this works for group members as well as group leaders + * since the non-leader members' sibling_lists will be empty. + */ +static void __perf_counter_mark_enabled(struct perf_counter *counter, + struct perf_counter_context *ctx) +{ + struct perf_counter *sub; + + counter->state = PERF_COUNTER_STATE_INACTIVE; + counter->tstamp_enabled = ctx->time - counter->total_time_enabled; + list_for_each_entry(sub, &counter->sibling_list, list_entry) + if (sub->state >= PERF_COUNTER_STATE_INACTIVE) + sub->tstamp_enabled = + ctx->time - sub->total_time_enabled; +} + +/* * Cross CPU call to enable a performance counter */ static void __perf_counter_enable(void *info) @@ -877,8 +899,7 @@ if (counter->state >= PERF_COUNTER_STATE_INACTIVE) goto unlock; - counter->state = PERF_COUNTER_STATE_INACTIVE; - counter->tstamp_enabled = ctx->time - counter->total_time_enabled; + __perf_counter_mark_enabled(counter, ctx); /* * If the counter is in a group and isn't the group leader, @@ -971,11 +992,9 @@ * Since we have the lock this context can't be scheduled * in, so we can change the state safely. */ - if (counter->state == PERF_COUNTER_STATE_OFF) { - counter->state = PERF_COUNTER_STATE_INACTIVE; - counter->tstamp_enabled = - ctx->time - counter->total_time_enabled; - } + if (counter->state == PERF_COUNTER_STATE_OFF) + __perf_counter_mark_enabled(counter, ctx); + out: spin_unlock_irq(&ctx->lock); } @@ -1344,7 +1363,7 @@ u64 interrupts, freq; spin_lock(&ctx->lock); - list_for_each_entry(counter, &ctx->counter_list, list_entry) { + list_for_each_entry_rcu(counter, &ctx->counter_list, event_entry) { if (counter->state != PERF_COUNTER_STATE_ACTIVE) continue; @@ -1479,9 +1498,7 @@ counter->attr.enable_on_exec = 0; if (counter->state >= PERF_COUNTER_STATE_INACTIVE) continue; - counter->state = PERF_COUNTER_STATE_INACTIVE; - counter->tstamp_enabled = - ctx->time - counter->total_time_enabled; + __perf_counter_mark_enabled(counter, ctx); enabled = 1; } @@ -3498,12 +3515,8 @@ if (events && atomic_dec_and_test(&counter->event_limit)) { ret = 1; counter->pending_kill = POLL_HUP; - if (nmi) { - counter->pending_disable = 1; - perf_pending_queue(&counter->pending, - perf_pending_counter); - } else - perf_counter_disable(counter); + counter->pending_disable = 1; + perf_pending_queue(&counter->pending, perf_pending_counter); } perf_counter_output(counter, nmi, data); @@ -4126,8 +4139,8 @@ static int perf_copy_attr(struct perf_counter_attr __user *uattr, struct perf_counter_attr *attr) { - int ret; u32 size; + int ret; if (!access_ok(VERIFY_WRITE, uattr, PERF_ATTR_SIZE_VER0)) return -EFAULT; @@ -4152,25 +4165,26 @@ /* * If we're handed a bigger struct than we know of, - * ensure all the unknown bits are 0. + * ensure all the unknown bits are 0 - i.e. new + * user-space does not rely on any kernel feature + * extensions we dont know about yet. */ if (size > sizeof(*attr)) { - unsigned long val; - unsigned long __user *addr; - unsigned long __user *end; - - addr = PTR_ALIGN((void __user *)uattr + sizeof(*attr), - sizeof(unsigned long)); - end = PTR_ALIGN((void __user *)uattr + size, - sizeof(unsigned long)); + unsigned char __user *addr; + unsigned char __user *end; + unsigned char val; + + addr = (void __user *)uattr + sizeof(*attr); + end = (void __user *)uattr + size; - for (; addr < end; addr += sizeof(unsigned long)) { + for (; addr < end; addr++) { ret = get_user(val, addr); if (ret) return ret; if (val) goto err_size; } + size = sizeof(*attr); } ret = copy_from_user(attr, uattr, size); --- linux-fsl-imx51-2.6.31.orig/kernel/futex.c +++ linux-fsl-imx51-2.6.31/kernel/futex.c @@ -115,6 +115,9 @@ /* rt_waiter storage for requeue_pi: */ struct rt_mutex_waiter *rt_waiter; + /* The expected requeue pi target futex key: */ + union futex_key *requeue_pi_key; + /* Bitset for the optional bitmasked wakeup */ u32 bitset; }; @@ -147,7 +150,8 @@ */ static inline int match_futex(union futex_key *key1, union futex_key *key2) { - return (key1->both.word == key2->both.word + return (key1 && key2 + && key1->both.word == key2->both.word && key1->both.ptr == key2->both.ptr && key1->both.offset == key2->both.offset); } @@ -299,8 +303,14 @@ */ static int fault_in_user_writeable(u32 __user *uaddr) { - int ret = get_user_pages(current, current->mm, (unsigned long)uaddr, - 1, 1, 0, NULL, NULL); + struct mm_struct *mm = current->mm; + int ret; + + down_read(&mm->mmap_sem); + ret = get_user_pages(current, mm, (unsigned long)uaddr, + 1, 1, 0, NULL, NULL); + up_read(&mm->mmap_sem); + return ret < 0 ? ret : 0; } @@ -749,6 +759,13 @@ if (!pi_state) return -EINVAL; + /* + * If current does not own the pi_state then the futex is + * inconsistent and user space fiddled with the futex value. + */ + if (pi_state->owner != current) + return -EINVAL; + spin_lock(&pi_state->pi_mutex.wait_lock); new_owner = rt_mutex_next_owner(&pi_state->pi_mutex); @@ -912,8 +929,8 @@ hb1 = hash_futex(&key1); hb2 = hash_futex(&key2); - double_lock_hb(hb1, hb2); retry_private: + double_lock_hb(hb1, hb2); op_ret = futex_atomic_op_inuser(op, uaddr2); if (unlikely(op_ret < 0)) { @@ -1024,7 +1041,6 @@ void requeue_pi_wake_futex(struct futex_q *q, union futex_key *key, struct futex_hash_bucket *hb) { - drop_futex_key_refs(&q->key); get_futex_key_refs(key); q->key = *key; @@ -1089,6 +1105,10 @@ if (!top_waiter) return 0; + /* Ensure we requeue to the expected futex. */ + if (!match_futex(top_waiter->requeue_pi_key, key2)) + return -EINVAL; + /* * Try to take the lock for top_waiter. Set the FUTEX_WAITERS bit in * the contended case or if set_waiters is 1. The pi_state is returned @@ -1218,6 +1238,7 @@ */ if (ret == 1) { WARN_ON(pi_state); + drop_count++; task_count++; ret = get_futex_value_locked(&curval2, uaddr2); if (!ret) @@ -1276,6 +1297,12 @@ continue; } + /* Ensure we requeue to the expected futex for requeue_pi. */ + if (requeue_pi && !match_futex(this->requeue_pi_key, &key2)) { + ret = -EINVAL; + break; + } + /* * Requeue nr_requeue waiters and possibly one more in the case * of requeue_pi if we couldn't acquire the lock atomically. @@ -1290,6 +1317,7 @@ if (ret == 1) { /* We got the lock. */ requeue_pi_wake_futex(this, &key2, hb2); + drop_count++; continue; } else if (ret) { /* -EDEADLK */ @@ -1625,17 +1653,8 @@ static void futex_wait_queue_me(struct futex_hash_bucket *hb, struct futex_q *q, struct hrtimer_sleeper *timeout) { - queue_me(q, hb); - - /* - * There might have been scheduling since the queue_me(), as we - * cannot hold a spinlock across the get_user() in case it - * faults, and we cannot just set TASK_INTERRUPTIBLE state when - * queueing ourselves into the futex hash. This code thus has to - * rely on the futex_wake() code removing us from hash when it - * wakes us up. - */ set_current_state(TASK_INTERRUPTIBLE); + queue_me(q, hb); /* Arm the timer */ if (timeout) { @@ -1645,8 +1664,8 @@ } /* - * !plist_node_empty() is safe here without any lock. - * q.lock_ptr != 0 is not safe, because of ordering against wakeup. + * If we have been removed from the hash list, then another task + * has tried to wake us, and we can skip the call to schedule(). */ if (likely(!plist_node_empty(&q->list))) { /* @@ -1751,6 +1770,7 @@ q.pi_state = NULL; q.bitset = bitset; q.rt_waiter = NULL; + q.requeue_pi_key = NULL; if (abs_time) { to = &timeout; @@ -1762,6 +1782,7 @@ current->timer_slack_ns); } +retry: /* Prepare to wait on uaddr. */ ret = futex_wait_setup(uaddr, val, fshared, &q, &hb); if (ret) @@ -1779,9 +1800,14 @@ goto out_put_key; /* - * We expect signal_pending(current), but another thread may - * have handled it for us already. + * We expect signal_pending(current), but we might be the + * victim of a spurious wakeup as well. */ + if (!signal_pending(current)) { + put_futex_key(fshared, &q.key); + goto retry; + } + ret = -ERESTARTSYS; if (!abs_time) goto out_put_key; @@ -1858,6 +1884,7 @@ q.pi_state = NULL; q.rt_waiter = NULL; + q.requeue_pi_key = NULL; retry: q.key = FUTEX_KEY_INIT; ret = get_futex_key(uaddr, fshared, &q.key, VERIFY_WRITE); @@ -1930,7 +1957,7 @@ /* Unqueue and drop the lock */ unqueue_me_pi(&q); - goto out; + goto out_put_key; out_unlock_put_key: queue_unlock(&q, hb); @@ -2087,11 +2114,12 @@ * Unqueue the futex_q and determine which it was. */ plist_del(&q->list, &q->list.plist); - drop_futex_key_refs(&q->key); + /* Handle spurious wakeups gracefully */ + ret = -EWOULDBLOCK; if (timeout && !timeout->task) ret = -ETIMEDOUT; - else + else if (signal_pending(current)) ret = -ERESTARTNOINTR; } return ret; @@ -2169,15 +2197,16 @@ debug_rt_mutex_init_waiter(&rt_waiter); rt_waiter.task = NULL; - q.pi_state = NULL; - q.bitset = bitset; - q.rt_waiter = &rt_waiter; - key2 = FUTEX_KEY_INIT; ret = get_futex_key(uaddr2, fshared, &key2, VERIFY_WRITE); if (unlikely(ret != 0)) goto out; + q.pi_state = NULL; + q.bitset = bitset; + q.rt_waiter = &rt_waiter; + q.requeue_pi_key = &key2; + /* Prepare to wait on uaddr. */ ret = futex_wait_setup(uaddr, val, fshared, &q, &hb); if (ret) --- linux-fsl-imx51-2.6.31.orig/kernel/pid.c +++ linux-fsl-imx51-2.6.31/kernel/pid.c @@ -182,11 +182,14 @@ return -1; } -int next_pidmap(struct pid_namespace *pid_ns, int last) +int next_pidmap(struct pid_namespace *pid_ns, unsigned int last) { int offset; struct pidmap *map, *end; + if (last >= PID_MAX_LIMIT) + return -1; + offset = (last + 1) & BITS_PER_PAGE_MASK; map = &pid_ns->pidmap[(last + 1)/BITS_PER_PAGE]; end = &pid_ns->pidmap[PIDMAP_ENTRIES]; --- linux-fsl-imx51-2.6.31.orig/kernel/sched.c +++ linux-fsl-imx51-2.6.31/kernel/sched.c @@ -2967,6 +2967,7 @@ /* Variables and functions for calc_load */ static atomic_long_t calc_load_tasks; +static atomic_long_t calc_load_tasks_deferred; static unsigned long calc_load_update; unsigned long avenrun[3]; EXPORT_SYMBOL(avenrun); @@ -3021,7 +3022,7 @@ */ static void calc_load_account_active(struct rq *this_rq) { - long nr_active, delta; + long nr_active, delta, deferred; nr_active = this_rq->nr_running; nr_active += (long) this_rq->nr_uninterruptible; @@ -3029,6 +3030,25 @@ if (nr_active != this_rq->calc_load_active) { delta = nr_active - this_rq->calc_load_active; this_rq->calc_load_active = nr_active; + + /* + * Update calc_load_tasks only once per cpu in 10 tick update + * window. + */ + if (unlikely(time_before(jiffies, this_rq->calc_load_update) && + time_after_eq(jiffies, calc_load_update))) { + if (delta) + atomic_long_add(delta, + &calc_load_tasks_deferred); + return; + } + + if (atomic_long_read(&calc_load_tasks_deferred)) { + deferred = atomic_long_xchg(&calc_load_tasks_deferred, + 0); + delta += deferred; + } + atomic_long_add(delta, &calc_load_tasks); } } @@ -3072,8 +3092,8 @@ } if (time_after_eq(jiffies, this_rq->calc_load_update)) { - this_rq->calc_load_update += LOAD_FREQ; calc_load_account_active(this_rq); + this_rq->calc_load_update += LOAD_FREQ; } } @@ -7945,6 +7965,7 @@ /* Setup the mask of cpus configured for isolated domains */ static int __init isolated_cpu_setup(char *str) { + alloc_bootmem_cpumask_var(&cpu_isolated_map); cpulist_parse(str, cpu_isolated_map); return 1; } @@ -9383,13 +9404,15 @@ current->sched_class = &fair_sched_class; /* Allocate the nohz_cpu_mask if CONFIG_CPUMASK_OFFSTACK */ - alloc_cpumask_var(&nohz_cpu_mask, GFP_NOWAIT); + zalloc_cpumask_var(&nohz_cpu_mask, GFP_NOWAIT); #ifdef CONFIG_SMP #ifdef CONFIG_NO_HZ - alloc_cpumask_var(&nohz.cpu_mask, GFP_NOWAIT); + zalloc_cpumask_var(&nohz.cpu_mask, GFP_NOWAIT); alloc_cpumask_var(&nohz.ilb_grp_nohz_mask, GFP_NOWAIT); #endif - alloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT); + /* May be allocated at isolcpus cmdline parse time */ + if (cpu_isolated_map == NULL) + zalloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT); #endif /* SMP */ perf_counter_init(); --- linux-fsl-imx51-2.6.31.orig/kernel/printk.c +++ linux-fsl-imx51-2.6.31/kernel/printk.c @@ -33,6 +33,7 @@ #include #include #include +#include #include @@ -265,14 +266,14 @@ * 9 -- Return number of unread characters in the log buffer * 10 -- Return size of the log buffer */ -int do_syslog(int type, char __user *buf, int len) +int do_syslog(int type, char __user *buf, int len, bool from_file) { unsigned i, j, limit, count; int do_clear = 0; char c; int error = 0; - error = security_syslog(type); + error = security_syslog(type, from_file); if (error) return error; @@ -402,7 +403,7 @@ SYSCALL_DEFINE3(syslog, int, type, char __user *, buf, int, len) { - return do_syslog(type, buf, len); + return do_syslog(type, buf, len, SYSLOG_FROM_CALL); } /* --- linux-fsl-imx51-2.6.31.orig/kernel/params.c +++ linux-fsl-imx51-2.6.31/kernel/params.c @@ -217,15 +217,11 @@ return -ENOSPC; } - if (kp->flags & KPARAM_KMALLOCED) - kfree(*(char **)kp->arg); - /* This is a hack. We can't need to strdup in early boot, and we * don't need to; this mangled commandline is preserved. */ if (slab_is_available()) { - kp->flags |= KPARAM_KMALLOCED; *(char **)kp->arg = kstrdup(val, GFP_KERNEL); - if (!kp->arg) + if (!*(char **)kp->arg) return -ENOMEM; } else *(const char **)kp->arg = val; @@ -303,6 +299,7 @@ unsigned int min, unsigned int max, void *elem, int elemsize, int (*set)(const char *, struct kernel_param *kp), + u16 flags, unsigned int *num) { int ret; @@ -312,6 +309,7 @@ /* Get the name right for errors. */ kp.name = name; kp.arg = elem; + kp.flags = flags; /* No equals sign? */ if (!val) { @@ -357,7 +355,8 @@ unsigned int temp_num; return param_array(kp->name, val, 1, arr->max, arr->elem, - arr->elemsize, arr->set, arr->num ?: &temp_num); + arr->elemsize, arr->set, kp->flags, + arr->num ?: &temp_num); } int param_array_get(char *buffer, struct kernel_param *kp) @@ -604,11 +603,7 @@ void destroy_params(const struct kernel_param *params, unsigned num) { - unsigned int i; - - for (i = 0; i < num; i++) - if (params[i].flags & KPARAM_KMALLOCED) - kfree(*(char **)params[i].arg); + /* FIXME: This should free kmalloced charp parameters. It doesn't. */ } static void __init kernel_add_sysfs_param(const char *name, --- linux-fsl-imx51-2.6.31.orig/kernel/user.c +++ linux-fsl-imx51-2.6.31/kernel/user.c @@ -330,9 +330,9 @@ */ static void free_user(struct user_struct *up, unsigned long flags) { - spin_unlock_irqrestore(&uidhash_lock, flags); INIT_DELAYED_WORK(&up->work, cleanup_user_struct); schedule_delayed_work(&up->work, msecs_to_jiffies(1000)); + spin_unlock_irqrestore(&uidhash_lock, flags); } #else /* CONFIG_USER_SCHED && CONFIG_SYSFS */ --- linux-fsl-imx51-2.6.31.orig/kernel/compat.c +++ linux-fsl-imx51-2.6.31/kernel/compat.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -1139,3 +1140,24 @@ return 0; } + +/* + * Allocate user-space memory for the duration of a single system call, + * in order to marshall parameters inside a compat thunk. + */ +void __user *compat_alloc_user_space(unsigned long len) +{ + void __user *ptr; + + /* If len would occupy more than half of the entire compat space... */ + if (unlikely(len > (((compat_uptr_t)~0) >> 1))) + return NULL; + + ptr = arch_compat_alloc_user_space(len); + + if (unlikely(!access_ok(VERIFY_WRITE, ptr, len))) + return NULL; + + return ptr; +} +EXPORT_SYMBOL_GPL(compat_alloc_user_space); --- linux-fsl-imx51-2.6.31.orig/kernel/taskstats.c +++ linux-fsl-imx51-2.6.31/kernel/taskstats.c @@ -293,16 +293,18 @@ static int add_del_listener(pid_t pid, const struct cpumask *mask, int isadd) { struct listener_list *listeners; - struct listener *s, *tmp; + struct listener *s, *tmp, *s2; unsigned int cpu; if (!cpumask_subset(mask, cpu_possible_mask)) return -EINVAL; + s = NULL; if (isadd == REGISTER) { for_each_cpu(cpu, mask) { - s = kmalloc_node(sizeof(struct listener), GFP_KERNEL, - cpu_to_node(cpu)); + if (!s) + s = kmalloc_node(sizeof(struct listener), + GFP_KERNEL, cpu_to_node(cpu)); if (!s) goto cleanup; s->pid = pid; @@ -311,9 +313,16 @@ listeners = &per_cpu(listener_array, cpu); down_write(&listeners->sem); + list_for_each_entry_safe(s2, tmp, &listeners->list, list) { + if (s2->pid == pid) + goto next_cpu; + } list_add(&s->list, &listeners->list); + s = NULL; +next_cpu: up_write(&listeners->sem); } + kfree(s); return 0; } @@ -583,6 +592,7 @@ .cmd = TASKSTATS_CMD_GET, .doit = taskstats_user_cmd, .policy = taskstats_cmd_get_policy, + .flags = GENL_ADMIN_PERM, }; static struct genl_ops cgroupstats_ops = { --- linux-fsl-imx51-2.6.31.orig/kernel/exit.c +++ linux-fsl-imx51-2.6.31/kernel/exit.c @@ -92,6 +92,14 @@ posix_cpu_timers_exit_group(tsk); else { /* + * This can only happen if the caller is de_thread(). + * FIXME: this is the temporary hack, we should teach + * posix-cpu-timers to handle this case correctly. + */ + if (unlikely(has_group_leader_pid(tsk))) + posix_cpu_timers_exit_group(tsk); + + /* * If there is any task waiting for the group exit * then notify it: */ @@ -899,6 +907,15 @@ if (unlikely(!tsk->pid)) panic("Attempted to kill the idle task!"); + /* + * If do_exit is called because this processes oopsed, it's possible + * that get_fs() was left as KERNEL_DS, so reset it to USER_DS before + * continuing. Amongst other possible reasons, this is to prevent + * mm_release()->clear_child_tid() from writing to a user-controlled + * kernel address. + */ + set_fs(USER_DS); + tracehook_report_exit(&code); /* @@ -987,8 +1004,6 @@ tsk->mempolicy = NULL; #endif #ifdef CONFIG_FUTEX - if (unlikely(!list_empty(&tsk->pi_state_list))) - exit_pi_state_list(tsk); if (unlikely(current->pi_state_cache)) kfree(current->pi_state_cache); #endif --- linux-fsl-imx51-2.6.31.orig/kernel/trace/ftrace.c +++ linux-fsl-imx51-2.6.31/kernel/trace/ftrace.c @@ -1110,14 +1110,9 @@ failed = __ftrace_replace_code(rec, enable); if (failed) { rec->flags |= FTRACE_FL_FAILED; - if ((system_state == SYSTEM_BOOTING) || - !core_kernel_text(rec->ip)) { - ftrace_free_rec(rec); - } else { - ftrace_bug(failed, rec->ip); - /* Stop processing */ - return; - } + ftrace_bug(failed, rec->ip); + /* Stop processing */ + return; } } while_for_each_ftrace_rec(); } @@ -2493,7 +2488,7 @@ .open = ftrace_filter_open, .read = seq_read, .write = ftrace_filter_write, - .llseek = ftrace_regex_lseek, + .llseek = no_llseek, .release = ftrace_filter_release, }; @@ -2801,19 +2796,17 @@ } #ifdef CONFIG_MODULES -void ftrace_release(void *start, void *end) +void ftrace_release_mod(struct module *mod) { struct dyn_ftrace *rec; struct ftrace_page *pg; - unsigned long s = (unsigned long)start; - unsigned long e = (unsigned long)end; - if (ftrace_disabled || !start || start == end) + if (ftrace_disabled) return; mutex_lock(&ftrace_lock); do_for_each_ftrace_rec(pg, rec) { - if ((rec->ip >= s) && (rec->ip < e)) { + if (within_module_core(rec->ip, mod)) { /* * rec->ip is changed in ftrace_free_rec() * It should not between s and e if record was freed. @@ -2845,9 +2838,7 @@ mod->num_ftrace_callsites); break; case MODULE_STATE_GOING: - ftrace_release(mod->ftrace_callsites, - mod->ftrace_callsites + - mod->num_ftrace_callsites); + ftrace_release_mod(mod); break; } --- linux-fsl-imx51-2.6.31.orig/kernel/trace/trace_events_filter.c +++ linux-fsl-imx51-2.6.31/kernel/trace/trace_events_filter.c @@ -844,8 +844,9 @@ while (!list_empty(&ps->postfix)) { elt = list_first_entry(&ps->postfix, struct postfix_elt, list); - kfree(elt->operand); list_del(&elt->list); + kfree(elt->operand); + kfree(elt); } } --- linux-fsl-imx51-2.6.31.orig/kernel/power/Kconfig +++ linux-fsl-imx51-2.6.31/kernel/power/Kconfig @@ -119,6 +119,21 @@ config HIBERNATION_NVS bool +config PM_DISABLE_CONSOLE + bool "Disable Power Management messing with the active console" + depends on PM + default n + ---help--- + By default, PM will take over the active console (generally, this means + switching to the console when suspending from X). This can at times cause + problems, especially if userspace suspend scripts try to do things with + the console before or after suspending (e.g. calling vbestate). + + To work around this, enable this option so that PM will not handle the + console. + + If unsure, say N. + config HIBERNATION bool "Hibernation (aka 'suspend to disk')" depends on PM && SWAP && ARCH_HIBERNATION_POSSIBLE --- linux-fsl-imx51-2.6.31.orig/kernel/power/suspend_test.c +++ linux-fsl-imx51-2.6.31/kernel/power/suspend_test.c @@ -19,7 +19,7 @@ * The time it takes is system-specific though, so when we test this * during system bootup we allow a LOT of time. */ -#define TEST_SUSPEND_SECONDS 5 +#define TEST_SUSPEND_SECONDS 10 static unsigned long suspend_test_start_time; @@ -49,7 +49,8 @@ * has some performance issues. The stack dump of a WARN_ON * is more likely to get the right attention than a printk... */ - WARN(msec > (TEST_SUSPEND_SECONDS * 1000), "Component: %s\n", label); + WARN(msec > (TEST_SUSPEND_SECONDS * 1000), + "Component: %s, time: %u\n", label, msec); } /* --- linux-fsl-imx51-2.6.31.orig/kernel/power/console.c +++ linux-fsl-imx51-2.6.31/kernel/power/console.c @@ -33,6 +33,7 @@ int pm_prepare_console(void) { +#ifndef CONFIG_PM_DISABLE_CONSOLE acquire_console_sem(); if (disable_vt_switch) { @@ -66,11 +67,13 @@ } orig_kmsg = kmsg_redirect; kmsg_redirect = SUSPEND_CONSOLE; +#endif return 0; } void pm_restore_console(void) { +#ifndef CONFIG_PM_DISABLE_CONSOLE acquire_console_sem(); if (disable_vt_switch) { release_console_sem(); @@ -85,5 +88,6 @@ } kmsg_redirect = orig_kmsg; +#endif } #endif --- linux-fsl-imx51-2.6.31.orig/kernel/time/tick-sched.c +++ linux-fsl-imx51-2.6.31/kernel/time/tick-sched.c @@ -231,6 +231,13 @@ if (!inidle && !ts->inidle) goto end; + /* + * Set ts->inidle unconditionally. Even if the system did not + * switch to NOHZ mode the cpu frequency governers rely on the + * update of the idle time accounting in tick_nohz_start_idle(). + */ + ts->inidle = 1; + now = tick_nohz_start_idle(ts); /* @@ -248,8 +255,6 @@ if (unlikely(ts->nohz_mode == NOHZ_MODE_INACTIVE)) goto end; - ts->inidle = 1; - if (need_resched()) goto end; --- linux-fsl-imx51-2.6.31.orig/kernel/time/clockevents.c +++ linux-fsl-imx51-2.6.31/kernel/time/clockevents.c @@ -237,8 +237,9 @@ */ void clockevents_notify(unsigned long reason, void *arg) { - struct list_head *node, *tmp; + struct clock_event_device *dev, *tmp; unsigned long flags; + int cpu; spin_lock_irqsave(&clockevents_lock, flags); clockevents_do_notify(reason, arg); @@ -249,8 +250,19 @@ * Unregister the clock event devices which were * released from the users in the notify chain. */ - list_for_each_safe(node, tmp, &clockevents_released) - list_del(node); + list_for_each_entry_safe(dev, tmp, &clockevents_released, list) + list_del(&dev->list); + /* + * Now check whether the CPU has left unused per cpu devices + */ + cpu = *((int *)arg); + list_for_each_entry_safe(dev, tmp, &clockevent_devices, list) { + if (cpumask_test_cpu(cpu, dev->cpumask) && + cpumask_weight(dev->cpumask) == 1) { + BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED); + list_del(&dev->list); + } + } break; default: break; --- linux-fsl-imx51-2.6.31.orig/ipc/shm.c +++ linux-fsl-imx51-2.6.31/ipc/shm.c @@ -290,28 +290,28 @@ unsigned long flags) { struct shm_file_data *sfd = shm_file_data(file); - return get_unmapped_area(sfd->file, addr, len, pgoff, flags); -} - -int is_file_shm_hugepages(struct file *file) -{ - int ret = 0; - - if (file->f_op == &shm_file_operations) { - struct shm_file_data *sfd; - sfd = shm_file_data(file); - ret = is_file_hugepages(sfd->file); - } - return ret; + return sfd->file->f_op->get_unmapped_area(sfd->file, addr, len, + pgoff, flags); } static const struct file_operations shm_file_operations = { .mmap = shm_mmap, .fsync = shm_fsync, .release = shm_release, +}; + +static const struct file_operations shm_file_operations_huge = { + .mmap = shm_mmap, + .fsync = shm_fsync, + .release = shm_release, .get_unmapped_area = shm_get_unmapped_area, }; +int is_file_shm_hugepages(struct file *file) +{ + return file->f_op == &shm_file_operations_huge; +} + static struct vm_operations_struct shm_vm_ops = { .open = shm_open, /* callback for a new vm-area open */ .close = shm_close, /* callback for when the vm-area is released */ @@ -410,7 +410,7 @@ return error; no_id: - if (shp->mlock_user) /* shmflg & SHM_HUGETLB case */ + if (is_file_hugepages(file) && shp->mlock_user) user_shm_unlock(size, shp->mlock_user); fput(file); no_file: @@ -473,6 +473,7 @@ { struct shmid_ds out; + memset(&out, 0, sizeof(out)); ipc64_perm_to_ipc_perm(&in->shm_perm, &out.shm_perm); out.shm_segsz = in->shm_segsz; out.shm_atime = in->shm_atime; @@ -889,7 +890,10 @@ if (!sfd) goto out_put_dentry; - file = alloc_file(path.mnt, path.dentry, f_mode, &shm_file_operations); + file = alloc_file(path.mnt, path.dentry, f_mode, + is_file_hugepages(shp->shm_file) ? + &shm_file_operations_huge : + &shm_file_operations); if (!file) goto out_free; ima_counts_get(file); --- linux-fsl-imx51-2.6.31.orig/ipc/sem.c +++ linux-fsl-imx51-2.6.31/ipc/sem.c @@ -559,6 +559,8 @@ { struct semid_ds out; + memset(&out, 0, sizeof(out)); + ipc64_perm_to_ipc_perm(&in->sem_perm, &out.sem_perm); out.sem_otime = in->sem_otime; --- linux-fsl-imx51-2.6.31.orig/ipc/compat_mq.c +++ linux-fsl-imx51-2.6.31/ipc/compat_mq.c @@ -53,6 +53,9 @@ void __user *p = NULL; if (u_attr && oflag & O_CREAT) { struct mq_attr attr; + + memset(&attr, 0, sizeof(attr)); + p = compat_alloc_user_space(sizeof(attr)); if (get_compat_mq_attr(&attr, u_attr) || copy_to_user(p, &attr, sizeof(attr))) @@ -127,6 +130,8 @@ struct mq_attr __user *p = compat_alloc_user_space(2 * sizeof(*p)); long ret; + memset(&mqstat, 0, sizeof(mqstat)); + if (u_mqstat) { if (get_compat_mq_attr(&mqstat, u_mqstat) || copy_to_user(p, &mqstat, sizeof(mqstat))) --- linux-fsl-imx51-2.6.31.orig/ipc/compat.c +++ linux-fsl-imx51-2.6.31/ipc/compat.c @@ -242,6 +242,8 @@ struct semid64_ds __user *up64; int version = compat_ipc_parse_version(&third); + memset(&s64, 0, sizeof(s64)); + if (!uptr) return -EINVAL; if (get_user(pad, (u32 __user *) uptr)) @@ -422,6 +424,8 @@ int version = compat_ipc_parse_version(&second); void __user *p; + memset(&m64, 0, sizeof(m64)); + switch (second & (~IPC_64)) { case IPC_INFO: case IPC_RMID: @@ -595,6 +599,8 @@ int err, err2; int version = compat_ipc_parse_version(&second); + memset(&s64, 0, sizeof(s64)); + switch (second & (~IPC_64)) { case IPC_RMID: case SHM_LOCK: --- linux-fsl-imx51-2.6.31.orig/fs/pipe.c +++ linux-fsl-imx51-2.6.31/fs/pipe.c @@ -777,36 +777,55 @@ static int pipe_read_open(struct inode *inode, struct file *filp) { - /* We could have perhaps used atomic_t, but this and friends - below are the only places. So it doesn't seem worthwhile. */ + int ret = -ENOENT; + mutex_lock(&inode->i_mutex); - inode->i_pipe->readers++; + + if (inode->i_pipe) { + ret = 0; + inode->i_pipe->readers++; + } + mutex_unlock(&inode->i_mutex); - return 0; + return ret; } static int pipe_write_open(struct inode *inode, struct file *filp) { + int ret = -ENOENT; + mutex_lock(&inode->i_mutex); - inode->i_pipe->writers++; + + if (inode->i_pipe) { + ret = 0; + inode->i_pipe->writers++; + } + mutex_unlock(&inode->i_mutex); - return 0; + return ret; } static int pipe_rdwr_open(struct inode *inode, struct file *filp) { + int ret = -ENOENT; + mutex_lock(&inode->i_mutex); - if (filp->f_mode & FMODE_READ) - inode->i_pipe->readers++; - if (filp->f_mode & FMODE_WRITE) - inode->i_pipe->writers++; + + if (inode->i_pipe) { + ret = 0; + if (filp->f_mode & FMODE_READ) + inode->i_pipe->readers++; + if (filp->f_mode & FMODE_WRITE) + inode->i_pipe->writers++; + } + mutex_unlock(&inode->i_mutex); - return 0; + return ret; } /* --- linux-fsl-imx51-2.6.31.orig/fs/fcntl.c +++ linux-fsl-imx51-2.6.31/fs/fcntl.c @@ -526,60 +526,90 @@ static struct kmem_cache *fasync_cache __read_mostly; /* - * fasync_helper() is used by almost all character device drivers - * to set up the fasync queue. It returns negative on error, 0 if it did - * no changes and positive if it added/deleted the entry. + * Remove a fasync entry. If successfully removed, return + * positive and clear the FASYNC flag. If no entry exists, + * do nothing and return 0. + * + * NOTE! It is very important that the FASYNC flag always + * match the state "is the filp on a fasync list". + * + * We always take the 'filp->f_lock', in since fasync_lock + * needs to be irq-safe. */ -int fasync_helper(int fd, struct file * filp, int on, struct fasync_struct **fapp) +static int fasync_remove_entry(struct file *filp, struct fasync_struct **fapp) { struct fasync_struct *fa, **fp; - struct fasync_struct *new = NULL; int result = 0; - if (on) { - new = kmem_cache_alloc(fasync_cache, GFP_KERNEL); - if (!new) - return -ENOMEM; + spin_lock(&filp->f_lock); + write_lock_irq(&fasync_lock); + for (fp = fapp; (fa = *fp) != NULL; fp = &fa->fa_next) { + if (fa->fa_file != filp) + continue; + *fp = fa->fa_next; + kmem_cache_free(fasync_cache, fa); + filp->f_flags &= ~FASYNC; + result = 1; + break; } + write_unlock_irq(&fasync_lock); + spin_unlock(&filp->f_lock); + return result; +} + +/* + * Add a fasync entry. Return negative on error, positive if + * added, and zero if did nothing but change an existing one. + * + * NOTE! It is very important that the FASYNC flag always + * match the state "is the filp on a fasync list". + */ +static int fasync_add_entry(int fd, struct file *filp, struct fasync_struct **fapp) +{ + struct fasync_struct *new, *fa, **fp; + int result = 0; + + new = kmem_cache_alloc(fasync_cache, GFP_KERNEL); + if (!new) + return -ENOMEM; - /* - * We need to take f_lock first since it's not an IRQ-safe - * lock. - */ spin_lock(&filp->f_lock); write_lock_irq(&fasync_lock); for (fp = fapp; (fa = *fp) != NULL; fp = &fa->fa_next) { - if (fa->fa_file == filp) { - if(on) { - fa->fa_fd = fd; - kmem_cache_free(fasync_cache, new); - } else { - *fp = fa->fa_next; - kmem_cache_free(fasync_cache, fa); - result = 1; - } - goto out; - } + if (fa->fa_file != filp) + continue; + fa->fa_fd = fd; + kmem_cache_free(fasync_cache, new); + goto out; } - if (on) { - new->magic = FASYNC_MAGIC; - new->fa_file = filp; - new->fa_fd = fd; - new->fa_next = *fapp; - *fapp = new; - result = 1; - } + new->magic = FASYNC_MAGIC; + new->fa_file = filp; + new->fa_fd = fd; + new->fa_next = *fapp; + *fapp = new; + result = 1; + filp->f_flags |= FASYNC; + out: - if (on) - filp->f_flags |= FASYNC; - else - filp->f_flags &= ~FASYNC; write_unlock_irq(&fasync_lock); spin_unlock(&filp->f_lock); return result; } +/* + * fasync_helper() is used by almost all character device drivers + * to set up the fasync queue, and for regular files by the file + * lease code. It returns negative on error, 0 if it did no changes + * and positive if it added/deleted the entry. + */ +int fasync_helper(int fd, struct file * filp, int on, struct fasync_struct **fapp) +{ + if (!on) + return fasync_remove_entry(filp, fapp); + return fasync_add_entry(fd, filp, fapp); +} + EXPORT_SYMBOL(fasync_helper); void __kill_fasync(struct fasync_struct *fa, int sig, int band) --- linux-fsl-imx51-2.6.31.orig/fs/binfmt_elf.c +++ linux-fsl-imx51-2.6.31/fs/binfmt_elf.c @@ -501,22 +501,22 @@ } } - /* - * Now fill out the bss section. First pad the last page up - * to the page boundary, and then perform a mmap to make sure - * that there are zero-mapped pages up to and including the - * last bss page. - */ - if (padzero(elf_bss)) { - error = -EFAULT; - goto out_close; - } + if (last_bss > elf_bss) { + /* + * Now fill out the bss section. First pad the last page up + * to the page boundary, and then perform a mmap to make sure + * that there are zero-mapped pages up to and including the + * last bss page. + */ + if (padzero(elf_bss)) { + error = -EFAULT; + goto out_close; + } - /* What we have mapped so far */ - elf_bss = ELF_PAGESTART(elf_bss + ELF_MIN_ALIGN - 1); + /* What we have mapped so far */ + elf_bss = ELF_PAGESTART(elf_bss + ELF_MIN_ALIGN - 1); - /* Map the last of the bss segment */ - if (last_bss > elf_bss) { + /* Map the last of the bss segment */ down_write(¤t->mm->mmap_sem); error = do_brk(elf_bss, last_bss - elf_bss); up_write(¤t->mm->mmap_sem); @@ -662,27 +662,6 @@ if (elf_interpreter[elf_ppnt->p_filesz - 1] != '\0') goto out_free_interp; - /* - * The early SET_PERSONALITY here is so that the lookup - * for the interpreter happens in the namespace of the - * to-be-execed image. SET_PERSONALITY can select an - * alternate root. - * - * However, SET_PERSONALITY is NOT allowed to switch - * this task into the new images's memory mapping - * policy - that is, TASK_SIZE must still evaluate to - * that which is appropriate to the execing application. - * This is because exit_mmap() needs to have TASK_SIZE - * evaluate to the size of the old image. - * - * So if (say) a 64-bit application is execing a 32-bit - * application it is the architecture's responsibility - * to defer changing the value of TASK_SIZE until the - * switch really is going to happen - do this in - * flush_thread(). - akpm - */ - SET_PERSONALITY(loc->elf_ex); - interpreter = open_exec(elf_interpreter); retval = PTR_ERR(interpreter); if (IS_ERR(interpreter)) @@ -730,9 +709,6 @@ /* Verify the interpreter has a valid arch */ if (!elf_check_arch(&loc->interp_elf_ex)) goto out_free_dentry; - } else { - /* Executables without an interpreter also need a personality */ - SET_PERSONALITY(loc->elf_ex); } /* Flush all traces of the currently running executable */ @@ -740,6 +716,14 @@ if (retval) goto out_free_dentry; +#ifdef CONFIG_X86_32 + /* + * Turn off the CS limit completely if NX active: + */ + if (executable_stack != EXSTACK_DISABLE_X || nx_enabled) + arch_add_exec_range(current->mm, -1); +#endif + /* OK, This is the point of no return */ current->flags &= ~PF_FORKNOEXEC; current->mm->def_flags = def_flags; @@ -752,7 +736,8 @@ if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) current->flags |= PF_RANDOMIZE; - arch_pick_mmap_layout(current->mm); + + setup_new_exec(bprm); /* Do this so that we can load the interpreter, if need be. We will change some of these later */ --- linux-fsl-imx51-2.6.31.orig/fs/eventpoll.c +++ linux-fsl-imx51-2.6.31/fs/eventpoll.c @@ -63,6 +63,13 @@ * cleanup path and it is also acquired by eventpoll_release_file() * if a file has been pushed inside an epoll set and it is then * close()d without a previous call toepoll_ctl(EPOLL_CTL_DEL). + * It is also acquired when inserting an epoll fd onto another epoll + * fd. We do this so that we walk the epoll tree and ensure that this + * insertion does not create a cycle of epoll file descriptors, which + * could lead to deadlock. We need a global mutex to prevent two + * simultaneous inserts (A into B and B into A) from racing and + * constructing a cycle without either insert observing that it is + * going to. * It is possible to drop the "ep->mtx" and to use the global * mutex "epmutex" (together with "ep->lock") to have it working, * but having "ep->mtx" will make the interface more scalable. @@ -227,6 +234,9 @@ */ static DEFINE_MUTEX(epmutex); +/* Used to check for epoll file descriptor inclusion loops */ +static struct nested_calls poll_loop_ncalls; + /* Used for safe wake up implementation */ static struct nested_calls poll_safewake_ncalls; @@ -1182,6 +1192,62 @@ return res; } +/** + * ep_loop_check_proc - Callback function to be passed to the @ep_call_nested() + * API, to verify that adding an epoll file inside another + * epoll structure, does not violate the constraints, in + * terms of closed loops, or too deep chains (which can + * result in excessive stack usage). + * + * @priv: Pointer to the epoll file to be currently checked. + * @cookie: Original cookie for this call. This is the top-of-the-chain epoll + * data structure pointer. + * @call_nests: Current dept of the @ep_call_nested() call stack. + * + * Returns: Returns zero if adding the epoll @file inside current epoll + * structure @ep does not violate the constraints, or -1 otherwise. + */ +static int ep_loop_check_proc(void *priv, void *cookie, int call_nests) +{ + int error = 0; + struct file *file = priv; + struct eventpoll *ep = file->private_data; + struct rb_node *rbp; + struct epitem *epi; + + mutex_lock(&ep->mtx); + for (rbp = rb_first(&ep->rbr); rbp; rbp = rb_next(rbp)) { + epi = rb_entry(rbp, struct epitem, rbn); + if (unlikely(is_file_epoll(epi->ffd.file))) { + error = ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS, + ep_loop_check_proc, epi->ffd.file, + epi->ffd.file->private_data, current); + if (error != 0) + break; + } + } + mutex_unlock(&ep->mtx); + + return error; +} + +/** + * ep_loop_check - Performs a check to verify that adding an epoll file (@file) + * another epoll file (represented by @ep) does not create + * closed loops or too deep chains. + * + * @ep: Pointer to the epoll private data structure. + * @file: Pointer to the epoll file to be checked. + * + * Returns: Returns zero if adding the epoll @file inside current epoll + * structure @ep does not violate the constraints, or -1 otherwise. + */ +static int ep_loop_check(struct eventpoll *ep, struct file *file) +{ + return ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS, + ep_loop_check_proc, file, ep, current); +} + /* * Open an eventpoll file descriptor. */ @@ -1230,6 +1296,7 @@ struct epoll_event __user *, event) { int error; + int did_lock_epmutex = 0; struct file *file, *tfile; struct eventpoll *ep; struct epitem *epi; @@ -1271,6 +1338,25 @@ */ ep = file->private_data; + /* + * When we insert an epoll file descriptor, inside another epoll file + * descriptor, there is the change of creating closed loops, which are + * better be handled here, than in more critical paths. + * + * We hold epmutex across the loop check and the insert in this case, in + * order to prevent two separate inserts from racing and each doing the + * insert "at the same time" such that ep_loop_check passes on both + * before either one does the insert, thereby creating a cycle. + */ + if (unlikely(is_file_epoll(tfile) && op == EPOLL_CTL_ADD)) { + mutex_lock(&epmutex); + did_lock_epmutex = 1; + error = -ELOOP; + if (ep_loop_check(ep, tfile) != 0) + goto error_tgt_fput; + } + + mutex_lock(&ep->mtx); /* @@ -1306,6 +1392,9 @@ mutex_unlock(&ep->mtx); error_tgt_fput: + if (unlikely(did_lock_epmutex)) + mutex_unlock(&epmutex); + fput(tfile); error_fput: fput(file); @@ -1424,6 +1513,12 @@ max_user_watches = (((si.totalram - si.totalhigh) / 25) << PAGE_SHIFT) / EP_ITEM_COST; + /* + * Initialize the structure used to perform epoll file descriptor + * inclusion loops checks. + */ + ep_nested_calls_init(&poll_loop_ncalls); + /* Initialize the structure used to perform safe poll wait head wake ups */ ep_nested_calls_init(&poll_safewake_ncalls); --- linux-fsl-imx51-2.6.31.orig/fs/binfmt_aout.c +++ linux-fsl-imx51-2.6.31/fs/binfmt_aout.c @@ -263,6 +263,7 @@ #else set_personality(PER_LINUX); #endif + setup_new_exec(bprm); current->mm->end_code = ex.a_text + (current->mm->start_code = N_TXTADDR(ex)); --- linux-fsl-imx51-2.6.31.orig/fs/binfmt_flat.c +++ linux-fsl-imx51-2.6.31/fs/binfmt_flat.c @@ -521,6 +521,7 @@ /* OK, This is the point of no return */ set_personality(PER_LINUX_32BIT); + setup_new_exec(bprm); } /* --- linux-fsl-imx51-2.6.31.orig/fs/inode.c +++ linux-fsl-imx51-2.6.31/fs/inode.c @@ -697,13 +697,15 @@ } #endif /* - * This is special! We do not need the spinlock - * when clearing I_LOCK, because we're guaranteed - * that nobody else tries to do anything about the - * state of the inode when it is locked, as we - * just created it (so there can be no old holders - * that haven't tested I_LOCK). + * This is special! We do not need the spinlock when clearing I_LOCK, + * because we're guaranteed that nobody else tries to do anything about + * the state of the inode when it is locked, as we just created it (so + * there can be no old holders that haven't tested I_LOCK). + * However we must emit the memory barrier so that other CPUs reliably + * see the clearing of I_LOCK after the other inode initialisation has + * completed. */ + smp_mb(); WARN_ON((inode->i_state & (I_LOCK|I_NEW)) != (I_LOCK|I_NEW)); inode->i_state &= ~(I_LOCK|I_NEW); wake_up_inode(inode); --- linux-fsl-imx51-2.6.31.orig/fs/compat_ioctl.c +++ linux-fsl-imx51-2.6.31/fs/compat_ioctl.c @@ -1800,7 +1800,7 @@ /* just account for different alignment */ static int compat_ioctl_preallocate(struct file *file, unsigned long arg) { - struct space_resv_32 __user *p32 = (void __user *)arg; + struct space_resv_32 __user *p32 = compat_ptr(arg); struct space_resv __user *p = compat_alloc_user_space(sizeof(*p)); if (copy_in_user(&p->l_type, &p32->l_type, sizeof(s16)) || @@ -2802,7 +2802,7 @@ #else case FS_IOC_RESVSP: case FS_IOC_RESVSP64: - error = ioctl_preallocate(filp, (void __user *)arg); + error = ioctl_preallocate(filp, compat_ptr(arg)); goto out_fput; #endif --- linux-fsl-imx51-2.6.31.orig/fs/aio.c +++ linux-fsl-imx51-2.6.31/fs/aio.c @@ -1680,6 +1680,9 @@ if (unlikely(nr < 0)) return -EINVAL; + if (unlikely(nr > LONG_MAX/sizeof(*iocbpp))) + nr = LONG_MAX/sizeof(*iocbpp); + if (unlikely(!access_ok(VERIFY_READ, iocbpp, (nr*sizeof(*iocbpp))))) return -EFAULT; --- linux-fsl-imx51-2.6.31.orig/fs/stat.c +++ linux-fsl-imx51-2.6.31/fs/stat.c @@ -401,9 +401,9 @@ } #endif /* __ARCH_WANT_STAT64 */ -void inode_add_bytes(struct inode *inode, loff_t bytes) +/* Caller is here responsible for sufficient locking (ie. inode->i_lock) */ +void __inode_add_bytes(struct inode *inode, loff_t bytes) { - spin_lock(&inode->i_lock); inode->i_blocks += bytes >> 9; bytes &= 511; inode->i_bytes += bytes; @@ -411,6 +411,12 @@ inode->i_blocks++; inode->i_bytes -= 512; } +} + +void inode_add_bytes(struct inode *inode, loff_t bytes) +{ + spin_lock(&inode->i_lock); + __inode_add_bytes(inode, bytes); spin_unlock(&inode->i_lock); } --- linux-fsl-imx51-2.6.31.orig/fs/namei.c +++ linux-fsl-imx51-2.6.31/fs/namei.c @@ -221,6 +221,7 @@ /* * Searching includes executable on directories, else just read. */ + mask &= MAY_READ | MAY_WRITE | MAY_EXEC; if (mask == MAY_READ || (S_ISDIR(inode->i_mode) && !(mask & MAY_WRITE))) if (capable(CAP_DAC_READ_SEARCH)) return 0; @@ -337,6 +338,7 @@ return 0; } +EXPORT_SYMBOL(deny_write_access); /** * path_get - get a reference to a path @@ -822,6 +824,17 @@ } /* + * This is a temporary kludge to deal with "automount" symlinks; proper + * solution is to trigger them on follow_mount(), so that do_lookup() + * would DTRT. To be killed before 2.6.34-final. + */ +static inline int follow_on_final(struct inode *inode, unsigned lookup_flags) +{ + return inode && unlikely(inode->i_op->follow_link) && + ((lookup_flags & LOOKUP_FOLLOW) || S_ISDIR(inode->i_mode)); +} + +/* * Name resolution. * This is the basic name resolution function, turning a pathname into * the final dentry. We expect 'base' to be positive and a directory. @@ -963,8 +976,7 @@ if (err) break; inode = next.dentry->d_inode; - if ((lookup_flags & LOOKUP_FOLLOW) - && inode && inode->i_op->follow_link) { + if (follow_on_final(inode, lookup_flags)) { err = do_follow_link(&next, nd); if (err) goto return_err; @@ -1219,7 +1231,7 @@ * needs parent already locked. Doesn't follow mounts. * SMP-safe. */ -static struct dentry *lookup_hash(struct nameidata *nd) +struct dentry *lookup_hash(struct nameidata *nd) { int err; @@ -1228,8 +1240,9 @@ return ERR_PTR(err); return __lookup_hash(&nd->last, nd->path.dentry, nd); } +EXPORT_SYMBOL(lookup_hash); -static int __lookup_one_len(const char *name, struct qstr *this, +int __lookup_one_len(const char *name, struct qstr *this, struct dentry *base, int len) { unsigned long hash; @@ -1250,6 +1263,7 @@ this->hash = end_name_hash(hash); return 0; } +EXPORT_SYMBOL(__lookup_one_len); /** * lookup_one_len - filesystem helper to lookup single pathname component @@ -1533,9 +1547,11 @@ if (error) return error; - error = ima_path_check(path, - acc_mode & (MAY_READ | MAY_WRITE | MAY_EXEC), + error = ima_path_check(path, acc_mode ? + acc_mode & (MAY_READ | MAY_WRITE | MAY_EXEC) : + ACC_MODE(flag) & (MAY_READ | MAY_WRITE), IMA_COUNT_UPDATE); + if (error) return error; /* --- linux-fsl-imx51-2.6.31.orig/fs/namespace.c +++ linux-fsl-imx51-2.6.31/fs/namespace.c @@ -39,6 +39,7 @@ /* spinlock for vfsmount related operations, inplace of dcache_lock */ __cacheline_aligned_in_smp DEFINE_SPINLOCK(vfsmount_lock); +EXPORT_SYMBOL(vfsmount_lock); static int event; static DEFINE_IDA(mnt_id_ida); --- linux-fsl-imx51-2.6.31.orig/fs/block_dev.c +++ linux-fsl-imx51-2.6.31/fs/block_dev.c @@ -1243,8 +1243,8 @@ bd_set_size(bdev, (loff_t)bdev->bd_part->nr_sects << 9); } } else { - put_disk(disk); module_put(disk->fops->owner); + put_disk(disk); disk = NULL; if (bdev->bd_contains == bdev) { if (bdev->bd_disk->fops->open) { --- linux-fsl-imx51-2.6.31.orig/fs/bio.c +++ linux-fsl-imx51-2.6.31/fs/bio.c @@ -813,6 +813,12 @@ end = (uaddr + iov[i].iov_len + PAGE_SIZE - 1) >> PAGE_SHIFT; start = uaddr >> PAGE_SHIFT; + /* + * Overflow, abort + */ + if (end < start) + return ERR_PTR(-EINVAL); + nr_pages += end - start; len += iov[i].iov_len; } @@ -939,6 +945,12 @@ unsigned long end = (uaddr + len + PAGE_SIZE - 1) >> PAGE_SHIFT; unsigned long start = uaddr >> PAGE_SHIFT; + /* + * Overflow, abort + */ + if (end < start) + return ERR_PTR(-EINVAL); + nr_pages += end - start; /* * buffer must be aligned to at least hardsector size for now @@ -966,7 +978,7 @@ unsigned long start = uaddr >> PAGE_SHIFT; const int local_nr_pages = end - start; const int page_limit = cur_page + local_nr_pages; - + ret = get_user_pages_fast(uaddr, local_nr_pages, write_to_vm, &pages[cur_page]); if (ret < local_nr_pages) { --- linux-fsl-imx51-2.6.31.orig/fs/open.c +++ linux-fsl-imx51-2.6.31/fs/open.c @@ -31,6 +31,9 @@ #include #include +#define CREATE_TRACE_POINTS +#include + int vfs_statfs(struct dentry *dentry, struct kstatfs *buf) { int retval = -ENODEV; @@ -221,6 +224,7 @@ mutex_unlock(&dentry->d_inode->i_mutex); return err; } +EXPORT_SYMBOL(do_truncate); static long do_sys_truncate(const char __user *pathname, loff_t length) { @@ -1040,6 +1044,7 @@ } else { fsnotify_open(f->f_path.dentry); fd_install(fd, f); + trace_do_sys_open(tmp, flags, mode); } } putname(tmp); --- linux-fsl-imx51-2.6.31.orig/fs/binfmt_elf_fdpic.c +++ linux-fsl-imx51-2.6.31/fs/binfmt_elf_fdpic.c @@ -313,6 +313,9 @@ * defunct, deceased, etc. after this point we have to exit via * error_kill */ set_personality(PER_LINUX_FDPIC); + + setup_new_exec(bprm); + set_binfmt(&elf_fdpic_format); current->mm->start_code = 0; --- linux-fsl-imx51-2.6.31.orig/fs/compat.c +++ linux-fsl-imx51-2.6.31/fs/compat.c @@ -1360,6 +1360,10 @@ argv++; if (i++ >= max) return -E2BIG; + + if (fatal_signal_pending(current)) + return -ERESTARTNOHAND; + cond_resched(); } } return i; @@ -1401,6 +1405,12 @@ while (len > 0) { int offset, bytes_to_copy; + if (fatal_signal_pending(current)) { + ret = -ERESTARTNOHAND; + goto out; + } + cond_resched(); + offset = pos % PAGE_SIZE; if (offset == 0) offset = PAGE_SIZE; @@ -1417,18 +1427,8 @@ if (!kmapped_page || kpos != (pos & PAGE_MASK)) { struct page *page; -#ifdef CONFIG_STACK_GROWSUP - ret = expand_stack_downwards(bprm->vma, pos); - if (ret < 0) { - /* We've exceed the stack rlimit. */ - ret = -E2BIG; - goto out; - } -#endif - ret = get_user_pages(current, bprm->mm, pos, - 1, 1, 1, &page, NULL); - if (ret <= 0) { - /* We've exceed the stack rlimit. */ + page = get_arg_page(bprm, pos, 1); + if (!page) { ret = -E2BIG; goto out; } @@ -1549,8 +1549,10 @@ return retval; out: - if (bprm->mm) + if (bprm->mm) { + acct_arg_size(bprm, 0); mmput(bprm->mm); + } out_file: if (bprm->file) { --- linux-fsl-imx51-2.6.31.orig/fs/exec.c +++ linux-fsl-imx51-2.6.31/fs/exec.c @@ -56,6 +56,8 @@ #include #include +#include + #include #include #include @@ -157,7 +159,22 @@ #ifdef CONFIG_MMU -static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, +void acct_arg_size(struct linux_binprm *bprm, unsigned long pages) +{ + struct mm_struct *mm = current->mm; + long diff = (long)(pages - bprm->vma_pages); + + if (!mm || !diff) + return; + + bprm->vma_pages = pages; + + down_write(&mm->mmap_sem); + mm->total_vm += diff; + up_write(&mm->mmap_sem); +} + +struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, int write) { struct page *page; @@ -179,6 +196,8 @@ unsigned long size = bprm->vma->vm_end - bprm->vma->vm_start; struct rlimit *rlim; + acct_arg_size(bprm, size / PAGE_SIZE); + /* * We've historically supported up to 32 pages (ARG_MAX) * of argument strings even with small stacks @@ -245,6 +264,11 @@ vma->vm_start = vma->vm_end - PAGE_SIZE; vma->vm_flags = VM_STACK_FLAGS; vma->vm_page_prot = vm_get_page_prot(vma->vm_flags); + + err = security_file_mmap(NULL, 0, 0, 0, vma->vm_start, 1); + if (err) + goto err; + err = insert_vm_struct(mm, vma); if (err) goto err; @@ -267,7 +291,11 @@ #else -static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, +void acct_arg_size(struct linux_binprm *bprm, unsigned long pages) +{ +} + +struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos, int write) { struct page *page; @@ -589,6 +617,11 @@ #else stack_top = arch_align_stack(stack_top); stack_top = PAGE_ALIGN(stack_top); + + if (unlikely(stack_top < mmap_min_addr) || + unlikely(vma->vm_end - vma->vm_start >= stack_top - mmap_min_addr)) + return -ENOMEM; + stack_shift = vma->vm_end - stack_top; bprm->p -= stack_shift; @@ -665,6 +698,8 @@ fsnotify_open(file->f_path.dentry); + trace_open_exec(name); + err = deny_write_access(file); if (err) goto exit; @@ -928,9 +963,7 @@ int flush_old_exec(struct linux_binprm * bprm) { - char * name; - int i, ch, retval; - char tcomm[sizeof(current->comm)]; + int retval; /* * Make sure we have a private signal table and that @@ -945,12 +978,32 @@ /* * Release all of the old mmap stuff */ + acct_arg_size(bprm, 0); retval = exec_mmap(bprm->mm); if (retval) goto out; bprm->mm = NULL; /* We're using it now */ + current->flags &= ~PF_RANDOMIZE; + flush_thread(); + current->personality &= ~bprm->per_clear; + + return 0; + +out: + return retval; +} +EXPORT_SYMBOL(flush_old_exec); + +void setup_new_exec(struct linux_binprm * bprm) +{ + int i, ch; + char * name; + char tcomm[sizeof(current->comm)]; + + arch_pick_mmap_layout(current->mm); + /* This is the point of no return */ current->sas_ss_sp = current->sas_ss_size = 0; @@ -972,9 +1025,6 @@ tcomm[i] = '\0'; set_task_comm(current, tcomm); - current->flags &= ~PF_RANDOMIZE; - flush_thread(); - /* Set the new mm task size. We have to do that late because it may * depend on TIF_32BIT which is only updated in flush_thread() on * some architectures like powerpc @@ -990,8 +1040,6 @@ set_dumpable(current->mm, suid_dumpable); } - current->personality &= ~bprm->per_clear; - /* * Flush performance counters when crossing a * security domain: @@ -1006,14 +1054,8 @@ flush_signal_handlers(current, 0); flush_old_files(current->files); - - return 0; - -out: - return retval; } - -EXPORT_SYMBOL(flush_old_exec); +EXPORT_SYMBOL(setup_new_exec); /* * Prepare credentials and lock ->cred_guard_mutex. @@ -1364,8 +1406,10 @@ return retval; out: - if (bprm->mm) - mmput (bprm->mm); + if (bprm->mm) { + acct_arg_size(bprm, 0); + mmput(bprm->mm); + } out_file: if (bprm->file) { --- linux-fsl-imx51-2.6.31.orig/fs/splice.c +++ linux-fsl-imx51-2.6.31/fs/splice.c @@ -1057,8 +1057,8 @@ /* * Attempt to initiate a splice from pipe to file. */ -static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, - loff_t *ppos, size_t len, unsigned int flags) +long do_splice_from(struct pipe_inode_info *pipe, struct file *out, + loff_t *ppos, size_t len, unsigned int flags) { ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); @@ -1080,13 +1080,14 @@ return splice_write(pipe, out, ppos, len, flags); } +EXPORT_SYMBOL(do_splice_from); /* * Attempt to initiate a splice from a file to a pipe. */ -static long do_splice_to(struct file *in, loff_t *ppos, - struct pipe_inode_info *pipe, size_t len, - unsigned int flags) +long do_splice_to(struct file *in, loff_t *ppos, + struct pipe_inode_info *pipe, size_t len, + unsigned int flags) { ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); @@ -1105,6 +1106,7 @@ return splice_read(in, ppos, pipe, len, flags); } +EXPORT_SYMBOL(do_splice_to); /** * splice_direct_to_actor - splices data directly between two non-pipes --- linux-fsl-imx51-2.6.31.orig/fs/binfmt_som.c +++ linux-fsl-imx51-2.6.31/fs/binfmt_som.c @@ -227,6 +227,7 @@ /* OK, This is the point of no return */ current->flags &= ~PF_FORKNOEXEC; current->personality = PER_HPUX; + setup_new_exec(bprm); /* Set the task size for HP-UX processes such that * the gateway page is outside the address space. --- linux-fsl-imx51-2.6.31.orig/fs/fuse/file.c +++ linux-fsl-imx51-2.6.31/fs/fuse/file.c @@ -1063,7 +1063,8 @@ break; } } - fuse_put_request(fc, req); + if (!IS_ERR(req)) + fuse_put_request(fc, req); if (res > 0) *ppos = pos; @@ -1599,7 +1600,7 @@ kaddr += copy; } - kunmap(map); + kunmap(page); } return 0; --- linux-fsl-imx51-2.6.31.orig/fs/fuse/dir.c +++ linux-fsl-imx51-2.6.31/fs/fuse/dir.c @@ -385,6 +385,9 @@ if (fc->no_create) return -ENOSYS; + if (flags & O_DIRECT) + return -EINVAL; + forget_req = fuse_get_req(fc); if (IS_ERR(forget_req)) return PTR_ERR(forget_req); --- linux-fsl-imx51-2.6.31.orig/fs/partitions/mac.c +++ linux-fsl-imx51-2.6.31/fs/partitions/mac.c @@ -29,10 +29,9 @@ int mac_partition(struct parsed_partitions *state, struct block_device *bdev) { - int slot = 1; Sector sect; unsigned char *data; - int blk, blocks_in_map; + int slot, blocks_in_map; unsigned secsize; #ifdef CONFIG_PPC_PMAC int found_root = 0; @@ -59,10 +58,14 @@ put_dev_sector(sect); return 0; /* not a MacOS disk */ } - printk(" [mac]"); blocks_in_map = be32_to_cpu(part->map_count); - for (blk = 1; blk <= blocks_in_map; ++blk) { - int pos = blk * secsize; + if (blocks_in_map < 0 || blocks_in_map >= DISK_MAX_PARTS) { + put_dev_sector(sect); + return 0; + } + printk(" [mac]"); + for (slot = 1; slot <= blocks_in_map; ++slot) { + int pos = slot * secsize; put_dev_sector(sect); data = read_dev_sector(bdev, pos/512, §); if (!data) @@ -113,13 +116,11 @@ } if (goodness > found_root_goodness) { - found_root = blk; + found_root = slot; found_root_goodness = goodness; } } #endif /* CONFIG_PPC_PMAC */ - - ++slot; } #ifdef CONFIG_PPC_PMAC if (found_root_goodness) --- linux-fsl-imx51-2.6.31.orig/fs/partitions/osf.c +++ linux-fsl-imx51-2.6.31/fs/partitions/osf.c @@ -10,10 +10,13 @@ #include "check.h" #include "osf.h" +#define MAX_OSF_PARTITIONS 8 + int osf_partition(struct parsed_partitions *state, struct block_device *bdev) { int i; int slot = 1; + unsigned int npartitions; Sector sect; unsigned char *data; struct disklabel { @@ -45,7 +48,7 @@ u8 p_fstype; u8 p_frag; __le16 p_cpg; - } d_partitions[8]; + } d_partitions[MAX_OSF_PARTITIONS]; } * label; struct d_partition * partition; @@ -63,7 +66,12 @@ put_dev_sector(sect); return 0; } - for (i = 0 ; i < le16_to_cpu(label->d_npartitions); i++, partition++) { + npartitions = le16_to_cpu(label->d_npartitions); + if (npartitions > MAX_OSF_PARTITIONS) { + put_dev_sector(sect); + return 0; + } + for (i = 0 ; i < npartitions; i++, partition++) { if (slot == state->limit) break; if (le32_to_cpu(partition->p_size)) --- linux-fsl-imx51-2.6.31.orig/fs/partitions/ldm.c +++ linux-fsl-imx51-2.6.31/fs/partitions/ldm.c @@ -251,6 +251,11 @@ } vm->vblk_size = get_unaligned_be32(data + 0x08); + if (vm->vblk_size == 0) { + ldm_error ("Illegal VBLK size"); + return false; + } + vm->vblk_offset = get_unaligned_be32(data + 0x0C); vm->last_vblk_seq = get_unaligned_be32(data + 0x04); @@ -1294,6 +1299,11 @@ BUG_ON (!data || !frags); + if (size < 2 * VBLK_SIZE_HEAD) { + ldm_error("Value of size is to small."); + return false; + } + group = get_unaligned_be32(data + 0x08); rec = get_unaligned_be16(data + 0x0C); num = get_unaligned_be16(data + 0x0E); @@ -1301,6 +1311,10 @@ ldm_error ("A VBLK claims to have %d parts.", num); return false; } + if (rec >= num) { + ldm_error("REC value (%d) exceeds NUM value (%d)", rec, num); + return false; + } list_for_each (item, frags) { f = list_entry (item, struct frag, list); @@ -1321,6 +1335,11 @@ list_add_tail (&f->list, frags); found: + if (rec >= f->num) { + ldm_error("REC value (%d) exceeds NUM value (%d)", rec, f->num); + return false; + } + if (f->map & (1 << rec)) { ldm_error ("Duplicate VBLK, part %d.", rec); f->map &= 0x7F; /* Mark the group as broken */ @@ -1329,10 +1348,9 @@ f->map |= (1 << rec); - if (num > 0) { - data += VBLK_SIZE_HEAD; - size -= VBLK_SIZE_HEAD; - } + data += VBLK_SIZE_HEAD; + size -= VBLK_SIZE_HEAD; + memcpy (f->data+rec*(size-VBLK_SIZE_HEAD)+VBLK_SIZE_HEAD, data, size); return true; --- linux-fsl-imx51-2.6.31.orig/fs/partitions/efi.c +++ linux-fsl-imx51-2.6.31/fs/partitions/efi.c @@ -305,6 +305,15 @@ goto fail; } + /* Check the GUID Partition Table header size */ + if (le32_to_cpu((*gpt)->header_size) > + bdev_logical_block_size(bdev)) { + pr_debug("GUID Partition Table Header size is wrong: %u > %u\n", + le32_to_cpu((*gpt)->header_size), + bdev_logical_block_size(bdev)); + goto fail; + } + /* Check the GUID Partition Table CRC */ origcrc = le32_to_cpu((*gpt)->header_crc32); (*gpt)->header_crc32 = 0; @@ -343,6 +352,12 @@ goto fail; } + /* Check that sizeof_partition_entry has the correct value */ + if (le32_to_cpu((*gpt)->sizeof_partition_entry) != sizeof(gpt_entry)) { + pr_debug("GUID Partitition Entry Size check failed.\n"); + goto fail; + } + if (!(*ptes = alloc_read_gpt_entries(bdev, *gpt))) goto fail; --- linux-fsl-imx51-2.6.31.orig/fs/devpts/inode.c +++ linux-fsl-imx51-2.6.31/fs/devpts/inode.c @@ -518,11 +518,23 @@ struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number) { + struct dentry *dentry; + struct tty_struct *tty; + BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR)); + /* Ensure dentry has not been deleted by devpts_pty_kill() */ + dentry = d_find_alias(pts_inode); + if (!dentry) + return NULL; + + tty = NULL; if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC) - return (struct tty_struct *)pts_inode->i_private; - return NULL; + tty = (struct tty_struct *)pts_inode->i_private; + + dput(dentry); + + return tty; } void devpts_pty_kill(struct tty_struct *tty) --- linux-fsl-imx51-2.6.31.orig/fs/reiserfs/xattr.c +++ linux-fsl-imx51-2.6.31/fs/reiserfs/xattr.c @@ -952,21 +952,13 @@ return generic_permission(inode, mask, NULL); } -/* This will catch lookups from the fs root to .reiserfs_priv */ -static int -xattr_lookup_poison(struct dentry *dentry, struct qstr *q1, struct qstr *name) +static int xattr_hide_revalidate(struct dentry *dentry, struct nameidata *nd) { - struct dentry *priv_root = REISERFS_SB(dentry->d_sb)->priv_root; - if (container_of(q1, struct dentry, d_name) == priv_root) - return -ENOENT; - if (q1->len == name->len && - !memcmp(q1->name, name->name, name->len)) - return 0; - return 1; + return -EPERM; } static const struct dentry_operations xattr_lookup_poison_ops = { - .d_compare = xattr_lookup_poison, + .d_revalidate = xattr_hide_revalidate, }; int reiserfs_lookup_privroot(struct super_block *s) @@ -980,8 +972,7 @@ strlen(PRIVROOT_NAME)); if (!IS_ERR(dentry)) { REISERFS_SB(s)->priv_root = dentry; - if (!reiserfs_expose_privroot(s)) - s->s_root->d_op = &xattr_lookup_poison_ops; + dentry->d_op = &xattr_lookup_poison_ops; if (dentry->d_inode) dentry->d_inode->i_flags |= S_PRIVATE; } else --- linux-fsl-imx51-2.6.31.orig/fs/reiserfs/dir.c +++ linux-fsl-imx51-2.6.31/fs/reiserfs/dir.c @@ -45,8 +45,6 @@ struct reiserfs_de_head *deh) { struct dentry *privroot = REISERFS_SB(dir->d_sb)->priv_root; - if (reiserfs_expose_privroot(dir->d_sb)) - return 0; return (dir == dir->d_parent && privroot->d_inode && deh->deh_objectid == INODE_PKEY(privroot->d_inode)->k_objectid); } --- linux-fsl-imx51-2.6.31.orig/fs/cifs/readdir.c +++ linux-fsl-imx51-2.6.31/fs/cifs/readdir.c @@ -727,11 +727,12 @@ cifs_dir_info_to_fattr(&fattr, (FILE_DIRECTORY_INFO *) pfindEntry, cifs_sb); - /* FIXME: make _to_fattr functions fill this out */ - if (pCifsF->srch_inf.info_level == SMB_FIND_FILE_ID_FULL_DIR_INFO) + if (inum && (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM)) { fattr.cf_uniqueid = inum; - else + } else { fattr.cf_uniqueid = iunique(sb, ROOT_I); + cifs_autodisable_serverino(cifs_sb); + } ino = cifs_uniqueid_to_ino_t(fattr.cf_uniqueid); tmp_dentry = cifs_readdir_lookup(file->f_dentry, &qstring, &fattr); --- linux-fsl-imx51-2.6.31.orig/fs/cifs/dns_resolve.h +++ linux-fsl-imx51-2.6.31/fs/cifs/dns_resolve.h @@ -24,8 +24,9 @@ #define _DNS_RESOLVE_H #ifdef __KERNEL__ -#include -extern struct key_type key_type_dns_resolver; +#include +extern int __init cifs_init_dns_resolver(void); +extern void __exit cifs_exit_dns_resolver(void); extern int dns_resolve_server_name_to_ip(const char *unc, char **ip_addr); #endif /* KERNEL */ --- linux-fsl-imx51-2.6.31.orig/fs/cifs/cifsglob.h +++ linux-fsl-imx51-2.6.31/fs/cifs/cifsglob.h @@ -32,7 +32,7 @@ #define MAX_SHARE_SIZE 64 /* used to be 20, this should still be enough */ #define MAX_USERNAME_SIZE 32 /* 32 is to allow for 15 char names + null termination then *2 for unicode versions */ -#define MAX_PASSWORD_SIZE 16 +#define MAX_PASSWORD_SIZE 512 /* max for windows seems to be 256 wide chars */ #define CIFS_MIN_RCV_POOL 4 @@ -572,9 +572,9 @@ #define CIFSSEC_MUST_LANMAN 0x10010 #define CIFSSEC_MUST_PLNTXT 0x20020 #ifdef CONFIG_CIFS_UPCALL -#define CIFSSEC_MASK 0xAF0AF /* allows weak security but also krb5 */ +#define CIFSSEC_MASK 0xBF0BF /* allows weak security but also krb5 */ #else -#define CIFSSEC_MASK 0xA70A7 /* current flags supported if weak */ +#define CIFSSEC_MASK 0xB70B7 /* current flags supported if weak */ #endif /* UPCALL */ #else /* do not allow weak pw hash */ #ifdef CONFIG_CIFS_UPCALL --- linux-fsl-imx51-2.6.31.orig/fs/cifs/cifsproto.h +++ linux-fsl-imx51-2.6.31/fs/cifs/cifsproto.h @@ -389,4 +389,5 @@ const struct nls_table *nls_codepage, int remap_special_chars); extern int CIFSGetExtAttr(const int xid, struct cifsTconInfo *tcon, const int netfid, __u64 *pExtAttrBits, __u64 *pMask); +extern void cifs_autodisable_serverino(struct cifs_sb_info *cifs_sb); #endif /* _CIFSPROTO_H */ --- linux-fsl-imx51-2.6.31.orig/fs/cifs/inode.c +++ linux-fsl-imx51-2.6.31/fs/cifs/inode.c @@ -512,13 +512,10 @@ cifs_sb->local_nls, cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); - if (rc1) { + if (rc1 || !fattr.cf_uniqueid) { cFYI(1, ("GetSrvInodeNum rc %d", rc1)); fattr.cf_uniqueid = iunique(sb, ROOT_I); - /* disable serverino if call not supported */ - if (rc1 == -EINVAL) - cifs_sb->mnt_cifs_flags &= - ~CIFS_MOUNT_SERVER_INUM; + cifs_autodisable_serverino(cifs_sb); } } else { fattr.cf_uniqueid = iunique(sb, ROOT_I); --- linux-fsl-imx51-2.6.31.orig/fs/cifs/cifsfs.c +++ linux-fsl-imx51-2.6.31/fs/cifs/cifsfs.c @@ -1117,7 +1117,7 @@ goto out_unregister_filesystem; #endif #ifdef CONFIG_CIFS_DFS_UPCALL - rc = register_key_type(&key_type_dns_resolver); + rc = cifs_init_dns_resolver(); if (rc) goto out_unregister_key_type; #endif @@ -1132,7 +1132,7 @@ out_unregister_dfs_key_type: #ifdef CONFIG_CIFS_DFS_UPCALL - unregister_key_type(&key_type_dns_resolver); + cifs_exit_dns_resolver(); out_unregister_key_type: #endif #ifdef CONFIG_CIFS_UPCALL @@ -1158,7 +1158,7 @@ cifs_proc_clean(); #ifdef CONFIG_CIFS_DFS_UPCALL cifs_dfs_release_automount_timer(); - unregister_key_type(&key_type_dns_resolver); + cifs_exit_dns_resolver(); #endif #ifdef CONFIG_CIFS_UPCALL unregister_key_type(&cifs_spnego_key_type); --- linux-fsl-imx51-2.6.31.orig/fs/cifs/cifssmb.c +++ linux-fsl-imx51-2.6.31/fs/cifs/cifssmb.c @@ -1582,6 +1582,14 @@ *nbytes = le16_to_cpu(pSMBr->CountHigh); *nbytes = (*nbytes) << 16; *nbytes += le16_to_cpu(pSMBr->Count); + + /* + * Mask off high 16 bits when bytes written as returned by the + * server is greater than bytes requested by the client. Some + * OS/2 servers are known to set incorrect CountHigh values. + */ + if (*nbytes > count) + *nbytes &= 0xFFFF; } cifs_buf_release(pSMB); @@ -1670,6 +1678,14 @@ *nbytes = le16_to_cpu(pSMBr->CountHigh); *nbytes = (*nbytes) << 16; *nbytes += le16_to_cpu(pSMBr->Count); + + /* + * Mask off high 16 bits when bytes written as returned by the + * server is greater than bytes requested by the client. OS/2 + * servers are known to set incorrect CountHigh values. + */ + if (*nbytes > count) + *nbytes &= 0xFFFF; } /* cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */ @@ -3642,7 +3658,8 @@ T2_FNEXT_RSP_PARMS *parms; char *response_data; int rc = 0; - int bytes_returned, name_len; + int bytes_returned; + unsigned int name_len; __u16 params, byte_count; cFYI(1, ("In FindNext")); --- linux-fsl-imx51-2.6.31.orig/fs/cifs/misc.c +++ linux-fsl-imx51-2.6.31/fs/cifs/misc.c @@ -705,3 +705,17 @@ ctoUCS_out: return i; } + +void +cifs_autodisable_serverino(struct cifs_sb_info *cifs_sb) +{ + if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_SERVER_INUM) { + cifs_sb->mnt_cifs_flags &= ~CIFS_MOUNT_SERVER_INUM; + cERROR(1, ("Autodisabling the use of server inode numbers on " + "%s. This server doesn't seem to support them " + "properly. Hardlinks will not be recognized on this " + "mount. Consider mounting with the \"noserverino\" " + "option to silence this message.", + cifs_sb->tcon->treeName)); + } +} --- linux-fsl-imx51-2.6.31.orig/fs/cifs/file.c +++ linux-fsl-imx51-2.6.31/fs/cifs/file.c @@ -325,6 +325,7 @@ (CIFS_UNIX_POSIX_PATH_OPS_CAP & le64_to_cpu(tcon->fsUnixInfo.Capability))) { int oflags = (int) cifs_posix_convert_flags(file->f_flags); + oflags |= SMB_O_CREAT; /* can not refresh inode info since size could be stale */ rc = cifs_posix_open(full_path, &inode, inode->i_sb, cifs_sb->mnt_file_mode /* ignored */, --- linux-fsl-imx51-2.6.31.orig/fs/cifs/dir.c +++ linux-fsl-imx51-2.6.31/fs/cifs/dir.c @@ -212,8 +212,6 @@ posix_flags |= SMB_O_EXCL; if (oflags & O_TRUNC) posix_flags |= SMB_O_TRUNC; - if (oflags & O_APPEND) - posix_flags |= SMB_O_APPEND; if (oflags & O_SYNC) posix_flags |= SMB_O_SYNC; if (oflags & O_DIRECTORY) @@ -253,7 +251,8 @@ cifs_fattr_to_inode(*pinode, &fattr); } - cifs_fill_fileinfo(*pinode, *pnetfid, cifs_sb->tcon, write_only); + if (cifs_sb->tcon) + cifs_fill_fileinfo(*pinode, *pnetfid, cifs_sb->tcon, write_only); posix_open_ret: kfree(presp_data); @@ -318,7 +317,7 @@ if (nd && (nd->flags & LOOKUP_OPEN)) oflags = nd->intent.open.flags; else - oflags = FMODE_READ; + oflags = FMODE_READ | SMB_O_CREAT; if (tcon->unix_ext && (tcon->ses->capabilities & CAP_UNIX) && (CIFS_UNIX_POSIX_PATH_OPS_CAP & @@ -648,7 +647,7 @@ * O_EXCL: optimize away the lookup, but don't hash the dentry. Let * the VFS handle the create. */ - if (nd->flags & LOOKUP_EXCL) { + if (nd && (nd->flags & LOOKUP_EXCL)) { d_instantiate(direntry, NULL); return 0; } @@ -680,7 +679,7 @@ * reduction in network traffic in the other paths. */ if (pTcon->unix_ext) { - if (!(nd->flags & (LOOKUP_PARENT | LOOKUP_DIRECTORY)) && + if (nd && !(nd->flags & (LOOKUP_PARENT | LOOKUP_DIRECTORY)) && (nd->flags & LOOKUP_OPEN) && !pTcon->broken_posix_open && (nd->intent.open.flags & O_CREAT)) { rc = cifs_posix_open(full_path, &newInode, --- linux-fsl-imx51-2.6.31.orig/fs/cifs/dns_resolve.c +++ linux-fsl-imx51-2.6.31/fs/cifs/dns_resolve.c @@ -23,12 +23,16 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include +#include #include #include "dns_resolve.h" #include "cifsglob.h" #include "cifsproto.h" #include "cifs_debug.h" +static const struct cred *dns_resolver_cache; + /* Checks if supplied name is IP address * returns: * 1 - name is IP @@ -93,6 +97,7 @@ int dns_resolve_server_name_to_ip(const char *unc, char **ip_addr) { + const struct cred *saved_cred; int rc = -EAGAIN; struct key *rkey = ERR_PTR(-EAGAIN); char *name; @@ -132,8 +137,15 @@ goto skip_upcall; } + saved_cred = override_creds(dns_resolver_cache); rkey = request_key(&key_type_dns_resolver, name, ""); + revert_creds(saved_cred); if (!IS_ERR(rkey)) { + if (!(rkey->perm & KEY_USR_VIEW)) { + down_read(&rkey->sem); + rkey->perm |= KEY_USR_VIEW; + up_read(&rkey->sem); + } len = rkey->type_data.x[0]; data = rkey->payload.data; } else { @@ -164,4 +176,61 @@ return rc; } +int __init cifs_init_dns_resolver(void) +{ + struct cred *cred; + struct key *keyring; + int ret; + + printk(KERN_NOTICE "Registering the %s key type\n", + key_type_dns_resolver.name); + + /* create an override credential set with a special thread keyring in + * which DNS requests are cached + * + * this is used to prevent malicious redirections from being installed + * with add_key(). + */ + cred = prepare_kernel_cred(NULL); + if (!cred) + return -ENOMEM; + + keyring = key_alloc(&key_type_keyring, ".dns_resolver", 0, 0, cred, + (KEY_POS_ALL & ~KEY_POS_SETATTR) | + KEY_USR_VIEW | KEY_USR_READ, + KEY_ALLOC_NOT_IN_QUOTA); + if (IS_ERR(keyring)) { + ret = PTR_ERR(keyring); + goto failed_put_cred; + } + + ret = key_instantiate_and_link(keyring, NULL, 0, NULL, NULL); + if (ret < 0) + goto failed_put_key; + + ret = register_key_type(&key_type_dns_resolver); + if (ret < 0) + goto failed_put_key; + + /* instruct request_key() to use this special keyring as a cache for + * the results it looks up */ + cred->thread_keyring = keyring; + cred->jit_keyring = KEY_REQKEY_DEFL_THREAD_KEYRING; + dns_resolver_cache = cred; + return 0; + +failed_put_key: + key_put(keyring); +failed_put_cred: + put_cred(cred); + return ret; +} +void __exit cifs_exit_dns_resolver(void) +{ + key_revoke(dns_resolver_cache->thread_keyring); + unregister_key_type(&key_type_dns_resolver); + put_cred(dns_resolver_cache); + printk(KERN_NOTICE "Unregistered %s key type\n", + key_type_dns_resolver.name); +} --- linux-fsl-imx51-2.6.31.orig/fs/cifs/connect.c +++ linux-fsl-imx51-2.6.31/fs/cifs/connect.c @@ -1556,7 +1556,8 @@ out_err: if (tcp_ses) { - kfree(tcp_ses->hostname); + if (!IS_ERR(tcp_ses->hostname)) + kfree(tcp_ses->hostname); if (tcp_ses->ssocket) sock_release(tcp_ses->ssocket); kfree(tcp_ses); @@ -1565,17 +1566,29 @@ } static struct cifsSesInfo * -cifs_find_smb_ses(struct TCP_Server_Info *server, char *username) +cifs_find_smb_ses(struct TCP_Server_Info *server, struct smb_vol *vol) { - struct list_head *tmp; struct cifsSesInfo *ses; write_lock(&cifs_tcp_ses_lock); - list_for_each(tmp, &server->smb_ses_list) { - ses = list_entry(tmp, struct cifsSesInfo, smb_ses_list); - if (strncmp(ses->userName, username, MAX_USERNAME_SIZE)) - continue; - + list_for_each_entry(ses, &server->smb_ses_list, smb_ses_list) { + switch (server->secType) { + case Kerberos: + if (vol->linux_uid != ses->linux_uid) + continue; + break; + default: + /* anything else takes username/password */ + if (strncmp(ses->userName, vol->username, + MAX_USERNAME_SIZE)) + continue; + if (strlen(vol->username) != 0 && + ses->password != NULL && + strncmp(ses->password, + vol->password ? vol->password : "", + MAX_PASSWORD_SIZE)) + continue; + } ++ses->ses_count; write_unlock(&cifs_tcp_ses_lock); return ses; @@ -2199,16 +2212,8 @@ struct cifs_sb_info *cifs_sb, const char *full_path) { int rc; - __u64 inode_num; FILE_ALL_INFO *pfile_info; - rc = CIFSGetSrvInodeNumber(xid, tcon, full_path, &inode_num, - cifs_sb->local_nls, - cifs_sb->mnt_cifs_flags & - CIFS_MOUNT_MAP_SPECIAL_CHR); - if (rc != -EOPNOTSUPP) - return rc; - pfile_info = kmalloc(sizeof(FILE_ALL_INFO), GFP_KERNEL); if (pfile_info == NULL) return -ENOMEM; @@ -2217,6 +2222,11 @@ 0 /* not legacy */, cifs_sb->local_nls, cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); + + if (rc == -EOPNOTSUPP || rc == -EINVAL) + rc = SMBQueryInformation(xid, tcon, full_path, pfile_info, + cifs_sb->local_nls, cifs_sb->mnt_cifs_flags & + CIFS_MOUNT_MAP_SPECIAL_CHR); kfree(pfile_info); return rc; } @@ -2274,12 +2284,12 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, char *mount_data_global, const char *devname) { - int rc = 0; + int rc; int xid; struct smb_vol *volume_info; - struct cifsSesInfo *pSesInfo = NULL; - struct cifsTconInfo *tcon = NULL; - struct TCP_Server_Info *srvTcp = NULL; + struct cifsSesInfo *pSesInfo; + struct cifsTconInfo *tcon; + struct TCP_Server_Info *srvTcp; char *full_path; char *mount_data = mount_data_global; #ifdef CONFIG_CIFS_DFS_UPCALL @@ -2288,6 +2298,10 @@ int referral_walks_count = 0; try_mount_again: #endif + rc = 0; + tcon = NULL; + pSesInfo = NULL; + srvTcp = NULL; full_path = NULL; xid = GetXid(); @@ -2339,7 +2353,7 @@ goto out; } - pSesInfo = cifs_find_smb_ses(srvTcp, volume_info->username); + pSesInfo = cifs_find_smb_ses(srvTcp, volume_info); if (pSesInfo) { cFYI(1, ("Existing smb sess found (status=%d)", pSesInfo->status)); @@ -2515,7 +2529,7 @@ remote_path_check: /* check if a whole path (including prepath) is not remote */ - if (!rc && cifs_sb->prepathlen && tcon) { + if (!rc && tcon) { /* build_path_to_root works only when we have a valid tcon */ full_path = cifs_build_path_to_root(cifs_sb); if (full_path == NULL) { @@ -2584,6 +2598,7 @@ cleanup_volume_info(&volume_info); referral_walks_count++; + FreeXid(xid); goto try_mount_again; } #else /* No DFS support, return error on mount */ --- linux-fsl-imx51-2.6.31.orig/fs/hfsplus/wrapper.c +++ linux-fsl-imx51-2.6.31/fs/hfsplus/wrapper.c @@ -99,6 +99,10 @@ if (hfsplus_get_last_session(sb, &part_start, &part_size)) return -EINVAL; + if ((u64)part_start + part_size > 0x100000000ULL) { + pr_err("hfs: volumes larger than 2TB are not supported yet\n"); + return -EINVAL; + } while (1) { bh = sb_bread512(sb, part_start + HFSPLUS_VOLHEAD_SECTOR, vhdr); if (!bh) --- linux-fsl-imx51-2.6.31.orig/fs/nfsd/nfs4callback.c +++ linux-fsl-imx51-2.6.31/fs/nfsd/nfs4callback.c @@ -439,42 +439,29 @@ .rpc_call_done = nfsd4_cb_probe_done, }; -static struct rpc_cred *lookup_cb_cred(struct nfs4_cb_conn *cb) -{ - struct auth_cred acred = { - .machine_cred = 1 - }; +static struct rpc_cred *callback_cred; - /* - * Note in the gss case this doesn't actually have to wait for a - * gss upcall (or any calls to the client); this just creates a - * non-uptodate cred which the rpc state machine will fill in with - * a refresh_upcall later. - */ - return rpcauth_lookup_credcache(cb->cb_client->cl_auth, &acred, - RPCAUTH_LOOKUP_NEW); +int set_callback_cred(void) +{ + callback_cred = rpc_lookup_machine_cred(); + if (!callback_cred) + return -ENOMEM; + return 0; } + void do_probe_callback(struct nfs4_client *clp) { struct nfs4_cb_conn *cb = &clp->cl_cb_conn; struct rpc_message msg = { .rpc_proc = &nfs4_cb_procedures[NFSPROC4_CLNT_CB_NULL], .rpc_argp = clp, + .rpc_cred = callback_cred }; - struct rpc_cred *cred; int status; - cred = lookup_cb_cred(cb); - if (IS_ERR(cred)) { - status = PTR_ERR(cred); - goto out; - } - cb->cb_cred = cred; - msg.rpc_cred = cb->cb_cred; status = rpc_call_async(cb->cb_client, &msg, RPC_TASK_SOFT, &nfsd4_cb_probe_ops, (void *)clp); -out: if (status) { warn_no_callback_path(clp, status); put_nfs4_client(clp); @@ -557,7 +544,7 @@ struct rpc_message msg = { .rpc_proc = &nfs4_cb_procedures[NFSPROC4_CLNT_CB_RECALL], .rpc_argp = dp, - .rpc_cred = clp->cl_cb_conn.cb_cred + .rpc_cred = callback_cred }; int status; --- linux-fsl-imx51-2.6.31.orig/fs/nfsd/nfs4state.c +++ linux-fsl-imx51-2.6.31/fs/nfsd/nfs4state.c @@ -647,10 +647,6 @@ clp->cl_cb_conn.cb_client = NULL; rpc_shutdown_client(clnt); } - if (clp->cl_cb_conn.cb_cred) { - put_rpccred(clp->cl_cb_conn.cb_cred); - clp->cl_cb_conn.cb_cred = NULL; - } } static inline void @@ -4086,6 +4082,7 @@ laundry_wq = create_singlethread_workqueue("nfsd4"); queue_delayed_work(laundry_wq, &laundromat_work, grace_time); set_max_delegations(); + return set_callback_cred(); } void --- linux-fsl-imx51-2.6.31.orig/fs/nfsd/nfs4xdr.c +++ linux-fsl-imx51-2.6.31/fs/nfsd/nfs4xdr.c @@ -168,10 +168,10 @@ argp->p = page_address(argp->pagelist[0]); argp->pagelist++; if (argp->pagelen < PAGE_SIZE) { - argp->end = p + (argp->pagelen>>2); + argp->end = argp->p + (argp->pagelen>>2); argp->pagelen = 0; } else { - argp->end = p + (PAGE_SIZE>>2); + argp->end = argp->p + (PAGE_SIZE>>2); argp->pagelen -= PAGE_SIZE; } memcpy(((char*)p)+avail, argp->p, (nbytes - avail)); @@ -1433,10 +1433,10 @@ argp->p = page_address(argp->pagelist[0]); argp->pagelist++; if (argp->pagelen < PAGE_SIZE) { - argp->end = p + (argp->pagelen>>2); + argp->end = argp->p + (argp->pagelen>>2); argp->pagelen = 0; } else { - argp->end = p + (PAGE_SIZE>>2); + argp->end = argp->p + (PAGE_SIZE>>2); argp->pagelen -= PAGE_SIZE; } } --- linux-fsl-imx51-2.6.31.orig/fs/btrfs/ioctl.c +++ linux-fsl-imx51-2.6.31/fs/btrfs/ioctl.c @@ -895,7 +895,7 @@ */ /* the destination must be opened for writing */ - if (!(file->f_mode & FMODE_WRITE)) + if (!(file->f_mode & FMODE_WRITE) || (file->f_flags & O_APPEND)) return -EINVAL; ret = mnt_want_write(file->f_path.mnt); @@ -907,12 +907,17 @@ ret = -EBADF; goto out_drop_write; } + src = src_file->f_dentry->d_inode; ret = -EINVAL; if (src == inode) goto out_fput; + /* the src must be open for reading */ + if (!(src_file->f_mode & FMODE_READ)) + goto out_fput; + ret = -EISDIR; if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode)) goto out_fput; @@ -943,7 +948,7 @@ /* determine range to clone */ ret = -EINVAL; - if (off >= src->i_size || off + len > src->i_size) + if (off + len > src->i_size || off + len < off) goto out_unlock; if (len == 0) olen = len = src->i_size - off; --- linux-fsl-imx51-2.6.31.orig/fs/btrfs/acl.c +++ linux-fsl-imx51-2.6.31/fs/btrfs/acl.c @@ -157,6 +157,9 @@ int ret = 0; struct posix_acl *acl = NULL; + if (!is_owner_or_cap(inode)) + return -EPERM; + if (value) { acl = posix_acl_from_xattr(value, size); if (acl == NULL) { --- linux-fsl-imx51-2.6.31.orig/fs/nilfs2/ioctl.c +++ linux-fsl-imx51-2.6.31/fs/nilfs2/ioctl.c @@ -297,7 +297,18 @@ (unsigned long long)vdesc->vd_vblocknr); return ret; } - bh->b_private = vdesc; + if (unlikely(!list_empty(&bh->b_assoc_buffers))) { + printk(KERN_CRIT "%s: conflicting %s buffer: ino=%llu, " + "cno=%llu, offset=%llu, blocknr=%llu, vblocknr=%llu\n", + __func__, vdesc->vd_flags ? "node" : "data", + (unsigned long long)vdesc->vd_ino, + (unsigned long long)vdesc->vd_cno, + (unsigned long long)vdesc->vd_offset, + (unsigned long long)vdesc->vd_blocknr, + (unsigned long long)vdesc->vd_vblocknr); + brelse(bh); + return -EEXIST; + } list_add_tail(&bh->b_assoc_buffers, buffers); return 0; } @@ -335,24 +346,10 @@ list_for_each_entry_safe(bh, n, &buffers, b_assoc_buffers) { ret = nilfs_gccache_wait_and_mark_dirty(bh); if (unlikely(ret < 0)) { - if (ret == -EEXIST) { - vdesc = bh->b_private; - printk(KERN_CRIT - "%s: conflicting %s buffer: " - "ino=%llu, cno=%llu, offset=%llu, " - "blocknr=%llu, vblocknr=%llu\n", - __func__, - vdesc->vd_flags ? "node" : "data", - (unsigned long long)vdesc->vd_ino, - (unsigned long long)vdesc->vd_cno, - (unsigned long long)vdesc->vd_offset, - (unsigned long long)vdesc->vd_blocknr, - (unsigned long long)vdesc->vd_vblocknr); - } + WARN_ON(ret == -EEXIST); goto failed; } list_del_init(&bh->b_assoc_buffers); - bh->b_private = NULL; brelse(bh); } return nmembs; @@ -360,7 +357,6 @@ failed: list_for_each_entry_safe(bh, n, &buffers, b_assoc_buffers) { list_del_init(&bh->b_assoc_buffers); - bh->b_private = NULL; brelse(bh); } return ret; --- linux-fsl-imx51-2.6.31.orig/fs/nilfs2/btnode.c +++ linux-fsl-imx51-2.6.31/fs/nilfs2/btnode.c @@ -36,6 +36,7 @@ void nilfs_btnode_cache_init_once(struct address_space *btnc) { + memset(btnc, 0, sizeof(*btnc)); INIT_RADIX_TREE(&btnc->page_tree, GFP_ATOMIC); spin_lock_init(&btnc->tree_lock); INIT_LIST_HEAD(&btnc->private_list); @@ -275,8 +276,7 @@ "invalid oldkey %lld (newkey=%lld)", (unsigned long long)oldkey, (unsigned long long)newkey); - if (!test_set_buffer_dirty(obh) && TestSetPageDirty(opage)) - BUG(); + nilfs_btnode_mark_dirty(obh); spin_lock_irq(&btnc->tree_lock); radix_tree_delete(&btnc->page_tree, oldkey); --- linux-fsl-imx51-2.6.31.orig/fs/hfs/btree.c +++ linux-fsl-imx51-2.6.31/fs/hfs/btree.c @@ -45,11 +45,26 @@ case HFS_EXT_CNID: hfs_inode_read_fork(tree->inode, mdb->drXTExtRec, mdb->drXTFlSize, mdb->drXTFlSize, be32_to_cpu(mdb->drXTClpSiz)); + if (HFS_I(tree->inode)->alloc_blocks > + HFS_I(tree->inode)->first_blocks) { + printk(KERN_ERR "hfs: invalid btree extent records\n"); + unlock_new_inode(tree->inode); + goto free_inode; + } + tree->inode->i_mapping->a_ops = &hfs_btree_aops; break; case HFS_CAT_CNID: hfs_inode_read_fork(tree->inode, mdb->drCTExtRec, mdb->drCTFlSize, mdb->drCTFlSize, be32_to_cpu(mdb->drCTClpSiz)); + + if (!HFS_I(tree->inode)->first_blocks) { + printk(KERN_ERR "hfs: invalid btree extent records " + "(0 size).\n"); + unlock_new_inode(tree->inode); + goto free_inode; + } + tree->inode->i_mapping->a_ops = &hfs_btree_aops; break; default: --- linux-fsl-imx51-2.6.31.orig/fs/hfs/super.c +++ linux-fsl-imx51-2.6.31/fs/hfs/super.c @@ -409,8 +409,13 @@ /* try to get the root inode */ hfs_find_init(HFS_SB(sb)->cat_tree, &fd); res = hfs_cat_find_brec(sb, HFS_ROOT_CNID, &fd); - if (!res) + if (!res) { + if (fd.entrylength > sizeof(rec) || fd.entrylength < 0) { + res = -EIO; + goto bail; + } hfs_bnode_read(fd.bnode, &rec, fd.entryoffset, fd.entrylength); + } if (res) { hfs_find_exit(&fd); goto bail_no_root; --- linux-fsl-imx51-2.6.31.orig/fs/hfs/dir.c +++ linux-fsl-imx51-2.6.31/fs/hfs/dir.c @@ -79,6 +79,11 @@ filp->f_pos++; /* fall through */ case 1: + if (fd.entrylength > sizeof(entry) || fd.entrylength < 0) { + err = -EIO; + goto out; + } + hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength); if (entry.type != HFS_CDR_THD) { printk(KERN_ERR "hfs: bad catalog folder thread\n"); @@ -109,6 +114,12 @@ err = -EIO; goto out; } + + if (fd.entrylength > sizeof(entry) || fd.entrylength < 0) { + err = -EIO; + goto out; + } + hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength); type = entry.type; len = hfs_mac2asc(sb, strbuf, &fd.key->cat.CName); --- linux-fsl-imx51-2.6.31.orig/fs/hfs/catalog.c +++ linux-fsl-imx51-2.6.31/fs/hfs/catalog.c @@ -289,6 +289,10 @@ err = hfs_brec_find(&src_fd); if (err) goto out; + if (src_fd.entrylength > sizeof(entry) || src_fd.entrylength < 0) { + err = -EIO; + goto out; + } hfs_bnode_read(src_fd.bnode, &entry, src_fd.entryoffset, src_fd.entrylength); --- linux-fsl-imx51-2.6.31.orig/fs/hfs/trans.c +++ linux-fsl-imx51-2.6.31/fs/hfs/trans.c @@ -40,6 +40,8 @@ src = in->name; srclen = in->len; + if (srclen > HFS_NAMELEN) + srclen = HFS_NAMELEN; dst = out; dstlen = HFS_MAX_NAMELEN; if (nls_io) { --- linux-fsl-imx51-2.6.31.orig/fs/sysfs/file.c +++ linux-fsl-imx51-2.6.31/fs/sysfs/file.c @@ -268,7 +268,7 @@ struct sysfs_open_dirent *od, *new_od = NULL; retry: - spin_lock(&sysfs_open_dirent_lock); + spin_lock_irq(&sysfs_open_dirent_lock); if (!sd->s_attr.open && new_od) { sd->s_attr.open = new_od; @@ -281,7 +281,7 @@ list_add_tail(&buffer->list, &od->buffers); } - spin_unlock(&sysfs_open_dirent_lock); + spin_unlock_irq(&sysfs_open_dirent_lock); if (od) { kfree(new_od); @@ -315,8 +315,9 @@ struct sysfs_buffer *buffer) { struct sysfs_open_dirent *od = sd->s_attr.open; + unsigned long flags; - spin_lock(&sysfs_open_dirent_lock); + spin_lock_irqsave(&sysfs_open_dirent_lock, flags); list_del(&buffer->list); if (atomic_dec_and_test(&od->refcnt)) @@ -324,7 +325,7 @@ else od = NULL; - spin_unlock(&sysfs_open_dirent_lock); + spin_unlock_irqrestore(&sysfs_open_dirent_lock, flags); kfree(od); } @@ -456,8 +457,9 @@ void sysfs_notify_dirent(struct sysfs_dirent *sd) { struct sysfs_open_dirent *od; + unsigned long flags; - spin_lock(&sysfs_open_dirent_lock); + spin_lock_irqsave(&sysfs_open_dirent_lock, flags); od = sd->s_attr.open; if (od) { @@ -465,7 +467,7 @@ wake_up_interruptible(&od->poll); } - spin_unlock(&sysfs_open_dirent_lock); + spin_unlock_irqrestore(&sysfs_open_dirent_lock, flags); } EXPORT_SYMBOL_GPL(sysfs_notify_dirent); --- linux-fsl-imx51-2.6.31.orig/fs/ext3/inode.c +++ linux-fsl-imx51-2.6.31/fs/ext3/inode.c @@ -1137,6 +1137,16 @@ return ext3_journal_get_write_access(handle, bh); } +/* + * Truncate blocks that were not used by write. We have to truncate the + * pagecache as well so that corresponding buffers get properly unmapped. + */ +static void ext3_truncate_failed_write(struct inode *inode) +{ + truncate_inode_pages(inode->i_mapping, inode->i_size); + ext3_truncate(inode); +} + static int ext3_write_begin(struct file *file, struct address_space *mapping, loff_t pos, unsigned len, unsigned flags, struct page **pagep, void **fsdata) @@ -1195,7 +1205,7 @@ unlock_page(page); page_cache_release(page); if (pos + len > inode->i_size) - ext3_truncate(inode); + ext3_truncate_failed_write(inode); } if (ret == -ENOSPC && ext3_should_retry_alloc(inode->i_sb, &retries)) goto retry; @@ -1290,7 +1300,7 @@ page_cache_release(page); if (pos + len > inode->i_size) - ext3_truncate(inode); + ext3_truncate_failed_write(inode); return ret ? ret : copied; } @@ -1316,7 +1326,7 @@ page_cache_release(page); if (pos + len > inode->i_size) - ext3_truncate(inode); + ext3_truncate_failed_write(inode); return ret ? ret : copied; } @@ -1369,7 +1379,7 @@ page_cache_release(page); if (pos + len > inode->i_size) - ext3_truncate(inode); + ext3_truncate_failed_write(inode); return ret ? ret : copied; } --- linux-fsl-imx51-2.6.31.orig/fs/ext3/super.c +++ linux-fsl-imx51-2.6.31/fs/ext3/super.c @@ -2321,7 +2321,18 @@ if (!sbh) return error; - es->s_wtime = cpu_to_le32(get_seconds()); + /* + * If the file system is mounted read-only, don't update the + * superblock write time. This avoids updating the superblock + * write time when we are mounting the root file system + * read/only but we need to replay the journal; at that point, + * for people who are east of GMT and who make their clock + * tick in localtime for Windows bug-for-bug compatibility, + * the clock is set in the future, and this will cause e2fsck + * to complain and force a full file system check. + */ + if (!(sb->s_flags & MS_RDONLY)) + es->s_wtime = cpu_to_le32(get_seconds()); es->s_free_blocks_count = cpu_to_le32(ext3_count_free_blocks(sb)); es->s_free_inodes_count = cpu_to_le32(ext3_count_free_inodes(sb)); BUFFER_TRACE(sbh, "marking dirty"); --- linux-fsl-imx51-2.6.31.orig/fs/proc/task_mmu.c +++ linux-fsl-imx51-2.6.31/fs/proc/task_mmu.c @@ -114,11 +114,11 @@ priv->task = get_pid_task(priv->pid, PIDTYPE_PID); if (!priv->task) - return NULL; + return ERR_PTR(-ESRCH); mm = mm_for_maps(priv->task); - if (!mm) - return NULL; + if (!mm || IS_ERR(mm)) + return mm; down_read(&mm->mmap_sem); tail_vma = get_gate_vma(priv->task); @@ -175,7 +175,8 @@ struct proc_maps_private *priv = m->private; struct vm_area_struct *vma = v; - vma_stop(priv, vma); + if (!IS_ERR(vma)) + vma_stop(priv, vma); if (priv->task) put_task_struct(priv->task); } @@ -206,6 +207,7 @@ int flags = vma->vm_flags; unsigned long ino = 0; unsigned long long pgoff = 0; + unsigned long start; dev_t dev = 0; int len; @@ -216,8 +218,13 @@ pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT; } + /* We don't show the stack guard page in /proc/maps */ + start = vma->vm_start; + if (stack_guard_page(vma, start)) + start += PAGE_SIZE; + seq_printf(m, "%08lx-%08lx %c%c%c%c %08llx %02x:%02x %lu %n", - vma->vm_start, + start, vma->vm_end, flags & VM_READ ? 'r' : '-', flags & VM_WRITE ? 'w' : '-', @@ -656,8 +663,9 @@ if (!task) goto out; - ret = -EACCES; - if (!ptrace_may_access(task, PTRACE_MODE_READ)) + mm = mm_for_maps(task); + ret = PTR_ERR(mm); + if (!mm || IS_ERR(mm)) goto out_task; ret = -EINVAL; @@ -670,10 +678,6 @@ if (!count) goto out_task; - mm = get_task_mm(task); - if (!mm) - goto out_task; - uaddr = (unsigned long)buf & PAGE_MASK; uend = (unsigned long)(buf + count); --- linux-fsl-imx51-2.6.31.orig/fs/proc/uptime.c +++ linux-fsl-imx51-2.6.31/fs/proc/uptime.c @@ -4,13 +4,18 @@ #include #include #include +#include #include static int uptime_proc_show(struct seq_file *m, void *v) { struct timespec uptime; struct timespec idle; - cputime_t idletime = cputime_add(init_task.utime, init_task.stime); + int i; + cputime_t idletime = cputime_zero; + + for_each_possible_cpu(i) + idletime = cputime64_add(idletime, kstat_cpu(i).cpustat.idle); do_posix_clock_monotonic_gettime(&uptime); monotonic_to_bootbased(&uptime); --- linux-fsl-imx51-2.6.31.orig/fs/proc/base.c +++ linux-fsl-imx51-2.6.31/fs/proc/base.c @@ -235,15 +235,17 @@ struct mm_struct *mm_for_maps(struct task_struct *task) { struct mm_struct *mm; + int err; - if (mutex_lock_killable(&task->cred_guard_mutex)) - return NULL; + err = mutex_lock_killable(&task->cred_guard_mutex); + if (err) + return ERR_PTR(err); mm = get_task_mm(task); if (mm && mm != current->mm && !ptrace_may_access(task, PTRACE_MODE_READ)) { mmput(mm); - mm = NULL; + mm = ERR_PTR(-EACCES); } mutex_unlock(&task->cred_guard_mutex); @@ -289,9 +291,9 @@ static int proc_pid_auxv(struct task_struct *task, char *buffer) { - int res = 0; - struct mm_struct *mm = get_task_mm(task); - if (mm) { + struct mm_struct *mm = mm_for_maps(task); + int res = PTR_ERR(mm); + if (mm && !IS_ERR(mm)) { unsigned int nwords = 0; do { nwords += 2; @@ -328,6 +330,23 @@ } #endif /* CONFIG_KALLSYMS */ +static int lock_trace(struct task_struct *task) +{ + int err = mutex_lock_killable(&task->cred_guard_mutex); + if (err) + return err; + if (!ptrace_may_access(task, PTRACE_MODE_ATTACH)) { + mutex_unlock(&task->cred_guard_mutex); + return -EPERM; + } + return 0; +} + +static void unlock_trace(struct task_struct *task) +{ + mutex_unlock(&task->cred_guard_mutex); +} + #ifdef CONFIG_STACKTRACE #define MAX_STACK_TRACE_DEPTH 64 @@ -337,6 +356,7 @@ { struct stack_trace trace; unsigned long *entries; + int err; int i; entries = kmalloc(MAX_STACK_TRACE_DEPTH * sizeof(*entries), GFP_KERNEL); @@ -347,15 +367,20 @@ trace.max_entries = MAX_STACK_TRACE_DEPTH; trace.entries = entries; trace.skip = 0; - save_stack_trace_tsk(task, &trace); - for (i = 0; i < trace.nr_entries; i++) { - seq_printf(m, "[<%p>] %pS\n", - (void *)entries[i], (void *)entries[i]); + err = lock_trace(task); + if (!err) { + save_stack_trace_tsk(task, &trace); + + for (i = 0; i < trace.nr_entries; i++) { + seq_printf(m, "[<%p>] %pS\n", + (void *)entries[i], (void *)entries[i]); + } + unlock_trace(task); } kfree(entries); - return 0; + return err; } #endif @@ -526,18 +551,22 @@ { long nr; unsigned long args[6], sp, pc; + int res = lock_trace(task); + if (res) + return res; if (task_current_syscall(task, &nr, args, 6, &sp, &pc)) - return sprintf(buffer, "running\n"); - - if (nr < 0) - return sprintf(buffer, "%ld 0x%lx 0x%lx\n", nr, sp, pc); - - return sprintf(buffer, + res = sprintf(buffer, "running\n"); + else if (nr < 0) + res = sprintf(buffer, "%ld 0x%lx 0x%lx\n", nr, sp, pc); + else + res = sprintf(buffer, "%ld 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n", nr, args[0], args[1], args[2], args[3], args[4], args[5], sp, pc); + unlock_trace(task); + return res; } #endif /* CONFIG_HAVE_ARCH_TRACEHOOK */ @@ -935,20 +964,18 @@ if (!task) goto out_no_task; - if (!ptrace_may_access(task, PTRACE_MODE_READ)) - goto out; - ret = -ENOMEM; page = (char *)__get_free_page(GFP_TEMPORARY); if (!page) goto out; - ret = 0; - mm = get_task_mm(task); - if (!mm) + mm = mm_for_maps(task); + ret = PTR_ERR(mm); + if (!mm || IS_ERR(mm)) goto out_free; + ret = 0; while (count > 0) { int this_len, retval, max_len; @@ -2421,6 +2448,16 @@ { struct task_io_accounting acct = task->ioac; unsigned long flags; + int result; + + result = mutex_lock_killable(&task->cred_guard_mutex); + if (result) + return result; + + if (!ptrace_may_access(task, PTRACE_MODE_READ)) { + result = -EACCES; + goto out_unlock; + } if (whole && lock_task_sighand(task, &flags)) { struct task_struct *t = task; @@ -2431,7 +2468,7 @@ unlock_task_sighand(task, &flags); } - return sprintf(buffer, + result = sprintf(buffer, "rchar: %llu\n" "wchar: %llu\n" "syscr: %llu\n" @@ -2446,6 +2483,9 @@ (unsigned long long)acct.read_bytes, (unsigned long long)acct.write_bytes, (unsigned long long)acct.cancelled_write_bytes); +out_unlock: + mutex_unlock(&task->cred_guard_mutex); + return result; } static int proc_tid_io_accounting(struct task_struct *task, char *buffer) @@ -2462,8 +2502,12 @@ static int proc_pid_personality(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *task) { - seq_printf(m, "%08x\n", task->personality); - return 0; + int err = lock_trace(task); + if (!err) { + seq_printf(m, "%08x\n", task->personality); + unlock_trace(task); + } + return err; } /* @@ -2482,13 +2526,13 @@ REG("environ", S_IRUSR, proc_environ_operations), INF("auxv", S_IRUSR, proc_pid_auxv), ONE("status", S_IRUGO, proc_pid_status), - ONE("personality", S_IRUSR, proc_pid_personality), + ONE("personality", S_IRUGO, proc_pid_personality), INF("limits", S_IRUSR, proc_pid_limits), #ifdef CONFIG_SCHED_DEBUG REG("sched", S_IRUGO|S_IWUSR, proc_pid_sched_operations), #endif #ifdef CONFIG_HAVE_ARCH_TRACEHOOK - INF("syscall", S_IRUSR, proc_pid_syscall), + INF("syscall", S_IRUGO, proc_pid_syscall), #endif INF("cmdline", S_IRUGO, proc_pid_cmdline), ONE("stat", S_IRUGO, proc_tgid_stat), @@ -2507,7 +2551,7 @@ #ifdef CONFIG_PROC_PAGE_MONITOR REG("clear_refs", S_IWUSR, proc_clear_refs_operations), REG("smaps", S_IRUGO, proc_smaps_operations), - REG("pagemap", S_IRUSR, proc_pagemap_operations), + REG("pagemap", S_IRUGO, proc_pagemap_operations), #endif #ifdef CONFIG_SECURITY DIR("attr", S_IRUGO|S_IXUGO, proc_attr_dir_inode_operations, proc_attr_dir_operations), @@ -2516,7 +2560,7 @@ INF("wchan", S_IRUGO, proc_pid_wchan), #endif #ifdef CONFIG_STACKTRACE - ONE("stack", S_IRUSR, proc_pid_stack), + ONE("stack", S_IRUGO, proc_pid_stack), #endif #ifdef CONFIG_SCHEDSTATS INF("schedstat", S_IRUGO, proc_pid_schedstat), @@ -2543,7 +2587,7 @@ REG("coredump_filter", S_IRUGO|S_IWUSR, proc_coredump_filter_operations), #endif #ifdef CONFIG_TASK_IO_ACCOUNTING - INF("io", S_IRUGO, proc_tgid_io_accounting), + INF("io", S_IRUSR, proc_tgid_io_accounting), #endif }; @@ -2580,8 +2624,7 @@ name.len = snprintf(buf, sizeof(buf), "%d", pid); dentry = d_hash_and_lookup(mnt->mnt_root, &name); if (dentry) { - if (!(current->flags & PF_EXITING)) - shrink_dcache_parent(dentry); + shrink_dcache_parent(dentry); d_drop(dentry); dput(dentry); } @@ -2779,11 +2822,16 @@ /* for the /proc/ directory itself, after non-process stuff has been done */ int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir) { - unsigned int nr = filp->f_pos - FIRST_PROCESS_ENTRY; - struct task_struct *reaper = get_proc_task(filp->f_path.dentry->d_inode); + unsigned int nr; + struct task_struct *reaper; struct tgid_iter iter; struct pid_namespace *ns; + if (filp->f_pos >= PID_MAX_LIMIT + TGID_OFFSET) + goto out_no_task; + nr = filp->f_pos - FIRST_PROCESS_ENTRY; + + reaper = get_proc_task(filp->f_path.dentry->d_inode); if (!reaper) goto out_no_task; @@ -2821,13 +2869,13 @@ REG("environ", S_IRUSR, proc_environ_operations), INF("auxv", S_IRUSR, proc_pid_auxv), ONE("status", S_IRUGO, proc_pid_status), - ONE("personality", S_IRUSR, proc_pid_personality), + ONE("personality", S_IRUGO, proc_pid_personality), INF("limits", S_IRUSR, proc_pid_limits), #ifdef CONFIG_SCHED_DEBUG REG("sched", S_IRUGO|S_IWUSR, proc_pid_sched_operations), #endif #ifdef CONFIG_HAVE_ARCH_TRACEHOOK - INF("syscall", S_IRUSR, proc_pid_syscall), + INF("syscall", S_IRUGO, proc_pid_syscall), #endif INF("cmdline", S_IRUGO, proc_pid_cmdline), ONE("stat", S_IRUGO, proc_tid_stat), @@ -2845,7 +2893,7 @@ #ifdef CONFIG_PROC_PAGE_MONITOR REG("clear_refs", S_IWUSR, proc_clear_refs_operations), REG("smaps", S_IRUGO, proc_smaps_operations), - REG("pagemap", S_IRUSR, proc_pagemap_operations), + REG("pagemap", S_IRUGO, proc_pagemap_operations), #endif #ifdef CONFIG_SECURITY DIR("attr", S_IRUGO|S_IXUGO, proc_attr_dir_inode_operations, proc_attr_dir_operations), @@ -2854,7 +2902,7 @@ INF("wchan", S_IRUGO, proc_pid_wchan), #endif #ifdef CONFIG_STACKTRACE - ONE("stack", S_IRUSR, proc_pid_stack), + ONE("stack", S_IRUGO, proc_pid_stack), #endif #ifdef CONFIG_SCHEDSTATS INF("schedstat", S_IRUGO, proc_pid_schedstat), @@ -2878,7 +2926,7 @@ REG("make-it-fail", S_IRUGO|S_IWUSR, proc_fault_inject_operations), #endif #ifdef CONFIG_TASK_IO_ACCOUNTING - INF("io", S_IRUGO, proc_tid_io_accounting), + INF("io", S_IRUSR, proc_tid_io_accounting), #endif }; --- linux-fsl-imx51-2.6.31.orig/fs/proc/kcore.c +++ linux-fsl-imx51-2.6.31/fs/proc/kcore.c @@ -361,7 +361,13 @@ /* don't dump ioremap'd stuff! (TA) */ if (m->flags & VM_IOREMAP) continue; - memcpy(elf_buf + (vmstart - start), + /* + * we may access memory holes, then use + * ex_table. checking return value just for + * avoid warnings. + */ + vmsize = __copy_from_user_inatomic( + elf_buf + (vmstart - start), (char *)vmstart, vmsize); } read_unlock(&vmlist_lock); --- linux-fsl-imx51-2.6.31.orig/fs/proc/Makefile +++ linux-fsl-imx51-2.6.31/fs/proc/Makefile @@ -26,3 +26,4 @@ proc-$(CONFIG_PROC_DEVICETREE) += proc_devtree.o proc-$(CONFIG_PRINTK) += kmsg.o proc-$(CONFIG_PROC_PAGE_MONITOR) += page.o +proc-y += version_signature.o --- linux-fsl-imx51-2.6.31.orig/fs/proc/task_nommu.c +++ linux-fsl-imx51-2.6.31/fs/proc/task_nommu.c @@ -181,13 +181,13 @@ /* pin the task and mm whilst we play with them */ priv->task = get_pid_task(priv->pid, PIDTYPE_PID); if (!priv->task) - return NULL; + return ERR_PTR(-ESRCH); mm = mm_for_maps(priv->task); - if (!mm) { + if (!mm || IS_ERR(mm)) { put_task_struct(priv->task); priv->task = NULL; - return NULL; + return mm; } down_read(&mm->mmap_sem); --- linux-fsl-imx51-2.6.31.orig/fs/proc/kmsg.c +++ linux-fsl-imx51-2.6.31/fs/proc/kmsg.c @@ -12,37 +12,37 @@ #include #include #include +#include #include #include extern wait_queue_head_t log_wait; -extern int do_syslog(int type, char __user *bug, int count); - static int kmsg_open(struct inode * inode, struct file * file) { - return do_syslog(1,NULL,0); + return do_syslog(1, NULL, 0, SYSLOG_FROM_FILE); } static int kmsg_release(struct inode * inode, struct file * file) { - (void) do_syslog(0,NULL,0); + (void) do_syslog(0, NULL, 0, SYSLOG_FROM_FILE); return 0; } static ssize_t kmsg_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { - if ((file->f_flags & O_NONBLOCK) && !do_syslog(9, NULL, 0)) + if ((file->f_flags & O_NONBLOCK) && + !do_syslog(9, NULL, 0, SYSLOG_FROM_FILE)) return -EAGAIN; - return do_syslog(2, buf, count); + return do_syslog(2, buf, count, SYSLOG_FROM_FILE); } static unsigned int kmsg_poll(struct file *file, poll_table *wait) { poll_wait(file, &log_wait, wait); - if (do_syslog(9, NULL, 0)) + if (do_syslog(9, NULL, 0, SYSLOG_FROM_FILE)) return POLLIN | POLLRDNORM; return 0; } --- linux-fsl-imx51-2.6.31.orig/fs/proc/array.c +++ linux-fsl-imx51-2.6.31/fs/proc/array.c @@ -479,8 +479,8 @@ vsize, mm ? get_mm_rss(mm) : 0, rsslim, - mm ? mm->start_code : 0, - mm ? mm->end_code : 0, + mm ? (permitted ? mm->start_code : 1) : 0, + mm ? (permitted ? mm->end_code : 1) : 0, (permitted && mm) ? mm->start_stack : 0, esp, eip, --- linux-fsl-imx51-2.6.31.orig/fs/proc/version_signature.c +++ linux-fsl-imx51-2.6.31/fs/proc/version_signature.c @@ -0,0 +1,31 @@ +#include +#include +#include +#include +#include +#include + +static int version_signature_proc_show(struct seq_file *m, void *v) +{ + seq_printf(m, "%s\n", CONFIG_VERSION_SIGNATURE); + return 0; +} + +static int version_signature_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, version_signature_proc_show, NULL); +} + +static const struct file_operations version_signature_proc_fops = { + .open = version_signature_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __init proc_version_signature_init(void) +{ + proc_create("version_signature", 0, NULL, &version_signature_proc_fops); + return 0; +} +module_init(proc_version_signature_init); --- linux-fsl-imx51-2.6.31.orig/fs/udf/super.c +++ linux-fsl-imx51-2.6.31/fs/udf/super.c @@ -1078,21 +1078,39 @@ return 0; } -static int udf_load_vat(struct super_block *sb, int p_index, int type1_index) +static void udf_find_vat_block(struct super_block *sb, int p_index, + int type1_index, sector_t start_block) { struct udf_sb_info *sbi = UDF_SB(sb); struct udf_part_map *map = &sbi->s_partmaps[p_index]; + sector_t vat_block; struct kernel_lb_addr ino; + + /* + * VAT file entry is in the last recorded block. Some broken disks have + * it a few blocks before so try a bit harder... + */ + ino.partitionReferenceNum = type1_index; + for (vat_block = start_block; + vat_block >= map->s_partition_root && + vat_block >= start_block - 3 && + !sbi->s_vat_inode; vat_block--) { + ino.logicalBlockNum = vat_block - map->s_partition_root; + sbi->s_vat_inode = udf_iget(sb, &ino); + } +} + +static int udf_load_vat(struct super_block *sb, int p_index, int type1_index) +{ + struct udf_sb_info *sbi = UDF_SB(sb); + struct udf_part_map *map = &sbi->s_partmaps[p_index]; struct buffer_head *bh = NULL; struct udf_inode_info *vati; uint32_t pos; struct virtualAllocationTable20 *vat20; sector_t blocks = sb->s_bdev->bd_inode->i_size >> sb->s_blocksize_bits; - /* VAT file entry is in the last recorded block */ - ino.partitionReferenceNum = type1_index; - ino.logicalBlockNum = sbi->s_last_block - map->s_partition_root; - sbi->s_vat_inode = udf_iget(sb, &ino); + udf_find_vat_block(sb, p_index, type1_index, sbi->s_last_block); if (!sbi->s_vat_inode && sbi->s_last_block != blocks - 1) { printk(KERN_NOTICE "UDF-fs: Failed to read VAT inode from the" @@ -1100,9 +1118,7 @@ "block of the device (%lu).\n", (unsigned long)sbi->s_last_block, (unsigned long)blocks - 1); - ino.partitionReferenceNum = type1_index; - ino.logicalBlockNum = blocks - 1 - map->s_partition_root; - sbi->s_vat_inode = udf_iget(sb, &ino); + udf_find_vat_block(sb, p_index, type1_index, blocks - 1); } if (!sbi->s_vat_inode) return 1; --- linux-fsl-imx51-2.6.31.orig/fs/lockd/clntproc.c +++ linux-fsl-imx51-2.6.31/fs/lockd/clntproc.c @@ -709,7 +709,13 @@ if (task->tk_status < 0) { dprintk("lockd: unlock failed (err = %d)\n", -task->tk_status); - goto retry_rebind; + switch (task->tk_status) { + case -EACCES: + case -EIO: + goto die; + default: + goto retry_rebind; + } } if (status == NLM_LCK_DENIED_GRACE_PERIOD) { rpc_delay(task, NLMCLNT_GRACE_WAIT); --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/messaging.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/messaging.c @@ -30,9 +30,9 @@ static struct hlist_head *ecryptfs_daemon_hash; struct mutex ecryptfs_daemon_hash_mux; -static int ecryptfs_hash_buckets; +static int ecryptfs_hash_bits; #define ecryptfs_uid_hash(uid) \ - hash_long((unsigned long)uid, ecryptfs_hash_buckets) + hash_long((unsigned long)uid, ecryptfs_hash_bits) static u32 ecryptfs_msg_counter; static struct ecryptfs_msg_ctx *ecryptfs_msg_ctx_arr; @@ -485,18 +485,19 @@ } mutex_init(&ecryptfs_daemon_hash_mux); mutex_lock(&ecryptfs_daemon_hash_mux); - ecryptfs_hash_buckets = 1; - while (ecryptfs_number_of_users >> ecryptfs_hash_buckets) - ecryptfs_hash_buckets++; + ecryptfs_hash_bits = 1; + while (ecryptfs_number_of_users >> ecryptfs_hash_bits) + ecryptfs_hash_bits++; ecryptfs_daemon_hash = kmalloc((sizeof(struct hlist_head) - * ecryptfs_hash_buckets), GFP_KERNEL); + * (1 << ecryptfs_hash_bits)), + GFP_KERNEL); if (!ecryptfs_daemon_hash) { rc = -ENOMEM; printk(KERN_ERR "%s: Failed to allocate memory\n", __func__); mutex_unlock(&ecryptfs_daemon_hash_mux); goto out; } - for (i = 0; i < ecryptfs_hash_buckets; i++) + for (i = 0; i < (1 << ecryptfs_hash_bits); i++) INIT_HLIST_HEAD(&ecryptfs_daemon_hash[i]); mutex_unlock(&ecryptfs_daemon_hash_mux); ecryptfs_msg_ctx_arr = kmalloc((sizeof(struct ecryptfs_msg_ctx) @@ -553,7 +554,7 @@ int i; mutex_lock(&ecryptfs_daemon_hash_mux); - for (i = 0; i < ecryptfs_hash_buckets; i++) { + for (i = 0; i < (1 << ecryptfs_hash_bits); i++) { int rc; hlist_for_each_entry(daemon, elem, --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/inode.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/inode.c @@ -476,6 +476,7 @@ struct inode *lower_dir_inode = ecryptfs_inode_to_lower(dir); struct dentry *lower_dir_dentry; + dget(lower_dentry); lower_dir_dentry = lock_parent(lower_dentry); rc = vfs_unlink(lower_dir_inode, lower_dentry); if (rc) { @@ -489,6 +490,7 @@ d_drop(dentry); out_unlock: unlock_dir(lower_dir_dentry); + dput(lower_dentry); return rc; } --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/main.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/main.c @@ -35,6 +35,7 @@ #include #include #include +#include #include "ecryptfs_kernel.h" /** @@ -118,6 +119,7 @@ const struct cred *cred = current_cred(); struct ecryptfs_inode_info *inode_info = ecryptfs_inode_to_private(ecryptfs_dentry->d_inode); + int opened_lower_file = 0; int rc = 0; mutex_lock(&inode_info->lower_file_mutex); @@ -129,15 +131,17 @@ lower_dentry = ecryptfs_dentry_to_lower(ecryptfs_dentry); rc = ecryptfs_privileged_open(&inode_info->lower_file, lower_dentry, lower_mnt, cred); - if (rc || IS_ERR(inode_info->lower_file)) { + if (rc) { printk(KERN_ERR "Error opening lower persistent file " "for lower_dentry [0x%p] and lower_mnt [0x%p]; " "rc = [%d]\n", lower_dentry, lower_mnt, rc); - rc = PTR_ERR(inode_info->lower_file); inode_info->lower_file = NULL; - } + } else + opened_lower_file = 1; } mutex_unlock(&inode_info->lower_file_mutex); + if (opened_lower_file) + ima_counts_get(inode_info->lower_file); return rc; } @@ -208,7 +212,8 @@ ecryptfs_opt_passthrough, ecryptfs_opt_xattr_metadata, ecryptfs_opt_encrypted_view, ecryptfs_opt_fnek_sig, ecryptfs_opt_fn_cipher, ecryptfs_opt_fn_cipher_key_bytes, - ecryptfs_opt_unlink_sigs, ecryptfs_opt_err }; + ecryptfs_opt_unlink_sigs, ecryptfs_opt_check_dev_ruid, + ecryptfs_opt_err }; static const match_table_t tokens = { {ecryptfs_opt_sig, "sig=%s"}, @@ -223,6 +228,7 @@ {ecryptfs_opt_fn_cipher, "ecryptfs_fn_cipher=%s"}, {ecryptfs_opt_fn_cipher_key_bytes, "ecryptfs_fn_key_bytes=%u"}, {ecryptfs_opt_unlink_sigs, "ecryptfs_unlink_sigs"}, + {ecryptfs_opt_check_dev_ruid, "ecryptfs_check_dev_ruid"}, {ecryptfs_opt_err, NULL} }; @@ -266,6 +272,7 @@ * ecryptfs_parse_options * @sb: The ecryptfs super block * @options: The options pased to the kernel + * @check_ruid: set to 1 if device uid should be checked against the ruid * * Parse mount options: * debug=N - ecryptfs_verbosity level for debug output @@ -281,7 +288,8 @@ * * Returns zero on success; non-zero on error */ -static int ecryptfs_parse_options(struct super_block *sb, char *options) +static int ecryptfs_parse_options(struct super_block *sb, char *options, + uid_t *check_ruid) { char *p; int rc = 0; @@ -306,6 +314,8 @@ char *cipher_key_bytes_src; char *fn_cipher_key_bytes_src; + *check_ruid = 0; + if (!options) { rc = -EINVAL; goto out; @@ -406,6 +416,9 @@ case ecryptfs_opt_unlink_sigs: mount_crypt_stat->flags |= ECRYPTFS_UNLINK_SIGS; break; + case ecryptfs_opt_check_dev_ruid: + *check_ruid = 1; + break; case ecryptfs_opt_err: default: printk(KERN_WARNING @@ -547,7 +560,8 @@ * ecryptfs_interpose to create our initial inode and super block * struct. */ -static int ecryptfs_read_super(struct super_block *sb, const char *dev_name) +static int ecryptfs_read_super(struct super_block *sb, const char *dev_name, + uid_t check_ruid) { struct path path; int rc; @@ -557,6 +571,15 @@ ecryptfs_printk(KERN_WARNING, "path_lookup() failed\n"); goto out; } + + if (check_ruid && path.dentry->d_inode->i_uid != current_uid()) { + rc = -EPERM; + printk(KERN_ERR "Mount of device (uid: %d) not owned by " + "requested user (uid: %d)\n", + path.dentry->d_inode->i_uid, current_uid()); + goto out_free; + } + ecryptfs_set_superblock_lower(sb, path.dentry->d_sb); sb->s_maxbytes = path.dentry->d_sb->s_maxbytes; sb->s_blocksize = path.dentry->d_sb->s_blocksize; @@ -595,6 +618,7 @@ { int rc; struct super_block *sb; + uid_t check_ruid; rc = get_sb_nodev(fs_type, flags, raw_data, ecryptfs_fill_super, mnt); if (rc < 0) { @@ -602,12 +626,12 @@ goto out; } sb = mnt->mnt_sb; - rc = ecryptfs_parse_options(sb, raw_data); + rc = ecryptfs_parse_options(sb, raw_data, &check_ruid); if (rc) { printk(KERN_ERR "Error parsing options; rc = [%d]\n", rc); goto out_abort; } - rc = ecryptfs_read_super(sb, dev_name); + rc = ecryptfs_read_super(sb, dev_name, check_ruid); if (rc) { printk(KERN_ERR "Reading sb failed; rc = [%d]\n", rc); goto out_abort; --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/keystore.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/keystore.c @@ -416,7 +416,9 @@ &mount_crypt_stat->global_auth_tok_list, mount_crypt_stat_list) { if (memcmp(walker->sig, sig, ECRYPTFS_SIG_SIZE_HEX) == 0) { - (*global_auth_tok) = walker; + rc = key_validate(walker->global_auth_tok_key); + if (!rc) + (*global_auth_tok) = walker; goto out; } } @@ -612,7 +614,12 @@ } /* TODO: Support other key modules than passphrase for * filename encryption */ - BUG_ON(s->auth_tok->token_type != ECRYPTFS_PASSWORD); + if (s->auth_tok->token_type != ECRYPTFS_PASSWORD) { + rc = -EOPNOTSUPP; + printk(KERN_INFO "%s: Filename encryption only supports " + "password tokens\n", __func__); + goto out_free_unlock; + } sg_init_one( &s->hash_sg, (u8 *)s->auth_tok->token.password.session_key_encryption_key, @@ -910,7 +917,12 @@ } /* TODO: Support other key modules than passphrase for * filename encryption */ - BUG_ON(s->auth_tok->token_type != ECRYPTFS_PASSWORD); + if (s->auth_tok->token_type != ECRYPTFS_PASSWORD) { + rc = -EOPNOTSUPP; + printk(KERN_INFO "%s: Filename encryption only supports " + "password tokens\n", __func__); + goto out_free_unlock; + } rc = crypto_blkcipher_setkey( s->desc.tfm, s->auth_tok->token.password.session_key_encryption_key, @@ -1316,8 +1328,10 @@ rc = -EINVAL; goto out_free; } - ecryptfs_cipher_code_to_string(crypt_stat->cipher, - (u16)data[(*packet_size)]); + rc = ecryptfs_cipher_code_to_string(crypt_stat->cipher, + (u16)data[(*packet_size)]); + if (rc) + goto out_free; /* A little extra work to differentiate among the AES key * sizes; see RFC2440 */ switch(data[(*packet_size)++]) { @@ -1328,7 +1342,9 @@ crypt_stat->key_size = (*new_auth_tok)->session_key.encrypted_key_size; } - ecryptfs_init_crypt_ctx(crypt_stat); + rc = ecryptfs_init_crypt_ctx(crypt_stat); + if (rc) + goto out_free; if (unlikely(data[(*packet_size)++] != 0x03)) { printk(KERN_WARNING "Only S2K ID 3 is currently supported\n"); rc = -ENOSYS; --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/kthread.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/kthread.c @@ -136,6 +136,7 @@ const struct cred *cred) { struct ecryptfs_open_req *req; + int flags = O_LARGEFILE; int rc = 0; /* Corresponding dput() and mntput() are done when the @@ -143,10 +144,14 @@ * destroyed. */ dget(lower_dentry); mntget(lower_mnt); - (*lower_file) = dentry_open(lower_dentry, lower_mnt, - (O_RDWR | O_LARGEFILE), cred); + flags |= IS_RDONLY(lower_dentry->d_inode) ? O_RDONLY : O_RDWR; + (*lower_file) = dentry_open(lower_dentry, lower_mnt, flags, cred); if (!IS_ERR(*lower_file)) goto out; + if (flags & O_RDONLY) { + rc = PTR_ERR((*lower_file)); + goto out; + } req = kmem_cache_alloc(ecryptfs_open_req_cache, GFP_KERNEL); if (!req) { rc = -ENOMEM; @@ -180,21 +185,8 @@ __func__); goto out_unlock; } - if (IS_ERR(*req->lower_file)) { + if (IS_ERR(*req->lower_file)) rc = PTR_ERR(*req->lower_file); - dget(lower_dentry); - mntget(lower_mnt); - (*lower_file) = dentry_open(lower_dentry, lower_mnt, - (O_RDONLY | O_LARGEFILE), cred); - if (IS_ERR(*lower_file)) { - rc = PTR_ERR(*req->lower_file); - (*lower_file) = NULL; - printk(KERN_WARNING "%s: Error attempting privileged " - "open of lower file with either RW or RO " - "perms; rc = [%d]. Giving up.\n", - __func__, rc); - } - } out_unlock: mutex_unlock(&req->mux); out_free: --- linux-fsl-imx51-2.6.31.orig/fs/ecryptfs/crypto.c +++ linux-fsl-imx51-2.6.31/fs/ecryptfs/crypto.c @@ -797,6 +797,7 @@ kfree(full_alg_name); if (IS_ERR(crypt_stat->tfm)) { rc = PTR_ERR(crypt_stat->tfm); + crypt_stat->tfm = NULL; ecryptfs_printk(KERN_ERR, "cryptfs: init_crypt_ctx(): " "Error initializing cipher [%s]\n", crypt_stat->cipher); @@ -1702,7 +1703,7 @@ } else { printk(KERN_ERR "%s: No support for requested filename " "encryption method in this release\n", __func__); - rc = -ENOTSUPP; + rc = -EOPNOTSUPP; goto out; } out: @@ -2166,7 +2167,7 @@ (*encoded_name)[(*encoded_name_size)] = '\0'; (*encoded_name_size)++; } else { - rc = -ENOTSUPP; + rc = -EOPNOTSUPP; } if (rc) { printk(KERN_ERR "%s: Error attempting to encode " --- linux-fsl-imx51-2.6.31.orig/fs/jbd2/journal.c +++ linux-fsl-imx51-2.6.31/fs/jbd2/journal.c @@ -78,6 +78,7 @@ EXPORT_SYMBOL(jbd2_journal_ack_err); EXPORT_SYMBOL(jbd2_journal_clear_err); EXPORT_SYMBOL(jbd2_log_wait_commit); +EXPORT_SYMBOL(jbd2_log_start_commit); EXPORT_SYMBOL(jbd2_journal_start_commit); EXPORT_SYMBOL(jbd2_journal_force_commit_nested); EXPORT_SYMBOL(jbd2_journal_wipe); @@ -361,6 +362,10 @@ jbd_unlock_bh_state(bh_in); tmp = jbd2_alloc(bh_in->b_size, GFP_NOFS); + if (!tmp) { + jbd2_journal_put_journal_head(new_jh); + return -ENOMEM; + } jbd_lock_bh_state(bh_in); if (jh_in->b_frozen_data) { jbd2_free(tmp, bh_in->b_size); @@ -1187,6 +1192,12 @@ first = be32_to_cpu(sb->s_first); last = be32_to_cpu(sb->s_maxlen); + if (first + JBD2_MIN_JOURNAL_BLOCKS > last + 1) { + printk(KERN_ERR "JBD: Journal too short (blocks %llu-%llu).\n", + first, last); + journal_fail_superblock(journal); + return -EINVAL; + } journal->j_first = first; journal->j_last = last; @@ -1340,6 +1351,14 @@ goto out; } + if (be32_to_cpu(sb->s_first) == 0 || + be32_to_cpu(sb->s_first) >= journal->j_maxlen) { + printk(KERN_WARNING + "JBD2: Invalid start block of journal: %u\n", + be32_to_cpu(sb->s_first)); + goto out; + } + return 0; out: @@ -1410,6 +1429,13 @@ if (jbd2_journal_recover(journal)) goto recovery_error; + if (journal->j_failed_commit) { + printk(KERN_ERR "JBD2: journal transaction %u on %s " + "is corrupt.\n", journal->j_failed_commit, + journal->j_devname); + return -EIO; + } + /* OK, we've finished with the dynamic journal bits: * reinitialise the dynamic contents of the superblock in memory * and reset them on disk. */ --- linux-fsl-imx51-2.6.31.orig/fs/jbd2/commit.c +++ linux-fsl-imx51-2.6.31/fs/jbd2/commit.c @@ -636,6 +636,10 @@ JBUFFER_TRACE(jh, "ph3: write metadata"); flags = jbd2_journal_write_metadata_buffer(commit_transaction, jh, &new_jh, blocknr); + if (flags < 0) { + jbd2_journal_abort(journal, flags); + continue; + } set_bit(BH_JWrite, &jh2bh(new_jh)->b_state); wbuf[bufs++] = jh2bh(new_jh); --- linux-fsl-imx51-2.6.31.orig/fs/jbd2/transaction.c +++ linux-fsl-imx51-2.6.31/fs/jbd2/transaction.c @@ -57,7 +57,7 @@ INIT_LIST_HEAD(&transaction->t_private_list); /* Set up the commit timer for the new transaction. */ - journal->j_commit_timer.expires = round_jiffies(transaction->t_expires); + journal->j_commit_timer.expires = round_jiffies_up(transaction->t_expires); add_timer(&journal->j_commit_timer); J_ASSERT(journal->j_running_transaction == NULL); @@ -238,6 +238,8 @@ __jbd2_log_space_left(journal)); spin_unlock(&transaction->t_handle_lock); spin_unlock(&journal->j_state_lock); + + lock_map_acquire(&handle->h_lockdep_map); out: if (unlikely(new_transaction)) /* It's usually NULL */ kfree(new_transaction); @@ -303,8 +305,6 @@ handle = ERR_PTR(err); goto out; } - - lock_map_acquire(&handle->h_lockdep_map); out: return handle; } @@ -426,6 +426,7 @@ __jbd2_log_start_commit(journal, transaction->t_tid); spin_unlock(&journal->j_state_lock); + lock_map_release(&handle->h_lockdep_map); handle->h_buffer_credits = nblocks; ret = start_this_handle(journal, handle); return ret; --- linux-fsl-imx51-2.6.31.orig/fs/jfs/xattr.c +++ linux-fsl-imx51-2.6.31/fs/jfs/xattr.c @@ -85,46 +85,25 @@ #define EA_MALLOC 0x0008 +static int is_known_namespace(const char *name) +{ + if (strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN) && + strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) && + strncmp(name, XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) && + strncmp(name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN)) + return false; + + return true; +} + /* * These three routines are used to recognize on-disk extended attributes * that are in a recognized namespace. If the attribute is not recognized, * "os2." is prepended to the name */ -static inline int is_os2_xattr(struct jfs_ea *ea) +static int is_os2_xattr(struct jfs_ea *ea) { - /* - * Check for "system." - */ - if ((ea->namelen >= XATTR_SYSTEM_PREFIX_LEN) && - !strncmp(ea->name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN)) - return false; - /* - * Check for "user." - */ - if ((ea->namelen >= XATTR_USER_PREFIX_LEN) && - !strncmp(ea->name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN)) - return false; - /* - * Check for "security." - */ - if ((ea->namelen >= XATTR_SECURITY_PREFIX_LEN) && - !strncmp(ea->name, XATTR_SECURITY_PREFIX, - XATTR_SECURITY_PREFIX_LEN)) - return false; - /* - * Check for "trusted." - */ - if ((ea->namelen >= XATTR_TRUSTED_PREFIX_LEN) && - !strncmp(ea->name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN)) - return false; - /* - * Add any other valid namespace prefixes here - */ - - /* - * We assume it's OS/2's flat namespace - */ - return true; + return !is_known_namespace(ea->name); } static inline int name_size(struct jfs_ea *ea) @@ -762,13 +741,23 @@ if (!strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN)) return can_set_system_xattr(inode, name, value, value_len); + if (!strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN)) { + /* + * This makes sure that we aren't trying to set an + * attribute in a different namespace by prefixing it + * with "os2." + */ + if (is_known_namespace(name + XATTR_OS2_PREFIX_LEN)) + return -EOPNOTSUPP; + return 0; + } + /* * Don't allow setting an attribute in an unknown namespace. */ if (strncmp(name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN) && strncmp(name, XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) && - strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) && - strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN)) + strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN)) return -EOPNOTSUPP; return 0; @@ -950,19 +939,8 @@ int xattr_size; ssize_t size; int namelen = strlen(name); - char *os2name = NULL; char *value; - if (strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN) == 0) { - os2name = kmalloc(namelen - XATTR_OS2_PREFIX_LEN + 1, - GFP_KERNEL); - if (!os2name) - return -ENOMEM; - strcpy(os2name, name + XATTR_OS2_PREFIX_LEN); - name = os2name; - namelen -= XATTR_OS2_PREFIX_LEN; - } - down_read(&JFS_IP(inode)->xattr_sem); xattr_size = ea_get(inode, &ea_buf, 0); @@ -1000,8 +978,6 @@ out: up_read(&JFS_IP(inode)->xattr_sem); - kfree(os2name); - return size; } @@ -1010,6 +986,19 @@ { int err; + if (strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN) == 0) { + /* + * skip past "os2." prefix + */ + name += XATTR_OS2_PREFIX_LEN; + /* + * Don't allow retrieving properly prefixed attributes + * by prepending them with "os2." + */ + if (is_known_namespace(name)) + return -EOPNOTSUPP; + } + err = __jfs_getxattr(dentry->d_inode, name, data, buf_size); return err; --- linux-fsl-imx51-2.6.31.orig/fs/debugfs/inode.c +++ linux-fsl-imx51-2.6.31/fs/debugfs/inode.c @@ -32,7 +32,9 @@ static int debugfs_mount_count; static bool debugfs_registered; -static struct inode *debugfs_get_inode(struct super_block *sb, int mode, dev_t dev) +static struct inode *debugfs_get_inode(struct super_block *sb, int mode, dev_t dev, + void *data, const struct file_operations *fops) + { struct inode *inode = new_inode(sb); @@ -44,14 +46,18 @@ init_special_inode(inode, mode, dev); break; case S_IFREG: - inode->i_fop = &debugfs_file_operations; + inode->i_fop = fops ? fops : &debugfs_file_operations; + inode->i_private = data; break; case S_IFLNK: inode->i_op = &debugfs_link_operations; + inode->i_fop = fops; + inode->i_private = data; break; case S_IFDIR: inode->i_op = &simple_dir_inode_operations; - inode->i_fop = &simple_dir_operations; + inode->i_fop = fops ? fops : &simple_dir_operations; + inode->i_private = data; /* directory inodes start off with i_nlink == 2 * (for "." entry) */ @@ -64,7 +70,8 @@ /* SMP-safe */ static int debugfs_mknod(struct inode *dir, struct dentry *dentry, - int mode, dev_t dev) + int mode, dev_t dev, void *data, + const struct file_operations *fops) { struct inode *inode; int error = -EPERM; @@ -72,7 +79,7 @@ if (dentry->d_inode) return -EEXIST; - inode = debugfs_get_inode(dir->i_sb, mode, dev); + inode = debugfs_get_inode(dir->i_sb, mode, dev, data, fops); if (inode) { d_instantiate(dentry, inode); dget(dentry); @@ -81,12 +88,13 @@ return error; } -static int debugfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) +static int debugfs_mkdir(struct inode *dir, struct dentry *dentry, int mode, + void *data, const struct file_operations *fops) { int res; mode = (mode & (S_IRWXUGO | S_ISVTX)) | S_IFDIR; - res = debugfs_mknod(dir, dentry, mode, 0); + res = debugfs_mknod(dir, dentry, mode, 0, data, fops); if (!res) { inc_nlink(dir); fsnotify_mkdir(dir, dentry); @@ -94,18 +102,20 @@ return res; } -static int debugfs_link(struct inode *dir, struct dentry *dentry, int mode) +static int debugfs_link(struct inode *dir, struct dentry *dentry, int mode, + void *data, const struct file_operations *fops) { mode = (mode & S_IALLUGO) | S_IFLNK; - return debugfs_mknod(dir, dentry, mode, 0); + return debugfs_mknod(dir, dentry, mode, 0, data, fops); } -static int debugfs_create(struct inode *dir, struct dentry *dentry, int mode) +static int debugfs_create(struct inode *dir, struct dentry *dentry, int mode, + void *data, const struct file_operations *fops) { int res; mode = (mode & S_IALLUGO) | S_IFREG; - res = debugfs_mknod(dir, dentry, mode, 0); + res = debugfs_mknod(dir, dentry, mode, 0, data, fops); if (!res) fsnotify_create(dir, dentry); return res; @@ -139,7 +149,9 @@ static int debugfs_create_by_name(const char *name, mode_t mode, struct dentry *parent, - struct dentry **dentry) + struct dentry **dentry, + void *data, + const struct file_operations *fops) { int error = 0; @@ -164,13 +176,16 @@ if (!IS_ERR(*dentry)) { switch (mode & S_IFMT) { case S_IFDIR: - error = debugfs_mkdir(parent->d_inode, *dentry, mode); + error = debugfs_mkdir(parent->d_inode, *dentry, mode, + data, fops); break; case S_IFLNK: - error = debugfs_link(parent->d_inode, *dentry, mode); + error = debugfs_link(parent->d_inode, *dentry, mode, + data, fops); break; default: - error = debugfs_create(parent->d_inode, *dentry, mode); + error = debugfs_create(parent->d_inode, *dentry, mode, + data, fops); break; } dput(*dentry); @@ -221,19 +236,13 @@ if (error) goto exit; - error = debugfs_create_by_name(name, mode, parent, &dentry); + error = debugfs_create_by_name(name, mode, parent, &dentry, + data, fops); if (error) { dentry = NULL; simple_release_fs(&debugfs_mount, &debugfs_mount_count); goto exit; } - - if (dentry->d_inode) { - if (data) - dentry->d_inode->i_private = data; - if (fops) - dentry->d_inode->i_fop = fops; - } exit: return dentry; } --- linux-fsl-imx51-2.6.31.orig/fs/nfs/client.c +++ linux-fsl-imx51-2.6.31/fs/nfs/client.c @@ -1171,7 +1171,7 @@ 1, flags & NFS_MOUNT_NORESVPORT); if (error < 0) goto error; - memcpy(clp->cl_ipaddr, ip_addr, sizeof(clp->cl_ipaddr)); + strlcpy(clp->cl_ipaddr, ip_addr, sizeof(clp->cl_ipaddr)); error = nfs_idmap_new(clp); if (error < 0) { --- linux-fsl-imx51-2.6.31.orig/fs/nfs/nfs4proc.c +++ linux-fsl-imx51-2.6.31/fs/nfs/nfs4proc.c @@ -71,12 +71,17 @@ /* Prevent leaks of NFSv4 errors into userland */ static int nfs4_map_errors(int err) { - if (err < -1000) { + if (err >= -1000) + return err; + switch (err) { + case -NFS4ERR_RESOURCE: + return -EREMOTEIO; + default: dprintk("%s could not handle NFSv4 error %d\n", __func__, -err); - return -EIO; + break; } - return err; + return -EIO; } /* @@ -2735,7 +2740,7 @@ .pages = &page, .pgbase = 0, .count = count, - .bitmask = NFS_SERVER(dentry->d_inode)->cache_consistency_bitmask, + .bitmask = NFS_SERVER(dentry->d_inode)->attr_bitmask, }; struct nfs4_readdir_res res; struct rpc_message msg = { @@ -3033,9 +3038,6 @@ if (time_before(clp->cl_last_renewal,timestamp)) clp->cl_last_renewal = timestamp; spin_unlock(&clp->cl_lock); - dprintk("%s calling put_rpccred on rpc_cred %p\n", __func__, - task->tk_msg.rpc_cred); - put_rpccred(task->tk_msg.rpc_cred); } static const struct rpc_call_ops nfs4_renew_ops = { @@ -3100,6 +3102,35 @@ } } +static int buf_to_pages_noslab(const void *buf, size_t buflen, + struct page **pages, unsigned int *pgbase) +{ + struct page *newpage, **spages; + int rc = 0; + size_t len; + spages = pages; + + do { + len = min(PAGE_CACHE_SIZE, buflen); + newpage = alloc_page(GFP_KERNEL); + + if (newpage == NULL) + goto unwind; + memcpy(page_address(newpage), buf, len); + buf += len; + buflen -= len; + *pages++ = newpage; + rc++; + } while (buflen != 0); + + return rc; + +unwind: + for(; rc > 0; rc--) + __free_page(spages[rc-1]); + return -ENOMEM; +} + struct nfs4_cached_acl { int cached; size_t len; @@ -3266,13 +3297,23 @@ .rpc_argp = &arg, .rpc_resp = &res, }; - int ret; + int ret, i; if (!nfs4_server_supports_acls(server)) return -EOPNOTSUPP; + i = buf_to_pages_noslab(buf, buflen, arg.acl_pages, &arg.acl_pgbase); + if (i < 0) + return i; nfs_inode_return_delegation(inode); - buf_to_pages(buf, buflen, arg.acl_pages, &arg.acl_pgbase); ret = nfs4_call_sync(server, &msg, &arg, &res, 1); + + /* + * Free each page after tx, so the only ref left is + * held by the network stack + */ + for (; i > 0; i--) + put_page(pages[i-1]); + nfs_access_zap_cache(inode); nfs_zap_acl_cache(inode); return ret; @@ -4850,7 +4891,6 @@ nfs41_sequence_free_slot(clp, task->tk_msg.rpc_resp); dprintk("%s rpc_cred %p\n", __func__, task->tk_msg.rpc_cred); - put_rpccred(task->tk_msg.rpc_cred); kfree(task->tk_msg.rpc_argp); kfree(task->tk_msg.rpc_resp); --- linux-fsl-imx51-2.6.31.orig/fs/nfs/pagelist.c +++ linux-fsl-imx51-2.6.31/fs/nfs/pagelist.c @@ -176,6 +176,12 @@ kref_put(&req->wb_kref, nfs_free_request); } +static int nfs_wait_bit_uninterruptible(void *word) +{ + io_schedule(); + return 0; +} + /** * nfs_wait_on_request - Wait for a request to complete. * @req: request to wait upon. @@ -186,14 +192,9 @@ int nfs_wait_on_request(struct nfs_page *req) { - int ret = 0; - - if (!test_bit(PG_BUSY, &req->wb_flags)) - goto out; - ret = out_of_line_wait_on_bit(&req->wb_flags, PG_BUSY, - nfs_wait_bit_killable, TASK_KILLABLE); -out: - return ret; + return wait_on_bit(&req->wb_flags, PG_BUSY, + nfs_wait_bit_uninterruptible, + TASK_UNINTERRUPTIBLE); } /** --- linux-fsl-imx51-2.6.31.orig/fs/nfs/nfs4xdr.c +++ linux-fsl-imx51-2.6.31/fs/nfs/nfs4xdr.c @@ -5406,7 +5406,6 @@ { NFS4ERR_SERVERFAULT, -ESERVERFAULT }, { NFS4ERR_BADTYPE, -EBADTYPE }, { NFS4ERR_LOCKED, -EAGAIN }, - { NFS4ERR_RESOURCE, -EREMOTEIO }, { NFS4ERR_SYMLINK, -ELOOP }, { NFS4ERR_OP_ILLEGAL, -EOPNOTSUPP }, { NFS4ERR_DEADLOCK, -EDEADLK }, --- linux-fsl-imx51-2.6.31.orig/fs/nfs/super.c +++ linux-fsl-imx51-2.6.31/fs/nfs/super.c @@ -1323,6 +1323,7 @@ default: dfprintk(MOUNT, "NFS: unrecognized " "transport protocol\n"); + kfree(string); return 0; } break; @@ -2669,7 +2670,6 @@ dprintk("--> %s\n", __func__); nfs_super_return_all_delegations(sb); kill_anon_super(sb); - nfs4_renewd_prepare_shutdown(server); nfs_fscache_release_super_cookie(sb); nfs_free_server(server); dprintk("<-- %s\n", __func__); --- linux-fsl-imx51-2.6.31.orig/fs/nfs/dir.c +++ linux-fsl-imx51-2.6.31/fs/nfs/dir.c @@ -1536,6 +1536,8 @@ old_dentry->d_parent->d_name.name, old_dentry->d_name.name, dentry->d_parent->d_name.name, dentry->d_name.name); + nfs_inode_return_delegation(inode); + d_drop(dentry); error = NFS_PROTO(dir)->link(inode, dir, &dentry->d_name); if (error == 0) { --- linux-fsl-imx51-2.6.31.orig/fs/nfs/direct.c +++ linux-fsl-imx51-2.6.31/fs/nfs/direct.c @@ -457,6 +457,7 @@ }; struct rpc_task_setup task_setup_data = { .rpc_client = NFS_CLIENT(inode), + .rpc_message = &msg, .callback_ops = &nfs_write_direct_ops, .workqueue = nfsiod_workqueue, .flags = RPC_TASK_ASYNC, --- linux-fsl-imx51-2.6.31.orig/fs/nfs/nfs4renewd.c +++ linux-fsl-imx51-2.6.31/fs/nfs/nfs4renewd.c @@ -127,12 +127,6 @@ } void -nfs4_renewd_prepare_shutdown(struct nfs_server *server) -{ - cancel_delayed_work(&server->nfs_client->cl_renewd); -} - -void nfs4_kill_renewd(struct nfs_client *clp) { cancel_delayed_work_sync(&clp->cl_renewd); --- linux-fsl-imx51-2.6.31.orig/fs/befs/linuxvfs.c +++ linux-fsl-imx51-2.6.31/fs/befs/linuxvfs.c @@ -469,17 +469,22 @@ befs_data_stream *data = &befs_ino->i_data.ds; befs_off_t len = data->size; - befs_debug(sb, "Follow long symlink"); - - link = kmalloc(len, GFP_NOFS); - if (!link) { - link = ERR_PTR(-ENOMEM); - } else if (befs_read_lsymlink(sb, data, link, len) != len) { - kfree(link); - befs_error(sb, "Failed to read entire long symlink"); + if (len == 0) { + befs_error(sb, "Long symlink with illegal length"); link = ERR_PTR(-EIO); } else { - link[len - 1] = '\0'; + befs_debug(sb, "Follow long symlink"); + + link = kmalloc(len, GFP_NOFS); + if (!link) { + link = ERR_PTR(-ENOMEM); + } else if (befs_read_lsymlink(sb, data, link, len) != len) { + kfree(link); + befs_error(sb, "Failed to read entire long symlink"); + link = ERR_PTR(-EIO); + } else { + link[len - 1] = '\0'; + } } } else { link = befs_ino->i_data.symlink; --- linux-fsl-imx51-2.6.31.orig/fs/jbd/journal.c +++ linux-fsl-imx51-2.6.31/fs/jbd/journal.c @@ -1057,6 +1057,14 @@ goto out; } + if (be32_to_cpu(sb->s_first) == 0 || + be32_to_cpu(sb->s_first) >= journal->j_maxlen) { + printk(KERN_WARNING + "JBD: Invalid start block of journal: %u\n", + be32_to_cpu(sb->s_first)); + goto out; + } + return 0; out: --- linux-fsl-imx51-2.6.31.orig/fs/jffs2/read.c +++ linux-fsl-imx51-2.6.31/fs/jffs2/read.c @@ -164,12 +164,15 @@ /* XXX FIXME: Where a single physical node actually shows up in two frags, we read it twice. Don't do that. */ - /* Now we're pointing at the first frag which overlaps our page */ + /* Now we're pointing at the first frag which overlaps our page + * (or perhaps is before it, if we've been asked to read off the + * end of the file). */ while(offset < end) { D2(printk(KERN_DEBUG "jffs2_read_inode_range: offset %d, end %d\n", offset, end)); - if (unlikely(!frag || frag->ofs > offset)) { + if (unlikely(!frag || frag->ofs > offset || + frag->ofs + frag->size <= offset)) { uint32_t holesize = end - offset; - if (frag) { + if (frag && frag->ofs > offset) { D1(printk(KERN_NOTICE "Eep. Hole in ino #%u fraglist. frag->ofs = 0x%08x, offset = 0x%08x\n", f->inocache->ino, frag->ofs, offset)); holesize = min(holesize, frag->ofs - offset); } --- linux-fsl-imx51-2.6.31.orig/fs/jffs2/gc.c +++ linux-fsl-imx51-2.6.31/fs/jffs2/gc.c @@ -700,7 +700,8 @@ struct jffs2_raw_inode ri; struct jffs2_node_frag *last_frag; union jffs2_device_node dev; - char *mdata = NULL, mdatalen = 0; + char *mdata = NULL; + int mdatalen = 0; uint32_t alloclen, ilen; int ret; --- linux-fsl-imx51-2.6.31.orig/fs/jffs2/fs.c +++ linux-fsl-imx51-2.6.31/fs/jffs2/fs.c @@ -668,7 +668,9 @@ static int jffs2_flash_setup(struct jffs2_sb_info *c) { int ret = 0; - if (jffs2_cleanmarker_oob(c)) { + if (c->mtd->type == MTD_NANDFLASH) { + if (!(c->mtd->flags & MTD_OOB_WRITEABLE)) + printk(KERN_INFO "JFFS2 doesn't use OOB.\n"); /* NAND flash... do setup accordingly */ ret = jffs2_nand_flash_setup(c); if (ret) @@ -701,7 +703,7 @@ void jffs2_flash_cleanup(struct jffs2_sb_info *c) { - if (jffs2_cleanmarker_oob(c)) { + if (c->mtd->type == MTD_NANDFLASH) { jffs2_nand_flash_cleanup(c); } --- linux-fsl-imx51-2.6.31.orig/fs/jffs2/scan.c +++ linux-fsl-imx51-2.6.31/fs/jffs2/scan.c @@ -112,7 +112,7 @@ if (!flashbuf) { /* For NAND it's quicker to read a whole eraseblock at a time, apparently */ - if (jffs2_cleanmarker_oob(c)) + if (c->mtd->type == MTD_NANDFLASH) buf_size = c->sector_size; else buf_size = PAGE_SIZE; @@ -449,22 +449,24 @@ D1(printk(KERN_DEBUG "jffs2_scan_eraseblock(): Scanning block at 0x%x\n", ofs)); #ifdef CONFIG_JFFS2_FS_WRITEBUFFER - if (jffs2_cleanmarker_oob(c)) { + if (c->mtd->type == MTD_NANDFLASH) { int ret; if (c->mtd->block_isbad(c->mtd, jeb->offset)) return BLK_STATE_BADBLOCK; - ret = jffs2_check_nand_cleanmarker(c, jeb); - D2(printk(KERN_NOTICE "jffs_check_nand_cleanmarker returned %d\n",ret)); - - /* Even if it's not found, we still scan to see - if the block is empty. We use this information - to decide whether to erase it or not. */ - switch (ret) { - case 0: cleanmarkerfound = 1; break; - case 1: break; - default: return ret; + if (jffs2_cleanmarker_oob(c)) { + ret = jffs2_check_nand_cleanmarker(c, jeb); + D2(printk(KERN_NOTICE "jffs_check_nand_cleanmarker returned %d\n", ret)); + + /* Even if it's not found, we still scan to see + if the block is empty. We use this information + to decide whether to erase it or not. */ + switch (ret) { + case 0: cleanmarkerfound = 1; break; + case 1: break; + default: return ret; + } } } #endif --- linux-fsl-imx51-2.6.31.orig/fs/jffs2/os-linux.h +++ linux-fsl-imx51-2.6.31/fs/jffs2/os-linux.h @@ -106,7 +106,7 @@ #define jffs2_can_mark_obsolete(c) (c->mtd->flags & (MTD_BIT_WRITEABLE)) #endif -#define jffs2_cleanmarker_oob(c) (c->mtd->type == MTD_NANDFLASH) +#define jffs2_cleanmarker_oob(c) (c->mtd->type == MTD_NANDFLASH && (c->mtd->flags & MTD_OOB_WRITEABLE)) #define jffs2_flash_write_oob(c, ofs, len, retlen, buf) ((c)->mtd->write_oob((c)->mtd, ofs, len, retlen, buf)) #define jffs2_flash_read_oob(c, ofs, len, retlen, buf) ((c)->mtd->read_oob((c)->mtd, ofs, len, retlen, buf)) --- linux-fsl-imx51-2.6.31.orig/fs/notify/inode_mark.c +++ linux-fsl-imx51-2.6.31/fs/notify/inode_mark.c @@ -324,11 +324,11 @@ spin_lock(&group->mark_lock); spin_lock(&inode->i_lock); - entry->group = group; - entry->inode = inode; - lentry = fsnotify_find_mark_entry(group, inode); if (!lentry) { + entry->group = group; + entry->inode = inode; + hlist_add_head(&entry->i_list, &inode->i_fsnotify_mark_entries); list_add(&entry->g_list, &group->mark_entries); --- linux-fsl-imx51-2.6.31.orig/fs/notify/inotify/inotify_user.c +++ linux-fsl-imx51-2.6.31/fs/notify/inotify/inotify_user.c @@ -558,7 +558,7 @@ spin_lock(&group->inotify_data.idr_lock); ret = idr_get_new_above(&group->inotify_data.idr, &tmp_ientry->fsn_entry, - group->inotify_data.last_wd, + group->inotify_data.last_wd+1, &tmp_ientry->wd); spin_unlock(&group->inotify_data.idr_lock); if (ret) { @@ -638,7 +638,7 @@ spin_lock_init(&group->inotify_data.idr_lock); idr_init(&group->inotify_data.idr); - group->inotify_data.last_wd = 1; + group->inotify_data.last_wd = 0; group->inotify_data.user = user; group->inotify_data.fa = NULL; --- linux-fsl-imx51-2.6.31.orig/fs/ext4/ioctl.c +++ linux-fsl-imx51-2.6.31/fs/ext4/ioctl.c @@ -221,32 +221,38 @@ struct file *donor_filp; int err; + if (!(filp->f_mode & FMODE_READ) || + !(filp->f_mode & FMODE_WRITE)) + return -EBADF; + if (copy_from_user(&me, (struct move_extent __user *)arg, sizeof(me))) return -EFAULT; + me.moved_len = 0; donor_filp = fget(me.donor_fd); if (!donor_filp) return -EBADF; - if (!capable(CAP_DAC_OVERRIDE)) { - if ((current->real_cred->fsuid != inode->i_uid) || - !(inode->i_mode & S_IRUSR) || - !(donor_filp->f_dentry->d_inode->i_mode & - S_IRUSR)) { - fput(donor_filp); - return -EACCES; - } + if (!(donor_filp->f_mode & FMODE_WRITE)) { + err = -EBADF; + goto mext_out; } + err = mnt_want_write(filp->f_path.mnt); + if (err) + goto mext_out; + err = ext4_move_extents(filp, donor_filp, me.orig_start, me.donor_start, me.len, &me.moved_len); + mnt_drop_write(filp->f_path.mnt); + if (me.moved_len > 0) + file_remove_suid(donor_filp); + + if (copy_to_user((struct move_extent *)arg, &me, sizeof(me))) + err = -EFAULT; +mext_out: fput(donor_filp); - - if (!err) - if (copy_to_user((struct move_extent *)arg, - &me, sizeof(me))) - return -EFAULT; return err; } --- linux-fsl-imx51-2.6.31.orig/fs/ext4/mballoc.h +++ linux-fsl-imx51-2.6.31/fs/ext4/mballoc.h @@ -246,8 +246,6 @@ } #endif -#define in_range(b, first, len) ((b) >= (first) && (b) <= (first) + (len) - 1) - static inline ext4_fsblk_t ext4_grp_offs_to_block(struct super_block *sb, struct ext4_free_extent *fex) { --- linux-fsl-imx51-2.6.31.orig/fs/ext4/ext4_jbd2.h +++ linux-fsl-imx51-2.6.31/fs/ext4/ext4_jbd2.h @@ -49,7 +49,7 @@ #define EXT4_DATA_TRANS_BLOCKS(sb) (EXT4_SINGLEDATA_TRANS_BLOCKS(sb) + \ EXT4_XATTR_TRANS_BLOCKS - 2 + \ - 2*EXT4_QUOTA_TRANS_BLOCKS(sb)) + EXT4_MAXQUOTAS_TRANS_BLOCKS(sb)) /* * Define the number of metadata blocks we need to account to modify data. @@ -57,7 +57,7 @@ * This include super block, inode block, quota blocks and xattr blocks */ #define EXT4_META_TRANS_BLOCKS(sb) (EXT4_XATTR_TRANS_BLOCKS + \ - 2*EXT4_QUOTA_TRANS_BLOCKS(sb)) + EXT4_MAXQUOTAS_TRANS_BLOCKS(sb)) /* Delete operations potentially hit one directory's namespace plus an * entire inode, plus arbitrary amounts of bitmap/indirection data. Be @@ -92,6 +92,7 @@ * but inode, sb and group updates are done only once */ #define EXT4_QUOTA_INIT_BLOCKS(sb) (test_opt(sb, QUOTA) ? (DQUOT_INIT_ALLOC*\ (EXT4_SINGLEDATA_TRANS_BLOCKS(sb)-3)+3+DQUOT_INIT_REWRITE) : 0) + #define EXT4_QUOTA_DEL_BLOCKS(sb) (test_opt(sb, QUOTA) ? (DQUOT_DEL_ALLOC*\ (EXT4_SINGLEDATA_TRANS_BLOCKS(sb)-3)+3+DQUOT_DEL_REWRITE) : 0) #else @@ -99,6 +100,9 @@ #define EXT4_QUOTA_INIT_BLOCKS(sb) 0 #define EXT4_QUOTA_DEL_BLOCKS(sb) 0 #endif +#define EXT4_MAXQUOTAS_TRANS_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_TRANS_BLOCKS(sb)) +#define EXT4_MAXQUOTAS_INIT_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_INIT_BLOCKS(sb)) +#define EXT4_MAXQUOTAS_DEL_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_DEL_BLOCKS(sb)) int ext4_mark_iloc_dirty(handle_t *handle, @@ -161,11 +165,13 @@ handle_t *ext4_journal_start_sb(struct super_block *sb, int nblocks); int __ext4_journal_stop(const char *where, handle_t *handle); -#define EXT4_NOJOURNAL_HANDLE ((handle_t *) 0x1) +#define EXT4_NOJOURNAL_MAX_REF_COUNT ((unsigned long) 4096) +/* Note: Do not use this for NULL handles. This is only to determine if + * a properly allocated handle is using a journal or not. */ static inline int ext4_handle_valid(handle_t *handle) { - if (handle == EXT4_NOJOURNAL_HANDLE) + if ((unsigned long)handle < EXT4_NOJOURNAL_MAX_REF_COUNT) return 0; return 1; } @@ -252,6 +258,19 @@ return 0; } +static inline void ext4_update_inode_fsync_trans(handle_t *handle, + struct inode *inode, + int datasync) +{ + struct ext4_inode_info *ei = EXT4_I(inode); + + if (ext4_handle_valid(handle)) { + ei->i_sync_tid = handle->h_transaction->t_tid; + if (datasync) + ei->i_datasync_tid = handle->h_transaction->t_tid; + } +} + /* super.c */ int ext4_force_commit(struct super_block *sb); --- linux-fsl-imx51-2.6.31.orig/fs/ext4/balloc.c +++ linux-fsl-imx51-2.6.31/fs/ext4/balloc.c @@ -189,9 +189,6 @@ * when a file system is mounted (see ext4_fill_super). */ - -#define in_range(b, first, len) ((b) >= (first) && (b) <= (first) + (len) - 1) - /** * ext4_get_group_desc() -- load group descriptor from disk * @sb: super block @@ -761,7 +758,13 @@ static unsigned long ext4_bg_num_gdb_nometa(struct super_block *sb, ext4_group_t group) { - return ext4_bg_has_super(sb, group) ? EXT4_SB(sb)->s_gdb_count : 0; + if (!ext4_bg_has_super(sb, group)) + return 0; + + if (EXT4_HAS_INCOMPAT_FEATURE(sb,EXT4_FEATURE_INCOMPAT_META_BG)) + return le32_to_cpu(EXT4_SB(sb)->s_es->s_first_meta_bg); + else + return EXT4_SB(sb)->s_gdb_count; } /** --- linux-fsl-imx51-2.6.31.orig/fs/ext4/extents.c +++ linux-fsl-imx51-2.6.31/fs/ext4/extents.c @@ -93,7 +93,9 @@ ix->ei_leaf_hi = cpu_to_le16((unsigned long) ((pb >> 31) >> 1) & 0xffff); } -static int ext4_ext_journal_restart(handle_t *handle, int needed) +static int ext4_ext_truncate_extend_restart(handle_t *handle, + struct inode *inode, + int needed) { int err; @@ -104,7 +106,14 @@ err = ext4_journal_extend(handle, needed); if (err <= 0) return err; - return ext4_journal_restart(handle, needed); + err = ext4_truncate_restart_trans(handle, inode, needed); + /* + * We have dropped i_data_sem so someone might have cached again + * an extent we are going to truncate. + */ + ext4_ext_invalidate_cache(inode); + + return err; } /* @@ -701,7 +710,7 @@ * insert new index [@logical;@ptr] into the block at @curp; * check where to insert: before @curp or after @curp */ -static int ext4_ext_insert_index(handle_t *handle, struct inode *inode, +int ext4_ext_insert_index(handle_t *handle, struct inode *inode, struct ext4_ext_path *curp, int logical, ext4_fsblk_t ptr) { @@ -1294,7 +1303,7 @@ /* * ext4_ext_next_allocated_block: - * returns allocated block in subsequent extent or EXT_MAX_BLOCK. + * returns allocated block in subsequent extent or EXT_MAX_BLOCKS. * NOTE: it considers block number from index entry as * allocated block. Thus, index entries have to be consistent * with leaves. @@ -1308,7 +1317,7 @@ depth = path->p_depth; if (depth == 0 && path->p_ext == NULL) - return EXT_MAX_BLOCK; + return EXT_MAX_BLOCKS; while (depth >= 0) { if (depth == path->p_depth) { @@ -1325,12 +1334,12 @@ depth--; } - return EXT_MAX_BLOCK; + return EXT_MAX_BLOCKS; } /* * ext4_ext_next_leaf_block: - * returns first allocated block from next leaf or EXT_MAX_BLOCK + * returns first allocated block from next leaf or EXT_MAX_BLOCKS */ static ext4_lblk_t ext4_ext_next_leaf_block(struct inode *inode, struct ext4_ext_path *path) @@ -1342,7 +1351,7 @@ /* zero-tree has no leaf blocks at all */ if (depth == 0) - return EXT_MAX_BLOCK; + return EXT_MAX_BLOCKS; /* go to index block */ depth--; @@ -1355,7 +1364,7 @@ depth--; } - return EXT_MAX_BLOCK; + return EXT_MAX_BLOCKS; } /* @@ -1535,13 +1544,13 @@ */ if (b2 < b1) { b2 = ext4_ext_next_allocated_block(path); - if (b2 == EXT_MAX_BLOCK) + if (b2 == EXT_MAX_BLOCKS) goto out; } /* check for wrap through zero on extent logical start block*/ if (b1 + len1 < b1) { - len1 = EXT_MAX_BLOCK - b1; + len1 = EXT_MAX_BLOCKS - b1; newext->ee_len = cpu_to_le16(len1); ret = 1; } @@ -1563,7 +1572,7 @@ */ int ext4_ext_insert_extent(handle_t *handle, struct inode *inode, struct ext4_ext_path *path, - struct ext4_extent *newext) + struct ext4_extent *newext, int flag) { struct ext4_extent_header *eh; struct ext4_extent *ex, *fex; @@ -1579,7 +1588,8 @@ BUG_ON(path[depth].p_hdr == NULL); /* try to insert block into found extent and return */ - if (ex && ext4_can_extents_be_merged(inode, ex, newext)) { + if (ex && (flag != EXT4_GET_BLOCKS_DIO_CREATE_EXT) + && ext4_can_extents_be_merged(inode, ex, newext)) { ext_debug("append %d block to %d:%d (from %llu)\n", ext4_ext_get_actual_len(newext), le32_to_cpu(ex->ee_block), @@ -1614,7 +1624,7 @@ fex = EXT_LAST_EXTENT(eh); next = ext4_ext_next_leaf_block(inode, path); if (le32_to_cpu(newext->ee_block) > le32_to_cpu(fex->ee_block) - && next != EXT_MAX_BLOCK) { + && next != EXT_MAX_BLOCKS) { ext_debug("next leaf block - %d\n", next); BUG_ON(npath != NULL); npath = ext4_ext_find_extent(inode, next, NULL); @@ -1694,7 +1704,8 @@ merge: /* try to merge extents to the right */ - ext4_ext_try_to_merge(inode, path, nearex); + if (flag != EXT4_GET_BLOCKS_DIO_CREATE_EXT) + ext4_ext_try_to_merge(inode, path, nearex); /* try to merge extents to the left */ @@ -1728,10 +1739,12 @@ BUG_ON(func == NULL); BUG_ON(inode == NULL); - while (block < last && block != EXT_MAX_BLOCK) { + while (block < last && block != EXT_MAX_BLOCKS) { num = last - block; /* find extent for this block */ + down_read(&EXT4_I(inode)->i_data_sem); path = ext4_ext_find_extent(inode, block, path); + up_read(&EXT4_I(inode)->i_data_sem); if (IS_ERR(path)) { err = PTR_ERR(path); path = NULL; @@ -1854,7 +1867,7 @@ if (ex == NULL) { /* there is no extent yet, so gap is [0;-] */ lblock = 0; - len = EXT_MAX_BLOCK; + len = EXT_MAX_BLOCKS; ext_debug("cache gap(whole file):"); } else if (block < le32_to_cpu(ex->ee_block)) { lblock = block; @@ -1904,7 +1917,7 @@ BUG_ON(cex->ec_type != EXT4_EXT_CACHE_GAP && cex->ec_type != EXT4_EXT_CACHE_EXTENT); - if (block >= cex->ec_block && block < cex->ec_block + cex->ec_len) { + if (in_range(block, cex->ec_block, cex->ec_len)) { ex->ee_block = cpu_to_le32(cex->ec_block); ext4_ext_store_pblock(ex, cex->ec_start); ex->ee_len = cpu_to_le16(cex->ec_len); @@ -2044,7 +2057,7 @@ ext_debug("free last %u blocks starting %llu\n", num, start); for (i = 0; i < num; i++) { bh = sb_find_get_block(inode->i_sb, start + i); - ext4_forget(handle, 0, inode, bh, start + i); + ext4_forget(handle, metadata, inode, bh, start + i); } ext4_free_blocks(handle, inode, start, num, metadata); } else if (from == le32_to_cpu(ex->ee_block) @@ -2098,8 +2111,8 @@ path[depth].p_ext = ex; a = ex_ee_block > start ? ex_ee_block : start; - b = ex_ee_block + ex_ee_len - 1 < EXT_MAX_BLOCK ? - ex_ee_block + ex_ee_len - 1 : EXT_MAX_BLOCK; + b = ex_ee_block + ex_ee_len - 1 < EXT_MAX_BLOCKS - 1 ? + ex_ee_block + ex_ee_len - 1 : EXT_MAX_BLOCKS - 1; ext_debug(" border %u:%u\n", a, b); @@ -2136,9 +2149,9 @@ correct_index = 1; credits += (ext_depth(inode)) + 1; } - credits += 2 * EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb); + credits += EXT4_MAXQUOTAS_TRANS_BLOCKS(inode->i_sb); - err = ext4_ext_journal_restart(handle, credits); + err = ext4_ext_truncate_extend_restart(handle, inode, credits); if (err) goto out; @@ -2461,7 +2474,6 @@ } #define EXT4_EXT_ZERO_LEN 7 - /* * This function is called by ext4_ext_get_blocks() if someone tries to write * to an uninitialized extent. It may result in splitting the uninitialized @@ -2554,7 +2566,8 @@ ex3->ee_block = cpu_to_le32(iblock); ext4_ext_store_pblock(ex3, newblock); ex3->ee_len = cpu_to_le16(allocated); - err = ext4_ext_insert_extent(handle, inode, path, ex3); + err = ext4_ext_insert_extent(handle, inode, path, + ex3, 0); if (err == -ENOSPC) { err = ext4_ext_zeroout(inode, &orig_ex); if (err) @@ -2610,7 +2623,7 @@ ext4_ext_store_pblock(ex3, newblock + max_blocks); ex3->ee_len = cpu_to_le16(allocated - max_blocks); ext4_ext_mark_uninitialized(ex3); - err = ext4_ext_insert_extent(handle, inode, path, ex3); + err = ext4_ext_insert_extent(handle, inode, path, ex3, 0); if (err == -ENOSPC) { err = ext4_ext_zeroout(inode, &orig_ex); if (err) @@ -2728,7 +2741,191 @@ err = ext4_ext_dirty(handle, inode, path + depth); goto out; insert: - err = ext4_ext_insert_extent(handle, inode, path, &newex); + err = ext4_ext_insert_extent(handle, inode, path, &newex, 0); + if (err == -ENOSPC) { + err = ext4_ext_zeroout(inode, &orig_ex); + if (err) + goto fix_extent_len; + /* update the extent length and mark as initialized */ + ex->ee_block = orig_ex.ee_block; + ex->ee_len = orig_ex.ee_len; + ext4_ext_store_pblock(ex, ext_pblock(&orig_ex)); + ext4_ext_dirty(handle, inode, path + depth); + /* zero out the first half */ + return allocated; + } else if (err) + goto fix_extent_len; +out: + return err ? err : allocated; + +fix_extent_len: + ex->ee_block = orig_ex.ee_block; + ex->ee_len = orig_ex.ee_len; + ext4_ext_store_pblock(ex, ext_pblock(&orig_ex)); + ext4_ext_mark_uninitialized(ex); + ext4_ext_dirty(handle, inode, path + depth); + return err; +} + +/* + * This function is called by ext4_ext_get_blocks() from + * ext4_get_blocks_dio_write() when DIO to write + * to an uninitialized extent. + * + * Writing to an uninitized extent may result in splitting the uninitialized + * extent into multiple /intialized unintialized extents (up to three) + * There are three possibilities: + * a> There is no split required: Entire extent should be uninitialized + * b> Splits in two extents: Write is happening at either end of the extent + * c> Splits in three extents: Somone is writing in middle of the extent + * + * One of more index blocks maybe needed if the extent tree grow after + * the unintialized extent split. To prevent ENOSPC occur at the IO + * complete, we need to split the uninitialized extent before DIO submit + * the IO. The uninitilized extent called at this time will be split + * into three uninitialized extent(at most). After IO complete, the part + * being filled will be convert to initialized by the end_io callback function + * via ext4_convert_unwritten_extents(). + * + * Returns the size of uninitialized extent to be written on success. + */ +static int ext4_split_unwritten_extents(handle_t *handle, + struct inode *inode, + struct ext4_ext_path *path, + ext4_lblk_t iblock, + unsigned int max_blocks, + int flags) +{ + struct ext4_extent *ex, newex, orig_ex; + struct ext4_extent *ex1 = NULL; + struct ext4_extent *ex2 = NULL; + struct ext4_extent *ex3 = NULL; + struct ext4_extent_header *eh; + ext4_lblk_t ee_block; + unsigned int allocated, ee_len, depth; + ext4_fsblk_t newblock; + int err = 0; + + ext_debug("ext4_split_unwritten_extents: inode %lu," + "iblock %llu, max_blocks %u\n", inode->i_ino, + (unsigned long long)iblock, max_blocks); + depth = ext_depth(inode); + eh = path[depth].p_hdr; + ex = path[depth].p_ext; + ee_block = le32_to_cpu(ex->ee_block); + ee_len = ext4_ext_get_actual_len(ex); + allocated = ee_len - (iblock - ee_block); + newblock = iblock - ee_block + ext_pblock(ex); + ex2 = ex; + orig_ex.ee_block = ex->ee_block; + orig_ex.ee_len = cpu_to_le16(ee_len); + ext4_ext_store_pblock(&orig_ex, ext_pblock(ex)); + + /* + * If the uninitialized extent begins at the same logical + * block where the write begins, and the write completely + * covers the extent, then we don't need to split it. + */ + if ((iblock == ee_block) && (allocated <= max_blocks)) + return allocated; + + err = ext4_ext_get_access(handle, inode, path + depth); + if (err) + goto out; + /* ex1: ee_block to iblock - 1 : uninitialized */ + if (iblock > ee_block) { + ex1 = ex; + ex1->ee_len = cpu_to_le16(iblock - ee_block); + ext4_ext_mark_uninitialized(ex1); + ex2 = &newex; + } + /* + * for sanity, update the length of the ex2 extent before + * we insert ex3, if ex1 is NULL. This is to avoid temporary + * overlap of blocks. + */ + if (!ex1 && allocated > max_blocks) + ex2->ee_len = cpu_to_le16(max_blocks); + /* ex3: to ee_block + ee_len : uninitialised */ + if (allocated > max_blocks) { + unsigned int newdepth; + ex3 = &newex; + ex3->ee_block = cpu_to_le32(iblock + max_blocks); + ext4_ext_store_pblock(ex3, newblock + max_blocks); + ex3->ee_len = cpu_to_le16(allocated - max_blocks); + ext4_ext_mark_uninitialized(ex3); + err = ext4_ext_insert_extent(handle, inode, path, ex3, flags); + if (err == -ENOSPC) { + err = ext4_ext_zeroout(inode, &orig_ex); + if (err) + goto fix_extent_len; + /* update the extent length and mark as initialized */ + ex->ee_block = orig_ex.ee_block; + ex->ee_len = orig_ex.ee_len; + ext4_ext_store_pblock(ex, ext_pblock(&orig_ex)); + ext4_ext_dirty(handle, inode, path + depth); + /* zeroed the full extent */ + /* blocks available from iblock */ + return allocated; + + } else if (err) + goto fix_extent_len; + /* + * The depth, and hence eh & ex might change + * as part of the insert above. + */ + newdepth = ext_depth(inode); + /* + * update the extent length after successful insert of the + * split extent + */ + orig_ex.ee_len = cpu_to_le16(ee_len - + ext4_ext_get_actual_len(ex3)); + depth = newdepth; + ext4_ext_drop_refs(path); + path = ext4_ext_find_extent(inode, iblock, path); + if (IS_ERR(path)) { + err = PTR_ERR(path); + goto out; + } + eh = path[depth].p_hdr; + ex = path[depth].p_ext; + if (ex2 != &newex) + ex2 = ex; + + err = ext4_ext_get_access(handle, inode, path + depth); + if (err) + goto out; + + allocated = max_blocks; + } + /* + * If there was a change of depth as part of the + * insertion of ex3 above, we need to update the length + * of the ex1 extent again here + */ + if (ex1 && ex1 != ex) { + ex1 = ex; + ex1->ee_len = cpu_to_le16(iblock - ee_block); + ext4_ext_mark_uninitialized(ex1); + ex2 = &newex; + } + /* + * ex2: iblock to iblock + maxblocks-1 : to be direct IO written, + * uninitialised still. + */ + ex2->ee_block = cpu_to_le32(iblock); + ext4_ext_store_pblock(ex2, newblock); + ex2->ee_len = cpu_to_le16(allocated); + ext4_ext_mark_uninitialized(ex2); + if (ex2 != ex) + goto insert; + /* Mark modified extent as dirty */ + err = ext4_ext_dirty(handle, inode, path + depth); + ext_debug("out here\n"); + goto out; +insert: + err = ext4_ext_insert_extent(handle, inode, path, &newex, flags); if (err == -ENOSPC) { err = ext4_ext_zeroout(inode, &orig_ex); if (err) @@ -2743,6 +2940,7 @@ } else if (err) goto fix_extent_len; out: + ext4_ext_show_leaf(inode, path); return err ? err : allocated; fix_extent_len: @@ -2753,7 +2951,151 @@ ext4_ext_dirty(handle, inode, path + depth); return err; } +static int ext4_convert_unwritten_extents_dio(handle_t *handle, + struct inode *inode, + struct ext4_ext_path *path) +{ + struct ext4_extent *ex; + struct ext4_extent_header *eh; + int depth; + int err = 0; + int ret = 0; + + depth = ext_depth(inode); + eh = path[depth].p_hdr; + ex = path[depth].p_ext; + err = ext4_ext_get_access(handle, inode, path + depth); + if (err) + goto out; + /* first mark the extent as initialized */ + ext4_ext_mark_initialized(ex); + + /* + * We have to see if it can be merged with the extent + * on the left. + */ + if (ex > EXT_FIRST_EXTENT(eh)) { + /* + * To merge left, pass "ex - 1" to try_to_merge(), + * since it merges towards right _only_. + */ + ret = ext4_ext_try_to_merge(inode, path, ex - 1); + if (ret) { + err = ext4_ext_correct_indexes(handle, inode, path); + if (err) + goto out; + depth = ext_depth(inode); + ex--; + } + } + /* + * Try to Merge towards right. + */ + ret = ext4_ext_try_to_merge(inode, path, ex); + if (ret) { + err = ext4_ext_correct_indexes(handle, inode, path); + if (err) + goto out; + depth = ext_depth(inode); + } + /* Mark modified extent as dirty */ + err = ext4_ext_dirty(handle, inode, path + depth); +out: + ext4_ext_show_leaf(inode, path); + return err; +} + +static int +ext4_ext_handle_uninitialized_extents(handle_t *handle, struct inode *inode, + ext4_lblk_t iblock, unsigned int max_blocks, + struct ext4_ext_path *path, int flags, + unsigned int allocated, struct buffer_head *bh_result, + ext4_fsblk_t newblock) +{ + int ret = 0; + int err = 0; + ext4_io_end_t *io = EXT4_I(inode)->cur_aio_dio; + + ext_debug("ext4_ext_handle_uninitialized_extents: inode %lu, logical" + "block %llu, max_blocks %u, flags %d, allocated %u", + inode->i_ino, (unsigned long long)iblock, max_blocks, + flags, allocated); + ext4_ext_show_leaf(inode, path); + + /* DIO get_block() before submit the IO, split the extent */ + if (flags == EXT4_GET_BLOCKS_DIO_CREATE_EXT) { + ret = ext4_split_unwritten_extents(handle, + inode, path, iblock, + max_blocks, flags); + /* + * Flag the inode(non aio case) or end_io struct (aio case) + * that this IO needs to convertion to written when IO is + * completed + */ + if (io) + io->flag = DIO_AIO_UNWRITTEN; + else + EXT4_I(inode)->i_state |= EXT4_STATE_DIO_UNWRITTEN; + goto out; + } + /* async DIO end_io complete, convert the filled extent to written */ + if (flags == EXT4_GET_BLOCKS_DIO_CONVERT_EXT) { + ret = ext4_convert_unwritten_extents_dio(handle, inode, + path); + if (ret >= 0) + ext4_update_inode_fsync_trans(handle, inode, 1); + goto out2; + } + /* buffered IO case */ + /* + * repeat fallocate creation request + * we already have an unwritten extent + */ + if (flags & EXT4_GET_BLOCKS_UNINIT_EXT) + goto map_out; + + /* buffered READ or buffered write_begin() lookup */ + if ((flags & EXT4_GET_BLOCKS_CREATE) == 0) { + /* + * We have blocks reserved already. We + * return allocated blocks so that delalloc + * won't do block reservation for us. But + * the buffer head will be unmapped so that + * a read from the block returns 0s. + */ + set_buffer_unwritten(bh_result); + goto out1; + } + + /* buffered write, writepage time, convert*/ + ret = ext4_ext_convert_to_initialized(handle, inode, + path, iblock, + max_blocks); + if (ret >= 0) + ext4_update_inode_fsync_trans(handle, inode, 1); +out: + if (ret <= 0) { + err = ret; + goto out2; + } else + allocated = ret; + set_buffer_new(bh_result); +map_out: + set_buffer_mapped(bh_result); +out1: + if (allocated > max_blocks) + allocated = max_blocks; + ext4_ext_show_leaf(inode, path); + bh_result->b_bdev = inode->i_sb->s_bdev; + bh_result->b_blocknr = newblock; +out2: + if (path) { + ext4_ext_drop_refs(path); + kfree(path); + } + return err ? err : allocated; +} /* * Block allocation/map/preallocation routine for extents based files * @@ -2784,6 +3126,7 @@ int err = 0, depth, ret, cache_type; unsigned int allocated = 0; struct ext4_allocation_request ar; + ext4_io_end_t *io = EXT4_I(inode)->cur_aio_dio; __clear_bit(BH_New, &bh_result->b_state); ext_debug("blocks %u/%u requested for inode %u\n", @@ -2845,7 +3188,8 @@ */ ee_len = ext4_ext_get_actual_len(ex); /* if found extent covers block, simply return it */ - if (iblock >= ee_block && iblock < ee_block + ee_len) { + + if (in_range(iblock, ee_block, ee_len)) { newblock = iblock - ee_block + ee_start; /* number of remaining blocks in the extent */ allocated = ee_len - (iblock - ee_block); @@ -2859,33 +3203,10 @@ EXT4_EXT_CACHE_EXTENT); goto out; } - if (flags & EXT4_GET_BLOCKS_UNINIT_EXT) - goto out; - if ((flags & EXT4_GET_BLOCKS_CREATE) == 0) { - if (allocated > max_blocks) - allocated = max_blocks; - /* - * We have blocks reserved already. We - * return allocated blocks so that delalloc - * won't do block reservation for us. But - * the buffer head will be unmapped so that - * a read from the block returns 0s. - */ - set_buffer_unwritten(bh_result); - bh_result->b_bdev = inode->i_sb->s_bdev; - bh_result->b_blocknr = newblock; - goto out2; - } - - ret = ext4_ext_convert_to_initialized(handle, inode, - path, iblock, - max_blocks); - if (ret <= 0) { - err = ret; - goto out2; - } else - allocated = ret; - goto outnew; + ret = ext4_ext_handle_uninitialized_extents(handle, + inode, iblock, max_blocks, path, + flags, allocated, bh_result, newblock); + return ret; } } @@ -2956,9 +3277,27 @@ /* try to insert new extent into found leaf and return */ ext4_ext_store_pblock(&newex, newblock); newex.ee_len = cpu_to_le16(ar.len); - if (flags & EXT4_GET_BLOCKS_UNINIT_EXT) /* Mark uninitialized */ + /* Mark uninitialized */ + if (flags & EXT4_GET_BLOCKS_UNINIT_EXT){ ext4_ext_mark_uninitialized(&newex); - err = ext4_ext_insert_extent(handle, inode, path, &newex); + /* + * io_end structure was created for every async + * direct IO write to the middle of the file. + * To avoid unecessary convertion for every aio dio rewrite + * to the mid of file, here we flag the IO that is really + * need the convertion. + * For non asycn direct IO case, flag the inode state + * that we need to perform convertion when IO is done. + */ + if (flags == EXT4_GET_BLOCKS_DIO_CREATE_EXT) { + if (io) + io->flag = DIO_AIO_UNWRITTEN; + else + EXT4_I(inode)->i_state |= + EXT4_STATE_DIO_UNWRITTEN;; + } + } + err = ext4_ext_insert_extent(handle, inode, path, &newex, flags); if (err) { /* free data blocks we just allocated */ /* not a good idea to call discard here directly, @@ -2972,13 +3311,18 @@ /* previous routine could use block we allocated */ newblock = ext_pblock(&newex); allocated = ext4_ext_get_actual_len(&newex); -outnew: set_buffer_new(bh_result); - /* Cache only when it is _not_ an uninitialized extent */ - if ((flags & EXT4_GET_BLOCKS_UNINIT_EXT) == 0) + /* + * Cache the extent and update transaction to commit on fdatasync only + * when it is _not_ an uninitialized extent. + */ + if ((flags & EXT4_GET_BLOCKS_UNINIT_EXT) == 0) { ext4_ext_put_in_cache(inode, iblock, allocated, newblock, EXT4_EXT_CACHE_EXTENT); + ext4_update_inode_fsync_trans(handle, inode, 1); + } else + ext4_update_inode_fsync_trans(handle, inode, 0); out: if (allocated > max_blocks) allocated = max_blocks; @@ -3171,6 +3515,64 @@ } /* + * This function convert a range of blocks to written extents + * The caller of this function will pass the start offset and the size. + * all unwritten extents within this range will be converted to + * written extents. + * + * This function is called from the direct IO end io call back + * function, to convert the fallocated extents after IO is completed. + * Returns 0 on success. + */ +int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset, + loff_t len) +{ + handle_t *handle; + ext4_lblk_t block; + unsigned int max_blocks; + int ret = 0; + int ret2 = 0; + struct buffer_head map_bh; + unsigned int credits, blkbits = inode->i_blkbits; + + block = offset >> blkbits; + /* + * We can't just convert len to max_blocks because + * If blocksize = 4096 offset = 3072 and len = 2048 + */ + max_blocks = (EXT4_BLOCK_ALIGN(len + offset, blkbits) >> blkbits) + - block; + /* + * credits to insert 1 extent into extent tree + */ + credits = ext4_chunk_trans_blocks(inode, max_blocks); + while (ret >= 0 && ret < max_blocks) { + block = block + ret; + max_blocks = max_blocks - ret; + handle = ext4_journal_start(inode, credits); + if (IS_ERR(handle)) { + ret = PTR_ERR(handle); + break; + } + map_bh.b_state = 0; + ret = ext4_get_blocks(handle, inode, block, + max_blocks, &map_bh, + EXT4_GET_BLOCKS_DIO_CONVERT_EXT); + if (ret <= 0) { + WARN_ON(ret <= 0); + printk(KERN_ERR "%s: ext4_ext_get_blocks " + "returned error inode#%lu, block=%u, " + "max_blocks=%u", __func__, + inode->i_ino, block, max_blocks); + } + ext4_mark_inode_dirty(handle, inode); + ret2 = ext4_journal_stop(handle); + if (ret <= 0 || ret2 ) + break; + } + return ret > 0 ? ret2 : ret; +} +/* * Callback function called for each extent to gather FIEMAP information. */ static int ext4_ext_fiemap_cb(struct inode *inode, struct ext4_ext_path *path, @@ -3218,15 +3620,15 @@ flags |= FIEMAP_EXTENT_UNWRITTEN; /* - * If this extent reaches EXT_MAX_BLOCK, it must be last. + * If this extent reaches EXT_MAX_BLOCKS, it must be last. * - * Or if ext4_ext_next_allocated_block is EXT_MAX_BLOCK, + * Or if ext4_ext_next_allocated_block is EXT_MAX_BLOCKS, * this also indicates no more allocated blocks. * - * XXX this might miss a single-block extent at EXT_MAX_BLOCK + * XXX this might miss a single-block extent at EXT_MAX_BLOCKS */ - if (ext4_ext_next_allocated_block(path) == EXT_MAX_BLOCK || - newex->ec_block + newex->ec_len - 1 == EXT_MAX_BLOCK) { + if (ext4_ext_next_allocated_block(path) == EXT_MAX_BLOCKS || + newex->ec_block + newex->ec_len - 1 == EXT_MAX_BLOCKS) { loff_t size = i_size_read(inode); loff_t bs = EXT4_BLOCK_SIZE(inode->i_sb); @@ -3287,7 +3689,6 @@ __u64 start, __u64 len) { ext4_lblk_t start_blk; - ext4_lblk_t len_blks; int error = 0; /* fallback to generic here if not in extents fmt */ @@ -3301,17 +3702,21 @@ if (fieinfo->fi_flags & FIEMAP_FLAG_XATTR) { error = ext4_xattr_fiemap(inode, fieinfo); } else { + ext4_lblk_t len_blks; + __u64 last_blk; + start_blk = start >> inode->i_sb->s_blocksize_bits; - len_blks = len >> inode->i_sb->s_blocksize_bits; + last_blk = (start + len - 1) >> inode->i_sb->s_blocksize_bits; + if (last_blk >= EXT_MAX_BLOCKS) + last_blk = EXT_MAX_BLOCKS-1; + len_blks = ((ext4_lblk_t) last_blk) - start_blk + 1; /* * Walk the extent tree gathering extent information. * ext4_ext_fiemap_cb will push extents back to user. */ - down_read(&EXT4_I(inode)->i_data_sem); error = ext4_ext_walk_space(inode, start_blk, len_blks, ext4_ext_fiemap_cb, fieinfo); - up_read(&EXT4_I(inode)->i_data_sem); } return error; --- linux-fsl-imx51-2.6.31.orig/fs/ext4/xattr.c +++ linux-fsl-imx51-2.6.31/fs/ext4/xattr.c @@ -810,12 +810,23 @@ get_bh(new_bh); } else { /* We need to allocate a new block */ - ext4_fsblk_t goal = ext4_group_first_block_no(sb, + ext4_fsblk_t goal, block; + + goal = ext4_group_first_block_no(sb, EXT4_I(inode)->i_block_group); - ext4_fsblk_t block = ext4_new_meta_blocks(handle, inode, + + /* non-extent files can't have physical blocks past 2^32 */ + if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) + goal = goal & EXT4_MAX_BLOCK_FILE_PHYS; + + block = ext4_new_meta_blocks(handle, inode, goal, NULL, &error); if (error) goto cleanup; + + if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) + BUG_ON(block > EXT4_MAX_BLOCK_FILE_PHYS); + ea_idebug(inode, "creating block %d", block); new_bh = sb_getblk(sb, block); @@ -977,6 +988,10 @@ if (error) goto cleanup; + error = ext4_journal_get_write_access(handle, is.iloc.bh); + if (error) + goto cleanup; + if (EXT4_I(inode)->i_state & EXT4_STATE_NEW) { struct ext4_inode *raw_inode = ext4_raw_inode(&is.iloc); memset(raw_inode, 0, EXT4_SB(inode->i_sb)->s_inode_size); @@ -1002,9 +1017,6 @@ if (flags & XATTR_CREATE) goto cleanup; } - error = ext4_journal_get_write_access(handle, is.iloc.bh); - if (error) - goto cleanup; if (!value) { if (!is.s.not_found) error = ext4_xattr_ibody_set(handle, inode, &i, &is); --- linux-fsl-imx51-2.6.31.orig/fs/ext4/inode.c +++ linux-fsl-imx51-2.6.31/fs/ext4/inode.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "ext4_jbd2.h" #include "xattr.h" @@ -192,11 +193,25 @@ * so before we call here everything must be consistently dirtied against * this transaction. */ -static int ext4_journal_test_restart(handle_t *handle, struct inode *inode) +int ext4_truncate_restart_trans(handle_t *handle, struct inode *inode, + int nblocks) { + int ret; + + /* + * Drop i_data_sem to avoid deadlock with ext4_get_blocks At this + * moment, get_block can be called only for blocks inside i_size since + * page cache has been already dropped and writes are blocked by + * i_mutex. So we can safely drop the i_data_sem here. + */ BUG_ON(EXT4_JOURNAL(inode) == NULL); jbd_debug(2, "restarting handle %p\n", handle); - return ext4_journal_restart(handle, blocks_for_truncate(inode)); + up_write(&EXT4_I(inode)->i_data_sem); + ret = ext4_journal_restart(handle, blocks_for_truncate(inode)); + down_write(&EXT4_I(inode)->i_data_sem); + ext4_discard_preallocations(inode); + + return ret; } /* @@ -551,15 +566,21 @@ * * Normally this function find the preferred place for block allocation, * returns it. + * Because this is only used for non-extent files, we limit the block nr + * to 32 bits. */ static ext4_fsblk_t ext4_find_goal(struct inode *inode, ext4_lblk_t block, Indirect *partial) { + ext4_fsblk_t goal; + /* * XXX need to get goal block from mballoc's data structures */ - return ext4_find_near(inode, partial); + goal = ext4_find_near(inode, partial); + goal = goal & EXT4_MAX_BLOCK_FILE_PHYS; + return goal; } /** @@ -640,6 +661,8 @@ if (*err) goto failed_out; + BUG_ON(current_block + count > EXT4_MAX_BLOCK_FILE_PHYS); + target -= count; /* allocate blocks for indirect blocks */ while (index < indirect_blks && count) { @@ -674,6 +697,7 @@ ar.flags = EXT4_MB_HINT_DATA; current_block = ext4_mb_new_blocks(handle, &ar, err); + BUG_ON(current_block + ar.len > EXT4_MAX_BLOCK_FILE_PHYS); if (*err && (target == blks)) { /* @@ -998,10 +1022,12 @@ if (!err) err = ext4_splice_branch(handle, inode, iblock, partial, indirect_blks, count); - else + if (err) goto cleanup; set_buffer_new(bh_result); + + ext4_update_inode_fsync_trans(handle, inode, 1); got_it: map_bh(bh_result, inode->i_sb, le32_to_cpu(chain[depth-1].key)); if (count > blocks_to_boundary) @@ -1020,17 +1046,12 @@ return err; } -qsize_t ext4_get_reserved_space(struct inode *inode) +#ifdef CONFIG_QUOTA +qsize_t *ext4_get_reserved_space(struct inode *inode) { - unsigned long long total; - - spin_lock(&EXT4_I(inode)->i_block_reservation_lock); - total = EXT4_I(inode)->i_reserved_data_blocks + - EXT4_I(inode)->i_reserved_meta_blocks; - spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); - - return total; + return &EXT4_I(inode)->i_reserved_quota; } +#endif /* * Calculate the number of metadata blocks need to reserve * to allocate @blocks for non extent file based file @@ -1109,22 +1130,79 @@ ext4_discard_preallocations(inode); } -static int check_block_validity(struct inode *inode, sector_t logical, - sector_t phys, int len) +static int check_block_validity(struct inode *inode, const char *msg, + sector_t logical, sector_t phys, int len) { if (!ext4_data_block_valid(EXT4_SB(inode->i_sb), phys, len)) { - ext4_error(inode->i_sb, "check_block_validity", + ext4_error(inode->i_sb, msg, "inode #%lu logical block %llu mapped to %llu " "(size %d)", inode->i_ino, (unsigned long long) logical, (unsigned long long) phys, len); - WARN_ON(1); return -EIO; } return 0; } /* + * Return the number of contiguous dirty pages in a given inode + * starting at page frame idx. + */ +static pgoff_t ext4_num_dirty_pages(struct inode *inode, pgoff_t idx, + unsigned int max_pages) +{ + struct address_space *mapping = inode->i_mapping; + pgoff_t index; + struct pagevec pvec; + pgoff_t num = 0; + int i, nr_pages, done = 0; + + if (max_pages == 0) + return 0; + pagevec_init(&pvec, 0); + while (!done) { + index = idx; + nr_pages = pagevec_lookup_tag(&pvec, mapping, &index, + PAGECACHE_TAG_DIRTY, + (pgoff_t)PAGEVEC_SIZE); + if (nr_pages == 0) + break; + for (i = 0; i < nr_pages; i++) { + struct page *page = pvec.pages[i]; + struct buffer_head *bh, *head; + + lock_page(page); + if (unlikely(page->mapping != mapping) || + !PageDirty(page) || + PageWriteback(page) || + page->index != idx) { + done = 1; + unlock_page(page); + break; + } + if (page_has_buffers(page)) { + bh = head = page_buffers(page); + do { + if (!buffer_delay(bh) && + !buffer_unwritten(bh)) + done = 1; + bh = bh->b_this_page; + } while (!done && (bh != head)); + } + unlock_page(page); + if (done) + break; + idx++; + num++; + if (num >= max_pages) + break; + } + pagevec_release(&pvec); + } + return num; +} + +/* * The ext4_get_blocks() function tries to look up the requested blocks, * and returns if the blocks are already mapped. * @@ -1155,6 +1233,9 @@ clear_buffer_mapped(bh); clear_buffer_unwritten(bh); + ext_debug("ext4_get_blocks(): inode %lu, flag %d, max_blocks %u," + "logical block %lu\n", inode->i_ino, flags, max_blocks, + (unsigned long)block); /* * Try to see if we can get the block without requesting a new * file system block. @@ -1170,8 +1251,8 @@ up_read((&EXT4_I(inode)->i_data_sem)); if (retval > 0 && buffer_mapped(bh)) { - int ret = check_block_validity(inode, block, - bh->b_blocknr, retval); + int ret = check_block_validity(inode, "file system corruption", + block, bh->b_blocknr, retval); if (ret != 0) return ret; } @@ -1235,8 +1316,7 @@ * i_data's format changing. Force the migrate * to fail by clearing migrate flags */ - EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags & - ~EXT4_EXT_MIGRATE; + EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE; } } @@ -1252,8 +1332,9 @@ up_write((&EXT4_I(inode)->i_data_sem)); if (retval > 0 && buffer_mapped(bh)) { - int ret = check_block_validity(inode, block, - bh->b_blocknr, retval); + int ret = check_block_validity(inode, "file system " + "corruption after allocation", + block, bh->b_blocknr, retval); if (ret != 0) return ret; } @@ -1451,6 +1532,16 @@ return ext4_journal_get_write_access(handle, bh); } +/* + * Truncate blocks that were not used by write. We have to truncate the + * pagecache as well so that corresponding buffers get properly unmapped. + */ +static void ext4_truncate_failed_write(struct inode *inode) +{ + truncate_inode_pages(inode->i_mapping, inode->i_size); + ext4_truncate(inode); +} + static int ext4_write_begin(struct file *file, struct address_space *mapping, loff_t pos, unsigned len, unsigned flags, struct page **pagep, void **fsdata) @@ -1516,7 +1607,7 @@ ext4_journal_stop(handle); if (pos + len > inode->i_size) { - ext4_truncate(inode); + ext4_truncate_failed_write(inode); /* * If truncate failed early the inode might * still be on the orphan list; we need to @@ -1626,7 +1717,7 @@ ret = ret2; if (pos + len > inode->i_size) { - ext4_truncate(inode); + ext4_truncate_failed_write(inode); /* * If truncate failed early the inode might still be * on the orphan list; we need to make sure the inode @@ -1668,7 +1759,7 @@ ret = ret2; if (pos + len > inode->i_size) { - ext4_truncate(inode); + ext4_truncate_failed_write(inode); /* * If truncate failed early the inode might still be * on the orphan list; we need to make sure the inode @@ -1731,7 +1822,7 @@ if (!ret) ret = ret2; if (pos + len > inode->i_size) { - ext4_truncate(inode); + ext4_truncate_failed_write(inode); /* * If truncate failed early the inode might still be * on the orphan list; we need to make sure the inode @@ -1763,30 +1854,29 @@ md_needed = mdblocks - EXT4_I(inode)->i_reserved_meta_blocks; total = md_needed + nrblocks; + spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); /* * Make quota reservation here to prevent quota overflow * later. Real quota accounting is done at pages writeout * time. */ - if (vfs_dq_reserve_block(inode, total)) { - spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); + if (vfs_dq_reserve_block(inode, total)) return -EDQUOT; - } if (ext4_claim_free_blocks(sbi, total)) { - spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); + vfs_dq_release_reservation_block(inode, total); if (ext4_should_retry_alloc(inode->i_sb, &retries)) { yield(); goto repeat; } - vfs_dq_release_reservation_block(inode, total); return -ENOSPC; } + spin_lock(&EXT4_I(inode)->i_block_reservation_lock); EXT4_I(inode)->i_reserved_data_blocks += nrblocks; - EXT4_I(inode)->i_reserved_meta_blocks = mdblocks; - + EXT4_I(inode)->i_reserved_meta_blocks += md_needed; spin_unlock(&EXT4_I(inode)->i_block_reservation_lock); + return 0; /* success */ } @@ -1860,22 +1950,6 @@ } /* - * Delayed allocation stuff - */ - -struct mpage_da_data { - struct inode *inode; - sector_t b_blocknr; /* start block number of extent */ - size_t b_size; /* size of extent */ - unsigned long b_state; /* state of the extent */ - unsigned long first_page, next_page; /* extent of pages */ - struct writeback_control *wbc; - int io_done; - int pages_written; - int retval; -}; - -/* * mpage_da_submit_io - walks through extent of pages and try to write * them with writepage() call back * @@ -2717,7 +2791,7 @@ * number of contiguous block. So we will limit * number of contiguous block to a sane value */ - if (!(inode->i_flags & EXT4_EXTENTS_FL) && + if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) && (max_blocks > EXT4_MAX_TRANS_DATA)) max_blocks = EXT4_MAX_TRANS_DATA; @@ -2735,8 +2809,11 @@ int no_nrwrite_index_update; int pages_written = 0; long pages_skipped; + unsigned int max_pages; int range_cyclic, cycled = 1, io_done = 0; - int needed_blocks, ret = 0, nr_to_writebump = 0; + int needed_blocks, ret = 0; + long desired_nr_to_write, nr_to_writebump = 0; + loff_t range_start = wbc->range_start; struct ext4_sb_info *sbi = EXT4_SB(mapping->host->i_sb); trace_ext4_da_writepages(inode, wbc); @@ -2762,16 +2839,6 @@ if (unlikely(sbi->s_mount_flags & EXT4_MF_FS_ABORTED)) return -EROFS; - /* - * Make sure nr_to_write is >= sbi->s_mb_stream_request - * This make sure small files blocks are allocated in - * single attempt. This ensure that small files - * get less fragmented. - */ - if (wbc->nr_to_write < sbi->s_mb_stream_request) { - nr_to_writebump = sbi->s_mb_stream_request - wbc->nr_to_write; - wbc->nr_to_write = sbi->s_mb_stream_request; - } if (wbc->range_start == 0 && wbc->range_end == LLONG_MAX) range_whole = 1; @@ -2786,6 +2853,36 @@ } else index = wbc->range_start >> PAGE_CACHE_SHIFT; + /* + * This works around two forms of stupidity. The first is in + * the writeback code, which caps the maximum number of pages + * written to be 1024 pages. This is wrong on multiple + * levels; different architectues have a different page size, + * which changes the maximum amount of data which gets + * written. Secondly, 4 megabytes is way too small. XFS + * forces this value to be 16 megabytes by multiplying + * nr_to_write parameter by four, and then relies on its + * allocator to allocate larger extents to make them + * contiguous. Unfortunately this brings us to the second + * stupidity, which is that ext4's mballoc code only allocates + * at most 2048 blocks. So we force contiguous writes up to + * the number of dirty blocks in the inode, or + * sbi->max_writeback_mb_bump whichever is smaller. + */ + max_pages = sbi->s_max_writeback_mb_bump << (20 - PAGE_CACHE_SHIFT); + if (!range_cyclic && range_whole) + desired_nr_to_write = wbc->nr_to_write * 8; + else + desired_nr_to_write = ext4_num_dirty_pages(inode, index, + max_pages); + if (desired_nr_to_write > max_pages) + desired_nr_to_write = max_pages; + + if (wbc->nr_to_write < desired_nr_to_write) { + nr_to_writebump = desired_nr_to_write - wbc->nr_to_write; + wbc->nr_to_write = desired_nr_to_write; + } + mpd.wbc = wbc; mpd.inode = mapping->host; @@ -2904,7 +3001,9 @@ out_writepages: if (!no_nrwrite_index_update) wbc->no_nrwrite_index_update = 0; - wbc->nr_to_write -= nr_to_writebump; + if (wbc->nr_to_write > nr_to_writebump) + wbc->nr_to_write -= nr_to_writebump; + wbc->range_start = range_start; trace_ext4_da_writepages_result(inode, wbc, ret, pages_written); return ret; } @@ -2994,7 +3093,7 @@ * i_size_read because we hold i_mutex. */ if (pos + len > inode->i_size) - ext4_truncate(inode); + ext4_truncate_failed_write(inode); } if (ret == -ENOSPC && ext4_should_retry_alloc(inode->i_sb, &retries)) @@ -3259,6 +3358,8 @@ } /* + * O_DIRECT for ext3 (or indirect map) based files + * * If the O_DIRECT write will extend the file then add this inode to the * orphan list. So recovery will truncate it back to the original size * if the machine crashes during the write. @@ -3267,7 +3368,7 @@ * crashes then stale disk data _may_ be exposed inside the file. But current * VFS code falls back into buffered path in that case so we are safe. */ -static ssize_t ext4_direct_IO(int rw, struct kiocb *iocb, +static ssize_t ext4_ind_direct_IO(int rw, struct kiocb *iocb, const struct iovec *iov, loff_t offset, unsigned long nr_segs) { @@ -3278,6 +3379,7 @@ ssize_t ret; int orphan = 0; size_t count = iov_length(iov, nr_segs); + int retries = 0; if (rw == WRITE) { loff_t final_size = offset + count; @@ -3300,9 +3402,12 @@ } } +retry: ret = blockdev_direct_IO(rw, iocb, inode, inode->i_sb->s_bdev, iov, offset, nr_segs, ext4_get_block, NULL); + if (ret == -ENOSPC && ext4_should_retry_alloc(inode->i_sb, &retries)) + goto retry; if (orphan) { int err; @@ -3341,6 +3446,364 @@ return ret; } +static int ext4_get_block_dio_write(struct inode *inode, sector_t iblock, + struct buffer_head *bh_result, int create) +{ + handle_t *handle = NULL; + int ret = 0; + unsigned max_blocks = bh_result->b_size >> inode->i_blkbits; + int dio_credits; + + ext4_debug("ext4_get_block_dio_write: inode %lu, create flag %d\n", + inode->i_ino, create); + /* + * DIO VFS code passes create = 0 flag for write to + * the middle of file. It does this to avoid block + * allocation for holes, to prevent expose stale data + * out when there is parallel buffered read (which does + * not hold the i_mutex lock) while direct IO write has + * not completed. DIO request on holes finally falls back + * to buffered IO for this reason. + * + * For ext4 extent based file, since we support fallocate, + * new allocated extent as uninitialized, for holes, we + * could fallocate blocks for holes, thus parallel + * buffered IO read will zero out the page when read on + * a hole while parallel DIO write to the hole has not completed. + * + * when we come here, we know it's a direct IO write to + * to the middle of file ( DIO_MAX_BLOCKS) + max_blocks = DIO_MAX_BLOCKS; + dio_credits = ext4_chunk_trans_blocks(inode, max_blocks); + handle = ext4_journal_start(inode, dio_credits); + if (IS_ERR(handle)) { + ret = PTR_ERR(handle); + goto out; + } + ret = ext4_get_blocks(handle, inode, iblock, max_blocks, bh_result, + create); + if (ret > 0) { + bh_result->b_size = (ret << inode->i_blkbits); + ret = 0; + } + ext4_journal_stop(handle); +out: + return ret; +} + +static void ext4_free_io_end(ext4_io_end_t *io) +{ + BUG_ON(!io); + iput(io->inode); + kfree(io); +} +static void dump_aio_dio_list(struct inode * inode) +{ +#ifdef EXT4_DEBUG + struct list_head *cur, *before, *after; + ext4_io_end_t *io, *io0, *io1; + + if (list_empty(&EXT4_I(inode)->i_aio_dio_complete_list)){ + ext4_debug("inode %lu aio dio list is empty\n", inode->i_ino); + return; + } + + ext4_debug("Dump inode %lu aio_dio_completed_IO list \n", inode->i_ino); + list_for_each_entry(io, &EXT4_I(inode)->i_aio_dio_complete_list, list){ + cur = &io->list; + before = cur->prev; + io0 = container_of(before, ext4_io_end_t, list); + after = cur->next; + io1 = container_of(after, ext4_io_end_t, list); + + ext4_debug("io 0x%p from inode %lu,prev 0x%p,next 0x%p\n", + io, inode->i_ino, io0, io1); + } +#endif +} + +/* + * check a range of space and convert unwritten extents to written. + */ +static int ext4_end_aio_dio_nolock(ext4_io_end_t *io) +{ + struct inode *inode = io->inode; + loff_t offset = io->offset; + size_t size = io->size; + int ret = 0; + + ext4_debug("end_aio_dio_onlock: io 0x%p from inode %lu,list->next 0x%p," + "list->prev 0x%p\n", + io, inode->i_ino, io->list.next, io->list.prev); + + if (list_empty(&io->list)) + return ret; + + if (io->flag != DIO_AIO_UNWRITTEN) + return ret; + + if (offset + size <= i_size_read(inode)) + ret = ext4_convert_unwritten_extents(inode, offset, size); + + if (ret < 0) { + printk(KERN_EMERG "%s: failed to convert unwritten" + "extents to written extents, error is %d" + " io is still on inode %lu aio dio list\n", + __func__, ret, inode->i_ino); + return ret; + } + + /* clear the DIO AIO unwritten flag */ + io->flag = 0; + return ret; +} +/* + * work on completed aio dio IO, to convert unwritten extents to extents + */ +static void ext4_end_aio_dio_work(struct work_struct *work) +{ + ext4_io_end_t *io = container_of(work, ext4_io_end_t, work); + struct inode *inode = io->inode; + int ret = 0; + + mutex_lock(&inode->i_mutex); + ret = ext4_end_aio_dio_nolock(io); + if (ret >= 0) { + if (!list_empty(&io->list)) + list_del_init(&io->list); + ext4_free_io_end(io); + } + mutex_unlock(&inode->i_mutex); +} +/* + * This function is called from ext4_sync_file(). + * + * When AIO DIO IO is completed, the work to convert unwritten + * extents to written is queued on workqueue but may not get immediately + * scheduled. When fsync is called, we need to ensure the + * conversion is complete before fsync returns. + * The inode keeps track of a list of completed AIO from DIO path + * that might needs to do the conversion. This function walks through + * the list and convert the related unwritten extents to written. + */ +int flush_aio_dio_completed_IO(struct inode *inode) +{ + ext4_io_end_t *io; + int ret = 0; + int ret2 = 0; + + if (list_empty(&EXT4_I(inode)->i_aio_dio_complete_list)) + return ret; + + dump_aio_dio_list(inode); + while (!list_empty(&EXT4_I(inode)->i_aio_dio_complete_list)){ + io = list_entry(EXT4_I(inode)->i_aio_dio_complete_list.next, + ext4_io_end_t, list); + /* + * Calling ext4_end_aio_dio_nolock() to convert completed + * IO to written. + * + * When ext4_sync_file() is called, run_queue() may already + * about to flush the work corresponding to this io structure. + * It will be upset if it founds the io structure related + * to the work-to-be schedule is freed. + * + * Thus we need to keep the io structure still valid here after + * convertion finished. The io structure has a flag to + * avoid double converting from both fsync and background work + * queue work. + */ + ret = ext4_end_aio_dio_nolock(io); + if (ret < 0) + ret2 = ret; + else + list_del_init(&io->list); + } + return (ret2 < 0) ? ret2 : 0; +} + +static ext4_io_end_t *ext4_init_io_end (struct inode *inode) +{ + ext4_io_end_t *io = NULL; + + io = kmalloc(sizeof(*io), GFP_NOFS); + + if (io) { + igrab(inode); + io->inode = inode; + io->flag = 0; + io->offset = 0; + io->size = 0; + io->error = 0; + INIT_WORK(&io->work, ext4_end_aio_dio_work); + INIT_LIST_HEAD(&io->list); + } + + return io; +} + +static void ext4_end_io_dio(struct kiocb *iocb, loff_t offset, + ssize_t size, void *private) +{ + ext4_io_end_t *io_end = iocb->private; + struct workqueue_struct *wq; + + /* if not async direct IO or dio with 0 bytes write, just return */ + if (!io_end || !size) + return; + + ext_debug("ext4_end_io_dio(): io_end 0x%p" + "for inode %lu, iocb 0x%p, offset %llu, size %llu\n", + iocb->private, io_end->inode->i_ino, iocb, offset, + size); + + /* if not aio dio with unwritten extents, just free io and return */ + if (io_end->flag != DIO_AIO_UNWRITTEN){ + ext4_free_io_end(io_end); + iocb->private = NULL; + return; + } + + io_end->offset = offset; + io_end->size = size; + wq = EXT4_SB(io_end->inode->i_sb)->dio_unwritten_wq; + + /* queue the work to convert unwritten extents to written */ + queue_work(wq, &io_end->work); + + /* Add the io_end to per-inode completed aio dio list*/ + list_add_tail(&io_end->list, + &EXT4_I(io_end->inode)->i_aio_dio_complete_list); + iocb->private = NULL; +} +/* + * For ext4 extent files, ext4 will do direct-io write to holes, + * preallocated extents, and those write extend the file, no need to + * fall back to buffered IO. + * + * For holes, we fallocate those blocks, mark them as unintialized + * If those blocks were preallocated, we mark sure they are splited, but + * still keep the range to write as unintialized. + * + * The unwrritten extents will be converted to written when DIO is completed. + * For async direct IO, since the IO may still pending when return, we + * set up an end_io call back function, which will do the convertion + * when async direct IO completed. + * + * If the O_DIRECT write will extend the file then add this inode to the + * orphan list. So recovery will truncate it back to the original size + * if the machine crashes during the write. + * + */ +static ssize_t ext4_ext_direct_IO(int rw, struct kiocb *iocb, + const struct iovec *iov, loff_t offset, + unsigned long nr_segs) +{ + struct file *file = iocb->ki_filp; + struct inode *inode = file->f_mapping->host; + ssize_t ret; + size_t count = iov_length(iov, nr_segs); + + loff_t final_size = offset + count; + if (rw == WRITE && final_size <= inode->i_size) { + /* + * We could direct write to holes and fallocate. + * + * Allocated blocks to fill the hole are marked as uninitialized + * to prevent paralel buffered read to expose the stale data + * before DIO complete the data IO. + * + * As to previously fallocated extents, ext4 get_block + * will just simply mark the buffer mapped but still + * keep the extents uninitialized. + * + * for non AIO case, we will convert those unwritten extents + * to written after return back from blockdev_direct_IO. + * + * for async DIO, the conversion needs to be defered when + * the IO is completed. The ext4 end_io callback function + * will be called to take care of the conversion work. + * Here for async case, we allocate an io_end structure to + * hook to the iocb. + */ + iocb->private = NULL; + EXT4_I(inode)->cur_aio_dio = NULL; + if (!is_sync_kiocb(iocb)) { + iocb->private = ext4_init_io_end(inode); + if (!iocb->private) + return -ENOMEM; + /* + * we save the io structure for current async + * direct IO, so that later ext4_get_blocks() + * could flag the io structure whether there + * is a unwritten extents needs to be converted + * when IO is completed. + */ + EXT4_I(inode)->cur_aio_dio = iocb->private; + } + + ret = blockdev_direct_IO(rw, iocb, inode, + inode->i_sb->s_bdev, iov, + offset, nr_segs, + ext4_get_block_dio_write, + ext4_end_io_dio); + if (iocb->private) + EXT4_I(inode)->cur_aio_dio = NULL; + /* + * The io_end structure takes a reference to the inode, + * that structure needs to be destroyed and the + * reference to the inode need to be dropped, when IO is + * complete, even with 0 byte write, or failed. + * + * In the successful AIO DIO case, the io_end structure will be + * desctroyed and the reference to the inode will be dropped + * after the end_io call back function is called. + * + * In the case there is 0 byte write, or error case, since + * VFS direct IO won't invoke the end_io call back function, + * we need to free the end_io structure here. + */ + if (ret != -EIOCBQUEUED && ret <= 0 && iocb->private) { + ext4_free_io_end(iocb->private); + iocb->private = NULL; + } else if (ret > 0 && (EXT4_I(inode)->i_state & + EXT4_STATE_DIO_UNWRITTEN)) { + int err; + /* + * for non AIO case, since the IO is already + * completed, we could do the convertion right here + */ + err = ext4_convert_unwritten_extents(inode, + offset, ret); + if (err < 0) + ret = err; + EXT4_I(inode)->i_state &= ~EXT4_STATE_DIO_UNWRITTEN; + } + return ret; + } + + /* for write the the end of file case, we fall back to old way */ + return ext4_ind_direct_IO(rw, iocb, iov, offset, nr_segs); +} + +static ssize_t ext4_direct_IO(int rw, struct kiocb *iocb, + const struct iovec *iov, loff_t offset, + unsigned long nr_segs) +{ + struct file *file = iocb->ki_filp; + struct inode *inode = file->f_mapping->host; + + if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) + return ext4_ext_direct_IO(rw, iocb, iov, offset, nr_segs); + + return ext4_ind_direct_IO(rw, iocb, iov, offset, nr_segs); +} + /* * Pages can be marked dirty completely asynchronously from ext4's journalling * activity. By filemap_sync_pte(), try_to_unmap_one(), etc. We cannot do @@ -3653,13 +4116,16 @@ __le32 *last) { __le32 *p; + int is_metadata = S_ISDIR(inode->i_mode) || S_ISLNK(inode->i_mode); + if (try_to_extend_transaction(handle, inode)) { if (bh) { BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata"); ext4_handle_dirty_metadata(handle, inode, bh); } ext4_mark_inode_dirty(handle, inode); - ext4_journal_test_restart(handle, inode); + ext4_truncate_restart_trans(handle, inode, + blocks_for_truncate(inode)); if (bh) { BUFFER_TRACE(bh, "retaking write access"); ext4_journal_get_write_access(handle, bh); @@ -3682,11 +4148,11 @@ *p = 0; tbh = sb_find_get_block(inode->i_sb, nr); - ext4_forget(handle, 0, inode, tbh, nr); + ext4_forget(handle, is_metadata, inode, tbh, nr); } } - ext4_free_blocks(handle, inode, block_to_free, count, 0); + ext4_free_blocks(handle, inode, block_to_free, count, is_metadata); } /** @@ -3870,7 +4336,8 @@ return; if (try_to_extend_transaction(handle, inode)) { ext4_mark_inode_dirty(handle, inode); - ext4_journal_test_restart(handle, inode); + ext4_truncate_restart_trans(handle, inode, + blocks_for_truncate(inode)); } ext4_free_blocks(handle, inode, nr, 1, 1); @@ -3958,8 +4425,7 @@ if (!ext4_can_truncate(inode)) return; - if (ei->i_disksize && inode->i_size == 0 && - !test_opt(inode->i_sb, NO_AUTO_DA_ALLOC)) + if (inode->i_size == 0 && !test_opt(inode->i_sb, NO_AUTO_DA_ALLOC)) ei->i_state |= EXT4_STATE_DA_ALLOC_CLOSE; if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) { @@ -4313,8 +4779,8 @@ struct ext4_iloc iloc; struct ext4_inode *raw_inode; struct ext4_inode_info *ei; - struct buffer_head *bh; struct inode *inode; + journal_t *journal = EXT4_SB(sb)->s_journal; long ret; int block; @@ -4325,11 +4791,11 @@ return inode; ei = EXT4_I(inode); + iloc.bh = 0; ret = __ext4_get_inode_loc(inode, &iloc, 0); if (ret < 0) goto bad_inode; - bh = iloc.bh; raw_inode = ext4_raw_inode(&iloc); inode->i_mode = le16_to_cpu(raw_inode->i_mode); inode->i_uid = (uid_t)le16_to_cpu(raw_inode->i_uid_low); @@ -4352,7 +4818,6 @@ if (inode->i_mode == 0 || !(EXT4_SB(inode->i_sb)->s_mount_state & EXT4_ORPHAN_FS)) { /* this inode is deleted */ - brelse(bh); ret = -ESTALE; goto bad_inode; } @@ -4369,6 +4834,9 @@ ((__u64)le16_to_cpu(raw_inode->i_file_acl_high)) << 32; inode->i_size = ext4_isize(raw_inode); ei->i_disksize = inode->i_size; +#ifdef CONFIG_QUOTA + ei->i_reserved_quota = 0; +#endif inode->i_generation = le32_to_cpu(raw_inode->i_generation); ei->i_block_group = iloc.block_group; ei->i_last_alloc_group = ~0; @@ -4380,11 +4848,35 @@ ei->i_data[block] = raw_inode->i_block[block]; INIT_LIST_HEAD(&ei->i_orphan); + /* + * Set transaction id's of transactions that have to be committed + * to finish f[data]sync. We set them to currently running transaction + * as we cannot be sure that the inode or some of its metadata isn't + * part of the transaction - the inode could have been reclaimed and + * now it is reread from disk. + */ + if (journal) { + transaction_t *transaction; + tid_t tid; + + spin_lock(&journal->j_state_lock); + if (journal->j_running_transaction) + transaction = journal->j_running_transaction; + else + transaction = journal->j_committing_transaction; + if (transaction) + tid = transaction->t_tid; + else + tid = journal->j_commit_sequence; + spin_unlock(&journal->j_state_lock); + ei->i_sync_tid = tid; + ei->i_datasync_tid = tid; + } + if (EXT4_INODE_SIZE(inode->i_sb) > EXT4_GOOD_OLD_INODE_SIZE) { ei->i_extra_isize = le16_to_cpu(raw_inode->i_extra_isize); if (EXT4_GOOD_OLD_INODE_SIZE + ei->i_extra_isize > EXT4_INODE_SIZE(inode->i_sb)) { - brelse(bh); ret = -EIO; goto bad_inode; } @@ -4416,10 +4908,7 @@ ret = 0; if (ei->i_file_acl && - ((ei->i_file_acl < - (le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block) + - EXT4_SB(sb)->s_gdb_count)) || - (ei->i_file_acl >= ext4_blocks_count(EXT4_SB(sb)->s_es)))) { + !ext4_data_block_valid(EXT4_SB(sb), ei->i_file_acl, 1)) { ext4_error(sb, __func__, "bad extended attribute block %llu in inode #%lu", ei->i_file_acl, inode->i_ino); @@ -4437,10 +4926,8 @@ /* Validate block references which are part of inode */ ret = ext4_check_inode_blockref(inode); } - if (ret) { - brelse(bh); + if (ret) goto bad_inode; - } if (S_ISREG(inode->i_mode)) { inode->i_op = &ext4_file_inode_operations; @@ -4468,7 +4955,6 @@ init_special_inode(inode, inode->i_mode, new_decode_dev(le32_to_cpu(raw_inode->i_block[1]))); } else { - brelse(bh); ret = -EIO; ext4_error(inode->i_sb, __func__, "bogus i_mode (%o) for inode=%lu", @@ -4481,6 +4967,7 @@ return inode; bad_inode: + brelse(iloc.bh); iget_failed(inode); return ERR_PTR(ret); } @@ -4581,8 +5068,7 @@ if (ext4_inode_blocks_set(handle, raw_inode, ei)) goto out_brelse; raw_inode->i_dtime = cpu_to_le32(ei->i_dtime); - /* clear the migrate flag in the raw_inode */ - raw_inode->i_flags = cpu_to_le32(ei->i_flags & ~EXT4_EXT_MIGRATE); + raw_inode->i_flags = cpu_to_le32(ei->i_flags); if (EXT4_SB(inode->i_sb)->s_es->s_creator_os != cpu_to_le32(EXT4_OS_HURD)) raw_inode->i_file_acl_high = @@ -4641,6 +5127,7 @@ err = rc; ei->i_state &= ~EXT4_STATE_NEW; + ext4_update_inode_fsync_trans(handle, inode, 0); out_brelse: brelse(bh); ext4_std_error(inode->i_sb, err); @@ -4684,19 +5171,40 @@ */ int ext4_write_inode(struct inode *inode, int wait) { + int err; + if (current->flags & PF_MEMALLOC) return 0; - if (ext4_journal_current_handle()) { - jbd_debug(1, "called recursively, non-PF_MEMALLOC!\n"); - dump_stack(); - return -EIO; - } + if (EXT4_SB(inode->i_sb)->s_journal) { + if (ext4_journal_current_handle()) { + jbd_debug(1, "called recursively, non-PF_MEMALLOC!\n"); + dump_stack(); + return -EIO; + } - if (!wait) - return 0; + if (!wait) + return 0; + + err = ext4_force_commit(inode->i_sb); + } else { + struct ext4_iloc iloc; - return ext4_force_commit(inode->i_sb); + err = ext4_get_inode_loc(inode, &iloc); + if (err) + return err; + if (wait) + sync_dirty_buffer(iloc.bh); + if (buffer_req(iloc.bh) && !buffer_uptodate(iloc.bh)) { + ext4_error(inode->i_sb, __func__, + "IO error syncing inode, " + "inode=%lu, block=%llu", + inode->i_ino, + (unsigned long long)iloc.bh->b_blocknr); + err = -EIO; + } + } + return err; } /* @@ -4739,8 +5247,8 @@ /* (user+group)*(old+new) structure, inode write (sb, * inode block, ? - but truncate inode update has it) */ - handle = ext4_journal_start(inode, 2*(EXT4_QUOTA_INIT_BLOCKS(inode->i_sb)+ - EXT4_QUOTA_DEL_BLOCKS(inode->i_sb))+3); + handle = ext4_journal_start(inode, (EXT4_MAXQUOTAS_INIT_BLOCKS(inode->i_sb)+ + EXT4_MAXQUOTAS_DEL_BLOCKS(inode->i_sb))+3); if (IS_ERR(handle)) { error = PTR_ERR(handle); goto err_out; @@ -5137,24 +5645,13 @@ handle_t *current_handle = ext4_journal_current_handle(); handle_t *handle; - if (!ext4_handle_valid(current_handle)) { - ext4_mark_inode_dirty(current_handle, inode); - return; - } - handle = ext4_journal_start(inode, 2); if (IS_ERR(handle)) goto out; - if (current_handle && - current_handle->h_transaction != handle->h_transaction) { - /* This task has a transaction open against a different fs */ - printk(KERN_EMERG "%s: transactions do not match!\n", - __func__); - } else { - jbd_debug(5, "marking dirty. outer handle=%p\n", - current_handle); - ext4_mark_inode_dirty(handle, inode); - } + + jbd_debug(5, "marking dirty. outer handle=%p\n", current_handle); + ext4_mark_inode_dirty(handle, inode); + ext4_journal_stop(handle); out: return; @@ -5281,12 +5778,21 @@ else len = PAGE_CACHE_SIZE; + lock_page(page); + /* + * return if we have all the buffers mapped. This avoid + * the need to call write_begin/write_end which does a + * journal_start/journal_stop which can block and take + * long time + */ if (page_has_buffers(page)) { - /* return if we have all the buffers mapped */ if (!walk_page_buffers(NULL, page_buffers(page), 0, len, NULL, - ext4_bh_unmapped)) + ext4_bh_unmapped)) { + unlock_page(page); goto out_unlock; + } } + unlock_page(page); /* * OK, we need to fill the hole... Do write_begin write_end * to do block allocation/reservation.We are not holding --- linux-fsl-imx51-2.6.31.orig/fs/ext4/move_extent.c +++ linux-fsl-imx51-2.6.31/fs/ext4/move_extent.c @@ -19,14 +19,31 @@ #include "ext4_extents.h" #include "ext4.h" -#define get_ext_path(path, inode, block, ret) \ - do { \ - path = ext4_ext_find_extent(inode, block, path); \ - if (IS_ERR(path)) { \ - ret = PTR_ERR(path); \ - path = NULL; \ - } \ - } while (0) +/** + * get_ext_path - Find an extent path for designated logical block number. + * + * @inode: an inode which is searched + * @lblock: logical block number to find an extent path + * @path: pointer to an extent path pointer (for output) + * + * ext4_ext_find_extent wrapper. Return 0 on success, or a negative error value + * on failure. + */ +static inline int +get_ext_path(struct inode *inode, ext4_lblk_t lblock, + struct ext4_ext_path **path) +{ + int ret = 0; + + *path = ext4_ext_find_extent(inode, lblock, *path); + if (IS_ERR(*path)) { + ret = PTR_ERR(*path); + *path = NULL; + } else if ((*path)[ext_depth(inode)].p_ext == NULL) + ret = -ENODATA; + + return ret; +} /** * copy_extent_status - Copy the extent's initialization status @@ -60,12 +77,14 @@ mext_next_extent(struct inode *inode, struct ext4_ext_path *path, struct ext4_extent **extent) { + struct ext4_extent_header *eh; int ppos, leaf_ppos = path->p_depth; ppos = leaf_ppos; if (EXT_LAST_EXTENT(path[ppos].p_hdr) > path[ppos].p_ext) { /* leaf block */ *extent = ++path[ppos].p_ext; + path[ppos].p_block = ext_pblock(path[ppos].p_ext); return 0; } @@ -102,9 +121,18 @@ ext_block_hdr(path[cur_ppos+1].p_bh); } + path[leaf_ppos].p_ext = *extent = NULL; + + eh = path[leaf_ppos].p_hdr; + if (le16_to_cpu(eh->eh_entries) == 0) + /* empty leaf is found */ + return -ENODATA; + /* leaf block */ path[leaf_ppos].p_ext = *extent = EXT_FIRST_EXTENT(path[leaf_ppos].p_hdr); + path[leaf_ppos].p_block = + ext_pblock(path[leaf_ppos].p_ext); return 0; } } @@ -113,47 +141,43 @@ } /** - * mext_double_down_read - Acquire two inodes' read semaphore + * mext_check_null_inode - NULL check for two inodes * - * @orig_inode: original inode structure - * @donor_inode: donor inode structure - * Acquire read semaphore of the two inodes (orig and donor) by i_ino order. + * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. */ -static void -mext_double_down_read(struct inode *orig_inode, struct inode *donor_inode) +static int +mext_check_null_inode(struct inode *inode1, struct inode *inode2, + const char *function) { - struct inode *first = orig_inode, *second = donor_inode; - - BUG_ON(orig_inode == NULL || donor_inode == NULL); + int ret = 0; - /* - * Use the inode number to provide the stable locking order instead - * of its address, because the C language doesn't guarantee you can - * compare pointers that don't come from the same array. - */ - if (donor_inode->i_ino < orig_inode->i_ino) { - first = donor_inode; - second = orig_inode; + if (inode1 == NULL) { + ext4_error(inode2->i_sb, function, + "Both inodes should not be NULL: " + "inode1 NULL inode2 %lu", inode2->i_ino); + ret = -EIO; + } else if (inode2 == NULL) { + ext4_error(inode1->i_sb, function, + "Both inodes should not be NULL: " + "inode1 %lu inode2 NULL", inode1->i_ino); + ret = -EIO; } - - down_read(&EXT4_I(first)->i_data_sem); - down_read(&EXT4_I(second)->i_data_sem); + return ret; } /** - * mext_double_down_write - Acquire two inodes' write semaphore + * double_down_write_data_sem - Acquire two inodes' write lock of i_data_sem * * @orig_inode: original inode structure * @donor_inode: donor inode structure - * Acquire write semaphore of the two inodes (orig and donor) by i_ino order. + * Acquire write lock of i_data_sem of the two inodes (orig and donor) by + * i_ino order. */ static void -mext_double_down_write(struct inode *orig_inode, struct inode *donor_inode) +double_down_write_data_sem(struct inode *orig_inode, struct inode *donor_inode) { struct inode *first = orig_inode, *second = donor_inode; - BUG_ON(orig_inode == NULL || donor_inode == NULL); - /* * Use the inode number to provide the stable locking order instead * of its address, because the C language doesn't guarantee you can @@ -165,37 +189,19 @@ } down_write(&EXT4_I(first)->i_data_sem); - down_write(&EXT4_I(second)->i_data_sem); -} - -/** - * mext_double_up_read - Release two inodes' read semaphore - * - * @orig_inode: original inode structure to be released its lock first - * @donor_inode: donor inode structure to be released its lock second - * Release read semaphore of two inodes (orig and donor). - */ -static void -mext_double_up_read(struct inode *orig_inode, struct inode *donor_inode) -{ - BUG_ON(orig_inode == NULL || donor_inode == NULL); - - up_read(&EXT4_I(orig_inode)->i_data_sem); - up_read(&EXT4_I(donor_inode)->i_data_sem); + down_write_nested(&EXT4_I(second)->i_data_sem, SINGLE_DEPTH_NESTING); } /** - * mext_double_up_write - Release two inodes' write semaphore + * double_up_write_data_sem - Release two inodes' write lock of i_data_sem * * @orig_inode: original inode structure to be released its lock first * @donor_inode: donor inode structure to be released its lock second - * Release write semaphore of two inodes (orig and donor). + * Release write lock of i_data_sem of two inodes (orig and donor). */ static void -mext_double_up_write(struct inode *orig_inode, struct inode *donor_inode) +double_up_write_data_sem(struct inode *orig_inode, struct inode *donor_inode) { - BUG_ON(orig_inode == NULL || donor_inode == NULL); - up_write(&EXT4_I(orig_inode)->i_data_sem); up_write(&EXT4_I(donor_inode)->i_data_sem); } @@ -283,23 +289,23 @@ } if (new_flag) { - get_ext_path(orig_path, orig_inode, eblock, err); - if (orig_path == NULL) + err = get_ext_path(orig_inode, eblock, &orig_path); + if (err) goto out; if (ext4_ext_insert_extent(handle, orig_inode, - orig_path, new_ext)) + orig_path, new_ext, 0)) goto out; } if (end_flag) { - get_ext_path(orig_path, orig_inode, - le32_to_cpu(end_ext->ee_block) - 1, err); - if (orig_path == NULL) + err = get_ext_path(orig_inode, + le32_to_cpu(end_ext->ee_block) - 1, &orig_path); + if (err) goto out; if (ext4_ext_insert_extent(handle, orig_inode, - orig_path, end_ext)) + orig_path, end_ext, 0)) goto out; } out: @@ -519,7 +525,15 @@ * oext |-----------| * new_ext |-------| */ - BUG_ON(le32_to_cpu(oext->ee_block) + oext_alen - 1 < new_ext_end); + if (le32_to_cpu(oext->ee_block) + oext_alen - 1 < new_ext_end) { + ext4_error(orig_inode->i_sb, __func__, + "new_ext_end(%u) should be less than or equal to " + "oext->ee_block(%u) + oext_alen(%d) - 1", + new_ext_end, le32_to_cpu(oext->ee_block), + oext_alen); + ret = -EIO; + goto out; + } /* * Case: new_ext is smaller than original extent @@ -543,6 +557,7 @@ ret = mext_insert_extents(handle, orig_inode, orig_path, o_start, o_end, &start_ext, &new_ext, &end_ext); +out: return ret; } @@ -554,8 +569,10 @@ * @orig_off: block offset of original inode * @donor_off: block offset of donor inode * @max_count: the maximun length of extents + * + * Return 0 on success, or a negative error value on failure. */ -static void +static int mext_calc_swap_extents(struct ext4_extent *tmp_dext, struct ext4_extent *tmp_oext, ext4_lblk_t orig_off, ext4_lblk_t donor_off, @@ -564,6 +581,19 @@ ext4_lblk_t diff, orig_diff; struct ext4_extent dext_old, oext_old; + BUG_ON(orig_off != donor_off); + + /* original and donor extents have to cover the same block offset */ + if (orig_off < le32_to_cpu(tmp_oext->ee_block) || + le32_to_cpu(tmp_oext->ee_block) + + ext4_ext_get_actual_len(tmp_oext) - 1 < orig_off) + return -ENODATA; + + if (orig_off < le32_to_cpu(tmp_dext->ee_block) || + le32_to_cpu(tmp_dext->ee_block) + + ext4_ext_get_actual_len(tmp_dext) - 1 < orig_off) + return -ENODATA; + dext_old = *tmp_dext; oext_old = *tmp_oext; @@ -591,6 +621,8 @@ copy_extent_status(&oext_old, tmp_dext); copy_extent_status(&dext_old, tmp_oext); + + return 0; } /** @@ -601,6 +633,7 @@ * @donor_inode: donor inode * @from: block offset of orig_inode * @count: block count to be replaced + * @err: pointer to save return value * * Replace original inode extents and donor inode extents page by page. * We implement this replacement in the following three steps: @@ -611,33 +644,33 @@ * 3. Change the block information of donor inode to point at the saved * original inode blocks in the dummy extents. * - * Return 0 on success, or a negative error value on failure. + * Return replaced block count. */ static int mext_replace_branches(handle_t *handle, struct inode *orig_inode, struct inode *donor_inode, ext4_lblk_t from, - ext4_lblk_t count) + ext4_lblk_t count, int *err) { struct ext4_ext_path *orig_path = NULL; struct ext4_ext_path *donor_path = NULL; struct ext4_extent *oext, *dext; struct ext4_extent tmp_dext, tmp_oext; ext4_lblk_t orig_off = from, donor_off = from; - int err = 0; int depth; int replaced_count = 0; int dext_alen; - mext_double_down_write(orig_inode, donor_inode); + /* Protect extent trees against block allocations via delalloc */ + double_down_write_data_sem(orig_inode, donor_inode); /* Get the original extent for the block "orig_off" */ - get_ext_path(orig_path, orig_inode, orig_off, err); - if (orig_path == NULL) + *err = get_ext_path(orig_inode, orig_off, &orig_path); + if (*err) goto out; /* Get the donor extent for the head */ - get_ext_path(donor_path, donor_inode, donor_off, err); - if (donor_path == NULL) + *err = get_ext_path(donor_inode, donor_off, &donor_path); + if (*err) goto out; depth = ext_depth(orig_inode); oext = orig_path[depth].p_ext; @@ -647,24 +680,39 @@ dext = donor_path[depth].p_ext; tmp_dext = *dext; - mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, + *err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, donor_off, count); + if (*err) + goto out; /* Loop for the donor extents */ while (1) { /* The extent for donor must be found. */ - BUG_ON(!dext || donor_off != le32_to_cpu(tmp_dext.ee_block)); + if (!dext) { + ext4_error(donor_inode->i_sb, __func__, + "The extent for donor must be found"); + *err = -EIO; + goto out; + } else if (donor_off != le32_to_cpu(tmp_dext.ee_block)) { + ext4_error(donor_inode->i_sb, __func__, + "Donor offset(%u) and the first block of donor " + "extent(%u) should be equal", + donor_off, + le32_to_cpu(tmp_dext.ee_block)); + *err = -EIO; + goto out; + } /* Set donor extent to orig extent */ - err = mext_leaf_block(handle, orig_inode, + *err = mext_leaf_block(handle, orig_inode, orig_path, &tmp_dext, &orig_off); - if (err < 0) + if (*err) goto out; /* Set orig extent to donor extent */ - err = mext_leaf_block(handle, donor_inode, + *err = mext_leaf_block(handle, donor_inode, donor_path, &tmp_oext, &donor_off); - if (err < 0) + if (*err) goto out; dext_alen = ext4_ext_get_actual_len(&tmp_dext); @@ -678,36 +726,26 @@ if (orig_path) ext4_ext_drop_refs(orig_path); - get_ext_path(orig_path, orig_inode, orig_off, err); - if (orig_path == NULL) + *err = get_ext_path(orig_inode, orig_off, &orig_path); + if (*err) goto out; depth = ext_depth(orig_inode); oext = orig_path[depth].p_ext; - if (le32_to_cpu(oext->ee_block) + - ext4_ext_get_actual_len(oext) <= orig_off) { - err = 0; - goto out; - } tmp_oext = *oext; if (donor_path) ext4_ext_drop_refs(donor_path); - get_ext_path(donor_path, donor_inode, - donor_off, err); - if (donor_path == NULL) + *err = get_ext_path(donor_inode, donor_off, &donor_path); + if (*err) goto out; depth = ext_depth(donor_inode); dext = donor_path[depth].p_ext; - if (le32_to_cpu(dext->ee_block) + - ext4_ext_get_actual_len(dext) <= donor_off) { - err = 0; - goto out; - } tmp_dext = *dext; - mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, - donor_off, - count - replaced_count); + *err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, + donor_off, count - replaced_count); + if (*err) + goto out; } out: @@ -720,8 +758,12 @@ kfree(donor_path); } - mext_double_up_write(orig_inode, donor_inode); - return err; + ext4_ext_invalidate_cache(orig_inode); + ext4_ext_invalidate_cache(donor_inode); + + double_up_write_data_sem(orig_inode, donor_inode); + + return replaced_count; } /** @@ -733,16 +775,17 @@ * @data_offset_in_page: block index where data swapping starts * @block_len_in_page: the number of blocks to be swapped * @uninit: orig extent is uninitialized or not + * @err: pointer to save return value * * Save the data in original inode blocks and replace original inode extents * with donor inode extents by calling mext_replace_branches(). - * Finally, write out the saved data in new original inode blocks. Return 0 - * on success, or a negative error value on failure. + * Finally, write out the saved data in new original inode blocks. Return + * replaced block count. */ static int -move_extent_par_page(struct file *o_filp, struct inode *donor_inode, +move_extent_per_page(struct file *o_filp, struct inode *donor_inode, pgoff_t orig_page_offset, int data_offset_in_page, - int block_len_in_page, int uninit) + int block_len_in_page, int uninit, int *err) { struct inode *orig_inode = o_filp->f_dentry->d_inode; struct address_space *mapping = orig_inode->i_mapping; @@ -754,9 +797,11 @@ long long offs = orig_page_offset << PAGE_CACHE_SHIFT; unsigned long blocksize = orig_inode->i_sb->s_blocksize; unsigned int w_flags = 0; - unsigned int tmp_data_len, data_len; + unsigned int tmp_data_size, data_size, replaced_size; void *fsdata; - int ret, i, jblocks; + int i, jblocks; + int err2 = 0; + int replaced_count = 0; int blocks_per_page = PAGE_CACHE_SIZE >> orig_inode->i_blkbits; /* @@ -766,8 +811,8 @@ jblocks = ext4_writepage_trans_blocks(orig_inode) * 2; handle = ext4_journal_start(orig_inode, jblocks); if (IS_ERR(handle)) { - ret = PTR_ERR(handle); - return ret; + *err = PTR_ERR(handle); + return 0; } if (segment_eq(get_fs(), KERNEL_DS)) @@ -783,39 +828,36 @@ * Just swap data blocks between orig and donor. */ if (uninit) { - ret = mext_replace_branches(handle, orig_inode, - donor_inode, orig_blk_offset, - block_len_in_page); - - /* Clear the inode cache not to refer to the old data */ - ext4_ext_invalidate_cache(orig_inode); - ext4_ext_invalidate_cache(donor_inode); + replaced_count = mext_replace_branches(handle, orig_inode, + donor_inode, orig_blk_offset, + block_len_in_page, err); goto out2; } offs = (long long)orig_blk_offset << orig_inode->i_blkbits; - /* Calculate data_len */ + /* Calculate data_size */ if ((orig_blk_offset + block_len_in_page - 1) == ((orig_inode->i_size - 1) >> orig_inode->i_blkbits)) { /* Replace the last block */ - tmp_data_len = orig_inode->i_size & (blocksize - 1); + tmp_data_size = orig_inode->i_size & (blocksize - 1); /* - * If data_len equal zero, it shows data_len is multiples of + * If data_size equal zero, it shows data_size is multiples of * blocksize. So we set appropriate value. */ - if (tmp_data_len == 0) - tmp_data_len = blocksize; + if (tmp_data_size == 0) + tmp_data_size = blocksize; - data_len = tmp_data_len + + data_size = tmp_data_size + ((block_len_in_page - 1) << orig_inode->i_blkbits); - } else { - data_len = block_len_in_page << orig_inode->i_blkbits; - } + } else + data_size = block_len_in_page << orig_inode->i_blkbits; + + replaced_size = data_size; - ret = a_ops->write_begin(o_filp, mapping, offs, data_len, w_flags, + *err = a_ops->write_begin(o_filp, mapping, offs, data_size, w_flags, &page, &fsdata); - if (unlikely(ret < 0)) + if (unlikely(*err < 0)) goto out; if (!PageUptodate(page)) { @@ -836,14 +878,17 @@ /* Release old bh and drop refs */ try_to_release_page(page, 0); - ret = mext_replace_branches(handle, orig_inode, donor_inode, - orig_blk_offset, block_len_in_page); - if (ret < 0) - goto out; - - /* Clear the inode cache not to refer to the old data */ - ext4_ext_invalidate_cache(orig_inode); - ext4_ext_invalidate_cache(donor_inode); + replaced_count = mext_replace_branches(handle, orig_inode, donor_inode, + orig_blk_offset, block_len_in_page, + &err2); + if (err2) { + if (replaced_count) { + block_len_in_page = replaced_count; + replaced_size = + block_len_in_page << orig_inode->i_blkbits; + } else + goto out; + } if (!page_has_buffers(page)) create_empty_buffers(page, 1 << orig_inode->i_blkbits, 0); @@ -853,16 +898,16 @@ bh = bh->b_this_page; for (i = 0; i < block_len_in_page; i++) { - ret = ext4_get_block(orig_inode, + *err = ext4_get_block(orig_inode, (sector_t)(orig_blk_offset + i), bh, 0); - if (ret < 0) + if (*err < 0) goto out; if (bh->b_this_page != NULL) bh = bh->b_this_page; } - ret = a_ops->write_end(o_filp, mapping, offs, data_len, data_len, + *err = a_ops->write_end(o_filp, mapping, offs, data_size, replaced_size, page, fsdata); page = NULL; @@ -871,11 +916,15 @@ if (PageLocked(page)) unlock_page(page); page_cache_release(page); + ext4_journal_stop(handle); } out2: ext4_journal_stop(handle); - return ret < 0 ? ret : 0; + if (err2) + *err = err2; + + return replaced_count; } /** @@ -886,7 +935,6 @@ * @orig_start: logical start offset in block for orig * @donor_start: logical start offset in block for donor * @len: the number of blocks to be moved - * @moved_len: moved block length * * Check the arguments of ext4_move_extents() whether the files can be * exchanged with each other. @@ -894,9 +942,13 @@ */ static int mext_check_arguments(struct inode *orig_inode, - struct inode *donor_inode, __u64 orig_start, - __u64 donor_start, __u64 *len, __u64 moved_len) + struct inode *donor_inode, __u64 orig_start, + __u64 donor_start, __u64 *len) { + ext4_lblk_t orig_blocks, donor_blocks; + unsigned int blkbits = orig_inode->i_blkbits; + unsigned int blocksize = 1 << blkbits; + /* Regular file check */ if (!S_ISREG(orig_inode->i_mode) || !S_ISREG(donor_inode->i_mode)) { ext4_debug("ext4 move extent: The argument files should be " @@ -905,6 +957,16 @@ return -EINVAL; } + if (donor_inode->i_mode & (S_ISUID|S_ISGID)) { + ext4_debug("ext4 move extent: suid or sgid is set" + " to donor file [ino:orig %lu, donor %lu]\n", + orig_inode->i_ino, donor_inode->i_ino); + return -EINVAL; + } + + if (IS_IMMUTABLE(donor_inode) || IS_APPEND(donor_inode)) + return -EPERM; + /* Ext4 move extent does not support swapfile */ if (IS_SWAPFILE(orig_inode) || IS_SWAPFILE(donor_inode)) { ext4_debug("ext4 move extent: The argument files should " @@ -921,14 +983,6 @@ return -EINVAL; } - /* orig and donor should be different file */ - if (orig_inode->i_ino == donor_inode->i_ino) { - ext4_debug("ext4 move extent: The argument files should not " - "be same file [ino:orig %lu, donor %lu]\n", - orig_inode->i_ino, donor_inode->i_ino); - return -EINVAL; - } - /* Ext4 move extent supports only extent based file */ if (!(EXT4_I(orig_inode)->i_flags & EXT4_EXTENTS_FL)) { ext4_debug("ext4 move extent: orig file is not extents " @@ -953,13 +1007,6 @@ return -EINVAL; } - if (moved_len) { - ext4_debug("ext4 move extent: moved_len should be 0 " - "[ino:orig %lu, donor %lu]\n", orig_inode->i_ino, - donor_inode->i_ino); - return -EINVAL; - } - if ((orig_start > MAX_DEFRAG_SIZE) || (donor_start > MAX_DEFRAG_SIZE) || (*len > MAX_DEFRAG_SIZE) || @@ -971,43 +1018,47 @@ } if (orig_inode->i_size > donor_inode->i_size) { - if (orig_start >= donor_inode->i_size) { + donor_blocks = (donor_inode->i_size + blocksize - 1) >> blkbits; + /* TODO: eliminate this artificial restriction */ + if (orig_start >= donor_blocks) { ext4_debug("ext4 move extent: orig start offset " - "[%llu] should be less than donor file size " - "[%lld] [ino:orig %lu, donor_inode %lu]\n", - orig_start, donor_inode->i_size, + "[%llu] should be less than donor file blocks " + "[%u] [ino:orig %lu, donor %lu]\n", + orig_start, donor_blocks, orig_inode->i_ino, donor_inode->i_ino); return -EINVAL; } - if (orig_start + *len > donor_inode->i_size) { + /* TODO: eliminate this artificial restriction */ + if (orig_start + *len > donor_blocks) { ext4_debug("ext4 move extent: End offset [%llu] should " - "be less than donor file size [%lld]." - "So adjust length from %llu to %lld " + "be less than donor file blocks [%u]." + "So adjust length from %llu to %llu " "[ino:orig %lu, donor %lu]\n", - orig_start + *len, donor_inode->i_size, - *len, donor_inode->i_size - orig_start, + orig_start + *len, donor_blocks, + *len, donor_blocks - orig_start, orig_inode->i_ino, donor_inode->i_ino); - *len = donor_inode->i_size - orig_start; + *len = donor_blocks - orig_start; } } else { - if (orig_start >= orig_inode->i_size) { + orig_blocks = (orig_inode->i_size + blocksize - 1) >> blkbits; + if (orig_start >= orig_blocks) { ext4_debug("ext4 move extent: start offset [%llu] " - "should be less than original file size " - "[%lld] [inode:orig %lu, donor %lu]\n", - orig_start, orig_inode->i_size, + "should be less than original file blocks " + "[%u] [ino:orig %lu, donor %lu]\n", + orig_start, orig_blocks, orig_inode->i_ino, donor_inode->i_ino); return -EINVAL; } - if (orig_start + *len > orig_inode->i_size) { + if (orig_start + *len > orig_blocks) { ext4_debug("ext4 move extent: Adjust length " - "from %llu to %lld. Because it should be " - "less than original file size " + "from %llu to %llu. Because it should be " + "less than original file blocks " "[ino:orig %lu, donor %lu]\n", - *len, orig_inode->i_size - orig_start, + *len, orig_blocks - orig_start, orig_inode->i_ino, donor_inode->i_ino); - *len = orig_inode->i_size - orig_start; + *len = orig_blocks - orig_start; } } @@ -1027,18 +1078,23 @@ * @inode1: the inode structure * @inode2: the inode structure * - * Lock two inodes' i_mutex by i_ino order. This function is moved from - * fs/inode.c. + * Lock two inodes' i_mutex by i_ino order. + * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. */ -static void +static int mext_inode_double_lock(struct inode *inode1, struct inode *inode2) { - if (inode1 == NULL || inode2 == NULL || inode1 == inode2) { - if (inode1) - mutex_lock(&inode1->i_mutex); - else if (inode2) - mutex_lock(&inode2->i_mutex); - return; + int ret = 0; + + BUG_ON(inode1 == NULL && inode2 == NULL); + + ret = mext_check_null_inode(inode1, inode2, __func__); + if (ret < 0) + goto out; + + if (inode1 == inode2) { + mutex_lock(&inode1->i_mutex); + goto out; } if (inode1->i_ino < inode2->i_ino) { @@ -1048,6 +1104,9 @@ mutex_lock_nested(&inode2->i_mutex, I_MUTEX_PARENT); mutex_lock_nested(&inode1->i_mutex, I_MUTEX_CHILD); } + +out: + return ret; } /** @@ -1056,17 +1115,28 @@ * @inode1: the inode that is released first * @inode2: the inode that is released second * - * This function is moved from fs/inode.c. + * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. */ -static void +static int mext_inode_double_unlock(struct inode *inode1, struct inode *inode2) { + int ret = 0; + + BUG_ON(inode1 == NULL && inode2 == NULL); + + ret = mext_check_null_inode(inode1, inode2, __func__); + if (ret < 0) + goto out; + if (inode1) mutex_unlock(&inode1->i_mutex); if (inode2 && inode2 != inode1) mutex_unlock(&inode2->i_mutex); + +out: + return ret; } /** @@ -1123,70 +1193,84 @@ ext4_lblk_t block_end, seq_start, add_blocks, file_end, seq_blocks = 0; ext4_lblk_t rest_blocks; pgoff_t orig_page_offset = 0, seq_end_page; - int ret, depth, last_extent = 0; + int ret1, ret2, depth, last_extent = 0; int blocks_per_page = PAGE_CACHE_SIZE >> orig_inode->i_blkbits; int data_offset_in_page; int block_len_in_page; int uninit; - /* protect orig and donor against a truncate */ - mext_inode_double_lock(orig_inode, donor_inode); + /* orig and donor should be different file */ + if (orig_inode->i_ino == donor_inode->i_ino) { + ext4_debug("ext4 move extent: The argument files should not " + "be same file [ino:orig %lu, donor %lu]\n", + orig_inode->i_ino, donor_inode->i_ino); + return -EINVAL; + } + + /* Protect orig and donor inodes against a truncate */ + ret1 = mext_inode_double_lock(orig_inode, donor_inode); + if (ret1 < 0) + return ret1; - mext_double_down_read(orig_inode, donor_inode); + /* Protect extent tree against block allocations via delalloc */ + double_down_write_data_sem(orig_inode, donor_inode); /* Check the filesystem environment whether move_extent can be done */ - ret = mext_check_arguments(orig_inode, donor_inode, orig_start, - donor_start, &len, *moved_len); - mext_double_up_read(orig_inode, donor_inode); - if (ret) - goto out2; + ret1 = mext_check_arguments(orig_inode, donor_inode, orig_start, + donor_start, &len); + if (ret1) + goto out; file_end = (i_size_read(orig_inode) - 1) >> orig_inode->i_blkbits; block_end = block_start + len - 1; if (file_end < block_end) len -= block_end - file_end; - get_ext_path(orig_path, orig_inode, block_start, ret); - if (orig_path == NULL) - goto out2; + ret1 = get_ext_path(orig_inode, block_start, &orig_path); + if (ret1) + goto out; /* Get path structure to check the hole */ - get_ext_path(holecheck_path, orig_inode, block_start, ret); - if (holecheck_path == NULL) + ret1 = get_ext_path(orig_inode, block_start, &holecheck_path); + if (ret1) goto out; depth = ext_depth(orig_inode); ext_cur = holecheck_path[depth].p_ext; - if (ext_cur == NULL) { - ret = -EINVAL; - goto out; - } /* - * Get proper extent whose ee_block is beyond block_start - * if block_start was within the hole. + * Get proper starting location of block replacement if block_start was + * within the hole. */ if (le32_to_cpu(ext_cur->ee_block) + ext4_ext_get_actual_len(ext_cur) - 1 < block_start) { + /* + * The hole exists between extents or the tail of + * original file. + */ last_extent = mext_next_extent(orig_inode, holecheck_path, &ext_cur); if (last_extent < 0) { - ret = last_extent; + ret1 = last_extent; goto out; } last_extent = mext_next_extent(orig_inode, orig_path, &ext_dummy); if (last_extent < 0) { - ret = last_extent; + ret1 = last_extent; goto out; } - } - seq_start = block_start; + seq_start = le32_to_cpu(ext_cur->ee_block); + } else if (le32_to_cpu(ext_cur->ee_block) > block_start) + /* The hole exists at the beginning of original file. */ + seq_start = le32_to_cpu(ext_cur->ee_block); + else + seq_start = block_start; /* No blocks within the specified range. */ if (le32_to_cpu(ext_cur->ee_block) > block_end) { ext4_debug("ext4 move extent: The specified range of file " "may be the hole\n"); - ret = -EINVAL; + ret1 = -EINVAL; goto out; } @@ -1206,7 +1290,7 @@ last_extent = mext_next_extent(orig_inode, holecheck_path, &ext_cur); if (last_extent < 0) { - ret = last_extent; + ret1 = last_extent; break; } add_blocks = ext4_ext_get_actual_len(ext_cur); @@ -1246,29 +1330,39 @@ seq_start = le32_to_cpu(ext_cur->ee_block); rest_blocks = seq_blocks; - /* Discard preallocations of two inodes */ - down_write(&EXT4_I(orig_inode)->i_data_sem); - ext4_discard_preallocations(orig_inode); - up_write(&EXT4_I(orig_inode)->i_data_sem); - - down_write(&EXT4_I(donor_inode)->i_data_sem); - ext4_discard_preallocations(donor_inode); - up_write(&EXT4_I(donor_inode)->i_data_sem); + /* + * Up semaphore to avoid following problems: + * a. transaction deadlock among ext4_journal_start, + * ->write_begin via pagefault, and jbd2_journal_commit + * b. racing with ->readpage, ->write_begin, and ext4_get_block + * in move_extent_per_page + */ + double_up_write_data_sem(orig_inode, donor_inode); while (orig_page_offset <= seq_end_page) { /* Swap original branches with new branches */ - ret = move_extent_par_page(o_filp, donor_inode, + block_len_in_page = move_extent_per_page( + o_filp, donor_inode, orig_page_offset, data_offset_in_page, - block_len_in_page, uninit); - if (ret < 0) - goto out; - orig_page_offset++; + block_len_in_page, uninit, + &ret1); + /* Count how many blocks we have exchanged */ *moved_len += block_len_in_page; - BUG_ON(*moved_len > len); + if (ret1 < 0) + break; + if (*moved_len > len) { + ext4_error(orig_inode->i_sb, __func__, + "We replaced blocks too much! " + "sum of replaced: %llu requested: %llu", + *moved_len, len); + ret1 = -EIO; + break; + } + orig_page_offset++; data_offset_in_page = 0; rest_blocks -= block_len_in_page; if (rest_blocks > blocks_per_page) @@ -1277,20 +1371,23 @@ block_len_in_page = rest_blocks; } + double_down_write_data_sem(orig_inode, donor_inode); + if (ret1 < 0) + break; + /* Decrease buffer counter */ if (holecheck_path) ext4_ext_drop_refs(holecheck_path); - get_ext_path(holecheck_path, orig_inode, - seq_start, ret); - if (holecheck_path == NULL) + ret1 = get_ext_path(orig_inode, seq_start, &holecheck_path); + if (ret1) break; depth = holecheck_path->p_depth; /* Decrease buffer counter */ if (orig_path) ext4_ext_drop_refs(orig_path); - get_ext_path(orig_path, orig_inode, seq_start, ret); - if (orig_path == NULL) + ret1 = get_ext_path(orig_inode, seq_start, &orig_path); + if (ret1) break; ext_cur = holecheck_path[depth].p_ext; @@ -1299,6 +1396,11 @@ } out: + if (*moved_len) { + ext4_discard_preallocations(orig_inode); + ext4_discard_preallocations(donor_inode); + } + if (orig_path) { ext4_ext_drop_refs(orig_path); kfree(orig_path); @@ -1307,14 +1409,13 @@ ext4_ext_drop_refs(holecheck_path); kfree(holecheck_path); } -out2: - mext_inode_double_unlock(orig_inode, donor_inode); - - if (ret) - return ret; + double_up_write_data_sem(orig_inode, donor_inode); + ret2 = mext_inode_double_unlock(orig_inode, donor_inode); - /* All of the specified blocks must be exchanged in succeed */ - BUG_ON(*moved_len != len); + if (ret1) + return ret1; + else if (ret2) + return ret2; return 0; } --- linux-fsl-imx51-2.6.31.orig/fs/ext4/ext4.h +++ linux-fsl-imx51-2.6.31/fs/ext4/ext4.h @@ -88,6 +88,8 @@ #define EXT4_MB_HINT_TRY_GOAL 512 /* blocks already pre-reserved by delayed allocation */ #define EXT4_MB_DELALLOC_RESERVED 1024 +/* We are doing stream allocation */ +#define EXT4_MB_STREAM_ALLOC 2048 struct ext4_allocation_request { @@ -111,6 +113,33 @@ unsigned int flags; }; +#define DIO_AIO_UNWRITTEN 0x1 +typedef struct ext4_io_end { + struct list_head list; /* per-file finished AIO list */ + struct inode *inode; /* file being written to */ + unsigned int flag; /* sync IO or AIO */ + int error; /* I/O error code */ + ext4_lblk_t offset; /* offset in the file */ + size_t size; /* size of the extent */ + struct work_struct work; /* data work queue */ +} ext4_io_end_t; + +/* + * Delayed allocation stuff + */ + +struct mpage_da_data { + struct inode *inode; + sector_t b_blocknr; /* start block number of extent */ + size_t b_size; /* size of extent */ + unsigned long b_state; /* state of the extent */ + unsigned long first_page, next_page; /* extent of pages */ + struct writeback_control *wbc; + int io_done; + int pages_written; + int retval; +}; + /* * Special inodes numbers */ @@ -251,7 +280,6 @@ #define EXT4_TOPDIR_FL 0x00020000 /* Top of directory hierarchies*/ #define EXT4_HUGE_FILE_FL 0x00040000 /* Set to each huge file */ #define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */ -#define EXT4_EXT_MIGRATE 0x00100000 /* Inode is migrating */ #define EXT4_RESERVED_FL 0x80000000 /* reserved for ext4 lib */ #define EXT4_FL_USER_VISIBLE 0x000BDFFF /* User visible flags */ @@ -289,6 +317,8 @@ #define EXT4_STATE_XATTR 0x00000004 /* has in-inode xattrs */ #define EXT4_STATE_NO_EXPAND 0x00000008 /* No space for expansion */ #define EXT4_STATE_DA_ALLOC_CLOSE 0x00000010 /* Alloc DA blks on close */ +#define EXT4_STATE_EXT_MIGRATE 0x00000020 /* Inode is migrating */ +#define EXT4_STATE_DIO_UNWRITTEN 0x00000040 /* need convert on dio done*/ /* Used to pass group descriptor data when online resize is done */ struct ext4_new_group_input { @@ -330,7 +360,16 @@ /* Call ext4_da_update_reserve_space() after successfully allocating the blocks */ #define EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE 0x0008 - + /* caller is from the direct IO path, request to creation of an + unitialized extents if not allocated, split the uninitialized + extent if blocks has been preallocated already*/ +#define EXT4_GET_BLOCKS_DIO 0x0010 +#define EXT4_GET_BLOCKS_CONVERT 0x0020 +#define EXT4_GET_BLOCKS_DIO_CREATE_EXT (EXT4_GET_BLOCKS_DIO|\ + EXT4_GET_BLOCKS_CREATE_UNINIT_EXT) + /* Convert extent to initialized after direct IO complete */ +#define EXT4_GET_BLOCKS_DIO_CONVERT_EXT (EXT4_GET_BLOCKS_CONVERT|\ + EXT4_GET_BLOCKS_DIO_CREATE_EXT) /* * ioctl commands @@ -386,6 +425,9 @@ #endif }; +/* Max physical block we can addres w/o extents */ +#define EXT4_MAX_BLOCK_FILE_PHYS 0xFFFFFFFF + /* * Structure of an inode on the disk */ @@ -481,8 +523,8 @@ static inline __le32 ext4_encode_extra_time(struct timespec *time) { return cpu_to_le32((sizeof(time->tv_sec) > 4 ? - time->tv_sec >> 32 : 0) | - ((time->tv_nsec << 2) & EXT4_NSEC_MASK)); + (time->tv_sec >> 32) & EXT4_EPOCH_MASK : 0) | + ((time->tv_nsec << EXT4_EPOCH_BITS) & EXT4_NSEC_MASK)); } static inline void ext4_decode_extra_time(struct timespec *time, __le32 extra) @@ -490,7 +532,7 @@ if (sizeof(time->tv_sec) > 4) time->tv_sec |= (__u64)(le32_to_cpu(extra) & EXT4_EPOCH_MASK) << 32; - time->tv_nsec = (le32_to_cpu(extra) & EXT4_NSEC_MASK) >> 2; + time->tv_nsec = (le32_to_cpu(extra) & EXT4_NSEC_MASK) >> EXT4_EPOCH_BITS; } #define EXT4_INODE_SET_XTIME(xtime, inode, raw_inode) \ @@ -653,6 +695,22 @@ __u16 i_extra_isize; spinlock_t i_block_reservation_lock; +#ifdef CONFIG_QUOTA + /* quota space reservation, managed internally by quota code */ + qsize_t i_reserved_quota; +#endif + + /* completed async DIOs that might need unwritten extents handling */ + struct list_head i_aio_dio_complete_list; + /* current io_end structure for async DIO write*/ + ext4_io_end_t *cur_aio_dio; + + /* + * Transactions that contain inode's metadata needed to complete + * fsync and fdatasync, respectively. + */ + tid_t i_sync_tid; + tid_t i_datasync_tid; }; /* @@ -700,6 +758,7 @@ #define EXT4_MOUNT_DELALLOC 0x8000000 /* Delalloc support */ #define EXT4_MOUNT_DATA_ERR_ABORT 0x10000000 /* Abort on file data write */ #define EXT4_MOUNT_BLOCK_VALIDITY 0x20000000 /* Block validity checking */ +#define EXT4_MOUNT_DISCARD 0x40000000 /* Issue DISCARD requests */ #define clear_opt(o, opt) o &= ~EXT4_MOUNT_##opt #define set_opt(o, opt) o |= EXT4_MOUNT_##opt @@ -841,6 +900,7 @@ unsigned long s_gdb_count; /* Number of group descriptor blocks */ unsigned long s_desc_per_block; /* Number of group descriptors per block */ ext4_group_t s_groups_count; /* Number of groups in the fs */ + ext4_group_t s_blockfile_groups;/* Groups acceptable for non-extent files */ unsigned long s_overhead_last; /* Last calculated overhead */ unsigned long s_blocks_last; /* Last seen block count */ loff_t s_bitmap_maxbytes; /* max bytes for bitmap files */ @@ -923,6 +983,7 @@ unsigned int s_mb_stats; unsigned int s_mb_order2_reqs; unsigned int s_mb_group_prealloc; + unsigned int s_max_writeback_mb_bump; /* where last allocation was done - for stream allocation */ unsigned long s_mb_last_group; unsigned long s_mb_last_start; @@ -950,6 +1011,7 @@ atomic_t s_mb_lost_chunks; atomic_t s_mb_preallocated; atomic_t s_mb_discarded; + atomic_t s_lock_busy; /* locality groups */ struct ext4_locality_group *s_locality_groups; @@ -960,6 +1022,9 @@ unsigned int s_log_groups_per_flex; struct flex_groups *s_flex_groups; + + /* workqueue for dio unwritten */ + struct workqueue_struct *dio_unwritten_wq; }; static inline struct ext4_sb_info *EXT4_SB(struct super_block *sb) @@ -1367,6 +1432,7 @@ extern int ext4_get_inode_loc(struct inode *, struct ext4_iloc *); extern int ext4_can_truncate(struct inode *inode); extern void ext4_truncate(struct inode *); +extern int ext4_truncate_restart_trans(handle_t *, struct inode *, int nblocks); extern void ext4_set_inode_flags(struct inode *); extern void ext4_get_inode_flags(struct ext4_inode_info *); extern int ext4_alloc_da_blocks(struct inode *inode); @@ -1377,8 +1443,8 @@ extern int ext4_block_truncate_page(handle_t *handle, struct address_space *mapping, loff_t from); extern int ext4_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf); -extern qsize_t ext4_get_reserved_space(struct inode *inode); - +extern qsize_t *ext4_get_reserved_space(struct inode *inode); +extern int flush_aio_dio_completed_IO(struct inode *inode); /* ioctl.c */ extern long ext4_ioctl(struct file *, unsigned int, unsigned long); extern long ext4_compat_ioctl(struct file *, unsigned int, unsigned long); @@ -1591,15 +1657,42 @@ #define EXT4_MB_GRP_NEED_INIT(grp) \ (test_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &((grp)->bb_state))) +#define EXT4_MAX_CONTENTION 8 +#define EXT4_CONTENTION_THRESHOLD 2 + static inline spinlock_t *ext4_group_lock_ptr(struct super_block *sb, ext4_group_t group) { return bgl_lock_ptr(EXT4_SB(sb)->s_blockgroup_lock, group); } +/* + * Returns true if the filesystem is busy enough that attempts to + * access the block group locks has run into contention. + */ +static inline int ext4_fs_is_busy(struct ext4_sb_info *sbi) +{ + return (atomic_read(&sbi->s_lock_busy) > EXT4_CONTENTION_THRESHOLD); +} + static inline void ext4_lock_group(struct super_block *sb, ext4_group_t group) { - spin_lock(ext4_group_lock_ptr(sb, group)); + spinlock_t *lock = ext4_group_lock_ptr(sb, group); + if (spin_trylock(lock)) + /* + * We're able to grab the lock right away, so drop the + * lock contention counter. + */ + atomic_add_unless(&EXT4_SB(sb)->s_lock_busy, -1, 0); + else { + /* + * The lock is busy, so bump the contention counter, + * and then wait on the spin lock. + */ + atomic_add_unless(&EXT4_SB(sb)->s_lock_busy, 1, + EXT4_MAX_CONTENTION); + spin_lock(lock); + } } static inline void ext4_unlock_group(struct super_block *sb, @@ -1650,6 +1743,8 @@ extern void ext4_ext_release(struct super_block *); extern long ext4_fallocate(struct inode *inode, int mode, loff_t offset, loff_t len); +extern int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset, + loff_t len); extern int ext4_get_blocks(handle_t *handle, struct inode *inode, sector_t block, unsigned int max_blocks, struct buffer_head *bh, int flags); @@ -1678,6 +1773,8 @@ set_bit(BH_BITMAP_UPTODATE, &(bh)->b_state); } +#define in_range(b, first, len) ((b) >= (first) && (b) <= (first) + (len) - 1) + #endif /* __KERNEL__ */ #endif /* _EXT4_H */ --- linux-fsl-imx51-2.6.31.orig/fs/ext4/namei.c +++ linux-fsl-imx51-2.6.31/fs/ext4/namei.c @@ -1292,9 +1292,6 @@ * add_dirent_to_buf will attempt search the directory block for * space. It will return -ENOSPC if no space is available, and -EIO * and -EEXIST if directory entry already exists. - * - * NOTE! bh is NOT released in the case where ENOSPC is returned. In - * all other cases bh is released. */ static int add_dirent_to_buf(handle_t *handle, struct dentry *dentry, struct inode *inode, struct ext4_dir_entry_2 *de, @@ -1315,14 +1312,10 @@ top = bh->b_data + blocksize - reclen; while ((char *) de <= top) { if (!ext4_check_dir_entry("ext4_add_entry", dir, de, - bh, offset)) { - brelse(bh); + bh, offset)) return -EIO; - } - if (ext4_match(namelen, name, de)) { - brelse(bh); + if (ext4_match(namelen, name, de)) return -EEXIST; - } nlen = EXT4_DIR_REC_LEN(de->name_len); rlen = ext4_rec_len_from_disk(de->rec_len, blocksize); if ((de->inode? rlen - nlen: rlen) >= reclen) @@ -1337,7 +1330,6 @@ err = ext4_journal_get_write_access(handle, bh); if (err) { ext4_std_error(dir->i_sb, err); - brelse(bh); return err; } @@ -1377,7 +1369,6 @@ err = ext4_handle_dirty_metadata(handle, dir, bh); if (err) ext4_std_error(dir->i_sb, err); - brelse(bh); return 0; } @@ -1471,7 +1462,9 @@ if (!(de)) return retval; - return add_dirent_to_buf(handle, dentry, inode, de, bh); + retval = add_dirent_to_buf(handle, dentry, inode, de, bh); + brelse(bh); + return retval; } /* @@ -1514,8 +1507,10 @@ if(!bh) return retval; retval = add_dirent_to_buf(handle, dentry, inode, NULL, bh); - if (retval != -ENOSPC) + if (retval != -ENOSPC) { + brelse(bh); return retval; + } if (blocks == 1 && !dx_fallback && EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_DIR_INDEX)) @@ -1528,7 +1523,9 @@ de = (struct ext4_dir_entry_2 *) bh->b_data; de->inode = 0; de->rec_len = ext4_rec_len_to_disk(blocksize, blocksize); - return add_dirent_to_buf(handle, dentry, inode, de, bh); + retval = add_dirent_to_buf(handle, dentry, inode, de, bh); + brelse(bh); + return retval; } /* @@ -1561,10 +1558,8 @@ goto journal_error; err = add_dirent_to_buf(handle, dentry, inode, NULL, bh); - if (err != -ENOSPC) { - bh = NULL; + if (err != -ENOSPC) goto cleanup; - } /* Block full, should compress but for now just split */ dxtrace(printk(KERN_DEBUG "using %u of %u node entries\n", @@ -1590,9 +1585,9 @@ goto cleanup; node2 = (struct dx_node *)(bh2->b_data); entries2 = node2->entries; + memset(&node2->fake, 0, sizeof(struct fake_dirent)); node2->fake.rec_len = ext4_rec_len_to_disk(sb->s_blocksize, sb->s_blocksize); - node2->fake.inode = 0; BUFFER_TRACE(frame->bh, "get_write_access"); err = ext4_journal_get_write_access(handle, frame->bh); if (err) @@ -1657,7 +1652,6 @@ if (!de) goto cleanup; err = add_dirent_to_buf(handle, dentry, inode, de, bh); - bh = NULL; goto cleanup; journal_error: @@ -1775,7 +1769,7 @@ retry: handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) + EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 + - 2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb)); + EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb)); if (IS_ERR(handle)) return PTR_ERR(handle); @@ -1809,7 +1803,7 @@ retry: handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) + EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 + - 2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb)); + EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb)); if (IS_ERR(handle)) return PTR_ERR(handle); @@ -1846,7 +1840,7 @@ retry: handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) + EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 + - 2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb)); + EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb)); if (IS_ERR(handle)) return PTR_ERR(handle); @@ -2068,7 +2062,8 @@ struct ext4_iloc iloc; int err = 0; - if (!ext4_handle_valid(handle)) + /* ext4_handle_valid() assumes a valid handle_t pointer */ + if (handle && !ext4_handle_valid(handle)) return 0; mutex_lock(&EXT4_SB(inode->i_sb)->s_orphan_lock); @@ -2258,7 +2253,7 @@ retry: handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) + EXT4_INDEX_EXTRA_TRANS_BLOCKS + 5 + - 2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb)); + EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb)); if (IS_ERR(handle)) return PTR_ERR(handle); @@ -2310,7 +2305,7 @@ struct inode *inode = old_dentry->d_inode; int err, retries = 0; - if (EXT4_DIR_LINK_MAX(inode)) + if (inode->i_nlink >= EXT4_LINK_MAX) return -EMLINK; /* @@ -2413,7 +2408,7 @@ goto end_rename; retval = -EMLINK; if (!new_inode && new_dir != old_dir && - new_dir->i_nlink >= EXT4_LINK_MAX) + EXT4_DIR_LINK_MAX(new_dir)) goto end_rename; } if (!new_bh) { --- linux-fsl-imx51-2.6.31.orig/fs/ext4/migrate.c +++ linux-fsl-imx51-2.6.31/fs/ext4/migrate.c @@ -75,7 +75,7 @@ goto err_out; } } - retval = ext4_ext_insert_extent(handle, inode, path, &newext); + retval = ext4_ext_insert_extent(handle, inode, path, &newext, 0); err_out: if (path) { ext4_ext_drop_refs(path); @@ -238,7 +238,7 @@ * So allocate a credit of 3. We may update * quota (user and group). */ - needed = 3 + 2*EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb); + needed = 3 + EXT4_MAXQUOTAS_TRANS_BLOCKS(inode->i_sb); if (ext4_journal_extend(handle, needed) != 0) retval = ext4_journal_restart(handle, needed); @@ -353,17 +353,16 @@ down_write(&EXT4_I(inode)->i_data_sem); /* - * if EXT4_EXT_MIGRATE is cleared a block allocation + * if EXT4_STATE_EXT_MIGRATE is cleared a block allocation * happened after we started the migrate. We need to * fail the migrate */ - if (!(EXT4_I(inode)->i_flags & EXT4_EXT_MIGRATE)) { + if (!(EXT4_I(inode)->i_state & EXT4_STATE_EXT_MIGRATE)) { retval = -EAGAIN; up_write(&EXT4_I(inode)->i_data_sem); goto err_out; } else - EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags & - ~EXT4_EXT_MIGRATE; + EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE; /* * We have the extent map build with the tmp inode. * Now copy the i_data across @@ -478,7 +477,7 @@ handle = ext4_journal_start(inode, EXT4_DATA_TRANS_BLOCKS(inode->i_sb) + EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 + - 2 * EXT4_QUOTA_INIT_BLOCKS(inode->i_sb) + EXT4_MAXQUOTAS_INIT_BLOCKS(inode->i_sb) + 1); if (IS_ERR(handle)) { retval = PTR_ERR(handle); @@ -517,14 +516,15 @@ * when we add extents we extent the journal */ /* - * Even though we take i_mutex we can still cause block allocation - * via mmap write to holes. If we have allocated new blocks we fail - * migrate. New block allocation will clear EXT4_EXT_MIGRATE flag. - * The flag is updated with i_data_sem held to prevent racing with - * block allocation. + * Even though we take i_mutex we can still cause block + * allocation via mmap write to holes. If we have allocated + * new blocks we fail migrate. New block allocation will + * clear EXT4_STATE_EXT_MIGRATE flag. The flag is updated + * with i_data_sem held to prevent racing with block + * allocation. */ down_read((&EXT4_I(inode)->i_data_sem)); - EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags | EXT4_EXT_MIGRATE; + EXT4_I(inode)->i_state |= EXT4_STATE_EXT_MIGRATE; up_read((&EXT4_I(inode)->i_data_sem)); handle = ext4_journal_start(inode, 1); @@ -618,7 +618,7 @@ tmp_inode->i_nlink = 0; ext4_journal_stop(handle); - + unlock_new_inode(tmp_inode); iput(tmp_inode); return retval; --- linux-fsl-imx51-2.6.31.orig/fs/ext4/mballoc.c +++ linux-fsl-imx51-2.6.31/fs/ext4/mballoc.c @@ -908,6 +908,97 @@ return err; } +static noinline_for_stack +int ext4_mb_init_group(struct super_block *sb, ext4_group_t group) +{ + + int ret = 0; + void *bitmap; + int blocks_per_page; + int block, pnum, poff; + int num_grp_locked = 0; + struct ext4_group_info *this_grp; + struct ext4_sb_info *sbi = EXT4_SB(sb); + struct inode *inode = sbi->s_buddy_cache; + struct page *page = NULL, *bitmap_page = NULL; + + mb_debug("init group %lu\n", group); + blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; + this_grp = ext4_get_group_info(sb, group); + /* + * This ensures we don't add group + * to this buddy cache via resize + */ + num_grp_locked = ext4_mb_get_buddy_cache_lock(sb, group); + if (!EXT4_MB_GRP_NEED_INIT(this_grp)) { + /* + * somebody initialized the group + * return without doing anything + */ + ret = 0; + goto err; + } + /* + * the buddy cache inode stores the block bitmap + * and buddy information in consecutive blocks. + * So for each group we need two blocks. + */ + block = group * 2; + pnum = block / blocks_per_page; + poff = block % blocks_per_page; + page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); + if (page) { + BUG_ON(page->mapping != inode->i_mapping); + ret = ext4_mb_init_cache(page, NULL); + if (ret) { + unlock_page(page); + goto err; + } + unlock_page(page); + } + if (page == NULL || !PageUptodate(page)) { + ret = -EIO; + goto err; + } + mark_page_accessed(page); + bitmap_page = page; + bitmap = page_address(page) + (poff * sb->s_blocksize); + + /* init buddy cache */ + block++; + pnum = block / blocks_per_page; + poff = block % blocks_per_page; + page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); + if (page == bitmap_page) { + /* + * If both the bitmap and buddy are in + * the same page we don't need to force + * init the buddy + */ + unlock_page(page); + } else if (page) { + BUG_ON(page->mapping != inode->i_mapping); + ret = ext4_mb_init_cache(page, bitmap); + if (ret) { + unlock_page(page); + goto err; + } + unlock_page(page); + } + if (page == NULL || !PageUptodate(page)) { + ret = -EIO; + goto err; + } + mark_page_accessed(page); +err: + ext4_mb_put_buddy_cache_lock(sb, group, num_grp_locked); + if (bitmap_page) + page_cache_release(bitmap_page); + if (page) + page_cache_release(page); + return ret; +} + static noinline_for_stack int ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, struct ext4_buddy *e4b) @@ -941,8 +1032,26 @@ * groups mapped by the page is blocked * till we are done with allocation */ +repeat_load_buddy: down_read(e4b->alloc_semp); + if (unlikely(EXT4_MB_GRP_NEED_INIT(grp))) { + /* we need to check for group need init flag + * with alloc_semp held so that we can be sure + * that new blocks didn't get added to the group + * when we are loading the buddy cache + */ + up_read(e4b->alloc_semp); + /* + * we need full data about the group + * to make a good selection + */ + ret = ext4_mb_init_group(sb, group); + if (ret) + return ret; + goto repeat_load_buddy; + } + /* * the buddy cache inode stores the block bitmap * and buddy information in consecutive blocks. @@ -1360,7 +1469,7 @@ ac->alloc_semp = e4b->alloc_semp; e4b->alloc_semp = NULL; /* store last allocated for subsequent stream allocation */ - if ((ac->ac_flags & EXT4_MB_HINT_DATA)) { + if (ac->ac_flags & EXT4_MB_STREAM_ALLOC) { spin_lock(&sbi->s_md_lock); sbi->s_mb_last_group = ac->ac_f_ex.fe_group; sbi->s_mb_last_start = ac->ac_f_ex.fe_start; @@ -1837,97 +1946,6 @@ } -static noinline_for_stack -int ext4_mb_init_group(struct super_block *sb, ext4_group_t group) -{ - - int ret; - void *bitmap; - int blocks_per_page; - int block, pnum, poff; - int num_grp_locked = 0; - struct ext4_group_info *this_grp; - struct ext4_sb_info *sbi = EXT4_SB(sb); - struct inode *inode = sbi->s_buddy_cache; - struct page *page = NULL, *bitmap_page = NULL; - - mb_debug("init group %lu\n", group); - blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; - this_grp = ext4_get_group_info(sb, group); - /* - * This ensures we don't add group - * to this buddy cache via resize - */ - num_grp_locked = ext4_mb_get_buddy_cache_lock(sb, group); - if (!EXT4_MB_GRP_NEED_INIT(this_grp)) { - /* - * somebody initialized the group - * return without doing anything - */ - ret = 0; - goto err; - } - /* - * the buddy cache inode stores the block bitmap - * and buddy information in consecutive blocks. - * So for each group we need two blocks. - */ - block = group * 2; - pnum = block / blocks_per_page; - poff = block % blocks_per_page; - page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); - if (page) { - BUG_ON(page->mapping != inode->i_mapping); - ret = ext4_mb_init_cache(page, NULL); - if (ret) { - unlock_page(page); - goto err; - } - unlock_page(page); - } - if (page == NULL || !PageUptodate(page)) { - ret = -EIO; - goto err; - } - mark_page_accessed(page); - bitmap_page = page; - bitmap = page_address(page) + (poff * sb->s_blocksize); - - /* init buddy cache */ - block++; - pnum = block / blocks_per_page; - poff = block % blocks_per_page; - page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); - if (page == bitmap_page) { - /* - * If both the bitmap and buddy are in - * the same page we don't need to force - * init the buddy - */ - unlock_page(page); - } else if (page) { - BUG_ON(page->mapping != inode->i_mapping); - ret = ext4_mb_init_cache(page, bitmap); - if (ret) { - unlock_page(page); - goto err; - } - unlock_page(page); - } - if (page == NULL || !PageUptodate(page)) { - ret = -EIO; - goto err; - } - mark_page_accessed(page); -err: - ext4_mb_put_buddy_cache_lock(sb, group, num_grp_locked); - if (bitmap_page) - page_cache_release(bitmap_page); - if (page) - page_cache_release(page); - return ret; -} - static noinline_for_stack int ext4_mb_regular_allocator(struct ext4_allocation_context *ac) { @@ -1938,11 +1956,14 @@ struct ext4_sb_info *sbi; struct super_block *sb; struct ext4_buddy e4b; - loff_t size, isize; sb = ac->ac_sb; sbi = EXT4_SB(sb); ngroups = ext4_get_groups_count(sb); + /* non-extent files are limited to low blocks/groups */ + if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL)) + ngroups = sbi->s_blockfile_groups; + BUG_ON(ac->ac_status == AC_STATUS_FOUND); /* first, try the goal */ @@ -1974,20 +1995,16 @@ } bsbits = ac->ac_sb->s_blocksize_bits; - /* if stream allocation is enabled, use global goal */ - size = ac->ac_o_ex.fe_logical + ac->ac_o_ex.fe_len; - isize = i_size_read(ac->ac_inode) >> bsbits; - if (size < isize) - size = isize; - if (size < sbi->s_mb_stream_request && - (ac->ac_flags & EXT4_MB_HINT_DATA)) { + /* if stream allocation is enabled, use global goal */ + if (ac->ac_flags & EXT4_MB_STREAM_ALLOC) { /* TBD: may be hot point */ spin_lock(&sbi->s_md_lock); ac->ac_g_ex.fe_group = sbi->s_mb_last_group; ac->ac_g_ex.fe_start = sbi->s_mb_last_start; spin_unlock(&sbi->s_md_lock); } + /* Let's just scan groups to find more-less suitable blocks */ cr = ac->ac_2order ? 0 : 1; /* @@ -2015,27 +2032,6 @@ if (grp->bb_free == 0) continue; - /* - * if the group is already init we check whether it is - * a good group and if not we don't load the buddy - */ - if (EXT4_MB_GRP_NEED_INIT(grp)) { - /* - * we need full data about the group - * to make a good selection - */ - err = ext4_mb_init_group(sb, group); - if (err) - goto out; - } - - /* - * If the particular group doesn't satisfy our - * criteria we continue with the next group - */ - if (!ext4_mb_good_group(ac, group, cr)) - continue; - err = ext4_mb_load_buddy(sb, group, &e4b); if (err) goto out; @@ -2571,13 +2567,11 @@ { ext4_group_t ngroups = ext4_get_groups_count(sb); ext4_group_t i; - int metalen; struct ext4_sb_info *sbi = EXT4_SB(sb); struct ext4_super_block *es = sbi->s_es; int num_meta_group_infos; int num_meta_group_infos_max; int array_size; - struct ext4_group_info **meta_group_info; struct ext4_group_desc *desc; /* This is the number of blocks used by GDT */ @@ -2622,22 +2616,6 @@ goto err_freesgi; } EXT4_I(sbi->s_buddy_cache)->i_disksize = 0; - - metalen = sizeof(*meta_group_info) << EXT4_DESC_PER_BLOCK_BITS(sb); - for (i = 0; i < num_meta_group_infos; i++) { - if ((i + 1) == num_meta_group_infos) - metalen = sizeof(*meta_group_info) * - (ngroups - - (i << EXT4_DESC_PER_BLOCK_BITS(sb))); - meta_group_info = kmalloc(metalen, GFP_KERNEL); - if (meta_group_info == NULL) { - printk(KERN_ERR "EXT4-fs: can't allocate mem for a " - "buddy group\n"); - goto err_freemeta; - } - sbi->s_group_info[i] = meta_group_info; - } - for (i = 0; i < ngroups; i++) { desc = ext4_get_group_desc(sb, i, NULL); if (desc == NULL) { @@ -2655,7 +2633,6 @@ while (i-- > 0) kfree(ext4_get_group_info(sb, i)); i = num_meta_group_infos; -err_freemeta: while (i-- > 0) kfree(sbi->s_group_info[i]); iput(sbi->s_buddy_cache); @@ -2833,7 +2810,6 @@ struct ext4_group_info *db; int err, count = 0, count2 = 0; struct ext4_free_data *entry; - ext4_fsblk_t discard_block; struct list_head *l, *ltmp; list_for_each_safe(l, ltmp, &txn->t_private_list) { @@ -2863,13 +2839,19 @@ page_cache_release(e4b.bd_bitmap_page); } ext4_unlock_group(sb, entry->group); - discard_block = (ext4_fsblk_t) entry->group * EXT4_BLOCKS_PER_GROUP(sb) - + entry->start_blk - + le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block); - trace_ext4_discard_blocks(sb, (unsigned long long)discard_block, - entry->count); - sb_issue_discard(sb, discard_block, entry->count); - + if (test_opt(sb, DISCARD)) { + ext4_fsblk_t discard_block; + struct ext4_super_block *es = EXT4_SB(sb)->s_es; + + discard_block = (ext4_fsblk_t)entry->group * + EXT4_BLOCKS_PER_GROUP(sb) + + entry->start_blk + + le32_to_cpu(es->s_first_data_block); + trace_ext4_discard_blocks(sb, + (unsigned long long)discard_block, + entry->count); + sb_issue_discard(sb, discard_block, entry->count); + } kmem_cache_free(ext4_free_ext_cachep, entry); ext4_mb_release_desc(&e4b); } @@ -3276,6 +3258,24 @@ } /* + * Called on failure; free up any blocks from the inode PA for this + * context. We don't need this for MB_GROUP_PA because we only change + * pa_free in ext4_mb_release_context(), but on failure, we've already + * zeroed out ac->ac_b_ex.fe_len, so group_pa->pa_free is not changed. + */ +static void ext4_discard_allocated_blocks(struct ext4_allocation_context *ac) +{ + struct ext4_prealloc_space *pa = ac->ac_pa; + int len; + + if (pa && pa->pa_type == MB_INODE_PA) { + len = ac->ac_b_ex.fe_len; + pa->pa_free += len; + } + +} + +/* * use blocks preallocated to inode */ static void ext4_mb_use_inode_pa(struct ext4_allocation_context *ac, @@ -3382,6 +3382,11 @@ ac->ac_o_ex.fe_logical >= pa->pa_lstart + pa->pa_len) continue; + /* non-extent files can't have physical blocks past 2^32 */ + if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL) && + pa->pa_pstart + pa->pa_len > EXT4_MAX_BLOCK_FILE_PHYS) + continue; + /* found preallocated blocks, use them */ spin_lock(&pa->pa_lock); if (pa->pa_deleted == 0 && pa->pa_free) { @@ -4174,16 +4179,26 @@ if (!(ac->ac_flags & EXT4_MB_HINT_DATA)) return; + if (unlikely(ac->ac_flags & EXT4_MB_HINT_GOAL_ONLY)) + return; + size = ac->ac_o_ex.fe_logical + ac->ac_o_ex.fe_len; - isize = i_size_read(ac->ac_inode) >> bsbits; - size = max(size, isize); + isize = (i_size_read(ac->ac_inode) + ac->ac_sb->s_blocksize - 1) + >> bsbits; - /* don't use group allocation for large files */ - if (size >= sbi->s_mb_stream_request) + if ((size == isize) && + !ext4_fs_is_busy(sbi) && + (atomic_read(&ac->ac_inode->i_writecount) == 0)) { + ac->ac_flags |= EXT4_MB_HINT_NOPREALLOC; return; + } - if (unlikely(ac->ac_flags & EXT4_MB_HINT_GOAL_ONLY)) + /* don't use group allocation for large files */ + size = max(size, isize); + if (size >= sbi->s_mb_stream_request) { + ac->ac_flags |= EXT4_MB_STREAM_ALLOC; return; + } BUG_ON(ac->ac_lg != NULL); /* @@ -4549,6 +4564,7 @@ ac->ac_status = AC_STATUS_CONTINUE; goto repeat; } else if (*errp) { + ext4_discard_allocated_blocks(ac); ac->ac_b_ex.fe_len = 0; ar->len = 0; ext4_mb_show_ac(ac); --- linux-fsl-imx51-2.6.31.orig/fs/ext4/ext4_extents.h +++ linux-fsl-imx51-2.6.31/fs/ext4/ext4_extents.h @@ -138,7 +138,11 @@ #define EXT_BREAK 1 #define EXT_REPEAT 2 -#define EXT_MAX_BLOCK 0xffffffff +/* + * Maximum number of logical blocks in a file; ext4_extent's ee_block is + * __le32. + */ +#define EXT_MAX_BLOCKS 0xffffffff /* * EXT_INIT_MAX_LEN is the maximum number of blocks we can have in an @@ -220,6 +224,11 @@ (le16_to_cpu(ext->ee_len) - EXT_INIT_MAX_LEN)); } +static inline void ext4_ext_mark_initialized(struct ext4_extent *ext) +{ + ext->ee_len = cpu_to_le16(ext4_ext_get_actual_len(ext)); +} + extern int ext4_ext_calc_metadata_amount(struct inode *inode, int blocks); extern ext4_fsblk_t ext_pblock(struct ext4_extent *ex); extern ext4_fsblk_t idx_pblock(struct ext4_extent_idx *); @@ -235,7 +244,7 @@ struct ext4_ext_path *path, struct ext4_extent *); extern unsigned int ext4_ext_check_overlap(struct inode *, struct ext4_extent *, struct ext4_ext_path *); -extern int ext4_ext_insert_extent(handle_t *, struct inode *, struct ext4_ext_path *, struct ext4_extent *); +extern int ext4_ext_insert_extent(handle_t *, struct inode *, struct ext4_ext_path *, struct ext4_extent *, int); extern int ext4_ext_walk_space(struct inode *, ext4_lblk_t, ext4_lblk_t, ext_prepare_callback, void *); extern struct ext4_ext_path *ext4_ext_find_extent(struct inode *, ext4_lblk_t, --- linux-fsl-imx51-2.6.31.orig/fs/ext4/super.c +++ linux-fsl-imx51-2.6.31/fs/ext4/super.c @@ -45,6 +45,7 @@ #include "ext4_jbd2.h" #include "xattr.h" #include "acl.h" +#include "mballoc.h" #define CREATE_TRACE_POINTS #include @@ -188,6 +189,36 @@ bg->bg_itable_unused_hi = cpu_to_le16(count >> 16); } + +/* Just increment the non-pointer handle value */ +static handle_t *ext4_get_nojournal(void) +{ + handle_t *handle = current->journal_info; + unsigned long ref_cnt = (unsigned long)handle; + + BUG_ON(ref_cnt >= EXT4_NOJOURNAL_MAX_REF_COUNT); + + ref_cnt++; + handle = (handle_t *)ref_cnt; + + current->journal_info = handle; + return handle; +} + + +/* Decrement the non-pointer handle value */ +static void ext4_put_nojournal(handle_t *handle) +{ + unsigned long ref_cnt = (unsigned long)handle; + + BUG_ON(ref_cnt == 0); + + ref_cnt--; + handle = (handle_t *)ref_cnt; + + current->journal_info = handle; +} + /* * Wrappers for jbd2_journal_start/end. * @@ -214,11 +245,7 @@ } return jbd2_journal_start(journal, nblocks); } - /* - * We're not journaling, return the appropriate indication. - */ - current->journal_info = EXT4_NOJOURNAL_HANDLE; - return current->journal_info; + return ext4_get_nojournal(); } /* @@ -234,11 +261,7 @@ int rc; if (!ext4_handle_valid(handle)) { - /* - * Do this here since we don't call jbd2_journal_stop() in - * no-journal mode. - */ - current->journal_info = NULL; + ext4_put_nojournal(handle); return 0; } sb = handle->h_transaction->t_journal->j_private; @@ -344,7 +367,8 @@ errstr = "Out of memory"; break; case -EROFS: - if (!sb || EXT4_SB(sb)->s_journal->j_flags & JBD2_ABORT) + if (!sb || (EXT4_SB(sb)->s_journal && + EXT4_SB(sb)->s_journal->j_flags & JBD2_ABORT)) errstr = "Journal has aborted"; else errstr = "Readonly filesystem"; @@ -578,15 +602,14 @@ struct ext4_super_block *es = sbi->s_es; int i, err; + flush_workqueue(sbi->dio_unwritten_wq); + destroy_workqueue(sbi->dio_unwritten_wq); + lock_super(sb); lock_kernel(); if (sb->s_dirt) ext4_commit_super(sb, 1); - ext4_release_system_zone(sb); - ext4_mb_release(sb); - ext4_ext_release(sb); - ext4_xattr_put_super(sb); if (sbi->s_journal) { err = jbd2_journal_destroy(sbi->s_journal); sbi->s_journal = NULL; @@ -594,6 +617,12 @@ ext4_abort(sb, __func__, "Couldn't clean up the journal"); } + + ext4_release_system_zone(sb); + ext4_mb_release(sb); + ext4_ext_release(sb); + ext4_xattr_put_super(sb); + if (!(sb->s_flags & MS_RDONLY)) { EXT4_CLEAR_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_RECOVER); es->s_state = cpu_to_le16(sbi->s_mount_state); @@ -682,6 +711,13 @@ ei->i_allocated_meta_blocks = 0; ei->i_delalloc_reserved_flag = 0; spin_lock_init(&(ei->i_block_reservation_lock)); +#ifdef CONFIG_QUOTA + ei->i_reserved_quota = 0; +#endif + INIT_LIST_HEAD(&ei->i_aio_dio_complete_list); + ei->cur_aio_dio = NULL; + ei->i_sync_tid = 0; + ei->i_datasync_tid = 0; return &ei->vfs_inode; } @@ -877,6 +913,12 @@ if (test_opt(sb, NO_AUTO_DA_ALLOC)) seq_puts(seq, ",noauto_da_alloc"); + if (test_opt(sb, DISCARD)) + seq_puts(seq, ",discard"); + + if (test_opt(sb, NOLOAD)) + seq_puts(seq, ",norecovery"); + ext4_show_quota_options(seq, sb); return 0; @@ -969,7 +1011,9 @@ .reserve_space = dquot_reserve_space, .claim_space = dquot_claim_space, .release_rsv = dquot_release_reserved_space, +#ifdef CONFIG_QUOTA .get_reserved_space = ext4_get_reserved_space, +#endif .alloc_inode = dquot_alloc_inode, .free_space = dquot_free_space, .free_inode = dquot_free_inode, @@ -1057,7 +1101,8 @@ Opt_usrquota, Opt_grpquota, Opt_i_version, Opt_stripe, Opt_delalloc, Opt_nodelalloc, Opt_block_validity, Opt_noblock_validity, - Opt_inode_readahead_blks, Opt_journal_ioprio + Opt_inode_readahead_blks, Opt_journal_ioprio, + Opt_discard, Opt_nodiscard, }; static const match_table_t tokens = { @@ -1082,6 +1127,7 @@ {Opt_acl, "acl"}, {Opt_noacl, "noacl"}, {Opt_noload, "noload"}, + {Opt_noload, "norecovery"}, {Opt_nobh, "nobh"}, {Opt_bh, "bh"}, {Opt_commit, "commit=%u"}, @@ -1123,6 +1169,8 @@ {Opt_auto_da_alloc, "auto_da_alloc=%u"}, {Opt_auto_da_alloc, "auto_da_alloc"}, {Opt_noauto_da_alloc, "noauto_da_alloc"}, + {Opt_discard, "discard"}, + {Opt_nodiscard, "nodiscard"}, {Opt_err, NULL}, }; @@ -1551,6 +1599,12 @@ else set_opt(sbi->s_mount_opt,NO_AUTO_DA_ALLOC); break; + case Opt_discard: + set_opt(sbi->s_mount_opt, DISCARD); + break; + case Opt_nodiscard: + clear_opt(sbi->s_mount_opt, DISCARD); + break; default: ext4_msg(sb, KERN_ERR, "Unrecognized mount option \"%s\" " @@ -1666,14 +1720,14 @@ size_t size; int i; - if (!sbi->s_es->s_log_groups_per_flex) { + sbi->s_log_groups_per_flex = sbi->s_es->s_log_groups_per_flex; + groups_per_flex = 1 << sbi->s_log_groups_per_flex; + + if (groups_per_flex < 2) { sbi->s_log_groups_per_flex = 0; return 1; } - sbi->s_log_groups_per_flex = sbi->s_es->s_log_groups_per_flex; - groups_per_flex = 1 << sbi->s_log_groups_per_flex; - /* We allocate both existing and potentially added groups */ flex_group_count = ((sbi->s_groups_count + groups_per_flex - 1) + ((le16_to_cpu(sbi->s_es->s_reserved_gdt_blocks) + 1) << @@ -1695,12 +1749,12 @@ gdp = ext4_get_group_desc(sb, i, NULL); flex_group = ext4_flex_group(sbi, i); - atomic_set(&sbi->s_flex_groups[flex_group].free_inodes, - ext4_free_inodes_count(sb, gdp)); - atomic_set(&sbi->s_flex_groups[flex_group].free_blocks, - ext4_free_blks_count(sb, gdp)); - atomic_set(&sbi->s_flex_groups[flex_group].used_dirs, - ext4_used_dirs_count(sb, gdp)); + atomic_add(ext4_free_inodes_count(sb, gdp), + &sbi->s_flex_groups[flex_group].free_inodes); + atomic_add(ext4_free_blks_count(sb, gdp), + &sbi->s_flex_groups[flex_group].free_blocks); + atomic_add(ext4_used_dirs_count(sb, gdp), + &sbi->s_flex_groups[flex_group].used_dirs); } return 1; @@ -1933,6 +1987,12 @@ * in the vfs. ext4 inode has 48 bits of i_block in fsblock units, * so that won't be a limiting factor. * + * However there is other limiting factor. We do store extents in the form + * of starting block and length, hence the resulting length of the extent + * covering maximum file size must fit into on-disk format containers as + * well. Given that length is always by 1 unit bigger than max unit (because + * we count 0 as well) we have to lower the s_maxbytes by one fs block. + * * Note, this does *not* consider any metadata overhead for vfs i_blocks. */ static loff_t ext4_max_size(int blkbits, int has_huge_files) @@ -1954,10 +2014,13 @@ upper_limit <<= blkbits; } - /* 32-bit extent-start container, ee_block */ - res = 1LL << 32; + /* + * 32-bit extent-start container, ee_block. We lower the maxbytes + * by one fs block, so ee_len can cover the extent of maximum file + * size + */ + res = (1LL << 32) - 1; res <<= blkbits; - res -= 1; /* Sanity check against vm- & vfs- imposed limits */ if (res > upper_limit) @@ -2197,6 +2260,7 @@ EXT4_RW_ATTR_SBI_UI(mb_order2_req, s_mb_order2_reqs); EXT4_RW_ATTR_SBI_UI(mb_stream_req, s_mb_stream_request); EXT4_RW_ATTR_SBI_UI(mb_group_prealloc, s_mb_group_prealloc); +EXT4_RW_ATTR_SBI_UI(max_writeback_mb_bump, s_max_writeback_mb_bump); static struct attribute *ext4_attrs[] = { ATTR_LIST(delayed_allocation_blocks), @@ -2210,6 +2274,7 @@ ATTR_LIST(mb_order2_req), ATTR_LIST(mb_stream_req), ATTR_LIST(mb_group_prealloc), + ATTR_LIST(max_writeback_mb_bump), NULL, }; @@ -2253,6 +2318,49 @@ .release = ext4_sb_release, }; +/* + * Check whether this filesystem can be mounted based on + * the features present and the RDONLY/RDWR mount requested. + * Returns 1 if this filesystem can be mounted as requested, + * 0 if it cannot be. + */ +static int ext4_feature_set_ok(struct super_block *sb, int readonly) +{ + if (EXT4_HAS_INCOMPAT_FEATURE(sb, ~EXT4_FEATURE_INCOMPAT_SUPP)) { + ext4_msg(sb, KERN_ERR, + "Couldn't mount because of " + "unsupported optional features (%x)", + (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_incompat) & + ~EXT4_FEATURE_INCOMPAT_SUPP)); + return 0; + } + + if (readonly) + return 1; + + /* Check that feature set is OK for a read-write mount */ + if (EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP)) { + ext4_msg(sb, KERN_ERR, "couldn't mount RDWR because of " + "unsupported optional features (%x)", + (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_ro_compat) & + ~EXT4_FEATURE_RO_COMPAT_SUPP)); + return 0; + } + /* + * Large file size enabled file system can only be mounted + * read-write on 32-bit systems if kernel is built with CONFIG_LBDAF + */ + if (EXT4_HAS_RO_COMPAT_FEATURE(sb, EXT4_FEATURE_RO_COMPAT_HUGE_FILE)) { + if (sizeof(blkcnt_t) < sizeof(u64)) { + ext4_msg(sb, KERN_ERR, "Filesystem with huge files " + "cannot be mounted RDWR without " + "CONFIG_LBDAF"); + return 0; + } + } + return 1; +} + static int ext4_fill_super(struct super_block *sb, void *data, int silent) __releases(kernel_lock) __acquires(kernel_lock) @@ -2274,7 +2382,6 @@ unsigned int db_count; unsigned int i; int needs_recovery, has_huge_files; - int features; __u64 blocks_count; int err; unsigned int journal_ioprio = DEFAULT_JOURNAL_IOPRIO; @@ -2401,39 +2508,9 @@ * previously didn't change the revision level when setting the flags, * so there is a chance incompat flags are set on a rev 0 filesystem. */ - features = EXT4_HAS_INCOMPAT_FEATURE(sb, ~EXT4_FEATURE_INCOMPAT_SUPP); - if (features) { - ext4_msg(sb, KERN_ERR, - "Couldn't mount because of " - "unsupported optional features (%x)", - (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_incompat) & - ~EXT4_FEATURE_INCOMPAT_SUPP)); - goto failed_mount; - } - features = EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP); - if (!(sb->s_flags & MS_RDONLY) && features) { - ext4_msg(sb, KERN_ERR, - "Couldn't mount RDWR because of " - "unsupported optional features (%x)", - (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_ro_compat) & - ~EXT4_FEATURE_RO_COMPAT_SUPP)); + if (!ext4_feature_set_ok(sb, (sb->s_flags & MS_RDONLY))) goto failed_mount; - } - has_huge_files = EXT4_HAS_RO_COMPAT_FEATURE(sb, - EXT4_FEATURE_RO_COMPAT_HUGE_FILE); - if (has_huge_files) { - /* - * Large file size enabled file system can only be - * mount if kernel is build with CONFIG_LBDAF - */ - if (sizeof(root->i_blocks) < sizeof(u64) && - !(sb->s_flags & MS_RDONLY)) { - ext4_msg(sb, KERN_ERR, "Filesystem with huge " - "files cannot be mounted read-write " - "without CONFIG_LBDAF"); - goto failed_mount; - } - } + blocksize = BLOCK_SIZE << le32_to_cpu(es->s_log_block_size); if (blocksize < EXT4_MIN_BLOCK_SIZE || @@ -2469,6 +2546,8 @@ } } + has_huge_files = EXT4_HAS_RO_COMPAT_FEATURE(sb, + EXT4_FEATURE_RO_COMPAT_HUGE_FILE); sbi->s_bitmap_maxbytes = ext4_max_bitmap_size(sb->s_blocksize_bits, has_huge_files); sb->s_maxbytes = ext4_max_size(sb->s_blocksize_bits, has_huge_files); @@ -2549,12 +2628,19 @@ goto failed_mount; } - if (ext4_blocks_count(es) > - (sector_t)(~0ULL) >> (sb->s_blocksize_bits - 9)) { + /* + * Test whether we have more sectors than will fit in sector_t, + * and whether the max offset is addressable by the page cache. + */ + if ((ext4_blocks_count(es) > + (sector_t)(~0ULL) >> (sb->s_blocksize_bits - 9)) || + (ext4_blocks_count(es) > + (pgoff_t)(~0ULL) >> (PAGE_CACHE_SHIFT - sb->s_blocksize_bits))) { ext4_msg(sb, KERN_ERR, "filesystem" - " too large to mount safely"); + " too large to mount safely on this system"); if (sizeof(sector_t) < 8) ext4_msg(sb, KERN_WARNING, "CONFIG_LBDAF not enabled"); + ret = -EFBIG; goto failed_mount; } @@ -2595,6 +2681,8 @@ goto failed_mount; } sbi->s_groups_count = blocks_count; + sbi->s_blockfile_groups = min_t(ext4_group_t, sbi->s_groups_count, + (EXT4_MAX_BLOCK_FILE_PHYS / EXT4_BLOCKS_PER_GROUP(sb))); db_count = (sbi->s_groups_count + EXT4_DESC_PER_BLOCK(sb) - 1) / EXT4_DESC_PER_BLOCK(sb); sbi->s_group_desc = kmalloc(db_count * sizeof(struct buffer_head *), @@ -2656,6 +2744,7 @@ } sbi->s_stripe = ext4_get_stripe_size(sbi); + sbi->s_max_writeback_mb_bump = 128; /* * set up enough so that it can read an inode @@ -2781,6 +2870,12 @@ clear_opt(sbi->s_mount_opt, NOBH); } } + EXT4_SB(sb)->dio_unwritten_wq = create_workqueue("ext4-dio-unwritten"); + if (!EXT4_SB(sb)->dio_unwritten_wq) { + printk(KERN_ERR "EXT4-fs: failed to create DIO workqueue\n"); + goto failed_mount_wq; + } + /* * The jbd2_journal_load will have done any necessary log recovery, * so we can safely mount the rest of the filesystem now. @@ -2893,6 +2988,8 @@ failed_mount4: ext4_msg(sb, KERN_ERR, "mount failed"); + destroy_workqueue(EXT4_SB(sb)->dio_unwritten_wq); +failed_mount_wq: ext4_release_system_zone(sb); if (sbi->s_journal) { jbd2_journal_destroy(sbi->s_journal); @@ -3208,7 +3305,18 @@ clear_buffer_write_io_error(sbh); set_buffer_uptodate(sbh); } - es->s_wtime = cpu_to_le32(get_seconds()); + /* + * If the file system is mounted read-only, don't update the + * superblock write time. This avoids updating the superblock + * write time when we are mounting the root file system + * read/only but we need to replay the journal; at that point, + * for people who are east of GMT and who make their clock + * tick in localtime for Windows bug-for-bug compatibility, + * the clock is set in the future, and this will cause e2fsck + * to complain and force a full file system check. + */ + if (!(sb->s_flags & MS_RDONLY)) + es->s_wtime = cpu_to_le32(get_seconds()); es->s_kbytes_written = cpu_to_le64(EXT4_SB(sb)->s_kbytes_written + ((part_stat_read(sb->s_bdev->bd_part, sectors[1]) - @@ -3333,11 +3441,13 @@ { int ret = 0; tid_t target; + struct ext4_sb_info *sbi = EXT4_SB(sb); trace_ext4_sync_fs(sb, wait); - if (jbd2_journal_start_commit(EXT4_SB(sb)->s_journal, &target)) { + flush_workqueue(sbi->dio_unwritten_wq); + if (jbd2_journal_start_commit(sbi->s_journal, &target)) { if (wait) - jbd2_log_wait_commit(EXT4_SB(sb)->s_journal, target); + jbd2_log_wait_commit(sbi->s_journal, target); } return ret; } @@ -3477,18 +3587,11 @@ if (sbi->s_journal) ext4_mark_recovery_complete(sb, es); } else { - int ret; - if ((ret = EXT4_HAS_RO_COMPAT_FEATURE(sb, - ~EXT4_FEATURE_RO_COMPAT_SUPP))) { - ext4_msg(sb, KERN_WARNING, "couldn't " - "remount RDWR because of unsupported " - "optional features (%x)", - (le32_to_cpu(sbi->s_es->s_feature_ro_compat) & - ~EXT4_FEATURE_RO_COMPAT_SUPP)); + /* Make sure we can mount this feature set readwrite */ + if (!ext4_feature_set_ok(sb, 0)) { err = -EROFS; goto restore_opts; } - /* * Make sure the group descriptor checksums * are sane. If they aren't, refuse to remount r/w. @@ -3624,13 +3727,11 @@ buf->f_blocks = ext4_blocks_count(es) - sbi->s_overhead_last; buf->f_bfree = percpu_counter_sum_positive(&sbi->s_freeblocks_counter) - percpu_counter_sum_positive(&sbi->s_dirtyblocks_counter); - ext4_free_blocks_count_set(es, buf->f_bfree); buf->f_bavail = buf->f_bfree - ext4_r_blocks_count(es); if (buf->f_bfree < ext4_r_blocks_count(es)) buf->f_bavail = 0; buf->f_files = le32_to_cpu(es->s_inodes_count); buf->f_ffree = percpu_counter_sum_positive(&sbi->s_freeinodes_counter); - es->s_free_inodes_count = cpu_to_le32(buf->f_ffree); buf->f_namelen = EXT4_NAME_LEN; fsid = le64_to_cpup((void *)es->s_uuid) ^ le64_to_cpup((void *)es->s_uuid + sizeof(u64)); --- linux-fsl-imx51-2.6.31.orig/fs/ext4/block_validity.c +++ linux-fsl-imx51-2.6.31/fs/ext4/block_validity.c @@ -160,7 +160,7 @@ if (ext4_bg_has_super(sb, i) && ((i < 5) || ((i % flex_size) == 0))) add_system_zone(sbi, ext4_group_first_block_no(sb, i), - sbi->s_gdb_count + 1); + ext4_bg_num_gdb(sb, i) + 1); gdp = ext4_get_group_desc(sb, i, NULL); ret = add_system_zone(sbi, ext4_block_bitmap(sb, gdp), 1); if (ret) --- linux-fsl-imx51-2.6.31.orig/fs/ext4/resize.c +++ linux-fsl-imx51-2.6.31/fs/ext4/resize.c @@ -247,7 +247,7 @@ goto exit_bh; if (IS_ERR(gdb = bclean(handle, sb, block))) { - err = PTR_ERR(bh); + err = PTR_ERR(gdb); goto exit_bh; } ext4_handle_dirty_metadata(handle, NULL, gdb); --- linux-fsl-imx51-2.6.31.orig/fs/ext4/fsync.c +++ linux-fsl-imx51-2.6.31/fs/ext4/fsync.c @@ -44,27 +44,37 @@ * * What we do is just kick off a commit and wait on it. This will snapshot the * inode to disk. + * + * i_mutex lock is held when entering and exiting this function */ int ext4_sync_file(struct file *file, struct dentry *dentry, int datasync) { struct inode *inode = dentry->d_inode; + struct ext4_inode_info *ei = EXT4_I(inode); journal_t *journal = EXT4_SB(inode->i_sb)->s_journal; - int ret = 0; + int ret; + tid_t commit_tid; J_ASSERT(ext4_journal_current_handle() == NULL); trace_ext4_sync_file(file, dentry, datasync); + if (inode->i_sb->s_flags & MS_RDONLY) + return 0; + + ret = flush_aio_dio_completed_IO(inode); + if (ret < 0) + return ret; + + if (!journal) + return simple_fsync(file, dentry, datasync); + /* - * data=writeback: + * data=writeback,ordered: * The caller's filemap_fdatawrite()/wait will sync the data. - * sync_inode() will sync the metadata - * - * data=ordered: - * The caller's filemap_fdatawrite() will write the data and - * sync_inode() will write the inode if it is dirty. Then the caller's - * filemap_fdatawait() will wait on the pages. + * Metadata is in the journal, we wait for proper transaction to + * commit here. * * data=journal: * filemap_fdatawrite won't do anything (the buffers are clean). @@ -74,27 +84,13 @@ * (they were dirtied by commit). But that's OK - the blocks are * safe in-journal, which is all fsync() needs to ensure. */ - if (ext4_should_journal_data(inode)) { - ret = ext4_force_commit(inode->i_sb); - goto out; - } - - if (datasync && !(inode->i_state & I_DIRTY_DATASYNC)) - goto out; + if (ext4_should_journal_data(inode)) + return ext4_force_commit(inode->i_sb); - /* - * The VFS has written the file data. If the inode is unaltered - * then we need not start a commit. - */ - if (inode->i_state & (I_DIRTY_SYNC|I_DIRTY_DATASYNC)) { - struct writeback_control wbc = { - .sync_mode = WB_SYNC_ALL, - .nr_to_write = 0, /* sys_fsync did this */ - }; - ret = sync_inode(inode, &wbc); - if (journal && (journal->j_flags & JBD2_BARRIER)) - blkdev_issue_flush(inode->i_sb->s_bdev, NULL); - } -out: + commit_tid = datasync ? ei->i_datasync_tid : ei->i_sync_tid; + if (jbd2_log_start_commit(journal, commit_tid)) + jbd2_log_wait_commit(journal, commit_tid); + else if (journal->j_flags & JBD2_BARRIER) + blkdev_issue_flush(inode->i_sb->s_bdev, NULL); return ret; } --- linux-fsl-imx51-2.6.31.orig/fs/ext4/ext4_jbd2.c +++ linux-fsl-imx51-2.6.31/fs/ext4/ext4_jbd2.c @@ -44,7 +44,7 @@ handle, err); } else - brelse(bh); + bforget(bh); return err; } @@ -60,7 +60,7 @@ handle, err); } else - brelse(bh); + bforget(bh); return err; } @@ -89,7 +89,10 @@ ext4_journal_abort_handle(where, __func__, bh, handle, err); } else { - mark_buffer_dirty(bh); + if (inode && bh) + mark_buffer_dirty_inode(bh, inode); + else + mark_buffer_dirty(bh); if (inode && inode_needs_sync(inode)) { sync_dirty_buffer(bh); if (buffer_req(bh) && !buffer_uptodate(bh)) { --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_fsops.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_fsops.c @@ -56,6 +56,9 @@ xfs_fsop_geom_t *geo, int new_version) { + + memset(geo, 0, sizeof(*geo)); + geo->blocksize = mp->m_sb.sb_blocksize; geo->rtextsize = mp->m_sb.sb_rextsize; geo->agblocks = mp->m_sb.sb_agblocks; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_itable.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_itable.c @@ -53,7 +53,6 @@ xfs_bulkstat_one_iget( xfs_mount_t *mp, /* mount point for filesystem */ xfs_ino_t ino, /* inode number to get data for */ - xfs_daddr_t bno, /* starting bno of inode cluster */ xfs_bstat_t *buf, /* return buffer */ int *stat) /* BULKSTAT_RV_... */ { @@ -62,7 +61,7 @@ int error; error = xfs_iget(mp, NULL, ino, - XFS_IGET_BULKSTAT, XFS_ILOCK_SHARED, &ip, bno); + XFS_IGET_UNTRUSTED, XFS_ILOCK_SHARED, &ip); if (error) { *stat = BULKSTAT_RV_NOTHING; return error; @@ -221,7 +220,6 @@ void __user *buffer, /* buffer to place output in */ int ubsize, /* size of buffer */ bulkstat_one_fmt_pf formatter, /* formatter, copy to user */ - xfs_daddr_t bno, /* starting bno of inode cluster */ int *ubused, /* bytes used by me */ void *dibuff, /* on-disk inode buffer */ int *stat) /* BULKSTAT_RV_... */ @@ -242,7 +240,7 @@ /* We're not being passed a pointer to a dinode. This happens * if BULKSTAT_FG_IGET is selected. Do the iget. */ - error = xfs_bulkstat_one_iget(mp, ino, bno, buf, stat); + error = xfs_bulkstat_one_iget(mp, ino, buf, stat); if (error) goto out_free; } else { @@ -267,13 +265,12 @@ void __user *buffer, /* buffer to place output in */ int ubsize, /* size of buffer */ void *private_data, /* my private data */ - xfs_daddr_t bno, /* starting bno of inode cluster */ int *ubused, /* bytes used by me */ void *dibuff, /* on-disk inode buffer */ int *stat) /* BULKSTAT_RV_... */ { return xfs_bulkstat_one_int(mp, ino, buffer, ubsize, - xfs_bulkstat_one_fmt, bno, + xfs_bulkstat_one_fmt, ubused, dibuff, stat); } @@ -617,7 +614,7 @@ error = xfs_inotobp(mp, NULL, ino, &dip, &bp, &offset, - XFS_IGET_BULKSTAT); + XFS_IGET_UNTRUSTED); if (!error) clustidx = offset / mp->m_sb.sb_inodesize; @@ -673,7 +670,7 @@ ubused = statstruct_size; error = formatter(mp, ino, ubufp, ubleft, private_data, - bno, &ubused, dip, &fmterror); + &ubused, dip, &fmterror); if (fmterror == BULKSTAT_RV_NOTHING) { if (error && error != ENOENT && error != EINVAL) { @@ -766,7 +763,7 @@ ino = (xfs_ino_t)*lastinop; error = xfs_bulkstat_one(mp, ino, buffer, sizeof(xfs_bstat_t), - NULL, 0, NULL, NULL, &res); + NULL, NULL, NULL, &res); if (error) { /* * Special case way failed, do it the "long" way --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_log_recover.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_log_recover.c @@ -1980,7 +1980,7 @@ "XFS: NULL dquot in %s.", __func__); goto next; } - if (item->ri_buf[i].i_len < sizeof(xfs_dqblk_t)) { + if (item->ri_buf[i].i_len < sizeof(xfs_disk_dquot_t)) { cmn_err(CE_ALERT, "XFS: dquot too small (%d) in %s.", item->ri_buf[i].i_len, __func__); @@ -2635,7 +2635,7 @@ "XFS: NULL dquot in %s.", __func__); return XFS_ERROR(EIO); } - if (item->ri_buf[1].i_len < sizeof(xfs_dqblk_t)) { + if (item->ri_buf[1].i_len < sizeof(xfs_disk_dquot_t)) { cmn_err(CE_ALERT, "XFS: dquot too small (%d) in %s.", item->ri_buf[1].i_len, __func__); @@ -3209,7 +3209,7 @@ int error; ino = XFS_AGINO_TO_INO(mp, agno, agino); - error = xfs_iget(mp, NULL, ino, 0, 0, &ip, 0); + error = xfs_iget(mp, NULL, ino, 0, 0, &ip); if (error) goto fail; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_mount.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_mount.c @@ -1207,7 +1207,7 @@ * Get and sanity-check the root inode. * Save the pointer to it in the mount structure. */ - error = xfs_iget(mp, NULL, sbp->sb_rootino, 0, XFS_ILOCK_EXCL, &rip, 0); + error = xfs_iget(mp, NULL, sbp->sb_rootino, 0, XFS_ILOCK_EXCL, &rip); if (error) { cmn_err(CE_WARN, "XFS: failed to read root inode"); goto out_log_dealloc; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_dfrag.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_dfrag.c @@ -62,7 +62,9 @@ goto out; } - if (!(file->f_mode & FMODE_WRITE) || (file->f_flags & O_APPEND)) { + if (!(file->f_mode & FMODE_WRITE) || + !(file->f_mode & FMODE_READ) || + (file->f_flags & O_APPEND)) { error = XFS_ERROR(EBADF); goto out_put_file; } @@ -74,6 +76,7 @@ } if (!(target_file->f_mode & FMODE_WRITE) || + !(target_file->f_mode & FMODE_READ) || (target_file->f_flags & O_APPEND)) { error = XFS_ERROR(EBADF); goto out_put_target_file; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_inode.h +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_inode.h @@ -471,7 +471,7 @@ xfs_inode_t *xfs_inode_incore(struct xfs_mount *, xfs_ino_t, struct xfs_trans *); int xfs_iget(struct xfs_mount *, struct xfs_trans *, xfs_ino_t, - uint, uint, xfs_inode_t **, xfs_daddr_t); + uint, uint, xfs_inode_t **); void xfs_iput(xfs_inode_t *, uint); void xfs_iput_new(xfs_inode_t *, uint); void xfs_ilock(xfs_inode_t *, uint); @@ -562,7 +562,7 @@ * Flags for xfs_iget() */ #define XFS_IGET_CREATE 0x1 -#define XFS_IGET_BULKSTAT 0x2 +#define XFS_IGET_UNTRUSTED 0x2 int xfs_inotobp(struct xfs_mount *, struct xfs_trans *, xfs_ino_t, struct xfs_dinode **, @@ -571,7 +571,7 @@ struct xfs_inode *, struct xfs_dinode **, struct xfs_buf **, uint); int xfs_iread(struct xfs_mount *, struct xfs_trans *, - struct xfs_inode *, xfs_daddr_t, uint); + struct xfs_inode *, uint); void xfs_dinode_from_disk(struct xfs_icdinode *, struct xfs_dinode *); void xfs_dinode_to_disk(struct xfs_dinode *, --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_vnodeops.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_vnodeops.c @@ -569,7 +569,7 @@ char *link) { xfs_mount_t *mp = ip->i_mount; - int pathlen; + xfs_fsize_t pathlen; int error = 0; xfs_itrace_entry(ip); @@ -579,13 +579,19 @@ xfs_ilock(ip, XFS_ILOCK_SHARED); - ASSERT((ip->i_d.di_mode & S_IFMT) == S_IFLNK); - ASSERT(ip->i_d.di_size <= MAXPATHLEN); - pathlen = ip->i_d.di_size; if (!pathlen) goto out; + if (pathlen < 0 || pathlen > MAXPATHLEN) { + cmn_err(CE_ALERT, "%s: inode (%llu) bad symlink length (%lld)", + __func__, (unsigned long long) ip->i_ino, + (long long) pathlen); + ASSERT(0); + return XFS_ERROR(EFSCORRUPTED); + } + + if (ip->i_df.if_flags & XFS_IFINLINE) { memcpy(link, ip->i_df.if_u1.if_data, pathlen); link[pathlen] = '\0'; @@ -1381,7 +1387,7 @@ if (error) goto out; - error = xfs_iget(dp->i_mount, NULL, inum, 0, 0, ipp, 0); + error = xfs_iget(dp->i_mount, NULL, inum, 0, 0, ipp); if (error) goto out_free_name; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_inode.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_inode.c @@ -177,7 +177,7 @@ if (unlikely(XFS_TEST_ERROR(!di_ok, mp, XFS_ERRTAG_ITOBP_INOTOBP, XFS_RANDOM_ITOBP_INOTOBP))) { - if (iget_flags & XFS_IGET_BULKSTAT) { + if (iget_flags & XFS_IGET_UNTRUSTED) { xfs_trans_brelse(tp, bp); return XFS_ERROR(EINVAL); } @@ -787,7 +787,6 @@ xfs_mount_t *mp, xfs_trans_t *tp, xfs_inode_t *ip, - xfs_daddr_t bno, uint iget_flags) { xfs_buf_t *bp; @@ -797,11 +796,9 @@ /* * Fill in the location information in the in-core inode. */ - ip->i_imap.im_blkno = bno; error = xfs_imap(mp, tp, ip->i_ino, &ip->i_imap, iget_flags); if (error) return error; - ASSERT(bno == 0 || bno == ip->i_imap.im_blkno); /* * Get pointers to the on-disk inode and the buffer containing it. --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_ialloc.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_ialloc.c @@ -1195,6 +1195,72 @@ return error; } +STATIC int +xfs_imap_lookup( + struct xfs_mount *mp, + struct xfs_trans *tp, + xfs_agnumber_t agno, + xfs_agino_t agino, + xfs_agblock_t agbno, + xfs_agblock_t *chunk_agbno, + xfs_agblock_t *offset_agbno, + int flags) +{ + struct xfs_btree_cur *cur; + struct xfs_buf *agbp; + xfs_inofree_t chunk_free; /* mask of free inodes in chunk */ + xfs_agino_t chunk_agino; /* first agino in inode chunk */ + __int32_t chunk_cnt; /* count of free inodes in chunk */ + int error; + int i; + + down_read(&mp->m_peraglock); + error = xfs_ialloc_read_agi(mp, tp, agno, &agbp); + up_read(&mp->m_peraglock); + if (error) { + xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " + "xfs_ialloc_read_agi() returned " + "error %d, agno %d", + error, agno); + return error; + } + + /* + * Lookup the inode record for the given agino. If the record cannot be + * found, then it's an invalid inode number and we should abort. Once + * we have a record, we need to ensure it contains the inode number + * we are looking up. + */ + cur = xfs_inobt_init_cursor(mp, tp, agbp, agno); + error = xfs_inobt_lookup_le(cur, agino, 0, 0, &i); + if (!error) { + if (i) + error = xfs_inobt_get_rec(cur, &chunk_agino, &chunk_cnt, + &chunk_free, &i); + if (!error && i == 0) + error = EINVAL; + } + + xfs_trans_brelse(tp, agbp); + xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR); + if (error) + return error; + + /* check that the returned record contains the required inode */ + if (chunk_agino > agino || + chunk_agino + XFS_IALLOC_INODES(mp) <= agino) + return EINVAL; + + /* for untrusted inodes check it is allocated first */ + if ((flags & XFS_IGET_UNTRUSTED) && + (chunk_free & XFS_INOBT_MASK(agino - chunk_agino))) + return EINVAL; + + *chunk_agbno = XFS_AGINO_TO_AGBNO(mp, chunk_agino); + *offset_agbno = agbno - *chunk_agbno; + return 0; +} + /* * Return the location of the inode in imap, for mapping it into a buffer. */ @@ -1227,8 +1293,11 @@ if (agno >= mp->m_sb.sb_agcount || agbno >= mp->m_sb.sb_agblocks || ino != XFS_AGINO_TO_INO(mp, agno, agino)) { #ifdef DEBUG - /* no diagnostics for bulkstat, ino comes from userspace */ - if (flags & XFS_IGET_BULKSTAT) + /* + * Don't output diagnostic information for untrusted inodes + * as they can be invalid without implying corruption. + */ + if (flags & XFS_IGET_UNTRUSTED) return XFS_ERROR(EINVAL); if (agno >= mp->m_sb.sb_agcount) { xfs_fs_cmn_err(CE_ALERT, mp, @@ -1255,6 +1324,23 @@ return XFS_ERROR(EINVAL); } + blks_per_cluster = XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_blocklog; + + /* + * For bulkstat and handle lookups, we have an untrusted inode number + * that we have to verify is valid. We cannot do this just by reading + * the inode buffer as it may have been unlinked and removed leaving + * inodes in stale state on disk. Hence we have to do a btree lookup + * in all cases where an untrusted inode number is passed. + */ + if (flags & XFS_IGET_UNTRUSTED) { + error = xfs_imap_lookup(mp, tp, agno, agino, agbno, + &chunk_agbno, &offset_agbno, flags); + if (error) + return error; + goto out_map; + } + /* * If the inode cluster size is the same as the blocksize or * smaller we get to the buffer by simple arithmetics. @@ -1269,24 +1355,6 @@ return 0; } - blks_per_cluster = XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_blocklog; - - /* - * If we get a block number passed from bulkstat we can use it to - * find the buffer easily. - */ - if (imap->im_blkno) { - offset = XFS_INO_TO_OFFSET(mp, ino); - ASSERT(offset < mp->m_sb.sb_inopblock); - - cluster_agbno = xfs_daddr_to_agbno(mp, imap->im_blkno); - offset += (agbno - cluster_agbno) * mp->m_sb.sb_inopblock; - - imap->im_len = XFS_FSB_TO_BB(mp, blks_per_cluster); - imap->im_boffset = (ushort)(offset << mp->m_sb.sb_inodelog); - return 0; - } - /* * If the inode chunks are aligned then use simple maths to * find the location. Otherwise we have to do a btree @@ -1296,55 +1364,13 @@ offset_agbno = agbno & mp->m_inoalign_mask; chunk_agbno = agbno - offset_agbno; } else { - xfs_btree_cur_t *cur; /* inode btree cursor */ - xfs_agino_t chunk_agino; /* first agino in inode chunk */ - __int32_t chunk_cnt; /* count of free inodes in chunk */ - xfs_inofree_t chunk_free; /* mask of free inodes in chunk */ - xfs_buf_t *agbp; /* agi buffer */ - int i; /* temp state */ - - down_read(&mp->m_peraglock); - error = xfs_ialloc_read_agi(mp, tp, agno, &agbp); - up_read(&mp->m_peraglock); - if (error) { - xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " - "xfs_ialloc_read_agi() returned " - "error %d, agno %d", - error, agno); - return error; - } - - cur = xfs_inobt_init_cursor(mp, tp, agbp, agno); - error = xfs_inobt_lookup_le(cur, agino, 0, 0, &i); - if (error) { - xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " - "xfs_inobt_lookup_le() failed"); - goto error0; - } - - error = xfs_inobt_get_rec(cur, &chunk_agino, &chunk_cnt, - &chunk_free, &i); - if (error) { - xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " - "xfs_inobt_get_rec() failed"); - goto error0; - } - if (i == 0) { -#ifdef DEBUG - xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: " - "xfs_inobt_get_rec() failed"); -#endif /* DEBUG */ - error = XFS_ERROR(EINVAL); - } - error0: - xfs_trans_brelse(tp, agbp); - xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR); + error = xfs_imap_lookup(mp, tp, agno, agino, agbno, + &chunk_agbno, &offset_agbno, flags); if (error) return error; - chunk_agbno = XFS_AGINO_TO_AGBNO(mp, chunk_agino); - offset_agbno = agbno - chunk_agbno; } +out_map: ASSERT(agbno >= chunk_agbno); cluster_agbno = chunk_agbno + ((offset_agbno / blks_per_cluster) * blks_per_cluster); --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_iget.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_iget.c @@ -289,7 +289,6 @@ xfs_trans_t *tp, xfs_ino_t ino, struct xfs_inode **ipp, - xfs_daddr_t bno, int flags, int lock_flags) __releases(pag->pag_ici_lock) { @@ -302,7 +301,7 @@ if (!ip) return ENOMEM; - error = xfs_iread(mp, tp, ip, bno, flags); + error = xfs_iread(mp, tp, ip, flags); if (error) goto out_destroy; @@ -386,8 +385,6 @@ * within the file system for the inode being requested. * lock_flags -- flags indicating how to lock the inode. See the comment * for xfs_ilock() for a list of valid values. - * bno -- the block number starting the buffer containing the inode, - * if known (as by bulkstat), else 0. */ int xfs_iget( @@ -396,8 +393,7 @@ xfs_ino_t ino, uint flags, uint lock_flags, - xfs_inode_t **ipp, - xfs_daddr_t bno) + xfs_inode_t **ipp) { xfs_inode_t *ip; int error; @@ -428,7 +424,7 @@ read_unlock(&pag->pag_ici_lock); XFS_STATS_INC(xs_ig_missed); - error = xfs_iget_cache_miss(mp, pag, tp, ino, &ip, bno, + error = xfs_iget_cache_miss(mp, pag, tp, ino, &ip, flags, lock_flags); if (error) goto out_error_or_again; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_itable.h +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_itable.h @@ -28,7 +28,6 @@ void __user *buffer, int ubsize, void *private_data, - xfs_daddr_t bno, int *ubused, void *dip, int *stat); @@ -82,7 +81,6 @@ void __user *buffer, int ubsize, bulkstat_one_fmt_pf formatter, - xfs_daddr_t bno, int *ubused, void *dibuff, int *stat); @@ -94,7 +92,6 @@ void __user *buffer, int ubsize, void *private_data, - xfs_daddr_t bno, int *ubused, void *dibuff, int *stat); --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_rtalloc.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_rtalloc.c @@ -2274,12 +2274,12 @@ sbp = &mp->m_sb; if (sbp->sb_rbmino == NULLFSINO) return 0; - error = xfs_iget(mp, NULL, sbp->sb_rbmino, 0, 0, &mp->m_rbmip, 0); + error = xfs_iget(mp, NULL, sbp->sb_rbmino, 0, 0, &mp->m_rbmip); if (error) return error; ASSERT(mp->m_rbmip != NULL); ASSERT(sbp->sb_rsumino != NULLFSINO); - error = xfs_iget(mp, NULL, sbp->sb_rsumino, 0, 0, &mp->m_rsumip, 0); + error = xfs_iget(mp, NULL, sbp->sb_rsumino, 0, 0, &mp->m_rsumip); if (error) { IRELE(mp->m_rbmip); return error; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/xfs_trans_inode.c +++ linux-fsl-imx51-2.6.31/fs/xfs/xfs_trans_inode.c @@ -91,7 +91,7 @@ * xfs_iget(). */ if (tp == NULL) - return xfs_iget(mp, NULL, ino, flags, lock_flags, ipp, 0); + return xfs_iget(mp, NULL, ino, flags, lock_flags, ipp); /* * If we find the inode in core with this transaction @@ -131,7 +131,7 @@ } ASSERT(lock_flags & XFS_ILOCK_EXCL); - error = xfs_iget(tp->t_mountp, tp, ino, flags, lock_flags, &ip, 0); + error = xfs_iget(tp->t_mountp, tp, ino, flags, lock_flags, &ip); if (error) { return error; } --- linux-fsl-imx51-2.6.31.orig/fs/xfs/linux-2.6/xfs_ioctl.c +++ linux-fsl-imx51-2.6.31/fs/xfs/linux-2.6/xfs_ioctl.c @@ -698,14 +698,19 @@ xfs_mount_t *mp, void __user *arg) { - xfs_fsop_geom_v1_t fsgeo; + xfs_fsop_geom_t fsgeo; int error; - error = xfs_fs_geometry(mp, (xfs_fsop_geom_t *)&fsgeo, 3); + error = xfs_fs_geometry(mp, &fsgeo, 3); if (error) return -error; - if (copy_to_user(arg, &fsgeo, sizeof(fsgeo))) + /* + * Caller should have passed an argument of type + * xfs_fsop_geom_v1_t. This is a proper subset of the + * xfs_fsop_geom_t that xfs_fs_geometry() fills in. + */ + if (copy_to_user(arg, &fsgeo, sizeof(xfs_fsop_geom_v1_t))) return -XFS_ERROR(EFAULT); return 0; } @@ -789,6 +794,8 @@ { struct fsxattr fa; + memset(&fa, 0, sizeof(struct fsxattr)); + xfs_ilock(ip, XFS_ILOCK_SHARED); fa.fsx_xflags = xfs_ip2xflags(ip); fa.fsx_extsize = ip->i_d.di_extsize << ip->i_mount->m_sb.sb_blocklog; --- linux-fsl-imx51-2.6.31.orig/fs/xfs/linux-2.6/xfs_ioctl32.c +++ linux-fsl-imx51-2.6.31/fs/xfs/linux-2.6/xfs_ioctl32.c @@ -236,13 +236,12 @@ void __user *buffer, /* buffer to place output in */ int ubsize, /* size of buffer */ void *private_data, /* my private data */ - xfs_daddr_t bno, /* starting bno of inode cluster */ int *ubused, /* bytes used by me */ void *dibuff, /* on-disk inode buffer */ int *stat) /* BULKSTAT_RV_... */ { return xfs_bulkstat_one_int(mp, ino, buffer, ubsize, - xfs_bulkstat_one_fmt_compat, bno, + xfs_bulkstat_one_fmt_compat, ubused, dibuff, stat); } @@ -297,7 +296,7 @@ error = xfs_bulkstat_one_compat(mp, inlast, bulkreq.ubuffer, sizeof(compat_xfs_bstat_t), - NULL, 0, NULL, NULL, &res); + NULL, NULL, NULL, &res); } else if (cmd == XFS_IOC_FSBULKSTAT_32) { error = xfs_bulkstat(mp, &inlast, &count, xfs_bulkstat_one_compat, NULL, --- linux-fsl-imx51-2.6.31.orig/fs/xfs/linux-2.6/xfs_export.c +++ linux-fsl-imx51-2.6.31/fs/xfs/linux-2.6/xfs_export.c @@ -127,13 +127,12 @@ return ERR_PTR(-ESTALE); /* - * The XFS_IGET_BULKSTAT means that an invalid inode number is just - * fine and not an indication of a corrupted filesystem. Because - * clients can send any kind of invalid file handle, e.g. after - * a restore on the server we have to deal with this case gracefully. + * The XFS_IGET_UNTRUSTED means that an invalid inode number is just + * fine and not an indication of a corrupted filesystem as clients can + * send invalid file handles and we have to handle it gracefully.. */ - error = xfs_iget(mp, NULL, ino, XFS_IGET_BULKSTAT, - XFS_ILOCK_SHARED, &ip, 0); + error = xfs_iget(mp, NULL, ino, XFS_IGET_UNTRUSTED, + XFS_ILOCK_SHARED, &ip); if (error) { /* * EINVAL means the inode cluster doesn't exist anymore. --- linux-fsl-imx51-2.6.31.orig/fs/xfs/quota/xfs_qm_syscalls.c +++ linux-fsl-imx51-2.6.31/fs/xfs/quota/xfs_qm_syscalls.c @@ -266,7 +266,7 @@ } if ((flags & XFS_DQ_USER) && mp->m_sb.sb_uquotino != NULLFSINO) { - error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, 0, 0, &qip, 0); + error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, 0, 0, &qip); if (!error) { error = xfs_truncate_file(mp, qip); IRELE(qip); @@ -275,7 +275,7 @@ if ((flags & (XFS_DQ_GROUP|XFS_DQ_PROJ)) && mp->m_sb.sb_gquotino != NULLFSINO) { - error2 = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, 0, 0, &qip, 0); + error2 = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, 0, 0, &qip); if (!error2) { error2 = xfs_truncate_file(mp, qip); IRELE(qip); @@ -420,12 +420,12 @@ } if (!uip && mp->m_sb.sb_uquotino != NULLFSINO) { if (xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, - 0, 0, &uip, 0) == 0) + 0, 0, &uip) == 0) tempuqip = B_TRUE; } if (!gip && mp->m_sb.sb_gquotino != NULLFSINO) { if (xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, - 0, 0, &gip, 0) == 0) + 0, 0, &gip) == 0) tempgqip = B_TRUE; } if (uip) { @@ -1115,7 +1115,6 @@ void __user *buffer, /* not used */ int ubsize, /* not used */ void *private_data, /* not used */ - xfs_daddr_t bno, /* starting block of inode cluster */ int *ubused, /* not used */ void *dip, /* not used */ int *res) /* bulkstat result code */ @@ -1139,7 +1138,7 @@ ipreleased = B_FALSE; again: lock_flags = XFS_ILOCK_SHARED; - if ((error = xfs_iget(mp, NULL, ino, 0, lock_flags, &ip, bno))) { + if ((error = xfs_iget(mp, NULL, ino, 0, lock_flags, &ip))) { *res = BULKSTAT_RV_NOTHING; return (error); } --- linux-fsl-imx51-2.6.31.orig/fs/xfs/quota/xfs_qm.c +++ linux-fsl-imx51-2.6.31/fs/xfs/quota/xfs_qm.c @@ -1607,7 +1607,6 @@ void __user *buffer, /* not used */ int ubsize, /* not used */ void *private_data, /* not used */ - xfs_daddr_t bno, /* starting block of inode cluster */ int *ubused, /* not used */ void *dip, /* on-disk inode pointer (not used) */ int *res) /* result code value */ @@ -1634,7 +1633,7 @@ * the case in all other instances. It's OK that we do this because * quotacheck is done only at mount time. */ - if ((error = xfs_iget(mp, NULL, ino, 0, XFS_ILOCK_EXCL, &ip, bno))) { + if ((error = xfs_iget(mp, NULL, ino, 0, XFS_ILOCK_EXCL, &ip))) { *res = BULKSTAT_RV_NOTHING; return error; } @@ -1859,14 +1858,14 @@ mp->m_sb.sb_uquotino != NULLFSINO) { ASSERT(mp->m_sb.sb_uquotino > 0); if ((error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, - 0, 0, &uip, 0))) + 0, 0, &uip))) return XFS_ERROR(error); } if (XFS_IS_OQUOTA_ON(mp) && mp->m_sb.sb_gquotino != NULLFSINO) { ASSERT(mp->m_sb.sb_gquotino > 0); if ((error = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, - 0, 0, &gip, 0))) { + 0, 0, &gip))) { if (uip) IRELE(uip); return XFS_ERROR(error); --- linux-fsl-imx51-2.6.31.orig/fs/ocfs2/symlink.c +++ linux-fsl-imx51-2.6.31/fs/ocfs2/symlink.c @@ -129,7 +129,7 @@ } /* Fast symlinks can't be large */ - len = strlen(target); + len = strnlen(target, ocfs2_fast_symlink_chars(inode->i_sb)); link = kzalloc(len + 1, GFP_NOFS); if (!link) { status = -ENOMEM; --- linux-fsl-imx51-2.6.31.orig/fs/ocfs2/aops.c +++ linux-fsl-imx51-2.6.31/fs/ocfs2/aops.c @@ -1083,6 +1083,12 @@ ocfs2_figure_cluster_boundaries(OCFS2_SB(inode->i_sb), cpos, &cluster_start, &cluster_end); + /* treat the write as new if the a hole/lseek spanned across + * the page boundary. + */ + new = new | ((i_size_read(inode) <= page_offset(page)) && + (page_offset(page) <= user_pos)); + if (page == wc->w_target_page) { map_from = user_pos & (PAGE_CACHE_SIZE - 1); map_to = map_from + user_len; --- linux-fsl-imx51-2.6.31.orig/fs/gfs2/file.c +++ linux-fsl-imx51-2.6.31/fs/gfs2/file.c @@ -219,6 +219,11 @@ if (error) goto out_drop_write; + error = -EACCES; + if (!is_owner_or_cap(inode)) + goto out; + + error = 0; flags = ip->i_diskflags; new_flags = (flags & ~mask) | (reqflags & mask); if ((new_flags ^ flags) == 0) @@ -276,8 +281,10 @@ { struct inode *inode = filp->f_path.dentry->d_inode; u32 fsflags, gfsflags; + if (get_user(fsflags, ptr)) return -EFAULT; + gfsflags = fsflags_cvt(fsflags_to_gfs2, fsflags); if (!S_ISDIR(inode->i_mode)) { if (gfsflags & GFS2_DIF_INHERIT_JDATA) @@ -607,7 +614,7 @@ if (!(fl->fl_flags & FL_POSIX)) return -ENOLCK; - if (__mandatory_lock(&ip->i_inode)) + if (__mandatory_lock(&ip->i_inode) && fl->fl_type != F_UNLCK) return -ENOLCK; if (cmd == F_CANCELLK) { --- linux-fsl-imx51-2.6.31.orig/fs/gfs2/quota.c +++ linux-fsl-imx51-2.6.31/fs/gfs2/quota.c @@ -654,15 +654,27 @@ unsigned blocksize, iblock, pos; struct buffer_head *bh; struct page *page; - void *kaddr; - char *ptr; - struct gfs2_quota_host qp; + void *kaddr, *ptr; + struct gfs2_quota q; s64 value; - int err = -EIO; + int err, nbytes; if (gfs2_is_stuffed(ip)) gfs2_unstuff_dinode(ip, NULL); - + + memset(&q, 0, sizeof(struct gfs2_quota)); + err = gfs2_internal_read(ip, NULL, (char *)&q, &loc, sizeof(q)); + if (err < 0) + return err; + + value = be64_to_cpu(q.qu_value) + change; + q.qu_value = cpu_to_be64(value); + + /* Write the quota into the quota file on disk */ + err = -EIO; + ptr = &q; + nbytes = sizeof(struct gfs2_quota); +get_a_page: page = grab_cache_page(mapping, index); if (!page) return -ENOMEM; @@ -685,6 +697,11 @@ gfs2_block_map(inode, iblock, bh, 1); if (!buffer_mapped(bh)) goto unlock; + /* If it's a newly allocated disk block for quota, zero it */ + if (buffer_new(bh)) { + memset(bh->b_data, 0, bh->b_size); + set_buffer_uptodate(bh); + } } if (PageUptodate(page)) @@ -700,18 +717,31 @@ gfs2_trans_add_bh(ip->i_gl, bh, 0); kaddr = kmap_atomic(page, KM_USER0); - ptr = kaddr + offset; - gfs2_quota_in(&qp, ptr); - qp.qu_value += change; - value = qp.qu_value; - gfs2_quota_out(&qp, ptr); + if (offset + sizeof(struct gfs2_quota) > PAGE_CACHE_SIZE) + nbytes = PAGE_CACHE_SIZE - offset; + memcpy(kaddr + offset, ptr, nbytes); flush_dcache_page(page); kunmap_atomic(kaddr, KM_USER0); - err = 0; + unlock_page(page); + page_cache_release(page); + + /* If quota straddles page boundary, we need to update the rest of the + * quota at the beginning of the next page */ + if (offset != 0) { /* first page, offset is closer to PAGE_CACHE_SIZE */ + ptr = ptr + nbytes; + nbytes = sizeof(struct gfs2_quota) - nbytes; + offset = 0; + index++; + goto get_a_page; + } + qd->qd_qb.qb_magic = cpu_to_be32(GFS2_MAGIC); qd->qd_qb.qb_value = cpu_to_be64(value); ((struct gfs2_quota_lvb*)(qd->qd_gl->gl_lvb))->qb_magic = cpu_to_be32(GFS2_MAGIC); ((struct gfs2_quota_lvb*)(qd->qd_gl->gl_lvb))->qb_value = cpu_to_be64(value); + + return 0; + unlock: unlock_page(page); page_cache_release(page); --- linux-fsl-imx51-2.6.31.orig/fs/gfs2/dir.c +++ linux-fsl-imx51-2.6.31/fs/gfs2/dir.c @@ -392,7 +392,7 @@ unsigned totlen = be16_to_cpu(dent->de_rec_len); if (gfs2_dirent_sentinel(dent)) - actual = GFS2_DIRENT_SIZE(0); + actual = 0; if (totlen - actual >= required) return 1; return 0; --- linux-fsl-imx51-2.6.31.orig/fs/quota/dquot.c +++ linux-fsl-imx51-2.6.31/fs/quota/dquot.c @@ -1388,6 +1388,70 @@ EXPORT_SYMBOL(vfs_dq_drop); /* + * inode_reserved_space is managed internally by quota, and protected by + * i_lock similar to i_blocks+i_bytes. + */ +static qsize_t *inode_reserved_space(struct inode * inode) +{ + /* Filesystem must explicitly define it's own method in order to use + * quota reservation interface */ + BUG_ON(!inode->i_sb->dq_op->get_reserved_space); + return inode->i_sb->dq_op->get_reserved_space(inode); +} + +static void inode_add_rsv_space(struct inode *inode, qsize_t number) +{ + spin_lock(&inode->i_lock); + *inode_reserved_space(inode) += number; + spin_unlock(&inode->i_lock); +} + + +static void inode_claim_rsv_space(struct inode *inode, qsize_t number) +{ + spin_lock(&inode->i_lock); + *inode_reserved_space(inode) -= number; + __inode_add_bytes(inode, number); + spin_unlock(&inode->i_lock); +} + +static void inode_sub_rsv_space(struct inode *inode, qsize_t number) +{ + spin_lock(&inode->i_lock); + *inode_reserved_space(inode) -= number; + spin_unlock(&inode->i_lock); +} + +static qsize_t inode_get_rsv_space(struct inode *inode) +{ + qsize_t ret; + + if (!inode->i_sb->dq_op->get_reserved_space) + return 0; + spin_lock(&inode->i_lock); + ret = *inode_reserved_space(inode); + spin_unlock(&inode->i_lock); + return ret; +} + +static void inode_incr_space(struct inode *inode, qsize_t number, + int reserve) +{ + if (reserve) + inode_add_rsv_space(inode, number); + else + inode_add_bytes(inode, number); +} + +static void inode_decr_space(struct inode *inode, qsize_t number, int reserve) +{ + if (reserve) + inode_sub_rsv_space(inode, number); + else + inode_sub_bytes(inode, number); +} + +/* * Following four functions update i_blocks+i_bytes fields and * quota information (together with appropriate checks) * NOTE: We absolutely rely on the fact that caller dirties @@ -1405,6 +1469,21 @@ int cnt, ret = QUOTA_OK; char warntype[MAXQUOTAS]; + /* + * First test before acquiring mutex - solves deadlocks when we + * re-enter the quota code and are already holding the mutex + */ + if (IS_NOQUOTA(inode)) { + inode_incr_space(inode, number, reserve); + goto out; + } + + down_read(&sb_dqopt(inode->i_sb)->dqptr_sem); + if (IS_NOQUOTA(inode)) { + inode_incr_space(inode, number, reserve); + goto out_unlock; + } + for (cnt = 0; cnt < MAXQUOTAS; cnt++) warntype[cnt] = QUOTA_NL_NOWARN; @@ -1415,7 +1494,8 @@ if (check_bdq(inode->i_dquot[cnt], number, warn, warntype+cnt) == NO_QUOTA) { ret = NO_QUOTA; - goto out_unlock; + spin_unlock(&dq_data_lock); + goto out_flush_warn; } } for (cnt = 0; cnt < MAXQUOTAS; cnt++) { @@ -1426,64 +1506,32 @@ else dquot_incr_space(inode->i_dquot[cnt], number); } - if (!reserve) - inode_add_bytes(inode, number); -out_unlock: + inode_incr_space(inode, number, reserve); spin_unlock(&dq_data_lock); - flush_warnings(inode->i_dquot, warntype); - return ret; -} - -int dquot_alloc_space(struct inode *inode, qsize_t number, int warn) -{ - int cnt, ret = QUOTA_OK; - - /* - * First test before acquiring mutex - solves deadlocks when we - * re-enter the quota code and are already holding the mutex - */ - if (IS_NOQUOTA(inode)) { - inode_add_bytes(inode, number); - goto out; - } - - down_read(&sb_dqopt(inode->i_sb)->dqptr_sem); - if (IS_NOQUOTA(inode)) { - inode_add_bytes(inode, number); - goto out_unlock; - } - - ret = __dquot_alloc_space(inode, number, warn, 0); - if (ret == NO_QUOTA) - goto out_unlock; + if (reserve) + goto out_flush_warn; /* Dirtify all the dquots - this can block when journalling */ for (cnt = 0; cnt < MAXQUOTAS; cnt++) if (inode->i_dquot[cnt]) mark_dquot_dirty(inode->i_dquot[cnt]); +out_flush_warn: + flush_warnings(inode->i_dquot, warntype); out_unlock: up_read(&sb_dqopt(inode->i_sb)->dqptr_sem); out: return ret; } + +int dquot_alloc_space(struct inode *inode, qsize_t number, int warn) +{ + return __dquot_alloc_space(inode, number, warn, 0); +} EXPORT_SYMBOL(dquot_alloc_space); int dquot_reserve_space(struct inode *inode, qsize_t number, int warn) { - int ret = QUOTA_OK; - - if (IS_NOQUOTA(inode)) - goto out; - - down_read(&sb_dqopt(inode->i_sb)->dqptr_sem); - if (IS_NOQUOTA(inode)) - goto out_unlock; - - ret = __dquot_alloc_space(inode, number, warn, 1); -out_unlock: - up_read(&sb_dqopt(inode->i_sb)->dqptr_sem); -out: - return ret; + return __dquot_alloc_space(inode, number, warn, 1); } EXPORT_SYMBOL(dquot_reserve_space); @@ -1540,14 +1588,14 @@ int ret = QUOTA_OK; if (IS_NOQUOTA(inode)) { - inode_add_bytes(inode, number); + inode_claim_rsv_space(inode, number); goto out; } down_read(&sb_dqopt(inode->i_sb)->dqptr_sem); if (IS_NOQUOTA(inode)) { up_read(&sb_dqopt(inode->i_sb)->dqptr_sem); - inode_add_bytes(inode, number); + inode_claim_rsv_space(inode, number); goto out; } @@ -1559,7 +1607,7 @@ number); } /* Update inode bytes */ - inode_add_bytes(inode, number); + inode_claim_rsv_space(inode, number); spin_unlock(&dq_data_lock); /* Dirtify all the dquots - this can block when journalling */ for (cnt = 0; cnt < MAXQUOTAS; cnt++) @@ -1572,38 +1620,9 @@ EXPORT_SYMBOL(dquot_claim_space); /* - * Release reserved quota space - */ -void dquot_release_reserved_space(struct inode *inode, qsize_t number) -{ - int cnt; - - if (IS_NOQUOTA(inode)) - goto out; - - down_read(&sb_dqopt(inode->i_sb)->dqptr_sem); - if (IS_NOQUOTA(inode)) - goto out_unlock; - - spin_lock(&dq_data_lock); - /* Release reserved dquots */ - for (cnt = 0; cnt < MAXQUOTAS; cnt++) { - if (inode->i_dquot[cnt]) - dquot_free_reserved_space(inode->i_dquot[cnt], number); - } - spin_unlock(&dq_data_lock); - -out_unlock: - up_read(&sb_dqopt(inode->i_sb)->dqptr_sem); -out: - return; -} -EXPORT_SYMBOL(dquot_release_reserved_space); - -/* * This operation can block, but only after everything is updated */ -int dquot_free_space(struct inode *inode, qsize_t number) +int __dquot_free_space(struct inode *inode, qsize_t number, int reserve) { unsigned int cnt; char warntype[MAXQUOTAS]; @@ -1612,7 +1631,7 @@ * re-enter the quota code and are already holding the mutex */ if (IS_NOQUOTA(inode)) { out_sub: - inode_sub_bytes(inode, number); + inode_decr_space(inode, number, reserve); return QUOTA_OK; } @@ -1627,21 +1646,43 @@ if (!inode->i_dquot[cnt]) continue; warntype[cnt] = info_bdq_free(inode->i_dquot[cnt], number); - dquot_decr_space(inode->i_dquot[cnt], number); + if (reserve) + dquot_free_reserved_space(inode->i_dquot[cnt], number); + else + dquot_decr_space(inode->i_dquot[cnt], number); } - inode_sub_bytes(inode, number); + inode_decr_space(inode, number, reserve); spin_unlock(&dq_data_lock); + + if (reserve) + goto out_unlock; /* Dirtify all the dquots - this can block when journalling */ for (cnt = 0; cnt < MAXQUOTAS; cnt++) if (inode->i_dquot[cnt]) mark_dquot_dirty(inode->i_dquot[cnt]); +out_unlock: flush_warnings(inode->i_dquot, warntype); up_read(&sb_dqopt(inode->i_sb)->dqptr_sem); return QUOTA_OK; } + +int dquot_free_space(struct inode *inode, qsize_t number) +{ + return __dquot_free_space(inode, number, 0); +} EXPORT_SYMBOL(dquot_free_space); /* + * Release reserved quota space + */ +void dquot_release_reserved_space(struct inode *inode, qsize_t number) +{ + __dquot_free_space(inode, number, 1); + +} +EXPORT_SYMBOL(dquot_release_reserved_space); + +/* * This operation can block, but only after everything is updated */ int dquot_free_inode(const struct inode *inode, qsize_t number) @@ -1679,19 +1720,6 @@ EXPORT_SYMBOL(dquot_free_inode); /* - * call back function, get reserved quota space from underlying fs - */ -qsize_t dquot_get_reserved_space(struct inode *inode) -{ - qsize_t reserved_space = 0; - - if (sb_any_quota_active(inode->i_sb) && - inode->i_sb->dq_op->get_reserved_space) - reserved_space = inode->i_sb->dq_op->get_reserved_space(inode); - return reserved_space; -} - -/* * Transfer the number of inode and blocks from one diskquota to an other. * * This operation can block, but only after everything is updated @@ -1734,7 +1762,7 @@ } spin_lock(&dq_data_lock); cur_space = inode_get_bytes(inode); - rsv_space = dquot_get_reserved_space(inode); + rsv_space = inode_get_rsv_space(inode); space = cur_space + rsv_space; /* Build the transfer_from list and check the limits */ for (cnt = 0; cnt < MAXQUOTAS; cnt++) { --- linux-fsl-imx51-2.6.31.orig/init/Kconfig +++ linux-fsl-imx51-2.6.31/init/Kconfig @@ -166,6 +166,15 @@ endchoice +config VERSION_SIGNATURE + string "Arbitrary version signature" + help + This string will be created in a file, /proc/version_signature. It + is useful in determining arbitrary data about your kernel. For instance, + if you have several kernels of the same version, but need to keep track + of a revision of the same kernel, but not affect it's ability to load + compatible modules, this is the easiest way to do that. + config SWAP bool "Support for paging of anonymous memory (swap)" depends on MMU && BLOCK --- linux-fsl-imx51-2.6.31.orig/init/initramfs.c +++ linux-fsl-imx51-2.6.31/init/initramfs.c @@ -8,6 +8,7 @@ #include #include #include +#include static __initdata char *message; static void __init error(char *x) @@ -565,7 +566,9 @@ } #endif -static int __init populate_rootfs(void) +LIST_HEAD(populate_rootfs_domain); + +static void __init async_populate_rootfs(void) { char *err = unpack_to_rootfs(__initramfs_start, __initramfs_end - __initramfs_start); @@ -579,7 +582,7 @@ initrd_end - initrd_start); if (!err) { free_initrd(); - return 0; + return; } else { clean_rootfs(); unpack_to_rootfs(__initramfs_start, @@ -603,6 +606,25 @@ free_initrd(); #endif } - return 0; + return; } + +static int __initdata rootfs_populated; + +static int __init populate_rootfs_early(void) +{ + if (num_online_cpus() > 1) { + rootfs_populated = 1; + async_schedule_domain(async_populate_rootfs, NULL, + &populate_rootfs_domain); + } +} +static int __init populate_rootfs(void) +{ + if (!rootfs_populated) + async_schedule_domain(async_populate_rootfs, NULL, + &populate_rootfs_domain); +} + +earlyrootfs_initcall(populate_rootfs_early); rootfs_initcall(populate_rootfs); --- linux-fsl-imx51-2.6.31.orig/init/main.c +++ linux-fsl-imx51-2.6.31/init/main.c @@ -68,6 +68,7 @@ #include #include #include +#include #include #include @@ -233,7 +234,7 @@ static int __init quiet_kernel(char *str) { - console_loglevel = 4; + console_loglevel = 2; return 0; } @@ -250,7 +251,7 @@ /* * Unknown boot options get handed to init, unless they look like - * failed parameters + * unused parameters (modprobe will find them in /proc/cmdline). */ static int __init unknown_bootoption(char *param, char *val) { @@ -271,14 +272,9 @@ if (obsolete_checksetup(param)) return 0; - /* - * Preemptive maintenance for "why didn't my misspelled command - * line work?" - */ - if (strchr(param, '.') && (!val || strchr(param, '.') < val)) { - printk(KERN_ERR "Unknown boot option `%s': ignoring\n", param); + /* Unused module parameter. */ + if (strchr(param, '.') && (!val || strchr(param, '.') < val)) return 0; - } if (panic_later) return 0; @@ -809,6 +805,7 @@ init_workqueues(); cpuset_init_smp(); usermodehelper_init(); + init_tmpfs(); driver_init(); init_irq_proc(); do_ctors(); @@ -911,6 +908,12 @@ do_basic_setup(); /* + * We need to ensure that the filesystem is ready by this point, wait for + * async_populate_rootfs to complete. + */ + async_synchronize_full_domain(&populate_rootfs_domain); + + /* * check if there is an early userspace init. If yes, let it do all * the work */ --- linux-fsl-imx51-2.6.31.orig/init/do_mounts.c +++ linux-fsl-imx51-2.6.31/init/do_mounts.c @@ -415,7 +415,7 @@ mount_root(); out: + devtmpfs_mount("dev"); sys_mount(".", "/", NULL, MS_MOVE, NULL); sys_chroot("."); } - --- linux-fsl-imx51-2.6.31.orig/init/version.c +++ linux-fsl-imx51-2.6.31/init/version.c @@ -39,7 +39,11 @@ /* FIXED STRINGS! Don't touch! */ const char linux_banner[] = "Linux version " UTS_RELEASE " (" LINUX_COMPILE_BY "@" - LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION "\n"; + LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION +#ifdef CONFIG_VERSION_SIGNATURE + " (" CONFIG_VERSION_SIGNATURE ")" +#endif + "\n"; const char linux_proc_banner[] = "%s version %s" --- linux-fsl-imx51-2.6.31.orig/net/compat.c +++ linux-fsl-imx51-2.6.31/net/compat.c @@ -40,10 +40,12 @@ compat_size_t len; if (get_user(len, &uiov32->iov_len) || - get_user(buf, &uiov32->iov_base)) { - tot_len = -EFAULT; - break; - } + get_user(buf, &uiov32->iov_base)) + return -EFAULT; + + if (len > INT_MAX - tot_len) + len = INT_MAX - tot_len; + tot_len += len; kiov->iov_base = compat_ptr(buf); kiov->iov_len = (__kernel_size_t) len; --- linux-fsl-imx51-2.6.31.orig/net/socket.c +++ linux-fsl-imx51-2.6.31/net/socket.c @@ -1673,6 +1673,8 @@ struct iovec iov; int fput_needed; + if (len > INT_MAX) + len = INT_MAX; sock = sockfd_lookup_light(fd, &err, &fput_needed); if (!sock) goto out; @@ -1730,6 +1732,8 @@ int err, err2; int fput_needed; + if (size > INT_MAX) + size = INT_MAX; sock = sockfd_lookup_light(fd, &err, &fput_needed); if (!sock) goto out; --- linux-fsl-imx51-2.6.31.orig/net/8021q/vlan.c +++ linux-fsl-imx51-2.6.31/net/8021q/vlan.c @@ -287,8 +287,11 @@ if (ngrp) vlan_gvrp_uninit_applicant(real_dev); out_free_group: - if (ngrp) - vlan_group_free(ngrp); + if (ngrp) { + hlist_del_rcu(&ngrp->hlist); + /* Free the group, after all cpu's are done. */ + call_rcu(&ngrp->rcu, vlan_rcu_free); + } return err; } --- linux-fsl-imx51-2.6.31.orig/net/netfilter/nf_conntrack_core.c +++ linux-fsl-imx51-2.6.31/net/netfilter/nf_conntrack_core.c @@ -1089,14 +1089,14 @@ } EXPORT_SYMBOL_GPL(nf_conntrack_flush_report); -static void nf_ct_release_dying_list(void) +static void nf_ct_release_dying_list(struct net *net) { struct nf_conntrack_tuple_hash *h; struct nf_conn *ct; struct hlist_nulls_node *n; spin_lock_bh(&nf_conntrack_lock); - hlist_nulls_for_each_entry(h, n, &init_net.ct.dying, hnnode) { + hlist_nulls_for_each_entry(h, n, &net->ct.dying, hnnode) { ct = nf_ct_tuplehash_to_ctrack(h); /* never fails to remove them, no listeners at this point */ nf_ct_kill(ct); @@ -1115,7 +1115,7 @@ { i_see_dead_people: nf_ct_iterate_cleanup(net, kill_all, NULL); - nf_ct_release_dying_list(); + nf_ct_release_dying_list(net); if (atomic_read(&net->ct.count) != 0) { schedule(); goto i_see_dead_people; @@ -1350,6 +1350,11 @@ return ret; } +s16 (*nf_ct_nat_offset)(const struct nf_conn *ct, + enum ip_conntrack_dir dir, + u32 seq); +EXPORT_SYMBOL_GPL(nf_ct_nat_offset); + int nf_conntrack_init(struct net *net) { int ret; @@ -1367,6 +1372,9 @@ /* For use by REJECT target */ rcu_assign_pointer(ip_ct_attach, nf_conntrack_attach); rcu_assign_pointer(nf_ct_destroy, destroy_conntrack); + + /* Howto get NAT offsets */ + rcu_assign_pointer(nf_ct_nat_offset, NULL); } return 0; --- linux-fsl-imx51-2.6.31.orig/net/netfilter/nf_conntrack_proto_tcp.c +++ linux-fsl-imx51-2.6.31/net/netfilter/nf_conntrack_proto_tcp.c @@ -492,6 +492,21 @@ } } +#ifdef CONFIG_NF_NAT_NEEDED +static inline s16 nat_offset(const struct nf_conn *ct, + enum ip_conntrack_dir dir, + u32 seq) +{ + typeof(nf_ct_nat_offset) get_offset = rcu_dereference(nf_ct_nat_offset); + + return get_offset != NULL ? get_offset(ct, dir, seq) : 0; +} +#define NAT_OFFSET(pf, ct, dir, seq) \ + (pf == NFPROTO_IPV4 ? nat_offset(ct, dir, seq) : 0) +#else +#define NAT_OFFSET(pf, ct, dir, seq) 0 +#endif + static bool tcp_in_window(const struct nf_conn *ct, struct ip_ct_tcp *state, enum ip_conntrack_dir dir, @@ -506,6 +521,7 @@ struct ip_ct_tcp_state *receiver = &state->seen[!dir]; const struct nf_conntrack_tuple *tuple = &ct->tuplehash[dir].tuple; __u32 seq, ack, sack, end, win, swin; + s16 receiver_offset; bool res; /* @@ -519,11 +535,16 @@ if (receiver->flags & IP_CT_TCP_FLAG_SACK_PERM) tcp_sack(skb, dataoff, tcph, &sack); + /* Take into account NAT sequence number mangling */ + receiver_offset = NAT_OFFSET(pf, ct, !dir, ack - 1); + ack -= receiver_offset; + sack -= receiver_offset; + pr_debug("tcp_in_window: START\n"); pr_debug("tcp_in_window: "); nf_ct_dump_tuple(tuple); - pr_debug("seq=%u ack=%u sack=%u win=%u end=%u\n", - seq, ack, sack, win, end); + pr_debug("seq=%u ack=%u+(%d) sack=%u+(%d) win=%u end=%u\n", + seq, ack, receiver_offset, sack, receiver_offset, win, end); pr_debug("tcp_in_window: sender end=%u maxend=%u maxwin=%u scale=%i " "receiver end=%u maxend=%u maxwin=%u scale=%i\n", sender->td_end, sender->td_maxend, sender->td_maxwin, @@ -613,8 +634,8 @@ pr_debug("tcp_in_window: "); nf_ct_dump_tuple(tuple); - pr_debug("seq=%u ack=%u sack =%u win=%u end=%u\n", - seq, ack, sack, win, end); + pr_debug("seq=%u ack=%u+(%d) sack=%u+(%d) win=%u end=%u\n", + seq, ack, receiver_offset, sack, receiver_offset, win, end); pr_debug("tcp_in_window: sender end=%u maxend=%u maxwin=%u scale=%i " "receiver end=%u maxend=%u maxwin=%u scale=%i\n", sender->td_end, sender->td_maxend, sender->td_maxwin, @@ -700,7 +721,7 @@ before(seq, sender->td_maxend + 1) ? after(end, sender->td_end - receiver->td_maxwin - 1) ? before(sack, receiver->td_end + 1) ? - after(ack, receiver->td_end - MAXACKWINDOW(sender)) ? "BUG" + after(sack, receiver->td_end - MAXACKWINDOW(sender) - 1) ? "BUG" : "ACK is under the lower bound (possible overly delayed ACK)" : "ACK is over the upper bound (ACKed data not seen yet)" : "SEQ is under the lower bound (already ACKed data retransmitted)" @@ -715,39 +736,6 @@ return res; } -#ifdef CONFIG_NF_NAT_NEEDED -/* Update sender->td_end after NAT successfully mangled the packet */ -/* Caller must linearize skb at tcp header. */ -void nf_conntrack_tcp_update(const struct sk_buff *skb, - unsigned int dataoff, - struct nf_conn *ct, int dir, - s16 offset) -{ - const struct tcphdr *tcph = (const void *)skb->data + dataoff; - const struct ip_ct_tcp_state *sender = &ct->proto.tcp.seen[dir]; - const struct ip_ct_tcp_state *receiver = &ct->proto.tcp.seen[!dir]; - __u32 end; - - end = segment_seq_plus_len(ntohl(tcph->seq), skb->len, dataoff, tcph); - - spin_lock_bh(&ct->lock); - /* - * We have to worry for the ack in the reply packet only... - */ - if (ct->proto.tcp.seen[dir].td_end + offset == end) - ct->proto.tcp.seen[dir].td_end = end; - ct->proto.tcp.last_end = end; - spin_unlock_bh(&ct->lock); - pr_debug("tcp_update: sender end=%u maxend=%u maxwin=%u scale=%i " - "receiver end=%u maxend=%u maxwin=%u scale=%i\n", - sender->td_end, sender->td_maxend, sender->td_maxwin, - sender->td_scale, - receiver->td_end, receiver->td_maxend, receiver->td_maxwin, - receiver->td_scale); -} -EXPORT_SYMBOL_GPL(nf_conntrack_tcp_update); -#endif - #define TH_FIN 0x01 #define TH_SYN 0x02 #define TH_RST 0x04 --- linux-fsl-imx51-2.6.31.orig/net/netfilter/xt_connlimit.c +++ linux-fsl-imx51-2.6.31/net/netfilter/xt_connlimit.c @@ -103,7 +103,7 @@ const struct nf_conntrack_tuple *tuple, const union nf_inet_addr *addr, const union nf_inet_addr *mask, - const struct xt_match *match) + u_int8_t family) { const struct nf_conntrack_tuple_hash *found; struct xt_connlimit_conn *conn; @@ -113,8 +113,7 @@ bool addit = true; int matches = 0; - - if (match->family == NFPROTO_IPV6) + if (family == NFPROTO_IPV6) hash = &data->iphash[connlimit_iphash6(addr, mask)]; else hash = &data->iphash[connlimit_iphash(addr->ip & mask->ip)]; @@ -157,8 +156,7 @@ continue; } - if (same_source_net(addr, mask, &conn->tuple.src.u3, - match->family)) + if (same_source_net(addr, mask, &conn->tuple.src.u3, family)) /* same source network -> be counted! */ ++matches; nf_ct_put(found_ct); @@ -207,7 +205,7 @@ spin_lock_bh(&info->data->lock); connections = count_them(info->data, tuple_ptr, &addr, - &info->mask, par->match); + &info->mask, par->family); spin_unlock_bh(&info->data->lock); if (connections < 0) { --- linux-fsl-imx51-2.6.31.orig/net/netfilter/nf_conntrack_ftp.c +++ linux-fsl-imx51-2.6.31/net/netfilter/nf_conntrack_ftp.c @@ -323,24 +323,24 @@ struct nf_ct_ftp_master *info, int dir, struct sk_buff *skb) { - unsigned int i, oldest = NUM_SEQ_TO_REMEMBER; + unsigned int i, oldest; /* Look for oldest: if we find exact match, we're done. */ for (i = 0; i < info->seq_aft_nl_num[dir]; i++) { if (info->seq_aft_nl[dir][i] == nl_seq) return; - - if (oldest == info->seq_aft_nl_num[dir] || - before(info->seq_aft_nl[dir][i], - info->seq_aft_nl[dir][oldest])) - oldest = i; } if (info->seq_aft_nl_num[dir] < NUM_SEQ_TO_REMEMBER) { info->seq_aft_nl[dir][info->seq_aft_nl_num[dir]++] = nl_seq; - } else if (oldest != NUM_SEQ_TO_REMEMBER && - after(nl_seq, info->seq_aft_nl[dir][oldest])) { - info->seq_aft_nl[dir][oldest] = nl_seq; + } else { + if (before(info->seq_aft_nl[dir][0], info->seq_aft_nl[dir][1])) + oldest = 0; + else + oldest = 1; + + if (after(nl_seq, info->seq_aft_nl[dir][oldest])) + info->seq_aft_nl[dir][oldest] = nl_seq; } } --- linux-fsl-imx51-2.6.31.orig/net/netfilter/ipvs/ip_vs_ctl.c +++ linux-fsl-imx51-2.6.31/net/netfilter/ipvs/ip_vs_ctl.c @@ -2713,6 +2713,8 @@ if (!(nla_af && (nla_fwmark || (nla_port && nla_protocol && nla_addr)))) return -EINVAL; + memset(usvc, 0, sizeof(*usvc)); + usvc->af = nla_get_u16(nla_af); #ifdef CONFIG_IP_VS_IPV6 if (usvc->af != AF_INET && usvc->af != AF_INET6) @@ -2900,6 +2902,8 @@ if (!(nla_addr && nla_port)) return -EINVAL; + memset(udest, 0, sizeof(*udest)); + nla_memcpy(&udest->addr, nla_addr, sizeof(udest->addr)); udest->port = nla_get_u16(nla_port); --- linux-fsl-imx51-2.6.31.orig/net/packet/af_packet.c +++ linux-fsl-imx51-2.6.31/net/packet/af_packet.c @@ -1524,7 +1524,7 @@ uaddr->sa_family = AF_PACKET; dev = dev_get_by_index(sock_net(sk), pkt_sk(sk)->ifindex); if (dev) { - strlcpy(uaddr->sa_data, dev->name, 15); + strncpy(uaddr->sa_data, dev->name, 14); dev_put(dev); } else memset(uaddr->sa_data, 0, 14); @@ -1547,6 +1547,7 @@ sll->sll_family = AF_PACKET; sll->sll_ifindex = po->ifindex; sll->sll_protocol = po->num; + sll->sll_pkttype = 0; dev = dev_get_by_index(sock_net(sk), po->ifindex); if (dev) { sll->sll_hatype = dev->type; @@ -1836,7 +1837,7 @@ static int packet_getsockopt(struct socket *sock, int level, int optname, char __user *optval, int __user *optlen) { - int len; + unsigned int len; int val; struct sock *sk = sock->sk; struct packet_sock *po = pkt_sk(sk); @@ -1849,7 +1850,7 @@ if (get_user(len, optlen)) return -EFAULT; - if (len < 0) + if ((int)len < 0) return -EINVAL; switch (optname) { --- linux-fsl-imx51-2.6.31.orig/net/rds/rdma.c +++ linux-fsl-imx51-2.6.31/net/rds/rdma.c @@ -473,6 +473,17 @@ max_pages = max(nr, max_pages); nr_pages += nr; + + /* + * nr for one entry in limited to (UINT_MAX>>PAGE_SHIFT)+1 + * so nr_pages cannot overflow without becoming bigger than + * INT_MAX first. If nr cannot overflow then max_pages should + * be ok. + */ + if (nr_pages > INT_MAX) { + ret = -EINVAL; + goto out; + } } pages = kcalloc(max_pages, sizeof(struct page *), GFP_KERNEL); @@ -605,18 +616,32 @@ int rds_cmsg_rdma_args(struct rds_sock *rs, struct rds_message *rm, struct cmsghdr *cmsg) { + struct rds_rdma_args *args; struct rds_rdma_op *op; + int ret = 0; if (cmsg->cmsg_len < CMSG_LEN(sizeof(struct rds_rdma_args)) - || rm->m_rdma_op != NULL) - return -EINVAL; + || rm->m_rdma_op != NULL) { + ret = -EINVAL; + goto out; + } + + args = CMSG_DATA(cmsg); + + if (args->nr_local > UIO_MAXIOV) { + ret = -EMSGSIZE; + goto out; + } op = rds_rdma_prepare(rs, CMSG_DATA(cmsg)); - if (IS_ERR(op)) - return PTR_ERR(op); + if (IS_ERR(op)) { + ret = PTR_ERR(op); + goto out; + } rds_stats_inc(s_send_rdma); rm->m_rdma_op = op; - return 0; +out: + return ret; } /* --- linux-fsl-imx51-2.6.31.orig/net/rds/page.c +++ linux-fsl-imx51-2.6.31/net/rds/page.c @@ -60,6 +60,14 @@ rds_stats_add(s_copy_to_user, bytes); else rds_stats_add(s_copy_from_user, bytes); + + if (to_user) + ret = access_ok(VERIFY_WRITE, ptr, bytes); + else + ret = access_ok(VERIFY_READ, ptr, bytes); + + if (!ret) + return -EFAULT; addr = kmap_atomic(page, KM_USER0); if (to_user) --- linux-fsl-imx51-2.6.31.orig/net/sched/act_mirred.c +++ linux-fsl-imx51-2.6.31/net/sched/act_mirred.c @@ -205,15 +205,16 @@ { unsigned char *b = skb_tail_pointer(skb); struct tcf_mirred *m = a->priv; - struct tc_mirred opt; + struct tc_mirred opt = { + .index = m->tcf_index, + .action = m->tcf_action, + .refcnt = m->tcf_refcnt - ref, + .bindcnt = m->tcf_bindcnt - bind, + .eaction = m->tcfm_eaction, + .ifindex = m->tcfm_ifindex, + }; struct tcf_t t; - opt.index = m->tcf_index; - opt.action = m->tcf_action; - opt.refcnt = m->tcf_refcnt - ref; - opt.bindcnt = m->tcf_bindcnt - bind; - opt.eaction = m->tcfm_eaction; - opt.ifindex = m->tcfm_ifindex; NLA_PUT(skb, TCA_MIRRED_PARMS, sizeof(opt), &opt); t.install = jiffies_to_clock_t(jiffies - m->tcf_tm.install); t.lastuse = jiffies_to_clock_t(jiffies - m->tcf_tm.lastuse); --- linux-fsl-imx51-2.6.31.orig/net/sched/act_police.c +++ linux-fsl-imx51-2.6.31/net/sched/act_police.c @@ -340,22 +340,19 @@ { unsigned char *b = skb_tail_pointer(skb); struct tcf_police *police = a->priv; - struct tc_police opt; + struct tc_police opt = { + .index = police->tcf_index, + .action = police->tcf_action, + .mtu = police->tcfp_mtu, + .burst = police->tcfp_burst, + .refcnt = police->tcf_refcnt - ref, + .bindcnt = police->tcf_bindcnt - bind, + }; - opt.index = police->tcf_index; - opt.action = police->tcf_action; - opt.mtu = police->tcfp_mtu; - opt.burst = police->tcfp_burst; - opt.refcnt = police->tcf_refcnt - ref; - opt.bindcnt = police->tcf_bindcnt - bind; if (police->tcfp_R_tab) opt.rate = police->tcfp_R_tab->rate; - else - memset(&opt.rate, 0, sizeof(opt.rate)); if (police->tcfp_P_tab) opt.peakrate = police->tcfp_P_tab->rate; - else - memset(&opt.peakrate, 0, sizeof(opt.peakrate)); NLA_PUT(skb, TCA_POLICE_TBF, sizeof(opt), &opt); if (police->tcfp_result) NLA_PUT_U32(skb, TCA_POLICE_RESULT, police->tcfp_result); --- linux-fsl-imx51-2.6.31.orig/net/sched/act_nat.c +++ linux-fsl-imx51-2.6.31/net/sched/act_nat.c @@ -261,40 +261,29 @@ { unsigned char *b = skb_tail_pointer(skb); struct tcf_nat *p = a->priv; - struct tc_nat *opt; + struct tc_nat opt = { + .old_addr = p->old_addr, + .new_addr = p->new_addr, + .mask = p->mask, + .flags = p->flags, + + .index = p->tcf_index, + .action = p->tcf_action, + .refcnt = p->tcf_refcnt - ref, + .bindcnt = p->tcf_bindcnt - bind, + }; struct tcf_t t; - int s; - s = sizeof(*opt); - - /* netlink spinlocks held above us - must use ATOMIC */ - opt = kzalloc(s, GFP_ATOMIC); - if (unlikely(!opt)) - return -ENOBUFS; - - opt->old_addr = p->old_addr; - opt->new_addr = p->new_addr; - opt->mask = p->mask; - opt->flags = p->flags; - - opt->index = p->tcf_index; - opt->action = p->tcf_action; - opt->refcnt = p->tcf_refcnt - ref; - opt->bindcnt = p->tcf_bindcnt - bind; - - NLA_PUT(skb, TCA_NAT_PARMS, s, opt); + NLA_PUT(skb, TCA_NAT_PARMS, sizeof(opt), &opt); t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install); t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse); t.expires = jiffies_to_clock_t(p->tcf_tm.expires); NLA_PUT(skb, TCA_NAT_TM, sizeof(t), &t); - kfree(opt); - return skb->len; nla_put_failure: nlmsg_trim(skb, b); - kfree(opt); return -1; } --- linux-fsl-imx51-2.6.31.orig/net/sched/act_skbedit.c +++ linux-fsl-imx51-2.6.31/net/sched/act_skbedit.c @@ -147,13 +147,14 @@ { unsigned char *b = skb_tail_pointer(skb); struct tcf_skbedit *d = a->priv; - struct tc_skbedit opt; + struct tc_skbedit opt = { + .index = d->tcf_index, + .refcnt = d->tcf_refcnt - ref, + .bindcnt = d->tcf_bindcnt - bind, + .action = d->tcf_action, + }; struct tcf_t t; - opt.index = d->tcf_index; - opt.refcnt = d->tcf_refcnt - ref; - opt.bindcnt = d->tcf_bindcnt - bind; - opt.action = d->tcf_action; NLA_PUT(skb, TCA_SKBEDIT_PARMS, sizeof(opt), &opt); if (d->flags & SKBEDIT_F_PRIORITY) NLA_PUT(skb, TCA_SKBEDIT_PRIORITY, sizeof(d->priority), --- linux-fsl-imx51-2.6.31.orig/net/sched/sch_api.c +++ linux-fsl-imx51-2.6.31/net/sched/sch_api.c @@ -1196,6 +1196,11 @@ return -1; } +static bool tc_qdisc_dump_ignore(struct Qdisc *q) +{ + return (q->flags & TCQ_F_BUILTIN) ? true : false; +} + static int qdisc_notify(struct sk_buff *oskb, struct nlmsghdr *n, u32 clid, struct Qdisc *old, struct Qdisc *new) { @@ -1206,11 +1211,11 @@ if (!skb) return -ENOBUFS; - if (old && old->handle) { + if (old && !tc_qdisc_dump_ignore(old)) { if (tc_fill_qdisc(skb, old, clid, pid, n->nlmsg_seq, 0, RTM_DELQDISC) < 0) goto err_out; } - if (new) { + if (new && !tc_qdisc_dump_ignore(new)) { if (tc_fill_qdisc(skb, new, clid, pid, n->nlmsg_seq, old ? NLM_F_REPLACE : 0, RTM_NEWQDISC) < 0) goto err_out; } @@ -1223,11 +1228,6 @@ return -EINVAL; } -static bool tc_qdisc_dump_ignore(struct Qdisc *q) -{ - return (q->flags & TCQ_F_BUILTIN) ? true : false; -} - static int tc_dump_qdisc_root(struct Qdisc *root, struct sk_buff *skb, struct netlink_callback *cb, int *q_idx_p, int s_q_idx) --- linux-fsl-imx51-2.6.31.orig/net/sched/act_gact.c +++ linux-fsl-imx51-2.6.31/net/sched/act_gact.c @@ -152,21 +152,24 @@ static int tcf_gact_dump(struct sk_buff *skb, struct tc_action *a, int bind, int ref) { unsigned char *b = skb_tail_pointer(skb); - struct tc_gact opt; struct tcf_gact *gact = a->priv; + struct tc_gact opt = { + .index = gact->tcf_index, + .refcnt = gact->tcf_refcnt - ref, + .bindcnt = gact->tcf_bindcnt - bind, + .action = gact->tcf_action, + }; struct tcf_t t; - opt.index = gact->tcf_index; - opt.refcnt = gact->tcf_refcnt - ref; - opt.bindcnt = gact->tcf_bindcnt - bind; - opt.action = gact->tcf_action; NLA_PUT(skb, TCA_GACT_PARMS, sizeof(opt), &opt); #ifdef CONFIG_GACT_PROB if (gact->tcfg_ptype) { - struct tc_gact_p p_opt; - p_opt.paction = gact->tcfg_paction; - p_opt.pval = gact->tcfg_pval; - p_opt.ptype = gact->tcfg_ptype; + struct tc_gact_p p_opt = { + .paction = gact->tcfg_paction, + .pval = gact->tcfg_pval, + .ptype = gact->tcfg_ptype, + }; + NLA_PUT(skb, TCA_GACT_PROB, sizeof(p_opt), &p_opt); } #endif --- linux-fsl-imx51-2.6.31.orig/net/sched/cls_api.c +++ linux-fsl-imx51-2.6.31/net/sched/cls_api.c @@ -348,7 +348,7 @@ tcm = NLMSG_DATA(nlh); tcm->tcm_family = AF_UNSPEC; tcm->tcm__pad1 = 0; - tcm->tcm__pad1 = 0; + tcm->tcm__pad2 = 0; tcm->tcm_ifindex = qdisc_dev(tp->q)->ifindex; tcm->tcm_parent = tp->classid; tcm->tcm_info = TC_H_MAKE(tp->prio, tp->protocol); --- linux-fsl-imx51-2.6.31.orig/net/sched/act_pedit.c +++ linux-fsl-imx51-2.6.31/net/sched/act_pedit.c @@ -34,7 +34,7 @@ }; static const struct nla_policy pedit_policy[TCA_PEDIT_MAX + 1] = { - [TCA_PEDIT_PARMS] = { .len = sizeof(struct tcf_pedit) }, + [TCA_PEDIT_PARMS] = { .len = sizeof(struct tc_pedit) }, }; static int tcf_pedit_init(struct nlattr *nla, struct nlattr *est, --- linux-fsl-imx51-2.6.31.orig/net/sched/act_simple.c +++ linux-fsl-imx51-2.6.31/net/sched/act_simple.c @@ -163,13 +163,14 @@ { unsigned char *b = skb_tail_pointer(skb); struct tcf_defact *d = a->priv; - struct tc_defact opt; + struct tc_defact opt = { + .index = d->tcf_index, + .refcnt = d->tcf_refcnt - ref, + .bindcnt = d->tcf_bindcnt - bind, + .action = d->tcf_action, + }; struct tcf_t t; - opt.index = d->tcf_index; - opt.refcnt = d->tcf_refcnt - ref; - opt.bindcnt = d->tcf_bindcnt - bind; - opt.action = d->tcf_action; NLA_PUT(skb, TCA_DEF_PARMS, sizeof(opt), &opt); NLA_PUT_STRING(skb, TCA_DEF_DATA, d->tcfd_defdata); t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install); --- linux-fsl-imx51-2.6.31.orig/net/llc/llc_c_ac.c +++ linux-fsl-imx51-2.6.31/net/llc/llc_c_ac.c @@ -1437,7 +1437,7 @@ llc_conn_state_process(sk, skb); else { llc_set_backlog_type(skb, LLC_EVENT); - sk_add_backlog(sk, skb); + __sk_add_backlog(sk, skb); } } } --- linux-fsl-imx51-2.6.31.orig/net/llc/llc_conn.c +++ linux-fsl-imx51-2.6.31/net/llc/llc_conn.c @@ -756,7 +756,8 @@ else { dprintk("%s: adding to backlog...\n", __func__); llc_set_backlog_type(skb, LLC_PACKET); - sk_add_backlog(sk, skb); + if (sk_add_backlog(sk, skb)) + goto drop_unlock; } out: bh_unlock_sock(sk); --- linux-fsl-imx51-2.6.31.orig/net/mac80211/agg-rx.c +++ linux-fsl-imx51-2.6.31/net/mac80211/agg-rx.c @@ -85,10 +85,6 @@ struct ieee80211_local *local = sdata->local; struct sta_info *sta; - /* stop HW Rx aggregation. ampdu_action existence - * already verified in session init so we add the BUG_ON */ - BUG_ON(!local->ops->ampdu_action); - rcu_read_lock(); sta = sta_info_get(local, ra); --- linux-fsl-imx51-2.6.31.orig/net/mac80211/ieee80211_i.h +++ linux-fsl-imx51-2.6.31/net/mac80211/ieee80211_i.h @@ -1057,6 +1057,8 @@ int __ieee80211_stop_tx_ba_session(struct sta_info *sta, u16 tid, enum ieee80211_back_parties initiator); +int ___ieee80211_stop_tx_ba_session(struct sta_info *sta, u16 tid, + enum ieee80211_back_parties initiator); /* Spectrum management */ void ieee80211_process_measurement_req(struct ieee80211_sub_if_data *sdata, --- linux-fsl-imx51-2.6.31.orig/net/mac80211/agg-tx.c +++ linux-fsl-imx51-2.6.31/net/mac80211/agg-tx.c @@ -123,13 +123,18 @@ ieee80211_tx_skb(sdata, skb, 0); } -static int ___ieee80211_stop_tx_ba_session(struct sta_info *sta, u16 tid, - enum ieee80211_back_parties initiator) +int ___ieee80211_stop_tx_ba_session(struct sta_info *sta, u16 tid, + enum ieee80211_back_parties initiator) { struct ieee80211_local *local = sta->local; int ret; u8 *state; +#ifdef CONFIG_MAC80211_HT_DEBUG + printk(KERN_DEBUG "Tx BA session stop requested for %pM tid %u\n", + sta->sta.addr, tid); +#endif /* CONFIG_MAC80211_HT_DEBUG */ + state = &sta->ampdu_mlme.tid_state_tx[tid]; if (*state == HT_AGG_STATE_OPERATIONAL) @@ -143,7 +148,6 @@ /* HW shall not deny going back to legacy */ if (WARN_ON(ret)) { - *state = HT_AGG_STATE_OPERATIONAL; /* * We may have pending packets get stuck in this case... * Not bothering with a workaround for now. @@ -526,11 +530,6 @@ goto unlock; } -#ifdef CONFIG_MAC80211_HT_DEBUG - printk(KERN_DEBUG "Tx BA session stop requested for %pM tid %u\n", - sta->sta.addr, tid); -#endif /* CONFIG_MAC80211_HT_DEBUG */ - ret = ___ieee80211_stop_tx_ba_session(sta, tid, initiator); unlock: @@ -546,7 +545,7 @@ struct sta_info *sta; int ret = 0; - if (WARN_ON(!local->ops->ampdu_action)) + if (!local->ops->ampdu_action) return -EINVAL; if (tid >= STA_TID_NUM) --- linux-fsl-imx51-2.6.31.orig/net/mac80211/rx.c +++ linux-fsl-imx51-2.6.31/net/mac80211/rx.c @@ -2155,11 +2155,17 @@ skb = rx.skb; - list_for_each_entry_rcu(sdata, &local->interfaces, list) { + if (rx.sdata && ieee80211_is_data(hdr->frame_control)) { + rx.flags |= IEEE80211_RX_RA_MATCH; + prepares = prepare_for_handlers(rx.sdata, &rx, hdr); + if (prepares) + prev = rx.sdata; + } else list_for_each_entry_rcu(sdata, &local->interfaces, list) { if (!netif_running(sdata->dev)) continue; - if (sdata->vif.type == NL80211_IFTYPE_MONITOR) + if (sdata->vif.type == NL80211_IFTYPE_MONITOR || + sdata->vif.type == NL80211_IFTYPE_AP_VLAN) continue; rx.flags |= IEEE80211_RX_RA_MATCH; --- linux-fsl-imx51-2.6.31.orig/net/mac80211/ht.c +++ linux-fsl-imx51-2.6.31/net/mac80211/ht.c @@ -141,7 +141,6 @@ struct sta_info *sta, struct ieee80211_mgmt *mgmt, size_t len) { - struct ieee80211_local *local = sdata->local; u16 tid, params; u16 initiator; @@ -161,10 +160,9 @@ WLAN_BACK_INITIATOR, 0); else { /* WLAN_BACK_RECIPIENT */ spin_lock_bh(&sta->lock); - sta->ampdu_mlme.tid_state_tx[tid] = - HT_AGG_STATE_OPERATIONAL; + if (sta->ampdu_mlme.tid_state_tx[tid] & HT_ADDBA_REQUESTED_MSK) + ___ieee80211_stop_tx_ba_session(sta, tid, + WLAN_BACK_RECIPIENT); spin_unlock_bh(&sta->lock); - ieee80211_stop_tx_ba_session(&local->hw, sta->sta.addr, tid, - WLAN_BACK_RECIPIENT); } } --- linux-fsl-imx51-2.6.31.orig/net/mac80211/sta_info.c +++ linux-fsl-imx51-2.6.31/net/mac80211/sta_info.c @@ -360,6 +360,7 @@ u.ap); drv_sta_notify(local, &sdata->vif, STA_NOTIFY_ADD, &sta->sta); + sdata = sta->sdata; } #ifdef CONFIG_MAC80211_VERBOSE_DEBUG @@ -494,6 +495,7 @@ drv_sta_notify(local, &sdata->vif, STA_NOTIFY_REMOVE, &(*sta)->sta); + sdata = (*sta)->sdata; } if (ieee80211_vif_is_mesh(&sdata->vif)) { --- linux-fsl-imx51-2.6.31.orig/net/mac80211/util.c +++ linux-fsl-imx51-2.6.31/net/mac80211/util.c @@ -537,7 +537,7 @@ if (elen > left) break; - if (calc_crc && id < 64 && (filter & BIT(id))) + if (calc_crc && id < 64 && (filter & (1ULL << id))) crc = crc32_be(crc, pos - 2, elen + 2); switch (id) { --- linux-fsl-imx51-2.6.31.orig/net/mac80211/tx.c +++ linux-fsl-imx51-2.6.31/net/mac80211/tx.c @@ -1478,7 +1478,7 @@ if (sdata->vif.type != NL80211_IFTYPE_AP) continue; if (compare_ether_addr(sdata->dev->dev_addr, - hdr->addr2)) { + hdr->addr2) == 0) { dev_hold(sdata->dev); dev_put(odev); osdata = sdata; @@ -1736,7 +1736,8 @@ if (!is_multicast_ether_addr(hdr.addr1)) { rcu_read_lock(); sta = sta_info_get(local, hdr.addr1); - if (sta) + /* XXX: in the future, use sdata to look up the sta */ + if (sta && sta->sdata == sdata) sta_flags = get_sta_flags(sta); rcu_read_unlock(); } --- linux-fsl-imx51-2.6.31.orig/net/mac80211/cfg.c +++ linux-fsl-imx51-2.6.31/net/mac80211/cfg.c @@ -87,6 +87,9 @@ if (!dev) return -ENODEV; + if (netif_running(dev)) + return -EBUSY; + if (!nl80211_type_check(type)) return -EINVAL; @@ -96,9 +99,6 @@ if (ret) return ret; - if (netif_running(sdata->dev)) - return -EBUSY; - if (ieee80211_vif_is_mesh(&sdata->vif) && params->mesh_id_len) ieee80211_sdata_set_mesh_id(sdata, params->mesh_id_len, --- linux-fsl-imx51-2.6.31.orig/net/mac80211/debugfs_netdev.c +++ linux-fsl-imx51-2.6.31/net/mac80211/debugfs_netdev.c @@ -470,6 +470,7 @@ { struct net_device *dev = ndev; struct dentry *dir; + struct ieee80211_local *local; struct ieee80211_sub_if_data *sdata; char buf[10+IFNAMSIZ]; @@ -482,7 +483,12 @@ if (dev->ieee80211_ptr->wiphy->privid != mac80211_wiphy_privid) return 0; - sdata = IEEE80211_DEV_TO_SUB_IF(dev); + /* + * Do not use IEEE80211_DEV_TO_SUB_IF because that + * BUG_ONs for the master netdev which we need to + * handle here. + */ + sdata = netdev_priv(dev); dir = sdata->debugfsdir; --- linux-fsl-imx51-2.6.31.orig/net/unix/garbage.c +++ linux-fsl-imx51-2.6.31/net/unix/garbage.c @@ -269,9 +269,16 @@ } static bool gc_in_progress = false; +#define UNIX_INFLIGHT_TRIGGER_GC 16000 void wait_for_unix_gc(void) { + /* + * If number of inflight sockets is insane, + * force a garbage collect right now. + */ + if (unix_tot_inflight > UNIX_INFLIGHT_TRIGGER_GC && !gc_in_progress) + unix_gc(); wait_event(unix_gc_wait, gc_in_progress == false); } --- linux-fsl-imx51-2.6.31.orig/net/unix/af_unix.c +++ linux-fsl-imx51-2.6.31/net/unix/af_unix.c @@ -1074,6 +1074,8 @@ err = -ECONNREFUSED; if (other->sk_state != TCP_LISTEN) goto out_unlock; + if (other->sk_shutdown & RCV_SHUTDOWN) + goto out_unlock; if (unix_recvq_full(other)) { err = -EAGAIN; @@ -1501,6 +1503,7 @@ struct sk_buff *skb; int sent = 0; struct scm_cookie tmp_scm; + bool fds_sent = false; if (NULL == siocb->scm) siocb->scm = &tmp_scm; @@ -1562,12 +1565,14 @@ size = min_t(int, size, skb_tailroom(skb)); memcpy(UNIXCREDS(skb), &siocb->scm->creds, sizeof(struct ucred)); - if (siocb->scm->fp) { + /* Only send the fds in the first buffer */ + if (siocb->scm->fp && !fds_sent) { err = unix_attach_fds(siocb->scm, skb); if (err) { kfree_skb(skb); goto out_err; } + fds_sent = true; } err = memcpy_fromiovec(skb_put(skb, size), msg->msg_iov, size); --- linux-fsl-imx51-2.6.31.orig/net/appletalk/ddp.c +++ linux-fsl-imx51-2.6.31/net/appletalk/ddp.c @@ -1270,8 +1270,10 @@ struct net_device_stats *stats; /* This needs to be able to handle ipddp"N" devices */ - if (!dev) - return -ENODEV; + if (!dev) { + kfree_skb(skb); + return NET_RX_DROP; + } skb->protocol = htons(ETH_P_IP); skb_pull(skb, 13); @@ -1281,8 +1283,7 @@ stats = netdev_priv(dev); stats->rx_packets++; stats->rx_bytes += skb->len + 13; - netif_rx(skb); /* Send the SKB up to a higher place. */ - return 0; + return netif_rx(skb); /* Send the SKB up to a higher place. */ } #else /* make it easy for gcc to optimize this test out, i.e. kill the code */ @@ -1290,9 +1291,8 @@ #define handle_ip_over_ddp(skb) 0 #endif -static void atalk_route_packet(struct sk_buff *skb, struct net_device *dev, - struct ddpehdr *ddp, __u16 len_hops, - int origlen) +static int atalk_route_packet(struct sk_buff *skb, struct net_device *dev, + struct ddpehdr *ddp, __u16 len_hops, int origlen) { struct atalk_route *rt; struct atalk_addr ta; @@ -1359,8 +1359,6 @@ /* 22 bytes - 12 ether, 2 len, 3 802.2 5 snap */ struct sk_buff *nskb = skb_realloc_headroom(skb, 32); kfree_skb(skb); - if (!nskb) - goto out; skb = nskb; } else skb = skb_unshare(skb, GFP_ATOMIC); @@ -1369,12 +1367,18 @@ * If the buffer didn't vanish into the lack of space bitbucket we can * send it. */ - if (skb && aarp_send_ddp(rt->dev, skb, &ta, NULL) == -1) - goto free_it; -out: - return; + if (skb == NULL) + goto drop; + + /* + * It is OK, NET_XMIT_SUCCESS == NET_RX_SUCCESS and + * NET_XMIT_DROP == NET_RX_DROP + */ + return aarp_send_ddp(rt->dev, skb, &ta, NULL); free_it: kfree_skb(skb); +drop: + return NET_RX_DROP; } /** @@ -1404,7 +1408,7 @@ /* Don't mangle buffer if shared */ if (!(skb = skb_share_check(skb, GFP_ATOMIC))) - goto out; + goto drop; /* Size check and make sure header is contiguous */ if (!pskb_may_pull(skb, sizeof(*ddp))) @@ -1448,8 +1452,7 @@ /* Not ours, so we route the packet via the correct * AppleTalk iface */ - atalk_route_packet(skb, dev, ddp, len_hops, origlen); - goto out; + return atalk_route_packet(skb, dev, ddp, len_hops, origlen); } /* if IP over DDP is not selected this code will be optimized out */ @@ -1472,11 +1475,12 @@ if (sock_queue_rcv_skb(sock, skb) < 0) goto freeit; -out: - return 0; + + return NET_RX_SUCCESS; freeit: kfree_skb(skb); - goto out; +drop: + return NET_RX_DROP; } /* @@ -1652,10 +1656,10 @@ if (skb2) { loopback = 1; SOCK_DEBUG(sk, "SK %p: send out(copy).\n", sk); - if (aarp_send_ddp(dev, skb2, - &usat->sat_addr, NULL) == -1) - kfree_skb(skb2); - /* else queued/sent above in the aarp queue */ + /* + * If it fails it is queued/sent above in the aarp queue + */ + aarp_send_ddp(dev, skb2, &usat->sat_addr, NULL); } } @@ -1685,9 +1689,10 @@ usat = &gsat; } - if (aarp_send_ddp(dev, skb, &usat->sat_addr, NULL) == -1) - kfree_skb(skb); - /* else queued/sent above in the aarp queue */ + /* + * If it fails it is queued/sent above in the aarp queue + */ + aarp_send_ddp(dev, skb, &usat->sat_addr, NULL); } SOCK_DEBUG(sk, "SK %p: Done write (%Zd).\n", sk, len); @@ -1865,7 +1870,6 @@ static unsigned char ddp_snap_id[] = { 0x08, 0x00, 0x07, 0x80, 0x9B }; /* Export symbols for use by drivers when AppleTalk is a module */ -EXPORT_SYMBOL(aarp_send_ddp); EXPORT_SYMBOL(atrtr_get_dev); EXPORT_SYMBOL(atalk_find_dev_addr); --- linux-fsl-imx51-2.6.31.orig/net/appletalk/aarp.c +++ linux-fsl-imx51-2.6.31/net/appletalk/aarp.c @@ -599,7 +599,7 @@ /* Non ELAP we cannot do. */ if (dev->type != ARPHRD_ETHER) - return -1; + goto free_it; skb->dev = dev; skb->protocol = htons(ETH_P_ATALK); @@ -634,7 +634,7 @@ if (!a) { /* Whoops slipped... good job it's an unreliable protocol 8) */ write_unlock_bh(&aarp_lock); - return -1; + goto free_it; } /* Set up the queue */ @@ -663,15 +663,21 @@ write_unlock_bh(&aarp_lock); /* Tell the ddp layer we have taken over for this frame. */ - return 0; + goto sent; sendit: if (skb->sk) skb->priority = skb->sk->sk_priority; - dev_queue_xmit(skb); + if (dev_queue_xmit(skb)) + goto drop; sent: - return 1; + return NET_XMIT_SUCCESS; +free_it: + kfree_skb(skb); +drop: + return NET_XMIT_DROP; } +EXPORT_SYMBOL(aarp_send_ddp); /* * An entry in the aarp unresolved queue has become resolved. Send --- linux-fsl-imx51-2.6.31.orig/net/rfkill/core.c +++ linux-fsl-imx51-2.6.31/net/rfkill/core.c @@ -1180,6 +1180,7 @@ #endif static const struct file_operations rfkill_fops = { + .owner = THIS_MODULE, .open = rfkill_fop_open, .read = rfkill_fop_read, .write = rfkill_fop_write, --- linux-fsl-imx51-2.6.31.orig/net/irda/iriap.c +++ linux-fsl-imx51-2.6.31/net/irda/iriap.c @@ -654,10 +654,16 @@ n = 1; name_len = fp[n++]; + + IRDA_ASSERT(name_len < IAS_MAX_CLASSNAME + 1, return;); + memcpy(name, fp+n, name_len); n+=name_len; name[name_len] = '\0'; attr_len = fp[n++]; + + IRDA_ASSERT(attr_len < IAS_MAX_ATTRIBNAME + 1, return;); + memcpy(attr, fp+n, attr_len); n+=attr_len; attr[attr_len] = '\0'; --- linux-fsl-imx51-2.6.31.orig/net/irda/af_irda.c +++ linux-fsl-imx51-2.6.31/net/irda/af_irda.c @@ -810,8 +810,8 @@ err = irda_open_tsap(self, addr->sir_lsap_sel, addr->sir_name); if (err < 0) { - kfree(self->ias_obj->name); - kfree(self->ias_obj); + irias_delete_object(self->ias_obj); + self->ias_obj = NULL; return err; } @@ -2164,6 +2164,14 @@ switch (optname) { case IRLMP_ENUMDEVICES: + + /* Offset to first device entry */ + offset = sizeof(struct irda_device_list) - + sizeof(struct irda_device_info); + + if (len < offset) + return -EINVAL; + /* Ask lmp for the current discovery log */ discoveries = irlmp_get_discoveries(&list.len, self->mask.word, self->nslots); @@ -2173,15 +2181,9 @@ err = 0; /* Write total list length back to client */ - if (copy_to_user(optval, &list, - sizeof(struct irda_device_list) - - sizeof(struct irda_device_info))) + if (copy_to_user(optval, &list, offset)) err = -EFAULT; - /* Offset to first device entry */ - offset = sizeof(struct irda_device_list) - - sizeof(struct irda_device_info); - /* Copy the list itself - watch for overflow */ if(list.len > 2048) { --- linux-fsl-imx51-2.6.31.orig/net/bridge/br_netfilter.c +++ linux-fsl-imx51-2.6.31/net/bridge/br_netfilter.c @@ -359,7 +359,7 @@ }, .proto = 0, }; - struct in_device *in_dev = in_dev_get(dev); + struct in_device *in_dev = __in_dev_get_rcu(dev); /* If err equals -EHOSTUNREACH the error is due to a * martian destination or due to the fact that --- linux-fsl-imx51-2.6.31.orig/net/bridge/netfilter/ebtables.c +++ linux-fsl-imx51-2.6.31/net/bridge/netfilter/ebtables.c @@ -979,6 +979,8 @@ if (tmp.num_counters >= INT_MAX / sizeof(struct ebt_counter)) return -ENOMEM; + tmp.name[sizeof(tmp.name) - 1] = 0; + countersize = COUNTER_OFFSET(tmp.nentries) * nr_cpu_ids; newinfo = vmalloc(sizeof(*newinfo) + countersize); if (!newinfo) @@ -1405,6 +1407,9 @@ { int ret; + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + switch(cmd) { case EBT_SO_SET_ENTRIES: ret = do_replace(sock_net(sk), user, len); @@ -1424,6 +1429,9 @@ struct ebt_replace tmp; struct ebt_table *t; + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + if (copy_from_user(&tmp, user, sizeof(tmp))) return -EFAULT; --- linux-fsl-imx51-2.6.31.orig/net/bridge/netfilter/ebt_ulog.c +++ linux-fsl-imx51-2.6.31/net/bridge/netfilter/ebt_ulog.c @@ -266,7 +266,7 @@ if (uloginfo->qthreshold > EBT_ULOG_MAX_QLEN) uloginfo->qthreshold = EBT_ULOG_MAX_QLEN; - return 0; + return true; } static struct xt_target ebt_ulog_tg_reg __read_mostly = { --- linux-fsl-imx51-2.6.31.orig/net/sctp/transport.c +++ linux-fsl-imx51-2.6.31/net/sctp/transport.c @@ -108,6 +108,8 @@ (unsigned long)peer); setup_timer(&peer->hb_timer, sctp_generate_heartbeat_event, (unsigned long)peer); + setup_timer(&peer->proto_unreach_timer, + sctp_generate_proto_unreach_event, (unsigned long)peer); /* Initialize the 64-bit random nonce sent with heartbeat. */ get_random_bytes(&peer->hb_nonce, sizeof(peer->hb_nonce)); --- linux-fsl-imx51-2.6.31.orig/net/sctp/sm_make_chunk.c +++ linux-fsl-imx51-2.6.31/net/sctp/sm_make_chunk.c @@ -107,7 +107,7 @@ cpu_to_be16(sizeof(struct sctp_paramhdr)), }; -/* A helper to initialize to initialize an op error inside a +/* A helper to initialize an op error inside a * provided chunk, as most cause codes will be embedded inside an * abort chunk. */ @@ -124,6 +124,29 @@ chunk->subh.err_hdr = sctp_addto_chunk(chunk, sizeof(sctp_errhdr_t), &err); } +/* A helper to initialize an op error inside a + * provided chunk, as most cause codes will be embedded inside an + * abort chunk. Differs from sctp_init_cause in that it won't oops + * if there isn't enough space in the op error chunk + */ +int sctp_init_cause_fixed(struct sctp_chunk *chunk, __be16 cause_code, + size_t paylen) +{ + sctp_errhdr_t err; + __u16 len; + + /* Cause code constants are now defined in network order. */ + err.cause = cause_code; + len = sizeof(sctp_errhdr_t) + paylen; + err.length = htons(len); + + if (skb_tailroom(chunk->skb) < len) + return -ENOSPC; + chunk->subh.err_hdr = sctp_addto_chunk_fixed(chunk, + sizeof(sctp_errhdr_t), + &err); + return 0; +} /* 3.3.2 Initiation (INIT) (1) * * This chunk is used to initiate a SCTP association between two @@ -207,7 +230,8 @@ sp = sctp_sk(asoc->base.sk); num_types = sp->pf->supported_addrs(sp, types); - chunksize = sizeof(init) + addrs_len + SCTP_SAT_LEN(num_types); + chunksize = sizeof(init) + addrs_len; + chunksize += WORD_ROUND(SCTP_SAT_LEN(num_types)); chunksize += sizeof(ecap_param); if (sctp_prsctp_enable) @@ -237,14 +261,14 @@ /* Add HMACS parameter length if any were defined */ auth_hmacs = (sctp_paramhdr_t *)asoc->c.auth_hmacs; if (auth_hmacs->length) - chunksize += ntohs(auth_hmacs->length); + chunksize += WORD_ROUND(ntohs(auth_hmacs->length)); else auth_hmacs = NULL; /* Add CHUNKS parameter length */ auth_chunks = (sctp_paramhdr_t *)asoc->c.auth_chunks; if (auth_chunks->length) - chunksize += ntohs(auth_chunks->length); + chunksize += WORD_ROUND(ntohs(auth_chunks->length)); else auth_chunks = NULL; @@ -254,7 +278,8 @@ /* If we have any extensions to report, account for that */ if (num_ext) - chunksize += sizeof(sctp_supported_ext_param_t) + num_ext; + chunksize += WORD_ROUND(sizeof(sctp_supported_ext_param_t) + + num_ext); /* RFC 2960 3.3.2 Initiation (INIT) (1) * @@ -396,13 +421,13 @@ auth_hmacs = (sctp_paramhdr_t *)asoc->c.auth_hmacs; if (auth_hmacs->length) - chunksize += ntohs(auth_hmacs->length); + chunksize += WORD_ROUND(ntohs(auth_hmacs->length)); else auth_hmacs = NULL; auth_chunks = (sctp_paramhdr_t *)asoc->c.auth_chunks; if (auth_chunks->length) - chunksize += ntohs(auth_chunks->length); + chunksize += WORD_ROUND(ntohs(auth_chunks->length)); else auth_chunks = NULL; @@ -411,7 +436,8 @@ } if (num_ext) - chunksize += sizeof(sctp_supported_ext_param_t) + num_ext; + chunksize += WORD_ROUND(sizeof(sctp_supported_ext_param_t) + + num_ext); /* Now allocate and fill out the chunk. */ retval = sctp_make_chunk(asoc, SCTP_CID_INIT_ACK, 0, chunksize); @@ -1125,6 +1151,24 @@ return retval; } +/* Create an Operation Error chunk of a fixed size, + * specifically, max(asoc->pathmtu, SCTP_DEFAULT_MAXSEGMENT) + * This is a helper function to allocate an error chunk for + * for those invalid parameter codes in which we may not want + * to report all the errors, if the incomming chunk is large + */ +static inline struct sctp_chunk *sctp_make_op_error_fixed( + const struct sctp_association *asoc, + const struct sctp_chunk *chunk) +{ + size_t size = asoc ? asoc->pathmtu : 0; + + if (!size) + size = SCTP_DEFAULT_MAXSEGMENT; + + return sctp_make_op_error_space(asoc, chunk, size); +} + /* Create an Operation Error chunk. */ struct sctp_chunk *sctp_make_op_error(const struct sctp_association *asoc, const struct sctp_chunk *chunk, @@ -1365,6 +1409,18 @@ return target; } +/* Append bytes to the end of a chunk. Returns NULL if there isn't sufficient + * space in the chunk + */ +void *sctp_addto_chunk_fixed(struct sctp_chunk *chunk, + int len, const void *data) +{ + if (skb_tailroom(chunk->skb) >= len) + return sctp_addto_chunk(chunk, len, data); + else + return NULL; +} + /* Append bytes from user space to the end of a chunk. Will panic if * chunk is not big enough. * Returns a kernel err value. @@ -1968,13 +2024,12 @@ * returning multiple unknown parameters. */ if (NULL == *errp) - *errp = sctp_make_op_error_space(asoc, chunk, - ntohs(chunk->chunk_hdr->length)); + *errp = sctp_make_op_error_fixed(asoc, chunk); if (*errp) { - sctp_init_cause(*errp, SCTP_ERROR_UNKNOWN_PARAM, + sctp_init_cause_fixed(*errp, SCTP_ERROR_UNKNOWN_PARAM, WORD_ROUND(ntohs(param.p->length))); - sctp_addto_chunk(*errp, + sctp_addto_chunk_fixed(*errp, WORD_ROUND(ntohs(param.p->length)), param.v); } else { --- linux-fsl-imx51-2.6.31.orig/net/sctp/sm_sideeffect.c +++ linux-fsl-imx51-2.6.31/net/sctp/sm_sideeffect.c @@ -397,6 +397,41 @@ sctp_transport_put(transport); } +/* Handle the timeout of the ICMP protocol unreachable timer. Trigger + * the correct state machine transition that will close the association. + */ +void sctp_generate_proto_unreach_event(unsigned long data) +{ + struct sctp_transport *transport = (struct sctp_transport *) data; + struct sctp_association *asoc = transport->asoc; + + sctp_bh_lock_sock(asoc->base.sk); + if (sock_owned_by_user(asoc->base.sk)) { + SCTP_DEBUG_PRINTK("%s:Sock is busy.\n", __func__); + + /* Try again later. */ + if (!mod_timer(&transport->proto_unreach_timer, + jiffies + (HZ/20))) + sctp_association_hold(asoc); + goto out_unlock; + } + + /* Is this structure just waiting around for us to actually + * get destroyed? + */ + if (asoc->base.dead) + goto out_unlock; + + sctp_do_sm(SCTP_EVENT_T_OTHER, + SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH), + asoc->state, asoc->ep, asoc, transport, GFP_ATOMIC); + +out_unlock: + sctp_bh_unlock_sock(asoc->base.sk); + sctp_association_put(asoc); +} + + /* Inject a SACK Timeout event into the state machine. */ static void sctp_generate_sack_event(unsigned long data) { --- linux-fsl-imx51-2.6.31.orig/net/sctp/input.c +++ linux-fsl-imx51-2.6.31/net/sctp/input.c @@ -75,7 +75,7 @@ const union sctp_addr *peer, struct sctp_transport **pt); -static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb); +static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb); /* Calculate the SCTP checksum of an SCTP packet. */ @@ -265,8 +265,13 @@ } if (sock_owned_by_user(sk)) { + if (sctp_add_backlog(sk, skb)) { + sctp_bh_unlock_sock(sk); + sctp_chunk_free(chunk); + skb = NULL; /* sctp_chunk_free already freed the skb */ + goto discard_release; + } SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_BACKLOG); - sctp_add_backlog(sk, skb); } else { SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_SOFTIRQ); sctp_inq_push(&chunk->rcvr->inqueue, chunk); @@ -336,8 +341,10 @@ sctp_bh_lock_sock(sk); if (sock_owned_by_user(sk)) { - sk_add_backlog(sk, skb); - backloged = 1; + if (sk_add_backlog(sk, skb)) + sctp_chunk_free(chunk); + else + backloged = 1; } else sctp_inq_push(inqueue, chunk); @@ -362,22 +369,27 @@ return 0; } -static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb) +static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb) { struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk; struct sctp_ep_common *rcvr = chunk->rcvr; + int ret; - /* Hold the assoc/ep while hanging on the backlog queue. - * This way, we know structures we need will not disappear from us - */ - if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type) - sctp_association_hold(sctp_assoc(rcvr)); - else if (SCTP_EP_TYPE_SOCKET == rcvr->type) - sctp_endpoint_hold(sctp_ep(rcvr)); - else - BUG(); + ret = sk_add_backlog(sk, skb); + if (!ret) { + /* Hold the assoc/ep while hanging on the backlog queue. + * This way, we know structures we need will not disappear + * from us + */ + if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type) + sctp_association_hold(sctp_assoc(rcvr)); + else if (SCTP_EP_TYPE_SOCKET == rcvr->type) + sctp_endpoint_hold(sctp_ep(rcvr)); + else + BUG(); + } + return ret; - sk_add_backlog(sk, skb); } /* Handle icmp frag needed error. */ @@ -427,11 +439,25 @@ { SCTP_DEBUG_PRINTK("%s\n", __func__); - sctp_do_sm(SCTP_EVENT_T_OTHER, - SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH), - asoc->state, asoc->ep, asoc, t, - GFP_ATOMIC); + if (sock_owned_by_user(sk)) { + if (timer_pending(&t->proto_unreach_timer)) + return; + else { + if (!mod_timer(&t->proto_unreach_timer, + jiffies + (HZ/20))) + sctp_association_hold(asoc); + } + + } else { + if (timer_pending(&t->proto_unreach_timer) && + del_timer(&t->proto_unreach_timer)) + sctp_association_put(asoc); + sctp_do_sm(SCTP_EVENT_T_OTHER, + SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH), + asoc->state, asoc->ep, asoc, t, + GFP_ATOMIC); + } } /* Common lookup code for icmp/icmpv6 error handler. */ --- linux-fsl-imx51-2.6.31.orig/net/sctp/auth.c +++ linux-fsl-imx51-2.6.31/net/sctp/auth.c @@ -542,16 +542,20 @@ id = ntohs(hmacs->hmac_ids[i]); /* Check the id is in the supported range */ - if (id > SCTP_AUTH_HMAC_ID_MAX) + if (id > SCTP_AUTH_HMAC_ID_MAX) { + id = 0; continue; + } /* See is we support the id. Supported IDs have name and * length fields set, so that we can allocated and use * them. We can safely just check for name, for without the * name, we can't allocate the TFM. */ - if (!sctp_hmac_list[id].hmac_name) + if (!sctp_hmac_list[id].hmac_name) { + id = 0; continue; + } break; } --- linux-fsl-imx51-2.6.31.orig/net/sctp/output.c +++ linux-fsl-imx51-2.6.31/net/sctp/output.c @@ -64,6 +64,17 @@ static sctp_xmit_t sctp_packet_append_data(struct sctp_packet *packet, struct sctp_chunk *chunk); +static void sctp_packet_reset(struct sctp_packet *packet) +{ + packet->size = packet->overhead; + packet->has_cookie_echo = 0; + packet->has_sack = 0; + packet->has_data = 0; + packet->has_auth = 0; + packet->ipfragok = 0; + packet->auth = NULL; +} + /* Config a packet. * This appears to be a followup set of initializations. */ @@ -76,12 +87,6 @@ packet, vtag); packet->vtag = vtag; - packet->has_cookie_echo = 0; - packet->has_sack = 0; - packet->has_auth = 0; - packet->has_data = 0; - packet->ipfragok = 0; - packet->auth = NULL; if (ecn_capable && sctp_packet_empty(packet)) { chunk = sctp_get_ecne_prepend(packet->transport->asoc); @@ -119,15 +124,9 @@ } overhead += sizeof(struct sctphdr); packet->overhead = overhead; - packet->size = overhead; + sctp_packet_reset(packet); packet->vtag = 0; - packet->has_cookie_echo = 0; - packet->has_sack = 0; - packet->has_auth = 0; - packet->has_data = 0; - packet->ipfragok = 0; packet->malloced = 0; - packet->auth = NULL; return packet; } @@ -598,7 +597,7 @@ (*tp->af_specific->sctp_xmit)(nskb, tp); out: - packet->size = packet->overhead; + sctp_packet_reset(packet); return err; no_route: kfree_skb(nskb); --- linux-fsl-imx51-2.6.31.orig/net/ipv4/udp.c +++ linux-fsl-imx51-2.6.31/net/ipv4/udp.c @@ -831,6 +831,42 @@ return ret; } + +/** + * first_packet_length - return length of first packet in receive queue + * @sk: socket + * + * Drops all bad checksum frames, until a valid one is found. + * Returns the length of found skb, or 0 if none is found. + */ +static unsigned int first_packet_length(struct sock *sk) +{ + struct sk_buff_head list_kill, *rcvq = &sk->sk_receive_queue; + struct sk_buff *skb; + unsigned int res; + + __skb_queue_head_init(&list_kill); + + spin_lock_bh(&rcvq->lock); + while ((skb = skb_peek(rcvq)) != NULL && + udp_lib_checksum_complete(skb)) { + UDP_INC_STATS_BH(sock_net(sk), UDP_MIB_INERRORS, + IS_UDPLITE(sk)); + __skb_unlink(skb, rcvq); + __skb_queue_tail(&list_kill, skb); + } + res = skb ? skb->len : 0; + spin_unlock_bh(&rcvq->lock); + + if (!skb_queue_empty(&list_kill)) { + lock_sock(sk); + __skb_queue_purge(&list_kill); + sk_mem_reclaim_partial(sk); + release_sock(sk); + } + return res; +} + /* * IOCTL requests applicable to the UDP protocol */ @@ -847,21 +883,16 @@ case SIOCINQ: { - struct sk_buff *skb; - unsigned long amount; + unsigned int amount = first_packet_length(sk); - amount = 0; - spin_lock_bh(&sk->sk_receive_queue.lock); - skb = skb_peek(&sk->sk_receive_queue); - if (skb != NULL) { + if (amount) /* * We will only return the amount * of this packet since that is all * that will be read. */ - amount = skb->len - sizeof(struct udphdr); - } - spin_unlock_bh(&sk->sk_receive_queue.lock); + amount -= sizeof(struct udphdr); + return put_user(amount, (int __user *)arg); } @@ -956,9 +987,7 @@ err = ulen; out_free: - lock_sock(sk); - skb_free_datagram(sk, skb); - release_sock(sk); + skb_free_datagram_locked(sk, skb); out: return err; @@ -1127,13 +1156,19 @@ goto drop; } + + if (sk_rcvqueues_full(sk, skb)) + goto drop; + rc = 0; bh_lock_sock(sk); if (!sock_owned_by_user(sk)) rc = __udp_queue_rcv_skb(sk, skb); - else - sk_add_backlog(sk, skb); + else if (sk_add_backlog(sk, skb)) { + bh_unlock_sock(sk); + goto drop; + } bh_unlock_sock(sk); return rc; @@ -1144,49 +1179,83 @@ return -1; } + +static void flush_stack(struct sock **stack, unsigned int count, + struct sk_buff *skb, unsigned int final) +{ + unsigned int i; + struct sk_buff *skb1 = NULL; + struct sock *sk; + + for (i = 0; i < count; i++) { + sk = stack[i]; + if (likely(skb1 == NULL)) + skb1 = (i == final) ? skb : skb_clone(skb, GFP_ATOMIC); + + if (!skb1) { + atomic_inc(&sk->sk_drops); + UDP_INC_STATS_BH(sock_net(sk), UDP_MIB_RCVBUFERRORS, + IS_UDPLITE(sk)); + UDP_INC_STATS_BH(sock_net(sk), UDP_MIB_INERRORS, + IS_UDPLITE(sk)); + } + + if (skb1 && udp_queue_rcv_skb(sk, skb1) <= 0) + skb1 = NULL; + } + if (unlikely(skb1)) + kfree_skb(skb1); +} + /* * Multicasts and broadcasts go to each listener. * - * Note: called only from the BH handler context, - * so we don't need to lock the hashes. + * Note: called only from the BH handler context. */ static int __udp4_lib_mcast_deliver(struct net *net, struct sk_buff *skb, struct udphdr *uh, __be32 saddr, __be32 daddr, struct udp_table *udptable) { - struct sock *sk; + struct sock *sk, *stack[256 / sizeof(struct sock *)]; struct udp_hslot *hslot = &udptable->hash[udp_hashfn(net, ntohs(uh->dest))]; int dif; + unsigned int i, count = 0; spin_lock(&hslot->lock); sk = sk_nulls_head(&hslot->head); dif = skb->dev->ifindex; sk = udp_v4_mcast_next(net, sk, uh->dest, daddr, uh->source, saddr, dif); - if (sk) { - struct sock *sknext = NULL; - - do { - struct sk_buff *skb1 = skb; + while (sk) { + stack[count++] = sk; + sk = udp_v4_mcast_next(net, sk_nulls_next(sk), uh->dest, + daddr, uh->source, saddr, dif); + if (unlikely(count == ARRAY_SIZE(stack))) { + if (!sk) + break; + flush_stack(stack, count, skb, ~0); + count = 0; + } + } + /* + * before releasing chain lock, we must take a reference on sockets + */ + for (i = 0; i < count; i++) + sock_hold(stack[i]); - sknext = udp_v4_mcast_next(net, sk_nulls_next(sk), uh->dest, - daddr, uh->source, saddr, - dif); - if (sknext) - skb1 = skb_clone(skb, GFP_ATOMIC); - - if (skb1) { - int ret = udp_queue_rcv_skb(sk, skb1); - if (ret > 0) - /* we should probably re-process instead - * of dropping packets here. */ - kfree_skb(skb1); - } - sk = sknext; - } while (sknext); - } else - consume_skb(skb); spin_unlock(&hslot->lock); + + /* + * do the slow work with no lock held + */ + if (count) { + flush_stack(stack, count, skb, count - 1); + + for (i = 0; i < count; i++) + sock_put(stack[i]); + } else { + kfree_skb(skb); + } return 0; } @@ -1525,32 +1594,13 @@ { unsigned int mask = datagram_poll(file, sock, wait); struct sock *sk = sock->sk; - int is_lite = IS_UDPLITE(sk); /* Check for false positives due to checksum errors */ - if ( (mask & POLLRDNORM) && - !(file->f_flags & O_NONBLOCK) && - !(sk->sk_shutdown & RCV_SHUTDOWN)){ - struct sk_buff_head *rcvq = &sk->sk_receive_queue; - struct sk_buff *skb; - - spin_lock_bh(&rcvq->lock); - while ((skb = skb_peek(rcvq)) != NULL && - udp_lib_checksum_complete(skb)) { - UDP_INC_STATS_BH(sock_net(sk), - UDP_MIB_INERRORS, is_lite); - __skb_unlink(skb, rcvq); - kfree_skb(skb); - } - spin_unlock_bh(&rcvq->lock); - - /* nothing to see, move along */ - if (skb == NULL) - mask &= ~(POLLIN | POLLRDNORM); - } + if ((mask & POLLRDNORM) && !(file->f_flags & O_NONBLOCK) && + !(sk->sk_shutdown & RCV_SHUTDOWN) && !first_packet_length(sk)) + mask &= ~(POLLIN | POLLRDNORM); return mask; - } struct proto udp_prot = { --- linux-fsl-imx51-2.6.31.orig/net/ipv4/ip_output.c +++ linux-fsl-imx51-2.6.31/net/ipv4/ip_output.c @@ -500,8 +500,8 @@ if (skb->sk) { frag->sk = skb->sk; frag->destructor = sock_wfree; - truesizes += frag->truesize; } + truesizes += frag->truesize; } /* Everything is OK. Generate! */ --- linux-fsl-imx51-2.6.31.orig/net/ipv4/inet_hashtables.c +++ linux-fsl-imx51-2.6.31/net/ipv4/inet_hashtables.c @@ -21,6 +21,7 @@ #include #include +#include #include /* --- linux-fsl-imx51-2.6.31.orig/net/ipv4/tcp_minisocks.c +++ linux-fsl-imx51-2.6.31/net/ipv4/tcp_minisocks.c @@ -363,7 +363,7 @@ #ifdef CONFIG_TCP_MD5SIG struct tcp_timewait_sock *twsk = tcp_twsk(sk); if (twsk->tw_md5_keylen) - tcp_put_md5sig_pool(); + tcp_free_md5sig_pool(); #endif } @@ -725,7 +725,7 @@ * in main socket hash table and lock on listening * socket does not protect us more. */ - sk_add_backlog(child, skb); + __sk_add_backlog(child, skb); } bh_unlock_sock(child); --- linux-fsl-imx51-2.6.31.orig/net/ipv4/ip_fragment.c +++ linux-fsl-imx51-2.6.31/net/ipv4/ip_fragment.c @@ -563,7 +563,7 @@ printk(KERN_INFO "Oversized IP packet from %pI4.\n", &qp->saddr); out_fail: - IP_INC_STATS_BH(dev_net(dev), IPSTATS_MIB_REASMFAILS); + IP_INC_STATS_BH(net, IPSTATS_MIB_REASMFAILS); return err; } --- linux-fsl-imx51-2.6.31.orig/net/ipv4/inet_diag.c +++ linux-fsl-imx51-2.6.31/net/ipv4/inet_diag.c @@ -436,7 +436,7 @@ return 0; if (cc == len) return 1; - if (op->yes < 4) + if (op->yes < 4 || op->yes & 3) return 0; len -= op->yes; bc += op->yes; @@ -446,11 +446,11 @@ static int inet_diag_bc_audit(const void *bytecode, int bytecode_len) { - const unsigned char *bc = bytecode; + const void *bc = bytecode; int len = bytecode_len; while (len > 0) { - struct inet_diag_bc_op *op = (struct inet_diag_bc_op *)bc; + const struct inet_diag_bc_op *op = bc; //printk("BC: %d %d %d {%d} / %d\n", op->code, op->yes, op->no, op[1].no, len); switch (op->code) { @@ -461,22 +461,20 @@ case INET_DIAG_BC_S_LE: case INET_DIAG_BC_D_GE: case INET_DIAG_BC_D_LE: - if (op->yes < 4 || op->yes > len + 4) - return -EINVAL; case INET_DIAG_BC_JMP: - if (op->no < 4 || op->no > len + 4) + if (op->no < 4 || op->no > len + 4 || op->no & 3) return -EINVAL; if (op->no < len && !valid_cc(bytecode, bytecode_len, len - op->no)) return -EINVAL; break; case INET_DIAG_BC_NOP: - if (op->yes < 4 || op->yes > len + 4) - return -EINVAL; break; default: return -EINVAL; } + if (op->yes < 4 || op->yes > len + 4 || op->yes & 3) + return -EINVAL; bc += op->yes; len -= op->yes; } @@ -489,9 +487,11 @@ { struct inet_diag_req *r = NLMSG_DATA(cb->nlh); - if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) { + if (nlmsg_attrlen(cb->nlh, sizeof(*r))) { struct inet_diag_entry entry; - struct rtattr *bc = (struct rtattr *)(r + 1); + const struct nlattr *bc = nlmsg_find_attr(cb->nlh, + sizeof(*r), + INET_DIAG_REQ_BYTECODE); struct inet_sock *inet = inet_sk(sk); entry.family = sk->sk_family; @@ -511,7 +511,7 @@ entry.dport = ntohs(inet->dport); entry.userlocks = sk->sk_userlocks; - if (!inet_diag_bc_run(RTA_DATA(bc), RTA_PAYLOAD(bc), &entry)) + if (!inet_diag_bc_run(nla_data(bc), nla_len(bc), &entry)) return 0; } @@ -526,9 +526,11 @@ { struct inet_diag_req *r = NLMSG_DATA(cb->nlh); - if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) { + if (nlmsg_attrlen(cb->nlh, sizeof(*r))) { struct inet_diag_entry entry; - struct rtattr *bc = (struct rtattr *)(r + 1); + const struct nlattr *bc = nlmsg_find_attr(cb->nlh, + sizeof(*r), + INET_DIAG_REQ_BYTECODE); entry.family = tw->tw_family; #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) @@ -547,7 +549,7 @@ entry.dport = ntohs(tw->tw_dport); entry.userlocks = 0; - if (!inet_diag_bc_run(RTA_DATA(bc), RTA_PAYLOAD(bc), &entry)) + if (!inet_diag_bc_run(nla_data(bc), nla_len(bc), &entry)) return 0; } @@ -617,7 +619,7 @@ struct inet_diag_req *r = NLMSG_DATA(cb->nlh); struct inet_connection_sock *icsk = inet_csk(sk); struct listen_sock *lopt; - struct rtattr *bc = NULL; + const struct nlattr *bc = NULL; struct inet_sock *inet = inet_sk(sk); int j, s_j; int reqnum, s_reqnum; @@ -637,8 +639,9 @@ if (!lopt || !lopt->qlen) goto out; - if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) { - bc = (struct rtattr *)(r + 1); + if (nlmsg_attrlen(cb->nlh, sizeof(*r))) { + bc = nlmsg_find_attr(cb->nlh, sizeof(*r), + INET_DIAG_REQ_BYTECODE); entry.sport = inet->num; entry.userlocks = sk->sk_userlocks; } @@ -671,8 +674,8 @@ &ireq->rmt_addr; entry.dport = ntohs(ireq->rmt_port); - if (!inet_diag_bc_run(RTA_DATA(bc), - RTA_PAYLOAD(bc), &entry)) + if (!inet_diag_bc_run(nla_data(bc), + nla_len(bc), &entry)) continue; } --- linux-fsl-imx51-2.6.31.orig/net/ipv4/ip_gre.c +++ linux-fsl-imx51-2.6.31/net/ipv4/ip_gre.c @@ -1672,14 +1672,15 @@ printk(KERN_INFO "GRE over IPv4 tunneling driver\n"); - if (inet_add_protocol(&ipgre_protocol, IPPROTO_GRE) < 0) { - printk(KERN_INFO "ipgre init: can't add protocol\n"); - return -EAGAIN; - } - err = register_pernet_gen_device(&ipgre_net_id, &ipgre_net_ops); if (err < 0) - goto gen_device_failed; + return err; + + err = inet_add_protocol(&ipgre_protocol, IPPROTO_GRE); + if (err < 0) { + printk(KERN_INFO "ipgre init: can't add protocol\n"); + goto add_proto_failed; + } err = rtnl_link_register(&ipgre_link_ops); if (err < 0) @@ -1695,9 +1696,9 @@ tap_ops_failed: rtnl_link_unregister(&ipgre_link_ops); rtnl_link_failed: - unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops); -gen_device_failed: inet_del_protocol(&ipgre_protocol, IPPROTO_GRE); +add_proto_failed: + unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops); goto out; } @@ -1705,9 +1706,9 @@ { rtnl_link_unregister(&ipgre_tap_ops); rtnl_link_unregister(&ipgre_link_ops); - unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops); if (inet_del_protocol(&ipgre_protocol, IPPROTO_GRE) < 0) printk(KERN_INFO "ipgre close: can't remove protocol\n"); + unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops); } module_init(ipgre_init); --- linux-fsl-imx51-2.6.31.orig/net/ipv4/route.c +++ linux-fsl-imx51-2.6.31/net/ipv4/route.c @@ -107,6 +107,7 @@ #ifdef CONFIG_SYSCTL #include #endif +#include #define RT_FL_TOS(oldflp) \ ((u32)(oldflp->fl4_tos & (IPTOS_RT_MASK | RTO_ONLINK))) --- linux-fsl-imx51-2.6.31.orig/net/ipv4/tcp.c +++ linux-fsl-imx51-2.6.31/net/ipv4/tcp.c @@ -2071,7 +2071,7 @@ /* Values greater than interface MTU won't take effect. However * at the point when this call is done we typically don't yet * know which interface is going to be used */ - if (val < 8 || val > MAX_TCP_WINDOW) { + if (val < 64 || val > MAX_TCP_WINDOW) { err = -EINVAL; break; } --- linux-fsl-imx51-2.6.31.orig/net/ipv4/tcp_ipv4.c +++ linux-fsl-imx51-2.6.31/net/ipv4/tcp_ipv4.c @@ -71,6 +71,7 @@ #include #include #include +#include #include #include @@ -1596,8 +1597,10 @@ if (!tcp_prequeue(sk, skb)) ret = tcp_v4_do_rcv(sk, skb); } - } else - sk_add_backlog(sk, skb); + } else if (sk_add_backlog(sk, skb)) { + bh_unlock_sock(sk); + goto discard_and_relse; + } bh_unlock_sock(sk); sock_put(sk); --- linux-fsl-imx51-2.6.31.orig/net/ipv4/ipip.c +++ linux-fsl-imx51-2.6.31/net/ipv4/ipip.c @@ -836,15 +836,14 @@ printk(banner); - if (xfrm4_tunnel_register(&ipip_handler, AF_INET)) { + err = register_pernet_gen_device(&ipip_net_id, &ipip_net_ops); + if (err < 0) + return err; + err = xfrm4_tunnel_register(&ipip_handler, AF_INET); + if (err < 0) { + unregister_pernet_device(&ipip_net_ops); printk(KERN_INFO "ipip init: can't register tunnel\n"); - return -EAGAIN; } - - err = register_pernet_gen_device(&ipip_net_id, &ipip_net_ops); - if (err) - xfrm4_tunnel_deregister(&ipip_handler, AF_INET); - return err; } --- linux-fsl-imx51-2.6.31.orig/net/ipv4/inetpeer.c +++ linux-fsl-imx51-2.6.31/net/ipv4/inetpeer.c @@ -19,6 +19,7 @@ #include #include #include +#include /* * Theory of operations. --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/arp_tables.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/arp_tables.c @@ -1068,6 +1068,7 @@ /* overflow check */ if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -1490,6 +1491,7 @@ return -ENOMEM; if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -1745,6 +1747,7 @@ ret = -EFAULT; break; } + rev.name[sizeof(rev.name)-1] = 0; try_then_request_module(xt_find_revision(NFPROTO_ARP, rev.name, rev.revision, 1, &ret), --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/nf_nat_helper.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/nf_nat_helper.c @@ -73,6 +73,28 @@ DUMP_OFFSET(this_way); } +/* Get the offset value, for conntrack */ +s16 nf_nat_get_offset(const struct nf_conn *ct, + enum ip_conntrack_dir dir, + u32 seq) +{ + struct nf_conn_nat *nat = nfct_nat(ct); + struct nf_nat_seq *this_way; + s16 offset; + + if (!nat) + return 0; + + this_way = &nat->seq[dir]; + spin_lock_bh(&nf_nat_seqofs_lock); + offset = after(seq, this_way->correction_pos) + ? this_way->offset_after : this_way->offset_before; + spin_unlock_bh(&nf_nat_seqofs_lock); + + return offset; +} +EXPORT_SYMBOL_GPL(nf_nat_get_offset); + /* Frobs data inside this packet, which is linear. */ static void mangle_contents(struct sk_buff *skb, unsigned int dataoff, @@ -189,11 +211,6 @@ adjust_tcp_sequence(ntohl(tcph->seq), (int)rep_len - (int)match_len, ct, ctinfo); - /* Tell TCP window tracking about seq change */ - nf_conntrack_tcp_update(skb, ip_hdrlen(skb), - ct, CTINFO2DIR(ctinfo), - (int)rep_len - (int)match_len); - nf_conntrack_event_cache(IPCT_NATSEQADJ, ct); } return 1; @@ -415,12 +432,7 @@ tcph->seq = newseq; tcph->ack_seq = newack; - if (!nf_nat_sack_adjust(skb, tcph, ct, ctinfo)) - return 0; - - nf_conntrack_tcp_update(skb, ip_hdrlen(skb), ct, dir, seqoff); - - return 1; + return nf_nat_sack_adjust(skb, tcph, ct, ctinfo); } /* Setup NAT on this expected conntrack so it follows master. */ --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/nf_nat_proto_common.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/nf_nat_proto_common.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/ip_tables.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/ip_tables.c @@ -1276,6 +1276,7 @@ /* overflow check */ if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -1806,6 +1807,7 @@ return -ENOMEM; if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -2030,6 +2032,7 @@ ret = -EFAULT; break; } + rev.name[sizeof(rev.name)-1] = 0; if (cmd == IPT_SO_GET_REVISION_TARGET) target = 1; --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/nf_nat_core.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/nf_nat_core.c @@ -212,7 +212,7 @@ maxip = ntohl(range->max_ip); j = jhash_2words((__force u32)tuple->src.u3.ip, range->flags & IP_NAT_RANGE_PERSISTENT ? - (__force u32)tuple->dst.u3.ip : 0, 0); + 0 : (__force u32)tuple->dst.u3.ip, 0); j = ((u64)j * (maxip - minip + 1)) >> 32; *var_ipp = htonl(minip + j); } @@ -750,6 +750,8 @@ BUG_ON(nfnetlink_parse_nat_setup_hook != NULL); rcu_assign_pointer(nfnetlink_parse_nat_setup_hook, nfnetlink_parse_nat_setup); + BUG_ON(nf_ct_nat_offset != NULL); + rcu_assign_pointer(nf_ct_nat_offset, nf_nat_get_offset); return 0; cleanup_extend: @@ -764,6 +766,7 @@ nf_ct_extend_unregister(&nat_extend); rcu_assign_pointer(nf_nat_seq_adjust_hook, NULL); rcu_assign_pointer(nfnetlink_parse_nat_setup_hook, NULL); + rcu_assign_pointer(nf_ct_nat_offset, NULL); synchronize_net(); } --- linux-fsl-imx51-2.6.31.orig/net/ipv4/netfilter/ipt_CLUSTERIP.c +++ linux-fsl-imx51-2.6.31/net/ipv4/netfilter/ipt_CLUSTERIP.c @@ -666,8 +666,11 @@ struct clusterip_config *c = pde->data; unsigned long nodenum; - if (copy_from_user(buffer, input, PROC_WRITELEN)) + if (size > PROC_WRITELEN) + return -EIO; + if (copy_from_user(buffer, input, size)) return -EFAULT; + buffer[size] = 0; if (*buffer == '+') { nodenum = simple_strtoul(buffer+1, NULL, 10); --- linux-fsl-imx51-2.6.31.orig/net/sunrpc/clnt.c +++ linux-fsl-imx51-2.6.31/net/sunrpc/clnt.c @@ -1032,6 +1032,9 @@ status = -EOPNOTSUPP; break; } + if (task->tk_rebind_retry == 0) + break; + task->tk_rebind_retry--; rpc_delay(task, 3*HZ); goto retry_timeout; case -ETIMEDOUT: --- linux-fsl-imx51-2.6.31.orig/net/sunrpc/svcsock.c +++ linux-fsl-imx51-2.6.31/net/sunrpc/svcsock.c @@ -110,7 +110,7 @@ rqstp->rq_xprt_ctxt = NULL; dprintk("svc: service %p, releasing skb %p\n", rqstp, skb); - skb_free_datagram(svsk->sk_sk, skb); + skb_free_datagram_locked(svsk->sk_sk, skb); } } @@ -537,7 +537,7 @@ printk("rpcsvc: received unknown control message:" "%d/%d\n", cmh->cmsg_level, cmh->cmsg_type); - skb_free_datagram(svsk->sk_sk, skb); + skb_free_datagram_locked(svsk->sk_sk, skb); return 0; } svc_udp_get_dest_address(rqstp, cmh); @@ -548,18 +548,18 @@ if (csum_partial_copy_to_xdr(&rqstp->rq_arg, skb)) { local_bh_enable(); /* checksum error */ - skb_free_datagram(svsk->sk_sk, skb); + skb_free_datagram_locked(svsk->sk_sk, skb); return 0; } local_bh_enable(); - skb_free_datagram(svsk->sk_sk, skb); + skb_free_datagram_locked(svsk->sk_sk, skb); } else { /* we can use it in-place */ rqstp->rq_arg.head[0].iov_base = skb->data + sizeof(struct udphdr); rqstp->rq_arg.head[0].iov_len = len; if (skb_checksum_complete(skb)) { - skb_free_datagram(svsk->sk_sk, skb); + skb_free_datagram_locked(svsk->sk_sk, skb); return 0; } rqstp->rq_xprt_ctxt = skb; --- linux-fsl-imx51-2.6.31.orig/net/sunrpc/sched.c +++ linux-fsl-imx51-2.6.31/net/sunrpc/sched.c @@ -794,6 +794,7 @@ /* Initialize retry counters */ task->tk_garb_retry = 2; task->tk_cred_retry = 2; + task->tk_rebind_retry = 2; task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW; task->tk_owner = current->tgid; --- linux-fsl-imx51-2.6.31.orig/net/sunrpc/auth_gss/auth_gss.c +++ linux-fsl-imx51-2.6.31/net/sunrpc/auth_gss/auth_gss.c @@ -485,7 +485,7 @@ dprintk("RPC: %5u gss_refresh_upcall for uid %u\n", task->tk_pid, cred->cr_uid); gss_msg = gss_setup_upcall(task->tk_client, gss_auth, cred); - if (IS_ERR(gss_msg) == -EAGAIN) { + if (PTR_ERR(gss_msg) == -EAGAIN) { /* XXX: warning on the first, under the assumption we * shouldn't normally hit this case on a refresh. */ warn_gssd(); --- linux-fsl-imx51-2.6.31.orig/net/x25/af_x25.c +++ linux-fsl-imx51-2.6.31/net/x25/af_x25.c @@ -81,6 +81,41 @@ }; #endif + +int x25_parse_address_block(struct sk_buff *skb, + struct x25_address *called_addr, + struct x25_address *calling_addr) +{ + unsigned char len; + int needed; + int rc; + + if (skb->len < 1) { + /* packet has no address block */ + rc = 0; + goto empty; + } + + len = *skb->data; + needed = 1 + (len >> 4) + (len & 0x0f); + + if (skb->len < needed) { + /* packet is too short to hold the addresses it claims + to hold */ + rc = -1; + goto empty; + } + + return x25_addr_ntoa(skb->data, called_addr, calling_addr); + +empty: + *called_addr->x25_addr = 0; + *calling_addr->x25_addr = 0; + + return rc; +} + + int x25_addr_ntoa(unsigned char *p, struct x25_address *called_addr, struct x25_address *calling_addr) { @@ -871,16 +906,26 @@ /* * Extract the X.25 addresses and convert them to ASCII strings, * and remove them. + * + * Address block is mandatory in call request packets */ - addr_len = x25_addr_ntoa(skb->data, &source_addr, &dest_addr); + addr_len = x25_parse_address_block(skb, &source_addr, &dest_addr); + if (addr_len <= 0) + goto out_clear_request; skb_pull(skb, addr_len); /* * Get the length of the facilities, skip past them for the moment * get the call user data because this is needed to determine * the correct listener + * + * Facilities length is mandatory in call request packets */ + if (skb->len < 1) + goto out_clear_request; len = skb->data[0] + 1; + if (skb->len < len) + goto out_clear_request; skb_pull(skb,len); /* --- linux-fsl-imx51-2.6.31.orig/net/x25/x25_in.c +++ linux-fsl-imx51-2.6.31/net/x25/x25_in.c @@ -89,6 +89,7 @@ static int x25_state1_machine(struct sock *sk, struct sk_buff *skb, int frametype) { struct x25_address source_addr, dest_addr; + int len; switch (frametype) { case X25_CALL_ACCEPTED: { @@ -106,11 +107,19 @@ * Parse the data in the frame. */ skb_pull(skb, X25_STD_MIN_LEN); - skb_pull(skb, x25_addr_ntoa(skb->data, &source_addr, &dest_addr)); - skb_pull(skb, - x25_parse_facilities(skb, &x25->facilities, + + len = x25_parse_address_block(skb, &source_addr, + &dest_addr); + if (len > 0) + skb_pull(skb, len); + + len = x25_parse_facilities(skb, &x25->facilities, &x25->dte_facilities, - &x25->vc_facil_mask)); + &x25->vc_facil_mask); + if (len > 0) + skb_pull(skb, len); + else + return -1; /* * Copy any Call User Data. */ --- linux-fsl-imx51-2.6.31.orig/net/x25/x25_dev.c +++ linux-fsl-imx51-2.6.31/net/x25/x25_dev.c @@ -53,7 +53,7 @@ if (!sock_owned_by_user(sk)) { queued = x25_process_rx_frame(sk, skb); } else { - sk_add_backlog(sk, skb); + queued = !sk_add_backlog(sk, skb); } bh_unlock_sock(sk); sock_put(sk); --- linux-fsl-imx51-2.6.31.orig/net/x25/x25_facilities.c +++ linux-fsl-imx51-2.6.31/net/x25/x25_facilities.c @@ -35,7 +35,7 @@ struct x25_dte_facilities *dte_facs, unsigned long *vc_fac_mask) { unsigned char *p = skb->data; - unsigned int len = *p++; + unsigned int len; *vc_fac_mask = 0; @@ -50,9 +50,19 @@ memset(dte_facs->called_ae, '\0', sizeof(dte_facs->called_ae)); memset(dte_facs->calling_ae, '\0', sizeof(dte_facs->calling_ae)); + if (skb->len < 1) + return 0; + + len = *p++; + + if (len >= skb->len) + return -1; + while (len > 0) { switch (*p & X25_FAC_CLASS_MASK) { case X25_FAC_CLASS_A: + if (len < 2) + return 0; switch (*p) { case X25_FAC_REVERSE: if((p[1] & 0x81) == 0x81) { @@ -96,6 +106,8 @@ len -= 2; break; case X25_FAC_CLASS_B: + if (len < 3) + return 0; switch (*p) { case X25_FAC_PACKET_SIZE: facilities->pacsize_in = p[1]; @@ -117,6 +129,8 @@ len -= 3; break; case X25_FAC_CLASS_C: + if (len < 4) + return 0; printk(KERN_DEBUG "X.25: unknown facility %02X, " "values %02X, %02X, %02X\n", p[0], p[1], p[2], p[3]); @@ -124,26 +138,26 @@ len -= 4; break; case X25_FAC_CLASS_D: + if (len < p[1] + 2) + return 0; switch (*p) { case X25_FAC_CALLING_AE: - if (p[1] > X25_MAX_DTE_FACIL_LEN) - break; + if (p[1] > X25_MAX_DTE_FACIL_LEN || p[1] <= 1) + return 0; dte_facs->calling_len = p[2]; memcpy(dte_facs->calling_ae, &p[3], p[1] - 1); *vc_fac_mask |= X25_MASK_CALLING_AE; break; case X25_FAC_CALLED_AE: - if (p[1] > X25_MAX_DTE_FACIL_LEN) - break; + if (p[1] > X25_MAX_DTE_FACIL_LEN || p[1] <= 1) + return 0; dte_facs->called_len = p[2]; memcpy(dte_facs->called_ae, &p[3], p[1] - 1); *vc_fac_mask |= X25_MASK_CALLED_AE; break; default: printk(KERN_DEBUG "X.25: unknown facility %02X," - "length %d, values %02X, %02X, " - "%02X, %02X\n", - p[0], p[1], p[2], p[3], p[4], p[5]); + "length %d\n", p[0], p[1]); break; } len -= p[1] + 2; @@ -247,6 +261,8 @@ memcpy(new, ours, sizeof(*new)); len = x25_parse_facilities(skb, &theirs, dte, &x25->vc_facil_mask); + if (len < 0) + return len; /* * They want reverse charging, we won't accept it. --- linux-fsl-imx51-2.6.31.orig/net/ipv6/udp.c +++ linux-fsl-imx51-2.6.31/net/ipv6/udp.c @@ -288,9 +288,7 @@ err = ulen; out_free: - lock_sock(sk); - skb_free_datagram(sk, skb); - release_sock(sk); + skb_free_datagram_locked(sk, skb); out: return err; @@ -442,6 +440,41 @@ return NULL; } +static void flush_stack(struct sock **stack, unsigned int count, + struct sk_buff *skb, unsigned int final) +{ + unsigned int i; + struct sock *sk; + struct sk_buff *skb1; + + for (i = 0; i < count; i++) { + skb1 = (i == final) ? skb : skb_clone(skb, GFP_ATOMIC); + + sk = stack[i]; + if (skb1) { + if (sk_rcvqueues_full(sk, skb)) { + kfree_skb(skb1); + goto drop; + } + bh_lock_sock(sk); + if (!sock_owned_by_user(sk)) + udpv6_queue_rcv_skb(sk, skb1); + else if (sk_add_backlog(sk, skb1)) { + kfree_skb(skb1); + bh_unlock_sock(sk); + goto drop; + } + bh_unlock_sock(sk); + continue; + } +drop: + atomic_inc(&sk->sk_drops); + UDP6_INC_STATS_BH(sock_net(sk), + UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk)); + UDP6_INC_STATS_BH(sock_net(sk), + UDP_MIB_INERRORS, IS_UDPLITE(sk)); + } +} /* * Note: called only from the BH handler context, * so we don't need to lock the hashes. @@ -450,41 +483,43 @@ struct in6_addr *saddr, struct in6_addr *daddr, struct udp_table *udptable) { - struct sock *sk, *sk2; + struct sock *sk, *stack[256 / sizeof(struct sock *)]; const struct udphdr *uh = udp_hdr(skb); struct udp_hslot *hslot = &udptable->hash[udp_hashfn(net, ntohs(uh->dest))]; int dif; + unsigned int i, count = 0; spin_lock(&hslot->lock); sk = sk_nulls_head(&hslot->head); dif = inet6_iif(skb); sk = udp_v6_mcast_next(net, sk, uh->dest, daddr, uh->source, saddr, dif); - if (!sk) { - kfree_skb(skb); - goto out; - } - - sk2 = sk; - while ((sk2 = udp_v6_mcast_next(net, sk_nulls_next(sk2), uh->dest, daddr, - uh->source, saddr, dif))) { - struct sk_buff *buff = skb_clone(skb, GFP_ATOMIC); - if (buff) { - bh_lock_sock(sk2); - if (!sock_owned_by_user(sk2)) - udpv6_queue_rcv_skb(sk2, buff); - else - sk_add_backlog(sk2, buff); - bh_unlock_sock(sk2); + while (sk) { + stack[count++] = sk; + sk = udp_v6_mcast_next(net, sk_nulls_next(sk), uh->dest, daddr, + uh->source, saddr, dif); + if (unlikely(count == ARRAY_SIZE(stack))) { + if (!sk) + break; + flush_stack(stack, count, skb, ~0); + count = 0; } } - bh_lock_sock(sk); - if (!sock_owned_by_user(sk)) - udpv6_queue_rcv_skb(sk, skb); - else - sk_add_backlog(sk, skb); - bh_unlock_sock(sk); -out: + /* + * before releasing the lock, we must take reference on sockets + */ + for (i = 0; i < count; i++) + sock_hold(stack[i]); + spin_unlock(&hslot->lock); + + if (count) { + flush_stack(stack, count, skb, count - 1); + + for (i = 0; i < count; i++) + sock_put(stack[i]); + } else { + kfree_skb(skb); + } return 0; } @@ -597,11 +632,19 @@ /* deliver */ + if (sk_rcvqueues_full(sk, skb)) { + sock_put(sk); + goto discard; + } bh_lock_sock(sk); if (!sock_owned_by_user(sk)) udpv6_queue_rcv_skb(sk, skb); - else - sk_add_backlog(sk, skb); + else if (sk_add_backlog(sk, skb)) { + atomic_inc(&sk->sk_drops); + bh_unlock_sock(sk); + sock_put(sk); + goto discard; + } bh_unlock_sock(sk); sock_put(sk); return 0; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/ip6_output.c +++ linux-fsl-imx51-2.6.31/net/ipv6/ip6_output.c @@ -55,20 +55,37 @@ #include #include -static int ip6_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *)); +static u32 hashidentrnd __read_mostly; +#define FID_HASH_SZ 16 +static u32 ipv6_fragmentation_id[FID_HASH_SZ]; -static __inline__ void ipv6_select_ident(struct sk_buff *skb, struct frag_hdr *fhdr) +void __init initialize_hashidentrnd(void) { - static u32 ipv6_fragmentation_id = 1; - static DEFINE_SPINLOCK(ip6_id_lock); + get_random_bytes(&hashidentrnd, sizeof(hashidentrnd)); +} + +static u32 __ipv6_select_ident(const struct in6_addr *addr) +{ + u32 newid, oldid, hash = jhash2((u32 *)addr, 4, hashidentrnd); + u32 *pid = &ipv6_fragmentation_id[hash % FID_HASH_SZ]; + + do { + oldid = *pid; + newid = oldid + 1; + if (!(hash + newid)) + newid++; + } while (cmpxchg(pid, oldid, newid) != oldid); - spin_lock_bh(&ip6_id_lock); - fhdr->identification = htonl(ipv6_fragmentation_id); - if (++ipv6_fragmentation_id == 0) - ipv6_fragmentation_id = 1; - spin_unlock_bh(&ip6_id_lock); + return hash + newid; } +void ipv6_select_ident(struct frag_hdr *fhdr, struct rt6_info *rt) +{ + fhdr->identification = htonl(__ipv6_select_ident(&rt->rt6i_dst.addr)); +} + +static int ip6_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *)); + int __ip6_local_out(struct sk_buff *skb) { int len; @@ -706,7 +723,7 @@ skb_reset_network_header(skb); memcpy(skb_network_header(skb), tmp_hdr, hlen); - ipv6_select_ident(skb, fh); + ipv6_select_ident(fh, rt); fh->nexthdr = nexthdr; fh->reserved = 0; fh->frag_off = htons(IP6_MF); @@ -844,7 +861,7 @@ fh->nexthdr = nexthdr; fh->reserved = 0; if (!frag_id) { - ipv6_select_ident(skb, fh); + ipv6_select_ident(fh, rt); frag_id = fh->identification; } else fh->identification = frag_id; @@ -1048,7 +1065,8 @@ int getfrag(void *from, char *to, int offset, int len, int odd, struct sk_buff *skb), void *from, int length, int hh_len, int fragheaderlen, - int transhdrlen, int mtu,unsigned int flags) + int transhdrlen, int mtu,unsigned int flags, + struct rt6_info *rt) { struct sk_buff *skb; @@ -1091,7 +1109,7 @@ skb_shinfo(skb)->gso_size = mtu - fragheaderlen - sizeof(struct frag_hdr); skb_shinfo(skb)->gso_type = SKB_GSO_UDP; - ipv6_select_ident(skb, &fhdr); + ipv6_select_ident(&fhdr, rt); skb_shinfo(skb)->ip6_frag_id = fhdr.identification; __skb_queue_tail(&sk->sk_write_queue, skb); @@ -1240,7 +1258,7 @@ err = ip6_ufo_append_data(sk, getfrag, from, length, hh_len, fragheaderlen, transhdrlen, mtu, - flags); + flags, rt); if (err) goto error; return 0; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/af_inet6.c +++ linux-fsl-imx51-2.6.31/net/ipv6/af_inet6.c @@ -1059,6 +1059,8 @@ goto out; } + initialize_hashidentrnd(); + err = proto_register(&tcpv6_prot, 1); if (err) goto out; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/inet6_hashtables.c +++ linux-fsl-imx51-2.6.31/net/ipv6/inet6_hashtables.c @@ -20,6 +20,7 @@ #include #include #include +#include #include void __inet6_hash(struct sock *sk) --- linux-fsl-imx51-2.6.31.orig/net/ipv6/ip6_tunnel.c +++ linux-fsl-imx51-2.6.31/net/ipv6/ip6_tunnel.c @@ -1472,27 +1472,29 @@ { int err; - if (xfrm6_tunnel_register(&ip4ip6_handler, AF_INET)) { + err = register_pernet_gen_device(&ip6_tnl_net_id, &ip6_tnl_net_ops); + if (err < 0) + goto out_pernet; + + err = xfrm6_tunnel_register(&ip4ip6_handler, AF_INET); + if (err < 0) { printk(KERN_ERR "ip6_tunnel init: can't register ip4ip6\n"); - err = -EAGAIN; - goto out; + goto out_ip4ip6; } - if (xfrm6_tunnel_register(&ip6ip6_handler, AF_INET6)) { + err = xfrm6_tunnel_register(&ip6ip6_handler, AF_INET6); + if (err < 0) { printk(KERN_ERR "ip6_tunnel init: can't register ip6ip6\n"); - err = -EAGAIN; - goto unreg_ip4ip6; + goto out_ip6ip6; } - err = register_pernet_gen_device(&ip6_tnl_net_id, &ip6_tnl_net_ops); - if (err < 0) - goto err_pernet; return 0; -err_pernet: - xfrm6_tunnel_deregister(&ip6ip6_handler, AF_INET6); -unreg_ip4ip6: + +out_ip6ip6: xfrm6_tunnel_deregister(&ip4ip6_handler, AF_INET); -out: +out_ip4ip6: + unregister_pernet_gen_device(ip6_tnl_net_id, &ip6_tnl_net_ops); +out_pernet: return err; } --- linux-fsl-imx51-2.6.31.orig/net/ipv6/reassembly.c +++ linux-fsl-imx51-2.6.31/net/ipv6/reassembly.c @@ -72,6 +72,7 @@ struct inet_frag_queue q; __be32 id; /* fragment id */ + u32 user; struct in6_addr saddr; struct in6_addr daddr; @@ -141,7 +142,7 @@ struct ip6_create_arg *arg = a; fq = container_of(q, struct frag_queue, q); - return (fq->id == arg->id && + return (fq->id == arg->id && fq->user == arg->user && ipv6_addr_equal(&fq->saddr, arg->src) && ipv6_addr_equal(&fq->daddr, arg->dst)); } @@ -163,6 +164,7 @@ struct ip6_create_arg *arg = a; fq->id = arg->id; + fq->user = arg->user; ipv6_addr_copy(&fq->saddr, arg->src); ipv6_addr_copy(&fq->daddr, arg->dst); } @@ -244,6 +246,7 @@ unsigned int hash; arg.id = id; + arg.user = IP6_DEFRAG_LOCAL_DELIVER; arg.src = src; arg.dst = dst; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/sit.c +++ linux-fsl-imx51-2.6.31/net/ipv6/sit.c @@ -313,7 +313,7 @@ c = 0; for (prl = t->prl; prl; prl = prl->next) { - if (c > cmax) + if (c >= cmax) break; if (kprl.addr != htonl(INADDR_ANY) && prl->addr != kprl.addr) continue; @@ -1151,15 +1151,14 @@ printk(KERN_INFO "IPv6 over IPv4 tunneling driver\n"); - if (xfrm4_tunnel_register(&sit_handler, AF_INET6) < 0) { - printk(KERN_INFO "sit init: Can't add protocol\n"); - return -EAGAIN; - } - err = register_pernet_gen_device(&sit_net_id, &sit_net_ops); if (err < 0) - xfrm4_tunnel_deregister(&sit_handler, AF_INET6); - + return err; + err = xfrm4_tunnel_register(&sit_handler, AF_INET6); + if (err < 0) { + unregister_pernet_device(&sit_net_ops); + printk(KERN_INFO "sit init: Can't add protocol\n"); + } return err; } --- linux-fsl-imx51-2.6.31.orig/net/ipv6/tcp_ipv6.c +++ linux-fsl-imx51-2.6.31/net/ipv6/tcp_ipv6.c @@ -60,6 +60,7 @@ #include #include #include +#include #include @@ -1684,8 +1685,10 @@ if (!tcp_prequeue(sk, skb)) ret = tcp_v6_do_rcv(sk, skb); } - } else - sk_add_backlog(sk, skb); + } else if (sk_add_backlog(sk, skb)) { + bh_unlock_sock(sk); + goto discard_and_relse; + } bh_unlock_sock(sk); sock_put(sk); --- linux-fsl-imx51-2.6.31.orig/net/ipv6/xfrm6_tunnel.c +++ linux-fsl-imx51-2.6.31/net/ipv6/xfrm6_tunnel.c @@ -344,32 +344,38 @@ static int __init xfrm6_tunnel_init(void) { - if (xfrm_register_type(&xfrm6_tunnel_type, AF_INET6) < 0) + int rv; + + rv = xfrm6_tunnel_spi_init(); + if (rv < 0) goto err; - if (xfrm6_tunnel_register(&xfrm6_tunnel_handler, AF_INET6)) - goto unreg; - if (xfrm6_tunnel_register(&xfrm46_tunnel_handler, AF_INET)) - goto dereg6; - if (xfrm6_tunnel_spi_init() < 0) - goto dereg46; + rv = xfrm_register_type(&xfrm6_tunnel_type, AF_INET6); + if (rv < 0) + goto out_type; + rv = xfrm6_tunnel_register(&xfrm6_tunnel_handler, AF_INET6); + if (rv < 0) + goto out_xfrm6; + rv = xfrm6_tunnel_register(&xfrm46_tunnel_handler, AF_INET); + if (rv < 0) + goto out_xfrm46; return 0; -dereg46: - xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET); -dereg6: +out_xfrm46: xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6); -unreg: +out_xfrm6: xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); +out_type: + xfrm6_tunnel_spi_fini(); err: - return -EAGAIN; + return rv; } static void __exit xfrm6_tunnel_fini(void) { - xfrm6_tunnel_spi_fini(); xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET); xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6); xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); + xfrm6_tunnel_spi_fini(); } module_init(xfrm6_tunnel_init); --- linux-fsl-imx51-2.6.31.orig/net/ipv6/exthdrs.c +++ linux-fsl-imx51-2.6.31/net/ipv6/exthdrs.c @@ -559,6 +559,11 @@ return skb_dst(skb) ? ip6_dst_idev(skb_dst(skb)) : __in6_dev_get(skb->dev); } +static inline struct net *ipv6_skb_net(struct sk_buff *skb) +{ + return skb_dst(skb) ? dev_net(skb_dst(skb)->dev) : dev_net(skb->dev); +} + /* Router Alert as of RFC 2711 */ static int ipv6_hop_ra(struct sk_buff *skb, int optoff) @@ -580,8 +585,8 @@ static int ipv6_hop_jumbo(struct sk_buff *skb, int optoff) { const unsigned char *nh = skb_network_header(skb); + struct net *net = ipv6_skb_net(skb); u32 pkt_len; - struct net *net = dev_net(skb_dst(skb)->dev); if (nh[optoff + 1] != 4 || (optoff & 3) != 2) { LIMIT_NETDEBUG(KERN_DEBUG "ipv6_hop_jumbo: wrong jumbo opt length/alignment %d\n", --- linux-fsl-imx51-2.6.31.orig/net/ipv6/netfilter/ip6_tables.c +++ linux-fsl-imx51-2.6.31/net/ipv6/netfilter/ip6_tables.c @@ -1306,6 +1306,7 @@ /* overflow check */ if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -1838,6 +1839,7 @@ return -ENOMEM; if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters)) return -ENOMEM; + tmp.name[sizeof(tmp.name)-1] = 0; newinfo = xt_alloc_table_info(tmp.size); if (!newinfo) @@ -2062,6 +2064,7 @@ ret = -EFAULT; break; } + rev.name[sizeof(rev.name)-1] = 0; if (cmd == IP6T_SO_GET_REVISION_TARGET) target = 1; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/netfilter/nf_conntrack_reasm.c +++ linux-fsl-imx51-2.6.31/net/ipv6/netfilter/nf_conntrack_reasm.c @@ -170,13 +170,14 @@ /* Creation primitives. */ static __inline__ struct nf_ct_frag6_queue * -fq_find(__be32 id, struct in6_addr *src, struct in6_addr *dst) +fq_find(__be32 id, u32 user, struct in6_addr *src, struct in6_addr *dst) { struct inet_frag_queue *q; struct ip6_create_arg arg; unsigned int hash; arg.id = id; + arg.user = user; arg.src = src; arg.dst = dst; @@ -561,7 +562,7 @@ return 0; } -struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb) +struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user) { struct sk_buff *clone; struct net_device *dev = skb->dev; @@ -607,7 +608,7 @@ if (atomic_read(&nf_init_frags.mem) > nf_init_frags.high_thresh) nf_ct_frag6_evictor(); - fq = fq_find(fhdr->identification, &hdr->saddr, &hdr->daddr); + fq = fq_find(fhdr->identification, user, &hdr->saddr, &hdr->daddr); if (fq == NULL) { pr_debug("Can't find and can't create new queue\n"); goto ret_orig; --- linux-fsl-imx51-2.6.31.orig/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c +++ linux-fsl-imx51-2.6.31/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c @@ -183,6 +183,16 @@ return nf_conntrack_confirm(skb); } +static enum ip6_defrag_users nf_ct6_defrag_user(unsigned int hooknum, + struct sk_buff *skb) +{ + if (hooknum == NF_INET_PRE_ROUTING) + return IP6_DEFRAG_CONNTRACK_IN; + else + return IP6_DEFRAG_CONNTRACK_OUT; + +} + static unsigned int ipv6_defrag(unsigned int hooknum, struct sk_buff *skb, const struct net_device *in, @@ -195,8 +205,7 @@ if (skb->nfct) return NF_ACCEPT; - reasm = nf_ct_frag6_gather(skb); - + reasm = nf_ct_frag6_gather(skb, nf_ct6_defrag_user(hooknum, skb)); /* queued */ if (reasm == NULL) return NF_STOLEN; --- linux-fsl-imx51-2.6.31.orig/net/wireless/nl80211.c +++ linux-fsl-imx51-2.6.31/net/wireless/nl80211.c @@ -2819,12 +2819,12 @@ i = 0; if (info->attrs[NL80211_ATTR_SCAN_SSIDS]) { nla_for_each_nested(attr, info->attrs[NL80211_ATTR_SCAN_SSIDS], tmp) { - if (request->ssids[i].ssid_len > IEEE80211_MAX_SSID_LEN) { + if (nla_len(attr) > IEEE80211_MAX_SSID_LEN) { err = -EINVAL; goto out_free; } - memcpy(request->ssids[i].ssid, nla_data(attr), nla_len(attr)); request->ssids[i].ssid_len = nla_len(attr); + memcpy(request->ssids[i].ssid, nla_data(attr), nla_len(attr)); i++; } } --- linux-fsl-imx51-2.6.31.orig/net/wireless/wext.c +++ linux-fsl-imx51-2.6.31/net/wireless/wext.c @@ -829,6 +829,22 @@ } } + if (IW_IS_GET(cmd) && !(descr->flags & IW_DESCR_FLAG_NOMAX)) { + /* + * If this is a GET, but not NOMAX, it means that the extra + * data is not bounded by userspace, but by max_tokens. Thus + * set the length to max_tokens. This matches the extra data + * allocation. + * The driver should fill it with the number of tokens it + * provided, and it may check iwp->length rather than having + * knowledge of max_tokens. If the driver doesn't change the + * iwp->length, this ioctl just copies back max_token tokens + * filled with zeroes. Hopefully the driver isn't claiming + * them to be valid data. + */ + iwp->length = descr->max_tokens; + } + err = handler(dev, info, (union iwreq_data *) iwp, extra); iwp->length += essid_compat; --- linux-fsl-imx51-2.6.31.orig/net/wireless/scan.c +++ linux-fsl-imx51-2.6.31/net/wireless/scan.c @@ -97,7 +97,7 @@ dev->bss_generation++; } -static u8 *find_ie(u8 num, u8 *ies, size_t len) +static u8 *find_ie(u8 num, u8 *ies, int len) { while (len > 2 && ies[0] != num) { len -= ies[1] + 2; --- linux-fsl-imx51-2.6.31.orig/net/econet/af_econet.c +++ linux-fsl-imx51-2.6.31/net/econet/af_econet.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -275,12 +276,12 @@ #endif #ifdef CONFIG_ECONET_AUNUDP struct msghdr udpmsg; - struct iovec iov[msg->msg_iovlen+1]; + struct iovec iov[2]; struct aunhdr ah; struct sockaddr_in udpdest; __kernel_size_t size; - int i; mm_segment_t oldfs; + char *userbuf; #endif /* @@ -296,23 +297,14 @@ mutex_lock(&econet_mutex); - if (saddr == NULL) { - struct econet_sock *eo = ec_sk(sk); - - addr.station = eo->station; - addr.net = eo->net; - port = eo->port; - cb = eo->cb; - } else { - if (msg->msg_namelen < sizeof(struct sockaddr_ec)) { - mutex_unlock(&econet_mutex); - return -EINVAL; - } - addr.station = saddr->addr.station; - addr.net = saddr->addr.net; - port = saddr->port; - cb = saddr->cb; - } + if (saddr == NULL || msg->msg_namelen < sizeof(struct sockaddr_ec)) { + mutex_unlock(&econet_mutex); + return -EINVAL; + } + addr.station = saddr->addr.station; + addr.net = saddr->addr.net; + port = saddr->port; + cb = saddr->cb; /* Look for a device with the right network number. */ dev = net2dev_map[addr.net]; @@ -327,17 +319,17 @@ } } - if (len + 15 > dev->mtu) { - mutex_unlock(&econet_mutex); - return -EMSGSIZE; - } - if (dev->type == ARPHRD_ECONET) { /* Real hardware Econet. We're not worthy etc. */ #ifdef CONFIG_ECONET_NATIVE unsigned short proto = 0; int res; + if (len + 15 > dev->mtu) { + mutex_unlock(&econet_mutex); + return -EMSGSIZE; + } + dev_hold(dev); skb = sock_alloc_send_skb(sk, len+LL_ALLOCATED_SPACE(dev), @@ -350,7 +342,6 @@ eb = (struct ec_cb *)&skb->cb; - /* BUG: saddr may be NULL */ eb->cookie = saddr->cookie; eb->sec = *saddr; eb->sent = ec_tx_done; @@ -414,6 +405,11 @@ return -ENETDOWN; /* No socket - can't send */ } + if (len > 32768) { + err = -E2BIG; + goto error; + } + /* Make up a UDP datagram and hand it off to some higher intellect. */ memset(&udpdest, 0, sizeof(udpdest)); @@ -438,43 +434,33 @@ udpdest.sin_addr.s_addr = htonl(network | addr.station); } + memset(&ah, 0, sizeof(ah)); ah.port = port; ah.cb = cb & 0x7f; ah.code = 2; /* magic */ - ah.pad = 0; /* tack our header on the front of the iovec */ size = sizeof(struct aunhdr); - /* - * XXX: that is b0rken. We can't mix userland and kernel pointers - * in iovec, since on a lot of platforms copy_from_user() will - * *not* work with the kernel and userland ones at the same time, - * regardless of what we do with set_fs(). And we are talking about - * econet-over-ethernet here, so "it's only ARM anyway" doesn't - * apply. Any suggestions on fixing that code? -- AV - */ iov[0].iov_base = (void *)&ah; iov[0].iov_len = size; - for (i = 0; i < msg->msg_iovlen; i++) { - void __user *base = msg->msg_iov[i].iov_base; - size_t len = msg->msg_iov[i].iov_len; - /* Check it now since we switch to KERNEL_DS later. */ - if (!access_ok(VERIFY_READ, base, len)) { - mutex_unlock(&econet_mutex); - return -EFAULT; - } - iov[i+1].iov_base = base; - iov[i+1].iov_len = len; - size += len; + + userbuf = vmalloc(len); + if (userbuf == NULL) { + err = -ENOMEM; + goto error; } + iov[1].iov_base = userbuf; + iov[1].iov_len = len; + err = memcpy_fromiovec(userbuf, msg->msg_iov, len); + if (err) + goto error_free_buf; + /* Get a skbuff (no data, just holds our cb information) */ if ((skb = sock_alloc_send_skb(sk, 0, msg->msg_flags & MSG_DONTWAIT, - &err)) == NULL) { - mutex_unlock(&econet_mutex); - return err; - } + &err)) == NULL) + goto error_free_buf; eb = (struct ec_cb *)&skb->cb; @@ -490,7 +476,7 @@ udpmsg.msg_name = (void *)&udpdest; udpmsg.msg_namelen = sizeof(udpdest); udpmsg.msg_iov = &iov[0]; - udpmsg.msg_iovlen = msg->msg_iovlen + 1; + udpmsg.msg_iovlen = 2; udpmsg.msg_control = NULL; udpmsg.msg_controllen = 0; udpmsg.msg_flags=0; @@ -498,9 +484,13 @@ oldfs = get_fs(); set_fs(KERNEL_DS); /* More privs :-) */ err = sock_sendmsg(udpsock, &udpmsg, size); set_fs(oldfs); + +error_free_buf: + vfree(userbuf); #else err = -EPROTOTYPE; #endif + error: mutex_unlock(&econet_mutex); return err; @@ -669,6 +659,9 @@ err = 0; switch (cmd) { case SIOCSIFADDR: + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + edev = dev->ec_ptr; if (edev == NULL) { /* Magic up a new one. */ @@ -851,8 +844,12 @@ struct iphdr *ip = ip_hdr(skb); unsigned char stn = ntohl(ip->saddr) & 0xff; struct sock *sk; + struct dst_entry *dst = skb_dst(skb); + struct ec_device *edev = NULL; struct sk_buff *newskb; - struct ec_device *edev = skb->dev->ec_ptr; + + if (dst) + edev = dst->dev->ec_ptr; if (! edev) goto bad; --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/hci_event.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/hci_event.c @@ -887,6 +887,7 @@ } else conn->state = BT_CONNECTED; + hci_conn_hold_device(conn); hci_conn_add_sysfs(conn); if (test_bit(HCI_AUTH, &hdev->flags)) @@ -1693,6 +1694,7 @@ conn->handle = __le16_to_cpu(ev->handle); conn->state = BT_CONNECTED; + hci_conn_hold_device(conn); hci_conn_add_sysfs(conn); break; --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/sco.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/sco.c @@ -705,6 +705,7 @@ break; } + memset(&cinfo, 0, sizeof(cinfo)); cinfo.hci_handle = sco_pi(sk)->conn->hcon->handle; memcpy(cinfo.dev_class, sco_pi(sk)->conn->hcon->dev_class, 3); @@ -938,13 +939,22 @@ struct sock *sk; struct hlist_node *node; char *str = buf; + int size = PAGE_SIZE; read_lock_bh(&sco_sk_list.lock); sk_for_each(sk, node, &sco_sk_list.head) { - str += sprintf(str, "%s %s %d\n", + int len; + + len = snprintf(str, size, "%s %s %d\n", batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), sk->sk_state); + + size -= len; + if (size <= 0) + break; + + str += len; } read_unlock_bh(&sco_sk_list.lock); --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/hci_conn.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/hci_conn.c @@ -246,6 +246,8 @@ if (hdev->notify) hdev->notify(hdev, HCI_NOTIFY_CONN_ADD); + atomic_set(&conn->devref, 0); + hci_conn_init_sysfs(conn); tasklet_enable(&hdev->tx_task); @@ -288,7 +290,7 @@ skb_queue_purge(&conn->data_q); - hci_conn_del_sysfs(conn); + hci_conn_put_device(conn); hci_dev_put(hdev); @@ -583,6 +585,19 @@ hci_dev_unlock(hdev); } +void hci_conn_hold_device(struct hci_conn *conn) +{ + atomic_inc(&conn->devref); +} +EXPORT_SYMBOL(hci_conn_hold_device); + +void hci_conn_put_device(struct hci_conn *conn) +{ + if (atomic_dec_and_test(&conn->devref)) + hci_conn_del_sysfs(conn); +} +EXPORT_SYMBOL(hci_conn_put_device); + int hci_get_conn_list(void __user *arg) { struct hci_conn_list_req req, *cl; --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/l2cap.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/l2cap.c @@ -1422,6 +1422,7 @@ break; } + memset(&cinfo, 0, sizeof(cinfo)); cinfo.hci_handle = l2cap_pi(sk)->conn->hcon->handle; memcpy(cinfo.dev_class, l2cap_pi(sk)->conn->hcon->dev_class, 3); @@ -2031,7 +2032,7 @@ /* Reject if config buffer is too small. */ len = cmd_len - sizeof(*req); - if (l2cap_pi(sk)->conf_len + len > sizeof(l2cap_pi(sk)->conf_req)) { + if (len < 0 || l2cap_pi(sk)->conf_len + len > sizeof(l2cap_pi(sk)->conf_req)) { l2cap_send_cmd(conn, cmd->ident, L2CAP_CONF_RSP, l2cap_build_conf_rsp(sk, rsp, L2CAP_CONF_REJECT, flags), rsp); @@ -2713,16 +2714,24 @@ struct sock *sk; struct hlist_node *node; char *str = buf; + int size = PAGE_SIZE; read_lock_bh(&l2cap_sk_list.lock); sk_for_each(sk, node, &l2cap_sk_list.head) { struct l2cap_pinfo *pi = l2cap_pi(sk); + int len; - str += sprintf(str, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n", + len = snprintf(str, size, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n", batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), sk->sk_state, __le16_to_cpu(pi->psm), pi->scid, pi->dcid, pi->imtu, pi->omtu, pi->sec_level); + + size -= len; + if (size <= 0) + break; + + str += len; } read_unlock_bh(&l2cap_sk_list.lock); --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/bnep/sock.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/bnep/sock.c @@ -88,6 +88,7 @@ sockfd_put(nsock); return -EBADFD; } + ca.device[sizeof(ca.device)-1] = 0; err = bnep_add_connection(&ca, nsock); if (!err) { --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/hidp/core.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/hidp/core.c @@ -40,6 +40,7 @@ #include #include +#include #include #include @@ -92,10 +93,14 @@ { __module_get(THIS_MODULE); list_add(&session->list, &hidp_session_list); + + hci_conn_hold_device(session->conn); } static void __hidp_unlink_session(struct hidp_session *session) { + hci_conn_put_device(session->conn); + list_del(&session->list); module_put(THIS_MODULE); } @@ -573,7 +578,11 @@ if (session->hid) { if (session->hid->claimed & HID_CLAIMED_INPUT) hidinput_disconnect(session->hid); + if (session->hid->claimed & HID_CLAIMED_HIDRAW) + hidraw_disconnect(session->hid); + hid_destroy_device(session->hid); + session->hid = NULL; } /* Wakeup user-space polling for socket errors */ @@ -601,25 +610,27 @@ { bdaddr_t *src = &bt_sk(session->ctrl_sock->sk)->src; bdaddr_t *dst = &bt_sk(session->ctrl_sock->sk)->dst; + struct device *device = NULL; struct hci_dev *hdev; - struct hci_conn *conn; hdev = hci_get_route(dst, src); if (!hdev) return NULL; - conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, dst); + session->conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, dst); + if (session->conn) + device = &session->conn->dev; hci_dev_put(hdev); - return conn ? &conn->dev : NULL; + return device; } static int hidp_setup_input(struct hidp_session *session, struct hidp_connadd_req *req) { struct input_dev *input; - int i; + int err, i; input = input_allocate_device(); if (!input) @@ -666,7 +677,13 @@ input->event = hidp_input_event; - return input_register_device(input); + err = input_register_device(input); + if (err < 0) { + hci_conn_put_device(session->conn); + return err; + } + + return 0; } static int hidp_open(struct hid_device *hid) @@ -748,13 +765,11 @@ { struct hid_device *hid; bdaddr_t src, dst; - int ret; + int err; hid = hid_allocate_device(); - if (IS_ERR(hid)) { - ret = PTR_ERR(session->hid); - goto err; - } + if (IS_ERR(hid)) + return PTR_ERR(session->hid); session->hid = hid; session->req = req; @@ -776,16 +791,17 @@ hid->dev.parent = hidp_get_device(session); hid->ll_driver = &hidp_hid_driver; - ret = hid_add_device(hid); - if (ret) - goto err_hid; + err = hid_add_device(hid); + if (err < 0) + goto failed; return 0; -err_hid: + +failed: hid_destroy_device(hid); session->hid = NULL; -err: - return ret; + + return err; } int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock, struct socket *intr_sock) @@ -835,13 +851,13 @@ if (req->rd_size > 0) { err = hidp_setup_hid(session, req); if (err && err != -ENODEV) - goto err_skb; + goto purge; } if (!session->hid) { err = hidp_setup_input(session, req); if (err < 0) - goto err_skb; + goto purge; } __hidp_link_session(session); @@ -869,13 +885,20 @@ __hidp_unlink_session(session); - if (session->input) + if (session->input) { input_unregister_device(session->input); - if (session->hid) + session->input = NULL; + } + + if (session->hid) { hid_destroy_device(session->hid); -err_skb: + session->hid = NULL; + } + +purge: skb_queue_purge(&session->ctrl_transmit); skb_queue_purge(&session->intr_transmit); + failed: up_write(&hidp_session_sem); --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/hidp/hidp.h +++ linux-fsl-imx51-2.6.31/net/bluetooth/hidp/hidp.h @@ -126,6 +126,8 @@ struct hidp_session { struct list_head list; + struct hci_conn *conn; + struct socket *ctrl_sock; struct socket *intr_sock; --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/rfcomm/sock.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/rfcomm/sock.c @@ -878,6 +878,7 @@ l2cap_sk = rfcomm_pi(sk)->dlc->session->sock->sk; + memset(&cinfo, 0, sizeof(cinfo)); cinfo.hci_handle = l2cap_pi(l2cap_sk)->conn->hcon->handle; memcpy(cinfo.dev_class, l2cap_pi(l2cap_sk)->conn->hcon->dev_class, 3); @@ -1065,13 +1066,22 @@ struct sock *sk; struct hlist_node *node; char *str = buf; + int size = PAGE_SIZE; read_lock_bh(&rfcomm_sk_list.lock); sk_for_each(sk, node, &rfcomm_sk_list.head) { - str += sprintf(str, "%s %s %d %d\n", + int len; + + len = snprintf(str, size, "%s %s %d %d\n", batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), sk->sk_state, rfcomm_pi(sk)->channel); + + size -= len; + if (size <= 0) + break; + + str += len; } read_unlock_bh(&rfcomm_sk_list.lock); --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/rfcomm/core.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/rfcomm/core.c @@ -2055,6 +2055,7 @@ struct rfcomm_session *s; struct list_head *pp, *p; char *str = buf; + int size = PAGE_SIZE; rfcomm_lock(); @@ -2063,11 +2064,21 @@ list_for_each(pp, &s->dlcs) { struct sock *sk = s->sock->sk; struct rfcomm_dlc *d = list_entry(pp, struct rfcomm_dlc, list); + int len; - str += sprintf(str, "%s %s %ld %d %d %d %d\n", + len = snprintf(str, size, "%s %s %ld %d %d %d %d\n", batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst), d->state, d->dlci, d->mtu, d->rx_credits, d->tx_credits); + + size -= len; + if (size <= 0) + break; + + str += len; } + + if (size <= 0) + break; } rfcomm_unlock(); --- linux-fsl-imx51-2.6.31.orig/net/bluetooth/rfcomm/tty.c +++ linux-fsl-imx51-2.6.31/net/bluetooth/rfcomm/tty.c @@ -844,10 +844,6 @@ BT_DBG("TIOCMIWAIT"); break; - case TIOCGICOUNT: - BT_DBG("TIOCGICOUNT"); - break; - case TIOCGSERIAL: BT_ERR("TIOCGSERIAL is not supported"); return -ENOIOCTLCMD; --- linux-fsl-imx51-2.6.31.orig/net/tipc/net.c +++ linux-fsl-imx51-2.6.31/net/tipc/net.c @@ -116,7 +116,8 @@ */ DEFINE_RWLOCK(tipc_net_lock); -struct network tipc_net = { NULL }; +struct _zone *tipc_zones[256] = { NULL, }; +struct network tipc_net = { tipc_zones }; struct tipc_node *tipc_net_select_remote_node(u32 addr, u32 ref) { @@ -158,28 +159,12 @@ } } -static int net_init(void) -{ - memset(&tipc_net, 0, sizeof(tipc_net)); - tipc_net.zones = kcalloc(tipc_max_zones + 1, sizeof(struct _zone *), GFP_ATOMIC); - if (!tipc_net.zones) { - return -ENOMEM; - } - return 0; -} - static void net_stop(void) { u32 z_num; - if (!tipc_net.zones) - return; - - for (z_num = 1; z_num <= tipc_max_zones; z_num++) { + for (z_num = 1; z_num <= tipc_max_zones; z_num++) tipc_zone_delete(tipc_net.zones[z_num]); - } - kfree(tipc_net.zones); - tipc_net.zones = NULL; } static void net_route_named_msg(struct sk_buff *buf) @@ -282,9 +267,7 @@ tipc_named_reinit(); tipc_port_reinit(); - if ((res = tipc_bearer_init()) || - (res = net_init()) || - (res = tipc_cltr_init()) || + if ((res = tipc_cltr_init()) || (res = tipc_bclink_init())) { return res; } --- linux-fsl-imx51-2.6.31.orig/net/tipc/bearer.c +++ linux-fsl-imx51-2.6.31/net/tipc/bearer.c @@ -45,10 +45,10 @@ #define MAX_ADDR_STR 32 -static struct media *media_list = NULL; +static struct media media_list[MAX_MEDIA]; static u32 media_count = 0; -struct bearer *tipc_bearers = NULL; +struct bearer tipc_bearers[MAX_BEARERS]; /** * media_name_valid - validate media name @@ -108,9 +108,11 @@ int res = -EINVAL; write_lock_bh(&tipc_net_lock); - if (!media_list) - goto exit; + if (tipc_mode != TIPC_NET_MODE) { + warn("Media <%s> rejected, not in networked mode yet\n", name); + goto exit; + } if (!media_name_valid(name)) { warn("Media <%s> rejected, illegal name\n", name); goto exit; @@ -660,33 +662,10 @@ -int tipc_bearer_init(void) -{ - int res; - - write_lock_bh(&tipc_net_lock); - tipc_bearers = kcalloc(MAX_BEARERS, sizeof(struct bearer), GFP_ATOMIC); - media_list = kcalloc(MAX_MEDIA, sizeof(struct media), GFP_ATOMIC); - if (tipc_bearers && media_list) { - res = 0; - } else { - kfree(tipc_bearers); - kfree(media_list); - tipc_bearers = NULL; - media_list = NULL; - res = -ENOMEM; - } - write_unlock_bh(&tipc_net_lock); - return res; -} - void tipc_bearer_stop(void) { u32 i; - if (!tipc_bearers) - return; - for (i = 0; i < MAX_BEARERS; i++) { if (tipc_bearers[i].active) tipc_bearers[i].publ.blocked = 1; @@ -695,10 +674,6 @@ if (tipc_bearers[i].active) bearer_disable(tipc_bearers[i].publ.name); } - kfree(tipc_bearers); - kfree(media_list); - tipc_bearers = NULL; - media_list = NULL; media_count = 0; } --- linux-fsl-imx51-2.6.31.orig/net/tipc/bearer.h +++ linux-fsl-imx51-2.6.31/net/tipc/bearer.h @@ -114,7 +114,7 @@ struct link; -extern struct bearer *tipc_bearers; +extern struct bearer tipc_bearers[]; void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a); struct sk_buff *tipc_media_get_names(void); --- linux-fsl-imx51-2.6.31.orig/net/tipc/socket.c +++ linux-fsl-imx51-2.6.31/net/tipc/socket.c @@ -393,6 +393,7 @@ struct sockaddr_tipc *addr = (struct sockaddr_tipc *)uaddr; struct tipc_sock *tsock = tipc_sk(sock->sk); + memset(addr, 0, sizeof(*addr)); if (peer) { if ((sock->state != SS_CONNECTED) && ((peer != 2) || (sock->state != SS_DISCONNECTING))) @@ -1322,8 +1323,10 @@ if (!sock_owned_by_user(sk)) { res = filter_rcv(sk, buf); } else { - sk_add_backlog(sk, buf); - res = TIPC_OK; + if (sk_add_backlog(sk, buf)) + res = TIPC_ERR_OVERLOAD; + else + res = TIPC_OK; } bh_unlock_sock(sk); --- linux-fsl-imx51-2.6.31.orig/net/rose/rose_subr.c +++ linux-fsl-imx51-2.6.31/net/rose/rose_subr.c @@ -141,7 +141,7 @@ *dptr++ = ROSE_GFI | lci1; *dptr++ = lci2; *dptr++ = frametype; - *dptr++ = 0xAA; + *dptr++ = ROSE_CALL_REQ_ADDR_LEN_VAL; memcpy(dptr, &rose->dest_addr, ROSE_ADDR_LEN); dptr += ROSE_ADDR_LEN; memcpy(dptr, &rose->source_addr, ROSE_ADDR_LEN); @@ -245,12 +245,16 @@ do { switch (*p & 0xC0) { case 0x00: + if (len < 2) + return -1; p += 2; n += 2; len -= 2; break; case 0x40: + if (len < 3) + return -1; if (*p == FAC_NATIONAL_RAND) facilities->rand = ((p[1] << 8) & 0xFF00) + ((p[2] << 0) & 0x00FF); p += 3; @@ -259,40 +263,61 @@ break; case 0x80: + if (len < 4) + return -1; p += 4; n += 4; len -= 4; break; case 0xC0: + if (len < 2) + return -1; l = p[1]; + if (len < 2 + l) + return -1; if (*p == FAC_NATIONAL_DEST_DIGI) { if (!fac_national_digis_received) { + if (l < AX25_ADDR_LEN) + return -1; memcpy(&facilities->source_digis[0], p + 2, AX25_ADDR_LEN); facilities->source_ndigis = 1; } } else if (*p == FAC_NATIONAL_SRC_DIGI) { if (!fac_national_digis_received) { + if (l < AX25_ADDR_LEN) + return -1; memcpy(&facilities->dest_digis[0], p + 2, AX25_ADDR_LEN); facilities->dest_ndigis = 1; } } else if (*p == FAC_NATIONAL_FAIL_CALL) { + if (l < AX25_ADDR_LEN) + return -1; memcpy(&facilities->fail_call, p + 2, AX25_ADDR_LEN); } else if (*p == FAC_NATIONAL_FAIL_ADD) { + if (l < 1 + ROSE_ADDR_LEN) + return -1; memcpy(&facilities->fail_addr, p + 3, ROSE_ADDR_LEN); } else if (*p == FAC_NATIONAL_DIGIS) { + if (l % AX25_ADDR_LEN) + return -1; fac_national_digis_received = 1; facilities->source_ndigis = 0; facilities->dest_ndigis = 0; for (pt = p + 2, lg = 0 ; lg < l ; pt += AX25_ADDR_LEN, lg += AX25_ADDR_LEN) { - if (pt[6] & AX25_HBIT) + if (pt[6] & AX25_HBIT) { + if (facilities->dest_ndigis >= ROSE_MAX_DIGIS) + return -1; memcpy(&facilities->dest_digis[facilities->dest_ndigis++], pt, AX25_ADDR_LEN); - else + } else { + if (facilities->source_ndigis >= ROSE_MAX_DIGIS) + return -1; memcpy(&facilities->source_digis[facilities->source_ndigis++], pt, AX25_ADDR_LEN); + } } } p += l + 2; @@ -313,25 +338,38 @@ do { switch (*p & 0xC0) { case 0x00: + if (len < 2) + return -1; p += 2; n += 2; len -= 2; break; case 0x40: + if (len < 3) + return -1; p += 3; n += 3; len -= 3; break; case 0x80: + if (len < 4) + return -1; p += 4; n += 4; len -= 4; break; case 0xC0: + if (len < 2) + return -1; l = p[1]; + + /* Prevent overflows*/ + if (l < 10 || l > 20) + return -1; + if (*p == FAC_CCITT_DEST_NSAP) { memcpy(&facilities->source_addr, p + 7, ROSE_ADDR_LEN); memcpy(callsign, p + 12, l - 10); @@ -354,45 +392,44 @@ return n; } -int rose_parse_facilities(unsigned char *p, +int rose_parse_facilities(unsigned char *p, unsigned packet_len, struct rose_facilities_struct *facilities) { int facilities_len, len; facilities_len = *p++; - if (facilities_len == 0) + if (facilities_len == 0 || (unsigned)facilities_len > packet_len) return 0; - while (facilities_len > 0) { - if (*p == 0x00) { - facilities_len--; - p++; - - switch (*p) { - case FAC_NATIONAL: /* National */ - len = rose_parse_national(p + 1, facilities, facilities_len - 1); - facilities_len -= len + 1; - p += len + 1; - break; - - case FAC_CCITT: /* CCITT */ - len = rose_parse_ccitt(p + 1, facilities, facilities_len - 1); - facilities_len -= len + 1; - p += len + 1; - break; - - default: - printk(KERN_DEBUG "ROSE: rose_parse_facilities - unknown facilities family %02X\n", *p); - facilities_len--; - p++; - break; - } - } else - break; /* Error in facilities format */ + while (facilities_len >= 3 && *p == 0x00) { + facilities_len--; + p++; + + switch (*p) { + case FAC_NATIONAL: /* National */ + len = rose_parse_national(p + 1, facilities, facilities_len - 1); + break; + + case FAC_CCITT: /* CCITT */ + len = rose_parse_ccitt(p + 1, facilities, facilities_len - 1); + break; + + default: + printk(KERN_DEBUG "ROSE: rose_parse_facilities - unknown facilities family %02X\n", *p); + len = 1; + break; + } + + if (len < 0) + return 0; + if (WARN_ON(len >= facilities_len)) + return 0; + facilities_len -= len + 1; + p += len + 1; } - return 1; + return facilities_len == 0; } static int rose_create_facilities(unsigned char *buffer, struct rose_sock *rose) --- linux-fsl-imx51-2.6.31.orig/net/rose/rose_route.c +++ linux-fsl-imx51-2.6.31/net/rose/rose_route.c @@ -851,7 +851,7 @@ unsigned int lci, new_lci; unsigned char cause, diagnostic; struct net_device *dev; - int len, res = 0; + int res = 0; char buf[11]; #if 0 @@ -859,10 +859,17 @@ return res; #endif + if (skb->len < ROSE_MIN_LEN) + return res; frametype = skb->data[2]; lci = ((skb->data[0] << 8) & 0xF00) + ((skb->data[1] << 0) & 0x0FF); - src_addr = (rose_address *)(skb->data + 9); - dest_addr = (rose_address *)(skb->data + 4); + if (frametype == ROSE_CALL_REQUEST && + (skb->len <= ROSE_CALL_REQ_FACILITIES_OFF || + skb->data[ROSE_CALL_REQ_ADDR_LEN_OFF] != + ROSE_CALL_REQ_ADDR_LEN_VAL)) + return res; + src_addr = (rose_address *)(skb->data + ROSE_CALL_REQ_SRC_ADDR_OFF); + dest_addr = (rose_address *)(skb->data + ROSE_CALL_REQ_DEST_ADDR_OFF); spin_lock_bh(&rose_neigh_list_lock); spin_lock_bh(&rose_route_list_lock); @@ -1000,12 +1007,11 @@ goto out; } - len = (((skb->data[3] >> 4) & 0x0F) + 1) >> 1; - len += (((skb->data[3] >> 0) & 0x0F) + 1) >> 1; - memset(&facilities, 0x00, sizeof(struct rose_facilities_struct)); - if (!rose_parse_facilities(skb->data + len + 4, &facilities)) { + if (!rose_parse_facilities(skb->data + ROSE_CALL_REQ_FACILITIES_OFF, + skb->len - ROSE_CALL_REQ_FACILITIES_OFF, + &facilities)) { rose_transmit_clear_request(rose_neigh, lci, ROSE_INVALID_FACILITY, 76); goto out; } --- linux-fsl-imx51-2.6.31.orig/net/rose/rose_loopback.c +++ linux-fsl-imx51-2.6.31/net/rose/rose_loopback.c @@ -72,10 +72,21 @@ unsigned int lci_i, lci_o; while ((skb = skb_dequeue(&loopback_queue)) != NULL) { + if (skb->len < ROSE_MIN_LEN) { + kfree_skb(skb); + continue; + } lci_i = ((skb->data[0] << 8) & 0xF00) + ((skb->data[1] << 0) & 0x0FF); frametype = skb->data[2]; - dest = (rose_address *)(skb->data + 4); - lci_o = 0xFFF - lci_i; + if (frametype == ROSE_CALL_REQUEST && + (skb->len <= ROSE_CALL_REQ_FACILITIES_OFF || + skb->data[ROSE_CALL_REQ_ADDR_LEN_OFF] != + ROSE_CALL_REQ_ADDR_LEN_VAL)) { + kfree_skb(skb); + continue; + } + dest = (rose_address *)(skb->data + ROSE_CALL_REQ_DEST_ADDR_OFF); + lci_o = ROSE_DEFAULT_MAXVC + 1 - lci_i; skb_reset_transport_header(skb); --- linux-fsl-imx51-2.6.31.orig/net/rose/af_rose.c +++ linux-fsl-imx51-2.6.31/net/rose/af_rose.c @@ -677,7 +677,7 @@ if (addr_len == sizeof(struct sockaddr_rose) && addr->srose_ndigis > 1) return -EINVAL; - if (addr->srose_ndigis > ROSE_MAX_DIGIS) + if ((unsigned int) addr->srose_ndigis > ROSE_MAX_DIGIS) return -EINVAL; if ((dev = rose_dev_get(&addr->srose_addr)) == NULL) { @@ -737,7 +737,7 @@ if (addr_len == sizeof(struct sockaddr_rose) && addr->srose_ndigis > 1) return -EINVAL; - if (addr->srose_ndigis > ROSE_MAX_DIGIS) + if ((unsigned int) addr->srose_ndigis > ROSE_MAX_DIGIS) return -EINVAL; /* Source + Destination digis should not exceed ROSE_MAX_DIGIS */ @@ -983,7 +983,7 @@ struct sock *make; struct rose_sock *make_rose; struct rose_facilities_struct facilities; - int n, len; + int n; skb->sk = NULL; /* Initially we don't know who it's for */ @@ -992,9 +992,9 @@ */ memset(&facilities, 0x00, sizeof(struct rose_facilities_struct)); - len = (((skb->data[3] >> 4) & 0x0F) + 1) >> 1; - len += (((skb->data[3] >> 0) & 0x0F) + 1) >> 1; - if (!rose_parse_facilities(skb->data + len + 4, &facilities)) { + if (!rose_parse_facilities(skb->data + ROSE_CALL_REQ_FACILITIES_OFF, + skb->len - ROSE_CALL_REQ_FACILITIES_OFF, + &facilities)) { rose_transmit_clear_request(neigh, lci, ROSE_INVALID_FACILITY, 76); return 0; } --- linux-fsl-imx51-2.6.31.orig/net/can/af_can.c +++ linux-fsl-imx51-2.6.31/net/can/af_can.c @@ -199,6 +199,8 @@ * @skb: pointer to socket buffer with CAN frame in data section * @loop: loopback for listeners on local CAN sockets (recommended default!) * + * Due to the loopback this routine must not be called from hardirq context. + * * Return: * 0 on success * -ENETDOWN when the selected interface is down @@ -278,7 +280,7 @@ } if (newskb) - netif_rx(newskb); + netif_rx_ni(newskb); /* update statistics */ can_stats.tx_frames++; --- linux-fsl-imx51-2.6.31.orig/net/can/raw.c +++ linux-fsl-imx51-2.6.31/net/can/raw.c @@ -280,7 +280,12 @@ static int raw_release(struct socket *sock) { struct sock *sk = sock->sk; - struct raw_sock *ro = raw_sk(sk); + struct raw_sock *ro; + + if (!sk) + return 0; + + ro = raw_sk(sk); unregister_netdevice_notifier(&ro->notifier); --- linux-fsl-imx51-2.6.31.orig/net/can/bcm.c +++ linux-fsl-imx51-2.6.31/net/can/bcm.c @@ -58,6 +58,13 @@ #include #include +/* + * To send multiple CAN frame content within TX_SETUP or to filter + * CAN messages with multiplex index within RX_SETUP, the number of + * different filters is limited to 256 due to the one byte index value. + */ +#define MAX_NFRAMES 256 + /* use of last_frames[index].can_dlc */ #define RX_RECV 0x40 /* received data for this element */ #define RX_THR 0x80 /* element not been sent due to throttle feature */ @@ -87,16 +94,16 @@ struct list_head list; int ifindex; canid_t can_id; - int flags; + u32 flags; unsigned long frames_abs, frames_filtered; struct timeval ival1, ival2; struct hrtimer timer, thrtimer; struct tasklet_struct tsklet, thrtsklet; ktime_t rx_stamp, kt_ival1, kt_ival2, kt_lastmsg; int rx_ifindex; - int count; - int nframes; - int currframe; + u32 count; + u32 nframes; + u32 currframe; struct can_frame *frames; struct can_frame *last_frames; struct can_frame sframe; @@ -116,7 +123,7 @@ struct list_head tx_ops; unsigned long dropped_usr_msgs; struct proc_dir_entry *bcm_proc_read; - char procname [9]; /* pointer printed in ASCII with \0 */ + char procname [32]; /* inode number in decimal with \0 */ }; static inline struct bcm_sock *bcm_sk(const struct sock *sk) @@ -175,7 +182,7 @@ len += snprintf(page + len, PAGE_SIZE - len, "rx_op: %03X %-5s ", op->can_id, bcm_proc_getifname(op->ifindex)); - len += snprintf(page + len, PAGE_SIZE - len, "[%d]%c ", + len += snprintf(page + len, PAGE_SIZE - len, "[%u]%c ", op->nframes, (op->flags & RX_CHECK_DLC)?'d':' '); if (op->kt_ival1.tv64) @@ -209,7 +216,7 @@ list_for_each_entry(op, &bo->tx_ops, list) { len += snprintf(page + len, PAGE_SIZE - len, - "tx_op: %03X %s [%d] ", + "tx_op: %03X %s [%u] ", op->can_id, bcm_proc_getifname(op->ifindex), op->nframes); @@ -290,7 +297,7 @@ struct can_frame *firstframe; struct sockaddr_can *addr; struct sock *sk = op->sk; - int datalen = head->nframes * CFSIZ; + unsigned int datalen = head->nframes * CFSIZ; int err; skb = alloc_skb(sizeof(*head) + datalen, gfp_any()); @@ -475,7 +482,7 @@ * bcm_rx_cmp_to_index - (bit)compares the currently received data to formerly * received data stored in op->last_frames[] */ -static void bcm_rx_cmp_to_index(struct bcm_op *op, int index, +static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index, const struct can_frame *rxdata) { /* @@ -561,7 +568,8 @@ /* * bcm_rx_do_flush - helper for bcm_rx_thr_flush */ -static inline int bcm_rx_do_flush(struct bcm_op *op, int update, int index) +static inline int bcm_rx_do_flush(struct bcm_op *op, int update, + unsigned int index) { if ((op->last_frames) && (op->last_frames[index].can_dlc & RX_THR)) { if (update) @@ -582,7 +590,7 @@ int updated = 0; if (op->nframes > 1) { - int i; + unsigned int i; /* for MUX filter we start at index 1 */ for (i = 1; i < op->nframes; i++) @@ -631,7 +639,7 @@ { struct bcm_op *op = (struct bcm_op *)data; const struct can_frame *rxframe = (struct can_frame *)skb->data; - int i; + unsigned int i; /* disable timeout */ hrtimer_cancel(&op->timer); @@ -831,14 +839,15 @@ { struct bcm_sock *bo = bcm_sk(sk); struct bcm_op *op; - int i, err; + unsigned int i; + int err; /* we need a real device to send frames */ if (!ifindex) return -ENODEV; - /* we need at least one can_frame */ - if (msg_head->nframes < 1) + /* check nframes boundaries - we need at least one can_frame */ + if (msg_head->nframes < 1 || msg_head->nframes > MAX_NFRAMES) return -EINVAL; /* check the given can_id */ @@ -1002,6 +1011,10 @@ msg_head->nframes = 0; } + /* the first element contains the mux-mask => MAX_NFRAMES + 1 */ + if (msg_head->nframes > MAX_NFRAMES + 1) + return -EINVAL; + if ((msg_head->flags & RX_RTR_FRAME) && ((msg_head->nframes != 1) || (!(msg_head->can_id & CAN_RTR_FLAG)))) @@ -1420,9 +1433,14 @@ static int bcm_release(struct socket *sock) { struct sock *sk = sock->sk; - struct bcm_sock *bo = bcm_sk(sk); + struct bcm_sock *bo; struct bcm_op *op, *next; + if (sk == NULL) + return 0; + + bo = bcm_sk(sk); + /* remove bcm_ops, timer, rx_unregister(), etc. */ unregister_netdevice_notifier(&bo->notifier); @@ -1514,7 +1532,7 @@ if (proc_dir) { /* unique socket address as filename */ - sprintf(bo->procname, "%p", sock); + sprintf(bo->procname, "%lu", sock_i_ino(sk)); bo->bcm_proc_read = create_proc_read_entry(bo->procname, 0644, proc_dir, bcm_read_proc, sk); --- linux-fsl-imx51-2.6.31.orig/net/dccp/minisocks.c +++ linux-fsl-imx51-2.6.31/net/dccp/minisocks.c @@ -254,7 +254,7 @@ * in main socket hash table and lock on listening * socket does not protect us more. */ - sk_add_backlog(child, skb); + __sk_add_backlog(child, skb); } bh_unlock_sock(child); --- linux-fsl-imx51-2.6.31.orig/net/dccp/ipv6.c +++ linux-fsl-imx51-2.6.31/net/dccp/ipv6.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "dccp.h" #include "ipv6.h" @@ -69,13 +70,7 @@ dh->dccph_checksum = dccp_v6_csum_finish(skb, &np->saddr, &np->daddr); } -static inline __u32 secure_dccpv6_sequence_number(__be32 *saddr, __be32 *daddr, - __be16 sport, __be16 dport ) -{ - return secure_tcpv6_sequence_number(saddr, daddr, sport, dport); -} - -static inline __u32 dccp_v6_init_sequence(struct sk_buff *skb) +static inline __u64 dccp_v6_init_sequence(struct sk_buff *skb) { return secure_dccpv6_sequence_number(ipv6_hdr(skb)->daddr.s6_addr32, ipv6_hdr(skb)->saddr.s6_addr32, --- linux-fsl-imx51-2.6.31.orig/net/dccp/options.c +++ linux-fsl-imx51-2.6.31/net/dccp/options.c @@ -131,6 +131,8 @@ case DCCPO_CHANGE_L ... DCCPO_CONFIRM_R: if (pkt_type == DCCP_PKT_DATA) /* RFC 4340, 6 */ break; + if (len == 0) + goto out_invalid_option; rc = dccp_feat_parse_options(sk, dreq, mandatory, opt, *value, value + 1, len - 1); if (rc) --- linux-fsl-imx51-2.6.31.orig/net/dccp/input.c +++ linux-fsl-imx51-2.6.31/net/dccp/input.c @@ -616,6 +616,9 @@ /* Caller (dccp_v4_do_rcv) will send Reset */ dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; return 1; + } else if (sk->sk_state == DCCP_CLOSED) { + dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; + return 1; } if (sk->sk_state != DCCP_REQUESTING && sk->sk_state != DCCP_RESPOND) { @@ -678,10 +681,6 @@ } switch (sk->sk_state) { - case DCCP_CLOSED: - dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION; - return 1; - case DCCP_REQUESTING: queued = dccp_rcv_request_sent_state_process(sk, skb, dh, len); if (queued >= 0) --- linux-fsl-imx51-2.6.31.orig/net/dccp/ipv4.c +++ linux-fsl-imx51-2.6.31/net/dccp/ipv4.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "ackvec.h" #include "ccid.h" --- linux-fsl-imx51-2.6.31.orig/net/ax25/af_ax25.c +++ linux-fsl-imx51-2.6.31/net/ax25/af_ax25.c @@ -538,7 +538,7 @@ if (level != SOL_AX25) return -ENOPROTOOPT; - if (optlen < sizeof(int)) + if (optlen < (int)sizeof(int)) return -EINVAL; if (get_user(opt, (int __user *)optval)) @@ -893,7 +893,6 @@ sock_init_data(NULL, sk); - sk->sk_destruct = ax25_free_sock; sk->sk_type = osk->sk_type; sk->sk_priority = osk->sk_priority; sk->sk_protocol = osk->sk_protocol; @@ -931,6 +930,7 @@ } sk->sk_protinfo = ax25; + sk->sk_destruct = ax25_free_sock; ax25->sk = sk; return sk; @@ -1383,6 +1383,7 @@ ax25_cb *ax25; int err = 0; + memset(fsa, 0, sizeof(*fsa)); lock_sock(sk); ax25 = ax25_sk(sk); @@ -1394,7 +1395,6 @@ fsa->fsa_ax25.sax25_family = AF_AX25; fsa->fsa_ax25.sax25_call = ax25->dest_addr; - fsa->fsa_ax25.sax25_ndigis = 0; if (ax25->digipeat != NULL) { ndigi = ax25->digipeat->ndigi; @@ -1781,8 +1781,8 @@ ax25_info.idletimer = ax25_display_timer(&ax25->idletimer) / (60 * HZ); ax25_info.n2count = ax25->n2count; ax25_info.state = ax25->state; - ax25_info.rcv_q = sk_wmem_alloc_get(sk); - ax25_info.snd_q = sk_rmem_alloc_get(sk); + ax25_info.rcv_q = sk_rmem_alloc_get(sk); + ax25_info.snd_q = sk_wmem_alloc_get(sk); ax25_info.vs = ax25->vs; ax25_info.vr = ax25->vr; ax25_info.va = ax25->va; --- linux-fsl-imx51-2.6.31.orig/net/core/sock.c +++ linux-fsl-imx51-2.6.31/net/core/sock.c @@ -323,6 +323,10 @@ skb->dev = NULL; + if (sk_rcvqueues_full(sk, skb)) { + atomic_inc(&sk->sk_drops); + goto discard_and_relse; + } if (nested) bh_lock_sock_nested(sk); else @@ -336,8 +340,12 @@ rc = sk_backlog_rcv(sk, skb); mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_); - } else - sk_add_backlog(sk, skb); + } else if (sk_add_backlog(sk, skb)) { + bh_unlock_sock(sk); + atomic_inc(&sk->sk_drops); + goto discard_and_relse; + } + bh_unlock_sock(sk); out: sock_put(sk); @@ -1104,6 +1112,7 @@ sock_lock_init(newsk); bh_lock_sock(newsk); newsk->sk_backlog.head = newsk->sk_backlog.tail = NULL; + newsk->sk_backlog.len = 0; atomic_set(&newsk->sk_rmem_alloc, 0); /* @@ -1218,17 +1227,22 @@ void sock_wfree(struct sk_buff *skb) { struct sock *sk = skb->sk; - int res; + unsigned int len = skb->truesize; - /* In case it might be waiting for more memory. */ - res = atomic_sub_return(skb->truesize, &sk->sk_wmem_alloc); - if (!sock_flag(sk, SOCK_USE_WRITE_QUEUE)) + if (!sock_flag(sk, SOCK_USE_WRITE_QUEUE)) { + /* + * Keep a reference on sk_wmem_alloc, this will be released + * after sk_write_space() call + */ + atomic_sub(len - 1, &sk->sk_wmem_alloc); sk->sk_write_space(sk); + len = 1; + } /* - * if sk_wmem_alloc reached 0, we are last user and should - * free this sock, as sk_free() call could not do it. + * if sk_wmem_alloc reaches 0, we must finish what sk_free() + * could not do because of in-flight packets */ - if (res == 0) + if (atomic_sub_and_test(len, &sk->sk_wmem_alloc)) __sk_free(sk); } EXPORT_SYMBOL(sock_wfree); @@ -1498,6 +1512,12 @@ bh_lock_sock(sk); } while ((skb = sk->sk_backlog.head) != NULL); + + /* + * Doing the zeroing here guarantee we can not loop forever + * while a wild producer attempts to flood us. + */ + sk->sk_backlog.len = 0; } /** --- linux-fsl-imx51-2.6.31.orig/net/core/secure_seq.c +++ linux-fsl-imx51-2.6.31/net/core/secure_seq.c @@ -0,0 +1,184 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +static u32 net_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned; + +static int __init net_secret_init(void) +{ + get_random_bytes(net_secret, sizeof(net_secret)); + return 0; +} +late_initcall(net_secret_init); + +static u32 seq_scale(u32 seq) +{ + /* + * As close as possible to RFC 793, which + * suggests using a 250 kHz clock. + * Further reading shows this assumes 2 Mb/s networks. + * For 10 Mb/s Ethernet, a 1 MHz clock is appropriate. + * For 10 Gb/s Ethernet, a 1 GHz clock should be ok, but + * we also need to limit the resolution so that the u32 seq + * overlaps less than one time per MSL (2 minutes). + * Choosing a clock of 64 ns period is OK. (period of 274 s) + */ + return seq + (ktime_to_ns(ktime_get_real()) >> 6); +} + +#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) +__u32 secure_tcpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport) +{ + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; + + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + daddr[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) + secret[i] = net_secret[i]; + + md5_transform(hash, secret); + + return seq_scale(hash[0]); +} +EXPORT_SYMBOL(secure_tcpv6_sequence_number); + +u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, + __be16 dport) +{ + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; + + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + (__force u32) daddr[i]; + secret[4] = net_secret[4] + (__force u32)dport; + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) + secret[i] = net_secret[i]; + + md5_transform(hash, secret); + + return hash[0]; +} +#endif + +#ifdef CONFIG_INET +__u32 secure_ip_id(__be32 daddr) +{ + u32 hash[MD5_DIGEST_WORDS]; + + hash[0] = (__force __u32) daddr; + hash[1] = net_secret[13]; + hash[2] = net_secret[14]; + hash[3] = net_secret[15]; + + md5_transform(hash, net_secret); + + return hash[0]; +} + +__u32 secure_ipv6_id(const __be32 daddr[4]) +{ + __u32 hash[4]; + + memcpy(hash, daddr, 16); + md5_transform(hash, net_secret); + + return hash[0]; +} + +__u32 secure_tcp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport) +{ + u32 hash[MD5_DIGEST_WORDS]; + + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = ((__force u16)sport << 16) + (__force u16)dport; + hash[3] = net_secret[15]; + + md5_transform(hash, net_secret); + + return seq_scale(hash[0]); +} + +u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport) +{ + u32 hash[MD5_DIGEST_WORDS]; + + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = (__force u32)dport ^ net_secret[14]; + hash[3] = net_secret[15]; + + md5_transform(hash, net_secret); + + return hash[0]; +} +EXPORT_SYMBOL_GPL(secure_ipv4_port_ephemeral); +#endif + +#if defined(CONFIG_IP_DCCP) || defined(CONFIG_IP_DCCP_MODULE) +u64 secure_dccp_sequence_number(__be32 saddr, __be32 daddr, + __be16 sport, __be16 dport) +{ + u32 hash[MD5_DIGEST_WORDS]; + u64 seq; + + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = ((__force u16)sport << 16) + (__force u16)dport; + hash[3] = net_secret[15]; + + md5_transform(hash, net_secret); + + seq = hash[0] | (((u64)hash[1]) << 32); + seq += ktime_to_ns(ktime_get_real()); + seq &= (1ull << 48) - 1; + + return seq; +} +EXPORT_SYMBOL(secure_dccp_sequence_number); + +#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) +u64 secure_dccpv6_sequence_number(__be32 *saddr, __be32 *daddr, + __be16 sport, __be16 dport) +{ + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u64 seq; + u32 i; + + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + daddr[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) + secret[i] = net_secret[i]; + + md5_transform(hash, secret); + + seq = hash[0] | (((u64)hash[1]) << 32); + seq += ktime_to_ns(ktime_get_real()); + seq &= (1ull << 48) - 1; + + return seq; +} +EXPORT_SYMBOL(secure_dccpv6_sequence_number); +#endif +#endif --- linux-fsl-imx51-2.6.31.orig/net/core/ethtool.c +++ linux-fsl-imx51-2.6.31/net/core/ethtool.c @@ -209,22 +209,34 @@ return 0; } -static int ethtool_set_rxnfc(struct net_device *dev, void __user *useraddr) +static int ethtool_set_rxnfc(struct net_device *dev, u32 cmd, + void __user *useraddr) { - struct ethtool_rxnfc cmd; + struct ethtool_rxnfc info; + size_t info_size = sizeof(info); if (!dev->ethtool_ops->set_rxnfc) return -EOPNOTSUPP; - if (copy_from_user(&cmd, useraddr, sizeof(cmd))) + /* struct ethtool_rxnfc was originally defined for + * ETHTOOL_{G,S}RXFH with only the cmd, flow_type and data + * members. User-space might still be using that + * definition. */ + if (cmd == ETHTOOL_SRXFH) + info_size = (offsetof(struct ethtool_rxnfc, data) + + sizeof(info.data)); + + if (copy_from_user(&info, useraddr, info_size)) return -EFAULT; - return dev->ethtool_ops->set_rxnfc(dev, &cmd); + return dev->ethtool_ops->set_rxnfc(dev, &info); } -static int ethtool_get_rxnfc(struct net_device *dev, void __user *useraddr) +static int ethtool_get_rxnfc(struct net_device *dev, u32 cmd, + void __user *useraddr) { struct ethtool_rxnfc info; + size_t info_size = sizeof(info); const struct ethtool_ops *ops = dev->ethtool_ops; int ret; void *rule_buf = NULL; @@ -232,12 +244,20 @@ if (!ops->get_rxnfc) return -EOPNOTSUPP; - if (copy_from_user(&info, useraddr, sizeof(info))) + /* struct ethtool_rxnfc was originally defined for + * ETHTOOL_{G,S}RXFH with only the cmd, flow_type and data + * members. User-space might still be using that + * definition. */ + if (cmd == ETHTOOL_GRXFH) + info_size = (offsetof(struct ethtool_rxnfc, data) + + sizeof(info.data)); + + if (copy_from_user(&info, useraddr, info_size)) return -EFAULT; if (info.cmd == ETHTOOL_GRXCLSRLALL) { if (info.rule_cnt > 0) { - rule_buf = kmalloc(info.rule_cnt * sizeof(u32), + rule_buf = kzalloc(info.rule_cnt * sizeof(u32), GFP_USER); if (!rule_buf) return -ENOMEM; @@ -249,7 +269,7 @@ goto err_out; ret = -EFAULT; - if (copy_to_user(useraddr, &info, sizeof(info))) + if (copy_to_user(useraddr, &info, info_size)) goto err_out; if (rule_buf) { @@ -283,7 +303,7 @@ if (regs.len > reglen) regs.len = reglen; - regbuf = kmalloc(reglen, GFP_USER); + regbuf = kzalloc(reglen, GFP_USER); if (!regbuf) return -ENOMEM; @@ -1087,12 +1107,12 @@ case ETHTOOL_GRXCLSRLCNT: case ETHTOOL_GRXCLSRULE: case ETHTOOL_GRXCLSRLALL: - rc = ethtool_get_rxnfc(dev, useraddr); + rc = ethtool_get_rxnfc(dev, ethcmd, useraddr); break; case ETHTOOL_SRXFH: case ETHTOOL_SRXCLSRLDEL: case ETHTOOL_SRXCLSRLINS: - rc = ethtool_set_rxnfc(dev, useraddr); + rc = ethtool_set_rxnfc(dev, ethcmd, useraddr); break; case ETHTOOL_GGRO: rc = ethtool_get_gro(dev, useraddr); --- linux-fsl-imx51-2.6.31.orig/net/core/skbuff.c +++ linux-fsl-imx51-2.6.31/net/core/skbuff.c @@ -2704,7 +2704,8 @@ NAPI_GRO_CB(skb)->free = 1; goto done; - } + } else if (skb_gro_len(p) != pinfo->gso_size) + return -E2BIG; headroom = skb_headroom(p); nskb = netdev_alloc_skb(p->dev, headroom + skb_gro_offset(p)); --- linux-fsl-imx51-2.6.31.orig/net/core/dev.c +++ linux-fsl-imx51-2.6.31/net/core/dev.c @@ -933,14 +933,15 @@ ret = notifier_to_errno(ret); if (ret) { - if (err) { - printk(KERN_ERR - "%s: name change rollback failed: %d.\n", - dev->name, ret); - } else { + /* err >= 0 after dev_alloc_name() or stores the first errno */ + if (err >= 0) { err = ret; memcpy(dev->name, oldname, IFNAMSIZ); goto rollback; + } else { + printk(KERN_ERR + "%s: name change rollback failed: %d.\n", + dev->name, ret); } } @@ -2248,6 +2249,9 @@ int ret = NET_RX_DROP; __be16 type; + if (!skb->tstamp.tv64) + net_timestamp(skb); + if (skb->vlan_tci && vlan_hwaccel_do_receive(skb)) return NET_RX_SUCCESS; @@ -2255,9 +2259,6 @@ if (netpoll_receive_skb(skb)) return NET_RX_DROP; - if (!skb->tstamp.tv64) - net_timestamp(skb); - if (!skb->iif) skb->iif = skb->dev->ifindex; @@ -2556,6 +2557,9 @@ { __skb_pull(skb, skb_headlen(skb)); skb_reserve(skb, NET_IP_ALIGN - skb_headroom(skb)); + skb->vlan_tci = 0; + skb->dev = napi->dev; + skb->iif = 0; napi->skb = skb; } @@ -4807,6 +4811,11 @@ rollback_registered(dev); dev->reg_state = NETREG_UNREGISTERED; } + /* + * Prevent userspace races by waiting until the network + * device is fully setup before sending notifications. + */ + rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U); out: return ret; @@ -5342,6 +5351,12 @@ /* Notify protocols, that a new device appeared. */ call_netdevice_notifiers(NETDEV_REGISTER, dev); + /* + * Prevent userspace races by waiting until the network + * device is fully setup before sending notifications. + */ + rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U); + synchronize_net(); err = 0; out: --- linux-fsl-imx51-2.6.31.orig/net/core/filter.c +++ linux-fsl-imx51-2.6.31/net/core/filter.c @@ -111,39 +111,41 @@ */ unsigned int sk_run_filter(struct sk_buff *skb, struct sock_filter *filter, int flen) { - struct sock_filter *fentry; /* We walk down these */ void *ptr; u32 A = 0; /* Accumulator */ u32 X = 0; /* Index Register */ u32 mem[BPF_MEMWORDS]; /* Scratch Memory Store */ + unsigned long memvalid = 0; u32 tmp; int k; int pc; + BUILD_BUG_ON(BPF_MEMWORDS > BITS_PER_LONG); /* * Process array of filter instructions. */ for (pc = 0; pc < flen; pc++) { - fentry = &filter[pc]; + const struct sock_filter *fentry = &filter[pc]; + u32 f_k = fentry->k; switch (fentry->code) { case BPF_ALU|BPF_ADD|BPF_X: A += X; continue; case BPF_ALU|BPF_ADD|BPF_K: - A += fentry->k; + A += f_k; continue; case BPF_ALU|BPF_SUB|BPF_X: A -= X; continue; case BPF_ALU|BPF_SUB|BPF_K: - A -= fentry->k; + A -= f_k; continue; case BPF_ALU|BPF_MUL|BPF_X: A *= X; continue; case BPF_ALU|BPF_MUL|BPF_K: - A *= fentry->k; + A *= f_k; continue; case BPF_ALU|BPF_DIV|BPF_X: if (X == 0) @@ -151,49 +153,49 @@ A /= X; continue; case BPF_ALU|BPF_DIV|BPF_K: - A /= fentry->k; + A /= f_k; continue; case BPF_ALU|BPF_AND|BPF_X: A &= X; continue; case BPF_ALU|BPF_AND|BPF_K: - A &= fentry->k; + A &= f_k; continue; case BPF_ALU|BPF_OR|BPF_X: A |= X; continue; case BPF_ALU|BPF_OR|BPF_K: - A |= fentry->k; + A |= f_k; continue; case BPF_ALU|BPF_LSH|BPF_X: A <<= X; continue; case BPF_ALU|BPF_LSH|BPF_K: - A <<= fentry->k; + A <<= f_k; continue; case BPF_ALU|BPF_RSH|BPF_X: A >>= X; continue; case BPF_ALU|BPF_RSH|BPF_K: - A >>= fentry->k; + A >>= f_k; continue; case BPF_ALU|BPF_NEG: A = -A; continue; case BPF_JMP|BPF_JA: - pc += fentry->k; + pc += f_k; continue; case BPF_JMP|BPF_JGT|BPF_K: - pc += (A > fentry->k) ? fentry->jt : fentry->jf; + pc += (A > f_k) ? fentry->jt : fentry->jf; continue; case BPF_JMP|BPF_JGE|BPF_K: - pc += (A >= fentry->k) ? fentry->jt : fentry->jf; + pc += (A >= f_k) ? fentry->jt : fentry->jf; continue; case BPF_JMP|BPF_JEQ|BPF_K: - pc += (A == fentry->k) ? fentry->jt : fentry->jf; + pc += (A == f_k) ? fentry->jt : fentry->jf; continue; case BPF_JMP|BPF_JSET|BPF_K: - pc += (A & fentry->k) ? fentry->jt : fentry->jf; + pc += (A & f_k) ? fentry->jt : fentry->jf; continue; case BPF_JMP|BPF_JGT|BPF_X: pc += (A > X) ? fentry->jt : fentry->jf; @@ -208,7 +210,7 @@ pc += (A & X) ? fentry->jt : fentry->jf; continue; case BPF_LD|BPF_W|BPF_ABS: - k = fentry->k; + k = f_k; load_w: ptr = load_pointer(skb, k, 4, &tmp); if (ptr != NULL) { @@ -217,7 +219,7 @@ } break; case BPF_LD|BPF_H|BPF_ABS: - k = fentry->k; + k = f_k; load_h: ptr = load_pointer(skb, k, 2, &tmp); if (ptr != NULL) { @@ -226,7 +228,7 @@ } break; case BPF_LD|BPF_B|BPF_ABS: - k = fentry->k; + k = f_k; load_b: ptr = load_pointer(skb, k, 1, &tmp); if (ptr != NULL) { @@ -241,32 +243,34 @@ X = skb->len; continue; case BPF_LD|BPF_W|BPF_IND: - k = X + fentry->k; + k = X + f_k; goto load_w; case BPF_LD|BPF_H|BPF_IND: - k = X + fentry->k; + k = X + f_k; goto load_h; case BPF_LD|BPF_B|BPF_IND: - k = X + fentry->k; + k = X + f_k; goto load_b; case BPF_LDX|BPF_B|BPF_MSH: - ptr = load_pointer(skb, fentry->k, 1, &tmp); + ptr = load_pointer(skb, f_k, 1, &tmp); if (ptr != NULL) { X = (*(u8 *)ptr & 0xf) << 2; continue; } return 0; case BPF_LD|BPF_IMM: - A = fentry->k; + A = f_k; continue; case BPF_LDX|BPF_IMM: - X = fentry->k; + X = f_k; continue; case BPF_LD|BPF_MEM: - A = mem[fentry->k]; + A = (memvalid & (1UL << f_k)) ? + mem[f_k] : 0; continue; case BPF_LDX|BPF_MEM: - X = mem[fentry->k]; + X = (memvalid & (1UL << f_k)) ? + mem[f_k] : 0; continue; case BPF_MISC|BPF_TAX: X = A; @@ -275,14 +279,16 @@ A = X; continue; case BPF_RET|BPF_K: - return fentry->k; + return f_k; case BPF_RET|BPF_A: return A; case BPF_ST: - mem[fentry->k] = A; + memvalid |= 1UL << f_k; + mem[f_k] = A; continue; case BPF_STX: - mem[fentry->k] = X; + memvalid |= 1UL << f_k; + mem[f_k] = X; continue; default: WARN_ON(1); --- linux-fsl-imx51-2.6.31.orig/net/core/Makefile +++ linux-fsl-imx51-2.6.31/net/core/Makefile @@ -3,7 +3,7 @@ # obj-y := sock.o request_sock.o skbuff.o iovec.o datagram.o stream.o scm.o \ - gen_stats.o gen_estimator.o net_namespace.o + gen_stats.o gen_estimator.o net_namespace.o secure_seq.o obj-$(CONFIG_SYSCTL) += sysctl_net_core.o obj-$(CONFIG_HAS_DMA) += skb_dma_map.o --- linux-fsl-imx51-2.6.31.orig/net/core/rtnetlink.c +++ linux-fsl-imx51-2.6.31/net/core/rtnetlink.c @@ -1347,13 +1347,11 @@ case NETDEV_UNREGISTER: rtmsg_ifinfo(RTM_DELLINK, dev, ~0U); break; - case NETDEV_REGISTER: - rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U); - break; case NETDEV_UP: case NETDEV_DOWN: rtmsg_ifinfo(RTM_NEWLINK, dev, IFF_UP|IFF_RUNNING); break; + case NETDEV_REGISTER: case NETDEV_CHANGE: case NETDEV_GOING_DOWN: break; --- linux-fsl-imx51-2.6.31.orig/net/core/iovec.c +++ linux-fsl-imx51-2.6.31/net/core/iovec.c @@ -60,14 +60,13 @@ err = 0; for (ct = 0; ct < m->msg_iovlen; ct++) { - err += iov[ct].iov_len; - /* - * Goal is not to verify user data, but to prevent returning - * negative value, which is interpreted as errno. - * Overflow is still possible, but it is harmless. - */ - if (err < 0) - return -EMSGSIZE; + size_t len = iov[ct].iov_len; + + if (len > INT_MAX - err) { + len = INT_MAX - err; + iov[ct].iov_len = len; + } + err += len; } return err; --- linux-fsl-imx51-2.6.31.orig/net/core/datagram.c +++ linux-fsl-imx51-2.6.31/net/core/datagram.c @@ -223,6 +223,15 @@ consume_skb(skb); sk_mem_reclaim_partial(sk); } +EXPORT_SYMBOL(skb_free_datagram); + +void skb_free_datagram_locked(struct sock *sk, struct sk_buff *skb) +{ + lock_sock(sk); + skb_free_datagram(sk, skb); + release_sock(sk); +} +EXPORT_SYMBOL(skb_free_datagram_locked); /** * skb_kill_datagram - Free a datagram skbuff forcibly @@ -749,5 +758,4 @@ EXPORT_SYMBOL(datagram_poll); EXPORT_SYMBOL(skb_copy_and_csum_datagram_iovec); EXPORT_SYMBOL(skb_copy_datagram_iovec); -EXPORT_SYMBOL(skb_free_datagram); EXPORT_SYMBOL(skb_recv_datagram); --- linux-fsl-imx51-2.6.31.orig/tools/perf/builtin-annotate.c +++ linux-fsl-imx51-2.6.31/tools/perf/builtin-annotate.c @@ -1335,8 +1335,8 @@ exit(-1); } - if (!force && (stat.st_uid != geteuid())) { - fprintf(stderr, "file: %s not owned by current user\n", input_name); + if (!force && stat.st_uid && (stat.st_uid != geteuid())) { + fprintf(stderr, "file: %s not owned by current user or root\n", input_name); exit(-1); } --- linux-fsl-imx51-2.6.31.orig/tools/perf/builtin-stat.c +++ linux-fsl-imx51-2.6.31/tools/perf/builtin-stat.c @@ -82,19 +82,32 @@ static u64 event_res[MAX_RUN][MAX_COUNTERS][3]; static u64 event_scaled[MAX_RUN][MAX_COUNTERS]; -static u64 event_res_avg[MAX_COUNTERS][3]; -static u64 event_res_noise[MAX_COUNTERS][3]; +struct stats +{ + double sum; + double sum_sq; +}; -static u64 event_scaled_avg[MAX_COUNTERS]; +static double avg_stats(struct stats *stats) +{ + return stats->sum / run_count; +} -static u64 runtime_nsecs_avg; -static u64 runtime_nsecs_noise; +/* + * stddev = sqrt(1/N (\Sum n_i^2) - avg(n)^2) + */ +static double stddev_stats(struct stats *stats) +{ + double avg = stats->sum / run_count; -static u64 walltime_nsecs_avg; -static u64 walltime_nsecs_noise; + return sqrt(stats->sum_sq/run_count - avg*avg); +} -static u64 runtime_cycles_avg; -static u64 runtime_cycles_noise; +struct stats event_res_stats[MAX_COUNTERS][3]; +struct stats event_scaled_stats[MAX_COUNTERS]; +struct stats runtime_nsecs_stats; +struct stats walltime_nsecs_stats; +struct stats runtime_cycles_stats; #define MATCH_EVENT(t, c, counter) \ (attrs[counter].type == PERF_TYPE_##t && \ @@ -278,42 +291,37 @@ return WEXITSTATUS(status); } -static void print_noise(u64 *count, u64 *noise) +static void print_noise(double avg, double stddev) { if (run_count > 1) - fprintf(stderr, " ( +- %7.3f%% )", - (double)noise[0]/(count[0]+1)*100.0); + fprintf(stderr, " ( +- %7.3f%% )", 100*stddev / avg); } -static void nsec_printout(int counter, u64 *count, u64 *noise) +static void nsec_printout(int counter, double avg, double stddev) { - double msecs = (double)count[0] / 1000000; + double msecs = avg / 1e6; fprintf(stderr, " %14.6f %-24s", msecs, event_name(counter)); if (MATCH_EVENT(SOFTWARE, SW_TASK_CLOCK, counter)) { - if (walltime_nsecs_avg) - fprintf(stderr, " # %10.3f CPUs ", - (double)count[0] / (double)walltime_nsecs_avg); + fprintf(stderr, " # %10.3f CPUs ", + avg / avg_stats(&walltime_nsecs_stats)); } - print_noise(count, noise); + print_noise(avg, stddev); } -static void abs_printout(int counter, u64 *count, u64 *noise) +static void abs_printout(int counter, double avg, double stddev) { - fprintf(stderr, " %14Ld %-24s", count[0], event_name(counter)); + fprintf(stderr, " %14.0f %-24s", avg, event_name(counter)); - if (runtime_cycles_avg && - MATCH_EVENT(HARDWARE, HW_INSTRUCTIONS, counter)) { + if (MATCH_EVENT(HARDWARE, HW_INSTRUCTIONS, counter)) { fprintf(stderr, " # %10.3f IPC ", - (double)count[0] / (double)runtime_cycles_avg); + avg / avg_stats(&runtime_cycles_stats)); } else { - if (runtime_nsecs_avg) { - fprintf(stderr, " # %10.3f M/sec", - (double)count[0]/runtime_nsecs_avg*1000.0); - } + fprintf(stderr, " # %10.3f M/sec", + 1000.0 * avg / avg_stats(&runtime_nsecs_stats)); } - print_noise(count, noise); + print_noise(avg, stddev); } /* @@ -321,12 +329,12 @@ */ static void print_counter(int counter) { - u64 *count, *noise; + double avg, stddev; int scaled; - count = event_res_avg[counter]; - noise = event_res_noise[counter]; - scaled = event_scaled_avg[counter]; + avg = avg_stats(&event_res_stats[counter][0]); + stddev = stddev_stats(&event_res_stats[counter][0]); + scaled = avg_stats(&event_scaled_stats[counter]); if (scaled == -1) { fprintf(stderr, " %14s %-24s\n", @@ -335,36 +343,34 @@ } if (nsec_counter(counter)) - nsec_printout(counter, count, noise); + nsec_printout(counter, avg, stddev); else - abs_printout(counter, count, noise); + abs_printout(counter, avg, stddev); + + if (scaled) { + double avg_enabled, avg_running; + + avg_enabled = avg_stats(&event_res_stats[counter][1]); + avg_running = avg_stats(&event_res_stats[counter][2]); - if (scaled) fprintf(stderr, " (scaled from %.2f%%)", - (double) count[2] / count[1] * 100); + 100 * avg_running / avg_enabled); + } fprintf(stderr, "\n"); } -/* - * normalize_noise noise values down to stddev: - */ -static void normalize_noise(u64 *val) +static void update_stats(const char *name, int idx, struct stats *stats, u64 *val) { - double res; + double sq = *val; - res = (double)*val / (run_count * sqrt((double)run_count)); - - *val = (u64)res; -} - -static void update_avg(const char *name, int idx, u64 *avg, u64 *val) -{ - *avg += *val; + stats->sum += *val; + stats->sum_sq += sq * sq; if (verbose > 1) fprintf(stderr, "debug: %20s[%d]: %Ld\n", name, idx, *val); } + /* * Calculate the averages and noises: */ @@ -376,61 +382,22 @@ fprintf(stderr, "\n"); for (i = 0; i < run_count; i++) { - update_avg("runtime", 0, &runtime_nsecs_avg, runtime_nsecs + i); - update_avg("walltime", 0, &walltime_nsecs_avg, walltime_nsecs + i); - update_avg("runtime_cycles", 0, &runtime_cycles_avg, runtime_cycles + i); + update_stats("runtime", 0, &runtime_nsecs_stats, runtime_nsecs + i); + update_stats("walltime", 0, &walltime_nsecs_stats, walltime_nsecs + i); + update_stats("runtime_cycles", 0, &runtime_cycles_stats, runtime_cycles + i); for (j = 0; j < nr_counters; j++) { - update_avg("counter/0", j, - event_res_avg[j]+0, event_res[i][j]+0); - update_avg("counter/1", j, - event_res_avg[j]+1, event_res[i][j]+1); - update_avg("counter/2", j, - event_res_avg[j]+2, event_res[i][j]+2); + update_stats("counter/0", j, + event_res_stats[j]+0, event_res[i][j]+0); + update_stats("counter/1", j, + event_res_stats[j]+1, event_res[i][j]+1); + update_stats("counter/2", j, + event_res_stats[j]+2, event_res[i][j]+2); if (event_scaled[i][j] != (u64)-1) - update_avg("scaled", j, - event_scaled_avg + j, event_scaled[i]+j); - else - event_scaled_avg[j] = -1; - } - } - runtime_nsecs_avg /= run_count; - walltime_nsecs_avg /= run_count; - runtime_cycles_avg /= run_count; - - for (j = 0; j < nr_counters; j++) { - event_res_avg[j][0] /= run_count; - event_res_avg[j][1] /= run_count; - event_res_avg[j][2] /= run_count; - } - - for (i = 0; i < run_count; i++) { - runtime_nsecs_noise += - abs((s64)(runtime_nsecs[i] - runtime_nsecs_avg)); - walltime_nsecs_noise += - abs((s64)(walltime_nsecs[i] - walltime_nsecs_avg)); - runtime_cycles_noise += - abs((s64)(runtime_cycles[i] - runtime_cycles_avg)); - - for (j = 0; j < nr_counters; j++) { - event_res_noise[j][0] += - abs((s64)(event_res[i][j][0] - event_res_avg[j][0])); - event_res_noise[j][1] += - abs((s64)(event_res[i][j][1] - event_res_avg[j][1])); - event_res_noise[j][2] += - abs((s64)(event_res[i][j][2] - event_res_avg[j][2])); + update_stats("scaled", j, + event_scaled_stats + j, event_scaled[i]+j); } } - - normalize_noise(&runtime_nsecs_noise); - normalize_noise(&walltime_nsecs_noise); - normalize_noise(&runtime_cycles_noise); - - for (j = 0; j < nr_counters; j++) { - normalize_noise(&event_res_noise[j][0]); - normalize_noise(&event_res_noise[j][1]); - normalize_noise(&event_res_noise[j][2]); - } } static void print_stat(int argc, const char **argv) @@ -457,10 +424,11 @@ fprintf(stderr, "\n"); fprintf(stderr, " %14.9f seconds time elapsed", - (double)walltime_nsecs_avg/1e9); + avg_stats(&walltime_nsecs_stats)/1e9); if (run_count > 1) { fprintf(stderr, " ( +- %7.3f%% )", - 100.0*(double)walltime_nsecs_noise/(double)walltime_nsecs_avg); + 100*stddev_stats(&walltime_nsecs_stats) / + avg_stats(&walltime_nsecs_stats)); } fprintf(stderr, "\n\n"); } --- linux-fsl-imx51-2.6.31.orig/tools/perf/builtin-report.c +++ linux-fsl-imx51-2.6.31/tools/perf/builtin-report.c @@ -1857,8 +1857,8 @@ exit(-1); } - if (!force && (stat.st_uid != geteuid())) { - fprintf(stderr, "file: %s not owned by current user\n", input_name); + if (!force && stat.st_uid && (stat.st_uid != geteuid())) { + fprintf(stderr, "file: %s not owned by current user or root\n", input_name); exit(-1); } --- linux-fsl-imx51-2.6.31.orig/tools/perf/util/module.c +++ linux-fsl-imx51-2.6.31/tools/perf/util/module.c @@ -422,7 +422,7 @@ len += strlen(uts.release); len += strlen("/modules.dep"); - path = calloc(1, len); + path = calloc(1, len + 1); if (path == NULL) goto out_failure; --- linux-fsl-imx51-2.6.31.orig/tools/perf/util/config.c +++ linux-fsl-imx51-2.6.31/tools/perf/util/config.c @@ -415,7 +415,6 @@ int perf_config(config_fn_t fn, void *data) { int ret = 0, found = 0; - char *repo_config = NULL; const char *home = NULL; /* Setting $PERF_CONFIG makes perf read _only_ the given config file. */ @@ -437,12 +436,6 @@ free(user_config); } - repo_config = perf_pathdup("config"); - if (!access(repo_config, R_OK)) { - ret += perf_config_from_file(fn, repo_config, data); - found += 1; - } - free(repo_config); if (found == 0) return -1; return ret; --- linux-fsl-imx51-2.6.31.orig/ubuntu/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/Kconfig @@ -0,0 +1,16 @@ +menu "Ubuntu Supplied Third-Party Device Drivers" + +source "ubuntu/apparmor/Kconfig" + +source "ubuntu/drbd/Kconfig" +source "ubuntu/iscsitarget/Kconfig" +source "ubuntu/aufs/Kconfig" +source "ubuntu/dm-raid4-5/Kconfig" +source "ubuntu/ndiswrapper/Kconfig" +source "ubuntu/compcache/Kconfig" +source "ubuntu/lirc/Kconfig" +source "ubuntu/misc/Kconfig" +source "ubuntu/rfkill/Kconfig" +source "ubuntu/lenovo-sl-laptop/Kconfig" + +endmenu --- linux-fsl-imx51-2.6.31.orig/ubuntu/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/Makefile @@ -0,0 +1,19 @@ +# +# Makefile for the Linux kernel ubuntu supplied third-party device drivers. +# + +obj-$(CONFIG_SECURITY_APPARMOR) += apparmor/ + +obj-$(CONFIG_BLK_DEV_DRBD) += drbd/ +obj-$(CONFIG_SCSI_ISCSITARGET) += iscsitarget/ +obj-$(CONFIG_AUFS_FS) += aufs/ +obj-$(CONFIG_DM_RAID45) += dm-raid4-5/ +obj-$(CONFIG_NDISWRAPPER) += ndiswrapper/ +obj-$(CONFIG_BLK_DEV_COMPCACHE) += compcache/ +obj-$(CONFIG_LIRC_DEV) += lirc/ +obj-$(CONFIG_LENOVO_SL_LAPTOP) += lenovo-sl-laptop/ + +obj-m += misc/ rfkill/ + +# This is a stupid trick to get kbuild to create ubuntu/built-in.o +obj- += foo.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/LIST +++ linux-fsl-imx51-2.6.31/ubuntu/LIST @@ -0,0 +1,50 @@ +AUFS_BDEV_LOOP +AUFS_BRANCH_MAX_1023 +AUFS_BRANCH_MAX_127 +AUFS_BRANCH_MAX_32767 +AUFS_BRANCH_MAX_511 +AUFS_BR_FUSE +AUFS_BR_RAMFS +AUFS_DEBUG +AUFS_EXPORT +AUFS_FS +AUFS_HINOTIFY +AUFS_INO_T_64 +AUFS_MAGIC_SYSRQ +AUFS_POLL +AUFS_SHWH +AVERATEC_5100P +BLK_DEV_COMPCACHE +BLK_DEV_COMPCACHE_DEBUG +BLK_DEV_COMPCACHE_STATS +BLK_DEV_DRBD +DM_RAID45 +FSAM7400 +LENOVO_SL_LAPTOP +LIRC_ATIUSB +LIRC_BT829 +LIRC_ENE0100 +LIRC_CONFIG_LIRC_WPC8769L +LIRC_DEV +LIRC_GPIO +LIRC_I2C +LIRC_IGORPLUGUSB +LIRC_IMON +LIRC_IT87 +LIRC_ITE8709 +LIRC_MCEUSB +LIRC_PARALLEL +LIRC_SASEM +LIRC_SERIAL +LIRC_SIR +LIRC_STREAMZAP +LIRC_TTUSBIR +LMPCM_USB +NDISWRAPPER +PACKARDBELL_E5 +SCSI_ISCSITARGET +SECURITY_APPARMOR +SECURITY_APPARMOR_BOOTPARAM_VALUE +SECURITY_APPARMOR_DISABLE +SECURITY_APPARMOR_NETWORK +TLSUP --- linux-fsl-imx51-2.6.31.orig/ubuntu/misc/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/misc/Kconfig @@ -0,0 +1,4 @@ +config FSAM7400 + tristate "SW RF kill switch for Fujitsu Siemens Amilo M 7400" + default m + select CHECK_SIGNATURE --- linux-fsl-imx51-2.6.31.orig/ubuntu/misc/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/misc/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for Ubuntu additional drivers +# + +obj-$(CONFIG_FSAM7400) += fsam7400.o + --- linux-fsl-imx51-2.6.31.orig/ubuntu/misc/fsam7400.c +++ linux-fsl-imx51-2.6.31/ubuntu/misc/fsam7400.c @@ -0,0 +1,373 @@ +/******************************************************************************* + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., 59 + Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + The full GNU General Public License is included in this distribution in the + file called LICENSE. + + Author: + Marcel Naziri + + Based on: + pbe5.c by Pedro Ramalhais + + Many thanks to: + Pedro Ramalhais for spending several nights with me on IRC disassembling + the structure of the windows driver files... :) + +*******************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "fsam7400" +#define DRV_VERSION "0.4.0" +#define DRV_DESCRIPTION "SW RF kill switch for Fujitsu Siemens Amilo M 7400" +#define DRV_COPYRIGHT "Copyright(c) 2004 zwobbl ;)" +#define DRV_AUTHOR "Marcel Naziri" +#define DRV_LICENSE "GPL" + +MODULE_DESCRIPTION(DRV_DESCRIPTION); +MODULE_AUTHOR(DRV_AUTHOR); +MODULE_LICENSE(DRV_LICENSE); + +#define RADIO_NONE 0xFFFFFFFF +#define RADIO_OFF 0x00000000 +#define RADIO_ON 0x00000010 + +static int radio = RADIO_NONE; +module_param(radio, uint, 0400); +MODULE_PARM_DESC(radio, "desired radio state when loading module"); + +static int autooff = 1; +module_param(autooff, uint, 0400); +MODULE_PARM_DESC(autooff, "turns radio off when unloading module " + "(default)"); + +static int uid = 0; +module_param(uid, uint, 0400); +MODULE_PARM_DESC(uid, "user ID for proc entry"); + +static int gid = 0; +module_param(gid, uint, 0400); +MODULE_PARM_DESC(gid, "group ID for proc entry"); + +/* some more or less useful macros */ +#ifdef CONFIG_IPW2100_DEBUG +#define DEBUG_OUT0(a) printk(KERN_INFO DRV_NAME ": " a) +#define DEBUG_OUT1(a,b) printk(KERN_INFO DRV_NAME ": " a,b) +#define DEBUG_OUT2(a,b,c) printk(KERN_INFO DRV_NAME ": " a,b,c) +#define DEBUG_OUT3(a,b,c,d) printk(KERN_INFO DRV_NAME ": " a,b,c,d) +#else +#define DEBUG_OUT0(a) +#define DEBUG_OUT1(a,b) +#define DEBUG_OUT2(a,b,c) +#define DEBUG_OUT3(a,b,c,d) +#endif + +#define ONOFF(x) (x) ? "ON" : "OFF" +#define RADIO_ONOFF(x) (x) == RADIO_ON ? "ON" : "OFF" +#define TOUL(x) (unsigned long) (x) + +/* + * NOTE: These values were obtained from disassembling the wbutton.sys driver + * installed in the Fujitsu Siemens Amilo M 7400 laptop. The names were guessed, + * so don't rely on them. + */ + +/*** hardware dependant stuff ***/ + +#define BIOS_CODE_ADDR 0x000F0000 +#define BIOS_CODE_ALT_MASK 0xFFFFC000 + +#define BIOS_CODE_MAPSIZE 0x010000 +#define BIOS_CODE_ALT_MAPSIZE 0x004000 + +#define BIOS_MAGIC_COMMAND 0x9610 +#define BIOS_MAGIC_OFF 0x0035 +#define BIOS_MAGIC_ON 0x0135 +#define BIOS_MAGIC_CHECK 0x0235 + +#define PTR_POSITION 5 +#define ALLIGNED_STEP 0x10 + +#define BIOS_SIGN_SIZE 4 +static const char bios_sign[] = { + 0x42, 0x21, 0x55, 0x30 +}; + +#define WLAN_DISABLED_IN_BIOS 0x01 +#define WLAN_ENABLED_IN_BIOS 0x03 + +static unsigned long bios_code = 0; + +static int fsam_bios_routine(int eax, int ebx) +{ + __asm__ __volatile__( + "call *%3 \t\n" + : "=a"(eax) + : "a"(eax), "b"(ebx), "c"(bios_code) + ); + return (eax & 0xFF); +} + +static int fsam_call_bios(int value) +{ + if (bios_code) { + int command = BIOS_MAGIC_COMMAND; + + DEBUG_OUT2("bios routine gets parameter eax=%X and ebx=%X\n", + command, value); + + value = fsam_bios_routine(command, value); + + DEBUG_OUT1("bios routine results %X\n", value); + return value; + } + return ~0; +} + +/* pointer to mapped memory*/ +static void *mem_code = NULL; + +static inline void fsam_unmap_memory(void) +{ + bios_code = 0; + if (mem_code) { + iounmap(mem_code); + } +} + +static inline int fsam_map_memory(void) +{ + const unsigned long max_offset = BIOS_CODE_MAPSIZE - BIOS_SIGN_SIZE - PTR_POSITION; + unsigned long offset; + unsigned int addr; + + mem_code = ioremap(BIOS_CODE_ADDR, BIOS_CODE_MAPSIZE); + if (!mem_code) + goto fail; + + DEBUG_OUT3("physical memory %x-%x mapped to virtual address %p\n", + BIOS_CODE_ADDR, BIOS_CODE_ADDR+BIOS_CODE_MAPSIZE, mem_code); + + for ( offset = 0; offset < max_offset; offset += ALLIGNED_STEP ) + if (check_signature(mem_code + offset, bios_sign, BIOS_SIGN_SIZE)) + break; + + if (offset >= max_offset) + goto fail; + + DEBUG_OUT1("bios signature found at offset %lx\n", offset); + + addr = readl(mem_code + offset + PTR_POSITION); + + if (addr < BIOS_CODE_ADDR) + { + DEBUG_OUT0("bios routine out of memory range, " + "doing some new memory mapping...\n"); + iounmap(mem_code); + mem_code = NULL; + + addr &= BIOS_CODE_ALT_MASK; + + mem_code = ioremap(addr, BIOS_CODE_ALT_MAPSIZE); + if (!mem_code) + goto fail; + + DEBUG_OUT3("physical memory %x-%x mapped to virtual address %p\n", + addr, addr+BIOS_CODE_ALT_MAPSIZE, mem_code); + + addr &= 0x3FFF; + } + else + addr &= 0xFFFF; + + bios_code = addr + TOUL(mem_code); + DEBUG_OUT1("supposed address of bios routine is %lx\n", bios_code); + + return 1; + + fail: + fsam_unmap_memory(); + return 0; +} + +/*** interface stuff ***/ + +static void rfkill_set_radio(int value) +{ + radio = value == RADIO_ON ? fsam_call_bios(BIOS_MAGIC_ON) : + fsam_call_bios(BIOS_MAGIC_OFF); +} + +static inline int rfkill_get_radio(void) +{ + return radio; +} + +static inline int rfkill_supported(void) +{ + return bios_code != 0; +} + +static inline void rfkill_initialize(void) { + fsam_map_memory(); + + if (rfkill_supported()) { + radio = radio != RADIO_NONE + ? ( radio ? RADIO_ON : RADIO_OFF ) /*module parameter*/ + : ( fsam_call_bios(BIOS_MAGIC_CHECK) == WLAN_ENABLED_IN_BIOS + ? RADIO_ON : RADIO_OFF ); + } +} + +static inline void rfkill_uninitialize(void) { + fsam_unmap_memory(); +} + +/*** proc stuff ***/ + +static inline int common_proc_set_radio(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + unsigned long len = 4; + char newstate[len]; + + len = count < len ? count : len; + + if ( copy_from_user(newstate, buffer, len) != 0 ) + return -EFAULT; + + if ( (*newstate == '1' || *newstate == '0') && + (count == 1 || isspace(newstate[1])) ) + rfkill_set_radio(*newstate == '1' ? RADIO_ON : RADIO_OFF); + else + if ( !strncmp(newstate, "on", 2) && + (count == 2 || isspace(newstate[2])) ) + rfkill_set_radio(RADIO_ON); + else + if ( !strncmp(newstate, "off", 3) && + (count == 3 || isspace(newstate[3])) ) + rfkill_set_radio(RADIO_OFF); + + return count; +} + +static inline int common_proc_get_radio(char *page, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = snprintf(page, count, DRV_DESCRIPTION ", v" DRV_VERSION "\n" + " auto-off is %s\n", + ONOFF(autooff)); + len += snprintf(page+len, count-len, " radio state is %s\n", + RADIO_ONOFF(rfkill_get_radio())); + *eof = 1; + + return len; +} + +#define PROC_DIR "driver/wireless" +#define PROC_RADIO "radio" + +static struct proc_dir_entry *dir_base = NULL; + +static inline void common_proc_cleanup(void) +{ + if (dir_base) { + remove_proc_entry(PROC_RADIO, dir_base); + remove_proc_entry(PROC_DIR, NULL); + dir_base = NULL; + } +} + +static inline int common_proc_init(void) +{ + struct proc_dir_entry *ent; + int err = 0; + + dir_base = proc_mkdir(PROC_DIR, NULL); + if (dir_base == NULL) { + printk(KERN_ERR DRV_NAME ": Unable to initialize /proc/" PROC_DIR "\n"); + err = -ENOMEM; + goto fail; + } + + ent = create_proc_entry(PROC_RADIO, + S_IFREG | S_IRUGO | S_IWUSR | S_IWGRP, + dir_base); + ent->uid = uid; + ent->gid = gid; + if (ent) { + ent->read_proc = common_proc_get_radio; + ent->write_proc = common_proc_set_radio; + } else { + printk(KERN_ERR DRV_NAME ": Unable to initialize /proc/" + PROC_DIR "/" PROC_RADIO "\n"); + err = -ENOMEM; + goto fail; + } + return 0; + + fail: + common_proc_cleanup(); + return err; +} + +/*** module stuff ***/ + +static int __init common_init(void) +{ + printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", v" DRV_VERSION "\n"); + printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); + + rfkill_initialize(); + + if (rfkill_supported()) { + common_proc_init(); + if (radio != RADIO_NONE) + rfkill_set_radio(radio); + } else + printk(KERN_INFO DRV_NAME ": no supported wireless hardware found\n"); + + return 0; +} + +static void __exit common_exit(void) +{ + if (rfkill_supported() && autooff) + rfkill_set_radio(RADIO_OFF); + + common_proc_cleanup(); + rfkill_uninitialize(); + + printk(KERN_INFO DRV_NAME ": module removed successfully\n"); +} + +module_init(common_init); +module_exit(common_exit); + +/* + 1 2 3 4 5 6 7 +12345678901234567890123456789012345678901234567890123456789012345678901234567890 +*/ --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_bitmap.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_bitmap.c @@ -0,0 +1,1268 @@ +/* + drbd_bitmap.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2004-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2004-2008, Philipp Reisner . + Copyright (C) 2004-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include "drbd_int.h" + +/* OPAQUE outside this file! + * interface defined in drbd_int.h + + * convetion: + * function name drbd_bm_... => used elsewhere, "public". + * function name bm_... => internal to implementation, "private". + + * Note that since find_first_bit returns int, at the current granularity of + * the bitmap (4KB per byte), this implementation "only" supports up to + * 1<<(32+12) == 16 TB... + */ + +/* + * NOTE + * Access to the *bm_pages is protected by bm_lock. + * It is safe to read the other members within the lock. + * + * drbd_bm_set_bits is called from bio_endio callbacks, + * We may be called with irq already disabled, + * so we need spin_lock_irqsave(). + * And we need the kmap_atomic. + */ +struct drbd_bitmap { + struct page **bm_pages; + spinlock_t bm_lock; + /* WARNING unsigned long bm_*: + * 32bit number of bit offset is just enough for 512 MB bitmap. + * it will blow up if we make the bitmap bigger... + * not that it makes much sense to have a bitmap that large, + * rather change the granularity to 16k or 64k or something. + * (that implies other problems, however...) + */ + unsigned long bm_set; /* nr of set bits; THINK maybe atomic_t? */ + unsigned long bm_bits; + size_t bm_words; + size_t bm_number_of_pages; + sector_t bm_dev_capacity; + struct semaphore bm_change; /* serializes resize operations */ + + atomic_t bm_async_io; + wait_queue_head_t bm_io_wait; + + unsigned long bm_flags; + + /* debugging aid, in case we are still racy somewhere */ + char *bm_why; + struct task_struct *bm_task; +}; + +/* definition of bits in bm_flags */ +#define BM_LOCKED 0 +#define BM_MD_IO_ERROR 1 + +static inline int bm_is_locked(struct drbd_bitmap *b) +{ + return test_bit(BM_LOCKED, &b->bm_flags); +} + +#define bm_print_lock_info(m) __bm_print_lock_info(m, __func__) +static void __bm_print_lock_info(struct drbd_conf *mdev, const char *func) +{ + struct drbd_bitmap *b = mdev->bitmap; + if (!__ratelimit(&drbd_ratelimit_state)) + return; + ERR("FIXME %s in %s, bitmap locked for '%s' by %s\n", + current == mdev->receiver.task ? "receiver" : + current == mdev->asender.task ? "asender" : + current == mdev->worker.task ? "worker" : current->comm, + func, b->bm_why ?: "?", + b->bm_task == mdev->receiver.task ? "receiver" : + b->bm_task == mdev->asender.task ? "asender" : + b->bm_task == mdev->worker.task ? "worker" : "?"); +} + +void drbd_bm_lock(struct drbd_conf *mdev, char *why) +{ + struct drbd_bitmap *b = mdev->bitmap; + int trylock_failed; + + if (!b) { + ERR("FIXME no bitmap in drbd_bm_lock!?\n"); + return; + } + + trylock_failed = down_trylock(&b->bm_change); + + if (trylock_failed) { + DBG("%s going to '%s' but bitmap already locked for '%s' by %s\n", + current == mdev->receiver.task ? "receiver" : + current == mdev->asender.task ? "asender" : + current == mdev->worker.task ? "worker" : "?", + why, b->bm_why ?: "?", + b->bm_task == mdev->receiver.task ? "receiver" : + b->bm_task == mdev->asender.task ? "asender" : + b->bm_task == mdev->worker.task ? "worker" : "?"); + down(&b->bm_change); + } + if (__test_and_set_bit(BM_LOCKED, &b->bm_flags)) + ERR("FIXME bitmap already locked in bm_lock\n"); + + b->bm_why = why; + b->bm_task = current; +} + +void drbd_bm_unlock(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + if (!b) { + ERR("FIXME no bitmap in drbd_bm_unlock!?\n"); + return; + } + + if (!__test_and_clear_bit(BM_LOCKED, &mdev->bitmap->bm_flags)) + ERR("FIXME bitmap not locked in bm_unlock\n"); + + b->bm_why = NULL; + b->bm_task = NULL; + up(&b->bm_change); +} + +/* word offset to long pointer */ +STATIC unsigned long *__bm_map_paddr(struct drbd_bitmap *b, unsigned long offset, const enum km_type km) +{ + struct page *page; + unsigned long page_nr; + + /* page_nr = (word*sizeof(long)) >> PAGE_SHIFT; */ + page_nr = offset >> (PAGE_SHIFT - LN2_BPL + 3); + BUG_ON(page_nr >= b->bm_number_of_pages); + page = b->bm_pages[page_nr]; + + return (unsigned long *) kmap_atomic(page, km); +} + +unsigned long * bm_map_paddr(struct drbd_bitmap *b, unsigned long offset) +{ + return __bm_map_paddr(b, offset, KM_IRQ1); +} + +void __bm_unmap(unsigned long *p_addr, const enum km_type km) +{ + kunmap_atomic(p_addr, km); +}; + +void bm_unmap(unsigned long *p_addr) +{ + return __bm_unmap(p_addr, KM_IRQ1); +} + +/* long word offset of _bitmap_ sector */ +#define S2W(s) ((s)<<(BM_EXT_SIZE_B-BM_BLOCK_SIZE_B-LN2_BPL)) +/* word offset from start of bitmap to word number _in_page_ + * modulo longs per page +#define MLPP(X) ((X) % (PAGE_SIZE/sizeof(long)) + hm, well, Philipp thinks gcc might not optimze the % into & (... - 1) + so do it explicitly: + */ +#define MLPP(X) ((X) & ((PAGE_SIZE/sizeof(long))-1)) + +/* Long words per page */ +#define LWPP (PAGE_SIZE/sizeof(long)) + +/* + * actually most functions herein should take a struct drbd_bitmap*, not a + * struct drbd_conf*, but for the debug macros I like to have the mdev around + * to be able to report device specific. + */ + +STATIC void bm_free_pages(struct page **pages, unsigned long number) +{ + unsigned long i; + if (!pages) + return; + + for (i = 0; i < number; i++) { + if (!pages[i]) { + printk(KERN_ALERT "drbd: bm_free_pages tried to free " + "a NULL pointer; i=%lu n=%lu\n", + i, number); + continue; + } + __free_page(pages[i]); + pages[i] = NULL; + } +} + +/* + * "have" and "want" are NUMBER OF PAGES. + */ +STATIC struct page **bm_realloc_pages(struct page **old_pages, + unsigned long have, + unsigned long want) +{ + struct page **new_pages, *page; + unsigned int i, bytes; + + BUG_ON(have == 0 && old_pages != NULL); + BUG_ON(have != 0 && old_pages == NULL); + + if (have == want) + return old_pages; + + /* To use kmalloc here is ok, as long as we support 4TB at max... + * otherwise this might become bigger than 128KB, which is + * the maximum for kmalloc. + * + * no, it is not: on 64bit boxes, sizeof(void*) == 8, + * 128MB bitmap @ 4K pages -> 256K of page pointers. + * ==> use vmalloc for now again. + * then again, we could do something like + * if (nr_pages > watermark) vmalloc else kmalloc :*> ... + * or do cascading page arrays: + * one page for the page array of the page array, + * those pages for the real bitmap pages. + * there we could even add some optimization members, + * so we won't need to kmap_atomic in bm_find_next_bit just to see + * that the page has no bits set ... + * or we can try a "huge" page ;-) + */ + bytes = sizeof(struct page *)*want; + new_pages = vmalloc(bytes); + if (!new_pages) + return NULL; + + memset(new_pages, 0, bytes); + if (want >= have) { + for (i = 0; i < have; i++) + new_pages[i] = old_pages[i]; + for (; i < want; i++) { + page = alloc_page(GFP_HIGHUSER); + if (!page) { + bm_free_pages(new_pages + have, i - have); + vfree(new_pages); + return NULL; + } + new_pages[i] = page; + } + } else { + for (i = 0; i < want; i++) + new_pages[i] = old_pages[i]; + /* NOT HERE, we are outside the spinlock! + bm_free_pages(old_pages + want, have - want); + */ + } + + return new_pages; +} + +/* + * called on driver init only. TODO call when a device is created. + * allocates the drbd_bitmap, and stores it in mdev->bitmap. + */ +int drbd_bm_init(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + WARN_ON(b != NULL); + b = kzalloc(sizeof(struct drbd_bitmap), GFP_KERNEL); + if (!b) + return -ENOMEM; + spin_lock_init(&b->bm_lock); + init_MUTEX(&b->bm_change); + init_waitqueue_head(&b->bm_io_wait); + + mdev->bitmap = b; + + return 0; +} + +sector_t drbd_bm_capacity(struct drbd_conf *mdev) +{ + ERR_IF(!mdev->bitmap) return 0; + return mdev->bitmap->bm_dev_capacity; +} + +/* called on driver unload. TODO: call when a device is destroyed. + */ +void drbd_bm_cleanup(struct drbd_conf *mdev) +{ + ERR_IF (!mdev->bitmap) return; + bm_free_pages(mdev->bitmap->bm_pages, mdev->bitmap->bm_number_of_pages); + vfree(mdev->bitmap->bm_pages); + kfree(mdev->bitmap); + mdev->bitmap = NULL; +} + +/* + * since (b->bm_bits % BITS_PER_LONG) != 0, + * this masks out the remaining bits. + * Rerturns the number of bits cleared. + */ +STATIC int bm_clear_surplus(struct drbd_bitmap *b) +{ + const unsigned long mask = (1UL << (b->bm_bits & (BITS_PER_LONG-1))) - 1; + size_t w = b->bm_bits >> LN2_BPL; + int cleared = 0; + unsigned long *p_addr, *bm; + + p_addr = bm_map_paddr(b, w); + bm = p_addr + MLPP(w); + if (w < b->bm_words) { + cleared = hweight_long(*bm & ~mask); + *bm &= mask; + w++; bm++; + } + + if (w < b->bm_words) { + cleared += hweight_long(*bm); + *bm = 0; + } + bm_unmap(p_addr); + return cleared; +} + +STATIC void bm_set_surplus(struct drbd_bitmap *b) +{ + const unsigned long mask = (1UL << (b->bm_bits & (BITS_PER_LONG-1))) - 1; + size_t w = b->bm_bits >> LN2_BPL; + unsigned long *p_addr, *bm; + + p_addr = bm_map_paddr(b, w); + bm = p_addr + MLPP(w); + if (w < b->bm_words) { + *bm |= ~mask; + bm++; w++; + } + + if (w < b->bm_words) { + *bm = ~(0UL); + } + bm_unmap(p_addr); +} + +STATIC unsigned long __bm_count_bits(struct drbd_bitmap *b, const int swap_endian) +{ + unsigned long *p_addr, *bm, offset = 0; + unsigned long bits = 0; + unsigned long i, do_now; + + while (offset < b->bm_words) { + i = do_now = min_t(size_t, b->bm_words-offset, LWPP); + p_addr = bm_map_paddr(b, offset); + bm = p_addr + MLPP(offset); + while (i--) { +#ifndef __LITTLE_ENDIAN + if (swap_endian) + *bm = lel_to_cpu(*bm); +#endif + bits += hweight_long(*bm++); + } + bm_unmap(p_addr); + offset += do_now; + } + + return bits; +} + +static inline unsigned long bm_count_bits(struct drbd_bitmap *b) +{ + return __bm_count_bits(b, 0); +} + +static inline unsigned long bm_count_bits_swap_endian(struct drbd_bitmap *b) +{ + return __bm_count_bits(b, 1); +} + +void _drbd_bm_recount_bits(struct drbd_conf *mdev, char *file, int line) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long flags, bits; + + ERR_IF(!b) return; + + /* IMO this should be inside drbd_bm_lock/unlock. + * Unfortunately it is used outside of the locks. + * And I'm not yet sure where we need to place the + * lock/unlock correctly. + */ + + spin_lock_irqsave(&b->bm_lock, flags); + bits = bm_count_bits(b); + if (bits != b->bm_set) { + ERR("bm_set was %lu, corrected to %lu. %s:%d\n", + b->bm_set, bits, file, line); + b->bm_set = bits; + } + spin_unlock_irqrestore(&b->bm_lock, flags); +} + +/* offset and len in long words.*/ +STATIC void bm_memset(struct drbd_bitmap *b, size_t offset, int c, size_t len) +{ + unsigned long *p_addr, *bm; + size_t do_now, end; + +#define BM_SECTORS_PER_BIT (BM_BLOCK_SIZE/512) + + end = offset + len; + + if (end > b->bm_words) { + printk(KERN_ALERT "drbd: bm_memset end > bm_words\n"); + return; + } + + while (offset < end) { + do_now = min_t(size_t, ALIGN(offset + 1, LWPP), end) - offset; + p_addr = bm_map_paddr(b, offset); + bm = p_addr + MLPP(offset); + if (bm+do_now > p_addr + LWPP) { + printk(KERN_ALERT "drbd: BUG BUG BUG! p_addr:%p bm:%p do_now:%d\n", + p_addr, bm, (int)do_now); + break; /* breaks to after catch_oob_access_end() only! */ + } + memset(bm, c, do_now * sizeof(long)); + bm_unmap(p_addr); + offset += do_now; + } +} + +/* + * make sure the bitmap has enough room for the attached storage, + * if neccessary, resize. + * called whenever we may have changed the device size. + * returns -ENOMEM if we could not allocate enough memory, 0 on success. + * In case this is actually a resize, we copy the old bitmap into the new one. + * Otherwise, the bitmap is initiallized to all bits set. + */ +int drbd_bm_resize(struct drbd_conf *mdev, sector_t capacity) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long bits, words, owords, obits, *p_addr, *bm; + unsigned long want, have, onpages; /* number of pages */ + struct page **npages, **opages = NULL; + int err = 0, growing; + + ERR_IF(!b) return -ENOMEM; + + drbd_bm_lock(mdev, "resize"); + + INFO("drbd_bm_resize called with capacity == %llu\n", + (unsigned long long)capacity); + + if (capacity == b->bm_dev_capacity) + goto out; + + if (capacity == 0) { + spin_lock_irq(&b->bm_lock); + opages = b->bm_pages; + onpages = b->bm_number_of_pages; + owords = b->bm_words; + b->bm_pages = NULL; + b->bm_number_of_pages = + b->bm_set = + b->bm_bits = + b->bm_words = + b->bm_dev_capacity = 0; + spin_unlock_irq(&b->bm_lock); + bm_free_pages(opages, onpages); + vfree(opages); + goto out; + } + bits = BM_SECT_TO_BIT(ALIGN(capacity, BM_SECT_PER_BIT)); + + /* if we would use + words = ALIGN(bits,BITS_PER_LONG) >> LN2_BPL; + a 32bit host could present the wrong number of words + to a 64bit host. + */ + words = ALIGN(bits, 64) >> LN2_BPL; + + if (inc_local(mdev)) { + D_ASSERT((u64)bits <= (((u64)mdev->bc->md.md_size_sect-MD_BM_OFFSET) << 12)); + dec_local(mdev); + } + + /* one extra long to catch off by one errors */ + want = ALIGN((words+1)*sizeof(long), PAGE_SIZE) >> PAGE_SHIFT; + have = b->bm_number_of_pages; + if (want == have) { + D_ASSERT(b->bm_pages != NULL); + npages = b->bm_pages; + } else { + if (FAULT_ACTIVE(mdev, DRBD_FAULT_BM_ALLOC)) + npages = NULL; + else + npages = bm_realloc_pages(b->bm_pages, have, want); + } + + if (!npages) { + err = -ENOMEM; + goto out; + } + + spin_lock_irq(&b->bm_lock); + opages = b->bm_pages; + owords = b->bm_words; + obits = b->bm_bits; + + growing = bits > obits; + if (opages) + bm_set_surplus(b); + + b->bm_pages = npages; + b->bm_number_of_pages = want; + b->bm_bits = bits; + b->bm_words = words; + b->bm_dev_capacity = capacity; + + if (growing) { + bm_memset(b, owords, 0xff, words-owords); + b->bm_set += bits - obits; + } + + if (want < have) { + /* implicit: (opages != NULL) && (opages != npages) */ + bm_free_pages(opages + want, have - want); + } + + p_addr = bm_map_paddr(b, words); + bm = p_addr + MLPP(words); + *bm = DRBD_MAGIC; + bm_unmap(p_addr); + + (void)bm_clear_surplus(b); + if (!growing) + b->bm_set = bm_count_bits(b); + + spin_unlock_irq(&b->bm_lock); + if (opages != npages) + vfree(opages); + INFO("resync bitmap: bits=%lu words=%lu\n", bits, words); + + out: + drbd_bm_unlock(mdev); + return err; +} + +/* inherently racy: + * if not protected by other means, return value may be out of date when + * leaving this function... + * we still need to lock it, since it is important that this returns + * bm_set == 0 precisely. + * + * maybe bm_set should be atomic_t ? + */ +unsigned long drbd_bm_total_weight(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long s; + unsigned long flags; + + /* if I don't have a disk, I don't know about out-of-sync status */ + if (!inc_local_if_state(mdev, Negotiating)) + return 0; + + ERR_IF(!b) return 0; + ERR_IF(!b->bm_pages) return 0; + + spin_lock_irqsave(&b->bm_lock, flags); + s = b->bm_set; + spin_unlock_irqrestore(&b->bm_lock, flags); + + dec_local(mdev); + + return s; +} + +size_t drbd_bm_words(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + ERR_IF(!b) return 0; + ERR_IF(!b->bm_pages) return 0; + + return b->bm_words; +} + +unsigned long drbd_bm_bits(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + ERR_IF(!b) return 0; + + return b->bm_bits; +} + +/* merge number words from buffer into the bitmap starting at offset. + * buffer[i] is expected to be little endian unsigned long. + * bitmap must be locked by drbd_bm_lock. + * currently only used from receive_bitmap. + */ +void drbd_bm_merge_lel(struct drbd_conf *mdev, size_t offset, size_t number, + unsigned long *buffer) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr, *bm; + unsigned long word, bits; + size_t end, do_now; + + end = offset + number; + + ERR_IF(!b) return; + ERR_IF(!b->bm_pages) return; + if (number == 0) + return; + WARN_ON(offset >= b->bm_words); + WARN_ON(end > b->bm_words); + + spin_lock_irq(&b->bm_lock); + while (offset < end) { + do_now = min_t(size_t, ALIGN(offset+1, LWPP), end) - offset; + p_addr = bm_map_paddr(b, offset); + bm = p_addr + MLPP(offset); + offset += do_now; + while (do_now--) { + bits = hweight_long(*bm); + word = *bm | lel_to_cpu(*buffer++); + *bm++ = word; + b->bm_set += hweight_long(word) - bits; + } + bm_unmap(p_addr); + } + /* with 32bit <-> 64bit cross-platform connect + * this is only correct for current usage, + * where we _know_ that we are 64 bit aligned, + * and know that this function is used in this way, too... + */ + if (end == b->bm_words) + b->bm_set -= bm_clear_surplus(b); + + spin_unlock_irq(&b->bm_lock); +} + +/* copy number words from the bitmap starting at offset into the buffer. + * buffer[i] will be little endian unsigned long. + */ +void drbd_bm_get_lel(struct drbd_conf *mdev, size_t offset, size_t number, + unsigned long *buffer) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr, *bm; + size_t end, do_now; + + end = offset + number; + + ERR_IF(!b) return; + ERR_IF(!b->bm_pages) return; + + spin_lock_irq(&b->bm_lock); + if ((offset >= b->bm_words) || + (end > b->bm_words) || + (number <= 0)) + ERR("offset=%lu number=%lu bm_words=%lu\n", + (unsigned long) offset, + (unsigned long) number, + (unsigned long) b->bm_words); + else { + while (offset < end) { + do_now = min_t(size_t, ALIGN(offset+1, LWPP), end) - offset; + p_addr = bm_map_paddr(b, offset); + bm = p_addr + MLPP(offset); + offset += do_now; + while (do_now--) + *buffer++ = cpu_to_lel(*bm++); + bm_unmap(p_addr); + } + } + spin_unlock_irq(&b->bm_lock); +} + +/* set all bits in the bitmap */ +void drbd_bm_set_all(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + ERR_IF(!b) return; + ERR_IF(!b->bm_pages) return; + + spin_lock_irq(&b->bm_lock); + bm_memset(b, 0, 0xff, b->bm_words); + (void)bm_clear_surplus(b); + b->bm_set = b->bm_bits; + spin_unlock_irq(&b->bm_lock); +} + +/* clear all bits in the bitmap */ +void drbd_bm_clear_all(struct drbd_conf *mdev) +{ + struct drbd_bitmap *b = mdev->bitmap; + ERR_IF(!b) return; + ERR_IF(!b->bm_pages) return; + + spin_lock_irq(&b->bm_lock); + bm_memset(b, 0, 0, b->bm_words); + b->bm_set = 0; + spin_unlock_irq(&b->bm_lock); +} + +static void bm_async_io_complete(struct bio *bio, int error) +{ + struct drbd_bitmap *b = bio->bi_private; + int uptodate = bio_flagged(bio, BIO_UPTODATE); + + + /* strange behaviour of some lower level drivers... + * fail the request by clearing the uptodate flag, + * but do not return any error?! + * do we want to WARN() on this? */ + if (!error && !uptodate) + error = -EIO; + + if (error) { + /* doh. what now? + * for now, set all bits, and flag MD_IO_ERROR */ + __set_bit(BM_MD_IO_ERROR, &b->bm_flags); + } + if (atomic_dec_and_test(&b->bm_async_io)) + wake_up(&b->bm_io_wait); + + bio_put(bio); +} + +STATIC void bm_page_io_async(struct drbd_conf *mdev, struct drbd_bitmap *b, int page_nr, int rw) __must_hold(local) +{ + /* we are process context. we always get a bio */ + struct bio *bio = bio_alloc(GFP_KERNEL, 1); + unsigned int len; + sector_t on_disk_sector = + mdev->bc->md.md_offset + mdev->bc->md.bm_offset; + on_disk_sector += ((sector_t)page_nr) << (PAGE_SHIFT-9); + + /* this might happen with very small + * flexible external meta data device */ + len = min_t(unsigned int, PAGE_SIZE, + (drbd_md_last_sector(mdev->bc) - on_disk_sector + 1)<<9); + + bio->bi_bdev = mdev->bc->md_bdev; + bio->bi_sector = on_disk_sector; + bio_add_page(bio, b->bm_pages[page_nr], len, 0); + bio->bi_private = b; + bio->bi_end_io = bm_async_io_complete; + + if (FAULT_ACTIVE(mdev, (rw & WRITE) ? DRBD_FAULT_MD_WR : DRBD_FAULT_MD_RD)) { + bio->bi_rw |= rw; + bio_endio(bio, -EIO); + } else { + submit_bio(rw, bio); + } +} + +# if defined(__LITTLE_ENDIAN) + /* nothing to do, on disk == in memory */ +# define bm_cpu_to_lel(x) ((void)0) +# else +void bm_cpu_to_lel(struct drbd_bitmap *b) +{ + /* need to cpu_to_lel all the pages ... + * this may be optimized by using + * cpu_to_lel(-1) == -1 and cpu_to_lel(0) == 0; + * the following is still not optimal, but better than nothing */ + if (b->bm_set == 0) { + /* no page at all; avoid swap if all is 0 */ + i = b->bm_number_of_pages; + } else if (b->bm_set == b->bm_bits) { + /* only the last page */ + i = b->bm_number_of_pages - 1; + } else { + /* all pages */ + i = 0; + } + for (; i < b->bm_number_of_pages; i++) { + unsigned long *bm; + /* if you'd want to use kmap_atomic, you'd have to disable irq! */ + p_addr = kmap(b->bm_pages[i]); + for (bm = p_addr; bm < p_addr + PAGE_SIZE/sizeof(long); bm++) + *bm = cpu_to_lel(*bm); + kunmap(p_addr); + } +} +# endif +/* lel_to_cpu == cpu_to_lel */ +# define bm_lel_to_cpu(x) bm_cpu_to_lel(x) + +/* + * bm_rw: read/write the whole bitmap from/to its on disk location. + */ +STATIC int bm_rw(struct drbd_conf *mdev, int rw) __must_hold(local) +{ + struct drbd_bitmap *b = mdev->bitmap; + /* sector_t sector; */ + int bm_words, num_pages, i; + unsigned long now; + char ppb[10]; + int err = 0; + + WARN_ON(!bm_is_locked(b)); + + /* no spinlock here, the drbd_bm_lock should be enough! */ + + bm_words = drbd_bm_words(mdev); + num_pages = (bm_words*sizeof(long) + PAGE_SIZE-1) >> PAGE_SHIFT; + + /* on disk bitmap is little endian */ + if (rw == WRITE) + bm_cpu_to_lel(b); + + now = jiffies; + atomic_set(&b->bm_async_io, num_pages); + __clear_bit(BM_MD_IO_ERROR, &b->bm_flags); + + /* let the layers below us try to merge these bios... */ + for (i = 0; i < num_pages; i++) + bm_page_io_async(mdev, b, i, rw); + + drbd_blk_run_queue(bdev_get_queue(mdev->bc->md_bdev)); + wait_event(b->bm_io_wait, atomic_read(&b->bm_async_io) == 0); + + MTRACE(TraceTypeMDIO, TraceLvlSummary, + INFO("%s of bitmap took %lu jiffies\n", + rw == READ ? "reading" : "writing", jiffies - now); + ); + + if (test_bit(BM_MD_IO_ERROR, &b->bm_flags)) { + ALERT("we had at least one MD IO ERROR during bitmap IO\n"); + drbd_chk_io_error(mdev, 1, TRUE); + drbd_io_error(mdev, TRUE); + err = -EIO; + } + + now = jiffies; + if (rw == WRITE) { + /* swap back endianness */ + bm_lel_to_cpu(b); + /* flush bitmap to stable storage */ + drbd_md_flush(mdev); + } else /* rw == READ */ { + /* just read, if neccessary adjust endianness */ + b->bm_set = bm_count_bits_swap_endian(b); + INFO("recounting of set bits took additional %lu jiffies\n", + jiffies - now); + } + now = b->bm_set; + + INFO("%s (%lu bits) marked out-of-sync by on disk bit-map.\n", + ppsize(ppb, now << (BM_BLOCK_SIZE_B-10)), now); + + return err; +} + +/** + * drbd_bm_read: Read the whole bitmap from its on disk location. + * + * currently only called from "drbd_nl_disk_conf" + */ +int drbd_bm_read(struct drbd_conf *mdev) __must_hold(local) +{ + return bm_rw(mdev, READ); +} + +/** + * drbd_bm_write: Write the whole bitmap to its on disk location. + * + * called at various occasions. + */ +int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local) +{ + return bm_rw(mdev, WRITE); +} + +/** + * drbd_bm_write_sect: Writes a 512 byte piece of the bitmap to its + * on disk location. On disk bitmap is little endian. + * + * @enr: The _sector_ offset from the start of the bitmap. + * + */ +int drbd_bm_write_sect(struct drbd_conf *mdev, unsigned long enr) __must_hold(local) +{ + sector_t on_disk_sector = enr + mdev->bc->md.md_offset + + mdev->bc->md.bm_offset; + int bm_words, num_words, offset; + int err = 0; + + mutex_lock(&mdev->md_io_mutex); + bm_words = drbd_bm_words(mdev); + offset = S2W(enr); /* word offset into bitmap */ + num_words = min(S2W(1), bm_words - offset); + if (num_words < S2W(1)) + memset(page_address(mdev->md_io_page), 0, MD_HARDSECT); + drbd_bm_get_lel(mdev, offset, num_words, + page_address(mdev->md_io_page)); + if (!drbd_md_sync_page_io(mdev, mdev->bc, on_disk_sector, WRITE)) { + int i; + err = -EIO; + ERR("IO ERROR writing bitmap sector %lu " + "(meta-disk sector %llus)\n", + enr, (unsigned long long)on_disk_sector); + drbd_chk_io_error(mdev, 1, TRUE); + drbd_io_error(mdev, TRUE); + for (i = 0; i < AL_EXT_PER_BM_SECT; i++) + drbd_bm_ALe_set_all(mdev, enr*AL_EXT_PER_BM_SECT+i); + } + mdev->bm_writ_cnt++; + mutex_unlock(&mdev->md_io_mutex); + return err; +} + +/* NOTE + * find_first_bit returns int, we return unsigned long. + * should not make much difference anyways, but ... + * + * this returns a bit number, NOT a sector! + */ +#define BPP_MASK ((1UL << (PAGE_SHIFT+3)) - 1) +static unsigned long __bm_find_next(struct drbd_conf *mdev, unsigned long bm_fo, + const int find_zero_bit, const enum km_type km) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long i = -1UL; + unsigned long *p_addr; + unsigned long bit_offset; /* bit offset of the mapped page. */ + + if (bm_fo > b->bm_bits) { + ERR("bm_fo=%lu bm_bits=%lu\n", bm_fo, b->bm_bits); + } else { + while (bm_fo < b->bm_bits) { + unsigned long offset; + bit_offset = bm_fo & ~BPP_MASK; /* bit offset of the page */ + offset = bit_offset >> LN2_BPL; /* word offset of the page */ + p_addr = __bm_map_paddr(b, offset, km); + + if (find_zero_bit) + i = find_next_zero_bit(p_addr, PAGE_SIZE*8, bm_fo & BPP_MASK); + else + i = find_next_bit(p_addr, PAGE_SIZE*8, bm_fo & BPP_MASK); + + __bm_unmap(p_addr, km); + if (i < PAGE_SIZE*8) { + i = bit_offset + i; + if (i >= b->bm_bits) + break; + goto found; + } + bm_fo = bit_offset + PAGE_SIZE*8; + } + i = -1UL; + } + found: + return i; +} + +static unsigned long bm_find_next(struct drbd_conf *mdev, + unsigned long bm_fo, const int find_zero_bit) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long i = -1UL; + + ERR_IF(!b) return i; + ERR_IF(!b->bm_pages) return i; + + spin_lock_irq(&b->bm_lock); + if (bm_is_locked(b)) + bm_print_lock_info(mdev); + + i = __bm_find_next(mdev, bm_fo, find_zero_bit, KM_IRQ1); + + spin_unlock_irq(&b->bm_lock); + return i; +} + +unsigned long drbd_bm_find_next(struct drbd_conf *mdev, unsigned long bm_fo) +{ + return bm_find_next(mdev, bm_fo, 0); +} + +#if 0 +/* not yet needed for anything. */ +unsigned long drbd_bm_find_next_zero(struct drbd_conf *mdev, unsigned long bm_fo) +{ + return bm_find_next(mdev, bm_fo, 1); +} +#endif + +/* does not spin_lock_irqsave. + * you must take drbd_bm_lock() first */ +unsigned long _drbd_bm_find_next(struct drbd_conf *mdev, unsigned long bm_fo) +{ + /* WARN_ON(!bm_is_locked(mdev)); */ + return __bm_find_next(mdev, bm_fo, 0, KM_USER1); +} + +unsigned long _drbd_bm_find_next_zero(struct drbd_conf *mdev, unsigned long bm_fo) +{ + /* WARN_ON(!bm_is_locked(mdev)); */ + return __bm_find_next(mdev, bm_fo, 1, KM_USER1); +} + +/* returns number of bits actually changed. + * for val != 0, we change 0 -> 1, return code positiv + * for val == 0, we change 1 -> 0, return code negative + * wants bitnr, not sector. + * Must hold bitmap lock already. */ + +int __bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s, + const unsigned long e, int val, const enum km_type km) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr = NULL; + unsigned long bitnr; + unsigned long last_page_nr = -1UL; + int c = 0; + + for (bitnr = s; bitnr <= e; bitnr++) { + ERR_IF (bitnr >= b->bm_bits) { + ERR("bitnr=%lu bm_bits=%lu\n", bitnr, b->bm_bits); + } else { + unsigned long offset = bitnr>>LN2_BPL; + unsigned long page_nr = offset >> (PAGE_SHIFT - LN2_BPL + 3); + if (page_nr != last_page_nr) { + if (p_addr) + __bm_unmap(p_addr, km); + p_addr = __bm_map_paddr(b, offset, km); + last_page_nr = page_nr; + } + if (val) + c += (0 == __test_and_set_bit(bitnr & BPP_MASK, p_addr)); + else + c -= (0 != __test_and_clear_bit(bitnr & BPP_MASK, p_addr)); + } + } + if (p_addr) + __bm_unmap(p_addr, km); + b->bm_set += c; + return c; +} + +/* returns number of bits actually changed. + * for val != 0, we change 0 -> 1, return code positiv + * for val == 0, we change 1 -> 0, return code negative + * wants bitnr, not sector */ +int bm_change_bits_to(struct drbd_conf *mdev, const unsigned long s, + const unsigned long e, int val) +{ + unsigned long flags; + struct drbd_bitmap *b = mdev->bitmap; + int c = 0; + + ERR_IF(!b) return 1; + ERR_IF(!b->bm_pages) return 0; + + spin_lock_irqsave(&b->bm_lock, flags); + if (bm_is_locked(b)) + bm_print_lock_info(mdev); + + c = __bm_change_bits_to(mdev, s, e, val, KM_IRQ1); + + spin_unlock_irqrestore(&b->bm_lock, flags); + return c; +} + +/* returns number of bits changed 0 -> 1 */ +int drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsigned long e) +{ + return bm_change_bits_to(mdev, s, e, 1); +} + +/* returns number of bits changed 1 -> 0 */ +int drbd_bm_clear_bits(struct drbd_conf *mdev, const unsigned long s, const unsigned long e) +{ + return -bm_change_bits_to(mdev, s, e, 0); +} + +/* the same thing, but without taking the spin_lock_irqsave. + * you must first drbd_bm_lock(). */ +int _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsigned long e) +{ + /* WARN_ON(!bm_is_locked(b)); */ + return __bm_change_bits_to(mdev, s, e, 1, KM_USER0); +} + +/* returns bit state + * wants bitnr, NOT sector. + * inherently racy... area needs to be locked by means of {al,rs}_lru + * 1 ... bit set + * 0 ... bit not set + * -1 ... first out of bounds access, stop testing for bits! + */ +int drbd_bm_test_bit(struct drbd_conf *mdev, const unsigned long bitnr) +{ + unsigned long flags; + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr; + int i; + + ERR_IF(!b) return 0; + ERR_IF(!b->bm_pages) return 0; + + spin_lock_irqsave(&b->bm_lock, flags); + if (bm_is_locked(b)) + bm_print_lock_info(mdev); + if (bitnr < b->bm_bits) { + unsigned long offset = bitnr>>LN2_BPL; + p_addr = bm_map_paddr(b, offset); + i = test_bit(bitnr & BPP_MASK, p_addr) ? 1 : 0; + bm_unmap(p_addr); + } else if (bitnr == b->bm_bits) { + i = -1; + } else { /* (bitnr > b->bm_bits) */ + ERR("bitnr=%lu > bm_bits=%lu\n", bitnr, b->bm_bits); + i = 0; + } + + spin_unlock_irqrestore(&b->bm_lock, flags); + return i; +} + +/* returns number of bits set */ +int drbd_bm_count_bits(struct drbd_conf *mdev, const unsigned long s, const unsigned long e) +{ + unsigned long flags; + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr = NULL, page_nr = -1; + unsigned long bitnr; + int c = 0; + size_t w; + + /* If this is called without a bitmap, that is a bug. But just to be + * robust in case we screwed up elsewhere, in that case pretend there + * was one dirty bit in the requested area, so we won't try to do a + * local read there (no bitmap probably implies no disk) */ + ERR_IF(!b) return 1; + ERR_IF(!b->bm_pages) return 1; + + spin_lock_irqsave(&b->bm_lock, flags); + for (bitnr = s; bitnr <= e; bitnr++) { + w = bitnr >> LN2_BPL; + if (page_nr != w >> (PAGE_SHIFT - LN2_BPL + 3)) { + page_nr = w >> (PAGE_SHIFT - LN2_BPL + 3); + if (p_addr) + bm_unmap(p_addr); + p_addr = bm_map_paddr(b, w); + } + ERR_IF (bitnr >= b->bm_bits) { + ERR("bitnr=%lu bm_bits=%lu\n", bitnr, b->bm_bits); + } else { + c += (0 != test_bit(bitnr - (page_nr << (PAGE_SHIFT+3)), p_addr)); + } + } + if (p_addr) + bm_unmap(p_addr); + spin_unlock_irqrestore(&b->bm_lock, flags); + return c; +} + + +/* inherently racy... + * return value may be already out-of-date when this function returns. + * but the general usage is that this is only use during a cstate when bits are + * only cleared, not set, and typically only care for the case when the return + * value is zero, or we already "locked" this "bitmap extent" by other means. + * + * enr is bm-extent number, since we chose to name one sector (512 bytes) + * worth of the bitmap a "bitmap extent". + * + * TODO + * I think since we use it like a reference count, we should use the real + * reference count of some bitmap extent element from some lru instead... + * + */ +int drbd_bm_e_weight(struct drbd_conf *mdev, unsigned long enr) +{ + struct drbd_bitmap *b = mdev->bitmap; + int count, s, e; + unsigned long flags; + unsigned long *p_addr, *bm; + + ERR_IF(!b) return 0; + ERR_IF(!b->bm_pages) return 0; + + spin_lock_irqsave(&b->bm_lock, flags); + if (bm_is_locked(b)) + bm_print_lock_info(mdev); + + s = S2W(enr); + e = min((size_t)S2W(enr+1), b->bm_words); + count = 0; + if (s < b->bm_words) { + int n = e-s; + p_addr = bm_map_paddr(b, s); + bm = p_addr + MLPP(s); + while (n--) + count += hweight_long(*bm++); + bm_unmap(p_addr); + } else { + ERR("start offset (%d) too large in drbd_bm_e_weight\n", s); + } + spin_unlock_irqrestore(&b->bm_lock, flags); + return count; +} + +/* set all bits covered by the AL-extent al_enr */ +unsigned long drbd_bm_ALe_set_all(struct drbd_conf *mdev, unsigned long al_enr) +{ + struct drbd_bitmap *b = mdev->bitmap; + unsigned long *p_addr, *bm; + unsigned long weight; + int count, s, e, i, do_now; + ERR_IF(!b) return 0; + ERR_IF(!b->bm_pages) return 0; + + spin_lock_irq(&b->bm_lock); + if (bm_is_locked(b)) + bm_print_lock_info(mdev); + weight = b->bm_set; + + s = al_enr * BM_WORDS_PER_AL_EXT; + e = min_t(size_t, s + BM_WORDS_PER_AL_EXT, b->bm_words); + /* assert that s and e are on the same page */ + D_ASSERT((e-1) >> (PAGE_SHIFT - LN2_BPL + 3) + == s >> (PAGE_SHIFT - LN2_BPL + 3)); + count = 0; + if (s < b->bm_words) { + i = do_now = e-s; + p_addr = bm_map_paddr(b, s); + bm = p_addr + MLPP(s); + while (i--) { + count += hweight_long(*bm); + *bm = -1UL; + bm++; + } + bm_unmap(p_addr); + b->bm_set += do_now*BITS_PER_LONG - count; + if (e == b->bm_words) + b->bm_set -= bm_clear_surplus(b); + } else { + ERR("start offset (%d) too large in drbd_bm_ALe_set_all\n", s); + } + weight = b->bm_set - weight; + spin_unlock_irq(&b->bm_lock); + return weight; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_nl.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_nl.c @@ -0,0 +1,2426 @@ +/* + drbd_nl.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include +#include +#include +#include /* for fsync_bdev */ +#include +#include +#include +#include +#include +#include + +#include "drbd_int.h" +#include "drbd_wrappers.h" +#include +#include + +/* see get_sb_bdev and bd_claim */ +static char *drbd_m_holder = "Hands off! this is DRBD's meta data device."; + +/* Generate the tag_list to struct functions */ +#define NL_PACKET(name, number, fields) \ +STATIC int name ## _from_tags(struct drbd_conf *mdev, \ + unsigned short *tags, struct name *arg) \ +{ \ + int tag; \ + int dlen; \ + \ + while ((tag = *tags++) != TT_END) { \ + dlen = *tags++; \ + switch (tag_number(tag)) { \ + fields \ + default: \ + if (tag & T_MANDATORY) { \ + ERR("Unknown tag: %d\n", tag_number(tag)); \ + return 0; \ + } \ + } \ + tags = (unsigned short *)((char *)tags + dlen); \ + } \ + return 1; \ +} +#define NL_INTEGER(pn, pr, member) \ + case pn: /* D_ASSERT( tag_type(tag) == TT_INTEGER ); */ \ + arg->member = *(int *)(tags); \ + break; +#define NL_INT64(pn, pr, member) \ + case pn: /* D_ASSERT( tag_type(tag) == TT_INT64 ); */ \ + arg->member = *(u64 *)(tags); \ + break; +#define NL_BIT(pn, pr, member) \ + case pn: /* D_ASSERT( tag_type(tag) == TT_BIT ); */ \ + arg->member = *(char *)(tags) ? 1 : 0; \ + break; +#define NL_STRING(pn, pr, member, len) \ + case pn: /* D_ASSERT( tag_type(tag) == TT_STRING ); */ \ + if (dlen > len) { \ + ERR("arg too long: %s (%u wanted, max len: %u bytes)\n", \ + #member, dlen, (unsigned int)len); \ + return 0; \ + } \ + arg->member ## _len = dlen; \ + memcpy(arg->member, tags, min_t(size_t, dlen, len)); \ + break; +#include "linux/drbd_nl.h" + +/* Generate the struct to tag_list functions */ +#define NL_PACKET(name, number, fields) \ +STATIC unsigned short* \ +name ## _to_tags(struct drbd_conf *mdev, \ + struct name *arg, unsigned short *tags) \ +{ \ + fields \ + return tags; \ +} + +#define NL_INTEGER(pn, pr, member) \ + *tags++ = pn | pr | TT_INTEGER; \ + *tags++ = sizeof(int); \ + *(int *)tags = arg->member; \ + tags = (unsigned short *)((char *)tags+sizeof(int)); +#define NL_INT64(pn, pr, member) \ + *tags++ = pn | pr | TT_INT64; \ + *tags++ = sizeof(u64); \ + *(u64 *)tags = arg->member; \ + tags = (unsigned short *)((char *)tags+sizeof(u64)); +#define NL_BIT(pn, pr, member) \ + *tags++ = pn | pr | TT_BIT; \ + *tags++ = sizeof(char); \ + *(char *)tags = arg->member; \ + tags = (unsigned short *)((char *)tags+sizeof(char)); +#define NL_STRING(pn, pr, member, len) \ + *tags++ = pn | pr | TT_STRING; \ + *tags++ = arg->member ## _len; \ + memcpy(tags, arg->member, arg->member ## _len); \ + tags = (unsigned short *)((char *)tags + arg->member ## _len); +#include "linux/drbd_nl.h" + +void drbd_bcast_ev_helper(struct drbd_conf *mdev, char *helper_name); +void drbd_nl_send_reply(struct cn_msg *, int); + +STATIC char *nl_packet_name(int packet_type) +{ +/* Generate packet type strings */ +#define NL_PACKET(name, number, fields) \ + [P_ ## name] = # name, +#define NL_INTEGER Argh! +#define NL_BIT Argh! +#define NL_INT64 Argh! +#define NL_STRING Argh! + + static char *nl_tag_name[P_nl_after_last_packet] = { +#include "linux/drbd_nl.h" + }; + + return (packet_type < sizeof(nl_tag_name)/sizeof(nl_tag_name[0])) ? + nl_tag_name[packet_type] : "*Unknown*"; +} + +STATIC void nl_trace_packet(void *data) +{ + struct cn_msg *req = data; + struct drbd_nl_cfg_req *nlp = (struct drbd_nl_cfg_req *)req->data; + + printk(KERN_INFO "drbd%d: " + "Netlink: << %s (%d) - seq: %x, ack: %x, len: %x\n", + nlp->drbd_minor, + nl_packet_name(nlp->packet_type), + nlp->packet_type, + req->seq, req->ack, req->len); +} + +STATIC void nl_trace_reply(void *data) +{ + struct cn_msg *req = data; + struct drbd_nl_cfg_reply *nlp = (struct drbd_nl_cfg_reply *)req->data; + + printk(KERN_INFO "drbd%d: " + "Netlink: >> %s (%d) - seq: %x, ack: %x, len: %x\n", + nlp->minor, + nlp->packet_type == P_nl_after_last_packet ? + "Empty-Reply" : nl_packet_name(nlp->packet_type), + nlp->packet_type, + req->seq, req->ack, req->len); +} + +int drbd_khelper(struct drbd_conf *mdev, char *cmd) +{ + char mb[12]; + char *argv[] = {usermode_helper, cmd, mb, NULL }; + int ret; + static char *envp[] = { "HOME=/", + "TERM=linux", + "PATH=/sbin:/usr/sbin:/bin:/usr/bin", + NULL }; + + snprintf(mb, 12, "minor-%d", mdev_to_minor(mdev)); + + INFO("helper command: %s %s %s\n", usermode_helper, cmd, mb); + + drbd_bcast_ev_helper(mdev, cmd); + ret = call_usermodehelper(usermode_helper, argv, envp, 1); + if (ret) + drbd_WARN("helper command: %s %s %s exit code %u (0x%x)\n", + usermode_helper, cmd, mb, + (ret >> 8) & 0xff, ret); + else + INFO("helper command: %s %s %s exit code %u (0x%x)\n", + usermode_helper, cmd, mb, + (ret >> 8) & 0xff, ret); + + if (ret < 0) /* Ignore any ERRNOs we got. */ + ret = 0; + + return ret; +} + +enum drbd_disk_state drbd_try_outdate_peer(struct drbd_conf *mdev) +{ + char *ex_to_string; + int r; + enum drbd_disk_state nps; + enum fencing_policy fp; + + D_ASSERT(mdev->state.pdsk == DUnknown); + + if (inc_local_if_state(mdev, Consistent)) { + fp = mdev->bc->dc.fencing; + dec_local(mdev); + } else { + drbd_WARN("Not fencing peer, I'm not even Consistent myself.\n"); + return mdev->state.pdsk; + } + + if (fp == Stonith) + _drbd_request_state(mdev, NS(susp, 1), ChgWaitComplete); + + r = drbd_khelper(mdev, "fence-peer"); + + switch ((r>>8) & 0xff) { + case 3: /* peer is inconsistent */ + ex_to_string = "peer is inconsistent or worse"; + nps = Inconsistent; + break; + case 4: + ex_to_string = "peer is outdated"; + nps = Outdated; + break; + case 5: /* peer was down, we will(have) create(d) a new UUID anyways... */ + /* If we would be more strict, we would return DUnknown here. */ + ex_to_string = "peer is unreachable, assumed to be dead"; + nps = Outdated; + break; + case 6: /* Peer is primary, voluntarily outdate myself. + * This is useful when an unconnected Secondary is asked to + * become Primary, but findes the other peer being active. */ + ex_to_string = "peer is active"; + drbd_WARN("Peer is primary, outdating myself.\n"); + nps = DUnknown; + _drbd_request_state(mdev, NS(disk, Outdated), ChgWaitComplete); + break; + case 7: + if (fp != Stonith) + ERR("fence-peer() = 7 && fencing != Stonith !!!\n"); + ex_to_string = "peer was stonithed"; + nps = Outdated; + break; + default: + /* The script is broken ... */ + nps = DUnknown; + ERR("fence-peer helper broken, returned %d\n", (r>>8)&0xff); + return nps; + } + + INFO("fence-peer helper returned %d (%s)\n", + (r>>8) & 0xff, ex_to_string); + return nps; +} + + +int drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role, int force) +{ + const int max_tries = 4; + int r = 0; + int try = 0; + int forced = 0; + union drbd_state_t mask, val; + enum drbd_disk_state nps; + + if (new_role == Primary) + request_ping(mdev); /* Detect a dead peer ASAP */ + + mutex_lock(&mdev->state_mutex); + + mask.i = 0; mask.role = role_mask; + val.i = 0; val.role = new_role; + + while (try++ < max_tries) { + r = _drbd_request_state(mdev, mask, val, ChgWaitComplete); + + /* in case we first succeeded to outdate, + * but now suddenly could establish a connection */ + if (r == SS_CW_FailedByPeer && mask.pdsk != 0) { + val.pdsk = 0; + mask.pdsk = 0; + continue; + } + + if (r == SS_NoUpToDateDisk && force && + (mdev->state.disk == Inconsistent || + mdev->state.disk == Outdated)) { + mask.disk = disk_mask; + val.disk = UpToDate; + forced = 1; + continue; + } + + if (r == SS_NoUpToDateDisk && + mdev->state.disk == Consistent) { + D_ASSERT(mdev->state.pdsk == DUnknown); + nps = drbd_try_outdate_peer(mdev); + + if (nps == Outdated) { + val.disk = UpToDate; + mask.disk = disk_mask; + } + + val.pdsk = nps; + mask.pdsk = disk_mask; + + continue; + } + + if (r == SS_NothingToDo) + goto fail; + if (r == SS_PrimaryNOP) { + nps = drbd_try_outdate_peer(mdev); + + if (force && nps > Outdated) { + drbd_WARN("Forced into split brain situation!\n"); + nps = Outdated; + } + + mask.pdsk = disk_mask; + val.pdsk = nps; + + continue; + } + if (r == SS_TwoPrimaries) { + /* Maybe the peer is detected as dead very soon... + retry at most once more in this case. */ + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout((mdev->net_conf->ping_timeo+1)*HZ/10); + if (try < max_tries) + try = max_tries - 1; + continue; + } + if (r < SS_Success) { + r = _drbd_request_state(mdev, mask, val, + ChgStateVerbose + ChgWaitComplete); + if (r < SS_Success) + goto fail; + } + break; + } + + if (forced) + drbd_WARN("Forced to consider local data as UpToDate!\n"); + + fsync_bdev(mdev->this_bdev); + + /* Wait until nothing is on the fly :) */ + wait_event(mdev->misc_wait, atomic_read(&mdev->ap_pending_cnt) == 0); + + if (new_role == Secondary) { + set_disk_ro(mdev->vdisk, TRUE); + if (inc_local(mdev)) { + mdev->bc->md.uuid[Current] &= ~(u64)1; + dec_local(mdev); + } + } else { + if (inc_net(mdev)) { + mdev->net_conf->want_lose = 0; + dec_net(mdev); + } + set_disk_ro(mdev->vdisk, FALSE); + if (inc_local(mdev)) { + if (((mdev->state.conn < Connected || + mdev->state.pdsk <= Failed) + && mdev->bc->md.uuid[Bitmap] == 0) || forced) + drbd_uuid_new_current(mdev); + + mdev->bc->md.uuid[Current] |= (u64)1; + dec_local(mdev); + } + } + + if ((new_role == Secondary) && inc_local(mdev)) { + drbd_al_to_on_disk_bm(mdev); + dec_local(mdev); + } + + if (mdev->state.conn >= WFReportParams) { + /* if this was forced, we should consider sync */ + if (forced) + drbd_send_uuids(mdev); + drbd_send_state(mdev); + } + + drbd_md_sync(mdev); + + drbd_kobject_uevent(mdev); + fail: + mutex_unlock(&mdev->state_mutex); + return r; +} + + +STATIC int drbd_nl_primary(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + struct primary primary_args; + + memset(&primary_args, 0, sizeof(struct primary)); + if (!primary_from_tags(mdev, nlp->tag_list, &primary_args)) { + reply->ret_code = UnknownMandatoryTag; + return 0; + } + + reply->ret_code = + drbd_set_role(mdev, Primary, primary_args.overwrite_peer); + + return 0; +} + +STATIC int drbd_nl_secondary(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + reply->ret_code = drbd_set_role(mdev, Secondary, 0); + + return 0; +} + +/* initializes the md.*_offset members, so we are able to find + * the on disk meta data */ +STATIC void drbd_md_set_sector_offsets(struct drbd_conf *mdev, + struct drbd_backing_dev *bdev) +{ + sector_t md_size_sect = 0; + switch (bdev->dc.meta_dev_idx) { + default: + /* v07 style fixed size indexed meta data */ + bdev->md.md_size_sect = MD_RESERVED_SECT; + bdev->md.md_offset = drbd_md_ss__(mdev, bdev); + bdev->md.al_offset = MD_AL_OFFSET; + bdev->md.bm_offset = MD_BM_OFFSET; + break; + case DRBD_MD_INDEX_FLEX_EXT: + /* just occupy the full device; unit: sectors */ + bdev->md.md_size_sect = drbd_get_capacity(bdev->md_bdev); + bdev->md.md_offset = 0; + bdev->md.al_offset = MD_AL_OFFSET; + bdev->md.bm_offset = MD_BM_OFFSET; + break; + case DRBD_MD_INDEX_INTERNAL: + case DRBD_MD_INDEX_FLEX_INT: + bdev->md.md_offset = drbd_md_ss__(mdev, bdev); + /* al size is still fixed */ + bdev->md.al_offset = -MD_AL_MAX_SIZE; + /* we need (slightly less than) ~ this much bitmap sectors: */ + md_size_sect = drbd_get_capacity(bdev->backing_bdev); + md_size_sect = ALIGN(md_size_sect, BM_SECT_PER_EXT); + md_size_sect = BM_SECT_TO_EXT(md_size_sect); + md_size_sect = ALIGN(md_size_sect, 8); + + /* plus the "drbd meta data super block", + * and the activity log; */ + md_size_sect += MD_BM_OFFSET; + + bdev->md.md_size_sect = md_size_sect; + /* bitmap offset is adjusted by 'super' block size */ + bdev->md.bm_offset = -md_size_sect + MD_AL_OFFSET; + break; + } +} + +char *ppsize(char *buf, unsigned long long size) +{ + /* Needs 9 bytes at max. */ + static char units[] = { 'K', 'M', 'G', 'T', 'P', 'E' }; + int base = 0; + while (size >= 10000) { + /* shift + round */ + size = (size >> 10) + !!(size & (1<<9)); + base++; + } + sprintf(buf, "%lu %cB", (long)size, units[base]); + + return buf; +} + +/* there is still a theoretical deadlock when called from receiver + * on an Inconsistent Primary: + * remote READ does inc_ap_bio, receiver would need to receive answer + * packet from remote to dec_ap_bio again. + * receiver receive_sizes(), comes here, + * waits for ap_bio_cnt == 0. -> deadlock. + * but this cannot happen, actually, because: + * Primary Inconsistent, and peer's disk is unreachable + * (not connected, * or bad/no disk on peer): + * see drbd_fail_request_early, ap_bio_cnt is zero. + * Primary Inconsistent, and SyncTarget: + * peer may not initiate a resize. + */ +void drbd_suspend_io(struct drbd_conf *mdev) +{ + int in_flight; + set_bit(SUSPEND_IO, &mdev->flags); + in_flight = atomic_read(&mdev->ap_bio_cnt); + if (in_flight) + wait_event(mdev->misc_wait, !atomic_read(&mdev->ap_bio_cnt)); +} + +void drbd_resume_io(struct drbd_conf *mdev) +{ + clear_bit(SUSPEND_IO, &mdev->flags); + wake_up(&mdev->misc_wait); +} + +/** + * drbd_determin_dev_size: + * Evaluates all constraints and sets our correct device size. + * Negative return values indicate errors. 0 and positive values + * indicate success. + * You should call drbd_md_sync() after calling this function. + */ +enum determin_dev_size_enum drbd_determin_dev_size(struct drbd_conf *mdev) __must_hold(local) +{ + sector_t prev_first_sect, prev_size; /* previous meta location */ + sector_t la_size; + sector_t size; + char ppb[10]; + + int md_moved, la_size_changed; + enum determin_dev_size_enum rv = unchanged; + + /* race: + * application request passes inc_ap_bio, + * but then cannot get an AL-reference. + * this function later may wait on ap_bio_cnt == 0. -> deadlock. + * + * to avoid that: + * Suspend IO right here. + * still lock the act_log to not trigger ASSERTs there. + */ + drbd_suspend_io(mdev); + + /* no wait necessary anymore, actually we could assert that */ + wait_event(mdev->al_wait, lc_try_lock(mdev->act_log)); + + prev_first_sect = drbd_md_first_sector(mdev->bc); + prev_size = mdev->bc->md.md_size_sect; + la_size = mdev->bc->md.la_size_sect; + + /* TODO: should only be some assert here, not (re)init... */ + drbd_md_set_sector_offsets(mdev, mdev->bc); + + size = drbd_new_dev_size(mdev, mdev->bc); + + if (drbd_get_capacity(mdev->this_bdev) != size || + drbd_bm_capacity(mdev) != size) { + int err; + err = drbd_bm_resize(mdev, size); + if (unlikely(err)) { + /* currently there is only one error: ENOMEM! */ + size = drbd_bm_capacity(mdev)>>1; + if (size == 0) { + ERR("OUT OF MEMORY! " + "Could not allocate bitmap!\n"); + } else { + ERR("BM resizing failed. " + "Leaving size unchanged at size = %lu KB\n", + (unsigned long)size); + } + rv = dev_size_error; + } + /* racy, see comments above. */ + drbd_set_my_capacity(mdev, size); + mdev->bc->md.la_size_sect = size; + INFO("size = %s (%llu KB)\n", ppsize(ppb, size>>1), + (unsigned long long)size>>1); + } + if (rv == dev_size_error) + goto out; + + la_size_changed = (la_size != mdev->bc->md.la_size_sect); + + md_moved = prev_first_sect != drbd_md_first_sector(mdev->bc) + || prev_size != mdev->bc->md.md_size_sect; + + if (md_moved) { + drbd_WARN("Moving meta-data.\n"); + /* assert: (flexible) internal meta data */ + } + + if (la_size_changed || md_moved) { + drbd_al_shrink(mdev); /* All extents inactive. */ + INFO("Writing the whole bitmap, size changed\n"); + rv = drbd_bitmap_io(mdev, &drbd_bm_write, "size changed"); + drbd_md_mark_dirty(mdev); + } + + if (size > la_size) + rv = grew; + if (size < la_size) + rv = shrunk; +out: + lc_unlock(mdev->act_log); + wake_up(&mdev->al_wait); + drbd_resume_io(mdev); + + return rv; +} + +sector_t +drbd_new_dev_size(struct drbd_conf *mdev, struct drbd_backing_dev *bdev) +{ + sector_t p_size = mdev->p_size; /* partner's disk size. */ + sector_t la_size = bdev->md.la_size_sect; /* last agreed size. */ + sector_t m_size; /* my size */ + sector_t u_size = bdev->dc.disk_size; /* size requested by user. */ + sector_t size = 0; + + m_size = drbd_get_max_capacity(bdev); + + if (p_size && m_size) { + size = min_t(sector_t, p_size, m_size); + } else { + if (la_size) { + size = la_size; + if (m_size && m_size < size) + size = m_size; + if (p_size && p_size < size) + size = p_size; + } else { + if (m_size) + size = m_size; + if (p_size) + size = p_size; + } + } + + if (size == 0) + ERR("Both nodes diskless!\n"); + + if (u_size) { + if (u_size > size) + ERR("Requested disk size is too big (%lu > %lu)\n", + (unsigned long)u_size>>1, (unsigned long)size>>1); + else + size = u_size; + } + + return size; +} + +/** + * drbd_check_al_size: + * checks that the al lru is of requested size, and if neccessary tries to + * allocate a new one. returns -EBUSY if current al lru is still used, + * -ENOMEM when allocation failed, and 0 on success. You should call + * drbd_md_sync() after you called this function. + */ +STATIC int drbd_check_al_size(struct drbd_conf *mdev) +{ + struct lru_cache *n, *t; + struct lc_element *e; + unsigned int in_use; + int i; + + ERR_IF(mdev->sync_conf.al_extents < 7) + mdev->sync_conf.al_extents = 127; + + if (mdev->act_log && + mdev->act_log->nr_elements == mdev->sync_conf.al_extents) + return 0; + + in_use = 0; + t = mdev->act_log; + n = lc_alloc("act_log", mdev->sync_conf.al_extents, + sizeof(struct lc_element), mdev); + + if (n == NULL) { + ERR("Cannot allocate act_log lru!\n"); + return -ENOMEM; + } + spin_lock_irq(&mdev->al_lock); + if (t) { + for (i = 0; i < t->nr_elements; i++) { + e = lc_entry(t, i); + if (e->refcnt) + ERR("refcnt(%d)==%d\n", + e->lc_number, e->refcnt); + in_use += e->refcnt; + } + } + if (!in_use) + mdev->act_log = n; + spin_unlock_irq(&mdev->al_lock); + if (in_use) { + ERR("Activity log still in use!\n"); + lc_free(n); + return -EBUSY; + } else { + if (t) + lc_free(t); + } + drbd_md_mark_dirty(mdev); /* we changed mdev->act_log->nr_elemens */ + return 0; +} + +void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int max_seg_s) __must_hold(local) +{ + struct request_queue * const q = mdev->rq_queue; + struct request_queue * const b = mdev->bc->backing_bdev->bd_disk->queue; + /* unsigned int old_max_seg_s = q->max_segment_size; */ + int max_segments = mdev->bc->dc.max_bio_bvecs; + + if (b->merge_bvec_fn && !mdev->bc->dc.use_bmbv) + max_seg_s = PAGE_SIZE; + + max_seg_s = min(queue_max_sectors(b) * queue_logical_block_size(b), max_seg_s); + + MTRACE(TraceTypeRq, TraceLvlSummary, + DUMPI(queue_max_sectors(b)); + DUMPI(queue_max_phys_segments(b)); + DUMPI(queue_max_hw_segments(b)); + DUMPI(queue_max_segment_size(b)); + DUMPI(queue_logical_block_size(b)); + DUMPI(queue_segment_boundary(b)); + ); + + blk_queue_max_sectors(q, max_seg_s >> 9); + if (max_segments) { + blk_queue_max_phys_segments(q, max_segments); + blk_queue_max_hw_segments(q, max_segments); + } else { + blk_queue_max_phys_segments(q, MAX_PHYS_SEGMENTS); + blk_queue_max_hw_segments(q, MAX_HW_SEGMENTS); + } + blk_queue_max_segment_size(q, max_seg_s); + blk_queue_logical_block_size(q, 512); + blk_queue_segment_boundary(q, PAGE_SIZE-1); + blk_queue_stack_limits(q, b); + + /* KERNEL BUG. in ll_rw_blk.c ?? + * t->max_segment_size = min(t->max_segment_size,b->max_segment_size); + * should be + * t->max_segment_size = min_not_zero(...,...) + * workaround here: */ + if (queue_max_segment_size(q) == 0) + blk_queue_max_segment_size(q, max_seg_s); + + MTRACE(TraceTypeRq, TraceLvlSummary, + DUMPI(queue_max_sectors(q)); + DUMPI(queue_max_phys_segments(q)); + DUMPI(queue_max_hw_segments(q)); + DUMPI(queue_max_segment_size(q)); + DUMPI(queue_logical_block_size(q)); + DUMPI(queue_segment_boundary(q)); + ); + + if (b->merge_bvec_fn) + drbd_WARN("Backing device's merge_bvec_fn() = %p\n", + b->merge_bvec_fn); + INFO("max_segment_size ( = BIO size ) = %u\n", queue_max_segment_size(q)); + + if (q->backing_dev_info.ra_pages != b->backing_dev_info.ra_pages) { + INFO("Adjusting my ra_pages to backing device's (%lu -> %lu)\n", + q->backing_dev_info.ra_pages, + b->backing_dev_info.ra_pages); + q->backing_dev_info.ra_pages = b->backing_dev_info.ra_pages; + } +} + +/* does always return 0; + * interesting return code is in reply->ret_code */ +STATIC int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + enum ret_codes retcode; + enum determin_dev_size_enum dd; + sector_t max_possible_sectors; + sector_t min_md_device_sectors; + struct drbd_backing_dev *nbc = NULL; /* new_backing_conf */ + struct inode *inode, *inode2; + struct lru_cache *resync_lru = NULL; + union drbd_state_t ns, os; + int rv, ntries = 0; + int cp_discovered = 0; + int hardsect; + + /* if you want to reconfigure, please tear down first */ + if (mdev->state.disk > Diskless) { + retcode = HaveDiskConfig; + goto fail; + } + + /* + * We may have gotten here very quickly from a detach. Wait for a bit + * then fail. + */ + while (1) { + __no_warn(local, nbc = mdev->bc;); + if (nbc == NULL) + break; + if (ntries++ >= 5) { + drbd_WARN("drbd_nl_disk_conf: mdev->bc not NULL.\n"); + retcode = HaveDiskConfig; + goto fail; + } + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ/10); + } + + nbc = kmalloc(sizeof(struct drbd_backing_dev), GFP_KERNEL); + if (!nbc) { + retcode = KMallocFailed; + goto fail; + } + + memset(&nbc->md, 0, sizeof(struct drbd_md)); + + if (!(nlp->flags & DRBD_NL_SET_DEFAULTS) && inc_local(mdev)) { + memcpy(&nbc->dc, &mdev->bc->dc, sizeof(struct disk_conf)); + dec_local(mdev); + } else { + memset(&nbc->dc, 0, sizeof(struct disk_conf)); + nbc->dc.disk_size = DRBD_DISK_SIZE_SECT_DEF; + nbc->dc.on_io_error = DRBD_ON_IO_ERROR_DEF; + nbc->dc.fencing = DRBD_FENCING_DEF; + nbc->dc.max_bio_bvecs = DRBD_MAX_BIO_BVECS_DEF; + } + + if (!disk_conf_from_tags(mdev, nlp->tag_list, &nbc->dc)) { + retcode = UnknownMandatoryTag; + goto fail; + } + + nbc->lo_file = NULL; + nbc->md_file = NULL; + + if (nbc->dc.meta_dev_idx < DRBD_MD_INDEX_FLEX_INT) { + retcode = LDMDInvalid; + goto fail; + } + + nbc->lo_file = filp_open(nbc->dc.backing_dev, O_RDWR, 0); + if (IS_ERR(nbc->lo_file)) { + ERR("open(\"%s\") failed with %ld\n", nbc->dc.backing_dev, + PTR_ERR(nbc->lo_file)); + nbc->lo_file = NULL; + retcode = LDNameInvalid; + goto fail; + } + + inode = nbc->lo_file->f_dentry->d_inode; + + if (!S_ISBLK(inode->i_mode)) { + retcode = LDNoBlockDev; + goto fail; + } + + nbc->md_file = filp_open(nbc->dc.meta_dev, O_RDWR, 0); + if (IS_ERR(nbc->md_file)) { + ERR("open(\"%s\") failed with %ld\n", nbc->dc.meta_dev, + PTR_ERR(nbc->md_file)); + nbc->md_file = NULL; + retcode = MDNameInvalid; + goto fail; + } + + inode2 = nbc->md_file->f_dentry->d_inode; + + if (!S_ISBLK(inode2->i_mode)) { + retcode = MDNoBlockDev; + goto fail; + } + + nbc->backing_bdev = inode->i_bdev; + if (bd_claim(nbc->backing_bdev, mdev)) { + printk(KERN_ERR "drbd: bd_claim(%p,%p); failed [%p;%p;%u]\n", + nbc->backing_bdev, mdev, + nbc->backing_bdev->bd_holder, + nbc->backing_bdev->bd_contains->bd_holder, + nbc->backing_bdev->bd_holders); + retcode = LDMounted; + goto fail; + } + + resync_lru = lc_alloc("resync", 61, sizeof(struct bm_extent), mdev); + if (!resync_lru) { + retcode = KMallocFailed; + goto release_bdev_fail; + } + + if (!mdev->bitmap) { + if (drbd_bm_init(mdev)) { + retcode = KMallocFailed; + goto release_bdev_fail; + } + } + + nbc->md_bdev = inode2->i_bdev; + if (bd_claim(nbc->md_bdev, + (nbc->dc.meta_dev_idx == DRBD_MD_INDEX_INTERNAL || + nbc->dc.meta_dev_idx == DRBD_MD_INDEX_FLEX_INT) ? + (void *)mdev : (void *) drbd_m_holder)) { + retcode = MDMounted; + goto release_bdev_fail; + } + + if ((nbc->backing_bdev == nbc->md_bdev) != + (nbc->dc.meta_dev_idx == DRBD_MD_INDEX_INTERNAL || + nbc->dc.meta_dev_idx == DRBD_MD_INDEX_FLEX_INT)) { + retcode = LDMDInvalid; + goto release_bdev2_fail; + } + + /* RT - for drbd_get_max_capacity() DRBD_MD_INDEX_FLEX_INT */ + drbd_md_set_sector_offsets(mdev, nbc); + + if (drbd_get_max_capacity(nbc) < nbc->dc.disk_size) { + ERR("max capacity %llu smaller than disk size %llu\n", + (unsigned long long) drbd_get_max_capacity(nbc), + (unsigned long long) nbc->dc.disk_size); + retcode = LDDeviceTooSmall; + goto release_bdev2_fail; + } + + if (nbc->dc.meta_dev_idx < 0) { + max_possible_sectors = DRBD_MAX_SECTORS_FLEX; + /* at least one MB, otherwise it does not make sense */ + min_md_device_sectors = (2<<10); + } else { + max_possible_sectors = DRBD_MAX_SECTORS; + min_md_device_sectors = MD_RESERVED_SECT * (nbc->dc.meta_dev_idx + 1); + } + + if (drbd_get_capacity(nbc->md_bdev) > max_possible_sectors) + drbd_WARN("truncating very big lower level device " + "to currently maximum possible %llu sectors\n", + (unsigned long long) max_possible_sectors); + + if (drbd_get_capacity(nbc->md_bdev) < min_md_device_sectors) { + retcode = MDDeviceTooSmall; + drbd_WARN("refusing attach: md-device too small, " + "at least %llu sectors needed for this meta-disk type\n", + (unsigned long long) min_md_device_sectors); + goto release_bdev2_fail; + } + + /* Make sure the new disk is big enough + * (we may currently be Primary with no local disk...) */ + if (drbd_get_max_capacity(nbc) < + drbd_get_capacity(mdev->this_bdev)) { + retcode = LDDeviceTooSmall; + goto release_bdev2_fail; + } + + nbc->known_size = drbd_get_capacity(nbc->backing_bdev); + + drbd_suspend_io(mdev); + wait_event(mdev->misc_wait, !atomic_read(&mdev->ap_pending_cnt)); + retcode = _drbd_request_state(mdev, NS(disk, Attaching), ChgStateVerbose); + drbd_resume_io(mdev); + if (retcode < SS_Success) + goto release_bdev2_fail; + + if (!inc_local_if_state(mdev, Attaching)) + goto force_diskless; + + drbd_thread_start(&mdev->worker); + drbd_md_set_sector_offsets(mdev, nbc); + + retcode = drbd_md_read(mdev, nbc); + if (retcode != NoError) + goto force_diskless_dec; + + if (mdev->state.conn < Connected && + mdev->state.role == Primary && + (mdev->ed_uuid & ~((u64)1)) != (nbc->md.uuid[Current] & ~((u64)1))) { + ERR("Can only attach to data with current UUID=%016llX\n", + (unsigned long long)mdev->ed_uuid); + retcode = DataOfWrongCurrent; + goto force_diskless_dec; + } + + /* Since we are diskless, fix the AL first... */ + if (drbd_check_al_size(mdev)) { + retcode = KMallocFailed; + goto force_diskless_dec; + } + + /* Prevent shrinking of consistent devices ! */ + if (drbd_md_test_flag(nbc, MDF_Consistent) && + drbd_new_dev_size(mdev, nbc) < nbc->md.la_size_sect) { + drbd_WARN("refusing to truncate a consistent device\n"); + retcode = LDDeviceTooSmall; + goto force_diskless_dec; + } + + if (!drbd_al_read_log(mdev, nbc)) { + retcode = MDIOError; + goto force_diskless_dec; + } + + /* allocate a second IO page if hardsect != 512 */ + hardsect = drbd_get_hardsect(nbc->md_bdev); + if (hardsect == 0) + hardsect = MD_HARDSECT; + + if (hardsect != MD_HARDSECT) { + if (!mdev->md_io_tmpp) { + struct page *page = alloc_page(GFP_NOIO); + if (!page) + goto force_diskless_dec; + + drbd_WARN("Meta data's bdev hardsect = %d != %d\n", + hardsect, MD_HARDSECT); + drbd_WARN("Workaround engaged (has performace impact).\n"); + + mdev->md_io_tmpp = page; + } + } + + /* Reset the "barriers don't work" bits here, then force meta data to + * be written, to ensure we determine if barriers are supported. */ + if (nbc->dc.no_md_flush) + set_bit(MD_NO_BARRIER, &mdev->flags); + else + clear_bit(MD_NO_BARRIER, &mdev->flags); + + /* Point of no return reached. + * Devices and memory are no longer released by error cleanup below. + * now mdev takes over responsibility, and the state engine should + * clean it up somewhere. */ + D_ASSERT(mdev->bc == NULL); + mdev->bc = nbc; + mdev->resync = resync_lru; + nbc = NULL; + resync_lru = NULL; + + mdev->write_ordering = WO_bio_barrier; + drbd_bump_write_ordering(mdev, WO_bio_barrier); + + if (drbd_md_test_flag(mdev->bc, MDF_CrashedPrimary)) + set_bit(CRASHED_PRIMARY, &mdev->flags); + else + clear_bit(CRASHED_PRIMARY, &mdev->flags); + + if (drbd_md_test_flag(mdev->bc, MDF_PrimaryInd)) { + set_bit(CRASHED_PRIMARY, &mdev->flags); + cp_discovered = 1; + } + + mdev->send_cnt = 0; + mdev->recv_cnt = 0; + mdev->read_cnt = 0; + mdev->writ_cnt = 0; + + drbd_setup_queue_param(mdev, DRBD_MAX_SEGMENT_SIZE); + + /* If I am currently not Primary, + * but meta data primary indicator is set, + * I just now recover from a hard crash, + * and have been Primary before that crash. + * + * Now, if I had no connection before that crash + * (have been degraded Primary), chances are that + * I won't find my peer now either. + * + * In that case, and _only_ in that case, + * we use the degr-wfc-timeout instead of the default, + * so we can automatically recover from a crash of a + * degraded but active "cluster" after a certain timeout. + */ + clear_bit(USE_DEGR_WFC_T, &mdev->flags); + if (mdev->state.role != Primary && + drbd_md_test_flag(mdev->bc, MDF_PrimaryInd) && + !drbd_md_test_flag(mdev->bc, MDF_ConnectedInd)) + set_bit(USE_DEGR_WFC_T, &mdev->flags); + + dd = drbd_determin_dev_size(mdev); + if (dd == dev_size_error) { + retcode = VMallocFailed; + goto force_diskless_dec; + } else if (dd == grew) + set_bit(RESYNC_AFTER_NEG, &mdev->flags); + + if (drbd_md_test_flag(mdev->bc, MDF_FullSync)) { + INFO("Assuming that all blocks are out of sync " + "(aka FullSync)\n"); + if (drbd_bitmap_io(mdev, &drbd_bmio_set_n_write, "set_n_write from attaching")) { + retcode = MDIOError; + goto force_diskless_dec; + } + } else { + if (drbd_bitmap_io(mdev, &drbd_bm_read, "read from attaching") < 0) { + retcode = MDIOError; + goto force_diskless_dec; + } + } + + if (cp_discovered) { + drbd_al_apply_to_bm(mdev); + drbd_al_to_on_disk_bm(mdev); + } + + spin_lock_irq(&mdev->req_lock); + os = mdev->state; + ns.i = os.i; + /* If MDF_Consistent is not set go into inconsistent state, + otherwise investige MDF_WasUpToDate... + If MDF_WasUpToDate is not set go into Outdated disk state, + otherwise into Consistent state. + */ + if (drbd_md_test_flag(mdev->bc, MDF_Consistent)) { + if (drbd_md_test_flag(mdev->bc, MDF_WasUpToDate)) + ns.disk = Consistent; + else + ns.disk = Outdated; + } else { + ns.disk = Inconsistent; + } + + if (drbd_md_test_flag(mdev->bc, MDF_PeerOutDated)) + ns.pdsk = Outdated; + + if ( ns.disk == Consistent && + (ns.pdsk == Outdated || mdev->bc->dc.fencing == DontCare)) + ns.disk = UpToDate; + + /* All tests on MDF_PrimaryInd, MDF_ConnectedInd, + MDF_Consistent and MDF_WasUpToDate must happen before + this point, because drbd_request_state() modifies these + flags. */ + + /* In case we are Connected postpone any desicion on the new disk + state after the negotiation phase. */ + if (mdev->state.conn == Connected) { + mdev->new_state_tmp.i = ns.i; + ns.i = os.i; + ns.disk = Negotiating; + } + + rv = _drbd_set_state(mdev, ns, ChgStateVerbose, NULL); + ns = mdev->state; + spin_unlock_irq(&mdev->req_lock); + + if (rv < SS_Success) + goto force_diskless_dec; + + if (mdev->state.role == Primary) + mdev->bc->md.uuid[Current] |= (u64)1; + else + mdev->bc->md.uuid[Current] &= ~(u64)1; + + drbd_md_mark_dirty(mdev); + drbd_md_sync(mdev); + + drbd_kobject_uevent(mdev); + dec_local(mdev); + reply->ret_code = retcode; + return 0; + + force_diskless_dec: + dec_local(mdev); + force_diskless: + drbd_force_state(mdev, NS(disk, Diskless)); + drbd_md_sync(mdev); + release_bdev2_fail: + if (nbc) + bd_release(nbc->md_bdev); + release_bdev_fail: + if (nbc) + bd_release(nbc->backing_bdev); + fail: + if (nbc) { + if (nbc->lo_file) + fput(nbc->lo_file); + if (nbc->md_file) + fput(nbc->md_file); + kfree(nbc); + } + if (resync_lru) + lc_free(resync_lru); + + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_detach(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + fsync_bdev(mdev->this_bdev); + reply->ret_code = drbd_request_state(mdev, NS(disk, Diskless)); + + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ/20); /* 50ms; Time for worker to finally terminate */ + + return 0; +} + +#define HMAC_NAME_L 20 + +STATIC int drbd_nl_net_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int i, ns; + enum ret_codes retcode; + struct net_conf *new_conf = NULL; + struct crypto_hash *tfm = NULL; + struct crypto_hash *integrity_w_tfm = NULL; + struct crypto_hash *integrity_r_tfm = NULL; + struct hlist_head *new_tl_hash = NULL; + struct hlist_head *new_ee_hash = NULL; + struct drbd_conf *odev; + char hmac_name[HMAC_NAME_L]; + void *int_dig_out = NULL; + void *int_dig_in = NULL; + void *int_dig_vv = NULL; + + if (mdev->state.conn > StandAlone) { + retcode = HaveNetConfig; + goto fail; + } + + new_conf = kmalloc(sizeof(struct net_conf), GFP_KERNEL); + if (!new_conf) { + retcode = KMallocFailed; + goto fail; + } + + if (!(nlp->flags & DRBD_NL_SET_DEFAULTS) && inc_net(mdev)) { + memcpy(new_conf, mdev->net_conf, sizeof(struct net_conf)); + dec_net(mdev); + } else { + memset(new_conf, 0, sizeof(struct net_conf)); + new_conf->timeout = DRBD_TIMEOUT_DEF; + new_conf->try_connect_int = DRBD_CONNECT_INT_DEF; + new_conf->ping_int = DRBD_PING_INT_DEF; + new_conf->max_epoch_size = DRBD_MAX_EPOCH_SIZE_DEF; + new_conf->max_buffers = DRBD_MAX_BUFFERS_DEF; + new_conf->unplug_watermark = DRBD_UNPLUG_WATERMARK_DEF; + new_conf->sndbuf_size = DRBD_SNDBUF_SIZE_DEF; + new_conf->ko_count = DRBD_KO_COUNT_DEF; + new_conf->after_sb_0p = DRBD_AFTER_SB_0P_DEF; + new_conf->after_sb_1p = DRBD_AFTER_SB_1P_DEF; + new_conf->after_sb_2p = DRBD_AFTER_SB_2P_DEF; + new_conf->want_lose = 0; + new_conf->two_primaries = 0; + new_conf->wire_protocol = DRBD_PROT_C; + new_conf->ping_timeo = DRBD_PING_TIMEO_DEF; + new_conf->rr_conflict = DRBD_RR_CONFLICT_DEF; + } + + if (!net_conf_from_tags(mdev, nlp->tag_list, new_conf)) { + retcode = UnknownMandatoryTag; + goto fail; + } + + if (new_conf->two_primaries + && (new_conf->wire_protocol != DRBD_PROT_C)) { + retcode = ProtocolCRequired; + goto fail; + }; + + if (mdev->state.role == Primary && new_conf->want_lose) { + retcode = DiscardNotAllowed; + goto fail; + } + +#define M_ADDR(A) (((struct sockaddr_in *)&A->my_addr)->sin_addr.s_addr) +#define M_PORT(A) (((struct sockaddr_in *)&A->my_addr)->sin_port) +#define O_ADDR(A) (((struct sockaddr_in *)&A->peer_addr)->sin_addr.s_addr) +#define O_PORT(A) (((struct sockaddr_in *)&A->peer_addr)->sin_port) + retcode = NoError; + for (i = 0; i < minor_count; i++) { + odev = minor_to_mdev(i); + if (!odev || odev == mdev) + continue; + if (inc_net(odev)) { + if (M_ADDR(new_conf) == M_ADDR(odev->net_conf) && + M_PORT(new_conf) == M_PORT(odev->net_conf)) + retcode = LAAlreadyInUse; + + if (O_ADDR(new_conf) == O_ADDR(odev->net_conf) && + O_PORT(new_conf) == O_PORT(odev->net_conf)) + retcode = OAAlreadyInUse; + + dec_net(odev); + if (retcode != NoError) + goto fail; + } + } +#undef M_ADDR +#undef M_PORT +#undef O_ADDR +#undef O_PORT + + if (new_conf->cram_hmac_alg[0] != 0) { + snprintf(hmac_name, HMAC_NAME_L, "hmac(%s)", + new_conf->cram_hmac_alg); + tfm = crypto_alloc_hash(hmac_name, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(tfm)) { + tfm = NULL; + retcode = CRAMAlgNotAvail; + goto fail; + } + + if (crypto_tfm_alg_type(crypto_hash_tfm(tfm)) + != CRYPTO_ALG_TYPE_HASH) { + retcode = CRAMAlgNotDigest; + goto fail; + } + } + + if (new_conf->integrity_alg[0]) { + integrity_w_tfm = crypto_alloc_hash(new_conf->integrity_alg, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(integrity_w_tfm)) { + integrity_w_tfm = NULL; + retcode=IntegrityAlgNotAvail; + goto fail; + } + + if (crypto_tfm_alg_type(crypto_hash_tfm(integrity_w_tfm)) != CRYPTO_ALG_TYPE_DIGEST) { + retcode=IntegrityAlgNotDigest; + goto fail; + } + + integrity_r_tfm = crypto_alloc_hash(new_conf->integrity_alg, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(integrity_r_tfm)) { + integrity_r_tfm = NULL; + retcode=IntegrityAlgNotAvail; + goto fail; + } + } + + ns = new_conf->max_epoch_size/8; + if (mdev->tl_hash_s != ns) { + new_tl_hash = kzalloc(ns*sizeof(void *), GFP_KERNEL); + if (!new_tl_hash) { + retcode = KMallocFailed; + goto fail; + } + } + + ns = new_conf->max_buffers/8; + if (new_conf->two_primaries && (mdev->ee_hash_s != ns)) { + new_ee_hash = kzalloc(ns*sizeof(void *), GFP_KERNEL); + if (!new_ee_hash) { + retcode = KMallocFailed; + goto fail; + } + } + + ((char *)new_conf->shared_secret)[SHARED_SECRET_MAX-1] = 0; + +#if 0 + /* for the connection loss logic in drbd_recv + * I _need_ the resulting timeo in jiffies to be + * non-zero and different + * + * XXX maybe rather store the value scaled to jiffies? + * Note: MAX_SCHEDULE_TIMEOUT/HZ*HZ != MAX_SCHEDULE_TIMEOUT + * and HZ > 10; which is unlikely to change... + * Thus, if interrupted by a signal, + * sock_{send,recv}msg returns -EINTR, + * if the timeout expires, -EAGAIN. + */ + /* unlikely: someone disabled the timeouts ... + * just put some huge values in there. */ + if (!new_conf->ping_int) + new_conf->ping_int = MAX_SCHEDULE_TIMEOUT/HZ; + if (!new_conf->timeout) + new_conf->timeout = MAX_SCHEDULE_TIMEOUT/HZ*10; + if (new_conf->ping_int*10 < new_conf->timeout) + new_conf->timeout = new_conf->ping_int*10/6; + if (new_conf->ping_int*10 == new_conf->timeout) + new_conf->ping_int = new_conf->ping_int+1; +#endif + + if (integrity_w_tfm) { + i = crypto_hash_digestsize(integrity_w_tfm); + int_dig_out = kmalloc(i, GFP_KERNEL); + if (!int_dig_out) { + retcode = KMallocFailed; + goto fail; + } + int_dig_in = kmalloc(i, GFP_KERNEL); + if (!int_dig_in) { + retcode = KMallocFailed; + goto fail; + } + int_dig_vv = kmalloc(i, GFP_KERNEL); + if (!int_dig_vv) { + retcode = KMallocFailed; + goto fail; + } + } + + if (!mdev->bitmap) { + if(drbd_bm_init(mdev)) { + retcode = KMallocFailed; + goto fail; + } + } + + D_ASSERT(mdev->net_conf == NULL); + mdev->net_conf = new_conf; + + mdev->send_cnt = 0; + mdev->recv_cnt = 0; + + if (new_tl_hash) { + kfree(mdev->tl_hash); + mdev->tl_hash_s = mdev->net_conf->max_epoch_size/8; + mdev->tl_hash = new_tl_hash; + } + + if (new_ee_hash) { + kfree(mdev->ee_hash); + mdev->ee_hash_s = mdev->net_conf->max_buffers/8; + mdev->ee_hash = new_ee_hash; + } + + crypto_free_hash(mdev->cram_hmac_tfm); + mdev->cram_hmac_tfm = tfm; + + crypto_free_hash(mdev->integrity_w_tfm); + mdev->integrity_w_tfm = integrity_w_tfm; + + crypto_free_hash(mdev->integrity_r_tfm); + mdev->integrity_r_tfm = integrity_r_tfm; + + kfree(mdev->int_dig_out); + kfree(mdev->int_dig_in); + kfree(mdev->int_dig_vv); + mdev->int_dig_out=int_dig_out; + mdev->int_dig_in=int_dig_in; + mdev->int_dig_vv=int_dig_vv; + + retcode = _drbd_request_state(mdev, NS(conn, Unconnected), ChgStateVerbose); + if (retcode >= SS_Success) + drbd_thread_start(&mdev->worker); + + drbd_kobject_uevent(mdev); + reply->ret_code = retcode; + return 0; + +fail: + kfree(int_dig_out); + kfree(int_dig_in); + kfree(int_dig_vv); + crypto_free_hash(tfm); + crypto_free_hash(integrity_w_tfm); + crypto_free_hash(integrity_r_tfm); + kfree(new_tl_hash); + kfree(new_ee_hash); + kfree(new_conf); + + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_disconnect(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode; + + retcode = _drbd_request_state(mdev, NS(conn, Disconnecting), ChgOrdered); + + if (retcode == SS_NothingToDo) + goto done; + else if (retcode == SS_AlreadyStandAlone) + goto done; + else if (retcode == SS_PrimaryNOP) { + /* Our statche checking code wants to see the peer outdated. */ + retcode = drbd_request_state(mdev, NS2(conn, Disconnecting, + pdsk, Outdated)); + } else if (retcode == SS_CW_FailedByPeer) { + /* The peer probabely wants to see us outdated. */ + retcode = _drbd_request_state(mdev, NS2(conn, Disconnecting, + disk, Outdated), + ChgOrdered); + if (retcode == SS_IsDiskLess || retcode == SS_LowerThanOutdated) { + drbd_force_state(mdev, NS(conn, Disconnecting)); + retcode = SS_Success; + } + } + + if (retcode < SS_Success) + goto fail; + + if (wait_event_interruptible(mdev->state_wait, + mdev->state.conn != Disconnecting)) { + /* Do not test for mdev->state.conn == StandAlone, since + someone else might connect us in the mean time! */ + retcode = GotSignal; + goto fail; + } + + done: + retcode = NoError; + fail: + drbd_md_sync(mdev); + reply->ret_code = retcode; + return 0; +} + +void resync_after_online_grow(struct drbd_conf *mdev) +{ + int iass; /* I am sync source */ + + INFO("Resync of new storage after online grow\n"); + if (mdev->state.role != mdev->state.peer) + iass = (mdev->state.role == Primary); + else + iass = test_bit(DISCARD_CONCURRENT, &mdev->flags); + + if (iass) + drbd_start_resync(mdev, SyncSource); + else + _drbd_request_state(mdev, NS(conn, WFSyncUUID), ChgStateVerbose + ChgSerialize); +} + +STATIC int drbd_nl_resize(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + struct resize rs; + int retcode = NoError; + int ldsc = 0; /* local disk size changed */ + enum determin_dev_size_enum dd; + + memset(&rs, 0, sizeof(struct resize)); + if (!resize_from_tags(mdev, nlp->tag_list, &rs)) { + retcode = UnknownMandatoryTag; + goto fail; + } + + if (mdev->state.conn > Connected) { + retcode = NoResizeDuringResync; + goto fail; + } + + if (mdev->state.role == Secondary && + mdev->state.peer == Secondary) { + retcode = APrimaryNodeNeeded; + goto fail; + } + + if (!inc_local(mdev)) { + retcode = HaveNoDiskConfig; + goto fail; + } + + if (mdev->bc->known_size != drbd_get_capacity(mdev->bc->backing_bdev)) { + mdev->bc->known_size = drbd_get_capacity(mdev->bc->backing_bdev); + ldsc = 1; + } + + mdev->bc->dc.disk_size = (sector_t)rs.resize_size; + dd = drbd_determin_dev_size(mdev); + drbd_md_sync(mdev); + dec_local(mdev); + if (dd == dev_size_error) { + retcode = VMallocFailed; + goto fail; + } + + if (mdev->state.conn == Connected && (dd != unchanged || ldsc)) { + drbd_send_uuids(mdev); + drbd_send_sizes(mdev); + if (dd == grew) + resync_after_online_grow(mdev); + } + + fail: + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_syncer_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode = NoError; + int err; + int ovr; /* online verify running */ + int rsr; /* re-sync running */ + struct drbd_conf *odev; + struct crypto_hash *verify_tfm = NULL; + struct crypto_hash *csums_tfm = NULL; + struct syncer_conf sc; + cpumask_t n_cpu_mask = CPU_MASK_NONE; + + memcpy(&sc, &mdev->sync_conf, sizeof(struct syncer_conf)); + + if (nlp->flags & DRBD_NL_SET_DEFAULTS) { + memset(&sc, 0, sizeof(struct syncer_conf)); + sc.rate = DRBD_RATE_DEF; + sc.after = DRBD_AFTER_DEF; + sc.al_extents = DRBD_AL_EXTENTS_DEF; + } + + if (!syncer_conf_from_tags(mdev, nlp->tag_list, &sc)) { + retcode = UnknownMandatoryTag; + goto fail; + } + + if (sc.after != -1) { + if (sc.after < -1 || minor_to_mdev(sc.after) == NULL) { + retcode = SyncAfterInvalid; + goto fail; + } + odev = minor_to_mdev(sc.after); /* check against loops in */ + while (1) { + if (odev == mdev) { + retcode = SyncAfterCycle; + goto fail; + } + if (odev->sync_conf.after == -1) + break; /* no cycles. */ + odev = minor_to_mdev(odev->sync_conf.after); + } + } + + /* re-sync running */ + rsr = ( mdev->state.conn == SyncSource || + mdev->state.conn == SyncTarget || + mdev->state.conn == PausedSyncS || + mdev->state.conn == PausedSyncT ); + + if (rsr && strcmp(sc.csums_alg, mdev->sync_conf.csums_alg)) { + retcode = CSUMSResyncRunning; + goto fail; + } + + if (!rsr && sc.csums_alg[0]) { + csums_tfm = crypto_alloc_hash(sc.csums_alg, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(csums_tfm)) { + csums_tfm = NULL; + retcode = CSUMSAlgNotAvail; + goto fail; + } + + if (crypto_tfm_alg_type(crypto_hash_tfm(csums_tfm)) != CRYPTO_ALG_TYPE_DIGEST) { + retcode = CSUMSAlgNotDigest; + goto fail; + } + } + + /* online verify running */ + ovr = (mdev->state.conn == VerifyS || mdev->state.conn == VerifyT); + + if (ovr) { + if (strcmp(sc.verify_alg, mdev->sync_conf.verify_alg)) { + retcode = VERIFYIsRunning; + goto fail; + } + } + + if (!ovr && sc.verify_alg[0]) { + verify_tfm = crypto_alloc_hash(sc.verify_alg, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(verify_tfm)) { + verify_tfm = NULL; + retcode = VERIFYAlgNotAvail; + goto fail; + } + + if (crypto_tfm_alg_type(crypto_hash_tfm(verify_tfm)) != CRYPTO_ALG_TYPE_DIGEST) { + retcode = VERIFYAlgNotDigest; + goto fail; + } + } + + if (sc.cpu_mask[0] != 0) { + err = __bitmap_parse(sc.cpu_mask, 32, 0, (unsigned long *)&n_cpu_mask, NR_CPUS); + if (err) { + drbd_WARN("__bitmap_parse() failed with %d\n", err); + retcode = CPUMaskParseFailed; + goto fail; + } + } + + ERR_IF (sc.rate < 1) sc.rate = 1; + ERR_IF (sc.al_extents < 7) sc.al_extents = 127; /* arbitrary minimum */ +#define AL_MAX ((MD_AL_MAX_SIZE-1) * AL_EXTENTS_PT) + if (sc.al_extents > AL_MAX) { + ERR("sc.al_extents > %d\n", AL_MAX); + sc.al_extents = AL_MAX; + } +#undef AL_MAX + + spin_lock(&mdev->peer_seq_lock); + /* lock against receive_SyncParam() */ + mdev->sync_conf = sc; + + if (!rsr) { + crypto_free_hash(mdev->csums_tfm); + mdev->csums_tfm = csums_tfm; + csums_tfm = NULL; + } + + if (!ovr) { + crypto_free_hash(mdev->verify_tfm); + mdev->verify_tfm = verify_tfm; + verify_tfm = NULL; + } + spin_unlock(&mdev->peer_seq_lock); + + if (inc_local(mdev)) { + wait_event(mdev->al_wait, lc_try_lock(mdev->act_log)); + drbd_al_shrink(mdev); + err = drbd_check_al_size(mdev); + lc_unlock(mdev->act_log); + wake_up(&mdev->al_wait); + + dec_local(mdev); + drbd_md_sync(mdev); + + if (err) { + retcode = KMallocFailed; + goto fail; + } + } + + if (mdev->state.conn >= Connected) + drbd_send_sync_param(mdev, &sc); + + drbd_alter_sa(mdev, sc.after); + + if (!cpus_equal(mdev->cpu_mask, n_cpu_mask)) { + mdev->cpu_mask = n_cpu_mask; + mdev->cpu_mask = drbd_calc_cpu_mask(mdev); + mdev->receiver.reset_cpu_mask = 1; + mdev->asender.reset_cpu_mask = 1; + mdev->worker.reset_cpu_mask = 1; + } + + drbd_kobject_uevent(mdev); +fail: + crypto_free_hash(csums_tfm); + crypto_free_hash(verify_tfm); + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_invalidate(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode; + + retcode = _drbd_request_state(mdev, NS(conn, StartingSyncT), ChgOrdered); + + if (retcode < SS_Success && retcode != SS_NeedConnection) + retcode = drbd_request_state(mdev, NS(conn, StartingSyncT)); + + while (retcode == SS_NeedConnection) { + spin_lock_irq(&mdev->req_lock); + if (mdev->state.conn < Connected) + retcode = _drbd_set_state(_NS(mdev, disk, Inconsistent), ChgStateVerbose, NULL); + spin_unlock_irq(&mdev->req_lock); + + if (retcode != SS_NeedConnection) + break; + + retcode = drbd_request_state(mdev, NS(conn, StartingSyncT)); + } + + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_invalidate_peer(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + + reply->ret_code = drbd_request_state(mdev, NS(conn, StartingSyncS)); + + return 0; +} + +STATIC int drbd_nl_pause_sync(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode = NoError; + + if (drbd_request_state(mdev, NS(user_isp, 1)) == SS_NothingToDo) + retcode = PauseFlagAlreadySet; + + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_resume_sync(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode = NoError; + + if (drbd_request_state(mdev, NS(user_isp, 0)) == SS_NothingToDo) + retcode = PauseFlagAlreadyClear; + + reply->ret_code = retcode; + return 0; +} + +STATIC int drbd_nl_suspend_io(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + reply->ret_code = drbd_request_state(mdev, NS(susp, 1)); + + return 0; +} + +STATIC int drbd_nl_resume_io(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + reply->ret_code = drbd_request_state(mdev, NS(susp, 0)); + return 0; +} + +STATIC int drbd_nl_outdate(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + reply->ret_code = drbd_request_state(mdev, NS(disk, Outdated)); + return 0; +} + +STATIC int drbd_nl_get_config(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + unsigned short *tl; + + tl = reply->tag_list; + + if (inc_local(mdev)) { + tl = disk_conf_to_tags(mdev, &mdev->bc->dc, tl); + dec_local(mdev); + } + + if (inc_net(mdev)) { + tl = net_conf_to_tags(mdev, mdev->net_conf, tl); + dec_net(mdev); + } + tl = syncer_conf_to_tags(mdev, &mdev->sync_conf, tl); + + *tl++ = TT_END; /* Close the tag list */ + + return (int)((char *)tl - (char *)reply->tag_list); +} + +STATIC int drbd_nl_get_state(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + unsigned short *tl = reply->tag_list; + union drbd_state_t s = mdev->state; + unsigned long rs_left; + unsigned int res; + + tl = get_state_to_tags(mdev, (struct get_state *)&s, tl); + + /* no local ref, no bitmap, no syncer progress. */ + if (s.conn >= SyncSource && s.conn <= PausedSyncT) { + if (inc_local(mdev)) { + drbd_get_syncer_progress(mdev, &rs_left, &res); + *tl++ = T_sync_progress; + *tl++ = sizeof(int); + memcpy(tl, &res, sizeof(int)); + tl = (unsigned short *)((char *)tl + sizeof(int)); + dec_local(mdev); + } + } + *tl++ = TT_END; /* Close the tag list */ + + return (int)((char *)tl - (char *)reply->tag_list); +} + +STATIC int drbd_nl_get_uuids(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + unsigned short *tl; + + tl = reply->tag_list; + + if (inc_local(mdev)) { + /* This is a hand crafted add tag ;) */ + *tl++ = T_uuids; + *tl++ = UUID_SIZE*sizeof(u64); + memcpy(tl, mdev->bc->md.uuid, UUID_SIZE*sizeof(u64)); + tl = (unsigned short *)((char *)tl + UUID_SIZE*sizeof(u64)); + *tl++ = T_uuids_flags; + *tl++ = sizeof(int); + memcpy(tl, &mdev->bc->md.flags, sizeof(int)); + tl = (unsigned short *)((char *)tl + sizeof(int)); + dec_local(mdev); + } + *tl++ = TT_END; /* Close the tag list */ + + return (int)((char *)tl - (char *)reply->tag_list); +} + +/** + * drbd_nl_get_timeout_flag: + * Is used by drbdsetup to find out which timeout value to use. + */ +STATIC int drbd_nl_get_timeout_flag(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + unsigned short *tl; + char rv; + + tl = reply->tag_list; + + rv = mdev->state.pdsk == Outdated ? UT_PeerOutdated : + test_bit(USE_DEGR_WFC_T, &mdev->flags) ? UT_Degraded : UT_Default; + + /* This is a hand crafted add tag ;) */ + *tl++ = T_use_degraded; + *tl++ = sizeof(char); + *((char *)tl) = rv; + tl = (unsigned short *)((char *)tl + sizeof(char)); + *tl++ = TT_END; + + return (int)((char *)tl - (char *)reply->tag_list); +} + +STATIC int drbd_nl_start_ov(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + reply->ret_code = drbd_request_state(mdev,NS(conn,VerifyS)); + + return 0; +} + + +STATIC int drbd_nl_new_c_uuid(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, + struct drbd_nl_cfg_reply *reply) +{ + int retcode = NoError; + int err; + + struct new_c_uuid args; + + memset(&args, 0, sizeof(struct new_c_uuid)); + if (!new_c_uuid_from_tags(mdev, nlp->tag_list, &args)) { + reply->ret_code = UnknownMandatoryTag; + return 0; + } + + mutex_lock(&mdev->state_mutex); /* Protects us against serialized state changes. */ + + if (mdev->state.conn >= Connected) { + retcode = MayNotBeConnected; + goto out; + } + + if (!inc_local(mdev)) { + retcode = HaveNoDiskConfig; + goto out; + } + + drbd_uuid_set(mdev, Bitmap, 0); /* Rotate Bitmap to History 1, etc... */ + drbd_uuid_new_current(mdev); /* New current, previous to Bitmap */ + + if (args.clear_bm) { + err = drbd_bitmap_io(mdev, &drbd_bmio_clear_n_write, "clear_n_write from new_c_uuid"); + if (err) { + ERR("Writing bitmap failed with %d\n",err); + retcode = MDIOError; + } + } + + drbd_md_sync(mdev); + dec_local(mdev); +out: + mutex_unlock(&mdev->state_mutex); + + reply->ret_code = retcode; + return 0; +} + +STATIC struct drbd_conf *ensure_mdev(struct drbd_nl_cfg_req *nlp) +{ + struct drbd_conf *mdev; + + if (nlp->drbd_minor >= minor_count) + return NULL; + + mdev = minor_to_mdev(nlp->drbd_minor); + + if (!mdev && (nlp->flags & DRBD_NL_CREATE_DEVICE)) { + struct gendisk *disk = NULL; + mdev = drbd_new_device(nlp->drbd_minor); + + spin_lock_irq(&drbd_pp_lock); + if (minor_table[nlp->drbd_minor] == NULL) { + minor_table[nlp->drbd_minor] = mdev; + disk = mdev->vdisk; + mdev = NULL; + } /* else: we lost the race */ + spin_unlock_irq(&drbd_pp_lock); + + if (disk) /* we won the race above */ + /* in case we ever add a drbd_delete_device(), + * don't forget the del_gendisk! */ + add_disk(disk); + else /* we lost the race above */ + drbd_free_mdev(mdev); + + mdev = minor_to_mdev(nlp->drbd_minor); + } + + return mdev; +} + +struct cn_handler_struct { + int (*function)(struct drbd_conf *, + struct drbd_nl_cfg_req *, + struct drbd_nl_cfg_reply *); + int reply_body_size; +}; + +static struct cn_handler_struct cnd_table[] = { + [ P_primary ] = { &drbd_nl_primary, 0 }, + [ P_secondary ] = { &drbd_nl_secondary, 0 }, + [ P_disk_conf ] = { &drbd_nl_disk_conf, 0 }, + [ P_detach ] = { &drbd_nl_detach, 0 }, + [ P_net_conf ] = { &drbd_nl_net_conf, 0 }, + [ P_disconnect ] = { &drbd_nl_disconnect, 0 }, + [ P_resize ] = { &drbd_nl_resize, 0 }, + [ P_syncer_conf ] = { &drbd_nl_syncer_conf, 0 }, + [ P_invalidate ] = { &drbd_nl_invalidate, 0 }, + [ P_invalidate_peer ] = { &drbd_nl_invalidate_peer, 0 }, + [ P_pause_sync ] = { &drbd_nl_pause_sync, 0 }, + [ P_resume_sync ] = { &drbd_nl_resume_sync, 0 }, + [ P_suspend_io ] = { &drbd_nl_suspend_io, 0 }, + [ P_resume_io ] = { &drbd_nl_resume_io, 0 }, + [ P_outdate ] = { &drbd_nl_outdate, 0 }, + [ P_get_config ] = { &drbd_nl_get_config, + sizeof(struct syncer_conf_tag_len_struct) + + sizeof(struct disk_conf_tag_len_struct) + + sizeof(struct net_conf_tag_len_struct) }, + [ P_get_state ] = { &drbd_nl_get_state, + sizeof(struct get_state_tag_len_struct) + + sizeof(struct sync_progress_tag_len_struct) }, + [ P_get_uuids ] = { &drbd_nl_get_uuids, + sizeof(struct get_uuids_tag_len_struct) }, + [ P_get_timeout_flag ] = { &drbd_nl_get_timeout_flag, + sizeof(struct get_timeout_flag_tag_len_struct)}, + [ P_start_ov ] = { &drbd_nl_start_ov, 0 }, + [ P_new_c_uuid ] = { &drbd_nl_new_c_uuid, 0 }, +}; + +STATIC void drbd_connector_callback(void *data) +{ + struct cn_msg *req = data; + struct drbd_nl_cfg_req *nlp = (struct drbd_nl_cfg_req *)req->data; + struct cn_handler_struct *cm; + struct cn_msg *cn_reply; + struct drbd_nl_cfg_reply *reply; + struct drbd_conf *mdev; + int retcode, rr; + int reply_size = sizeof(struct cn_msg) + + sizeof(struct drbd_nl_cfg_reply) + + sizeof(short int); + + if (!try_module_get(THIS_MODULE)) { + printk(KERN_ERR "drbd: try_module_get() failed!\n"); + return; + } + + mdev = ensure_mdev(nlp); + if (!mdev) { + retcode = MinorNotKnown; + goto fail; + } + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_packet(data);); + + if (nlp->packet_type >= P_nl_after_last_packet) { + retcode = UnknownNetLinkPacket; + goto fail; + } + + cm = cnd_table + nlp->packet_type; + + /* This may happen if packet number is 0: */ + if (cm->function == NULL) { + retcode = UnknownNetLinkPacket; + goto fail; + } + + reply_size += cm->reply_body_size; + + cn_reply = kmalloc(reply_size, GFP_KERNEL); + if (!cn_reply) { + retcode = KMallocFailed; + goto fail; + } + reply = (struct drbd_nl_cfg_reply *) cn_reply->data; + + reply->packet_type = + cm->reply_body_size ? nlp->packet_type : P_nl_after_last_packet; + reply->minor = nlp->drbd_minor; + reply->ret_code = NoError; /* Might by modified by cm->function. */ + /* reply->tag_list; might be modified by cm->fucntion. */ + + rr = cm->function(mdev, nlp, reply); + + cn_reply->id = req->id; + cn_reply->seq = req->seq; + cn_reply->ack = req->ack + 1; + cn_reply->len = sizeof(struct drbd_nl_cfg_reply) + rr; + cn_reply->flags = 0; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + rr = cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); + if (rr && rr != -ESRCH) + printk(KERN_INFO "drbd: cn_netlink_send()=%d\n", rr); + + kfree(cn_reply); + module_put(THIS_MODULE); + return; + fail: + drbd_nl_send_reply(req, retcode); + module_put(THIS_MODULE); +} + +static atomic_t drbd_nl_seq = ATOMIC_INIT(2); /* two. */ + +static inline unsigned short * +__tl_add_blob(unsigned short *tl, enum drbd_tags tag, const void *data, + int len, int nul_terminated) +{ + int l = tag_descriptions[tag_number(tag)].max_len; + l = (len < l) ? len : l; + *tl++ = tag; + *tl++ = len; + memcpy(tl, data, len); + /* TODO + * maybe we need to add some padding to the data stream. + * otherwise we may get strange effects on architectures + * that require certain data types to be strictly aligned, + * because now the next "unsigned short" may be misaligned. */ + tl = (unsigned short*)((char*)tl + len); + if (nul_terminated) + *((char*)tl - 1) = 0; + return tl; +} + +static inline unsigned short * +tl_add_blob(unsigned short *tl, enum drbd_tags tag, const void *data, int len) +{ + return __tl_add_blob(tl, tag, data, len, 0); +} + +static inline unsigned short * +tl_add_str(unsigned short *tl, enum drbd_tags tag, const char *str) +{ + return __tl_add_blob(tl, tag, str, strlen(str)+1, 0); +} + +static inline unsigned short * +tl_add_int(unsigned short *tl, enum drbd_tags tag, const void *val) +{ + switch(tag_type(tag)) { + case TT_INTEGER: + *tl++ = tag; + *tl++ = sizeof(int); + *(int*)tl = *(int*)val; + tl = (unsigned short*)((char*)tl+sizeof(int)); + break; + case TT_INT64: + *tl++ = tag; + *tl++ = sizeof(u64); + *(u64*)tl = *(u64*)val; + tl = (unsigned short*)((char*)tl+sizeof(u64)); + break; + default: + /* someone did something stupid. */ + ; + } + return tl; +} + +void drbd_bcast_state(struct drbd_conf *mdev, union drbd_state_t state) +{ + char buffer[sizeof(struct cn_msg)+ + sizeof(struct drbd_nl_cfg_reply)+ + sizeof(struct get_state_tag_len_struct)+ + sizeof(short int)]; + struct cn_msg *cn_reply = (struct cn_msg *) buffer; + struct drbd_nl_cfg_reply *reply = + (struct drbd_nl_cfg_reply *)cn_reply->data; + unsigned short *tl = reply->tag_list; + + /* drbd_WARN("drbd_bcast_state() got called\n"); */ + + tl = get_state_to_tags(mdev, (struct get_state *)&state, tl); + *tl++ = TT_END; /* Close the tag list */ + + cn_reply->id.idx = CN_IDX_DRBD; + cn_reply->id.val = CN_VAL_DRBD; + + cn_reply->seq = atomic_add_return(1, &drbd_nl_seq); + cn_reply->ack = 0; /* not used here. */ + cn_reply->len = sizeof(struct drbd_nl_cfg_reply) + + (int)((char *)tl - (char *)reply->tag_list); + cn_reply->flags = 0; + + reply->packet_type = P_get_state; + reply->minor = mdev_to_minor(mdev); + reply->ret_code = NoError; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); +} + +void drbd_bcast_ev_helper(struct drbd_conf *mdev, char *helper_name) +{ + char buffer[sizeof(struct cn_msg)+ + sizeof(struct drbd_nl_cfg_reply)+ + sizeof(struct call_helper_tag_len_struct)+ + sizeof(short int)]; + struct cn_msg *cn_reply = (struct cn_msg *) buffer; + struct drbd_nl_cfg_reply *reply = + (struct drbd_nl_cfg_reply *)cn_reply->data; + unsigned short *tl = reply->tag_list; + int str_len; + + /* drbd_WARN("drbd_bcast_state() got called\n"); */ + + str_len = strlen(helper_name)+1; + *tl++ = T_helper; + *tl++ = str_len; + memcpy(tl, helper_name, str_len); + tl = (unsigned short *)((char *)tl + str_len); + *tl++ = TT_END; /* Close the tag list */ + + cn_reply->id.idx = CN_IDX_DRBD; + cn_reply->id.val = CN_VAL_DRBD; + + cn_reply->seq = atomic_add_return(1, &drbd_nl_seq); + cn_reply->ack = 0; /* not used here. */ + cn_reply->len = sizeof(struct drbd_nl_cfg_reply) + + (int)((char *)tl - (char *)reply->tag_list); + cn_reply->flags = 0; + + reply->packet_type = P_call_helper; + reply->minor = mdev_to_minor(mdev); + reply->ret_code = NoError; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); +} + +void drbd_bcast_ee(struct drbd_conf *mdev, + const char *reason, const int dgs, + const char* seen_hash, const char* calc_hash, + const struct Tl_epoch_entry* e) +{ + struct cn_msg *cn_reply; + struct drbd_nl_cfg_reply *reply; + struct bio_vec *bvec; + unsigned short *tl; + int i; + + if (!e) + return; + if (!reason || !reason[0]) + return; + + /* aparently we have to memcpy twice, first to prepare the data for the + * struct cn_msg, then within cn_netlink_send from the cn_msg to the + * netlink skb. */ + cn_reply = kmalloc( + sizeof(struct cn_msg)+ + sizeof(struct drbd_nl_cfg_reply)+ + sizeof(struct dump_ee_tag_len_struct)+ + sizeof(short int) + , GFP_KERNEL); + + if (!cn_reply) { + ERR("could not kmalloc buffer for drbd_bcast_ee, sector %llu, size %u\n", + (unsigned long long)e->sector, e->size); + return; + } + + reply = (struct drbd_nl_cfg_reply*)cn_reply->data; + tl = reply->tag_list; + + tl = tl_add_str(tl, T_dump_ee_reason, reason); + tl = tl_add_blob(tl, T_seen_digest, seen_hash, dgs); + tl = tl_add_blob(tl, T_calc_digest, calc_hash, dgs); + tl = tl_add_int(tl, T_ee_sector, &e->sector); + tl = tl_add_int(tl, T_ee_block_id, &e->block_id); + + *tl++ = T_ee_data; + *tl++ = e->size; + + __bio_for_each_segment(bvec, e->private_bio, i, 0) { + void *d = kmap(bvec->bv_page); + memcpy(tl, d + bvec->bv_offset, bvec->bv_len); + kunmap(bvec->bv_page); + tl=(unsigned short*)((char*)tl + bvec->bv_len); + } + *tl++ = TT_END; /* Close the tag list */ + + cn_reply->id.idx = CN_IDX_DRBD; + cn_reply->id.val = CN_VAL_DRBD; + + cn_reply->seq = atomic_add_return(1,&drbd_nl_seq); + cn_reply->ack = 0; // not used here. + cn_reply->len = sizeof(struct drbd_nl_cfg_reply) + + (int)((char*)tl - (char*)reply->tag_list); + cn_reply->flags = 0; + + reply->packet_type = P_dump_ee; + reply->minor = mdev_to_minor(mdev); + reply->ret_code = NoError; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); + kfree(cn_reply); +} + +void drbd_bcast_sync_progress(struct drbd_conf *mdev) +{ + char buffer[sizeof(struct cn_msg)+ + sizeof(struct drbd_nl_cfg_reply)+ + sizeof(struct sync_progress_tag_len_struct)+ + sizeof(short int)]; + struct cn_msg *cn_reply = (struct cn_msg *) buffer; + struct drbd_nl_cfg_reply *reply = + (struct drbd_nl_cfg_reply *)cn_reply->data; + unsigned short *tl = reply->tag_list; + unsigned long rs_left; + unsigned int res; + + /* no local ref, no bitmap, no syncer progress, no broadcast. */ + if (!inc_local(mdev)) + return; + drbd_get_syncer_progress(mdev, &rs_left, &res); + dec_local(mdev); + + *tl++ = T_sync_progress; + *tl++ = sizeof(int); + memcpy(tl, &res, sizeof(int)); + tl = (unsigned short *)((char *)tl + sizeof(int)); + *tl++ = TT_END; /* Close the tag list */ + + cn_reply->id.idx = CN_IDX_DRBD; + cn_reply->id.val = CN_VAL_DRBD; + + cn_reply->seq = atomic_add_return(1, &drbd_nl_seq); + cn_reply->ack = 0; /* not used here. */ + cn_reply->len = sizeof(struct drbd_nl_cfg_reply) + + (int)((char *)tl - (char *)reply->tag_list); + cn_reply->flags = 0; + + reply->packet_type = P_sync_progress; + reply->minor = mdev_to_minor(mdev); + reply->ret_code = NoError; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); +} + +int __init drbd_nl_init(void) +{ + static struct cb_id cn_id_drbd; + int err, try=10; + + cn_id_drbd.val = CN_VAL_DRBD; + do { + cn_id_drbd.idx = cn_idx; + err = cn_add_callback(&cn_id_drbd, "cn_drbd", &drbd_connector_callback); + if (!err) + break; + cn_idx = (cn_idx + CN_IDX_STEP); + } while (try--); + + if (err) { + printk(KERN_ERR "drbd: cn_drbd failed to register\n"); + return err; + } + + return 0; +} + +void drbd_nl_cleanup(void) +{ + static struct cb_id cn_id_drbd; + + cn_id_drbd.idx = cn_idx; + cn_id_drbd.val = CN_VAL_DRBD; + + cn_del_callback(&cn_id_drbd); +} + +void drbd_nl_send_reply(struct cn_msg *req, int ret_code) +{ + char buffer[sizeof(struct cn_msg)+sizeof(struct drbd_nl_cfg_reply)]; + struct cn_msg *cn_reply = (struct cn_msg *) buffer; + struct drbd_nl_cfg_reply *reply = + (struct drbd_nl_cfg_reply *)cn_reply->data; + int rr; + + cn_reply->id = req->id; + + cn_reply->seq = req->seq; + cn_reply->ack = req->ack + 1; + cn_reply->len = sizeof(struct drbd_nl_cfg_reply); + cn_reply->flags = 0; + + reply->minor = ((struct drbd_nl_cfg_req *)req->data)->drbd_minor; + reply->ret_code = ret_code; + + TRACE(TraceTypeNl, TraceLvlSummary, nl_trace_reply(cn_reply);); + + rr = cn_netlink_send(cn_reply, CN_IDX_DRBD, GFP_KERNEL); + if (rr && rr != -ESRCH) + printk(KERN_INFO "drbd: cn_netlink_send()=%d\n", rr); +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/lru_cache.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/lru_cache.c @@ -0,0 +1,397 @@ +/* + lru_cache.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2003-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2003-2008, Philipp Reisner . + Copyright (C) 2003-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include +#include /* for memset */ +#include /* for seq_printf */ +#include "lru_cache.h" + +/* this is developers aid only! */ +#define PARANOIA_ENTRY() BUG_ON(test_and_set_bit(__LC_PARANOIA, &lc->flags)) +#define PARANOIA_LEAVE() do { clear_bit(__LC_PARANOIA, &lc->flags); smp_mb__after_clear_bit(); } while (0) +#define RETURN(x...) do { PARANOIA_LEAVE(); return x ; } while (0) + +static inline size_t size_of_lc(unsigned int e_count, size_t e_size) +{ + return sizeof(struct lru_cache) + + e_count * (e_size + sizeof(struct hlist_head)); +} + +static inline void lc_init(struct lru_cache *lc, + const size_t bytes, const char *name, + const unsigned int e_count, const size_t e_size, + void *private_p) +{ + struct lc_element *e; + unsigned int i; + + memset(lc, 0, bytes); + INIT_LIST_HEAD(&lc->in_use); + INIT_LIST_HEAD(&lc->lru); + INIT_LIST_HEAD(&lc->free); + lc->element_size = e_size; + lc->nr_elements = e_count; + lc->new_number = -1; + lc->lc_private = private_p; + lc->name = name; + for (i = 0; i < e_count; i++) { + e = lc_entry(lc, i); + e->lc_number = LC_FREE; + list_add(&e->list, &lc->free); + /* memset(,0,) did the rest of init for us */ + } +} + +/** + * lc_alloc: allocates memory for @e_count objects of @e_size bytes plus the + * struct lru_cache, and the hash table slots. + * returns pointer to a newly initialized lru_cache object with said parameters. + */ +struct lru_cache *lc_alloc(const char *name, unsigned int e_count, + size_t e_size, void *private_p) +{ + struct lru_cache *lc; + size_t bytes; + + BUG_ON(!e_count); + e_size = max(sizeof(struct lc_element), e_size); + bytes = size_of_lc(e_count, e_size); + lc = vmalloc(bytes); + if (lc) + lc_init(lc, bytes, name, e_count, e_size, private_p); + return lc; +} + +/** + * lc_free: Frees memory allocated by lc_alloc. + * @lc: The lru_cache object + */ +void lc_free(struct lru_cache *lc) +{ + vfree(lc); +} + +/** + * lc_reset: does a full reset for @lc and the hash table slots. + * It is roughly the equivalent of re-allocating a fresh lru_cache object, + * basically a short cut to lc_free(lc); lc = lc_alloc(...); + */ +void lc_reset(struct lru_cache *lc) +{ + lc_init(lc, size_of_lc(lc->nr_elements, lc->element_size), lc->name, + lc->nr_elements, lc->element_size, lc->lc_private); +} + +size_t lc_printf_stats(struct seq_file *seq, struct lru_cache *lc) +{ + /* NOTE: + * total calls to lc_get are + * (starving + hits + misses) + * misses include "dirty" count (update from an other thread in + * progress) and "changed", when this in fact lead to an successful + * update of the cache. + */ + return seq_printf(seq, "\t%s: used:%u/%u " + "hits:%lu misses:%lu starving:%lu dirty:%lu changed:%lu\n", + lc->name, lc->used, lc->nr_elements, + lc->hits, lc->misses, lc->starving, lc->dirty, lc->changed); +} + +static unsigned int lc_hash_fn(struct lru_cache *lc, unsigned int enr) +{ + return enr % lc->nr_elements; +} + + +/** + * lc_find: Returns the pointer to an element, if the element is present + * in the hash table. In case it is not this function returns NULL. + * @lc: The lru_cache object + * @enr: element number + */ +struct lc_element *lc_find(struct lru_cache *lc, unsigned int enr) +{ + struct hlist_node *n; + struct lc_element *e; + + BUG_ON(!lc); + BUG_ON(!lc->nr_elements); + hlist_for_each_entry(e, n, lc->slot + lc_hash_fn(lc, enr), colision) { + if (e->lc_number == enr) + return e; + } + return NULL; +} + +static struct lc_element *lc_evict(struct lru_cache *lc) +{ + struct list_head *n; + struct lc_element *e; + + if (list_empty(&lc->lru)) + return NULL; + + n = lc->lru.prev; + e = list_entry(n, struct lc_element, list); + + list_del(&e->list); + hlist_del(&e->colision); + return e; +} + +/** + * lc_del: Removes an element from the cache (and therefore adds the + * element's storage to the free list) + * + * @lc: The lru_cache object + * @e: The element to remove + */ +void lc_del(struct lru_cache *lc, struct lc_element *e) +{ + PARANOIA_ENTRY(); + BUG_ON(e->refcnt); + list_del(&e->list); + hlist_del_init(&e->colision); + e->lc_number = LC_FREE; + e->refcnt = 0; + list_add(&e->list, &lc->free); + RETURN(); +} + +static struct lc_element *lc_get_unused_element(struct lru_cache *lc) +{ + struct list_head *n; + + if (list_empty(&lc->free)) + return lc_evict(lc); + + n = lc->free.next; + list_del(n); + return list_entry(n, struct lc_element, list); +} + +static int lc_unused_element_available(struct lru_cache *lc) +{ + if (!list_empty(&lc->free)) + return 1; /* something on the free list */ + if (!list_empty(&lc->lru)) + return 1; /* something to evict */ + + return 0; +} + + +/** + * lc_get: Finds an element in the cache, increases its usage count, + * "touches" and returns it. + * In case the requested number is not present, it needs to be added to the + * cache. Therefore it is possible that an other element becomes eviced from + * the cache. In either case, the user is notified so he is able to e.g. keep + * a persistent log of the cache changes, and therefore the objects in use. + * + * Return values: + * NULL if the requested element number was not in the cache, and no unused + * element could be recycled + * pointer to the element with the REQUESTED element number + * In this case, it can be used right away + * + * pointer to an UNUSED element with some different element number. + * In this case, the cache is marked dirty, and the returned element + * pointer is removed from the lru list and hash collision chains. + * The user now should do whatever houskeeping is necessary. Then he + * needs to call lc_element_changed(lc,element_pointer), to finish the + * change. + * + * NOTE: The user needs to check the lc_number on EACH use, so he recognizes + * any cache set change. + * + * @lc: The lru_cache object + * @enr: element number + */ +struct lc_element *lc_get(struct lru_cache *lc, unsigned int enr) +{ + struct lc_element *e; + + BUG_ON(!lc); + BUG_ON(!lc->nr_elements); + + PARANOIA_ENTRY(); + if (lc->flags & LC_STARVING) { + ++lc->starving; + RETURN(NULL); + } + + e = lc_find(lc, enr); + if (e) { + ++lc->hits; + if (e->refcnt++ == 0) + lc->used++; + list_move(&e->list, &lc->in_use); /* Not evictable... */ + RETURN(e); + } + + ++lc->misses; + + /* In case there is nothing available and we can not kick out + * the LRU element, we have to wait ... + */ + if (!lc_unused_element_available(lc)) { + __set_bit(__LC_STARVING, &lc->flags); + RETURN(NULL); + } + + /* it was not present in the cache, find an unused element, + * which then is replaced. + * we need to update the cache; serialize on lc->flags & LC_DIRTY + */ + if (test_and_set_bit(__LC_DIRTY, &lc->flags)) { + ++lc->dirty; + RETURN(NULL); + } + + e = lc_get_unused_element(lc); + BUG_ON(!e); + + clear_bit(__LC_STARVING, &lc->flags); + BUG_ON(++e->refcnt != 1); + lc->used++; + + lc->changing_element = e; + lc->new_number = enr; + + RETURN(e); +} + +/* similar to lc_get, + * but only gets a new reference on an existing element. + * you either get the requested element, or NULL. + */ +struct lc_element *lc_try_get(struct lru_cache *lc, unsigned int enr) +{ + struct lc_element *e; + + BUG_ON(!lc); + BUG_ON(!lc->nr_elements); + + PARANOIA_ENTRY(); + if (lc->flags & LC_STARVING) { + ++lc->starving; + RETURN(NULL); + } + + e = lc_find(lc, enr); + if (e) { + ++lc->hits; + if (e->refcnt++ == 0) + lc->used++; + list_move(&e->list, &lc->in_use); /* Not evictable... */ + } + RETURN(e); +} + +void lc_changed(struct lru_cache *lc, struct lc_element *e) +{ + PARANOIA_ENTRY(); + BUG_ON(e != lc->changing_element); + ++lc->changed; + e->lc_number = lc->new_number; + list_add(&e->list, &lc->in_use); + hlist_add_head(&e->colision, + lc->slot + lc_hash_fn(lc, lc->new_number)); + lc->changing_element = NULL; + lc->new_number = -1; + clear_bit(__LC_DIRTY, &lc->flags); + smp_mb__after_clear_bit(); + RETURN(); +} + + +unsigned int lc_put(struct lru_cache *lc, struct lc_element *e) +{ + BUG_ON(!lc); + BUG_ON(!lc->nr_elements); + BUG_ON(!e); + + PARANOIA_ENTRY(); + BUG_ON(e->refcnt == 0); + BUG_ON(e == lc->changing_element); + if (--e->refcnt == 0) { + /* move it to the front of LRU. */ + list_move(&e->list, &lc->lru); + lc->used--; + clear_bit(__LC_STARVING, &lc->flags); + smp_mb__after_clear_bit(); + } + RETURN(e->refcnt); +} + + +/** + * lc_set: Sets an element in the cache. You might use this function to + * setup the cache. It is expected that the elements are properly initialized. + * @lc: The lru_cache object + * @enr: element number + * @index: The elements' position in the cache + */ +void lc_set(struct lru_cache *lc, unsigned int enr, int index) +{ + struct lc_element *e; + + if (index < 0 || index >= lc->nr_elements) + return; + + e = lc_entry(lc, index); + e->lc_number = enr; + + hlist_del_init(&e->colision); + hlist_add_head(&e->colision, lc->slot + lc_hash_fn(lc, enr)); + list_move(&e->list, e->refcnt ? &lc->in_use : &lc->lru); +} + +/** + * lc_dump: Dump a complete LRU cache to seq in textual form. + */ +void lc_dump(struct lru_cache *lc, struct seq_file *seq, char *utext, + void (*detail) (struct seq_file *, struct lc_element *)) +{ + unsigned int nr_elements = lc->nr_elements; + struct lc_element *e; + int i; + + seq_printf(seq, "\tnn: lc_number refcnt %s\n ", utext); + for (i = 0; i < nr_elements; i++) { + e = lc_entry(lc, i); + if (e->lc_number == LC_FREE) { + seq_printf(seq, "\t%2d: FREE\n", i); + } else { + seq_printf(seq, "\t%2d: %4u %4u ", i, + e->lc_number, + e->refcnt); + detail(seq, e); + } + } +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_main.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_main.c @@ -0,0 +1,4045 @@ +/* + drbd.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define __KERNEL_SYSCALLS__ +#include +#include + +#include +#include +#include "drbd_int.h" +#include "drbd_req.h" /* only for _req_mod in tl_release and tl_clear */ + +#include "drbd_vli.h" + +#ifndef DRBD_MAJOR +#define DRBD_MAJOR 147 +#endif + +struct after_state_chg_work { + struct drbd_work w; + union drbd_state_t os; + union drbd_state_t ns; + enum chg_state_flags flags; + struct completion *done; +}; + +int drbdd_init(struct Drbd_thread *); +int drbd_worker(struct Drbd_thread *); +int drbd_asender(struct Drbd_thread *); + +int drbd_init(void); +static int drbd_open(struct block_device *bdev, fmode_t mode); +static int drbd_release(struct gendisk *gd, fmode_t mode); +STATIC int w_after_state_ch(struct drbd_conf *mdev, struct drbd_work *w, int unused); +STATIC void after_state_ch(struct drbd_conf *mdev, union drbd_state_t os, + union drbd_state_t ns, enum chg_state_flags flags); +STATIC int w_md_sync(struct drbd_conf *mdev, struct drbd_work *w, int unused); +STATIC void md_sync_timer_fn(unsigned long data); +STATIC int w_bitmap_io(struct drbd_conf *mdev, struct drbd_work *w, int unused); + +MODULE_AUTHOR("Philipp Reisner , " + "Lars Ellenberg "); +MODULE_DESCRIPTION("drbd - Distributed Replicated Block Device v" REL_VERSION); +MODULE_LICENSE("GPL"); +MODULE_PARM_DESC(minor_count, "Maximum number of drbd devices (1-255)"); +MODULE_ALIAS_BLOCKDEV_MAJOR(DRBD_MAJOR); + +#include +/* allow_open_on_secondary */ +MODULE_PARM_DESC(allow_oos, "DONT USE!"); +/* thanks to these macros, if compiled into the kernel (not-module), + * this becomes the boot parameter drbd.minor_count */ +module_param(minor_count, uint, 0444); +module_param(allow_oos, bool, 0); +module_param(cn_idx, uint, 0444); + +#ifdef DRBD_ENABLE_FAULTS +int enable_faults; +int fault_rate; +static int fault_count; +int fault_devs; +/* bitmap of enabled faults */ +module_param(enable_faults, int, 0664); +/* fault rate % value - applies to all enabled faults */ +module_param(fault_rate, int, 0664); +/* count of faults inserted */ +module_param(fault_count, int, 0664); +/* bitmap of devices to insert faults on */ +module_param(fault_devs, int, 0644); +#endif + +/* module parameter, defined */ +unsigned int minor_count = 32; +int allow_oos; +unsigned int cn_idx = CN_IDX_DRBD; + +#ifdef ENABLE_DYNAMIC_TRACE +int trace_type; /* Bitmap of trace types to enable */ +int trace_level; /* Current trace level */ +int trace_devs; /* Bitmap of devices to trace */ +int proc_details; /* Detail level in proc drbd*/ + +module_param(trace_level, int, 0644); +module_param(trace_type, int, 0644); +module_param(trace_devs, int, 0644); +module_param(proc_details, int, 0644); +#endif + +/* Module parameter for setting the user mode helper program + * to run. Default is /sbin/drbdadm */ +char usermode_helper[80] = "/sbin/drbdadm"; + +module_param_string(usermode_helper, usermode_helper, sizeof(usermode_helper), 0644); + +/* in 2.6.x, our device mapping and config info contains our virtual gendisks + * as member "struct gendisk *vdisk;" + */ +struct drbd_conf **minor_table; + +struct kmem_cache *drbd_request_cache; +struct kmem_cache *drbd_ee_cache; +mempool_t *drbd_request_mempool; +mempool_t *drbd_ee_mempool; + +/* I do not use a standard mempool, because: + 1) I want to hand out the preallocated objects first. + 2) I want to be able to interrupt sleeping allocation with a signal. + Note: This is a single linked list, the next pointer is the private + member of struct page. + */ +struct page *drbd_pp_pool; +spinlock_t drbd_pp_lock; +int drbd_pp_vacant; +wait_queue_head_t drbd_pp_wait; + +DEFINE_RATELIMIT_STATE(drbd_ratelimit_state, 5 * HZ, 5); + +STATIC struct block_device_operations drbd_ops = { + .owner = THIS_MODULE, + .open = drbd_open, + .release = drbd_release, +}; + +#define ARRY_SIZE(A) (sizeof(A)/sizeof(A[0])) + +#ifdef __CHECKER__ +/* When checking with sparse, and this is an inline function, sparse will + give tons of false positives. When this is a real functions sparse works. + */ +int _inc_local_if_state(struct drbd_conf *mdev, enum drbd_disk_state mins) +{ + int io_allowed; + + atomic_inc(&mdev->local_cnt); + io_allowed = (mdev->state.disk >= mins); + if (!io_allowed) { + if (atomic_dec_and_test(&mdev->local_cnt)) + wake_up(&mdev->misc_wait); + } + return io_allowed; +} + +#endif + +/************************* The transfer log start */ +STATIC int tl_init(struct drbd_conf *mdev) +{ + struct drbd_barrier *b; + + b = kmalloc(sizeof(struct drbd_barrier), GFP_KERNEL); + if (!b) + return 0; + INIT_LIST_HEAD(&b->requests); + INIT_LIST_HEAD(&b->w.list); + b->next = NULL; + b->br_number = 4711; + b->n_req = 0; + b->w.cb = NULL; /* if this is != NULL, we need to dec_ap_pending in tl_clear */ + + mdev->oldest_barrier = b; + mdev->newest_barrier = b; + INIT_LIST_HEAD(&mdev->out_of_sequence_requests); + + mdev->tl_hash = NULL; + mdev->tl_hash_s = 0; + + return 1; +} + +STATIC void tl_cleanup(struct drbd_conf *mdev) +{ + D_ASSERT(mdev->oldest_barrier == mdev->newest_barrier); + D_ASSERT(list_empty(&mdev->out_of_sequence_requests)); + kfree(mdev->oldest_barrier); + mdev->oldest_barrier = NULL; + kfree(mdev->unused_spare_barrier); + mdev->unused_spare_barrier = NULL; + kfree(mdev->tl_hash); + mdev->tl_hash = NULL; + mdev->tl_hash_s = 0; +} + +/** + * _tl_add_barrier: Adds a barrier to the TL. + */ +void _tl_add_barrier(struct drbd_conf *mdev, struct drbd_barrier *new) +{ + struct drbd_barrier *newest_before; + + INIT_LIST_HEAD(&new->requests); + INIT_LIST_HEAD(&new->w.list); + new->w.cb = NULL; /* if this is != NULL, we need to dec_ap_pending in tl_clear */ + new->next = NULL; + new->n_req = 0; + + newest_before = mdev->newest_barrier; + /* never send a barrier number == 0, because that is special-cased + * when using TCQ for our write ordering code */ + new->br_number = (newest_before->br_number+1) ?: 1; + if (mdev->newest_barrier != new) { + mdev->newest_barrier->next = new; + mdev->newest_barrier = new; + } +} + +/* when we receive a barrier ack */ +void tl_release(struct drbd_conf *mdev, unsigned int barrier_nr, + unsigned int set_size) +{ + struct drbd_barrier *b, *nob; /* next old barrier */ + struct list_head *le, *tle; + struct drbd_request *r; + + spin_lock_irq(&mdev->req_lock); + + b = mdev->oldest_barrier; + + /* first some paranoia code */ + if (b == NULL) { + ERR("BAD! BarrierAck #%u received, but no epoch in tl!?\n", + barrier_nr); + goto bail; + } + if (b->br_number != barrier_nr) { + ERR("BAD! BarrierAck #%u received, expected #%u!\n", + barrier_nr, b->br_number); + goto bail; + } + if (b->n_req != set_size) { + ERR("BAD! BarrierAck #%u received with n_req=%u, expected n_req=%u!\n", + barrier_nr, set_size, b->n_req); + goto bail; + } + + /* Clean up list of requests processed during current epoch */ + list_for_each_safe(le, tle, &b->requests) { + r = list_entry(le, struct drbd_request, tl_requests); + _req_mod(r, barrier_acked, 0); + } + /* There could be requests on the list waiting for completion + of the write to the local disk. To avoid corruptions of + slab's data structures we have to remove the lists head. + + Also there could have been a barrier ack out of sequence, overtaking + the write acks - which would be a but and violating write ordering. + To not deadlock in case we lose connection while such requests are + still pending, we need some way to find them for the + _req_mode(connection_lost_while_pending). + + These have been list_move'd to the out_of_sequence_requests list in + _req_mod(, barrier_acked,) above. + */ + list_del_init(&b->requests); + + nob = b->next; + if (test_and_clear_bit(CREATE_BARRIER, &mdev->flags)) { + _tl_add_barrier(mdev, b); + if (nob) + mdev->oldest_barrier = nob; + /* if nob == NULL b was the only barrier, and becomes the new + barrer. Threfore mdev->oldest_barrier points already to b */ + } else { + D_ASSERT(nob != NULL); + mdev->oldest_barrier = nob; + kfree(b); + } + + spin_unlock_irq(&mdev->req_lock); + dec_ap_pending(mdev); + + return; + +bail: + spin_unlock_irq(&mdev->req_lock); + drbd_force_state(mdev, NS(conn, ProtocolError)); +} + + +/* called by drbd_disconnect (exiting receiver thread) + * or from some after_state_ch */ +void tl_clear(struct drbd_conf *mdev) +{ + struct drbd_barrier *b, *tmp; + struct list_head *le, *tle; + struct drbd_request *r; + int new_initial_bnr = net_random(); + + spin_lock_irq(&mdev->req_lock); + + b = mdev->oldest_barrier; + while (b) { + list_for_each_safe(le, tle, &b->requests) { + r = list_entry(le, struct drbd_request, tl_requests); + _req_mod(r, connection_lost_while_pending, 0); + } + tmp = b->next; + + /* there could still be requests on that ring list, + * in case local io is still pending */ + list_del(&b->requests); + + /* dec_ap_pending corresponding to queue_barrier. + * the newest barrier may not have been queued yet, + * in which case w.cb is still NULL. */ + if (b->w.cb != NULL) + dec_ap_pending(mdev); + + if (b == mdev->newest_barrier) { + /* recycle, but reinit! */ + D_ASSERT(tmp == NULL); + INIT_LIST_HEAD(&b->requests); + INIT_LIST_HEAD(&b->w.list); + b->w.cb = NULL; + b->br_number = new_initial_bnr; + b->n_req = 0; + + mdev->oldest_barrier = b; + break; + } + kfree(b); + b = tmp; + } + + /* we expect this list to be empty. */ + D_ASSERT(list_empty(&mdev->out_of_sequence_requests)); + + /* but just in case, clean it up anyways! */ + list_for_each_safe(le, tle, &mdev->out_of_sequence_requests) { + r = list_entry(le, struct drbd_request, tl_requests); + _req_mod(r, connection_lost_while_pending, 0); + } + + /* ensure bit indicating barrier is required is clear */ + clear_bit(CREATE_BARRIER, &mdev->flags); + + spin_unlock_irq(&mdev->req_lock); +} + +/** + * drbd_io_error: Handles the on_io_error setting, should be called in the + * unlikely(!drbd_bio_uptodate(e->bio)) case from kernel thread context. + * See also drbd_chk_io_error + * + * NOTE: we set ourselves FAILED here if on_io_error is Detach or Panic OR + * if the forcedetach flag is set. This flag is set when failures + * occur writing the meta data portion of the disk as they are + * not recoverable. + */ +int drbd_io_error(struct drbd_conf *mdev, int forcedetach) +{ + enum io_error_handler eh; + unsigned long flags; + int send; + int ok = 1; + + eh = PassOn; + if (inc_local_if_state(mdev, Failed)) { + eh = mdev->bc->dc.on_io_error; + dec_local(mdev); + } + + if (!forcedetach && eh == PassOn) + return 1; + + spin_lock_irqsave(&mdev->req_lock, flags); + send = (mdev->state.disk == Failed); + if (send) + _drbd_set_state(_NS(mdev, disk, Diskless), ChgStateHard, NULL); + spin_unlock_irqrestore(&mdev->req_lock, flags); + + if (!send) + return ok; + + if (mdev->state.conn >= Connected) { + ok = drbd_send_state(mdev); + if (ok) + drbd_WARN("Notified peer that my disk is broken.\n"); + else + ERR("Sending state in drbd_io_error() failed\n"); + } + + /* Make sure we try to flush meta-data to disk - we come + * in here because of a local disk error so it might fail + * but we still need to try -- both because the error might + * be in the data portion of the disk and because we need + * to ensure the md-sync-timer is stopped if running. */ + drbd_md_sync(mdev); + + /* Releasing the backing device is done in after_state_ch() */ + + if (eh == CallIOEHelper) + drbd_khelper(mdev, "local-io-error"); + + return ok; +} + +/** + * cl_wide_st_chg: + * Returns TRUE if this state change should be preformed as a cluster wide + * transaction. Of course it returns 0 as soon as the connection is lost. + */ +STATIC int cl_wide_st_chg(struct drbd_conf *mdev, + union drbd_state_t os, union drbd_state_t ns) +{ + return (os.conn >= Connected && ns.conn >= Connected && + ((os.role != Primary && ns.role == Primary) || + (os.conn != StartingSyncT && ns.conn == StartingSyncT) || + (os.conn != StartingSyncS && ns.conn == StartingSyncS) || + (os.disk != Diskless && ns.disk == Diskless))) || + (os.conn >= Connected && ns.conn == Disconnecting) || + (os.conn == Connected && ns.conn == VerifyS); +} + +int drbd_change_state(struct drbd_conf *mdev, enum chg_state_flags f, + union drbd_state_t mask, union drbd_state_t val) +{ + unsigned long flags; + union drbd_state_t os, ns; + int rv; + + spin_lock_irqsave(&mdev->req_lock, flags); + os = mdev->state; + ns.i = (os.i & ~mask.i) | val.i; + rv = _drbd_set_state(mdev, ns, f, NULL); + ns = mdev->state; + spin_unlock_irqrestore(&mdev->req_lock, flags); + + return rv; +} + +void drbd_force_state(struct drbd_conf *mdev, + union drbd_state_t mask, union drbd_state_t val) +{ + drbd_change_state(mdev, ChgStateHard, mask, val); +} + +int is_valid_state(struct drbd_conf *mdev, union drbd_state_t ns); +int is_valid_state_transition(struct drbd_conf *, + union drbd_state_t, union drbd_state_t); +int drbd_send_state_req(struct drbd_conf *, + union drbd_state_t, union drbd_state_t); + +STATIC enum set_st_err _req_st_cond(struct drbd_conf *mdev, + union drbd_state_t mask, union drbd_state_t val) +{ + union drbd_state_t os, ns; + unsigned long flags; + int rv; + + if (test_and_clear_bit(CL_ST_CHG_SUCCESS, &mdev->flags)) + return SS_CW_Success; + + if (test_and_clear_bit(CL_ST_CHG_FAIL, &mdev->flags)) + return SS_CW_FailedByPeer; + + rv = 0; + spin_lock_irqsave(&mdev->req_lock, flags); + os = mdev->state; + ns.i = (os.i & ~mask.i) | val.i; + if (!cl_wide_st_chg(mdev, os, ns)) + rv = SS_CW_NoNeed; + if (!rv) { + rv = is_valid_state(mdev, ns); + if (rv == SS_Success) { + rv = is_valid_state_transition(mdev, ns, os); + if (rv == SS_Success) + rv = 0; /* cont waiting, otherwise fail. */ + } + } + spin_unlock_irqrestore(&mdev->req_lock, flags); + + return rv; +} + +/** + * _drbd_request_state: + * This function is the most gracefull way to change state. For some state + * transition this function even does a cluster wide transaction. + * It has a cousin named drbd_request_state(), which is always verbose. + */ +STATIC int drbd_req_state(struct drbd_conf *mdev, + union drbd_state_t mask, union drbd_state_t val, + enum chg_state_flags f) +{ + struct completion done; + unsigned long flags; + union drbd_state_t os, ns; + int rv; + + init_completion(&done); + + if (f & ChgSerialize) + mutex_lock(&mdev->state_mutex); + + spin_lock_irqsave(&mdev->req_lock, flags); + os = mdev->state; + ns.i = (os.i & ~mask.i) | val.i; + + if (cl_wide_st_chg(mdev, os, ns)) { + rv = is_valid_state(mdev, ns); + if (rv == SS_Success) + rv = is_valid_state_transition(mdev, ns, os); + spin_unlock_irqrestore(&mdev->req_lock, flags); + + if (rv < SS_Success) { + if (f & ChgStateVerbose) + print_st_err(mdev, os, ns, rv); + goto abort; + } + + drbd_state_lock(mdev); + if (!drbd_send_state_req(mdev, mask, val)) { + drbd_state_unlock(mdev); + rv = SS_CW_FailedByPeer; + if (f & ChgStateVerbose) + print_st_err(mdev, os, ns, rv); + goto abort; + } + + wait_event(mdev->state_wait, + (rv = _req_st_cond(mdev, mask, val))); + + if (rv < SS_Success) { + /* nearly dead code. */ + drbd_state_unlock(mdev); + if (f & ChgStateVerbose) + print_st_err(mdev, os, ns, rv); + goto abort; + } + spin_lock_irqsave(&mdev->req_lock, flags); + os = mdev->state; + ns.i = (os.i & ~mask.i) | val.i; + rv = _drbd_set_state(mdev, ns, f, &done); + drbd_state_unlock(mdev); + } else { + rv = _drbd_set_state(mdev, ns, f, &done); + } + + spin_unlock_irqrestore(&mdev->req_lock, flags); + + if (f & ChgWaitComplete && rv == SS_Success) { + D_ASSERT(current != mdev->worker.task); + wait_for_completion(&done); + } + +abort: + if (f & ChgSerialize) + mutex_unlock(&mdev->state_mutex); + + return rv; +} + +/** + * _drbd_request_state: + * This function is the most gracefull way to change state. For some state + * transition this function even does a cluster wide transaction. + * It has a cousin named drbd_request_state(), which is always verbose. + */ +int _drbd_request_state(struct drbd_conf *mdev, union drbd_state_t mask, + union drbd_state_t val, enum chg_state_flags f) +{ + int rv; + + wait_event(mdev->state_wait, + (rv = drbd_req_state(mdev, mask, val, f)) != SS_InTransientState); + + return rv; +} + +STATIC void print_st(struct drbd_conf *mdev, char *name, union drbd_state_t ns) +{ + ERR(" %s = { cs:%s ro:%s/%s ds:%s/%s %c%c%c%c }\n", + name, + conns_to_name(ns.conn), + roles_to_name(ns.role), + roles_to_name(ns.peer), + disks_to_name(ns.disk), + disks_to_name(ns.pdsk), + ns.susp ? 's' : 'r', + ns.aftr_isp ? 'a' : '-', + ns.peer_isp ? 'p' : '-', + ns.user_isp ? 'u' : '-' + ); +} + +void print_st_err(struct drbd_conf *mdev, + union drbd_state_t os, union drbd_state_t ns, int err) +{ + if (err == SS_InTransientState) + return; + ERR("State change failed: %s\n", set_st_err_name(err)); + print_st(mdev, " state", os); + print_st(mdev, "wanted", ns); +} + + +#define peers_to_name roles_to_name +#define pdsks_to_name disks_to_name + +#define susps_to_name(A) ((A) ? "1" : "0") +#define aftr_isps_to_name(A) ((A) ? "1" : "0") +#define peer_isps_to_name(A) ((A) ? "1" : "0") +#define user_isps_to_name(A) ((A) ? "1" : "0") + +#define PSC(A) \ + ({ if (ns.A != os.A) { \ + pbp += sprintf(pbp, #A "( %s -> %s ) ", \ + A##s_to_name(os.A), \ + A##s_to_name(ns.A)); \ + } }) + +int is_valid_state(struct drbd_conf *mdev, union drbd_state_t ns) +{ + /* See drbd_state_sw_errors in drbd_strings.c */ + + enum fencing_policy fp; + int rv = SS_Success; + + fp = DontCare; + if (inc_local(mdev)) { + fp = mdev->bc->dc.fencing; + dec_local(mdev); + } + + if (inc_net(mdev)) { + if (!mdev->net_conf->two_primaries && + ns.role == Primary && ns.peer == Primary) + rv = SS_TwoPrimaries; + dec_net(mdev); + } + + if (rv <= 0) + /* already found a reason to abort */; + else if (ns.role == Secondary && mdev->open_cnt) + rv = SS_DeviceInUse; + + else if (ns.role == Primary && ns.conn < Connected && ns.disk < UpToDate) + rv = SS_NoUpToDateDisk; + + else if (fp >= Resource && + ns.role == Primary && ns.conn < Connected && ns.pdsk >= DUnknown) + rv = SS_PrimaryNOP; + + else if (ns.role == Primary && ns.disk <= Inconsistent && ns.pdsk <= Inconsistent) + rv = SS_NoUpToDateDisk; + + else if (ns.conn > Connected && ns.disk < UpToDate && ns.pdsk < UpToDate) + rv = SS_BothInconsistent; + + else if (ns.conn > Connected && (ns.disk == Diskless || ns.pdsk == Diskless)) + rv = SS_SyncingDiskless; + + else if ((ns.conn == Connected || + ns.conn == WFBitMapS || + ns.conn == SyncSource || + ns.conn == PausedSyncS) && + ns.disk == Outdated) + rv = SS_ConnectedOutdates; + + else if ((ns.conn == VerifyS || ns.conn == VerifyT) && + (mdev->sync_conf.verify_alg[0] == 0)) + rv = SS_NoVerifyAlg; + + else if ((ns.conn == VerifyS || ns.conn == VerifyT) && + mdev->agreed_pro_version < 88) + rv = SS_NotSupported; + + return rv; +} + +int is_valid_state_transition(struct drbd_conf *mdev, + union drbd_state_t ns, union drbd_state_t os) +{ + int rv = SS_Success; + + if ((ns.conn == StartingSyncT || ns.conn == StartingSyncS) && + os.conn > Connected) + rv = SS_ResyncRunning; + + if (ns.conn == Disconnecting && os.conn == StandAlone) + rv = SS_AlreadyStandAlone; + + if (ns.disk > Attaching && os.disk == Diskless) + rv = SS_IsDiskLess; + + if (ns.conn == WFConnection && os.conn < Unconnected) + rv = SS_NoNetConfig; + + if (ns.disk == Outdated && os.disk < Outdated && os.disk != Attaching) + rv = SS_LowerThanOutdated; + + if (ns.conn == Disconnecting && os.conn == Unconnected) + rv = SS_InTransientState; + + if (ns.conn == os.conn && ns.conn == WFReportParams) + rv = SS_InTransientState; + + if ((ns.conn == VerifyS || ns.conn == VerifyT) && os.conn < Connected) + rv = SS_NeedConnection; + + if ((ns.conn == VerifyS || ns.conn == VerifyT) && + ns.conn != os.conn && os.conn > Connected) + rv = SS_ResyncRunning; + + if ((ns.conn == StartingSyncS || ns.conn == StartingSyncT) && + os.conn < Connected) + rv = SS_NeedConnection; + + return rv; +} + +int __drbd_set_state(struct drbd_conf *mdev, + union drbd_state_t ns, enum chg_state_flags flags, + struct completion *done) +{ + union drbd_state_t os; + int rv = SS_Success; + int warn_sync_abort = 0; + enum fencing_policy fp; + struct after_state_chg_work *ascw; + + + os = mdev->state; + + fp = DontCare; + if (inc_local(mdev)) { + fp = mdev->bc->dc.fencing; + dec_local(mdev); + } + + /* Early state sanitising. */ + + /* Dissalow Network errors to configure a device's network part */ + if ((ns.conn >= Timeout && ns.conn <= TearDown) && + os.conn <= Disconnecting) + ns.conn = os.conn; + + /* After a network error (+TearDown) only Unconnected or Disconnecting can follow */ + if (os.conn >= Timeout && os.conn <= TearDown && + ns.conn != Unconnected && ns.conn != Disconnecting) + ns.conn = os.conn; + + /* After Disconnecting only StandAlone may follow */ + if (os.conn == Disconnecting && ns.conn != StandAlone) + ns.conn = os.conn; + + if (ns.conn < Connected) { + ns.peer_isp = 0; + ns.peer = Unknown; + if (ns.pdsk > DUnknown || ns.pdsk < Inconsistent) + ns.pdsk = DUnknown; + } + + /* Clear the aftr_isp when becomming Unconfigured */ + if (ns.conn == StandAlone && ns.disk == Diskless && ns.role == Secondary) + ns.aftr_isp = 0; + + if (ns.conn <= Disconnecting && ns.disk == Diskless) + ns.pdsk = DUnknown; + + if (os.conn > Connected && ns.conn > Connected && + (ns.disk <= Failed || ns.pdsk <= Failed)) { + warn_sync_abort = 1; + ns.conn = Connected; + } + + if (ns.conn >= Connected && + ((ns.disk == Consistent || ns.disk == Outdated) || + (ns.disk == Negotiating && ns.conn == WFBitMapT))) { + switch (ns.conn) { + case WFBitMapT: + case PausedSyncT: + ns.disk = Outdated; + break; + case Connected: + case WFBitMapS: + case SyncSource: + case PausedSyncS: + ns.disk = UpToDate; + break; + case SyncTarget: + ns.disk = Inconsistent; + drbd_WARN("Implicit set disk state Inconsistent!\n"); + break; + } + if (os.disk == Outdated && ns.disk == UpToDate) + drbd_WARN("Implicit set disk from Outdate to UpToDate\n"); + } + + if (ns.conn >= Connected && + (ns.pdsk == Consistent || ns.pdsk == Outdated)) { + switch (ns.conn) { + case Connected: + case WFBitMapT: + case PausedSyncT: + case SyncTarget: + ns.pdsk = UpToDate; + break; + case WFBitMapS: + case PausedSyncS: + ns.pdsk = Outdated; + break; + case SyncSource: + ns.pdsk = Inconsistent; + drbd_WARN("Implicit set pdsk Inconsistent!\n"); + break; + } + if (os.pdsk == Outdated && ns.pdsk == UpToDate) + drbd_WARN("Implicit set pdsk from Outdate to UpToDate\n"); + } + + /* Connection breaks down before we finished "Negotiating" */ + if (ns.conn < Connected && ns.disk == Negotiating && + inc_local_if_state(mdev, Negotiating)) { + if (mdev->ed_uuid == mdev->bc->md.uuid[Current]) { + ns.disk = mdev->new_state_tmp.disk; + ns.pdsk = mdev->new_state_tmp.pdsk; + } else { + ALERT("Connection lost while negotiating, no data!\n"); + ns.disk = Diskless; + ns.pdsk = DUnknown; + } + dec_local(mdev); + } + + if (fp == Stonith && + (ns.role == Primary && + ns.conn < Connected && + ns.pdsk > Outdated)) + ns.susp = 1; + + if (ns.aftr_isp || ns.peer_isp || ns.user_isp) { + if (ns.conn == SyncSource) + ns.conn = PausedSyncS; + if (ns.conn == SyncTarget) + ns.conn = PausedSyncT; + } else { + if (ns.conn == PausedSyncS) + ns.conn = SyncSource; + if (ns.conn == PausedSyncT) + ns.conn = SyncTarget; + } + + if (ns.i == os.i) + return SS_NothingToDo; + + if (!(flags & ChgStateHard)) { + /* pre-state-change checks ; only look at ns */ + /* See drbd_state_sw_errors in drbd_strings.c */ + + rv = is_valid_state(mdev, ns); + if (rv < SS_Success) { + /* If the old state was illegal as well, then let + this happen...*/ + + if (is_valid_state(mdev, os) == rv) { + ERR("Considering state change from bad state. " + "Error would be: '%s'\n", + set_st_err_name(rv)); + print_st(mdev, "old", os); + print_st(mdev, "new", ns); + rv = is_valid_state_transition(mdev, ns, os); + } + } else + rv = is_valid_state_transition(mdev, ns, os); + } + + if (rv < SS_Success) { + if (flags & ChgStateVerbose) + print_st_err(mdev, os, ns, rv); + return rv; + } + + if (warn_sync_abort) + drbd_WARN("Resync aborted.\n"); + + { + char *pbp, pb[300]; + pbp = pb; + *pbp = 0; + PSC(role); + PSC(peer); + PSC(conn); + PSC(disk); + PSC(pdsk); + PSC(susp); + PSC(aftr_isp); + PSC(peer_isp); + PSC(user_isp); + INFO("%s\n", pb); + } + + mdev->state.i = ns.i; + wake_up(&mdev->misc_wait); + wake_up(&mdev->state_wait); + + /** post-state-change actions **/ + if (os.conn >= SyncSource && ns.conn <= Connected) { + set_bit(STOP_SYNC_TIMER, &mdev->flags); + mod_timer(&mdev->resync_timer, jiffies); + } + + if ((os.conn == PausedSyncT || os.conn == PausedSyncS) && + (ns.conn == SyncTarget || ns.conn == SyncSource)) { + INFO("Syncer continues.\n"); + mdev->rs_paused += (long)jiffies-(long)mdev->rs_mark_time; + if (ns.conn == SyncTarget) { + if (!test_and_clear_bit(STOP_SYNC_TIMER, &mdev->flags)) + mod_timer(&mdev->resync_timer, jiffies); + /* This if (!test_bit) is only needed for the case + that a device that has ceased to used its timer, + i.e. it is already in drbd_resync_finished() gets + paused and resumed. */ + } + } + + if ((os.conn == SyncTarget || os.conn == SyncSource) && + (ns.conn == PausedSyncT || ns.conn == PausedSyncS)) { + INFO("Resync suspended\n"); + mdev->rs_mark_time = jiffies; + if (ns.conn == PausedSyncT) + set_bit(STOP_SYNC_TIMER, &mdev->flags); + } + + if (os.conn == Connected && + (ns.conn == VerifyS || ns.conn == VerifyT)) { + mdev->ov_position = 0; + mdev->ov_left = + mdev->rs_total = + mdev->rs_mark_left = drbd_bm_bits(mdev); + mdev->rs_start = + mdev->rs_mark_time = jiffies; + mdev->ov_last_oos_size = 0; + mdev->ov_last_oos_start = 0; + + if (ns.conn == VerifyS) + mod_timer(&mdev->resync_timer, jiffies); + } + + if (inc_local(mdev)) { + u32 mdf = mdev->bc->md.flags & ~(MDF_Consistent|MDF_PrimaryInd| + MDF_ConnectedInd|MDF_WasUpToDate| + MDF_PeerOutDated|MDF_CrashedPrimary); + + if (test_bit(CRASHED_PRIMARY, &mdev->flags)) + mdf |= MDF_CrashedPrimary; + if (mdev->state.role == Primary || + (mdev->state.pdsk < Inconsistent && mdev->state.peer == Primary)) + mdf |= MDF_PrimaryInd; + if (mdev->state.conn > WFReportParams) + mdf |= MDF_ConnectedInd; + if (mdev->state.disk > Inconsistent) + mdf |= MDF_Consistent; + if (mdev->state.disk > Outdated) + mdf |= MDF_WasUpToDate; + if (mdev->state.pdsk <= Outdated && mdev->state.pdsk >= Inconsistent) + mdf |= MDF_PeerOutDated; + if (mdf != mdev->bc->md.flags) { + mdev->bc->md.flags = mdf; + drbd_md_mark_dirty(mdev); + } + if (os.disk < Consistent && ns.disk >= Consistent) + drbd_set_ed_uuid(mdev, mdev->bc->md.uuid[Current]); + dec_local(mdev); + } + + /* Peer was forced UpToDate & Primary, consider to resync */ + if (os.disk == Inconsistent && os.pdsk == Inconsistent && + os.peer == Secondary && ns.peer == Primary) + set_bit(CONSIDER_RESYNC, &mdev->flags); + + /* Receiver should clean up itself */ + if (os.conn != Disconnecting && ns.conn == Disconnecting) + drbd_thread_stop_nowait(&mdev->receiver); + + /* Now the receiver finished cleaning up itself, it should die */ + if (os.conn != StandAlone && ns.conn == StandAlone) + drbd_thread_stop_nowait(&mdev->receiver); + + /* Upon network failure, we need to restart the receiver. */ + if (os.conn > TearDown && + ns.conn <= TearDown && ns.conn >= Timeout) + drbd_thread_restart_nowait(&mdev->receiver); + + ascw = kmalloc(sizeof(*ascw), GFP_ATOMIC); + if (ascw) { + ascw->os = os; + ascw->ns = ns; + ascw->flags = flags; + ascw->w.cb = w_after_state_ch; + ascw->done = done; + drbd_queue_work(&mdev->data.work, &ascw->w); + } else { + drbd_WARN("Could not kmalloc an ascw\n"); + } + + return rv; +} + +STATIC int w_after_state_ch(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct after_state_chg_work *ascw; + + ascw = (struct after_state_chg_work *) w; + after_state_ch(mdev, ascw->os, ascw->ns, ascw->flags); + if (ascw->flags & ChgWaitComplete) { + D_ASSERT(ascw->done != NULL); + complete(ascw->done); + } + kfree(ascw); + + return 1; +} + +static void abw_start_sync(struct drbd_conf *mdev, int rv) +{ + if (rv) { + ERR("Writing the bitmap failed not starting resync.\n"); + _drbd_request_state(mdev, NS(conn, Connected), ChgStateVerbose); + return; + } + + switch (mdev->state.conn) { + case StartingSyncT: + _drbd_request_state(mdev, NS(conn, WFSyncUUID), ChgStateVerbose); + break; + case StartingSyncS: + drbd_start_resync(mdev, SyncSource); + break; + } +} + +STATIC void after_state_ch(struct drbd_conf *mdev, union drbd_state_t os, + union drbd_state_t ns, enum chg_state_flags flags) +{ + enum fencing_policy fp; + + if (os.conn != Connected && ns.conn == Connected) { + clear_bit(CRASHED_PRIMARY, &mdev->flags); + if (mdev->p_uuid) + mdev->p_uuid[UUID_FLAGS] &= ~((u64)2); + } + + fp = DontCare; + if (inc_local(mdev)) { + fp = mdev->bc->dc.fencing; + dec_local(mdev); + } + + /* Inform userspace about the change... */ + drbd_bcast_state(mdev, ns); + + if (!(os.role == Primary && os.disk < UpToDate && os.pdsk < UpToDate) && + (ns.role == Primary && ns.disk < UpToDate && ns.pdsk < UpToDate)) + drbd_khelper(mdev, "pri-on-incon-degr"); + + /* Here we have the actions that are performed after a + state change. This function might sleep */ + + if (fp == Stonith && ns.susp) { + /* case1: The outdate peer handler is successfull: + * case2: The connection was established again: */ + if ((os.pdsk > Outdated && ns.pdsk <= Outdated) || + (os.conn < Connected && ns.conn >= Connected)) { + tl_clear(mdev); + spin_lock_irq(&mdev->req_lock); + _drbd_set_state(_NS(mdev, susp, 0), ChgStateVerbose, NULL); + spin_unlock_irq(&mdev->req_lock); + } + } + /* Do not change the order of the if above and the two below... */ + if (os.pdsk == Diskless && ns.pdsk > Diskless) { /* attach on the peer */ + drbd_send_uuids(mdev); + drbd_send_state(mdev); + } + if (os.conn != WFBitMapS && ns.conn == WFBitMapS) + drbd_queue_bitmap_io(mdev, &drbd_send_bitmap, NULL, "send_bitmap (WFBitMapS)"); + + /* Lost contact to peer's copy of the data */ + if ((os.pdsk >= Inconsistent && + os.pdsk != DUnknown && + os.pdsk != Outdated) + && (ns.pdsk < Inconsistent || + ns.pdsk == DUnknown || + ns.pdsk == Outdated)) { + kfree(mdev->p_uuid); + mdev->p_uuid = NULL; + if (inc_local(mdev)) { + if ((ns.role == Primary || ns.peer == Primary) && + mdev->bc->md.uuid[Bitmap] == 0 && ns.disk >= UpToDate) { + drbd_uuid_new_current(mdev); + drbd_send_uuids(mdev); + } + dec_local(mdev); + } + } + + if (ns.pdsk < Inconsistent && inc_local(mdev)) { + if (ns.peer == Primary && mdev->bc->md.uuid[Bitmap] == 0) + drbd_uuid_new_current(mdev); + + /* Diskless Peer becomes secondary */ + if (os.peer == Primary && ns.peer == Secondary) + drbd_al_to_on_disk_bm(mdev); + dec_local(mdev); + } + + /* Last part of the attaching process ... */ + if (ns.conn >= Connected && + os.disk == Attaching && ns.disk == Negotiating) { + kfree(mdev->p_uuid); /* We expect to receive up-to-date UUIDs soon. */ + mdev->p_uuid = NULL; /* ...to not use the old ones in the mean time */ + drbd_send_sizes(mdev); /* to start sync... */ + drbd_send_uuids(mdev); + drbd_send_state(mdev); + } + + /* We want to pause/continue resync, tell peer. */ + if (ns.conn >= Connected && + ((os.aftr_isp != ns.aftr_isp) || + (os.user_isp != ns.user_isp))) + drbd_send_state(mdev); + + /* In case one of the isp bits got set, suspend other devices. */ + if ((!os.aftr_isp && !os.peer_isp && !os.user_isp) && + (ns.aftr_isp || ns.peer_isp || ns.user_isp)) + suspend_other_sg(mdev); + + /* Make sure the peer gets informed about eventual state + changes (ISP bits) while we were in WFReportParams. */ + if (os.conn == WFReportParams && ns.conn >= Connected) + drbd_send_state(mdev); + + /* We are in the progress to start a full sync... */ + if ((os.conn != StartingSyncT && ns.conn == StartingSyncT) || + (os.conn != StartingSyncS && ns.conn == StartingSyncS)) + drbd_queue_bitmap_io(mdev, &drbd_bmio_set_n_write, &abw_start_sync, "set_n_write from StartingSync"); + + /* We are invalidating our self... */ + if (os.conn < Connected && ns.conn < Connected && + os.disk > Inconsistent && ns.disk == Inconsistent) + drbd_queue_bitmap_io(mdev, &drbd_bmio_set_n_write, NULL, "set_n_write from invalidate"); + + if (os.disk > Diskless && ns.disk == Diskless) { + /* since inc_local() only works as long as disk>=Inconsistent, + and it is Diskless here, local_cnt can only go down, it can + not increase... It will reach zero */ + wait_event(mdev->misc_wait, !atomic_read(&mdev->local_cnt)); + + lc_free(mdev->resync); + mdev->resync = NULL; + lc_free(mdev->act_log); + mdev->act_log = NULL; + __no_warn(local, drbd_free_bc(mdev->bc);); + wmb(); /* see begin of drbd_nl_disk_conf() */ + __no_warn(local, mdev->bc = NULL;); + + if (mdev->md_io_tmpp) + __free_page(mdev->md_io_tmpp); + } + + /* Disks got bigger while they were detached */ + if (ns.disk > Negotiating && ns.pdsk > Negotiating && + test_and_clear_bit(RESYNC_AFTER_NEG, &mdev->flags)) { + if (ns.conn == Connected) + resync_after_online_grow(mdev); + } + + /* A resync finished or aborted, wake paused devices... */ + if ((os.conn > Connected && ns.conn <= Connected) || + (os.peer_isp && !ns.peer_isp) || + (os.user_isp && !ns.user_isp)) + resume_next_sg(mdev); + + /* Upon network connection, we need to start the received */ + if (os.conn == StandAlone && ns.conn == Unconnected) + drbd_thread_start(&mdev->receiver); + + /* Terminate worker thread if we are unconfigured - it will be + restarted as needed... */ + if (ns.disk == Diskless && ns.conn == StandAlone && ns.role == Secondary) { + if (os.aftr_isp != ns.aftr_isp) + resume_next_sg(mdev); + drbd_thread_stop_nowait(&mdev->worker); + } + + drbd_md_sync(mdev); +} + + +STATIC int drbd_thread_setup(void *arg) +{ + struct Drbd_thread *thi = (struct Drbd_thread *) arg; + struct drbd_conf *mdev = thi->mdev; + int retval; + +restart: + retval = thi->function(thi); + + spin_lock(&thi->t_lock); + + /* if the receiver has been "Exiting", the last thing it did + * was set the conn state to "StandAlone", + * if now a re-connect request comes in, conn state goes Unconnected, + * and receiver thread will be "started". + * drbd_thread_start needs to set "Restarting" in that case. + * t_state check and assignement needs to be within the same spinlock, + * so either thread_start sees Exiting, and can remap to Restarting, + * or thread_start see None, and can proceed as normal. + */ + + if (thi->t_state == Restarting) { + INFO("Restarting %s\n", current->comm); + thi->t_state = Running; + spin_unlock(&thi->t_lock); + goto restart; + } + + thi->task = NULL; + thi->t_state = None; + smp_mb(); + complete(&thi->stop); + spin_unlock(&thi->t_lock); + + INFO("Terminating %s\n", current->comm); + + /* Release mod reference taken when thread was started */ + module_put(THIS_MODULE); + return retval; +} + +STATIC void drbd_thread_init(struct drbd_conf *mdev, struct Drbd_thread *thi, + int (*func) (struct Drbd_thread *)) +{ + spin_lock_init(&thi->t_lock); + thi->task = NULL; + thi->t_state = None; + thi->function = func; + thi->mdev = mdev; +} + +int drbd_thread_start(struct Drbd_thread *thi) +{ + struct drbd_conf *mdev = thi->mdev; + struct task_struct *nt; + const char *me = + thi == &mdev->receiver ? "receiver" : + thi == &mdev->asender ? "asender" : + thi == &mdev->worker ? "worker" : "NONSENSE"; + + spin_lock(&thi->t_lock); + switch (thi->t_state) { + case None: + INFO("Starting %s thread (from %s [%d])\n", + me, current->comm, current->pid); + + /* Get ref on module for thread - this is released when thread exits */ + if (!try_module_get(THIS_MODULE)) { + ERR("Failed to get module reference in drbd_thread_start\n"); + spin_unlock(&thi->t_lock); + return FALSE; + } + + D_ASSERT(thi->task == NULL); + thi->reset_cpu_mask = 1; + thi->t_state = Running; + spin_unlock(&thi->t_lock); + flush_signals(current); /* otherw. may get -ERESTARTNOINTR */ + + nt = kthread_create(drbd_thread_setup, (void *) thi, + "drbd%d_%s", mdev_to_minor(mdev), me); + + if (IS_ERR(nt)) { + ERR("Couldn't start thread\n"); + + module_put(THIS_MODULE); + return FALSE; + } + spin_lock(&thi->t_lock); + thi->task = nt; + thi->t_state = Running; + spin_unlock(&thi->t_lock); + wake_up_process(nt); + break; + case Exiting: + thi->t_state = Restarting; + INFO("Restarting %s thread (from %s [%d])\n", + me, current->comm, current->pid); + case Running: + case Restarting: + default: + spin_unlock(&thi->t_lock); + break; + } + + return TRUE; +} + + +void _drbd_thread_stop(struct Drbd_thread *thi, int restart, int wait) +{ + enum Drbd_thread_state ns = restart ? Restarting : Exiting; + + spin_lock(&thi->t_lock); + + if (thi->t_state == None) { + spin_unlock(&thi->t_lock); + if (restart) + drbd_thread_start(thi); + return; + } + + if (thi->t_state != ns) { + if (thi->task == NULL) { + spin_unlock(&thi->t_lock); + return; + } + + thi->t_state = ns; + smp_mb(); + init_completion(&thi->stop); + if (thi->task != current) + force_sig(DRBD_SIGKILL, thi->task); + + } + + spin_unlock(&thi->t_lock); + + if (wait) { + wait_for_completion(&thi->stop); + } +} + +#ifdef CONFIG_SMP +/** + * drbd_calc_cpu_mask: Generates CPU masks, sprad over all CPUs. + * Forces all threads of a device onto the same CPU. This is benificial for + * DRBD's performance. May be overwritten by user's configuration. + */ +cpumask_t drbd_calc_cpu_mask(struct drbd_conf *mdev) +{ + int sv, cpu; + cpumask_t av_cpu_m; + + if (cpus_weight(mdev->cpu_mask)) + return mdev->cpu_mask; + + av_cpu_m = cpu_online_map; + sv = mdev_to_minor(mdev) % cpus_weight(av_cpu_m); + + for_each_cpu_mask(cpu, av_cpu_m) { + if (sv-- == 0) + return cpumask_of_cpu(cpu); + } + + /* some kernel versions "forget" to add the (cpumask_t) typecast + * to that macro, which results in "parse error before '{'" ;-> */ + return (cpumask_t) CPU_MASK_ALL; /* Never reached. */ +} + +/* modifies the cpu mask of the _current_ thread, + * call in the "main loop" of _all_ threads. + * no need for any mutex, current won't die prematurely. + */ +void drbd_thread_current_set_cpu(struct drbd_conf *mdev) +{ + struct task_struct *p = current; + struct Drbd_thread *thi = + p == mdev->asender.task ? &mdev->asender : + p == mdev->receiver.task ? &mdev->receiver : + p == mdev->worker.task ? &mdev->worker : + NULL; + ERR_IF(thi == NULL) + return; + if (!thi->reset_cpu_mask) + return; + thi->reset_cpu_mask = 0; + /* preempt_disable(); + Thas was a kernel that warned about a call to smp_processor_id() while preemt + was not disabled. It seems that this was fixed in manline. */ + set_cpus_allowed(p, mdev->cpu_mask); + /* preempt_enable(); */ +} +#endif + +/* the appropriate socket mutex must be held already */ +int _drbd_send_cmd(struct drbd_conf *mdev, struct socket *sock, + enum Drbd_Packet_Cmd cmd, struct Drbd_Header *h, + size_t size, unsigned msg_flags) +{ + int sent, ok; + + ERR_IF(!h) return FALSE; + ERR_IF(!size) return FALSE; + + h->magic = BE_DRBD_MAGIC; + h->command = cpu_to_be16(cmd); + h->length = cpu_to_be16(size-sizeof(struct Drbd_Header)); + + dump_packet(mdev, sock, 0, (void *)h, __FILE__, __LINE__); + sent = drbd_send(mdev, sock, h, size, msg_flags); + + ok = (sent == size); + if (!ok) + ERR("short sent %s size=%d sent=%d\n", + cmdname(cmd), (int)size, sent); + return ok; +} + +/* don't pass the socket. we may only look at it + * when we hold the appropriate socket mutex. + */ +int drbd_send_cmd(struct drbd_conf *mdev, int use_data_socket, + enum Drbd_Packet_Cmd cmd, struct Drbd_Header *h, size_t size) +{ + int ok = 0; + struct socket *sock; + + if (use_data_socket) { + mutex_lock(&mdev->data.mutex); + sock = mdev->data.socket; + } else { + mutex_lock(&mdev->meta.mutex); + sock = mdev->meta.socket; + } + + /* drbd_disconnect() could have called drbd_free_sock() + * while we were waiting in down()... */ + if (likely(sock != NULL)) + ok = _drbd_send_cmd(mdev, sock, cmd, h, size, 0); + + if (use_data_socket) + mutex_unlock(&mdev->data.mutex); + else + mutex_unlock(&mdev->meta.mutex); + return ok; +} + +int drbd_send_cmd2(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, char *data, + size_t size) +{ + struct Drbd_Header h; + int ok; + + h.magic = BE_DRBD_MAGIC; + h.command = cpu_to_be16(cmd); + h.length = cpu_to_be16(size); + + if (!drbd_get_data_sock(mdev)) + return 0; + + dump_packet(mdev, mdev->data.socket, 0, (void *)&h, __FILE__, __LINE__); + + ok = (sizeof(h) == + drbd_send(mdev, mdev->data.socket, &h, sizeof(h), 0)); + ok = ok && (size == + drbd_send(mdev, mdev->data.socket, data, size, 0)); + + drbd_put_data_sock(mdev); + + return ok; +} + +int drbd_send_sync_param(struct drbd_conf *mdev, struct syncer_conf *sc) +{ + struct Drbd_SyncParam89_Packet *p; + struct socket *sock; + int size, rv; + const int apv = mdev->agreed_pro_version; + + size = apv <= 87 ? sizeof(struct Drbd_SyncParam_Packet) + : apv == 88 ? sizeof(struct Drbd_SyncParam_Packet) + + strlen(mdev->sync_conf.verify_alg) + 1 + : /* 89 */ sizeof(struct Drbd_SyncParam89_Packet); + + /* used from admin command context and receiver/worker context. + * to avoid kmalloc, grab the socket right here, + * then use the pre-allocated sbuf there */ + mutex_lock(&mdev->data.mutex); + sock = mdev->data.socket; + + if (likely(sock != NULL)) { + enum Drbd_Packet_Cmd cmd = apv >= 89 ? SyncParam89 : SyncParam; + + p = &mdev->data.sbuf.SyncParam89; + + /* initialize verify_alg and csums_alg */ + memset(p->verify_alg, 0, 2 * SHARED_SECRET_MAX); + + p->rate = cpu_to_be32(sc->rate); + + if (apv >= 88) + strcpy(p->verify_alg, mdev->sync_conf.verify_alg); + if (apv >= 89) + strcpy(p->csums_alg, mdev->sync_conf.csums_alg); + + rv = _drbd_send_cmd(mdev, sock, cmd, &p->head, size, 0); + } else + rv = 0; /* not ok */ + + mutex_unlock(&mdev->data.mutex); + + return rv; +} + +int drbd_send_protocol(struct drbd_conf *mdev) +{ + struct Drbd_Protocol_Packet *p; + int size, rv; + + size = sizeof(struct Drbd_Protocol_Packet); + + if (mdev->agreed_pro_version >= 87) + size += strlen(mdev->net_conf->integrity_alg) + 1; + + p = kmalloc(size, GFP_KERNEL); + if (p == NULL) + return 0; + + p->protocol = cpu_to_be32(mdev->net_conf->wire_protocol); + p->after_sb_0p = cpu_to_be32(mdev->net_conf->after_sb_0p); + p->after_sb_1p = cpu_to_be32(mdev->net_conf->after_sb_1p); + p->after_sb_2p = cpu_to_be32(mdev->net_conf->after_sb_2p); + p->want_lose = cpu_to_be32(mdev->net_conf->want_lose); + p->two_primaries = cpu_to_be32(mdev->net_conf->two_primaries); + + if (mdev->agreed_pro_version >= 87) + strcpy(p->integrity_alg, mdev->net_conf->integrity_alg); + + rv = drbd_send_cmd(mdev, USE_DATA_SOCKET, ReportProtocol, + (struct Drbd_Header *)p, size); + kfree(p); + return rv; +} + +int drbd_send_uuids(struct drbd_conf *mdev) +{ + struct Drbd_GenCnt_Packet p; + int i; + + u64 uuid_flags = 0; + + if (!inc_local_if_state(mdev, Negotiating)) + return 1; + + for (i = Current; i < UUID_SIZE; i++) + p.uuid[i] = mdev->bc ? cpu_to_be64(mdev->bc->md.uuid[i]) : 0; + + mdev->comm_bm_set = drbd_bm_total_weight(mdev); + p.uuid[UUID_SIZE] = cpu_to_be64(mdev->comm_bm_set); + uuid_flags |= mdev->net_conf->want_lose ? 1 : 0; + uuid_flags |= test_bit(CRASHED_PRIMARY, &mdev->flags) ? 2 : 0; + uuid_flags |= mdev->new_state_tmp.disk == Inconsistent ? 4 : 0; + p.uuid[UUID_FLAGS] = cpu_to_be64(uuid_flags); + + dec_local(mdev); + + return drbd_send_cmd(mdev, USE_DATA_SOCKET, ReportUUIDs, + (struct Drbd_Header *)&p, sizeof(p)); +} + +int drbd_send_sync_uuid(struct drbd_conf *mdev, u64 val) +{ + struct Drbd_SyncUUID_Packet p; + + p.uuid = cpu_to_be64(val); + + return drbd_send_cmd(mdev, USE_DATA_SOCKET, ReportSyncUUID, + (struct Drbd_Header *)&p, sizeof(p)); +} + +int drbd_send_sizes(struct drbd_conf *mdev) +{ + struct Drbd_Sizes_Packet p; + sector_t d_size, u_size; + int q_order_type; + int ok; + + if (inc_local_if_state(mdev, Negotiating)) { + D_ASSERT(mdev->bc->backing_bdev); + d_size = drbd_get_max_capacity(mdev->bc); + u_size = mdev->bc->dc.disk_size; + q_order_type = drbd_queue_order_type(mdev); + p.queue_order_type = cpu_to_be32(drbd_queue_order_type(mdev)); + dec_local(mdev); + } else { + d_size = 0; + u_size = 0; + q_order_type = QUEUE_ORDERED_NONE; + } + + p.d_size = cpu_to_be64(d_size); + p.u_size = cpu_to_be64(u_size); + p.c_size = cpu_to_be64(drbd_get_capacity(mdev->this_bdev)); + p.max_segment_size = cpu_to_be32(queue_max_segment_size(mdev->rq_queue)); + p.queue_order_type = cpu_to_be32(q_order_type); + + ok = drbd_send_cmd(mdev, USE_DATA_SOCKET, ReportSizes, + (struct Drbd_Header *)&p, sizeof(p)); + return ok; +} + +/** + * drbd_send_state: + * Informs the peer about our state. Only call it when + * mdev->state.conn >= Connected (I.e. you may not call it while in + * WFReportParams. Though there is one valid and necessary exception, + * drbd_connect() calls drbd_send_state() while in it WFReportParams. + */ +int drbd_send_state(struct drbd_conf *mdev) +{ + struct socket *sock; + struct Drbd_State_Packet p; + int ok = 0; + + /* Grab state lock so we wont send state if we're in the middle + * of a cluster wide state change on another thread */ + drbd_state_lock(mdev); + + mutex_lock(&mdev->data.mutex); + + p.state = cpu_to_be32(mdev->state.i); /* Within the send mutex */ + sock = mdev->data.socket; + + if (likely(sock != NULL)) { + ok = _drbd_send_cmd(mdev, sock, ReportState, + (struct Drbd_Header *)&p, sizeof(p), 0); + } + + mutex_unlock(&mdev->data.mutex); + + drbd_state_unlock(mdev); + return ok; +} + +int drbd_send_state_req(struct drbd_conf *mdev, + union drbd_state_t mask, union drbd_state_t val) +{ + struct Drbd_Req_State_Packet p; + + p.mask = cpu_to_be32(mask.i); + p.val = cpu_to_be32(val.i); + + return drbd_send_cmd(mdev, USE_DATA_SOCKET, StateChgRequest, + (struct Drbd_Header *)&p, sizeof(p)); +} + +int drbd_send_sr_reply(struct drbd_conf *mdev, int retcode) +{ + struct Drbd_RqS_Reply_Packet p; + + p.retcode = cpu_to_be32(retcode); + + return drbd_send_cmd(mdev, USE_META_SOCKET, StateChgReply, + (struct Drbd_Header *)&p, sizeof(p)); +} + +/* returns + * positive: number of payload bytes needed in this packet. + * zero: incompressible. */ +int fill_bitmap_rle_bytes(struct drbd_conf *mdev, + struct Drbd_Compressed_Bitmap_Packet *p, + struct bm_xfer_ctx *c) +{ + unsigned long plain_bits; + unsigned long tmp; + unsigned long rl; + void *buffer; + unsigned n; + unsigned len; + unsigned toggle; + + /* may we use this feature? */ + if ((mdev->sync_conf.use_rle_encoding == 0) || + (mdev->agreed_pro_version < 90)) + return 0; + + if (c->bit_offset >= c->bm_bits) + return 0; /* nothing to do. */ + + /* use at most thus many bytes */ + len = BM_PACKET_VLI_BYTES_MAX; + buffer = p->code; + /* plain bits covered in this code string */ + plain_bits = 0; + + /* p->encoding & 0x80 stores whether the first + * run length is set. + * bit offset is implicit. + * start with toggle == 2 to be able to tell the first iteration */ + toggle = 2; + + /* see how much plain bits we can stuff into one packet + * using RLE and VLI. */ + do { + tmp = (toggle == 0) ? _drbd_bm_find_next_zero(mdev, c->bit_offset) + : _drbd_bm_find_next(mdev, c->bit_offset); + if (tmp == -1UL) + tmp = c->bm_bits; + rl = tmp - c->bit_offset; + + if (toggle == 2) { /* first iteration */ + if (rl == 0) { + /* the first checked bit was set, + * store start value, */ + DCBP_set_start(p, 1); + /* but skip encoding of zero run length */ + toggle = !toggle; + continue; + } + DCBP_set_start(p, 0); + } + + /* paranoia: catch zero runlength. + * can only happen if bitmap is modified while we scan it. */ + if (rl == 0) { + ERR("unexpected zero runlength while encoding bitmap " + "t:%u bo:%lu\n", toggle, c->bit_offset); + return -1; + } + + n = vli_encode_bytes(buffer, rl, len); + if (n == 0) /* buffer full */ + break; + + toggle = !toggle; + buffer += n; + len -= n; + plain_bits += rl; + c->bit_offset = tmp; + } while (len && c->bit_offset < c->bm_bits); + + len = BM_PACKET_VLI_BYTES_MAX - len; + + if (plain_bits < (len << 3)) { + /* incompressible with this method. + * we need to rewind both word and bit position. */ + c->bit_offset -= plain_bits; + bm_xfer_ctx_bit_to_word_offset(c); + c->bit_offset = c->word_offset * BITS_PER_LONG; + return 0; + } + + /* RLE + VLI was able to compress it just fine. + * update c->word_offset. */ + bm_xfer_ctx_bit_to_word_offset(c); + + /* store pad_bits */ + DCBP_set_pad_bits(p, 0); + + return len; +} + +int fill_bitmap_rle_bits(struct drbd_conf *mdev, + struct Drbd_Compressed_Bitmap_Packet *p, + struct bm_xfer_ctx *c) +{ + struct bitstream bs; + unsigned long plain_bits; + unsigned long tmp; + unsigned long rl; + unsigned len; + unsigned toggle; + int bits; + + /* may we use this feature? */ + if ((mdev->sync_conf.use_rle_encoding == 0) || + (mdev->agreed_pro_version < 90)) + return 0; + + if (c->bit_offset >= c->bm_bits) + return 0; /* nothing to do. */ + + /* use at most thus many bytes */ + bitstream_init(&bs, p->code, BM_PACKET_VLI_BYTES_MAX, 0); + memset(p->code, 0, BM_PACKET_VLI_BYTES_MAX); + /* plain bits covered in this code string */ + plain_bits = 0; + + /* p->encoding & 0x80 stores whether the first + * run length is set. + * bit offset is implicit. + * start with toggle == 2 to be able to tell the first iteration */ + toggle = 2; + + /* see how much plain bits we can stuff into one packet + * using RLE and VLI. */ + do { + tmp = (toggle == 0) ? _drbd_bm_find_next_zero(mdev, c->bit_offset) + : _drbd_bm_find_next(mdev, c->bit_offset); + if (tmp == -1UL) + tmp = c->bm_bits; + rl = tmp - c->bit_offset; + + if (toggle == 2) { /* first iteration */ + if (rl == 0) { + /* the first checked bit was set, + * store start value, */ + DCBP_set_start(p, 1); + /* but skip encoding of zero run length */ + toggle = !toggle; + continue; + } + DCBP_set_start(p, 0); + } + + /* paranoia: catch zero runlength. + * can only happen if bitmap is modified while we scan it. */ + if (rl == 0) { + ERR("unexpected zero runlength while encoding bitmap " + "t:%u bo:%lu\n", toggle, c->bit_offset); + return -1; + } + + bits = vli_encode_bits(&bs, rl); + if (bits == -ENOBUFS) /* buffer full */ + break; + if (bits <= 0) { + ERR("error while encoding bitmap: %d\n", bits); + return 0; + } + + toggle = !toggle; + plain_bits += rl; + c->bit_offset = tmp; + } while (c->bit_offset < c->bm_bits); + + len = bs.cur.b - p->code + !!bs.cur.bit; + + if (plain_bits < (len << 3)) { + /* incompressible with this method. + * we need to rewind both word and bit position. */ + c->bit_offset -= plain_bits; + bm_xfer_ctx_bit_to_word_offset(c); + c->bit_offset = c->word_offset * BITS_PER_LONG; + return 0; + } + + /* RLE + VLI was able to compress it just fine. + * update c->word_offset. */ + bm_xfer_ctx_bit_to_word_offset(c); + + /* store pad_bits */ + DCBP_set_pad_bits(p, (8 - bs.cur.bit) & 0x7); + + return len; +} + +enum { OK, FAILED, DONE } +send_bitmap_rle_or_plain(struct drbd_conf *mdev, + struct Drbd_Header *h, struct bm_xfer_ctx *c) +{ + struct Drbd_Compressed_Bitmap_Packet *p = (void*)h; + unsigned long num_words; + int len; + int ok; + + if (0) + len = fill_bitmap_rle_bytes(mdev, p, c); + else + len = fill_bitmap_rle_bits(mdev, p, c); + + if (len < 0) + return FAILED; + if (len) { + DCBP_set_code(p, 0 ? RLE_VLI_Bytes : RLE_VLI_BitsFibD_3_5); + ok = _drbd_send_cmd(mdev, mdev->data.socket, ReportCBitMap, h, + sizeof(*p) + len, 0); + + c->packets[0]++; + c->bytes[0] += sizeof(*p) + len; + + if (c->bit_offset >= c->bm_bits) + len = 0; /* DONE */ + } else { + /* was not compressible. + * send a buffer full of plain text bits instead. */ + num_words = min_t(size_t, BM_PACKET_WORDS, c->bm_words - c->word_offset); + len = num_words * sizeof(long); + if (len) + drbd_bm_get_lel(mdev, c->word_offset, num_words, (unsigned long*)h->payload); + ok = _drbd_send_cmd(mdev, mdev->data.socket, ReportBitMap, + h, sizeof(struct Drbd_Header) + len, 0); + c->word_offset += num_words; + c->bit_offset = c->word_offset * BITS_PER_LONG; + + c->packets[1]++; + c->bytes[1] += sizeof(struct Drbd_Header) + len; + + if (c->bit_offset > c->bm_bits) + c->bit_offset = c->bm_bits; + } + ok = ok ? ((len == 0) ? DONE : OK) : FAILED; + + if (ok == DONE) + INFO_bm_xfer_stats(mdev, "send", c); + return ok; +} + +/* See the comment at receive_bitmap() */ +int _drbd_send_bitmap(struct drbd_conf *mdev) +{ + struct bm_xfer_ctx c; + struct Drbd_Header *p; + int ret; + + ERR_IF(!mdev->bitmap) return FALSE; + + /* maybe we should use some per thread scratch page, + * and allocate that during initial device creation? */ + p = (struct Drbd_Header *) __get_free_page(GFP_NOIO); + if (!p) { + ERR("failed to allocate one page buffer in %s\n", __func__); + return FALSE; + } + + if (inc_local(mdev)) { + if (drbd_md_test_flag(mdev->bc, MDF_FullSync)) { + INFO("Writing the whole bitmap, MDF_FullSync was set.\n"); + drbd_bm_set_all(mdev); + if (drbd_bm_write(mdev)) { + /* write_bm did fail! Leave full sync flag set in Meta Data + * but otherwise process as per normal - need to tell other + * side that a full resync is required! */ + ERR("Failed to write bitmap to disk!\n"); + } else { + drbd_md_clear_flag(mdev, MDF_FullSync); + drbd_md_sync(mdev); + } + } + dec_local(mdev); + } + + c = (struct bm_xfer_ctx) { + .bm_bits = drbd_bm_bits(mdev), + .bm_words = drbd_bm_words(mdev), + }; + + do { + ret = send_bitmap_rle_or_plain(mdev, p, &c); + } while (ret == OK); + + free_page((unsigned long) p); + return (ret == DONE); +} + +int drbd_send_bitmap(struct drbd_conf *mdev) +{ + int err; + + if (!drbd_get_data_sock(mdev)) + return -1; + err = !_drbd_send_bitmap(mdev); + drbd_put_data_sock(mdev); + return err; +} + +int drbd_send_b_ack(struct drbd_conf *mdev, u32 barrier_nr, u32 set_size) +{ + int ok; + struct Drbd_BarrierAck_Packet p; + + p.barrier = barrier_nr; + p.set_size = cpu_to_be32(set_size); + + if (mdev->state.conn < Connected) + return FALSE; + ok = drbd_send_cmd(mdev, USE_META_SOCKET, BarrierAck, + (struct Drbd_Header *)&p, sizeof(p)); + return ok; +} + +/** + * _drbd_send_ack: + * This helper function expects the sector and block_id parameter already + * in big endian! + */ +STATIC int _drbd_send_ack(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + u64 sector, + u32 blksize, + u64 block_id) +{ + int ok; + struct Drbd_BlockAck_Packet p; + + p.sector = sector; + p.block_id = block_id; + p.blksize = blksize; + p.seq_num = cpu_to_be32(atomic_add_return(1, &mdev->packet_seq)); + + if (!mdev->meta.socket || mdev->state.conn < Connected) + return FALSE; + ok = drbd_send_cmd(mdev, USE_META_SOCKET, cmd, + (struct Drbd_Header *)&p, sizeof(p)); + return ok; +} + +int drbd_send_ack_dp(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Drbd_Data_Packet *dp) +{ + const int header_size = sizeof(struct Drbd_Data_Packet) + - sizeof(struct Drbd_Header); + int data_size = ((struct Drbd_Header *)dp)->length - header_size; + + return _drbd_send_ack(mdev, cmd, dp->sector, cpu_to_be32(data_size), + dp->block_id); +} + +int drbd_send_ack_rp(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Drbd_BlockRequest_Packet *rp) +{ + return _drbd_send_ack(mdev, cmd, rp->sector, rp->blksize, rp->block_id); +} + +int drbd_send_ack(struct drbd_conf *mdev, + enum Drbd_Packet_Cmd cmd, struct Tl_epoch_entry *e) +{ + return _drbd_send_ack(mdev, cmd, + cpu_to_be64(e->sector), + cpu_to_be32(e->size), + e->block_id); +} + +/* This function misuses the block_id field to signal if the blocks + * are is sync or not. */ +int drbd_send_ack_ex(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + sector_t sector, int blksize, u64 block_id) +{ + return _drbd_send_ack(mdev, cmd, + cpu_to_be64(sector), + cpu_to_be32(blksize), + cpu_to_be64(block_id)); +} + +int drbd_send_drequest(struct drbd_conf *mdev, int cmd, + sector_t sector, int size, u64 block_id) +{ + int ok; + struct Drbd_BlockRequest_Packet p; + + p.sector = cpu_to_be64(sector); + p.block_id = block_id; + p.blksize = cpu_to_be32(size); + + ok = drbd_send_cmd(mdev, USE_DATA_SOCKET, cmd, + (struct Drbd_Header *)&p, sizeof(p)); + return ok; +} + +int drbd_send_drequest_csum(struct drbd_conf *mdev, + sector_t sector, int size, + void *digest, int digest_size, + enum Drbd_Packet_Cmd cmd) +{ + int ok; + struct Drbd_BlockRequest_Packet p; + + p.sector = cpu_to_be64(sector); + p.block_id = BE_DRBD_MAGIC + 0xbeef; + p.blksize = cpu_to_be32(size); + + p.head.magic = BE_DRBD_MAGIC; + p.head.command = cpu_to_be16(cmd); + p.head.length = cpu_to_be16(sizeof(p) - sizeof(struct Drbd_Header) + digest_size); + + mutex_lock(&mdev->data.mutex); + + ok = (sizeof(p) == drbd_send(mdev, mdev->data.socket, &p, sizeof(p), 0)); + ok = ok && (digest_size == drbd_send(mdev, mdev->data.socket, digest, digest_size, 0)); + + mutex_unlock(&mdev->data.mutex); + + return ok; +} + +int drbd_send_ov_request(struct drbd_conf *mdev, sector_t sector, int size) +{ + int ok; + struct Drbd_BlockRequest_Packet p; + + p.sector = cpu_to_be64(sector); + p.block_id = BE_DRBD_MAGIC + 0xbabe; + p.blksize = cpu_to_be32(size); + + ok = drbd_send_cmd(mdev, USE_DATA_SOCKET, OVRequest, + (struct Drbd_Header *)&p, sizeof(p)); + return ok; +} + +/* called on sndtimeo + * returns FALSE if we should retry, + * TRUE if we think connection is dead + */ +STATIC int we_should_drop_the_connection(struct drbd_conf *mdev, struct socket *sock) +{ + int drop_it; + /* long elapsed = (long)(jiffies - mdev->last_received); */ + + drop_it = mdev->meta.socket == sock + || !mdev->asender.task + || get_t_state(&mdev->asender) != Running + || mdev->state.conn < Connected; + + if (drop_it) + return TRUE; + + drop_it = !--mdev->ko_count; + if (!drop_it) { + ERR("[%s/%d] sock_sendmsg time expired, ko = %u\n", + current->comm, current->pid, mdev->ko_count); + request_ping(mdev); + } + + return drop_it; /* && (mdev->state == Primary) */; +} + +/* The idea of sendpage seems to be to put some kind of reference + * to the page into the skb, and to hand it over to the NIC. In + * this process get_page() gets called. + * + * As soon as the page was really sent over the network put_page() + * gets called by some part of the network layer. [ NIC driver? ] + * + * [ get_page() / put_page() increment/decrement the count. If count + * reaches 0 the page will be freed. ] + * + * This works nicely with pages from FSs. + * But this means that in protocol A we might signal IO completion too early! + * + * In order not to corrupt data during a resync we must make sure + * that we do not reuse our own buffer pages (EEs) to early, therefore + * we have the net_ee list. + * + * XFS seems to have problems, still, it submits pages with page_count == 0! + * As a workaround, we disable sendpage on pages + * with page_count == 0 or PageSlab. + */ +STATIC int _drbd_no_send_page(struct drbd_conf *mdev, struct page *page, + int offset, size_t size) +{ + int ret; + ret = drbd_send(mdev, mdev->data.socket, kmap(page) + offset, size, 0); + kunmap(page); + return ret; +} + +int _drbd_send_page(struct drbd_conf *mdev, struct page *page, + int offset, size_t size) +{ + mm_segment_t oldfs = get_fs(); + int sent, ok; + int len = size; + + /* PARANOIA. if this ever triggers, + * something in the layers above us is really kaputt. + *one roundtrip later: + * doh. it triggered. so XFS _IS_ really kaputt ... + * oh well... + */ + if ((page_count(page) < 1) || PageSlab(page)) { + /* e.g. XFS meta- & log-data is in slab pages, which have a + * page_count of 0 and/or have PageSlab() set... + */ + sent = _drbd_no_send_page(mdev, page, offset, size); + if (likely(sent > 0)) + len -= sent; + goto out; + } + + drbd_update_congested(mdev); + set_fs(KERNEL_DS); + do { + sent = mdev->data.socket->ops->sendpage(mdev->data.socket, page, + offset, len, + MSG_NOSIGNAL); + if (sent == -EAGAIN) { + if (we_should_drop_the_connection(mdev, + mdev->data.socket)) + break; + else + continue; + } + if (sent <= 0) { + drbd_WARN("%s: size=%d len=%d sent=%d\n", + __func__, (int)size, len, sent); + break; + } + len -= sent; + offset += sent; + } while (len > 0 /* THINK && mdev->cstate >= Connected*/); + set_fs(oldfs); + clear_bit(NET_CONGESTED, &mdev->flags); + +out: + ok = (len == 0); + if (likely(ok)) + mdev->send_cnt += size>>9; + return ok; +} + +static inline int _drbd_send_bio(struct drbd_conf *mdev, struct bio *bio) +{ + struct bio_vec *bvec; + int i; + __bio_for_each_segment(bvec, bio, i, 0) { + if (!_drbd_no_send_page(mdev, bvec->bv_page, + bvec->bv_offset, bvec->bv_len)) + return 0; + } + return 1; +} + +static inline int _drbd_send_zc_bio(struct drbd_conf *mdev, struct bio *bio) +{ + struct bio_vec *bvec; + int i; + __bio_for_each_segment(bvec, bio, i, 0) { + if (!_drbd_send_page(mdev, bvec->bv_page, + bvec->bv_offset, bvec->bv_len)) + return 0; + } + + return 1; +} + +/* Used to send write requests + * Primary -> Peer (Data) + */ +int drbd_send_dblock(struct drbd_conf *mdev, struct drbd_request *req) +{ + int ok = 1; + struct Drbd_Data_Packet p; + unsigned int dp_flags = 0; + void *dgb; + int dgs; + + if (!drbd_get_data_sock(mdev)) + return 0; + + dgs = (mdev->agreed_pro_version >= 87 && mdev->integrity_w_tfm) ? + crypto_hash_digestsize(mdev->integrity_w_tfm) : 0; + + p.head.magic = BE_DRBD_MAGIC; + p.head.command = cpu_to_be16(Data); + p.head.length = + cpu_to_be16(sizeof(p) - sizeof(struct Drbd_Header) + dgs + req->size); + + p.sector = cpu_to_be64(req->sector); + p.block_id = (unsigned long)req; + p.seq_num = cpu_to_be32(req->seq_num = + atomic_add_return(1, &mdev->packet_seq)); + dp_flags = 0; + + /* NOTE: no need to check if barriers supported here as we would + * not pass the test in make_request_common in that case + */ + if (bio_barrier(req->master_bio)) + dp_flags |= DP_HARDBARRIER; + if (bio_sync(req->master_bio)) + dp_flags |= DP_RW_SYNC; + if (mdev->state.conn >= SyncSource && + mdev->state.conn <= PausedSyncT) + dp_flags |= DP_MAY_SET_IN_SYNC; + + p.dp_flags = cpu_to_be32(dp_flags); + dump_packet(mdev, mdev->data.socket, 0, (void *)&p, __FILE__, __LINE__); + set_bit(UNPLUG_REMOTE, &mdev->flags); + ok = (sizeof(p) == + drbd_send(mdev, mdev->data.socket, &p, sizeof(p), MSG_MORE)); + if (ok && dgs) { + dgb = mdev->int_dig_out; + drbd_csum(mdev, mdev->integrity_w_tfm, req->master_bio, dgb); + ok = drbd_send(mdev, mdev->data.socket, dgb, dgs, MSG_MORE); + } + if (ok) { + if (mdev->net_conf->wire_protocol == DRBD_PROT_A) + ok = _drbd_send_bio(mdev, req->master_bio); + else + ok = _drbd_send_zc_bio(mdev, req->master_bio); + } + + drbd_put_data_sock(mdev); + return ok; +} + +/* answer packet, used to send data back for read requests: + * Peer -> (diskless) Primary (DataReply) + * SyncSource -> SyncTarget (RSDataReply) + */ +int drbd_send_block(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Tl_epoch_entry *e) +{ + int ok; + struct Drbd_Data_Packet p; + void *dgb; + int dgs; + + dgs = (mdev->agreed_pro_version >= 87 && mdev->integrity_w_tfm) ? + crypto_hash_digestsize(mdev->integrity_w_tfm) : 0; + + p.head.magic = BE_DRBD_MAGIC; + p.head.command = cpu_to_be16(cmd); + p.head.length = + cpu_to_be16(sizeof(p) - sizeof(struct Drbd_Header) + dgs + e->size); + + p.sector = cpu_to_be64(e->sector); + p.block_id = e->block_id; + /* p.seq_num = 0; No sequence numbers here.. */ + + /* Only called by our kernel thread. + * This one may be interupted by DRBD_SIG and/or DRBD_SIGKILL + * in response to admin command or module unload. + */ + if (!drbd_get_data_sock(mdev)) + return 0; + + dump_packet(mdev, mdev->data.socket, 0, (void *)&p, __FILE__, __LINE__); + ok = sizeof(p) == drbd_send(mdev, mdev->data.socket, &p, + sizeof(p), MSG_MORE); + if (ok && dgs) { + dgb = mdev->int_dig_out; + drbd_csum(mdev, mdev->integrity_w_tfm, e->private_bio, dgb); + ok = drbd_send(mdev, mdev->data.socket, dgb, dgs, MSG_MORE); + } + if (ok) + ok = _drbd_send_zc_bio(mdev, e->private_bio); + + drbd_put_data_sock(mdev); + return ok; +} + +/* + drbd_send distinguishes two cases: + + Packets sent via the data socket "sock" + and packets sent via the meta data socket "msock" + + sock msock + -----------------+-------------------------+------------------------------ + timeout conf.timeout / 2 conf.timeout / 2 + timeout action send a ping via msock Abort communication + and close all sockets +*/ + +/* + * you must have down()ed the appropriate [m]sock_mutex elsewhere! + */ +int drbd_send(struct drbd_conf *mdev, struct socket *sock, + void *buf, size_t size, unsigned msg_flags) +{ + struct kvec iov; + struct msghdr msg; + int rv, sent = 0; + + if (!sock) + return -1000; + + /* THINK if (signal_pending) return ... ? */ + + iov.iov_base = buf; + iov.iov_len = size; + + msg.msg_name = NULL; + msg.msg_namelen = 0; + msg.msg_control = NULL; + msg.msg_controllen = 0; + msg.msg_flags = msg_flags | MSG_NOSIGNAL; + + if (sock == mdev->data.socket) { + mdev->ko_count = mdev->net_conf->ko_count; + drbd_update_congested(mdev); + } + do { + /* STRANGE + * tcp_sendmsg does _not_ use its size parameter at all ? + * + * -EAGAIN on timeout, -EINTR on signal. + */ +/* THINK + * do we need to block DRBD_SIG if sock == &meta.socket ?? + * otherwise wake_asender() might interrupt some send_*Ack ! + */ + rv = kernel_sendmsg(sock, &msg, &iov, 1, size); + if (rv == -EAGAIN) { + if (we_should_drop_the_connection(mdev, sock)) + break; + else + continue; + } + D_ASSERT(rv != 0); + if (rv == -EINTR) { + flush_signals(current); + rv = 0; + } + if (rv < 0) + break; + sent += rv; + iov.iov_base += rv; + iov.iov_len -= rv; + } while (sent < size); + + if (sock == mdev->data.socket) + clear_bit(NET_CONGESTED, &mdev->flags); + + if (rv <= 0) { + if (rv != -EAGAIN) { + ERR("%s_sendmsg returned %d\n", + sock == mdev->meta.socket ? "msock" : "sock", + rv); + drbd_force_state(mdev, NS(conn, BrokenPipe)); + } else + drbd_force_state(mdev, NS(conn, Timeout)); + } + + return sent; +} + +static int drbd_open(struct block_device *bdev, fmode_t mode) +{ + struct drbd_conf *mdev = bdev->bd_disk->private_data; + unsigned long flags; + int rv = 0; + + spin_lock_irqsave(&mdev->req_lock, flags); + /* to have a stable mdev->state.role + * and no race with updating open_cnt */ + + if (mdev->state.role != Primary) { + if (mode & FMODE_WRITE) + rv = -EROFS; + else if (!allow_oos) + rv = -EMEDIUMTYPE; + } + + if (!rv) + mdev->open_cnt++; + spin_unlock_irqrestore(&mdev->req_lock, flags); + + return rv; +} + +static int drbd_release(struct gendisk *gd, fmode_t mode) +{ + struct drbd_conf *mdev = gd->private_data; + mdev->open_cnt--; + return 0; +} + +STATIC void drbd_unplug_fn(struct request_queue *q) +{ + struct drbd_conf *mdev = q->queuedata; + + MTRACE(TraceTypeUnplug, TraceLvlSummary, + INFO("got unplugged ap_bio_count=%d\n", + atomic_read(&mdev->ap_bio_cnt)); + ); + + /* unplug FIRST */ + spin_lock_irq(q->queue_lock); + blk_remove_plug(q); + spin_unlock_irq(q->queue_lock); + + /* only if connected */ + spin_lock_irq(&mdev->req_lock); + if (mdev->state.pdsk >= Inconsistent && mdev->state.conn >= Connected) { + D_ASSERT(mdev->state.role == Primary); + if (test_and_clear_bit(UNPLUG_REMOTE, &mdev->flags)) { + /* add to the data.work queue, + * unless already queued. + * XXX this might be a good addition to drbd_queue_work + * anyways, to detect "double queuing" ... */ + if (list_empty(&mdev->unplug_work.list)) + drbd_queue_work(&mdev->data.work, + &mdev->unplug_work); + } + } + spin_unlock_irq(&mdev->req_lock); + + if (mdev->state.disk >= Inconsistent) + drbd_kick_lo(mdev); +} + +STATIC void drbd_set_defaults(struct drbd_conf *mdev) +{ + mdev->sync_conf.after = DRBD_AFTER_DEF; + mdev->sync_conf.rate = DRBD_RATE_DEF; + mdev->sync_conf.al_extents = DRBD_AL_EXTENTS_DEF; + mdev->state = (union drbd_state_t) { + { .role = Secondary, + .peer = Unknown, + .conn = StandAlone, + .disk = Diskless, + .pdsk = DUnknown, + .susp = 0 + } }; +} + +void drbd_init_set_defaults(struct drbd_conf *mdev) +{ + /* the memset(,0,) did most of this. + * note: only assignments, no allocation in here */ + + drbd_set_defaults(mdev); + + /* for now, we do NOT yet support it, + * even though we start some framework + * to eventually support barriers */ + set_bit(NO_BARRIER_SUPP, &mdev->flags); + + atomic_set(&mdev->ap_bio_cnt, 0); + atomic_set(&mdev->ap_pending_cnt, 0); + atomic_set(&mdev->rs_pending_cnt, 0); + atomic_set(&mdev->unacked_cnt, 0); + atomic_set(&mdev->local_cnt, 0); + atomic_set(&mdev->net_cnt, 0); + atomic_set(&mdev->packet_seq, 0); + atomic_set(&mdev->pp_in_use, 0); + + mutex_init(&mdev->md_io_mutex); + mutex_init(&mdev->data.mutex); + mutex_init(&mdev->meta.mutex); + sema_init(&mdev->data.work.s, 0); + sema_init(&mdev->meta.work.s, 0); + mutex_init(&mdev->state_mutex); + + spin_lock_init(&mdev->data.work.q_lock); + spin_lock_init(&mdev->meta.work.q_lock); + + spin_lock_init(&mdev->al_lock); + spin_lock_init(&mdev->req_lock); + spin_lock_init(&mdev->peer_seq_lock); + spin_lock_init(&mdev->epoch_lock); + + INIT_LIST_HEAD(&mdev->active_ee); + INIT_LIST_HEAD(&mdev->sync_ee); + INIT_LIST_HEAD(&mdev->done_ee); + INIT_LIST_HEAD(&mdev->read_ee); + INIT_LIST_HEAD(&mdev->net_ee); + INIT_LIST_HEAD(&mdev->resync_reads); + INIT_LIST_HEAD(&mdev->data.work.q); + INIT_LIST_HEAD(&mdev->meta.work.q); + INIT_LIST_HEAD(&mdev->resync_work.list); + INIT_LIST_HEAD(&mdev->unplug_work.list); + INIT_LIST_HEAD(&mdev->md_sync_work.list); + INIT_LIST_HEAD(&mdev->bm_io_work.w.list); + mdev->resync_work.cb = w_resync_inactive; + mdev->unplug_work.cb = w_send_write_hint; + mdev->md_sync_work.cb = w_md_sync; + mdev->bm_io_work.w.cb = w_bitmap_io; + init_timer(&mdev->resync_timer); + init_timer(&mdev->md_sync_timer); + mdev->resync_timer.function = resync_timer_fn; + mdev->resync_timer.data = (unsigned long) mdev; + mdev->md_sync_timer.function = md_sync_timer_fn; + mdev->md_sync_timer.data = (unsigned long) mdev; + + init_waitqueue_head(&mdev->misc_wait); + init_waitqueue_head(&mdev->state_wait); + init_waitqueue_head(&mdev->ee_wait); + init_waitqueue_head(&mdev->al_wait); + init_waitqueue_head(&mdev->seq_wait); + + drbd_thread_init(mdev, &mdev->receiver, drbdd_init); + drbd_thread_init(mdev, &mdev->worker, drbd_worker); + drbd_thread_init(mdev, &mdev->asender, drbd_asender); + + mdev->agreed_pro_version = PRO_VERSION_MAX; + mdev->write_ordering = WO_bio_barrier; + mdev->resync_wenr = LC_FREE; +} + +void drbd_mdev_cleanup(struct drbd_conf *mdev) +{ + if (mdev->receiver.t_state != None) + ERR("ASSERT FAILED: receiver t_state == %d expected 0.\n", + mdev->receiver.t_state); + + /* no need to lock it, I'm the only thread alive */ + if (atomic_read(&mdev->current_epoch->epoch_size) != 0) + ERR("epoch_size:%d\n", atomic_read(&mdev->current_epoch->epoch_size)); + mdev->al_writ_cnt = + mdev->bm_writ_cnt = + mdev->read_cnt = + mdev->recv_cnt = + mdev->send_cnt = + mdev->writ_cnt = + mdev->p_size = + mdev->rs_start = + mdev->rs_total = + mdev->rs_failed = + mdev->rs_mark_left = + mdev->rs_mark_time = 0; + D_ASSERT(mdev->net_conf == NULL); + + drbd_set_my_capacity(mdev, 0); + drbd_bm_resize(mdev, 0); + drbd_bm_cleanup(mdev); + + drbd_free_resources(mdev); + + /* + * currently we drbd_init_ee only on module load, so + * we may do drbd_release_ee only on module unload! + */ + D_ASSERT(list_empty(&mdev->active_ee)); + D_ASSERT(list_empty(&mdev->sync_ee)); + D_ASSERT(list_empty(&mdev->done_ee)); + D_ASSERT(list_empty(&mdev->read_ee)); + D_ASSERT(list_empty(&mdev->net_ee)); + D_ASSERT(list_empty(&mdev->resync_reads)); + D_ASSERT(list_empty(&mdev->data.work.q)); + D_ASSERT(list_empty(&mdev->meta.work.q)); + D_ASSERT(list_empty(&mdev->resync_work.list)); + D_ASSERT(list_empty(&mdev->unplug_work.list)); + +} + + +STATIC void drbd_destroy_mempools(void) +{ + struct page *page; + + while (drbd_pp_pool) { + page = drbd_pp_pool; + drbd_pp_pool = (struct page *)page_private(page); + __free_page(page); + drbd_pp_vacant--; + } + + /* D_ASSERT(atomic_read(&drbd_pp_vacant)==0); */ + + if (drbd_ee_mempool) + mempool_destroy(drbd_ee_mempool); + if (drbd_request_mempool) + mempool_destroy(drbd_request_mempool); + if (drbd_ee_cache) + kmem_cache_destroy(drbd_ee_cache); + if (drbd_request_cache) + kmem_cache_destroy(drbd_request_cache); + + drbd_ee_mempool = NULL; + drbd_request_mempool = NULL; + drbd_ee_cache = NULL; + drbd_request_cache = NULL; + + return; +} + +STATIC int drbd_create_mempools(void) +{ + struct page *page; + const int number = (DRBD_MAX_SEGMENT_SIZE/PAGE_SIZE) * minor_count; + int i; + + /* prepare our caches and mempools */ + drbd_request_mempool = NULL; + drbd_ee_cache = NULL; + drbd_request_cache = NULL; + drbd_pp_pool = NULL; + + /* caches */ + drbd_request_cache = kmem_cache_create( + "drbd_req_cache", sizeof(struct drbd_request), 0, 0, NULL); + if (drbd_request_cache == NULL) + goto Enomem; + + drbd_ee_cache = kmem_cache_create( + "drbd_ee_cache", sizeof(struct Tl_epoch_entry), 0, 0, NULL); + if (drbd_ee_cache == NULL) + goto Enomem; + + /* mempools */ + drbd_request_mempool = mempool_create(number, + mempool_alloc_slab, mempool_free_slab, drbd_request_cache); + if (drbd_request_mempool == NULL) + goto Enomem; + + drbd_ee_mempool = mempool_create(number, + mempool_alloc_slab, mempool_free_slab, drbd_ee_cache); + if (drbd_request_mempool == NULL) + goto Enomem; + + /* drbd's page pool */ + spin_lock_init(&drbd_pp_lock); + + for (i = 0; i < number; i++) { + page = alloc_page(GFP_HIGHUSER); + if (!page) + goto Enomem; + set_page_private(page, (unsigned long)drbd_pp_pool); + drbd_pp_pool = page; + } + drbd_pp_vacant = number; + + return 0; + +Enomem: + drbd_destroy_mempools(); /* in case we allocated some */ + return -ENOMEM; +} + +STATIC int drbd_notify_sys(struct notifier_block *this, unsigned long code, + void *unused) +{ + /* just so we have it. you never know what interessting things we + * might want to do here some day... + */ + + return NOTIFY_DONE; +} + +STATIC struct notifier_block drbd_notifier = { + .notifier_call = drbd_notify_sys, +}; + +static void drbd_release_ee_lists(struct drbd_conf *mdev) +{ + int rr; + + rr = drbd_release_ee(mdev, &mdev->active_ee); + if (rr) + ERR("%d EEs in active list found!\n", rr); + + rr = drbd_release_ee(mdev, &mdev->sync_ee); + if (rr) + ERR("%d EEs in sync list found!\n", rr); + + rr = drbd_release_ee(mdev, &mdev->read_ee); + if (rr) + ERR("%d EEs in read list found!\n", rr); + + rr = drbd_release_ee(mdev, &mdev->done_ee); + if (rr) + ERR("%d EEs in done list found!\n", rr); + + rr = drbd_release_ee(mdev, &mdev->net_ee); + if (rr) + ERR("%d EEs in net list found!\n", rr); +} + +/* caution. no locking. + * currently only used from module cleanup code. */ +static void drbd_delete_device(unsigned int minor) +{ + struct drbd_conf *mdev = minor_to_mdev(minor); + + if (!mdev) + return; + + /* paranoia asserts */ + if (mdev->open_cnt != 0) + ERR("open_cnt = %d in %s:%u", mdev->open_cnt, + __FILE__ , __LINE__); + + ERR_IF (!list_empty(&mdev->data.work.q)) { + struct list_head *lp; + list_for_each(lp, &mdev->data.work.q) { + DUMPP(lp); + } + }; + /* end paranoia asserts */ + + del_gendisk(mdev->vdisk); + + /* cleanup stuff that may have been allocated during + * device (re-)configuration or state changes */ + + if (mdev->this_bdev) + bdput(mdev->this_bdev); + + drbd_free_resources(mdev); + + drbd_release_ee_lists(mdev); + + /* should be free'd on disconnect? */ + kfree(mdev->ee_hash); + /* + mdev->ee_hash_s = 0; + mdev->ee_hash = NULL; + */ + + if (mdev->act_log) + lc_free(mdev->act_log); + if (mdev->resync) + lc_free(mdev->resync); + + kfree(mdev->p_uuid); + /* mdev->p_uuid = NULL; */ + + kfree(mdev->int_dig_out); + kfree(mdev->int_dig_in); + kfree(mdev->int_dig_vv); + + /* cleanup the rest that has been + * allocated from drbd_new_device + * and actually free the mdev itself */ + drbd_free_mdev(mdev); +} + +STATIC void drbd_cleanup(void) +{ + unsigned int i; + + unregister_reboot_notifier(&drbd_notifier); + + drbd_nl_cleanup(); + + if (minor_table) { + if (drbd_proc) + remove_proc_entry("drbd", NULL); + i = minor_count; + while (i--) + drbd_delete_device(i); + drbd_destroy_mempools(); + } + + kfree(minor_table); + + unregister_blkdev(DRBD_MAJOR, "drbd"); + + printk(KERN_INFO "drbd: module cleanup done.\n"); +} + +/** + * drbd_congested: Returns 1<bc->backing_bdev); + r = bdi_congested(&q->backing_dev_info, bdi_bits); + dec_local(mdev); + if (r) + reason = 'b'; + } + + if (bdi_bits & (1 << BDI_async_congested) && test_bit(NET_CONGESTED, &mdev->flags)) { + r |= (1 << BDI_async_congested); + reason = reason == 'b' ? 'a' : 'n'; + } + +out: + mdev->congestion_reason = reason; + return r; +} + +struct drbd_conf *drbd_new_device(unsigned int minor) +{ + struct drbd_conf *mdev; + struct gendisk *disk; + struct request_queue *q; + + mdev = kzalloc(sizeof(struct drbd_conf), GFP_KERNEL); + if (!mdev) + return NULL; + + mdev->minor = minor; + + drbd_init_set_defaults(mdev); + + q = blk_alloc_queue(GFP_KERNEL); + if (!q) + goto out_no_q; + mdev->rq_queue = q; + q->queuedata = mdev; + blk_queue_max_segment_size(q, DRBD_MAX_SEGMENT_SIZE); + + disk = alloc_disk(1); + if (!disk) + goto out_no_disk; + mdev->vdisk = disk; + + set_disk_ro(disk, TRUE); + + disk->queue = q; + disk->major = DRBD_MAJOR; + disk->first_minor = minor; + disk->fops = &drbd_ops; + sprintf(disk->disk_name, "drbd%d", minor); + disk->private_data = mdev; + + mdev->this_bdev = bdget(MKDEV(DRBD_MAJOR, minor)); + /* we have no partitions. we contain only ourselves. */ + mdev->this_bdev->bd_contains = mdev->this_bdev; + + q->backing_dev_info.congested_fn = drbd_congested; + q->backing_dev_info.congested_data = mdev; + + blk_queue_make_request(q, drbd_make_request_26); + blk_queue_bounce_limit(q, BLK_BOUNCE_ANY); + blk_queue_merge_bvec(q, drbd_merge_bvec); + q->queue_lock = &mdev->req_lock; /* needed since we use */ + /* plugging on a queue, that actually has no requests! */ + q->unplug_fn = drbd_unplug_fn; + + mdev->md_io_page = alloc_page(GFP_KERNEL); + if (!mdev->md_io_page) + goto out_no_io_page; + + if (drbd_bm_init(mdev)) + goto out_no_bitmap; + /* no need to lock access, we are still initializing the module. */ + if (!tl_init(mdev)) + goto out_no_tl; + + mdev->app_reads_hash = kzalloc(APP_R_HSIZE*sizeof(void *), GFP_KERNEL); + if (!mdev->app_reads_hash) + goto out_no_app_reads; + + mdev->current_epoch = kzalloc(sizeof(struct drbd_epoch), GFP_KERNEL); + if (!mdev->current_epoch) + goto out_no_epoch; + + INIT_LIST_HEAD(&mdev->current_epoch->list); + mdev->epochs = 1; + + return mdev; + +/* out_whatever_else: + kfree(mdev->current_epoch); */ +out_no_epoch: + kfree(mdev->app_reads_hash); +out_no_app_reads: + tl_cleanup(mdev); +out_no_tl: + drbd_bm_cleanup(mdev); +out_no_bitmap: + __free_page(mdev->md_io_page); +out_no_io_page: + put_disk(disk); +out_no_disk: + blk_cleanup_queue(q); +out_no_q: + kfree(mdev); + return NULL; +} + +/* counterpart of drbd_new_device. + * last part of drbd_delete_device. */ +void drbd_free_mdev(struct drbd_conf *mdev) +{ + kfree(mdev->current_epoch); + kfree(mdev->app_reads_hash); + tl_cleanup(mdev); + if (mdev->bitmap) /* should no longer be there. */ + drbd_bm_cleanup(mdev); + __free_page(mdev->md_io_page); + put_disk(mdev->vdisk); + blk_cleanup_queue(mdev->rq_queue); + kfree(mdev); +} + + +int __init drbd_init(void) +{ + int err; + + if (sizeof(struct Drbd_HandShake_Packet) != 80) { + printk(KERN_ERR + "drbd: never change the size or layout " + "of the HandShake packet.\n"); + return -EINVAL; + } + + if (1 > minor_count || minor_count > 255) { + printk(KERN_ERR + "drbd: invalid minor_count (%d)\n", minor_count); +#ifdef MODULE + return -EINVAL; +#else + minor_count = 8; +#endif + } + + err = drbd_nl_init(); + if (err) + return err; + + err = register_blkdev(DRBD_MAJOR, "drbd"); + if (err) { + printk(KERN_ERR + "drbd: unable to register block device major %d\n", + DRBD_MAJOR); + return err; + } + + register_reboot_notifier(&drbd_notifier); + + /* + * allocate all necessary structs + */ + err = -ENOMEM; + + init_waitqueue_head(&drbd_pp_wait); + + drbd_proc = NULL; /* play safe for drbd_cleanup */ + minor_table = kzalloc(sizeof(struct drbd_conf *)*minor_count, + GFP_KERNEL); + if (!minor_table) + goto Enomem; + + err = drbd_create_mempools(); + if (err) + goto Enomem; + + drbd_proc = proc_create("drbd", S_IFREG | S_IRUGO , NULL, &drbd_proc_fops); + if (!drbd_proc) { + printk(KERN_ERR "drbd: unable to register proc file\n"); + goto Enomem; + } + + rwlock_init(&global_state_lock); + + printk(KERN_INFO "drbd: initialised. " + "Version: " REL_VERSION " (api:%d/proto:%d-%d)\n", + API_VERSION, PRO_VERSION_MIN, PRO_VERSION_MAX); + printk(KERN_INFO "drbd: %s\n", drbd_buildtag()); + printk(KERN_INFO "drbd: registered as block device major %d\n", + DRBD_MAJOR); + printk(KERN_INFO "drbd: minor_table @ 0x%p\n", minor_table); + + return 0; /* Success! */ + +Enomem: + drbd_cleanup(); + if (err == -ENOMEM) + /* currently always the case */ + printk(KERN_ERR "drbd: ran out of memory\n"); + else + printk(KERN_ERR "drbd: initialization failure\n"); + return err; +} + +void drbd_free_bc(struct drbd_backing_dev *bc) +{ + if (bc == NULL) + return; + + bd_release(bc->backing_bdev); + bd_release(bc->md_bdev); + + fput(bc->lo_file); + fput(bc->md_file); + + kfree(bc); +} + +void drbd_free_sock(struct drbd_conf *mdev) +{ + if (mdev->data.socket) { + sock_release(mdev->data.socket); + mdev->data.socket = NULL; + } + if (mdev->meta.socket) { + sock_release(mdev->meta.socket); + mdev->meta.socket = NULL; + } +} + + +void drbd_free_resources(struct drbd_conf *mdev) +{ + crypto_free_hash(mdev->csums_tfm); + mdev->csums_tfm = NULL; + crypto_free_hash(mdev->verify_tfm); + mdev->verify_tfm = NULL; + crypto_free_hash(mdev->cram_hmac_tfm); + mdev->cram_hmac_tfm = NULL; + crypto_free_hash(mdev->integrity_w_tfm); + mdev->integrity_w_tfm = NULL; + crypto_free_hash(mdev->integrity_r_tfm); + mdev->integrity_r_tfm = NULL; + + drbd_free_sock(mdev); + + __no_warn(local, + drbd_free_bc(mdev->bc); + mdev->bc = NULL;); +} + +/*********************************/ +/* meta data management */ + +struct meta_data_on_disk { + u64 la_size; /* last agreed size. */ + u64 uuid[UUID_SIZE]; /* UUIDs. */ + u64 device_uuid; + u64 reserved_u64_1; + u32 flags; /* MDF */ + u32 magic; + u32 md_size_sect; + u32 al_offset; /* offset to this block */ + u32 al_nr_extents; /* important for restoring the AL */ + /* `-- act_log->nr_elements <-- sync_conf.al_extents */ + u32 bm_offset; /* offset to the bitmap, from here */ + u32 bm_bytes_per_bit; /* BM_BLOCK_SIZE */ + u32 reserved_u32[4]; + +} __attribute((packed)); + +/** + * drbd_md_sync: + * Writes the meta data super block if the MD_DIRTY flag bit is set. + */ +void drbd_md_sync(struct drbd_conf *mdev) +{ + struct meta_data_on_disk *buffer; + sector_t sector; + int i; + + if (!test_and_clear_bit(MD_DIRTY, &mdev->flags)) + return; + del_timer(&mdev->md_sync_timer); + + /* We use here Failed and not Attaching because we try to write + * metadata even if we detach due to a disk failure! */ + if (!inc_local_if_state(mdev, Failed)) + return; + + MTRACE(TraceTypeMDIO, TraceLvlSummary, + INFO("Writing meta data super block now.\n"); + ); + + mutex_lock(&mdev->md_io_mutex); + buffer = (struct meta_data_on_disk *)page_address(mdev->md_io_page); + memset(buffer, 0, 512); + + buffer->la_size = cpu_to_be64(drbd_get_capacity(mdev->this_bdev)); + for (i = Current; i < UUID_SIZE; i++) + buffer->uuid[i] = cpu_to_be64(mdev->bc->md.uuid[i]); + buffer->flags = cpu_to_be32(mdev->bc->md.flags); + buffer->magic = cpu_to_be32(DRBD_MD_MAGIC); + + buffer->md_size_sect = cpu_to_be32(mdev->bc->md.md_size_sect); + buffer->al_offset = cpu_to_be32(mdev->bc->md.al_offset); + buffer->al_nr_extents = cpu_to_be32(mdev->act_log->nr_elements); + buffer->bm_bytes_per_bit = cpu_to_be32(BM_BLOCK_SIZE); + buffer->device_uuid = cpu_to_be64(mdev->bc->md.device_uuid); + + buffer->bm_offset = cpu_to_be32(mdev->bc->md.bm_offset); + + D_ASSERT(drbd_md_ss__(mdev, mdev->bc) == mdev->bc->md.md_offset); + sector = mdev->bc->md.md_offset; + + if (drbd_md_sync_page_io(mdev, mdev->bc, sector, WRITE)) { + clear_bit(MD_DIRTY, &mdev->flags); + } else { + /* this was a try anyways ... */ + ERR("meta data update failed!\n"); + + drbd_chk_io_error(mdev, 1, TRUE); + drbd_io_error(mdev, TRUE); + } + + /* Update mdev->bc->md.la_size_sect, + * since we updated it on metadata. */ + mdev->bc->md.la_size_sect = drbd_get_capacity(mdev->this_bdev); + + mutex_unlock(&mdev->md_io_mutex); + dec_local(mdev); +} + +/** + * drbd_md_read: + * @bdev: describes the backing storage and the meta-data storage + * Reads the meta data from bdev. Return 0 (NoError) on success, and an + * enum ret_codes in case something goes wrong. + * Currently only: MDIOError, MDInvalid. + */ +int drbd_md_read(struct drbd_conf *mdev, struct drbd_backing_dev *bdev) +{ + struct meta_data_on_disk *buffer; + int i, rv = NoError; + + if (!inc_local_if_state(mdev, Attaching)) + return MDIOError; + + mutex_lock(&mdev->md_io_mutex); + buffer = (struct meta_data_on_disk *)page_address(mdev->md_io_page); + + if (!drbd_md_sync_page_io(mdev, bdev, bdev->md.md_offset, READ)) { + /* NOTE: cant do normal error processing here as this is + called BEFORE disk is attached */ + ERR("Error while reading metadata.\n"); + rv = MDIOError; + goto err; + } + + if (be32_to_cpu(buffer->magic) != DRBD_MD_MAGIC) { + ERR("Error while reading metadata, magic not found.\n"); + rv = MDInvalid; + goto err; + } + if (be32_to_cpu(buffer->al_offset) != bdev->md.al_offset) { + ERR("unexpected al_offset: %d (expected %d)\n", + be32_to_cpu(buffer->al_offset), bdev->md.al_offset); + rv = MDInvalid; + goto err; + } + if (be32_to_cpu(buffer->bm_offset) != bdev->md.bm_offset) { + ERR("unexpected bm_offset: %d (expected %d)\n", + be32_to_cpu(buffer->bm_offset), bdev->md.bm_offset); + rv = MDInvalid; + goto err; + } + if (be32_to_cpu(buffer->md_size_sect) != bdev->md.md_size_sect) { + ERR("unexpected md_size: %u (expected %u)\n", + be32_to_cpu(buffer->md_size_sect), bdev->md.md_size_sect); + rv = MDInvalid; + goto err; + } + + if (be32_to_cpu(buffer->bm_bytes_per_bit) != BM_BLOCK_SIZE) { + ERR("unexpected bm_bytes_per_bit: %u (expected %u)\n", + be32_to_cpu(buffer->bm_bytes_per_bit), BM_BLOCK_SIZE); + rv = MDInvalid; + goto err; + } + + bdev->md.la_size_sect = be64_to_cpu(buffer->la_size); + for (i = Current; i < UUID_SIZE; i++) + bdev->md.uuid[i] = be64_to_cpu(buffer->uuid[i]); + bdev->md.flags = be32_to_cpu(buffer->flags); + mdev->sync_conf.al_extents = be32_to_cpu(buffer->al_nr_extents); + bdev->md.device_uuid = be64_to_cpu(buffer->device_uuid); + + if (mdev->sync_conf.al_extents < 7) + mdev->sync_conf.al_extents = 127; + + err: + mutex_unlock(&mdev->md_io_mutex); + dec_local(mdev); + + return rv; +} + +/** + * drbd_md_mark_dirty: + * Call this function if you change enything that should be written to + * the meta-data super block. This function sets MD_DIRTY, and starts a + * timer that ensures that within five seconds you have to call drbd_md_sync(). + */ +void drbd_md_mark_dirty(struct drbd_conf *mdev) +{ + set_bit(MD_DIRTY, &mdev->flags); + mod_timer(&mdev->md_sync_timer, jiffies + 5*HZ); +} + + +STATIC void drbd_uuid_move_history(struct drbd_conf *mdev) __must_hold(local) +{ + int i; + + for (i = History_start; i < History_end; i++) { + mdev->bc->md.uuid[i+1] = mdev->bc->md.uuid[i]; + + MTRACE(TraceTypeUuid, TraceLvlAll, + drbd_print_uuid(mdev, i+1); + ); + } +} + +void _drbd_uuid_set(struct drbd_conf *mdev, int idx, u64 val) __must_hold(local) +{ + if (idx == Current) { + if (mdev->state.role == Primary) + val |= 1; + else + val &= ~((u64)1); + + drbd_set_ed_uuid(mdev, val); + } + + mdev->bc->md.uuid[idx] = val; + + MTRACE(TraceTypeUuid, TraceLvlSummary, + drbd_print_uuid(mdev, idx); + ); + + drbd_md_mark_dirty(mdev); +} + + +void drbd_uuid_set(struct drbd_conf *mdev, int idx, u64 val) __must_hold(local) +{ + if (mdev->bc->md.uuid[idx]) { + drbd_uuid_move_history(mdev); + mdev->bc->md.uuid[History_start] = mdev->bc->md.uuid[idx]; + MTRACE(TraceTypeUuid, TraceLvlMetrics, + drbd_print_uuid(mdev, History_start); + ); + } + _drbd_uuid_set(mdev, idx, val); +} + +/** + * drbd_uuid_new_current: + * Creates a new current UUID, and rotates the old current UUID into + * the bitmap slot. Causes an incremental resync upon next connect. + */ +void drbd_uuid_new_current(struct drbd_conf *mdev) __must_hold(local) +{ + u64 val; + + INFO("Creating new current UUID\n"); + D_ASSERT(mdev->bc->md.uuid[Bitmap] == 0); + mdev->bc->md.uuid[Bitmap] = mdev->bc->md.uuid[Current]; + MTRACE(TraceTypeUuid, TraceLvlMetrics, + drbd_print_uuid(mdev, Bitmap); + ); + + get_random_bytes(&val, sizeof(u64)); + _drbd_uuid_set(mdev, Current, val); +} + +void drbd_uuid_set_bm(struct drbd_conf *mdev, u64 val) __must_hold(local) +{ + if (mdev->bc->md.uuid[Bitmap] == 0 && val == 0) + return; + + if (val == 0) { + drbd_uuid_move_history(mdev); + mdev->bc->md.uuid[History_start] = mdev->bc->md.uuid[Bitmap]; + mdev->bc->md.uuid[Bitmap] = 0; + + MTRACE(TraceTypeUuid, TraceLvlMetrics, + drbd_print_uuid(mdev, History_start); + drbd_print_uuid(mdev, Bitmap); + ); + } else { + if (mdev->bc->md.uuid[Bitmap]) + drbd_WARN("bm UUID already set"); + + mdev->bc->md.uuid[Bitmap] = val; + mdev->bc->md.uuid[Bitmap] &= ~((u64)1); + + MTRACE(TraceTypeUuid, TraceLvlMetrics, + drbd_print_uuid(mdev, Bitmap); + ); + } + drbd_md_mark_dirty(mdev); +} + +/** + * drbd_bmio_set_n_write: + * Is an io_fn for drbd_queue_bitmap_io() or drbd_bitmap_io() that sets + * all bits in the bitmap and writes the whole bitmap to stable storage. + */ +int drbd_bmio_set_n_write(struct drbd_conf *mdev) +{ + int rv = -EIO; + + if (inc_local_if_state(mdev, Attaching)) { + drbd_md_set_flag(mdev, MDF_FullSync); + drbd_md_sync(mdev); + drbd_bm_set_all(mdev); + + rv = drbd_bm_write(mdev); + + if (!rv) { + drbd_md_clear_flag(mdev, MDF_FullSync); + drbd_md_sync(mdev); + } + + dec_local(mdev); + } + + return rv; +} + +/** + * drbd_bmio_clear_n_write: + * Is an io_fn for drbd_queue_bitmap_io() or drbd_bitmap_io() that clears + * all bits in the bitmap and writes the whole bitmap to stable storage. + */ +int drbd_bmio_clear_n_write(struct drbd_conf *mdev) +{ + int rv = -EIO; + + if (inc_local_if_state(mdev, Attaching)) { + drbd_bm_clear_all(mdev); + rv = drbd_bm_write(mdev); + dec_local(mdev); + } + + return rv; +} + +STATIC int w_bitmap_io(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct bm_io_work *work = (struct bm_io_work *)w; + int rv; + + D_ASSERT(atomic_read(&mdev->ap_bio_cnt) == 0); + + drbd_bm_lock(mdev, work->why); + rv = work->io_fn(mdev); + drbd_bm_unlock(mdev); + + clear_bit(BITMAP_IO, &mdev->flags); + wake_up(&mdev->misc_wait); + + if (work->done) + work->done(mdev, rv); + + clear_bit(BITMAP_IO_QUEUED, &mdev->flags); + work->why = NULL; + + return 1; +} + +/** + * drbd_queue_bitmap_io: + * Queues an IO operation on the whole bitmap. + * While IO on the bitmap happens we freeze appliation IO thus we ensure + * that drbd_set_out_of_sync() can not be called. + * This function MUST ONLY be called from worker context. + * BAD API ALERT! + * It MUST NOT be used while a previous such work is still pending! + */ +void drbd_queue_bitmap_io(struct drbd_conf *mdev, + int (*io_fn)(struct drbd_conf *), + void (*done)(struct drbd_conf *, int), + char *why) +{ + D_ASSERT(current == mdev->worker.task); + + D_ASSERT(!test_bit(BITMAP_IO_QUEUED, &mdev->flags)); + D_ASSERT(!test_bit(BITMAP_IO, &mdev->flags)); + D_ASSERT(list_empty(&mdev->bm_io_work.w.list)); + if (mdev->bm_io_work.why) + ERR("FIXME going to queue '%s' but '%s' still pending?\n", + why, mdev->bm_io_work.why); + + mdev->bm_io_work.io_fn = io_fn; + mdev->bm_io_work.done = done; + mdev->bm_io_work.why = why; + + set_bit(BITMAP_IO, &mdev->flags); + if (atomic_read(&mdev->ap_bio_cnt) == 0) { + if (list_empty(&mdev->bm_io_work.w.list)) { + set_bit(BITMAP_IO_QUEUED, &mdev->flags); + drbd_queue_work(&mdev->data.work, &mdev->bm_io_work.w); + } else + ERR("FIXME avoided double queuing bm_io_work\n"); + } +} + +/** + * drbd_bitmap_io: + * Does an IO operation on the bitmap, freezing application IO while that + * IO operations runs. This functions MUST NOT be called from worker context. + */ +int drbd_bitmap_io(struct drbd_conf *mdev, int (*io_fn)(struct drbd_conf *), char *why) +{ + int rv; + + D_ASSERT(current != mdev->worker.task); + + drbd_suspend_io(mdev); + + drbd_bm_lock(mdev, why); + rv = io_fn(mdev); + drbd_bm_unlock(mdev); + + drbd_resume_io(mdev); + + return rv; +} + +void drbd_md_set_flag(struct drbd_conf *mdev, int flag) __must_hold(local) +{ + if ((mdev->bc->md.flags & flag) != flag) { + drbd_md_mark_dirty(mdev); + mdev->bc->md.flags |= flag; + } +} + +void drbd_md_clear_flag(struct drbd_conf *mdev, int flag) __must_hold(local) +{ + if ((mdev->bc->md.flags & flag) != 0) { + drbd_md_mark_dirty(mdev); + mdev->bc->md.flags &= ~flag; + } +} +int drbd_md_test_flag(struct drbd_backing_dev *bdev, int flag) +{ + return (bdev->md.flags & flag) != 0; +} + +STATIC void md_sync_timer_fn(unsigned long data) +{ + struct drbd_conf *mdev = (struct drbd_conf *) data; + + drbd_queue_work_front(&mdev->data.work, &mdev->md_sync_work); +} + +STATIC int w_md_sync(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + drbd_WARN("md_sync_timer expired! Worker calls drbd_md_sync().\n"); + drbd_md_sync(mdev); + + return 1; +} + +#ifdef DRBD_ENABLE_FAULTS +/* Fault insertion support including random number generator shamelessly + * stolen from kernel/rcutorture.c */ +struct fault_random_state { + unsigned long state; + unsigned long count; +}; + +#define FAULT_RANDOM_MULT 39916801 /* prime */ +#define FAULT_RANDOM_ADD 479001701 /* prime */ +#define FAULT_RANDOM_REFRESH 10000 + +/* + * Crude but fast random-number generator. Uses a linear congruential + * generator, with occasional help from get_random_bytes(). + */ +STATIC unsigned long +_drbd_fault_random(struct fault_random_state *rsp) +{ + long refresh; + + if (--rsp->count < 0) { + get_random_bytes(&refresh, sizeof(refresh)); + rsp->state += refresh; + rsp->count = FAULT_RANDOM_REFRESH; + } + rsp->state = rsp->state * FAULT_RANDOM_MULT + FAULT_RANDOM_ADD; + return swahw32(rsp->state); +} + +STATIC char * +_drbd_fault_str(unsigned int type) { + static char *_faults[] = { + "Meta-data write", + "Meta-data read", + "Resync write", + "Resync read", + "Data write", + "Data read", + "Data read ahead", + "BM allocation", + "EE allocation" + }; + + return (type < DRBD_FAULT_MAX) ? _faults[type] : "**Unknown**"; +} + +unsigned int +_drbd_insert_fault(struct drbd_conf *mdev, unsigned int type) +{ + static struct fault_random_state rrs = {0, 0}; + + unsigned int ret = ( + (fault_devs == 0 || + ((1 << mdev_to_minor(mdev)) & fault_devs) != 0) && + (((_drbd_fault_random(&rrs) % 100) + 1) <= fault_rate)); + + if (ret) { + fault_count++; + + if (printk_ratelimit()) + drbd_WARN("***Simulating %s failure\n", + _drbd_fault_str(type)); + } + + return ret; +} +#endif + +#ifdef ENABLE_DYNAMIC_TRACE + +STATIC char *_drbd_uuid_str(unsigned int idx) +{ + static char *uuid_str[] = { + "Current", + "Bitmap", + "History_start", + "History_end", + "UUID_SIZE", + "UUID_FLAGS", + }; + + return (idx < EXT_UUID_SIZE) ? uuid_str[idx] : "*Unknown UUID index*"; +} + +/* Pretty print a UUID value */ +void drbd_print_uuid(struct drbd_conf *mdev, unsigned int idx) __must_hold(local) +{ + INFO(" uuid[%s] now %016llX\n", + _drbd_uuid_str(idx), (unsigned long long)mdev->bc->md.uuid[idx]); +} + + +/* + * + * drbd_print_buffer + * + * This routine dumps binary data to the debugging output. Can be + * called at interrupt level. + * + * Arguments: + * + * prefix - String is output at the beginning of each line output + * flags - Control operation of the routine. Currently defined + * Flags are: + * DBGPRINT_BUFFADDR; if set, each line starts with the + * virtual address of the line being outupt. If clear, + * each line starts with the offset from the beginning + * of the buffer. + * size - Indicates the size of each entry in the buffer. Supported + * values are sizeof(char), sizeof(short) and sizeof(int) + * buffer - Start address of buffer + * buffer_va - Virtual address of start of buffer (normally the same + * as Buffer, but having it separate allows it to hold + * file address for example) + * length - length of buffer + * + */ +void +drbd_print_buffer(const char *prefix, unsigned int flags, int size, + const void *buffer, const void *buffer_va, + unsigned int length) + +#define LINE_SIZE 16 +#define LINE_ENTRIES (int)(LINE_SIZE/size) +{ + const unsigned char *pstart; + const unsigned char *pstart_va; + const unsigned char *pend; + char bytes_str[LINE_SIZE*3+8], ascii_str[LINE_SIZE+8]; + char *pbytes = bytes_str, *pascii = ascii_str; + int offset = 0; + long sizemask; + int field_width; + int index; + const unsigned char *pend_str; + const unsigned char *p; + int count; + + /* verify size parameter */ + if (size != sizeof(char) && + size != sizeof(short) && + size != sizeof(int)) { + printk(KERN_DEBUG "drbd_print_buffer: " + "ERROR invalid size %d\n", size); + return; + } + + sizemask = size-1; + field_width = size*2; + + /* Adjust start/end to be on appropriate boundary for size */ + buffer = (const char *)((long)buffer & ~sizemask); + pend = (const unsigned char *) + (((long)buffer + length + sizemask) & ~sizemask); + + if (flags & DBGPRINT_BUFFADDR) { + /* Move start back to nearest multiple of line size, + * if printing address. This results in nicely formatted output + * with addresses being on line size (16) byte boundaries */ + pstart = (const unsigned char *)((long)buffer & ~(LINE_SIZE-1)); + } else { + pstart = (const unsigned char *)buffer; + } + + /* Set value of start VA to print if addresses asked for */ + pstart_va = (const unsigned char *)buffer_va + - ((const unsigned char *)buffer-pstart); + + /* Calculate end position to nicely align right hand side */ + pend_str = pstart + (((pend-pstart) + LINE_SIZE-1) & ~(LINE_SIZE-1)); + + /* Init strings */ + *pbytes = *pascii = '\0'; + + /* Start at beginning of first line */ + p = pstart; + count = 0; + + while (p < pend_str) { + if (p < (const unsigned char *)buffer || p >= pend) { + /* Before start of buffer or after end- print spaces */ + pbytes += sprintf(pbytes, "%*c ", field_width, ' '); + pascii += sprintf(pascii, "%*c", size, ' '); + p += size; + } else { + /* Add hex and ascii to strings */ + int val; + switch (size) { + default: + case 1: + val = *(unsigned char *)p; + break; + case 2: + val = *(unsigned short *)p; + break; + case 4: + val = *(unsigned int *)p; + break; + } + + pbytes += sprintf(pbytes, "%0*x ", field_width, val); + + for (index = size; index; index--) { + *pascii++ = isprint(*p) ? *p : '.'; + p++; + } + } + + count++; + + if (count == LINE_ENTRIES || p >= pend_str) { + /* Null terminate and print record */ + *pascii = '\0'; + printk(KERN_DEBUG "%s%8.8lx: %*s|%*s|\n", + prefix, + (flags & DBGPRINT_BUFFADDR) + ? (long)pstart_va:(long)offset, + LINE_ENTRIES*(field_width+1), bytes_str, + LINE_SIZE, ascii_str); + + /* Move onto next line */ + pstart_va += (p-pstart); + pstart = p; + count = 0; + offset += LINE_SIZE; + + /* Re-init strings */ + pbytes = bytes_str; + pascii = ascii_str; + *pbytes = *pascii = '\0'; + } + } +} + +#define PSM(A) \ +do { \ + if (mask.A) { \ + int i = snprintf(p, len, " " #A "( %s )", \ + A##s_to_name(val.A)); \ + if (i >= len) \ + return op; \ + p += i; \ + len -= i; \ + } \ +} while (0) + +STATIC char *dump_st(char *p, int len, union drbd_state_t mask, union drbd_state_t val) +{ + char *op = p; + *p = '\0'; + PSM(role); + PSM(peer); + PSM(conn); + PSM(disk); + PSM(pdsk); + + return op; +} + +#define INFOP(fmt, args...) \ +do { \ + if (trace_level >= TraceLvlAll) { \ + INFO("%s:%d: %s [%d] %s %s " fmt , \ + file, line, current->comm, current->pid, \ + sockname, recv ? "<<<" : ">>>" , \ + ## args); \ + } else { \ + INFO("%s %s " fmt, sockname, \ + recv ? "<<<" : ">>>" , \ + ## args); \ + } \ +} while (0) + +STATIC char *_dump_block_id(u64 block_id, char *buff) +{ + if (is_syncer_block_id(block_id)) + strcpy(buff, "SyncerId"); + else + sprintf(buff, "%llx", (unsigned long long)block_id); + + return buff; +} + +void +_dump_packet(struct drbd_conf *mdev, struct socket *sock, + int recv, union Drbd_Polymorph_Packet *p, char *file, int line) +{ + char *sockname = sock == mdev->meta.socket ? "meta" : "data"; + int cmd = (recv == 2) ? p->head.command : be16_to_cpu(p->head.command); + char tmp[300]; + union drbd_state_t m, v; + + switch (cmd) { + case HandShake: + INFOP("%s (protocol %u-%u)\n", cmdname(cmd), + be32_to_cpu(p->HandShake.protocol_min), + be32_to_cpu(p->HandShake.protocol_max)); + break; + + case ReportBitMap: /* don't report this */ + case ReportCBitMap: /* don't report this */ + break; + + case Data: + INFOP("%s (sector %llus, id %s, seq %u, f %x)\n", cmdname(cmd), + (unsigned long long)be64_to_cpu(p->Data.sector), + _dump_block_id(p->Data.block_id, tmp), + be32_to_cpu(p->Data.seq_num), + be32_to_cpu(p->Data.dp_flags) + ); + break; + + case DataReply: + case RSDataReply: + INFOP("%s (sector %llus, id %s)\n", cmdname(cmd), + (unsigned long long)be64_to_cpu(p->Data.sector), + _dump_block_id(p->Data.block_id, tmp) + ); + break; + + case RecvAck: + case WriteAck: + case RSWriteAck: + case DiscardAck: + case NegAck: + case NegRSDReply: + INFOP("%s (sector %llus, size %u, id %s, seq %u)\n", + cmdname(cmd), + (long long)be64_to_cpu(p->BlockAck.sector), + be32_to_cpu(p->BlockAck.blksize), + _dump_block_id(p->BlockAck.block_id, tmp), + be32_to_cpu(p->BlockAck.seq_num) + ); + break; + + case DataRequest: + case RSDataRequest: + INFOP("%s (sector %llus, size %u, id %s)\n", cmdname(cmd), + (long long)be64_to_cpu(p->BlockRequest.sector), + be32_to_cpu(p->BlockRequest.blksize), + _dump_block_id(p->BlockRequest.block_id, tmp) + ); + break; + + case Barrier: + case BarrierAck: + INFOP("%s (barrier %u)\n", cmdname(cmd), p->Barrier.barrier); + break; + + case SyncParam: + case SyncParam89: + INFOP("%s (rate %u, verify-alg \"%.64s\", csums-alg \"%.64s\")\n", + cmdname(cmd), be32_to_cpu(p->SyncParam89.rate), + p->SyncParam89.verify_alg, p->SyncParam89.csums_alg); + break; + + case ReportUUIDs: + INFOP("%s Curr:%016llX, Bitmap:%016llX, " + "HisSt:%016llX, HisEnd:%016llX\n", + cmdname(cmd), + (unsigned long long)be64_to_cpu(p->GenCnt.uuid[Current]), + (unsigned long long)be64_to_cpu(p->GenCnt.uuid[Bitmap]), + (unsigned long long)be64_to_cpu(p->GenCnt.uuid[History_start]), + (unsigned long long)be64_to_cpu(p->GenCnt.uuid[History_end])); + break; + + case ReportSizes: + INFOP("%s (d %lluMiB, u %lluMiB, c %lldMiB, " + "max bio %x, q order %x)\n", + cmdname(cmd), + (long long)(be64_to_cpu(p->Sizes.d_size)>>(20-9)), + (long long)(be64_to_cpu(p->Sizes.u_size)>>(20-9)), + (long long)(be64_to_cpu(p->Sizes.c_size)>>(20-9)), + be32_to_cpu(p->Sizes.max_segment_size), + be32_to_cpu(p->Sizes.queue_order_type)); + break; + + case ReportState: + v.i = be32_to_cpu(p->State.state); + m.i = 0xffffffff; + dump_st(tmp, sizeof(tmp), m, v); + INFOP("%s (s %x {%s})\n", cmdname(cmd), v.i, tmp); + break; + + case StateChgRequest: + m.i = be32_to_cpu(p->ReqState.mask); + v.i = be32_to_cpu(p->ReqState.val); + dump_st(tmp, sizeof(tmp), m, v); + INFOP("%s (m %x v %x {%s})\n", cmdname(cmd), m.i, v.i, tmp); + break; + + case StateChgReply: + INFOP("%s (ret %x)\n", cmdname(cmd), + be32_to_cpu(p->RqSReply.retcode)); + break; + + case Ping: + case PingAck: + /* + * Dont trace pings at summary level + */ + if (trace_level < TraceLvlAll) + break; + /* fall through... */ + default: + INFOP("%s (%u)\n", cmdname(cmd), cmd); + break; + } +} + +/* Debug routine to dump info about bio */ + +void _dump_bio(const char *pfx, struct drbd_conf *mdev, struct bio *bio, int complete, struct drbd_request *r) +{ +#ifdef CONFIG_LBD +#define SECTOR_FORMAT "%Lx" +#else +#define SECTOR_FORMAT "%lx" +#endif +#define SECTOR_SHIFT 9 + + unsigned long lowaddr = (unsigned long)(bio->bi_sector << SECTOR_SHIFT); + char *faddr = (char *)(lowaddr); + char rb[sizeof(void *)*2+6] = { 0, }; + struct bio_vec *bvec; + int segno; + + const int rw = bio->bi_rw; + const int biorw = (rw & (RW_MASK|RWA_MASK)); + const int biobarrier = (rw & (1<>>", + pfx, + biorw == WRITE ? "Write" : "Read", + biobarrier ? " : B" : "", + biosync ? " : S" : "", + bio, + rb, + complete ? (drbd_bio_uptodate(bio) ? "Success, " : "Failed, ") : "", + bio->bi_sector << SECTOR_SHIFT, + bio->bi_size); + + if (trace_level >= TraceLvlMetrics && + ((biorw == WRITE) ^ complete)) { + printk(KERN_DEBUG " ind page offset length\n"); + __bio_for_each_segment(bvec, bio, segno, 0) { + printk(KERN_DEBUG " [%d] %p %8.8x %8.8x\n", segno, + bvec->bv_page, bvec->bv_offset, bvec->bv_len); + + if (trace_level >= TraceLvlAll) { + char *bvec_buf; + unsigned long flags; + + bvec_buf = bvec_kmap_irq(bvec, &flags); + + drbd_print_buffer(" ", DBGPRINT_BUFFADDR, 1, + bvec_buf, + faddr, + (bvec->bv_len <= 0x80) + ? bvec->bv_len : 0x80); + + bvec_kunmap_irq(bvec_buf, &flags); + + if (bvec->bv_len > 0x40) + printk(KERN_DEBUG " ....\n"); + + faddr += bvec->bv_len; + } + } + } +} +#endif + +module_init(drbd_init) +module_exit(drbd_cleanup) --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_buildtag.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_buildtag.c @@ -0,0 +1,7 @@ +/* automatically generated. DO NOT EDIT. */ +#include +const char *drbd_buildtag(void) +{ + return "GIT-hash: bbadddd7bad33396ebb8c0c12da9aab594d00c4e drbd/Makefile-2.6" + " build by phil@fat-tyre, 2009-04-01 10:29:21"; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/Kconfig @@ -0,0 +1,37 @@ +# +# DRBD device driver configuration +# + +comment "DRBD disabled because PROC_FS, INET or CONNECTOR not selected" + depends on !PROC_FS || !INET || !CONNECTOR + +config BLK_DEV_DRBD + tristate "DRBD Distributed Replicated Block Device support" + depends on PROC_FS && INET && CONNECTOR + help + + NOTE: In order to authenticate connections you have to select + CRYPTO_HMAC and a hash function as well. + + DRBD is a shared-nothing, synchronously replicated block device. It + is designed to serve as a building block for high availability + clusters and in this context, is a "drop-in" replacement for shared + storage. Simplistically, you could see it as a network RAID 1. + + Each minor device has a role, which can be 'primary' or 'secondary'. + On the node with the primary device the application is supposed to + run and to access the device (/dev/drbdX). Every write is sent to + the local 'lower level block device' and, across the network, to the + node with the device in 'secondary' state. The secondary device + simply writes the data to its lower level block device. + + DRBD can also be used in dual-Primary mode (device writable on both + nodes), which means it can exhibit shared disk semantics in a + shared-nothing cluster. Needless to say, on top of dual-Primary + DRBD utilizing a cluster file system is necessary to maintain for + cache coherency. + + For automatic failover you need a cluster manager (e.g. heartbeat). + See also: http://www.drbd.org/, http://www.linux-ha.org + + If unsure, say N. --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/BOM @@ -0,0 +1,2 @@ +Downloaded from: http://git.drbd.org/linux-2.6-drbd.git +Current Version: 8.3.0 --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/lru_cache.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/lru_cache.h @@ -0,0 +1,116 @@ +/* + lru_cache.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2003-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2003-2008, Philipp Reisner . + Copyright (C) 2003-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#ifndef LRU_CACHE_H +#define LRU_CACHE_H + +#include + +struct lc_element { + struct hlist_node colision; + struct list_head list; /* LRU list or free list */ + unsigned int refcnt; + unsigned int lc_number; +}; + +struct lru_cache { + struct list_head lru; + struct list_head free; + struct list_head in_use; + size_t element_size; + unsigned int nr_elements; + unsigned int new_number; + + unsigned int used; + unsigned long flags; + unsigned long hits, misses, starving, dirty, changed; + struct lc_element *changing_element; /* just for paranoia */ + + void *lc_private; + const char *name; + + struct hlist_head slot[0]; + /* hash colision chains here, then element storage. */ +}; + + +/* flag-bits for lru_cache */ +enum { + __LC_PARANOIA, + __LC_DIRTY, + __LC_STARVING, +}; +#define LC_PARANOIA (1<<__LC_PARANOIA) +#define LC_DIRTY (1<<__LC_DIRTY) +#define LC_STARVING (1<<__LC_STARVING) + +extern struct lru_cache *lc_alloc(const char *name, unsigned int e_count, + size_t e_size, void *private_p); +extern void lc_reset(struct lru_cache *lc); +extern void lc_free(struct lru_cache *lc); +extern void lc_set(struct lru_cache *lc, unsigned int enr, int index); +extern void lc_del(struct lru_cache *lc, struct lc_element *element); + +extern struct lc_element *lc_try_get(struct lru_cache *lc, unsigned int enr); +extern struct lc_element *lc_find(struct lru_cache *lc, unsigned int enr); +extern struct lc_element *lc_get(struct lru_cache *lc, unsigned int enr); +extern unsigned int lc_put(struct lru_cache *lc, struct lc_element *e); +extern void lc_changed(struct lru_cache *lc, struct lc_element *e); + +struct seq_file; +extern size_t lc_printf_stats(struct seq_file *seq, struct lru_cache *lc); + +void lc_dump(struct lru_cache *lc, struct seq_file *seq, char *utext, + void (*detail) (struct seq_file *, struct lc_element *)); + +/* This can be used to stop lc_get from changing the set of active elements. + * Note that the reference counts and order on the lru list may still change. + * returns true if we aquired the lock. + */ +static inline int lc_try_lock(struct lru_cache *lc) +{ + return !test_and_set_bit(__LC_DIRTY, &lc->flags); +} + +static inline void lc_unlock(struct lru_cache *lc) +{ + clear_bit(__LC_DIRTY, &lc->flags); + smp_mb__after_clear_bit(); +} + +static inline int lc_is_used(struct lru_cache *lc, unsigned int enr) +{ + struct lc_element *e = lc_find(lc, enr); + return e && e->refcnt; +} + +#define LC_FREE (-1U) + +#define lc_e_base(lc) ((char *)((lc)->slot + (lc)->nr_elements)) +#define lc_entry(lc, i) ((struct lc_element *) \ + (lc_e_base(lc) + (i)*(lc)->element_size)) +#define lc_index_of(lc, e) (((char *)(e) - lc_e_base(lc))/(lc)->element_size) + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_worker.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_worker.c @@ -0,0 +1,1465 @@ +/* + drbd_worker.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include "drbd_int.h" +#include "drbd_req.h" + +#define SLEEP_TIME (HZ/10) + +STATIC int w_make_ov_request(struct drbd_conf *mdev, struct drbd_work *w, int cancel); + + + +/* defined here: + drbd_md_io_complete + drbd_endio_write_sec + drbd_endio_read_sec + drbd_endio_pri + + * more endio handlers: + atodb_endio in drbd_actlog.c + drbd_bm_async_io_complete in drbd_bitmap.c + + * For all these callbacks, note the follwing: + * The callbacks will be called in irq context by the IDE drivers, + * and in Softirqs/Tasklets/BH context by the SCSI drivers. + * Try to get the locking right :) + * + */ + + +/* About the global_state_lock + Each state transition on an device holds a read lock. In case we have + to evaluate the sync after dependencies, we grab a write lock, because + we need stable states on all devices for that. */ +rwlock_t global_state_lock; + +/* used for synchronous meta data and bitmap IO + * submitted by drbd_md_sync_page_io() + */ +void drbd_md_io_complete(struct bio *bio, int error) +{ + struct drbd_md_io *md_io; + + /* error parameter ignored: + * drbd_md_sync_page_io explicitly tests bio_uptodate(bio); */ + + md_io = (struct drbd_md_io *)bio->bi_private; + + md_io->error = error; + + dump_internal_bio("Md", md_io->mdev, bio, 1); + + complete(&md_io->event); +} + +/* reads on behalf of the partner, + * "submitted" by the receiver + */ +void drbd_endio_read_sec(struct bio *bio, int error) __releases(local) +{ + unsigned long flags = 0; + struct Tl_epoch_entry *e = NULL; + struct drbd_conf *mdev; + int uptodate = bio_flagged(bio, BIO_UPTODATE); + + e = bio->bi_private; + mdev = e->mdev; + + if (!error && !uptodate) { + /* strange behaviour of some lower level drivers... + * fail the request by clearing the uptodate flag, + * but do not return any error?! + * do we want to drbd_WARN() on this? */ + error = -EIO; + } + + D_ASSERT(e->block_id != ID_VACANT); + + dump_internal_bio("Sec", mdev, bio, 1); + + spin_lock_irqsave(&mdev->req_lock, flags); + mdev->read_cnt += e->size >> 9; + list_del(&e->w.list); + if (list_empty(&mdev->read_ee)) + wake_up(&mdev->ee_wait); + spin_unlock_irqrestore(&mdev->req_lock, flags); + + drbd_chk_io_error(mdev, error, FALSE); + drbd_queue_work(&mdev->data.work, &e->w); + dec_local(mdev); + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("Moved EE (READ) to worker sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); +} + +/* writes on behalf of the partner, or resync writes, + * "submitted" by the receiver. + */ +void drbd_endio_write_sec(struct bio *bio, int error) __releases(local) +{ + unsigned long flags = 0; + struct Tl_epoch_entry *e = NULL; + struct drbd_conf *mdev; + sector_t e_sector; + int do_wake; + int is_syncer_req; + int do_al_complete_io; + int uptodate = bio_flagged(bio, BIO_UPTODATE); + + e = bio->bi_private; + mdev = e->mdev; + + if (!error && !uptodate) { + /* strange behaviour of some lower level drivers... + * fail the request by clearing the uptodate flag, + * but do not return any error?! + * do we want to drbd_WARN() on this? */ + error = -EIO; + } + + /* error == -ENOTSUPP would be a better test, + * alas it is not reliable */ + if (error && e->flags & EE_IS_BARRIER) { + drbd_bump_write_ordering(mdev, WO_bdev_flush); + spin_lock_irqsave(&mdev->req_lock, flags); + list_del(&e->w.list); + e->w.cb = w_e_reissue; + __release(local); /* Actually happens in w_e_reissue. */ + spin_unlock_irqrestore(&mdev->req_lock, flags); + drbd_queue_work(&mdev->data.work, &e->w); + return; + } + + D_ASSERT(e->block_id != ID_VACANT); + + dump_internal_bio("Sec", mdev, bio, 1); + + spin_lock_irqsave(&mdev->req_lock, flags); + mdev->writ_cnt += e->size >> 9; + is_syncer_req = is_syncer_block_id(e->block_id); + + /* after we moved e to done_ee, + * we may no longer access it, + * it may be freed/reused already! + * (as soon as we release the req_lock) */ + e_sector = e->sector; + do_al_complete_io = e->flags & EE_CALL_AL_COMPLETE_IO; + + list_del(&e->w.list); /* has been on active_ee or sync_ee */ + list_add_tail(&e->w.list, &mdev->done_ee); + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("Moved EE (WRITE) to done_ee sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + + /* No hlist_del_init(&e->colision) here, we did not send the Ack yet, + * neither did we wake possibly waiting conflicting requests. + * done from "drbd_process_done_ee" within the appropriate w.cb + * (e_end_block/e_end_resync_block) or from _drbd_clear_done_ee */ + + do_wake = is_syncer_req + ? list_empty(&mdev->sync_ee) + : list_empty(&mdev->active_ee); + + if (error) + __drbd_chk_io_error(mdev, FALSE); + spin_unlock_irqrestore(&mdev->req_lock, flags); + + if (is_syncer_req) + drbd_rs_complete_io(mdev, e_sector); + + if (do_wake) + wake_up(&mdev->ee_wait); + + if (do_al_complete_io) + drbd_al_complete_io(mdev, e_sector); + + wake_asender(mdev); + dec_local(mdev); + +} + +/* read, readA or write requests on Primary comming from drbd_make_request + */ +void drbd_endio_pri(struct bio *bio, int error) +{ + unsigned long flags; + struct drbd_request *req = bio->bi_private; + struct drbd_conf *mdev = req->mdev; + enum drbd_req_event what; + int uptodate = bio_flagged(bio, BIO_UPTODATE); + + if (!error && !uptodate) { + /* strange behaviour of some lower level drivers... + * fail the request by clearing the uptodate flag, + * but do not return any error?! + * do we want to drbd_WARN() on this? */ + error = -EIO; + } + + dump_internal_bio("Pri", mdev, bio, 1); + + /* to avoid recursion in _req_mod */ + what = error + ? (bio_data_dir(bio) == WRITE) + ? write_completed_with_error + : read_completed_with_error + : completed_ok; + spin_lock_irqsave(&mdev->req_lock, flags); + _req_mod(req, what, error); + spin_unlock_irqrestore(&mdev->req_lock, flags); +} + +int w_io_error(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct drbd_request *req = (struct drbd_request *)w; + int ok; + + /* NOTE: mdev->bc can be NULL by the time we get here! */ + /* D_ASSERT(mdev->bc->dc.on_io_error != PassOn); */ + + /* the only way this callback is scheduled is from _req_may_be_done, + * when it is done and had a local write error, see comments there */ + drbd_req_free(req); + + ok = drbd_io_error(mdev, FALSE); + if (unlikely(!ok)) + ERR("Sending in w_io_error() failed\n"); + return ok; +} + +int w_read_retry_remote(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct drbd_request *req = (struct drbd_request *)w; + + /* We should not detach for read io-error, + * but try to WRITE the DataReply to the failed location, + * to give the disk the chance to relocate that block */ + drbd_io_error(mdev, FALSE); /* tries to schedule a detach and notifies peer */ + + spin_lock_irq(&mdev->req_lock); + if (cancel || + mdev->state.conn < Connected || + mdev->state.pdsk <= Inconsistent) { + _req_mod(req, send_canceled, 0); + spin_unlock_irq(&mdev->req_lock); + ALERT("WE ARE LOST. Local IO failure, no peer.\n"); + return 1; + } + spin_unlock_irq(&mdev->req_lock); + + return w_send_read_req(mdev, w, 0); +} + +int w_resync_inactive(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + ERR_IF(cancel) return 1; + ERR("resync inactive, but callback triggered??\n"); + return 1; /* Simply ignore this! */ +} + +STATIC void drbd_csum(struct drbd_conf *mdev, struct crypto_hash *tfm, struct bio *bio, void *digest) +{ + struct hash_desc desc; + struct scatterlist sg; + struct bio_vec *bvec; + int i; + + desc.tfm = tfm; + desc.flags = 0; + + sg_init_table(&sg, 1); + crypto_hash_init(&desc); + + __bio_for_each_segment(bvec, bio, i, 0) { + sg_set_page(&sg, bvec->bv_page, bvec->bv_len, bvec->bv_offset); + crypto_hash_update(&desc, &sg, sg.length); + } + crypto_hash_final(&desc, digest); +} + +STATIC int w_e_send_csum(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + int digest_size; + void *digest; + int ok; + + D_ASSERT(e->block_id == DRBD_MAGIC + 0xbeef); + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + return 1; + } + + if (likely(drbd_bio_uptodate(e->private_bio))) { + digest_size = crypto_hash_digestsize(mdev->csums_tfm); + digest = kmalloc(digest_size, GFP_KERNEL); + if (digest) { + drbd_csum(mdev, mdev->csums_tfm, e->private_bio, digest); + + inc_rs_pending(mdev); + ok = drbd_send_drequest_csum(mdev, + e->sector, + e->size, + digest, + digest_size, + CsumRSRequest); + kfree(digest); + } else { + ERR("kmalloc() of digest failed.\n"); + ok = 0; + } + } else { + drbd_io_error(mdev, FALSE); + ok = 1; + } + + drbd_free_ee(mdev, e); + + if (unlikely(!ok)) + ERR("drbd_send_drequest(..., csum) failed\n"); + return ok; +} + +#define GFP_TRY (__GFP_HIGHMEM | __GFP_NOWARN) + +STATIC int read_for_csum(struct drbd_conf *mdev, sector_t sector, int size) +{ + struct Tl_epoch_entry *e; + + if (!inc_local(mdev)) + return 0; + + if (FAULT_ACTIVE(mdev, DRBD_FAULT_AL_EE)) + return 2; + + e = drbd_alloc_ee(mdev, DRBD_MAGIC+0xbeef, sector, size, GFP_TRY); + if (!e) { + dec_local(mdev); + return 2; + } + + spin_lock_irq(&mdev->req_lock); + list_add(&e->w.list, &mdev->read_ee); + spin_unlock_irq(&mdev->req_lock); + + e->private_bio->bi_end_io = drbd_endio_read_sec; + e->private_bio->bi_rw = READ; + e->w.cb = w_e_send_csum; + + mdev->read_cnt += size >> 9; + drbd_generic_make_request(mdev, DRBD_FAULT_RS_RD, e->private_bio); + + return 1; +} + +void resync_timer_fn(unsigned long data) +{ + unsigned long flags; + struct drbd_conf *mdev = (struct drbd_conf *) data; + int queue; + + spin_lock_irqsave(&mdev->req_lock, flags); + + if (likely(!test_and_clear_bit(STOP_SYNC_TIMER, &mdev->flags))) { + queue = 1; + if (mdev->state.conn == VerifyS) + mdev->resync_work.cb = w_make_ov_request; + else + mdev->resync_work.cb = w_make_resync_request; + } else { + queue = 0; + mdev->resync_work.cb = w_resync_inactive; + } + + spin_unlock_irqrestore(&mdev->req_lock, flags); + + /* harmless race: list_empty outside data.work.q_lock */ + if (list_empty(&mdev->resync_work.list) && queue) + drbd_queue_work(&mdev->data.work, &mdev->resync_work); +} + +int w_make_resync_request(struct drbd_conf *mdev, + struct drbd_work *w, int cancel) +{ + unsigned long bit; + sector_t sector; + const sector_t capacity = drbd_get_capacity(mdev->this_bdev); + int max_segment_size = queue_max_segment_size(mdev->rq_queue); + int number, i, size; + int align; + + if (unlikely(cancel)) + return 1; + + if (unlikely(mdev->state.conn < Connected)) { + ERR("Confused in w_make_resync_request()! cstate < Connected"); + return 0; + } + + if (mdev->state.conn != SyncTarget) + ERR("%s in w_make_resync_request\n", + conns_to_name(mdev->state.conn)); + + if (!inc_local(mdev)) { + /* Since we only need to access mdev->rsync a + inc_local_if_state(mdev,Failed) would be sufficient, but + to continue resync with a broken disk makes no sense at + all */ + ERR("Disk broke down during resync!\n"); + mdev->resync_work.cb = w_resync_inactive; + return 1; + } + /* All goto requeses have to happend after this block: inc_local() */ + + number = SLEEP_TIME*mdev->sync_conf.rate / ((BM_BLOCK_SIZE/1024)*HZ); + + if (atomic_read(&mdev->rs_pending_cnt) > number) + goto requeue; + number -= atomic_read(&mdev->rs_pending_cnt); + + for (i = 0; i < number; i++) { +next_sector: + size = BM_BLOCK_SIZE; + bit = drbd_bm_find_next(mdev, mdev->bm_resync_fo); + + if (bit == -1UL) { + mdev->bm_resync_fo = drbd_bm_bits(mdev); + mdev->resync_work.cb = w_resync_inactive; + dec_local(mdev); + return 1; + } + + sector = BM_BIT_TO_SECT(bit); + + if (drbd_try_rs_begin_io(mdev, sector)) { + mdev->bm_resync_fo = bit; + goto requeue; + } + mdev->bm_resync_fo = bit + 1; + + if (unlikely(drbd_bm_test_bit(mdev, bit) == 0)) { + drbd_rs_complete_io(mdev, sector); + goto next_sector; + } + +#if DRBD_MAX_SEGMENT_SIZE > BM_BLOCK_SIZE + /* try to find some adjacent bits. + * we stop if we have already the maximum req size. + * + * Aditionally always align bigger requests, in order to + * be prepared for all stripe sizes of software RAIDs. + * + * we _do_ care about the agreed-uppon q->max_segment_size + * here, as splitting up the requests on the other side is more + * difficult. the consequence is, that on lvm and md and other + * "indirect" devices, this is dead code, since + * q->max_segment_size will be PAGE_SIZE. + */ + align = 1; + for (;;) { + if (size + BM_BLOCK_SIZE > max_segment_size) + break; + + /* Be always aligned */ + if (sector & ((1<<(align+3))-1)) + break; + + /* do not cross extent boundaries */ + if (((bit+1) & BM_BLOCKS_PER_BM_EXT_MASK) == 0) + break; + /* now, is it actually dirty, after all? + * caution, drbd_bm_test_bit is tri-state for some + * obscure reason; ( b == 0 ) would get the out-of-band + * only accidentally right because of the "oddly sized" + * adjustment below */ + if (drbd_bm_test_bit(mdev, bit+1) != 1) + break; + bit++; + size += BM_BLOCK_SIZE; + if ((BM_BLOCK_SIZE << align) <= size) + align++; + i++; + } + /* if we merged some, + * reset the offset to start the next drbd_bm_find_next from */ + if (size > BM_BLOCK_SIZE) + mdev->bm_resync_fo = bit + 1; +#endif + + /* adjust very last sectors, in case we are oddly sized */ + if (sector + (size>>9) > capacity) + size = (capacity-sector)<<9; + if (mdev->agreed_pro_version >= 89 && mdev->csums_tfm) { + switch (read_for_csum(mdev, sector, size)) { + case 0: /* Disk failure*/ + dec_local(mdev); + return 0; + case 2: /* Allocation failed */ + drbd_rs_complete_io(mdev, sector); + mdev->bm_resync_fo = BM_SECT_TO_BIT(sector); + goto requeue; + /* case 1: everything ok */ + } + } else { + inc_rs_pending(mdev); + if (!drbd_send_drequest(mdev, RSDataRequest, + sector, size, ID_SYNCER)) { + ERR("drbd_send_drequest() failed, aborting...\n"); + dec_rs_pending(mdev); + dec_local(mdev); + return 0; + } + } + } + + if (mdev->bm_resync_fo >= drbd_bm_bits(mdev)) { + /* last syncer _request_ was sent, + * but the RSDataReply not yet received. sync will end (and + * next sync group will resume), as soon as we receive the last + * resync data block, and the last bit is cleared. + * until then resync "work" is "inactive" ... + */ + mdev->resync_work.cb = w_resync_inactive; + dec_local(mdev); + return 1; + } + + requeue: + mod_timer(&mdev->resync_timer, jiffies + SLEEP_TIME); + dec_local(mdev); + return 1; +} + +int w_make_ov_request(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + int number, i, size; + sector_t sector; + const sector_t capacity = drbd_get_capacity(mdev->this_bdev); + + if (unlikely(cancel)) + return 1; + + if (unlikely(mdev->state.conn < Connected)) { + ERR("Confused in w_make_ov_request()! cstate < Connected"); + return 0; + } + + number = SLEEP_TIME*mdev->sync_conf.rate / ((BM_BLOCK_SIZE/1024)*HZ); + if (atomic_read(&mdev->rs_pending_cnt) > number) + goto requeue; + + number -= atomic_read(&mdev->rs_pending_cnt); + + sector = mdev->ov_position; + for (i = 0; i < number; i++) { + size = BM_BLOCK_SIZE; + + if (drbd_try_rs_begin_io(mdev, sector)) { + mdev->ov_position = sector; + goto requeue; + } + + if (sector + (size>>9) > capacity) + size = (capacity-sector)<<9; + + inc_rs_pending(mdev); + if (!drbd_send_ov_request(mdev, sector, size)) { + dec_rs_pending(mdev); + return 0; + } + sector += BM_SECT_PER_BIT; + if (sector >= capacity) { + mdev->resync_work.cb = w_resync_inactive; + + return 1; + } + } + mdev->ov_position = sector; + + requeue: + mod_timer(&mdev->resync_timer, jiffies + SLEEP_TIME); + return 1; +} + + +int w_ov_finished(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + kfree(w); + ov_oos_print(mdev); + drbd_resync_finished(mdev); + + return 1; +} + +STATIC int w_resync_finished(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + kfree(w); + + drbd_resync_finished(mdev); + + return 1; +} + +int drbd_resync_finished(struct drbd_conf *mdev) +{ + unsigned long db, dt, dbdt; + unsigned long n_oos; + union drbd_state_t os, ns; + struct drbd_work *w; + char *khelper_cmd = NULL; + + /* Remove all elements from the resync LRU. Since future actions + * might set bits in the (main) bitmap, then the entries in the + * resync LRU would be wrong. */ + if (drbd_rs_del_all(mdev)) { + /* In case this is not possible now, most probabely because + * there are RSDataReply Packets lingering on the worker's + * queue (or even the read operations for those packets + * is not finished by now). Retry in 100ms. */ + + drbd_kick_lo(mdev); + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + w = kmalloc(sizeof(struct drbd_work), GFP_ATOMIC); + if (w) { + w->cb = w_resync_finished; + drbd_queue_work(&mdev->data.work, w); + return 1; + } + ERR("Warn failed to drbd_rs_del_all() and to kmalloc(w).\n"); + } + + dt = (jiffies - mdev->rs_start - mdev->rs_paused) / HZ; + if (dt <= 0) + dt = 1; + db = mdev->rs_total; + dbdt = Bit2KB(db/dt); + mdev->rs_paused /= HZ; + + if (!inc_local(mdev)) + goto out; + + spin_lock_irq(&mdev->req_lock); + os = mdev->state; + + /* This protects us against multiple calls (that can happen in the presence + of application IO), and against connectivity loss just before we arrive here. */ + if (os.conn <= Connected) + goto out_unlock; + + ns = os; + ns.conn = Connected; + + INFO("%s done (total %lu sec; paused %lu sec; %lu K/sec)\n", + (os.conn == VerifyS || os.conn == VerifyT) ? + "Online verify " : "Resync", + dt + mdev->rs_paused, mdev->rs_paused, dbdt); + + n_oos = drbd_bm_total_weight(mdev); + + if (os.conn == VerifyS || os.conn == VerifyT) { + if (n_oos) { + ALERT("Online verify found %lu %dk block out of sync!\n", + n_oos, Bit2KB(1)); + khelper_cmd = "out-of-sync"; + } + } else { + D_ASSERT((n_oos - mdev->rs_failed) == 0); + + if (os.conn == SyncTarget || os.conn == PausedSyncT) + khelper_cmd = "after-resync-target"; + + if (mdev->csums_tfm && mdev->rs_total) { + const unsigned long s = mdev->rs_same_csum; + const unsigned long t = mdev->rs_total; + const int ratio = + (t == 0) ? 0 : + (t < 100000) ? ((s*100)/t) : (s/(t/100)); + INFO("%u %% had equal check sums, eliminated: %luK; " + "transferred %luK total %luK\n", + ratio, + Bit2KB(mdev->rs_same_csum), + Bit2KB(mdev->rs_total - mdev->rs_same_csum), + Bit2KB(mdev->rs_total)); + } + } + + if (mdev->rs_failed) { + INFO(" %lu failed blocks\n", mdev->rs_failed); + + if (os.conn == SyncTarget || os.conn == PausedSyncT) { + ns.disk = Inconsistent; + ns.pdsk = UpToDate; + } else { + ns.disk = UpToDate; + ns.pdsk = Inconsistent; + } + } else { + ns.disk = UpToDate; + ns.pdsk = UpToDate; + + if (os.conn == SyncTarget || os.conn == PausedSyncT) { + if (mdev->p_uuid) { + int i; + for (i = Bitmap ; i <= History_end ; i++) + _drbd_uuid_set(mdev, i, mdev->p_uuid[i]); + drbd_uuid_set(mdev, Bitmap, mdev->bc->md.uuid[Current]); + _drbd_uuid_set(mdev, Current, mdev->p_uuid[Current]); + } else { + ERR("mdev->p_uuid is NULL! BUG\n"); + } + } + + drbd_uuid_set_bm(mdev, 0UL); + + if (mdev->p_uuid) { + /* Now the two UUID sets are equal, update what we + * know of the peer. */ + int i; + for (i = Current ; i <= History_end ; i++) + mdev->p_uuid[i] = mdev->bc->md.uuid[i]; + } + } + + _drbd_set_state(mdev, ns, ChgStateVerbose, NULL); +out_unlock: + spin_unlock_irq(&mdev->req_lock); + dec_local(mdev); +out: + mdev->rs_total = 0; + mdev->rs_failed = 0; + mdev->rs_paused = 0; + + if (test_and_clear_bit(WRITE_BM_AFTER_RESYNC, &mdev->flags)) { + drbd_WARN("Writing the whole bitmap, due to failed kmalloc\n"); + drbd_queue_bitmap_io(mdev, &drbd_bm_write, NULL, "write from resync_finished"); + } + + drbd_bm_recount_bits(mdev); + + if (khelper_cmd) + drbd_khelper(mdev, khelper_cmd); + + return 1; +} + +/** + * w_e_end_data_req: Send the answer (DataReply) in response to a DataRequest. + */ +int w_e_end_data_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + int ok; + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + dec_unacked(mdev); + return 1; + } + + if (likely(drbd_bio_uptodate(e->private_bio))) { + ok = drbd_send_block(mdev, DataReply, e); + } else { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Sending NegDReply. sector=%llus.\n", + (unsigned long long)e->sector); + + ok = drbd_send_ack(mdev, NegDReply, e); + + drbd_io_error(mdev, FALSE); + } + + dec_unacked(mdev); + + spin_lock_irq(&mdev->req_lock); + if (drbd_bio_has_active_page(e->private_bio)) { + /* This might happen if sendpage() has not finished */ + list_add_tail(&e->w.list, &mdev->net_ee); + } else { + drbd_free_ee(mdev, e); + } + spin_unlock_irq(&mdev->req_lock); + + if (unlikely(!ok)) + ERR("drbd_send_block() failed\n"); + return ok; +} + +/** + * w_e_end_rsdata_req: Send the answer (RSDataReply) to a RSDataRequest. + */ +int w_e_end_rsdata_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + int ok; + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + dec_unacked(mdev); + return 1; + } + + if (inc_local_if_state(mdev, Failed)) { + drbd_rs_complete_io(mdev, e->sector); + dec_local(mdev); + } + + if (likely(drbd_bio_uptodate(e->private_bio))) { + if (likely(mdev->state.pdsk >= Inconsistent)) { + inc_rs_pending(mdev); + ok = drbd_send_block(mdev, RSDataReply, e); + } else { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Not sending RSDataReply, " + "partner DISKLESS!\n"); + ok = 1; + } + } else { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Sending NegRSDReply. sector %llus.\n", + (unsigned long long)e->sector); + + ok = drbd_send_ack(mdev, NegRSDReply, e); + + drbd_io_error(mdev, FALSE); + + /* update resync data with failure */ + drbd_rs_failed_io(mdev, e->sector, e->size); + } + + dec_unacked(mdev); + + spin_lock_irq(&mdev->req_lock); + if (drbd_bio_has_active_page(e->private_bio)) { + /* This might happen if sendpage() has not finished */ + list_add_tail(&e->w.list, &mdev->net_ee); + } else { + drbd_free_ee(mdev, e); + } + spin_unlock_irq(&mdev->req_lock); + + if (unlikely(!ok)) + ERR("drbd_send_block() failed\n"); + return ok; +} + +int w_e_end_csum_rs_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + struct digest_info *di; + int digest_size; + void *digest = NULL; + int ok, eq = 0; + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + dec_unacked(mdev); + return 1; + } + + drbd_rs_complete_io(mdev, e->sector); + + di = (struct digest_info *)(unsigned long)e->block_id; + + if (likely(drbd_bio_uptodate(e->private_bio))) { + /* quick hack to try to avoid a race against reconfiguration. + * a real fix would be much more involved, + * introducing more locking mechanisms */ + if (mdev->csums_tfm) { + digest_size = crypto_hash_digestsize(mdev->csums_tfm); + D_ASSERT(digest_size == di->digest_size); + digest = kmalloc(digest_size, GFP_KERNEL); + } + if (digest) { + drbd_csum(mdev, mdev->csums_tfm, e->private_bio, digest); + eq = !memcmp(digest, di->digest, digest_size); + kfree(digest); + } + + if (eq) { + drbd_set_in_sync(mdev, e->sector, e->size); + mdev->rs_same_csum++; + ok = drbd_send_ack(mdev, RSIsInSync, e); + } else { + inc_rs_pending(mdev); + e->block_id = ID_SYNCER; + ok = drbd_send_block(mdev, RSDataReply, e); + } + } else { + ok = drbd_send_ack(mdev, NegRSDReply, e); + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Sending NegDReply. I guess it gets messy.\n"); + drbd_io_error(mdev, FALSE); + } + + dec_unacked(mdev); + + kfree(di); + + spin_lock_irq(&mdev->req_lock); + if (drbd_bio_has_active_page(e->private_bio)) { + /* This might happen if sendpage() has not finished */ + list_add_tail(&e->w.list, &mdev->net_ee); + } else { + drbd_free_ee(mdev, e); + } + spin_unlock_irq(&mdev->req_lock); + + if (unlikely(!ok)) + ERR("drbd_send_block/ack() failed\n"); + return ok; +} + +int w_e_end_ov_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + int digest_size; + void *digest; + int ok = 1; + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + dec_unacked(mdev); + return 1; + } + + if (likely(drbd_bio_uptodate(e->private_bio))) { + digest_size = crypto_hash_digestsize(mdev->verify_tfm); + digest = kmalloc(digest_size, GFP_KERNEL); + if (digest) { + drbd_csum(mdev, mdev->verify_tfm, e->private_bio, digest); + ok = drbd_send_drequest_csum(mdev, e->sector, e->size, + digest, digest_size, OVReply); + if (ok) + inc_rs_pending(mdev); + kfree(digest); + } + } + + dec_unacked(mdev); + + spin_lock_irq(&mdev->req_lock); + drbd_free_ee(mdev, e); + spin_unlock_irq(&mdev->req_lock); + + return ok; +} + +void drbd_ov_oos_found(struct drbd_conf *mdev, sector_t sector, int size) +{ + if (mdev->ov_last_oos_start + mdev->ov_last_oos_size == sector) { + mdev->ov_last_oos_size += size>>9; + } else { + mdev->ov_last_oos_start = sector; + mdev->ov_last_oos_size = size>>9; + } + drbd_set_out_of_sync(mdev, sector, size); + set_bit(WRITE_BM_AFTER_RESYNC, &mdev->flags); +} + +int w_e_end_ov_reply(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + struct digest_info *di; + int digest_size; + void *digest; + int ok, eq = 0; + + if (unlikely(cancel)) { + drbd_free_ee(mdev, e); + dec_unacked(mdev); + return 1; + } + + /* after "cancel", because after drbd_disconnect/drbd_rs_cancel_all + * the resync lru has been cleaned up already */ + drbd_rs_complete_io(mdev, e->sector); + + di = (struct digest_info *)(unsigned long)e->block_id; + + if (likely(drbd_bio_uptodate(e->private_bio))) { + digest_size = crypto_hash_digestsize(mdev->verify_tfm); + digest = kmalloc(digest_size, GFP_KERNEL); + if (digest) { + drbd_csum(mdev, mdev->verify_tfm, e->private_bio, digest); + + D_ASSERT(digest_size == di->digest_size); + eq = !memcmp(digest, di->digest, digest_size); + kfree(digest); + } + } else { + ok = drbd_send_ack(mdev, NegRSDReply, e); + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Sending NegDReply. I guess it gets messy.\n"); + drbd_io_error(mdev, FALSE); + } + + dec_unacked(mdev); + + kfree(di); + + if (!eq) + drbd_ov_oos_found(mdev, e->sector, e->size); + else + ov_oos_print(mdev); + + ok = drbd_send_ack_ex(mdev, OVResult, e->sector, e->size, + eq ? ID_IN_SYNC : ID_OUT_OF_SYNC); + + spin_lock_irq(&mdev->req_lock); + drbd_free_ee(mdev, e); + spin_unlock_irq(&mdev->req_lock); + + if (--mdev->ov_left == 0) { + ov_oos_print(mdev); + drbd_resync_finished(mdev); + } + + return ok; +} + +int w_prev_work_done(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + clear_bit(WORK_PENDING, &mdev->flags); + wake_up(&mdev->misc_wait); + return 1; +} + +int w_send_barrier(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct drbd_barrier *b = (struct drbd_barrier *)w; + struct Drbd_Barrier_Packet *p = &mdev->data.sbuf.Barrier; + int ok = 1; + + /* really avoid racing with tl_clear. w.cb may have been referenced + * just before it was reassigned and requeued, so double check that. + * actually, this race was harmless, since we only try to send the + * barrier packet here, and otherwise do nothing with the object. + * but compare with the head of w_clear_epoch */ + spin_lock_irq(&mdev->req_lock); + if (w->cb != w_send_barrier || mdev->state.conn < Connected) + cancel = 1; + spin_unlock_irq(&mdev->req_lock); + if (cancel) + return 1; + + if (!drbd_get_data_sock(mdev)) + return 0; + p->barrier = b->br_number; + /* inc_ap_pending was done where this was queued. + * dec_ap_pending will be done in got_BarrierAck + * or (on connection loss) in w_clear_epoch. */ + ok = _drbd_send_cmd(mdev, mdev->data.socket, Barrier, + (struct Drbd_Header *)p, sizeof(*p), 0); + drbd_put_data_sock(mdev); + + return ok; +} + +int w_send_write_hint(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + if (cancel) + return 1; + return drbd_send_short_cmd(mdev, UnplugRemote); +} + +/** + * w_send_dblock: Send a mirrored write request. + */ +int w_send_dblock(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct drbd_request *req = (struct drbd_request *)w; + int ok; + + if (unlikely(cancel)) { + req_mod(req, send_canceled, 0); + return 1; + } + + ok = drbd_send_dblock(mdev, req); + req_mod(req, ok ? handed_over_to_network : send_failed, 0); + + return ok; +} + +/** + * w_send_read_req: Send a read requests. + */ +int w_send_read_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct drbd_request *req = (struct drbd_request *)w; + int ok; + + if (unlikely(cancel)) { + req_mod(req, send_canceled, 0); + return 1; + } + + ok = drbd_send_drequest(mdev, DataRequest, req->sector, req->size, + (unsigned long)req); + + if (!ok) { + /* ?? we set Timeout or BrokenPipe in drbd_send(); + * so this is probably redundant */ + if (mdev->state.conn >= Connected) + drbd_force_state(mdev, NS(conn, NetworkFailure)); + } + req_mod(req, ok ? handed_over_to_network : send_failed, 0); + + return ok; +} + +STATIC int _drbd_may_sync_now(struct drbd_conf *mdev) +{ + struct drbd_conf *odev = mdev; + + while (1) { + if (odev->sync_conf.after == -1) + return 1; + odev = minor_to_mdev(odev->sync_conf.after); + ERR_IF(!odev) return 1; + if ((odev->state.conn >= SyncSource && + odev->state.conn <= PausedSyncT) || + odev->state.aftr_isp || odev->state.peer_isp || + odev->state.user_isp) + return 0; + } +} + +/** + * _drbd_pause_after: + * Finds all devices that may not resync now, and causes them to + * pause their resynchronisation. + * Called from process context only (admin command and after_state_ch). + */ +STATIC int _drbd_pause_after(struct drbd_conf *mdev) +{ + struct drbd_conf *odev; + int i, rv = 0; + + for (i = 0; i < minor_count; i++) { + odev = minor_to_mdev(i); + if (!odev) + continue; + if (odev->state.conn == StandAlone && odev->state.disk == Diskless) + continue; + if (!_drbd_may_sync_now(odev)) + rv |= (__drbd_set_state(_NS(odev, aftr_isp, 1), ChgStateHard, NULL) + != SS_NothingToDo); + } + + return rv; +} + +/** + * _drbd_resume_next: + * Finds all devices that can resume resynchronisation + * process, and causes them to resume. + * Called from process context only (admin command and worker). + */ +STATIC int _drbd_resume_next(struct drbd_conf *mdev) +{ + struct drbd_conf *odev; + int i, rv = 0; + + for (i = 0; i < minor_count; i++) { + odev = minor_to_mdev(i); + if (!odev) + continue; + if (odev->state.conn == StandAlone && odev->state.disk == Diskless) + continue; + if (odev->state.aftr_isp) { + if (_drbd_may_sync_now(odev)) + rv |= (__drbd_set_state(_NS(odev, aftr_isp, 0), + ChgStateHard, NULL) + != SS_NothingToDo) ; + } + } + return rv; +} + +void resume_next_sg(struct drbd_conf *mdev) +{ + write_lock_irq(&global_state_lock); + _drbd_resume_next(mdev); + write_unlock_irq(&global_state_lock); +} + +void suspend_other_sg(struct drbd_conf *mdev) +{ + write_lock_irq(&global_state_lock); + _drbd_pause_after(mdev); + write_unlock_irq(&global_state_lock); +} + +void drbd_alter_sa(struct drbd_conf *mdev, int na) +{ + int changes; + + write_lock_irq(&global_state_lock); + mdev->sync_conf.after = na; + + do { + changes = _drbd_pause_after(mdev); + changes |= _drbd_resume_next(mdev); + } while (changes); + + write_unlock_irq(&global_state_lock); +} + +/** + * drbd_start_resync: + * @side: Either SyncSource or SyncTarget + * Start the resync process. Called from process context only, + * either admin command or drbd_receiver. + * Note, this function might bring you directly into one of the + * PausedSync* states. + */ +void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side) +{ + union drbd_state_t ns; + int r; + + MTRACE(TraceTypeResync, TraceLvlSummary, + INFO("Resync starting: side=%s\n", + side == SyncTarget ? "SyncTarget" : "SyncSource"); + ); + + drbd_bm_recount_bits(mdev); + + /* In case a previous resync run was aborted by an IO error... */ + drbd_rs_cancel_all(mdev); + + if (side == SyncTarget) { + /* Since application IO was locked out during WFBitMapT and + WFSyncUUID we are still unmodified. Before going to SyncTarget + we check that we might make the data inconsistent. */ + r = drbd_khelper(mdev, "before-resync-target"); + r = (r >> 8) & 0xff; + if (r > 0) { + INFO("before-resync-target handler returned %d, " + "dropping connection.\n", r); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return; + } + } + + drbd_state_lock(mdev); + + if (!inc_local_if_state(mdev, Negotiating)) { + drbd_state_unlock(mdev); + return; + } + + if (side == SyncTarget) { + mdev->bm_resync_fo = 0; + } else /* side == SyncSource */ { + u64 uuid; + + get_random_bytes(&uuid, sizeof(u64)); + drbd_uuid_set(mdev, Bitmap, uuid); + drbd_send_sync_uuid(mdev, uuid); + + D_ASSERT(mdev->state.disk == UpToDate); + } + + write_lock_irq(&global_state_lock); + ns = mdev->state; + + ns.aftr_isp = !_drbd_may_sync_now(mdev); + + ns.conn = side; + + if (side == SyncTarget) + ns.disk = Inconsistent; + else /* side == SyncSource */ + ns.pdsk = Inconsistent; + + r = __drbd_set_state(mdev, ns, ChgStateVerbose, NULL); + ns = mdev->state; + + if (ns.conn < Connected) + r = SS_UnknownError; + + if (r == SS_Success) { + mdev->rs_total = + mdev->rs_mark_left = drbd_bm_total_weight(mdev); + mdev->rs_failed = 0; + mdev->rs_paused = 0; + mdev->rs_start = + mdev->rs_mark_time = jiffies; + mdev->rs_same_csum = 0; + _drbd_pause_after(mdev); + } + write_unlock_irq(&global_state_lock); + drbd_state_unlock(mdev); + dec_local(mdev); + + if (r == SS_Success) { + INFO("Began resync as %s (will sync %lu KB [%lu bits set]).\n", + conns_to_name(ns.conn), + (unsigned long) mdev->rs_total << (BM_BLOCK_SIZE_B-10), + (unsigned long) mdev->rs_total); + + if (mdev->rs_total == 0) { + drbd_resync_finished(mdev); + return; + } + + if (ns.conn == SyncTarget) { + D_ASSERT(!test_bit(STOP_SYNC_TIMER, &mdev->flags)); + mod_timer(&mdev->resync_timer, jiffies); + } + + drbd_md_sync(mdev); + } +} + +int drbd_worker(struct Drbd_thread *thi) +{ + struct drbd_conf *mdev = thi->mdev; + struct drbd_work *w = NULL; + LIST_HEAD(work_list); + int intr = 0, i; + + sprintf(current->comm, "drbd%d_worker", mdev_to_minor(mdev)); + + while (get_t_state(thi) == Running) { + drbd_thread_current_set_cpu(mdev); + + if (down_trylock(&mdev->data.work.s)) { + mutex_lock(&mdev->data.mutex); + if (mdev->data.socket && !mdev->net_conf->no_cork) + drbd_tcp_uncork(mdev->data.socket); + mutex_unlock(&mdev->data.mutex); + + intr = down_interruptible(&mdev->data.work.s); + + mutex_lock(&mdev->data.mutex); + if (mdev->data.socket && !mdev->net_conf->no_cork) + drbd_tcp_cork(mdev->data.socket); + mutex_unlock(&mdev->data.mutex); + } + + if (intr) { + D_ASSERT(intr == -EINTR); + flush_signals(current); + ERR_IF (get_t_state(thi) == Running) + continue; + break; + } + + if (get_t_state(thi) != Running) + break; + /* With this break, we have done a down() but not consumed + the entry from the list. The cleanup code takes care of + this... */ + + w = NULL; + spin_lock_irq(&mdev->data.work.q_lock); + ERR_IF(list_empty(&mdev->data.work.q)) { + /* something terribly wrong in our logic. + * we were able to down() the semaphore, + * but the list is empty... doh. + * + * what is the best thing to do now? + * try again from scratch, restarting the receiver, + * asender, whatnot? could break even more ugly, + * e.g. when we are primary, but no good local data. + * + * I'll try to get away just starting over this loop. + */ + spin_unlock_irq(&mdev->data.work.q_lock); + continue; + } + w = list_entry(mdev->data.work.q.next, struct drbd_work, list); + list_del_init(&w->list); + spin_unlock_irq(&mdev->data.work.q_lock); + + if (!w->cb(mdev, w, mdev->state.conn < Connected)) { + /* drbd_WARN("worker: a callback failed! \n"); */ + if (mdev->state.conn >= Connected) + drbd_force_state(mdev, + NS(conn, NetworkFailure)); + } + } + + spin_lock_irq(&mdev->data.work.q_lock); + i = 0; + while (!list_empty(&mdev->data.work.q)) { + list_splice_init(&mdev->data.work.q, &work_list); + spin_unlock_irq(&mdev->data.work.q_lock); + + while (!list_empty(&work_list)) { + w = list_entry(work_list.next, struct drbd_work, list); + list_del_init(&w->list); + w->cb(mdev, w, 1); + i++; /* dead debugging code */ + } + + spin_lock_irq(&mdev->data.work.q_lock); + } + sema_init(&mdev->data.work.s, 0); + /* DANGEROUS race: if someone did queue his work within the spinlock, + * but up() ed outside the spinlock, we could get an up() on the + * semaphore without corresponding list entry. + * So don't do that. + */ + spin_unlock_irq(&mdev->data.work.q_lock); + + D_ASSERT(mdev->state.disk == Diskless && mdev->state.conn == StandAlone); + /* _drbd_set_state only uses stop_nowait. + * wait here for the Exiting receiver. */ + drbd_thread_stop(&mdev->receiver); + drbd_mdev_cleanup(mdev); + + INFO("worker terminated\n"); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_wrappers.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_wrappers.h @@ -0,0 +1,116 @@ +#include +#include + + +/* see get_sb_bdev and bd_claim */ +extern char *drbd_sec_holder; + +static inline sector_t drbd_get_hardsect(struct block_device *bdev) +{ + return bdev_logical_block_size(bdev); +} + +/* sets the number of 512 byte sectors of our virtual device */ +static inline void drbd_set_my_capacity(struct drbd_conf *mdev, + sector_t size) +{ + /* set_capacity(mdev->this_bdev->bd_disk, size); */ + set_capacity(mdev->vdisk, size); + mdev->this_bdev->bd_inode->i_size = (loff_t)size << 9; +} + +#define drbd_bio_uptodate(bio) bio_flagged(bio, BIO_UPTODATE) + +static inline int drbd_bio_has_active_page(struct bio *bio) +{ + struct bio_vec *bvec; + int i; + + __bio_for_each_segment(bvec, bio, i, 0) { + if (page_count(bvec->bv_page) > 1) + return 1; + } + + return 0; +} + +/* bi_end_io handlers */ +extern void drbd_md_io_complete(struct bio *bio, int error); +extern void drbd_endio_read_sec(struct bio *bio, int error); +extern void drbd_endio_write_sec(struct bio *bio, int error); +extern void drbd_endio_pri(struct bio *bio, int error); + +/* how to get to the kobj of a gendisk. + * see also upstream commits + * edfaa7c36574f1bf09c65ad602412db9da5f96bf + * ed9e1982347b36573cd622ee5f4e2a7ccd79b3fd + * 548b10eb2959c96cef6fc29fc96e0931eeb53bc5 + */ +#ifndef dev_to_disk +# define disk_to_kobj(disk) (&(disk)->kobj) +#else +# ifndef disk_to_dev +# define disk_to_dev(disk) (&(disk)->dev) +# endif +# define disk_to_kobj(disk) (&disk_to_dev(disk)->kobj) +#endif +static inline void drbd_kobject_uevent(struct drbd_conf *mdev) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15) + kobject_uevent(disk_to_kobj(mdev->vdisk), KOBJ_CHANGE, NULL); +#else + kobject_uevent(disk_to_kobj(mdev->vdisk), KOBJ_CHANGE); + /* rhel4 / sles9 and older don't have this at all, + * which means user space (udev) won't get events about possible changes of + * corresponding resource + disk names after the initial drbd minor creation. + */ +#endif +#endif +} + + +/* + * used to submit our private bio + */ +static inline void drbd_generic_make_request(struct drbd_conf *mdev, + int fault_type, struct bio *bio) +{ + __release(local); + if (!bio->bi_bdev) { + printk(KERN_ERR "drbd%d: drbd_generic_make_request: " + "bio->bi_bdev == NULL\n", + mdev_to_minor(mdev)); + dump_stack(); + bio_endio(bio, -ENODEV); + return; + } + + if (FAULT_ACTIVE(mdev, fault_type)) + bio_endio(bio, -EIO); + else + generic_make_request(bio); +} + +static inline void drbd_plug_device(struct drbd_conf *mdev) +{ + struct request_queue *q; + q = bdev_get_queue(mdev->this_bdev); + + spin_lock_irq(q->queue_lock); + +/* XXX the check on !blk_queue_plugged is redundant, + * implicitly checked in blk_plug_device */ + + if (!blk_queue_plugged(q)) { + blk_plug_device(q); + del_timer(&q->unplug_timer); + /* unplugging should not happen automatically... */ + } + spin_unlock_irq(q->queue_lock); +} + +#ifndef __CHECKER__ +# undef __cond_lock +# define __cond_lock(x,c) (c) +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_int.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_int.h @@ -0,0 +1,2321 @@ +/* + drbd_int.h + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + +*/ + +#ifndef _DRBD_INT_H +#define _DRBD_INT_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lru_cache.h" + +#ifdef __CHECKER__ +# define __protected_by(x) __attribute__((require_context(x,1,999,"rdwr"))) +# define __protected_read_by(x) __attribute__((require_context(x,1,999,"read"))) +# define __protected_write_by(x) __attribute__((require_context(x,1,999,"write"))) +# define __must_hold(x) __attribute__((context(x,1,1), require_context(x,1,999,"call"))) +#else +# define __protected_by(x) +# define __protected_read_by(x) +# define __protected_write_by(x) +# define __must_hold(x) +#endif + +#define __no_warn(lock, stmt) do { __acquire(lock); stmt; __release(lock); } while (0) + +/* module parameter, defined in drbd_main.c */ +extern unsigned int minor_count; +extern int allow_oos; +extern unsigned int cn_idx; + +#ifdef DRBD_ENABLE_FAULTS +extern int enable_faults; +extern int fault_rate; +extern int fault_devs; +#endif + +extern char usermode_helper[]; + + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +/* I don't remember why XCPU ... + * This is used to wake the asender, + * and to interrupt sending the sending task + * on disconnect. + */ +#define DRBD_SIG SIGXCPU + +/* This is used to stop/restart our threads. + * Cannot use SIGTERM nor SIGKILL, since these + * are sent out by init on runlevel changes + * I choose SIGHUP for now. + */ +#define DRBD_SIGKILL SIGHUP + +/* All EEs on the free list should have ID_VACANT (== 0) + * freshly allocated EEs get !ID_VACANT (== 1) + * so if it says "cannot dereference null pointer at adress 0x00000001", + * it is most likely one of these :( */ + +#define ID_IN_SYNC (4711ULL) +#define ID_OUT_OF_SYNC (4712ULL) + +#define ID_SYNCER (-1ULL) +#define ID_VACANT 0 +#define is_syncer_block_id(id) ((id) == ID_SYNCER) + +struct drbd_conf; + +#ifdef DBG_ALL_SYMBOLS +# define STATIC +#else +# define STATIC static +#endif + +/* + * Some Message Macros + *************************/ + +#define DUMPP(A) ERR(#A " = %p in %s:%d\n", (A), __FILE__, __LINE__); +#define DUMPLU(A) ERR(#A " = %lu in %s:%d\n", (unsigned long)(A), __FILE__, __LINE__); +#define DUMPLLU(A) ERR(#A " = %llu in %s:%d\n", (unsigned long long)(A), __FILE__, __LINE__); +#define DUMPLX(A) ERR(#A " = %lx in %s:%d\n", (A), __FILE__, __LINE__); +#define DUMPI(A) ERR(#A " = %d in %s:%d\n", (int)(A), __FILE__, __LINE__); + + +#define PRINTK(level, fmt, args...) \ + printk(level "drbd%d: " fmt, \ + mdev->minor , ##args) + +#define ALERT(fmt, args...) PRINTK(KERN_ALERT, fmt , ##args) +#define ERR(fmt, args...) PRINTK(KERN_ERR, fmt , ##args) +/* nowadays, WARN() is defined as BUG() without crash in bug.h */ +#define drbd_WARN(fmt, args...) PRINTK(KERN_WARNING, fmt , ##args) +#define INFO(fmt, args...) PRINTK(KERN_INFO, fmt , ##args) +#define DBG(fmt, args...) PRINTK(KERN_DEBUG, fmt , ##args) + +#define D_ASSERT(exp) if (!(exp)) \ + ERR("ASSERT( " #exp " ) in %s:%d\n", __FILE__, __LINE__) + +#define ERR_IF(exp) if (({ \ + int _b = (exp) != 0; \ + if (_b) ERR("%s: (%s) in %s:%d\n", \ + __func__, #exp, __FILE__, __LINE__); \ + _b; \ + })) + +/* Defines to control fault insertion */ +enum { + DRBD_FAULT_MD_WR = 0, /* meta data write */ + DRBD_FAULT_MD_RD, /* read */ + DRBD_FAULT_RS_WR, /* resync */ + DRBD_FAULT_RS_RD, + DRBD_FAULT_DT_WR, /* data */ + DRBD_FAULT_DT_RD, + DRBD_FAULT_DT_RA, /* data read ahead */ + DRBD_FAULT_BM_ALLOC, /* bitmap allocation */ + DRBD_FAULT_AL_EE, /* alloc ee */ + + DRBD_FAULT_MAX, +}; + +#ifdef DRBD_ENABLE_FAULTS +extern unsigned int +_drbd_insert_fault(struct drbd_conf *mdev, unsigned int type); +static inline int +drbd_insert_fault(struct drbd_conf *mdev, unsigned int type) { + return fault_rate && + (enable_faults & (1< MayIgnore) ... */ + MAX_OPT_CMD = 0x101, + + /* special command ids for handshake */ + + HandShakeM = 0xfff1, /* First Packet on the MetaSock */ + HandShakeS = 0xfff2, /* First Packet on the Socket */ + + HandShake = 0xfffe /* FIXED for the next century! */ +}; + +static inline const char *cmdname(enum Drbd_Packet_Cmd cmd) +{ + /* THINK may need to become several global tables + * when we want to support more than + * one PRO_VERSION */ + static const char *cmdnames[] = { + [Data] = "Data", + [DataReply] = "DataReply", + [RSDataReply] = "RSDataReply", + [Barrier] = "Barrier", + [ReportBitMap] = "ReportBitMap", + [BecomeSyncTarget] = "BecomeSyncTarget", + [BecomeSyncSource] = "BecomeSyncSource", + [UnplugRemote] = "UnplugRemote", + [DataRequest] = "DataRequest", + [RSDataRequest] = "RSDataRequest", + [SyncParam] = "SyncParam", + [SyncParam89] = "SyncParam89", + [ReportProtocol] = "ReportProtocol", + [ReportUUIDs] = "ReportUUIDs", + [ReportSizes] = "ReportSizes", + [ReportState] = "ReportState", + [ReportSyncUUID] = "ReportSyncUUID", + [AuthChallenge] = "AuthChallenge", + [AuthResponse] = "AuthResponse", + [Ping] = "Ping", + [PingAck] = "PingAck", + [RecvAck] = "RecvAck", + [WriteAck] = "WriteAck", + [RSWriteAck] = "RSWriteAck", + [DiscardAck] = "DiscardAck", + [NegAck] = "NegAck", + [NegDReply] = "NegDReply", + [NegRSDReply] = "NegRSDReply", + [BarrierAck] = "BarrierAck", + [StateChgRequest] = "StateChgRequest", + [StateChgReply] = "StateChgReply", + [OVRequest] = "OVRequest", + [OVReply] = "OVReply", + [OVResult] = "OVResult", + [CsumRSRequest] = "CsumRSRequest", + [RSIsInSync] = "RSIsInSync", + [ReportCBitMap] = "ReportCBitMap", + [MAX_CMD] = NULL, + }; + + if (cmd == HandShakeM) + return "HandShakeM"; + if (cmd == HandShakeS) + return "HandShakeS"; + if (cmd == HandShake) + return "HandShake"; + if (cmd >= MAX_CMD) + return "Unknown"; + return cmdnames[cmd]; +} + +/* for sending/receiving the bitmap, + * possibly in some encoding scheme */ +struct bm_xfer_ctx { + /* "const" + * stores total bits and long words + * of the bitmap, so we don't need to + * call the accessor functions over and again. */ + unsigned long bm_bits; + unsigned long bm_words; + /* during xfer, current position within the bitmap */ + unsigned long bit_offset; + unsigned long word_offset; + + /* statistics; index: (h->command == ReportBitMap) */ + unsigned packets[2]; + unsigned bytes[2]; +}; + +extern void INFO_bm_xfer_stats(struct drbd_conf *mdev, + const char *direction, struct bm_xfer_ctx *c); + +static inline void bm_xfer_ctx_bit_to_word_offset(struct bm_xfer_ctx *c) +{ + /* word_offset counts "native long words" (32 or 64 bit), + * aligned at 64 bit. + * Encoded packet may end at an unaligned bit offset. + * In case a fallback clear text packet is transmitted in + * between, we adjust this offset back to the last 64bit + * aligned "native long word", which makes coding and decoding + * the plain text bitmap much more convenient. */ +#if BITS_PER_LONG == 64 + c->word_offset = c->bit_offset >> 6; +#elif BITS_PER_LONG == 32 + c->word_offset = c->bit_offset >> 5; + c->word_offset &= ~(1UL); +#else +# error "unsupported BITS_PER_LONG" +#endif +} + +/* This is the layout for a packet on the wire. + * The byteorder is the network byte order. + * (except block_id and barrier fields. + * these are pointers to local structs + * and have no relevance for the partner, + * which just echoes them as received.) + * + * NOTE that the payload starts at a long aligned offset, + * regardless of 32 or 64 bit arch! + */ +struct Drbd_Header { + u32 magic; + u16 command; + u16 length; /* bytes of data after this header */ + u8 payload[0]; +} __attribute((packed)); +/* 8 bytes. packet FIXED for the next century! */ + +/* + * short commands, packets without payload, plain Drbd_Header: + * Ping + * PingAck + * BecomeSyncTarget + * BecomeSyncSource + * UnplugRemote + */ + +/* + * commands with out-of-struct payload: + * ReportBitMap (no additional fields) + * Data, DataReply (see Drbd_Data_Packet) + * ReportCBitMap (see receive_compressed_bitmap) + */ + +/* these defines must not be changed without changing the protocol version */ +#define DP_HARDBARRIER 1 +#define DP_RW_SYNC 2 +#define DP_MAY_SET_IN_SYNC 4 + +struct Drbd_Data_Packet { + struct Drbd_Header head; + u64 sector; /* 64 bits sector number */ + u64 block_id; /* to identify the request in protocol B&C */ + u32 seq_num; + u32 dp_flags; +} __attribute((packed)); + +/* + * commands which share a struct: + * Drbd_BlockAck_Packet: + * RecvAck (proto B), WriteAck (proto C), + * DiscardAck (proto C, two-primaries conflict detection) + * Drbd_BlockRequest_Packet: + * DataRequest, RSDataRequest + */ +struct Drbd_BlockAck_Packet { + struct Drbd_Header head; + u64 sector; + u64 block_id; + u32 blksize; + u32 seq_num; +} __attribute((packed)); + + +struct Drbd_BlockRequest_Packet { + struct Drbd_Header head; + u64 sector; + u64 block_id; + u32 blksize; + u32 pad; /* to multiple of 8 Byte */ +} __attribute((packed)); + +/* + * commands with their own struct for additional fields: + * HandShake + * Barrier + * BarrierAck + * SyncParam + * ReportParams + */ + +struct Drbd_HandShake_Packet { + struct Drbd_Header head; /* 8 bytes */ + u32 protocol_min; + u32 feature_flags; + u32 protocol_max; + + /* should be more than enough for future enhancements + * for now, feature_flags and the reserverd array shall be zero. + */ + + u32 _pad; + u64 reserverd[7]; +} __attribute((packed)); +/* 80 bytes, FIXED for the next century */ + +struct Drbd_Barrier_Packet { + struct Drbd_Header head; + u32 barrier; /* barrier number _handle_ only */ + u32 pad; /* to multiple of 8 Byte */ +} __attribute((packed)); + +struct Drbd_BarrierAck_Packet { + struct Drbd_Header head; + u32 barrier; + u32 set_size; +} __attribute((packed)); + +struct Drbd_SyncParam_Packet { + struct Drbd_Header head; + u32 rate; + + /* Since protocol version 88 and higher. */ + char verify_alg[0]; +} __attribute((packed)); + +struct Drbd_SyncParam89_Packet { + struct Drbd_Header head; + u32 rate; + /* protocol version 89: */ + char verify_alg[SHARED_SECRET_MAX]; + char csums_alg[SHARED_SECRET_MAX]; +} __attribute((packed)); + +struct Drbd_Protocol_Packet { + struct Drbd_Header head; + u32 protocol; + u32 after_sb_0p; + u32 after_sb_1p; + u32 after_sb_2p; + u32 want_lose; + u32 two_primaries; + + /* Since protocol version 87 and higher. */ + char integrity_alg[0]; + +} __attribute((packed)); + +struct Drbd_GenCnt_Packet { + struct Drbd_Header head; + u64 uuid[EXT_UUID_SIZE]; +} __attribute((packed)); + +struct Drbd_SyncUUID_Packet { + struct Drbd_Header head; + u64 uuid; +} __attribute((packed)); + +struct Drbd_Sizes_Packet { + struct Drbd_Header head; + u64 d_size; /* size of disk */ + u64 u_size; /* user requested size */ + u64 c_size; /* current exported size */ + u32 max_segment_size; /* Maximal size of a BIO */ + u32 queue_order_type; +} __attribute((packed)); + +struct Drbd_State_Packet { + struct Drbd_Header head; + u32 state; +} __attribute((packed)); + +struct Drbd_Req_State_Packet { + struct Drbd_Header head; + u32 mask; + u32 val; +} __attribute((packed)); + +struct Drbd_RqS_Reply_Packet { + struct Drbd_Header head; + u32 retcode; +} __attribute((packed)); + +struct Drbd06_Parameter_P { + u64 size; + u32 state; + u32 blksize; + u32 protocol; + u32 version; + u32 gen_cnt[5]; + u32 bit_map_gen[5]; +} __attribute((packed)); + +struct Drbd_Discard_Packet { + struct Drbd_Header head; + u64 block_id; + u32 seq_num; + u32 pad; +} __attribute((packed)); + +/* Valid values for the encoding field. + * Bump proto version when changing this. */ +enum Drbd_bitmap_code { + RLE_VLI_Bytes = 0, + RLE_VLI_BitsFibD_0_1 = 1, + RLE_VLI_BitsFibD_1_1 = 2, + RLE_VLI_BitsFibD_1_2 = 3, + RLE_VLI_BitsFibD_2_3 = 4, + RLE_VLI_BitsFibD_3_5 = 5, +}; + +struct Drbd_Compressed_Bitmap_Packet { + struct Drbd_Header head; + /* (encoding & 0x0f): actual encoding, see enum Drbd_bitmap_code + * (encoding & 0x80): polarity (set/unset) of first runlength + * ((encoding >> 4) & 0x07): pad_bits, number of trailing zero bits + * used to pad up to head.length bytes + */ + u8 encoding; + + u8 code[0]; +} __attribute((packed)); + +static inline enum Drbd_bitmap_code +DCBP_get_code(struct Drbd_Compressed_Bitmap_Packet *p) +{ + return (enum Drbd_bitmap_code)(p->encoding & 0x0f); +} + +static inline void +DCBP_set_code(struct Drbd_Compressed_Bitmap_Packet *p, enum Drbd_bitmap_code code) +{ + BUG_ON(code & ~0xf); + p->encoding = (p->encoding & ~0xf) | code; +} + +static inline int +DCBP_get_start(struct Drbd_Compressed_Bitmap_Packet *p) +{ + return (p->encoding & 0x80) != 0; +} + +static inline void +DCBP_set_start(struct Drbd_Compressed_Bitmap_Packet *p, int set) +{ + p->encoding = (p->encoding & ~0x80) | (set ? 0x80 : 0); +} + +static inline int +DCBP_get_pad_bits(struct Drbd_Compressed_Bitmap_Packet *p) +{ + return (p->encoding >> 4) & 0x7; +} + +static inline void +DCBP_set_pad_bits(struct Drbd_Compressed_Bitmap_Packet *p, int n) +{ + BUG_ON(n & ~0x7); + p->encoding = (p->encoding & (~0x7 << 4)) | (n << 4); +} + +/* one bitmap packet, including the Drbd_Header, + * should fit within one _architecture independend_ page. + * so we need to use the fixed size 4KiB page size + * most architechtures have used for a long time. + */ +#define BM_PACKET_PAYLOAD_BYTES (4096 - sizeof(struct Drbd_Header)) +#define BM_PACKET_WORDS (BM_PACKET_PAYLOAD_BYTES/sizeof(long)) +#define BM_PACKET_VLI_BYTES_MAX (4096 - sizeof(struct Drbd_Compressed_Bitmap_Packet)) +#if (PAGE_SIZE < 4096) +/* drbd_send_bitmap / receive_bitmap would break horribly */ +#error "PAGE_SIZE too small" +#endif + +union Drbd_Polymorph_Packet { + struct Drbd_Header head; + struct Drbd_HandShake_Packet HandShake; + struct Drbd_Data_Packet Data; + struct Drbd_BlockAck_Packet BlockAck; + struct Drbd_Barrier_Packet Barrier; + struct Drbd_BarrierAck_Packet BarrierAck; + struct Drbd_SyncParam89_Packet SyncParam89; + struct Drbd_Protocol_Packet Protocol; + struct Drbd_Sizes_Packet Sizes; + struct Drbd_GenCnt_Packet GenCnt; + struct Drbd_State_Packet State; + struct Drbd_Req_State_Packet ReqState; + struct Drbd_RqS_Reply_Packet RqSReply; + struct Drbd_BlockRequest_Packet BlockRequest; +} __attribute((packed)); + +/**********************************************************************/ +enum Drbd_thread_state { + None, + Running, + Exiting, + Restarting +}; + +struct Drbd_thread { + spinlock_t t_lock; + struct task_struct *task; + struct completion stop; + enum Drbd_thread_state t_state; + int (*function) (struct Drbd_thread *); + struct drbd_conf *mdev; + int reset_cpu_mask; +}; + +static inline enum Drbd_thread_state get_t_state(struct Drbd_thread *thi) +{ + /* THINK testing the t_state seems to be uncritical in all cases + * (but thread_{start,stop}), so we can read it *without* the lock. + * --lge */ + + smp_rmb(); + return thi->t_state; +} + + +/* + * Having this as the first member of a struct provides sort of "inheritance". + * "derived" structs can be "drbd_queue_work()"ed. + * The callback should know and cast back to the descendant struct. + * drbd_request and Tl_epoch_entry are descendants of drbd_work. + */ +struct drbd_work; +typedef int (*drbd_work_cb)(struct drbd_conf *, struct drbd_work *, int cancel); +struct drbd_work { + struct list_head list; + drbd_work_cb cb; +}; + +struct drbd_barrier; +struct drbd_request { + struct drbd_work w; + struct drbd_conf *mdev; + struct bio *private_bio; + struct hlist_node colision; + sector_t sector; + unsigned int size; + unsigned int epoch; /* barrier_nr */ + + /* barrier_nr: used to check on "completion" whether this req was in + * the current epoch, and we therefore have to close it, + * starting a new epoch... + */ + + /* up to here, the struct layout is identical to Tl_epoch_entry; + * we might be able to use that to our advantage... */ + + struct list_head tl_requests; /* ring list in the transfer log */ + struct bio *master_bio; /* master bio pointer */ + unsigned long rq_state; /* see comments above _req_mod() */ + int seq_num; + unsigned long start_time; +}; + +struct drbd_barrier { + struct drbd_work w; + struct list_head requests; /* requests before */ + struct drbd_barrier *next; /* pointer to the next barrier */ + unsigned int br_number; /* the barriers identifier. */ + int n_req; /* number of requests attached before this barrier */ +}; + +struct drbd_request; + +/* These Tl_epoch_entries may be in one of 6 lists: + active_ee .. data packet being written + sync_ee .. syncer block being written + done_ee .. block written, need to send WriteAck + read_ee .. [RS]DataRequest being read +*/ + +struct drbd_epoch { + struct list_head list; + unsigned int barrier_nr; + atomic_t epoch_size; /* increased on every request added. */ + atomic_t active; /* increased on every req. added, and dec on every finished. */ + unsigned long flags; +}; + +/* drbd_epoch flag bits */ +enum { + DE_BARRIER_IN_NEXT_EPOCH_ISSUED, + DE_BARRIER_IN_NEXT_EPOCH_DONE, + DE_CONTAINS_A_BARRIER, + DE_HAVE_BARRIER_NUMBER, + DE_IS_FINISHING, +}; + +struct Tl_epoch_entry { + struct drbd_work w; + struct drbd_conf *mdev; + struct bio *private_bio; + struct hlist_node colision; + sector_t sector; + unsigned int size; + struct drbd_epoch *epoch; + + /* up to here, the struct layout is identical to drbd_request; + * we might be able to use that to our advantage... */ + + unsigned int flags; + u64 block_id; +}; + +struct digest_info { + int digest_size; + void *digest; +}; + +/* ee flag bits */ +enum { + __EE_CALL_AL_COMPLETE_IO, + __EE_CONFLICT_PENDING, + __EE_MAY_SET_IN_SYNC, + __EE_IS_BARRIER, +}; +#define EE_CALL_AL_COMPLETE_IO (1<<__EE_CALL_AL_COMPLETE_IO) +#define EE_CONFLICT_PENDING (1<<__EE_CONFLICT_PENDING) +#define EE_MAY_SET_IN_SYNC (1<<__EE_MAY_SET_IN_SYNC) +#define EE_IS_BARRIER (1<<__EE_IS_BARRIER) + +/* global flag bits */ +enum { + CREATE_BARRIER, /* next Data is preceeded by a Barrier */ + SIGNAL_ASENDER, /* whether asender wants to be interrupted */ + SEND_PING, /* whether asender should send a ping asap */ + WORK_PENDING, /* completion flag for drbd_disconnect */ + STOP_SYNC_TIMER, /* tell timer to cancel itself */ + UNPLUG_QUEUED, /* only relevant with kernel 2.4 */ + UNPLUG_REMOTE, /* sending a "UnplugRemote" could help */ + MD_DIRTY, /* current uuids and flags not yet on disk */ + DISCARD_CONCURRENT, /* Set on one node, cleared on the peer! */ + USE_DEGR_WFC_T, /* degr-wfc-timeout instead of wfc-timeout. */ + CLUSTER_ST_CHANGE, /* Cluster wide state change going on... */ + CL_ST_CHG_SUCCESS, + CL_ST_CHG_FAIL, + CRASHED_PRIMARY, /* This node was a crashed primary. + * Gets cleared when the state.conn + * goes into Connected state. */ + WRITE_BM_AFTER_RESYNC, /* A kmalloc() during resync failed */ + NO_BARRIER_SUPP, /* underlying block device doesn't implement barriers */ + CONSIDER_RESYNC, + + MD_NO_BARRIER, /* meta data device does not support barriers, + so don't even try */ + SUSPEND_IO, /* suspend application io */ + BITMAP_IO, /* suspend application io; + once no more io in flight, start bitmap io */ + BITMAP_IO_QUEUED, /* Started bitmap IO */ + RESYNC_AFTER_NEG, /* Resync after online grow after the attach&negotiate finished. */ + NET_CONGESTED, /* The data socket is congested */ +}; + +struct drbd_bitmap; /* opaque for drbd_conf */ + +/* TODO sort members for performance + * MAYBE group them further */ + +/* THINK maybe we actually want to use the default "event/%s" worker threads + * or similar in linux 2.6, which uses per cpu data and threads. + * + * To be general, this might need a spin_lock member. + * For now, please use the mdev->req_lock to protect list_head, + * see drbd_queue_work below. + */ +struct drbd_work_queue { + struct list_head q; + struct semaphore s; /* producers up it, worker down()s it */ + spinlock_t q_lock; /* to protect the list. */ +}; + +struct drbd_socket { + struct drbd_work_queue work; + struct mutex mutex; + struct socket *socket; + /* this way we get our + * send/receive buffers off the stack */ + union Drbd_Polymorph_Packet sbuf; + union Drbd_Polymorph_Packet rbuf; +}; + +struct drbd_md { + u64 md_offset; /* sector offset to 'super' block */ + + u64 la_size_sect; /* last agreed size, unit sectors */ + u64 uuid[UUID_SIZE]; + u64 device_uuid; + u32 flags; + u32 md_size_sect; + + s32 al_offset; /* signed relative sector offset to al area */ + s32 bm_offset; /* signed relative sector offset to bitmap */ + + /* u32 al_nr_extents; important for restoring the AL + * is stored into sync_conf.al_extents, which in turn + * gets applied to act_log->nr_elements + */ +}; + +/* for sync_conf and other types... */ +#define NL_PACKET(name, number, fields) struct name { fields }; +#define NL_INTEGER(pn,pr,member) int member; +#define NL_INT64(pn,pr,member) __u64 member; +#define NL_BIT(pn,pr,member) unsigned member:1; +#define NL_STRING(pn,pr,member,len) unsigned char member[len]; int member ## _len; +#include "linux/drbd_nl.h" + +struct drbd_backing_dev { + struct block_device *backing_bdev; + struct block_device *md_bdev; + struct file *lo_file; + struct file *md_file; + struct drbd_md md; + struct disk_conf dc; /* The user provided config... */ + sector_t known_size; /* last known size of that backing device */ +}; + +struct drbd_md_io { + struct drbd_conf *mdev; + struct completion event; + int error; +}; + +struct bm_io_work { + struct drbd_work w; + char *why; + int (*io_fn)(struct drbd_conf *mdev); + void (*done)(struct drbd_conf *mdev, int rv); +}; + +enum write_ordering_e { + WO_none, + WO_drain_io, + WO_bdev_flush, + WO_bio_barrier +}; + +struct drbd_conf { + /* things that are stored as / read from meta data on disk */ + unsigned long flags; + + /* configured by drbdsetup */ + struct net_conf *net_conf; /* protected by inc_net() and dec_net() */ + struct syncer_conf sync_conf; + struct drbd_backing_dev *bc __protected_by(local); + + sector_t p_size; /* partner's disk size */ + struct request_queue *rq_queue; + struct block_device *this_bdev; + struct gendisk *vdisk; + + struct drbd_socket data; /* data/barrier/cstate/parameter packets */ + struct drbd_socket meta; /* ping/ack (metadata) packets */ + int agreed_pro_version; /* actually used protocol version */ + unsigned long last_received; /* in jiffies, either socket */ + unsigned int ko_count; + struct drbd_work resync_work, + unplug_work, + md_sync_work; + struct timer_list resync_timer; + struct timer_list md_sync_timer; + + /* Used after attach while negotiating new disk state. */ + union drbd_state_t new_state_tmp; + + union drbd_state_t state; + wait_queue_head_t misc_wait; + wait_queue_head_t state_wait; /* upon each state change. */ + unsigned int send_cnt; + unsigned int recv_cnt; + unsigned int read_cnt; + unsigned int writ_cnt; + unsigned int al_writ_cnt; + unsigned int bm_writ_cnt; + atomic_t ap_bio_cnt; /* Requests we need to complete */ + atomic_t ap_pending_cnt; /* AP data packets on the wire, ack expected */ + atomic_t rs_pending_cnt; /* RS request/data packets on the wire */ + atomic_t unacked_cnt; /* Need to send replys for */ + atomic_t local_cnt; /* Waiting for local completion */ + atomic_t net_cnt; /* Users of net_conf */ + spinlock_t req_lock; + struct drbd_barrier *unused_spare_barrier; /* for pre-allocation */ + struct drbd_barrier *newest_barrier; + struct drbd_barrier *oldest_barrier; + struct list_head out_of_sequence_requests; + struct hlist_head *tl_hash; + unsigned int tl_hash_s; + + /* blocks to sync in this run [unit BM_BLOCK_SIZE] */ + unsigned long rs_total; + /* number of sync IOs that failed in this run */ + unsigned long rs_failed; + /* Syncer's start time [unit jiffies] */ + unsigned long rs_start; + /* cumulated time in PausedSyncX state [unit jiffies] */ + unsigned long rs_paused; + /* block not up-to-date at mark [unit BM_BLOCK_SIZE] */ + unsigned long rs_mark_left; + /* marks's time [unit jiffies] */ + unsigned long rs_mark_time; + /* skipped because csum was equeal [unit BM_BLOCK_SIZE] */ + unsigned long rs_same_csum; + sector_t ov_position; + /* Start sector of out of sync range. */ + sector_t ov_last_oos_start; + /* size of out-of-sync range in sectors. */ + sector_t ov_last_oos_size; + unsigned long ov_left; + struct crypto_hash *csums_tfm; + struct crypto_hash *verify_tfm; + + struct Drbd_thread receiver; + struct Drbd_thread worker; + struct Drbd_thread asender; + struct drbd_bitmap *bitmap; + unsigned long bm_resync_fo; /* bit offset for drbd_bm_find_next */ + + /* Used to track operations of resync... */ + struct lru_cache *resync; + /* Number of locked elements in resync LRU */ + unsigned int resync_locked; + /* resync extent number waiting for application requests */ + unsigned int resync_wenr; + + int open_cnt; + u64 *p_uuid; + struct drbd_epoch *current_epoch; + spinlock_t epoch_lock; + unsigned int epochs; + enum write_ordering_e write_ordering; + struct list_head active_ee; /* IO in progress */ + struct list_head sync_ee; /* IO in progress */ + struct list_head done_ee; /* send ack */ + struct list_head read_ee; /* IO in progress */ + struct list_head net_ee; /* zero-copy network send in progress */ + struct hlist_head *ee_hash; /* is proteced by req_lock! */ + unsigned int ee_hash_s; + + /* this one is protected by ee_lock, single thread */ + struct Tl_epoch_entry *last_write_w_barrier; + + int next_barrier_nr; + struct hlist_head *app_reads_hash; /* is proteced by req_lock */ + struct list_head resync_reads; + atomic_t pp_in_use; + wait_queue_head_t ee_wait; + struct page *md_io_page; /* one page buffer for md_io */ + struct page *md_io_tmpp; /* for hardsect != 512 [s390 only?] */ + struct mutex md_io_mutex; /* protects the md_io_buffer */ + spinlock_t al_lock; + wait_queue_head_t al_wait; + struct lru_cache *act_log; /* activity log */ + unsigned int al_tr_number; + int al_tr_cycle; + int al_tr_pos; /* position of the next transaction in the journal */ + struct crypto_hash *cram_hmac_tfm; + struct crypto_hash *integrity_w_tfm; /* to be used by the worker thread */ + struct crypto_hash *integrity_r_tfm; /* to be used by the receiver thread */ + void *int_dig_out; + void *int_dig_in; + void *int_dig_vv; + wait_queue_head_t seq_wait; + atomic_t packet_seq; + unsigned int peer_seq; + spinlock_t peer_seq_lock; + unsigned int minor; + unsigned long comm_bm_set; /* communicated number of set bits. */ + cpumask_t cpu_mask; + struct bm_io_work bm_io_work; + u64 ed_uuid; /* UUID of the exposed data */ + struct mutex state_mutex; + char congestion_reason; /* Why we where congested... */ +}; + +static inline struct drbd_conf *minor_to_mdev(unsigned int minor) +{ + struct drbd_conf *mdev; + + mdev = minor < minor_count ? minor_table[minor] : NULL; + + return mdev; +} + +static inline unsigned int mdev_to_minor(struct drbd_conf *mdev) +{ + return mdev->minor; +} + +/* returns 1 if it was successfull, + * returns 0 if there was no data socket. + * so wherever you are going to use the data.socket, e.g. do + * if (!drbd_get_data_sock(mdev)) + * return 0; + * CODE(); + * drbd_put_data_sock(mdev); + */ +static inline int drbd_get_data_sock(struct drbd_conf *mdev) +{ + mutex_lock(&mdev->data.mutex); + /* drbd_disconnect() could have called drbd_free_sock() + * while we were waiting in down()... */ + if (unlikely(mdev->data.socket == NULL)) { + mutex_unlock(&mdev->data.mutex); + return 0; + } + return 1; +} + +static inline void drbd_put_data_sock(struct drbd_conf *mdev) +{ + mutex_unlock(&mdev->data.mutex); +} + +/* + * function declarations + *************************/ + +/* drbd_main.c */ + +enum chg_state_flags { + ChgStateHard = 1, + ChgStateVerbose = 2, + ChgWaitComplete = 4, + ChgSerialize = 8, + ChgOrdered = ChgWaitComplete + ChgSerialize, +}; + +extern void drbd_init_set_defaults(struct drbd_conf *mdev); +extern int drbd_change_state(struct drbd_conf *mdev, enum chg_state_flags f, + union drbd_state_t mask, union drbd_state_t val); +extern void drbd_force_state(struct drbd_conf *, union drbd_state_t, + union drbd_state_t); +extern int _drbd_request_state(struct drbd_conf *, union drbd_state_t, + union drbd_state_t, enum chg_state_flags); +extern int __drbd_set_state(struct drbd_conf *, union drbd_state_t, + enum chg_state_flags, struct completion *done); +extern void print_st_err(struct drbd_conf *, union drbd_state_t, + union drbd_state_t, int); +extern int drbd_thread_start(struct Drbd_thread *thi); +extern void _drbd_thread_stop(struct Drbd_thread *thi, int restart, int wait); +#ifdef CONFIG_SMP +extern void drbd_thread_current_set_cpu(struct drbd_conf *mdev); +extern cpumask_t drbd_calc_cpu_mask(struct drbd_conf *mdev); +#else +#define drbd_thread_current_set_cpu(A) ({}) +#define drbd_calc_cpu_mask(A) CPU_MASK_ALL +#endif +extern void drbd_free_resources(struct drbd_conf *mdev); +extern void tl_release(struct drbd_conf *mdev, unsigned int barrier_nr, + unsigned int set_size); +extern void tl_clear(struct drbd_conf *mdev); +extern void _tl_add_barrier(struct drbd_conf *, struct drbd_barrier *); +extern void drbd_free_sock(struct drbd_conf *mdev); +extern int drbd_send(struct drbd_conf *mdev, struct socket *sock, + void *buf, size_t size, unsigned msg_flags); +extern int drbd_send_protocol(struct drbd_conf *mdev); +extern int _drbd_send_uuids(struct drbd_conf *mdev); +extern int drbd_send_uuids(struct drbd_conf *mdev); +extern int drbd_send_sync_uuid(struct drbd_conf *mdev, u64 val); +extern int drbd_send_sizes(struct drbd_conf *mdev); +extern int _drbd_send_state(struct drbd_conf *mdev); +extern int drbd_send_state(struct drbd_conf *mdev); +extern int _drbd_send_cmd(struct drbd_conf *mdev, struct socket *sock, + enum Drbd_Packet_Cmd cmd, struct Drbd_Header *h, + size_t size, unsigned msg_flags); +#define USE_DATA_SOCKET 1 +#define USE_META_SOCKET 0 +extern int drbd_send_cmd(struct drbd_conf *mdev, int use_data_socket, + enum Drbd_Packet_Cmd cmd, struct Drbd_Header *h, + size_t size); +extern int drbd_send_cmd2(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + char *data, size_t size); +extern int drbd_send_sync_param(struct drbd_conf *mdev, struct syncer_conf *sc); +extern int drbd_send_b_ack(struct drbd_conf *mdev, u32 barrier_nr, + u32 set_size); +extern int drbd_send_ack(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Tl_epoch_entry *e); +extern int drbd_send_ack_rp(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Drbd_BlockRequest_Packet *rp); +extern int drbd_send_ack_dp(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Drbd_Data_Packet *dp); +extern int drbd_send_ack_ex(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + sector_t sector, int blksize, u64 block_id); +extern int _drbd_send_page(struct drbd_conf *mdev, struct page *page, + int offset, size_t size); +extern int drbd_send_block(struct drbd_conf *mdev, enum Drbd_Packet_Cmd cmd, + struct Tl_epoch_entry *e); +extern int drbd_send_dblock(struct drbd_conf *mdev, struct drbd_request *req); +extern int _drbd_send_barrier(struct drbd_conf *mdev, + struct drbd_barrier *barrier); +extern int drbd_send_drequest(struct drbd_conf *mdev, int cmd, + sector_t sector, int size, u64 block_id); +extern int drbd_send_drequest_csum(struct drbd_conf *mdev, + sector_t sector,int size, + void *digest, int digest_size, + enum Drbd_Packet_Cmd cmd); +extern int drbd_send_ov_request(struct drbd_conf *mdev,sector_t sector,int size); + +extern int drbd_send_bitmap(struct drbd_conf *mdev); +extern int _drbd_send_bitmap(struct drbd_conf *mdev); +extern int drbd_send_sr_reply(struct drbd_conf *mdev, int retcode); +extern void drbd_free_bc(struct drbd_backing_dev *bc); +extern int drbd_io_error(struct drbd_conf *mdev, int forcedetach); +extern void drbd_mdev_cleanup(struct drbd_conf *mdev); + +/* drbd_meta-data.c (still in drbd_main.c) */ +extern void drbd_md_sync(struct drbd_conf *mdev); +extern int drbd_md_read(struct drbd_conf *mdev, struct drbd_backing_dev *bdev); +/* maybe define them below as inline? */ +extern void drbd_uuid_set(struct drbd_conf *mdev, int idx, u64 val) __must_hold(local); +extern void _drbd_uuid_set(struct drbd_conf *mdev, int idx, u64 val) __must_hold(local); +extern void drbd_uuid_new_current(struct drbd_conf *mdev) __must_hold(local); +extern void _drbd_uuid_new_current(struct drbd_conf *mdev) __must_hold(local); +extern void drbd_uuid_set_bm(struct drbd_conf *mdev, u64 val) __must_hold(local); +extern void drbd_md_set_flag(struct drbd_conf *mdev, int flags) __must_hold(local); +extern void drbd_md_clear_flag(struct drbd_conf *mdev, int flags)__must_hold(local); +extern int drbd_md_test_flag(struct drbd_backing_dev *, int); +extern void drbd_md_mark_dirty(struct drbd_conf *mdev); +extern void drbd_queue_bitmap_io(struct drbd_conf *mdev, + int (*io_fn)(struct drbd_conf *), + void (*done)(struct drbd_conf *, int), + char *why); +extern int drbd_bmio_set_n_write(struct drbd_conf *mdev); +extern int drbd_bmio_clear_n_write(struct drbd_conf *mdev); +extern int drbd_bitmap_io(struct drbd_conf *mdev, int (*io_fn)(struct drbd_conf *), char *why); + + +/* Meta data layout + We reserve a 128MB Block (4k aligned) + * either at the end of the backing device + * or on a seperate meta data device. */ + +#define MD_RESERVED_SECT (128LU << 11) /* 128 MB, unit sectors */ +/* The following numbers are sectors */ +#define MD_AL_OFFSET 8 /* 8 Sectors after start of meta area */ +#define MD_AL_MAX_SIZE 64 /* = 32 kb LOG ~ 3776 extents ~ 14 GB Storage */ +/* Allows up to about 3.8TB */ +#define MD_BM_OFFSET (MD_AL_OFFSET + MD_AL_MAX_SIZE) + +/* Since the smalles IO unit is usually 512 byte */ +#define MD_HARDSECT_B 9 +#define MD_HARDSECT (1< we need 32 KB bitmap. + * Bit 0 ==> local node thinks this block is binary identical on both nodes + * Bit 1 ==> local node thinks this block needs to be synced. + */ + +#define BM_BLOCK_SIZE_B 12 /* 4k per bit */ +#define BM_BLOCK_SIZE (1<>(BM_BLOCK_SIZE_B-9)) +#define BM_BIT_TO_SECT(x) ((sector_t)(x)<<(BM_BLOCK_SIZE_B-9)) +#define BM_SECT_PER_BIT BM_BIT_TO_SECT(1) + +/* bit to represented kilo byte conversion */ +#define Bit2KB(bits) ((bits)<<(BM_BLOCK_SIZE_B-10)) + +/* in which _bitmap_ extent (resp. sector) the bit for a certain + * _storage_ sector is located in */ +#define BM_SECT_TO_EXT(x) ((x)>>(BM_EXT_SIZE_B-9)) + +/* how much _storage_ sectors we have per bitmap sector */ +#define BM_EXT_TO_SECT(x) ((sector_t)(x) << (BM_EXT_SIZE_B-9)) +#define BM_SECT_PER_EXT BM_EXT_TO_SECT(1) + +/* in one sector of the bitmap, we have this many activity_log extents. */ +#define AL_EXT_PER_BM_SECT (1 << (BM_EXT_SIZE_B - AL_EXTENT_SIZE_B)) +#define BM_WORDS_PER_AL_EXT (1 << (AL_EXTENT_SIZE_B-BM_BLOCK_SIZE_B-LN2_BPL)) + +#define BM_BLOCKS_PER_BM_EXT_B (BM_EXT_SIZE_B - BM_BLOCK_SIZE_B) +#define BM_BLOCKS_PER_BM_EXT_MASK ((1<= level) && (type & trace_type); +} +static inline int +is_mdev_trace(struct drbd_conf *mdev, unsigned int type, unsigned int level) { + return is_trace(type, level) && + ((1 << mdev_to_minor(mdev)) & trace_devs); +} + +#define MTRACE(type, lvl, code...) \ +do { \ + if (unlikely(is_mdev_trace(mdev, type, lvl))) { \ + code \ + } \ +} while (0) + +#define TRACE(type, lvl, code...) \ +do { \ + if (unlikely(is_trace(type, lvl))) { \ + code \ + } \ +} while (0) + +/* Buffer printing support + * dbg_print_flags: used for Flags arg to drbd_print_buffer + * - DBGPRINT_BUFFADDR; if set, each line starts with the + * virtual address of the line being output. If clear, + * each line starts with the offset from the beginning + * of the buffer. */ +enum dbg_print_flags { + DBGPRINT_BUFFADDR = 0x0001, +}; + +extern void drbd_print_uuid(struct drbd_conf *mdev, unsigned int idx); + +extern void drbd_print_buffer(const char *prefix, unsigned int flags, int size, + const void *buffer, const void *buffer_va, + unsigned int length); + +/* Bio printing support */ +extern void _dump_bio(const char *pfx, struct drbd_conf *mdev, struct bio *bio, int complete, struct drbd_request *r); + +static inline void dump_bio(struct drbd_conf *mdev, + struct bio *bio, int complete, struct drbd_request *r) +{ + MTRACE(TraceTypeRq, TraceLvlSummary, + _dump_bio("Rq", mdev, bio, complete, r); + ); +} + +static inline void dump_internal_bio(const char *pfx, struct drbd_conf *mdev, struct bio *bio, int complete) +{ + MTRACE(TraceTypeIntRq, TraceLvlSummary, + _dump_bio(pfx, mdev, bio, complete, NULL); + ); +} + +/* Packet dumping support */ +extern void _dump_packet(struct drbd_conf *mdev, struct socket *sock, + int recv, union Drbd_Polymorph_Packet *p, + char *file, int line); + +static inline void +dump_packet(struct drbd_conf *mdev, struct socket *sock, + int recv, union Drbd_Polymorph_Packet *p, char *file, int line) +{ + MTRACE(TraceTypePacket, TraceLvlSummary, + _dump_packet(mdev, sock, recv, p, file, line); + ); +} + +#else + +#define MTRACE(ignored...) ((void)0) +#define TRACE(ignored...) ((void)0) + +#define dump_bio(ignored...) ((void)0) +#define dump_internal_bio(ignored...) ((void)0) +#define dump_packet(ignored...) ((void)0) +#endif + +/* drbd_req */ +extern int drbd_make_request_26(struct request_queue *q, struct bio *bio); +extern int drbd_read_remote(struct drbd_conf *mdev, struct drbd_request *req); +extern int drbd_merge_bvec(struct request_queue *q, struct bvec_merge_data *bvm, struct bio_vec *bvec); +extern int is_valid_ar_handle(struct drbd_request *, sector_t); + + +/* drbd_nl.c */ +extern void drbd_suspend_io(struct drbd_conf *mdev); +extern void drbd_resume_io(struct drbd_conf *mdev); +extern char *ppsize(char *buf, unsigned long long size); +extern sector_t drbd_new_dev_size(struct drbd_conf *, + struct drbd_backing_dev *); +enum determin_dev_size_enum { dev_size_error = -1, unchanged = 0, shrunk = 1, grew = 2 }; +extern enum determin_dev_size_enum drbd_determin_dev_size(struct drbd_conf *) __must_hold(local); +extern void resync_after_online_grow(struct drbd_conf *); +extern void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int) __must_hold(local); +extern int drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role, + int force); +enum drbd_disk_state drbd_try_outdate_peer(struct drbd_conf *mdev); +extern int drbd_khelper(struct drbd_conf *mdev, char *cmd); + +/* drbd_worker.c */ +extern int drbd_worker(struct Drbd_thread *thi); +extern void drbd_alter_sa(struct drbd_conf *mdev, int na); +extern void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side); +extern void resume_next_sg(struct drbd_conf *mdev); +extern void suspend_other_sg(struct drbd_conf *mdev); +extern int drbd_resync_finished(struct drbd_conf *mdev); +/* maybe rather drbd_main.c ? */ +extern int drbd_md_sync_page_io(struct drbd_conf *mdev, + struct drbd_backing_dev *bdev, sector_t sector, int rw); +extern void drbd_ov_oos_found(struct drbd_conf*, sector_t, int); + +static inline void ov_oos_print(struct drbd_conf *mdev) +{ + if (mdev->ov_last_oos_size) { + ERR("Out of sync: start=%llu, size=%lu (sectors)\n", + (unsigned long long)mdev->ov_last_oos_start, + (unsigned long)mdev->ov_last_oos_size); + } + mdev->ov_last_oos_size=0; +} + + +void drbd_csum(struct drbd_conf *, struct crypto_hash *, struct bio *, void *); +/* worker callbacks */ +extern int w_req_cancel_conflict(struct drbd_conf *, struct drbd_work *, int); +extern int w_read_retry_remote(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_end_data_req(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_end_rsdata_req(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_end_csum_rs_req(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_end_ov_reply(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_end_ov_req(struct drbd_conf *, struct drbd_work *, int); +extern int w_ov_finished(struct drbd_conf *, struct drbd_work *, int); +extern int w_resync_inactive(struct drbd_conf *, struct drbd_work *, int); +extern int w_resume_next_sg(struct drbd_conf *, struct drbd_work *, int); +extern int w_io_error(struct drbd_conf *, struct drbd_work *, int); +extern int w_send_write_hint(struct drbd_conf *, struct drbd_work *, int); +extern int w_make_resync_request(struct drbd_conf *, struct drbd_work *, int); +extern int w_send_dblock(struct drbd_conf *, struct drbd_work *, int); +extern int w_send_barrier(struct drbd_conf *, struct drbd_work *, int); +extern int w_send_read_req(struct drbd_conf *, struct drbd_work *, int); +extern int w_prev_work_done(struct drbd_conf *, struct drbd_work *, int); +extern int w_e_reissue(struct drbd_conf *, struct drbd_work *, int); + +extern void resync_timer_fn(unsigned long data); + +/* drbd_receiver.c */ +extern int drbd_release_ee(struct drbd_conf *mdev, struct list_head *list); +extern struct Tl_epoch_entry *drbd_alloc_ee(struct drbd_conf *mdev, + u64 id, + sector_t sector, + unsigned int data_size, + gfp_t gfp_mask) __must_hold(local); +extern void drbd_free_ee(struct drbd_conf *mdev, struct Tl_epoch_entry *e); +extern void drbd_wait_ee_list_empty(struct drbd_conf *mdev, + struct list_head *head); +extern void _drbd_wait_ee_list_empty(struct drbd_conf *mdev, + struct list_head *head); +extern void drbd_set_recv_tcq(struct drbd_conf *mdev, int tcq_enabled); +extern void _drbd_clear_done_ee(struct drbd_conf *mdev); + +/* yes, there is kernel_setsockopt, but only since 2.6.18. we don't need to + * mess with get_fs/set_fs, we know we are KERNEL_DS always. */ +static inline int drbd_setsockopt(struct socket *sock, int level, int optname, + char __user *optval, int optlen) +{ + int err; + if (level == SOL_SOCKET) + err = sock_setsockopt(sock, level, optname, optval, optlen); + else + err = sock->ops->setsockopt(sock, level, optname, optval, + optlen); + return err; +} + +static inline void drbd_tcp_cork(struct socket *sock) +{ + int __user val = 1; + (void) drbd_setsockopt(sock, SOL_TCP, TCP_CORK, + (char __user *)&val, sizeof(val)); +} + +static inline void drbd_tcp_uncork(struct socket *sock) +{ + int __user val = 0; + (void) drbd_setsockopt(sock, SOL_TCP, TCP_CORK, + (char __user *)&val, sizeof(val)); +} + +static inline void drbd_tcp_nodelay(struct socket *sock) +{ + int __user val = 1; + (void) drbd_setsockopt(sock, SOL_TCP, TCP_NODELAY, + (char __user *)&val, sizeof(val)); +} + +static inline void drbd_tcp_quickack(struct socket *sock) +{ + int __user val = 1; + (void) drbd_setsockopt(sock, SOL_TCP, TCP_QUICKACK, + (char __user *)&val, sizeof(val)); +} + +void drbd_bump_write_ordering(struct drbd_conf *mdev, enum write_ordering_e wo); + +/* drbd_proc.c */ +extern struct proc_dir_entry *drbd_proc; +extern struct file_operations drbd_proc_fops; +extern const char *conns_to_name(enum drbd_conns s); +extern const char *roles_to_name(enum drbd_role s); + +/* drbd_actlog.c */ +extern void drbd_al_begin_io(struct drbd_conf *mdev, sector_t sector); +extern void drbd_al_complete_io(struct drbd_conf *mdev, sector_t sector); +extern void drbd_rs_complete_io(struct drbd_conf *mdev, sector_t sector); +extern int drbd_rs_begin_io(struct drbd_conf *mdev, sector_t sector); +extern int drbd_try_rs_begin_io(struct drbd_conf *mdev, sector_t sector); +extern void drbd_rs_cancel_all(struct drbd_conf *mdev); +extern int drbd_rs_del_all(struct drbd_conf *mdev); +extern void drbd_rs_failed_io(struct drbd_conf *mdev, + sector_t sector, int size); +extern int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *); +extern void __drbd_set_in_sync(struct drbd_conf *mdev, sector_t sector, + int size, const char *file, const unsigned int line); +#define drbd_set_in_sync(mdev, sector, size) \ + __drbd_set_in_sync(mdev, sector, size, __FILE__, __LINE__) +extern void __drbd_set_out_of_sync(struct drbd_conf *mdev, sector_t sector, + int size, const char *file, const unsigned int line); +#define drbd_set_out_of_sync(mdev, sector, size) \ + __drbd_set_out_of_sync(mdev, sector, size, __FILE__, __LINE__) +extern void drbd_al_apply_to_bm(struct drbd_conf *mdev); +extern void drbd_al_to_on_disk_bm(struct drbd_conf *mdev); +extern void drbd_al_shrink(struct drbd_conf *mdev); + + +/* drbd_nl.c */ + +void drbd_nl_cleanup(void); +int __init drbd_nl_init(void); +void drbd_bcast_state(struct drbd_conf *mdev, union drbd_state_t); +void drbd_bcast_sync_progress(struct drbd_conf *mdev); +void drbd_bcast_ee(struct drbd_conf *mdev, + const char *reason, const int dgs, + const char* seen_hash, const char* calc_hash, + const struct Tl_epoch_entry* e); + + +/** DRBD State macros: + * These macros are used to express state changes in easily readable form. + * + * The NS macros expand to a mask and a value, that can be bit ored onto the + * current state as soon as the spinlock (req_lock) was taken. + * + * The _NS macros are used for state functions that get called with the + * spinlock. These macros expand directly to the new state value. + * + * Besides the basic forms NS() and _NS() additional _?NS[23] are defined + * to express state changes that affect more than one aspect of the state. + * + * E.g. NS2(conn, Connected, peer, Secondary) + * Means that the network connection was established and that the peer + * is in secondary role. + */ +#define peer_mask role_mask +#define pdsk_mask disk_mask +#define susp_mask 1 +#define user_isp_mask 1 +#define aftr_isp_mask 1 + +#define NS(T, S) \ + ({ union drbd_state_t mask; mask.i = 0; mask.T = T##_mask; mask; }), \ + ({ union drbd_state_t val; val.i = 0; val.T = (S); val; }) +#define NS2(T1, S1, T2, S2) \ + ({ union drbd_state_t mask; mask.i = 0; mask.T1 = T1##_mask; \ + mask.T2 = T2##_mask; mask; }), \ + ({ union drbd_state_t val; val.i = 0; val.T1 = (S1); \ + val.T2 = (S2); val; }) +#define NS3(T1, S1, T2, S2, T3, S3) \ + ({ union drbd_state_t mask; mask.i = 0; mask.T1 = T1##_mask; \ + mask.T2 = T2##_mask; mask.T3 = T3##_mask; mask; }), \ + ({ union drbd_state_t val; val.i = 0; val.T1 = (S1); \ + val.T2 = (S2); val.T3 = (S3); val; }) + +#define _NS(D, T, S) \ + D, ({ union drbd_state_t __ns; __ns.i = D->state.i; __ns.T = (S); __ns; }) +#define _NS2(D, T1, S1, T2, S2) \ + D, ({ union drbd_state_t __ns; __ns.i = D->state.i; __ns.T1 = (S1); \ + __ns.T2 = (S2); __ns; }) +#define _NS3(D, T1, S1, T2, S2, T3, S3) \ + D, ({ union drbd_state_t __ns; __ns.i = D->state.i; __ns.T1 = (S1); \ + __ns.T2 = (S2); __ns.T3 = (S3); __ns; }) + +/* + * inline helper functions + *************************/ + +static inline void drbd_state_lock(struct drbd_conf *mdev) +{ + wait_event(mdev->misc_wait, + !test_and_set_bit(CLUSTER_ST_CHANGE, &mdev->flags)); +} + +static inline void drbd_state_unlock(struct drbd_conf *mdev) +{ + clear_bit(CLUSTER_ST_CHANGE, &mdev->flags); + wake_up(&mdev->misc_wait); +} + +static inline int _drbd_set_state(struct drbd_conf *mdev, + union drbd_state_t ns, enum chg_state_flags flags, + struct completion *done) +{ + int rv; + + read_lock(&global_state_lock); + rv = __drbd_set_state(mdev, ns, flags, done); + read_unlock(&global_state_lock); + + return rv; +} + +static inline int drbd_request_state(struct drbd_conf *mdev, + union drbd_state_t mask, + union drbd_state_t val) +{ + return _drbd_request_state(mdev, mask, val, ChgStateVerbose + ChgOrdered); +} + +/** + * drbd_chk_io_error: Handles the on_io_error setting, should be called from + * all io completion handlers. See also drbd_io_error(). + */ +static inline void __drbd_chk_io_error(struct drbd_conf *mdev, int forcedetach) +{ + switch (mdev->bc->dc.on_io_error) { + case PassOn: + if (!forcedetach) { + if (printk_ratelimit()) + ERR("Local IO failed. Passing error on...\n"); + break; + } + /* NOTE fall through to detach case if forcedetach set */ + case Detach: + case CallIOEHelper: + if (mdev->state.disk > Failed) { + _drbd_set_state(_NS(mdev, disk, Failed), ChgStateHard, NULL); + ERR("Local IO failed. Detaching...\n"); + } + break; + } +} + +static inline void drbd_chk_io_error(struct drbd_conf *mdev, + int error, int forcedetach) +{ + if (error) { + unsigned long flags; + spin_lock_irqsave(&mdev->req_lock, flags); + __drbd_chk_io_error(mdev, forcedetach); + spin_unlock_irqrestore(&mdev->req_lock, flags); + } +} + +/* Returns the first sector number of our meta data, + * which, for internal meta data, happens to be the maximum capacity + * we could agree upon with our peer + */ +static inline sector_t drbd_md_first_sector(struct drbd_backing_dev *bdev) +{ + switch (bdev->dc.meta_dev_idx) { + case DRBD_MD_INDEX_INTERNAL: + case DRBD_MD_INDEX_FLEX_INT: + return bdev->md.md_offset + bdev->md.bm_offset; + case DRBD_MD_INDEX_FLEX_EXT: + default: + return bdev->md.md_offset; + } +} + +/* returns the last sector number of our meta data, + * to be able to catch out of band md access */ +static inline sector_t drbd_md_last_sector(struct drbd_backing_dev *bdev) +{ + switch (bdev->dc.meta_dev_idx) { + case DRBD_MD_INDEX_INTERNAL: + case DRBD_MD_INDEX_FLEX_INT: + return bdev->md.md_offset + MD_AL_OFFSET - 1; + case DRBD_MD_INDEX_FLEX_EXT: + default: + return bdev->md.md_offset + bdev->md.md_size_sect; + } +} + +/* Returns the number of 512 byte sectors of the device */ +static inline sector_t drbd_get_capacity(struct block_device *bdev) +{ + /* return bdev ? get_capacity(bdev->bd_disk) : 0; */ + return bdev ? bdev->bd_inode->i_size >> 9 : 0; +} + +/* returns the capacity we announce to out peer. + * we clip ourselves at the various MAX_SECTORS, because if we don't, + * current implementation will oops sooner or later */ +static inline sector_t drbd_get_max_capacity(struct drbd_backing_dev *bdev) +{ + sector_t s; + switch (bdev->dc.meta_dev_idx) { + case DRBD_MD_INDEX_INTERNAL: + case DRBD_MD_INDEX_FLEX_INT: + s = drbd_get_capacity(bdev->backing_bdev) + ? min_t(sector_t, DRBD_MAX_SECTORS_FLEX, + drbd_md_first_sector(bdev)) + : 0; + break; + case DRBD_MD_INDEX_FLEX_EXT: + s = min_t(sector_t, DRBD_MAX_SECTORS_FLEX, + drbd_get_capacity(bdev->backing_bdev)); + /* clip at maximum size the meta device can support */ + s = min_t(sector_t, s, + BM_EXT_TO_SECT(bdev->md.md_size_sect + - bdev->md.bm_offset)); + break; + default: + s = min_t(sector_t, DRBD_MAX_SECTORS, + drbd_get_capacity(bdev->backing_bdev)); + } + return s; +} + +/* returns the sector number of our meta data 'super' block */ +static inline sector_t drbd_md_ss__(struct drbd_conf *mdev, + struct drbd_backing_dev *bdev) +{ + switch (bdev->dc.meta_dev_idx) { + default: /* external, some index */ + return MD_RESERVED_SECT * bdev->dc.meta_dev_idx; + case DRBD_MD_INDEX_INTERNAL: + /* with drbd08, internal meta data is always "flexible" */ + case DRBD_MD_INDEX_FLEX_INT: + /* sizeof(struct md_on_disk_07) == 4k + * position: last 4k aligned block of 4k size */ + if (!bdev->backing_bdev) { + if (__ratelimit(&drbd_ratelimit_state)) { + ERR("bdev->backing_bdev==NULL\n"); + dump_stack(); + } + return 0; + } + return (drbd_get_capacity(bdev->backing_bdev) & ~7ULL) + - MD_AL_OFFSET; + case DRBD_MD_INDEX_FLEX_EXT: + return 0; + } +} + +static inline void +_drbd_queue_work(struct drbd_work_queue *q, struct drbd_work *w) +{ + list_add_tail(&w->list, &q->q); + up(&q->s); +} + +static inline void +drbd_queue_work_front(struct drbd_work_queue *q, struct drbd_work *w) +{ + unsigned long flags; + spin_lock_irqsave(&q->q_lock, flags); + list_add(&w->list, &q->q); + up(&q->s); /* within the spinlock, + see comment near end of drbd_worker() */ + spin_unlock_irqrestore(&q->q_lock, flags); +} + +static inline void +drbd_queue_work(struct drbd_work_queue *q, struct drbd_work *w) +{ + unsigned long flags; + spin_lock_irqsave(&q->q_lock, flags); + list_add_tail(&w->list, &q->q); + up(&q->s); /* within the spinlock, + see comment near end of drbd_worker() */ + spin_unlock_irqrestore(&q->q_lock, flags); +} + +static inline void wake_asender(struct drbd_conf *mdev) +{ + if (test_bit(SIGNAL_ASENDER, &mdev->flags)) + force_sig(DRBD_SIG, mdev->asender.task); +} + +static inline void request_ping(struct drbd_conf *mdev) +{ + set_bit(SEND_PING, &mdev->flags); + wake_asender(mdev); +} + +static inline int drbd_send_short_cmd(struct drbd_conf *mdev, + enum Drbd_Packet_Cmd cmd) +{ + struct Drbd_Header h; + return drbd_send_cmd(mdev, USE_DATA_SOCKET, cmd, &h, sizeof(h)); +} + +static inline int drbd_send_ping(struct drbd_conf *mdev) +{ + struct Drbd_Header h; + return drbd_send_cmd(mdev, USE_META_SOCKET, Ping, &h, sizeof(h)); +} + +static inline int drbd_send_ping_ack(struct drbd_conf *mdev) +{ + struct Drbd_Header h; + return drbd_send_cmd(mdev, USE_META_SOCKET, PingAck, &h, sizeof(h)); +} + +static inline void drbd_thread_stop(struct Drbd_thread *thi) +{ + _drbd_thread_stop(thi, FALSE, TRUE); +} + +static inline void drbd_thread_stop_nowait(struct Drbd_thread *thi) +{ + _drbd_thread_stop(thi, FALSE, FALSE); +} + +static inline void drbd_thread_restart_nowait(struct Drbd_thread *thi) +{ + _drbd_thread_stop(thi, TRUE, FALSE); +} + +/* counts how many answer packets packets we expect from our peer, + * for either explicit application requests, + * or implicit barrier packets as necessary. + * increased: + * w_send_barrier + * _req_mod(req, queue_for_net_write or queue_for_net_read); + * it is much easier and equally valid to count what we queue for the + * worker, even before it actually was queued or send. + * (drbd_make_request_common; recovery path on read io-error) + * decreased: + * got_BarrierAck (respective tl_clear, tl_clear_barrier) + * _req_mod(req, data_received) + * [from receive_DataReply] + * _req_mod(req, write_acked_by_peer or recv_acked_by_peer or neg_acked) + * [from got_BlockAck (WriteAck, RecvAck)] + * for some reason it is NOT decreased in got_NegAck, + * but in the resulting cleanup code from report_params. + * we should try to remember the reason for that... + * _req_mod(req, send_failed or send_canceled) + * _req_mod(req, connection_lost_while_pending) + * [from tl_clear_barrier] + */ +static inline void inc_ap_pending(struct drbd_conf *mdev) +{ + atomic_inc(&mdev->ap_pending_cnt); +} + +#define ERR_IF_CNT_IS_NEGATIVE(which) \ + if (atomic_read(&mdev->which) < 0) \ + ERR("in %s:%d: " #which " = %d < 0 !\n", \ + __func__ , __LINE__ , \ + atomic_read(&mdev->which)) + +#define dec_ap_pending(mdev) do { \ + typecheck(struct drbd_conf *, mdev); \ + if (atomic_dec_and_test(&mdev->ap_pending_cnt)) \ + wake_up(&mdev->misc_wait); \ + ERR_IF_CNT_IS_NEGATIVE(ap_pending_cnt); } while (0) + +/* counts how many resync-related answers we still expect from the peer + * increase decrease + * SyncTarget sends RSDataRequest (and expects RSDataReply) + * SyncSource sends RSDataReply (and expects WriteAck whith ID_SYNCER) + * (or NegAck with ID_SYNCER) + */ +static inline void inc_rs_pending(struct drbd_conf *mdev) +{ + atomic_inc(&mdev->rs_pending_cnt); +} + +#define dec_rs_pending(mdev) do { \ + typecheck(struct drbd_conf *, mdev); \ + atomic_dec(&mdev->rs_pending_cnt); \ + ERR_IF_CNT_IS_NEGATIVE(rs_pending_cnt); } while (0) + +/* counts how many answers we still need to send to the peer. + * increased on + * receive_Data unless protocol A; + * we need to send a RecvAck (proto B) + * or WriteAck (proto C) + * receive_RSDataReply (recv_resync_read) we need to send a WriteAck + * receive_DataRequest (receive_RSDataRequest) we need to send back Data + * receive_Barrier_* we need to send a BarrierAck + */ +static inline void inc_unacked(struct drbd_conf *mdev) +{ + atomic_inc(&mdev->unacked_cnt); +} + +#define dec_unacked(mdev) do { \ + typecheck(struct drbd_conf *, mdev); \ + atomic_dec(&mdev->unacked_cnt); \ + ERR_IF_CNT_IS_NEGATIVE(unacked_cnt); } while (0) + +#define sub_unacked(mdev, n) do { \ + typecheck(struct drbd_conf *, mdev); \ + atomic_sub(n, &mdev->unacked_cnt); \ + ERR_IF_CNT_IS_NEGATIVE(unacked_cnt); } while (0) + + +static inline void dec_net(struct drbd_conf *mdev) +{ + if (atomic_dec_and_test(&mdev->net_cnt)) + wake_up(&mdev->misc_wait); +} + +/** + * inc_net: Returns TRUE when it is ok to access mdev->net_conf. You + * should call dec_net() when finished looking at mdev->net_conf. + */ +static inline int inc_net(struct drbd_conf *mdev) +{ + int have_net_conf; + + atomic_inc(&mdev->net_cnt); + have_net_conf = mdev->state.conn >= Unconnected; + if (!have_net_conf) + dec_net(mdev); + return have_net_conf; +} + +/** + * inc_local: Returns TRUE when local IO is possible. If it returns + * TRUE you should call dec_local() after IO is completed. + */ +#define inc_local_if_state(M,MINS) __cond_lock(local, _inc_local_if_state(M,MINS)) +#define inc_local(M) __cond_lock(local, _inc_local_if_state(M,Inconsistent)) + +static inline void dec_local(struct drbd_conf *mdev) +{ + __release(local); + if (atomic_dec_and_test(&mdev->local_cnt)) + wake_up(&mdev->misc_wait); + D_ASSERT(atomic_read(&mdev->local_cnt) >= 0); +} + +#ifndef __CHECKER__ +static inline int _inc_local_if_state(struct drbd_conf *mdev, enum drbd_disk_state mins) +{ + int io_allowed; + + atomic_inc(&mdev->local_cnt); + io_allowed = (mdev->state.disk >= mins); + if (!io_allowed) + dec_local(mdev); + return io_allowed; +} +#else +extern int _inc_local_if_state(struct drbd_conf *mdev, enum drbd_disk_state mins); +#endif + +/* you must have an "inc_local" reference */ +static inline void drbd_get_syncer_progress(struct drbd_conf *mdev, + unsigned long *bits_left, unsigned int *per_mil_done) +{ + /* + * this is to break it at compile time when we change that + * (we may feel 4TB maximum storage per drbd is not enough) + */ + typecheck(unsigned long, mdev->rs_total); + + /* note: both rs_total and rs_left are in bits, i.e. in + * units of BM_BLOCK_SIZE. + * for the percentage, we don't care. */ + + *bits_left = drbd_bm_total_weight(mdev) - mdev->rs_failed; + /* >> 10 to prevent overflow, + * +1 to prevent division by zero */ + if (*bits_left > mdev->rs_total) { + /* doh. maybe a logic bug somewhere. + * may also be just a race condition + * between this and a disconnect during sync. + * for now, just prevent in-kernel buffer overflow. + */ + smp_rmb(); + drbd_WARN("cs:%s rs_left=%lu > rs_total=%lu (rs_failed %lu)\n", + conns_to_name(mdev->state.conn), + *bits_left, mdev->rs_total, mdev->rs_failed); + *per_mil_done = 0; + } else { + /* make sure the calculation happens in long context */ + unsigned long tmp = 1000UL - + (*bits_left >> 10)*1000UL + / ((mdev->rs_total >> 10) + 1UL); + *per_mil_done = tmp; + } +} + + +/* this throttles on-the-fly application requests + * according to max_buffers settings; + * maybe re-implement using semaphores? */ +static inline int drbd_get_max_buffers(struct drbd_conf *mdev) +{ + int mxb = 1000000; /* arbitrary limit on open requests */ + if (inc_net(mdev)) { + mxb = mdev->net_conf->max_buffers; + dec_net(mdev); + } + return mxb; +} + +static inline int drbd_state_is_stable(union drbd_state_t s) +{ + + /* DO NOT add a default clause, we want the compiler to warn us + * for any newly introduced state we may have forgotten to add here */ + + switch ((enum drbd_conns)s.conn) { + /* new io only accepted when there is no connection, ... */ + case StandAlone: + case WFConnection: + /* ... or there is a well established connection. */ + case Connected: + case SyncSource: + case SyncTarget: + case VerifyS: + case VerifyT: + case PausedSyncS: + case PausedSyncT: + /* maybe stable, look at the disk state */ + break; + + /* no new io accepted during tansitional states + * like handshake or teardown */ + case Disconnecting: + case Unconnected: + case Timeout: + case BrokenPipe: + case NetworkFailure: + case ProtocolError: + case TearDown: + case WFReportParams: + case StartingSyncS: + case StartingSyncT: + case WFBitMapS: + case WFBitMapT: + case WFSyncUUID: + case conn_mask: + /* not "stable" */ + return 0; + } + + switch ((enum drbd_disk_state)s.disk) { + case Diskless: + case Inconsistent: + case Outdated: + case Consistent: + case UpToDate: + /* disk state is stable as well. */ + break; + + /* no new io accepted during tansitional states */ + case Attaching: + case Failed: + case Negotiating: + case DUnknown: + case disk_mask: + /* not "stable" */ + return 0; + } + + return 1; +} + +static inline int __inc_ap_bio_cond(struct drbd_conf *mdev) +{ + int mxb = drbd_get_max_buffers(mdev); + + if (mdev->state.susp) + return 0; + if (test_bit(SUSPEND_IO, &mdev->flags)) + return 0; + + /* to avoid potential deadlock or bitmap corruption, + * in various places, we only allow new application io + * to start during "stable" states. */ + + /* no new io accepted when attaching or detaching the disk */ + if (!drbd_state_is_stable(mdev->state)) + return 0; + + /* since some older kernels don't have atomic_add_unless, + * and we are within the spinlock anyways, we have this workaround. */ + if (atomic_read(&mdev->ap_bio_cnt) > mxb) + return 0; + if (test_bit(BITMAP_IO, &mdev->flags)) + return 0; + return 1; +} + +/* I'd like to use wait_event_lock_irq, + * but I'm not sure when it got introduced, + * and not sure when it has 3 or 4 arguments */ +static inline void inc_ap_bio(struct drbd_conf *mdev, int one_or_two) +{ + /* compare with after_state_ch, + * os.conn != WFBitMapS && ns.conn == WFBitMapS */ + DEFINE_WAIT(wait); + + /* we wait here + * as long as the device is suspended + * until the bitmap is no longer on the fly during connection + * handshake as long as we would exeed the max_buffer limit. + * + * to avoid races with the reconnect code, + * we need to atomic_inc within the spinlock. */ + + spin_lock_irq(&mdev->req_lock); + while (!__inc_ap_bio_cond(mdev)) { + prepare_to_wait(&mdev->misc_wait, &wait, TASK_UNINTERRUPTIBLE); + spin_unlock_irq(&mdev->req_lock); + schedule(); + finish_wait(&mdev->misc_wait, &wait); + spin_lock_irq(&mdev->req_lock); + } + atomic_add(one_or_two, &mdev->ap_bio_cnt); + spin_unlock_irq(&mdev->req_lock); +} + +static inline void dec_ap_bio(struct drbd_conf *mdev) +{ + int mxb = drbd_get_max_buffers(mdev); + int ap_bio = atomic_dec_return(&mdev->ap_bio_cnt); + + D_ASSERT(ap_bio >= 0); + /* this currently does wake_up for every dec_ap_bio! + * maybe rather introduce some type of hysteresis? + * e.g. (ap_bio == mxb/2 || ap_bio == 0) ? */ + if (ap_bio < mxb) + wake_up(&mdev->misc_wait); + if (ap_bio == 0 && test_bit(BITMAP_IO, &mdev->flags)) { + if (!test_and_set_bit(BITMAP_IO_QUEUED, &mdev->flags)) + drbd_queue_work(&mdev->data.work, &mdev->bm_io_work.w); + } +} + +static inline void drbd_set_ed_uuid(struct drbd_conf *mdev, u64 val) +{ + mdev->ed_uuid = val; + + MTRACE(TraceTypeUuid, TraceLvlMetrics, + INFO(" exposed data uuid now %016llX\n", + (unsigned long long)val); + ); +} + +static inline int seq_cmp(u32 a, u32 b) +{ + /* we assume wrap around at 32bit. + * for wrap around at 24bit (old atomic_t), + * we'd have to + * a <<= 8; b <<= 8; + */ + return (s32)(a) - (s32)(b); +} +#define seq_lt(a, b) (seq_cmp((a), (b)) < 0) +#define seq_gt(a, b) (seq_cmp((a), (b)) > 0) +#define seq_ge(a, b) (seq_cmp((a), (b)) >= 0) +#define seq_le(a, b) (seq_cmp((a), (b)) <= 0) +/* CAUTION: please no side effects in arguments! */ +#define seq_max(a, b) ((u32)(seq_gt((a), (b)) ? (a) : (b))) + +static inline void update_peer_seq(struct drbd_conf *mdev, unsigned int new_seq) +{ + unsigned int m; + spin_lock(&mdev->peer_seq_lock); + m = seq_max(mdev->peer_seq, new_seq); + mdev->peer_seq = m; + spin_unlock(&mdev->peer_seq_lock); + if (m == new_seq) + wake_up(&mdev->seq_wait); +} + +static inline void drbd_update_congested(struct drbd_conf *mdev) +{ + struct sock *sk = mdev->data.socket->sk; + if (sk->sk_wmem_queued > sk->sk_sndbuf * 4 / 5) + set_bit(NET_CONGESTED, &mdev->flags); +} + +static inline int drbd_queue_order_type(struct drbd_conf *mdev) +{ + /* sorry, we currently have no working implementation + * of distributed TCQ stuff */ +#ifndef QUEUE_ORDERED_NONE +#define QUEUE_ORDERED_NONE 0 +#endif + return QUEUE_ORDERED_NONE; +} + +static inline void drbd_blk_run_queue(struct request_queue *q) +{ + if (q && q->unplug_fn) + q->unplug_fn(q); +} + +static inline void drbd_kick_lo(struct drbd_conf *mdev) +{ + if (inc_local(mdev)) { + drbd_blk_run_queue(bdev_get_queue(mdev->bc->backing_bdev)); + dec_local(mdev); + } +} + +static inline void drbd_md_flush(struct drbd_conf *mdev) +{ + int r; + + if (test_bit(MD_NO_BARRIER, &mdev->flags)) + return; + + r = blkdev_issue_flush(mdev->bc->md_bdev, NULL); + if (r) { + set_bit(MD_NO_BARRIER, &mdev->flags); + ERR("meta data flush failed with status %d, disabling md-flushes\n", r); + } +} + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_strings.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_strings.c @@ -0,0 +1,115 @@ +/* + drbd.h + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2003-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2003-2008, Philipp Reisner . + Copyright (C) 2003-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + +*/ + +#include + +static const char *drbd_conn_s_names[] = { + [StandAlone] = "StandAlone", + [Disconnecting] = "Disconnecting", + [Unconnected] = "Unconnected", + [Timeout] = "Timeout", + [BrokenPipe] = "BrokenPipe", + [NetworkFailure] = "NetworkFailure", + [ProtocolError] = "ProtocolError", + [WFConnection] = "WFConnection", + [WFReportParams] = "WFReportParams", + [TearDown] = "TearDown", + [Connected] = "Connected", + [StartingSyncS] = "StartingSyncS", + [StartingSyncT] = "StartingSyncT", + [WFBitMapS] = "WFBitMapS", + [WFBitMapT] = "WFBitMapT", + [WFSyncUUID] = "WFSyncUUID", + [SyncSource] = "SyncSource", + [SyncTarget] = "SyncTarget", + [VerifyS] = "VerifyS", + [VerifyT] = "VerifyT", + [PausedSyncS] = "PausedSyncS", + [PausedSyncT] = "PausedSyncT" +}; + +static const char *drbd_role_s_names[] = { + [Primary] = "Primary", + [Secondary] = "Secondary", + [Unknown] = "Unknown" +}; + +static const char *drbd_disk_s_names[] = { + [Diskless] = "Diskless", + [Attaching] = "Attaching", + [Failed] = "Failed", + [Negotiating] = "Negotiating", + [Inconsistent] = "Inconsistent", + [Outdated] = "Outdated", + [DUnknown] = "DUnknown", + [Consistent] = "Consistent", + [UpToDate] = "UpToDate", +}; + +static const char *drbd_state_sw_errors[] = { + [-SS_TwoPrimaries] = "Multiple primaries not allowed by config", + [-SS_NoUpToDateDisk] = + "Refusing to be Primary without at least one UpToDate disk", + [-SS_BothInconsistent] = "Refusing to be inconsistent on both nodes", + [-SS_SyncingDiskless] = "Refusing to be syncing and diskless", + [-SS_ConnectedOutdates] = "Refusing to be Outdated while Connected", + [-SS_PrimaryNOP] = "Refusing to be Primary while peer is not outdated", + [-SS_ResyncRunning] = "Can not start OV/resync since it is already active", + [-SS_AlreadyStandAlone] = "Can not disconnect a StandAlone device", + [-SS_CW_FailedByPeer] = "State changed was refused by peer node", + [-SS_IsDiskLess] = + "Device is diskless, the requesed operation requires a disk", + [-SS_DeviceInUse] = "Device is held open by someone", + [-SS_NoNetConfig] = "Have no net/connection configuration", + [-SS_NoVerifyAlg] = "Need a verify algorithm to start online verify", + [-SS_NeedConnection] = "Need a connection to start verify or resync", + [-SS_NotSupported] = "Peer does not support protocol", + [-SS_LowerThanOutdated] = "Disk state is lower than outdated", + [-SS_InTransientState] = "In transient state, retry after next state change", + [-SS_ConcurrentStChg] = "Concurrent state changes detected and aborted", +}; + +const char *conns_to_name(enum drbd_conns s) +{ + /* enums are unsigned... */ + return s > PausedSyncT ? "TOO_LARGE" : drbd_conn_s_names[s]; +} + +const char *roles_to_name(enum drbd_role s) +{ + return s > Secondary ? "TOO_LARGE" : drbd_role_s_names[s]; +} + +const char *disks_to_name(enum drbd_disk_state s) +{ + return s > UpToDate ? "TOO_LARGE" : drbd_disk_s_names[s]; +} + +const char *set_st_err_name(enum set_st_err err) +{ + return err <= SS_AfterLastError ? "TOO_SMALL" : + err > SS_TwoPrimaries ? "TOO_LARGE" + : drbd_state_sw_errors[-err]; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/Makefile @@ -0,0 +1,6 @@ +EXTRA_CFLAGS += -I$(src) +drbd-y := drbd_buildtag.o drbd_bitmap.o drbd_proc.o +drbd-y += drbd_worker.o drbd_receiver.o drbd_req.o drbd_actlog.o +drbd-y += lru_cache.o drbd_main.o drbd_strings.o drbd_nl.o + +obj-$(CONFIG_BLK_DEV_DRBD) += drbd.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_actlog.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_actlog.c @@ -0,0 +1,1473 @@ +/* + drbd_actlog.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2003-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2003-2008, Philipp Reisner . + Copyright (C) 2003-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include +#include "drbd_int.h" +#include "drbd_wrappers.h" + +/* I do not believe that all storage medias can guarantee atomic + * 512 byte write operations. When the journal is read, only + * transactions with correct xor_sums are considered. + * sizeof() = 512 byte */ +struct __attribute__((packed)) al_transaction { + u32 magic; + u32 tr_number; + struct __attribute__((packed)) { + u32 pos; + u32 extent; } updates[1 + AL_EXTENTS_PT]; + u32 xor_sum; +}; + +struct update_odbm_work { + struct drbd_work w; + unsigned int enr; +}; + +struct update_al_work { + struct drbd_work w; + struct lc_element *al_ext; + struct completion event; + unsigned int enr; + /* if old_enr != LC_FREE, write corresponding bitmap sector, too */ + unsigned int old_enr; +}; + +struct drbd_atodb_wait { + atomic_t count; + struct completion io_done; + struct drbd_conf *mdev; + int error; +}; + + +int w_al_write_transaction(struct drbd_conf *, struct drbd_work *, int); + +STATIC int _drbd_md_sync_page_io(struct drbd_conf *mdev, + struct drbd_backing_dev *bdev, + struct page *page, sector_t sector, + int rw, int size) +{ + struct bio *bio; + struct drbd_md_io md_io; + int ok; + + md_io.mdev = mdev; + init_completion(&md_io.event); + md_io.error = 0; + + if (rw == WRITE && !test_bit(MD_NO_BARRIER, &mdev->flags)) + rw |= (1<bi_bdev = bdev->md_bdev; + bio->bi_sector = sector; + ok = (bio_add_page(bio, page, size, 0) == size); + if (!ok) + goto out; + bio->bi_private = &md_io; + bio->bi_end_io = drbd_md_io_complete; + bio->bi_rw = rw; + + dump_internal_bio("Md", mdev, bio, 0); + + if (FAULT_ACTIVE(mdev, (rw & WRITE) ? DRBD_FAULT_MD_WR : DRBD_FAULT_MD_RD)) + bio_endio(bio, -EIO); + else + submit_bio(rw, bio); + wait_for_completion(&md_io.event); + ok = bio_flagged(bio, BIO_UPTODATE) && md_io.error == 0; + + /* check for unsupported barrier op. + * would rather check on EOPNOTSUPP, but that is not reliable. + * don't try again for ANY return value != 0 */ + if (unlikely(bio_barrier(bio) && !ok)) { + /* Try again with no barrier */ + drbd_WARN("Barriers not supported on meta data device - disabling\n"); + set_bit(MD_NO_BARRIER, &mdev->flags); + rw &= ~(1 << BIO_RW_BARRIER); + bio_put(bio); + goto retry; + } + out: + bio_put(bio); + return ok; +} + +int drbd_md_sync_page_io(struct drbd_conf *mdev, struct drbd_backing_dev *bdev, + sector_t sector, int rw) +{ + int hardsect, mask, ok; + int offset = 0; + struct page *iop = mdev->md_io_page; + + D_ASSERT(mutex_is_locked(&mdev->md_io_mutex)); + + BUG_ON(!bdev->md_bdev); + + hardsect = drbd_get_hardsect(bdev->md_bdev); + if (hardsect == 0) + hardsect = MD_HARDSECT; + + /* in case hardsect != 512 [ s390 only? ] */ + if (hardsect != MD_HARDSECT) { + mask = (hardsect / MD_HARDSECT) - 1; + D_ASSERT(mask == 1 || mask == 3 || mask == 7); + D_ASSERT(hardsect == (mask+1) * MD_HARDSECT); + offset = sector & mask; + sector = sector & ~mask; + iop = mdev->md_io_tmpp; + + if (rw == WRITE) { + void *p = page_address(mdev->md_io_page); + void *hp = page_address(mdev->md_io_tmpp); + + ok = _drbd_md_sync_page_io(mdev, bdev, iop, + sector, READ, hardsect); + + if (unlikely(!ok)) { + ERR("drbd_md_sync_page_io(,%llus," + "READ [hardsect!=512]) failed!\n", + (unsigned long long)sector); + return 0; + } + + memcpy(hp + offset*MD_HARDSECT , p, MD_HARDSECT); + } + } + + if (sector < drbd_md_first_sector(bdev) || + sector > drbd_md_last_sector(bdev)) + ALERT("%s [%d]:%s(,%llus,%s) out of range md access!\n", + current->comm, current->pid, __func__, + (unsigned long long)sector, rw ? "WRITE" : "READ"); + + ok = _drbd_md_sync_page_io(mdev, bdev, iop, sector, rw, hardsect); + if (unlikely(!ok)) { + ERR("drbd_md_sync_page_io(,%llus,%s) failed!\n", + (unsigned long long)sector, rw ? "WRITE" : "READ"); + return 0; + } + + if (hardsect != MD_HARDSECT && rw == READ) { + void *p = page_address(mdev->md_io_page); + void *hp = page_address(mdev->md_io_tmpp); + + memcpy(p, hp + offset*MD_HARDSECT, MD_HARDSECT); + } + + return ok; +} + +static inline +struct lc_element *_al_get(struct drbd_conf *mdev, unsigned int enr) +{ + struct lc_element *al_ext; + struct bm_extent *bm_ext; + unsigned long al_flags = 0; + + spin_lock_irq(&mdev->al_lock); + bm_ext = (struct bm_extent *) + lc_find(mdev->resync, enr/AL_EXT_PER_BM_SECT); + if (unlikely(bm_ext != NULL)) { + if (test_bit(BME_NO_WRITES, &bm_ext->flags)) { + spin_unlock_irq(&mdev->al_lock); + return NULL; + } + } + al_ext = lc_get(mdev->act_log, enr); + al_flags = mdev->act_log->flags; + spin_unlock_irq(&mdev->al_lock); + + /* + if (!al_ext) { + if (al_flags & LC_STARVING) + drbd_WARN("Have to wait for LRU element (AL too small?)\n"); + if (al_flags & LC_DIRTY) + drbd_WARN("Ongoing AL update (AL device too slow?)\n"); + } + */ + + return al_ext; +} + +void drbd_al_begin_io(struct drbd_conf *mdev, sector_t sector) +{ + unsigned int enr = (sector >> (AL_EXTENT_SIZE_B-9)); + struct lc_element *al_ext; + struct update_al_work al_work; + + D_ASSERT(atomic_read(&mdev->local_cnt) > 0); + + MTRACE(TraceTypeALExts, TraceLvlMetrics, + INFO("al_begin_io( sec=%llus (al_enr=%u) (rs_enr=%d) )\n", + (unsigned long long) sector, enr, + (int)BM_SECT_TO_EXT(sector)); + ); + + wait_event(mdev->al_wait, (al_ext = _al_get(mdev, enr))); + + if (al_ext->lc_number != enr) { + /* drbd_al_write_transaction(mdev,al_ext,enr); + generic_make_request() are serialized on the + current->bio_tail list now. Therefore we have + to deligate writing something to AL to the + worker thread. */ + init_completion(&al_work.event); + al_work.al_ext = al_ext; + al_work.enr = enr; + al_work.old_enr = al_ext->lc_number; + al_work.w.cb = w_al_write_transaction; + drbd_queue_work_front(&mdev->data.work, &al_work.w); + wait_for_completion(&al_work.event); + + mdev->al_writ_cnt++; + + spin_lock_irq(&mdev->al_lock); + lc_changed(mdev->act_log, al_ext); + spin_unlock_irq(&mdev->al_lock); + wake_up(&mdev->al_wait); + } +} + +void drbd_al_complete_io(struct drbd_conf *mdev, sector_t sector) +{ + unsigned int enr = (sector >> (AL_EXTENT_SIZE_B-9)); + struct lc_element *extent; + unsigned long flags; + + MTRACE(TraceTypeALExts, TraceLvlMetrics, + INFO("al_complete_io( sec=%llus (al_enr=%u) (rs_enr=%d) )\n", + (unsigned long long) sector, enr, + (int)BM_SECT_TO_EXT(sector)); + ); + + spin_lock_irqsave(&mdev->al_lock, flags); + + extent = lc_find(mdev->act_log, enr); + + if (!extent) { + spin_unlock_irqrestore(&mdev->al_lock, flags); + ERR("al_complete_io() called on inactive extent %u\n", enr); + return; + } + + if (lc_put(mdev->act_log, extent) == 0) + wake_up(&mdev->al_wait); + + spin_unlock_irqrestore(&mdev->al_lock, flags); +} + +int +w_al_write_transaction(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct update_al_work *aw = (struct update_al_work *)w; + struct lc_element *updated = aw->al_ext; + const unsigned int new_enr = aw->enr; + const unsigned int evicted = aw->old_enr; + + struct al_transaction *buffer; + sector_t sector; + int i, n, mx; + unsigned int extent_nr; + u32 xor_sum = 0; + + if (!inc_local(mdev)) { + ERR("inc_local() failed in w_al_write_transaction\n"); + complete(&((struct update_al_work *)w)->event); + return 1; + } + /* do we have to do a bitmap write, first? + * TODO reduce maximum latency: + * submit both bios, then wait for both, + * instead of doing two synchronous sector writes. */ + if (mdev->state.conn < Connected && evicted != LC_FREE) + drbd_bm_write_sect(mdev, evicted/AL_EXT_PER_BM_SECT); + + mutex_lock(&mdev->md_io_mutex); /* protects md_io_page, al_tr_cycle, ... */ + buffer = (struct al_transaction *)page_address(mdev->md_io_page); + + buffer->magic = __constant_cpu_to_be32(DRBD_MAGIC); + buffer->tr_number = cpu_to_be32(mdev->al_tr_number); + + n = lc_index_of(mdev->act_log, updated); + + buffer->updates[0].pos = cpu_to_be32(n); + buffer->updates[0].extent = cpu_to_be32(new_enr); + + xor_sum ^= new_enr; + + mx = min_t(int, AL_EXTENTS_PT, + mdev->act_log->nr_elements - mdev->al_tr_cycle); + for (i = 0; i < mx; i++) { + extent_nr = lc_entry(mdev->act_log, + mdev->al_tr_cycle+i)->lc_number; + buffer->updates[i+1].pos = cpu_to_be32(mdev->al_tr_cycle+i); + buffer->updates[i+1].extent = cpu_to_be32(extent_nr); + xor_sum ^= extent_nr; + } + for (; i < AL_EXTENTS_PT; i++) { + buffer->updates[i+1].pos = __constant_cpu_to_be32(-1); + buffer->updates[i+1].extent = __constant_cpu_to_be32(LC_FREE); + xor_sum ^= LC_FREE; + } + mdev->al_tr_cycle += AL_EXTENTS_PT; + if (mdev->al_tr_cycle >= mdev->act_log->nr_elements) + mdev->al_tr_cycle = 0; + + buffer->xor_sum = cpu_to_be32(xor_sum); + + sector = mdev->bc->md.md_offset + + mdev->bc->md.al_offset + mdev->al_tr_pos; + + if (!drbd_md_sync_page_io(mdev, mdev->bc, sector, WRITE)) { + drbd_chk_io_error(mdev, 1, TRUE); + drbd_io_error(mdev, TRUE); + } + + if (++mdev->al_tr_pos > + div_ceil(mdev->act_log->nr_elements, AL_EXTENTS_PT)) + mdev->al_tr_pos = 0; + + D_ASSERT(mdev->al_tr_pos < MD_AL_MAX_SIZE); + mdev->al_tr_number++; + + mutex_unlock(&mdev->md_io_mutex); + + complete(&((struct update_al_work *)w)->event); + dec_local(mdev); + + return 1; +} + +/** + * drbd_al_read_tr: Reads a single transaction record form the + * on disk activity log. + * Returns -1 on IO error, 0 on checksum error and 1 if it is a valid + * record. + */ +STATIC int drbd_al_read_tr(struct drbd_conf *mdev, + struct drbd_backing_dev *bdev, + struct al_transaction *b, + int index) +{ + sector_t sector; + int rv, i; + u32 xor_sum = 0; + + sector = bdev->md.md_offset + bdev->md.al_offset + index; + + /* Dont process error normally, + * as this is done before disk is atached! */ + if (!drbd_md_sync_page_io(mdev, bdev, sector, READ)) + return -1; + + rv = (be32_to_cpu(b->magic) == DRBD_MAGIC); + + for (i = 0; i < AL_EXTENTS_PT + 1; i++) + xor_sum ^= be32_to_cpu(b->updates[i].extent); + rv &= (xor_sum == be32_to_cpu(b->xor_sum)); + + return rv; +} + +/** + * drbd_al_read_log: Restores the activity log from its on disk + * representation. Returns 1 on success, returns 0 when + * reading the log failed due to IO errors. + */ +int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *bdev) +{ + struct al_transaction *buffer; + int i; + int rv; + int mx; + int cnr; + int active_extents = 0; + int transactions = 0; + int overflow = 0; + int from = -1; + int to = -1; + u32 from_tnr = -1; + u32 to_tnr = 0; + + mx = div_ceil(mdev->act_log->nr_elements, AL_EXTENTS_PT); + + /* lock out all other meta data io for now, + * and make sure the page is mapped. + */ + mutex_lock(&mdev->md_io_mutex); + buffer = page_address(mdev->md_io_page); + + /* Find the valid transaction in the log */ + for (i = 0; i <= mx; i++) { + rv = drbd_al_read_tr(mdev, bdev, buffer, i); + if (rv == 0) + continue; + if (rv == -1) { + mutex_unlock(&mdev->md_io_mutex); + return 0; + } + cnr = be32_to_cpu(buffer->tr_number); + + if (cnr == -1) + overflow = 1; + + if (cnr < from_tnr && !overflow) { + from = i; + from_tnr = cnr; + } + if (cnr > to_tnr) { + to = i; + to_tnr = cnr; + } + } + + if (from == -1 || to == -1) { + drbd_WARN("No usable activity log found.\n"); + + mutex_unlock(&mdev->md_io_mutex); + return 1; + } + + /* Read the valid transactions. + * INFO("Reading from %d to %d.\n",from,to); */ + i = from; + while (1) { + int j, pos; + unsigned int extent_nr; + unsigned int trn; + + rv = drbd_al_read_tr(mdev, bdev, buffer, i); + ERR_IF(rv == 0) goto cancel; + if (rv == -1) { + mutex_unlock(&mdev->md_io_mutex); + return 0; + } + + trn = be32_to_cpu(buffer->tr_number); + + spin_lock_irq(&mdev->al_lock); + + /* This loop runs backwards because in the cyclic + elements there might be an old version of the + updated element (in slot 0). So the element in slot 0 + can overwrite old versions. */ + for (j = AL_EXTENTS_PT; j >= 0; j--) { + pos = be32_to_cpu(buffer->updates[j].pos); + extent_nr = be32_to_cpu(buffer->updates[j].extent); + + if (extent_nr == LC_FREE) + continue; + + lc_set(mdev->act_log, extent_nr, pos); + active_extents++; + } + spin_unlock_irq(&mdev->al_lock); + + transactions++; + +cancel: + if (i == to) + break; + i++; + if (i > mx) + i = 0; + } + + mdev->al_tr_number = to_tnr+1; + mdev->al_tr_pos = to; + if (++mdev->al_tr_pos > + div_ceil(mdev->act_log->nr_elements, AL_EXTENTS_PT)) + mdev->al_tr_pos = 0; + + /* ok, we are done with it */ + mutex_unlock(&mdev->md_io_mutex); + + INFO("Found %d transactions (%d active extents) in activity log.\n", + transactions, active_extents); + + return 1; +} + +STATIC void atodb_endio(struct bio *bio, int error) +{ + struct drbd_atodb_wait *wc = bio->bi_private; + struct drbd_conf *mdev = wc->mdev; + struct page *page; + int uptodate = bio_flagged(bio, BIO_UPTODATE); + + /* strange behaviour of some lower level drivers... + * fail the request by clearing the uptodate flag, + * but do not return any error?! */ + if (!error && !uptodate) + error = -EIO; + + /* corresponding drbd_io_error is in drbd_al_to_on_disk_bm */ + drbd_chk_io_error(mdev, error, TRUE); + if (error && wc->error == 0) + wc->error = error; + + if (atomic_dec_and_test(&wc->count)) + complete(&wc->io_done); + + page = bio->bi_io_vec[0].bv_page; + put_page(page); + bio_put(bio); + mdev->bm_writ_cnt++; + dec_local(mdev); +} + +#define S2W(s) ((s)<<(BM_EXT_SIZE_B-BM_BLOCK_SIZE_B-LN2_BPL)) +/* activity log to on disk bitmap -- prepare bio unless that sector + * is already covered by previously prepared bios */ +STATIC int atodb_prepare_unless_covered(struct drbd_conf *mdev, + struct bio **bios, + unsigned int enr, + struct drbd_atodb_wait *wc) __must_hold(local) +{ + struct bio *bio; + struct page *page; + sector_t on_disk_sector = enr + mdev->bc->md.md_offset + + mdev->bc->md.bm_offset; + unsigned int page_offset = PAGE_SIZE; + int offset; + int i = 0; + int err = -ENOMEM; + + /* Check if that enr is already covered by an already created bio. + * Caution, bios[] is not NULL terminated, + * but only initialized to all NULL. + * For completely scattered activity log, + * the last invocation iterates over all bios, + * and finds the last NULL entry. + */ + while ((bio = bios[i])) { + if (bio->bi_sector == on_disk_sector) + return 0; + i++; + } + /* bios[i] == NULL, the next not yet used slot */ + + bio = bio_alloc(GFP_KERNEL, 1); + if (bio == NULL) + return -ENOMEM; + + if (i > 0) { + const struct bio_vec *prev_bv = bios[i-1]->bi_io_vec; + page_offset = prev_bv->bv_offset + prev_bv->bv_len; + page = prev_bv->bv_page; + } + if (page_offset == PAGE_SIZE) { + page = alloc_page(__GFP_HIGHMEM); + if (page == NULL) + goto out_bio_put; + page_offset = 0; + } else { + get_page(page); + } + + offset = S2W(enr); + drbd_bm_get_lel(mdev, offset, + min_t(size_t, S2W(1), drbd_bm_words(mdev) - offset), + kmap(page) + page_offset); + kunmap(page); + + bio->bi_private = wc; + bio->bi_end_io = atodb_endio; + bio->bi_bdev = mdev->bc->md_bdev; + bio->bi_sector = on_disk_sector; + + if (bio_add_page(bio, page, MD_HARDSECT, page_offset) != MD_HARDSECT) + goto out_put_page; + + atomic_inc(&wc->count); + /* we already know that we may do this... + * inc_local_if_state(mdev,Attaching); + * just get the extra reference, so that the local_cnt reflects + * the number of pending IO requests DRBD at its backing device. + */ + atomic_inc(&mdev->local_cnt); + + bios[i] = bio; + + return 0; + +out_put_page: + err = -EINVAL; + put_page(page); +out_bio_put: + bio_put(bio); + return err; +} + +/** + * drbd_al_to_on_disk_bm: + * Writes the areas of the bitmap which are covered by the AL. + * called when we detach (unconfigure) local storage, + * or when we go from Primary to Secondary state. + */ +void drbd_al_to_on_disk_bm(struct drbd_conf *mdev) +{ + int i, nr_elements; + unsigned int enr; + struct bio **bios; + struct drbd_atodb_wait wc; + + ERR_IF (!inc_local_if_state(mdev, Attaching)) + return; /* sorry, I don't have any act_log etc... */ + + wait_event(mdev->al_wait, lc_try_lock(mdev->act_log)); + + nr_elements = mdev->act_log->nr_elements; + + bios = kzalloc(sizeof(struct bio *) * nr_elements, GFP_KERNEL); + if (!bios) + goto submit_one_by_one; + + atomic_set(&wc.count, 0); + init_completion(&wc.io_done); + wc.mdev = mdev; + wc.error = 0; + + for (i = 0; i < nr_elements; i++) { + enr = lc_entry(mdev->act_log, i)->lc_number; + if (enr == LC_FREE) + continue; + /* next statement also does atomic_inc wc.count and local_cnt */ + if (atodb_prepare_unless_covered(mdev, bios, + enr/AL_EXT_PER_BM_SECT, + &wc)) + goto free_bios_submit_one_by_one; + } + + /* unneccessary optimization? */ + lc_unlock(mdev->act_log); + wake_up(&mdev->al_wait); + + /* all prepared, submit them */ + for (i = 0; i < nr_elements; i++) { + if (bios[i] == NULL) + break; + if (FAULT_ACTIVE(mdev, DRBD_FAULT_MD_WR)) { + bios[i]->bi_rw = WRITE; + bio_endio(bios[i], -EIO); + } else { + submit_bio(WRITE, bios[i]); + } + } + + drbd_blk_run_queue(bdev_get_queue(mdev->bc->md_bdev)); + + /* always (try to) flush bitmap to stable storage */ + drbd_md_flush(mdev); + + /* In case we did not submit a single IO do not wait for + * them to complete. ( Because we would wait forever here. ) + * + * In case we had IOs and they are already complete, there + * is not point in waiting anyways. + * Therefore this if () ... */ + if (atomic_read(&wc.count)) + wait_for_completion(&wc.io_done); + + dec_local(mdev); + + if (wc.error) + drbd_io_error(mdev, TRUE); + kfree(bios); + return; + + free_bios_submit_one_by_one: + /* free everything by calling the endio callback directly. */ + for (i = 0; i < nr_elements && bios[i]; i++) + bio_endio(bios[i], 0); + + kfree(bios); + + submit_one_by_one: + drbd_WARN("Using the slow drbd_al_to_on_disk_bm()\n"); + + for (i = 0; i < mdev->act_log->nr_elements; i++) { + enr = lc_entry(mdev->act_log, i)->lc_number; + if (enr == LC_FREE) + continue; + /* Really slow: if we have al-extents 16..19 active, + * sector 4 will be written four times! Synchronous! */ + drbd_bm_write_sect(mdev, enr/AL_EXT_PER_BM_SECT); + } + + lc_unlock(mdev->act_log); + wake_up(&mdev->al_wait); + dec_local(mdev); +} + +/** + * drbd_al_apply_to_bm: Sets the bits in the bitmap that are described + * by the active extents of the AL. + */ +void drbd_al_apply_to_bm(struct drbd_conf *mdev) +{ + unsigned int enr; + unsigned long add = 0; + char ppb[10]; + int i; + + wait_event(mdev->al_wait, lc_try_lock(mdev->act_log)); + + for (i = 0; i < mdev->act_log->nr_elements; i++) { + enr = lc_entry(mdev->act_log, i)->lc_number; + if (enr == LC_FREE) + continue; + add += drbd_bm_ALe_set_all(mdev, enr); + } + + lc_unlock(mdev->act_log); + wake_up(&mdev->al_wait); + + INFO("Marked additional %s as out-of-sync based on AL.\n", + ppsize(ppb, Bit2KB(add))); +} + +static inline int _try_lc_del(struct drbd_conf *mdev, struct lc_element *al_ext) +{ + int rv; + + spin_lock_irq(&mdev->al_lock); + rv = (al_ext->refcnt == 0); + if (likely(rv)) + lc_del(mdev->act_log, al_ext); + spin_unlock_irq(&mdev->al_lock); + + MTRACE(TraceTypeALExts, TraceLvlMetrics, + if (unlikely(!rv)) + INFO("Waiting for extent in drbd_al_shrink()\n"); + ); + + return rv; +} + +/** + * drbd_al_shrink: Removes all active extents form the AL. (but does not + * write any transactions) + * You need to lock mdev->act_log with lc_try_lock() / lc_unlock() + */ +void drbd_al_shrink(struct drbd_conf *mdev) +{ + struct lc_element *al_ext; + int i; + + D_ASSERT(test_bit(__LC_DIRTY, &mdev->act_log->flags)); + + for (i = 0; i < mdev->act_log->nr_elements; i++) { + al_ext = lc_entry(mdev->act_log, i); + if (al_ext->lc_number == LC_FREE) + continue; + wait_event(mdev->al_wait, _try_lc_del(mdev, al_ext)); + } + + wake_up(&mdev->al_wait); +} + +STATIC int w_update_odbm(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct update_odbm_work *udw = (struct update_odbm_work *)w; + + if (!inc_local(mdev)) { + if (__ratelimit(&drbd_ratelimit_state)) + drbd_WARN("Can not update on disk bitmap, local IO disabled.\n"); + return 1; + } + + drbd_bm_write_sect(mdev, udw->enr); + dec_local(mdev); + + kfree(udw); + + if (drbd_bm_total_weight(mdev) <= mdev->rs_failed) { + switch (mdev->state.conn) { + case SyncSource: case SyncTarget: + case PausedSyncS: case PausedSyncT: + drbd_resync_finished(mdev); + default: + /* nothing to do */ + break; + } + } + drbd_bcast_sync_progress(mdev); + + return 1; +} + + +/* ATTENTION. The AL's extents are 4MB each, while the extents in the + * resync LRU-cache are 16MB each. + * The caller of this function has to hold an inc_local() reference. + * + * TODO will be obsoleted once we have a caching lru of the on disk bitmap + */ +STATIC void drbd_try_clear_on_disk_bm(struct drbd_conf *mdev, sector_t sector, + int count, int success) +{ + struct bm_extent *ext; + struct update_odbm_work *udw; + + unsigned int enr; + + D_ASSERT(atomic_read(&mdev->local_cnt)); + + /* I simply assume that a sector/size pair never crosses + * a 16 MB extent border. (Currently this is true...) */ + enr = BM_SECT_TO_EXT(sector); + + ext = (struct bm_extent *) lc_get(mdev->resync, enr); + if (ext) { + if (ext->lce.lc_number == enr) { + if (success) + ext->rs_left -= count; + else + ext->rs_failed += count; + if (ext->rs_left < ext->rs_failed) { + ERR("BAD! sector=%llus enr=%u rs_left=%d " + "rs_failed=%d count=%d\n", + (unsigned long long)sector, + ext->lce.lc_number, ext->rs_left, + ext->rs_failed, count); + dump_stack(); + + lc_put(mdev->resync, &ext->lce); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return; + } + } else { + /* Normally this element should be in the cache, + * since drbd_rs_begin_io() pulled it already in. + * + * But maybe an application write finished, and we set + * something outside the resync lru_cache in sync. + */ + int rs_left = drbd_bm_e_weight(mdev, enr); + if (ext->flags != 0) { + drbd_WARN("changing resync lce: %d[%u;%02lx]" + " -> %d[%u;00]\n", + ext->lce.lc_number, ext->rs_left, + ext->flags, enr, rs_left); + ext->flags = 0; + } + if (ext->rs_failed) { + drbd_WARN("Kicking resync_lru element enr=%u " + "out with rs_failed=%d\n", + ext->lce.lc_number, ext->rs_failed); + set_bit(WRITE_BM_AFTER_RESYNC, &mdev->flags); + } + ext->rs_left = rs_left; + ext->rs_failed = success ? 0 : count; + lc_changed(mdev->resync, &ext->lce); + } + lc_put(mdev->resync, &ext->lce); + /* no race, we are within the al_lock! */ + + if (ext->rs_left == ext->rs_failed) { + ext->rs_failed = 0; + + udw = kmalloc(sizeof(*udw), GFP_ATOMIC); + if (udw) { + udw->enr = ext->lce.lc_number; + udw->w.cb = w_update_odbm; + drbd_queue_work_front(&mdev->data.work, &udw->w); + } else { + drbd_WARN("Could not kmalloc an udw\n"); + set_bit(WRITE_BM_AFTER_RESYNC, &mdev->flags); + } + } + } else { + ERR("lc_get() failed! locked=%d/%d flags=%lu\n", + mdev->resync_locked, + mdev->resync->nr_elements, + mdev->resync->flags); + } +} + +/* clear the bit corresponding to the piece of storage in question: + * size byte of data starting from sector. Only clear a bits of the affected + * one ore more _aligned_ BM_BLOCK_SIZE blocks. + * + * called by worker on SyncTarget and receiver on SyncSource. + * + */ +void __drbd_set_in_sync(struct drbd_conf *mdev, sector_t sector, int size, + const char *file, const unsigned int line) +{ + /* Is called from worker and receiver context _only_ */ + unsigned long sbnr, ebnr, lbnr; + unsigned long count = 0; + sector_t esector, nr_sectors; + int wake_up = 0; + unsigned long flags; + + if (size <= 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_SEGMENT_SIZE) { + ERR("drbd_set_in_sync: sector=%llus size=%d nonsense!\n", + (unsigned long long)sector, size); + return; + } + nr_sectors = drbd_get_capacity(mdev->this_bdev); + esector = sector + (size >> 9) - 1; + + ERR_IF(sector >= nr_sectors) return; + ERR_IF(esector >= nr_sectors) esector = (nr_sectors-1); + + lbnr = BM_SECT_TO_BIT(nr_sectors-1); + + /* we clear it (in sync). + * round up start sector, round down end sector. we make sure we only + * clear full, alligned, BM_BLOCK_SIZE (4K) blocks */ + if (unlikely(esector < BM_SECT_PER_BIT-1)) + return; + if (unlikely(esector == (nr_sectors-1))) + ebnr = lbnr; + else + ebnr = BM_SECT_TO_BIT(esector - (BM_SECT_PER_BIT-1)); + sbnr = BM_SECT_TO_BIT(sector + BM_SECT_PER_BIT-1); + + MTRACE(TraceTypeResync, TraceLvlMetrics, + INFO("drbd_set_in_sync: sector=%llus size=%u sbnr=%lu ebnr=%lu\n", + (unsigned long long)sector, size, sbnr, ebnr); + ); + + if (sbnr > ebnr) + return; + + /* + * ok, (capacity & 7) != 0 sometimes, but who cares... + * we count rs_{total,left} in bits, not sectors. + */ + spin_lock_irqsave(&mdev->al_lock, flags); + count = drbd_bm_clear_bits(mdev, sbnr, ebnr); + if (count) { + /* we need the lock for drbd_try_clear_on_disk_bm */ + if (jiffies - mdev->rs_mark_time > HZ*10) { + /* should be roling marks, + * but we estimate only anyways. */ + if (mdev->rs_mark_left != drbd_bm_total_weight(mdev) && + mdev->state.conn != PausedSyncT && + mdev->state.conn != PausedSyncS) { + mdev->rs_mark_time = jiffies; + mdev->rs_mark_left = drbd_bm_total_weight(mdev); + } + } + if (inc_local(mdev)) { + drbd_try_clear_on_disk_bm(mdev, sector, count, TRUE); + dec_local(mdev); + } + /* just wake_up unconditional now, various lc_chaged(), + * lc_put() in drbd_try_clear_on_disk_bm(). */ + wake_up = 1; + } + spin_unlock_irqrestore(&mdev->al_lock, flags); + if (wake_up) + wake_up(&mdev->al_wait); +} + +/* + * this is intended to set one request worth of data out of sync. + * affects at least 1 bit, + * and at most 1+DRBD_MAX_SEGMENT_SIZE/BM_BLOCK_SIZE bits. + * + * called by tl_clear and drbd_send_dblock (==drbd_make_request). + * so this can be _any_ process. + */ +void __drbd_set_out_of_sync(struct drbd_conf *mdev, sector_t sector, int size, + const char *file, const unsigned int line) +{ + unsigned long sbnr, ebnr, lbnr, flags; + sector_t esector, nr_sectors; + unsigned int enr, count; + struct bm_extent *ext; + + if (size <= 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_SEGMENT_SIZE) { + ERR("sector: %llus, size: %d\n", + (unsigned long long)sector, size); + return; + } + + if (!inc_local(mdev)) + return; /* no disk, no metadata, no bitmap to set bits in */ + + nr_sectors = drbd_get_capacity(mdev->this_bdev); + esector = sector + (size >> 9) - 1; + + ERR_IF(sector >= nr_sectors) + goto out; + ERR_IF(esector >= nr_sectors) + esector = (nr_sectors-1); + + lbnr = BM_SECT_TO_BIT(nr_sectors-1); + + /* we set it out of sync, + * we do not need to round anything here */ + sbnr = BM_SECT_TO_BIT(sector); + ebnr = BM_SECT_TO_BIT(esector); + + MTRACE(TraceTypeResync, TraceLvlMetrics, + INFO("drbd_set_out_of_sync: sector=%llus size=%u " + "sbnr=%lu ebnr=%lu\n", + (unsigned long long)sector, size, sbnr, ebnr); + ); + + /* ok, (capacity & 7) != 0 sometimes, but who cares... + * we count rs_{total,left} in bits, not sectors. */ + spin_lock_irqsave(&mdev->al_lock, flags); + count = drbd_bm_set_bits(mdev, sbnr, ebnr); + + enr = BM_SECT_TO_EXT(sector); + ext = (struct bm_extent *) lc_find(mdev->resync, enr); + if (ext) + ext->rs_left += count; + spin_unlock_irqrestore(&mdev->al_lock, flags); + +out: + dec_local(mdev); +} + +static inline +struct bm_extent *_bme_get(struct drbd_conf *mdev, unsigned int enr) +{ + struct bm_extent *bm_ext; + int wakeup = 0; + unsigned long rs_flags; + + spin_lock_irq(&mdev->al_lock); + if (mdev->resync_locked > mdev->resync->nr_elements/2) { + spin_unlock_irq(&mdev->al_lock); + return NULL; + } + bm_ext = (struct bm_extent *) lc_get(mdev->resync, enr); + if (bm_ext) { + if (bm_ext->lce.lc_number != enr) { + bm_ext->rs_left = drbd_bm_e_weight(mdev, enr); + bm_ext->rs_failed = 0; + lc_changed(mdev->resync, (struct lc_element *)bm_ext); + wakeup = 1; + } + if (bm_ext->lce.refcnt == 1) + mdev->resync_locked++; + set_bit(BME_NO_WRITES, &bm_ext->flags); + } + rs_flags = mdev->resync->flags; + spin_unlock_irq(&mdev->al_lock); + if (wakeup) + wake_up(&mdev->al_wait); + + if (!bm_ext) { + if (rs_flags & LC_STARVING) + drbd_WARN("Have to wait for element" + " (resync LRU too small?)\n"); + BUG_ON(rs_flags & LC_DIRTY); + } + + return bm_ext; +} + +static inline int _is_in_al(struct drbd_conf *mdev, unsigned int enr) +{ + struct lc_element *al_ext; + int rv = 0; + + spin_lock_irq(&mdev->al_lock); + if (unlikely(enr == mdev->act_log->new_number)) + rv = 1; + else { + al_ext = lc_find(mdev->act_log, enr); + if (al_ext) { + if (al_ext->refcnt) + rv = 1; + } + } + spin_unlock_irq(&mdev->al_lock); + + /* + if (unlikely(rv)) { + INFO("Delaying sync read until app's write is done\n"); + } + */ + return rv; +} + +/** + * drbd_rs_begin_io: Gets an extent in the resync LRU cache and sets it + * to BME_LOCKED. + * + * @sector: The sector number + * + * sleeps on al_wait. + * returns 1 if successful. + * returns 0 if interrupted. + */ +int drbd_rs_begin_io(struct drbd_conf *mdev, sector_t sector) +{ + unsigned int enr = BM_SECT_TO_EXT(sector); + struct bm_extent *bm_ext; + int i, sig; + + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("drbd_rs_begin_io: sector=%llus (rs_end=%d)\n", + (unsigned long long)sector, enr); + ); + + sig = wait_event_interruptible(mdev->al_wait, + (bm_ext = _bme_get(mdev, enr))); + if (sig) + return 0; + + if (test_bit(BME_LOCKED, &bm_ext->flags)) + return 1; + + for (i = 0; i < AL_EXT_PER_BM_SECT; i++) { + sig = wait_event_interruptible(mdev->al_wait, + !_is_in_al(mdev, enr * AL_EXT_PER_BM_SECT + i)); + if (sig) { + spin_lock_irq(&mdev->al_lock); + if (lc_put(mdev->resync, &bm_ext->lce) == 0) { + clear_bit(BME_NO_WRITES, &bm_ext->flags); + mdev->resync_locked--; + wake_up(&mdev->al_wait); + } + spin_unlock_irq(&mdev->al_lock); + return 0; + } + } + + set_bit(BME_LOCKED, &bm_ext->flags); + + return 1; +} + +/** + * drbd_try_rs_begin_io: Gets an extent in the resync LRU cache, sets it + * to BME_NO_WRITES, then tries to set it to BME_LOCKED. + * + * @sector: The sector number + * + * does not sleep. + * returns zero if we could set BME_LOCKED and can proceed, + * -EAGAIN if we need to try again. + */ +int drbd_try_rs_begin_io(struct drbd_conf *mdev, sector_t sector) +{ + unsigned int enr = BM_SECT_TO_EXT(sector); + const unsigned int al_enr = enr*AL_EXT_PER_BM_SECT; + struct bm_extent *bm_ext; + int i; + + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("drbd_try_rs_begin_io: sector=%llus\n", + (unsigned long long)sector); + ); + + spin_lock_irq(&mdev->al_lock); + if (mdev->resync_wenr != LC_FREE && mdev->resync_wenr != enr) { + /* in case you have very heavy scattered io, it may + * stall the syncer undefined if we giveup the ref count + * when we try again and requeue. + * + * if we don't give up the refcount, but the next time + * we are scheduled this extent has been "synced" by new + * application writes, we'd miss the lc_put on the + * extent we keept the refcount on. + * so we remembered which extent we had to try agin, and + * if the next requested one is something else, we do + * the lc_put here... + * we also have to wake_up + */ + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("dropping %u, aparently got 'synced' " + "by application io\n", mdev->resync_wenr); + ); + bm_ext = (struct bm_extent *) + lc_find(mdev->resync, mdev->resync_wenr); + if (bm_ext) { + D_ASSERT(!test_bit(BME_LOCKED, &bm_ext->flags)); + D_ASSERT(test_bit(BME_NO_WRITES, &bm_ext->flags)); + clear_bit(BME_NO_WRITES, &bm_ext->flags); + mdev->resync_wenr = LC_FREE; + if (lc_put(mdev->resync, &bm_ext->lce) == 0) + mdev->resync_locked--; + wake_up(&mdev->al_wait); + } else { + ALERT("LOGIC BUG\n"); + } + } + bm_ext = (struct bm_extent *)lc_try_get(mdev->resync, enr); + if (bm_ext) { + if (test_bit(BME_LOCKED, &bm_ext->flags)) + goto proceed; + if (!test_and_set_bit(BME_NO_WRITES, &bm_ext->flags)) { + mdev->resync_locked++; + } else { + /* we did set the BME_NO_WRITES, + * but then could not set BME_LOCKED, + * so we tried again. + * drop the extra reference. */ + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("dropping extra reference on %u\n", enr); + ); + bm_ext->lce.refcnt--; + D_ASSERT(bm_ext->lce.refcnt > 0); + } + goto check_al; + } else { + if (mdev->resync_locked > mdev->resync->nr_elements-3) { + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("resync_locked = %u!\n", mdev->resync_locked); + ); + goto try_again; + } + bm_ext = (struct bm_extent *)lc_get(mdev->resync, enr); + if (!bm_ext) { + const unsigned long rs_flags = mdev->resync->flags; + if (rs_flags & LC_STARVING) + drbd_WARN("Have to wait for element" + " (resync LRU too small?)\n"); + BUG_ON(rs_flags & LC_DIRTY); + goto try_again; + } + if (bm_ext->lce.lc_number != enr) { + bm_ext->rs_left = drbd_bm_e_weight(mdev, enr); + bm_ext->rs_failed = 0; + lc_changed(mdev->resync, (struct lc_element *)bm_ext); + wake_up(&mdev->al_wait); + D_ASSERT(test_bit(BME_LOCKED, &bm_ext->flags) == 0); + } + set_bit(BME_NO_WRITES, &bm_ext->flags); + D_ASSERT(bm_ext->lce.refcnt == 1); + mdev->resync_locked++; + goto check_al; + } +check_al: + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("checking al for %u\n", enr); + ); + for (i = 0; i < AL_EXT_PER_BM_SECT; i++) { + if (unlikely(al_enr+i == mdev->act_log->new_number)) + goto try_again; + if (lc_is_used(mdev->act_log, al_enr+i)) + goto try_again; + } + set_bit(BME_LOCKED, &bm_ext->flags); +proceed: + mdev->resync_wenr = LC_FREE; + spin_unlock_irq(&mdev->al_lock); + return 0; + +try_again: + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("need to try again for %u\n", enr); + ); + if (bm_ext) + mdev->resync_wenr = enr; + spin_unlock_irq(&mdev->al_lock); + return -EAGAIN; +} + +void drbd_rs_complete_io(struct drbd_conf *mdev, sector_t sector) +{ + unsigned int enr = BM_SECT_TO_EXT(sector); + struct bm_extent *bm_ext; + unsigned long flags; + + MTRACE(TraceTypeResync, TraceLvlAll, + INFO("drbd_rs_complete_io: sector=%llus (rs_enr=%d)\n", + (long long)sector, enr); + ); + + spin_lock_irqsave(&mdev->al_lock, flags); + bm_ext = (struct bm_extent *) lc_find(mdev->resync, enr); + if (!bm_ext) { + spin_unlock_irqrestore(&mdev->al_lock, flags); + ERR("drbd_rs_complete_io() called, but extent not found\n"); + return; + } + + if (bm_ext->lce.refcnt == 0) { + spin_unlock_irqrestore(&mdev->al_lock, flags); + ERR("drbd_rs_complete_io(,%llu [=%u]) called, " + "but refcnt is 0!?\n", + (unsigned long long)sector, enr); + return; + } + + if (lc_put(mdev->resync, (struct lc_element *)bm_ext) == 0) { + clear_bit(BME_LOCKED, &bm_ext->flags); + clear_bit(BME_NO_WRITES, &bm_ext->flags); + mdev->resync_locked--; + wake_up(&mdev->al_wait); + } + + spin_unlock_irqrestore(&mdev->al_lock, flags); +} + +/** + * drbd_rs_cancel_all: Removes extents from the resync LRU. Even + * if they are BME_LOCKED. + */ +void drbd_rs_cancel_all(struct drbd_conf *mdev) +{ + MTRACE(TraceTypeResync, TraceLvlMetrics, + INFO("drbd_rs_cancel_all\n"); + ); + + spin_lock_irq(&mdev->al_lock); + + if (inc_local_if_state(mdev, Failed)) { /* Makes sure ->resync is there. */ + lc_reset(mdev->resync); + dec_local(mdev); + } + mdev->resync_locked = 0; + mdev->resync_wenr = LC_FREE; + spin_unlock_irq(&mdev->al_lock); + wake_up(&mdev->al_wait); +} + +/** + * drbd_rs_del_all: Gracefully remove all extents from the resync LRU. + * there may be still a reference hold by someone. In that case this function + * returns -EAGAIN. + * In case all elements got removed it returns zero. + */ +int drbd_rs_del_all(struct drbd_conf *mdev) +{ + struct bm_extent *bm_ext; + int i; + + MTRACE(TraceTypeResync, TraceLvlMetrics, + INFO("drbd_rs_del_all\n"); + ); + + spin_lock_irq(&mdev->al_lock); + + if (inc_local_if_state(mdev, Failed)) { + /* ok, ->resync is there. */ + for (i = 0; i < mdev->resync->nr_elements; i++) { + bm_ext = (struct bm_extent *) lc_entry(mdev->resync, i); + if (bm_ext->lce.lc_number == LC_FREE) + continue; + if (bm_ext->lce.lc_number == mdev->resync_wenr) { + INFO("dropping %u in drbd_rs_del_all, apparently" + " got 'synced' by application io\n", + mdev->resync_wenr); + D_ASSERT(!test_bit(BME_LOCKED, &bm_ext->flags)); + D_ASSERT(test_bit(BME_NO_WRITES, &bm_ext->flags)); + clear_bit(BME_NO_WRITES, &bm_ext->flags); + mdev->resync_wenr = LC_FREE; + lc_put(mdev->resync, &bm_ext->lce); + } + if (bm_ext->lce.refcnt != 0) { + INFO("Retrying drbd_rs_del_all() later. " + "refcnt=%d\n", bm_ext->lce.refcnt); + dec_local(mdev); + spin_unlock_irq(&mdev->al_lock); + return -EAGAIN; + } + D_ASSERT(!test_bit(BME_LOCKED, &bm_ext->flags)); + D_ASSERT(!test_bit(BME_NO_WRITES, &bm_ext->flags)); + lc_del(mdev->resync, &bm_ext->lce); + } + D_ASSERT(mdev->resync->used == 0); + dec_local(mdev); + } + spin_unlock_irq(&mdev->al_lock); + + return 0; +} + +/* Record information on a failure to resync the specified blocks + * + * called on SyncTarget when resync write fails or NegRSDReply received + * + */ +void drbd_rs_failed_io(struct drbd_conf *mdev, sector_t sector, int size) +{ + /* Is called from worker and receiver context _only_ */ + unsigned long sbnr, ebnr, lbnr; + unsigned long count; + sector_t esector, nr_sectors; + int wake_up = 0; + + MTRACE(TraceTypeResync, TraceLvlSummary, + INFO("drbd_rs_failed_io: sector=%llus, size=%u\n", + (unsigned long long)sector, size); + ); + + if (size <= 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_SEGMENT_SIZE) { + ERR("drbd_rs_failed_io: sector=%llus size=%d nonsense!\n", + (unsigned long long)sector, size); + return; + } + nr_sectors = drbd_get_capacity(mdev->this_bdev); + esector = sector + (size >> 9) - 1; + + ERR_IF(sector >= nr_sectors) return; + ERR_IF(esector >= nr_sectors) esector = (nr_sectors-1); + + lbnr = BM_SECT_TO_BIT(nr_sectors-1); + + /* + * round up start sector, round down end sector. we make sure we only + * handle full, alligned, BM_BLOCK_SIZE (4K) blocks */ + if (unlikely(esector < BM_SECT_PER_BIT-1)) + return; + if (unlikely(esector == (nr_sectors-1))) + ebnr = lbnr; + else + ebnr = BM_SECT_TO_BIT(esector - (BM_SECT_PER_BIT-1)); + sbnr = BM_SECT_TO_BIT(sector + BM_SECT_PER_BIT-1); + + if (sbnr > ebnr) + return; + + /* + * ok, (capacity & 7) != 0 sometimes, but who cares... + * we count rs_{total,left} in bits, not sectors. + */ + spin_lock_irq(&mdev->al_lock); + count = drbd_bm_count_bits(mdev, sbnr, ebnr); + if (count) { + mdev->rs_failed += count; + + if (inc_local(mdev)) { + drbd_try_clear_on_disk_bm(mdev, sector, count, FALSE); + dec_local(mdev); + } + + /* just wake_up unconditional now, various lc_chaged(), + * lc_put() in drbd_try_clear_on_disk_bm(). */ + wake_up = 1; + } + spin_unlock_irq(&mdev->al_lock); + if (wake_up) + wake_up(&mdev->al_wait); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_proc.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_proc.c @@ -0,0 +1,271 @@ +/* + drbd_proc.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "drbd_int.h" +#include "lru_cache.h" /* for lc_sprintf_stats */ + +STATIC int drbd_proc_open(struct inode *inode, struct file *file); + + +struct proc_dir_entry *drbd_proc; +struct file_operations drbd_proc_fops = { + .owner = THIS_MODULE, + .open = drbd_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + + +/*lge + * progress bars shamelessly adapted from driver/md/md.c + * output looks like + * [=====>..............] 33.5% (23456/123456) + * finish: 2:20:20 speed: 6,345 (6,456) K/sec + */ +STATIC void drbd_syncer_progress(struct drbd_conf *mdev, struct seq_file *seq) +{ + unsigned long db, dt, dbdt, rt, rs_left; + unsigned int res; + int i, x, y; + + drbd_get_syncer_progress(mdev, &rs_left, &res); + + x = res/50; + y = 20-x; + seq_printf(seq, "\t["); + for (i = 1; i < x; i++) + seq_printf(seq, "="); + seq_printf(seq, ">"); + for (i = 0; i < y; i++) + seq_printf(seq, "."); + seq_printf(seq, "] "); + + seq_printf(seq, "sync'ed:%3u.%u%% ", res / 10, res % 10); + /* if more than 1 GB display in MB */ + if (mdev->rs_total > 0x100000L) + seq_printf(seq, "(%lu/%lu)M\n\t", + (unsigned long) Bit2KB(rs_left >> 10), + (unsigned long) Bit2KB(mdev->rs_total >> 10)); + else + seq_printf(seq, "(%lu/%lu)K\n\t", + (unsigned long) Bit2KB(rs_left), + (unsigned long) Bit2KB(mdev->rs_total)); + + /* see drivers/md/md.c + * We do not want to overflow, so the order of operands and + * the * 100 / 100 trick are important. We do a +1 to be + * safe against division by zero. We only estimate anyway. + * + * dt: time from mark until now + * db: blocks written from mark until now + * rt: remaining time + */ + dt = (jiffies - mdev->rs_mark_time) / HZ; + + if (dt > 20) { + /* if we made no update to rs_mark_time for too long, + * we are stalled. show that. */ + seq_printf(seq, "stalled\n"); + return; + } + + if (!dt) + dt++; + db = mdev->rs_mark_left - rs_left; + rt = (dt * (rs_left / (db/100+1)))/100; /* seconds */ + + seq_printf(seq, "finish: %lu:%02lu:%02lu", + rt / 3600, (rt % 3600) / 60, rt % 60); + + /* current speed average over (SYNC_MARKS * SYNC_MARK_STEP) jiffies */ + dbdt = Bit2KB(db/dt); + if (dbdt > 1000) + seq_printf(seq, " speed: %ld,%03ld", + dbdt/1000, dbdt % 1000); + else + seq_printf(seq, " speed: %ld", dbdt); + + /* mean speed since syncer started + * we do account for PausedSync periods */ + dt = (jiffies - mdev->rs_start - mdev->rs_paused) / HZ; + if (dt <= 0) + dt = 1; + db = mdev->rs_total - rs_left; + dbdt = Bit2KB(db/dt); + if (dbdt > 1000) + seq_printf(seq, " (%ld,%03ld)", + dbdt/1000, dbdt % 1000); + else + seq_printf(seq, " (%ld)", dbdt); + + seq_printf(seq, " K/sec\n"); +} + +#ifdef ENABLE_DYNAMIC_TRACE +STATIC void resync_dump_detail(struct seq_file *seq, struct lc_element *e) +{ + struct bm_extent *bme = (struct bm_extent *)e; + + seq_printf(seq, "%5d %s %s\n", bme->rs_left, + bme->flags & BME_NO_WRITES ? "NO_WRITES" : "---------", + bme->flags & BME_LOCKED ? "LOCKED" : "------" + ); +} +#endif + +STATIC int drbd_seq_show(struct seq_file *seq, void *v) +{ + int i, hole = 0; + const char *sn; + struct drbd_conf *mdev; + + static char write_ordering_chars[] = { + [WO_none] = 'n', + [WO_drain_io] = 'd', + [WO_bdev_flush] = 'f', + [WO_bio_barrier] = 'b', + }; + + seq_printf(seq, "version: " REL_VERSION " (api:%d/proto:%d-%d)\n%s\n", + API_VERSION, PRO_VERSION_MIN, PRO_VERSION_MAX, drbd_buildtag()); + + /* + cs .. connection state + ro .. node role (local/remote) + ds .. disk state (local/remote) + protocol + various flags + ns .. network send + nr .. network receive + dw .. disk write + dr .. disk read + al .. activity log write count + bm .. bitmap update write count + pe .. pending (waiting for ack or data reply) + ua .. unack'd (still need to send ack or data reply) + ap .. application requests accepted, but not yet completed + ep .. number of epochs currently "on the fly", BarrierAck pending + wo .. write ordering mode currently in use + oos .. known out-of-sync kB + */ + + for (i = 0; i < minor_count; i++) { + mdev = minor_to_mdev(i); + if (!mdev) { + hole = 1; + continue; + } + if (hole) { + hole = 0; + seq_printf(seq, "\n"); + } + + sn = conns_to_name(mdev->state.conn); + + if (mdev->state.conn == StandAlone && + mdev->state.disk == Diskless && + mdev->state.role == Secondary) { + seq_printf(seq, "%2d: cs:Unconfigured\n", i); + } else { + seq_printf(seq, + "%2d: cs:%s ro:%s/%s ds:%s/%s %c %c%c%c%c%c\n" + " ns:%u nr:%u dw:%u dr:%u al:%u bm:%u " + "lo:%d pe:%d ua:%d ap:%d ep:%d wo:%c", + i, sn, + roles_to_name(mdev->state.role), + roles_to_name(mdev->state.peer), + disks_to_name(mdev->state.disk), + disks_to_name(mdev->state.pdsk), + (mdev->net_conf == NULL ? ' ' : + (mdev->net_conf->wire_protocol - DRBD_PROT_A+'A')), + mdev->state.susp ? 's' : 'r', + mdev->state.aftr_isp ? 'a' : '-', + mdev->state.peer_isp ? 'p' : '-', + mdev->state.user_isp ? 'u' : '-', + mdev->congestion_reason ?: '-', + mdev->send_cnt/2, + mdev->recv_cnt/2, + mdev->writ_cnt/2, + mdev->read_cnt/2, + mdev->al_writ_cnt, + mdev->bm_writ_cnt, + atomic_read(&mdev->local_cnt), + atomic_read(&mdev->ap_pending_cnt) + + atomic_read(&mdev->rs_pending_cnt), + atomic_read(&mdev->unacked_cnt), + atomic_read(&mdev->ap_bio_cnt), + mdev->epochs, + write_ordering_chars[mdev->write_ordering] + ); + seq_printf(seq, " oos:%lu\n", + Bit2KB(drbd_bm_total_weight(mdev))); + } + if (mdev->state.conn == SyncSource || + mdev->state.conn == SyncTarget) + drbd_syncer_progress(mdev, seq); + + if (mdev->state.conn == VerifyS || mdev->state.conn == VerifyT) + seq_printf(seq, "\t%3d%% %lu/%lu\n", + (int)((mdev->rs_total-mdev->ov_left) / + (mdev->rs_total/100+1)), + mdev->rs_total - mdev->ov_left, + mdev->rs_total); + +#ifdef ENABLE_DYNAMIC_TRACE + if (proc_details >= 1 && inc_local_if_state(mdev, Failed)) { + lc_printf_stats(seq, mdev->resync); + lc_printf_stats(seq, mdev->act_log); + dec_local(mdev); + } + + if (proc_details >= 2) { + if (mdev->resync) { + lc_dump(mdev->resync, seq, "rs_left", + resync_dump_detail); + } + } +#endif + } + + return 0; +} + +STATIC int drbd_proc_open(struct inode *inode, struct file *file) +{ + return single_open(file, drbd_seq_show, PDE(inode)->data); +} + +/* PROC FS stuff end */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_req.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_req.c @@ -0,0 +1,1206 @@ +/* + drbd_req.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + + */ + +#include +#include + +#include +#include +#include "drbd_int.h" +#include "drbd_req.h" + +/* outside of the ifdef + * because of the _print_rq_state(,FIXME) in barrier_acked */ +STATIC void _print_rq_state(struct drbd_request *req, const char *txt) +{ + const unsigned long s = req->rq_state; + struct drbd_conf *mdev = req->mdev; + const int rw = (req->master_bio == NULL || + bio_data_dir(req->master_bio) == WRITE) ? + 'W' : 'R'; + + INFO("%s %p %c L%c%c%cN%c%c%c%c%c %u (%llus +%u) %s\n", + txt, req, rw, + s & RQ_LOCAL_PENDING ? 'p' : '-', + s & RQ_LOCAL_COMPLETED ? 'c' : '-', + s & RQ_LOCAL_OK ? 'o' : '-', + s & RQ_NET_PENDING ? 'p' : '-', + s & RQ_NET_QUEUED ? 'q' : '-', + s & RQ_NET_SENT ? 's' : '-', + s & RQ_NET_DONE ? 'd' : '-', + s & RQ_NET_OK ? 'o' : '-', + req->epoch, + (unsigned long long)req->sector, + req->size, + conns_to_name(mdev->state.conn)); +} + +/* #define VERBOSE_REQUEST_CODE */ +#if defined(VERBOSE_REQUEST_CODE) || defined(ENABLE_DYNAMIC_TRACE) +STATIC void _print_req_mod(struct drbd_request *req, enum drbd_req_event what) +{ + struct drbd_conf *mdev = req->mdev; + const int rw = (req->master_bio == NULL || + bio_data_dir(req->master_bio) == WRITE) ? + 'W' : 'R'; + + static const char *rq_event_names[] = { + [created] = "created", + [to_be_send] = "to_be_send", + [to_be_submitted] = "to_be_submitted", + [queue_for_net_write] = "queue_for_net_write", + [queue_for_net_read] = "queue_for_net_read", + [send_canceled] = "send_canceled", + [send_failed] = "send_failed", + [handed_over_to_network] = "handed_over_to_network", + [connection_lost_while_pending] = + "connection_lost_while_pending", + [recv_acked_by_peer] = "recv_acked_by_peer", + [write_acked_by_peer] = "write_acked_by_peer", + [neg_acked] = "neg_acked", + [conflict_discarded_by_peer] = "conflict_discarded_by_peer", + [barrier_acked] = "barrier_acked", + [data_received] = "data_received", + [read_completed_with_error] = "read_completed_with_error", + [write_completed_with_error] = "write_completed_with_error", + [completed_ok] = "completed_ok", + }; + + INFO("_req_mod(%p %c ,%s)\n", req, rw, rq_event_names[what]); +} + +# ifdef ENABLE_DYNAMIC_TRACE +# define print_rq_state(R, T) \ + MTRACE(TraceTypeRq, TraceLvlMetrics, _print_rq_state(R, T);) +# define print_req_mod(T, W) \ + MTRACE(TraceTypeRq, TraceLvlMetrics, _print_req_mod(T, W);) +# else +# define print_rq_state(R, T) _print_rq_state(R, T) +# define print_req_mod(T, W) _print_req_mod(T, W) +# endif + +#else +#define print_rq_state(R, T) +#define print_req_mod(T, W) +#endif + +/* Update disk stats at start of I/O request */ +static inline void _drbd_start_io_acct(struct drbd_conf *mdev, struct drbd_request *req, struct bio *bio) +{ + const int rw = bio_data_dir(bio); + int cpu; + cpu = part_stat_lock(); + part_stat_inc(cpu, &mdev->vdisk->part0, ios[rw]); + part_stat_add(cpu, &mdev->vdisk->part0, sectors[rw], bio_sectors(bio)); + part_stat_unlock(); + mdev->vdisk->part0.in_flight++; +} + +/* Update disk stats when completing request upwards */ +static inline void _drbd_end_io_acct(struct drbd_conf *mdev, struct drbd_request *req) +{ + int rw = bio_data_dir(req->master_bio); + unsigned long duration = jiffies - req->start_time; + int cpu; + cpu = part_stat_lock(); + part_stat_add(cpu, &mdev->vdisk->part0, ticks[rw], duration); + part_round_stats(cpu, &mdev->vdisk->part0); + part_stat_unlock(); + mdev->vdisk->part0.in_flight--; +} + +static void _req_is_done(struct drbd_conf *mdev, struct drbd_request *req, const int rw) +{ + const unsigned long s = req->rq_state; + /* if it was a write, we may have to set the corresponding + * bit(s) out-of-sync first. If it had a local part, we need to + * release the reference to the activity log. */ + if (rw == WRITE) { + /* remove it from the transfer log. + * well, only if it had been there in the first + * place... if it had not (local only or conflicting + * and never sent), it should still be "empty" as + * initialised in drbd_req_new(), so we can list_del() it + * here unconditionally */ + list_del(&req->tl_requests); + /* Set out-of-sync unless both OK flags are set + * (local only or remote failed). + * Other places where we set out-of-sync: + * READ with local io-error */ + if (!(s & RQ_NET_OK) || !(s & RQ_LOCAL_OK)) + drbd_set_out_of_sync(mdev, req->sector, req->size); + + if ((s & RQ_NET_OK) && (s & RQ_LOCAL_OK) && (s & RQ_NET_SIS)) + drbd_set_in_sync(mdev, req->sector, req->size); + + /* one might be tempted to move the drbd_al_complete_io + * to the local io completion callback drbd_endio_pri. + * but, if this was a mirror write, we may only + * drbd_al_complete_io after this is RQ_NET_DONE, + * otherwise the extent could be dropped from the al + * before it has actually been written on the peer. + * if we crash before our peer knows about the request, + * but after the extent has been dropped from the al, + * we would forget to resync the corresponding extent. + */ + if (s & RQ_LOCAL_MASK) { + if (inc_local_if_state(mdev, Failed)) { + drbd_al_complete_io(mdev, req->sector); + dec_local(mdev); + } else if (__ratelimit(&drbd_ratelimit_state)) { + drbd_WARN("Should have called drbd_al_complete_io(, %llu), " + "but my Disk seems to have failed :(\n", + (unsigned long long) req->sector); + } + } + } + + /* if it was a local io error, we want to notify our + * peer about that, and see if we need to + * detach the disk and stuff. + * to avoid allocating some special work + * struct, reuse the request. */ + + /* THINK + * why do we do this not when we detect the error, + * but delay it until it is "done", i.e. possibly + * until the next barrier ack? */ + + if (rw == WRITE && + ((s & RQ_LOCAL_MASK) && !(s & RQ_LOCAL_OK))) { + if (!(req->w.list.next == LIST_POISON1 || + list_empty(&req->w.list))) { + /* DEBUG ASSERT only; if this triggers, we + * probably corrupt the worker list here */ + DUMPP(req->w.list.next); + DUMPP(req->w.list.prev); + } + req->w.cb = w_io_error; + drbd_queue_work(&mdev->data.work, &req->w); + /* drbd_req_free() is done in w_io_error */ + } else { + drbd_req_free(req); + } +} + +static void queue_barrier(struct drbd_conf *mdev) +{ + struct drbd_barrier *b; + + /* We are within the req_lock. Once we queued the barrier for sending, + * we set the CREATE_BARRIER bit. It is cleared as soon as a new + * barrier/epoch object is added. This is the only place this bit is + * set. It indicates that the barrier for this epoch is already queued, + * and no new epoch has been created yet. */ + if (test_bit(CREATE_BARRIER, &mdev->flags)) + return; + + b = mdev->newest_barrier; + b->w.cb = w_send_barrier; + /* inc_ap_pending done here, so we won't + * get imbalanced on connection loss. + * dec_ap_pending will be done in got_BarrierAck + * or (on connection loss) in tl_clear. */ + inc_ap_pending(mdev); + drbd_queue_work(&mdev->data.work, &b->w); + set_bit(CREATE_BARRIER, &mdev->flags); +} + +static void _about_to_complete_local_write(struct drbd_conf *mdev, + struct drbd_request *req) +{ + const unsigned long s = req->rq_state; + struct drbd_request *i; + struct Tl_epoch_entry *e; + struct hlist_node *n; + struct hlist_head *slot; + + /* before we can signal completion to the upper layers, + * we may need to close the current epoch */ + if (mdev->state.conn >= Connected && + req->epoch == mdev->newest_barrier->br_number) + queue_barrier(mdev); + + /* we need to do the conflict detection stuff, + * if we have the ee_hash (two_primaries) and + * this has been on the network */ + if ((s & RQ_NET_DONE) && mdev->ee_hash != NULL) { + const sector_t sector = req->sector; + const int size = req->size; + + /* ASSERT: + * there must be no conflicting requests, since + * they must have been failed on the spot */ +#define OVERLAPS overlaps(sector, size, i->sector, i->size) + slot = tl_hash_slot(mdev, sector); + hlist_for_each_entry(i, n, slot, colision) { + if (OVERLAPS) { + ALERT("LOGIC BUG: completed: %p %llus +%u; " + "other: %p %llus +%u\n", + req, (unsigned long long)sector, size, + i, (unsigned long long)i->sector, i->size); + } + } + + /* maybe "wake" those conflicting epoch entries + * that wait for this request to finish. + * + * currently, there can be only _one_ such ee + * (well, or some more, which would be pending + * DiscardAck not yet sent by the asender...), + * since we block the receiver thread upon the + * first conflict detection, which will wait on + * misc_wait. maybe we want to assert that? + * + * anyways, if we found one, + * we just have to do a wake_up. */ +#undef OVERLAPS +#define OVERLAPS overlaps(sector, size, e->sector, e->size) + slot = ee_hash_slot(mdev, req->sector); + hlist_for_each_entry(e, n, slot, colision) { + if (OVERLAPS) { + wake_up(&mdev->misc_wait); + break; + } + } + } +#undef OVERLAPS +} + +static void _complete_master_bio(struct drbd_conf *mdev, + struct drbd_request *req, int error) +{ + dump_bio(mdev, req->master_bio, 1, req); + bio_endio(req->master_bio, error); + req->master_bio = NULL; + dec_ap_bio(mdev); +} + +void _req_may_be_done(struct drbd_request *req, int error) +{ + const unsigned long s = req->rq_state; + struct drbd_conf *mdev = req->mdev; + int rw; + + print_rq_state(req, "_req_may_be_done"); + + /* we must not complete the master bio, while it is + * still being processed by _drbd_send_zc_bio (drbd_send_dblock) + * not yet acknowledged by the peer + * not yet completed by the local io subsystem + * these flags may get cleared in any order by + * the worker, + * the receiver, + * the bio_endio completion callbacks. + */ + if (s & RQ_NET_QUEUED) + return; + if (s & RQ_NET_PENDING) + return; + if (s & RQ_LOCAL_PENDING) + return; + + if (req->master_bio) { + /* this is data_received (remote read) + * or protocol C WriteAck + * or protocol B RecvAck + * or protocol A "handed_over_to_network" (SendAck) + * or canceled or failed, + * or killed from the transfer log due to connection loss. + */ + + /* + * figure out whether to report success or failure. + * + * report success when at least one of the operations suceeded. + * or, to put the other way, + * only report failure, when both operations failed. + * + * what to do about the failures is handled elsewhere. + * what we need to do here is just: complete the master_bio. + */ + int ok = (s & RQ_LOCAL_OK) || (s & RQ_NET_OK); + rw = bio_data_dir(req->master_bio); + + /* remove the request from the conflict detection + * respective block_id verification hash */ + if (!hlist_unhashed(&req->colision)) + hlist_del(&req->colision); + else + D_ASSERT((s & RQ_NET_MASK) == 0); + + /* for writes we need to do some extra housekeeping */ + if (rw == WRITE) + _about_to_complete_local_write(mdev, req); + + /* Update disk stats */ + _drbd_end_io_acct(mdev, req); + + _complete_master_bio(mdev, req, + ok ? 0 : (error ? error : -EIO)); + } else { + /* only WRITE requests can end up here without a master_bio */ + rw = WRITE; + } + + if ((s & RQ_NET_MASK) == 0 || (s & RQ_NET_DONE)) { + /* this is disconnected (local only) operation, + * or protocol C WriteAck, + * or protocol A or B BarrierAck, + * or killed from the transfer log due to connection loss. */ + _req_is_done(mdev, req, rw); + } + /* else: network part and not DONE yet. that is + * protocol A or B, barrier ack still pending... */ +} + +/* + * checks whether there was an overlapping request + * or ee already registered. + * + * if so, return 1, in which case this request is completed on the spot, + * without ever being submitted or send. + * + * return 0 if it is ok to submit this request. + * + * NOTE: + * paranoia: assume something above us is broken, and issues different write + * requests for the same block simultaneously... + * + * To ensure these won't be reordered differently on both nodes, resulting in + * diverging data sets, we discard the later one(s). Not that this is supposed + * to happen, but this is the rationale why we also have to check for + * conflicting requests with local origin, and why we have to do so regardless + * of whether we allowed multiple primaries. + * + * BTW, in case we only have one primary, the ee_hash is empty anyways, and the + * second hlist_for_each_entry becomes a noop. This is even simpler than to + * grab a reference on the net_conf, and check for the two_primaries flag... + */ +STATIC int _req_conflicts(struct drbd_request *req) +{ + struct drbd_conf *mdev = req->mdev; + const sector_t sector = req->sector; + const int size = req->size; + struct drbd_request *i; + struct Tl_epoch_entry *e; + struct hlist_node *n; + struct hlist_head *slot; + + D_ASSERT(hlist_unhashed(&req->colision)); + + if (!inc_net(mdev)) + return 0; + + /* BUG_ON */ + ERR_IF (mdev->tl_hash_s == 0) + goto out_no_conflict; + BUG_ON(mdev->tl_hash == NULL); + +#define OVERLAPS overlaps(i->sector, i->size, sector, size) + slot = tl_hash_slot(mdev, sector); + hlist_for_each_entry(i, n, slot, colision) { + if (OVERLAPS) { + ALERT("%s[%u] Concurrent local write detected! " + "[DISCARD L] new: %llus +%u; " + "pending: %llus +%u\n", + current->comm, current->pid, + (unsigned long long)sector, size, + (unsigned long long)i->sector, i->size); + goto out_conflict; + } + } + + if (mdev->ee_hash_s) { + /* now, check for overlapping requests with remote origin */ + BUG_ON(mdev->ee_hash == NULL); +#undef OVERLAPS +#define OVERLAPS overlaps(e->sector, e->size, sector, size) + slot = ee_hash_slot(mdev, sector); + hlist_for_each_entry(e, n, slot, colision) { + if (OVERLAPS) { + ALERT("%s[%u] Concurrent remote write detected!" + " [DISCARD L] new: %llus +%u; " + "pending: %llus +%u\n", + current->comm, current->pid, + (unsigned long long)sector, size, + (unsigned long long)e->sector, e->size); + goto out_conflict; + } + } + } +#undef OVERLAPS + +out_no_conflict: + /* this is like it should be, and what we expected. + * our users do behave after all... */ + dec_net(mdev); + return 0; + +out_conflict: + dec_net(mdev); + return 1; +} + +/* obviously this could be coded as many single functions + * instead of one huge switch, + * or by putting the code directly in the respective locations + * (as it has been before). + * + * but having it this way + * enforces that it is all in this one place, where it is easier to audit, + * it makes it obvious that whatever "event" "happens" to a request should + * happen "atomically" within the req_lock, + * and it enforces that we have to think in a very structured manner + * about the "events" that may happen to a request during its life time ... + * + * Though I think it is likely that we break this again into many + * static inline void _req_mod_ ## what (req) ... + */ +void _req_mod(struct drbd_request *req, enum drbd_req_event what, int error) +{ + struct drbd_conf *mdev = req->mdev; + + if (error && (bio_rw(req->master_bio) != READA)) + ERR("got an _req_mod() errno of %d\n", error); + + print_req_mod(req, what); + + switch (what) { + default: + ERR("LOGIC BUG in %s:%u\n", __FILE__ , __LINE__); + return; + + /* does not happen... + * initialization done in drbd_req_new + case created: + break; + */ + + case to_be_send: /* via network */ + /* reached via drbd_make_request_common + * and from w_read_retry_remote */ + D_ASSERT(!(req->rq_state & RQ_NET_MASK)); + req->rq_state |= RQ_NET_PENDING; + inc_ap_pending(mdev); + break; + + case to_be_submitted: /* locally */ + /* reached via drbd_make_request_common */ + D_ASSERT(!(req->rq_state & RQ_LOCAL_MASK)); + req->rq_state |= RQ_LOCAL_PENDING; + break; + + case completed_ok: + if (bio_data_dir(req->private_bio) == WRITE) + mdev->writ_cnt += req->size>>9; + else + mdev->read_cnt += req->size>>9; + + bio_put(req->private_bio); + req->private_bio = NULL; + + req->rq_state |= (RQ_LOCAL_COMPLETED|RQ_LOCAL_OK); + req->rq_state &= ~RQ_LOCAL_PENDING; + + _req_may_be_done(req, error); + dec_local(mdev); + break; + + case write_completed_with_error: + req->rq_state |= RQ_LOCAL_COMPLETED; + req->rq_state &= ~RQ_LOCAL_PENDING; + + bio_put(req->private_bio); + req->private_bio = NULL; + ALERT("Local WRITE failed sec=%llus size=%u\n", + (unsigned long long)req->sector, req->size); + /* and now: check how to handle local io error. */ + __drbd_chk_io_error(mdev, FALSE); + _req_may_be_done(req, error); + dec_local(mdev); + break; + + case read_completed_with_error: + if (bio_rw(req->master_bio) != READA) + drbd_set_out_of_sync(mdev, req->sector, req->size); + + req->rq_state |= RQ_LOCAL_COMPLETED; + req->rq_state &= ~RQ_LOCAL_PENDING; + + bio_put(req->private_bio); + req->private_bio = NULL; + if (bio_rw(req->master_bio) == READA) { + /* it is legal to fail READA */ + _req_may_be_done(req, error); + dec_local(mdev); + break; + } + /* else */ + ALERT("Local READ failed sec=%llus size=%u\n", + (unsigned long long)req->sector, req->size); + /* _req_mod(req,to_be_send); oops, recursion in static inline */ + D_ASSERT(!(req->rq_state & RQ_NET_MASK)); + req->rq_state |= RQ_NET_PENDING; + inc_ap_pending(mdev); + + __drbd_chk_io_error(mdev, FALSE); + dec_local(mdev); + /* NOTE: if we have no connection, + * or know the peer has no good data either, + * then we don't actually need to "queue_for_net_read", + * but we do so anyways, since the drbd_io_error() + * and the potential state change to "Diskless" + * needs to be done from process context */ + + /* fall through: _req_mod(req,queue_for_net_read); */ + + case queue_for_net_read: + /* READ or READA, and + * no local disk, + * or target area marked as invalid, + * or just got an io-error. */ + /* from drbd_make_request_common + * or from bio_endio during read io-error recovery */ + + /* so we can verify the handle in the answer packet + * corresponding hlist_del is in _req_may_be_done() */ + hlist_add_head(&req->colision, ar_hash_slot(mdev, req->sector)); + + set_bit(UNPLUG_REMOTE, &mdev->flags); /* why? */ + + D_ASSERT(req->rq_state & RQ_NET_PENDING); + req->rq_state |= RQ_NET_QUEUED; + req->w.cb = (req->rq_state & RQ_LOCAL_MASK) + ? w_read_retry_remote + : w_send_read_req; + drbd_queue_work(&mdev->data.work, &req->w); + break; + + case queue_for_net_write: + /* assert something? */ + /* from drbd_make_request_common only */ + + hlist_add_head(&req->colision, tl_hash_slot(mdev, req->sector)); + /* corresponding hlist_del is in _req_may_be_done() */ + + /* NOTE + * In case the req ended up on the transfer log before being + * queued on the worker, it could lead to this request being + * missed during cleanup after connection loss. + * So we have to do both operations here, + * within the same lock that protects the transfer log. + * + * _req_add_to_epoch(req); this has to be after the + * _maybe_start_new_epoch(req); which happened in + * drbd_make_request_common, because we now may set the bit + * again ourselves to close the current epoch. + * + * Add req to the (now) current epoch (barrier). */ + + /* see drbd_make_request_common, + * just after it grabs the req_lock */ + D_ASSERT(test_bit(CREATE_BARRIER, &mdev->flags) == 0); + + req->epoch = mdev->newest_barrier->br_number; + list_add_tail(&req->tl_requests, + &mdev->newest_barrier->requests); + + /* increment size of current epoch */ + mdev->newest_barrier->n_req++; + + /* queue work item to send data */ + D_ASSERT(req->rq_state & RQ_NET_PENDING); + req->rq_state |= RQ_NET_QUEUED; + req->w.cb = w_send_dblock; + drbd_queue_work(&mdev->data.work, &req->w); + + /* close the epoch, in case it outgrew the limit */ + if (mdev->newest_barrier->n_req >= mdev->net_conf->max_epoch_size) + queue_barrier(mdev); + + break; + + case send_canceled: + /* treat it the same */ + case send_failed: + /* real cleanup will be done from tl_clear. just update flags + * so it is no longer marked as on the worker queue */ + req->rq_state &= ~RQ_NET_QUEUED; + /* if we did it right, tl_clear should be scheduled only after + * this, so this should not be necessary! */ + _req_may_be_done(req, error); + break; + + case handed_over_to_network: + /* assert something? */ + if (bio_data_dir(req->master_bio) == WRITE && + mdev->net_conf->wire_protocol == DRBD_PROT_A) { + /* this is what is dangerous about protocol A: + * pretend it was sucessfully written on the peer. */ + if (req->rq_state & RQ_NET_PENDING) { + dec_ap_pending(mdev); + req->rq_state &= ~RQ_NET_PENDING; + req->rq_state |= RQ_NET_OK; + } /* else: neg-ack was faster... */ + /* it is still not yet RQ_NET_DONE until the + * corresponding epoch barrier got acked as well, + * so we know what to dirty on connection loss */ + } + req->rq_state &= ~RQ_NET_QUEUED; + req->rq_state |= RQ_NET_SENT; + /* because _drbd_send_zc_bio could sleep, and may want to + * dereference the bio even after the "write_acked_by_peer" and + * "completed_ok" events came in, once we return from + * _drbd_send_zc_bio (drbd_send_dblock), we have to check + * whether it is done already, and end it. */ + _req_may_be_done(req, error); + break; + + case connection_lost_while_pending: + /* transfer log cleanup after connection loss */ + /* assert something? */ + if (req->rq_state & RQ_NET_PENDING) + dec_ap_pending(mdev); + req->rq_state &= ~(RQ_NET_OK|RQ_NET_PENDING); + req->rq_state |= RQ_NET_DONE; + /* if it is still queued, we may not complete it here. + * it will be canceled soon. */ + if (!(req->rq_state & RQ_NET_QUEUED)) + _req_may_be_done(req, error); + break; + + case write_acked_by_peer_and_sis: + req->rq_state |= RQ_NET_SIS; + case conflict_discarded_by_peer: + /* for discarded conflicting writes of multiple primarys, + * there is no need to keep anything in the tl, potential + * node crashes are covered by the activity log. */ + req->rq_state |= RQ_NET_DONE; + /* fall through */ + case write_acked_by_peer: + /* protocol C; successfully written on peer. + * Nothing to do here. + * We want to keep the tl in place for all protocols, to cater + * for volatile write-back caches on lower level devices. + * + * A barrier request is expected to have forced all prior + * requests onto stable storage, so completion of a barrier + * request could set NET_DONE right here, and not wait for the + * BarrierAck, but that is an unecessary optimisation. */ + + /* this makes it effectively the same as for: */ + case recv_acked_by_peer: + /* protocol B; pretends to be sucessfully written on peer. + * see also notes above in handed_over_to_network about + * protocol != C */ + req->rq_state |= RQ_NET_OK; + D_ASSERT(req->rq_state & RQ_NET_PENDING); + dec_ap_pending(mdev); + req->rq_state &= ~RQ_NET_PENDING; + _req_may_be_done(req, error); + break; + + case neg_acked: + /* assert something? */ + if (req->rq_state & RQ_NET_PENDING) + dec_ap_pending(mdev); + req->rq_state &= ~(RQ_NET_OK|RQ_NET_PENDING); + + req->rq_state |= RQ_NET_DONE; + _req_may_be_done(req, error); + /* else: done by handed_over_to_network */ + break; + + case barrier_acked: + if (req->rq_state & RQ_NET_PENDING) { + /* barrier came in before all requests have been acked. + * this is bad, because if the connection is lost now, + * we won't be able to clean them up... */ + _print_rq_state(req, + "FIXME (barrier_acked but pending)"); + list_move(&req->tl_requests, &mdev->out_of_sequence_requests); + } + D_ASSERT(req->rq_state & RQ_NET_SENT); + req->rq_state |= RQ_NET_DONE; + _req_may_be_done(req, error); + break; + + case data_received: + D_ASSERT(req->rq_state & RQ_NET_PENDING); + dec_ap_pending(mdev); + req->rq_state &= ~RQ_NET_PENDING; + req->rq_state |= (RQ_NET_OK|RQ_NET_DONE); + _req_may_be_done(req, error); + break; + }; +} + +/* we may do a local read if: + * - we are consistent (of course), + * - or we are generally inconsistent, + * BUT we are still/already IN SYNC for this area. + * since size may be bigger than BM_BLOCK_SIZE, + * we may need to check several bits. + */ +STATIC int drbd_may_do_local_read(struct drbd_conf *mdev, sector_t sector, int size) +{ + unsigned long sbnr, ebnr; + sector_t esector, nr_sectors; + + if (mdev->state.disk == UpToDate) + return 1; + if (mdev->state.disk >= Outdated) + return 0; + if (mdev->state.disk < Inconsistent) + return 0; + /* state.disk == Inconsistent We will have a look at the BitMap */ + nr_sectors = drbd_get_capacity(mdev->this_bdev); + esector = sector + (size >> 9) - 1; + + D_ASSERT(sector < nr_sectors); + D_ASSERT(esector < nr_sectors); + + sbnr = BM_SECT_TO_BIT(sector); + ebnr = BM_SECT_TO_BIT(esector); + + return 0 == drbd_bm_count_bits(mdev, sbnr, ebnr); +} + +STATIC int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio) +{ + const int rw = bio_rw(bio); + const int size = bio->bi_size; + const sector_t sector = bio->bi_sector; + struct drbd_barrier *b = NULL; + struct drbd_request *req; + int local, remote; + int err = -EIO; + + /* allocate outside of all locks; */ + req = drbd_req_new(mdev, bio); + if (!req) { + dec_ap_bio(mdev); + /* only pass the error to the upper layers. + * if user cannot handle io errors, thats not our business. */ + ERR("could not kmalloc() req\n"); + bio_endio(bio, -ENOMEM); + return 0; + } + + dump_bio(mdev, bio, 0, req); + + local = inc_local(mdev); + if (!local) { + bio_put(req->private_bio); /* or we get a bio leak */ + req->private_bio = NULL; + } + if (rw == WRITE) { + remote = 1; + } else { + /* READ || READA */ + if (local) { + if (!drbd_may_do_local_read(mdev, sector, size)) { + /* we could kick the syncer to + * sync this extent asap, wait for + * it, then continue locally. + * Or just issue the request remotely. + */ + local = 0; + bio_put(req->private_bio); + req->private_bio = NULL; + dec_local(mdev); + } + } + remote = !local && mdev->state.pdsk >= UpToDate; + } + + /* If we have a disk, but a READA request is mapped to remote, + * we are Primary, Inconsistent, SyncTarget. + * Just fail that READA request right here. + * + * THINK: maybe fail all READA when not local? + * or make this configurable... + * if network is slow, READA won't do any good. + */ + if (rw == READA && mdev->state.disk >= Inconsistent && !local) { + err = -EWOULDBLOCK; + goto fail_and_free_req; + } + + /* For WRITES going to the local disk, grab a reference on the target + * extent. This waits for any resync activity in the corresponding + * resync extent to finish, and, if necessary, pulls in the target + * extent into the activity log, which involves further disk io because + * of transactional on-disk meta data updates. */ + if (rw == WRITE && local) + drbd_al_begin_io(mdev, sector); + + remote = remote && (mdev->state.pdsk == UpToDate || + (mdev->state.pdsk == Inconsistent && + mdev->state.conn >= Connected)); + + if (!(local || remote)) { + ERR("IO ERROR: neither local nor remote disk\n"); + goto fail_free_complete; + } + + /* For WRITE request, we have to make sure that we have an + * unused_spare_barrier, in case we need to start a new epoch. + * I try to be smart and avoid to pre-allocate always "just in case", + * but there is a race between testing the bit and pointer outside the + * spinlock, and grabbing the spinlock. + * if we lost that race, we retry. */ + if (rw == WRITE && remote && + mdev->unused_spare_barrier == NULL && + test_bit(CREATE_BARRIER, &mdev->flags)) { +allocate_barrier: + b = kmalloc(sizeof(struct drbd_barrier), GFP_NOIO); + if (!b) { + ERR("Failed to alloc barrier.\n"); + err = -ENOMEM; + goto fail_free_complete; + } + } + + /* GOOD, everything prepared, grab the spin_lock */ + spin_lock_irq(&mdev->req_lock); + + if (remote) { + remote = (mdev->state.pdsk == UpToDate || + (mdev->state.pdsk == Inconsistent && + mdev->state.conn >= Connected)); + if (!remote) + drbd_WARN("lost connection while grabbing the req_lock!\n"); + if (!(local || remote)) { + ERR("IO ERROR: neither local nor remote disk\n"); + spin_unlock_irq(&mdev->req_lock); + goto fail_free_complete; + } + } + + if (b && mdev->unused_spare_barrier == NULL) { + mdev->unused_spare_barrier = b; + b = NULL; + } + if (rw == WRITE && remote && + mdev->unused_spare_barrier == NULL && + test_bit(CREATE_BARRIER, &mdev->flags)) { + /* someone closed the current epoch + * while we were grabbing the spinlock */ + spin_unlock_irq(&mdev->req_lock); + goto allocate_barrier; + } + + + /* Update disk stats */ + _drbd_start_io_acct(mdev, req, bio); + + /* _maybe_start_new_epoch(mdev); + * If we need to generate a write barrier packet, we have to add the + * new epoch (barrier) object, and queue the barrier packet for sending, + * and queue the req's data after it _within the same lock_, otherwise + * we have race conditions were the reorder domains could be mixed up. + * + * Even read requests may start a new epoch and queue the corresponding + * barrier packet. To get the write ordering right, we only have to + * make sure that, if this is a write request and it triggered a + * barrier packet, this request is queued within the same spinlock. */ + if (remote && mdev->unused_spare_barrier && + test_and_clear_bit(CREATE_BARRIER, &mdev->flags)) { + _tl_add_barrier(mdev, mdev->unused_spare_barrier); + mdev->unused_spare_barrier = NULL; + } else { + D_ASSERT(!(remote && rw == WRITE && + test_bit(CREATE_BARRIER, &mdev->flags))); + } + + /* NOTE + * Actually, 'local' may be wrong here already, since we may have failed + * to write to the meta data, and may become wrong anytime because of + * local io-error for some other request, which would lead to us + * "detaching" the local disk. + * + * 'remote' may become wrong any time because the network could fail. + * + * This is a harmless race condition, though, since it is handled + * correctly at the appropriate places; so it just deferres the failure + * of the respective operation. + */ + + /* mark them early for readability. + * this just sets some state flags. */ + if (remote) + _req_mod(req, to_be_send, 0); + if (local) + _req_mod(req, to_be_submitted, 0); + + /* check this request on the colison detection hash tables. + * if we have a conflict, just complete it here. + * THINK do we want to check reads, too? (I don't think so...) */ + if (rw == WRITE && _req_conflicts(req)) { + /* this is a conflicting request. + * even though it may have been only _partially_ + * overlapping with one of the currently pending requests, + * without even submitting or sending it, we will + * pretend that it was successfully served right now. + */ + if (local) { + bio_put(req->private_bio); + req->private_bio = NULL; + drbd_al_complete_io(mdev, req->sector); + dec_local(mdev); + local = 0; + } + if (remote) + dec_ap_pending(mdev); + _drbd_end_io_acct(mdev, req); + /* THINK: do we want to fail it (-EIO), or pretend success? */ + bio_endio(req->master_bio, 0); + req->master_bio = NULL; + dec_ap_bio(mdev); + drbd_req_free(req); + remote = 0; + } + + /* NOTE remote first: to get the concurrent write detection right, + * we must register the request before start of local IO. */ + if (remote) { + /* either WRITE and Connected, + * or READ, and no local disk, + * or READ, but not in sync. + */ + if (rw == WRITE) + _req_mod(req, queue_for_net_write, 0); + else + _req_mod(req, queue_for_net_read, 0); + } + spin_unlock_irq(&mdev->req_lock); + kfree(b); /* if someone else has beaten us to it... */ + + if (local) { + req->private_bio->bi_bdev = mdev->bc->backing_bdev; + + dump_internal_bio("Pri", mdev, req->private_bio, 0); + + if (FAULT_ACTIVE(mdev, rw == WRITE ? DRBD_FAULT_DT_WR + : rw == READ ? DRBD_FAULT_DT_RD + : DRBD_FAULT_DT_RA)) + bio_endio(req->private_bio, -EIO); + else + generic_make_request(req->private_bio); + } + + /* we need to plug ALWAYS since we possibly need to kick lo_dev. + * we plug after submit, so we won't miss an unplug event */ + drbd_plug_device(mdev); + + return 0; + +fail_free_complete: + if (rw == WRITE && local) + drbd_al_complete_io(mdev, sector); +fail_and_free_req: + if (local) { + bio_put(req->private_bio); + req->private_bio = NULL; + dec_local(mdev); + } + bio_endio(bio, err); + drbd_req_free(req); + dec_ap_bio(mdev); + kfree(b); + + return 0; +} + +/* helper function for drbd_make_request + * if we can determine just by the mdev (state) that this request will fail, + * return 1 + * otherwise return 0 + */ +static int drbd_fail_request_early(struct drbd_conf *mdev, int is_write) +{ + /* Unconfigured */ + if (mdev->state.conn == Disconnecting && + mdev->state.disk == Diskless) + return 1; + + if (mdev->state.role != Primary && + (!allow_oos || is_write)) { + if (__ratelimit(&drbd_ratelimit_state)) { + ERR("Process %s[%u] tried to %s; " + "since we are not in Primary state, " + "we cannot allow this\n", + current->comm, current->pid, + is_write ? "WRITE" : "READ"); + } + return 1; + } + + /* + * Paranoia: we might have been primary, but sync target, or + * even diskless, then lost the connection. + * This should have been handled (panic? suspend?) somehwere + * else. But maybe it was not, so check again here. + * Caution: as long as we do not have a read/write lock on mdev, + * to serialize state changes, this is racy, since we may lose + * the connection *after* we test for the cstate. + */ + if (mdev->state.disk < UpToDate && mdev->state.pdsk < UpToDate) { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Sorry, I have no access to good data anymore.\n"); + return 1; + } + + return 0; +} + +int drbd_make_request_26(struct request_queue *q, struct bio *bio) +{ + unsigned int s_enr, e_enr; + struct drbd_conf *mdev = (struct drbd_conf *) q->queuedata; + + if (drbd_fail_request_early(mdev, bio_data_dir(bio) & WRITE)) { + bio_endio(bio, -EPERM); + return 0; + } + + /* Reject barrier requests if we know the underlying device does + * not support them. + * XXX: Need to get this info from peer as well some how so we + * XXX: reject if EITHER side/data/metadata area does not support them. + * + * because of those XXX, this is not yet enabled, + * i.e. in drbd_init_set_defaults we set the NO_BARRIER_SUPP bit. + */ + if (unlikely(bio_barrier(bio) && test_bit(NO_BARRIER_SUPP, &mdev->flags))) { + /* drbd_WARN("Rejecting barrier request as underlying device does not support\n"); */ + bio_endio(bio, -EOPNOTSUPP); + return 0; + } + + /* + * what we "blindly" assume: + */ + D_ASSERT(bio->bi_size > 0); + D_ASSERT((bio->bi_size & 0x1ff) == 0); + D_ASSERT(bio->bi_idx == 0); + + /* to make some things easier, force allignment of requests within the + * granularity of our hash tables */ + s_enr = bio->bi_sector >> HT_SHIFT; + e_enr = (bio->bi_sector+(bio->bi_size>>9)-1) >> HT_SHIFT; + + if (likely(s_enr == e_enr)) { + inc_ap_bio(mdev, 1); + return drbd_make_request_common(mdev, bio); + } + + /* can this bio be split generically? + * Maybe add our own split-arbitrary-bios function. */ + if (bio->bi_vcnt != 1 || bio->bi_idx != 0 || bio->bi_size > DRBD_MAX_SEGMENT_SIZE) { + /* rather error out here than BUG in bio_split */ + ERR("bio would need to, but cannot, be split: " + "(vcnt=%u,idx=%u,size=%u,sector=%llu)\n", + bio->bi_vcnt, bio->bi_idx, bio->bi_size, + (unsigned long long)bio->bi_sector); + bio_endio(bio, -EINVAL); + } else { + /* This bio crosses some boundary, so we have to split it. */ + struct bio_pair *bp; + /* works for the "do not cross hash slot boundaries" case + * e.g. sector 262269, size 4096 + * s_enr = 262269 >> 6 = 4097 + * e_enr = (262269+8-1) >> 6 = 4098 + * HT_SHIFT = 6 + * sps = 64, mask = 63 + * first_sectors = 64 - (262269 & 63) = 3 + */ + const sector_t sect = bio->bi_sector; + const int sps = 1 << HT_SHIFT; /* sectors per slot */ + const int mask = sps - 1; + const sector_t first_sectors = sps - (sect & mask); + bp = bio_split(bio, +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) + bio_split_pool, +#endif + first_sectors); + + /* we need to get a "reference count" (ap_bio_cnt) + * to avoid races with the disconnect/reconnect/suspend code. + * In case we need to split the bio here, we need to get two references + * atomically, otherwise we might deadlock when trying to submit the + * second one! */ + inc_ap_bio(mdev, 2); + + D_ASSERT(e_enr == s_enr + 1); + + drbd_make_request_common(mdev, &bp->bio1); + drbd_make_request_common(mdev, &bp->bio2); + bio_pair_release(bp); + } + return 0; +} + +/* This is called by bio_add_page(). With this function we reduce + * the number of BIOs that span over multiple DRBD_MAX_SEGMENT_SIZEs + * units (was AL_EXTENTs). + * + * we do the calculation within the lower 32bit of the byte offsets, + * since we don't care for actual offset, but only check whether it + * would cross "activity log extent" boundaries. + * + * As long as the BIO is emtpy we have to allow at least one bvec, + * regardless of size and offset. so the resulting bio may still + * cross extent boundaries. those are dealt with (bio_split) in + * drbd_make_request_26. + */ +int drbd_merge_bvec(struct request_queue *q, struct bvec_merge_data *bvm, struct bio_vec *bvec) +{ + struct drbd_conf *mdev = (struct drbd_conf *) q->queuedata; + unsigned int bio_offset = + (unsigned int)bvm->bi_sector << 9; /* 32 bit */ + unsigned int bio_size = bvm->bi_size; + int limit, backing_limit; + + limit = DRBD_MAX_SEGMENT_SIZE + - ((bio_offset & (DRBD_MAX_SEGMENT_SIZE-1)) + bio_size); + if (limit < 0) + limit = 0; + if (bio_size == 0) { + if (limit <= bvec->bv_len) + limit = bvec->bv_len; + } else if (limit && inc_local(mdev)) { + struct request_queue * const b = + mdev->bc->backing_bdev->bd_disk->queue; + if (b->merge_bvec_fn && mdev->bc->dc.use_bmbv) { + backing_limit = b->merge_bvec_fn(b, bvm, bvec); + limit = min(limit, backing_limit); + } + dec_local(mdev); + } + return limit; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_vli.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_vli.h @@ -0,0 +1,474 @@ +/* +-*- linux-c -*- + drbd_receiver.c + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _DRBD_VLI_H +#define _DRBD_VLI_H + +/* + * At a granularity of 4KiB storage represented per bit, + * and stroage sizes of several TiB, + * and possibly small-bandwidth replication, + * the bitmap transfer time can take much too long, + * if transmitted in plain text. + * + * We try to reduce the transfered bitmap information + * by encoding runlengths of bit polarity. + * + * We never actually need to encode a "zero" (runlengths are positive). + * But then we have to store the value of the first bit. + * So we can as well have the "zero" be a valid runlength, + * and start encoding/decoding by "number of _set_ bits" by convention. + * + * We assume that large areas are either completely set or unset, + * which gives good compression with any runlength method, + * even when encoding the runlength as fixed size 32bit/64bit integers. + * + * Still, there may be areas where the polarity flips every few bits, + * and encoding the runlength sequence of those ares with fix size + * integers would be much worse than plaintext. + * + * We want to encode small runlength values with minimum code length, + * while still being able to encode a Huge run of all zeros. + * + * Thus we need a Variable Length Integer encoding, VLI. + * + * For runlength < 8, we produce more code bits than plaintext input. + * we need to send incompressible chunks as plaintext, skip over them + * and then see if the next chunk compresses better. + * + * We don't care too much about "excellent" compression ratio + * for large runlengths, 249 bit/24 bit still gives a factor of > 10. + * + * We care for cpu time needed to actually encode/decode + * into the transmitted byte stream. + * + * There are endless variants of VLI. + * For this special purpose, we just need something that is "good enough", + * and easy to understand and code, fast to encode and decode, + * and does not consume memory. + */ + +/* + * buf points to the current position in the tranfered byte stream. + * stream is by definition little endian. + * *buf_len gives the remaining number of bytes at that position. + * *out will receive the decoded value. + * returns number of bytes consumed, + * or 0 if not enough bytes left in buffer (which would be invalid input). + */ +static inline int vli_decode_bytes(u64 *out, unsigned char *buf, unsigned buf_len) +{ + u64 tmp = 0; + unsigned bytes; /* extra bytes after code byte */ + + if (buf_len == 0) + return 0; + + switch(*buf) { + case 0xff: bytes = 8; break; + case 0xfe: bytes = 7; break; + case 0xfd: bytes = 6; break; + case 0xfc: bytes = 5; break; + case 0xfb: bytes = 4; break; + case 0xfa: bytes = 3; break; + case 0xf9: bytes = 2; break; + default: + *out = *buf; + return 1; + } + + if (buf_len <= bytes) + return 0; + + /* no pointer cast assignment, there may be funny alignment + * requirements on certain architectures */ + memcpy(&tmp, buf+1, bytes); + *out = le64_to_cpu(tmp); + return bytes+1; +} + +/* + * similarly, encode n into buf. + * returns consumed bytes, + * or zero if not enough room left in buffer + * (in which case the buf is left unchanged). + * + * encoding is little endian, first byte codes how much bytes follow. + * first byte <= 0xf8 means just this byte, value = code byte. + * first byte == 0xf9 .. 0xff: (code byte - 0xf7) data bytes follow. + */ +static inline int vli_encode_bytes(unsigned char *buf, u64 n, unsigned buf_len) +{ + unsigned bytes; /* _extra_ bytes after code byte */ + + if (buf_len == 0) + return 0; + + if (n <= 0xf8) { + *buf = (unsigned char)n; + return 1; + } + + bytes = (n < (1ULL << 32)) + ? (n < (1ULL << 16)) ? 2 + : (n < (1ULL << 24)) ? 3 : 4 + : (n < (1ULL << 48)) ? + (n < (1ULL << 40)) ? 5 : 6 + : (n < (1ULL << 56)) ? 7 : 8; + + if (buf_len <= bytes) + return 0; + + /* no pointer cast assignment, there may be funny alignment + * requirements on certain architectures */ + *buf++ = 0xf7 + bytes; /* code, 0xf9 .. 0xff */ + n = cpu_to_le64(n); + memcpy(buf, &n, bytes); /* plain */ + return bytes+1; +} + +/* ================================================================== */ + +/* And here the more involved variants of VLI. + * + * Code length is determined by some unique (e.g. unary) prefix. + * This encodes arbitrary bit length, not whole bytes: we have a bit-stream, + * not a byte stream. + */ + +/* for the bitstream, we need a cursor */ +struct bitstream_cursor { + /* the current byte */ + u8 *b; + /* the current bit within *b, nomalized: 0..7 */ + unsigned int bit; +}; + +/* initialize cursor to point to first bit of stream */ +static inline void bitstream_cursor_reset(struct bitstream_cursor *cur, void *s) +{ + cur->b = s; + cur->bit = 0; +} + +/* advance cursor by that many bits; maximum expected input value: 64, + * but depending on VLI implementation, it may be more. */ +static inline void bitstream_cursor_advance(struct bitstream_cursor *cur, unsigned int bits) +{ + bits += cur->bit; + cur->b = cur->b + (bits >> 3); + cur->bit = bits & 7; +} + +/* the bitstream itself knows its length */ +struct bitstream { + struct bitstream_cursor cur; + unsigned char *buf; + size_t buf_len; /* in bytes */ + + /* for input stream: + * number of trailing 0 bits for padding + * total number of valid bits in stream: buf_len * 8 - pad_bits */ + unsigned int pad_bits; +}; + +static inline void bitstream_init(struct bitstream *bs, void *s, size_t len, unsigned int pad_bits) +{ + bs->buf = s; + bs->buf_len = len; + bs->pad_bits = pad_bits; + bitstream_cursor_reset(&bs->cur, bs->buf); +} + +static inline void bitstream_rewind(struct bitstream *bs) +{ + bitstream_cursor_reset(&bs->cur, bs->buf); + memset(bs->buf, 0, bs->buf_len); +} + +/* Put (at most 64) least significant bits of val into bitstream, and advance cursor. + * Ignores "pad_bits". + * Returns zero if bits == 0 (nothing to do). + * Returns number of bits used if successful. + * + * If there is not enough room left in bitstream, + * leaves bitstream unchanged and returns -ENOBUFS. + */ +static inline int bitstream_put_bits(struct bitstream *bs, u64 val, const unsigned int bits) +{ + unsigned char *b = bs->cur.b; + unsigned int tmp; + + if (bits == 0) + return 0; + + if ((bs->cur.b + ((bs->cur.bit + bits -1) >> 3)) - bs->buf >= bs->buf_len) + return -ENOBUFS; + + /* paranoia: strip off hi bits; they should not be set anyways. */ + if (bits < 64) + val &= ~0ULL >> (64 - bits); + + *b++ |= (val & 0xff) << bs->cur.bit; + + for (tmp = 8 - bs->cur.bit; tmp < bits; tmp += 8) + *b++ |= (val >> tmp) & 0xff; + + bitstream_cursor_advance(&bs->cur, bits); + return bits; +} + +/* Fetch (at most 64) bits from bitstream into *out, and advance cursor. + * + * If more than 64 bits are requested, returns -EINVAL and leave *out unchanged. + * + * If there are less than the requested number of valid bits left in the + * bitstream, still fetches all available bits. + * + * Returns number of actually fetched bits. + */ +static inline int bitstream_get_bits(struct bitstream *bs, u64 *out, int bits) +{ + u64 val; + unsigned int n; + + if (bits > 64) + return -EINVAL; + + if (bs->cur.b + ((bs->cur.bit + bs->pad_bits + bits -1) >> 3) - bs->buf >= bs->buf_len) + bits = ((bs->buf_len - (bs->cur.b - bs->buf)) << 3) + - bs->cur.bit - bs->pad_bits; + + if (bits == 0) { + *out = 0; + return 0; + } + + /* get the high bits */ + val = 0; + n = (bs->cur.bit + bits + 7) >> 3; + /* n may be at most 9, if cur.bit + bits > 64 */ + /* which means this copies at most 8 byte */ + if (n) { + memcpy(&val, bs->cur.b+1, n - 1); + val = le64_to_cpu(val) << (8 - bs->cur.bit); + } + + /* we still need the low bits */ + val |= bs->cur.b[0] >> bs->cur.bit; + + /* and mask out bits we don't want */ + val &= ~0ULL >> (64 - bits); + + bitstream_cursor_advance(&bs->cur, bits); + *out = val; + + return bits; +} + +/* we still need to actually define the code. */ + +/* + * encoding is "visualised" as + * __little endian__ bitstream, least significant bit first (left most) + * + * this particular encoding is chosen so that the prefix code + * starts as unary encoding the level, then modified so that + * 11 levels can be described in 8bit, with minimal overhead + * for the smaller levels. + * + * Number of data bits follow fibonacci sequence, with the exception of the + * last level (+1 data bit, so it makes 64bit total). The only worse code when + * encoding bit polarity runlength is 2 plain bits => 3 code bits. +prefix data bits max val Nº data bits +0 0x1 0 +10 x 0x3 1 +110 x 0x5 1 +1110 xx 0x9 2 +11110 xxx 0x11 3 +1111100 x xxxx 0x31 5 +1111101 x xxxxxxx 0x131 8 +11111100 xxxxxxxx xxxxx 0x2131 13 +11111110 xxxxxxxx xxxxxxxx xxxxx 0x202131 21 +11111101 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xx 0x400202131 34 +11111111 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx 56 + * maximum encodable value: 0x100000400202131 == 2**56 + some */ + +/* LEVEL: (total bits, prefix bits, prefix value), + * sorted ascending by number of total bits. + * The rest of the code table is calculated at compiletime from this. */ + +/* fibonacci data 0, 1, ... */ +#define VLI_L_0_1() do { \ + LEVEL( 1, 1, 0x00); \ + LEVEL( 3, 2, 0x01); \ + LEVEL( 4, 3, 0x03); \ + LEVEL( 6, 4, 0x07); \ + LEVEL( 8, 5, 0x0f); \ + LEVEL(12, 7, 0x1f); \ + LEVEL(15, 7, 0x5f); \ + LEVEL(21, 8, 0x3f); \ + LEVEL(29, 8, 0x7f); \ + LEVEL(42, 8, 0xbf); \ + LEVEL(64, 8, 0xff); \ + } while (0) + +/* Some variants, differeing in number of levels, prefix value, and number of + * databits in each level. I tried a lot of variants. Those where the number + * of data bits follows the fibonacci sequence (with a certain offset) simply + * "look best" ;-) + * All of these can encode at least "2 ** 56". */ + +/* fibonacci data 1, 1, ... */ +#define VLI_L_1_1() do { \ + LEVEL( 2, 1, 0x00); \ + LEVEL( 3, 2, 0x01); \ + LEVEL( 5, 3, 0x03); \ + LEVEL( 7, 4, 0x07); \ + LEVEL(10, 5, 0x0f); \ + LEVEL(14, 6, 0x1f); \ + LEVEL(21, 8, 0x3f); \ + LEVEL(29, 8, 0x7f); \ + LEVEL(42, 8, 0xbf); \ + LEVEL(64, 8, 0xff); \ + } while (0) + +/* fibonacci data 1, 2, ... */ +#define VLI_L_1_2() do { \ + LEVEL( 2, 1, 0x00); \ + LEVEL( 4, 2, 0x01); \ + LEVEL( 6, 3, 0x03); \ + LEVEL( 9, 4, 0x07); \ + LEVEL(13, 5, 0x0f); \ + LEVEL(19, 6, 0x1f); \ + LEVEL(28, 7, 0x3f); \ + LEVEL(42, 8, 0x7f); \ + LEVEL(64, 8, 0xff); \ + } while (0) + +/* fibonacci data 2, 3, ... */ +#define VLI_L_2_3() do { \ + LEVEL( 3, 1, 0x00); \ + LEVEL( 5, 2, 0x01); \ + LEVEL( 8, 3, 0x03); \ + LEVEL(12, 4, 0x07); \ + LEVEL(18, 5, 0x0f); \ + LEVEL(27, 6, 0x1f); \ + LEVEL(41, 7, 0x3f); \ + LEVEL(64, 7, 0x5f); \ + } while (0) + +/* fibonacci data 3, 5, ... */ +#define VLI_L_3_5() do { \ + LEVEL( 4, 1, 0x00); \ + LEVEL( 7, 2, 0x01); \ + LEVEL(11, 3, 0x03); \ + LEVEL(17, 4, 0x07); \ + LEVEL(26, 5, 0x0f); \ + LEVEL(40, 6, 0x1f); \ + LEVEL(64, 6, 0x3f); \ + } while (0) + +/* CONFIG */ +#ifndef VLI_LEVELS +#define VLI_LEVELS() VLI_L_3_5() +#endif + +/* finds a suitable level to decode the least significant part of in. + * returns number of bits consumed. + * + * BUG() for bad input, as that would mean a buggy code table. */ +static inline int vli_decode_bits(u64 *out, const u64 in) +{ + u64 adj = 1; + +#define LEVEL(t,b,v) \ + do { \ + if ((in & ((1 << b) -1)) == v) { \ + *out = ((in & ((~0ULL) >> (64-t))) >> b) + adj; \ + return t; \ + } \ + adj += 1ULL << (t - b); \ + } while (0) + + VLI_LEVELS(); + + /* NOT REACHED, if VLI_LEVELS code table is defined properly */ + BUG(); +#undef LEVEL +} + +/* return number of code bits needed, + * or negative error number */ +static inline int __vli_encode_bits(u64 *out, const u64 in) +{ + u64 max = 0; + u64 adj = 1; + + if (in == 0) + return -EINVAL; + +#define LEVEL(t,b,v) do { \ + max += 1ULL << (t - b); \ + if (in <= max) { \ + if (out) \ + *out = ((in - adj) << b) | v; \ + return t; \ + } \ + adj = max + 1; \ + } while (0) + + VLI_LEVELS(); + + return -EOVERFLOW; +#undef LEVEL +} + +/* encodes @in as vli into @bs; + + * return values + * > 0: number of bits successfully stored in bitstream + * -ENOBUFS @bs is full + * -EINVAL input zero (invalid) + * -EOVERFLOW input too large for this vli code (invalid) + */ +static inline int vli_encode_bits(struct bitstream *bs, u64 in) +{ + u64 code = code; + int bits = __vli_encode_bits(&code, in); + + if (bits <= 0) + return bits; + + return bitstream_put_bits(bs, code, bits); +} + +#undef VLI_L_0_1 +#undef VLI_L_1_1 +#undef VLI_L_1_2 +#undef VLI_L_2_3 +#undef VLI_L_3_5 + +#undef VLI_LEVELS +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_receiver.c +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_receiver.c @@ -0,0 +1,4375 @@ +/* + drbd_receiver.c + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 1999-2008, Philipp Reisner . + Copyright (C) 2002-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + + +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#define __KERNEL_SYSCALLS__ +#include +#include +#include +#include +#include +#include +#include +#include "drbd_int.h" +#include "drbd_req.h" + +#include "drbd_vli.h" + +struct flush_work { + struct drbd_work w; + struct drbd_epoch *epoch; +}; + +enum epoch_event { + EV_put, + EV_got_barrier_nr, + EV_barrier_done, + EV_became_last, + EV_cleanup = 32, /* used as flag */ +}; + +enum finish_epoch { + FE_still_live, + FE_destroyed, + FE_recycled, +}; + +STATIC int drbd_do_handshake(struct drbd_conf *mdev); +STATIC int drbd_do_auth(struct drbd_conf *mdev); + +STATIC enum finish_epoch drbd_may_finish_epoch(struct drbd_conf *, struct drbd_epoch *, enum epoch_event); +STATIC int e_end_block(struct drbd_conf *, struct drbd_work *, int); +static inline struct drbd_epoch *previous_epoch(struct drbd_conf *mdev, struct drbd_epoch *epoch) +{ + struct drbd_epoch *prev; + spin_lock(&mdev->epoch_lock); + prev = list_entry(epoch->list.prev, struct drbd_epoch, list); + if (prev == epoch || prev == mdev->current_epoch) + prev = NULL; + spin_unlock(&mdev->epoch_lock); + return prev; +} + +#define GFP_TRY (__GFP_HIGHMEM | __GFP_NOWARN) + +/** + * drbd_bp_alloc: Returns a page. Fails only if a signal comes in. + */ +STATIC struct page *drbd_pp_alloc(struct drbd_conf *mdev, gfp_t gfp_mask) +{ + unsigned long flags = 0; + struct page *page; + DEFINE_WAIT(wait); + + spin_lock_irqsave(&drbd_pp_lock, flags); + page = drbd_pp_pool; + if (page) { + drbd_pp_pool = (struct page *)page_private(page); + set_page_private(page, 0); /* just to be polite */ + drbd_pp_vacant--; + } + spin_unlock_irqrestore(&drbd_pp_lock, flags); + if (page) + goto got_page; + + drbd_kick_lo(mdev); + + for (;;) { + prepare_to_wait(&drbd_pp_wait, &wait, TASK_INTERRUPTIBLE); + + /* try the pool again, maybe the drbd_kick_lo set some free */ + spin_lock_irqsave(&drbd_pp_lock, flags); + page = drbd_pp_pool; + if (page) { + drbd_pp_pool = (struct page *)page_private(page); + drbd_pp_vacant--; + } + spin_unlock_irqrestore(&drbd_pp_lock, flags); + + if (page) + break; + + /* hm. pool was empty. try to allocate from kernel. + * don't wait, if none is available, though. + */ + if (atomic_read(&mdev->pp_in_use) + < mdev->net_conf->max_buffers) { + page = alloc_page(GFP_TRY); + if (page) + break; + } + + /* doh. still no page. + * either used up the configured maximum number, + * or we are low on memory. + * wait for someone to return a page into the pool. + * unless, of course, someone signalled us. + */ + if (signal_pending(current)) { + drbd_WARN("drbd_pp_alloc interrupted!\n"); + finish_wait(&drbd_pp_wait, &wait); + return NULL; + } + drbd_kick_lo(mdev); + if (!(gfp_mask & __GFP_WAIT)) { + finish_wait(&drbd_pp_wait, &wait); + return NULL; + } + schedule(); + } + finish_wait(&drbd_pp_wait, &wait); + + got_page: + atomic_inc(&mdev->pp_in_use); + return page; +} + +STATIC void drbd_pp_free(struct drbd_conf *mdev, struct page *page) +{ + unsigned long flags = 0; + int free_it; + + spin_lock_irqsave(&drbd_pp_lock, flags); + if (drbd_pp_vacant > (DRBD_MAX_SEGMENT_SIZE/PAGE_SIZE)*minor_count) { + free_it = 1; + } else { + set_page_private(page, (unsigned long)drbd_pp_pool); + drbd_pp_pool = page; + drbd_pp_vacant++; + free_it = 0; + } + spin_unlock_irqrestore(&drbd_pp_lock, flags); + + atomic_dec(&mdev->pp_in_use); + + if (free_it) + __free_page(page); + + wake_up(&drbd_pp_wait); +} + +/* +You need to hold the req_lock: + drbd_free_ee() + _drbd_wait_ee_list_empty() + +You must not have the req_lock: + drbd_alloc_ee() + drbd_init_ee() + drbd_release_ee() + drbd_ee_fix_bhs() + drbd_process_done_ee() + drbd_clear_done_ee() + drbd_wait_ee_list_empty() +*/ + +struct Tl_epoch_entry *drbd_alloc_ee(struct drbd_conf *mdev, + u64 id, + sector_t sector, + unsigned int data_size, + gfp_t gfp_mask) __must_hold(local) +{ + struct request_queue *q; + struct Tl_epoch_entry *e; + struct bio_vec *bvec; + struct page *page; + struct bio *bio; + unsigned int ds; + int i; + + e = mempool_alloc(drbd_ee_mempool, gfp_mask & ~__GFP_HIGHMEM); + if (!e) { + if (!(gfp_mask & __GFP_NOWARN)) + ERR("alloc_ee: Allocation of an EE failed\n"); + return NULL; + } + + bio = bio_alloc(gfp_mask & ~__GFP_HIGHMEM, div_ceil(data_size, PAGE_SIZE)); + if (!bio) { + if (!(gfp_mask & __GFP_NOWARN)) + ERR("alloc_ee: Allocation of a bio failed\n"); + goto fail1; + } + + bio->bi_bdev = mdev->bc->backing_bdev; + bio->bi_sector = sector; + + ds = data_size; + while (ds) { + page = drbd_pp_alloc(mdev, gfp_mask); + if (!page) { + if (!(gfp_mask & __GFP_NOWARN)) + ERR("alloc_ee: Allocation of a page failed\n"); + goto fail2; + } + if (!bio_add_page(bio, page, min_t(int, ds, PAGE_SIZE), 0)) { + drbd_pp_free(mdev, page); + ERR("alloc_ee: bio_add_page(s=%llu," + "data_size=%u,ds=%u) failed\n", + (unsigned long long)sector, data_size, ds); + + q = bdev_get_queue(bio->bi_bdev); + if (q->merge_bvec_fn) { + struct bvec_merge_data bvm = { + .bi_bdev = bio->bi_bdev, + .bi_sector = bio->bi_sector, + .bi_size = bio->bi_size, + .bi_rw = bio->bi_rw, + }; + int l = q->merge_bvec_fn(q, &bvm, + &bio->bi_io_vec[bio->bi_vcnt]); + ERR("merge_bvec_fn() = %d\n", l); + } + + /* dump more of the bio. */ + DUMPI(bio->bi_max_vecs); + DUMPI(bio->bi_vcnt); + DUMPI(bio->bi_size); + DUMPI(bio->bi_phys_segments); + + goto fail2; + break; + } + ds -= min_t(int, ds, PAGE_SIZE); + } + + D_ASSERT(data_size == bio->bi_size); + + bio->bi_private = e; + e->mdev = mdev; + e->sector = sector; + e->size = bio->bi_size; + + e->private_bio = bio; + e->block_id = id; + INIT_HLIST_NODE(&e->colision); + e->epoch = NULL; + e->flags = 0; + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("allocated EE sec=%llus size=%u ee=%p\n", + (unsigned long long)sector, data_size, e); + ); + + return e; + + fail2: + __bio_for_each_segment(bvec, bio, i, 0) { + drbd_pp_free(mdev, bvec->bv_page); + } + bio_put(bio); + fail1: + mempool_free(e, drbd_ee_mempool); + + return NULL; +} + +void drbd_free_ee(struct drbd_conf *mdev, struct Tl_epoch_entry *e) +{ + struct bio *bio = e->private_bio; + struct bio_vec *bvec; + int i; + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("Free EE sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + + __bio_for_each_segment(bvec, bio, i, 0) { + drbd_pp_free(mdev, bvec->bv_page); + } + + bio_put(bio); + + D_ASSERT(hlist_unhashed(&e->colision)); + + mempool_free(e, drbd_ee_mempool); +} + +/* currently on module unload only */ +int drbd_release_ee(struct drbd_conf *mdev, struct list_head *list) +{ + int count = 0; + struct Tl_epoch_entry *e; + struct list_head *le; + + spin_lock_irq(&mdev->req_lock); + while (!list_empty(list)) { + le = list->next; + list_del(le); + e = list_entry(le, struct Tl_epoch_entry, w.list); + drbd_free_ee(mdev, e); + count++; + } + spin_unlock_irq(&mdev->req_lock); + + return count; +} + + +STATIC void reclaim_net_ee(struct drbd_conf *mdev) +{ + struct Tl_epoch_entry *e; + struct list_head *le, *tle; + + /* The EEs are always appended to the end of the list. Since + they are sent in order over the wire, they have to finish + in order. As soon as we see the first not finished we can + stop to examine the list... */ + + list_for_each_safe(le, tle, &mdev->net_ee) { + e = list_entry(le, struct Tl_epoch_entry, w.list); + if (drbd_bio_has_active_page(e->private_bio)) + break; + list_del(le); + drbd_free_ee(mdev, e); + } +} + + +/* + * This function is called from _asender only_ + * but see also comments in _req_mod(,barrier_acked) + * and receive_Barrier. + * + * Move entries from net_ee to done_ee, if ready. + * Grab done_ee, call all callbacks, free the entries. + * The callbacks typically send out ACKs. + */ +STATIC int drbd_process_done_ee(struct drbd_conf *mdev) +{ + LIST_HEAD(work_list); + struct Tl_epoch_entry *e, *t; + int ok = 1; + + spin_lock_irq(&mdev->req_lock); + reclaim_net_ee(mdev); + list_splice_init(&mdev->done_ee, &work_list); + spin_unlock_irq(&mdev->req_lock); + + /* possible callbacks here: + * e_end_block, and e_end_resync_block, e_send_discard_ack. + * all ignore the last argument. + */ + list_for_each_entry_safe(e, t, &work_list, w.list) { + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("Process EE on done_ee sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + /* list_del not necessary, next/prev members not touched */ + if (e->w.cb(mdev, &e->w, 0) == 0) + ok = 0; + drbd_free_ee(mdev, e); + } + wake_up(&mdev->ee_wait); + + return ok; +} + + + +/* clean-up helper for drbd_disconnect */ +void _drbd_clear_done_ee(struct drbd_conf *mdev) +{ + struct list_head *le; + struct Tl_epoch_entry *e; + struct drbd_epoch *epoch; + int n = 0; + + + reclaim_net_ee(mdev); + + while (!list_empty(&mdev->done_ee)) { + le = mdev->done_ee.next; + list_del(le); + e = list_entry(le, struct Tl_epoch_entry, w.list); + if (mdev->net_conf->wire_protocol == DRBD_PROT_C + || is_syncer_block_id(e->block_id)) + ++n; + + if (!hlist_unhashed(&e->colision)) + hlist_del_init(&e->colision); + + if (e->epoch) { + if (e->flags & EE_IS_BARRIER) { + epoch = previous_epoch(mdev, e->epoch); + if (epoch) + drbd_may_finish_epoch(mdev, epoch, EV_barrier_done + EV_cleanup); + } + drbd_may_finish_epoch(mdev, e->epoch, EV_put + EV_cleanup); + } + drbd_free_ee(mdev, e); + } + + sub_unacked(mdev, n); +} + +void _drbd_wait_ee_list_empty(struct drbd_conf *mdev, struct list_head *head) +{ + DEFINE_WAIT(wait); + + /* avoids spin_lock/unlock + * and calling prepare_to_wait in the fast path */ + while (!list_empty(head)) { + prepare_to_wait(&mdev->ee_wait, &wait, TASK_UNINTERRUPTIBLE); + spin_unlock_irq(&mdev->req_lock); + drbd_kick_lo(mdev); + schedule(); + finish_wait(&mdev->ee_wait, &wait); + spin_lock_irq(&mdev->req_lock); + } +} + +void drbd_wait_ee_list_empty(struct drbd_conf *mdev, struct list_head *head) +{ + spin_lock_irq(&mdev->req_lock); + _drbd_wait_ee_list_empty(mdev, head); + spin_unlock_irq(&mdev->req_lock); +} + +/* see also kernel_accept; which is only present since 2.6.18. + * also we want to log which part of it failed, exactly */ +STATIC int drbd_accept(struct drbd_conf *mdev, const char **what, + struct socket *sock, struct socket **newsock) +{ + struct sock *sk = sock->sk; + int err = 0; + + *what = "listen"; + err = sock->ops->listen(sock, 5); + if (err < 0) + goto out; + + *what = "sock_create_lite"; + err = sock_create_lite(sk->sk_family, sk->sk_type, sk->sk_protocol, + newsock); + if (err < 0) + goto out; + + *what = "accept"; + err = sock->ops->accept(sock, *newsock, 0); + if (err < 0) { + sock_release(*newsock); + *newsock = NULL; + goto out; + } + (*newsock)->ops = sock->ops; + +out: + return err; +} + +STATIC int drbd_recv_short(struct drbd_conf *mdev, struct socket *sock, + void *buf, size_t size, int flags) +{ + mm_segment_t oldfs; + struct kvec iov = { + .iov_base = buf, + .iov_len = size, + }; + struct msghdr msg = { + .msg_iovlen = 1, + .msg_iov = (struct iovec *)&iov, + .msg_flags = (flags ? flags : MSG_WAITALL | MSG_NOSIGNAL) + }; + int rv; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + rv = sock_recvmsg(sock, &msg, size, msg.msg_flags); + set_fs(oldfs); + + return rv; +} + +STATIC int drbd_recv(struct drbd_conf *mdev, void *buf, size_t size) +{ + mm_segment_t oldfs; + struct kvec iov = { + .iov_base = buf, + .iov_len = size, + }; + struct msghdr msg = { + .msg_iovlen = 1, + .msg_iov = (struct iovec *)&iov, + .msg_flags = MSG_WAITALL | MSG_NOSIGNAL + }; + int rv; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + + for (;;) { + rv = sock_recvmsg(mdev->data.socket, &msg, size, msg.msg_flags); + if (rv == size) + break; + + /* Note: + * ECONNRESET other side closed the connection + * ERESTARTSYS (on sock) we got a signal + */ + + if (rv < 0) { + if (rv == -ECONNRESET) + INFO("sock was reset by peer\n"); + else if (rv != -ERESTARTSYS) + ERR("sock_recvmsg returned %d\n", rv); + break; + } else if (rv == 0) { + INFO("sock was shut down by peer\n"); + break; + } else { + /* signal came in, or peer/link went down, + * after we read a partial message + */ + /* D_ASSERT(signal_pending(current)); */ + break; + } + }; + + set_fs(oldfs); + + if (rv != size) + drbd_force_state(mdev, NS(conn, BrokenPipe)); + + return rv; +} + +STATIC struct socket *drbd_try_connect(struct drbd_conf *mdev) +{ + const char *what; + struct socket *sock; + struct sockaddr_in6 src_in6; + int err; + int disconnect_on_error = 1; + + if (!inc_net(mdev)) + return NULL; + + what = "sock_create_kern"; + err = sock_create_kern(((struct sockaddr *)mdev->net_conf->my_addr)->sa_family, + SOCK_STREAM, IPPROTO_TCP, &sock); + if (err < 0) { + sock = NULL; + goto out; + } + + sock->sk->sk_rcvtimeo = + sock->sk->sk_sndtimeo = mdev->net_conf->try_connect_int*HZ; + + /* explicitly bind to the configured IP as source IP + * for the outgoing connections. + * This is needed for multihomed hosts and to be + * able to use lo: interfaces for drbd. + * Make sure to use 0 as portnumber, so linux selects + * a free one dynamically. + */ + memcpy(&src_in6, mdev->net_conf->my_addr, + min_t(int, mdev->net_conf->my_addr_len, sizeof(src_in6))); + if (((struct sockaddr *)mdev->net_conf->my_addr)->sa_family == AF_INET6) + src_in6.sin6_port = 0; + else + ((struct sockaddr_in *)&src_in6)->sin_port = 0; /* AF_INET & AF_SCI */ + + what = "bind before connect"; + err = sock->ops->bind(sock, + (struct sockaddr *) &src_in6, + mdev->net_conf->my_addr_len); + if (err < 0) + goto out; + + /* connect may fail, peer not yet available. + * stay WFConnection, don't go Disconnecting! */ + disconnect_on_error = 0; + what = "connect"; + err = sock->ops->connect(sock, + (struct sockaddr *)mdev->net_conf->peer_addr, + mdev->net_conf->peer_addr_len, 0); + +out: + if (err < 0) { + if (sock) { + sock_release(sock); + sock = NULL; + } + switch (-err) { + /* timeout, busy, signal pending */ + case ETIMEDOUT: case EAGAIN: case EINPROGRESS: + case EINTR: case ERESTARTSYS: + /* peer not (yet) available, network problem */ + case ECONNREFUSED: case ENETUNREACH: + case EHOSTDOWN: case EHOSTUNREACH: + disconnect_on_error = 0; + break; + default: + ERR("%s failed, err = %d\n", what, err); + } + if (disconnect_on_error) + drbd_force_state(mdev, NS(conn, Disconnecting)); + } + dec_net(mdev); + return sock; +} + +STATIC struct socket *drbd_wait_for_connect(struct drbd_conf *mdev) +{ + int timeo, err; + struct socket *s_estab = NULL, *s_listen; + const char *what; + + if (!inc_net(mdev)) + return NULL; + + what = "sock_create_kern"; + err = sock_create_kern(((struct sockaddr *)mdev->net_conf->my_addr)->sa_family, + SOCK_STREAM, IPPROTO_TCP, &s_listen); + if (err) { + s_listen = NULL; + goto out; + } + + timeo = mdev->net_conf->try_connect_int * HZ; + timeo += (random32() & 1) ? timeo / 7 : -timeo / 7; /* 28.5% random jitter */ + + s_listen->sk->sk_reuse = 1; /* SO_REUSEADDR */ + s_listen->sk->sk_rcvtimeo = timeo; + s_listen->sk->sk_sndtimeo = timeo; + + what = "bind before listen"; + err = s_listen->ops->bind(s_listen, + (struct sockaddr *) mdev->net_conf->my_addr, + mdev->net_conf->my_addr_len); + if (err < 0) + goto out; + + err = drbd_accept(mdev, &what, s_listen, &s_estab); + +out: + if (s_listen) + sock_release(s_listen); + if (err < 0) { + if (err != -EAGAIN && err != -EINTR && err != -ERESTARTSYS) { + ERR("%s failed, err = %d\n", what, err); + drbd_force_state(mdev, NS(conn, Disconnecting)); + } + } + dec_net(mdev); + + return s_estab; +} + +STATIC int drbd_send_fp(struct drbd_conf *mdev, + struct socket *sock, enum Drbd_Packet_Cmd cmd) +{ + struct Drbd_Header *h = (struct Drbd_Header *) &mdev->data.sbuf.head; + + return _drbd_send_cmd(mdev, sock, cmd, h, sizeof(*h), 0); +} + +STATIC enum Drbd_Packet_Cmd drbd_recv_fp(struct drbd_conf *mdev, struct socket *sock) +{ + struct Drbd_Header *h = (struct Drbd_Header *) &mdev->data.sbuf.head; + int rr; + + rr = drbd_recv_short(mdev, sock, h, sizeof(*h), 0); + + if (rr == sizeof(*h) && h->magic == BE_DRBD_MAGIC) + return be16_to_cpu(h->command); + + return 0xffff; +} + +/** + * drbd_socket_okay: + * Tests if the connection behind the socket still exists. If not it frees + * the socket. + */ +static int drbd_socket_okay(struct drbd_conf *mdev, struct socket **sock) +{ + int rr; + char tb[4]; + + if (!*sock) + return FALSE; + + rr = drbd_recv_short(mdev, *sock, tb, 4, MSG_DONTWAIT | MSG_PEEK); + + if (rr > 0 || rr == -EAGAIN) { + return TRUE; + } else { + sock_release(*sock); + *sock = NULL; + return FALSE; + } +} + +/* + * return values: + * 1 yess, we have a valid connection + * 0 oops, did not work out, please try again + * -1 peer talks different language, + * no point in trying again, please go standalone. + * -2 We do not have a network config... + */ +STATIC int drbd_connect(struct drbd_conf *mdev) +{ + struct socket *s, *sock, *msock; + int try, h, ok; + + D_ASSERT(!mdev->data.socket); + + if (test_and_clear_bit(CREATE_BARRIER, &mdev->flags)) + ERR("CREATE_BARRIER flag was set in drbd_connect - now cleared!\n"); + + if (drbd_request_state(mdev, NS(conn, WFConnection)) < SS_Success) + return -2; + + clear_bit(DISCARD_CONCURRENT, &mdev->flags); + + sock = NULL; + msock = NULL; + + do { + for (try = 0;;) { + /* 3 tries, this should take less than a second! */ + s = drbd_try_connect(mdev); + if (s || ++try >= 3) + break; + /* give the other side time to call bind() & listen() */ + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + } + + if (s) { + if (!sock) { + drbd_send_fp(mdev, s, HandShakeS); + sock = s; + s = NULL; + } else if (!msock) { + drbd_send_fp(mdev, s, HandShakeM); + msock = s; + s = NULL; + } else { + ERR("Logic error in drbd_connect()\n"); + return -1; + } + } + + if (sock && msock) { + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ / 10); + ok = drbd_socket_okay(mdev, &sock); + ok = drbd_socket_okay(mdev, &msock) && ok; + if (ok) + break; + } + +retry: + s = drbd_wait_for_connect(mdev); + if (s) { + try = drbd_recv_fp(mdev, s); + drbd_socket_okay(mdev, &sock); + drbd_socket_okay(mdev, &msock); + switch (try) { + case HandShakeS: + if (sock) { + drbd_WARN("initial packet S crossed\n"); + sock_release(sock); + } + sock = s; + break; + case HandShakeM: + if (msock) { + drbd_WARN("initial packet M crossed\n"); + sock_release(msock); + } + msock = s; + set_bit(DISCARD_CONCURRENT, &mdev->flags); + break; + default: + drbd_WARN("Error receiving initial packet\n"); + sock_release(s); + if (random32() & 1) + goto retry; + } + } + + if (mdev->state.conn <= Disconnecting) + return -1; + if (signal_pending(current)) { + flush_signals(current); + smp_rmb(); + if (get_t_state(&mdev->receiver) == Exiting) { + if (sock) + sock_release(sock); + if (msock) + sock_release(msock); + return -1; + } + } + + if (sock && msock) { + ok = drbd_socket_okay(mdev, &sock); + ok = drbd_socket_okay(mdev, &msock) && ok; + if (ok) + break; + } + } while (1); + + msock->sk->sk_reuse = 1; /* SO_REUSEADDR */ + sock->sk->sk_reuse = 1; /* SO_REUSEADDR */ + + sock->sk->sk_allocation = GFP_NOIO; + msock->sk->sk_allocation = GFP_NOIO; + + sock->sk->sk_priority = TC_PRIO_INTERACTIVE_BULK; + msock->sk->sk_priority = TC_PRIO_INTERACTIVE; + + if (mdev->net_conf->sndbuf_size) { + sock->sk->sk_sndbuf = mdev->net_conf->sndbuf_size; + sock->sk->sk_rcvbuf = mdev->net_conf->sndbuf_size; + sock->sk->sk_userlocks |= SOCK_SNDBUF_LOCK | SOCK_RCVBUF_LOCK; + } + + /* NOT YET ... + * sock->sk->sk_sndtimeo = mdev->net_conf->timeout*HZ/10; + * sock->sk->sk_rcvtimeo = MAX_SCHEDULE_TIMEOUT; + * first set it to the HandShake timeout, wich is hardcoded for now: */ + sock->sk->sk_sndtimeo = + sock->sk->sk_rcvtimeo = 2*HZ; + + msock->sk->sk_sndtimeo = mdev->net_conf->timeout*HZ/10; + msock->sk->sk_rcvtimeo = mdev->net_conf->ping_int*HZ; + + /* we don't want delays. + * we use TCP_CORK where apropriate, though */ + drbd_tcp_nodelay(sock); + drbd_tcp_nodelay(msock); + + mdev->data.socket = sock; + mdev->meta.socket = msock; + mdev->last_received = jiffies; + + D_ASSERT(mdev->asender.task == NULL); + + h = drbd_do_handshake(mdev); + if (h <= 0) + return h; + + if (mdev->cram_hmac_tfm) { + /* drbd_request_state(mdev, NS(conn, WFAuth)); */ + if (!drbd_do_auth(mdev)) { + ERR("Authentication of peer failed\n"); + return -1; + } + } + + if (drbd_request_state(mdev, NS(conn, WFReportParams)) < SS_Success) + return 0; + + sock->sk->sk_sndtimeo = mdev->net_conf->timeout*HZ/10; + sock->sk->sk_rcvtimeo = MAX_SCHEDULE_TIMEOUT; + + atomic_set(&mdev->packet_seq, 0); + mdev->peer_seq = 0; + + drbd_thread_start(&mdev->asender); + + drbd_send_protocol(mdev); + drbd_send_sync_param(mdev, &mdev->sync_conf); + drbd_send_sizes(mdev); + drbd_send_uuids(mdev); + drbd_send_state(mdev); + clear_bit(USE_DEGR_WFC_T, &mdev->flags); + + return 1; +} + +STATIC int drbd_recv_header(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + int r; + + r = drbd_recv(mdev, h, sizeof(*h)); + + if (unlikely(r != sizeof(*h))) { + ERR("short read expecting header on sock: r=%d\n", r); + return FALSE; + }; + h->command = be16_to_cpu(h->command); + h->length = be16_to_cpu(h->length); + if (unlikely(h->magic != BE_DRBD_MAGIC)) { + ERR("magic?? on data m: 0x%lx c: %d l: %d\n", + (long)be32_to_cpu(h->magic), + h->command, h->length); + return FALSE; + } + mdev->last_received = jiffies; + + return TRUE; +} + +STATIC enum finish_epoch drbd_flush_after_epoch(struct drbd_conf *mdev, struct drbd_epoch *epoch) +{ + int rv; + + if (mdev->write_ordering >= WO_bdev_flush && inc_local(mdev)) { + rv = blkdev_issue_flush(mdev->bc->backing_bdev, NULL); + if (rv) { + ERR("local disk flush failed with status %d\n", rv); + /* would rather check on EOPNOTSUPP, but that is not reliable. + * don't try again for ANY return value != 0 + * if (rv == -EOPNOTSUPP) */ + drbd_bump_write_ordering(mdev, WO_drain_io); + } + dec_local(mdev); + } + + return drbd_may_finish_epoch(mdev, epoch, EV_barrier_done); +} + +/** + * w_flush: Checks if an epoch can be closed and therefore might + * close and/or free the epoch object. + */ +STATIC int w_flush(struct drbd_conf *mdev, struct drbd_work *w, int cancel) +{ + struct flush_work *fw = (struct flush_work *)w; + struct drbd_epoch *epoch = fw->epoch; + + kfree(w); + + if (!test_and_set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags)) + drbd_flush_after_epoch(mdev, epoch); + + drbd_may_finish_epoch(mdev, epoch, EV_put | + (mdev->state.conn < Connected ? EV_cleanup : 0)); + + return 1; +} + +/** + * drbd_may_finish_epoch: Checks if an epoch can be closed and therefore might + * close and/or free the epoch object. + */ +STATIC enum finish_epoch drbd_may_finish_epoch(struct drbd_conf *mdev, + struct drbd_epoch *epoch, + enum epoch_event ev) +{ + int finish, epoch_size; + struct drbd_epoch *next_epoch; + int schedule_flush = 0; + enum finish_epoch rv = FE_still_live; + + static char *epoch_event_str[] = { + [EV_put] = "put", + [EV_got_barrier_nr] = "got_barrier_nr", + [EV_barrier_done] = "barrier_done", + [EV_became_last] = "became_last", + }; + + spin_lock(&mdev->epoch_lock); + do { + next_epoch = NULL; + finish = 0; + + epoch_size = atomic_read(&epoch->epoch_size); + + switch (ev & ~EV_cleanup) { + case EV_put: + atomic_dec(&epoch->active); + break; + case EV_got_barrier_nr: + set_bit(DE_HAVE_BARRIER_NUMBER, &epoch->flags); + + /* Special case: If we just switched from WO_bio_barrier to + WO_bdev_flush we should not finish the current epoch */ + if (test_bit(DE_CONTAINS_A_BARRIER, &epoch->flags) && epoch_size == 1 && + mdev->write_ordering != WO_bio_barrier && + epoch == mdev->current_epoch) + clear_bit(DE_CONTAINS_A_BARRIER, &epoch->flags); + break; + case EV_barrier_done: + set_bit(DE_BARRIER_IN_NEXT_EPOCH_DONE, &epoch->flags); + break; + case EV_became_last: + /* nothing to do*/ + break; + } + + MTRACE(TraceTypeEpochs, TraceLvlAll, + INFO("Update epoch %p/%d { size=%d active=%d %c%c n%c%c } ev=%s\n", + epoch, epoch->barrier_nr, epoch_size, atomic_read(&epoch->active), + test_bit(DE_HAVE_BARRIER_NUMBER, &epoch->flags) ? 'n' : '-', + test_bit(DE_CONTAINS_A_BARRIER, &epoch->flags) ? 'b' : '-', + test_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags) ? 'i' : '-', + test_bit(DE_BARRIER_IN_NEXT_EPOCH_DONE, &epoch->flags) ? 'd' : '-', + epoch_event_str[ev]); + ); + + if (epoch_size != 0 && + atomic_read(&epoch->active) == 0 && + test_bit(DE_HAVE_BARRIER_NUMBER, &epoch->flags) && + epoch->list.prev == &mdev->current_epoch->list && + !test_bit(DE_IS_FINISHING, &epoch->flags)) { + /* Nearly all conditions are met to finish that epoch... */ + if (test_bit(DE_BARRIER_IN_NEXT_EPOCH_DONE, &epoch->flags) || + mdev->write_ordering == WO_none || + (epoch_size == 1 && test_bit(DE_CONTAINS_A_BARRIER, &epoch->flags)) || + ev & EV_cleanup) { + finish = 1; + set_bit(DE_IS_FINISHING, &epoch->flags); + } else if (!test_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags) && + mdev->write_ordering == WO_bio_barrier) { + atomic_inc(&epoch->active); + schedule_flush = 1; + } + } + if (finish) { + if (!(ev & EV_cleanup)) { + spin_unlock(&mdev->epoch_lock); + drbd_send_b_ack(mdev, epoch->barrier_nr, epoch_size); + spin_lock(&mdev->epoch_lock); + } + dec_unacked(mdev); + + if (mdev->current_epoch != epoch) { + next_epoch = list_entry(epoch->list.next, struct drbd_epoch, list); + list_del(&epoch->list); + ev = EV_became_last | (ev & EV_cleanup); + mdev->epochs--; + MTRACE(TraceTypeEpochs, TraceLvlSummary, + INFO("Freeing epoch %p/%d { size=%d } nr_epochs=%d\n", + epoch, epoch->barrier_nr, epoch_size, mdev->epochs); + ); + kfree(epoch); + + if (rv == FE_still_live) + rv = FE_destroyed; + } else { + epoch->flags = 0; + atomic_set(&epoch->epoch_size, 0); + /* atomic_set(&epoch->active, 0); is alrady zero */ + if (rv == FE_still_live) + rv = FE_recycled; + } + } + + if (!next_epoch) + break; + + epoch = next_epoch; + } while (1); + + spin_unlock(&mdev->epoch_lock); + + if (schedule_flush) { + struct flush_work *fw; + fw = kmalloc(sizeof(*fw), GFP_ATOMIC); + if (fw) { + MTRACE(TraceTypeEpochs, TraceLvlMetrics, + INFO("Schedul flush %p/%d { size=%d } nr_epochs=%d\n", + epoch, epoch->barrier_nr, epoch_size, mdev->epochs); + ); + fw->w.cb = w_flush; + fw->epoch = epoch; + drbd_queue_work(&mdev->data.work, &fw->w); + } else { + drbd_WARN("Could not kmalloc a flush_work obj\n"); + set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags); + /* That is not a recursion, only one level */ + drbd_may_finish_epoch(mdev, epoch, EV_barrier_done); + drbd_may_finish_epoch(mdev, epoch, EV_put); + } + } + + return rv; +} + +/** + * drbd_bump_write_ordering: It turned out that the current mdev->write_ordering + * method does not work on the backing block device. Try the next allowed method. + */ +void drbd_bump_write_ordering(struct drbd_conf *mdev, enum write_ordering_e wo) __must_hold(local) +{ + enum write_ordering_e pwo; + static char *write_ordering_str[] = { + [WO_none] = "none", + [WO_drain_io] = "drain", + [WO_bdev_flush] = "flush", + [WO_bio_barrier] = "barrier", + }; + + pwo = mdev->write_ordering; + wo = min(pwo, wo); + if (wo == WO_bio_barrier && mdev->bc->dc.no_disk_barrier) + wo = WO_bdev_flush; + if (wo == WO_bdev_flush && mdev->bc->dc.no_disk_flush) + wo = WO_drain_io; + if (wo == WO_drain_io && mdev->bc->dc.no_disk_drain) + wo = WO_none; + mdev->write_ordering = wo; + if (pwo != mdev->write_ordering || wo == WO_bio_barrier) + INFO("Method to ensure write ordering: %s\n", write_ordering_str[mdev->write_ordering]); +} + +/** + * w_e_reissue: In case the IO subsystem delivered an error for an BIO with the + * BIO_RW_BARRIER flag set, retry that bio without the barrier flag set. + */ +int w_e_reissue(struct drbd_conf *mdev, struct drbd_work *w, int cancel) __releases(local) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + struct bio *bio = e->private_bio; + + /* We leave DE_CONTAINS_A_BARRIER and EE_IS_BARRIER in place, + (and DE_BARRIER_IN_NEXT_EPOCH_ISSUED in the previous Epoch) + so that we can finish that epoch in drbd_may_finish_epoch(). + That is necessary if we already have a long chain of Epochs, before + we realize that BIO_RW_BARRIER is actually not supported */ + + /* As long as the -ENOTSUPP on the barrier is reported immediately + that will never trigger. It it is reported late, we will just + print that warning an continue corretly for all future requests + with WO_bdev_flush */ + if (previous_epoch(mdev, e->epoch)) + drbd_WARN("Write ordering was not enforced (one time event)\n"); + + /* prepare bio for re-submit, + * re-init volatile members */ + /* we still have a local reference, + * inc_local was done in receive_Data. */ + bio->bi_bdev = mdev->bc->backing_bdev; + bio->bi_sector = e->sector; + bio->bi_size = e->size; + bio->bi_idx = 0; + + bio->bi_flags &= ~(BIO_POOL_MASK - 1); + bio->bi_flags |= 1 << BIO_UPTODATE; + + /* don't know whether this is necessary: */ + bio->bi_phys_segments = 0; + bio->bi_next = NULL; + + /* these should be unchanged: */ + /* bio->bi_end_io = drbd_endio_write_sec; */ + /* bio->bi_vcnt = whatever; */ + + e->w.cb = e_end_block; + + /* This is no longer a barrier request. */ + bio->bi_rw &= ~(1UL << BIO_RW_BARRIER); + + drbd_generic_make_request(mdev, DRBD_FAULT_DT_WR, bio); + + return 1; +} + +STATIC int receive_Barrier(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + int rv, issue_flush; + struct Drbd_Barrier_Packet *p = (struct Drbd_Barrier_Packet *)h; + struct drbd_epoch *epoch; + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) return FALSE; + + rv = drbd_recv(mdev, h->payload, h->length); + ERR_IF(rv != h->length) return FALSE; + + inc_unacked(mdev); + + if (mdev->net_conf->wire_protocol != DRBD_PROT_C) + drbd_kick_lo(mdev); + + mdev->current_epoch->barrier_nr = p->barrier; + rv = drbd_may_finish_epoch(mdev, mdev->current_epoch, EV_got_barrier_nr); + + /* BarrierAck may imply that the corresponding extent is dropped from + * the activity log, which means it would not be resynced in case the + * Primary crashes now. + * Therefore we must send the barrier_ack after the barrier request was + * completed. */ + switch (mdev->write_ordering) { + case WO_bio_barrier: + case WO_none: + if (rv == FE_recycled) + return TRUE; + break; + + case WO_bdev_flush: + case WO_drain_io: + D_ASSERT(rv == FE_still_live); + set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &mdev->current_epoch->flags); + drbd_wait_ee_list_empty(mdev, &mdev->active_ee); + rv = drbd_flush_after_epoch(mdev, mdev->current_epoch); + if (rv == FE_recycled) + return TRUE; + + /* The asender will send all the ACKs and barrier ACKs out, since + all EEs moved from the active_ee to the done_ee. We need to + provide a new epoch object for the EEs that come in soon */ + break; + } + + epoch = kmalloc(sizeof(struct drbd_epoch), GFP_KERNEL); + if (!epoch) { + drbd_WARN("Allocation of an epoch failed, slowing down\n"); + issue_flush = !test_and_set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags); + drbd_wait_ee_list_empty(mdev, &mdev->active_ee); + if (issue_flush) { + rv = drbd_flush_after_epoch(mdev, mdev->current_epoch); + if (rv == FE_recycled) + return TRUE; + } + + drbd_wait_ee_list_empty(mdev, &mdev->done_ee); + + return TRUE; + } + + epoch->flags = 0; + atomic_set(&epoch->epoch_size, 0); + atomic_set(&epoch->active, 0); + + spin_lock(&mdev->epoch_lock); + if (atomic_read(&mdev->current_epoch->epoch_size)) { + list_add(&epoch->list, &mdev->current_epoch->list); + mdev->current_epoch = epoch; + mdev->epochs++; + MTRACE(TraceTypeEpochs, TraceLvlMetrics, + INFO("Allocat epoch %p/xxxx { } nr_epochs=%d\n", epoch, mdev->epochs); + ); + } else { + /* The current_epoch got recycled while we allocated this one... */ + kfree(epoch); + } + spin_unlock(&mdev->epoch_lock); + + return TRUE; +} + +/* used from receive_RSDataReply (recv_resync_read) + * and from receive_Data */ +STATIC struct Tl_epoch_entry * +read_in_block(struct drbd_conf *mdev, u64 id, sector_t sector, int data_size) __must_hold(local) +{ + struct Tl_epoch_entry *e; + struct bio_vec *bvec; + struct page *page; + struct bio *bio; + int dgs, ds, i, rr; + void *dig_in = mdev->int_dig_in; + void *dig_vv = mdev->int_dig_vv; + + dgs = (mdev->agreed_pro_version >= 87 && mdev->integrity_r_tfm) ? + crypto_hash_digestsize(mdev->integrity_r_tfm) : 0; + + if (dgs) { + rr = drbd_recv(mdev, dig_in, dgs); + if (rr != dgs) { + drbd_WARN("short read receiving data digest: read %d expected %d\n", + rr, dgs); + return NULL; + } + } + + data_size -= dgs; + + ERR_IF(data_size & 0x1ff) return NULL; + ERR_IF(data_size > DRBD_MAX_SEGMENT_SIZE) return NULL; + + e = drbd_alloc_ee(mdev, id, sector, data_size, GFP_KERNEL); + if (!e) + return NULL; + bio = e->private_bio; + ds = data_size; + bio_for_each_segment(bvec, bio, i) { + page = bvec->bv_page; + rr = drbd_recv(mdev, kmap(page), min_t(int, ds, PAGE_SIZE)); + kunmap(page); + if (rr != min_t(int, ds, PAGE_SIZE)) { + drbd_free_ee(mdev, e); + drbd_WARN("short read receiving data: read %d expected %d\n", + rr, min_t(int, ds, PAGE_SIZE)); + return NULL; + } + ds -= rr; + } + + if (dgs) { + drbd_csum(mdev, mdev->integrity_r_tfm, bio, dig_vv); + if (memcmp(dig_in, dig_vv, dgs)) { + ERR("Digest integrity check FAILED.\n"); + drbd_bcast_ee(mdev, "digest failed", + dgs, dig_in, dig_vv, e); + drbd_free_ee(mdev, e); + return NULL; + } + } + mdev->recv_cnt += data_size>>9; + return e; +} + +/* drbd_drain_block() just takes a data block + * out of the socket input buffer, and discards it. + */ +STATIC int drbd_drain_block(struct drbd_conf *mdev, int data_size) +{ + struct page *page; + int rr, rv = 1; + void *data; + + page = drbd_pp_alloc(mdev, GFP_KERNEL); + + data = kmap(page); + while (data_size) { + rr = drbd_recv(mdev, data, min_t(int, data_size, PAGE_SIZE)); + if (rr != min_t(int, data_size, PAGE_SIZE)) { + rv = 0; + drbd_WARN("short read receiving data: read %d expected %d\n", + rr, min_t(int, data_size, PAGE_SIZE)); + break; + } + data_size -= rr; + } + kunmap(page); + drbd_pp_free(mdev, page); + return rv; +} + +/* kick lower level device, if we have more than (arbitrary number) + * reference counts on it, which typically are locally submitted io + * requests. don't use unacked_cnt, so we speed up proto A and B, too. */ +static void maybe_kick_lo(struct drbd_conf *mdev) +{ + if (atomic_read(&mdev->local_cnt) >= mdev->net_conf->unplug_watermark) + drbd_kick_lo(mdev); +} + +STATIC int recv_dless_read(struct drbd_conf *mdev, struct drbd_request *req, + sector_t sector, int data_size) +{ + struct bio_vec *bvec; + struct bio *bio; + int dgs, rr, i, expect; + void *dig_in = mdev->int_dig_in; + void *dig_vv = mdev->int_dig_vv; + + dgs = (mdev->agreed_pro_version >= 87 && mdev->integrity_r_tfm) ? + crypto_hash_digestsize(mdev->integrity_r_tfm) : 0; + + if (dgs) { + rr = drbd_recv(mdev, dig_in, dgs); + if (rr != dgs) { + drbd_WARN("short read receiving data reply digest: read %d expected %d\n", + rr, dgs); + return 0; + } + } + + data_size -= dgs; + + bio = req->master_bio; + D_ASSERT(sector == bio->bi_sector); + + bio_for_each_segment(bvec, bio, i) { + expect = min_t(int, data_size, bvec->bv_len); + rr = drbd_recv(mdev, + kmap(bvec->bv_page)+bvec->bv_offset, + expect); + kunmap(bvec->bv_page); + if (rr != expect) { + drbd_WARN("short read receiving data reply: " + "read %d expected %d\n", + rr, expect); + return 0; + } + data_size -= rr; + } + + if (dgs) { + drbd_csum(mdev, mdev->integrity_r_tfm, bio, dig_vv); + if (memcmp(dig_in, dig_vv, dgs)) { + ERR("Digest integrity check FAILED. Broken NICs?\n"); + return 0; + } + } + + D_ASSERT(data_size == 0); + return 1; +} + +/* e_end_resync_block() is called via + * drbd_process_done_ee() by asender only */ +STATIC int e_end_resync_block(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + sector_t sector = e->sector; + int ok; + + D_ASSERT(hlist_unhashed(&e->colision)); + + if (likely(drbd_bio_uptodate(e->private_bio))) { + drbd_set_in_sync(mdev, sector, e->size); + ok = drbd_send_ack(mdev, RSWriteAck, e); + } else { + /* Record failure to sync */ + drbd_rs_failed_io(mdev, sector, e->size); + + ok = drbd_send_ack(mdev, NegAck, e); + ok &= drbd_io_error(mdev, FALSE); + } + dec_unacked(mdev); + + return ok; +} + +STATIC int recv_resync_read(struct drbd_conf *mdev, sector_t sector, int data_size) __releases(local) +{ + struct Tl_epoch_entry *e; + + e = read_in_block(mdev, ID_SYNCER, sector, data_size); + if (!e) { + dec_local(mdev); + return FALSE; + } + + dec_rs_pending(mdev); + + e->private_bio->bi_end_io = drbd_endio_write_sec; + e->private_bio->bi_rw = WRITE; + e->w.cb = e_end_resync_block; + + inc_unacked(mdev); + /* corresponding dec_unacked() in e_end_resync_block() + * respective _drbd_clear_done_ee */ + + spin_lock_irq(&mdev->req_lock); + list_add(&e->w.list, &mdev->sync_ee); + spin_unlock_irq(&mdev->req_lock); + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("submit EE (RS)WRITE sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + dump_internal_bio("Sec", mdev, e->private_bio, 0); + drbd_generic_make_request(mdev, DRBD_FAULT_RS_WR, e->private_bio); + /* accounting done in endio */ + + maybe_kick_lo(mdev); + return TRUE; +} + +STATIC int receive_DataReply(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct drbd_request *req; + sector_t sector; + unsigned int header_size, data_size; + int ok; + struct Drbd_Data_Packet *p = (struct Drbd_Data_Packet *)h; + + header_size = sizeof(*p) - sizeof(*h); + data_size = h->length - header_size; + + ERR_IF(data_size == 0) return FALSE; + + if (drbd_recv(mdev, h->payload, header_size) != header_size) + return FALSE; + + sector = be64_to_cpu(p->sector); + + spin_lock_irq(&mdev->req_lock); + req = _ar_id_to_req(mdev, p->block_id, sector); + spin_unlock_irq(&mdev->req_lock); + if (unlikely(!req)) { + ERR("Got a corrupt block_id/sector pair(1).\n"); + return FALSE; + } + + /* hlist_del(&req->colision) is done in _req_may_be_done, to avoid + * special casing it there for the various failure cases. + * still no race with drbd_fail_pending_reads */ + ok = recv_dless_read(mdev, req, sector, data_size); + + if (ok) + req_mod(req, data_received, 0); + /* else: nothing. handled from drbd_disconnect... + * I don't think we may complete this just yet + * in case we are "on-disconnect: freeze" */ + + return ok; +} + +STATIC int receive_RSDataReply(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + sector_t sector; + unsigned int header_size, data_size; + int ok; + struct Drbd_Data_Packet *p = (struct Drbd_Data_Packet *)h; + + header_size = sizeof(*p) - sizeof(*h); + data_size = h->length - header_size; + + ERR_IF(data_size == 0) return FALSE; + + if (drbd_recv(mdev, h->payload, header_size) != header_size) + return FALSE; + + sector = be64_to_cpu(p->sector); + D_ASSERT(p->block_id == ID_SYNCER); + + if (inc_local(mdev)) { + /* data is submitted to disk within recv_resync_read. + * corresponding dec_local done below on error, + * or in drbd_endio_write_sec. */ + ok = recv_resync_read(mdev, sector, data_size); + } else { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Can not write resync data to local disk.\n"); + + ok = drbd_drain_block(mdev, data_size); + + drbd_send_ack_dp(mdev, NegAck, p); + } + + return ok; +} + +/* e_end_block() is called via drbd_process_done_ee(). + * this means this function only runs in the asender thread + */ +STATIC int e_end_block(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + sector_t sector = e->sector; + struct drbd_epoch *epoch; + int ok = 1, pcmd; + + if (e->flags & EE_IS_BARRIER) { + epoch = previous_epoch(mdev, e->epoch); + if (epoch) + drbd_may_finish_epoch(mdev, epoch, EV_barrier_done); + } + + if (mdev->net_conf->wire_protocol == DRBD_PROT_C) { + if (likely(drbd_bio_uptodate(e->private_bio))) { + pcmd = (mdev->state.conn >= SyncSource && + mdev->state.conn <= PausedSyncT && + e->flags & EE_MAY_SET_IN_SYNC) ? + RSWriteAck : WriteAck; + ok &= drbd_send_ack(mdev, pcmd, e); + if (pcmd == RSWriteAck) + drbd_set_in_sync(mdev, sector, e->size); + } else { + ok = drbd_send_ack(mdev, NegAck, e); + ok &= drbd_io_error(mdev, FALSE); + /* we expect it to be marked out of sync anyways... + * maybe assert this? */ + } + dec_unacked(mdev); + } else if (unlikely(!drbd_bio_uptodate(e->private_bio))) { + ok = drbd_io_error(mdev, FALSE); + } + + /* we delete from the conflict detection hash _after_ we sent out the + * WriteAck / NegAck, to get the sequence number right. */ + if (mdev->net_conf->two_primaries) { + spin_lock_irq(&mdev->req_lock); + D_ASSERT(!hlist_unhashed(&e->colision)); + hlist_del_init(&e->colision); + spin_unlock_irq(&mdev->req_lock); + } else { + D_ASSERT(hlist_unhashed(&e->colision)); + } + + drbd_may_finish_epoch(mdev, e->epoch, EV_put); + + return ok; +} + +STATIC int e_send_discard_ack(struct drbd_conf *mdev, struct drbd_work *w, int unused) +{ + struct Tl_epoch_entry *e = (struct Tl_epoch_entry *)w; + int ok = 1; + + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_C); + ok = drbd_send_ack(mdev, DiscardAck, e); + + spin_lock_irq(&mdev->req_lock); + D_ASSERT(!hlist_unhashed(&e->colision)); + hlist_del_init(&e->colision); + spin_unlock_irq(&mdev->req_lock); + + dec_unacked(mdev); + + return ok; +} + +/* Called from receive_Data. + * Synchronize packets on sock with packets on msock. + * + * This is here so even when a Data packet traveling via sock overtook an Ack + * packet traveling on msock, they are still processed in the order they have + * been sent. + * + * Note: we don't care for Ack packets overtaking Data packets. + * + * In case packet_seq is larger than mdev->peer_seq number, there are + * outstanding packets on the msock. We wait for them to arrive. + * In case we are the logically next packet, we update mdev->peer_seq + * ourselves. Correctly handles 32bit wrap around. + * + * Assume we have a 10 GBit connection, that is about 1<<30 byte per second, + * about 1<<21 sectors per second. So "worst" case, we have 1<<3 == 8 seconds + * for the 24bit wrap (historical atomic_t guarantee on some archs), and we have + * 1<<9 == 512 seconds aka ages for the 32bit wrap around... + * + * returns 0 if we may process the packet, + * -ERESTARTSYS if we were interrupted (by disconnect signal). */ +static int drbd_wait_peer_seq(struct drbd_conf *mdev, const u32 packet_seq) +{ + DEFINE_WAIT(wait); + unsigned int p_seq; + long timeout; + int ret = 0; + spin_lock(&mdev->peer_seq_lock); + for (;;) { + prepare_to_wait(&mdev->seq_wait, &wait, TASK_INTERRUPTIBLE); + if (seq_le(packet_seq, mdev->peer_seq+1)) + break; + if (signal_pending(current)) { + ret = -ERESTARTSYS; + break; + } + p_seq = mdev->peer_seq; + spin_unlock(&mdev->peer_seq_lock); + timeout = schedule_timeout(30*HZ); + spin_lock(&mdev->peer_seq_lock); + if (timeout == 0 && p_seq == mdev->peer_seq) { + ret = -ETIMEDOUT; + ERR("ASSERT FAILED waited 30 seconds for sequence update, forcing reconnect\n"); + break; + } + } + finish_wait(&mdev->seq_wait, &wait); + if (mdev->peer_seq+1 == packet_seq) + mdev->peer_seq++; + spin_unlock(&mdev->peer_seq_lock); + return ret; +} + +/* mirrored write */ +STATIC int receive_Data(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + sector_t sector; + struct Tl_epoch_entry *e; + struct Drbd_Data_Packet *p = (struct Drbd_Data_Packet *)h; + int header_size, data_size; + int rw = WRITE; + u32 dp_flags; + + header_size = sizeof(*p) - sizeof(*h); + data_size = h->length - header_size; + + ERR_IF(data_size == 0) return FALSE; + + if (drbd_recv(mdev, h->payload, header_size) != header_size) + return FALSE; + + if (!inc_local(mdev)) { + /* data is submitted to disk at the end of this function. + * corresponding dec_local done either below (on error), + * or in drbd_endio_write_sec. */ + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Can not write mirrored data block " + "to local disk.\n"); + spin_lock(&mdev->peer_seq_lock); + if (mdev->peer_seq+1 == be32_to_cpu(p->seq_num)) + mdev->peer_seq++; + spin_unlock(&mdev->peer_seq_lock); + + drbd_send_ack_dp(mdev, NegAck, p); + atomic_inc(&mdev->current_epoch->epoch_size); + return drbd_drain_block(mdev, data_size); + } + + sector = be64_to_cpu(p->sector); + e = read_in_block(mdev, p->block_id, sector, data_size); + if (!e) { + dec_local(mdev); + return FALSE; + } + + e->private_bio->bi_end_io = drbd_endio_write_sec; + e->w.cb = e_end_block; + + spin_lock(&mdev->epoch_lock); + e->epoch = mdev->current_epoch; + atomic_inc(&e->epoch->epoch_size); + atomic_inc(&e->epoch->active); + + if (mdev->write_ordering == WO_bio_barrier && atomic_read(&e->epoch->epoch_size) == 1) { + struct drbd_epoch *epoch; + /* Issue a barrier if we start a new epoch, and the previous epoch + was not a epoch containing a single request which already was + a Barrier. */ + epoch = list_entry(e->epoch->list.prev, struct drbd_epoch, list); + if (epoch == e->epoch) { + MTRACE(TraceTypeEpochs, TraceLvlMetrics, + INFO("Add barrier %p/%d\n", + epoch, epoch->barrier_nr); + ); + set_bit(DE_CONTAINS_A_BARRIER, &e->epoch->flags); + rw |= (1<flags |= EE_IS_BARRIER; + } else { + if (atomic_read(&epoch->epoch_size) > 1 || + !test_bit(DE_CONTAINS_A_BARRIER, &epoch->flags)) { + MTRACE(TraceTypeEpochs, TraceLvlMetrics, + INFO("Add barrier %p/%d, setting bi in %p/%d\n", + e->epoch, e->epoch->barrier_nr, + epoch, epoch->barrier_nr); + ); + set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags); + set_bit(DE_CONTAINS_A_BARRIER, &e->epoch->flags); + rw |= (1<flags |= EE_IS_BARRIER; + } + } + } + spin_unlock(&mdev->epoch_lock); + + dp_flags = be32_to_cpu(p->dp_flags); + if (dp_flags & DP_HARDBARRIER) + rw |= (1<flags |= EE_MAY_SET_IN_SYNC; + + /* I'm the receiver, I do hold a net_cnt reference. */ + if (!mdev->net_conf->two_primaries) { + spin_lock_irq(&mdev->req_lock); + } else { + /* don't get the req_lock yet, + * we may sleep in drbd_wait_peer_seq */ + const int size = e->size; + const int discard = test_bit(DISCARD_CONCURRENT, &mdev->flags); + DEFINE_WAIT(wait); + struct drbd_request *i; + struct hlist_node *n; + struct hlist_head *slot; + int first; + + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_C); + BUG_ON(mdev->ee_hash == NULL); + BUG_ON(mdev->tl_hash == NULL); + + /* conflict detection and handling: + * 1. wait on the sequence number, + * in case this data packet overtook ACK packets. + * 2. check our hash tables for conflicting requests. + * we only need to walk the tl_hash, since an ee can not + * have a conflict with an other ee: on the submitting + * node, the corresponding req had already been conflicting, + * and a conflicting req is never sent. + * + * Note: for two_primaries, we are protocol C, + * so there cannot be any request that is DONE + * but still on the transfer log. + * + * unconditionally add to the ee_hash. + * + * if no conflicting request is found: + * submit. + * + * if any conflicting request is found + * that has not yet been acked, + * AND I have the "discard concurrent writes" flag: + * queue (via done_ee) the DiscardAck; OUT. + * + * if any conflicting request is found: + * block the receiver, waiting on misc_wait + * until no more conflicting requests are there, + * or we get interrupted (disconnect). + * + * we do not just write after local io completion of those + * requests, but only after req is done completely, i.e. + * we wait for the DiscardAck to arrive! + * + * then proceed normally, i.e. submit. + */ + if (drbd_wait_peer_seq(mdev, be32_to_cpu(p->seq_num))) + goto out_interrupted; + + spin_lock_irq(&mdev->req_lock); + + hlist_add_head(&e->colision, ee_hash_slot(mdev, sector)); + +#define OVERLAPS overlaps(i->sector, i->size, sector, size) + slot = tl_hash_slot(mdev, sector); + first = 1; + for (;;) { + int have_unacked = 0; + int have_conflict = 0; + prepare_to_wait(&mdev->misc_wait, &wait, + TASK_INTERRUPTIBLE); + hlist_for_each_entry(i, n, slot, colision) { + if (OVERLAPS) { + /* only ALERT on first iteration, + * we may be woken up early... */ + if (first) + ALERT("%s[%u] Concurrent local write detected!" + " new: %llus +%u; pending: %llus +%u\n", + current->comm, current->pid, + (unsigned long long)sector, size, + (unsigned long long)i->sector, i->size); + if (i->rq_state & RQ_NET_PENDING) + ++have_unacked; + ++have_conflict; + } + } +#undef OVERLAPS + if (!have_conflict) + break; + + /* Discard Ack only for the _first_ iteration */ + if (first && discard && have_unacked) { + ALERT("Concurrent write! [DISCARD BY FLAG] sec=%llus\n", + (unsigned long long)sector); + inc_unacked(mdev); + e->w.cb = e_send_discard_ack; + list_add_tail(&e->w.list, &mdev->done_ee); + + spin_unlock_irq(&mdev->req_lock); + + /* we could probably send that DiscardAck ourselves, + * but I don't like the receiver using the msock */ + + dec_local(mdev); + wake_asender(mdev); + finish_wait(&mdev->misc_wait, &wait); + return TRUE; + } + + if (signal_pending(current)) { + hlist_del_init(&e->colision); + + spin_unlock_irq(&mdev->req_lock); + + finish_wait(&mdev->misc_wait, &wait); + goto out_interrupted; + } + + spin_unlock_irq(&mdev->req_lock); + if (first) { + first = 0; + ALERT("Concurrent write! [W AFTERWARDS] " + "sec=%llus\n", (unsigned long long)sector); + } else if (discard) { + /* we had none on the first iteration. + * there must be none now. */ + D_ASSERT(have_unacked == 0); + } + schedule(); + spin_lock_irq(&mdev->req_lock); + } + finish_wait(&mdev->misc_wait, &wait); + } + + list_add(&e->w.list, &mdev->active_ee); + spin_unlock_irq(&mdev->req_lock); + + switch (mdev->net_conf->wire_protocol) { + case DRBD_PROT_C: + inc_unacked(mdev); + /* corresponding dec_unacked() in e_end_block() + * respective _drbd_clear_done_ee */ + break; + case DRBD_PROT_B: + /* I really don't like it that the receiver thread + * sends on the msock, but anyways */ + drbd_send_ack(mdev, RecvAck, e); + break; + case DRBD_PROT_A: + /* nothing to do */ + break; + } + + if (mdev->state.pdsk == Diskless) { + /* In case we have the only disk of the cluster, */ + drbd_set_out_of_sync(mdev, e->sector, e->size); + e->flags |= EE_CALL_AL_COMPLETE_IO; + drbd_al_begin_io(mdev, e->sector); + } + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("submit EE (DATA)WRITE sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + + e->private_bio->bi_rw = rw; + dump_internal_bio("Sec", mdev, e->private_bio, 0); + drbd_generic_make_request(mdev, DRBD_FAULT_DT_WR, e->private_bio); + /* accounting done in endio */ + + maybe_kick_lo(mdev); + return TRUE; + +out_interrupted: + /* yes, the epoch_size now is imbalanced. + * but we drop the connection anyways, so we don't have a chance to + * receive a barrier... atomic_inc(&mdev->epoch_size); */ + dec_local(mdev); + drbd_free_ee(mdev, e); + return FALSE; +} + +STATIC int receive_DataRequest(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + sector_t sector; + const sector_t capacity = drbd_get_capacity(mdev->this_bdev); + struct Tl_epoch_entry *e; + struct digest_info *di; + int size, digest_size; + unsigned int fault_type; + struct Drbd_BlockRequest_Packet *p = + (struct Drbd_BlockRequest_Packet *)h; + const int brps = sizeof(*p)-sizeof(*h); + + if (drbd_recv(mdev, h->payload, brps) != brps) + return FALSE; + + sector = be64_to_cpu(p->sector); + size = be32_to_cpu(p->blksize); + + if (size <= 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_SEGMENT_SIZE) { + ERR("%s:%d: sector: %llus, size: %u\n", __FILE__, __LINE__, + (unsigned long long)sector, size); + return FALSE; + } + if (sector + (size>>9) > capacity) { + ERR("%s:%d: sector: %llus, size: %u\n", __FILE__, __LINE__, + (unsigned long long)sector, size); + return FALSE; + } + + if (!inc_local_if_state(mdev, UpToDate)) { + if (__ratelimit(&drbd_ratelimit_state)) + ERR("Can not satisfy peer's read request, " + "no local data.\n"); + drbd_send_ack_rp(mdev, h->command == DataRequest ? NegDReply : + NegRSDReply , p); + return TRUE; + } + + e = drbd_alloc_ee(mdev, p->block_id, sector, size, GFP_KERNEL); + if (!e) { + dec_local(mdev); + return FALSE; + } + + e->private_bio->bi_rw = READ; + e->private_bio->bi_end_io = drbd_endio_read_sec; + + switch (h->command) { + case DataRequest: + e->w.cb = w_e_end_data_req; + fault_type = DRBD_FAULT_DT_RD; + break; + case RSDataRequest: + e->w.cb = w_e_end_rsdata_req; + fault_type = DRBD_FAULT_RS_RD; + /* Eventually this should become asynchrously. Currently it + * blocks the whole receiver just to delay the reading of a + * resync data block. + * the drbd_work_queue mechanism is made for this... + */ + if (!drbd_rs_begin_io(mdev, sector)) { + /* we have been interrupted, + * probably connection lost! */ + D_ASSERT(signal_pending(current)); + dec_local(mdev); + drbd_free_ee(mdev, e); + return 0; + } + break; + + case OVReply: + case CsumRSRequest: + fault_type = DRBD_FAULT_RS_RD; + digest_size = h->length - brps ; + di = kmalloc(sizeof(*di) + digest_size, GFP_KERNEL); + if (!di) { + dec_local(mdev); + drbd_free_ee(mdev, e); + return 0; + } + + di->digest_size = digest_size; + di->digest = (((char *)di)+sizeof(struct digest_info)); + + if (drbd_recv(mdev, di->digest, digest_size) != digest_size) { + dec_local(mdev); + drbd_free_ee(mdev, e); + kfree(di); + return FALSE; + } + + e->block_id = (u64)(unsigned long)di; + if (h->command == CsumRSRequest) { + D_ASSERT(mdev->agreed_pro_version >= 89); + e->w.cb = w_e_end_csum_rs_req; + } else if (h->command == OVReply) { + e->w.cb = w_e_end_ov_reply; + dec_rs_pending(mdev); + break; + } + + if (!drbd_rs_begin_io(mdev, sector)) { + /* we have been interrupted, probably connection lost! */ + D_ASSERT(signal_pending(current)); + drbd_free_ee(mdev, e); + kfree(di); + dec_local(mdev); + return FALSE; + } + break; + + case OVRequest: + e->w.cb = w_e_end_ov_req; + fault_type = DRBD_FAULT_RS_RD; + /* Eventually this should become asynchrously. Currently it + * blocks the whole receiver just to delay the reading of a + * resync data block. + * the drbd_work_queue mechanism is made for this... + */ + if (!drbd_rs_begin_io(mdev, sector)) { + /* we have been interrupted, + * probably connection lost! */ + D_ASSERT(signal_pending(current)); + dec_local(mdev); + drbd_free_ee(mdev, e); + return 0; + } + break; + + + default: + ERR("unexpected command (%s) in receive_DataRequest\n", + cmdname(h->command)); + fault_type = DRBD_FAULT_MAX; + } + + spin_lock_irq(&mdev->req_lock); + list_add(&e->w.list, &mdev->read_ee); + spin_unlock_irq(&mdev->req_lock); + + inc_unacked(mdev); + + MTRACE(TraceTypeEE, TraceLvlAll, + INFO("submit EE READ sec=%llus size=%u ee=%p\n", + (unsigned long long)e->sector, e->size, e); + ); + + dump_internal_bio("Sec", mdev, e->private_bio, 0); + drbd_generic_make_request(mdev, fault_type, e->private_bio); + maybe_kick_lo(mdev); + + return TRUE; +} + +STATIC int drbd_asb_recover_0p(struct drbd_conf *mdev) __must_hold(local) +{ + int self, peer, rv = -100; + unsigned long ch_self, ch_peer; + + self = mdev->bc->md.uuid[Bitmap] & 1; + peer = mdev->p_uuid[Bitmap] & 1; + + ch_peer = mdev->p_uuid[UUID_SIZE]; + ch_self = mdev->comm_bm_set; + + switch (mdev->net_conf->after_sb_0p) { + case Consensus: + case DiscardSecondary: + case CallHelper: + ERR("Configuration error.\n"); + break; + case Disconnect: + break; + case DiscardYoungerPri: + if (self == 0 && peer == 1) { + rv = -1; + break; + } + if (self == 1 && peer == 0) { + rv = 1; + break; + } + /* Else fall through to one of the other strategies... */ + case DiscardOlderPri: + if (self == 0 && peer == 1) { + rv = 1; + break; + } + if (self == 1 && peer == 0) { + rv = -1; + break; + } + /* Else fall through to one of the other strategies... */ + drbd_WARN("Discard younger/older primary did not found a decision\n" + "Using discard-least-changes instead\n"); + case DiscardZeroChg: + if (ch_peer == 0 && ch_self == 0) { + rv = test_bit(DISCARD_CONCURRENT, &mdev->flags) + ? -1 : 1; + break; + } else { + if (ch_peer == 0) { rv = 1; break; } + if (ch_self == 0) { rv = -1; break; } + } + if (mdev->net_conf->after_sb_0p == DiscardZeroChg) + break; + case DiscardLeastChg: + if (ch_self < ch_peer) + rv = -1; + else if (ch_self > ch_peer) + rv = 1; + else /* ( ch_self == ch_peer ) */ + /* Well, then use something else. */ + rv = test_bit(DISCARD_CONCURRENT, &mdev->flags) + ? -1 : 1; + break; + case DiscardLocal: + rv = -1; + break; + case DiscardRemote: + rv = 1; + } + + return rv; +} + +STATIC int drbd_asb_recover_1p(struct drbd_conf *mdev) __must_hold(local) +{ + int self, peer, hg, rv = -100; + + self = mdev->bc->md.uuid[Bitmap] & 1; + peer = mdev->p_uuid[Bitmap] & 1; + + switch (mdev->net_conf->after_sb_1p) { + case DiscardYoungerPri: + case DiscardOlderPri: + case DiscardLeastChg: + case DiscardLocal: + case DiscardRemote: + ERR("Configuration error.\n"); + break; + case Disconnect: + break; + case Consensus: + hg = drbd_asb_recover_0p(mdev); + if (hg == -1 && mdev->state.role == Secondary) + rv = hg; + if (hg == 1 && mdev->state.role == Primary) + rv = hg; + break; + case Violently: + rv = drbd_asb_recover_0p(mdev); + break; + case DiscardSecondary: + return mdev->state.role == Primary ? 1 : -1; + case CallHelper: + hg = drbd_asb_recover_0p(mdev); + if (hg == -1 && mdev->state.role == Primary) { + self = drbd_set_role(mdev, Secondary, 0); + if (self != SS_Success) { + drbd_khelper(mdev, "pri-lost-after-sb"); + } else { + drbd_WARN("Sucessfully gave up primary role.\n"); + rv = hg; + } + } else + rv = hg; + } + + return rv; +} + +STATIC int drbd_asb_recover_2p(struct drbd_conf *mdev) __must_hold(local) +{ + int self, peer, hg, rv = -100; + + self = mdev->bc->md.uuid[Bitmap] & 1; + peer = mdev->p_uuid[Bitmap] & 1; + + switch (mdev->net_conf->after_sb_2p) { + case DiscardYoungerPri: + case DiscardOlderPri: + case DiscardLeastChg: + case DiscardLocal: + case DiscardRemote: + case Consensus: + case DiscardSecondary: + ERR("Configuration error.\n"); + break; + case Violently: + rv = drbd_asb_recover_0p(mdev); + break; + case Disconnect: + break; + case CallHelper: + hg = drbd_asb_recover_0p(mdev); + if (hg == -1) { + self = drbd_set_role(mdev, Secondary, 0); + if (self != SS_Success) { + drbd_khelper(mdev, "pri-lost-after-sb"); + } else { + drbd_WARN("Sucessfully gave up primary role.\n"); + rv = hg; + } + } else + rv = hg; + } + + return rv; +} + +STATIC void drbd_uuid_dump(struct drbd_conf *mdev, char *text, u64 *uuid, + u64 bits, u64 flags) +{ + if (!uuid) { + INFO("%s uuid info vanished while I was looking!\n", text); + return; + } + INFO("%s %016llX:%016llX:%016llX:%016llX bits:%llu flags:%llX\n", + text, + (unsigned long long)uuid[Current], + (unsigned long long)uuid[Bitmap], + (unsigned long long)uuid[History_start], + (unsigned long long)uuid[History_end], + (unsigned long long)bits, + (unsigned long long)flags); +} + +/* + 100 after split brain try auto recover + 2 SyncSource set BitMap + 1 SyncSource use BitMap + 0 no Sync + -1 SyncTarget use BitMap + -2 SyncTarget set BitMap + -100 after split brain, disconnect +-1000 unrelated data + */ +STATIC int drbd_uuid_compare(struct drbd_conf *mdev, int *rule_nr) __must_hold(local) +{ + u64 self, peer; + int i, j; + + self = mdev->bc->md.uuid[Current] & ~((u64)1); + peer = mdev->p_uuid[Current] & ~((u64)1); + + *rule_nr = 1; + if (self == UUID_JUST_CREATED && peer == UUID_JUST_CREATED) + return 0; + + *rule_nr = 2; + if ((self == UUID_JUST_CREATED || self == (u64)0) && + peer != UUID_JUST_CREATED) + return -2; + + *rule_nr = 3; + if (self != UUID_JUST_CREATED && + (peer == UUID_JUST_CREATED || peer == (u64)0)) + return 2; + + *rule_nr = 4; + if (self == peer) { /* Common power [off|failure] */ + int rct, dc; /* roles at crash time */ + + rct = (test_bit(CRASHED_PRIMARY, &mdev->flags) ? 1 : 0) + + (mdev->p_uuid[UUID_FLAGS] & 2); + /* lowest bit is set when we were primary, + * next bit (weight 2) is set when peer was primary */ + + MTRACE(TraceTypeUuid, TraceLvlMetrics, DUMPI(rct);); + + switch (rct) { + case 0: /* !self_pri && !peer_pri */ return 0; + case 1: /* self_pri && !peer_pri */ return 1; + case 2: /* !self_pri && peer_pri */ return -1; + case 3: /* self_pri && peer_pri */ + dc = test_bit(DISCARD_CONCURRENT, &mdev->flags); + MTRACE(TraceTypeUuid, TraceLvlMetrics, DUMPI(dc);); + return dc ? -1 : 1; + } + } + + *rule_nr = 5; + peer = mdev->p_uuid[Bitmap] & ~((u64)1); + if (self == peer) + return -1; + + *rule_nr = 6; + for (i = History_start; i <= History_end; i++) { + peer = mdev->p_uuid[i] & ~((u64)1); + if (self == peer) + return -2; + } + + *rule_nr = 7; + self = mdev->bc->md.uuid[Bitmap] & ~((u64)1); + peer = mdev->p_uuid[Current] & ~((u64)1); + if (self == peer) + return 1; + + *rule_nr = 8; + for (i = History_start; i <= History_end; i++) { + self = mdev->bc->md.uuid[i] & ~((u64)1); + if (self == peer) + return 2; + } + + *rule_nr = 9; + self = mdev->bc->md.uuid[Bitmap] & ~((u64)1); + peer = mdev->p_uuid[Bitmap] & ~((u64)1); + if (self == peer && self != ((u64)0)) + return 100; + + *rule_nr = 10; + for (i = History_start; i <= History_end; i++) { + self = mdev->p_uuid[i] & ~((u64)1); + for (j = History_start; j <= History_end; j++) { + peer = mdev->p_uuid[j] & ~((u64)1); + if (self == peer) + return -100; + } + } + + return -1000; +} + +/* drbd_sync_handshake() returns the new conn state on success, or + conn_mask (-1) on failure. + */ +STATIC enum drbd_conns drbd_sync_handshake(struct drbd_conf *mdev, enum drbd_role peer_role, + enum drbd_disk_state peer_disk) __must_hold(local) +{ + int hg, rule_nr; + enum drbd_conns rv = conn_mask; + enum drbd_disk_state mydisk; + + mydisk = mdev->state.disk; + if (mydisk == Negotiating) + mydisk = mdev->new_state_tmp.disk; + + hg = drbd_uuid_compare(mdev, &rule_nr); + + INFO("drbd_sync_handshake:\n"); + drbd_uuid_dump(mdev, "self", mdev->bc->md.uuid, + mdev->state.disk >= Negotiating ? drbd_bm_total_weight(mdev) : 0, 0); + drbd_uuid_dump(mdev, "peer", mdev->p_uuid, + mdev->p_uuid[UUID_SIZE], mdev->p_uuid[UUID_FLAGS]); + INFO("uuid_compare()=%d by rule %d\n", hg, rule_nr); + + if (hg == -1000) { + ALERT("Unrelated data, aborting!\n"); + return conn_mask; + } + + if ((mydisk == Inconsistent && peer_disk > Inconsistent) || + (peer_disk == Inconsistent && mydisk > Inconsistent)) { + int f = (hg == -100) || abs(hg) == 2; + hg = mydisk > Inconsistent ? 1 : -1; + if (f) + hg = hg*2; + INFO("Becoming sync %s due to disk states.\n", + hg > 0 ? "source" : "target"); + } + + if (hg == 100 || (hg == -100 && mdev->net_conf->always_asbp)) { + int pcount = (mdev->state.role == Primary) + + (peer_role == Primary); + int forced = (hg == -100); + + switch (pcount) { + case 0: + hg = drbd_asb_recover_0p(mdev); + break; + case 1: + hg = drbd_asb_recover_1p(mdev); + break; + case 2: + hg = drbd_asb_recover_2p(mdev); + break; + } + if (abs(hg) < 100) { + drbd_WARN("Split-Brain detected, %d primaries, " + "automatically solved. Sync from %s node\n", + pcount, (hg < 0) ? "peer" : "this"); + if (forced) { + drbd_WARN("Doing a full sync, since" + " UUIDs where ambiguous.\n"); + hg = hg*2; + } + } + } + + if (hg == -100) { + if (mdev->net_conf->want_lose && !(mdev->p_uuid[UUID_FLAGS]&1)) + hg = -1; + if (!mdev->net_conf->want_lose && (mdev->p_uuid[UUID_FLAGS]&1)) + hg = 1; + + if (abs(hg) < 100) + drbd_WARN("Split-Brain detected, manually solved. " + "Sync from %s node\n", + (hg < 0) ? "peer" : "this"); + } + + if (hg == -100) { + ALERT("Split-Brain detected, dropping connection!\n"); + drbd_khelper(mdev, "split-brain"); + return conn_mask; + } + + if (hg > 0 && mydisk <= Inconsistent) { + ERR("I shall become SyncSource, but I am inconsistent!\n"); + return conn_mask; + } + + if (hg < 0 && /* by intention we do not use mydisk here. */ + mdev->state.role == Primary && mdev->state.disk >= Consistent) { + switch (mdev->net_conf->rr_conflict) { + case CallHelper: + drbd_khelper(mdev, "pri-lost"); + /* fall through */ + case Disconnect: + ERR("I shall become SyncTarget, but I am primary!\n"); + return conn_mask; + case Violently: + drbd_WARN("Becoming SyncTarget, violating the stable-data" + "assumption\n"); + } + } + + if (abs(hg) >= 2) { + INFO("Writing the whole bitmap, full sync required after drbd_sync_handshake.\n"); + if (drbd_bitmap_io(mdev, &drbd_bmio_set_n_write, "set_n_write from sync_handshake")) + return conn_mask; + } + + if (hg > 0) { /* become sync source. */ + rv = WFBitMapS; + } else if (hg < 0) { /* become sync target */ + rv = WFBitMapT; + } else { + rv = Connected; + if (drbd_bm_total_weight(mdev)) { + INFO("No resync, but %lu bits in bitmap!\n", + drbd_bm_total_weight(mdev)); + } + } + + drbd_bm_recount_bits(mdev); + + return rv; +} + +/* returns 1 if invalid */ +STATIC int cmp_after_sb(enum after_sb_handler peer, enum after_sb_handler self) +{ + /* DiscardRemote - DiscardLocal is valid */ + if ((peer == DiscardRemote && self == DiscardLocal) || + (self == DiscardRemote && peer == DiscardLocal)) + return 0; + + /* any other things with DiscardRemote or DiscardLocal are invalid */ + if (peer == DiscardRemote || peer == DiscardLocal || + self == DiscardRemote || self == DiscardLocal) + return 1; + + /* everything else is valid if they are equal on both sides. */ + if (peer == self) + return 0; + + /* everything es is invalid. */ + return 1; +} + +STATIC int receive_protocol(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_Protocol_Packet *p = (struct Drbd_Protocol_Packet *)h; + int header_size, data_size; + int p_proto, p_after_sb_0p, p_after_sb_1p, p_after_sb_2p; + int p_want_lose, p_two_primaries; + char p_integrity_alg[SHARED_SECRET_MAX] = ""; + + header_size = sizeof(*p) - sizeof(*h); + data_size = h->length - header_size; + + if (drbd_recv(mdev, h->payload, header_size) != header_size) + return FALSE; + + p_proto = be32_to_cpu(p->protocol); + p_after_sb_0p = be32_to_cpu(p->after_sb_0p); + p_after_sb_1p = be32_to_cpu(p->after_sb_1p); + p_after_sb_2p = be32_to_cpu(p->after_sb_2p); + p_want_lose = be32_to_cpu(p->want_lose); + p_two_primaries = be32_to_cpu(p->two_primaries); + + if (p_proto != mdev->net_conf->wire_protocol) { + ERR("incompatible communication protocols\n"); + goto disconnect; + } + + if (cmp_after_sb(p_after_sb_0p, mdev->net_conf->after_sb_0p)) { + ERR("incompatible after-sb-0pri settings\n"); + goto disconnect; + } + + if (cmp_after_sb(p_after_sb_1p, mdev->net_conf->after_sb_1p)) { + ERR("incompatible after-sb-1pri settings\n"); + goto disconnect; + } + + if (cmp_after_sb(p_after_sb_2p, mdev->net_conf->after_sb_2p)) { + ERR("incompatible after-sb-2pri settings\n"); + goto disconnect; + } + + if (p_want_lose && mdev->net_conf->want_lose) { + ERR("both sides have the 'want_lose' flag set\n"); + goto disconnect; + } + + if (p_two_primaries != mdev->net_conf->two_primaries) { + ERR("incompatible setting of the two-primaries options\n"); + goto disconnect; + } + + if (mdev->agreed_pro_version >= 87) { + unsigned char *my_alg = mdev->net_conf->integrity_alg; + + if (drbd_recv(mdev, p_integrity_alg, data_size) != data_size) + return FALSE; + + p_integrity_alg[SHARED_SECRET_MAX-1] = 0; + if (strcmp(p_integrity_alg, my_alg)) { + ERR("incompatible setting of the data-integrity-alg\n"); + goto disconnect; + } + INFO("data-integrity-alg: %s\n", + my_alg[0] ? my_alg : (unsigned char *)""); + } + + return TRUE; + +disconnect: + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; +} + +/* helper function + * input: alg name, feature name + * return: NULL (alg name was "") + * ERR_PTR(error) if something goes wrong + * or the crypto hash ptr, if it worked out ok. */ +struct crypto_hash *drbd_crypto_alloc_digest_safe(const struct drbd_conf *mdev, + const char *alg, const char *name) +{ + struct crypto_hash *tfm; + + if (!alg[0]) + return NULL; + + tfm = crypto_alloc_hash(alg, 0, CRYPTO_ALG_ASYNC); + if (IS_ERR(tfm)) { + ERR("Can not allocate \"%s\" as %s (reason: %ld)\n", + alg, name, PTR_ERR(tfm)); + return tfm; + } + if (crypto_tfm_alg_type(crypto_hash_tfm(tfm)) != CRYPTO_ALG_TYPE_DIGEST) { + crypto_free_hash(tfm); + ERR("\"%s\" is not a digest (%s)\n", alg, name); + return ERR_PTR(-EINVAL); + } + return tfm; +} + +STATIC int receive_SyncParam(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + int ok = TRUE; + struct Drbd_SyncParam89_Packet *p = (struct Drbd_SyncParam89_Packet *)h; + unsigned int header_size, data_size, exp_max_sz; + struct crypto_hash *verify_tfm = NULL; + struct crypto_hash *csums_tfm = NULL; + const int apv = mdev->agreed_pro_version; + + exp_max_sz = apv <= 87 ? sizeof(struct Drbd_SyncParam_Packet) + : apv == 88 ? sizeof(struct Drbd_SyncParam_Packet) + + SHARED_SECRET_MAX + : /* 89 */ sizeof(struct Drbd_SyncParam89_Packet); + + if (h->length > exp_max_sz) { + ERR("SyncParam packet too long: received %u, expected <= %u bytes\n", + h->length, exp_max_sz); + return FALSE; + } + + if (apv <= 88) { + header_size = sizeof(struct Drbd_SyncParam_Packet) - sizeof(*h); + data_size = h->length - header_size; + } else /* apv >= 89 */ { + header_size = sizeof(struct Drbd_SyncParam89_Packet) - sizeof(*h); + data_size = h->length - header_size; + D_ASSERT(data_size == 0); + } + + /* initialize verify_alg and csums_alg */ + memset(p->verify_alg, 0, 2 * SHARED_SECRET_MAX); + + if (drbd_recv(mdev, h->payload, header_size) != header_size) + return FALSE; + + mdev->sync_conf.rate = be32_to_cpu(p->rate); + + if (apv >= 88) { + if (apv == 88) { + if (data_size > SHARED_SECRET_MAX) { + ERR("verify-alg too long, " + "peer wants %u, accepting only %u byte\n", + data_size, SHARED_SECRET_MAX); + return FALSE; + } + + if (drbd_recv(mdev, p->verify_alg, data_size) != data_size) + return FALSE; + + /* we expect NUL terminated string */ + /* but just in case someone tries to be evil */ + D_ASSERT(p->verify_alg[data_size-1] == 0); + p->verify_alg[data_size-1] = 0; + + } else /* apv >= 89 */ { + /* we still expect NUL terminated strings */ + /* but just in case someone tries to be evil */ + D_ASSERT(p->verify_alg[SHARED_SECRET_MAX-1] == 0); + D_ASSERT(p->csums_alg[SHARED_SECRET_MAX-1] == 0); + p->verify_alg[SHARED_SECRET_MAX-1] = 0; + p->csums_alg[SHARED_SECRET_MAX-1] = 0; + } + + if (strcmp(mdev->sync_conf.verify_alg, p->verify_alg)) { + if (mdev->state.conn == WFReportParams) { + ERR("Different verify-alg settings. me=\"%s\" peer=\"%s\"\n", + mdev->sync_conf.verify_alg, p->verify_alg); + goto disconnect; + } + verify_tfm = drbd_crypto_alloc_digest_safe(mdev, + p->verify_alg, "verify-alg"); + if (IS_ERR(verify_tfm)) + goto disconnect; + } + + if (apv >= 89 && strcmp(mdev->sync_conf.csums_alg, p->csums_alg)) { + if (mdev->state.conn == WFReportParams) { + ERR("Different csums-alg settings. me=\"%s\" peer=\"%s\"\n", + mdev->sync_conf.csums_alg, p->csums_alg); + goto disconnect; + } + csums_tfm = drbd_crypto_alloc_digest_safe(mdev, + p->csums_alg, "csums-alg"); + if (IS_ERR(csums_tfm)) + goto disconnect; + } + + + spin_lock(&mdev->peer_seq_lock); + /* lock against drbd_nl_syncer_conf() */ + if (verify_tfm) { + strcpy(mdev->sync_conf.verify_alg, p->verify_alg); + mdev->sync_conf.verify_alg_len = strlen(p->verify_alg) + 1; + crypto_free_hash(mdev->verify_tfm); + mdev->verify_tfm = verify_tfm; + INFO("using verify-alg: \"%s\"\n", p->verify_alg); + } + if (csums_tfm) { + strcpy(mdev->sync_conf.csums_alg, p->csums_alg); + mdev->sync_conf.csums_alg_len = strlen(p->csums_alg) + 1; + crypto_free_hash(mdev->csums_tfm); + mdev->csums_tfm = csums_tfm; + INFO("using csums-alg: \"%s\"\n", p->csums_alg); + } + spin_unlock(&mdev->peer_seq_lock); + } + + return ok; +disconnect: + crypto_free_hash(verify_tfm); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; +} + +STATIC void drbd_setup_order_type(struct drbd_conf *mdev, int peer) +{ + /* sorry, we currently have no working implementation + * of distributed TCQ */ +} + +/* warn if the arguments differ by more than 12.5% */ +static void warn_if_differ_considerably(struct drbd_conf *mdev, + const char *s, sector_t a, sector_t b) +{ + sector_t d; + if (a == 0 || b == 0) + return; + d = (a > b) ? (a - b) : (b - a); + if (d > (a>>3) || d > (b>>3)) + drbd_WARN("Considerable difference in %s: %llus vs. %llus\n", s, + (unsigned long long)a, (unsigned long long)b); +} + +STATIC int receive_sizes(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_Sizes_Packet *p = (struct Drbd_Sizes_Packet *)h; + enum determin_dev_size_enum dd = unchanged; + unsigned int max_seg_s; + sector_t p_size, p_usize, my_usize; + int ldsc = 0; /* local disk size changed */ + enum drbd_conns nconn; + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) return FALSE; + if (drbd_recv(mdev, h->payload, h->length) != h->length) + return FALSE; + + p_size = be64_to_cpu(p->d_size); + p_usize = be64_to_cpu(p->u_size); + + if (p_size == 0 && mdev->state.disk == Diskless) { + ERR("some backing storage is needed\n"); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + + /* just store the peer's disk size for now. + * we still need to figure out wether we accept that. */ + mdev->p_size = p_size; + +#define min_not_zero(l, r) (l == 0) ? r : ((r == 0) ? l : min(l, r)) + if (inc_local(mdev)) { + warn_if_differ_considerably(mdev, "lower level device sizes", + p_size, drbd_get_max_capacity(mdev->bc)); + warn_if_differ_considerably(mdev, "user requested size", + p_usize, mdev->bc->dc.disk_size); + + /* if this is the first connect, or an otherwise expected + * param exchange, choose the minimum */ + if (mdev->state.conn == WFReportParams) + p_usize = min_not_zero((sector_t)mdev->bc->dc.disk_size, + p_usize); + + my_usize = mdev->bc->dc.disk_size; + + if (mdev->bc->dc.disk_size != p_usize) { + mdev->bc->dc.disk_size = p_usize; + INFO("Peer sets u_size to %lu sectors\n", + (unsigned long)mdev->bc->dc.disk_size); + } + + /* Never shrink a device with usable data during connect. + But allow online shrinking if we are connected. */ + if (drbd_new_dev_size(mdev, mdev->bc) < + drbd_get_capacity(mdev->this_bdev) && + mdev->state.disk >= Outdated && + mdev->state.conn < Connected) { + ERR("The peer's disk size is too small!\n"); + drbd_force_state(mdev, NS(conn, Disconnecting)); + mdev->bc->dc.disk_size = my_usize; + dec_local(mdev); + return FALSE; + } + dec_local(mdev); + } +#undef min_not_zero + + if (inc_local(mdev)) { + dd = drbd_determin_dev_size(mdev); + dec_local(mdev); + if (dd == dev_size_error) + return FALSE; + drbd_md_sync(mdev); + } else { + /* I am diskless, need to accept the peer's size. */ + drbd_set_my_capacity(mdev, p_size); + } + + if (mdev->p_uuid && mdev->state.conn <= Connected && inc_local(mdev)) { + nconn = drbd_sync_handshake(mdev, + mdev->state.peer, mdev->state.pdsk); + dec_local(mdev); + + if (nconn == conn_mask) { + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + + if (drbd_request_state(mdev, NS(conn, nconn)) < SS_Success) { + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + } + + if (inc_local(mdev)) { + if (mdev->bc->known_size != drbd_get_capacity(mdev->bc->backing_bdev)) { + mdev->bc->known_size = drbd_get_capacity(mdev->bc->backing_bdev); + ldsc = 1; + } + + max_seg_s = be32_to_cpu(p->max_segment_size); + if (max_seg_s != queue_max_segment_size(mdev->rq_queue)) + drbd_setup_queue_param(mdev, max_seg_s); + + drbd_setup_order_type(mdev, be32_to_cpu(p->queue_order_type)); + dec_local(mdev); + } + + if (mdev->state.conn > WFReportParams) { + if (be64_to_cpu(p->c_size) != + drbd_get_capacity(mdev->this_bdev) || ldsc) { + /* we have different sizes, probabely peer + * needs to know my new size... */ + drbd_send_sizes(mdev); + } + if (dd == grew && mdev->state.conn == Connected) { + if (mdev->state.pdsk >= Inconsistent && + mdev->state.disk >= Inconsistent) + resync_after_online_grow(mdev); + else + set_bit(RESYNC_AFTER_NEG, &mdev->flags); + } + } + + return TRUE; +} + +STATIC int receive_uuids(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_GenCnt_Packet *p = (struct Drbd_GenCnt_Packet *)h; + u64 *p_uuid; + int i; + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) return FALSE; + if (drbd_recv(mdev, h->payload, h->length) != h->length) + return FALSE; + + p_uuid = kmalloc(sizeof(u64)*EXT_UUID_SIZE, GFP_KERNEL); + + for (i = Current; i < EXT_UUID_SIZE; i++) + p_uuid[i] = be64_to_cpu(p->uuid[i]); + + kfree(mdev->p_uuid); + mdev->p_uuid = p_uuid; + + if (mdev->state.conn < Connected && + mdev->state.disk < Inconsistent && + mdev->state.role == Primary && + (mdev->ed_uuid & ~((u64)1)) != (p_uuid[Current] & ~((u64)1))) { + ERR("Can only connect to data with current UUID=%016llX\n", + (unsigned long long)mdev->ed_uuid); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + + /* Before we test for the disk state, we should wait until an eventually + ongoing cluster wide state change is finished. That is important if + we are primary and are detaching from our disk. We need to see the + new disk state... */ + wait_event(mdev->misc_wait, !test_bit(CLUSTER_ST_CHANGE, &mdev->flags)); + if (mdev->state.conn >= Connected && mdev->state.disk < Inconsistent) + drbd_set_ed_uuid(mdev, p_uuid[Current]); + + return TRUE; +} + +/** + * convert_state: + * Switches the view of the state. + */ +STATIC union drbd_state_t convert_state(union drbd_state_t ps) +{ + union drbd_state_t ms; + + static enum drbd_conns c_tab[] = { + [Connected] = Connected, + + [StartingSyncS] = StartingSyncT, + [StartingSyncT] = StartingSyncS, + [Disconnecting] = TearDown, /* NetworkFailure, */ + [VerifyS] = VerifyT, + [conn_mask] = conn_mask, + }; + + ms.i = ps.i; + + ms.conn = c_tab[ps.conn]; + ms.peer = ps.role; + ms.role = ps.peer; + ms.pdsk = ps.disk; + ms.disk = ps.pdsk; + ms.peer_isp = (ps.aftr_isp | ps.user_isp); + + return ms; +} + +STATIC int receive_req_state(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_Req_State_Packet *p = (struct Drbd_Req_State_Packet *)h; + union drbd_state_t mask, val; + int rv; + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) return FALSE; + if (drbd_recv(mdev, h->payload, h->length) != h->length) + return FALSE; + + mask.i = be32_to_cpu(p->mask); + val.i = be32_to_cpu(p->val); + + if (test_bit(DISCARD_CONCURRENT, &mdev->flags) && + test_bit(CLUSTER_ST_CHANGE, &mdev->flags)) { + drbd_send_sr_reply(mdev, SS_ConcurrentStChg); + return TRUE; + } + + mask = convert_state(mask); + val = convert_state(val); + + rv = drbd_change_state(mdev, ChgStateVerbose, mask, val); + + drbd_send_sr_reply(mdev, rv); + drbd_md_sync(mdev); + + return TRUE; +} + +STATIC int receive_state(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_State_Packet *p = (struct Drbd_State_Packet *)h; + enum drbd_conns nconn, oconn; + union drbd_state_t ns, peer_state; + enum drbd_disk_state real_peer_disk; + int rv; + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) + return FALSE; + + if (drbd_recv(mdev, h->payload, h->length) != h->length) + return FALSE; + + peer_state.i = be32_to_cpu(p->state); + + real_peer_disk = peer_state.disk; + if (peer_state.disk == Negotiating) { + real_peer_disk = mdev->p_uuid[UUID_FLAGS] & 4 ? Inconsistent : Consistent; + INFO("real peer disk state = %s\n", disks_to_name(real_peer_disk)); + } + + spin_lock_irq(&mdev->req_lock); + retry: + oconn = nconn = mdev->state.conn; + spin_unlock_irq(&mdev->req_lock); + + if (nconn == WFReportParams) + nconn = Connected; + + if (mdev->p_uuid && peer_state.disk >= Negotiating && + inc_local_if_state(mdev, Negotiating)) { + int cr; /* consider resync */ + + cr = (oconn < Connected); + cr |= (oconn == Connected && + (peer_state.disk == Negotiating || + mdev->state.disk == Negotiating)); + cr |= test_bit(CONSIDER_RESYNC, &mdev->flags); /* peer forced */ + cr |= (oconn == Connected && peer_state.conn > Connected); + + if (cr) + nconn = drbd_sync_handshake(mdev, peer_state.role, real_peer_disk); + + dec_local(mdev); + if (nconn == conn_mask) { + if (mdev->state.disk == Negotiating) { + drbd_force_state(mdev, NS(disk, Diskless)); + nconn = Connected; + } else if (peer_state.disk == Negotiating) { + ERR("Disk attach process on the peer node was aborted.\n"); + peer_state.disk = Diskless; + } else { + D_ASSERT(oconn == WFReportParams); + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + } + } + + spin_lock_irq(&mdev->req_lock); + if (mdev->state.conn != oconn) + goto retry; + clear_bit(CONSIDER_RESYNC, &mdev->flags); + ns.i = mdev->state.i; + ns.conn = nconn; + ns.peer = peer_state.role; + ns.pdsk = real_peer_disk; + ns.peer_isp = (peer_state.aftr_isp | peer_state.user_isp); + if ((nconn == Connected || nconn == WFBitMapS) && ns.disk == Negotiating) + ns.disk = mdev->new_state_tmp.disk; + + rv = _drbd_set_state(mdev, ns, ChgStateVerbose | ChgStateHard, NULL); + ns = mdev->state; + spin_unlock_irq(&mdev->req_lock); + + if (rv < SS_Success) { + drbd_force_state(mdev, NS(conn, Disconnecting)); + return FALSE; + } + + if (oconn > WFReportParams) { + if (nconn > Connected && peer_state.conn <= Connected && + peer_state.disk != Negotiating ) { + /* we want resync, peer has not yet decided to sync... */ + /* Nowadays only used when forcing a node into primary role and + setting its disk to UpTpDate with that */ + drbd_send_uuids(mdev); + drbd_send_state(mdev); + } + } + + mdev->net_conf->want_lose = 0; + + drbd_md_sync(mdev); /* update connected indicator, la_size, ... */ + + return TRUE; +} + +STATIC int receive_sync_uuid(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_SyncUUID_Packet *p = (struct Drbd_SyncUUID_Packet *)h; + + wait_event(mdev->misc_wait, + mdev->state.conn < Connected || + mdev->state.conn == WFSyncUUID); + + /* D_ASSERT( mdev->state.conn == WFSyncUUID ); */ + + ERR_IF(h->length != (sizeof(*p)-sizeof(*h))) return FALSE; + if (drbd_recv(mdev, h->payload, h->length) != h->length) + return FALSE; + + /* Here the _drbd_uuid_ functions are right, current should + _not_ be rotated into the history */ + if (inc_local_if_state(mdev, Negotiating)) { + _drbd_uuid_set(mdev, Current, be64_to_cpu(p->uuid)); + _drbd_uuid_set(mdev, Bitmap, 0UL); + + drbd_start_resync(mdev, SyncTarget); + + dec_local(mdev); + } else + ERR("Ignoring SyncUUID packet!\n"); + + return TRUE; +} + +enum receive_bitmap_ret { OK, DONE, FAILED }; + +static enum receive_bitmap_ret +receive_bitmap_plain(struct drbd_conf *mdev, struct Drbd_Header *h, + unsigned long *buffer, struct bm_xfer_ctx *c) +{ + unsigned num_words = min_t(size_t, BM_PACKET_WORDS, c->bm_words - c->word_offset); + unsigned want = num_words * sizeof(long); + + if (want != h->length) { + ERR("%s:want (%u) != h->length (%u)\n", __func__, want, h->length); + return FAILED; + } + if (want == 0) + return DONE; + if (drbd_recv(mdev, buffer, want) != want) + return FAILED; + + drbd_bm_merge_lel(mdev, c->word_offset, num_words, buffer); + + c->word_offset += num_words; + c->bit_offset = c->word_offset * BITS_PER_LONG; + if (c->bit_offset > c->bm_bits) + c->bit_offset = c->bm_bits; + + return OK; +} + +static enum receive_bitmap_ret +recv_bm_rle_bits(struct drbd_conf *mdev, + struct Drbd_Compressed_Bitmap_Packet *p, + struct bm_xfer_ctx *c) +{ + struct bitstream bs; + u64 look_ahead; + u64 rl; + u64 tmp; + unsigned long s = c->bit_offset; + unsigned long e; + int len = p->head.length - (sizeof(*p) - sizeof(p->head)); + int toggle = DCBP_get_start(p); + int have; + int bits; + + bitstream_init(&bs, p->code, len, DCBP_get_pad_bits(p)); + + bits = bitstream_get_bits(&bs, &look_ahead, 64); + if (bits < 0) + return FAILED; + + for (have = bits; have > 0; s += rl, toggle = !toggle) { + bits = vli_decode_bits(&rl, look_ahead); + if (bits <= 0) + return FAILED; + + if (toggle) { + e = s + rl -1; + if (e >= c->bm_bits) { + ERR("bitmap overflow (e:%lu) while decoding bm RLE packet\n", e); + return FAILED; + } + _drbd_bm_set_bits(mdev, s, e); + } + + if (have < bits) { + ERR("bitmap decoding error: h:%d b:%d la:0x%08llx l:%u/%u\n", have, bits, look_ahead, + bs.cur.b - p->code, bs.buf_len); + return FAILED; + } + look_ahead >>= bits; + have -= bits; + + bits = bitstream_get_bits(&bs, &tmp, 64 - have); + if (bits < 0) + return FAILED; + look_ahead |= tmp << have; + have += bits; + } + + c->bit_offset = s; + bm_xfer_ctx_bit_to_word_offset(c); + + return (s == c->bm_bits) ? DONE : OK; +} + + +static enum receive_bitmap_ret +recv_bm_rle_bytes(struct drbd_conf *mdev, + struct Drbd_Compressed_Bitmap_Packet *p, + struct bm_xfer_ctx *c) +{ + u64 rl; + unsigned char *buf = p->code; + unsigned long s; + unsigned long e; + int len = p->head.length - (p->code - p->head.payload); + int toggle; + int n; + + s = c->bit_offset; + + /* decoding. the payload of bitmap rle packets is VLI encoded + * runlength of set and unset bits, starting with set/unset as defined + * in p->encoding & 0x80. */ + for (toggle = DCBP_get_start(p); len; s += rl, toggle = !toggle) { + if (s >= c->bm_bits) { + ERR("bitmap overflow (s:%lu) while decoding bitmap RLE packet\n", s); + return FAILED; + } + + n = vli_decode_bytes(&rl, buf, len); + if (n == 0) /* incomplete buffer! */ + return FAILED; + buf += n; + len -= n; + + if (rl == 0) { + ERR("unexpected zero runlength while decoding bitmap RLE packet\n"); + return FAILED; + } + + /* unset bits: ignore, because of x | 0 == x. */ + if (!toggle) + continue; + + /* set bits: merge into bitmap. */ + e = s + rl -1; + if (e >= c->bm_bits) { + ERR("bitmap overflow (e:%lu) while decoding bitmap RLE packet\n", e); + return FAILED; + } + _drbd_bm_set_bits(mdev, s, e); + } + + c->bit_offset = s; + bm_xfer_ctx_bit_to_word_offset(c); + + return (s == c->bm_bits) ? DONE : OK; +} + +static enum receive_bitmap_ret +decode_bitmap_c(struct drbd_conf *mdev, + struct Drbd_Compressed_Bitmap_Packet *p, + struct bm_xfer_ctx *c) +{ + switch (DCBP_get_code(p)) { + /* no default! I want the compiler to warn me! */ + case RLE_VLI_BitsFibD_0_1: + case RLE_VLI_BitsFibD_1_1: + case RLE_VLI_BitsFibD_1_2: + case RLE_VLI_BitsFibD_2_3: + break; /* TODO */ + case RLE_VLI_BitsFibD_3_5: + return recv_bm_rle_bits(mdev, p, c); + case RLE_VLI_Bytes: + return recv_bm_rle_bytes(mdev, p, c); + } + ERR("receive_bitmap_c: unknown encoding %u\n", p->encoding); + return FAILED; +} + +void INFO_bm_xfer_stats(struct drbd_conf *mdev, + const char *direction, struct bm_xfer_ctx *c) +{ + unsigned plain_would_take = sizeof(struct Drbd_Header) * + ((c->bm_words+BM_PACKET_WORDS-1)/BM_PACKET_WORDS+1) + + c->bm_words * sizeof(long); + unsigned total = c->bytes[0] + c->bytes[1]; + unsigned q, r; + + /* total can not be zero. but just in case: */ + if (total == 0) + return; + + q = plain_would_take / total; + r = plain_would_take % total; + r = (r > UINT_MAX/100) ? (r / (total+99/100)) : (100 * r / total); + + INFO("%s bitmap stats [Bytes(packets)]: plain %u(%u), RLE %u(%u), " + "total %u; compression factor: %u.%02u\n", + direction, + c->bytes[1], c->packets[1], + c->bytes[0], c->packets[0], + total, q, r); +} + +/* Since we are processing the bitfield from lower addresses to higher, + it does not matter if the process it in 32 bit chunks or 64 bit + chunks as long as it is little endian. (Understand it as byte stream, + beginning with the lowest byte...) If we would use big endian + we would need to process it from the highest address to the lowest, + in order to be agnostic to the 32 vs 64 bits issue. + + returns 0 on failure, 1 if we suceessfully received it. */ +STATIC int receive_bitmap(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct bm_xfer_ctx c; + void *buffer; + enum receive_bitmap_ret ret; + int ok = FALSE; + + wait_event(mdev->misc_wait, !atomic_read(&mdev->ap_bio_cnt)); + + drbd_bm_lock(mdev, "receive bitmap"); + + /* maybe we should use some per thread scratch page, + * and allocate that during initial device creation? */ + buffer = (unsigned long *) __get_free_page(GFP_NOIO); + if (!buffer) { + ERR("failed to allocate one page buffer in %s\n", __func__); + goto out; + } + + c = (struct bm_xfer_ctx) { + .bm_bits = drbd_bm_bits(mdev), + .bm_words = drbd_bm_words(mdev), + }; + + do { + if (h->command == ReportBitMap) { + ret = receive_bitmap_plain(mdev, h, buffer, &c); + } else if (h->command == ReportCBitMap) { + /* MAYBE: sanity check that we speak proto >= 90, + * and the feature is enabled! */ + struct Drbd_Compressed_Bitmap_Packet *p; + + if (h->length > BM_PACKET_PAYLOAD_BYTES) { + ERR("ReportCBitmap packet too large\n"); + goto out; + } + /* use the page buff */ + p = buffer; + memcpy(p, h, sizeof(*h)); + if (drbd_recv(mdev, p->head.payload, h->length) != h->length) + goto out; + if (p->head.length <= (sizeof(*p) - sizeof(p->head))) { + ERR("ReportCBitmap packet too small (l:%u)\n", p->head.length); + return FAILED; + } + ret = decode_bitmap_c(mdev, p, &c); + } else { + drbd_WARN("receive_bitmap: h->command neither ReportBitMap nor ReportCBitMap (is 0x%x)", h->command); + goto out; + } + + c.packets[h->command == ReportBitMap]++; + c.bytes[h->command == ReportBitMap] += sizeof(struct Drbd_Header) + h->length; + + if (ret != OK) + break; + + if (!drbd_recv_header(mdev, h)) + goto out; + } while (ret == OK); + if (ret == FAILED) + goto out; + + INFO_bm_xfer_stats(mdev, "receive", &c); + + if (mdev->state.conn == WFBitMapT) { + ok = !drbd_send_bitmap(mdev); + if (!ok) + goto out; + /* Omit ChgOrdered with this state transition to avoid deadlocks. */ + ok = _drbd_request_state(mdev, NS(conn, WFSyncUUID), ChgStateVerbose); + D_ASSERT(ok == SS_Success); + } else if (mdev->state.conn != WFBitMapS) { + /* admin may have requested Disconnecting, + * other threads may have noticed network errors */ + INFO("unexpected cstate (%s) in receive_bitmap\n", + conns_to_name(mdev->state.conn)); + } + + ok = TRUE; + out: + drbd_bm_unlock(mdev); + if (ok && mdev->state.conn == WFBitMapS) + drbd_start_resync(mdev, SyncSource); + free_page((unsigned long) buffer); + return ok; +} + +STATIC int receive_skip(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + /* TODO zero copy sink :) */ + static char sink[128]; + int size, want, r; + + drbd_WARN("skipping unknown optional packet type %d, l: %d!\n", + h->command, h->length); + + size = h->length; + while (size > 0) { + want = min_t(int, size, sizeof(sink)); + r = drbd_recv(mdev, sink, want); + ERR_IF(r <= 0) break; + size -= r; + } + return size == 0; +} + +STATIC int receive_UnplugRemote(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + if (mdev->state.disk >= Inconsistent) + drbd_kick_lo(mdev); + + /* Make sure we've acked all the TCP data associated + * with the data requests being unplugged */ + drbd_tcp_quickack(mdev->data.socket); + + return TRUE; +} + +typedef int (*drbd_cmd_handler_f)(struct drbd_conf *, struct Drbd_Header *); + +static drbd_cmd_handler_f drbd_default_handler[] = { + [Data] = receive_Data, + [DataReply] = receive_DataReply, + [RSDataReply] = receive_RSDataReply, + [Barrier] = receive_Barrier, + [ReportBitMap] = receive_bitmap, + [ReportCBitMap] = receive_bitmap, + [UnplugRemote] = receive_UnplugRemote, + [DataRequest] = receive_DataRequest, + [RSDataRequest] = receive_DataRequest, + [SyncParam] = receive_SyncParam, + [SyncParam89] = receive_SyncParam, + [ReportProtocol] = receive_protocol, + [ReportUUIDs] = receive_uuids, + [ReportSizes] = receive_sizes, + [ReportState] = receive_state, + [StateChgRequest] = receive_req_state, + [ReportSyncUUID] = receive_sync_uuid, + [OVRequest] = receive_DataRequest, + [OVReply] = receive_DataRequest, + [CsumRSRequest] = receive_DataRequest, + /* anything missing from this table is in + * the asender_tbl, see get_asender_cmd */ + [MAX_CMD] = NULL, +}; + +static drbd_cmd_handler_f *drbd_cmd_handler = drbd_default_handler; +static drbd_cmd_handler_f *drbd_opt_cmd_handler; + +STATIC void drbdd(struct drbd_conf *mdev) +{ + drbd_cmd_handler_f handler; + struct Drbd_Header *header = &mdev->data.rbuf.head; + + while (get_t_state(&mdev->receiver) == Running) { + drbd_thread_current_set_cpu(mdev); + if (!drbd_recv_header(mdev, header)) + break; + + if (header->command < MAX_CMD) + handler = drbd_cmd_handler[header->command]; + else if (MayIgnore < header->command + && header->command < MAX_OPT_CMD) + handler = drbd_opt_cmd_handler[header->command-MayIgnore]; + else if (header->command > MAX_OPT_CMD) + handler = receive_skip; + else + handler = NULL; + + if (unlikely(!handler)) { + ERR("unknown packet type %d, l: %d!\n", + header->command, header->length); + drbd_force_state(mdev, NS(conn, ProtocolError)); + break; + } + if (unlikely(!handler(mdev, header))) { + ERR("error receiving %s, l: %d!\n", + cmdname(header->command), header->length); + drbd_force_state(mdev, NS(conn, ProtocolError)); + break; + } + + dump_packet(mdev, mdev->data.socket, 2, &mdev->data.rbuf, + __FILE__, __LINE__); + } +} + +STATIC void drbd_fail_pending_reads(struct drbd_conf *mdev) +{ + struct hlist_head *slot; + struct hlist_node *pos; + struct hlist_node *tmp; + struct drbd_request *req; + int i; + + /* + * Application READ requests + */ + spin_lock_irq(&mdev->req_lock); + for (i = 0; i < APP_R_HSIZE; i++) { + slot = mdev->app_reads_hash+i; + hlist_for_each_entry_safe(req, pos, tmp, slot, colision) { + /* it may (but should not any longer!) + * be on the work queue; if that assert triggers, + * we need to also grab the + * spin_lock_irq(&mdev->data.work.q_lock); + * and list_del_init here. */ + D_ASSERT(list_empty(&req->w.list)); + _req_mod(req, connection_lost_while_pending, 0); + } + } + for (i = 0; i < APP_R_HSIZE; i++) + if (!hlist_empty(mdev->app_reads_hash+i)) + drbd_WARN("ASSERT FAILED: app_reads_hash[%d].first: " + "%p, should be NULL\n", i, mdev->app_reads_hash[i].first); + + memset(mdev->app_reads_hash, 0, APP_R_HSIZE*sizeof(void *)); + spin_unlock_irq(&mdev->req_lock); +} + +STATIC void drbd_disconnect(struct drbd_conf *mdev) +{ + struct drbd_work prev_work_done; + enum fencing_policy fp; + union drbd_state_t os, ns; + int rv = SS_UnknownError; + unsigned int i; + + if (mdev->state.conn == StandAlone) + return; + if (mdev->state.conn >= WFConnection) + ERR("ASSERT FAILED cstate = %s, expected < WFConnection\n", + conns_to_name(mdev->state.conn)); + + /* asender does not clean up anything. it must not interfere, either */ + drbd_thread_stop(&mdev->asender); + + mutex_lock(&mdev->data.mutex); + drbd_free_sock(mdev); + mutex_unlock(&mdev->data.mutex); + + spin_lock_irq(&mdev->req_lock); + _drbd_wait_ee_list_empty(mdev, &mdev->active_ee); + _drbd_wait_ee_list_empty(mdev, &mdev->sync_ee); + _drbd_clear_done_ee(mdev); + _drbd_wait_ee_list_empty(mdev, &mdev->read_ee); + reclaim_net_ee(mdev); + spin_unlock_irq(&mdev->req_lock); + + /* We do not have data structures that would allow us to + * get the rs_pending_cnt down to 0 again. + * * On SyncTarget we do not have any data structures describing + * the pending RSDataRequest's we have sent. + * * On SyncSource there is no data structure that tracks + * the RSDataReply blocks that we sent to the SyncTarget. + * And no, it is not the sum of the reference counts in the + * resync_LRU. The resync_LRU tracks the whole operation including + * the disk-IO, while the rs_pending_cnt only tracks the blocks + * on the fly. */ + drbd_rs_cancel_all(mdev); + mdev->rs_total = 0; + mdev->rs_failed = 0; + atomic_set(&mdev->rs_pending_cnt, 0); + wake_up(&mdev->misc_wait); + + /* make sure syncer is stopped and w_resume_next_sg queued */ + del_timer_sync(&mdev->resync_timer); + set_bit(STOP_SYNC_TIMER, &mdev->flags); + resync_timer_fn((unsigned long)mdev); + + /* wait for all w_e_end_data_req, w_e_end_rsdata_req, w_send_barrier, + * w_make_resync_request etc. which may still be on the worker queue + * to be "canceled" */ + set_bit(WORK_PENDING, &mdev->flags); + prev_work_done.cb = w_prev_work_done; + drbd_queue_work(&mdev->data.work, &prev_work_done); + wait_event(mdev->misc_wait, !test_bit(WORK_PENDING, &mdev->flags)); + + kfree(mdev->p_uuid); + mdev->p_uuid = NULL; + + if (!mdev->state.susp) + tl_clear(mdev); + + drbd_fail_pending_reads(mdev); + + INFO("Connection closed\n"); + + drbd_md_sync(mdev); + + fp = DontCare; + if (inc_local(mdev)) { + fp = mdev->bc->dc.fencing; + dec_local(mdev); + } + + if (mdev->state.role == Primary) { + if (fp >= Resource && mdev->state.pdsk >= DUnknown) { + enum drbd_disk_state nps = drbd_try_outdate_peer(mdev); + drbd_request_state(mdev, NS(pdsk, nps)); + } + } + + spin_lock_irq(&mdev->req_lock); + os = mdev->state; + if (os.conn >= Unconnected) { + /* Do not restart in case we are Disconnecting */ + ns = os; + ns.conn = Unconnected; + rv = _drbd_set_state(mdev, ns, ChgStateVerbose, NULL); + } + spin_unlock_irq(&mdev->req_lock); + + if (os.conn == Disconnecting) { + struct hlist_head *h; + wait_event(mdev->misc_wait, atomic_read(&mdev->net_cnt) == 0); + + /* we must not free the tl_hash + * while application io is still on the fly */ + wait_event(mdev->misc_wait, atomic_read(&mdev->ap_bio_cnt) == 0); + + spin_lock_irq(&mdev->req_lock); + /* paranoia code */ + for (h = mdev->ee_hash; h < mdev->ee_hash + mdev->ee_hash_s; h++) + if (h->first) + ERR("ASSERT FAILED ee_hash[%u].first == %p, expected NULL\n", + (int)(h - mdev->ee_hash), h->first); + kfree(mdev->ee_hash); + mdev->ee_hash = NULL; + mdev->ee_hash_s = 0; + + /* paranoia code */ + for (h = mdev->tl_hash; h < mdev->tl_hash + mdev->tl_hash_s; h++) + if (h->first) + ERR("ASSERT FAILED tl_hash[%u] == %p, expected NULL\n", + (int)(h - mdev->tl_hash), h->first); + kfree(mdev->tl_hash); + mdev->tl_hash = NULL; + mdev->tl_hash_s = 0; + spin_unlock_irq(&mdev->req_lock); + + crypto_free_hash(mdev->cram_hmac_tfm); + mdev->cram_hmac_tfm = NULL; + + kfree(mdev->net_conf); + mdev->net_conf = NULL; + drbd_request_state(mdev, NS(conn, StandAlone)); + } + + /* they do trigger all the time. + * hm. why won't tcp release the page references, + * we already released the socket!? */ + i = atomic_read(&mdev->pp_in_use); + if (i) + DBG("pp_in_use = %u, expected 0\n", i); + if (!list_empty(&mdev->net_ee)) + DBG("net_ee not empty!\n"); + + D_ASSERT(list_empty(&mdev->read_ee)); + D_ASSERT(list_empty(&mdev->active_ee)); + D_ASSERT(list_empty(&mdev->sync_ee)); + D_ASSERT(list_empty(&mdev->done_ee)); + + /* ok, no more ee's on the fly, it is safe to reset the epoch_size */ + atomic_set(&mdev->current_epoch->epoch_size, 0); + D_ASSERT(list_empty(&mdev->current_epoch->list)); +} + +/* + * We support PRO_VERSION_MIN to PRO_VERSION_MAX. The protocol version + * we can agree on is stored in agreed_pro_version. + * + * feature flags and the reserved array should be enough room for future + * enhancements of the handshake protocol, and possible plugins... + * + * for now, they are expected to be zero, but ignored. + */ +STATIC int drbd_send_handshake(struct drbd_conf *mdev) +{ + /* ASSERT current == mdev->receiver ... */ + struct Drbd_HandShake_Packet *p = &mdev->data.sbuf.HandShake; + int ok; + + if (mutex_lock_interruptible(&mdev->data.mutex)) { + ERR("interrupted during initial handshake\n"); + return 0; /* interrupted. not ok. */ + } + + if (mdev->data.socket == NULL) { + mutex_unlock(&mdev->data.mutex); + return 0; + } + + memset(p, 0, sizeof(*p)); + p->protocol_min = cpu_to_be32(PRO_VERSION_MIN); + p->protocol_max = cpu_to_be32(PRO_VERSION_MAX); + ok = _drbd_send_cmd( mdev, mdev->data.socket, HandShake, + (struct Drbd_Header *)p, sizeof(*p), 0 ); + mutex_unlock(&mdev->data.mutex); + return ok; +} + +/* + * return values: + * 1 yess, we have a valid connection + * 0 oops, did not work out, please try again + * -1 peer talks different language, + * no point in trying again, please go standalone. + */ +int drbd_do_handshake(struct drbd_conf *mdev) +{ + /* ASSERT current == mdev->receiver ... */ + struct Drbd_HandShake_Packet *p = &mdev->data.rbuf.HandShake; + const int expect = sizeof(struct Drbd_HandShake_Packet) + -sizeof(struct Drbd_Header); + int rv; + + rv = drbd_send_handshake(mdev); + if (!rv) + return 0; + + rv = drbd_recv_header(mdev, &p->head); + if (!rv) + return 0; + + if (p->head.command != HandShake) { + ERR("expected HandShake packet, received: %s (0x%04x)\n", + cmdname(p->head.command), p->head.command); + return -1; + } + + if (p->head.length != expect) { + ERR("expected HandShake length: %u, received: %u\n", + expect, p->head.length); + return -1; + } + + rv = drbd_recv(mdev, &p->head.payload, expect); + + if (rv != expect) { + ERR("short read receiving handshake packet: l=%u\n", rv); + return 0; + } + + dump_packet(mdev, mdev->data.socket, 2, &mdev->data.rbuf, + __FILE__, __LINE__); + + p->protocol_min = be32_to_cpu(p->protocol_min); + p->protocol_max = be32_to_cpu(p->protocol_max); + if (p->protocol_max == 0) + p->protocol_max = p->protocol_min; + + if (PRO_VERSION_MAX < p->protocol_min || + PRO_VERSION_MIN > p->protocol_max) + goto incompat; + + mdev->agreed_pro_version = min_t(int, PRO_VERSION_MAX, p->protocol_max); + + INFO("Handshake successful: " + "Agreed network protocol version %d\n", mdev->agreed_pro_version); + + return 1; + + incompat: + ERR("incompatible DRBD dialects: " + "I support %d-%d, peer supports %d-%d\n", + PRO_VERSION_MIN, PRO_VERSION_MAX, + p->protocol_min, p->protocol_max); + return -1; +} + +#if !defined(CONFIG_CRYPTO_HMAC) && !defined(CONFIG_CRYPTO_HMAC_MODULE) +int drbd_do_auth(struct drbd_conf *mdev) +{ + ERR("This kernel was build without CONFIG_CRYPTO_HMAC.\n"); + ERR("You need to disable 'cram-hmac-alg' in drbd.conf.\n"); + return 0; +} +#else +#define CHALLENGE_LEN 64 +int drbd_do_auth(struct drbd_conf *mdev) +{ + char my_challenge[CHALLENGE_LEN]; /* 64 Bytes... */ + struct scatterlist sg; + char *response = NULL; + char *right_response = NULL; + char *peers_ch = NULL; + struct Drbd_Header p; + unsigned int key_len = strlen(mdev->net_conf->shared_secret); + unsigned int resp_size; + struct hash_desc desc; + int rv; + + desc.tfm = mdev->cram_hmac_tfm; + desc.flags = 0; + + rv = crypto_hash_setkey(mdev->cram_hmac_tfm, + (u8 *)mdev->net_conf->shared_secret, key_len); + if (rv) { + ERR("crypto_hash_setkey() failed with %d\n", rv); + rv = 0; + goto fail; + } + + get_random_bytes(my_challenge, CHALLENGE_LEN); + + rv = drbd_send_cmd2(mdev, AuthChallenge, my_challenge, CHALLENGE_LEN); + if (!rv) + goto fail; + + rv = drbd_recv_header(mdev, &p); + if (!rv) + goto fail; + + if (p.command != AuthChallenge) { + ERR("expected AuthChallenge packet, received: %s (0x%04x)\n", + cmdname(p.command), p.command); + rv = 0; + goto fail; + } + + if (p.length > CHALLENGE_LEN*2) { + ERR("expected AuthChallenge payload too big.\n"); + rv = 0; + goto fail; + } + + peers_ch = kmalloc(p.length, GFP_KERNEL); + if (peers_ch == NULL) { + ERR("kmalloc of peers_ch failed\n"); + rv = 0; + goto fail; + } + + rv = drbd_recv(mdev, peers_ch, p.length); + + if (rv != p.length) { + ERR("short read AuthChallenge: l=%u\n", rv); + rv = 0; + goto fail; + } + + resp_size = crypto_hash_digestsize(mdev->cram_hmac_tfm); + response = kmalloc(resp_size, GFP_KERNEL); + if (response == NULL) { + ERR("kmalloc of response failed\n"); + rv = 0; + goto fail; + } + + sg_init_table(&sg, 1); + sg_set_buf(&sg, peers_ch, p.length); + + rv = crypto_hash_digest(&desc, &sg, sg.length, response); + if (rv) { + ERR("crypto_hash_digest() failed with %d\n", rv); + rv = 0; + goto fail; + } + + rv = drbd_send_cmd2(mdev, AuthResponse, response, resp_size); + if (!rv) + goto fail; + + rv = drbd_recv_header(mdev, &p); + if (!rv) + goto fail; + + if (p.command != AuthResponse) { + ERR("expected AuthResponse packet, received: %s (0x%04x)\n", + cmdname(p.command), p.command); + rv = 0; + goto fail; + } + + if (p.length != resp_size) { + ERR("expected AuthResponse payload of wrong size\n"); + rv = 0; + goto fail; + } + + rv = drbd_recv(mdev, response , resp_size); + + if (rv != resp_size) { + ERR("short read receiving AuthResponse: l=%u\n", rv); + rv = 0; + goto fail; + } + + right_response = kmalloc(resp_size, GFP_KERNEL); + if (response == NULL) { + ERR("kmalloc of right_response failed\n"); + rv = 0; + goto fail; + } + + sg_set_buf(&sg, my_challenge, CHALLENGE_LEN); + + rv = crypto_hash_digest(&desc, &sg, sg.length, right_response); + if (rv) { + ERR("crypto_hash_digest() failed with %d\n", rv); + rv = 0; + goto fail; + } + + rv = !memcmp(response, right_response, resp_size); + + if (rv) + INFO("Peer authenticated using %d bytes of '%s' HMAC\n", + resp_size, mdev->net_conf->cram_hmac_alg); + + fail: + kfree(peers_ch); + kfree(response); + kfree(right_response); + + return rv; +} +#endif + +STATIC int drbdd_init(struct Drbd_thread *thi) +{ + struct drbd_conf *mdev = thi->mdev; + unsigned int minor = mdev_to_minor(mdev); + int h; + + sprintf(current->comm, "drbd%d_receiver", minor); + + INFO("receiver (re)started\n"); + + do { + h = drbd_connect(mdev); + if (h == 0) { + drbd_disconnect(mdev); + __set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ); + } + if (h == -1) { + drbd_WARN("Discarding network configuration.\n"); + drbd_force_state(mdev, NS(conn, Disconnecting)); + } + } while (h == 0); + + if (h > 0) { + if (inc_net(mdev)) { + drbdd(mdev); + dec_net(mdev); + } + } + + drbd_disconnect(mdev); + + INFO("receiver terminated\n"); + return 0; +} + +/* ********* acknowledge sender ******** */ + +STATIC int got_RqSReply(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_RqS_Reply_Packet *p = (struct Drbd_RqS_Reply_Packet *)h; + + int retcode = be32_to_cpu(p->retcode); + + if (retcode >= SS_Success) { + set_bit(CL_ST_CHG_SUCCESS, &mdev->flags); + } else { + set_bit(CL_ST_CHG_FAIL, &mdev->flags); + ERR("Requested state change failed by peer: %s (%d)\n", + set_st_err_name(retcode), retcode); + } + wake_up(&mdev->state_wait); + + return TRUE; +} + +STATIC int got_Ping(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + return drbd_send_ping_ack(mdev); + +} + +STATIC int got_PingAck(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + /* restore idle timeout */ + mdev->meta.socket->sk->sk_rcvtimeo = mdev->net_conf->ping_int*HZ; + + return TRUE; +} + +STATIC int got_IsInSync(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + sector_t sector = be64_to_cpu(p->sector); + int blksize = be32_to_cpu(p->blksize); + + D_ASSERT(mdev->agreed_pro_version >= 89); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + drbd_rs_complete_io(mdev, sector); + drbd_set_in_sync(mdev, sector, blksize); + /* rs_same_csums is supposed to count in units of BM_BLOCK_SIZE */ + mdev->rs_same_csum += (blksize >> BM_BLOCK_SIZE_B); + dec_rs_pending(mdev); + + return TRUE; +} + +STATIC int got_BlockAck(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct drbd_request *req; + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + sector_t sector = be64_to_cpu(p->sector); + int blksize = be32_to_cpu(p->blksize); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + if (is_syncer_block_id(p->block_id)) { + drbd_set_in_sync(mdev, sector, blksize); + dec_rs_pending(mdev); + } else { + spin_lock_irq(&mdev->req_lock); + req = _ack_id_to_req(mdev, p->block_id, sector); + + if (unlikely(!req)) { + spin_unlock_irq(&mdev->req_lock); + ERR("Got a corrupt block_id/sector pair(2).\n"); + return FALSE; + } + + switch (be16_to_cpu(h->command)) { + case RSWriteAck: + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_C); + _req_mod(req, write_acked_by_peer_and_sis, 0); + break; + case WriteAck: + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_C); + _req_mod(req, write_acked_by_peer, 0); + break; + case RecvAck: + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_B); + _req_mod(req, recv_acked_by_peer, 0); + break; + case DiscardAck: + D_ASSERT(mdev->net_conf->wire_protocol == DRBD_PROT_C); + ALERT("Got DiscardAck packet %llus +%u!" + " DRBD is not a random data generator!\n", + (unsigned long long)req->sector, req->size); + _req_mod(req, conflict_discarded_by_peer, 0); + break; + default: + D_ASSERT(0); + } + spin_unlock_irq(&mdev->req_lock); + } + /* dec_ap_pending is handled within _req_mod */ + + return TRUE; +} + +STATIC int got_NegAck(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + sector_t sector = be64_to_cpu(p->sector); + struct drbd_request *req; + + if (__ratelimit(&drbd_ratelimit_state)) + drbd_WARN("Got NegAck packet. Peer is in troubles?\n"); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + if (is_syncer_block_id(p->block_id)) { + int size = be32_to_cpu(p->blksize); + + dec_rs_pending(mdev); + + drbd_rs_failed_io(mdev, sector, size); + } else { + spin_lock_irq(&mdev->req_lock); + req = _ack_id_to_req(mdev, p->block_id, sector); + + if (unlikely(!req)) { + spin_unlock_irq(&mdev->req_lock); + ERR("Got a corrupt block_id/sector pair(2).\n"); + return FALSE; + } + + _req_mod(req, neg_acked, 0); + spin_unlock_irq(&mdev->req_lock); + } + + return TRUE; +} + +STATIC int got_NegDReply(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct drbd_request *req; + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + sector_t sector = be64_to_cpu(p->sector); + + spin_lock_irq(&mdev->req_lock); + req = _ar_id_to_req(mdev, p->block_id, sector); + if (unlikely(!req)) { + spin_unlock_irq(&mdev->req_lock); + ERR("Got a corrupt block_id/sector pair(3).\n"); + return FALSE; + } + + _req_mod(req, neg_acked, 0); + spin_unlock_irq(&mdev->req_lock); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + ERR("Got NegDReply; Sector %llus, len %u; Fail original request.\n", + (unsigned long long)sector, be32_to_cpu(p->blksize)); + + return TRUE; +} + +STATIC int got_NegRSDReply(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + sector_t sector; + int size; + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + + sector = be64_to_cpu(p->sector); + size = be32_to_cpu(p->blksize); + D_ASSERT(p->block_id == ID_SYNCER); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + dec_rs_pending(mdev); + + if (inc_local_if_state(mdev, Failed)) { + drbd_rs_complete_io(mdev, sector); + drbd_rs_failed_io(mdev, sector, size); + dec_local(mdev); + } + + return TRUE; +} + +STATIC int got_BarrierAck(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_BarrierAck_Packet *p = (struct Drbd_BarrierAck_Packet *)h; + + tl_release(mdev, p->barrier, be32_to_cpu(p->set_size)); + + return TRUE; +} + +STATIC int got_OVResult(struct drbd_conf *mdev, struct Drbd_Header *h) +{ + struct Drbd_BlockAck_Packet *p = (struct Drbd_BlockAck_Packet *)h; + struct drbd_work *w; + sector_t sector; + int size; + + sector = be64_to_cpu(p->sector); + size = be32_to_cpu(p->blksize); + + update_peer_seq(mdev, be32_to_cpu(p->seq_num)); + + if (be64_to_cpu(p->block_id) == ID_OUT_OF_SYNC) + drbd_ov_oos_found(mdev, sector, size); + else + ov_oos_print(mdev); + + drbd_rs_complete_io(mdev, sector); + dec_rs_pending(mdev); + + if (--mdev->ov_left == 0) { + w = kmalloc(sizeof(*w), GFP_KERNEL); + if (w) { + w->cb = w_ov_finished; + drbd_queue_work_front(&mdev->data.work, w); + } else { + ERR("kmalloc(w) failed."); + drbd_resync_finished(mdev); + } + } + return TRUE; +} + +struct asender_cmd { + size_t pkt_size; + int (*process)(struct drbd_conf *mdev, struct Drbd_Header *h); +}; + +static struct asender_cmd *get_asender_cmd(int cmd) +{ + static struct asender_cmd asender_tbl[] = { + /* anything missing from this table is in + * the drbd_cmd_handler (drbd_default_handler) table, + * see the beginning of drbdd() */ + [Ping] = { sizeof(struct Drbd_Header), got_Ping }, + [PingAck] = { sizeof(struct Drbd_Header), got_PingAck }, + [RecvAck] = { sizeof(struct Drbd_BlockAck_Packet), got_BlockAck }, + [WriteAck] = { sizeof(struct Drbd_BlockAck_Packet), got_BlockAck }, + [RSWriteAck] = { sizeof(struct Drbd_BlockAck_Packet), got_BlockAck }, + [DiscardAck] = { sizeof(struct Drbd_BlockAck_Packet), got_BlockAck }, + [NegAck] = { sizeof(struct Drbd_BlockAck_Packet), got_NegAck }, + [NegDReply] = { sizeof(struct Drbd_BlockAck_Packet), got_NegDReply }, + [NegRSDReply] = { sizeof(struct Drbd_BlockAck_Packet), got_NegRSDReply}, + [OVResult] = { sizeof(struct Drbd_BlockAck_Packet), got_OVResult }, + [BarrierAck] = { sizeof(struct Drbd_BarrierAck_Packet), got_BarrierAck }, + [StateChgReply] = { sizeof(struct Drbd_RqS_Reply_Packet), got_RqSReply }, + [RSIsInSync] = { sizeof(struct Drbd_BlockAck_Packet), got_IsInSync }, + [MAX_CMD] = { 0, NULL }, + }; + if (cmd > MAX_CMD) + return NULL; + return &asender_tbl[cmd]; +} + +STATIC int drbd_asender(struct Drbd_thread *thi) +{ + struct drbd_conf *mdev = thi->mdev; + struct Drbd_Header *h = &mdev->meta.rbuf.head; + struct asender_cmd *cmd = NULL; + + int rv, len; + void *buf = h; + int received = 0; + int expect = sizeof(struct Drbd_Header); + int empty; + + sprintf(current->comm, "drbd%d_asender", mdev_to_minor(mdev)); + + current->policy = SCHED_RR; /* Make this a realtime task! */ + current->rt_priority = 2; /* more important than all other tasks */ + + while (get_t_state(thi) == Running) { + drbd_thread_current_set_cpu(mdev); + if (test_and_clear_bit(SEND_PING, &mdev->flags)) { + ERR_IF(!drbd_send_ping(mdev)) goto reconnect; + mdev->meta.socket->sk->sk_rcvtimeo = + mdev->net_conf->ping_timeo*HZ/10; + } + + /* conditionally cork; + * it may hurt latency if we cork without much to send */ + if (!mdev->net_conf->no_cork && + 3 < atomic_read(&mdev->unacked_cnt)) + drbd_tcp_cork(mdev->meta.socket); + while (1) { + clear_bit(SIGNAL_ASENDER, &mdev->flags); + flush_signals(current); + if (!drbd_process_done_ee(mdev)) { + ERR("process_done_ee() = NOT_OK\n"); + goto reconnect; + } + /* to avoid race with newly queued ACKs */ + set_bit(SIGNAL_ASENDER, &mdev->flags); + spin_lock_irq(&mdev->req_lock); + empty = list_empty(&mdev->done_ee); + spin_unlock_irq(&mdev->req_lock); + /* new ack may have been queued right here, + * but then there is also a signal pending, + * and we start over... */ + if (empty) + break; + } + /* but unconditionally uncork unless disabled */ + if (!mdev->net_conf->no_cork) + drbd_tcp_uncork(mdev->meta.socket); + + /* short circuit, recv_msg would return EINTR anyways. */ + if (signal_pending(current)) + continue; + + rv = drbd_recv_short(mdev, mdev->meta.socket, + buf, expect-received, 0); + clear_bit(SIGNAL_ASENDER, &mdev->flags); + + flush_signals(current); + + /* Note: + * -EINTR (on meta) we got a signal + * -EAGAIN (on meta) rcvtimeo expired + * -ECONNRESET other side closed the connection + * -ERESTARTSYS (on data) we got a signal + * rv < 0 other than above: unexpected error! + * rv == expected: full header or command + * rv < expected: "woken" by signal during receive + * rv == 0 : "connection shut down by peer" + */ + if (likely(rv > 0)) { + received += rv; + buf += rv; + } else if (rv == 0) { + ERR("meta connection shut down by peer.\n"); + goto reconnect; + } else if (rv == -EAGAIN) { + if (mdev->meta.socket->sk->sk_rcvtimeo == + mdev->net_conf->ping_timeo*HZ/10) { + ERR("PingAck did not arrive in time.\n"); + goto reconnect; + } + set_bit(SEND_PING, &mdev->flags); + continue; + } else if (rv == -EINTR) { + continue; + } else { + ERR("sock_recvmsg returned %d\n", rv); + goto reconnect; + } + + if (received == expect && cmd == NULL) { + if (unlikely(h->magic != BE_DRBD_MAGIC)) { + ERR("magic?? on meta m: 0x%lx c: %d l: %d\n", + (long)be32_to_cpu(h->magic), + h->command, h->length); + goto reconnect; + } + cmd = get_asender_cmd(be16_to_cpu(h->command)); + len = be16_to_cpu(h->length); + if (unlikely(cmd == NULL)) { + ERR("unknown command?? on meta m: 0x%lx c: %d l: %d\n", + (long)be32_to_cpu(h->magic), + h->command, h->length); + goto disconnect; + } + expect = cmd->pkt_size; + ERR_IF(len != expect-sizeof(struct Drbd_Header)) { + dump_packet(mdev, mdev->meta.socket, 1, (void *)h, __FILE__, __LINE__); + DUMPI(expect); + goto reconnect; + } + } + if (received == expect) { + D_ASSERT(cmd != NULL); + dump_packet(mdev, mdev->meta.socket, 1, (void *)h, __FILE__, __LINE__); + if (!cmd->process(mdev, h)) + goto reconnect; + + buf = h; + received = 0; + expect = sizeof(struct Drbd_Header); + cmd = NULL; + } + } + + if (0) { +reconnect: + drbd_force_state(mdev, NS(conn, NetworkFailure)); + } + if (0) { +disconnect: + drbd_force_state(mdev, NS(conn, Disconnecting)); + } + clear_bit(SIGNAL_ASENDER, &mdev->flags); + + D_ASSERT(mdev->state.conn < Connected); + INFO("asender terminated\n"); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/drbd_req.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/drbd_req.h @@ -0,0 +1,327 @@ +/* + drbd_req.h + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2006-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2006-2008, Lars Ellenberg . + Copyright (C) 2006-2008, Philipp Reisner . + + DRBD is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + DRBD is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _DRBD_REQ_H +#define _DRBD_REQ_H + +#include +#include + +#include +#include +#include "drbd_int.h" +#include "drbd_wrappers.h" + +/* The request callbacks will be called in irq context by the IDE drivers, + and in Softirqs/Tasklets/BH context by the SCSI drivers, + and by the receiver and worker in kernel-thread context. + Try to get the locking right :) */ + +/* + * Objects of type struct drbd_request do only exist on a Primary node, and are + * associated with IO requests originating from the block layer above us. + * + * There are quite a few things that may happen to a drbd request + * during its lifetime. + * + * It will be created. + * It will be marked with the intention to be + * submitted to local disk and/or + * send via the network. + * + * It has to be placed on the transfer log and other housekeeping lists, + * In case we have a network connection. + * + * It may be identified as a concurrent (write) request + * and be handled accordingly. + * + * It may me handed over to the local disk subsystem. + * It may be completed by the local disk subsystem, + * either sucessfully or with io-error. + * In case it is a READ request, and it failed locally, + * it may be retried remotely. + * + * It may be queued for sending. + * It may be handed over to the network stack, + * which may fail. + * It may be acknowledged by the "peer" according to the wire_protocol in use. + * this may be a negative ack. + * It may receive a faked ack when the network connection is lost and the + * transfer log is cleaned up. + * Sending may be canceled due to network connection loss. + * When it finally has outlived its time, + * corresponding dirty bits in the resync-bitmap may be cleared or set, + * it will be destroyed, + * and completion will be signalled to the originator, + * with or without "success". + * + * See also documentation/drbd-request-state-overview.dot + * (dot -Tps2 documentation/drbd-request-state-overview.dot | display -) + */ + +enum drbd_req_event { + created, + to_be_send, + to_be_submitted, + + /* XXX yes, now I am inconsistent... + * these two are not "events" but "actions" + * oh, well... */ + queue_for_net_write, + queue_for_net_read, + + send_canceled, + send_failed, + handed_over_to_network, + connection_lost_while_pending, + recv_acked_by_peer, + write_acked_by_peer, + write_acked_by_peer_and_sis, /* and set_in_sync */ + conflict_discarded_by_peer, + neg_acked, + barrier_acked, /* in protocol A and B */ + data_received, /* (remote read) */ + + read_completed_with_error, + write_completed_with_error, + completed_ok, +}; + +/* encoding of request states for now. we don't actually need that many bits. + * we don't need to do atomic bit operations either, since most of the time we + * need to look at the connection state and/or manipulate some lists at the + * same time, so we should hold the request lock anyways. + */ +enum drbd_req_state_bits { + /* 210 + * 000: no local possible + * 001: to be submitted + * UNUSED, we could map: 011: submitted, completion still pending + * 110: completed ok + * 010: completed with error + */ + __RQ_LOCAL_PENDING, + __RQ_LOCAL_COMPLETED, + __RQ_LOCAL_OK, + + /* 76543 + * 00000: no network possible + * 00001: to be send + * 00011: to be send, on worker queue + * 00101: sent, expecting recv_ack (B) or write_ack (C) + * 11101: sent, + * recv_ack (B) or implicit "ack" (A), + * still waiting for the barrier ack. + * master_bio may already be completed and invalidated. + * 11100: write_acked (C), + * data_received (for remote read, any protocol) + * or finally the barrier ack has arrived (B,A)... + * request can be freed + * 01100: neg-acked (write, protocol C) + * or neg-d-acked (read, any protocol) + * or killed from the transfer log + * during cleanup after connection loss + * request can be freed + * 01000: canceled or send failed... + * request can be freed + */ + + /* if "SENT" is not set, yet, this can still fail or be canceled. + * if "SENT" is set already, we still wait for an Ack packet. + * when cleared, the master_bio may be completed. + * in (B,A) the request object may still linger on the transaction log + * until the corresponding barrier ack comes in */ + __RQ_NET_PENDING, + + /* If it is QUEUED, and it is a WRITE, it is also registered in the + * transfer log. Currently we need this flag to avoid conflicts between + * worker canceling the request and tl_clear_barrier killing it from + * transfer log. We should restructure the code so this conflict does + * no longer occur. */ + __RQ_NET_QUEUED, + + /* well, actually only "handed over to the network stack". + * + * TODO can potentially be dropped because of the similar meaning + * of RQ_NET_SENT and ~RQ_NET_QUEUED. + * however it is not exactly the same. before we drop it + * we must ensure that we can tell a request with network part + * from a request without, regardless of what happens to it. */ + __RQ_NET_SENT, + + /* when set, the request may be freed (if RQ_NET_QUEUED is clear). + * basically this means the corresponding BarrierAck was received */ + __RQ_NET_DONE, + + /* whether or not we know (C) or pretend (B,A) that the write + * was successfully written on the peer. + */ + __RQ_NET_OK, + + /* peer called drbd_set_in_sync() for this write */ + __RQ_NET_SIS, + + /* keep this last, its for the RQ_NET_MASK */ + __RQ_NET_MAX, +}; + +#define RQ_LOCAL_PENDING (1UL << __RQ_LOCAL_PENDING) +#define RQ_LOCAL_COMPLETED (1UL << __RQ_LOCAL_COMPLETED) +#define RQ_LOCAL_OK (1UL << __RQ_LOCAL_OK) + +#define RQ_LOCAL_MASK ((RQ_LOCAL_OK << 1)-1) /* 0x07 */ + +#define RQ_NET_PENDING (1UL << __RQ_NET_PENDING) +#define RQ_NET_QUEUED (1UL << __RQ_NET_QUEUED) +#define RQ_NET_SENT (1UL << __RQ_NET_SENT) +#define RQ_NET_DONE (1UL << __RQ_NET_DONE) +#define RQ_NET_OK (1UL << __RQ_NET_OK) +#define RQ_NET_SIS (1UL << __RQ_NET_SIS) + +/* 0x1f8 */ +#define RQ_NET_MASK (((1UL << __RQ_NET_MAX)-1) & ~RQ_LOCAL_MASK) + +/* epoch entries */ +static inline +struct hlist_head *ee_hash_slot(struct drbd_conf *mdev, sector_t sector) +{ + BUG_ON(mdev->ee_hash_s == 0); + return mdev->ee_hash + + ((unsigned int)(sector>>HT_SHIFT) % mdev->ee_hash_s); +} + +/* transfer log (drbd_request objects) */ +static inline +struct hlist_head *tl_hash_slot(struct drbd_conf *mdev, sector_t sector) +{ + BUG_ON(mdev->tl_hash_s == 0); + return mdev->tl_hash + + ((unsigned int)(sector>>HT_SHIFT) % mdev->tl_hash_s); +} + +/* when we receive the ACK for a write request, + * verify that we actually know about it */ +static inline struct drbd_request *_ack_id_to_req(struct drbd_conf *mdev, + u64 id, sector_t sector) +{ + struct hlist_head *slot = tl_hash_slot(mdev, sector); + struct hlist_node *n; + struct drbd_request *req; + + hlist_for_each_entry(req, n, slot, colision) { + if ((unsigned long)req == (unsigned long)id) { + if (req->sector != sector) { + ERR("_ack_id_to_req: found req %p but it has " + "wrong sector (%llus versus %llus)\n", req, + (unsigned long long)req->sector, + (unsigned long long)sector); + break; + } + return req; + } + } + ERR("_ack_id_to_req: failed to find req %p, sector %llus in list\n", + (void *)(unsigned long)id, (unsigned long long)sector); + return NULL; +} + +/* application reads (drbd_request objects) */ +static struct hlist_head *ar_hash_slot(struct drbd_conf *mdev, sector_t sector) +{ + return mdev->app_reads_hash + + ((unsigned int)(sector) % APP_R_HSIZE); +} + +/* when we receive the answer for a read request, + * verify that we actually know about it */ +static inline struct drbd_request *_ar_id_to_req(struct drbd_conf *mdev, + u64 id, sector_t sector) +{ + struct hlist_head *slot = ar_hash_slot(mdev, sector); + struct hlist_node *n; + struct drbd_request *req; + + hlist_for_each_entry(req, n, slot, colision) { + if ((unsigned long)req == (unsigned long)id) { + D_ASSERT(req->sector == sector); + return req; + } + } + return NULL; +} + +static inline struct drbd_request *drbd_req_new(struct drbd_conf *mdev, + struct bio *bio_src) +{ + struct bio *bio; + struct drbd_request *req = + mempool_alloc(drbd_request_mempool, GFP_NOIO); + if (likely(req)) { + bio = bio_clone(bio_src, GFP_NOIO); /* XXX cannot fail?? */ + + req->rq_state = 0; + req->mdev = mdev; + req->master_bio = bio_src; + req->private_bio = bio; + req->epoch = 0; + req->sector = bio->bi_sector; + req->size = bio->bi_size; + req->start_time = jiffies; + INIT_HLIST_NODE(&req->colision); + INIT_LIST_HEAD(&req->tl_requests); + INIT_LIST_HEAD(&req->w.list); + + bio->bi_private = req; + bio->bi_end_io = drbd_endio_pri; + bio->bi_next = NULL; + } + return req; +} + +static inline void drbd_req_free(struct drbd_request *req) +{ + mempool_free(req, drbd_request_mempool); +} + +static inline int overlaps(sector_t s1, int l1, sector_t s2, int l2) +{ + return !((s1 + (l1>>9) <= s2) || (s1 >= s2 + (l2>>9))); +} + +/* aparently too large to be inlined... + * moved to drbd_req.c */ +extern void _req_may_be_done(struct drbd_request *req, int error); +extern void _req_mod(struct drbd_request *req, + enum drbd_req_event what, int error); + +/* If you need it irqsave, do it your self! */ +static inline void req_mod(struct drbd_request *req, + enum drbd_req_event what, int error) +{ + struct drbd_conf *mdev = req->mdev; + spin_lock_irq(&mdev->req_lock); + _req_mod(req, what, error); + spin_unlock_irq(&mdev->req_lock); +} +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/linux/drbd_tag_magic.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/linux/drbd_tag_magic.h @@ -0,0 +1,83 @@ +#ifndef DRBD_TAG_MAGIC_H +#define DRBD_TAG_MAGIC_H + +#define TT_END 0 +#define TT_REMOVED 0xE000 + +/* declare packet_type enums */ +enum packet_types { +#define NL_PACKET(name, number, fields) P_ ## name = number, +#define NL_INTEGER(pn, pr, member) +#define NL_INT64(pn, pr, member) +#define NL_BIT(pn, pr, member) +#define NL_STRING(pn, pr, member, len) +#include "drbd_nl.h" + P_nl_after_last_packet, +}; + +/* These struct are used to deduce the size of the tag lists: */ +#define NL_PACKET(name, number, fields) \ + struct name ## _tag_len_struct { fields }; +#define NL_INTEGER(pn, pr, member) \ + int member; int tag_and_len ## member; +#define NL_INT64(pn, pr, member) \ + __u64 member; int tag_and_len ## member; +#define NL_BIT(pn, pr, member) \ + unsigned char member:1; int tag_and_len ## member; +#define NL_STRING(pn, pr, member, len) \ + unsigned char member[len]; int member ## _len; \ + int tag_and_len ## member; +#include "linux/drbd_nl.h" + +/* declate tag-list-sizes */ +static const int tag_list_sizes[] = { +#define NL_PACKET(name, number, fields) 2 fields , +#define NL_INTEGER(pn, pr, member) + 4 + 4 +#define NL_INT64(pn, pr, member) + 4 + 8 +#define NL_BIT(pn, pr, member) + 4 + 1 +#define NL_STRING(pn, pr, member, len) + 4 + (len) +#include "drbd_nl.h" +}; + +/* The two highest bits are used for the tag type */ +#define TT_MASK 0xC000 +#define TT_INTEGER 0x0000 +#define TT_INT64 0x4000 +#define TT_BIT 0x8000 +#define TT_STRING 0xC000 +/* The next bit indicates if processing of the tag is mandatory */ +#define T_MANDATORY 0x2000 +#define T_MAY_IGNORE 0x0000 +#define TN_MASK 0x1fff +/* The remaining 13 bits are used to enumerate the tags */ + +#define tag_type(T) ((T) & TT_MASK) +#define tag_number(T) ((T) & TN_MASK) + +/* declare tag enums */ +#define NL_PACKET(name, number, fields) fields +enum drbd_tags { +#define NL_INTEGER(pn, pr, member) T_ ## member = pn | TT_INTEGER | pr , +#define NL_INT64(pn, pr, member) T_ ## member = pn | TT_INT64 | pr , +#define NL_BIT(pn, pr, member) T_ ## member = pn | TT_BIT | pr , +#define NL_STRING(pn, pr, member, len) T_ ## member = pn | TT_STRING | pr , +#include "drbd_nl.h" +}; + +struct tag { + const char *name; + int type_n_flags; + int max_len; +}; + +/* declare tag names */ +#define NL_PACKET(name, number, fields) fields +static const struct tag tag_descriptions[] = { +#define NL_INTEGER(pn, pr, member) [ pn ] = { #member, TT_INTEGER | pr, sizeof(int) }, +#define NL_INT64(pn, pr, member) [ pn ] = { #member, TT_INT64 | pr, sizeof(__u64) }, +#define NL_BIT(pn, pr, member) [ pn ] = { #member, TT_BIT | pr, sizeof(int) }, +#define NL_STRING(pn, pr, member, len) [ pn ] = { #member, TT_STRING | pr, (len) }, +#include "drbd_nl.h" +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/linux/drbd_config.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/linux/drbd_config.h @@ -0,0 +1,43 @@ +/* + drbd_config.h + DRBD's compile time configuration. + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef DRBD_CONFIG_H +#define DRBD_CONFIG_H + +extern const char *drbd_buildtag(void); + +#define REL_VERSION "8.3.1" +#define API_VERSION 88 +#define PRO_VERSION_MIN 86 +#define PRO_VERSION_MAX 90 + +#ifndef __CHECKER__ /* for a sparse run, we need all STATICs */ +#define DBG_ALL_SYMBOLS /* no static functs, improves quality of OOPS traces */ +#endif + + +/* Define this to enable dynamic tracing controlled by module parameters + * at run time. This enables ALL use of dynamic tracing including packet + * and bio dumping, etc */ +#define ENABLE_DYNAMIC_TRACE + +/* Enable fault insertion code */ +#define DRBD_ENABLE_FAULTS + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/linux/drbd_nl.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/linux/drbd_nl.h @@ -0,0 +1,135 @@ +/* + PAKET( name, + TYPE ( pn, pr, member ) + ... + ) + + You may never reissue one of the pn arguments +*/ + +#if !defined(NL_PACKET) || !defined(NL_STRING) || !defined(NL_INTEGER) || !defined(NL_BIT) || !defined(NL_INT64) +#error "The macros NL_PACKET, NL_STRING, NL_INTEGER, NL_INT64 and NL_BIT needs to be defined" +#endif + +NL_PACKET(primary, 1, + NL_BIT( 1, T_MAY_IGNORE, overwrite_peer) +) + +NL_PACKET(secondary, 2, ) + +NL_PACKET(disk_conf, 3, + NL_INT64( 2, T_MAY_IGNORE, disk_size) + NL_STRING( 3, T_MANDATORY, backing_dev, 128) + NL_STRING( 4, T_MANDATORY, meta_dev, 128) + NL_INTEGER( 5, T_MANDATORY, meta_dev_idx) + NL_INTEGER( 6, T_MAY_IGNORE, on_io_error) + NL_INTEGER( 7, T_MAY_IGNORE, fencing) + NL_BIT( 37, T_MAY_IGNORE, use_bmbv) + NL_BIT( 53, T_MAY_IGNORE, no_disk_flush) + NL_BIT( 54, T_MAY_IGNORE, no_md_flush) + /* 55 max_bio_size was available in 8.2.6rc2 */ + NL_INTEGER( 56, T_MAY_IGNORE, max_bio_bvecs) + NL_BIT( 57, T_MAY_IGNORE, no_disk_barrier) + NL_BIT( 58, T_MAY_IGNORE, no_disk_drain) +) + +NL_PACKET(detach, 4, ) + +NL_PACKET(net_conf, 5, + NL_STRING( 8, T_MANDATORY, my_addr, 128) + NL_STRING( 9, T_MANDATORY, peer_addr, 128) + NL_STRING( 10, T_MAY_IGNORE, shared_secret, SHARED_SECRET_MAX) + NL_STRING( 11, T_MAY_IGNORE, cram_hmac_alg, SHARED_SECRET_MAX) + NL_STRING( 44, T_MAY_IGNORE, integrity_alg, SHARED_SECRET_MAX) + NL_INTEGER( 14, T_MAY_IGNORE, timeout) + NL_INTEGER( 15, T_MANDATORY, wire_protocol) + NL_INTEGER( 16, T_MAY_IGNORE, try_connect_int) + NL_INTEGER( 17, T_MAY_IGNORE, ping_int) + NL_INTEGER( 18, T_MAY_IGNORE, max_epoch_size) + NL_INTEGER( 19, T_MAY_IGNORE, max_buffers) + NL_INTEGER( 20, T_MAY_IGNORE, unplug_watermark) + NL_INTEGER( 21, T_MAY_IGNORE, sndbuf_size) + NL_INTEGER( 22, T_MAY_IGNORE, ko_count) + NL_INTEGER( 24, T_MAY_IGNORE, after_sb_0p) + NL_INTEGER( 25, T_MAY_IGNORE, after_sb_1p) + NL_INTEGER( 26, T_MAY_IGNORE, after_sb_2p) + NL_INTEGER( 39, T_MAY_IGNORE, rr_conflict) + NL_INTEGER( 40, T_MAY_IGNORE, ping_timeo) + /* 59 addr_family was available in GIT, never released */ + NL_BIT( 60, T_MANDATORY, mind_af) + NL_BIT( 27, T_MAY_IGNORE, want_lose) + NL_BIT( 28, T_MAY_IGNORE, two_primaries) + NL_BIT( 41, T_MAY_IGNORE, always_asbp) + NL_BIT( 61, T_MAY_IGNORE, no_cork) + NL_BIT( 62, T_MANDATORY, auto_sndbuf_size) +) + +NL_PACKET(disconnect, 6, ) + +NL_PACKET(resize, 7, + NL_INT64( 29, T_MAY_IGNORE, resize_size) +) + +NL_PACKET(syncer_conf, 8, + NL_INTEGER( 30, T_MAY_IGNORE, rate) + NL_INTEGER( 31, T_MAY_IGNORE, after) + NL_INTEGER( 32, T_MAY_IGNORE, al_extents) + NL_STRING( 52, T_MAY_IGNORE, verify_alg, SHARED_SECRET_MAX) + NL_STRING( 51, T_MAY_IGNORE, cpu_mask, 32) + NL_STRING( 64, T_MAY_IGNORE, csums_alg, SHARED_SECRET_MAX) + NL_BIT( 65, T_MAY_IGNORE, use_rle_encoding) +) + +NL_PACKET(invalidate, 9, ) +NL_PACKET(invalidate_peer, 10, ) +NL_PACKET(pause_sync, 11, ) +NL_PACKET(resume_sync, 12, ) +NL_PACKET(suspend_io, 13, ) +NL_PACKET(resume_io, 14, ) +NL_PACKET(outdate, 15, ) +NL_PACKET(get_config, 16, ) +NL_PACKET(get_state, 17, + NL_INTEGER( 33, T_MAY_IGNORE, state_i) +) + +NL_PACKET(get_uuids, 18, + NL_STRING( 34, T_MAY_IGNORE, uuids, (UUID_SIZE*sizeof(__u64))) + NL_INTEGER( 35, T_MAY_IGNORE, uuids_flags) +) + +NL_PACKET(get_timeout_flag, 19, + NL_BIT( 36, T_MAY_IGNORE, use_degraded) +) + +NL_PACKET(call_helper, 20, + NL_STRING( 38, T_MAY_IGNORE, helper, 32) +) + +/* Tag nr 42 already allocated in drbd-8.1 development. */ + +NL_PACKET(sync_progress, 23, + NL_INTEGER( 43, T_MAY_IGNORE, sync_progress) +) + +NL_PACKET(dump_ee, 24, + NL_STRING( 45, T_MAY_IGNORE, dump_ee_reason, 32) + NL_STRING( 46, T_MAY_IGNORE, seen_digest, SHARED_SECRET_MAX) + NL_STRING( 47, T_MAY_IGNORE, calc_digest, SHARED_SECRET_MAX) + NL_INT64( 48, T_MAY_IGNORE, ee_sector) + NL_INT64( 49, T_MAY_IGNORE, ee_block_id) + NL_STRING( 50, T_MAY_IGNORE, ee_data, 32 << 10) +) + +NL_PACKET(start_ov, 25, +) + +NL_PACKET(new_c_uuid, 26, + NL_BIT( 63, T_MANDATORY, clear_bm) +) + +#undef NL_PACKET +#undef NL_INTEGER +#undef NL_INT64 +#undef NL_BIT +#undef NL_STRING + --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/linux/drbd_limits.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/linux/drbd_limits.h @@ -0,0 +1,133 @@ +/* + drbd_limits.h + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. +*/ + +/* + * Our current limitations. + * Some of them are hard limits, + * some of them are arbitrary range limits, that make it easier to provide + * feedback about nonsense settings for certain configurable values. + */ + +#ifndef DRBD_LIMITS_H +#define DRBD_LIMITS_H 1 + +#define DEBUG_RANGE_CHECK 0 + +#define DRBD_MINOR_COUNT_MIN 1 +#define DRBD_MINOR_COUNT_MAX 255 + +#define DRBD_DIALOG_REFRESH_MIN 0 +#define DRBD_DIALOG_REFRESH_MAX 600 + +/* valid port number */ +#define DRBD_PORT_MIN 1 +#define DRBD_PORT_MAX 0xffff + +/* startup { */ + /* if you want more than 3.4 days, disable */ +#define DRBD_WFC_TIMEOUT_MIN 0 +#define DRBD_WFC_TIMEOUT_MAX 300000 +#define DRBD_WFC_TIMEOUT_DEF 0 + +#define DRBD_DEGR_WFC_TIMEOUT_MIN 0 +#define DRBD_DEGR_WFC_TIMEOUT_MAX 300000 +#define DRBD_DEGR_WFC_TIMEOUT_DEF 0 + +#define DRBD_OUTDATED_WFC_TIMEOUT_MIN 0 +#define DRBD_OUTDATED_WFC_TIMEOUT_MAX 300000 +#define DRBD_OUTDATED_WFC_TIMEOUT_DEF 0 +/* }*/ + +/* net { */ + /* timeout, unit centi seconds + * more than one minute timeout is not usefull */ +#define DRBD_TIMEOUT_MIN 1 +#define DRBD_TIMEOUT_MAX 600 +#define DRBD_TIMEOUT_DEF 60 /* 6 seconds */ + + /* active connection retries when WFConnection */ +#define DRBD_CONNECT_INT_MIN 1 +#define DRBD_CONNECT_INT_MAX 120 +#define DRBD_CONNECT_INT_DEF 10 /* seconds */ + + /* keep-alive probes when idle */ +#define DRBD_PING_INT_MIN 1 +#define DRBD_PING_INT_MAX 120 +#define DRBD_PING_INT_DEF 10 + + /* timeout for the ping packets.*/ +#define DRBD_PING_TIMEO_MIN 1 +#define DRBD_PING_TIMEO_MAX 100 +#define DRBD_PING_TIMEO_DEF 5 + + /* max number of write requests between write barriers */ +#define DRBD_MAX_EPOCH_SIZE_MIN 1 +#define DRBD_MAX_EPOCH_SIZE_MAX 20000 +#define DRBD_MAX_EPOCH_SIZE_DEF 2048 + + /* I don't think that a tcp send buffer of more than 10M is usefull */ +#define DRBD_SNDBUF_SIZE_MIN 0 +#define DRBD_SNDBUF_SIZE_MAX (10<<20) +#define DRBD_SNDBUF_SIZE_DEF (2*65535) + + /* @4k PageSize -> 128kB - 512MB */ +#define DRBD_MAX_BUFFERS_MIN 32 +#define DRBD_MAX_BUFFERS_MAX 131072 +#define DRBD_MAX_BUFFERS_DEF 2048 + + /* @4k PageSize -> 4kB - 512MB */ +#define DRBD_UNPLUG_WATERMARK_MIN 1 +#define DRBD_UNPLUG_WATERMARK_MAX 131072 +#define DRBD_UNPLUG_WATERMARK_DEF (DRBD_MAX_BUFFERS_DEF/16) + + /* 0 is disabled. + * 200 should be more than enough even for very short timeouts */ +#define DRBD_KO_COUNT_MIN 0 +#define DRBD_KO_COUNT_MAX 200 +#define DRBD_KO_COUNT_DEF 0 +/* } */ + +/* syncer { */ + /* FIXME allow rate to be zero? */ +#define DRBD_RATE_MIN 1 +/* channel bonding 10 GbE, or other hardware */ +#define DRBD_RATE_MAX (4 << 20) +#define DRBD_RATE_DEF 250 /* kb/second */ + + /* less than 7 would hit performance unneccessarily. + * 3833 is the largest prime that still does fit + * into 64 sectors of activity log */ +#define DRBD_AL_EXTENTS_MIN 7 +#define DRBD_AL_EXTENTS_MAX 3833 +#define DRBD_AL_EXTENTS_DEF 127 + +#define DRBD_AFTER_MIN -1 +#define DRBD_AFTER_MAX 255 +#define DRBD_AFTER_DEF -1 + +/* } */ + +/* drbdsetup XY resize -d Z + * you are free to reduce the device size to nothing, if you want to. + * the upper limit with 64bit kernel, enough ram and flexible meta data + * is 16 TB, currently. */ +/* DRBD_MAX_SECTORS */ +#define DRBD_DISK_SIZE_SECT_MIN 0 +#define DRBD_DISK_SIZE_SECT_MAX (16 * (2LLU << 30)) +#define DRBD_DISK_SIZE_SECT_DEF 0 /* = disabled = no user size... */ + +#define DRBD_ON_IO_ERROR_DEF PassOn +#define DRBD_FENCING_DEF DontCare +#define DRBD_AFTER_SB_0P_DEF Disconnect +#define DRBD_AFTER_SB_1P_DEF Disconnect +#define DRBD_AFTER_SB_2P_DEF Disconnect +#define DRBD_RR_CONFLICT_DEF Disconnect + +#define DRBD_MAX_BIO_BVECS_MIN 0 +#define DRBD_MAX_BIO_BVECS_MAX 128 +#define DRBD_MAX_BIO_BVECS_DEF 0 + +#undef RANGE +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/drbd/linux/drbd.h +++ linux-fsl-imx51-2.6.31/ubuntu/drbd/linux/drbd.h @@ -0,0 +1,372 @@ +/* + drbd.h + Kernel module for 2.6.x Kernels + + This file is part of DRBD by Philipp Reisner and Lars Ellenberg. + + Copyright (C) 2001-2008, LINBIT Information Technologies GmbH. + Copyright (C) 2001-2008, Philipp Reisner . + Copyright (C) 2001-2008, Lars Ellenberg . + + drbd is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + drbd is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with drbd; see the file COPYING. If not, write to + the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + +*/ +#ifndef DRBD_H +#define DRBD_H +#include +#include + +#include + +#ifdef __KERNEL__ +#include +#include +#else +#include +#include +#include + +/* Altough the Linux source code makes a difference between + generic endiness and the bitfields' endianess, there is no + architecture as of Linux-2.6.24-rc4 where the bitfileds' endianess + does not match the generic endianess. */ + +#if __BYTE_ORDER == __LITTLE_ENDIAN +#define __LITTLE_ENDIAN_BITFIELD +#elif __BYTE_ORDER == __BIG_ENDIAN +#define __BIG_ENDIAN_BITFIELD +#else +# error "sorry, weird endianness on this box" +#endif + +#endif + + +enum io_error_handler { + PassOn, /* FIXME should the better be named "Ignore"? */ + CallIOEHelper, + Detach +}; + +enum fencing_policy { + DontCare, + Resource, + Stonith +}; + +enum disconnect_handler { + Reconnect, + DropNetConf, + FreezeIO +}; + +enum after_sb_handler { + Disconnect, + DiscardYoungerPri, + DiscardOlderPri, + DiscardZeroChg, + DiscardLeastChg, + DiscardLocal, + DiscardRemote, + Consensus, + DiscardSecondary, + CallHelper, + Violently +}; + +/* KEEP the order, do not delete or insert! + * Or change the API_VERSION, too. */ +enum ret_codes { + RetCodeBase = 100, + NoError, /* 101 ... */ + LAAlreadyInUse, + OAAlreadyInUse, + LDNameInvalid, + MDNameInvalid, + LDAlreadyInUse, + LDNoBlockDev, + MDNoBlockDev, + LDOpenFailed, + MDOpenFailed, + LDDeviceTooSmall, + MDDeviceTooSmall, + LDNoConfig, + LDMounted, + MDMounted, + LDMDInvalid, + LDDeviceTooLarge, + MDIOError, + MDInvalid, + CRAMAlgNotAvail, + CRAMAlgNotDigest, + KMallocFailed, + DiscardNotAllowed, + HaveDiskConfig, + HaveNetConfig, + UnknownMandatoryTag, + MinorNotKnown, + StateNotAllowed, + GotSignal, /* EINTR */ + NoResizeDuringResync, + APrimaryNodeNeeded, + SyncAfterInvalid, + SyncAfterCycle, + PauseFlagAlreadySet, + PauseFlagAlreadyClear, + DiskLowerThanOutdated, /* obsolete, now SS_LowerThanOutdated */ + UnknownNetLinkPacket, + HaveNoDiskConfig, + ProtocolCRequired, + VMallocFailed, + IntegrityAlgNotAvail, + IntegrityAlgNotDigest, + CPUMaskParseFailed, + CSUMSAlgNotAvail, + CSUMSAlgNotDigest, + VERIFYAlgNotAvail, + VERIFYAlgNotDigest, + CSUMSResyncRunning, + VERIFYIsRunning, + DataOfWrongCurrent, + MayNotBeConnected, + + /* insert new ones above this line */ + AfterLastRetCode, +}; + +#define DRBD_PROT_A 1 +#define DRBD_PROT_B 2 +#define DRBD_PROT_C 3 + +enum drbd_role { + Unknown = 0, + Primary = 1, /* role */ + Secondary = 2, /* role */ + role_mask = 3, +}; + +/* The order of these constants is important. + * The lower ones (=WFReportParams ==> There is a socket + */ +enum drbd_conns { + StandAlone, + Disconnecting, /* Temporal state on the way to StandAlone. */ + Unconnected, /* >= Unconnected -> inc_net() succeeds */ + + /* These temporal states are all used on the way + * from >= Connected to Unconnected. + * The 'disconnect reason' states + * I do not allow to change beween them. */ + Timeout, + BrokenPipe, + NetworkFailure, + ProtocolError, + TearDown, + + WFConnection, + WFReportParams, /* we have a socket */ + Connected, /* we have introduced each other */ + StartingSyncS, /* starting full sync by IOCTL. */ + StartingSyncT, /* stariing full sync by IOCTL. */ + WFBitMapS, + WFBitMapT, + WFSyncUUID, + + /* All SyncStates are tested with this comparison + * xx >= SyncSource && xx <= PausedSyncT */ + SyncSource, + SyncTarget, + VerifyS, + VerifyT, + PausedSyncS, + PausedSyncT, + conn_mask = 31 +}; + +enum drbd_disk_state { + Diskless, + Attaching, /* In the process of reading the meta-data */ + Failed, /* Becomes Diskless as soon as we told it the peer */ + /* when >= Failed it is legal to access mdev->bc */ + Negotiating, /* Late attaching state, we need to talk to the peer */ + Inconsistent, + Outdated, + DUnknown, /* Only used for the peer, never for myself */ + Consistent, /* Might be Outdated, might be UpToDate ... */ + UpToDate, /* Only this disk state allows applications' IO ! */ + disk_mask = 15 +}; + +union drbd_state_t { +/* According to gcc's docs is the ... + * The order of allocation of bit-fields within a unit (C90 6.5.2.1, C99 6.7.2.1). + * Determined by ABI. + * pointed out by Maxim Uvarov q + * even though we transmit as "cpu_to_be32(state)", + * the offsets of the bitfields still need to be swapped + * on different endianess. + */ + struct { +#if defined(__LITTLE_ENDIAN_BITFIELD) + unsigned role:2 ; /* 3/4 primary/secondary/unknown */ + unsigned peer:2 ; /* 3/4 primary/secondary/unknown */ + unsigned conn:5 ; /* 17/32 cstates */ + unsigned disk:4 ; /* 8/16 from Diskless to UpToDate */ + unsigned pdsk:4 ; /* 8/16 from Diskless to UpToDate */ + unsigned susp:1 ; /* 2/2 IO suspended no/yes */ + unsigned aftr_isp:1 ; /* isp .. imposed sync pause */ + unsigned peer_isp:1 ; + unsigned user_isp:1 ; + unsigned _pad:11; /* 0 unused */ +#elif defined(__BIG_ENDIAN_BITFIELD) + unsigned _pad:11; /* 0 unused */ + unsigned user_isp:1 ; + unsigned peer_isp:1 ; + unsigned aftr_isp:1 ; /* isp .. imposed sync pause */ + unsigned susp:1 ; /* 2/2 IO suspended no/yes */ + unsigned pdsk:4 ; /* 8/16 from Diskless to UpToDate */ + unsigned disk:4 ; /* 8/16 from Diskless to UpToDate */ + unsigned conn:5 ; /* 17/32 cstates */ + unsigned peer:2 ; /* 3/4 primary/secondary/unknown */ + unsigned role:2 ; /* 3/4 primary/secondary/unknown */ +#else +# error "this endianess is not supported" +#endif +#ifndef DRBD_DEBUG_STATE_CHANGES +#define DRBD_DEBUG_STATE_CHANGES 0 +#endif +#if DRBD_DEBUG_STATE_CHANGES + unsigned int line; + const char *func; +#endif + }; + unsigned int i; +}; + +enum set_st_err { + SS_CW_NoNeed = 4, + SS_CW_Success = 3, + SS_NothingToDo = 2, + SS_Success = 1, + SS_UnknownError = 0, /* Used to sleep longer in _drbd_request_state */ + SS_TwoPrimaries = -1, + SS_NoUpToDateDisk = -2, + SS_BothInconsistent = -4, + SS_SyncingDiskless = -5, + SS_ConnectedOutdates = -6, + SS_PrimaryNOP = -7, + SS_ResyncRunning = -8, + SS_AlreadyStandAlone = -9, + SS_CW_FailedByPeer = -10, + SS_IsDiskLess = -11, + SS_DeviceInUse = -12, + SS_NoNetConfig = -13, + SS_NoVerifyAlg = -14, /* drbd-8.2 only */ + SS_NeedConnection = -15, /* drbd-8.2 only */ + SS_LowerThanOutdated = -16, + SS_NotSupported = -17, /* drbd-8.2 only */ + SS_InTransientState = -18, /* Retry after the next state change */ + SS_ConcurrentStChg = -19, /* Concurrent cluster side state change! */ + SS_AfterLastError = -20, /* Keep this at bottom */ +}; + +/* from drbd_strings.c */ +extern const char *conns_to_name(enum drbd_conns); +extern const char *roles_to_name(enum drbd_role); +extern const char *disks_to_name(enum drbd_disk_state); +extern const char *set_st_err_name(enum set_st_err); + +#ifndef BDEVNAME_SIZE +# define BDEVNAME_SIZE 32 +#endif + +#define SHARED_SECRET_MAX 64 + +enum MetaDataFlags { + __MDF_Consistent, + __MDF_PrimaryInd, + __MDF_ConnectedInd, + __MDF_FullSync, + __MDF_WasUpToDate, + __MDF_PeerOutDated, /* or worse (e.g. invalid). */ + __MDF_CrashedPrimary, +}; +#define MDF_Consistent (1<<__MDF_Consistent) +#define MDF_PrimaryInd (1<<__MDF_PrimaryInd) +#define MDF_ConnectedInd (1<<__MDF_ConnectedInd) +#define MDF_FullSync (1<<__MDF_FullSync) +#define MDF_WasUpToDate (1<<__MDF_WasUpToDate) +#define MDF_PeerOutDated (1<<__MDF_PeerOutDated) +#define MDF_CrashedPrimary (1<<__MDF_CrashedPrimary) + +enum UuidIndex { + Current, + Bitmap, + History_start, + History_end, + UUID_SIZE, /* nl-packet: number of dirty bits */ + UUID_FLAGS, /* nl-packet: flags */ + EXT_UUID_SIZE /* Everything. */ +}; + +enum UseTimeout { + UT_Default = 0, + UT_Degraded = 1, + UT_PeerOutdated = 2, +}; + +#define UUID_JUST_CREATED ((__u64)4) + +#define DRBD_MAGIC 0x83740267 +#define BE_DRBD_MAGIC __constant_cpu_to_be32(DRBD_MAGIC) + +/* these are of type "int" */ +#define DRBD_MD_INDEX_INTERNAL -1 +#define DRBD_MD_INDEX_FLEX_EXT -2 +#define DRBD_MD_INDEX_FLEX_INT -3 + +/* Start of the new netlink/connector stuff */ + +#define DRBD_NL_CREATE_DEVICE 0x01 +#define DRBD_NL_SET_DEFAULTS 0x02 + +/* The following line should be moved over to linux/connector.h + * when the time comes */ +#ifndef CN_IDX_DRBD +# define CN_IDX_DRBD 0x4 +/* Ubuntu "intrepid ibex" release defined CN_IDX_DRBD as 0x6 */ +#endif +#define CN_VAL_DRBD 0x1 + +/* For searching a vacant cn_idx value */ +#define CN_IDX_STEP 6977 + +struct drbd_nl_cfg_req { + int packet_type; + unsigned int drbd_minor; + int flags; + unsigned short tag_list[]; +}; + +struct drbd_nl_cfg_reply { + int packet_type; + unsigned int minor; + int ret_code; /* enum ret_code or set_st_err_t */ + unsigned short tag_list[]; /* only used with get_* calls */ +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/target_disk.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/target_disk.c @@ -0,0 +1,495 @@ +/* + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + * + * heavily based on code from kernel/iscsi.c: + * Copyright (C) 2002-2003 Ardis Technolgies , + * licensed under the terms of the GNU GPL v2.0, + */ + +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" + +static int insert_disconnect_pg(u8 *ptr) +{ + unsigned char disconnect_pg[] = {0x02, 0x0e, 0x80, 0x80, 0x00, 0x0a, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + + memcpy(ptr, disconnect_pg, sizeof(disconnect_pg)); + return sizeof(disconnect_pg); +} + +static int insert_caching_pg(u8 *ptr, int wcache, int rcache) +{ + unsigned char caching_pg[] = {0x08, 0x12, 0x10, 0x00, 0xff, 0xff, 0x00, 0x00, + 0xff, 0xff, 0xff, 0xff, 0x80, 0x14, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00}; + + memcpy(ptr, caching_pg, sizeof(caching_pg)); + if (wcache) + ptr[2] |= 0x04; /* set WCE bit if we're caching writes */ + if (!rcache) + ptr[2] |= 0x01; /* Read Cache Disable */ + + return sizeof(caching_pg); +} + +static int insert_ctrl_m_pg(u8 *ptr) +{ + unsigned char ctrl_m_pg[] = {0x0a, 0x0a, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x02, 0x4b}; + + memcpy(ptr, ctrl_m_pg, sizeof(ctrl_m_pg)); + return sizeof(ctrl_m_pg); +} + +static int insert_iec_m_pg(u8 *ptr) +{ + unsigned char iec_m_pg[] = {0x1c, 0xa, 0x08, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00}; + + memcpy(ptr, iec_m_pg, sizeof(iec_m_pg)); + return sizeof(iec_m_pg); +} + +static int insert_format_m_pg(u8 *ptr, u32 sector_size) +{ + unsigned char format_m_pg[] = {0x03, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00}; + + memcpy(ptr, format_m_pg, sizeof(format_m_pg)); + ptr[12] = (sector_size >> 8) & 0xff; + ptr[13] = sector_size & 0xff; + return sizeof(format_m_pg); +} + +static int insert_geo_m_pg(u8 *ptr, u64 sec) +{ + unsigned char geo_m_pg[] = {0x04, 0x16, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3a, 0x98, 0x00, 0x00}; + u32 ncyl; + u32 n; + + /* assume 0xff heads, 15krpm. */ + memcpy(ptr, geo_m_pg, sizeof(geo_m_pg)); + ncyl = sec >> 14; /* 256 * 64 */ + memcpy(&n, ptr+1, sizeof(u32)); + n = n | cpu_to_be32(ncyl); + memcpy(ptr+1, &n, sizeof(u32)); + return sizeof(geo_m_pg); +} + +static int build_mode_sense_response(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + struct tio *tio = cmnd->tio; + u8 *data, *scb = req->scb; + int len = 4, err = 0; + u8 pcode; + + /* changeable parameter mode pages are unsupported */ + if ((scb[2] & 0xc0) >> 6 == 0x1) + return -1; + + pcode = req->scb[2] & 0x3f; + + assert(!tio); + tio = cmnd->tio = tio_alloc(1); + data = page_address(tio->pvec[0]); + assert(data); + clear_page(data); + + if (LUReadonly(cmnd->lun)) + data[2] = 0x80; + + if ((scb[1] & 0x8)) + data[3] = 0; + else { + data[3] = 8; + len += 8; + *(u32 *)(data + 4) = (cmnd->lun->blk_cnt >> 32) ? + cpu_to_be32(0xffffffff) : cpu_to_be32(cmnd->lun->blk_cnt); + *(u32 *)(data + 8) = cpu_to_be32(1 << cmnd->lun->blk_shift); + } + + switch (pcode) { + case 0x0: + break; + case 0x2: + len += insert_disconnect_pg(data + len); + break; + case 0x3: + len += insert_format_m_pg(data + len, 1 << cmnd->lun->blk_shift); + break; + case 0x4: + len += insert_geo_m_pg(data + len, cmnd->lun->blk_cnt); + break; + case 0x8: + len += insert_caching_pg(data + len, LUWCache(cmnd->lun), + LURCache(cmnd->lun)); + break; + case 0xa: + len += insert_ctrl_m_pg(data + len); + break; + case 0x1c: + len += insert_iec_m_pg(data + len); + break; + case 0x3f: + len += insert_disconnect_pg(data + len); + len += insert_format_m_pg(data + len, 1 << cmnd->lun->blk_shift); + len += insert_geo_m_pg(data + len, cmnd->lun->blk_cnt); + len += insert_caching_pg(data + len, LUWCache(cmnd->lun), + LURCache(cmnd->lun)); + len += insert_ctrl_m_pg(data + len); + len += insert_iec_m_pg(data + len); + break; + default: + err = -1; + } + + data[0] = len - 1; + + tio_set(tio, len, 0); + + return err; +} + +static int build_inquiry_response(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + struct tio *tio = cmnd->tio; + u8 *data; + u8 *scb = req->scb; + int err = -1; + + /* + * - CmdDt and EVPD both set or EVPD and Page Code set: illegal + * - CmdDt set: not supported + */ + if ((scb[1] & 0x3) > 0x1 || (!(scb[1] & 0x3) && scb[2])) + return err; + + assert(!tio); + tio = cmnd->tio = tio_alloc(1); + data = page_address(tio->pvec[0]); + assert(data); + clear_page(data); + + if (!(scb[1] & 0x3)) { + data[2] = 4; + data[3] = 0x52; + data[4] = 59; + data[7] = 0x02; + memset(data + 8, 0x20, 28); + memcpy(data + 8, + VENDOR_ID, min_t(size_t, strlen(VENDOR_ID), 8)); + memcpy(data + 16, + PRODUCT_ID, min_t(size_t, strlen(PRODUCT_ID), 16)); + memcpy(data + 32, + PRODUCT_REV, min_t(size_t, strlen(PRODUCT_REV), 4)); + data[58] = 0x03; + data[59] = 0x20; + data[60] = 0x09; + data[61] = 0x60; + data[62] = 0x03; + data[63] = 0x00; + tio_set(tio, 64, 0); + err = 0; + } else if (scb[1] & 0x1) { + /* EVPD bit set */ + if (scb[2] == 0x0) { + data[1] = 0x0; + data[3] = 3; + data[4] = 0x0; + data[5] = 0x80; + data[6] = 0x83; + tio_set(tio, 7, 0); + err = 0; + } else if (scb[2] == 0x80) { + int len = (cmnd->lun && strlen(cmnd->lun->scsi_sn)) ? + SCSI_SN_LEN : 4; + + data[1] = 0x80; + data[3] = len; + memset(data + 4, 0x20, len); + tio_set(tio, len + 4, 0); + err = 0; + + if (len == SCSI_SN_LEN) { + char *p, *q; + + p = data + 4 + len - 1; + q = cmnd->lun->scsi_sn + len - 1; + + for (; len > 0; len--, q--) + if (isascii(*q) && isprint(*q)) + *(p--) = *q; + } + } else if (scb[2] == 0x83) { + u32 len = SCSI_ID_LEN * sizeof(u8); + + data[1] = 0x83; + data[3] = len + 4; + data[4] = 0x1; + data[5] = 0x1; + data[7] = len; + if (cmnd->lun) /* We need this ? */ + memcpy(data + 8, cmnd->lun->scsi_id, len); + tio_set(tio, len + 8, 0); + err = 0; + } + } + + tio_set(tio, min_t(u8, tio->size, scb[4]), 0); + if (!cmnd->lun) + data[0] = TYPE_NO_LUN; + + return err; +} + +static int build_report_luns_response(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + struct tio *tio = cmnd->tio; + u32 *data, size, len; + struct iet_volume *lun; + int rest, idx = 0; + + size = (u32)req->scb[6] << 24 | (u32)req->scb[7] << 16 | + (u32)req->scb[8] << 8 | (u32)req->scb[9]; + if (size < 16) + return -1; + + len = atomic_read(&cmnd->conn->session->target->nr_volumes) * 8; + size = min(size & ~(8 - 1), len + 8); + + assert(!tio); + tio = cmnd->tio = tio_alloc(get_pgcnt(size, 0)); + tio_set(tio, size, 0); + + data = page_address(tio->pvec[idx]); + assert(data); + *data++ = cpu_to_be32(len); + *data++ = 0; + size -= 8; + rest = PAGE_CACHE_SIZE - 8; + list_for_each_entry(lun, &cmnd->conn->session->target->volumes, list) { + if (lun->l_state != IDEV_RUNNING) + continue; + + *data++ = cpu_to_be32((0x3ff & lun->lun) << 16 | + ((lun->lun > 0xff) ? (0x1 << 30) : 0)); + *data++ = 0; + if ((size -= 8) == 0) + break; + if ((rest -= 8) == 0) { + idx++; + data = page_address(tio->pvec[idx]); + rest = PAGE_CACHE_SIZE; + } + } + + return 0; +} + +static int build_read_capacity_response(struct iscsi_cmnd *cmnd) +{ + struct tio *tio = cmnd->tio; + u32 *data; + + assert(!tio); + tio = cmnd->tio = tio_alloc(1); + data = page_address(tio->pvec[0]); + assert(data); + clear_page(data); + + data[0] = (cmnd->lun->blk_cnt >> 32) ? + cpu_to_be32(0xffffffff) : cpu_to_be32(cmnd->lun->blk_cnt - 1); + data[1] = cpu_to_be32(1U << cmnd->lun->blk_shift); + + tio_set(tio, 8, 0); + return 0; +} + +static int build_request_sense_response(struct iscsi_cmnd *cmnd) +{ + struct tio *tio = cmnd->tio; + u8 *data; + + assert(!tio); + tio = cmnd->tio = tio_alloc(1); + data = page_address(tio->pvec[0]); + assert(data); + memset(data, 0, 18); + data[0] = 0xf0; + data[1] = 0; + data[2] = NO_SENSE; + data[7] = 10; + tio_set(tio, 18, 0); + + return 0; +} + +static int build_service_action_in_response(struct iscsi_cmnd *cmnd) +{ + struct tio *tio = cmnd->tio; + u32 *data; + u64 *data64; + + assert(!tio); + + /* only READ_CAPACITY_16 service action is currently supported */ + if ((cmnd_hdr(cmnd)->scb[1] & 0x1F) != 0x10) + return -1; + + tio = cmnd->tio = tio_alloc(1); + data = page_address(tio->pvec[0]); + assert(data); + clear_page(data); + data64 = (u64*) data; + data64[0] = cpu_to_be64(cmnd->lun->blk_cnt - 1); + data[2] = cpu_to_be32(1UL << cmnd->lun->blk_shift); + + tio_set(tio, 12, 0); + return 0; +} + +static int build_read_response(struct iscsi_cmnd *cmnd) +{ + struct tio *tio = cmnd->tio; + + assert(tio); + assert(cmnd->lun); + + return tio_read(cmnd->lun, tio); +} + +static int build_write_response(struct iscsi_cmnd *cmnd) +{ + int err; + struct tio *tio = cmnd->tio; + + assert(tio); + assert(cmnd->lun); + + list_del_init(&cmnd->list); + err = tio_write(cmnd->lun, tio); + if (!err && !LUWCache(cmnd->lun)) + err = tio_sync(cmnd->lun, tio); + + return err; +} + +static int build_sync_cache_response(struct iscsi_cmnd *cmnd) +{ + assert(cmnd->lun); + return tio_sync(cmnd->lun, NULL); +} + +static int build_generic_response(struct iscsi_cmnd *cmnd) +{ + return 0; +} + +static int build_reserve_response(struct iscsi_cmnd *cmnd) +{ + return volume_reserve(cmnd->lun, cmnd->conn->session->sid); +} + +static int build_release_response(struct iscsi_cmnd *cmnd) +{ + return volume_release(cmnd->lun, + cmnd->conn->session->sid, 0); +} + +static int build_reservation_conflict_response(struct iscsi_cmnd *cmnd) +{ + return -EBUSY; +} + +static int disk_execute_cmnd(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + + req->opcode &= ISCSI_OPCODE_MASK; + + if (is_volume_reserved(cmnd->lun, + cmnd->conn->session->sid)) { + switch (req->scb[0]) { + case INQUIRY: + case RELEASE: + case REPORT_LUNS: + case REQUEST_SENSE: + /* allowed commands when reserved */ + break; + default: + /* return reservation conflict for all others */ + send_scsi_rsp(cmnd, + build_reservation_conflict_response); + return 0; + } + } + + switch (req->scb[0]) { + case INQUIRY: + send_data_rsp(cmnd, build_inquiry_response); + break; + case REPORT_LUNS: + send_data_rsp(cmnd, build_report_luns_response); + break; + case READ_CAPACITY: + send_data_rsp(cmnd, build_read_capacity_response); + break; + case MODE_SENSE: + send_data_rsp(cmnd, build_mode_sense_response); + break; + case REQUEST_SENSE: + send_data_rsp(cmnd, build_request_sense_response); + break; + case SERVICE_ACTION_IN: + send_data_rsp(cmnd, build_service_action_in_response); + break; + case READ_6: + case READ_10: + case READ_16: + send_data_rsp(cmnd, build_read_response); + break; + case WRITE_6: + case WRITE_10: + case WRITE_16: + case WRITE_VERIFY: + send_scsi_rsp(cmnd, build_write_response); + break; + case SYNCHRONIZE_CACHE: + send_scsi_rsp(cmnd, build_sync_cache_response); + break; + case RESERVE: + send_scsi_rsp(cmnd, build_reserve_response); + break; + case RELEASE: + send_scsi_rsp(cmnd, build_release_response); + break; + case START_STOP: + case TEST_UNIT_READY: + case VERIFY: + case VERIFY_16: + send_scsi_rsp(cmnd, build_generic_response); + break; + default: + eprintk("%s\n", "we should not come here!"); + break; + } + + return 0; +} + +struct target_type disk_ops = +{ + .id = 0, + .execute_cmnd = disk_execute_cmnd, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iscsi_dbg.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iscsi_dbg.h @@ -0,0 +1,130 @@ +#ifndef ISCSI_DBG_H +#define ISCSI_DBG_H + +#define D_SETUP (1UL << 0) +#define D_EXIT (1UL << 1) +#define D_GENERIC (1UL << 2) +#define D_READ (1UL << 3) +#define D_WRITE (1UL << 4) +#define D_IOD (1UL << 5) +#define D_THREAD (1UL << 6) +#define D_TASK_MGT (1UL << 7) +#define D_IOMODE (1UL << 8) + +#define D_DATA (D_READ | D_WRITE) + +extern unsigned long debug_enable_flags; + +#define PFX "iscsi_trgt: " + +#define dprintk(debug, fmt, args...) do { \ + if ((debug) & debug_enable_flags) { \ + printk(KERN_DEBUG PFX "%s(%d) " fmt, __FUNCTION__,\ + __LINE__, args);\ + } \ +} while (0) + +#define eprintk(fmt, args...) do { \ + printk(KERN_ERR PFX "%s(%d) " fmt, __FUNCTION__, \ + __LINE__, args);\ +} while (0) + +#define iprintk(X...) printk(KERN_INFO PFX X) + +#define assert(p) do { \ + if (!(p)) { \ + printk(KERN_CRIT PFX "BUG at %s:%d assert(%s)\n",\ + __FILE__, __LINE__, #p); \ + dump_stack(); \ + BUG(); \ + } \ +} while (0) + +#ifdef D_IOV +static inline void iscsi_dump_iov(struct msghdr *msg) +{ + int i; + printk(PFX "%p, %d\n", msg->msg_iov, msg->msg_iovlen); + for (i = 0; i < min_t(size_t, msg->msg_iovlen, ISCSI_CONN_IOV_MAX); i++) + printk(PFX "%d: %p,%d\n", i, msg->msg_iov[i].iov_base, + msg->msg_iov[i].iov_len); +} +#else +#define iscsi_dump_iov(x) do {} while (0) +#endif + +#ifdef D_DUMP_PDU +static void iscsi_dump_char(int ch) +{ + static unsigned char text[16]; + static int i = 0; + + if (ch < 0) { + while ((i % 16) != 0) { + printk(" "); + text[i] = ' '; + i++; + if ((i % 16) == 0) + printk(" | %.16s |\n", text); + else if ((i % 4) == 0) + printk(" |"); + } + i = 0; + return; + } + + text[i] = (ch < 0x20 || (ch >= 0x80 && ch <= 0xa0)) ? ' ' : ch; + printk(" %02x", ch); + i++; + if ((i % 16) == 0) { + printk(" | %.16s |\n", text); + i = 0; + } else if ((i % 4) == 0) + printk(" |"); +} + +static inline void iscsi_dump_pdu(struct iscsi_pdu *pdu) +{ + unsigned char *buf; + int i; + + buf = (void *)&pdu->bhs; + printk(PFX "BHS: (%p,%d)\n", buf, sizeof(pdu->bhs)); + for (i = 0; i < sizeof(pdu->bhs); i++) + iscsi_dump_char(*buf++); + iscsi_dump_char(-1); + + buf = (void *)pdu->ahs; + printk(PFX "AHS: (%p,%d)\n", buf, pdu->ahssize); + for (i = 0; i < pdu->ahssize; i++) + iscsi_dump_char(*buf++); + iscsi_dump_char(-1); + + printk(PFX "Data: (%d)\n", pdu->datasize); +} + +#else +#define iscsi_dump_pdu(x) do {} while (0) +#endif + +#define show_param(param)\ +{\ + dprintk(D_SETUP, "%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d\n",\ + (param)->initial_r2t,\ + (param)->immediate_data,\ + (param)->max_connections,\ + (param)->max_recv_data_length,\ + (param)->max_xmit_data_length,\ + (param)->max_burst_length,\ + (param)->first_burst_length,\ + (param)->default_wait_time,\ + (param)->default_retain_time,\ + (param)->max_outstanding_r2t,\ + (param)->data_pdu_inorder,\ + (param)->data_sequence_inorder,\ + (param)->error_recovery_level,\ + (param)->header_digest,\ + (param)->data_digest);\ +} + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/Kconfig @@ -0,0 +1,3 @@ +config SCSI_ISCSITARGET + tristate "iSCSI Target Driver" + depends on SCSI --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/BOM @@ -0,0 +1,2 @@ +Downloaded from: svn://svn.berlios.de/iscsitarget/trunk +Current Version: SVN revision r214 (0.4.17 base) --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/session.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/session.c @@ -0,0 +1,142 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#include "iscsi.h" +#include "iscsi_dbg.h" + +struct iscsi_session *session_lookup(struct iscsi_target *target, u64 sid) +{ + struct iscsi_session *session; + + list_for_each_entry(session, &target->session_list, list) { + if (session->sid == sid) + return session; + } + return NULL; +} + +static struct iscsi_session * +iet_session_alloc(struct iscsi_target *target, struct session_info *info) +{ + int i; + struct iscsi_session *session; + + dprintk(D_SETUP, "%p %u %#Lx\n", target, target->tid, + (unsigned long long) info->sid); + + session = kzalloc(sizeof(*session), GFP_KERNEL); + if (!session) + return NULL; + + session->target = target; + session->sid = info->sid; + memcpy(&session->param, &target->sess_param, sizeof(session->param)); + session->max_queued_cmnds = target->trgt_param.queued_cmnds; + + session->exp_cmd_sn = info->exp_cmd_sn; + session->max_cmd_sn = info->max_cmd_sn; + + session->initiator = kstrdup(info->initiator_name, GFP_KERNEL); + if (!session->initiator) { + kfree(session); + return NULL; + } + + INIT_LIST_HEAD(&session->conn_list); + INIT_LIST_HEAD(&session->pending_list); + + spin_lock_init(&session->cmnd_hash_lock); + for (i = 0; i < ARRAY_SIZE(session->cmnd_hash); i++) + INIT_LIST_HEAD(&session->cmnd_hash[i]); + + session->next_ttt = 1; + + list_add(&session->list, &target->session_list); + + return session; +} + +static int session_free(struct iscsi_session *session) +{ + int i; + + dprintk(D_SETUP, "%#Lx\n", (unsigned long long) session->sid); + + assert(list_empty(&session->conn_list)); + + for (i = 0; i < ARRAY_SIZE(session->cmnd_hash); i++) { + if (!list_empty(&session->cmnd_hash[i])) + BUG(); + } + + list_del(&session->list); + + kfree(session->initiator); + kfree(session); + + return 0; +} + +int session_add(struct iscsi_target *target, struct session_info *info) +{ + struct iscsi_session *session; + int err = -EEXIST; + + session = session_lookup(target, info->sid); + if (session) + return err; + + session = iet_session_alloc(target, info); + if (!session) + err = -ENOMEM; + + return err; +} + +int session_del(struct iscsi_target *target, u64 sid) +{ + struct iscsi_session *session; + + session = session_lookup(target, sid); + if (!session) + return -ENOENT; + + if (!list_empty(&session->conn_list)) { + eprintk("%llu still have connections\n", (unsigned long long) session->sid); + return -EBUSY; + } + + return session_free(session); +} + +static void iet_session_info_show(struct seq_file *seq, struct iscsi_target *target) +{ + struct iscsi_session *session; + + list_for_each_entry(session, &target->session_list, list) { + seq_printf(seq, "\tsid:%llu initiator:%s\n", + (unsigned long long) session->sid, session->initiator); + conn_info_show(seq, session); + } +} + +static int iet_session_seq_open(struct inode *inode, struct file *file) +{ + int res; + res = seq_open(file, &iet_seq_op); + if (!res) + ((struct seq_file *)file->private_data)->private = + iet_session_info_show; + return res; +} + +struct file_operations session_seq_fops = { + .owner = THIS_MODULE, + .open = iet_session_seq_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/digest.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/digest.c @@ -0,0 +1,279 @@ +/* + * iSCSI digest handling. + * (C) 2004 - 2006 Xiranet Communications GmbH + * This code is licensed under the GPL. + */ + +#include + +#include "iscsi.h" +#include "digest.h" +#include "iscsi_dbg.h" + +void digest_alg_available(unsigned int *val) +{ + if (*val & DIGEST_CRC32C && + !crypto_has_alg("crc32c", 0, CRYPTO_ALG_ASYNC)) { + printk("CRC32C digest algorithm not available in kernel\n"); + *val |= ~DIGEST_CRC32C; + } +} + +/** + * initialize support for digest calculation. + * + * digest_init - + * @conn: ptr to connection to make use of digests + * + * @return: 0 on success, < 0 on error + */ +int digest_init(struct iscsi_conn *conn) +{ + int err = 0; + + if (!(conn->hdigest_type & DIGEST_ALL)) + conn->hdigest_type = DIGEST_NONE; + + if (!(conn->ddigest_type & DIGEST_ALL)) + conn->ddigest_type = DIGEST_NONE; + + if (conn->hdigest_type & DIGEST_CRC32C || + conn->ddigest_type & DIGEST_CRC32C) { + conn->rx_hash.tfm = crypto_alloc_hash("crc32c", 0, + CRYPTO_ALG_ASYNC); + conn->rx_hash.flags = 0; + if (IS_ERR(conn->rx_hash.tfm)) { + conn->rx_hash.tfm = NULL; + err = -ENOMEM; + goto out; + } + + conn->tx_hash.tfm = crypto_alloc_hash("crc32c", 0, + CRYPTO_ALG_ASYNC); + conn->tx_hash.flags = 0; + if (IS_ERR(conn->tx_hash.tfm)) { + conn->tx_hash.tfm = NULL; + err = -ENOMEM; + goto out; + } + } + +out: + if (err) + digest_cleanup(conn); + + return err; +} + +/** + * free resources used for digest calculation. + * + * digest_cleanup - + * @conn: ptr to connection that made use of digests + */ +void digest_cleanup(struct iscsi_conn *conn) +{ + if (conn->tx_hash.tfm) + crypto_free_hash(conn->tx_hash.tfm); + if (conn->rx_hash.tfm) + crypto_free_hash(conn->rx_hash.tfm); +} + +/** + * debug handling of header digest errors: + * simulates a digest error after n PDUs / every n-th PDU of type + * HDIGEST_ERR_CORRUPT_PDU_TYPE. + */ +static inline void __dbg_simulate_header_digest_error(struct iscsi_cmnd *cmnd) +{ +#define HDIGEST_ERR_AFTER_N_CMNDS 1000 +#define HDIGEST_ERR_ONLY_ONCE 1 +#define HDIGEST_ERR_CORRUPT_PDU_TYPE ISCSI_OP_SCSI_CMD +#define HDIGEST_ERR_CORRUPT_PDU_WITH_DATA_ONLY 0 + + static int num_cmnds = 0; + static int num_errs = 0; + + if (cmnd_opcode(cmnd) == HDIGEST_ERR_CORRUPT_PDU_TYPE) { + if (HDIGEST_ERR_CORRUPT_PDU_WITH_DATA_ONLY) { + if (cmnd->pdu.datasize) + num_cmnds++; + } else + num_cmnds++; + } + + if ((num_cmnds == HDIGEST_ERR_AFTER_N_CMNDS) + && (!(HDIGEST_ERR_ONLY_ONCE && num_errs))) { + printk("*** Faking header digest error ***\n"); + printk("\tcmnd: 0x%x, itt 0x%x, sn 0x%x\n", + cmnd_opcode(cmnd), + be32_to_cpu(cmnd->pdu.bhs.itt), + be32_to_cpu(cmnd->pdu.bhs.sn)); + cmnd->hdigest = ~cmnd->hdigest; + /* make things even worse by manipulating header fields */ + cmnd->pdu.datasize += 8; + num_errs++; + num_cmnds = 0; + } + return; +} + +/** + * debug handling of data digest errors: + * simulates a digest error after n PDUs / every n-th PDU of type + * DDIGEST_ERR_CORRUPT_PDU_TYPE. + */ +static inline void __dbg_simulate_data_digest_error(struct iscsi_cmnd *cmnd) +{ +#define DDIGEST_ERR_AFTER_N_CMNDS 50 +#define DDIGEST_ERR_ONLY_ONCE 1 +#define DDIGEST_ERR_CORRUPT_PDU_TYPE ISCSI_OP_SCSI_DATA_OUT +#define DDIGEST_ERR_CORRUPT_UNSOL_DATA_ONLY 0 + + static int num_cmnds = 0; + static int num_errs = 0; + + if ((cmnd->pdu.datasize) + && (cmnd_opcode(cmnd) == DDIGEST_ERR_CORRUPT_PDU_TYPE)) { + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_SCSI_DATA_OUT: + if ((DDIGEST_ERR_CORRUPT_UNSOL_DATA_ONLY) + && (cmnd->pdu.bhs.ttt != ISCSI_RESERVED_TAG)) + break; + default: + num_cmnds++; + } + } + + if ((num_cmnds == DDIGEST_ERR_AFTER_N_CMNDS) + && (!(DDIGEST_ERR_ONLY_ONCE && num_errs)) + && (cmnd->pdu.datasize) + && (!cmnd->conn->read_overflow)) { + printk("*** Faking data digest error: ***"); + printk("\tcmnd 0x%x, itt 0x%x, sn 0x%x\n", + cmnd_opcode(cmnd), + be32_to_cpu(cmnd->pdu.bhs.itt), + be32_to_cpu(cmnd->pdu.bhs.sn)); + cmnd->ddigest = ~cmnd->ddigest; + num_errs++; + num_cmnds = 0; + } +} + +static void digest_header(struct hash_desc *hash, struct iscsi_pdu *pdu, + u8 *crc) +{ + struct scatterlist sg[2]; + unsigned int nbytes = sizeof(struct iscsi_hdr); + + sg_init_table(sg, pdu->ahssize ? 2 : 1); + + sg_set_buf(&sg[0], &pdu->bhs, nbytes); + if (pdu->ahssize) { + sg_set_buf(&sg[1], pdu->ahs, pdu->ahssize); + nbytes += pdu->ahssize; + } + + crypto_hash_init(hash); + crypto_hash_update(hash, sg, nbytes); + crypto_hash_final(hash, crc); +} + +int digest_rx_header(struct iscsi_cmnd *cmnd) +{ + u32 crc; + + digest_header(&cmnd->conn->rx_hash, &cmnd->pdu, (u8 *) &crc); + if (crc != cmnd->hdigest) + return -EIO; + + return 0; +} + +void digest_tx_header(struct iscsi_cmnd *cmnd) +{ + digest_header(&cmnd->conn->tx_hash, &cmnd->pdu, (u8 *) &cmnd->hdigest); +} + +static void digest_data(struct hash_desc *hash, struct iscsi_cmnd *cmnd, + struct tio *tio, u32 offset, u8 *crc) +{ + struct scatterlist *sg = cmnd->conn->hash_sg; + u32 size, length; + int i, idx, count; + unsigned int nbytes; + + size = cmnd->pdu.datasize; + nbytes = size = (size + 3) & ~3; + + offset += tio->offset; + idx = offset >> PAGE_CACHE_SHIFT; + offset &= ~PAGE_CACHE_MASK; + count = get_pgcnt(size, offset); + assert(idx + count <= tio->pg_cnt); + + assert(count <= ISCSI_CONN_IOV_MAX); + + sg_init_table(sg, ARRAY_SIZE(cmnd->conn->hash_sg)); + crypto_hash_init(hash); + + for (i = 0; size; i++) { + if (offset + size > PAGE_CACHE_SIZE) + length = PAGE_CACHE_SIZE - offset; + else + length = size; + + sg_set_page(&sg[i], tio->pvec[idx + i], length, offset); + size -= length; + offset = 0; + } + + sg_mark_end(&sg[i - 1]); + + crypto_hash_update(hash, sg, nbytes); + crypto_hash_final(hash, crc); +} + +int digest_rx_data(struct iscsi_cmnd *cmnd) +{ + struct tio *tio; + struct iscsi_cmnd *scsi_cmnd; + struct iscsi_data_out_hdr *req; + u32 offset, crc; + + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_SCSI_REJECT: + case ISCSI_OP_PDU_REJECT: + case ISCSI_OP_DATA_REJECT: + return 0; + case ISCSI_OP_SCSI_DATA_OUT: + scsi_cmnd = cmnd->req; + req = (struct iscsi_data_out_hdr *) &cmnd->pdu.bhs; + tio = scsi_cmnd->tio; + offset = be32_to_cpu(req->buffer_offset); + break; + default: + tio = cmnd->tio; + offset = 0; + } + + digest_data(&cmnd->conn->rx_hash, cmnd, tio, offset, (u8 *) &crc); + + if (!cmnd->conn->read_overflow && + (cmnd_opcode(cmnd) != ISCSI_OP_PDU_REJECT)) { + if (crc != cmnd->ddigest) + return -EIO; + } + + return 0; +} + +void digest_tx_data(struct iscsi_cmnd *cmnd) +{ + struct tio *tio = cmnd->tio; + struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *)&cmnd->pdu.bhs; + + assert(tio); + digest_data(&cmnd->conn->tx_hash, cmnd, tio, + be32_to_cpu(req->buffer_offset), (u8 *) &cmnd->ddigest); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/block-io.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/block-io.c @@ -0,0 +1,391 @@ +/* + * Target device block I/O. + * + * Based on file I/O driver from FUJITA Tomonori + * (C) 2004 - 2005 FUJITA Tomonori + * (C) 2006 Andre Brinkmann + * (C) 2007 Ross Walker + * (C) 2007 Ming Zhang + * This code is licenced under the GPL. + */ + +#include +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +struct blockio_data { + char *path; + struct block_device *bdev; +}; + +struct tio_work { + atomic_t error; + atomic_t bios_remaining; + struct completion tio_complete; +}; + +static void blockio_bio_endio(struct bio *bio, int error) +{ + struct tio_work *tio_work = bio->bi_private; + + error = test_bit(BIO_UPTODATE, &bio->bi_flags) ? error : -EIO; + + if (error) + atomic_set(&tio_work->error, error); + + /* If last bio signal completion */ + if (atomic_dec_and_test(&tio_work->bios_remaining)) + complete(&tio_work->tio_complete); + + bio_put(bio); +} + +/* + * Blockio_make_request(): The function translates an iscsi-request into + * a number of requests to the corresponding block device. + */ +static int +blockio_make_request(struct iet_volume *volume, struct tio *tio, int rw) +{ + struct blockio_data *bio_data = volume->private; + struct request_queue *bdev_q = bdev_get_queue(bio_data->bdev); + struct tio_work *tio_work; + struct bio *tio_bio = NULL, *bio = NULL, *biotail = NULL; + + u32 offset = tio->offset; + u32 size = tio->size; + u32 tio_index = 0; + + int max_pages = 1; + int err = 0; + + loff_t ppos = ((loff_t) tio->idx << PAGE_SHIFT) + offset; + + /* Calculate max_pages for bio_alloc (memory saver) */ + if (bdev_q) + max_pages = bio_get_nr_vecs(bio_data->bdev); + + tio_work = kzalloc(sizeof (*tio_work), GFP_KERNEL); + if (!tio_work) + return -ENOMEM; + + atomic_set(&tio_work->error, 0); + atomic_set(&tio_work->bios_remaining, 0); + init_completion(&tio_work->tio_complete); + + /* Main processing loop, allocate and fill all bios */ + while (tio_index < tio->pg_cnt) { + bio = bio_alloc(GFP_KERNEL, min(max_pages, BIO_MAX_PAGES)); + if (!bio) { + err = -ENOMEM; + goto out; + } + + bio->bi_sector = ppos >> volume->blk_shift; + bio->bi_bdev = bio_data->bdev; + bio->bi_end_io = blockio_bio_endio; + bio->bi_private = tio_work; + + if (tio_bio) + biotail = biotail->bi_next = bio; + else + tio_bio = biotail = bio; + + atomic_inc(&tio_work->bios_remaining); + + /* Loop for filling bio */ + while (tio_index < tio->pg_cnt) { + unsigned int bytes = PAGE_SIZE - offset; + + if (bytes > size) + bytes = size; + + if (!bio_add_page(bio, tio->pvec[tio_index], bytes, offset)) + break; + + size -= bytes; + ppos += bytes; + + offset = 0; + + tio_index++; + } + } + + /* Walk the list, submitting bios 1 by 1 */ + while (tio_bio) { + bio = tio_bio; + tio_bio = tio_bio->bi_next; + bio->bi_next = NULL; + + submit_bio(rw, bio); + } + + if (bdev_q && bdev_q->unplug_fn) + bdev_q->unplug_fn(bdev_q); + + wait_for_completion(&tio_work->tio_complete); + + err = atomic_read(&tio_work->error); + + kfree(tio_work); + + return err; +out: + while (tio_bio) { + bio = tio_bio; + tio_bio = tio_bio->bi_next; + + bio_put(bio); + } + + kfree(tio_work); + + return err; +} + +static int +blockio_open_path(struct iet_volume *volume, const char *path) +{ + struct blockio_data *bio_data = volume->private; + struct block_device *bdev; + int flags = FMODE_READ | (LUReadonly(volume) ? 0 : FMODE_WRITE); + int err = 0; + + bio_data->path = kstrdup(path, GFP_KERNEL); + if (!bio_data->path) + return -ENOMEM; + + bdev = open_bdev_exclusive(path, flags, THIS_MODULE); + if (IS_ERR(bdev)) { + err = PTR_ERR(bdev); + eprintk("Can't open device %s, error %d\n", path, err); + bio_data->bdev = NULL; + } else { + bio_data->bdev = bdev; + fsync_bdev(bio_data->bdev); + } + + return err; +} + +static int +set_scsiid(struct iet_volume *volume, const char *id) +{ + size_t len; + + if ((len = strlen(id)) > SCSI_ID_LEN - VENDOR_ID_LEN) { + eprintk("SCSI ID too long, %zd provided, %u max\n", len, + SCSI_ID_LEN - VENDOR_ID_LEN); + return -EINVAL; + } + + memcpy(volume->scsi_id + VENDOR_ID_LEN, id, len); + + return 0; +} + +static void +gen_scsiid(struct iet_volume *volume, struct inode *inode) +{ + int i; + u32 *p; + + strlcpy(volume->scsi_id, VENDOR_ID, VENDOR_ID_LEN); + + for (i = VENDOR_ID_LEN; i < SCSI_ID_LEN; i++) + if (volume->scsi_id[i]) + return; + + /* If a scsi id doesn't exist generate a 16 byte one: + * Bytes 1-4: target type + * Bytes 5-8: target id + * Bytes 9-12: inode number + * Bytes 13-16: device type + */ + p = (u32 *) (volume->scsi_id + VENDOR_ID_LEN); + *(p + 0) = volume->target->trgt_param.target_type; + *(p + 1) = volume->target->tid; + *(p + 2) = volume->lun; + *(p + 3) = (unsigned int) inode->i_sb->s_dev; +} + +static int +set_scsisn(struct iet_volume *volume, const char *sn) +{ + size_t len; + + if ((len = strlen(sn)) > SCSI_SN_LEN) { + eprintk("SCSI SN too long, %zd provided, %u max\n", len, + SCSI_SN_LEN); + return -EINVAL; + } + + memcpy(volume->scsi_sn, sn, len); + + return 0; +} + +/* Create an enumeration of our accepted actions */ +enum +{ + Opt_scsiid, Opt_scsisn, Opt_path, Opt_ignore, Opt_err, +}; + +/* Create a match table using our action enums and their matching options */ +static match_table_t tokens = { + {Opt_scsiid, "ScsiId=%s"}, + {Opt_scsisn, "ScsiSN=%s"}, + {Opt_path, "Path=%s"}, + {Opt_ignore, "Type=%s"}, + {Opt_ignore, "IOMode=%s"}, + {Opt_err, NULL}, +}; + +static int +parse_blockio_params(struct iet_volume *volume, char *params) +{ + struct blockio_data *info = volume->private; + int err = 0; + char *p, *q; + + /* Loop through parameters separated by commas, look up our + * parameter in match table, return enumeration and arguments + * select case based on the returned enum and run the action */ + while ((p = strsep(¶ms, ",")) != NULL) { + substring_t args[MAX_OPT_ARGS]; + int token; + if (!*p) + continue; + token = match_token(p, tokens, args); + switch (token) { + case Opt_scsiid: + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = set_scsiid(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_scsisn: + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = set_scsisn(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_path: + if (info->path) { + iprintk("Target %s, LUN %u: " + "duplicate \"Path\" param\n", + volume->target->name, volume->lun); + err = -EINVAL; + goto out; + } + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = blockio_open_path(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_ignore: + break; + default: + iprintk("Target %s, LUN %u: unknown param %s\n", + volume->target->name, volume->lun, p); + return -EINVAL; + } + } + + if (!info->path) { + iprintk("Target %s, LUN %u: missing \"Path\" param\n", + volume->target->name, volume->lun); + err = -EINVAL; + } + out: + return err; +} + +static void +blockio_detach(struct iet_volume *volume) +{ + struct blockio_data *bio_data = volume->private; + int flags = FMODE_READ | (LUReadonly(volume) ? 0 : FMODE_WRITE); + + if (bio_data->bdev) + close_bdev_exclusive(bio_data->bdev, flags); + kfree(bio_data->path); + + kfree(volume->private); +} + +static int +blockio_attach(struct iet_volume *volume, char *args) +{ + struct blockio_data *bio_data; + int err = 0; + + if (volume->private) { + eprintk("Lun %u already attached on Target %s \n", + volume->lun, volume->target->name); + return -EBUSY; + } + + bio_data = kzalloc(sizeof (*bio_data), GFP_KERNEL); + if (!bio_data) + return -ENOMEM; + + volume->private = bio_data; + + if ((err = parse_blockio_params(volume, args)) < 0) { + eprintk("Error attaching Lun %u to Target %s \n", + volume->lun, volume->target->name); + goto out; + } + + /* Assign a vendor id, generate scsi id if none exists */ + gen_scsiid(volume, bio_data->bdev->bd_inode); + + /* Offer neither write nor read caching */ + ClearLURCache(volume); + ClearLUWCache(volume); + + volume->blk_shift = SECTOR_SIZE_BITS; + volume->blk_cnt = bio_data->bdev->bd_inode->i_size >> volume->blk_shift; + + out: + if (err < 0) + blockio_detach(volume); + + return err; +} + +static void +blockio_show(struct iet_volume *volume, struct seq_file *seq) +{ + struct blockio_data *bio_data = volume->private; + + /* Used to display blockio volume info in /proc/net/iet/volumes */ + seq_printf(seq, " path:%s\n", bio_data->path); +} + +struct iotype blockio = { + .name = "blockio", + .attach = blockio_attach, + .make_request = blockio_make_request, + .detach = blockio_detach, + .show = blockio_show, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iscsi.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iscsi.c @@ -0,0 +1,1800 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#include +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +unsigned long debug_enable_flags; +unsigned long worker_thread_pool_size; + +static struct kmem_cache *iscsi_cmnd_cache; +static u8 dummy_data[PAGE_SIZE]; + +static int ctr_major; +static char ctr_name[] = "ietctl"; +extern struct file_operations ctr_fops; + +static u32 cmnd_write_size(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *hdr = cmnd_hdr(cmnd); + + if (hdr->flags & ISCSI_CMD_WRITE) + return be32_to_cpu(hdr->data_length); + return 0; +} + +static u32 cmnd_read_size(struct iscsi_cmnd *cmnd) +{ + struct iscsi_scsi_cmd_hdr *hdr = cmnd_hdr(cmnd); + + if (hdr->flags & ISCSI_CMD_READ) { + struct iscsi_rlength_ahdr *ahdr = + (struct iscsi_rlength_ahdr *)cmnd->pdu.ahs; + + if (!(hdr->flags & ISCSI_CMD_WRITE)) + return be32_to_cpu(hdr->data_length); + if (ahdr && ahdr->ahstype == ISCSI_AHSTYPE_RLENGTH) + return be32_to_cpu(ahdr->read_length); + } + return 0; +} + +static void iscsi_device_queue_cmnd(struct iscsi_cmnd *cmnd) +{ + set_cmnd_waitio(cmnd); + wthread_queue(cmnd); +} + +static void iscsi_scsi_queuecmnd(struct iscsi_cmnd *cmnd) +{ + struct iscsi_queue *queue = &cmnd->lun->queue; + + dprintk(D_GENERIC, "%p\n", cmnd); + + if ((cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) != ISCSI_CMD_UNTAGGED && + (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) != ISCSI_CMD_SIMPLE) { + cmnd->pdu.bhs.flags &= ~ISCSI_CMD_ATTR_MASK; + cmnd->pdu.bhs.flags |= ISCSI_CMD_UNTAGGED; + } + + spin_lock(&queue->queue_lock); + + set_cmnd_queued(cmnd); + + switch (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) { + case ISCSI_CMD_UNTAGGED: + case ISCSI_CMD_SIMPLE: + if (!list_empty(&queue->wait_list) || queue->ordered_cmnd) + goto pending; + queue->active_cnt++; + break; + + default: + BUG(); + } + spin_unlock(&queue->queue_lock); + + iscsi_device_queue_cmnd(cmnd); + return; + pending: + assert(list_empty(&cmnd->list)); + + list_add_tail(&cmnd->list, &queue->wait_list); + spin_unlock(&queue->queue_lock); + return; +} + +static void iscsi_scsi_dequeuecmnd(struct iscsi_cmnd *cmnd) +{ + struct iscsi_queue *queue; + + if (!cmnd->lun) + return; + queue = &cmnd->lun->queue; + spin_lock(&queue->queue_lock); + switch (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) { + case ISCSI_CMD_UNTAGGED: + case ISCSI_CMD_SIMPLE: + --queue->active_cnt; + break; + case ISCSI_CMD_ORDERED: + case ISCSI_CMD_HEAD_OF_QUEUE: + case ISCSI_CMD_ACA: + BUG(); + default: + /* Should the iscsi_scsi_queuecmnd func reject this ? */ + break; + } + + while (!list_empty(&queue->wait_list)) { + cmnd = list_entry(queue->wait_list.next, struct iscsi_cmnd, list); + switch ((cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK)) { + case ISCSI_CMD_UNTAGGED: + case ISCSI_CMD_SIMPLE: + list_del_init(&cmnd->list); + queue->active_cnt++; + iscsi_device_queue_cmnd(cmnd); + break; + case ISCSI_CMD_ORDERED: + case ISCSI_CMD_HEAD_OF_QUEUE: + case ISCSI_CMD_ACA: + BUG(); + } + } + + spin_unlock(&queue->queue_lock); + + return; +} + +/** + * create a new command. + * + * iscsi_cmnd_create - + * @conn: ptr to connection (for i/o) + * + * @return ptr to command or NULL + */ + +struct iscsi_cmnd *cmnd_alloc(struct iscsi_conn *conn, int req) +{ + struct iscsi_cmnd *cmnd; + + /* TODO: async interface is necessary ? */ + cmnd = kmem_cache_alloc(iscsi_cmnd_cache, GFP_KERNEL|__GFP_NOFAIL); + + memset(cmnd, 0, sizeof(*cmnd)); + INIT_LIST_HEAD(&cmnd->list); + INIT_LIST_HEAD(&cmnd->pdu_list); + INIT_LIST_HEAD(&cmnd->conn_list); + INIT_LIST_HEAD(&cmnd->hash_list); + cmnd->conn = conn; + spin_lock(&conn->list_lock); + atomic_inc(&conn->nr_cmnds); + if (req) + list_add_tail(&cmnd->conn_list, &conn->pdu_list); + spin_unlock(&conn->list_lock); + cmnd->tio = NULL; + + dprintk(D_GENERIC, "%p:%p\n", conn, cmnd); + + return cmnd; +} + +/** + * create a new command used as response. + * + * iscsi_cmnd_create_rsp_cmnd - + * @cmnd: ptr to request command + * + * @return ptr to response command or NULL + */ + +static struct iscsi_cmnd *iscsi_cmnd_create_rsp_cmnd(struct iscsi_cmnd *cmnd, int final) +{ + struct iscsi_cmnd *rsp = cmnd_alloc(cmnd->conn, 0); + + if (final) + set_cmnd_final(rsp); + list_add_tail(&rsp->pdu_list, &cmnd->pdu_list); + rsp->req = cmnd; + return rsp; +} + +static struct iscsi_cmnd *get_rsp_cmnd(struct iscsi_cmnd *req) +{ + return list_entry(req->pdu_list.prev, struct iscsi_cmnd, pdu_list); +} + +static void iscsi_cmnds_init_write(struct list_head *send) +{ + struct iscsi_cmnd *cmnd = list_entry(send->next, struct iscsi_cmnd, list); + struct iscsi_conn *conn = cmnd->conn; + struct list_head *pos, *next; + + spin_lock(&conn->list_lock); + + list_for_each_safe(pos, next, send) { + cmnd = list_entry(pos, struct iscsi_cmnd, list); + + dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd)); + + list_del_init(&cmnd->list); + assert(conn == cmnd->conn); + list_add_tail(&cmnd->list, &conn->write_list); + } + + spin_unlock(&conn->list_lock); + + nthread_wakeup(conn->session->target); +} + +static void iscsi_cmnd_init_write(struct iscsi_cmnd *cmnd) +{ + LIST_HEAD(head); + + if (!list_empty(&cmnd->list)) { + eprintk("%x %x %x %x %lx %u %u %u %u %u %u %u %d %d\n", + cmnd_itt(cmnd), cmnd_ttt(cmnd), cmnd_opcode(cmnd), + cmnd_scsicode(cmnd), cmnd->flags, cmnd->r2t_sn, + cmnd->r2t_length, cmnd->is_unsolicited_data, + cmnd->target_task_tag, cmnd->outstanding_r2t, + cmnd->hdigest, cmnd->ddigest, + list_empty(&cmnd->pdu_list), list_empty(&cmnd->hash_list)); + + assert(list_empty(&cmnd->list)); + } + list_add(&cmnd->list, &head); + iscsi_cmnds_init_write(&head); +} + +static void do_send_data_rsp(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + struct iscsi_cmnd *data_cmnd; + struct tio *tio = cmnd->tio; + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + struct iscsi_data_in_hdr *rsp; + u32 pdusize, expsize, scsisize, size, offset, sn; + LIST_HEAD(send); + + dprintk(D_GENERIC, "%p\n", cmnd); + pdusize = conn->session->param.max_xmit_data_length; + expsize = cmnd_read_size(cmnd); + size = min(expsize, tio->size); + offset = 0; + sn = 0; + + while (1) { + data_cmnd = iscsi_cmnd_create_rsp_cmnd(cmnd, size <= pdusize); + tio_get(tio); + data_cmnd->tio = tio; + rsp = (struct iscsi_data_in_hdr *)&data_cmnd->pdu.bhs; + + rsp->opcode = ISCSI_OP_SCSI_DATA_IN; + rsp->itt = req->itt; + rsp->ttt = cpu_to_be32(ISCSI_RESERVED_TAG); + rsp->buffer_offset = offset; + rsp->data_sn = cpu_to_be32(sn); + + if (size <= pdusize) { + data_cmnd->pdu.datasize = size; + rsp->flags = ISCSI_FLG_FINAL | ISCSI_FLG_STATUS; + + scsisize = tio->size; + if (scsisize < expsize) { + rsp->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW; + size = expsize - scsisize; + } else if (scsisize > expsize) { + rsp->flags |= ISCSI_FLG_RESIDUAL_OVERFLOW; + size = scsisize - expsize; + } else + size = 0; + rsp->residual_count = cpu_to_be32(size); + list_add_tail(&data_cmnd->list, &send); + + break; + } + + data_cmnd->pdu.datasize = pdusize; + + size -= pdusize; + offset += pdusize; + sn++; + + list_add_tail(&data_cmnd->list, &send); + } + + iscsi_cmnds_init_write(&send); +} + +static struct iscsi_cmnd *create_scsi_rsp(struct iscsi_cmnd *req) +{ + struct iscsi_cmnd *rsp; + struct iscsi_scsi_cmd_hdr *req_hdr = cmnd_hdr(req); + struct iscsi_scsi_rsp_hdr *rsp_hdr; + + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + + rsp_hdr = (struct iscsi_scsi_rsp_hdr *)&rsp->pdu.bhs; + rsp_hdr->opcode = ISCSI_OP_SCSI_RSP; + rsp_hdr->flags = ISCSI_FLG_FINAL; + rsp_hdr->response = ISCSI_RESPONSE_COMMAND_COMPLETED; + rsp_hdr->cmd_status = SAM_STAT_GOOD; + rsp_hdr->itt = req_hdr->itt; + + return rsp; +} + +static struct iscsi_cmnd *create_sense_rsp(struct iscsi_cmnd *req, + u8 sense_key, u8 asc, u8 ascq) +{ + struct iscsi_cmnd *rsp; + struct iscsi_scsi_rsp_hdr *rsp_hdr; + struct tio *tio; + struct iscsi_sense_data *sense; + + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + + rsp_hdr = (struct iscsi_scsi_rsp_hdr *)&rsp->pdu.bhs; + rsp_hdr->opcode = ISCSI_OP_SCSI_RSP; + rsp_hdr->flags = ISCSI_FLG_FINAL; + rsp_hdr->response = ISCSI_RESPONSE_COMMAND_COMPLETED; + rsp_hdr->cmd_status = SAM_STAT_CHECK_CONDITION; + rsp_hdr->itt = cmnd_hdr(req)->itt; + + tio = rsp->tio = tio_alloc(1); + sense = (struct iscsi_sense_data *) page_address(tio->pvec[0]); + assert(sense); + clear_page(sense); + sense->length = cpu_to_be16(14); + sense->data[0] = 0xf0; + sense->data[2] = sense_key; + sense->data[7] = 6; // Additional sense length + sense->data[12] = asc; + sense->data[13] = ascq; + + rsp->pdu.datasize = sizeof(struct iscsi_sense_data) + 14; + tio->size = (rsp->pdu.datasize + 3) & -4; + tio->offset = 0; + + return rsp; +} + +void send_scsi_rsp(struct iscsi_cmnd *req, int (*func)(struct iscsi_cmnd *)) +{ + struct iscsi_cmnd *rsp; + struct iscsi_scsi_rsp_hdr *rsp_hdr; + u32 size; + int ret = func(req); + + switch (ret) { + case 0: + case -EBUSY: + rsp = create_scsi_rsp(req); + rsp_hdr = (struct iscsi_scsi_rsp_hdr *) &rsp->pdu.bhs; + if ((size = cmnd_read_size(req)) != 0) { + rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW; + rsp_hdr->residual_count = cpu_to_be32(size); + } + if (ret == -EBUSY) + rsp_hdr->cmd_status = SAM_STAT_RESERVATION_CONFLICT; + break; + case -EIO: + /* Medium Error/Write Fault */ + rsp = create_sense_rsp(req, MEDIUM_ERROR, 0x03, 0x0); + break; + default: + rsp = create_sense_rsp(req, ILLEGAL_REQUEST, 0x24, 0x0); + } + iscsi_cmnd_init_write(rsp); +} + +void send_data_rsp(struct iscsi_cmnd *req, int (*func)(struct iscsi_cmnd *)) +{ + struct iscsi_cmnd *rsp; + + switch (func(req)) { + case 0: + do_send_data_rsp(req); + return; + case -EIO: + /* Medium Error/Unrecovered Read Error */ + rsp = create_sense_rsp(req, MEDIUM_ERROR, 0x11, 0x0); + break; + default: + rsp = create_sense_rsp(req, ILLEGAL_REQUEST, 0x24, 0x0); + } + iscsi_cmnd_init_write(rsp); +} + +/** + * Free a command. + * Also frees the additional header. + * + * iscsi_cmnd_remove - + * @cmnd: ptr to command + */ + +static void iscsi_cmnd_remove(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn; + + if (!cmnd) + return; + dprintk(D_GENERIC, "%p\n", cmnd); + conn = cmnd->conn; + kfree(cmnd->pdu.ahs); + + if (!list_empty(&cmnd->list)) { + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + + eprintk("cmnd %p still on some list?, %x, %x, %x, %x, %x, %x, %x %lx\n", + cmnd, req->opcode, req->scb[0], req->flags, req->itt, + be32_to_cpu(req->data_length), + req->cmd_sn, be32_to_cpu(cmnd->pdu.datasize), + conn->state); + + if (cmnd->req) { + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd->req); + eprintk("%p %x %u\n", req, req->opcode, req->scb[0]); + } + dump_stack(); + BUG(); + } + list_del(&cmnd->list); + spin_lock(&conn->list_lock); + atomic_dec(&conn->nr_cmnds); + list_del(&cmnd->conn_list); + spin_unlock(&conn->list_lock); + + if (cmnd->tio) + tio_put(cmnd->tio); + + kmem_cache_free(iscsi_cmnd_cache, cmnd); +} + +static void cmnd_skip_pdu(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + struct tio *tio = cmnd->tio; + char *addr; + u32 size; + int i; + + eprintk("%x %x %x %u\n", cmnd_itt(cmnd), cmnd_opcode(cmnd), + cmnd_hdr(cmnd)->scb[0], cmnd->pdu.datasize); + + if (!(size = cmnd->pdu.datasize)) + return; + + if (tio) + assert(tio->pg_cnt > 0); + else + tio = cmnd->tio = tio_alloc(1); + + addr = page_address(tio->pvec[0]); + assert(addr); + size = (size + 3) & -4; + conn->read_size = size; + for (i = 0; size > PAGE_CACHE_SIZE; i++, size -= PAGE_CACHE_SIZE) { + assert(i < ISCSI_CONN_IOV_MAX); + conn->read_iov[i].iov_base = addr; + conn->read_iov[i].iov_len = PAGE_CACHE_SIZE; + } + conn->read_iov[i].iov_base = addr; + conn->read_iov[i].iov_len = size; + conn->read_msg.msg_iov = conn->read_iov; + conn->read_msg.msg_iovlen = ++i; +} + +static void iscsi_cmnd_reject(struct iscsi_cmnd *req, int reason) +{ + struct iscsi_cmnd *rsp; + struct iscsi_reject_hdr *rsp_hdr; + struct tio *tio; + char *addr; + + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + rsp_hdr = (struct iscsi_reject_hdr *)&rsp->pdu.bhs; + + rsp_hdr->opcode = ISCSI_OP_REJECT; + rsp_hdr->ffffffff = ISCSI_RESERVED_TAG; + rsp_hdr->reason = reason; + + rsp->tio = tio = tio_alloc(1); + addr = page_address(tio->pvec[0]); + clear_page(addr); + memcpy(addr, &req->pdu.bhs, sizeof(struct iscsi_hdr)); + tio->size = rsp->pdu.datasize = sizeof(struct iscsi_hdr); + cmnd_skip_pdu(req); + + req->pdu.bhs.opcode = ISCSI_OP_PDU_REJECT; +} + +static void cmnd_set_sn(struct iscsi_cmnd *cmnd, int set_stat_sn) +{ + struct iscsi_conn *conn = cmnd->conn; + struct iscsi_session *sess = conn->session; + + if (set_stat_sn) + cmnd->pdu.bhs.sn = cpu_to_be32(conn->stat_sn++); + cmnd->pdu.bhs.exp_sn = cpu_to_be32(sess->exp_cmd_sn); + cmnd->pdu.bhs.max_sn = cpu_to_be32(sess->exp_cmd_sn + sess->max_queued_cmnds); +} + +static void update_stat_sn(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + u32 exp_stat_sn; + + cmnd->pdu.bhs.exp_sn = exp_stat_sn = be32_to_cpu(cmnd->pdu.bhs.exp_sn); + dprintk(D_GENERIC, "%x,%x\n", cmnd_opcode(cmnd), exp_stat_sn); + if ((int)(exp_stat_sn - conn->exp_stat_sn) > 0 && + (int)(exp_stat_sn - conn->stat_sn) <= 0) { + // free pdu resources + cmnd->conn->exp_stat_sn = exp_stat_sn; + } +} + +static int check_cmd_sn(struct iscsi_cmnd *cmnd) +{ + struct iscsi_session *session = cmnd->conn->session; + u32 cmd_sn; + + cmnd->pdu.bhs.sn = cmd_sn = be32_to_cpu(cmnd->pdu.bhs.sn); + dprintk(D_GENERIC, "%d(%d)\n", cmd_sn, session->exp_cmd_sn); + if ((s32)(cmd_sn - session->exp_cmd_sn) >= 0) + return 0; + eprintk("sequence error (%x,%x)\n", cmd_sn, session->exp_cmd_sn); + return -ISCSI_REASON_PROTOCOL_ERROR; +} + +static struct iscsi_cmnd *__cmnd_find_hash(struct iscsi_session *session, u32 itt, u32 ttt) +{ + struct list_head *head; + struct iscsi_cmnd *cmnd; + + head = &session->cmnd_hash[cmnd_hashfn(itt)]; + + list_for_each_entry(cmnd, head, hash_list) { + if (cmnd->pdu.bhs.itt == itt) { + if ((ttt != ISCSI_RESERVED_TAG) && (ttt != cmnd->target_task_tag)) + continue; + return cmnd; + } + } + + return NULL; +} + +static struct iscsi_cmnd *cmnd_find_hash(struct iscsi_session *session, u32 itt, u32 ttt) +{ + struct iscsi_cmnd *cmnd; + + spin_lock(&session->cmnd_hash_lock); + + cmnd = __cmnd_find_hash(session, itt, ttt); + + spin_unlock(&session->cmnd_hash_lock); + + return cmnd; +} + +static int cmnd_insert_hash(struct iscsi_cmnd *cmnd) +{ + struct iscsi_session *session = cmnd->conn->session; + struct iscsi_cmnd *tmp; + struct list_head *head; + int err = 0; + u32 itt = cmnd->pdu.bhs.itt; + + dprintk(D_GENERIC, "%p:%x\n", cmnd, itt); + if (itt == ISCSI_RESERVED_TAG) { + err = -ISCSI_REASON_PROTOCOL_ERROR; + goto out; + } + + head = &session->cmnd_hash[cmnd_hashfn(cmnd->pdu.bhs.itt)]; + + spin_lock(&session->cmnd_hash_lock); + + tmp = __cmnd_find_hash(session, itt, ISCSI_RESERVED_TAG); + if (!tmp) { + list_add_tail(&cmnd->hash_list, head); + set_cmnd_hashed(cmnd); + } else + err = -ISCSI_REASON_TASK_IN_PROGRESS; + + spin_unlock(&session->cmnd_hash_lock); + + if (!err) { + update_stat_sn(cmnd); + err = check_cmd_sn(cmnd); + } + +out: + return err; +} + +static void __cmnd_remove_hash(struct iscsi_cmnd *cmnd) +{ + list_del(&cmnd->hash_list); +} + +static void cmnd_remove_hash(struct iscsi_cmnd *cmnd) +{ + struct iscsi_session *session = cmnd->conn->session; + struct iscsi_cmnd *tmp; + + spin_lock(&session->cmnd_hash_lock); + + tmp = __cmnd_find_hash(session, cmnd->pdu.bhs.itt, ISCSI_RESERVED_TAG); + + if (tmp && tmp == cmnd) + __cmnd_remove_hash(tmp); + else + eprintk("%p:%x not found\n", cmnd, cmnd_itt(cmnd)); + + spin_unlock(&session->cmnd_hash_lock); +} + +static void cmnd_skip_data(struct iscsi_cmnd *req) +{ + struct iscsi_cmnd *rsp; + struct iscsi_scsi_rsp_hdr *rsp_hdr; + u32 size; + + rsp = get_rsp_cmnd(req); + rsp_hdr = (struct iscsi_scsi_rsp_hdr *)&rsp->pdu.bhs; + if (cmnd_opcode(rsp) != ISCSI_OP_SCSI_RSP) { + eprintk("unexpected response command %u\n", cmnd_opcode(rsp)); + return; + } + + size = cmnd_write_size(req); + if (size) { + rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW; + rsp_hdr->residual_count = cpu_to_be32(size); + } + size = cmnd_read_size(req); + if (size) { + if (cmnd_hdr(req)->flags & ISCSI_CMD_WRITE) { + rsp_hdr->flags |= ISCSI_FLG_BIRESIDUAL_UNDERFLOW; + rsp_hdr->bi_residual_count = cpu_to_be32(size); + } else { + rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW; + rsp_hdr->residual_count = cpu_to_be32(size); + } + } + req->pdu.bhs.opcode = + (req->pdu.bhs.opcode & ~ISCSI_OPCODE_MASK) | ISCSI_OP_SCSI_REJECT; + + cmnd_skip_pdu(req); +} + +static int cmnd_recv_pdu(struct iscsi_conn *conn, struct tio *tio, u32 offset, u32 size) +{ + int idx, i; + char *addr; + + dprintk(D_GENERIC, "%p %u,%u\n", tio, offset, size); + offset += tio->offset; + + if (!(offset < tio->offset + tio->size) || + !(offset + size <= tio->offset + tio->size)) { + eprintk("%u %u %u %u", offset, size, tio->offset, tio->size); + return -EIO; + } + assert(offset < tio->offset + tio->size); + assert(offset + size <= tio->offset + tio->size); + + idx = offset >> PAGE_CACHE_SHIFT; + offset &= ~PAGE_CACHE_MASK; + + conn->read_msg.msg_iov = conn->read_iov; + conn->read_size = size = (size + 3) & -4; + conn->read_overflow = 0; + + i = 0; + while (1) { + assert(tio->pvec[idx]); + addr = page_address(tio->pvec[idx]); + assert(addr); + conn->read_iov[i].iov_base = addr + offset; + if (offset + size <= PAGE_CACHE_SIZE) { + conn->read_iov[i].iov_len = size; + conn->read_msg.msg_iovlen = ++i; + break; + } + conn->read_iov[i].iov_len = PAGE_CACHE_SIZE - offset; + size -= conn->read_iov[i].iov_len; + offset = 0; + if (++i >= ISCSI_CONN_IOV_MAX) { + conn->read_msg.msg_iovlen = i; + conn->read_overflow = size; + conn->read_size -= size; + break; + } + + idx++; + } + + return 0; +} + +static void set_offset_and_length(struct iet_volume *lu, u8 *cmd, loff_t *off, u32 *len) +{ + assert(lu); + + switch (cmd[0]) { + case READ_6: + case WRITE_6: + *off = ((cmd[1] & 0x1f) << 16) + (cmd[2] << 8) + cmd[3]; + *len = cmd[4]; + if (!*len) + *len = 256; + break; + case READ_10: + case WRITE_10: + case WRITE_VERIFY: + *off = (u32)cmd[2] << 24 | (u32)cmd[3] << 16 | + (u32)cmd[4] << 8 | (u32)cmd[5]; + *len = (cmd[7] << 8) + cmd[8]; + break; + case READ_16: + case WRITE_16: + *off = (u64)cmd[2] << 56 | (u64)cmd[3] << 48 | + (u64)cmd[4] << 40 | (u64)cmd[5] << 32 | + (u64)cmd[6] << 24 | (u64)cmd[7] << 16 | + (u64)cmd[8] << 8 | (u64)cmd[9]; + *len = (u32)cmd[10] << 24 | (u32)cmd[11] << 16 | + (u32)cmd[12] << 8 | (u32)cmd[13]; + break; + default: + BUG(); + } + + *off <<= lu->blk_shift; + *len <<= lu->blk_shift; +} + +static u32 translate_lun(u16 * data) +{ + u8 *p = (u8 *) data; + u32 lun = ~0U; + + switch (*p >> 6) { + case 0: + lun = p[1]; + break; + case 1: + lun = (0x3f & p[0]) << 8 | p[1]; + break; + case 2: + case 3: + default: + eprintk("%u %u %u %u\n", data[0], data[1], data[2], data[3]); + break; + } + + return lun; +} + +static void send_r2t(struct iscsi_cmnd *req) +{ + struct iscsi_cmnd *rsp; + struct iscsi_r2t_hdr *rsp_hdr; + u32 length, offset, burst; + LIST_HEAD(send); + + length = req->r2t_length; + burst = req->conn->session->param.max_burst_length; + offset = be32_to_cpu(cmnd_hdr(req)->data_length) - length; + + do { + rsp = iscsi_cmnd_create_rsp_cmnd(req, 0); + rsp->pdu.bhs.ttt = req->target_task_tag; + + rsp_hdr = (struct iscsi_r2t_hdr *)&rsp->pdu.bhs; + rsp_hdr->opcode = ISCSI_OP_R2T; + rsp_hdr->flags = ISCSI_FLG_FINAL; + memcpy(rsp_hdr->lun, cmnd_hdr(req)->lun, 8); + rsp_hdr->itt = cmnd_hdr(req)->itt; + rsp_hdr->r2t_sn = cpu_to_be32(req->r2t_sn++); + rsp_hdr->buffer_offset = cpu_to_be32(offset); + if (length > burst) { + rsp_hdr->data_length = cpu_to_be32(burst); + length -= burst; + offset += burst; + } else { + rsp_hdr->data_length = cpu_to_be32(length); + length = 0; + } + + dprintk(D_WRITE, "%x %u %u %u %u\n", cmnd_itt(req), + be32_to_cpu(rsp_hdr->data_length), + be32_to_cpu(rsp_hdr->buffer_offset), + be32_to_cpu(rsp_hdr->r2t_sn), req->outstanding_r2t); + + list_add_tail(&rsp->list, &send); + + if (++req->outstanding_r2t >= req->conn->session->param.max_outstanding_r2t) + break; + + } while (length); + + iscsi_cmnds_init_write(&send); +} + +static void scsi_cmnd_exec(struct iscsi_cmnd *cmnd) +{ + if (cmnd->r2t_length) { + if (!cmnd->is_unsolicited_data) + send_r2t(cmnd); + } else { + if (cmnd->lun) { + iscsi_scsi_queuecmnd(cmnd); + } else { + iscsi_device_queue_cmnd(cmnd); + } + } +} + +static int noop_out_start(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd) +{ + u32 size, tmp; + int i, err = 0; + + if (cmnd_ttt(cmnd) != cpu_to_be32(ISCSI_RESERVED_TAG)) { + /* + * We don't request a NOP-Out by sending a NOP-In. + * See 10.18.2 in the draft 20. + */ + eprintk("initiator bug %x\n", cmnd_itt(cmnd)); + err = -ISCSI_REASON_PROTOCOL_ERROR; + goto out; + } + + if (cmnd_itt(cmnd) == cpu_to_be32(ISCSI_RESERVED_TAG)) { + if (!(cmnd->pdu.bhs.opcode & ISCSI_OP_IMMEDIATE)) + eprintk("%s\n","initiator bug!"); + update_stat_sn(cmnd); + err = check_cmd_sn(cmnd); + if (err) + goto out; + } else if ((err = cmnd_insert_hash(cmnd)) < 0) { + eprintk("ignore this request %x\n", cmnd_itt(cmnd)); + goto out; + } + + if ((size = cmnd->pdu.datasize)) { + size = (size + 3) & -4; + conn->read_msg.msg_iov = conn->read_iov; + if (cmnd->pdu.bhs.itt != cpu_to_be32(ISCSI_RESERVED_TAG)) { + struct tio *tio; + int pg_cnt = get_pgcnt(size, 0); + + assert(pg_cnt < ISCSI_CONN_IOV_MAX); + cmnd->tio = tio = tio_alloc(pg_cnt); + tio_set(tio, size, 0); + + for (i = 0; i < pg_cnt; i++) { + conn->read_iov[i].iov_base + = page_address(tio->pvec[i]); + tmp = min_t(u32, size, PAGE_CACHE_SIZE); + conn->read_iov[i].iov_len = tmp; + conn->read_size += tmp; + size -= tmp; + } + } else { + for (i = 0; i < ISCSI_CONN_IOV_MAX; i++) { + conn->read_iov[i].iov_base = dummy_data; + tmp = min_t(u32, size, sizeof(dummy_data)); + conn->read_iov[i].iov_len = tmp; + conn->read_size += tmp; + size -= tmp; + } + } + assert(!size); + conn->read_overflow = size; + conn->read_msg.msg_iovlen = i; + } + +out: + return err; +} + +static u32 get_next_ttt(struct iscsi_session *session) +{ + u32 ttt; + + if (session->next_ttt == ISCSI_RESERVED_TAG) + session->next_ttt++; + ttt = session->next_ttt++; + + return cpu_to_be32(ttt); +} + +static void scsi_cmnd_start(struct iscsi_conn *conn, struct iscsi_cmnd *req) +{ + struct iscsi_scsi_cmd_hdr *req_hdr = cmnd_hdr(req); + + dprintk(D_GENERIC, "scsi command: %02x\n", req_hdr->scb[0]); + + req->lun = volume_get(conn->session->target, translate_lun(req_hdr->lun)); + if (!req->lun) { + switch (req_hdr->scb[0]) { + case INQUIRY: + case REPORT_LUNS: + break; + default: + eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]); + create_sense_rsp(req, ILLEGAL_REQUEST, 0x25, 0x0); + cmnd_skip_data(req); + goto out; + } + } else + set_cmnd_lunit(req); + + switch (req_hdr->scb[0]) { + case SERVICE_ACTION_IN: + if ((req_hdr->scb[1] & 0x1f) != 0x10) + goto error; + case INQUIRY: + case REPORT_LUNS: + case TEST_UNIT_READY: + case SYNCHRONIZE_CACHE: + case VERIFY: + case VERIFY_16: + case START_STOP: + case READ_CAPACITY: + case MODE_SENSE: + case REQUEST_SENSE: + case RESERVE: + case RELEASE: + { + if (!(req_hdr->flags & ISCSI_CMD_FINAL) || req->pdu.datasize) { + /* unexpected unsolicited data */ + eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]); + create_sense_rsp(req, ABORTED_COMMAND, 0xc, 0xc); + cmnd_skip_data(req); + } + break; + } + case READ_6: + case READ_10: + case READ_16: + { + loff_t offset; + u32 length; + + if (!(req_hdr->flags & ISCSI_CMD_FINAL) || req->pdu.datasize) { + /* unexpected unsolicited data */ + eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]); + create_sense_rsp(req, ABORTED_COMMAND, 0xc, 0xc); + cmnd_skip_data(req); + break; + } + + set_offset_and_length(req->lun, req_hdr->scb, &offset, &length); + req->tio = tio_alloc(get_pgcnt(length, offset)); + tio_set(req->tio, length, offset); + break; + } + case WRITE_6: + case WRITE_10: + case WRITE_16: + case WRITE_VERIFY: + { + struct iscsi_sess_param *param = &conn->session->param; + loff_t offset; + u32 length; + + req->r2t_length = be32_to_cpu(req_hdr->data_length) - req->pdu.datasize; + req->is_unsolicited_data = !(req_hdr->flags & ISCSI_CMD_FINAL); + req->target_task_tag = get_next_ttt(conn->session); + + if (LUReadonly(req->lun)) { + create_sense_rsp(req, DATA_PROTECT, 0x27, 0x0); + cmnd_skip_data(req); + break; + } + + if (!param->immediate_data && req->pdu.datasize) + eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]); + + if (param->initial_r2t && !(req_hdr->flags & ISCSI_CMD_FINAL)) + eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]); + + if (req_hdr->scb[0] == WRITE_VERIFY && req_hdr->scb[1] & 0x02) + eprintk("Verification is ignored %x\n", cmnd_itt(req)); + + set_offset_and_length(req->lun, req_hdr->scb, &offset, &length); + if (cmnd_write_size(req) != length) + eprintk("%x %u %u\n", cmnd_itt(req), cmnd_write_size(req), length); + + req->tio = tio_alloc(get_pgcnt(length, offset)); + tio_set(req->tio, length, offset); + + if (req->pdu.datasize) { + if (cmnd_recv_pdu(conn, req->tio, 0, req->pdu.datasize) < 0) + assert(0); + } + break; + } + error: + default: + eprintk("Unsupported %x\n", req_hdr->scb[0]); + create_sense_rsp(req, ILLEGAL_REQUEST, 0x20, 0x0); + cmnd_skip_data(req); + break; + } + +out: + return; +} + +static void data_out_start(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd) +{ + struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *)&cmnd->pdu.bhs; + struct iscsi_cmnd *scsi_cmnd = NULL; + u32 offset = be32_to_cpu(req->buffer_offset); + + update_stat_sn(cmnd); + + cmnd->req = scsi_cmnd = cmnd_find_hash(conn->session, req->itt, req->ttt); + if (!scsi_cmnd) { + eprintk("unable to find scsi task %x %x\n", + cmnd_itt(cmnd), cmnd_ttt(cmnd)); + goto skip_data; + } + + if (scsi_cmnd->r2t_length < cmnd->pdu.datasize) { + eprintk("invalid data len %x %u %u\n", + cmnd_itt(scsi_cmnd), cmnd->pdu.datasize, scsi_cmnd->r2t_length); + goto skip_data; + } + + if (scsi_cmnd->r2t_length + offset != cmnd_write_size(scsi_cmnd)) { + eprintk("%x %u %u %u\n", cmnd_itt(scsi_cmnd), scsi_cmnd->r2t_length, + offset, cmnd_write_size(scsi_cmnd)); + goto skip_data; + } + + scsi_cmnd->r2t_length -= cmnd->pdu.datasize; + + if (req->ttt == cpu_to_be32(ISCSI_RESERVED_TAG)) { + /* unsolicited burst data */ + if (scsi_cmnd->pdu.bhs.flags & ISCSI_FLG_FINAL) { + eprintk("unexpected data from %x %x\n", + cmnd_itt(cmnd), cmnd_ttt(cmnd)); + goto skip_data; + } + } + + dprintk(D_WRITE, "%u %p %p %p %u %u\n", req->ttt, cmnd, scsi_cmnd, + scsi_cmnd->tio, offset, cmnd->pdu.datasize); + + if (cmnd_recv_pdu(conn, scsi_cmnd->tio, offset, cmnd->pdu.datasize) < 0) + goto skip_data; + return; + +skip_data: + cmnd->pdu.bhs.opcode = ISCSI_OP_DATA_REJECT; + cmnd_skip_pdu(cmnd); + return; +} + +static void data_out_end(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd) +{ + struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *) &cmnd->pdu.bhs; + struct iscsi_cmnd *scsi_cmnd; + u32 offset; + + assert(cmnd); + scsi_cmnd = cmnd->req; + assert(scsi_cmnd); + + if (conn->read_overflow) { + eprintk("%x %u\n", cmnd_itt(cmnd), conn->read_overflow); + assert(scsi_cmnd->tio); + offset = be32_to_cpu(req->buffer_offset); + offset += cmnd->pdu.datasize - conn->read_overflow; + if (cmnd_recv_pdu(conn, scsi_cmnd->tio, offset, conn->read_overflow) < 0) + assert(0); + return; + } + + if (req->ttt == cpu_to_be32(ISCSI_RESERVED_TAG)) { + if (req->flags & ISCSI_FLG_FINAL) { + scsi_cmnd->is_unsolicited_data = 0; + if (!cmnd_pending(scsi_cmnd)) + scsi_cmnd_exec(scsi_cmnd); + } + } else { + /* TODO : proper error handling */ + if (!(req->flags & ISCSI_FLG_FINAL) && scsi_cmnd->r2t_length == 0) + eprintk("initiator error %x\n", cmnd_itt(scsi_cmnd)); + + if (!(req->flags & ISCSI_FLG_FINAL)) + goto out; + + scsi_cmnd->outstanding_r2t--; + + if (scsi_cmnd->r2t_length == 0) + assert(list_empty(&scsi_cmnd->pdu_list)); + + scsi_cmnd_exec(scsi_cmnd); + } + +out: + iscsi_cmnd_remove(cmnd); + return; +} + +static int __cmnd_abort(struct iscsi_cmnd *cmnd) +{ + if (cmnd_waitio(cmnd)) + return -ISCSI_RESPONSE_UNKNOWN_TASK; + + if (cmnd->conn->read_cmnd != cmnd) + cmnd_release(cmnd, 1); + else if (cmnd_rxstart(cmnd)) + set_cmnd_tmfabort(cmnd); + else + return -ISCSI_RESPONSE_UNKNOWN_TASK; + + return 0; +} + +static int cmnd_abort(struct iscsi_session *session, u32 itt) +{ + struct iscsi_cmnd *cmnd; + int err = -ISCSI_RESPONSE_UNKNOWN_TASK; + + if ((cmnd = cmnd_find_hash(session, itt, ISCSI_RESERVED_TAG))) { + eprintk("%x %x %x %u %u %u %u\n", cmnd_itt(cmnd), cmnd_opcode(cmnd), + cmnd->r2t_length, cmnd_scsicode(cmnd), + cmnd_write_size(cmnd), cmnd->is_unsolicited_data, + cmnd->outstanding_r2t); + err = __cmnd_abort(cmnd); + } + + return err; +} + +static int target_reset(struct iscsi_cmnd *req, u32 lun, int all) +{ + struct iscsi_target *target = req->conn->session->target; + struct iscsi_session *session; + struct iscsi_conn *conn; + struct iscsi_cmnd *cmnd, *tmp; + struct iet_volume *volumes; + + list_for_each_entry(session, &target->session_list, list) { + list_for_each_entry(conn, &session->conn_list, list) { + list_for_each_entry_safe(cmnd, tmp, &conn->pdu_list, conn_list) { + if (cmnd == req) + continue; + + if (all) + __cmnd_abort(cmnd); + else if (translate_lun(cmnd_hdr(cmnd)->lun) == lun) + __cmnd_abort(cmnd); + } + } + } + + list_for_each_entry(volumes, &target->volumes, list) + if (all || volumes->lun == lun) + /* force release */ + volume_release(volumes, 0, 1); + + return 0; +} + +static void task_set_abort(struct iscsi_cmnd *req) +{ + struct iscsi_session *session = req->conn->session; + struct iscsi_conn *conn; + struct iscsi_cmnd *cmnd, *tmp; + + list_for_each_entry(conn, &session->conn_list, list) { + list_for_each_entry_safe(cmnd, tmp, &conn->pdu_list, conn_list) { + if (cmnd != req) + __cmnd_abort(cmnd); + } + } +} + +static inline char *tmf_desc(int fun) +{ + static char *tmf_desc[] = { + "Unknown Function", + "Abort Task", + "Abort Task Set", + "Clear ACA", + "Clear Task Set", + "Logical Unit Reset", + "Target Warm Reset", + "Target Cold Reset", + "Task Reassign", + }; + + if ((fun < ISCSI_FUNCTION_ABORT_TASK) || + (fun > ISCSI_FUNCTION_TASK_REASSIGN)) + fun = 0; + + return tmf_desc[fun]; +} + +static inline char *rsp_desc(int rsp) +{ + static char *rsp_desc[] = { + "Function Complete", + "Unknown Task", + "Unknown LUN", + "Task Allegiant", + "Failover Unsupported", + "Function Unsupported", + "No Authorization", + "Function Rejected", + "Unknown Response", + }; + + if (((rsp < ISCSI_RESPONSE_FUNCTION_COMPLETE) || + (rsp > ISCSI_RESPONSE_NO_AUTHORIZATION)) && + (rsp != ISCSI_RESPONSE_FUNCTION_REJECTED)) + rsp = 8; + else if (rsp == ISCSI_RESPONSE_FUNCTION_REJECTED) + rsp = 7; + + return rsp_desc[rsp]; +} + +static void execute_task_management(struct iscsi_cmnd *req) +{ + struct iscsi_conn *conn = req->conn; + struct iscsi_session *session = conn->session; + struct iscsi_target *target = session->target; + struct iscsi_cmnd *rsp; + struct iscsi_task_mgt_hdr *req_hdr = (struct iscsi_task_mgt_hdr *)&req->pdu.bhs; + struct iscsi_task_rsp_hdr *rsp_hdr; + u32 lun; + int err, function = req_hdr->function & ISCSI_FUNCTION_MASK; + + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + rsp_hdr = (struct iscsi_task_rsp_hdr *)&rsp->pdu.bhs; + + rsp_hdr->opcode = ISCSI_OP_SCSI_TASK_MGT_RSP; + rsp_hdr->flags = ISCSI_FLG_FINAL; + rsp_hdr->itt = req_hdr->itt; + rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_COMPLETE; + + switch (function) { + case ISCSI_FUNCTION_ABORT_TASK: + case ISCSI_FUNCTION_ABORT_TASK_SET: + case ISCSI_FUNCTION_CLEAR_ACA: + case ISCSI_FUNCTION_CLEAR_TASK_SET: + case ISCSI_FUNCTION_LOGICAL_UNIT_RESET: + lun = translate_lun(req_hdr->lun); + if (!volume_lookup(target, lun)) { + rsp_hdr->response = ISCSI_RESPONSE_UNKNOWN_LUN; + goto out; + } + } + + switch (function) { + case ISCSI_FUNCTION_ABORT_TASK: + if ((err = cmnd_abort(conn->session, req_hdr->rtt)) < 0) + rsp_hdr->response = -err; + break; + case ISCSI_FUNCTION_ABORT_TASK_SET: + task_set_abort(req); + break; + case ISCSI_FUNCTION_CLEAR_ACA: + rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED; + break; + case ISCSI_FUNCTION_CLEAR_TASK_SET: + rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED; + break; + case ISCSI_FUNCTION_LOGICAL_UNIT_RESET: + target_reset(req, translate_lun(req_hdr->lun), 0); + break; + case ISCSI_FUNCTION_TARGET_WARM_RESET: + case ISCSI_FUNCTION_TARGET_COLD_RESET: + target_reset(req, 0, 1); + if (function == ISCSI_FUNCTION_TARGET_COLD_RESET) + set_cmnd_close(rsp); + break; + case ISCSI_FUNCTION_TASK_REASSIGN: + rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED; + break; + default: + rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_REJECTED; + break; + } +out: + iprintk("%s (%02x) issued on tid:%d lun:%d by sid:%llu (%s)\n", + tmf_desc(function), function, target->tid, + translate_lun(req_hdr->lun), session->sid, + rsp_desc(rsp_hdr->response)); + + iscsi_cmnd_init_write(rsp); +} + +static void noop_out_exec(struct iscsi_cmnd *req) +{ + struct iscsi_cmnd *rsp; + struct iscsi_nop_in_hdr *rsp_hdr; + + if (cmnd_itt(req) != cpu_to_be32(ISCSI_RESERVED_TAG)) { + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + + rsp_hdr = (struct iscsi_nop_in_hdr *)&rsp->pdu.bhs; + rsp_hdr->opcode = ISCSI_OP_NOOP_IN; + rsp_hdr->flags = ISCSI_FLG_FINAL; + rsp_hdr->itt = req->pdu.bhs.itt; + rsp_hdr->ttt = cpu_to_be32(ISCSI_RESERVED_TAG); + + if (req->pdu.datasize) + assert(req->tio); + else + assert(!req->tio); + + if (req->tio) { + tio_get(req->tio); + rsp->tio = req->tio; + } + + assert(get_pgcnt(req->pdu.datasize, 0) < ISCSI_CONN_IOV_MAX); + rsp->pdu.datasize = req->pdu.datasize; + iscsi_cmnd_init_write(rsp); + } else + iscsi_cmnd_remove(req); +} + +static void logout_exec(struct iscsi_cmnd *req) +{ + struct iscsi_logout_req_hdr *req_hdr; + struct iscsi_cmnd *rsp; + struct iscsi_logout_rsp_hdr *rsp_hdr; + + req_hdr = (struct iscsi_logout_req_hdr *)&req->pdu.bhs; + rsp = iscsi_cmnd_create_rsp_cmnd(req, 1); + rsp_hdr = (struct iscsi_logout_rsp_hdr *)&rsp->pdu.bhs; + rsp_hdr->opcode = ISCSI_OP_LOGOUT_RSP; + rsp_hdr->flags = ISCSI_FLG_FINAL; + rsp_hdr->itt = req_hdr->itt; + set_cmnd_close(rsp); + iscsi_cmnd_init_write(rsp); +} + +static void iscsi_cmnd_exec(struct iscsi_cmnd *cmnd) +{ + dprintk(D_GENERIC, "%p,%x,%u\n", cmnd, cmnd_opcode(cmnd), cmnd->pdu.bhs.sn); + + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_NOOP_OUT: + noop_out_exec(cmnd); + break; + case ISCSI_OP_SCSI_CMD: + scsi_cmnd_exec(cmnd); + break; + case ISCSI_OP_SCSI_TASK_MGT_MSG: + execute_task_management(cmnd); + break; + case ISCSI_OP_LOGOUT_CMD: + logout_exec(cmnd); + break; + case ISCSI_OP_SCSI_REJECT: + iscsi_cmnd_init_write(get_rsp_cmnd(cmnd)); + break; + case ISCSI_OP_TEXT_CMD: + case ISCSI_OP_SNACK_CMD: + break; + default: + eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd)); + break; + } +} + +static void __cmnd_send_pdu(struct iscsi_conn *conn, struct tio *tio, u32 offset, u32 size) +{ + dprintk(D_GENERIC, "%p %u,%u\n", tio, offset, size); + offset += tio->offset; + + assert(offset <= tio->offset + tio->size); + assert(offset + size <= tio->offset + tio->size); + + conn->write_tcmnd = tio; + conn->write_offset = offset; + conn->write_size += size; +} + +static void cmnd_send_pdu(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd) +{ + u32 size; + struct tio *tio; + + if (!cmnd->pdu.datasize) + return; + + size = (cmnd->pdu.datasize + 3) & -4; + tio = cmnd->tio; + assert(tio); + assert(tio->size == size); + __cmnd_send_pdu(conn, tio, 0, size); +} + +static void set_cork(struct socket *sock, int on) +{ + int opt = on; + mm_segment_t oldfs; + + oldfs = get_fs(); + set_fs(get_ds()); + sock->ops->setsockopt(sock, SOL_TCP, TCP_CORK, (void *)&opt, sizeof(opt)); + set_fs(oldfs); +} + +void cmnd_release(struct iscsi_cmnd *cmnd, int force) +{ + struct iscsi_cmnd *req, *rsp; + int is_last = 0; + + if (!cmnd) + return; + +/* eprintk("%x %lx %d\n", cmnd_opcode(cmnd), cmnd->flags, force); */ + + req = cmnd->req; + is_last = cmnd_final(cmnd); + + if (force) { + while (!list_empty(&cmnd->pdu_list)) { + rsp = list_entry(cmnd->pdu_list.next, struct iscsi_cmnd, pdu_list); + list_del_init(&rsp->list); + list_del(&rsp->pdu_list); + iscsi_cmnd_remove(rsp); + } + list_del_init(&cmnd->list); + } else + if (cmnd_queued(cmnd)) + iscsi_scsi_dequeuecmnd(cmnd); + + if (cmnd_hashed(cmnd)) + cmnd_remove_hash(cmnd); + + if (cmnd_lunit(cmnd)) { + assert(cmnd->lun); + volume_put(cmnd->lun); + } + + list_del_init(&cmnd->pdu_list); + iscsi_cmnd_remove(cmnd); + + if (is_last) { + assert(!force); + assert(req); + cmnd_release(req, 0); + } + + return; +} + +void cmnd_tx_start(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + struct iovec *iop; + + dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd)); + assert(cmnd); + iscsi_cmnd_set_length(&cmnd->pdu); + + set_cork(conn->sock, 1); + + conn->write_iop = iop = conn->write_iov; + iop->iov_base = &cmnd->pdu.bhs; + iop->iov_len = sizeof(cmnd->pdu.bhs); + iop++; + conn->write_size = sizeof(cmnd->pdu.bhs); + + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_NOOP_IN: + cmnd_set_sn(cmnd, 1); + cmnd_send_pdu(conn, cmnd); + break; + case ISCSI_OP_SCSI_RSP: + cmnd_set_sn(cmnd, 1); + cmnd_send_pdu(conn, cmnd); + break; + case ISCSI_OP_SCSI_TASK_MGT_RSP: + cmnd_set_sn(cmnd, 1); + break; + case ISCSI_OP_TEXT_RSP: + cmnd_set_sn(cmnd, 1); + break; + case ISCSI_OP_SCSI_DATA_IN: + { + struct iscsi_data_in_hdr *rsp = (struct iscsi_data_in_hdr *)&cmnd->pdu.bhs; + u32 offset; + + cmnd_set_sn(cmnd, (rsp->flags & ISCSI_FLG_FINAL) ? 1 : 0); + offset = rsp->buffer_offset; + rsp->buffer_offset = cpu_to_be32(offset); + __cmnd_send_pdu(conn, cmnd->tio, offset, cmnd->pdu.datasize); + break; + } + case ISCSI_OP_LOGOUT_RSP: + cmnd_set_sn(cmnd, 1); + break; + case ISCSI_OP_R2T: + cmnd_set_sn(cmnd, 0); + cmnd->pdu.bhs.sn = cpu_to_be32(conn->stat_sn); + break; + case ISCSI_OP_ASYNC_MSG: + cmnd_set_sn(cmnd, 1); + break; + case ISCSI_OP_REJECT: + cmnd_set_sn(cmnd, 1); + cmnd_send_pdu(conn, cmnd); + break; + default: + eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd)); + break; + } + + iop->iov_len = 0; + // move this? + conn->write_size = (conn->write_size + 3) & -4; + iscsi_dump_pdu(&cmnd->pdu); +} + +void cmnd_tx_end(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + + dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd)); + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_NOOP_IN: + case ISCSI_OP_SCSI_RSP: + case ISCSI_OP_SCSI_TASK_MGT_RSP: + case ISCSI_OP_TEXT_RSP: + case ISCSI_OP_R2T: + case ISCSI_OP_ASYNC_MSG: + case ISCSI_OP_REJECT: + case ISCSI_OP_SCSI_DATA_IN: + case ISCSI_OP_LOGOUT_RSP: + break; + default: + eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd)); + assert(0); + break; + } + + if (cmnd_close(cmnd)) + conn_close(conn); + + list_del_init(&cmnd->list); + set_cork(cmnd->conn->sock, 0); +} + +/** + * Push the command for execution. + * This functions reorders the commands. + * Called from the read thread. + * + * iscsi_session_push_cmnd - + * @cmnd: ptr to command + */ + +static void iscsi_session_push_cmnd(struct iscsi_cmnd *cmnd) +{ + struct iscsi_session *session = cmnd->conn->session; + struct list_head *entry; + u32 cmd_sn; + + dprintk(D_GENERIC, "%p:%x %u,%u\n", + cmnd, cmnd_opcode(cmnd), cmnd->pdu.bhs.sn, session->exp_cmd_sn); + + if (cmnd->pdu.bhs.opcode & ISCSI_OP_IMMEDIATE) { + iscsi_cmnd_exec(cmnd); + return; + } + + cmd_sn = cmnd->pdu.bhs.sn; + if (cmd_sn == session->exp_cmd_sn) { + while (1) { + session->exp_cmd_sn = ++cmd_sn; + iscsi_cmnd_exec(cmnd); + + if (list_empty(&session->pending_list)) + break; + cmnd = list_entry(session->pending_list.next, struct iscsi_cmnd, list); + if (cmnd->pdu.bhs.sn != cmd_sn) + break; +/* eprintk("find out-of-order %x %u %u\n", */ +/* cmnd_itt(cmnd), cmd_sn, cmnd->pdu.bhs.sn); */ + list_del_init(&cmnd->list); + clear_cmnd_pending(cmnd); + } + } else { +/* eprintk("out-of-order %x %u %u\n", */ +/* cmnd_itt(cmnd), cmd_sn, session->exp_cmd_sn); */ + + set_cmnd_pending(cmnd); + if (before(cmd_sn, session->exp_cmd_sn)) /* close the conn */ + eprintk("unexpected cmd_sn (%u,%u)\n", cmd_sn, session->exp_cmd_sn); + + if (after(cmd_sn, session->exp_cmd_sn + session->max_queued_cmnds)) + eprintk("too large cmd_sn (%u,%u)\n", cmd_sn, session->exp_cmd_sn); + + list_for_each(entry, &session->pending_list) { + struct iscsi_cmnd *tmp = list_entry(entry, struct iscsi_cmnd, list); + if (before(cmd_sn, tmp->pdu.bhs.sn)) + break; + } + + assert(list_empty(&cmnd->list)); + + list_add_tail(&cmnd->list, entry); + } +} + +static int check_segment_length(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + struct iscsi_sess_param *param = &conn->session->param; + + if (cmnd->pdu.datasize > param->max_recv_data_length) { + eprintk("data too long %x %u %u\n", cmnd_itt(cmnd), + cmnd->pdu.datasize, param->max_recv_data_length); + + if (get_pgcnt(cmnd->pdu.datasize, 0) > ISCSI_CONN_IOV_MAX) { + conn_close(conn); + return -EINVAL; + } + } + + return 0; +} + +void cmnd_rx_start(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + int err = 0; + + iscsi_dump_pdu(&cmnd->pdu); + + set_cmnd_rxstart(cmnd); + if (check_segment_length(cmnd) < 0) + return; + + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_NOOP_OUT: + err = noop_out_start(conn, cmnd); + break; + case ISCSI_OP_SCSI_CMD: + if (!(err = cmnd_insert_hash(cmnd))) + scsi_cmnd_start(conn, cmnd); + break; + case ISCSI_OP_SCSI_TASK_MGT_MSG: + err = cmnd_insert_hash(cmnd); + break; + case ISCSI_OP_SCSI_DATA_OUT: + data_out_start(conn, cmnd); + break; + case ISCSI_OP_LOGOUT_CMD: + err = cmnd_insert_hash(cmnd); + break; + case ISCSI_OP_TEXT_CMD: + case ISCSI_OP_SNACK_CMD: + err = -ISCSI_REASON_UNSUPPORTED_COMMAND; + break; + default: + err = -ISCSI_REASON_UNSUPPORTED_COMMAND; + break; + } + + if (err < 0) { + eprintk("%x %x %d\n", cmnd_opcode(cmnd), cmnd_itt(cmnd), err); + iscsi_cmnd_reject(cmnd, -err); + } +} + +void cmnd_rx_end(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + + if (cmnd_tmfabort(cmnd)) { + cmnd_release(cmnd, 1); + return; + } + + dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd)); + switch (cmnd_opcode(cmnd)) { + case ISCSI_OP_SCSI_REJECT: + case ISCSI_OP_NOOP_OUT: + case ISCSI_OP_SCSI_CMD: + case ISCSI_OP_SCSI_TASK_MGT_MSG: + case ISCSI_OP_TEXT_CMD: + case ISCSI_OP_LOGOUT_CMD: + iscsi_session_push_cmnd(cmnd); + break; + case ISCSI_OP_SCSI_DATA_OUT: + data_out_end(conn, cmnd); + break; + case ISCSI_OP_SNACK_CMD: + break; + case ISCSI_OP_PDU_REJECT: + iscsi_cmnd_init_write(get_rsp_cmnd(cmnd)); + break; + case ISCSI_OP_DATA_REJECT: + cmnd_release(cmnd, 0); + break; + default: + eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd)); + BUG(); + break; + } +} + +static void iscsi_exit(void) +{ + wthread_module_exit(); + + unregister_chrdev(ctr_major, ctr_name); + + iet_procfs_exit(); + + event_exit(); + + tio_exit(); + + iotype_exit(); + + if (iscsi_cmnd_cache) + kmem_cache_destroy(iscsi_cmnd_cache); +} + +static int iscsi_init(void) +{ + int err = -ENOMEM; + + printk("iSCSI Enterprise Target Software - version %s\n", IET_VERSION_STRING); + + if ((ctr_major = register_chrdev(0, ctr_name, &ctr_fops)) < 0) { + eprintk("failed to register the control device %d\n", ctr_major); + return ctr_major; + } + + if ((err = iet_procfs_init()) < 0) + goto err; + + if ((err = event_init()) < 0) + goto err; + + iscsi_cmnd_cache = KMEM_CACHE(iscsi_cmnd, 0); + if (!iscsi_cmnd_cache) + goto err; + + if ((err = tio_init()) < 0) + goto err; + + if ((err = iotype_init()) < 0) + goto err; + + if ((err = wthread_module_init()) < 0) + goto err; + + return 0; + +err: + iscsi_exit(); + return err; +} + +module_param(worker_thread_pool_size, ulong, S_IRUGO); +MODULE_PARM_DESC(worker_thread_pool_size, + "Size of the worker thread pool " + "(0 = dedicated threads per target (default))"); + +module_param(debug_enable_flags, ulong, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug_enable_flags, + "debug bitmask, low bits (0 ... 8) used, see iscsi_dbg.h"); + +module_init(iscsi_init); +module_exit(iscsi_exit); + +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/config.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/config.c @@ -0,0 +1,314 @@ +/* + * (C) 2004 - 2005 FUJITA Tomonori + * + * This code is licenced under the GPL. + */ + +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" + +struct proc_entries { + const char *name; + struct file_operations *fops; +}; + +static struct proc_entries iet_proc_entries[] = +{ + {"volume", &volume_seq_fops}, + {"session", &session_seq_fops}, +}; + +static struct proc_dir_entry *proc_iet_dir; + +void iet_procfs_exit(void) +{ + int i; + + if (!proc_iet_dir) + return; + + for (i = 0; i < ARRAY_SIZE(iet_proc_entries); i++) + remove_proc_entry(iet_proc_entries[i].name, proc_iet_dir); + + remove_proc_entry(proc_iet_dir->name, proc_iet_dir->parent); +} + +int iet_procfs_init(void) +{ + int i; + struct proc_dir_entry *ent; + + if (!(proc_iet_dir = proc_mkdir("iet", init_net.proc_net))) + goto err; + + for (i = 0; i < ARRAY_SIZE(iet_proc_entries); i++) { + ent = create_proc_entry(iet_proc_entries[i].name, 0, proc_iet_dir); + if (ent) + ent->proc_fops = iet_proc_entries[i].fops; + else + goto err; + } + + return 0; + +err: + if (proc_iet_dir) + iet_procfs_exit(); + + return -ENOMEM; +} + +static int get_conn_info(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct iscsi_session *session; + struct conn_info info; + struct iscsi_conn *conn; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + session = session_lookup(target, info.sid); + if (!session) + return -ENOENT; + conn = conn_lookup(session, info.cid); + + info.cid = conn->cid; + info.stat_sn = conn->stat_sn; + info.exp_stat_sn = conn->exp_stat_sn; + + if (copy_to_user((void *) ptr, &info, sizeof(info))) + return -EFAULT; + + return 0; +} + +static int add_conn(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct iscsi_session *session; + struct conn_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + if (!(session = session_lookup(target, info.sid))) + return -ENOENT; + + return conn_add(session, &info); +} + +static int del_conn(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct iscsi_session *session; + struct conn_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + if (!(session = session_lookup(target, info.sid))) + return -ENOENT; + + return conn_del(session, &info); +} + +static int get_session_info(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct iscsi_session *session; + struct session_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + session = session_lookup(target, info.sid); + + if (!session) + return -ENOENT; + + info.exp_cmd_sn = session->exp_cmd_sn; + info.max_cmd_sn = session->max_cmd_sn; + + if (copy_to_user((void *) ptr, &info, sizeof(info))) + return -EFAULT; + + return 0; +} + +static int add_session(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct session_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + return session_add(target, &info); +} + +static int del_session(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct session_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + return session_del(target, info.sid); +} + +static int add_volume(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct volume_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + return volume_add(target, &info); +} + +static int del_volume(struct iscsi_target *target, unsigned long ptr) +{ + int err; + struct volume_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + return iscsi_volume_del(target, &info); +} + +static int iscsi_param_config(struct iscsi_target *target, unsigned long ptr, int set) +{ + int err; + struct iscsi_param_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + goto out; + + if ((err = iscsi_param_set(target, &info, set)) < 0) + goto out; + + if (!set) + err = copy_to_user((void *) ptr, &info, sizeof(info)); + +out: + return err; +} + +static int add_target(unsigned long ptr) +{ + int err; + struct target_info info; + + if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0) + return err; + + if (!(err = target_add(&info))) + err = copy_to_user((void *) ptr, &info, sizeof(info)); + + return err; +} + +static long ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + struct iscsi_target *target = NULL; + long err; + u32 id; + + if ((err = get_user(id, (u32 *) arg)) != 0) + goto done; + + if (cmd == DEL_TARGET) { + err = target_del(id); + goto done; + } + + target = target_lookup_by_id(id); + + if (cmd == ADD_TARGET) + if (target) { + err = -EEXIST; + eprintk("Target %u already exist!\n", id); + goto done; + } + + switch (cmd) { + case ADD_TARGET: + assert(!target); + err = add_target(arg); + goto done; + } + + if (!target) { + eprintk("can't find the target %u\n", id); + err = -EINVAL; + goto done; + } + + if ((err = target_lock(target, 1)) < 0) { + eprintk("interrupted %ld %d\n", err, cmd); + goto done; + } + + switch (cmd) { + case ADD_VOLUME: + err = add_volume(target, arg); + break; + + case DEL_VOLUME: + err = del_volume(target, arg); + break; + + case ADD_SESSION: + err = add_session(target, arg); + break; + + case DEL_SESSION: + err = del_session(target, arg); + break; + + case GET_SESSION_INFO: + err = get_session_info(target, arg); + break; + + case ISCSI_PARAM_SET: + err = iscsi_param_config(target, arg, 1); + break; + + case ISCSI_PARAM_GET: + err = iscsi_param_config(target, arg, 0); + break; + + case ADD_CONN: + err = add_conn(target, arg); + break; + + case DEL_CONN: + err = del_conn(target, arg); + break; + + case GET_CONN_INFO: + err = get_conn_info(target, arg); + break; + default: + eprintk("invalid ioctl cmd %x\n", cmd); + err = -EINVAL; + } + + if (target) + target_unlock(target); + +done: + return err; +} + +struct file_operations ctr_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = ioctl, + .compat_ioctl = ioctl, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/digest.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/digest.h @@ -0,0 +1,20 @@ +/* + * iSCSI digest handling. + * (C) 2004 Xiranet Communications GmbH + * This code is licensed under the GPL. + */ + +#ifndef __IET_DIGEST_H__ +#define __IET_DIGEST_H__ + +extern void digest_alg_available(unsigned int *val); +extern int digest_init(struct iscsi_conn *conn); +extern void digest_cleanup(struct iscsi_conn *conn); + +extern int digest_rx_header(struct iscsi_cmnd *cmnd); +extern int digest_rx_data(struct iscsi_cmnd *cmnd); + +extern void digest_tx_header(struct iscsi_cmnd *cmnd); +extern void digest_tx_data(struct iscsi_cmnd *cmnd); + +#endif /* __IET_DIGEST_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iscsi.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iscsi.h @@ -0,0 +1,462 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#ifndef __ISCSI_H__ +#define __ISCSI_H__ + +#include +#include +#include +#include +#include +#include + +#include "iscsi_hdr.h" +#include "iet_u.h" + +struct iscsi_sess_param { + int initial_r2t; + int immediate_data; + int max_connections; + int max_recv_data_length; + int max_xmit_data_length; + int max_burst_length; + int first_burst_length; + int default_wait_time; + int default_retain_time; + int max_outstanding_r2t; + int data_pdu_inorder; + int data_sequence_inorder; + int error_recovery_level; + int header_digest; + int data_digest; + int ofmarker; + int ifmarker; + int ofmarkint; + int ifmarkint; +}; + +struct iscsi_trgt_param { + int wthreads; + int target_type; + int queued_cmnds; +}; + +struct tio { + u32 pg_cnt; + + pgoff_t idx; + u32 offset; + u32 size; + + struct page **pvec; + + atomic_t count; +}; + +struct network_thread_info { + struct task_struct *task; + unsigned long flags; + struct list_head active_conns; + + spinlock_t nthread_lock; + + void (*old_state_change)(struct sock *); + void (*old_data_ready)(struct sock *, int); + void (*old_write_space)(struct sock *); +}; + +struct worker_thread_info; + +struct worker_thread { + struct task_struct *w_task; + struct list_head w_list; + struct worker_thread_info *w_info; +}; + +struct worker_thread_info { + spinlock_t wthread_lock; + + u32 nr_running_wthreads; + + struct list_head wthread_list; + struct list_head work_queue; + + wait_queue_head_t wthread_sleep; +}; + +struct iscsi_cmnd; + +struct target_type { + int id; + int (*execute_cmnd) (struct iscsi_cmnd *); +}; + +enum iscsi_device_state { + IDEV_RUNNING, + IDEV_DEL, +}; + +struct iscsi_target { + struct list_head t_list; + u32 tid; + + char name[ISCSI_NAME_LEN]; + + struct iscsi_sess_param sess_param; + struct iscsi_trgt_param trgt_param; + + atomic_t nr_volumes; + struct list_head volumes; + struct list_head session_list; + + struct network_thread_info nthread_info; + /* Points either to own list or global pool */ + struct worker_thread_info * wthread_info; + + struct semaphore target_sem; +}; + +struct iscsi_queue { + spinlock_t queue_lock; + struct iscsi_cmnd *ordered_cmnd; + struct list_head wait_list; + int active_cnt; +}; + +struct iet_volume { + u32 lun; + + enum iscsi_device_state l_state; + atomic_t l_count; + + struct iscsi_target *target; + struct list_head list; + + struct iscsi_queue queue; + + u8 scsi_id[SCSI_ID_LEN]; + u8 scsi_sn[SCSI_SN_LEN]; + + u32 blk_shift; + u64 blk_cnt; + + u64 reserve_sid; + spinlock_t reserve_lock; + + unsigned long flags; + + struct iotype *iotype; + void *private; +}; + +enum lu_flags { + LU_READONLY, + LU_WCACHE, + LU_RCACHE, +}; + +#define LUReadonly(lu) test_bit(LU_READONLY, &(lu)->flags) +#define SetLUReadonly(lu) set_bit(LU_READONLY, &(lu)->flags) + +#define LUWCache(lu) test_bit(LU_WCACHE, &(lu)->flags) +#define SetLUWCache(lu) set_bit(LU_WCACHE, &(lu)->flags) +#define ClearLUWCache(lu) clear_bit(LU_WCACHE, &(lu)->flags) + +#define LURCache(lu) test_bit(LU_RCACHE, &(lu)->flags) +#define SetLURCache(lu) set_bit(LU_RCACHE, &(lu)->flags) +#define ClearLURCache(lu) clear_bit(LU_RCACHE, &(lu)->flags) + +#define IET_HASH_ORDER 8 +#define cmnd_hashfn(itt) hash_long((itt), IET_HASH_ORDER) + +struct iscsi_session { + struct list_head list; + struct iscsi_target *target; + + char *initiator; + u64 sid; + + u32 exp_cmd_sn; + u32 max_cmd_sn; + + struct iscsi_sess_param param; + u32 max_queued_cmnds; + + struct list_head conn_list; + + struct list_head pending_list; + + spinlock_t cmnd_hash_lock; + struct list_head cmnd_hash[1 << IET_HASH_ORDER]; + + u32 next_ttt; +}; + +enum connection_state_bit { + CONN_ACTIVE, + CONN_CLOSING, + CONN_WSPACE_WAIT, +}; + +#define ISCSI_CONN_IOV_MAX (((256 << 10) >> PAGE_SHIFT) + 1) + +struct iscsi_conn { + struct list_head list; /* list entry in session list */ + struct iscsi_session *session; /* owning session */ + + u16 cid; + unsigned long state; + + u32 stat_sn; + u32 exp_stat_sn; + + int hdigest_type; + int ddigest_type; + + struct list_head poll_list; + + struct file *file; + struct socket *sock; + spinlock_t list_lock; + atomic_t nr_cmnds; + atomic_t nr_busy_cmnds; + struct list_head pdu_list; /* in/outcoming pdus */ + struct list_head write_list; /* list of data pdus to be sent */ + + struct iscsi_cmnd *read_cmnd; + struct msghdr read_msg; + struct iovec read_iov[ISCSI_CONN_IOV_MAX]; + u32 read_size; + u32 read_overflow; + int read_state; + + struct iscsi_cmnd *write_cmnd; + struct iovec write_iov[ISCSI_CONN_IOV_MAX]; + struct iovec *write_iop; + struct tio *write_tcmnd; + u32 write_size; + u32 write_offset; + int write_state; + + struct hash_desc rx_hash; + struct hash_desc tx_hash; + struct scatterlist hash_sg[ISCSI_CONN_IOV_MAX]; +}; + +struct iscsi_pdu { + struct iscsi_hdr bhs; + void *ahs; + unsigned int ahssize; + unsigned int datasize; +}; + +typedef void (iet_show_info_t)(struct seq_file *seq, struct iscsi_target *target); + +struct iscsi_cmnd { + struct list_head list; + struct list_head conn_list; + unsigned long flags; + struct iscsi_conn *conn; + struct iet_volume *lun; + + struct iscsi_pdu pdu; + struct list_head pdu_list; + + struct list_head hash_list; + + struct tio *tio; + + u32 r2t_sn; + u32 r2t_length; + u32 is_unsolicited_data; + u32 target_task_tag; + u32 outstanding_r2t; + + u32 hdigest; + u32 ddigest; + + struct iscsi_cmnd *req; +}; + +#define ISCSI_OP_SCSI_REJECT ISCSI_OP_VENDOR1_CMD +#define ISCSI_OP_PDU_REJECT ISCSI_OP_VENDOR2_CMD +#define ISCSI_OP_DATA_REJECT ISCSI_OP_VENDOR3_CMD +#define ISCSI_OP_SCSI_ABORT ISCSI_OP_VENDOR4_CMD + +/* iscsi.c */ +extern unsigned long worker_thread_pool_size; +extern struct iscsi_cmnd *cmnd_alloc(struct iscsi_conn *, int); +extern void cmnd_rx_start(struct iscsi_cmnd *); +extern void cmnd_rx_end(struct iscsi_cmnd *); +extern void cmnd_tx_start(struct iscsi_cmnd *); +extern void cmnd_tx_end(struct iscsi_cmnd *); +extern void cmnd_release(struct iscsi_cmnd *, int); +extern void send_data_rsp(struct iscsi_cmnd *, int (*)(struct iscsi_cmnd *)); +extern void send_scsi_rsp(struct iscsi_cmnd *, int (*)(struct iscsi_cmnd *)); + +/* conn.c */ +extern struct iscsi_conn *conn_lookup(struct iscsi_session *, u16); +extern int conn_add(struct iscsi_session *, struct conn_info *); +extern int conn_del(struct iscsi_session *, struct conn_info *); +extern int conn_free(struct iscsi_conn *); +extern void conn_close(struct iscsi_conn *); +extern void conn_info_show(struct seq_file *, struct iscsi_session *); + +/* nthread.c */ +extern int nthread_init(struct iscsi_target *); +extern int nthread_start(struct iscsi_target *); +extern int nthread_stop(struct iscsi_target *); +extern void __nthread_wakeup(struct network_thread_info *); +extern void nthread_wakeup(struct iscsi_target *); + +/* wthread.c */ +extern int wthread_init(struct worker_thread_info *info); +extern int wthread_start(struct worker_thread_info *info, int wthreads, u32 tid); +extern int wthread_stop(struct worker_thread_info *info); +extern void wthread_queue(struct iscsi_cmnd *); +extern struct target_type *target_type_array[]; +extern int wthread_module_init(void); +extern void wthread_module_exit(void); +extern struct worker_thread_info *worker_thread_pool; + +/* target.c */ +extern int target_lock(struct iscsi_target *, int); +extern void target_unlock(struct iscsi_target *); +struct iscsi_target *target_lookup_by_id(u32); +extern int target_add(struct target_info *); +extern int target_del(u32 id); +extern struct seq_operations iet_seq_op; + +/* config.c */ +extern int iet_procfs_init(void); +extern void iet_procfs_exit(void); +extern int iet_info_show(struct seq_file *, iet_show_info_t *); + +/* session.c */ +extern struct file_operations session_seq_fops; +extern struct iscsi_session *session_lookup(struct iscsi_target *, u64); +extern int session_add(struct iscsi_target *, struct session_info *); +extern int session_del(struct iscsi_target *, u64); + +/* volume.c */ +extern struct file_operations volume_seq_fops; +extern int volume_add(struct iscsi_target *, struct volume_info *); +extern int iscsi_volume_del(struct iscsi_target *, struct volume_info *); +extern void iscsi_volume_destroy(struct iet_volume *); +extern struct iet_volume *volume_lookup(struct iscsi_target *, u32); +extern struct iet_volume *volume_get(struct iscsi_target *, u32); +extern void volume_put(struct iet_volume *); +extern int volume_reserve(struct iet_volume *volume, u64 sid); +extern int volume_release(struct iet_volume *volume, u64 sid, int force); +extern int is_volume_reserved(struct iet_volume *volume, u64 sid); + +/* tio.c */ +extern int tio_init(void); +extern void tio_exit(void); +extern struct tio *tio_alloc(int); +extern void tio_get(struct tio *); +extern void tio_put(struct tio *); +extern void tio_set(struct tio *, u32, loff_t); +extern int tio_read(struct iet_volume *, struct tio *); +extern int tio_write(struct iet_volume *, struct tio *); +extern int tio_sync(struct iet_volume *, struct tio *); + +/* iotype.c */ +extern struct iotype *get_iotype(const char *name); +extern void put_iotype(struct iotype *iot); + +/* params.c */ +extern int iscsi_param_set(struct iscsi_target *, struct iscsi_param_info *, int); + +/* target_disk.c */ +extern struct target_type disk_ops; + +/* event.c */ +extern int event_send(u32, u64, u32, u32, int); +extern int event_init(void); +extern void event_exit(void); + +#define get_pgcnt(size, offset) ((((size) + ((offset) & ~PAGE_CACHE_MASK)) + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT) + +static inline void iscsi_cmnd_get_length(struct iscsi_pdu *pdu) +{ +#if defined(__BIG_ENDIAN) + pdu->ahssize = pdu->bhs.length.ahslength * 4; + pdu->datasize = pdu->bhs.length.datalength; +#elif defined(__LITTLE_ENDIAN) + pdu->ahssize = (pdu->bhs.length & 0xff) * 4; + pdu->datasize = be32_to_cpu(pdu->bhs.length & ~0xff); +#else +#error +#endif +} + +static inline void iscsi_cmnd_set_length(struct iscsi_pdu *pdu) +{ +#if defined(__BIG_ENDIAN) + pdu->bhs.length.ahslength = pdu->ahssize / 4; + pdu->bhs.length.datalength = pdu->datasize; +#elif defined(__LITTLE_ENDIAN) + pdu->bhs.length = cpu_to_be32(pdu->datasize) | (pdu->ahssize / 4); +#else +#error +#endif +} + +#define cmnd_hdr(cmnd) ((struct iscsi_scsi_cmd_hdr *) (&((cmnd)->pdu.bhs))) +#define cmnd_ttt(cmnd) cpu_to_be32((cmnd)->pdu.bhs.ttt) +#define cmnd_itt(cmnd) cpu_to_be32((cmnd)->pdu.bhs.itt) +#define cmnd_opcode(cmnd) ((cmnd)->pdu.bhs.opcode & ISCSI_OPCODE_MASK) +#define cmnd_scsicode(cmnd) cmnd_hdr(cmnd)->scb[0] + +#define SECTOR_SIZE_BITS 9 + +enum cmnd_flags { + CMND_hashed, + CMND_queued, + CMND_final, + CMND_waitio, + CMND_close, + CMND_lunit, + CMND_pending, + CMND_tmfabort, + CMND_rxstart, +}; + +#define set_cmnd_hashed(cmnd) set_bit(CMND_hashed, &(cmnd)->flags) +#define cmnd_hashed(cmnd) test_bit(CMND_hashed, &(cmnd)->flags) + +#define set_cmnd_queued(cmnd) set_bit(CMND_queued, &(cmnd)->flags) +#define cmnd_queued(cmnd) test_bit(CMND_queued, &(cmnd)->flags) + +#define set_cmnd_final(cmnd) set_bit(CMND_final, &(cmnd)->flags) +#define cmnd_final(cmnd) test_bit(CMND_final, &(cmnd)->flags) + +#define set_cmnd_waitio(cmnd) set_bit(CMND_waitio, &(cmnd)->flags) +#define cmnd_waitio(cmnd) test_bit(CMND_waitio, &(cmnd)->flags) + +#define set_cmnd_close(cmnd) set_bit(CMND_close, &(cmnd)->flags) +#define cmnd_close(cmnd) test_bit(CMND_close, &(cmnd)->flags) + +#define set_cmnd_lunit(cmnd) set_bit(CMND_lunit, &(cmnd)->flags) +#define cmnd_lunit(cmnd) test_bit(CMND_lunit, &(cmnd)->flags) + +#define set_cmnd_pending(cmnd) set_bit(CMND_pending, &(cmnd)->flags) +#define clear_cmnd_pending(cmnd) clear_bit(CMND_pending, &(cmnd)->flags) +#define cmnd_pending(cmnd) test_bit(CMND_pending, &(cmnd)->flags) + +#define set_cmnd_tmfabort(cmnd) set_bit(CMND_tmfabort, &(cmnd)->flags) +#define cmnd_tmfabort(cmnd) test_bit(CMND_tmfabort, &(cmnd)->flags) + +#define set_cmnd_rxstart(cmnd) set_bit(CMND_rxstart, &(cmnd)->flags) +#define cmnd_rxstart(cmnd) test_bit(CMND_rxstart, &(cmnd)->flags) + +#define VENDOR_ID "IET" +#define PRODUCT_ID "VIRTUAL-DISK" +#define PRODUCT_REV "0" + +#endif /* __ISCSI_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/target.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/target.c @@ -0,0 +1,330 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#include "iscsi.h" +#include "digest.h" +#include "iscsi_dbg.h" + +#define MAX_NR_TARGETS (1UL << 30) + +static LIST_HEAD(target_list); +static DECLARE_MUTEX(target_list_sem); +static u32 next_target_id; +static u32 nr_targets; + +static struct iscsi_sess_param default_session_param = { + .initial_r2t = 1, + .immediate_data = 1, + .max_connections = 1, + .max_recv_data_length = 8192, + .max_xmit_data_length = 8192, + .max_burst_length = 262144, + .first_burst_length = 65536, + .default_wait_time = 2, + .default_retain_time = 20, + .max_outstanding_r2t = 1, + .data_pdu_inorder = 1, + .data_sequence_inorder = 1, + .error_recovery_level = 0, + .header_digest = DIGEST_NONE, + .data_digest = DIGEST_NONE, + .ofmarker = 0, + .ifmarker = 0, + .ofmarkint = 2048, + .ifmarkint = 2048, +}; + +static struct iscsi_trgt_param default_target_param = { + .wthreads = DEFAULT_NR_WTHREADS, + .target_type = 0, + .queued_cmnds = DEFAULT_NR_QUEUED_CMNDS, +}; + +inline int target_lock(struct iscsi_target *target, int interruptible) +{ + int err = 0; + + if (interruptible) + err = down_interruptible(&target->target_sem); + else + down(&target->target_sem); + + return err; +} + +inline void target_unlock(struct iscsi_target *target) +{ + up(&target->target_sem); +} + +static struct iscsi_target *__target_lookup_by_id(u32 id) +{ + struct iscsi_target *target; + + list_for_each_entry(target, &target_list, t_list) { + if (target->tid == id) + return target; + } + return NULL; +} + +static struct iscsi_target *__target_lookup_by_name(char *name) +{ + struct iscsi_target *target; + + list_for_each_entry(target, &target_list, t_list) { + if (!strcmp(target->name, name)) + return target; + } + return NULL; +} + +struct iscsi_target *target_lookup_by_id(u32 id) +{ + struct iscsi_target *target; + + down(&target_list_sem); + target = __target_lookup_by_id(id); + up(&target_list_sem); + + return target; +} + +static int target_thread_start(struct iscsi_target *target) +{ + int err; + + if ((err = nthread_start(target)) < 0) + return err; + + if (!worker_thread_pool) { + err = wthread_start(target->wthread_info, + target->trgt_param.wthreads, target->tid); + if (err) + nthread_stop(target); + } + + return err; +} + +static void target_thread_stop(struct iscsi_target *target) +{ + if (!worker_thread_pool) + wthread_stop(target->wthread_info); + + nthread_stop(target); +} + +static int iscsi_target_create(struct target_info *info, u32 tid) +{ + int err = -EINVAL, len; + char *name = info->name; + struct iscsi_target *target; + + dprintk(D_SETUP, "%u %s\n", tid, name); + + if (!(len = strlen(name))) { + eprintk("The length of the target name is zero %u\n", tid); + return err; + } + + if (!try_module_get(THIS_MODULE)) { + eprintk("Fail to get module %u\n", tid); + return err; + } + + target = kzalloc(sizeof(*target), GFP_KERNEL); + if (!target) { + err = -ENOMEM; + goto out; + } + + if (!worker_thread_pool) { + target->wthread_info = kmalloc(sizeof(struct worker_thread_info), GFP_KERNEL); + if (!target->wthread_info) { + err = -ENOMEM; + goto out; + } + } + + target->tid = info->tid = tid; + + memcpy(&target->sess_param, &default_session_param, sizeof(default_session_param)); + memcpy(&target->trgt_param, &default_target_param, sizeof(default_target_param)); + + strncpy(target->name, name, sizeof(target->name) - 1); + + init_MUTEX(&target->target_sem); + + INIT_LIST_HEAD(&target->session_list); + INIT_LIST_HEAD(&target->volumes); + + atomic_set(&target->nr_volumes, 0); + + nthread_init(target); + + if (!worker_thread_pool) + wthread_init(target->wthread_info); + else + target->wthread_info = worker_thread_pool; + + + if ((err = target_thread_start(target)) < 0) { + target_thread_stop(target); + goto out; + } + + list_add(&target->t_list, &target_list); + + return 0; +out: + if (!worker_thread_pool) + kfree(target->wthread_info); + kfree(target); + module_put(THIS_MODULE); + + return err; +} + +int target_add(struct target_info *info) +{ + int err = -EEXIST; + u32 tid = info->tid; + + down(&target_list_sem); + + if (nr_targets > MAX_NR_TARGETS) { + err = -EBUSY; + goto out; + } + + if (__target_lookup_by_name(info->name)) + goto out; + + if (tid && __target_lookup_by_id(tid)) + goto out; + + if (!tid) { + do { + if (!++next_target_id) + ++next_target_id; + } while (__target_lookup_by_id(next_target_id)); + + tid = next_target_id; + } + + if (!(err = iscsi_target_create(info, tid))) + nr_targets++; +out: + up(&target_list_sem); + + return err; +} + +static void target_destroy(struct iscsi_target *target) +{ + dprintk(D_SETUP, "%u\n", target->tid); + + target_thread_stop(target); + + while (!list_empty(&target->volumes)) { + struct iet_volume *volume; + volume = list_entry(target->volumes.next, struct iet_volume, list); + volume->l_state = IDEV_DEL; + iscsi_volume_destroy(volume); + } + + if (!worker_thread_pool) + kfree(target->wthread_info); + kfree(target); + + module_put(THIS_MODULE); +} + +int target_del(u32 id) +{ + struct iscsi_target *target; + int err; + + if ((err = down_interruptible(&target_list_sem)) < 0) + return err; + + if (!(target = __target_lookup_by_id(id))) { + err = -ENOENT; + goto out; + } + + target_lock(target, 0); + + if (!list_empty(&target->session_list)) { + err = -EBUSY; + target_unlock(target); + goto out; + } + + list_del(&target->t_list); + nr_targets--; + + target_unlock(target); + up(&target_list_sem); + + target_destroy(target); + return 0; +out: + up(&target_list_sem); + return err; +} + +static void *iet_seq_start(struct seq_file *m, loff_t *pos) +{ + int err; + + /* are you sure this is to be interruptible? */ + err = down_interruptible(&target_list_sem); + if (err < 0) + return ERR_PTR(err); + + return seq_list_start(&target_list, *pos); +} + +static void *iet_seq_next(struct seq_file *m, void *v, loff_t *pos) +{ + return seq_list_next(v, &target_list, pos); +} + +static void iet_seq_stop(struct seq_file *m, void *v) +{ + up(&target_list_sem); +} + +static int iet_seq_show(struct seq_file *m, void *p) +{ + iet_show_info_t *func = (iet_show_info_t *)m->private; + struct iscsi_target *target = + list_entry(p, struct iscsi_target, t_list); + int err; + + /* relly, interruptible? I'd think target_lock(target, 0) + * would be more appropriate. --lge */ + err = target_lock(target, 1); + if (err < 0) + return err; + + seq_printf(m, "tid:%u name:%s\n", target->tid, target->name); + + func(m, target); + + target_unlock(target); + + return 0; +} + +struct seq_operations iet_seq_op = { + .start = iet_seq_start, + .next = iet_seq_next, + .stop = iet_seq_stop, + .show = iet_seq_show, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/Makefile @@ -0,0 +1,17 @@ +# +# Makefile for the Linux kernel device drivers. +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (not a .c file). +# +# Note 2! The CFLAGS definitions are now in the main makefile. + +EXTRA_CFLAGS += -I$(src)/include + +obj-m += iscsi_trgt.o +iscsi_trgt-objs := tio.o iscsi.o nthread.o wthread.o config.o digest.o \ + conn.o session.o target.o volume.o iotype.o \ + file-io.o null-io.o target_disk.o event.o param.o \ + block-io.o + --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/file-io.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/file-io.c @@ -0,0 +1,324 @@ +/* + * Target device file I/O. + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +struct fileio_data { + char *path; + struct file *filp; +}; + +static int fileio_make_request(struct iet_volume *lu, struct tio *tio, int rw) +{ + struct fileio_data *p = lu->private; + struct file *filp; + mm_segment_t oldfs; + struct page *page; + u32 offset, size; + loff_t ppos, count; + char *buf; + int i, err = 0; + ssize_t ret; + + assert(p); + filp = p->filp; + size = tio->size; + offset= tio->offset; + + ppos = (loff_t) tio->idx << PAGE_CACHE_SHIFT; + ppos += offset; + + for (i = 0; i < tio->pg_cnt; i++) { + page = tio->pvec[i]; + assert(page); + buf = page_address(page); + buf += offset; + + if (offset + size > PAGE_CACHE_SIZE) + count = PAGE_CACHE_SIZE - offset; + else + count = size; + + oldfs = get_fs(); + set_fs(get_ds()); + + if (rw == READ) + ret = do_sync_read(filp, buf, count, &ppos); + else + ret = do_sync_write(filp, buf, count, &ppos); + + set_fs(oldfs); + + if (ret != count) { + eprintk("I/O error %lld, %ld\n", count, (long) ret); + err = -EIO; + } + + size -= count; + offset = 0; + } + assert(!size); + + return err; +} + +static int fileio_sync(struct iet_volume *lu, struct tio *tio) +{ + struct fileio_data *p = lu->private; + struct inode *inode = p->filp->f_dentry->d_inode; + struct address_space *mapping = inode->i_mapping; + loff_t ppos, count; + int res; + + if (tio) { + ppos = (loff_t) tio->idx << PAGE_CACHE_SHIFT; + count = tio->size; + } else { + ppos = 0; + count = lu->blk_cnt << lu->blk_shift; + } + + res = sync_page_range(inode, mapping, ppos, count); + if (res) { + eprintk("I/O error: syncing pages failed: %d\n", res); + return -EIO; + } else + return 0; +} + +static int open_path(struct iet_volume *volume, const char *path) +{ + int err = 0; + struct fileio_data *info = volume->private; + struct file *filp; + mm_segment_t oldfs; + int flags; + + info->path = kstrdup(path, GFP_KERNEL); + if (!info->path) + return -ENOMEM; + + oldfs = get_fs(); + set_fs(get_ds()); + flags = (LUReadonly(volume) ? O_RDONLY : O_RDWR) | O_LARGEFILE; + filp = filp_open(path, flags, 0); + set_fs(oldfs); + + if (IS_ERR(filp)) { + err = PTR_ERR(filp); + eprintk("Can't open %s %d\n", path, err); + info->filp = NULL; + } else + info->filp = filp; + + return err; +} + +static int set_scsiid(struct iet_volume *volume, const char *id) +{ + size_t len; + + if ((len = strlen(id)) > SCSI_ID_LEN - VENDOR_ID_LEN) { + eprintk("SCSI ID too long, %zd provided, %u max\n", len, + SCSI_ID_LEN - VENDOR_ID_LEN); + return -EINVAL; + } + + memcpy(volume->scsi_id + VENDOR_ID_LEN, id, len); + + return 0; +} + +static void gen_scsiid(struct iet_volume *volume, struct inode *inode) +{ + int i; + u32 *p; + + strlcpy(volume->scsi_id, VENDOR_ID, VENDOR_ID_LEN); + + for (i = VENDOR_ID_LEN; i < SCSI_ID_LEN; i++) + if (volume->scsi_id[i]) + return; + + p = (u32 *) (volume->scsi_id + VENDOR_ID_LEN); + *(p + 0) = volume->target->trgt_param.target_type; + *(p + 1) = volume->target->tid; + *(p + 2) = (unsigned int) inode->i_ino; + *(p + 3) = (unsigned int) inode->i_sb->s_dev; +} + +static int set_scsisn(struct iet_volume *volume, const char *sn) +{ + size_t len; + + if ((len = strlen(sn)) > SCSI_SN_LEN) { + eprintk("SCSI SN too long, %zd provided, %u max\n", len, + SCSI_SN_LEN); + return -EINVAL; + } + memcpy(volume->scsi_sn, sn, len); + return 0; +} + +enum { + Opt_scsiid, Opt_scsisn, Opt_path, Opt_ignore, Opt_err, +}; + +static match_table_t tokens = { + {Opt_scsiid, "ScsiId=%s"}, + {Opt_scsisn, "ScsiSN=%s"}, + {Opt_path, "Path=%s"}, + {Opt_ignore, "Type=%s"}, + {Opt_ignore, "IOMode=%s"}, + {Opt_err, NULL}, +}; + +static int parse_fileio_params(struct iet_volume *volume, char *params) +{ + struct fileio_data *info = volume->private; + int err = 0; + char *p, *q; + + while ((p = strsep(¶ms, ",")) != NULL) { + substring_t args[MAX_OPT_ARGS]; + int token; + if (!*p) + continue; + token = match_token(p, tokens, args); + switch (token) { + case Opt_scsiid: + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = set_scsiid(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_scsisn: + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = set_scsisn(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_path: + if (info->path) { + iprintk("Target %s, LUN %u: " + "duplicate \"Path\" param\n", + volume->target->name, volume->lun); + err = -EINVAL; + goto out; + } + if (!(q = match_strdup(&args[0]))) { + err = -ENOMEM; + goto out; + } + err = open_path(volume, q); + kfree(q); + if (err < 0) + goto out; + break; + case Opt_ignore: + break; + default: + iprintk("Target %s, LUN %u: unknown param %s\n", + volume->target->name, volume->lun, p); + return -EINVAL; + } + } + + if (!info->path) { + iprintk("Target %s, LUN %u: missing \"Path\" param\n", + volume->target->name, volume->lun); + err = -EINVAL; + } +out: + return err; +} + +static void fileio_detach(struct iet_volume *lu) +{ + struct fileio_data *p = lu->private; + + kfree(p->path); + if (p->filp) + filp_close(p->filp, NULL); + kfree(p); + lu->private = NULL; +} + +static int fileio_attach(struct iet_volume *lu, char *args) +{ + int err = 0; + struct fileio_data *p; + struct inode *inode; + + if (lu->private) { + printk("already attached ? %d\n", lu->lun); + return -EBUSY; + } + + p = kzalloc(sizeof(*p), GFP_KERNEL); + if (!p) + return -ENOMEM; + + lu->private = p; + + if ((err = parse_fileio_params(lu, args)) < 0) { + eprintk("%d\n", err); + goto out; + } + inode = p->filp->f_dentry->d_inode; + + gen_scsiid(lu, inode); + + if (S_ISREG(inode->i_mode)) + ; + else if (S_ISBLK(inode->i_mode)) + inode = inode->i_bdev->bd_inode; + else { + err = -EINVAL; + goto out; + } + + lu->blk_shift = SECTOR_SIZE_BITS; + lu->blk_cnt = inode->i_size >> lu->blk_shift; + + /* we're using the page cache */ + SetLURCache(lu); +out: + if (err < 0) + fileio_detach(lu); + return err; +} + +static void fileio_show(struct iet_volume *lu, struct seq_file *seq) +{ + struct fileio_data *p = lu->private; + seq_printf(seq, " path:%s\n", p->path); +} + +struct iotype fileio = +{ + .name = "fileio", + .attach = fileio_attach, + .make_request = fileio_make_request, + .sync = fileio_sync, + .detach = fileio_detach, + .show = fileio_show, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iscsi_hdr.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iscsi_hdr.h @@ -0,0 +1,509 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#ifndef __ISCSI_HDR_H__ +#define __ISCSI_HDR_H__ + +#include +#include + +#define ISCSI_VERSION 0 + +#ifndef __packed +#define __packed __attribute__ ((packed)) +#endif + +struct iscsi_hdr { + u8 opcode; /* 0 */ + u8 flags; + u8 spec1[2]; +#if defined(__BIG_ENDIAN_BITFIELD) + struct { /* 4 */ + unsigned ahslength : 8; + unsigned datalength : 24; + } length; +#elif defined(__LITTLE_ENDIAN_BITFIELD) + u32 length; /* 4 */ +#endif + u16 lun[4]; /* 8 */ + u32 itt; /* 16 */ + u32 ttt; /* 20 */ + u32 sn; /* 24 */ + u32 exp_sn; /* 28 */ + u32 max_sn; /* 32 */ + u32 spec3[3]; /* 36 */ +} __packed; /* 48 */ + +/* Opcode encoding bits */ +#define ISCSI_OP_RETRY 0x80 +#define ISCSI_OP_IMMEDIATE 0x40 +#define ISCSI_OPCODE_MASK 0x3F + +/* Client to Server Message Opcode values */ +#define ISCSI_OP_NOOP_OUT 0x00 +#define ISCSI_OP_SCSI_CMD 0x01 +#define ISCSI_OP_SCSI_TASK_MGT_MSG 0x02 +#define ISCSI_OP_LOGIN_CMD 0x03 +#define ISCSI_OP_TEXT_CMD 0x04 +#define ISCSI_OP_SCSI_DATA_OUT 0x05 +#define ISCSI_OP_LOGOUT_CMD 0x06 +#define ISCSI_OP_SNACK_CMD 0x10 + +#define ISCSI_OP_VENDOR1_CMD 0x1c +#define ISCSI_OP_VENDOR2_CMD 0x1d +#define ISCSI_OP_VENDOR3_CMD 0x1e +#define ISCSI_OP_VENDOR4_CMD 0x1f + +/* Server to Client Message Opcode values */ +#define ISCSI_OP_NOOP_IN 0x20 +#define ISCSI_OP_SCSI_RSP 0x21 +#define ISCSI_OP_SCSI_TASK_MGT_RSP 0x22 +#define ISCSI_OP_LOGIN_RSP 0x23 +#define ISCSI_OP_TEXT_RSP 0x24 +#define ISCSI_OP_SCSI_DATA_IN 0x25 +#define ISCSI_OP_LOGOUT_RSP 0x26 +#define ISCSI_OP_R2T 0x31 +#define ISCSI_OP_ASYNC_MSG 0x32 +#define ISCSI_OP_REJECT 0x3f + +struct iscsi_ahs_hdr { + u16 ahslength; + u8 ahstype; +} __packed; + +#define ISCSI_AHSTYPE_CDB 1 +#define ISCSI_AHSTYPE_RLENGTH 2 + +union iscsi_sid { + struct { + u8 isid[6]; /* Initiator Session ID */ + u16 tsih; /* Target Session ID */ + } id; + u64 id64; +} __packed; + +struct iscsi_scsi_cmd_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 data_length; + u32 cmd_sn; + u32 exp_stat_sn; + u8 scb[16]; +} __packed; + +#define ISCSI_CMD_FINAL 0x80 +#define ISCSI_CMD_READ 0x40 +#define ISCSI_CMD_WRITE 0x20 +#define ISCSI_CMD_ATTR_MASK 0x07 +#define ISCSI_CMD_UNTAGGED 0x00 +#define ISCSI_CMD_SIMPLE 0x01 +#define ISCSI_CMD_ORDERED 0x02 +#define ISCSI_CMD_HEAD_OF_QUEUE 0x03 +#define ISCSI_CMD_ACA 0x04 + +struct iscsi_cdb_ahdr { + u16 ahslength; + u8 ahstype; + u8 reserved; + u8 cdb[0]; +} __packed; + +struct iscsi_rlength_ahdr { + u16 ahslength; + u8 ahstype; + u8 reserved; + u32 read_length; +} __packed; + +struct iscsi_scsi_rsp_hdr { + u8 opcode; + u8 flags; + u8 response; + u8 cmd_status; + u8 ahslength; + u8 datalength[3]; + u32 rsvd1[2]; + u32 itt; + u32 snack; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 exp_data_sn; + u32 bi_residual_count; + u32 residual_count; +} __packed; + +#define ISCSI_FLG_RESIDUAL_UNDERFLOW 0x02 +#define ISCSI_FLG_RESIDUAL_OVERFLOW 0x04 +#define ISCSI_FLG_BIRESIDUAL_UNDERFLOW 0x08 +#define ISCSI_FLG_BIRESIDUAL_OVERFLOW 0x10 + +#define ISCSI_RESPONSE_COMMAND_COMPLETED 0x00 +#define ISCSI_RESPONSE_TARGET_FAILURE 0x01 + +struct iscsi_sense_data { + u16 length; + u8 data[0]; +} __packed; + +struct iscsi_task_mgt_hdr { + u8 opcode; + u8 function; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 rtt; + u32 cmd_sn; + u32 exp_stat_sn; + u32 ref_cmd_sn; + u32 exp_data_sn; + u32 rsvd2[2]; +} __packed; + +#define ISCSI_FUNCTION_MASK 0x7f + +#define ISCSI_FUNCTION_ABORT_TASK 1 +#define ISCSI_FUNCTION_ABORT_TASK_SET 2 +#define ISCSI_FUNCTION_CLEAR_ACA 3 +#define ISCSI_FUNCTION_CLEAR_TASK_SET 4 +#define ISCSI_FUNCTION_LOGICAL_UNIT_RESET 5 +#define ISCSI_FUNCTION_TARGET_WARM_RESET 6 +#define ISCSI_FUNCTION_TARGET_COLD_RESET 7 +#define ISCSI_FUNCTION_TASK_REASSIGN 8 + +struct iscsi_task_rsp_hdr { + u8 opcode; + u8 flags; + u8 response; + u8 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 rsvd3; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 rsvd4[3]; +} __packed; + +#define ISCSI_RESPONSE_FUNCTION_COMPLETE 0 +#define ISCSI_RESPONSE_UNKNOWN_TASK 1 +#define ISCSI_RESPONSE_UNKNOWN_LUN 2 +#define ISCSI_RESPONSE_TASK_ALLEGIANT 3 +#define ISCSI_RESPONSE_FAILOVER_UNSUPPORTED 4 +#define ISCSI_RESPONSE_FUNCTION_UNSUPPORTED 5 +#define ISCSI_RESPONSE_NO_AUTHORIZATION 6 +#define ISCSI_RESPONSE_FUNCTION_REJECTED 255 + +struct iscsi_data_out_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 ttt; + u32 rsvd2; + u32 exp_stat_sn; + u32 rsvd3; + u32 data_sn; + u32 buffer_offset; + u32 rsvd4; +} __packed; + +struct iscsi_data_in_hdr { + u8 opcode; + u8 flags; + u8 rsvd1; + u8 cmd_status; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 ttt; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 data_sn; + u32 buffer_offset; + u32 residual_count; +} __packed; + +#define ISCSI_FLG_STATUS 0x01 + +struct iscsi_r2t_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 ttt; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 r2t_sn; + u32 buffer_offset; + u32 data_length; +} __packed; + +struct iscsi_async_msg_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 ffffffff; + u32 rsvd2; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u8 async_event; + u8 async_vcode; + u16 param1; + u16 param2; + u16 param3; + u32 rsvd3; +} __packed; + +#define ISCSI_ASYNC_SCSI 0 +#define ISCSI_ASYNC_LOGOUT 1 +#define ISCSI_ASYNC_DROP_CONNECTION 2 +#define ISCSI_ASYNC_DROP_SESSION 3 +#define ISCSI_ASYNC_PARAM_REQUEST 4 +#define ISCSI_ASYNC_VENDOR 255 + +struct iscsi_text_req_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 ttt; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsvd3[4]; +} __packed; + +struct iscsi_text_rsp_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 ttt; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 rsvd3[3]; +} __packed; + +struct iscsi_login_req_hdr { + u8 opcode; + u8 flags; + u8 max_version; /* Max. version supported */ + u8 min_version; /* Min. version supported */ + u8 ahslength; + u8 datalength[3]; + union iscsi_sid sid; + u32 itt; /* Initiator Task Tag */ + u16 cid; /* Connection ID */ + u16 rsvd1; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsvd2[4]; +} __packed; + +struct iscsi_login_rsp_hdr { + u8 opcode; + u8 flags; + u8 max_version; /* Max. version supported */ + u8 active_version; /* Active version */ + u8 ahslength; + u8 datalength[3]; + union iscsi_sid sid; + u32 itt; /* Initiator Task Tag */ + u32 rsvd1; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u8 status_class; /* see Login RSP ststus classes below */ + u8 status_detail; /* see Login RSP Status details below */ + u8 rsvd2[10]; +} __packed; + +#define ISCSI_FLG_FINAL 0x80 +#define ISCSI_FLG_TRANSIT 0x80 +#define ISCSI_FLG_CSG_SECURITY 0x00 +#define ISCSI_FLG_CSG_LOGIN 0x04 +#define ISCSI_FLG_CSG_FULL_FEATURE 0x0c +#define ISCSI_FLG_CSG_MASK 0x0c +#define ISCSI_FLG_NSG_SECURITY 0x00 +#define ISCSI_FLG_NSG_LOGIN 0x01 +#define ISCSI_FLG_NSG_FULL_FEATURE 0x03 +#define ISCSI_FLG_NSG_MASK 0x03 + +/* Login Status response classes */ +#define ISCSI_STATUS_SUCCESS 0x00 +#define ISCSI_STATUS_REDIRECT 0x01 +#define ISCSI_STATUS_INITIATOR_ERR 0x02 +#define ISCSI_STATUS_TARGET_ERR 0x03 + +/* Login Status response detail codes */ +/* Class-0 (Success) */ +#define ISCSI_STATUS_ACCEPT 0x00 + +/* Class-1 (Redirection) */ +#define ISCSI_STATUS_TGT_MOVED_TEMP 0x01 +#define ISCSI_STATUS_TGT_MOVED_PERM 0x02 + +/* Class-2 (Initiator Error) */ +#define ISCSI_STATUS_INIT_ERR 0x00 +#define ISCSI_STATUS_AUTH_FAILED 0x01 +#define ISCSI_STATUS_TGT_FORBIDDEN 0x02 +#define ISCSI_STATUS_TGT_NOT_FOUND 0x03 +#define ISCSI_STATUS_TGT_REMOVED 0x04 +#define ISCSI_STATUS_NO_VERSION 0x05 +#define ISCSI_STATUS_TOO_MANY_CONN 0x06 +#define ISCSI_STATUS_MISSING_FIELDS 0x07 +#define ISCSI_STATUS_CONN_ADD_FAILED 0x08 +#define ISCSI_STATUS_INV_SESSION_TYPE 0x09 +#define ISCSI_STATUS_SESSION_NOT_FOUND 0x0a +#define ISCSI_STATUS_INV_REQ_TYPE 0x0b + +/* Class-3 (Target Error) */ +#define ISCSI_STATUS_TARGET_ERROR 0x00 +#define ISCSI_STATUS_SVC_UNAVAILABLE 0x01 +#define ISCSI_STATUS_NO_RESOURCES 0x02 + +struct iscsi_logout_req_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u16 cid; + u16 rsvd3; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsvd4[4]; +} __packed; + +struct iscsi_logout_rsp_hdr { + u8 opcode; + u8 flags; + u8 response; + u8 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 rsvd3; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 rsvd4; + u16 time2wait; + u16 time2retain; + u32 rsvd5; +} __packed; + +struct iscsi_snack_req_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 itt; + u32 ttt; + u32 rsvd3; + u32 exp_stat_sn; + u32 rsvd4[2]; + u32 beg_run; + u32 run_length; +} __packed; + +struct iscsi_reject_hdr { + u8 opcode; + u8 flags; + u8 reason; + u8 rsvd1; + u8 ahslength; + u8 datalength[3]; + u32 rsvd2[2]; + u32 ffffffff; + u32 rsvd3; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 data_sn; + u32 rsvd4[2]; +} __packed; + +#define ISCSI_REASON_NO_FULL_FEATURE_PHASE 0x01 +#define ISCSI_REASON_DATA_DIGEST_ERROR 0x02 +#define ISCSI_REASON_DATA_SNACK_REJECT 0x03 +#define ISCSI_REASON_PROTOCOL_ERROR 0x04 +#define ISCSI_REASON_UNSUPPORTED_COMMAND 0x05 +#define ISCSI_REASON_IMMEDIATE_COMMAND_REJECT 0x06 +#define ISCSI_REASON_TASK_IN_PROGRESS 0x07 +#define ISCSI_REASON_INVALID_SNACK 0x08 +#define ISCSI_REASON_NO_BOOKMARK 0x09 +#define ISCSI_REASON_BOOKMARK_REJECT 0x0a +#define ISCSI_REASON_NEGOTIATION_RESET 0x0b +#define ISCSI_REASON_WAITING_LOGOUT 0x0c + + +struct iscsi_nop_out_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 ttt; + u32 cmd_sn; + u32 exp_stat_sn; + u32 rsvd2[4]; +} __packed; + +struct iscsi_nop_in_hdr { + u8 opcode; + u8 flags; + u16 rsvd1; + u8 ahslength; + u8 datalength[3]; + u16 lun[4]; + u32 itt; + u32 ttt; + u32 stat_sn; + u32 exp_cmd_sn; + u32 max_cmd_sn; + u32 rsvd2[3]; +} __packed; + +#define ISCSI_RESERVED_TAG (0xffffffffU) + +#endif /* __ISCSI_HDR_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/null-io.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/null-io.c @@ -0,0 +1,114 @@ +/* + * Target device null I/O. + * (C) 2005 MING Zhang + * This code is licenced under the GPL. + * + * The nullio mode will not return any meaningful or previous written + * data. It is only for performance measurement purpose. + */ + +#include +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +struct nullio_data { + u64 sectors; +}; + +enum { + Opt_sectors, Opt_ignore, Opt_err, +}; + +static match_table_t tokens = { + {Opt_sectors, "Sectors=%u"}, + {Opt_ignore, "Type=%s"}, + {Opt_err, NULL}, +}; + +static int parse_nullio_params(struct iet_volume *volume, char *params) +{ + int err = 0; + char *p, *q; + struct nullio_data *data = volume->private; + + while ((p = strsep(¶ms, ",")) != NULL) { + substring_t args[MAX_OPT_ARGS]; + int token; + if (!*p) + continue; + token = match_token(p, tokens, args); + switch (token) { + case Opt_sectors: + q = match_strdup(&args[0]); + if (!q) + return -ENOMEM; + data->sectors = simple_strtoull(q, NULL, 10); + kfree(q); + break; + case Opt_ignore: + break; + default: + eprintk("Unknown %s\n", p); + return -EINVAL; + break; + } + } + return err; +} + +static void nullio_detach(struct iet_volume *lu) +{ + struct nullio_data *p = lu->private; + + kfree(p); + lu->private = NULL; +} + +static int nullio_attach(struct iet_volume *lu, char *args) +{ + int err = 0; + struct nullio_data *p; + + if (lu->private) { + printk("already attached ? %d\n", lu->lun); + return -EBUSY; + } + + p = kzalloc(sizeof(*p), GFP_KERNEL); + if (!p) + return -ENOMEM; + + lu->private = p; + + if ((err = parse_nullio_params(lu, args)) < 0) { + eprintk("%d\n", err); + goto out; + } + + lu->blk_shift = SECTOR_SIZE_BITS; + lu->blk_cnt = (p->sectors = p->sectors ? : 1 << 27); /* 64 GB */ + +out: + if (err < 0) + nullio_detach(lu); + return err; +} + +void nullio_show(struct iet_volume *lu, struct seq_file *seq) +{ + struct nullio_data *p = lu->private; + seq_printf(seq, " sectors:%llu\n", p->sectors); +} + +struct iotype nullio = +{ + .name = "nullio", + .attach = nullio_attach, + .detach = nullio_detach, + .show = nullio_show, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/tio.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/tio.c @@ -0,0 +1,121 @@ +/* + * Target I/O. + * (C) 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +static int tio_add_pages(struct tio *tio, int count) +{ + int i; + struct page *page; + + dprintk(D_GENERIC, "%p %d (%d)\n", tio, count, tio->pg_cnt); + + tio->pg_cnt = count; + + count *= sizeof(struct page *); + + do { + tio->pvec = kzalloc(count, GFP_KERNEL); + if (!tio->pvec) + yield(); + } while (!tio->pvec); + + for (i = 0; i < tio->pg_cnt; i++) { + do { + if (!(page = alloc_page(GFP_KERNEL))) + yield(); + } while (!page); + tio->pvec[i] = page; + } + return 0; +} + +static struct kmem_cache *tio_cache; + +struct tio *tio_alloc(int count) +{ + struct tio *tio; + + tio = kmem_cache_alloc(tio_cache, GFP_KERNEL | __GFP_NOFAIL); + + tio->pg_cnt = 0; + tio->idx = 0; + tio->offset = 0; + tio->size = 0; + tio->pvec = NULL; + + atomic_set(&tio->count, 1); + + if (count) + tio_add_pages(tio, count); + + return tio; +} + +static void tio_free(struct tio *tio) +{ + int i; + for (i = 0; i < tio->pg_cnt; i++) { + assert(tio->pvec[i]); + __free_page(tio->pvec[i]); + } + kfree(tio->pvec); + kmem_cache_free(tio_cache, tio); +} + +void tio_put(struct tio *tio) +{ + assert(atomic_read(&tio->count)); + if (atomic_dec_and_test(&tio->count)) + tio_free(tio); +} + +void tio_get(struct tio *tio) +{ + atomic_inc(&tio->count); +} + +void tio_set(struct tio *tio, u32 size, loff_t offset) +{ + tio->idx = offset >> PAGE_CACHE_SHIFT; + tio->offset = offset & ~PAGE_CACHE_MASK; + tio->size = size; +} + +int tio_read(struct iet_volume *lu, struct tio *tio) +{ + struct iotype *iot = lu->iotype; + assert(iot); + return iot->make_request ? iot->make_request(lu, tio, READ) : 0; +} + +int tio_write(struct iet_volume *lu, struct tio *tio) +{ + struct iotype *iot = lu->iotype; + assert(iot); + return iot->make_request ? iot->make_request(lu, tio, WRITE) : 0; +} + +int tio_sync(struct iet_volume *lu, struct tio *tio) +{ + struct iotype *iot = lu->iotype; + assert(iot); + return iot->sync ? iot->sync(lu, tio) : 0; +} + +int tio_init(void) +{ + tio_cache = KMEM_CACHE(tio, 0); + return tio_cache ? 0 : -ENOMEM; +} + +void tio_exit(void) +{ + if (tio_cache) + kmem_cache_destroy(tio_cache); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iotype.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iotype.c @@ -0,0 +1,110 @@ +/* + * Manager for various I/O types. + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include "iscsi.h" +#include "iotype.h" +#include "iscsi_dbg.h" + +static LIST_HEAD(iotypes); +static rwlock_t iotypes_lock = RW_LOCK_UNLOCKED; + +static struct iotype *find_iotype(const char *name) +{ + struct iotype *iot = NULL; + + list_for_each_entry(iot, &iotypes, iot_list) { + if (strcmp(iot->name, name) == 0) + return iot; + } + return NULL; +} + +struct iotype *get_iotype(const char *name) +{ + struct iotype *iot; + + read_lock(&iotypes_lock); + iot = find_iotype(name); + read_unlock(&iotypes_lock); + + return iot; +} + +void put_iotype(struct iotype *iot) +{ + if (!iot) + return; + return; +} + +static int register_iotype(struct iotype *iot) +{ + int err = 0; + struct iotype *p; + + write_lock(&iotypes_lock); + + p = find_iotype(iot->name); + if (p) + err = -EBUSY; + else + list_add_tail(&iot->iot_list, &iotypes); + + write_unlock(&iotypes_lock); + + return err; +} + +static int unregister_iotype(struct iotype *iot) +{ + int err = 0; + struct iotype *p; + + write_lock(&iotypes_lock); + + p = find_iotype(iot->name); + if (p && p == iot) + list_del_init(&iot->iot_list); + else + err = -EINVAL; + + write_unlock(&iotypes_lock); + + + return err; +} + +struct iotype *iotype_array[] = { + &fileio, + &blockio, + &nullio, +}; + +int iotype_init(void) +{ + int i, err; + + for (i = 0; i < ARRAY_SIZE(iotype_array); i++) { + if (!(err = register_iotype(iotype_array[i]))) + iprintk("Registered io type %s\n", + iotype_array[i]->name); + else { + eprintk("Failed to register io type %s\n", + iotype_array[i]->name); + break; + } + } + + return err; +} + +void iotype_exit(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(iotype_array); i++) + unregister_iotype(iotype_array[i]); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/volume.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/volume.c @@ -0,0 +1,264 @@ +/* + * Volume manager + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "iotype.h" + +struct iet_volume *volume_lookup(struct iscsi_target *target, u32 lun) +{ + struct iet_volume *volume; + + list_for_each_entry(volume, &target->volumes, list) { + if (volume->lun == lun) + return volume; + } + return NULL; +} + +enum { + Opt_type, + Opt_iomode, + Opt_err, +}; + +static match_table_t tokens = { + {Opt_type, "Type=%s"}, + {Opt_iomode, "IOMode=%s"}, + {Opt_err, NULL}, +}; + +static int set_iotype(struct iet_volume *volume, char *params) +{ + int err = 0; + substring_t args[MAX_OPT_ARGS]; + char *p, *argp = NULL, *buf = (char *) get_zeroed_page(GFP_USER); + + if (!buf) + return -ENOMEM; + strncpy(buf, params, PAGE_CACHE_SIZE); + + while ((p = strsep(&buf, ",")) != NULL) { + int token; + + if (!*p) + continue; + token = match_token(p, tokens, args); + switch (token) { + case Opt_type: + if (!(argp = match_strdup(&args[0]))) + err = -ENOMEM; + if (argp && !(volume->iotype = get_iotype(argp))) + err = -ENOENT; + kfree(argp); + break; + case Opt_iomode: + if (!(argp = match_strdup(&args[0]))) + err = -ENOMEM; + if (argp && !strcmp(argp, "ro")) + SetLUReadonly(volume); + else if (argp && !strcmp(argp, "wb")) + SetLUWCache(volume); + kfree(argp); + break; + default: + break; + } + } + + if (!err && !volume->iotype && !(volume->iotype = get_iotype("fileio"))) { + eprintk("%s\n", "Cannot find fileio"); + err = -EINVAL; + } + + free_page((unsigned long) buf); + + return err; +} + +int volume_add(struct iscsi_target *target, struct volume_info *info) +{ + int ret; + struct iet_volume *volume; + char *args; + + volume = volume_lookup(target, info->lun); + if (volume) + return -EEXIST; + + if (info->lun > 0x3fff) + return -EINVAL; + + volume = kzalloc(sizeof(*volume), GFP_KERNEL); + if (!volume) + return -ENOMEM; + + volume->target = target; + volume->lun = info->lun; + + args = kzalloc(info->args_len + 1, GFP_KERNEL); + if (!args) { + ret = -ENOMEM; + goto free_volume; + } + + ret = copy_from_user(args, (void *)(unsigned long)info->args_ptr, + info->args_len); + if (ret) { + ret = -EFAULT; + goto free_args; + } + + ret = set_iotype(volume, args); + if (ret < 0) + goto free_args; + + ret = volume->iotype->attach(volume, args); + if (ret < 0) + goto free_args; + + INIT_LIST_HEAD(&volume->queue.wait_list); + spin_lock_init(&volume->queue.queue_lock); + spin_lock_init(&volume->reserve_lock); + + volume->l_state = IDEV_RUNNING; + atomic_set(&volume->l_count, 0); + + list_add_tail(&volume->list, &target->volumes); + atomic_inc(&target->nr_volumes); + + kfree(args); + + return 0; +free_args: + kfree(args); +free_volume: + put_iotype(volume->iotype); + kfree(volume); + + return ret; +} + +void iscsi_volume_destroy(struct iet_volume *volume) +{ + assert(volume->l_state == IDEV_DEL); + assert(!atomic_read(&volume->l_count)); + + volume->iotype->detach(volume); + put_iotype(volume->iotype); + list_del(&volume->list); + kfree(volume); +} + +int iscsi_volume_del(struct iscsi_target *target, struct volume_info *info) +{ + struct iet_volume *volume; + + eprintk("%x %x\n", target->tid, info->lun); + if (!(volume = volume_lookup(target, info->lun))) + return -ENOENT; + + volume->l_state = IDEV_DEL; + atomic_dec(&target->nr_volumes); + if (!atomic_read(&volume->l_count)) + iscsi_volume_destroy(volume); + + return 0; +} + +struct iet_volume *volume_get(struct iscsi_target *target, u32 lun) +{ + struct iet_volume *volume; + + if ((volume = volume_lookup(target, lun))) { + if (volume->l_state == IDEV_RUNNING) + atomic_inc(&volume->l_count); + else + volume = NULL; + } + return volume; +} + +void volume_put(struct iet_volume *volume) +{ + if (atomic_dec_and_test(&volume->l_count) && volume->l_state == IDEV_DEL) + iscsi_volume_destroy(volume); +} + +int volume_reserve(struct iet_volume *volume, u64 sid) +{ + if (!volume) + return -ENOENT; + + spin_lock(&volume->reserve_lock); + if (volume->reserve_sid && volume->reserve_sid != sid) { + spin_unlock(&volume->reserve_lock); + return -EBUSY; + } + + volume->reserve_sid = sid; + spin_unlock(&volume->reserve_lock); + + return 0; +} + +int is_volume_reserved(struct iet_volume *volume, u64 sid) +{ + if (!volume || !volume->reserve_sid || volume->reserve_sid == sid) + return 0; + + return -EBUSY; +} + +int volume_release(struct iet_volume *volume, u64 sid, int force) +{ + if (force || volume->reserve_sid == sid) + volume->reserve_sid = 0; + + return 0; +} + +static void iet_volume_info_show(struct seq_file *seq, struct iscsi_target *target) +{ + struct iet_volume *volume; + + list_for_each_entry(volume, &target->volumes, list) { + seq_printf(seq, "\tlun:%u state:%x iotype:%s", + volume->lun, volume->l_state, volume->iotype->name); + if (LUReadonly(volume)) + seq_printf(seq, " iomode:ro"); + else if (LUWCache(volume)) + seq_printf(seq, " iomode:wb"); + else + seq_printf(seq, " iomode:wt"); + + if (volume->iotype->show) + volume->iotype->show(volume, seq); + else + seq_printf(seq, "\n"); + } +} + +static int iet_volume_seq_open(struct inode *inode, struct file *file) +{ + int res; + res = seq_open(file, &iet_seq_op); + if (!res) + ((struct seq_file *)file->private_data)->private = + iet_volume_info_show; + return res; +} + +struct file_operations volume_seq_fops = { + .owner = THIS_MODULE, + .open = iet_volume_seq_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/conn.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/conn.c @@ -0,0 +1,242 @@ +/* + * Copyright (C) 2002-2003 Ardis Technolgies + * + * Released under the terms of the GNU GPL v2.0. + */ + +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "digest.h" + +static void print_conn_state(char *p, size_t size, unsigned long state) +{ + if (test_bit(CONN_ACTIVE, &state)) + snprintf(p, size, "%s", "active"); + else if (test_bit(CONN_CLOSING, &state)) + snprintf(p, size, "%s", "closing"); + else + snprintf(p, size, "%s", "unknown"); +} + +static void print_digest_state(char *p, size_t size, unsigned long flags) +{ + if (DIGEST_NONE & flags) + snprintf(p, size, "%s", "none"); + else if (DIGEST_CRC32C & flags) + snprintf(p, size, "%s", "crc32c"); + else + snprintf(p, size, "%s", "unknown"); +} + +void conn_info_show(struct seq_file *seq, struct iscsi_session *session) +{ + struct iscsi_conn *conn; + struct sock *sk; + char buf[64]; + + list_for_each_entry(conn, &session->conn_list, list) { + sk = conn->sock->sk; + switch (sk->sk_family) { + case AF_INET: + snprintf(buf, sizeof(buf), + "%u.%u.%u.%u", NIPQUAD(inet_sk(sk)->daddr)); + break; + case AF_INET6: + snprintf(buf, sizeof(buf), "[%pI6]", + &inet6_sk(sk)->daddr); + break; + default: + break; + } + seq_printf(seq, "\t\tcid:%u ip:%s ", conn->cid, buf); + print_conn_state(buf, sizeof(buf), conn->state); + seq_printf(seq, "state:%s ", buf); + print_digest_state(buf, sizeof(buf), conn->hdigest_type); + seq_printf(seq, "hd:%s ", buf); + print_digest_state(buf, sizeof(buf), conn->ddigest_type); + seq_printf(seq, "dd:%s\n", buf); + } +} + +struct iscsi_conn *conn_lookup(struct iscsi_session *session, u16 cid) +{ + struct iscsi_conn *conn; + + list_for_each_entry(conn, &session->conn_list, list) { + if (conn->cid == cid) + return conn; + } + return NULL; +} + +static void iet_state_change(struct sock *sk) +{ + struct iscsi_conn *conn = sk->sk_user_data; + struct iscsi_target *target = conn->session->target; + + if (sk->sk_state != TCP_ESTABLISHED) + conn_close(conn); + else + nthread_wakeup(target); + + target->nthread_info.old_state_change(sk); +} + +static void iet_data_ready(struct sock *sk, int len) +{ + struct iscsi_conn *conn = sk->sk_user_data; + struct iscsi_target *target = conn->session->target; + + nthread_wakeup(target); + target->nthread_info.old_data_ready(sk, len); +} + +/* + * @locking: grabs the target's nthread_lock to protect it from races with + * set_conn_wspace_wait() + */ +static void iet_write_space(struct sock *sk) +{ + struct iscsi_conn *conn = sk->sk_user_data; + struct network_thread_info *info = &conn->session->target->nthread_info; + + spin_lock_bh(&info->nthread_lock); + + if (sk_stream_wspace(sk) >= sk_stream_min_wspace(sk) && + test_bit(CONN_WSPACE_WAIT, &conn->state)) { + clear_bit(CONN_WSPACE_WAIT, &conn->state); + __nthread_wakeup(info); + } + + spin_unlock_bh(&info->nthread_lock); + + info->old_write_space(sk); +} + +static void iet_socket_bind(struct iscsi_conn *conn) +{ + int opt = 1; + mm_segment_t oldfs; + struct iscsi_session *session = conn->session; + struct iscsi_target *target = session->target; + + dprintk(D_GENERIC, "%llu\n", (unsigned long long) session->sid); + + conn->sock = SOCKET_I(conn->file->f_dentry->d_inode); + conn->sock->sk->sk_user_data = conn; + + write_lock_bh(&conn->sock->sk->sk_callback_lock); + target->nthread_info.old_state_change = conn->sock->sk->sk_state_change; + conn->sock->sk->sk_state_change = iet_state_change; + + target->nthread_info.old_data_ready = conn->sock->sk->sk_data_ready; + conn->sock->sk->sk_data_ready = iet_data_ready; + + target->nthread_info.old_write_space = conn->sock->sk->sk_write_space; + conn->sock->sk->sk_write_space = iet_write_space; + write_unlock_bh(&conn->sock->sk->sk_callback_lock); + + oldfs = get_fs(); + set_fs(get_ds()); + conn->sock->ops->setsockopt(conn->sock, SOL_TCP, TCP_NODELAY, (void *)&opt, sizeof(opt)); + set_fs(oldfs); +} + +int conn_free(struct iscsi_conn *conn) +{ + dprintk(D_GENERIC, "%p %#Lx %u\n", conn->session, + (unsigned long long) conn->session->sid, conn->cid); + + assert(atomic_read(&conn->nr_cmnds) == 0); + assert(list_empty(&conn->pdu_list)); + assert(list_empty(&conn->write_list)); + + list_del(&conn->list); + list_del(&conn->poll_list); + + digest_cleanup(conn); + kfree(conn); + + return 0; +} + +static int iet_conn_alloc(struct iscsi_session *session, struct conn_info *info) +{ + struct iscsi_conn *conn; + + dprintk(D_SETUP, "%#Lx:%u\n", (unsigned long long) session->sid, info->cid); + + conn = kzalloc(sizeof(*conn), GFP_KERNEL); + if (!conn) + return -ENOMEM; + + conn->session = session; + conn->cid = info->cid; + conn->stat_sn = info->stat_sn; + conn->exp_stat_sn = info->exp_stat_sn; + + conn->hdigest_type = info->header_digest; + conn->ddigest_type = info->data_digest; + if (digest_init(conn) < 0) { + kfree(conn); + return -ENOMEM; + } + + spin_lock_init(&conn->list_lock); + atomic_set(&conn->nr_cmnds, 0); + atomic_set(&conn->nr_busy_cmnds, 0); + INIT_LIST_HEAD(&conn->pdu_list); + INIT_LIST_HEAD(&conn->write_list); + INIT_LIST_HEAD(&conn->poll_list); + + list_add(&conn->list, &session->conn_list); + + set_bit(CONN_ACTIVE, &conn->state); + + conn->file = fget(info->fd); + iet_socket_bind(conn); + + list_add(&conn->poll_list, &session->target->nthread_info.active_conns); + + nthread_wakeup(conn->session->target); + + return 0; +} + +void conn_close(struct iscsi_conn *conn) +{ + if (test_and_clear_bit(CONN_ACTIVE, &conn->state)) + set_bit(CONN_CLOSING, &conn->state); + + nthread_wakeup(conn->session->target); +} + +int conn_add(struct iscsi_session *session, struct conn_info *info) +{ + struct iscsi_conn *conn; + int err = -EEXIST; + + conn = conn_lookup(session, info->cid); + if (conn) + return err; + + return iet_conn_alloc(session, info); +} + +int conn_del(struct iscsi_session *session, struct conn_info *info) +{ + struct iscsi_conn *conn; + int err = -EEXIST; + + conn = conn_lookup(session, info->cid); + if (!conn) + return err; + + conn_close(conn); + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/wthread.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/wthread.c @@ -0,0 +1,222 @@ +/* + * Worker thread. + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" + +struct worker_thread_info *worker_thread_pool; + +void wthread_queue(struct iscsi_cmnd *cmnd) +{ + struct worker_thread_info *info = cmnd->conn->session->target->wthread_info; + + if (!list_empty(&cmnd->list)) { + struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd); + eprintk("%x %p %x %x %x %x %lx %x\n", + cmnd_itt(cmnd), req, req->opcode, req->scb[0], cmnd->pdu.datasize, + be32_to_cpu(req->data_length), cmnd->flags, req->flags); + + if (cmnd->lun) + eprintk("%u\n", cmnd->lun->lun); + assert(list_empty(&cmnd->list)); + } + + spin_lock(&info->wthread_lock); + list_add_tail(&cmnd->list, &info->work_queue); + spin_unlock(&info->wthread_lock); + + atomic_inc(&cmnd->conn->nr_busy_cmnds); + + wake_up(&info->wthread_sleep); +} + +static struct iscsi_cmnd * get_ready_cmnd(struct worker_thread_info *info) +{ + struct iscsi_cmnd *cmnd = NULL; + + spin_lock(&info->wthread_lock); + if (!list_empty(&info->work_queue)) { + cmnd = list_entry(info->work_queue.next, struct iscsi_cmnd, list); + list_del_init(&cmnd->list); + + assert(cmnd->conn); + } + spin_unlock(&info->wthread_lock); + + return cmnd; +} + +static int cmnd_execute(struct iscsi_cmnd *cmnd) +{ + int type = cmnd->conn->session->target->trgt_param.target_type; + + assert(target_type_array[type]->execute_cmnd); + return target_type_array[type]->execute_cmnd(cmnd); +} + +static int worker_thread(void *arg) +{ + struct worker_thread *wt = (struct worker_thread *) arg; + struct worker_thread_info *info = wt->w_info; + struct iscsi_cmnd *cmnd; + struct iscsi_conn *conn; + DECLARE_WAITQUEUE(wait, current); + + add_wait_queue(&info->wthread_sleep, &wait); + + __set_current_state(TASK_RUNNING); + do { + while (!list_empty(&info->work_queue) && + (cmnd = get_ready_cmnd(info))) { + conn = cmnd->conn; + cmnd_execute(cmnd); + assert(conn); + atomic_dec(&conn->nr_busy_cmnds); + } + + __set_current_state(TASK_INTERRUPTIBLE); + if (list_empty(&info->work_queue)) + schedule(); + + __set_current_state(TASK_RUNNING); + } while (!kthread_should_stop()); + + remove_wait_queue(&info->wthread_sleep, &wait); + + return 0; +} + +static int start_one_worker_thread(struct worker_thread_info *info, u32 tid) +{ + struct worker_thread *wt; + struct task_struct *task; + + if (!(wt = kmalloc(sizeof(struct worker_thread), GFP_KERNEL))) + return -ENOMEM; + + wt->w_info = info; + task = kthread_create(worker_thread, wt, "istiod%d", tid); + if (IS_ERR(task)) { + kfree(wt); + return PTR_ERR(task); + } + + wt->w_task = task; + list_add(&wt->w_list, &info->wthread_list); + info->nr_running_wthreads++; + + wake_up_process(task); + + return 0; +} + +static int stop_one_worker_thread(struct worker_thread *wt) +{ + struct worker_thread_info *info = wt->w_info; + int err; + + assert(wt->w_task); + err = kthread_stop(wt->w_task); + + if (err < 0 && err != -EINTR) + return err; + + list_del(&wt->w_list); + kfree(wt); + info->nr_running_wthreads--; + + return 0; +} + +int wthread_init(struct worker_thread_info *info) +{ + spin_lock_init(&info->wthread_lock); + + info->nr_running_wthreads = 0; + + INIT_LIST_HEAD(&info->work_queue); + INIT_LIST_HEAD(&info->wthread_list); + + init_waitqueue_head(&info->wthread_sleep); + + return 0; +} + +int wthread_start(struct worker_thread_info *info, int wthreads, u32 tid) +{ + int err = 0; + + while (info->nr_running_wthreads < wthreads) { + if ((err = start_one_worker_thread(info, tid)) < 0) { + eprintk("Fail to create a worker thread %d\n", err); + goto out; + } + } + + while (info->nr_running_wthreads > wthreads) { + struct worker_thread *wt; + wt = list_entry(info->wthread_list.next, struct worker_thread, w_list); + if ((err = stop_one_worker_thread(wt)) < 0) { + eprintk("Fail to stop a worker thread %d\n", err); + break; + } + } +out: + return err; +} + +int wthread_stop(struct worker_thread_info *info) +{ + struct worker_thread *wt, *tmp; + int err = 0; + + list_for_each_entry_safe(wt, tmp, &info->wthread_list, w_list) { + if ((err = stop_one_worker_thread(wt)) < 0) { + eprintk("Fail to stop a worker thread %d\n", err); + return err; + } + } + + return err; +} + +int wthread_module_init() +{ + int err; + + if (!worker_thread_pool_size) + return 0; + + worker_thread_pool = kmalloc(sizeof(struct worker_thread_info), + GFP_KERNEL); + if (!worker_thread_pool) + return -ENOMEM; + + wthread_init(worker_thread_pool); + + err = wthread_start(worker_thread_pool, worker_thread_pool_size, 0); + if (err) { + kfree(worker_thread_pool); + worker_thread_pool = NULL; + return err; + } + + iprintk("iscsi_trgt using worker thread pool; size = %ld\n", + worker_thread_pool_size); + + return 0; +} + +void wthread_module_exit() +{ + if (!worker_thread_pool_size) + return; + + wthread_stop(worker_thread_pool); + kfree(worker_thread_pool); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/param.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/param.c @@ -0,0 +1,196 @@ +/* + * (C) 2005 FUJITA Tomonori + * + * This code is licenced under the GPL. + */ + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "digest.h" + +struct target_type *target_type_array[] = { + &disk_ops, +}; + +#define CHECK_PARAM(info, iparam, word, min, max) \ +do { \ + if (!info->partial || (info->partial & 1 << key_##word)) \ + if (iparam[key_##word] < min || \ + iparam[key_##word] > max) { \ + eprintk("%s: %u is out of range (%u %u)\n", \ + #word, iparam[key_##word], min, max); \ + iparam[key_##word] = min; \ + } \ +} while (0) + +#define SET_PARAM(param, info, iparam, word) \ +({ \ + int changed = 0; \ + if (!info->partial || (info->partial & 1 << key_##word)) { \ + if (param->word != iparam[key_##word]) \ + changed = 1; \ + param->word = iparam[key_##word]; \ + } \ + changed; \ +}) + +#define GET_PARAM(param, info, iparam, word) \ +do { \ + iparam[key_##word] = param->word; \ +} while (0) + +static void sess_param_check(struct iscsi_param_info *info) +{ + u32 *iparam = info->session_param; + + CHECK_PARAM(info, iparam, max_connections, 1, 1); + CHECK_PARAM(info, iparam, max_recv_data_length, 512, + (u32) ((ISCSI_CONN_IOV_MAX - 1) * PAGE_CACHE_SIZE)); + CHECK_PARAM(info, iparam, max_xmit_data_length, 512, + (u32) ((ISCSI_CONN_IOV_MAX - 1) * PAGE_CACHE_SIZE)); + CHECK_PARAM(info, iparam, error_recovery_level, 0, 0); + CHECK_PARAM(info, iparam, data_pdu_inorder, 1, 1); + CHECK_PARAM(info, iparam, data_sequence_inorder, 1, 1); + + digest_alg_available(&iparam[key_header_digest]); + digest_alg_available(&iparam[key_data_digest]); + + CHECK_PARAM(info, iparam, ofmarker, 0, 0); + CHECK_PARAM(info, iparam, ifmarker, 0, 0); +} + +static void sess_param_set(struct iscsi_sess_param *param, struct iscsi_param_info *info) +{ + u32 *iparam = info->session_param; + + SET_PARAM(param, info, iparam, initial_r2t); + SET_PARAM(param, info, iparam, immediate_data); + SET_PARAM(param, info, iparam, max_connections); + SET_PARAM(param, info, iparam, max_recv_data_length); + SET_PARAM(param, info, iparam, max_xmit_data_length); + SET_PARAM(param, info, iparam, max_burst_length); + SET_PARAM(param, info, iparam, first_burst_length); + SET_PARAM(param, info, iparam, default_wait_time); + SET_PARAM(param, info, iparam, default_retain_time); + SET_PARAM(param, info, iparam, max_outstanding_r2t); + SET_PARAM(param, info, iparam, data_pdu_inorder); + SET_PARAM(param, info, iparam, data_sequence_inorder); + SET_PARAM(param, info, iparam, error_recovery_level); + SET_PARAM(param, info, iparam, header_digest); + SET_PARAM(param, info, iparam, data_digest); + SET_PARAM(param, info, iparam, ofmarker); + SET_PARAM(param, info, iparam, ifmarker); + SET_PARAM(param, info, iparam, ofmarkint); + SET_PARAM(param, info, iparam, ifmarkint); +} + +static void sess_param_get(struct iscsi_sess_param *param, struct iscsi_param_info *info) +{ + u32 *iparam = info->session_param; + + GET_PARAM(param, info, iparam, initial_r2t); + GET_PARAM(param, info, iparam, immediate_data); + GET_PARAM(param, info, iparam, max_connections); + GET_PARAM(param, info, iparam, max_recv_data_length); + GET_PARAM(param, info, iparam, max_xmit_data_length); + GET_PARAM(param, info, iparam, max_burst_length); + GET_PARAM(param, info, iparam, first_burst_length); + GET_PARAM(param, info, iparam, default_wait_time); + GET_PARAM(param, info, iparam, default_retain_time); + GET_PARAM(param, info, iparam, max_outstanding_r2t); + GET_PARAM(param, info, iparam, data_pdu_inorder); + GET_PARAM(param, info, iparam, data_sequence_inorder); + GET_PARAM(param, info, iparam, error_recovery_level); + GET_PARAM(param, info, iparam, header_digest); + GET_PARAM(param, info, iparam, data_digest); + GET_PARAM(param, info, iparam, ofmarker); + GET_PARAM(param, info, iparam, ifmarker); + GET_PARAM(param, info, iparam, ofmarkint); + GET_PARAM(param, info, iparam, ifmarkint); +} + +static void trgt_param_check(struct iscsi_param_info *info) +{ + u32 *iparam = info->target_param; + + CHECK_PARAM(info, iparam, wthreads, MIN_NR_WTHREADS, MAX_NR_WTHREADS); + CHECK_PARAM(info, iparam, target_type, 0, + (unsigned int) ARRAY_SIZE(target_type_array) - 1); + CHECK_PARAM(info, iparam, queued_cmnds, MIN_NR_QUEUED_CMNDS, MAX_NR_QUEUED_CMNDS); +} + +static void trgt_param_set(struct iscsi_target *target, struct iscsi_param_info *info) +{ + struct iscsi_trgt_param *param = &target->trgt_param; + u32 *iparam = info->target_param; + + if (!worker_thread_pool && + SET_PARAM(param, info, iparam, wthreads)) + wthread_start(target->wthread_info, + target->trgt_param.wthreads, target->tid); + SET_PARAM(param, info, iparam, target_type); + SET_PARAM(param, info, iparam, queued_cmnds); +} + +static void trgt_param_get(struct iscsi_trgt_param *param, struct iscsi_param_info *info) +{ + u32 *iparam = info->target_param; + + GET_PARAM(param, info, iparam, wthreads); + GET_PARAM(param, info, iparam, target_type); + GET_PARAM(param, info, iparam, queued_cmnds); +} + +static int trgt_param(struct iscsi_target *target, struct iscsi_param_info *info, int set) +{ + + if (set) { + trgt_param_check(info); + trgt_param_set(target, info); + } else + trgt_param_get(&target->trgt_param, info); + + return 0; +} + +static int sess_param(struct iscsi_target *target, struct iscsi_param_info *info, int set) +{ + struct iscsi_session *session = NULL; + struct iscsi_sess_param *param; + int err = -ENOENT; + + if (set) + sess_param_check(info); + + if (info->sid) { + if (!(session = session_lookup(target, info->sid))) + goto out; + param = &session->param; + } else { + param = &target->sess_param; + } + + if (set) { + sess_param_set(param, info); + show_param(param); + } else + sess_param_get(param, info); + + err = 0; +out: + return err; +} + +int iscsi_param_set(struct iscsi_target *target, struct iscsi_param_info *info, int set) +{ + int err; + + if (info->param_type == key_session) + err = sess_param(target, info, set); + else if (info->param_type == key_target) + err = trgt_param(target, info, set); + else + err = -EINVAL; + + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/event.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/event.c @@ -0,0 +1,96 @@ +/* + * Event notification code. + * (C) 2005 FUJITA Tomonori + * This code is licenced under the GPL. + * + * Some functions are based on audit code. + */ + +#include +#include "iet_u.h" +#include "iscsi_dbg.h" + +static struct sock *nl; +static u32 ietd_pid; + +static int event_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh) +{ + u32 uid, pid, seq; + char *data; + + pid = NETLINK_CREDS(skb)->pid; + uid = NETLINK_CREDS(skb)->uid; + seq = nlh->nlmsg_seq; + data = NLMSG_DATA(nlh); + + ietd_pid = pid; + + return 0; +} + +static void event_recv_skb(struct sk_buff *skb) +{ + int err; + struct nlmsghdr *nlh; + u32 rlen; + + while (skb->len >= NLMSG_SPACE(0)) { + nlh = (struct nlmsghdr *)skb->data; + if (nlh->nlmsg_len < sizeof(*nlh) || skb->len < nlh->nlmsg_len) + break; + rlen = NLMSG_ALIGN(nlh->nlmsg_len); + if (rlen > skb->len) + rlen = skb->len; + if ((err = event_recv_msg(skb, nlh))) { + netlink_ack(skb, nlh, -err); + } else if (nlh->nlmsg_flags & NLM_F_ACK) + netlink_ack(skb, nlh, 0); + skb_pull(skb, rlen); + } +} + +static int notify(void *data, int len, int gfp_mask) +{ + struct sk_buff *skb; + struct nlmsghdr *nlh; + static u32 seq = 0; + + if (!(skb = alloc_skb(NLMSG_SPACE(len), gfp_mask))) + return -ENOMEM; + + nlh = __nlmsg_put(skb, ietd_pid, seq++, NLMSG_DONE, len - sizeof(*nlh), 0); + + memcpy(NLMSG_DATA(nlh), data, len); + + return netlink_unicast(nl, skb, ietd_pid, 0); +} + +int event_send(u32 tid, u64 sid, u32 cid, u32 state, int atomic) +{ + int err; + struct iet_event event; + + event.tid = tid; + event.sid = sid; + event.cid = cid; + event.state = state; + + err = notify(&event, NLMSG_SPACE(sizeof(struct iet_event)), 0); + + return err; +} + +int event_init(void) +{ + nl = netlink_kernel_create(&init_net, NETLINK_IET, 1, event_recv_skb, + NULL, THIS_MODULE); + if (!nl) + return -ENOMEM; + else + return 0; +} + +void event_exit(void) +{ + netlink_kernel_release(nl); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/iotype.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/iotype.h @@ -0,0 +1,29 @@ +/* + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include "iscsi.h" + +#ifndef __IOTYPE_H__ +#define __IOTYPE_H__ + +struct iotype { + const char *name; + struct list_head iot_list; + + int (*attach)(struct iet_volume *dev, char *args); + int (*make_request)(struct iet_volume *dev, struct tio *tio, int rw); + int (*sync)(struct iet_volume *dev, struct tio *tio); + void (*detach)(struct iet_volume *dev); + void (*show)(struct iet_volume *dev, struct seq_file *seq); +}; + +extern struct iotype fileio; +extern struct iotype nullio; +extern struct iotype blockio; + +extern int iotype_init(void); +extern void iotype_exit(void); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/nthread.c +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/nthread.c @@ -0,0 +1,733 @@ +/* + * Network thread. + * (C) 2004 - 2005 FUJITA Tomonori + * This code is licenced under the GPL. + */ + +#include +#include +#include +#include + +#include "iscsi.h" +#include "iscsi_dbg.h" +#include "digest.h" + +enum daemon_state_bit { + D_ACTIVE, + D_DATA_READY, +}; + +void __nthread_wakeup(struct network_thread_info *info) +{ + set_bit(D_DATA_READY, &info->flags); + wake_up_process(info->task); +} + +void nthread_wakeup(struct iscsi_target *target) +{ + struct network_thread_info *info = &target->nthread_info; + + spin_lock_bh(&info->nthread_lock); + __nthread_wakeup(info); + spin_unlock_bh(&info->nthread_lock); +} + +static inline void iscsi_conn_init_read(struct iscsi_conn *conn, void *data, size_t len) +{ + len = (len + 3) & -4; // XXX ??? + conn->read_iov[0].iov_base = data; + conn->read_iov[0].iov_len = len; + conn->read_msg.msg_iov = conn->read_iov; + conn->read_msg.msg_iovlen = 1; + conn->read_size = (len + 3) & -4; +} + +static void iscsi_conn_read_ahs(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd) +{ + cmnd->pdu.ahs = kmalloc(cmnd->pdu.ahssize, __GFP_NOFAIL|GFP_KERNEL); + assert(cmnd->pdu.ahs); + iscsi_conn_init_read(conn, cmnd->pdu.ahs, cmnd->pdu.ahssize); +} + +static struct iscsi_cmnd * iscsi_get_send_cmnd(struct iscsi_conn *conn) +{ + struct iscsi_cmnd *cmnd = NULL; + + spin_lock(&conn->list_lock); + if (!list_empty(&conn->write_list)) { + cmnd = list_entry(conn->write_list.next, struct iscsi_cmnd, list); + list_del_init(&cmnd->list); + } + spin_unlock(&conn->list_lock); + + return cmnd; +} + +static int is_data_available(struct iscsi_conn *conn) +{ + int avail, res; + mm_segment_t oldfs; + struct socket *sock = conn->sock; + + oldfs = get_fs(); + set_fs(get_ds()); + res = sock->ops->ioctl(sock, SIOCINQ, (unsigned long) &avail); + set_fs(oldfs); + return (res >= 0) ? avail : res; +} + +static void forward_iov(struct msghdr *msg, int len) +{ + while (msg->msg_iov->iov_len <= len) { + len -= msg->msg_iov->iov_len; + msg->msg_iov++; + msg->msg_iovlen--; + } + + msg->msg_iov->iov_base = (char *) msg->msg_iov->iov_base + len; + msg->msg_iov->iov_len -= len; +} + +static int do_recv(struct iscsi_conn *conn, int state) +{ + mm_segment_t oldfs; + struct msghdr msg; + struct iovec iov[ISCSI_CONN_IOV_MAX]; + int i, len, res; + + if (!test_bit(CONN_ACTIVE, &conn->state)) { + res = -EIO; + goto out; + } + + if (is_data_available(conn) <= 0) { + res = -EAGAIN; + goto out; + } + + msg.msg_iov = iov; + msg.msg_iovlen = min_t(size_t, conn->read_msg.msg_iovlen, ISCSI_CONN_IOV_MAX); + for (i = 0, len = 0; i < msg.msg_iovlen; i++) { + iov[i] = conn->read_msg.msg_iov[i]; + len += iov[i].iov_len; + } + + oldfs = get_fs(); + set_fs(get_ds()); + res = sock_recvmsg(conn->sock, &msg, len, MSG_DONTWAIT | MSG_NOSIGNAL); + set_fs(oldfs); + + if (res <= 0) { + switch (res) { + case -EAGAIN: + case -ERESTARTSYS: + break; + default: + eprintk("%d\n", res); + conn_close(conn); + break; + } + } else { + conn->read_size -= res; + if (conn->read_size) + forward_iov(&conn->read_msg, res); + else + conn->read_state = state; + } + +out: + dprintk(D_IOD, "%d\n", res); + + return res; +} + +enum rx_state { + RX_INIT_BHS, /* Must be zero. */ + RX_BHS, + + RX_INIT_AHS, + RX_AHS, + + RX_INIT_HDIGEST, + RX_HDIGEST, + RX_CHECK_HDIGEST, + + RX_INIT_DATA, + RX_DATA, + + RX_INIT_DDIGEST, + RX_DDIGEST, + RX_CHECK_DDIGEST, + + RX_END, +}; + +static void rx_ddigest(struct iscsi_conn *conn, int state) +{ + struct iscsi_cmnd *cmnd = conn->read_cmnd; + int res = digest_rx_data(cmnd); + + if (!res) + conn->read_state = state; + else + conn_close(conn); +} + +static void rx_hdigest(struct iscsi_conn *conn, int state) +{ + struct iscsi_cmnd *cmnd = conn->read_cmnd; + int res = digest_rx_header(cmnd); + + if (!res) + conn->read_state = state; + else + conn_close(conn); +} + +static struct iscsi_cmnd *create_cmnd(struct iscsi_conn *conn) +{ + struct iscsi_cmnd *cmnd; + + cmnd = cmnd_alloc(conn, 1); + iscsi_conn_init_read(cmnd->conn, &cmnd->pdu.bhs, sizeof(cmnd->pdu.bhs)); + conn->read_state = RX_BHS; + + return cmnd; +} + +static int recv(struct iscsi_conn *conn) +{ + struct iscsi_cmnd *cmnd = conn->read_cmnd; + int hdigest, ddigest, res = 1; + + if (!test_bit(CONN_ACTIVE, &conn->state)) + return -EIO; + + hdigest = conn->hdigest_type & DIGEST_NONE ? 0 : 1; + ddigest = conn->ddigest_type & DIGEST_NONE ? 0 : 1; + + switch (conn->read_state) { + case RX_INIT_BHS: + assert(!cmnd); + cmnd = conn->read_cmnd = create_cmnd(conn); + case RX_BHS: + res = do_recv(conn, RX_INIT_AHS); + if (res <= 0 || conn->read_state != RX_INIT_AHS) + break; + case RX_INIT_AHS: + iscsi_cmnd_get_length(&cmnd->pdu); + if (cmnd->pdu.ahssize) { + iscsi_conn_read_ahs(conn, cmnd); + conn->read_state = RX_AHS; + } else + conn->read_state = hdigest ? RX_INIT_HDIGEST : RX_INIT_DATA; + + if (conn->read_state != RX_AHS) + break; + case RX_AHS: + res = do_recv(conn, hdigest ? RX_INIT_HDIGEST : RX_INIT_DATA); + if (res <= 0 || conn->read_state != RX_INIT_HDIGEST) + break; + case RX_INIT_HDIGEST: + iscsi_conn_init_read(conn, &cmnd->hdigest, sizeof(u32)); + conn->read_state = RX_HDIGEST; + case RX_HDIGEST: + res = do_recv(conn, RX_CHECK_HDIGEST); + if (res <= 0 || conn->read_state != RX_CHECK_HDIGEST) + break; + case RX_CHECK_HDIGEST: + rx_hdigest(conn, RX_INIT_DATA); + if (conn->read_state != RX_INIT_DATA) + break; + case RX_INIT_DATA: + cmnd_rx_start(cmnd); + conn->read_state = cmnd->pdu.datasize ? RX_DATA : RX_END; + if (conn->read_state != RX_DATA) + break; + case RX_DATA: + res = do_recv(conn, ddigest ? RX_INIT_DDIGEST : RX_END); + if (res <= 0 || conn->read_state != RX_INIT_DDIGEST) + break; + case RX_INIT_DDIGEST: + iscsi_conn_init_read(conn, &cmnd->ddigest, sizeof(u32)); + conn->read_state = RX_DDIGEST; + case RX_DDIGEST: + res = do_recv(conn, RX_CHECK_DDIGEST); + if (res <= 0 || conn->read_state != RX_CHECK_DDIGEST) + break; + case RX_CHECK_DDIGEST: + rx_ddigest(conn, RX_END); + break; + default: + eprintk("%d %d %x\n", res, conn->read_state, cmnd_opcode(cmnd)); + assert(0); + } + + if (res <= 0) + return res; + + if (conn->read_state != RX_END) + return res; + + if (conn->read_size) { + eprintk("%d %x %d\n", res, cmnd_opcode(cmnd), conn->read_size); + assert(0); + } + + cmnd_rx_end(cmnd); + if (conn->read_size) { + eprintk("%x %d\n", cmnd_opcode(cmnd), conn->read_size); + conn->read_state = RX_DATA; + return 1; + } + + conn->read_cmnd = NULL; + conn->read_state = RX_INIT_BHS; + + return 0; +} + +/* + * @locking: grabs the target's nthread_lock to protect it from races with + * iet_write_space() + */ +static void set_conn_wspace_wait(struct iscsi_conn *conn) +{ + struct network_thread_info *info = &conn->session->target->nthread_info; + struct sock *sk = conn->sock->sk; + + spin_lock_bh(&info->nthread_lock); + + if (sk_stream_wspace(sk) < sk_stream_min_wspace(sk)) + set_bit(CONN_WSPACE_WAIT, &conn->state); + + spin_unlock_bh(&info->nthread_lock); +} + +/* This is taken from the Ardis code. */ +static int write_data(struct iscsi_conn *conn) +{ + mm_segment_t oldfs; + struct file *file; + struct socket *sock; + ssize_t (*sendpage)(struct socket *, struct page *, int, size_t, int); + struct tio *tio; + struct iovec *iop; + int saved_size, size, sendsize; + int offset, idx; + int flags, res; + + file = conn->file; + saved_size = size = conn->write_size; + iop = conn->write_iop; + + if (iop) while (1) { + loff_t off = 0; + unsigned long count; + struct iovec *vec; + int rest; + + vec = iop; + for (count = 0; vec->iov_len; count++, vec++) + ; + oldfs = get_fs(); + set_fs(KERNEL_DS); + res = vfs_writev(file, (struct iovec __user *) iop, count, &off); + set_fs(oldfs); + dprintk(D_DATA, "%#Lx:%u: %d(%ld)\n", + (unsigned long long) conn->session->sid, conn->cid, + res, (long) iop->iov_len); + if (unlikely(res <= 0)) { + if (res == -EAGAIN || res == -EINTR) { + conn->write_iop = iop; + goto out_iov; + } + goto err; + } + + rest = res; + size -= res; + while (iop->iov_len <= rest && rest) { + rest -= iop->iov_len; + iop++; + } + iop->iov_base += rest; + iop->iov_len -= rest; + + if (!iop->iov_len) { + conn->write_iop = NULL; + if (size) + break; + goto out_iov; + } + } + + if (!(tio = conn->write_tcmnd)) { + eprintk("%s\n", "warning data missing!"); + return 0; + } + offset = conn->write_offset; + idx = offset >> PAGE_CACHE_SHIFT; + offset &= ~PAGE_CACHE_MASK; + + sock = conn->sock; + sendpage = sock->ops->sendpage ? : sock_no_sendpage; + flags = MSG_DONTWAIT; + + while (1) { + sendsize = PAGE_CACHE_SIZE - offset; + if (size <= sendsize) { + res = sendpage(sock, tio->pvec[idx], offset, size, flags); + dprintk(D_DATA, "%s %#Lx:%u: %d(%lu,%u,%u)\n", + sock->ops->sendpage ? "sendpage" : "writepage", + (unsigned long long ) conn->session->sid, conn->cid, + res, tio->pvec[idx]->index, offset, size); + if (unlikely(res <= 0)) { + if (res == -EAGAIN || res == -EINTR) { + goto out; + } + goto err; + } + if (res == size) { + conn->write_tcmnd = NULL; + conn->write_size = 0; + return saved_size; + } + offset += res; + size -= res; + continue; + } + + res = sendpage(sock, tio->pvec[idx], offset,sendsize, flags | MSG_MORE); + dprintk(D_DATA, "%s %#Lx:%u: %d(%lu,%u,%u)\n", + sock->ops->sendpage ? "sendpage" : "writepage", + (unsigned long long ) conn->session->sid, conn->cid, + res, tio->pvec[idx]->index, offset, sendsize); + if (unlikely(res <= 0)) { + if (res == -EAGAIN || res == -EINTR) { + goto out; + } + goto err; + } + if (res == sendsize) { + idx++; + offset = 0; + } else + offset += res; + size -= res; + } + out: + conn->write_offset = (idx << PAGE_CACHE_SHIFT) + offset; + out_iov: + conn->write_size = size; + if (res == -EAGAIN) { + set_conn_wspace_wait(conn); + if (saved_size == size) + return res; + } + + return saved_size - size; + + err: + eprintk("error %d at %#Lx:%u\n", res, + (unsigned long long) conn->session->sid, conn->cid); + return res; +} + +static void exit_tx(struct iscsi_conn *conn, int res) +{ + if (res > 0) + return; + + switch (res) { + case -EAGAIN: + case -ERESTARTSYS: + break; + default: + eprintk("%d %d %d\n", conn->write_size, conn->write_state, res); + conn_close(conn); + break; + } +} + +static int tx_ddigest(struct iscsi_cmnd *cmnd, int state) +{ + int res, rest = cmnd->conn->write_size; + struct msghdr msg = {.msg_flags = MSG_NOSIGNAL | MSG_DONTWAIT}; + struct kvec iov; + + iov.iov_base = (char *) (&cmnd->ddigest) + (sizeof(u32) - rest); + iov.iov_len = rest; + + res = kernel_sendmsg(cmnd->conn->sock, &msg, &iov, 1, rest); + + if (res > 0) { + cmnd->conn->write_size -= res; + if (!cmnd->conn->write_size) + cmnd->conn->write_state = state; + } else + exit_tx(cmnd->conn, res); + + return res; +} + +static void init_tx_hdigest(struct iscsi_cmnd *cmnd) +{ + struct iscsi_conn *conn = cmnd->conn; + struct iovec *iop; + + if (conn->hdigest_type & DIGEST_NONE) + return; + + digest_tx_header(cmnd); + + for (iop = conn->write_iop; iop->iov_len; iop++) + ; + iop->iov_base = &(cmnd->hdigest); + iop->iov_len = sizeof(u32); + conn->write_size += sizeof(u32); + iop++; + iop->iov_len = 0; + + return; +} + +enum tx_state { + TX_INIT, /* Must be zero. */ + TX_BHS_DATA, + TX_INIT_DDIGEST, + TX_DDIGEST, + TX_END, +}; + +static int do_send(struct iscsi_conn *conn, int state) +{ + int res; + + res = write_data(conn); + + if (res > 0) { + if (!conn->write_size) + conn->write_state = state; + } else + exit_tx(conn, res); + + return res; +} + +static int send(struct iscsi_conn *conn) +{ + struct iscsi_cmnd *cmnd = conn->write_cmnd; + int ddigest, res = 0; + + ddigest = conn->ddigest_type != DIGEST_NONE ? 1 : 0; + + switch (conn->write_state) { + case TX_INIT: + assert(!cmnd); + cmnd = conn->write_cmnd = iscsi_get_send_cmnd(conn); + if (!cmnd) + return 0; + cmnd_tx_start(cmnd); + init_tx_hdigest(cmnd); + conn->write_state = TX_BHS_DATA; + case TX_BHS_DATA: + res = do_send(conn, ddigest && cmnd->pdu.datasize ? TX_INIT_DDIGEST : TX_END); + if (res <= 0 || conn->write_state != TX_INIT_DDIGEST) + break; + case TX_INIT_DDIGEST: + digest_tx_data(cmnd); + assert(!cmnd->conn->write_size); + cmnd->conn->write_size += sizeof(u32); + conn->write_state = TX_DDIGEST; + case TX_DDIGEST: + res = tx_ddigest(cmnd, TX_END); + break; + default: + eprintk("%d %d %x\n", res, conn->write_state, cmnd_opcode(cmnd)); + assert(0); + } + + if (res <= 0) + return res; + + if (conn->write_state != TX_END) + return res; + + if (conn->write_size) { + eprintk("%d %x %u\n", res, cmnd_opcode(cmnd), conn->write_size); + assert(!conn->write_size); + } + cmnd_tx_end(cmnd); + cmnd_release(cmnd, 0); + conn->write_cmnd = NULL; + conn->write_state = TX_INIT; + + return 0; +} + +static void process_io(struct iscsi_conn *conn) +{ + struct iscsi_target *target = conn->session->target; + int res, wakeup = 0; + + res = recv(conn); + + if (is_data_available(conn) > 0 || res > 0) + wakeup = 1; + + if (!test_bit(CONN_ACTIVE, &conn->state)) { + wakeup = 1; + goto out; + } + + if (test_bit(CONN_WSPACE_WAIT, &conn->state)) + goto out; + + res = send(conn); + + if (!list_empty(&conn->write_list) || conn->write_cmnd) + wakeup = 1; + +out: + if (wakeup) + nthread_wakeup(target); + + return; +} + +static void close_conn(struct iscsi_conn *conn) +{ + struct iscsi_session *session = conn->session; + struct iscsi_target *target = session->target; + struct iscsi_cmnd *cmnd; + + assert(conn); + + conn->sock->ops->shutdown(conn->sock, 2); + + write_lock_bh(&conn->sock->sk->sk_callback_lock); + conn->sock->sk->sk_state_change = target->nthread_info.old_state_change; + conn->sock->sk->sk_data_ready = target->nthread_info.old_data_ready; + conn->sock->sk->sk_write_space = target->nthread_info.old_write_space; + write_unlock_bh(&conn->sock->sk->sk_callback_lock); + + fput(conn->file); + conn->file = NULL; + conn->sock = NULL; + + while (atomic_read(&conn->nr_busy_cmnds)) + yield(); + + while (!list_empty(&conn->pdu_list)) { + cmnd = list_entry(conn->pdu_list.next, struct iscsi_cmnd, conn_list); + + list_del_init(&cmnd->list); + cmnd_release(cmnd, 1); + } + + if (atomic_read(&conn->nr_cmnds)) { + eprintk("%u\n", atomic_read(&conn->nr_cmnds)); + list_for_each_entry(cmnd, &conn->pdu_list, conn_list) + eprintk("%x %x\n", cmnd_opcode(cmnd), cmnd_itt(cmnd)); + assert(0); + } + + event_send(target->tid, session->sid, conn->cid, E_CONN_CLOSE, 0); + conn_free(conn); + + if (list_empty(&session->conn_list)) + session_del(target, session->sid); +} + +static int istd(void *arg) +{ + struct iscsi_target *target = arg; + struct network_thread_info *info = &target->nthread_info; + struct iscsi_conn *conn, *tmp; + + __set_current_state(TASK_RUNNING); + do { + spin_lock_bh(&info->nthread_lock); + __set_current_state(TASK_INTERRUPTIBLE); + + if (!test_bit(D_DATA_READY, &info->flags)) { + spin_unlock_bh(&info->nthread_lock); + schedule(); + spin_lock_bh(&info->nthread_lock); + } + __set_current_state(TASK_RUNNING); + clear_bit(D_DATA_READY, &info->flags); + spin_unlock_bh(&info->nthread_lock); + + target_lock(target, 0); + list_for_each_entry_safe(conn, tmp, &info->active_conns, poll_list) { + if (test_bit(CONN_ACTIVE, &conn->state)) + process_io(conn); + else + close_conn(conn); + } + target_unlock(target); + + } while (!kthread_should_stop()); + + return 0; +} + +int nthread_init(struct iscsi_target *target) +{ + struct network_thread_info *info = &target->nthread_info; + + info->flags = 0; + info->task = NULL; + + info->old_state_change = NULL; + info->old_data_ready = NULL; + info->old_write_space = NULL; + + INIT_LIST_HEAD(&info->active_conns); + + spin_lock_init(&info->nthread_lock); + + return 0; +} + +int nthread_start(struct iscsi_target *target) +{ + int err = 0; + struct network_thread_info *info = &target->nthread_info; + struct task_struct *task; + + if (info->task) { + eprintk("Target (%u) already runs\n", target->tid); + return -EALREADY; + } + + task = kthread_run(istd, target, "istd%d", target->tid); + + if (IS_ERR(task)) + err = PTR_ERR(task); + else + info->task = task; + + return err; +} + +int nthread_stop(struct iscsi_target *target) +{ + int err; + struct network_thread_info *info = &target->nthread_info; + + if (!info->task) + return -ESRCH; + + err = kthread_stop(info->task); + + if (err < 0 && err != -EINTR) + return err; + + info->task = NULL; + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/iscsitarget/include/iet_u.h +++ linux-fsl-imx51-2.6.31/ubuntu/iscsitarget/include/iet_u.h @@ -0,0 +1,139 @@ +#ifndef _IET_U_H +#define _IET_U_H + +#define IET_VERSION_STRING "0.4.17" + +/* The maximum length of 223 bytes in the RFC. */ +#define ISCSI_NAME_LEN 256 +#define ISCSI_ARGS_LEN 2048 + +#define ISCSI_LISTEN_PORT 3260 + +#define VENDOR_ID_LEN 8 +#define SCSI_ID_LEN 24 +#define SCSI_SN_LEN 16 + +#ifndef aligned_u64 +#define aligned_u64 unsigned long long __attribute__((aligned(8))) +#endif + +struct target_info { + u32 tid; + char name[ISCSI_NAME_LEN]; +}; + +struct volume_info { + u32 tid; + u32 lun; + aligned_u64 args_ptr; + u32 args_len; +}; + +struct session_info { + u32 tid; + + aligned_u64 sid; + char initiator_name[ISCSI_NAME_LEN]; + u32 exp_cmd_sn; + u32 max_cmd_sn; +}; + +#define DIGEST_ALL (DIGEST_NONE | DIGEST_CRC32C) +#define DIGEST_NONE (1 << 0) +#define DIGEST_CRC32C (1 << 1) + +struct conn_info { + u32 tid; + aligned_u64 sid; + + u32 cid; + u32 stat_sn; + u32 exp_stat_sn; + int header_digest; + int data_digest; + int fd; +}; + +enum { + key_initial_r2t, + key_immediate_data, + key_max_connections, + key_max_recv_data_length, + key_max_xmit_data_length, + key_max_burst_length, + key_first_burst_length, + key_default_wait_time, + key_default_retain_time, + key_max_outstanding_r2t, + key_data_pdu_inorder, + key_data_sequence_inorder, + key_error_recovery_level, + key_header_digest, + key_data_digest, + key_ofmarker, + key_ifmarker, + key_ofmarkint, + key_ifmarkint, + session_key_last, +}; + +enum { + key_wthreads, + key_target_type, + key_queued_cmnds, + target_key_last, +}; + +enum { + key_session, + key_target, +}; + +struct iscsi_param_info { + u32 tid; + aligned_u64 sid; + + u32 param_type; + u32 partial; + + u32 session_param[session_key_last]; + u32 target_param[target_key_last]; +}; + +enum iet_event_state { + E_CONN_CLOSE, +}; + +struct iet_event { + u32 tid; + aligned_u64 sid; + u32 cid; + u32 state; +}; + +#define DEFAULT_NR_WTHREADS 8 +#define MIN_NR_WTHREADS 1 +#define MAX_NR_WTHREADS 128 + +#define DEFAULT_NR_QUEUED_CMNDS 32 +#define MIN_NR_QUEUED_CMNDS 1 +#define MAX_NR_QUEUED_CMNDS 256 + +#define NETLINK_IET 21 + +#define ADD_TARGET _IOW('i', 0, struct target_info) +#define DEL_TARGET _IOW('i', 1, struct target_info) +#define START_TARGET _IO('i', 2) +#define STOP_TARGET _IO('i', 3) +#define ADD_VOLUME _IOW('i', 4, struct volume_info) +#define DEL_VOLUME _IOW('i', 5, struct volume_info) +#define ADD_SESSION _IOW('i', 6, struct session_info) +#define DEL_SESSION _IOW('i', 7, struct session_info) +#define GET_SESSION_INFO _IOWR('i', 8, struct session_info) +#define ADD_CONN _IOW('i', 9, struct conn_info) +#define DEL_CONN _IOW('i', 10, struct conn_info) +#define GET_CONN_INFO _IOWR('i', 11, struct conn_info) +#define ISCSI_PARAM_SET _IOW('i', 12, struct iscsi_param_info) +#define ISCSI_PARAM_GET _IOWR('i', 13, struct iscsi_param_info) + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/Kconfig @@ -0,0 +1,88 @@ +config LIRC_DEV + tristate "LIRC Device support" + default m + +config LIRC_ATIUSB + tristate "LIRC ATI RF Remote" + default m + depends on LIRC_DEV + +config LIRC_BT829 + tristate "LIRC BT829" + default m + depends on LIRC_DEV + +config LIRC_ENE0100 + tristate "LIRC ENE0100" + default m + depends on LIRC_DEV + +config LIRC_I2C + tristate "LIRC I2C interface remote" + default m + depends on LIRC_DEV + +config LIRC_IGORPLUGUSB + tristate "LIRC IGOR custom remote" + default m + depends on LIRC_DEV + +config LIRC_IMON + tristate "LIRC Imon remote or pad" + default m + depends on LIRC_DEV + +config LIRC_IT87 + tristate "LIRC IT87" + default m + depends on LIRC_DEV + +config LIRC_ITE8709 + tristate "LIRC ITE8709" + default m + depends on LIRC_DEV + +config LIRC_MCEUSB + tristate "LIRC Microsoft Media Center Remote" + default m + depends on LIRC_DEV + +config LIRC_PARALLEL + tristate "LIRC Parallel port custom remote" + default n + depends on LIRC_DEV + +config LIRC_SASEM + tristate "LIRC Sasem" + default m + depends on LIRC_DEV + +config LIRC_SERIAL + tristate "LIRC Serial port remote" + default m + depends on LIRC_DEV + +config LIRC_SIR + tristate "LIRC Laptop port IR (SIR))" + default m + depends on LIRC_DEV + +config LIRC_STREAMZAP + tristate "LIRC Streamzap remote" + default m + depends on LIRC_DEV + +config LIRC_TTUSBIR + tristate "LIRC TT USB IR device" + default m + depends on LIRC_DEV + +config LIRC_CONFIG_LIRC_WPC8769L + tristate "LIRC WPC8769L device" + default m + depends on LIRC_DEV + +config LIRC_GPIO + tristate "LIRC TV Card GPIO remote" + default n + depends on LIRC_DEV --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/Makefile @@ -0,0 +1,23 @@ +#include $(src)/../../.config + +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src) + +obj-$(CONFIG_LIRC_DEV) += lirc_dev/ +obj-$(CONFIG_LIRC_ATIUSB) += lirc_atiusb/ +obj-$(CONFIG_LIRC_BT829) += lirc_bt829/ +obj-$(CONFIG_LIRC_ENE0100) += lirc_ene0100/ +obj-$(CONFIG_LIRC_I2C) += lirc_i2c/ +obj-$(CONFIG_LIRC_IGORPLUGUSB) += lirc_igorplugusb/ +obj-$(CONFIG_LIRC_IMON) += lirc_imon/ +obj-$(CONFIG_LIRC_IT87) += lirc_it87/ +obj-$(CONFIG_LIRC_ITE8709) += lirc_ite8709/ +obj-$(CONFIG_LIRC_MCEUSB) += lirc_mceusb/ +obj-$(CONFIG_LIRC_PARALLEL) += lirc_parallel/ +obj-$(CONFIG_LIRC_SASEM) += lirc_sasem/ +obj-$(CONFIG_LIRC_SERIAL) += lirc_serial/ +obj-$(CONFIG_LIRC_SIR) += lirc_sir/ +obj-$(CONFIG_LIRC_STREAMZAP) += lirc_streamzap/ +obj-$(CONFIG_LIRC_TTUSBIR) += lirc_ttusbir/ +obj-$(CONFIG_LIRC_GPIO) += lirc_gpio/ +obj-$(CONFIG_LIRC_TTUSBIR) += lirc_ttusbir/ +obj-$(CONFIG_LIRC_WPC8769L) += lirc_wpc8769l/ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/kcompat.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/kcompat.h @@ -0,0 +1,402 @@ +/* $Id: kcompat.h,v 5.44 2009/03/22 08:45:47 lirc Exp $ */ + +#ifndef _KCOMPAT_H +#define _KCOMPAT_H + +#include + +#ifndef __func__ +#define __func__ __FUNCTION__ +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) +#define LIRC_THIS_MODULE(x) x, +#else /* >= 2.6.16 */ +#define LIRC_THIS_MODULE(x) +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) + +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#define LIRC_HAVE_DEVFS +#define LIRC_HAVE_DEVFS_26 +#endif + +#define LIRC_HAVE_SYSFS + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 13) + +typedef struct class_simple lirc_class_t; + +static inline lirc_class_t *class_create(struct module *owner, char *name) +{ + return class_simple_create(owner, name); +} + +static inline void class_destroy(lirc_class_t *cls) +{ + class_simple_destroy(cls); +} + +#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \ + class_simple_device_add(cs, dev, parent, fmt, ## args) + +static inline void lirc_device_destroy(lirc_class_t *cls, dev_t devt) +{ + class_simple_device_remove(devt); +} + +#else /* >= 2.6.13 */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) + +#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \ + class_device_create(cs, dev, parent, fmt, ## args) + +#else /* >= 2.6.15 */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26) + +#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \ + class_device_create(cs, NULL, dev, parent, fmt, ## args) + +#else /* >= 2.6.26 */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) + +#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \ + device_create(cs, parent, dev, fmt, ## args) + +#else /* >= 2.6.27 */ + +#define lirc_device_create device_create + +#endif /* >= 2.6.27 */ + +#endif /* >= 2.6.26 */ + +#define LIRC_DEVFS_PREFIX + +#endif /* >= 2.6.15 */ + +typedef struct class lirc_class_t; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26) + +#define lirc_device_destroy class_device_destroy + +#else + +#define lirc_device_destroy device_destroy + +#endif + +#endif /* >= 2.6.13 */ + +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) +#define LIRC_HAVE_DEVFS +#define LIRC_HAVE_DEVFS_24 +#endif + +#ifndef LIRC_DEVFS_PREFIX +#define LIRC_DEVFS_PREFIX "usb/" +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 0) +#include +#include +static inline void del_timer_sync(struct timer_list *timerlist) +{ + start_bh_atomic(); + del_timer(timerlist); + end_bh_atomic(); +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) +#ifdef daemonize +#undef daemonize +#endif +#define daemonize(name) do { \ + \ + lock_kernel(); \ + \ + exit_mm(current); \ + exit_files(current); \ + exit_fs(current); \ + current->session = 1; \ + current->pgrp = 1; \ + current->euid = 0; \ + current->tty = NULL; \ + sigfillset(¤t->blocked); \ + \ + strcpy(current->comm, name); \ + \ + unlock_kernel(); \ + \ +} while (0) + +/* Not sure when this was introduced, sometime during 2.5.X */ +#define MODULE_PARM_int(x) MODULE_PARM(x, "i") +#define MODULE_PARM_bool(x) MODULE_PARM(x, "i") +#define MODULE_PARM_long(x) MODULE_PARM(x, "l") +#define module_param(x, y, z) MODULE_PARM_##y(x) +#else +#include +#endif /* Linux < 2.6.0 */ + +/* DevFS header */ +#if defined(LIRC_HAVE_DEVFS) +#include +#endif + +#ifdef LIRC_HAVE_DEVFS_24 +#ifdef register_chrdev +#undef register_chrdev +#endif +#define register_chrdev devfs_register_chrdev +#ifdef unregister_chrdev +#undef unregister_chrdev +#endif +#define unregister_chrdev devfs_unregister_chrdev +#endif /* DEVFS 2.4 */ + +#ifndef LIRC_HAVE_SYSFS +#define class_destroy(x) do { } while (0) +#define class_create(x, y) NULL +#define lirc_device_destroy(x, y) do { } while (0) +#define lirc_device_create(x, y, z, xx, yy, zz) 0 +#define IS_ERR(x) 0 +typedef struct class_simple +{ + int notused; +} lirc_class_t; +#endif /* No SYSFS */ + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 0) +#define KERNEL_2_5 + +/* + * We still are using MOD_INC_USE_COUNT/MOD_DEC_USE_COUNT in the set_use_inc + * function of all modules for 2.4 kernel compatibility. + * + * For 2.6 kernels reference counting is done in lirc_dev by + * try_module_get()/module_put() because the old approach is racy. + * + */ +#ifdef MOD_INC_USE_COUNT +#undef MOD_INC_USE_COUNT +#endif +#define MOD_INC_USE_COUNT + +#ifdef MOD_DEC_USE_COUNT +#undef MOD_DEC_USE_COUNT +#endif +#define MOD_DEC_USE_COUNT + +#ifdef EXPORT_NO_SYMBOLS +#undef EXPORT_NO_SYMBOLS +#endif +#define EXPORT_NO_SYMBOLS + +#else /* Kernel < 2.5.0 */ + +static inline int try_module_get(struct module *module) +{ + return 1; +} + +static inline void module_put(struct module *module) +{ +} + +#endif /* Kernel >= 2.5.0 */ + +#ifndef MODULE_LICENSE +#define MODULE_LICENSE(x) +#endif + +#ifndef MODULE_PARM_DESC +#define MODULE_PARM_DESC(x, y) +#endif + +#ifndef MODULE_ALIAS_CHARDEV_MAJOR +#define MODULE_ALIAS_CHARDEV_MAJOR(x) +#endif + +#ifndef MODULE_DEVICE_TABLE +#define MODULE_DEVICE_TABLE(x, y) +#endif + +#include +#ifndef IRQ_RETVAL +typedef void irqreturn_t; +#define IRQ_NONE +#define IRQ_HANDLED +#define IRQ_RETVAL(x) +#endif + +#ifndef MOD_IN_USE +#ifdef CONFIG_MODULE_UNLOAD +#define MOD_IN_USE module_refcount(THIS_MODULE) +#else +#error "LIRC modules currently require" +#error " 'Loadable module support ---> Module unloading'" +#error "to be enabled in the kernel" +#endif +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#if !defined(local_irq_save) +#define local_irq_save(flags) do { save_flags(flags); cli(); } while (0) +#endif +#if !defined(local_irq_restore) +#define local_irq_restore(flags) do { restore_flags(flags); } while (0) +#endif +#endif + +#if KERNEL_VERSION(2, 4, 0) <= LINUX_VERSION_CODE +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 22) +#include +static inline char *pci_name(struct pci_dev *pdev) +{ + return pdev->slot_name; +} +#endif /* kernel < 2.4.22 */ +#endif /* kernel >= 2.4.0 */ + +/*************************** I2C specific *****************************/ +#include + +#ifndef I2C_CLIENT_END +#error "********************************************************" +#error " Sorry, this driver needs the new I2C stack. " +#error " You can get it at http://www2.lm-sensors.nu/~lm78/. " +#error "********************************************************" +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0) + +#undef i2c_get_clientdata +#define i2c_get_clientdata(client) ((client)->data) + + +#undef i2c_set_clientdata +#define i2c_set_clientdata(client_ptr, new_data) do { \ + (client_ptr)->data = new_data; \ +} while (0) + + +#endif + +/* removed in 2.6.14 */ +#ifndef I2C_ALGO_BIT +# define I2C_ALGO_BIT 0 +#endif + +/* removed in 2.6.16 */ +#ifndef I2C_DRIVERID_EXP3 +# define I2C_DRIVERID_EXP3 0xf003 +#endif + +/*************************** USB specific *****************************/ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 8) +static inline int usb_kill_urb(struct urb *urb) +{ + return usb_unlink_urb(urb); +} +#endif + +/* removed in 2.6.14 */ +#ifndef URB_ASYNC_UNLINK +#define URB_ASYNC_UNLINK 0 +#endif +#endif + +/*************************** bttv specific ****************************/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) /* BTTV_* -> BTTV_BOARD_* */ +#define BTTV_BOARD_UNKNOWN BTTV_UNKNOWN +#define BTTV_BOARD_PXELVWPLTVPAK BTTV_PXELVWPLTVPAK +#define BTTV_BOARD_PXELVWPLTVPRO BTTV_PXELVWPLTVPRO +#define BTTV_BOARD_PV_BT878P_9B BTTV_PV_BT878P_9B +#define BTTV_BOARD_PV_BT878P_PLUS BTTV_PV_BT878P_PLUS +#define BTTV_BOARD_AVERMEDIA BTTV_AVERMEDIA +#define BTTV_BOARD_AVPHONE98 BTTV_AVPHONE98 +#define BTTV_BOARD_AVERMEDIA98 BTTV_AVERMEDIA98 +#define BTTV_BOARD_CHRONOS_VS2 BTTV_CHRONOS_VS2 +#define BTTV_BOARD_MIRO BTTV_MIRO +#define BTTV_BOARD_DYNALINK BTTV_DYNALINK +#define BTTV_BOARD_WINVIEW_601 BTTV_WINVIEW_601 +#ifdef BTTV_KWORLD +#define BTTV_BOARD_KWORLD BTTV_KWORLD +#endif +#define BTTV_BOARD_MAGICTVIEW061 BTTV_MAGICTVIEW061 +#define BTTV_BOARD_MAGICTVIEW063 BTTV_MAGICTVIEW063 +#define BTTV_BOARD_PHOEBE_TVMAS BTTV_PHOEBE_TVMAS +#ifdef BTTV_BESTBUY_EASYTV2 +#define BTTV_BOARD_BESTBUY_EASYTV BTTV_BESTBUY_EASYTV +#define BTTV_BOARD_BESTBUY_EASYTV2 BTTV_BESTBUY_EASYTV2 +#endif +#define BTTV_BOARD_FLYVIDEO BTTV_FLYVIDEO +#define BTTV_BOARD_FLYVIDEO_98 BTTV_FLYVIDEO_98 +#define BTTV_BOARD_TYPHOON_TVIEW BTTV_TYPHOON_TVIEW +#ifdef BTTV_FLYVIDEO_98FM +#define BTTV_BOARD_FLYVIDEO_98FM BTTV_FLYVIDEO_98FM +#endif +#define BTTV_BOARD_WINFAST2000 BTTV_WINFAST2000 +#ifdef BTTV_GVBCTV5PCI +#define BTTV_BOARD_GVBCTV5PCI BTTV_GVBCTV5PCI +#endif +#endif /* end BTTV_* -> BTTV_BOARD_* */ + + +/******************************* pm.h *********************************/ + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11) +typedef u32 pm_message_t; +#endif /* kernel < 2.6.11 */ +#endif /* kernel >= 2.6.0 */ + +/*************************** interrupt.h ******************************/ +/* added in 2.6.18, old defines removed in 2.6.24 */ +#ifndef IRQF_DISABLED +#define IRQF_DISABLED SA_INTERRUPT +#endif +#ifndef IRQF_SHARED +#define IRQF_SHARED SA_SHIRQ +#endif + +/*************************** spinlock.h *******************************/ +/* added in 2.6.11 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11) +#define DEFINE_SPINLOCK(x) spinlock_t x = SPIN_LOCK_UNLOCKED +#endif + +/***************************** slab.h *********************************/ +/* added in 2.6.14 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 14) +static inline void *kzalloc(size_t size, gfp_t flags) +{ + void *ret = kmalloc(size, flags); + if (ret) + memset(ret, 0, size); + return ret; +} +#endif + +/****************************** fs.h **********************************/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) +static inline unsigned iminor(struct inode *inode) +{ + return MINOR(inode->i_rdev); +} +#endif + +#endif /* _KCOMPAT_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc.h @@ -0,0 +1,105 @@ +/* $Id: lirc.h,v 5.19 2009/08/29 07:52:41 lirc Exp $ */ + +#ifndef _LINUX_LIRC_H +#define _LINUX_LIRC_H + +#if defined(__linux__) +#include +#elif defined(_NetBSD_) +#include +#elif defined(_CYGWIN_) +#define __USE_LINUX_IOCTL_DEFS +#include +#endif + +#define PULSE_BIT 0x01000000 +#define PULSE_MASK 0x00FFFFFF + +typedef int lirc_t; + +/*** lirc compatible hardware features ***/ + +#define LIRC_MODE2SEND(x) (x) +#define LIRC_SEND2MODE(x) (x) +#define LIRC_MODE2REC(x) ((x) << 16) +#define LIRC_REC2MODE(x) ((x) >> 16) + +#define LIRC_MODE_RAW 0x00000001 +#define LIRC_MODE_PULSE 0x00000002 +#define LIRC_MODE_MODE2 0x00000004 +#define LIRC_MODE_CODE 0x00000008 +#define LIRC_MODE_LIRCCODE 0x00000010 +#define LIRC_MODE_STRING 0x00000020 + + +#define LIRC_CAN_SEND_RAW LIRC_MODE2SEND(LIRC_MODE_RAW) +#define LIRC_CAN_SEND_PULSE LIRC_MODE2SEND(LIRC_MODE_PULSE) +#define LIRC_CAN_SEND_MODE2 LIRC_MODE2SEND(LIRC_MODE_MODE2) +#define LIRC_CAN_SEND_CODE LIRC_MODE2SEND(LIRC_MODE_CODE) +#define LIRC_CAN_SEND_LIRCCODE LIRC_MODE2SEND(LIRC_MODE_LIRCCODE) +#define LIRC_CAN_SEND_STRING LIRC_MODE2SEND(LIRC_MODE_STRING) + +#define LIRC_CAN_SEND_MASK 0x0000003f + +#define LIRC_CAN_SET_SEND_CARRIER 0x00000100 +#define LIRC_CAN_SET_SEND_DUTY_CYCLE 0x00000200 +#define LIRC_CAN_SET_TRANSMITTER_MASK 0x00000400 + +#define LIRC_CAN_REC_RAW LIRC_MODE2REC(LIRC_MODE_RAW) +#define LIRC_CAN_REC_PULSE LIRC_MODE2REC(LIRC_MODE_PULSE) +#define LIRC_CAN_REC_MODE2 LIRC_MODE2REC(LIRC_MODE_MODE2) +#define LIRC_CAN_REC_CODE LIRC_MODE2REC(LIRC_MODE_CODE) +#define LIRC_CAN_REC_LIRCCODE LIRC_MODE2REC(LIRC_MODE_LIRCCODE) +#define LIRC_CAN_REC_STRING LIRC_MODE2REC(LIRC_MODE_STRING) + +#define LIRC_CAN_REC_MASK LIRC_MODE2REC(LIRC_CAN_SEND_MASK) + +#define LIRC_CAN_SET_REC_CARRIER (LIRC_CAN_SET_SEND_CARRIER << 16) +#define LIRC_CAN_SET_REC_DUTY_CYCLE (LIRC_CAN_SET_SEND_DUTY_CYCLE << 16) + +#define LIRC_CAN_SET_REC_DUTY_CYCLE_RANGE 0x40000000 +#define LIRC_CAN_SET_REC_CARRIER_RANGE 0x80000000 +#define LIRC_CAN_GET_REC_RESOLUTION 0x20000000 + +#define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK) +#define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK) + +#define LIRC_CAN_NOTIFY_DECODE 0x01000000 + +/*** IOCTL commands for lirc driver ***/ + +#define LIRC_GET_FEATURES _IOR('i', 0x00000000, unsigned long) + +#define LIRC_GET_SEND_MODE _IOR('i', 0x00000001, unsigned long) +#define LIRC_GET_REC_MODE _IOR('i', 0x00000002, unsigned long) +#define LIRC_GET_SEND_CARRIER _IOR('i', 0x00000003, unsigned int) +#define LIRC_GET_REC_CARRIER _IOR('i', 0x00000004, unsigned int) +#define LIRC_GET_SEND_DUTY_CYCLE _IOR('i', 0x00000005, unsigned int) +#define LIRC_GET_REC_DUTY_CYCLE _IOR('i', 0x00000006, unsigned int) +#define LIRC_GET_REC_RESOLUTION _IOR('i', 0x00000007, unsigned int) + +/* code length in bits, currently only for LIRC_MODE_LIRCCODE */ +#define LIRC_GET_LENGTH _IOR('i', 0x0000000f, unsigned long) + +#define LIRC_SET_SEND_MODE _IOW('i', 0x00000011, unsigned long) +#define LIRC_SET_REC_MODE _IOW('i', 0x00000012, unsigned long) +/* Note: these can reset the according pulse_width */ +#define LIRC_SET_SEND_CARRIER _IOW('i', 0x00000013, unsigned int) +#define LIRC_SET_REC_CARRIER _IOW('i', 0x00000014, unsigned int) +#define LIRC_SET_SEND_DUTY_CYCLE _IOW('i', 0x00000015, unsigned int) +#define LIRC_SET_REC_DUTY_CYCLE _IOW('i', 0x00000016, unsigned int) +#define LIRC_SET_TRANSMITTER_MASK _IOW('i', 0x00000017, unsigned int) + +/* + * to set a range use + * LIRC_SET_REC_DUTY_CYCLE_RANGE/LIRC_SET_REC_CARRIER_RANGE with the + * lower bound first and later + * LIRC_SET_REC_DUTY_CYCLE/LIRC_SET_REC_CARRIER with the upper bound + */ + +#define LIRC_SET_REC_DUTY_CYCLE_RANGE _IOW('i', 0x0000001e, unsigned int) +#define LIRC_SET_REC_CARRIER_RANGE _IOW('i', 0x0000001f, unsigned int) + +#define LIRC_NOTIFY_DECODE _IO('i', 0x00000020) + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_gpio/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_gpio/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_GPIO) += lirc_gpio.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_gpio/lirc_gpio.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_gpio/lirc_gpio.c @@ -0,0 +1,613 @@ +/* + * Remote control driver for the TV-card + * key codes are obtained from GPIO port + * + * (L) by Artur Lipowski + * patch for the AverMedia by Santiago Garcia Mantinan + * and Christoph Bartelmus + * patch for the BestBuy by Miguel Angel Alvarez + * patch for the Winfast TV2000 by Juan Toledo + * + * patch for the I-O Data GV-BCTV5/PCI by Jens C. Rasmussen + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * $Id: lirc_gpio.c,v 1.57 2009/02/14 19:35:52 lirc Exp $ + * + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 4) +#error "*******************************************************" +#error "Sorry, this driver needs kernel version 2.2.4 or higher" +#error "*******************************************************" +#endif + +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) +#include +#endif +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0) +#include "../drivers/char/bttv.h" +#include "../drivers/char/bttvp.h" +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 17) +#include "../drivers/media/video/bttv.h" +#include "../drivers/media/video/bttvp.h" +#else +#include "../drivers/media/video/bt8xx/bttv.h" +#include "../drivers/media/video/bt8xx/bttvp.h" +#endif + +#if BTTV_VERSION_CODE < KERNEL_VERSION(0, 7, 45) +#error "*******************************************************" +#error " Sorry, this driver needs bttv version 0.7.45 or " +#error " higher. If you are using the bttv package, copy it to " +#error " the kernel " +#error "*******************************************************" +#endif + +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +/* insmod parameters */ +static int debug; +static int card; +static int minor = -1; +static int bttv_id = BTTV_BOARD_UNKNOWN; +static unsigned long gpio_mask; +static unsigned long gpio_enable; +static unsigned long gpio_lock_mask; +static unsigned long gpio_xor_mask; +static int soft_gap; +static int sample_rate = 10; + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG fmt, ## args); \ + } while (0) + +struct rcv_info { + int bttv_id; + int card_id; + unsigned long gpio_mask; + unsigned long gpio_enable; + unsigned long gpio_lock_mask; + unsigned long gpio_xor_mask; + int soft_gap; + int sample_rate; + unsigned char code_length; +}; + +static struct rcv_info rcv_infos[] = { + {BTTV_BOARD_UNKNOWN, + 0, 0, 0, 0, 0, 0, 1, 0}, + {BTTV_BOARD_PXELVWPLTVPAK, + 0, 0x00003e00, 0, 0x0010000, 0, 0, 15, 32}, + {BTTV_BOARD_PXELVWPLTVPRO, + 0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32}, + {BTTV_BOARD_PV_BT878P_9B, + 0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32}, + {BTTV_BOARD_PV_BT878P_PLUS, + 0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32}, +#ifdef BTTV_BOARD_PV_M4900 + {BTTV_BOARD_PV_M4900, + 0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32}, +#endif + {BTTV_BOARD_AVERMEDIA, + 0, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32}, + + /* mapped to Capture98 */ + {BTTV_BOARD_AVPHONE98, + 0x00011461, 0x003b8000, 0x00004000, + 0x0800000, 0x00800000, 0, 10, 0}, + {BTTV_BOARD_AVERMEDIA98, + 0x00021461, 0x003b8000, 0x00004000, + 0x0800000, 0x00800000, 0, 10, 0}, + + /* mapped to Phone98 */ + {BTTV_BOARD_AVPHONE98, + 0x00031461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32}, + /* is this one correct? */ + {BTTV_BOARD_AVERMEDIA98, + 0x00041461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32}, + /* work-around for VDOMATE */ + {BTTV_BOARD_AVERMEDIA98, + 0x03001461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32}, + /* reported by Danijel Korzinek, AVerTV GOw/FM */ + {BTTV_BOARD_AVERMEDIA98, + 0x00000000, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32}, + + {BTTV_BOARD_CHRONOS_VS2, + 0, 0x000000f8, 0, 0x0000100, 0, 0, 20, 0}, + /* CPH031 and CPH033 cards (?) */ + /* MIRO was just a work-around */ + {BTTV_BOARD_MIRO, + 0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32}, + {BTTV_BOARD_DYNALINK, + 0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32}, +#ifdef BTTV_BOARD_ASKEY_CPH03X + {BTTV_BOARD_ASKEY_CPH03X, + 0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32}, +#endif + {BTTV_BOARD_WINVIEW_601, + 0, 0x00001f00, 0, 0x0004000, 0, 0, 0, 32}, +#ifdef BTTV_BOARD_KWORLD + {BTTV_BOARD_KWORLD, + 0, 0x00007f00, 0, 0x0004000, 0, 0, 12, 32}, +#endif + /* just a guess */ + {BTTV_BOARD_MAGICTVIEW061, + 0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32}, + {BTTV_BOARD_MAGICTVIEW063, + 0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32}, + {BTTV_BOARD_PHOEBE_TVMAS, + 0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32}, +#ifdef BTTV_BOARD_BESTBUY_EASYTV2 + {BTTV_BOARD_BESTBUY_EASYTV, + 0, 0x00007F00, 0, 0x0004000, 0, 0, 10, 8}, + {BTTV_BOARD_BESTBUY_EASYTV2, + 0, 0x00007F00, 0, 0x0008000, 0, 0, 10, 8}, +#endif + /* lock_mask probably also 0x100, or maybe it is 0x0 for all others? */ + {BTTV_BOARD_FLYVIDEO, + 0, 0x000000f8, 0, 0, 0, 0, 0, 42}, + {BTTV_BOARD_FLYVIDEO_98, + 0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 42}, + {BTTV_BOARD_TYPHOON_TVIEW, + 0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 42}, +#ifdef BTTV_BOARD_FLYVIDEO_98FM + /* smorar@alfonzo.smuts.uct.ac.za */ + {BTTV_BOARD_FLYVIDEO_98FM, + 0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 42}, +#endif + /* The Leadtek WinFast TV 2000 XP card (id 0x6606107d) uses an + * extra gpio bit compared to the original TV 2000 card (id + * 0x217d6606); as the bttv-0.7.100 driver does not + * distinguish between the two cards, we enable the extra bit + * based on the card id: */ + {BTTV_BOARD_WINFAST2000, + 0x6606107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32}, + {BTTV_BOARD_WINFAST2000, + 0x6609107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32}, + {BTTV_BOARD_WINFAST2000, + 0xff06107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32}, + /* default: */ + {BTTV_BOARD_WINFAST2000, + 0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 32}, +#ifdef BTTV_BOARD_GVBCTV5PCI + {BTTV_BOARD_GVBCTV5PCI, + 0, 0x00f0b000, 0, 0, 0, 0, 20, 8}, +#endif +}; + +static unsigned char code_length; +static unsigned char code_bytes = 1; + +#define MAX_BYTES 8 + +#define LOGHEAD "lirc_gpio (%d): " + +/* how many bits GPIO value can be shifted right before processing + * it is computed from the value of gpio_mask_parameter + */ +static unsigned char gpio_pre_shift; + +static int reverse(int data, int bits) +{ + int i; + int c; + + for (c = 0, i = 0; i < bits; i++) + c |= (((data & (1<>= gpio_pre_shift; + while (mask) { + if (mask & 1u) + codes[0] |= (gpio_val & 1u) << shift++; + mask >>= 1; + gpio_val >>= 1; + } + + dprintk(LOGHEAD "code is %lx\n", card, (unsigned long) codes[0]); + switch (bttv_id) { + case BTTV_BOARD_AVERMEDIA: + codes[2] = (codes[0]<<2)&0xff; + codes[3] = (~codes[2])&0xff; + codes[0] = 0x02; + codes[1] = 0xFD; + break; + case BTTV_BOARD_AVPHONE98: + codes[2] = ((codes[0]&(~0x1))<<2)&0xff; + codes[3] = (~codes[2])&0xff; + if (codes[0]&0x1) { + codes[0] = 0xc0; + codes[1] = 0x3f; + } else { + codes[0] = 0x40; + codes[1] = 0xbf; + } + break; + case BTTV_BOARD_AVERMEDIA98: + break; + case BTTV_BOARD_FLYVIDEO: + case BTTV_BOARD_FLYVIDEO_98: + case BTTV_BOARD_TYPHOON_TVIEW: +#ifdef BTTV_BOARD_FLYVIDEO_98FM + case BTTV_BOARD_FLYVIDEO_98FM: +#endif + codes[4] = codes[0]<<3; + codes[5] = ((~codes[4])&0xff); + + codes[0] = 0x00; + codes[1] = 0x1A; + codes[2] = 0x1F; + codes[3] = 0x2F; + break; + case BTTV_BOARD_MAGICTVIEW061: + case BTTV_BOARD_MAGICTVIEW063: + case BTTV_BOARD_PHOEBE_TVMAS: + codes[0] = (codes[0]&0x01) + | ((codes[0]&0x02)<<1) + | ((codes[0]&0x04)<<2) + | ((codes[0]&0x08)>>2) + | ((codes[0]&0x10)>>1); + /* FALLTHROUGH */ + case BTTV_BOARD_MIRO: + case BTTV_BOARD_DYNALINK: +#ifdef BTTV_BOARD_ASKEY_CPH03X + case BTTV_BOARD_ASKEY_CPH03X: +#endif + case BTTV_BOARD_PXELVWPLTVPAK: + case BTTV_BOARD_PXELVWPLTVPRO: + case BTTV_BOARD_PV_BT878P_9B: + case BTTV_BOARD_PV_BT878P_PLUS: +#ifdef BTTV_BOARD_PV_M4900 + case BTTV_BOARD_PV_M4900: +#endif +#ifdef BTTV_BOARD_KWORLD + case BTTV_BOARD_KWORLD: +#endif + codes[2] = reverse(codes[0], 8); + codes[3] = (~codes[2])&0xff; + codes[0] = 0x61; + codes[1] = 0xD6; + break; +#if 0 + /* derived from e-tech config file */ + /* 26 + 16 bits */ + /* won't apply it until it's confirmed with a fly98 */ + case BTTV_BOARD_FLYVIDEO_98: + case BTTV_BOARD_FLYVIDEO_98FM: + codes[4] = codes[0]<<3; + codes[5] = (~codes[4])&0xff; + + codes[0] = 0x00; + codes[1] = 0x1A; + codes[2] = 0x1F; + codes[3] = 0x2F; + break; +#endif + case BTTV_BOARD_WINFAST2000: + /* shift extra bit */ + codes[0] = (codes[0]&0x1f) | ((codes[0]&0x20) << 1); + case BTTV_BOARD_WINVIEW_601: + codes[2] = reverse(codes[0], 8); + codes[3] = (~codes[2])&0xff; + codes[0] = 0xC0; + codes[1] = 0x3F; + break; + default: + break; + } + + return 0; +} + +/* add_to_buf - copy a code to the buffer */ +static int add_to_buf(void *data, struct lirc_buffer *buf) +{ + static unsigned long next_time; + static unsigned char prev_codes[MAX_BYTES]; + unsigned long code = 0; + unsigned char cur_codes[MAX_BYTES]; + + if (bttv_read_gpio(card, &code)) { + dprintk(LOGHEAD "cannot read GPIO\n", card); + return -EIO; + } + + if (build_key(code, cur_codes)) + return -EFAULT; + + if (soft_gap) { + if (!memcmp(prev_codes, cur_codes, code_bytes) && + jiffies < next_time) + return -EAGAIN; + + next_time = jiffies + soft_gap; + } + memcpy(prev_codes, cur_codes, code_bytes); + + lirc_buffer_write(buf, cur_codes); + + return 0; +} + +static int set_use_inc(void *data) +{ + MOD_INC_USE_COUNT; + return 0; +} + +static void set_use_dec(void *data) +{ + MOD_DEC_USE_COUNT; +} + +static wait_queue_head_t *get_queue(void *data) +{ + return bttv_get_gpio_queue(card); +} + +static struct lirc_driver driver = { + .name = "lirc_gpio ", + .add_to_buf = add_to_buf, + .get_queue = get_queue, + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .dev = NULL, + .owner = THIS_MODULE, +}; + +/* + * + */ +static int gpio_remote_init(void) +{ + int ret; + unsigned int mask; + + /* "normalize" gpio_mask + * this means shift it right until first bit is set + */ + while (!(gpio_mask & 1u)) { + gpio_pre_shift++; + gpio_mask >>= 1; + } + + if (code_length) + driver.code_length = code_length; + else { + /* calculate scan code length in bits if needed */ + driver.code_length = 1; + mask = gpio_mask >> 1; + while (mask) { + if (mask & 1u) + driver.code_length++; + mask >>= 1; + } + } + + code_bytes = (driver.code_length/8) + (driver.code_length % 8 ? 1 : 0); + if (MAX_BYTES < code_bytes) { + printk(LOGHEAD "scan code too long (%d bytes)\n", + minor, code_bytes); + return -EBADRQC; + } + + if (gpio_enable) { + if (bttv_gpio_enable(card, gpio_enable, gpio_enable)) { + printk(LOGHEAD "gpio_enable failure\n", minor); + return -EIO; + } + } + + + /* translate ms to jiffies */ + soft_gap = (soft_gap*HZ) / 1000; + + driver.minor = minor; + driver.sample_rate = sample_rate; + + ret = lirc_register_driver(&driver); + + if (0 > ret) { + printk(LOGHEAD "device registration failed with %d\n", + minor, ret); + return ret; + } + + minor = ret; + printk(LOGHEAD "driver registered\n", minor); + + return 0; +} + +#ifdef MODULE +/* + * + */ +int init_module(void) +{ + int type, cardid, card_type; + + if (MAX_IRCTL_DEVICES < minor) { + printk(KERN_INFO "lirc_gpio: parameter minor (%d) " + "must be less than %d!\n", + minor, MAX_IRCTL_DEVICES - 1); + return -EBADRQC; + } + + /* if gpio_mask not zero then use module parameters + * instead of autodetecting TV card + */ + if (gpio_mask) { + if (sample_rate != 0 && + (2 > sample_rate || HZ < sample_rate)) { + printk(LOGHEAD "parameter sample_rate " + "must be between 2 and %d!\n", minor, HZ); + return -EBADRQC; + } + + if (sample_rate != 0 && soft_gap && + ((2000/sample_rate) > soft_gap || 1000 < soft_gap)) { + printk(LOGHEAD "parameter soft_gap " + "must be between %d and 1000!\n", + minor, 2000/sample_rate); + return -EBADRQC; + } + } else { + if (bttv_get_cardinfo(card, &type, &cardid) == -1) { + printk(LOGHEAD "could not get card type\n", minor); + return -EBADRQC; + } + printk(LOGHEAD "card type 0x%x, id 0x%x\n", minor, + type, cardid); + + if (type == BTTV_BOARD_UNKNOWN) { + printk(LOGHEAD "cannot detect TV card nr %d!\n", + minor, card); + return -EBADRQC; + } + for (card_type = 1; + card_type < sizeof(rcv_infos)/sizeof(struct rcv_info); + card_type++) { + if (rcv_infos[card_type].bttv_id == type && + (rcv_infos[card_type].card_id == 0 || + rcv_infos[card_type].card_id == cardid)) { + bttv_id = rcv_infos[card_type].bttv_id; + gpio_mask = rcv_infos[card_type].gpio_mask; + gpio_enable = rcv_infos[card_type].gpio_enable; + gpio_lock_mask = + rcv_infos[card_type].gpio_lock_mask; + gpio_xor_mask = + rcv_infos[card_type].gpio_xor_mask; + soft_gap = rcv_infos[card_type].soft_gap; + sample_rate = rcv_infos[card_type].sample_rate; + code_length = rcv_infos[card_type].code_length; + break; + } + } + if (type == BTTV_BOARD_AVPHONE98 && cardid == 0x00011461) + bttv_id = BTTV_BOARD_AVERMEDIA98; + + if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x00041461) + bttv_id = BTTV_BOARD_AVPHONE98; + + if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x03001461) + bttv_id = BTTV_BOARD_AVPHONE98; + + if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x00000000) + bttv_id = BTTV_BOARD_AVPHONE98; + + if (card_type == sizeof(rcv_infos)/sizeof(struct rcv_info)) { + printk(LOGHEAD "TV card type 0x%x not supported!\n", + minor, type); + return -EBADRQC; + } + } + + return gpio_remote_init(); +} + +/* + * + */ +void cleanup_module(void) +{ + lirc_unregister_driver(minor); + + dprintk(LOGHEAD "module successfully unloaded\n", minor); +} + +/* Dont try to use it as a static version ! */ +MODULE_DESCRIPTION("Driver module for remote control (data " + "from bt848 GPIO port)"); +MODULE_AUTHOR("Artur Lipowski"); +MODULE_LICENSE("GPL"); + +module_param(minor, int, S_IRUGO); +MODULE_PARM_DESC(minor, "Preferred minor device number"); + +module_param(card, int, S_IRUGO); +MODULE_PARM_DESC(card, "TV card number to attach to"); + +module_param(gpio_mask, long, S_IRUGO); +MODULE_PARM_DESC(gpio_mask, "gpio_mask"); + +module_param(gpio_lock_mask, long, S_IRUGO); +MODULE_PARM_DESC(gpio_lock_mask, "gpio_lock_mask"); + +module_param(gpio_xor_mask, long, S_IRUGO); +MODULE_PARM_DESC(gpio_xor_mask, "gpio_xor_mask"); + +module_param(soft_gap, int, S_IRUGO); +MODULE_PARM_DESC(soft_gap, "Time between keypresses (in ms)"); + +module_param(sample_rate, int, S_IRUGO); +MODULE_PARM_DESC(sample_rate, "Sample rate (between 2 and HZ)"); + +module_param(bttv_id, int, S_IRUGO); +MODULE_PARM_DESC(bttv_id, "BTTV card type"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +EXPORT_NO_SYMBOLS; + +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_bt829/lirc_bt829.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_bt829/lirc_bt829.c @@ -0,0 +1,399 @@ +/* + * Remote control driver for the TV-card based on bt829 + * + * by Leonid Froenchenko + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0) +#error "This driver needs kernel version 2.4.0 or higher" +#endif +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +static int poll_main(void); +static int atir_init_start(void); + +static void write_index(unsigned char index, unsigned int value); +static unsigned int read_index(unsigned char index); + +static void do_i2c_start(void); +static void do_i2c_stop(void); + +static void seems_wr_byte(unsigned char al); +static unsigned char seems_rd_byte(void); + +static unsigned int read_index(unsigned char al); +static void write_index(unsigned char ah, unsigned int edx); + +static void cycle_delay(int cycle); + +static void do_set_bits(unsigned char bl); +static unsigned char do_get_bits(void); + +#define DATA_PCI_OFF 0x7FFC00 +#define WAIT_CYCLE 20 + +#define DRIVER_NAME "lirc_bt829" + +static int debug; +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG DRIVER_NAME ": " fmt, ## args); \ + } while (0) + +static int atir_minor; +static unsigned long pci_addr_phys; +static unsigned char *pci_addr_lin; + +static struct lirc_driver atir_driver; + +static struct pci_dev *do_pci_probe(void) +{ + struct pci_dev *my_dev; +#ifndef KERNEL_2_5 + /* unnecessary with recent kernels */ + if (!pci_present()) + printk(KERN_ERR DRIVER_NAME ": no pci in this kernel\n"); +#endif + my_dev = pci_get_device(PCI_VENDOR_ID_ATI, + PCI_DEVICE_ID_ATI_264VT, NULL); + if (my_dev) { + printk(KERN_ERR DRIVER_NAME ": Using device: %s\n", + pci_name(my_dev)); + pci_addr_phys = 0; + if (my_dev->resource[0].flags & IORESOURCE_MEM) { + pci_addr_phys = my_dev->resource[0].start; + printk(KERN_INFO DRIVER_NAME ": memory at 0x%08X\n", + (unsigned int)pci_addr_phys); + } + if (pci_addr_phys == 0) { + printk(KERN_ERR DRIVER_NAME ": no memory resource ?\n"); + return NULL; + } + } else { + printk(KERN_ERR DRIVER_NAME ": pci_probe failed\n"); + return NULL; + } + return my_dev; +} + +static int atir_add_to_buf(void *data, struct lirc_buffer *buf) +{ + unsigned char key; + int status; + status = poll_main(); + key = (status >> 8) & 0xFF; + if (status & 0xFF) { + dprintk("reading key %02X\n", key); + lirc_buffer_write(buf, &key); + return 0; + } + return -ENODATA; +} + +static int atir_set_use_inc(void *data) +{ + MOD_INC_USE_COUNT; + dprintk("driver is opened\n"); + return 0; +} + +static void atir_set_use_dec(void *data) +{ + MOD_DEC_USE_COUNT; + dprintk("driver is closed\n"); +} + +int init_module(void) +{ + struct pci_dev *pdev; + + pdev = do_pci_probe(); + if (pdev == NULL) + return 1; + + if (!atir_init_start()) + return 1; + + strcpy(atir_driver.name, "ATIR"); + atir_driver.minor = -1; + atir_driver.code_length = 8; + atir_driver.sample_rate = 10; + atir_driver.data = 0; + atir_driver.add_to_buf = atir_add_to_buf; + atir_driver.set_use_inc = atir_set_use_inc; + atir_driver.set_use_dec = atir_set_use_dec; +#ifdef LIRC_HAVE_SYSFS + atir_driver.dev = &pdev->dev; +#endif + atir_driver.owner = THIS_MODULE; + + atir_minor = lirc_register_driver(&atir_driver); + if (atir_minor < 0) { + printk(KERN_ERR DRIVER_NAME ": failed to register driver!\n"); + return atir_minor; + } + dprintk("driver is registered on minor %d\n", atir_minor); + + return 0; +} + + +void cleanup_module(void) +{ + lirc_unregister_driver(atir_minor); +} + + +static int atir_init_start(void) +{ + pci_addr_lin = ioremap(pci_addr_phys + DATA_PCI_OFF, 0x400); + if (pci_addr_lin == 0) { + printk(KERN_INFO DRIVER_NAME ": pci mem must be mapped\n"); + return 0; + } + return 1; +} + +static void cycle_delay(int cycle) +{ + udelay(WAIT_CYCLE*cycle); +} + + +static int poll_main() +{ + unsigned char status_high, status_low; + + do_i2c_start(); + + seems_wr_byte(0xAA); + seems_wr_byte(0x01); + + do_i2c_start(); + + seems_wr_byte(0xAB); + + status_low = seems_rd_byte(); + status_high = seems_rd_byte(); + + do_i2c_stop(); + + return (status_high << 8) | status_low; +} + +static void do_i2c_start(void) +{ + do_set_bits(3); + cycle_delay(4); + + do_set_bits(1); + cycle_delay(7); + + do_set_bits(0); + cycle_delay(2); +} + +static void do_i2c_stop(void) +{ + unsigned char bits; + bits = do_get_bits() & 0xFD; + do_set_bits(bits); + cycle_delay(1); + + bits |= 1; + do_set_bits(bits); + cycle_delay(2); + + bits |= 2; + do_set_bits(bits); + bits = 3; + do_set_bits(bits); + cycle_delay(2); +} + +static void seems_wr_byte(unsigned char value) +{ + int i; + unsigned char reg; + + reg = do_get_bits(); + for (i = 0; i < 8; i++) { + if (value & 0x80) + reg |= 0x02; + else + reg &= 0xFD; + + do_set_bits(reg); + cycle_delay(1); + + reg |= 1; + do_set_bits(reg); + cycle_delay(1); + + reg &= 0xFE; + do_set_bits(reg); + cycle_delay(1); + value <<= 1; + } + cycle_delay(2); + + reg |= 2; + do_set_bits(reg); + + reg |= 1; + do_set_bits(reg); + + cycle_delay(1); + do_get_bits(); + + reg &= 0xFE; + do_set_bits(reg); + cycle_delay(3); +} + +static unsigned char seems_rd_byte(void) +{ + int i; + int rd_byte; + unsigned char bits_2, bits_1; + + bits_1 = do_get_bits() | 2; + do_set_bits(bits_1); + + rd_byte = 0; + for (i = 0; i < 8; i++) { + bits_1 &= 0xFE; + do_set_bits(bits_1); + cycle_delay(2); + + bits_1 |= 1; + do_set_bits(bits_1); + cycle_delay(1); + + bits_2 = do_get_bits(); + if (bits_2 & 2) + rd_byte |= 1; + + rd_byte <<= 1; + } + + bits_1 = 0; + if (bits_2 == 0) + bits_1 |= 2; + + do_set_bits(bits_1); + cycle_delay(2); + + bits_1 |= 1; + do_set_bits(bits_1); + cycle_delay(3); + + bits_1 &= 0xFE; + do_set_bits(bits_1); + cycle_delay(2); + + rd_byte >>= 1; + rd_byte &= 0xFF; + return rd_byte; +} + +static void do_set_bits(unsigned char new_bits) +{ + int reg_val; + reg_val = read_index(0x34); + if (new_bits & 2) { + reg_val &= 0xFFFFFFDF; + reg_val |= 1; + } else { + reg_val &= 0xFFFFFFFE; + reg_val |= 0x20; + } + reg_val |= 0x10; + write_index(0x34, reg_val); + + reg_val = read_index(0x31); + if (new_bits & 1) + reg_val |= 0x1000000; + else + reg_val &= 0xFEFFFFFF; + + reg_val |= 0x8000000; + write_index(0x31, reg_val); +} + +static unsigned char do_get_bits(void) +{ + unsigned char bits; + int reg_val; + + reg_val = read_index(0x34); + reg_val |= 0x10; + reg_val &= 0xFFFFFFDF; + write_index(0x34, reg_val); + + reg_val = read_index(0x34); + bits = 0; + if (reg_val & 8) + bits |= 2; + else + bits &= 0xFD; + + reg_val = read_index(0x31); + if (reg_val & 0x1000000) + bits |= 1; + else + bits &= 0xFE; + + return bits; +} + +static unsigned int read_index(unsigned char index) +{ + unsigned char *addr; + unsigned int value; + /* addr = pci_addr_lin + DATA_PCI_OFF + ((index & 0xFF) << 2); */ + addr = pci_addr_lin + ((index & 0xFF) << 2); + value = readl(addr); + return value; +} + +static void write_index(unsigned char index, unsigned int reg_val) +{ + unsigned char *addr; + addr = pci_addr_lin + ((index & 0xFF) << 2); + writel(reg_val, addr); +} + +MODULE_AUTHOR("Froenchenko Leonid"); +MODULE_DESCRIPTION("IR remote driver for bt829 based TV cards"); +MODULE_LICENSE("GPL"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Debug enabled or not"); +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_bt829/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_bt829/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_ATIUSB) += lirc_bt829.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_i2c/lirc_i2c.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_i2c/lirc_i2c.c @@ -0,0 +1,779 @@ +/* $Id: lirc_i2c.c,v 1.70 2009/08/30 16:59:53 jarodwilson Exp $ */ + +/* + * lirc_i2c.c + * + * i2c IR driver for the onboard IR port on many TV tuner cards, including: + * -Flavors of the Hauppauge PVR-150/250/350 + * -Hauppauge HVR-1300 + * -PixelView (BT878P+W/FM) + * -KNC ONE TV Station/Anubis Typhoon TView Tuner + * -Asus TV-Box and Creative/VisionTek BreakOut-Box + * -Leadtek Winfast PVR2000 + * + * Copyright (c) 2000 Gerd Knorr + * modified for PixelView (BT878P+W/FM) by + * Michal Kochanowicz + * Christoph Bartelmus + * modified for KNC ONE TV Station/Anubis Typhoon TView Tuner by + * Ulrich Mueller + * modified for Asus TV-Box and Creative/VisionTek BreakOut-Box by + * Stefan Jahn + * modified for inclusion into kernel sources by + * Jerome Brock + * modified for Leadtek Winfast PVR2000 by + * Thomas Reitmayr (treitmayr@yahoo.com) + * modified for Hauppauge HVR-1300 by + * Jan Frey (jfrey@gmx.de) + * + * parts are cut&pasted from the old lirc_haup.c driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifdef HAVE_CONFIG_H +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +struct IR { + struct lirc_driver l; + struct i2c_client c; + int nextkey; + unsigned char b[3]; + unsigned char bits; + unsigned char flag; +}; + +#define DEVICE_NAME "lirc_i2c" + +/* module parameters */ +static int debug; /* debug output */ +static int minor = -1; /* minor number */ + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG DEVICE_NAME ": " fmt, \ + ## args); \ + } while (0) + +static int reverse(int data, int bits) +{ + int i; + int c; + + for (c = 0, i = 0; i < bits; i++) + c |= ((data & (1<c, keybuf, 1); + /* poll IR chip */ + if (i2c_master_recv(&ir->c, keybuf, sizeof(keybuf)) != sizeof(keybuf)) { + dprintk("read error\n"); + return -EIO; + } + + dprintk("key (0x%02x%02x%02x%02x)\n", + keybuf[0], keybuf[1], keybuf[2], keybuf[3]); + + /* key pressed ? */ + if (keybuf[2] == 0xff) + return -ENODATA; + + /* remove repeat bit */ + keybuf[2] &= 0x7f; + keybuf[3] |= 0x80; + + lirc_buffer_write(buf, keybuf); + return 0; +} + +static int add_to_buf_pcf8574(void *data, struct lirc_buffer *buf) +{ + struct IR *ir = data; + int rc; + unsigned char all, mask; + unsigned char key; + + /* compute all valid bits (key code + pressed/release flag) */ + all = ir->bits | ir->flag; + + /* save IR writable mask bits */ + mask = i2c_smbus_read_byte(&ir->c) & ~all; + + /* send bit mask */ + rc = i2c_smbus_write_byte(&ir->c, (0xff & all) | mask); + + /* receive scan code */ + rc = i2c_smbus_read_byte(&ir->c); + + if (rc == -1) { + dprintk("%s read error\n", ir->c.name); + return -EIO; + } + + /* drop duplicate polls */ + if (ir->b[0] == (rc & all)) + return -ENODATA; + + ir->b[0] = rc & all; + + dprintk("%s key 0x%02X %s\n", ir->c.name, rc & ir->bits, + (rc & ir->flag) ? "released" : "pressed"); + + /* ignore released buttons */ + if (rc & ir->flag) + return -ENODATA; + + /* set valid key code */ + key = rc & ir->bits; + lirc_buffer_write(buf, &key); + return 0; +} + +/* common for Hauppauge IR receivers */ +static int add_to_buf_haup_common(void *data, struct lirc_buffer *buf, + unsigned char *keybuf, int size, int offset) +{ + struct IR *ir = data; + __u16 code; + unsigned char codes[2]; + int ret; + + /* poll IR chip */ + ret = i2c_master_recv(&ir->c, keybuf, size); + if (ret == size) { + ir->b[0] = keybuf[offset]; + ir->b[1] = keybuf[offset+1]; + ir->b[2] = keybuf[offset+2]; + if (ir->b[0] != 0x00 && ir->b[1] != 0x00) + dprintk("key (0x%02x/0x%02x)\n", ir->b[0], ir->b[1]); + } else { + dprintk("read error (ret=%d)\n", ret); + /* keep last successful read buffer */ + } + + /* key pressed ? */ + if ((ir->b[0] & 0x80) == 0) + return -ENODATA; + + /* look what we have */ + code = (((__u16)ir->b[0]&0x7f)<<6) | (ir->b[1]>>2); + + codes[0] = (code >> 8) & 0xff; + codes[1] = code & 0xff; + + /* return it */ + dprintk("sending code 0x%02x%02x to lirc\n", codes[0], codes[1]); + lirc_buffer_write(buf, codes); + return 0; +} + +/* specific for the Hauppauge PVR150 IR receiver */ +static int add_to_buf_haup_pvr150(void *data, struct lirc_buffer *buf) +{ + unsigned char keybuf[6]; + /* fetch 6 bytes, first relevant is at offset 3 */ + return add_to_buf_haup_common(data, buf, keybuf, 6, 3); +} + +/* used for all Hauppauge IR receivers but the PVR150 */ +static int add_to_buf_haup(void *data, struct lirc_buffer *buf) +{ + unsigned char keybuf[3]; + /* fetch 3 bytes, first relevant is at offset 0 */ + return add_to_buf_haup_common(data, buf, keybuf, 3, 0); +} + + +static int add_to_buf_pvr2000(void *data, struct lirc_buffer *buf) +{ + struct IR *ir = data; + unsigned char key; + s32 flags; + s32 code; + + /* poll IR chip */ + flags = i2c_smbus_read_byte_data(&ir->c, 0x10); + if (-1 == flags) { + dprintk("read error\n"); + return -ENODATA; + } + /* key pressed ? */ + if (0 == (flags & 0x80)) + return -ENODATA; + + /* read actual key code */ + code = i2c_smbus_read_byte_data(&ir->c, 0x00); + if (-1 == code) { + dprintk("read error\n"); + return -ENODATA; + } + + key = code & 0xFF; + + dprintk("IR Key/Flags: (0x%02x/0x%02x)\n", key, flags & 0xFF); + + /* return it */ + lirc_buffer_write(buf, &key); + return 0; +} + +static int add_to_buf_pixelview(void *data, struct lirc_buffer *buf) +{ + struct IR *ir = data; + unsigned char key; + + /* poll IR chip */ + if (1 != i2c_master_recv(&ir->c, &key, 1)) { + dprintk("read error\n"); + return -1; + } + dprintk("key %02x\n", key); + + /* return it */ + lirc_buffer_write(buf, &key); + return 0; +} + +static int add_to_buf_pv951(void *data, struct lirc_buffer *buf) +{ + struct IR *ir = data; + unsigned char key; + unsigned char codes[4]; + + /* poll IR chip */ + if (1 != i2c_master_recv(&ir->c, &key, 1)) { + dprintk("read error\n"); + return -ENODATA; + } + /* ignore 0xaa */ + if (key == 0xaa) + return -ENODATA; + dprintk("key %02x\n", key); + + codes[0] = 0x61; + codes[1] = 0xD6; + codes[2] = reverse(key, 8); + codes[3] = (~codes[2])&0xff; + + lirc_buffer_write(buf, codes); + return 0; +} + +static int add_to_buf_knc1(void *data, struct lirc_buffer *buf) +{ + static unsigned char last_key = 0xFF; + struct IR *ir = data; + unsigned char key; + + /* poll IR chip */ + if (1 != i2c_master_recv(&ir->c, &key, 1)) { + dprintk("read error\n"); + return -ENODATA; + } + + /* + * it seems that 0xFE indicates that a button is still held + * down, while 0xFF indicates that no button is held + * down. 0xFE sequences are sometimes interrupted by 0xFF + */ + + dprintk("key %02x\n", key); + + if (key == 0xFF) + return -ENODATA; + + if (key == 0xFE) + key = last_key; + + last_key = key; + lirc_buffer_write(buf, &key); + + return 0; +} + +static int set_use_inc(void *data) +{ + struct IR *ir = data; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25) + int ret; +#endif + + dprintk("%s called\n", __func__); + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + i2c_use_client(&ir->c); +#else + /* lock bttv in memory while /dev/lirc is in use */ + ret = i2c_use_client(&ir->c); + if (ret != 0) + return ret; +#endif + + MOD_INC_USE_COUNT; + return 0; +} + +static void set_use_dec(void *data) +{ + struct IR *ir = data; + + dprintk("%s called\n", __func__); + + i2c_release_client(&ir->c); + MOD_DEC_USE_COUNT; +} + +static struct lirc_driver lirc_template = { + .name = "lirc_i2c", + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .dev = NULL, + .owner = THIS_MODULE, +}; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) +static int ir_attach(struct i2c_adapter *adap, int addr, + unsigned short flags, int kind); +static int ir_probe(struct i2c_adapter *adap); +# else +static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id); +#endif +static int ir_remove(struct i2c_client *client); +static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 30) +static const struct i2c_device_id ir_receiver_id[] = { + /* Generic entry for any IR receiver */ + { "ir_video", 0 }, + /* IR device specific entries could be added here */ + { } +}; +#endif + +static struct i2c_driver driver = { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) + .name = "i2c ir driver", + .flags = I2C_DF_NOTIFY, +#else + .driver = { + .owner = THIS_MODULE, + .name = "i2c ir driver", + }, +#endif + .id = I2C_DRIVERID_EXP3, /* FIXME */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + .attach_adapter = ir_probe, + .detach_client = ir_remove, +#else + .probe = ir_probe, + .remove = ir_remove, + .id_table = ir_receiver_id, +#endif + .command = ir_command, +}; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) +static struct i2c_client client_template = { + .name = "unset", + .driver = &driver +}; +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) +static int ir_attach(struct i2c_adapter *adap, int addr, + unsigned short flags, int kind) +#else +static void pcf_probe(struct i2c_client *client, struct IR *ir) +{ + int ret1, ret2, ret3, ret4; + + ret1 = i2c_smbus_write_byte(client, 0xff); + ret2 = i2c_smbus_read_byte(client); + ret3 = i2c_smbus_write_byte(client, 0x00); + ret4 = i2c_smbus_read_byte(client); + + /* in the Asus TV-Box: bit 1-0 */ + if (((ret2 & 0x03) == 0x03) && ((ret4 & 0x03) == 0x00)) { + ir->bits = (unsigned char) ~0x07; + ir->flag = 0x04; + /* in the Creative/VisionTek BreakOut-Box: bit 7-6 */ + } else if (((ret2 & 0xc0) == 0xc0) && ((ret4 & 0xc0) == 0x00)) { + ir->bits = (unsigned char) ~0xe0; + ir->flag = 0x20; + } + + return; +} + +static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id) +#endif +{ + struct IR *ir; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + int err, retval; + + client_template.adapter = adap; + client_template.addr = addr; +#else + struct i2c_adapter *adap = client->adapter; + unsigned short addr = client->addr; + int retval; +#endif + + ir = kmalloc(sizeof(struct IR), GFP_KERNEL); + if (!ir) + return -ENOMEM; + memcpy(&ir->l, &lirc_template, sizeof(struct lirc_driver)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + memcpy(&ir->c, &client_template, sizeof(struct i2c_client)); + + ir->c.adapter = adap; + ir->c.addr = addr; + i2c_set_clientdata(&ir->c, ir); +#else + memcpy(&ir->c, client, sizeof(struct i2c_client)); + + i2c_set_clientdata(client, ir); +#endif + ir->l.data = ir; + ir->l.minor = minor; + ir->l.sample_rate = 10; + ir->l.dev = &ir->c.dev; + ir->nextkey = -1; + + switch (addr) { + case 0x64: + strlcpy(ir->c.name, "Pixelview IR", I2C_NAME_SIZE); + ir->l.code_length = 8; + ir->l.add_to_buf = add_to_buf_pixelview; + break; + case 0x4b: + strlcpy(ir->c.name, "PV951 IR", I2C_NAME_SIZE); + ir->l.code_length = 32; + ir->l.add_to_buf = add_to_buf_pv951; + break; + case 0x71: +#ifdef I2C_HW_B_CX2341X + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) || + adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) { +#else + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) { +#endif + /* + * The PVR150 IR receiver uses the same protocol as + * other Hauppauge cards, but the data flow is + * different, so we need to deal with it by its own. + */ + strlcpy(ir->c.name, "Hauppauge PVR150", I2C_NAME_SIZE); + } else /* I2C_HW_B_CX2388x */ + strlcpy(ir->c.name, "Hauppauge HVR1300", I2C_NAME_SIZE); + ir->l.code_length = 13; + ir->l.add_to_buf = add_to_buf_haup_pvr150; + break; + case 0x6b: + strlcpy(ir->c.name, "Adaptec IR", I2C_NAME_SIZE); + ir->l.code_length = 32; + ir->l.add_to_buf = add_to_buf_adap; + break; + case 0x18: + case 0x1a: +#ifdef I2C_HW_B_CX2341X + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) || + adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) { +#else + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) { +#endif + strlcpy(ir->c.name, "Hauppauge IR", I2C_NAME_SIZE); + ir->l.code_length = 13; + ir->l.add_to_buf = add_to_buf_haup; + } else { /* I2C_HW_B_CX2388x */ + strlcpy(ir->c.name, "Leadtek IR", I2C_NAME_SIZE); + ir->l.code_length = 8; + ir->l.add_to_buf = add_to_buf_pvr2000; + } + break; + case 0x30: + strlcpy(ir->c.name, "KNC ONE IR", I2C_NAME_SIZE); + ir->l.code_length = 8; + ir->l.add_to_buf = add_to_buf_knc1; + break; + case 0x21: + case 0x23: +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + ir->bits = flags & 0xff; + ir->flag = (flags >> 8) & 0xff; +#else + pcf_probe(client, ir); +#endif + strlcpy(ir->c.name, "TV-Box IR", I2C_NAME_SIZE); + ir->l.code_length = 8; + ir->l.add_to_buf = add_to_buf_pcf8574; + break; + default: + /* shouldn't happen */ + printk("lirc_i2c: Huh? unknown i2c address (0x%02x)?\n", addr); + kfree(ir); + return -EINVAL; + } + printk(KERN_INFO "lirc_i2c: chip 0x%x found @ 0x%02x (%s)\n", + adap->id, addr, ir->c.name); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + /* register device */ + err = i2c_attach_client(&ir->c); + if (err) { + kfree(ir); + return err; + } +#endif + + retval = lirc_register_driver(&ir->l); + + if (retval < 0) { + printk(KERN_ERR "lirc_i2c: failed to register driver!\n"); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + i2c_detach_client(&ir->c); +#endif + kfree(ir); + return retval; + } + + ir->l.minor = retval; + + return 0; +} + +static int ir_remove(struct i2c_client *client) +{ + struct IR *ir = i2c_get_clientdata(client); + + /* unregister device */ + lirc_unregister_driver(ir->l.minor); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) + i2c_detach_client(&ir->c); +#endif + + /* free memory */ + kfree(ir); + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31) +static int ir_probe(struct i2c_adapter *adap) +{ + /* + * The external IR receiver is at i2c address 0x34 (0x35 for + * reads). Future Hauppauge cards will have an internal + * receiver at 0x30 (0x31 for reads). In theory, both can be + * fitted, and Hauppauge suggest an external overrides an + * internal. + * + * That's why we probe 0x1a (~0x34) first. CB + * + * The i2c address for the Hauppauge PVR-150 card is 0xe2, + * so we need to probe 0x71 as well. + */ + + static const int probe[] = { + 0x1a, /* Hauppauge IR external */ + 0x18, /* Hauppauge IR internal */ + 0x71, /* Hauppauge IR (PVR150) */ + 0x4b, /* PV951 IR */ + 0x64, /* Pixelview IR */ + 0x30, /* KNC ONE IR */ + 0x6b, /* Adaptec IR */ + -1}; + +#ifdef I2C_HW_B_CX2388x + static const int probe_cx88[] = { + 0x18, /* Leadtek Winfast PVR2000 */ + 0x71, /* Hauppauge HVR-IR */ + -1}; +#endif + + struct i2c_client c; + char buf; + int i, rc; + + memset(&c, 0, sizeof(c)); +#ifdef I2C_HW_B_CX2341X + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) || + adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) { +#else + if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) { +#endif + c.adapter = adap; + for (i = 0; -1 != probe[i]; i++) { + c.addr = probe[i]; + rc = i2c_master_recv(&c, &buf, 1); + dprintk("probe 0x%02x @ %s: %s\n", + probe[i], adap->name, + (1 == rc) ? "yes" : "no"); + if (1 == rc) { + rc = ir_attach(adap, probe[i], 0, 0); + if (rc < 0) + goto attach_fail; + } + } + } + +#ifdef I2C_HW_B_CX2388x + /* Leadtek Winfast PVR2000 or Hauppauge HVR-1300 */ + else if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2388x)) { + c.adapter = adap; + for (i = 0; -1 != probe_cx88[i]; i++) { + c.addr = probe_cx88[i]; + rc = i2c_master_recv(&c, &buf, 1); + dprintk("probe 0x%02x @ %s: %s\n", + c.addr, adap->name, + (1 == rc) ? "yes" : "no"); + if (1 == rc) { + rc = ir_attach(adap, c.addr, 0, 0); + if (rc < 0) + goto attach_fail; + } + } + } +#endif + + /* Asus TV-Box and Creative/VisionTek BreakOut-Box (PCF8574) */ + else if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_RIVA)) { + /* + * addresses to probe; + * leave 0x24 and 0x25 because SAA7113H possibly uses it + * 0x21 and 0x22 possibly used by SAA7108E + * Asus: 0x21 is a correct address (channel 1 of PCF8574) + * Creative: 0x23 is a correct address (channel 3 of PCF8574) + * VisionTek: 0x23 is a correct address (channel 3 of PCF8574) + */ + static const int pcf_probe[] = { 0x20, 0x21, 0x22, 0x23, + 0x24, 0x25, 0x26, 0x27, -1 }; + int ret1, ret2, ret3, ret4; + unsigned char bits = 0, flag = 0; + + c.adapter = adap; + for (i = 0; -1 != pcf_probe[i]; i++) { + c.addr = pcf_probe[i]; + ret1 = i2c_smbus_write_byte(&c, 0xff); + ret2 = i2c_smbus_read_byte(&c); + ret3 = i2c_smbus_write_byte(&c, 0x00); + ret4 = i2c_smbus_read_byte(&c); + + /* ensure that the writable bitmask works correctly */ + rc = 0; + if (ret1 != -1 && ret2 != -1 && + ret3 != -1 && ret4 != -1) { + /* in the Asus TV-Box: bit 1-0 */ + if (((ret2 & 0x03) == 0x03) && + ((ret4 & 0x03) == 0x00)) { + bits = (unsigned char) ~0x07; + flag = 0x04; + rc = 1; + } + /* in the Creative/VisionTek BreakOut-Box: bit 7-6 */ + if (((ret2 & 0xc0) == 0xc0) && + ((ret4 & 0xc0) == 0x00)) { + bits = (unsigned char) ~0xe0; + flag = 0x20; + rc = 1; + } + } + dprintk("probe 0x%02x @ %s: %s\n", + c.addr, adap->name, rc ? "yes" : "no"); + if (rc) { + rc = ir_attach(adap, pcf_probe[i], + bits | (flag << 8), 0); + if (rc < 0) + goto attach_fail; + } + } + } + + return 0; + +attach_fail: + printk(KERN_ERR "lirc_i2c: %s: ir_attach failed!\n", __func__); + return rc; + +} +#endif + +static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg) +{ + /* nothing */ + return 0; +} + +#ifdef MODULE + +static int __init lirc_i2c_init(void) +{ + request_module("bttv"); + request_module("rivatv"); + request_module("ivtv"); + request_module("cx8800"); + i2c_add_driver(&driver); + return 0; +} + +static void __exit lirc_i2c_exit(void) +{ + i2c_del_driver(&driver); +} + +MODULE_DESCRIPTION("Infrared receiver driver for Hauppauge and " + "Pixelview cards (i2c stack)"); +MODULE_AUTHOR("Gerd Knorr, Michal Kochanowicz, Christoph Bartelmus, " + "Ulrich Mueller, Stefan Jahn, Jerome Brock"); +MODULE_LICENSE("GPL"); + +module_param(minor, int, S_IRUGO); +MODULE_PARM_DESC(minor, "Preferred minor device number"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +module_init(lirc_i2c_init); +module_exit(lirc_i2c_exit); +EXPORT_NO_SYMBOLS; + +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_i2c/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_i2c/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_I2C) += lirc_i2c.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_imon/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_imon/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_IMON) += lirc_imon.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_imon/lirc_imon.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_imon/lirc_imon.c @@ -0,0 +1,2370 @@ +/* + * lirc_imon.c: LIRC/VFD/LCD driver for SoundGraph iMON IR/VFD/LCD + * including the iMON PAD model + * + * $Id: lirc_imon.c,v 1.111 2009/09/11 04:56:18 jarodwilson Exp $ + * + * Copyright(C) 2004 Venky Raju(dev@venky.ws) + * + * lirc_imon is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include + +#ifdef HAVE_CONFIG_H +#include +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) +#error "*** Sorry, this driver requires a 2.6 kernel" +#endif + +#include + +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include +#include + +#include "../kcompat.h" +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" + + +#define MOD_AUTHOR "Venky Raju " +#define MOD_DESC "Driver for SoundGraph iMON MultiMedia IR/Display" +#define MOD_NAME "lirc_imon" +#define MOD_VERSION "0.6" + +#define DISPLAY_MINOR_BASE 144 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) +#define DEVFS_MODE (S_IFCHR | S_IRUSR | S_IWUSR | \ + S_IRGRP | S_IWGRP | S_IROTH) +#endif +#define DEVICE_NAME LIRC_DEVFS_PREFIX "lcd%d" + +#define BUF_CHUNK_SIZE 4 +#define BUF_SIZE 128 + +#define BIT_DURATION 250 /* each bit received is 250us */ + +#define IMON_CLOCK_ENABLE_PACKETS 2 + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_INFO MOD_NAME ": " fmt, ## args); \ + } while (0) + +/*** P R O T O T Y P E S ***/ + +/* USB Callback prototypes */ +static int imon_probe(struct usb_interface *interface, + const struct usb_device_id *id); +static void imon_disconnect(struct usb_interface *interface); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_rx_callback_intf0(struct urb *urb, struct pt_regs *regs); +static void usb_rx_callback_intf1(struct urb *urb, struct pt_regs *regs); +static void usb_tx_callback(struct urb *urb, struct pt_regs *regs); +#else +static void usb_rx_callback_intf0(struct urb *urb); +static void usb_rx_callback_intf1(struct urb *urb); +static void usb_tx_callback(struct urb *urb); +#endif + +/* suspend/resume support */ +static int imon_resume(struct usb_interface *intf); +static int imon_suspend(struct usb_interface *intf, pm_message_t message); + +/* Display file_operations function prototypes */ +static int display_open(struct inode *inode, struct file *file); +static int display_close(struct inode *inode, struct file *file); + +/* VFD write operation */ +static ssize_t vfd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos); + +/* LCD file_operations override function prototypes */ +static ssize_t lcd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos); + +/* LIRC driver function prototypes */ +static int ir_open(void *data); +static void ir_close(void *data); + +/* Driver init/exit prototypes */ +static int __init imon_init(void); +static void __exit imon_exit(void); + +/*** G L O B A L S ***/ + +struct imon_context { + struct usb_device *usbdev_intf0; + /* Newer devices have two interfaces */ + struct usb_device *usbdev_intf1; + int display_supported; /* not all controllers do */ + int display_isopen; /* display port has been opened */ + int ir_isopen; /* IR port open */ + int ir_isassociating; /* IR port open for association */ + int dev_present_intf0; /* USB device presence, interface 0 */ + int dev_present_intf1; /* USB device presence, interface 1 */ + struct mutex lock; /* to lock this object */ + wait_queue_head_t remove_ok; /* For unexpected USB disconnects */ + + int vfd_proto_6p; /* some VFD require a 6th packet */ + int ir_onboard_decode; /* IR signals decoded onboard */ + + struct lirc_driver *driver; + struct usb_endpoint_descriptor *rx_endpoint_intf0; + struct usb_endpoint_descriptor *rx_endpoint_intf1; + struct usb_endpoint_descriptor *tx_endpoint; + struct urb *rx_urb_intf0; + struct urb *rx_urb_intf1; + struct urb *tx_urb; + int tx_control; + unsigned char usb_rx_buf[8]; + unsigned char usb_tx_buf[8]; + + struct rx_data { + int count; /* length of 0 or 1 sequence */ + int prev_bit; /* logic level of sequence */ + int initial_space; /* initial space flag */ + } rx; + + struct tx_t { + unsigned char data_buf[35]; /* user data buffer */ + struct completion finished; /* wait for write to finish */ + atomic_t busy; /* write in progress */ + int status; /* status of tx completion */ + } tx; + + int ffdc_dev; /* is this the overused ffdc ID? */ + int ir_protocol; /* iMON or MCE (RC6) IR protocol? */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + struct input_dev *mouse; /* input device for iMON PAD remote */ + struct input_dev *touch; /* input device for touchscreen */ +#endif + int display_type; /* store the display type */ + int pad_mouse; /* toggle kbd(0)/mouse(1) mode */ + int touch_x; /* x coordinate on touchscreen */ + int touch_y; /* y coordinate on touchscreen */ + char name_mouse[128]; + char phys_mouse[64]; + char name_touch[128]; + char phys_touch[64]; + struct timer_list timer; +}; + +#define TOUCH_TIMEOUT (HZ/30) + +/* display file operations. Nb: lcd_write will be subbed in as needed later */ +static struct file_operations display_fops = { + .owner = THIS_MODULE, + .open = &display_open, + .write = &vfd_write, + .release = &display_close +}; + +enum { + IMON_DISPLAY_TYPE_AUTO = 0, + IMON_DISPLAY_TYPE_VFD = 1, + IMON_DISPLAY_TYPE_LCD = 2, + IMON_DISPLAY_TYPE_VGA = 3, + IMON_DISPLAY_TYPE_NONE = 4, +}; + +enum { + IMON_IR_PROTOCOL_IMON = 0, + IMON_IR_PROTOCOL_MCE = 1, + IMON_IR_PROTOCOL_IMON_NOPAD = 2, +}; +/* + * USB Device ID for iMON USB Control Boards + * + * The Windows drivers contain 6 different inf files, more or less one for + * each new device until the 0x0034-0x0046 devices, which all use the same + * driver. Some of the devices in the 34-46 range haven't been definitively + * identified yet. Early devices have either a TriGem Computer, Inc. or a + * Samsung vendor ID (0x0aa8 and 0x04e8 respectively), while all later + * devices use the SoundGraph vendor ID (0x15c2). + */ +static struct usb_device_id imon_usb_id_table[] = { + /* TriGem iMON (IR only) -- TG_iMON.inf */ + { USB_DEVICE(0x0aa8, 0x8001) }, + + /* SoundGraph iMON (IR only) -- sg_imon.inf */ + { USB_DEVICE(0x04e8, 0xff30) }, + + /* SoundGraph iMON VFD (IR & VFD) -- iMON_VFD.inf */ + { USB_DEVICE(0x0aa8, 0xffda) }, + + /* SoundGraph iMON SS (IR & VFD) -- iMON_SS.inf */ + { USB_DEVICE(0x15c2, 0xffda) }, + + /* + * Several devices with this same device ID, all use iMON_PAD.inf + * SoundGraph iMON PAD (IR & VFD) + * SoundGraph iMON PAD (IR & LCD) + * SoundGraph iMON Knob (IR only) + */ + /* SoundGraph iMON PAD (IR & VFD/LCD), iMON Knob */ + { USB_DEVICE(0x15c2, 0xffdc) }, + + /* + * Newer devices, all driven by the latest iMON Windows driver, full + * list of device IDs extracted via 'strings Setup/data1.hdr |grep 15c2' + * Need user input to fill in details on unknown devices. + */ + /* SoundGraph iMON OEM Touch LCD (IR & 7" VGA LCD) */ + { USB_DEVICE(0x15c2, 0x0034) }, + /* SoundGraph iMON OEM Touch LCD (IR & 4.3" VGA LCD) */ + { USB_DEVICE(0x15c2, 0x0035) }, + /* SoundGraph iMON OEM VFD (IR & VFD) */ + { USB_DEVICE(0x15c2, 0x0036) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x0037) }, + /* SoundGraph iMON OEM LCD (IR & LCD) */ + { USB_DEVICE(0x15c2, 0x0038) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x0039) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x003a) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x003b) }, + /* SoundGraph iMON OEM Inside (IR only) */ + { USB_DEVICE(0x15c2, 0x003c) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x003d) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x003e) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x003f) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x0040) }, + /* SoundGraph iMON MINI (IR only) */ + { USB_DEVICE(0x15c2, 0x0041) }, + /* Antec Veris Multimedia Station EZ External (IR only) */ + { USB_DEVICE(0x15c2, 0x0042) }, + /* Antec Veris Multimedia Station Basic Internal (IR only) */ + { USB_DEVICE(0x15c2, 0x0043) }, + /* Antec Veris Multimedia Station Elite (IR & VFD) */ + { USB_DEVICE(0x15c2, 0x0044) }, + /* Antec Veris Multimedia Station Premiere (IR & LCD) */ + { USB_DEVICE(0x15c2, 0x0045) }, + /* device specifics unknown */ + { USB_DEVICE(0x15c2, 0x0046) }, + {} +}; + +/* Some iMON VFD models requires a 6th packet for VFD writes */ +static struct usb_device_id vfd_proto_6p_list[] = { + { USB_DEVICE(0x15c2, 0xffda) }, + { USB_DEVICE(0x15c2, 0xffdc) }, + { USB_DEVICE(0x15c2, 0x0036) }, + { USB_DEVICE(0x15c2, 0x0044) }, + {} +}; + +/* newer iMON models use control endpoints */ +static struct usb_device_id ctl_ep_device_list[] = { + { USB_DEVICE(0x15c2, 0x0034) }, + { USB_DEVICE(0x15c2, 0x0035) }, + { USB_DEVICE(0x15c2, 0x0036) }, + { USB_DEVICE(0x15c2, 0x0037) }, + { USB_DEVICE(0x15c2, 0x0038) }, + { USB_DEVICE(0x15c2, 0x0039) }, + { USB_DEVICE(0x15c2, 0x003a) }, + { USB_DEVICE(0x15c2, 0x003b) }, + { USB_DEVICE(0x15c2, 0x003c) }, + { USB_DEVICE(0x15c2, 0x003d) }, + { USB_DEVICE(0x15c2, 0x003e) }, + { USB_DEVICE(0x15c2, 0x003f) }, + { USB_DEVICE(0x15c2, 0x0040) }, + { USB_DEVICE(0x15c2, 0x0041) }, + { USB_DEVICE(0x15c2, 0x0042) }, + { USB_DEVICE(0x15c2, 0x0043) }, + { USB_DEVICE(0x15c2, 0x0044) }, + { USB_DEVICE(0x15c2, 0x0045) }, + { USB_DEVICE(0x15c2, 0x0046) }, + {} +}; + +/* iMON LCD models use a different write op */ +static struct usb_device_id lcd_device_list[] = { + { USB_DEVICE(0x15c2, 0xffdc) }, + { USB_DEVICE(0x15c2, 0x0038) }, + { USB_DEVICE(0x15c2, 0x0045) }, + {} +}; + +/* iMON devices with front panel buttons or touchscreen need a larger buffer */ +static struct usb_device_id large_buffer_list[] = { + { USB_DEVICE(0x15c2, 0x0034) }, + { USB_DEVICE(0x15c2, 0x0035) }, + { USB_DEVICE(0x15c2, 0x0038) }, + { USB_DEVICE(0x15c2, 0x0045) }, +}; + +/* Newer iMON models decode the signal onboard */ +static struct usb_device_id ir_onboard_decode_list[] = { + { USB_DEVICE(0x15c2, 0xffdc) }, + { USB_DEVICE(0x15c2, 0x0034) }, + { USB_DEVICE(0x15c2, 0x0035) }, + { USB_DEVICE(0x15c2, 0x0036) }, + { USB_DEVICE(0x15c2, 0x0037) }, + { USB_DEVICE(0x15c2, 0x0038) }, + { USB_DEVICE(0x15c2, 0x0039) }, + { USB_DEVICE(0x15c2, 0x003a) }, + { USB_DEVICE(0x15c2, 0x003b) }, + { USB_DEVICE(0x15c2, 0x003c) }, + { USB_DEVICE(0x15c2, 0x003d) }, + { USB_DEVICE(0x15c2, 0x003e) }, + { USB_DEVICE(0x15c2, 0x003f) }, + { USB_DEVICE(0x15c2, 0x0040) }, + { USB_DEVICE(0x15c2, 0x0041) }, + { USB_DEVICE(0x15c2, 0x0042) }, + { USB_DEVICE(0x15c2, 0x0043) }, + { USB_DEVICE(0x15c2, 0x0044) }, + { USB_DEVICE(0x15c2, 0x0045) }, + { USB_DEVICE(0x15c2, 0x0046) }, + {} +}; + +/* Some iMON devices have no lcd/vfd, don't set one up */ +static struct usb_device_id ir_only_list[] = { + { USB_DEVICE(0x0aa8, 0x8001) }, + { USB_DEVICE(0x04e8, 0xff30) }, + /* the first imon lcd and the knob share this device id. :\ */ + /*{ USB_DEVICE(0x15c2, 0xffdc) },*/ + { USB_DEVICE(0x15c2, 0x003c) }, + { USB_DEVICE(0x15c2, 0x0041) }, + { USB_DEVICE(0x15c2, 0x0042) }, + { USB_DEVICE(0x15c2, 0x0043) }, + {} +}; + +/* iMON devices with VGA touchscreens */ +static struct usb_device_id imon_touchscreen_list[] = { + { USB_DEVICE(0x15c2, 0x0034) }, + { USB_DEVICE(0x15c2, 0x0035) }, + {} +}; + +/* USB Device data */ +static struct usb_driver imon_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = MOD_NAME, + .probe = imon_probe, + .disconnect = imon_disconnect, + .suspend = imon_suspend, + .resume = imon_resume, + .id_table = imon_usb_id_table, +}; + +static struct usb_class_driver imon_class = { + .name = DEVICE_NAME, + .fops = &display_fops, +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) + .mode = DEVFS_MODE, +#endif + .minor_base = DISPLAY_MINOR_BASE, +}; + +/* to prevent races between open() and disconnect(), probing, etc */ +static DEFINE_MUTEX(driver_lock); + +static int debug; + +/* lcd, vfd, vga or none? should be auto-detected, but can be overridden... */ +static int display_type; + +/* IR protocol: native iMON, Windows MCE (RC-6), or iMON w/o PAD stabilize */ +static int ir_protocol; + +/* + * In certain use cases, mouse mode isn't really helpful, and could actually + * cause confusion, so allow disabling it when the IR device is open. + */ +static int nomouse; + +/* threshold at which a pad push registers as an arrow key in kbd mode */ +static int pad_thresh; + + +/*** M O D U L E C O D E ***/ + +MODULE_AUTHOR(MOD_AUTHOR); +MODULE_DESCRIPTION(MOD_DESC); +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(usb, imon_usb_id_table); +module_param(debug, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Debug messages: 0=no, 1=yes(default: no)"); +module_param(display_type, int, S_IRUGO); +MODULE_PARM_DESC(display_type, "Type of attached display. 0=autodetect, " + "1=vfd, 2=lcd, 3=vga, 4=none (default: autodetect)"); +module_param(ir_protocol, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(ir_protocol, "Which IR protocol to use. 0=native iMON, " + "1=Windows Media Center Ed. (RC-6), 2=iMON w/o PAD stabilize " + "(default: native iMON)"); +module_param(nomouse, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(nomouse, "Disable mouse input device mode when IR device is " + "open. 0=don't disable, 1=disable. (default: don't disable)"); +module_param(pad_thresh, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(pad_thresh, "Threshold at which a pad push registers as an " + "arrow key in kbd mode (default: 28)"); + +static void free_imon_context(struct imon_context *context) +{ + usb_free_urb(context->tx_urb); + usb_free_urb(context->rx_urb_intf0); + usb_free_urb(context->rx_urb_intf1); + lirc_buffer_free(context->driver->rbuf); + kfree(context->driver->rbuf); + kfree(context->driver); + kfree(context); + + dprintk("%s: iMON context freed\n", __func__); +} + +static void deregister_from_lirc(struct imon_context *context) +{ + int retval; + int minor = context->driver->minor; + + retval = lirc_unregister_driver(minor); + if (retval) + err("%s: unable to deregister from lirc(%d)", + __func__, retval); + else + printk(KERN_INFO MOD_NAME ": Deregistered iMON driver " + "(minor:%d)\n", minor); + +} + +/** + * Called when the Display device (e.g. /dev/lcd0) + * is opened by the application. + */ +static int display_open(struct inode *inode, struct file *file) +{ + struct usb_interface *interface; + struct imon_context *context = NULL; + int subminor; + int retval = 0; + + /* prevent races with disconnect */ + mutex_lock(&driver_lock); + + subminor = iminor(inode); + interface = usb_find_interface(&imon_driver, subminor); + if (!interface) { + err("%s: could not find interface for minor %d", + __func__, subminor); + retval = -ENODEV; + goto exit; + } + context = usb_get_intfdata(interface); + + if (!context) { + err("%s: no context found for minor %d", + __func__, subminor); + retval = -ENODEV; + goto exit; + } + + mutex_lock(&context->lock); + + if (!context->display_supported) { + err("%s: display not supported by device", __func__); + retval = -ENODEV; + } else if (context->display_isopen) { + err("%s: display port is already open", __func__); + retval = -EBUSY; + } else { + MOD_INC_USE_COUNT; + context->display_isopen = 1; + file->private_data = context; + printk(KERN_INFO "display port opened\n"); + } + + mutex_unlock(&context->lock); + +exit: + mutex_unlock(&driver_lock); + return retval; +} + +/** + * Called when the display device (e.g. /dev/lcd0) + * is closed by the application. + */ +static int display_close(struct inode *inode, struct file *file) +{ + struct imon_context *context = NULL; + int retval = 0; + + context = (struct imon_context *)file->private_data; + + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + if (!context->display_supported) { + err("%s: display not supported by device", __func__); + retval = -ENODEV; + } else if (!context->display_isopen) { + err("%s: display is not open", __func__); + retval = -EIO; + } else { + context->display_isopen = 0; + MOD_DEC_USE_COUNT; + printk(KERN_INFO "display port closed\n"); + if (!context->dev_present_intf0 && !context->ir_isopen) { + /* + * Device disconnected before close and IR port is not + * open. If IR port is open, context will be deleted by + * ir_close. + */ + mutex_unlock(&context->lock); + free_imon_context(context); + return retval; + } + } + + mutex_unlock(&context->lock); + return retval; +} + +/** + * Sends a packet to the device + */ +static int send_packet(struct imon_context *context) +{ + unsigned int pipe; + int interval = 0; + int retval = 0; + struct usb_ctrlrequest *control_req = NULL; + + /* Check if we need to use control or interrupt urb */ + if (!context->tx_control) { + pipe = usb_sndintpipe(context->usbdev_intf0, + context->tx_endpoint->bEndpointAddress); + interval = context->tx_endpoint->bInterval; + + usb_fill_int_urb(context->tx_urb, context->usbdev_intf0, pipe, + context->usb_tx_buf, + sizeof(context->usb_tx_buf), + usb_tx_callback, context, interval); + + context->tx_urb->actual_length = 0; + } else { + /* fill request into kmalloc'ed space: */ + control_req = kmalloc(sizeof(struct usb_ctrlrequest), + GFP_KERNEL); + if (control_req == NULL) + return -ENOMEM; + + /* setup packet is '21 09 0200 0001 0008' */ + control_req->bRequestType = 0x21; + control_req->bRequest = 0x09; + control_req->wValue = cpu_to_le16(0x0200); + control_req->wIndex = cpu_to_le16(0x0001); + control_req->wLength = cpu_to_le16(0x0008); + + /* control pipe is endpoint 0x00 */ + pipe = usb_sndctrlpipe(context->usbdev_intf0, 0); + + /* build the control urb */ + usb_fill_control_urb(context->tx_urb, context->usbdev_intf0, pipe, + (unsigned char *)control_req, + context->usb_tx_buf, + sizeof(context->usb_tx_buf), + usb_tx_callback, context); + context->tx_urb->actual_length = 0; + } + + init_completion(&context->tx.finished); + atomic_set(&(context->tx.busy), 1); + + retval = usb_submit_urb(context->tx_urb, GFP_KERNEL); + if (retval) { + atomic_set(&(context->tx.busy), 0); + err("%s: error submitting urb(%d)", __func__, retval); + } else { + /* Wait for transmission to complete (or abort) */ + mutex_unlock(&context->lock); + retval = wait_for_completion_interruptible( + &context->tx.finished); + if (retval) + err("%s: task interrupted", __func__); + mutex_lock(&context->lock); + + retval = context->tx.status; + if (retval) + err("%s: packet tx failed (%d)", __func__, retval); + } + + kfree(control_req); + + return retval; +} + +/** + * Sends an associate packet to the iMON 2.4G. + * + * This might not be such a good idea, since it has an id collision with + * some versions of the "IR & VFD" combo. The only way to determine if it + * is an RF version is to look at the product description string. (Which + * we currently do not fetch). + */ +static int send_associate_24g(struct imon_context *context) +{ + int retval; + const unsigned char packet[8] = { 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x20 }; + + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + if (!context->dev_present_intf0) { + err("%s: no iMON device present", __func__); + return -ENODEV; + } + + memcpy(context->usb_tx_buf, packet, sizeof(packet)); + retval = send_packet(context); + + return retval; +} + +/** + * Sends packets to setup and show clock on iMON display + * + * Arguments: year - last 2 digits of year, month - 1..12, + * day - 1..31, dow - day of the week (0-Sun...6-Sat), + * hour - 0..23, minute - 0..59, second - 0..59 + */ +static int send_set_imon_clock(struct imon_context *context, + unsigned int year, unsigned int month, + unsigned int day, unsigned int dow, + unsigned int hour, unsigned int minute, + unsigned int second) +{ + unsigned char clock_enable_pkt[IMON_CLOCK_ENABLE_PACKETS][8]; + int retval = 0; + int i; + + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + switch(context->display_type) { + case IMON_DISPLAY_TYPE_LCD: + clock_enable_pkt[0][0] = 0x80; + clock_enable_pkt[0][1] = year; + clock_enable_pkt[0][2] = month-1; + clock_enable_pkt[0][3] = day; + clock_enable_pkt[0][4] = hour; + clock_enable_pkt[0][5] = minute; + clock_enable_pkt[0][6] = second; + + clock_enable_pkt[1][0] = 0x80; + clock_enable_pkt[1][1] = 0; + clock_enable_pkt[1][2] = 0; + clock_enable_pkt[1][3] = 0; + clock_enable_pkt[1][4] = 0; + clock_enable_pkt[1][5] = 0; + clock_enable_pkt[1][6] = 0; + + if (context->ffdc_dev) { + clock_enable_pkt[0][7] = 0x50; + clock_enable_pkt[1][7] = 0x51; + } else { + clock_enable_pkt[0][7] = 0x88; + clock_enable_pkt[1][7] = 0x8a; + } + + break; + + case IMON_DISPLAY_TYPE_VFD: + clock_enable_pkt[0][0] = year; + clock_enable_pkt[0][1] = month-1; + clock_enable_pkt[0][2] = day; + clock_enable_pkt[0][3] = dow; + clock_enable_pkt[0][4] = hour; + clock_enable_pkt[0][5] = minute; + clock_enable_pkt[0][6] = second; + clock_enable_pkt[0][7] = 0x40; + + clock_enable_pkt[1][0] = 0; + clock_enable_pkt[1][1] = 0; + clock_enable_pkt[1][2] = 1; + clock_enable_pkt[1][3] = 0; + clock_enable_pkt[1][4] = 0; + clock_enable_pkt[1][5] = 0; + clock_enable_pkt[1][6] = 0; + clock_enable_pkt[1][7] = 0x42; + + break; + + default: + return -ENODEV; + } + + + for (i = 0; i < IMON_CLOCK_ENABLE_PACKETS; i++) { + memcpy(context->usb_tx_buf, clock_enable_pkt[i], 8); + retval = send_packet(context); + if (retval) { + err("%s: send_packet failed for packet %d", + __func__, i); + break; + } + } + + return retval; + +} + +/** + * These are the sysfs functions to handle the association on the iMON 2.4G LT. + */ +static ssize_t show_associate_remote(struct device *d, + struct device_attribute *attr, + char *buf) +{ + struct imon_context *context = dev_get_drvdata(d); + + if (!context) + return -ENODEV; + + mutex_lock(&context->lock); + if (context->ir_isassociating) { + strcpy(buf, "associating\n"); + } else if (context->ir_isopen) { + strcpy(buf, "open\n"); + } else { + strcpy(buf, "closed\n"); + } + printk(KERN_INFO "Visit http://www.lirc.org/html/imon-24g.html for " + "instructions on how to associate your iMON 2.4G DT/LT " + "remote\n"); + mutex_unlock(&context->lock); + return strlen(buf); +} + +static ssize_t store_associate_remote(struct device *d, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct imon_context *context; + + context = dev_get_drvdata(d); + + if (!context) + return -ENODEV; + + mutex_lock(&context->lock); + if (!context->ir_isopen) { + mutex_unlock(&context->lock); + return -EINVAL; + } + + if (context->ir_isopen) { + context->ir_isassociating = 1; + send_associate_24g(context); + } + mutex_unlock(&context->lock); + + return count; +} + +/** + * sysfs functions to control internal imon clock + */ +static ssize_t show_imon_clock(struct device *d, + struct device_attribute *attr, char *buf) +{ + struct imon_context *context = dev_get_drvdata(d); + size_t len; + + if (!context) + return -ENODEV; + + mutex_lock(&context->lock); + + if (!context->display_supported) { + len = snprintf(buf, PAGE_SIZE, "Not supported."); + } else { + len = snprintf(buf, PAGE_SIZE, + "To set the clock on your iMON display:\n" + "# date \"+%%y %%m %%d %%w %%H %%M %%S\" > imon_clock\n" + "%s", context->display_isopen ? + "\nNOTE: imon device must be closed\n" : ""); + } + + mutex_unlock(&context->lock); + + return len; +} + +static ssize_t store_imon_clock(struct device *d, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct imon_context *context = dev_get_drvdata(d); + ssize_t retval; + unsigned int year, month, day, dow, hour, minute, second; + + if (!context) + return -ENODEV; + + mutex_lock(&context->lock); + + if (!context->display_supported) { + retval = -ENODEV; + goto exit; + } else if (context->display_isopen) { + retval = -EBUSY; + goto exit; + } + + if (sscanf(buf, "%u %u %u %u %u %u %u", &year, &month, &day, &dow, + &hour, &minute, &second) != 7) { + retval = -EINVAL; + goto exit; + } + + if ((month < 1 || month > 12) || + (day < 1 || day > 31) || (dow > 6) || + (hour > 23) || (minute > 59) || (second > 59)) { + retval = -EINVAL; + goto exit; + } + + retval = send_set_imon_clock(context, year, month, day, dow, + hour, minute, second); + if (retval) + goto exit; + + retval = count; +exit: + mutex_unlock(&context->lock); + + return retval; +} + + +static DEVICE_ATTR(imon_clock, S_IWUSR | S_IRUGO, show_imon_clock, + store_imon_clock); + +static DEVICE_ATTR(associate_remote, S_IWUSR | S_IRUGO, show_associate_remote, + store_associate_remote); + +static struct attribute *imon_display_sysfs_entries[] = { + &dev_attr_imon_clock.attr, + NULL +}; + +static struct attribute_group imon_display_attribute_group = { + .attrs = imon_display_sysfs_entries +}; + +static struct attribute *imon_rf_sysfs_entries[] = { + &dev_attr_associate_remote.attr, + NULL +}; + +static struct attribute_group imon_rf_attribute_group = { + .attrs = imon_rf_sysfs_entries +}; + +/** + * Writes data to the VFD. The iMON VFD is 2x16 characters + * and requires data in 5 consecutive USB interrupt packets, + * each packet but the last carrying 7 bytes. + * + * I don't know if the VFD board supports features such as + * scrolling, clearing rows, blanking, etc. so at + * the caller must provide a full screen of data. If fewer + * than 32 bytes are provided spaces will be appended to + * generate a full screen. + */ +static ssize_t vfd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos) +{ + int i; + int offset; + int seq; + int retval = 0; + struct imon_context *context; + const unsigned char vfd_packet6[] = { + 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF }; + + context = (struct imon_context *)file->private_data; + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + if (!context->dev_present_intf0) { + err("%s: no iMON device present", __func__); + retval = -ENODEV; + goto exit; + } + + if (n_bytes <= 0 || n_bytes > 32) { + err("%s: invalid payload size", __func__); + retval = -EINVAL; + goto exit; + } + + if (copy_from_user(context->tx.data_buf, buf, n_bytes)) { + retval = -EFAULT; + goto exit; + } + + /* Pad with spaces */ + for (i = n_bytes; i < 32; ++i) + context->tx.data_buf[i] = ' '; + + for (i = 32; i < 35; ++i) + context->tx.data_buf[i] = 0xFF; + + offset = 0; + seq = 0; + + do { + memcpy(context->usb_tx_buf, context->tx.data_buf + offset, 7); + context->usb_tx_buf[7] = (unsigned char) seq; + + retval = send_packet(context); + if (retval) { + err("%s: send packet failed for packet #%d", + __func__, seq/2); + goto exit; + } else { + seq += 2; + offset += 7; + } + + } while (offset < 35); + + if (context->vfd_proto_6p) { + /* Send packet #6 */ + memcpy(context->usb_tx_buf, &vfd_packet6, sizeof(vfd_packet6)); + context->usb_tx_buf[7] = (unsigned char) seq; + retval = send_packet(context); + if (retval) + err("%s: send packet failed for packet #%d", + __func__, seq/2); + } + +exit: + mutex_unlock(&context->lock); + + return (!retval) ? n_bytes : retval; +} + +/** + * Writes data to the LCD. The iMON OEM LCD screen excepts 8-byte + * packets. We accept data as 16 hexadecimal digits, followed by a + * newline (to make it easy to drive the device from a command-line + * -- even though the actual binary data is a bit complicated). + * + * The device itself is not a "traditional" text-mode display. It's + * actually a 16x96 pixel bitmap display. That means if you want to + * display text, you've got to have your own "font" and translate the + * text into bitmaps for display. This is really flexible (you can + * display whatever diacritics you need, and so on), but it's also + * a lot more complicated than most LCDs... + */ +static ssize_t lcd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos) +{ + int retval = 0; + struct imon_context *context; + + context = (struct imon_context *)file->private_data; + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + if (!context->display_supported) { + err("%s: no iMON display present", __func__); + retval = -ENODEV; + goto exit; + } + + if (n_bytes != 8) { + err("%s: invalid payload size: %d (expecting 8)", + __func__, (int) n_bytes); + retval = -EINVAL; + goto exit; + } + + if (copy_from_user(context->usb_tx_buf, buf, 8)) { + retval = -EFAULT; + goto exit; + } + + retval = send_packet(context); + if (retval) { + err("%s: send packet failed!", __func__); + goto exit; + } else { + dprintk("%s: write %d bytes to LCD\n", __func__, (int) n_bytes); + } +exit: + mutex_unlock(&context->lock); + return (!retval) ? n_bytes : retval; +} + +/** + * Callback function for USB core API: transmit data + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_tx_callback(struct urb *urb, struct pt_regs *regs) +#else +static void usb_tx_callback(struct urb *urb) +#endif +{ + struct imon_context *context; + + if (!urb) + return; + context = (struct imon_context *)urb->context; + if (!context) + return; + + context->tx.status = urb->status; + + /* notify waiters that write has finished */ + atomic_set(&context->tx.busy, 0); + complete(&context->tx.finished); + + return; +} + +/** + * iMON IR receivers support two different signal sets -- those used by + * the iMON remotes, and those used by the Windows MCE remotes (which is + * really just RC-6), but only one or the other at a time, as the signals + * are decoded onboard the receiver. + */ +static void imon_set_ir_protocol(struct imon_context *context) +{ + int retval; + unsigned char ir_proto_packet[] = + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86 }; + + switch (ir_protocol) { + case IMON_IR_PROTOCOL_MCE: + /* MCE proto not supported on devices without tx control */ + if (!context->tx_control) { + printk(KERN_INFO "%s: MCE IR protocol not supported on " + "this device, using iMON protocol\n", __func__); + context->ir_protocol = IMON_IR_PROTOCOL_IMON; + return; + } + dprintk("Configuring IR receiver for MCE protocol\n"); + ir_proto_packet[0] = 0x01; + context->ir_protocol = IMON_IR_PROTOCOL_MCE; + break; + case IMON_IR_PROTOCOL_IMON: + dprintk("Configuring IR receiver for iMON protocol\n"); + /* ir_proto_packet[0] = 0x00; // already the default */ + context->ir_protocol = IMON_IR_PROTOCOL_IMON; + break; + case IMON_IR_PROTOCOL_IMON_NOPAD: + dprintk("Configuring IR receiver for iMON protocol without " + "PAD stabilize function enabled\n"); + /* ir_proto_packet[0] = 0x00; // already the default */ + context->ir_protocol = IMON_IR_PROTOCOL_IMON_NOPAD; + break; + default: + printk(KERN_INFO "%s: unknown IR protocol specified, will " + "just default to iMON protocol\n", __func__); + context->ir_protocol = IMON_IR_PROTOCOL_IMON; + break; + } + memcpy(context->usb_tx_buf, &ir_proto_packet, + sizeof(ir_proto_packet)); + retval = send_packet(context); + if (retval) + printk(KERN_INFO "%s: failed to set remote type\n", __func__); +} + + +/** + * Called by lirc_dev when the application opens /dev/lirc + */ +static int ir_open(void *data) +{ + int retval = 0; + struct imon_context *context; + + /* prevent races with disconnect */ + mutex_lock(&driver_lock); + + context = (struct imon_context *)data; + + /* initial IR protocol decode variables */ + context->rx.count = 0; + context->rx.initial_space = 1; + context->rx.prev_bit = 0; + + /* set new IR protocol if it has changed since init or last open */ + if (ir_protocol != context->ir_protocol) + imon_set_ir_protocol(context); + + context->ir_isopen = 1; + printk(KERN_INFO MOD_NAME ": IR port opened\n"); + + mutex_unlock(&driver_lock); + return retval; +} + +/** + * Called by lirc_dev when the application closes /dev/lirc + */ +static void ir_close(void *data) +{ + struct imon_context *context; + + context = (struct imon_context *)data; + if (!context) { + err("%s: no context for device", __func__); + return; + } + + mutex_lock(&context->lock); + + context->ir_isopen = 0; + context->ir_isassociating = 0; + MOD_DEC_USE_COUNT; + printk(KERN_INFO MOD_NAME ": IR port closed\n"); + + if (!context->dev_present_intf0) { + /* + * Device disconnected while IR port was still open. Driver + * was not deregistered at disconnect time, so do it now. + */ + deregister_from_lirc(context); + + if (!context->display_isopen) { + mutex_unlock(&context->lock); + free_imon_context(context); + return; + } + /* + * If display port is open, context will be deleted by + * display_close + */ + } + + mutex_unlock(&context->lock); + return; +} + +/** + * Convert bit count to time duration (in us) and submit + * the value to lirc_dev. + */ +static void submit_data(struct imon_context *context) +{ + unsigned char buf[4]; + int value = context->rx.count; + int i; + + dprintk("submitting data to LIRC\n"); + + value *= BIT_DURATION; + value &= PULSE_MASK; + if (context->rx.prev_bit) + value |= PULSE_BIT; + + for (i = 0; i < 4; ++i) + buf[i] = value>>(i*8); + + lirc_buffer_write(context->driver->rbuf, buf); + wake_up(&context->driver->rbuf->wait_poll); + return; +} + +static inline int tv2int(const struct timeval *a, const struct timeval *b) +{ + int usecs = 0; + int sec = 0; + + if (b->tv_usec > a->tv_usec) { + usecs = 1000000; + sec--; + } + + usecs += a->tv_usec - b->tv_usec; + + sec += a->tv_sec - b->tv_sec; + sec *= 1000; + usecs /= 1000; + sec += usecs; + + if (sec < 0) + sec = 1000; + + return sec; +} + +/** + * The directional pad behaves a bit differently, depending on whether this is + * one of the older ffdc devices or a newer device. Newer devices appear to + * have a higher resolution matrix for more precise mouse movement, but it + * makes things overly sensitive in keyboard mode, so we do some interesting + * contortions to make it less touchy. Older devices run through the same + * routine with shorter timeout and a smaller threshold. + */ +static int stabilize(int a, int b, u16 timeout, u16 threshold) +{ + struct timeval ct; + static struct timeval prev_time = {0, 0}; + static struct timeval hit_time = {0, 0}; + static int x, y, prev_result, hits; + int result = 0; + int msec, msec_hit; + + do_gettimeofday(&ct); + msec = tv2int(&ct, &prev_time); + msec_hit = tv2int(&ct, &hit_time); + + if (msec > 100) { + x = 0; + y = 0; + hits = 0; + } + + x += a; + y += b; + + prev_time = ct; + + if (abs(x) > threshold || abs(y) > threshold) { + if (abs(y) > abs(x)) + result = (y > 0) ? 0x7F : 0x80; + else + result = (x > 0) ? 0x7F00 : 0x8000; + + x = 0; + y = 0; + + if (result == prev_result) { + hits++; + + if (hits > 3) { + switch (result) { + case 0x7F: + y = 17 * threshold / 30; + break; + case 0x80: + y -= 17 * threshold / 30; + break; + case 0x7F00: + x = 17 * threshold / 30; + break; + case 0x8000: + x -= 17 * threshold / 30; + break; + } + } + + if (hits == 2 && msec_hit < timeout) { + result = 0; + hits = 1; + } + } else { + prev_result = result; + hits = 1; + hit_time = ct; + } + } + + return result; +} + +/** + * Process the incoming packet + */ +static void imon_incoming_packet(struct imon_context *context, + struct urb *urb, int intf) +{ + int len = urb->actual_length; + unsigned char *buf = urb->transfer_buffer; + char rel_x = 0x00, rel_y = 0x00; + int octet, bit; + unsigned char mask; + int i, chunk_num; + int ts_input = 0; + int dir = 0; + u16 timeout, threshold; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + int mouse_input; + int right_shift = 1; + struct input_dev *mouse = NULL; + struct input_dev *touch = NULL; + const unsigned char toggle_button1[] = { 0x29, 0x91, 0x15, 0xb7 }; + const unsigned char toggle_button2[] = { 0x29, 0x91, 0x35, 0xb7 }; + const unsigned char ch_up[] = { 0x28, 0x93, 0x95, 0xb7 }; + const unsigned char ch_down[] = { 0x28, 0x87, 0x95, 0xb7 }; +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + mouse = context->mouse; + if (context->display_type == IMON_DISPLAY_TYPE_VGA) + touch = context->touch; + + /* keyboard/mouse mode toggle button */ + if (memcmp(buf, toggle_button1, 4) == 0 || + memcmp(buf, toggle_button2, 4) == 0) { + if (!nomouse) { + context->pad_mouse = ~(context->pad_mouse) & 0x1; + dprintk("toggling to %s mode\n", + context->pad_mouse ? "mouse" : "keyboard"); + } else { + context->pad_mouse = 0; + dprintk("mouse mode was disabled by modparam\n"); + } + return; + } + + /* send touchscreen events through input subsystem if touchpad data */ + if (context->display_type == IMON_DISPLAY_TYPE_VGA && len == 8 && + buf[7] == 0x86) { + if (touch == NULL) { + printk(KERN_WARNING "%s: touchscreen input device is " + "NULL!\n", __func__); + return; + } + mod_timer(&context->timer, jiffies + TOUCH_TIMEOUT); + context->touch_x = (buf[0] << 4) | (buf[1] >> 4); + context->touch_y = 0xfff - ((buf[2] << 4) | (buf[1] & 0xf)); + input_report_abs(touch, ABS_X, context->touch_x); + input_report_abs(touch, ABS_Y, context->touch_y); + input_report_key(touch, BTN_TOUCH, 0x01); + input_sync(touch); + ts_input = 1; + + /* send mouse events through input subsystem in mouse mode */ + } else if (context->pad_mouse || !context->ir_isopen) { + /* newer iMON device PAD or mouse button */ + if (!context->ffdc_dev && (buf[0] & 0x01) && len == 5) { + mouse_input = 1; + rel_x = buf[2]; + rel_y = buf[3]; + right_shift = 1; + /* 0xffdc iMON PAD or mouse button input */ + } else if (context->ffdc_dev && (buf[0] & 0x40) && + !((buf[1] & 0x01) || ((buf[1] >> 2) & 0x01))) { + mouse_input = 1; + rel_x = (buf[1] & 0x08) | (buf[1] & 0x10) >> 2 | + (buf[1] & 0x20) >> 4 | (buf[1] & 0x40) >> 6; + if (buf[0] & 0x02) + rel_x |= ~0x0f; + rel_x = rel_x + rel_x / 2; + rel_y = (buf[2] & 0x08) | (buf[2] & 0x10) >> 2 | + (buf[2] & 0x20) >> 4 | (buf[2] & 0x40) >> 6; + if (buf[0] & 0x01) + rel_y |= ~0x0f; + rel_y = rel_y + rel_y / 2; + right_shift = 2; + /* some ffdc devices decode mouse buttons differently... */ + } else if (context->ffdc_dev && (buf[0] == 0x68)) { + mouse_input = 1; + right_shift = 2; + /* ch+/- buttons, which we use for an emulated scroll wheel */ + } else if (!memcmp(buf, ch_up, 4)) { + mouse_input = 1; + dir = 1; + } else if (!memcmp(buf, ch_down, 4)) { + mouse_input = 1; + dir = -1; + } else + mouse_input = 0; + + if (mouse_input) { + if (mouse == NULL) { + printk(KERN_WARNING "%s: mouse input device " + "is NULL!\n", __func__); + return; + } + dprintk("sending mouse data via input subsystem\n"); + + if (dir) { + input_report_rel(mouse, REL_WHEEL, dir); + } else if (rel_x || rel_y) { + input_report_rel(mouse, REL_X, rel_x); + input_report_rel(mouse, REL_Y, rel_y); + } else { + input_report_key(mouse, BTN_LEFT, buf[1] & 0x1); + input_report_key(mouse, BTN_RIGHT, + buf[1] >> right_shift & 0x1); + } + input_sync(mouse); + return; + } + } +#endif + + /* + * at this point, mouse and touchscreen input has been handled, so + * anything else goes to lirc -- bail out if no listening IR client + */ + if (!context->ir_isopen) + return; + + /* + * we need to add some special handling for + * the imon's IR mouse events + */ + if ((len == 5) && (buf[0] == 0x01) && (buf[4] == 0x00)) { + /* first, pad to 8 bytes so it conforms with everything else */ + buf[5] = buf[6] = buf[7] = 0; + len = 8; + timeout = 500; /* in msecs */ + /* (2*threshold) x (2*threshold) square */ + threshold = pad_thresh ? pad_thresh : 28; + rel_x = buf[2]; + rel_y = buf[3]; + + /* + * the imon directional pad functions more like a touchpad. + * Bytes 3 & 4 contain a position coordinate (x,y), with each + * component ranging from -14 to 14. Since this doesn't + * cooperate well with the way lirc works (it would appear to + * lirc as more than 100 different buttons) we need to map it + * to 4 discrete values. Also, when you get too close to + * diagonals, it has a tendancy to jump back and forth, so lets + * try to ignore when they get too close + */ + if (context->ir_protocol == IMON_IR_PROTOCOL_IMON) { + if ((buf[1] == 0) && ((rel_x != 0) || (rel_y != 0))) { + dir = stabilize((int)rel_x, (int)rel_y, + timeout, threshold); + if (!dir) + return; + buf[2] = dir & 0xFF; + buf[3] = (dir >> 8) & 0xFF; + } + } else { + if (abs(rel_y) > abs(rel_x)) { + buf[2] = (rel_y > 0) ? 0x7F : 0x80; + buf[3] = 0; + } else { + buf[2] = 0; + buf[3] = (rel_x > 0) ? 0x7F : 0x80; + } + } + + } else if ((len == 8) && (buf[0] & 0x40) && + !(buf[1] & 0x01 || buf[1] >> 2 & 0x01)) { + /* + * Handle on-board decoded pad events for e.g. older + * VFD/iMON-Pad (15c2:ffdc). The remote generates various codes + * from 0x68nnnnB7 to 0x6AnnnnB7, the left mouse button + * generates 0x688301b7 and the right one 0x688481b7. All other + * keys generate 0x2nnnnnnn. Length has been padded to 8 + * already, position coordinate is encoded in buf[1] and buf[2] + * with reversed endianess. Extract direction from buffer, + * rotate endianess, adjust sign and feed the values into + * stabilize(). The resulting codes will be 0x01008000, + * 0x01007F00, ..., so one can use the normal imon-pad config + * from the remotes dir. + */ + timeout = 10; /* in msecs */ + /* (2*threshold) x (2*threshold) square */ + threshold = pad_thresh ? pad_thresh : 15; + + /* buf[1] is x */ + rel_x = (buf[1] & 0x08) | (buf[1] & 0x10) >> 2 | + (buf[1] & 0x20) >> 4 | (buf[1] & 0x40) >> 6; + if(buf[0] & 0x02) + rel_x |= ~0x10+1; + /* buf[2] is y */ + rel_y = (buf[2] & 0x08) | (buf[2] & 0x10) >> 2 | + (buf[2] & 0x20) >> 4 | (buf[2] & 0x40) >> 6; + if(buf[0] & 0x01) + rel_y |= ~0x10+1; + + buf[0] = 0x01; + buf[1] = buf[4] = buf[5] = buf[6] = buf[7] = 0; + + if (context->ir_protocol == IMON_IR_PROTOCOL_IMON) { + dir = stabilize((int)rel_x, (int)rel_y, + timeout, threshold); + if (!dir) + return; + buf[2] = dir & 0xFF; + buf[3] = (dir >> 8) & 0xFF; + } else { + if (abs(rel_y) > abs(rel_x)) { + buf[2] = (rel_y > 0) ? 0x7F : 0x80; + buf[3] = 0; + } else { + buf[2] = 0; + buf[3] = (rel_x > 0) ? 0x7F : 0x80; + } + } + + } else if (ts_input) { + /* + * this is touchscreen input, which we need to down-sample + * to a 64 button matrix at the moment... + */ + buf[0] = buf[0] >> 5; + buf[1] = 0x00; + buf[2] = buf[2] >> 5; + buf[3] = 0x00; + buf[4] = 0x00; + buf[5] = 0x00; + buf[6] = 0x14; + buf[7] = 0xff; + } + + if (len != 8) { + printk(KERN_WARNING "imon %s: invalid incoming packet " + "size (len = %d, intf%d)\n", __func__, len, intf); + return; + } + + /* iMON 2.4G associate frame */ + if (buf[0] == 0x00 && + buf[2] == 0xFF && /* REFID */ + buf[3] == 0xFF && + buf[4] == 0xFF && + buf[5] == 0xFF && /* iMON 2.4G */ + ((buf[6] == 0x4E && buf[7] == 0xDF) || /* LT */ + (buf[6] == 0x5E && buf[7] == 0xDF))) { /* DT */ + printk(KERN_WARNING "%s: remote associated refid=%02X\n", + __func__, buf[1]); + context->ir_isassociating = 0; + } + + chunk_num = buf[7]; + + if (chunk_num == 0xFF && !ts_input) + return; /* filler frame, no data here */ + + if (buf[0] == 0xFF && + buf[1] == 0xFF && + buf[2] == 0xFF && + buf[3] == 0xFF && + buf[4] == 0xFF && + buf[5] == 0xFF && /* iMON 2.4G */ + ((buf[6] == 0x4E && buf[7] == 0xAF) || /* LT */ + (buf[6] == 0x5E && buf[7] == 0xAF))) /* DT */ + return; /* filler frame, no data here */ + + if (debug) { + if (context->ir_onboard_decode) + printk("intf%d decoded packet: ", intf); + else + printk("raw packet: "); + for (i = 0; i < len; ++i) + printk("%02x ", buf[i]); + printk("\n"); + } + + if (context->ir_onboard_decode) { + /* The signals have been decoded onboard the iMON controller */ + lirc_buffer_write(context->driver->rbuf, buf); + wake_up(&context->driver->rbuf->wait_poll); + return; + } + + /* + * Translate received data to pulse and space lengths. + * Received data is active low, i.e. pulses are 0 and + * spaces are 1. + * + * My original algorithm was essentially similar to + * Changwoo Ryu's with the exception that he switched + * the incoming bits to active high and also fed an + * initial space to LIRC at the start of a new sequence + * if the previous bit was a pulse. + * + * I've decided to adopt his algorithm. + */ + + if (chunk_num == 1 && context->rx.initial_space) { + /* LIRC requires a leading space */ + context->rx.prev_bit = 0; + context->rx.count = 4; + submit_data(context); + context->rx.count = 0; + } + + for (octet = 0; octet < 5; ++octet) { + mask = 0x80; + for (bit = 0; bit < 8; ++bit) { + int curr_bit = !(buf[octet] & mask); + if (curr_bit != context->rx.prev_bit) { + if (context->rx.count) { + submit_data(context); + context->rx.count = 0; + } + context->rx.prev_bit = curr_bit; + } + ++context->rx.count; + mask >>= 1; + } + } + + if (chunk_num == 10) { + if (context->rx.count) { + submit_data(context); + context->rx.count = 0; + } + context->rx.initial_space = context->rx.prev_bit; + } +} + +/** + * report touchscreen input + */ +static void imon_touch_display_timeout(unsigned long data) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + struct imon_context *context = (struct imon_context *)data; + struct input_dev *touch; + + if (!context->display_type == IMON_DISPLAY_TYPE_VGA) + return; + + touch = context->touch; + input_report_abs(touch, ABS_X, context->touch_x); + input_report_abs(touch, ABS_Y, context->touch_y); + input_report_key(touch, BTN_TOUCH, 0x00); + input_sync(touch); +#endif + + return; +} + +/** + * Callback function for USB core API: receive data + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_rx_callback_intf0(struct urb *urb, struct pt_regs *regs) +#else +static void usb_rx_callback_intf0(struct urb *urb) +#endif +{ + struct imon_context *context; + unsigned char *buf; + int len; + int intfnum = 0; + + if (!urb) + return; + + context = (struct imon_context *)urb->context; + if (!context) + return; + + buf = urb->transfer_buffer; + len = urb->actual_length; + + switch (urb->status) { + case -ENOENT: /* usbcore unlink successful! */ + return; + + case 0: + imon_incoming_packet(context, urb, intfnum); + break; + + default: + printk(KERN_WARNING "imon %s: status(%d): ignored\n", + __func__, urb->status); + break; + } + + usb_submit_urb(context->rx_urb_intf0, GFP_ATOMIC); + + return; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_rx_callback_intf1(struct urb *urb, struct pt_regs *regs) +#else +static void usb_rx_callback_intf1(struct urb *urb) +#endif +{ + struct imon_context *context; + unsigned char *buf; + int len; + int intfnum = 1; + + if (!urb) + return; + + context = (struct imon_context *)urb->context; + if (!context) + return; + + buf = urb->transfer_buffer; + len = urb->actual_length; + + switch (urb->status) { + case -ENOENT: /* usbcore unlink successful! */ + return; + + case 0: + imon_incoming_packet(context, urb, intfnum); + break; + + default: + printk(KERN_WARNING "imon %s: status(%d): ignored\n", + __func__, urb->status); + break; + } + + usb_submit_urb(context->rx_urb_intf1, GFP_ATOMIC); + + return; +} + +/** + * Callback function for USB core API: Probe + */ +static int imon_probe(struct usb_interface *interface, + const struct usb_device_id *id) +{ + struct usb_device *usbdev = NULL; + struct usb_host_interface *iface_desc = NULL; + struct usb_endpoint_descriptor *rx_endpoint = NULL; + struct usb_endpoint_descriptor *tx_endpoint = NULL; + struct urb *rx_urb = NULL; + struct urb *tx_urb = NULL; + struct lirc_driver *driver = NULL; + struct lirc_buffer *rbuf = NULL; + struct usb_interface *first_if; + int ifnum; + int lirc_minor = 0; + int num_endpts; + int retval = 0; + int display_ep_found = 0; + int ir_ep_found = 0; + int alloc_status = 0; + int vfd_proto_6p = 0; + int ir_onboard_decode = 0; + int buf_chunk_size = BUF_CHUNK_SIZE; + int code_length; + int tx_control = 0; + struct imon_context *context = NULL; + struct imon_context *first_if_context = NULL; + int i, sysfs_err; + int configured_display_type = IMON_DISPLAY_TYPE_VFD; + u16 vendor, product; + const unsigned char fp_packet[] = { 0x40, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x88 }; + + /* + * Try to auto-detect the type of display if the user hasn't set + * it by hand via the display_type modparam. Default is VFD. + */ + if (display_type == IMON_DISPLAY_TYPE_AUTO) { + if (usb_match_id(interface, lcd_device_list)) + configured_display_type = IMON_DISPLAY_TYPE_LCD; + else if (usb_match_id(interface, imon_touchscreen_list)) + configured_display_type = IMON_DISPLAY_TYPE_VGA; + else if (usb_match_id(interface, ir_only_list)) + configured_display_type = IMON_DISPLAY_TYPE_NONE; + else + configured_display_type = IMON_DISPLAY_TYPE_VFD; + } else { + configured_display_type = display_type; + dprintk("%s: overriding display type to %d via modparam\n", + __func__, display_type); + } + + /* + * If it's the LCD, as opposed to the VFD, we just need to replace + * the "write" file op. + */ + if (configured_display_type == IMON_DISPLAY_TYPE_LCD) + display_fops.write = &lcd_write; + + /* + * To get front panel buttons working properly for newer LCD devices, + * we really do need a larger buffer. + */ + if (usb_match_id(interface, large_buffer_list)) + buf_chunk_size = 2 * BUF_CHUNK_SIZE; + + code_length = buf_chunk_size * 8; + + usbdev = usb_get_dev(interface_to_usbdev(interface)); + iface_desc = interface->cur_altsetting; + num_endpts = iface_desc->desc.bNumEndpoints; + ifnum = iface_desc->desc.bInterfaceNumber; + vendor = le16_to_cpu(usbdev->descriptor.idVendor); + product = le16_to_cpu(usbdev->descriptor.idProduct); + + dprintk("%s: found iMON device (%04x:%04x, intf%d)\n", + __func__, vendor, product, ifnum); + + /* prevent races probing devices w/multiple interfaces */ + mutex_lock(&driver_lock); + + first_if = usb_ifnum_to_if(usbdev, 0); + first_if_context = (struct imon_context *)usb_get_intfdata(first_if); + + /* + * Scan the endpoint list and set: + * first input endpoint = IR endpoint + * first output endpoint = display endpoint + */ + for (i = 0; i < num_endpts && !(ir_ep_found && display_ep_found); ++i) { + struct usb_endpoint_descriptor *ep; + int ep_dir; + int ep_type; + ep = &iface_desc->endpoint[i].desc; + ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK; + ep_type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + + if (!ir_ep_found && + ep_dir == USB_DIR_IN && + ep_type == USB_ENDPOINT_XFER_INT) { + + rx_endpoint = ep; + ir_ep_found = 1; + dprintk("%s: found IR endpoint\n", __func__); + + } else if (!display_ep_found && + ep_dir == USB_DIR_OUT && + ep_type == USB_ENDPOINT_XFER_INT) { + tx_endpoint = ep; + display_ep_found = 1; + dprintk("%s: found display endpoint\n", __func__); + } + } + + /* + * If we didn't find a display endpoint, this is probably one of the + * newer iMON devices that use control urb instead of interrupt + */ + if (!display_ep_found) { + if (usb_match_id(interface, ctl_ep_device_list)) { + tx_control = 1; + display_ep_found = 1; + dprintk("%s: device uses control endpoint, not " + "interface OUT endpoint\n", __func__); + } + } + + /* + * Some iMON receivers have no display. Unfortunately, it seems + * that SoundGraph recycles device IDs between devices both with + * and without... :\ + */ + if (configured_display_type == IMON_DISPLAY_TYPE_NONE) { + display_ep_found = 0; + dprintk("%s: device has no display\n", __func__); + } + + /* + * iMON Touch devices have a VGA touchscreen, but no "display", as + * that refers to e.g. /dev/lcd0 (a character device LCD or VFD). + */ + if (configured_display_type == IMON_DISPLAY_TYPE_VGA) { + display_ep_found = 0; + dprintk("%s: iMON Touch device found\n", __func__); + } + + /* Input endpoint is mandatory */ + if (!ir_ep_found) { + err("%s: no valid input (IR) endpoint found.", __func__); + retval = -ENODEV; + goto exit; + } else { + /* Determine if the IR signals are decoded onboard */ + if (usb_match_id(interface, ir_onboard_decode_list)) + ir_onboard_decode = 1; + + dprintk("%s: ir_onboard_decode: %d\n", + __func__, ir_onboard_decode); + } + + /* Determine if display requires 6 packets */ + if (display_ep_found) { + if (usb_match_id(interface, vfd_proto_6p_list)) + vfd_proto_6p = 1; + + dprintk("%s: vfd_proto_6p: %d\n", + __func__, vfd_proto_6p); + } + + if (ifnum == 0) { + context = kzalloc(sizeof(struct imon_context), GFP_KERNEL); + if (!context) { + err("%s: kzalloc failed for context", __func__); + alloc_status = 1; + goto alloc_status_switch; + } + driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL); + if (!driver) { + err("%s: kzalloc failed for lirc_driver", __func__); + alloc_status = 2; + goto alloc_status_switch; + } + rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL); + if (!rbuf) { + err("%s: kmalloc failed for lirc_buffer", __func__); + alloc_status = 3; + goto alloc_status_switch; + } + if (lirc_buffer_init(rbuf, buf_chunk_size, BUF_SIZE)) { + err("%s: lirc_buffer_init failed", __func__); + alloc_status = 4; + goto alloc_status_switch; + } + rx_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!rx_urb) { + err("%s: usb_alloc_urb failed for IR urb", __func__); + alloc_status = 5; + goto alloc_status_switch; + } + tx_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!tx_urb) { + err("%s: usb_alloc_urb failed for display urb", + __func__); + alloc_status = 6; + goto alloc_status_switch; + } + + mutex_init(&context->lock); + context->vfd_proto_6p = vfd_proto_6p; + context->ir_onboard_decode = ir_onboard_decode; + + strcpy(driver->name, MOD_NAME); + driver->minor = -1; + driver->code_length = ir_onboard_decode ? + code_length : sizeof(int) * 8; + driver->sample_rate = 0; + driver->features = (ir_onboard_decode) ? + LIRC_CAN_REC_LIRCCODE : LIRC_CAN_REC_MODE2; + driver->data = context; + driver->rbuf = rbuf; + driver->set_use_inc = ir_open; + driver->set_use_dec = ir_close; +#ifdef LIRC_HAVE_SYSFS + driver->dev = &interface->dev; +#endif + driver->owner = THIS_MODULE; + + mutex_lock(&context->lock); + + context->driver = driver; + /* start out in keyboard mode */ + context->pad_mouse = 0; + + init_timer(&context->timer); + context->timer.data = (unsigned long)context; + context->timer.function = imon_touch_display_timeout; + + lirc_minor = lirc_register_driver(driver); + if (lirc_minor < 0) { + err("%s: lirc_register_driver failed", __func__); + alloc_status = 7; + goto alloc_status_switch; + } else + printk(KERN_INFO MOD_NAME ": Registered iMON driver " + "(lirc minor: %d)\n", lirc_minor); + + /* Needed while unregistering! */ + driver->minor = lirc_minor; + + } else { + /* this is the secondary interface on the device */ + if (first_if_context->driver) { + rx_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!rx_urb) { + err("%s: usb_alloc_urb failed for IR urb", + __func__); + alloc_status = 5; + goto alloc_status_switch; + } + + context = first_if_context; + } + mutex_lock(&context->lock); + } + + if (ifnum == 0) { + context->usbdev_intf0 = usbdev; + context->dev_present_intf0 = 1; + context->rx_endpoint_intf0 = rx_endpoint; + context->rx_urb_intf0 = rx_urb; + + /* + * tx is used to send characters to lcd/vfd, associate RF + * remotes, set IR protocol, and maybe more... + */ + context->tx_endpoint = tx_endpoint; + context->tx_urb = tx_urb; + context->tx_control = tx_control; + + if (display_ep_found) + context->display_supported = 1; + + if (product == 0xffdc) + context->ffdc_dev = 1; + + context->display_type = configured_display_type; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + context->mouse = input_allocate_device(); + + snprintf(context->name_mouse, sizeof(context->name_mouse), + "iMON PAD IR Mouse (%04x:%04x)", + vendor, product); + context->mouse->name = context->name_mouse; + + usb_make_path(usbdev, context->phys_mouse, sizeof(context->phys_mouse)); + strlcat(context->phys_mouse, "/input0", sizeof(context->phys_mouse)); + context->mouse->phys = context->phys_mouse; + + context->mouse->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL); + context->mouse->keybit[BIT_WORD(BTN_MOUSE)] = + BIT_MASK(BTN_LEFT) | BIT_MASK(BTN_RIGHT) | + BIT_MASK(BTN_MIDDLE) | BIT_MASK(BTN_SIDE) | + BIT_MASK(BTN_EXTRA); + context->mouse->relbit[0] = BIT_MASK(REL_X) | BIT_MASK(REL_Y) | + BIT_MASK(REL_WHEEL); + + input_set_drvdata(context->mouse, context); + + usb_to_input_id(usbdev, &context->mouse->id); + context->mouse->dev.parent = &interface->dev; + retval = input_register_device(context->mouse); + if (retval) + printk(KERN_INFO "%s: pad mouse input device setup failed\n", + __func__); +#endif + + usb_fill_int_urb(context->rx_urb_intf0, context->usbdev_intf0, + usb_rcvintpipe(context->usbdev_intf0, + context->rx_endpoint_intf0->bEndpointAddress), + context->usb_rx_buf, sizeof(context->usb_rx_buf), + usb_rx_callback_intf0, context, + context->rx_endpoint_intf0->bInterval); + + retval = usb_submit_urb(context->rx_urb_intf0, GFP_KERNEL); + + if (retval) { + err("%s: usb_submit_urb failed for intf0 (%d)", + __func__, retval); + mutex_unlock(&context->lock); + goto exit; + } + + } else { + context->usbdev_intf1 = usbdev; + context->dev_present_intf1 = 1; + context->rx_endpoint_intf1 = rx_endpoint; + context->rx_urb_intf1 = rx_urb; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + if (context->display_type == IMON_DISPLAY_TYPE_VGA) { + context->touch = input_allocate_device(); + + snprintf(context->name_touch, sizeof(context->name_touch), + "iMON USB Touchscreen (%04x:%04x)", + vendor, product); + context->touch->name = context->name_touch; + + usb_make_path(usbdev, context->phys_touch, + sizeof(context->phys_touch)); + strlcat(context->phys_touch, "/input1", + sizeof(context->phys_touch)); + context->touch->phys = context->phys_touch; + + context->touch->evbit[0] = + BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); + context->touch->keybit[BIT_WORD(BTN_TOUCH)] = + BIT_MASK(BTN_TOUCH); + input_set_abs_params(context->touch, ABS_X, + 0x00, 0xfff, 0, 0); + input_set_abs_params(context->touch, ABS_Y, + 0x00, 0xfff, 0, 0); + + input_set_drvdata(context->touch, context); + + usb_to_input_id(usbdev, &context->touch->id); + context->touch->dev.parent = &interface->dev; + retval = input_register_device(context->touch); + if (retval) + printk(KERN_INFO "%s: touchscreen input device setup failed\n", + __func__); + } else + context->touch = NULL; +#endif + + usb_fill_int_urb(context->rx_urb_intf1, context->usbdev_intf1, + usb_rcvintpipe(context->usbdev_intf1, + context->rx_endpoint_intf1->bEndpointAddress), + context->usb_rx_buf, sizeof(context->usb_rx_buf), + usb_rx_callback_intf1, context, + context->rx_endpoint_intf1->bInterval); + + retval = usb_submit_urb(context->rx_urb_intf1, GFP_KERNEL); + + if (retval) { + err("%s: usb_submit_urb failed for intf1 (%d)", + __func__, retval); + mutex_unlock(&context->lock); + goto exit; + } + } + + usb_set_intfdata(interface, context); + + /* RF products *also* use 0xffdc... sigh... */ + if (context->ffdc_dev) { + sysfs_err = sysfs_create_group(&interface->dev.kobj, + &imon_rf_attribute_group); + if (sysfs_err) + err("%s: Could not create RF sysfs entries(%d)", + __func__, sysfs_err); + } + + if (context->display_supported && ifnum == 0) { + dprintk("%s: Registering iMON display with sysfs\n", __func__); + + /* set up sysfs entry for built-in clock */ + sysfs_err = sysfs_create_group(&interface->dev.kobj, + &imon_display_attribute_group); + if (sysfs_err) + err("%s: Could not create display sysfs entries(%d)", + __func__, sysfs_err); + + if (usb_register_dev(interface, &imon_class)) { + /* Not a fatal error, so ignore */ + printk(KERN_INFO "%s: could not get a minor number for " + "display\n", __func__); + } + + /* Enable front-panel buttons and/or knobs */ + memcpy(context->usb_tx_buf, &fp_packet, sizeof(fp_packet)); + retval = send_packet(context); + /* Not fatal, but warn about it */ + if (retval) + printk(KERN_INFO "%s: failed to enable front-panel " + "buttons and/or knobs\n", __func__); + } + + /* set IR protocol/remote type */ + imon_set_ir_protocol(context); + + printk(KERN_INFO MOD_NAME ": iMON device (%04x:%04x, intf%d) on " + "usb<%d:%d> initialized\n", vendor, product, ifnum, + usbdev->bus->busnum, usbdev->devnum); + +alloc_status_switch: + mutex_unlock(&context->lock); + + switch (alloc_status) { + case 7: + usb_free_urb(tx_urb); + case 6: + usb_free_urb(rx_urb); + case 5: + if (rbuf) + lirc_buffer_free(rbuf); + case 4: + kfree(rbuf); + case 3: + kfree(driver); + case 2: + kfree(context); + context = NULL; + case 1: + retval = -ENOMEM; + break; + case 0: + retval = 0; + } + +exit: + mutex_unlock(&driver_lock); + + return retval; +} + +/** + * Callback function for USB core API: disconnect + */ +static void imon_disconnect(struct usb_interface *interface) +{ + struct imon_context *context; + int ifnum; + + /* prevent races with ir_open()/display_open() */ + mutex_lock(&driver_lock); + + context = usb_get_intfdata(interface); + ifnum = interface->cur_altsetting->desc.bInterfaceNumber; + + mutex_lock(&context->lock); + + /* + * sysfs_remove_group is safe to call even if sysfs_create_group + * hasn't been called + */ + sysfs_remove_group(&interface->dev.kobj, + &imon_display_attribute_group); + sysfs_remove_group(&interface->dev.kobj, + &imon_rf_attribute_group); + + usb_set_intfdata(interface, NULL); + + /* Abort ongoing write */ + if (atomic_read(&context->tx.busy)) { + usb_kill_urb(context->tx_urb); + complete_all(&context->tx.finished); + } + + if (ifnum == 0) { + context->dev_present_intf0 = 0; + usb_kill_urb(context->rx_urb_intf0); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + input_unregister_device(context->mouse); +#endif + if (context->display_supported) + usb_deregister_dev(interface, &imon_class); + } else { + context->dev_present_intf1 = 0; + usb_kill_urb(context->rx_urb_intf1); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + if (context->display_type == IMON_DISPLAY_TYPE_VGA) + input_unregister_device(context->touch); +#endif + } + + if (!context->ir_isopen && !context->dev_present_intf0 && + !context->dev_present_intf1) { + del_timer_sync(&context->timer); + deregister_from_lirc(context); + mutex_unlock(&context->lock); + if (!context->display_isopen) + free_imon_context(context); + } else + mutex_unlock(&context->lock); + + mutex_unlock(&driver_lock); + + printk(KERN_INFO "%s: iMON device (intf%d) disconnected\n", + __func__, ifnum); +} + +static int imon_suspend(struct usb_interface *intf, pm_message_t message) +{ + struct imon_context *context = usb_get_intfdata(intf); + int ifnum = intf->cur_altsetting->desc.bInterfaceNumber; + + if (ifnum == 0) + usb_kill_urb(context->rx_urb_intf0); + else + usb_kill_urb(context->rx_urb_intf1); + + return 0; +} + +static int imon_resume(struct usb_interface *intf) +{ + int rc = 0; + struct imon_context *context = usb_get_intfdata(intf); + int ifnum = intf->cur_altsetting->desc.bInterfaceNumber; + + if (ifnum == 0) { + usb_fill_int_urb(context->rx_urb_intf0, context->usbdev_intf0, + usb_rcvintpipe(context->usbdev_intf0, + context->rx_endpoint_intf0->bEndpointAddress), + context->usb_rx_buf, sizeof(context->usb_rx_buf), + usb_rx_callback_intf0, context, + context->rx_endpoint_intf0->bInterval); + + rc = usb_submit_urb(context->rx_urb_intf0, GFP_ATOMIC); + + } else { + usb_fill_int_urb(context->rx_urb_intf1, context->usbdev_intf1, + usb_rcvintpipe(context->usbdev_intf1, + context->rx_endpoint_intf1->bEndpointAddress), + context->usb_rx_buf, sizeof(context->usb_rx_buf), + usb_rx_callback_intf1, context, + context->rx_endpoint_intf1->bInterval); + + rc = usb_submit_urb(context->rx_urb_intf1, GFP_ATOMIC); + } + + return rc; +} + +static int __init imon_init(void) +{ + int rc; + + printk(KERN_INFO MOD_NAME ": " MOD_DESC ", v" MOD_VERSION "\n"); + + rc = usb_register(&imon_driver); + if (rc) { + err("%s: usb register failed(%d)", __func__, rc); + return -ENODEV; + } + + return 0; +} + +static void __exit imon_exit(void) +{ + usb_deregister(&imon_driver); + printk(KERN_INFO MOD_NAME ": module removed. Goodbye!\n"); +} + +module_init(imon_init); +module_exit(imon_exit); --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ttusbir/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ttusbir/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_TTUSBIR) += lirc_ttusbir.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ttusbir/lirc_ttusbir.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ttusbir/lirc_ttusbir.c @@ -0,0 +1,410 @@ +/* + * lirc_ttusbir.c + * + * lirc_ttusbir - LIRC device driver for the TechnoTrend USB IR Receiver + * + * Copyright (C) 2007 Stefan Macher + * + * This LIRC driver provides access to the TechnoTrend USB IR Receiver. + * The receiver delivers the IR signal as raw sampled true/false data in + * isochronous USB packets each of size 128 byte. + * Currently the driver reduces the sampling rate by factor of 8 as this + * is still more than enough to decode RC-5 - others should be analyzed. + * But the driver does not rely on RC-5 it should be able to decode every + * IR signal that is not too fast. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +MODULE_DESCRIPTION("TechnoTrend USB IR device driver for LIRC"); +MODULE_AUTHOR("Stefan Macher (st_maker-lirc@yahoo.de)"); +MODULE_LICENSE("GPL"); + +/* #define DEBUG */ +#ifdef DEBUG +#define DPRINTK printk +#else +#define DPRINTK(_x_, a...) +#endif + +/* function declarations */ +static int probe(struct usb_interface *intf, const struct usb_device_id *id); +static void disconnect(struct usb_interface *intf); +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void urb_complete(struct urb *urb, struct pt_regs *pt_regs); +#else +static void urb_complete(struct urb *urb); +#endif +static int set_use_inc(void *data); +static void set_use_dec(void *data); + +static int num_urbs = 2; +module_param(num_urbs, int, S_IRUGO); +MODULE_PARM_DESC(num_urbs, + "Number of URBs in queue. Try to increase to 4 in case " + "of problems (default: 2; minimum: 2)"); + +/* table of devices that work with this driver */ +static struct usb_device_id device_id_table[] = { + /* TechnoTrend USB IR Receiver */ + { USB_DEVICE(0x0B48, 0x2003) }, + /* Terminating entry */ + { } +}; +MODULE_DEVICE_TABLE(usb, device_id_table); + +/* USB driver definition */ +static struct usb_driver usb_driver = { + .name = "TTUSBIR", + .id_table = &(device_id_table[0]), + .probe = probe, + .disconnect = disconnect, +}; + +/* USB device definition */ +struct ttusbir_device { + struct usb_driver *usb_driver; + struct usb_device *udev; + struct usb_interface *interf; + struct usb_class_driver class_driver; + unsigned int ifnum; /* Interface number to use */ + unsigned int alt_setting; /* alternate setting to use */ + unsigned int endpoint; /* Endpoint to use */ + struct urb **urb; /* num_urb URB pointers*/ + char **buffer; /* 128 byte buffer for each URB */ + struct lirc_buffer rbuf; /* Buffer towards LIRC */ + struct lirc_driver driver; + int minor; + int last_pulse; /* remembers if last received byte was pulse or space */ + int last_num; /* remembers how many last bytes appeared */ + int opened; +}; + +/*** LIRC specific functions ***/ +static int set_use_inc(void *data) +{ + int i, retval; + struct ttusbir_device *ttusbir = data; + + DPRINTK("Sending first URBs\n"); + /* @TODO Do I need to check if I am already opened */ + ttusbir->opened = 1; + + for (i = 0; i < num_urbs; i++) { + retval = usb_submit_urb(ttusbir->urb[i], GFP_KERNEL); + if (retval) { + err("%s: usb_submit_urb failed on urb %d", + __func__, i); + return retval; + } + } + return 0; +} + +static void set_use_dec(void *data) +{ + struct ttusbir_device *ttusbir = data; + + DPRINTK("Device closed\n"); + + ttusbir->opened = 0; +} + +/*** USB specific functions ***/ + +/* + * This mapping table is used to do a very simple filtering of the + * input signal. + * For a value with at least 4 bits set it returns 0xFF otherwise + * 0x00. For faster IR signals this can not be used. But for RC-5 we + * still have about 14 samples per pulse/space, i.e. we sample with 14 + * times higher frequency than the signal frequency + */ +const unsigned char map_table[] = +{ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF +}; + +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void urb_complete(struct urb *urb, struct pt_regs *pt_regs) +#else +static void urb_complete(struct urb *urb) +#endif +{ + struct ttusbir_device *ttusbir; + unsigned char *buf; + int i; + lirc_t l; + + ttusbir = urb->context; + + if (!ttusbir->opened) + return; + + buf = (unsigned char *)urb->transfer_buffer; + + for (i = 0; i < 128; i++) { + /* Here we do the filtering and some kind of down sampling */ + buf[i] = ~map_table[buf[i]]; + if (ttusbir->last_pulse == buf[i]) { + if (ttusbir->last_num < PULSE_MASK/63) + ttusbir->last_num++; + /* + * else we are in a idle period and do not need to + * increment any longer + */ + } else { + l = ttusbir->last_num * 62; /* about 62 = us/byte */ + if (ttusbir->last_pulse) /* pulse or space? */ + l |= PULSE_BIT; + if (!lirc_buffer_full(&ttusbir->rbuf)) { + lirc_buffer_write(&ttusbir->rbuf, (void *)&l); + wake_up_interruptible(&ttusbir->rbuf.wait_poll); + } + ttusbir->last_num = 0; + ttusbir->last_pulse = buf[i]; + } + } + usb_submit_urb(urb, GFP_ATOMIC); /* keep data rolling :-) */ +} + +/* + * Called whenever the USB subsystem thinks we could be the right driver + * to handle this device + */ +static int probe(struct usb_interface *intf, const struct usb_device_id *id) +{ + int alt_set, endp; + int found = 0; + int i, j; + int struct_size; + struct usb_host_interface *host_interf; + struct usb_interface_descriptor *interf_desc; + struct usb_host_endpoint *host_endpoint; + struct ttusbir_device *ttusbir; + + DPRINTK("Module ttusbir probe\n"); + + /* To reduce memory fragmentation we use only one allocation */ + struct_size = sizeof(struct ttusbir_device) + + (sizeof(struct urb *) * num_urbs) + + (sizeof(char *) * num_urbs) + + (num_urbs * 128); + ttusbir = kzalloc(struct_size, GFP_KERNEL); + if (!ttusbir) + return -ENOMEM; + + ttusbir->urb = (struct urb **)((char *)ttusbir + + sizeof(struct ttusbir_device)); + ttusbir->buffer = (char **)((char *)ttusbir->urb + + (sizeof(struct urb *) * num_urbs)); + for (i = 0; i < num_urbs; i++) + ttusbir->buffer[i] = (char *)ttusbir->buffer + + (sizeof(char *)*num_urbs) + (i * 128); + + ttusbir->usb_driver = &usb_driver; + ttusbir->alt_setting = -1; + /* @TODO check if error can be returned */ + ttusbir->udev = usb_get_dev(interface_to_usbdev(intf)); + ttusbir->interf = intf; + ttusbir->last_pulse = 0x00; + ttusbir->last_num = 0; + + /* + * Now look for interface setting we can handle + * We are searching for the alt setting where end point + * 0x82 has max packet size 16 + */ + for (alt_set = 0; alt_set < intf->num_altsetting && !found; alt_set++) { + host_interf = &intf->altsetting[alt_set]; + interf_desc = &host_interf->desc; + for (endp = 0; endp < interf_desc->bNumEndpoints; endp++) { + host_endpoint = &host_interf->endpoint[endp]; + if ((host_endpoint->desc.bEndpointAddress == 0x82) && + (host_endpoint->desc.wMaxPacketSize == 0x10)) { + ttusbir->alt_setting = alt_set; + ttusbir->endpoint = endp; + found = 1; + break; + } + } + } + if (ttusbir->alt_setting != -1) + DPRINTK("alt setting: %d\n", ttusbir->alt_setting); + else { + err("Could not find alternate setting\n"); + kfree(ttusbir); + return -EINVAL; + } + + /* OK lets setup this interface setting */ + usb_set_interface(ttusbir->udev, 0, ttusbir->alt_setting); + + /* Store device info in interface structure */ + usb_set_intfdata(intf, ttusbir); + + /* Register as a LIRC driver */ + if (lirc_buffer_init(&ttusbir->rbuf, sizeof(lirc_t), 256) < 0) { + err("Could not get memory for LIRC data buffer\n"); + usb_set_intfdata(intf, NULL); + kfree(ttusbir); + return -ENOMEM; + } + strcpy(ttusbir->driver.name, "TTUSBIR"); + ttusbir->driver.minor = -1; + ttusbir->driver.code_length = 1; + ttusbir->driver.sample_rate = 0; + ttusbir->driver.data = ttusbir; + ttusbir->driver.add_to_buf = NULL; +#ifndef LIRC_REMOVE_DURING_EXPORT + ttusbir->driver.get_queue = NULL; +#endif + ttusbir->driver.rbuf = &ttusbir->rbuf; + ttusbir->driver.set_use_inc = set_use_inc; + ttusbir->driver.set_use_dec = set_use_dec; + ttusbir->driver.fops = NULL; + ttusbir->driver.dev = &intf->dev; + ttusbir->driver.owner = THIS_MODULE; + ttusbir->driver.features = LIRC_CAN_REC_MODE2; + ttusbir->minor = lirc_register_driver(&ttusbir->driver); + if (ttusbir->minor < 0) { + err("Error registering as LIRC driver\n"); + usb_set_intfdata(intf, NULL); + lirc_buffer_free(&ttusbir->rbuf); + kfree(ttusbir); + return -EIO; + } + + /* Allocate and setup the URB that we will use to talk to the device */ + for (i = 0; i < num_urbs; i++) { + ttusbir->urb[i] = usb_alloc_urb(8, GFP_KERNEL); + if (!ttusbir->urb[i]) { + err("Could not allocate memory for the URB\n"); + for (j = i - 1; j >= 0; j--) + kfree(ttusbir->urb[j]); + lirc_buffer_free(&ttusbir->rbuf); + lirc_unregister_driver(ttusbir->minor); + kfree(ttusbir); + usb_set_intfdata(intf, NULL); + return -ENOMEM; + } + ttusbir->urb[i]->dev = ttusbir->udev; + ttusbir->urb[i]->context = ttusbir; + ttusbir->urb[i]->pipe = usb_rcvisocpipe(ttusbir->udev, + ttusbir->endpoint); + ttusbir->urb[i]->interval = 1; + ttusbir->urb[i]->transfer_flags = URB_ISO_ASAP; + ttusbir->urb[i]->transfer_buffer = &ttusbir->buffer[i][0]; + ttusbir->urb[i]->complete = urb_complete; + ttusbir->urb[i]->number_of_packets = 8; + ttusbir->urb[i]->transfer_buffer_length = 128; + for (j = 0; j < 8; j++) { + ttusbir->urb[i]->iso_frame_desc[j].offset = j*16; + ttusbir->urb[i]->iso_frame_desc[j].length = 16; + } + } + return 0; +} + +/** + * Called when the driver is unloaded or the device is unplugged + */ +static void disconnect(struct usb_interface *intf) +{ + int i; + struct ttusbir_device *ttusbir; + + DPRINTK("Module ttusbir disconnect\n"); + + ttusbir = (struct ttusbir_device *) usb_get_intfdata(intf); + usb_set_intfdata(intf, NULL); + lirc_unregister_driver(ttusbir->minor); + DPRINTK("unregistered\n"); + + for (i = 0; i < num_urbs; i++) { + usb_kill_urb(ttusbir->urb[i]); + usb_free_urb(ttusbir->urb[i]); + } + DPRINTK("URBs killed\n"); + lirc_buffer_free(&ttusbir->rbuf); + kfree(ttusbir); +} + +static int ttusbir_init_module(void) +{ + int result; + + DPRINTK(KERN_DEBUG "Module ttusbir init\n"); + + /* register this driver with the USB subsystem */ + result = usb_register(&usb_driver); + if (result) + err("usb_register failed. Error number %d", result); + return result; +} + +static void ttusbir_exit_module(void) +{ + printk(KERN_DEBUG "Module ttusbir exit\n"); + usb_deregister(&usb_driver); +} + +module_init(ttusbir_init_module); +module_exit(ttusbir_exit_module); --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_mceusb/lirc_mceusb.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_mceusb/lirc_mceusb.c @@ -0,0 +1,1289 @@ +/* + * LIRC driver for Windows Media Center Edition USB Infrared Transceivers + * + * (C) by Martin A. Blatter + * + * Transmitter support and reception code cleanup. + * (C) by Daniel Melander + * + * Original lirc_mceusb driver for 1st-gen device: + * Copyright (c) 2003-2004 Dan Conti + * + * Original lirc_mceusb driver deprecated in favor of this driver, which + * supports the 1st-gen device now too. Transmitting on the 1st-gen device + * only functions on port #2 at the moment. + * + * Support for 1st-gen device added June 2009, + * by Jarod Wilson + * + * Initial transmission support for 1st-gen device added August 2009, + * by Patrick Calhoun + * + * Derived from ATI USB driver by Paul Miller and the original + * MCE USB driver by Dan Conti ((and now including chunks of the latter + * relevant to the 1st-gen device initialization) + * + * This driver will only work reliably with kernel version 2.6.10 + * or higher, probably because of differences in USB device enumeration + * in the kernel code. Device initialization fails most of the time + * with earlier kernel versions. + * + ********************************************************************** + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5) +#error "*******************************************************" +#error "Sorry, this driver needs kernel version 2.6.5 or higher" +#error "*******************************************************" +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include +#include +#include + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#define DRIVER_VERSION "1.90" +#define DRIVER_AUTHOR "Daniel Melander , " \ + "Martin Blatter , " \ + "Dan Conti " +#define DRIVER_DESC "Windows Media Center Edition USB IR Transceiver " \ + "driver for LIRC" +#define DRIVER_NAME "lirc_mceusb" + +#define USB_BUFLEN 32 /* USB reception buffer length */ +#define LIRCBUF_SIZE 256 /* LIRC work buffer length */ + +/* MCE constants */ +#define MCE_CMDBUF_SIZE 384 /* MCE Command buffer length */ +#define MCE_TIME_UNIT 50 /* Approx 50us resolution */ +#define MCE_CODE_LENGTH 5 /* Normal length of packet (with header) */ +#define MCE_PACKET_SIZE 4 /* Normal length of packet (without header) */ +#define MCE_PACKET_HEADER 0x84 /* Actual header format is 0x80 + num_bytes */ +#define MCE_CONTROL_HEADER 0x9F /* MCE status header */ +#define MCE_TX_HEADER_LENGTH 3 /* # of bytes in the initializing tx header */ +#define MCE_MAX_CHANNELS 2 /* Two transmitters, hardware dependent? */ +#define MCE_DEFAULT_TX_MASK 0x03 /* Val opts: TX1=0x01, TX2=0x02, ALL=0x03 */ +#define MCE_PULSE_BIT 0x80 /* Pulse bit, MSB set == PULSE else SPACE */ +#define MCE_PULSE_MASK 0x7F /* Pulse mask */ +#define MCE_MAX_PULSE_LENGTH 0x7F /* Longest transmittable pulse symbol */ +#define MCE_PACKET_LENGTH_MASK 0x7F /* Pulse mask */ + + +/* module parameters */ +#ifdef CONFIG_USB_DEBUG +static int debug = 1; +#else +static int debug; +#endif +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG fmt, ## args); \ + } while (0) + +/* general constants */ +#define SEND_FLAG_IN_PROGRESS 1 +#define SEND_FLAG_COMPLETE 2 +#define RECV_FLAG_IN_PROGRESS 3 +#define RECV_FLAG_COMPLETE 4 + +#define MCEUSB_INBOUND 1 +#define MCEUSB_OUTBOUND 2 + +#define VENDOR_PHILIPS 0x0471 +#define VENDOR_SMK 0x0609 +#define VENDOR_TATUNG 0x1460 +#define VENDOR_GATEWAY 0x107b +#define VENDOR_SHUTTLE 0x1308 +#define VENDOR_SHUTTLE2 0x051c +#define VENDOR_MITSUMI 0x03ee +#define VENDOR_TOPSEED 0x1784 +#define VENDOR_RICAVISION 0x179d +#define VENDOR_ITRON 0x195d +#define VENDOR_FIC 0x1509 +#define VENDOR_LG 0x043e +#define VENDOR_MICROSOFT 0x045e +#define VENDOR_FORMOSA 0x147a +#define VENDOR_FINTEK 0x1934 +#define VENDOR_PINNACLE 0x2304 +#define VENDOR_ECS 0x1019 +#define VENDOR_WISTRON 0x0fb8 +#define VENDOR_COMPRO 0x185b +#define VENDOR_NORTHSTAR 0x04eb + +static struct usb_device_id mceusb_dev_table[] = { + /* Original Microsoft MCE IR Transceiver (often HP-branded) */ + { USB_DEVICE(VENDOR_MICROSOFT, 0x006d) }, + /* Philips Infrared Transceiver - Sahara branded */ + { USB_DEVICE(VENDOR_PHILIPS, 0x0608) }, + /* Philips Infrared Transceiver - HP branded */ + { USB_DEVICE(VENDOR_PHILIPS, 0x060c) }, + /* Philips SRM5100 */ + { USB_DEVICE(VENDOR_PHILIPS, 0x060d) }, + /* Philips Infrared Transceiver - Omaura */ + { USB_DEVICE(VENDOR_PHILIPS, 0x060f) }, + /* Philips Infrared Transceiver - Spinel plus */ + { USB_DEVICE(VENDOR_PHILIPS, 0x0613) }, + /* Philips eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_PHILIPS, 0x0815) }, + /* SMK/Toshiba G83C0004D410 */ + { USB_DEVICE(VENDOR_SMK, 0x031d) }, + /* SMK eHome Infrared Transceiver (Sony VAIO) */ + { USB_DEVICE(VENDOR_SMK, 0x0322) }, + /* bundled with Hauppauge PVR-150 */ + { USB_DEVICE(VENDOR_SMK, 0x0334) }, + /* Tatung eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TATUNG, 0x9150) }, + /* Shuttle eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_SHUTTLE, 0xc001) }, + /* Shuttle eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_SHUTTLE2, 0xc001) }, + /* Gateway eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_GATEWAY, 0x3009) }, + /* Mitsumi */ + { USB_DEVICE(VENDOR_MITSUMI, 0x2501) }, + /* Topseed eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TOPSEED, 0x0001) }, + /* Topseed HP eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TOPSEED, 0x0006) }, + /* Topseed eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TOPSEED, 0x0007) }, + /* Topseed eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TOPSEED, 0x0008) }, + /* Topseed eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_TOPSEED, 0x000a) }, + /* Ricavision internal Infrared Transceiver */ + { USB_DEVICE(VENDOR_RICAVISION, 0x0010) }, + /* Itron ione Libra Q-11 */ + { USB_DEVICE(VENDOR_ITRON, 0x7002) }, + /* FIC eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_FIC, 0x9242) }, + /* LG eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_LG, 0x9803) }, + /* Microsoft MCE Infrared Transceiver */ + { USB_DEVICE(VENDOR_MICROSOFT, 0x00a0) }, + /* Formosa eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe015) }, + /* Formosa21 / eHome Infrared Receiver */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe016) }, + /* Formosa aim / Trust MCE Infrared Receiver */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe017) }, + /* Formosa Industrial Computing / Beanbag Emulation Device */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe018) }, + /* Formosa21 / eHome Infrared Receiver */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe03a) }, + /* Formosa Industrial Computing AIM IR605/A */ + { USB_DEVICE(VENDOR_FORMOSA, 0xe03c) }, + /* Fintek eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_FINTEK, 0x0602) }, + /* Fintek eHome Infrared Transceiver (in the AOpen MP45) */ + { USB_DEVICE(VENDOR_FINTEK, 0x0702) }, + /* Pinnacle Remote Kit */ + { USB_DEVICE(VENDOR_PINNACLE, 0x0225) }, + /* Elitegroup Computer Systems IR */ + { USB_DEVICE(VENDOR_ECS, 0x0f38) }, + /* Wistron Corp. eHome Infrared Receiver */ + { USB_DEVICE(VENDOR_WISTRON, 0x0002) }, + /* Compro K100 */ + { USB_DEVICE(VENDOR_COMPRO, 0x3020) }, + /* Compro K100 v2 */ + { USB_DEVICE(VENDOR_COMPRO, 0x3082) }, + /* Northstar Systems eHome Infrared Transceiver */ + { USB_DEVICE(VENDOR_NORTHSTAR, 0xe004) }, + /* Terminating entry */ + { } +}; + +static struct usb_device_id pinnacle_list[] = { + { USB_DEVICE(VENDOR_PINNACLE, 0x0225) }, + {} +}; + +static struct usb_device_id microsoft_gen1_list[] = { + { USB_DEVICE(VENDOR_MICROSOFT, 0x006d) }, + {} +}; + +static struct usb_device_id transmitter_mask_list[] = { + { USB_DEVICE(VENDOR_SMK, 0x031d) }, + { USB_DEVICE(VENDOR_SMK, 0x0322) }, + { USB_DEVICE(VENDOR_SMK, 0x0334) }, + { USB_DEVICE(VENDOR_TOPSEED, 0x0001) }, + { USB_DEVICE(VENDOR_TOPSEED, 0x0006) }, + { USB_DEVICE(VENDOR_TOPSEED, 0x0007) }, + { USB_DEVICE(VENDOR_TOPSEED, 0x0008) }, + { USB_DEVICE(VENDOR_TOPSEED, 0x000a) }, + { USB_DEVICE(VENDOR_PINNACLE, 0x0225) }, + {} +}; + +/* data structure for each usb transceiver */ +struct mceusb_dev { + + /* usb */ + struct usb_device *usbdev; + struct urb *urb_in; + int devnum; + struct usb_endpoint_descriptor *usb_ep_in; + struct usb_endpoint_descriptor *usb_ep_out; + + /* buffers and dma */ + unsigned char *buf_in; + unsigned int len_in; + dma_addr_t dma_in; + dma_addr_t dma_out; + unsigned int overflow_len; + + /* lirc */ + struct lirc_driver *d; + lirc_t lircdata; + unsigned char is_pulse; + struct { + u32 connected:1; + u32 pinnacle:1; + u32 transmitter_mask_inverted:1; + u32 microsoft_gen1:1; + u32 reserved:28; + } flags; + + unsigned char transmitter_mask; + unsigned int carrier_freq; + + /* handle sending (init strings) */ + int send_flags; + wait_queue_head_t wait_out; + + struct mutex lock; +}; + +/* init strings */ +static char init1[] = {0x00, 0xff, 0xaa, 0xff, 0x0b}; +static char init2[] = {0xff, 0x18}; + +static char pin_init1[] = { 0x9f, 0x07}; +static char pin_init2[] = { 0x9f, 0x13}; +static char pin_init3[] = { 0x9f, 0x0d}; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11) +static unsigned long usecs_to_jiffies(const unsigned int u) +{ + if (u > jiffies_to_usecs(MAX_JIFFY_OFFSET)) + return MAX_JIFFY_OFFSET; +#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ) + return (u + (USEC_PER_SEC / HZ) - 1) / (USEC_PER_SEC / HZ); +#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC) + return u * (HZ / USEC_PER_SEC); +#else + return (u * HZ + USEC_PER_SEC - 1) / USEC_PER_SEC; +#endif +} +#endif +static void mceusb_dev_printdata(struct mceusb_dev *ir, char *buf, int len) +{ + char codes[USB_BUFLEN * 3 + 1]; + int i; + + if (len <= 0) + return; + + if (ir->flags.microsoft_gen1 && len <= 2) + return; + + for (i = 0; i < len && i < USB_BUFLEN; i++) + snprintf(codes + i * 3, 4, "%02x ", buf[i] & 0xFF); + + printk(KERN_INFO "" DRIVER_NAME "[%d]: data received %s (length=%d)\n", + ir->devnum, codes, len); +} + +static void usb_async_callback(struct urb *urb, struct pt_regs *regs) +{ + struct mceusb_dev *ir; + int len; + + if (!urb) + return; + + ir = urb->context; + if (ir) { + len = urb->actual_length; + + dprintk(DRIVER_NAME + "[%d]: callback called (status=%d len=%d)\n", + ir->devnum, urb->status, len); + + if (debug) + mceusb_dev_printdata(ir, urb->transfer_buffer, len); + } + +} + +/* request incoming or send outgoing usb packet - used to initialize remote */ +static void request_packet_async(struct mceusb_dev *ir, + struct usb_endpoint_descriptor *ep, + unsigned char *data, int size, int urb_type) +{ + int res; + struct urb *async_urb; + unsigned char *async_buf; + + if (urb_type) { + async_urb = usb_alloc_urb(0, GFP_KERNEL); + if (unlikely(!async_urb)) + return; + + async_buf = kmalloc(size, GFP_KERNEL); + if (!async_buf) { + usb_free_urb(async_urb); + return; + } + + if (urb_type == MCEUSB_OUTBOUND) { + /* outbound data */ + usb_fill_int_urb(async_urb, ir->usbdev, + usb_sndintpipe(ir->usbdev, + ep->bEndpointAddress), + async_buf, size, + (usb_complete_t) usb_async_callback, + ir, ep->bInterval); + memcpy(async_buf, data, size); + } else { + /* inbound data */ + usb_fill_int_urb(async_urb, ir->usbdev, + usb_rcvintpipe(ir->usbdev, + ep->bEndpointAddress), + async_buf, size, + (usb_complete_t) usb_async_callback, + ir, ep->bInterval); + } + async_urb->transfer_flags = URB_ASYNC_UNLINK; + } else { + /* standard request */ + async_urb = ir->urb_in; + ir->send_flags = RECV_FLAG_IN_PROGRESS; + } + + dprintk(DRIVER_NAME "[%d]: receive request called (size=%#x)\n", + ir->devnum, size); + + async_urb->transfer_buffer_length = size; + async_urb->dev = ir->usbdev; + + res = usb_submit_urb(async_urb, GFP_ATOMIC); + if (res) { + dprintk(DRIVER_NAME "[%d]: receive request FAILED! (res=%d)\n", + ir->devnum, res); + return; + } + dprintk(DRIVER_NAME "[%d]: receive request complete (res=%d)\n", + ir->devnum, res); +} + +static int unregister_from_lirc(struct mceusb_dev *ir) +{ + struct lirc_driver *d = ir->d; + int devnum; + int rtn; + + devnum = ir->devnum; + dprintk(DRIVER_NAME "[%d]: unregister from lirc called\n", devnum); + + rtn = lirc_unregister_driver(d->minor); + if (rtn > 0) { + printk(DRIVER_NAME "[%d]: error in lirc_unregister minor: %d\n" + "Trying again...\n", devnum, d->minor); + if (rtn == -EBUSY) { + printk(DRIVER_NAME + "[%d]: device is opened, will unregister" + " on close\n", devnum); + return -EAGAIN; + } + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ); + + rtn = lirc_unregister_driver(d->minor); + if (rtn > 0) + printk(DRIVER_NAME "[%d]: lirc_unregister failed\n", + devnum); + } + + if (rtn) { + printk(DRIVER_NAME "[%d]: didn't free resources\n", devnum); + return -EAGAIN; + } + + printk(DRIVER_NAME "[%d]: usb remote disconnected\n", devnum); + + lirc_buffer_free(d->rbuf); + kfree(d->rbuf); + kfree(d); + kfree(ir); + return 0; +} + +static int mceusb_ir_open(void *data) +{ + struct mceusb_dev *ir = data; + + if (!ir) { + printk(DRIVER_NAME "[?]: %s called with no context\n", + __func__); + return -EIO; + } + dprintk(DRIVER_NAME "[%d]: mceusb IR device opened\n", ir->devnum); + + MOD_INC_USE_COUNT; + if (!ir->flags.connected) { + if (!ir->usbdev) + return -ENOENT; + ir->flags.connected = 1; + } + + return 0; +} + +static void mceusb_ir_close(void *data) +{ + struct mceusb_dev *ir = data; + + if (!ir) { + printk(DRIVER_NAME "[?]: %s called with no context\n", + __func__); + return; + } + dprintk(DRIVER_NAME "[%d]: mceusb IR device closed\n", ir->devnum); + + if (ir->flags.connected) { + mutex_lock(&ir->lock); + ir->flags.connected = 0; + mutex_unlock(&ir->lock); + } + MOD_DEC_USE_COUNT; +} + +static void send_packet_to_lirc(struct mceusb_dev *ir) +{ + if (ir->lircdata) { + lirc_buffer_write(ir->d->rbuf, + (unsigned char *) &ir->lircdata); + wake_up(&ir->d->rbuf->wait_poll); + ir->lircdata = 0; + } +} + +static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len) +{ + int i, j; + int packet_len = 0; + int start_index = 0; + + /* skip meaningless 0xb1 0x60 header bytes on orig receiver */ + if (ir->flags.microsoft_gen1) + start_index = 2; + + /* this should only trigger w/the 1st-gen mce receiver */ + for (i = start_index; i < (start_index + ir->overflow_len) && + i < buf_len; i++) { + /* rising/falling flank */ + if (ir->is_pulse != (ir->buf_in[i] & MCE_PULSE_BIT)) { + send_packet_to_lirc(ir); + ir->is_pulse = ir->buf_in[i] & MCE_PULSE_BIT; + } + + /* accumulate mce pulse/space values */ + ir->lircdata += (ir->buf_in[i] & MCE_PULSE_MASK) * + MCE_TIME_UNIT; + ir->lircdata |= (ir->is_pulse ? PULSE_BIT : 0); + } + start_index += ir->overflow_len; + ir->overflow_len = 0; + + for (i = start_index; i < buf_len; i++) { + /* decode mce packets of the form (84),AA,BB,CC,DD */ + if (ir->buf_in[i] >= 0x80 && ir->buf_in[i] <= 0x9e) { + /* data headers */ + /* decode packet data */ + packet_len = ir->buf_in[i] & MCE_PACKET_LENGTH_MASK; + ir->overflow_len = i + 1 + packet_len - buf_len; + for (j = 1; j <= packet_len && (i + j < buf_len); j++) { + /* rising/falling flank */ + if (ir->is_pulse != + (ir->buf_in[i + j] & MCE_PULSE_BIT)) { + send_packet_to_lirc(ir); + ir->is_pulse = + ir->buf_in[i + j] & + MCE_PULSE_BIT; + } + + /* accumulate mce pulse/space values */ + ir->lircdata += + (ir->buf_in[i + j] & MCE_PULSE_MASK) * + MCE_TIME_UNIT; + ir->lircdata |= (ir->is_pulse ? PULSE_BIT : 0); + } + + i += packet_len; + } else if (ir->buf_in[i] == MCE_CONTROL_HEADER) { + /* status header (0x9F) */ + /* + * A transmission containing one or more consecutive ir + * commands always ends with a GAP of 100ms followed by + * the sequence 0x9F 0x01 0x01 0x9F 0x15 0x00 0x00 0x80 + */ + +#if 0 + Uncomment this if the last 100ms "infinity"-space should be transmitted + to lirc directly instead of at the beginning of the next transmission. + Changes pulse/space order. + + if (++i < buf_len && ir->buf_in[i]==0x01) + send_packet_to_lirc(ir); + +#endif + + /* end decode loop */ + dprintk(DRIVER_NAME "[%d] %s: found control header\n", + ir->devnum, __func__); + ir->overflow_len = 0; + break; + } else { + dprintk(DRIVER_NAME "[%d] %s: stray packet?\n", + ir->devnum, __func__); + ir->overflow_len = 0; + } + } + + return; +} + +static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs) +{ + struct mceusb_dev *ir; + int buf_len; + + if (!urb) + return; + + ir = urb->context; + if (!ir) { + urb->transfer_flags |= URB_ASYNC_UNLINK; + usb_unlink_urb(urb); + return; + } + + buf_len = urb->actual_length; + + if (debug) + mceusb_dev_printdata(ir, urb->transfer_buffer, buf_len); + + if (ir->send_flags == RECV_FLAG_IN_PROGRESS) { + ir->send_flags = SEND_FLAG_COMPLETE; + dprintk(DRIVER_NAME "[%d]: setup answer received %d bytes\n", + ir->devnum, buf_len); + } + + switch (urb->status) { + /* success */ + case 0: + mceusb_process_ir_data(ir, buf_len); + break; + + case -ECONNRESET: + case -ENOENT: + case -ESHUTDOWN: + urb->transfer_flags |= URB_ASYNC_UNLINK; + usb_unlink_urb(urb); + return; + + case -EPIPE: + default: + break; + } + + usb_submit_urb(urb, GFP_ATOMIC); +} + + +static ssize_t mceusb_transmit_ir(struct file *file, const char *buf, + size_t n, loff_t *ppos) +{ + int i, count = 0, cmdcount = 0; + struct mceusb_dev *ir = NULL; + lirc_t wbuf[LIRCBUF_SIZE]; /* Workbuffer with values from lirc */ + unsigned char cmdbuf[MCE_CMDBUF_SIZE]; /* MCE command buffer */ + unsigned long signal_duration = 0; /* Singnal length in us */ + struct timeval start_time, end_time; + + do_gettimeofday(&start_time); + + /* Retrieve lirc_driver data for the device */ + ir = lirc_get_pdata(file); + if (!ir || !ir->usb_ep_out) + return -EFAULT; + + if (n % sizeof(lirc_t)) + return -EINVAL; + count = n / sizeof(lirc_t); + + /* Check if command is within limits */ + if (count > LIRCBUF_SIZE || count%2 == 0) + return -EINVAL; + if (copy_from_user(wbuf, buf, n)) + return -EFAULT; + + /* MCE tx init header */ + cmdbuf[cmdcount++] = MCE_CONTROL_HEADER; + cmdbuf[cmdcount++] = 0x08; + cmdbuf[cmdcount++] = ir->transmitter_mask; + + /* Generate mce packet data */ + for (i = 0; (i < count) && (cmdcount < MCE_CMDBUF_SIZE); i++) { + signal_duration += wbuf[i]; + wbuf[i] = wbuf[i] / MCE_TIME_UNIT; + + do { /* loop to support long pulses/spaces > 127*50us=6.35ms */ + + /* Insert mce packet header every 4th entry */ + if ((cmdcount < MCE_CMDBUF_SIZE) && + (cmdcount - MCE_TX_HEADER_LENGTH) % + MCE_CODE_LENGTH == 0) + cmdbuf[cmdcount++] = MCE_PACKET_HEADER; + + /* Insert mce packet data */ + if (cmdcount < MCE_CMDBUF_SIZE) + cmdbuf[cmdcount++] = + (wbuf[i] < MCE_PULSE_BIT ? + wbuf[i] : MCE_MAX_PULSE_LENGTH) | + (i & 1 ? 0x00 : MCE_PULSE_BIT); + else + return -EINVAL; + } while ((wbuf[i] > MCE_MAX_PULSE_LENGTH) && + (wbuf[i] -= MCE_MAX_PULSE_LENGTH)); + } + + /* Fix packet length in last header */ + cmdbuf[cmdcount - (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH] = + 0x80 + (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH - 1; + + /* Check if we have room for the empty packet at the end */ + if (cmdcount >= MCE_CMDBUF_SIZE) + return -EINVAL; + + /* All mce commands end with an empty packet (0x80) */ + cmdbuf[cmdcount++] = 0x80; + + /* Transmit the command to the mce device */ + request_packet_async(ir, ir->usb_ep_out, cmdbuf, + cmdcount, MCEUSB_OUTBOUND); + + /* + * The lircd gap calculation expects the write function to + * wait the time it takes for the ircommand to be sent before + * it returns. + */ + do_gettimeofday(&end_time); + signal_duration -= (end_time.tv_usec - start_time.tv_usec) + + (end_time.tv_sec - start_time.tv_sec) * 1000000; + + /* delay with the closest number of ticks */ + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(usecs_to_jiffies(signal_duration)); + + return n; +} + +static void set_transmitter_mask(struct mceusb_dev *ir, unsigned int mask) +{ + if (ir->flags.transmitter_mask_inverted) + /* + * The mask begins at 0x02 and has an inverted + * numbering scheme + */ + ir->transmitter_mask = + (mask != 0x03 ? mask ^ 0x03 : mask) << 1; + else + ir->transmitter_mask = mask; +} + + +/* Sets the send carrier frequency */ +static int set_send_carrier(struct mceusb_dev *ir, int carrier) +{ + int clk = 10000000; + int prescaler = 0, divisor = 0; + unsigned char cmdbuf[] = { 0x9F, 0x06, 0x01, 0x80 }; + + /* Carrier is changed */ + if (ir->carrier_freq != carrier) { + + if (carrier <= 0) { + ir->carrier_freq = carrier; + dprintk(DRIVER_NAME "[%d]: SET_CARRIER disabling " + "carrier modulation\n", ir->devnum); + request_packet_async(ir, ir->usb_ep_out, + cmdbuf, sizeof(cmdbuf), + MCEUSB_OUTBOUND); + return carrier; + } + + for (prescaler = 0; prescaler < 4; ++prescaler) { + divisor = (clk >> (2 * prescaler)) / carrier; + if (divisor <= 0xFF) { + ir->carrier_freq = carrier; + cmdbuf[2] = prescaler; + cmdbuf[3] = divisor; + dprintk(DRIVER_NAME "[%d]: SET_CARRIER " + "requesting %d Hz\n", + ir->devnum, carrier); + + /* Transmit new carrier to mce device */ + request_packet_async(ir, ir->usb_ep_out, + cmdbuf, sizeof(cmdbuf), + MCEUSB_OUTBOUND); + return carrier; + } + } + + return -EINVAL; + + } + + return carrier; +} + + +static int mceusb_lirc_ioctl(struct inode *node, struct file *filep, + unsigned int cmd, unsigned long arg) +{ + int result; + unsigned int ivalue; + unsigned long lvalue; + struct mceusb_dev *ir = NULL; + + /* Retrieve lirc_driver data for the device */ + ir = lirc_get_pdata(filep); + if (!ir || !ir->usb_ep_out) + return -EFAULT; + + + switch (cmd) { + case LIRC_SET_TRANSMITTER_MASK: + + result = get_user(ivalue, (unsigned int *) arg); + if (result) + return result; + switch (ivalue) { + case 0x01: /* Transmitter 1 => 0x04 */ + case 0x02: /* Transmitter 2 => 0x02 */ + case 0x03: /* Transmitter 1 & 2 => 0x06 */ + set_transmitter_mask(ir, ivalue); + break; + + default: /* Unsupported transmitter mask */ + return MCE_MAX_CHANNELS; + } + + dprintk(DRIVER_NAME ": SET_TRANSMITTERS mask=%d\n", ivalue); + break; + + case LIRC_GET_SEND_MODE: + + result = put_user(LIRC_SEND2MODE(LIRC_CAN_SEND_PULSE & + LIRC_CAN_SEND_MASK), + (unsigned long *) arg); + + if (result) + return result; + break; + + case LIRC_SET_SEND_MODE: + + result = get_user(lvalue, (unsigned long *) arg); + + if (result) + return result; + if (lvalue != (LIRC_MODE_PULSE&LIRC_CAN_SEND_MASK)) + return -EINVAL; + break; + + case LIRC_SET_SEND_CARRIER: + + result = get_user(ivalue, (unsigned int *) arg); + if (result) + return result; + + set_send_carrier(ir, ivalue); + break; + + default: + return -ENOIOCTLCMD; + } + + return 0; +} + +static struct file_operations lirc_fops = { + .owner = THIS_MODULE, + .write = mceusb_transmit_ir, + .ioctl = mceusb_lirc_ioctl, +}; + +static int mceusb_gen1_init(struct mceusb_dev *ir) +{ + int i, ret; + char junk[64], data[8]; + int partial = 0; + + /* + * Clear off the first few messages. These look like calibration + * or test data, I can't really tell. This also flushes in case + * we have random ir data queued up. + */ + for (i = 0; i < 40; i++) + usb_bulk_msg(ir->usbdev, + usb_rcvbulkpipe(ir->usbdev, + ir->usb_ep_in->bEndpointAddress), + junk, 64, &partial, HZ * 10); + + ir->is_pulse = 1; + + memset(data, 0, 8); + + /* Get Status */ + ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), + USB_REQ_GET_STATUS, USB_DIR_IN, + 0, 0, data, 2, HZ * 3); + + /* ret = usb_get_status( ir->usbdev, 0, 0, data ); */ + dprintk("%s - ret = %d status = 0x%x 0x%x\n", __func__, + ret, data[0], data[1]); + + /* + * This is a strange one. They issue a set address to the device + * on the receive control pipe and expect a certain value pair back + */ + memset(data, 0, 8); + + ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), + USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0, + data, 2, HZ * 3); + dprintk("%s - ret = %d, devnum = %d\n", + __func__, ret, ir->usbdev->devnum); + dprintk("%s - data[0] = %d, data[1] = %d\n", + __func__, data[0], data[1]); + + /* set feature */ + ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), + USB_REQ_SET_FEATURE, USB_TYPE_VENDOR, + 0xc04e, 0x0000, NULL, 0, HZ * 3); + + dprintk("%s - ret = %d\n", __func__, ret); + + /* strange: bRequest == 4 */ + ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), + 4, USB_TYPE_VENDOR, + 0x0808, 0x0000, NULL, 0, HZ * 3); + dprintk("%s - retB = %d\n", __func__, ret); + + /* strange: bRequest == 2 */ + ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0), + 2, USB_TYPE_VENDOR, + 0x0000, 0x0100, NULL, 0, HZ * 3); + dprintk("%s - retC = %d\n", __func__, ret); + + return ret; + +}; + +static int mceusb_dev_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + struct usb_device *dev = interface_to_usbdev(intf); + struct usb_host_interface *idesc; + struct usb_endpoint_descriptor *ep = NULL; + struct usb_endpoint_descriptor *ep_in = NULL; + struct usb_endpoint_descriptor *ep_out = NULL; + struct usb_host_config *config; + struct mceusb_dev *ir = NULL; + struct lirc_driver *driver = NULL; + struct lirc_buffer *rbuf = NULL; + int devnum, pipe, maxp; + int minor = 0; + int i; + char buf[63], name[128] = ""; + int mem_failure = 0; + int is_pinnacle; + int is_microsoft_gen1; + + dprintk(DRIVER_NAME ": %s called\n", __func__); + + usb_reset_device(dev); + + config = dev->actconfig; + + idesc = intf->cur_altsetting; + + is_pinnacle = usb_match_id(intf, pinnacle_list) ? 1 : 0; + + is_microsoft_gen1 = usb_match_id(intf, microsoft_gen1_list) ? 1 : 0; + + /* step through the endpoints to find first bulk in and out endpoint */ + for (i = 0; i < idesc->desc.bNumEndpoints; ++i) { + ep = &idesc->endpoint[i].desc; + + if ((ep_in == NULL) + && ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) + == USB_DIR_IN) + && (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + == USB_ENDPOINT_XFER_BULK) + || ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + == USB_ENDPOINT_XFER_INT))) { + + dprintk(DRIVER_NAME ": acceptable inbound endpoint " + "found\n"); + ep_in = ep; + ep_in->bmAttributes = USB_ENDPOINT_XFER_INT; + if (is_pinnacle) + /* + * setting seems to 1 seem to cause issues with + * Pinnacle timing out on transfer. + */ + ep_in->bInterval = ep->bInterval; + else + ep_in->bInterval = 1; + } + + if ((ep_out == NULL) + && ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) + == USB_DIR_OUT) + && (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + == USB_ENDPOINT_XFER_BULK) + || ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + == USB_ENDPOINT_XFER_INT))) { + + dprintk(DRIVER_NAME ": acceptable outbound endpoint " + "found\n"); + ep_out = ep; + ep_out->bmAttributes = USB_ENDPOINT_XFER_INT; + if (is_pinnacle) + /* + * setting seems to 1 seem to cause issues with + * Pinnacle timing out on transfer. + */ + ep_out->bInterval = ep->bInterval; + else + ep_out->bInterval = 1; + } + } + if (ep_in == NULL || ep_out == NULL) { + dprintk(DRIVER_NAME ": inbound and/or " + "outbound endpoint not found\n"); + return -ENODEV; + } + + devnum = dev->devnum; + pipe = usb_rcvintpipe(dev, ep_in->bEndpointAddress); + maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe)); + + mem_failure = 0; + ir = kzalloc(sizeof(struct mceusb_dev), GFP_KERNEL); + if (!ir) { + mem_failure = 1; + goto mem_failure_switch; + } + + driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL); + if (!driver) { + mem_failure = 2; + goto mem_failure_switch; + } + + rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL); + if (!rbuf) { + mem_failure = 3; + goto mem_failure_switch; + } + + if (lirc_buffer_init(rbuf, sizeof(lirc_t), LIRCBUF_SIZE)) { + mem_failure = 4; + goto mem_failure_switch; + } + + ir->buf_in = usb_buffer_alloc(dev, maxp, GFP_ATOMIC, &ir->dma_in); + if (!ir->buf_in) { + mem_failure = 5; + goto mem_failure_switch; + } + + ir->urb_in = usb_alloc_urb(0, GFP_KERNEL); + if (!ir->urb_in) { + mem_failure = 7; + goto mem_failure_switch; + } + + strcpy(driver->name, DRIVER_NAME " "); + driver->minor = -1; + driver->features = LIRC_CAN_SEND_PULSE | + LIRC_CAN_SET_TRANSMITTER_MASK | + LIRC_CAN_REC_MODE2 | + LIRC_CAN_SET_SEND_CARRIER; + driver->data = ir; + driver->rbuf = rbuf; + driver->set_use_inc = &mceusb_ir_open; + driver->set_use_dec = &mceusb_ir_close; + driver->code_length = sizeof(lirc_t) * 8; + driver->fops = &lirc_fops; + driver->dev = &intf->dev; + driver->owner = THIS_MODULE; + + mutex_init(&ir->lock); + init_waitqueue_head(&ir->wait_out); + + minor = lirc_register_driver(driver); + if (minor < 0) + mem_failure = 9; + +mem_failure_switch: + + switch (mem_failure) { + case 9: + usb_free_urb(ir->urb_in); + case 7: + usb_buffer_free(dev, maxp, ir->buf_in, ir->dma_in); + case 5: + lirc_buffer_free(rbuf); + case 4: + kfree(rbuf); + case 3: + kfree(driver); + case 2: + kfree(ir); + case 1: + printk(DRIVER_NAME "[%d]: out of memory (code=%d)\n", + devnum, mem_failure); + return -ENOMEM; + } + + driver->minor = minor; + ir->d = driver; + ir->devnum = devnum; + ir->usbdev = dev; + ir->len_in = maxp; + ir->overflow_len = 0; + ir->flags.connected = 0; + ir->flags.pinnacle = is_pinnacle; + ir->flags.microsoft_gen1 = is_microsoft_gen1; + ir->flags.transmitter_mask_inverted = + usb_match_id(intf, transmitter_mask_list) ? 0 : 1; + + ir->lircdata = PULSE_MASK; + ir->is_pulse = 0; + + /* ir->flags.transmitter_mask_inverted must be set */ + set_transmitter_mask(ir, MCE_DEFAULT_TX_MASK); + /* Saving usb interface data for use by the transmitter routine */ + ir->usb_ep_in = ep_in; + ir->usb_ep_out = ep_out; + + if (dev->descriptor.iManufacturer + && usb_string(dev, dev->descriptor.iManufacturer, + buf, sizeof(buf)) > 0) + strlcpy(name, buf, sizeof(name)); + if (dev->descriptor.iProduct + && usb_string(dev, dev->descriptor.iProduct, + buf, sizeof(buf)) > 0) + snprintf(name + strlen(name), sizeof(name) - strlen(name), + " %s", buf); + printk(DRIVER_NAME "[%d]: %s on usb%d:%d\n", devnum, name, + dev->bus->busnum, devnum); + + /* inbound data */ + usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in, + maxp, (usb_complete_t) mceusb_dev_recv, ir, ep_in->bInterval); + ir->urb_in->transfer_dma = ir->dma_in; + ir->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + + /* initialize device */ + if (ir->flags.pinnacle) { + int usbret; + + /* + * I have no idea why but this reset seems to be crucial to + * getting the device to do outbound IO correctly - without + * this the device seems to hang, ignoring all input - although + * IR signals are correctly sent from the device, no input is + * interpreted by the device and the host never does the + * completion routine + */ + + usbret = usb_reset_configuration(dev); + printk(DRIVER_NAME "[%d]: usb reset config ret %x\n", + devnum, usbret); + + /* + * its possible we really should wait for a return + * for each of these... + */ + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_out, pin_init1, sizeof(pin_init1), + MCEUSB_OUTBOUND); + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_out, pin_init2, sizeof(pin_init2), + MCEUSB_OUTBOUND); + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_out, pin_init3, sizeof(pin_init3), + MCEUSB_OUTBOUND); + } else if (ir->flags.microsoft_gen1) { + /* original ms mce device requires some additional setup */ + mceusb_gen1_init(ir); + } else { + + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_out, init1, + sizeof(init1), MCEUSB_OUTBOUND); + request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND); + request_packet_async(ir, ep_out, init2, + sizeof(init2), MCEUSB_OUTBOUND); + } + + /* + * if we don't issue the correct number of receives (MCEUSB_INBOUND) + * for each outbound, then the first few ir pulses will be interpreted + * by the usb_async_callback routine - we should ensure we have the + * right amount OR less - as the meusb_dev_recv routine will handle + * the control packets OK - they start with 0x9f - but the async + * callback doesn't handle ir pulse packets + */ + request_packet_async(ir, ep_in, NULL, maxp, 0); + + usb_set_intfdata(intf, ir); + + return 0; +} + + +static void mceusb_dev_disconnect(struct usb_interface *intf) +{ + struct usb_device *dev = interface_to_usbdev(intf); + struct mceusb_dev *ir = usb_get_intfdata(intf); + + usb_set_intfdata(intf, NULL); + + if (!ir || !ir->d) + return; + + ir->usbdev = NULL; + wake_up_all(&ir->wait_out); + + mutex_lock(&ir->lock); + usb_kill_urb(ir->urb_in); + usb_free_urb(ir->urb_in); + usb_buffer_free(dev, ir->len_in, ir->buf_in, ir->dma_in); + mutex_unlock(&ir->lock); + + unregister_from_lirc(ir); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) +static int mceusb_dev_suspend(struct usb_interface *intf, pm_message_t message) +{ + struct mceusb_dev *ir = usb_get_intfdata(intf); + printk(DRIVER_NAME "[%d]: suspend\n", ir->devnum); + usb_kill_urb(ir->urb_in); + return 0; +} + +static int mceusb_dev_resume(struct usb_interface *intf) +{ + struct mceusb_dev *ir = usb_get_intfdata(intf); + printk(DRIVER_NAME "[%d]: resume\n", ir->devnum); + if (usb_submit_urb(ir->urb_in, GFP_ATOMIC)) + return -EIO; + return 0; +} +#endif + +static struct usb_driver mceusb_dev_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = DRIVER_NAME, + .probe = mceusb_dev_probe, + .disconnect = mceusb_dev_disconnect, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) + .suspend = mceusb_dev_suspend, + .resume = mceusb_dev_resume, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 23) + .reset_resume = mceusb_dev_resume, +#endif +#endif + .id_table = mceusb_dev_table +}; + +static int __init mceusb_dev_init(void) +{ + int i; + + printk(KERN_INFO DRIVER_NAME ": " DRIVER_DESC " " DRIVER_VERSION "\n"); + printk(KERN_INFO DRIVER_NAME ": " DRIVER_AUTHOR "\n"); + dprintk(DRIVER_NAME ": debug mode enabled\n"); + + i = usb_register(&mceusb_dev_driver); + if (i < 0) { + printk(DRIVER_NAME ": usb register failed, result = %d\n", i); + return -ENODEV; + } + + return 0; +} + +static void __exit mceusb_dev_exit(void) +{ + usb_deregister(&mceusb_dev_driver); +} + +module_init(mceusb_dev_init); +module_exit(mceusb_dev_exit); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(usb, mceusb_dev_table); +/* this was originally lirc_mceusb2, lirc_mceusb and lirc_mceusb2 merged now */ +MODULE_ALIAS("lirc_mceusb2"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Debug enabled or not"); + +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_mceusb/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_mceusb/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_MCEUSB) += lirc_mceusb.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_atiusb/lirc_atiusb.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_atiusb/lirc_atiusb.c @@ -0,0 +1,1452 @@ +/* + * lirc_atiusb - USB remote support for LIRC + * (currently only supports X10 USB remotes) + * (supports ATI Remote Wonder and ATI Remote Wonder II, too) + * + * Copyright (C) 2003-2004 Paul Miller + * + * This driver was derived from: + * Vladimir Dergachev 's 2002 + * "USB ATI Remote support" (input device) + * Adrian Dewhurst 's 2002 + * "USB StreamZap remote driver" (LIRC) + * Artur Lipowski 's 2002 + * "lirc_dev" and "lirc_gpio" LIRC modules + * Michael Wojciechowski + * initial xbox support + * Vassilis Virvilis 2006 + * reworked the patch for lirc submission + * + * $Id: lirc_atiusb.c,v 1.85 2009/03/11 00:21:46 jarodwilson Exp $ + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0) +#error "*******************************************************" +#error "Sorry, this driver needs kernel version 2.4.0 or higher" +#error "*******************************************************" +#endif + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include +#include +#include +#include + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#define DRIVER_VERSION "$Revision: 1.85 $" +#define DRIVER_AUTHOR "Paul Miller " +#define DRIVER_DESC "USB remote driver for LIRC" +#define DRIVER_NAME "lirc_atiusb" + +#define CODE_LENGTH (code_length[ir->remote_type]) +#define CODE_MIN_LENGTH (code_min_length[ir->remote_type]) +#define DECODE_LENGTH (decode_length[ir->remote_type]) + +#define RW2_MODENAV_KEYCODE 0x3F +#define RW2_NULL_MODE 0xFF +/* Fake (virtual) keycode indicating compass mouse usage */ +#define RW2_MOUSE_KEYCODE 0xFF +#define RW2_PRESSRELEASE_KEYCODE 0xFE + +#define RW2_PRESS_CODE 1 +#define RW2_HOLD_CODE 2 +#define RW2_RELEASE_CODE 0 + +/* module parameters */ +#ifdef CONFIG_USB_DEBUG +static int debug = 1; +#else +static int debug; +#endif +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG fmt, ## args); \ + } while (0) + +/* ATI, ATI2, XBOX */ +static const int code_length[] = {5, 3, 6}; +static const int code_min_length[] = {3, 3, 6}; +static const int decode_length[] = {5, 3, 1}; +/* + * USB_BUFF_LEN must be the maximum value of the code_length array. + * It is used for static arrays. + */ +#define USB_BUFF_LEN 6 + +static int mask = 0xFFFF; /* channel acceptance bit mask */ +static int unique; /* enable channel-specific codes */ +static int repeat = 10; /* repeat time in 1/100 sec */ +static int emit_updown; /* send separate press/release codes (rw2) */ +static int emit_modekeys; /* send keycodes for aux1-4, pc, mouse (rw2) */ +static unsigned long repeat_jiffies; /* repeat timeout */ +static int mdeadzone; /* mouse sensitivity >= 0 */ +static int mgradient = 375; /* 1000*gradient from cardinal direction */ + +/* get hi and low bytes of a 16-bits int */ +#define HI(a) ((unsigned char)((a) >> 8)) +#define LO(a) ((unsigned char)((a) & 0xff)) + +/* general constants */ +#define SEND_FLAG_IN_PROGRESS 1 +#define SEND_FLAG_COMPLETE 2 +#define FREE_ALL 0xFF + +/* endpoints */ +#define EP_KEYS 0 +#define EP_MOUSE 1 +#define EP_MOUSE_ADDR 0x81 +#define EP_KEYS_ADDR 0x82 + +#define VENDOR_ATI1 0x0bc7 +#define VENDOR_ATI2 0x0471 +#define VENDOR_MS1 0x040b +#define VENDOR_MS2 0x045e +#define VENDOR_MS3 0xFFFF + +static struct usb_device_id usb_remote_table[] = { + /* X10 USB Firecracker Interface */ + { USB_DEVICE(VENDOR_ATI1, 0x0002) }, + + /* X10 VGA Video Sender */ + { USB_DEVICE(VENDOR_ATI1, 0x0003) }, + + /* ATI Wireless Remote Receiver */ + { USB_DEVICE(VENDOR_ATI1, 0x0004) }, + + /* NVIDIA Wireless Remote Receiver */ + { USB_DEVICE(VENDOR_ATI1, 0x0005) }, + + /* ATI Wireless Remote Receiver */ + { USB_DEVICE(VENDOR_ATI1, 0x0006) }, + + /* X10 USB Wireless Transceivers */ + { USB_DEVICE(VENDOR_ATI1, 0x0007) }, + { USB_DEVICE(VENDOR_ATI1, 0x0008) }, + { USB_DEVICE(VENDOR_ATI1, 0x0009) }, + { USB_DEVICE(VENDOR_ATI1, 0x000A) }, + { USB_DEVICE(VENDOR_ATI1, 0x000B) }, + { USB_DEVICE(VENDOR_ATI1, 0x000C) }, + { USB_DEVICE(VENDOR_ATI1, 0x000D) }, + { USB_DEVICE(VENDOR_ATI1, 0x000E) }, + { USB_DEVICE(VENDOR_ATI1, 0x000F) }, + + /* ATI Remote Wonder 2: Input Device */ + { USB_DEVICE(VENDOR_ATI2, 0x0602) }, + + /* ATI Remote Wonder 2: Controller (???) */ + { USB_DEVICE(VENDOR_ATI2, 0x0603) }, + + /* Gamester Xbox DVD Movie Playback Kit IR */ + { USB_DEVICE(VENDOR_MS1, 0x6521) }, + + /* Microsoft Xbox DVD Movie Playback Kit IR */ + { USB_DEVICE(VENDOR_MS2, 0x0284) }, + + /* + * Some Chinese manufacturer -- conflicts with the joystick from the + * same manufacturer + */ + { USB_DEVICE(VENDOR_MS3, 0xFFFF) }, + + /* Terminating entry */ + { } +}; + + +/* init strings */ +#define USB_OUTLEN 7 + +static char init1[] = {0x01, 0x00, 0x20, 0x14}; +static char init2[] = {0x01, 0x00, 0x20, 0x14, 0x20, 0x20, 0x20}; + +struct in_endpt { + /* inner link in list of endpoints for the remote specified by ir */ + struct list_head iep_list_link; + struct atirf_dev *ir; + struct urb *urb; + struct usb_endpoint_descriptor *ep; + int type; + + /* buffers and dma */ + unsigned char *buf; + unsigned int len; +#ifdef KERNEL_2_5 + dma_addr_t dma; +#endif + + /* handle repeats */ + unsigned char old[USB_BUFF_LEN]; + unsigned long old_jiffies; +}; + +struct out_endpt { + struct atirf_dev *ir; + struct urb *urb; + struct usb_endpoint_descriptor *ep; + + /* buffers and dma */ + unsigned char *buf; +#ifdef KERNEL_2_5 + dma_addr_t dma; +#endif + + /* handle sending (init strings) */ + int send_flags; + wait_queue_head_t wait; +}; + + +/* data structure for each usb remote */ +struct atirf_dev { + /* inner link in list of all remotes managed by this module */ + struct list_head remote_list_link; + /* Number of usb interfaces associated with this device */ + int dev_refcount; + + /* usb */ + struct usb_device *usbdev; + /* Head link to list of all inbound endpoints in this remote */ + struct list_head iep_listhead; + struct out_endpt *out_init; + int devnum; + + /* remote type based on usb_device_id tables */ + enum { + ATI1_COMPATIBLE, + ATI2_COMPATIBLE, + XBOX_COMPATIBLE + } remote_type; + + /* rw2 current mode (mirrors the state of the remote) */ + int mode; + + /* lirc */ + struct lirc_driver *d; + int connected; + + /* locking */ + struct mutex lock; +}; + +/* list of all registered devices via the remote_list_link in atirf_dev */ +static struct list_head remote_list; + +/* + * Convenience macros to retrieve a pointer to the surrounding struct from + * the given list_head reference within, pointed at by link. + */ +#define get_iep_from_link(link) \ + list_entry((link), struct in_endpt, iep_list_link); +#define get_irctl_from_link(link) \ + list_entry((link), struct atirf_dev, remote_list_link); + +/* send packet - used to initialize remote */ +static void send_packet(struct out_endpt *oep, u16 cmd, unsigned char *data) +{ + struct atirf_dev *ir = oep->ir; + DECLARE_WAITQUEUE(wait, current); + int timeout = HZ; /* 1 second */ + unsigned char buf[USB_OUTLEN]; + + dprintk(DRIVER_NAME "[%d]: send called (%#x)\n", ir->devnum, cmd); + + mutex_lock(&ir->lock); + oep->urb->transfer_buffer_length = LO(cmd) + 1; + oep->urb->dev = oep->ir->usbdev; + oep->send_flags = SEND_FLAG_IN_PROGRESS; + + memcpy(buf+1, data, LO(cmd)); + buf[0] = HI(cmd); + memcpy(oep->buf, buf, LO(cmd)+1); + + set_current_state(TASK_INTERRUPTIBLE); + add_wait_queue(&oep->wait, &wait); + +#ifdef KERNEL_2_5 + if (usb_submit_urb(oep->urb, GFP_ATOMIC)) { +#else + if (usb_submit_urb(oep->urb)) { +#endif + set_current_state(TASK_RUNNING); + remove_wait_queue(&oep->wait, &wait); + mutex_unlock(&ir->lock); + return; + } + mutex_unlock(&ir->lock); + + while (timeout && (oep->urb->status == -EINPROGRESS) + && !(oep->send_flags & SEND_FLAG_COMPLETE)) { + timeout = schedule_timeout(timeout); + rmb(); + } + + dprintk(DRIVER_NAME "[%d]: send complete (%#x)\n", ir->devnum, cmd); + + set_current_state(TASK_RUNNING); + remove_wait_queue(&oep->wait, &wait); +#ifdef KERNEL_2_5 + oep->urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(oep->urb); +} + +static int unregister_from_lirc(struct atirf_dev *ir) +{ + struct lirc_driver *d = ir->d; + int devnum; + + devnum = ir->devnum; + dprintk(DRIVER_NAME "[%d]: unregister from lirc called\n", devnum); + + lirc_unregister_driver(d->minor); + + printk(DRIVER_NAME "[%d]: usb remote disconnected\n", devnum); + return 0; +} + + +static int set_use_inc(void *data) +{ + struct atirf_dev *ir = data; + struct list_head *pos, *n; + struct in_endpt *iep; + int rtn; + + if (!ir) { + printk(DRIVER_NAME "[?]: set_use_inc called with no context\n"); + return -EIO; + } + dprintk(DRIVER_NAME "[%d]: set use inc\n", ir->devnum); + + MOD_INC_USE_COUNT; + + mutex_lock(&ir->lock); + if (!ir->connected) { + if (!ir->usbdev) { + mutex_unlock(&ir->lock); + dprintk(DRIVER_NAME "[%d]: !ir->usbdev\n", ir->devnum); + return -ENOENT; + } + + /* Iterate through the inbound endpoints */ + list_for_each_safe(pos, n, &ir->iep_listhead) { + /* extract the current in_endpt */ + iep = get_iep_from_link(pos); + iep->urb->dev = ir->usbdev; + dprintk(DRIVER_NAME "[%d]: linking iep 0x%02x (%p)\n", + ir->devnum, iep->ep->bEndpointAddress, iep); +#ifdef KERNEL_2_5 + rtn = usb_submit_urb(iep->urb, GFP_ATOMIC); +#else + rtn = usb_submit_urb(iep->urb); +#endif + if (rtn) { + printk(DRIVER_NAME "[%d]: open result = %d " + "error submitting urb\n", + ir->devnum, rtn); + mutex_unlock(&ir->lock); + MOD_DEC_USE_COUNT; + return -EIO; + } + } + ir->connected = 1; + } + mutex_unlock(&ir->lock); + + return 0; +} + +static void set_use_dec(void *data) +{ + struct atirf_dev *ir = data; + struct list_head *pos, *n; + struct in_endpt *iep; + + if (!ir) { + printk(DRIVER_NAME "[?]: set_use_dec called with no context\n"); + return; + } + dprintk(DRIVER_NAME "[%d]: set use dec\n", ir->devnum); + + mutex_lock(&ir->lock); + if (ir->connected) { + /* Free inbound usb urbs */ + list_for_each_safe(pos, n, &ir->iep_listhead) { + iep = get_iep_from_link(pos); + dprintk(DRIVER_NAME "[%d]: unlinking iep 0x%02x (%p)\n", + ir->devnum, iep->ep->bEndpointAddress, iep); + usb_kill_urb(iep->urb); + } + ir->connected = 0; + } + mutex_unlock(&ir->lock); + MOD_DEC_USE_COUNT; +} + +static void print_data(struct in_endpt *iep, char *buf, int len) +{ + const int clen = code_length[iep->ir->remote_type]; + char codes[clen * 3 + 1]; + int i; + + if (len <= 0) + return; + + for (i = 0; i < len && i < clen; i++) + snprintf(codes+i*3, 4, "%02x ", buf[i] & 0xFF); + printk(DRIVER_NAME "[%d]: data received %s (ep=0x%x length=%d)\n", + iep->ir->devnum, codes, iep->ep->bEndpointAddress, len); +} + +static int code_check_ati1(struct in_endpt *iep, int len) +{ + struct atirf_dev *ir = iep->ir; + int i, chan; + + /* ATI RW1: some remotes emit both 4 and 5 byte length codes. */ + /* ATI RW2: emit 3 byte codes */ + if (len < CODE_MIN_LENGTH || len > CODE_LENGTH) + return -1; + + /* *** channel not tested with 4/5-byte Dutch remotes *** */ + chan = ((iep->buf[len-1]>>4) & 0x0F); + + /* strip channel code */ + if (!unique) { + iep->buf[len-1] &= 0x0F; + iep->buf[len-3] -= (chan<<4); + } + + if (!((1U<devnum, chan+1); + return -1; + } + dprintk(DRIVER_NAME "[%d]: accept channel %d\n", ir->devnum, chan+1); + + if (ir->remote_type == ATI1_COMPATIBLE) { + for (i = len; i < CODE_LENGTH; i++) + iep->buf[i] = 0; + /* check for repeats */ + if (memcmp(iep->old, iep->buf, len) == 0) { + if (iep->old_jiffies + repeat_jiffies > jiffies) + return -1; + } else + memcpy(iep->old, iep->buf, CODE_LENGTH); + iep->old_jiffies = jiffies; + } + + return 0; +} + +/* + * Since the ATI Remote Wonder II has quite a different structure from the + * prior version, this function was separated out to clarify the sanitization + * process. + * + * Here is a summary of the main differences: + * + * a. The rw2 has no sense of a transmission channel. But, it does have an + * auxiliary mode state, which is set by the mode buttons Aux1 through + * Aux4 and "PC". These map respectively to 0-4 in the first byte of the + * recv buffer. Any subsequent button press sends this mode number as its + * "channel code." Annoyingly enough, the mode setting buttons all send + * the same key code (0x3f), and can only be distinguished via their mode + * byte. + * + * Because of this, old-style "unique"-parameter-enabled channel squashing + * kills the functionality of the aux1-aux4 and PC buttons. However, to + * not do so would cause each remote key to send a different code depending + * on the active aux. Further complicating matters, using the mouse norb + * also sends an identical code as would pushing the active aux button. To + * handle this we need a separate parameter, like rw2modes, with the + * following values and meanings: + * + * 0: Don't squash any channel info + * 1: Only squash channel data for non-mode setting keys + * 2: Ignore aux keypresses, but don't squash channel + * 3: Ignore aux keypresses and squash channel data + * + * Option 1 may seem useless since the mouse sends the same code, but one + * need only ignore in userspace any press of a mode-setting code that only + * reaffirms the current mode. The 3rd party lirccd should be able to + * handle this easily enough, but lircd doesn't keep the state necessary + * for this. TODO We could work around this in the driver by emitting a + * single 02 (press) code for a mode key only if that mode is not currently + * active. + * + * Option 2 would be useful for those wanting super configurability, + * offering the ability to program 5 times the number actions based on the + * current mode. + * + * b. The rw2 has its own built in repeat handling; the keys endpoint + * encodes this in the second byte as 1 for press, 2 for hold, and 0 for + * release. This is generally much more responsive than lirc's built-in + * timeout handling. + * + * The problem is that the remote can send the release-receive pair + * (0,1) while one is still holding down the same button if the + * transmission is momentarily interrupted. (It seems that the receiver + * manages this count instead of the remote.) By default, this information + * is squashed to 2. + * + * In order to expose the built-in repeat code, set the emit_updown + * parameter as described below. + * + * c. The mouse norb is much more sensitive than on the rw1. It emulates + * a joystick-like controller with the second byte representing the x-axis + * and the third, the y-axis. Treated as signed integers, these axes range + * approximately as follows: + * + * x: (left) -46 ... 46 (right) (0xd2..0x2e) + * y: (up) -46 ... 46 (down) (0xd2..0x2e) + * + * NB these values do not correspond to the pressure with which the mouse + * norb is pushed in a given direction, but rather seems to indicate the + * duration for which a given direction is held. + * + * These are normalized to 8 cardinal directions for easy configuration via + * lircd.conf. The normalization can be fined tuned with the mdeadzone and + * mgradient parameters as described below. + * + * d. The interrupt rate of the mouse vs. the normal keys is different. + * + * mouse: ~27Hz (37ms between interrupts) + * keys: ~10Hz (100ms between interrupts) + * + * This means that the normal gap mechanism for lircd won't work as + * expected; is emit_updown>0 if you can get away with it. + */ +static int code_check_ati2(struct in_endpt *iep, int len) +{ + struct atirf_dev *ir = iep->ir; + int mode, i; + char *buf = iep->buf; + + if (len != CODE_LENGTH) { + dprintk(DRIVER_NAME + "[%d]: Huh? Abnormal length (%d) buffer received.\n", + ir->devnum, len); + return -1; + } + for (i = len; i < CODE_LENGTH; i++) + iep->buf[i] = 0; + + mode = buf[0]; + + /* Squash the mode indicator if unique wasn't set non-zero */ + if (!unique) + buf[0] = 0; + + if (iep->ep->bEndpointAddress == EP_KEYS_ADDR) { + /* ignore mouse nav indicator key and mode-set (aux) keys */ + if (buf[2] == RW2_MODENAV_KEYCODE) { + if (emit_modekeys >= 2) /* emit raw */ + buf[0] = mode; + else if (emit_modekeys == 1) { + /* translate */ + buf[0] = mode; + if (ir->mode != mode) { + buf[1] = 0x03; + ir->mode = mode; + return 0; + } + } else { + dprintk(DRIVER_NAME + "[%d]: ignore dummy code 0x%x " + "(ep=0x%x)\n", ir->devnum, + buf[2], iep->ep->bEndpointAddress); + return -1; + } + } + + if (buf[1] != 2) { + /* handle press/release codes */ + if (emit_updown == 0) /* ignore */ + return -1; + else if (emit_updown == 1) /* normalize keycode */ + buf[2] = RW2_PRESSRELEASE_KEYCODE; + /* else emit raw */ + } + + } else { + int x = (signed char)buf[1]; + int y = (signed char)buf[2]; + int code = 0x00; + int dir_ew, dir_ns; + + buf[2] = RW2_MOUSE_KEYCODE; + + /* sensitivity threshold (use L2norm^2) */ + if (mdeadzone > (x*x+y*y)) { + buf[1] = 0x00; + return 0; + } + +/* Nybble encoding: xy, 2 is -1 (S or W); 1 (N or E) */ +#define MOUSE_N 0x01 +#define MOUSE_NE 0x11 +#define MOUSE_E 0x10 +#define MOUSE_SE 0x12 +#define MOUSE_S 0x02 +#define MOUSE_SW 0x22 +#define MOUSE_W 0x20 +#define MOUSE_NW 0x21 + + /* cardinal leanings: positive x -> E, positive y -> S */ + dir_ew = (x > 0) ? MOUSE_E : MOUSE_W; + dir_ns = (y > 0) ? MOUSE_S : MOUSE_N; + + /* convert coordinates(angle) into compass direction */ + if (x == 0) + code = dir_ns; + else if (y == 0) + code = dir_ew; + else { + if (abs(1000*y/x) > mgradient) + code = dir_ns; + if (abs(1000*x/y) > mgradient) + code |= dir_ew; + } + + buf[1] = code; + dprintk(DRIVER_NAME "[%d]: mouse compass=0x%x %s%s (%d,%d)\n", + ir->devnum, code, + (code & MOUSE_S ? "S" : (code & MOUSE_N ? "N" : "")), + (code & MOUSE_E ? "E" : (code & MOUSE_W ? "W" : "")), + x, y); + } + + return 0; +} + +static int code_check_xbox(struct in_endpt *iep, int len) +{ + struct atirf_dev *ir = iep->ir; + const int clen = CODE_LENGTH; + + if (len != clen) { + dprintk(DRIVER_NAME ": We got %d instead of %d bytes from xbox " + "ir.. ?\n", len, clen); + return -1; + } + + /* check for repeats */ + if (memcmp(iep->old, iep->buf, len) == 0) { + if (iep->old_jiffies + repeat_jiffies > jiffies) + return -1; + } else { + /* + * the third byte of xbox ir packet seems to contain key info + * the last two bytes are.. some kind of clock? + */ + iep->buf[0] = iep->buf[2]; + memset(iep->buf + 1, 0, len - 1); + memcpy(iep->old, iep->buf, len); + } + iep->old_jiffies = jiffies; + + return 0; +} + +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_remote_recv(struct urb *urb, struct pt_regs *regs) +#else +static void usb_remote_recv(struct urb *urb) +#endif +{ + struct in_endpt *iep; + int len, result = -1; + + if (!urb) + return; + iep = urb->context; + if (!iep) { +#ifdef KERNEL_2_5 + urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(urb); + return; + } + if (!iep->ir->usbdev) + return; + + len = urb->actual_length; + if (debug) + print_data(iep, urb->transfer_buffer, len); + + switch (urb->status) { + + case 0: + switch (iep->ir->remote_type) { + case XBOX_COMPATIBLE: + result = code_check_xbox(iep, len); + break; + case ATI2_COMPATIBLE: + result = code_check_ati2(iep, len); + break; + case ATI1_COMPATIBLE: + default: + result = code_check_ati1(iep, len); + } + if (result < 0) + break; + lirc_buffer_write(iep->ir->d->rbuf, iep->buf); + wake_up(&iep->ir->d->rbuf->wait_poll); + break; + + case -ECONNRESET: + case -ENOENT: + case -ESHUTDOWN: +#ifdef KERNEL_2_5 + urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(urb); + return; + + case -EPIPE: + default: + break; + } + +#ifdef KERNEL_2_5 + usb_submit_urb(urb, GFP_ATOMIC); +#endif +} + +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_remote_send(struct urb *urb, struct pt_regs *regs) +#else +static void usb_remote_send(struct urb *urb) +#endif +{ + struct out_endpt *oep; + + if (!urb) + return; + oep = urb->context; + if (!oep) { +#ifdef KERNEL_2_5 + urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(urb); + return; + } + if (!oep->ir->usbdev) + return; + + dprintk(DRIVER_NAME "[%d]: usb out called\n", oep->ir->devnum); + + if (urb->status) + return; + + oep->send_flags |= SEND_FLAG_COMPLETE; + wmb(); + if (waitqueue_active(&oep->wait)) + wake_up(&oep->wait); +} + + +/* + * Initialization and removal + */ + +/* + * Free iep according to mem_failure which specifies a checkpoint into the + * initialization sequence for rollback recovery. + */ +static void free_in_endpt(struct in_endpt *iep, int mem_failure) +{ + struct atirf_dev *ir; + dprintk(DRIVER_NAME ": free_in_endpt(%p, %d)\n", iep, mem_failure); + if (!iep) + return; + + ir = iep->ir; + if (!ir) { + dprintk(DRIVER_NAME ": free_in_endpt: WARNING! null ir\n"); + return; + } + mutex_lock(&ir->lock); + switch (mem_failure) { + case FREE_ALL: + case 5: + list_del(&iep->iep_list_link); + dprintk(DRIVER_NAME "[%d]: free_in_endpt removing ep=0x%0x " + "from list\n", ir->devnum, iep->ep->bEndpointAddress); + case 4: + if (iep->urb) { +#ifdef KERNEL_2_5 + iep->urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(iep->urb); + usb_free_urb(iep->urb); + iep->urb = 0; + } else + dprintk(DRIVER_NAME "[%d]: free_in_endpt null urb!\n", + ir->devnum); + case 3: +#ifdef KERNEL_2_5 + usb_buffer_free(iep->ir->usbdev, iep->len, iep->buf, iep->dma); +#else + kfree(iep->buf); +#endif + iep->buf = 0; + case 2: + kfree(iep); + } + mutex_unlock(&ir->lock); +} + +/* + * Construct a new inbound endpoint for this remote, and add it to the list of + * in_epts in ir. + */ +static struct in_endpt *new_in_endpt(struct atirf_dev *ir, + struct usb_endpoint_descriptor *ep) +{ + struct usb_device *dev = ir->usbdev; + struct in_endpt *iep; + int pipe, maxp, len, addr; + int mem_failure; + + addr = ep->bEndpointAddress; + pipe = usb_rcvintpipe(dev, addr); + maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe)); + +/* len = (maxp > USB_BUFLEN) ? USB_BUFLEN : maxp; + * len -= (len % CODE_LENGTH); */ + len = CODE_LENGTH; + + dprintk(DRIVER_NAME "[%d]: acceptable inbound endpoint (0x%x) found " + "(maxp=%d len=%d)\n", ir->devnum, addr, maxp, len); + + mem_failure = 0; + iep = kzalloc(sizeof(*iep), GFP_KERNEL); + if (!iep) { + mem_failure = 1; + goto new_in_endpt_failure_check; + } + iep->ir = ir; + iep->ep = ep; + iep->len = len; + +#ifdef KERNEL_2_5 + iep->buf = usb_buffer_alloc(dev, len, GFP_ATOMIC, &iep->dma); +#else + iep->buf = kmalloc(len, GFP_KERNEL); +#endif + if (!iep->buf) { + mem_failure = 2; + goto new_in_endpt_failure_check; + } + +#ifdef KERNEL_2_5 + iep->urb = usb_alloc_urb(0, GFP_KERNEL); +#else + iep->urb = usb_alloc_urb(0); +#endif + if (!iep->urb) + mem_failure = 3; + +new_in_endpt_failure_check: + + if (mem_failure) { + free_in_endpt(iep, mem_failure); + printk(DRIVER_NAME "[%d]: ep=0x%x out of memory (code=%d)\n", + ir->devnum, addr, mem_failure); + return NULL; + } + list_add_tail(&iep->iep_list_link, &ir->iep_listhead); + dprintk(DRIVER_NAME "[%d]: adding ep=0x%0x to list\n", + ir->devnum, iep->ep->bEndpointAddress); + return iep; +} + +static void free_out_endpt(struct out_endpt *oep, int mem_failure) +{ + struct atirf_dev *ir; + dprintk(DRIVER_NAME ": free_out_endpt(%p, %d)\n", oep, mem_failure); + if (!oep) + return; + + wake_up_all(&oep->wait); + + ir = oep->ir; + if (!ir) { + dprintk(DRIVER_NAME ": free_out_endpt: WARNING! null ir\n"); + return; + } + mutex_lock(&ir->lock); + switch (mem_failure) { + case FREE_ALL: + case 4: + if (oep->urb) { +#ifdef KERNEL_2_5 + oep->urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_unlink_urb(oep->urb); + usb_free_urb(oep->urb); + oep->urb = 0; + } else { + dprintk(DRIVER_NAME "[%d]: free_out_endpt: null urb!\n", + ir->devnum); + } + case 3: +#ifdef KERNEL_2_5 + usb_buffer_free(oep->ir->usbdev, USB_OUTLEN, + oep->buf, oep->dma); +#else + kfree(oep->buf); +#endif + oep->buf = 0; + case 2: + kfree(oep); + } + mutex_unlock(&ir->lock); +} + +static struct out_endpt *new_out_endpt(struct atirf_dev *ir, + struct usb_endpoint_descriptor *ep) +{ +#ifdef KERNEL_2_5 + struct usb_device *dev = ir->usbdev; +#endif + struct out_endpt *oep; + int mem_failure; + + dprintk(DRIVER_NAME "[%d]: acceptable outbound endpoint (0x%x) found\n", + ir->devnum, ep->bEndpointAddress); + + mem_failure = 0; + oep = kzalloc(sizeof(*oep), GFP_KERNEL); + if (!oep) + mem_failure = 1; + else { + oep->ir = ir; + oep->ep = ep; + init_waitqueue_head(&oep->wait); + +#ifdef KERNEL_2_5 + oep->buf = usb_buffer_alloc(dev, USB_OUTLEN, + GFP_ATOMIC, &oep->dma); +#else + oep->buf = kmalloc(USB_OUTLEN, GFP_KERNEL); +#endif + if (!oep->buf) + mem_failure = 2; + else { +#ifdef KERNEL_2_5 + oep->urb = usb_alloc_urb(0, GFP_KERNEL); +#else + oep->urb = usb_alloc_urb(0); +#endif + if (!oep->urb) + mem_failure = 3; + } + } + if (mem_failure) { + free_out_endpt(oep, mem_failure); + printk(DRIVER_NAME "[%d]: ep=0x%x out of memory (code=%d)\n", + ir->devnum, ep->bEndpointAddress, mem_failure); + return NULL; + } + return oep; +} + +static void free_irctl(struct atirf_dev *ir, int mem_failure) +{ + struct list_head *pos, *n; + struct in_endpt *in; + dprintk(DRIVER_NAME ": free_irctl(%p, %d)\n", ir, mem_failure); + + if (!ir) + return; + + list_for_each_safe(pos, n, &ir->iep_listhead) { + in = get_iep_from_link(pos); + free_in_endpt(in, FREE_ALL); + } + if (ir->out_init) { + free_out_endpt(ir->out_init, FREE_ALL); + ir->out_init = NULL; + } + + mutex_lock(&ir->lock); + switch (mem_failure) { + case FREE_ALL: + case 6: + if (!--ir->dev_refcount) { + list_del(&ir->remote_list_link); + dprintk(DRIVER_NAME "[%d]: free_irctl: removing " + "remote from list\n", ir->devnum); + } else { + dprintk(DRIVER_NAME "[%d]: free_irctl: refcount at %d," + "aborting free_irctl\n", + ir->devnum, ir->dev_refcount); + mutex_unlock(&ir->lock); + return; + } + case 5: + case 4: + case 3: + if (ir->d) { + switch (mem_failure) { + case 5: + lirc_buffer_free(ir->d->rbuf); + case 4: + kfree(ir->d->rbuf); + case 3: + kfree(ir->d); + } + } else + printk(DRIVER_NAME "[%d]: ir->d is a null pointer!\n", + ir->devnum); + case 2: + mutex_unlock(&ir->lock); + kfree(ir); + return; + } + mutex_unlock(&ir->lock); +} + +static struct atirf_dev *new_irctl(struct usb_interface *intf) +{ + struct usb_device *dev = interface_to_usbdev(intf); + struct atirf_dev *ir; + struct lirc_driver *driver; + int type, devnum, dclen; + int mem_failure; + + devnum = dev->devnum; + + switch (cpu_to_le16(dev->descriptor.idVendor)) { + case VENDOR_ATI1: + type = ATI1_COMPATIBLE; + break; + case VENDOR_ATI2: + type = ATI2_COMPATIBLE; + break; + case VENDOR_MS1: + case VENDOR_MS2: + case VENDOR_MS3: + type = XBOX_COMPATIBLE; + break; + default: + dprintk(DRIVER_NAME "[%d]: unknown type\n", devnum); + return NULL; + } + dprintk(DRIVER_NAME "[%d]: remote type = %d\n", devnum, type); + + mem_failure = 0; + ir = kzalloc(sizeof(*ir), GFP_KERNEL); + if (!ir) { + mem_failure = 1; + goto new_irctl_failure_check; + } + + /* + * at this stage we cannot use the macro [DE]CODE_LENGTH: ir + * is not yet setup + */ + dclen = decode_length[type]; + /* + * add this infrared remote struct to remote_list, keeping track + * of the number of drivers registered. + */ + dprintk(DRIVER_NAME "[%d]: adding remote to list\n", devnum); + list_add_tail(&ir->remote_list_link, &remote_list); + ir->dev_refcount = 1; + + driver = kzalloc(sizeof(*driver), GFP_KERNEL); + if (!driver) { + mem_failure = 2; + goto new_irctl_failure_check; + } + + ir->d = driver; + driver->rbuf = kmalloc(sizeof(*(driver->rbuf)), GFP_KERNEL); + if (!driver->rbuf) { + mem_failure = 3; + goto new_irctl_failure_check; + } + + if (lirc_buffer_init(driver->rbuf, dclen, 1)) { + mem_failure = 4; + goto new_irctl_failure_check; + } + + strcpy(driver->name, DRIVER_NAME " "); + driver->minor = -1; + driver->code_length = dclen * 8; + driver->features = LIRC_CAN_REC_LIRCCODE; + driver->data = ir; + driver->set_use_inc = &set_use_inc; + driver->set_use_dec = &set_use_dec; +#ifdef LIRC_HAVE_SYSFS + driver->dev = &intf->dev; +#endif + driver->owner = THIS_MODULE; + ir->usbdev = dev; + ir->remote_type = type; + ir->devnum = devnum; + ir->mode = RW2_NULL_MODE; + + mutex_init(&ir->lock); + INIT_LIST_HEAD(&ir->iep_listhead); + +new_irctl_failure_check: + + if (mem_failure) { + free_irctl(ir, mem_failure); + printk(DRIVER_NAME "[%d]: out of memory (code=%d)\n", + devnum, mem_failure); + return NULL; + } + return ir; +} + + +/* + * Scan the global list of remotes to see if the device listed is one of them. + * If it is, the corresponding atirf_dev is returned, with its dev_refcount + * incremented. Otherwise, returns null. + */ +static struct atirf_dev *get_prior_reg_ir(struct usb_device *dev) +{ + struct list_head *pos; + struct atirf_dev *ir = NULL; + + dprintk(DRIVER_NAME "[%d]: scanning remote_list...\n", dev->devnum); + list_for_each(pos, &remote_list) { + ir = get_irctl_from_link(pos); + if (ir->usbdev != dev) { + dprintk(DRIVER_NAME "[%d]: device %d isn't it...", + dev->devnum, ir->devnum); + ir = NULL; + } else { + dprintk(DRIVER_NAME "[%d]: prior instance found.\n", + dev->devnum); + ir->dev_refcount++; + break; + } + } + return ir; +} + +/* + * If the USB interface has an out endpoint for control (eg, the first Remote + * Wonder) send the appropriate initialization packets. + */ +static void send_outbound_init(struct atirf_dev *ir) +{ + if (ir->out_init) { + struct out_endpt *oep = ir->out_init; + dprintk(DRIVER_NAME "[%d]: usb_remote_probe: initializing " + "outbound ep\n", ir->devnum); + usb_fill_int_urb(oep->urb, ir->usbdev, + usb_sndintpipe(ir->usbdev, oep->ep->bEndpointAddress), + oep->buf, USB_OUTLEN, usb_remote_send, + oep, oep->ep->bInterval); +#ifdef KERNEL_2_5 + oep->urb->transfer_dma = oep->dma; + oep->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; +#endif + + send_packet(oep, 0x8004, init1); + send_packet(oep, 0x8007, init2); + } +} + +/* Log driver and usb info */ +static void log_usb_dev_info(struct usb_device *dev) +{ + char buf[63], name[128] = ""; + + if (dev->descriptor.iManufacturer + && usb_string(dev, dev->descriptor.iManufacturer, + buf, sizeof(buf)) > 0) + strlcpy(name, buf, sizeof(name)); + if (dev->descriptor.iProduct + && usb_string(dev, dev->descriptor.iProduct, buf, sizeof(buf)) > 0) + snprintf(name + strlen(name), sizeof(name) - strlen(name), + " %s", buf); + printk(DRIVER_NAME "[%d]: %s on usb%d:%d\n", dev->devnum, name, + dev->bus->busnum, dev->devnum); +} + + +#ifdef KERNEL_2_5 +static int usb_remote_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + struct usb_device *dev = interface_to_usbdev(intf); + struct usb_host_interface *idesc; +#else +static void *usb_remote_probe(struct usb_device *dev, unsigned int ifnum, + const struct usb_device_id *id) +{ + struct usb_interface *intf = &dev->actconfig->interface[ifnum]; + struct usb_interface_descriptor *idesc; +#endif + struct usb_endpoint_descriptor *ep; + struct in_endpt *iep; + struct atirf_dev *ir; + int i, type; + + dprintk(DRIVER_NAME "[%d]: usb_remote_probe: dev:%p, intf:%p, id:%p)\n", + dev->devnum, dev, intf, id); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5) + idesc = &intf->altsetting[intf->act_altsetting]; +#else + idesc = intf->cur_altsetting; +#endif + + /* Check if a usb remote has already been registered for this device */ + ir = get_prior_reg_ir(dev); + + if (!ir) { + ir = new_irctl(intf); + if (!ir) +#ifdef KERNEL_2_5 + return -ENOMEM; +#else + return NULL; +#endif + } + type = ir->remote_type; + + /* + * step through the endpoints to find first in and first out endpoint + * of type interrupt transfer + */ +#ifdef KERNEL_2_5 + for (i = 0; i < idesc->desc.bNumEndpoints; ++i) { + ep = &idesc->endpoint[i].desc; +#else + for (i = 0; i < idesc->bNumEndpoints; ++i) { + ep = &idesc->endpoint[i]; +#endif + dprintk(DRIVER_NAME "[%d]: processing endpoint %d\n", + dev->devnum, i); + if (((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == + USB_DIR_IN) && + ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_INT)) { + + iep = new_in_endpt(ir, ep); + if (iep) + { + usb_fill_int_urb(iep->urb, dev, + usb_rcvintpipe(dev, + iep->ep->bEndpointAddress), + iep->buf, iep->len, usb_remote_recv, + iep, iep->ep->bInterval); +#ifdef KERNEL_2_5 + iep->urb->transfer_dma = iep->dma; + iep->urb->transfer_flags |= + URB_NO_TRANSFER_DMA_MAP; +#endif + } + } + + if (((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == + USB_DIR_OUT) && + ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_INT) && + (ir->out_init == NULL)) + ir->out_init = new_out_endpt(ir, ep); + } + if (list_empty(&ir->iep_listhead)) { + printk(DRIVER_NAME "[%d]: inbound endpoint not found\n", + ir->devnum); + free_irctl(ir, FREE_ALL); +#ifdef KERNEL_2_5 + return -ENODEV; +#else + return NULL; +#endif + } + if (ir->dev_refcount == 1) { + ir->d->minor = lirc_register_driver(ir->d); + if (ir->d->minor < 0) { + free_irctl(ir, FREE_ALL); +#ifdef KERNEL_2_5 + return -ENODEV; +#else + return NULL; +#endif + } + + /* Note new driver registration in kernel logs */ + log_usb_dev_info(dev); + + /* outbound data (initialization) */ + send_outbound_init(ir); + } + +#ifdef KERNEL_2_5 + usb_set_intfdata(intf, ir); + return 0; +#else + return ir; +#endif +} + +#ifdef KERNEL_2_5 +static void usb_remote_disconnect(struct usb_interface *intf) +{ + /* struct usb_device *dev = interface_to_usbdev(intf); */ + struct atirf_dev *ir = usb_get_intfdata(intf); + usb_set_intfdata(intf, NULL); +#else +static void usb_remote_disconnect(struct usb_device *dev, void *ptr) +{ + struct atirf_dev *ir = ptr; +#endif + + dprintk(DRIVER_NAME ": disconnecting remote %d:\n", + (ir ? ir->devnum : -1)); + if (!ir || !ir->d) + return; + + if (ir->usbdev) { + /* Only unregister once */ + ir->usbdev = NULL; + unregister_from_lirc(ir); + } + + /* This also removes the current remote from remote_list */ + free_irctl(ir, FREE_ALL); +} + +static struct usb_driver usb_remote_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = DRIVER_NAME, + .probe = usb_remote_probe, + .disconnect = usb_remote_disconnect, + .id_table = usb_remote_table +}; + +static int __init usb_remote_init(void) +{ + int i; + + INIT_LIST_HEAD(&remote_list); + + printk(KERN_INFO "\n" DRIVER_NAME ": " DRIVER_DESC " " + DRIVER_VERSION "\n"); + printk(DRIVER_NAME ": " DRIVER_AUTHOR "\n"); + dprintk(DRIVER_NAME ": debug mode enabled: " + "$Id: lirc_atiusb.c,v 1.85 2009/03/11 00:21:46 jarodwilson Exp $\n"); + + repeat_jiffies = repeat*HZ/100; + + i = usb_register(&usb_remote_driver); + if (i) { + printk(DRIVER_NAME ": usb register failed, result = %d\n", i); + return -ENODEV; + } + + return 0; +} + +static void __exit usb_remote_exit(void) +{ + usb_deregister(&usb_remote_driver); +} + +module_init(usb_remote_init); +module_exit(usb_remote_exit); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(usb, usb_remote_table); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Debug enabled or not (default: 0)"); + +module_param(mask, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(mask, "Set channel acceptance bit mask (default: 0xFFFF)"); + +module_param(unique, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(unique, "Enable channel-specific codes (default: 0)"); + +module_param(repeat, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(repeat, "Repeat timeout (1/100 sec) (default: 10)"); + +module_param(mdeadzone, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(mdeadzone, "rw2 mouse sensitivity threshold (default: 0)"); + +/* + * Enabling this will cause the built-in Remote Wonder II repeat coding to + * not be squashed. The second byte of the keys output will then be: + * + * 1 initial press (button down) + * 2 holding (button remains pressed) + * 0 release (button up) + * + * By default, the driver emits 2 for both 1 and 2, and emits nothing for 0. + * This is good for people having trouble getting their rw2 to send a good + * consistent signal to the receiver. + * + * However, if you have no troubles with the driver outputting up-down pairs + * at random points while you're still holding a button, then you can enable + * this parameter to get finer grain repeat control out of your remote: + * + * 1 Emit a single (per-channel) virtual code for all up/down events + * 2 Emit the actual rw2 output + * + * 1 is easier to write lircd configs for; 2 allows full control. + */ +module_param(emit_updown, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(emit_updown, "emit press/release codes (rw2): 0:don't " + "(default), 1:emit 2 codes only, 2:code for each button"); + +module_param(emit_modekeys, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(emit_modekeys, "emit keycodes for aux1-aux4, pc, and mouse " + "(rw2): 0:don't (default), 1:emit translated codes: one for " + "mode switch, one for same mode, 2:raw codes"); + +module_param(mgradient, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(mgradient, "rw2 mouse: 1000*gradient from E to NE (default: " + "500 => .5 => ~27 degrees)"); + +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_atiusb/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_atiusb/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_ATIUSB) += lirc_atiusb.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_dev/lirc_dev.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_dev/lirc_dev.h @@ -0,0 +1,342 @@ +/* + * LIRC base driver + * + * (L) by Artur Lipowski + * This code is licensed under GNU GPL + * + * $Id: lirc_dev.h,v 1.37 2009/03/15 09:34:00 lirc Exp $ + * + */ + +#ifndef _LINUX_LIRC_DEV_H +#define _LINUX_LIRC_DEV_H + +#ifndef LIRC_REMOVE_DURING_EXPORT +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11) +/* when was it really introduced? */ +#define LIRC_HAVE_KFIFO +#endif +#endif +#define MAX_IRCTL_DEVICES 4 +#define BUFLEN 16 + +#define mod(n, div) ((n) % (div)) + +#include +#include +#ifdef LIRC_HAVE_KFIFO +#include +#endif + +struct lirc_buffer { + wait_queue_head_t wait_poll; + spinlock_t lock; + unsigned int chunk_size; + unsigned int size; /* in chunks */ + /* Using chunks instead of bytes pretends to simplify boundary checking + * And should allow for some performance fine tunning later */ +#ifdef LIRC_HAVE_KFIFO + struct kfifo *fifo; +#else + unsigned int fill; /* in chunks */ + int head, tail; /* in chunks */ + unsigned char *data; +#endif +}; +#ifndef LIRC_HAVE_KFIFO +static inline void lirc_buffer_lock(struct lirc_buffer *buf, + unsigned long *flags) +{ + spin_lock_irqsave(&buf->lock, *flags); +} +static inline void lirc_buffer_unlock(struct lirc_buffer *buf, + unsigned long *flags) +{ + spin_unlock_irqrestore(&buf->lock, *flags); +} +static inline void _lirc_buffer_clear(struct lirc_buffer *buf) +{ + buf->head = 0; + buf->tail = 0; + buf->fill = 0; +} +#endif +static inline void lirc_buffer_clear(struct lirc_buffer *buf) +{ +#ifdef LIRC_HAVE_KFIFO + if (buf->fifo) + kfifo_reset(buf->fifo); +#else + unsigned long flags; + lirc_buffer_lock(buf, &flags); + _lirc_buffer_clear(buf); + lirc_buffer_unlock(buf, &flags); +#endif +} +static inline int lirc_buffer_init(struct lirc_buffer *buf, + unsigned int chunk_size, + unsigned int size) +{ + init_waitqueue_head(&buf->wait_poll); + spin_lock_init(&buf->lock); +#ifndef LIRC_HAVE_KFIFO + _lirc_buffer_clear(buf); +#endif + buf->chunk_size = chunk_size; + buf->size = size; +#ifdef LIRC_HAVE_KFIFO + buf->fifo = kfifo_alloc(size*chunk_size, GFP_KERNEL, &buf->lock); + if (!buf->fifo) + return -ENOMEM; +#else + buf->data = kmalloc(size*chunk_size, GFP_KERNEL); + if (buf->data == NULL) + return -ENOMEM; + memset(buf->data, 0, size*chunk_size); +#endif + return 0; +} +static inline void lirc_buffer_free(struct lirc_buffer *buf) +{ +#ifdef LIRC_HAVE_KFIFO + if (buf->fifo) + kfifo_free(buf->fifo); +#else + kfree(buf->data); + buf->data = NULL; + buf->head = 0; + buf->tail = 0; + buf->fill = 0; + buf->chunk_size = 0; + buf->size = 0; +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline int _lirc_buffer_full(struct lirc_buffer *buf) +{ + return (buf->fill >= buf->size); +} +#endif +static inline int lirc_buffer_full(struct lirc_buffer *buf) +{ +#ifdef LIRC_HAVE_KFIFO + return kfifo_len(buf->fifo) == buf->size * buf->chunk_size; +#else + unsigned long flags; + int ret; + lirc_buffer_lock(buf, &flags); + ret = _lirc_buffer_full(buf); + lirc_buffer_unlock(buf, &flags); + return ret; +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline int _lirc_buffer_empty(struct lirc_buffer *buf) +{ + return !(buf->fill); +} +#endif +static inline int lirc_buffer_empty(struct lirc_buffer *buf) +{ +#ifdef LIRC_HAVE_KFIFO + return !kfifo_len(buf->fifo); +#else + unsigned long flags; + int ret; + lirc_buffer_lock(buf, &flags); + ret = _lirc_buffer_empty(buf); + lirc_buffer_unlock(buf, &flags); + return ret; +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline int _lirc_buffer_available(struct lirc_buffer *buf) +{ + return (buf->size - buf->fill); +} +#endif +static inline int lirc_buffer_available(struct lirc_buffer *buf) +{ +#ifdef LIRC_HAVE_KFIFO + return buf->size - (kfifo_len(buf->fifo) / buf->chunk_size); +#else + unsigned long flags; + int ret; + lirc_buffer_lock(buf, &flags); + ret = _lirc_buffer_available(buf); + lirc_buffer_unlock(buf, &flags); + return ret; +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline void _lirc_buffer_read_1(struct lirc_buffer *buf, + unsigned char *dest) +{ + memcpy(dest, &buf->data[buf->head*buf->chunk_size], buf->chunk_size); + buf->head = mod(buf->head+1, buf->size); + buf->fill -= 1; +} +#endif +static inline void lirc_buffer_read(struct lirc_buffer *buf, + unsigned char *dest) +{ +#ifdef LIRC_HAVE_KFIFO + if (kfifo_len(buf->fifo) >= buf->chunk_size) + kfifo_get(buf->fifo, dest, buf->chunk_size); +#else + unsigned long flags; + lirc_buffer_lock(buf, &flags); + _lirc_buffer_read_1(buf, dest); + lirc_buffer_unlock(buf, &flags); +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline void _lirc_buffer_write_1(struct lirc_buffer *buf, + unsigned char *orig) +{ + memcpy(&buf->data[buf->tail*buf->chunk_size], orig, buf->chunk_size); + buf->tail = mod(buf->tail+1, buf->size); + buf->fill++; +} +#endif +static inline void lirc_buffer_write(struct lirc_buffer *buf, + unsigned char *orig) +{ +#ifdef LIRC_HAVE_KFIFO + kfifo_put(buf->fifo, orig, buf->chunk_size); +#else + unsigned long flags; + lirc_buffer_lock(buf, &flags); + _lirc_buffer_write_1(buf, orig); + lirc_buffer_unlock(buf, &flags); +#endif +} +#ifndef LIRC_HAVE_KFIFO +static inline void _lirc_buffer_write_n(struct lirc_buffer *buf, + unsigned char *orig, int count) +{ + int space1; + if (buf->head > buf->tail) + space1 = buf->head - buf->tail; + else + space1 = buf->size - buf->tail; + + if (count > space1) { + memcpy(&buf->data[buf->tail * buf->chunk_size], orig, + space1 * buf->chunk_size); + memcpy(&buf->data[0], orig + (space1 * buf->chunk_size), + (count - space1) * buf->chunk_size); + } else { + memcpy(&buf->data[buf->tail * buf->chunk_size], orig, + count * buf->chunk_size); + } + buf->tail = mod(buf->tail + count, buf->size); + buf->fill += count; +} +#endif +static inline void lirc_buffer_write_n(struct lirc_buffer *buf, + unsigned char *orig, int count) +{ +#ifdef LIRC_HAVE_KFIFO + kfifo_put(buf->fifo, orig, count * buf->chunk_size); +#else + unsigned long flags; + lirc_buffer_lock(buf, &flags); + _lirc_buffer_write_n(buf, orig, count); + lirc_buffer_unlock(buf, &flags); +#endif +} + +struct lirc_driver { + char name[40]; + int minor; + unsigned long code_length; + unsigned int buffer_size; /* in chunks holding one code each */ + int sample_rate; + unsigned long features; + void *data; + int (*add_to_buf) (void *data, struct lirc_buffer *buf); +#ifndef LIRC_REMOVE_DURING_EXPORT + wait_queue_head_t* (*get_queue) (void *data); +#endif + struct lirc_buffer *rbuf; + int (*set_use_inc) (void *data); + void (*set_use_dec) (void *data); + struct file_operations *fops; + struct device *dev; + struct module *owner; +}; +/* name: + * this string will be used for logs + * + * minor: + * indicates minor device (/dev/lirc) number for registered driver + * if caller fills it with negative value, then the first free minor + * number will be used (if available) + * + * code_length: + * length of the remote control key code expressed in bits + * + * sample_rate: + * sample_rate equal to 0 means that no polling will be performed and + * add_to_buf will be triggered by external events (through task queue + * returned by get_queue) + * + * data: + * it may point to any driver data and this pointer will be passed to + * all callback functions + * + * add_to_buf: + * add_to_buf will be called after specified period of the time or + * triggered by the external event, this behavior depends on value of + * the sample_rate this function will be called in user context. This + * routine should return 0 if data was added to the buffer and + * -ENODATA if none was available. This should add some number of bits + * evenly divisible by code_length to the buffer + * + * get_queue: + * this callback should return a pointer to the task queue which will + * be used for external event waiting + * + * rbuf: + * if not NULL, it will be used as a read buffer, you will have to + * write to the buffer by other means, like irq's (see also + * lirc_serial.c). + * + * set_use_inc: + * set_use_inc will be called after device is opened + * + * set_use_dec: + * set_use_dec will be called after device is closed + * + * fops: + * file_operations for drivers which don't fit the current driver model. + * + * Some ioctl's can be directly handled by lirc_dev if the driver's + * ioctl function is NULL or if it returns -ENOIOCTLCMD (see also + * lirc_serial.c). + * + * owner: + * the module owning this struct + * + */ + + +/* following functions can be called ONLY from user context + * + * returns negative value on error or minor number + * of the registered device if success + * contents of the structure pointed by d is copied + */ +extern int lirc_register_driver(struct lirc_driver *d); + +/* returns negative value on error or 0 if success +*/ +extern int lirc_unregister_driver(int minor); + +/* Returns the private data stored in the lirc_driver + * associated with the given device file pointer. + */ +void *lirc_get_pdata(struct file *file); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_dev/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_dev/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_DEV) += lirc_dev.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_dev/lirc_dev.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_dev/lirc_dev.c @@ -0,0 +1,1025 @@ +/* + * LIRC base driver + * + * (L) by Artur Lipowski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * $Id: lirc_dev.c,v 1.96 2009/08/31 16:57:55 lirc Exp $ + * + */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18) +#error "**********************************************************" +#error " Sorry, this driver needs kernel version 2.2.18 or higher " +#error "**********************************************************" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#include +#else +#include +#include +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0) +#include +#endif +#define __KERNEL_SYSCALLS__ +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 23) +#include +#endif +#ifdef CONFIG_COMPAT +#include +#endif + +#include "../kcompat.h" + +/* SysFS header */ +#if defined(LIRC_HAVE_SYSFS) +#include +#endif + +#include "../lirc.h" +#include "lirc_dev.h" + +static int debug; +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG fmt, ## args); \ + } while (0) + +#define IRCTL_DEV_NAME "BaseRemoteCtl" +#define NOPLUG -1 +#define LOGHEAD "lirc_dev (%s[%d]): " + +struct irctl { + struct lirc_driver d; + int attached; + int open; + + struct mutex buffer_lock; + struct lirc_buffer *buf; + unsigned int chunk_size; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + int tpid; + struct completion *t_notify; + struct completion *t_notify2; + int shutdown; +#else + struct task_struct *task; +#endif + long jiffies_to_wait; + +#ifdef LIRC_HAVE_DEVFS_24 + devfs_handle_t devfs_handle; +#endif +}; + +static DEFINE_MUTEX(lirc_dev_lock); + +static struct irctl *irctls[MAX_IRCTL_DEVICES]; +static struct file_operations fops; + +/* Only used for sysfs but defined to void otherwise */ +static lirc_class_t *lirc_class; + +/* helper function + * initializes the irctl structure + */ +static void init_irctl(struct irctl *ir) +{ + mutex_init(&ir->buffer_lock); + ir->d.minor = NOPLUG; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + ir->tpid = -1; +#endif +} + +static void cleanup(struct irctl *ir) +{ + dprintk(LOGHEAD "cleaning up\n", ir->d.name, ir->d.minor); + + if (ir->buf != ir->d.rbuf) { + lirc_buffer_free(ir->buf); + kfree(ir->buf); + } + ir->buf = NULL; +} + +/* helper function + * reads key codes from driver and puts them into buffer + * returns 0 on success + */ +static int add_to_buf(struct irctl *ir) +{ + if (ir->d.add_to_buf) { + int res = -ENODATA; + int got_data = 0; + + /* + * service the device as long as it is returning + * data and we have space + */ + while ((res = ir->d.add_to_buf(ir->d.data, ir->buf)) == 0) { + got_data++; + } + + if (res == -ENODEV) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + ir->shutdown = 1; +#else + kthread_stop(ir->task); +#endif + + return got_data ? 0 : res; + } + + return 0; +} + +/* main function of the polling thread */ +static int lirc_thread(void *irctl) +{ + struct irctl *ir = irctl; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + /* + * This thread doesn't need any user-level access, so get rid + * of all our resources + */ + daemonize("lirc_dev"); + + if (ir->t_notify != NULL) + complete(ir->t_notify); + +#endif + dprintk(LOGHEAD "poll thread started\n", ir->d.name, ir->d.minor); + + do { + if (ir->open) { + if (ir->jiffies_to_wait) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(ir->jiffies_to_wait); +#ifndef LIRC_REMOVE_DURING_EXPORT + } else { + interruptible_sleep_on( + ir->d.get_queue(ir->d.data)); +#endif + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + if (ir->shutdown) +#else + if (kthread_should_stop()) +#endif + break; + if (!add_to_buf(ir)) + wake_up_interruptible(&ir->buf->wait_poll); + } else { + set_current_state(TASK_INTERRUPTIBLE); + schedule(); + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + } while (!ir->shutdown); + + if (ir->t_notify2 != NULL) + wait_for_completion(ir->t_notify2); + + ir->tpid = -1; + if (ir->t_notify != NULL) + complete(ir->t_notify); +#else + } while (!kthread_should_stop()); +#endif + + dprintk(LOGHEAD "poll thread ended\n", ir->d.name, ir->d.minor); + + return 0; +} + +int lirc_register_driver(struct lirc_driver *d) +{ + struct irctl *ir; + int minor; + int bytes_in_key; + unsigned int buffer_size; + int err; +#ifdef LIRC_HAVE_DEVFS_24 + char name[16]; +#endif + DECLARE_COMPLETION(tn); + + if (!d) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "driver pointer must be not NULL!\n"); + err = -EBADRQC; + goto out; + } + + if (MAX_IRCTL_DEVICES <= d->minor) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "\"minor\" must be between 0 and %d (%d)!\n", + MAX_IRCTL_DEVICES-1, d->minor); + err = -EBADRQC; + goto out; + } + + if (1 > d->code_length || (BUFLEN * 8) < d->code_length) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "code length in bits for minor (%d) " + "must be less than %d!\n", + d->minor, BUFLEN * 8); + err = -EBADRQC; + goto out; + } + + printk(KERN_INFO "lirc_dev: lirc_register_driver: sample_rate: %d\n", + d->sample_rate); + if (d->sample_rate) { + if (2 > d->sample_rate || HZ < d->sample_rate) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "sample_rate must be between 2 and %d!\n", HZ); + err = -EBADRQC; + goto out; + } + if (!d->add_to_buf) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "add_to_buf cannot be NULL when " + "sample_rate is set\n"); + err = -EBADRQC; + goto out; + } +#ifndef LIRC_REMOVE_DURING_EXPORT + } else if (!(d->fops && d->fops->read) && !d->get_queue && !d->rbuf) { +#else + } else if (!(d->fops && d->fops->read) && !d->rbuf) { +#endif + printk(KERN_ERR "lirc_dev: lirc_register_driver: " +#ifndef LIRC_REMOVE_DURING_EXPORT + "fops->read, get_queue and rbuf " +#else + "fops->read and rbuf " +#endif + "cannot all be NULL!\n"); + err = -EBADRQC; + goto out; +#ifndef LIRC_REMOVE_DURING_EXPORT + } else if (!d->get_queue && !d->rbuf) { +#else + } else if (!d->rbuf) { +#endif + if (!(d->fops && d->fops->read && d->fops->poll && + d->fops->ioctl)) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "neither read, poll nor ioctl can be NULL!\n"); + err = -EBADRQC; + goto out; + } + } + + mutex_lock(&lirc_dev_lock); + + minor = d->minor; + + if (minor < 0) { + /* find first free slot for driver */ + for (minor = 0; minor < MAX_IRCTL_DEVICES; minor++) + if (!irctls[minor]) + break; + if (MAX_IRCTL_DEVICES == minor) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "no free slots for drivers!\n"); + err = -ENOMEM; + goto out_lock; + } + } else if (irctls[minor]) { + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "minor (%d) just registered!\n", minor); + err = -EBUSY; + goto out_lock; + } + + ir = kzalloc(sizeof(struct irctl), GFP_KERNEL); + if (!ir) { + err = -ENOMEM; + goto out_lock; + } + init_irctl(ir); + irctls[minor] = ir; + + if (d->sample_rate) { + ir->jiffies_to_wait = HZ / d->sample_rate; + } else { + /* it means - wait for external event in task queue */ + ir->jiffies_to_wait = 0; + } + + /* some safety check 8-) */ + d->name[sizeof(d->name)-1] = '\0'; + + bytes_in_key = d->code_length/8 + (d->code_length%8 ? 1 : 0); + buffer_size = d->buffer_size ? d->buffer_size : BUFLEN / bytes_in_key; + + if (d->rbuf) { + ir->buf = d->rbuf; + } else { + ir->buf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL); + if (!ir->buf) { + err = -ENOMEM; + goto out_lock; + } + err = lirc_buffer_init(ir->buf, bytes_in_key, buffer_size); + if (err) { + kfree(ir->buf); + goto out_lock; + } + } + ir->chunk_size = ir->buf->chunk_size; + + if (d->features == 0) + d->features = (d->code_length > 8) ? + LIRC_CAN_REC_LIRCCODE : LIRC_CAN_REC_CODE; + + ir->d = *d; + ir->d.minor = minor; + +#if defined(LIRC_HAVE_DEVFS_24) + sprintf(name, DEV_LIRC "/%d", ir->d.minor); + ir->devfs_handle = devfs_register(NULL, name, DEVFS_FL_DEFAULT, + IRCTL_DEV_MAJOR, ir->d.minor, + S_IFCHR | S_IRUSR | S_IWUSR, + &fops, NULL); +#elif defined(LIRC_HAVE_DEVFS_26) + devfs_mk_cdev(MKDEV(IRCTL_DEV_MAJOR, ir->d.minor), + S_IFCHR|S_IRUSR|S_IWUSR, + DEV_LIRC "/%u", ir->d.minor); +#endif + (void) lirc_device_create(lirc_class, ir->d.dev, + MKDEV(IRCTL_DEV_MAJOR, ir->d.minor), NULL, + "lirc%u", ir->d.minor); + +#ifndef LIRC_REMOVE_DURING_EXPORT + if (d->sample_rate || d->get_queue) { +#else + if (d->sample_rate) { +#endif + /* try to fire up polling thread */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + ir->t_notify = &tn; + ir->tpid = kernel_thread(lirc_thread, (void *)ir, 0); + if (ir->tpid < 0) { +#else + ir->task = kthread_run(lirc_thread, (void *)ir, "lirc_dev"); + if (IS_ERR(ir->task)) { +#endif + printk(KERN_ERR "lirc_dev: lirc_register_driver: " + "cannot run poll thread for minor = %d\n", + d->minor); + err = -ECHILD; + goto out_sysfs; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + wait_for_completion(&tn); + ir->t_notify = NULL; +#endif + } + ir->attached = 1; + mutex_unlock(&lirc_dev_lock); + +/* + * Recent kernels should handle this autmatically by increasing/decreasing + * use count when a dependant module is loaded/unloaded. + */ +#ifndef KERNEL_2_5 + MOD_INC_USE_COUNT; +#endif + dprintk("lirc_dev: driver %s registered at minor number = %d\n", + ir->d.name, ir->d.minor); + d->minor = minor; + return minor; + +out_sysfs: + lirc_device_destroy(lirc_class, + MKDEV(IRCTL_DEV_MAJOR, ir->d.minor)); +#ifdef LIRC_HAVE_DEVFS_24 + devfs_unregister(ir->devfs_handle); +#endif +#ifdef LIRC_HAVE_DEVFS_26 + devfs_remove(DEV_LIRC "/%i", ir->d.minor); +#endif +out_lock: + mutex_unlock(&lirc_dev_lock); +out: + return err; +} +EXPORT_SYMBOL(lirc_register_driver); + +int lirc_unregister_driver(int minor) +{ + struct irctl *ir; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + DECLARE_COMPLETION(tn); + DECLARE_COMPLETION(tn2); +#endif + + if (minor < 0 || minor >= MAX_IRCTL_DEVICES) { + printk(KERN_ERR "lirc_dev: lirc_unregister_driver: " + "\"minor\" must be between 0 and %d!\n", + MAX_IRCTL_DEVICES-1); + return -EBADRQC; + } + + ir = irctls[minor]; + + mutex_lock(&lirc_dev_lock); + + if (ir->d.minor != minor) { + printk(KERN_ERR "lirc_dev: lirc_unregister_driver: " + "minor (%d) device not registered!", minor); + mutex_unlock(&lirc_dev_lock); + return -ENOENT; + } + + /* end up polling thread */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + if (ir->tpid >= 0) { + ir->t_notify = &tn; + ir->t_notify2 = &tn2; + ir->shutdown = 1; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) + { + struct task_struct *p; + + p = find_task_by_pid(ir->tpid); + wake_up_process(p); + } +#else + /* 2.2.x does not export wake_up_process() */ + wake_up_interruptible(ir->d.get_queue(ir->d.data)); +#endif + complete(&tn2); + wait_for_completion(&tn); + ir->t_notify = NULL; + ir->t_notify2 = NULL; + } +#else /* kernel >= 2.6.23 */ + if (ir->task) + kthread_stop(ir->task); +#endif + + dprintk("lirc_dev: driver %s unregistered from minor number = %d\n", + ir->d.name, ir->d.minor); + + ir->attached = 0; + if (ir->open) { + dprintk(LOGHEAD "releasing opened driver\n", + ir->d.name, ir->d.minor); + wake_up_interruptible(&ir->buf->wait_poll); + mutex_lock(&ir->buffer_lock); + ir->d.set_use_dec(ir->d.data); + module_put(ir->d.owner); + mutex_unlock(&ir->buffer_lock); + } else { + cleanup(ir); + irctls[minor] = NULL; + kfree(ir); + } + +#ifdef LIRC_HAVE_DEVFS_24 + devfs_unregister(ir->devfs_handle); +#endif +#ifdef LIRC_HAVE_DEVFS_26 + devfs_remove(DEV_LIRC "/%u", ir->d.minor); +#endif + lirc_device_destroy(lirc_class, + MKDEV(IRCTL_DEV_MAJOR, ir->d.minor)); + + mutex_unlock(&lirc_dev_lock); + +/* + * Recent kernels should handle this autmatically by increasing/decreasing + * use count when a dependant module is loaded/unloaded. + */ +#ifndef KERNEL_2_5 + MOD_DEC_USE_COUNT; +#endif + + return 0; +} +EXPORT_SYMBOL(lirc_unregister_driver); + +static int irctl_open(struct inode *inode, struct file *file) +{ + struct irctl *ir; + int retval; + + if (iminor(inode) >= MAX_IRCTL_DEVICES || !irctls[iminor(inode)]) { + dprintk("lirc_dev [%d]: open result = -ENODEV\n", + iminor(inode)); + return -ENODEV; + } + + ir = irctls[iminor(inode)]; + + dprintk(LOGHEAD "open called\n", ir->d.name, ir->d.minor); + + /* if the driver has an open function use it instead */ + if (ir->d.fops && ir->d.fops->open) + return ir->d.fops->open(inode, file); + + if (mutex_lock_interruptible(&lirc_dev_lock)) + return -ERESTARTSYS; + + if (ir->d.minor == NOPLUG) { + retval = -ENODEV; + goto error; + } + + if (ir->open) { + retval = -EBUSY; + goto error; + } + + if (try_module_get(ir->d.owner)) { + ++ir->open; + retval = ir->d.set_use_inc(ir->d.data); + + if (retval) { + module_put(ir->d.owner); + --ir->open; + } else { + lirc_buffer_clear(ir->buf); + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + if (ir->tpid >= 0) { + struct task_struct *p; + + p = find_task_by_pid(ir->tpid); + wake_up_process(p); + } +#else + if (ir->task) + wake_up_process(ir->task); +#endif + } + error: + if (ir) + dprintk(LOGHEAD "open result = %d\n", ir->d.name, ir->d.minor, + retval); + + mutex_unlock(&lirc_dev_lock); + + return retval; +} + +static int irctl_close(struct inode *inode, struct file *file) +{ + struct irctl *ir = irctls[iminor(inode)]; + + dprintk(LOGHEAD "close called\n", ir->d.name, ir->d.minor); + + /* if the driver has a close function use it instead */ + if (ir->d.fops && ir->d.fops->release) + return ir->d.fops->release(inode, file); + + if (mutex_lock_interruptible(&lirc_dev_lock)) + return -ERESTARTSYS; + + --ir->open; + if (ir->attached) { + ir->d.set_use_dec(ir->d.data); + module_put(ir->d.owner); + } else { + cleanup(ir); + irctls[ir->d.minor] = NULL; + kfree(ir); + } + + mutex_unlock(&lirc_dev_lock); + + return 0; +} + +static unsigned int irctl_poll(struct file *file, poll_table *wait) +{ + struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)]; + unsigned int ret; + + dprintk(LOGHEAD "poll called\n", ir->d.name, ir->d.minor); + + /* if the driver has a poll function use it instead */ + if (ir->d.fops && ir->d.fops->poll) + return ir->d.fops->poll(file, wait); + + mutex_lock(&ir->buffer_lock); + if (!ir->attached) { + mutex_unlock(&ir->buffer_lock); + return POLLERR; + } + + poll_wait(file, &ir->buf->wait_poll, wait); + + dprintk(LOGHEAD "poll result = %s\n", + ir->d.name, ir->d.minor, + lirc_buffer_empty(ir->buf) ? "0" : "POLLIN|POLLRDNORM"); + + ret = lirc_buffer_empty(ir->buf) ? 0 : (POLLIN|POLLRDNORM); + + mutex_unlock(&ir->buffer_lock); + return ret; +} + +/* + * + */ +static int irctl_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + unsigned long mode; + int result; + struct irctl *ir = irctls[iminor(inode)]; + + dprintk(LOGHEAD "ioctl called (0x%x)\n", + ir->d.name, ir->d.minor, cmd); + + /* if the driver has a ioctl function use it instead */ + if (ir->d.fops && ir->d.fops->ioctl) { + result = ir->d.fops->ioctl(inode, file, cmd, arg); + if (result != -ENOIOCTLCMD) + return result; + } + + if (ir->d.minor == NOPLUG || !ir->attached) { + dprintk(LOGHEAD "ioctl result = -ENODEV\n", + ir->d.name, ir->d.minor); + return -ENODEV; + } + + /* The driver can't handle cmd */ + result = 0; + + switch (cmd) { + case LIRC_GET_FEATURES: + result = put_user(ir->d.features, (unsigned long *)arg); + break; + case LIRC_GET_REC_MODE: + if (!(ir->d.features & LIRC_CAN_REC_MASK)) + return -ENOSYS; + + result = put_user(LIRC_REC2MODE + (ir->d.features & LIRC_CAN_REC_MASK), + (unsigned long *)arg); + break; + case LIRC_SET_REC_MODE: + if (!(ir->d.features & LIRC_CAN_REC_MASK)) + return -ENOSYS; + + result = get_user(mode, (unsigned long *)arg); + if (!result && !(LIRC_MODE2REC(mode) & ir->d.features)) + result = -EINVAL; + /* + * FIXME: We should actually set the mode somehow but + * for now, lirc_serial doesn't support mode changing either + */ + break; + case LIRC_GET_LENGTH: + result = put_user(ir->d.code_length, (unsigned long *) arg); + break; + default: + result = -EINVAL; + } + + dprintk(LOGHEAD "ioctl result = %d\n", + ir->d.name, ir->d.minor, result); + + return result; +} + +#ifdef CONFIG_COMPAT +#define LIRC_GET_FEATURES_COMPAT32 _IOR('i', 0x00000000, __u32) + +#define LIRC_GET_SEND_MODE_COMPAT32 _IOR('i', 0x00000001, __u32) +#define LIRC_GET_REC_MODE_COMPAT32 _IOR('i', 0x00000002, __u32) + +#define LIRC_GET_LENGTH_COMPAT32 _IOR('i', 0x0000000f, __u32) + +#define LIRC_SET_SEND_MODE_COMPAT32 _IOW('i', 0x00000011, __u32) +#define LIRC_SET_REC_MODE_COMPAT32 _IOW('i', 0x00000012, __u32) + +static long irctl_compat_ioctl(struct file *file, + unsigned int cmd32, + unsigned long arg) +{ + mm_segment_t old_fs; + int ret; + unsigned long val; + unsigned int cmd; + + switch (cmd32) { + case LIRC_GET_FEATURES_COMPAT32: + case LIRC_GET_SEND_MODE_COMPAT32: + case LIRC_GET_REC_MODE_COMPAT32: + case LIRC_GET_LENGTH_COMPAT32: + case LIRC_SET_SEND_MODE_COMPAT32: + case LIRC_SET_REC_MODE_COMPAT32: + /* + * These commands expect (unsigned long *) arg + * but the 32-bit app supplied (__u32 *). + * Conversion is required. + */ + if (get_user(val, (__u32 *)compat_ptr(arg))) + return -EFAULT; + lock_kernel(); + /* + * tell irctl_ioctl that it's safe to use the pointer + * to val which is in kernel address space and not in + * user address space + */ + old_fs = get_fs(); + set_fs(KERNEL_DS); + + cmd = _IOC(_IOC_DIR(cmd32), _IOC_TYPE(cmd32), _IOC_NR(cmd32), + (_IOC_TYPECHECK(unsigned long))); + ret = irctl_ioctl(file->f_dentry->d_inode, file, + cmd, (unsigned long)(&val)); + + set_fs(old_fs); + unlock_kernel(); + switch (cmd) { + case LIRC_GET_FEATURES: + case LIRC_GET_SEND_MODE: + case LIRC_GET_REC_MODE: + case LIRC_GET_LENGTH: + if (!ret && put_user(val, (__u32 *)compat_ptr(arg))) + return -EFAULT; + break; + } + return ret; + + case LIRC_GET_SEND_CARRIER: + case LIRC_GET_REC_CARRIER: + case LIRC_GET_SEND_DUTY_CYCLE: + case LIRC_GET_REC_DUTY_CYCLE: + case LIRC_GET_REC_RESOLUTION: + case LIRC_SET_SEND_CARRIER: + case LIRC_SET_REC_CARRIER: + case LIRC_SET_SEND_DUTY_CYCLE: + case LIRC_SET_REC_DUTY_CYCLE: + case LIRC_SET_TRANSMITTER_MASK: + case LIRC_SET_REC_DUTY_CYCLE_RANGE: + case LIRC_SET_REC_CARRIER_RANGE: + /* + * These commands expect (unsigned int *)arg + * so no problems here. Just handle the locking. + */ + lock_kernel(); + cmd = cmd32; + ret = irctl_ioctl(file->f_dentry->d_inode, + file, cmd, arg); + unlock_kernel(); + return ret; + default: + /* unknown */ + printk(KERN_ERR "lirc_dev: %s(%s:%d): Unknown cmd %08x\n", + __func__, current->comm, current->pid, cmd32); + return -ENOIOCTLCMD; + } +} +#endif + +static ssize_t irctl_read(struct file *file, + char *buffer, + size_t length, + loff_t *ppos) +{ + struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)]; + unsigned char buf[ir->chunk_size]; + int ret = 0, written = 0; + int unlock = 1; + DECLARE_WAITQUEUE(wait, current); + + dprintk(LOGHEAD "read called\n", ir->d.name, ir->d.minor); + + /* if the driver has a specific read function use it instead */ + if (ir->d.fops && ir->d.fops->read) + return ir->d.fops->read(file, buffer, length, ppos); + + if (mutex_lock_interruptible(&ir->buffer_lock)) + return -ERESTARTSYS; + if (!ir->attached) { + mutex_unlock(&ir->buffer_lock); + return -ENODEV; + } + + if (length % ir->buf->chunk_size) { + dprintk(LOGHEAD "read result = -EINVAL\n", + ir->d.name, ir->d.minor); + mutex_unlock(&ir->buffer_lock); + return -EINVAL; + } + + /* + * we add ourselves to the task queue before buffer check + * to avoid losing scan code (in case when queue is awaken somewhere + * between while condition checking and scheduling) + */ + add_wait_queue(&ir->buf->wait_poll, &wait); + set_current_state(TASK_INTERRUPTIBLE); + + /* + * while we didn't provide 'length' bytes, device is opened in blocking + * mode and 'copy_to_user' is happy, wait for data. + */ + while (written < length && ret == 0) { + if (lirc_buffer_empty(ir->buf)) { + /* According to the read(2) man page, 'written' can be + * returned as less than 'length', instead of blocking + * again, returning -EWOULDBLOCK, or returning + * -ERESTARTSYS */ + if (written) + break; + if (file->f_flags & O_NONBLOCK) { + ret = -EWOULDBLOCK; + break; + } + if (signal_pending(current)) { + ret = -ERESTARTSYS; + break; + } + + mutex_unlock(&ir->buffer_lock); + schedule(); + set_current_state(TASK_INTERRUPTIBLE); + + if (mutex_lock_interruptible(&ir->buffer_lock)) { + unlock = 0; + ret = -ERESTARTSYS; + break; + } + + if (!ir->attached) { + ret = -ENODEV; + break; + } + } else { + lirc_buffer_read(ir->buf, buf); + ret = copy_to_user((void *)buffer+written, buf, + ir->buf->chunk_size); + written += ir->buf->chunk_size; + } + } + + remove_wait_queue(&ir->buf->wait_poll, &wait); + set_current_state(TASK_RUNNING); + if(unlock) mutex_unlock(&ir->buffer_lock); + + dprintk(LOGHEAD "read result = %s (%d)\n", + ir->d.name, ir->d.minor, ret ? "-EFAULT" : "OK", ret); + + return ret ? ret : written; +} + + +void *lirc_get_pdata(struct file *file) +{ + void *data = NULL; + + if (file && file->f_dentry && file->f_dentry->d_inode && + file->f_dentry->d_inode->i_rdev) { + struct irctl *ir; + ir = irctls[iminor(file->f_dentry->d_inode)]; + data = ir->d.data; + } + + return data; +} +EXPORT_SYMBOL(lirc_get_pdata); + + +static ssize_t irctl_write(struct file *file, const char *buffer, + size_t length, loff_t *ppos) +{ + struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)]; + + dprintk(LOGHEAD "write called\n", ir->d.name, ir->d.minor); + + /* if the driver has a specific read function use it instead */ + if (ir->d.fops && ir->d.fops->write) + return ir->d.fops->write(file, buffer, length, ppos); + + if (!ir->attached) + return -ENODEV; + + return -EINVAL; +} + + +static struct file_operations fops = { + .owner = THIS_MODULE, + .read = irctl_read, + .write = irctl_write, + .poll = irctl_poll, + .ioctl = irctl_ioctl, +#ifdef CONFIG_COMPAT + .compat_ioctl = irctl_compat_ioctl, +#endif + .open = irctl_open, + .release = irctl_close +}; + +/* For now don't try to use it as a static version ! */ +#ifdef MODULE + +static int __init lirc_dev_init(void) +{ + if (register_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME, &fops)) { + printk(KERN_ERR "lirc_dev: register_chrdev failed\n"); + goto out; + } + + lirc_class = class_create(THIS_MODULE, "lirc"); + if (IS_ERR(lirc_class)) { + printk(KERN_ERR "lirc_dev: class_create failed\n"); + goto out_unregister; + } + + printk(KERN_INFO "lirc_dev: IR Remote Control driver registered, " + "major %d \n", IRCTL_DEV_MAJOR); + + return 0; + +out_unregister: +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + if (unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME)) + printk(KERN_ERR "lirc_dev: unregister_chrdev failed!\n"); +#else + /* unregister_chrdev returns void now */ + unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME); +#endif +out: + return -1; +} + +static void __exit lirc_dev_exit(void) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23) + int ret; + + ret = unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME); + class_destroy(lirc_class); + + if (ret) + printk(KERN_ERR "lirc_dev: error in " + "module_unregister_chrdev: %d\n", ret); + else + dprintk("lirc_dev: module successfully unloaded\n"); +#else + /* unregister_chrdev returns void now */ + unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME); + class_destroy(lirc_class); + dprintk("lirc_dev: module unloaded\n"); +#endif +} + +module_init(lirc_dev_init); +module_exit(lirc_dev_exit); + +MODULE_DESCRIPTION("LIRC base driver module"); +MODULE_AUTHOR("Artur Lipowski"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_CHARDEV_MAJOR(IRCTL_DEV_MAJOR); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_igorplugusb/lirc_igorplugusb.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_igorplugusb/lirc_igorplugusb.c @@ -0,0 +1,637 @@ +/* + * lirc_igorplugusb - USB remote support for LIRC + * + * Supports the standard homebrew IgorPlugUSB receiver with Igor's firmware. + * See http://www.cesko.host.sk/IgorPlugUSB/IgorPlug-USB%20(AVR)_eng.htm + * + * The device can only record bursts of up to 36 pulses/spaces. + * Works fine with RC5. Longer commands lead to device buffer overrun. + * (Maybe a better firmware or a microcontroller with more ram can help?) + * + * Version 0.1 [beta status] + * + * Copyright (C) 2004 Jan M. Hochstein + * + * + * This driver was derived from: + * Paul Miller + * "lirc_atiusb" module + * Vladimir Dergachev 's 2002 + * "USB ATI Remote support" (input device) + * Adrian Dewhurst 's 2002 + * "USB StreamZap remote driver" (LIRC) + * Artur Lipowski 's 2002 + * "lirc_dev" and "lirc_gpio" LIRC modules + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0) +#error "*******************************************************" +#error "Sorry, this driver needs kernel version 2.4.0 or higher" +#error "*******************************************************" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../kcompat.h" +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" + +#if !defined(KERNEL_2_5) +#define USB_CTRL_GET_TIMEOUT 5 +#endif + +/* module identification */ +#define DRIVER_VERSION "0.2" +#define DRIVER_AUTHOR \ + "Jan M. Hochstein " +#define DRIVER_DESC "USB remote driver for LIRC" +#define DRIVER_NAME "lirc_igorplugusb" + +/* debugging support */ +#ifdef CONFIG_USB_DEBUG +static int debug = 1; +#else +static int debug; +#endif + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG DRIVER_NAME fmt, ## args); \ + } while (0) + +/* One mode2 pulse/space has 4 bytes. */ +#define CODE_LENGTH sizeof(lirc_t) + +/* Igor's firmware cannot record bursts longer than 36. */ +#define DEVICE_BUFLEN 36 + +/* + * Header at the beginning of the device's buffer: + * unsigned char data_length + * unsigned char data_start (!=0 means ring-buffer overrun) + * unsigned char counter (incremented by each burst) + */ +#define DEVICE_HEADERLEN 3 + +/* This is for the gap */ +#define ADDITIONAL_LIRC_BYTES 2 + +/* times to poll per second */ +#define SAMPLE_RATE 100 +static int sample_rate = SAMPLE_RATE; + + +/**** Igor's USB Request Codes */ + +#define SET_INFRABUFFER_EMPTY 1 +/** + * Params: none + * Answer: empty + */ + +#define GET_INFRACODE 2 +/** + * Params: + * wValue: offset to begin reading infra buffer + * + * Answer: infra data + */ + +#define SET_DATAPORT_DIRECTION 3 +/** + * Params: + * wValue: (byte) 1 bit for each data port pin (0=in, 1=out) + * + * Answer: empty + */ + +#define GET_DATAPORT_DIRECTION 4 +/** + * Params: none + * + * Answer: (byte) 1 bit for each data port pin (0=in, 1=out) + */ + +#define SET_OUT_DATAPORT 5 +/** + * Params: + * wValue: byte to write to output data port + * + * Answer: empty + */ + +#define GET_OUT_DATAPORT 6 +/** + * Params: none + * + * Answer: least significant 3 bits read from output data port + */ + +#define GET_IN_DATAPORT 7 +/** + * Params: none + * + * Answer: least significant 3 bits read from input data port + */ + +#define READ_EEPROM 8 +/** + * Params: + * wValue: offset to begin reading EEPROM + * + * Answer: EEPROM bytes + */ + +#define WRITE_EEPROM 9 +/** + * Params: + * wValue: offset to EEPROM byte + * wIndex: byte to write + * + * Answer: empty + */ + +#define SEND_RS232 10 +/** + * Params: + * wValue: byte to send + * + * Answer: empty + */ + +#define RECV_RS232 11 +/** + * Params: none + * + * Answer: byte received + */ + +#define SET_RS232_BAUD 12 +/** + * Params: + * wValue: byte to write to UART bit rate register (UBRR) + * + * Answer: empty + */ + +#define GET_RS232_BAUD 13 +/** + * Params: none + * + * Answer: byte read from UART bit rate register (UBRR) + */ + + +/* data structure for each usb remote */ +struct igorplug { + + /* usb */ + struct usb_device *usbdev; + struct urb *urb_in; + int devnum; + + unsigned char *buf_in; + unsigned int len_in; + int in_space; + struct timeval last_time; + +#if defined(KERNEL_2_5) + dma_addr_t dma_in; +#endif + + /* lirc */ + struct lirc_driver *d; + + /* handle sending (init strings) */ + int send_flags; +}; + +static int set_use_inc(void *data) +{ + struct igorplug *ir = data; + + if (!ir) { + printk(KERN_ERR DRIVER_NAME + "[?]: set_use_inc called with no context\n"); + return -EIO; + } + dprintk("[%d]: set use inc\n", ir->devnum); + + MOD_INC_USE_COUNT; + + if (!ir->usbdev) + return -ENODEV; + + return 0; +} + +static void set_use_dec(void *data) +{ + struct igorplug *ir = data; + + if (!ir) { + printk(KERN_ERR DRIVER_NAME + "[?]: set_use_dec called with no context\n"); + return; + } + dprintk("[%d]: set use dec\n", ir->devnum); + + MOD_DEC_USE_COUNT; +} + +static void send_fragment(struct igorplug *ir, struct lirc_buffer *buf, + int i, int max) +{ + /* MODE2: pulse/space (PULSE_BIT) in 1us units */ + while (i < max) { + /* 1 Igor-tick = 85.333333 us */ + lirc_t code = (unsigned int)ir->buf_in[i] * 85 + + (unsigned int)ir->buf_in[i] / 3; + ir->last_time.tv_usec += code; + if (ir->in_space) + code |= PULSE_BIT; + lirc_buffer_write_n(buf, (unsigned char *)&code, 1); + /* 1 chunk = CODE_LENGTH bytes */ + ir->in_space ^= 1; + ++i; + } +} + +/** + * Called in user context. + * return 0 if data was added to the buffer and + * -ENODATA if none was available. This should add some number of bits + * evenly divisible by code_length to the buffer + */ +static int usb_remote_poll(void *data, struct lirc_buffer *buf) +{ + int ret; + struct igorplug *ir = (struct igorplug *)data; + + if (!ir->usbdev) /* Has the device been removed? */ + return -ENODEV; + + memset(ir->buf_in, 0, ir->len_in); + + ret = usb_control_msg( + ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), + GET_INFRACODE, USB_TYPE_VENDOR|USB_DIR_IN, + 0/* offset */, /*unused*/0, + ir->buf_in, ir->len_in, + /*timeout*/HZ * USB_CTRL_GET_TIMEOUT); + if (ret > 0) { + lirc_t code, timediff; + struct timeval now; + + /* ACK packet has 1 byte --> ignore */ + if (ret < DEVICE_HEADERLEN) + return -ENODATA; + + dprintk(": Got %d bytes. Header: %02x %02x %02x\n", + ret, ir->buf_in[0], ir->buf_in[1], ir->buf_in[2]); + + do_gettimeofday(&now); + timediff = now.tv_sec - ir->last_time.tv_sec; + if (timediff + 1 > PULSE_MASK / 1000000) + timediff = PULSE_MASK; + else { + timediff *= 1000000; + timediff += now.tv_usec - ir->last_time.tv_usec; + } + ir->last_time.tv_sec = now.tv_sec; + ir->last_time.tv_usec = now.tv_usec; + + /* create leading gap */ + code = timediff; + lirc_buffer_write(buf, (unsigned char *)&code); + ir->in_space = 1; /* next comes a pulse */ + + if (ir->buf_in[2] == 0) + send_fragment(ir, buf, DEVICE_HEADERLEN, ret); + else { + printk(KERN_WARNING DRIVER_NAME + "[%d]: Device buffer overrun.\n", ir->devnum); + /* HHHNNNNNNNNNNNOOOOOOOO H = header + <---[2]---> N = newer + <---------ret--------> O = older */ + ir->buf_in[2] %= ret - DEVICE_HEADERLEN; /* sanitize */ + /* keep even-ness to not desync pulse/pause */ + send_fragment(ir, buf, DEVICE_HEADERLEN + + ir->buf_in[2] - (ir->buf_in[2] & 1), + ret); + send_fragment(ir, buf, DEVICE_HEADERLEN, + DEVICE_HEADERLEN + ir->buf_in[2]); + } + + ret = usb_control_msg( + ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), + SET_INFRABUFFER_EMPTY, USB_TYPE_VENDOR|USB_DIR_IN, + /*unused*/0, /*unused*/0, + /*dummy*/ir->buf_in, /*dummy*/ir->len_in, + /*timeout*/HZ * USB_CTRL_GET_TIMEOUT); + if (ret < 0) + printk(KERN_WARNING DRIVER_NAME + "[%d]: SET_INFRABUFFER_EMPTY: error %d\n", + ir->devnum, ret); + return 0; + } else + printk(KERN_WARNING DRIVER_NAME + "[%d]: GET_INFRACODE: error %d\n", + ir->devnum, ret); + + return -ENODATA; +} + + + +#if defined(KERNEL_2_5) +static int usb_remote_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + struct usb_device *dev = NULL; + struct usb_host_interface *idesc = NULL; + struct usb_host_endpoint *ep_ctl2; +#else +static void *usb_remote_probe(struct usb_device *dev, unsigned int ifnum, + const struct usb_device_id *id) +{ + struct usb_interface *intf; + struct usb_interface_descriptor *idesc; + struct usb_endpoint_descriptor *ep_ctl2; +#endif + struct igorplug *ir = NULL; + struct lirc_driver *driver = NULL; + int devnum, pipe, maxp; + int minor = 0; + char buf[63], name[128] = ""; + int mem_failure = 0; + int ret; + + dprintk(": usb probe called.\n"); + +#if defined(KERNEL_2_5) + dev = interface_to_usbdev(intf); + +# if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5) + idesc = &intf->altsetting[intf->act_altsetting]; /* in 2.6.4 */ +# else + idesc = intf->cur_altsetting; /* in 2.6.6 */ +# endif + + if (idesc->desc.bNumEndpoints != 1) + return -ENODEV; + ep_ctl2 = idesc->endpoint; + if (((ep_ctl2->desc.bEndpointAddress & USB_ENDPOINT_DIR_MASK) + != USB_DIR_IN) + || (ep_ctl2->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + != USB_ENDPOINT_XFER_CONTROL) + return -ENODEV; + pipe = usb_rcvctrlpipe(dev, ep_ctl2->desc.bEndpointAddress); +#else + intf = &dev->actconfig->interface[ifnum]; + idesc = &intf->altsetting[intf->act_altsetting]; + if (idesc->bNumEndpoints != 1) + return NULL; + ep_ctl2 = idesc->endpoint; + if (((ep_ctl2->bEndpointAddress & USB_ENDPOINT_DIR_MASK) + != USB_DIR_IN) + || (ep_ctl2->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + != USB_ENDPOINT_XFER_CONTROL) + return NULL; + pipe = usb_rcvctrlpipe(dev, ep_ctl2->bEndpointAddress); +#endif + devnum = dev->devnum; + maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe)); + + dprintk(DRIVER_NAME "[%d]: bytes_in_key=%d maxp=%d\n", + devnum, CODE_LENGTH, maxp); + + + mem_failure = 0; + ir = kzalloc(sizeof(struct igorplug), GFP_KERNEL); + if (!ir) { + mem_failure = 1; + goto mem_failure_switch; + } + + driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL); + if (!driver) { + mem_failure = 2; + goto mem_failure_switch; + } + +#if defined(KERNEL_2_5) + ir->buf_in = usb_buffer_alloc(dev, + DEVICE_BUFLEN+DEVICE_HEADERLEN, + GFP_ATOMIC, &ir->dma_in); +#else + ir->buf_in = kmalloc(DEVICE_BUFLEN+DEVICE_HEADERLEN, + GFP_KERNEL); +#endif + if (!ir->buf_in) { + mem_failure = 3; + goto mem_failure_switch; + } + + strcpy(driver->name, DRIVER_NAME " "); + driver->minor = -1; + driver->code_length = CODE_LENGTH * 8; /* in bits */ + driver->features = LIRC_CAN_REC_MODE2; + driver->data = ir; + driver->buffer_size = DEVICE_BUFLEN + ADDITIONAL_LIRC_BYTES; + driver->set_use_inc = &set_use_inc; + driver->set_use_dec = &set_use_dec; + driver->sample_rate = sample_rate; /* per second */ + driver->add_to_buf = &usb_remote_poll; +#ifdef LIRC_HAVE_SYSFS + driver->dev = &intf->dev; +#endif + driver->owner = THIS_MODULE; + + minor = lirc_register_driver(driver); + if (minor < 0) + mem_failure = 9; + +mem_failure_switch: + + switch (mem_failure) { + case 9: +#if defined(KERNEL_2_5) + usb_buffer_free(dev, DEVICE_BUFLEN+DEVICE_HEADERLEN, + ir->buf_in, ir->dma_in); +#else + kfree(ir->buf_in); +#endif + case 3: + kfree(driver); + case 2: + kfree(ir); + case 1: + printk(KERN_ERR DRIVER_NAME "[%d]: out of memory (code=%d)\n", + devnum, mem_failure); +#if defined(KERNEL_2_5) + return -ENOMEM; +#else + return NULL; +#endif + } + + driver->minor = minor; + ir->d = driver; + ir->devnum = devnum; + ir->usbdev = dev; + ir->len_in = DEVICE_BUFLEN+DEVICE_HEADERLEN; + ir->in_space = 1; /* First mode2 event is a space. */ + do_gettimeofday(&ir->last_time); + + if (dev->descriptor.iManufacturer + && usb_string(dev, dev->descriptor.iManufacturer, + buf, sizeof(buf)) > 0) + strlcpy(name, buf, sizeof(name)); + if (dev->descriptor.iProduct + && usb_string(dev, dev->descriptor.iProduct, buf, sizeof(buf)) > 0) + snprintf(name + strlen(name), sizeof(name) - strlen(name), + " %s", buf); + printk(KERN_INFO DRIVER_NAME "[%d]: %s on usb%d:%d\n", devnum, name, + dev->bus->busnum, devnum); + + /* clear device buffer */ + ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0), + SET_INFRABUFFER_EMPTY, USB_TYPE_VENDOR|USB_DIR_IN, + /*unused*/0, /*unused*/0, + /*dummy*/ir->buf_in, /*dummy*/ir->len_in, + /*timeout*/HZ * USB_CTRL_GET_TIMEOUT); + if (ret < 0) + printk(KERN_WARNING DRIVER_NAME + "[%d]: SET_INFRABUFFER_EMPTY: error %d\n", + devnum, ret); + +#if defined(KERNEL_2_5) + usb_set_intfdata(intf, ir); + return 0; +#else + return ir; +#endif +} + + +#if defined(KERNEL_2_5) +static void usb_remote_disconnect(struct usb_interface *intf) +{ + struct usb_device *dev = interface_to_usbdev(intf); + struct igorplug *ir = usb_get_intfdata(intf); +#else +static void usb_remote_disconnect(struct usb_device *dev, void *ptr) +{ + struct igorplug *ir = ptr; +#endif + + if (!ir || !ir->d) + return; + + printk(KERN_INFO DRIVER_NAME + "[%d]: usb remote disconnected\n", ir->devnum); + + lirc_unregister_driver(ir->d->minor); + + lirc_buffer_free(ir->d->rbuf); + kfree(ir->d->rbuf); + kfree(ir->d); + + +#if defined(KERNEL_2_5) + usb_buffer_free(dev, ir->len_in, ir->buf_in, ir->dma_in); +#else + kfree(ir->buf_in); +#endif + + kfree(ir); +} + +static struct usb_device_id usb_remote_id_table [] = { + /* Igor Plug USB (Atmel's Manufact. ID) */ + { USB_DEVICE(0x03eb, 0x0002) }, + /* Fit PC2 Infrared Adapter */ + { USB_DEVICE(0x03eb, 0x21fe) }, + + /* Terminating entry */ + { } +}; + +static struct usb_driver usb_remote_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = DRIVER_NAME, + .probe = usb_remote_probe, + .disconnect = usb_remote_disconnect, + .id_table = usb_remote_id_table +}; + +static int __init usb_remote_init(void) +{ + int i; + + printk(KERN_INFO DRIVER_NAME ": " DRIVER_DESC " v" DRIVER_VERSION "\n"); + printk(KERN_INFO DRIVER_NAME ": " DRIVER_AUTHOR "\n"); + dprintk(": debug mode enabled\n"); + + i = usb_register(&usb_remote_driver); + if (i < 0) { + printk(KERN_ERR DRIVER_NAME + ": usb register failed, result = %d\n", i); + return -ENODEV; + } + + return 0; +} + +static void __exit usb_remote_exit(void) +{ + usb_deregister(&usb_remote_driver); +} + +module_init(usb_remote_init); +module_exit(usb_remote_exit); + +#if defined(KERNEL_2_5) +#include +MODULE_INFO(vermagic, VERMAGIC_STRING); +#endif + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(usb, usb_remote_id_table); + +module_param(sample_rate, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(sample_rate, "Sampling rate in Hz (default: 100)"); + +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_igorplugusb/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_igorplugusb/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_IGORPLUGUSB) += lirc_igorplugusb.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_parallel/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_parallel/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_PARALLEL) += lirc_parallel.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_parallel/lirc_parallel.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_parallel/lirc_parallel.h @@ -0,0 +1,26 @@ +/* $Id: lirc_parallel.h,v 5.2 2007/01/25 04:32:05 lirc Exp $ */ + +#ifndef _LIRC_PARALLEL_H +#define _LIRC_PARALLEL_H + +#include + +#define LIRC_PORT_LEN 3 + +#define LIRC_LP_BASE 0 +#define LIRC_LP_STATUS 1 +#define LIRC_LP_CONTROL 2 + +#define LIRC_PORT_DATA LIRC_LP_BASE /* base */ +#define LIRC_PORT_TIMER LIRC_LP_STATUS /* status port */ +#define LIRC_PORT_TIMER_BIT LP_PBUSY /* busy signal */ +#define LIRC_PORT_SIGNAL LIRC_LP_STATUS /* status port */ +#define LIRC_PORT_SIGNAL_BIT LP_PACK /* ack signal */ +#define LIRC_PORT_IRQ LIRC_LP_CONTROL /* control port */ + +#define LIRC_SFH506_DELAY 0 /* delay t_phl in usecs */ + +#define LIRC_PARALLEL_MAX_TRANSMITTERS 8 +#define LIRC_PARALLEL_TRANSMITTER_MASK ((1< + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/*** Includes ***/ +#ifdef HAVE_CONFIG_H +# include +#endif +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18) +#error "**********************************************************" +#error " Sorry, this driver needs kernel version 2.2.18 or higher " +#error "**********************************************************" +#endif + +#include +#ifdef CONFIG_SMP +#error "--- Sorry, this driver is not SMP safe. ---" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#include +#include +#include +#else +#include +#include +#include +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) +#include +#endif + +#include +#include + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#include "lirc_parallel.h" + +#define LIRC_DRIVER_NAME "lirc_parallel" + +#ifndef LIRC_IRQ +#define LIRC_IRQ 7 +#endif +#ifndef LIRC_PORT +#define LIRC_PORT 0x378 +#endif +#ifndef LIRC_TIMER +#define LIRC_TIMER 65536 +#endif + +/*** Global Variables ***/ + +static int debug; +static int check_pselecd; + +unsigned int irq = LIRC_IRQ; +unsigned int io = LIRC_PORT; +#ifdef LIRC_TIMER +unsigned int timer; +unsigned int default_timer = LIRC_TIMER; +#endif + +#define WBUF_SIZE (256) +#define RBUF_SIZE (256) /* this must be a power of 2 larger than 1 */ + +static lirc_t wbuf[WBUF_SIZE]; +static lirc_t rbuf[RBUF_SIZE]; + +DECLARE_WAIT_QUEUE_HEAD(lirc_wait); + +unsigned int rptr; +unsigned int wptr; +unsigned int lost_irqs; +int is_open; + +struct parport *pport; +struct pardevice *ppdevice; +int is_claimed; + +unsigned int tx_mask = 1; + +/*** Internal Functions ***/ + +static unsigned int in(int offset) +{ + switch (offset) { + case LIRC_LP_BASE: + return parport_read_data(pport); + case LIRC_LP_STATUS: + return parport_read_status(pport); + case LIRC_LP_CONTROL: + return parport_read_control(pport); + } + return 0; /* make compiler happy */ +} + +static void out(int offset, int value) +{ + switch (offset) { + case LIRC_LP_BASE: + parport_write_data(pport, value); + break; + case LIRC_LP_CONTROL: + parport_write_control(pport, value); + break; + case LIRC_LP_STATUS: + printk(KERN_INFO "%s: attempt to write to status register\n", + LIRC_DRIVER_NAME); + break; + } +} + +static unsigned int lirc_get_timer(void) +{ + return in(LIRC_PORT_TIMER) & LIRC_PORT_TIMER_BIT; +} + +static unsigned int lirc_get_signal(void) +{ + return in(LIRC_PORT_SIGNAL) & LIRC_PORT_SIGNAL_BIT; +} + +static void lirc_on(void) +{ + out(LIRC_PORT_DATA, tx_mask); +} + +static void lirc_off(void) +{ + out(LIRC_PORT_DATA, 0); +} + +static unsigned int init_lirc_timer(void) +{ + struct timeval tv, now; + unsigned int level, newlevel, timeelapsed, newtimer; + int count = 0; + + do_gettimeofday(&tv); + tv.tv_sec++; /* wait max. 1 sec. */ + level = lirc_get_timer(); + do { + newlevel = lirc_get_timer(); + if (level == 0 && newlevel != 0) + count++; + level = newlevel; + do_gettimeofday(&now); + } while (count < 1000 && (now.tv_sec < tv.tv_sec + || (now.tv_sec == tv.tv_sec + && now.tv_usec < tv.tv_usec))); + + timeelapsed = ((now.tv_sec + 1 - tv.tv_sec)*1000000 + + (now.tv_usec - tv.tv_usec)); + if (count >= 1000 && timeelapsed > 0) { + if (default_timer == 0) { + /* autodetect timer */ + newtimer = (1000000*count)/timeelapsed; + printk(KERN_INFO "%s: %u Hz timer detected\n", + LIRC_DRIVER_NAME, newtimer); + return newtimer; + } else { + newtimer = (1000000*count)/timeelapsed; + if (abs(newtimer - default_timer) > default_timer/10) { + /* bad timer */ + printk(KERN_NOTICE "%s: bad timer: %u Hz\n", + LIRC_DRIVER_NAME, newtimer); + printk(KERN_NOTICE "%s: using default timer: " + "%u Hz\n", + LIRC_DRIVER_NAME, default_timer); + return default_timer; + } else { + printk(KERN_INFO "%s: %u Hz timer detected\n", + LIRC_DRIVER_NAME, newtimer); + return newtimer; /* use detected value */ + } + } + } else { + printk(KERN_NOTICE "%s: no timer detected\n", LIRC_DRIVER_NAME); + return 0; + } +} + +static int lirc_claim(void) +{ + if (parport_claim(ppdevice) != 0) { + printk(KERN_WARNING "%s: could not claim port\n", + LIRC_DRIVER_NAME); + printk(KERN_WARNING "%s: waiting for port becoming available" + "\n", LIRC_DRIVER_NAME); + if (parport_claim_or_block(ppdevice) < 0) { + printk(KERN_NOTICE "%s: could not claim port, giving" + " up\n", LIRC_DRIVER_NAME); + return 0; + } + } + out(LIRC_LP_CONTROL, LP_PSELECP|LP_PINITP); + is_claimed = 1; + return 1; +} + +/*** interrupt handler ***/ + +static void rbuf_write(lirc_t signal) +{ + unsigned int nwptr; + + nwptr = (wptr + 1) & (RBUF_SIZE - 1); + if (nwptr == rptr) { + /* no new signals will be accepted */ + lost_irqs++; + printk(KERN_NOTICE "%s: buffer overrun\n", LIRC_DRIVER_NAME); + return; + } + rbuf[wptr] = signal; + wptr = nwptr; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void irq_handler(int i, void *blah, struct pt_regs *regs) +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24) +static void irq_handler(int i, void *blah) +#else +static void irq_handler(void *blah) +#endif +{ + struct timeval tv; + static struct timeval lasttv; + static int init; + long signal; + lirc_t data; + unsigned int level, newlevel; + unsigned int timeout; + + if (!MOD_IN_USE) + return; + + if (!is_claimed) + return; + +#if 0 + /* disable interrupt */ + disable_irq(irq); + out(LIRC_PORT_IRQ, in(LIRC_PORT_IRQ) & (~LP_PINTEN)); +#endif + if (check_pselecd && (in(1) & LP_PSELECD)) + return; + +#ifdef LIRC_TIMER + if (init) { + do_gettimeofday(&tv); + + signal = tv.tv_sec - lasttv.tv_sec; + if (signal > 15) + /* really long time */ + data = PULSE_MASK; + else + data = (lirc_t) (signal*1000000 + + tv.tv_usec - lasttv.tv_usec + + LIRC_SFH506_DELAY); + + rbuf_write(data); /* space */ + } else { + if (timer == 0) { + /* + * wake up; we'll lose this signal, but it will be + * garbage if the device is turned on anyway + */ + timer = init_lirc_timer(); + /* enable_irq(irq); */ + return; + } + init = 1; + } + + timeout = timer/10; /* timeout after 1/10 sec. */ + signal = 1; + level = lirc_get_timer(); + do { + newlevel = lirc_get_timer(); + if (level == 0 && newlevel != 0) + signal++; + level = newlevel; + + /* giving up */ + if (signal > timeout + || (check_pselecd && (in(1) & LP_PSELECD))) { + signal = 0; + printk(KERN_NOTICE "%s: timeout\n", LIRC_DRIVER_NAME); + break; + } + } while (lirc_get_signal()); + + if (signal != 0) { + /* adjust value to usecs */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) + unsigned long long helper; + + helper = ((unsigned long long) signal)*1000000; + do_div(helper, timer); + signal = (long) helper; +#else + signal = (long) ((((double) signal)*1000000)/timer); +#endif + + if (signal > LIRC_SFH506_DELAY) + data = signal - LIRC_SFH506_DELAY; + else + data = 1; + rbuf_write(PULSE_BIT|data); /* pulse */ + } + do_gettimeofday(&lasttv); +#else + /* add your code here */ +#endif + + wake_up_interruptible(&lirc_wait); + + /* enable interrupt */ + /* + enable_irq(irq); + out(LIRC_PORT_IRQ, in(LIRC_PORT_IRQ)|LP_PINTEN); + */ +} + +/*** file operations ***/ + +static loff_t lirc_lseek(struct file *filep, loff_t offset, int orig) +{ + return -ESPIPE; +} + +static ssize_t lirc_read(struct file *filep, char *buf, size_t n, loff_t *ppos) +{ + int result = 0; + int count = 0; + DECLARE_WAITQUEUE(wait, current); + + if (n % sizeof(lirc_t)) + return -EINVAL; + + add_wait_queue(&lirc_wait, &wait); + set_current_state(TASK_INTERRUPTIBLE); + while (count < n) { + if (rptr != wptr) { + if (copy_to_user(buf+count, (char *) &rbuf[rptr], + sizeof(lirc_t))) { + result = -EFAULT; + break; + } + rptr = (rptr + 1) & (RBUF_SIZE - 1); + count += sizeof(lirc_t); + } else { + if (filep->f_flags & O_NONBLOCK) { + result = -EAGAIN; + break; + } + if (signal_pending(current)) { + result = -ERESTARTSYS; + break; + } + schedule(); + set_current_state(TASK_INTERRUPTIBLE); + } + } + remove_wait_queue(&lirc_wait, &wait); + set_current_state(TASK_RUNNING); + return count ? count : result; +} + +static ssize_t lirc_write(struct file *filep, const char *buf, size_t n, + loff_t *ppos) +{ + int count; + unsigned int i; + unsigned int level, newlevel; + unsigned long flags; + lirc_t counttimer; + + if (!is_claimed) + return -EBUSY; + + if (n % sizeof(lirc_t)) + return -EINVAL; + + count = n / sizeof(lirc_t); + + if (count > WBUF_SIZE || count % 2 == 0) + return -EINVAL; + + if (copy_from_user(wbuf, buf, n)) + return -EFAULT; + +#ifdef LIRC_TIMER + if (timer == 0) { + /* try again if device is ready */ + timer = init_lirc_timer(); + if (timer == 0) + return -EIO; + } + + /* adjust values from usecs */ + for (i = 0; i < count; i++) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) + unsigned long long helper; + + helper = ((unsigned long long) wbuf[i])*timer; + do_div(helper, 1000000); + wbuf[i] = (lirc_t) helper; +#else + wbuf[i] = (lirc_t) (((double) wbuf[i])*timer/1000000); +#endif + } + + local_irq_save(flags); + i = 0; + while (i < count) { + level = lirc_get_timer(); + counttimer = 0; + lirc_on(); + do { + newlevel = lirc_get_timer(); + if (level == 0 && newlevel != 0) + counttimer++; + level = newlevel; + if (check_pselecd && (in(1) & LP_PSELECD)) { + lirc_off(); + local_irq_restore(flags); + return -EIO; + } + } while (counttimer < wbuf[i]); + i++; + + lirc_off(); + if (i == count) + break; + counttimer = 0; + do { + newlevel = lirc_get_timer(); + if (level == 0 && newlevel != 0) + counttimer++; + level = newlevel; + if (check_pselecd && (in(1) & LP_PSELECD)) { + local_irq_restore(flags); + return -EIO; + } + } while (counttimer < wbuf[i]); + i++; + } + local_irq_restore(flags); +#else + /* place code that handles write without external timer here */ +#endif + return n; +} + +static unsigned int lirc_poll(struct file *file, poll_table *wait) +{ + poll_wait(file, &lirc_wait, wait); + if (rptr != wptr) + return POLLIN | POLLRDNORM; + return 0; +} + +static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd, + unsigned long arg) +{ + int result; + unsigned long features = LIRC_CAN_SET_TRANSMITTER_MASK | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2; + unsigned long mode; + unsigned int ivalue; + + switch (cmd) { + case LIRC_GET_FEATURES: + result = put_user(features, (unsigned long *) arg); + if (result) + return result; + break; + case LIRC_GET_SEND_MODE: + result = put_user(LIRC_MODE_PULSE, (unsigned long *) arg); + if (result) + return result; + break; + case LIRC_GET_REC_MODE: + result = put_user(LIRC_MODE_MODE2, (unsigned long *) arg); + if (result) + return result; + break; + case LIRC_SET_SEND_MODE: + result = get_user(mode, (unsigned long *) arg); + if (result) + return result; + if (mode != LIRC_MODE_PULSE) + return -EINVAL; + break; + case LIRC_SET_REC_MODE: + result = get_user(mode, (unsigned long *) arg); + if (result) + return result; + if (mode != LIRC_MODE_MODE2) + return -ENOSYS; + break; + case LIRC_SET_TRANSMITTER_MASK: + result = get_user(ivalue, (unsigned int *) arg); + if (result) + return result; + if ((ivalue & LIRC_PARALLEL_TRANSMITTER_MASK) != ivalue) + return LIRC_PARALLEL_MAX_TRANSMITTERS; + tx_mask = ivalue; + break; + default: + return -ENOIOCTLCMD; + } + return 0; +} + +static int lirc_open(struct inode *node, struct file *filep) +{ + if (MOD_IN_USE || !lirc_claim()) + return -EBUSY; + + parport_enable_irq(pport); + + /* init read ptr */ + rptr = 0; + wptr = 0; + lost_irqs = 0; + + MOD_INC_USE_COUNT; + is_open = 1; + return 0; +} + +static int lirc_close(struct inode *node, struct file *filep) +{ + if (is_claimed) { + is_claimed = 0; + parport_release(ppdevice); + } + is_open = 0; + MOD_DEC_USE_COUNT; + return 0; +} + +static struct file_operations lirc_fops = { + .owner = THIS_MODULE, + .llseek = lirc_lseek, + .read = lirc_read, + .write = lirc_write, + .poll = lirc_poll, + .ioctl = lirc_ioctl, + .open = lirc_open, + .release = lirc_close +}; + +static int set_use_inc(void *data) +{ + return 0; +} + +static void set_use_dec(void *data) +{ +} + +static struct lirc_driver driver = { + .name = LIRC_DRIVER_NAME, + .minor = -1, + .code_length = 1, + .sample_rate = 0, + .data = NULL, + .add_to_buf = NULL, +#ifndef LIRC_REMOVE_DURING_EXPORT + .get_queue = NULL, +#endif + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .fops = &lirc_fops, + .dev = NULL, + .owner = THIS_MODULE, +}; + +#ifdef MODULE +static int pf(void *handle); +static void kf(void *handle); + +static struct timer_list poll_timer; +static void poll_state(unsigned long ignored); + +static void poll_state(unsigned long ignored) +{ + printk(KERN_NOTICE "%s: time\n", + LIRC_DRIVER_NAME); + del_timer(&poll_timer); + if (is_claimed) + return; + kf(NULL); + if (!is_claimed) { + printk(KERN_NOTICE "%s: could not claim port, giving up\n", + LIRC_DRIVER_NAME); + init_timer(&poll_timer); + poll_timer.expires = jiffies + HZ; + poll_timer.data = (unsigned long)current; + poll_timer.function = poll_state; + add_timer(&poll_timer); + } +} + +static int pf(void *handle) +{ + parport_disable_irq(pport); + is_claimed = 0; + return 0; +} + +static void kf(void *handle) +{ + if (!is_open) + return; + if (!lirc_claim()) + return; + parport_enable_irq(pport); + lirc_off(); + /* this is a bit annoying when you actually print...*/ + /* + printk(KERN_INFO "%s: reclaimed port\n", LIRC_DRIVER_NAME); + */ +} + +/*** module initialization and cleanup ***/ + +static int __init lirc_parallel_init(void) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 3) + pport = parport_find_base(io); +#else + pport = parport_enumerate(); + while (pport != NULL) { + if (pport->base == io) + break; + pport = pport->next; + } +#endif + if (pport == NULL) { + printk(KERN_NOTICE "%s: no port at %x found\n", + LIRC_DRIVER_NAME, io); + return -ENXIO; + } + ppdevice = parport_register_device(pport, LIRC_DRIVER_NAME, + pf, kf, irq_handler, 0, NULL); +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 3) + parport_put_port(pport); +#endif + if (ppdevice == NULL) { + printk(KERN_NOTICE "%s: parport_register_device() failed\n", + LIRC_DRIVER_NAME); + return -ENXIO; + } + if (parport_claim(ppdevice) != 0) + goto skip_init; + is_claimed = 1; + out(LIRC_LP_CONTROL, LP_PSELECP|LP_PINITP); + +#ifdef LIRC_TIMER + if (debug) + out(LIRC_PORT_DATA, tx_mask); + + timer = init_lirc_timer(); + +#if 0 /* continue even if device is offline */ + if (timer == 0) { + is_claimed = 0; + parport_release(pport); + parport_unregister_device(ppdevice); + return -EIO; + } + +#endif + if (debug) + out(LIRC_PORT_DATA, 0); +#endif + + is_claimed = 0; + parport_release(ppdevice); + skip_init: + driver.minor = lirc_register_driver(&driver); + if (driver.minor < 0) { + printk(KERN_NOTICE "%s: register_chrdev() failed\n", + LIRC_DRIVER_NAME); + parport_unregister_device(ppdevice); + return -EIO; + } + printk(KERN_INFO "%s: installed using port 0x%04x irq %d\n", + LIRC_DRIVER_NAME, io, irq); + return 0; +} + +static void __exit lirc_parallel_exit(void) +{ + parport_unregister_device(ppdevice); + lirc_unregister_driver(driver.minor); +} + +module_init(lirc_parallel_init); +module_exit(lirc_parallel_exit); + +MODULE_DESCRIPTION("Infrared receiver driver for parallel ports."); +MODULE_AUTHOR("Christoph Bartelmus"); +MODULE_LICENSE("GPL"); + +module_param(io, int, S_IRUGO); +MODULE_PARM_DESC(io, "I/O address base (0x3bc, 0x378 or 0x278)"); + +module_param(irq, int, S_IRUGO); +MODULE_PARM_DESC(irq, "Interrupt (7 or 5)"); + +module_param(tx_mask, int, S_IRUGO); +MODULE_PARM_DESC(tx_maxk, "Transmitter mask (default: 0x01)"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +module_param(check_pselecd, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Check for printer (default: 0)"); +EXPORT_NO_SYMBOLS; +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_sasem/lirc_sasem.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_sasem/lirc_sasem.c @@ -0,0 +1,1108 @@ +/* $Id: lirc_sasem.c,v 1.40 2009/02/28 10:27:10 lirc Exp $ */ +/* + * lirc_sasem.c - USB remote support for LIRC + * Version 0.5 + * + * Copyright (C) 2004-2005 Oliver Stabel + * Tim Davies + * + * This driver was derived from: + * Venky Raju + * "lirc_imon - "LIRC/VFD driver for Ahanix/Soundgraph IMON IR/VFD" + * Paul Miller 's 2003-2004 + * "lirc_atiusb - USB remote support for LIRC" + * Culver Consulting Services 's 2003 + * "Sasem OnAir VFD/IR USB driver" + * + * + * NOTE - The LCDproc iMon driver should work with this module. More info at + * http://www.frogstorm.info/sasem + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 22) +#error "*** Sorry, this driver requires kernel version 2.4.22 or higher" +#endif + +#include + +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include + +#include "../kcompat.h" +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" + + +#define MOD_AUTHOR "Oliver Stabel , " \ + "Tim Davies " +#define MOD_DESC "USB Driver for Sasem Remote Controller V1.1" +#define MOD_NAME "lirc_sasem" +#define MOD_VERSION "0.5" + +#define VFD_MINOR_BASE 144 /* Same as LCD */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) +#define DEVFS_MODE S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH +#endif +#define DEVFS_NAME LIRC_DEVFS_PREFIX "lcd%d" + +#define BUF_CHUNK_SIZE 8 +#define BUF_SIZE 128 + +#define IOCTL_LCD_CONTRAST 1 + +/*** P R O T O T Y P E S ***/ + +/* USB Callback prototypes */ +#ifdef KERNEL_2_5 +static int sasem_probe(struct usb_interface *interface, + const struct usb_device_id *id); +static void sasem_disconnect(struct usb_interface *interface); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_rx_callback(struct urb *urb, struct pt_regs *regs); +static void usb_tx_callback(struct urb *urb, struct pt_regs *regs); +#else +static void usb_rx_callback(struct urb *urb); +static void usb_tx_callback(struct urb *urb); +#endif +#else +static void *sasem_probe(struct usb_device *dev, unsigned int intf, + const struct usb_device_id *id); +static void sasem_disconnect(struct usb_device *dev, void *data); +static void usb_rx_callback(struct urb *urb); +static void usb_tx_callback(struct urb *urb); +#endif + +/* VFD file_operations function prototypes */ +static int vfd_open(struct inode *inode, struct file *file); +static int vfd_ioctl(struct inode *inode, struct file *file, + unsigned cmd, unsigned long arg); +static int vfd_close(struct inode *inode, struct file *file); +static ssize_t vfd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos); + +/* LIRC driver function prototypes */ +static int ir_open(void *data); +static void ir_close(void *data); + +/* Driver init/exit prototypes */ +static int __init sasem_init(void); +static void __exit sasem_exit(void); + +/*** G L O B A L S ***/ + +struct sasem_context { + + struct usb_device *dev; + int vfd_isopen; /* VFD port has been opened */ + unsigned int vfd_contrast; /* VFD contrast */ +#if !defined(KERNEL_2_5) + int subminor; /* index into minor_table */ + devfs_handle_t devfs; +#endif + int ir_isopen; /* IR port has been opened */ + int dev_present; /* USB device presence */ + struct mutex lock; /* to lock this object */ + wait_queue_head_t remove_ok; /* For unexpected USB disconnects */ + + struct lirc_driver *driver; + struct usb_endpoint_descriptor *rx_endpoint; + struct usb_endpoint_descriptor *tx_endpoint; + struct urb *rx_urb; + struct urb *tx_urb; + unsigned char usb_rx_buf[8]; + unsigned char usb_tx_buf[8]; + + struct tx_t { + unsigned char data_buf[32]; /* user data buffer */ + struct completion finished; /* wait for write to finish */ + atomic_t busy; /* write in progress */ + int status; /* status of tx completion */ + } tx; + + /* for dealing with repeat codes (wish there was a toggle bit!) */ + struct timeval presstime; + char lastcode[8]; + int codesaved; +}; + +/* VFD file operations */ +static struct file_operations vfd_fops = { + + .owner = THIS_MODULE, + .open = &vfd_open, + .write = &vfd_write, + .ioctl = &vfd_ioctl, + .release = &vfd_close +}; + +/* USB Device ID for Sasem USB Control Board */ +static struct usb_device_id sasem_usb_id_table [] = { + /* Sasem USB Control Board */ + { USB_DEVICE(0x11ba, 0x0101) }, + /* Terminating entry */ + {} +}; + +/* USB Device data */ +static struct usb_driver sasem_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = MOD_NAME, + .probe = sasem_probe, + .disconnect = sasem_disconnect, + .id_table = sasem_usb_id_table, +#if !defined(KERNEL_2_5) + .fops = &vfd_fops, + .minor = VFD_MINOR_BASE, +#endif +}; + +#ifdef KERNEL_2_5 +static struct usb_class_driver sasem_class = { + .name = DEVFS_NAME, + .fops = &vfd_fops, +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) + .mode = DEVFS_MODE, +#endif + .minor_base = VFD_MINOR_BASE, +}; +#endif + +/* to prevent races between open() and disconnect() */ +static DEFINE_MUTEX(disconnect_lock); + +static int debug; + +#if !defined(KERNEL_2_5) + +#define MAX_DEVICES 4 /* In case there's more than one Sasem device */ +static struct sasem_context *minor_table [MAX_DEVICES]; + +/* the global usb devfs handle */ +extern devfs_handle_t usb_devfs_handle; + +#endif + +/*** M O D U L E C O D E ***/ + +MODULE_AUTHOR(MOD_AUTHOR); +MODULE_DESCRIPTION(MOD_DESC); +MODULE_LICENSE("GPL"); +module_param(debug, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Debug messages: 0=no, 1=yes (default: no)"); + +static void delete_context(struct sasem_context *context) +{ + usb_free_urb(context->tx_urb); /* VFD */ + usb_free_urb(context->rx_urb); /* IR */ + lirc_buffer_free(context->driver->rbuf); + kfree(context->driver->rbuf); + kfree(context->driver); + kfree(context); + + if (debug) + printk(KERN_INFO "%s: context deleted\n", __func__); +} + +static void deregister_from_lirc(struct sasem_context *context) +{ + int retval; + int minor = context->driver->minor; + + retval = lirc_unregister_driver(minor); + if (retval) + err("%s: unable to deregister from lirc (%d)", + __func__, retval); + else + printk(KERN_INFO "Deregistered Sasem driver (minor:%d)\n", + minor); + +} + +/** + * Called when the VFD device (e.g. /dev/usb/lcd) + * is opened by the application. + */ +static int vfd_open(struct inode *inode, struct file *file) +{ +#ifdef KERNEL_2_5 + struct usb_interface *interface; +#endif + struct sasem_context *context = NULL; + int subminor; + int retval = 0; + + /* prevent races with disconnect */ + mutex_lock(&disconnect_lock); + +#ifdef KERNEL_2_5 + subminor = iminor(inode); + interface = usb_find_interface(&sasem_driver, subminor); + if (!interface) { + err("%s: could not find interface for minor %d", + __func__, subminor); + retval = -ENODEV; + goto exit; + } + context = usb_get_intfdata(interface); +#else + subminor = MINOR(inode->i_rdev) - VFD_MINOR_BASE; + if (subminor < 0 || subminor >= MAX_DEVICES) { + err("%s: no record of minor %d", __func__, subminor); + retval = -ENODEV; + goto exit; + } + context = minor_table [subminor]; +#endif + + if (!context) { + err("%s: no context found for minor %d", + __func__, subminor); + retval = -ENODEV; + goto exit; + } + + mutex_lock(&context->lock); + + if (context->vfd_isopen) { + err("%s: VFD port is already open", __func__); + retval = -EBUSY; + } else { + MOD_INC_USE_COUNT; + context->vfd_isopen = 1; + file->private_data = context; + printk(KERN_INFO "VFD port opened\n"); + } + + mutex_unlock(&context->lock); + +exit: + mutex_unlock(&disconnect_lock); + return retval; +} + +/** + * Called when the VFD device (e.g. /dev/usb/lcd) + * is closed by the application. + */ +static int vfd_ioctl(struct inode *inode, struct file *file, + unsigned cmd, unsigned long arg) +{ + struct sasem_context *context = NULL; + + context = (struct sasem_context *) file->private_data; + + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + switch (cmd) { + case IOCTL_LCD_CONTRAST: + if (arg > 1000) + arg = 1000; + context->vfd_contrast = (unsigned int)arg; + break; + default: + printk(KERN_INFO "Unknown IOCTL command\n"); + mutex_unlock(&context->lock); + return -ENOIOCTLCMD; /* not supported */ + } + + mutex_unlock(&context->lock); + return 0; +} + +/** + * Called when the VFD device (e.g. /dev/usb/lcd) + * is closed by the application. + */ +static int vfd_close(struct inode *inode, struct file *file) +{ + struct sasem_context *context = NULL; + int retval = 0; + + context = (struct sasem_context *) file->private_data; + + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + if (!context->vfd_isopen) { + err("%s: VFD is not open", __func__); + retval = -EIO; + } else { + context->vfd_isopen = 0; + MOD_DEC_USE_COUNT; + printk(KERN_INFO "VFD port closed\n"); + if (!context->dev_present && !context->ir_isopen) { + + /* Device disconnected before close and IR port is + * not open. If IR port is open, context will be + * deleted by ir_close. */ + mutex_unlock(&context->lock); + delete_context(context); + return retval; + } + } + + mutex_unlock(&context->lock); + return retval; +} + +/** + * Sends a packet to the VFD. + */ +static int send_packet(struct sasem_context *context) +{ + unsigned int pipe; + int interval = 0; + int retval = 0; + + pipe = usb_sndintpipe(context->dev, + context->tx_endpoint->bEndpointAddress); +#ifdef KERNEL_2_5 + interval = context->tx_endpoint->bInterval; +#endif /* Use 0 for 2.4 kernels */ + + usb_fill_int_urb(context->tx_urb, context->dev, pipe, + context->usb_tx_buf, sizeof(context->usb_tx_buf), + usb_tx_callback, context, interval); + + context->tx_urb->actual_length = 0; + + init_completion(&context->tx.finished); + atomic_set(&(context->tx.busy), 1); + +#ifdef KERNEL_2_5 + retval = usb_submit_urb(context->tx_urb, GFP_KERNEL); +#else + retval = usb_submit_urb(context->tx_urb); +#endif + if (retval) { + atomic_set(&(context->tx.busy), 0); + err("%s: error submitting urb (%d)", __func__, retval); + } else { + /* Wait for transmission to complete (or abort) */ + mutex_unlock(&context->lock); + wait_for_completion(&context->tx.finished); + mutex_lock(&context->lock); + + retval = context->tx.status; + if (retval) + err("%s: packet tx failed (%d)", __func__, retval); + } + + return retval; +} + +/** + * Writes data to the VFD. The Sasem VFD is 2x16 characters + * and requires data in 9 consecutive USB interrupt packets, + * each packet carrying 8 bytes. + */ +static ssize_t vfd_write(struct file *file, const char *buf, + size_t n_bytes, loff_t *pos) +{ + int i; + int retval = 0; + struct sasem_context *context; + + context = (struct sasem_context *) file->private_data; + if (!context) { + err("%s: no context for device", __func__); + return -ENODEV; + } + + mutex_lock(&context->lock); + + if (!context->dev_present) { + err("%s: no Sasem device present", __func__); + retval = -ENODEV; + goto exit; + } + + if (n_bytes <= 0 || n_bytes > 32) { + err("%s: invalid payload size", __func__); + retval = -EINVAL; + goto exit; + } + + retval = copy_from_user(context->tx.data_buf, buf, n_bytes); + if (retval < 0) + goto exit; + + /* Pad with spaces */ + for (i = n_bytes; i < 32; ++i) + context->tx.data_buf[i] = ' '; + + /* Nine 8 byte packets to be sent */ + /* NOTE: "\x07\x01\0\0\0\0\0\0" or "\x0c\0\0\0\0\0\0\0" + * will clear the VFD */ + for (i = 0; i < 9; i++) { + switch (i) { + case 0: + memcpy(context->usb_tx_buf, "\x07\0\0\0\0\0\0\0", 8); + context->usb_tx_buf[1] = (context->vfd_contrast) ? + (0x2B - (context->vfd_contrast - 1) / 250) + : 0x2B; + break; + case 1: + memcpy(context->usb_tx_buf, "\x09\x01\0\0\0\0\0\0", 8); + break; + case 2: + memcpy(context->usb_tx_buf, "\x0b\x01\0\0\0\0\0\0", 8); + break; + case 3: + memcpy(context->usb_tx_buf, context->tx.data_buf, 8); + break; + case 4: + memcpy(context->usb_tx_buf, + context->tx.data_buf + 8, 8); + break; + case 5: + memcpy(context->usb_tx_buf, "\x09\x01\0\0\0\0\0\0", 8); + break; + case 6: + memcpy(context->usb_tx_buf, "\x0b\x02\0\0\0\0\0\0", 8); + break; + case 7: + memcpy(context->usb_tx_buf, + context->tx.data_buf + 16, 8); + break; + case 8: + memcpy(context->usb_tx_buf, + context->tx.data_buf + 24, 8); + break; + } + retval = send_packet(context); + if (retval) { + + err("%s: send packet failed for packet #%d", + __func__, i); + goto exit; + } + } +exit: + + mutex_unlock(&context->lock); + + return (!retval) ? n_bytes : retval; +} + +/** + * Callback function for USB core API: transmit data + */ +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_tx_callback(struct urb *urb, struct pt_regs *regs) +#else +static void usb_tx_callback(struct urb *urb) +#endif +{ + struct sasem_context *context; + + if (!urb) + return; + context = (struct sasem_context *) urb->context; + if (!context) + return; + + context->tx.status = urb->status; + + /* notify waiters that write has finished */ + atomic_set(&context->tx.busy, 0); + complete(&context->tx.finished); + + return; +} + +/** + * Called by lirc_dev when the application opens /dev/lirc + */ +static int ir_open(void *data) +{ + int retval = 0; + struct sasem_context *context; + + /* prevent races with disconnect */ + mutex_lock(&disconnect_lock); + + context = (struct sasem_context *) data; + + mutex_lock(&context->lock); + + if (context->ir_isopen) { + err("%s: IR port is already open", __func__); + retval = -EBUSY; + goto exit; + } + + usb_fill_int_urb(context->rx_urb, context->dev, + usb_rcvintpipe(context->dev, + context->rx_endpoint->bEndpointAddress), + context->usb_rx_buf, sizeof(context->usb_rx_buf), + usb_rx_callback, context, context->rx_endpoint->bInterval); + +#ifdef KERNEL_2_5 + retval = usb_submit_urb(context->rx_urb, GFP_KERNEL); +#else + retval = usb_submit_urb(context->rx_urb); +#endif + + if (retval) + err("%s: usb_submit_urb failed for ir_open (%d)", + __func__, retval); + else { + MOD_INC_USE_COUNT; + context->ir_isopen = 1; + printk(KERN_INFO "IR port opened\n"); + } + +exit: + mutex_unlock(&context->lock); + + mutex_unlock(&disconnect_lock); + return 0; +} + +/** + * Called by lirc_dev when the application closes /dev/lirc + */ +static void ir_close(void *data) +{ + struct sasem_context *context; + + context = (struct sasem_context *)data; + if (!context) { + err("%s: no context for device", __func__); + return; + } + + mutex_lock(&context->lock); + + usb_kill_urb(context->rx_urb); + context->ir_isopen = 0; + MOD_DEC_USE_COUNT; + printk(KERN_INFO "IR port closed\n"); + + if (!context->dev_present) { + + /* + * Device disconnected while IR port was + * still open. Driver was not deregistered + * at disconnect time, so do it now. + */ + deregister_from_lirc(context); + + if (!context->vfd_isopen) { + + mutex_unlock(&context->lock); + delete_context(context); + return; + } + /* If VFD port is open, context will be deleted by vfd_close */ + } + + mutex_unlock(&context->lock); + return; +} + +/** + * Process the incoming packet + */ +static void incoming_packet(struct sasem_context *context, + struct urb *urb) +{ + int len = urb->actual_length; + unsigned char *buf = urb->transfer_buffer; + long ms; + struct timeval tv; + + if (len != 8) { + printk(KERN_WARNING "%s: invalid incoming packet size (%d)\n", + __func__, len); + return; + } + +#ifdef DEBUG + int i; + for (i = 0; i < 8; ++i) + printk(KERN_INFO "%02x ", buf [i]); + printk(KERN_INFO "\n"); +#endif + + /* + * Lirc could deal with the repeat code, but we really need to block it + * if it arrives too late. Otherwise we could repeat the wrong code. + */ + + /* get the time since the last button press */ + do_gettimeofday(&tv); + ms = (tv.tv_sec - context->presstime.tv_sec) * 1000 + + (tv.tv_usec - context->presstime.tv_usec) / 1000; + + if (memcmp(buf, "\x08\0\0\0\0\0\0\0", 8) == 0) { + /* + * the repeat code is being sent, so we copy + * the old code to LIRC + */ + + /* + * NOTE: Only if the last code was less than 250ms ago + * - no one should be able to push another (undetected) button + * in that time and then get a false repeat of the previous + * press but it is long enough for a genuine repeat + */ + if ((ms < 250) && (context->codesaved != 0)) { + memcpy(buf, &context->lastcode, 8); + context->presstime.tv_sec = tv.tv_sec; + context->presstime.tv_usec = tv.tv_usec; + } + } else { + /* save the current valid code for repeats */ + memcpy(&context->lastcode, buf, 8); + /* + * set flag to signal a valid code was save; + * just for safety reasons + */ + context->codesaved = 1; + context->presstime.tv_sec = tv.tv_sec; + context->presstime.tv_usec = tv.tv_usec; + } + + lirc_buffer_write(context->driver->rbuf, buf); + wake_up(&context->driver->rbuf->wait_poll); +} + +/** + * Callback function for USB core API: receive data + */ +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_rx_callback(struct urb *urb, struct pt_regs *regs) +#else +static void usb_rx_callback(struct urb *urb) +#endif +{ + struct sasem_context *context; + + if (!urb) + return; + context = (struct sasem_context *) urb->context; + if (!context) + return; + + switch (urb->status) { + + case -ENOENT: /* usbcore unlink successful! */ + return; + + case 0: + if (context->ir_isopen) + incoming_packet(context, urb); + break; + + default: + printk(KERN_WARNING "%s: status (%d): ignored\n", + __func__, urb->status); + break; + } + +#ifdef KERNEL_2_5 + usb_submit_urb(context->rx_urb, GFP_ATOMIC); +#endif + return; +} + + + +/** + * Callback function for USB core API: Probe + */ +#ifdef KERNEL_2_5 +static int sasem_probe(struct usb_interface *interface, + const struct usb_device_id *id) +#else +static void *sasem_probe(struct usb_device *dev, unsigned int intf, + const struct usb_device_id *id) +#endif +{ +#ifdef KERNEL_2_5 + struct usb_device *dev = NULL; + struct usb_host_interface *iface_desc = NULL; +#else + struct usb_interface *interface = NULL; + struct usb_interface_descriptor *iface_desc = NULL; + char name [10]; + int subminor = 0; +#endif + struct usb_endpoint_descriptor *rx_endpoint = NULL; + struct usb_endpoint_descriptor *tx_endpoint = NULL; + struct urb *rx_urb = NULL; + struct urb *tx_urb = NULL; + struct lirc_driver *driver = NULL; + struct lirc_buffer *rbuf = NULL; + int lirc_minor = 0; + int num_endpoints; + int retval = 0; + int vfd_ep_found; + int ir_ep_found; + int alloc_status; + struct sasem_context *context = NULL; + int i; + + printk(KERN_INFO "%s: found Sasem device\n", __func__); + +#if !defined(KERNEL_2_5) + for (subminor = 0; subminor < MAX_DEVICES; ++subminor) { + if (minor_table [subminor] == NULL) + break; + } + if (subminor == MAX_DEVICES) { + err("%s: allowed number of devices already present", + __func__); + retval = -ENOMEM; + goto exit; + } +#endif + +#ifdef KERNEL_2_5 + dev = usb_get_dev(interface_to_usbdev(interface)); + iface_desc = interface->cur_altsetting; + num_endpoints = iface_desc->desc.bNumEndpoints; +#else + interface = &dev->actconfig->interface [intf]; + iface_desc = &interface->altsetting [interface->act_altsetting]; + num_endpoints = iface_desc->bNumEndpoints; +#endif + + /* + * Scan the endpoint list and set: + * first input endpoint = IR endpoint + * first output endpoint = VFD endpoint + */ + + ir_ep_found = 0; + vfd_ep_found = 0; + + for (i = 0; i < num_endpoints && !(ir_ep_found && vfd_ep_found); ++i) { + + struct usb_endpoint_descriptor *ep; + int ep_dir; + int ep_type; +#ifdef KERNEL_2_5 + ep = &iface_desc->endpoint [i].desc; +#else + ep = &iface_desc->endpoint [i]; +#endif + ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK; + ep_type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + + if (!ir_ep_found && + ep_dir == USB_DIR_IN && + ep_type == USB_ENDPOINT_XFER_INT) { + + rx_endpoint = ep; + ir_ep_found = 1; + if (debug) + printk(KERN_INFO "%s: found IR endpoint\n", + __func__); + + } else if (!vfd_ep_found && + ep_dir == USB_DIR_OUT && + ep_type == USB_ENDPOINT_XFER_INT) { + + tx_endpoint = ep; + vfd_ep_found = 1; + if (debug) + printk(KERN_INFO "%s: found VFD endpoint\n", + __func__); + } + } + + /* Input endpoint is mandatory */ + if (!ir_ep_found) { + + err("%s: no valid input (IR) endpoint found.", __func__); + retval = -ENODEV; + goto exit; + } + + if (!vfd_ep_found) + printk(KERN_INFO "%s: no valid output (VFD) endpoint found.\n", + __func__); + + + /* Allocate memory */ + alloc_status = 0; + + context = kzalloc(sizeof(struct sasem_context), GFP_KERNEL); + if (!context) { + err("%s: kzalloc failed for context", __func__); + alloc_status = 1; + goto alloc_status_switch; + } + driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL); + if (!driver) { + err("%s: kzalloc failed for lirc_driver", __func__); + alloc_status = 2; + goto alloc_status_switch; + } + rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL); + if (!rbuf) { + err("%s: kmalloc failed for lirc_buffer", __func__); + alloc_status = 3; + goto alloc_status_switch; + } + if (lirc_buffer_init(rbuf, BUF_CHUNK_SIZE, BUF_SIZE)) { + err("%s: lirc_buffer_init failed", __func__); + alloc_status = 4; + goto alloc_status_switch; + } +#ifdef KERNEL_2_5 + rx_urb = usb_alloc_urb(0, GFP_KERNEL); +#else + rx_urb = usb_alloc_urb(0); +#endif + if (!rx_urb) { + err("%s: usb_alloc_urb failed for IR urb", __func__); + alloc_status = 5; + goto alloc_status_switch; + } + if (vfd_ep_found) { +#ifdef KERNEL_2_5 + tx_urb = usb_alloc_urb(0, GFP_KERNEL); +#else + tx_urb = usb_alloc_urb(0); +#endif + if (!tx_urb) { + err("%s: usb_alloc_urb failed for VFD urb", __func__); + alloc_status = 6; + goto alloc_status_switch; + } + } + + mutex_init(&context->lock); + + strcpy(driver->name, MOD_NAME); + driver->minor = -1; + driver->code_length = 64; + driver->sample_rate = 0; + driver->features = LIRC_CAN_REC_LIRCCODE; + driver->data = context; + driver->rbuf = rbuf; + driver->set_use_inc = ir_open; + driver->set_use_dec = ir_close; +#ifdef LIRC_HAVE_SYSFS + driver->dev = &interface->dev; +#endif + driver->owner = THIS_MODULE; + + mutex_lock(&context->lock); + + lirc_minor = lirc_register_driver(driver); + if (lirc_minor < 0) { + err("%s: lirc_register_driver failed", __func__); + alloc_status = 7; + mutex_unlock(&context->lock); + } else + printk(KERN_INFO "%s: Registered Sasem driver (minor:%d)\n", + __func__, lirc_minor); + +alloc_status_switch: + + switch (alloc_status) { + + case 7: + if (vfd_ep_found) + usb_free_urb(tx_urb); + case 6: + usb_free_urb(rx_urb); + case 5: + lirc_buffer_free(rbuf); + case 4: + kfree(rbuf); + case 3: + kfree(driver); + case 2: + kfree(context); + context = NULL; + case 1: + retval = -ENOMEM; + goto exit; + } + + /* Needed while unregistering! */ + driver->minor = lirc_minor; + + context->dev = dev; + context->dev_present = 1; + context->rx_endpoint = rx_endpoint; + context->rx_urb = rx_urb; + if (vfd_ep_found) { + context->tx_endpoint = tx_endpoint; + context->tx_urb = tx_urb; + context->vfd_contrast = 1000; /* range 0 - 1000 */ + } + context->driver = driver; + +#ifdef KERNEL_2_5 + usb_set_intfdata(interface, context); +#else + minor_table [subminor] = context; + context->subminor = subminor; +#endif + + if (vfd_ep_found) { + +#ifdef KERNEL_2_5 + if (debug) + printk(KERN_INFO "Registering VFD with sysfs\n"); + if (usb_register_dev(interface, &sasem_class)) + /* Not a fatal error, so ignore */ + printk(KERN_INFO "%s: could not get a minor number " + "for VFD\n", __func__); +#else + if (debug) + printk(KERN_INFO "Registering VFD with devfs\n"); + sprintf(name, DEVFS_NAME, subminor); + context->devfs = devfs_register(usb_devfs_handle, name, + DEVFS_FL_DEFAULT, + USB_MAJOR, VFD_MINOR_BASE + subminor, + DEVFS_MODE, &vfd_fops, NULL); + if (!context->devfs) + /* not a fatal error so ignore */ + printk(KERN_INFO "%s: devfs register failed for VFD\n", + __func__); +#endif + } + + printk(KERN_INFO "%s: Sasem device on usb<%d:%d> initialized\n", + __func__, dev->bus->busnum, dev->devnum); + + mutex_unlock(&context->lock); +exit: +#ifdef KERNEL_2_5 + return retval; +#else + return (!retval) ? context : NULL; +#endif +} + +/** + * Callback function for USB core API: disonnect + */ +#ifdef KERNEL_2_5 +static void sasem_disconnect(struct usb_interface *interface) +#else +static void sasem_disconnect(struct usb_device *dev, void *data) +#endif +{ + struct sasem_context *context; + + /* prevent races with ir_open()/vfd_open() */ + mutex_lock(&disconnect_lock); + +#ifdef KERNEL_2_5 + context = usb_get_intfdata(interface); +#else + context = (struct sasem_context *)data; +#endif + mutex_lock(&context->lock); + + printk(KERN_INFO "%s: Sasem device disconnected\n", __func__); + +#ifdef KERNEL_2_5 + usb_set_intfdata(interface, NULL); +#else + minor_table [context->subminor] = NULL; +#endif + context->dev_present = 0; + + /* Stop reception */ + usb_kill_urb(context->rx_urb); + + /* Abort ongoing write */ + if (atomic_read(&context->tx.busy)) { + + usb_kill_urb(context->tx_urb); + wait_for_completion(&context->tx.finished); + } + + /* De-register from lirc_dev if IR port is not open */ + if (!context->ir_isopen) + deregister_from_lirc(context); + +#ifdef KERNEL_2_5 + usb_deregister_dev(interface, &sasem_class); +#else + if (context->devfs) + devfs_unregister(context->devfs); +#endif + + mutex_unlock(&context->lock); + + if (!context->ir_isopen && !context->vfd_isopen) + delete_context(context); + + mutex_unlock(&disconnect_lock); +} + +static int __init sasem_init(void) +{ + int rc; + + printk(KERN_INFO MOD_DESC ", v" MOD_VERSION "\n"); + printk(KERN_INFO MOD_AUTHOR "\n"); + + rc = usb_register(&sasem_driver); + if (rc < 0) { + err("%s: usb register failed (%d)", __func__, rc); + return -ENODEV; + } + return 0; +} + +static void __exit sasem_exit(void) +{ + usb_deregister(&sasem_driver); + printk(KERN_INFO "module removed. Goodbye!\n"); +} + + +module_init(sasem_init); +module_exit(sasem_exit); + +#if !defined(KERNEL_2_5) +EXPORT_NO_SYMBOLS; +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_sasem/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_sasem/Makefile @@ -0,0 +1,2 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. +obj-$(CONFIG_LIRC_SASEM) += lirc_sasem.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_sir/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_sir/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_SIR) += lirc_sir.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_sir/lirc_sir.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_sir/lirc_sir.c @@ -0,0 +1,1347 @@ +/* + * LIRC SIR driver, (C) 2000 Milan Pikula + * + * lirc_sir - Device driver for use with SIR (serial infra red) + * mode of IrDA on many notebooks. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * + * 2000/09/16 Frank Przybylski : + * added timeout and relaxed pulse detection, removed gap bug + * + * 2000/12/15 Christoph Bartelmus : + * added support for Tekram Irmate 210 (sending does not work yet, + * kind of disappointing that nobody was able to implement that + * before), + * major clean-up + * + * 2001/02/27 Christoph Bartelmus : + * added support for StrongARM SA1100 embedded microprocessor + * parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18) +#error "**********************************************************" +#error " Sorry, this driver needs kernel version 2.2.18 or higher " +#error "**********************************************************" +#endif +#include + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) +#include +#else +#include +#endif +#include +#include +#ifdef LIRC_ON_SA1100 +#include +#ifdef CONFIG_SA1100_COLLIE +#include +#include +#endif +#endif + +#include + +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" +#include "../kcompat.h" + +/* SECTION: Definitions */ + +/*** Tekram dongle ***/ +#ifdef LIRC_SIR_TEKRAM +/* stolen from kernel source */ +/* definitions for Tekram dongle */ +#define TEKRAM_115200 0x00 +#define TEKRAM_57600 0x01 +#define TEKRAM_38400 0x02 +#define TEKRAM_19200 0x03 +#define TEKRAM_9600 0x04 +#define TEKRAM_2400 0x08 + +#define TEKRAM_PW 0x10 /* Pulse select bit */ + +/* 10bit * 1s/115200bit in milliseconds = 87ms*/ +#define TIME_CONST (10000000ul/115200ul) + +#endif + +#ifdef LIRC_SIR_ACTISYS_ACT200L +static void init_act200(void); +#elif defined(LIRC_SIR_ACTISYS_ACT220L) +static void init_act220(void); +#endif + +/*** SA1100 ***/ +#ifdef LIRC_ON_SA1100 +struct sa1100_ser2_registers { + /* HSSP control register */ + unsigned char hscr0; + /* UART registers */ + unsigned char utcr0; + unsigned char utcr1; + unsigned char utcr2; + unsigned char utcr3; + unsigned char utcr4; + unsigned char utdr; + unsigned char utsr0; + unsigned char utsr1; +} sr; + +static int irq = IRQ_Ser2ICP; + +#define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0 + +/* pulse/space ratio of 50/50 */ +static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY); +/* 1000000/freq-pulse_width */ +static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY); +static unsigned int freq = 38000; /* modulation frequency */ +static unsigned int duty_cycle = 50; /* duty cycle of 50% */ + +#endif + +#define RBUF_LEN 1024 +#define WBUF_LEN 1024 + +#define LIRC_DRIVER_NAME "lirc_sir" + +#define PULSE '[' + +#ifndef LIRC_SIR_TEKRAM +/* 9bit * 1s/115200bit in milli seconds = 78.125ms*/ +#define TIME_CONST (9000000ul/115200ul) +#endif + + +/* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */ +#define SIR_TIMEOUT (HZ*5/100) + +#ifndef LIRC_ON_SA1100 +#ifndef LIRC_IRQ +#define LIRC_IRQ 4 +#endif +#ifndef LIRC_PORT +/* for external dongles, default to com1 */ +#if defined(LIRC_SIR_ACTISYS_ACT200L) || \ + defined(LIRC_SIR_ACTISYS_ACT220L) || \ + defined(LIRC_SIR_TEKRAM) +#define LIRC_PORT 0x3f8 +#else +/* onboard sir ports are typically com3 */ +#define LIRC_PORT 0x3e8 +#endif +#endif + +static int io = LIRC_PORT; +static int irq = LIRC_IRQ; +static int threshold = 3; +#endif + +static DEFINE_SPINLOCK(timer_lock); +static struct timer_list timerlist; +/* time of last signal change detected */ +static struct timeval last_tv = {0, 0}; +/* time of last UART data ready interrupt */ +static struct timeval last_intr_tv = {0, 0}; +static int last_value; + +static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue); + +static DEFINE_SPINLOCK(hardware_lock); +static DEFINE_SPINLOCK(dev_lock); + +static lirc_t rx_buf[RBUF_LEN]; +static unsigned int rx_tail, rx_head; +static lirc_t tx_buf[WBUF_LEN]; + +static int debug; +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +/* SECTION: Prototypes */ + +/* Communication with user-space */ +static int lirc_open(struct inode *inode, struct file *file); +static int lirc_close(struct inode *inode, struct file *file); +static unsigned int lirc_poll(struct file *file, poll_table *wait); +static ssize_t lirc_read(struct file *file, char *buf, size_t count, + loff_t *ppos); +static ssize_t lirc_write(struct file *file, const char *buf, size_t n, + loff_t *pos); +static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd, + unsigned long arg); +static void add_read_queue(int flag, unsigned long val); +#ifdef MODULE +static int init_chrdev(void); +static void drop_chrdev(void); +#endif +/* Hardware */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static irqreturn_t sir_interrupt(int irq, void *dev_id, + struct pt_regs *regs); +#else +static irqreturn_t sir_interrupt(int irq, void *dev_id); +#endif +static void send_space(unsigned long len); +static void send_pulse(unsigned long len); +static int init_hardware(void); +static void drop_hardware(void); +/* Initialisation */ +static int init_port(void); +static void drop_port(void); + +#ifdef LIRC_ON_SA1100 +static void on(void) +{ + PPSR |= PPC_TXD2; +} + +static void off(void) +{ + PPSR &= ~PPC_TXD2; +} +#else +static unsigned int sinp(int offset) +{ + return inb(io + offset); +} + +static void soutp(int offset, int value) +{ + outb(value, io + offset); +} +#endif + +#ifndef MAX_UDELAY_MS +#define MAX_UDELAY_US 5000 +#else +#define MAX_UDELAY_US (MAX_UDELAY_MS*1000) +#endif + +static void safe_udelay(unsigned long usecs) +{ + while (usecs > MAX_UDELAY_US) { + udelay(MAX_UDELAY_US); + usecs -= MAX_UDELAY_US; + } + udelay(usecs); +} + +/* SECTION: Communication with user-space */ + +static int lirc_open(struct inode *inode, struct file *file) +{ + spin_lock(&dev_lock); + if (MOD_IN_USE) { + spin_unlock(&dev_lock); + return -EBUSY; + } + MOD_INC_USE_COUNT; + spin_unlock(&dev_lock); + return 0; +} + +static int lirc_close(struct inode *inode, struct file *file) +{ + MOD_DEC_USE_COUNT; + return 0; +} + +static unsigned int lirc_poll(struct file *file, poll_table *wait) +{ + poll_wait(file, &lirc_read_queue, wait); + if (rx_head != rx_tail) + return POLLIN | POLLRDNORM; + return 0; +} + +static ssize_t lirc_read(struct file *file, char *buf, size_t count, + loff_t *ppos) +{ + int n = 0; + int retval = 0; + DECLARE_WAITQUEUE(wait, current); + + if (count % sizeof(lirc_t)) + return -EINVAL; + + add_wait_queue(&lirc_read_queue, &wait); + set_current_state(TASK_INTERRUPTIBLE); + while (n < count) { + if (rx_head != rx_tail) { + if (copy_to_user((void *) buf + n, + (void *) (rx_buf + rx_head), + sizeof(lirc_t))) { + retval = -EFAULT; + break; + } + rx_head = (rx_head + 1) & (RBUF_LEN - 1); + n += sizeof(lirc_t); + } else { + if (file->f_flags & O_NONBLOCK) { + retval = -EAGAIN; + break; + } + if (signal_pending(current)) { + retval = -ERESTARTSYS; + break; + } + schedule(); + set_current_state(TASK_INTERRUPTIBLE); + } + } + remove_wait_queue(&lirc_read_queue, &wait); + set_current_state(TASK_RUNNING); + return n ? n : retval; +} +static ssize_t lirc_write(struct file *file, const char *buf, size_t n, + loff_t *pos) +{ + unsigned long flags; + int i; + + if (n % sizeof(lirc_t) || (n / sizeof(lirc_t)) > WBUF_LEN) + return -EINVAL; + if (copy_from_user(tx_buf, buf, n)) + return -EFAULT; + i = 0; + n /= sizeof(lirc_t); +#ifdef LIRC_ON_SA1100 + /* disable receiver */ + Ser2UTCR3 = 0; +#endif + local_irq_save(flags); + while (1) { + if (i >= n) + break; + if (tx_buf[i]) + send_pulse(tx_buf[i]); + i++; + if (i >= n) + break; + if (tx_buf[i]) + send_space(tx_buf[i]); + i++; + } + local_irq_restore(flags); +#ifdef LIRC_ON_SA1100 + off(); + udelay(1000); /* wait 1ms for IR diode to recover */ + Ser2UTCR3 = 0; + /* clear status register to prevent unwanted interrupts */ + Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB); + /* enable receiver */ + Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE; +#endif + return n; +} + +static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd, + unsigned long arg) +{ + int retval = 0; + unsigned long value = 0; +#ifdef LIRC_ON_SA1100 + unsigned int ivalue; + + if (cmd == LIRC_GET_FEATURES) + value = LIRC_CAN_SEND_PULSE | + LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SET_SEND_CARRIER | + LIRC_CAN_REC_MODE2; + else if (cmd == LIRC_GET_SEND_MODE) + value = LIRC_MODE_PULSE; + else if (cmd == LIRC_GET_REC_MODE) + value = LIRC_MODE_MODE2; +#else + if (cmd == LIRC_GET_FEATURES) + value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2; + else if (cmd == LIRC_GET_SEND_MODE) + value = LIRC_MODE_PULSE; + else if (cmd == LIRC_GET_REC_MODE) + value = LIRC_MODE_MODE2; +#endif + + switch (cmd) { + case LIRC_GET_FEATURES: + case LIRC_GET_SEND_MODE: + case LIRC_GET_REC_MODE: + retval = put_user(value, (unsigned long *) arg); + break; + + case LIRC_SET_SEND_MODE: + case LIRC_SET_REC_MODE: + retval = get_user(value, (unsigned long *) arg); + break; +#ifdef LIRC_ON_SA1100 + case LIRC_SET_SEND_DUTY_CYCLE: + retval = get_user(ivalue, (unsigned int *) arg); + if (retval) + return reetval; + if (ivalue <= 0 || ivalue > 100) + return -EINVAL; + /* (ivalue/100)*(1000000/freq) */ + duty_cycle = ivalue; + pulse_width = (unsigned long) duty_cycle*10000/freq; + space_width = (unsigned long) 1000000L/freq-pulse_width; + if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY) + pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY; + if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY) + space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY; + break; + case LIRC_SET_SEND_CARRIER: + retval = get_user(ivalue, (unsigned int *) arg); + if (retval) + return retval; + if (ivalue > 500000 || ivalue < 20000) + return -EINVAL; + freq = ivalue; + pulse_width = (unsigned long) duty_cycle*10000/freq; + space_width = (unsigned long) 1000000L/freq-pulse_width; + if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY) + pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY; + if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY) + space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY; + break; +#endif + default: + retval = -ENOIOCTLCMD; + + } + + if (retval) + return retval; + if (cmd == LIRC_SET_REC_MODE) { + if (value != LIRC_MODE_MODE2) + retval = -ENOSYS; + } else if (cmd == LIRC_SET_SEND_MODE) { + if (value != LIRC_MODE_PULSE) + retval = -ENOSYS; + } + + return retval; +} + +static void add_read_queue(int flag, unsigned long val) +{ + unsigned int new_rx_tail; + lirc_t newval; + + dprintk("add flag %d with val %lu\n", flag, val); + + newval = val & PULSE_MASK; + + /* + * statistically, pulses are ~TIME_CONST/2 too long. we could + * maybe make this more exact, but this is good enough + */ + if (flag) { + /* pulse */ + if (newval > TIME_CONST/2) + newval -= TIME_CONST/2; + else /* should not ever happen */ + newval = 1; + newval |= PULSE_BIT; + } else { + newval += TIME_CONST/2; + } + new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1); + if (new_rx_tail == rx_head) { + dprintk("Buffer overrun.\n"); + return; + } + rx_buf[rx_tail] = newval; + rx_tail = new_rx_tail; + wake_up_interruptible(&lirc_read_queue); +} + +static struct file_operations lirc_fops = { + .owner = THIS_MODULE, + .read = lirc_read, + .write = lirc_write, + .poll = lirc_poll, + .ioctl = lirc_ioctl, + .open = lirc_open, + .release = lirc_close, +}; + +static int set_use_inc(void *data) +{ + return 0; +} + +static void set_use_dec(void *data) +{ +} + +static struct lirc_driver driver = { + .name = LIRC_DRIVER_NAME, + .minor = -1, + .code_length = 1, + .sample_rate = 0, + .data = NULL, + .add_to_buf = NULL, +#ifndef LIRC_REMOVE_DURING_EXPORT + .get_queue = NULL, +#endif + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .fops = &lirc_fops, + .dev = NULL, + .owner = THIS_MODULE, +}; + + +#ifdef MODULE +static int init_chrdev(void) +{ + driver.minor = lirc_register_driver(&driver); + if (driver.minor < 0) { + printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n"); + return -EIO; + } + return 0; +} + +static void drop_chrdev(void) +{ + lirc_unregister_driver(driver.minor); +} +#endif + +/* SECTION: Hardware */ +static long delta(struct timeval *tv1, struct timeval *tv2) +{ + unsigned long deltv; + + deltv = tv2->tv_sec - tv1->tv_sec; + if (deltv > 15) + deltv = 0xFFFFFF; + else + deltv = deltv*1000000 + + tv2->tv_usec - + tv1->tv_usec; + return deltv; +} + +static void sir_timeout(unsigned long data) +{ + /* + * if last received signal was a pulse, but receiving stopped + * within the 9 bit frame, we need to finish this pulse and + * simulate a signal change to from pulse to space. Otherwise + * upper layers will receive two sequences next time. + */ + + unsigned long flags; + unsigned long pulse_end; + + /* avoid interference with interrupt */ + spin_lock_irqsave(&timer_lock, flags); + if (last_value) { +#ifndef LIRC_ON_SA1100 + /* clear unread bits in UART and restart */ + outb(UART_FCR_CLEAR_RCVR, io + UART_FCR); +#endif + /* determine 'virtual' pulse end: */ + pulse_end = delta(&last_tv, &last_intr_tv); + dprintk("timeout add %d for %lu usec\n", last_value, pulse_end); + add_read_queue(last_value, pulse_end); + last_value = 0; + last_tv = last_intr_tv; + } + spin_unlock_irqrestore(&timer_lock, flags); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static irqreturn_t sir_interrupt(int irq, void *dev_id, + struct pt_regs *regs) +#else +static irqreturn_t sir_interrupt(int irq, void *dev_id) +#endif +{ + unsigned char data; + struct timeval curr_tv; + static unsigned long deltv; +#ifdef LIRC_ON_SA1100 + int status; + static int n; + + status = Ser2UTSR0; + /* + * Deal with any receive errors first. The bytes in error may be + * the only bytes in the receive FIFO, so we do this first. + */ + while (status & UTSR0_EIF) { + int bstat; + + if (debug) { + dprintk("EIF\n"); + bstat = Ser2UTSR1; + + if (bstat & UTSR1_FRE) + dprintk("frame error\n"); + if (bstat & UTSR1_ROR) + dprintk("receive fifo overrun\n"); + if (bstat & UTSR1_PRE) + dprintk("parity error\n"); + } + + bstat = Ser2UTDR; + n++; + status = Ser2UTSR0; + } + + if (status & (UTSR0_RFS | UTSR0_RID)) { + do_gettimeofday(&curr_tv); + deltv = delta(&last_tv, &curr_tv); + do { + data = Ser2UTDR; + dprintk("%d data: %u\n", n, (unsigned int) data); + n++; + } while (status & UTSR0_RID && /* do not empty fifo in order to + * get UTSR0_RID in any case */ + Ser2UTSR1 & UTSR1_RNE); /* data ready */ + + if (status&UTSR0_RID) { + add_read_queue(0 , deltv - n * TIME_CONST); /*space*/ + add_read_queue(1, n * TIME_CONST); /*pulse*/ + n = 0; + last_tv = curr_tv; + } + } + + if (status & UTSR0_TFS) + printk(KERN_ERR "transmit fifo not full, shouldn't happen\n"); + + /* We must clear certain bits. */ + status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB); + if (status) + Ser2UTSR0 = status; +#else + unsigned long deltintrtv; + unsigned long flags; + int iir, lsr; + + while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) { + switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */ + case UART_IIR_MSI: + (void) inb(io + UART_MSR); + break; + case UART_IIR_RLSI: + (void) inb(io + UART_LSR); + break; + case UART_IIR_THRI: +#if 0 + if (lsr & UART_LSR_THRE) /* FIFO is empty */ + outb(data, io + UART_TX) +#endif + break; + case UART_IIR_RDI: + /* avoid interference with timer */ + spin_lock_irqsave(&timer_lock, flags); + do { + del_timer(&timerlist); + data = inb(io + UART_RX); + do_gettimeofday(&curr_tv); + deltv = delta(&last_tv, &curr_tv); + deltintrtv = delta(&last_intr_tv, &curr_tv); + dprintk("t %lu, d %d\n", deltintrtv, (int)data); + /* + * if nothing came in last X cycles, + * it was gap + */ + if (deltintrtv > TIME_CONST * threshold) { + if (last_value) { + dprintk("GAP\n"); + /* simulate signal change */ + add_read_queue(last_value, + deltv - + deltintrtv); + last_value = 0; + last_tv.tv_sec = + last_intr_tv.tv_sec; + last_tv.tv_usec = + last_intr_tv.tv_usec; + deltv = deltintrtv; + } + } + data = 1; + if (data ^ last_value) { + /* + * deltintrtv > 2*TIME_CONST, remember? + * the other case is timeout + */ + add_read_queue(last_value, + deltv-TIME_CONST); + last_value = data; + last_tv = curr_tv; + if (last_tv.tv_usec >= TIME_CONST) { + last_tv.tv_usec -= TIME_CONST; + } else { + last_tv.tv_sec--; + last_tv.tv_usec += 1000000 - + TIME_CONST; + } + } + last_intr_tv = curr_tv; + if (data) { + /* + * start timer for end of + * sequence detection + */ + timerlist.expires = jiffies + + SIR_TIMEOUT; + add_timer(&timerlist); + } + + lsr = inb(io + UART_LSR); + } while (lsr & UART_LSR_DR); /* data ready */ + spin_unlock_irqrestore(&timer_lock, flags); + break; + default: + break; + } + } +#endif + return IRQ_RETVAL(IRQ_HANDLED); +} + +#ifdef LIRC_ON_SA1100 +static void send_pulse(unsigned long length) +{ + unsigned long k, delay; + int flag; + + if (length == 0) + return; + /* + * this won't give us the carrier frequency we really want + * due to integer arithmetic, but we can accept this inaccuracy + */ + + for (k = flag = 0; k < length; k += delay, flag = !flag) { + if (flag) { + off(); + delay = space_width; + } else { + on(); + delay = pulse_width; + } + safe_udelay(delay); + } + off(); +} + +static void send_space(unsigned long length) +{ + if (length == 0) + return; + off(); + safe_udelay(length); +} +#else +static void send_space(unsigned long len) +{ + safe_udelay(len); +} + +static void send_pulse(unsigned long len) +{ + long bytes_out = len / TIME_CONST; + long time_left; + + time_left = (long)len - (long)bytes_out * (long)TIME_CONST; + if (bytes_out == 0) { + bytes_out++; + time_left = 0; + } + while (bytes_out--) { + outb(PULSE, io + UART_TX); + /* FIXME treba seriozne cakanie z drivers/char/serial.c */ + while (!(inb(io + UART_LSR) & UART_LSR_THRE)) + ; + } +#if 0 + if (time_left > 0) + safe_udelay(time_left); +#endif +} +#endif + +#ifdef CONFIG_SA1100_COLLIE +static int sa1100_irda_set_power_collie(int state) +{ + if (state) { + /* + * 0 - off + * 1 - short range, lowest power + * 2 - medium range, medium power + * 3 - maximum range, high power + */ + ucb1200_set_io_direction(TC35143_GPIO_IR_ON, + TC35143_IODIR_OUTPUT); + ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW); + udelay(100); + } else { + /* OFF */ + ucb1200_set_io_direction(TC35143_GPIO_IR_ON, + TC35143_IODIR_OUTPUT); + ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH); + } + return 0; +} +#endif + +static int init_hardware(void) +{ + unsigned long flags; + + spin_lock_irqsave(&hardware_lock, flags); + /* reset UART */ +#ifdef LIRC_ON_SA1100 +#ifdef CONFIG_SA1100_BITSY + if (machine_is_bitsy()) { + printk(KERN_INFO "Power on IR module\n"); + set_bitsy_egpio(EGPIO_BITSY_IR_ON); + } +#endif +#ifdef CONFIG_SA1100_COLLIE + sa1100_irda_set_power_collie(3); /* power on */ +#endif + sr.hscr0 = Ser2HSCR0; + + sr.utcr0 = Ser2UTCR0; + sr.utcr1 = Ser2UTCR1; + sr.utcr2 = Ser2UTCR2; + sr.utcr3 = Ser2UTCR3; + sr.utcr4 = Ser2UTCR4; + + sr.utdr = Ser2UTDR; + sr.utsr0 = Ser2UTSR0; + sr.utsr1 = Ser2UTSR1; + + /* configure GPIO */ + /* output */ + PPDR |= PPC_TXD2; + PSDR |= PPC_TXD2; + /* set output to 0 */ + off(); + + /* Enable HP-SIR modulation, and ensure that the port is disabled. */ + Ser2UTCR3 = 0; + Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP); + + /* clear status register to prevent unwanted interrupts */ + Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB); + + /* 7N1 */ + Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData; + /* 115200 */ + Ser2UTCR1 = 0; + Ser2UTCR2 = 1; + /* use HPSIR, 1.6 usec pulses */ + Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us; + + /* enable receiver, receive fifo interrupt */ + Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE; + + /* clear status register to prevent unwanted interrupts */ + Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB); + +#elif defined(LIRC_SIR_TEKRAM) + /* disable FIFO */ + soutp(UART_FCR, + UART_FCR_CLEAR_RCVR| + UART_FCR_CLEAR_XMIT| + UART_FCR_TRIGGER_1); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* First of all, disable all interrupts */ + soutp(UART_IER, sinp(UART_IER) & + (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); + + /* Set DLAB 1. */ + soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); + + /* Set divisor to 12 => 9600 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 12); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* power supply */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + safe_udelay(50*1000); + + /* -DTR low -> reset PIC */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); + udelay(1*1000); + + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + udelay(100); + + + /* -RTS low -> send control byte */ + soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2); + udelay(7); + soutp(UART_TX, TEKRAM_115200|TEKRAM_PW); + + /* one byte takes ~1042 usec to transmit at 9600,8N1 */ + udelay(1500); + + /* back to normal operation */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + udelay(50); + + udelay(1500); + + /* read previous control byte */ + printk(KERN_INFO LIRC_DRIVER_NAME + ": 0x%02x\n", sinp(UART_RX)); + + /* Set DLAB 1. */ + soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); + + /* Set divisor to 1 => 115200 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 1); + + /* Set DLAB 0, 8 Bit */ + soutp(UART_LCR, UART_LCR_WLEN8); + /* enable interrupts */ + soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI); +#else + outb(0, io + UART_MCR); + outb(0, io + UART_IER); + /* init UART */ + /* set DLAB, speed = 115200 */ + outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR); + outb(1, io + UART_DLL); outb(0, io + UART_DLM); + /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */ + outb(UART_LCR_WLEN7, io + UART_LCR); + /* FIFO operation */ + outb(UART_FCR_ENABLE_FIFO, io + UART_FCR); + /* interrupts */ + /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */ + outb(UART_IER_RDI, io + UART_IER); + /* turn on UART */ + outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR); +#ifdef LIRC_SIR_ACTISYS_ACT200L + init_act200(); +#elif defined(LIRC_SIR_ACTISYS_ACT220L) + init_act220(); +#endif +#endif + spin_unlock_irqrestore(&hardware_lock, flags); + return 0; +} + +static void drop_hardware(void) +{ + unsigned long flags; + + spin_lock_irqsave(&hardware_lock, flags); + +#ifdef LIRC_ON_SA1100 + Ser2UTCR3 = 0; + + Ser2UTCR0 = sr.utcr0; + Ser2UTCR1 = sr.utcr1; + Ser2UTCR2 = sr.utcr2; + Ser2UTCR4 = sr.utcr4; + Ser2UTCR3 = sr.utcr3; + + Ser2HSCR0 = sr.hscr0; +#ifdef CONFIG_SA1100_BITSY + if (machine_is_bitsy()) + clr_bitsy_egpio(EGPIO_BITSY_IR_ON); +#endif +#ifdef CONFIG_SA1100_COLLIE + sa1100_irda_set_power_collie(0); /* power off */ +#endif +#else + /* turn off interrupts */ + outb(0, io + UART_IER); +#endif + spin_unlock_irqrestore(&hardware_lock, flags); +} + +/* SECTION: Initialisation */ + +static int init_port(void) +{ + int retval; + + /* get I/O port access and IRQ line */ +#ifndef LIRC_ON_SA1100 + if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) { + printk(KERN_ERR LIRC_DRIVER_NAME + ": i/o port 0x%.4x already in use.\n", io); + return -EBUSY; + } +#endif + retval = request_irq(irq, sir_interrupt, IRQF_DISABLED, + LIRC_DRIVER_NAME, NULL); + if (retval < 0) { +# ifndef LIRC_ON_SA1100 + release_region(io, 8); +# endif + printk(KERN_ERR LIRC_DRIVER_NAME + ": IRQ %d already in use.\n", + irq); + return retval; + } +#ifndef LIRC_ON_SA1100 + printk(KERN_INFO LIRC_DRIVER_NAME + ": I/O port 0x%.4x, IRQ %d.\n", + io, irq); +#endif + + init_timer(&timerlist); + timerlist.function = sir_timeout; + timerlist.data = 0xabadcafe; + + return 0; +} + +static void drop_port(void) +{ + free_irq(irq, NULL); + del_timer_sync(&timerlist); +#ifndef LIRC_ON_SA1100 + release_region(io, 8); +#endif +} + +#ifdef LIRC_SIR_ACTISYS_ACT200L +/* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */ +/* some code borrowed from Linux IRDA driver */ + +/* Register 0: Control register #1 */ +#define ACT200L_REG0 0x00 +#define ACT200L_TXEN 0x01 /* Enable transmitter */ +#define ACT200L_RXEN 0x02 /* Enable receiver */ +#define ACT200L_ECHO 0x08 /* Echo control chars */ + +/* Register 1: Control register #2 */ +#define ACT200L_REG1 0x10 +#define ACT200L_LODB 0x01 /* Load new baud rate count value */ +#define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */ + +/* Register 3: Transmit mode register #2 */ +#define ACT200L_REG3 0x30 +#define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */ +#define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */ +#define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */ + +/* Register 4: Output Power register */ +#define ACT200L_REG4 0x40 +#define ACT200L_OP0 0x01 /* Enable LED1C output */ +#define ACT200L_OP1 0x02 /* Enable LED2C output */ +#define ACT200L_BLKR 0x04 + +/* Register 5: Receive Mode register */ +#define ACT200L_REG5 0x50 +#define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */ + /*.. other various IRDA bit modes, and TV remote modes..*/ + +/* Register 6: Receive Sensitivity register #1 */ +#define ACT200L_REG6 0x60 +#define ACT200L_RS0 0x01 /* receive threshold bit 0 */ +#define ACT200L_RS1 0x02 /* receive threshold bit 1 */ + +/* Register 7: Receive Sensitivity register #2 */ +#define ACT200L_REG7 0x70 +#define ACT200L_ENPOS 0x04 /* Ignore the falling edge */ + +/* Register 8,9: Baud Rate Divider register #1,#2 */ +#define ACT200L_REG8 0x80 +#define ACT200L_REG9 0x90 + +#define ACT200L_2400 0x5f +#define ACT200L_9600 0x17 +#define ACT200L_19200 0x0b +#define ACT200L_38400 0x05 +#define ACT200L_57600 0x03 +#define ACT200L_115200 0x01 + +/* Register 13: Control register #3 */ +#define ACT200L_REG13 0xd0 +#define ACT200L_SHDW 0x01 /* Enable access to shadow registers */ + +/* Register 15: Status register */ +#define ACT200L_REG15 0xf0 + +/* Register 21: Control register #4 */ +#define ACT200L_REG21 0x50 +#define ACT200L_EXCK 0x02 /* Disable clock output driver */ +#define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */ + +static void init_act200(void) +{ + int i; + __u8 control[] = { + ACT200L_REG15, + ACT200L_REG13 | ACT200L_SHDW, + ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL, + ACT200L_REG13, + ACT200L_REG7 | ACT200L_ENPOS, + ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1, + ACT200L_REG5 | ACT200L_RWIDL, + ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR, + ACT200L_REG3 | ACT200L_B0, + ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN, + ACT200L_REG8 | (ACT200L_115200 & 0x0f), + ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f), + ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE + }; + + /* Set DLAB 1. */ + soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8); + + /* Set divisor to 12 => 9600 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 12); + + /* Set DLAB 0. */ + soutp(UART_LCR, UART_LCR_WLEN8); + /* Set divisor to 12 => 9600 Baud */ + + /* power supply */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + for (i = 0; i < 50; i++) + safe_udelay(1000); + + /* Reset the dongle : set RTS low for 25 ms */ + soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2); + for (i = 0; i < 25; i++) + udelay(1000); + + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + udelay(100); + + /* Clear DTR and set RTS to enter command mode */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); + udelay(7); + + /* send out the control register settings for 115K 7N1 SIR operation */ + for (i = 0; i < sizeof(control); i++) { + soutp(UART_TX, control[i]); + /* one byte takes ~1042 usec to transmit at 9600,8N1 */ + udelay(1500); + } + + /* back to normal operation */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + udelay(50); + + udelay(1500); + soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); + + /* Set DLAB 1. */ + soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7); + + /* Set divisor to 1 => 115200 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 1); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* Set DLAB 0, 7 Bit */ + soutp(UART_LCR, UART_LCR_WLEN7); + + /* enable interrupts */ + soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI); +} +#endif + +#ifdef LIRC_SIR_ACTISYS_ACT220L +/* + * Derived from linux IrDA driver (net/irda/actisys.c) + * Drop me a mail for any kind of comment: maxx@spaceboyz.net + */ + +void init_act220(void) +{ + int i; + + /* DLAB 1 */ + soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7); + + /* 9600 baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 12); + + /* DLAB 0 */ + soutp(UART_LCR, UART_LCR_WLEN7); + + /* reset the dongle, set DTR low for 10us */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); + udelay(10); + + /* back to normal (still 9600) */ + soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2); + + /* + * send RTS pulses until we reach 115200 + * i hope this is really the same for act220l/act220l+ + */ + for (i = 0; i < 3; i++) { + udelay(10); + /* set RTS low for 10 us */ + soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2); + udelay(10); + /* set RTS high for 10 us */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2); + } + + /* back to normal operation */ + udelay(1500); /* better safe than sorry ;) */ + + /* Set DLAB 1. */ + soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7); + + /* Set divisor to 1 => 115200 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 1); + + /* Set DLAB 0, 7 Bit */ + /* The dongle doesn't seem to have any problems with operation at 7N1 */ + soutp(UART_LCR, UART_LCR_WLEN7); + + /* enable interrupts */ + soutp(UART_IER, UART_IER_RDI); +} +#endif + +static int init_lirc_sir(void) +{ + int retval; + + init_waitqueue_head(&lirc_read_queue); + retval = init_port(); + if (retval < 0) + return retval; + init_hardware(); + printk(KERN_INFO LIRC_DRIVER_NAME + ": Installed.\n"); + return 0; +} + +#ifdef MODULE + +static int __init lirc_sir_init(void) +{ + int retval; + + retval = init_chrdev(); + if (retval < 0) + return retval; + retval = init_lirc_sir(); + if (retval) { + drop_chrdev(); + return retval; + } + return 0; +} + +static void __exit lirc_sir_exit(void) +{ + drop_hardware(); + drop_chrdev(); + drop_port(); + printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n"); +} + +module_init(lirc_sir_init); +module_exit(lirc_sir_exit); + +#ifdef LIRC_SIR_TEKRAM +MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210"); +MODULE_AUTHOR("Christoph Bartelmus"); +#elif defined(LIRC_ON_SA1100) +MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor"); +MODULE_AUTHOR("Christoph Bartelmus"); +#elif defined(LIRC_SIR_ACTISYS_ACT200L) +MODULE_DESCRIPTION("LIRC driver for Actisys Act200L"); +MODULE_AUTHOR("Karl Bongers"); +#elif defined(LIRC_SIR_ACTISYS_ACT220L) +MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)"); +MODULE_AUTHOR("Jan Roemisch"); +#else +MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports"); +MODULE_AUTHOR("Milan Pikula"); +#endif +MODULE_LICENSE("GPL"); + +#ifdef LIRC_ON_SA1100 +module_param(irq, int, S_IRUGO); +MODULE_PARM_DESC(irq, "Interrupt (16)"); +#else +module_param(io, int, S_IRUGO); +MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); + +module_param(irq, int, S_IRUGO); +MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); + +module_param(threshold, int, S_IRUGO); +MODULE_PARM_DESC(threshold, "space detection threshold (3)"); +#endif + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +EXPORT_NO_SYMBOLS; + +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ene0100/lirc_ene0100.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ene0100/lirc_ene0100.h @@ -0,0 +1,170 @@ +/* + * driver for ENE KB3926 B/C/D CIR (also known as ENE0100) + * + * Copyright (C) 2009 Maxim Levitsky + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ + +#include "../kcompat.h" +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" + +/* hardware address */ +#define ENE_STATUS 0 /* hardware status - unused */ +#define ENE_ADDR_HI 1 /* hi byte of register address */ +#define ENE_ADDR_LO 2 /* low byte of register address */ +#define ENE_IO 3 /* read/write window */ +#define ENE_MAX_IO 4 + +/* 8 bytes of samples, divided in 2 halfs*/ +#define ENE_SAMPLE_BUFFER 0xF8F0 /* regular sample buffer */ +#define ENE_SAMPLE_SPC_MASK (1 << 7) /* sample is space */ +#define ENE_SAMPLE_VALUE_MASK 0x7F +#define ENE_SAMPLE_OVERFLOW 0x7F +#define ENE_SAMPLES_SIZE 4 + +/* fan input sample buffer */ +#define ENE_SAMPLE_BUFFER_FAN 0xF8FB /* this buffer holds high byte of */ + /* each sample of normal buffer */ + +#define ENE_FAN_SMPL_PULS_MSK 0x8000 /* this bit of combined sample */ + /* if set, says that sample is pulse */ +#define ENE_FAN_VALUE_MASK 0x0FFF /* mask for valid bits of the value */ + +/* first firmware register */ +#define ENE_FW1 0xF8F8 +#define ENE_FW1_ENABLE (1 << 0) /* enable fw processing */ +#define ENE_FW1_TXIRQ (1 << 1) /* TX interrupt pending */ +#define ENE_FW1_WAKE (1 << 6) /* enable wake from S3 */ +#define ENE_FW1_IRQ (1 << 7) /* enable interrupt */ + +/* second firmware register */ +#define ENE_FW2 0xF8F9 +#define ENE_FW2_BUF_HIGH (1 << 0) /* which half of the buffer to read */ +#define ENE_FW2_IRQ_CLR (1 << 2) /* clear this on IRQ */ +#define ENE_FW2_GP40_AS_LEARN (1 << 4) /* normal input is used as */ + /* learning input */ +#define ENE_FW2_FAN_AS_NRML_IN (1 << 6) /* fan is used as normal input */ +#define ENE_FW2_LEARNING (1 << 7) /* hardware supports learning and TX */ + +/* fan as input settings - only if learning capable */ +#define ENE_FAN_AS_IN1 0xFE30 /* fan init reg 1 */ +#define ENE_FAN_AS_IN1_EN 0xCD +#define ENE_FAN_AS_IN2 0xFE31 /* fan init reg 2 */ +#define ENE_FAN_AS_IN2_EN 0x03 +#define ENE_SAMPLE_PERIOD_FAN 61 /* fan input has fixed sample period */ + +/* IRQ registers block (for revision B) */ +#define ENEB_IRQ 0xFD09 /* IRQ number */ +#define ENEB_IRQ_UNK1 0xFD17 /* unknown setting = 1 */ +#define ENEB_IRQ_STATUS 0xFD80 /* irq status */ +#define ENEB_IRQ_STATUS_IR (1 << 5) /* IR irq */ + +/* IRQ registers block (for revision C,D) */ +#define ENEC_IRQ 0xFE9B /* new irq settings register */ +#define ENEC_IRQ_MASK 0x0F /* irq number mask */ +#define ENEC_IRQ_UNK_EN (1 << 4) /* always enabled */ +#define ENEC_IRQ_STATUS (1 << 5) /* irq status and ACK */ + +/* CIR block settings */ +#define ENE_CIR_CONF1 0xFEC0 +#define ENE_CIR_CONF1_ADC_ON 0x7 /* reciever on gpio40 enabled */ +#define ENE_CIR_CONF1_LEARN1 (1 << 3) /* enabled on learning mode */ +#define ENE_CIR_CONF1_TX_ON 0x30 /* enabled on transmit */ +#define ENE_CIR_CONF1_TX_CARR (1 << 7) /* send TX carrier or not */ + +#define ENE_CIR_CONF2 0xFEC1 /* unknown setting = 0 */ +#define ENE_CIR_CONF2_LEARN2 (1 << 4) /* set on enable learning */ +#define ENE_CIR_CONF2_GPIO40DIS (1 << 5) /* disable normal input via gpio40 */ + +#define ENE_CIR_SAMPLE_PERIOD 0xFEC8 /* sample period in us */ +#define ENE_CIR_SAMPLE_OVERFLOW (1 << 7) /* interrupt on overflows if set */ + + +/* transmitter - not implemented yet */ +/* KB3926C and higher */ +/* transmission is very similiar to recieving, a byte is written to */ +/* ENE_TX_INPUT, in same manner as it is read from sample buffer */ +/* sample period is fixed*/ + + +/* transmitter ports */ +#define ENE_TX_PORT1 0xFC01 /* this enables one or both */ +#define ENE_TX_PORT1_EN (1 << 5) /* TX ports */ +#define ENE_TX_PORT2 0xFC08 +#define ENE_TX_PORT2_EN (1 << 1) + +#define ENE_TX_INPUT 0xFEC9 /* next byte to transmit */ +#define ENE_TX_SPC_MASK (1 << 7) /* Transmitted sample is space */ +#define ENE_TX_UNK1 0xFECB /* set to 0x63 */ +#define ENE_TX_SMPL_PERIOD 50 /* transmit sample period */ + + +#define ENE_TX_CARRIER 0xFECE /* TX carrier * 2 (khz) */ +#define ENE_TX_CARRIER_UNKBIT 0x80 /* This bit set on transmit */ +#define ENE_TX_CARRIER_LOW 0xFECF /* TX carrier / 2 */ + +/* Hardware versions */ +#define ENE_HW_VERSION 0xFF00 /* hardware revision */ +#define ENE_HW_UNK 0xFF1D +#define ENE_HW_UNK_CLR (1 << 2) +#define ENE_HW_VER_MAJOR 0xFF1E /* chip version */ +#define ENE_HW_VER_MINOR 0xFF1F +#define ENE_HW_VER_OLD 0xFD00 + +#define same_sign(a, b) ((((a) > 0) && (b) > 0) || ((a) < 0 && (b) < 0)) + +#define ENE_DRIVER_NAME "enecir" +#define ENE_MAXGAP 250000 /* this is amount of time we wait + before turning the sampler, chosen + arbitry */ + +#define space(len) (-(len)) /* add a space */ + +/* software defines */ +#define ENE_IRQ_RX 1 +#define ENE_IRQ_TX 2 + +#define ENE_HW_B 1 /* 3926B */ +#define ENE_HW_C 2 /* 3926C */ +#define ENE_HW_D 3 /* 3926D */ + +#define ene_printk(level, text, ...) \ + printk(level ENE_DRIVER_NAME ": " text, ## __VA_ARGS__) + +struct ene_device { + struct pnp_dev *pnp_dev; + struct lirc_driver *lirc_driver; + + /* hw settings */ + unsigned long hw_io; + int irq; + + int hw_revision; /* hardware revision */ + int hw_learning_and_tx_capable; /* learning capable */ + int hw_gpio40_learning; /* gpio40 is learning */ + int hw_fan_as_normal_input; /* fan input is used as regular input */ + + /* device data */ + int idle; + int fan_input_inuse; + + int sample; + int in_use; + + struct timeval gap_start; +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ene0100/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ene0100/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_ENE0100) += lirc_ene0100.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ene0100/lirc_ene0100.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ene0100/lirc_ene0100.c @@ -0,0 +1,653 @@ +/* + * driver for ENE KB3926 B/C/D CIR (also known as ENE0100) + * + * Copyright (C) 2009 Maxim Levitsky + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ + +#include +#include +#include +#include +#include +#include "lirc_ene0100.h" + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) +#error "Sorry, this driver needs kernel version 2.6.16 or higher" +#else + +static int sample_period = 75; +static int enable_idle = 1; +static int enable_learning; + +static void ene_set_idle(struct ene_device *dev, int idle); +static void ene_set_inputs(struct ene_device *dev, int enable); + +/* read a hardware register */ +static u8 ene_hw_read_reg(struct ene_device *dev, u16 reg) +{ + outb(reg >> 8, dev->hw_io + ENE_ADDR_HI); + outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO); + return inb(dev->hw_io + ENE_IO); +} + +/* write a hardware register */ +static void ene_hw_write_reg(struct ene_device *dev, u16 reg, u8 value) +{ + outb(reg >> 8, dev->hw_io + ENE_ADDR_HI); + outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO); + outb(value, dev->hw_io + ENE_IO); +} + +/* change specific bits in hardware register */ +static void ene_hw_write_reg_mask(struct ene_device *dev, + u16 reg, u8 value, u8 mask) +{ + u8 regvalue; + + outb(reg >> 8, dev->hw_io + ENE_ADDR_HI); + outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO); + + regvalue = inb(dev->hw_io + ENE_IO) & ~mask; + regvalue |= (value & mask); + outb(regvalue, dev->hw_io + ENE_IO); +} + +/* read irq status and ack it */ +static int ene_hw_irq_status(struct ene_device *dev, int *buffer_pointer) +{ + u8 irq_status; + u8 fw_flags1, fw_flags2; + + fw_flags2 = ene_hw_read_reg(dev, ENE_FW2); + + if (buffer_pointer) + *buffer_pointer = 4 * (fw_flags2 & ENE_FW2_BUF_HIGH); + + if (dev->hw_revision < ENE_HW_C) { + irq_status = ene_hw_read_reg(dev, ENEB_IRQ_STATUS); + + if (!irq_status & ENEB_IRQ_STATUS_IR) + return 0; + ene_hw_write_reg(dev, ENEB_IRQ_STATUS, + irq_status & ~ENEB_IRQ_STATUS_IR); + + /* rev B support only recieving */ + return ENE_IRQ_RX; + } + + irq_status = ene_hw_read_reg(dev, ENEC_IRQ); + + if (!irq_status && ENEC_IRQ_STATUS) + return 0; + + /* original driver does that twice - a workaround ? */ + ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS); + ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS); + + /* clear unknown flag in F8F9 */ + if (fw_flags2 & ENE_FW2_IRQ_CLR) + ene_hw_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_IRQ_CLR); + + /* check if this is a TX interrupt */ + fw_flags1 = ene_hw_read_reg(dev, ENE_FW1); + + if (fw_flags1 & ENE_FW1_TXIRQ) { + ene_hw_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ); + return ENE_IRQ_TX; + } else + return ENE_IRQ_RX; +} + +static int ene_hw_detect(struct ene_device *dev) +{ + u8 chip_major, chip_minor; + u8 hw_revision, old_ver; + u8 tmp; + u8 fw_capabilities; + + tmp = ene_hw_read_reg(dev, ENE_HW_UNK); + ene_hw_write_reg(dev, ENE_HW_UNK, tmp & ~ENE_HW_UNK_CLR); + + chip_major = ene_hw_read_reg(dev, ENE_HW_VER_MAJOR); + chip_minor = ene_hw_read_reg(dev, ENE_HW_VER_MINOR); + + ene_hw_write_reg(dev, ENE_HW_UNK, tmp); + hw_revision = ene_hw_read_reg(dev, ENE_HW_VERSION); + old_ver = ene_hw_read_reg(dev, ENE_HW_VER_OLD); + + if (hw_revision == 0xFF) { + + ene_printk(KERN_WARNING, "device seems to be disabled\n"); + ene_printk(KERN_WARNING, + "send a mail to lirc-list@lists.sourceforge.net\n"); + ene_printk(KERN_WARNING, "please attach output of acpidump\n"); + + return -ENODEV; + } + + if (chip_major == 0x33) { + ene_printk(KERN_WARNING, "chips 0x33xx aren't supported yet\n"); + return -ENODEV; + } + + if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) { + dev->hw_revision = ENE_HW_C; + ene_printk(KERN_WARNING, + "KB3926C detected, driver support is not complete!\n"); + + } else if (old_ver == 0x24 && hw_revision == 0xC0) { + dev->hw_revision = ENE_HW_B; + ene_printk(KERN_NOTICE, "KB3926B detected\n"); + } else { + dev->hw_revision = ENE_HW_D; + ene_printk(KERN_WARNING, + "unknown ENE chip detected, assuming KB3926D\n"); + ene_printk(KERN_WARNING, "driver support incomplete"); + + } + + ene_printk(KERN_DEBUG, "chip is 0x%02x%02x - 0x%02x, 0x%02x\n", + chip_major, chip_minor, old_ver, hw_revision); + + + /* detect features hardware supports */ + + if (dev->hw_revision < ENE_HW_C) + return 0; + + fw_capabilities = ene_hw_read_reg(dev, ENE_FW2); + + dev->hw_gpio40_learning = fw_capabilities & ENE_FW2_GP40_AS_LEARN; + dev->hw_learning_and_tx_capable = fw_capabilities & ENE_FW2_LEARNING; + + dev->hw_fan_as_normal_input = dev->hw_learning_and_tx_capable && + fw_capabilities & ENE_FW2_FAN_AS_NRML_IN; + + ene_printk(KERN_NOTICE, "hardware features:\n"); + ene_printk(KERN_NOTICE, + "learning and tx %s, gpio40_learn %s, fan_in %s\n", + dev->hw_learning_and_tx_capable ? "on" : "off", + dev->hw_gpio40_learning ? "on" : "off", + dev->hw_fan_as_normal_input ? "on" : "off"); + + if (!dev->hw_learning_and_tx_capable && enable_learning) + enable_learning = 0; + + if (dev->hw_learning_and_tx_capable) { + ene_printk(KERN_WARNING, + "Device supports transmitting, but the driver doesn't\n"); + ene_printk(KERN_WARNING, + "due to lack of hardware to test against.\n"); + ene_printk(KERN_WARNING, + "Send a mail to: lirc-list@lists.sourceforge.net\n"); + } + return 0; +} + +/* hardware initialization */ +static int ene_hw_init(void *data) +{ + u8 reg_value; + struct ene_device *dev = (struct ene_device *)data; + dev->in_use = 1; + + if (dev->hw_revision < ENE_HW_C) { + ene_hw_write_reg(dev, ENEB_IRQ, dev->irq << 1); + ene_hw_write_reg(dev, ENEB_IRQ_UNK1, 0x01); + } else { + reg_value = ene_hw_read_reg(dev, ENEC_IRQ) & 0xF0; + reg_value |= ENEC_IRQ_UNK_EN; + reg_value &= ~ENEC_IRQ_STATUS; + reg_value |= (dev->irq & ENEC_IRQ_MASK); + ene_hw_write_reg(dev, ENEC_IRQ, reg_value); + ene_hw_write_reg(dev, ENE_TX_UNK1, 0x63); + } + + ene_hw_write_reg(dev, ENE_CIR_CONF2, 0x00); + ene_set_inputs(dev, enable_learning); + + /* set sampling period */ + ene_hw_write_reg(dev, ENE_CIR_SAMPLE_PERIOD, sample_period); + + /* ack any pending irqs - just in case */ + ene_hw_irq_status(dev, NULL); + + /* enter idle mode */ + ene_set_idle(dev, 1); + + /* enable firmware bits */ + ene_hw_write_reg_mask(dev, ENE_FW1, + ENE_FW1_ENABLE | ENE_FW1_IRQ, + ENE_FW1_ENABLE | ENE_FW1_IRQ); + /* clear stats */ + dev->sample = 0; + return 0; +} + +/* this enables gpio40 signal, used if connected to wide band input*/ +static void ene_enable_gpio40(struct ene_device *dev, int enable) +{ + ene_hw_write_reg_mask(dev, ENE_CIR_CONF1, enable ? + 0 : ENE_CIR_CONF2_GPIO40DIS, + ENE_CIR_CONF2_GPIO40DIS); +} + +/* this enables the classic sampler */ +static void ene_enable_normal_recieve(struct ene_device *dev, int enable) +{ + ene_hw_write_reg(dev, ENE_CIR_CONF1, enable ? ENE_CIR_CONF1_ADC_ON : 0); +} + +/* this enables recieve via fan input */ +static void ene_enable_fan_recieve(struct ene_device *dev, int enable) +{ + if (!enable) + ene_hw_write_reg(dev, ENE_FAN_AS_IN1, 0); + else { + ene_hw_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN); + ene_hw_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN); + } + dev->fan_input_inuse = enable; +} + +/* determine which input to use*/ +static void ene_set_inputs(struct ene_device *dev, int learning_enable) +{ + ene_enable_normal_recieve(dev, 1); + + /* old hardware doesn't support learning mode for sure */ + if (dev->hw_revision <= ENE_HW_B) + return; + + /* reciever not learning capable, still set gpio40 correctly */ + if (!dev->hw_learning_and_tx_capable) { + ene_enable_gpio40(dev, !dev->hw_gpio40_learning); + return; + } + + /* enable learning mode */ + if (learning_enable) { + ene_enable_gpio40(dev, dev->hw_gpio40_learning); + + /* fan input is not used for learning */ + if (dev->hw_fan_as_normal_input) + ene_enable_fan_recieve(dev, 0); + + /* disable learning mode */ + } else { + if (dev->hw_fan_as_normal_input) { + ene_enable_fan_recieve(dev, 1); + ene_enable_normal_recieve(dev, 0); + } else + ene_enable_gpio40(dev, !dev->hw_gpio40_learning); + } + + /* set few additional settings for this mode */ + ene_hw_write_reg_mask(dev, ENE_CIR_CONF1, learning_enable ? + ENE_CIR_CONF1_LEARN1 : 0, ENE_CIR_CONF1_LEARN1); + + ene_hw_write_reg_mask(dev, ENE_CIR_CONF2, learning_enable ? + ENE_CIR_CONF2_LEARN2 : 0, ENE_CIR_CONF2_LEARN2); +} + +/* deinitialization */ +static void ene_hw_deinit(void *data) +{ + struct ene_device *dev = (struct ene_device *)data; + + /* disable samplers */ + ene_enable_normal_recieve(dev, 0); + + if (dev->hw_fan_as_normal_input) + ene_enable_fan_recieve(dev, 0); + + /* disable hardware IRQ and firmware flag */ + ene_hw_write_reg_mask(dev, ENE_FW1, 0, ENE_FW1_ENABLE | ENE_FW1_IRQ); + + ene_set_idle(dev, 1); + dev->in_use = 0; +} + +/* sends current sample to userspace */ +static void send_sample(struct ene_device *dev) +{ + int value = abs(dev->sample) & PULSE_MASK; + + if (dev->sample > 0) + value |= PULSE_BIT; + + if (!lirc_buffer_full(dev->lirc_driver->rbuf)) { + lirc_buffer_write(dev->lirc_driver->rbuf, (void *)&value); + wake_up(&dev->lirc_driver->rbuf->wait_poll); + } + dev->sample = 0; +} + +/* this updates current sample */ +static void update_sample(struct ene_device *dev, int sample) +{ + if (!dev->sample) + dev->sample = sample; + else if (same_sign(dev->sample, sample)) + dev->sample += sample; + else { + send_sample(dev); + dev->sample = sample; + } +} + +/* enable or disable idle mode */ +static void ene_set_idle(struct ene_device *dev, int idle) +{ + struct timeval now; + int disable = idle && enable_idle && (dev->hw_revision < ENE_HW_C); + + ene_hw_write_reg_mask(dev, ENE_CIR_SAMPLE_PERIOD, + disable ? 0 : ENE_CIR_SAMPLE_OVERFLOW, + ENE_CIR_SAMPLE_OVERFLOW); + dev->idle = idle; + + /* remember when we have entered the idle mode */ + if (idle) { + do_gettimeofday(&dev->gap_start); + return; + } + + /* send the gap between keypresses now */ + do_gettimeofday(&now); + + if (now.tv_sec - dev->gap_start.tv_sec > 16) + dev->sample = space(PULSE_MASK); + else + dev->sample = dev->sample + + space(1000000ull * (now.tv_sec - dev->gap_start.tv_sec)) + + space(now.tv_usec - dev->gap_start.tv_usec); + + if (abs(dev->sample) > PULSE_MASK) + dev->sample = space(PULSE_MASK); + send_sample(dev); +} + +/* interrupt handler */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) +static irqreturn_t ene_hw_irq(int irq, void *data) +#else +static irqreturn_t ene_hw_irq(int irq, void *data, struct pt_regs *regs) +#endif +{ + u16 hw_value; + int i, hw_sample; + int space; + int buffer_pointer; + int irq_status; + + struct ene_device *dev = (struct ene_device *)data; + irq_status = ene_hw_irq_status(dev, &buffer_pointer); + + if (!irq_status) + return IRQ_NONE; + + /* TODO: only RX for now */ + if (irq_status == ENE_IRQ_TX) + return IRQ_HANDLED; + + for (i = 0; i < ENE_SAMPLES_SIZE; i++) { + + hw_value = ene_hw_read_reg(dev, + ENE_SAMPLE_BUFFER + buffer_pointer + i); + + if (dev->fan_input_inuse) { + /* read high part of the sample */ + hw_value |= ene_hw_read_reg(dev, + ENE_SAMPLE_BUFFER_FAN + buffer_pointer + i) << 8; + + /* test for _space_ bit */ + space = !(hw_value & ENE_FAN_SMPL_PULS_MSK); + + /* clear space bit, and other unused bits */ + hw_value &= ENE_FAN_VALUE_MASK; + hw_sample = hw_value * ENE_SAMPLE_PERIOD_FAN; + + } else { + space = hw_value & ENE_SAMPLE_SPC_MASK; + hw_value &= ENE_SAMPLE_VALUE_MASK; + hw_sample = hw_value * sample_period; + } + + /* no more data */ + if (!(hw_value)) + break; + + if (space) + hw_sample *= -1; + + /* overflow sample recieved, handle it */ + + if (!dev->fan_input_inuse && hw_value == ENE_SAMPLE_OVERFLOW) { + + if (dev->idle) + continue; + + if (dev->sample > 0 || abs(dev->sample) <= ENE_MAXGAP) + update_sample(dev, hw_sample); + else + ene_set_idle(dev, 1); + + continue; + } + + /* normal first sample recieved */ + if (!dev->fan_input_inuse && dev->idle) { + ene_set_idle(dev, 0); + + /* discard first recieved value, its random + since its the time signal was off before + first pulse if idle mode is enabled, HW + does that for us */ + + if (!enable_idle) + continue; + } + update_sample(dev, hw_sample); + send_sample(dev); + } + return IRQ_HANDLED; +} + +static int ene_probe(struct pnp_dev *pnp_dev, + const struct pnp_device_id *dev_id) +{ + struct ene_device *dev; + struct lirc_driver *lirc_driver; + int error = -ENOMEM; + + dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL); + + if (!dev) + goto err1; + + dev->pnp_dev = pnp_dev; + pnp_set_drvdata(pnp_dev, dev); + + + /* prepare lirc interface */ + error = -ENOMEM; + lirc_driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL); + + if (!lirc_driver) + goto err2; + + dev->lirc_driver = lirc_driver; + + strcpy(lirc_driver->name, ENE_DRIVER_NAME); + lirc_driver->minor = -1; + lirc_driver->code_length = sizeof(int) * 8; + lirc_driver->features = LIRC_CAN_REC_MODE2; + lirc_driver->data = dev; + lirc_driver->set_use_inc = ene_hw_init; + lirc_driver->set_use_dec = ene_hw_deinit; + lirc_driver->dev = &pnp_dev->dev; + lirc_driver->owner = THIS_MODULE; + + lirc_driver->rbuf = kzalloc(sizeof(struct lirc_buffer), GFP_KERNEL); + + if (!lirc_driver->rbuf) + goto err3; + + if (lirc_buffer_init(lirc_driver->rbuf, sizeof(int), sizeof(int) * 256)) + goto err4; + + error = -ENODEV; + if (lirc_register_driver(lirc_driver)) + goto err5; + + /* validate resources */ + if (!pnp_port_valid(pnp_dev, 0) || pnp_port_len(pnp_dev, 0) < ENE_MAX_IO) + goto err6; + + if (!pnp_irq_valid(pnp_dev, 0)) + goto err6; + + dev->hw_io = pnp_port_start(pnp_dev, 0); + dev->irq = pnp_irq(pnp_dev, 0); + + /* claim the resources */ + error = -EBUSY; + if (!request_region(dev->hw_io, ENE_MAX_IO, ENE_DRIVER_NAME)) + goto err6; + + if (request_irq(dev->irq, ene_hw_irq, + IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) + goto err7; + + /* detect hardware version and features */ + error = ene_hw_detect(dev); + if (error) + goto err8; + + ene_printk(KERN_NOTICE, "driver has been succesfully loaded\n"); + return 0; + +err8: + free_irq(dev->irq, dev); +err7: + release_region(dev->hw_io, ENE_MAX_IO); +err6: + lirc_unregister_driver(lirc_driver->minor); +err5: + lirc_buffer_free(lirc_driver->rbuf); +err4: + kfree(lirc_driver->rbuf); +err3: + kfree(lirc_driver); +err2: + kfree(dev); +err1: + return error; +} + +static void ene_remove(struct pnp_dev *pnp_dev) +{ + struct ene_device *dev = pnp_get_drvdata(pnp_dev); + ene_hw_deinit(dev); + free_irq(dev->irq, dev); + release_region(dev->hw_io, ENE_MAX_IO); + lirc_unregister_driver(dev->lirc_driver->minor); + lirc_buffer_free(dev->lirc_driver->rbuf); + kfree(dev->lirc_driver); + kfree(dev); +} + +#ifdef CONFIG_PM + +/* TODO: make 'wake on IR' configurable and add .shutdown */ +/* currently impossible due to lack of kernel support */ + +static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state) +{ + struct ene_device *dev = pnp_get_drvdata(pnp_dev); + ene_hw_write_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, ENE_FW1_WAKE); + return 0; +} + +static int ene_resume(struct pnp_dev *pnp_dev) +{ + struct ene_device *dev = pnp_get_drvdata(pnp_dev); + if (dev->in_use) + ene_hw_init(dev); + + ene_hw_write_reg_mask(dev, ENE_FW1, 0, ENE_FW1_WAKE); + return 0; +} + +#endif + +static const struct pnp_device_id ene_ids[] = { + {.id = "ENE0100",}, + {}, +}; + +static struct pnp_driver ene_driver = { + .name = ENE_DRIVER_NAME, + .id_table = ene_ids, + .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, + + .probe = ene_probe, + .remove = __devexit_p(ene_remove), + +#ifdef CONFIG_PM + .suspend = ene_suspend, + .resume = ene_resume, +#endif +}; + +static int __init ene_init(void) +{ + if (sample_period < 5) { + ene_printk(KERN_ERR, "sample period must be at\n"); + ene_printk(KERN_ERR, "least 5 us, (at least 30 recommended)\n"); + return -EINVAL; + } + return pnp_register_driver(&ene_driver); +} + +static void ene_exit(void) +{ + pnp_unregister_driver(&ene_driver); +} + +module_param(sample_period, int, S_IRUGO); +MODULE_PARM_DESC(sample_period, "Hardware sample period (75 us default)"); + +module_param(enable_idle, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(enable_idle, + "Enables turning off signal sampling after long inactivity time; " + "if disabled might help detecting input signal (default: enabled)"); + +module_param(enable_learning, bool, S_IRUGO); +MODULE_PARM_DESC(enable_learning, "Use wide band (learning) reciever"); + +MODULE_DEVICE_TABLE(pnp, ene_ids); +MODULE_DESCRIPTION + ("LIRC driver for KB3926B/KB3926C/KB3926D (aka ENE0100) CIR port"); +MODULE_AUTHOR("Maxim Levitsky"); +MODULE_LICENSE("GPL"); + +module_init(ene_init); +module_exit(ene_exit); +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_it87/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_it87/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_IT87) += lirc_it87.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_it87/lirc_it87.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_it87/lirc_it87.h @@ -0,0 +1,116 @@ +/* lirc_it87.h */ +/* SECTION: Definitions */ + +/********************************* ITE IT87xx ************************/ + +/* based on the following documentation from ITE: + a) IT8712F Preliminary CIR Programming Guide V0.1 + b) IT8705F Simple LPC I/O Preliminary Specification V0.3 + c) IT8712F EC-LPC I/O Preliminary Specification V0.5 +*/ + +/* IT8712/05 Ports: */ +#define IT87_ADRPORT 0x2e +#define IT87_DATAPORT 0x2f +#define IT87_INIT {0x87, 0x01, 0x55, 0x55} + +/* alternate Ports: */ +/* +#define IT87_ADRPORT 0x4e +#define IT87_DATAPORT 0x4f +#define IT87_INIT {0x87, 0x01, 0x55, 0xaa} + */ + +/* IT8712/05 Registers */ +#define IT87_CFGCTRL 0x2 +#define IT87_LDN 0x7 +#define IT87_CHIP_ID1 0x20 +#define IT87_CHIP_ID2 0x21 +#define IT87_CFG_VERSION 0x22 +#define IT87_SWSUSPEND 0x23 + +#define IT8712_CIR_LDN 0xa +#define IT8705_CIR_LDN 0x7 + +/* CIR Configuration Registers: */ +#define IT87_CIR_ACT 0x30 +#define IT87_CIR_BASE_MSB 0x60 +#define IT87_CIR_BASE_LSB 0x61 +#define IT87_CIR_IRQ 0x70 +#define IT87_CIR_CONFIG 0xf0 + +/* List of IT87_CIR registers: offset to BaseAddr */ +#define IT87_CIR_DR 0 +#define IT87_CIR_IER 1 +#define IT87_CIR_RCR 2 +#define IT87_CIR_TCR1 3 +#define IT87_CIR_TCR2 4 +#define IT87_CIR_TSR 5 +#define IT87_CIR_RSR 6 +#define IT87_CIR_BDLR 5 +#define IT87_CIR_BDHR 6 +#define IT87_CIR_IIR 7 + +/* Bit Definition */ +/* IER: */ +#define IT87_CIR_IER_TM_EN 0x80 +#define IT87_CIR_IER_RESEVED 0x40 +#define IT87_CIR_IER_RESET 0x20 +#define IT87_CIR_IER_BR 0x10 +#define IT87_CIR_IER_IEC 0x8 +#define IT87_CIR_IER_RFOIE 0x4 +#define IT87_CIR_IER_RDAIE 0x2 +#define IT87_CIR_IER_TLDLIE 0x1 + +/* RCR: */ +#define IT87_CIR_RCR_RDWOS 0x80 +#define IT87_CIR_RCR_HCFS 0x40 +#define IT87_CIR_RCR_RXEN 0x20 +#define IT87_CIR_RCR_RXEND 0x10 +#define IT87_CIR_RCR_RXACT 0x8 +#define IT87_CIR_RCR_RXDCR 0x7 + +/* TCR1: */ +#define IT87_CIR_TCR1_FIFOCLR 0x80 +#define IT87_CIR_TCR1_ILE 0x40 +#define IT87_CIR_TCR1_FIFOTL 0x30 +#define IT87_CIR_TCR1_TXRLE 0x8 +#define IT87_CIR_TCR1_TXENDF 0x4 +#define IT87_CIR_TCR1_TXMPM 0x3 + +/* TCR2: */ +#define IT87_CIR_TCR2_CFQ 0xf8 +#define IT87_CIR_TCR2_TXMPW 0x7 + +/* TSR: */ +#define IT87_CIR_TSR_RESERVED 0xc0 +#define IT87_CIR_TSR_TXFBC 0x3f + +/* RSR: */ +#define IT87_CIR_RSR_RXFTO 0x80 +#define IT87_CIR_RSR_RESERVED 0x40 +#define IT87_CIR_RSR_RXFBC 0x3f + +/* IIR: */ +#define IT87_CIR_IIR_RESERVED 0xf8 +#define IT87_CIR_IIR_IID 0x6 +#define IT87_CIR_IIR_IIP 0x1 + +/* TM: */ +#define IT87_CIR_TM_IL_SEL 0x80 +#define IT87_CIR_TM_RESERVED 0x40 +#define IT87_CIR_TM_TM_REG 0x3f + +#define IT87_CIR_FIFO_SIZE 32 + +/* Baudratedivisor for IT87: power of 2: only 1,2,4 or 8) */ +#define IT87_CIR_BAUDRATE_DIVISOR 0x1 +#define IT87_CIR_DEFAULT_IOBASE 0x310 +#define IT87_CIR_DEFAULT_IRQ 0x7 +#define IT87_CIR_SPACE 0x00 +#define IT87_CIR_PULSE 0xff +#define IT87_CIR_FREQ_MIN 27 +#define IT87_CIR_FREQ_MAX 58 +#define TIME_CONST (IT87_CIR_BAUDRATE_DIVISOR * 8000000ul / 115200ul) + +/********************************* ITE IT87xx ************************/ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_it87/lirc_it87.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_it87/lirc_it87.c @@ -0,0 +1,1012 @@ +/* + * LIRC driver for ITE IT8712/IT8705/IT8720 CIR port + * + * Copyright (C) 2001 Hans-Günter Lütke Uphues + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + * + * ITE IT8705, IT8712(not tested) and IT8720 CIR-port support for lirc based + * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula + * + * Attention: Sendmode only tested with debugging logs + * + * 2001/02/27 Christoph Bartelmus : + * reimplemented read function + * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix, + * based on work of the following member of the Outertrack Digimatrix + * Forum: Art103 + */ + +#ifdef HAVE_CONFIG_H +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +#include +#include +#include +#else +#include +#include +#include +#endif + +#include + +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" +#include "../kcompat.h" + +#include "lirc_it87.h" + +#ifdef LIRC_IT87_DIGIMATRIX +static int digimatrix = 1; +static int it87_freq = 36; /* kHz */ +static int irq = 9; +#else +static int digimatrix; +static int it87_freq = 38; /* kHz */ +static int irq = IT87_CIR_DEFAULT_IRQ; +#endif + +static unsigned long it87_bits_in_byte_out; +static unsigned long it87_send_counter; +static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN; + +#define RBUF_LEN 1024 +#define WBUF_LEN 1024 + +#define LIRC_DRIVER_NAME "lirc_it87" + +/* timeout for sequences in jiffies (=5/100s) */ +/* must be longer than TIME_CONST */ +#define IT87_TIMEOUT (HZ*5/100) + +/* module parameters */ +static int debug; +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +static int io = IT87_CIR_DEFAULT_IOBASE; +/* receiver demodulator default: off */ +static int it87_enable_demodulator; + +static int timer_enabled; +static DEFINE_SPINLOCK(timer_lock); +static struct timer_list timerlist; +/* time of last signal change detected */ +static struct timeval last_tv = {0, 0}; +/* time of last UART data ready interrupt */ +static struct timeval last_intr_tv = {0, 0}; +static int last_value; + +static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue); + +static DEFINE_SPINLOCK(hardware_lock); +static DEFINE_SPINLOCK(dev_lock); + +static lirc_t rx_buf[RBUF_LEN]; +unsigned int rx_tail, rx_head; +static lirc_t tx_buf[WBUF_LEN]; + +/* SECTION: Prototypes */ + +/* Communication with user-space */ +static int lirc_open(struct inode *inode, struct file *file); +static int lirc_close(struct inode *inode, struct file *file); +static unsigned int lirc_poll(struct file *file, poll_table *wait); +static ssize_t lirc_read(struct file *file, char *buf, + size_t count, loff_t *ppos); +static ssize_t lirc_write(struct file *file, const char *buf, + size_t n, loff_t *pos); +static int lirc_ioctl(struct inode *node, struct file *filep, + unsigned int cmd, unsigned long arg); +static void add_read_queue(int flag, unsigned long val); +static int init_chrdev(void); +static void drop_chrdev(void); + /* Hardware */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static irqreturn_t it87_interrupt(int irq, void *dev_id, + struct pt_regs *regs); +#else +static irqreturn_t it87_interrupt(int irq, void *dev_id); +#endif +static void send_space(unsigned long len); +static void send_pulse(unsigned long len); +static void init_send(void); +static void terminate_send(unsigned long len); +static int init_hardware(void); +static void drop_hardware(void); +/* Initialisation */ +static int init_port(void); +static void drop_port(void); + + +/* SECTION: Communication with user-space */ + +static int lirc_open(struct inode *inode, struct file *file) +{ + spin_lock(&dev_lock); + if (MOD_IN_USE) { + spin_unlock(&dev_lock); + return -EBUSY; + } + MOD_INC_USE_COUNT; + spin_unlock(&dev_lock); + return 0; +} + + +static int lirc_close(struct inode *inode, struct file *file) +{ + MOD_DEC_USE_COUNT; + return 0; +} + + +static unsigned int lirc_poll(struct file *file, poll_table *wait) +{ + poll_wait(file, &lirc_read_queue, wait); + if (rx_head != rx_tail) + return POLLIN | POLLRDNORM; + return 0; +} + + +static ssize_t lirc_read(struct file *file, char *buf, + size_t count, loff_t *ppos) +{ + int n = 0; + int retval = 0; + + while (n < count) { + if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) { + retval = -EAGAIN; + break; + } + retval = wait_event_interruptible(lirc_read_queue, + rx_head != rx_tail); + if (retval) + break; + + if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head), + sizeof(lirc_t))) { + retval = -EFAULT; + break; + } + rx_head = (rx_head + 1) & (RBUF_LEN - 1); + n += sizeof(lirc_t); + } + if (n) + return n; + return retval; +} + + +static ssize_t lirc_write(struct file *file, const char *buf, + size_t n, loff_t *pos) +{ + int i = 0; + + if (n % sizeof(lirc_t) || (n / sizeof(lirc_t)) > WBUF_LEN) + return -EINVAL; + if (copy_from_user(tx_buf, buf, n)) + return -EFAULT; + n /= sizeof(lirc_t); + init_send(); + while (1) { + if (i >= n) + break; + if (tx_buf[i]) + send_pulse(tx_buf[i]); + i++; + if (i >= n) + break; + if (tx_buf[i]) + send_space(tx_buf[i]); + i++; + } + terminate_send(tx_buf[i - 1]); + return n; +} + + +static int lirc_ioctl(struct inode *node, struct file *filep, + unsigned int cmd, unsigned long arg) +{ + int retval = 0; + unsigned long value = 0; + unsigned int ivalue; + unsigned long hw_flags; + + if (cmd == LIRC_GET_FEATURES) + value = LIRC_CAN_SEND_PULSE | + LIRC_CAN_SET_SEND_CARRIER | + LIRC_CAN_REC_MODE2; + else if (cmd == LIRC_GET_SEND_MODE) + value = LIRC_MODE_PULSE; + else if (cmd == LIRC_GET_REC_MODE) + value = LIRC_MODE_MODE2; + + switch (cmd) { + case LIRC_GET_FEATURES: + case LIRC_GET_SEND_MODE: + case LIRC_GET_REC_MODE: + retval = put_user(value, (unsigned long *) arg); + break; + + case LIRC_SET_SEND_MODE: + case LIRC_SET_REC_MODE: + retval = get_user(value, (unsigned long *) arg); + break; + + case LIRC_SET_SEND_CARRIER: + retval = get_user(ivalue, (unsigned int *) arg); + if (retval) + return retval; + ivalue /= 1000; + if (ivalue > IT87_CIR_FREQ_MAX || + ivalue < IT87_CIR_FREQ_MIN) + return -EINVAL; + + it87_freq = ivalue; + + spin_lock_irqsave(&hardware_lock, hw_flags); + outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) | + (it87_freq - IT87_CIR_FREQ_MIN) << 3), + io + IT87_CIR_TCR2); + spin_unlock_irqrestore(&hardware_lock, hw_flags); + dprintk("demodulation frequency: %d kHz\n", it87_freq); + + break; + + default: + retval = -EINVAL; + } + + if (retval) + return retval; + + if (cmd == LIRC_SET_REC_MODE) { + if (value != LIRC_MODE_MODE2) + retval = -ENOSYS; + } else if (cmd == LIRC_SET_SEND_MODE) { + if (value != LIRC_MODE_PULSE) + retval = -ENOSYS; + } + return retval; +} + +static void add_read_queue(int flag, unsigned long val) +{ + unsigned int new_rx_tail; + lirc_t newval; + + dprintk("add flag %d with val %lu\n", flag, val); + + newval = val & PULSE_MASK; + + /* + * statistically, pulses are ~TIME_CONST/2 too long. we could + * maybe make this more exact, but this is good enough + */ + if (flag) { + /* pulse */ + if (newval > TIME_CONST / 2) + newval -= TIME_CONST / 2; + else /* should not ever happen */ + newval = 1; + newval |= PULSE_BIT; + } else + newval += TIME_CONST / 2; + new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1); + if (new_rx_tail == rx_head) { + dprintk("Buffer overrun.\n"); + return; + } + rx_buf[rx_tail] = newval; + rx_tail = new_rx_tail; + wake_up_interruptible(&lirc_read_queue); +} + + +static struct file_operations lirc_fops = { + .owner = THIS_MODULE, + .read = lirc_read, + .write = lirc_write, + .poll = lirc_poll, + .ioctl = lirc_ioctl, + .open = lirc_open, + .release = lirc_close, +}; + +static int set_use_inc(void *data) +{ + return 0; +} + +static void set_use_dec(void *data) +{ +} + +static struct lirc_driver driver = { + .name = LIRC_DRIVER_NAME, + .minor = -1, + .code_length = 1, + .sample_rate = 0, + .data = NULL, + .add_to_buf = NULL, +#ifndef LIRC_REMOVE_DURING_EXPORT + .get_queue = NULL, +#endif + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .fops = &lirc_fops, + .dev = NULL, + .owner = THIS_MODULE, +}; + + +static int init_chrdev(void) +{ + driver.minor = lirc_register_driver(&driver); + + if (driver.minor < 0) { + printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n"); + return -EIO; + } + return 0; +} + + +static void drop_chrdev(void) +{ + lirc_unregister_driver(driver.minor); +} + + +/* SECTION: Hardware */ +static long delta(struct timeval *tv1, struct timeval *tv2) +{ + unsigned long deltv; + + deltv = tv2->tv_sec - tv1->tv_sec; + if (deltv > 15) + deltv = 0xFFFFFF; + else + deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec; + return deltv; +} + +static void it87_timeout(unsigned long data) +{ + unsigned long flags; + + /* avoid interference with interrupt */ + spin_lock_irqsave(&timer_lock, flags); + + if (digimatrix) { + /* We have timed out. Disable the RX mechanism. */ + + outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) | + IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR); + if (it87_RXEN_mask) + outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN, + io + IT87_CIR_RCR); + dprintk(" TIMEOUT\n"); + timer_enabled = 0; + + /* fifo clear */ + outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR, + io+IT87_CIR_TCR1); + + } else { + /* + * if last received signal was a pulse, but receiving stopped + * within the 9 bit frame, we need to finish this pulse and + * simulate a signal change to from pulse to space. Otherwise + * upper layers will receive two sequences next time. + */ + + if (last_value) { + unsigned long pulse_end; + + /* determine 'virtual' pulse end: */ + pulse_end = delta(&last_tv, &last_intr_tv); + dprintk("timeout add %d for %lu usec\n", + last_value, pulse_end); + add_read_queue(last_value, pulse_end); + last_value = 0; + last_tv = last_intr_tv; + } + } + spin_unlock_irqrestore(&timer_lock, flags); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static irqreturn_t it87_interrupt(int irq, void *dev_id, struct pt_regs *regs) +#else +static irqreturn_t it87_interrupt(int irq, void *dev_id) +#endif +{ + unsigned char data; + struct timeval curr_tv; + static unsigned long deltv; + unsigned long deltintrtv; + unsigned long flags, hw_flags; + int iir, lsr; + int fifo = 0; + static char lastbit; + char bit; + + /* Bit duration in microseconds */ + const unsigned long bit_duration = 1000000ul / + (115200 / IT87_CIR_BAUDRATE_DIVISOR); + + + iir = inb(io + IT87_CIR_IIR); + + switch (iir & IT87_CIR_IIR_IID) { + case 0x4: + case 0x6: + lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO | + IT87_CIR_RSR_RXFBC); + fifo = lsr & IT87_CIR_RSR_RXFBC; + dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr); + + /* avoid interference with timer */ + spin_lock_irqsave(&timer_lock, flags); + spin_lock_irqsave(&hardware_lock, hw_flags); + if (digimatrix) { + static unsigned long acc_pulse; + static unsigned long acc_space; + + do { + data = inb(io + IT87_CIR_DR); + data = ~data; + fifo--; + if (data != 0x00) { + if (timer_enabled) + del_timer(&timerlist); + /* + * start timer for end of + * sequence detection + */ + timerlist.expires = jiffies + + IT87_TIMEOUT; + add_timer(&timerlist); + timer_enabled = 1; + } + /* Loop through */ + for (bit = 0; bit < 8; ++bit) { + if ((data >> bit) & 1) { + ++acc_pulse; + if (lastbit == 0) { + add_read_queue(0, + acc_space * + bit_duration); + acc_space = 0; + } + } else { + ++acc_space; + if (lastbit == 1) { + add_read_queue(1, + acc_pulse * + bit_duration); + acc_pulse = 0; + } + } + lastbit = (data >> bit) & 1; + } + + } while (fifo != 0); + } else { /* Normal Operation */ + do { + del_timer(&timerlist); + data = inb(io + IT87_CIR_DR); + + dprintk("data=%.2x\n", data); + do_gettimeofday(&curr_tv); + deltv = delta(&last_tv, &curr_tv); + deltintrtv = delta(&last_intr_tv, &curr_tv); + + dprintk("t %lu , d %d\n", + deltintrtv, (int)data); + + /* + * if nothing came in last 2 cycles, + * it was gap + */ + if (deltintrtv > TIME_CONST * 2) { + if (last_value) { + dprintk("GAP\n"); + + /* simulate signal change */ + add_read_queue(last_value, + deltv - + deltintrtv); + last_value = 0; + last_tv.tv_sec = + last_intr_tv.tv_sec; + last_tv.tv_usec = + last_intr_tv.tv_usec; + deltv = deltintrtv; + } + } + data = 1; + if (data ^ last_value) { + /* + * deltintrtv > 2*TIME_CONST, + * remember ? the other case is + * timeout + */ + add_read_queue(last_value, + deltv-TIME_CONST); + last_value = data; + last_tv = curr_tv; + if (last_tv.tv_usec >= TIME_CONST) + last_tv.tv_usec -= TIME_CONST; + else { + last_tv.tv_sec--; + last_tv.tv_usec += 1000000 - + TIME_CONST; + } + } + last_intr_tv = curr_tv; + if (data) { + /* + * start timer for end of + * sequence detection + */ + timerlist.expires = + jiffies + IT87_TIMEOUT; + add_timer(&timerlist); + } + outb((inb(io + IT87_CIR_RCR) & + ~IT87_CIR_RCR_RXEN) | + IT87_CIR_RCR_RXACT, + io + IT87_CIR_RCR); + if (it87_RXEN_mask) + outb(inb(io + IT87_CIR_RCR) | + IT87_CIR_RCR_RXEN, + io + IT87_CIR_RCR); + fifo--; + } while (fifo != 0); + } + spin_unlock_irqrestore(&hardware_lock, hw_flags); + spin_unlock_irqrestore(&timer_lock, flags); + + return IRQ_RETVAL(IRQ_HANDLED); + + default: + /* not our irq */ + dprintk("unknown IRQ (shouldn't happen) !!\n"); + return IRQ_RETVAL(IRQ_NONE); + } +} + + +static void send_it87(unsigned long len, unsigned long stime, + unsigned char send_byte, unsigned int count_bits) +{ + long count = len / stime; + long time_left = 0; + static unsigned char byte_out; + unsigned long hw_flags; + + dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte); + + time_left = (long)len - (long)count * (long)stime; + count += ((2 * time_left) / stime); + while (count) { + long i = 0; + for (i = 0; i < count_bits; i++) { + byte_out = (byte_out << 1) | (send_byte & 1); + it87_bits_in_byte_out++; + } + if (it87_bits_in_byte_out == 8) { + dprintk("out=0x%x, tsr_txfbc: 0x%x\n", + byte_out, + inb(io + IT87_CIR_TSR) & + IT87_CIR_TSR_TXFBC); + + while ((inb(io + IT87_CIR_TSR) & + IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE) + ; + + spin_lock_irqsave(&hardware_lock, hw_flags); + outb(byte_out, io + IT87_CIR_DR); + spin_unlock_irqrestore(&hardware_lock, hw_flags); + + it87_bits_in_byte_out = 0; + it87_send_counter++; + byte_out = 0; + } + count--; + } +} + + +/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */ + +static void send_space(unsigned long len) +{ + send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR); +} + +static void send_pulse(unsigned long len) +{ + send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR); +} + + +static void init_send() +{ + unsigned long flags; + + spin_lock_irqsave(&hardware_lock, flags); + /* RXEN=0: receiver disable */ + it87_RXEN_mask = 0; + outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN, + io + IT87_CIR_RCR); + spin_unlock_irqrestore(&hardware_lock, flags); + it87_bits_in_byte_out = 0; + it87_send_counter = 0; +} + + +static void terminate_send(unsigned long len) +{ + unsigned long flags; + unsigned long last = 0; + + last = it87_send_counter; + /* make sure all necessary data has been sent */ + while (last == it87_send_counter) + send_space(len); + /* wait until all data sent */ + while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0) + ; + /* then re-enable receiver */ + spin_lock_irqsave(&hardware_lock, flags); + it87_RXEN_mask = IT87_CIR_RCR_RXEN; + outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN, + io + IT87_CIR_RCR); + spin_unlock_irqrestore(&hardware_lock, flags); +} + + +static int init_hardware(void) +{ + unsigned long flags; + unsigned char it87_rcr = 0; + + spin_lock_irqsave(&hardware_lock, flags); + /* init cir-port */ + /* enable r/w-access to Baudrate-Register */ + outb(IT87_CIR_IER_BR, io + IT87_CIR_IER); + outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR); + outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR); + /* Baudrate Register off, define IRQs: Input only */ + if (digimatrix) { + outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER); + /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */ + } else { + outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER); + /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */ + } + it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1; + if (it87_enable_demodulator) + it87_rcr |= IT87_CIR_RCR_RXEND; + outb(it87_rcr, io + IT87_CIR_RCR); + if (digimatrix) { + /* Set FIFO depth to 1 byte, and disable TX */ + outb(inb(io + IT87_CIR_TCR1) | 0x00, + io + IT87_CIR_TCR1); + + /* + * TX: it87_freq (36kHz), 'reserved' sensitivity + * setting (0x00) + */ + outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00, + io + IT87_CIR_TCR2); + } else { + /* TX: 38kHz, 13,3us (pulse-width) */ + outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06, + io + IT87_CIR_TCR2); + } + spin_unlock_irqrestore(&hardware_lock, flags); + return 0; +} + + +static void drop_hardware(void) +{ + unsigned long flags; + + spin_lock_irqsave(&hardware_lock, flags); + disable_irq(irq); + /* receiver disable */ + it87_RXEN_mask = 0; + outb(0x1, io + IT87_CIR_RCR); + /* turn off irqs */ + outb(0, io + IT87_CIR_IER); + /* fifo clear */ + outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1); + /* reset */ + outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER); + enable_irq(irq); + spin_unlock_irqrestore(&hardware_lock, flags); +} + + +static unsigned char it87_read(unsigned char port) +{ + outb(port, IT87_ADRPORT); + return inb(IT87_DATAPORT); +} + + +static void it87_write(unsigned char port, unsigned char data) +{ + outb(port, IT87_ADRPORT); + outb(data, IT87_DATAPORT); +} + + +/* SECTION: Initialisation */ + +static int init_port(void) +{ + unsigned long hw_flags; + int retval = 0; + + unsigned char init_bytes[4] = IT87_INIT; + unsigned char it87_chipid = 0; + unsigned char ldn = 0; + unsigned int it87_io = 0; + unsigned int it87_irq = 0; + + /* Enter MB PnP Mode */ + outb(init_bytes[0], IT87_ADRPORT); + outb(init_bytes[1], IT87_ADRPORT); + outb(init_bytes[2], IT87_ADRPORT); + outb(init_bytes[3], IT87_ADRPORT); + + /* 8712 or 8705 ? */ + it87_chipid = it87_read(IT87_CHIP_ID1); + if (it87_chipid != 0x87) { + retval = -ENXIO; + return retval; + } + it87_chipid = it87_read(IT87_CHIP_ID2); + if ((it87_chipid != 0x12) && + (it87_chipid != 0x05) && + (it87_chipid != 0x20)) { + printk(KERN_INFO LIRC_DRIVER_NAME + ": no IT8705/12/20 found, exiting..\n"); + retval = -ENXIO; + return retval; + } + printk(KERN_INFO LIRC_DRIVER_NAME + ": found IT87%.2x.\n", + it87_chipid); + + /* get I/O-Port and IRQ */ + if (it87_chipid == 0x12) + ldn = IT8712_CIR_LDN; + else + ldn = IT8705_CIR_LDN; + it87_write(IT87_LDN, ldn); + + it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 + + it87_read(IT87_CIR_BASE_LSB); + if (it87_io == 0) { + if (io == 0) + io = IT87_CIR_DEFAULT_IOBASE; + printk(KERN_INFO LIRC_DRIVER_NAME + ": set default io 0x%x\n", + io); + it87_write(IT87_CIR_BASE_MSB, io / 0x100); + it87_write(IT87_CIR_BASE_LSB, io % 0x100); + } else + io = it87_io; + + it87_irq = it87_read(IT87_CIR_IRQ); + if (digimatrix || it87_irq == 0) { + if (irq == 0) + irq = IT87_CIR_DEFAULT_IRQ; + printk(KERN_INFO LIRC_DRIVER_NAME + ": set default irq 0x%x\n", + irq); + it87_write(IT87_CIR_IRQ, irq); + } else + irq = it87_irq; + + spin_lock_irqsave(&hardware_lock, hw_flags); + /* reset */ + outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER); + /* fifo clear */ + outb(IT87_CIR_TCR1_FIFOCLR | + /* IT87_CIR_TCR1_ILE | */ + IT87_CIR_TCR1_TXRLE | + IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1); + spin_unlock_irqrestore(&hardware_lock, hw_flags); + + /* get I/O port access and IRQ line */ + if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) { + printk(KERN_ERR LIRC_DRIVER_NAME + ": i/o port 0x%.4x already in use.\n", io); + /* Leaving MB PnP Mode */ + it87_write(IT87_CFGCTRL, 0x2); + return -EBUSY; + } + + /* activate CIR-Device */ + it87_write(IT87_CIR_ACT, 0x1); + + /* Leaving MB PnP Mode */ + it87_write(IT87_CFGCTRL, 0x2); + + retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/, + LIRC_DRIVER_NAME, NULL); + if (retval < 0) { + printk(KERN_ERR LIRC_DRIVER_NAME + ": IRQ %d already in use.\n", + irq); + release_region(io, 8); + return retval; + } + + printk(KERN_INFO LIRC_DRIVER_NAME + ": I/O port 0x%.4x, IRQ %d.\n", io, irq); + + init_timer(&timerlist); + timerlist.function = it87_timeout; + timerlist.data = 0xabadcafe; + + return 0; +} + + +static void drop_port(void) +{ +#if 0 + unsigned char init_bytes[4] = IT87_INIT; + + /* Enter MB PnP Mode */ + outb(init_bytes[0], IT87_ADRPORT); + outb(init_bytes[1], IT87_ADRPORT); + outb(init_bytes[2], IT87_ADRPORT); + outb(init_bytes[3], IT87_ADRPORT); + + /* deactivate CIR-Device */ + it87_write(IT87_CIR_ACT, 0x0); + + /* Leaving MB PnP Mode */ + it87_write(IT87_CFGCTRL, 0x2); +#endif + + del_timer_sync(&timerlist); + free_irq(irq, NULL); + release_region(io, 8); +} + + +static int init_lirc_it87(void) +{ + int retval; + + init_waitqueue_head(&lirc_read_queue); + retval = init_port(); + if (retval < 0) + return retval; + init_hardware(); + printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n"); + return 0; +} + + +static int __init lirc_it87_init(void) +{ + int retval; + + retval = init_chrdev(); + if (retval < 0) + return retval; + retval = init_lirc_it87(); + if (retval) { + drop_chrdev(); + return retval; + } + return 0; +} + + +static void __exit lirc_it87_exit(void) +{ + drop_hardware(); + drop_chrdev(); + drop_port(); + printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n"); +} + +module_init(lirc_it87_init); +module_exit(lirc_it87_exit); + +MODULE_DESCRIPTION("LIRC driver for ITE IT8712/IT8705 CIR port"); +MODULE_AUTHOR("Hans-Günter Lütke Uphues"); +MODULE_LICENSE("GPL"); + +module_param(io, int, S_IRUGO); +MODULE_PARM_DESC(io, "I/O base address (default: 0x310)"); + +module_param(irq, int, S_IRUGO); +#ifdef LIRC_IT87_DIGIMATRIX +MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)"); +#else +MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)"); +#endif + +module_param(it87_enable_demodulator, bool, S_IRUGO); +MODULE_PARM_DESC(it87_enable_demodulator, + "Receiver demodulator enable/disable (1/0), default: 0"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +module_param(digimatrix, bool, S_IRUGO | S_IWUSR); +#ifdef LIRC_IT87_DIGIMATRIX +MODULE_PARM_DESC(digimatrix, + "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1"); +#else +MODULE_PARM_DESC(digimatrix, + "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0"); +#endif + + +module_param(it87_freq, int, S_IRUGO); +#ifdef LIRC_IT87_DIGIMATRIX +MODULE_PARM_DESC(it87_freq, + "Carrier demodulator frequency (kHz), (default: 36)"); +#else +MODULE_PARM_DESC(it87_freq, + "Carrier demodulator frequency (kHz), (default: 38)"); +#endif +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_it87/README +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_it87/README @@ -0,0 +1,46 @@ +This is the README using the ITE IT8705 and IT8712 CIR port for LIRC. + +The IT8705 for example can be found on the ECS K7S5A. + +The driver supports receiving (MODE2) and sending (PULSE). It seems +sending 'LIRC_CAN_SEND_PULSE' isn't optimal for this type of hardware. +But because I don't know how to implement 'LIRC_CAN_SEND_CODE', I did +it this way. + +Attention: +Because of missing hardware, the following hasn't been tested: +a) receiving with demodulator enabled, +b) sending (debugging output looks good) and +c) using IT8712 + +Any help and/or additions etc. is welcome. + +lirc_it87 knows about the following module-parameters: +MODULE_DESCRIPTION("LIRC driver for ITE IT8712/IT8705 CIR port"); +MODULE_PARM(io, "i"); +MODULE_PARM_DESC(io, "I/O base address (default: 0x310)"); +MODULE_PARM(irq, "i"); +MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)"); +MODULE_PARM(it87_enable_demodulator, "i"); +MODULE_PARM_DESC(it87_enable_demodulator, "Receiver demodulator + enable/disable (1/0), default: 0"); + + +Usage: + +a) io and irq: + +If the driver finds the IT8705/12-CIR port initialized, io and irq of +the preinitialized hardware is used by the driver. If both values are +read 0x0 from the hardware, the default or given value is used. +Note: I experienced using irq=3. The driver initialized without any +problems, but no irqs are recognized by the system. I had to switch +back to default, irq 7. + +b) it87_enable_demodulator: + +The demodulator for the receiver can be switched off (default within +the driver). If you need the demodulator simple enable it by the +following way: it87_enable_demodulator=1. + +Hans-Günter Lütke Uphues --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_it87/TODO +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_it87/TODO @@ -0,0 +1,5 @@ +This is my todo-list for lirc_it87: + +1. enabling/using shared IRQ +2. init/drop IRQ-usage in lirc_open/lirc_close + --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ite8709/lirc_ite8709.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ite8709/lirc_ite8709.c @@ -0,0 +1,552 @@ +/* + * LIRC driver for ITE8709 CIR port + * + * Copyright (C) 2008 Grégory Lardière + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ + +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +#include +#else +#include +#endif + +#include "../lirc.h" +#include "../lirc_dev/lirc_dev.h" +#include "../kcompat.h" + +#define LIRC_DRIVER_NAME "lirc_ite8709" + +#define BUF_CHUNK_SIZE sizeof(lirc_t) +#define BUF_SIZE (128*BUF_CHUNK_SIZE) + +/* + * The ITE8709 device seems to be the combination of IT8512 superIO chip and + * a specific firmware running on the IT8512's embedded micro-controller. + * In addition of the embedded micro-controller, the IT8512 chip contains a + * CIR module and several other modules. A few modules are directly accessible + * by the host CPU, but most of them are only accessible by the + * micro-controller. The CIR module is only accessible by the micro-controller. + * The battery-backed SRAM module is accessible by the host CPU and the + * micro-controller. So one of the MC's firmware role is to act as a bridge + * between the host CPU and the CIR module. The firmware implements a kind of + * communication protocol using the SRAM module as a shared memory. The IT8512 + * specification is publicly available on ITE's web site, but the communication + * protocol is not, so it was reverse-engineered. + */ + +/* ITE8709 Registers addresses and values (reverse-engineered) */ +#define ITE8709_MODE 0x1a +#define ITE8709_REG_ADR 0x1b +#define ITE8709_REG_VAL 0x1c +#define ITE8709_IIR 0x1e /* Interrupt identification register */ +#define ITE8709_RFSR 0x1f /* Receiver FIFO status register */ +#define ITE8709_FIFO_START 0x20 + +#define ITE8709_MODE_READY 0X00 +#define ITE8709_MODE_WRITE 0X01 +#define ITE8709_MODE_READ 0X02 +#define ITE8709_IIR_RDAI 0x02 /* Receiver data available interrupt */ +#define ITE8709_IIR_RFOI 0x04 /* Receiver FIFO overrun interrupt */ +#define ITE8709_RFSR_MASK 0x3f /* FIFO byte count mask */ + +/* + * IT8512 CIR-module registers addresses and values + * (from IT8512 E/F specification v0.4.1) + */ +#define IT8512_REG_MSTCR 0x01 /* Master control register */ +#define IT8512_REG_IER 0x02 /* Interrupt enable register */ +#define IT8512_REG_CFR 0x04 /* Carrier frequency register */ +#define IT8512_REG_RCR 0x05 /* Receive control register */ +#define IT8512_REG_BDLR 0x08 /* Baud rate divisor low byte register */ +#define IT8512_REG_BDHR 0x09 /* Baud rate divisor high byte register */ + +#define IT8512_MSTCR_RESET 0x01 /* Reset registers to default value */ +#define IT8512_MSTCR_FIFOCLR 0x02 /* Clear FIFO */ +#define IT8512_MSTCR_FIFOTL_7 0x04 /* FIFO threshold level : 7 */ +#define IT8512_MSTCR_FIFOTL_25 0x0c /* FIFO threshold level : 25 */ +#define IT8512_IER_RDAIE 0x02 /* Enable data interrupt request */ +#define IT8512_IER_RFOIE 0x04 /* Enable FIFO overrun interrupt req */ +#define IT8512_IER_IEC 0x80 /* Enable interrupt request */ +#define IT8512_CFR_CF_36KHZ 0x09 /* Carrier freq : low speed, 36kHz */ +#define IT8512_RCR_RXDCR_1 0x01 /* Demodulation carrier range : 1 */ +#define IT8512_RCR_RXACT 0x08 /* Receiver active */ +#define IT8512_RCR_RXEN 0x80 /* Receiver enable */ +#define IT8512_BDR_6 6 /* Baud rate divisor : 6 */ + +/* Actual values used by this driver */ +#define CFG_FIFOTL IT8512_MSTCR_FIFOTL_25 +#define CFG_CR_FREQ IT8512_CFR_CF_36KHZ +#define CFG_DCR IT8512_RCR_RXDCR_1 +#define CFG_BDR IT8512_BDR_6 +#define CFG_TIMEOUT 100000 /* Rearm interrupt when a space is > 100 ms */ + +static int debug; + +struct ite8709_device { + int use_count; + int io; + int irq; + spinlock_t hardware_lock; + unsigned long long acc_pulse; + unsigned long long acc_space; + char lastbit; + struct timeval last_tv; + struct lirc_driver driver; + struct lirc_buffer buffer; + struct tasklet_struct tasklet; + char force_rearm; + char rearmed; + char device_busy; +}; + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + + +static unsigned char ite8709_read(struct ite8709_device *dev, + unsigned char port) +{ + outb(port, dev->io); + return inb(dev->io+1); +} + +static void ite8709_write(struct ite8709_device *dev, unsigned char port, + unsigned char data) +{ + outb(port, dev->io); + outb(data, dev->io+1); +} + +static void ite8709_wait_device(struct ite8709_device *dev) +{ + int i = 0; + /* + * loop until device tells it's ready to continue + * iterations count is usually ~750 but can sometimes achieve 13000 + */ + for (i = 0; i < 15000; i++) { + udelay(2); + if (ite8709_read(dev, ITE8709_MODE) == ITE8709_MODE_READY) + break; + } +} + +static void ite8709_write_register(struct ite8709_device *dev, + unsigned char reg_adr, unsigned char reg_value) +{ + ite8709_wait_device(dev); + + ite8709_write(dev, ITE8709_REG_VAL, reg_value); + ite8709_write(dev, ITE8709_REG_ADR, reg_adr); + ite8709_write(dev, ITE8709_MODE, ITE8709_MODE_WRITE); +} + +static void ite8709_init_hardware(struct ite8709_device *dev) +{ + spin_lock_irq(&dev->hardware_lock); + dev->device_busy = 1; + spin_unlock_irq(&dev->hardware_lock); + + ite8709_write_register(dev, IT8512_REG_BDHR, (CFG_BDR >> 8) & 0xff); + ite8709_write_register(dev, IT8512_REG_BDLR, CFG_BDR & 0xff); + ite8709_write_register(dev, IT8512_REG_CFR, CFG_CR_FREQ); + ite8709_write_register(dev, IT8512_REG_IER, + IT8512_IER_IEC | IT8512_IER_RFOIE | IT8512_IER_RDAIE); + ite8709_write_register(dev, IT8512_REG_RCR, CFG_DCR); + ite8709_write_register(dev, IT8512_REG_MSTCR, + CFG_FIFOTL | IT8512_MSTCR_FIFOCLR); + ite8709_write_register(dev, IT8512_REG_RCR, + IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR); + + spin_lock_irq(&dev->hardware_lock); + dev->device_busy = 0; + spin_unlock_irq(&dev->hardware_lock); + + tasklet_enable(&dev->tasklet); +} + +static void ite8709_drop_hardware(struct ite8709_device *dev) +{ + tasklet_disable(&dev->tasklet); + + spin_lock_irq(&dev->hardware_lock); + dev->device_busy = 1; + spin_unlock_irq(&dev->hardware_lock); + + ite8709_write_register(dev, IT8512_REG_RCR, 0); + ite8709_write_register(dev, IT8512_REG_MSTCR, + IT8512_MSTCR_RESET | IT8512_MSTCR_FIFOCLR); + + spin_lock_irq(&dev->hardware_lock); + dev->device_busy = 0; + spin_unlock_irq(&dev->hardware_lock); +} + +static int ite8709_set_use_inc(void *data) +{ + struct ite8709_device *dev; + MOD_INC_USE_COUNT; + dev = data; + if (dev->use_count == 0) + ite8709_init_hardware(dev); + dev->use_count++; + return 0; +} + +static void ite8709_set_use_dec(void *data) +{ + struct ite8709_device *dev; + MOD_DEC_USE_COUNT; + dev = data; + dev->use_count--; + if (dev->use_count == 0) + ite8709_drop_hardware(dev); +} + +static void ite8709_add_read_queue(struct ite8709_device *dev, int flag, + unsigned long long val) +{ + lirc_t value; + + dprintk("add a %llu usec %s\n", val, flag ? "pulse" : "space"); + + value = (val > PULSE_MASK) ? PULSE_MASK : val; + if (flag) + value |= PULSE_BIT; + + if (!lirc_buffer_full(&dev->buffer)) { + lirc_buffer_write(&dev->buffer, (void *) &value); + wake_up(&dev->buffer.wait_poll); + } +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static irqreturn_t ite8709_interrupt(int irq, void *dev_id, + struct pt_regs *regs) +#else +static irqreturn_t ite8709_interrupt(int irq, void *dev_id) +#endif +{ + unsigned char data; + int iir, rfsr, i; + int fifo = 0; + char bit; + struct timeval curr_tv; + + /* Bit duration in microseconds */ + const unsigned long bit_duration = 1000000ul / (115200 / CFG_BDR); + + struct ite8709_device *dev; + dev = dev_id; + + /* + * If device is busy, we simply discard data because we are in one of + * these two cases : shutting down or rearming the device, so this + * doesn't really matter and this avoids waiting too long in IRQ ctx + */ + spin_lock(&dev->hardware_lock); + if (dev->device_busy) { + spin_unlock(&dev->hardware_lock); + return IRQ_RETVAL(IRQ_HANDLED); + } + + iir = ite8709_read(dev, ITE8709_IIR); + + switch (iir) { + case ITE8709_IIR_RFOI: + dprintk("fifo overrun, scheduling forced rearm just in case\n"); + dev->force_rearm = 1; + tasklet_schedule(&dev->tasklet); + spin_unlock(&dev->hardware_lock); + return IRQ_RETVAL(IRQ_HANDLED); + + case ITE8709_IIR_RDAI: + rfsr = ite8709_read(dev, ITE8709_RFSR); + fifo = rfsr & ITE8709_RFSR_MASK; + if (fifo > 32) + fifo = 32; + dprintk("iir: 0x%x rfsr: 0x%x fifo: %d\n", iir, rfsr, fifo); + + if (dev->rearmed) { + do_gettimeofday(&curr_tv); + dev->acc_space += 1000000ull + * (curr_tv.tv_sec - dev->last_tv.tv_sec) + + (curr_tv.tv_usec - dev->last_tv.tv_usec); + dev->rearmed = 0; + } + for (i = 0; i < fifo; i++) { + data = ite8709_read(dev, i+ITE8709_FIFO_START); + data = ~data; + /* Loop through */ + for (bit = 0; bit < 8; ++bit) { + if ((data >> bit) & 1) { + dev->acc_pulse += bit_duration; + if (dev->lastbit == 0) { + ite8709_add_read_queue(dev, 0, + dev->acc_space); + dev->acc_space = 0; + } + } else { + dev->acc_space += bit_duration; + if (dev->lastbit == 1) { + ite8709_add_read_queue(dev, 1, + dev->acc_pulse); + dev->acc_pulse = 0; + } + } + dev->lastbit = (data >> bit) & 1; + } + } + ite8709_write(dev, ITE8709_RFSR, 0); + + if (dev->acc_space > CFG_TIMEOUT) { + dprintk("scheduling rearm IRQ\n"); + do_gettimeofday(&dev->last_tv); + dev->force_rearm = 0; + tasklet_schedule(&dev->tasklet); + } + + spin_unlock(&dev->hardware_lock); + return IRQ_RETVAL(IRQ_HANDLED); + + default: + /* not our irq */ + dprintk("unknown IRQ (shouldn't happen) !!\n"); + spin_unlock(&dev->hardware_lock); + return IRQ_RETVAL(IRQ_NONE); + } +} + +static void ite8709_rearm_irq(unsigned long data) +{ + struct ite8709_device *dev; + unsigned long flags; + dev = (struct ite8709_device *) data; + + spin_lock_irqsave(&dev->hardware_lock, flags); + dev->device_busy = 1; + spin_unlock_irqrestore(&dev->hardware_lock, flags); + + if (dev->force_rearm || dev->acc_space > CFG_TIMEOUT) { + dprintk("rearming IRQ\n"); + ite8709_write_register(dev, IT8512_REG_RCR, + IT8512_RCR_RXACT | CFG_DCR); + ite8709_write_register(dev, IT8512_REG_MSTCR, + CFG_FIFOTL | IT8512_MSTCR_FIFOCLR); + ite8709_write_register(dev, IT8512_REG_RCR, + IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR); + if (!dev->force_rearm) + dev->rearmed = 1; + dev->force_rearm = 0; + } + + spin_lock_irqsave(&dev->hardware_lock, flags); + dev->device_busy = 0; + spin_unlock_irqrestore(&dev->hardware_lock, flags); +} + +static int ite8709_cleanup(struct ite8709_device *dev, int stage, int errno, + char *msg) +{ + if (msg != NULL) + printk(KERN_ERR LIRC_DRIVER_NAME ": %s\n", msg); + + switch (stage) { + case 6: + if (dev->use_count > 0) + ite8709_drop_hardware(dev); + case 5: + free_irq(dev->irq, dev); + case 4: + release_region(dev->io, 2); + case 3: + lirc_unregister_driver(dev->driver.minor); + case 2: + lirc_buffer_free(dev->driver.rbuf); + case 1: + kfree(dev); + case 0: + ; + } + + return errno; +} + +static int __devinit ite8709_pnp_probe(struct pnp_dev *dev, + const struct pnp_device_id *dev_id) +{ + struct lirc_driver *driver; + struct ite8709_device *ite8709_dev; + int ret; + + /* Check resources validity */ + if (!pnp_irq_valid(dev, 0)) + return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IRQ"); + if (!pnp_port_valid(dev, 2)) + return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IO port"); + + /* Allocate memory for device struct */ + ite8709_dev = kzalloc(sizeof(struct ite8709_device), GFP_KERNEL); + if (ite8709_dev == NULL) + return ite8709_cleanup(NULL, 0, -ENOMEM, "kzalloc failed"); + pnp_set_drvdata(dev, ite8709_dev); + + /* Initialize device struct */ + ite8709_dev->use_count = 0; + ite8709_dev->irq = pnp_irq(dev, 0); + ite8709_dev->io = pnp_port_start(dev, 2); + ite8709_dev->hardware_lock = __SPIN_LOCK_UNLOCKED( + ite8709_dev->hardware_lock); + ite8709_dev->acc_pulse = 0; + ite8709_dev->acc_space = 0; + ite8709_dev->lastbit = 0; + do_gettimeofday(&ite8709_dev->last_tv); + tasklet_init(&ite8709_dev->tasklet, ite8709_rearm_irq, + (long) ite8709_dev); + ite8709_dev->force_rearm = 0; + ite8709_dev->rearmed = 0; + ite8709_dev->device_busy = 0; + + /* Initialize driver struct */ + driver = &ite8709_dev->driver; + strcpy(driver->name, LIRC_DRIVER_NAME); + driver->minor = -1; + driver->code_length = sizeof(lirc_t) * 8; + driver->sample_rate = 0; + driver->features = LIRC_CAN_REC_MODE2; + driver->data = ite8709_dev; + driver->add_to_buf = NULL; +#ifndef LIRC_REMOVE_DURING_EXPORT + driver->get_queue = NULL; +#endif + driver->rbuf = &ite8709_dev->buffer; + driver->set_use_inc = ite8709_set_use_inc; + driver->set_use_dec = ite8709_set_use_dec; + driver->fops = NULL; + driver->dev = &dev->dev; + driver->owner = THIS_MODULE; + + /* Initialize LIRC buffer */ + if (lirc_buffer_init(driver->rbuf, BUF_CHUNK_SIZE, BUF_SIZE)) + return ite8709_cleanup(ite8709_dev, 1, -ENOMEM, + "lirc_buffer_init() failed"); + + /* Register LIRC driver */ + ret = lirc_register_driver(driver); + if (ret < 0) + return ite8709_cleanup(ite8709_dev, 2, ret, + "lirc_register_driver() failed"); + + /* Reserve I/O port access */ + if (!request_region(ite8709_dev->io, 2, LIRC_DRIVER_NAME)) + return ite8709_cleanup(ite8709_dev, 3, -EBUSY, + "i/o port already in use"); + + /* Reserve IRQ line */ + ret = request_irq(ite8709_dev->irq, ite8709_interrupt, 0, + LIRC_DRIVER_NAME, ite8709_dev); + if (ret < 0) + return ite8709_cleanup(ite8709_dev, 4, ret, + "IRQ already in use"); + + /* Initialize hardware */ + ite8709_drop_hardware(ite8709_dev); /* Shutdown hw until first use */ + + printk(KERN_INFO LIRC_DRIVER_NAME ": device found : irq=%d io=0x%x\n", + ite8709_dev->irq, ite8709_dev->io); + + return 0; +} + +static void __devexit ite8709_pnp_remove(struct pnp_dev *dev) +{ + struct ite8709_device *ite8709_dev; + ite8709_dev = pnp_get_drvdata(dev); + + ite8709_cleanup(ite8709_dev, 6, 0, NULL); + + printk(KERN_INFO LIRC_DRIVER_NAME ": device removed\n"); +} + +#ifdef CONFIG_PM +static int ite8709_pnp_suspend(struct pnp_dev *dev, pm_message_t state) +{ + struct ite8709_device *ite8709_dev; + ite8709_dev = pnp_get_drvdata(dev); + + if (ite8709_dev->use_count > 0) + ite8709_drop_hardware(ite8709_dev); + + return 0; +} + +static int ite8709_pnp_resume(struct pnp_dev *dev) +{ + struct ite8709_device *ite8709_dev; + ite8709_dev = pnp_get_drvdata(dev); + + if (ite8709_dev->use_count > 0) + ite8709_init_hardware(ite8709_dev); + + return 0; +} +#else +#define ite8709_pnp_suspend NULL +#define ite8709_pnp_resume NULL +#endif + +static const struct pnp_device_id pnp_dev_table[] = { + {"ITE8709", 0}, + {} +}; + +MODULE_DEVICE_TABLE(pnp, pnp_dev_table); + +static struct pnp_driver ite8709_pnp_driver = { + .name = LIRC_DRIVER_NAME, + .probe = ite8709_pnp_probe, + .remove = __devexit_p(ite8709_pnp_remove), + .suspend = ite8709_pnp_suspend, + .resume = ite8709_pnp_resume, + .id_table = pnp_dev_table, +}; + +int init_module(void) +{ + return pnp_register_driver(&ite8709_pnp_driver); +} + +void cleanup_module(void) +{ + pnp_unregister_driver(&ite8709_pnp_driver); +} + +MODULE_DESCRIPTION("LIRC driver for ITE8709 CIR port"); +MODULE_AUTHOR("Grégory Lardière"); +MODULE_LICENSE("GPL"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); +EXPORT_NO_SYMBOLS; --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_ite8709/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_ite8709/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_ITE8709) += lirc_ite8709.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.c @@ -0,0 +1,1179 @@ +/* $Id: lirc_wpc8769l.c,v 1.8 2009/03/15 09:34:01 lirc Exp $ */ + +/**************************************************************************** + ** lirc_wpc8769l.c **************************************************** + **************************************************************************** + * + * lirc_wpc8769l - Device driver for the integrated CIR receiver found in + * Acer Aspire 6530G (and probably other models), based on + * the Winbond 8769L embedded controller. + * (Written using the lirc_serial driver as a guide). + * + * Copyright (C) 2008, 2009 Juan J. Garcia de Soria + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18) +#error "**********************************************************" +#error " Sorry, this driver needs kernel version 2.2.18 or higher " +#error "**********************************************************" +#endif + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) +#include +#else +#include +#endif +#include + +#include + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) +#include +#endif + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#include "lirc_wpc8769l.h" + +/* Name of the lirc device. */ +#define LIRC_DRIVER_NAME "lirc_wpc8769l" + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +#define wprintk(fmt, args...) \ + do { \ + printk(KERN_WARN LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +#define eprintk(fmt, args...) \ + do { \ + printk(KERN_ERR LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +#define iprintk(fmt, args...) \ + do { \ + printk(KERN_INFO LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +/* Number of driver->lirc-dev buffer elements. */ +#define RBUF_LEN 256 + +/* Number of 0xff bytes received in a row. */ +static unsigned int wpc8769l_ff_bytes_in_a_row; + +/* Hardware resource parameters. */ +static unsigned int baseport1; +static unsigned int baseport2; +static unsigned int irq; + +/* Debugging flag. */ +static int debug; + +/* If true, we skip ACPI autodetection and use the parameter-supplied I/O and + * IRQ. */ +static int skip_probe; + +/* Whether the device is open or not. */ +static int lirc_wpc8769l_is_open; + +/* Code disabled since it didn't seem to work with the test hardware. */ +/*#define LIRC_WPC8769L_WAKEUP*/ +#ifdef LIRC_WPC8769L_WAKEUP +/* These parameters are taken from the driver for MS Windows Vista. + * The specific values used for your hardware may be found at this registry + * key: + * + * HKEY_LOCAL_MACHINE/CurrentControlSet/Services/Winbond CIR/PowerKey + */ +static int protocol_select = 2; +static int max_info_bits = 24; +static unsigned int rc_wakeup_code = 0x7ffffbf3; +static unsigned int rc_wakeup_mask = 0xff000fff; +#endif + +/* Resource allocation pointers. */ +static struct resource *wpc8769l_portblock1_resource; +static struct resource *wpc8769l_portblock2_resource; + +/* Hardware related spinlock. */ +static DEFINE_SPINLOCK(wpc8769l_hw_spinlock); + +/* The buffer for ISR to bottom half data transfer. */ +static struct lirc_buffer rbuf; + +/* Bit-to-MODE2 coalescing helper variables. */ +static int last_was_pulse; +static lirc_t last_counter; + +/* Microseconds after a timeout-triggered pulse. */ +static s64 lastus; + +/* Microseconds when the timer was started. */ +static s64 timerstartus; + +/* Put another pulse/space to the queue, checking for overruns. */ +static void put_item(lirc_t data) +{ + if (lirc_buffer_full(&rbuf)) { + if (printk_ratelimit()) + eprintk("RX buffer overrun.\n"); + return; + } + lirc_buffer_write(&rbuf, (void *) &data); +} + +/* Put any accumulated pulse/space to userspace. */ +static void put_span(void) +{ + lirc_t data; + if (last_counter) { + /* Take the usecs length. */ + data = last_counter; + + /* Mark pulse or space. */ + if (last_was_pulse) + data |= PULSE_BIT; + + /* Put the span to the buffer. */ + put_item(data); + + /* Reset counter, in order to avoid emitting duplicate data. */ + last_counter = 0; + } +} + +/* Aggregate pulse time. */ +static void put_pulse_bit(lirc_t n) +{ + if (last_was_pulse) { + last_counter += n; + if (last_counter > PULSE_MASK) + last_counter = PULSE_MASK; + } else { + put_span(); + last_was_pulse = 1; + last_counter = n; + if (last_counter > PULSE_MASK) + last_counter = PULSE_MASK; + } +} + +/* Aggregate space time. */ +static void put_space_bit(lirc_t n) +{ + if (!last_was_pulse) { + last_counter += n; + if (last_counter > PULSE_MASK) + last_counter = PULSE_MASK; + } else { + put_span(); + last_was_pulse = 0; + last_counter = n; + if (last_counter > PULSE_MASK) + last_counter = PULSE_MASK; + } +} + +/* Timeout function for last pulse part. */ +static void wpc8769l_last_timeout(unsigned long l) +{ + struct timeval currenttv; + + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + /* Mark the time at which we inserted the timeout span. */ + do_gettimeofday(¤ttv); + lastus = ((s64) currenttv.tv_sec) * 1000000ll + currenttv.tv_usec; + + /* Emit the timeout as a space. */ + put_space_bit(lastus - timerstartus); + + /* Signal the bottom half wait queue + * that there's data available. */ + wake_up_interruptible(&rbuf.wait_poll); + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); +} + +/* Timer for end-of-code pulse timeout. */ +static struct timer_list last_span_timer = + TIMER_INITIALIZER(wpc8769l_last_timeout, 0, 0); + +/* Interrupt handler, doing the bit sample to mode2 conversion. + * Perhaps this work should be taken outside of the ISR... */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) +static irqreturn_t irq_handler(int irqno, void *blah) +#else +static irqreturn_t irq_handler(int irqno, void *blah, struct pt_regs *regs) +#endif +{ + unsigned int data; + int handled = 0; + int count, more; + struct timeval currenttv; + s64 currentus, span; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + unsigned char data_buf[WPC8769L_BYTE_BUFFER_SIZE]; + unsigned char *data_ptr; + unsigned long *ldata; + unsigned int next_one, next_zero, size; +#else + unsigned int mask; +#endif + + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + /* Check whether there's any data available. */ + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + WPC8769L_DATA_STATUS_REG); + + if (data & WPC8769L_DATA_READY_MASK) { + /* Get current timestamp. */ + do_gettimeofday(¤ttv); + currentus = ((s64) currenttv.tv_sec) * 1000000ll + + currenttv.tv_usec; + + /* If we had a timeout before we might need to fill + * in additional space time. */ + if (lastus) { + /* Calculate the difference, compensating + * the time for the data successfully + * received (estimated to be + * WPC8769L_BYTES_PER_BURST bytes). */ + span = currentus - lastus + - WPC8769L_BYTES_PER_BURST + * WPC8769L_USECS_PER_BYTE; + + /* Only insert positive spans. */ + if (span > 0) { + /* Emit the extended gap as a space. */ + put_space_bit(span); + } + + /* Mark that we had the last timeout into account. */ + lastus = 0; + } + + count = 0; + more = 1; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + data_ptr = data_buf; +#endif + do { + /* Read the next byte of data. */ + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + WPC8769L_DATA_REG); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + *data_ptr++ = data; +#else + for (mask = 0x01 ; mask < 0x100; mask <<= 1) { + if (data & mask) + put_space_bit(WPC8769L_USECS_PER_BIT); + else + put_pulse_bit(WPC8769L_USECS_PER_BIT); + } +#endif + + /* Check for 0xff in a row. */ + if (data == 0xff) + wpc8769l_ff_bytes_in_a_row++; + else + wpc8769l_ff_bytes_in_a_row = 0; + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + WPC8769L_DATA_ACK_REG); + if (data & WPC8769L_DATA_ACK_REG) { + outb(WPC8769L_BANK_E0, + baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + + WPC8769L_REMAINING_RX_DATA_REG); + if (!data) + more = 0; + } else + more = 0; + + count++; + } while (more && count < WPC8769L_BYTES_PER_BURST); + + if (wpc8769l_ff_bytes_in_a_row + >= WPC8769L_FF_BYTES_BEFORE_RESET) { + + /* Put in another 0xff byte. */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + *data_ptr++ = 0xff; + count++; +#else + put_space_bit(8 * WPC8769L_USECS_PER_BIT); +#endif + + /* Reset the hardware in the case of too many + * 0xff bytes in a row. */ + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_TIMEOUT_RESET_MASK, + baseport1 + WPC8769L_TIMEOUT_RESET_REG); + } + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25) + /* Emit the data. */ + size = count << 3; + + ldata = (unsigned long *) data_buf; + next_one = generic_find_next_le_bit(ldata, size, 0); + + if (next_one > 0) + put_pulse_bit(next_one + * WPC8769L_USECS_PER_BIT); + + while (next_one < size) { + next_zero = generic_find_next_zero_le_bit(ldata, + size, next_one + 1); + + put_space_bit( + (next_zero - next_one) + * WPC8769L_USECS_PER_BIT); + + if (next_zero < size) { + next_one = generic_find_next_le_bit(ldata, + size, next_zero + 1); + + put_pulse_bit( + (next_one - next_zero) + * WPC8769L_USECS_PER_BIT); + } else { + next_one = size; + } + } +#endif + + /* Mark the IRQ as handled. */ + handled = 1; + + /* Signal the bottom half wait queue + * that there's data available. */ + wake_up_interruptible(&rbuf.wait_poll); + + /* Set up timeout handling. */ + mod_timer(&last_span_timer, + jiffies + WPC8769L_LAST_TIMEOUT_JIFFIES); + + /* Set up last timer us mark. */ + timerstartus = currentus; + } + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); + return IRQ_RETVAL(handled); +} + +/* Prepare the hardware on module load. */ +static void wpc8769l_prepare_hardware(void) +{ + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + /* I don't know why this needs reading. */ + outb(WPC8769L_BANK_E4, baseport1 + WPC8769L_SELECT_REG); + inb(baseport1 + WPC8769L_READ_ON_STARTUP_REG); + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); +} + + +/* Wake up device from power down and check whether it was the + * device that woke us up. + */ +static int wpc8769l_power_up_and_check_if_we_woke_us_up(void) +{ + unsigned int data; + int res; + + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + if (baseport2) { + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + res = inb(baseport2 + WPC8769L_WAKEUP_STATUS_REG) + & WPC8769L_WAKEUP_WOKE_UP_MASK; + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + outb(WPC8769L_WAKEUP_WOKE_UP_MASK, + baseport2 + WPC8769L_WAKEUP_STATUS_REG); + + outb(WPC8769L_WAKEUP_ACK_MASK, + baseport2 + WPC8769L_WAKEUP_ACK_REG); + } else { + outb(WPC8769L_BANK_F0, baseport1 + WPC8769L_SELECT_REG); + res = (inb(baseport1 + WPC8769L_WAKEUP_STATUS_LEG_REG) + & WPC8769L_WAKEUP_STATUS_LEG_MASK) ? 1 : 0; + } + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); + + return res; +} + +/* Disable interrupts from device. */ +static void wpc8769l_disable_interrupts(void) +{ + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_INTERRUPT_REG) + & ~WPC8769L_INTERRUPT_1_MASK, + baseport1 + WPC8769L_INTERRUPT_REG); + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_INTERRUPT_REG) + & ~WPC8769L_INTERRUPT_1_MASK, + baseport1 + WPC8769L_INTERRUPT_REG); + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); +} + +#ifdef LIRC_WPC8769L_WAKEUP +/* Expand value nibble for configuration of wake up parameters. + * This seems to manchester-encode a nibble into a byte. */ +static unsigned int wpc8769l_expand_value_nibble(unsigned int nibble) +{ + int i; + unsigned int tmp, tmp2, res; + + res = 0; + + for (i = 0; i < 4; i += 2) { + tmp = (nibble >> i) & 0x3; + switch (tmp) { + case 3: + tmp2 = 5; + break; + case 2: + tmp2 = 6; + break; + case 1: + tmp2 = 9; + break; + case 0: + tmp2 = 0x0a; + break; + default: + return 0; + break; + } + res |= ((tmp2 << i) << i); + } + + return res; +} + +/* Expand mask nibble for configuration of wake up parameters. */ +static unsigned int wpc8769l_expand_mask_nibble(unsigned int nibble) +{ + int i; + unsigned int tmp, tmp2, res; + + res = 0; + + for (i = 0; i < 4; i += 2) { + tmp = (nibble >> i) & 0x3; + switch (tmp) { + case 0: + tmp2 = 0; + break; + case 1: + tmp2 = 3; + break; + case 2: + tmp2 = 0x0c; + break; + case 3: + tmp2 = 0x0f; + break; + default: + return 0; + break; + } + res |= ((tmp2 << i) << i); + } + + return res; +} + +/* Configure wake up triggers for the hardware that supports it. + * THE CALLER MUST HAVE ACQUIRED wpc8769l_hw_spinlock BEFORE CALLING. + */ +static void wpc8769l_configure_wakeup_triggers(void) +{ + unsigned int x; + unsigned int data, data2; + + int i, j; + + x = inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG) + & WPC8769L_WAKEUP_ENABLE_MASK; + outb(inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG) + & ~WPC8769L_WAKEUP_ENABLE_MASK, + baseport2 + WPC8769L_WAKEUP_ENABLE_REG); + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + outb(WPC8769L_WAKEUP_CONFIGURING_MASK, + baseport2 + WPC8769L_WAKEUP_STATUS_REG); + outb(WPC8769L_WAKEUP_ACK_MASK, + baseport2 + WPC8769L_WAKEUP_ACK_REG); + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data = inb(baseport2 + WPC8769L_WAKEUP_CONFIG_REG); + data &= WPC8769L_WAKEUP_CONFIG_PRE_MASK; + data |= (max_info_bits + WPC8769L_MAX_INFO_BITS_BIAS) + << WPC8769L_MAX_INFO_BITS_SHIFT; + outb(data, baseport2 + WPC8769L_WAKEUP_CONFIG_REG); + + i = j = 0; + + /* Program values. */ + while (j < WPC8769L_WAKEUP_DATA_BITS) { + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + outb(i + WPC8769L_WAKEUP_DATA_BASE, + baseport2 + WPC8769L_WAKEUP_DATA_PTR_REG); + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data = (rc_wakeup_code >> j) & 0x0f; + data = wpc8769l_expand_value_nibble(data); + outb(data, baseport2 + WPC8769L_WAKEUP_DATA_REG); + + i++; + j += 4; + } + + /* Program masks. */ + while (j < WPC8769L_WAKEUP_DATA_BITS) { + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + outb(i + WPC8769L_WAKEUP_MASK_BASE, + baseport2 + WPC8769L_WAKEUP_DATA_PTR_REG); + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data = (rc_wakeup_mask >> j) & 0x0f; + data = wpc8769l_expand_mask_nibble(data); + outb(data, baseport2 + WPC8769L_WAKEUP_DATA_REG); + + i++; + j += 4; + } + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data2 = inb(baseport2 + WPC8769L_WAKEUP_CONFIG2_REG); + data2 &= WPC8769L_WAKEUP_CONFIG2_AND_MASK; + data2 |= WPC8769L_WAKEUP_CONFIG2_OR_MASK; + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + outb(data2, baseport2 + WPC8769L_WAKEUP_CONFIG2_REG); + + if (x != WPC8769L_WAKEUP_ENABLE_MASK) + outb(inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG) + | WPC8769L_WAKEUP_ENABLE_MASK, + baseport2 + WPC8769L_WAKEUP_ENABLE_REG); +} +#endif + +/* Enable interrupts from device. */ +static void wpc8769l_enable_interrupts(void) +{ + unsigned int data, data2, data_save; + + unsigned int a, b; + + unsigned long flags; + spin_lock_irqsave(&wpc8769l_hw_spinlock, flags); + + outb(WPC8769L_BANK_F0, baseport1 + WPC8769L_SELECT_REG); + data_save = inb(baseport1 + WPC8769L_WAKEUP_STATUS_LEG_REG); + + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(0, baseport1 + WPC8769L_HARDWARE_ENABLE1_REG); + + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_HARDWARE_ENABLE1_REG) + | WPC8769L_HARDWARE_ENABLE1_MASK, + baseport1 + WPC8769L_HARDWARE_ENABLE1_REG); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(0, baseport1 + WPC8769L_CONFIG_REG); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + WPC8769L_CONFIG_REG); + data &= ~WPC8769L_CONFIG_OFF_MASK; + data |= WPC8769L_CONFIG_ON_MASK; + outb(data, baseport1 + WPC8769L_CONFIG_REG); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_DATA_STATUS_MASK_1, baseport1 + WPC8769L_DATA_STATUS_REG); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_DATA_STATUS_MASK_2, baseport1 + WPC8769L_DATA_STATUS_REG); + + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_CONFIG2_REG) + & ~WPC8769L_CONFIG2_OFF_MASK, + baseport1 + WPC8769L_CONFIG2_REG); + + outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_CONFIG3_REG) + | WPC8769L_CONFIG3_ON_MASK, + baseport1 + WPC8769L_CONFIG3_REG); + + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + data = inb(baseport1 + WPC8769L_CONFIG4_REG); + data &= WPC8769L_CONFIG4_AND_MASK; + data |= WPC8769L_CONFIG4_ON_MASK; + + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + outb(data, baseport1 + WPC8769L_CONFIG4_REG); + + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_CONFIG5_REG) + | WPC8769L_CONFIG5_ON_MASK, + baseport1 + WPC8769L_CONFIG5_REG); + + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_CONFIG6_MASK, baseport1 + WPC8769L_CONFIG6_REG); + + outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG); + outb(0, baseport1 + WPC8769L_CONFIG7_REG); + + if (baseport2) { + /* + * This has to do with wake-up support, which is + * disabled when the second I/O range doesn't + * exist. + */ + /* -- internal subroutine -- */ + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data2 = inb(baseport2 + WPC8769L_WAKEUP_CONFIG3_REG); + a = (data2 >> WPC8769L_WAKEUP_CONFIG3_A_SHIFT) + & WPC8769L_WAKEUP_CONFIG3_A_MASK; + b = (data2 >> WPC8769L_WAKEUP_CONFIG3_B_SHIFT) + & WPC8769L_WAKEUP_CONFIG3_B_MASK; + + data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG); + data &= ~WPC8769L_CLOCK_OFF_MASK; + data |= WPC8769L_CLOCK_ON_MASK; + outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG); + + data2 &= ~WPC8769L_WAKEUP_CONFIG3_OFF_MASK; + data2 |= WPC8769L_WAKEUP_CONFIG3_ON_MASK; + outb(data2, baseport2 + WPC8769L_WAKEUP_CONFIG3_REG); + /* -- end internal subroutine -- */ + +#ifdef LIRC_WPC8769L_WAKEUP + /* Call for setting wake up filters */ + wpc8769l_configure_wakeup_triggers(); +#endif + } else { + /* No second port range. Take these defaults. */ + a = (data_save & WPC8769L_WAKEUP_STATUS_LEG_MASK_A) + ? 0 : 1; + b = (data_save & WPC8769L_WAKEUP_STATUS_LEG_MASK_B) + ? 1 : 0; + } + + outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG); + + data = inb(baseport1 + WPC8769L_CONFIG3_REG); + data = (a == 1) + ? (data & ~WPC8769L_CONFIG3_MASK_1) + : (data | WPC8769L_CONFIG3_MASK_1); + outb(data, baseport1 + WPC8769L_CONFIG3_REG); + + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG); + + data = inb(baseport1 + WPC8769L_CONFIG2_REG); + data = (b == 0) + ? (data & ~WPC8769L_CONFIG2_MASK_1) + : (data | WPC8769L_CONFIG2_MASK_1); + outb(data, baseport1 + WPC8769L_CONFIG2_REG); + + outb(0, baseport1 + WPC8769L_CONFIG8_REG); + + outb(0, baseport1 + WPC8769L_CONFIG9_REG); + + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG); + outb(inb(baseport1 + WPC8769L_INTERRUPT_REG) + | WPC8769L_INTERRUPT_1_MASK, + baseport1 + WPC8769L_INTERRUPT_REG); + + spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags); +} + +/* Called when the device is opened. */ +static int set_use_inc(void *data) +{ + int result; + + /* Reset pulse values. */ + last_was_pulse = 0; + last_counter = 0; + + /* Reset last timeout value. */ + lastus = 0; + + /* Init the read buffer. */ + if (lirc_buffer_init(&rbuf, sizeof(lirc_t), RBUF_LEN) < 0) + return -ENOMEM; + + /* Acquire the IRQ. */ + result = request_irq(irq, irq_handler, + IRQF_DISABLED | IRQF_SHARED, + LIRC_DRIVER_NAME, THIS_MODULE); + + switch (result) { + case -EBUSY: + eprintk("IRQ %d busy\n", irq); + lirc_buffer_free(&rbuf); + return -EBUSY; + case -EINVAL: + eprintk("Bad irq number or handler\n"); + lirc_buffer_free(&rbuf); + return -EINVAL; + default: + dprintk("IRQ %d obtained.\n", irq); + break; + }; + + /* Mark the device as open. */ + lirc_wpc8769l_is_open = 1; + + /* Enable hardware interrupts. */ + wpc8769l_enable_interrupts(); + + MOD_INC_USE_COUNT; + return 0; +} + +/* Called when the device is released. */ +static void set_use_dec(void *data) +{ + /* Mark the device as closed. */ + lirc_wpc8769l_is_open = 0; + + /* Cancel the timeout if pending. */ + del_timer_sync(&last_span_timer); + + /* Disable the hardware interrupts. */ + wpc8769l_disable_interrupts(); + + /* Free the IRQ. */ + free_irq(irq, THIS_MODULE); + dprintk("Freed IRQ %d\n", irq); + + /* Free the RX buffer. */ + lirc_buffer_free(&rbuf); + + MOD_DEC_USE_COUNT; +} + +static struct lirc_driver driver = { + .name = LIRC_DRIVER_NAME, + .minor = -1, + .code_length = 1, + .sample_rate = 0, + .data = NULL, + .add_to_buf = NULL, + .get_queue = NULL, + .rbuf = &rbuf, + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .fops = NULL, + .dev = NULL, + .owner = THIS_MODULE, +}; + +static acpi_status wec_parse_resources(struct acpi_resource *resource, + void *context) +{ + if (resource->type == ACPI_RESOURCE_TYPE_IO) { + /* Read the two I/O ranges. */ + if (!baseport1) + baseport1 = resource->data.io.minimum; + else if (!baseport2) + baseport2 = resource->data.io.minimum; + } else if (resource->type == ACPI_RESOURCE_TYPE_IRQ) { + /* Read the rx IRQ number. */ + if (!irq) + irq = resource->data.irq.interrupts[0]; + } + return AE_OK; +} + +static acpi_status wec_parse_device(acpi_handle handle, u32 level, + void *context, void **return_value) +{ + acpi_status status; + iprintk("Found %s device via ACPI.\n", WPC8769L_ACPI_HID); + + status = acpi_walk_resources(handle, METHOD_NAME__CRS, + wec_parse_resources, NULL); + if (ACPI_FAILURE(status)) + return status; + + return AE_OK; +} + +/* Find the device I/O ranges and IRQ number by searching for the + * CIR ACPI entry. */ +static int wpc8769l_acpi_detect(void) +{ + acpi_status status; + status = acpi_get_devices(WPC8769L_ACPI_HID, wec_parse_device, NULL, + NULL); + if (ACPI_FAILURE(status)) + return -ENOENT; + else + return 0; +} + +#ifdef MODULE +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) +static struct platform_device *lirc_wpc8769l_platform_dev; + +static int __devinit lirc_wpc8769l_probe(struct platform_device *dev) +{ + return 0; +} + +static int __devexit lirc_wpc8769l_remove(struct platform_device *dev) +{ + return 0; +} + +static int lirc_wpc8769l_suspend(struct platform_device *dev, + pm_message_t state) +{ + if (lirc_wpc8769l_is_open) + /* Disable all interrupts. */ + wpc8769l_disable_interrupts(); + return 0; +} + +static int lirc_wpc8769l_resume(struct platform_device *dev) +{ + if (lirc_wpc8769l_is_open) { + /* Check if we caused resuming; we still do nothing about it. */ + wpc8769l_power_up_and_check_if_we_woke_us_up(); + + /* Enable interrupts again. */ + wpc8769l_enable_interrupts(); + } + return 0; +} + +static struct platform_driver lirc_wpc8769l_platform_driver = { + .probe = lirc_wpc8769l_probe, + .remove = __devexit_p(lirc_wpc8769l_remove), + .suspend = lirc_wpc8769l_suspend, + .resume = lirc_wpc8769l_resume, + .driver = { + .name = LIRC_DRIVER_NAME, + .owner = THIS_MODULE, + }, +}; + +static int __init lirc_wpc8769l_platform_init(void) +{ + int result; + + result = platform_driver_register(&lirc_wpc8769l_platform_driver); + if (result) { + eprintk("Platform driver register returned %d.\n", result); + return result; + } + + lirc_wpc8769l_platform_dev = platform_device_alloc(LIRC_DRIVER_NAME, 0); + if (!lirc_wpc8769l_platform_dev) { + result = -ENOMEM; + goto exit_driver_unregister; + } + + result = platform_device_add(lirc_wpc8769l_platform_dev); + if (result) + goto exit_device_put; + + return 0; + +exit_device_put: + platform_device_put(lirc_wpc8769l_platform_dev); + +exit_driver_unregister: + platform_driver_unregister(&lirc_wpc8769l_platform_driver); + return result; +} + +static void __exit lirc_wpc8769l_platform_exit(void) +{ + platform_device_unregister(lirc_wpc8769l_platform_dev); + platform_driver_unregister(&lirc_wpc8769l_platform_driver); +} +#endif + +static int __init lirc_wpc8769l_module_init(void) +{ + int rc; + + /* If needed, read the resource information for the ACPI device + * description. */ + if (!skip_probe) { + rc = wpc8769l_acpi_detect(); + if (rc) { + eprintk("Error when looking for %s ACPI device.\n", + WPC8769L_ACPI_HID); + return rc; + } + } + + /* Check that we got some resource info to work with. */ + if (!baseport1 || !irq) { + rc = -ENODEV; + eprintk("Not all required resources found for %s device.\n", + LIRC_DRIVER_NAME); + return rc; + } + + dprintk("%s device found to use 0x%04x, 0x%04x I/O bases, IRQ #%d.\n", + LIRC_DRIVER_NAME, baseport1, baseport2, irq); + + /* Request the two I/O regions. */ + wpc8769l_portblock1_resource = request_region(baseport1, + WPC8769L_IO_REGION_1_SIZE, LIRC_DRIVER_NAME); + if (!wpc8769l_portblock1_resource) { + rc = -EBUSY; + eprintk("Could not allocate I/O range at 0x%04x", baseport1); + return rc; + } + if (baseport2) { + wpc8769l_portblock2_resource = request_region(baseport2, + WPC8769L_IO_REGION_2_SIZE, LIRC_DRIVER_NAME); + if (!wpc8769l_portblock2_resource) { + rc = -EBUSY; + printk(KERN_ERR "Could not allocate I/O range " + "at 0x%04x", + baseport2); + goto exit_release_region_1; + } + } + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + /* Register the platform driver and device. */ + rc = lirc_wpc8769l_platform_init(); + if (rc) + goto exit_release_region_2; +#endif + + /* Prepare the hardware. */ + wpc8769l_prepare_hardware(); + + /* Do load-time checks. */ + wpc8769l_power_up_and_check_if_we_woke_us_up(); + + /* Configure the driver hooks. */ + driver.features = LIRC_CAN_REC_MODE2; + driver.minor = lirc_register_driver(&driver); + if (driver.minor < 0) { + eprintk("lirc_register_driver failed!\n"); + rc = -EIO; + goto exit_platform_exit; + } + + iprintk("Driver loaded.\n"); + + return 0; /* Everything OK. */ + +exit_platform_exit: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + lirc_wpc8769l_platform_exit(); + +exit_release_region_2: +#endif + if (baseport2) + release_region(baseport2, WPC8769L_IO_REGION_2_SIZE); + +exit_release_region_1: + release_region(baseport1, WPC8769L_IO_REGION_1_SIZE); + + return rc; +} + +module_init(lirc_wpc8769l_module_init); + +static void __exit lirc_wpc8769l_module_exit(void) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + /* Unregister the platform driver and device. */ + lirc_wpc8769l_platform_exit(); +#endif + + /* Unregister the LIRC driver. */ + lirc_unregister_driver(driver.minor); + + /* Release the second range. */ + if (baseport2) + release_region(baseport2, WPC8769L_IO_REGION_2_SIZE); + + /* Release the first range. */ + release_region(baseport1, WPC8769L_IO_REGION_1_SIZE); + + iprintk("Driver unloaded.\n"); +} + +module_exit(lirc_wpc8769l_module_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Juan J. Garcia de Soria"); +MODULE_DESCRIPTION("Driver for the integrated Winbond WPC8769L-based IR\ + receiver found in Acer laptops."); +MODULE_VERSION("0.0"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +module_param(baseport1, uint, S_IRUGO); +MODULE_PARM_DESC(baseport1, + "First I/O range base address (default: ACPI autodetect)."); + +module_param(baseport2, uint, S_IRUGO); +MODULE_PARM_DESC(baseport2, + "Second I/O range base address (default: ACPI autodetect)."); + +module_param(irq, uint, S_IRUGO); +MODULE_PARM_DESC(irq, "IRQ number (default: ACPI autodetect)."); + +module_param(skip_probe, bool, S_IRUGO); +MODULE_PARM_DESC(skip_probe, + "Skip ACPI-based device detection \ +(default: false for ACPI autodetect)."); + +#ifdef LIRC_WPC8769L_WAKEUP +module_param(protocol_select, int, S_IRUGO); +MODULE_PARM_DESC(protocol_select, + "Define the protocol for wake up functions (default: 2)."); + +module_param(max_info_bits, int, S_IRUGO); +MODULE_PARM_DESC(max_info_bits, + "Define the maximum info bits for wake up functions (default: 24)."); + +module_param(rc_wakeup_code, uint, S_IRUGO); +MODULE_PARM_DESC(rc_wakeup_code, + "Define the RC code value for wake up functions\ + (default: 0x7ffffbf3)."); + +module_param(rc_wakeup_mask, uint, S_IRUGO); +MODULE_PARM_DESC(rc_wakeup_mask, + "Define the RC code mask for wake up functions (default: 0xff000fff)."); +#endif + +EXPORT_NO_SYMBOLS; + +#endif /* MODULE */ + --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_wpc8769l/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_wpc8769l/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_WPC8769l) += lirc_wpc8769l.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.h +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.h @@ -0,0 +1,186 @@ +/* $Id: lirc_wpc8769l.h,v 1.5 2009/06/15 15:11:39 jarodwilson Exp $ */ + +/**************************************************************************** + ** lirc_wpc8769l.h **************************************************** + **************************************************************************** + * + * lirc_wpc8769l - Device driver for the integrated CIR receiver found in + * Acer Aspire 6530G (and probably other models), based on + * the Winbond 8769L embedded controller. + * (Written using the lirc_serial driver as a guide). + * + * Copyright (C) 2008, 2009 Juan J. Garcia de Soria + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include + +/* Name of the ACPI resource used to autodetect the receiver. */ +#define WPC8769L_ACPI_HID "WEC1020" + +/* Number of microseconds for a whole byte of samples. */ +/* This is assuming 20 kHz bit sampling frequency. */ +#define WPC8769L_USECS_PER_BYTE 400 + +/* Number of microseconds for a bit sample. */ +#define WPC8769L_USECS_PER_BIT (WPC8769L_USECS_PER_BYTE >> 3) + +/* Number of bytes in each data burst. */ +#define WPC8769L_BYTES_PER_BURST 14 + +/* Number of 0xff bytes before reset. */ +#define WPC8769L_FF_BYTES_BEFORE_RESET 250 + +/* Microseconds timeout for last part of code. */ +#define WPC8769L_LAST_TIMEOUT_JIFFIES (HZ / 20) + +/* Microseconds timeout for last part of code. */ +#define WPC8769L_LAST_TIMEOUT_JIFFIES (HZ / 20) + +/* Size of I/O region 1. */ +#define WPC8769L_IO_REGION_1_SIZE 0x08 + +/* Size of I/O region 2. */ +#define WPC8769L_IO_REGION_2_SIZE 0x20 + +/* Size of a byte array for a complete burst, rounded + * up to an integral number of unsigned longs. */ +#define WPC8769L_BYTE_BUFFER_SIZE \ + (((WPC8769L_BYTES_PER_BURST + 1 + BITS_PER_LONG / 8 - 1) \ + / (BITS_PER_LONG / 8)) * (BITS_PER_LONG / 8)) + + + +/* WPC8769L register set definitions. Note that these are all wild guesses.*/ + +/* Registers for I/O range 1. */ +#define WPC8769L_SELECT_REG 0x03 + +/*------------*/ +#define WPC8769L_BANK_00 0x00 + +#define WPC8769L_DATA_REG 0x00 + +#define WPC8769L_INTERRUPT_REG 0x01 +#define WPC8769L_INTERRUPT_1_MASK 0x01 +#define WPC8769L_INTERRUPT_2_MASK 0x01 + +#define WPC8769L_DATA_STATUS_REG 0x02 +#define WPC8769L_DATA_READY_MASK 0x01 +#define WPC8769L_DATA_STATUS_MASK_1 0x02 +#define WPC8769L_DATA_STATUS_MASK_2 0xd0 + +#define WPC8769L_CONFIG_REG 0x04 +#define WPC8769L_CONFIG_OFF_MASK 0xe0 +#define WPC8769L_CONFIG_ON_MASK 0xc0 + +#define WPC8769L_DATA_ACK_REG 0x05 +#define WPC8769L_DATA_ACK_MASK 0x01 + +#define WPC8769L_TIMEOUT_RESET_REG 0x07 +#define WPC8769L_TIMEOUT_RESET_MASK 0x20 + +/*------------*/ +#define WPC8769L_BANK_E0 0xe0 + +#define WPC8769L_CONFIG6_REG 0x00 +#define WPC8769L_CONFIG6_MASK 0x4b + +#define WPC8769L_CONFIG7_REG 0x01 + +#define WPC8769L_HARDWARE_ENABLE1_REG 0x02 +#define WPC8769L_HARDWARE_ENABLE1_MASK 0x01 + +#define WPC8769L_CONFIG5_REG 0x04 +#define WPC8769L_CONFIG5_ON_MASK 0x30 + +#define WPC8769L_REMAINING_RX_DATA_REG 0x07 + +/*------------*/ +#define WPC8769L_BANK_E4 0xe4 + +#define WPC8769L_READ_ON_STARTUP_REG 0x00 + +/*------------*/ +#define WPC8769L_BANK_EC 0xec + +#define WPC8769L_CONFIG3_REG 0x04 +#define WPC8769L_CONFIG3_ON_MASK 0x01 +#define WPC8769L_CONFIG3_MASK_1 0x10 + +/*------------*/ +#define WPC8769L_BANK_F0 0xf0 + +#define WPC8769L_WAKEUP_STATUS_LEG_REG 0x02 +#define WPC8769L_WAKEUP_STATUS_LEG_MASK 0x04 +#define WPC8769L_WAKEUP_STATUS_LEG_MASK_A 0x02 +#define WPC8769L_WAKEUP_STATUS_LEG_MASK_B 0x08 + +/*------------*/ +#define WPC8769L_BANK_F4 0xf4 + +#define WPC8769L_CONFIG9_REG 0x01 + +#define WPC8769L_CONFIG4_REG 0x02 +#define WPC8769L_CONFIG4_AND_MASK 0x0f +#define WPC8769L_CONFIG4_ON_MASK 0x50 + +#define WPC8769L_CONFIG8_REG 0x04 + +#define WPC8769L_CONFIG2_REG 0x07 +#define WPC8769L_CONFIG2_OFF_MASK 0x20 +#define WPC8769L_CONFIG2_MASK_1 0x10 + + +/* Registers for I/O range 2. */ +#define WPC8769L_WAKEUP_ACK_REG 0x00 +#define WPC8769L_WAKEUP_ACK_MASK 0x10 + +#define WPC8769L_WAKEUP_ENABLE_REG 0x02 +#define WPC8769L_WAKEUP_ENABLE_MASK 0x10 + +#define WPC8769L_BANK2_CLOCK_REG 0x04 +#define WPC8769L_CLOCK_OFF_MASK 0x02 +#define WPC8769L_CLOCK_ON_MASK 0x01 + +#define WPC8769L_WAKEUP_CONFIG_REG 0x1a +#define WPC8769L_WAKEUP_CONFIG_PRE_MASK 0x80 +#define WPC8769L_MAX_INFO_BITS_BIAS 0x0e +#define WPC8769L_MAX_INFO_BITS_SHIFT 0x01 + +#define WPC8769L_WAKEUP_CONFIG3_REG 0x13 +#define WPC8769L_WAKEUP_CONFIG3_OFF_MASK 0x10 +#define WPC8769L_WAKEUP_CONFIG3_ON_MASK 0x21 +#define WPC8769L_WAKEUP_CONFIG3_A_SHIFT 0x01 +#define WPC8769L_WAKEUP_CONFIG3_A_MASK 0x03 +#define WPC8769L_WAKEUP_CONFIG3_B_SHIFT 0x03 +#define WPC8769L_WAKEUP_CONFIG3_B_MASK 0x01 + +#define WPC8769L_WAKEUP_STATUS_REG 0x14 +#define WPC8769L_WAKEUP_WOKE_UP_MASK 0x01 +#define WPC8769L_WAKEUP_CONFIGURING_MASK 0x17 + +#define WPC8769L_WAKEUP_CONFIG2_REG 0x15 +#define WPC8769L_WAKEUP_CONFIG2_AND_MASK 0xf9 +#define WPC8769L_WAKEUP_CONFIG2_OR_MASK 0x01 + +#define WPC8769L_WAKEUP_DATA_PTR_REG 0x18 +#define WPC8769L_WAKEUP_DATA_BITS 0x20 +#define WPC8769L_WAKEUP_DATA_BASE 0x10 +#define WPC8769L_WAKEUP_MASK_BASE 0x20 + +#define WPC8769L_WAKEUP_DATA_REG 0x19 + --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_serial/lirc_serial.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_serial/lirc_serial.c @@ -0,0 +1,1422 @@ +/* $Id: lirc_serial.c,v 5.104 2009/03/15 09:34:00 lirc Exp $ */ +/* + * lirc_serial.c + * + * lirc_serial - Device driver that records pulse- and pause-lengths + * (space-lengths) between DDCD event on a serial port. + * + * Copyright (C) 1996,97 Ralph Metzler + * Copyright (C) 1998 Trent Piepho + * Copyright (C) 1998 Ben Pfaff + * Copyright (C) 1999 Christoph Bartelmus + * Copyright (C) 2007 Andrei Tanas (suspend/resume support) + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/* + * Steve's changes to improve transmission fidelity: + * - for systems with the rdtsc instruction and the clock counter, a + * send_pule that times the pulses directly using the counter. + * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is + * not needed. Measurement shows very stable waveform, even where + * PCI activity slows the access to the UART, which trips up other + * versions. + * - For other system, non-integer-microsecond pulse/space lengths, + * done using fixed point binary. So, much more accurate carrier + * frequency. + * - fine tuned transmitter latency, taking advantage of fractional + * microseconds in previous change + * - Fixed bug in the way transmitter latency was accounted for by + * tuning the pulse lengths down - the send_pulse routine ignored + * this overhead as it timed the overall pulse length - so the + * pulse frequency was right but overall pulse length was too + * long. Fixed by accounting for latency on each pulse/space + * iteration. + * + * Steve Davies July 2001 + */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18) +#error "**********************************************************" +#error " Sorry, this driver needs kernel version 2.2.18 or higher " +#error "**********************************************************" +#endif + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) +#include +#endif + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16) +#include +#else +#include +#endif +#include +#include + +#if defined(LIRC_SERIAL_NSLU2) +#include +/* From Intel IXP42X Developer's Manual (#252480-005): */ +/* ftp://download.intel.com/design/network/manuals/25248005.pdf */ +#define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */ +#define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */ +#ifndef NSLU2_LED_GRN_GPIO +/* added in 2.6.22 */ +#define NSLU2_LED_GRN_GPIO NSLU2_LED_GRN +#endif +#endif + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#if defined(LIRC_SERIAL_SOFTCARRIER) && !defined(LIRC_SERIAL_TRANSMITTER) +#warning "Software carrier only affects transmitting" +#endif + +#if defined(rdtscl) + +#define USE_RDTSC +#warning "Note: using rdtsc instruction" +#endif + +#ifdef LIRC_SERIAL_ANIMAX +#ifdef LIRC_SERIAL_TRANSMITTER +#warning "******************************************" +#warning " This receiver does not have a " +#warning " transmitter diode " +#warning "******************************************" +#endif +#endif + +#define LIRC_DRIVER_VERSION "$Revision: 5.104 $" +#define LIRC_DRIVER_NAME "lirc_serial" + +struct lirc_serial { + int signal_pin; + int signal_pin_change; + int on; + int off; + long (*send_pulse)(unsigned long length); + void (*send_space)(long length); + int features; +}; + +#define LIRC_HOMEBREW 0 +#define LIRC_IRDEO 1 +#define LIRC_IRDEO_REMOTE 2 +#define LIRC_ANIMAX 3 +#define LIRC_IGOR 4 +#define LIRC_NSLU2 5 + +#ifdef LIRC_SERIAL_IRDEO +static int type = LIRC_IRDEO; +#elif defined(LIRC_SERIAL_IRDEO_REMOTE) +static int type = LIRC_IRDEO_REMOTE; +#elif defined(LIRC_SERIAL_ANIMAX) +static int type = LIRC_ANIMAX; +#elif defined(LIRC_SERIAL_IGOR) +static int type = LIRC_IGOR; +#elif defined(LIRC_SERIAL_NSLU2) +static int type = LIRC_NSLU2; +#else +static int type = LIRC_HOMEBREW; +#endif + +/* Set defaults for NSLU2 */ +#if defined(LIRC_SERIAL_NSLU2) +#ifndef LIRC_IRQ +#define LIRC_IRQ IRQ_IXP4XX_UART2 +#endif +#ifndef LIRC_PORT +#define LIRC_PORT (IXP4XX_UART2_BASE_VIRT + REG_OFFSET) +#endif +#ifndef LIRC_IOMMAP +#define LIRC_IOMMAP IXP4XX_UART2_BASE_PHYS +#endif +#ifndef LIRC_IOSHIFT +#define LIRC_IOSHIFT 2 +#endif +#ifndef LIRC_ALLOW_MMAPPED_IO +#define LIRC_ALLOW_MMAPPED_IO +#endif +#endif + +#if defined(LIRC_ALLOW_MMAPPED_IO) +#ifndef LIRC_IOMMAP +#define LIRC_IOMMAP 0 +#endif +#ifndef LIRC_IOSHIFT +#define LIRC_IOSHIFT 0 +#endif +static int iommap = LIRC_IOMMAP; +static int ioshift = LIRC_IOSHIFT; +#endif + +#ifdef LIRC_SERIAL_SOFTCARRIER +static int softcarrier = 1; +#else +static int softcarrier; +#endif + +static int share_irq; +static int debug; + +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ + fmt, ## args); \ + } while (0) + +/* forward declarations */ +static long send_pulse_irdeo(unsigned long length); +static long send_pulse_homebrew(unsigned long length); +static void send_space_irdeo(long length); +static void send_space_homebrew(long length); + +static struct lirc_serial hardware[] = { + [LIRC_HOMEBREW] = { + .signal_pin = UART_MSR_DCD, + .signal_pin_change = UART_MSR_DDCD, + .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), + .off = (UART_MCR_RTS | UART_MCR_OUT2), + .send_pulse = send_pulse_homebrew, + .send_space = send_space_homebrew, +#ifdef LIRC_SERIAL_TRANSMITTER + .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SET_SEND_CARRIER | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) +#else + .features = LIRC_CAN_REC_MODE2 +#endif + }, + + [LIRC_IRDEO] = { + .signal_pin = UART_MSR_DSR, + .signal_pin_change = UART_MSR_DDSR, + .on = UART_MCR_OUT2, + .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), + .send_pulse = send_pulse_irdeo, + .send_space = send_space_irdeo, + .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) + }, + + [LIRC_IRDEO_REMOTE] = { + .signal_pin = UART_MSR_DSR, + .signal_pin_change = UART_MSR_DDSR, + .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), + .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), + .send_pulse = send_pulse_irdeo, + .send_space = send_space_irdeo, + .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) + }, + + [LIRC_ANIMAX] = { + .signal_pin = UART_MSR_DCD, + .signal_pin_change = UART_MSR_DDCD, + .on = 0, + .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), + .send_pulse = NULL, + .send_space = NULL, + .features = LIRC_CAN_REC_MODE2 + }, + + [LIRC_IGOR] = { + .signal_pin = UART_MSR_DSR, + .signal_pin_change = UART_MSR_DDSR, + .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), + .off = (UART_MCR_RTS | UART_MCR_OUT2), + .send_pulse = send_pulse_homebrew, + .send_space = send_space_homebrew, +#ifdef LIRC_SERIAL_TRANSMITTER + .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SET_SEND_CARRIER | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) +#else + .features = LIRC_CAN_REC_MODE2 +#endif + }, + +#if defined(LIRC_SERIAL_NSLU2) + /* + * Modified Linksys Network Storage Link USB 2.0 (NSLU2): + * We receive on CTS of the 2nd serial port (R142,LHS), we + * transmit with a IR diode between GPIO[1] (green status LED), + * and ground (Matthias Goebl ). + * See also http://www.nslu2-linux.org for this device + */ + [LIRC_NSLU2] = { + .signal_pin = UART_MSR_CTS, + .signal_pin_change = UART_MSR_DCTS, + .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), + .off = (UART_MCR_RTS | UART_MCR_OUT2), + .send_pulse = send_pulse_homebrew, + .send_space = send_space_homebrew, +#ifdef LIRC_SERIAL_TRANSMITTER + .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | + LIRC_CAN_SET_SEND_CARRIER | + LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) +#else + .features = LIRC_CAN_REC_MODE2 +#endif + }, +#endif + +}; + +#define RS_ISR_PASS_LIMIT 256 + +/* + * A long pulse code from a remote might take up to 300 bytes. The + * daemon should read the bytes as soon as they are generated, so take + * the number of keys you think you can push before the daemon runs + * and multiply by 300. The driver will warn you if you overrun this + * buffer. If you have a slow computer or non-busmastering IDE disks, + * maybe you will need to increase this. + */ + +/* This MUST be a power of two! It has to be larger than 1 as well. */ + +#define RBUF_LEN 256 +#define WBUF_LEN 256 + +static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */ +static int txsense; /* 0 = active high, 1 = active low */ + +#ifndef LIRC_IRQ +#define LIRC_IRQ 4 +#endif +#ifndef LIRC_PORT +#define LIRC_PORT 0x3f8 +#endif + +static int io = LIRC_PORT; +static int irq = LIRC_IRQ; + +static struct timeval lasttv = {0, 0}; + +static struct lirc_buffer rbuf; + +static lirc_t wbuf[WBUF_LEN]; + +static unsigned int freq = 38000; +static unsigned int duty_cycle = 50; + +/* Initialized in init_timing_params() */ +static unsigned long period; +static unsigned long pulse_width; +static unsigned long space_width; + +#if defined(__i386__) +/* + * From: + * Linux I/O port programming mini-HOWTO + * Author: Riku Saikkonen + * v, 28 December 1997 + * + * [...] + * Actually, a port I/O instruction on most ports in the 0-0x3ff range + * takes almost exactly 1 microsecond, so if you're, for example, using + * the parallel port directly, just do additional inb()s from that port + * to delay. + * [...] + */ +/* transmitter latency 1.5625us 0x1.90 - this figure arrived at from + * comment above plus trimming to match actual measured frequency. + * This will be sensitive to cpu speed, though hopefully most of the 1.5us + * is spent in the uart access. Still - for reference test machine was a + * 1.13GHz Athlon system - Steve + */ + +/* + * changed from 400 to 450 as this works better on slower machines; + * faster machines will use the rdtsc code anyway + */ +#define LIRC_SERIAL_TRANSMITTER_LATENCY 450 + +#else + +/* does anybody have information on other platforms ? */ +/* 256 = 1<<8 */ +#define LIRC_SERIAL_TRANSMITTER_LATENCY 256 + +#endif /* __i386__ */ + +static unsigned int sinp(int offset) +{ +#if defined(LIRC_ALLOW_MMAPPED_IO) + if (iommap != 0) { + /* the register is memory-mapped */ + offset <<= ioshift; + return readb(io + offset); + } +#endif + return inb(io + offset); +} + +static void soutp(int offset, int value) +{ +#if defined(LIRC_ALLOW_MMAPPED_IO) + if (iommap != 0) { + /* the register is memory-mapped */ + offset <<= ioshift; + writeb(value, io + offset); + } +#endif + outb(value, io + offset); +} + +static void on(void) +{ +#if defined(LIRC_SERIAL_NSLU2) + /* + * On NSLU2, we put the transmit diode between the output of the green + * status LED and ground + */ + if (type == LIRC_NSLU2) { + gpio_line_set(NSLU2_LED_GRN_GPIO, IXP4XX_GPIO_LOW); + return; + } +#endif + if (txsense) + soutp(UART_MCR, hardware[type].off); + else + soutp(UART_MCR, hardware[type].on); +} + +static void off(void) +{ +#if defined(LIRC_SERIAL_NSLU2) + if (type == LIRC_NSLU2) { + gpio_line_set(NSLU2_LED_GRN_GPIO, IXP4XX_GPIO_HIGH); + return; + } +#endif + if (txsense) + soutp(UART_MCR, hardware[type].on); + else + soutp(UART_MCR, hardware[type].off); +} + +#ifndef MAX_UDELAY_MS +#define MAX_UDELAY_US 5000 +#else +#define MAX_UDELAY_US (MAX_UDELAY_MS*1000) +#endif + +static void safe_udelay(unsigned long usecs) +{ + while (usecs > MAX_UDELAY_US) { + udelay(MAX_UDELAY_US); + usecs -= MAX_UDELAY_US; + } + udelay(usecs); +} + +#ifdef USE_RDTSC +/* + * This is an overflow/precision juggle, complicated in that we can't + * do long long divide in the kernel + */ + +/* + * When we use the rdtsc instruction to measure clocks, we keep the + * pulse and space widths as clock cycles. As this is CPU speed + * dependent, the widths must be calculated in init_port and ioctl + * time + */ + +/* So send_pulse can quickly convert microseconds to clocks */ +static unsigned long conv_us_to_clocks; + +static int init_timing_params(unsigned int new_duty_cycle, + unsigned int new_freq) +{ + unsigned long long loops_per_sec, work; + + duty_cycle = new_duty_cycle; + freq = new_freq; + + loops_per_sec = current_cpu_data.loops_per_jiffy; + loops_per_sec *= HZ; + + /* How many clocks in a microsecond?, avoiding long long divide */ + work = loops_per_sec; + work *= 4295; /* 4295 = 2^32 / 1e6 */ + conv_us_to_clocks = (work >> 32); + + /* + * Carrier period in clocks, approach good up to 32GHz clock, + * gets carrier frequency within 8Hz + */ + period = loops_per_sec >> 3; + period /= (freq >> 3); + + /* Derive pulse and space from the period */ + pulse_width = period * duty_cycle / 100; + space_width = period - pulse_width; + dprintk("in init_timing_params, freq=%d, duty_cycle=%d, " + "clk/jiffy=%ld, pulse=%ld, space=%ld, " + "conv_us_to_clocks=%ld\n", + freq, duty_cycle, current_cpu_data.loops_per_jiffy, + pulse_width, space_width, conv_us_to_clocks); + return 0; +} +#else /* ! USE_RDTSC */ +static int init_timing_params(unsigned int new_duty_cycle, + unsigned int new_freq) +{ +/* + * period, pulse/space width are kept with 8 binary places - + * IE multiplied by 256. + */ + if (256 * 1000000L / new_freq * new_duty_cycle / 100 <= + LIRC_SERIAL_TRANSMITTER_LATENCY) + return -EINVAL; + if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <= + LIRC_SERIAL_TRANSMITTER_LATENCY) + return -EINVAL; + duty_cycle = new_duty_cycle; + freq = new_freq; + period = 256 * 1000000L / freq; + pulse_width = period * duty_cycle / 100; + space_width = period - pulse_width; + dprintk("in init_timing_params, freq=%d pulse=%ld, " + "space=%ld\n", freq, pulse_width, space_width); + return 0; +} +#endif /* USE_RDTSC */ + + +/* return value: space length delta */ + +static long send_pulse_irdeo(unsigned long length) +{ + long rawbits, ret; + int i; + unsigned char output; + unsigned char chunk, shifted; + + /* how many bits have to be sent ? */ + rawbits = length * 1152 / 10000; + if (duty_cycle > 50) + chunk = 3; + else + chunk = 1; + for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) { + shifted = chunk << (i * 3); + shifted >>= 1; + output &= (~shifted); + i++; + if (i == 3) { + soutp(UART_TX, output); + while (!(sinp(UART_LSR) & UART_LSR_THRE)) + ; + output = 0x7f; + i = 0; + } + } + if (i != 0) { + soutp(UART_TX, output); + while (!(sinp(UART_LSR) & UART_LSR_TEMT)) + ; + } + + if (i == 0) + ret = (-rawbits) * 10000 / 1152; + else + ret = (3 - i) * 3 *10000 / 1152 + (-rawbits) * 10000 / 1152; + + return ret; +} + +#ifdef USE_RDTSC +/* Version that uses Pentium rdtsc instruction to measure clocks */ + +/* + * This version does sub-microsecond timing using rdtsc instruction, + * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY + * Implicitly i586 architecture... - Steve + */ + +static long send_pulse_homebrew_softcarrier(unsigned long length) +{ + int flag; + unsigned long target, start, now; + + /* Get going quick as we can */ + rdtscl(start); + on(); + /* Convert length from microseconds to clocks */ + length *= conv_us_to_clocks; + /* And loop till time is up - flipping at right intervals */ + now = start; + target = pulse_width; + flag = 1; + while ((now - start) < length) { + /* Delay till flip time */ + do { + rdtscl(now); + } while ((now - start) < target); + + /* flip */ + if (flag) { + rdtscl(now); + off(); + target += space_width; + } else { + rdtscl(now); on(); + target += pulse_width; + } + flag = !flag; + } + rdtscl(now); + return ((now - start) - length) / conv_us_to_clocks; +} +#else /* ! USE_RDTSC */ +/* Version using udelay() */ + +/* + * here we use fixed point arithmetic, with 8 + * fractional bits. that gets us within 0.1% or so of the right average + * frequency, albeit with some jitter in pulse length - Steve + */ + +/* To match 8 fractional bits used for pulse/space length */ + +static long send_pulse_homebrew_softcarrier(unsigned long length) +{ + int flag; + unsigned long actual, target, d; + length <<= 8; + + actual = 0; target = 0; flag = 0; + while (actual < length) { + if (flag) { + off(); + target += space_width; + } else { + on(); + target += pulse_width; + } + d = (target - actual - + LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8; + /* + * Note - we've checked in ioctl that the pulse/space + * widths are big enough so that d is > 0 + */ + udelay(d); + actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY; + flag = !flag; + } + return (actual-length) >> 8; +} +#endif /* USE_RDTSC */ + +static long send_pulse_homebrew(unsigned long length) +{ + if (length <= 0) + return 0; + + if (softcarrier) + return send_pulse_homebrew_softcarrier(length); + else { + on(); + safe_udelay(length); + return 0; + } +} + +static void send_space_irdeo(long length) +{ + if (length <= 0) + return; + + safe_udelay(length); +} + +static void send_space_homebrew(long length) +{ + off(); + if (length <= 0) + return; + safe_udelay(length); +} + +static void rbwrite(lirc_t l) +{ + if (lirc_buffer_full(&rbuf)) { + /* no new signals will be accepted */ + dprintk("Buffer overrun\n"); + return; + } + lirc_buffer_write(&rbuf, (void *)&l); +} + +static void frbwrite(lirc_t l) +{ + /* simple noise filter */ + static lirc_t pulse = 0L, space = 0L; + static unsigned int ptr; + + if (ptr > 0 && (l & PULSE_BIT)) { + pulse += l & PULSE_MASK; + if (pulse > 250) { + rbwrite(space); + rbwrite(pulse | PULSE_BIT); + ptr = 0; + pulse = 0; + } + return; + } + if (!(l & PULSE_BIT)) { + if (ptr == 0) { + if (l > 20000) { + space = l; + ptr++; + return; + } + } else { + if (l > 20000) { + space += pulse; + if (space > PULSE_MASK) + space = PULSE_MASK; + space += l; + if (space > PULSE_MASK) + space = PULSE_MASK; + pulse = 0; + return; + } + rbwrite(space); + rbwrite(pulse | PULSE_BIT); + ptr = 0; + pulse = 0; + } + } + rbwrite(l); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) +static irqreturn_t irq_handler(int i, void *blah) +#else +static irqreturn_t irq_handler(int i, void *blah, struct pt_regs *regs) +#endif +{ + struct timeval tv; + int status, counter, dcd; + long deltv; + lirc_t data; + static int last_dcd = -1; + + if ((sinp(UART_IIR) & UART_IIR_NO_INT)) { + /* not our interrupt */ + return IRQ_RETVAL(IRQ_NONE); + } + + counter = 0; + do { + counter++; + status = sinp(UART_MSR); + if (counter > RS_ISR_PASS_LIMIT) { + printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: " + "We're caught!\n"); + break; + } + if ((status & hardware[type].signal_pin_change) + && sense != -1) { + /* get current time */ + do_gettimeofday(&tv); + + /* New mode, written by Trent Piepho + . */ + + /* + * The old format was not very portable. + * We now use an int to pass pulses + * and spaces to user space. + * + * If PULSE_BIT is set a pulse has been + * received, otherwise a space has been + * received. The driver needs to know if your + * receiver is active high or active low, or + * the space/pulse sense could be + * inverted. The bits denoted by PULSE_MASK are + * the length in microseconds. Lengths greater + * than or equal to 16 seconds are clamped to + * PULSE_MASK. All other bits are unused. + * This is a much simpler interface for user + * programs, as well as eliminating "out of + * phase" errors with space/pulse + * autodetection. + */ + + /* calc time since last interrupt in microseconds */ + dcd = (status & hardware[type].signal_pin) ? 1 : 0; + + if (dcd == last_dcd) { + printk(KERN_WARNING LIRC_DRIVER_NAME + ": ignoring spike: %d %d %lx %lx %lx %lx\n", + dcd, sense, + tv.tv_sec, lasttv.tv_sec, + tv.tv_usec, lasttv.tv_usec); + continue; + } + + deltv = tv.tv_sec-lasttv.tv_sec; + if (tv.tv_sec < lasttv.tv_sec || + (tv.tv_sec == lasttv.tv_sec && + tv.tv_usec < lasttv.tv_usec)) { + printk(KERN_WARNING LIRC_DRIVER_NAME + ": AIEEEE: your clock just jumped " + "backwards\n"); + printk(KERN_WARNING LIRC_DRIVER_NAME + ": %d %d %lx %lx %lx %lx\n", + dcd, sense, + tv.tv_sec, lasttv.tv_sec, + tv.tv_usec, lasttv.tv_usec); + data = PULSE_MASK; + } else if (deltv > 15) { + data = PULSE_MASK; /* really long time */ + if (!(dcd^sense)) { + /* sanity check */ + printk(KERN_WARNING LIRC_DRIVER_NAME + ": AIEEEE: " + "%d %d %lx %lx %lx %lx\n", + dcd, sense, + tv.tv_sec, lasttv.tv_sec, + tv.tv_usec, lasttv.tv_usec); + /* + * detecting pulse while this + * MUST be a space! + */ + sense = sense ? 0 : 1; + } + } else + data = (lirc_t) (deltv*1000000 + + tv.tv_usec - + lasttv.tv_usec); + frbwrite(dcd^sense ? data : (data|PULSE_BIT)); + lasttv = tv; + last_dcd = dcd; + wake_up_interruptible(&rbuf.wait_poll); + } + } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */ + return IRQ_RETVAL(IRQ_HANDLED); +} + +static void hardware_init_port(void) +{ + unsigned long flags; + local_irq_save(flags); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* First of all, disable all interrupts */ + soutp(UART_IER, sinp(UART_IER) & + (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); + + /* Clear registers. */ + sinp(UART_LSR); + sinp(UART_RX); + sinp(UART_IIR); + sinp(UART_MSR); + +#if defined(LIRC_SERIAL_NSLU2) + if (type == LIRC_NSLU2) { + /* Setup NSLU2 UART */ + + /* Enable UART */ + soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE); + /* Disable Receiver data Time out interrupt */ + soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE); + /* set out2 = interrupt unmask; off() doesn't set MCR + on NSLU2 */ + soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); + } +#endif + + /* Set line for power source */ + off(); + + /* Clear registers again to be sure. */ + sinp(UART_LSR); + sinp(UART_RX); + sinp(UART_IIR); + sinp(UART_MSR); + + switch (type) { + case LIRC_IRDEO: + case LIRC_IRDEO_REMOTE: + /* setup port to 7N1 @ 115200 Baud */ + /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */ + + /* Set DLAB 1. */ + soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); + /* Set divisor to 1 => 115200 Baud */ + soutp(UART_DLM, 0); + soutp(UART_DLL, 1); + /* Set DLAB 0 + 7N1 */ + soutp(UART_LCR, UART_LCR_WLEN7); + /* THR interrupt already disabled at this point */ + break; + default: + break; + } + + local_irq_restore(flags); +} + +static int init_port(void) +{ + int i, nlow, nhigh; + + /* Reserve io region. */ +#if defined(LIRC_ALLOW_MMAPPED_IO) + /* + * Future MMAP-Developers: Attention! + * For memory mapped I/O you *might* need to use ioremap() first, + * for the NSLU2 it's done in boot code. + */ + if (((iommap != 0) + && (request_mem_region(iommap, 8 << ioshift, + LIRC_DRIVER_NAME) == NULL)) + || ((iommap == 0) + && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) { +#else + if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) { +#endif + printk(KERN_ERR LIRC_DRIVER_NAME + ": port %04x already in use\n", io); + printk(KERN_WARNING LIRC_DRIVER_NAME + ": use 'setserial /dev/ttySX uart none'\n"); + printk(KERN_WARNING LIRC_DRIVER_NAME + ": or compile the serial port driver as module and\n"); + printk(KERN_WARNING LIRC_DRIVER_NAME + ": make sure this module is loaded first\n"); + return -EBUSY; + } + + hardware_init_port(); + + /* Initialize pulse/space widths */ + init_timing_params(duty_cycle, freq); + + /* If pin is high, then this must be an active low receiver. */ + if (sense == -1) { + /* wait 1/2 sec for the power supply */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11) + msleep(500); +#else + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ/2); +#endif + + /* + * probe 9 times every 0.04s, collect "votes" for + * active high/low + */ + nlow = 0; + nhigh = 0; + for (i = 0; i < 9; i++) { + if (sinp(UART_MSR) & hardware[type].signal_pin) + nlow++; + else + nhigh++; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11) + msleep(40); +#else + schedule_timeout(HZ/25); +#endif + } + sense = (nlow >= nhigh ? 1 : 0); + printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active " + "%s receiver\n", sense ? "low" : "high"); + } else + printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active " + "%s receiver\n", sense ? "low" : "high"); + + return 0; +} + +static int set_use_inc(void *data) +{ + int result; + unsigned long flags; + + /* Init read buffer. */ + if (lirc_buffer_init(&rbuf, sizeof(lirc_t), RBUF_LEN) < 0) + return -ENOMEM; + + /* initialize timestamp */ + do_gettimeofday(&lasttv); + + result = request_irq(irq, irq_handler, + IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0), + LIRC_DRIVER_NAME, (void *)&hardware); + + switch (result) { + case -EBUSY: + printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq); + lirc_buffer_free(&rbuf); + return -EBUSY; + case -EINVAL: + printk(KERN_ERR LIRC_DRIVER_NAME + ": Bad irq number or handler\n"); + lirc_buffer_free(&rbuf); + return -EINVAL; + default: + dprintk("Interrupt %d, port %04x obtained\n", irq, io); + break; + }; + + local_irq_save(flags); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); + + local_irq_restore(flags); + + MOD_INC_USE_COUNT; + return 0; +} + +static void set_use_dec(void *data) +{ unsigned long flags; + + local_irq_save(flags); + + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* First of all, disable all interrupts */ + soutp(UART_IER, sinp(UART_IER) & + (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); + local_irq_restore(flags); + + free_irq(irq, (void *)&hardware); + + dprintk("freed IRQ %d\n", irq); + lirc_buffer_free(&rbuf); + + MOD_DEC_USE_COUNT; +} + +static ssize_t lirc_write(struct file *file, const char *buf, + size_t n, loff_t *ppos) +{ + int i, count; + unsigned long flags; + long delta = 0; + + if (!(hardware[type].features&LIRC_CAN_SEND_PULSE)) + return -EBADF; + + if (n % sizeof(lirc_t)) + return -EINVAL; + count = n / sizeof(lirc_t); + if (count > WBUF_LEN || count % 2 == 0) + return -EINVAL; + if (copy_from_user(wbuf, buf, n)) + return -EFAULT; + local_irq_save(flags); + if (type == LIRC_IRDEO) { + /* DTR, RTS down */ + on(); + } + for (i = 0; i < count; i++) { + if (i%2) + hardware[type].send_space(wbuf[i]-delta); + else + delta = hardware[type].send_pulse(wbuf[i]); + } + off(); + local_irq_restore(flags); + return n; +} + +static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd, + unsigned long arg) +{ + int result; + unsigned long value; + unsigned int ivalue; + + switch (cmd) { + case LIRC_GET_SEND_MODE: + if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) + return -ENOIOCTLCMD; + + result = put_user(LIRC_SEND2MODE + (hardware[type].features&LIRC_CAN_SEND_MASK), + (unsigned long *) arg); + if (result) + return result; + break; + + case LIRC_SET_SEND_MODE: + if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) + return -ENOIOCTLCMD; + + result = get_user(value, (unsigned long *) arg); + if (result) + return result; + /* only LIRC_MODE_PULSE supported */ + if (value != LIRC_MODE_PULSE) + return -ENOSYS; + break; + + case LIRC_GET_LENGTH: + return -ENOSYS; + break; + + case LIRC_SET_SEND_DUTY_CYCLE: + dprintk("SET_SEND_DUTY_CYCLE\n"); + if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE)) + return -ENOIOCTLCMD; + + result = get_user(ivalue, (unsigned int *) arg); + if (result) + return result; + if (ivalue <= 0 || ivalue > 100) + return -EINVAL; + return init_timing_params(ivalue, freq); + break; + + case LIRC_SET_SEND_CARRIER: + dprintk("SET_SEND_CARRIER\n"); + if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER)) + return -ENOIOCTLCMD; + + result = get_user(ivalue, (unsigned int *) arg); + if (result) + return result; + if (ivalue > 500000 || ivalue < 20000) + return -EINVAL; + return init_timing_params(duty_cycle, ivalue); + break; + + default: + return -ENOIOCTLCMD; + } + return 0; +} + +static struct file_operations lirc_fops = { + .owner = THIS_MODULE, + .write = lirc_write, + .ioctl = lirc_ioctl, +}; + +static struct lirc_driver driver = { + .name = LIRC_DRIVER_NAME, + .minor = -1, + .code_length = 1, + .sample_rate = 0, + .data = NULL, + .add_to_buf = NULL, +#ifndef LIRC_REMOVE_DURING_EXPORT + .get_queue = NULL, +#endif + .rbuf = &rbuf, + .set_use_inc = set_use_inc, + .set_use_dec = set_use_dec, + .fops = &lirc_fops, + .dev = NULL, + .owner = THIS_MODULE, +}; + +#ifdef MODULE + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) +static struct platform_device *lirc_serial_dev; + +static int __devinit lirc_serial_probe(struct platform_device *dev) +{ + return 0; +} + +static int __devexit lirc_serial_remove(struct platform_device *dev) +{ + return 0; +} + +static int lirc_serial_suspend(struct platform_device *dev, + pm_message_t state) +{ + /* Set DLAB 0. */ + soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); + + /* Disable all interrupts */ + soutp(UART_IER, sinp(UART_IER) & + (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); + + /* Clear registers. */ + sinp(UART_LSR); + sinp(UART_RX); + sinp(UART_IIR); + sinp(UART_MSR); + + return 0; +} + +static int lirc_serial_resume(struct platform_device *dev) +{ + unsigned long flags; + + hardware_init_port(); + + local_irq_save(flags); + /* Enable Interrupt */ + do_gettimeofday(&lasttv); + soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); + off(); + + lirc_buffer_clear(&rbuf); + + local_irq_restore(flags); + + return 0; +} + +static struct platform_driver lirc_serial_driver = { + .probe = lirc_serial_probe, + .remove = __devexit_p(lirc_serial_remove), + .suspend = lirc_serial_suspend, + .resume = lirc_serial_resume, + .driver = { + .name = "lirc_serial", + .owner = THIS_MODULE, + }, +}; + +static int __init lirc_serial_init(void) +{ + int result; + + result = platform_driver_register(&lirc_serial_driver); + if (result) { + printk("lirc register returned %d\n", result); + return result; + } + + lirc_serial_dev = platform_device_alloc("lirc_serial", 0); + if (!lirc_serial_dev) { + result = -ENOMEM; + goto exit_driver_unregister; + } + + result = platform_device_add(lirc_serial_dev); + if (result) + goto exit_device_put; + + return 0; + +exit_device_put: + platform_device_put(lirc_serial_dev); +exit_driver_unregister: + platform_driver_unregister(&lirc_serial_driver); + return result; +} + +static void __exit lirc_serial_exit(void) +{ + platform_device_unregister(lirc_serial_dev); + platform_driver_unregister(&lirc_serial_driver); +} +#endif + +static int __init lirc_serial_init_module(void) +{ + int result; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + result = lirc_serial_init(); + if (result) + return result; +#endif + switch (type) { + case LIRC_HOMEBREW: + case LIRC_IRDEO: + case LIRC_IRDEO_REMOTE: + case LIRC_ANIMAX: + case LIRC_IGOR: +#if defined(LIRC_SERIAL_NSLU2) + case LIRC_NSLU2: +#endif + break; + default: + result = -EINVAL; + goto exit_serial_exit; + } + if (!softcarrier) { + switch (type) { + case LIRC_HOMEBREW: + case LIRC_IGOR: + case LIRC_NSLU2: + hardware[type].features &= + ~(LIRC_CAN_SET_SEND_DUTY_CYCLE| + LIRC_CAN_SET_SEND_CARRIER); + break; + } + } + + result = init_port(); + if (result < 0) + goto exit_serial_exit; + driver.features = hardware[type].features; + driver.minor = lirc_register_driver(&driver); + if (driver.minor < 0) { + printk(KERN_ERR LIRC_DRIVER_NAME + ": register_chrdev failed!\n"); + result = -EIO; + goto exit_release; + } + + printk(KERN_INFO + LIRC_DRIVER_NAME " " LIRC_DRIVER_VERSION " registered\n"); + dprintk("type = %d\n", type); + dprintk("IRQ = %d, port = %04x\n", irq, io); + dprintk("share_irq = %d\n", share_irq); +#ifdef LIRC_SERIAL_TRANSMITTER + dprintk("txsense = %d\n", txsense); +#endif + dprintk("softcarrier = %d\n", softcarrier); + + return 0; +exit_release: + release_region(io, 8); +exit_serial_exit: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + lirc_serial_exit(); +#endif + return result; +} + +static void __exit lirc_serial_exit_module(void) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18) + lirc_serial_exit(); +#endif +#if defined(LIRC_ALLOW_MMAPPED_IO) + if (iommap != 0) + release_mem_region(iommap, 8 << ioshift); + else + release_region(io, 8); +#else + release_region(io, 8); +#endif + lirc_unregister_driver(driver.minor); + dprintk("cleaned up module\n"); +} + + +module_init(lirc_serial_init_module); +module_exit(lirc_serial_exit_module); + +MODULE_DESCRIPTION("Infra-red receiver driver for serial ports."); +MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, " + "Christoph Bartelmus, Andrei Tanas"); +MODULE_LICENSE("GPL"); + +module_param(type, int, S_IRUGO); +#if defined(LIRC_SERIAL_NSLU2) +MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo," + " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug," + " 5 = NSLU2 RX:CTS2/TX:GreenLED)"); +#else +MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo," + " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug)"); +#endif + +module_param(io, int, S_IRUGO); +MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); + +#if defined(LIRC_ALLOW_MMAPPED_IO) +/* some architectures (e.g. intel xscale) have memory mapped registers */ +module_param(iommap, bool, S_IRUGO); +MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O" + " (0 = no memory mapped io)"); + +/* + * some architectures (e.g. intel xscale) align the 8bit serial registers + * on 32bit word boundaries. + * See linux-kernel/serial/8250.c serial_in()/out() + */ +module_param(ioshift, int, S_IRUGO); +MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)"); +#endif + +module_param(irq, int, S_IRUGO); +MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); + +module_param(share_irq, bool, S_IRUGO); +MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)"); + +module_param(sense, bool, S_IRUGO); +MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit" + " (0 = active high, 1 = active low )"); + +#ifdef LIRC_SERIAL_TRANSMITTER +module_param(txsense, bool, S_IRUGO); +MODULE_PARM_DESC(txsense, "Sense of transmitter circuit" + " (0 = active high, 1 = active low )"); +#endif + +module_param(softcarrier, bool, S_IRUGO); +MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on)"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); + +EXPORT_NO_SYMBOLS; + +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_serial/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_serial/Makefile @@ -0,0 +1,3 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. + +obj-$(CONFIG_LIRC_SERIAL) += lirc_serial.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_streamzap/lirc_streamzap.c +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_streamzap/lirc_streamzap.c @@ -0,0 +1,889 @@ +/* $Id: lirc_streamzap.c,v 1.48 2009/03/15 09:34:00 lirc Exp $ */ +/* + * Streamzap Remote Control driver + * + * Copyright (c) 2005 Christoph Bartelmus + * + * This driver was based on the work of Greg Wickham and Adrian + * Dewhurst. It was substantially rewritten to support correct signal + * gaps and now maintains a delay buffer, which is used to present + * consistent timing behaviour to user space applications. Without the + * delay buffer an ugly hack would be required in lircd, which can + * cause sluggish signal decoding in certain situations. + * + * This driver is based on the USB skeleton driver packaged with the + * kernel; copyright (C) 2001-2003 Greg Kroah-Hartman (greg@kroah.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0) +#error "*******************************************************" +#error "Sorry, this driver needs kernel version 2.4.0 or higher" +#error "*******************************************************" +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#include +#else +#include +#endif +#include + +#include "../lirc.h" +#include "../kcompat.h" +#include "../lirc_dev/lirc_dev.h" + +#define DRIVER_VERSION "$Revision: 1.48 $" +#define DRIVER_NAME "lirc_streamzap" +#define DRIVER_DESC "Streamzap Remote Control driver" + +static int debug; + +#define USB_STREAMZAP_VENDOR_ID 0x0e9c +#define USB_STREAMZAP_PRODUCT_ID 0x0000 + +/* Use our own dbg macro */ +#define dprintk(fmt, args...) \ + do { \ + if (debug) \ + printk(KERN_DEBUG DRIVER_NAME "[%d]: " \ + fmt "\n", ## args); \ + } while (0) + +/* table of devices that work with this driver */ +static struct usb_device_id streamzap_table[] = { + /* Streamzap Remote Control */ + { USB_DEVICE(USB_STREAMZAP_VENDOR_ID, USB_STREAMZAP_PRODUCT_ID) }, + /* Terminating entry */ + { } +}; + +MODULE_DEVICE_TABLE(usb, streamzap_table); + +#define STREAMZAP_PULSE_MASK 0xf0 +#define STREAMZAP_SPACE_MASK 0x0f +#define STREAMZAP_RESOLUTION 256 + +/* number of samples buffered */ +#define STREAMZAP_BUFFER_SIZE 128 + +enum StreamzapDecoderState { + PulseSpace, + FullPulse, + FullSpace, + IgnorePulse +}; + +/* Structure to hold all of our device specific stuff + * + * some remarks regarding locking: + * theoretically this struct can be accessed from three threads: + * + * - from lirc_dev through set_use_inc/set_use_dec + * + * - from the USB layer throuh probe/disconnect/irq + * + * Careful placement of lirc_register_driver/lirc_unregister_driver + * calls will prevent conflicts. lirc_dev makes sure that + * set_use_inc/set_use_dec are not being executed and will not be + * called after lirc_unregister_driver returns. + * + * - by the timer callback + * + * The timer is only running when the device is connected and the + * LIRC device is open. Making sure the timer is deleted by + * set_use_dec will make conflicts impossible. + */ +struct usb_streamzap { + + /* usb */ + /* save off the usb device pointer */ + struct usb_device *udev; + /* the interface for this device */ + struct usb_interface *interface; + + /* buffer & dma */ + unsigned char *buf_in; + dma_addr_t dma_in; + unsigned int buf_in_len; + + struct usb_endpoint_descriptor *endpoint; + + /* IRQ */ + struct urb *urb_in; + + /* lirc */ + struct lirc_driver driver; + struct lirc_buffer delay_buf; + struct lirc_buffer lirc_buf; + + /* timer used to support delay buffering */ + struct timer_list delay_timer; + int timer_running; + spinlock_t timer_lock; + + /* tracks whether we are currently receiving some signal */ + int idle; + /* sum of signal lengths received since signal start */ + unsigned long sum; + /* start time of signal; necessary for gap tracking */ + struct timeval signal_last; + struct timeval signal_start; + enum StreamzapDecoderState decoder_state; + struct timer_list flush_timer; + int flush; + int in_use; +}; + + +/* local function prototypes */ +#ifdef KERNEL_2_5 +static int streamzap_probe(struct usb_interface *interface, + const struct usb_device_id *id); +static void streamzap_disconnect(struct usb_interface *interface); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_streamzap_irq(struct urb *urb, struct pt_regs *regs); +#else +static void usb_streamzap_irq(struct urb *urb); +#endif +#else +static void *streamzap_probe(struct usb_device *udev, unsigned int ifnum, + const struct usb_device_id *id); +static void streamzap_disconnect(struct usb_device *dev, void *ptr); +static void usb_streamzap_irq(struct urb *urb); +#endif +static int streamzap_use_inc(void *data); +static void streamzap_use_dec(void *data); +static int streamzap_ioctl(struct inode *node, struct file *filep, + unsigned int cmd, unsigned long arg); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) +static int streamzap_suspend(struct usb_interface *intf, pm_message_t message); +static int streamzap_resume(struct usb_interface *intf); +#endif + +/* usb specific object needed to register this driver with the usb subsystem */ + +static struct usb_driver streamzap_driver = { + LIRC_THIS_MODULE(.owner = THIS_MODULE) + .name = DRIVER_NAME, + .probe = streamzap_probe, + .disconnect = streamzap_disconnect, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) + .suspend = streamzap_suspend, + .resume = streamzap_resume, +#endif + .id_table = streamzap_table, +}; + +static void stop_timer(struct usb_streamzap *sz) +{ + unsigned long flags; + + spin_lock_irqsave(&sz->timer_lock, flags); + if (sz->timer_running) { + sz->timer_running = 0; + spin_unlock_irqrestore(&sz->timer_lock, flags); + del_timer_sync(&sz->delay_timer); + } else { + spin_unlock_irqrestore(&sz->timer_lock, flags); + } +} + +static void flush_timeout(unsigned long arg) +{ + struct usb_streamzap *sz = (struct usb_streamzap *) arg; + + /* finally start accepting data */ + sz->flush = 0; +} +static void delay_timeout(unsigned long arg) +{ + unsigned long flags; + /* deliver data every 10 ms */ + static unsigned long timer_inc = + (10000/(1000000/HZ)) == 0 ? 1 : (10000/(1000000/HZ)); + struct usb_streamzap *sz = (struct usb_streamzap *) arg; + lirc_t data; + + spin_lock_irqsave(&sz->timer_lock, flags); + + if (!lirc_buffer_empty(&sz->delay_buf) && + !lirc_buffer_full(&sz->lirc_buf)) { + lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data); + lirc_buffer_write(&sz->lirc_buf, (unsigned char *) &data); + } + if (!lirc_buffer_empty(&sz->delay_buf)) { + while (lirc_buffer_available(&sz->delay_buf) < + STREAMZAP_BUFFER_SIZE/2 && + !lirc_buffer_full(&sz->lirc_buf)) { + lirc_buffer_read(&sz->delay_buf, + (unsigned char *) &data); + lirc_buffer_write(&sz->lirc_buf, + (unsigned char *) &data); + } + if (sz->timer_running) { + sz->delay_timer.expires = jiffies + timer_inc; + add_timer(&sz->delay_timer); + } + } else { + sz->timer_running = 0; + } + + if (!lirc_buffer_empty(&sz->lirc_buf)) + wake_up(&sz->lirc_buf.wait_poll); + + spin_unlock_irqrestore(&sz->timer_lock, flags); +} + +static void flush_delay_buffer(struct usb_streamzap *sz) +{ + lirc_t data; + int empty = 1; + + while (!lirc_buffer_empty(&sz->delay_buf)) { + empty = 0; + lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data); + if (!lirc_buffer_full(&sz->lirc_buf)) { + lirc_buffer_write(&sz->lirc_buf, + (unsigned char *) &data); + } else { + dprintk("buffer overflow", sz->driver.minor); + } + } + if (!empty) + wake_up(&sz->lirc_buf.wait_poll); +} + +static void push(struct usb_streamzap *sz, unsigned char *data) +{ + unsigned long flags; + + spin_lock_irqsave(&sz->timer_lock, flags); + if (lirc_buffer_full(&sz->delay_buf)) { + lirc_t data; + + lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data); + if (!lirc_buffer_full(&sz->lirc_buf)) { + lirc_buffer_write(&sz->lirc_buf, + (unsigned char *) &data); + } else { + dprintk("buffer overflow", sz->driver.minor); + } + } + + lirc_buffer_write(&sz->delay_buf, data); + + if (!sz->timer_running) { + sz->delay_timer.expires = jiffies + HZ/10; + add_timer(&sz->delay_timer); + sz->timer_running = 1; + } + + spin_unlock_irqrestore(&sz->timer_lock, flags); +} + +static void push_full_pulse(struct usb_streamzap *sz, + unsigned char value) +{ + lirc_t pulse; + + if (sz->idle) { + long deltv; + lirc_t tmp; + + sz->signal_last = sz->signal_start; + do_gettimeofday(&sz->signal_start); + + deltv = sz->signal_start.tv_sec-sz->signal_last.tv_sec; + if (deltv > 15) { + tmp = PULSE_MASK; /* really long time */ + } else { + tmp = (lirc_t) (deltv*1000000+ + sz->signal_start.tv_usec - + sz->signal_last.tv_usec); + tmp -= sz->sum; + } + dprintk("ls %u", sz->driver.minor, tmp); + push(sz, (char *)&tmp); + + sz->idle = 0; + sz->sum = 0; + } + + pulse = ((lirc_t) value)*STREAMZAP_RESOLUTION; + pulse += STREAMZAP_RESOLUTION/2; + sz->sum += pulse; + pulse |= PULSE_BIT; + + dprintk("p %u", sz->driver.minor, pulse&PULSE_MASK); + push(sz, (char *)&pulse); +} + +static void push_half_pulse(struct usb_streamzap *sz, + unsigned char value) +{ + push_full_pulse(sz, (value & STREAMZAP_PULSE_MASK)>>4); +} + +static void push_full_space(struct usb_streamzap *sz, + unsigned char value) +{ + lirc_t space; + + space = ((lirc_t) value)*STREAMZAP_RESOLUTION; + space += STREAMZAP_RESOLUTION/2; + sz->sum += space; + dprintk("s %u", sz->driver.minor, space); + push(sz, (char *)&space); +} + +static void push_half_space(struct usb_streamzap *sz, + unsigned char value) +{ + push_full_space(sz, value & STREAMZAP_SPACE_MASK); +} + +/** + * usb_streamzap_irq - IRQ handler + * + * This procedure is invoked on reception of data from + * the usb remote. + */ +#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) +static void usb_streamzap_irq(struct urb *urb, struct pt_regs *regs) +#else +static void usb_streamzap_irq(struct urb *urb) +#endif +{ + struct usb_streamzap *sz; + int len; + unsigned int i = 0; + + if (!urb) + return; + + sz = urb->context; + len = urb->actual_length; + + switch (urb->status) { + case -ECONNRESET: + case -ENOENT: + case -ESHUTDOWN: + /* + * this urb is terminated, clean up. + * sz might already be invalid at this point + */ + dprintk("urb status: %d", -1, urb->status); + return; + default: + break; + } + + dprintk("received %d", sz->driver.minor, urb->actual_length); + if (!sz->flush) { + for (i = 0; i < urb->actual_length; i++) { + dprintk("%d: %x", sz->driver.minor, + i, (unsigned char) sz->buf_in[i]); + switch (sz->decoder_state) { + case PulseSpace: + if ((sz->buf_in[i]&STREAMZAP_PULSE_MASK) == + STREAMZAP_PULSE_MASK) { + sz->decoder_state = FullPulse; + continue; + } else if ((sz->buf_in[i]&STREAMZAP_SPACE_MASK) + == STREAMZAP_SPACE_MASK) { + push_half_pulse(sz, sz->buf_in[i]); + sz->decoder_state = FullSpace; + continue; + } else { + push_half_pulse(sz, sz->buf_in[i]); + push_half_space(sz, sz->buf_in[i]); + } + break; + case FullPulse: + push_full_pulse(sz, sz->buf_in[i]); + sz->decoder_state = IgnorePulse; + break; + case FullSpace: + if (sz->buf_in[i] == 0xff) { + sz->idle = 1; + stop_timer(sz); + flush_delay_buffer(sz); + } else + push_full_space(sz, sz->buf_in[i]); + sz->decoder_state = PulseSpace; + break; + case IgnorePulse: + if ((sz->buf_in[i]&STREAMZAP_SPACE_MASK) == + STREAMZAP_SPACE_MASK) { + sz->decoder_state = FullSpace; + continue; + } + push_half_space(sz, sz->buf_in[i]); + sz->decoder_state = PulseSpace; + break; + } + } + } + +#ifdef KERNEL_2_5 + usb_submit_urb(urb, GFP_ATOMIC); +#endif + + return; +} + +static struct file_operations streamzap_fops = { + .owner = THIS_MODULE, + .ioctl = streamzap_ioctl, +}; + + +/** + * streamzap_probe + * + * Called by usb-core to associated with a candidate device + * On any failure the return value is the ERROR + * On success return 0 + */ +#ifdef KERNEL_2_5 +static int streamzap_probe(struct usb_interface *interface, + const struct usb_device_id *id) +{ + struct usb_device *udev = interface_to_usbdev(interface); + struct usb_host_interface *iface_host; +#else +static void *streamzap_probe(struct usb_device *udev, unsigned int ifnum, + const struct usb_device_id *id) +{ + struct usb_interface *interface = &udev->actconfig->interface[ifnum]; + struct usb_interface_descriptor *iface_host; +#endif + int retval = -ENOMEM; + struct usb_streamzap *sz = NULL; + char buf[63], name[128] = ""; + + /* Allocate space for device driver specific data */ + sz = kzalloc(sizeof(struct usb_streamzap), GFP_KERNEL); + if (sz == NULL) + goto error; + + sz->udev = udev; + sz->interface = interface; + + /* Check to ensure endpoint information matches requirements */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5) + iface_host = &interface->altsetting[interface->act_altsetting]; +#else + iface_host = interface->cur_altsetting; +#endif + +#ifdef KERNEL_2_5 + if (iface_host->desc.bNumEndpoints != 1) { +#else + if (iface_host->bNumEndpoints != 1) { +#endif +#ifdef KERNEL_2_5 + err("%s: Unexpected desc.bNumEndpoints (%d)", __func__, + iface_host->desc.bNumEndpoints); +#else + err("%s: Unexpected desc.bNumEndpoints (%d)", __func__, + iface_host->bNumEndpoints); +#endif + retval = -ENODEV; + goto error; + } + +#ifdef KERNEL_2_5 + sz->endpoint = &(iface_host->endpoint[0].desc); +#else + sz->endpoint = &(iface_host->endpoint[0]); +#endif + if ((sz->endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK) + != USB_DIR_IN) { + err("%s: endpoint doesn't match input device 02%02x", + __func__, sz->endpoint->bEndpointAddress); + retval = -ENODEV; + goto error; + } + + if ((sz->endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) + != USB_ENDPOINT_XFER_INT) { + err("%s: endpoint attributes don't match xfer 02%02x", + __func__, sz->endpoint->bmAttributes); + retval = -ENODEV; + goto error; + } + + if (sz->endpoint->wMaxPacketSize == 0) { + err("%s: endpoint message size==0? ", __func__); + retval = -ENODEV; + goto error; + } + + /* Allocate the USB buffer and IRQ URB */ + + sz->buf_in_len = sz->endpoint->wMaxPacketSize; +#ifdef KERNEL_2_5 + sz->buf_in = usb_buffer_alloc(sz->udev, sz->buf_in_len, + GFP_ATOMIC, &sz->dma_in); +#else + sz->buf_in = kmalloc(sz->buf_in_len, GFP_KERNEL); +#endif + if (sz->buf_in == NULL) + goto error; + +#ifdef KERNEL_2_5 + sz->urb_in = usb_alloc_urb(0, GFP_KERNEL); +#else + + sz->urb_in = usb_alloc_urb(0); +#endif + if (sz->urb_in == NULL) + goto error; + + /* Connect this device to the LIRC sub-system */ + + if (lirc_buffer_init(&sz->lirc_buf, sizeof(lirc_t), + STREAMZAP_BUFFER_SIZE)) + goto error; + + if (lirc_buffer_init(&sz->delay_buf, sizeof(lirc_t), + STREAMZAP_BUFFER_SIZE)) { + lirc_buffer_free(&sz->lirc_buf); + goto error; + } + + strcpy(sz->driver.name, DRIVER_NAME); + sz->driver.minor = -1; + sz->driver.sample_rate = 0; + sz->driver.code_length = sizeof(lirc_t) * 8; + sz->driver.features = LIRC_CAN_REC_MODE2 | LIRC_CAN_GET_REC_RESOLUTION; + sz->driver.data = sz; + sz->driver.rbuf = &sz->lirc_buf; + sz->driver.set_use_inc = &streamzap_use_inc; + sz->driver.set_use_dec = &streamzap_use_dec; + sz->driver.fops = &streamzap_fops; +#ifdef LIRC_HAVE_SYSFS + sz->driver.dev = &interface->dev; +#endif + sz->driver.owner = THIS_MODULE; + + sz->idle = 1; + sz->decoder_state = PulseSpace; + init_timer(&sz->delay_timer); + sz->delay_timer.function = delay_timeout; + sz->delay_timer.data = (unsigned long) sz; + sz->timer_running = 0; + spin_lock_init(&sz->timer_lock); + + init_timer(&sz->flush_timer); + sz->flush_timer.function = flush_timeout; + sz->flush_timer.data = (unsigned long) sz; + /* Complete final initialisations */ + + usb_fill_int_urb(sz->urb_in, udev, + usb_rcvintpipe(udev, sz->endpoint->bEndpointAddress), + sz->buf_in, sz->buf_in_len, usb_streamzap_irq, sz, + sz->endpoint->bInterval); +#ifdef KERNEL_2_5 + sz->urb_in->transfer_dma = sz->dma_in; + sz->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; +#endif + + if (udev->descriptor.iManufacturer + && usb_string(udev, udev->descriptor.iManufacturer, + buf, sizeof(buf)) > 0) + strlcpy(name, buf, sizeof(name)); + + if (udev->descriptor.iProduct + && usb_string(udev, udev->descriptor.iProduct, + buf, sizeof(buf)) > 0) + snprintf(name + strlen(name), sizeof(name) - strlen(name), + " %s", buf); + + printk(KERN_INFO DRIVER_NAME "[%d]: %s on usb%d:%d attached\n", + sz->driver.minor, name, + udev->bus->busnum, sz->udev->devnum); + +#ifdef KERNEL_2_5 + usb_set_intfdata(interface, sz); +#endif + + if (lirc_register_driver(&sz->driver) < 0) { + lirc_buffer_free(&sz->delay_buf); + lirc_buffer_free(&sz->lirc_buf); + goto error; + } + +#ifdef KERNEL_2_5 + return 0; +#else + return sz; +#endif + +error: + + /* + * Premise is that a 'goto error' can be invoked from inside the + * probe function and all necessary cleanup actions will be taken + * including freeing any necessary memory blocks + */ + + if (retval == -ENOMEM) + err("Out of memory"); + + if (sz) { + usb_free_urb(sz->urb_in); +#ifdef KERNEL_2_5 + usb_buffer_free(udev, sz->buf_in_len, sz->buf_in, sz->dma_in); +#else + if (sz->buf_in) { + kfree(sz->buf_in); + } +#endif + kfree(sz); + } + +#ifdef KERNEL_2_5 + return retval; +#else + return NULL; +#endif +} + +static int streamzap_use_inc(void *data) +{ + struct usb_streamzap *sz = data; + + if (!sz) { + dprintk("%s called with no context", -1, __func__); + return -EINVAL; + } + dprintk("set use inc", sz->driver.minor); + MOD_INC_USE_COUNT; + + lirc_buffer_clear(&sz->lirc_buf); + lirc_buffer_clear(&sz->delay_buf); + + sz->flush_timer.expires = jiffies + HZ; + sz->flush = 1; + add_timer(&sz->flush_timer); + + sz->urb_in->dev = sz->udev; +#ifdef KERNEL_2_5 + if (usb_submit_urb(sz->urb_in, GFP_ATOMIC)) { +#else + if (usb_submit_urb(sz->urb_in)) { +#endif + dprintk("open result = -EIO error submitting urb", + sz->driver.minor); + MOD_DEC_USE_COUNT; + return -EIO; + } + sz->in_use++; + + return 0; +} + +static void streamzap_use_dec(void *data) +{ + struct usb_streamzap *sz = data; + + if (!sz) { + dprintk("%s called with no context", -1, __func__); + return; + } + dprintk("set use dec", sz->driver.minor); + + if (sz->flush) { + sz->flush = 0; + del_timer_sync(&sz->flush_timer); + } + + usb_kill_urb(sz->urb_in); + + stop_timer(sz); + + MOD_DEC_USE_COUNT; + sz->in_use--; +} + +static int streamzap_ioctl(struct inode *node, struct file *filep, + unsigned int cmd, unsigned long arg) +{ + int result; + + switch (cmd) { + case LIRC_GET_REC_RESOLUTION: + result = put_user(STREAMZAP_RESOLUTION, (unsigned int *) arg); + if (result) + return result; + break; + default: + return -ENOIOCTLCMD; + } + return 0; +} + +/** + * streamzap_disconnect + * + * Called by the usb core when the device is removed from the system. + * + * This routine guarantees that the driver will not submit any more urbs + * by clearing dev->udev. It is also supposed to terminate any currently + * active urbs. Unfortunately, usb_bulk_msg(), used in streamzap_read(), + * does not provide any way to do this. + */ +#ifdef KERNEL_2_5 +static void streamzap_disconnect(struct usb_interface *interface) +#else +static void streamzap_disconnect(struct usb_device *dev, void *ptr) +#endif +{ + struct usb_streamzap *sz; + int errnum; + int minor; + +#ifdef KERNEL_2_5 + sz = usb_get_intfdata(interface); +#else + sz = ptr; +#endif + + /* unregister from the LIRC sub-system */ + + errnum = lirc_unregister_driver(sz->driver.minor); + if (errnum != 0) + dprintk("error in lirc_unregister: (returned %d)", + sz->driver.minor, errnum); + + lirc_buffer_free(&sz->delay_buf); + lirc_buffer_free(&sz->lirc_buf); + + /* unregister from the USB sub-system */ + + usb_free_urb(sz->urb_in); + +#ifdef KERNEL_2_5 + usb_buffer_free(sz->udev, sz->buf_in_len, sz->buf_in, sz->dma_in); +#else + kfree(sz->buf_in); +#endif + + minor = sz->driver.minor; + kfree(sz); + + printk(KERN_INFO DRIVER_NAME "[%d]: disconnected\n", minor); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0) +static int streamzap_suspend(struct usb_interface *intf, pm_message_t message) +{ + struct usb_streamzap *sz = usb_get_intfdata(intf); + + printk(KERN_INFO DRIVER_NAME "[%d]: suspend\n", sz->driver.minor); + if (sz->in_use) { + if (sz->flush) { + sz->flush = 0; + del_timer_sync(&sz->flush_timer); + } + + stop_timer(sz); + + usb_kill_urb(sz->urb_in); + } + return 0; +} + +static int streamzap_resume(struct usb_interface *intf) +{ + struct usb_streamzap *sz = usb_get_intfdata(intf); + + lirc_buffer_clear(&sz->lirc_buf); + lirc_buffer_clear(&sz->delay_buf); + + if (sz->in_use) { + sz->flush_timer.expires = jiffies + HZ; + sz->flush = 1; + add_timer(&sz->flush_timer); + + sz->urb_in->dev = sz->udev; +#ifdef KERNEL_2_5 + if (usb_submit_urb(sz->urb_in, GFP_ATOMIC)) { +#else + if (usb_submit_urb(sz->urb_in)) { +#endif + dprintk("open result = -EIO error submitting urb", + sz->driver.minor); + MOD_DEC_USE_COUNT; + return -EIO; + } + } + return 0; +} +#endif + +#ifdef MODULE +/** + * usb_streamzap_init + */ +static int __init usb_streamzap_init(void) +{ + int result; + + /* register this driver with the USB subsystem */ + result = usb_register(&streamzap_driver); + + if (result) { + err("usb_register failed. Error number %d", + result); + return result; + } + + printk(KERN_INFO DRIVER_NAME " " DRIVER_VERSION " registered\n"); + return 0; +} + +/** + * usb_streamzap_exit + */ +static void __exit usb_streamzap_exit(void) +{ + usb_deregister(&streamzap_driver); +} + + +module_init(usb_streamzap_init); +module_exit(usb_streamzap_exit); + +MODULE_AUTHOR("Christoph Bartelmus, Greg Wickham, Adrian Dewhurst"); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL"); + +module_param(debug, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable debugging messages"); +EXPORT_NO_SYMBOLS; +#endif /* MODULE */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/lirc/lirc_streamzap/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lirc/lirc_streamzap/Makefile @@ -0,0 +1,2 @@ +EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/.. +obj-$(CONFIG_LIRC_STREAMZAP) += lirc_streamzap.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/include/README +++ linux-fsl-imx51-2.6.31/ubuntu/include/README @@ -0,0 +1,4 @@ +Only use this directory for things which need to share their headers with +other parts of the kernel or other modules in ubuntu/ + +Otherwise, keep them local to the module directory. --- linux-fsl-imx51-2.6.31.orig/ubuntu/include/linux/aufs_type.h +++ linux-fsl-imx51-2.6.31/ubuntu/include/linux/aufs_type.h @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __AUFS_TYPE_H__ +#define __AUFS_TYPE_H__ + +#include + +#define AUFS_VERSION "2-standalone.tree-30-20090727" + +/* todo? move this to linux-2.6.19/include/magic.h */ +#define AUFS_SUPER_MAGIC ('a' << 24 | 'u' << 16 | 'f' << 8 | 's') + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_BRANCH_MAX_127 +/* some environments treat 'char' as 'unsigned char' by default */ +typedef signed char aufs_bindex_t; +#define AUFS_BRANCH_MAX 127 +#else +typedef short aufs_bindex_t; +#ifdef CONFIG_AUFS_BRANCH_MAX_511 +#define AUFS_BRANCH_MAX 511 +#elif defined(CONFIG_AUFS_BRANCH_MAX_1023) +#define AUFS_BRANCH_MAX 1023 +#elif defined(CONFIG_AUFS_BRANCH_MAX_32767) +#define AUFS_BRANCH_MAX 32767 +#endif +#endif + +#ifdef __KERNEL__ +#ifndef AUFS_BRANCH_MAX +#error unknown CONFIG_AUFS_BRANCH_MAX value +#endif +#endif /* __KERNEL__ */ + +/* ---------------------------------------------------------------------- */ + +#define AUFS_NAME "aufs" +#define AUFS_FSTYPE AUFS_NAME + +#define AUFS_ROOT_INO 2 +#define AUFS_FIRST_INO 11 + +#define AUFS_WH_PFX ".wh." +#define AUFS_WH_PFX_LEN ((int)sizeof(AUFS_WH_PFX) - 1) +#define AUFS_XINO_FNAME "." AUFS_NAME ".xino" +#define AUFS_XINO_DEFPATH "/tmp/" AUFS_XINO_FNAME +#define AUFS_XINO_TRUNC_INIT 64 /* blocks */ +#define AUFS_XINO_TRUNC_STEP 4 /* blocks */ +#define AUFS_DIRWH_DEF 3 +#define AUFS_RDCACHE_DEF 10 /* seconds */ +#define AUFS_RDBLK_DEF 512 /* bytes */ +#define AUFS_RDHASH_DEF 32 +#define AUFS_WKQ_NAME AUFS_NAME "d" +#define AUFS_NWKQ_DEF 4 +#define AUFS_MFS_SECOND_DEF 30 /* seconds */ +#define AUFS_PLINK_WARN 100 /* number of plinks */ + +#define AUFS_DIROPQ_NAME AUFS_WH_PFX ".opq" /* whiteouted doubly */ +#define AUFS_WH_DIROPQ AUFS_WH_PFX AUFS_DIROPQ_NAME + +#define AUFS_BASE_NAME AUFS_WH_PFX AUFS_NAME +#define AUFS_PLINKDIR_NAME AUFS_WH_PFX "plnk" +#define AUFS_ORPHDIR_NAME AUFS_WH_PFX "orph" + +/* doubly whiteouted */ +#define AUFS_WH_BASE AUFS_WH_PFX AUFS_BASE_NAME +#define AUFS_WH_PLINKDIR AUFS_WH_PFX AUFS_PLINKDIR_NAME +#define AUFS_WH_ORPHDIR AUFS_WH_PFX AUFS_ORPHDIR_NAME + +/* branch permission */ +#define AUFS_BRPERM_RW "rw" +#define AUFS_BRPERM_RO "ro" +#define AUFS_BRPERM_RR "rr" +#define AUFS_BRPERM_WH "wh" +#define AUFS_BRPERM_NLWH "nolwh" +#define AUFS_BRPERM_ROWH AUFS_BRPERM_RO "+" AUFS_BRPERM_WH +#define AUFS_BRPERM_RRWH AUFS_BRPERM_RR "+" AUFS_BRPERM_WH +#define AUFS_BRPERM_RWNLWH AUFS_BRPERM_RW "+" AUFS_BRPERM_NLWH + +/* ---------------------------------------------------------------------- */ + +/* ioctl */ +enum { + AuCtl_PLINK_MAINT, + AuCtl_PLINK_CLEAN +}; + +#define AuCtlType 'A' +#define AUFS_CTL_PLINK_MAINT _IO(AuCtlType, AuCtl_PLINK_MAINT) +#define AUFS_CTL_PLINK_CLEAN _IO(AuCtlType, AuCtl_PLINK_CLEAN) + +#endif /* __AUFS_TYPE_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/Kconfig @@ -0,0 +1,31 @@ +menu "Compcache options" + +config BLK_DEV_COMPCACHE + tristate "Compressed RAM based swap device" + default m + select LZO_COMPRESS + select LZO_DECOMPRESS + depends on BLOCK + help + This creates RAM based block device which acts as swap disk. Pages + swapped to this disk are compressed and stored in memory itself. + Project Home: http://code.google.com/p/compcache/ + +config BLK_DEV_COMPCACHE_DEBUG + default n + depends on BLK_DEV_COMPCACHE + bool "Enable debugging" + help + This causes negligible performance loss and size increase. + If unsure, say Y. + +config BLK_DEV_COMPCACHE_STATS + default n + depends on BLK_DEV_COMPCACHE + bool "Enable statistics" + help + Creates /proc/compcache to export various statistics. + This adds about 4K to size with negligible performance loss. + If unsure, say Y. + +endmenu --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/BOM @@ -0,0 +1,2 @@ +Downloaded from: http://code.google.com/p/compcache/ +Current Version: 0.5.3 --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/xvmalloc.c +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/xvmalloc.c @@ -0,0 +1,557 @@ +/* + * xvmalloc.c + * + * Copyright (C) 2008, 2009 Nitin Gupta + * + * This code is released using a dual license strategy: GPL/LGPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of GNU General Public License Version 2.0 + * Released under the terms of GNU Lesser General Public License Version 2.1 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "xvmalloc.h" +#include "xvmalloc_int.h" + +static void stat_inc(u64 *value) +{ + *value = *value + 1; +} + +static void stat_dec(u64 *value) +{ + *value = *value - 1; +} + +static int test_flag(struct block_header *block, enum blockflags flag) +{ + return block->prev & BIT(flag); +} + +static void set_flag(struct block_header *block, enum blockflags flag) +{ + block->prev |= BIT(flag); +} + +static void clear_flag(struct block_header *block, enum blockflags flag) +{ + block->prev &= ~BIT(flag); +} + +/* + * Given pair, provide a derefrencable pointer. + * This is called from xv_malloc/xv_free path, so it needs to be fast. + */ +static void *get_ptr_atomic(u32 pagenum, u16 offset, enum km_type type) +{ + unsigned char *base; + + base = kmap_atomic(pfn_to_page(pagenum), type); + return base + offset; +} + +static void put_ptr_atomic(void *ptr, enum km_type type) +{ + kunmap_atomic(ptr, type); +} + +static u32 get_blockprev(struct block_header *block) +{ + return block->prev & PREV_MASK; +} + +static void set_blockprev(struct block_header *block, u16 new_offset) +{ + block->prev = new_offset | (block->prev & FLAGS_MASK); +} + +static struct block_header *BLOCK_NEXT(struct block_header *block) +{ + return (struct block_header *)((char *)block + block->size + XV_ALIGN); +} + +/* + * Get index of free list containing blocks of maximum size + * which is less than or equal to given size. + */ +static u32 get_index_for_insert(u32 size) +{ + if (unlikely(size > XV_MAX_ALLOC_SIZE)) + size = XV_MAX_ALLOC_SIZE; + size &= ~FL_DELTA_MASK; + return (size - XV_MIN_ALLOC_SIZE) >> FL_DELTA_SHIFT; +} + +/* + * Get index of free list having blocks of size greater than + * or equal to requested size. + */ +static u32 get_index(u32 size) +{ + if (unlikely(size < XV_MIN_ALLOC_SIZE)) + size = XV_MIN_ALLOC_SIZE; + size = ALIGN(size, FL_DELTA); + return (size - XV_MIN_ALLOC_SIZE) >> FL_DELTA_SHIFT; +} + +/* + * Allocate a memory page. Called when a pool needs to grow. + */ +static u32 xv_alloc_page(gfp_t flags) +{ + struct page *page; + + //page = alloc_page(GFP_NOIO | __GFP_HIGHMEM); + page = alloc_page(flags); + if (unlikely(!page)) + return 0; + + return page_to_pfn(page); +} + +/* + * Called when all objects in a page are freed. + */ +static void xv_free_page(u32 pagenum) +{ + __free_page(pfn_to_page(pagenum)); +} + +/** + * find_block - find block of at least given size + * @pool: memory pool to search from + * @size: size of block required + * @pagenum: page no. containing required block + * @offset: offset within the page where block is located. + * + * Searches two level bitmap to locate block of at least + * the given size. If such a block is found, it provides + * to identify this block and returns index + * in freelist where we found this block. + * Otherwise, returns 0 and params are not touched. + */ +static u32 find_block(struct xv_pool *pool, u32 size, + u32 *pagenum, u32 *offset) +{ + ulong flbitmap, slbitmap; + u32 flindex, slindex, slbitstart; + + /* There are no free blocks in this pool */ + if (!pool->flbitmap) + return 0; + + /* Get freelist index correspoding to this size */ + slindex = get_index(size); + slbitmap = pool->slbitmap[slindex / BITS_PER_LONG]; + slbitstart = slindex % BITS_PER_LONG; + + /* + * If freelist is not empty at this index, we found the + * block - head of this list. This is approximate best-fit match. + */ + if (test_bit(slbitstart, &slbitmap)) { + *pagenum = pool->freelist[slindex].pagenum; + *offset = pool->freelist[slindex].offset; + return slindex; + } + + /* + * No best-fit found. Search a bit further in bitmap for a free block. + * Second level bitmap consists of series of 32-bit chunks. Search + * further in the chunk where we expected a best-fit, starting from + * index location found above. + */ + slbitstart++; + slbitmap >>= slbitstart; + + /* Skip this search if we were already at end of this bitmap chunk */ + if ((slbitstart != BITS_PER_LONG) && slbitmap) { + slindex += __ffs(slbitmap) + 1; + *pagenum = pool->freelist[slindex].pagenum; + *offset = pool->freelist[slindex].offset; + return slindex; + } + + /* Now do a full two-level bitmap search to find next nearest fit */ + flindex = slindex / BITS_PER_LONG; + + flbitmap = (pool->flbitmap) >> (flindex + 1); + if (!flbitmap) + return 0; + + flindex += __ffs(flbitmap) + 1; + slbitmap = pool->slbitmap[flindex]; + slindex = (flindex * BITS_PER_LONG) + __ffs(slbitmap); + *pagenum = pool->freelist[slindex].pagenum; + *offset = pool->freelist[slindex].offset; + + return slindex; +} + +/* + * Insert block at in freelist of given pool. + * freelist used depends on block size. + */ +static void insert_block(struct xv_pool *pool, u32 pagenum, u32 offset, + struct block_header *block) +{ + u32 flindex, slindex; + struct block_header *nextblock; + + slindex = get_index_for_insert(block->size); + flindex = slindex / BITS_PER_LONG; + + block->link.prev_pagenum = 0; + block->link.prev_offset = 0; + block->link.next_pagenum = pool->freelist[slindex].pagenum; + block->link.next_offset = pool->freelist[slindex].offset; + pool->freelist[slindex].pagenum = pagenum; + pool->freelist[slindex].offset = offset; + + if (block->link.next_pagenum) { + nextblock = get_ptr_atomic(block->link.next_pagenum, + block->link.next_offset, KM_USER1); + nextblock->link.prev_pagenum = pagenum; + nextblock->link.prev_offset = offset; + put_ptr_atomic(nextblock, KM_USER1); + } + + __set_bit(slindex % BITS_PER_LONG, &pool->slbitmap[flindex]); + __set_bit(flindex, &pool->flbitmap); +} + +/* + * Remove block from head of freelist. Index 'slindex' identifies the freelist. + */ +static void remove_block_head(struct xv_pool *pool, + struct block_header *block, u32 slindex) +{ + struct block_header *tmpblock; + u32 flindex = slindex / BITS_PER_LONG; + + pool->freelist[slindex].pagenum = block->link.next_pagenum; + pool->freelist[slindex].offset = block->link.next_offset; + block->link.prev_pagenum = 0; + block->link.prev_offset = 0; + + if (!pool->freelist[slindex].pagenum) { + __clear_bit(slindex % BITS_PER_LONG, &pool->slbitmap[flindex]); + if (!pool->slbitmap[flindex]) + __clear_bit(flindex, &pool->flbitmap); + } else { + /* + * DEBUG ONLY: We need not reinitialize freelist head previous + * pointer to 0 - we never depend on its value. But just for + * sanity, lets do it. + */ + tmpblock = get_ptr_atomic(pool->freelist[slindex].pagenum, + pool->freelist[slindex].offset, KM_USER1); + tmpblock->link.prev_pagenum = 0; + tmpblock->link.prev_offset = 0; + put_ptr_atomic(tmpblock, KM_USER1); + } +} + +/* + * Remove block from freelist. Index 'slindex' identifies the freelist. + */ +static void remove_block(struct xv_pool *pool, u32 pagenum, u32 offset, + struct block_header *block, u32 slindex) +{ + u32 flindex; + struct block_header *tmpblock; + + if (pool->freelist[slindex].pagenum == pagenum + && pool->freelist[slindex].offset == offset) { + remove_block_head(pool, block, slindex); + return; + } + + flindex = slindex / BITS_PER_LONG; + + if (block->link.prev_pagenum) { + tmpblock = get_ptr_atomic(block->link.prev_pagenum, + block->link.prev_offset, KM_USER1); + tmpblock->link.next_pagenum = block->link.next_pagenum; + tmpblock->link.next_offset = block->link.next_offset; + put_ptr_atomic(tmpblock, KM_USER1); + } + + if (block->link.next_pagenum) { + tmpblock = get_ptr_atomic(block->link.next_pagenum, + block->link.next_offset, KM_USER1); + tmpblock->link.prev_pagenum = block->link.prev_pagenum; + tmpblock->link.prev_offset = block->link.prev_offset; + put_ptr_atomic(tmpblock, KM_USER1); + } + + return; +} + +/* + * Allocate a page and add it freelist of given pool. + */ +static int grow_pool(struct xv_pool *pool, gfp_t flags) +{ + u32 pagenum; + struct block_header *block; + + pagenum = xv_alloc_page(flags); + if (unlikely(!pagenum)) + return -ENOMEM; + + stat_inc(&pool->total_pages); + + spin_lock(&pool->lock); + block = get_ptr_atomic(pagenum, 0, KM_USER0); + + block->size = PAGE_SIZE - XV_ALIGN; + set_flag(block, BLOCK_FREE); + clear_flag(block, PREV_FREE); + set_blockprev(block, 0); + + insert_block(pool, pagenum, 0, block); + + put_ptr_atomic(block, KM_USER0); + spin_unlock(&pool->lock); + + return 0; +} + +/* + * Create a memory pool. Allocates freelist, bitmaps and other + * per-pool metadata. + */ +struct xv_pool *xv_create_pool(void) +{ + u32 ovhd_size; + struct xv_pool *pool; + + ovhd_size = roundup(sizeof(*pool), PAGE_SIZE); + pool = kzalloc(ovhd_size, GFP_KERNEL); + if (!pool) + return NULL; + + spin_lock_init(&pool->lock); + + return pool; +} +EXPORT_SYMBOL_GPL(xv_create_pool); + +void xv_destroy_pool(struct xv_pool *pool) +{ + kfree(pool); +} +EXPORT_SYMBOL_GPL(xv_destroy_pool); + +/** + * xv_malloc - Allocate block of given size from pool. + * @pool: pool to allocate from + * @size: size of block to allocate + * @pagenum: page no. that holds the object + * @offset: location of object within pagenum + * + * On success, identifies block allocated + * and 0 is returned. On failure, is set to + * 0 and -ENOMEM is returned. + * + * Allocation requests with size > XV_MAX_ALLOC_SIZE will fail. + */ +int xv_malloc(struct xv_pool *pool, u32 size, u32 *pagenum, u32 *offset, + gfp_t flags) +{ + int error; + u32 index, tmpsize, origsize, tmpoffset; + struct block_header *block, *tmpblock; + + *pagenum = 0; + *offset = 0; + origsize = size; + + if (unlikely(!size || size > XV_MAX_ALLOC_SIZE)) + return -ENOMEM; + + size = ALIGN(size, XV_ALIGN); + + spin_lock(&pool->lock); + + index = find_block(pool, size, pagenum, offset); + + if (!*pagenum) { + spin_unlock(&pool->lock); + if (flags & GFP_NOWAIT) + return -ENOMEM; + error = grow_pool(pool, flags); + if (unlikely(error)) + return -ENOMEM; + + spin_lock(&pool->lock); + index = find_block(pool, size, pagenum, offset); + } + + if (!*pagenum) { + spin_unlock(&pool->lock); + return -ENOMEM; + } + + block = get_ptr_atomic(*pagenum, *offset, KM_USER0); + + remove_block_head(pool, block, index); + + /* Split the block if required */ + tmpoffset = *offset + size + XV_ALIGN; + tmpsize = block->size - size; + tmpblock = (struct block_header *)((char *)block + size + XV_ALIGN); + if (tmpsize) { + tmpblock->size = tmpsize - XV_ALIGN; + set_flag(tmpblock, BLOCK_FREE); + clear_flag(tmpblock, PREV_FREE); + + set_blockprev(tmpblock, *offset); + if (tmpblock->size >= XV_MIN_ALLOC_SIZE) + insert_block(pool, *pagenum, tmpoffset, tmpblock); + + if (tmpoffset + XV_ALIGN + tmpblock->size != PAGE_SIZE) { + tmpblock = BLOCK_NEXT(tmpblock); + set_blockprev(tmpblock, tmpoffset); + } + } else { + /* This block is exact fit */ + if (tmpoffset != PAGE_SIZE) + clear_flag(tmpblock, PREV_FREE); + } + + block->size = origsize; + clear_flag(block, BLOCK_FREE); + + put_ptr_atomic(block, KM_USER0); + spin_unlock(&pool->lock); + + *offset += XV_ALIGN; + + return 0; +} +EXPORT_SYMBOL_GPL(xv_malloc); + +/* + * Free block identified with + */ +void xv_free(struct xv_pool *pool, u32 pagenum, u32 offset) +{ + void *page; + struct block_header *block, *tmpblock; + + offset -= XV_ALIGN; + + spin_lock(&pool->lock); + + page = get_ptr_atomic(pagenum, 0, KM_USER0); + block = (struct block_header *)((char *)page + offset); + + /* Catch double free bugs */ + BUG_ON(test_flag(block, BLOCK_FREE)); + + block->size = ALIGN(block->size, XV_ALIGN); + + tmpblock = BLOCK_NEXT(block); + if (offset + block->size + XV_ALIGN == PAGE_SIZE) + tmpblock = NULL; + + /* Merge next block if its free */ + if (tmpblock && test_flag(tmpblock, BLOCK_FREE)) { + /* + * Blocks smaller than XV_MIN_ALLOC_SIZE + * are not inserted in any free list. + */ + if (tmpblock->size >= XV_MIN_ALLOC_SIZE) { + remove_block(pool, pagenum, + offset + block->size + XV_ALIGN, tmpblock, + get_index_for_insert(tmpblock->size)); + } + block->size += tmpblock->size + XV_ALIGN; + } + + /* Merge previous block if its free */ + if (test_flag(block, PREV_FREE)) { + tmpblock = (struct block_header *)((char *)(page) + + get_blockprev(block)); + offset = offset - tmpblock->size - XV_ALIGN; + + if (tmpblock->size >= XV_MIN_ALLOC_SIZE) + remove_block(pool, pagenum, offset, tmpblock, + get_index_for_insert(tmpblock->size)); + + tmpblock->size += block->size + XV_ALIGN; + block = tmpblock; + } + + /* No used objects in this page. Free it. */ + if (block->size == PAGE_SIZE - XV_ALIGN) { + put_ptr_atomic(page, KM_USER0); + spin_unlock(&pool->lock); + + xv_free_page(pagenum); + stat_dec(&pool->total_pages); + return; + } + + set_flag(block, BLOCK_FREE); + if (block->size >= XV_MIN_ALLOC_SIZE) + insert_block(pool, pagenum, offset, block); + + if (offset + block->size + XV_ALIGN != PAGE_SIZE) { + tmpblock = BLOCK_NEXT(block); + set_flag(tmpblock, PREV_FREE); + set_blockprev(tmpblock, offset); + } + + put_ptr_atomic(page, KM_USER0); + spin_unlock(&pool->lock); + + return; +} +EXPORT_SYMBOL_GPL(xv_free); + +u32 xv_get_object_size(void *obj) +{ + struct block_header *blk; + + blk = (struct block_header *)((char *)(obj) - XV_ALIGN); + return blk->size; +} +EXPORT_SYMBOL_GPL(xv_get_object_size); + +/* + * Returns total memory used by allocator (userdata + metadata) + */ +u64 xv_get_total_size_bytes(struct xv_pool *pool) +{ + return pool->total_pages << PAGE_SHIFT; +} +EXPORT_SYMBOL_GPL(xv_get_total_size_bytes); + +static int __init xv_malloc_init(void) +{ + return 0; +} + +static void __exit xv_malloc_exit(void) +{ + return; +} + +module_init(xv_malloc_init); +module_exit(xv_malloc_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nitin Gupta "); +MODULE_DESCRIPTION("xvmalloc memory allocator"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/ramzswap.h +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/ramzswap.h @@ -0,0 +1,159 @@ +/* + * Compressed RAM based swap device + * + * Copyright (C) 2008, 2009 Nitin Gupta + * + * This RAM based block device acts as swap disk. + * Pages swapped to this device are compressed and + * stored in memory. + * + * Released under the terms of GNU General Public License Version 2.0 + * + * Project home: http://compcache.googlecode.com + */ + +#ifndef _RAMZSWAP_H_ +#define _RAMZSWAP_H_ + +#include "xvmalloc.h" + +/* + * Stored at beginning of each compressed object. + * + * It stores back-reference to table entry which points to this + * object. This is required to support memory defragmentation or + * migrating compressed pages to backing swap disk. + */ +struct zobj_header { +#if 0 + u32 table_idx; +#endif +}; + +/*-- Configurable parameters */ + +/* Default ramzswap disk size: 25% of total RAM */ +#define DEFAULT_DISKSIZE_PERC_RAM 25 +#define DEFAULT_MEMLIMIT_PERC_RAM 15 + +/* + * Max compressed page size when backing device is provided. + * Pages that compress to size greater than this are sent to + * physical swap disk. + */ +#define MAX_CPAGE_SIZE_BDEV (PAGE_SIZE / 2) + +/* + * Max compressed page size when there is no backing dev. + * Pages that compress to size greater than this are stored + * uncompressed in memory. + */ +#define MAX_CPAGE_SIZE_NOBDEV (PAGE_SIZE / 4 * 3) + +/* + * NOTE: MAX_CPAGE_SIZE_{BDEV,NOBDEV} sizes must be + * less than or equal to: + * XV_MAX_ALLOC_SIZE - sizeof(struct zobj_header) + * since otherwise xvMalloc would always return failure. + */ + +/*-- End of configurable params */ + +#define SECTOR_SHIFT 9 +#define SECTOR_SIZE (1 << SECTOR_SHIFT) +#define SECTORS_PER_PAGE_SHIFT (PAGE_SHIFT - SECTOR_SHIFT) +#define SECTORS_PER_PAGE (1 << SECTORS_PER_PAGE_SHIFT) + +/* Message prefix */ +#define C "ramzswap: " + +/* Debugging and Stats */ +#define NOP do { } while (0) + +#if defined(CONFIG_BLK_DEV_RAMZSWAP_STATS) +#define STATS +#endif + +#if defined(STATS) +#define stat_inc(stat) ((stat)++) +#define stat_dec(stat) ((stat)--) +#define stat_inc_if_less(stat, val1, val2) \ + ((stat) += ((val1) < (val2) ? 1 : 0)) +#define stat_dec_if_less(stat, val1, val2) \ + ((stat) -= ((val1) < (val2) ? 1 : 0)) +#else /* STATS */ +#define stat_inc(x) NOP +#define stat_dec(x) NOP +#define stat_inc_if_less(x, v1, v2) NOP +#define stat_dec_if_less(x, v1, v2) NOP +#endif /* STATS */ + +/* Flags for ramzswap pages (table[page_no].flags) */ +enum rzs_pageflags { + /* Page is stored uncompressed */ + RZS_UNCOMPRESSED, + + /* Page consists entirely of zeros */ + RZS_ZERO, + + __NR_RZS_PAGEFLAGS, +}; + +/*-- Data structures */ + +/* Indexed by page no. */ +struct table { + u32 pagenum; + u16 offset; + u8 count; /* object ref count (not yet used) */ + u8 flags; +}; + +struct ramzswap { + struct xv_pool *mem_pool; + void *compress_workmem; + void *compress_buffer; + struct table *table; + struct mutex lock; + struct gendisk *disk; + /* + * This is limit on compressed data size (stats.compr_size) + * Its applicable only when backing swap device is present. + */ + size_t memlimit; /* bytes */ + /* + * This is limit on amount of *uncompressed* worth of data + * we can hold. When backing swap device is provided, it is + * set equal to device size. + */ + size_t disksize; /* bytes */ + + /* backing swap device info */ + struct block_device *backing_swap; + struct file *swap_file; + int old_block_size; +}; + +struct ramzswap_stats { + /* basic stats */ + size_t compr_size; /* compressed size of pages stored - + * needed to enforce memlimit */ + /* more stats */ +#if defined(STATS) + u64 num_reads; /* failed + successful */ + u64 num_writes; /* --do-- */ + u64 failed_reads; /* can happen when memory is too low */ + u64 failed_writes; /* should NEVER! happen */ + u64 invalid_io; /* non-swap I/O requests */ + u64 pages_discard; /* no. of pages freed by discard callback */ + u32 pages_zero; /* no. of zero filled pages */ + u32 pages_stored; /* no. of pages currently stored */ + u32 good_compress; /* no. of pages with compression ratio<=50% */ + u32 pages_expand; /* no. of incompressible pages */ + u64 bdev_num_reads; /* no. of reads on backing dev */ + u64 bdev_num_writes; /* no. of writes on backing dev */ +#endif +}; +/*-- */ + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/LGPL-2.1.txt +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/LGPL-2.1.txt @@ -0,0 +1,510 @@ + + GNU LESSER GENERAL PUBLIC LICENSE + Version 2.1, February 1999 + + Copyright (C) 1991, 1999 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + +[This is the first released version of the Lesser GPL. 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Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James + Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! + + --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_BLK_DEV_COMPCACHE) := ramzswap.o xvmalloc.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/xvmalloc_int.h +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/xvmalloc_int.h @@ -0,0 +1,86 @@ +/* + * xvmalloc_int.c + * + * Copyright (C) 2008, 2009 Nitin Gupta + * + * This code is released using a dual license strategy: GPL/LGPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of GNU General Public License Version 2.0 + * Released under the terms of GNU Lesser General Public License Version 2.1 + */ + +#ifndef _XVMALLOC_INT_H_ +#define _XVMALLOC_INT_H_ + +#include +#include + +/* User configurable params */ + +/* This must be greater than sizeof(LinkFree) */ +#define XV_MIN_ALLOC_SIZE 32 +#define XV_MAX_ALLOC_SIZE (PAGE_SIZE - XV_ALIGN) + +/* Must be power of two */ +#define XV_ALIGN_SHIFT 2 +#define XV_ALIGN (1 << XV_ALIGN_SHIFT) +#define XV_ALIGN_MASK (XV_ALIGN - 1) + +/* Free lists are separated by FL_DELTA bytes */ +#define FL_DELTA_SHIFT 3 +#define FL_DELTA (1 << FL_DELTA_SHIFT) +#define FL_DELTA_MASK (FL_DELTA - 1) +#define NUM_FREE_LISTS ((XV_MAX_ALLOC_SIZE - XV_MIN_ALLOC_SIZE) \ + / FL_DELTA + 1) + +#define MAX_FLI DIV_ROUND_UP(NUM_FREE_LISTS, BITS_PER_LONG) + +/* End of user params */ + +enum blockflags { + BLOCK_FREE, + PREV_FREE, + __NR_BLOCKFLAGS, +}; + +#define FLAGS_MASK XV_ALIGN_MASK +#define PREV_MASK (~FLAGS_MASK) + +struct freelist_entry { + u32 pagenum; + u16 offset; + u16 pad; +}; + +struct link_free { + u32 prev_pagenum; + u32 next_pagenum; + u16 prev_offset; + u16 next_offset; +}; + +struct block_header { + union { + /* This common header must be ALIGN bytes */ + u8 common[XV_ALIGN]; + struct { + u16 size; + u16 prev; + }; + }; + struct link_free link; +}; + +struct xv_pool { + ulong flbitmap; + ulong slbitmap[MAX_FLI]; + spinlock_t lock; + + struct freelist_entry freelist[NUM_FREE_LISTS]; + + /* stats */ + u64 total_pages; +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/compat.h +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/compat.h @@ -0,0 +1,34 @@ +#ifndef _CCACHE_COMPAT_H_ +#define _CCACHE_COMPAT_H_ + +#include + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23) +#define BIO_IO_ERROR(bio) bio_io_error(bio, PAGE_SIZE) +#define BIO_ENDIO(bio, error) bio_endio(bio, PAGE_SIZE, error) +#else +#define BIO_IO_ERROR(bio) bio_io_error(bio) +#define BIO_ENDIO(bio, error) bio_endio(bio, error) +#endif + +#ifndef pr_err +#define pr_err(fmt, arg...) \ + printk(KERN_ERR fmt, ##arg) +#endif + +#ifndef pr_warning +#define pr_warning(fmt, arg...) \ + printk(KERN_WARNING fmt, ##arg) +#endif + +#ifndef pr_info +#define pr_info(fmt, arg...) \ + printk(KERN_ERR fmt, ##arg) +#endif + +#ifdef bio_discard +#define SWAP_DISCARD_SUPPORTED +#endif + +#endif + --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/xvmalloc.h +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/xvmalloc.h @@ -0,0 +1,30 @@ +/* + * xvmalloc.h + * + * Copyright (C) 2008, 2009 Nitin Gupta + * + * This code is released using a dual license strategy: GPL/LGPL + * You can choose the licence that better fits your requirements. + * + * Released under the terms of GNU General Public License Version 2.0 + * Released under the terms of GNU Lesser General Public License Version 2.1 + */ + +#ifndef _XVMALLOC_H_ +#define _XVMALLOC_H_ + +#include + +struct xv_pool; + +struct xv_pool *xv_create_pool(void); +void xv_destroy_pool(struct xv_pool *pool); + +int xv_malloc(struct xv_pool *pool, u32 size, u32 *pagenum, u32 *offset, + gfp_t flags); +void xv_free(struct xv_pool *pool, u32 pagenum, u32 offset); + +u32 xv_get_object_size(void *obj); +u64 xv_get_total_size_bytes(struct xv_pool *pool); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/GPL.txt +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/GPL.txt @@ -0,0 +1,280 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, +INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING +OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED +TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY +YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE +POSSIBILITY OF SUCH DAMAGES. + + END OF TERMS AND CONDITIONS --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/Changelog +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/Changelog @@ -0,0 +1,82 @@ +version 0.5.3 (8/4/2009) + - Major cleanups. + - Rename module: compcache.ko -> ramzswap.ko + - Rename params: backing_dev -> backing_swap + - Updated use_compcache.sh script with detailed + documentation on parameters. + - LZO de/compress modules are no longer packaged + with compcache. Most distros now include these. + +version 0.5.2 (11/3/2009) + - Can forward incompressible pages to physical swap disk. + - New module params: + - memlimit_kb + - disksize_kb + - backing_dev + See use_compcache.sh for documentation on these params. + - Modified use_compcache.sh script to handle new params. + - Detect zero-filled pages and don't allocate any memory + for them. + +version 0.5.1 (22/1/2009) + - Fix crash on x86 systems with higmem (mem > ~1G). + This required minor changes to atomic (un)map functions (see Issue #20). + +version 0.5 (16/1/2009) + - Fix crash in case compcache init fails. + +version 0.5pre4 (10/1/2009) + - Support discarding pages for freed swap blocks (requires 2.6.28-git14). + This feature will be disabled if compiled for older kernel. + - Mark ramzswap as "solid-state" block device (requires 2.6.26-git14). + - Fixed incorrect stats reporting in /proc/compcache (some + new stats added too). + +version 0.5pre3 (5/1/2009) + - Use kmap_atomic() in xvMalloc. This fixes issue #19 + - Remove xvMapPage() and xvUnmapMap() from xvMalloc. + +version 0.5pre2 (28/10/2008) + - Alloc full page for uncompressible pages instead + of returning I/O error. + - Warn users when using ramzswap > (2 x RAM size) + +version 0.5pre1 (15/10/2008) + - Replaced TLSF with xvMalloc memory allocator + http://code.google.com/p/compcache/wiki/xvMalloc + +version 0.4 (13/8/2008) + - Enable debug and stats option for compcache and tlsf by default + proc nodes: /proc/{tlsfinfo,compcache} + - Fix crash when reading /proc/tlsfinfo + - Lots of cleanups: clean compile on x64 + +version 0.3 (17/3/2008) + - Fix spurious swap read failures + - Better swap request filtering + - Swap device again renamed to /dev/ramzswap0 + This is to prevent Ubuntu installer from presenting + this device as possible installation target (see Issue #5) + - use_compcache.sh script now waits for disk node to be created + instead of arbitrary sleep (see Issue #6). + - Modified scripts: use_compcache.sh and unuse_compcache.sh + to now use new device name (compcache0 -> ramzswap0). + +version 0.2 (3/3/2008) + - Fixed bug on systems with highmem + - Better filtering-out of non-swap requests + - Export statistics through proc nodes: + - /proc/compcache + - /proc/tlsfinfo + - Debug and Statistics support for allocator + and compcache can now be individually turned + on/off by setting DEBUG, STATS to 0/1 in + respective header files + - Swap device now renamed to /dev/compcache0 + - Added scripts: use_compcache.sh and unuse_compcache.sh + See README for usage + - Default compcache size set to 25% of RAM + - Lots of code cleanups + - Updated README + - Created Changelog :) + --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/README +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/README @@ -0,0 +1,45 @@ +ramzswap: Compressed RAM based swap device +------------------------------------------- + +Project home: http://compcache.googlecode.com + +* Introduction +This is a RAM based block device which acts as swap disk. +Pages swapped to this device are compressed and stored in +memory itself. See project home for use cases, performance +numbers and lot more. + +* Compiling + - Run 'make': this will compile all modules against your kernel. + + - Following kernel modules are created: + - xvmalloc.ko + - ramzswap.ko + +* Using + - Following scipts are included + - use_ramzswap.sh [] [] + This loads all required modules and sets up swap device. + NOTE: script contains detailed documentation on parameters. + + - unuse_ramzswap.sh + Unloads all modules and turns off ramzswap swap device. + +* Common Problems + - If you get lots of compile errors, make sure you have package for + kernel source installed. For e.g., on Fedora its 'kernel-devel' package. + + - If (un)use_ramzswap scripts fail to work, refer to wiki: + http://code.google.com/p/compcache/wiki/CompilingAndUsing + +* Notes + - Statistics are exported via /proc/ramzswap + +Please consider using Issue Tracker: +http://code.google.com/p/compcache/issues/list +for reporting any bugs/feature requests. + +Cheers! +Nitin Gupta +EMail: ngupta at vflare dot org + --- linux-fsl-imx51-2.6.31.orig/ubuntu/compcache/ramzswap.c +++ linux-fsl-imx51-2.6.31/ubuntu/compcache/ramzswap.c @@ -0,0 +1,1049 @@ +/* + * Compressed RAM based swap device + * + * Copyright (C) 2008, 2009 Nitin Gupta + * + * This RAM based block device acts as swap disk. + * Pages swapped to this device are compressed and + * stored in memory. + * + * Released under the terms of GNU General Public License Version 2.0 + * + * Project home: http://compcache.googlecode.com + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "compat.h" +#include "ramzswap.h" + +/* Globals */ +static struct ramzswap rzs; +static struct ramzswap_stats stats; +/* + * Pages that compress to larger than this size are + * forwarded to backing swap, if present or stored + * uncompressed in memory otherwise. + */ +static unsigned int MAX_CPAGE_SIZE; + +/* Module params (documentation at end) */ +static unsigned long disksize_kb; +static unsigned long memlimit_kb; +static char *backing_swap; + +static int __init ramzswap_init(void); +static struct block_device_operations ramzswap_devops = { + .owner = THIS_MODULE, +}; + +static int test_flag(u32 index, enum rzs_pageflags flag) +{ + return rzs.table[index].flags & BIT(flag); +} + +static void set_flag(u32 index, enum rzs_pageflags flag) +{ + rzs.table[index].flags |= BIT(flag); +} + +static void clear_flag(u32 index, enum rzs_pageflags flag) +{ + rzs.table[index].flags &= ~BIT(flag); +} + +static int page_zero_filled(void *ptr) +{ + u32 pos; + u64 *page; + + page = (u64 *)ptr; + + for (pos = 0; pos != PAGE_SIZE / sizeof(*page); pos++) { + if (page[pos]) + return 0; + } + + return 1; +} + +/* + * Given pair, provide a dereferencable pointer. + */ +static void *get_ptr_atomic(u32 pagenum, u16 offset, enum km_type type) +{ + unsigned char *page; + + page = kmap_atomic(pfn_to_page(pagenum), type); + return page + offset; +} + +static void put_ptr_atomic(void *ptr, enum km_type type) +{ + kunmap_atomic(ptr, type); +} + +#if defined(STATS) +static struct proc_dir_entry *proc; + +static int proc_ramzswap_read(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + int len; + size_t succ_writes, mem_used; + unsigned int good_compress_perc = 0, no_compress_perc = 0; + + mem_used = xv_get_total_size_bytes(rzs.mem_pool) + + (stats.pages_expand << PAGE_SHIFT); + + if (off > 0) { + *eof = 1; + return 0; + } + +#define K(x) ((x) >> 10) + /* Basic stats */ + len = sprintf(page, + "DiskSize: %8zu kB\n", + (size_t)(K(rzs.disksize))); + + if (rzs.backing_swap) { + /* This must always be less than ComprDataSize */ + len += sprintf(page + len, + "MemLimit: %8zu kB\n", + K(rzs.memlimit)); + } + + succ_writes = stats.num_writes - stats.failed_writes; + + if (succ_writes && stats.pages_stored) { + good_compress_perc = stats.good_compress * 100 + / stats.pages_stored; + no_compress_perc = stats.pages_expand * 100 + / stats.pages_stored; + } + + /* Extended stats */ + len += sprintf(page + len, + "NumReads: %8llu\n" + "NumWrites: %8llu\n" + "FailedReads: %8llu\n" + "FailedWrites: %8llu\n" + "InvalidIO: %8llu\n" + "PagesDiscard: %8llu\n" + "ZeroPages: %8u\n" + "GoodCompress: %8u %%\n" + "NoCompress: %8u %%\n" + "PagesStored: %8u\n" + "PagesUsed: %8zu\n" + "OrigDataSize: %8zu kB\n" + "ComprDataSize: %8zu kB\n" + "MemUsedTotal: %8zu kB\n", + stats.num_reads, + stats.num_writes, + stats.failed_reads, + stats.failed_writes, + stats.invalid_io, + stats.pages_discard, + stats.pages_zero, + good_compress_perc, + no_compress_perc, + stats.pages_stored, + mem_used >> PAGE_SHIFT, + (size_t)(K(stats.pages_stored << PAGE_SHIFT)), + (size_t)(K(stats.compr_size)), + (size_t)(K(mem_used))); + + if (rzs.backing_swap) { + /* This must always be less than ComprDataSize */ + len += sprintf(page + len, + "BDevNumReads: %8llu\n" + "BDevNumWrites: %8llu\n", + stats.bdev_num_reads, + stats.bdev_num_writes); + } + + return len; +} +#endif /* STATS */ + +/* + * Check if value of backing_swap module param is sane. + * Claim this device and set ramzswap size equal to + * size of this block device. + */ +static int setup_backing_swap(void) +{ + int error = 0; + struct inode *inode; + struct file *swap_file; + struct address_space *mapping; + struct block_device *bdev = NULL; + + if (backing_swap == NULL) { + pr_debug(C "backing_swap param not given\n"); + goto out; + } + + pr_info(C "Using backing swap device: %s\n", backing_swap); + + swap_file = filp_open(backing_swap, O_RDWR | O_LARGEFILE, 0); + if (IS_ERR(swap_file)) { + pr_err(C "Error opening backing device: %s\n", backing_swap); + error = -EINVAL; + goto out; + } + + mapping = swap_file->f_mapping; + inode = mapping->host; + + if (S_ISBLK(inode->i_mode)) { + bdev = I_BDEV(inode); + error = bd_claim(bdev, ramzswap_init); + if (error < 0) { + bdev = NULL; + goto bad_param; + } + rzs.old_block_size = block_size(bdev); + error = set_blocksize(bdev, PAGE_SIZE); + if (error < 0) + goto bad_param; + } else { + /* TODO: support for regular file as backing swap */ + pr_info(C "%s is not a block device.\n", backing_swap); + error = -EINVAL; + goto out; + } + + rzs.swap_file = swap_file; + rzs.backing_swap = bdev; + rzs.disksize = i_size_read(inode); + BUG_ON(!rzs.disksize); + + return 0; + +bad_param: + if (bdev) { + set_blocksize(bdev, rzs.old_block_size); + bd_release(bdev); + } + filp_close(swap_file, NULL); + +out: + rzs.backing_swap = NULL; + return error; +} + +/* + * Check if request is within bounds and page aligned. + */ +static inline int valid_swap_request(struct bio *bio) +{ + if (unlikely( + (bio->bi_sector >= (rzs.disksize >> SECTOR_SHIFT)) || + (bio->bi_sector & (SECTORS_PER_PAGE - 1)) || + (bio->bi_vcnt != 1) || + (bio->bi_size != PAGE_SIZE) || + (bio->bi_io_vec[0].bv_offset != 0))) { + + return 0; + } + + /* swap request is valid */ + return 1; +} + +static void ramzswap_free_page(size_t index) +{ + u32 clen; + void *obj; + + u32 pagenum = rzs.table[index].pagenum; + u32 offset = rzs.table[index].offset; + + if (unlikely(test_flag(index, RZS_UNCOMPRESSED))) { + clen = PAGE_SIZE; + __free_page(pfn_to_page(pagenum)); + clear_flag(index, RZS_UNCOMPRESSED); + stat_dec(stats.pages_expand); + goto out; + } + + obj = get_ptr_atomic(pagenum, offset, KM_USER0); + clen = xv_get_object_size(obj) - sizeof(struct zobj_header); + put_ptr_atomic(obj, KM_USER0); + + xv_free(rzs.mem_pool, pagenum, offset); + stat_dec_if_less(stats.good_compress, clen, PAGE_SIZE / 2 + 1); + +out: + stats.compr_size -= clen; + stat_dec(stats.pages_stored); + + rzs.table[index].pagenum = 0; + rzs.table[index].offset = 0; +} + +#ifdef SWAP_DISCARD_SUPPORTED +static int ramzswap_prepare_discard(struct request_queue *q, + struct request *req) +{ + return 0; +} + +/* + * Called by main I/O handler function. This helper + * function handles 'discard' I/O requests which means + * that some swap pages are no longer required, so + * swap device can take needed action -- we free memory + * allocated for these pages. + */ +static int ramzswap_discard(struct bio *bio) +{ + size_t index, start_page, num_pages; + + start_page = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; + num_pages = bio->bi_size >> (SECTOR_SHIFT + SECTORS_PER_PAGE_SHIFT); + + for (index = start_page; index < start_page + num_pages; index++) { + if (rzs.table[index].pagenum) { + ramzswap_free_page(index); + stat_inc(stats.pages_discard); + } + } + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; +} +#endif + +int handle_zero_page(struct bio *bio) +{ + void *user_mem; + struct page *page = bio->bi_io_vec[0].bv_page; + + user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0); + memset(user_mem, 0, PAGE_SIZE); + put_ptr_atomic(user_mem, KM_USER0); + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; +} + +int handle_uncompressed_page(struct bio *bio) +{ + u32 index; + struct page *page; + unsigned char *user_mem, *cmem; + + page = bio->bi_io_vec[0].bv_page; + index = bio->bi_sector >>SECTORS_PER_PAGE_SHIFT; + + user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0); + cmem = get_ptr_atomic(rzs.table[index].pagenum, + rzs.table[index].offset, KM_USER1); + + memcpy(user_mem, cmem, PAGE_SIZE); + put_ptr_atomic(user_mem, KM_USER0); + put_ptr_atomic(cmem, KM_USER1); + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; +} + + +/* + * Called when request page is not present in ramzswap. + * Its either in backing swap device (if present) or + * this is an attempt to read before any previous write + * to this location - this happens due to readahead when + * swap device is read from user-space (e.g. during swapon) + */ +int handle_ramzswap_fault(struct bio *bio) +{ + void *user_mem; + struct page *page = bio->bi_io_vec[0].bv_page; + + /* + * Always forward such requests to backing swap + * device (if present) + */ + if (rzs.backing_swap) { + stat_dec(stats.num_reads); + stat_inc(stats.bdev_num_reads); + bio->bi_bdev = rzs.backing_swap; + return 1; + } + + /* + * Its unlikely event in case backing dev is + * not present + */ + pr_debug(C "Read before write on swap device: " + "sector=%lu, size=%u, offset=%u\n", + (ulong)(bio->bi_sector), bio->bi_size, + bio->bi_io_vec[0].bv_offset); + user_mem = kmap(page); + memset(user_mem, 0, PAGE_SIZE); + kunmap(page); + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; +} + +int ramzswap_read(struct bio *bio) +{ + int ret; + u32 index; + size_t clen; + struct page *page; + struct zobj_header *zheader; + unsigned char *user_mem, *cmem; + + stat_inc(stats.num_reads); + + page = bio->bi_io_vec[0].bv_page; + index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; + + if (test_flag(index, RZS_ZERO)) + return handle_zero_page(bio); + + /* Requested page is not present in compressed area */ + if (!rzs.table[index].pagenum) + return handle_ramzswap_fault(bio); + + /* Page is stored uncompressed since its incompressible */ + if (unlikely(test_flag(index, RZS_UNCOMPRESSED))) + return handle_uncompressed_page(bio); + + user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0); + clen = PAGE_SIZE; + + cmem = get_ptr_atomic(rzs.table[index].pagenum, + rzs.table[index].offset, KM_USER1); + + ret = lzo1x_decompress_safe( + cmem + sizeof(*zheader), + xv_get_object_size(cmem) - sizeof(*zheader), + user_mem, &clen); + + put_ptr_atomic(user_mem, KM_USER0); + put_ptr_atomic(cmem, KM_USER1); + + /* should NEVER happen */ + if (unlikely(ret != LZO_E_OK)) { + pr_err(C "Decompression failed! err=%d, page=%u\n", + ret, index); + stat_inc(stats.failed_reads); + goto out; + } + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; + +out: + BIO_IO_ERROR(bio); + return 0; +} + +int ramzswap_write(struct bio *bio) +{ + int ret, fwd_write_request = 0; + u32 offset; + size_t clen, index; + struct zobj_header *zheader; + struct page *page, *page_store; + unsigned char *user_mem, *cmem, *src; + + stat_inc(stats.num_writes); + + page = bio->bi_io_vec[0].bv_page; + index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT; + + src = rzs.compress_buffer; + + /* + * System swaps to same sector again when the stored page + * is no longer referenced by any process. So, its now safe + * to free the memory that was allocated for this page. + */ + if (rzs.table[index].pagenum) + ramzswap_free_page(index); + + /* + * No memory ia allocated for zero filled pages. + * Simply clear zero page flag. + */ + if (test_flag(index, RZS_ZERO)) { + stat_dec(stats.pages_zero); + clear_flag(index, RZS_ZERO); + } + + mutex_lock(&rzs.lock); + + user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0); + if (page_zero_filled(user_mem)) { + put_ptr_atomic(user_mem, KM_USER0); + mutex_unlock(&rzs.lock); + stat_inc(stats.pages_zero); + set_flag(index, RZS_ZERO); + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; + } + + if (rzs.backing_swap && + (stats.compr_size > rzs.memlimit - PAGE_SIZE)) { + put_ptr_atomic(user_mem, KM_USER0); + mutex_unlock(&rzs.lock); + fwd_write_request = 1; + goto out; + } + + ret = lzo1x_1_compress(user_mem, PAGE_SIZE, src, &clen, + rzs.compress_workmem); + + put_ptr_atomic(user_mem, KM_USER0); + + if (unlikely(ret != LZO_E_OK)) { + mutex_unlock(&rzs.lock); + pr_err(C "Compression failed! err=%d\n", ret); + stat_inc(stats.failed_writes); + goto out; + } + + /* + * Page is incompressible. Forward it to backing swap + * if present. Otherwise, store it as-is (uncompressed) + * since we do not want to return too many swap write + * errors which has side effect of hanging the system. + */ + if (unlikely(clen > MAX_CPAGE_SIZE)) { + if (rzs.backing_swap) { + mutex_unlock(&rzs.lock); + fwd_write_request = 1; + goto out; + } + + clen = PAGE_SIZE; + page_store = alloc_page(GFP_NOIO | __GFP_HIGHMEM); + if (unlikely(!page_store)) { + mutex_unlock(&rzs.lock); + stat_inc(stats.failed_writes); + goto out; + } + + offset = 0; + set_flag(index, RZS_UNCOMPRESSED); + stat_inc(stats.pages_expand); + rzs.table[index].pagenum = page_to_pfn(page_store); + src = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0); + goto memstore; + } + + if (xv_malloc(rzs.mem_pool, clen + sizeof(*zheader), + &rzs.table[index].pagenum, &offset, + GFP_NOIO | __GFP_HIGHMEM)) { + mutex_unlock(&rzs.lock); + pr_info(C "Error allocating memory for compressed " + "page: %zu, size=%zu\n", index, clen); + stat_inc(stats.failed_writes); + if (rzs.backing_swap) + fwd_write_request = 1; + goto out; + } + +memstore: + rzs.table[index].offset = offset; + + cmem = get_ptr_atomic(rzs.table[index].pagenum, + rzs.table[index].offset, KM_USER1); + +#if 0 + /* Back-reference needed for memory defragmentation */ + if (!test_flag(index, RZS_UNCOMPRESSED)) { + zheader = (struct zobj_header *)cmem; + zheader->table_idx = index; + cmem += sizeof(*zheader); + } +#endif + + memcpy(cmem, src, clen); + + put_ptr_atomic(cmem, KM_USER1); + if (unlikely(test_flag(index, RZS_UNCOMPRESSED))) + put_ptr_atomic(src, KM_USER0); + + /* Update stats */ + stats.compr_size += clen; + stat_inc(stats.pages_stored); + stat_inc_if_less(stats.good_compress, clen, PAGE_SIZE / 2 + 1); + + mutex_unlock(&rzs.lock); + + set_bit(BIO_UPTODATE, &bio->bi_flags); + BIO_ENDIO(bio, 0); + return 0; + +out: + if (fwd_write_request) { + stat_inc(stats.bdev_num_writes); + bio->bi_bdev = rzs.backing_swap; + return 1; + } + + BIO_IO_ERROR(bio); + return 0; +} + +/* + * Handler function for all ramzswap I/O requests. + */ +static int ramzswap_make_request(struct request_queue *queue, struct bio *bio) +{ + int ret = 0; + +#ifdef SWAP_DISCARD_SUPPORTED + if (bio_discard(bio)) + return ramzswap_discard(bio); +#endif + + if (!valid_swap_request(bio)) { + stat_inc(stats.invalid_io); + BIO_IO_ERROR(bio); + return 0; + } + + switch (bio_data_dir(bio)) { + case READ: + ret = ramzswap_read(bio); + break; + + case WRITE: + ret = ramzswap_write(bio); + break; + } + + return ret; +} + +/* + * Swap header (1st page of swap device) contains information + * to indentify it as a swap partition. Prepare such a header + * for ramzswap device (ramzswap0) so that swapon can identify + * it as swap partition. In case backing swap device is provided, + * copy its swap header. + */ +static int setup_swap_header(union swap_header *s) +{ + int ret = 0; + struct page *page; + struct address_space *mapping; + union swap_header *backing_swap_header; + + /* + * There is no backing swap device. Create a swap header + * that is acceptable by swapon. + */ + if (rzs.backing_swap == NULL) { + s->info.version = 1; + s->info.last_page = rzs.disksize >> PAGE_SHIFT; + s->info.nr_badpages = 0; + memcpy(s->magic.magic, "SWAPSPACE2", 10); + return 0; + } + + /* + * We have a backing swap device. Copy its swap header + * to ramzswap device header. If this header contains + * invalid information (backing device not a swap + * partition, etc.), swapon will fail for ramzswap + * which is correct behavior - we don't want to swap + * over filesystem partition! + */ + + /* Read the backing swap header (code from sys_swapon) */ + mapping = rzs.swap_file->f_mapping; + if (!mapping->a_ops->readpage) { + ret = -EINVAL; + goto out; + } + + page = read_mapping_page(mapping, 0, rzs.swap_file); + if (IS_ERR(page)) { + ret = PTR_ERR(page); + goto out; + } + + backing_swap_header = kmap(page); + *s = *backing_swap_header; + kunmap(page); + +out: + return ret; +} + +static void ramzswap_set_disksize(size_t totalram_bytes) +{ + rzs.disksize = disksize_kb << 10; + + if (!disksize_kb) { + pr_info(C + "disk size not provided. You can use disksize_kb module " + "param to specify size.\nUsing default: (%u%% of RAM).\n", + DEFAULT_DISKSIZE_PERC_RAM + ); + rzs.disksize = DEFAULT_DISKSIZE_PERC_RAM * + (totalram_bytes / 100); + } + + if (disksize_kb > 2 * (totalram_bytes >> 10)) { + pr_info(C + "There is little point creating a ramzswap of greater than " + "twice the size of memory since we expect a 2:1 compression " + "ratio. Note that ramzswap uses about 0.1%% of the size of " + "the swap device when not in use so a huge ramzswap is " + "wasteful.\n" + "\tMemory Size: %zu kB\n" + "\tSize you selected: %lu kB\n" + "Continuing anyway ...\n", + totalram_bytes >> 10, disksize_kb + ); + } + + rzs.disksize &= PAGE_MASK; + pr_info(C "disk size set to %zu kB\n", rzs.disksize >> 10); +} + +/* + * memlimit cannot be greater than backing disk size. + */ +static void ramzswap_set_memlimit(size_t totalram_bytes) +{ + int memlimit_valid = 1; + rzs.memlimit = memlimit_kb << 10; + + if (!rzs.memlimit) { + pr_info(C "memory limit not set. You can use " + "memlimit_kb module param to specify limit."); + memlimit_valid = 0; + } + + if (rzs.memlimit > rzs.disksize) { + pr_info(C "memory limit cannot be greater than " + "disksize: limit=%zu, disksize=%zu", + rzs.memlimit, rzs.disksize); + memlimit_valid = 0; + } + + if (!memlimit_valid) { + size_t mempart, disksize; + pr_info(C "\nUsing default: MIN[(%u%% of RAM), " + "(backing disk size)].\n", + DEFAULT_MEMLIMIT_PERC_RAM); + mempart = DEFAULT_MEMLIMIT_PERC_RAM * (totalram_bytes / 100); + disksize = rzs.disksize; + rzs.memlimit = mempart > disksize ? disksize : mempart; + } + + if (rzs.memlimit > totalram_bytes / 2) { + pr_info(C + "Its not advisable setting limit more than half of " + "size of memory since we expect a 2:1 compression ratio. " + "Limit represents amount of *compressed* data we can keep " + "in memory!\n" + "\tMemory Size: %zu kB\n" + "\tLimit you selected: %lu kB\n" + "Continuing anyway ...\n", + totalram_bytes >> 10, memlimit_kb + ); + } + + rzs.memlimit &= PAGE_MASK; + BUG_ON(!rzs.memlimit); + + pr_info(C "memory limit set to %zu kB\n", rzs.memlimit >> 10); +} + +static int __init ramzswap_init(void) +{ + int ret; + size_t num_pages, totalram_bytes; + struct sysinfo i; + struct page *page; + void *swap_header; + + mutex_init(&rzs.lock); + + ret = setup_backing_swap(); + if (ret) + goto fail; + + si_meminfo(&i); + /* Here is a trivia: guess unit used for i.totalram !! */ + totalram_bytes = i.totalram << PAGE_SHIFT; + + if (rzs.backing_swap) + ramzswap_set_memlimit(totalram_bytes); + else + ramzswap_set_disksize(totalram_bytes); + + rzs.compress_workmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL); + if (rzs.compress_workmem == NULL) { + pr_err(C "Error allocating compressor working memory\n"); + ret = -ENOMEM; + goto fail; + } + + rzs.compress_buffer = kmalloc(2 * PAGE_SIZE, GFP_KERNEL); + if (rzs.compress_buffer == NULL) { + pr_err(C "Error allocating compressor buffer space\n"); + ret = -ENOMEM; + goto fail; + } + + num_pages = rzs.disksize >> PAGE_SHIFT; + rzs.table = vmalloc(num_pages * sizeof(*rzs.table)); + if (rzs.table == NULL) { + pr_err(C "Error allocating ramzswap address table\n"); + ret = -ENOMEM; + goto fail; + } + memset(rzs.table, 0, num_pages * sizeof(*rzs.table)); + + page = alloc_page(__GFP_ZERO); + if (page == NULL) { + pr_err(C "Error allocating swap header page\n"); + ret = -ENOMEM; + goto fail; + } + rzs.table[0].pagenum = page_to_pfn(page); + set_flag(0, RZS_UNCOMPRESSED); + + swap_header = kmap(page); + ret = setup_swap_header((union swap_header *)(swap_header)); + kunmap(page); + if (ret) { + pr_err(C "Error setting swap header\n"); + goto fail; + } + + rzs.disk = alloc_disk(1); + if (rzs.disk == NULL) { + pr_err(C "Error allocating disk structure\n"); + ret = -ENOMEM; + goto fail; + } + + rzs.disk->first_minor = 0; + rzs.disk->fops = &ramzswap_devops; + /* + * It is named like this to prevent distro installers + * from offering ramzswap as installation target. They + * seem to ignore all devices beginning with 'ram' + */ + strcpy(rzs.disk->disk_name, "ramzswap0"); + + rzs.disk->major = register_blkdev(0, rzs.disk->disk_name); + if (rzs.disk->major < 0) { + pr_err(C "Cannot register block device\n"); + ret = -EFAULT; + goto fail; + } + + rzs.disk->queue = blk_alloc_queue(GFP_KERNEL); + if (rzs.disk->queue == NULL) { + pr_err(C "Cannot register disk queue\n"); + ret = -EFAULT; + goto fail; + } + + set_capacity(rzs.disk, rzs.disksize >> SECTOR_SHIFT); + blk_queue_make_request(rzs.disk->queue, ramzswap_make_request); + +#ifdef QUEUE_FLAG_NONROT + /* + * Assuming backing device is "rotational" type. + * TODO: check if its actually "non-rotational" (SSD). + * + * We have ident mapping of sectors for ramzswap and + * and the backing swap device. So, this queue flag + * should be according to backing dev. + */ + if (!rzs.backing_swap) + queue_flag_set_unlocked(QUEUE_FLAG_NONROT, rzs.disk->queue); +#endif +#ifdef SWAP_DISCARD_SUPPORTED + blk_queue_set_discard(rzs.disk->queue, ramzswap_prepare_discard); +#endif + blk_queue_logical_block_size(rzs.disk->queue, PAGE_SIZE); + add_disk(rzs.disk); + + rzs.mem_pool = xv_create_pool(); + if (!rzs.mem_pool) { + pr_err(C "Error creating memory pool\n"); + ret = -ENOMEM; + goto fail; + } + +#if defined(STATS) + proc = create_proc_entry("ramzswap", S_IRUGO, NULL); + if (proc) + proc->read_proc = &proc_ramzswap_read; + else { + ret = -ENOMEM; + pr_warning(C "Error creating proc entry\n"); + goto fail; + } +#endif + + /* + * Pages that compress to size greater than this are forwarded + * to physical swap disk (if backing dev is provided) + */ + if (rzs.backing_swap) + MAX_CPAGE_SIZE = MAX_CPAGE_SIZE_BDEV; + else + MAX_CPAGE_SIZE = MAX_CPAGE_SIZE_NOBDEV; + + pr_debug(C "Max compressed page size: %u bytes\n", MAX_CPAGE_SIZE); + + pr_debug(C "Initialization done!\n"); + return 0; + +fail: + if (rzs.disk != NULL) { + if (rzs.disk->major > 0) + unregister_blkdev(rzs.disk->major, rzs.disk->disk_name); + del_gendisk(rzs.disk); + } + + if (rzs.table && rzs.table[0].pagenum) + __free_page(pfn_to_page(rzs.table[0].pagenum)); + kfree(rzs.compress_workmem); + kfree(rzs.compress_buffer); + vfree(rzs.table); + xv_destroy_pool(rzs.mem_pool); +#if defined(STATS) + if (proc) + remove_proc_entry("ramzswap", proc->parent); +#endif + pr_err(C "Initialization failed: err=%d\n", ret); + return ret; +} + +static void __exit ramzswap_exit(void) +{ + size_t index, num_pages; + num_pages = rzs.disksize >> PAGE_SHIFT; + + unregister_blkdev(rzs.disk->major, rzs.disk->disk_name); + del_gendisk(rzs.disk); + + /* Close backing swap device (if present) */ + if (rzs.backing_swap) { + set_blocksize(rzs.backing_swap, rzs.old_block_size); + bd_release(rzs.backing_swap); + filp_close(rzs.swap_file, NULL); + } + + __free_page(pfn_to_page(rzs.table[0].pagenum)); + kfree(rzs.compress_workmem); + kfree(rzs.compress_buffer); + + /* Free all pages that are still in ramzswap */ + for (index = 1; index < num_pages; index++) { + u32 pagenum, offset; + + pagenum = rzs.table[index].pagenum; + offset = rzs.table[index].offset; + + if (!pagenum) + continue; + + if (unlikely(test_flag(index, RZS_UNCOMPRESSED))) + __free_page(pfn_to_page(pagenum)); + else + xv_free(rzs.mem_pool, pagenum, offset); + } + + vfree(rzs.table); + xv_destroy_pool(rzs.mem_pool); + +#if defined(STATS) + remove_proc_entry("ramzswap", proc->parent); +#endif + pr_debug(C "cleanup done!\n"); +} + +/* + * This param is applicable only when there is no backing swap device. + * We ignore this param in case backing dev is provided since then its + * always equal to size of the backing swap device. + * + * This size refers to amount of (uncompressed) data it can hold. + * For e.g. disksize_kb=1024 means it can hold 1024kb worth of + * uncompressed data even if this data compresses to just, say, 100kb. + * + * Default value is used if this param is missing or 0 (if its applicable). + * Default: [DEFAULT_DISKSIZE_PERC_RAM]% of RAM + */ +module_param(disksize_kb, ulong, 0); +MODULE_PARM_DESC(disksize_kb, "ramzswap device size (kB)"); + +/* + * This param is applicable only when backing swap device is provided. + * This refers to limit on amount of (compressed) data it can hold in + * memory. Note that total amount of memory used (MemUsedTotal) can + * exceed this memlimit since that includes memory wastage due to + * fragmentation and metadata overhead. + * + * Any additional data beyond this limit is forwarded to backing + * swap device. TODO: allow changing memlimit at runtime. + * + * Default value is used if this param is missing or 0 (if its applicable). + * Default: MIN([DEFAULT_MEMLIMIT_PERC_RAM]% of RAM, Backing Device Size) + */ +module_param(memlimit_kb, ulong, 0); +MODULE_PARM_DESC(memlimit_kb, "ramzswap memory limit (kB)"); + +/* + * This is block device to be used as backing store for ramzswap. + * When pages more than memlimit_kb as swapped to ramzswap, we store + * any additional pages in this device. We may also move some pages + * from ramzswap to this device in case system is really low on + * memory (TODO). + * + * This device is not directly visible to kernel as a swap device + * (/proc/swaps will only show /dev/ramzswap0 and not this device). + * Managing this backing device is the job of ramzswap module. + */ +module_param(backing_swap, charp, 0); +MODULE_PARM_DESC(backing_swap, "Backing swap partition"); + +module_init(ramzswap_init); +module_exit(ramzswap_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nitin Gupta "); +MODULE_DESCRIPTION("Compressed RAM Based Swap Device"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/rfkill/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/rfkill/Kconfig @@ -0,0 +1,7 @@ +config AVERATEC_5100P + tristate "Software kill switch for Averatec 5100P" + default m + +config PACKARDBELL_E5 + tristate "Software kill switch for Packard Bell EasyNote E5" + default m --- linux-fsl-imx51-2.6.31.orig/ubuntu/rfkill/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/rfkill/BOM @@ -0,0 +1,6 @@ +Downloaded from: http://sourceforge.net/project/showfiles.php?group_id=108766 +Current Version: 1.3 +Comments: + +Had to change &proc_root to NULL due to changes in create/remove proc +entry usage. --- linux-fsl-imx51-2.6.31.orig/ubuntu/rfkill/pbe5.c +++ linux-fsl-imx51-2.6.31/ubuntu/rfkill/pbe5.c @@ -0,0 +1,205 @@ +/******************************************************************************* + + This program is free software; you can redistribute it and/or modify it + under the terms of version 2 of the GNU General Public License as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., 59 + Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + The full GNU General Public License is included in this distribution in the + file called LICENSE. + + Author: + Pedro Ramalhais + + Based on: + av5100.c from http://ipw2100.sourceforge.net/ + +*******************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "pbe5" +#define DRV_VERSION "1.3" +#define DRV_DESCRIPTION "SW RF kill switch for Packard Bell EasyNote E5" +#define DRV_AUTHOR "Pedro Ramalhais" +#define DRV_LICENSE "GPL" + +static int radio = 1; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + +MODULE_PARM(radio, "i"); + +#else /* LINUX_VERSION_CODE < 2.6.0 */ + +#include +module_param(radio, int, 1); + +#endif /* LINUX_VERSION_CODE < 2.6.0 */ + +MODULE_PARM_DESC(radio, "controls state of radio (1=on, 0=off)"); + +MODULE_DESCRIPTION(DRV_DESCRIPTION); +MODULE_AUTHOR(DRV_AUTHOR); +MODULE_LICENSE(DRV_LICENSE); + +/* + * NOTE: These values were obtained from disassembling the Icon.exe program + * installed in the Packard Bell EasyNote E5 laptop. The names were guessed, + * so don't rely on them. + */ +#define PBE5_PORT_TOGGLE 0x0b3 +#define PBE5_VALUE_TOGGLE_ON 0x01 +#define PBE5_VALUE_TOGGLE_OFF 0x00 +#define PBE5_PORT_APPLY 0x0b2 +#define PBE5_VALUE_APPLY 0xef + +// Some "booleans" =;-) +#define PBE5_RADIO_OFF 0 +#define PBE5_RADIO_ON 1 + +static int pbe5_radio_status = PBE5_RADIO_ON; + +unsigned char pbe5_get_radio(void) +{ + unsigned char val = 0x00; + + val = inb(PBE5_PORT_TOGGLE); + + return val; +} + +static void pbe5_set_radio(int state_set) +{ + pbe5_radio_status = pbe5_get_radio(); + + if (pbe5_radio_status != state_set) { + // Set the radio toggle register + outb(PBE5_VALUE_TOGGLE_ON, PBE5_PORT_TOGGLE); + // Commit the radio toggle register value + outb(PBE5_VALUE_APPLY, PBE5_PORT_APPLY); + // Update the radio status + pbe5_radio_status = pbe5_get_radio(); + + printk(KERN_INFO DRV_NAME ": Radio turned %s\n", + (state_set == PBE5_RADIO_ON) ? "ON" : "OFF"); + } else { + printk(KERN_INFO DRV_NAME ": Radio already %s\n", + (state_set == PBE5_RADIO_ON) ? "ON" : "OFF"); + } +} + + +/* + * proc stuff + */ +static struct proc_dir_entry *dir_base = NULL; + +static int proc_set_radio(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + pbe5_set_radio(buffer[0] == '0' ? PBE5_RADIO_OFF : PBE5_RADIO_ON); + + return count; +} + +static int proc_get_radio(char *page, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = 0; + + len += snprintf(page, count, DRV_NAME ": %d\n", + pbe5_radio_status == PBE5_RADIO_OFF ? 0 : 1); + + *eof = 1; + return len; +} + + +static void pbe5_proc_cleanup(void) +{ + if (dir_base) { + remove_proc_entry("radio", dir_base); + remove_proc_entry(DRV_NAME, NULL); + dir_base = NULL; + } +} + + +static int pbe5_proc_init(void) +{ + struct proc_dir_entry *ent; + int err = 0; + + dir_base = create_proc_entry(DRV_NAME, S_IFDIR, NULL); + if (dir_base == NULL) { + printk(KERN_ERR DRV_NAME ": Unable to initialise /proc/" + DRV_NAME "\n"); + err = -ENOMEM; + goto fail; + } + + + ent = create_proc_entry("radio", S_IFREG | S_IRUGO | S_IWUSR, + dir_base); + if (ent) { + ent->read_proc = proc_get_radio; + ent->write_proc = proc_set_radio; + } else { + printk(KERN_ERR + "Unable to initialize /proc/" DRV_NAME "/radio\n"); + err = -ENOMEM; + goto fail; + } + + return 0; + + fail: + pbe5_proc_cleanup(); + return err; +} + +/* + * module stuff + */ +static int __init pbe5_init(void) +{ + pbe5_proc_init(); + + pbe5_set_radio((radio == 1) ? PBE5_RADIO_ON : PBE5_RADIO_OFF); + + return 0; +} + +static void __exit pbe5_exit(void) +{ + pbe5_set_radio(PBE5_RADIO_OFF); + + pbe5_proc_cleanup(); +} + +module_init(pbe5_init); +module_exit(pbe5_exit); + +/* + 1 2 3 4 5 6 7 +12345678901234567890123456789012345678901234567890123456789012345678901234567890 +*/ --- linux-fsl-imx51-2.6.31.orig/ubuntu/rfkill/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/rfkill/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for Ubuntu additional drivers +# + +obj-$(CONFIG_AVERATEC_5100P) += av5100.o +obj-$(CONFIG_PACKARDBELL_E5) += pbe5.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/rfkill/av5100.c +++ linux-fsl-imx51-2.6.31/ubuntu/rfkill/av5100.c @@ -0,0 +1,174 @@ +/******************************************************************************* + + Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved. + + This program is free software; you can redistribute it and/or modify it + under the terms of version 2 of the GNU General Public License as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along with + this program; if not, write to the Free Software Foundation, Inc., 59 + Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + The full GNU General Public License is included in this distribution in the + file called LICENSE. + + Contact Information: + James P. Ketrenos + Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + +*******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#define DRV_NAME "av5100" +#define DRV_VERSION "1.3" +#define DRV_DESCRIPTION "SW RF kill switch for Averatec 5100P" +#define DRV_COPYRIGHT "Copyright(c) 2003-2004 Intel Corporation" + +static int radio = 1; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + +MODULE_PARM(radio, "i"); + +#else /* LINUX_VERSION_CODE < 2.6.0 */ + +#include +module_param(radio, int, 1); + +#endif /* LINUX_VERSION_CODE < 2.6.0 */ + +MODULE_PARM_DESC(radio, "controls state of radio (1=on, 0=off)"); + +MODULE_DESCRIPTION(DRV_DESCRIPTION); +MODULE_AUTHOR(DRV_COPYRIGHT); +MODULE_LICENSE("GPL"); + +#define AV5100_RADIO_ON (0xe0) +#define AV5100_RADIO_OFF (0xe1) + +static int av5100_radio = AV5100_RADIO_OFF; + +static void av5100_set_radio(int state) +{ + printk(KERN_INFO DRV_NAME ": Radio being turned %s\n", + (state == AV5100_RADIO_ON) ? "ON" : "OFF"); + outl(0x80020800, 0xcf8); + outb(0x6f, 0x0072); + outl(0x1800ffff, 0x1184); + outb(state, 0x00b2); + av5100_radio = state; +} + + +/* + * proc stuff + */ +static struct proc_dir_entry *dir_base = NULL; + +static int proc_set_radio(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + av5100_set_radio(buffer[0] == '0' ? AV5100_RADIO_OFF : AV5100_RADIO_ON); + + return count; +} + +static int proc_get_radio(char *page, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = 0; + + len += snprintf(page, count, DRV_NAME ": %d\n", + av5100_radio == AV5100_RADIO_OFF ? 0 : 1); + + *eof = 1; + return len; +} + + +static void av5100_proc_cleanup(void) +{ + if (dir_base) { + remove_proc_entry("radio", dir_base); + remove_proc_entry(DRV_NAME, NULL); + dir_base = NULL; + } +} + + +static int av5100_proc_init(void) +{ + struct proc_dir_entry *ent; + int err = 0; + + dir_base = create_proc_entry(DRV_NAME, S_IFDIR, NULL); + if (dir_base == NULL) { + printk(KERN_ERR DRV_NAME ": Unable to initialise /proc/" + DRV_NAME "\n"); + err = -ENOMEM; + goto fail; + } + + + ent = create_proc_entry("radio", S_IFREG | S_IRUGO | S_IWUSR, + dir_base); + if (ent) { + ent->read_proc = proc_get_radio; + ent->write_proc = proc_set_radio; + } else { + printk(KERN_ERR + "Unable to initialize /proc/" DRV_NAME "/radio\n"); + err = -ENOMEM; + goto fail; + } + + return 0; + + fail: + av5100_proc_cleanup(); + return err; +} + +/* + * module stuff + */ +static int __init av5100_init(void) +{ + av5100_proc_init(); + + av5100_set_radio((radio == 1) ? AV5100_RADIO_ON : AV5100_RADIO_OFF); + + return 0; +} + +static void __exit av5100_exit(void) +{ + av5100_set_radio(AV5100_RADIO_OFF); + + av5100_proc_cleanup(); +} + +module_init(av5100_init); +module_exit(av5100_exit); + +/* + 1 2 3 4 5 6 7 +12345678901234567890123456789012345678901234567890123456789012345678901234567890 +*/ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ntoskernel_io.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ntoskernel_io.c @@ -0,0 +1,1106 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ntoskernel.h" +#include "ndis.h" +#include "wrapndis.h" +#include "usb.h" +#include "loader.h" +#include "ntoskernel_io_exports.h" + +wstdcall void WIN_FUNC(IoAcquireCancelSpinLock,1) + (KIRQL *irql) __acquires(irql) +{ + spin_lock_bh(&irp_cancel_lock); + *irql = 0; +} + +wstdcall void WIN_FUNC(IoReleaseCancelSpinLock,1) + (KIRQL irql) __releases(irql) +{ + spin_unlock_bh(&irp_cancel_lock); +} + +wstdcall int WIN_FUNC(IoIsWdmVersionAvailable,2) + (UCHAR major, UCHAR minor) +{ + IOENTER("%d, %x", major, minor); + if (major == 1 && + (minor == 0x30 || // Windows 2003 + minor == 0x20 || // Windows XP + minor == 0x10)) // Windows 2000 + IOEXIT(return TRUE); + IOEXIT(return FALSE); +} + +wstdcall BOOLEAN WIN_FUNC(IoIs32bitProcess,1) + (struct irp *irp) +{ +#ifdef CONFIG_X86_64 + return FALSE; +#else + return TRUE; +#endif +} + +wstdcall void WIN_FUNC(IoInitializeIrp,3) + (struct irp *irp, USHORT size, CCHAR stack_count) +{ + IOENTER("irp: %p, %d, %d", irp, size, stack_count); + + memset(irp, 0, size); + irp->size = size; + irp->stack_count = stack_count; + irp->current_location = stack_count; + IoGetCurrentIrpStackLocation(irp) = IRP_SL(irp, stack_count); + IOEXIT(return); +} + +wstdcall void WIN_FUNC(IoReuseIrp,2) + (struct irp *irp, NTSTATUS status) +{ + IOENTER("%p, %d", irp, status); + if (irp) { + UCHAR alloc_flags; + + alloc_flags = irp->alloc_flags; + IoInitializeIrp(irp, irp->size, irp->stack_count); + irp->alloc_flags = alloc_flags; + irp->io_status.status = status; + } + IOEXIT(return); +} + +wstdcall struct irp *WIN_FUNC(IoAllocateIrp,2) + (char stack_count, BOOLEAN charge_quota) +{ + struct irp *irp; + int irp_size; + + IOENTER("count: %d", stack_count); + stack_count++; + irp_size = IoSizeOfIrp(stack_count); + irp = kmalloc(irp_size, irql_gfp()); + if (irp) + IoInitializeIrp(irp, irp_size, stack_count); + IOTRACE("irp %p", irp); + IOEXIT(return irp); +} + +wstdcall BOOLEAN WIN_FUNC(IoCancelIrp,1) + (struct irp *irp) +{ + typeof(irp->cancel_routine) cancel_routine; + + /* NB: this function may be called at DISPATCH_LEVEL */ + IOTRACE("irp: %p", irp); + if (!irp) + return FALSE; + DUMP_IRP(irp); + IoAcquireCancelSpinLock(&irp->cancel_irql); + cancel_routine = xchg(&irp->cancel_routine, NULL); + IOTRACE("%p", cancel_routine); + irp->cancel = TRUE; + if (cancel_routine) { + struct io_stack_location *irp_sl; + irp_sl = IoGetCurrentIrpStackLocation(irp); + IOTRACE("%p, %p", irp_sl, irp_sl->dev_obj); + /* cancel_routine will release the spin lock */ + __release(irp->cancel_irql); + LIN2WIN2(cancel_routine, irp_sl->dev_obj, irp); + /* in usb's cancel, irp->cancel is set to indicate + * status of cancel */ + IOEXIT(return xchg(&irp->cancel, TRUE)); + } else { + IOTRACE("irp %p already canceled", irp); + IoReleaseCancelSpinLock(irp->cancel_irql); + IOEXIT(return FALSE); + } +} + +wstdcall void IoQueueThreadIrp(struct irp *irp) +{ + struct nt_thread *thread; + KIRQL irql; + + thread = get_current_nt_thread(); + if (thread) { + IOTRACE("thread: %p, task: %p", thread, thread->task); + irp->flags |= IRP_SYNCHRONOUS_API; + irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); + InsertTailList(&thread->irps, &irp->thread_list); + IoIrpThread(irp) = thread; + nt_spin_unlock_irql(&thread->lock, irql); + } else + IoIrpThread(irp) = NULL; +} + +wstdcall void IoDequeueThreadIrp(struct irp *irp) +{ + struct nt_thread *thread; + KIRQL irql; + + thread = IoIrpThread(irp); + if (thread) { + irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); + RemoveEntryList(&irp->thread_list); + nt_spin_unlock_irql(&thread->lock, irql); + } +} + +wstdcall void WIN_FUNC(IoFreeIrp,1) + (struct irp *irp) +{ + IOENTER("irp = %p", irp); + if (irp->flags & IRP_SYNCHRONOUS_API) + IoDequeueThreadIrp(irp); + kfree(irp); + + IOEXIT(return); +} + +wstdcall struct irp *WIN_FUNC(IoBuildAsynchronousFsdRequest,6) + (ULONG major_fn, struct device_object *dev_obj, void *buffer, + ULONG length, LARGE_INTEGER *offset, + struct io_status_block *user_status) +{ + struct irp *irp; + struct io_stack_location *irp_sl; + + IOENTER("%p", dev_obj); + if (!dev_obj) + IOEXIT(return NULL); + irp = IoAllocateIrp(dev_obj->stack_count, FALSE); + if (irp == NULL) { + WARNING("couldn't allocate irp"); + IOEXIT(return NULL); + } + + irp_sl = IoGetNextIrpStackLocation(irp); + irp_sl->major_fn = major_fn; + IOTRACE("major_fn: %d", major_fn); + irp_sl->minor_fn = 0; + irp_sl->flags = 0; + irp_sl->control = 0; + irp_sl->dev_obj = dev_obj; + irp_sl->file_obj = NULL; + irp_sl->completion_routine = NULL; + + if (dev_obj->flags & DO_DIRECT_IO) { + irp->mdl = IoAllocateMdl(buffer, length, FALSE, FALSE, irp); + if (irp->mdl == NULL) { + IoFreeIrp(irp); + return NULL; + } + MmProbeAndLockPages(irp->mdl, KernelMode, + major_fn == IRP_MJ_WRITE ? + IoReadAccess : IoWriteAccess); + IOTRACE("mdl: %p", irp->mdl); + } else if (dev_obj->flags & DO_BUFFERED_IO) { + irp->associated_irp.system_buffer = buffer; + irp->flags = IRP_BUFFERED_IO; + irp->mdl = NULL; + IOTRACE("buffer: %p", buffer); + } + if (major_fn == IRP_MJ_READ) { + irp_sl->params.read.length = length; + irp_sl->params.read.byte_offset = *offset; + } else if (major_fn == IRP_MJ_WRITE) { + irp_sl->params.write.length = length; + irp_sl->params.write.byte_offset = *offset; + } + irp->user_status = user_status; + IOTRACE("irp: %p", irp); + return irp; +} + +wstdcall struct irp *WIN_FUNC(IoBuildSynchronousFsdRequest,7) + (ULONG major_fn, struct device_object *dev_obj, void *buf, + ULONG length, LARGE_INTEGER *offset, struct nt_event *event, + struct io_status_block *user_status) +{ + struct irp *irp; + + irp = IoBuildAsynchronousFsdRequest(major_fn, dev_obj, buf, length, + offset, user_status); + if (irp == NULL) + return NULL; + irp->user_event = event; + IoQueueThreadIrp(irp); + return irp; +} + +wstdcall struct irp *WIN_FUNC(IoBuildDeviceIoControlRequest,9) + (ULONG ioctl, struct device_object *dev_obj, + void *input_buf, ULONG input_buf_len, void *output_buf, + ULONG output_buf_len, BOOLEAN internal_ioctl, + struct nt_event *event, struct io_status_block *io_status) +{ + struct irp *irp; + struct io_stack_location *irp_sl; + ULONG buf_len; + + IOENTER("%p, 0x%08x, %d", dev_obj, ioctl, internal_ioctl); + if (!dev_obj) + IOEXIT(return NULL); + irp = IoAllocateIrp(dev_obj->stack_count, FALSE); + if (irp == NULL) { + WARNING("couldn't allocate irp"); + return NULL; + } + irp_sl = IoGetNextIrpStackLocation(irp); + irp_sl->params.dev_ioctl.code = ioctl; + irp_sl->params.dev_ioctl.input_buf_len = input_buf_len; + irp_sl->params.dev_ioctl.output_buf_len = output_buf_len; + irp_sl->major_fn = (internal_ioctl) ? + IRP_MJ_INTERNAL_DEVICE_CONTROL : IRP_MJ_DEVICE_CONTROL; + IOTRACE("%d", IO_METHOD_FROM_CTL_CODE(ioctl)); + + switch (IO_METHOD_FROM_CTL_CODE(ioctl)) { + case METHOD_BUFFERED: + buf_len = max(input_buf_len, output_buf_len); + if (buf_len) { + irp->associated_irp.system_buffer = + ExAllocatePoolWithTag(NonPagedPool, buf_len, 0); + if (!irp->associated_irp.system_buffer) { + IoFreeIrp(irp); + IOEXIT(return NULL); + } + irp->associated_irp.system_buffer = input_buf; + if (input_buf) + memcpy(irp->associated_irp.system_buffer, + input_buf, input_buf_len); + irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; + if (output_buf) + irp->flags = IRP_INPUT_OPERATION; + irp->user_buf = output_buf; + } else + irp->user_buf = NULL; + break; + case METHOD_IN_DIRECT: + case METHOD_OUT_DIRECT: + if (input_buf) { + irp->associated_irp.system_buffer = + ExAllocatePoolWithTag(NonPagedPool, + input_buf_len, 0); + if (!irp->associated_irp.system_buffer) { + IoFreeIrp(irp); + IOEXIT(return NULL); + } + memcpy(irp->associated_irp.system_buffer, + input_buf, input_buf_len); + irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; + } + /* TODO: we are supposed to setup MDL, but USB layer + * doesn't use MDLs. Moreover, USB layer mirrors + * non-DMAable buffers, so no need to allocate + * DMAable buffer here */ + if (output_buf) { + irp->associated_irp.system_buffer = + ExAllocatePoolWithTag(NonPagedPool, + output_buf_len, 0); + if (!irp->associated_irp.system_buffer) { + IoFreeIrp(irp); + IOEXIT(return NULL); + } + irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER; + } + break; + case METHOD_NEITHER: + irp->user_buf = output_buf; + irp_sl->params.dev_ioctl.type3_input_buf = input_buf; + break; + } + + irp->user_status = io_status; + irp->user_event = event; + IoQueueThreadIrp(irp); + + IOTRACE("irp: %p", irp); + IOEXIT(return irp); +} + +wfastcall NTSTATUS WIN_FUNC(IofCallDriver,2) + (struct device_object *dev_obj, struct irp *irp) +{ + struct io_stack_location *irp_sl; + NTSTATUS status; + driver_dispatch_t *major_func; + struct driver_object *drv_obj; + + if (irp->current_location <= 0) { + ERROR("invalid irp: %p, %d", irp, irp->current_location); + return STATUS_INVALID_PARAMETER; + } + IOTRACE("%p, %p, %p, %d, %d, %p", dev_obj, irp, dev_obj->drv_obj, + irp->current_location, irp->stack_count, + IoGetCurrentIrpStackLocation(irp)); + IoSetNextIrpStackLocation(irp); + DUMP_IRP(irp); + irp_sl = IoGetCurrentIrpStackLocation(irp); + drv_obj = dev_obj->drv_obj; + irp_sl->dev_obj = dev_obj; + major_func = drv_obj->major_func[irp_sl->major_fn]; + IOTRACE("major_func: %p, dev_obj: %p", major_func, dev_obj); + if (major_func) + status = LIN2WIN2(major_func, dev_obj, irp); + else { + ERROR("major_function %d is not implemented", + irp_sl->major_fn); + status = STATUS_NOT_SUPPORTED; + } + IOEXIT(return status); +} + +wfastcall void WIN_FUNC(IofCompleteRequest,2) + (struct irp *irp, CHAR prio_boost) +{ + struct io_stack_location *irp_sl; + +#ifdef IO_DEBUG + DUMP_IRP(irp); + if (irp->io_status.status == STATUS_PENDING) { + ERROR("invalid irp: %p, STATUS_PENDING", irp); + return; + } + if (irp->current_location < 0 || + irp->current_location >= irp->stack_count) { + ERROR("invalid irp: %p, %d", irp, irp->current_location); + return; + } +#endif + for (irp_sl = IoGetCurrentIrpStackLocation(irp); + irp->current_location < irp->stack_count; irp_sl++) { + struct device_object *dev_obj; + NTSTATUS status; + + DUMP_IRP(irp); + if (irp_sl->control & SL_PENDING_RETURNED) + irp->pending_returned = TRUE; + + /* current_location and dev_obj must be same as when + * driver called IoSetCompletionRoutine, which sets + * completion routine at next (lower) location, which + * is what we are going to call below; so we set + * current_location and dev_obj for the previous + * (higher) location */ + IoSkipCurrentIrpStackLocation(irp); + if (irp->current_location < irp->stack_count) + dev_obj = IoGetCurrentIrpStackLocation(irp)->dev_obj; + else + dev_obj = NULL; + + IOTRACE("%d, %d, %p", irp->current_location, irp->stack_count, + dev_obj); + if (irp_sl->completion_routine && + ((irp->io_status.status == STATUS_SUCCESS && + irp_sl->control & SL_INVOKE_ON_SUCCESS) || + (irp->io_status.status != STATUS_SUCCESS && + irp_sl->control & SL_INVOKE_ON_ERROR) || + (irp->cancel == TRUE && + irp_sl->control & SL_INVOKE_ON_CANCEL))) { + IOTRACE("calling completion_routine at: %p, %p", + irp_sl->completion_routine, irp_sl->context); + status = LIN2WIN3(irp_sl->completion_routine, + dev_obj, irp, irp_sl->context); + IOTRACE("status: %08X", status); + if (status == STATUS_MORE_PROCESSING_REQUIRED) + IOEXIT(return); + } else { + /* propagate pending status to next irp_sl */ + if (irp->pending_returned && + irp->current_location < irp->stack_count) + IoMarkIrpPending(irp); + } + } + + if (irp->user_status) { + irp->user_status->status = irp->io_status.status; + irp->user_status->info = irp->io_status.info; + } + + if (irp->user_event) { + IOTRACE("setting event %p", irp->user_event); + KeSetEvent(irp->user_event, prio_boost, FALSE); + } + + if (irp->associated_irp.system_buffer && + (irp->flags & IRP_DEALLOCATE_BUFFER)) + ExFreePool(irp->associated_irp.system_buffer); + else { + struct mdl *mdl; + while ((mdl = irp->mdl)) { + irp->mdl = mdl->next; + MmUnlockPages(mdl); + IoFreeMdl(mdl); + } + } + IOTRACE("freeing irp %p", irp); + IoFreeIrp(irp); + IOEXIT(return); +} + +wstdcall NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp) +{ + IoSkipCurrentIrpStackLocation(irp); + IOEXIT(return IoCallDriver(dev_obj, irp)); +} + +wstdcall NTSTATUS IoIrpSyncComplete(struct device_object *dev_obj, + struct irp *irp, void *context) +{ + if (irp->pending_returned == TRUE) + KeSetEvent(context, IO_NO_INCREMENT, FALSE); + IOEXIT(return STATUS_MORE_PROCESSING_REQUIRED); +} +WIN_FUNC_DECL(IoIrpSyncComplete,3) + +wstdcall NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj, + struct irp *irp) +{ + struct nt_event event; + NTSTATUS status; + + IoCopyCurrentIrpStackLocationToNext(irp); + KeInitializeEvent(&event, SynchronizationEvent, FALSE); + /* completion function is called as Windows function */ + IoSetCompletionRoutine(irp, WIN_FUNC_PTR(IoIrpSyncComplete,3), &event, + TRUE, TRUE, TRUE); + status = IoCallDriver(dev_obj, irp); + IOTRACE("%08X", status); + if (status == STATUS_PENDING) { + KeWaitForSingleObject(&event, Executive, KernelMode, FALSE, + NULL); + status = irp->io_status.status; + } + IOTRACE("%08X", status); + IOEXIT(return status); +} +WIN_FUNC_DECL(IoSyncForwardIrp,2) + +wstdcall NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj, + struct irp *irp) +{ + NTSTATUS status; + + IoCopyCurrentIrpStackLocationToNext(irp); + status = IoCallDriver(dev_obj, irp); + IOEXIT(return status); +} +WIN_FUNC_DECL(IoAsyncForwardIrp,2) + +wstdcall NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj, + struct irp *irp) +{ + struct io_stack_location *irp_sl; + NTSTATUS status; + + irp_sl = IoGetCurrentIrpStackLocation(irp); + WARNING("%d:%d not implemented", irp_sl->major_fn, irp_sl->minor_fn); + irp->io_status.status = STATUS_SUCCESS; + irp->io_status.info = 0; + status = irp->io_status.status; + IoCompleteRequest(irp, IO_NO_INCREMENT); + IOEXIT(return status); +} +WIN_FUNC_DECL(IoInvalidDeviceRequest,2) + +static irqreturn_t io_irq_isr(int irq, void *data ISR_PT_REGS_PARAM_DECL) +{ + struct kinterrupt *interrupt = data; + BOOLEAN ret; + +#ifdef CONFIG_DEBUG_SHIRQ + if (!interrupt->u.enabled) + EXIT1(return IRQ_NONE); +#endif + TRACE6("%p", interrupt); + nt_spin_lock(interrupt->actual_lock); + ret = LIN2WIN2(interrupt->isr, interrupt, interrupt->isr_ctx); + nt_spin_unlock(interrupt->actual_lock); + if (ret == TRUE) + EXIT6(return IRQ_HANDLED); + else + EXIT6(return IRQ_NONE); +} + +wstdcall NTSTATUS WIN_FUNC(IoConnectInterrupt,11) + (struct kinterrupt **kinterrupt, PKSERVICE_ROUTINE isr, void *isr_ctx, + NT_SPIN_LOCK *lock, ULONG vector, KIRQL irql, KIRQL synch_irql, + enum kinterrupt_mode mode, BOOLEAN shared, KAFFINITY cpu_mask, + BOOLEAN save_fp) +{ + struct kinterrupt *interrupt; + IOENTER(""); + interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL); + if (!interrupt) + IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); + interrupt->vector = vector; + interrupt->cpu_mask = cpu_mask; + nt_spin_lock_init(&interrupt->lock); + if (lock) + interrupt->actual_lock = lock; + else + interrupt->actual_lock = &interrupt->lock; + interrupt->shared = shared; + interrupt->save_fp = save_fp; + interrupt->isr = isr; + interrupt->isr_ctx = isr_ctx; + InitializeListHead(&interrupt->list); + interrupt->irql = irql; + interrupt->synch_irql = synch_irql; + interrupt->mode = mode; + if (request_irq(vector, io_irq_isr, shared ? IRQF_SHARED : 0, + "ndiswrapper", interrupt)) { + WARNING("request for irq %d failed", vector); + kfree(interrupt); + IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); + } + *kinterrupt = interrupt; +#ifdef CONFIG_DEBUG_SHIRQ + interrupt->u.enabled = 1; +#endif + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(IoDisconnectInterrupt,1) + (struct kinterrupt *interrupt) +{ +#ifdef CONFIG_DEBUG_SHIRQ + interrupt->u.enabled = 0; +#endif + free_irq(interrupt->vector, interrupt); + kfree(interrupt); +} + +wstdcall struct mdl *WIN_FUNC(IoAllocateMdl,5) + (void *virt, ULONG length, BOOLEAN second_buf, BOOLEAN charge_quota, + struct irp *irp) +{ + struct mdl *mdl; + mdl = allocate_init_mdl(virt, length); + if (!mdl) + return NULL; + if (irp) { + if (second_buf == TRUE) { + struct mdl *last; + + last = irp->mdl; + while (last->next) + last = last->next; + last->next = mdl; + } else + irp->mdl = mdl; + } + IOTRACE("%p", mdl); + return mdl; +} + +wstdcall void WIN_FUNC(IoFreeMdl,1) + (struct mdl *mdl) +{ + IOTRACE("%p", mdl); + free_mdl(mdl); +} + +wstdcall struct io_workitem *WIN_FUNC(IoAllocateWorkItem,1) + (struct device_object *dev_obj) +{ + struct io_workitem *io_workitem; + + IOENTER("%p", dev_obj); + io_workitem = kmalloc(sizeof(*io_workitem), irql_gfp()); + if (!io_workitem) + IOEXIT(return NULL); + io_workitem->dev_obj = dev_obj; + IOEXIT(return io_workitem); +} + +wstdcall void WIN_FUNC(IoFreeWorkItem,1) + (struct io_workitem *io_workitem) +{ + kfree(io_workitem); + IOEXIT(return); +} + +wstdcall void WIN_FUNC(IoQueueWorkItem,4) + (struct io_workitem *io_workitem, void *func, + enum work_queue_type queue_type, void *context) +{ + IOENTER("%p, %p", io_workitem, io_workitem->dev_obj); + io_workitem->worker_routine = func; + io_workitem->context = context; + schedule_ntos_work_item(func, io_workitem->dev_obj, context); + IOEXIT(return); +} + +wstdcall void WIN_FUNC(ExQueueWorkItem,2) + (struct io_workitem *io_workitem, enum work_queue_type queue_type) +{ + IOENTER("%p", io_workitem); + schedule_ntos_work_item(io_workitem->worker_routine, + io_workitem->dev_obj, io_workitem->context); +} + +wstdcall NTSTATUS WIN_FUNC(IoAllocateDriverObjectExtension,4) + (struct driver_object *drv_obj, void *client_id, ULONG extlen, + void **ext) +{ + struct custom_ext *ce; + + IOENTER("%p, %p", drv_obj, client_id); + ce = kmalloc(sizeof(*ce) + extlen, irql_gfp()); + if (ce == NULL) + return STATUS_INSUFFICIENT_RESOURCES; + + IOTRACE("custom_ext: %p", ce); + ce->client_id = client_id; + spin_lock_bh(&ntoskernel_lock); + InsertTailList(&drv_obj->drv_ext->custom_ext, &ce->list); + spin_unlock_bh(&ntoskernel_lock); + + *ext = (void *)ce + sizeof(*ce); + IOTRACE("ext: %p", *ext); + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall void *WIN_FUNC(IoGetDriverObjectExtension,2) + (struct driver_object *drv_obj, void *client_id) +{ + struct custom_ext *ce; + void *ret; + + IOENTER("drv_obj: %p, client_id: %p", drv_obj, client_id); + ret = NULL; + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(ce, &drv_obj->drv_ext->custom_ext, list) { + if (ce->client_id == client_id) { + ret = (void *)ce + sizeof(*ce); + break; + } + } + spin_unlock_bh(&ntoskernel_lock); + IOTRACE("ret: %p", ret); + return ret; +} + +void free_custom_extensions(struct driver_extension *drv_ext) +{ + struct nt_list *ent; + + IOENTER("%p", drv_ext); + spin_lock_bh(&ntoskernel_lock); + while ((ent = RemoveHeadList(&drv_ext->custom_ext))) + kfree(ent); + spin_unlock_bh(&ntoskernel_lock); + IOEXIT(return); +} + +wstdcall NTSTATUS WIN_FUNC(IoCreateDevice,7) + (struct driver_object *drv_obj, ULONG dev_ext_length, + struct unicode_string *dev_name, DEVICE_TYPE dev_type, + ULONG dev_chars, BOOLEAN exclusive, struct device_object **newdev) +{ + struct device_object *dev; + struct dev_obj_ext *dev_obj_ext; + int size; + + IOENTER("%p, %u, %p", drv_obj, dev_ext_length, dev_name); + + size = sizeof(*dev) + dev_ext_length + sizeof(*dev_obj_ext); + dev = allocate_object(size, OBJECT_TYPE_DEVICE, dev_name); + if (!dev) + IOEXIT(return STATUS_INSUFFICIENT_RESOURCES); + if (dev_ext_length) + dev->dev_ext = dev + 1; + else + dev->dev_ext = NULL; + + dev_obj_ext = ((void *)(dev + 1)) + dev_ext_length; + dev_obj_ext->dev_obj = dev; + dev_obj_ext->size = 0; + dev_obj_ext->type = IO_TYPE_DEVICE; + dev->dev_obj_ext = dev_obj_ext; + + dev->type = dev_type; + dev->flags = 0; + dev->size = sizeof(*dev) + dev_ext_length; + dev->ref_count = 1; + dev->attached = NULL; + dev->stack_count = 1; + + dev->drv_obj = drv_obj; + dev->next = drv_obj->dev_obj; + drv_obj->dev_obj = dev; + + dev->align_req = 1; + dev->characteristics = dev_chars; + dev->io_timer = NULL; + KeInitializeEvent(&dev->lock, SynchronizationEvent, TRUE); + dev->vpb = NULL; + + IOTRACE("dev: %p, ext: %p", dev, dev->dev_ext); + *newdev = dev; + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(IoCreateUnprotectedSymbolicLink,2) + (struct unicode_string *link, struct unicode_string *dev_name) +{ + struct ansi_string ansi; + + IOENTER("%p, %p", dev_name, link); + if (dev_name && (RtlUnicodeStringToAnsiString(&ansi, dev_name, TRUE) == + STATUS_SUCCESS)) { + IOTRACE("dev_name: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) == + STATUS_SUCCESS)) { + IOTRACE("link: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } +// TODO(); + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(IoCreateSymbolicLink,2) + (struct unicode_string *link, struct unicode_string *dev_name) +{ + IOEXIT(return IoCreateUnprotectedSymbolicLink(link, dev_name)); +} + +wstdcall NTSTATUS WIN_FUNC(IoDeleteSymbolicLink,1) + (struct unicode_string *link) +{ + struct ansi_string ansi; + + IOENTER("%p", link); + if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) == + STATUS_SUCCESS)) { + IOTRACE("dev_name: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(IoDeleteDevice,1) + (struct device_object *dev) +{ + IOENTER("%p", dev); + if (dev == NULL) + IOEXIT(return); + IOTRACE("drv_obj: %p", dev->drv_obj); + if (dev->drv_obj) { + struct device_object *prev; + + prev = dev->drv_obj->dev_obj; + IOTRACE("dev_obj: %p", prev); + if (prev == dev) + dev->drv_obj->dev_obj = dev->next; + else if (prev) { + while (prev->next != dev) + prev = prev->next; + prev->next = dev->next; + } + } + ObDereferenceObject(dev); + IOEXIT(return); +} + +wstdcall void WIN_FUNC(IoDetachDevice,1) + (struct device_object *tgt) +{ + struct device_object *tail; + + IOENTER("%p", tgt); + if (!tgt) + IOEXIT(return); + tail = tgt->attached; + if (!tail) + IOEXIT(return); + IOTRACE("tail: %p", tail); + + spin_lock_bh(&ntoskernel_lock); + tgt->attached = tail->attached; + IOTRACE("attached:%p", tgt->attached); + for ( ; tail; tail = tail->attached) { + IOTRACE("tail:%p", tail); + tail->stack_count--; + } + spin_unlock_bh(&ntoskernel_lock); + IOEXIT(return); +} + +wstdcall struct device_object *WIN_FUNC(IoGetAttachedDevice,1) + (struct device_object *dev) +{ + IOENTER("%p", dev); + if (!dev) + IOEXIT(return NULL); + spin_lock_bh(&ntoskernel_lock); + while (dev->attached) + dev = dev->attached; + spin_unlock_bh(&ntoskernel_lock); + IOEXIT(return dev); +} + +wstdcall struct device_object *WIN_FUNC(IoGetAttachedDeviceReference,1) + (struct device_object *dev) +{ + IOENTER("%p", dev); + if (!dev) + IOEXIT(return NULL); + dev = IoGetAttachedDevice(dev); + ObReferenceObject(dev); + IOEXIT(return dev); +} + +wstdcall struct device_object *WIN_FUNC(IoAttachDeviceToDeviceStack,2) + (struct device_object *src, struct device_object *tgt) +{ + struct device_object *attached; + struct dev_obj_ext *src_dev_ext; + + IOENTER("%p, %p", src, tgt); + attached = IoGetAttachedDevice(tgt); + IOTRACE("%p", attached); + src_dev_ext = src->dev_obj_ext; + spin_lock_bh(&ntoskernel_lock); + if (attached) + attached->attached = src; + src->attached = NULL; + src->stack_count = attached->stack_count + 1; + src_dev_ext->attached_to = attached; + spin_unlock_bh(&ntoskernel_lock); + IOTRACE("stack_count: %d -> %d", attached->stack_count, + src->stack_count); + IOEXIT(return attached); +} + +wstdcall NTSTATUS WIN_FUNC(IoGetDeviceProperty,5) + (struct device_object *pdo, enum device_registry_property dev_property, + ULONG buffer_len, void *buffer, ULONG *result_len) +{ + struct ansi_string ansi; + struct unicode_string unicode; + struct wrap_device *wd; + ULONG need; + + IOENTER("dev_obj = %p, dev_property = %d, buffer_len = %u, " + "buffer = %p, result_len = %p", pdo, dev_property, + buffer_len, buffer, result_len); + + wd = pdo->reserved; + switch (dev_property) { + case DevicePropertyDeviceDescription: + case DevicePropertyFriendlyName: + case DevicePropertyDriverKeyName: + if (wrap_is_pci_bus(wd->dev_bus)) + RtlInitAnsiString(&ansi, "PCI"); + else // if (wrap_is_usb_bus(wd->dev_bus)) + RtlInitAnsiString(&ansi, "USB"); + need = sizeof(wchar_t) * (ansi.max_length + 1); + if (buffer_len < need) { + *result_len = need; + IOEXIT(return STATUS_BUFFER_TOO_SMALL); + } + unicode.max_length = buffer_len; + unicode.buf = buffer; + if (RtlAnsiStringToUnicodeString(&unicode, &ansi, + FALSE) != STATUS_SUCCESS) { + *result_len = unicode.length; + IOEXIT(return STATUS_BUFFER_TOO_SMALL); + } + IOEXIT(return STATUS_SUCCESS); + default: + WARNING("%d not implemented", dev_property); + IOEXIT(return STATUS_INVALID_PARAMETER_2); + } +} + +wstdcall NTSTATUS WIN_FUNC(IoGetDeviceObjectPointer,4) + (struct unicode_string *name, ACCESS_MASK desired_access, + void *file_obj, struct device_object *dev_obj) +{ + struct common_object_header *coh; + + dev_obj = NULL; + /* TODO: access is not checked and file_obj is set to NULL */ + file_obj = NULL; + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(coh, &object_list, list) { + TRACE5("header: %p, type: %d", coh, coh->type); + if (coh->type != OBJECT_TYPE_DEVICE) + continue; + if (!RtlCompareUnicodeString(&coh->name, name, TRUE)) { + dev_obj = HEADER_TO_OBJECT(coh); + TRACE5("dev_obj: %p", dev_obj); + break; + } + } + spin_unlock_bh(&ntoskernel_lock); + if (dev_obj) + IOEXIT(return STATUS_SUCCESS); + else + IOEXIT(return STATUS_OBJECT_NAME_INVALID); +} + +/* NOTE: Make sure to compile with -freg-struct-return, so gcc will + * return union in register, like Windows */ +wstdcall union power_state WIN_FUNC(PoSetPowerState,3) + (struct device_object *dev_obj, enum power_state_type type, + union power_state state) +{ + IOEXIT(return state); +} + +wstdcall NTSTATUS WIN_FUNC(PoCallDriver,2) + (struct device_object *dev_obj, struct irp *irp) +{ + return IoCallDriver(dev_obj, irp); +} + +wstdcall NTSTATUS WIN_FUNC(PoRequestPowerIrp,6) + (struct device_object *dev_obj, UCHAR minor_fn, + union power_state power_state, void *completion_func, + void *context, struct irp **pirp) +{ + struct irp *irp; + struct io_stack_location *irp_sl; + + TRACE1("%p, %d, %p", dev_obj, dev_obj->stack_count, dev_obj->drv_obj); + irp = IoAllocateIrp(dev_obj->stack_count, FALSE); + if (!irp) + return STATUS_INSUFFICIENT_RESOURCES; + irp_sl = IoGetNextIrpStackLocation(irp); + irp_sl->major_fn = IRP_MJ_POWER; + irp_sl->minor_fn = minor_fn; + if (minor_fn == IRP_MN_WAIT_WAKE) + irp_sl->params.power.type = SystemPowerState; + else + irp_sl->params.power.type = DevicePowerState; + irp_sl->params.power.state = power_state; + irp_sl->completion_routine = completion_func; + irp->io_status.status = STATUS_NOT_SUPPORTED; + *pirp = irp; + return PoCallDriver(dev_obj, irp); +} + +wstdcall void WIN_FUNC(PoStartNextPowerIrp,1) + (struct irp *irp) +{ + IOENTER("irp = %p", irp); + IOEXIT(return); +} + +wstdcall void WIN_FUNC(IoInitializeRemoveLockEx,5) + (struct io_remove_lock *lock, ULONG alloc_tag, ULONG max_locked_min, + ULONG high_mark, ULONG lock_size) +{ + TODO(); +} + +wstdcall void *WIN_FUNC(IoAllocateErrorLogEntry,2) + (void *io_object, UCHAR entry_size) +{ + /* not implemented fully */ + void *ret = kmalloc(sizeof(struct io_error_log_packet) + entry_size, + irql_gfp()); + TRACE2("%p", ret); + if (ret) + return ret + sizeof(struct io_error_log_packet); + else + return NULL; +} + +wstdcall void WIN_FUNC(IoWriteErrorLogEntry,1) + (void *entry) +{ + /* TODO: log error with codes and message */ + ERROR(""); +} + +wstdcall void WIN_FUNC(IoFreeErrorLogEntry,1) + (void *entry) +{ + TRACE2("%p", entry); + kfree(entry - sizeof(struct io_error_log_packet)); +} + +wstdcall NTSTATUS WIN_FUNC(IoAcquireRemoveLockEx,5) + (struct io_remove_lock lock, void *tag, char *file, ULONG line, + ULONG lock_size) +{ + TODO(); + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(IoReleaseRemoveLockEx,3) + (struct io_remove_lock lock, void *tag, ULONG lock_size) +{ + TODO(); + IOEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(IoRegisterDeviceInterface,4) + (struct device_object *pdo, struct guid *guid_class, + struct unicode_string *reference, struct unicode_string *link) +{ + struct ansi_string ansi; + + /* TODO: check if pdo is valid */ + RtlInitAnsiString(&ansi, "ndis"); + ENTER1("pdo: %p, ref: %p, link: %p, %x, %x, %x", pdo, reference, link, + guid_class->data1, guid_class->data2, guid_class->data3); + return RtlAnsiStringToUnicodeString(link, &ansi, TRUE); +} + +wstdcall NTSTATUS WIN_FUNC(IoSetDeviceInterfaceState,2) + (struct unicode_string *link, BOOLEAN enable) +{ + ENTER1("link: %p, enable: %d", link, enable); + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(IoOpenDeviceRegistryKey,4) + (struct device_object *dev_obj, ULONG type, ACCESS_MASK mask, + void **handle) +{ + ENTER1("dev_obj: %p", dev_obj); + *handle = dev_obj; + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(IoWMIRegistrationControl,2) + (struct device_object *dev_obj, ULONG action) +{ + ENTER2("%p, %d", dev_obj, action); + EXIT2(return STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(IoInvalidateDeviceRelations,2) + (struct device_object *dev_obj, enum device_relation_type type) +{ + INFO("%p, %d", dev_obj, type); + TODO(); +} + +wstdcall void WIN_FUNC(IoInvalidateDeviceState,1) + (struct device_object *pdo) +{ + INFO("%p", pdo); + TODO(); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapndis.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapndis.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _WRAPNDIS_H_ +#define _WRAPNDIS_H_ + +#include "ndis.h" +#include "pnp.h" + +int wrapndis_init(void); +void wrapndis_exit(void); + +NDIS_STATUS mp_reset(struct ndis_device *wnd); + +NDIS_STATUS mp_request(enum ndis_request_type request, + struct ndis_device *wnd, ndis_oid oid, + void *buf, ULONG buflen, ULONG *written, ULONG *needed); + +static inline NDIS_STATUS mp_query_info(struct ndis_device *wnd, + ndis_oid oid, void *buf, ULONG buflen, + ULONG *written, ULONG *needed) +{ + return mp_request(NdisRequestQueryInformation, wnd, oid, + buf, buflen, written, needed); +} + +static inline NDIS_STATUS mp_set_info(struct ndis_device *wnd, + ndis_oid oid, void *buf, ULONG buflen, + ULONG *written, ULONG *needed) +{ + return mp_request(NdisRequestSetInformation, wnd, oid, + buf, buflen, written, needed); +} + +static inline NDIS_STATUS mp_query(struct ndis_device *wnd, ndis_oid oid, + void *buf, ULONG buflen) +{ + return mp_request(NdisRequestQueryInformation, wnd, oid, + buf, buflen, NULL, NULL); +} + +static inline NDIS_STATUS mp_query_int(struct ndis_device *wnd, + ndis_oid oid, ULONG *data) +{ + return mp_request(NdisRequestQueryInformation, wnd, oid, + data, sizeof(ULONG), NULL, NULL); +} + +static inline NDIS_STATUS mp_set(struct ndis_device *wnd, ndis_oid oid, + void *buf, ULONG buflen) +{ + return mp_request(NdisRequestSetInformation, wnd, oid, + buf, buflen, NULL, NULL); +} + +static inline NDIS_STATUS mp_set_int(struct ndis_device *wnd, + ndis_oid oid, ULONG data) +{ + return mp_request(NdisRequestSetInformation, wnd, oid, + &data, sizeof(ULONG), NULL, NULL); +} + +void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet, + NDIS_STATUS status); +int init_ndis_driver(struct driver_object *drv_obj); +NDIS_STATUS ndis_reinit(struct ndis_device *wnd); +void set_media_state(struct ndis_device *wnd, enum ndis_media_state state); + +void hangcheck_add(struct ndis_device *wnd); +void hangcheck_del(struct ndis_device *wnd); + +driver_dispatch_t winNdisDispatchPnp; +driver_dispatch_t winNdisDispatchPower; +driver_dispatch_t winNdisDispatchDeviceControl; + +struct iw_statistics *get_iw_stats(struct net_device *dev); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/crt.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/crt.c @@ -0,0 +1,578 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ntoskernel.h" +#include "crt_exports.h" + +#ifdef CONFIG_X86_64 +/* Windows long is 32-bit, so strip single 'l' in integer formats */ +static void strip_l_modifier(char *str) +{ + char *ptr = str; + int in_format = 0; + char *lptr = NULL; + char last = 0; + char *end_ptr; + char *wptr; + + /* Replace single 'l' inside integer formats with '\0' */ + for (ptr = str; *ptr; ptr++) { + if (!in_format) { + if (*ptr == '%') + in_format = 1; + last = *ptr; + continue; + } + switch (*ptr) { + case 'd': + case 'i': + case 'o': + case 'u': + case 'x': + case 'X': + case 'p': + case 'n': + case 'm': + if (lptr) { + *lptr = '\0'; + lptr = NULL; + } + in_format = 0; + break; + case 'c': + case 'C': + case 's': + case 'S': + case 'f': + case 'e': + case 'E': + case 'g': + case 'G': + case 'a': + case 'A': + lptr = NULL; + in_format = 0; + break; + case '%': + lptr = NULL; + if (last == '%') + in_format = 0; + else + in_format = 1; /* ignore previous junk */ + break; + case 'l': + if (last == 'l') + lptr = NULL; + else + lptr = ptr; + break; + default: + break; + } + last = *ptr; + } + + /* Purge zeroes from the resulting string */ + end_ptr = ptr; + wptr = str; + for (ptr = str; ptr < end_ptr; ptr++) + if (*ptr != 0) + *(wptr++) = *ptr; + *wptr = 0; +} + +/* + * va_list on x86_64 Linux is designed to allow passing arguments in registers + * even to variadic functions. va_list is a structure holding pointers to the + * register save area, which holds the arguments passed in registers, and to + * the stack, which may have the arguments that did not fit the registers. + * va_list also holds offsets in the register save area for the next general + * purpose and floating point registers that the next va_arg() would fetch. + * + * Unlike Linux, the Windows va_list is just a pointer to the stack. No + * arguments are passed in the registers. That's why we construct the Linux + * va_list so that the register save area is never used. For that goal, we set + * the offsets to the maximal allowed values, meaning that the arguments passed + * in the registers have been exhausted. The values are 48 for general purpose + * registers (6 registers, 8 bytes each) and 304 for floating point registers + * (16 registers, 16 bytes each, on top of general purpose register). + */ + +struct x86_64_va_list { + int gp_offset; + int fp_offset; + void *overflow_arg_area; + void *reg_save_area; +}; + +#define VA_LIST_DECL(_args) \ + va_list _args##new; \ + struct x86_64_va_list *_args##x; +#define VA_LIST_PREP(_args) \ +do { \ + _args##x = (struct x86_64_va_list *)&_args##new; \ + _args##x->gp_offset = 6 * 8; /* GP registers exhausted */ \ + _args##x->fp_offset = 6 * 8 + 16 * 16; /* FP registers exhausted */ \ + _args##x->overflow_arg_area = (void *)_args; \ + _args##x->reg_save_area = NULL; \ +} while (0) +#define VA_LIST_CONV(_args) (_args##new) +#define VA_LIST_FREE(_args) +#define FMT_DECL(_fmt) \ + char *_fmt##copy; \ + int _fmt##len; +#define FMT_PREP(_fmt) \ +do { \ + _fmt##len = strlen(format) + 1; \ + _fmt##copy = kmalloc(_fmt##len, GFP_KERNEL); \ + if (_fmt##copy) { \ + memcpy(_fmt##copy, format, _fmt##len); \ + strip_l_modifier(_fmt##copy); \ + } \ +} while (0) +#define FMT_CONV(_fmt) (_fmt##copy ? _fmt##copy : format) +#define FMT_FREE(_fmt) kfree(_fmt##copy) + +#else /* !CONFIG_X86_64 */ + +#define VA_LIST_DECL(_args) +#define VA_LIST_PREP(_args) +#define VA_LIST_CONV(_args) (_args) +#define VA_LIST_FREE(_args) +#define FMT_DECL(_fmt) +#define FMT_PREP(_fmt) +#define FMT_CONV(_fmt) (format) +#define FMT_FREE(_fmt) + +#endif /* !CONFIG_X86_64 */ + +noregparm INT WIN_FUNC(_win_sprintf,12) + (char *buf, const char *format, ...) +{ + va_list args; + int res; + FMT_DECL(format) + + FMT_PREP(format); + va_start(args, format); + res = vsprintf(buf, FMT_CONV(format), args); + va_end(args); + FMT_FREE(format); + + TRACE2("buf: %p: %s", buf, buf); + return res; +} + +noregparm INT WIN_FUNC(swprintf,12) + (wchar_t *buf, const wchar_t *format, ...) +{ + TODO(); + EXIT2(return 0); +} + +noregparm INT WIN_FUNC(_win_vsprintf,3) + (char *str, const char *format, va_list ap) +{ + INT i; + VA_LIST_DECL(ap) + FMT_DECL(format) + + VA_LIST_PREP(ap); + FMT_PREP(format); + + i = vsprintf(str, FMT_CONV(format), VA_LIST_CONV(ap)); + TRACE2("str: %p: %s", str, str); + + FMT_FREE(format); + VA_LIST_FREE(ap); + EXIT2(return i); +} + +noregparm INT WIN_FUNC(_win_snprintf,12) + (char *buf, SIZE_T count, const char *format, ...) +{ + va_list args; + int res; + FMT_DECL(format) + + FMT_PREP(format); + va_start(args, format); + res = vsnprintf(buf, count, FMT_CONV(format), args); + va_end(args); + TRACE2("buf: %p: %s", buf, buf); + + FMT_FREE(format); + return res; +} + +noregparm INT WIN_FUNC(_win__snprintf,12) + (char *buf, SIZE_T count, const char *format, ...) +{ + va_list args; + int res; + FMT_DECL(format) + + FMT_PREP(format); + va_start(args, format); + res = vsnprintf(buf, count, FMT_CONV(format), args); + va_end(args); + TRACE2("buf: %p: %s", buf, buf); + + FMT_FREE(format); + return res; +} + +noregparm INT WIN_FUNC(_win_vsnprintf,4) + (char *str, SIZE_T size, const char *format, va_list ap) +{ + INT i; + VA_LIST_DECL(ap) + FMT_DECL(format) + + VA_LIST_PREP(ap); + FMT_PREP(format); + + i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap)); + TRACE2("str: %p: %s", str, str); + + FMT_FREE(format); + VA_LIST_FREE(ap); + EXIT2(return i); +} + +noregparm INT WIN_FUNC(_win__vsnprintf,4) + (char *str, SIZE_T size, const char *format, va_list ap) +{ + INT i; + VA_LIST_DECL(ap) + FMT_DECL(format) + + VA_LIST_PREP(ap); + FMT_PREP(format); + + i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap)); + TRACE2("str: %p: %s", str, str); + + FMT_FREE(format); + VA_LIST_FREE(ap); + EXIT2(return i); +} + +noregparm char *WIN_FUNC(_win_strncpy,3) + (char *dst, char *src, SIZE_T n) +{ + return strncpy(dst, src, n); +} + +noregparm SIZE_T WIN_FUNC(_win_strlen,1) + (const char *s) +{ + return strlen(s); +} + +noregparm INT WIN_FUNC(_win_strncmp,3) + (const char *s1, const char *s2, SIZE_T n) +{ + return strncmp(s1, s2, n); +} + +noregparm INT WIN_FUNC(_win_strcmp,2) + (const char *s1, const char *s2) +{ + return strcmp(s1, s2); +} + +noregparm INT WIN_FUNC(_win_stricmp,2) + (const char *s1, const char *s2) +{ + return stricmp(s1, s2); +} + +noregparm char *WIN_FUNC(_win_strncat,3) + (char *dest, const char *src, SIZE_T n) +{ + return strncat(dest, src, n); +} + +noregparm INT WIN_FUNC(_win_wcscmp,2) + (const wchar_t *s1, const wchar_t *s2) +{ + while (*s1 && *s1 == *s2) { + s1++; + s2++; + } + return *s1 - *s2; +} + +noregparm INT WIN_FUNC(_win_wcsicmp,2) + (const wchar_t *s1, const wchar_t *s2) +{ + while (*s1 && tolower((char)*s1) == tolower((char)*s2)) { + s1++; + s2++; + } + return tolower((char)*s1) - tolower((char)*s2); +} + +noregparm SIZE_T WIN_FUNC(_win_wcslen,1) + (const wchar_t *s) +{ + const wchar_t *t = s; + while (*t) + t++; + return t - s; +} + +noregparm wchar_t *WIN_FUNC(_win_wcsncpy,3) + (wchar_t *dest, const wchar_t *src, SIZE_T n) +{ + const wchar_t *s; + wchar_t *d; + s = src + n; + d = dest; + while (src < s && (*d++ = *src++)) + ; + if (s > src) + memset(d, 0, (s - src) * sizeof(wchar_t)); + return dest; +} + +noregparm wchar_t *WIN_FUNC(_win_wcscpy,2) + (wchar_t *dest, const wchar_t *src) +{ + wchar_t *d = dest; + while ((*d++ = *src++)) + ; + return dest; +} + +noregparm wchar_t *WIN_FUNC(_win_wcscat,2) + (wchar_t *dest, const wchar_t *src) +{ + wchar_t *d; + d = dest; + while (*d) + d++; + while ((*d++ = *src++)) + ; + return dest; +} + +noregparm INT WIN_FUNC(_win_towupper,1) + (wchar_t c) +{ + return toupper(c); +} + +noregparm INT WIN_FUNC(_win_towlower,1) + (wchar_t c) +{ + return tolower(c); +} + +noregparm INT WIN_FUNC(_win_tolower,1) + (INT c) +{ + return tolower(c); +} + +noregparm INT WIN_FUNC(_win_toupper,1) + (INT c) +{ + return toupper(c); +} + +noregparm void *WIN_FUNC(_win_strcpy,2) + (void *to, const void *from) +{ + return strcpy(to, from); +} + +noregparm char *WIN_FUNC(_win_strstr,2) + (const char *s1, const char *s2) +{ + return strstr(s1, s2); +} + +noregparm char *WIN_FUNC(_win_strchr,2) + (const char *s, int c) +{ + return strchr(s, c); +} + +noregparm char *WIN_FUNC(_win_strrchr,2) + (const char *s, int c) +{ + return strrchr(s, c); +} + +noregparm void *WIN_FUNC(_win_memmove,3) + (void *to, void *from, SIZE_T count) +{ + return memmove(to, from, count); +} + +noregparm void *WIN_FUNC(_win_memchr,3) + (const void *s, INT c, SIZE_T n) +{ + return memchr(s, c, n); +} + +noregparm void *WIN_FUNC(_win_memcpy,3) + (void *to, const void *from, SIZE_T n) +{ + return memcpy(to, from, n); +} + +noregparm void *WIN_FUNC(_win_memset,3) + (void *s, char c, SIZE_T count) +{ + return memset(s, c, count); +} + +noregparm int WIN_FUNC(_win_memcmp,3) + (void *s1, void *s2, SIZE_T n) +{ + return memcmp(s1, s2, n); +} + +noregparm void WIN_FUNC(_win_srand,1) + (UINT seed) +{ + net_srandom(seed); +} + +noregparm int WIN_FUNC(rand,0) + (void) +{ + char buf[6]; + int i, n; + + get_random_bytes(buf, sizeof(buf)); + for (n = i = 0; i < sizeof(buf) ; i++) + n += buf[i]; + return n; +} + +noregparm int WIN_FUNC(_win_atoi,1) + (const char *ptr) +{ + int i = simple_strtol(ptr, NULL, 10); + return i; +} + +noregparm int WIN_FUNC(_win_isprint,1) + (int c) +{ + return isprint(c); +} + +wstdcall s64 WIN_FUNC(_alldiv,2) + (s64 a, s64 b) +{ + return a / b; +} + +wstdcall u64 WIN_FUNC(_aulldiv,2) + (u64 a, u64 b) +{ + return a / b; +} + +wstdcall s64 WIN_FUNC(_allmul,2) + (s64 a, s64 b) +{ + return a * b; +} + +wstdcall u64 WIN_FUNC(_aullmul,2) + (u64 a, u64 b) +{ + return a * b; +} + +wstdcall s64 WIN_FUNC(_allrem,2) + (s64 a, s64 b) +{ + return a % b; +} + +wstdcall u64 WIN_FUNC(_aullrem,2) + (u64 a, u64 b) +{ + return a % b; +} + +__attribute__((regparm(3))) s64 WIN_FUNC(_allshl,2) + (s64 a, u8 b) +{ + return a << b; +} + +__attribute__((regparm(3))) u64 WIN_FUNC(_aullshl,2) + (u64 a, u8 b) +{ + return a << b; +} + +__attribute__((regparm(3))) s64 WIN_FUNC(_allshr,2) + (s64 a, u8 b) +{ + return a >> b; +} + +__attribute__((regparm(3))) u64 WIN_FUNC(_aullshr,2) + (u64 a, u8 b) +{ + return a >> b; +} + +int stricmp(const char *s1, const char *s2) +{ + while (*s1 && tolower(*s1) == tolower(*s2)) { + s1++; + s2++; + } + return *s1 - *s2; +} + +void dump_bytes(const char *ctx, const u8 *from, int len) +{ + int i, j; + u8 *buf; + + buf = kmalloc(len * 3 + 1, irql_gfp()); + if (!buf) { + ERROR("couldn't allocate memory"); + return; + } + for (i = j = 0; i < len; i++, j += 3) { + sprintf(&buf[j], "%02x ", from[i]); + } + buf[j] = 0; + printk(KERN_DEBUG "%s: %p: %s\n", ctx, from, buf); + kfree(buf); +} + +int crt_init(void) +{ + return 0; +} + +/* called when module is being removed */ +void crt_exit(void) +{ + EXIT4(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/pe_linker.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/pe_linker.c @@ -0,0 +1,609 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifdef TEST_LOADER + +#include "usr_linker.h" + +#else + +#include +#include + +//#define DEBUGLINKER 2 + +#include "ntoskernel.h" + +#endif + +struct pe_exports { + char *dll; + char *name; + generic_func addr; +}; + +static struct pe_exports pe_exports[40]; +static int num_pe_exports; + +#define RVA2VA(image, rva, type) (type)(ULONG_PTR)((void *)image + rva) +#define CHECK_SZ(a,b) { if (sizeof(a) != b) { \ + ERROR("%s is bad, got %zd, expected %d", \ + #a , sizeof(a), (b)); return -EINVAL; } } + +#if defined(DEBUGLINKER) && DEBUGLINKER > 0 +#define DBGLINKER(fmt, ...) printk(KERN_INFO "%s (%s:%d): " fmt "\n", \ + DRIVER_NAME, __func__, \ + __LINE__ , ## __VA_ARGS__); +static const char *image_directory_name[] = { + "EXPORT", + "IMPORT", + "RESOURCE", + "EXCEPTION", + "SECURITY", + "BASERELOC", + "DEBUG", + "COPYRIGHT", + "GLOBALPTR", + "TLS", + "LOAD_CONFIG", + "BOUND_IMPORT", + "IAT", + "DELAY_IMPORT", + "COM_DESCRIPTOR" }; +#else +#define DBGLINKER(fmt, ...) do { } while (0) +#endif + +#ifndef TEST_LOADER +extern struct wrap_export ntoskernel_exports[], ntoskernel_io_exports[], + ndis_exports[], crt_exports[], hal_exports[], rtl_exports[]; +#ifdef ENABLE_USB +extern struct wrap_export usb_exports[]; +#endif + +static char *get_export(char *name) +{ + int i; + + for (i = 0 ; ntoskernel_exports[i].name != NULL; i++) + if (strcmp(ntoskernel_exports[i].name, name) == 0) + return (char *)ntoskernel_exports[i].func; + + for (i = 0 ; ntoskernel_io_exports[i].name != NULL; i++) + if (strcmp(ntoskernel_io_exports[i].name, name) == 0) + return (char *)ntoskernel_io_exports[i].func; + + for (i = 0 ; ndis_exports[i].name != NULL; i++) + if (strcmp(ndis_exports[i].name, name) == 0) + return (char *)ndis_exports[i].func; + + for (i = 0 ; crt_exports[i].name != NULL; i++) + if (strcmp(crt_exports[i].name, name) == 0) + return (char *)crt_exports[i].func; + + for (i = 0 ; hal_exports[i].name != NULL; i++) + if (strcmp(hal_exports[i].name, name) == 0) + return (char *)hal_exports[i].func; + + for (i = 0 ; rtl_exports[i].name != NULL; i++) + if (strcmp(rtl_exports[i].name, name) == 0) + return (char *)rtl_exports[i].func; + +#ifdef ENABLE_USB + for (i = 0 ; usb_exports[i].name != NULL; i++) + if (strcmp(usb_exports[i].name, name) == 0) + return (char *)usb_exports[i].func; +#endif + + for (i = 0; i < num_pe_exports; i++) + if (strcmp(pe_exports[i].name, name) == 0) + return (char *)pe_exports[i].addr; + + return NULL; +} +#endif // TEST_LOADER + +static void *get_dll_init(char *name) +{ + int i; + for (i = 0; i < num_pe_exports; i++) + if ((strcmp(pe_exports[i].dll, name) == 0) && + (strcmp(pe_exports[i].name, "DllInitialize") == 0)) + return (void *)pe_exports[i].addr; + return NULL; +} + +/* + * Find and validate the coff header + * + */ +static int check_nt_hdr(IMAGE_NT_HEADERS *nt_hdr) +{ + int i; + WORD attr; + PIMAGE_OPTIONAL_HEADER opt_hdr; + + /* Validate the "PE\0\0" signature */ + if (nt_hdr->Signature != IMAGE_NT_SIGNATURE) { + ERROR("is this driver file? bad signature %08x", + nt_hdr->Signature); + return -EINVAL; + } + + opt_hdr = &nt_hdr->OptionalHeader; + /* Make sure Image is PE32 or PE32+ */ +#ifdef CONFIG_X86_64 + if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR64_MAGIC) { + ERROR("kernel is 64-bit, but Windows driver is not 64-bit;" + "bad magic: %04X", opt_hdr->Magic); + return -EINVAL; + } +#else + if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR32_MAGIC) { + ERROR("kernel is 32-bit, but Windows driver is not 32-bit;" + "bad magic: %04X", opt_hdr->Magic); + return -EINVAL; + } +#endif + + /* Validate the image for the current architecture. */ +#ifdef CONFIG_X86_64 + if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_AMD64) { + ERROR("kernel is 64-bit, but Windows driver is not 64-bit;" + " (PE signature is %04X)", nt_hdr->FileHeader.Machine); + return -EINVAL; + } +#else + if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_I386) { + ERROR("kernel is 32-bit, but Windows driver is not 32-bit;" + " (PE signature is %04X)", nt_hdr->FileHeader.Machine); + return -EINVAL; + } +#endif + + /* Must have attributes */ +#ifdef CONFIG_X86_64 + attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_LARGE_ADDRESS_AWARE; +#else + attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_32BIT_MACHINE; +#endif + if ((nt_hdr->FileHeader.Characteristics & attr) != attr) + return -EINVAL; + + /* Must be relocatable */ + attr = IMAGE_FILE_RELOCS_STRIPPED; + if ((nt_hdr->FileHeader.Characteristics & attr)) + return -EINVAL; + + /* Make sure we have at least one section */ + if (nt_hdr->FileHeader.NumberOfSections == 0) + return -EINVAL; + + if (opt_hdr->SectionAlignment < opt_hdr->FileAlignment) { + ERROR("alignment mismatch: secion: 0x%x, file: 0x%x", + opt_hdr->SectionAlignment, opt_hdr->FileAlignment); + return -EINVAL; + } + + DBGLINKER("number of datadictionary entries %d", + opt_hdr->NumberOfRvaAndSizes); + for (i = 0; i < opt_hdr->NumberOfRvaAndSizes; i++) { + DBGLINKER("datadirectory %s RVA:%X Size:%d", + (i<=IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR)? + image_directory_name[i] : "unknown", + opt_hdr->DataDirectory[i].VirtualAddress, + opt_hdr->DataDirectory[i].Size); + } + + if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_EXECUTABLE_IMAGE)) + return IMAGE_FILE_EXECUTABLE_IMAGE; + if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_DLL)) + return IMAGE_FILE_DLL; + return -EINVAL; +} + +static int import(void *image, IMAGE_IMPORT_DESCRIPTOR *dirent, char *dll) +{ + ULONG_PTR *lookup_tbl, *address_tbl; + char *symname = NULL; + int i; + int ret = 0; + void *adr; + + lookup_tbl = RVA2VA(image, dirent->u.OriginalFirstThunk, ULONG_PTR *); + address_tbl = RVA2VA(image, dirent->FirstThunk, ULONG_PTR *); + + for (i = 0; lookup_tbl[i]; i++) { + if (IMAGE_SNAP_BY_ORDINAL(lookup_tbl[i])) { + ERROR("ordinal import not supported: %Lu", + (uint64_t)lookup_tbl[i]); + return -1; + } + else { + symname = RVA2VA(image, + ((lookup_tbl[i] & + ~IMAGE_ORDINAL_FLAG) + 2), char *); + } + + adr = get_export(symname); + if (adr == NULL) { + ERROR("unknown symbol: %s:'%s'", dll, symname); + ret = -1; + } else { + DBGLINKER("found symbol: %s:%s: addr: %p, rva = %Lu", + dll, symname, adr, (uint64_t)address_tbl[i]); + address_tbl[i] = (ULONG_PTR)adr; + } + } + return ret; +} + +static int read_exports(struct pe_image *pe) +{ + IMAGE_EXPORT_DIRECTORY *export_dir_table; + uint32_t *export_addr_table; + int i; + uint32_t *name_table; + PIMAGE_OPTIONAL_HEADER opt_hdr; + IMAGE_DATA_DIRECTORY *export_data_dir; + + opt_hdr = &pe->nt_hdr->OptionalHeader; + export_data_dir = + &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_EXPORT]; + + if (export_data_dir->Size == 0) { + DBGLINKER("no exports"); + return 0; + } + + export_dir_table = + RVA2VA(pe->image, export_data_dir->VirtualAddress, + IMAGE_EXPORT_DIRECTORY *); + + name_table = (unsigned int *)(pe->image + + export_dir_table->AddressOfNames); + export_addr_table = (uint32_t *) + (pe->image + export_dir_table->AddressOfFunctions); + + for (i = 0; i < export_dir_table->NumberOfNames; i++) { + + if (export_data_dir->VirtualAddress <= *export_addr_table || + *export_addr_table >= (export_data_dir->VirtualAddress + + export_data_dir->Size)) + DBGLINKER("forwarder rva"); + + DBGLINKER("export symbol: %s, at %p", + (char *)(pe->image + *name_table), + pe->image + *export_addr_table); + + pe_exports[num_pe_exports].dll = pe->name; + pe_exports[num_pe_exports].name = pe->image + *name_table; + pe_exports[num_pe_exports].addr = + pe->image + *export_addr_table; + + num_pe_exports++; + name_table++; + export_addr_table++; + } + return 0; +} + +static int fixup_imports(void *image, IMAGE_NT_HEADERS *nt_hdr) +{ + int i; + char *name; + int ret = 0; + IMAGE_IMPORT_DESCRIPTOR *dirent; + IMAGE_DATA_DIRECTORY *import_data_dir; + PIMAGE_OPTIONAL_HEADER opt_hdr; + + opt_hdr = &nt_hdr->OptionalHeader; + import_data_dir = + &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_IMPORT]; + dirent = RVA2VA(image, import_data_dir->VirtualAddress, + IMAGE_IMPORT_DESCRIPTOR *); + + for (i = 0; dirent[i].Name; i++) { + name = RVA2VA(image, dirent[i].Name, char*); + + DBGLINKER("imports from dll: %s", name); + ret += import(image, &dirent[i], name); + } + return ret; +} + +static int fixup_reloc(void *image, IMAGE_NT_HEADERS *nt_hdr) +{ + ULONG_PTR base; + ULONG_PTR size; + IMAGE_BASE_RELOCATION *fixup_block; + IMAGE_DATA_DIRECTORY *base_reloc_data_dir; + PIMAGE_OPTIONAL_HEADER opt_hdr; + + opt_hdr = &nt_hdr->OptionalHeader; + base = opt_hdr->ImageBase; + base_reloc_data_dir = + &opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_BASERELOC]; + if (base_reloc_data_dir->Size == 0) + return 0; + + fixup_block = RVA2VA(image, base_reloc_data_dir->VirtualAddress, + IMAGE_BASE_RELOCATION *); + DBGLINKER("fixup_block=%p, image=%p", fixup_block, image); + DBGLINKER("fixup_block info: %x %d", + fixup_block->VirtualAddress, fixup_block->SizeOfBlock); + + while (fixup_block->SizeOfBlock) { + int i; + WORD fixup, offset; + + size = (fixup_block->SizeOfBlock - + sizeof(IMAGE_BASE_RELOCATION)) / sizeof(WORD); + DBGLINKER("found %Lu relocations in this block", + (uint64_t)size); + + for (i = 0; i < size; i++) { + fixup = fixup_block->TypeOffset[i]; + offset = fixup & 0xfff; + switch ((fixup >> 12) & 0x0f) { + case IMAGE_REL_BASED_ABSOLUTE: + break; + + case IMAGE_REL_BASED_HIGHLOW: { + uint32_t addr; + uint32_t *loc = + RVA2VA(image, + fixup_block->VirtualAddress + + offset, uint32_t *); + addr = RVA2VA(image, (*loc - base), uint32_t); + DBGLINKER("relocation: *%p (Val:%X)= %X", + loc, *loc, addr); + *loc = addr; + } + break; + + case IMAGE_REL_BASED_DIR64: { + uint64_t addr; + uint64_t *loc = + RVA2VA(image, + fixup_block->VirtualAddress + + offset, uint64_t *); + addr = RVA2VA(image, (*loc - base), uint64_t); + DBGLINKER("relocation: *%p (Val:%llX)= %llx", + loc, *loc, addr); + *loc = addr; + } + break; + + default: + ERROR("unknown fixup: %08X", + (fixup >> 12) & 0x0f); + return -EOPNOTSUPP; + break; + } + } + DBGLINKER("finished relocating block"); + + fixup_block = (IMAGE_BASE_RELOCATION *) + ((void *)fixup_block + fixup_block->SizeOfBlock); + }; + DBGLINKER("done relocating all"); + + return 0; +} + +/* Expand the image in memroy if necessary. The image on disk does not + * necessarily maps the image of the driver in memory, so we have to + * re-write it in order to fullfill the sections alignements. The + * advantage to do that is that rva_to_va becomes a simple + * addition. */ +static int fix_pe_image(struct pe_image *pe) +{ + void *image; + IMAGE_SECTION_HEADER *sect_hdr; + int i, sections; + int image_size; + + if (pe->size == pe->opt_hdr->SizeOfImage) { + /* Nothing to do */ + return 0; + } + + image_size = pe->opt_hdr->SizeOfImage; +#ifdef CONFIG_X86_64 +#ifdef PAGE_KERNEL_EXECUTABLE + image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM, + PAGE_KERNEL_EXECUTABLE); +#elif defined PAGE_KERNEL_EXEC + image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM, + PAGE_KERNEL_EXEC); +#else +#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC +#endif +#else +#ifdef cpu_has_nx + /* hate to play with kernel macros, but PAGE_KERNEL_EXEC is + * not available to modules! */ + if (cpu_has_nx) + image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM, + __pgprot(__PAGE_KERNEL & ~_PAGE_NX)); + else + image = vmalloc(image_size); +#else + image = vmalloc(image_size); +#endif +#endif + if (image == NULL) { + ERROR("failed to allocate enough space for new image:" + " %d bytes", image_size); + return -ENOMEM; + } + + /* Copy all the headers, ie everything before the first section. */ + + sections = pe->nt_hdr->FileHeader.NumberOfSections; + sect_hdr = IMAGE_FIRST_SECTION(pe->nt_hdr); + + DBGLINKER("copying headers: %u bytes", sect_hdr->PointerToRawData); + + memcpy(image, pe->image, sect_hdr->PointerToRawData); + + /* Copy all the sections */ + for (i = 0; i < sections; i++) { + DBGLINKER("Copy section %s from %x to %x", + sect_hdr->Name, sect_hdr->PointerToRawData, + sect_hdr->VirtualAddress); + if (sect_hdr->VirtualAddress+sect_hdr->SizeOfRawData > + image_size) { + ERROR("Invalid section %s in driver", sect_hdr->Name); + vfree(image); + return -EINVAL; + } + + memcpy(image+sect_hdr->VirtualAddress, + pe->image + sect_hdr->PointerToRawData, + sect_hdr->SizeOfRawData); + sect_hdr++; + } + + vfree(pe->image); + pe->image = image; + pe->size = image_size; + + /* Update our internal pointers */ + pe->nt_hdr = (IMAGE_NT_HEADERS *) + (pe->image + ((IMAGE_DOS_HEADER *)pe->image)->e_lfanew); + pe->opt_hdr = &pe->nt_hdr->OptionalHeader; + + DBGLINKER("set nt headers: nt_hdr=%p, opt_hdr=%p, image=%p", + pe->nt_hdr, pe->opt_hdr, pe->image); + + return 0; +} + +#if defined(CONFIG_X86_64) +static void fix_user_shared_data_addr(char *driver, unsigned long length) +{ + unsigned long i, n, max_addr, *addr; + + n = length - sizeof(unsigned long); + max_addr = KI_USER_SHARED_DATA + sizeof(kuser_shared_data); + for (i = 0; i < n; i++) { + addr = (unsigned long *)(driver + i); + if (*addr >= KI_USER_SHARED_DATA && *addr < max_addr) { + *addr -= KI_USER_SHARED_DATA; + *addr += (unsigned long)&kuser_shared_data; + kuser_shared_data.reserved1 = 1; + } + } +} +#endif + +int link_pe_images(struct pe_image *pe_image, unsigned short n) +{ + int i; + struct pe_image *pe; + +#ifdef DEBUG + /* Sanity checkings */ + CHECK_SZ(IMAGE_SECTION_HEADER, IMAGE_SIZEOF_SECTION_HEADER); + CHECK_SZ(IMAGE_FILE_HEADER, IMAGE_SIZEOF_FILE_HEADER); + CHECK_SZ(IMAGE_OPTIONAL_HEADER, IMAGE_SIZEOF_NT_OPTIONAL_HEADER); + CHECK_SZ(IMAGE_NT_HEADERS, 4 + IMAGE_SIZEOF_FILE_HEADER + + IMAGE_SIZEOF_NT_OPTIONAL_HEADER); + CHECK_SZ(IMAGE_DOS_HEADER, 0x40); + CHECK_SZ(IMAGE_EXPORT_DIRECTORY, 40); + CHECK_SZ(IMAGE_BASE_RELOCATION, 8); + CHECK_SZ(IMAGE_IMPORT_DESCRIPTOR, 20); +#endif + + for (i = 0; i < n; i++) { + IMAGE_DOS_HEADER *dos_hdr; + pe = &pe_image[i]; + dos_hdr = pe->image; + + if (pe->size < sizeof(IMAGE_DOS_HEADER)) { + TRACE1("image too small: %d", pe->size); + return -EINVAL; + } + + pe->nt_hdr = + (IMAGE_NT_HEADERS *)(pe->image + dos_hdr->e_lfanew); + pe->opt_hdr = &pe->nt_hdr->OptionalHeader; + + pe->type = check_nt_hdr(pe->nt_hdr); + if (pe->type <= 0) { + TRACE1("type <= 0"); + return -EINVAL; + } + + if (fix_pe_image(pe)) { + TRACE1("bad PE image"); + return -EINVAL; + } + + if (read_exports(pe)) { + TRACE1("read exports failed"); + return -EINVAL; + } + } + + for (i = 0; i < n; i++) { + pe = &pe_image[i]; + + if (fixup_reloc(pe->image, pe->nt_hdr)) { + TRACE1("fixup reloc failed"); + return -EINVAL; + } + if (fixup_imports(pe->image, pe->nt_hdr)) { + TRACE1("fixup imports failed"); + return -EINVAL; + } +#if defined(CONFIG_X86_64) + INFO("fixing KI_USER_SHARED_DATA address in the driver"); + fix_user_shared_data_addr(pe_image[i].image, pe_image[i].size); +#endif + flush_icache_range(pe->image, pe->size); + + pe->entry = + RVA2VA(pe->image, + pe->opt_hdr->AddressOfEntryPoint, void *); + TRACE1("entry is at %p, rva at %08X", pe->entry, + pe->opt_hdr->AddressOfEntryPoint); + } + + for (i = 0; i < n; i++) { + pe = &pe_image[i]; + + if (pe->type == IMAGE_FILE_DLL) { + struct unicode_string ustring; + char *buf = "0/0t0m0p00"; + int (*dll_entry)(struct unicode_string *ustring) + wstdcall; + + memset(&ustring, 0, sizeof(ustring)); + ustring.buf = (wchar_t *)buf; + dll_entry = (void *)get_dll_init(pe->name); + + TRACE1("calling dll_init at %p", dll_entry); + if (!dll_entry || dll_entry(&ustring)) + ERROR("DLL initialize failed for %s", + pe->name); + } + else if (pe->type != IMAGE_FILE_EXECUTABLE_IMAGE) + ERROR("illegal image type: %d", pe->type); + } + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapmem.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapmem.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2006 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _WRAPMEM_H_ + +/* set ALLOC_DEBUG to 1 to get information about memory used by both + * ndiswrapper and Windows driver by reading + * /proc/net/ndiswrapper/debug; this will also show memory leaks + * (memory allocated but not freed) when ndiswrapper module is + * unloaded. + + * ALLOC_DEBUG=2: details about individual allocations leaking is printed + * ALLOC_DEBUG=3: tags in ExAllocatePoolWithTag leaking printed +*/ + +//#ifndef ALLOC_DEBUG +//#define ALLOC_DEBUG 1 +//#endif + +enum alloc_type { ALLOC_TYPE_KMALLOC_ATOMIC, ALLOC_TYPE_KMALLOC_NON_ATOMIC, + ALLOC_TYPE_VMALLOC_ATOMIC, ALLOC_TYPE_VMALLOC_NON_ATOMIC, + ALLOC_TYPE_SLACK, ALLOC_TYPE_PAGES, ALLOC_TYPE_MAX }; + +int wrapmem_init(void); +void wrapmem_exit(void); +void *slack_kmalloc(size_t size); +void slack_kfree(void *ptr); +void wrapmem_info(void); + +#ifdef ALLOC_DEBUG +void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line); +void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line); +void wrap_kfree(void *ptr); +void *wrap_vmalloc(unsigned long size, const char *file, int line); +void *wrap__vmalloc(unsigned long size, gfp_t flags, pgprot_t prot, + const char *file, int line); +void wrap_vfree(void *ptr); +void *wrap_alloc_pages(gfp_t flags, unsigned int size, + const char *file, int line); +void wrap_free_pages(unsigned long ptr, int order); +int alloc_size(enum alloc_type type); + +#ifndef _WRAPMEM_C_ +#undef kmalloc +#undef kzalloc +#undef kfree +#undef vmalloc +#undef __vmalloc +#undef vfree +#define kmalloc(size, flags) \ + wrap_kmalloc(size, flags, __FILE__, __LINE__) +#define kzalloc(size, flags) \ + wrap_kzalloc(size, flags, __FILE__, __LINE__) +#define vmalloc(size) \ + wrap_vmalloc(size, __FILE__, __LINE__) +#define __vmalloc(size, flags, prot) \ + wrap__vmalloc(size, flags, prot, __FILE__, __LINE__) +#define kfree(ptr) wrap_kfree(ptr) +#define vfree(ptr) wrap_vfree(ptr) + +#define wrap_get_free_pages(flags, size) \ + wrap_alloc_pages(flags, size, __FILE__, __LINE__) +#undef free_pages +#define free_pages(ptr, order) wrap_free_pages(ptr, order) + +#if ALLOC_DEBUG > 1 +void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size, + ULONG tag, const char *file, int line); +#define ExAllocatePoolWithTag(pool_type, size, tag) \ + wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__) +#endif + +#endif // _WRAPMEM_C_ + +#else + +#define wrap_get_free_pages(flags, size) \ + (void *)__get_free_pages(flags, get_order(size)) + +#endif // ALLOC_DEBUG + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/win2lin_stubs.S +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/win2lin_stubs.S @@ -0,0 +1,288 @@ +/* + * Copyright (C) 2005 Karl Vogel, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include + +#ifdef CONFIG_X86_64 + +/* +# Windows <---> Linux register usage conversion when calling functions +# V = Volatile +# NV = Non Volatile (needs to be saved) +# +# Win Lin +# --------------------------------------- +# Rax Return V Return V +# Rbx NV NV +# Rcx Arg1 V Arg4 V +# Rdx Arg2 V Arg3 V +# Rsi NV Arg2 V +# Rdi NV Arg1 V +# Rsp NV NV +# Rbp NV NV +# R8 Arg3 V Arg5 V +# R9 Arg4 V Arg6 V +# R10 V V +# R11 V V +# R12 NV NV +# R13 NV NV +# R14 NV NV +# R15 NV NV +# +# In addition, Linux uses %rax to indicate number of SSE registers used +# when variadic functions are called. Since there is no way to obtain this +# from Windows, for now, we just assume this is 0 (hence %rax is cleared). +# +# Windows pushes arguments 5 and higher onto stack in case of integer +# variables and 4 and higher in case of floating point variabes (passed +# in SSE registers). + +In a windows function, the stackframe/registers look like this: + +# 0x0048 .... +# 0x0040 arg8 +# 0x0038 arg7 +# 0x0030 arg6 +# 0x0028 arg5 +# 0x0020 shadow/spill space for arg4 +# 0x0018 shadow/spill space for arg3 +# 0x0010 shadow/spill space for arg2 +# 0x0008 shadow/spill space for arg1 +# 0x0000 ret + +# register spill space is same irrespective of number of arguments - even +# if Windows function takes less than 4 arguments, 32 bytes above return +# address is reserved for the function + +In Linux it should look like: + +# 0x0018 .... +# 0x0010 arg8 +# 0x0008 arg7 +# 0x0000 ret + +*/ + +# +# setup for Windows to Linux function call +# + + .text + +.macro win2lin_prolog + push %rsi + push %rdi +.endm + +.macro win2lin_epilog + pop %rdi + pop %rsi +.endm + +# when Windows function calls Linux function, the function address is in %r10 + +.macro call_lin_func + xor %rax, %rax # rax indicates number of SSE regs + call *%r10 +.endm + +# before prolog, 0(%rsp) is return address, 8(%rsp) would be arg1 +# (but it is in register) and so on, so n'th arg would be at n*8(%rsp) +# for n > 4. But in prolog, we push 2 registers that are non-volaile in +# Windows, but volatile in Linux. So after prolog, args are at (n+2)*8(%rsp) + +#define win2lin_win_arg(n) (n+2)*8(%rsp) + +#define win2lin_arg1 mov %rcx, %rdi +#define win2lin_arg2 mov %rdx, %rsi +#define win2lin_arg3 mov %r8, %rdx +#define win2lin_arg4 mov %r9, %rcx +#define win2lin_arg5 mov win2lin_win_arg(5), %r8 +#define win2lin_arg6 mov win2lin_win_arg(6), %r9 + + .type win2lin0, @function +win2lin0: + win2lin_prolog + call_lin_func + win2lin_epilog + ret + .size win2lin0, .-win2lin0 + + .type win2lin1, @function +win2lin1: + win2lin_prolog + win2lin_arg1 + call_lin_func + win2lin_epilog + ret + .size win2lin1, .-win2lin1 + + .type win2lin2, @function +win2lin2: + win2lin_prolog + win2lin_arg1 + win2lin_arg2 + call_lin_func + win2lin_epilog + ret + .size win2lin2, .-win2lin2 + + .type win2lin3, @function +win2lin3: + win2lin_prolog + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + call_lin_func + win2lin_epilog + ret + .size win2lin3, .-win2lin3 + + .type win2lin4, @function +win2lin4: + win2lin_prolog + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + call_lin_func + win2lin_epilog + ret + .size win2lin4, .-win2lin4 + + .type win2lin5, @function +win2lin5: + win2lin_prolog + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + win2lin_arg5 + call_lin_func + win2lin_epilog + ret + .size win2lin5, .-win2lin5 + + .type win2lin6, @function +win2lin6: + win2lin_prolog + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + win2lin_arg5 + win2lin_arg6 + call_lin_func + win2lin_epilog + ret + .size win2lin6, .-win2lin6 + +# Allocate stack frame for Linux arguments before calling function. +# First 6 args are passed through registers, so we need space for 7 and above. +# The arguments should have been copied onto stack already. + +.macro call_lin_func_args n + sub $(\n-6)*8, %rsp + call_lin_func + add $(\n-6)*8, %rsp + .endm + +# m is index of Linux arg required, n is total number of args to function +# After stack frame is allocated, Linux arg 7 should be at 0(%rsp), +# arg 8 should be at 1*8(%rsp) and so on. So Linux arg m should be at (m-7)*8 +# Stack frame starts at -(n-6)*8(%rsp), so before stack frame is allocated +# Linux arg m should be at (6-n+m-7)*8(%rsp) + +#define win2lin_lin_arg(m,n) (m-1-n)*8(%rsp) + + .type win2lin7, @function +win2lin7: + win2lin_prolog + + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + win2lin_arg5 + win2lin_arg6 + + # copy windows argument 7 onto stack for Linux function + mov win2lin_win_arg(7), %r11 + mov %r11, win2lin_lin_arg(7,7) + + call_lin_func_args(7) + win2lin_epilog + ret + .size win2lin7, .-win2lin7 + + .type win2lin8, @function +win2lin8: + win2lin_prolog + + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + win2lin_arg5 + win2lin_arg6 + + # copy windows arguments 7 and 8 onto stack for Linux function + mov win2lin_win_arg(7), %r11 + mov %r11, win2lin_lin_arg(7,8) + mov win2lin_win_arg(8), %r11 + mov %r11, win2lin_lin_arg(8,8) + + call_lin_func_args(8) + win2lin_epilog + ret + .size win2lin8, .-win2lin8 + + .type win2lin9, @function +win2lin9: +win2lin10: +win2lin11: +win2lin12: + win2lin_prolog + + # since we destroy rsi and rdi here, first copy windows + # arguments 7 through 12 onto stack for Linux function + mov %rcx, %r11 # save rcx + lea win2lin_win_arg(7), %rsi # source (windows arg 7 and up) + lea win2lin_lin_arg(7,12), %rdi # = destination + mov $6, %rcx # 6 arguments + rep + movsq + mov %r11, %rcx # restore rcx + + win2lin_arg1 + win2lin_arg2 + win2lin_arg3 + win2lin_arg4 + win2lin_arg5 + win2lin_arg6 + + call_lin_func_args(12) + win2lin_epilog + ret + .size win2lin9, .-win2lin9 + +#define win2lin(name, argc) \ +ENTRY(win2lin_ ## name ## _ ## argc) \ + lea name(%rip), %r10 ; \ + jmp win2lin ## argc + +#include "win2lin_stubs.h" + +#endif // CONFIG_X86_64 --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ndis.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ndis.c @@ -0,0 +1,2974 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ndis.h" +#include "iw_ndis.h" +#include "wrapndis.h" +#include "pnp.h" +#include "loader.h" +#include +#include +#include "ndis_exports.h" + +#define MAX_ALLOCATED_NDIS_PACKETS TX_RING_SIZE +#define MAX_ALLOCATED_NDIS_BUFFERS TX_RING_SIZE + +static void ndis_worker(worker_param_t dummy); +static work_struct_t ndis_work; +static struct nt_list ndis_work_list; +static spinlock_t ndis_work_list_lock; + +workqueue_struct_t *ndis_wq; +static struct nt_thread *ndis_worker_thread; + +static void *ndis_get_routine_address(char *name); + +wstdcall void WIN_FUNC(NdisInitializeWrapper,4) + (void **driver_handle, struct driver_object *driver, + struct unicode_string *reg_path, void *unused) +{ + ENTER1("handle: %p, driver: %p", driver_handle, driver); + *driver_handle = driver; + EXIT1(return); +} + +wstdcall void WIN_FUNC(NdisTerminateWrapper,2) + (struct device_object *dev_obj, void *system_specific) +{ + EXIT1(return); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterMiniport,3) + (struct driver_object *drv_obj, struct miniport *mp, UINT length) +{ + int min_length; + struct wrap_driver *wrap_driver; + struct ndis_driver *ndis_driver; + + min_length = ((char *)&mp->co_create_vc) - ((char *)mp); + + ENTER1("%p %p %d", drv_obj, mp, length); + + if (mp->major_version < 4) { + ERROR("Driver is using ndis version %d which is too old.", + mp->major_version); + EXIT1(return NDIS_STATUS_BAD_VERSION); + } + + if (length < min_length) { + ERROR("Characteristics length %d is too small", length); + EXIT1(return NDIS_STATUS_BAD_CHARACTERISTICS); + } + + TRACE1("%d.%d, %d, %u", mp->major_version, mp->minor_version, length, + (u32)sizeof(struct miniport)); + wrap_driver = IoGetDriverObjectExtension(drv_obj, + (void *)WRAP_DRIVER_CLIENT_ID); + if (!wrap_driver) { + ERROR("couldn't get wrap_driver"); + EXIT1(return NDIS_STATUS_RESOURCES); + } + if (IoAllocateDriverObjectExtension( + drv_obj, (void *)NDIS_DRIVER_CLIENT_ID, + sizeof(*ndis_driver), (void **)&ndis_driver) != + STATUS_SUCCESS) + EXIT1(return NDIS_STATUS_RESOURCES); + wrap_driver->ndis_driver = ndis_driver; + TRACE1("driver: %p", ndis_driver); + memcpy(&ndis_driver->mp, mp, min_t(int, sizeof(*mp), length)); + + DBG_BLOCK(2) { + int i; + void **func; + char *mp_funcs[] = { + "queryinfo", "reconfig", "reset", "send", "setinfo", + "tx_data", "return_packet", "send_packets", + "alloc_complete", "co_create_vc", "co_delete_vc", + "co_activate_vc", "co_deactivate_vc", + "co_send_packets", "co_request", "cancel_send_packets", + "pnp_event_notify", "shutdown", + }; + func = (void **)&ndis_driver->mp.queryinfo; + for (i = 0; i < (sizeof(mp_funcs) / sizeof(mp_funcs[0])); i++) + TRACE2("function '%s' is at %p", mp_funcs[i], func[i]); + } + EXIT1(return NDIS_STATUS_SUCCESS); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterDevice,6) + (struct driver_object *drv_obj, struct unicode_string *dev_name, + struct unicode_string *link, void **funcs, + struct device_object **dev_obj, void **dev_obj_handle) +{ + NTSTATUS status; + struct device_object *tmp; + int i; + + ENTER1("%p, %p, %p", drv_obj, dev_name, link); + status = IoCreateDevice(drv_obj, 0, dev_name, FILE_DEVICE_NETWORK, 0, + FALSE, &tmp); + + if (status != STATUS_SUCCESS) + EXIT1(return NDIS_STATUS_RESOURCES); + if (link) + status = IoCreateSymbolicLink(link, dev_name); + if (status != STATUS_SUCCESS) { + IoDeleteDevice(tmp); + EXIT1(return NDIS_STATUS_RESOURCES); + } + + *dev_obj = tmp; + *dev_obj_handle = *dev_obj; + for (i = 0; i < IRP_MJ_MAXIMUM_FUNCTION; i++) + if (funcs[i] && i != IRP_MJ_PNP && i != IRP_MJ_POWER) { + drv_obj->major_func[i] = funcs[i]; + TRACE1("mj_fn for 0x%x is at %p", i, funcs[i]); + } + EXIT1(return NDIS_STATUS_SUCCESS); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMDeregisterDevice,1) + (struct device_object *dev_obj) +{ + ENTER2("%p", dev_obj); + IoDeleteDevice(dev_obj); + return NDIS_STATUS_SUCCESS; +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemoryWithTag,3) + (void **dest, UINT length, ULONG tag) +{ + void *addr; + + assert_irql(_irql_ <= DISPATCH_LEVEL); + addr = ExAllocatePoolWithTag(NonPagedPool, length, tag); + TRACE4("%p", addr); + if (addr) { + *dest = addr; + EXIT4(return NDIS_STATUS_SUCCESS); + } else + EXIT4(return NDIS_STATUS_FAILURE); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemory,4) + (void **dest, UINT length, UINT flags, NDIS_PHY_ADDRESS highest_address) +{ + return NdisAllocateMemoryWithTag(dest, length, 0); +} + +/* length_tag is either length or tag, depending on if + * NdisAllocateMemory or NdisAllocateMemoryTag is used to allocate + * memory */ +wstdcall void WIN_FUNC(NdisFreeMemory,3) + (void *addr, UINT length_tag, UINT flags) +{ + TRACE4("%p", addr); + ExFreePool(addr); +} + +noregparm void WIN_FUNC(NdisWriteErrorLogEntry,12) + (struct driver_object *drv_obj, ULONG error, ULONG count, ...) +{ + va_list args; + int i; + ULONG code; + + va_start(args, count); + ERROR("log: %08X, count: %d, return_address: %p", + error, count, __builtin_return_address(0)); + for (i = 0; i < count; i++) { + code = va_arg(args, ULONG); + ERROR("code: 0x%x", code); + } + va_end(args); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisOpenConfiguration,3) + (NDIS_STATUS *status, struct ndis_mp_block **conf_handle, + struct ndis_mp_block *handle) +{ + ENTER2("%p", conf_handle); + *conf_handle = handle; + *status = NDIS_STATUS_SUCCESS; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisOpenProtocolConfiguration,3) + (NDIS_STATUS *status, void **confhandle, + struct unicode_string *section) +{ + ENTER2("%p", confhandle); + *status = NDIS_STATUS_SUCCESS; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByName,4) + (NDIS_STATUS *status, void *handle, + struct unicode_string *key, void **subkeyhandle) +{ + struct ansi_string ansi; + ENTER2(""); + if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE) == STATUS_SUCCESS) { + TRACE2("%s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + *subkeyhandle = handle; + *status = NDIS_STATUS_SUCCESS; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByIndex,5) + (NDIS_STATUS *status, void *handle, ULONG index, + struct unicode_string *key, void **subkeyhandle) +{ + ENTER2("%u", index); +// *subkeyhandle = handle; + *status = NDIS_STATUS_FAILURE; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisCloseConfiguration,1) + (void *handle) +{ + /* instead of freeing all configuration parameters as we are + * supposed to do here, we free them when the device is + * removed */ + ENTER2("%p", handle); + return; +} + +wstdcall void WIN_FUNC(NdisOpenFile,5) + (NDIS_STATUS *status, struct wrap_bin_file **file, + UINT *filelength, struct unicode_string *filename, + NDIS_PHY_ADDRESS highest_address) +{ + struct ansi_string ansi; + struct wrap_bin_file *bin_file; + + ENTER2("%p, %d, %llx, %p", status, *filelength, highest_address, *file); + if (RtlUnicodeStringToAnsiString(&ansi, filename, TRUE) != + STATUS_SUCCESS) { + *status = NDIS_STATUS_RESOURCES; + EXIT2(return); + } + TRACE2("%s", ansi.buf); + bin_file = get_bin_file(ansi.buf); + if (bin_file) { + *file = bin_file; + *filelength = bin_file->size; + *status = NDIS_STATUS_SUCCESS; + } else + *status = NDIS_STATUS_FILE_NOT_FOUND; + + RtlFreeAnsiString(&ansi); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisMapFile,3) + (NDIS_STATUS *status, void **mappedbuffer, struct wrap_bin_file *file) +{ + ENTER2("%p", file); + + if (!file) { + *status = NDIS_STATUS_ALREADY_MAPPED; + EXIT2(return); + } + + *status = NDIS_STATUS_SUCCESS; + *mappedbuffer = file->data; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisUnmapFile,1) + (struct wrap_bin_file *file) +{ + ENTER2("%p", file); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisCloseFile,1) + (struct wrap_bin_file *file) +{ + ENTER2("%p", file); + free_bin_file(file); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisGetSystemUpTime,1) + (ULONG *ms) +{ + *ms = 1000 * jiffies / HZ; + EXIT5(return); +} + +wstdcall ULONG WIN_FUNC(NDIS_BUFFER_TO_SPAN_PAGES,1) + (ndis_buffer *buffer) +{ + ULONG n, length; + + if (buffer == NULL) + EXIT2(return 0); + if (MmGetMdlByteCount(buffer) == 0) + EXIT2(return 1); + + length = MmGetMdlByteCount(buffer); + n = SPAN_PAGES(MmGetMdlVirtualAddress(buffer), length); + TRACE4("%p, %p, %d, %d", buffer->startva, buffer->mappedsystemva, + length, n); + EXIT3(return n); +} + +wstdcall void WIN_FUNC(NdisGetBufferPhysicalArraySize,2) + (ndis_buffer *buffer, UINT *arraysize) +{ + ENTER3("%p", buffer); + *arraysize = NDIS_BUFFER_TO_SPAN_PAGES(buffer); + EXIT3(return); +} + +static struct ndis_configuration_parameter * +ndis_encode_setting(struct wrap_device_setting *setting, + enum ndis_parameter_type type) +{ + struct ansi_string ansi; + struct ndis_configuration_parameter *param; + + param = setting->encoded; + if (param) { + if (param->type == type) + EXIT2(return param); + if (param->type == NdisParameterString) + RtlFreeUnicodeString(¶m->data.string); + setting->encoded = NULL; + } else + param = ExAllocatePoolWithTag(NonPagedPool, sizeof(*param), 0); + if (!param) { + ERROR("couldn't allocate memory"); + return NULL; + } + switch(type) { + case NdisParameterInteger: + param->data.integer = simple_strtol(setting->value, NULL, 0); + TRACE2("0x%x", (ULONG)param->data.integer); + break; + case NdisParameterHexInteger: + param->data.integer = simple_strtol(setting->value, NULL, 16); + TRACE2("0x%x", (ULONG)param->data.integer); + break; + case NdisParameterString: + RtlInitAnsiString(&ansi, setting->value); + TRACE2("'%s'", ansi.buf); + if (RtlAnsiStringToUnicodeString(¶m->data.string, + &ansi, TRUE)) { + ExFreePool(param); + EXIT2(return NULL); + } + break; + case NdisParameterBinary: + param->data.integer = simple_strtol(setting->value, NULL, 2); + TRACE2("0x%x", (ULONG)param->data.integer); + break; + default: + ERROR("unknown type: %d", type); + ExFreePool(param); + return NULL; + } + param->type = type; + setting->encoded = param; + EXIT2(return param); +} + +static int ndis_decode_setting(struct wrap_device_setting *setting, + struct ndis_configuration_parameter *param) +{ + struct ansi_string ansi; + struct ndis_configuration_parameter *prev; + + ENTER2("%p, %p", setting, param); + prev = setting->encoded; + if (prev && prev->type == NdisParameterString) { + RtlFreeUnicodeString(&prev->data.string); + setting->encoded = NULL; + } + switch(param->type) { + case NdisParameterInteger: + snprintf(setting->value, sizeof(u32), "%u", + param->data.integer); + setting->value[sizeof(ULONG)] = 0; + break; + case NdisParameterHexInteger: + snprintf(setting->value, sizeof(u32), "%x", + param->data.integer); + setting->value[sizeof(ULONG)] = 0; + break; + case NdisParameterString: + ansi.buf = setting->value; + ansi.max_length = MAX_SETTING_VALUE_LEN; + if ((RtlUnicodeStringToAnsiString(&ansi, ¶m->data.string, + FALSE) != STATUS_SUCCESS) + || ansi.length >= MAX_SETTING_VALUE_LEN) { + EXIT1(return -1); + } + if (ansi.length == ansi.max_length) + ansi.length--; + setting->value[ansi.length] = 0; + break; + case NdisParameterBinary: + snprintf(setting->value, sizeof(u32), "%u", + param->data.integer); + setting->value[sizeof(ULONG)] = 0; + break; + default: + TRACE2("unknown setting type: %d", param->type); + return -1; + } + TRACE2("setting changed %s='%s', %d", setting->name, setting->value, + ansi.length); + return 0; +} + +static int read_setting(struct nt_list *setting_list, char *keyname, int length, + struct ndis_configuration_parameter **param, + enum ndis_parameter_type type) +{ + struct wrap_device_setting *setting; + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + nt_list_for_each_entry(setting, setting_list, list) { + if (strnicmp(keyname, setting->name, length) == 0) { + TRACE2("setting %s='%s'", keyname, setting->value); + up(&loader_mutex); + *param = ndis_encode_setting(setting, type); + if (*param) + EXIT2(return 0); + else + EXIT2(return -1); + } + } + up(&loader_mutex); + EXIT2(return -1); +} + +wstdcall void WIN_FUNC(NdisReadConfiguration,5) + (NDIS_STATUS *status, struct ndis_configuration_parameter **param, + struct ndis_mp_block *nmb, struct unicode_string *key, + enum ndis_parameter_type type) +{ + struct ansi_string ansi; + int ret; + + ENTER2("nmb: %p", nmb); + ret = RtlUnicodeStringToAnsiString(&ansi, key, TRUE); + if (ret != STATUS_SUCCESS || ansi.buf == NULL) { + *param = NULL; + *status = NDIS_STATUS_FAILURE; + RtlFreeAnsiString(&ansi); + EXIT2(return); + } + TRACE2("%d, %s", type, ansi.buf); + + if (read_setting(&nmb->wnd->wd->settings, ansi.buf, + ansi.length, param, type) == 0 || + read_setting(&nmb->wnd->wd->driver->settings, ansi.buf, + ansi.length, param, type) == 0) + *status = NDIS_STATUS_SUCCESS; + else { + TRACE2("setting %s not found (type:%d)", ansi.buf, type); + *status = NDIS_STATUS_FAILURE; + } + RtlFreeAnsiString(&ansi); + EXIT2(return); + +} + +wstdcall void WIN_FUNC(NdisWriteConfiguration,4) + (NDIS_STATUS *status, struct ndis_mp_block *nmb, + struct unicode_string *key, struct ndis_configuration_parameter *param) +{ + struct ansi_string ansi; + char *keyname; + struct wrap_device_setting *setting; + + ENTER2("nmb: %p", nmb); + if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE)) { + *status = NDIS_STATUS_FAILURE; + EXIT2(return); + } + keyname = ansi.buf; + TRACE2("%s", keyname); + + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + nt_list_for_each_entry(setting, &nmb->wnd->wd->settings, list) { + if (strnicmp(keyname, setting->name, ansi.length) == 0) { + up(&loader_mutex); + if (ndis_decode_setting(setting, param)) + *status = NDIS_STATUS_FAILURE; + else + *status = NDIS_STATUS_SUCCESS; + RtlFreeAnsiString(&ansi); + EXIT2(return); + } + } + up(&loader_mutex); + setting = kzalloc(sizeof(*setting), GFP_KERNEL); + if (setting) { + if (ansi.length == ansi.max_length) + ansi.length--; + memcpy(setting->name, keyname, ansi.length); + setting->name[ansi.length] = 0; + if (ndis_decode_setting(setting, param)) + *status = NDIS_STATUS_FAILURE; + else { + *status = NDIS_STATUS_SUCCESS; + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + InsertTailList(&nmb->wnd->wd->settings, &setting->list); + up(&loader_mutex); + } + } else + *status = NDIS_STATUS_RESOURCES; + + RtlFreeAnsiString(&ansi); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisReadNetworkAddress,4) + (NDIS_STATUS *status, void **addr, UINT *len, + struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + struct ndis_configuration_parameter *param; + struct unicode_string key; + struct ansi_string ansi; + typeof(wnd->mac) mac; + int i, ret; + + ENTER2("%p", nmb); + RtlInitAnsiString(&ansi, "NetworkAddress"); + *status = NDIS_STATUS_FAILURE; + if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS) + EXIT1(return); + + NdisReadConfiguration(&ret, ¶m, nmb, &key, NdisParameterString); + RtlFreeUnicodeString(&key); + if (ret != NDIS_STATUS_SUCCESS) + EXIT1(return); + ret = RtlUnicodeStringToAnsiString(&ansi, ¶m->data.string, TRUE); + if (ret != STATUS_SUCCESS) + EXIT1(return); + + i = 0; + if (ansi.length >= 2 * sizeof(mac)) { + for (i = 0; i < sizeof(mac); i++) { + char c[3]; + int x; + c[0] = ansi.buf[i*2]; + c[1] = ansi.buf[i*2+1]; + c[2] = 0; + ret = sscanf(c, "%x", &x); + if (ret != 1) + break; + mac[i] = x; + } + } + TRACE2("%s, %d, " MACSTR, ansi.buf, i, MAC2STR(mac)); + RtlFreeAnsiString(&ansi); + if (i == sizeof(mac)) { + memcpy(wnd->mac, mac, sizeof(wnd->mac)); + *len = sizeof(mac); + *addr = wnd->mac; + *status = NDIS_STATUS_SUCCESS; + } + EXIT1(return); +} + +wstdcall void WIN_FUNC(NdisInitializeString,2) + (struct unicode_string *dest, UCHAR *src) +{ + struct ansi_string ansi; + + ENTER2(""); + if (src == NULL) { + dest->length = dest->max_length = 0; + dest->buf = NULL; + } else { + RtlInitAnsiString(&ansi, src); + /* the string is freed with NdisFreeMemory */ + RtlAnsiStringToUnicodeString(dest, &ansi, TRUE); + } + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisInitAnsiString,2) + (struct ansi_string *dst, CHAR *src) +{ + RtlInitAnsiString(dst, src); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisInitUnicodeString,2) + (struct unicode_string *dest, const wchar_t *src) +{ + RtlInitUnicodeString(dest, src); + return; +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisAnsiStringToUnicodeString,2) + (struct unicode_string *dst, struct ansi_string *src) +{ + ENTER2(""); + if (dst == NULL || src == NULL) + EXIT2(return NDIS_STATUS_FAILURE); + if (RtlAnsiStringToUnicodeString(dst, src, FALSE) == STATUS_SUCCESS) + return NDIS_STATUS_SUCCESS; + else + return NDIS_STATUS_FAILURE; +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisUnicodeStringToAnsiString,2) + (struct ansi_string *dst, struct unicode_string *src) +{ + ENTER2(""); + if (dst == NULL || src == NULL) + EXIT2(return NDIS_STATUS_FAILURE); + if (RtlUnicodeStringToAnsiString(dst, src, FALSE) == STATUS_SUCCESS) + return NDIS_STATUS_SUCCESS; + else + return NDIS_STATUS_FAILURE; +} + +wstdcall NTSTATUS WIN_FUNC(NdisUpcaseUnicodeString,2) + (struct unicode_string *dst, struct unicode_string *src) +{ + EXIT2(return RtlUpcaseUnicodeString(dst, src, FALSE)); +} + +wstdcall void WIN_FUNC(NdisMSetAttributesEx,5) + (struct ndis_mp_block *nmb, void *mp_ctx, + UINT hangcheck_interval, UINT attributes, ULONG adaptertype) +{ + struct ndis_device *wnd; + + ENTER1("%p, %p, %d, %08x, %d", nmb, mp_ctx, hangcheck_interval, + attributes, adaptertype); + wnd = nmb->wnd; + nmb->mp_ctx = mp_ctx; + wnd->attributes = attributes; + + if ((attributes & NDIS_ATTRIBUTE_BUS_MASTER) && + wrap_is_pci_bus(wnd->wd->dev_bus)) + pci_set_master(wnd->wd->pci.pdev); + + if (hangcheck_interval > 0) + wnd->hangcheck_interval = 2 * hangcheck_interval * HZ; + else + wnd->hangcheck_interval = 2 * HZ; + + EXIT1(return); +} + +wstdcall ULONG WIN_FUNC(NdisReadPciSlotInformation,5) + (struct ndis_mp_block *nmb, ULONG slot, + ULONG offset, char *buf, ULONG len) +{ + struct wrap_device *wd = nmb->wnd->wd; + ULONG i; + for (i = 0; i < len; i++) + if (pci_read_config_byte(wd->pci.pdev, offset + i, &buf[i]) != + PCIBIOS_SUCCESSFUL) + break; + DBG_BLOCK(2) { + if (i != len) + WARNING("%u, %u", i, len); + } + return i; +} + +wstdcall ULONG WIN_FUNC(NdisImmediateReadPciSlotInformation,5) + (struct ndis_mp_block *nmb, ULONG slot, + ULONG offset, char *buf, ULONG len) +{ + return NdisReadPciSlotInformation(nmb, slot, offset, buf, len); +} + +wstdcall ULONG WIN_FUNC(NdisWritePciSlotInformation,5) + (struct ndis_mp_block *nmb, ULONG slot, + ULONG offset, char *buf, ULONG len) +{ + struct wrap_device *wd = nmb->wnd->wd; + ULONG i; + for (i = 0; i < len; i++) + if (pci_write_config_byte(wd->pci.pdev, offset + i, buf[i]) != + PCIBIOS_SUCCESSFUL) + break; + DBG_BLOCK(2) { + if (i != len) + WARNING("%u, %u", i, len); + } + return i; +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterIoPortRange,4) + (void **virt, struct ndis_mp_block *nmb, UINT start, UINT len) +{ + ENTER3("%08x %08x", start, len); + *virt = (void *)(ULONG_PTR)start; + return NDIS_STATUS_SUCCESS; +} + +wstdcall void WIN_FUNC(NdisMDeregisterIoPortRange,4) + (struct ndis_mp_block *nmb, UINT start, UINT len, void* virt) +{ + ENTER1("%08x %08x", start, len); +} + +wstdcall void WIN_FUNC(NdisReadPortUchar,3) + (struct ndis_mp_block *nmb, ULONG port, char *data) +{ + *data = inb(port); +} + +wstdcall void WIN_FUNC(NdisImmediateReadPortUchar,3) + (struct ndis_mp_block *nmb, ULONG port, char *data) +{ + *data = inb(port); +} + +wstdcall void WIN_FUNC(NdisWritePortUchar,3) + (struct ndis_mp_block *nmb, ULONG port, char data) +{ + outb(data, port); +} + +wstdcall void WIN_FUNC(NdisImmediateWritePortUchar,3) + (struct ndis_mp_block *nmb, ULONG port, char data) +{ + outb(data, port); +} + +wstdcall void WIN_FUNC(NdisMQueryAdapterResources,4) + (NDIS_STATUS *status, struct ndis_mp_block *nmb, + NDIS_RESOURCE_LIST *resource_list, UINT *size) +{ + struct ndis_device *wnd = nmb->wnd; + NDIS_RESOURCE_LIST *list; + UINT resource_length; + + list = &wnd->wd->resource_list->list->partial_resource_list; + resource_length = sizeof(struct cm_partial_resource_list) + + sizeof(struct cm_partial_resource_descriptor) * + (list->count - 1); + TRACE2("%p, %p,%d (%d), %p %d %d", wnd, resource_list, *size, + resource_length, &list->partial_descriptors[list->count-1], + list->partial_descriptors[list->count-1].u.interrupt.level, + list->partial_descriptors[list->count-1].u.interrupt.vector); + if (*size < sizeof(*list)) { + *size = resource_length; + *status = NDIS_STATUS_BUFFER_TOO_SHORT; + } else { + ULONG count; + if (*size >= resource_length) { + *size = resource_length; + count = list->count; + } else { + UINT n = sizeof(*list); + count = 1; + while (count++ < list->count && n < *size) + n += sizeof(list->partial_descriptors); + *size = n; + } + memcpy(resource_list, list, *size); + resource_list->count = count; + *status = NDIS_STATUS_SUCCESS; + } + EXIT2(return); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMPciAssignResources,3) + (struct ndis_mp_block *nmb, ULONG slot_number, + NDIS_RESOURCE_LIST **resources) +{ + struct ndis_device *wnd = nmb->wnd; + + ENTER2("%p, %p", wnd, wnd->wd->resource_list); + *resources = &wnd->wd->resource_list->list->partial_resource_list; + EXIT2(return NDIS_STATUS_SUCCESS); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMMapIoSpace,4) + (void __iomem **virt, struct ndis_mp_block *nmb, + NDIS_PHY_ADDRESS phy_addr, UINT len) +{ + struct ndis_device *wnd = nmb->wnd; + + ENTER2("%Lx, %d", phy_addr, len); + *virt = MmMapIoSpace(phy_addr, len, MmCached); + if (*virt == NULL) { + ERROR("ioremap failed"); + EXIT2(return NDIS_STATUS_FAILURE); + } + wnd->mem_start = phy_addr; + wnd->mem_end = phy_addr + len; + TRACE2("%p", *virt); + EXIT2(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisMUnmapIoSpace,3) + (struct ndis_mp_block *nmb, void __iomem *virt, UINT len) +{ + ENTER2("%p, %d", virt, len); + MmUnmapIoSpace(virt, len); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisAllocateSpinLock,1) + (struct ndis_spinlock *lock) +{ + TRACE4("lock %p, %p", lock, &lock->klock); + KeInitializeSpinLock(&lock->klock); + lock->irql = PASSIVE_LEVEL; + return; +} + +wstdcall void WIN_FUNC(NdisFreeSpinLock,1) + (struct ndis_spinlock *lock) +{ + TRACE4("lock %p, %p", lock, &lock->klock); + return; +} + +wstdcall void WIN_FUNC(NdisAcquireSpinLock,1) + (struct ndis_spinlock *lock) +{ + ENTER6("lock %p, %p", lock, &lock->klock); +// assert_irql(_irql_ <= DISPATCH_LEVEL); + lock->irql = nt_spin_lock_irql(&lock->klock, DISPATCH_LEVEL); + return; +} + +wstdcall void WIN_FUNC(NdisReleaseSpinLock,1) + (struct ndis_spinlock *lock) +{ + ENTER6("lock %p, %p", lock, &lock->klock); +// assert_irql(_irql_ == DISPATCH_LEVEL); + nt_spin_unlock_irql(&lock->klock, lock->irql); + return; +} + +wstdcall void WIN_FUNC(NdisDprAcquireSpinLock,1) + (struct ndis_spinlock *lock) +{ + ENTER6("lock %p", &lock->klock); +// assert_irql(_irql_ == DISPATCH_LEVEL); + nt_spin_lock(&lock->klock); + return; +} + +wstdcall void WIN_FUNC(NdisDprReleaseSpinLock,1) + (struct ndis_spinlock *lock) +{ + ENTER6("lock %p", &lock->klock); +// assert_irql(_irql_ == DISPATCH_LEVEL); + nt_spin_unlock(&lock->klock); + return; +} + +wstdcall void WIN_FUNC(NdisInitializeReadWriteLock,1) + (struct ndis_rw_lock *rw_lock) +{ + ENTER3("%p", rw_lock); + memset(rw_lock, 0, sizeof(*rw_lock)); + KeInitializeSpinLock(&rw_lock->klock); + return; +} + +/* read/write locks are implemented in a rather simplisitic way - we + * should probably use Linux's rw_lock implementation */ + +wstdcall void WIN_FUNC(NdisAcquireReadWriteLock,3) + (struct ndis_rw_lock *rw_lock, BOOLEAN write, + struct lock_state *lock_state) +{ + if (write) { + while (1) { + if (cmpxchg(&rw_lock->count, 0, -1) == 0) + return; + while (rw_lock->count) + cpu_relax(); + } + return; + } + while (1) { + typeof(rw_lock->count) count; + while ((count = rw_lock->count) < 0) + cpu_relax(); + if (cmpxchg(&rw_lock->count, count, count + 1) == count) + return; + } +} + +wstdcall void WIN_FUNC(NdisReleaseReadWriteLock,2) + (struct ndis_rw_lock *rw_lock, struct lock_state *lock_state) +{ + if (rw_lock->count > 0) + pre_atomic_add(rw_lock->count, -1); + else if (rw_lock->count == -1) + rw_lock->count = 0; + else + WARNING("invalid state: %d", rw_lock->count); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateMapRegisters,5) + (struct ndis_mp_block *nmb, UINT dmachan, + NDIS_DMA_SIZE dmasize, ULONG basemap, ULONG max_buf_size) +{ + struct ndis_device *wnd = nmb->wnd; + + ENTER2("%p, %d %d %d %d", wnd, dmachan, dmasize, basemap, max_buf_size); + if (wnd->dma_map_count > 0) { + WARNING("%s: map registers already allocated: %u", + wnd->net_dev->name, wnd->dma_map_count); + EXIT2(return NDIS_STATUS_RESOURCES); + } + if (dmasize == NDIS_DMA_24BITS) { + if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(24)) || + pci_set_consistent_dma_mask(wnd->wd->pci.pdev, + DMA_BIT_MASK(24))) + WARNING("setting dma mask failed"); + } else if (dmasize == NDIS_DMA_32BITS) { + /* consistent dma is in low 32-bits by default */ + if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32))) + WARNING("setting dma mask failed"); +#ifdef CONFIG_X86_64 + } else if (dmasize == NDIS_DMA_64BITS) { + if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(64)) || + pci_set_consistent_dma_mask(wnd->wd->pci.pdev, + DMA_BIT_MASK(64))) + WARNING("setting dma mask failed"); + else + wnd->net_dev->features |= NETIF_F_HIGHDMA; +#endif + } + /* since memory for buffer is allocated with kmalloc, buffer + * is physically contiguous, so entire map will fit in one + * register */ + if (basemap > 64) { + WARNING("Windows driver %s requesting too many (%u) " + "map registers", wnd->wd->driver->name, basemap); + /* As per NDIS, NDIS_STATUS_RESOURCES should be + * returned, but with that Atheros PCI driver fails - + * for now tolerate it */ +// EXIT2(return NDIS_STATUS_RESOURCES); + } + + wnd->dma_map_addr = kmalloc(basemap * sizeof(*(wnd->dma_map_addr)), + GFP_KERNEL); + if (!wnd->dma_map_addr) + EXIT2(return NDIS_STATUS_RESOURCES); + memset(wnd->dma_map_addr, 0, basemap * sizeof(*(wnd->dma_map_addr))); + wnd->dma_map_count = basemap; + TRACE2("%u", wnd->dma_map_count); + EXIT2(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisMFreeMapRegisters,1) + (struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + int i; + + ENTER2("wnd: %p", wnd); + if (wnd->dma_map_addr) { + for (i = 0; i < wnd->dma_map_count; i++) { + if (wnd->dma_map_addr[i]) + WARNING("%s: dma addr %p not freed by " + "Windows driver", wnd->net_dev->name, + (void *)wnd->dma_map_addr[i]); + } + kfree(wnd->dma_map_addr); + wnd->dma_map_addr = NULL; + } else + WARNING("map registers already freed?"); + wnd->dma_map_count = 0; + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisMStartBufferPhysicalMapping,6) + (struct ndis_mp_block *nmb, ndis_buffer *buf, + ULONG index, BOOLEAN write_to_dev, + struct ndis_phy_addr_unit *phy_addr_array, UINT *array_size) +{ + struct ndis_device *wnd = nmb->wnd; + + ENTER3("%p, %p, %u, %u", wnd, buf, index, wnd->dma_map_count); + if (unlikely(wnd->sg_dma_size || !write_to_dev || + index >= wnd->dma_map_count)) { + WARNING("invalid request: %d, %d, %d, %d", wnd->sg_dma_size, + write_to_dev, index, wnd->dma_map_count); + phy_addr_array[0].phy_addr = 0; + phy_addr_array[0].length = 0; + *array_size = 0; + return; + } + if (wnd->dma_map_addr[index]) { + TRACE2("buffer %p at %d is already mapped: %lx", buf, index, + (unsigned long)wnd->dma_map_addr[index]); +// *array_size = 1; + return; + } + TRACE3("%p, %p, %u", buf, MmGetSystemAddressForMdl(buf), + MmGetMdlByteCount(buf)); + DBG_BLOCK(4) { + dump_bytes(__func__, MmGetSystemAddressForMdl(buf), + MmGetMdlByteCount(buf)); + } + wnd->dma_map_addr[index] = + PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, + MmGetSystemAddressForMdl(buf), + MmGetMdlByteCount(buf), PCI_DMA_TODEVICE); + phy_addr_array[0].phy_addr = wnd->dma_map_addr[index]; + phy_addr_array[0].length = MmGetMdlByteCount(buf); + TRACE4("%Lx, %d, %d", phy_addr_array[0].phy_addr, + phy_addr_array[0].length, index); + *array_size = 1; +} + +wstdcall void WIN_FUNC(NdisMCompleteBufferPhysicalMapping,3) + (struct ndis_mp_block *nmb, ndis_buffer *buf, ULONG index) +{ + struct ndis_device *wnd = nmb->wnd; + + ENTER3("%p, %p %u (%u)", wnd, buf, index, wnd->dma_map_count); + + if (unlikely(wnd->sg_dma_size)) + WARNING("buffer %p may have been unmapped already", buf); + if (index >= wnd->dma_map_count) { + ERROR("invalid map register (%u >= %u)", + index, wnd->dma_map_count); + return; + } + TRACE4("%lx", (unsigned long)wnd->dma_map_addr[index]); + if (wnd->dma_map_addr[index]) { + PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, wnd->dma_map_addr[index], + MmGetMdlByteCount(buf), PCI_DMA_TODEVICE); + wnd->dma_map_addr[index] = 0; + } else + WARNING("map registers at %u not used", index); +} + +wstdcall void WIN_FUNC(NdisMAllocateSharedMemory,5) + (struct ndis_mp_block *nmb, ULONG size, + BOOLEAN cached, void **virt, NDIS_PHY_ADDRESS *phys) +{ + dma_addr_t dma_addr; + struct wrap_device *wd = nmb->wnd->wd; + + ENTER3("size: %u, cached: %d", size, cached); + *virt = PCI_DMA_ALLOC_COHERENT(wd->pci.pdev, size, &dma_addr); + if (*virt) + *phys = dma_addr; + else + WARNING("couldn't allocate %d bytes of %scached DMA memory", + size, cached ? "" : "un-"); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisMFreeSharedMemory,5) + (struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached, + void *virt, NDIS_PHY_ADDRESS addr) +{ + struct wrap_device *wd = nmb->wnd->wd; + ENTER3("%p, %Lx, %u", virt, addr, size); + PCI_DMA_FREE_COHERENT(wd->pci.pdev, size, virt, addr); + EXIT3(return); +} + +wstdcall void alloc_shared_memory_async(void *arg1, void *arg2) +{ + struct ndis_device *wnd; + struct alloc_shared_mem *alloc_shared_mem; + struct miniport *mp; + void *virt; + NDIS_PHY_ADDRESS phys; + KIRQL irql; + + wnd = arg1; + alloc_shared_mem = arg2; + mp = &wnd->wd->driver->ndis_driver->mp; + NdisMAllocateSharedMemory(wnd->nmb, alloc_shared_mem->size, + alloc_shared_mem->cached, &virt, &phys); + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + LIN2WIN5(mp->alloc_complete, wnd->nmb, virt, + &phys, alloc_shared_mem->size, alloc_shared_mem->ctx); + serialize_unlock_irql(wnd, irql); + kfree(alloc_shared_mem); +} +WIN_FUNC_DECL(alloc_shared_memory_async,2) + +wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateSharedMemoryAsync,4) + (struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached, void *ctx) +{ + struct ndis_device *wnd = nmb->wnd; + struct alloc_shared_mem *alloc_shared_mem; + + ENTER3("wnd: %p", wnd); + alloc_shared_mem = kmalloc(sizeof(*alloc_shared_mem), irql_gfp()); + if (!alloc_shared_mem) { + WARNING("couldn't allocate memory"); + return NDIS_STATUS_FAILURE; + } + + alloc_shared_mem->size = size; + alloc_shared_mem->cached = cached; + alloc_shared_mem->ctx = ctx; + if (schedule_ntos_work_item(WIN_FUNC_PTR(alloc_shared_memory_async,2), + wnd, alloc_shared_mem)) + EXIT3(return NDIS_STATUS_FAILURE); + EXIT3(return NDIS_STATUS_PENDING); +} + +/* Some drivers allocate NDIS_BUFFER (aka MDL) very often; instead of + * allocating and freeing with kernel functions, we chain them into + * ndis_buffer_pool. When an MDL is freed, it is added to the list of + * free MDLs. When allocated, we first check if there is one in free + * list and if so just return it; otherwise, we allocate a new one and + * return that. This reduces memory fragmentation. Windows DDK says + * that the driver itself shouldn't check what is returned in + * pool_handle, presumably because buffer pools are not used in + * XP. However, as long as driver follows rest of the semantics - that + * it should indicate maximum number of MDLs used with num_descr and + * pass the same pool_handle in other buffer functions, this should + * work. Sadly, though, NdisFreeBuffer doesn't pass the pool_handle, + * so we use 'process' field of MDL to store pool_handle. */ + +wstdcall void WIN_FUNC(NdisAllocateBufferPool,3) + (NDIS_STATUS *status, struct ndis_buffer_pool **pool_handle, + UINT num_descr) +{ + struct ndis_buffer_pool *pool; + + ENTER1("buffers: %d", num_descr); + pool = kmalloc(sizeof(*pool), irql_gfp()); + if (!pool) { + *status = NDIS_STATUS_RESOURCES; + EXIT3(return); + } + spin_lock_init(&pool->lock); + pool->max_descr = num_descr; + pool->num_allocated_descr = 0; + pool->free_descr = NULL; + *pool_handle = pool; + *status = NDIS_STATUS_SUCCESS; + TRACE1("pool: %p, num_descr: %d", pool, num_descr); + EXIT1(return); +} + +wstdcall void WIN_FUNC(NdisAllocateBuffer,5) + (NDIS_STATUS *status, ndis_buffer **buffer, + struct ndis_buffer_pool *pool, void *virt, UINT length) +{ + ndis_buffer *descr; + + ENTER4("pool: %p (%d)", pool, pool->num_allocated_descr); + /* NDIS drivers should call this at DISPATCH_LEVEL, but + * alloc_tx_packet calls at SOFT_IRQL */ + assert_irql(_irql_ <= SOFT_LEVEL); + if (!pool) { + *status = NDIS_STATUS_FAILURE; + *buffer = NULL; + EXIT4(return); + } + spin_lock_bh(&pool->lock); + if ((descr = pool->free_descr)) + pool->free_descr = descr->next; + spin_unlock_bh(&pool->lock); + if (descr) { + typeof(descr->flags) flags; + flags = descr->flags; + memset(descr, 0, sizeof(*descr)); + MmInitializeMdl(descr, virt, length); + if (flags & MDL_CACHE_ALLOCATED) + descr->flags |= MDL_CACHE_ALLOCATED; + } else { + if (pool->num_allocated_descr > pool->max_descr) { + TRACE2("pool %p is full: %d(%d)", pool, + pool->num_allocated_descr, pool->max_descr); +#ifndef ALLOW_POOL_OVERFLOW + *status = NDIS_STATUS_FAILURE; + *buffer = NULL; + return; +#endif + } + descr = allocate_init_mdl(virt, length); + if (!descr) { + WARNING("couldn't allocate buffer"); + *status = NDIS_STATUS_FAILURE; + *buffer = NULL; + EXIT4(return); + } + TRACE4("buffer %p for %p, %d", descr, virt, length); + atomic_inc_var(pool->num_allocated_descr); + } + /* TODO: make sure this mdl can map given buffer */ + MmBuildMdlForNonPagedPool(descr); +// descr->flags |= MDL_ALLOCATED_FIXED_SIZE | +// MDL_MAPPED_TO_SYSTEM_VA | MDL_PAGES_LOCKED; + descr->pool = pool; + *buffer = descr; + *status = NDIS_STATUS_SUCCESS; + TRACE4("buffer: %p", descr); + EXIT4(return); +} + +wstdcall void WIN_FUNC(NdisFreeBuffer,1) + (ndis_buffer *buffer) +{ + struct ndis_buffer_pool *pool; + + ENTER4("%p", buffer); + if (!buffer || !buffer->pool) { + ERROR("invalid buffer"); + EXIT4(return); + } + pool = buffer->pool; + if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_BUFFERS) { + /* NB NB NB: set mdl's 'pool' field to NULL before + * calling free_mdl; otherwise free_mdl calls + * NdisFreeBuffer back */ + atomic_dec_var(pool->num_allocated_descr); + buffer->pool = NULL; + free_mdl(buffer); + } else { + spin_lock_bh(&pool->lock); + buffer->next = pool->free_descr; + pool->free_descr = buffer; + spin_unlock_bh(&pool->lock); + } + EXIT4(return); +} + +wstdcall void WIN_FUNC(NdisFreeBufferPool,1) + (struct ndis_buffer_pool *pool) +{ + ndis_buffer *cur, *next; + + TRACE3("pool: %p", pool); + if (!pool) { + WARNING("invalid pool"); + EXIT3(return); + } + spin_lock_bh(&pool->lock); + cur = pool->free_descr; + while (cur) { + next = cur->next; + cur->pool = NULL; + free_mdl(cur); + cur = next; + } + spin_unlock_bh(&pool->lock); + kfree(pool); + pool = NULL; + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisAdjustBufferLength,2) + (ndis_buffer *buffer, UINT length) +{ + ENTER4("%p, %d", buffer, length); + buffer->bytecount = length; +} + +wstdcall void WIN_FUNC(NdisQueryBuffer,3) + (ndis_buffer *buffer, void **virt, UINT *length) +{ + ENTER4("buffer: %p", buffer); + if (virt) + *virt = MmGetSystemAddressForMdl(buffer); + *length = MmGetMdlByteCount(buffer); + TRACE4("%p, %u", virt? *virt : NULL, *length); + return; +} + +wstdcall void WIN_FUNC(NdisQueryBufferSafe,4) + (ndis_buffer *buffer, void **virt, UINT *length, + enum mm_page_priority priority) +{ + ENTER4("%p, %p, %p, %d", buffer, virt, length, priority); + if (virt) + *virt = MmGetSystemAddressForMdlSafe(buffer, priority); + *length = MmGetMdlByteCount(buffer); + TRACE4("%p, %u", virt? *virt : NULL, *length); +} + +wstdcall void *WIN_FUNC(NdisBufferVirtualAddress,1) + (ndis_buffer *buffer) +{ + ENTER3("%p", buffer); + return MmGetSystemAddressForMdl(buffer); +} + +wstdcall ULONG WIN_FUNC(NdisBufferLength,1) + (ndis_buffer *buffer) +{ + ENTER3("%p", buffer); + return MmGetMdlByteCount(buffer); +} + +wstdcall void WIN_FUNC(NdisQueryBufferOffset,3) + (ndis_buffer *buffer, UINT *offset, UINT *length) +{ + ENTER3("%p", buffer); + *offset = MmGetMdlByteOffset(buffer); + *length = MmGetMdlByteCount(buffer); + TRACE3("%d, %d", *offset, *length); +} + +wstdcall void WIN_FUNC(NdisUnchainBufferAtBack,2) + (struct ndis_packet *packet, ndis_buffer **buffer) +{ + ndis_buffer *b, *btail; + + ENTER3("%p", packet); + b = packet->private.buffer_head; + if (!b) { + /* no buffer in packet */ + *buffer = NULL; + EXIT3(return); + } + btail = packet->private.buffer_tail; + *buffer = btail; + if (b == btail) { + /* one buffer in packet */ + packet->private.buffer_head = NULL; + packet->private.buffer_tail = NULL; + } else { + while (b->next != btail) + b = b->next; + packet->private.buffer_tail = b; + b->next = NULL; + } + packet->private.valid_counts = FALSE; + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisUnchainBufferAtFront,2) + (struct ndis_packet *packet, ndis_buffer **buffer) +{ + ENTER3("%p", packet); + if (packet->private.buffer_head == NULL) { + /* no buffer in packet */ + *buffer = NULL; + EXIT3(return); + } + + *buffer = packet->private.buffer_head; + if (packet->private.buffer_head == packet->private.buffer_tail) { + /* one buffer in packet */ + packet->private.buffer_head = NULL; + packet->private.buffer_tail = NULL; + } else + packet->private.buffer_head = (*buffer)->next; + + packet->private.valid_counts = FALSE; + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacketSafe,6) + (struct ndis_packet *packet, ndis_buffer **first_buffer, + void **first_buffer_va, UINT *first_buffer_length, + UINT *total_buffer_length, enum mm_page_priority priority) +{ + ndis_buffer *b = packet->private.buffer_head; + + ENTER3("%p(%p)", packet, b); + *first_buffer = b; + if (b) { + *first_buffer_va = MmGetSystemAddressForMdlSafe(b, priority); + *first_buffer_length = *total_buffer_length = + MmGetMdlByteCount(b); + for (b = b->next; b; b = b->next) + *total_buffer_length += MmGetMdlByteCount(b); + } else { + *first_buffer_va = NULL; + *first_buffer_length = 0; + *total_buffer_length = 0; + } + TRACE3("%p, %d, %d", *first_buffer_va, *first_buffer_length, + *total_buffer_length); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacket,6) + (struct ndis_packet *packet, ndis_buffer **first_buffer, + void **first_buffer_va, UINT *first_buffer_length, + UINT *total_buffer_length, enum mm_page_priority priority) +{ + NdisGetFirstBufferFromPacketSafe(packet, first_buffer, + first_buffer_va, first_buffer_length, + total_buffer_length, + NormalPagePriority); +} + +wstdcall void WIN_FUNC(NdisAllocatePacketPoolEx,5) + (NDIS_STATUS *status, struct ndis_packet_pool **pool_handle, + UINT num_descr, UINT overflowsize, UINT proto_rsvd_length) +{ + struct ndis_packet_pool *pool; + + ENTER3("buffers: %d, length: %d", num_descr, proto_rsvd_length); + pool = kzalloc(sizeof(*pool), irql_gfp()); + if (!pool) { + *status = NDIS_STATUS_RESOURCES; + EXIT3(return); + } + spin_lock_init(&pool->lock); + pool->max_descr = num_descr; + pool->num_allocated_descr = 0; + pool->num_used_descr = 0; + pool->free_descr = NULL; + pool->proto_rsvd_length = proto_rsvd_length; + *pool_handle = pool; + *status = NDIS_STATUS_SUCCESS; + TRACE3("pool: %p", pool); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisAllocatePacketPool,4) + (NDIS_STATUS *status, struct ndis_packet_pool **pool_handle, + UINT num_descr, UINT proto_rsvd_length) +{ + NdisAllocatePacketPoolEx(status, pool_handle, num_descr, 0, + proto_rsvd_length); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisFreePacketPool,1) + (struct ndis_packet_pool *pool) +{ + struct ndis_packet *packet, *next; + + ENTER3("pool: %p", pool); + if (!pool) { + WARNING("invalid pool"); + EXIT3(return); + } + spin_lock_bh(&pool->lock); + packet = pool->free_descr; + while (packet) { + next = (struct ndis_packet *)packet->reserved[0]; + kfree(packet); + packet = next; + } + pool->num_allocated_descr = 0; + pool->num_used_descr = 0; + pool->free_descr = NULL; + spin_unlock_bh(&pool->lock); + kfree(pool); + EXIT3(return); +} + +wstdcall UINT WIN_FUNC(NdisPacketPoolUsage,1) + (struct ndis_packet_pool *pool) +{ + EXIT4(return pool->num_used_descr); +} + +wstdcall void WIN_FUNC(NdisAllocatePacket,3) + (NDIS_STATUS *status, struct ndis_packet **ndis_packet, + struct ndis_packet_pool *pool) +{ + struct ndis_packet *packet; + int packet_length; + + ENTER4("pool: %p", pool); + if (!pool) { + *status = NDIS_STATUS_RESOURCES; + *ndis_packet = NULL; + EXIT4(return); + } + assert_irql(_irql_ <= SOFT_LEVEL); + if (pool->num_used_descr > pool->max_descr) { + TRACE3("pool %p is full: %d(%d)", pool, + pool->num_used_descr, pool->max_descr); +#ifndef ALLOW_POOL_OVERFLOW + *status = NDIS_STATUS_RESOURCES; + *ndis_packet = NULL; + return; +#endif + } + /* packet has space for 1 byte in protocol_reserved field */ + packet_length = sizeof(*packet) - 1 + pool->proto_rsvd_length + + sizeof(struct ndis_packet_oob_data); + spin_lock_bh(&pool->lock); + if ((packet = pool->free_descr)) + pool->free_descr = (void *)packet->reserved[0]; + spin_unlock_bh(&pool->lock); + if (!packet) { + packet = kmalloc(packet_length, irql_gfp()); + if (!packet) { + WARNING("couldn't allocate packet"); + *status = NDIS_STATUS_RESOURCES; + *ndis_packet = NULL; + return; + } + atomic_inc_var(pool->num_allocated_descr); + } + TRACE4("%p, %p", pool, packet); + atomic_inc_var(pool->num_used_descr); + memset(packet, 0, packet_length); + packet->private.oob_offset = + packet_length - sizeof(struct ndis_packet_oob_data); + packet->private.packet_flags = fPACKET_ALLOCATED_BY_NDIS; + packet->private.pool = pool; + *ndis_packet = packet; + *status = NDIS_STATUS_SUCCESS; + EXIT4(return); +} + +wstdcall void WIN_FUNC(NdisDprAllocatePacket,3) + (NDIS_STATUS *status, struct ndis_packet **packet, + struct ndis_packet_pool *pool) +{ + NdisAllocatePacket(status, packet, pool); +} + +wstdcall void WIN_FUNC(NdisFreePacket,1) + (struct ndis_packet *packet) +{ + struct ndis_packet_pool *pool; + + ENTER4("%p, %p", packet, packet->private.pool); + pool = packet->private.pool; + if (!pool) { + ERROR("invalid pool %p", packet); + EXIT4(return); + } + assert((int)pool->num_used_descr > 0); + atomic_dec_var(pool->num_used_descr); + if (packet->reserved[1]) { + TRACE3("%p, %p", packet, (void *)packet->reserved[1]); + kfree((void *)packet->reserved[1]); + packet->reserved[1] = 0; + } + if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_PACKETS) { + TRACE3("%p", pool); + atomic_dec_var(pool->num_allocated_descr); + kfree(packet); + } else { + TRACE4("%p, %p, %p", pool, packet, pool->free_descr); + spin_lock_bh(&pool->lock); + packet->reserved[0] = + (typeof(packet->reserved[0]))pool->free_descr; + pool->free_descr = packet; + spin_unlock_bh(&pool->lock); + } + EXIT4(return); +} + +wstdcall struct ndis_packet_stack *WIN_FUNC(NdisIMGetCurrentPacketStack,2) + (struct ndis_packet *packet, BOOLEAN *stacks_remain) +{ + struct ndis_packet_stack *stack; + + if (!packet->reserved[1]) { + stack = kzalloc(2 * sizeof(*stack), irql_gfp()); + TRACE3("%p, %p", packet, stack); + packet->reserved[1] = (typeof(packet->reserved[1]))stack; + } else { + stack = (void *)packet->reserved[1];; + if (xchg(&stack->ndis_reserved[0], 1)) { + stack++; + if (xchg(&stack->ndis_reserved[0], 1)) + stack = NULL; + } + TRACE3("%p", stack); + } + if (stack) + *stacks_remain = TRUE; + else + *stacks_remain = FALSE; + + EXIT3(return stack); +} + +wstdcall void WIN_FUNC(NdisCopyFromPacketToPacketSafe,7) + (struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy, + struct ndis_packet *src, UINT src_offset, UINT *num_copied, + enum mm_page_priority priority) +{ + UINT dst_n, src_n, n, left; + ndis_buffer *dst_buf; + ndis_buffer *src_buf; + + ENTER4(""); + if (!dst || !src) { + *num_copied = 0; + EXIT4(return); + } + + dst_buf = dst->private.buffer_head; + src_buf = src->private.buffer_head; + + if (!dst_buf || !src_buf) { + *num_copied = 0; + EXIT4(return); + } + dst_n = MmGetMdlByteCount(dst_buf) - dst_offset; + src_n = MmGetMdlByteCount(src_buf) - src_offset; + + n = min(src_n, dst_n); + n = min(n, num_to_copy); + memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset, + MmGetSystemAddressForMdl(src_buf) + src_offset, n); + + left = num_to_copy - n; + while (left > 0) { + src_offset += n; + dst_offset += n; + dst_n -= n; + src_n -= n; + if (dst_n == 0) { + dst_buf = dst_buf->next; + if (!dst_buf) + break; + dst_n = MmGetMdlByteCount(dst_buf); + dst_offset = 0; + } + if (src_n == 0) { + src_buf = src_buf->next; + if (!src_buf) + break; + src_n = MmGetMdlByteCount(src_buf); + src_offset = 0; + } + + n = min(src_n, dst_n); + n = min(n, left); + memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset, + MmGetSystemAddressForMdl(src_buf) + src_offset, n); + left -= n; + } + *num_copied = num_to_copy - left; + EXIT4(return); +} + +wstdcall void WIN_FUNC(NdisCopyFromPacketToPacket,6) + (struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy, + struct ndis_packet *src, UINT src_offset, UINT *num_copied) +{ + NdisCopyFromPacketToPacketSafe(dst, dst_offset, num_to_copy, + src, src_offset, num_copied, + NormalPagePriority); + return; +} + +wstdcall void WIN_FUNC(NdisIMCopySendPerPacketInfo,2) + (struct ndis_packet *dst, struct ndis_packet *src) +{ + struct ndis_packet_oob_data *dst_oob, *src_oob; + dst_oob = NDIS_PACKET_OOB_DATA(dst); + src_oob = NDIS_PACKET_OOB_DATA(src); + memcpy(&dst_oob->ext, &src_oob->ext, sizeof(dst_oob->ext)); + return; +} + +wstdcall void WIN_FUNC(NdisSend,3) + (NDIS_STATUS *status, struct ndis_mp_block *nmb, + struct ndis_packet *packet) +{ + struct ndis_device *wnd = nmb->wnd; + struct miniport *mp; + KIRQL irql; + + mp = &wnd->wd->driver->ndis_driver->mp; + if (mp->send_packets) { + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, &packet, 1); + serialize_unlock_irql(wnd, irql); + if (deserialized_driver(wnd)) + *status = NDIS_STATUS_PENDING; + else { + struct ndis_packet_oob_data *oob_data; + oob_data = NDIS_PACKET_OOB_DATA(packet); + *status = oob_data->status; + switch (*status) { + case NDIS_STATUS_SUCCESS: + free_tx_packet(wnd, packet, *status); + break; + case NDIS_STATUS_PENDING: + break; + case NDIS_STATUS_RESOURCES: + wnd->tx_ok = 0; + break; + case NDIS_STATUS_FAILURE: + default: + free_tx_packet(wnd, packet, *status); + break; + } + } + } else { + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + *status = LIN2WIN3(mp->send, wnd->nmb->mp_ctx, packet, 0); + serialize_unlock_irql(wnd, irql); + switch (*status) { + case NDIS_STATUS_SUCCESS: + free_tx_packet(wnd, packet, *status); + break; + case NDIS_STATUS_PENDING: + break; + case NDIS_STATUS_RESOURCES: + wnd->tx_ok = 0; + break; + case NDIS_STATUS_FAILURE: + default: + free_tx_packet(wnd, packet, *status); + break; + } + } + EXIT3(return); +} + +/* called for serialized drivers only */ +wstdcall void mp_timer_dpc(struct kdpc *kdpc, void *ctx, void *arg1, void *arg2) +{ + struct ndis_mp_timer *timer; + struct ndis_mp_block *nmb; + + timer = ctx; + TIMERENTER("%p, %p, %p, %p", timer, timer->func, timer->ctx, timer->nmb); + assert_irql(_irql_ == DISPATCH_LEVEL); + nmb = timer->nmb; + serialize_lock(nmb->wnd); + LIN2WIN4(timer->func, NULL, timer->ctx, NULL, NULL); + serialize_unlock(nmb->wnd); + TIMEREXIT(return); +} +WIN_FUNC_DECL(mp_timer_dpc,4) + +wstdcall void WIN_FUNC(NdisMInitializeTimer,4) + (struct ndis_mp_timer *timer, struct ndis_mp_block *nmb, + DPC func, void *ctx) +{ + TIMERENTER("%p, %p, %p, %p", timer, func, ctx, nmb); + assert_irql(_irql_ == PASSIVE_LEVEL); + timer->func = func; + timer->ctx = ctx; + timer->nmb = nmb; + if (deserialized_driver(nmb->wnd)) + KeInitializeDpc(&timer->kdpc, func, ctx); + else + KeInitializeDpc(&timer->kdpc, WIN_FUNC_PTR(mp_timer_dpc,4), + timer); + wrap_init_timer(&timer->nt_timer, NotificationTimer, nmb); + TIMEREXIT(return); +} + +wstdcall void WIN_FUNC(NdisMSetPeriodicTimer,2) + (struct ndis_mp_timer *timer, UINT period_ms) +{ + unsigned long expires = MSEC_TO_HZ(period_ms); + + TIMERENTER("%p, %u, %ld", timer, period_ms, expires); + assert_irql(_irql_ <= DISPATCH_LEVEL); + wrap_set_timer(&timer->nt_timer, expires, expires, &timer->kdpc); + TIMEREXIT(return); +} + +wstdcall void WIN_FUNC(NdisMCancelTimer,2) + (struct ndis_mp_timer *timer, BOOLEAN *canceled) +{ + TIMERENTER("%p", timer); + assert_irql(_irql_ <= DISPATCH_LEVEL); + *canceled = KeCancelTimer(&timer->nt_timer); + TIMERTRACE("%d", *canceled); + return; +} + +wstdcall void WIN_FUNC(NdisInitializeTimer,3) + (struct ndis_timer *timer, void *func, void *ctx) +{ + TIMERENTER("%p, %p, %p", timer, func, ctx); + assert_irql(_irql_ == PASSIVE_LEVEL); + KeInitializeDpc(&timer->kdpc, func, ctx); + wrap_init_timer(&timer->nt_timer, NotificationTimer, NULL); + TIMEREXIT(return); +} + +/* NdisMSetTimer is a macro that calls NdisSetTimer with + * ndis_mp_timer typecast to ndis_timer */ + +wstdcall void WIN_FUNC(NdisSetTimer,2) + (struct ndis_timer *timer, UINT duetime_ms) +{ + unsigned long expires = MSEC_TO_HZ(duetime_ms); + + TIMERENTER("%p, %p, %u, %ld", timer, timer->nt_timer.wrap_timer, + duetime_ms, expires); + assert_irql(_irql_ <= DISPATCH_LEVEL); + wrap_set_timer(&timer->nt_timer, expires, 0, &timer->kdpc); + TIMEREXIT(return); +} + +wstdcall void WIN_FUNC(NdisCancelTimer,2) + (struct ndis_timer *timer, BOOLEAN *canceled) +{ + TIMERENTER("%p", timer); + assert_irql(_irql_ <= DISPATCH_LEVEL); + *canceled = KeCancelTimer(&timer->nt_timer); + TIMEREXIT(return); +} + +wstdcall void WIN_FUNC(NdisMRegisterAdapterShutdownHandler,3) + (struct ndis_mp_block *nmb, void *ctx, void *func) +{ + struct ndis_device *wnd = nmb->wnd; + ENTER1("%p", func); + wnd->wd->driver->ndis_driver->mp.shutdown = func; + wnd->shutdown_ctx = ctx; +} + +wstdcall void WIN_FUNC(NdisMDeregisterAdapterShutdownHandler,1) + (struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + wnd->wd->driver->ndis_driver->mp.shutdown = NULL; + wnd->shutdown_ctx = NULL; +} + +/* TODO: rt61 (serialized) driver doesn't want MiniportEnableInterrupt + * to be called in irq handler, but mrv800c (deserialized) driver + * wants. NDIS is confusing about when to call MiniportEnableInterrupt + * For now, handle these cases with two separate irq handlers based on + * observation of these two drivers. However, it is likely not + * correct. */ +wstdcall void deserialized_irq_handler(struct kdpc *kdpc, void *ctx, + void *arg1, void *arg2) +{ + struct ndis_device *wnd = ctx; + ndis_interrupt_handler irq_handler = arg1; + struct miniport *mp = arg2; + + TRACE6("%p", irq_handler); + assert_irql(_irql_ == DISPATCH_LEVEL); + LIN2WIN1(irq_handler, wnd->nmb->mp_ctx); + if (mp->enable_interrupt) + LIN2WIN1(mp->enable_interrupt, wnd->nmb->mp_ctx); + EXIT6(return); +} +WIN_FUNC_DECL(deserialized_irq_handler,4) + +wstdcall void serialized_irq_handler(struct kdpc *kdpc, void *ctx, + void *arg1, void *arg2) +{ + struct ndis_device *wnd = ctx; + ndis_interrupt_handler irq_handler = arg1; + + TRACE6("%p, %p, %p", wnd, irq_handler, arg2); + assert_irql(_irql_ == DISPATCH_LEVEL); + serialize_lock(wnd); + LIN2WIN1(irq_handler, arg2); + serialize_unlock(wnd); + EXIT6(return); +} +WIN_FUNC_DECL(serialized_irq_handler,4) + +wstdcall BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx) +{ + struct ndis_mp_interrupt *mp_interrupt = ctx; + struct ndis_device *wnd = mp_interrupt->nmb->wnd; + BOOLEAN recognized = TRUE, queue_handler = TRUE; + + TRACE6("%p", wnd); + /* kernel may call ISR when registering interrupt, in + * the same context if DEBUG_SHIRQ is enabled */ + assert_irql(_irql_ == DIRQL || _irql_ == PASSIVE_LEVEL); + if (mp_interrupt->shared) + LIN2WIN3(mp_interrupt->isr, &recognized, &queue_handler, + wnd->nmb->mp_ctx); + else { + struct miniport *mp; + mp = &wnd->wd->driver->ndis_driver->mp; + LIN2WIN1(mp->disable_interrupt, wnd->nmb->mp_ctx); + /* it is not shared interrupt, so handler must be called */ + recognized = queue_handler = TRUE; + } + if (recognized) { + if (queue_handler) { + TRACE5("%p", &wnd->irq_kdpc); + queue_kdpc(&wnd->irq_kdpc); + } + EXIT6(return TRUE); + } + EXIT6(return FALSE); +} +WIN_FUNC_DECL(ndis_isr,2) + +wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterInterrupt,7) + (struct ndis_mp_interrupt *mp_interrupt, + struct ndis_mp_block *nmb, UINT vector, UINT level, + BOOLEAN req_isr, BOOLEAN shared, enum kinterrupt_mode mode) +{ + struct ndis_device *wnd = nmb->wnd; + struct miniport *mp; + + ENTER1("%p, vector:%d, level:%d, req_isr:%d, shared:%d, mode:%d", + mp_interrupt, vector, level, req_isr, shared, mode); + + mp = &wnd->wd->driver->ndis_driver->mp; + nt_spin_lock_init(&mp_interrupt->lock); + mp_interrupt->irq = vector; + mp_interrupt->isr = mp->isr; + mp_interrupt->mp_dpc = mp->handle_interrupt; + mp_interrupt->nmb = nmb; + mp_interrupt->req_isr = req_isr; + if (shared && !req_isr) + WARNING("shared but dynamic interrupt!"); + mp_interrupt->shared = shared; + wnd->mp_interrupt = mp_interrupt; + if (mp->enable_interrupt) + mp_interrupt->enable = TRUE; + else + mp_interrupt->enable = FALSE; + + if (deserialized_driver(wnd)) { + KeInitializeDpc(&wnd->irq_kdpc, + WIN_FUNC_PTR(deserialized_irq_handler,4), + nmb->wnd); + wnd->irq_kdpc.arg1 = mp->handle_interrupt; + wnd->irq_kdpc.arg2 = mp; + TRACE2("%p, %p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2, + nmb->wnd, nmb->mp_ctx); + } else { + KeInitializeDpc(&wnd->irq_kdpc, + WIN_FUNC_PTR(serialized_irq_handler,4), + nmb->wnd); + wnd->irq_kdpc.arg1 = mp->handle_interrupt; + wnd->irq_kdpc.arg2 = nmb->mp_ctx; + TRACE2("%p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2, + nmb->wnd); + } + + if (IoConnectInterrupt(&mp_interrupt->kinterrupt, + WIN_FUNC_PTR(ndis_isr,2), mp_interrupt, NULL, + vector, DIRQL, DIRQL, mode, shared, 0, FALSE) != + STATUS_SUCCESS) { + printk(KERN_WARNING "%s: request for IRQ %d failed\n", + DRIVER_NAME, vector); + return NDIS_STATUS_RESOURCES; + } + printk(KERN_INFO "%s: using IRQ %d\n", DRIVER_NAME, vector); + EXIT1(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisMDeregisterInterrupt,1) + (struct ndis_mp_interrupt *mp_interrupt) +{ + struct ndis_mp_block *nmb; + + ENTER1("%p", mp_interrupt); + nmb = xchg(&mp_interrupt->nmb, NULL); + TRACE1("%p", nmb); + if (!nmb) { + WARNING("interrupt already freed?"); + return; + } + nmb->wnd->mp_interrupt = NULL; + if (dequeue_kdpc(&nmb->wnd->irq_kdpc)) + TRACE2("interrupt kdpc was pending"); + flush_workqueue(wrapndis_wq); + IoDisconnectInterrupt(mp_interrupt->kinterrupt); + EXIT1(return); +} + +wstdcall BOOLEAN WIN_FUNC(NdisMSynchronizeWithInterrupt,3) + (struct ndis_mp_interrupt *mp_interrupt, + PKSYNCHRONIZE_ROUTINE sync_func, void *ctx) +{ + return KeSynchronizeExecution(mp_interrupt->kinterrupt, sync_func, ctx); +} + +/* called via function pointer; but 64-bit RNDIS driver calls directly */ +wstdcall void WIN_FUNC(NdisMIndicateStatus,4) + (struct ndis_mp_block *nmb, NDIS_STATUS status, void *buf, UINT len) +{ + struct ndis_device *wnd = nmb->wnd; + struct ndis_status_indication *si; + + ENTER2("status=0x%x len=%d", status, len); + switch (status) { + case NDIS_STATUS_MEDIA_CONNECT: + set_media_state(wnd, NdisMediaStateConnected); + break; + case NDIS_STATUS_MEDIA_DISCONNECT: + set_media_state(wnd, NdisMediaStateDisconnected); + break; + case NDIS_STATUS_MEDIA_SPECIFIC_INDICATION: + if (!buf) + break; + si = buf; + TRACE2("status_type=%d", si->status_type); + switch (si->status_type) { + case Ndis802_11StatusType_MediaStreamMode: + break; +#ifdef CONFIG_WIRELESS_EXT + case Ndis802_11StatusType_Authentication: + buf = (char *)buf + sizeof(*si); + len -= sizeof(*si); + while (len > 0) { + int pairwise_error = 0, group_error = 0; + struct ndis_auth_req *auth_req = + (struct ndis_auth_req *)buf; + TRACE1(MACSTRSEP, MAC2STR(auth_req->bssid)); + if (auth_req->flags & 0x01) + TRACE2("reauth request"); + if (auth_req->flags & 0x02) + TRACE2("key update request"); + if (auth_req->flags & 0x06) { + pairwise_error = 1; + TRACE2("pairwise_error"); + } + if (auth_req->flags & 0x0E) { + group_error = 1; + TRACE2("group_error"); + } + if (pairwise_error || group_error) { + union iwreq_data wrqu; + struct iw_michaelmicfailure micfailure; + + memset(&micfailure, 0, sizeof(micfailure)); + if (pairwise_error) + micfailure.flags |= + IW_MICFAILURE_PAIRWISE; + if (group_error) + micfailure.flags |= + IW_MICFAILURE_GROUP; + memcpy(micfailure.src_addr.sa_data, + auth_req->bssid, ETH_ALEN); + memset(&wrqu, 0, sizeof(wrqu)); + wrqu.data.length = sizeof(micfailure); + wireless_send_event(wnd->net_dev, + IWEVMICHAELMICFAILURE, + &wrqu, (u8 *)&micfailure); + } + len -= auth_req->length; + buf = (char *)buf + auth_req->length; + } + break; + case Ndis802_11StatusType_PMKID_CandidateList: + { + u8 *end; + unsigned long i; + struct ndis_pmkid_candidate_list *cand; + + cand = buf + sizeof(struct ndis_status_indication); + if (len < sizeof(struct ndis_status_indication) + + sizeof(struct ndis_pmkid_candidate_list) || + cand->version != 1) { + WARNING("unrecognized PMKID ignored"); + EXIT1(return); + } + + end = (u8 *)buf + len; + TRACE2("PMKID ver %d num_cand %d", + cand->version, cand->num_candidates); + for (i = 0; i < cand->num_candidates; i++) { + struct iw_pmkid_cand pcand; + union iwreq_data wrqu; + struct ndis_pmkid_candidate *c = + &cand->candidates[i]; + if ((u8 *)(c + 1) > end) { + TRACE2("truncated PMKID"); + break; + } + TRACE2("%ld: " MACSTRSEP " 0x%x", + i, MAC2STR(c->bssid), c->flags); + memset(&pcand, 0, sizeof(pcand)); + if (c->flags & 0x01) + pcand.flags |= IW_PMKID_CAND_PREAUTH; + pcand.index = i; + memcpy(pcand.bssid.sa_data, c->bssid, ETH_ALEN); + + memset(&wrqu, 0, sizeof(wrqu)); + wrqu.data.length = sizeof(pcand); + wireless_send_event(wnd->net_dev, IWEVPMKIDCAND, + &wrqu, (u8 *)&pcand); + } + break; + } + case Ndis802_11StatusType_RadioState: + { + struct ndis_radio_status_indication *radio_status = buf; + if (radio_status->radio_state == + Ndis802_11RadioStatusOn) + INFO("radio is turned on"); + else if (radio_status->radio_state == + Ndis802_11RadioStatusHardwareOff) + INFO("radio is turned off by hardware"); + else if (radio_status->radio_state == + Ndis802_11RadioStatusSoftwareOff) + INFO("radio is turned off by software"); + break; + } +#endif + default: + /* is this RSSI indication? */ + TRACE2("unknown indication: %x", si->status_type); + break; + } + break; + default: + TRACE2("unknown status: %08X", status); + break; + } + + EXIT2(return); +} + +/* called via function pointer; but 64-bit RNDIS driver calls directly */ +wstdcall void WIN_FUNC(NdisMIndicateStatusComplete,1) + (struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + ENTER2("%p", wnd); + if (wnd->tx_ok) + schedule_wrapndis_work(&wnd->tx_work); +} + +/* called via function pointer */ +wstdcall void NdisMSendComplete(struct ndis_mp_block *nmb, + struct ndis_packet *packet, NDIS_STATUS status) +{ + struct ndis_device *wnd = nmb->wnd; + ENTER4("%p, %08X", packet, status); + assert_irql(_irql_ <= DISPATCH_LEVEL); + if (deserialized_driver(wnd)) + free_tx_packet(wnd, packet, status); + else { + struct ndis_packet_oob_data *oob_data; + NDIS_STATUS pkt_status; + TRACE3("%p, %08x", packet, status); + oob_data = NDIS_PACKET_OOB_DATA(packet); + switch ((pkt_status = xchg(&oob_data->status, status))) { + case NDIS_STATUS_NOT_RECOGNIZED: + free_tx_packet(wnd, packet, status); + break; + case NDIS_STATUS_PENDING: + case 0: + break; + default: + WARNING("%p: invalid status: %08X", packet, pkt_status); + break; + } + /* In case a serialized driver has earlier requested a + * pause by returning NDIS_STATUS_RESOURCES during + * MiniportSend(Packets), wakeup tx worker now. + */ + if (xchg(&wnd->tx_ok, 1) == 0) { + TRACE3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end); + schedule_wrapndis_work(&wnd->tx_work); + } + } + EXIT3(return); +} + +/* called via function pointer */ +wstdcall void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + ENTER3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end); + wnd->tx_ok = 1; + schedule_wrapndis_work(&wnd->tx_work); + EXIT3(return); +} + +wstdcall void return_packet(void *arg1, void *arg2) +{ + struct ndis_device *wnd; + struct ndis_packet *packet; + struct miniport *mp; + KIRQL irql; + + wnd = arg1; + packet = arg2; + ENTER4("%p, %p", wnd, packet); + mp = &wnd->wd->driver->ndis_driver->mp; + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + LIN2WIN2(mp->return_packet, wnd->nmb->mp_ctx, packet); + serialize_unlock_irql(wnd, irql); + EXIT4(return); +} +WIN_FUNC_DECL(return_packet,2) + +/* called via function pointer */ +wstdcall void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb, + struct ndis_packet **packets, + UINT nr_packets) +{ + struct ndis_device *wnd; + ndis_buffer *buffer; + struct ndis_packet *packet; + struct sk_buff *skb; + ULONG i, length, total_length; + struct ndis_packet_oob_data *oob_data; + void *virt; + struct ndis_tcp_ip_checksum_packet_info csum; + + ENTER3("%p, %d", nmb, nr_packets); + assert_irql(_irql_ <= DISPATCH_LEVEL); + wnd = nmb->wnd; + for (i = 0; i < nr_packets; i++) { + packet = packets[i]; + if (!packet) { + WARNING("empty packet ignored"); + continue; + } + wnd->net_dev->last_rx = jiffies; + /* get total number of bytes in packet */ + NdisGetFirstBufferFromPacketSafe(packet, &buffer, &virt, + &length, &total_length, + NormalPagePriority); + TRACE3("%d, %d", length, total_length); + oob_data = NDIS_PACKET_OOB_DATA(packet); + TRACE3("0x%x, 0x%x, %Lu", packet->private.flags, + packet->private.packet_flags, oob_data->time_rxed); + skb = dev_alloc_skb(total_length); + if (skb) { + while (buffer) { + memcpy_skb(skb, MmGetSystemAddressForMdl(buffer), + MmGetMdlByteCount(buffer)); + buffer = buffer->next; + } + skb->dev = wnd->net_dev; + skb->protocol = eth_type_trans(skb, wnd->net_dev); + pre_atomic_add(wnd->net_stats.rx_bytes, total_length); + atomic_inc_var(wnd->net_stats.rx_packets); + csum.value = (typeof(csum.value))(ULONG_PTR) + oob_data->ext.info[TcpIpChecksumPacketInfo]; + TRACE3("0x%05x", csum.value); + if (wnd->rx_csum.value && + (csum.rx.tcp_succeeded || csum.rx.udp_succeeded || + csum.rx.ip_succeeded)) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb->ip_summed = CHECKSUM_NONE; + + if (in_interrupt()) + netif_rx(skb); + else + netif_rx_ni(skb); + } else { + WARNING("couldn't allocate skb; packet dropped"); + atomic_inc_var(wnd->net_stats.rx_dropped); + } + + /* serialized drivers check the status upon return + * from this function */ + if (!deserialized_driver(wnd)) { + oob_data->status = NDIS_STATUS_SUCCESS; + continue; + } + + /* if a deserialized driver sets + * NDIS_STATUS_RESOURCES, then it reclaims the packet + * upon return from this function */ + if (oob_data->status == NDIS_STATUS_RESOURCES) + continue; + + assert(oob_data->status == NDIS_STATUS_SUCCESS); + /* deserialized driver doesn't check the status upon + * return from this function; we need to call + * MiniportReturnPacket later for this packet. Calling + * MiniportReturnPacket from here is not correct - the + * driver doesn't expect it (at least Centrino driver + * crashes) */ + schedule_ntos_work_item(WIN_FUNC_PTR(return_packet,2), + wnd, packet); + } + EXIT3(return); +} + +/* called via function pointer (by NdisMEthIndicateReceive macro); the + * first argument is nmb->eth_db */ +wstdcall void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx, + char *header1, char *header, UINT header_size, + void *look_ahead, UINT look_ahead_size, + UINT packet_size) +{ + struct sk_buff *skb = NULL; + struct ndis_device *wnd; + unsigned int skb_size = 0; + KIRQL irql; + struct ndis_packet_oob_data *oob_data; + + ENTER3("nmb = %p, rx_ctx = %p, buf = %p, size = %d, buf = %p, " + "size = %d, packet = %d", nmb, rx_ctx, header, header_size, + look_ahead, look_ahead_size, packet_size); + + wnd = nmb->wnd; + TRACE3("wnd = %p", wnd); + if (!wnd) { + ERROR("nmb is NULL"); + EXIT3(return); + } + wnd->net_dev->last_rx = jiffies; + + if (look_ahead_size < packet_size) { + struct ndis_packet *packet; + struct miniport *mp; + unsigned int bytes_txed; + NDIS_STATUS res; + + NdisAllocatePacket(&res, &packet, wnd->tx_packet_pool); + if (res != NDIS_STATUS_SUCCESS) { + atomic_inc_var(wnd->net_stats.rx_dropped); + EXIT3(return); + } + oob_data = NDIS_PACKET_OOB_DATA(packet); + mp = &wnd->wd->driver->ndis_driver->mp; + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + res = LIN2WIN6(mp->tx_data, packet, &bytes_txed, nmb, + rx_ctx, look_ahead_size, packet_size); + serialize_unlock_irql(wnd, irql); + TRACE3("%d, %d, %d", header_size, look_ahead_size, bytes_txed); + if (res == NDIS_STATUS_SUCCESS) { + ndis_buffer *buffer; + struct ndis_tcp_ip_checksum_packet_info csum; + skb = dev_alloc_skb(header_size + look_ahead_size + + bytes_txed); + if (!skb) { + ERROR("couldn't allocate skb; packet dropped"); + atomic_inc_var(wnd->net_stats.rx_dropped); + NdisFreePacket(packet); + return; + } + memcpy_skb(skb, header, header_size); + memcpy_skb(skb, look_ahead, look_ahead_size); + buffer = packet->private.buffer_head; + while (buffer) { + memcpy_skb(skb, + MmGetSystemAddressForMdl(buffer), + MmGetMdlByteCount(buffer)); + buffer = buffer->next; + } + skb_size = header_size + look_ahead_size + bytes_txed; + csum.value = (typeof(csum.value))(ULONG_PTR) + oob_data->ext.info[TcpIpChecksumPacketInfo]; + TRACE3("0x%05x", csum.value); + if (wnd->rx_csum.value && + (csum.rx.tcp_succeeded || csum.rx.udp_succeeded)) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb->ip_summed = CHECKSUM_NONE; + NdisFreePacket(packet); + } else if (res == NDIS_STATUS_PENDING) { + /* driver will call td_complete */ + oob_data->look_ahead = kmalloc(look_ahead_size, + GFP_ATOMIC); + if (!oob_data->look_ahead) { + NdisFreePacket(packet); + ERROR("packet dropped"); + atomic_inc_var(wnd->net_stats.rx_dropped); + EXIT3(return); + } + assert(sizeof(oob_data->header) == header_size); + memcpy(oob_data->header, header, + sizeof(oob_data->header)); + memcpy(oob_data->look_ahead, look_ahead, + look_ahead_size); + oob_data->look_ahead_size = look_ahead_size; + EXIT3(return); + } else { + WARNING("packet dropped: %08X", res); + atomic_inc_var(wnd->net_stats.rx_dropped); + NdisFreePacket(packet); + EXIT3(return); + } + } else { + skb_size = header_size + packet_size; + skb = dev_alloc_skb(skb_size); + if (skb) { + memcpy_skb(skb, header, header_size); + memcpy_skb(skb, look_ahead, packet_size); + } + } + + if (skb) { + skb->dev = wnd->net_dev; + skb->protocol = eth_type_trans(skb, wnd->net_dev); + pre_atomic_add(wnd->net_stats.rx_bytes, skb_size); + atomic_inc_var(wnd->net_stats.rx_packets); + if (in_interrupt()) + netif_rx(skb); + else + netif_rx_ni(skb); + } + + EXIT3(return); +} + +/* called via function pointer */ +wstdcall void NdisMTransferDataComplete(struct ndis_mp_block *nmb, + struct ndis_packet *packet, + NDIS_STATUS status, UINT bytes_txed) +{ + struct ndis_device *wnd = nmb->wnd; + struct sk_buff *skb; + unsigned int skb_size; + struct ndis_packet_oob_data *oob_data; + ndis_buffer *buffer; + struct ndis_tcp_ip_checksum_packet_info csum; + + ENTER3("wnd = %p, packet = %p, bytes_txed = %d", + wnd, packet, bytes_txed); + if (!packet) { + WARNING("illegal packet"); + EXIT3(return); + } + wnd->net_dev->last_rx = jiffies; + oob_data = NDIS_PACKET_OOB_DATA(packet); + skb_size = sizeof(oob_data->header) + oob_data->look_ahead_size + + bytes_txed; + skb = dev_alloc_skb(skb_size); + if (!skb) { + kfree(oob_data->look_ahead); + NdisFreePacket(packet); + ERROR("couldn't allocate skb; packet dropped"); + atomic_inc_var(wnd->net_stats.rx_dropped); + EXIT3(return); + } + memcpy_skb(skb, oob_data->header, sizeof(oob_data->header)); + memcpy_skb(skb, oob_data->look_ahead, oob_data->look_ahead_size); + buffer = packet->private.buffer_head; + while (buffer) { + memcpy_skb(skb, MmGetSystemAddressForMdl(buffer), + MmGetMdlByteCount(buffer)); + buffer = buffer->next; + } + kfree(oob_data->look_ahead); + NdisFreePacket(packet); + skb->dev = wnd->net_dev; + skb->protocol = eth_type_trans(skb, wnd->net_dev); + pre_atomic_add(wnd->net_stats.rx_bytes, skb_size); + atomic_inc_var(wnd->net_stats.rx_packets); + + csum.value = (typeof(csum.value))(ULONG_PTR) + oob_data->ext.info[TcpIpChecksumPacketInfo]; + TRACE3("0x%05x", csum.value); + if (wnd->rx_csum.value && + (csum.rx.tcp_succeeded || csum.rx.udp_succeeded)) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb->ip_summed = CHECKSUM_NONE; + + if (in_interrupt()) + netif_rx(skb); + else + netif_rx_ni(skb); +} + +/* called via function pointer */ +wstdcall void EthRxComplete(struct ndis_mp_block *nmb) +{ + TRACE3(""); +} + +/* called via function pointer */ +wstdcall void NdisMQueryInformationComplete(struct ndis_mp_block *nmb, + NDIS_STATUS status) +{ + struct ndis_device *wnd = nmb->wnd; + typeof(wnd->ndis_req_task) task; + + ENTER2("nmb: %p, wnd: %p, %08X", nmb, wnd, status); + wnd->ndis_req_status = status; + wnd->ndis_req_done = 1; + if ((task = xchg(&wnd->ndis_req_task, NULL))) + wake_up_process(task); + else + WARNING("invalid task"); + EXIT2(return); +} + +/* called via function pointer */ +wstdcall void NdisMSetInformationComplete(struct ndis_mp_block *nmb, + NDIS_STATUS status) +{ + struct ndis_device *wnd = nmb->wnd; + typeof(wnd->ndis_req_task) task; + + ENTER2("status = %08X", status); + wnd->ndis_req_status = status; + wnd->ndis_req_done = 1; + if ((task = xchg(&wnd->ndis_req_task, NULL))) + wake_up_process(task); + else + WARNING("invalid task"); + EXIT2(return); +} + +/* called via function pointer */ +wstdcall void NdisMResetComplete(struct ndis_mp_block *nmb, + NDIS_STATUS status, BOOLEAN address_reset) +{ + struct ndis_device *wnd = nmb->wnd; + typeof(wnd->ndis_req_task) task; + + ENTER2("status: %08X, %u", status, address_reset); + wnd->ndis_req_status = status; + wnd->ndis_req_done = address_reset + 1; + if ((task = xchg(&wnd->ndis_req_task, NULL))) + wake_up_process(task); + else + WARNING("invalid task"); + EXIT2(return); +} + +wstdcall void WIN_FUNC(NdisMSleep,1) + (ULONG us) +{ + unsigned long delay; + + ENTER4("%p: us: %u", current, us); + delay = USEC_TO_HZ(us); + sleep_hz(delay); + TRACE4("%p: done", current); +} + +wstdcall void WIN_FUNC(NdisGetCurrentSystemTime,1) + (LARGE_INTEGER *time) +{ + *time = ticks_1601(); + TRACE5("%Lu, %lu", *time, jiffies); +} + +wstdcall LONG WIN_FUNC(NdisInterlockedDecrement,1) + (LONG *val) +{ + return InterlockedDecrement(val); +} + +wstdcall LONG WIN_FUNC(NdisInterlockedIncrement,1) + (LONG *val) +{ + return InterlockedIncrement(val); +} + +wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertHeadList,3) + (struct nt_list *head, struct nt_list *entry, + struct ndis_spinlock *lock) +{ + return ExInterlockedInsertHeadList(head, entry, &lock->klock); +} + +wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertTailList,3) + (struct nt_list *head, struct nt_list *entry, + struct ndis_spinlock *lock) +{ + return ExInterlockedInsertTailList(head, entry, &lock->klock); +} + +wstdcall struct nt_list *WIN_FUNC(NdisInterlockedRemoveHeadList,2) + (struct nt_list *head, struct ndis_spinlock *lock) +{ + return ExInterlockedRemoveHeadList(head, &lock->klock); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMInitializeScatterGatherDma,3) + (struct ndis_mp_block *nmb, BOOLEAN dma_size, ULONG max_phy_map) +{ + struct ndis_device *wnd = nmb->wnd; + ENTER2("dma_size=%d, maxtransfer=%u", dma_size, max_phy_map); +#ifdef CONFIG_X86_64 + if (dma_size != NDIS_DMA_64BITS) { + TRACE1("DMA size is not 64-bits"); + if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32)) || + pci_set_consistent_dma_mask(wnd->wd->pci.pdev, + DMA_BIT_MASK(32))) + WARNING("setting dma mask failed"); + } +#endif + if ((wnd->attributes & NDIS_ATTRIBUTE_BUS_MASTER) && + wrap_is_pci_bus(wnd->wd->dev_bus)) { + wnd->sg_dma_size = max_phy_map; + return NDIS_STATUS_SUCCESS; + } else + EXIT1(return NDIS_STATUS_NOT_SUPPORTED); +} + +wstdcall ULONG WIN_FUNC(NdisMGetDmaAlignment,1) + (struct ndis_mp_block *nmb) +{ + ENTER3(""); + return dma_get_cache_alignment(); +} + +wstdcall CHAR WIN_FUNC(NdisSystemProcessorCount,0) + (void) +{ + return (CHAR)NR_CPUS; +} + +wstdcall void WIN_FUNC(NdisGetCurrentProcessorCounts,3) + (ULONG *idle, ULONG *kernel_user, ULONG *index) +{ + int cpu = smp_processor_id(); + *idle = kstat_cpu(cpu).cpustat.idle; + *kernel_user = kstat_cpu(cpu).cpustat.system + + kstat_cpu(cpu).cpustat.user; + *index = cpu; +} + +wstdcall void WIN_FUNC(NdisInitializeEvent,1) + (struct ndis_event *ndis_event) +{ + EVENTENTER("%p", ndis_event); + KeInitializeEvent(&ndis_event->nt_event, NotificationEvent, 0); +} + +wstdcall BOOLEAN WIN_FUNC(NdisWaitEvent,2) + (struct ndis_event *ndis_event, UINT ms) +{ + LARGE_INTEGER ticks; + NTSTATUS res; + + EVENTENTER("%p %u", ndis_event, ms); + ticks = -((LARGE_INTEGER)ms * TICKSPERMSEC); + res = KeWaitForSingleObject(&ndis_event->nt_event, 0, 0, TRUE, + ms == 0 ? NULL : &ticks); + if (res == STATUS_SUCCESS) + EXIT3(return TRUE); + else + EXIT3(return FALSE); +} + +wstdcall void WIN_FUNC(NdisSetEvent,1) + (struct ndis_event *ndis_event) +{ + EVENTENTER("%p", ndis_event); + KeSetEvent(&ndis_event->nt_event, 0, 0); +} + +wstdcall void WIN_FUNC(NdisResetEvent,1) + (struct ndis_event *ndis_event) +{ + EVENTENTER("%p", ndis_event); + KeResetEvent(&ndis_event->nt_event); +} + +static void ndis_worker(worker_param_t dummy) +{ + struct nt_list *ent; + struct ndis_work_item *ndis_work_item; + + WORKENTER(""); + while (1) { + spin_lock_bh(&ndis_work_list_lock); + ent = RemoveHeadList(&ndis_work_list); + spin_unlock_bh(&ndis_work_list_lock); + if (!ent) + break; + ndis_work_item = container_of(ent, struct ndis_work_item, list); + WORKTRACE("%p: %p, %p", ndis_work_item, + ndis_work_item->func, ndis_work_item->ctx); + LIN2WIN2(ndis_work_item->func, ndis_work_item, + ndis_work_item->ctx); + WORKTRACE("%p done", ndis_work_item); + } + WORKEXIT(return); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisScheduleWorkItem,1) + (struct ndis_work_item *ndis_work_item) +{ + ENTER3("%p", ndis_work_item); + spin_lock_bh(&ndis_work_list_lock); + InsertTailList(&ndis_work_list, &ndis_work_item->list); + spin_unlock_bh(&ndis_work_list_lock); + WORKTRACE("scheduling %p", ndis_work_item); + schedule_ndis_work(&ndis_work); + EXIT3(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisMGetDeviceProperty,6) + (struct ndis_mp_block *nmb, void **phy_dev, void **func_dev, + void **next_dev, void **alloc_res, void**trans_res) +{ + ENTER2("nmb: %p, phy_dev = %p, func_dev = %p, next_dev = %p, " + "alloc_res = %p, trans_res = %p", nmb, phy_dev, func_dev, + next_dev, alloc_res, trans_res); + if (phy_dev) + *phy_dev = nmb->pdo; + if (func_dev) + *func_dev = nmb->fdo; + if (next_dev) + *next_dev = nmb->next_device; +} + +wstdcall void WIN_FUNC(NdisMRegisterUnloadHandler,2) + (struct driver_object *drv_obj, void *unload) +{ + if (drv_obj) + drv_obj->unload = unload; + return; +} + +wstdcall UINT WIN_FUNC(NdisGetVersion,0) + (void) +{ + return 0x00050001; +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMQueryAdapterInstanceName,2) + (struct unicode_string *name, struct ndis_mp_block *nmb) +{ + struct ndis_device *wnd = nmb->wnd; + struct ansi_string ansi; + + if (wrap_is_pci_bus(wnd->wd->dev_bus)) + RtlInitAnsiString(&ansi, "PCI Ethernet Adapter"); + else + RtlInitAnsiString(&ansi, "USB Ethernet Adapter"); + + if (RtlAnsiStringToUnicodeString(name, &ansi, TRUE)) + EXIT2(return NDIS_STATUS_RESOURCES); + else + EXIT2(return NDIS_STATUS_SUCCESS); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisWriteEventLogEntry,7) + (void *handle, NDIS_STATUS code, ULONG value, USHORT n, + void *strings, ULONG datasize, void *data) +{ + TRACE1("0x%x, 0x%x, %u, %u", code, value, n, datasize); + return NDIS_STATUS_SUCCESS; +} + +wstdcall void *WIN_FUNC(NdisGetRoutineAddress,1) + (struct unicode_string *unicode_string) +{ + struct ansi_string ansi_string; + void *address; + + if (RtlUnicodeStringToAnsiString(&ansi_string, unicode_string, TRUE) != + STATUS_SUCCESS) + EXIT1(return NULL); + INFO("%s", ansi_string.buf); + address = ndis_get_routine_address(ansi_string.buf); + RtlFreeAnsiString(&ansi_string); + return address; +} + +wstdcall ULONG WIN_FUNC(NdisReadPcmciaAttributeMemory,4) + (struct ndis_mp_block *nmb, ULONG offset, void *buffer, + ULONG length) +{ + TODO(); + return 0; +} + +wstdcall ULONG WIN_FUNC(NdisWritePcmciaAttributeMemory,4) + (struct ndis_mp_block *nmb, ULONG offset, void *buffer, + ULONG length) +{ + TODO(); + return 0; +} + +wstdcall void WIN_FUNC(NdisMCoIndicateReceivePacket,3) + (struct ndis_mp_block *nmb, struct ndis_packet **packets, + UINT nr_packets) +{ + ENTER3("nmb = %p", nmb); + NdisMIndicateReceivePacket(nmb, packets, nr_packets); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisMCoSendComplete,3) + (NDIS_STATUS status, struct ndis_mp_block *nmb, + struct ndis_packet *packet) +{ + ENTER3("%08x", status); + NdisMSendComplete(nmb, packet, status); + EXIT3(return); +} + +wstdcall void WIN_FUNC(NdisMCoRequestComplete,3) + (NDIS_STATUS status, struct ndis_mp_block *nmb, + struct ndis_request *ndis_request) +{ + struct ndis_device *wnd = nmb->wnd; + typeof(wnd->ndis_req_task) task; + + ENTER3("%08X", status); + wnd->ndis_req_status = status; + wnd->ndis_req_done = 1; + if ((task = xchg(&wnd->ndis_req_task, NULL))) + wake_up_process(task); + else + WARNING("invalid task"); + EXIT3(return); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisIMNotifiyPnPEvent,2) + (struct ndis_mp_block *nmb, struct net_pnp_event *event) +{ + ENTER2("%p, %d", nmb, event->code); + /* NdisWrapper never calls protocol's pnp event notifier, so + * nothing to do here */ + EXIT2(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisCompletePnPEvent,2) + (NDIS_STATUS status, void *handle, struct net_pnp_event *event) +{ + ENTER2("%d, %p, %d", status, handle, event->code); + /* NdisWrapper never calls protocol's pnp event notifier, so + * nothing to do here */ + EXIT2(return); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMSetMiniportSecondary,2) + (struct ndis_mp_block *nmb2, struct ndis_mp_block *nmb1) +{ + ENTER3("%p, %p", nmb1, nmb2); + TODO(); + EXIT3(return NDIS_STATUS_SUCCESS); +} + +wstdcall NDIS_STATUS WIN_FUNC(NdisMPromoteMiniport,1) + (struct ndis_mp_block *nmb) +{ + ENTER3("%p", nmb); + TODO(); + EXIT3(return NDIS_STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(NdisMCoActivateVcComplete,3) + (NDIS_STATUS status, void *handle, void *params) +{ + TODO(); +} + +wstdcall void WIN_FUNC(NdisMCoDeactivateVcComplete,2) + (NDIS_STATUS status, void *handle) +{ + TODO(); +} + +wstdcall void WIN_FUNC(NdisMRemoveMiniport,1) + (void *handle) +{ + TODO(); +} + +static void *ndis_get_routine_address(char *name) +{ + int i; + ENTER2("%p", name); + for (i = 0; i < sizeof(ndis_exports) / sizeof(ndis_exports[0]); i++) { + if (strcmp(name, ndis_exports[i].name) == 0) { + TRACE2("%p", ndis_exports[i].func); + return ndis_exports[i].func; + } + } + EXIT2(return NULL); +} + +/* ndis_init_device is called for each device */ +int ndis_init_device(struct ndis_device *wnd) +{ + struct ndis_mp_block *nmb = wnd->nmb; + + KeInitializeSpinLock(&nmb->lock); + wnd->mp_interrupt = NULL; + wnd->wrap_timer_slist.next = NULL; + if (wnd->wd->driver->ndis_driver) + wnd->wd->driver->ndis_driver->mp.shutdown = NULL; + + nmb->filterdbs.eth_db = nmb; + nmb->filterdbs.tr_db = nmb; + nmb->filterdbs.fddi_db = nmb; + nmb->filterdbs.arc_db = nmb; + + nmb->rx_packet = WIN_FUNC_PTR(NdisMIndicateReceivePacket,3); + nmb->send_complete = WIN_FUNC_PTR(NdisMSendComplete,3); + nmb->send_resource_avail = WIN_FUNC_PTR(NdisMSendResourcesAvailable,1); + nmb->status = WIN_FUNC_PTR(NdisMIndicateStatus,4); + nmb->status_complete = WIN_FUNC_PTR(NdisMIndicateStatusComplete,1); + nmb->queryinfo_complete = WIN_FUNC_PTR(NdisMQueryInformationComplete,2); + nmb->setinfo_complete = WIN_FUNC_PTR(NdisMSetInformationComplete,2); + nmb->reset_complete = WIN_FUNC_PTR(NdisMResetComplete,3); + nmb->eth_rx_indicate = WIN_FUNC_PTR(EthRxIndicateHandler,8); + nmb->eth_rx_complete = WIN_FUNC_PTR(EthRxComplete,1); + nmb->td_complete = WIN_FUNC_PTR(NdisMTransferDataComplete,4); + return 0; +} + +/* ndis_exit_device is called for each device */ +void ndis_exit_device(struct ndis_device *wnd) +{ + struct wrap_device_setting *setting; + ENTER2("%p", wnd); + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + nt_list_for_each_entry(setting, &wnd->wd->settings, list) { + struct ndis_configuration_parameter *param; + param = setting->encoded; + if (param) { + if (param->type == NdisParameterString) + RtlFreeUnicodeString(¶m->data.string); + ExFreePool(param); + setting->encoded = NULL; + } + } + up(&loader_mutex); +} + +/* ndis_init is called once when module is loaded */ +int ndis_init(void) +{ + InitializeListHead(&ndis_work_list); + spin_lock_init(&ndis_work_list_lock); + initialize_work(&ndis_work, ndis_worker, NULL); + + ndis_wq = create_singlethread_workqueue("ndis_wq"); + if (!ndis_wq) { + WARNING("couldn't create worker thread"); + EXIT1(return -ENOMEM); + } + + ndis_worker_thread = wrap_worker_init(ndis_wq); + TRACE1("%p", ndis_worker_thread); + return 0; +} + +/* ndis_exit is called once when module is removed */ +void ndis_exit(void) +{ + ENTER1(""); + if (ndis_wq) + destroy_workqueue(ndis_wq); + TRACE1("%p", ndis_worker_thread); + if (ndis_worker_thread) + ObDereferenceObject(ndis_worker_thread); + EXIT1(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/Kconfig @@ -0,0 +1,4 @@ +config NDISWRAPPER + tristate "Wrapper for Windows NDIS network drivers" + depends on NET + default m --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/BOM @@ -0,0 +1,2 @@ +Downloaded from: http://sourceforge.net/project/showfiles.php?group_id=93482 +Current Version: 1.55 --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ndiswrapper.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ndiswrapper.h @@ -0,0 +1,219 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _NDISWRAPPER_H_ +#define _NDISWRAPPER_H_ + +#define DRIVER_VERSION "1.55" +#define UTILS_VERSION "1.9" + +#define DRIVER_NAME "ndiswrapper" +#define DRIVER_CONFIG_DIR "/etc/ndiswrapper" + +#define SSID_MAX_WPA_IE_LEN 40 +#define NDIS_ESSID_MAX_SIZE 32 +#define NDIS_ENCODING_TOKEN_MAX 32 +#define MAX_ENCR_KEYS 4 +#define TX_RING_SIZE 16 +#define NDIS_MAX_RATES 8 +#define NDIS_MAX_RATES_EX 16 +#define WLAN_EID_GENERIC 221 +#define MAX_WPA_IE_LEN 64 +#define MAX_STR_LEN 512 + +#define WRAP_PCI_BUS 5 +#define WRAP_PCMCIA_BUS 8 +/* some USB devices, e.g., DWL-G120 have BusType as 0 */ +#define WRAP_INTERNAL_BUS 0 +/* documentation at msdn says 15 is PNP bus, but inf files from all + * vendors say 15 is USB; which is correct? */ +#define WRAP_USB_BUS 15 + +/* NDIS device must be 0, for compatability with old versions of + * ndiswrapper where device type for NDIS drivers is 0 */ +#define WRAP_NDIS_DEVICE 0 +#define WRAP_USB_DEVICE 1 +#define WRAP_BLUETOOTH_DEVICE1 2 +#define WRAP_BLUETOOTH_DEVICE2 3 + +#define WRAP_DEVICE_BUS(dev, bus) ((dev) << 8 | (bus)) +#define WRAP_BUS(dev_bus) ((dev_bus) & 0x000FF) +#define WRAP_DEVICE(dev_bus) ((dev_bus) >> 8) + +#define MAX_DRIVER_NAME_LEN 32 +#define MAX_VERSION_STRING_LEN 64 +#define MAX_SETTING_NAME_LEN 128 +#define MAX_SETTING_VALUE_LEN 256 + +#define MAX_DRIVER_PE_IMAGES 4 +#define MAX_DRIVER_BIN_FILES 5 +#define MAX_DEVICE_SETTINGS 512 + +#define MAX_ALLOCATED_URBS 15 + +#define DEV_ANY_ID -1 + +#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] +#define MACSTRSEP "%02x:%02x:%02x:%02x:%02x:%02x" +#define MACSTR "%02x%02x%02x%02x%02x%02x" +#define MACINTADR(a) (int*)&((a)[0]), (int*)&((a)[1]), (int*)&((a)[2]), \ + (int*)&((a)[3]), (int*)&((a)[4]), (int*)&((a)[5]) + +#ifdef __KERNEL__ +/* DEBUG macros */ + +#define MSG(level, fmt, ...) \ + printk(level "ndiswrapper (%s:%d): " fmt "\n", \ + __func__, __LINE__ , ## __VA_ARGS__) + +#define WARNING(fmt, ...) MSG(KERN_WARNING, fmt, ## __VA_ARGS__) +#define ERROR(fmt, ...) MSG(KERN_ERR, fmt , ## __VA_ARGS__) +#define INFO(fmt, ...) MSG(KERN_INFO, fmt , ## __VA_ARGS__) +#define TODO() WARNING("not fully implemented (yet)") + +#define TRACE(fmt, ...) do { } while (0) +#define TRACE1(fmt, ...) do { } while (0) +#define TRACE2(fmt, ...) do { } while (0) +#define TRACE3(fmt, ...) do { } while (0) +#define TRACE4(fmt, ...) do { } while (0) +#define TRACE5(fmt, ...) do { } while (0) +#define TRACE6(fmt, ...) do { } while (0) + +/* for a block of code */ +#define DBG_BLOCK(level) while (0) + +extern int debug; + +#if defined DEBUG +#undef TRACE +#define TRACE(level, fmt, ...) \ +do { \ + if (debug >= level) \ + printk(KERN_INFO "%s (%s:%d): " fmt "\n", DRIVER_NAME, \ + __func__, __LINE__ , ## __VA_ARGS__); \ +} while (0) +#undef DBG_BLOCK +#define DBG_BLOCK(level) if (debug >= level) +#endif + +#if defined(DEBUG) && DEBUG >= 1 +#undef TRACE1 +#define TRACE1(fmt, ...) TRACE(1, fmt , ## __VA_ARGS__) +#endif + +#if defined(DEBUG) && DEBUG >= 2 +#undef TRACE2 +#define TRACE2(fmt, ...) TRACE(2, fmt , ## __VA_ARGS__) +#endif + +#if defined(DEBUG) && DEBUG >= 3 +#undef TRACE3 +#define TRACE3(fmt, ...) TRACE(3, fmt , ## __VA_ARGS__) +#endif + +#if defined(DEBUG) && DEBUG >= 4 +#undef TRACE4 +#define TRACE4(fmt, ...) TRACE(4, fmt , ## __VA_ARGS__) +#endif + +#if defined(DEBUG) && DEBUG >= 5 +#undef TRACE5 +#define TRACE5(fmt, ...) TRACE(5, fmt , ## __VA_ARGS__) +#endif + +#if defined(DEBUG) && DEBUG >= 6 +#undef TRACE6 +#define TRACE6(fmt, ...) TRACE(6, fmt , ## __VA_ARGS__) +#endif + +#define ENTER1(fmt, ...) TRACE1("Enter " fmt , ## __VA_ARGS__) +#define ENTER2(fmt, ...) TRACE2("Enter " fmt , ## __VA_ARGS__) +#define ENTER3(fmt, ...) TRACE3("Enter " fmt , ## __VA_ARGS__) +#define ENTER4(fmt, ...) TRACE4("Enter " fmt , ## __VA_ARGS__) +#define ENTER5(fmt, ...) TRACE5("Enter " fmt , ## __VA_ARGS__) +#define ENTER6(fmt, ...) TRACE6("Enter " fmt , ## __VA_ARGS__) + +#define EXIT1(stmt) do { TRACE1("Exit"); stmt; } while(0) +#define EXIT2(stmt) do { TRACE2("Exit"); stmt; } while(0) +#define EXIT3(stmt) do { TRACE3("Exit"); stmt; } while(0) +#define EXIT4(stmt) do { TRACE4("Exit"); stmt; } while(0) +#define EXIT5(stmt) do { TRACE5("Exit"); stmt; } while(0) +#define EXIT6(stmt) do { TRACE6("Exit"); stmt; } while(0) + +#if defined(USB_DEBUG) +#define USBTRACE TRACE1 +#define USBENTER ENTER1 +#define USBEXIT EXIT1 +#else +#define USBTRACE(fmt, ...) +#define USBENTER(fmt, ...) +#define USBEXIT(stmt) stmt +#endif + +#if defined(EVENT_DEBUG) +#define EVENTTRACE TRACE1 +#define EVENTENTER ENTER1 +#define EVENTEXIT EXIT1 +#else +#define EVENTTRACE(fmt, ...) +#define EVENTENTER(fmt, ...) +#define EVENTEXIT(stmt) stmt +#endif + +#if defined(TIMER_DEBUG) +#define TIMERTRACE TRACE1 +#define TIMERENTER ENTER1 +#define TIMEREXIT EXIT1 +#else +#define TIMERTRACE(fmt, ...) +#define TIMERENTER(fmt, ...) +#define TIMEREXIT(stmt) stmt +#endif + +#if defined(IO_DEBUG) +#define IOTRACE TRACE1 +#define IOENTER ENTER1 +#define IOEXIT EXIT1 +#else +#define IOTRACE(fmt, ...) +#define IOENTER(fmt, ...) +#define IOEXIT(stmt) stmt +#endif + +#if defined(WORK_DEBUG) +#define WORKTRACE TRACE1 +#define WORKENTER ENTER1 +#define WORKEXIT EXIT1 +#else +#define WORKTRACE(fmt, ...) +#define WORKENTER(fmt, ...) +#define WORKEXIT(stmt) stmt +#endif + +#ifdef DEBUG +#define assert(expr) \ +do { \ + if (!(expr)) { \ + ERROR("assertion '%s' failed", #expr); \ + dump_stack(); \ + } \ +} while (0) +#else +#define assert(expr) do { } while (0) +#endif + +#endif // __KERNEL__ + +#endif // NDISWRAPPER_H --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/proc.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/proc.c @@ -0,0 +1,565 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include +#include +#include + +#include "ndis.h" +#include "iw_ndis.h" +#include "wrapndis.h" +#include "pnp.h" +#include "wrapper.h" + +#define MAX_PROC_STR_LEN 32 + +static struct proc_dir_entry *wrap_procfs_entry; + +static int procfs_read_ndis_stats(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + char *p = page; + struct ndis_device *wnd = (struct ndis_device *)data; + struct ndis_wireless_stats stats; + NDIS_STATUS res; + ndis_rssi rssi; + + if (off != 0) { + *eof = 1; + return 0; + } + + res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi)); + if (!res) + p += sprintf(p, "signal_level=%d dBm\n", (s32)rssi); + + res = mp_query(wnd, OID_802_11_STATISTICS, &stats, sizeof(stats)); + if (!res) { + + p += sprintf(p, "tx_frames=%Lu\n", stats.tx_frag); + p += sprintf(p, "tx_multicast_frames=%Lu\n", + stats.tx_multi_frag); + p += sprintf(p, "tx_failed=%Lu\n", stats.failed); + p += sprintf(p, "tx_retry=%Lu\n", stats.retry); + p += sprintf(p, "tx_multi_rerty=%Lu\n", stats.multi_retry); + p += sprintf(p, "tx_rtss_success=%Lu\n", stats.rtss_succ); + p += sprintf(p, "tx_rtss_fail=%Lu\n", stats.rtss_fail); + p += sprintf(p, "ack_fail=%Lu\n", stats.ack_fail); + p += sprintf(p, "frame_duplicates=%Lu\n", stats.frame_dup); + p += sprintf(p, "rx_frames=%Lu\n", stats.rx_frag); + p += sprintf(p, "rx_multicast_frames=%Lu\n", + stats.rx_multi_frag); + p += sprintf(p, "fcs_errors=%Lu\n", stats.fcs_err); + } + + if (p - page > count) { + ERROR("wrote %lu bytes (limit is %u)\n", + (unsigned long)(p - page), count); + *eof = 1; + } + + return p - page; +} + +static int procfs_read_ndis_encr(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + char *p = page; + struct ndis_device *wnd = (struct ndis_device *)data; + int i, encr_status, auth_mode, infra_mode; + NDIS_STATUS res; + struct ndis_essid essid; + mac_address ap_address; + + if (off != 0) { + *eof = 1; + return 0; + } + + res = mp_query(wnd, OID_802_11_BSSID, + &ap_address, sizeof(ap_address)); + if (res) + memset(ap_address, 0, ETH_ALEN); + p += sprintf(p, "ap_address=%2.2X", ap_address[0]); + for (i = 1 ; i < ETH_ALEN ; i++) + p += sprintf(p, ":%2.2X", ap_address[i]); + p += sprintf(p, "\n"); + + res = mp_query(wnd, OID_802_11_SSID, &essid, sizeof(essid)); + if (!res) + p += sprintf(p, "essid=%.*s\n", essid.length, essid.essid); + + res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &encr_status); + if (!res) { + typeof(&wnd->encr_info.keys[0]) tx_key; + p += sprintf(p, "tx_key=%u\n", wnd->encr_info.tx_key_index); + p += sprintf(p, "key="); + tx_key = &wnd->encr_info.keys[wnd->encr_info.tx_key_index]; + if (tx_key->length > 0) + for (i = 0; i < tx_key->length; i++) + p += sprintf(p, "%2.2X", tx_key->key[i]); + else + p += sprintf(p, "off"); + p += sprintf(p, "\n"); + p += sprintf(p, "encr_mode=%d\n", encr_status); + } + res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &auth_mode); + if (!res) + p += sprintf(p, "auth_mode=%d\n", auth_mode); + res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &infra_mode); + p += sprintf(p, "mode=%s\n", (infra_mode == Ndis802_11IBSS) ? + "adhoc" : (infra_mode == Ndis802_11Infrastructure) ? + "managed" : "auto"); + if (p - page > count) { + WARNING("wrote %lu bytes (limit is %u)", + (unsigned long)(p - page), count); + *eof = 1; + } + + return p - page; +} + +static int procfs_read_ndis_hw(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + char *p = page; + struct ndis_device *wnd = (struct ndis_device *)data; + struct ndis_configuration config; + unsigned int power_mode; + NDIS_STATUS res; + ndis_tx_power_level tx_power; + ULONG bit_rate; + ndis_rts_threshold rts_threshold; + ndis_fragmentation_threshold frag_threshold; + ndis_antenna antenna; + ULONG packet_filter; + int n; + mac_address mac; + char *hw_status[] = {"ready", "initializing", "resetting", "closing", + "not ready"}; + + if (off != 0) { + *eof = 1; + return 0; + } + + res = mp_query_int(wnd, OID_GEN_HARDWARE_STATUS, &n); + if (res == NDIS_STATUS_SUCCESS && + n >= 0 && n < sizeof(hw_status) / sizeof(hw_status[0])) + p += sprintf(p, "status=%s\n", hw_status[n]); + + res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac)); + if (!res) + p += sprintf(p, "mac: " MACSTRSEP "\n", MAC2STR(mac)); + res = mp_query(wnd, OID_802_11_CONFIGURATION, &config, sizeof(config)); + if (!res) { + p += sprintf(p, "beacon_period=%u msec\n", + config.beacon_period); + p += sprintf(p, "atim_window=%u msec\n", config.atim_window); + p += sprintf(p, "frequency=%u kHZ\n", config.ds_config); + p += sprintf(p, "hop_pattern=%u\n", + config.fh_config.hop_pattern); + p += sprintf(p, "hop_set=%u\n", + config.fh_config.hop_set); + p += sprintf(p, "dwell_time=%u msec\n", + config.fh_config.dwell_time); + } + + res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, + &tx_power, sizeof(tx_power)); + if (!res) + p += sprintf(p, "tx_power=%u mW\n", tx_power); + + res = mp_query(wnd, OID_GEN_LINK_SPEED, &bit_rate, sizeof(bit_rate)); + if (!res) + p += sprintf(p, "bit_rate=%u kBps\n", (u32)bit_rate / 10); + + res = mp_query(wnd, OID_802_11_RTS_THRESHOLD, + &rts_threshold, sizeof(rts_threshold)); + if (!res) + p += sprintf(p, "rts_threshold=%u bytes\n", rts_threshold); + + res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, + &frag_threshold, sizeof(frag_threshold)); + if (!res) + p += sprintf(p, "frag_threshold=%u bytes\n", frag_threshold); + + res = mp_query_int(wnd, OID_802_11_POWER_MODE, &power_mode); + if (!res) + p += sprintf(p, "power_mode=%s\n", + (power_mode == NDIS_POWER_OFF) ? "always_on" : + (power_mode == NDIS_POWER_MAX) ? + "max_savings" : "min_savings"); + + res = mp_query(wnd, OID_802_11_NUMBER_OF_ANTENNAS, + &antenna, sizeof(antenna)); + if (!res) + p += sprintf(p, "num_antennas=%u\n", antenna); + + res = mp_query(wnd, OID_802_11_TX_ANTENNA_SELECTED, + &antenna, sizeof(antenna)); + if (!res) + p += sprintf(p, "tx_antenna=%u\n", antenna); + + res = mp_query(wnd, OID_802_11_RX_ANTENNA_SELECTED, + &antenna, sizeof(antenna)); + if (!res) + p += sprintf(p, "rx_antenna=%u\n", antenna); + + p += sprintf(p, "encryption_modes=%s%s%s%s%s%s%s\n", + test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ? + "WEP" : "none", + + test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ? + "; TKIP with WPA" : "", + test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? + ", WPA2" : "", + test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? + ", WPA2PSK" : "", + + test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ? + "; AES/CCMP with WPA" : "", + test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? + ", WPA2" : "", + test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? + ", WPA2PSK" : ""); + + res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter); + if (!res) { + if (packet_filter != wnd->packet_filter) + WARNING("wrong packet_filter? 0x%08x, 0x%08x\n", + packet_filter, wnd->packet_filter); + p += sprintf(p, "packet_filter: 0x%08x\n", packet_filter); + } + if (p - page > count) { + WARNING("wrote %lu bytes (limit is %u)", + (unsigned long)(p - page), count); + *eof = 1; + } + + return p - page; +} + +static int procfs_read_ndis_settings(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + char *p = page; + struct ndis_device *wnd = (struct ndis_device *)data; + struct wrap_device_setting *setting; + + if (off != 0) { + *eof = 1; + return 0; + } + + p += sprintf(p, "hangcheck_interval=%d\n", + hangcheck_interval == 0 ? + (int)(wnd->hangcheck_interval / HZ) : -1); + + list_for_each_entry(setting, &wnd->wd->settings, list) { + p += sprintf(p, "%s=%s\n", setting->name, setting->value); + } + + list_for_each_entry(setting, &wnd->wd->driver->settings, list) { + p += sprintf(p, "%s=%s\n", setting->name, setting->value); + } + + return p - page; +} + +static int procfs_write_ndis_settings(struct file *file, const char __user *buf, + unsigned long count, void *data) +{ + struct ndis_device *wnd = (struct ndis_device *)data; + char setting[MAX_PROC_STR_LEN], *p; + unsigned int i; + NDIS_STATUS res; + + if (count > MAX_PROC_STR_LEN) + return -EINVAL; + + memset(setting, 0, sizeof(setting)); + if (copy_from_user(setting, buf, count)) + return -EFAULT; + + if ((p = strchr(setting, '\n'))) + *p = 0; + + if ((p = strchr(setting, '='))) + *p = 0; + + if (!strcmp(setting, "hangcheck_interval")) { + if (!p) + return -EINVAL; + p++; + i = simple_strtol(p, NULL, 10); + hangcheck_del(wnd); + if (i > 0) { + wnd->hangcheck_interval = i * HZ; + hangcheck_add(wnd); + } + } else if (!strcmp(setting, "suspend")) { + if (!p) + return -EINVAL; + p++; + i = simple_strtol(p, NULL, 10); + if (i <= 0 || i > 3) + return -EINVAL; + if (wrap_is_pci_bus(wnd->wd->dev_bus)) + i = wrap_pnp_suspend_pci_device(wnd->wd->pci.pdev, + PMSG_SUSPEND); + else +#ifdef ENABLE_USB + i = wrap_pnp_suspend_usb_device(wnd->wd->usb.intf, + PMSG_SUSPEND); +#else + i = -1; +#endif + if (i) + return -EINVAL; + } else if (!strcmp(setting, "resume")) { + if (wrap_is_pci_bus(wnd->wd->dev_bus)) + i = wrap_pnp_resume_pci_device(wnd->wd->pci.pdev); + else +#ifdef ENABLE_USB + i = wrap_pnp_resume_usb_device(wnd->wd->usb.intf); +#else + i = -1; +#endif + if (i) + return -EINVAL; + } else if (!strcmp(setting, "stats_enabled")) { + if (!p) + return -EINVAL; + p++; + i = simple_strtol(p, NULL, 10); + if (i > 0) + wnd->iw_stats_enabled = TRUE; + else + wnd->iw_stats_enabled = FALSE; + } else if (!strcmp(setting, "packet_filter")) { + if (!p) + return -EINVAL; + p++; + i = simple_strtol(p, NULL, 10); + res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, i); + if (res) + WARNING("setting packet_filter failed: %08X", res); + } else if (!strcmp(setting, "reinit")) { + if (ndis_reinit(wnd) != NDIS_STATUS_SUCCESS) + return -EFAULT; + } else { + struct ndis_configuration_parameter param; + struct unicode_string key; + struct ansi_string ansi; + + if (!p) + return -EINVAL; + p++; + RtlInitAnsiString(&ansi, p); + if (RtlAnsiStringToUnicodeString(¶m.data.string, &ansi, + TRUE) != STATUS_SUCCESS) + EXIT1(return -EFAULT); + param.type = NdisParameterString; + RtlInitAnsiString(&ansi, setting); + if (RtlAnsiStringToUnicodeString(&key, &ansi, + TRUE) != STATUS_SUCCESS) { + RtlFreeUnicodeString(¶m.data.string); + EXIT1(return -EINVAL); + } + NdisWriteConfiguration(&res, wnd->nmb, &key, ¶m); + RtlFreeUnicodeString(&key); + RtlFreeUnicodeString(¶m.data.string); + if (res != NDIS_STATUS_SUCCESS) + return -EFAULT; + } + return count; +} + +int wrap_procfs_add_ndis_device(struct ndis_device *wnd) +{ + struct proc_dir_entry *procfs_entry; + + if (wrap_procfs_entry == NULL) + return -ENOMEM; + + if (wnd->procfs_iface) { + ERROR("%s already registered?", wnd->netdev_name); + return -EINVAL; + } + wnd->procfs_iface = proc_mkdir(wnd->netdev_name, wrap_procfs_entry); + if (wnd->procfs_iface == NULL) { + ERROR("couldn't create proc directory"); + return -ENOMEM; + } + wnd->procfs_iface->uid = proc_uid; + wnd->procfs_iface->gid = proc_gid; + + procfs_entry = create_proc_entry("hw", S_IFREG | S_IRUSR | S_IRGRP, + wnd->procfs_iface); + if (procfs_entry == NULL) { + ERROR("couldn't create proc entry for 'hw'"); + goto err_hw; + } else { + procfs_entry->uid = proc_uid; + procfs_entry->gid = proc_gid; + procfs_entry->data = wnd; + procfs_entry->read_proc = procfs_read_ndis_hw; + } + + procfs_entry = create_proc_entry("stats", S_IFREG | S_IRUSR | S_IRGRP, + wnd->procfs_iface); + if (procfs_entry == NULL) { + ERROR("couldn't create proc entry for 'stats'"); + goto err_stats; + } else { + procfs_entry->uid = proc_uid; + procfs_entry->gid = proc_gid; + procfs_entry->data = wnd; + procfs_entry->read_proc = procfs_read_ndis_stats; + } + + procfs_entry = create_proc_entry("encr", S_IFREG | S_IRUSR | S_IRGRP, + wnd->procfs_iface); + if (procfs_entry == NULL) { + ERROR("couldn't create proc entry for 'encr'"); + goto err_encr; + } else { + procfs_entry->uid = proc_uid; + procfs_entry->gid = proc_gid; + procfs_entry->data = wnd; + procfs_entry->read_proc = procfs_read_ndis_encr; + } + + procfs_entry = create_proc_entry("settings", S_IFREG | + S_IRUSR | S_IRGRP | + S_IWUSR | S_IWGRP, wnd->procfs_iface); + if (procfs_entry == NULL) { + ERROR("couldn't create proc entry for 'settings'"); + goto err_settings; + } else { + procfs_entry->uid = proc_uid; + procfs_entry->gid = proc_gid; + procfs_entry->data = wnd; + procfs_entry->read_proc = procfs_read_ndis_settings; + procfs_entry->write_proc = procfs_write_ndis_settings; + } + return 0; + +err_settings: + remove_proc_entry("encr", wnd->procfs_iface); +err_encr: + remove_proc_entry("stats", wnd->procfs_iface); +err_stats: + remove_proc_entry("hw", wnd->procfs_iface); +err_hw: + remove_proc_entry(wnd->netdev_name, wrap_procfs_entry); + wnd->procfs_iface = NULL; + return -ENOMEM; +} + +void wrap_procfs_remove_ndis_device(struct ndis_device *wnd) +{ + struct proc_dir_entry *procfs_iface = xchg(&wnd->procfs_iface, NULL); + + if (procfs_iface == NULL) + return; + remove_proc_entry("hw", procfs_iface); + remove_proc_entry("stats", procfs_iface); + remove_proc_entry("encr", procfs_iface); + remove_proc_entry("settings", procfs_iface); + if (wrap_procfs_entry) + remove_proc_entry(wnd->netdev_name, wrap_procfs_entry); +} + +static int procfs_read_debug(char *page, char **start, off_t off, + int count, int *eof, void *data) +{ + char *p = page; + enum alloc_type type; + + if (off != 0) { + *eof = 1; + return 0; + } + p += sprintf(p, "%d\n", debug); + type = 0; +#ifdef ALLOC_DEBUG + for (type = 0; type < ALLOC_TYPE_MAX; type++) + p += sprintf(p, "total size of allocations in %d: %d\n", + type, alloc_size(type)); +#endif + return p - page; +} + +static int procfs_write_debug(struct file *file, const char __user *buf, + unsigned long count, void *data) +{ + int i; + char setting[MAX_PROC_STR_LEN], *p; + + if (count > MAX_PROC_STR_LEN) + return -EINVAL; + + memset(setting, 0, sizeof(setting)); + if (copy_from_user(setting, buf, count)) + return -EFAULT; + + if ((p = strchr(setting, '\n'))) + *p = 0; + + if ((p = strchr(setting, '='))) + *p = 0; + + i = simple_strtol(setting, NULL, 10); + if (i >= 0 && i < 10) + debug = i; + else + return -EINVAL; + return count; +} + +int wrap_procfs_init(void) +{ + struct proc_dir_entry *procfs_entry; + + wrap_procfs_entry = proc_mkdir(DRIVER_NAME, proc_net_root); + if (wrap_procfs_entry == NULL) { + ERROR("couldn't create procfs directory"); + return -ENOMEM; + } + wrap_procfs_entry->uid = proc_uid; + wrap_procfs_entry->gid = proc_gid; + + procfs_entry = create_proc_entry("debug", S_IFREG | S_IRUSR | S_IRGRP, + wrap_procfs_entry); + if (procfs_entry == NULL) { + ERROR("couldn't create proc entry for 'debug'"); + return -ENOMEM; + } else { + procfs_entry->uid = proc_uid; + procfs_entry->gid = proc_gid; + procfs_entry->read_proc = procfs_read_debug; + procfs_entry->write_proc = procfs_write_debug; + } + return 0; +} + +void wrap_procfs_remove(void) +{ + if (wrap_procfs_entry == NULL) + return; + remove_proc_entry("debug", wrap_procfs_entry); + remove_proc_entry(DRIVER_NAME, proc_net_root); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/mkstubs.sh +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/mkstubs.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +for file in "$@"; do + echo + echo "# automatically generated from $file" + sed -n \ + -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/\ + win2lin(\1, \2)/p' \ + -e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/\ + win2lin(\1, \2)/p' \ + $file | sed -e 's/[ \t ]\+//' | sort -u; \ +done --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapndis.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapndis.c @@ -0,0 +1,2133 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ndis.h" +#include "iw_ndis.h" +#include "pnp.h" +#include "loader.h" +#include "wrapndis.h" +#include +#include +#include +#include +#include +#include "wrapper.h" + +/* Functions callable from the NDIS driver */ +wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo, + struct irp *irp); +wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp); +wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp); + +workqueue_struct_t *wrapndis_wq; +static struct nt_thread *wrapndis_worker_thread; + +static int set_packet_filter(struct ndis_device *wnd, + ULONG packet_filter); +static void add_iw_stats_timer(struct ndis_device *wnd); +static void del_iw_stats_timer(struct ndis_device *wnd); +static NDIS_STATUS ndis_start_device(struct ndis_device *wnd); +static int ndis_remove_device(struct ndis_device *wnd); +static void set_multicast_list(struct ndis_device *wnd); +static int ndis_net_dev_open(struct net_device *net_dev); +static int ndis_net_dev_close(struct net_device *net_dev); + +/* MiniportReset */ +NDIS_STATUS mp_reset(struct ndis_device *wnd) +{ + NDIS_STATUS res; + struct miniport *mp; + BOOLEAN reset_address; + KIRQL irql; + + ENTER2("wnd: %p", wnd); + if (down_interruptible(&wnd->tx_ring_mutex)) + EXIT3(return NDIS_STATUS_FAILURE); + if (down_interruptible(&wnd->ndis_req_mutex)) { + up(&wnd->tx_ring_mutex); + EXIT3(return NDIS_STATUS_FAILURE); + } + mp = &wnd->wd->driver->ndis_driver->mp; + prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0); + WARNING("%s is being reset", wnd->net_dev->name); + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + res = LIN2WIN2(mp->reset, &reset_address, wnd->nmb->mp_ctx); + serialize_unlock_irql(wnd, irql); + + TRACE2("%08X, %08X", res, reset_address); + if (res == NDIS_STATUS_PENDING) { + /* wait for NdisMResetComplete */ + if (wait_condition((wnd->ndis_req_done > 0), 0, + TASK_INTERRUPTIBLE) < 0) + res = NDIS_STATUS_FAILURE; + else { + res = wnd->ndis_req_status; + reset_address = wnd->ndis_req_done - 1; + } + TRACE2("%08X, %08X", res, reset_address); + } + up(&wnd->ndis_req_mutex); + if (res == NDIS_STATUS_SUCCESS && reset_address) { + set_packet_filter(wnd, wnd->packet_filter); + set_multicast_list(wnd); + } + up(&wnd->tx_ring_mutex); + EXIT3(return res); +} + +/* MiniportRequest(Query/Set)Information */ +NDIS_STATUS mp_request(enum ndis_request_type request, + struct ndis_device *wnd, ndis_oid oid, + void *buf, ULONG buflen, ULONG *written, ULONG *needed) +{ + NDIS_STATUS res; + ULONG w, n; + struct miniport *mp; + KIRQL irql; + + if (down_interruptible(&wnd->ndis_req_mutex)) + EXIT3(return NDIS_STATUS_FAILURE); + if (!written) + written = &w; + if (!needed) + needed = &n; + mp = &wnd->wd->driver->ndis_driver->mp; + prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0); + irql = serialize_lock_irql(wnd); + assert_irql(_irql_ == DISPATCH_LEVEL); + switch (request) { + case NdisRequestQueryInformation: + TRACE2("%p, %08X, %p", mp->queryinfo, oid, wnd->nmb->mp_ctx); + res = LIN2WIN6(mp->queryinfo, wnd->nmb->mp_ctx, oid, buf, + buflen, written, needed); + break; + case NdisRequestSetInformation: + TRACE2("%p, %08X, %p", mp->setinfo, oid, wnd->nmb->mp_ctx); + res = LIN2WIN6(mp->setinfo, wnd->nmb->mp_ctx, oid, buf, + buflen, written, needed); + break; + default: + WARNING("invalid request %d, %08X", request, oid); + res = NDIS_STATUS_NOT_SUPPORTED; + break; + } + serialize_unlock_irql(wnd, irql); + TRACE2("%08X, %08X", res, oid); + if (res == NDIS_STATUS_PENDING) { + /* wait for NdisMQueryInformationComplete */ + if (wait_condition((wnd->ndis_req_done > 0), 0, + TASK_INTERRUPTIBLE) < 0) + res = NDIS_STATUS_FAILURE; + else + res = wnd->ndis_req_status; + TRACE2("%08X, %08X", res, oid); + } + up(&wnd->ndis_req_mutex); + DBG_BLOCK(2) { + if (res || needed) + TRACE2("%08X, %d, %d, %d", res, buflen, *written, + *needed); + } + EXIT3(return res); +} + +/* MiniportPnPEventNotify */ +static NDIS_STATUS mp_pnp_event(struct ndis_device *wnd, + enum ndis_device_pnp_event event, + ULONG power_profile) +{ + struct miniport *mp; + + ENTER1("%p, %d", wnd, event); + mp = &wnd->wd->driver->ndis_driver->mp; + if (!mp->pnp_event_notify) { + TRACE1("Windows driver %s doesn't support " + "MiniportPnpEventNotify", wnd->wd->driver->name); + return NDIS_STATUS_FAILURE; + } + /* RNDIS driver doesn't like to be notified if device is + * already halted */ + if (!test_bit(HW_INITIALIZED, &wnd->wd->hw_status)) + EXIT1(return NDIS_STATUS_SUCCESS); + switch (event) { + case NdisDevicePnPEventSurpriseRemoved: + TRACE1("%u, %p", + (wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK), + mp->pnp_event_notify); + if ((wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK) && + !test_bit(HW_PRESENT, &wnd->wd->hw_status) && + mp->pnp_event_notify) { + TRACE1("calling surprise_removed"); + LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, + NdisDevicePnPEventSurpriseRemoved, NULL, 0); + } else + TRACE1("Windows driver %s doesn't support " + "MiniportPnpEventNotify for safe unplugging", + wnd->wd->driver->name); + return NDIS_STATUS_SUCCESS; + case NdisDevicePnPEventPowerProfileChanged: + if (power_profile) + power_profile = NdisPowerProfileAcOnLine; + LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, + NdisDevicePnPEventPowerProfileChanged, + &power_profile, (ULONG)sizeof(power_profile)); + return NDIS_STATUS_SUCCESS; + default: + WARNING("event %d not yet implemented", event); + return NDIS_STATUS_SUCCESS; + } +} + +/* MiniportInitialize */ +static NDIS_STATUS mp_init(struct ndis_device *wnd) +{ + NDIS_STATUS error_status, status; + UINT medium_index; + enum ndis_medium medium_array[] = {NdisMedium802_3}; + struct miniport *mp; + + ENTER1("irql: %d", current_irql()); + if (test_bit(HW_INITIALIZED, &wnd->wd->hw_status)) { + WARNING("device %p already initialized!", wnd); + return NDIS_STATUS_FAILURE; + } + + if (!wnd->wd->driver->ndis_driver || + !wnd->wd->driver->ndis_driver->mp.init) { + WARNING("assuming WDM (non-NDIS) driver"); + EXIT1(return NDIS_STATUS_NOT_RECOGNIZED); + } + mp = &wnd->wd->driver->ndis_driver->mp; + status = LIN2WIN6(mp->init, &error_status, &medium_index, medium_array, + sizeof(medium_array) / sizeof(medium_array[0]), + wnd->nmb, wnd->nmb); + TRACE1("init returns: %08X, irql: %d", status, current_irql()); + if (status != NDIS_STATUS_SUCCESS) { + WARNING("couldn't initialize device: %08X", status); + EXIT1(return NDIS_STATUS_FAILURE); + } + + /* Wait a little to let card power up otherwise ifup might + * fail after boot */ + sleep_hz(HZ / 5); + status = mp_pnp_event(wnd, NdisDevicePnPEventPowerProfileChanged, + NdisPowerProfileAcOnLine); + if (status != NDIS_STATUS_SUCCESS) + TRACE1("setting power failed: %08X", status); + set_bit(HW_INITIALIZED, &wnd->wd->hw_status); + /* the description about NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND is + * misleading/confusing */ + status = mp_query(wnd, OID_PNP_CAPABILITIES, + &wnd->pnp_capa, sizeof(wnd->pnp_capa)); + if (status == NDIS_STATUS_SUCCESS) { + TRACE1("%d, %d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup, + wnd->pnp_capa.wakeup.min_pattern_wakeup); + wnd->attributes |= NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; + status = mp_query_int(wnd, OID_PNP_ENABLE_WAKE_UP, + &wnd->ndis_wolopts); + TRACE1("%08X, %x", status, wnd->ndis_wolopts); + } else if (status == NDIS_STATUS_NOT_SUPPORTED) + wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; + TRACE1("%d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup); + /* although some NDIS drivers support suspend, Linux kernel + * has issues with suspending USB devices */ + if (wrap_is_usb_bus(wnd->wd->dev_bus)) { + wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; + wnd->ndis_wolopts = 0; + } + mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF); + EXIT1(return NDIS_STATUS_SUCCESS); +} + +/* MiniportHalt */ +static void mp_halt(struct ndis_device *wnd) +{ + struct miniport *mp; + + ENTER1("%p", wnd); + if (!test_and_clear_bit(HW_INITIALIZED, &wnd->wd->hw_status)) { + WARNING("device %p is not initialized - not halting", wnd); + return; + } + hangcheck_del(wnd); + del_iw_stats_timer(wnd); + if (wnd->physical_medium == NdisPhysicalMediumWirelessLan && + wrap_is_pci_bus(wnd->wd->dev_bus)) { + up(&wnd->ndis_req_mutex); + disassociate(wnd, 0); + if (down_interruptible(&wnd->ndis_req_mutex)) + WARNING("couldn't obtain ndis_req_mutex"); + } + mp = &wnd->wd->driver->ndis_driver->mp; + TRACE1("halt: %p", mp->mp_halt); + LIN2WIN1(mp->mp_halt, wnd->nmb->mp_ctx); + /* if a driver doesn't call NdisMDeregisterInterrupt during + * halt, deregister it now */ + if (wnd->mp_interrupt) + NdisMDeregisterInterrupt(wnd->mp_interrupt); + /* cancel any timers left by bugyy windows driver; also free + * the memory for timers */ + while (1) { + struct nt_slist *slist; + struct wrap_timer *wrap_timer; + + spin_lock_bh(&ntoskernel_lock); + if ((slist = wnd->wrap_timer_slist.next)) + wnd->wrap_timer_slist.next = slist->next; + spin_unlock_bh(&ntoskernel_lock); + TIMERTRACE("%p", slist); + if (!slist) + break; + wrap_timer = container_of(slist, struct wrap_timer, slist); + wrap_timer->repeat = 0; + /* ktimer that this wrap_timer is associated to can't + * be touched, as it may have been freed by the driver + * already */ + if (del_timer_sync(&wrap_timer->timer)) + WARNING("Buggy Windows driver left timer %p " + "running", wrap_timer->nt_timer); + memset(wrap_timer, 0, sizeof(*wrap_timer)); + kfree(wrap_timer); + } + EXIT1(return); +} + +static NDIS_STATUS mp_set_power_state(struct ndis_device *wnd, + enum ndis_power_state state) +{ + NDIS_STATUS status; + + TRACE1("%d", state); + if (state == NdisDeviceStateD0) { + status = NDIS_STATUS_SUCCESS; + up(&wnd->ndis_req_mutex); + if (test_and_clear_bit(HW_HALTED, &wnd->wd->hw_status)) { + status = mp_init(wnd); + if (status == NDIS_STATUS_SUCCESS) { + set_packet_filter(wnd, wnd->packet_filter); + set_multicast_list(wnd); + } + } else if (test_and_clear_bit(HW_SUSPENDED, + &wnd->wd->hw_status)) { + status = mp_set_int(wnd, OID_PNP_SET_POWER, state); + if (status != NDIS_STATUS_SUCCESS) + WARNING("%s: setting power to state %d failed? " + "%08X", wnd->net_dev->name, state, + status); + } else + return NDIS_STATUS_FAILURE; + + if (wrap_is_pci_bus(wnd->wd->dev_bus)) { + pci_enable_wake(wnd->wd->pci.pdev, PCI_D3hot, 0); + pci_enable_wake(wnd->wd->pci.pdev, PCI_D3cold, 0); + } + if (status == NDIS_STATUS_SUCCESS) { + up(&wnd->tx_ring_mutex); + netif_device_attach(wnd->net_dev); + hangcheck_add(wnd); + add_iw_stats_timer(wnd); + } else + WARNING("%s: couldn't set power to state %d; device not" + " resumed", wnd->net_dev->name, state); + EXIT1(return status); + } else { + if (down_interruptible(&wnd->tx_ring_mutex)) + EXIT1(return NDIS_STATUS_FAILURE); + netif_device_detach(wnd->net_dev); + hangcheck_del(wnd); + del_iw_stats_timer(wnd); + status = NDIS_STATUS_NOT_SUPPORTED; + if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) { + status = mp_set_int(wnd, OID_PNP_ENABLE_WAKE_UP, + wnd->ndis_wolopts); + TRACE2("0x%x, 0x%x", status, wnd->ndis_wolopts); + if (status == NDIS_STATUS_SUCCESS) { + if (wnd->ndis_wolopts) + wnd->wd->pci.wake_state = + PowerDeviceD3; + else + wnd->wd->pci.wake_state = + PowerDeviceUnspecified; + } else + WARNING("couldn't set wake-on-lan options: " + "0x%x, %08X", wnd->ndis_wolopts, status); + status = mp_set_int(wnd, OID_PNP_SET_POWER, state); + if (status == NDIS_STATUS_SUCCESS) + set_bit(HW_SUSPENDED, &wnd->wd->hw_status); + else + WARNING("suspend failed: %08X", status); + } + if (status != NDIS_STATUS_SUCCESS) { + WARNING("%s does not support power management; " + "halting the device", wnd->net_dev->name); + mp_halt(wnd); + set_bit(HW_HALTED, &wnd->wd->hw_status); + status = STATUS_SUCCESS; + } + if (down_interruptible(&wnd->ndis_req_mutex)) + WARNING("couldn't lock ndis_req_mutex"); + EXIT1(return status); + } +} + +static int ndis_set_mac_address(struct net_device *dev, void *p) +{ + struct ndis_device *wnd = netdev_priv(dev); + struct sockaddr *addr = p; + struct ndis_configuration_parameter param; + struct unicode_string key; + struct ansi_string ansi; + NDIS_STATUS res; + unsigned char mac_string[2 * ETH_ALEN + 1]; + mac_address mac; + + memcpy(mac, addr->sa_data, sizeof(mac)); + memset(mac_string, 0, sizeof(mac_string)); + res = snprintf(mac_string, sizeof(mac_string), MACSTR, MAC2STR(mac)); + if (res != (sizeof(mac_string) - 1)) + EXIT1(return -EINVAL); + TRACE1("new mac: %s", mac_string); + + RtlInitAnsiString(&ansi, mac_string); + if (RtlAnsiStringToUnicodeString(¶m.data.string, &ansi, + TRUE) != STATUS_SUCCESS) + EXIT1(return -EINVAL); + + param.type = NdisParameterString; + RtlInitAnsiString(&ansi, "NetworkAddress"); + if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS) { + RtlFreeUnicodeString(¶m.data.string); + EXIT1(return -EINVAL); + } + NdisWriteConfiguration(&res, wnd->nmb, &key, ¶m); + RtlFreeUnicodeString(&key); + RtlFreeUnicodeString(¶m.data.string); + + if (res != NDIS_STATUS_SUCCESS) + EXIT1(return -EFAULT); + if (ndis_reinit(wnd) == NDIS_STATUS_SUCCESS) { + res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, + mac, sizeof(mac)); + if (res == NDIS_STATUS_SUCCESS) { + TRACE1("mac:" MACSTRSEP, MAC2STR(mac)); + memcpy(dev->dev_addr, mac, sizeof(mac)); + } else + ERROR("couldn't get mac address: %08X", res); + } + EXIT1(return 0); +} + +static int setup_tx_sg_list(struct ndis_device *wnd, struct sk_buff *skb, + struct ndis_packet_oob_data *oob_data) +{ + struct ndis_sg_element *sg_element; + struct ndis_sg_list *sg_list; + int i; + + ENTER3("%p, %d", skb, skb_shinfo(skb)->nr_frags); + if (skb_shinfo(skb)->nr_frags <= 1) { + sg_element = &oob_data->wrap_tx_sg_list.elements[0]; + sg_element->address = + PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data, + skb->len, PCI_DMA_TODEVICE); + sg_element->length = skb->len; + oob_data->wrap_tx_sg_list.nent = 1; + oob_data->ext.info[ScatterGatherListPacketInfo] = + &oob_data->wrap_tx_sg_list; + TRACE3("%Lx, %u", sg_element->address, sg_element->length); + return 0; + } + sg_list = kmalloc(sizeof(*sg_list) + + (skb_shinfo(skb)->nr_frags + 1) * sizeof(*sg_element), + GFP_ATOMIC); + if (!sg_list) + return -ENOMEM; + sg_list->nent = skb_shinfo(skb)->nr_frags + 1; + TRACE3("%p, %d", sg_list, sg_list->nent); + sg_element = sg_list->elements; + sg_element->length = skb_headlen(skb); + sg_element->address = + PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data, + skb_headlen(skb), PCI_DMA_TODEVICE); + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { + skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; + sg_element++; + sg_element->length = frag->size; + sg_element->address = + pci_map_page(wnd->wd->pci.pdev, frag->page, + frag->page_offset, frag->size, + PCI_DMA_TODEVICE); + TRACE3("%Lx, %u", sg_element->address, sg_element->length); + } + oob_data->ext.info[ScatterGatherListPacketInfo] = sg_list; + return 0; +} + +static void free_tx_sg_list(struct ndis_device *wnd, + struct ndis_packet_oob_data *oob_data) +{ + int i; + struct ndis_sg_element *sg_element; + struct ndis_sg_list *sg_list = + oob_data->ext.info[ScatterGatherListPacketInfo]; + sg_element = sg_list->elements; + TRACE3("%p, %d", sg_list, sg_list->nent); + PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, sg_element->address, + sg_element->length, PCI_DMA_TODEVICE); + if (sg_list->nent == 1) + EXIT3(return); + for (i = 1; i < sg_list->nent; i++, sg_element++) { + TRACE3("%Lx, %u", sg_element->address, sg_element->length); + pci_unmap_page(wnd->wd->pci.pdev, sg_element->address, + sg_element->length, PCI_DMA_TODEVICE); + } + TRACE3("%p", sg_list); + kfree(sg_list); +} + +static struct ndis_packet *alloc_tx_packet(struct ndis_device *wnd, + struct sk_buff *skb) +{ + struct ndis_packet *packet; + ndis_buffer *buffer; + struct ndis_packet_oob_data *oob_data; + NDIS_STATUS status; + + NdisAllocatePacket(&status, &packet, wnd->tx_packet_pool); + if (status != NDIS_STATUS_SUCCESS) + return NULL; + NdisAllocateBuffer(&status, &buffer, wnd->tx_buffer_pool, + skb->data, skb->len); + if (status != NDIS_STATUS_SUCCESS) { + NdisFreePacket(packet); + return NULL; + } + packet->private.buffer_head = buffer; + packet->private.buffer_tail = buffer; + + oob_data = NDIS_PACKET_OOB_DATA(packet); + oob_data->tx_skb = skb; + if (wnd->sg_dma_size) { + if (setup_tx_sg_list(wnd, skb, oob_data)) { + NdisFreeBuffer(buffer); + NdisFreePacket(packet); + return NULL; + } + } + if (skb->ip_summed == CHECKSUM_PARTIAL) { + struct ndis_tcp_ip_checksum_packet_info csum; + int protocol; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21) + protocol = ntohs(skb->protocol); +#else + protocol = skb->nh.iph->protocol; +#endif + csum.value = 0; + csum.tx.v4 = 1; + if (protocol == IPPROTO_TCP) + csum.tx.tcp = 1; + else if (protocol == IPPROTO_UDP) + csum.tx.udp = 1; +// csum->tx.ip = 1; + packet->private.flags |= NDIS_PROTOCOL_ID_TCP_IP; + oob_data->ext.info[TcpIpChecksumPacketInfo] = + (void *)(ULONG_PTR)csum.value; + } + DBG_BLOCK(4) { + dump_bytes(__func__, skb->data, skb->len); + } + TRACE4("%p, %p, %p", packet, buffer, skb); + return packet; +} + +void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet, + NDIS_STATUS status) +{ + ndis_buffer *buffer; + struct ndis_packet_oob_data *oob_data; + struct sk_buff *skb; + struct ndis_packet_pool *pool; + + assert_irql(_irql_ <= DISPATCH_LEVEL); + assert(packet->private.packet_flags); + oob_data = NDIS_PACKET_OOB_DATA(packet); + skb = oob_data->tx_skb; + buffer = packet->private.buffer_head; + TRACE4("%p, %p, %p, %08X", packet, buffer, skb, status); + if (status == NDIS_STATUS_SUCCESS) { + pre_atomic_add(wnd->net_stats.tx_bytes, packet->private.len); + atomic_inc_var(wnd->net_stats.tx_packets); + } else { + TRACE1("packet dropped: %08X", status); + atomic_inc_var(wnd->net_stats.tx_dropped); + } + if (wnd->sg_dma_size) + free_tx_sg_list(wnd, oob_data); + NdisFreeBuffer(buffer); + dev_kfree_skb_any(skb); + pool = packet->private.pool; + NdisFreePacket(packet); + if (netif_queue_stopped(wnd->net_dev) && + ((pool->max_descr - pool->num_used_descr) >= + (wnd->max_tx_packets / 4))) { + set_bit(NETIF_WAKEQ, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); + } + EXIT4(return); +} + +/* MiniportSend and MiniportSendPackets */ +/* this function is called holding tx_ring_mutex. start and n are such + * that start + n < TX_RING_SIZE; i.e., packets don't wrap around + * ring */ +static u8 mp_tx_packets(struct ndis_device *wnd, u8 start, u8 n) +{ + NDIS_STATUS res; + struct miniport *mp; + struct ndis_packet *packet; + u8 sent; + KIRQL irql; + + ENTER3("%d, %d", start, n); + mp = &wnd->wd->driver->ndis_driver->mp; + if (mp->send_packets) { + if (deserialized_driver(wnd)) { + LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, + &wnd->tx_ring[start], n); + sent = n; + } else { + irql = serialize_lock_irql(wnd); + LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, + &wnd->tx_ring[start], n); + serialize_unlock_irql(wnd, irql); + for (sent = 0; sent < n && wnd->tx_ok; sent++) { + struct ndis_packet_oob_data *oob_data; + packet = wnd->tx_ring[start + sent]; + oob_data = NDIS_PACKET_OOB_DATA(packet); + switch ((res = + xchg(&oob_data->status, + NDIS_STATUS_NOT_RECOGNIZED))) { + case NDIS_STATUS_SUCCESS: + free_tx_packet(wnd, packet, + NDIS_STATUS_SUCCESS); + break; + case NDIS_STATUS_PENDING: + break; + case NDIS_STATUS_RESOURCES: + wnd->tx_ok = 0; + /* resubmit this packet and + * the rest when resources + * become available */ + sent--; + break; + case NDIS_STATUS_FAILURE: + free_tx_packet(wnd, packet, + NDIS_STATUS_FAILURE); + break; + default: + ERROR("%p: invalid status: %08X", + packet, res); + free_tx_packet(wnd, packet, + oob_data->status); + break; + } + TRACE3("%p, %d", packet, res); + } + } + TRACE3("sent: %d(%d)", sent, n); + } else { + for (sent = 0; sent < n && wnd->tx_ok; sent++) { + struct ndis_packet_oob_data *oob_data; + packet = wnd->tx_ring[start + sent]; + oob_data = NDIS_PACKET_OOB_DATA(packet); + oob_data->status = NDIS_STATUS_NOT_RECOGNIZED; + irql = serialize_lock_irql(wnd); + res = LIN2WIN3(mp->send, wnd->nmb->mp_ctx, + packet, packet->private.flags); + serialize_unlock_irql(wnd, irql); + switch (res) { + case NDIS_STATUS_SUCCESS: + free_tx_packet(wnd, packet, res); + break; + case NDIS_STATUS_PENDING: + break; + case NDIS_STATUS_RESOURCES: + wnd->tx_ok = 0; + /* resend this packet when resources + * become available */ + sent--; + break; + case NDIS_STATUS_FAILURE: + free_tx_packet(wnd, packet, res); + break; + default: + ERROR("packet %p: invalid status: %08X", + packet, res); + break; + } + } + } + EXIT3(return sent); +} + +static void tx_worker(worker_param_t param) +{ + struct ndis_device *wnd; + s8 n; + + wnd = worker_param_data(param, struct ndis_device, tx_work); + ENTER3("tx_ok %d", wnd->tx_ok); + while (wnd->tx_ok) { + if (down_interruptible(&wnd->tx_ring_mutex)) + break; + spin_lock_bh(&wnd->tx_ring_lock); + n = wnd->tx_ring_end - wnd->tx_ring_start; + TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n); + /* end == start if either ring is empty or full; in + * the latter case is_tx_ring_full is set */ + if (n == 0) { + if (wnd->is_tx_ring_full) + n = TX_RING_SIZE - wnd->tx_ring_start; + else { + spin_unlock_bh(&wnd->tx_ring_lock); + up(&wnd->tx_ring_mutex); + break; + } + } else if (n < 0) + n = TX_RING_SIZE - wnd->tx_ring_start; + spin_unlock_bh(&wnd->tx_ring_lock); + if (unlikely(n > wnd->max_tx_packets)) + n = wnd->max_tx_packets; + n = mp_tx_packets(wnd, wnd->tx_ring_start, n); + if (n) { + wnd->net_dev->trans_start = jiffies; + wnd->tx_ring_start = + (wnd->tx_ring_start + n) % TX_RING_SIZE; + wnd->is_tx_ring_full = 0; + } + up(&wnd->tx_ring_mutex); + TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n); + } + EXIT3(return); +} + +static int tx_skbuff(struct sk_buff *skb, struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + struct ndis_packet *packet; + + packet = alloc_tx_packet(wnd, skb); + if (!packet) { + TRACE2("couldn't allocate packet"); + netif_tx_lock(dev); + netif_stop_queue(dev); + netif_tx_unlock(dev); + return NETDEV_TX_BUSY; + } + spin_lock(&wnd->tx_ring_lock); + wnd->tx_ring[wnd->tx_ring_end++] = packet; + if (wnd->tx_ring_end == TX_RING_SIZE) + wnd->tx_ring_end = 0; + if (wnd->tx_ring_end == wnd->tx_ring_start) { + netif_tx_lock(dev); + wnd->is_tx_ring_full = 1; + netif_stop_queue(dev); + netif_tx_unlock(dev); + } + spin_unlock(&wnd->tx_ring_lock); + TRACE4("ring: %d, %d", wnd->tx_ring_start, wnd->tx_ring_end); + schedule_wrapndis_work(&wnd->tx_work); + return NETDEV_TX_OK; +} + +static int set_packet_filter(struct ndis_device *wnd, ULONG packet_filter) +{ + NDIS_STATUS res; + + while (1) { + res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, + packet_filter); + if (res == NDIS_STATUS_SUCCESS) + break; + TRACE2("couldn't set filter 0x%08x", packet_filter); + /* NDIS_PACKET_TYPE_PROMISCUOUS may not work with 802.11 */ + if (packet_filter & NDIS_PACKET_TYPE_PROMISCUOUS) { + packet_filter &= ~NDIS_PACKET_TYPE_PROMISCUOUS; + continue; + } + if (packet_filter & NDIS_PACKET_TYPE_ALL_LOCAL) { + packet_filter &= ~NDIS_PACKET_TYPE_ALL_LOCAL; + continue; + } + if (packet_filter & NDIS_PACKET_TYPE_ALL_FUNCTIONAL) { + packet_filter &= ~NDIS_PACKET_TYPE_ALL_FUNCTIONAL; + continue; + } + if (packet_filter & NDIS_PACKET_TYPE_MULTICAST) { + packet_filter &= ~NDIS_PACKET_TYPE_MULTICAST; + packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; + continue; + } + if (packet_filter & NDIS_PACKET_TYPE_ALL_MULTICAST) { + packet_filter &= ~NDIS_PACKET_TYPE_ALL_MULTICAST; + continue; + } + break; + } + + wnd->packet_filter = packet_filter; + res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter); + if (packet_filter != wnd->packet_filter) { + WARNING("filter not set: 0x%08x, 0x%08x", + packet_filter, wnd->packet_filter); + wnd->packet_filter = packet_filter; + } + if (wnd->packet_filter) + EXIT3(return 0); + else + EXIT3(return -1); +} + +void set_media_state(struct ndis_device *wnd, enum ndis_media_state state) +{ + ENTER2("state: 0x%x", state); + if (state == NdisMediaStateConnected) { + netif_carrier_on(wnd->net_dev); + wnd->tx_ok = 1; + if (netif_queue_stopped(wnd->net_dev)) + netif_wake_queue(wnd->net_dev); + if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { + set_bit(LINK_STATUS_ON, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); + } + } else if (state == NdisMediaStateDisconnected) { + netif_carrier_off(wnd->net_dev); + netif_stop_queue(wnd->net_dev); + wnd->tx_ok = 0; + if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { + memset(&wnd->essid, 0, sizeof(wnd->essid)); + set_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); + } + } else { + WARNING("invalid media state: 0x%x", state); + } +} + +static int ndis_net_dev_open(struct net_device *net_dev) +{ + ENTER1("%p", netdev_priv(net_dev)); + netif_start_queue(net_dev); + netif_poll_enable(net_dev); + EXIT1(return 0); +} + +static int ndis_net_dev_close(struct net_device *net_dev) +{ + ENTER1("%p", netdev_priv(net_dev)); + netif_poll_disable(net_dev); + netif_tx_disable(net_dev); + EXIT1(return 0); +} + +static int ndis_change_mtu(struct net_device *net_dev, int mtu) +{ + struct ndis_device *wnd = netdev_priv(net_dev); + int max; + + if (mtu < ETH_ZLEN) + return -EINVAL; + if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &max) != + NDIS_STATUS_SUCCESS) + return -EOPNOTSUPP; + TRACE1("%d", max); + max -= ETH_HLEN; + if (max <= ETH_ZLEN) + return -EINVAL; + if (mtu + ETH_HLEN > max) + return -EINVAL; + net_dev->mtu = mtu; + return 0; +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +static void ndis_poll_controller(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + + disable_irq(dev->irq); + ndis_isr(wnd->mp_interrupt->kinterrupt, wnd->mp_interrupt); + enable_irq(dev->irq); +} +#endif + +/* called from BH context */ +static struct net_device_stats *ndis_get_stats(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + return &wnd->net_stats; +} + +/* called from BH context */ +static void ndis_set_multicast_list(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + set_bit(SET_MULTICAST_LIST, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); +} + +/* called from BH context */ +struct iw_statistics *get_iw_stats(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + return &wnd->iw_stats; +} + +static void update_iw_stats(struct ndis_device *wnd) +{ + struct iw_statistics *iw_stats = &wnd->iw_stats; + struct ndis_wireless_stats ndis_stats; + NDIS_STATUS res; + ndis_rssi rssi; + int qual; + + ENTER2("%p", wnd); + if (wnd->iw_stats_enabled == FALSE || !netif_carrier_ok(wnd->net_dev)) { + memset(iw_stats, 0, sizeof(*iw_stats)); + EXIT2(return); + } + res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi)); + if (res == NDIS_STATUS_SUCCESS) + iw_stats->qual.level = rssi; + + qual = 100 * (rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE); + if (qual < 0) + qual = 0; + else if (qual > 100) + qual = 100; + + iw_stats->qual.noise = WL_NOISE; + iw_stats->qual.qual = qual; + + res = mp_query(wnd, OID_802_11_STATISTICS, + &ndis_stats, sizeof(ndis_stats)); + if (res != NDIS_STATUS_SUCCESS) + EXIT2(return); + iw_stats->discard.retries = (unsigned long)ndis_stats.retry + + (unsigned long)ndis_stats.multi_retry; + iw_stats->discard.misc = (unsigned long)ndis_stats.fcs_err + + (unsigned long)ndis_stats.rtss_fail + + (unsigned long)ndis_stats.ack_fail + + (unsigned long)ndis_stats.frame_dup; + + EXIT2(return); +} + +static void set_multicast_list(struct ndis_device *wnd) +{ + struct net_device *net_dev; + ULONG packet_filter; + NDIS_STATUS res; + + net_dev = wnd->net_dev; + packet_filter = wnd->packet_filter; + + TRACE2("0x%08x", packet_filter); + if (net_dev->flags & IFF_PROMISC) { + packet_filter |= NDIS_PACKET_TYPE_PROMISCUOUS | + NDIS_PACKET_TYPE_ALL_LOCAL; + } else if (net_dev->flags & IFF_ALLMULTI || + net_dev->mc_count > wnd->multicast_size) { + packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; + TRACE2("0x%08x", packet_filter); + } else if (net_dev->mc_count > 0) { + int i, size; + char *buf; + struct dev_mc_list *mclist; + size = min(wnd->multicast_size, net_dev->mc_count); + TRACE2("%d, %d", wnd->multicast_size, net_dev->mc_count); + buf = kmalloc(size * ETH_ALEN, GFP_KERNEL); + if (!buf) { + WARNING("couldn't allocate memory"); + EXIT2(return); + } + mclist = net_dev->mc_list; + for (i = 0; i < size && mclist; mclist = mclist->next) { + if (mclist->dmi_addrlen != ETH_ALEN) + continue; + memcpy(buf + i * ETH_ALEN, mclist->dmi_addr, ETH_ALEN); + TRACE2(MACSTRSEP, MAC2STR(mclist->dmi_addr)); + i++; + } + res = mp_set(wnd, OID_802_3_MULTICAST_LIST, buf, i * ETH_ALEN); + if (res == NDIS_STATUS_SUCCESS && i > 0) + packet_filter |= NDIS_PACKET_TYPE_MULTICAST; + else + packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST; + kfree(buf); + } + TRACE2("0x%08x", packet_filter); + res = set_packet_filter(wnd, packet_filter); + if (res) + TRACE1("couldn't set packet filter (%08X)", res); + EXIT2(return); +} + +static void link_status_off(struct ndis_device *wnd) +{ +#ifdef CONFIG_WIRELESS_EXT + union iwreq_data wrqu; + + memset(&wrqu, 0, sizeof(wrqu)); + wrqu.ap_addr.sa_family = ARPHRD_ETHER; + wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL); +#endif + EXIT2(return); +} + +static void link_status_on(struct ndis_device *wnd) +{ +#ifdef CONFIG_WIRELESS_EXT + struct ndis_assoc_info *ndis_assoc_info; + union iwreq_data wrqu; + NDIS_STATUS res; + const int assoc_size = sizeof(*ndis_assoc_info) + IW_CUSTOM_MAX + 32; +#endif + + ENTER2(""); +#ifdef CONFIG_WIRELESS_EXT + memset(&wrqu, 0, sizeof(wrqu)); + ndis_assoc_info = kzalloc(assoc_size, GFP_KERNEL); + if (!ndis_assoc_info) { + ERROR("couldn't allocate memory"); + goto send_assoc_event; + } + res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION, + ndis_assoc_info, assoc_size); + if (res) { + TRACE2("query assoc_info failed (%08X)", res); + kfree(ndis_assoc_info); + goto send_assoc_event; + } + TRACE2("%u, 0x%x, %u, 0x%x, %u", ndis_assoc_info->length, + ndis_assoc_info->req_ies, ndis_assoc_info->req_ie_length, + ndis_assoc_info->resp_ies, ndis_assoc_info->resp_ie_length); + if (ndis_assoc_info->req_ie_length > 0) { + wrqu.data.length = ndis_assoc_info->req_ie_length; + wireless_send_event(wnd->net_dev, IWEVASSOCREQIE, &wrqu, + ((char *)ndis_assoc_info) + + ndis_assoc_info->offset_req_ies); + } + if (ndis_assoc_info->resp_ie_length > 0) { + wrqu.data.length = ndis_assoc_info->resp_ie_length; + wireless_send_event(wnd->net_dev, IWEVASSOCRESPIE, &wrqu, + ((char *)ndis_assoc_info) + + ndis_assoc_info->offset_resp_ies); + } + kfree(ndis_assoc_info); + +send_assoc_event: + get_ap_address(wnd, wrqu.ap_addr.sa_data); + wrqu.ap_addr.sa_family = ARPHRD_ETHER; + TRACE2(MACSTRSEP, MAC2STR(wrqu.ap_addr.sa_data)); + wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL); +#endif + EXIT2(return); +} + +static void iw_stats_timer_proc(unsigned long data) +{ + struct ndis_device *wnd = (struct ndis_device *)data; + + ENTER2("%d", wnd->iw_stats_interval); + if (wnd->iw_stats_interval > 0) { + set_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); + } + mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval); +} + +static void add_iw_stats_timer(struct ndis_device *wnd) +{ + if (wnd->physical_medium != NdisPhysicalMediumWirelessLan) + return; + if (wnd->iw_stats_interval < 0) + wnd->iw_stats_interval *= -1; + wnd->iw_stats_timer.data = (unsigned long)wnd; + wnd->iw_stats_timer.function = iw_stats_timer_proc; + mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval); +} + +static void del_iw_stats_timer(struct ndis_device *wnd) +{ + ENTER2("%d", wnd->iw_stats_interval); + wnd->iw_stats_interval *= -1; + del_timer_sync(&wnd->iw_stats_timer); + EXIT2(return); +} + +static void hangcheck_proc(unsigned long data) +{ + struct ndis_device *wnd = (struct ndis_device *)data; + + ENTER3("%d", wnd->hangcheck_interval); + if (wnd->hangcheck_interval > 0) { + set_bit(HANGCHECK, &wnd->ndis_pending_work); + schedule_wrapndis_work(&wnd->ndis_work); + } + mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval); + EXIT3(return); +} + +void hangcheck_add(struct ndis_device *wnd) +{ + if (!wnd->wd->driver->ndis_driver->mp.hangcheck || + hangcheck_interval < 0) + EXIT2(return); + + if (hangcheck_interval > 0) + wnd->hangcheck_interval = hangcheck_interval * HZ; + if (wnd->hangcheck_interval < 0) + wnd->hangcheck_interval *= -1; + wnd->hangcheck_timer.data = (unsigned long)wnd; + wnd->hangcheck_timer.function = hangcheck_proc; + mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval); + EXIT2(return); +} + +void hangcheck_del(struct ndis_device *wnd) +{ + ENTER2("%d", wnd->hangcheck_interval); + if (wnd->hangcheck_interval > 0) + wnd->hangcheck_interval *= -1; + del_timer_sync(&wnd->hangcheck_timer); + EXIT2(return); +} + +/* worker procedure to take care of setting/checking various states */ +static void ndis_worker(worker_param_t param) +{ + struct ndis_device *wnd; + + wnd = worker_param_data(param, struct ndis_device, ndis_work); + WORKTRACE("0x%lx", wnd->ndis_pending_work); + + if (test_and_clear_bit(NETIF_WAKEQ, &wnd->ndis_pending_work)) { + netif_tx_lock_bh(wnd->net_dev); + netif_wake_queue(wnd->net_dev); + netif_tx_unlock_bh(wnd->net_dev); + } + + if (test_and_clear_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work)) + link_status_off(wnd); + + if (test_and_clear_bit(LINK_STATUS_ON, &wnd->ndis_pending_work)) + link_status_on(wnd); + + if (test_and_clear_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work)) + update_iw_stats(wnd); + + if (test_and_clear_bit(SET_MULTICAST_LIST, + &wnd->ndis_pending_work)) + set_multicast_list(wnd); + + if (test_and_clear_bit(HANGCHECK, &wnd->ndis_pending_work)) { + struct miniport *mp; + BOOLEAN reset; + KIRQL irql; + + mp = &wnd->wd->driver->ndis_driver->mp; + irql = serialize_lock_irql(wnd); + reset = LIN2WIN1(mp->hangcheck, wnd->nmb->mp_ctx); + serialize_unlock_irql(wnd, irql); + if (reset) { + TRACE2("%s needs reset", wnd->net_dev->name); + mp_reset(wnd); + } + } + WORKEXIT(return); +} + +NDIS_STATUS ndis_reinit(struct ndis_device *wnd) +{ + NDIS_STATUS status; + + wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND; + status = mp_set_power_state(wnd, NdisDeviceStateD3); + if (status != NDIS_STATUS_SUCCESS) { + ERROR("halting device %s failed: %08X", wnd->net_dev->name, + status); + return status; + } + status = mp_set_power_state(wnd, NdisDeviceStateD0); + if (status != NDIS_STATUS_SUCCESS) + ERROR("starting device %s failed: %08X", wnd->net_dev->name, + status); + return status; +} + +static void get_encryption_capa(struct ndis_device *wnd, char *buf, + const int buf_len) +{ + int i, mode; + NDIS_STATUS res; + struct ndis_assoc_info ndis_assoc_info; + struct ndis_add_key ndis_key; + struct ndis_capability *c; + + ENTER1("%p", wnd); + /* set network type to g, b, or a, in that order */ + res = mp_query(wnd, OID_802_11_NETWORK_TYPES_SUPPORTED, buf, buf_len); + if (res == NDIS_STATUS_SUCCESS) { + struct network_type_list *net_types; + unsigned long types = 0; + net_types = (typeof(net_types))buf; + for (i = 0; i < net_types->num; i++) { + TRACE2("%d", net_types->types[i]); + set_bit(net_types->types[i], &types); + } + if (types & Ndis802_11OFDM24) + mode = Ndis802_11OFDM24; + else if (types & Ndis802_11DS) + mode = Ndis802_11DS; + else if (types & Ndis802_11OFDM5) + mode = Ndis802_11OFDM5; + else + mode = Ndis802_11DS; + mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, mode); + } + /* check if WEP is supported */ + if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, + IW_AUTH_CIPHER_NONE) == 0 && + get_ndis_encr_mode(wnd) == Ndis802_11Encryption1KeyAbsent) + set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr); + + /* check if WPA is supported */ + if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPA) == 0 && + get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPA) + set_bit(Ndis802_11AuthModeWPA, &wnd->capa.encr); + else + EXIT1(return); + + if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPAPSK) == 0 && + get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPAPSK) + set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.encr); + + /* check for highest encryption */ + mode = 0; + if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_CCMP, + IW_AUTH_CIPHER_NONE) == 0 && + (i = get_ndis_encr_mode(wnd)) > 0 && + (i == Ndis802_11Encryption3KeyAbsent || + i == Ndis802_11Encryption3Enabled)) + mode = Ndis802_11Encryption3Enabled; + else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_TKIP, + IW_AUTH_CIPHER_NONE) == 0 && + (i = get_ndis_encr_mode(wnd)) > 0 && + (i == Ndis802_11Encryption2KeyAbsent || + i == Ndis802_11Encryption2Enabled)) + mode = Ndis802_11Encryption2Enabled; + else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, + IW_AUTH_CIPHER_NONE) == 0 && + (i = get_ndis_encr_mode(wnd)) > 0 && + (i == Ndis802_11Encryption1KeyAbsent || + i == Ndis802_11Encryption1Enabled)) + mode = Ndis802_11Encryption1Enabled; + + TRACE1("mode: %d", mode); + if (mode == 0) + EXIT1(return); + set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr); + if (mode == Ndis802_11Encryption1Enabled) + EXIT1(return); + + ndis_key.length = 32; + ndis_key.index = 0xC0000001; + ndis_key.struct_size = sizeof(ndis_key); + res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size); + TRACE2("%08X, %lu", res, (unsigned long)sizeof(ndis_key)); + if (res && res != NDIS_STATUS_INVALID_DATA) + EXIT1(return); + res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION, + &ndis_assoc_info, sizeof(ndis_assoc_info)); + TRACE1("%08X", res); + if (res == NDIS_STATUS_NOT_SUPPORTED) + EXIT1(return); + + set_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr); + if (mode == Ndis802_11Encryption3Enabled) + set_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr); + /* not all drivers support OID_802_11_CAPABILITY, so we don't + * know for sure if driver support WPA or WPAPSK; assume + * WPAPSK */ + set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth); + wnd->max_pmkids = 1; + + memset(buf, 0, buf_len); + c = (struct ndis_capability *)buf; + res = mp_query(wnd, OID_802_11_CAPABILITY, buf, buf_len); + if (!(res == NDIS_STATUS_SUCCESS && c->version == 2)) + EXIT1(return); + wnd->max_pmkids = c->num_PMKIDs; + + for (i = 0; i < c->num_auth_encr_pair; i++) { + struct ndis_auth_encr_pair *ae; + + ae = &c->auth_encr_pair[i]; + if ((char *)(ae + 1) > buf + buf_len) + break; + switch (ae->auth_mode) { + case Ndis802_11AuthModeOpen: + case Ndis802_11AuthModeShared: + case Ndis802_11AuthModeWPA: + case Ndis802_11AuthModeWPAPSK: + case Ndis802_11AuthModeWPANone: + case Ndis802_11AuthModeWPA2: + case Ndis802_11AuthModeWPA2PSK: + set_bit(ae->auth_mode, &wnd->capa.auth); + break; + default: + WARNING("unknown auth_mode: %d", ae->auth_mode); + break; + } + switch (ae->encr_mode) { + case Ndis802_11EncryptionDisabled: + case Ndis802_11Encryption1Enabled: + case Ndis802_11Encryption2Enabled: + case Ndis802_11Encryption3Enabled: + set_bit(ae->encr_mode, &wnd->capa.encr); + break; + default: + WARNING("unknown encr_mode: %d", ae->encr_mode); + break; + } + } + EXIT1(return); +} + +wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo, + struct irp *irp) +{ + struct ndis_device *wnd; + + TRACE3("fdo: %p", fdo); + /* for now, we don't have anything intresting here, so pass it + * down to bus driver */ + wnd = fdo->reserved; + return IoPassIrpDown(wnd->nmb->pdo, irp); +} +WIN_FUNC_DECL(NdisDispatchDeviceControl,2) + +wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp) +{ + struct io_stack_location *irp_sl; + struct ndis_device *wnd; + enum ndis_power_state state; + NTSTATUS status; + NDIS_STATUS ndis_status; + + irp_sl = IoGetCurrentIrpStackLocation(irp); + wnd = fdo->reserved; + IOTRACE("fdo: %p, fn: %d:%d, wnd: %p", fdo, irp_sl->major_fn, + irp_sl->minor_fn, wnd); + if ((irp_sl->params.power.type == SystemPowerState && + irp_sl->params.power.state.system_state > PowerSystemWorking) || + (irp_sl->params.power.type == DevicePowerState && + irp_sl->params.power.state.device_state > PowerDeviceD0)) + state = NdisDeviceStateD3; + else + state = NdisDeviceStateD0; + switch (irp_sl->minor_fn) { + case IRP_MN_SET_POWER: + if (state == NdisDeviceStateD0) { + status = IoSyncForwardIrp(wnd->nmb->pdo, irp); + if (status != STATUS_SUCCESS) + break; + ndis_status = mp_set_power_state(wnd, state); + if (ndis_status != NDIS_STATUS_SUCCESS) + WARNING("couldn't set power to %d: %08X", + state, ndis_status); + TRACE2("%s: device resumed", wnd->net_dev->name); + irp->io_status.status = status = STATUS_SUCCESS; + IoCompleteRequest(irp, IO_NO_INCREMENT); + break; + } else { + ndis_status = mp_set_power_state(wnd, state); + /* TODO: handle error case */ + if (ndis_status != NDIS_STATUS_SUCCESS) + WARNING("setting power to %d failed: %08X", + state, ndis_status); + status = IoAsyncForwardIrp(wnd->nmb->pdo, irp); + } + break; + case IRP_MN_QUERY_POWER: + if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) { + ndis_status = mp_query(wnd, OID_PNP_QUERY_POWER, + &state, sizeof(state)); + TRACE2("%d, %08X", state, ndis_status); + /* this OID must always succeed */ + if (ndis_status != NDIS_STATUS_SUCCESS) + TRACE1("query power returns %08X", ndis_status); + irp->io_status.status = STATUS_SUCCESS; + } else + irp->io_status.status = STATUS_SUCCESS; + status = IoPassIrpDown(wnd->nmb->pdo, irp); + break; + case IRP_MN_WAIT_WAKE: + case IRP_MN_POWER_SEQUENCE: + /* TODO: implement WAIT_WAKE */ + status = IoPassIrpDown(wnd->nmb->pdo, irp); + break; + default: + status = IoPassIrpDown(wnd->nmb->pdo, irp); + break; + } + IOEXIT(return status); +} +WIN_FUNC_DECL(NdisDispatchPower,2) + +wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp) +{ + struct io_stack_location *irp_sl; + struct ndis_device *wnd; + struct device_object *pdo; + NTSTATUS status; + + IOTRACE("fdo: %p, irp: %p", fdo, irp); + irp_sl = IoGetCurrentIrpStackLocation(irp); + wnd = fdo->reserved; + pdo = wnd->nmb->pdo; + switch (irp_sl->minor_fn) { + case IRP_MN_START_DEVICE: + status = IoSyncForwardIrp(pdo, irp); + if (status != STATUS_SUCCESS) + break; + if (ndis_start_device(wnd) == NDIS_STATUS_SUCCESS) + status = STATUS_SUCCESS; + else + status = STATUS_FAILURE; + irp->io_status.status = status; + IoCompleteRequest(irp, IO_NO_INCREMENT); + break; + case IRP_MN_QUERY_STOP_DEVICE: + /* TODO: implement in NDIS */ + status = IoPassIrpDown(wnd->nmb->pdo, irp); + break; + case IRP_MN_STOP_DEVICE: + mp_halt(wnd); + irp->io_status.status = STATUS_SUCCESS; + status = IoAsyncForwardIrp(pdo, irp); + break; + case IRP_MN_REMOVE_DEVICE: + TRACE1("%s", wnd->net_dev->name); + mp_pnp_event(wnd, NdisDevicePnPEventSurpriseRemoved, 0); + if (ndis_remove_device(wnd)) { + status = STATUS_FAILURE; + break; + } + /* wnd is already freed */ + status = IoAsyncForwardIrp(pdo, irp); + IoDetachDevice(fdo); + IoDeleteDevice(fdo); + break; + default: + status = IoAsyncForwardIrp(pdo, irp); + break; + } + IOTRACE("status: %08X", status); + IOEXIT(return status); +} +WIN_FUNC_DECL(NdisDispatchPnp,2) + +static void set_task_offload(struct ndis_device *wnd, void *buf, + const int buf_size) +{ + struct ndis_task_offload_header *task_offload_header; + struct ndis_task_offload *task_offload; + struct ndis_task_tcp_ip_checksum *csum = NULL; + struct ndis_task_tcp_large_send *tso = NULL; + NDIS_STATUS status; + + memset(buf, 0, buf_size); + task_offload_header = buf; + task_offload_header->version = NDIS_TASK_OFFLOAD_VERSION; + task_offload_header->size = sizeof(*task_offload_header); + task_offload_header->encap_format.flags.fixed_header_size = 1; + task_offload_header->encap_format.header_size = sizeof(struct ethhdr); + task_offload_header->encap_format.encap = IEEE_802_3_Encapsulation; + status = mp_query(wnd, OID_TCP_TASK_OFFLOAD, buf, buf_size); + TRACE1("%08X", status); + if (status != NDIS_STATUS_SUCCESS) + EXIT1(return); + if (task_offload_header->offset_first_task == 0) + EXIT1(return); + task_offload = ((void *)task_offload_header + + task_offload_header->offset_first_task); + while (1) { + TRACE1("%d, %d", task_offload->version, task_offload->task); + switch(task_offload->task) { + case TcpIpChecksumNdisTask: + csum = (void *)task_offload->task_buf; + break; + case TcpLargeSendNdisTask: + tso = (void *)task_offload->task_buf; + break; + default: + TRACE1("%d", task_offload->task); + break; + } + if (task_offload->offset_next_task == 0) + break; + task_offload = (void *)task_offload + + task_offload->offset_next_task; + } + if (tso) + TRACE1("%u, %u, %d, %d", tso->max_size, tso->min_seg_count, + tso->tcp_opts, tso->ip_opts); + if (!csum) + EXIT1(return); + TRACE1("%08x, %08x", csum->v4_tx.value, csum->v4_rx.value); + task_offload_header->encap_format.flags.fixed_header_size = 1; + task_offload_header->encap_format.header_size = sizeof(struct ethhdr); + task_offload_header->offset_first_task = sizeof(*task_offload_header); + task_offload = ((void *)task_offload_header + + task_offload_header->offset_first_task); + task_offload->offset_next_task = 0; + task_offload->size = sizeof(*task_offload); + task_offload->task = TcpIpChecksumNdisTask; + memcpy(task_offload->task_buf, csum, sizeof(*csum)); + task_offload->task_buf_length = sizeof(*csum); + status = mp_set(wnd, OID_TCP_TASK_OFFLOAD, task_offload_header, + sizeof(*task_offload_header) + + sizeof(*task_offload) + sizeof(*csum)); + TRACE1("%08X", status); + if (status != NDIS_STATUS_SUCCESS) + EXIT2(return); + wnd->tx_csum = csum->v4_tx; + if (csum->v4_tx.tcp_csum && csum->v4_tx.udp_csum) { + if (csum->v4_tx.ip_csum) { + wnd->net_dev->features |= NETIF_F_HW_CSUM; + TRACE1("hw checksum enabled"); + } else { + wnd->net_dev->features |= NETIF_F_IP_CSUM; + TRACE1("IP checksum enabled"); + } + if (wnd->sg_dma_size) + wnd->net_dev->features |= NETIF_F_SG; + } + wnd->rx_csum = csum->v4_rx; + EXIT1(return); +} + +static void get_supported_oids(struct ndis_device *wnd) +{ + NDIS_STATUS res; + int i, n, needed; + ndis_oid *oids; + + res = mp_query_info(wnd, OID_GEN_SUPPORTED_LIST, NULL, 0, NULL, + &needed); + if (!(res == NDIS_STATUS_BUFFER_TOO_SHORT || + res == NDIS_STATUS_INVALID_LENGTH)) + EXIT1(return); + oids = kmalloc(needed, GFP_KERNEL); + if (!oids) { + TRACE1("couldn't allocate memory"); + EXIT1(return); + } + res = mp_query(wnd, OID_GEN_SUPPORTED_LIST, oids, needed); + if (res) { + TRACE1("failed: %08X", res); + kfree(oids); + EXIT1(return); + } + for (i = 0, n = needed / sizeof(*oids); i < n; i++) { + TRACE1("oid: %08X", oids[i]); + /* if a wireless device didn't say so for + * OID_GEN_PHYSICAL_MEDIUM (they should, but in case) */ + if (wnd->physical_medium != NdisPhysicalMediumWirelessLan && + oids[i] == OID_802_11_SSID) + wnd->physical_medium = NdisPhysicalMediumWirelessLan; + } + kfree(oids); + EXIT1(return); +} + +static void ndis_get_drvinfo(struct net_device *dev, + struct ethtool_drvinfo *info) +{ + struct ndis_device *wnd = netdev_priv(dev); + strncpy(info->driver, DRIVER_NAME, sizeof(info->driver) - 2); + strcat(info->driver, "+"); + strncat(info->driver, wnd->wd->driver->name, + sizeof(info->driver) - strlen(DRIVER_NAME) - 1); + strncpy(info->version, DRIVER_VERSION, sizeof(info->version) - 2); + strcat(info->version, "+"); + strncat(info->version, wnd->wd->driver->version, + sizeof(info->version) - strlen(DRIVER_VERSION) - 1); + if (wrap_is_pci_bus(wnd->wd->dev_bus)) + strncpy(info->bus_info, pci_name(wnd->wd->pci.pdev), + sizeof(info->bus_info) - 1); +#ifdef ENABLE_USB + else + usb_make_path(wnd->wd->usb.udev, info->bus_info, + sizeof(info->bus_info) - 1); +#endif + return; +} + +static u32 ndis_get_link(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + return netif_carrier_ok(wnd->net_dev); +} + +static void ndis_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) +{ + struct ndis_device *wnd = netdev_priv(dev); + + wol->supported = 0; + wol->wolopts = 0; + if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND)) + EXIT2(return); + if (!wrap_is_pci_bus(wnd->wd->dev_bus)) + EXIT2(return); + /* we always suspend to D3 */ + if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3) + return; + wol->supported |= WAKE_MAGIC; + if (wnd->ndis_wolopts & NDIS_PNP_WAKE_UP_MAGIC_PACKET) + wol->wolopts |= WAKE_MAGIC; + return; +} + +static int ndis_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) +{ + struct ndis_device *wnd = netdev_priv(dev); + + if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND)) + return -EOPNOTSUPP; + if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3) + EXIT2(return -EOPNOTSUPP); + TRACE2("0x%x", wol->wolopts); + if (wol->wolopts & WAKE_MAGIC) { + wnd->ndis_wolopts |= NDIS_PNP_WAKE_UP_MAGIC_PACKET; + if (wol->wolopts != WAKE_MAGIC) + WARNING("ignored wake-on-lan options: 0x%x", + wol->wolopts & ~WAKE_MAGIC); + } else if (!wol->wolopts) + wnd->ndis_wolopts = 0; + else + return -EOPNOTSUPP; + TRACE2("0x%x", wnd->ndis_wolopts); + return 0; +} + +static u32 ndis_get_tx_csum(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + if (wnd->tx_csum.tcp_csum && wnd->tx_csum.udp_csum) + return 1; + else + return 0; +} + +static u32 ndis_get_rx_csum(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + if (wnd->rx_csum.value) + return 1; + else + return 0; +} + +static int ndis_set_tx_csum(struct net_device *dev, u32 data) +{ + struct ndis_device *wnd = netdev_priv(dev); + + if (data && (wnd->tx_csum.value == 0)) + return -EOPNOTSUPP; + + if (wnd->tx_csum.ip_csum) + ethtool_op_set_tx_hw_csum(dev, data); + else + ethtool_op_set_tx_csum(dev, data); + return 0; +} + +static int ndis_set_rx_csum(struct net_device *dev, u32 data) +{ + struct ndis_device *wnd = netdev_priv(dev); + + if (data && (wnd->tx_csum.value == 0)) + return -EOPNOTSUPP; + + /* TODO: enable/disable rx csum through NDIS */ + return 0; +} + +static u32 ndis_get_sg(struct net_device *dev) +{ + struct ndis_device *wnd = netdev_priv(dev); + if (wnd->sg_dma_size) + return ethtool_op_get_sg(dev); + else + return 0; +} + +static int ndis_set_sg(struct net_device *dev, u32 data) +{ + struct ndis_device *wnd = netdev_priv(dev); + if (wnd->sg_dma_size) + return ethtool_op_set_sg(dev, data); + else + return -EOPNOTSUPP; +} + +static struct ethtool_ops ndis_ethtool_ops = { + .get_drvinfo = ndis_get_drvinfo, + .get_link = ndis_get_link, + .get_wol = ndis_get_wol, + .set_wol = ndis_set_wol, + .get_tx_csum = ndis_get_tx_csum, + .get_rx_csum = ndis_get_rx_csum, + .set_tx_csum = ndis_set_tx_csum, + .set_rx_csum = ndis_set_rx_csum, + .get_sg = ndis_get_sg, + .set_sg = ndis_set_sg, +}; + +static int notifier_event(struct notifier_block *notifier, unsigned long event, + void *ptr) +{ + struct net_device *net_dev = ptr; + + ENTER2("0x%lx", event); + if (net_dev->ethtool_ops == &ndis_ethtool_ops + && event == NETDEV_CHANGENAME) { + struct ndis_device *wnd = netdev_priv(net_dev); + /* called with rtnl lock held, so no need to lock */ + wrap_procfs_remove_ndis_device(wnd); + printk(KERN_INFO "%s: changing interface name from '%s' to " + "'%s'\n", DRIVER_NAME, wnd->netdev_name, net_dev->name); + memcpy(wnd->netdev_name, net_dev->name, + sizeof(wnd->netdev_name)); + wrap_procfs_add_ndis_device(wnd); + } + return NOTIFY_DONE; +} + +static struct notifier_block netdev_notifier = { + .notifier_call = notifier_event, +}; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) +static const struct net_device_ops ndis_netdev_ops = { + .ndo_open = ndis_net_dev_open, + .ndo_stop = ndis_net_dev_close, + .ndo_start_xmit = tx_skbuff, + .ndo_change_mtu = ndis_change_mtu, + .ndo_set_multicast_list = ndis_set_multicast_list, + .ndo_set_mac_address = ndis_set_mac_address, + .ndo_get_stats = ndis_get_stats, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = ndis_poll_controller, +#endif +}; +#endif + +static NDIS_STATUS ndis_start_device(struct ndis_device *wnd) +{ + struct wrap_device *wd; + struct net_device *net_dev; + NDIS_STATUS status; + char *buf; + const int buf_len = 256; + mac_address mac; + struct transport_header_offset *tx_header_offset; + int n; + + ENTER2("%d", in_atomic()); + status = mp_init(wnd); + if (status == NDIS_STATUS_NOT_RECOGNIZED) + EXIT1(return NDIS_STATUS_SUCCESS); + if (status != NDIS_STATUS_SUCCESS) + EXIT1(return status); + wd = wnd->wd; + net_dev = wnd->net_dev; + + get_supported_oids(wnd); + memset(mac, 0, sizeof(mac)); + status = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac)); + if (memcmp(mac, "\x00\x00\x00\x00\x00\x00", sizeof(mac)) == 0) { + status = mp_query(wnd, OID_802_3_PERMANENT_ADDRESS, mac, + sizeof(mac)); + if (status != NDIS_STATUS_SUCCESS) { + ERROR("couldn't get mac address: %08X", status); + goto err_start; + } + } + TRACE1("mac:" MACSTRSEP, MAC2STR(mac)); + memcpy(net_dev->dev_addr, mac, ETH_ALEN); + + strncpy(net_dev->name, if_name, IFNAMSIZ - 1); + net_dev->name[IFNAMSIZ - 1] = 0; + + wnd->packet_filter = NDIS_PACKET_TYPE_DIRECTED | + NDIS_PACKET_TYPE_BROADCAST | NDIS_PACKET_TYPE_MULTICAST; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) + net_dev->netdev_ops = &ndis_netdev_ops; +#else + net_dev->open = ndis_net_dev_open; + net_dev->hard_start_xmit = tx_skbuff; + net_dev->stop = ndis_net_dev_close; + net_dev->get_stats = ndis_get_stats; + net_dev->change_mtu = ndis_change_mtu; + net_dev->set_multicast_list = ndis_set_multicast_list; + net_dev->set_mac_address = ndis_set_mac_address; +#ifdef CONFIG_NET_POLL_CONTROLLER + net_dev->poll_controller = ndis_poll_controller; +#endif +#endif + if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { + net_dev->wireless_handlers = &ndis_handler_def; + } + net_dev->ethtool_ops = &ndis_ethtool_ops; + if (wnd->mp_interrupt) + net_dev->irq = wnd->mp_interrupt->irq; + net_dev->mem_start = wnd->mem_start; + net_dev->mem_end = wnd->mem_end; + status = mp_query_int(wnd, OID_802_3_MAXIMUM_LIST_SIZE, + &wnd->multicast_size); + if (status != NDIS_STATUS_SUCCESS || wnd->multicast_size < 0) + wnd->multicast_size = 0; + if (wnd->multicast_size > 0) + net_dev->flags |= IFF_MULTICAST; + else + net_dev->flags &= ~IFF_MULTICAST; + + buf = kmalloc(buf_len, GFP_KERNEL); + if (!buf) { + WARNING("couldn't allocate memory"); + goto err_start; + } + + set_task_offload(wnd, buf, buf_len); +#ifdef NETIF_F_LLTX + net_dev->features |= NETIF_F_LLTX; +#endif + + if (register_netdev(net_dev)) { + ERROR("cannot register net device %s", net_dev->name); + goto err_register; + } + memcpy(wnd->netdev_name, net_dev->name, sizeof(wnd->netdev_name)); + memset(buf, 0, buf_len); + status = mp_query(wnd, OID_GEN_VENDOR_DESCRIPTION, buf, buf_len); + if (status != NDIS_STATUS_SUCCESS) { + WARNING("couldn't get vendor information: 0x%x", status); + buf[0] = 0; + } + wnd->drv_ndis_version = n = 0; + mp_query_int(wnd, OID_GEN_DRIVER_VERSION, &wnd->drv_ndis_version); + mp_query_int(wnd, OID_GEN_VENDOR_DRIVER_VERSION, &n); + + printk(KERN_INFO "%s: ethernet device " MACSTRSEP " using %sNDIS " + "driver: %s, version: 0x%x, NDIS version: 0x%x, vendor: '%s', " + "%s\n", net_dev->name, MAC2STR(net_dev->dev_addr), + deserialized_driver(wnd) ? "" : "serialized ", + wnd->wd->driver->name, n, wnd->drv_ndis_version, buf, + wnd->wd->conf_file_name); + + if (deserialized_driver(wnd)) { + /* deserialized drivers don't have a limit, but we + * keep max at TX_RING_SIZE */ + wnd->max_tx_packets = TX_RING_SIZE; + } else { + status = mp_query_int(wnd, OID_GEN_MAXIMUM_SEND_PACKETS, + &wnd->max_tx_packets); + if (status != NDIS_STATUS_SUCCESS) + wnd->max_tx_packets = 1; + if (wnd->max_tx_packets > TX_RING_SIZE) + wnd->max_tx_packets = TX_RING_SIZE; + } + TRACE2("maximum send packets: %d", wnd->max_tx_packets); + NdisAllocatePacketPoolEx(&status, &wnd->tx_packet_pool, + wnd->max_tx_packets, 0, + PROTOCOL_RESERVED_SIZE_IN_PACKET); + if (status != NDIS_STATUS_SUCCESS) { + ERROR("couldn't allocate packet pool"); + goto packet_pool_err; + } + NdisAllocateBufferPool(&status, &wnd->tx_buffer_pool, + wnd->max_tx_packets + 4); + if (status != NDIS_STATUS_SUCCESS) { + ERROR("couldn't allocate buffer pool"); + goto buffer_pool_err; + } + TRACE1("pool: %p", wnd->tx_buffer_pool); + + if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &n) == + NDIS_STATUS_SUCCESS && n > ETH_HLEN) + ndis_change_mtu(wnd->net_dev, n - ETH_HLEN); + + if (mp_query_int(wnd, OID_GEN_MAC_OPTIONS, &n) == NDIS_STATUS_SUCCESS) + TRACE2("mac options supported: 0x%x", n); + + tx_header_offset = (typeof(tx_header_offset))buf; + tx_header_offset->protocol_type = NDIS_PROTOCOL_ID_TCP_IP; + tx_header_offset->header_offset = sizeof(ETH_HLEN); + status = mp_set(wnd, OID_GEN_TRANSPORT_HEADER_OFFSET, + tx_header_offset, sizeof(*tx_header_offset)); + TRACE2("%08X", status); + + status = mp_query_int(wnd, OID_GEN_PHYSICAL_MEDIUM, + &wnd->physical_medium); + if (status != NDIS_STATUS_SUCCESS) + wnd->physical_medium = NdisPhysicalMediumUnspecified; + + if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) { + mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF); + get_encryption_capa(wnd, buf, buf_len); + TRACE1("capbilities = %ld", wnd->capa.encr); + printk(KERN_INFO "%s: encryption modes supported: " + "%s%s%s%s%s%s%s\n", net_dev->name, + test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ? + "WEP" : "none", + + test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ? + "; TKIP with WPA" : "", + test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? + ", WPA2" : "", + test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? + ", WPA2PSK" : "", + + test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ? + "; AES/CCMP with WPA" : "", + test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ? + ", WPA2" : "", + test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ? + ", WPA2PSK" : ""); + + set_default_iw_params(wnd); + } + status = mp_query_int(wnd, OID_GEN_MEDIA_CONNECT_STATUS, (int *)buf); + if (status == NDIS_STATUS_SUCCESS) + set_media_state(wnd, *((int *)buf)); + kfree(buf); + wrap_procfs_add_ndis_device(wnd); + hangcheck_add(wnd); + add_iw_stats_timer(wnd); + EXIT1(return NDIS_STATUS_SUCCESS); + +buffer_pool_err: + wnd->tx_buffer_pool = NULL; + if (wnd->tx_packet_pool) { + NdisFreePacketPool(wnd->tx_packet_pool); + wnd->tx_packet_pool = NULL; + } +packet_pool_err: +err_register: + kfree(buf); +err_start: + ndis_remove_device(wnd); + EXIT1(return NDIS_STATUS_FAILURE); +} + +static int ndis_remove_device(struct ndis_device *wnd) +{ + s8 tx_pending; + + /* prevent setting essid during disassociation */ + memset(&wnd->essid, 0, sizeof(wnd->essid)); + wnd->tx_ok = 0; + if (wnd->max_tx_packets) + unregister_netdev(wnd->net_dev); + netif_carrier_off(wnd->net_dev); + /* if device is suspended, but resume failed, tx_ring_mutex + * may already be locked */ + if (down_trylock(&wnd->tx_ring_mutex)) + WARNING("couldn't obtain tx_ring_mutex"); + spin_lock_bh(&wnd->tx_ring_lock); + tx_pending = wnd->tx_ring_end - wnd->tx_ring_start; + if (tx_pending < 0) + tx_pending += TX_RING_SIZE; + else if (tx_pending == 0 && wnd->is_tx_ring_full) + tx_pending = TX_RING_SIZE - 1; + wnd->is_tx_ring_full = 0; + /* throw away pending packets */ + while (tx_pending-- > 0) { + struct ndis_packet *packet; + + packet = wnd->tx_ring[wnd->tx_ring_start]; + free_tx_packet(wnd, packet, NDIS_STATUS_CLOSING); + wnd->tx_ring_start = (wnd->tx_ring_start + 1) % TX_RING_SIZE; + } + spin_unlock_bh(&wnd->tx_ring_lock); + up(&wnd->tx_ring_mutex); + wrap_procfs_remove_ndis_device(wnd); + mp_halt(wnd); + ndis_exit_device(wnd); + + if (wnd->tx_packet_pool) { + NdisFreePacketPool(wnd->tx_packet_pool); + wnd->tx_packet_pool = NULL; + } + if (wnd->tx_buffer_pool) { + NdisFreeBufferPool(wnd->tx_buffer_pool); + wnd->tx_buffer_pool = NULL; + } + if (wnd->pmkids) + kfree(wnd->pmkids); + printk(KERN_INFO "%s: device %s removed\n", DRIVER_NAME, + wnd->net_dev->name); + kfree(wnd->nmb); + free_netdev(wnd->net_dev); + EXIT2(return 0); +} + +static wstdcall NTSTATUS NdisAddDevice(struct driver_object *drv_obj, + struct device_object *pdo) +{ + struct device_object *fdo; + struct ndis_mp_block *nmb; + NTSTATUS status; + struct ndis_device *wnd; + struct net_device *net_dev; + struct wrap_device *wd; + unsigned long i; + + ENTER2("%p, %p", drv_obj, pdo); + if (strlen(if_name) >= IFNAMSIZ) { + ERROR("interface name '%s' is too long", if_name); + return STATUS_INVALID_PARAMETER; + } + net_dev = alloc_etherdev(sizeof(*wnd)); + if (!net_dev) { + ERROR("couldn't allocate device"); + return STATUS_RESOURCES; + } + wd = pdo->reserved; + if (wrap_is_pci_bus(wd->dev_bus)) + SET_NETDEV_DEV(net_dev, &wd->pci.pdev->dev); + if (wrap_is_usb_bus(wd->dev_bus)) + SET_NETDEV_DEV(net_dev, &wd->usb.intf->dev); + status = IoCreateDevice(drv_obj, 0, NULL, FILE_DEVICE_UNKNOWN, 0, + FALSE, &fdo); + if (status != STATUS_SUCCESS) { + free_netdev(net_dev); + EXIT2(return status); + } + wnd = netdev_priv(net_dev); + TRACE1("wnd: %p", wnd); + + nmb = kmalloc(sizeof(*nmb), GFP_KERNEL); + if (!nmb) { + WARNING("couldn't allocate memory"); + IoDeleteDevice(fdo); + free_netdev(net_dev); + return STATUS_RESOURCES; + } +#if defined(DEBUG) && DEBUG >= 6 + /* poison nmb so if a driver accesses uninitialized pointers, we + * know what it is */ + for (i = 0; i < sizeof(*nmb) / sizeof(unsigned long); i++) + ((unsigned long *)nmb)[i] = i + 0x8a3fc1; +#endif + + wnd->nmb = nmb; + nmb->wnd = wnd; + nmb->pdo = pdo; + wd->wnd = wnd; + wnd->wd = wd; + wnd->net_dev = net_dev; + fdo->reserved = wnd; + nmb->fdo = fdo; + if (ndis_init_device(wnd)) { + IoDeleteDevice(fdo); + kfree(nmb); + free_netdev(net_dev); + EXIT1(return STATUS_RESOURCES); + } + nmb->next_device = IoAttachDeviceToDeviceStack(fdo, pdo); + spin_lock_init(&wnd->tx_ring_lock); + init_MUTEX(&wnd->tx_ring_mutex); + init_MUTEX(&wnd->ndis_req_mutex); + wnd->ndis_req_done = 0; + initialize_work(&wnd->tx_work, tx_worker, wnd); + wnd->tx_ring_start = 0; + wnd->tx_ring_end = 0; + wnd->is_tx_ring_full = 0; + wnd->capa.encr = 0; + wnd->capa.auth = 0; + wnd->attributes = 0; + wnd->dma_map_count = 0; + wnd->dma_map_addr = NULL; + wnd->nick[0] = 0; + init_timer(&wnd->hangcheck_timer); + wnd->scan_timestamp = 0; + init_timer(&wnd->iw_stats_timer); + wnd->iw_stats_interval = 10 * HZ; + wnd->ndis_pending_work = 0; + memset(&wnd->essid, 0, sizeof(wnd->essid)); + memset(&wnd->encr_info, 0, sizeof(wnd->encr_info)); + wnd->infrastructure_mode = Ndis802_11Infrastructure; + initialize_work(&wnd->ndis_work, ndis_worker, wnd); + wnd->iw_stats_enabled = TRUE; + + TRACE1("nmb: %p, pdo: %p, fdo: %p, attached: %p, next: %p", + nmb, pdo, fdo, fdo->attached, nmb->next_device); + + /* dispatch routines are called as Windows functions */ + for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++) + drv_obj->major_func[i] = WIN_FUNC_PTR(IoPassIrpDown,2); + + drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(NdisDispatchPnp,2); + drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(NdisDispatchPower,2); + drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] = + WIN_FUNC_PTR(NdisDispatchDeviceControl,2); +// drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] = +// WIN_FUNC_PTR(NdisDispatchDeviceControl,2); + EXIT2(return STATUS_SUCCESS); +} + +int init_ndis_driver(struct driver_object *drv_obj) +{ + ENTER1("%p", drv_obj); + drv_obj->drv_ext->add_device = NdisAddDevice; + return 0; +} + +int wrapndis_init(void) +{ + wrapndis_wq = create_singlethread_workqueue("wrapndis_wq"); + if (!wrapndis_wq) + EXIT1(return -ENOMEM); + wrapndis_worker_thread = wrap_worker_init(wrapndis_wq); + TRACE1("%p", wrapndis_worker_thread); + register_netdevice_notifier(&netdev_notifier); + return 0; +} + +void wrapndis_exit(void) +{ + unregister_netdevice_notifier(&netdev_notifier); + if (wrapndis_wq) + destroy_workqueue(wrapndis_wq); + TRACE1("%p", wrapndis_worker_thread); + if (wrapndis_worker_thread) + ObDereferenceObject(wrapndis_worker_thread); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapper.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapper.h @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef WRAPPER_H +#define WRAPPER_H + +extern char *if_name; +extern int proc_uid; +extern int proc_gid; +extern int hangcheck_interval; + +#endif /* WRAPPER_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/usb.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/usb.h @@ -0,0 +1,376 @@ +/* + * Copyright (C) 2004 Jan Kiszka + * Copyright (C) 2005 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _USB_H_ +#define _USB_H_ + +#include "ntoskernel.h" + +#define IOCTL_INTERNAL_USB_SUBMIT_URB 0x00220003 +#define IOCTL_INTERNAL_USB_RESET_PORT 0x00220007 +#define IOCTL_INTERNAL_USB_GET_PORT_STATUS 0x00220013 +#define IOCTL_INTERNAL_USB_CYCLE_PORT 0x0022001F +#define IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION 0x00220027 + +#define URB_FUNCTION_SELECT_CONFIGURATION 0x0000 +#define URB_FUNCTION_SELECT_INTERFACE 0x0001 +#define URB_FUNCTION_ABORT_PIPE 0x0002 +#define URB_FUNCTION_TAKE_FRAME_LENGTH_CONTROL 0x0003 +#define URB_FUNCTION_RELEASE_FRAME_LENGTH_CONTROL 0x0004 +#define URB_FUNCTION_GET_FRAME_LENGTH 0x0005 +#define URB_FUNCTION_SET_FRAME_LENGTH 0x0006 +#define URB_FUNCTION_GET_CURRENT_FRAME_NUMBER 0x0007 +#define URB_FUNCTION_CONTROL_TRANSFER 0x0008 +#define URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER 0x0009 +#define URB_FUNCTION_ISOCH_TRANSFER 0x000A +#define URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE 0x000B +#define URB_FUNCTION_SET_DESCRIPTOR_TO_DEVICE 0x000C +#define URB_FUNCTION_SET_FEATURE_TO_DEVICE 0x000D +#define URB_FUNCTION_SET_FEATURE_TO_INTERFACE 0x000E +#define URB_FUNCTION_SET_FEATURE_TO_ENDPOINT 0x000F +#define URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE 0x0010 +#define URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE 0x0011 +#define URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT 0x0012 +#define URB_FUNCTION_GET_STATUS_FROM_DEVICE 0x0013 +#define URB_FUNCTION_GET_STATUS_FROM_INTERFACE 0x0014 +#define URB_FUNCTION_GET_STATUS_FROM_ENDPOINT 0x0015 +#define URB_FUNCTION_RESERVED_0X0016 0x0016 +#define URB_FUNCTION_VENDOR_DEVICE 0x0017 +#define URB_FUNCTION_VENDOR_INTERFACE 0x0018 +#define URB_FUNCTION_VENDOR_ENDPOINT 0x0019 +#define URB_FUNCTION_CLASS_DEVICE 0x001A +#define URB_FUNCTION_CLASS_INTERFACE 0x001B +#define URB_FUNCTION_CLASS_ENDPOINT 0x001C +#define URB_FUNCTION_RESERVE_0X001D 0x001D +#define URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL 0x001E +#define URB_FUNCTION_CLASS_OTHER 0x001F +#define URB_FUNCTION_VENDOR_OTHER 0x0020 +#define URB_FUNCTION_GET_STATUS_FROM_OTHER 0x0021 +#define URB_FUNCTION_CLEAR_FEATURE_TO_OTHER 0x0022 +#define URB_FUNCTION_SET_FEATURE_TO_OTHER 0x0023 +#define URB_FUNCTION_GET_DESCRIPTOR_FROM_ENDPOINT 0x0024 +#define URB_FUNCTION_SET_DESCRIPTOR_TO_ENDPOINT 0x0025 +#define URB_FUNCTION_GET_CONFIGURATION 0x0026 +#define URB_FUNCTION_GET_INTERFACE 0x0027 +#define URB_FUNCTION_GET_DESCRIPTOR_FROM_INTERFACE 0x0028 +#define URB_FUNCTION_SET_DESCRIPTOR_TO_INTERFACE 0x0029 +#define URB_FUNCTION_GET_MS_FEATURE_DESCRIPTOR 0x002A +#define URB_FUNCTION_RESERVE_0X002B 0x002B +#define URB_FUNCTION_RESERVE_0X002C 0x002C +#define URB_FUNCTION_RESERVE_0X002D 0x002D +#define URB_FUNCTION_RESERVE_0X002E 0x002E +#define URB_FUNCTION_RESERVE_0X002F 0x002F +// USB 2.0 calls start at 0x0030 +#define URB_FUNCTION_SYNC_RESET_PIPE 0x0030 +#define URB_FUNCTION_SYNC_CLEAR_STALL 0x0031 +#define URB_FUNCTION_CONTROL_TRANSFER_EX 0x0032 + +#define USBD_PF_CHANGE_MAX_PACKET 0x00000001 + +#define USBD_TRANSFER_DIRECTION_OUT 0 +#define USBD_TRANSFER_DIRECTION_IN 1 + +#define USBD_SHORT_TRANSFER_OK 0x00000002 +#define USBD_START_ISO_TRANSFER_ASAP 0x00000004 +#define USBD_DEFAULT_PIPE_TRANSFER 0x00000008 + +#define USBD_TRANSFER_DIRECTION(flags) \ + ((flags) & USBD_TRANSFER_DIRECTION_IN) + +enum pipe_type {UsbdPipeTypeControl = USB_ENDPOINT_XFER_CONTROL, + UsbdPipeTypeIsochronous = USB_ENDPOINT_XFER_ISOC, + UsbdPipeTypeBulk = USB_ENDPOINT_XFER_BULK, + UsbdPipeTypeInterrupt = USB_ENDPOINT_XFER_INT}; + +#define USBD_IS_BULK_PIPE(pipe_handle) \ + (((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) \ + == USB_ENDPOINT_XFER_BULK) + +#define USBD_IS_INT_PIPE(pipe_handle) \ + (((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) \ + == USB_ENDPOINT_XFER_INT) + +#define USBD_PORT_ENABLED 0x00000001 +#define USBD_PORT_CONNECTED 0x00000002 + +typedef LONG USBD_STATUS; + +#define USBD_STATUS_SUCCESS 0x0 +#define USBD_STATUS_PENDING 0x40000000 +#define USBD_STATUS_CANCELED 0x00010000 + +#define USBD_STATUS_CRC 0xC0000001 +#define USBD_STATUS_BTSTUFF 0xC0000002 +#define USBD_STATUS_DATA_TOGGLE_MISMATCH 0xC0000003 +#define USBD_STATUS_STALL_PID 0xC0000004 +#define USBD_STATUS_DEV_NOT_RESPONDING 0xC0000005 +#define USBD_STATUS_PID_CHECK_FAILURE 0xC0000006 +#define USBD_STATUS_UNEXPECTED_PID 0xC0000007 +#define USBD_STATUS_DATA_OVERRUN 0xC0000008 +#define USBD_STATUS_DATA_UNDERRUN 0xC0000009 +#define USBD_STATUS_RESERVED1 0xC000000A +#define USBD_STATUS_RESERVED2 0xC000000B +#define USBD_STATUS_BUFFER_OVERRUN 0xC000000C +#define USBD_STATUS_BUFFER_UNDERRUN 0xC000000D +#define USBD_STATUS_NOT_ACCESSED 0xC000000F +#define USBD_STATUS_FIFO 0xC0000010 +#define USBD_STATUS_XACT_ERROR 0xC0000011 +#define USBD_STATUS_BABBLE_DETECTED 0xC0000012 +#define USBD_STATUS_DATA_BUFFER_ERROR 0xC0000013 + +#define USBD_STATUS_NOT_SUPPORTED 0xC0000E00 +#define USBD_STATUS_BUFFER_TOO_SMALL 0xC0003000 +#define USBD_STATUS_TIMEOUT 0xC0006000 +#define USBD_STATUS_DEVICE_GONE 0xC0007000 + +#define USBD_STATUS_NO_MEMORY 0x80000100 +#define USBD_STATUS_INVALID_URB_FUNCTION 0x80000200 +#define USBD_STATUS_INVALID_PARAMETER 0x80000300 +#define USBD_STATUS_REQUEST_FAILED 0x80000500 +#define USBD_STATUS_INVALID_PIPE_HANDLE 0x80000600 +#define USBD_STATUS_ERROR_SHORT_TRANSFER 0x80000900 + +#define USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE PAGE_SIZE + +struct urb_hcd_area { + void *reserved8[8]; +}; + +typedef struct usb_endpoint_descriptor *usbd_pipe_handle; +typedef struct usb_descriptor_header usb_common_descriptor_t; + +struct usbd_pipe_information { + USHORT wMaxPacketSize; + UCHAR bEndpointAddress; + UCHAR bInterval; + enum pipe_type type; + usbd_pipe_handle handle; + ULONG max_tx_size; + ULONG flags; +}; + +struct usbd_interface_information { + USHORT bLength; + UCHAR bInterfaceNumber; + UCHAR bAlternateSetting; + UCHAR bInterfaceClass; + UCHAR bInterfaceSubClass; + UCHAR bInterfaceProtocol; + UCHAR reserved; + void *handle; + ULONG bNumEndpoints; + struct usbd_pipe_information pipes[1]; +}; + +struct usbd_interface_list_entry { + struct usb_interface_descriptor *intf_desc; + struct usbd_interface_information *intf; +}; + +struct nt_urb_header { + USHORT length; + USHORT function; + USBD_STATUS status; + void *usbd_dev_handle; + ULONG usbd_flags; +}; + +struct usbd_select_interface { + struct nt_urb_header header; + void *handle; + struct usbd_interface_information intf; +}; + +struct usbd_select_configuration { + struct nt_urb_header header; + struct usb_config_descriptor *config; + void *handle; + struct usbd_interface_information intf; +}; + +struct usbd_control_descriptor_request { + struct nt_urb_header header; + void *reserved; + ULONG reserved0; + ULONG transfer_buffer_length; + void *transfer_buffer; + struct mdl *mdl; + union nt_urb *urb_link; + struct urb_hcd_area hca; + USHORT reserved1; + UCHAR index; + UCHAR desc_type; + USHORT language_id; + USHORT reserved2; +}; + +struct usbd_bulk_or_intr_transfer { + struct nt_urb_header header; + usbd_pipe_handle pipe_handle; + ULONG transfer_flags; + ULONG transfer_buffer_length; + void *transfer_buffer; + struct mdl *mdl; + union nt_urb *urb_link; + struct urb_hcd_area hca; +}; + +struct usbd_pipe_request { + struct nt_urb_header header; + usbd_pipe_handle pipe_handle; +}; + +struct usbd_vendor_or_class_request { + struct nt_urb_header header; + void *reserved; + ULONG transfer_flags; + ULONG transfer_buffer_length; + void *transfer_buffer; + struct mdl *mdl; + union nt_urb *link; + struct urb_hcd_area hca; + UCHAR reserved_bits; + UCHAR request; + USHORT value; + USHORT index; + USHORT reserved1; +}; + +struct urb_control_feature_request { + struct nt_urb_header header; + void *reserved; + ULONG reserved2; + ULONG reserved3; + void *reserved4; + struct mdl *reserved5; + union nt_urb *link; + struct urb_hcd_area hca; + USHORT reserved0; + USHORT feature_selector; + USHORT index; + USHORT reserved1; +}; + +struct urb_control_get_status_request { + struct nt_urb_header header; + void *reserved; + ULONG reserved0; + ULONG transfer_buffer_length; + void *transfer_buffer; + struct mdl *mdl; + union nt_urb *link; + struct urb_hcd_area hca; + UCHAR reserved1[4]; + USHORT index; + USHORT reserved2; +}; + +struct usbd_iso_packet_desc { + ULONG offset; + ULONG length; + USBD_STATUS status; +}; + +struct usbd_isochronous_transfer { + struct nt_urb_header header; + usbd_pipe_handle pipe_handle; + ULONG transfer_flags; + ULONG transfer_buffer_length; + void *transfer_buffer; + struct mdl *mdl; + union nt_urb *urb_link; + struct urb_hcd_area hca; + ULONG start_frame; + ULONG number_of_packets; + ULONG error_count; + struct usbd_iso_packet_desc iso_packet[1]; +}; + +union nt_urb { + struct nt_urb_header header; + struct usbd_select_interface select_intf; + struct usbd_select_configuration select_conf; + struct usbd_bulk_or_intr_transfer bulk_int_transfer; + struct usbd_control_descriptor_request control_desc; + struct usbd_vendor_or_class_request vendor_class_request; + struct usbd_isochronous_transfer isochronous; + struct usbd_pipe_request pipe_req; + struct urb_control_feature_request feat_req; + struct urb_control_get_status_request status_req; +}; + +struct usbd_bus_interface_usbdi { + USHORT Size; + USHORT Version; + void *Context; + void *InterfaceReference; + void *InterfaceDereference; + void *GetUSBDIVersion; + void *QueryBusTime; + void *SubmitIsoOutUrb; + void *QueryBusInformation; + /* version 1 and above have following field */ + void *IsDeviceHighSpeed; + /* version 2 (and above) have following field */ + void *LogEntry; +}; + +struct usbd_bus_information_level { + ULONG TotalBandwidth; + ULONG ConsumedBandwidth; + /* level 1 and above have following fields */ + ULONG ControllerNameLength; + wchar_t ControllerName[1]; +}; + +#define USBDI_VERSION_XP 0x00000500 // Windows XP +#define USB_HCD_CAPS_SUPPORTS_RT_THREADS 0x00000001 +#define USB_BUSIF_USBDI_VERSION_0 0x0000 +#define USB_BUSIF_USBDI_VERSION_1 0x0001 +#define USB_BUSIF_USBDI_VERSION_2 0x0002 + +struct usbd_version_info { + ULONG usbdi_version; + ULONG supported_usb_version; +}; + +struct usbd_idle_callback { + void *callback; + void *context; +}; + +#define NT_URB_STATUS(nt_urb) ((nt_urb)->header.status) + +NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp); +void wrap_suspend_urbs(struct wrap_device *wd); +void wrap_resume_urbs(struct wrap_device *wd); + +void USBD_InterfaceGetUSBDIVersion(void *context, + struct usbd_version_info *version_info, + ULONG *hcd_capa) wstdcall; +BOOLEAN USBD_InterfaceIsDeviceHighSpeed(void *context) wstdcall; +void USBD_InterfaceReference(void *context) wstdcall; +void USBD_InterfaceDereference(void *context) wstdcall; +NTSTATUS USBD_InterfaceQueryBusTime(void *context, ULONG *frame) wstdcall; +NTSTATUS USBD_InterfaceSubmitIsoOutUrb(void *context, + union nt_urb *nt_urb) wstdcall; +NTSTATUS USBD_InterfaceQueryBusInformation(void *context, ULONG level, void *buf, + ULONG *buf_length, + ULONG *buf_actual_length) wstdcall; +NTSTATUS USBD_InterfaceLogEntry(void *context, ULONG driver_tag, ULONG enum_tag, + ULONG p1, ULONG p2) wstdcall; + +#endif /* USB_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/winnt_types.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/winnt_types.h @@ -0,0 +1,1702 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _WINNT_TYPES_H_ +#define _WINNT_TYPES_H_ + +#define TRUE 1 +#define FALSE 0 + +#define PASSIVE_LEVEL 0 +#define APC_LEVEL 1 +#define DISPATCH_LEVEL 2 +#define DEVICE_LEVEL_BASE 4 + +/* soft interrupts / bottom-half's are disabled at SOFT_IRQL */ +#define SOFT_IRQL (DEVICE_LEVEL_BASE + 1) +#define DIRQL (DEVICE_LEVEL_BASE + 2) + +#define STATUS_WAIT_0 0 +#define STATUS_SUCCESS 0 +#define STATUS_ALERTED 0x00000101 +#define STATUS_TIMEOUT 0x00000102 +#define STATUS_PENDING 0x00000103 +#define STATUS_FAILURE 0xC0000001 +#define STATUS_NOT_IMPLEMENTED 0xC0000002 +#define STATUS_INVALID_PARAMETER 0xC000000D +#define STATUS_INVALID_DEVICE_REQUEST 0xC0000010 +#define STATUS_MORE_PROCESSING_REQUIRED 0xC0000016 +#define STATUS_ACCESS_DENIED 0xC0000022 +#define STATUS_BUFFER_TOO_SMALL 0xC0000023 +#define STATUS_OBJECT_NAME_INVALID 0xC0000023 +#define STATUS_MUTANT_NOT_OWNED 0xC0000046 +#define STATUS_RESOURCES 0xC000009A +#define STATUS_DELETE_PENDING 0xC0000056 +#define STATUS_INSUFFICIENT_RESOURCES 0xC000009A +#define STATUS_NOT_SUPPORTED 0xC00000BB +#define STATUS_INVALID_PARAMETER_2 0xC00000F0 +#define STATUS_NO_MEMORY 0xC0000017 +#define STATUS_CANCELLED 0xC0000120 +#define STATUS_DEVICE_REMOVED 0xC00002B6 +#define STATUS_DEVICE_NOT_CONNECTED 0xC000009D + +#define STATUS_BUFFER_OVERFLOW 0x80000005 + +#define SL_PENDING_RETURNED 0x01 +#define SL_INVOKE_ON_CANCEL 0x20 +#define SL_INVOKE_ON_SUCCESS 0x40 +#define SL_INVOKE_ON_ERROR 0x80 + +#define IRP_MJ_CREATE 0x00 +#define IRP_MJ_CREATE_NAMED_PIPE 0x01 +#define IRP_MJ_CLOSE 0x02 +#define IRP_MJ_READ 0x03 +#define IRP_MJ_WRITE 0x04 + +#define IRP_MJ_DEVICE_CONTROL 0x0E +#define IRP_MJ_INTERNAL_DEVICE_CONTROL 0x0F +#define IRP_MJ_POWER 0x16 +#define IRP_MJ_SYSTEM_CONTROL 0x0E +#define IRP_MJ_PNP 0x1b +#define IRP_MJ_MAXIMUM_FUNCTION 0x1b + +#define IRP_MN_WAIT_WAKE 0x00 +#define IRP_MN_POWER_SEQUENCE 0x01 +#define IRP_MN_SET_POWER 0x02 +#define IRP_MN_QUERY_POWER 0x03 + +#define IRP_MN_REGINFO 0x08 +#define IRP_MN_REGINFO_EX 0x0b + +#define IRP_MN_START_DEVICE 0x00 +#define IRP_MN_QUERY_REMOVE_DEVICE 0x01 +#define IRP_MN_REMOVE_DEVICE 0x02 +#define IRP_MN_CANCEL_REMOVE_DEVICE 0x03 +#define IRP_MN_STOP_DEVICE 0x04 +#define IRP_MN_QUERY_STOP_DEVICE 0x05 +#define IRP_MN_CANCEL_STOP_DEVICE 0x06 +#define IRP_MN_QUERY_DEVICE_RELATIONS 0x07 +#define IRP_MN_QUERY_INTERFACE 0x08 + +#define IRP_BUFFERED_IO 0x00000010 +#define IRP_DEALLOCATE_BUFFER 0x00000020 +#define IRP_INPUT_OPERATION 0x00000040 + +#define IRP_DEFFER_IO_COMPLETION 0x00000800 + +#define THREAD_WAIT_OBJECTS 3 +#define MAX_WAIT_OBJECTS 64 + +#define LOW_PRIORITY 0 +#define LOW_REALTIME_PRIORITY 16 +#define HIGH_PRIORITY 31 +#define MAXIMUM_PRIORITY 32 + +#define PROCESSOR_FEATURE_MAX 64 + +#define IO_NO_INCREMENT 0 + +#define WMIREG_ACTION_REGISTER 1 +#define WMIREG_ACTION_DEREGISTER 2 +#define WMIREG_ACTION_REREGISTER 3 +#define WMIREG_ACTION_UPDATE_GUIDS 4 + +#define WMIREGISTER 0 +#define WMIUPDATE 1 + +#ifdef CONFIG_X86_64 +#define wstdcall +#define wfastcall +#define noregparm + +#define KI_USER_SHARED_DATA 0xfffff78000000000UL + +#else + +#define noregparm __attribute__((regparm(0))) +#define wstdcall __attribute__((__stdcall__, regparm(0))) +#if defined(__GNUC__) && ((__GNUC__ == 3 && __GNUC_MINOR__ > 3) || __GNUC__ > 3) +#undef fastcall +#define wfastcall __attribute__((fastcall)) +#else +#error "gcc 3.4 or newer should be used for compiling this module" +#endif + +#define KI_USER_SHARED_DATA 0xffdf0000 + +#endif + +#define packed __attribute__((packed)) +#define no_warn_unused __attribute__((unused)) + +typedef u8 BOOLEAN; +typedef u8 BYTE; +typedef u8 *LPBYTE; +typedef s8 CHAR; +typedef u8 UCHAR; +typedef s16 SHORT; +typedef u16 USHORT; +typedef u16 WORD; +typedef s32 INT; +typedef u32 UINT; +typedef u32 DWORD; +typedef s32 LONG; +typedef u32 ULONG; +typedef s64 LONGLONG; +typedef u64 ULONGLONG; +typedef u64 ULONGULONG; +typedef u64 ULONG64; + +typedef CHAR CCHAR; +typedef USHORT wchar_t; +typedef SHORT CSHORT; +typedef LONGLONG LARGE_INTEGER; + +typedef LONG NTSTATUS; + +typedef LONG KPRIORITY; +typedef LARGE_INTEGER PHYSICAL_ADDRESS; +typedef UCHAR KIRQL; +typedef CHAR KPROCESSOR_MODE; + +/* ULONG_PTR is 32 bits on 32-bit platforms and 64 bits on 64-bit + * platform, which is same as 'unsigned long' in Linux */ +typedef unsigned long ULONG_PTR; + +typedef ULONG_PTR SIZE_T; +typedef ULONG_PTR KAFFINITY; +typedef ULONG ACCESS_MASK; + +typedef ULONG_PTR PFN_NUMBER; +typedef ULONG SECURITY_INFORMATION; + +/* non-negative numbers indicate success */ +#define NT_SUCCESS(status) ((NTSTATUS)(status) >= 0) + +struct ansi_string { + USHORT length; + USHORT max_length; + char *buf; +}; + +struct unicode_string { + USHORT length; + USHORT max_length; + wchar_t *buf; +}; + +struct nt_slist { + struct nt_slist *next; +}; + +#ifdef CONFIG_X86_64 +/* it is not clear how nt_slist_head is used to store pointer to + * slists and depth; here we assume 'align' field is used to store + * depth and 'region' field is used to store slist pointers */ +struct nt_slist_head { + union { + USHORT depth; + ULONGLONG align; + }; + union { + ULONGLONG region; + struct nt_slist *next; + }; +} __attribute__((aligned(16))); +typedef struct nt_slist_head nt_slist_header; +#else +union nt_slist_head { + ULONGLONG align; + struct { + struct nt_slist *next; + USHORT depth; + USHORT sequence; + }; +}; +typedef union nt_slist_head nt_slist_header; +#endif + +struct nt_list { + struct nt_list *next; + struct nt_list *prev; +}; + +typedef ULONG_PTR NT_SPIN_LOCK; + +enum kdpc_importance {LowImportance, MediumImportance, HighImportance}; + +struct kdpc; +typedef void (*DPC)(struct kdpc *kdpc, void *ctx, void *arg1, + void *arg2) wstdcall; +struct kdpc { + SHORT type; + UCHAR nr_cpu; + UCHAR importance; + struct nt_list list; + DPC func; + void *ctx; + void *arg1; + void *arg2; + union { + NT_SPIN_LOCK *lock; + /* 'lock' is not used; 'queued' represents whether + * kdpc is queued or not */ + int queued; + }; +}; + +enum pool_type { + NonPagedPool, PagedPool, NonPagedPoolMustSucceed, DontUseThisType, + NonPagedPoolCacheAligned, PagedPoolCacheAligned, + NonPagedPoolCacheAlignedMustS, MaxPoolType, + NonPagedPoolSession = 32, + PagedPoolSession = NonPagedPoolSession + 1, + NonPagedPoolMustSucceedSession = PagedPoolSession + 1, + DontUseThisTypeSession = NonPagedPoolMustSucceedSession + 1, + NonPagedPoolCacheAlignedSession = DontUseThisTypeSession + 1, + PagedPoolCacheAlignedSession = NonPagedPoolCacheAlignedSession + 1, + NonPagedPoolCacheAlignedMustSSession = PagedPoolCacheAlignedSession + 1 +}; + +enum memory_caching_type_orig { + MmFrameBufferCached = 2 +}; + +enum memory_caching_type { + MmNonCached = FALSE, MmCached = TRUE, + MmWriteCombined = MmFrameBufferCached, MmHardwareCoherentCached, + MmNonCachedUnordered, MmUSWCCached, MmMaximumCacheType +}; + +enum lock_operation { + IoReadAccess, IoWriteAccess, IoModifyAccess +}; + +enum mode { + KernelMode, UserMode, MaximumMode +}; + +struct mdl { + struct mdl *next; + CSHORT size; + CSHORT flags; + /* NdisFreeBuffer doesn't pass pool, so we store pool in + * unused field 'process' */ + union { + void *process; + void *pool; + }; + void *mappedsystemva; + void *startva; + ULONG bytecount; + ULONG byteoffset; +}; + +#define MDL_MAPPED_TO_SYSTEM_VA 0x0001 +#define MDL_PAGES_LOCKED 0x0002 +#define MDL_SOURCE_IS_NONPAGED_POOL 0x0004 +#define MDL_ALLOCATED_FIXED_SIZE 0x0008 +#define MDL_PARTIAL 0x0010 +#define MDL_PARTIAL_HAS_BEEN_MAPPED 0x0020 +#define MDL_IO_PAGE_READ 0x0040 +#define MDL_WRITE_OPERATION 0x0080 +#define MDL_PARENT_MAPPED_SYSTEM_VA 0x0100 +#define MDL_FREE_EXTRA_PTES 0x0200 +#define MDL_IO_SPACE 0x0800 +#define MDL_NETWORK_HEADER 0x1000 +#define MDL_MAPPING_CAN_FAIL 0x2000 +#define MDL_ALLOCATED_MUST_SUCCEED 0x4000 + +#define MDL_POOL_ALLOCATED 0x0400 +#define MDL_CACHE_ALLOCATED 0x8000 + +#define PAGE_START(ptr) ((void *)((ULONG_PTR)(ptr) & ~(PAGE_SIZE - 1))) +#define BYTE_OFFSET(ptr) ((ULONG)((ULONG_PTR)(ptr) & (PAGE_SIZE - 1))) + +#define MmGetMdlByteCount(mdl) ((mdl)->bytecount) +#define MmGetMdlVirtualAddress(mdl) ((mdl)->startva + (mdl)->byteoffset) +#define MmGetMdlByteOffset(mdl) ((mdl)->byteoffset) +#define MmGetSystemAddressForMdl(mdl) ((mdl)->mappedsystemva) +#define MmGetSystemAddressForMdlSafe(mdl, priority) ((mdl)->mappedsystemva) +#define MmGetMdlPfnArray(mdl) ((PFN_NUMBER *)(mdl + 1)) +#define MmInitializeMdl(mdl, baseva, length) \ +do { \ + (mdl)->next = NULL; \ + (mdl)->size = MmSizeOfMdl(baseva, length); \ + (mdl)->flags = 0; \ + (mdl)->startva = PAGE_START(baseva); \ + (mdl)->byteoffset = BYTE_OFFSET(baseva); \ + (mdl)->bytecount = length; \ + (mdl)->mappedsystemva = baseva; \ + TRACE4("%p %p %p %d %d", (mdl), baseva, (mdl)->startva, \ + (mdl)->byteoffset, length); \ +} while (0) + +struct kdevice_queue_entry { + struct nt_list list; + ULONG sort_key; + BOOLEAN inserted; +}; + +struct kdevice_queue { + USHORT type; + USHORT size; + struct nt_list list; + NT_SPIN_LOCK lock; + BOOLEAN busy; +}; + +struct wait_context_block { + struct kdevice_queue_entry wait_queue_entry; + void *device_routine; + void *device_context; + ULONG num_regs; + void *device_object; + void *current_irp; + void *buffer_chaining_dpc; +}; + +struct wait_block { + struct nt_list list; + struct task_struct *thread; + void *object; + int *wait_done; + USHORT wait_key; + USHORT wait_type; +}; + +struct dispatcher_header { + UCHAR type; + UCHAR absolute; + UCHAR size; + UCHAR inserted; + LONG signal_state; + struct nt_list wait_blocks; +}; + +enum event_type { + NotificationEvent, + SynchronizationEvent, +}; + +enum timer_type { + NotificationTimer = NotificationEvent, + SynchronizationTimer = SynchronizationEvent, +}; + +enum dh_type { + NotificationObject = NotificationEvent, + SynchronizationObject = SynchronizationEvent, + MutexObject, + SemaphoreObject, + ThreadObject, +}; + +enum wait_type { + WaitAll, WaitAny +}; + +/* objects that use dispatcher_header have it as the first field, so + * whenever we need to initialize dispatcher_header, we can convert + * that object into a nt_event and access dispatcher_header */ +struct nt_event { + struct dispatcher_header dh; +}; + +struct wrap_timer; + +#define WRAP_TIMER_MAGIC 47697249 + +struct nt_timer { + struct dispatcher_header dh; + /* We can't fit Linux timer in this structure. Instead of + * padding the nt_timer structure, we replace due_time field + * with *wrap_timer and allocate memory for it when nt_timer is + * initialized */ + union { + ULONGLONG due_time; + struct wrap_timer *wrap_timer; + }; + struct nt_list nt_timer_list; + struct kdpc *kdpc; + union { + LONG period; + LONG wrap_timer_magic; + }; +}; + +struct nt_mutex { + struct dispatcher_header dh; + struct nt_list list; + struct task_struct *owner_thread; + BOOLEAN abandoned; + BOOLEAN apc_disable; +}; + +struct nt_semaphore { + struct dispatcher_header dh; + LONG limit; +}; + +struct nt_thread { + struct dispatcher_header dh; + /* the rest in Windows is a long structure; since this + * structure is opaque to drivers, we just define what we + * need */ + int pid; + NTSTATUS status; + struct task_struct *task; + struct nt_list irps; + NT_SPIN_LOCK lock; + KPRIORITY prio; +}; + +#define set_object_type(dh, type) ((dh)->type = (type)) +#define is_notify_object(dh) ((dh)->type == NotificationObject) +#define is_synch_object(dh) ((dh)->type == SynchronizationObject) +#define is_mutex_object(dh) ((dh)->type == MutexObject) +#define is_semaphore_object(dh) ((dh)->type == SemaphoreObject) +#define is_nt_thread_object(dh) ((dh)->type == ThreadObject) + +#define IO_TYPE_ADAPTER 1 +#define IO_TYPE_CONTROLLER 2 +#define IO_TYPE_DEVICE 3 +#define IO_TYPE_DRIVER 4 +#define IO_TYPE_FILE 5 +#define IO_TYPE_IRP 6 +#define IO_TYPE_DEVICE_OBJECT_EXTENSION 13 + +struct irp; +struct dev_obj_ext; +struct driver_object; + +struct device_object { + CSHORT type; + USHORT size; + LONG ref_count; + struct driver_object *drv_obj; + struct device_object *next; + struct device_object *attached; + struct irp *current_irp; + void *io_timer; + ULONG flags; + ULONG characteristics; + void *vpb; + void *dev_ext; + CCHAR stack_count; + union { + struct nt_list queue_list; + struct wait_context_block wcb; + } queue; + ULONG align_req; + struct kdevice_queue dev_queue; + struct kdpc dpc; + ULONG active_threads; + void *security_desc; + struct nt_event lock; + USHORT sector_size; + USHORT spare1; + struct dev_obj_ext *dev_obj_ext; + void *reserved; +}; + +struct dev_obj_ext { + CSHORT type; + CSHORT size; + struct device_object *dev_obj; + struct device_object *attached_to; +}; + +struct io_status_block { + union { + NTSTATUS status; + void *pointer; + }; + ULONG_PTR info; +}; + +#ifdef CONFIG_X86_64 +struct io_status_block32 { + NTSTATUS status; + ULONG info; +}; +#endif + +#define DEVICE_TYPE ULONG + +struct driver_extension; + +typedef NTSTATUS driver_dispatch_t(struct device_object *dev_obj, + struct irp *irp) wstdcall; + +struct driver_object { + CSHORT type; + CSHORT size; + struct device_object *dev_obj; + ULONG flags; + void *start; + ULONG driver_size; + void *section; + struct driver_extension *drv_ext; + struct unicode_string name; + struct unicode_string *hardware_database; + void *fast_io_dispatch; + void *init; + void *start_io; + void (*unload)(struct driver_object *driver) wstdcall; + driver_dispatch_t *major_func[IRP_MJ_MAXIMUM_FUNCTION + 1]; +}; + +struct driver_extension { + struct driver_object *drv_obj; + NTSTATUS (*add_device)(struct driver_object *drv_obj, + struct device_object *dev_obj) wstdcall; + ULONG count; + struct unicode_string service_key_name; + struct nt_list custom_ext; +}; + +struct custom_ext { + struct nt_list list; + void *client_id; +}; + +struct wrap_bin_file; + +struct file_object { + CSHORT type; + CSHORT size; + struct device_object *dev_obj; + void *volume_parameter_block; + void *fs_context; + void *fs_context2; + void *section_object_pointer; + void *private_cache_map; + NTSTATUS final_status; + union { + struct file_object *related_file_object; + struct wrap_bin_file *wrap_bin_file; + }; + BOOLEAN lock_operation; + BOOLEAN delete_pending; + BOOLEAN read_access; + BOOLEAN write_access; + BOOLEAN delete_access; + BOOLEAN shared_read; + BOOLEAN shared_write; + BOOLEAN shared_delete; + ULONG flags; + struct unicode_string _name_; + LARGE_INTEGER current_byte_offset; + ULONG waiters; + ULONG busy; + void *last_lock; + struct nt_event lock; + struct nt_event event; + void *completion_context; +}; + +#ifdef CONFIG_X86_64 +#define POINTER_ALIGN __attribute__((aligned(8))) +#else +#define POINTER_ALIGN +#endif + +#define CACHE_ALIGN __attribute__((aligned(128))) + +enum system_power_state { + PowerSystemUnspecified = 0, + PowerSystemWorking, PowerSystemSleeping1, PowerSystemSleeping2, + PowerSystemSleeping3, PowerSystemHibernate, PowerSystemShutdown, + PowerSystemMaximum, +}; + +enum device_power_state { + PowerDeviceUnspecified = 0, + PowerDeviceD0, PowerDeviceD1, PowerDeviceD2, PowerDeviceD3, + PowerDeviceMaximum, +}; + +union power_state { + enum system_power_state system_state; + enum device_power_state device_state; +}; + +enum power_state_type { + SystemPowerState = 0, DevicePowerState, +}; + +enum power_action { + PowerActionNone = 0, + PowerActionReserved, PowerActionSleep, PowerActionHibernate, + PowerActionShutdown, PowerActionShutdownReset, PowerActionShutdownOff, + PowerActionWarmEject, +}; + +struct guid { + ULONG data1; + USHORT data2; + USHORT data3; + UCHAR data4[8]; +}; + +struct nt_interface { + USHORT size; + USHORT version; + void *context; + void (*reference)(void *context) wstdcall; + void (*dereference)(void *context) wstdcall; +}; + +enum interface_type { + InterfaceTypeUndefined = -1, Internal, Isa, Eisa, MicroChannel, + TurboChannel, PCIBus, VMEBus, NuBus, PCMCIABus, CBus, MPIBus, + MPSABus, ProcessorInternal, InternalPowerBus, PNPISABus, + PNPBus, MaximumInterfaceType, +}; + +#define CmResourceTypeNull 0 +#define CmResourceTypePort 1 +#define CmResourceTypeInterrupt 2 +#define CmResourceTypeMemory 3 +#define CmResourceTypeDma 4 +#define CmResourceTypeDeviceSpecific 5 +#define CmResourceTypeBusNumber 6 +#define CmResourceTypeMaximum 7 + +#define CmResourceTypeNonArbitrated 128 +#define CmResourceTypeConfigData 128 +#define CmResourceTypeDevicePrivate 129 +#define CmResourceTypePcCardConfig 130 +#define CmResourceTypeMfCardConfig 131 + +enum cm_share_disposition { + CmResourceShareUndetermined = 0, CmResourceShareDeviceExclusive, + CmResourceShareDriverExclusive, CmResourceShareShared +}; + +#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0 +#define CM_RESOURCE_INTERRUPT_LATCHED 1 +#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000 +#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001 +#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002 +#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004 + +#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008 +#define CM_RESOURCE_MEMORY_24 0x0010 +#define CM_RESOURCE_MEMORY_CACHEABLE 0x0020 + +#define CM_RESOURCE_PORT_MEMORY 0x0000 +#define CM_RESOURCE_PORT_IO 0x0001 +#define CM_RESOURCE_PORT_10_BIT_DECODE 0x0004 +#define CM_RESOURCE_PORT_12_BIT_DECODE 0x0008 +#define CM_RESOURCE_PORT_16_BIT_DECODE 0x0010 +#define CM_RESOURCE_PORT_POSITIVE_DECODE 0x0020 +#define CM_RESOURCE_PORT_PASSIVE_DECODE 0x0040 +#define CM_RESOURCE_PORT_WINDOW_DECODE 0x0080 + +#define CM_RESOURCE_DMA_8 0x0000 +#define CM_RESOURCE_DMA_16 0x0001 +#define CM_RESOURCE_DMA_32 0x0002 +#define CM_RESOURCE_DMA_8_AND_16 0x0004 +#define CM_RESOURCE_DMA_BUS_MASTER 0x0008 +#define CM_RESOURCE_DMA_TYPE_A 0x0010 +#define CM_RESOURCE_DMA_TYPE_B 0x0020 +#define CM_RESOURCE_DMA_TYPE_F 0x0040 + +#define MAX_RESOURCES 20 + +#pragma pack(push,4) +struct cm_partial_resource_descriptor { + UCHAR type; + UCHAR share; + USHORT flags; + union { + struct { + PHYSICAL_ADDRESS start; + ULONG length; + } generic; + struct { + PHYSICAL_ADDRESS start; + ULONG length; + } port; + struct { + ULONG level; + ULONG vector; + KAFFINITY affinity; + } interrupt; + struct { + PHYSICAL_ADDRESS start; + ULONG length; + } memory; + struct { + ULONG channel; + ULONG port; + ULONG reserved1; + } dma; + struct { + ULONG data[3]; + } device_private; + struct { + ULONG start; + ULONG length; + ULONG reserved; + } bus_number; + struct { + ULONG data_size; + ULONG reserved1; + ULONG reserved2; + } device_specific_data; + } u; +}; +#pragma pack(pop) + +struct cm_partial_resource_list { + USHORT version; + USHORT revision; + ULONG count; + struct cm_partial_resource_descriptor partial_descriptors[1]; +}; + +struct cm_full_resource_descriptor { + enum interface_type interface_type; + ULONG bus_number; + struct cm_partial_resource_list partial_resource_list; +}; + +struct cm_resource_list { + ULONG count; + struct cm_full_resource_descriptor list[1]; +}; + +enum file_info_class { + FileDirectoryInformation = 1, + FileBasicInformation = 4, + FileStandardInformation = 5, + FileNameInformation = 9, + FilePositionInformation = 14, + FileAlignmentInformation = 17, + FileNetworkOpenInformation = 34, + FileAttributeTagInformation = 35, + FileMaximumInformation = 41, +}; + +enum fs_info_class { + FileFsVolumeInformation = 1, + /* ... */ + FileFsMaximumInformation = 9, +}; + +enum device_relation_type { + BusRelations, EjectionRelations, PowerRelations, RemovalRelations, + TargetDeviceRelation, SingleBusRelations, +}; + +enum bus_query_id_type { + BusQueryDeviceID = 0, BusQueryHardwareIDs = 1, + BusQueryCompatibleIDs = 2, BusQueryInstanceID = 3, + BusQueryDeviceSerialNumber = 4, +}; + +enum device_text_type { + DeviceTextDescription = 0, DeviceTextLocationInformation = 1, +}; + +enum device_usage_notification_type { + DeviceUsageTypeUndefined, DeviceUsageTypePaging, + DeviceUsageTypeHibernation, DevbiceUsageTypeDumpFile, +}; + +#define METHOD_BUFFERED 0 +#define METHOD_IN_DIRECT 1 +#define METHOD_OUT_DIRECT 2 +#define METHOD_NEITHER 3 + +#define CTL_CODE(dev_type, func, method, access) \ + (((dev_type) << 16) | ((access) << 14) | ((func) << 2) | (method)) + +#define IO_METHOD_FROM_CTL_CODE(code) (code & 0x3) + +#ifndef CONFIG_X86_64 +#pragma pack(push,4) +#endif +struct io_stack_location { + UCHAR major_fn; + UCHAR minor_fn; + UCHAR flags; + UCHAR control; + union { + struct { + void *security_context; + ULONG options; + USHORT POINTER_ALIGN file_attributes; + USHORT share_access; + ULONG POINTER_ALIGN ea_length; + } create; + struct { + ULONG length; + ULONG POINTER_ALIGN key; + LARGE_INTEGER byte_offset; + } read; + struct { + ULONG length; + ULONG POINTER_ALIGN key; + LARGE_INTEGER byte_offset; + } write; + struct { + ULONG length; + enum file_info_class POINTER_ALIGN file_info_class; + } query_file; + struct { + ULONG length; + enum file_info_class POINTER_ALIGN file_info_class; + struct file_object *file_object; + union { + struct { + BOOLEAN replace_if_exists; + BOOLEAN advance_only; + }; + ULONG cluster_count; + void *delete_handle; + }; + } set_file; + struct { + ULONG length; + enum fs_info_class POINTER_ALIGN fs_info_class; + } query_volume; + struct { + ULONG output_buf_len; + ULONG POINTER_ALIGN input_buf_len; + ULONG POINTER_ALIGN code; + void *type3_input_buf; + } dev_ioctl; + struct { + SECURITY_INFORMATION security_info; + ULONG POINTER_ALIGN length; + } query_security; + struct { + SECURITY_INFORMATION security_info; + void *security_descriptor; + } set_security; + struct { + void *vpb; + struct device_object *device_object; + } mount_volume; + struct { + void *vpb; + struct device_object *device_object; + } verify_volume; + struct { + void *srb; + } scsi; + struct { + enum device_relation_type type; + } query_device_relations; + struct { + const struct guid *type; + USHORT size; + USHORT version; + struct nt_interface *intf; + void *intf_data; + } query_intf; + struct { + void *capabilities; + } device_capabilities; + struct { + void *io_resource_requirement_list; + } filter_resource_requirements; + struct { + ULONG which_space; + void *buffer; + ULONG offset; + ULONG POINTER_ALIGN length; + } read_write_config; + struct { + BOOLEAN lock; + } set_lock; + struct { + enum bus_query_id_type id_type; + } query_id; + struct { + enum device_text_type device_text_type; + ULONG POINTER_ALIGN locale_id; + } query_device_text; + struct { + BOOLEAN in_path; + BOOLEAN reserved[3]; + enum device_usage_notification_type POINTER_ALIGN type; + } usage_notification; + struct { + enum system_power_state power_state; + } wait_wake; + struct { + void *power_sequence; + } power_sequence; + struct { + ULONG sys_context; + enum power_state_type POINTER_ALIGN type; + union power_state POINTER_ALIGN state; + enum power_action POINTER_ALIGN shutdown_type; + } power; + struct { + struct cm_resource_list *allocated_resources; + struct cm_resource_list *allocated_resources_translated; + } start_device; + struct { + ULONG_PTR provider_id; + void *data_path; + ULONG buf_len; + void *buf; + } wmi; + struct { + void *arg1; + void *arg2; + void *arg3; + void *arg4; + } others; + } params; + struct device_object *dev_obj; + struct file_object *file_obj; + NTSTATUS (*completion_routine)(struct device_object *, + struct irp *, void *) wstdcall; + void *context; +}; +#ifndef CONFIG_X86_64 +#pragma pack(pop) +#endif + +struct kapc { + CSHORT type; + CSHORT size; + ULONG spare0; + struct nt_thread *thread; + struct nt_list list; + void *kernele_routine; + void *rundown_routine; + void *normal_routine; + void *normal_context; + void *sys_arg1; + void *sys_arg2; + CCHAR apc_state_index; + KPROCESSOR_MODE apc_mode; + BOOLEAN inserted; +}; + +#define IRP_NOCACHE 0x00000001 +#define IRP_SYNCHRONOUS_API 0x00000004 +#define IRP_ASSOCIATED_IRP 0x00000008 + +enum urb_state { + URB_INVALID = 1, URB_ALLOCATED, URB_SUBMITTED, + URB_COMPLETED, URB_FREE, URB_SUSPEND, URB_INT_UNLINKED }; + +struct wrap_urb { + struct nt_list list; + enum urb_state state; + struct nt_list complete_list; + unsigned int flags; + struct urb *urb; + struct irp *irp; +#ifdef USB_DEBUG + unsigned int id; +#endif +}; + +struct irp { + SHORT type; + USHORT size; + struct mdl *mdl; + ULONG flags; + union { + struct irp *master_irp; + LONG irp_count; + void *system_buffer; + } associated_irp; + struct nt_list thread_list; + struct io_status_block io_status; + KPROCESSOR_MODE requestor_mode; + BOOLEAN pending_returned; + CHAR stack_count; + CHAR current_location; + BOOLEAN cancel; + KIRQL cancel_irql; + CCHAR apc_env; + UCHAR alloc_flags; + struct io_status_block *user_status; + struct nt_event *user_event; + union { + struct { + void *user_apc_routine; + void *user_apc_context; + } async_params; + LARGE_INTEGER alloc_size; + } overlay; + void (*cancel_routine)(struct device_object *, struct irp *) wstdcall; + void *user_buf; + union { + struct { + union { + struct kdevice_queue_entry dev_q_entry; + struct { + void *driver_context[4]; + }; + }; + void *thread; + char *aux_buf; + struct { + struct nt_list list; + union { + struct io_stack_location *csl; + ULONG packet_type; + }; + }; + struct file_object *file_object; + } overlay; + union { + struct kapc apc; + /* space for apc is used for ndiswrapper + * specific fields */ + struct { + struct wrap_urb *wrap_urb; + struct wrap_device *wrap_device; + }; + }; + void *completion_key; + } tail; +}; + +#define IoSizeOfIrp(stack_count) \ + ((USHORT)(sizeof(struct irp) + \ + ((stack_count) * sizeof(struct io_stack_location)))) +#define IoGetCurrentIrpStackLocation(irp) \ + (irp)->tail.overlay.csl +#define IoGetNextIrpStackLocation(irp) \ + (IoGetCurrentIrpStackLocation(irp) - 1) +#define IoGetPreviousIrpStackLocation(irp) \ + (IoGetCurrentIrpStackLocation(irp) + 1) + +#define IoSetNextIrpStackLocation(irp) \ +do { \ + KIRQL _irql_; \ + IoAcquireCancelSpinLock(&_irql_); \ + (irp)->current_location--; \ + IoGetCurrentIrpStackLocation(irp)--; \ + IoReleaseCancelSpinLock(_irql_); \ +} while (0) + +#define IoSkipCurrentIrpStackLocation(irp) \ +do { \ + KIRQL _irql_; \ + IoAcquireCancelSpinLock(&_irql_); \ + (irp)->current_location++; \ + IoGetCurrentIrpStackLocation(irp)++; \ + IoReleaseCancelSpinLock(_irql_); \ +} while (0) + +static inline void +IoCopyCurrentIrpStackLocationToNext(struct irp *irp) +{ + struct io_stack_location *next; + next = IoGetNextIrpStackLocation(irp); + memcpy(next, IoGetCurrentIrpStackLocation(irp), + offsetof(struct io_stack_location, completion_routine)); + next->control = 0; +} + +static inline void +IoSetCompletionRoutine(struct irp *irp, void *routine, void *context, + BOOLEAN success, BOOLEAN error, BOOLEAN cancel) +{ + struct io_stack_location *irp_sl = IoGetNextIrpStackLocation(irp); + irp_sl->completion_routine = routine; + irp_sl->context = context; + irp_sl->control = 0; + if (success) + irp_sl->control |= SL_INVOKE_ON_SUCCESS; + if (error) + irp_sl->control |= SL_INVOKE_ON_ERROR; + if (cancel) + irp_sl->control |= SL_INVOKE_ON_CANCEL; +} + +#define IoMarkIrpPending(irp) \ + (IoGetCurrentIrpStackLocation((irp))->control |= SL_PENDING_RETURNED) +#define IoUnmarkIrpPending(irp) \ + (IoGetCurrentIrpStackLocation((irp))->control &= ~SL_PENDING_RETURNED) + +#define IRP_SL(irp, n) (((struct io_stack_location *)((irp) + 1)) + (n)) +#define IRP_DRIVER_CONTEXT(irp) (irp)->tail.overlay.driver_context +#define IoIrpThread(irp) ((irp)->tail.overlay.thread) + +#define IRP_URB(irp) \ + (union nt_urb *)(IoGetCurrentIrpStackLocation(irp)->params.others.arg1) + +#define IRP_WRAP_DEVICE(irp) (irp)->tail.wrap_device +#define IRP_WRAP_URB(irp) (irp)->tail.wrap_urb + +struct wmi_guid_reg_info { + struct guid *guid; + ULONG instance_count; + ULONG flags; +}; + +struct wmilib_context { + ULONG guid_count; + struct wmi_guid_reg_info *guid_list; + void *query_wmi_reg_info; + void *query_wmi_data_block; + void *set_wmi_data_block; + void *set_wmi_data_item; + void *execute_wmi_method; + void *wmi_function_control; +}; + +enum key_value_information_class { + KeyValueBasicInformation, KeyValueFullInformation, + KeyValuePartialInformation, KeyValueFullInformationAlign64, + KeyValuePartialInformationAlign64 +}; + +struct file_name_info { + ULONG length; + wchar_t *name; +}; + +struct file_std_info { + LARGE_INTEGER alloc_size; + LARGE_INTEGER eof; + ULONG num_links; + BOOLEAN delete_pending; + BOOLEAN dir; +}; + +enum nt_obj_type { + NT_OBJ_EVENT = 10, NT_OBJ_MUTEX, NT_OBJ_THREAD, NT_OBJ_TIMER, + NT_OBJ_SEMAPHORE, +}; + +enum common_object_type { + OBJECT_TYPE_NONE, OBJECT_TYPE_DEVICE, OBJECT_TYPE_DRIVER, + OBJECT_TYPE_NT_THREAD, OBJECT_TYPE_FILE, OBJECT_TYPE_CALLBACK, +}; + +struct common_object_header { + struct nt_list list; + enum common_object_type type; + UINT size; + UINT ref_count; + BOOLEAN close_in_process; + BOOLEAN permanent; + struct unicode_string name; +}; + +#define OBJECT_TO_HEADER(object) \ + (struct common_object_header *)((void *)(object) - \ + sizeof(struct common_object_header)) +#define OBJECT_SIZE(size) \ + ((size) + sizeof(struct common_object_header)) +#define HEADER_TO_OBJECT(hdr) \ + ((void *)(hdr) + sizeof(struct common_object_header)) +#define HANDLE_TO_OBJECT(handle) HEADER_TO_OBJECT(handle) +#define HANDLE_TO_HEADER(handle) (handle) + +enum work_queue_type { + CriticalWorkQueue, DelayedWorkQueue, HyperCriticalWorkQueue, + MaximumWorkQueue +}; + +typedef void (*NTOS_WORK_FUNC)(void *arg1, void *arg2) wstdcall; + +struct io_workitem { + enum work_queue_type type; + struct device_object *dev_obj; + NTOS_WORK_FUNC worker_routine; + void *context; +}; + +struct io_workitem_entry { + struct nt_list list; + struct io_workitem *io_workitem; +}; + +enum mm_page_priority { + LowPagePriority, NormalPagePriority = 16, HighPagePriority = 32 +}; + +enum kinterrupt_mode { + LevelSensitive, Latched +}; + +enum ntos_wait_reason { + Executive, FreePage, PageIn, PoolAllocation, DelayExecution, + Suspended, UserRequest, WrExecutive, WrFreePage, WrPageIn, + WrPoolAllocation, WrDelayExecution, WrSuspended, WrUserRequest, + WrEventPair, WrQueue, WrLpcReceive, WrLpcReply, WrVirtualMemory, + WrPageOut, WrRendezvous, Spare2, Spare3, Spare4, Spare5, Spare6, + WrKernel, MaximumWaitReason +}; + +typedef enum ntos_wait_reason KWAIT_REASON; + +typedef void *LOOKASIDE_ALLOC_FUNC(enum pool_type pool_type, + SIZE_T size, ULONG tag) wstdcall; +typedef void LOOKASIDE_FREE_FUNC(void *) wstdcall; + +struct npaged_lookaside_list { + nt_slist_header head; + USHORT depth; + USHORT maxdepth; + ULONG totalallocs; + union { + ULONG allocmisses; + ULONG allochits; + } u1; + ULONG totalfrees; + union { + ULONG freemisses; + ULONG freehits; + } u2; + enum pool_type pool_type; + ULONG tag; + ULONG size; + LOOKASIDE_ALLOC_FUNC *alloc_func; + LOOKASIDE_FREE_FUNC *free_func; + struct nt_list list; + ULONG lasttotallocs; + union { + ULONG lastallocmisses; + ULONG lastallochits; + } u3; + ULONG pad[2]; +#ifndef CONFIG_X86_64 + NT_SPIN_LOCK obsolete; +#endif +} +#ifdef CONFIG_X86_64 +CACHE_ALIGN +#endif +; + +enum device_registry_property { + DevicePropertyDeviceDescription, DevicePropertyHardwareID, + DevicePropertyCompatibleIDs, DevicePropertyBootConfiguration, + DevicePropertyBootConfigurationTranslated, + DevicePropertyClassName, DevicePropertyClassGuid, + DevicePropertyDriverKeyName, DevicePropertyManufacturer, + DevicePropertyFriendlyName, DevicePropertyLocationInformation, + DevicePropertyPhysicalDeviceObjectName, DevicePropertyBusTypeGuid, + DevicePropertyLegacyBusType, DevicePropertyBusNumber, + DevicePropertyEnumeratorName, DevicePropertyAddress, + DevicePropertyUINumber, DevicePropertyInstallState, + DevicePropertyRemovalPolicy +}; + +enum trace_information_class { + TraceIdClass, TraceHandleClass, TraceEnableFlagsClass, + TraceEnableLevelClass, GlobalLoggerHandleClass, EventLoggerHandleClass, + AllLoggerHandlesClass, TraceHandleByNameClass +}; + +struct kinterrupt; +typedef BOOLEAN (*PKSERVICE_ROUTINE)(struct kinterrupt *interrupt, + void *context) wstdcall; +typedef BOOLEAN (*PKSYNCHRONIZE_ROUTINE)(void *context) wstdcall; + +struct kinterrupt { + ULONG vector; + KAFFINITY cpu_mask; + NT_SPIN_LOCK lock; + NT_SPIN_LOCK *actual_lock; + BOOLEAN shared; + BOOLEAN save_fp; + union { + CHAR processor_number; +#ifdef CONFIG_DEBUG_SHIRQ + CHAR enabled; +#endif + } u; + PKSERVICE_ROUTINE isr; + void *isr_ctx; + struct nt_list list; + KIRQL irql; + KIRQL synch_irql; + enum kinterrupt_mode mode; +}; + +struct time_fields { + CSHORT year; + CSHORT month; + CSHORT day; + CSHORT hour; + CSHORT minute; + CSHORT second; + CSHORT milliseconds; + CSHORT weekday; +}; + +struct object_attributes { + ULONG length; + void *root_dir; + struct unicode_string *name; + ULONG attributes; + void *security_descr; + void *security_qos; +}; + +typedef void (*PCALLBACK_FUNCTION)(void *context, void *arg1, + void *arg2) wstdcall; + +struct callback_object; +struct callback_func { + PCALLBACK_FUNCTION func; + void *context; + struct nt_list list; + struct callback_object *object; +}; + +struct callback_object { + NT_SPIN_LOCK lock; + struct nt_list list; + struct nt_list callback_funcs; + BOOLEAN allow_multiple_callbacks; + struct object_attributes *attributes; +}; + +enum section_inherit { + ViewShare = 1, ViewUnmap = 2 +}; + +struct ksystem_time { + ULONG low_part; + LONG high1_time; + LONG high2_time; +}; + +enum nt_product_type { + nt_product_win_nt = 1, nt_product_lan_man_nt, nt_product_server +}; + +enum alt_arch_type { + arch_type_standard, arch_type_nex98x86, end_alternatives +}; + +struct kuser_shared_data { + ULONG tick_count; + ULONG tick_count_multiplier; + volatile struct ksystem_time interrupt_time; + volatile struct ksystem_time system_time; + volatile struct ksystem_time time_zone_bias; + USHORT image_number_low; + USHORT image_number_high; + wchar_t nt_system_root[260]; + ULONG max_stack_trace_depth; + ULONG crypto_exponent; + ULONG time_zone_id; + ULONG large_page_min; + ULONG reserved2[7]; + enum nt_product_type nt_product_type; + BOOLEAN product_type_is_valid; + ULONG nt_major_version; + ULONG nt_minor_version; + BOOLEAN processor_features[PROCESSOR_FEATURE_MAX]; + ULONG reserved1; + ULONG reserved3; + volatile LONG time_slip; + enum alt_arch_type alt_arch_type; + LARGE_INTEGER system_expiration_date; + ULONG suite_mask; + BOOLEAN kdbg_enabled; + volatile ULONG active_console; + volatile ULONG dismount_count; + ULONG com_plus_package; + ULONG last_system_rite_event_tick_count; + ULONG num_phys_pages; + BOOLEAN safe_boot_mode; + ULONG trace_log; + ULONGLONG fill0; + ULONGLONG sys_call[4]; + union { + volatile struct ksystem_time tick_count; + volatile ULONG64 tick_count_quad; + } tick; +}; + +#define REG_NONE (0) +#define REG_SZ (1) +#define REG_EXPAND_SZ (2) +#define REG_BINARY (3) +#define REG_DWORD (4) + +#define RTL_REGISTRY_ABSOLUTE 0 +#define RTL_REGISTRY_SERVICES 1 +#define RTL_REGISTRY_CONTROL 2 +#define RTL_REGISTRY_WINDOWS_NT 3 +#define RTL_REGISTRY_DEVICEMAP 4 +#define RTL_REGISTRY_USER 5 +#define RTL_REGISTRY_MAXIMUM 6 +#define RTL_REGISTRY_HANDLE 0x40000000 +#define RTL_REGISTRY_OPTIONAL 0x80000000 + +#define RTL_QUERY_REGISTRY_SUBKEY 0x00000001 +#define RTL_QUERY_REGISTRY_TOPKEY 0x00000002 +#define RTL_QUERY_REGISTRY_REQUIRED 0x00000004 +#define RTL_QUERY_REGISTRY_NOVALUE 0x00000008 +#define RTL_QUERY_REGISTRY_NOEXPAND 0x00000010 +#define RTL_QUERY_REGISTRY_DIRECT 0x00000020 +#define RTL_QUERY_REGISTRY_DELETE 0x00000040 + +typedef NTSTATUS (*PRTL_QUERY_REGISTRY_ROUTINE)(wchar_t *name, ULONG type, + void *data, ULONG length, + void *context, + void *entry) wstdcall; + +struct rtl_query_registry_table { + PRTL_QUERY_REGISTRY_ROUTINE query_func; + ULONG flags; + wchar_t *name; + void *context; + ULONG def_type; + void *def_data; + ULONG def_length; +}; + +struct io_remove_lock { + BOOLEAN removed; + BOOLEAN reserved[3]; + LONG io_count; + struct nt_event remove_event; +}; + +struct io_error_log_packet { + UCHAR major_fn_code; + UCHAR retry_count; + USHORT dump_data_size; + USHORT nr_of_strings; + USHORT string_offset; + USHORT event_category; + NTSTATUS error_code; + ULONG unique_error_value; + NTSTATUS final_status; + ULONG sequence_number; + ULONG io_control_code; + LARGE_INTEGER device_offset; + ULONG dump_data[1]; +}; + +/* some of the functions below are slightly different from DDK's + * implementation; e.g., Insert functions return appropriate + * pointer */ + +/* instead of using Linux's lists, we implement list manipulation + * functions because nt_list is used by drivers and we don't want to + * worry about Linux's list being different from nt_list (right now + * they are same, but in future they could be different) */ + +static inline void InitializeListHead(struct nt_list *head) +{ + head->next = head->prev = head; +} + +static inline BOOLEAN IsListEmpty(struct nt_list *head) +{ + if (head == head->next) + return TRUE; + else + return FALSE; +} + +static inline void RemoveEntryList(struct nt_list *entry) +{ + entry->prev->next = entry->next; + entry->next->prev = entry->prev; +} + +static inline struct nt_list *RemoveHeadList(struct nt_list *head) +{ + struct nt_list *entry; + + entry = head->next; + if (entry == head) + return NULL; + else { + RemoveEntryList(entry); + return entry; + } +} + +static inline struct nt_list *RemoveTailList(struct nt_list *head) +{ + struct nt_list *entry; + + entry = head->prev; + if (entry == head) + return NULL; + else { + RemoveEntryList(entry); + return entry; + } +} + +static inline void InsertListEntry(struct nt_list *entry, struct nt_list *prev, + struct nt_list *next) +{ + next->prev = entry; + entry->next = next; + entry->prev = prev; + prev->next = entry; +} + +static inline struct nt_list *InsertHeadList(struct nt_list *head, + struct nt_list *entry) +{ + struct nt_list *ret; + + if (IsListEmpty(head)) + ret = NULL; + else + ret = head->next; + + InsertListEntry(entry, head, head->next); + return ret; +} + +static inline struct nt_list *InsertTailList(struct nt_list *head, + struct nt_list *entry) +{ + struct nt_list *ret; + + if (IsListEmpty(head)) + ret = NULL; + else + ret = head->prev; + + InsertListEntry(entry, head->prev, head); + return ret; +} + +#define nt_list_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +#define nt_list_for_each_entry(pos, head, member) \ + for (pos = container_of((head)->next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = container_of(pos->member.next, typeof(*pos), member)) + +#define nt_list_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +/* device object flags */ +#define DO_VERIFY_VOLUME 0x00000002 +#define DO_BUFFERED_IO 0x00000004 +#define DO_EXCLUSIVE 0x00000008 +#define DO_DIRECT_IO 0x00000010 +#define DO_MAP_IO_BUFFER 0x00000020 +#define DO_DEVICE_HAS_NAME 0x00000040 +#define DO_DEVICE_INITIALIZING 0x00000080 +#define DO_SYSTEM_BOOT_PARTITION 0x00000100 +#define DO_LONG_TERM_REQUESTS 0x00000200 +#define DO_NEVER_LAST_DEVICE 0x00000400 +#define DO_SHUTDOWN_REGISTERED 0x00000800 +#define DO_BUS_ENUMERATED_DEVICE 0x00001000 +#define DO_POWER_PAGABLE 0x00002000 +#define DO_POWER_INRUSH 0x00004000 +#define DO_LOW_PRIORITY_FILESYSTEM 0x00010000 + +/* Various supported device types (used with IoCreateDevice()) */ + +#define FILE_DEVICE_BEEP 0x00000001 +#define FILE_DEVICE_CD_ROM 0x00000002 +#define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003 +#define FILE_DEVICE_CONTROLLER 0x00000004 +#define FILE_DEVICE_DATALINK 0x00000005 +#define FILE_DEVICE_DFS 0x00000006 +#define FILE_DEVICE_DISK 0x00000007 +#define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008 +#define FILE_DEVICE_FILE_SYSTEM 0x00000009 +#define FILE_DEVICE_INPORT_PORT 0x0000000A +#define FILE_DEVICE_KEYBOARD 0x0000000B +#define FILE_DEVICE_MAILSLOT 0x0000000C +#define FILE_DEVICE_MIDI_IN 0x0000000D +#define FILE_DEVICE_MIDI_OUT 0x0000000E +#define FILE_DEVICE_MOUSE 0x0000000F +#define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010 +#define FILE_DEVICE_NAMED_PIPE 0x00000011 +#define FILE_DEVICE_NETWORK 0x00000012 +#define FILE_DEVICE_NETWORK_BROWSER 0x00000013 +#define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014 +#define FILE_DEVICE_NULL 0x00000015 +#define FILE_DEVICE_PARALLEL_PORT 0x00000016 +#define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017 +#define FILE_DEVICE_PRINTER 0x00000018 +#define FILE_DEVICE_SCANNER 0x00000019 +#define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001A +#define FILE_DEVICE_SERIAL_PORT 0x0000001B +#define FILE_DEVICE_SCREEN 0x0000001C +#define FILE_DEVICE_SOUND 0x0000001D +#define FILE_DEVICE_STREAMS 0x0000001E +#define FILE_DEVICE_TAPE 0x0000001F +#define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020 +#define FILE_DEVICE_TRANSPORT 0x00000021 +#define FILE_DEVICE_UNKNOWN 0x00000022 +#define FILE_DEVICE_VIDEO 0x00000023 +#define FILE_DEVICE_VIRTUAL_DISK 0x00000024 +#define FILE_DEVICE_WAVE_IN 0x00000025 +#define FILE_DEVICE_WAVE_OUT 0x00000026 +#define FILE_DEVICE_8042_PORT 0x00000027 +#define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028 +#define FILE_DEVICE_BATTERY 0x00000029 +#define FILE_DEVICE_BUS_EXTENDER 0x0000002A +#define FILE_DEVICE_MODEM 0x0000002B +#define FILE_DEVICE_VDM 0x0000002C +#define FILE_DEVICE_MASS_STORAGE 0x0000002D +#define FILE_DEVICE_SMB 0x0000002E +#define FILE_DEVICE_KS 0x0000002F +#define FILE_DEVICE_CHANGER 0x00000030 +#define FILE_DEVICE_SMARTCARD 0x00000031 +#define FILE_DEVICE_ACPI 0x00000032 +#define FILE_DEVICE_DVD 0x00000033 +#define FILE_DEVICE_FULLSCREEN_VIDEO 0x00000034 +#define FILE_DEVICE_DFS_FILE_SYSTEM 0x00000035 +#define FILE_DEVICE_DFS_VOLUME 0x00000036 +#define FILE_DEVICE_SERENUM 0x00000037 +#define FILE_DEVICE_TERMSRV 0x00000038 +#define FILE_DEVICE_KSEC 0x00000039 +#define FILE_DEVICE_FIPS 0x0000003A + +/* Device characteristics */ + +#define FILE_REMOVABLE_MEDIA 0x00000001 +#define FILE_READ_ONLY_DEVICE 0x00000002 +#define FILE_FLOPPY_DISKETTE 0x00000004 +#define FILE_WRITE_ONCE_MEDIA 0x00000008 +#define FILE_REMOTE_DEVICE 0x00000010 +#define FILE_DEVICE_IS_MOUNTED 0x00000020 +#define FILE_VIRTUAL_VOLUME 0x00000040 +#define FILE_AUTOGENERATED_DEVICE_NAME 0x00000080 +#define FILE_DEVICE_SECURE_OPEN 0x00000100 + +#define FILE_READ_DATA 0x0001 +#define FILE_WRITE_DATA 0x0002 + +#define FILE_SUPERSEDED 0x00000000 +#define FILE_OPENED 0x00000001 +#define FILE_CREATED 0x00000002 +#define FILE_OVERWRITTEN 0x00000003 +#define FILE_EXISTS 0x00000004 +#define FILE_DOES_NOT_EXIST 0x00000005 + + +#endif /* WINNT_TYPES_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/mkexport.sh +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/mkexport.sh @@ -0,0 +1,42 @@ +#! /bin/sh + +# Generate exports symbol table from C files + +input="$1" +output="$2" +exports=$(basename "$output" .h) +exec >"$output" + +echo "/* automatically generated from src */"; + +sed -n -e '/^\(wstdcall\|wfastcall\|noregparm\|__attribute__\)/{ +:more +N +s/\([^{]\)$/\1/ +t more +s/\n{$/;/ +p +}' $input + +echo "#ifdef CONFIG_X86_64"; + +sed -n \ + -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ +'WIN_FUNC_DECL(\1, \2)/p' \ + -e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ +'WIN_FUNC_DECL(\1, \2)/p' $input | sort -u + +echo "#endif" +echo "extern struct wrap_export $exports[];" +echo "struct wrap_export $exports[] = {" + +sed -n \ + -e 's/.*WIN_FUNC(_win_\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ +' WIN_WIN_SYMBOL(\1, \2),/p' \ + -e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\ +' WIN_SYMBOL(\1, \2),/p' \ + -e 's/.*WIN_SYMBOL_MAP(\("[^"]\+"\)[ ,\n]\+\([^)]\+\)).*/'\ +' {\1, (generic_func)\2},/p' $input | sort -u + +echo " {NULL, NULL}" +echo "};" --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/hal.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/hal.c @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ntoskernel.h" +#include "hal_exports.h" + +wstdcall void WIN_FUNC(WRITE_PORT_ULONG,2) + (ULONG_PTR port, ULONG value) +{ + outl(value, port); +} + +wstdcall ULONG WIN_FUNC(READ_PORT_ULONG,1) + (ULONG_PTR port) +{ + return inl(port); +} + +wstdcall void WIN_FUNC(WRITE_PORT_USHORT,2) + (ULONG_PTR port, USHORT value) +{ + outw(value, port); +} + +wstdcall USHORT WIN_FUNC(READ_PORT_USHORT,1) + (ULONG_PTR port) +{ + return inw(port); +} + +wstdcall void WIN_FUNC(WRITE_PORT_UCHAR,2) + (ULONG_PTR port, UCHAR value) +{ + outb(value, port); +} + +wstdcall UCHAR WIN_FUNC(READ_PORT_UCHAR,1) + (ULONG_PTR port) +{ + return inb(port); +} + +wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_USHORT,3) + (ULONG_PTR port, USHORT *buf, ULONG count) +{ + outsw(port, buf, count); +} + +wstdcall void WIN_FUNC(READ_PORT_BUFFER_USHORT,3) + (ULONG_PTR port, USHORT *buf, ULONG count) +{ + insw(port, buf, count); +} + +wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_ULONG,3) + (ULONG_PTR port, ULONG *buf, ULONG count) +{ + outsl(port, buf, count); +} + +wstdcall void WIN_FUNC(READ_PORT_BUFFER_ULONG,3) + (ULONG_PTR port, ULONG *buf, ULONG count) +{ + insl(port, buf, count); +} + +wstdcall USHORT WIN_FUNC(READ_REGISTER_USHORT,1) + (void __iomem *reg) +{ + return readw(reg); +} + +wstdcall void WIN_FUNC(WRITE_REGISTER_ULONG,2) + (void __iomem *reg, UINT val) +{ + writel(val, reg); +} + +wstdcall void WIN_FUNC(WRITE_REGISTER_USHORT,2) + (void __iomem *reg, USHORT val) +{ + writew(val, reg); +} + +wstdcall void WIN_FUNC(WRITE_REGISTER_UCHAR,2) + (void __iomem *reg, UCHAR val) +{ + writeb(val, reg); +} + +wstdcall void WIN_FUNC(KeStallExecutionProcessor,1) + (ULONG usecs) +{ + udelay(usecs); +} + +wstdcall KIRQL WIN_FUNC(KeGetCurrentIrql,0) + (void) +{ + return current_irql(); +} + +wfastcall KIRQL WIN_FUNC(KfRaiseIrql,1) + (KIRQL newirql) +{ + return raise_irql(newirql); +} + +wfastcall void WIN_FUNC(KfLowerIrql,1) + (KIRQL oldirql) +{ + lower_irql(oldirql); +} + +wfastcall KIRQL WIN_FUNC(KfAcquireSpinLock,1) + (NT_SPIN_LOCK *lock) +{ + return nt_spin_lock_irql(lock, DISPATCH_LEVEL); +} + +wfastcall void WIN_FUNC(KfReleaseSpinLock,2) + (NT_SPIN_LOCK *lock, KIRQL oldirql) +{ + nt_spin_unlock_irql(lock, oldirql); +} + +wfastcall void WIN_FUNC(KefAcquireSpinLockAtDpcLevel,1) + (NT_SPIN_LOCK *lock) +{ +#ifdef DEBUG_IRQL + if (current_irql() != DISPATCH_LEVEL) + ERROR("irql != DISPATCH_LEVEL"); +#endif + nt_spin_lock(lock); +} + +wfastcall void WIN_FUNC(KefReleaseSpinLockFromDpcLevel,1) + (NT_SPIN_LOCK *lock) +{ +#ifdef DEBUG_IRQL + if (current_irql() != DISPATCH_LEVEL) + ERROR("irql != DISPATCH_LEVEL"); +#endif + nt_spin_unlock(lock); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/loader.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/loader.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LOADER_H_ +#define _LOADER_H_ + +#include "ndiswrapper.h" + +#ifndef __KERNEL__ +#define __user +#endif + +struct load_driver_file { + char driver_name[MAX_DRIVER_NAME_LEN]; + char name[MAX_DRIVER_NAME_LEN]; + size_t size; + void __user *data; +}; + +struct load_device_setting { + char name[MAX_SETTING_NAME_LEN]; + char value[MAX_SETTING_VALUE_LEN]; +}; + +struct load_device { + int bus; + int vendor; + int device; + int subvendor; + int subdevice; + char conf_file_name[MAX_DRIVER_NAME_LEN]; + char driver_name[MAX_DRIVER_NAME_LEN]; +}; + +struct load_devices { + int count; + struct load_device *devices; +}; + +struct load_driver { + char name[MAX_DRIVER_NAME_LEN]; + char conf_file_name[MAX_DRIVER_NAME_LEN]; + unsigned int num_sys_files; + struct load_driver_file sys_files[MAX_DRIVER_PE_IMAGES]; + unsigned int num_settings; + struct load_device_setting settings[MAX_DEVICE_SETTINGS]; + unsigned int num_bin_files; + struct load_driver_file bin_files[MAX_DRIVER_BIN_FILES]; +}; + +#define WRAP_IOCTL_LOAD_DEVICE _IOW(('N' + 'd' + 'i' + 'S'), 0, \ + struct load_device *) +#define WRAP_IOCTL_LOAD_DRIVER _IOW(('N' + 'd' + 'i' + 'S'), 1, \ + struct load_driver *) +#define WRAP_IOCTL_LOAD_BIN_FILE _IOW(('N' + 'd' + 'i' + 'S'), 2, \ + struct load_driver_file *) + +#define WRAP_CMD_LOAD_DEVICE "load_device" +#define WRAP_CMD_LOAD_DRIVER "load_driver" +#define WRAP_CMD_LOAD_BIN_FILE "load_bin_file" + +int loader_init(void); +void loader_exit(void); + +#ifdef __KERNEL__ +struct wrap_device *load_wrap_device(struct load_device *load_device); +struct wrap_driver *load_wrap_driver(struct wrap_device *device); +struct wrap_bin_file *get_bin_file(char *bin_file_name); +void free_bin_file(struct wrap_bin_file *bin_file); +void unload_wrap_driver(struct wrap_driver *driver); +void unload_wrap_device(struct wrap_device *wd); +struct wrap_device *get_wrap_device(void *dev, int bus_type); + +extern struct semaphore loader_mutex; +#endif + +#endif /* LOADER_H */ + --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapper.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapper.c @@ -0,0 +1,121 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ndis.h" +#include "iw_ndis.h" +#include "loader.h" +#include "pnp.h" +#include "wrapper.h" + +char *if_name = "wlan%d"; +int proc_uid, proc_gid; +int hangcheck_interval; +static char *utils_version = UTILS_VERSION; + +#if defined(DEBUG) && (DEBUG > 0) +int debug = DEBUG; +#else +int debug = 0; +#endif + +WRAP_MODULE_PARM_STRING(if_name, 0400); +MODULE_PARM_DESC(if_name, "Network interface name or template " + "(default: wlan%d)"); +WRAP_MODULE_PARM_INT(proc_uid, 0600); +MODULE_PARM_DESC(proc_uid, "The uid of the files created in /proc " + "(default: 0)."); +WRAP_MODULE_PARM_INT(proc_gid, 0600); +MODULE_PARM_DESC(proc_gid, "The gid of the files created in /proc " + "(default: 0)."); +WRAP_MODULE_PARM_INT(debug, 0600); +MODULE_PARM_DESC(debug, "debug level"); + +/* 0 - default value provided by NDIS driver, + * positive value - force hangcheck interval to that many seconds + * negative value - disable hangcheck + */ +WRAP_MODULE_PARM_INT(hangcheck_interval, 0600); +MODULE_PARM_DESC(hangcheck_interval, "The interval, in seconds, for checking" + " if driver is hung. (default: 0)"); + +WRAP_MODULE_PARM_STRING(utils_version, 0400); +MODULE_PARM_DESC(utils_version, "Compatible version of utils " + "(read only: " UTILS_VERSION ")"); + +MODULE_AUTHOR("ndiswrapper team "); +#ifdef MODULE_DESCRIPTION +MODULE_DESCRIPTION("NDIS wrapper driver"); +#endif +#ifdef MODULE_VERSION +MODULE_VERSION(DRIVER_VERSION); +#endif +MODULE_LICENSE("GPL"); + +static void module_cleanup(void) +{ + loader_exit(); +#ifdef ENABLE_USB + usb_exit(); +#endif + + wrap_procfs_remove(); + wrapndis_exit(); + ndis_exit(); + rtl_exit(); + crt_exit(); + ntoskernel_exit(); + wrapmem_exit(); +} + +static int __init wrapper_init(void) +{ + printk(KERN_INFO "%s version %s loaded (smp=%s, preempt=%s)\n", + DRIVER_NAME, DRIVER_VERSION, +#ifdef CONFIG_SMP + "yes" +#else + "no" +#endif + , +#ifdef CONFIG_PREEMPT_RT + "rt" +#elif defined(CONFIG_PREEMPT) + "yes" +#else + "no" +#endif + ); + + if (wrapmem_init() || ntoskernel_init() || crt_init() || + rtl_init() || ndis_init() || wrapndis_init() || +#ifdef ENABLE_USB + usb_init() || +#endif + wrap_procfs_init() || loader_init()) { + module_cleanup(); + ERROR("%s: initialization failed", DRIVER_NAME); + return -EINVAL; + } + EXIT1(return 0); +} + +static void __exit wrapper_exit(void) +{ + ENTER1(""); + module_cleanup(); +} + +module_init(wrapper_init); +module_exit(wrapper_exit); --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/pe_linker.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/pe_linker.h @@ -0,0 +1,993 @@ +/* + * This file is an excerpt of winnt.h from WINE, which bears the + * following copyright: + * + * Win32 definitions for Windows NT + * + * Copyright 1996 Alexandre Julliard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * File formats definitions + */ +typedef struct _IMAGE_DOS_HEADER { + WORD e_magic; /* 00: MZ Header signature */ + WORD e_cblp; /* 02: Bytes on last page of file */ + WORD e_cp; /* 04: Pages in file */ + WORD e_crlc; /* 06: Relocations */ + WORD e_cparhdr; /* 08: Size of header in paragraphs */ + WORD e_minalloc; /* 0a: Minimum extra paragraphs needed */ + WORD e_maxalloc; /* 0c: Maximum extra paragraphs needed */ + WORD e_ss; /* 0e: Initial (relative) SS value */ + WORD e_sp; /* 10: Initial SP value */ + WORD e_csum; /* 12: Checksum */ + WORD e_ip; /* 14: Initial IP value */ + WORD e_cs; /* 16: Initial (relative) CS value */ + WORD e_lfarlc; /* 18: File address of relocation table */ + WORD e_ovno; /* 1a: Overlay number */ + WORD e_res[4]; /* 1c: Reserved words */ + WORD e_oemid; /* 24: OEM identifier (for e_oeminfo) */ + WORD e_oeminfo; /* 26: OEM information; e_oemid specific */ + WORD e_res2[10]; /* 28: Reserved words */ + DWORD e_lfanew; /* 3c: Offset to extended header */ +} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER; + +#define IMAGE_DOS_SIGNATURE 0x5A4D /* MZ */ +#define IMAGE_OS2_SIGNATURE 0x454E /* NE */ +#define IMAGE_OS2_SIGNATURE_LE 0x454C /* LE */ +#define IMAGE_OS2_SIGNATURE_LX 0x584C /* LX */ +#define IMAGE_VXD_SIGNATURE 0x454C /* LE */ +#define IMAGE_NT_SIGNATURE 0x00004550 /* PE00 */ + +/* + * This is the Windows executable (NE) header. + * the name IMAGE_OS2_HEADER is misleading, but in the SDK this way. + */ +typedef struct +{ + WORD ne_magic; /* 00 NE signature 'NE' */ + BYTE ne_ver; /* 02 Linker version number */ + BYTE ne_rev; /* 03 Linker revision number */ + WORD ne_enttab; /* 04 Offset to entry table relative to NE */ + WORD ne_cbenttab; /* 06 Length of entry table in bytes */ + LONG ne_crc; /* 08 Checksum */ + WORD ne_flags; /* 0c Flags about segments in this file */ + WORD ne_autodata; /* 0e Automatic data segment number */ + WORD ne_heap; /* 10 Initial size of local heap */ + WORD ne_stack; /* 12 Initial size of stack */ + DWORD ne_csip; /* 14 Initial CS:IP */ + DWORD ne_sssp; /* 18 Initial SS:SP */ + WORD ne_cseg; /* 1c # of entries in segment table */ + WORD ne_cmod; /* 1e # of entries in module reference tab. */ + WORD ne_cbnrestab; /* 20 Length of nonresident-name table */ + WORD ne_segtab; /* 22 Offset to segment table */ + WORD ne_rsrctab; /* 24 Offset to resource table */ + WORD ne_restab; /* 26 Offset to resident-name table */ + WORD ne_modtab; /* 28 Offset to module reference table */ + WORD ne_imptab; /* 2a Offset to imported name table */ + DWORD ne_nrestab; /* 2c Offset to nonresident-name table */ + WORD ne_cmovent; /* 30 # of movable entry points */ + WORD ne_align; /* 32 Logical sector alignment shift count */ + WORD ne_cres; /* 34 # of resource segments */ + BYTE ne_exetyp; /* 36 Flags indicating target OS */ + BYTE ne_flagsothers; /* 37 Additional information flags */ + WORD ne_pretthunks; /* 38 Offset to return thunks */ + WORD ne_psegrefbytes; /* 3a Offset to segment ref. bytes */ + WORD ne_swaparea; /* 3c Reserved by Microsoft */ + WORD ne_expver; /* 3e Expected Windows version number */ +} IMAGE_OS2_HEADER, *PIMAGE_OS2_HEADER; + +typedef struct _IMAGE_VXD_HEADER { + WORD e32_magic; + BYTE e32_border; + BYTE e32_worder; + DWORD e32_level; + WORD e32_cpu; + WORD e32_os; + DWORD e32_ver; + DWORD e32_mflags; + DWORD e32_mpages; + DWORD e32_startobj; + DWORD e32_eip; + DWORD e32_stackobj; + DWORD e32_esp; + DWORD e32_pagesize; + DWORD e32_lastpagesize; + DWORD e32_fixupsize; + DWORD e32_fixupsum; + DWORD e32_ldrsize; + DWORD e32_ldrsum; + DWORD e32_objtab; + DWORD e32_objcnt; + DWORD e32_objmap; + DWORD e32_itermap; + DWORD e32_rsrctab; + DWORD e32_rsrccnt; + DWORD e32_restab; + DWORD e32_enttab; + DWORD e32_dirtab; + DWORD e32_dircnt; + DWORD e32_fpagetab; + DWORD e32_frectab; + DWORD e32_impmod; + DWORD e32_impmodcnt; + DWORD e32_impproc; + DWORD e32_pagesum; + DWORD e32_datapage; + DWORD e32_preload; + DWORD e32_nrestab; + DWORD e32_cbnrestab; + DWORD e32_nressum; + DWORD e32_autodata; + DWORD e32_debuginfo; + DWORD e32_debuglen; + DWORD e32_instpreload; + DWORD e32_instdemand; + DWORD e32_heapsize; + BYTE e32_res3[12]; + DWORD e32_winresoff; + DWORD e32_winreslen; + WORD e32_devid; + WORD e32_ddkver; +} IMAGE_VXD_HEADER, *PIMAGE_VXD_HEADER; + +/* These defines describe the meanings of the bits in the + Characteristics field */ + +#define IMAGE_FILE_RELOCS_STRIPPED 0x0001 /* No relocation info */ +#define IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 +#define IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 +#define IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 +#define IMAGE_FILE_AGGRESIVE_WS_TRIM 0x0010 +#define IMAGE_FILE_LARGE_ADDRESS_AWARE 0x0020 +#define IMAGE_FILE_16BIT_MACHINE 0x0040 +#define IMAGE_FILE_BYTES_REVERSED_LO 0x0080 +#define IMAGE_FILE_32BIT_MACHINE 0x0100 +#define IMAGE_FILE_DEBUG_STRIPPED 0x0200 +#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP 0x0400 +#define IMAGE_FILE_NET_RUN_FROM_SWAP 0x0800 +#define IMAGE_FILE_SYSTEM 0x1000 +#define IMAGE_FILE_DLL 0x2000 +#define IMAGE_FILE_UP_SYSTEM_ONLY 0x4000 +#define IMAGE_FILE_BYTES_REVERSED_HI 0x8000 + +/* These are the settings of the Machine field. */ +#define IMAGE_FILE_MACHINE_UNKNOWN 0 +#define IMAGE_FILE_MACHINE_I860 0x014d +#define IMAGE_FILE_MACHINE_I386 0x014c +#define IMAGE_FILE_MACHINE_R3000 0x0162 +#define IMAGE_FILE_MACHINE_R4000 0x0166 +#define IMAGE_FILE_MACHINE_R10000 0x0168 +#define IMAGE_FILE_MACHINE_WCEMIPSV2 0x0169 +#define IMAGE_FILE_MACHINE_ALPHA 0x0184 +#define IMAGE_FILE_MACHINE_SH3 0x01a2 +#define IMAGE_FILE_MACHINE_SH3DSP 0x01a3 +#define IMAGE_FILE_MACHINE_SH3E 0x01a4 +#define IMAGE_FILE_MACHINE_SH4 0x01a6 +#define IMAGE_FILE_MACHINE_SH5 0x01a8 +#define IMAGE_FILE_MACHINE_ARM 0x01c0 +#define IMAGE_FILE_MACHINE_THUMB 0x01c2 +#define IMAGE_FILE_MACHINE_AM33 0x01d3 +#define IMAGE_FILE_MACHINE_POWERPC 0x01f0 +#define IMAGE_FILE_MACHINE_POWERPCFP 0x01f1 +#define IMAGE_FILE_MACHINE_IA64 0x0200 +#define IMAGE_FILE_MACHINE_MIPS16 0x0266 +#define IMAGE_FILE_MACHINE_ALPHA64 0x0284 +#define IMAGE_FILE_MACHINE_MIPSFPU 0x0366 +#define IMAGE_FILE_MACHINE_MIPSFPU16 0x0466 +#define IMAGE_FILE_MACHINE_AXP64 IMAGE_FILE_MACHINE_ALPHA64 +#define IMAGE_FILE_MACHINE_TRICORE 0x0520 +#define IMAGE_FILE_MACHINE_CEF 0x0cef +#define IMAGE_FILE_MACHINE_EBC 0x0ebc +#define IMAGE_FILE_MACHINE_AMD64 0x8664 +#define IMAGE_FILE_MACHINE_M32R 0x9041 +#define IMAGE_FILE_MACHINE_CEE 0xc0ee + +#define IMAGE_SIZEOF_FILE_HEADER 20 +#define IMAGE_SIZEOF_ROM_OPTIONAL_HEADER 56 +#define IMAGE_SIZEOF_STD_OPTIONAL_HEADER 28 +#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER32 224 +#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER64 240 +#define IMAGE_SIZEOF_SHORT_NAME 8 +#define IMAGE_SIZEOF_SECTION_HEADER 40 +#define IMAGE_SIZEOF_SYMBOL 18 +#define IMAGE_SIZEOF_AUX_SYMBOL 18 +#define IMAGE_SIZEOF_RELOCATION 10 +#define IMAGE_SIZEOF_BASE_RELOCATION 8 +#define IMAGE_SIZEOF_LINENUMBER 6 +#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60 + +/* Possible Magic values */ +#define IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x010b +#define IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x020b +#define IMAGE_ROM_OPTIONAL_HDR_MAGIC 0x0107 + +#ifdef CONFIG_X86_64 +#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER64 +#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC +#else +#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER32 +#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR32_MAGIC +#endif + +/* These are indexes into the DataDirectory array */ +#define IMAGE_FILE_EXPORT_DIRECTORY 0 +#define IMAGE_FILE_IMPORT_DIRECTORY 1 +#define IMAGE_FILE_RESOURCE_DIRECTORY 2 +#define IMAGE_FILE_EXCEPTION_DIRECTORY 3 +#define IMAGE_FILE_SECURITY_DIRECTORY 4 +#define IMAGE_FILE_BASE_RELOCATION_TABLE 5 +#define IMAGE_FILE_DEBUG_DIRECTORY 6 +#define IMAGE_FILE_DESCRIPTION_STRING 7 +#define IMAGE_FILE_MACHINE_VALUE 8 /* Mips */ +#define IMAGE_FILE_THREAD_LOCAL_STORAGE 9 +#define IMAGE_FILE_CALLBACK_DIRECTORY 10 + +/* Directory Entries, indices into the DataDirectory array */ + +#define IMAGE_DIRECTORY_ENTRY_EXPORT 0 +#define IMAGE_DIRECTORY_ENTRY_IMPORT 1 +#define IMAGE_DIRECTORY_ENTRY_RESOURCE 2 +#define IMAGE_DIRECTORY_ENTRY_EXCEPTION 3 +#define IMAGE_DIRECTORY_ENTRY_SECURITY 4 +#define IMAGE_DIRECTORY_ENTRY_BASERELOC 5 +#define IMAGE_DIRECTORY_ENTRY_DEBUG 6 +#define IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7 +#define IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8 /* (MIPS GP) */ +#define IMAGE_DIRECTORY_ENTRY_TLS 9 +#define IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10 +#define IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT 11 +#define IMAGE_DIRECTORY_ENTRY_IAT 12 /* Import Address Table */ +#define IMAGE_DIRECTORY_ENTRY_DELAY_IMPORT 13 +#define IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR 14 + +/* Subsystem Values */ + +#define IMAGE_SUBSYSTEM_UNKNOWN 0 +#define IMAGE_SUBSYSTEM_NATIVE 1 +#define IMAGE_SUBSYSTEM_WINDOWS_GUI 2 /* Windows GUI subsystem */ +#define IMAGE_SUBSYSTEM_WINDOWS_CUI 3 /* Windows character subsystem */ +#define IMAGE_SUBSYSTEM_OS2_CUI 5 +#define IMAGE_SUBSYSTEM_POSIX_CUI 7 +#define IMAGE_SUBSYSTEM_NATIVE_WINDOWS 8 /* native Win9x driver */ +#define IMAGE_SUBSYSTEM_WINDOWS_CE_GUI 9 /* Windows CE subsystem */ +#define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 +#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 +#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 +#define IMAGE_SUBSYSTEM_EFI_ROM 13 +#define IMAGE_SUBSYSTEM_XBOX 14 + +typedef struct _IMAGE_FILE_HEADER { + WORD Machine; + WORD NumberOfSections; + DWORD TimeDateStamp; + DWORD PointerToSymbolTable; + DWORD NumberOfSymbols; + WORD SizeOfOptionalHeader; + WORD Characteristics; +} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER; + +typedef struct _IMAGE_DATA_DIRECTORY { + DWORD VirtualAddress; + DWORD Size; +} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY; + +#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16 + +typedef struct _IMAGE_OPTIONAL_HEADER32 { + + /* Standard fields */ + + WORD Magic; + BYTE MajorLinkerVersion; + BYTE MinorLinkerVersion; + DWORD SizeOfCode; + DWORD SizeOfInitializedData; + DWORD SizeOfUninitializedData; + DWORD AddressOfEntryPoint; + DWORD BaseOfCode; + DWORD BaseOfData; + + /* NT additional fields */ + DWORD ImageBase; + DWORD SectionAlignment; + DWORD FileAlignment; + WORD MajorOperatingSystemVersion; + WORD MinorOperatingSystemVersion; + WORD MajorImageVersion; + WORD MinorImageVersion; + WORD MajorSubsystemVersion; + WORD MinorSubsystemVersion; + DWORD Win32VersionValue; + DWORD SizeOfImage; + DWORD SizeOfHeaders; + DWORD CheckSum; + WORD Subsystem; + WORD DllCharacteristics; + DWORD SizeOfStackReserve; + DWORD SizeOfStackCommit; + DWORD SizeOfHeapReserve; + DWORD SizeOfHeapCommit; + DWORD LoaderFlags; + DWORD NumberOfRvaAndSizes; + IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; +} IMAGE_OPTIONAL_HEADER32, *PIMAGE_OPTIONAL_HEADER32; + +typedef struct _IMAGE_OPTIONAL_HEADER64 { + + /* Standard fields */ + + WORD Magic; + BYTE MajorLinkerVersion; + BYTE MinorLinkerVersion; + DWORD SizeOfCode; + DWORD SizeOfInitializedData; + DWORD SizeOfUninitializedData; + DWORD AddressOfEntryPoint; + DWORD BaseOfCode; + + /* NT additional fields */ + ULONGLONG ImageBase; + DWORD SectionAlignment; + DWORD FileAlignment; + WORD MajorOperatingSystemVersion; + WORD MinorOperatingSystemVersion; + WORD MajorImageVersion; + WORD MinorImageVersion; + WORD MajorSubsystemVersion; + WORD MinorSubsystemVersion; + DWORD Win32VersionValue; + DWORD SizeOfImage; + DWORD SizeOfHeaders; + DWORD CheckSum; + WORD Subsystem; + WORD DllCharacteristics; + ULONGLONG SizeOfStackReserve; + ULONGLONG SizeOfStackCommit; + ULONGLONG SizeOfHeapReserve; + ULONGLONG SizeOfHeapCommit; + DWORD LoaderFlags; + DWORD NumberOfRvaAndSizes; + IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES]; +} IMAGE_OPTIONAL_HEADER64, *PIMAGE_OPTIONAL_HEADER64; + +#ifdef CONFIG_X86_64 +typedef IMAGE_OPTIONAL_HEADER64 IMAGE_OPTIONAL_HEADER; +typedef PIMAGE_OPTIONAL_HEADER64 PIMAGE_OPTIONAL_HEADER; +#else +typedef IMAGE_OPTIONAL_HEADER32 IMAGE_OPTIONAL_HEADER; +typedef PIMAGE_OPTIONAL_HEADER32 PIMAGE_OPTIONAL_HEADER; +#endif + +typedef struct _IMAGE_NT_HEADERS32 { + DWORD Signature; /* "PE"\0\0 */ /* 0x00 */ + IMAGE_FILE_HEADER FileHeader; /* 0x04 */ + IMAGE_OPTIONAL_HEADER32 OptionalHeader; /* 0x18 */ +} IMAGE_NT_HEADERS32, *PIMAGE_NT_HEADERS32; + +typedef struct _IMAGE_NT_HEADERS64 { + DWORD Signature; /* "PE"\0\0 */ /* 0x00 */ + IMAGE_FILE_HEADER FileHeader; /* 0x04 */ + IMAGE_OPTIONAL_HEADER64 OptionalHeader; /* 0x18 */ +} IMAGE_NT_HEADERS64, *PIMAGE_NT_HEADERS64; + +#ifdef CONFIG_X86_64 +typedef IMAGE_NT_HEADERS64 IMAGE_NT_HEADERS; +typedef PIMAGE_NT_HEADERS64 PIMAGE_NT_HEADERS; +#else +typedef IMAGE_NT_HEADERS32 IMAGE_NT_HEADERS; +typedef PIMAGE_NT_HEADERS32 PIMAGE_NT_HEADERS; +#endif + +#define IMAGE_SIZEOF_SHORT_NAME 8 + +typedef struct _IMAGE_SECTION_HEADER { + BYTE Name[IMAGE_SIZEOF_SHORT_NAME]; + union { + DWORD PhysicalAddress; + DWORD VirtualSize; + } Misc; + DWORD VirtualAddress; + DWORD SizeOfRawData; + DWORD PointerToRawData; + DWORD PointerToRelocations; + DWORD PointerToLinenumbers; + WORD NumberOfRelocations; + WORD NumberOfLinenumbers; + DWORD Characteristics; +} IMAGE_SECTION_HEADER, *PIMAGE_SECTION_HEADER; + +#define IMAGE_SIZEOF_SECTION_HEADER 40 + +#define IMAGE_FIRST_SECTION(ntheader) \ +((PIMAGE_SECTION_HEADER)((LPBYTE)&((PIMAGE_NT_HEADERS)(ntheader))->OptionalHeader + \ +((PIMAGE_NT_HEADERS)(ntheader))->FileHeader.SizeOfOptionalHeader)) + +/* These defines are for the Characteristics bitfield. */ +/* #define IMAGE_SCN_TYPE_REG 0x00000000 - Reserved */ +/* #define IMAGE_SCN_TYPE_DSECT 0x00000001 - Reserved */ +/* #define IMAGE_SCN_TYPE_NOLOAD 0x00000002 - Reserved */ +/* #define IMAGE_SCN_TYPE_GROUP 0x00000004 - Reserved */ +#define IMAGE_SCN_TYPE_NO_PAD 0x00000008 /* Reserved */ +/* #define IMAGE_SCN_TYPE_COPY 0x00000010 - Reserved */ + +#define IMAGE_SCN_CNT_CODE 0x00000020 +#define IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040 +#define IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080 + +#define IMAGE_SCN_LNK_OTHER 0x00000100 +#define IMAGE_SCN_LNK_INFO 0x00000200 +/* #define IMAGE_SCN_TYPE_OVER 0x00000400 - Reserved */ +#define IMAGE_SCN_LNK_REMOVE 0x00000800 +#define IMAGE_SCN_LNK_COMDAT 0x00001000 + +/* 0x00002000 - Reserved */ +/* #define IMAGE_SCN_MEM_PROTECTED 0x00004000 - Obsolete */ +#define IMAGE_SCN_MEM_FARDATA 0x00008000 + +/* #define IMAGE_SCN_MEM_SYSHEAP 0x00010000 - Obsolete */ +#define IMAGE_SCN_MEM_PURGEABLE 0x00020000 +#define IMAGE_SCN_MEM_16BIT 0x00020000 +#define IMAGE_SCN_MEM_LOCKED 0x00040000 +#define IMAGE_SCN_MEM_PRELOAD 0x00080000 + +#define IMAGE_SCN_ALIGN_1BYTES 0x00100000 +#define IMAGE_SCN_ALIGN_2BYTES 0x00200000 +#define IMAGE_SCN_ALIGN_4BYTES 0x00300000 +#define IMAGE_SCN_ALIGN_8BYTES 0x00400000 +#define IMAGE_SCN_ALIGN_16BYTES 0x00500000 /* Default */ +#define IMAGE_SCN_ALIGN_32BYTES 0x00600000 +#define IMAGE_SCN_ALIGN_64BYTES 0x00700000 +#define IMAGE_SCN_ALIGN_128BYTES 0x00800000 +#define IMAGE_SCN_ALIGN_256BYTES 0x00900000 +#define IMAGE_SCN_ALIGN_512BYTES 0x00A00000 +#define IMAGE_SCN_ALIGN_1024BYTES 0x00B00000 +#define IMAGE_SCN_ALIGN_2048BYTES 0x00C00000 +#define IMAGE_SCN_ALIGN_4096BYTES 0x00D00000 +#define IMAGE_SCN_ALIGN_8192BYTES 0x00E00000 +/* 0x00F00000 - Unused */ +#define IMAGE_SCN_ALIGN_MASK 0x00F00000 + +#define IMAGE_SCN_LNK_NRELOC_OVFL 0x01000000 + + +#define IMAGE_SCN_MEM_DISCARDABLE 0x02000000 +#define IMAGE_SCN_MEM_NOT_CACHED 0x04000000 +#define IMAGE_SCN_MEM_NOT_PAGED 0x08000000 +#define IMAGE_SCN_MEM_SHARED 0x10000000 +#define IMAGE_SCN_MEM_EXECUTE 0x20000000 +#define IMAGE_SCN_MEM_READ 0x40000000 +#define IMAGE_SCN_MEM_WRITE 0x80000000 + +typedef struct _IMAGE_SYMBOL { + union { + BYTE ShortName[8]; + struct { + DWORD Short; + DWORD Long; + } Name; + DWORD LongName[2]; + } N; + DWORD Value; + SHORT SectionNumber; + WORD Type; + BYTE StorageClass; + BYTE NumberOfAuxSymbols; +} IMAGE_SYMBOL; +typedef IMAGE_SYMBOL *PIMAGE_SYMBOL; + +#define IMAGE_SIZEOF_SYMBOL 18 + +typedef struct _IMAGE_LINENUMBER { + union { + DWORD SymbolTableIndex; + DWORD VirtualAddress; + } Type; + WORD Linenumber; +} IMAGE_LINENUMBER; +typedef IMAGE_LINENUMBER *PIMAGE_LINENUMBER; + +#define IMAGE_SIZEOF_LINENUMBER 6 + +typedef union _IMAGE_AUX_SYMBOL { + struct { + DWORD TagIndex; + union { + struct { + WORD Linenumber; + WORD Size; + } LnSz; + DWORD TotalSize; + } Misc; + union { + struct { + DWORD PointerToLinenumber; + DWORD PointerToNextFunction; + } Function; + struct { + WORD Dimension[4]; + } Array; + } FcnAry; + WORD TvIndex; + } Sym; + struct { + BYTE Name[IMAGE_SIZEOF_SYMBOL]; + } File; + struct { + DWORD Length; + WORD NumberOfRelocations; + WORD NumberOfLinenumbers; + DWORD CheckSum; + SHORT Number; + BYTE Selection; + } Section; +} IMAGE_AUX_SYMBOL; +typedef IMAGE_AUX_SYMBOL *PIMAGE_AUX_SYMBOL; + +#define IMAGE_SIZEOF_AUX_SYMBOL 18 + +#define IMAGE_SYM_UNDEFINED (SHORT)0 +#define IMAGE_SYM_ABSOLUTE (SHORT)-1 +#define IMAGE_SYM_DEBUG (SHORT)-2 + +#define IMAGE_SYM_TYPE_NULL 0x0000 +#define IMAGE_SYM_TYPE_VOID 0x0001 +#define IMAGE_SYM_TYPE_CHAR 0x0002 +#define IMAGE_SYM_TYPE_SHORT 0x0003 +#define IMAGE_SYM_TYPE_INT 0x0004 +#define IMAGE_SYM_TYPE_LONG 0x0005 +#define IMAGE_SYM_TYPE_FLOAT 0x0006 +#define IMAGE_SYM_TYPE_DOUBLE 0x0007 +#define IMAGE_SYM_TYPE_STRUCT 0x0008 +#define IMAGE_SYM_TYPE_UNION 0x0009 +#define IMAGE_SYM_TYPE_ENUM 0x000A +#define IMAGE_SYM_TYPE_MOE 0x000B +#define IMAGE_SYM_TYPE_BYTE 0x000C +#define IMAGE_SYM_TYPE_WORD 0x000D +#define IMAGE_SYM_TYPE_UINT 0x000E +#define IMAGE_SYM_TYPE_DWORD 0x000F +#define IMAGE_SYM_TYPE_PCODE 0x8000 + +#define IMAGE_SYM_DTYPE_NULL 0 +#define IMAGE_SYM_DTYPE_POINTER 1 +#define IMAGE_SYM_DTYPE_FUNCTION 2 +#define IMAGE_SYM_DTYPE_ARRAY 3 + +#define IMAGE_SYM_CLASS_END_OF_FUNCTION (BYTE )-1 +#define IMAGE_SYM_CLASS_NULL 0x0000 +#define IMAGE_SYM_CLASS_AUTOMATIC 0x0001 +#define IMAGE_SYM_CLASS_EXTERNAL 0x0002 +#define IMAGE_SYM_CLASS_STATIC 0x0003 +#define IMAGE_SYM_CLASS_REGISTER 0x0004 +#define IMAGE_SYM_CLASS_EXTERNAL_DEF 0x0005 +#define IMAGE_SYM_CLASS_LABEL 0x0006 +#define IMAGE_SYM_CLASS_UNDEFINED_LABEL 0x0007 +#define IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 0x0008 +#define IMAGE_SYM_CLASS_ARGUMENT 0x0009 +#define IMAGE_SYM_CLASS_STRUCT_TAG 0x000A +#define IMAGE_SYM_CLASS_MEMBER_OF_UNION 0x000B +#define IMAGE_SYM_CLASS_UNION_TAG 0x000C +#define IMAGE_SYM_CLASS_TYPE_DEFINITION 0x000D +#define IMAGE_SYM_CLASS_UNDEFINED_STATIC 0x000E +#define IMAGE_SYM_CLASS_ENUM_TAG 0x000F +#define IMAGE_SYM_CLASS_MEMBER_OF_ENUM 0x0010 +#define IMAGE_SYM_CLASS_REGISTER_PARAM 0x0011 +#define IMAGE_SYM_CLASS_BIT_FIELD 0x0012 + +#define IMAGE_SYM_CLASS_FAR_EXTERNAL 0x0044 +#define IMAGE_SYM_CLASS_BLOCK 0x0064 +#define IMAGE_SYM_CLASS_FUNCTION 0x0065 +#define IMAGE_SYM_CLASS_END_OF_STRUCT 0x0066 +#define IMAGE_SYM_CLASS_FILE 0x0067 +#define IMAGE_SYM_CLASS_SECTION 0x0068 +#define IMAGE_SYM_CLASS_WEAK_EXTERNAL 0x0069 + +#define N_BTMASK 0x000F +#define N_TMASK 0x0030 +#define N_TMASK1 0x00C0 +#define N_TMASK2 0x00F0 +#define N_BTSHFT 4 +#define N_TSHIFT 2 + +#define BTYPE(x) ((x) & N_BTMASK) + +#ifndef ISPTR +#define ISPTR(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_POINTER << N_BTSHFT)) +#endif + +#ifndef ISFCN +#define ISFCN(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_FUNCTION << N_BTSHFT)) +#endif + +#ifndef ISARY +#define ISARY(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_ARRAY << N_BTSHFT)) +#endif + +#ifndef ISTAG +#define ISTAG(x) ((x)==IMAGE_SYM_CLASS_STRUCT_TAG || (x)==IMAGE_SYM_CLASS_UNION_TAG || (x)==IMAGE_SYM_CLASS_ENUM_TAG) +#endif + +#ifndef INCREF +#define INCREF(x) ((((x)&~N_BTMASK)<>N_TSHIFT)&~N_BTMASK)|((x)&N_BTMASK)) +#endif + +#define IMAGE_COMDAT_SELECT_NODUPLICATES 1 +#define IMAGE_COMDAT_SELECT_ANY 2 +#define IMAGE_COMDAT_SELECT_SAME_SIZE 3 +#define IMAGE_COMDAT_SELECT_EXACT_MATCH 4 +#define IMAGE_COMDAT_SELECT_ASSOCIATIVE 5 +#define IMAGE_COMDAT_SELECT_LARGEST 6 +#define IMAGE_COMDAT_SELECT_NEWEST 7 + +#define IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY 1 +#define IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2 +#define IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3 + +/* Export module directory */ + +typedef struct _IMAGE_EXPORT_DIRECTORY { + DWORD Characteristics; + DWORD TimeDateStamp; + WORD MajorVersion; + WORD MinorVersion; + DWORD Name; + DWORD Base; + DWORD NumberOfFunctions; + DWORD NumberOfNames; + DWORD AddressOfFunctions; + DWORD AddressOfNames; + DWORD AddressOfNameOrdinals; +} IMAGE_EXPORT_DIRECTORY,*PIMAGE_EXPORT_DIRECTORY; + +/* Import name entry */ +typedef struct _IMAGE_IMPORT_BY_NAME { + WORD Hint; + BYTE Name[1]; +} IMAGE_IMPORT_BY_NAME,*PIMAGE_IMPORT_BY_NAME; + +/* Import thunk */ +typedef struct _IMAGE_THUNK_DATA32 { + union { + DWORD ForwarderString; + DWORD Function; + DWORD Ordinal; + DWORD AddressOfData; + } u1; +} IMAGE_THUNK_DATA32,*PIMAGE_THUNK_DATA32; + +typedef struct _IMAGE_THUNK_DATA64 { + union { + ULONGLONG ForwarderString; + ULONGLONG Function; + ULONGLONG Ordinal; + ULONGLONG AddressOfData; + } u1; +} IMAGE_THUNK_DATA64,*PIMAGE_THUNK_DATA64; + +#ifdef CONFIG_X86_64 +typedef IMAGE_THUNK_DATA32 IMAGE_THUNK_DATA; +typedef PIMAGE_THUNK_DATA32 PIMAGE_THUNK_DATA; +#else +typedef IMAGE_THUNK_DATA64 IMAGE_THUNK_DATA; +typedef PIMAGE_THUNK_DATA64 PIMAGE_THUNK_DATA; +#endif + +/* Import module directory */ + +typedef struct packed _IMAGE_IMPORT_DESCRIPTOR { + union { + DWORD Characteristics; /* 0 for terminating null + * import descriptor */ + DWORD OriginalFirstThunk; /* RVA to original unbound + * IAT */ + } u; + DWORD TimeDateStamp; /* 0 if not bound, + * -1 if bound, and real date\time stamp + * in IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT + * (new BIND) + * otherwise date/time stamp of DLL bound to + * (Old BIND) + */ + DWORD ForwarderChain; /* -1 if no forwarders */ + DWORD Name; + /* RVA to IAT (if bound this IAT has actual addresses) */ + DWORD FirstThunk; +} IMAGE_IMPORT_DESCRIPTOR,*PIMAGE_IMPORT_DESCRIPTOR; + +#define IMAGE_ORDINAL_FLAG32 0x80000000 +#define IMAGE_ORDINAL_FLAG64 0x8000000000000000UL +#define IMAGE_SNAP_BY_ORDINAL32(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG32) != 0) +#define IMAGE_SNAP_BY_ORDINAL64(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG64) != 0) +#define IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff) + +#ifdef CONFIG_X86_64 +#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG64 +#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL64 +#else +#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG32 +#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL32 +#endif + +typedef struct _IMAGE_BOUND_IMPORT_DESCRIPTOR +{ + DWORD TimeDateStamp; + WORD OffsetModuleName; + WORD NumberOfModuleForwarderRefs; +/* Array of zero or more IMAGE_BOUND_FORWARDER_REF follows */ +} IMAGE_BOUND_IMPORT_DESCRIPTOR, *PIMAGE_BOUND_IMPORT_DESCRIPTOR; + +typedef struct _IMAGE_BOUND_FORWARDER_REF +{ + DWORD TimeDateStamp; + WORD OffsetModuleName; + WORD Reserved; +} IMAGE_BOUND_FORWARDER_REF, *PIMAGE_BOUND_FORWARDER_REF; + +typedef struct _IMAGE_BASE_RELOCATION +{ + DWORD VirtualAddress; + DWORD SizeOfBlock; + WORD TypeOffset[0]; +} IMAGE_BASE_RELOCATION,*PIMAGE_BASE_RELOCATION; + +typedef struct _IMAGE_RELOCATION +{ + union { + DWORD VirtualAddress; + DWORD RelocCount; + } DUMMYUNIONNAME; + DWORD SymbolTableIndex; + WORD Type; +} IMAGE_RELOCATION, *PIMAGE_RELOCATION; + +#define IMAGE_SIZEOF_RELOCATION 10 + +/* generic relocation types */ +#define IMAGE_REL_BASED_ABSOLUTE 0 +#define IMAGE_REL_BASED_HIGH 1 +#define IMAGE_REL_BASED_LOW 2 +#define IMAGE_REL_BASED_HIGHLOW 3 +#define IMAGE_REL_BASED_HIGHADJ 4 +#define IMAGE_REL_BASED_MIPS_JMPADDR 5 +#define IMAGE_REL_BASED_SECTION 6 +#define IMAGE_REL_BASED_REL 7 +#define IMAGE_REL_BASED_MIPS_JMPADDR16 9 +#define IMAGE_REL_BASED_IA64_IMM64 9 /* yes, 9 too */ +#define IMAGE_REL_BASED_DIR64 10 +#define IMAGE_REL_BASED_HIGH3ADJ 11 + +/* I386 relocation types */ +#define IMAGE_REL_I386_ABSOLUTE 0 +#define IMAGE_REL_I386_DIR16 1 +#define IMAGE_REL_I386_REL16 2 +#define IMAGE_REL_I386_DIR32 6 +#define IMAGE_REL_I386_DIR32NB 7 +#define IMAGE_REL_I386_SEG12 9 +#define IMAGE_REL_I386_SECTION 10 +#define IMAGE_REL_I386_SECREL 11 +#define IMAGE_REL_I386_REL32 20 + +/* MIPS relocation types */ +#define IMAGE_REL_MIPS_ABSOLUTE 0x0000 +#define IMAGE_REL_MIPS_REFHALF 0x0001 +#define IMAGE_REL_MIPS_REFWORD 0x0002 +#define IMAGE_REL_MIPS_JMPADDR 0x0003 +#define IMAGE_REL_MIPS_REFHI 0x0004 +#define IMAGE_REL_MIPS_REFLO 0x0005 +#define IMAGE_REL_MIPS_GPREL 0x0006 +#define IMAGE_REL_MIPS_LITERAL 0x0007 +#define IMAGE_REL_MIPS_SECTION 0x000A +#define IMAGE_REL_MIPS_SECREL 0x000B +#define IMAGE_REL_MIPS_SECRELLO 0x000C +#define IMAGE_REL_MIPS_SECRELHI 0x000D +#define IMAGE_REL_MIPS_JMPADDR16 0x0010 +#define IMAGE_REL_MIPS_REFWORDNB 0x0022 +#define IMAGE_REL_MIPS_PAIR 0x0025 + +/* ALPHA relocation types */ +#define IMAGE_REL_ALPHA_ABSOLUTE 0x0000 +#define IMAGE_REL_ALPHA_REFLONG 0x0001 +#define IMAGE_REL_ALPHA_REFQUAD 0x0002 +#define IMAGE_REL_ALPHA_GPREL 0x0003 +#define IMAGE_REL_ALPHA_LITERAL 0x0004 +#define IMAGE_REL_ALPHA_LITUSE 0x0005 +#define IMAGE_REL_ALPHA_GPDISP 0x0006 +#define IMAGE_REL_ALPHA_BRADDR 0x0007 +#define IMAGE_REL_ALPHA_HINT 0x0008 +#define IMAGE_REL_ALPHA_INLINE_REFLONG 0x0009 +#define IMAGE_REL_ALPHA_REFHI 0x000A +#define IMAGE_REL_ALPHA_REFLO 0x000B +#define IMAGE_REL_ALPHA_PAIR 0x000C +#define IMAGE_REL_ALPHA_MATCH 0x000D +#define IMAGE_REL_ALPHA_SECTION 0x000E +#define IMAGE_REL_ALPHA_SECREL 0x000F +#define IMAGE_REL_ALPHA_REFLONGNB 0x0010 +#define IMAGE_REL_ALPHA_SECRELLO 0x0011 +#define IMAGE_REL_ALPHA_SECRELHI 0x0012 +#define IMAGE_REL_ALPHA_REFQ3 0x0013 +#define IMAGE_REL_ALPHA_REFQ2 0x0014 +#define IMAGE_REL_ALPHA_REFQ1 0x0015 +#define IMAGE_REL_ALPHA_GPRELLO 0x0016 +#define IMAGE_REL_ALPHA_GPRELHI 0x0017 + +/* PowerPC relocation types */ +#define IMAGE_REL_PPC_ABSOLUTE 0x0000 +#define IMAGE_REL_PPC_ADDR64 0x0001 +#define IMAGE_REL_PPC_ADDR 0x0002 +#define IMAGE_REL_PPC_ADDR24 0x0003 +#define IMAGE_REL_PPC_ADDR16 0x0004 +#define IMAGE_REL_PPC_ADDR14 0x0005 +#define IMAGE_REL_PPC_REL24 0x0006 +#define IMAGE_REL_PPC_REL14 0x0007 +#define IMAGE_REL_PPC_TOCREL16 0x0008 +#define IMAGE_REL_PPC_TOCREL14 0x0009 +#define IMAGE_REL_PPC_ADDR32NB 0x000A +#define IMAGE_REL_PPC_SECREL 0x000B +#define IMAGE_REL_PPC_SECTION 0x000C +#define IMAGE_REL_PPC_IFGLUE 0x000D +#define IMAGE_REL_PPC_IMGLUE 0x000E +#define IMAGE_REL_PPC_SECREL16 0x000F +#define IMAGE_REL_PPC_REFHI 0x0010 +#define IMAGE_REL_PPC_REFLO 0x0011 +#define IMAGE_REL_PPC_PAIR 0x0012 +#define IMAGE_REL_PPC_SECRELLO 0x0013 +#define IMAGE_REL_PPC_SECRELHI 0x0014 +#define IMAGE_REL_PPC_GPREL 0x0015 +#define IMAGE_REL_PPC_TYPEMASK 0x00FF +/* modifier bits */ +#define IMAGE_REL_PPC_NEG 0x0100 +#define IMAGE_REL_PPC_BRTAKEN 0x0200 +#define IMAGE_REL_PPC_BRNTAKEN 0x0400 +#define IMAGE_REL_PPC_TOCDEFN 0x0800 + +/* SH3 ? relocation type */ +#define IMAGE_REL_SH3_ABSOLUTE 0x0000 +#define IMAGE_REL_SH3_DIRECT16 0x0001 +#define IMAGE_REL_SH3_DIRECT 0x0002 +#define IMAGE_REL_SH3_DIRECT8 0x0003 +#define IMAGE_REL_SH3_DIRECT8_WORD 0x0004 +#define IMAGE_REL_SH3_DIRECT8_LONG 0x0005 +#define IMAGE_REL_SH3_DIRECT4 0x0006 +#define IMAGE_REL_SH3_DIRECT4_WORD 0x0007 +#define IMAGE_REL_SH3_DIRECT4_LONG 0x0008 +#define IMAGE_REL_SH3_PCREL8_WORD 0x0009 +#define IMAGE_REL_SH3_PCREL8_LONG 0x000A +#define IMAGE_REL_SH3_PCREL12_WORD 0x000B +#define IMAGE_REL_SH3_STARTOF_SECTION 0x000C +#define IMAGE_REL_SH3_SIZEOF_SECTION 0x000D +#define IMAGE_REL_SH3_SECTION 0x000E +#define IMAGE_REL_SH3_SECREL 0x000F +#define IMAGE_REL_SH3_DIRECT32_NB 0x0010 + +/* ARM (Archimedes?) relocation types */ +#define IMAGE_REL_ARM_ABSOLUTE 0x0000 +#define IMAGE_REL_ARM_ADDR 0x0001 +#define IMAGE_REL_ARM_ADDR32NB 0x0002 +#define IMAGE_REL_ARM_BRANCH24 0x0003 +#define IMAGE_REL_ARM_BRANCH11 0x0004 +#define IMAGE_REL_ARM_SECTION 0x000E +#define IMAGE_REL_ARM_SECREL 0x000F + +/* IA64 relocation types */ +#define IMAGE_REL_IA64_ABSOLUTE 0x0000 +#define IMAGE_REL_IA64_IMM14 0x0001 +#define IMAGE_REL_IA64_IMM22 0x0002 +#define IMAGE_REL_IA64_IMM64 0x0003 +#define IMAGE_REL_IA64_DIR 0x0004 +#define IMAGE_REL_IA64_DIR64 0x0005 +#define IMAGE_REL_IA64_PCREL21B 0x0006 +#define IMAGE_REL_IA64_PCREL21M 0x0007 +#define IMAGE_REL_IA64_PCREL21F 0x0008 +#define IMAGE_REL_IA64_GPREL22 0x0009 +#define IMAGE_REL_IA64_LTOFF22 0x000A +#define IMAGE_REL_IA64_SECTION 0x000B +#define IMAGE_REL_IA64_SECREL22 0x000C +#define IMAGE_REL_IA64_SECREL64I 0x000D +#define IMAGE_REL_IA64_SECREL 0x000E +#define IMAGE_REL_IA64_LTOFF64 0x000F +#define IMAGE_REL_IA64_DIR32NB 0x0010 +#define IMAGE_REL_IA64_RESERVED_11 0x0011 +#define IMAGE_REL_IA64_RESERVED_12 0x0012 +#define IMAGE_REL_IA64_RESERVED_13 0x0013 +#define IMAGE_REL_IA64_RESERVED_14 0x0014 +#define IMAGE_REL_IA64_RESERVED_15 0x0015 +#define IMAGE_REL_IA64_RESERVED_16 0x0016 +#define IMAGE_REL_IA64_ADDEND 0x001F + +/* archive format */ + +#define IMAGE_ARCHIVE_START_SIZE 8 +#define IMAGE_ARCHIVE_START "!\n" +#define IMAGE_ARCHIVE_END "`\n" +#define IMAGE_ARCHIVE_PAD "\n" +#define IMAGE_ARCHIVE_LINKER_MEMBER "/ " +#define IMAGE_ARCHIVE_LONGNAMES_MEMBER "// " + +typedef struct _IMAGE_ARCHIVE_MEMBER_HEADER +{ + BYTE Name[16]; + BYTE Date[12]; + BYTE UserID[6]; + BYTE GroupID[6]; + BYTE Mode[8]; + BYTE Size[10]; + BYTE EndHeader[2]; +} IMAGE_ARCHIVE_MEMBER_HEADER, *PIMAGE_ARCHIVE_MEMBER_HEADER; + +#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60 + +/* + * Resource directory stuff + */ +typedef struct _IMAGE_RESOURCE_DIRECTORY { + DWORD Characteristics; + DWORD TimeDateStamp; + WORD MajorVersion; + WORD MinorVersion; + WORD NumberOfNamedEntries; + WORD NumberOfIdEntries; + /* IMAGE_RESOURCE_DIRECTORY_ENTRY DirectoryEntries[]; */ +} IMAGE_RESOURCE_DIRECTORY,*PIMAGE_RESOURCE_DIRECTORY; + +#define IMAGE_RESOURCE_NAME_IS_STRING 0x80000000 +#define IMAGE_RESOURCE_DATA_IS_DIRECTORY 0x80000000 + +typedef struct _IMAGE_RESOURCE_DIRECTORY_ENTRY { + union { + struct { +#ifdef BITFIELDS_BIGENDIAN + unsigned NameIsString:1; + unsigned NameOffset:31; +#else + unsigned NameOffset:31; + unsigned NameIsString:1; +#endif + } DUMMYSTRUCTNAME1; + DWORD Name; + struct { +#ifdef WORDS_BIGENDIAN + WORD __pad; + WORD Id; +#else + WORD Id; + WORD __pad; +#endif + } DUMMYSTRUCTNAME2; + } DUMMYUNIONNAME1; + union { + DWORD OffsetToData; + struct { +#ifdef BITFIELDS_BIGENDIAN + unsigned DataIsDirectory:1; + unsigned OffsetToDirectory:31; +#else + unsigned OffsetToDirectory:31; + unsigned DataIsDirectory:1; +#endif + } DUMMYSTRUCTNAME3; + } DUMMYUNIONNAME2; +} IMAGE_RESOURCE_DIRECTORY_ENTRY,*PIMAGE_RESOURCE_DIRECTORY_ENTRY; + + +typedef struct _IMAGE_RESOURCE_DIRECTORY_STRING { + WORD Length; + CHAR NameString[ 1 ]; +} IMAGE_RESOURCE_DIRECTORY_STRING,*PIMAGE_RESOURCE_DIRECTORY_STRING; + --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/loader.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/loader.c @@ -0,0 +1,877 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ndis.h" +#include "loader.h" +#include "wrapndis.h" +#include "pnp.h" + +#include +#include +#include +#include + +/* + Network adapter: ClassGuid = {4d36e972-e325-11ce-bfc1-08002be10318} + Network client: ClassGuid = {4d36e973-e325-11ce-bfc1-08002be10318} + PCMCIA adapter: ClassGuid = {4d36e977-e325-11ce-bfc1-08002be10318} + USB: ClassGuid = {36fc9e60-c465-11cf-8056-444553540000} +*/ + +/* the indices used here must match macros WRAP_NDIS_DEVICE etc. */ +static struct guid class_guids[] = { + /* Network */ + {0x4d36e972, 0xe325, 0x11ce, }, + /* USB WDM */ + {0x36fc9e60, 0xc465, 0x11cf, }, + /* Bluetooth */ + {0xe0cbf06c, 0xcd8b, 0x4647, }, + /* ivtcorporatino.com's bluetooth device claims this is + * bluetooth guid */ + {0xf12d3cf8, 0xb11d, 0x457e, }, +}; + +struct semaphore loader_mutex; +static struct completion loader_complete; + +static struct nt_list wrap_devices; +static struct nt_list wrap_drivers; + +static int wrap_device_type(int data1) +{ + int i; + for (i = 0; i < sizeof(class_guids) / sizeof(class_guids[0]); i++) + if (data1 == class_guids[i].data1) + return i; + ERROR("unknown device: 0x%x\n", data1); + return -1; +} + +/* load driver for given device, if not already loaded */ +struct wrap_driver *load_wrap_driver(struct wrap_device *wd) +{ + int ret; + struct nt_list *cur; + struct wrap_driver *wrap_driver; + + ENTER1("device: %04X:%04X:%04X:%04X", wd->vendor, wd->device, + wd->subvendor, wd->subdevice); + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + EXIT1(return NULL); + } + wrap_driver = NULL; + nt_list_for_each(cur, &wrap_drivers) { + wrap_driver = container_of(cur, struct wrap_driver, list); + if (!stricmp(wrap_driver->name, wd->driver_name)) { + TRACE1("driver %s already loaded", wrap_driver->name); + break; + } else + wrap_driver = NULL; + } + up(&loader_mutex); + + if (!wrap_driver) { + char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DRIVER, +#if defined(DEBUG) && DEBUG >= 1 + "1", +#else + "0", +#endif + UTILS_VERSION, wd->driver_name, + wd->conf_file_name, NULL}; + char *env[] = {NULL}; + + TRACE1("loading driver %s", wd->driver_name); + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + EXIT1(return NULL); + } + INIT_COMPLETION(loader_complete); + ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1); + if (ret) { + up(&loader_mutex); + ERROR("couldn't load driver %s; check system log " + "for messages from 'loadndisdriver'", + wd->driver_name); + EXIT1(return NULL); + } + wait_for_completion(&loader_complete); + TRACE1("%s", wd->driver_name); + wrap_driver = NULL; + nt_list_for_each(cur, &wrap_drivers) { + wrap_driver = container_of(cur, struct wrap_driver, + list); + if (!stricmp(wrap_driver->name, wd->driver_name)) { + wd->driver = wrap_driver; + break; + } else + wrap_driver = NULL; + } + up(&loader_mutex); + if (wrap_driver) + TRACE1("driver %s is loaded", wrap_driver->name); + else + ERROR("couldn't load driver '%s'", wd->driver_name); + } + EXIT1(return wrap_driver); +} + +/* load the driver files from userspace. */ +static int load_sys_files(struct wrap_driver *driver, + struct load_driver *load_driver) +{ + int i, err; + + TRACE1("num_pe_images = %d", load_driver->num_sys_files); + TRACE1("loading driver: %s", load_driver->name); + strncpy(driver->name, load_driver->name, sizeof(driver->name)); + driver->name[sizeof(driver->name)-1] = 0; + TRACE1("driver: %s", driver->name); + err = 0; + driver->num_pe_images = 0; + for (i = 0; i < load_driver->num_sys_files; i++) { + struct pe_image *pe_image; + pe_image = &driver->pe_images[driver->num_pe_images]; + + strncpy(pe_image->name, load_driver->sys_files[i].name, + sizeof(pe_image->name)); + pe_image->name[sizeof(pe_image->name)-1] = 0; + TRACE1("image size: %lu bytes", + (unsigned long)load_driver->sys_files[i].size); + +#ifdef CONFIG_X86_64 +#ifdef PAGE_KERNEL_EXECUTABLE + pe_image->image = + __vmalloc(load_driver->sys_files[i].size, + GFP_KERNEL | __GFP_HIGHMEM, + PAGE_KERNEL_EXECUTABLE); +#elif defined PAGE_KERNEL_EXEC + pe_image->image = + __vmalloc(load_driver->sys_files[i].size, + GFP_KERNEL | __GFP_HIGHMEM, + PAGE_KERNEL_EXEC); +#else +#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC +#endif +#else + /* hate to play with kernel macros, but PAGE_KERNEL_EXEC is + * not available to modules! */ +#ifdef cpu_has_nx + if (cpu_has_nx) + pe_image->image = + __vmalloc(load_driver->sys_files[i].size, + GFP_KERNEL | __GFP_HIGHMEM, + __pgprot(__PAGE_KERNEL & ~_PAGE_NX)); + else + pe_image->image = + vmalloc(load_driver->sys_files[i].size); +#else + pe_image->image = + vmalloc(load_driver->sys_files[i].size); +#endif +#endif + if (!pe_image->image) { + ERROR("couldn't allocate memory"); + err = -ENOMEM; + break; + } + TRACE1("image is at %p", pe_image->image); + + if (copy_from_user(pe_image->image, + load_driver->sys_files[i].data, + load_driver->sys_files[i].size)) { + ERROR("couldn't load file %s", + load_driver->sys_files[i].name); + err = -EFAULT; + break; + } + pe_image->size = load_driver->sys_files[i].size; + driver->num_pe_images++; + } + + if (!err && link_pe_images(driver->pe_images, driver->num_pe_images)) { + ERROR("couldn't prepare driver '%s'", load_driver->name); + err = -EINVAL; + } + + if (driver->num_pe_images < load_driver->num_sys_files || err) { + for (i = 0; i < driver->num_pe_images; i++) + if (driver->pe_images[i].image) + vfree(driver->pe_images[i].image); + driver->num_pe_images = 0; + EXIT1(return err); + } else + EXIT1(return 0); +} + +struct wrap_bin_file *get_bin_file(char *bin_file_name) +{ + int i = 0; + struct wrap_driver *driver, *cur; + + ENTER1("%s", bin_file_name); + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + EXIT1(return NULL); + } + driver = NULL; + nt_list_for_each_entry(cur, &wrap_drivers, list) { + for (i = 0; i < cur->num_bin_files; i++) + if (!stricmp(cur->bin_files[i].name, bin_file_name)) { + driver = cur; + break; + } + if (driver) + break; + } + up(&loader_mutex); + if (!driver) { + TRACE1("coudln't find bin file '%s'", bin_file_name); + return NULL; + } + + if (!driver->bin_files[i].data) { + char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_BIN_FILE, +#if defined(DEBUG) && DEBUG >= 1 + "1", +#else + "0", +#endif + UTILS_VERSION, driver->name, + driver->bin_files[i].name, NULL}; + char *env[] = {NULL}; + int ret; + + TRACE1("loading bin file %s/%s", driver->name, + driver->bin_files[i].name); + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + EXIT1(return NULL); + } + INIT_COMPLETION(loader_complete); + ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1); + if (ret) { + up(&loader_mutex); + ERROR("couldn't load file %s/%s; check system log " + "for messages from 'loadndisdriver' (%d)", + driver->name, driver->bin_files[i].name, ret); + EXIT1(return NULL); + } + wait_for_completion(&loader_complete); + up(&loader_mutex); + if (!driver->bin_files[i].data) { + WARNING("couldn't load binary file %s", + driver->bin_files[i].name); + EXIT1(return NULL); + } + } + EXIT2(return &(driver->bin_files[i])); +} + +/* called with loader_mutex down */ +static int add_bin_file(struct load_driver_file *driver_file) +{ + struct wrap_driver *driver, *cur; + struct wrap_bin_file *bin_file; + int i = 0; + + driver = NULL; + nt_list_for_each_entry(cur, &wrap_drivers, list) { + for (i = 0; i < cur->num_bin_files; i++) + if (!stricmp(cur->bin_files[i].name, + driver_file->name)) { + driver = cur; + break; + } + if (driver) + break; + } + if (!driver) { + ERROR("couldn't find %s", driver_file->name); + return -EINVAL; + } + bin_file = &driver->bin_files[i]; + strncpy(bin_file->name, driver_file->name, sizeof(bin_file->name)); + bin_file->name[sizeof(bin_file->name)-1] = 0; + bin_file->data = vmalloc(driver_file->size); + if (!bin_file->data) { + ERROR("couldn't allocate memory"); + return -ENOMEM; + } + bin_file->size = driver_file->size; + if (copy_from_user(bin_file->data, driver_file->data, bin_file->size)) { + ERROR("couldn't copy data"); + free_bin_file(bin_file); + return -EFAULT; + } + return 0; +} + +void free_bin_file(struct wrap_bin_file *bin_file) +{ + TRACE2("unloading %s", bin_file->name); + if (bin_file->data) + vfree(bin_file->data); + bin_file->data = NULL; + bin_file->size = 0; + EXIT2(return); +} + +/* load firmware files from userspace */ +static int load_bin_files_info(struct wrap_driver *driver, + struct load_driver *load_driver) +{ + struct wrap_bin_file *bin_files; + int i; + + ENTER1("%s, %d", load_driver->name, load_driver->num_bin_files); + driver->num_bin_files = 0; + driver->bin_files = NULL; + if (load_driver->num_bin_files == 0) + EXIT1(return 0); + bin_files = kzalloc(load_driver->num_bin_files * sizeof(*bin_files), + GFP_KERNEL); + if (!bin_files) { + ERROR("couldn't allocate memory"); + EXIT1(return -ENOMEM); + } + + for (i = 0; i < load_driver->num_bin_files; i++) { + strncpy(bin_files[i].name, load_driver->bin_files[i].name, + sizeof(bin_files[i].name)); + bin_files[i].name[sizeof(bin_files[i].name)-1] = 0; + TRACE2("loaded bin file %s", bin_files[i].name); + } + driver->num_bin_files = load_driver->num_bin_files; + driver->bin_files = bin_files; + EXIT1(return 0); +} + +/* load settnigs for a device. called with loader_mutex down */ +static int load_settings(struct wrap_driver *wrap_driver, + struct load_driver *load_driver) +{ + int i, num_settings; + + ENTER1("%p, %p", wrap_driver, load_driver); + + num_settings = 0; + for (i = 0; i < load_driver->num_settings; i++) { + struct load_device_setting *load_setting = + &load_driver->settings[i]; + struct wrap_device_setting *setting; + ULONG data1; + + setting = kzalloc(sizeof(*setting), GFP_KERNEL); + if (!setting) { + ERROR("couldn't allocate memory"); + break; + } + strncpy(setting->name, load_setting->name, + sizeof(setting->name)); + setting->name[sizeof(setting->name)-1] = 0; + strncpy(setting->value, load_setting->value, + sizeof(setting->value)); + setting->value[sizeof(setting->value)-1] = 0; + TRACE2("%p: %s=%s", setting, setting->name, setting->value); + + if (strcmp(setting->name, "driver_version") == 0) { + strncpy(wrap_driver->version, setting->value, + sizeof(wrap_driver->version)); + wrap_driver->version[sizeof(wrap_driver->version)-1] = 0; + } else if (strcmp(setting->name, "class_guid") == 0 && + sscanf(setting->value, "%x", &data1) == 1) { + wrap_driver->dev_type = wrap_device_type(data1); + if (wrap_driver->dev_type < 0) { + WARNING("unknown guid: %x", data1); + wrap_driver->dev_type = 0; + } + } + InsertTailList(&wrap_driver->settings, &setting->list); + num_settings++; + } + /* it is not a fatal error if some settings couldn't be loaded */ + if (num_settings > 0) + EXIT1(return 0); + else + EXIT1(return -EINVAL); +} + +void unload_wrap_device(struct wrap_device *wd) +{ + struct nt_list *cur; + ENTER1("unloading device %p (%04X:%04X:%04X:%04X), driver %s", wd, + wd->vendor, wd->device, wd->subvendor, wd->subdevice, + wd->driver_name); + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + while ((cur = RemoveHeadList(&wd->settings))) { + struct wrap_device_setting *setting; + setting = container_of(cur, struct wrap_device_setting, list); + kfree(setting); + } + RemoveEntryList(&wd->list); + up(&loader_mutex); + kfree(wd); + EXIT1(return); +} + +/* should be called with loader_mutex down */ +void unload_wrap_driver(struct wrap_driver *driver) +{ + int i; + struct driver_object *drv_obj; + struct nt_list *cur, *next; + + ENTER1("unloading driver: %s (%p)", driver->name, driver); + TRACE1("freeing %d images", driver->num_pe_images); + drv_obj = driver->drv_obj; + for (i = 0; i < driver->num_pe_images; i++) + if (driver->pe_images[i].image) { + TRACE1("freeing image at %p", + driver->pe_images[i].image); + vfree(driver->pe_images[i].image); + } + + TRACE1("freeing %d bin files", driver->num_bin_files); + for (i = 0; i < driver->num_bin_files; i++) { + TRACE1("freeing image at %p", driver->bin_files[i].data); + if (driver->bin_files[i].data) + vfree(driver->bin_files[i].data); + } + if (driver->bin_files) + kfree(driver->bin_files); + RtlFreeUnicodeString(&drv_obj->name); + RemoveEntryList(&driver->list); + nt_list_for_each_safe(cur, next, &driver->settings) { + struct wrap_device_setting *setting; + struct ndis_configuration_parameter *param; + + setting = container_of(cur, struct wrap_device_setting, list); + TRACE2("%p", setting); + param = setting->encoded; + if (param) { + TRACE2("%p", param); + if (param->type == NdisParameterString) + RtlFreeUnicodeString(¶m->data.string); + ExFreePool(param); + } + kfree(setting); + } + /* this frees driver */ + free_custom_extensions(drv_obj->drv_ext); + kfree(drv_obj->drv_ext); + TRACE1("drv_obj: %p", drv_obj); + + EXIT1(return); +} + +/* call the entry point of the driver */ +static int start_wrap_driver(struct wrap_driver *driver) +{ + int i; + NTSTATUS ret, res; + struct driver_object *drv_obj; + typeof(driver->pe_images[0].entry) entry; + + ENTER1("%s", driver->name); + drv_obj = driver->drv_obj; + for (ret = res = 0, i = 0; i < driver->num_pe_images; i++) + /* dlls are already started by loader */ + if (driver->pe_images[i].type == IMAGE_FILE_EXECUTABLE_IMAGE) { + entry = driver->pe_images[i].entry; + drv_obj->start = driver->pe_images[i].entry; + drv_obj->driver_size = driver->pe_images[i].size; + TRACE1("entry: %p, %p, drv_obj: %p", + entry, *entry, drv_obj); + res = LIN2WIN2(entry, drv_obj, &drv_obj->name); + ret |= res; + TRACE1("entry returns %08X", res); + break; + } + if (ret) { + ERROR("driver initialization failed: %08X", ret); + RtlFreeUnicodeString(&drv_obj->name); + /* this frees ndis_driver */ + free_custom_extensions(drv_obj->drv_ext); + kfree(drv_obj->drv_ext); + TRACE1("drv_obj: %p", drv_obj); + ObDereferenceObject(drv_obj); + EXIT1(return -EINVAL); + } + EXIT1(return 0); +} + +/* + * add driver to list of loaded driver but make sure this driver is + * not loaded before. called with loader_mutex down + */ +static int add_wrap_driver(struct wrap_driver *driver) +{ + struct wrap_driver *tmp; + + ENTER1("name: %s", driver->name); + nt_list_for_each_entry(tmp, &wrap_drivers, list) { + if (stricmp(tmp->name, driver->name) == 0) { + ERROR("cannot add duplicate driver"); + EXIT1(return -EBUSY); + } + } + InsertHeadList(&wrap_drivers, &driver->list); + EXIT1(return 0); +} + +/* load a driver from userspace and initialize it. called with + * loader_mutex down */ +static int load_user_space_driver(struct load_driver *load_driver) +{ + struct driver_object *drv_obj; + struct ansi_string ansi_reg; + struct wrap_driver *wrap_driver = NULL; + + ENTER1("%p", load_driver); + drv_obj = allocate_object(sizeof(*drv_obj), OBJECT_TYPE_DRIVER, NULL); + if (!drv_obj) { + ERROR("couldn't allocate memory"); + EXIT1(return -ENOMEM); + } + TRACE1("drv_obj: %p", drv_obj); + drv_obj->drv_ext = kzalloc(sizeof(*(drv_obj->drv_ext)), GFP_KERNEL); + if (!drv_obj->drv_ext) { + ERROR("couldn't allocate memory"); + ObDereferenceObject(drv_obj); + EXIT1(return -ENOMEM); + } + InitializeListHead(&drv_obj->drv_ext->custom_ext); + if (IoAllocateDriverObjectExtension(drv_obj, + (void *)WRAP_DRIVER_CLIENT_ID, + sizeof(*wrap_driver), + (void **)&wrap_driver) != + STATUS_SUCCESS) + EXIT1(return -ENOMEM); + TRACE1("driver: %p", wrap_driver); + memset(wrap_driver, 0, sizeof(*wrap_driver)); + InitializeListHead(&wrap_driver->list); + InitializeListHead(&wrap_driver->settings); + InitializeListHead(&wrap_driver->wrap_devices); + wrap_driver->drv_obj = drv_obj; + RtlInitAnsiString(&ansi_reg, "/tmp"); + if (RtlAnsiStringToUnicodeString(&drv_obj->name, &ansi_reg, TRUE) != + STATUS_SUCCESS) { + ERROR("couldn't initialize registry path"); + free_custom_extensions(drv_obj->drv_ext); + kfree(drv_obj->drv_ext); + TRACE1("drv_obj: %p", drv_obj); + ObDereferenceObject(drv_obj); + EXIT1(return -EINVAL); + } + strncpy(wrap_driver->name, load_driver->name, sizeof(wrap_driver->name)); + wrap_driver->name[sizeof(wrap_driver->name)-1] = 0; + if (load_sys_files(wrap_driver, load_driver) || + load_bin_files_info(wrap_driver, load_driver) || + load_settings(wrap_driver, load_driver) || + start_wrap_driver(wrap_driver) || + add_wrap_driver(wrap_driver)) { + unload_wrap_driver(wrap_driver); + EXIT1(return -EINVAL); + } else { + printk(KERN_INFO "%s: driver %s (%s) loaded\n", + DRIVER_NAME, wrap_driver->name, wrap_driver->version); + add_taint(TAINT_PROPRIETARY_MODULE); + EXIT1(return 0); + } +} + +static struct pci_device_id wrap_pci_id_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID}, +}; + +static struct pci_driver wrap_pci_driver = { + .name = DRIVER_NAME, + .id_table = wrap_pci_id_table, + .probe = wrap_pnp_start_pci_device, + .remove = __devexit_p(wrap_pnp_remove_pci_device), + .suspend = wrap_pnp_suspend_pci_device, + .resume = wrap_pnp_resume_pci_device, +}; + +#ifdef ENABLE_USB +static struct usb_device_id wrap_usb_id_table[] = { + { + .driver_info = 1 + }, +}; + +static struct usb_driver wrap_usb_driver = { + .name = DRIVER_NAME, + .id_table = wrap_usb_id_table, + .probe = wrap_pnp_start_usb_device, + .disconnect = __devexit_p(wrap_pnp_remove_usb_device), + .suspend = wrap_pnp_suspend_usb_device, + .resume = wrap_pnp_resume_usb_device, +}; +#endif + +/* register drivers for pci and usb */ +static void register_devices(void) +{ + int res; + + res = pci_register_driver(&wrap_pci_driver); + if (res < 0) { + ERROR("couldn't register pci driver: %d", res); + wrap_pci_driver.name = NULL; + } + +#ifdef ENABLE_USB + res = usb_register(&wrap_usb_driver); + if (res < 0) { + ERROR("couldn't register usb driver: %d", res); + wrap_usb_driver.name = NULL; + } +#endif + EXIT1(return); +} + +static void unregister_devices(void) +{ + struct nt_list *cur, *next; + + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + nt_list_for_each_safe(cur, next, &wrap_devices) { + struct wrap_device *wd; + wd = container_of(cur, struct wrap_device, list); + set_bit(HW_PRESENT, &wd->hw_status); + } + up(&loader_mutex); + + if (wrap_pci_driver.name) + pci_unregister_driver(&wrap_pci_driver); +#ifdef ENABLE_USB + if (wrap_usb_driver.name) + usb_deregister(&wrap_usb_driver); +#endif +} + +struct wrap_device *load_wrap_device(struct load_device *load_device) +{ + int ret; + struct nt_list *cur; + struct wrap_device *wd = NULL; + char vendor[5], device[5], subvendor[5], subdevice[5], bus[5]; + + ENTER1("%04x, %04x, %04x, %04x", load_device->vendor, + load_device->device, load_device->subvendor, + load_device->subdevice); + if (sprintf(vendor, "%04x", load_device->vendor) == 4 && + sprintf(device, "%04x", load_device->device) == 4 && + sprintf(subvendor, "%04x", load_device->subvendor) == 4 && + sprintf(subdevice, "%04x", load_device->subdevice) == 4 && + sprintf(bus, "%04x", load_device->bus) == 4) { + char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DEVICE, +#if defined(DEBUG) && DEBUG >= 1 + "1", +#else + "0", +#endif + UTILS_VERSION, vendor, device, + subvendor, subdevice, bus, NULL}; + char *env[] = {NULL}; + TRACE2("%s, %s, %s, %s, %s", vendor, device, + subvendor, subdevice, bus); + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + EXIT1(return NULL); + } + INIT_COMPLETION(loader_complete); + ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1); + if (ret) { + up(&loader_mutex); + TRACE1("couldn't load device %04x:%04x; check system " + "log for messages from 'loadndisdriver'", + load_device->vendor, load_device->device); + EXIT1(return NULL); + } + wait_for_completion(&loader_complete); + wd = NULL; + nt_list_for_each(cur, &wrap_devices) { + wd = container_of(cur, struct wrap_device, list); + TRACE2("%p, %04x, %04x, %04x, %04x", wd, wd->vendor, + wd->device, wd->subvendor, wd->subdevice); + if (wd->vendor == load_device->vendor && + wd->device == load_device->device) + break; + else + wd = NULL; + } + up(&loader_mutex); + } else + wd = NULL; + EXIT1(return wd); +} + +struct wrap_device *get_wrap_device(void *dev, int bus) +{ + struct nt_list *cur; + struct wrap_device *wd; + + if (down_interruptible(&loader_mutex)) { + WARNING("couldn't obtain loader_mutex"); + return NULL; + } + wd = NULL; + nt_list_for_each(cur, &wrap_devices) { + wd = container_of(cur, struct wrap_device, list); + if (bus == WRAP_PCI_BUS && + wrap_is_pci_bus(wd->dev_bus) && wd->pci.pdev == dev) + break; + else if (bus == WRAP_USB_BUS && + wrap_is_usb_bus(wd->dev_bus) && wd->usb.udev == dev) + break; + else + wd = NULL; + } + up(&loader_mutex); + return wd; +} + +/* called with loader_mutex is down */ +static int wrapper_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + struct load_driver *load_driver; + struct load_device load_device; + struct load_driver_file load_bin_file; + int ret; + void __user *addr = (void __user *)arg; + + ENTER1("cmd: %u", cmd); + + ret = 0; + switch (cmd) { + case WRAP_IOCTL_LOAD_DEVICE: + if (copy_from_user(&load_device, addr, sizeof(load_device))) { + ret = -EFAULT; + break; + } + TRACE2("%04x, %04x, %04x, %04x", load_device.vendor, + load_device.device, load_device.subvendor, + load_device.subdevice); + if (load_device.vendor) { + struct wrap_device *wd; + wd = kzalloc(sizeof(*wd), GFP_KERNEL); + if (!wd) { + ret = -ENOMEM; + break; + } + InitializeListHead(&wd->settings); + wd->dev_bus = WRAP_BUS(load_device.bus); + wd->vendor = load_device.vendor; + wd->device = load_device.device; + wd->subvendor = load_device.subvendor; + wd->subdevice = load_device.subdevice; + strncpy(wd->conf_file_name, load_device.conf_file_name, + sizeof(wd->conf_file_name)); + wd->conf_file_name[sizeof(wd->conf_file_name)-1] = 0; + strncpy(wd->driver_name, load_device.driver_name, + sizeof(wd->driver_name)); + wd->driver_name[sizeof(wd->driver_name)-1] = 0; + InsertHeadList(&wrap_devices, &wd->list); + ret = 0; + } else + ret = -EINVAL; + break; + case WRAP_IOCTL_LOAD_DRIVER: + TRACE1("loading driver at %p", addr); + load_driver = vmalloc(sizeof(*load_driver)); + if (!load_driver) { + ret = -ENOMEM; + break; + } + if (copy_from_user(load_driver, addr, sizeof(*load_driver))) + ret = -EFAULT; + else + ret = load_user_space_driver(load_driver); + vfree(load_driver); + break; + case WRAP_IOCTL_LOAD_BIN_FILE: + if (copy_from_user(&load_bin_file, addr, sizeof(load_bin_file))) + ret = -EFAULT; + else + ret = add_bin_file(&load_bin_file); + break; + default: + ERROR("unknown ioctl %u", cmd); + ret = -EINVAL; + break; + } + complete(&loader_complete); + EXIT1(return ret); +} + +static int wrapper_ioctl_release(struct inode *inode, struct file *file) +{ + ENTER1(""); + return 0; +} + +static struct file_operations wrapper_fops = { + .owner = THIS_MODULE, + .ioctl = wrapper_ioctl, + .release = wrapper_ioctl_release, +}; + +static struct miscdevice wrapper_misc = { + .name = DRIVER_NAME, + .minor = MISC_DYNAMIC_MINOR, + .fops = &wrapper_fops +}; + +int loader_init(void) +{ + int err; + + InitializeListHead(&wrap_drivers); + InitializeListHead(&wrap_devices); + init_MUTEX(&loader_mutex); + init_completion(&loader_complete); + if ((err = misc_register(&wrapper_misc)) < 0 ) { + ERROR("couldn't register module (%d)", err); + unregister_devices(); + EXIT1(return err); + } + register_devices(); + EXIT1(return 0); +} + +void loader_exit(void) +{ + struct nt_list *cur, *next; + + ENTER1(""); + misc_deregister(&wrapper_misc); + unregister_devices(); + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + nt_list_for_each_safe(cur, next, &wrap_drivers) { + struct wrap_driver *driver; + driver = container_of(cur, struct wrap_driver, list); + unload_wrap_driver(driver); + } + up(&loader_mutex); + EXIT1(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/usb.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/usb.c @@ -0,0 +1,1457 @@ +/* + * Copyright (C) 2004 Jan Kiszka + * Copyright (C) 2005 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ndis.h" +#include "usb.h" +#include "usb_exports.h" + +#ifdef USB_DEBUG +static unsigned int urb_id = 0; + +#define DUMP_WRAP_URB(wrap_urb, dir) \ + USBTRACE("urb %p (%d) %s: buf: %p, len: %d, pipe: 0x%x, %d", \ + (wrap_urb)->urb, (wrap_urb)->id, \ + (dir == USB_DIR_OUT) ? "going down" : "coming back", \ + (wrap_urb)->urb->transfer_buffer, \ + (wrap_urb)->urb->transfer_buffer_length, \ + (wrap_urb)->urb->pipe, (wrap_urb)->urb->status) + +#define DUMP_URB_BUFFER(urb, dir) \ + while (debug >= 2) { \ + int i; \ + char msg[20], *t; \ + if (!urb->transfer_buffer) \ + break; \ + if (!((usb_pipein(urb->pipe) && dir == USB_DIR_IN) || \ + (usb_pipeout(urb->pipe) && dir == USB_DIR_OUT))) \ + break; \ + t = msg; \ + t += sprintf(t, "%d: ", (urb)->actual_length); \ + for (i = 0; i < urb->actual_length && \ + t < &msg[sizeof(msg) - 4]; i++) \ + t += sprintf(t, "%02X ", \ + ((char *)urb->transfer_buffer)[i]); \ + *t = 0; \ + USBTRACE("%s", msg); \ + break; \ + } + +#else + +#define DUMP_WRAP_URB(wrap_urb, dir) (void)0 +#define DUMP_URB_BUFFER(urb, dir) (void)0 + +#endif + +#define CUR_ALT_SETTING(intf) (intf)->cur_altsetting + +#ifndef USB_CTRL_SET_TIMEOUT +#define USB_CTRL_SET_TIMEOUT 5000 +#endif + +#ifndef USB_CTRL_GET_TIMEOUT +#define USB_CTRL_GET_TIMEOUT 5000 +#endif + +#ifndef URB_NO_TRANSFER_DMA_MAP +#define URB_NO_TRANSFER_DMA_MAP 0 +#endif + +/* wrap_urb->flags */ +/* transfer_buffer for urb is allocated; free it in wrap_free_urb */ +#define WRAP_URB_COPY_BUFFER 0x01 + +static int inline wrap_cancel_urb(struct wrap_urb *wrap_urb) +{ + int ret; + USBTRACE("%p, %p, %d", wrap_urb, wrap_urb->urb, wrap_urb->state); + if (wrap_urb->state != URB_SUBMITTED) + USBEXIT(return -1); + ret = usb_unlink_urb(wrap_urb->urb); + USBTRACE("ret: %d", ret); + if (ret == -EINPROGRESS) + return 0; + else { + WARNING("unlink failed: %d", ret); + return ret; + } +} + +#define URB_STATUS(wrap_urb) (wrap_urb->urb->status) + +static struct nt_list wrap_urb_complete_list; +static spinlock_t wrap_urb_complete_list_lock; + +static work_struct_t wrap_urb_complete_work; +static void wrap_urb_complete_worker(worker_param_t dummy); + +static void kill_all_urbs(struct wrap_device *wd, int complete) +{ + struct nt_list *ent; + struct wrap_urb *wrap_urb; + KIRQL irql; + + USBTRACE("%d", wd->usb.num_alloc_urbs); + while (1) { + IoAcquireCancelSpinLock(&irql); + ent = RemoveHeadList(&wd->usb.wrap_urb_list); + IoReleaseCancelSpinLock(irql); + if (!ent) + break; + wrap_urb = container_of(ent, struct wrap_urb, list); + if (wrap_urb->state == URB_SUBMITTED) { + WARNING("Windows driver %s didn't free urb: %p", + wd->driver->name, wrap_urb->urb); + if (!complete) + wrap_urb->urb->complete = NULL; + usb_kill_urb(wrap_urb->urb); + } + USBTRACE("%p, %p", wrap_urb, wrap_urb->urb); + usb_free_urb(wrap_urb->urb); + kfree(wrap_urb); + } + wd->usb.num_alloc_urbs = 0; +} + +/* for a given Linux urb status code, return corresponding NT urb status */ +static USBD_STATUS wrap_urb_status(int urb_status) +{ + switch (urb_status) { + case 0: + return USBD_STATUS_SUCCESS; + case -EPROTO: + return USBD_STATUS_TIMEOUT; + case -EILSEQ: + return USBD_STATUS_CRC; + case -EPIPE: + return USBD_STATUS_INVALID_PIPE_HANDLE; + case -ECOMM: + return USBD_STATUS_DATA_OVERRUN; + case -ENOSR: + return USBD_STATUS_DATA_UNDERRUN; + case -EOVERFLOW: + return USBD_STATUS_BABBLE_DETECTED; + case -EREMOTEIO: + return USBD_STATUS_ERROR_SHORT_TRANSFER;; + case -ENODEV: + case -ESHUTDOWN: + case -ENOENT: + return USBD_STATUS_DEVICE_GONE; + case -ENOMEM: + return USBD_STATUS_NO_MEMORY; + case -EINVAL: + return USBD_STATUS_REQUEST_FAILED; + default: + return USBD_STATUS_NOT_SUPPORTED; + } +} + +/* for a given USBD_STATUS, return its corresponding NTSTATUS (for irp) */ +static NTSTATUS nt_urb_irp_status(USBD_STATUS nt_urb_status) +{ + switch (nt_urb_status) { + case USBD_STATUS_SUCCESS: + return STATUS_SUCCESS; + case USBD_STATUS_DEVICE_GONE: + return STATUS_DEVICE_REMOVED; + case USBD_STATUS_PENDING: + return STATUS_PENDING; + case USBD_STATUS_NOT_SUPPORTED: + return STATUS_NOT_IMPLEMENTED; + case USBD_STATUS_NO_MEMORY: + return STATUS_NO_MEMORY; + case USBD_STATUS_REQUEST_FAILED: + return STATUS_NOT_SUPPORTED; + default: + return STATUS_FAILURE; + } +} + +static void wrap_free_urb(struct urb *urb) +{ + struct irp *irp; + struct wrap_urb *wrap_urb; + + USBTRACE("freeing urb: %p", urb); + wrap_urb = urb->context; + irp = wrap_urb->irp; + if (wrap_urb->flags & WRAP_URB_COPY_BUFFER) { + USBTRACE("freeing DMA buffer for URB: %p %p", + urb, urb->transfer_buffer); + usb_buffer_free(IRP_WRAP_DEVICE(irp)->usb.udev, + urb->transfer_buffer_length, + urb->transfer_buffer, urb->transfer_dma); + } + if (urb->setup_packet) + kfree(urb->setup_packet); + if (IRP_WRAP_DEVICE(irp)->usb.num_alloc_urbs > MAX_ALLOCATED_URBS) { + IoAcquireCancelSpinLock(&irp->cancel_irql); + RemoveEntryList(&wrap_urb->list); + IRP_WRAP_DEVICE(irp)->usb.num_alloc_urbs--; + IoReleaseCancelSpinLock(irp->cancel_irql); + usb_free_urb(urb); + kfree(wrap_urb); + } else { + wrap_urb->state = URB_FREE; + wrap_urb->flags = 0; + wrap_urb->irp = NULL; + } + return; +} + +void wrap_suspend_urbs(struct wrap_device *wd) +{ + /* TODO: do we need to cancel urbs? */ + USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs); +} + +void wrap_resume_urbs(struct wrap_device *wd) +{ + /* TODO: do we need to resubmit urbs? */ + USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs); +} + +wstdcall void wrap_cancel_irp(struct device_object *dev_obj, struct irp *irp) +{ + struct urb *urb; + + /* NB: this function is called holding Cancel spinlock */ + USBENTER("irp: %p", irp); + urb = IRP_WRAP_URB(irp)->urb; + USBTRACE("canceling urb %p", urb); + if (wrap_cancel_urb(IRP_WRAP_URB(irp))) { + irp->cancel = FALSE; + ERROR("urb %p can't be canceld: %d", urb, + IRP_WRAP_URB(irp)->state); + } else + USBTRACE("urb %p canceled", urb); + IoReleaseCancelSpinLock(irp->cancel_irql); + return; +} +WIN_FUNC_DECL(wrap_cancel_irp,2) + +static struct urb *wrap_alloc_urb(struct irp *irp, unsigned int pipe, + void *buf, unsigned int buf_len) +{ + struct urb *urb; + gfp_t alloc_flags; + struct wrap_urb *wrap_urb; + struct wrap_device *wd; + + USBENTER("irp: %p", irp); + wd = IRP_WRAP_DEVICE(irp); + alloc_flags = irql_gfp(); + IoAcquireCancelSpinLock(&irp->cancel_irql); + urb = NULL; + nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) { + if (cmpxchg(&wrap_urb->state, URB_FREE, + URB_ALLOCATED) == URB_FREE) { + urb = wrap_urb->urb; + usb_init_urb(urb); + break; + } + } + if (!urb) { + IoReleaseCancelSpinLock(irp->cancel_irql); + wrap_urb = kzalloc(sizeof(*wrap_urb), alloc_flags); + if (!wrap_urb) { + WARNING("couldn't allocate memory"); + return NULL; + } + urb = usb_alloc_urb(0, alloc_flags); + if (!urb) { + WARNING("couldn't allocate urb"); + kfree(wrap_urb); + return NULL; + } + IoAcquireCancelSpinLock(&irp->cancel_irql); + wrap_urb->urb = urb; + wrap_urb->state = URB_ALLOCATED; + InsertTailList(&wd->usb.wrap_urb_list, &wrap_urb->list); + wd->usb.num_alloc_urbs++; + } + +#ifdef URB_ASYNC_UNLINK + urb->transfer_flags |= URB_ASYNC_UNLINK; +#elif defined(USB_ASYNC_UNLINK) + urb->transfer_flags |= USB_ASYNC_UNLINK; +#endif + urb->context = wrap_urb; + wrap_urb->irp = irp; + IRP_WRAP_URB(irp) = wrap_urb; + /* called as Windows function */ + irp->cancel_routine = WIN_FUNC_PTR(wrap_cancel_irp,2); + IoReleaseCancelSpinLock(irp->cancel_irql); + USBTRACE("urb: %p", urb); + + urb->transfer_buffer_length = buf_len; + if (buf_len && buf && (!virt_addr_valid(buf) +#if defined(CONFIG_HIGHMEM) || defined(CONFIG_HIGHMEM4G) + || PageHighMem(virt_to_page(buf)) +#endif + )) { + urb->transfer_buffer = + usb_buffer_alloc(wd->usb.udev, buf_len, alloc_flags, + &urb->transfer_dma); + if (!urb->transfer_buffer) { + WARNING("couldn't allocate dma buf"); + IoAcquireCancelSpinLock(&irp->cancel_irql); + wrap_urb->state = URB_FREE; + wrap_urb->irp = NULL; + IRP_WRAP_URB(irp) = NULL; + IoReleaseCancelSpinLock(irp->cancel_irql); + return NULL; + } + if (urb->transfer_dma) + urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + wrap_urb->flags |= WRAP_URB_COPY_BUFFER; + if (usb_pipeout(pipe)) + memcpy(urb->transfer_buffer, buf, buf_len); + USBTRACE("DMA buf for urb %p: %p", urb, urb->transfer_buffer); + } else + urb->transfer_buffer = buf; + return urb; +} + +static USBD_STATUS wrap_submit_urb(struct irp *irp) +{ + int ret; + struct urb *urb; + union nt_urb *nt_urb; + + urb = IRP_WRAP_URB(irp)->urb; + nt_urb = IRP_URB(irp); +#ifdef USB_DEBUG + if (IRP_WRAP_URB(irp)->state != URB_ALLOCATED) { + ERROR("urb %p is in wrong state: %d", + urb, IRP_WRAP_URB(irp)->state); + NT_URB_STATUS(nt_urb) = USBD_STATUS_REQUEST_FAILED; + return NT_URB_STATUS(nt_urb); + } + IRP_WRAP_URB(irp)->id = pre_atomic_add(urb_id, 1); +#endif + DUMP_WRAP_URB(IRP_WRAP_URB(irp), USB_DIR_OUT); + irp->io_status.status = STATUS_PENDING; + irp->io_status.info = 0; + NT_URB_STATUS(nt_urb) = USBD_STATUS_PENDING; + IoMarkIrpPending(irp); + DUMP_URB_BUFFER(urb, USB_DIR_OUT); + USBTRACE("%p", urb); + IRP_WRAP_URB(irp)->state = URB_SUBMITTED; + ret = usb_submit_urb(urb, irql_gfp()); + if (ret) { + USBTRACE("ret: %d", ret); + wrap_free_urb(urb); + /* we assume that IRP was not in pending state before */ + IoUnmarkIrpPending(irp); + NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); + USBEXIT(return NT_URB_STATUS(nt_urb)); + } else + USBEXIT(return USBD_STATUS_PENDING); +} + +static void wrap_urb_complete(struct urb *urb ISR_PT_REGS_PARAM_DECL) +{ + struct irp *irp; + struct wrap_urb *wrap_urb; + + wrap_urb = urb->context; + USBTRACE("%p (%p) completed", wrap_urb, urb); + irp = wrap_urb->irp; + DUMP_WRAP_URB(wrap_urb, USB_DIR_IN); + irp->cancel_routine = NULL; +#ifdef USB_DEBUG + if (wrap_urb->state != URB_SUBMITTED) { + WARNING("urb %p in wrong state: %d (%d)", urb, wrap_urb->state, + urb->status); + return; + } +#endif + wrap_urb->state = URB_COMPLETED; + spin_lock(&wrap_urb_complete_list_lock); + InsertTailList(&wrap_urb_complete_list, &wrap_urb->complete_list); + spin_unlock(&wrap_urb_complete_list_lock); + schedule_ntos_work(&wrap_urb_complete_work); +} + +/* one worker for all devices */ +static void wrap_urb_complete_worker(worker_param_t dummy) +{ + struct irp *irp; + struct urb *urb; + struct usbd_bulk_or_intr_transfer *bulk_int_tx; + struct usbd_vendor_or_class_request *vc_req; + union nt_urb *nt_urb; + struct wrap_urb *wrap_urb; + struct nt_list *ent; + unsigned long flags; + + USBENTER(""); + while (1) { + spin_lock_irqsave(&wrap_urb_complete_list_lock, flags); + ent = RemoveHeadList(&wrap_urb_complete_list); + spin_unlock_irqrestore(&wrap_urb_complete_list_lock, flags); + if (!ent) + break; + wrap_urb = container_of(ent, struct wrap_urb, complete_list); + urb = wrap_urb->urb; +#ifdef USB_DEBUG + if (wrap_urb->state != URB_COMPLETED && + wrap_urb->state != URB_INT_UNLINKED) + WARNING("urb %p in wrong state: %d", + urb, wrap_urb->state); +#endif + irp = wrap_urb->irp; + DUMP_IRP(irp); + nt_urb = IRP_URB(irp); + USBTRACE("urb: %p, nt_urb: %p, status: %d", + urb, nt_urb, urb->status); + switch (urb->status) { + case 0: + /* succesfully transferred */ + irp->io_status.info = urb->actual_length; + if (nt_urb->header.function == + URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER) { + bulk_int_tx = &nt_urb->bulk_int_transfer; + bulk_int_tx->transfer_buffer_length = + urb->actual_length; + DUMP_URB_BUFFER(urb, USB_DIR_IN); + if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) && + usb_pipein(urb->pipe)) + memcpy(bulk_int_tx->transfer_buffer, + urb->transfer_buffer, + urb->actual_length); + } else { // vendor or class request + vc_req = &nt_urb->vendor_class_request; + vc_req->transfer_buffer_length = + urb->actual_length; + DUMP_URB_BUFFER(urb, USB_DIR_IN); + if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) && + usb_pipein(urb->pipe)) + memcpy(vc_req->transfer_buffer, + urb->transfer_buffer, + urb->actual_length); + } + NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; + irp->io_status.status = STATUS_SUCCESS; + break; + case -ENOENT: + case -ECONNRESET: + /* urb canceled */ + irp->io_status.info = 0; + TRACE2("urb %p canceled", urb); + NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; + irp->io_status.status = STATUS_CANCELLED; + break; + default: + TRACE2("irp: %p, urb: %p, status: %d/%d", + irp, urb, urb->status, wrap_urb->state); + irp->io_status.info = 0; + NT_URB_STATUS(nt_urb) = wrap_urb_status(urb->status); + irp->io_status.status = + nt_urb_irp_status(NT_URB_STATUS(nt_urb)); + break; + } + wrap_free_urb(urb); + IoCompleteRequest(irp, IO_NO_INCREMENT); + } + USBEXIT(return); +} + +static USBD_STATUS wrap_bulk_or_intr_trans(struct irp *irp) +{ + usbd_pipe_handle pipe_handle; + struct urb *urb; + unsigned int pipe; + struct usbd_bulk_or_intr_transfer *bulk_int_tx; + USBD_STATUS status; + struct usb_device *udev; + union nt_urb *nt_urb; + + nt_urb = IRP_URB(irp); + udev = IRP_WRAP_DEVICE(irp)->usb.udev; + bulk_int_tx = &nt_urb->bulk_int_transfer; + pipe_handle = bulk_int_tx->pipe_handle; + USBTRACE("flags: 0x%x, length: %u, buffer: %p, handle: %p", + bulk_int_tx->transfer_flags, + bulk_int_tx->transfer_buffer_length, + bulk_int_tx->transfer_buffer, pipe_handle); + + if (USBD_IS_BULK_PIPE(pipe_handle)) { + if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN) + pipe = usb_rcvbulkpipe(udev, + pipe_handle->bEndpointAddress); + else + pipe = usb_sndbulkpipe(udev, + pipe_handle->bEndpointAddress); + } else { + if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN) + pipe = usb_rcvintpipe(udev, + pipe_handle->bEndpointAddress); + else + pipe = usb_sndintpipe(udev, + pipe_handle->bEndpointAddress); + } + + DUMP_IRP(irp); + urb = wrap_alloc_urb(irp, pipe, bulk_int_tx->transfer_buffer, + bulk_int_tx->transfer_buffer_length); + if (!urb) { + ERROR("couldn't allocate urb"); + return USBD_STATUS_NO_MEMORY; + } + if (usb_pipein(pipe) && + (!(bulk_int_tx->transfer_flags & USBD_SHORT_TRANSFER_OK))) { + USBTRACE("short not ok"); + urb->transfer_flags |= URB_SHORT_NOT_OK; + } + if (usb_pipebulk(pipe)) { + usb_fill_bulk_urb(urb, udev, pipe, urb->transfer_buffer, + bulk_int_tx->transfer_buffer_length, + wrap_urb_complete, urb->context); + USBTRACE("submitting bulk urb %p on pipe 0x%x (ep 0x%x)", + urb, urb->pipe, pipe_handle->bEndpointAddress); + } else { + usb_fill_int_urb(urb, udev, pipe, urb->transfer_buffer, + bulk_int_tx->transfer_buffer_length, + wrap_urb_complete, urb->context, + pipe_handle->bInterval); + USBTRACE("submitting interrupt urb %p on pipe 0x%x (ep 0x%x), " + "intvl: %d", urb, urb->pipe, + pipe_handle->bEndpointAddress, pipe_handle->bInterval); + } + status = wrap_submit_urb(irp); + USBTRACE("status: %08X", status); + USBEXIT(return status); +} + +static USBD_STATUS wrap_vendor_or_class_req(struct irp *irp) +{ + u8 req_type; + unsigned int pipe; + struct usbd_vendor_or_class_request *vc_req; + struct usb_device *udev; + union nt_urb *nt_urb; + USBD_STATUS status; + struct urb *urb; + struct usb_ctrlrequest *dr; + + nt_urb = IRP_URB(irp); + udev = IRP_WRAP_DEVICE(irp)->usb.udev; + vc_req = &nt_urb->vendor_class_request; + USBTRACE("bits: %x, req: %x, val: %08x, index: %08x, flags: %x," + "buf: %p, len: %d", vc_req->reserved_bits, vc_req->request, + vc_req->value, vc_req->index, vc_req->transfer_flags, + vc_req->transfer_buffer, vc_req->transfer_buffer_length); + + USBTRACE("%x", nt_urb->header.function); + switch (nt_urb->header.function) { + case URB_FUNCTION_VENDOR_DEVICE: + req_type = USB_TYPE_VENDOR | USB_RECIP_DEVICE; + break; + case URB_FUNCTION_VENDOR_INTERFACE: + req_type = USB_TYPE_VENDOR | USB_RECIP_INTERFACE; + break; + case URB_FUNCTION_VENDOR_ENDPOINT: + req_type = USB_TYPE_VENDOR | USB_RECIP_ENDPOINT; + break; + case URB_FUNCTION_VENDOR_OTHER: + req_type = USB_TYPE_VENDOR | USB_RECIP_OTHER; + break; + case URB_FUNCTION_CLASS_DEVICE: + req_type = USB_TYPE_CLASS | USB_RECIP_DEVICE; + break; + case URB_FUNCTION_CLASS_INTERFACE: + req_type = USB_TYPE_CLASS | USB_RECIP_INTERFACE; + break; + case URB_FUNCTION_CLASS_ENDPOINT: + req_type = USB_TYPE_CLASS | USB_RECIP_ENDPOINT; + break; + case URB_FUNCTION_CLASS_OTHER: + req_type = USB_TYPE_CLASS | USB_RECIP_OTHER; + break; + default: + ERROR("unknown request type: %x", nt_urb->header.function); + req_type = 0; + break; + } + + req_type |= vc_req->reserved_bits; + USBTRACE("req type: %08x", req_type); + + if (vc_req->transfer_flags & USBD_TRANSFER_DIRECTION_IN) { + pipe = usb_rcvctrlpipe(udev, 0); + req_type |= USB_DIR_IN; + USBTRACE("pipe: %x, dir in", pipe); + } else { + pipe = usb_sndctrlpipe(udev, 0); + req_type |= USB_DIR_OUT; + USBTRACE("pipe: %x, dir out", pipe); + } + urb = wrap_alloc_urb(irp, pipe, vc_req->transfer_buffer, + vc_req->transfer_buffer_length); + if (!urb) { + ERROR("couldn't allocate urb"); + return USBD_STATUS_NO_MEMORY; + } + + if (usb_pipein(pipe) && + (!(vc_req->transfer_flags & USBD_SHORT_TRANSFER_OK))) { + USBTRACE("short not ok"); + urb->transfer_flags |= URB_SHORT_NOT_OK; + } + + dr = kzalloc(sizeof(*dr), GFP_ATOMIC); + if (!dr) { + ERROR("couldn't allocate memory"); + wrap_free_urb(urb); + return USBD_STATUS_NO_MEMORY; + } + dr->bRequestType = req_type; + dr->bRequest = vc_req->request; + dr->wValue = cpu_to_le16(vc_req->value); + dr->wIndex = cpu_to_le16((u16)vc_req->index); + dr->wLength = cpu_to_le16((u16)urb->transfer_buffer_length); + + usb_fill_control_urb(urb, udev, pipe, (unsigned char *)dr, + urb->transfer_buffer, urb->transfer_buffer_length, + wrap_urb_complete, urb->context); + status = wrap_submit_urb(irp); + USBTRACE("status: %08X", status); + USBEXIT(return status); +} + +static USBD_STATUS wrap_reset_pipe(struct usb_device *udev, struct irp *irp) +{ + int ret; + union nt_urb *nt_urb; + usbd_pipe_handle pipe_handle; + unsigned int pipe1, pipe2; + + nt_urb = IRP_URB(irp); + pipe_handle = nt_urb->pipe_req.pipe_handle; + /* TODO: not clear if both directions should be cleared? */ + if (USBD_IS_BULK_PIPE(pipe_handle)) { + pipe1 = usb_rcvbulkpipe(udev, pipe_handle->bEndpointAddress); + pipe2 = usb_sndbulkpipe(udev, pipe_handle->bEndpointAddress); + } else if (USBD_IS_INT_PIPE(pipe_handle)) { + pipe1 = usb_rcvintpipe(udev, pipe_handle->bEndpointAddress); + pipe2 = pipe1; + } else { + WARNING("invalid pipe %d", pipe_handle->bEndpointAddress); + return USBD_STATUS_INVALID_PIPE_HANDLE; + } + USBTRACE("ep: %d, pipe: 0x%x", pipe_handle->bEndpointAddress, pipe1); + ret = usb_clear_halt(udev, pipe1); + if (ret) + USBTRACE("resetting pipe %d failed: %d", pipe1, ret); + if (pipe2 != pipe1) { + ret = usb_clear_halt(udev, pipe2); + if (ret) + USBTRACE("resetting pipe %d failed: %d", pipe2, ret); + } +// return wrap_urb_status(ret); + return USBD_STATUS_SUCCESS; +} + +static USBD_STATUS wrap_abort_pipe(struct usb_device *udev, struct irp *irp) +{ + union nt_urb *nt_urb; + usbd_pipe_handle pipe_handle; + struct wrap_urb *wrap_urb; + struct wrap_device *wd; + KIRQL irql; + + wd = IRP_WRAP_DEVICE(irp); + nt_urb = IRP_URB(irp); + pipe_handle = nt_urb->pipe_req.pipe_handle; + USBENTER("%p, %x", irp, pipe_handle->bEndpointAddress); + IoAcquireCancelSpinLock(&irql); + nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) { + USBTRACE("%p, %p, %d, %x, %x", wrap_urb, wrap_urb->urb, + wrap_urb->state, wrap_urb->urb->pipe, + usb_pipeendpoint(wrap_urb->urb->pipe)); + /* for WG111T driver, urbs for endpoint 0 should also + * be canceled */ + if ((usb_pipeendpoint(wrap_urb->urb->pipe) == + pipe_handle->bEndpointAddress) || + (usb_pipeendpoint(wrap_urb->urb->pipe) == 0)) { + if (wrap_cancel_urb(wrap_urb) == 0) + USBTRACE("canceled wrap_urb: %p", wrap_urb); + } + } + IoReleaseCancelSpinLock(irql); + NT_URB_STATUS(nt_urb) = USBD_STATUS_CANCELED; + USBEXIT(return USBD_STATUS_SUCCESS); +} + +static USBD_STATUS wrap_set_clear_feature(struct usb_device *udev, + struct irp *irp) +{ + union nt_urb *nt_urb; + struct urb_control_feature_request *feat_req; + int ret = 0; + __u8 request, type; + __u16 feature; + + nt_urb = IRP_URB(irp); + feat_req = &nt_urb->feat_req; + feature = feat_req->feature_selector; + switch (nt_urb->header.function) { + case URB_FUNCTION_SET_FEATURE_TO_DEVICE: + request = USB_REQ_SET_FEATURE; + type = USB_DT_DEVICE; + break; + case URB_FUNCTION_SET_FEATURE_TO_INTERFACE: + request = USB_REQ_SET_FEATURE; + type = USB_DT_INTERFACE; + break; + case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT: + request = USB_REQ_SET_FEATURE; + type = USB_DT_ENDPOINT; + break; + case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE: + request = USB_REQ_CLEAR_FEATURE; + type = USB_DT_DEVICE; + break; + case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE: + request = USB_REQ_CLEAR_FEATURE; + type = USB_DT_INTERFACE; + break; + case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT: + request = USB_REQ_CLEAR_FEATURE; + type = USB_DT_ENDPOINT; + break; + default: + WARNING("invalid function: %x", nt_urb->header.function); + NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; + return NT_URB_STATUS(nt_urb); + } + ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), request, type, + feature, feat_req->index, NULL, 0, 1000); + NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); + USBEXIT(return NT_URB_STATUS(nt_urb)); +} + +static USBD_STATUS wrap_get_status_request(struct usb_device *udev, + struct irp *irp) +{ + union nt_urb *nt_urb; + struct urb_control_get_status_request *status_req; + int ret = 0; + __u8 type; + + nt_urb = IRP_URB(irp); + status_req = &nt_urb->status_req; + switch (nt_urb->header.function) { + case URB_FUNCTION_GET_STATUS_FROM_DEVICE: + type = USB_RECIP_DEVICE; + break; + case URB_FUNCTION_GET_STATUS_FROM_INTERFACE: + type = USB_RECIP_INTERFACE; + break; + case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT: + type = USB_RECIP_ENDPOINT; + break; + default: + WARNING("invalid function: %x", nt_urb->header.function); + NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; + return NT_URB_STATUS(nt_urb); + } + assert(status_req->transfer_buffer_length == sizeof(u16)); + ret = usb_get_status(udev, type, status_req->index, + status_req->transfer_buffer); + if (ret >= 0) { + assert(ret <= status_req->transfer_buffer_length); + status_req->transfer_buffer_length = ret; + NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS; + } else + NT_URB_STATUS(nt_urb) = wrap_urb_status(ret); + USBEXIT(return NT_URB_STATUS(nt_urb)); +} + +static void set_intf_pipe_info(struct wrap_device *wd, + struct usb_interface *usb_intf, + struct usbd_interface_information *intf) +{ + int i; + struct usb_endpoint_descriptor *ep; + struct usbd_pipe_information *pipe; + + for (i = 0; i < CUR_ALT_SETTING(usb_intf)->desc.bNumEndpoints; i++) { + ep = &(CUR_ALT_SETTING(usb_intf)->endpoint[i]).desc; + if (i >= intf->bNumEndpoints) { + ERROR("intf %p has only %d endpoints, " + "ignoring endpoints above %d", + intf, intf->bNumEndpoints, i); + break; + } + pipe = &intf->pipes[i]; + + if (pipe->flags & USBD_PF_CHANGE_MAX_PACKET) + USBTRACE("pkt_sz: %d: %d", pipe->wMaxPacketSize, + pipe->max_tx_size); + USBTRACE("driver wants max_tx_size to %d", + pipe->max_tx_size); + + pipe->wMaxPacketSize = le16_to_cpu(ep->wMaxPacketSize); + pipe->bEndpointAddress = ep->bEndpointAddress; + pipe->type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + if (pipe->type == UsbdPipeTypeInterrupt) { + /* Windows and Linux differ in how the + * bInterval is interpretted */ + /* for low speed: + interval (Windows) -> frames per ms (Linux) + 0 to 15 -> 8 + 16 to 35 -> 16 + 36 to 255 -> 32 + + for full speed: interval -> frames per ms + 1 -> 1 + 2 to 3 -> 2 + 4 to 7 -> 4 + 8 to 15 -> 8 + 16 to 31 -> 16 + 32 to 255 -> 32 + + for high speed: interval -> microframes + 1 -> 1 + 2 -> 2 + 3 -> 4 + 4 -> 8 + 5 -> 16 + 6 -> 32 + 7 to 255 -> 32 + */ + if (wd->usb.udev->speed == USB_SPEED_LOW) + pipe->bInterval = ep->bInterval + 5; + else if (wd->usb.udev->speed == USB_SPEED_FULL) + pipe->bInterval = ep->bInterval; + else { + int j, k; + for (j = k = 1; j < ep->bInterval; k++) + j *= 2; + pipe->bInterval = k; + } + } + pipe->handle = ep; + USBTRACE("%d: ep 0x%x, type %d, pkt_sz %d, intv %d (%d)," + "type: %d, handle %p", i, ep->bEndpointAddress, + ep->bmAttributes, pipe->wMaxPacketSize, ep->bInterval, + pipe->bInterval, pipe->type, pipe->handle); + } +} + +static USBD_STATUS wrap_select_configuration(struct wrap_device *wd, + union nt_urb *nt_urb, + struct irp *irp) +{ + int i, ret; + struct usbd_select_configuration *sel_conf; + struct usb_device *udev; + struct usbd_interface_information *intf; + struct usb_config_descriptor *config; + struct usb_interface *usb_intf; + + udev = wd->usb.udev; + sel_conf = &nt_urb->select_conf; + config = sel_conf->config; + USBTRACE("%p", config); + if (config == NULL) { + kill_all_urbs(wd, 1); + ret = usb_reset_configuration(udev); + return wrap_urb_status(ret); + } + + USBTRACE("conf: %d, type: %d, length: %d, numif: %d, attr: %08x", + config->bConfigurationValue, config->bDescriptorType, + config->wTotalLength, config->bNumInterfaces, + config->bmAttributes); + ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), + USB_REQ_SET_CONFIGURATION, 0, + config->bConfigurationValue, 0, + NULL, 0, USB_CTRL_SET_TIMEOUT); + if (ret < 0) { + ERROR("ret: %d", ret); + return wrap_urb_status(ret); + } + sel_conf->handle = udev->actconfig; + intf = &sel_conf->intf; + for (i = 0; i < config->bNumInterfaces && intf->bLength > 0; + i++, intf = (((void *)intf) + intf->bLength)) { + + USBTRACE("intf: %d, alt setting: %d", + intf->bInterfaceNumber, intf->bAlternateSetting); + ret = usb_set_interface(udev, intf->bInterfaceNumber, + intf->bAlternateSetting); + if (ret < 0) { + ERROR("failed with %d", ret); + return wrap_urb_status(ret); + } + usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber); + if (!usb_intf) { + ERROR("couldn't obtain ifnum"); + return USBD_STATUS_REQUEST_FAILED; + } + USBTRACE("intf: %p, num ep: %d", intf, intf->bNumEndpoints); + set_intf_pipe_info(wd, usb_intf, intf); + } + return USBD_STATUS_SUCCESS; +} + +static USBD_STATUS wrap_select_interface(struct wrap_device *wd, + union nt_urb *nt_urb, + struct irp *irp) +{ + int ret; + struct usbd_select_interface *sel_intf; + struct usb_device *udev; + struct usbd_interface_information *intf; + struct usb_interface *usb_intf; + + udev = wd->usb.udev; + sel_intf = &nt_urb->select_intf; + intf = &sel_intf->intf; + + ret = usb_set_interface(udev, intf->bInterfaceNumber, + intf->bAlternateSetting); + if (ret < 0) { + ERROR("failed with %d", ret); + return wrap_urb_status(ret); + } + usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber); + if (!usb_intf) { + ERROR("couldn't get interface information"); + return USBD_STATUS_REQUEST_FAILED; + } + USBTRACE("intf: %p, num ep: %d", usb_intf, intf->bNumEndpoints); + set_intf_pipe_info(wd, usb_intf, intf); + return USBD_STATUS_SUCCESS; +} + +static int wrap_usb_get_string(struct usb_device *udev, unsigned short langid, + unsigned char index, void *buf, int size) +{ + int i, ret; + /* if langid is 0, return array of langauges supported in + * buf */ + for (i = 0; i < 3; i++) { + ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), + USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, + (USB_DT_STRING << 8) + index, langid, + buf, size, USB_CTRL_GET_TIMEOUT); + if (ret > 0 || ret == -EPIPE) + break; + } + return ret; +} + +static USBD_STATUS wrap_get_descriptor(struct wrap_device *wd, + union nt_urb *nt_urb, struct irp *irp) +{ + struct usbd_control_descriptor_request *control_desc; + int ret = 0; + struct usb_device *udev; + + udev = wd->usb.udev; + control_desc = &nt_urb->control_desc; + USBTRACE("desctype = %d, descindex = %d, transfer_buffer = %p," + "transfer_buffer_length = %d", control_desc->desc_type, + control_desc->index, control_desc->transfer_buffer, + control_desc->transfer_buffer_length); + + if (control_desc->desc_type == USB_DT_STRING) { + USBTRACE("langid: %x", control_desc->language_id); + ret = wrap_usb_get_string(udev, control_desc->language_id, + control_desc->index, + control_desc->transfer_buffer, + control_desc->transfer_buffer_length); + } else { + ret = usb_get_descriptor(udev, control_desc->desc_type, + control_desc->index, + control_desc->transfer_buffer, + control_desc->transfer_buffer_length); + } + if (ret < 0) { + USBTRACE("request %d failed: %d", control_desc->desc_type, ret); + control_desc->transfer_buffer_length = 0; + return wrap_urb_status(ret); + } else { + USBTRACE("ret: %08x", ret); + control_desc->transfer_buffer_length = ret; + irp->io_status.info = ret; + return USBD_STATUS_SUCCESS; + } +} + +static USBD_STATUS wrap_process_nt_urb(struct irp *irp) +{ + union nt_urb *nt_urb; + struct usb_device *udev; + USBD_STATUS status; + struct wrap_device *wd; + + wd = IRP_WRAP_DEVICE(irp); + udev = wd->usb.udev; + nt_urb = IRP_URB(irp); + USBENTER("nt_urb = %p, irp = %p, length = %d, function = %x", + nt_urb, irp, nt_urb->header.length, nt_urb->header.function); + + DUMP_IRP(irp); + switch (nt_urb->header.function) { + /* bulk/int and vendor/class urbs are submitted to + * Linux USB core; if the call is sucessful, urb's + * completion worker will return IRP later */ + case URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER: + USBTRACE("submitting bulk/int irp: %p", irp); + status = wrap_bulk_or_intr_trans(irp); + break; + + case URB_FUNCTION_VENDOR_DEVICE: + case URB_FUNCTION_VENDOR_INTERFACE: + case URB_FUNCTION_VENDOR_ENDPOINT: + case URB_FUNCTION_VENDOR_OTHER: + case URB_FUNCTION_CLASS_DEVICE: + case URB_FUNCTION_CLASS_INTERFACE: + case URB_FUNCTION_CLASS_ENDPOINT: + case URB_FUNCTION_CLASS_OTHER: + USBTRACE("submitting vendor/class irp: %p", irp); + status = wrap_vendor_or_class_req(irp); + break; + + /* rest are synchronous */ + case URB_FUNCTION_SELECT_CONFIGURATION: + status = wrap_select_configuration(wd, nt_urb, irp); + NT_URB_STATUS(nt_urb) = status; + break; + + case URB_FUNCTION_SELECT_INTERFACE: + status = wrap_select_interface(wd, nt_urb, irp); + NT_URB_STATUS(nt_urb) = status; + break; + + case URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE: + status = wrap_get_descriptor(wd, nt_urb, irp); + NT_URB_STATUS(nt_urb) = status; + break; + + case URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL: + status = wrap_reset_pipe(udev, irp); + NT_URB_STATUS(nt_urb) = status; + break; + + case URB_FUNCTION_ABORT_PIPE: + status = wrap_abort_pipe(udev, irp); + break; + + case URB_FUNCTION_SET_FEATURE_TO_DEVICE: + case URB_FUNCTION_SET_FEATURE_TO_INTERFACE: + case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT: + case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE: + case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE: + case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT: + status = wrap_set_clear_feature(udev, irp); + break; + + case URB_FUNCTION_GET_STATUS_FROM_DEVICE: + case URB_FUNCTION_GET_STATUS_FROM_INTERFACE: + case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT: + status = wrap_get_status_request(udev, irp); + break; + + default: + ERROR("function %x not implemented", nt_urb->header.function); + status = NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED; + break; + } + USBTRACE("status: %08X", status); + return status; +} + +static USBD_STATUS wrap_reset_port(struct irp *irp) +{ + no_warn_unused int ret, lock = 0; + struct wrap_device *wd; + + wd = IRP_WRAP_DEVICE(irp); + USBENTER("%p, %p", wd, wd->usb.udev); + lock = usb_lock_device_for_reset(wd->usb.udev, wd->usb.intf); + if (lock < 0) { + WARNING("locking failed: %d", lock); +// return wrap_urb_status(lock); + return USBD_STATUS_SUCCESS; + } + ret = usb_reset_device(wd->usb.udev); + if (ret < 0) + USBTRACE("reset failed: %d", ret); + /* TODO: should reconfigure? */ + if (lock) + usb_unlock_device(wd->usb.udev); +// return wrap_urb_status(ret); + return USBD_STATUS_SUCCESS; +} + +static USBD_STATUS wrap_get_port_status(struct irp *irp) +{ + struct wrap_device *wd; + ULONG *status; + enum usb_device_state state; + + wd = IRP_WRAP_DEVICE(irp); + USBENTER("%p, %p", wd, wd->usb.udev); + status = IoGetCurrentIrpStackLocation(irp)->params.others.arg1; + state = wd->usb.udev->state; + if (state != USB_STATE_NOTATTACHED && + state != USB_STATE_SUSPENDED) { + *status |= USBD_PORT_CONNECTED; + if (state == USB_STATE_CONFIGURED) + *status |= USBD_PORT_ENABLED; + } + USBTRACE("state: %d, *status: %08X", state, *status); + return USBD_STATUS_SUCCESS; +} + +NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp) +{ + struct io_stack_location *irp_sl; + struct wrap_device *wd; + USBD_STATUS status; + struct usbd_idle_callback *idle_callback; + + USBENTER("%p, %p", pdo, irp); + wd = pdo->reserved; + if (wd->usb.intf == NULL) { + USBTRACE("%p", irp); + irp->io_status.status = STATUS_DEVICE_REMOVED; + irp->io_status.info = 0; + USBEXIT(return STATUS_DEVICE_REMOVED); + } + IRP_WRAP_DEVICE(irp) = wd; + irp_sl = IoGetCurrentIrpStackLocation(irp); + switch (irp_sl->params.dev_ioctl.code) { + case IOCTL_INTERNAL_USB_SUBMIT_URB: + status = wrap_process_nt_urb(irp); + break; + case IOCTL_INTERNAL_USB_RESET_PORT: + status = wrap_reset_port(irp); + break; + case IOCTL_INTERNAL_USB_GET_PORT_STATUS: + status = wrap_get_port_status(irp); + break; + case IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION: + idle_callback = irp_sl->params.dev_ioctl.type3_input_buf; + USBTRACE("suspend function: %p", idle_callback->callback); + status = USBD_STATUS_NOT_SUPPORTED; + break; + default: + ERROR("ioctl %08X NOT IMPLEMENTED", + irp_sl->params.dev_ioctl.code); + status = USBD_STATUS_NOT_SUPPORTED; + break; + } + + USBTRACE("status: %08X", status); + if (status == USBD_STATUS_PENDING) { + /* don't touch this IRP - it may have been already + * completed/returned */ + return STATUS_PENDING; + } else { + irp->io_status.status = nt_urb_irp_status(status); + if (status != USBD_STATUS_SUCCESS) + irp->io_status.info = 0; + USBEXIT(return irp->io_status.status); + } +} + +/* TODO: The example on msdn in reference section suggests that second + * argument should be an array of usbd_interface_information, but + * description and examples elsewhere suggest that it should be + * usbd_interface_list_entry structre. Which is correct? */ + +wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequestEx,2) + (struct usb_config_descriptor *config, + struct usbd_interface_list_entry *intf_list) +{ + int size, i, n; + struct usbd_interface_information *intf; + struct usbd_pipe_information *pipe; + struct usb_interface_descriptor *intf_desc; + struct usbd_select_configuration *select_conf; + + USBENTER("config = %p, intf_list = %p", config, intf_list); + + /* calculate size required; select_conf already has space for + * one intf structure */ + size = sizeof(*select_conf) - sizeof(*intf); + for (n = 0; n < config->bNumInterfaces; n++) { + i = intf_list[n].intf_desc->bNumEndpoints; + /* intf already has space for one pipe */ + size += sizeof(*intf) + (i - 1) * sizeof(*pipe); + } + /* don't use kmalloc - driver frees it with ExFreePool */ + select_conf = ExAllocatePoolWithTag(NonPagedPool, size, + POOL_TAG('L', 'U', 'S', 'B')); + if (!select_conf) { + WARNING("couldn't allocate memory"); + return NULL; + } + memset(select_conf, 0, size); + intf = &select_conf->intf; + select_conf->handle = config; + for (n = 0; n < config->bNumInterfaces && intf_list[n].intf_desc; n++) { + /* initialize 'intf' fields in intf_list so they point + * to appropriate entry; these may be read/written by + * driver after this function returns */ + intf_list[n].intf = intf; + intf_desc = intf_list[n].intf_desc; + + i = intf_desc->bNumEndpoints; + intf->bLength = sizeof(*intf) + (i - 1) * sizeof(*pipe); + + intf->bInterfaceNumber = intf_desc->bInterfaceNumber; + intf->bAlternateSetting = intf_desc->bAlternateSetting; + intf->bInterfaceClass = intf_desc->bInterfaceClass; + intf->bInterfaceSubClass = intf_desc->bInterfaceSubClass; + intf->bInterfaceProtocol = intf_desc->bInterfaceProtocol; + intf->bNumEndpoints = intf_desc->bNumEndpoints; + + pipe = &intf->pipes[0]; + for (i = 0; i < intf->bNumEndpoints; i++) { + memset(&pipe[i], 0, sizeof(*pipe)); + pipe[i].max_tx_size = + USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE; + } + intf->handle = intf_desc; + intf = (((void *)intf) + intf->bLength); + } + select_conf->header.function = URB_FUNCTION_SELECT_CONFIGURATION; + select_conf->header.length = size; + select_conf->config = config; + USBEXIT(return (union nt_urb *)select_conf); +} + +WIN_SYMBOL_MAP("_USBD_CreateConfigurationRequestEx@8", USBD_CreateConfigurationRequestEx) + +wstdcall struct usb_interface_descriptor * +WIN_FUNC(USBD_ParseConfigurationDescriptorEx,7) + (struct usb_config_descriptor *config, void *start, + LONG bInterfaceNumber, LONG bAlternateSetting, LONG bInterfaceClass, + LONG bInterfaceSubClass, LONG bInterfaceProtocol) +{ + void *pos; + struct usb_interface_descriptor *intf; + + USBENTER("config = %p, start = %p, ifnum = %d, alt_setting = %d," + " class = %d, subclass = %d, proto = %d", config, start, + bInterfaceNumber, bAlternateSetting, bInterfaceClass, + bInterfaceSubClass, bInterfaceProtocol); + + for (pos = start; + pos < ((void *)config + le16_to_cpu(config->wTotalLength)); + pos += intf->bLength) { + + intf = pos; + + if ((intf->bDescriptorType == USB_DT_INTERFACE) && + ((bInterfaceNumber == -1) || + (intf->bInterfaceNumber == bInterfaceNumber)) && + ((bAlternateSetting == -1) || + (intf->bAlternateSetting == bAlternateSetting)) && + ((bInterfaceClass == -1) || + (intf->bInterfaceClass == bInterfaceClass)) && + ((bInterfaceSubClass == -1) || + (intf->bInterfaceSubClass == bInterfaceSubClass)) && + ((bInterfaceProtocol == -1) || + (intf->bInterfaceProtocol == bInterfaceProtocol))) { + USBTRACE("selected interface = %p", intf); + USBEXIT(return intf); + } + } + USBEXIT(return NULL); +} + +WIN_SYMBOL_MAP("_USBD_ParseConfigurationDescriptorEx@28", USBD_ParseConfigurationDescriptorEx) + +wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequest,2) + (struct usb_config_descriptor *config, USHORT *size) +{ + union nt_urb *nt_urb; + struct usbd_interface_list_entry intf_list[2]; + struct usb_interface_descriptor *intf_desc; + + USBENTER("config = %p, urb_size = %p", config, size); + + intf_desc = USBD_ParseConfigurationDescriptorEx(config, config, -1, -1, + -1, -1, -1); + intf_list[0].intf_desc = intf_desc; + intf_list[0].intf = NULL; + intf_list[1].intf_desc = NULL; + intf_list[1].intf = NULL; + nt_urb = USBD_CreateConfigurationRequestEx(config, intf_list); + if (!nt_urb) + return NULL; + + *size = nt_urb->select_conf.header.length; + USBEXIT(return nt_urb); +} + +wstdcall struct usb_interface_descriptor * +WIN_FUNC(USBD_ParseConfigurationDescriptor,3) + (struct usb_config_descriptor *config, UCHAR bInterfaceNumber, + UCHAR bAlternateSetting) +{ + return USBD_ParseConfigurationDescriptorEx(config, config, + bInterfaceNumber, + bAlternateSetting, + -1, -1, -1); +} + +wstdcall usb_common_descriptor_t *WIN_FUNC(USBD_ParseDescriptors,4) + (void *buf, ULONG length, void *start, LONG type) +{ + usb_common_descriptor_t *descr = start; + + while ((void *)descr < buf + length) { + if (descr->bDescriptorType == type) + return descr; + if (descr->bLength == 0) + break; + descr = (void *)descr + descr->bLength; + } + USBEXIT(return NULL); +} + +WIN_SYMBOL_MAP("_USBD_ParseDescriptors@16", USBD_ParseDescriptors) + +wstdcall void WIN_FUNC(USBD_GetUSBDIVersion,1) + (struct usbd_version_info *version_info) +{ + /* this function is obsolete in Windows XP */ + if (version_info) { + version_info->usbdi_version = USBDI_VERSION_XP; + /* TODO: how do we get this correctly? */ + version_info->supported_usb_version = 0x110; + } + USBEXIT(return); +} + +wstdcall void +USBD_InterfaceGetUSBDIVersion(void *context, + struct usbd_version_info *version_info, + ULONG *hcd_capa) +{ + struct wrap_device *wd = context; + + if (version_info) { + version_info->usbdi_version = USBDI_VERSION_XP; + if (wd->usb.udev->speed == USB_SPEED_HIGH) + version_info->supported_usb_version = 0x200; + else + version_info->supported_usb_version = 0x110; + } + *hcd_capa = USB_HCD_CAPS_SUPPORTS_RT_THREADS; + USBEXIT(return); +} + +wstdcall BOOLEAN USBD_InterfaceIsDeviceHighSpeed(void *context) +{ + struct wrap_device *wd = context; + + USBTRACE("wd: %p", wd); + if (wd->usb.udev->speed == USB_SPEED_HIGH) + USBEXIT(return TRUE); + else + USBEXIT(return FALSE); +} + +wstdcall void USBD_InterfaceReference(void *context) +{ + USBTRACE("%p", context); + TODO(); +} + +wstdcall void USBD_InterfaceDereference(void *context) +{ + USBTRACE("%p", context); + TODO(); +} + +wstdcall NTSTATUS USBD_InterfaceQueryBusTime(void *context, ULONG *frame) +{ + struct wrap_device *wd = context; + + *frame = usb_get_current_frame_number(wd->usb.udev); + USBEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS USBD_InterfaceSubmitIsoOutUrb(void *context, + union nt_urb *nt_urb) +{ + /* TODO: implement this */ + TODO(); + USBEXIT(return STATUS_NOT_IMPLEMENTED); +} + +wstdcall NTSTATUS +USBD_InterfaceQueryBusInformation(void *context, ULONG level, void *buf, + ULONG *buf_length, ULONG *buf_actual_length) +{ + struct wrap_device *wd = context; + struct usb_bus_information_level *bus_info; + struct usb_bus *bus; + + bus = wd->usb.udev->bus; + bus_info = buf; + TODO(); + USBEXIT(return STATUS_NOT_IMPLEMENTED); +} + +wstdcall NTSTATUS +USBD_InterfaceLogEntry(void *context, ULONG driver_tag, ULONG enum_tag, + ULONG p1, ULONG p2) +{ + ERROR("%p, %x, %x, %x, %x", context, driver_tag, enum_tag, p1, p2); + USBEXIT(return STATUS_SUCCESS); +} + +int usb_init(void) +{ + InitializeListHead(&wrap_urb_complete_list); + spin_lock_init(&wrap_urb_complete_list_lock); + initialize_work(&wrap_urb_complete_work, wrap_urb_complete_worker, NULL); +#ifdef USB_DEBUG + urb_id = 0; +#endif + return 0; +} + +void usb_exit(void) +{ + USBEXIT(return); +} + +int usb_init_device(struct wrap_device *wd) +{ + InitializeListHead(&wd->usb.wrap_urb_list); + wd->usb.num_alloc_urbs = 0; + USBEXIT(return 0); +} + +void usb_exit_device(struct wrap_device *wd) +{ + kill_all_urbs(wd, 0); + USBEXIT(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ntoskernel.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ntoskernel.h @@ -0,0 +1,1157 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _NTOSKERNEL_H_ +#define _NTOSKERNEL_H_ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if !defined(CONFIG_X86) && !defined(CONFIG_X86_64) +#error "this module is for x86 or x86_64 architectures only" +#endif + +/* Interrupt backwards compatibility stuff */ +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) +#ifndef IRQ_HANDLED +#define IRQ_HANDLED +#define IRQ_NONE +#define irqreturn_t void +#endif +#endif /* Linux < 2.6.29 */ + +/* pci functions in 2.6 kernels have problems allocating dma buffers, + * but seem to work fine with dma functions + */ +#include + +#define PCI_DMA_ALLOC_COHERENT(pci_dev,size,dma_handle) \ + dma_alloc_coherent(&pci_dev->dev,size,dma_handle, \ + GFP_KERNEL | __GFP_REPEAT) +#define PCI_DMA_FREE_COHERENT(pci_dev,size,cpu_addr,dma_handle) \ + dma_free_coherent(&pci_dev->dev,size,cpu_addr,dma_handle) +#define PCI_DMA_MAP_SINGLE(pci_dev,addr,size,direction) \ + dma_map_single(&pci_dev->dev,addr,size,direction) +#define PCI_DMA_UNMAP_SINGLE(pci_dev,dma_handle,size,direction) \ + dma_unmap_single(&pci_dev->dev,dma_handle,size,direction) +#define MAP_SG(pci_dev, sglist, nents, direction) \ + dma_map_sg(&pci_dev->dev, sglist, nents, direction) +#define UNMAP_SG(pci_dev, sglist, nents, direction) \ + dma_unmap_sg(&pci_dev->dev, sglist, nents, direction) +#define PCI_DMA_MAP_ERROR(dma_addr) dma_mapping_error(dma_addr) + + +#if defined(CONFIG_NET_RADIO) && !defined(CONFIG_WIRELESS_EXT) +#define CONFIG_WIRELESS_EXT +#endif + +#define prepare_wait_condition(task, var, value) \ +do { \ + var = value; \ + task = current; \ + barrier(); \ +} while (0) + +/* Wait in wait_state (e.g., TASK_INTERRUPTIBLE) for condition to + * become true; timeout is either jiffies (> 0) to wait or 0 to wait + * forever. + * When timeout == 0, return value is + * > 0 if condition becomes true, or + * < 0 if signal is pending on the thread. + * When timeout > 0, return value is + * > 0 if condition becomes true before timeout, + * < 0 if signal is pending on the thread before timeout, or + * 0 if timedout (condition may have become true at the same time) + */ + +#define wait_condition(condition, timeout, wait_state) \ +({ \ + long ret = timeout ? timeout : 1; \ + while (1) { \ + if (signal_pending(current)) { \ + ret = -ERESTARTSYS; \ + break; \ + } \ + set_current_state(wait_state); \ + if (condition) { \ + __set_current_state(TASK_RUNNING); \ + break; \ + } \ + if (timeout) { \ + ret = schedule_timeout(ret); \ + if (!ret) \ + break; \ + } else \ + schedule(); \ + } \ + ret; \ +}) + +#ifdef WRAP_WQ + +struct workqueue_struct; + +struct workqueue_thread { + spinlock_t lock; + struct task_struct *task; + struct completion *completion; + char name[16]; + int pid; + /* whether any work_structs pending? <0 implies quit */ + s8 pending; + /* list of work_structs pending */ + struct list_head work_list; +}; + +typedef struct workqueue_struct { + u8 singlethread; + u8 qon; + int num_cpus; + struct workqueue_thread threads[0]; +} workqueue_struct_t; + +typedef struct { + struct list_head list; + void (*func)(void *data); + void *data; + /* whether/on which thread scheduled */ + struct workqueue_thread *thread; +} work_struct_t; + +#define initialize_work(work, pfunc, pdata) \ + do { \ + (work)->func = (pfunc); \ + (work)->data = (pdata); \ + (work)->thread = NULL; \ + } while (0) + +#undef create_singlethread_workqueue +#define create_singlethread_workqueue(name) wrap_create_wq(name, 1, 0) +#undef create_workqueue +#define create_workqueue(name) wrap_create_wq(name, 0, 0) +#undef destroy_workqueue +#define destroy_workqueue wrap_destroy_wq +#undef queue_work +#define queue_work wrap_queue_work +#undef flush_workqueue +#define flush_workqueue wrap_flush_wq + +workqueue_struct_t *wrap_create_wq(const char *name, u8 singlethread, u8 freeze); +void wrap_destroy_wq_on(workqueue_struct_t *workq, int cpu); +void wrap_destroy_wq(workqueue_struct_t *workq); +int wrap_queue_work_on(workqueue_struct_t *workq, work_struct_t *work, + int cpu); +int wrap_queue_work(workqueue_struct_t *workq, work_struct_t *work); +void wrap_cancel_work(work_struct_t *work); +void wrap_flush_wq_on(workqueue_struct_t *workq, int cpu); +void wrap_flush_wq(workqueue_struct_t *workq); +typedef void *worker_param_t; +#define worker_param_data(param, type, member) param + +#else // WRAP_WQ + +typedef struct workqueue_struct workqueue_struct_t; +typedef struct work_struct work_struct_t; + +#if defined(INIT_WORK_NAR) || defined(INIT_DELAYED_WORK_DEFERRABLE) +#define initialize_work(work, func, data) INIT_WORK(work, func) +typedef struct work_struct *worker_param_t; +#define worker_param_data(param, type, member) \ + container_of(param, type, member) +#else +#define initialize_work(work, func, data) INIT_WORK(work, func, data) +typedef void *worker_param_t; +#define worker_param_data(param, type, member) param +#endif // INIT_WORK_NAR + +#endif // WRAP_WQ + +struct nt_thread *wrap_worker_init(workqueue_struct_t *wq); + +#ifdef module_param +#define WRAP_MODULE_PARM_INT(name, perm) module_param(name, int, perm) +#define WRAP_MODULE_PARM_STRING(name, perm) module_param(name, charp, perm) +#else +#define WRAP_MODULE_PARM_INT(name, perm) MODULE_PARM(name, "i") +#define WRAP_MODULE_PARM_STRING(name, perm) MODULE_PARM(name, "s") +#endif + +#ifndef LOCK_PREFIX +#ifdef LOCK +#define LOCK_PREFIX LOCK +#else +#ifdef CONFIG_SMP +#define LOCK_PREFIX "lock ; " +#else +#define LOCK_PREFIX "" +#endif +#endif +#endif + +#ifndef NETDEV_TX_OK +#define NETDEV_TX_OK 0 +#endif + +#ifndef NETDEV_TX_BUSY +#define NETDEV_TX_BUSY 1 +#endif + +#ifndef CHECKSUM_HW +#define CHECKSUM_HW CHECKSUM_PARTIAL +#endif + +#ifndef offset_in_page +#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK) +#endif + +#ifndef PMSG_SUSPEND +#ifdef PM_SUSPEND +/* this is not correct - the value of PM_SUSPEND is different from + * PMSG_SUSPEND, but ndiswrapper doesn't care about the value when + * suspending */ +#define PMSG_SUSPEND PM_SUSPEND +#define PSMG_ON PM_ON +#else +typedef u32 pm_message_t; +#define PMSG_SUSPEND 2 +#define PMSG_ON 0 +#endif +#endif + +#ifndef PCI_D0 +#define PCI_D0 0 +#endif + +#ifndef PCI_D3hot +#define PCI_D3hot 3 +#endif + +#ifndef PCI_D3cold +#define PCI_D3cold 3 +#endif + +#ifndef PM_EVENT_SUSPEND +#define PM_EVENT_SUSPEND 2 +#endif + +#if !defined(HAVE_NETDEV_PRIV) +#define netdev_priv(dev) ((dev)->priv) +#endif + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18) +#define ISR_PT_REGS_PARAM_DECL +#define ISR_PT_REGS_ARG +#else +#define ISR_PT_REGS_PARAM_DECL , struct pt_regs *regs +#define ISR_PT_REGS_ARG , NULL +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,16) +#define for_each_possible_cpu(_cpu) for_each_cpu(_cpu) +#endif + +#ifndef flush_icache_range +#define flush_icache_range(start, end) do { } while (0) +#endif + +#ifndef CHECKSUM_PARTIAL +#define CHECKSUM_PARTIAL CHECKSUM_HW +#endif + +#ifndef IRQF_SHARED +#define IRQF_SHARED SA_SHIRQ +#endif + +#define memcpy_skb(skb, from, length) \ + memcpy(skb_put(skb, length), from, length) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#endif +#endif + +#ifndef __GFP_DMA32 +#define __GFP_DMA32 GFP_DMA +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22) +#define wrap_kmem_cache_create(name, size, align, flags) \ + kmem_cache_create(name, size, align, flags, NULL, NULL) +#else +#define wrap_kmem_cache_create(name, size, align, flags) \ + kmem_cache_create(name, size, align, flags, NULL) +#endif + +#include "winnt_types.h" +#include "ndiswrapper.h" +#include "pe_linker.h" +#include "wrapmem.h" +#include "lin2win.h" +#include "loader.h" + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) +static inline void netif_tx_lock(struct net_device *dev) +{ + spin_lock(&dev->xmit_lock); +} +static inline void netif_tx_unlock(struct net_device *dev) +{ + spin_unlock(&dev->xmit_lock); +} +static inline void netif_tx_lock_bh(struct net_device *dev) +{ + spin_lock_bh(&dev->xmit_lock); +} +static inline void netif_tx_unlock_bh(struct net_device *dev) +{ + spin_unlock_bh(&dev->xmit_lock); +} +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) +static inline void netif_poll_enable(struct net_device *dev) +{ +} +static inline void netif_poll_disable(struct net_device *dev) +{ +} +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) +#define proc_net_root init_net.proc_net +#else +#define proc_net_root proc_net +#endif + +/* TICK is 100ns */ +#define TICKSPERSEC 10000000 +#define TICKSPERMSEC 10000 +#define SECSPERDAY 86400 +#define TICKSPERJIFFY ((TICKSPERSEC + HZ - 1) / HZ) + +#define int_div_round(x, y) (((x) + (y - 1)) / (y)) + +/* 1601 to 1970 is 369 years plus 89 leap days */ +#define SECS_1601_TO_1970 ((369 * 365 + 89) * (u64)SECSPERDAY) +#define TICKS_1601_TO_1970 (SECS_1601_TO_1970 * TICKSPERSEC) + +/* 100ns units to HZ; if sys_time is negative, relative to current + * clock, otherwise from year 1601 */ +#define SYSTEM_TIME_TO_HZ(sys_time) \ + (((sys_time) <= 0) ? \ + int_div_round(((u64)HZ * (-(sys_time))), TICKSPERSEC) : \ + int_div_round(((s64)HZ * ((sys_time) - ticks_1601())), TICKSPERSEC)) + +#define MSEC_TO_HZ(ms) int_div_round((ms * HZ), 1000) +#define USEC_TO_HZ(us) int_div_round((us * HZ), 1000000) + +extern u64 wrap_ticks_to_boot; + +static inline u64 ticks_1601(void) +{ + return wrap_ticks_to_boot + (u64)jiffies * TICKSPERJIFFY; +} + +typedef void (*generic_func)(void); + +struct wrap_export { + const char *name; + generic_func func; +}; + +#ifdef CONFIG_X86_64 + +#define WIN_SYMBOL(name, argc) \ + {#name, (generic_func) win2lin_ ## name ## _ ## argc} +#define WIN_WIN_SYMBOL(name, argc) \ + {#name, (generic_func) win2lin__win_ ## name ## _ ## argc} +#define WIN_FUNC_DECL(name, argc) \ + extern typeof(name) win2lin_ ## name ## _ ## argc; +#define WIN_FUNC_PTR(name, argc) win2lin_ ## name ## _ ## argc + +#else + +#define WIN_SYMBOL(name, argc) {#name, (generic_func)name} +#define WIN_WIN_SYMBOL(name, argc) {#name, (generic_func)_win_ ## name} +#define WIN_FUNC_DECL(name, argc) +#define WIN_FUNC_PTR(name, argc) name + +#endif + +#define WIN_FUNC(name, argc) name +/* map name s to f - if f is different from s */ +#define WIN_SYMBOL_MAP(s, f) + +#define POOL_TAG(A, B, C, D) \ + ((ULONG)((A) + ((B) << 8) + ((C) << 16) + ((D) << 24))) + +struct pe_image { + char name[MAX_DRIVER_NAME_LEN]; + UINT (*entry)(struct driver_object *, struct unicode_string *) wstdcall; + void *image; + int size; + int type; + + IMAGE_NT_HEADERS *nt_hdr; + IMAGE_OPTIONAL_HEADER *opt_hdr; +}; + +struct ndis_mp_block; + +struct wrap_timer { + struct nt_slist slist; + struct timer_list timer; + struct nt_timer *nt_timer; + long repeat; +#ifdef TIMER_DEBUG + unsigned long wrap_timer_magic; +#endif +}; + +struct ntos_work_item { + struct nt_list list; + void *arg1; + void *arg2; + NTOS_WORK_FUNC func; +}; + +struct wrap_device_setting { + struct nt_list list; + char name[MAX_SETTING_NAME_LEN]; + char value[MAX_SETTING_VALUE_LEN]; + void *encoded; +}; + +struct wrap_bin_file { + char name[MAX_DRIVER_NAME_LEN]; + size_t size; + void *data; +}; + +#define WRAP_DRIVER_CLIENT_ID 1 + +struct wrap_driver { + struct nt_list list; + struct driver_object *drv_obj; + char name[MAX_DRIVER_NAME_LEN]; + char version[MAX_SETTING_VALUE_LEN]; + unsigned short num_pe_images; + struct pe_image pe_images[MAX_DRIVER_PE_IMAGES]; + unsigned short num_bin_files; + struct wrap_bin_file *bin_files; + struct nt_list wrap_devices; + struct nt_list settings; + int dev_type; + struct ndis_driver *ndis_driver; +}; + +enum hw_status { + HW_INITIALIZED = 1, HW_SUSPENDED, HW_HALTED, HW_PRESENT, +}; + +struct wrap_device { + /* first part is (de)initialized once by loader */ + struct nt_list list; + int dev_bus; + int vendor; + int device; + int subvendor; + int subdevice; + char conf_file_name[MAX_DRIVER_NAME_LEN]; + char driver_name[MAX_DRIVER_NAME_LEN]; + struct wrap_driver *driver; + struct nt_list settings; + + /* rest should be (de)initialized when a device is + * (un)plugged */ + struct cm_resource_list *resource_list; + unsigned long hw_status; + struct device_object *pdo; + union { + struct { + struct pci_dev *pdev; + enum device_power_state wake_state; + } pci; + struct { + struct usb_device *udev; + struct usb_interface *intf; + int num_alloc_urbs; + struct nt_list wrap_urb_list; + } usb; + }; + union { + struct ndis_device *wnd; + }; +}; + +#define wrap_is_pci_bus(dev_bus) \ + (WRAP_BUS(dev_bus) == WRAP_PCI_BUS || \ + WRAP_BUS(dev_bus) == WRAP_PCMCIA_BUS) +#ifdef ENABLE_USB +/* earlier versions of ndiswrapper used 0 as USB_BUS */ +#define wrap_is_usb_bus(dev_bus) \ + (WRAP_BUS(dev_bus) == WRAP_USB_BUS || \ + WRAP_BUS(dev_bus) == WRAP_INTERNAL_BUS) +#else +#define wrap_is_usb_bus(dev_bus) 0 +#endif +#define wrap_is_bluetooth_device(dev_bus) \ + (WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE1 || \ + WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE2) + +extern workqueue_struct_t *ntos_wq; +#define schedule_ntos_work(work_struct) queue_work(ntos_wq, work_struct) +#define schedule_work(work_struct) queue_work(ntos_wq, work_struct) + +extern workqueue_struct_t *ndis_wq; +#define schedule_ndis_work(work_struct) queue_work(ndis_wq, work_struct) + +extern workqueue_struct_t *wrapndis_wq; +#define schedule_wrapndis_work(work_struct) queue_work(wrapndis_wq, work_struct) + +#define atomic_unary_op(var, size, oper) \ +do { \ + if (size == 1) \ + __asm__ __volatile__( \ + LOCK_PREFIX oper "b %b0\n\t" : "+m" (var)); \ + else if (size == 2) \ + __asm__ __volatile__( \ + LOCK_PREFIX oper "w %w0\n\t" : "+m" (var)); \ + else if (size == 4) \ + __asm__ __volatile__( \ + LOCK_PREFIX oper "l %0\n\t" : "+m" (var)); \ + else if (size == 8) \ + __asm__ __volatile__( \ + LOCK_PREFIX oper "q %q0\n\t" : "+m" (var)); \ + else { \ + extern void _invalid_op_size_(void); \ + _invalid_op_size_(); \ + } \ +} while (0) + +#define atomic_inc_var_size(var, size) atomic_unary_op(var, size, "inc") + +#define atomic_inc_var(var) atomic_inc_var_size(var, sizeof(var)) + +#define atomic_dec_var_size(var, size) atomic_unary_op(var, size, "dec") + +#define atomic_dec_var(var) atomic_dec_var_size(var, sizeof(var)) + +#define pre_atomic_add(var, i) \ +({ \ + typeof(var) pre; \ + __asm__ __volatile__( \ + LOCK_PREFIX "xadd %0, %1\n\t" \ + : "=r"(pre), "+m"(var) \ + : "0"(i)); \ + pre; \ +}) + +#define post_atomic_add(var, i) (pre_atomic_add(var, i) + i) + +#ifndef in_atomic +#define in_atomic() in_interrupt() +#endif + +#ifndef preempt_enable_no_resched +#define preempt_enable_no_resched() preempt_enable() +#endif + +//#define DEBUG_IRQL 1 + +#ifdef DEBUG_IRQL +#define assert_irql(cond) \ +do { \ + KIRQL _irql_ = current_irql(); \ + if (!(cond)) { \ + WARNING("assertion '%s' failed: %d", #cond, _irql_); \ + DBG_BLOCK(4) { \ + dump_stack(); \ + } \ + } \ +} while (0) +#else +#define assert_irql(cond) do { } while (0) +#endif + +/* When preempt is enabled, we should preempt_disable to raise IRQL to + * DISPATCH_LEVEL, to be consistent with the semantics. However, using + * a mutex instead, so that only ndiswrapper threads run one at a time + * on a processor when at DISPATCH_LEVEL seems to be enough. So that + * is what we will use until we learn otherwise. If + * preempt_(en|dis)able is required for some reason, comment out + * following #define. */ + +#define WRAP_PREEMPT 1 + +#if !defined(CONFIG_PREEMPT) || defined(CONFIG_PREEMPT_RT) +#ifndef WRAP_PREEMPT +#define WRAP_PREEMPT 1 +#endif +#endif + +//#undef WRAP_PREEMPT + +#ifdef WRAP_PREEMPT + +typedef struct { + int count; + struct mutex lock; +#ifdef CONFIG_SMP + typeof(current->cpus_allowed) cpus_allowed; +#endif + struct task_struct *task; +} irql_info_t; + +DECLARE_PER_CPU(irql_info_t, irql_info); + +static inline KIRQL raise_irql(KIRQL newirql) +{ + irql_info_t *info; + + assert(newirql == DISPATCH_LEVEL); + info = &get_cpu_var(irql_info); + if (info->task == current) { + assert(info->count > 0); + assert(mutex_is_locked(&info->lock)); +#if defined(CONFIG_SMP) && defined(DEBUG) + do { + cpumask_t cpumask; + cpumask = cpumask_of_cpu(smp_processor_id()); + cpus_xor(cpumask, cpumask, current->cpus_allowed); + assert(cpus_empty(cpumask)); + } while (0); +#endif + info->count++; + put_cpu_var(irql_info); + return DISPATCH_LEVEL; + } + /* TODO: is this enough to pin down to current cpu? */ +#ifdef CONFIG_SMP + assert(task_cpu(current) == smp_processor_id()); + info->cpus_allowed = current->cpus_allowed; + current->cpus_allowed = cpumask_of_cpu(smp_processor_id()); +#endif + put_cpu_var(irql_info); + mutex_lock(&info->lock); + assert(info->count == 0); + assert(info->task == NULL); + info->count = 1; + info->task = current; + return PASSIVE_LEVEL; +} + +static inline void lower_irql(KIRQL oldirql) +{ + irql_info_t *info; + + assert(oldirql <= DISPATCH_LEVEL); + info = &get_cpu_var(irql_info); + assert(info->task == current); + assert(mutex_is_locked(&info->lock)); + assert(info->count > 0); + if (--info->count == 0) { + info->task = NULL; +#ifdef CONFIG_SMP + current->cpus_allowed = info->cpus_allowed; +#endif + mutex_unlock(&info->lock); + } + put_cpu_var(irql_info); +} + +static inline KIRQL current_irql(void) +{ + int count; + if (in_irq() || irqs_disabled()) + EXIT4(return DIRQL); + if (in_atomic() || in_interrupt()) + EXIT4(return SOFT_IRQL); + count = get_cpu_var(irql_info).count; + put_cpu_var(irql_info); + if (count) + EXIT6(return DISPATCH_LEVEL); + else + EXIT6(return PASSIVE_LEVEL); +} + +#else + +static inline KIRQL current_irql(void) +{ + if (in_irq() || irqs_disabled()) + EXIT4(return DIRQL); + if (in_interrupt()) + EXIT4(return SOFT_IRQL); + if (in_atomic()) + EXIT6(return DISPATCH_LEVEL); + else + EXIT6(return PASSIVE_LEVEL); +} + +static inline KIRQL raise_irql(KIRQL newirql) +{ + KIRQL ret = in_atomic() ? DISPATCH_LEVEL : PASSIVE_LEVEL; + assert(newirql == DISPATCH_LEVEL); + assert(current_irql() <= DISPATCH_LEVEL); + preempt_disable(); + return ret; +} + +static inline void lower_irql(KIRQL oldirql) +{ + assert(current_irql() == DISPATCH_LEVEL); + preempt_enable(); +} + +#endif + +#define irql_gfp() (in_atomic() ? GFP_ATOMIC : GFP_KERNEL) + +/* Windows spinlocks are of type ULONG_PTR which is not big enough to + * store Linux spinlocks; so we implement Windows spinlocks using + * ULONG_PTR space with our own functions/macros */ + +/* Windows seems to use 0 for unlocked state of spinlock - if Linux + * convention of 1 for unlocked state is used, at least prism54 driver + * crashes */ + +#define NT_SPIN_LOCK_UNLOCKED 0 +#define NT_SPIN_LOCK_LOCKED 1 + +static inline void nt_spin_lock_init(NT_SPIN_LOCK *lock) +{ + *lock = NT_SPIN_LOCK_UNLOCKED; +} + +#ifdef CONFIG_SMP + +static inline void nt_spin_lock(NT_SPIN_LOCK *lock) +{ + __asm__ __volatile__( + "1:\t" + " xchgl %1, %0\n\t" + " testl %1, %1\n\t" + " jz 3f\n" + "2:\t" + " rep; nop\n\t" + " cmpl %2, %0\n\t" + " je 1b\n\t" + " jmp 2b\n" + "3:\n\t" + : "+m" (*lock) + : "r" (NT_SPIN_LOCK_LOCKED), "i" (NT_SPIN_LOCK_UNLOCKED)); +} + +static inline void nt_spin_unlock(NT_SPIN_LOCK *lock) +{ + *lock = NT_SPIN_LOCK_UNLOCKED; +} + +#else // CONFIG_SMP + +#define nt_spin_lock(lock) do { } while (0) + +#define nt_spin_unlock(lock) do { } while (0) + +#endif // CONFIG_SMP + +/* When kernel would've disabled preempt (e.g., in interrupt + * handlers), we need to fake preempt so driver thinks it is running + * at right IRQL */ + +/* raise IRQL to given (higher) IRQL if necessary before locking */ +static inline KIRQL nt_spin_lock_irql(NT_SPIN_LOCK *lock, KIRQL newirql) +{ + KIRQL oldirql = raise_irql(newirql); + nt_spin_lock(lock); + return oldirql; +} + +/* lower IRQL to given (lower) IRQL if necessary after unlocking */ +static inline void nt_spin_unlock_irql(NT_SPIN_LOCK *lock, KIRQL oldirql) +{ + nt_spin_unlock(lock); + lower_irql(oldirql); +} + +#define nt_spin_lock_irqsave(lock, flags) \ +do { \ + local_irq_save(flags); \ + preempt_disable(); \ + nt_spin_lock(lock); \ +} while (0) + +#define nt_spin_unlock_irqrestore(lock, flags) \ +do { \ + nt_spin_unlock(lock); \ + preempt_enable_no_resched(); \ + local_irq_restore(flags); \ + preempt_check_resched(); \ +} while (0) + +static inline ULONG SPAN_PAGES(void *ptr, SIZE_T length) +{ + return PAGE_ALIGN(((unsigned long)ptr & (PAGE_SIZE - 1)) + length) + >> PAGE_SHIFT; +} + +#ifdef CONFIG_X86_64 + +/* TODO: can these be implemented without using spinlock? */ + +static inline struct nt_slist *PushEntrySList(nt_slist_header *head, + struct nt_slist *entry, + NT_SPIN_LOCK *lock) +{ + KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); + entry->next = head->next; + head->next = entry; + head->depth++; + nt_spin_unlock_irql(lock, irql); + TRACE4("%p, %p, %p", head, entry, entry->next); + return entry->next; +} + +static inline struct nt_slist *PopEntrySList(nt_slist_header *head, + NT_SPIN_LOCK *lock) +{ + struct nt_slist *entry; + KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); + entry = head->next; + if (entry) { + head->next = entry->next; + head->depth--; + } + nt_spin_unlock_irql(lock, irql); + TRACE4("%p, %p", head, entry); + return entry; +} + +#else + +#define u64_low_32(x) ((u32)x) +#define u64_high_32(x) ((u32)(x >> 32)) + +static inline u64 cmpxchg8b(volatile u64 *ptr, u64 old, u64 new) +{ + u64 prev; + + __asm__ __volatile__( + "\n" + LOCK_PREFIX "cmpxchg8b %0\n" + : "+m" (*ptr), "=A" (prev) + : "A" (old), "b" (u64_low_32(new)), "c" (u64_high_32(new))); + return prev; +} + +/* slist routines below update slist atomically - no need for + * spinlocks */ + +static inline struct nt_slist *PushEntrySList(nt_slist_header *head, + struct nt_slist *entry, + NT_SPIN_LOCK *lock) +{ + nt_slist_header old, new; + do { + old.align = head->align; + entry->next = old.next; + new.next = entry; + new.depth = old.depth + 1; + } while (cmpxchg8b(&head->align, old.align, new.align) != old.align); + TRACE4("%p, %p, %p", head, entry, old.next); + return old.next; +} + +static inline struct nt_slist *PopEntrySList(nt_slist_header *head, + NT_SPIN_LOCK *lock) +{ + struct nt_slist *entry; + nt_slist_header old, new; + do { + old.align = head->align; + entry = old.next; + if (!entry) + break; + new.next = entry->next; + new.depth = old.depth - 1; + } while (cmpxchg8b(&head->align, old.align, new.align) != old.align); + TRACE4("%p, %p", head, entry); + return entry; +} + +#endif + +#define sleep_hz(n) \ +do { \ + set_current_state(TASK_INTERRUPTIBLE); \ + schedule_timeout(n); \ +} while (0) + +int ntoskernel_init(void); +void ntoskernel_exit(void); +int ntoskernel_init_device(struct wrap_device *wd); +void ntoskernel_exit_device(struct wrap_device *wd); +void *allocate_object(ULONG size, enum common_object_type type, + struct unicode_string *name); +void free_object(void *object); + +int usb_init(void); +void usb_exit(void); +int usb_init_device(struct wrap_device *wd); +void usb_exit_device(struct wrap_device *wd); +void usb_cancel_pending_urbs(void); + +int crt_init(void); +void crt_exit(void); +int rtl_init(void); +void rtl_exit(void); +int wrap_procfs_init(void); +void wrap_procfs_remove(void); + +int link_pe_images(struct pe_image *pe_image, unsigned short n); + +int stricmp(const char *s1, const char *s2); +void dump_bytes(const char *name, const u8 *from, int len); +struct mdl *allocate_init_mdl(void *virt, ULONG length); +void free_mdl(struct mdl *mdl); +struct driver_object *find_bus_driver(const char *name); +void free_custom_extensions(struct driver_extension *drv_obj_ext); +struct nt_thread *get_current_nt_thread(void); +u64 ticks_1601(void); +int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2); +void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type, + struct ndis_mp_block *nmb); +BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz, + unsigned long repeat_hz, struct kdpc *kdpc); + +LONG InterlockedDecrement(LONG volatile *val) wfastcall; +LONG InterlockedIncrement(LONG volatile *val) wfastcall; +struct nt_list *ExInterlockedInsertHeadList + (struct nt_list *head, struct nt_list *entry, + NT_SPIN_LOCK *lock) wfastcall; +struct nt_list *ExInterlockedInsertTailList + (struct nt_list *head, struct nt_list *entry, + NT_SPIN_LOCK *lock) wfastcall; +struct nt_list *ExInterlockedRemoveHeadList + (struct nt_list *head, NT_SPIN_LOCK *lock) wfastcall; +NTSTATUS IofCallDriver(struct device_object *dev_obj, struct irp *irp) wfastcall; +KIRQL KfRaiseIrql(KIRQL newirql) wfastcall; +void KfLowerIrql(KIRQL oldirql) wfastcall; +KIRQL KfAcquireSpinLock(NT_SPIN_LOCK *lock) wfastcall; +void KfReleaseSpinLock(NT_SPIN_LOCK *lock, KIRQL oldirql) wfastcall; +void IofCompleteRequest(struct irp *irp, CHAR prio_boost) wfastcall; +void KefReleaseSpinLockFromDpcLevel(NT_SPIN_LOCK *lock) wfastcall; + +LONG ObfReferenceObject(void *object) wfastcall; +void ObfDereferenceObject(void *object) wfastcall; + +#define ObReferenceObject(object) ObfReferenceObject(object) +#define ObDereferenceObject(object) ObfDereferenceObject(object) + +void WRITE_PORT_UCHAR(ULONG_PTR port, UCHAR value) wstdcall; +UCHAR READ_PORT_UCHAR(ULONG_PTR port) wstdcall; + +#undef ExAllocatePoolWithTag +void *ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size, + ULONG tag) wstdcall; +#if defined(ALLOC_DEBUG) && ALLOC_DEBUG > 1 +#define ExAllocatePoolWithTag(pool_type, size, tag) \ + wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__) +#endif + +void ExFreePool(void *p) wstdcall; +ULONG MmSizeOfMdl(void *base, ULONG length) wstdcall; +void __iomem *MmMapIoSpace(PHYSICAL_ADDRESS phys_addr, SIZE_T size, + enum memory_caching_type cache) wstdcall; +void MmUnmapIoSpace(void __iomem *addr, SIZE_T size) wstdcall; +void MmProbeAndLockPages(struct mdl *mdl, KPROCESSOR_MODE access_mode, + enum lock_operation operation) wstdcall; +void MmUnlockPages(struct mdl *mdl) wstdcall; +void KeInitializeEvent(struct nt_event *nt_event, + enum event_type type, BOOLEAN state) wstdcall; +LONG KeSetEvent(struct nt_event *nt_event, KPRIORITY incr, + BOOLEAN wait) wstdcall; +LONG KeResetEvent(struct nt_event *nt_event) wstdcall; +void KeClearEvent(struct nt_event *nt_event) wstdcall; +void KeInitializeDpc(struct kdpc *kdpc, void *func, void *ctx) wstdcall; +BOOLEAN queue_kdpc(struct kdpc *kdpc); +BOOLEAN dequeue_kdpc(struct kdpc *kdpc); + +void KeFlushQueuedDpcs(void) wstdcall; +NTSTATUS IoConnectInterrupt(struct kinterrupt **kinterrupt, + PKSERVICE_ROUTINE service_routine, + void *service_context, NT_SPIN_LOCK *lock, + ULONG vector, KIRQL irql, KIRQL synch_irql, + enum kinterrupt_mode interrupt_mode, + BOOLEAN shareable, KAFFINITY processor_enable_mask, + BOOLEAN floating_save) wstdcall; +void IoDisconnectInterrupt(struct kinterrupt *interrupt) wstdcall; +BOOLEAN KeSynchronizeExecution(struct kinterrupt *interrupt, + PKSYNCHRONIZE_ROUTINE synch_routine, + void *ctx) wstdcall; + +NTSTATUS KeWaitForSingleObject(void *object, KWAIT_REASON reason, + KPROCESSOR_MODE waitmode, BOOLEAN alertable, + LARGE_INTEGER *timeout) wstdcall; +struct mdl *IoAllocateMdl(void *virt, ULONG length, BOOLEAN second_buf, + BOOLEAN charge_quota, struct irp *irp) wstdcall; +void MmBuildMdlForNonPagedPool(struct mdl *mdl) wstdcall; +void IoFreeMdl(struct mdl *mdl) wstdcall; +NTSTATUS IoCreateDevice(struct driver_object *driver, ULONG dev_ext_length, + struct unicode_string *dev_name, DEVICE_TYPE dev_type, + ULONG dev_chars, BOOLEAN exclusive, + struct device_object **dev_obj) wstdcall; +NTSTATUS IoCreateSymbolicLink(struct unicode_string *link, + struct unicode_string *dev_name) wstdcall; +void IoDeleteDevice(struct device_object *dev) wstdcall; +void IoDetachDevice(struct device_object *topdev) wstdcall; +struct device_object *IoGetAttachedDevice(struct device_object *dev) wstdcall; +struct device_object *IoGetAttachedDeviceReference + (struct device_object *dev) wstdcall; +NTSTATUS IoAllocateDriverObjectExtension + (struct driver_object *drv_obj, void *client_id, ULONG extlen, + void **ext) wstdcall; +void *IoGetDriverObjectExtension(struct driver_object *drv, + void *client_id) wstdcall; +struct device_object *IoAttachDeviceToDeviceStack + (struct device_object *src, struct device_object *dst) wstdcall; +void KeInitializeEvent(struct nt_event *nt_event, enum event_type type, + BOOLEAN state) wstdcall; +struct irp *IoAllocateIrp(char stack_count, BOOLEAN charge_quota) wstdcall; +void IoFreeIrp(struct irp *irp) wstdcall; +BOOLEAN IoCancelIrp(struct irp *irp) wstdcall; +struct irp *IoBuildSynchronousFsdRequest + (ULONG major_func, struct device_object *dev_obj, void *buf, + ULONG length, LARGE_INTEGER *offset, struct nt_event *event, + struct io_status_block *status) wstdcall; +struct irp *IoBuildAsynchronousFsdRequest + (ULONG major_func, struct device_object *dev_obj, void *buf, + ULONG length, LARGE_INTEGER *offset, + struct io_status_block *status) wstdcall; +NTSTATUS PoCallDriver(struct device_object *dev_obj, struct irp *irp) wstdcall; + +NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp) wstdcall; +WIN_FUNC_DECL(IoPassIrpDown,2); +NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj, + struct irp *irp) wstdcall; +NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj, + struct irp *irp) wstdcall; +NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj, + struct irp *irp) wstdcall; + +KIRQL KeGetCurrentIrql(void) wstdcall; +void KeInitializeSpinLock(NT_SPIN_LOCK *lock) wstdcall; +void KeAcquireSpinLock(NT_SPIN_LOCK *lock, KIRQL *irql) wstdcall; +void KeReleaseSpinLock(NT_SPIN_LOCK *lock, KIRQL oldirql) wstdcall; +KIRQL KeAcquireSpinLockRaiseToDpc(NT_SPIN_LOCK *lock) wstdcall; + +void IoAcquireCancelSpinLock(KIRQL *irql) wstdcall; +void IoReleaseCancelSpinLock(KIRQL irql) wstdcall; + +void RtlCopyMemory(void *dst, const void *src, SIZE_T length) wstdcall; +NTSTATUS RtlUnicodeStringToAnsiString + (struct ansi_string *dst, const struct unicode_string *src, + BOOLEAN dup) wstdcall; +NTSTATUS RtlAnsiStringToUnicodeString + (struct unicode_string *dst, const struct ansi_string *src, + BOOLEAN dup) wstdcall; +void RtlInitAnsiString(struct ansi_string *dst, const char *src) wstdcall; +void RtlInitString(struct ansi_string *dst, const char *src) wstdcall; +void RtlInitUnicodeString(struct unicode_string *dest, + const wchar_t *src) wstdcall; +void RtlFreeUnicodeString(struct unicode_string *string) wstdcall; +void RtlFreeAnsiString(struct ansi_string *string) wstdcall; +LONG RtlCompareUnicodeString(const struct unicode_string *s1, + const struct unicode_string *s2, + BOOLEAN case_insensitive) wstdcall; +void RtlCopyUnicodeString(struct unicode_string *dst, + struct unicode_string *src) wstdcall; +NTSTATUS RtlUpcaseUnicodeString(struct unicode_string *dst, + struct unicode_string *src, + BOOLEAN alloc) wstdcall; +void KeInitializeTimer(struct nt_timer *nt_timer) wstdcall; +void KeInitializeTimerEx(struct nt_timer *nt_timer, + enum timer_type type) wstdcall; +BOOLEAN KeSetTimerEx(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, + LONG period_ms, struct kdpc *kdpc) wstdcall; +BOOLEAN KeSetTimer(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, + struct kdpc *kdpc) wstdcall; +BOOLEAN KeCancelTimer(struct nt_timer *nt_timer) wstdcall; +void KeInitializeDpc(struct kdpc *kdpc, void *func, void *ctx) wstdcall; +struct nt_thread *KeGetCurrentThread(void) wstdcall; +NTSTATUS ObReferenceObjectByHandle(void *handle, ACCESS_MASK desired_access, + void *obj_type, KPROCESSOR_MODE access_mode, + void **object, void *handle_info) wstdcall; + +void adjust_user_shared_data_addr(char *driver, unsigned long length); + +extern spinlock_t ntoskernel_lock; +extern spinlock_t irp_cancel_lock; +extern struct nt_list object_list; +#ifdef CONFIG_X86_64 +extern struct kuser_shared_data kuser_shared_data; +#endif + +#define IoCompleteRequest(irp, prio) IofCompleteRequest(irp, prio) +#define IoCallDriver(dev, irp) IofCallDriver(dev, irp) + +#if defined(IO_DEBUG) +#define DUMP_IRP(_irp) \ +do { \ + struct io_stack_location *_irp_sl; \ + _irp_sl = IoGetCurrentIrpStackLocation(_irp); \ + IOTRACE("irp: %p, stack size: %d, cl: %d, sl: %p, dev_obj: %p, " \ + "mj_fn: %d, minor_fn: %d, nt_urb: %p, event: %p", \ + _irp, _irp->stack_count, (_irp)->current_location, \ + _irp_sl, _irp_sl->dev_obj, _irp_sl->major_fn, \ + _irp_sl->minor_fn, IRP_URB(_irp), \ + (_irp)->user_event); \ +} while (0) +#else +#define DUMP_IRP(_irp) do { } while (0) +#endif + +#endif // _NTOSKERNEL_H_ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/Makefile @@ -0,0 +1,38 @@ +ndiswrapper-objs := crt.o hal.o iw_ndis.o loader.o ndis.o ntoskernel.o ntoskernel_io.o \ + pe_linker.o pnp.o proc.o rtl.o wrapmem.o wrapndis.o wrapper.o usb.o + +EXPORTS = crt_exports.h hal_exports.h ndis_exports.h ntoskernel_exports.h \ + ntoskernel_io_exports.h rtl_exports.h usb_exports.h + +STUB_SRCS = crt.c hal.c ndis.c ntoskernel.c ntoskernel_io.c \ + pnp.c rtl.c wrapndis.c usb.c + + +EXTRA_CFLAGS += -DENABLE_USB -I$(obj) +EXTRA_AFLAGS += -I$(obj) + +# generate exports symbol table from C files +quiet_cmd_mkexport = MKEXPORT $@ +cmd_mkexport = $(SHELL) $(srctree)/$(src)/mkexport.sh $< $@ + +%_exports.h: %.c $(srctree)/$(src)/mkexport.sh FORCE + $(call if_changed,mkexport) + +$(addprefix $(obj)/,$(EXPORTS:_exports.h=.o)): %.o: %_exports.h +extra-y += $(EXPORTS) + +ifeq ($(CONFIG_X86_64),y) +quiet_cmd_mkstubs = MKSTUBS $@ +cmd_mkstubs = $(SHELL) $(srctree)/$(src)/mkstubs.sh $(addprefix $(srctree)/$(src)/,$(STUB_SRCS)) >$@ + +$(obj)/win2lin_stubs.h: $(addprefix $(srctree)/$(src)/,$(STUB_SRCS)) FORCE + $(call if_changed,mkstubs) + +$(obj)/win2lin_stubs.o: $(obj)/win2lin_stubs.h +extra-y += win2lin_stubs.h +ndiswrapper-objs += win2lin_stubs.o +else +ndiswrapper-objs += divdi3.o +endif + +obj-$(CONFIG_NDISWRAPPER) := ndiswrapper.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/pnp.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/pnp.c @@ -0,0 +1,742 @@ +/* + * Copyright (C) 2005 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "usb.h" +#include "pnp.h" +#include "wrapndis.h" +#include "loader.h" + +/* Functions callable from the NDIS driver */ +wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo, + struct irp *irp); +wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp); +wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp); + +static NTSTATUS start_pdo(struct device_object *pdo) +{ + int i, ret, count, resources_size; + struct wrap_device *wd; + struct pci_dev *pdev; + struct cm_partial_resource_descriptor *entry; + struct cm_partial_resource_list *partial_resource_list; + + ENTER1("%p, %p", pdo, pdo->reserved); + wd = pdo->reserved; + if (ntoskernel_init_device(wd)) + EXIT1(return STATUS_FAILURE); + if (wrap_is_usb_bus(wd->dev_bus)) { +#ifdef ENABLE_USB + if (usb_init_device(wd)) { + ntoskernel_exit_device(wd); + EXIT1(return STATUS_FAILURE); + } +#endif + EXIT1(return STATUS_SUCCESS); + } + if (!wrap_is_pci_bus(wd->dev_bus)) + EXIT1(return STATUS_SUCCESS); + pdev = wd->pci.pdev; + ret = pci_enable_device(pdev); + if (ret) { + ERROR("couldn't enable PCI device: %x", ret); + return STATUS_FAILURE; + } + ret = pci_request_regions(pdev, DRIVER_NAME); + if (ret) { + ERROR("couldn't request PCI regions: %x", ret); + goto err_enable; + } + pci_set_power_state(pdev, PCI_D0); +#ifdef CONFIG_X86_64 + /* 64-bit broadcom driver doesn't work if DMA is allocated + * from over 1GB */ + if (wd->vendor == 0x14e4) { + if (pci_set_dma_mask(pdev, DMA_BIT_MASK(30)) || + pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(30))) + WARNING("couldn't set DMA mask; this driver " + "may not work with more than 1GB RAM"); + } +#endif + /* IRQ resource entry is filled in from pdev, instead of + * pci_resource macros */ + for (i = count = 0; pci_resource_start(pdev, i); i++) + if ((pci_resource_flags(pdev, i) & IORESOURCE_MEM) || + (pci_resource_flags(pdev, i) & IORESOURCE_IO)) + count++; + /* space for entry for IRQ is already in + * cm_partial_resource_list */ + resources_size = sizeof(struct cm_resource_list) + + sizeof(struct cm_partial_resource_descriptor) * count; + TRACE2("resources: %d, %d", count, resources_size); + wd->resource_list = kzalloc(resources_size, GFP_KERNEL); + if (!wd->resource_list) { + WARNING("couldn't allocate memory"); + goto err_regions; + } + wd->resource_list->count = 1; + wd->resource_list->list[0].interface_type = PCIBus; + /* bus_number is not used by WDM drivers */ + wd->resource_list->list[0].bus_number = pdev->bus->number; + + partial_resource_list = + &wd->resource_list->list->partial_resource_list; + partial_resource_list->version = 1; + partial_resource_list->revision = 1; + partial_resource_list->count = count + 1; + + for (i = count = 0; pci_resource_start(pdev, i); i++) { + entry = &partial_resource_list->partial_descriptors[count]; + TRACE2("%d", count); + if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { + entry->type = CmResourceTypeMemory; + entry->flags = CM_RESOURCE_MEMORY_READ_WRITE; + entry->share = CmResourceShareDeviceExclusive; + } else if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { + entry->type = CmResourceTypePort; + entry->flags = CM_RESOURCE_PORT_IO; + entry->share = CmResourceShareDeviceExclusive; +#if 0 + } else if (pci_resource_flags(pdev, i) & IORESOURCE_DMA) { + /* it looks like no driver uses this resource */ + typeof(pci_resource_flags(pdev, 0)) flags; + entry->type = CmResourceTypeDma; + flags = pci_resource_flags(pdev, i); + if (flags & IORESOURCE_DMA_TYPEA) + entry->flags |= CM_RESOURCE_DMA_TYPE_A; + else if (flags & IORESOURCE_DMA_TYPEB) + entry->flags |= CM_RESOURCE_DMA_TYPE_B; + else if (flags & IORESOURCE_DMA_TYPEF) + entry->flags |= CM_RESOURCE_DMA_TYPE_F; + if (flags & IORESOURCE_DMA_8BIT) + entry->flags |= CM_RESOURCE_DMA_8; + else if (flags & IORESOURCE_DMA_16BIT) + entry->flags |= CM_RESOURCE_DMA_16; + /* what about 32bit DMA? */ + else if (flags & IORESOURCE_DMA_8AND16BIT) + entry->flags |= CM_RESOURCE_DMA_8_AND_16; + if (flags & IORESOURCE_DMA_MASTER) + entry->flags |= CM_RESOURCE_DMA_BUS_MASTER; + entry->u.dma.channel = pci_resource_start(pdev, i); + /* what should this be? */ + entry->u.dma.port = 1; +#endif + } else + continue; + /* TODO: Add other resource types? */ + entry->u.generic.start = + (ULONG_PTR)pci_resource_start(pdev, i); + entry->u.generic.length = pci_resource_len(pdev, i); + count++; + } + + /* put IRQ resource at the end */ + entry = &partial_resource_list->partial_descriptors[count++]; + entry->type = CmResourceTypeInterrupt; + entry->flags = CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE; + /* we assume all devices use shared IRQ */ + entry->share = CmResourceShareShared; + /* as per documentation, interrupt level should be DIRQL, but + * examples from DDK as well some drivers, such as AR5211, + * RT8180L use interrupt level as interrupt vector also in + * NdisMRegisterInterrupt */ + entry->u.interrupt.level = pdev->irq; + entry->u.interrupt.vector = pdev->irq; + entry->u.interrupt.affinity = -1; + + TRACE2("resource list count %d, irq: %d", + partial_resource_list->count, pdev->irq); + pci_set_drvdata(pdev, wd); + EXIT1(return STATUS_SUCCESS); +err_regions: + pci_release_regions(pdev); +err_enable: + pci_disable_device(pdev); + wd->pci.pdev = NULL; + wd->pdo = NULL; + EXIT1(return STATUS_FAILURE); +} + +static void remove_pdo(struct device_object *pdo) +{ + struct wrap_device *wd = pdo->reserved; + + ntoskernel_exit_device(wd); + if (wrap_is_pci_bus(wd->dev_bus)) { + struct pci_dev *pdev = wd->pci.pdev; + pci_release_regions(pdev); + pci_disable_device(pdev); + wd->pci.pdev = NULL; + pci_set_drvdata(pdev, NULL); + } else if (wrap_is_usb_bus(wd->dev_bus)) { +#ifdef ENABLE_USB + usb_exit_device(wd); +#endif + } + if (wd->resource_list) + kfree(wd->resource_list); + wd->resource_list = NULL; + return; +} + +static NTSTATUS IoSendIrpTopDev(struct device_object *dev_obj, ULONG major_fn, + ULONG minor_fn, struct io_stack_location *sl) +{ + NTSTATUS status; + struct nt_event event; + struct irp *irp; + struct io_stack_location *irp_sl; + struct device_object *top_dev = IoGetAttachedDeviceReference(dev_obj); + + KeInitializeEvent(&event, NotificationEvent, FALSE); + irp = IoBuildSynchronousFsdRequest(IRP_MJ_PNP, top_dev, NULL, 0, NULL, + &event, NULL); + irp->io_status.status = STATUS_NOT_IMPLEMENTED; + irp->io_status.info = 0; + irp_sl = IoGetNextIrpStackLocation(irp); + if (sl) + memcpy(irp_sl, sl, sizeof(*irp_sl)); + irp_sl->major_fn = major_fn; + irp_sl->minor_fn = minor_fn; + status = IoCallDriver(top_dev, irp); + if (status == STATUS_PENDING) { + KeWaitForSingleObject(&event, Executive, KernelMode, + FALSE, NULL); + status = irp->io_status.status; + } + ObDereferenceObject(top_dev); + return status; +} + +wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo, + struct irp *irp) +{ + struct io_stack_location *irp_sl; + NTSTATUS status; + + DUMP_IRP(irp); + irp_sl = IoGetCurrentIrpStackLocation(irp); +#ifdef ENABLE_USB + status = wrap_submit_irp(pdo, irp); + IOTRACE("status: %08X", status); + if (status != STATUS_PENDING) + IoCompleteRequest(irp, IO_NO_INCREMENT); +#else + status = irp->io_status.status = STATUS_NOT_IMPLEMENTED; + IoCompleteRequest(irp, IO_NO_INCREMENT); +#endif + IOEXIT(return status); +} +WIN_FUNC_DECL(pdoDispatchDeviceControl,2) + +wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp) +{ + struct io_stack_location *irp_sl; + struct wrap_device *wd; + NTSTATUS status; +#ifdef ENABLE_USB + struct usbd_bus_interface_usbdi *usb_intf; +#endif + + irp_sl = IoGetCurrentIrpStackLocation(irp); + TRACE2("%p %d:%d", pdo, irp_sl->major_fn, irp_sl->minor_fn); + wd = pdo->reserved; + switch (irp_sl->minor_fn) { + case IRP_MN_START_DEVICE: + status = start_pdo(pdo); + break; + case IRP_MN_QUERY_STOP_DEVICE: + case IRP_MN_STOP_DEVICE: + case IRP_MN_QUERY_REMOVE_DEVICE: + status = STATUS_SUCCESS; + break; + case IRP_MN_REMOVE_DEVICE: + remove_pdo(pdo); + status = STATUS_SUCCESS; + break; + case IRP_MN_QUERY_INTERFACE: +#ifdef ENABLE_USB + if (!wrap_is_usb_bus(wd->dev_bus)) { + status = STATUS_NOT_IMPLEMENTED; + break; + } + TRACE2("type: %x, size: %d, version: %d", + irp_sl->params.query_intf.type->data1, + irp_sl->params.query_intf.size, + irp_sl->params.query_intf.version); + usb_intf = (struct usbd_bus_interface_usbdi *) + irp_sl->params.query_intf.intf; + usb_intf->Context = wd; + usb_intf->InterfaceReference = USBD_InterfaceReference; + usb_intf->InterfaceDereference = USBD_InterfaceDereference; + usb_intf->GetUSBDIVersion = USBD_InterfaceGetUSBDIVersion; + usb_intf->QueryBusTime = USBD_InterfaceQueryBusTime; + usb_intf->SubmitIsoOutUrb = USBD_InterfaceSubmitIsoOutUrb; + usb_intf->QueryBusInformation = + USBD_InterfaceQueryBusInformation; + if (irp_sl->params.query_intf.version >= + USB_BUSIF_USBDI_VERSION_1) + usb_intf->IsDeviceHighSpeed = + USBD_InterfaceIsDeviceHighSpeed; + if (irp_sl->params.query_intf.version >= + USB_BUSIF_USBDI_VERSION_2) + usb_intf->LogEntry = USBD_InterfaceLogEntry; + status = STATUS_SUCCESS; +#else + status = STATUS_NOT_IMPLEMENTED; +#endif + break; + default: + TRACE2("fn %d not implemented", irp_sl->minor_fn); + status = STATUS_SUCCESS; + break; + } + irp->io_status.status = status; + TRACE2("status: %08X", status); + IoCompleteRequest(irp, IO_NO_INCREMENT); + IOEXIT(return status); +} +WIN_FUNC_DECL(pdoDispatchPnp,2) + +wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp) +{ + struct io_stack_location *irp_sl; + struct wrap_device *wd; + union power_state power_state; + struct pci_dev *pdev; + NTSTATUS status; + + irp_sl = IoGetCurrentIrpStackLocation(irp); + wd = pdo->reserved; + TRACE2("pdo: %p, fn: %d:%d, wd: %p", + pdo, irp_sl->major_fn, irp_sl->minor_fn, wd); + switch (irp_sl->minor_fn) { + case IRP_MN_WAIT_WAKE: + /* TODO: this is not complete/correct */ + TRACE2("state: %d, completion: %p", + irp_sl->params.power.state.system_state, + irp_sl->completion_routine); + IoMarkIrpPending(irp); + status = STATUS_PENDING; + break; + case IRP_MN_SET_POWER: + power_state = irp_sl->params.power.state; + if (power_state.device_state == PowerDeviceD0) { + TRACE2("resuming %p", wd); + if (wrap_is_pci_bus(wd->dev_bus)) { + pdev = wd->pci.pdev; + pci_restore_state(pdev); + if (wd->pci.wake_state == PowerDeviceD3) { + pci_enable_wake(wd->pci.pdev, + PCI_D3hot, 0); + pci_enable_wake(wd->pci.pdev, + PCI_D3cold, 0); + } + pci_set_power_state(pdev, PCI_D0); + } else { // usb device +#ifdef ENABLE_USB + wrap_resume_urbs(wd); +#endif + } + } else { + TRACE2("suspending device %p", wd); + if (wrap_is_pci_bus(wd->dev_bus)) { + pdev = wd->pci.pdev; + pci_save_state(pdev); + TRACE2("%d", wd->pci.wake_state); + if (wd->pci.wake_state == PowerDeviceD3) { + pci_enable_wake(wd->pci.pdev, + PCI_D3hot, 1); + pci_enable_wake(wd->pci.pdev, + PCI_D3cold, 1); + } + pci_set_power_state(pdev, PCI_D3hot); + } else { // usb device +#ifdef ENABLE_USB + wrap_suspend_urbs(wd); +#endif + } + } + status = STATUS_SUCCESS; + break; + case IRP_MN_QUERY_POWER: + status = STATUS_SUCCESS; + break; + default: + TRACE2("fn %d not implemented", irp_sl->minor_fn); + status = STATUS_SUCCESS; + break; + } + irp->io_status.status = status; + IoCompleteRequest(irp, IO_NO_INCREMENT); + return status; +} +WIN_FUNC_DECL(pdoDispatchPower,2) + +static NTSTATUS pnp_set_device_power_state(struct wrap_device *wd, + enum device_power_state state) +{ + NTSTATUS status; + struct device_object *pdo; + struct io_stack_location irp_sl; + + pdo = wd->pdo; + IOTRACE("%p, %p", pdo, IoGetAttachedDevice(pdo)); + memset(&irp_sl, 0, sizeof(irp_sl)); + irp_sl.params.power.state.device_state = state; + irp_sl.params.power.type = DevicePowerState; + if (state > PowerDeviceD0) { + status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_QUERY_POWER, + &irp_sl); + if (status != STATUS_SUCCESS) { + TRACE1("query of power to %d returns %08X", + state, status); + EXIT1(return status); + } + } + status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_SET_POWER, &irp_sl); + if (status != STATUS_SUCCESS) + WARNING("setting power to %d failed: %08X", state, status); + EXIT1(return status); +} + +NTSTATUS pnp_start_device(struct wrap_device *wd) +{ + struct device_object *fdo; + struct device_object *pdo; + struct io_stack_location irp_sl; + NTSTATUS status; + + pdo = wd->pdo; + /* TODO: for now we use same resources for both translated + * resources and raw resources */ + memset(&irp_sl, 0, sizeof(irp_sl)); + irp_sl.params.start_device.allocated_resources = + wd->resource_list; + irp_sl.params.start_device.allocated_resources_translated = + wd->resource_list; + status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_START_DEVICE, &irp_sl); + fdo = IoGetAttachedDevice(pdo); + if (status == STATUS_SUCCESS) + fdo->drv_obj->drv_ext->count++; + else + WARNING("Windows driver couldn't initialize the device (%08X)", + status); + EXIT1(return status); +} + +NTSTATUS pnp_stop_device(struct wrap_device *wd) +{ + struct device_object *pdo; + NTSTATUS status; + + pdo = wd->pdo; + status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_STOP_DEVICE, + NULL); + if (status != STATUS_SUCCESS) + WARNING("status: %08X", status); + /* for now we ignore query status */ + status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_STOP_DEVICE, NULL); + if (status != STATUS_SUCCESS) + WARNING("status: %08X", status); + if (status != STATUS_SUCCESS) + WARNING("status: %08X", status); + EXIT2(return status); +} + +NTSTATUS pnp_remove_device(struct wrap_device *wd) +{ + struct device_object *pdo, *fdo; + struct driver_object *fdo_drv_obj; + NTSTATUS status; + + pdo = wd->pdo; + fdo = IoGetAttachedDevice(pdo); + fdo_drv_obj = fdo->drv_obj; + TRACE2("%p, %p, %p", pdo, fdo, fdo_drv_obj); + status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_REMOVE_DEVICE, + NULL); + if (status != STATUS_SUCCESS) + WARNING("status: %08X", status); + + status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_REMOVE_DEVICE, NULL); + if (status != STATUS_SUCCESS) + WARNING("status: %08X", status); + /* TODO: should we use count in drv_ext or driver's Object + * header reference count to keep count of devices associated + * with a driver? */ + if (status == STATUS_SUCCESS) + fdo_drv_obj->drv_ext->count--; + TRACE1("count: %d", fdo_drv_obj->drv_ext->count); + if (fdo_drv_obj->drv_ext->count < 0) + WARNING("wrong count: %d", fdo_drv_obj->drv_ext->count); + if (fdo_drv_obj->drv_ext->count == 0) { + struct wrap_driver *wrap_driver; + TRACE1("unloading driver: %p", fdo_drv_obj); + wrap_driver = + IoGetDriverObjectExtension(fdo_drv_obj, + (void *)WRAP_DRIVER_CLIENT_ID); + if (fdo_drv_obj->unload) + LIN2WIN1(fdo_drv_obj->unload, fdo_drv_obj); + if (wrap_driver) { + if (down_interruptible(&loader_mutex)) + WARNING("couldn't obtain loader_mutex"); + unload_wrap_driver(wrap_driver); + up(&loader_mutex); + } else + ERROR("couldn't get wrap_driver"); + ObDereferenceObject(fdo_drv_obj); + } + IoDeleteDevice(pdo); + unload_wrap_device(wd); + EXIT1(return status); +} + +WIN_FUNC_DECL(IoInvalidDeviceRequest,2) + +static struct device_object *alloc_pdo(struct driver_object *drv_obj) +{ + struct device_object *pdo; + NTSTATUS status ; + int i; + struct ansi_string ansi_name; + struct unicode_string unicode_name; + + RtlInitAnsiString(&ansi_name, "NDISpdo"); + if (RtlAnsiStringToUnicodeString(&unicode_name, &ansi_name, TRUE) == + STATUS_SUCCESS) { + status = IoCreateDevice(drv_obj, 0, &unicode_name, + FILE_DEVICE_UNKNOWN, + FILE_AUTOGENERATED_DEVICE_NAME, + FALSE, &pdo); + RtlFreeUnicodeString(&unicode_name); + } else { + status = IoCreateDevice(drv_obj, 0, NULL, + FILE_DEVICE_UNKNOWN, + FILE_AUTOGENERATED_DEVICE_NAME, + FALSE, &pdo); + } + TRACE1("%p, %d, %p", drv_obj, status, pdo); + if (status != STATUS_SUCCESS) + return NULL; + /* dispatch routines are called as Windows functions */ + for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++) + drv_obj->major_func[i] = WIN_FUNC_PTR(IoInvalidDeviceRequest,2); + drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] = + WIN_FUNC_PTR(pdoDispatchDeviceControl,2); + drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] = + WIN_FUNC_PTR(pdoDispatchDeviceControl,2); + drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(pdoDispatchPower,2); + drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(pdoDispatchPnp,2); + return pdo; +} + +static int wrap_pnp_start_device(struct wrap_device *wd) +{ + struct wrap_driver *driver; + struct device_object *pdo; + struct driver_object *pdo_drv_obj; + + ENTER1("wd: %p", wd); + + if (!((wrap_is_pci_bus(wd->dev_bus)) || + (wrap_is_usb_bus(wd->dev_bus)))) { + ERROR("bus type %d (%d) not supported", + WRAP_BUS(wd->dev_bus), wd->dev_bus); + EXIT1(return -EINVAL); + } + driver = load_wrap_driver(wd); + if (!driver) + return -ENODEV; + + wd->driver = driver; + wd->dev_bus = WRAP_DEVICE_BUS(driver->dev_type, WRAP_BUS(wd->dev_bus)); + TRACE1("dev type: %d, bus type: %d, %d", WRAP_DEVICE(wd->dev_bus), + WRAP_BUS(wd->dev_bus), wd->dev_bus); + TRACE1("%d, %d", driver->dev_type, wrap_is_usb_bus(wd->dev_bus)); + /* first create pdo */ + if (wrap_is_pci_bus(wd->dev_bus)) + pdo_drv_obj = find_bus_driver("PCI"); + else // if (wrap_is_usb_bus(wd->dev_bus)) + pdo_drv_obj = find_bus_driver("USB"); + if (!pdo_drv_obj) + return -EINVAL; + pdo = alloc_pdo(pdo_drv_obj); + if (!pdo) + return -ENOMEM; + wd->pdo = pdo; + pdo->reserved = wd; + if (WRAP_DEVICE(wd->dev_bus) == WRAP_NDIS_DEVICE) { + if (init_ndis_driver(driver->drv_obj)) { + IoDeleteDevice(pdo); + return -EINVAL; + } + } + TRACE1("%p", driver->drv_obj->drv_ext->add_device); + if (driver->drv_obj->drv_ext->add_device(driver->drv_obj, pdo) != + STATUS_SUCCESS) { + IoDeleteDevice(pdo); + return -ENOMEM; + } + if (pnp_start_device(wd) != STATUS_SUCCESS) { + /* TODO: we need proper cleanup, to deallocate memory, + * for example */ + pnp_remove_device(wd); + return -EINVAL; + } + return 0; +} + +/* + * This function should not be marked __devinit because PCI IDs are + * added dynamically. + */ +int wrap_pnp_start_pci_device(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct load_device load_device; + struct wrap_device *wd; + + ENTER1("called for %04x:%04x:%04x:%04x", pdev->vendor, pdev->device, + pdev->subsystem_vendor, pdev->subsystem_device); + + load_device.bus = WRAP_PCI_BUS; + load_device.vendor = pdev->vendor; + load_device.device = pdev->device; + load_device.subvendor = pdev->subsystem_vendor; + load_device.subdevice = pdev->subsystem_device; + wd = load_wrap_device(&load_device); + if (!wd) + EXIT1(return -ENODEV); + wd->pci.pdev = pdev; + return wrap_pnp_start_device(wd); +} + +void wrap_pnp_remove_pci_device(struct pci_dev *pdev) +{ + struct wrap_device *wd; + + wd = (struct wrap_device *)pci_get_drvdata(pdev); + ENTER1("%p, %p", pdev, wd); + if (!wd) + EXIT1(return); + pnp_remove_device(wd); +} + +int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state) +{ + struct wrap_device *wd; + + wd = (struct wrap_device *)pci_get_drvdata(pdev); + return pnp_set_device_power_state(wd, PowerDeviceD3); +} + +int wrap_pnp_resume_pci_device(struct pci_dev *pdev) +{ + struct wrap_device *wd; + + wd = (struct wrap_device *)pci_get_drvdata(pdev); + return pnp_set_device_power_state(wd, PowerDeviceD0); +} + +#ifdef ENABLE_USB +int wrap_pnp_start_usb_device(struct usb_interface *intf, + const struct usb_device_id *usb_id) +{ + struct wrap_device *wd; + int ret; + struct usb_device *udev = interface_to_usbdev(intf); + ENTER1("%04x, %04x, %04x", udev->descriptor.idVendor, + udev->descriptor.idProduct, udev->descriptor.bDeviceClass); + + /* USB device (e.g., RNDIS) may have multiple interfaces; + initialize one interface only (is there a way to know which + of these interfaces is for network?) */ + + if ((wd = get_wrap_device(udev, WRAP_USB_BUS))) { + TRACE1("device already initialized: %p", wd); + usb_set_intfdata(intf, NULL); + ret = 0; + } else { + struct load_device load_device; + + load_device.bus = WRAP_USB_BUS; + load_device.vendor = le16_to_cpu(udev->descriptor.idVendor); + load_device.device = le16_to_cpu(udev->descriptor.idProduct); + load_device.subvendor = 0; + load_device.subdevice = 0; + wd = load_wrap_device(&load_device); + TRACE2("%p", wd); + if (wd) { + /* some devices (e.g., TI 4150, RNDIS) need + * full reset */ + ret = usb_reset_device(udev); + if (ret) + WARNING("reset failed: %d", ret); + usb_set_intfdata(intf, wd); + wd->usb.intf = intf; + wd->usb.udev = udev; + ret = wrap_pnp_start_device(wd); + } else + ret = -ENODEV; + } + + TRACE2("ret: %d", ret); + if (ret) + EXIT1(return ret); + else + return 0; +} + +void __devexit wrap_pnp_remove_usb_device(struct usb_interface *intf) +{ + struct wrap_device *wd; + + wd = (struct wrap_device *)usb_get_intfdata(intf); + TRACE1("%p, %p", intf, wd); + if (wd == NULL) + EXIT1(return); + usb_set_intfdata(intf, NULL); + wd->usb.intf = NULL; + pnp_remove_device(wd); +} + +int wrap_pnp_suspend_usb_device(struct usb_interface *intf, pm_message_t state) +{ + struct wrap_device *wd; + struct device_object *pdo; + + wd = usb_get_intfdata(intf); + ENTER1("%p, %p", intf, wd); + if (!wd) + EXIT1(return 0); + pdo = wd->pdo; + if (pnp_set_device_power_state(wd, PowerDeviceD3)) + return -1; + return 0; +} + +int wrap_pnp_resume_usb_device(struct usb_interface *intf) +{ + struct wrap_device *wd; + wd = usb_get_intfdata(intf); + ENTER1("%p, %p", intf, wd); + if (!wd) + EXIT1(return 0); + if (pnp_set_device_power_state(wd, PowerDeviceD0)) + return -1; + return 0; +} + +#endif // USB --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/rtl.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/rtl.c @@ -0,0 +1,716 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ntoskernel.h" +#include "rtl_exports.h" + +wstdcall SIZE_T WIN_FUNC(RtlCompareMemory,3) + (const void *a, const void *b, SIZE_T len) +{ + size_t i; + char *x, *y; + + x = (char *)a; + y = (char *)b; + /* MSDN says this should return number of bytes that compare as + * equal. This can be interpretted as either all bytes that are + * equal in 'len' bytes or that only until the bytes compare as + * not equal. Initially we had it the former way, but Realtek driver + * doesn't like it that way - it takes many attempts to associate + * with WPA. ReactOS returns the number of bytes that are equal + * upto when they compare as not equal. + * According to lords at #reactos, that is the way it should be + * and that msdn is wrong about it! + */ + for (i = 0; i < len && x[i] == y[i]; i++) + ; + return i; +} + +wstdcall void WIN_FUNC(RtlCopyMemory,3) + (void *dst, const void *src, SIZE_T length) +{ + memcpy(dst, src, length); +} + +wstdcall void WIN_FUNC(RtlZeroMemory,2) + (void *dst, SIZE_T length) +{ + memset(dst, 0, length); +} + +wstdcall void WIN_FUNC(RtlSecureZeroMemory,2) + (void *dst, SIZE_T length) +{ + memset(dst, 0, length); +} + +wstdcall void WIN_FUNC(RtlFillMemory,3) + (void *dest, SIZE_T length, UCHAR fill) +{ + memset(dest, fill, length); +} + +wstdcall void WIN_FUNC(RtlMoveMemory,3) + (void *dest, const void *src, SIZE_T length) +{ + memmove(dest, src, length); +} + +wstdcall LONG WIN_FUNC(RtlCompareString,3) + (const struct ansi_string *s1, const struct ansi_string *s2, + BOOLEAN case_insensitive) +{ + unsigned int len; + LONG ret = 0; + const char *p1, *p2; + + ENTER2(""); + len = min(s1->length, s2->length); + p1 = s1->buf; + p2 = s2->buf; + if (case_insensitive) + while (!ret && len--) + ret = toupper(*p1++) - toupper(*p2++); + else + while (!ret && len--) + ret = *p1++ - *p2++; + if (!ret) + ret = s1->length - s2->length; + EXIT2(return ret); +} + +wstdcall LONG WIN_FUNC(RtlCompareUnicodeString,3) + (const struct unicode_string *s1, const struct unicode_string *s2, + BOOLEAN case_insensitive) +{ + unsigned int len; + LONG ret = 0; + const wchar_t *p1, *p2; + + ENTER2(""); + + len = min(s1->length, s2->length) / sizeof(wchar_t); + p1 = s1->buf; + p2 = s2->buf; + if (case_insensitive) + while (!ret && len--) + ret = toupper((u8)*p1++) - toupper((u8)*p2++); + else + while (!ret && len--) + ret = (u8)*p1++ - (u8)*p2++; + if (!ret) + ret = s1->length - s2->length; + TRACE2("len: %d, ret: %d", len, ret); + EXIT2(return ret); +} + +wstdcall BOOLEAN WIN_FUNC(RtlEqualString,3) + (const struct ansi_string *s1, const struct ansi_string *s2, + BOOLEAN case_insensitive) +{ + ENTER1(""); + if (s1->length != s2->length) + return FALSE; + return !RtlCompareString(s1, s2, case_insensitive); +} + +wstdcall BOOLEAN WIN_FUNC(RtlEqualUnicodeString,3) + (const struct unicode_string *s1, const struct unicode_string *s2, + BOOLEAN case_insensitive) +{ + if (s1->length != s2->length) + return FALSE; + return !RtlCompareUnicodeString(s1, s2, case_insensitive); +} + +wstdcall void WIN_FUNC(RtlCopyUnicodeString,2) + (struct unicode_string *dst, struct unicode_string *src) +{ + ENTER1("%p, %p", dst, src); + if (src && src->buf && dst->buf) { + dst->length = min(src->length, dst->max_length); + memcpy(dst->buf, src->buf, dst->length); + if (dst->length < dst->max_length) + dst->buf[dst->length / sizeof(dst->buf[0])] = 0; + } else + dst->length = 0; + EXIT1(return); +} + +wstdcall void WIN_FUNC(RtlCopyString,2) + (struct ansi_string *dst, struct ansi_string *src) +{ + ENTER1("%p, %p", dst, src); + if (src && src->buf && dst->buf) { + dst->length = min(src->length, dst->max_length); + memcpy(dst->buf, src->buf, dst->length); + if (dst->length < dst->max_length) + dst->buf[dst->length] = 0; + } else + dst->length = 0; + EXIT1(return); +} + +wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeToString,2) + (struct unicode_string *dst, wchar_t *src) +{ + if (src) { + int len; + for (len = 0; src[len]; len++) + ; + if (dst->length + (len * sizeof(dst->buf[0])) > dst->max_length) + return STATUS_BUFFER_TOO_SMALL; + memcpy(&dst->buf[dst->length], src, len * sizeof(dst->buf[0])); + dst->length += len * sizeof(dst->buf[0]); + if (dst->max_length > dst->length) + dst->buf[dst->length / sizeof(dst->buf[0])] = 0; + } + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeStringToString,2) + (struct unicode_string *dst, struct unicode_string *src) +{ + if (dst->max_length < src->length + dst->length) + return STATUS_BUFFER_TOO_SMALL; + if (src->length) { + memcpy(&dst->buf[dst->length], src->buf, src->length); + dst->length += src->length; + if (dst->max_length > dst->length) + dst->buf[dst->length / sizeof(dst->buf[0])] = 0; + } + EXIT2(return STATUS_SUCCESS); +} + +wstdcall ULONG WIN_FUNC(RtlxAnsiStringToUnicodeSize,1) + (const struct ansi_string *string) +{ + int i; + + for (i = 0; i < string->max_length && string->buf[i]; i++) + ; + return i * sizeof(wchar_t); +} + +wstdcall ULONG WIN_FUNC(RtlxUnicodeStringToAnsiSize,1) + (const struct unicode_string *string) +{ + int i; + + for (i = 0; i < string->max_length && string->buf[i]; i++) + ; + return i; +} + +wstdcall NTSTATUS WIN_FUNC(RtlAnsiStringToUnicodeString,3) + (struct unicode_string *dst, const struct ansi_string *src, + BOOLEAN alloc) +{ + int i, n; + + n = RtlxAnsiStringToUnicodeSize(src); + TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length, + src->max_length, src->buf); + if (alloc == TRUE) { +#if 0 + if (n == 0) { + dst->length = dst->max_length = 0; + dst->buf = NULL; + EXIT2(return STATUS_SUCCESS); + } +#endif + dst->max_length = n + sizeof(dst->buf[0]); + dst->buf = ExAllocatePoolWithTag(NonPagedPool, + dst->max_length, 0); + if (!dst->buf) { + dst->max_length = dst->length = 0; + EXIT2(return STATUS_NO_MEMORY); + } + } else if (dst->max_length < n) + EXIT2(return STATUS_BUFFER_TOO_SMALL); + + dst->length = n; + n /= sizeof(dst->buf[0]); + for (i = 0; i < n; i++) + dst->buf[i] = src->buf[i]; + if (i * sizeof(dst->buf[0]) < dst->max_length) + dst->buf[i] = 0; + TRACE2("dst: length: %d, max_length: %d, string: %p", + dst->length, dst->max_length, src->buf); + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToAnsiString,3) + (struct ansi_string *dst, const struct unicode_string *src, + BOOLEAN alloc) +{ + int i, n; + + n = RtlxUnicodeStringToAnsiSize(src); + TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length, + src->max_length, src->buf); + if (alloc == TRUE) { +#if 0 + if (n == 0) { + dst->length = dst->max_length = 0; + dst->buf = NULL; + EXIT2(return STATUS_SUCCESS); + } +#endif + dst->max_length = n + sizeof(dst->buf[0]); + dst->buf = ExAllocatePoolWithTag(NonPagedPool, + dst->max_length, 0); + if (!dst->buf) { + dst->max_length = dst->length = 0; + EXIT1(return STATUS_NO_MEMORY); + } + } else if (dst->max_length < n) + EXIT2(return STATUS_BUFFER_TOO_SMALL); + + dst->length = n; + for (i = 0; i < n; i++) + dst->buf[i] = src->buf[i]; + if (i < dst->max_length) + dst->buf[i] = 0; + TRACE2("string: %p, len: %d(%d)", dst->buf, dst->length, + dst->max_length); + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToInteger,3) + (struct unicode_string *ustring, ULONG base, ULONG *value) +{ + int i, sign = 1; + ULONG res; + typeof(ustring->buf) string; + + if (ustring->length == 0) { + *value = 0; + return STATUS_SUCCESS; + } + + string = ustring->buf; + i = 0; + while (i < (ustring->length / sizeof(*string)) && string[i] == ' ') + i++; + if (string[i] == '+') + i++; + else if (string[i] == '-') { + i++; + sign = -1; + } + if (base == 0) { + base = 10; + if (i <= ((ustring->length / sizeof(*string)) - 2) && + string[i] == '0') { + i++; + if (string[i] == 'b') { + base = 2; + i++; + } else if (string[i] == 'o') { + base = 8; + i++; + } else if (string[i] == 'x') { + base = 16; + i++; + } + } + } + if (!(base == 2 || base == 8 || base == 10 || base == 16)) + EXIT2(return STATUS_INVALID_PARAMETER); + + for (res = 0; i < (ustring->length / sizeof(*string)); i++) { + int v; + if (isdigit((char)string[i])) + v = string[i] - '0'; + else if (isxdigit((char)string[i])) + v = tolower((char)string[i]) - 'a' + 10; + else + v = base; + if (v >= base) + EXIT2(return STATUS_INVALID_PARAMETER); + res = res * base + v; + } + *value = sign * res; + EXIT3(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(RtlCharToInteger,3) + (const char *string, ULONG base, ULONG *value) +{ + int sign = 1; + ULONG res; + + if (!string || !value) + EXIT2(return STATUS_INVALID_PARAMETER); + while (*string == ' ') + string++; + if (*string == '+') + string++; + else if (*string == '-') { + string++; + sign = -1; + } + if (base == 0) { + base = 10; + if (*string == '0') { + string++; + if (*string == 'b') { + base = 2; + string++; + } else if (*string == 'o') { + base = 8; + string++; + } else if (*string == 'x') { + base = 16; + string++; + } + } + } + if (!(base == 2 || base == 8 || base == 10 || base == 16)) + EXIT2(return STATUS_INVALID_PARAMETER); + + for (res = 0; *string; string++) { + int v; + if (isdigit(*string)) + v = *string - '0'; + else if (isxdigit(*string)) + v = tolower(*string) - 'a' + 10; + else + v = base; + if (v >= base) + EXIT2(return STATUS_INVALID_PARAMETER); + res = res * base + v; + } + *value = sign * res; + EXIT3(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(RtlIntegerToUnicodeString,3) + (ULONG value, ULONG base, struct unicode_string *ustring) +{ + typeof(ustring->buf) buf = ustring->buf; + int i; + + if (base == 0) + base = 10; + if (!(base == 2 || base == 8 || base == 10 || base == 16)) + return STATUS_INVALID_PARAMETER; + for (i = 0; value && i < ustring->max_length / sizeof(*buf); i++) { + int r; + r = value % base; + value /= base; + if (r < 10) + buf[i] = r + '0'; + else + buf[i] = r + 'a' - 10; + } + if (value) + return STATUS_BUFFER_OVERFLOW; + ustring->length = i * sizeof(*buf); + return STATUS_SUCCESS; +} + +wstdcall LARGE_INTEGER WIN_FUNC(RtlConvertUlongToLargeInteger,1) + (ULONG ul) +{ + LARGE_INTEGER li = ul; + return li; +} + +wfastcall USHORT WIN_FUNC(RtlUshortByteSwap,1) + (USHORT src) +{ + return __swab16(src); +} + +wfastcall ULONG WIN_FUNC(RtlUlongByteSwap,1) + (ULONG src) +{ + /* ULONG is 32 bits for both 32-bit and 64-bit architectures */ + return __swab32(src); +} + +wstdcall NTSTATUS WIN_FUNC(RtlUpcaseUnicodeString,3) + (struct unicode_string *dst, struct unicode_string *src, BOOLEAN alloc) +{ + USHORT i, n; + + if (alloc) { + dst->buf = ExAllocatePoolWithTag(NonPagedPool, src->length, 0); + if (dst->buf) + dst->max_length = src->length; + else + EXIT2(return STATUS_NO_MEMORY); + } else { + if (dst->max_length < src->length) + EXIT2(return STATUS_BUFFER_OVERFLOW); + } + + n = src->length / sizeof(src->buf[0]); + for (i = 0; i < n; i++) + dst->buf[i] = toupper(src->buf[i]); + + dst->length = src->length; + EXIT3(return STATUS_SUCCESS); +} + +wstdcall void WIN_FUNC(RtlInitUnicodeString,2) + (struct unicode_string *dst, const wchar_t *src) +{ + ENTER2("%p", dst); + if (dst == NULL) + EXIT1(return); + if (src == NULL) { + dst->max_length = dst->length = 0; + dst->buf = NULL; + } else { + int i; + for (i = 0; (char)src[i]; i++) + ; + dst->buf = (typeof(dst->buf))src; + dst->length = i * sizeof(dst->buf[0]); + dst->max_length = (i + 1) * sizeof(dst->buf[0]); + } + EXIT1(return); +} + +wstdcall void WIN_FUNC(RtlInitAnsiString,2) + (struct ansi_string *dst, const char *src) +{ + ENTER2("%p", dst); + if (dst == NULL) + EXIT2(return); + if (src == NULL) { + dst->max_length = dst->length = 0; + dst->buf = NULL; + } else { + int i; + for (i = 0; src[i]; i++) + ; + dst->buf = (typeof(dst->buf))src; + dst->length = i; + dst->max_length = i + 1; + } + TRACE2("%p", dst->buf); + EXIT2(return); +} + +wstdcall void WIN_FUNC(RtlInitString,2) + (struct ansi_string *dst, const char *src) +{ + ENTER2("%p", dst); + RtlInitAnsiString(dst, src); + EXIT2(return); +} + +wstdcall void WIN_FUNC(RtlFreeUnicodeString,1) + (struct unicode_string *string) +{ + ENTER2("%p", string); + if (string == NULL) + return; + if (string->buf) + ExFreePool(string->buf); + string->length = string->max_length = 0; + string->buf = NULL; + return; +} + +wstdcall void WIN_FUNC(RtlFreeAnsiString,1) + (struct ansi_string *string) +{ + ENTER2("%p", string); + if (string == NULL) + return; + if (string->buf) + ExFreePool(string->buf); + string->length = string->max_length = 0; + string->buf = NULL; + return; +} + +/* guid string is of the form: {XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX} */ +wstdcall NTSTATUS WIN_FUNC(RtlGUIDFromString,2) + (struct unicode_string *guid_string, struct guid *guid) +{ + struct ansi_string ansi; + NTSTATUS ret; + int i, j, k, l, m; + + ret = RtlUnicodeStringToAnsiString(&ansi, guid_string, TRUE); + if (ret != STATUS_SUCCESS) + return ret; + if (ansi.length != 37 || ansi.buf[0] != '{' || + ansi.buf[36] != '}' || ansi.buf[9] != '-' || + ansi.buf[14] != '-' || ansi.buf[19] != '-' || + ansi.buf[24] != '-') { + RtlFreeAnsiString(&ansi); + EXIT2(return STATUS_INVALID_PARAMETER); + } + memcpy(&guid->data4, &ansi.buf[29], sizeof(guid->data3)); + /* set end of data3 for scanf */ + ansi.buf[29] = 0; + if (sscanf(&ansi.buf[1], "%x", &i) == 1 && + sscanf(&ansi.buf[10], "%x", &j) == 1 && + sscanf(&ansi.buf[15], "%x", &k) == 1 && + sscanf(&ansi.buf[20], "%x", &l) == 1 && + sscanf(&ansi.buf[25], "%x", &m) == 1) { + guid->data1 = (i << 16) | (j < 8) | k; + guid->data2 = l; + guid->data3 = m; + ret = STATUS_SUCCESS; + } else + ret = STATUS_INVALID_PARAMETER; + RtlFreeAnsiString(&ansi); + return ret; +} + +wstdcall NTSTATUS WIN_FUNC(RtlQueryRegistryValues,5) + (ULONG relative, wchar_t *path, struct rtl_query_registry_table *tbl, + void *context, void *env) +{ + struct ansi_string ansi; + struct unicode_string unicode; + NTSTATUS status, ret; + static int i = 0; + + ENTER3("%x, %p", relative, tbl); +// TODO(); + + RtlInitUnicodeString(&unicode, path); + if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == + STATUS_SUCCESS) { + TRACE2("%s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + ret = STATUS_SUCCESS; + for (; tbl->name; tbl++) { + RtlInitUnicodeString(&unicode, tbl->name); + if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == + STATUS_SUCCESS) { + TRACE2("name: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + TRACE2("flags: %08X", tbl->flags); + if (tbl->flags == RTL_QUERY_REGISTRY_DIRECT) { + TRACE2("type: %08X", tbl->def_type); + if (tbl->def_type == REG_DWORD) { + /* Atheros USB driver needs this, but + * don't know where and how to get its + * value */ + if (tbl->def_data) { + TRACE2("def_data: %x", + *(int *)tbl->def_data); + *(DWORD *)tbl->context = 0x5f292a + i++; +// *(DWORD *)tbl->def_data; + } else + *(DWORD *)tbl->context = 0x2345dbe; + } + } else { + void *data; + ULONG type, length; + + if (!tbl->query_func) { + ERROR("oops: no query_func"); + ret = STATUS_INVALID_PARAMETER; + break; + } + if (tbl->flags & RTL_QUERY_REGISTRY_NOVALUE) { + data = NULL; + type = REG_NONE; + length = 0; + } else { + data = tbl->def_data; + type = tbl->def_type; + length = tbl->def_length;; + } + TRACE2("calling query_func: %p", tbl->query_func); + status = LIN2WIN6(tbl->query_func, tbl->name, type, + data, length, context, env); + TRACE2("status: %08X", status); + if (status) { + if (status == STATUS_BUFFER_TOO_SMALL) + ret = STATUS_BUFFER_TOO_SMALL; + else + EXIT2(return STATUS_INVALID_PARAMETER); + } + } + } + EXIT3(return ret); +} + +wstdcall NTSTATUS WIN_FUNC(RtlWriteRegistryValue,6) + (ULONG relative, wchar_t *path, wchar_t *name, ULONG type, + void *data, ULONG length) +{ + struct ansi_string ansi; + struct unicode_string unicode; + + ENTER3("%d", relative); + TODO(); + + RtlInitUnicodeString(&unicode, path); + if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == + STATUS_SUCCESS) { + TRACE2("%s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + RtlInitUnicodeString(&unicode, name); + if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) == + STATUS_SUCCESS) { + TRACE2("%s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + EXIT5(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(RtlDeleteRegistryValue,3) + (ULONG relative, wchar_t *path, wchar_t *name) +{ + return STATUS_SUCCESS; +} + +wstdcall void WIN_FUNC(RtlAssert,4) + (char *failed_assertion, char *file_name, ULONG line_num, char *message) +{ + ERROR("assertion '%s' failed at %s line %d%s", + failed_assertion, file_name, line_num, message ? message : ""); + return; +} + +wstdcall void WIN_FUNC(RtlUnwind,0) + (void) +{ + TODO(); +} + +wstdcall void WIN_FUNC(RtlRaiseException,1) + (void *exception_record) +{ + TODO(); +} + +int rtl_init(void) +{ + return 0; +} + +/* called when module is being removed */ +void rtl_exit(void) +{ + EXIT4(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/pnp.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/pnp.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2005 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _PNP_H_ +#define _PNP_H_ + +#include "ntoskernel.h" +#include "ndis.h" +#include "wrapndis.h" + +NTSTATUS pnp_start_device(struct wrap_device *wd); +NTSTATUS pnp_stop_device(struct wrap_device *wd); +NTSTATUS pnp_remove_device(struct wrap_device *wd); + +int wrap_pnp_start_pci_device(struct pci_dev *pdev, + const struct pci_device_id *ent); +void __devexit wrap_pnp_remove_pci_device(struct pci_dev *pdev); +int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state); +int wrap_pnp_resume_pci_device(struct pci_dev *pdev); + +#ifdef ENABLE_USB +int wrap_pnp_start_usb_device(struct usb_interface *intf, + const struct usb_device_id *usb_id); +void wrap_pnp_remove_usb_device(struct usb_interface *intf); +int wrap_pnp_suspend_usb_device(struct usb_interface *intf, + pm_message_t state); +int wrap_pnp_resume_usb_device(struct usb_interface *intf); +#endif + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/lin2win.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/lin2win.h @@ -0,0 +1,202 @@ +/* + * Copyright (C) 2006 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifdef CONFIG_X86_64 + +/* Windows functions must have 32 bytes of shadow space for arguments + * above return address, irrespective of number of args. So argc >= 4 + */ + +#define alloc_win_stack_frame(argc) \ + "sub $(" #argc "+1)*8, %%rsp\n\t" +#define free_win_stack_frame(argc) \ + "add $(" #argc "+1)*8, %%rsp\n\t" + +/* m is index of Windows arg required; Windows arg 1 should be at + * 0(%rsp), arg 2 at 8(%rsp) and so on after the frame is allocated. +*/ + +#define lin2win_win_arg(m) "(" #m "-1)*8(%%rsp)" + +/* args for Windows function must be in clobber / output list */ + +#define outputs() \ + "=a" (_ret), "=c" (_dummy), "=d" (_dummy), \ + "=r" (r8), "=r" (r9), "=r" (r10), "=r" (r11) + +#define clobbers() "cc" + +#define LIN2WIN0(func) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8"); \ + register u64 r9 __asm__("r9"); \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(4) \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(4) \ + : outputs() \ + : [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN1(func, arg1) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8"); \ + register u64 r9 __asm__("r9"); \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(4) \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(4) \ + : outputs() \ + : "c" (arg1), [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN2(func, arg1, arg2) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8"); \ + register u64 r9 __asm__("r9"); \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(4) \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(4) \ + : outputs() \ + : "c" (arg1), "d" (arg2), [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN3(func, arg1, arg2, arg3) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8") = (u64)arg3; \ + register u64 r9 __asm__("r9"); \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(4) \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(4) \ + : outputs() \ + : "c" (arg1), "d" (arg2), "r" (r8), \ + [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN4(func, arg1, arg2, arg3, arg4) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8") = (u64)arg3; \ + register u64 r9 __asm__("r9") = (u64)arg4; \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(4) \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(4) \ + : outputs() \ + : "c" (arg1), "d" (arg2), "r" (r8), "r" (r9), \ + [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8") = (u64)arg3; \ + register u64 r9 __asm__("r9") = (u64)arg4; \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(5) \ + "movq %[rarg5], " lin2win_win_arg(5) "\n\t" \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(5) \ + : outputs() \ + : "c" (arg1), "d" (arg2), "r" (r8), "r" (r9), \ + [rarg5] "ri" ((u64)arg5), \ + [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6) \ +({ \ + u64 _ret, _dummy; \ + register u64 r8 __asm__("r8") = (u64)arg3; \ + register u64 r9 __asm__("r9") = (u64)arg4; \ + register u64 r10 __asm__("r10"); \ + register u64 r11 __asm__("r11"); \ + __asm__ __volatile__( \ + alloc_win_stack_frame(6) \ + "movq %[rarg5], " lin2win_win_arg(5) "\n\t" \ + "movq %[rarg6], " lin2win_win_arg(6) "\n\t" \ + "callq *%[fptr]\n\t" \ + free_win_stack_frame(6) \ + : outputs() \ + : "c" (arg1), "d" (arg2), "r" (r8), "r" (r9), \ + [rarg5] "ri" ((u64)arg5), [rarg6] "ri" ((u64)arg6), \ + [fptr] "r" (func) \ + : clobbers()); \ + _ret; \ +}) + +#else // CONFIG_X86_64 + +#define LIN2WIN1(func, arg1) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1); \ +}) +#define LIN2WIN2(func, arg1, arg2) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1, arg2); \ +}) +#define LIN2WIN3(func, arg1, arg2, arg3) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1, arg2, arg3); \ +}) +#define LIN2WIN4(func, arg1, arg2, arg3, arg4) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1, arg2, arg3, arg4); \ +}) +#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1, arg2, arg3, arg4, arg5); \ +}) +#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6) \ +({ \ + TRACE6("calling %p", func); \ + func(arg1, arg2, arg3, arg4, arg5, arg6); \ +}) + +#endif // CONFIG_X86_64 --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/iw_ndis.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/iw_ndis.c @@ -0,0 +1,1973 @@ + /* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "iw_ndis.h" +#include "wrapndis.h" + +static int freq_chan[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442, + 2447, 2452, 2457, 2462, 2467, 2472, 2484 }; + +static const char *network_names[] = {"IEEE 802.11FH", "IEEE 802.11b", + "IEEE 802.11a", "IEEE 802.11g", "Auto"}; + +int set_essid(struct ndis_device *wnd, const char *ssid, int ssid_len) +{ + NDIS_STATUS res; + struct ndis_essid req; + + if (ssid_len > NDIS_ESSID_MAX_SIZE) + return -EINVAL; + + memset(&req, 0, sizeof(req)); + req.length = ssid_len; + if (ssid_len) + memcpy(&req.essid, ssid, ssid_len); + + res = mp_set(wnd, OID_802_11_SSID, &req, sizeof(req)); + if (res) { + WARNING("setting essid failed (%08X)", res); + EXIT2(return -EINVAL); + } + memcpy(&wnd->essid, &req, sizeof(req)); + EXIT2(return 0); +} + +static int set_assoc_params(struct ndis_device *wnd) +{ + TRACE2("wpa_version=0x%x auth_alg=0x%x key_mgmt=0x%x " + "cipher_pairwise=0x%x cipher_group=0x%x", + wnd->iw_auth_wpa_version, wnd->iw_auth_80211_alg, + wnd->iw_auth_key_mgmt, wnd->iw_auth_cipher_pairwise, + wnd->iw_auth_cipher_group); + set_auth_mode(wnd); + set_priv_filter(wnd); + set_encr_mode(wnd); + return 0; +} + +static int iw_set_essid(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + char ssid[NDIS_ESSID_MAX_SIZE]; + int length; + + ENTER2(""); + memset(ssid, 0, sizeof(ssid)); + /* there is no way to turn off essid other than to set to + * random bytes; instead, we use off to mean any */ + if (wrqu->essid.flags) { + /* wireless-tools prior to version 20 add extra 1, and + * later than 20 don't! Deal with that mess */ + length = wrqu->essid.length - 1; + if (length > 0) + length--; + while (length < wrqu->essid.length && extra[length]) + length++; + TRACE2("%d", length); + if (length <= 0 || length > NDIS_ESSID_MAX_SIZE) + EXIT2(return -EINVAL); + } else + length = 0; + + set_assoc_params(wnd); + + memcpy(ssid, extra, length); + if (set_essid(wnd, ssid, length)) + EXIT2(return -EINVAL); + + EXIT2(return 0); +} + +static int iw_get_essid(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + struct ndis_essid req; + + ENTER2(""); + memset(&req, 0, sizeof(req)); + res = mp_query(wnd, OID_802_11_SSID, &req, sizeof(req)); + if (res) { + WARNING("getting essid failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } + memcpy(extra, req.essid, req.length); + if (req.length > 0) + wrqu->essid.flags = 1; + else + wrqu->essid.flags = 0; + wrqu->essid.length = req.length; + EXIT2(return 0); +} + +int set_infra_mode(struct ndis_device *wnd, + enum ndis_infrastructure_mode mode) +{ + NDIS_STATUS res; + unsigned int i; + + ENTER2("%d", mode); + res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, + &wnd->infrastructure_mode); + if (res != NDIS_STATUS_SUCCESS) { + WARNING("getting operating mode to failed (%08X)", res); + EXIT2(return -EINVAL); + } + if (wnd->infrastructure_mode == mode) + EXIT2(return 0); + res = mp_set_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, mode); + if (res) { + WARNING("setting operating mode to %d failed (%08X)", + mode, res); + EXIT2(return -EINVAL); + } + /* NDIS drivers clear keys when infrastructure mode is + * changed. But Linux tools assume otherwise. So set the + * keys */ + if (wnd->iw_auth_key_mgmt == 0 || + wnd->iw_auth_key_mgmt == IW_AUTH_KEY_MGMT_802_1X) { + for (i = 0; i < MAX_ENCR_KEYS; i++) { + if (wnd->encr_info.keys[i].length > 0) + add_wep_key(wnd, wnd->encr_info.keys[i].key, + wnd->encr_info.keys[i].length, i); + } + } + wnd->infrastructure_mode = mode; + EXIT2(return 0); +} + +static int iw_set_infra_mode(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + enum ndis_infrastructure_mode ndis_mode; + + ENTER2("%d", wrqu->mode); + switch (wrqu->mode) { + case IW_MODE_ADHOC: + ndis_mode = Ndis802_11IBSS; + break; + case IW_MODE_INFRA: + ndis_mode = Ndis802_11Infrastructure; + break; + case IW_MODE_AUTO: + ndis_mode = Ndis802_11AutoUnknown; + break; + default: + EXIT2(return -EINVAL); + } + + if (set_infra_mode(wnd, ndis_mode)) + EXIT2(return -EINVAL); + + EXIT2(return 0); +} + +static int iw_get_infra_mode(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + int ndis_mode, iw_mode; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &ndis_mode); + if (res) { + WARNING("getting operating mode failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } + + switch(ndis_mode) { + case Ndis802_11IBSS: + iw_mode = IW_MODE_ADHOC; + break; + case Ndis802_11Infrastructure: + iw_mode = IW_MODE_INFRA; + break; + case Ndis802_11AutoUnknown: + iw_mode = IW_MODE_AUTO; + break; + default: + ERROR("invalid operating mode (%u)", ndis_mode); + EXIT2(return -EINVAL); + } + wrqu->mode = iw_mode; + EXIT2(return 0); +} + +static const char *network_type_to_name(int net_type) +{ + if (net_type >= 0 && + net_type < (sizeof(network_names)/sizeof(network_names[0]))) + return network_names[net_type]; + else + return network_names[sizeof(network_names) / + sizeof(network_names[0]) - 1]; +} + +static int iw_get_network_type(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + unsigned int network_type; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, + &network_type); + if (res) { + WARNING("getting network type failed: %08X", res); + network_type = -1; + } + strncpy(wrqu->name, network_type_to_name(network_type), + sizeof(wrqu->name) - 1); + wrqu->name[sizeof(wrqu->name)-1] = 0; + return 0; +} + +static int iw_get_freq(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + struct ndis_configuration req; + + ENTER2(""); + memset(&req, 0, sizeof(req)); + res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); + if (res) { + WARNING("getting configuration failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } + + memset(&(wrqu->freq), 0, sizeof(struct iw_freq)); + + /* see comment in wireless.h above the "struct iw_freq" + definition for an explanation of this if + NOTE: 1000000 is due to the kHz + */ + if (req.ds_config > 1000000) { + wrqu->freq.m = req.ds_config / 10; + wrqu->freq.e = 1; + } + else + wrqu->freq.m = req.ds_config; + + /* convert from kHz to Hz */ + wrqu->freq.e += 3; + + return 0; +} + +static int iw_set_freq(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + struct ndis_configuration req; + + ENTER2(""); + /* this OID is valid only when not associated */ + if (netif_carrier_ok(wnd->net_dev)) + EXIT2(return 0); + memset(&req, 0, sizeof(req)); + res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); + if (res) { + WARNING("getting configuration failed (%08X)", res); + EXIT2(return 0); + } + + if (wrqu->freq.m < 1000 && wrqu->freq.e == 0) { + if (wrqu->freq.m >= 1 && + wrqu->freq.m <= (sizeof(freq_chan) / sizeof(freq_chan[0]))) + req.ds_config = freq_chan[wrqu->freq.m - 1] * 1000; + else + return -EINVAL; + } else { + int i; + req.ds_config = wrqu->freq.m; + for (i = wrqu->freq.e; i > 0; i--) + req.ds_config *= 10; + req.ds_config /= 1000; + } + res = mp_set(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req)); + if (res) + WARNING("setting configuration failed (%08X)", res); + return 0; +} + +static int iw_get_tx_power(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_tx_power_level ndis_power; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, + &ndis_power, sizeof(ndis_power)); + if (res) + return -EOPNOTSUPP; + wrqu->txpower.flags = IW_TXPOW_MWATT; + wrqu->txpower.disabled = 0; + wrqu->txpower.fixed = 0; + wrqu->txpower.value = ndis_power; + return 0; +} + +static int iw_set_tx_power(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_tx_power_level ndis_power; + NDIS_STATUS res; + + ENTER2(""); + if (wrqu->txpower.disabled) + ndis_power = 0; + else { + if (wrqu->txpower.flags == IW_TXPOW_MWATT) + ndis_power = wrqu->txpower.value; + else { // wrqu->txpower.flags == IW_TXPOW_DBM + if (wrqu->txpower.value > 20) + ndis_power = 128; + else if (wrqu->txpower.value < -43) + ndis_power = 127; + else { + signed char tmp; + tmp = wrqu->txpower.value; + tmp = -12 - tmp; + tmp <<= 2; + ndis_power = (unsigned char)tmp; + } + } + } + TRACE2("%d", ndis_power); + res = mp_set(wnd, OID_802_11_TX_POWER_LEVEL, + &ndis_power, sizeof(ndis_power)); + if (res) + EXIT2(return -EOPNOTSUPP); + if (ndis_power == 0) + res = disassociate(wnd, 0); + EXIT2(return 0); +} + +static int iw_get_bitrate(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ULONG ndis_rate; + int res; + + ENTER2(""); + res = mp_query(wnd, OID_GEN_LINK_SPEED, &ndis_rate, sizeof(ndis_rate)); + if (res) { + WARNING("getting bitrate failed (%08X)", res); + ndis_rate = 0; + } + + wrqu->bitrate.value = ndis_rate * 100; + return 0; +} + +static int iw_set_bitrate(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + int i, n; + NDIS_STATUS res; + ndis_rates_ex rates; + + ENTER2(""); + if (wrqu->bitrate.fixed == 0) + EXIT2(return 0); + + res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES, &rates, + sizeof(rates), &n, NULL); + if (res) { + WARNING("getting bit rate failed (%08X)", res); + EXIT2(return 0); + } + for (i = 0; i < n; i++) { + if (rates[i] & 0x80) + continue; + if ((rates[i] & 0x7f) * 500000 > wrqu->bitrate.value) { + TRACE2("setting rate %d to 0", + (rates[i] & 0x7f) * 500000); + rates[i] = 0; + } + } + + res = mp_set(wnd, OID_802_11_DESIRED_RATES, &rates, n); + if (res) { + WARNING("setting bit rate failed (%08X)", res); + EXIT2(return 0); + } + + return 0; +} + +static int iw_set_dummy(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + /* Do nothing. Used for ioctls that are not implemented. */ + return 0; +} + +static int iw_get_rts_threshold(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_rts_threshold threshold; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query(wnd, OID_802_11_RTS_THRESHOLD, + &threshold, sizeof(threshold)); + if (res) + return -EOPNOTSUPP; + + wrqu->rts.value = threshold; + return 0; +} + +static int iw_set_rts_threshold(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_rts_threshold threshold; + NDIS_STATUS res; + + ENTER2(""); + threshold = wrqu->rts.value; + res = mp_set(wnd, OID_802_11_RTS_THRESHOLD, + &threshold, sizeof(threshold)); + if (res == NDIS_STATUS_INVALID_DATA) + return -EINVAL; + if (res) + return -EOPNOTSUPP; + + return 0; +} + +static int iw_get_frag_threshold(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_fragmentation_threshold frag_threshold; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, + &frag_threshold, sizeof(frag_threshold)); + if (res) + return -ENOTSUPP; + + wrqu->frag.value = frag_threshold; + return 0; +} + +static int iw_set_frag_threshold(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + ndis_rts_threshold threshold; + NDIS_STATUS res; + + ENTER2(""); + threshold = wrqu->frag.value; + res = mp_set(wnd, OID_802_11_FRAGMENTATION_THRESHOLD, + &threshold, sizeof(threshold)); + if (res == NDIS_STATUS_INVALID_DATA) + return -EINVAL; + if (res) + return -EOPNOTSUPP; + return 0; +} + +int get_ap_address(struct ndis_device *wnd, mac_address ap_addr) +{ + NDIS_STATUS res; + + res = mp_query(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN); + TRACE2(MACSTRSEP, MAC2STR(ap_addr)); + if (res) { + TRACE2("res: %08X", res); + memset(ap_addr, 0x0, ETH_ALEN); + EXIT2(return -EOPNOTSUPP); + } + EXIT2(return 0); +} + +static int iw_get_ap_address(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + mac_address ap_addr; + + ENTER2(""); + get_ap_address(wnd, ap_addr); + memcpy(wrqu->ap_addr.sa_data, ap_addr, ETH_ALEN); + wrqu->ap_addr.sa_family = ARPHRD_ETHER; + EXIT2(return 0); +} + +static int iw_set_ap_address(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + mac_address ap_addr; + + ENTER2(""); + memcpy(ap_addr, wrqu->ap_addr.sa_data, ETH_ALEN); + TRACE2(MACSTRSEP, MAC2STR(ap_addr)); + res = mp_set(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN); + /* user apps may set ap's mac address, which is not required; + * they may fail to work if this function fails, so return + * success */ + if (res) + WARNING("setting AP mac address failed (%08X)", res); + + EXIT2(return 0); +} + +int set_iw_auth_mode(struct ndis_device *wnd, int wpa_version, + int auth_80211_alg) +{ + NDIS_STATUS res; + ULONG auth_mode; + + ENTER2("%d, %d", wpa_version, auth_80211_alg); + if (wpa_version & IW_AUTH_WPA_VERSION_WPA2) { + if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X) + auth_mode = Ndis802_11AuthModeWPA2; + else + auth_mode = Ndis802_11AuthModeWPA2PSK; + } else if (wpa_version & IW_AUTH_WPA_VERSION_WPA) { + if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X) + auth_mode = Ndis802_11AuthModeWPA; + else if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_PSK) + auth_mode = Ndis802_11AuthModeWPAPSK; + else + auth_mode = Ndis802_11AuthModeWPANone; + } else if (auth_80211_alg & IW_AUTH_ALG_SHARED_KEY) { + if (auth_80211_alg & IW_AUTH_ALG_OPEN_SYSTEM) + auth_mode = Ndis802_11AuthModeAutoSwitch; + else + auth_mode = Ndis802_11AuthModeShared; + } else + auth_mode = Ndis802_11AuthModeOpen; + + res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode); + if (res) { + WARNING("setting auth mode to %u failed (%08X)", + auth_mode, res); + if (res == NDIS_STATUS_INVALID_DATA) + EXIT2(return -EINVAL); + return -EOPNOTSUPP; + } + wnd->iw_auth_wpa_version = wpa_version; + wnd->iw_auth_80211_alg = auth_80211_alg; + EXIT2(return 0); +} + +int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode) +{ + NDIS_STATUS res; + + ENTER2("%d", auth_mode); + res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode); + if (res) { + WARNING("setting auth mode to %u failed (%08X)", + auth_mode, res); + if (res == NDIS_STATUS_INVALID_DATA) + EXIT2(return -EINVAL); + return -EOPNOTSUPP; + } + switch (auth_mode) { + case Ndis802_11AuthModeWPA: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA; + wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X; + break; + case Ndis802_11AuthModeWPAPSK: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA; + wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; + case Ndis802_11AuthModeWPANone: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; + wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; + break; + case Ndis802_11AuthModeWPA2: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2; + wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X; + break; + case Ndis802_11AuthModeWPA2PSK: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2; + wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK; + break; + case Ndis802_11AuthModeOpen: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; + wnd->iw_auth_80211_alg = IW_AUTH_ALG_OPEN_SYSTEM; + break; + case Ndis802_11AuthModeShared: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; + wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY; + break; + case Ndis802_11AuthModeAutoSwitch: + wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED; + wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY; + wnd->iw_auth_80211_alg |= IW_AUTH_ALG_OPEN_SYSTEM; + break; + default: + WARNING("invalid authentication algorithm: %d", auth_mode); + break; + } + EXIT2(return 0); +} + +int set_auth_mode(struct ndis_device *wnd) +{ + return set_iw_auth_mode(wnd, wnd->iw_auth_wpa_version, + wnd->iw_auth_80211_alg); +} + +int get_ndis_auth_mode(struct ndis_device *wnd) +{ + ULONG mode; + NDIS_STATUS res; + + res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &mode); + if (res) { + WARNING("getting authentication mode failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } + TRACE2("%d", mode); + return mode; +} + +int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise, + int cipher_groupwise) +{ + NDIS_STATUS res; + ULONG ndis_mode; + + ENTER2("%d, %d", cipher_pairwise, cipher_groupwise); + if (cipher_pairwise & IW_AUTH_CIPHER_CCMP) + ndis_mode = Ndis802_11Encryption3Enabled; + else if (cipher_pairwise & IW_AUTH_CIPHER_TKIP) + ndis_mode = Ndis802_11Encryption2Enabled; + else if (cipher_pairwise & + (IW_AUTH_CIPHER_WEP40 | IW_AUTH_CIPHER_WEP104)) + ndis_mode = Ndis802_11Encryption1Enabled; + else if (cipher_groupwise & IW_AUTH_CIPHER_CCMP) + ndis_mode = Ndis802_11Encryption3Enabled; + else if (cipher_groupwise & IW_AUTH_CIPHER_TKIP) + ndis_mode = Ndis802_11Encryption2Enabled; + else + ndis_mode = Ndis802_11EncryptionDisabled; + + res = mp_set_int(wnd, OID_802_11_ENCRYPTION_STATUS, ndis_mode); + if (res) { + WARNING("setting encryption mode to %u failed (%08X)", + ndis_mode, res); + if (res == NDIS_STATUS_INVALID_DATA) + EXIT2(return -EINVAL); + return -EOPNOTSUPP; + } + wnd->iw_auth_cipher_pairwise = cipher_pairwise; + wnd->iw_auth_cipher_group = cipher_groupwise; + EXIT2(return 0); +} + +int set_encr_mode(struct ndis_device *wnd) +{ + return set_iw_encr_mode(wnd, wnd->iw_auth_cipher_pairwise, + wnd->iw_auth_cipher_group); +} + +int get_ndis_encr_mode(struct ndis_device *wnd) +{ + ULONG mode; + NDIS_STATUS res; + + ENTER2(""); + res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &mode); + if (res) { + WARNING("getting encryption status failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } else + EXIT2(return mode); +} + +static int iw_get_encr(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + int index, mode; + struct encr_info *encr_info = &wnd->encr_info; + + ENTER2("wnd = %p", wnd); + wrqu->data.length = 0; + extra[0] = 0; + + index = (wrqu->encoding.flags & IW_ENCODE_INDEX); + TRACE2("index = %u", index); + if (index > 0) + index--; + else + index = encr_info->tx_key_index; + + if (index < 0 || index >= MAX_ENCR_KEYS) { + WARNING("encryption index out of range (%u)", index); + EXIT2(return -EINVAL); + } + + if (index != encr_info->tx_key_index) { + if (encr_info->keys[index].length > 0) { + wrqu->data.flags |= IW_ENCODE_ENABLED; + wrqu->data.length = encr_info->keys[index].length; + memcpy(extra, encr_info->keys[index].key, + encr_info->keys[index].length); + } + else + wrqu->data.flags |= IW_ENCODE_DISABLED; + + EXIT2(return 0); + } + + /* transmit key */ + mode = get_ndis_encr_mode(wnd); + if (mode < 0) + EXIT2(return -EOPNOTSUPP); + + if (mode == Ndis802_11EncryptionDisabled || + mode == Ndis802_11EncryptionNotSupported) + wrqu->data.flags |= IW_ENCODE_DISABLED; + else { + if (mode == Ndis802_11Encryption1KeyAbsent || + mode == Ndis802_11Encryption2KeyAbsent || + mode == Ndis802_11Encryption3KeyAbsent) + wrqu->data.flags |= IW_ENCODE_NOKEY; + else { + wrqu->data.flags |= IW_ENCODE_ENABLED; + wrqu->encoding.flags |= index+1; + wrqu->data.length = encr_info->keys[index].length; + memcpy(extra, encr_info->keys[index].key, + encr_info->keys[index].length); + } + } + mode = get_ndis_auth_mode(wnd); + if (mode < 0) + EXIT2(return -EOPNOTSUPP); + + if (mode == Ndis802_11AuthModeOpen) + wrqu->data.flags |= IW_ENCODE_OPEN; + else if (mode == Ndis802_11AuthModeAutoSwitch) + wrqu->data.flags |= IW_ENCODE_RESTRICTED; + else // Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA etc. + wrqu->data.flags |= IW_ENCODE_RESTRICTED; + + EXIT2(return 0); +} + +/* index must be 0 - N, as per NDIS */ +int add_wep_key(struct ndis_device *wnd, char *key, int key_len, + int index) +{ + struct ndis_encr_key ndis_key; + NDIS_STATUS res; + + ENTER2("key index: %d, length: %d", index, key_len); + if (key_len <= 0 || key_len > NDIS_ENCODING_TOKEN_MAX) { + WARNING("invalid key length (%d)", key_len); + EXIT2(return -EINVAL); + } + if (index < 0 || index >= MAX_ENCR_KEYS) { + WARNING("invalid key index (%d)", index); + EXIT2(return -EINVAL); + } + ndis_key.struct_size = sizeof(ndis_key); + ndis_key.length = key_len; + memcpy(&ndis_key.key, key, key_len); + ndis_key.index = index; + + if (index == wnd->encr_info.tx_key_index) { + ndis_key.index |= (1 << 31); + res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104, + IW_AUTH_CIPHER_NONE); + if (res) + WARNING("encryption couldn't be enabled (%08X)", res); + } + TRACE2("key %d: " MACSTRSEP, index, MAC2STR(key)); + res = mp_set(wnd, OID_802_11_ADD_WEP, &ndis_key, sizeof(ndis_key)); + if (res) { + WARNING("adding encryption key %d failed (%08X)", + index+1, res); + EXIT2(return -EINVAL); + } + + /* Atheros driver messes up ndis_key during ADD_WEP, so + * don't rely on that; instead use info in key and key_len */ + wnd->encr_info.keys[index].length = key_len; + memcpy(&wnd->encr_info.keys[index].key, key, key_len); + + EXIT2(return 0); +} + +/* remove_key is for both wep and wpa */ +static int remove_key(struct ndis_device *wnd, int index, + mac_address bssid) +{ + NDIS_STATUS res; + if (wnd->encr_info.keys[index].length == 0) + EXIT2(return 0); + wnd->encr_info.keys[index].length = 0; + memset(&wnd->encr_info.keys[index].key, 0, + sizeof(wnd->encr_info.keys[index].length)); + if (wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_TKIP || + wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_CCMP || + wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_TKIP || + wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_CCMP) { + struct ndis_remove_key remove_key; + remove_key.struct_size = sizeof(remove_key); + remove_key.index = index; + if (bssid) { + /* pairwise key */ + if (memcmp(bssid, "\xff\xff\xff\xff\xff\xff", + ETH_ALEN) != 0) + remove_key.index |= (1 << 30); + memcpy(remove_key.bssid, bssid, + sizeof(remove_key.bssid)); + } else + memset(remove_key.bssid, 0xff, + sizeof(remove_key.bssid)); + if (mp_set(wnd, OID_802_11_REMOVE_KEY, + &remove_key, sizeof(remove_key))) + EXIT2(return -EINVAL); + } else { + ndis_key_index keyindex = index; + res = mp_set_int(wnd, OID_802_11_REMOVE_WEP, keyindex); + if (res) { + WARNING("removing encryption key %d failed (%08X)", + keyindex, res); + EXIT2(return -EINVAL); + } + } + /* if it is transmit key, disable encryption */ + if (index == wnd->encr_info.tx_key_index) { + res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE, + IW_AUTH_CIPHER_NONE); + if (res) + WARNING("changing encr status failed (%08X)", res); + } + TRACE2("key %d removed", index); + EXIT2(return 0); +} + +static int iw_set_wep(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + unsigned int index, key_len; + struct encr_info *encr_info = &wnd->encr_info; + unsigned char *key; + + ENTER2(""); + index = (wrqu->encoding.flags & IW_ENCODE_INDEX); + TRACE2("index = %u", index); + + /* iwconfig gives index as 1 - N */ + if (index > 0) + index--; + else + index = encr_info->tx_key_index; + + if (index < 0 || index >= MAX_ENCR_KEYS) { + WARNING("encryption index out of range (%u)", index); + EXIT2(return -EINVAL); + } + + /* remove key if disabled */ + if (wrqu->data.flags & IW_ENCODE_DISABLED) { + if (remove_key(wnd, index, NULL)) + EXIT2(return -EINVAL); + else + EXIT2(return 0); + } + + /* global encryption state (for all keys) */ + if (wrqu->data.flags & IW_ENCODE_OPEN) + res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen); + else // if (wrqu->data.flags & IW_ENCODE_RESTRICTED) + res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeShared); + if (res) { + WARNING("setting authentication mode failed (%08X)", res); + EXIT2(return -EINVAL); + } + + TRACE2("key length: %d", wrqu->data.length); + + if (wrqu->data.length > 0) { + key_len = wrqu->data.length; + key = extra; + } else { // must be set as tx key + if (encr_info->keys[index].length == 0) { + WARNING("key %d is not set", index+1); + EXIT2(return -EINVAL); + } + key_len = encr_info->keys[index].length; + key = encr_info->keys[index].key; + encr_info->tx_key_index = index; + } + + if (add_wep_key(wnd, key, key_len, index)) + EXIT2(return -EINVAL); + + if (index == encr_info->tx_key_index) { + /* if transmit key is at index other than 0, some + * drivers, at least Atheros and TI, want another + * (global) non-transmit key to be set; don't know why */ + if (index != 0) { + int i; + for (i = 0; i < MAX_ENCR_KEYS; i++) + if (i != index && + encr_info->keys[i].length != 0) + break; + if (i == MAX_ENCR_KEYS) { + if (index == 0) + i = index + 1; + else + i = index - 1; + if (add_wep_key(wnd, key, key_len, i)) + WARNING("couldn't add broadcast key" + " at %d", i); + } + } + /* ndis drivers want essid to be set after setting encr */ + set_essid(wnd, wnd->essid.essid, wnd->essid.length); + } + EXIT2(return 0); +} + +static int iw_set_nick(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + + if (wrqu->data.length >= IW_ESSID_MAX_SIZE || wrqu->data.length <= 0) + return -EINVAL; + memcpy(wnd->nick, extra, wrqu->data.length); + wnd->nick[wrqu->data.length] = 0; + return 0; +} + +static int iw_get_nick(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + + wrqu->data.length = strlen(wnd->nick); + memcpy(extra, wnd->nick, wrqu->data.length); + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) && !defined(IW_REQUEST_FLAG_COMPAT) +#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) +#define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) +#define iwe_stream_add_value(a, b, c, d, e, f) \ + iwe_stream_add_value(b, c, d, e, f) +#define iwe_stream_lcp_len(a) IW_EV_LCP_LEN +#endif + +static char *ndis_translate_scan(struct net_device *dev, + struct iw_request_info *info, char *event, + char *end_buf, void *item) +{ + struct iw_event iwe; + char *current_val; + int i, nrates; + unsigned char buf[MAX_WPA_IE_LEN * 2 + 30]; + struct ndis_wlan_bssid *bssid; + struct ndis_wlan_bssid_ex *bssid_ex; + + ENTER2("%p, %p", event, item); + bssid = item; + bssid_ex = item; + /* add mac address */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWAP; + iwe.u.ap_addr.sa_family = ARPHRD_ETHER; + iwe.len = IW_EV_ADDR_LEN; + memcpy(iwe.u.ap_addr.sa_data, bssid->mac, ETH_ALEN); + event = iwe_stream_add_event(info, event, end_buf, &iwe, + IW_EV_ADDR_LEN); + + /* add essid */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWESSID; + iwe.u.data.length = bssid->ssid.length; + if (iwe.u.data.length > IW_ESSID_MAX_SIZE) + iwe.u.data.length = IW_ESSID_MAX_SIZE; + iwe.u.data.flags = 1; + iwe.len = IW_EV_POINT_LEN + iwe.u.data.length; + event = iwe_stream_add_point(info, event, end_buf, &iwe, + bssid->ssid.essid); + + /* add protocol name */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWNAME; + strncpy(iwe.u.name, network_type_to_name(bssid->net_type), IFNAMSIZ); + event = iwe_stream_add_event(info, event, end_buf, &iwe, + IW_EV_CHAR_LEN); + + /* add mode */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWMODE; + if (bssid->mode == Ndis802_11IBSS) + iwe.u.mode = IW_MODE_ADHOC; + else if (bssid->mode == Ndis802_11Infrastructure) + iwe.u.mode = IW_MODE_INFRA; + else // if (bssid->mode == Ndis802_11AutoUnknown) + iwe.u.mode = IW_MODE_AUTO; + event = iwe_stream_add_event(info, event, end_buf, &iwe, + IW_EV_UINT_LEN); + + /* add freq */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWFREQ; + iwe.u.freq.m = bssid->config.ds_config; + if (bssid->config.ds_config > 1000000) { + iwe.u.freq.m = bssid->config.ds_config / 10; + iwe.u.freq.e = 1; + } + else + iwe.u.freq.m = bssid->config.ds_config; + /* convert from kHz to Hz */ + iwe.u.freq.e += 3; + iwe.len = IW_EV_FREQ_LEN; + event = iwe_stream_add_event(info, event, end_buf, &iwe, + IW_EV_FREQ_LEN); + + /* add qual */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = IWEVQUAL; + i = 100 * (bssid->rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE); + if (i < 0) + i = 0; + else if (i > 100) + i = 100; + iwe.u.qual.level = bssid->rssi; + iwe.u.qual.noise = WL_NOISE; + iwe.u.qual.qual = i; + iwe.len = IW_EV_QUAL_LEN; + event = iwe_stream_add_event(info, event, end_buf, &iwe, + IW_EV_QUAL_LEN); + + /* add key info */ + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = SIOCGIWENCODE; + if (bssid->privacy == Ndis802_11PrivFilterAcceptAll) + iwe.u.data.flags = IW_ENCODE_DISABLED; + else + iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; + iwe.u.data.length = 0; + iwe.len = IW_EV_POINT_LEN; + event = iwe_stream_add_point(info, event, end_buf, &iwe, + bssid->ssid.essid); + + /* add rate */ + memset(&iwe, 0, sizeof(iwe)); + current_val = event + iwe_stream_lcp_len(info); + iwe.cmd = SIOCGIWRATE; + if (bssid->length > sizeof(*bssid)) + nrates = NDIS_MAX_RATES_EX; + else + nrates = NDIS_MAX_RATES; + for (i = 0 ; i < nrates ; i++) { + if (bssid->rates[i] & 0x7f) { + iwe.u.bitrate.value = ((bssid->rates[i] & 0x7f) * + 500000); + current_val = iwe_stream_add_value(info, event, + current_val, + end_buf, &iwe, + IW_EV_PARAM_LEN); + } + } + + if ((current_val - event) > iwe_stream_lcp_len(info)) + event = current_val; + + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = IWEVCUSTOM; + sprintf(buf, "bcn_int=%d", bssid->config.beacon_period); + iwe.u.data.length = strlen(buf); + event = iwe_stream_add_point(info, event, end_buf, &iwe, buf); + + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = IWEVCUSTOM; + sprintf(buf, "atim=%u", bssid->config.atim_window); + iwe.u.data.length = strlen(buf); + event = iwe_stream_add_point(info, event, end_buf, &iwe, buf); + + TRACE2("%d, %u", bssid->length, (unsigned int)sizeof(*bssid)); + if (bssid->length > sizeof(*bssid)) { + unsigned char *iep = (unsigned char *)bssid_ex->ies + + sizeof(struct ndis_fixed_ies); + no_warn_unused unsigned char *end = iep + bssid_ex->ie_length; + + while (iep + 1 < end && iep + 2 + iep[1] <= end) { + unsigned char ielen = 2 + iep[1]; + + if (ielen > SSID_MAX_WPA_IE_LEN) { + iep += ielen; + continue; + } + if ((iep[0] == WLAN_EID_GENERIC && iep[1] >= 4 && + memcmp(iep + 2, "\x00\x50\xf2\x01", 4) == 0) || + iep[0] == RSN_INFO_ELEM) { + memset(&iwe, 0, sizeof(iwe)); + iwe.cmd = IWEVGENIE; + iwe.u.data.length = ielen; + event = iwe_stream_add_point(info, event, + end_buf, &iwe, + iep); + } + iep += ielen; + } + } + TRACE2("event = %p, current_val = %p", event, current_val); + EXIT2(return event); +} + +int set_scan(struct ndis_device *wnd) +{ + NDIS_STATUS res; + + ENTER2(""); + res = mp_set(wnd, OID_802_11_BSSID_LIST_SCAN, NULL, 0); + if (res) { + WARNING("scanning failed (%08X)", res); + EXIT2(return -EOPNOTSUPP); + } + wnd->scan_timestamp = jiffies; + EXIT2(return 0); +} + +static int iw_set_scan(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + return set_scan(wnd); +} + +static int iw_get_scan(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + unsigned int i, list_len, needed; + NDIS_STATUS res; + struct ndis_bssid_list *bssid_list = NULL; + char *event = extra; + struct ndis_wlan_bssid *cur_item ; + + ENTER2(""); + if (time_before(jiffies, wnd->scan_timestamp + 3 * HZ)) + return -EAGAIN; + /* try with space for a few scan items */ + list_len = sizeof(ULONG) + sizeof(struct ndis_wlan_bssid_ex) * 8; + bssid_list = kmalloc(list_len, GFP_KERNEL); + if (!bssid_list) { + ERROR("couldn't allocate memory"); + return -ENOMEM; + } + /* some drivers don't set bssid_list->num_items to 0 if + OID_802_11_BSSID_LIST returns no items (prism54 driver, e.g.,) */ + memset(bssid_list, 0, list_len); + + needed = 0; + res = mp_query_info(wnd, OID_802_11_BSSID_LIST, + bssid_list, list_len, NULL, &needed); + if (res == NDIS_STATUS_INVALID_LENGTH || + res == NDIS_STATUS_BUFFER_TOO_SHORT) { + /* now try with required space */ + kfree(bssid_list); + list_len = needed; + bssid_list = kmalloc(list_len, GFP_KERNEL); + if (!bssid_list) { + ERROR("couldn't allocate memory"); + return -ENOMEM; + } + memset(bssid_list, 0, list_len); + + res = mp_query(wnd, OID_802_11_BSSID_LIST, + bssid_list, list_len); + } + if (res) { + WARNING("getting BSSID list failed (%08X)", res); + kfree(bssid_list); + EXIT2(return -EOPNOTSUPP); + } + TRACE2("%d", bssid_list->num_items); + cur_item = &bssid_list->bssid[0]; + for (i = 0; i < bssid_list->num_items; i++) { + event = ndis_translate_scan(dev, info, event, + extra + IW_SCAN_MAX_DATA, cur_item); + cur_item = (struct ndis_wlan_bssid *)((char *)cur_item + + cur_item->length); + } + wrqu->data.length = event - extra; + wrqu->data.flags = 0; + kfree(bssid_list); + EXIT2(return 0); +} + +static int iw_set_power_mode(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + ULONG power_mode; + + if (wrqu->power.disabled == 1) + power_mode = NDIS_POWER_OFF; + else if (wrqu->power.flags & IW_POWER_MIN) + power_mode = NDIS_POWER_MIN; + else // if (wrqu->power.flags & IW_POWER_MAX) + power_mode = NDIS_POWER_MAX; + + TRACE2("%d", power_mode); + res = mp_set(wnd, OID_802_11_POWER_MODE, + &power_mode, sizeof(power_mode)); + if (res) + WARNING("setting power mode failed (%08X)", res); + return 0; +} + +static int iw_get_power_mode(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + ULONG power_mode; + + ENTER2(""); + res = mp_query(wnd, OID_802_11_POWER_MODE, + &power_mode, sizeof(power_mode)); + if (res) + return -ENOTSUPP; + + if (power_mode == NDIS_POWER_OFF) + wrqu->power.disabled = 1; + else { + if (wrqu->power.flags != 0) + return 0; + wrqu->power.flags |= IW_POWER_ALL_R; + wrqu->power.flags |= IW_POWER_TIMEOUT; + wrqu->power.value = 0; + wrqu->power.disabled = 0; + + if (power_mode == NDIS_POWER_MIN) + wrqu->power.flags |= IW_POWER_MIN; + else // if (power_mode == NDIS_POWER_MAX) + wrqu->power.flags |= IW_POWER_MAX; + } + return 0; +} + +static int iw_get_sensitivity(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + ndis_rssi rssi_trigger; + + ENTER2(""); + res = mp_query(wnd, OID_802_11_RSSI_TRIGGER, + &rssi_trigger, sizeof(rssi_trigger)); + if (res) + return -EOPNOTSUPP; + wrqu->param.value = rssi_trigger; + wrqu->param.disabled = (rssi_trigger == 0); + wrqu->param.fixed = 1; + return 0; +} + +static int iw_set_sensitivity(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + ndis_rssi rssi_trigger; + + ENTER2(""); + if (wrqu->param.disabled) + rssi_trigger = 0; + else + rssi_trigger = wrqu->param.value; + res = mp_set(wnd, OID_802_11_RSSI_TRIGGER, + &rssi_trigger, sizeof(rssi_trigger)); + if (res == NDIS_STATUS_INVALID_DATA) + return -EINVAL; + if (res) + return -EOPNOTSUPP; + return 0; +} + +static int iw_get_ndis_stats(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + struct iw_statistics *stats = &wnd->iw_stats; + memcpy(&wrqu->qual, &stats->qual, sizeof(stats->qual)); + return 0; +} + +static int iw_get_range(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct iw_range *range = (struct iw_range *)extra; + struct iw_point *data = &wrqu->data; + struct ndis_device *wnd = netdev_priv(dev); + unsigned int i, n; + NDIS_STATUS res; + ndis_rates_ex rates; + ndis_tx_power_level tx_power; + + ENTER2(""); + data->length = sizeof(struct iw_range); + memset(range, 0, sizeof(struct iw_range)); + + range->txpower_capa = IW_TXPOW_MWATT; + range->num_txpower = 0; + + res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL, + &tx_power, sizeof(tx_power)); + if (!res) { + range->num_txpower = 1; + range->txpower[0] = tx_power; + } + + range->we_version_compiled = WIRELESS_EXT; + range->we_version_source = 18; + + range->retry_capa = IW_RETRY_LIMIT; + range->retry_flags = IW_RETRY_LIMIT; + range->min_retry = 0; + range->max_retry = 255; + + range->num_channels = 1; + + range->max_qual.qual = 100; + range->max_qual.level = 154; + range->max_qual.noise = 154; + range->sensitivity = 3; + + range->max_encoding_tokens = 4; + range->num_encoding_sizes = 2; + range->encoding_size[0] = 5; + range->encoding_size[1] = 13; + + range->num_bitrates = 0; + memset(&rates, 0, sizeof(rates)); + res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES, + &rates, sizeof(rates), &n, NULL); + if (res) + WARNING("getting bit rates failed: %08X", res); + else { + for (i = 0; i < n && range->num_bitrates < IW_MAX_BITRATES; i++) + if (rates[i] & 0x80) + continue; + else if (rates[i] & 0x7f) { + range->bitrate[range->num_bitrates] = + (rates[i] & 0x7f) * 500000; + range->num_bitrates++; + } + } + + range->num_channels = (sizeof(freq_chan)/sizeof(freq_chan[0])); + + for (i = 0; i < (sizeof(freq_chan)/sizeof(freq_chan[0])) && + i < IW_MAX_FREQUENCIES; i++) { + range->freq[i].i = i + 1; + range->freq[i].m = freq_chan[i] * 100000; + range->freq[i].e = 1; + } + range->num_frequency = i; + + range->min_rts = 0; + range->max_rts = 2347; + range->min_frag = 256; + range->max_frag = 2346; + + /* Event capability (kernel + driver) */ + range->event_capa[0] = (IW_EVENT_CAPA_K_0 | + IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) | + IW_EVENT_CAPA_MASK(SIOCGIWAP) | + IW_EVENT_CAPA_MASK(SIOCGIWSCAN)); + range->event_capa[1] = IW_EVENT_CAPA_K_1; + range->event_capa[4] = (IW_EVENT_CAPA_MASK(IWEVTXDROP) | + IW_EVENT_CAPA_MASK(IWEVCUSTOM) | + IW_EVENT_CAPA_MASK(IWEVREGISTERED) | + IW_EVENT_CAPA_MASK(IWEVEXPIRED)); + + range->enc_capa = 0; + + if (test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr)) + range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP; + if (test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr)) + range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP; + + if (test_bit(Ndis802_11AuthModeWPA, &wnd->capa.auth) || + test_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth)) + range->enc_capa |= IW_ENC_CAPA_WPA; + if (test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) || + test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth)) + range->enc_capa |= IW_ENC_CAPA_WPA2; + + return 0; +} + +void set_default_iw_params(struct ndis_device *wnd) +{ + wnd->iw_auth_key_mgmt = 0; + wnd->iw_auth_wpa_version = 0; + set_infra_mode(wnd, Ndis802_11Infrastructure); + set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen); + set_priv_filter(wnd); + set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE, IW_AUTH_CIPHER_NONE); +} + +static int deauthenticate(struct ndis_device *wnd) +{ + int ret; + + ENTER2(""); + ret = disassociate(wnd, 1); + set_default_iw_params(wnd); + EXIT2(return ret); +} + +NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid) +{ + NDIS_STATUS res; + u8 buf[NDIS_ESSID_MAX_SIZE]; + int i; + + TRACE2(""); + res = mp_set(wnd, OID_802_11_DISASSOCIATE, NULL, 0); + /* disassociate causes radio to be turned off; if reset_ssid + * is given, set ssid to random to enable radio */ + if (reset_ssid) { + get_random_bytes(buf, sizeof(buf)); + for (i = 0; i < sizeof(buf); i++) + buf[i] = 'a' + (buf[i] % 26); + set_essid(wnd, buf, sizeof(buf)); + } + return res; +} + +static ULONG ndis_priv_mode(struct ndis_device *wnd) +{ + if (wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2 || + wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA) + return Ndis802_11PrivFilter8021xWEP; + else + return Ndis802_11PrivFilterAcceptAll; +} + +int set_priv_filter(struct ndis_device *wnd) +{ + NDIS_STATUS res; + ULONG flags; + + flags = ndis_priv_mode(wnd); + ENTER2("filter: %d", flags); + res = mp_set_int(wnd, OID_802_11_PRIVACY_FILTER, flags); + if (res) + TRACE2("setting privacy filter to %d failed (%08X)", + flags, res); + EXIT2(return 0); +} + +static int iw_set_mlme(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + struct iw_mlme *mlme = (struct iw_mlme *)extra; + + ENTER2(""); + switch (mlme->cmd) { + case IW_MLME_DEAUTH: + return deauthenticate(wnd); + case IW_MLME_DISASSOC: + TRACE2("cmd=%d reason_code=%d", mlme->cmd, mlme->reason_code); + return disassociate(wnd, 1); + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int iw_set_genie(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + /* + * NDIS drivers do not allow IEs to be configured; this is + * done by the driver based on other configuration. Return 0 + * to avoid causing issues with user space programs that + * expect this function to succeed. + */ + return 0; +} + +static int iw_set_auth(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + TRACE2("index=%d value=%d", wrqu->param.flags & IW_AUTH_INDEX, + wrqu->param.value); + switch (wrqu->param.flags & IW_AUTH_INDEX) { + case IW_AUTH_WPA_VERSION: + wnd->iw_auth_wpa_version = wrqu->param.value; + break; + case IW_AUTH_CIPHER_PAIRWISE: + wnd->iw_auth_cipher_pairwise = wrqu->param.value; + break; + case IW_AUTH_CIPHER_GROUP: + wnd->iw_auth_cipher_group = wrqu->param.value; + break; + case IW_AUTH_KEY_MGMT: + wnd->iw_auth_key_mgmt = wrqu->param.value; + break; + case IW_AUTH_80211_AUTH_ALG: + wnd->iw_auth_80211_alg = wrqu->param.value; + break; + case IW_AUTH_WPA_ENABLED: + if (wrqu->param.value) + deauthenticate(wnd); + break; + case IW_AUTH_TKIP_COUNTERMEASURES: + case IW_AUTH_DROP_UNENCRYPTED: + case IW_AUTH_RX_UNENCRYPTED_EAPOL: + case IW_AUTH_PRIVACY_INVOKED: + TRACE2("%d not implemented: %d", + wrqu->param.flags & IW_AUTH_INDEX, wrqu->param.value); + break; + default: + WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX); + return -EOPNOTSUPP; + } + return 0; +} + +static int iw_get_auth(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + + ENTER2("index=%d", wrqu->param.flags & IW_AUTH_INDEX); + switch (wrqu->param.flags & IW_AUTH_INDEX) { + case IW_AUTH_WPA_VERSION: + wrqu->param.value = wnd->iw_auth_wpa_version; + break; + case IW_AUTH_CIPHER_PAIRWISE: + wrqu->param.value = wnd->iw_auth_cipher_pairwise; + break; + case IW_AUTH_CIPHER_GROUP: + wrqu->param.value = wnd->iw_auth_cipher_group; + break; + case IW_AUTH_KEY_MGMT: + wrqu->param.value = wnd->iw_auth_key_mgmt; + break; + case IW_AUTH_80211_AUTH_ALG: + wrqu->param.value = wnd->iw_auth_80211_alg; + break; + default: + WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX); + return -EOPNOTSUPP; + } + return 0; +} + +static int iw_set_encodeext(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; + struct ndis_device *wnd = netdev_priv(dev); + struct ndis_add_key ndis_key; + int i, keyidx; + NDIS_STATUS res; + u8 *addr; + + keyidx = wrqu->encoding.flags & IW_ENCODE_INDEX; + ENTER2("%d", keyidx); + if (keyidx) + keyidx--; + else + keyidx = wnd->encr_info.tx_key_index; + + if (keyidx < 0 || keyidx >= MAX_ENCR_KEYS) + return -EINVAL; + + if (ext->alg == WPA_ALG_WEP) { + if (!test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr)) + EXIT2(return -1); + if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) + wnd->encr_info.tx_key_index = keyidx; + if (add_wep_key(wnd, ext->key, ext->key_len, keyidx)) + EXIT2(return -1); + else + EXIT2(return 0); + } + if ((wrqu->encoding.flags & IW_ENCODE_DISABLED) || + ext->alg == IW_ENCODE_ALG_NONE || ext->key_len == 0) + EXIT2(return remove_key(wnd, keyidx, ndis_key.bssid)); + + if (ext->key_len > sizeof(ndis_key.key)) { + TRACE2("incorrect key length (%u)", ext->key_len); + EXIT2(return -1); + } + + memset(&ndis_key, 0, sizeof(ndis_key)); + + ndis_key.struct_size = + sizeof(ndis_key) - sizeof(ndis_key.key) + ext->key_len; + ndis_key.length = ext->key_len; + ndis_key.index = keyidx; + + if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { + for (i = 0; i < 6 ; i++) + ndis_key.rsc |= (((u64)ext->rx_seq[i]) << (i * 8)); + TRACE2("0x%Lx", ndis_key.rsc); + ndis_key.index |= 1 << 29; + } + + addr = ext->addr.sa_data; + if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) { + /* group key */ + if (wnd->infrastructure_mode == Ndis802_11IBSS) + memset(ndis_key.bssid, 0xff, ETH_ALEN); + else + get_ap_address(wnd, ndis_key.bssid); + } else { + /* pairwise key */ + ndis_key.index |= (1 << 30); + memcpy(ndis_key.bssid, addr, ETH_ALEN); + } + TRACE2(MACSTRSEP, MAC2STR(ndis_key.bssid)); + + if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) + ndis_key.index |= (1 << 31); + + if (ext->alg == IW_ENCODE_ALG_TKIP && ext->key_len == 32) { + /* wpa_supplicant gives us the Michael MIC RX/TX keys in + * different order than NDIS spec, so swap the order here. */ + memcpy(ndis_key.key, ext->key, 16); + memcpy(ndis_key.key + 16, ext->key + 24, 8); + memcpy(ndis_key.key + 24, ext->key + 16, 8); + } else + memcpy(ndis_key.key, ext->key, ext->key_len); + + res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size); + if (res) { + TRACE2("adding key failed (%08X), %u", + res, ndis_key.struct_size); + EXIT2(return -1); + } + wnd->encr_info.keys[keyidx].length = ext->key_len; + memcpy(&wnd->encr_info.keys[keyidx].key, ndis_key.key, ext->key_len); + if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) + wnd->encr_info.tx_key_index = keyidx; + TRACE2("key %d added", keyidx); + + EXIT2(return 0); +} + +static int iw_get_encodeext(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + /* struct iw_encode_ext *ext = (struct iw_encode_ext *) extra; */ + /* TODO */ + ENTER2(""); + return 0; +} + +static int iw_set_pmksa(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct iw_pmksa *pmksa = (struct iw_pmksa *)extra; + struct ndis_pmkid pmkid; + NDIS_STATUS res; + struct ndis_device *wnd = netdev_priv(dev); + + /* TODO: must keep local list of PMKIDs since NDIS drivers + * expect that all PMKID entries are included whenever a new + * one is added. */ + + ENTER2("%d", pmksa->cmd); + if ((pmksa->cmd == IW_PMKSA_ADD || pmksa->cmd == IW_PMKSA_REMOVE) && + (!(wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2))) + EXIT2(return -EOPNOTSUPP); + + memset(&pmkid, 0, sizeof(pmkid)); + if (pmksa->cmd == IW_PMKSA_ADD) { + pmkid.bssid_info_count = 1; + memcpy(pmkid.bssid_info[0].bssid, pmksa->bssid.sa_data, + ETH_ALEN); + memcpy(pmkid.bssid_info[0].pmkid, pmksa->pmkid, IW_PMKID_LEN); + } + pmkid.length = sizeof(pmkid); + + res = mp_set(wnd, OID_802_11_PMKID, &pmkid, pmkid.length); + if (res == NDIS_STATUS_FAILURE) + EXIT2(return -EOPNOTSUPP); + TRACE2("OID_802_11_PMKID -> %d", res); + if (res) + return -EINVAL; + + return 0; +} + +#define WEXT(id) [id - SIOCIWFIRST] + +static const iw_handler ndis_handler[] = { + WEXT(SIOCGIWNAME) = iw_get_network_type, + WEXT(SIOCSIWESSID) = iw_set_essid, + WEXT(SIOCGIWESSID) = iw_get_essid, + WEXT(SIOCSIWMODE) = iw_set_infra_mode, + WEXT(SIOCGIWMODE) = iw_get_infra_mode, + WEXT(SIOCGIWFREQ) = iw_get_freq, + WEXT(SIOCSIWFREQ) = iw_set_freq, + WEXT(SIOCGIWTXPOW) = iw_get_tx_power, + WEXT(SIOCSIWTXPOW) = iw_set_tx_power, + WEXT(SIOCGIWRATE) = iw_get_bitrate, + WEXT(SIOCSIWRATE) = iw_set_bitrate, + WEXT(SIOCGIWRTS) = iw_get_rts_threshold, + WEXT(SIOCSIWRTS) = iw_set_rts_threshold, + WEXT(SIOCGIWFRAG) = iw_get_frag_threshold, + WEXT(SIOCSIWFRAG) = iw_set_frag_threshold, + WEXT(SIOCGIWAP) = iw_get_ap_address, + WEXT(SIOCSIWAP) = iw_set_ap_address, + WEXT(SIOCSIWENCODE) = iw_set_wep, + WEXT(SIOCGIWENCODE) = iw_get_encr, + WEXT(SIOCSIWSCAN) = iw_set_scan, + WEXT(SIOCGIWSCAN) = iw_get_scan, + WEXT(SIOCGIWPOWER) = iw_get_power_mode, + WEXT(SIOCSIWPOWER) = iw_set_power_mode, + WEXT(SIOCGIWRANGE) = iw_get_range, + WEXT(SIOCGIWSTATS) = iw_get_ndis_stats, + WEXT(SIOCGIWSENS) = iw_get_sensitivity, + WEXT(SIOCSIWSENS) = iw_set_sensitivity, + WEXT(SIOCGIWNICKN) = iw_get_nick, + WEXT(SIOCSIWNICKN) = iw_set_nick, + WEXT(SIOCSIWCOMMIT) = iw_set_dummy, + WEXT(SIOCSIWMLME) = iw_set_mlme, + WEXT(SIOCSIWGENIE) = iw_set_genie, + WEXT(SIOCSIWAUTH) = iw_set_auth, + WEXT(SIOCGIWAUTH) = iw_get_auth, + WEXT(SIOCSIWENCODEEXT) = iw_set_encodeext, + WEXT(SIOCGIWENCODEEXT) = iw_get_encodeext, + WEXT(SIOCSIWPMKSA) = iw_set_pmksa, +}; + +/* private ioctl's */ + +static int priv_reset(struct net_device *dev, struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + int res; + ENTER2(""); + res = mp_reset(netdev_priv(dev)); + if (res) { + WARNING("reset failed: %08X", res); + return -EOPNOTSUPP; + } + return 0; +} + +static int priv_deauthenticate(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + int res; + ENTER2(""); + res = deauthenticate(netdev_priv(dev)); + return res; +} + +static int priv_power_profile(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + struct miniport *mp; + ULONG profile_inf; + + ENTER2(""); + mp = &wnd->wd->driver->ndis_driver->mp; + if (!mp->pnp_event_notify) + EXIT2(return -EOPNOTSUPP); + + /* 1 for AC and 0 for Battery */ + if (wrqu->param.value) + profile_inf = NdisPowerProfileAcOnLine; + else + profile_inf = NdisPowerProfileBattery; + + LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx, + NdisDevicePnPEventPowerProfileChanged, + &profile_inf, sizeof(profile_inf)); + EXIT2(return 0); +} + +static int priv_network_type(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + enum network_type network_type; + NDIS_STATUS res; + char type; + + ENTER2(""); + type = wrqu->param.value; + if (type == 'f') + network_type = Ndis802_11FH; + else if (type == 'b') + network_type = Ndis802_11DS; + else if (type == 'a') + network_type = Ndis802_11OFDM5; + else if (type == 'g' || type == 'n') + network_type = Ndis802_11OFDM24; + else + network_type = Ndis802_11Automode; + + res = mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, network_type); + if (res) { + WARNING("setting network type to %d failed (%08X)", + network_type, res); + EXIT2(return -EINVAL); + } + + EXIT2(return 0); +} + +static int priv_media_stream_mode(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + NDIS_STATUS res; + int mode; + + ENTER2(""); + if (wrqu->param.value > 0) + mode = Ndis802_11MediaStreamOn; + else + mode = Ndis802_11MediaStreamOff; + res = mp_set_int(wnd, OID_802_11_MEDIA_STREAM_MODE, mode); + if (res) { + WARNING("oid failed (%08X)", res); + EXIT2(return -EINVAL); + } + EXIT2(return 0); +} + +static int priv_reload_defaults(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + struct ndis_device *wnd = netdev_priv(dev); + int res; + ENTER2(""); + res = mp_set_int(wnd, OID_802_11_RELOAD_DEFAULTS, + Ndis802_11ReloadWEPKeys); + if (res) { + WARNING("reloading defaults failed: %08X", res); + return -EOPNOTSUPP; + } + return 0; +} + +static const struct iw_priv_args priv_args[] = { + {PRIV_RESET, 0, 0, "ndis_reset"}, + {PRIV_POWER_PROFILE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, + "power_profile"}, + {PRIV_DEAUTHENTICATE, 0, 0, "deauthenticate"}, + {PRIV_NETWORK_TYPE, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 1, 0, + "network_type"}, + {PRIV_MEDIA_STREAM_MODE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, + "media_stream"}, + + {PRIV_RELOAD_DEFAULTS, 0, 0, "reload_defaults"}, +}; + +#define WEPRIV(id) [id - SIOCIWFIRSTPRIV] + +static const iw_handler priv_handler[] = { + WEPRIV(PRIV_RESET) = priv_reset, + WEPRIV(PRIV_POWER_PROFILE) = priv_power_profile, + WEPRIV(PRIV_DEAUTHENTICATE) = priv_deauthenticate, + WEPRIV(PRIV_NETWORK_TYPE) = priv_network_type, + WEPRIV(PRIV_MEDIA_STREAM_MODE) = priv_media_stream_mode, + WEPRIV(PRIV_RELOAD_DEFAULTS) = priv_reload_defaults, +}; + +const struct iw_handler_def ndis_handler_def = { + .num_standard = sizeof(ndis_handler) / sizeof(ndis_handler[0]), + .num_private = sizeof(priv_handler) / sizeof(priv_handler[0]), + .num_private_args = sizeof(priv_args) / sizeof(priv_args[0]), + + .standard = (iw_handler *)ndis_handler, + .private = (iw_handler *)priv_handler, + .private_args = (struct iw_priv_args *)priv_args, + .get_wireless_stats = get_iw_stats, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/iw_ndis.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/iw_ndis.h @@ -0,0 +1,208 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _IW_NDIS_H_ +#define _IW_NDIS_H_ + +#include "ndis.h" + +#define WL_NOISE -96 /* typical noise level in dBm */ +#define WL_SIGMAX -32 /* typical maximum signal level in dBm */ + +struct ndis_encr_key { + ULONG struct_size; + ULONG index; + ULONG length; + UCHAR key[NDIS_ENCODING_TOKEN_MAX]; +}; + +struct ndis_add_key { + ULONG struct_size; + ndis_key_index index; + ULONG length; + mac_address bssid; + UCHAR pad[6]; + ndis_key_rsc rsc; + UCHAR key[NDIS_ENCODING_TOKEN_MAX]; +}; + +struct ndis_remove_key { + ULONG struct_size; + ndis_key_index index; + mac_address bssid; +}; + +struct ndis_fixed_ies { + UCHAR time_stamp[8]; + USHORT beacon_interval; + USHORT capa; +}; + +struct ndis_variable_ies { + ULONG elem_id; + UCHAR length; + UCHAR data[1]; +}; + +enum ndis_reload_defaults { Ndis802_11ReloadWEPKeys }; + +struct ndis_assoc_info { + ULONG length; + USHORT req_ies; + struct req_ie { + USHORT capa; + USHORT listen_interval; + mac_address cur_ap_address; + } req_ie; + ULONG req_ie_length; + ULONG offset_req_ies; + USHORT resp_ies; + struct resp_ie { + USHORT capa; + USHORT status_code; + USHORT assoc_id; + } resp_ie; + ULONG resp_ie_length; + ULONG offset_resp_ies; +}; + +struct ndis_configuration_fh { + ULONG length; + ULONG hop_pattern; + ULONG hop_set; + ULONG dwell_time; +}; + +struct ndis_configuration { + ULONG length; + ULONG beacon_period; + ULONG atim_window; + ULONG ds_config; + struct ndis_configuration_fh fh_config; +}; + +struct ndis_wlan_bssid { + ULONG length; + mac_address mac; + UCHAR reserved[2]; + struct ndis_essid ssid; + ULONG privacy; + ndis_rssi rssi; + UINT net_type; + struct ndis_configuration config; + UINT mode; + ndis_rates rates; +}; + +struct ndis_wlan_bssid_ex { + ULONG length; + mac_address mac; + UCHAR reserved[2]; + struct ndis_essid ssid; + ULONG privacy; + ndis_rssi rssi; + UINT net_type; + struct ndis_configuration config; + UINT mode; + ndis_rates_ex rates_ex; + ULONG ie_length; + UCHAR ies[1]; +}; + +/* we use bssid_list as bssid_list_ex also */ +struct ndis_bssid_list { + ULONG num_items; + struct ndis_wlan_bssid bssid[1]; +}; + +enum ndis_priv_filter { + Ndis802_11PrivFilterAcceptAll, Ndis802_11PrivFilter8021xWEP +}; + +enum network_type { + Ndis802_11FH, Ndis802_11DS, Ndis802_11OFDM5, Ndis802_11OFDM24, + /* MSDN site uses Ndis802_11Automode, which is not mentioned + * in DDK, so add one and assign it to + * Ndis802_11NetworkTypeMax */ + Ndis802_11Automode, Ndis802_11NetworkTypeMax = Ndis802_11Automode +}; + +struct network_type_list { + ULONG num; + enum network_type types[1]; +}; + +enum ndis_power { + NDIS_POWER_OFF = 0, NDIS_POWER_MAX, NDIS_POWER_MIN, +}; + +struct ndis_auth_req { + ULONG length; + mac_address bssid; + ULONG flags; +}; + +struct ndis_bssid_info { + mac_address bssid; + ndis_pmkid_vavlue pmkid; +}; + +struct ndis_pmkid { + ULONG length; + ULONG bssid_info_count; + struct ndis_bssid_info bssid_info[1]; +}; + +int add_wep_key(struct ndis_device *wnd, char *key, int key_len, + int index); +int set_essid(struct ndis_device *wnd, const char *ssid, int ssid_len); +int set_infra_mode(struct ndis_device *wnd, + enum ndis_infrastructure_mode mode); +int get_ap_address(struct ndis_device *wnd, mac_address mac); +int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode); +int set_iw_auth_mode(struct ndis_device *wnd, int wpa_version, + int auth_80211_alg); +int set_auth_mode(struct ndis_device *wnd); +int set_ndis_encr_mode(struct ndis_device *wnd, int cipher_pairwise, + int cipher_groupwise); +int get_ndis_encr_mode(struct ndis_device *wnd); +int set_encr_mode(struct ndis_device *wnd); +int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise, + int cipher_groupwise); +int get_ndis_auth_mode(struct ndis_device *wnd); +int set_priv_filter(struct ndis_device *wnd); +int set_scan(struct ndis_device *wnd); +NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid); +void set_default_iw_params(struct ndis_device *wnd); +extern const struct iw_handler_def ndis_handler_def; + +#define PRIV_RESET SIOCIWFIRSTPRIV+16 +#define PRIV_POWER_PROFILE SIOCIWFIRSTPRIV+17 +#define PRIV_NETWORK_TYPE SIOCIWFIRSTPRIV+18 +#define PRIV_DEAUTHENTICATE SIOCIWFIRSTPRIV+19 +#define PRIV_MEDIA_STREAM_MODE SIOCIWFIRSTPRIV+20 +#define PRIV_RELOAD_DEFAULTS SIOCIWFIRSTPRIV+23 + +#define RSN_INFO_ELEM 0x30 + +/* these have to match what is in wpa_supplicant */ + +typedef enum { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP } wpa_alg; +typedef enum { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP, + CIPHER_WEP104 } wpa_cipher; +typedef enum { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE, + KEY_MGMT_802_1X_NO_WPA, KEY_MGMT_WPA_NONE } wpa_key_mgmt; + +#endif // IW_NDIS_H --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/wrapmem.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/wrapmem.c @@ -0,0 +1,360 @@ +/* + * Copyright (C) 2006 Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define _WRAPMEM_C_ + +#include "ntoskernel.h" + +struct slack_alloc_info { + struct nt_list list; + size_t size; +}; + +static struct nt_list allocs; +static struct nt_list slack_allocs; +static spinlock_t alloc_lock; + +struct vmem_block { + struct nt_list list; + int size; +}; + +static struct nt_list vmem_list; + +#if defined(ALLOC_DEBUG) +struct alloc_info { + enum alloc_type type; + size_t size; +#if ALLOC_DEBUG > 1 + struct nt_list list; + const char *file; + int line; + ULONG tag; +#endif +}; + +static atomic_t alloc_sizes[ALLOC_TYPE_MAX]; +#endif + +void wrapmem_info(void) +{ +#ifdef ALLOC_DEBUG + enum alloc_type type; + for (type = 0; type < ALLOC_TYPE_MAX; type++) + INFO("total size of allocations in %d: %d", + type, atomic_read(&alloc_sizes[type])); +#endif +} + +/* allocate memory and add it to list of allocated pointers; if a + * driver doesn't free this memory for any reason (buggy driver or we + * allocate space behind driver's back since we need more space than + * corresponding Windows structure provides etc.), this gets freed + * automatically when module is unloaded + */ +void *slack_kmalloc(size_t size) +{ + struct slack_alloc_info *info; + gfp_t flags; + + ENTER4("size = %lu", (unsigned long)size); + + if (irql_gfp() & GFP_ATOMIC) + flags = GFP_ATOMIC; + else + flags = GFP_KERNEL; + info = kmalloc(size + sizeof(*info), flags); + if (!info) + return NULL; + info->size = size; + spin_lock_bh(&alloc_lock); + InsertTailList(&slack_allocs, &info->list); + spin_unlock_bh(&alloc_lock); +#ifdef ALLOC_DEBUG + atomic_add(size, &alloc_sizes[ALLOC_TYPE_SLACK]); +#endif + TRACE4("%p, %p", info, info + 1); + EXIT4(return info + 1); +} + +/* free pointer and remove from list of allocated pointers */ +void slack_kfree(void *ptr) +{ + struct slack_alloc_info *info; + + ENTER4("%p", ptr); + info = ptr - sizeof(*info); + spin_lock_bh(&alloc_lock); + RemoveEntryList(&info->list); + spin_unlock_bh(&alloc_lock); +#ifdef ALLOC_DEBUG + atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); +#endif + kfree(info); + EXIT4(return); +} + +#if defined(ALLOC_DEBUG) +void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line) +{ + struct alloc_info *info; + + info = kmalloc(size + sizeof(*info), flags); + if (!info) + return NULL; + if (flags & GFP_ATOMIC) + info->type = ALLOC_TYPE_KMALLOC_ATOMIC; + else + info->type = ALLOC_TYPE_KMALLOC_NON_ATOMIC; + info->size = size; + atomic_add(size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + info->file = file; + info->line = line; + info->tag = 0; + spin_lock_bh(&alloc_lock); + InsertTailList(&allocs, &info->list); + spin_unlock_bh(&alloc_lock); +#endif + TRACE4("%p", info + 1); + return info + 1; +} + +void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line) +{ + void *ptr = wrap_kmalloc(size, flags, file, line); + if (ptr) + memset(ptr, 0, size); + return ptr; +} + +void wrap_kfree(void *ptr) +{ + struct alloc_info *info; + + TRACE4("%p", ptr); + if (!ptr) + return; + info = ptr - sizeof(*info); + atomic_sub(info->size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + spin_lock_bh(&alloc_lock); + RemoveEntryList(&info->list); + spin_unlock_bh(&alloc_lock); + if (!(info->type == ALLOC_TYPE_KMALLOC_ATOMIC || + info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC)) + WARNING("invliad type: %d", info->type); +#endif + kfree(info); +} + +void *wrap_vmalloc(unsigned long size, const char *file, int line) +{ + struct alloc_info *info; + + info = vmalloc(size + sizeof(*info)); + if (!info) + return NULL; + info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC; + info->size = size; + atomic_add(size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + info->file = file; + info->line = line; + info->tag = 0; + spin_lock_bh(&alloc_lock); + InsertTailList(&allocs, &info->list); + spin_unlock_bh(&alloc_lock); +#endif + return info + 1; +} + +void *wrap__vmalloc(unsigned long size, gfp_t gfp_mask, pgprot_t prot, + const char *file, int line) +{ + struct alloc_info *info; + + info = __vmalloc(size + sizeof(*info), gfp_mask, prot); + if (!info) + return NULL; + if (gfp_mask & GFP_ATOMIC) + info->type = ALLOC_TYPE_VMALLOC_ATOMIC; + else + info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC; + info->size = size; + atomic_add(size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + info->file = file; + info->line = line; + info->tag = 0; + spin_lock_bh(&alloc_lock); + InsertTailList(&allocs, &info->list); + spin_unlock_bh(&alloc_lock); +#endif + return info + 1; +} + +void wrap_vfree(void *ptr) +{ + struct alloc_info *info; + + info = ptr - sizeof(*info); + atomic_sub(info->size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + spin_lock_bh(&alloc_lock); + RemoveEntryList(&info->list); + spin_unlock_bh(&alloc_lock); + if (!(info->type == ALLOC_TYPE_VMALLOC_ATOMIC || + info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC)) + WARNING("invliad type: %d", info->type); +#endif + vfree(info); +} + +void *wrap_alloc_pages(gfp_t flags, unsigned int size, + const char *file, int line) +{ + struct alloc_info *info; + + size += sizeof(*info); + info = (struct alloc_info *)__get_free_pages(flags, get_order(size)); + if (!info) + return NULL; + info->type = ALLOC_TYPE_PAGES; + info->size = size; + atomic_add(size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + info->file = file; + info->line = line; + info->tag = 0; + spin_lock_bh(&alloc_lock); + InsertTailList(&allocs, &info->list); + spin_unlock_bh(&alloc_lock); +#endif + return info + 1; +} + +void wrap_free_pages(unsigned long ptr, int order) +{ + struct alloc_info *info; + + info = (void *)ptr - sizeof(*info); + atomic_sub(info->size, &alloc_sizes[info->type]); +#if ALLOC_DEBUG > 1 + spin_lock_bh(&alloc_lock); + RemoveEntryList(&info->list); + spin_unlock_bh(&alloc_lock); + if (info->type != ALLOC_TYPE_PAGES) + WARNING("invliad type: %d", info->type); +#endif + free_pages((unsigned long)info, get_order(info->size)); +} + +#if ALLOC_DEBUG > 1 +#undef ExAllocatePoolWithTag +void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size, + ULONG tag, const char *file, int line) +{ + void *addr; + struct alloc_info *info; + + ENTER4("pool_type: %d, size: %lu, tag: %u", pool_type, size, tag); + addr = ExAllocatePoolWithTag(pool_type, size, tag); + if (!addr) + return NULL; + info = addr - sizeof(*info); + info->file = file; + info->line = line; + info->tag = tag; + EXIT4(return addr); +} +#endif + +int alloc_size(enum alloc_type type) +{ + if (type >= 0 && type < ALLOC_TYPE_MAX) + return atomic_read(&alloc_sizes[type]); + else + return -EINVAL; +} + +#endif // ALLOC_DEBUG + +int wrapmem_init(void) +{ + InitializeListHead(&allocs); + InitializeListHead(&slack_allocs); + InitializeListHead(&vmem_list); + spin_lock_init(&alloc_lock); + return 0; +} + +void wrapmem_exit(void) +{ + enum alloc_type type; + struct nt_list *ent; + + /* free all pointers on the slack list */ + while (1) { + struct slack_alloc_info *info; + spin_lock_bh(&alloc_lock); + ent = RemoveHeadList(&slack_allocs); + spin_unlock_bh(&alloc_lock); + if (!ent) + break; + info = container_of(ent, struct slack_alloc_info, list); +#ifdef ALLOC_DEBUG + atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); +#endif + kfree(info); + } + type = 0; +#ifdef ALLOC_DEBUG + for (type = 0; type < ALLOC_TYPE_MAX; type++) { + int n = atomic_read(&alloc_sizes[type]); + if (n) + WARNING("%d bytes of memory in %d leaking", n, type); + } + +#if ALLOC_DEBUG > 1 + while (1) { + struct alloc_info *info; + + spin_lock_bh(&alloc_lock); + ent = RemoveHeadList(&allocs); + spin_unlock_bh(&alloc_lock); + if (!ent) + break; + info = container_of(ent, struct alloc_info, list); + atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]); + WARNING("%p in %d of size %zu allocated at %s(%d) " + "with tag 0x%08X leaking; freeing it now", + info + 1, info->type, info->size, info->file, + info->line, info->tag); + if (info->type == ALLOC_TYPE_KMALLOC_ATOMIC || + info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC) + kfree(info); + else if (info->type == ALLOC_TYPE_VMALLOC_ATOMIC || + info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC) + vfree(info); + else if (info->type == ALLOC_TYPE_PAGES) + free_pages((unsigned long)info, get_order(info->size)); + else + WARNING("invalid type: %d; not freed", info->type); + } +#endif +#endif + return; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ndis.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ndis.h @@ -0,0 +1,1314 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _NDIS_H_ +#define _NDIS_H_ + +#include "ntoskernel.h" + +//#define ALLOW_POOL_OVERFLOW 1 + +#define NDIS_DMA_24BITS 0 +#define NDIS_DMA_32BITS 1 +#define NDIS_DMA_64BITS 2 + +#ifdef CONFIG_X86_64 +#define MAXIMUM_PROCESSORS 64 +#else +#define MAXIMUM_PROCESSORS 32 +#endif + +typedef UINT NDIS_STATUS; +typedef UCHAR NDIS_DMA_SIZE; +typedef LONG ndis_rssi; +typedef ULONG ndis_key_index; +typedef ULONG ndis_tx_power_level; +typedef ULONGULONG ndis_key_rsc; +typedef UCHAR ndis_rates[NDIS_MAX_RATES]; +typedef UCHAR ndis_rates_ex[NDIS_MAX_RATES_EX]; +typedef UCHAR mac_address[ETH_ALEN]; +typedef ULONG ndis_fragmentation_threshold; +typedef ULONG ndis_rts_threshold; +typedef ULONG ndis_antenna; +typedef ULONG ndis_oid; + +typedef UCHAR ndis_pmkid_vavlue[16]; + +typedef uint64_t NDIS_PHY_ADDRESS; + +struct ndis_sg_element { + PHYSICAL_ADDRESS address; + ULONG length; + ULONG_PTR reserved; +}; + +struct ndis_sg_list { + ULONG nent; + ULONG_PTR reserved; + struct ndis_sg_element elements[]; +}; + +/* when sending packets, ndiswrapper associates exactly one sg element + * in sg list */ +struct wrap_tx_sg_list { + ULONG nent; + ULONG_PTR reserved; + struct ndis_sg_element elements[1]; +}; + +struct ndis_phy_addr_unit { + NDIS_PHY_ADDRESS phy_addr; + UINT length; +}; + +typedef struct mdl ndis_buffer; + +struct ndis_buffer_pool { + ndis_buffer *free_descr; +// NT_SPIN_LOCK lock; + spinlock_t lock; + UINT max_descr; + UINT num_allocated_descr; +}; + +#define NDIS_PROTOCOL_ID_DEFAULT 0x00 +#define NDIS_PROTOCOL_ID_TCP_IP 0x02 +#define NDIS_PROTOCOL_ID_IPX 0x06 +#define NDIS_PROTOCOL_ID_NBF 0x07 +#define NDIS_PROTOCOL_ID_MAX 0x0F +#define NDIS_PROTOCOL_ID_MASK 0x0F + +#define fPACKET_WRAPPER_RESERVED 0x3F +#define fPACKET_CONTAINS_MEDIA_SPECIFIC_INFO 0x40 +#define fPACKET_ALLOCATED_BY_NDIS 0x80 + +#define PROTOCOL_RESERVED_SIZE_IN_PACKET (4 * sizeof(void *)) + +struct transport_header_offset { + USHORT protocol_type; + USHORT header_offset; +}; + +struct ndis_network_address { + USHORT length; + USHORT type; + UCHAR address[1]; +}; + +struct ndis_network_address_list { + LONG count; + USHORT type; + struct ndis_network_address address[1]; +}; + +struct ndis_tcp_ip_checksum_packet_info { + union { + struct { + ULONG v4:1; + ULONG v6:1; + ULONG tcp:1; + ULONG udp:1; + ULONG ip:1; + } tx; + struct { + ULONG tcp_failed:1; + ULONG udp_failed:1; + ULONG ip_failed:1; + ULONG tcp_succeeded:1; + ULONG udp_succeeded:1; + ULONG ip_succeeded:1; + ULONG loopback:1; + } rx; + ULONG value; + }; +}; + +enum ndis_task { + TcpIpChecksumNdisTask, IpSecNdisTask, TcpLargeSendNdisTask, MaxNdisTask +}; + +enum ndis_encapsulation { + UNSPECIFIED_Encapsulation, NULL_Encapsulation, + IEEE_802_3_Encapsulation, IEEE_802_5_Encapsulation, + LLC_SNAP_ROUTED_Encapsulation, LLC_SNAP_BRIDGED_Encapsulation +}; + +#define NDIS_TASK_OFFLOAD_VERSION 1 + +struct ndis_encapsulation_format { + enum ndis_encapsulation encap; + struct { + ULONG fixed_header_size:1; + ULONG reserved:31; + } flags; + ULONG header_size; +}; + +struct ndis_task_offload_header { + ULONG version; + ULONG size; + ULONG reserved; + ULONG offset_first_task; + struct ndis_encapsulation_format encap_format; +}; + +struct ndis_task_offload { + ULONG version; + ULONG size; + enum ndis_task task; + ULONG offset_next_task; + ULONG task_buf_length; + UCHAR task_buf[1]; +}; + +struct v4_checksum { + union { + struct { + ULONG ip_opts:1; + ULONG tcp_opts:1; + ULONG tcp_csum:1; + ULONG udp_csum:1; + ULONG ip_csum:1; + }; + ULONG value; + }; +}; + +struct v6_checksum { + ULONG ip_supported:1; + ULONG tcp_supported:1; + ULONG tcp_csum:1; + ULONG udp_csum:1; +}; + +struct ndis_task_tcp_ip_checksum { + struct v4_checksum v4_tx; + struct v4_checksum v4_rx; + struct v6_checksum v6_tx; + struct v6_checksum v6_rx; +}; + +struct ndis_task_tcp_large_send { + ULONG version; + ULONG max_size; + ULONG min_seg_count; + BOOLEAN tcp_opts; + BOOLEAN ip_opts; +}; + +struct ndis_packet; + +struct ndis_packet_pool { + struct ndis_packet *free_descr; +// NT_SPIN_LOCK lock; + spinlock_t lock; + UINT max_descr; + UINT num_allocated_descr; + UINT num_used_descr; + UINT proto_rsvd_length; +}; + +struct ndis_packet_stack { + ULONG_PTR IM_reserved[2]; + ULONG_PTR ndis_reserved[4]; +}; + +enum ndis_per_packet_info { + TcpIpChecksumPacketInfo, IpSecPacketInfo, TcpLargeSendPacketInfo, + ClassificationHandlePacketInfo, NdisReserved, + ScatterGatherListPacketInfo, Ieee8021QInfo, OriginalPacketInfo, + PacketCancelId, MaxPerPacketInfo +}; + +struct ndis_packet_extension { + void *info[MaxPerPacketInfo]; +}; + +struct ndis_packet_private { + UINT nr_pages; + UINT len; + ndis_buffer *buffer_head; + ndis_buffer *buffer_tail; + struct ndis_packet_pool *pool; + UINT count; + ULONG flags; + BOOLEAN valid_counts; + UCHAR packet_flags; + USHORT oob_offset; +}; + +struct ndis_packet { + struct ndis_packet_private private; + /* for use by miniport */ + union { + /* for connectionless mininports */ + struct { + UCHAR miniport_reserved[2 * sizeof(void *)]; + UCHAR wrapper_reserved[2 * sizeof(void *)]; + } cl_reserved; + /* for deserialized miniports */ + struct { + UCHAR miniport_reserved_ex[3 * sizeof(void *)]; + UCHAR wrapper_reserved_ex[sizeof(void *)]; + } deserailized_reserved; + struct { + UCHAR mac_reserved[4 * sizeof(void *)]; + } mac_reserved; + }; + ULONG_PTR reserved[2]; + UCHAR protocol_reserved[1]; +}; + +/* OOB data */ +struct ndis_packet_oob_data { + union { + ULONGLONG time_to_tx; + ULONGLONG time_txed; + }; + ULONGLONG time_rxed; + UINT header_size; + UINT media_size; + void *media; + NDIS_STATUS status; + + /* ndiswrapper specific info; extension should be right after + * ndis's oob_data */ + struct ndis_packet_extension ext; + union { + /* used for tx only */ + struct { + struct sk_buff *tx_skb; + union { + struct wrap_tx_sg_list wrap_tx_sg_list; + struct ndis_sg_list *tx_sg_list; + }; + }; + /* used for rx only */ + struct { + unsigned char header[ETH_HLEN]; + unsigned char *look_ahead; + UINT look_ahead_size; + }; + }; +}; + +#define NDIS_PACKET_OOB_DATA(packet) \ + (struct ndis_packet_oob_data *)(((void *)(packet)) + \ + (packet)->private.oob_offset) + +enum ndis_device_pnp_event { + NdisDevicePnPEventQueryRemoved, NdisDevicePnPEventRemoved, + NdisDevicePnPEventSurpriseRemoved, NdisDevicePnPEventQueryStopped, + NdisDevicePnPEventStopped, NdisDevicePnPEventPowerProfileChanged, + NdisDevicePnPEventMaximum +}; + +enum ndis_request_type { + NdisRequestQueryInformation, NdisRequestSetInformation, + NdisRequestQueryStatistics, NdisRequestOpen, NdisRequestClose, + NdisRequestSend, NdisRequestTransferData, NdisRequestReset, + NdisRequestGeneric1, NdisRequestGeneric2, NdisRequestGeneric3, + NdisRequestGeneric4 +}; + +struct ndis_request { + mac_address mac; + enum ndis_request_type request_type; + union data { + struct query_info { + UINT oid; + void *buf; + UINT buf_len; + UINT written; + UINT needed; + } query_info; + struct set_info { + UINT oid; + void *buf; + UINT buf_len; + UINT written; + UINT needed; + } set_info; + } data; +}; + +enum ndis_medium { + NdisMedium802_3, NdisMedium802_5, NdisMediumFddi, NdisMediumWan, + NdisMediumLocalTalk, NdisMediumDix, NdisMediumArcnetRaw, + NdisMediumArcnet878_2, NdisMediumAtm, NdisMediumWirelessWan, + NdisMediumIrda, NdisMediumBpc, NdisMediumCoWan, + NdisMedium1394, NdisMediumMax +}; + +enum ndis_physical_medium { + NdisPhysicalMediumUnspecified, NdisPhysicalMediumWirelessLan, + NdisPhysicalMediumCableModem, NdisPhysicalMediumPhoneLine, + NdisPhysicalMediumPowerLine, NdisPhysicalMediumDSL, + NdisPhysicalMediumFibreChannel, NdisPhysicalMedium1394, + NdisPhysicalMediumWirelessWan, NdisPhysicalMediumMax +}; + +enum ndis_power_state { + NdisDeviceStateUnspecified = 0, + NdisDeviceStateD0, NdisDeviceStateD1, NdisDeviceStateD2, + NdisDeviceStateD3, NdisDeviceStateMaximum +}; + +enum ndis_power_profile { + NdisPowerProfileBattery, NdisPowerProfileAcOnLine +}; + +struct ndis_pm_wakeup_capabilities { + enum ndis_power_state min_magic_packet_wakeup; + enum ndis_power_state min_pattern_wakeup; + enum ndis_power_state min_link_change_wakeup; +}; + +#define NDIS_PNP_WAKE_UP_MAGIC_PACKET 0x00000001 +#define NDIS_PNP_WAKE_UP_PATTERN_MATCH 0x00000002 +#define NDIS_PNP_WAKE_UP_LINK_CHANGE 0x00000004 + +enum net_pnp_event_code { + NetEventSetPower, NetEventQueryPower, NetEventQueryRemoveDevice, + NetEventCancelRemoveDevice, NetEventReconfigure, NetEventBindList, + NetEventBindsComplete, NetEventPnPCapabilities, NetEventMaximum +}; + +struct net_pnp_event { + enum net_pnp_event_code code; + void *buf; + ULONG buf_length; + ULONG_PTR ndis_reserved[4]; + ULONG_PTR transport_reserved[4]; + ULONG_PTR tdi_reserved[4]; + ULONG_PTR tdi_client_reserved[4]; +}; + +struct ndis_pnp_capabilities { + ULONG flags; + struct ndis_pm_wakeup_capabilities wakeup; +}; + +typedef void (*ndis_isr_handler)(BOOLEAN *recognized, BOOLEAN *queue_handler, + void *handle) wstdcall; +typedef void (*ndis_interrupt_handler)(void *ctx) wstdcall; + +struct miniport { + /* NDIS 3.0 */ + UCHAR major_version; + UCHAR minor_version; + USHORT filler; + UINT reserved; + BOOLEAN (*hangcheck)(void *ctx) wstdcall; + void (*disable_interrupt)(void *ctx) wstdcall; + void (*enable_interrupt)(void *ctx) wstdcall; + void (*mp_halt)(void *ctx) wstdcall; + ndis_interrupt_handler handle_interrupt; + NDIS_STATUS (*init)(NDIS_STATUS *error_status, UINT *medium_index, + enum ndis_medium medium[], UINT medium_array_size, + void *handle, void *conf_handle) wstdcall; + ndis_isr_handler isr; + NDIS_STATUS (*queryinfo)(void *ctx, ndis_oid oid, void *buffer, + ULONG buflen, ULONG *written, + ULONG *needed) wstdcall; + void *reconfig; + NDIS_STATUS (*reset)(BOOLEAN *reset_address, void *ctx) wstdcall; + NDIS_STATUS (*send)(void *ctx, struct ndis_packet *packet, + UINT flags) wstdcall; + NDIS_STATUS (*setinfo)(void *ctx, ndis_oid oid, void *buffer, + ULONG buflen, ULONG *written, + ULONG *needed) wstdcall; + NDIS_STATUS (*tx_data)(struct ndis_packet *ndis_packet, + UINT *bytes_txed, void *mp_ctx, void *rx_ctx, + UINT offset, UINT bytes_to_tx) wstdcall; + /* NDIS 4.0 extensions */ + void (*return_packet)(void *ctx, void *packet) wstdcall; + void (*send_packets)(void *ctx, struct ndis_packet **packets, + INT nr_of_packets) wstdcall; + void (*alloc_complete)(void *handle, void *virt, + NDIS_PHY_ADDRESS *phys, + ULONG size, void *ctx) wstdcall; + /* NDIS 5.0 extensions */ + NDIS_STATUS (*co_create_vc)(void *ctx, void *vc_handle, + void *vc_ctx) wstdcall; + NDIS_STATUS (*co_delete_vc)(void *vc_ctx) wstdcall; + NDIS_STATUS (*co_activate_vc)(void *vc_ctx, void *call_params) wstdcall; + NDIS_STATUS (*co_deactivate_vc)(void *vc_ctx) wstdcall; + NDIS_STATUS (*co_send_packets)(void *vc_ctx, void **packets, + UINT nr_of_packets) wstdcall; + NDIS_STATUS (*co_request)(void *ctx, void *vc_ctx, UINT *req) wstdcall; + /* NDIS 5.1 extensions */ + void (*cancel_send_packets)(void *ctx, void *id) wstdcall; + void (*pnp_event_notify)(void *ctx, enum ndis_device_pnp_event event, + void *inf_buf, ULONG inf_buf_len) wstdcall; + void (*shutdown)(void *ctx) wstdcall; + void *reserved1; + void *reserved2; + void *reserved3; + void *reserved4; +}; + +struct ndis_spinlock { + NT_SPIN_LOCK klock; + KIRQL irql; +}; + +union ndis_rw_lock_refcount { + UCHAR cache_line[16]; +}; + +struct ndis_rw_lock { + union { + struct { + NT_SPIN_LOCK klock; + void *context; + }; + UCHAR reserved[16]; + }; + union { + union ndis_rw_lock_refcount ref_count[MAXIMUM_PROCESSORS]; + /* ndiswrapper specific */ + volatile int count; + }; +}; + +struct lock_state { + USHORT state; + KIRQL irql; +}; + +struct ndis_work_item; +typedef void (*NDIS_PROC)(struct ndis_work_item *, void *) wstdcall; + +struct ndis_work_item { + void *ctx; + NDIS_PROC func; + union { + UCHAR reserved[8 * sizeof(void *)]; + /* ndiswrapper specific */ + struct nt_list list; + }; +}; + +struct alloc_shared_mem { + void *ctx; + ULONG size; + BOOLEAN cached; +}; + +struct ndis_mp_block; + +/* this is opaque to drivers, so we can use it as we please */ +struct ndis_mp_interrupt { + struct kinterrupt *kinterrupt; + NT_SPIN_LOCK lock; + union { + void *reserved; + unsigned int irq; + }; + ndis_isr_handler isr; + ndis_interrupt_handler mp_dpc; + struct kdpc intr_dpc; + struct ndis_mp_block *nmb; + UCHAR dpc_count; + BOOLEAN enable; + struct nt_event dpc_completed_event; + BOOLEAN shared; + BOOLEAN req_isr; +}; + +struct ndis_binary_data { + USHORT len; + void *buf; +}; + +enum ndis_parameter_type { + NdisParameterInteger, NdisParameterHexInteger, + NdisParameterString, NdisParameterMultiString, NdisParameterBinary, +}; + +typedef struct unicode_string NDIS_STRING; + +struct ndis_configuration_parameter { + enum ndis_parameter_type type; + union { + ULONG integer; + NDIS_STRING string; + } data; +}; + +struct ndis_driver { + struct miniport mp; +}; + +/* IDs used to store extensions in driver_object's custom extension */ +#define NDIS_DRIVER_CLIENT_ID 10 + +struct ndis_wireless_stats { + ULONG length; + LARGE_INTEGER tx_frag; + LARGE_INTEGER tx_multi_frag; + LARGE_INTEGER failed; + LARGE_INTEGER retry; + LARGE_INTEGER multi_retry; + LARGE_INTEGER rtss_succ; + LARGE_INTEGER rtss_fail; + LARGE_INTEGER ack_fail; + LARGE_INTEGER frame_dup; + LARGE_INTEGER rx_frag; + LARGE_INTEGER rx_multi_frag; + LARGE_INTEGER fcs_err; + LARGE_INTEGER tkip_local_mic_failures; + LARGE_INTEGER tkip_icv_errors; + LARGE_INTEGER tkip_counter_measures_invoked; + LARGE_INTEGER tkip_replays; + LARGE_INTEGER ccmp_format_errors; + LARGE_INTEGER ccmp_replays; + LARGE_INTEGER ccmp_decrypt_errors; + LARGE_INTEGER fourway_handshake_failures; + LARGE_INTEGER wep_undecryptable_count; + LARGE_INTEGER wep_icv_errorcount; + LARGE_INTEGER decrypt_success_count; + LARGE_INTEGER decrypt_failure_count; +}; + +enum ndis_status_type { + Ndis802_11StatusType_Authentication, + Ndis802_11StatusType_MediaStreamMode, + Ndis802_11StatusType_PMKID_CandidateList, + Ndis802_11StatusType_RadioState, +}; + +struct ndis_status_indication { + enum ndis_status_type status_type; +}; + +enum ndis_radio_status { + Ndis802_11RadioStatusOn, Ndis802_11RadioStatusHardwareOff, + Ndis802_11RadioStatusSoftwareOff, +}; + +struct ndis_radio_status_indication +{ + enum ndis_status_type status_type; + enum ndis_radio_status radio_state; +}; + +enum ndis_media_state { + NdisMediaStateConnected, + NdisMediaStateDisconnected, +}; + +enum ndis_media_stream_mode { + Ndis802_11MediaStreamOff, Ndis802_11MediaStreamOn +}; + +enum wrapper_work { + LINK_STATUS_OFF, LINK_STATUS_ON, SET_MULTICAST_LIST, COLLECT_IW_STATS, + HANGCHECK, NETIF_WAKEQ, +}; + +struct encr_info { + struct encr_key { + ULONG length; + UCHAR key[NDIS_ENCODING_TOKEN_MAX]; + } keys[MAX_ENCR_KEYS]; + unsigned short tx_key_index; +}; + +struct ndis_essid { + ULONG length; + UCHAR essid[NDIS_ESSID_MAX_SIZE]; +}; + +enum ndis_infrastructure_mode { + Ndis802_11IBSS, Ndis802_11Infrastructure, Ndis802_11AutoUnknown, + Ndis802_11InfrastructureMax +}; + +enum authentication_mode { + Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared, + Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA, + Ndis802_11AuthModeWPAPSK, Ndis802_11AuthModeWPANone, + Ndis802_11AuthModeWPA2, Ndis802_11AuthModeWPA2PSK, + Ndis802_11AuthModeMax +}; + +enum encryption_status { + Ndis802_11WEPEnabled, + Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, + Ndis802_11WEPDisabled, + Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, + Ndis802_11WEPKeyAbsent, + Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, + Ndis802_11WEPNotSupported, + Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, + Ndis802_11Encryption2Enabled, Ndis802_11Encryption2KeyAbsent, + Ndis802_11Encryption3Enabled, Ndis802_11Encryption3KeyAbsent +}; + +struct ndis_auth_encr_pair { + enum authentication_mode auth_mode; + enum encryption_status encr_mode; +}; + +struct ndis_capability { + ULONG length; + ULONG version; + ULONG num_PMKIDs; + ULONG num_auth_encr_pair; + struct ndis_auth_encr_pair auth_encr_pair[1]; +}; + +struct ndis_guid { + struct guid guid; + union { + ndis_oid oid; + NDIS_STATUS status; + }; + ULONG size; + ULONG flags; +}; + +struct ndis_timer { + struct nt_timer nt_timer; + struct kdpc kdpc; +}; + +struct ndis_mp_timer { + struct nt_timer nt_timer; + struct kdpc kdpc; + DPC func; + void *ctx; + struct ndis_mp_block *nmb; + struct ndis_mp_timer *next; +}; + +typedef struct cm_partial_resource_list NDIS_RESOURCE_LIST; + +struct ndis_event { + struct nt_event nt_event; +}; + +struct ndis_bind_paths { + UINT number; + struct unicode_string paths[1]; +}; + +struct ndis_reference { + NT_SPIN_LOCK lock; + USHORT ref_count; + BOOLEAN closing; +}; + +struct ndis_filterdbs { + union { + void *eth_db; + void *null_db; + }; + void *tr_db; + void *fddi_db; + void *arc_db; +}; + +enum ndis_interface_type { + NdisInterfaceInternal, NdisInterfaceIsa, NdisInterfaceEisa, + NdisInterfaceMca, NdisInterfaceTurboChannel, NdisInterfacePci, + NdisInterfacePcMcia, +}; + +struct auth_encr_capa { + unsigned long auth; + unsigned long encr; +}; + +struct ndis_pmkid_candidate { + mac_address bssid; + DWORD flags; +}; + +struct ndis_pmkid_candidate_list { + ULONG version; + ULONG num_candidates; + struct ndis_pmkid_candidate candidates[1]; +}; + +/* + * This struct contains function pointers that the drivers references + * directly via macros, so it's important that they are at the correct + * position. + */ +struct ndis_mp_block { + void *signature; + struct ndis_mp_block *next; + struct driver_object *drv_obj; + void *mp_ctx; + struct unicode_string name; + struct ndis_bind_paths *bindpaths; + void *openqueue; + struct ndis_reference reference; + void *device_ctx; + UCHAR padding; + UCHAR lock_acquired; + UCHAR pmode_opens; + UCHAR assigned_cpu; + NT_SPIN_LOCK lock; + enum ndis_request_type *mediarequest; + struct ndis_mp_interrupt *interrupt; + ULONG flags; + ULONG pnp_flags; + struct nt_list packet_list; + struct ndis_packet *first_pending_tx_packet; + struct ndis_packet *return_packet_queue; + ULONG request_buffer; + void *set_mcast_buffer; + struct ndis_mp_block *primary_mp; + void *wrapper_ctx; + void *bus_data_ctx; + ULONG pnp_capa; + void *resources; + struct ndis_timer wakeup_dpc_timer; + struct unicode_string basename; + struct unicode_string symlink_name; + ULONG ndis_hangcheck_interval; + USHORT hanghcheck_ticks; + USHORT hangcheck_tick; + NDIS_STATUS ndis_reset_status; + void *resetopen; + struct ndis_filterdbs filterdbs; + void *rx_packet; + void *send_complete; + void *send_resource_avail; + void *reset_complete; + + enum ndis_medium media_type; + ULONG bus_number; + enum ndis_interface_type bus_type; + enum ndis_interface_type adapter_type; + struct device_object *fdo; + struct device_object *pdo; + struct device_object *next_device; + void *mapreg; + void *call_mgraflist; + void *mp_thread; + void *setinfobuf; + USHORT setinfo_buf_len; + USHORT max_send_pkts; + NDIS_STATUS fake_status; + void *lock_handler; + struct unicode_string *adapter_instance_name; + void *timer_queue; + UINT mac_options; + void *pending_req; + UINT max_long_addrs; + UINT max_short_addrs; + UINT cur_lookahead; + UINT max_lookahead; + + ndis_interrupt_handler irq_bh; + void *disable_intr; + void *enable_intr; + void *send_pkts; + void *deferred_send; + void *eth_rx_indicate; + void *tr_rx_indicate; + void *fddi_rx_indicate; + void *eth_rx_complete; + void *tr_rx_complete; + void *fddi_rx_complete; + + void *status; + void *status_complete; + void *td_complete; + + void *queryinfo_complete; + void *setinfo_complete; + void *wan_tx_complete; + void *wan_rx; + void *wan_rx_complete; + /* ndiswrapper specific */ + struct ndis_device *wnd; +}; + +struct ndis_device { + struct ndis_mp_block *nmb; + struct wrap_device *wd; + struct net_device *net_dev; + void *shutdown_ctx; + struct ndis_mp_interrupt *mp_interrupt; + struct kdpc irq_kdpc; + unsigned long mem_start; + unsigned long mem_end; + + struct net_device_stats net_stats; + struct iw_statistics iw_stats; + BOOLEAN iw_stats_enabled; + struct ndis_wireless_stats ndis_stats; + + work_struct_t tx_work; + struct ndis_packet *tx_ring[TX_RING_SIZE]; + u8 tx_ring_start; + u8 tx_ring_end; + u8 is_tx_ring_full; + u8 tx_ok; + spinlock_t tx_ring_lock; + struct semaphore tx_ring_mutex; + unsigned int max_tx_packets; + struct semaphore ndis_req_mutex; + struct task_struct *ndis_req_task; + int ndis_req_done; + NDIS_STATUS ndis_req_status; + ULONG packet_filter; + + ULONG sg_dma_size; + ULONG dma_map_count; + dma_addr_t *dma_map_addr; + + int hangcheck_interval; + struct timer_list hangcheck_timer; + int iw_stats_interval; + struct timer_list iw_stats_timer; + unsigned long scan_timestamp; + struct encr_info encr_info; + char nick[IW_ESSID_MAX_SIZE + 1]; + struct ndis_essid essid; + struct auth_encr_capa capa; + enum ndis_infrastructure_mode infrastructure_mode; + int max_pmkids; + int num_pmkids; + struct ndis_pmkid *pmkids; + mac_address mac; + struct proc_dir_entry *procfs_iface; + + work_struct_t ndis_work; + unsigned long ndis_pending_work; + UINT attributes; + int iw_auth_wpa_version; + int iw_auth_cipher_pairwise; + int iw_auth_cipher_group; + int iw_auth_key_mgmt; + int iw_auth_80211_alg; + struct ndis_packet_pool *tx_packet_pool; + struct ndis_buffer_pool *tx_buffer_pool; + int multicast_size; + struct v4_checksum rx_csum; + struct v4_checksum tx_csum; + enum ndis_physical_medium physical_medium; + ULONG ndis_wolopts; + struct nt_slist wrap_timer_slist; + int drv_ndis_version; + struct ndis_pnp_capabilities pnp_capa; + char netdev_name[IFNAMSIZ]; +}; + +BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx) wstdcall; + +int ndis_init(void); +void ndis_exit(void); +int ndis_init_device(struct ndis_device *wnd); +void ndis_exit_device(struct ndis_device *wnd); + +int wrap_procfs_add_ndis_device(struct ndis_device *wnd); +void wrap_procfs_remove_ndis_device(struct ndis_device *wnd); + +void NdisAllocatePacketPoolEx(NDIS_STATUS *status, + struct ndis_packet_pool **pool_handle, + UINT num_descr, UINT overflowsize, + UINT proto_rsvd_length) wstdcall; +void NdisFreePacketPool(struct ndis_packet_pool *pool) wstdcall; +void NdisAllocatePacket(NDIS_STATUS *status, struct ndis_packet **packet, + struct ndis_packet_pool *pool) wstdcall; +void NdisFreePacket(struct ndis_packet *descr) wstdcall; +void NdisAllocateBufferPool(NDIS_STATUS *status, + struct ndis_buffer_pool **pool_handle, + UINT num_descr) wstdcall; +void NdisFreeBufferPool(struct ndis_buffer_pool *pool) wstdcall; +void NdisAllocateBuffer(NDIS_STATUS *status, ndis_buffer **buffer, + struct ndis_buffer_pool *pool, void *virt, + UINT length) wstdcall; +void NdisFreeBuffer(ndis_buffer *descr) wstdcall; +void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb, + struct ndis_packet **packets, + UINT nr_packets) wstdcall; +void NdisMSendComplete(struct ndis_mp_block *nmb, struct ndis_packet *packet, + NDIS_STATUS status) wstdcall; +void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb) wstdcall; +void NdisMIndicateStatus(struct ndis_mp_block *nmb, + NDIS_STATUS status, void *buf, UINT len) wstdcall; +void NdisMIndicateStatusComplete(struct ndis_mp_block *nmb) wstdcall; +void NdisMQueryInformationComplete(struct ndis_mp_block *nmb, + NDIS_STATUS status) wstdcall; +void NdisMSetInformationComplete(struct ndis_mp_block *nmb, + NDIS_STATUS status) wstdcall; +void NdisMResetComplete(struct ndis_mp_block *nmb, NDIS_STATUS status, + BOOLEAN address_reset) wstdcall; +ULONG NDIS_BUFFER_TO_SPAN_PAGES(ndis_buffer *buffer) wstdcall; +BOOLEAN NdisWaitEvent(struct ndis_event *event, UINT timeout) wstdcall; +void NdisSetEvent(struct ndis_event *event) wstdcall; +void NdisMDeregisterInterrupt(struct ndis_mp_interrupt *mp_interrupt) wstdcall; +void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx, + char *header1, char *header, UINT header_size, + void *look_ahead, UINT look_ahead_size, + UINT packet_size) wstdcall; +void EthRxComplete(struct ndis_mp_block *nmb) wstdcall; +void NdisMTransferDataComplete(struct ndis_mp_block *nmb, + struct ndis_packet *packet, NDIS_STATUS status, + UINT bytes_txed) wstdcall; +void NdisWriteConfiguration(NDIS_STATUS *status, struct ndis_mp_block *nmb, + struct unicode_string *key, + struct ndis_configuration_parameter *param) wstdcall; +void NdisReadConfiguration(NDIS_STATUS *status, + struct ndis_configuration_parameter **param, + struct ndis_mp_block *nmb, + struct unicode_string *key, + enum ndis_parameter_type type) wstdcall; + +/* Required OIDs */ +#define OID_GEN_SUPPORTED_LIST 0x00010101 +#define OID_GEN_HARDWARE_STATUS 0x00010102 +#define OID_GEN_MEDIA_SUPPORTED 0x00010103 +#define OID_GEN_MEDIA_IN_USE 0x00010104 +#define OID_GEN_MAXIMUM_LOOKAHEAD 0x00010105 +#define OID_GEN_MAXIMUM_FRAME_SIZE 0x00010106 +#define OID_GEN_LINK_SPEED 0x00010107 +#define OID_GEN_TRANSMIT_BUFFER_SPACE 0x00010108 +#define OID_GEN_RECEIVE_BUFFER_SPACE 0x00010109 +#define OID_GEN_TRANSMIT_BLOCK_SIZE 0x0001010A +#define OID_GEN_RECEIVE_BLOCK_SIZE 0x0001010B +#define OID_GEN_VENDOR_ID 0x0001010C +#define OID_GEN_VENDOR_DESCRIPTION 0x0001010D +#define OID_GEN_CURRENT_PACKET_FILTER 0x0001010E +#define OID_GEN_CURRENT_LOOKAHEAD 0x0001010F +#define OID_GEN_DRIVER_VERSION 0x00010110 +#define OID_GEN_MAXIMUM_TOTAL_SIZE 0x00010111 +#define OID_GEN_PROTOCOL_OPTIONS 0x00010112 +#define OID_GEN_MAC_OPTIONS 0x00010113 +#define OID_GEN_MEDIA_CONNECT_STATUS 0x00010114 +#define OID_GEN_MAXIMUM_SEND_PACKETS 0x00010115 +#define OID_GEN_VENDOR_DRIVER_VERSION 0x00010116 +#define OID_GEN_SUPPORTED_GUIDS 0x00010117 +#define OID_GEN_NETWORK_LAYER_ADDRESSES 0x00010118 /* Set only */ +#define OID_GEN_TRANSPORT_HEADER_OFFSET 0x00010119 /* Set only */ +#define OID_GEN_MACHINE_NAME 0x0001021A +#define OID_GEN_RNDIS_CONFIG_PARAMETER 0x0001021B /* Set only */ +#define OID_GEN_VLAN_ID 0x0001021C + +/* Optional OIDs. */ +#define OID_GEN_MEDIA_CAPABILITIES 0x00010201 +#define OID_GEN_PHYSICAL_MEDIUM 0x00010202 + +/* Required statistics OIDs. */ +#define OID_GEN_XMIT_OK 0x00020101 +#define OID_GEN_RCV_OK 0x00020102 +#define OID_GEN_XMIT_ERROR 0x00020103 +#define OID_GEN_RCV_ERROR 0x00020104 +#define OID_GEN_RCV_NO_BUFFER 0x00020105 + +/* Optional OID statistics */ +#define OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 +#define OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202 +#define OID_GEN_MULTICAST_BYTES_XMIT 0x00020203 +#define OID_GEN_MULTICAST_FRAMES_XMIT 0x00020204 +#define OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 +#define OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206 +#define OID_GEN_DIRECTED_BYTES_RCV 0x00020207 +#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208 +#define OID_GEN_MULTICAST_BYTES_RCV 0x00020209 +#define OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A +#define OID_GEN_BROADCAST_BYTES_RCV 0x0002020B +#define OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C +#define OID_GEN_RCV_CRC_ERROR 0x0002020D +#define OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E +#define OID_GEN_GET_TIME_CAPS 0x0002020F +#define OID_GEN_GET_NETCARD_TIME 0x00020210 +#define OID_GEN_NETCARD_LOAD 0x00020211 +#define OID_GEN_DEVICE_PROFILE 0x00020212 + +/* 802.3 (ethernet) OIDs */ +#define OID_802_3_PERMANENT_ADDRESS 0x01010101 +#define OID_802_3_CURRENT_ADDRESS 0x01010102 +#define OID_802_3_MULTICAST_LIST 0x01010103 +#define OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 +#define OID_802_3_MAC_OPTIONS 0x01010105 +#define NDIS_802_3_MAC_OPTION_PRIORITY 0x00000001 +#define OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101 +#define OID_802_3_XMIT_ONE_COLLISION 0x01020102 +#define OID_802_3_XMIT_MORE_COLLISIONS 0x01020103 +#define OID_802_3_XMIT_DEFERRED 0x01020201 +#define OID_802_3_XMIT_MAX_COLLISIONS 0x01020202 +#define OID_802_3_RCV_OVERRUN 0x01020203 +#define OID_802_3_XMIT_UNDERRUN 0x01020204 +#define OID_802_3_XMIT_HEARTBEAT_FAILURE 0x01020205 +#define OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206 +#define OID_802_3_XMIT_LATE_COLLISIONS 0x01020207 + +/* PnP and power management OIDs */ +#define OID_PNP_CAPABILITIES 0xFD010100 +#define OID_PNP_SET_POWER 0xFD010101 +#define OID_PNP_QUERY_POWER 0xFD010102 +#define OID_PNP_ADD_WAKE_UP_PATTERN 0xFD010103 +#define OID_PNP_REMOVE_WAKE_UP_PATTERN 0xFD010104 +#define OID_PNP_WAKE_UP_PATTERN_LIST 0xFD010105 +#define OID_PNP_ENABLE_WAKE_UP 0xFD010106 + +/* PnP/PM Statistics (Optional). */ +#define OID_PNP_WAKE_UP_OK 0xFD020200 +#define OID_PNP_WAKE_UP_ERROR 0xFD020201 + +/* The following bits are defined for OID_PNP_ENABLE_WAKE_UP */ +#define NDIS_PNP_WAKE_UP_MAGIC_PACKET 0x00000001 +#define NDIS_PNP_WAKE_UP_PATTERN_MATCH 0x00000002 +#define NDIS_PNP_WAKE_UP_LINK_CHANGE 0x00000004 + +/* 802.11 OIDs */ +#define OID_802_11_BSSID 0x0D010101 +#define OID_802_11_SSID 0x0D010102 +#define OID_802_11_NETWORK_TYPES_SUPPORTED 0x0D010203 +#define OID_802_11_NETWORK_TYPE_IN_USE 0x0D010204 +#define OID_802_11_TX_POWER_LEVEL 0x0D010205 +#define OID_802_11_RSSI 0x0D010206 +#define OID_802_11_RSSI_TRIGGER 0x0D010207 +#define OID_802_11_INFRASTRUCTURE_MODE 0x0D010108 +#define OID_802_11_FRAGMENTATION_THRESHOLD 0x0D010209 +#define OID_802_11_RTS_THRESHOLD 0x0D01020A +#define OID_802_11_NUMBER_OF_ANTENNAS 0x0D01020B +#define OID_802_11_RX_ANTENNA_SELECTED 0x0D01020C +#define OID_802_11_TX_ANTENNA_SELECTED 0x0D01020D +#define OID_802_11_SUPPORTED_RATES 0x0D01020E +#define OID_802_11_DESIRED_RATES 0x0D010210 +#define OID_802_11_CONFIGURATION 0x0D010211 +#define OID_802_11_STATISTICS 0x0D020212 +#define OID_802_11_ADD_WEP 0x0D010113 +#define OID_802_11_REMOVE_WEP 0x0D010114 +#define OID_802_11_DISASSOCIATE 0x0D010115 +#define OID_802_11_POWER_MODE 0x0D010216 +#define OID_802_11_BSSID_LIST 0x0D010217 +#define OID_802_11_AUTHENTICATION_MODE 0x0D010118 +#define OID_802_11_PRIVACY_FILTER 0x0D010119 +#define OID_802_11_BSSID_LIST_SCAN 0x0D01011A +#define OID_802_11_WEP_STATUS 0x0D01011B +#define OID_802_11_ENCRYPTION_STATUS OID_802_11_WEP_STATUS +#define OID_802_11_RELOAD_DEFAULTS 0x0D01011C +#define OID_802_11_ADD_KEY 0x0D01011D +#define OID_802_11_REMOVE_KEY 0x0D01011E +#define OID_802_11_ASSOCIATION_INFORMATION 0x0D01011F +#define OID_802_11_TEST 0x0D010120 +#define OID_802_11_MEDIA_STREAM_MODE 0x0D010121 +#define OID_802_11_CAPABILITY 0x0D010122 +#define OID_802_11_PMKID 0x0D010123 + +#define NDIS_STATUS_SUCCESS 0 +#define NDIS_STATUS_PENDING 0x00000103 +#define NDIS_STATUS_NOT_RECOGNIZED 0x00010001 +#define NDIS_STATUS_NOT_COPIED 0x00010002 +#define NDIS_STATUS_NOT_ACCEPTED 0x00010003 +#define NDIS_STATUS_CALL_ACTIVE 0x00010007 +#define NDIS_STATUS_ONLINE 0x40010003 +#define NDIS_STATUS_RESET_START 0x40010004 +#define NDIS_STATUS_RESET_END 0x40010005 +#define NDIS_STATUS_RING_STATUS 0x40010006 +#define NDIS_STATUS_CLOSED 0x40010007 +#define NDIS_STATUS_WAN_LINE_UP 0x40010008 +#define NDIS_STATUS_WAN_LINE_DOWN 0x40010009 +#define NDIS_STATUS_WAN_FRAGMENT 0x4001000A +#define NDIS_STATUS_MEDIA_CONNECT 0x4001000B +#define NDIS_STATUS_MEDIA_DISCONNECT 0x4001000C +#define NDIS_STATUS_HARDWARE_LINE_UP 0x4001000D +#define NDIS_STATUS_HARDWARE_LINE_DOWN 0x4001000E +#define NDIS_STATUS_INTERFACE_UP 0x4001000F +#define NDIS_STATUS_INTERFACE_DOWN 0x40010010 +#define NDIS_STATUS_MEDIA_BUSY 0x40010011 +#define NDIS_STATUS_MEDIA_SPECIFIC_INDICATION 0x40010012 +#define NDIS_STATUS_WW_INDICATION NDIS_STATUS_MEDIA_SPECIFIC_INDICATION +#define NDIS_STATUS_LINK_SPEED_CHANGE 0x40010013 +#define NDIS_STATUS_WAN_GET_STATS 0x40010014 +#define NDIS_STATUS_WAN_CO_FRAGMENT 0x40010015 +#define NDIS_STATUS_WAN_CO_LINKPARAMS 0x40010016 +#define NDIS_STATUS_NOT_RESETTABLE 0x80010001 +#define NDIS_STATUS_SOFT_ERRORS 0x80010003 +#define NDIS_STATUS_HARD_ERRORS 0x80010004 +#define NDIS_STATUS_BUFFER_OVERFLOW 0x80000005 +#define NDIS_STATUS_FAILURE 0xC0000001 +#define NDIS_STATUS_INVALID_PARAMETER 0xC000000D +#define NDIS_STATUS_RESOURCES 0xC000009A +#define NDIS_STATUS_CLOSING 0xC0010002 +#define NDIS_STATUS_BAD_VERSION 0xC0010004 +#define NDIS_STATUS_BAD_CHARACTERISTICS 0xC0010005 +#define NDIS_STATUS_ADAPTER_NOT_FOUND 0xC0010006 +#define NDIS_STATUS_OPEN_FAILED 0xC0010007 +#define NDIS_STATUS_DEVICE_FAILED 0xC0010008 +#define NDIS_STATUS_MULTICAST_FULL 0xC0010009 +#define NDIS_STATUS_MULTICAST_EXISTS 0xC001000A +#define NDIS_STATUS_MULTICAST_NOT_FOUND 0xC001000B +#define NDIS_STATUS_REQUEST_ABORTED 0xC001000C +#define NDIS_STATUS_RESET_IN_PROGRESS 0xC001000D +#define NDIS_STATUS_CLOSING_INDICATING 0xC001000E +#define NDIS_STATUS_BAD_VERSION 0xC0010004 +#define NDIS_STATUS_NOT_SUPPORTED 0xC00000BB +#define NDIS_STATUS_INVALID_PACKET 0xC001000F +#define NDIS_STATUS_OPEN_LIST_FULL 0xC0010010 +#define NDIS_STATUS_ADAPTER_NOT_READY 0xC0010011 +#define NDIS_STATUS_ADAPTER_NOT_OPEN 0xC0010012 +#define NDIS_STATUS_NOT_INDICATING 0xC0010013 +#define NDIS_STATUS_INVALID_LENGTH 0xC0010014 +#define NDIS_STATUS_INVALID_DATA 0xC0010015 +#define NDIS_STATUS_BUFFER_TOO_SHORT 0xC0010016 +#define NDIS_STATUS_INVALID_OID 0xC0010017 +#define NDIS_STATUS_ADAPTER_REMOVED 0xC0010018 +#define NDIS_STATUS_UNSUPPORTED_MEDIA 0xC0010019 +#define NDIS_STATUS_GROUP_ADDRESS_IN_USE 0xC001001A +#define NDIS_STATUS_FILE_NOT_FOUND 0xC001001B +#define NDIS_STATUS_ERROR_READING_FILE 0xC001001C +#define NDIS_STATUS_ALREADY_MAPPED 0xC001001D +#define NDIS_STATUS_RESOURCE_CONFLICT 0xC001001E +#define NDIS_STATUS_NO_CABLE 0xC001001F +#define NDIS_STATUS_INVALID_SAP 0xC0010020 +#define NDIS_STATUS_SAP_IN_USE 0xC0010021 +#define NDIS_STATUS_INVALID_ADDRESS 0xC0010022 +#define NDIS_STATUS_VC_NOT_ACTIVATED 0xC0010023 +#define NDIS_STATUS_DEST_OUT_OF_ORDER 0xC0010024 +#define NDIS_STATUS_VC_NOT_AVAILABLE 0xC0010025 +#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE 0xC0010026 +#define NDIS_STATUS_INCOMPATABLE_QOS 0xC0010027 +#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED 0xC0010028 +#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION 0xC0010029 +#define NDIS_STATUS_TOKEN_RING_OPEN_ERROR 0xC0011000 +#define NDIS_STATUS_INVALID_DEVICE_REQUEST 0xC0000010 +#define NDIS_STATUS_NETWORK_UNREACHABLE 0xC000023C + +/* Event codes */ + +#define EVENT_NDIS_RESOURCE_CONFLICT 0xC0001388 +#define EVENT_NDIS_OUT_OF_RESOURCE 0xC0001389 +#define EVENT_NDIS_HARDWARE_FAILURE 0xC000138A +#define EVENT_NDIS_ADAPTER_NOT_FOUND 0xC000138B +#define EVENT_NDIS_INTERRUPT_CONNECT 0xC000138C +#define EVENT_NDIS_DRIVER_FAILURE 0xC000138D +#define EVENT_NDIS_BAD_VERSION 0xC000138E +#define EVENT_NDIS_TIMEOUT 0x8000138F +#define EVENT_NDIS_NETWORK_ADDRESS 0xC0001390 +#define EVENT_NDIS_UNSUPPORTED_CONFIGURATION 0xC0001391 +#define EVENT_NDIS_INVALID_VALUE_FROM_ADAPTER 0xC0001392 +#define EVENT_NDIS_MISSING_CONFIGURATION_PARAMETER 0xC0001393 +#define EVENT_NDIS_BAD_IO_BASE_ADDRESS 0xC0001394 +#define EVENT_NDIS_RECEIVE_SPACE_SMALL 0x40001395 +#define EVENT_NDIS_ADAPTER_DISABLED 0x80001396 +#define EVENT_NDIS_IO_PORT_CONFLICT 0x80001397 +#define EVENT_NDIS_PORT_OR_DMA_CONFLICT 0x80001398 +#define EVENT_NDIS_MEMORY_CONFLICT 0x80001399 +#define EVENT_NDIS_INTERRUPT_CONFLICT 0x8000139A +#define EVENT_NDIS_DMA_CONFLICT 0x8000139B +#define EVENT_NDIS_INVALID_DOWNLOAD_FILE_ERROR 0xC000139C +#define EVENT_NDIS_MAXRECEIVES_ERROR 0x8000139D +#define EVENT_NDIS_MAXTRANSMITS_ERROR 0x8000139E +#define EVENT_NDIS_MAXFRAMESIZE_ERROR 0x8000139F +#define EVENT_NDIS_MAXINTERNALBUFS_ERROR 0x800013A0 +#define EVENT_NDIS_MAXMULTICAST_ERROR 0x800013A1 +#define EVENT_NDIS_PRODUCTID_ERROR 0x800013A2 +#define EVENT_NDIS_LOBE_FAILUE_ERROR 0x800013A3 +#define EVENT_NDIS_SIGNAL_LOSS_ERROR 0x800013A4 +#define EVENT_NDIS_REMOVE_RECEIVED_ERROR 0x800013A5 +#define EVENT_NDIS_TOKEN_RING_CORRECTION 0x400013A6 +#define EVENT_NDIS_ADAPTER_CHECK_ERROR 0xC00013A7 +#define EVENT_NDIS_RESET_FAILURE_ERROR 0x800013A8 +#define EVENT_NDIS_CABLE_DISCONNECTED_ERROR 0x800013A9 +#define EVENT_NDIS_RESET_FAILURE_CORRECTION 0x800013AA + +/* packet filter bits used by NDIS_OID_PACKET_FILTER */ +#define NDIS_PACKET_TYPE_DIRECTED 0x00000001 +#define NDIS_PACKET_TYPE_MULTICAST 0x00000002 +#define NDIS_PACKET_TYPE_ALL_MULTICAST 0x00000004 +#define NDIS_PACKET_TYPE_BROADCAST 0x00000008 +#define NDIS_PACKET_TYPE_SOURCE_ROUTING 0x00000010 +#define NDIS_PACKET_TYPE_PROMISCUOUS 0x00000020 +#define NDIS_PACKET_TYPE_SMT 0x00000040 +#define NDIS_PACKET_TYPE_ALL_LOCAL 0x00000080 +#define NDIS_PACKET_TYPE_GROUP 0x00001000 +#define NDIS_PACKET_TYPE_ALL_FUNCTIONAL 0x00002000 +#define NDIS_PACKET_TYPE_FUNCTIONAL 0x00004000 +#define NDIS_PACKET_TYPE_MAC_FRAME 0x00008000 + +/* memory allocation flags */ +#define NDIS_MEMORY_CONTIGUOUS 0x00000001 +#define NDIS_MEMORY_NONCACHED 0x00000002 + +/* Atrribute flags to NdisMSetAtrributesEx */ +#define NDIS_ATTRIBUTE_IGNORE_PACKET_TIMEOUT 0x00000001 +#define NDIS_ATTRIBUTE_IGNORE_REQUEST_TIMEOUT 0x00000002 +#define NDIS_ATTRIBUTE_IGNORE_TOKEN_RING_ERRORS 0x00000004 +#define NDIS_ATTRIBUTE_BUS_MASTER 0x00000008 +#define NDIS_ATTRIBUTE_INTERMEDIATE_DRIVER 0x00000010 +#define NDIS_ATTRIBUTE_DESERIALIZE 0x00000020 +#define NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND 0x00000040 +#define NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK 0x00000080 +#define NDIS_ATTRIBUTE_NOT_CO_NDIS 0x00000100 +#define NDIS_ATTRIBUTE_USES_SAFE_BUFFER_APIS 0x00000200 + +#define OID_TCP_TASK_OFFLOAD 0xFC010201 + +#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA 0x00000001 +#define NDIS_MAC_OPTION_RECEIVE_SERIALIZED 0x00000002 +#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND 0x00000004 +#define NDIS_MAC_OPTION_NO_LOOPBACK 0x00000008 +#define NDIS_MAC_OPTION_FULL_DUPLEX 0x00000010 +#define NDIS_MAC_OPTION_EOTX_INDICATION 0x00000020 +#define NDIS_MAC_OPTION_8021P_PRIORITY 0x00000040 +#define NDIS_MAC_OPTION_SUPPORTS_MAC_ADDRESS_OVERWRITE 0x00000080 +#define NDIS_MAC_OPTION_RECEIVE_AT_DPC 0x00000100 +#define NDIS_MAC_OPTION_8021Q_VLAN 0x00000200 +#define NDIS_MAC_OPTION_RESERVED 0x80000000 + +#define deserialized_driver(wnd) (wnd->attributes & NDIS_ATTRIBUTE_DESERIALIZE) + +static inline void serialize_lock(struct ndis_device *wnd) +{ + nt_spin_lock(&wnd->nmb->lock); +} + +static inline void serialize_unlock(struct ndis_device *wnd) +{ + nt_spin_unlock(&wnd->nmb->lock); +} + +static inline KIRQL serialize_lock_irql(struct ndis_device *wnd) +{ + if (deserialized_driver(wnd)) + return raise_irql(DISPATCH_LEVEL); + else + return nt_spin_lock_irql(&wnd->nmb->lock, DISPATCH_LEVEL); +} + +static inline void serialize_unlock_irql(struct ndis_device *wnd, + KIRQL irql) +{ + if (deserialized_driver(wnd)) + lower_irql(irql); + else + nt_spin_unlock_irql(&wnd->nmb->lock, irql); +} + +static inline void if_serialize_lock(struct ndis_device *wnd) +{ + if (!deserialized_driver(wnd)) + nt_spin_lock(&wnd->nmb->lock); +} + +static inline void if_serialize_unlock(struct ndis_device *wnd) +{ + if (!deserialized_driver(wnd)) + nt_spin_unlock(&wnd->nmb->lock); +} + +#endif /* NDIS_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/ntoskernel.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/ntoskernel.c @@ -0,0 +1,2683 @@ +/* + * Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include "ntoskernel.h" +#include "ndis.h" +#include "usb.h" +#include "pnp.h" +#include "loader.h" +#include "ntoskernel_exports.h" + +/* MDLs describe a range of virtual address with an array of physical + * pages right after the header. For different ranges of virtual + * addresses, the number of entries of physical pages may be different + * (depending on number of entries required). If we want to allocate + * MDLs from a pool, the size has to be constant. So we assume that + * maximum range used by a driver is MDL_CACHE_PAGES; if a driver + * requests an MDL for a bigger region, we allocate it with kmalloc; + * otherwise, we allocate from the pool */ + +#define MDL_CACHE_PAGES 3 +#define MDL_CACHE_SIZE (sizeof(struct mdl) + \ + (sizeof(PFN_NUMBER) * MDL_CACHE_PAGES)) +struct wrap_mdl { + struct nt_list list; + struct mdl mdl[0]; +}; + +/* everything here is for all drivers/devices - not per driver/device */ +static spinlock_t dispatcher_lock; +spinlock_t ntoskernel_lock; +static void *mdl_cache; +static struct nt_list wrap_mdl_list; + +static work_struct_t kdpc_work; +static void kdpc_worker(worker_param_t dummy); + +static struct nt_list kdpc_list; +static spinlock_t kdpc_list_lock; + +static struct nt_list callback_objects; + +struct nt_list object_list; + +struct bus_driver { + struct nt_list list; + char name[MAX_DRIVER_NAME_LEN]; + struct driver_object drv_obj; +}; + +static struct nt_list bus_driver_list; + +static work_struct_t ntos_work; +static struct nt_list ntos_work_list; +static spinlock_t ntos_work_lock; +static void ntos_work_worker(worker_param_t dummy); +static struct nt_thread *ntos_worker_thread; +spinlock_t irp_cancel_lock; +static NT_SPIN_LOCK nt_list_lock; +static struct nt_slist wrap_timer_slist; + +/* compute ticks (100ns) since 1601 until when system booted into + * wrap_ticks_to_boot */ +u64 wrap_ticks_to_boot; + +#if defined(CONFIG_X86_64) +static struct timer_list shared_data_timer; +struct kuser_shared_data kuser_shared_data; +static void update_user_shared_data_proc(unsigned long data); +#endif + +WIN_SYMBOL_MAP("KeTickCount", &jiffies) + +WIN_SYMBOL_MAP("NlsMbCodePageTag", FALSE) + +workqueue_struct_t *ntos_wq; + +#ifdef WRAP_PREEMPT +DEFINE_PER_CPU(irql_info_t, irql_info); +#endif + +#if defined(CONFIG_X86_64) +static void update_user_shared_data_proc(unsigned long data) +{ + /* timer is supposed to be scheduled every 10ms, but bigger + * intervals seem to work (tried upto 50ms) */ + *((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601(); + *((ULONG64 *)&kuser_shared_data.interrupt_time) = + jiffies * TICKSPERSEC / HZ; + *((ULONG64 *)&kuser_shared_data.tick) = jiffies; + + mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30)); +} +#endif + +void *allocate_object(ULONG size, enum common_object_type type, + struct unicode_string *name) +{ + struct common_object_header *hdr; + void *body; + + /* we pad header as prefix to body */ + hdr = ExAllocatePoolWithTag(NonPagedPool, OBJECT_SIZE(size), 0); + if (!hdr) { + WARNING("couldn't allocate memory"); + return NULL; + } + memset(hdr, 0, OBJECT_SIZE(size)); + if (name) { + hdr->name.buf = ExAllocatePoolWithTag(NonPagedPool, + name->max_length, 0); + if (!hdr->name.buf) { + ExFreePool(hdr); + return NULL; + } + memcpy(hdr->name.buf, name->buf, name->max_length); + hdr->name.length = name->length; + hdr->name.max_length = name->max_length; + } + hdr->type = type; + hdr->ref_count = 1; + spin_lock_bh(&ntoskernel_lock); + /* threads are looked up often (in KeWaitForXXX), so optimize + * for fast lookups of threads */ + if (type == OBJECT_TYPE_NT_THREAD) + InsertHeadList(&object_list, &hdr->list); + else + InsertTailList(&object_list, &hdr->list); + spin_unlock_bh(&ntoskernel_lock); + body = HEADER_TO_OBJECT(hdr); + TRACE3("allocated hdr: %p, body: %p", hdr, body); + return body; +} + +void free_object(void *object) +{ + struct common_object_header *hdr; + + hdr = OBJECT_TO_HEADER(object); + spin_lock_bh(&ntoskernel_lock); + RemoveEntryList(&hdr->list); + spin_unlock_bh(&ntoskernel_lock); + TRACE3("freed hdr: %p, body: %p", hdr, object); + if (hdr->name.buf) + ExFreePool(hdr->name.buf); + ExFreePool(hdr); +} + +static int add_bus_driver(const char *name) +{ + struct bus_driver *bus_driver; + + bus_driver = kzalloc(sizeof(*bus_driver), GFP_KERNEL); + if (!bus_driver) { + ERROR("couldn't allocate memory"); + return -ENOMEM; + } + strncpy(bus_driver->name, name, sizeof(bus_driver->name)); + bus_driver->name[sizeof(bus_driver->name)-1] = 0; + spin_lock_bh(&ntoskernel_lock); + InsertTailList(&bus_driver_list, &bus_driver->list); + spin_unlock_bh(&ntoskernel_lock); + TRACE1("bus driver %s is at %p", name, &bus_driver->drv_obj); + return STATUS_SUCCESS; +} + +struct driver_object *find_bus_driver(const char *name) +{ + struct bus_driver *bus_driver; + struct driver_object *drv_obj; + + spin_lock_bh(&ntoskernel_lock); + drv_obj = NULL; + nt_list_for_each_entry(bus_driver, &bus_driver_list, list) { + if (strcmp(bus_driver->name, name) == 0) { + drv_obj = &bus_driver->drv_obj; + break; + } + } + spin_unlock_bh(&ntoskernel_lock); + return drv_obj; +} + +wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertHeadList,3) + (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) +{ + struct nt_list *first; + unsigned long flags; + + ENTER5("head = %p, entry = %p", head, entry); + nt_spin_lock_irqsave(lock, flags); + first = InsertHeadList(head, entry); + nt_spin_unlock_irqrestore(lock, flags); + TRACE5("head = %p, old = %p", head, first); + return first; +} + +wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertHeadList,3) + (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) +{ + ENTER5("%p", head); + return ExfInterlockedInsertHeadList(head, entry, lock); +} + +wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertTailList,3) + (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) +{ + struct nt_list *last; + unsigned long flags; + + ENTER5("head = %p, entry = %p", head, entry); + nt_spin_lock_irqsave(lock, flags); + last = InsertTailList(head, entry); + nt_spin_unlock_irqrestore(lock, flags); + TRACE5("head = %p, old = %p", head, last); + return last; +} + +wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertTailList,3) + (struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock) +{ + ENTER5("%p", head); + return ExfInterlockedInsertTailList(head, entry, lock); +} + +wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveHeadList,2) + (struct nt_list *head, NT_SPIN_LOCK *lock) +{ + struct nt_list *ret; + unsigned long flags; + + ENTER5("head = %p", head); + nt_spin_lock_irqsave(lock, flags); + ret = RemoveHeadList(head); + nt_spin_unlock_irqrestore(lock, flags); + TRACE5("head = %p, ret = %p", head, ret); + return ret; +} + +wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveHeadList,2) + (struct nt_list *head, NT_SPIN_LOCK *lock) +{ + ENTER5("%p", head); + return ExfInterlockedRemoveHeadList(head, lock); +} + +wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveTailList,2) + (struct nt_list *head, NT_SPIN_LOCK *lock) +{ + struct nt_list *ret; + unsigned long flags; + + ENTER5("head = %p", head); + nt_spin_lock_irqsave(lock, flags); + ret = RemoveTailList(head); + nt_spin_unlock_irqrestore(lock, flags); + TRACE5("head = %p, ret = %p", head, ret); + return ret; +} + +wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveTailList,2) + (struct nt_list *head, NT_SPIN_LOCK *lock) +{ + ENTER5("%p", head); + return ExfInterlockedRemoveTailList(head, lock); +} + +wfastcall void WIN_FUNC(InitializeSListHead,1) + (nt_slist_header *head) +{ + memset(head, 0, sizeof(*head)); +} + +wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPushEntrySList,3) + (nt_slist_header *head, struct nt_slist *entry, NT_SPIN_LOCK *lock) +{ + struct nt_slist *ret; + + ret = PushEntrySList(head, entry, lock); + return ret; +} + +wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPushEntrySList,2) + (nt_slist_header *head, struct nt_slist *entry) +{ + struct nt_slist *ret; + + ret = PushEntrySList(head, entry, &nt_list_lock); + return ret; +} + +wfastcall struct nt_slist *WIN_FUNC(InterlockedPushEntrySList,2) + (nt_slist_header *head, struct nt_slist *entry) +{ + struct nt_slist *ret; + + ret = PushEntrySList(head, entry, &nt_list_lock); + return ret; +} + +wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPopEntrySList,2) + (nt_slist_header *head, NT_SPIN_LOCK *lock) +{ + struct nt_slist *ret; + + ret = PopEntrySList(head, lock); + return ret; +} + +wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPopEntrySList,1) + (nt_slist_header *head) +{ + struct nt_slist *ret; + + ret = PopEntrySList(head, &nt_list_lock); + return ret; +} + +wfastcall struct nt_slist *WIN_FUNC(InterlockedPopEntrySList,1) + (nt_slist_header *head) +{ + struct nt_slist *ret; + + ret = PopEntrySList(head, &nt_list_lock); + return ret; +} + +wstdcall USHORT WIN_FUNC(ExQueryDepthSList,1) + (nt_slist_header *head) +{ + USHORT depth; + ENTER5("%p", head); + depth = head->depth; + TRACE5("%d, %p", depth, head->next); + return depth; +} + +wfastcall LONG WIN_FUNC(InterlockedIncrement,1) + (LONG volatile *val) +{ + return post_atomic_add(*val, 1); +} + +wfastcall LONG WIN_FUNC(InterlockedDecrement,1) + (LONG volatile *val) +{ + return post_atomic_add(*val, -1); +} + +wfastcall LONG WIN_FUNC(InterlockedExchange,2) + (LONG volatile *target, LONG val) +{ + return xchg(target, val); +} + +wfastcall LONG WIN_FUNC(InterlockedCompareExchange,3) + (LONG volatile *dest, LONG new, LONG old) +{ + return cmpxchg(dest, old, new); +} + +wfastcall void WIN_FUNC(ExInterlockedAddLargeStatistic,2) + (LARGE_INTEGER volatile *plint, ULONG n) +{ + unsigned long flags; + + local_irq_save(flags); +#ifdef CONFIG_X86_64 + __asm__ __volatile__( + "\n" + LOCK_PREFIX "add %1, %0\n\t" + : "+m" (*plint) + : "r" (n)); +#else + __asm__ __volatile__( + "1:\t" + " movl %1, %%ebx\n\t" + " movl %%edx, %%ecx\n\t" + " addl %%eax, %%ebx\n\t" + " adcl $0, %%ecx\n\t" + LOCK_PREFIX "cmpxchg8b %0\n\t" + " jnz 1b\n\t" + : "+m" (*plint) + : "m" (n), "A" (*plint) + : "ebx", "ecx"); +#endif + local_irq_restore(flags); +} + +static void initialize_object(struct dispatcher_header *dh, enum dh_type type, + int state) +{ + memset(dh, 0, sizeof(*dh)); + set_object_type(dh, type); + dh->signal_state = state; + InitializeListHead(&dh->wait_blocks); +} + +static void timer_proc(unsigned long data) +{ + struct wrap_timer *wrap_timer = (struct wrap_timer *)data; + struct nt_timer *nt_timer; + struct kdpc *kdpc; + + nt_timer = wrap_timer->nt_timer; + TIMERENTER("%p(%p), %lu", wrap_timer, nt_timer, jiffies); +#ifdef TIMER_DEBUG + BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); + BUG_ON(nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); +#endif + KeSetEvent((struct nt_event *)nt_timer, 0, FALSE); + if (wrap_timer->repeat) + mod_timer(&wrap_timer->timer, jiffies + wrap_timer->repeat); + kdpc = nt_timer->kdpc; + if (kdpc) + queue_kdpc(kdpc); + TIMEREXIT(return); +} + +void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type, + struct ndis_mp_block *nmb) +{ + struct wrap_timer *wrap_timer; + + /* TODO: if a timer is initialized more than once, we allocate + * memory for wrap_timer more than once for the same nt_timer, + * wasting memory. We can check if nt_timer->wrap_timer_magic is + * set and not allocate, but it is not guaranteed always to be + * safe */ + TIMERENTER("%p", nt_timer); + /* we allocate memory for wrap_timer behind driver's back and + * there is no NDIS/DDK function where this memory can be + * freed, so we use slack_kmalloc so it gets freed when driver + * is unloaded */ + if (nmb) + wrap_timer = kmalloc(sizeof(*wrap_timer), irql_gfp()); + else + wrap_timer = slack_kmalloc(sizeof(*wrap_timer)); + if (!wrap_timer) { + ERROR("couldn't allocate memory for timer"); + return; + } + + memset(wrap_timer, 0, sizeof(*wrap_timer)); + init_timer(&wrap_timer->timer); + wrap_timer->timer.data = (unsigned long)wrap_timer; + wrap_timer->timer.function = timer_proc; + wrap_timer->nt_timer = nt_timer; +#ifdef TIMER_DEBUG + wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; +#endif + nt_timer->wrap_timer = wrap_timer; + nt_timer->kdpc = NULL; + initialize_object(&nt_timer->dh, type, 0); + nt_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; + TIMERTRACE("timer %p (%p)", wrap_timer, nt_timer); + spin_lock_bh(&ntoskernel_lock); + if (nmb) { + wrap_timer->slist.next = nmb->wnd->wrap_timer_slist.next; + nmb->wnd->wrap_timer_slist.next = &wrap_timer->slist; + } else { + wrap_timer->slist.next = wrap_timer_slist.next; + wrap_timer_slist.next = &wrap_timer->slist; + } + spin_unlock_bh(&ntoskernel_lock); + TIMEREXIT(return); +} + +wstdcall void WIN_FUNC(KeInitializeTimerEx,2) + (struct nt_timer *nt_timer, enum timer_type type) +{ + TIMERENTER("%p", nt_timer); + wrap_init_timer(nt_timer, type, NULL); +} + +wstdcall void WIN_FUNC(KeInitializeTimer,1) + (struct nt_timer *nt_timer) +{ + TIMERENTER("%p", nt_timer); + wrap_init_timer(nt_timer, NotificationTimer, NULL); +} + +/* expires and repeat are in HZ */ +BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz, + unsigned long repeat_hz, struct kdpc *kdpc) +{ + struct wrap_timer *wrap_timer; + + TIMERENTER("%p, %lu, %lu, %p, %lu", + nt_timer, expires_hz, repeat_hz, kdpc, jiffies); + + wrap_timer = nt_timer->wrap_timer; + TIMERTRACE("%p", wrap_timer); +#ifdef TIMER_DEBUG + if (wrap_timer->nt_timer != nt_timer) + WARNING("bad timers: %p, %p, %p", wrap_timer, nt_timer, + wrap_timer->nt_timer); + if (nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) { + WARNING("buggy Windows timer didn't initialize timer %p", + nt_timer); + return FALSE; + } + if (wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) { + WARNING("timer %p is not initialized (%lx)?", + wrap_timer, wrap_timer->wrap_timer_magic); + wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC; + } +#endif + KeClearEvent((struct nt_event *)nt_timer); + nt_timer->kdpc = kdpc; + wrap_timer->repeat = repeat_hz; + if (mod_timer(&wrap_timer->timer, jiffies + expires_hz)) + TIMEREXIT(return TRUE); + else + TIMEREXIT(return FALSE); +} + +wstdcall BOOLEAN WIN_FUNC(KeSetTimerEx,4) + (struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, + LONG period_ms, struct kdpc *kdpc) +{ + unsigned long expires_hz, repeat_hz; + + TIMERENTER("%p, %Ld, %d", nt_timer, duetime_ticks, period_ms); + expires_hz = SYSTEM_TIME_TO_HZ(duetime_ticks); + repeat_hz = MSEC_TO_HZ(period_ms); + return wrap_set_timer(nt_timer, expires_hz, repeat_hz, kdpc); +} + +wstdcall BOOLEAN WIN_FUNC(KeSetTimer,3) + (struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks, + struct kdpc *kdpc) +{ + TIMERENTER("%p, %Ld, %p", nt_timer, duetime_ticks, kdpc); + return KeSetTimerEx(nt_timer, duetime_ticks, 0, kdpc); +} + +wstdcall BOOLEAN WIN_FUNC(KeCancelTimer,1) + (struct nt_timer *nt_timer) +{ + struct wrap_timer *wrap_timer; + int ret; + + TIMERENTER("%p", nt_timer); + wrap_timer = nt_timer->wrap_timer; + if (!wrap_timer) { + ERROR("invalid wrap_timer"); + return TRUE; + } +#ifdef TIMER_DEBUG + BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC); +#endif + /* disable timer before deleting so if it is periodic timer, it + * won't be re-armed after deleting */ + wrap_timer->repeat = 0; + ret = del_timer_sync(&wrap_timer->timer); + /* the documentation for KeCancelTimer suggests the DPC is + * deqeued, but actually DPC is left to run */ + if (ret) + TIMEREXIT(return TRUE); + else + TIMEREXIT(return FALSE); +} + +wstdcall BOOLEAN WIN_FUNC(KeReadStateTimer,1) + (struct nt_timer *nt_timer) +{ + if (nt_timer->dh.signal_state) + return TRUE; + else + return FALSE; +} + +wstdcall void WIN_FUNC(KeInitializeDpc,3) + (struct kdpc *kdpc, void *func, void *ctx) +{ + ENTER3("%p, %p, %p", kdpc, func, ctx); + memset(kdpc, 0, sizeof(*kdpc)); + kdpc->func = func; + kdpc->ctx = ctx; + InitializeListHead(&kdpc->list); +} + +static void kdpc_worker(worker_param_t dummy) +{ + struct nt_list *entry; + struct kdpc *kdpc; + unsigned long flags; + KIRQL irql; + + WORKENTER(""); + irql = raise_irql(DISPATCH_LEVEL); + while (1) { + spin_lock_irqsave(&kdpc_list_lock, flags); + entry = RemoveHeadList(&kdpc_list); + if (entry) { + kdpc = container_of(entry, struct kdpc, list); + assert(kdpc->queued); + kdpc->queued = 0; + } else + kdpc = NULL; + spin_unlock_irqrestore(&kdpc_list_lock, flags); + if (!kdpc) + break; + WORKTRACE("%p, %p, %p, %p, %p", kdpc, kdpc->func, kdpc->ctx, + kdpc->arg1, kdpc->arg2); + assert_irql(_irql_ == DISPATCH_LEVEL); + LIN2WIN4(kdpc->func, kdpc, kdpc->ctx, kdpc->arg1, kdpc->arg2); + assert_irql(_irql_ == DISPATCH_LEVEL); + } + lower_irql(irql); + WORKEXIT(return); +} + +wstdcall void WIN_FUNC(KeFlushQueuedDpcs,0) + (void) +{ + kdpc_worker(NULL); +} + +BOOLEAN queue_kdpc(struct kdpc *kdpc) +{ + BOOLEAN ret; + unsigned long flags; + + WORKENTER("%p", kdpc); + spin_lock_irqsave(&kdpc_list_lock, flags); + if (kdpc->queued) + ret = FALSE; + else { + if (unlikely(kdpc->importance == HighImportance)) + InsertHeadList(&kdpc_list, &kdpc->list); + else + InsertTailList(&kdpc_list, &kdpc->list); + kdpc->queued = 1; + ret = TRUE; + } + spin_unlock_irqrestore(&kdpc_list_lock, flags); + if (ret == TRUE) + schedule_ntos_work(&kdpc_work); + WORKTRACE("%d", ret); + return ret; +} + +BOOLEAN dequeue_kdpc(struct kdpc *kdpc) +{ + BOOLEAN ret; + unsigned long flags; + + WORKENTER("%p", kdpc); + spin_lock_irqsave(&kdpc_list_lock, flags); + if (kdpc->queued) { + RemoveEntryList(&kdpc->list); + kdpc->queued = 0; + ret = TRUE; + } else + ret = FALSE; + spin_unlock_irqrestore(&kdpc_list_lock, flags); + WORKTRACE("%d", ret); + return ret; +} + +wstdcall BOOLEAN WIN_FUNC(KeInsertQueueDpc,3) + (struct kdpc *kdpc, void *arg1, void *arg2) +{ + WORKENTER("%p, %p, %p", kdpc, arg1, arg2); + kdpc->arg1 = arg1; + kdpc->arg2 = arg2; + return queue_kdpc(kdpc); +} + +wstdcall BOOLEAN WIN_FUNC(KeRemoveQueueDpc,1) + (struct kdpc *kdpc) +{ + return dequeue_kdpc(kdpc); +} + +wstdcall void WIN_FUNC(KeSetImportanceDpc,2) + (struct kdpc *kdpc, enum kdpc_importance importance) +{ + kdpc->importance = importance; +} + +static void ntos_work_worker(worker_param_t dummy) +{ + struct ntos_work_item *ntos_work_item; + struct nt_list *cur; + + while (1) { + spin_lock_bh(&ntos_work_lock); + cur = RemoveHeadList(&ntos_work_list); + spin_unlock_bh(&ntos_work_lock); + if (!cur) + break; + ntos_work_item = container_of(cur, struct ntos_work_item, list); + WORKTRACE("%p: executing %p, %p, %p", current, + ntos_work_item->func, ntos_work_item->arg1, + ntos_work_item->arg2); + LIN2WIN2(ntos_work_item->func, ntos_work_item->arg1, + ntos_work_item->arg2); + kfree(ntos_work_item); + } + WORKEXIT(return); +} + +int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2) +{ + struct ntos_work_item *ntos_work_item; + + WORKENTER("adding work: %p, %p, %p", func, arg1, arg2); + ntos_work_item = kmalloc(sizeof(*ntos_work_item), irql_gfp()); + if (!ntos_work_item) { + ERROR("couldn't allocate memory"); + return -ENOMEM; + } + ntos_work_item->func = func; + ntos_work_item->arg1 = arg1; + ntos_work_item->arg2 = arg2; + spin_lock_bh(&ntos_work_lock); + InsertTailList(&ntos_work_list, &ntos_work_item->list); + spin_unlock_bh(&ntos_work_lock); + schedule_ntos_work(&ntos_work); + WORKEXIT(return 0); +} + +wstdcall void WIN_FUNC(KeInitializeSpinLock,1) + (NT_SPIN_LOCK *lock) +{ + ENTER6("%p", lock); + nt_spin_lock_init(lock); +} + +wstdcall void WIN_FUNC(KeAcquireSpinLock,2) + (NT_SPIN_LOCK *lock, KIRQL *irql) +{ + ENTER6("%p", lock); + *irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL); +} + +wstdcall void WIN_FUNC(KeReleaseSpinLock,2) + (NT_SPIN_LOCK *lock, KIRQL oldirql) +{ + ENTER6("%p", lock); + nt_spin_unlock_irql(lock, oldirql); +} + +wstdcall void WIN_FUNC(KeAcquireSpinLockAtDpcLevel,1) + (NT_SPIN_LOCK *lock) +{ + ENTER6("%p", lock); + nt_spin_lock(lock); +} + +wstdcall void WIN_FUNC(KeReleaseSpinLockFromDpcLevel,1) + (NT_SPIN_LOCK *lock) +{ + ENTER6("%p", lock); + nt_spin_unlock(lock); +} + +wstdcall void WIN_FUNC(KeRaiseIrql,2) + (KIRQL newirql, KIRQL *oldirql) +{ + ENTER6("%d", newirql); + *oldirql = raise_irql(newirql); +} + +wstdcall KIRQL WIN_FUNC(KeRaiseIrqlToDpcLevel,0) + (void) +{ + return raise_irql(DISPATCH_LEVEL); +} + +wstdcall void WIN_FUNC(KeLowerIrql,1) + (KIRQL irql) +{ + ENTER6("%d", irql); + lower_irql(irql); +} + +wstdcall KIRQL WIN_FUNC(KeAcquireSpinLockRaiseToDpc,1) + (NT_SPIN_LOCK *lock) +{ + ENTER6("%p", lock); + return nt_spin_lock_irql(lock, DISPATCH_LEVEL); +} + +#undef ExAllocatePoolWithTag + +wstdcall void *WIN_FUNC(ExAllocatePoolWithTag,3) + (enum pool_type pool_type, SIZE_T size, ULONG tag) +{ + void *addr; + + ENTER4("pool_type: %d, size: %lu, tag: 0x%x", pool_type, size, tag); + assert_irql(_irql_ <= DISPATCH_LEVEL); + if (size < PAGE_SIZE) + addr = kmalloc(size, irql_gfp()); + else { + if (irql_gfp() & GFP_ATOMIC) { + addr = __vmalloc(size, GFP_ATOMIC | __GFP_HIGHMEM, + PAGE_KERNEL); + TRACE1("%p, %lu", addr, size); + } else { + addr = vmalloc(size); + TRACE1("%p, %lu", addr, size); + } + } + DBG_BLOCK(1) { + if (addr) + TRACE4("addr: %p, %lu", addr, size); + else + TRACE1("failed: %lu", size); + } + return addr; +} +WIN_FUNC_DECL(ExAllocatePoolWithTag,3) + +wstdcall void WIN_FUNC(ExFreePoolWithTag,2) + (void *addr, ULONG tag) +{ + TRACE4("%p", addr); + if ((unsigned long)addr < VMALLOC_START || + (unsigned long)addr >= VMALLOC_END) + kfree(addr); + else + vfree(addr); + + EXIT4(return); +} + +wstdcall void WIN_FUNC(ExFreePool,1) + (void *addr) +{ + ExFreePoolWithTag(addr, 0); +} +WIN_FUNC_DECL(ExFreePool,1) + +wstdcall void WIN_FUNC(ExInitializeNPagedLookasideList,7) + (struct npaged_lookaside_list *lookaside, + LOOKASIDE_ALLOC_FUNC *alloc_func, LOOKASIDE_FREE_FUNC *free_func, + ULONG flags, SIZE_T size, ULONG tag, USHORT depth) +{ + ENTER3("lookaside: %p, size: %lu, flags: %u, head: %p, " + "alloc: %p, free: %p", lookaside, size, flags, + lookaside, alloc_func, free_func); + + memset(lookaside, 0, sizeof(*lookaside)); + + lookaside->size = size; + lookaside->tag = tag; + lookaside->depth = 4; + lookaside->maxdepth = 256; + lookaside->pool_type = NonPagedPool; + + if (alloc_func) + lookaside->alloc_func = alloc_func; + else + lookaside->alloc_func = WIN_FUNC_PTR(ExAllocatePoolWithTag,3); + if (free_func) + lookaside->free_func = free_func; + else + lookaside->free_func = WIN_FUNC_PTR(ExFreePool,1); + +#ifndef CONFIG_X86_64 + nt_spin_lock_init(&lookaside->obsolete); +#endif + EXIT3(return); +} + +wstdcall void WIN_FUNC(ExDeleteNPagedLookasideList,1) + (struct npaged_lookaside_list *lookaside) +{ + struct nt_slist *entry; + + ENTER3("lookaside = %p", lookaside); + while ((entry = ExpInterlockedPopEntrySList(&lookaside->head))) + LIN2WIN1(lookaside->free_func, entry); + EXIT3(return); +} + +#if defined(ALLOC_DEBUG) && ALLOC_DEBUG > 1 +#define ExAllocatePoolWithTag(pool_type, size, tag) \ + wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__) +#endif + +wstdcall NTSTATUS WIN_FUNC(ExCreateCallback,4) + (struct callback_object **object, struct object_attributes *attributes, + BOOLEAN create, BOOLEAN allow_multiple_callbacks) +{ + struct callback_object *obj; + + ENTER2(""); + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(obj, &callback_objects, callback_funcs) { + if (obj->attributes == attributes) { + spin_unlock_bh(&ntoskernel_lock); + *object = obj; + return STATUS_SUCCESS; + } + } + spin_unlock_bh(&ntoskernel_lock); + obj = allocate_object(sizeof(struct callback_object), + OBJECT_TYPE_CALLBACK, NULL); + if (!obj) + EXIT2(return STATUS_INSUFFICIENT_RESOURCES); + InitializeListHead(&obj->callback_funcs); + nt_spin_lock_init(&obj->lock); + obj->allow_multiple_callbacks = allow_multiple_callbacks; + obj->attributes = attributes; + *object = obj; + EXIT2(return STATUS_SUCCESS); +} + +wstdcall void *WIN_FUNC(ExRegisterCallback,3) + (struct callback_object *object, PCALLBACK_FUNCTION func, void *context) +{ + struct callback_func *callback; + KIRQL irql; + + ENTER2(""); + irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); + if (object->allow_multiple_callbacks == FALSE && + !IsListEmpty(&object->callback_funcs)) { + nt_spin_unlock_irql(&object->lock, irql); + EXIT2(return NULL); + } + nt_spin_unlock_irql(&object->lock, irql); + callback = kmalloc(sizeof(*callback), GFP_KERNEL); + if (!callback) { + ERROR("couldn't allocate memory"); + return NULL; + } + callback->func = func; + callback->context = context; + callback->object = object; + irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); + InsertTailList(&object->callback_funcs, &callback->list); + nt_spin_unlock_irql(&object->lock, irql); + EXIT2(return callback); +} + +wstdcall void WIN_FUNC(ExUnregisterCallback,1) + (struct callback_func *callback) +{ + struct callback_object *object; + KIRQL irql; + + ENTER3("%p", callback); + if (!callback) + return; + object = callback->object; + irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); + RemoveEntryList(&callback->list); + nt_spin_unlock_irql(&object->lock, irql); + kfree(callback); + return; +} + +wstdcall void WIN_FUNC(ExNotifyCallback,3) + (struct callback_object *object, void *arg1, void *arg2) +{ + struct callback_func *callback; + KIRQL irql; + + ENTER3("%p", object); + irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL); + nt_list_for_each_entry(callback, &object->callback_funcs, list) { + LIN2WIN3(callback->func, callback->context, arg1, arg2); + } + nt_spin_unlock_irql(&object->lock, irql); + return; +} + +/* check and set signaled state; should be called with dispatcher_lock held */ +/* @grab indicates if the event should be grabbed or checked + * - note that a semaphore may stay in signaled state for multiple + * 'grabs' if the count is > 1 */ +static int grab_object(struct dispatcher_header *dh, + struct task_struct *thread, int grab) +{ + EVENTTRACE("%p, %p, %d, %d", dh, thread, grab, dh->signal_state); + if (unlikely(is_mutex_object(dh))) { + struct nt_mutex *nt_mutex; + nt_mutex = container_of(dh, struct nt_mutex, dh); + EVENTTRACE("%p, %p, %d, %p, %d", nt_mutex, + nt_mutex->owner_thread, dh->signal_state, + thread, grab); + /* either no thread owns the mutex or this thread owns + * it */ + assert(dh->signal_state == 1 && nt_mutex->owner_thread == NULL); + assert(dh->signal_state < 1 && nt_mutex->owner_thread != NULL); + if ((dh->signal_state == 1 && nt_mutex->owner_thread == NULL) || + nt_mutex->owner_thread == thread) { + if (grab) { + dh->signal_state--; + nt_mutex->owner_thread = thread; + } + EVENTEXIT(return 1); + } + } else if (dh->signal_state > 0) { + /* to grab, decrement signal_state for synchronization + * or semaphore objects */ + if (grab && (is_synch_object(dh) || is_semaphore_object(dh))) + dh->signal_state--; + EVENTEXIT(return 1); + } + EVENTEXIT(return 0); +} + +/* this function should be called holding dispatcher_lock */ +static void object_signalled(struct dispatcher_header *dh) +{ + struct nt_list *cur, *next; + struct wait_block *wb; + + EVENTENTER("%p", dh); + nt_list_for_each_safe(cur, next, &dh->wait_blocks) { + wb = container_of(cur, struct wait_block, list); + assert(wb->thread != NULL); + assert(wb->object == NULL); + if (!grab_object(dh, wb->thread, 1)) + continue; + EVENTTRACE("%p (%p): waking %p", dh, wb, wb->thread); + RemoveEntryList(cur); + wb->object = dh; + *(wb->wait_done) = 1; + wake_up_process(wb->thread); + } + EVENTEXIT(return); +} + +wstdcall NTSTATUS WIN_FUNC(KeWaitForMultipleObjects,8) + (ULONG count, void *object[], enum wait_type wait_type, + KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode, + BOOLEAN alertable, LARGE_INTEGER *timeout, + struct wait_block *wait_block_array) +{ + int i, res = 0, wait_count, wait_done; + typeof(jiffies) wait_hz = 0; + struct wait_block *wb, wb_array[THREAD_WAIT_OBJECTS]; + struct dispatcher_header *dh; + + EVENTENTER("%p, %d, %u, %p", current, count, wait_type, timeout); + + if (count > MAX_WAIT_OBJECTS || + (count > THREAD_WAIT_OBJECTS && wait_block_array == NULL)) + EVENTEXIT(return STATUS_INVALID_PARAMETER); + + if (wait_block_array == NULL) + wb = wb_array; + else + wb = wait_block_array; + + /* If *timeout == 0: In the case of WaitAny, if an object can + * be grabbed (object is in signaled state), grab and + * return. In the case of WaitAll, we have to first make sure + * all objects can be grabbed. If any/some of them can't be + * grabbed, either we return STATUS_TIMEOUT or wait for them, + * depending on how to satisfy wait. If all of them can be + * grabbed, we will grab them in the next loop below */ + + spin_lock_bh(&dispatcher_lock); + for (i = wait_count = 0; i < count; i++) { + dh = object[i]; + EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state); + /* wait_type == 1 for WaitAny, 0 for WaitAll */ + if (grab_object(dh, current, wait_type)) { + if (wait_type == WaitAny) { + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return STATUS_WAIT_0 + i); + } + } else { + EVENTTRACE("%p: wait for %p", current, dh); + wait_count++; + } + } + + if (timeout && *timeout == 0 && wait_count) { + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return STATUS_TIMEOUT); + } + + /* get the list of objects the thread needs to wait on and add + * the thread on the wait list for each such object */ + /* if *timeout == 0, this step will grab all the objects */ + wait_done = 0; + for (i = 0; i < count; i++) { + dh = object[i]; + EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state); + wb[i].object = NULL; + if (grab_object(dh, current, 1)) { + EVENTTRACE("%p: no wait for %p (%d)", + current, dh, dh->signal_state); + /* mark that we are not waiting on this object */ + wb[i].thread = NULL; + } else { + wb[i].wait_done = &wait_done; + wb[i].thread = current; + EVENTTRACE("%p: wait for %p", current, dh); + InsertTailList(&dh->wait_blocks, &wb[i].list); + } + } + spin_unlock_bh(&dispatcher_lock); + if (wait_count == 0) + EVENTEXIT(return STATUS_SUCCESS); + + assert(timeout == NULL || *timeout != 0); + if (timeout == NULL) + wait_hz = 0; + else + wait_hz = SYSTEM_TIME_TO_HZ(*timeout); + + DBG_BLOCK(2) { + KIRQL irql = current_irql(); + if (irql >= DISPATCH_LEVEL) { + TRACE2("wait in atomic context: %lu, %d, %ld", + wait_hz, in_atomic(), in_interrupt()); + } + } + assert_irql(_irql_ < DISPATCH_LEVEL); + EVENTTRACE("%p: sleep for %ld on %p", current, wait_hz, &wait_done); + /* we don't honor 'alertable' - according to decription for + * this, even if waiting in non-alertable state, thread may be + * alerted in some circumstances */ + while (wait_count) { + res = wait_condition(wait_done, wait_hz, TASK_INTERRUPTIBLE); + spin_lock_bh(&dispatcher_lock); + EVENTTRACE("%p woke up: %d, %d", current, res, wait_done); + /* the event may have been set by the time + * wrap_wait_event returned and spinlock obtained, so + * don't rely on value of 'res' - check event status */ + if (!wait_done) { + assert(res <= 0); + /* timed out or interrupted; remove from wait list */ + for (i = 0; i < count; i++) { + if (!wb[i].thread) + continue; + EVENTTRACE("%p: timedout, dequeue %p (%p)", + current, object[i], wb[i].object); + assert(wb[i].object == NULL); + RemoveEntryList(&wb[i].list); + } + spin_unlock_bh(&dispatcher_lock); + if (res < 0) + EVENTEXIT(return STATUS_ALERTED); + else + EVENTEXIT(return STATUS_TIMEOUT); + } + assert(res > 0); + /* woken because object(s) signalled */ + for (i = 0; wait_count && i < count; i++) { + if (!wb[i].thread || !wb[i].object) + continue; + DBG_BLOCK(1) { + if (wb[i].object != object[i]) { + EVENTTRACE("oops %p != %p", + wb[i].object, object[i]); + continue; + } + } + wait_count--; + if (wait_type == WaitAny) { + int j; + /* done; remove from rest of wait list */ + for (j = i + 1; j < count; j++) { + if (wb[j].thread && !wb[j].object) + RemoveEntryList(&wb[j].list); + } + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return STATUS_WAIT_0 + i); + } + } + wait_done = 0; + spin_unlock_bh(&dispatcher_lock); + if (wait_count == 0) + EVENTEXIT(return STATUS_SUCCESS); + + /* this thread is still waiting for more objects, so + * let it wait for remaining time and those objects */ + if (timeout) + wait_hz = res; + else + wait_hz = 0; + } + /* should never reach here, but compiler wants return value */ + ERROR("%p: wait_hz: %ld", current, wait_hz); + EVENTEXIT(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(KeWaitForSingleObject,5) + (void *object, KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode, + BOOLEAN alertable, LARGE_INTEGER *timeout) +{ + return KeWaitForMultipleObjects(1, &object, WaitAny, wait_reason, + wait_mode, alertable, timeout, NULL); +} + +wstdcall void WIN_FUNC(KeInitializeEvent,3) + (struct nt_event *nt_event, enum event_type type, BOOLEAN state) +{ + EVENTENTER("event = %p, type = %d, state = %d", nt_event, type, state); + initialize_object(&nt_event->dh, type, state); + EVENTEXIT(return); +} + +wstdcall LONG WIN_FUNC(KeSetEvent,3) + (struct nt_event *nt_event, KPRIORITY incr, BOOLEAN wait) +{ + LONG old_state; + + EVENTENTER("%p, %d", nt_event, nt_event->dh.type); + if (wait == TRUE) + WARNING("wait = %d, not yet implemented", wait); + spin_lock_bh(&dispatcher_lock); + old_state = nt_event->dh.signal_state; + nt_event->dh.signal_state = 1; + if (old_state == 0) + object_signalled(&nt_event->dh); + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return old_state); +} + +wstdcall void WIN_FUNC(KeClearEvent,1) + (struct nt_event *nt_event) +{ + EVENTENTER("%p", nt_event); + nt_event->dh.signal_state = 0; + EVENTEXIT(return); +} + +wstdcall LONG WIN_FUNC(KeResetEvent,1) + (struct nt_event *nt_event) +{ + LONG old_state; + + EVENTENTER("%p", nt_event); + old_state = xchg(&nt_event->dh.signal_state, 0); + EVENTEXIT(return old_state); +} + +wstdcall LONG WIN_FUNC(KeReadStateEvent,1) + (struct nt_event *nt_event) +{ + LONG state; + + state = nt_event->dh.signal_state; + EVENTTRACE("%d", state); + return state; +} + +wstdcall void WIN_FUNC(KeInitializeMutex,2) + (struct nt_mutex *mutex, ULONG level) +{ + EVENTENTER("%p", mutex); + initialize_object(&mutex->dh, MutexObject, 1); + mutex->dh.size = sizeof(*mutex); + InitializeListHead(&mutex->list); + mutex->abandoned = FALSE; + mutex->apc_disable = 1; + mutex->owner_thread = NULL; + EVENTEXIT(return); +} + +wstdcall LONG WIN_FUNC(KeReleaseMutex,2) + (struct nt_mutex *mutex, BOOLEAN wait) +{ + LONG ret; + struct task_struct *thread; + + EVENTENTER("%p, %d, %p", mutex, wait, current); + if (wait == TRUE) + WARNING("wait: %d", wait); + thread = current; + spin_lock_bh(&dispatcher_lock); + EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread, + mutex->dh.signal_state); + if ((mutex->owner_thread == thread) && (mutex->dh.signal_state <= 0)) { + ret = mutex->dh.signal_state++; + if (ret == 0) { + mutex->owner_thread = NULL; + object_signalled(&mutex->dh); + } + } else { + ret = STATUS_MUTANT_NOT_OWNED; + WARNING("invalid mutex: %p, %p, %p", mutex, mutex->owner_thread, + thread); + } + EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread, + mutex->dh.signal_state); + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return ret); +} + +wstdcall void WIN_FUNC(KeInitializeSemaphore,3) + (struct nt_semaphore *semaphore, LONG count, LONG limit) +{ + EVENTENTER("%p: %d", semaphore, count); + /* if limit > 1, we need to satisfy as many waits (until count + * becomes 0); so we keep decrementing count everytime a wait + * is satisified */ + initialize_object(&semaphore->dh, SemaphoreObject, count); + semaphore->dh.size = sizeof(*semaphore); + semaphore->limit = limit; + EVENTEXIT(return); +} + +wstdcall LONG WIN_FUNC(KeReleaseSemaphore,4) + (struct nt_semaphore *semaphore, KPRIORITY incr, LONG adjustment, + BOOLEAN wait) +{ + LONG ret; + + EVENTENTER("%p", semaphore); + spin_lock_bh(&dispatcher_lock); + ret = semaphore->dh.signal_state; + assert(ret >= 0); + if (semaphore->dh.signal_state + adjustment <= semaphore->limit) + semaphore->dh.signal_state += adjustment; + else { + WARNING("releasing %d over limit %d", adjustment, + semaphore->limit); + semaphore->dh.signal_state = semaphore->limit; + } + if (semaphore->dh.signal_state > 0) + object_signalled(&semaphore->dh); + spin_unlock_bh(&dispatcher_lock); + EVENTEXIT(return ret); +} + +wstdcall NTSTATUS WIN_FUNC(KeDelayExecutionThread,3) + (KPROCESSOR_MODE wait_mode, BOOLEAN alertable, LARGE_INTEGER *interval) +{ + int res; + long timeout; + + if (wait_mode != 0) + ERROR("invalid wait_mode %d", wait_mode); + + timeout = SYSTEM_TIME_TO_HZ(*interval); + EVENTTRACE("%p, %Ld, %ld", current, *interval, timeout); + if (timeout <= 0) + EVENTEXIT(return STATUS_SUCCESS); + + if (alertable) + set_current_state(TASK_INTERRUPTIBLE); + else + set_current_state(TASK_UNINTERRUPTIBLE); + + res = schedule_timeout(timeout); + EVENTTRACE("%p, %d", current, res); + if (res == 0) + EVENTEXIT(return STATUS_SUCCESS); + else + EVENTEXIT(return STATUS_ALERTED); +} + +wstdcall ULONGLONG WIN_FUNC(KeQueryInterruptTime,0) + (void) +{ + EXIT5(return jiffies * TICKSPERJIFFY); +} + +wstdcall ULONG WIN_FUNC(KeQueryTimeIncrement,0) + (void) +{ + EXIT5(return TICKSPERSEC / HZ); +} + +wstdcall void WIN_FUNC(KeQuerySystemTime,1) + (LARGE_INTEGER *time) +{ + *time = ticks_1601(); + TRACE5("%Lu, %lu", *time, jiffies); +} + +wstdcall void WIN_FUNC(KeQueryTickCount,1) + (LARGE_INTEGER *count) +{ + *count = jiffies; +} + +wstdcall LARGE_INTEGER WIN_FUNC(KeQueryPerformanceCounter,1) + (LARGE_INTEGER *counter) +{ + if (counter) + *counter = HZ; + return jiffies; +} + +wstdcall KAFFINITY WIN_FUNC(KeQueryActiveProcessors,0) + (void) +{ + int i, n; + KAFFINITY bits = 0; +#ifdef num_online_cpus + n = num_online_cpus(); +#else + n = NR_CPUS; +#endif + for (i = 0; i < n; i++) + bits = (bits << 1) | 1; + return bits; +} + +struct nt_thread *get_current_nt_thread(void) +{ + struct task_struct *task = current; + struct nt_thread *thread; + struct common_object_header *header; + + TRACE6("task: %p", task); + thread = NULL; + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(header, &object_list, list) { + TRACE6("%p, %d", header, header->type); + if (header->type != OBJECT_TYPE_NT_THREAD) + break; + thread = HEADER_TO_OBJECT(header); + TRACE6("%p, %p", thread, thread->task); + if (thread->task == task) + break; + else + thread = NULL; + } + spin_unlock_bh(&ntoskernel_lock); + if (thread == NULL) + TRACE4("couldn't find thread for task %p, %d", task, task->pid); + TRACE6("%p", thread); + return thread; +} + +static struct task_struct *get_nt_thread_task(struct nt_thread *thread) +{ + struct task_struct *task; + struct common_object_header *header; + + TRACE6("%p", thread); + task = NULL; + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(header, &object_list, list) { + TRACE6("%p, %d", header, header->type); + if (header->type != OBJECT_TYPE_NT_THREAD) + break; + if (thread == HEADER_TO_OBJECT(header)) { + task = thread->task; + break; + } + } + spin_unlock_bh(&ntoskernel_lock); + if (task == NULL) + TRACE2("%p: couldn't find task for %p", current, thread); + return task; +} + +static struct nt_thread *create_nt_thread(struct task_struct *task) +{ + struct nt_thread *thread; + thread = allocate_object(sizeof(*thread), OBJECT_TYPE_NT_THREAD, NULL); + if (!thread) { + ERROR("couldn't allocate thread object"); + EXIT2(return NULL); + } + thread->task = task; + if (task) + thread->pid = task->pid; + else + thread->pid = 0; + nt_spin_lock_init(&thread->lock); + InitializeListHead(&thread->irps); + initialize_object(&thread->dh, ThreadObject, 0); + thread->dh.size = sizeof(*thread); + thread->prio = LOW_PRIORITY; + return thread; +} + +wstdcall struct nt_thread *WIN_FUNC(KeGetCurrentThread,0) + (void) +{ + struct nt_thread *thread = get_current_nt_thread(); + TRACE2("%p, %p", thread, current); + return thread; +} + +wstdcall KPRIORITY WIN_FUNC(KeQueryPriorityThread,1) + (struct nt_thread *thread) +{ + KPRIORITY prio; + struct task_struct *task; + + TRACE2("%p", thread); +#ifdef CONFIG_X86_64 + /* sis163u driver for amd64 passes 0x1f from thread created by + * PsCreateSystemThread - no idea what is 0x1f */ + if (thread == (void *)0x1f) + thread = get_current_nt_thread(); +#endif + if (!thread) { + TRACE2("invalid thread"); + EXIT2(return LOW_REALTIME_PRIORITY); + } + task = get_nt_thread_task(thread); + if (!task) { + TRACE2("couldn't find task for thread: %p", thread); + EXIT2(return LOW_REALTIME_PRIORITY); + } + + prio = thread->prio; + + TRACE2("%d", prio); + return prio; +} + +wstdcall KPRIORITY WIN_FUNC(KeSetPriorityThread,2) + (struct nt_thread *thread, KPRIORITY prio) +{ + KPRIORITY old_prio; + struct task_struct *task; + + TRACE2("thread: %p, priority = %u", thread, prio); +#ifdef CONFIG_X86_64 + if (thread == (void *)0x1f) + thread = get_current_nt_thread(); +#endif + if (!thread) { + TRACE2("invalid thread"); + EXIT2(return LOW_REALTIME_PRIORITY); + } + task = get_nt_thread_task(thread); + if (!task) { + TRACE2("couldn't find task for thread: %p", thread); + EXIT2(return LOW_REALTIME_PRIORITY); + } + + old_prio = thread->prio; + thread->prio = prio; + + TRACE2("%d, %d", old_prio, thread->prio); + return old_prio; +} + +struct thread_trampoline { + void (*func)(void *) wstdcall; + void *ctx; + struct nt_thread *thread; + struct completion started; +}; + +static int ntdriver_thread(void *data) +{ + struct thread_trampoline *thread_tramp = data; + /* yes, a tramp! */ + typeof(thread_tramp->func) func = thread_tramp->func; + typeof(thread_tramp->ctx) ctx = thread_tramp->ctx; + + thread_tramp->thread->task = current; + thread_tramp->thread->pid = current->pid; + TRACE2("thread: %p, task: %p (%d)", thread_tramp->thread, + current, current->pid); + complete(&thread_tramp->started); + +#ifdef PF_NOFREEZE + current->flags |= PF_NOFREEZE; +#endif + strncpy(current->comm, "ntdriver", sizeof(current->comm)); + current->comm[sizeof(current->comm)-1] = 0; + LIN2WIN1(func, ctx); + ERROR("task: %p", current); + return 0; +} + +wstdcall NTSTATUS WIN_FUNC(PsCreateSystemThread,7) + (void **handle, ULONG access, void *obj_attr, void *process, + void *client_id, void (*func)(void *) wstdcall, void *ctx) +{ + struct thread_trampoline thread_tramp; + + ENTER2("handle = %p, access = %u, obj_attr = %p, process = %p, " + "client_id = %p, func = %p, context = %p", handle, access, + obj_attr, process, client_id, func, ctx); + + thread_tramp.thread = create_nt_thread(NULL); + if (!thread_tramp.thread) { + ERROR("couldn't allocate thread object"); + EXIT2(return STATUS_RESOURCES); + } + TRACE2("thread: %p", thread_tramp.thread); + thread_tramp.func = func; + thread_tramp.ctx = ctx; + init_completion(&thread_tramp.started); + + thread_tramp.thread->task = kthread_run(ntdriver_thread, + &thread_tramp, "ntdriver"); + if (IS_ERR(thread_tramp.thread->task)) { + free_object(thread_tramp.thread); + EXIT2(return STATUS_FAILURE); + } + TRACE2("created task: %p", thread_tramp.thread->task); + + wait_for_completion(&thread_tramp.started); + *handle = OBJECT_TO_HEADER(thread_tramp.thread); + TRACE2("created thread: %p, %p", thread_tramp.thread, *handle); + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(PsTerminateSystemThread,1) + (NTSTATUS status) +{ + struct nt_thread *thread; + + TRACE2("%p, %08X", current, status); + thread = get_current_nt_thread(); + TRACE2("%p", thread); + if (thread) { + KeSetEvent((struct nt_event *)&thread->dh, 0, FALSE); + while (1) { + struct nt_list *ent; + struct irp *irp; + KIRQL irql; + irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL); + ent = RemoveHeadList(&thread->irps); + nt_spin_unlock_irql(&thread->lock, irql); + if (!ent) + break; + irp = container_of(ent, struct irp, thread_list); + IOTRACE("%p", irp); + IoCancelIrp(irp); + } + /* the driver may later query this status with + * ZwQueryInformationThread */ + thread->status = status; + } else + ERROR("couldn't find thread for task: %p", current); + + complete_and_exit(NULL, status); + ERROR("oops: %p, %d", thread->task, thread->pid); + return STATUS_FAILURE; +} + +wstdcall BOOLEAN WIN_FUNC(KeRemoveEntryDeviceQueue,2) + (struct kdevice_queue *dev_queue, struct kdevice_queue_entry *entry) +{ + struct kdevice_queue_entry *e; + KIRQL irql; + + irql = nt_spin_lock_irql(&dev_queue->lock, DISPATCH_LEVEL); + nt_list_for_each_entry(e, &dev_queue->list, list) { + if (e == entry) { + RemoveEntryList(&e->list); + nt_spin_unlock_irql(&dev_queue->lock, irql); + return TRUE; + } + } + nt_spin_unlock_irql(&dev_queue->lock, irql); + return FALSE; +} + +wstdcall BOOLEAN WIN_FUNC(KeSynchronizeExecution,3) + (struct kinterrupt *interrupt, PKSYNCHRONIZE_ROUTINE synch_routine, + void *ctx) +{ + BOOLEAN ret; + unsigned long flags; + + nt_spin_lock_irqsave(interrupt->actual_lock, flags); + ret = LIN2WIN1(synch_routine, ctx); + nt_spin_unlock_irqrestore(interrupt->actual_lock, flags); + TRACE6("%d", ret); + return ret; +} + +wstdcall void *WIN_FUNC(MmAllocateContiguousMemorySpecifyCache,5) + (SIZE_T size, PHYSICAL_ADDRESS lowest, PHYSICAL_ADDRESS highest, + PHYSICAL_ADDRESS boundary, enum memory_caching_type cache_type) +{ + void *addr; + gfp_t flags; + + ENTER2("%lu, 0x%lx, 0x%lx, 0x%lx, %d", size, (long)lowest, + (long)highest, (long)boundary, cache_type); + flags = irql_gfp(); + addr = wrap_get_free_pages(flags, size); + TRACE2("%p, %lu, 0x%x", addr, size, flags); + if (addr && ((virt_to_phys(addr) + size) <= highest)) + EXIT2(return addr); +#ifdef CONFIG_X86_64 + /* GFP_DMA is really only 16MB even on x86-64, but there is no + * other zone available */ + if (highest <= DMA_BIT_MASK(31)) + flags |= __GFP_DMA; + else if (highest <= DMA_BIT_MASK(32)) + flags |= __GFP_DMA32; +#else + if (highest <= DMA_BIT_MASK(24)) + flags |= __GFP_DMA; + else if (highest > DMA_BIT_MASK(30)) + flags |= __GFP_HIGHMEM; +#endif + addr = wrap_get_free_pages(flags, size); + TRACE2("%p, %lu, 0x%x", addr, size, flags); + return addr; +} + +wstdcall void WIN_FUNC(MmFreeContiguousMemorySpecifyCache,3) + (void *base, SIZE_T size, enum memory_caching_type cache_type) +{ + TRACE2("%p, %lu", base, size); + free_pages((unsigned long)base, get_order(size)); +} + +wstdcall PHYSICAL_ADDRESS WIN_FUNC(MmGetPhysicalAddress,1) + (void *base) +{ + unsigned long phy = virt_to_phys(base); + TRACE2("%p, %p", base, (void *)phy); + return phy; +} + +/* Atheros card with pciid 168C:0014 calls this function with 0xf0000 + * and 0xf6ef0 address, and then check for things that seem to be + * related to ACPI: "_SM_" and "_DMI_". This may be the hack they do + * to check if this card is installed in IBM thinkpads; we can + * probably get this device to work if we create a buffer with the + * strings as required by the driver and return virtual address for + * that address instead */ +wstdcall void __iomem *WIN_FUNC(MmMapIoSpace,3) + (PHYSICAL_ADDRESS phys_addr, SIZE_T size, + enum memory_caching_type cache) +{ + void __iomem *virt; + ENTER1("cache type: %d", cache); + if (cache == MmCached) + virt = ioremap(phys_addr, size); + else + virt = ioremap_nocache(phys_addr, size); + TRACE1("%Lx, %lu, %p", phys_addr, size, virt); + return virt; +} + +wstdcall void WIN_FUNC(MmUnmapIoSpace,2) + (void __iomem *addr, SIZE_T size) +{ + ENTER1("%p, %lu", addr, size); + iounmap(addr); + return; +} + +wstdcall ULONG WIN_FUNC(MmSizeOfMdl,2) + (void *base, ULONG length) +{ + return sizeof(struct mdl) + + (sizeof(PFN_NUMBER) * SPAN_PAGES(base, length)); +} + +struct mdl *allocate_init_mdl(void *virt, ULONG length) +{ + struct wrap_mdl *wrap_mdl; + struct mdl *mdl; + int mdl_size = MmSizeOfMdl(virt, length); + + if (mdl_size <= MDL_CACHE_SIZE) { + wrap_mdl = kmem_cache_alloc(mdl_cache, irql_gfp()); + if (!wrap_mdl) + return NULL; + spin_lock_bh(&dispatcher_lock); + InsertHeadList(&wrap_mdl_list, &wrap_mdl->list); + spin_unlock_bh(&dispatcher_lock); + mdl = wrap_mdl->mdl; + TRACE3("allocated mdl from cache: %p(%p), %p(%d)", + wrap_mdl, mdl, virt, length); + memset(mdl, 0, MDL_CACHE_SIZE); + MmInitializeMdl(mdl, virt, length); + /* mark the MDL as allocated from cache pool so when + * it is freed, we free it back to the pool */ + mdl->flags = MDL_ALLOCATED_FIXED_SIZE | MDL_CACHE_ALLOCATED; + } else { + wrap_mdl = + kmalloc(sizeof(*wrap_mdl) + mdl_size, irql_gfp()); + if (!wrap_mdl) + return NULL; + mdl = wrap_mdl->mdl; + TRACE3("allocated mdl from memory: %p(%p), %p(%d)", + wrap_mdl, mdl, virt, length); + spin_lock_bh(&dispatcher_lock); + InsertHeadList(&wrap_mdl_list, &wrap_mdl->list); + spin_unlock_bh(&dispatcher_lock); + memset(mdl, 0, mdl_size); + MmInitializeMdl(mdl, virt, length); + mdl->flags = MDL_ALLOCATED_FIXED_SIZE; + } + return mdl; +} + +void free_mdl(struct mdl *mdl) +{ + /* A driver may allocate Mdl with NdisAllocateBuffer and free + * with IoFreeMdl (e.g., 64-bit Broadcom). Since we need to + * treat buffers allocated with Ndis calls differently, we + * must call NdisFreeBuffer if it is allocated with Ndis + * function. We set 'pool' field in Ndis functions. */ + if (!mdl) + return; + if (mdl->pool) + NdisFreeBuffer(mdl); + else { + struct wrap_mdl *wrap_mdl = (struct wrap_mdl *) + ((char *)mdl - offsetof(struct wrap_mdl, mdl)); + spin_lock_bh(&dispatcher_lock); + RemoveEntryList(&wrap_mdl->list); + spin_unlock_bh(&dispatcher_lock); + + if (mdl->flags & MDL_CACHE_ALLOCATED) { + TRACE3("freeing mdl cache: %p, %p, %p", + wrap_mdl, mdl, mdl->mappedsystemva); + kmem_cache_free(mdl_cache, wrap_mdl); + } else { + TRACE3("freeing mdl: %p, %p, %p", + wrap_mdl, mdl, mdl->mappedsystemva); + kfree(wrap_mdl); + } + } + return; +} + +wstdcall void WIN_FUNC(IoBuildPartialMdl,4) + (struct mdl *source, struct mdl *target, void *virt, ULONG length) +{ + MmInitializeMdl(target, virt, length); + target->flags |= MDL_PARTIAL; +} + +wstdcall void WIN_FUNC(MmBuildMdlForNonPagedPool,1) + (struct mdl *mdl) +{ + PFN_NUMBER *mdl_pages; + int i, n; + + ENTER4("%p", mdl); + /* already mapped */ +// mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl); + mdl->flags |= MDL_SOURCE_IS_NONPAGED_POOL; + TRACE4("%p, %p, %p, %d, %d", mdl, mdl->mappedsystemva, mdl->startva, + mdl->byteoffset, mdl->bytecount); + n = SPAN_PAGES(MmGetSystemAddressForMdl(mdl), MmGetMdlByteCount(mdl)); + if (n > MDL_CACHE_PAGES) + WARNING("%p, %d, %d", MmGetSystemAddressForMdl(mdl), + MmGetMdlByteCount(mdl), n); + mdl_pages = MmGetMdlPfnArray(mdl); + for (i = 0; i < n; i++) + mdl_pages[i] = (ULONG_PTR)mdl->startva + (i * PAGE_SIZE); + EXIT4(return); +} + +wstdcall void *WIN_FUNC(MmMapLockedPages,2) + (struct mdl *mdl, KPROCESSOR_MODE access_mode) +{ + /* already mapped */ +// mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl); + mdl->flags |= MDL_MAPPED_TO_SYSTEM_VA; + /* what is the need for MDL_PARTIAL_HAS_BEEN_MAPPED? */ + if (mdl->flags & MDL_PARTIAL) + mdl->flags |= MDL_PARTIAL_HAS_BEEN_MAPPED; + return mdl->mappedsystemva; +} + +wstdcall void *WIN_FUNC(MmMapLockedPagesSpecifyCache,6) + (struct mdl *mdl, KPROCESSOR_MODE access_mode, + enum memory_caching_type cache_type, void *base_address, + ULONG bug_check, enum mm_page_priority priority) +{ + return MmMapLockedPages(mdl, access_mode); +} + +wstdcall void WIN_FUNC(MmUnmapLockedPages,2) + (void *base, struct mdl *mdl) +{ + mdl->flags &= ~MDL_MAPPED_TO_SYSTEM_VA; + return; +} + +wstdcall void WIN_FUNC(MmProbeAndLockPages,3) + (struct mdl *mdl, KPROCESSOR_MODE access_mode, + enum lock_operation operation) +{ + /* already locked */ + mdl->flags |= MDL_PAGES_LOCKED; + return; +} + +wstdcall void WIN_FUNC(MmUnlockPages,1) + (struct mdl *mdl) +{ + mdl->flags &= ~MDL_PAGES_LOCKED; + return; +} + +wstdcall BOOLEAN WIN_FUNC(MmIsAddressValid,1) + (void *virt_addr) +{ + if (virt_addr_valid(virt_addr)) + return TRUE; + else + return FALSE; +} + +wstdcall void *WIN_FUNC(MmLockPagableDataSection,1) + (void *address) +{ + return address; +} + +wstdcall void WIN_FUNC(MmUnlockPagableImageSection,1) + (void *handle) +{ + return; +} + +wstdcall NTSTATUS WIN_FUNC(ObReferenceObjectByHandle,6) + (void *handle, ACCESS_MASK desired_access, void *obj_type, + KPROCESSOR_MODE access_mode, void **object, void *handle_info) +{ + struct common_object_header *hdr; + + TRACE2("%p", handle); + hdr = HANDLE_TO_HEADER(handle); + atomic_inc_var(hdr->ref_count); + *object = HEADER_TO_OBJECT(hdr); + TRACE2("%p, %p, %d, %p", hdr, object, hdr->ref_count, *object); + return STATUS_SUCCESS; +} + +/* DDK doesn't say if return value should be before incrementing or + * after incrementing reference count, but according to #reactos + * devels, it should be return value after incrementing */ +wfastcall LONG WIN_FUNC(ObfReferenceObject,1) + (void *object) +{ + struct common_object_header *hdr; + LONG ret; + + hdr = OBJECT_TO_HEADER(object); + ret = post_atomic_add(hdr->ref_count, 1); + TRACE2("%p, %d, %p", hdr, hdr->ref_count, object); + return ret; +} + +static int dereference_object(void *object) +{ + struct common_object_header *hdr; + int ref_count; + + ENTER2("object: %p", object); + hdr = OBJECT_TO_HEADER(object); + TRACE2("hdr: %p", hdr); + ref_count = post_atomic_add(hdr->ref_count, -1); + TRACE2("object: %p, %d", object, ref_count); + if (ref_count < 0) + ERROR("invalid object: %p (%d)", object, ref_count); + if (ref_count <= 0) { + free_object(object); + return 1; + } else + return 0; +} + +wfastcall void WIN_FUNC(ObfDereferenceObject,1) + (void *object) +{ + TRACE2("%p", object); + dereference_object(object); +} + +wstdcall NTSTATUS WIN_FUNC(ZwCreateFile,11) + (void **handle, ACCESS_MASK access_mask, + struct object_attributes *obj_attr, struct io_status_block *iosb, + LARGE_INTEGER *size, ULONG file_attr, ULONG share_access, + ULONG create_disposition, ULONG create_options, void *ea_buffer, + ULONG ea_length) +{ + struct common_object_header *coh; + struct file_object *fo; + struct ansi_string ansi; + struct wrap_bin_file *bin_file; + char *file_basename; + NTSTATUS status; + + spin_lock_bh(&ntoskernel_lock); + nt_list_for_each_entry(coh, &object_list, list) { + if (coh->type != OBJECT_TYPE_FILE) + continue; + /* TODO: check if file is opened in shared mode */ + if (!RtlCompareUnicodeString(&coh->name, obj_attr->name, TRUE)) { + fo = HEADER_TO_OBJECT(coh); + bin_file = fo->wrap_bin_file; + *handle = coh; + spin_unlock_bh(&ntoskernel_lock); + ObReferenceObject(fo); + iosb->status = FILE_OPENED; + iosb->info = bin_file->size; + EXIT2(return STATUS_SUCCESS); + } + } + spin_unlock_bh(&ntoskernel_lock); + + if (RtlUnicodeStringToAnsiString(&ansi, obj_attr->name, TRUE) != + STATUS_SUCCESS) + EXIT2(return STATUS_INSUFFICIENT_RESOURCES); + + file_basename = strrchr(ansi.buf, '\\'); + if (file_basename) + file_basename++; + else + file_basename = ansi.buf; + TRACE2("file: '%s', '%s'", ansi.buf, file_basename); + + fo = allocate_object(sizeof(struct file_object), OBJECT_TYPE_FILE, + obj_attr->name); + if (!fo) { + RtlFreeAnsiString(&ansi); + iosb->status = STATUS_INSUFFICIENT_RESOURCES; + iosb->info = 0; + EXIT2(return STATUS_FAILURE); + } + coh = OBJECT_TO_HEADER(fo); + bin_file = get_bin_file(file_basename); + if (bin_file) { + TRACE2("%s, %s", bin_file->name, file_basename); + fo->flags = FILE_OPENED; + } else if (access_mask & FILE_WRITE_DATA) { + bin_file = kzalloc(sizeof(*bin_file), GFP_KERNEL); + if (bin_file) { + strncpy(bin_file->name, file_basename, + sizeof(bin_file->name)); + bin_file->name[sizeof(bin_file->name)-1] = 0; + bin_file->data = vmalloc(*size); + if (bin_file->data) { + memset(bin_file->data, 0, *size); + bin_file->size = *size; + fo->flags = FILE_CREATED; + } else { + kfree(bin_file); + bin_file = NULL; + } + } + } else + bin_file = NULL; + + RtlFreeAnsiString(&ansi); + if (!bin_file) { + iosb->status = FILE_DOES_NOT_EXIST; + iosb->info = 0; + free_object(fo); + EXIT2(return STATUS_FAILURE); + } + + fo->wrap_bin_file = bin_file; + fo->current_byte_offset = 0; + if (access_mask & FILE_READ_DATA) + fo->read_access = TRUE; + if (access_mask & FILE_WRITE_DATA) + fo->write_access = TRUE; + iosb->status = FILE_OPENED; + iosb->info = bin_file->size; + *handle = coh; + TRACE2("handle: %p", *handle); + status = STATUS_SUCCESS; + EXIT2(return status); +} + +wstdcall NTSTATUS WIN_FUNC(ZwOpenFile,6) + (void **handle, ACCESS_MASK access_mask, + struct object_attributes *obj_attr, struct io_status_block *iosb, + ULONG share_access, ULONG open_options) +{ + LARGE_INTEGER size; + return ZwCreateFile(handle, access_mask, obj_attr, iosb, &size, 0, + share_access, 0, open_options, NULL, 0); +} + +wstdcall NTSTATUS WIN_FUNC(ZwReadFile,9) + (void *handle, struct nt_event *event, void *apc_routine, + void *apc_context, struct io_status_block *iosb, void *buffer, + ULONG length, LARGE_INTEGER *byte_offset, ULONG *key) +{ + struct file_object *fo; + struct common_object_header *coh; + ULONG count; + size_t offset; + struct wrap_bin_file *file; + + TRACE2("%p", handle); + coh = handle; + if (coh->type != OBJECT_TYPE_FILE) { + ERROR("handle %p is invalid: %d", handle, coh->type); + EXIT2(return STATUS_FAILURE); + } + fo = HANDLE_TO_OBJECT(coh); + file = fo->wrap_bin_file; + TRACE2("file: %s (%zu)", file->name, file->size); + spin_lock_bh(&ntoskernel_lock); + if (byte_offset) + offset = *byte_offset; + else + offset = fo->current_byte_offset; + count = min((size_t)length, file->size - offset); + TRACE2("count: %u, offset: %zu, length: %u", count, offset, length); + memcpy(buffer, ((void *)file->data) + offset, count); + fo->current_byte_offset = offset + count; + spin_unlock_bh(&ntoskernel_lock); + iosb->status = STATUS_SUCCESS; + iosb->info = count; + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(ZwWriteFile,9) + (void *handle, struct nt_event *event, void *apc_routine, + void *apc_context, struct io_status_block *iosb, void *buffer, + ULONG length, LARGE_INTEGER *byte_offset, ULONG *key) +{ + struct file_object *fo; + struct common_object_header *coh; + struct wrap_bin_file *file; + unsigned long offset; + + TRACE2("%p", handle); + coh = handle; + if (coh->type != OBJECT_TYPE_FILE) { + ERROR("handle %p is invalid: %d", handle, coh->type); + EXIT2(return STATUS_FAILURE); + } + fo = HANDLE_TO_OBJECT(coh); + file = fo->wrap_bin_file; + TRACE2("file: %zu, %u", file->size, length); + spin_lock_bh(&ntoskernel_lock); + if (byte_offset) + offset = *byte_offset; + else + offset = fo->current_byte_offset; + if (length + offset > file->size) { + WARNING("%lu, %u", length + offset, (unsigned int)file->size); + /* TODO: implement writing past end of current size */ + iosb->status = STATUS_FAILURE; + iosb->info = 0; + } else { + memcpy(file->data + offset, buffer, length); + iosb->status = STATUS_SUCCESS; + iosb->info = length; + fo->current_byte_offset = offset + length; + } + spin_unlock_bh(&ntoskernel_lock); + EXIT2(return iosb->status); +} + +wstdcall NTSTATUS WIN_FUNC(ZwClose,1) + (void *handle) +{ + struct common_object_header *coh; + + TRACE2("%p", handle); + if (handle == NULL) { + TRACE1(""); + EXIT2(return STATUS_SUCCESS); + } + coh = handle; + if (coh->type == OBJECT_TYPE_FILE) { + struct file_object *fo; + struct wrap_bin_file *bin_file; + typeof(fo->flags) flags; + + fo = HANDLE_TO_OBJECT(handle); + flags = fo->flags; + bin_file = fo->wrap_bin_file; + if (dereference_object(fo)) { + if (flags == FILE_CREATED) { + vfree(bin_file->data); + kfree(bin_file); + } else + free_bin_file(bin_file); + } + } else if (coh->type == OBJECT_TYPE_NT_THREAD) { + struct nt_thread *thread = HANDLE_TO_OBJECT(handle); + TRACE2("thread: %p (%p)", thread, handle); + ObDereferenceObject(thread); + } else { + /* TODO: can we just dereference object here? */ + WARNING("closing handle 0x%x not implemented", coh->type); + } + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(ZwQueryInformationFile,5) + (void *handle, struct io_status_block *iosb, void *info, + ULONG length, enum file_info_class class) +{ + struct file_object *fo; + struct file_name_info *fni; + struct file_std_info *fsi; + struct wrap_bin_file *file; + struct common_object_header *coh; + + ENTER2("%p", handle); + coh = handle; + if (coh->type != OBJECT_TYPE_FILE) { + ERROR("handle %p is invalid: %d", coh, coh->type); + EXIT2(return STATUS_FAILURE); + } + fo = HANDLE_TO_OBJECT(handle); + TRACE2("fo: %p, %d", fo, class); + switch (class) { + case FileNameInformation: + fni = info; + fni->length = min(length, (typeof(length))coh->name.length); + memcpy(fni->name, coh->name.buf, fni->length); + iosb->status = STATUS_SUCCESS; + iosb->info = fni->length; + break; + case FileStandardInformation: + fsi = info; + file = fo->wrap_bin_file; + fsi->alloc_size = file->size; + fsi->eof = file->size; + fsi->num_links = 1; + fsi->delete_pending = FALSE; + fsi->dir = FALSE; + iosb->status = STATUS_SUCCESS; + iosb->info = 0; + break; + default: + WARNING("type %d not implemented yet", class); + iosb->status = STATUS_FAILURE; + iosb->info = 0; + break; + } + EXIT2(return iosb->status); +} + +wstdcall NTSTATUS WIN_FUNC(ZwOpenSection,3) + (void **handle, ACCESS_MASK access, struct object_attributes *obj_attrs) +{ + INFO("%p, 0x%x, %d", obj_attrs, obj_attrs->attributes, access); + TODO(); + *handle = obj_attrs; + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwMapViewOfSection,10) + (void *secn_handle, void *process_handle, void **base_address, + ULONG zero_bits, LARGE_INTEGER *secn_offset, SIZE_T *view_size, + enum section_inherit inherit, ULONG alloc_type, ULONG protect) +{ + INFO("%p, %p, %p", secn_handle, process_handle, base_address); + TODO(); + *base_address = (void *)0xdeadbeef; + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwUnmapViewOfSection,2) + (void *process_handle, void *base_address) +{ + INFO("%p, %p", process_handle, base_address); + TODO(); + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwCreateKey,7) + (void **handle, ACCESS_MASK desired_access, + struct object_attributes *attr, ULONG title_index, + struct unicode_string *class, ULONG create_options, + ULONG *disposition) +{ + struct ansi_string ansi; + if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) == + STATUS_SUCCESS) { + TRACE1("key: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + *handle = NULL; + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwOpenKey,3) + (void **handle, ACCESS_MASK desired_access, + struct object_attributes *attr) +{ + struct ansi_string ansi; + if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) == + STATUS_SUCCESS) { + TRACE1("key: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + *handle = NULL; + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwSetValueKey,6) + (void *handle, struct unicode_string *name, ULONG title_index, + ULONG type, void *data, ULONG data_size) +{ + struct ansi_string ansi; + if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) == + STATUS_SUCCESS) { + TRACE1("key: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwQueryValueKey,6) + (void *handle, struct unicode_string *name, + enum key_value_information_class class, void *info, + ULONG length, ULONG *res_length) +{ + struct ansi_string ansi; + if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) == STATUS_SUCCESS) { + TRACE1("key: %s", ansi.buf); + RtlFreeAnsiString(&ansi); + } + TODO(); + return STATUS_INVALID_PARAMETER; +} + +wstdcall NTSTATUS WIN_FUNC(ZwDeleteKey,1) + (void *handle) +{ + ENTER2("%p", handle); + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(ZwPowerInformation,4) + (INT info_level, void *in_buf, ULONG in_buf_len, void *out_buf, + ULONG out_buf_len) +{ + INFO("%d, %u, %u", info_level, in_buf_len, out_buf_len); + TODO(); + return STATUS_ACCESS_DENIED; +} + +wstdcall NTSTATUS WIN_FUNC(WmiSystemControl,4) + (struct wmilib_context *info, struct device_object *dev_obj, + struct irp *irp, void *irp_disposition) +{ + TODO(); + return STATUS_SUCCESS; +} + +wstdcall NTSTATUS WIN_FUNC(WmiCompleteRequest,5) + (struct device_object *dev_obj, struct irp *irp, NTSTATUS status, + ULONG buffer_used, CCHAR priority_boost) +{ + TODO(); + return STATUS_SUCCESS; +} + +noregparm NTSTATUS WIN_FUNC(WmiTraceMessage,12) + (void *tracehandle, ULONG message_flags, + void *message_guid, USHORT message_no, ...) +{ + TODO(); + EXIT2(return STATUS_SUCCESS); +} + +wstdcall NTSTATUS WIN_FUNC(WmiQueryTraceInformation,4) + (enum trace_information_class trace_info_class, void *trace_info, + ULONG *req_length, void *buf) +{ + TODO(); + EXIT2(return STATUS_SUCCESS); +} + +/* this function can't be wstdcall as it takes variable number of args */ +noregparm ULONG WIN_FUNC(DbgPrint,12) + (char *format, ...) +{ +#ifdef DEBUG + va_list args; + static char buf[100]; + + va_start(args, format); + vsnprintf(buf, sizeof(buf), format, args); + printk(KERN_DEBUG "%s (%s): %s", DRIVER_NAME, __func__, buf); + va_end(args); +#endif + return STATUS_SUCCESS; +} + +wstdcall void WIN_FUNC(KeBugCheck,1) + (ULONG code) +{ + TODO(); + return; +} + +wstdcall void WIN_FUNC(KeBugCheckEx,5) + (ULONG code, ULONG_PTR param1, ULONG_PTR param2, + ULONG_PTR param3, ULONG_PTR param4) +{ + TODO(); + return; +} + +wstdcall void WIN_FUNC(ExSystemTimeToLocalTime,2) + (LARGE_INTEGER *system_time, LARGE_INTEGER *local_time) +{ + *local_time = *system_time; +} + +wstdcall ULONG WIN_FUNC(ExSetTimerResolution,2) + (ULONG time, BOOLEAN set) +{ + /* why a driver should change system wide timer resolution is + * beyond me */ + return time; +} + +wstdcall void WIN_FUNC(DbgBreakPoint,0) + (void) +{ + TODO(); +} + +wstdcall void WIN_FUNC(_except_handler3,0) + (void) +{ + TODO(); +} + +wstdcall void WIN_FUNC(__C_specific_handler,0) + (void) +{ + TODO(); +} + +wstdcall void WIN_FUNC(_purecall,0) + (void) +{ + TODO(); +} + +wstdcall void WIN_FUNC(__chkstk,0) + (void) +{ + TODO(); +} + +struct worker_init_struct { + work_struct_t work; + struct completion completion; + struct nt_thread *nt_thread; +}; + +static void wrap_worker_init_func(worker_param_t param) +{ + struct worker_init_struct *worker_init_struct; + + worker_init_struct = + worker_param_data(param, struct worker_init_struct, work); + TRACE1("%p", worker_init_struct); + worker_init_struct->nt_thread = create_nt_thread(current); + if (!worker_init_struct->nt_thread) + WARNING("couldn't create worker thread"); + complete(&worker_init_struct->completion); +} + +struct nt_thread *wrap_worker_init(workqueue_struct_t *wq) +{ + struct worker_init_struct worker_init_struct; + + TRACE1("%p", &worker_init_struct); + init_completion(&worker_init_struct.completion); + initialize_work(&worker_init_struct.work, wrap_worker_init_func, + &worker_init_struct); + worker_init_struct.nt_thread = NULL; + if (wq) + queue_work(wq, &worker_init_struct.work); + else + schedule_work(&worker_init_struct.work); + wait_for_completion(&worker_init_struct.completion); + TRACE1("%p", worker_init_struct.nt_thread); + return worker_init_struct.nt_thread; +} + +int ntoskernel_init(void) +{ + struct timeval now; + + spin_lock_init(&dispatcher_lock); + spin_lock_init(&ntoskernel_lock); + spin_lock_init(&ntos_work_lock); + spin_lock_init(&kdpc_list_lock); + spin_lock_init(&irp_cancel_lock); + InitializeListHead(&wrap_mdl_list); + InitializeListHead(&kdpc_list); + InitializeListHead(&callback_objects); + InitializeListHead(&bus_driver_list); + InitializeListHead(&object_list); + InitializeListHead(&ntos_work_list); + + nt_spin_lock_init(&nt_list_lock); + + initialize_work(&kdpc_work, kdpc_worker, NULL); + initialize_work(&ntos_work, ntos_work_worker, NULL); + wrap_timer_slist.next = NULL; + + do_gettimeofday(&now); + wrap_ticks_to_boot = TICKS_1601_TO_1970; + wrap_ticks_to_boot += (u64)now.tv_sec * TICKSPERSEC; + wrap_ticks_to_boot += now.tv_usec * 10; + wrap_ticks_to_boot -= jiffies * TICKSPERJIFFY; + TRACE2("%Lu", wrap_ticks_to_boot); + +#ifdef WRAP_PREEMPT + do { + int cpu; + for_each_possible_cpu(cpu) { + irql_info_t *info; + info = &per_cpu(irql_info, cpu); + mutex_init(&(info->lock)); + info->task = NULL; + info->count = 0; + } + } while (0); +#endif + + ntos_wq = create_singlethread_workqueue("ntos_wq"); + if (!ntos_wq) { + WARNING("couldn't create ntos_wq thread"); + return -ENOMEM; + } + ntos_worker_thread = wrap_worker_init(ntos_wq); + TRACE1("%p", ntos_worker_thread); + + if (add_bus_driver("PCI") +#ifdef ENABLE_USB + || add_bus_driver("USB") +#endif + ) { + ntoskernel_exit(); + return -ENOMEM; + } + mdl_cache = + wrap_kmem_cache_create("wrap_mdl", + sizeof(struct wrap_mdl) + MDL_CACHE_SIZE, + 0, 0); + TRACE2("%p", mdl_cache); + if (!mdl_cache) { + ERROR("couldn't allocate MDL cache"); + ntoskernel_exit(); + return -ENOMEM; + } + +#if defined(CONFIG_X86_64) + memset(&kuser_shared_data, 0, sizeof(kuser_shared_data)); + *((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601(); + init_timer(&shared_data_timer); + shared_data_timer.function = update_user_shared_data_proc; + shared_data_timer.data = (unsigned long)0; +#endif + return 0; +} + +int ntoskernel_init_device(struct wrap_device *wd) +{ +#if defined(CONFIG_X86_64) + if (kuser_shared_data.reserved1) + mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30)); +#endif + return 0; +} + +void ntoskernel_exit_device(struct wrap_device *wd) +{ + ENTER2(""); + + KeFlushQueuedDpcs(); + EXIT2(return); +} + +void ntoskernel_exit(void) +{ + struct nt_list *cur; + + ENTER2(""); + + /* free kernel (Ke) timers */ + TRACE2("freeing timers"); + while (1) { + struct wrap_timer *wrap_timer; + struct nt_slist *slist; + + spin_lock_bh(&ntoskernel_lock); + if ((slist = wrap_timer_slist.next)) + wrap_timer_slist.next = slist->next; + spin_unlock_bh(&ntoskernel_lock); + TIMERTRACE("%p", slist); + if (!slist) + break; + wrap_timer = container_of(slist, struct wrap_timer, slist); + if (del_timer_sync(&wrap_timer->timer)) + WARNING("Buggy Windows driver left timer %p running", + wrap_timer->nt_timer); + memset(wrap_timer, 0, sizeof(*wrap_timer)); + slack_kfree(wrap_timer); + } + + TRACE2("freeing MDLs"); + if (mdl_cache) { + spin_lock_bh(&ntoskernel_lock); + if (!IsListEmpty(&wrap_mdl_list)) + ERROR("Windows driver didn't free all MDLs; " + "freeing them now"); + while ((cur = RemoveHeadList(&wrap_mdl_list))) { + struct wrap_mdl *wrap_mdl; + wrap_mdl = container_of(cur, struct wrap_mdl, list); + if (wrap_mdl->mdl->flags & MDL_CACHE_ALLOCATED) + kmem_cache_free(mdl_cache, wrap_mdl); + else + kfree(wrap_mdl); + } + spin_unlock_bh(&ntoskernel_lock); + kmem_cache_destroy(mdl_cache); + mdl_cache = NULL; + } + + TRACE2("freeing callbacks"); + spin_lock_bh(&ntoskernel_lock); + while ((cur = RemoveHeadList(&callback_objects))) { + struct callback_object *object; + struct nt_list *ent; + object = container_of(cur, struct callback_object, list); + while ((ent = RemoveHeadList(&object->callback_funcs))) { + struct callback_func *f; + f = container_of(ent, struct callback_func, list); + kfree(f); + } + kfree(object); + } + spin_unlock_bh(&ntoskernel_lock); + + spin_lock_bh(&ntoskernel_lock); + while ((cur = RemoveHeadList(&bus_driver_list))) { + struct bus_driver *bus_driver; + bus_driver = container_of(cur, struct bus_driver, list); + /* TODO: make sure all all drivers are shutdown/removed */ + kfree(bus_driver); + } + spin_unlock_bh(&ntoskernel_lock); + +#if defined(CONFIG_X86_64) + del_timer_sync(&shared_data_timer); +#endif + if (ntos_wq) + destroy_workqueue(ntos_wq); + TRACE1("%p", ntos_worker_thread); + if (ntos_worker_thread) + ObDereferenceObject(ntos_worker_thread); + ENTER2("freeing objects"); + spin_lock_bh(&ntoskernel_lock); + while ((cur = RemoveHeadList(&object_list))) { + struct common_object_header *hdr; + hdr = container_of(cur, struct common_object_header, list); + if (hdr->type == OBJECT_TYPE_NT_THREAD) + TRACE1("object %p(%d) was not freed, freeing it now", + HEADER_TO_OBJECT(hdr), hdr->type); + else + WARNING("object %p(%d) was not freed, freeing it now", + HEADER_TO_OBJECT(hdr), hdr->type); + ExFreePool(hdr); + } + spin_unlock_bh(&ntoskernel_lock); + + EXIT2(return); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/longlong.h +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/longlong.h @@ -0,0 +1,1333 @@ +/* longlong.h -- definitions for mixed size 32/64 bit arithmetic. + Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000 + Free Software Foundation, Inc. + + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +/* You have to define the following before including this file: + + UWtype -- An unsigned type, default type for operations (typically a "word") + UHWtype -- An unsigned type, at least half the size of UWtype. + UDWtype -- An unsigned type, at least twice as large a UWtype + W_TYPE_SIZE -- size in bits of UWtype + + UQItype -- Unsigned 8 bit type. + SItype, USItype -- Signed and unsigned 32 bit types. + DItype, UDItype -- Signed and unsigned 64 bit types. + + On a 32 bit machine UWtype should typically be USItype; + on a 64 bit machine, UWtype should typically be UDItype. +*/ + +#define __BITS4 (W_TYPE_SIZE / 4) +#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) +#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) +#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2)) + +#ifndef W_TYPE_SIZE +#define W_TYPE_SIZE 32 +#define UWtype USItype +#define UHWtype USItype +#define UDWtype UDItype +#endif + +/* Define auxiliary asm macros. + + 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two + UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype + word product in HIGH_PROD and LOW_PROD. + + 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a + UDWtype product. This is just a variant of umul_ppmm. + + 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator, + denominator) divides a UDWtype, composed by the UWtype integers + HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient + in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less + than DENOMINATOR for correct operation. If, in addition, the most + significant bit of DENOMINATOR must be 1, then the pre-processor symbol + UDIV_NEEDS_NORMALIZATION is defined to 1. + + 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator, + denominator). Like udiv_qrnnd but the numbers are signed. The quotient + is rounded towards 0. + + 5) count_leading_zeros(count, x) counts the number of zero-bits from the + msb to the first nonzero bit in the UWtype X. This is the number of + steps X needs to be shifted left to set the msb. Undefined for X == 0, + unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value. + + 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts + from the least significant end. + + 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1, + high_addend_2, low_addend_2) adds two UWtype integers, composed by + HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2 + respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow + (i.e. carry out) is not stored anywhere, and is lost. + + 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend, + high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers, + composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and + LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE + and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere, + and is lost. + + If any of these macros are left undefined for a particular CPU, + C macros are used. */ + +/* The CPUs come in alphabetical order below. + + Please add support for more CPUs here, or improve the current support + for the CPUs below! + (E.g. WE32100, IBM360.) */ + +#if defined (__GNUC__) && !defined (NO_ASM) + +/* We sometimes need to clobber "cc" with gcc2, but that would not be + understood by gcc1. Use cpp to avoid major code duplication. */ +#if __GNUC__ < 2 +#define __CLOBBER_CC +#define __AND_CLOBBER_CC +#else /* __GNUC__ >= 2 */ +#define __CLOBBER_CC : "cc" +#define __AND_CLOBBER_CC , "cc" +#endif /* __GNUC__ < 2 */ + +#if defined (__alpha) && W_TYPE_SIZE == 64 +#define umul_ppmm(ph, pl, m0, m1) \ + do { \ + UDItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("umulh %r1,%2,%0" \ + : "=r" ((UDItype) ph) \ + : "%rJ" (__m0), \ + "rI" (__m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define UMUL_TIME 46 +#ifndef LONGLONG_STANDALONE +#define udiv_qrnnd(q, r, n1, n0, d) \ + do { UDItype __r; \ + (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ + (r) = __r; \ + } while (0) +extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype); +#define UDIV_TIME 220 +#endif /* LONGLONG_STANDALONE */ +#ifdef __alpha_cix__ +#define count_leading_zeros(COUNT,X) \ + __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X)) +#define count_trailing_zeros(COUNT,X) \ + __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X)) +#define COUNT_LEADING_ZEROS_0 64 +#else +extern const UQItype __clz_tab[]; +#define count_leading_zeros(COUNT,X) \ + do { \ + UDItype __xr = (X), __t, __a; \ + __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \ + __a = __clz_tab[__t ^ 0xff] - 1; \ + __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \ + (COUNT) = 64 - (__clz_tab[__t] + __a*8); \ + } while (0) +#define count_trailing_zeros(COUNT,X) \ + do { \ + UDItype __xr = (X), __t, __a; \ + __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr)); \ + __t = ~__t & -~__t; \ + __a = ((__t & 0xCC) != 0) * 2; \ + __a += ((__t & 0xF0) != 0) * 4; \ + __a += ((__t & 0xAA) != 0); \ + __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a)); \ + __a <<= 3; \ + __t &= -__t; \ + __a += ((__t & 0xCC) != 0) * 2; \ + __a += ((__t & 0xF0) != 0) * 4; \ + __a += ((__t & 0xAA) != 0); \ + (COUNT) = __a; \ + } while (0) +#endif /* __alpha_cix__ */ +#endif /* __alpha */ + +#if defined (__arc__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%r" ((USItype) (ah)), \ + "rIJ" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ + "rIJ" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "r" ((USItype) (ah)), \ + "rIJ" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rIJ" ((USItype) (bl))) +/* Call libgcc routine. */ +#define umul_ppmm(w1, w0, u, v) \ +do { \ + DWunion __w; \ + __w.ll = __umulsidi3 (u, v); \ + w1 = __w.s.high; \ + w0 = __w.s.low; \ +} while (0) +#define __umulsidi3 __umulsidi3 +UDItype __umulsidi3 (USItype, USItype); +#endif + +#if defined (__arm__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "r" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rI" ((USItype) (bl))) +#define umul_ppmm(xh, xl, a, b) \ +{register USItype __t0, __t1, __t2; \ + __asm__ ("%@ Inlined umul_ppmm\n" \ + " mov %2, %5, lsr #16\n" \ + " mov %0, %6, lsr #16\n" \ + " bic %3, %5, %2, lsl #16\n" \ + " bic %4, %6, %0, lsl #16\n" \ + " mul %1, %3, %4\n" \ + " mul %4, %2, %4\n" \ + " mul %3, %0, %3\n" \ + " mul %0, %2, %0\n" \ + " adds %3, %4, %3\n" \ + " addcs %0, %0, #65536\n" \ + " adds %1, %1, %3, lsl #16\n" \ + " adc %0, %0, %3, lsr #16" \ + : "=&r" ((USItype) (xh)), \ + "=r" ((USItype) (xl)), \ + "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ + : "r" ((USItype) (a)), \ + "r" ((USItype) (b)));} +#define UMUL_TIME 20 +#define UDIV_TIME 100 +#endif /* __arm__ */ + +#if defined (__hppa) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%rM" ((USItype) (ah)), \ + "rM" ((USItype) (bh)), \ + "%rM" ((USItype) (al)), \ + "rM" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "rM" ((USItype) (ah)), \ + "rM" ((USItype) (bh)), \ + "rM" ((USItype) (al)), \ + "rM" ((USItype) (bl))) +#if defined (_PA_RISC1_1) +#define umul_ppmm(w1, w0, u, v) \ + do { \ + union \ + { \ + UDItype __f; \ + struct {USItype __w1, __w0;} __w1w0; \ + } __t; \ + __asm__ ("xmpyu %1,%2,%0" \ + : "=x" (__t.__f) \ + : "x" ((USItype) (u)), \ + "x" ((USItype) (v))); \ + (w1) = __t.__w1w0.__w1; \ + (w0) = __t.__w1w0.__w0; \ + } while (0) +#define UMUL_TIME 8 +#else +#define UMUL_TIME 30 +#endif +#define UDIV_TIME 40 +#define count_leading_zeros(count, x) \ + do { \ + USItype __tmp; \ + __asm__ ( \ + "ldi 1,%0\n" \ +" extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n" \ +" extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n"\ +" ldo 16(%0),%0 ; Yes. Perform add.\n" \ +" extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n" \ +" extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n"\ +" ldo 8(%0),%0 ; Yes. Perform add.\n" \ +" extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n" \ +" extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n"\ +" ldo 4(%0),%0 ; Yes. Perform add.\n" \ +" extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n" \ +" extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n"\ +" ldo 2(%0),%0 ; Yes. Perform add.\n" \ +" extru %1,30,1,%1 ; Extract bit 1.\n" \ +" sub %0,%1,%0 ; Subtract it.\n" \ + : "=r" (count), "=r" (__tmp) : "1" (x)); \ + } while (0) +#endif + +#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32 +#define umul_ppmm(xh, xl, m0, m1) \ + do { \ + union {UDItype __ll; \ + struct {USItype __h, __l;} __i; \ + } __xx; \ + USItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mr %0,%3" \ + : "=r" (__xx.__i.__h), \ + "=r" (__xx.__i.__l) \ + : "%1" (__m0), \ + "r" (__m1)); \ + (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ + (xh) += ((((SItype) __m0 >> 31) & __m1) \ + + (((SItype) __m1 >> 31) & __m0)); \ + } while (0) +#define smul_ppmm(xh, xl, m0, m1) \ + do { \ + union {DItype __ll; \ + struct {USItype __h, __l;} __i; \ + } __xx; \ + __asm__ ("mr %0,%3" \ + : "=r" (__xx.__i.__h), \ + "=r" (__xx.__i.__l) \ + : "%1" (m0), \ + "r" (m1)); \ + (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ + } while (0) +#define sdiv_qrnnd(q, r, n1, n0, d) \ + do { \ + union {DItype __ll; \ + struct {USItype __h, __l;} __i; \ + } __xx; \ + __xx.__i.__h = n1; __xx.__i.__l = n0; \ + __asm__ ("dr %0,%2" \ + : "=r" (__xx.__ll) \ + : "0" (__xx.__ll), "r" (d)); \ + (q) = __xx.__i.__l; (r) = __xx.__i.__h; \ + } while (0) +#endif + +#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addl %5,%1\n\tadcl %3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%0" ((USItype) (ah)), \ + "g" ((USItype) (bh)), \ + "%1" ((USItype) (al)), \ + "g" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subl %5,%1\n\tsbbl %3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "0" ((USItype) (ah)), \ + "g" ((USItype) (bh)), \ + "1" ((USItype) (al)), \ + "g" ((USItype) (bl))) +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("mull %3" \ + : "=a" ((USItype) (w0)), \ + "=d" ((USItype) (w1)) \ + : "%0" ((USItype) (u)), \ + "rm" ((USItype) (v))) +#define udiv_qrnnd(q, r, n1, n0, dv) \ + __asm__ ("divl %4" \ + : "=a" ((USItype) (q)), \ + "=d" ((USItype) (r)) \ + : "0" ((USItype) (n0)), \ + "1" ((USItype) (n1)), \ + "rm" ((USItype) (dv))) +#define count_leading_zeros(count, x) \ + do { \ + USItype __cbtmp; \ + __asm__ ("bsrl %1,%0" \ + : "=r" (__cbtmp) : "rm" ((USItype) (x))); \ + (count) = __cbtmp ^ 31; \ + } while (0) +#define count_trailing_zeros(count, x) \ + __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x))) +#define UMUL_TIME 40 +#define UDIV_TIME 40 +#endif /* 80x86 */ + +#if defined (__i960__) && W_TYPE_SIZE == 32 +#define umul_ppmm(w1, w0, u, v) \ + ({union {UDItype __ll; \ + struct {USItype __l, __h;} __i; \ + } __xx; \ + __asm__ ("emul %2,%1,%0" \ + : "=d" (__xx.__ll) \ + : "%dI" ((USItype) (u)), \ + "dI" ((USItype) (v))); \ + (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) +#define __umulsidi3(u, v) \ + ({UDItype __w; \ + __asm__ ("emul %2,%1,%0" \ + : "=d" (__w) \ + : "%dI" ((USItype) (u)), \ + "dI" ((USItype) (v))); \ + __w; }) +#endif /* __i960__ */ + +#if defined (__M32R__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + /* The cmp clears the condition bit. */ \ + __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%0" ((USItype) (ah)), \ + "r" ((USItype) (bh)), \ + "%1" ((USItype) (al)), \ + "r" ((USItype) (bl)) \ + : "cbit") +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + /* The cmp clears the condition bit. */ \ + __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "0" ((USItype) (ah)), \ + "r" ((USItype) (bh)), \ + "1" ((USItype) (al)), \ + "r" ((USItype) (bl)) \ + : "cbit") +#endif /* __M32R__ */ + +#if defined (__mc68000__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \ + : "=d" ((USItype) (sh)), \ + "=&d" ((USItype) (sl)) \ + : "%0" ((USItype) (ah)), \ + "d" ((USItype) (bh)), \ + "%1" ((USItype) (al)), \ + "g" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \ + : "=d" ((USItype) (sh)), \ + "=&d" ((USItype) (sl)) \ + : "0" ((USItype) (ah)), \ + "d" ((USItype) (bh)), \ + "1" ((USItype) (al)), \ + "g" ((USItype) (bl))) + +/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */ +#if defined (__mc68020__) || defined(mc68020) \ + || defined(__mc68030__) || defined(mc68030) \ + || defined(__mc68040__) || defined(mc68040) \ + || defined(__mcpu32__) || defined(mcpu32) +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("mulu%.l %3,%1:%0" \ + : "=d" ((USItype) (w0)), \ + "=d" ((USItype) (w1)) \ + : "%0" ((USItype) (u)), \ + "dmi" ((USItype) (v))) +#define UMUL_TIME 45 +#define udiv_qrnnd(q, r, n1, n0, d) \ + __asm__ ("divu%.l %4,%1:%0" \ + : "=d" ((USItype) (q)), \ + "=d" ((USItype) (r)) \ + : "0" ((USItype) (n0)), \ + "1" ((USItype) (n1)), \ + "dmi" ((USItype) (d))) +#define UDIV_TIME 90 +#define sdiv_qrnnd(q, r, n1, n0, d) \ + __asm__ ("divs%.l %4,%1:%0" \ + : "=d" ((USItype) (q)), \ + "=d" ((USItype) (r)) \ + : "0" ((USItype) (n0)), \ + "1" ((USItype) (n1)), \ + "dmi" ((USItype) (d))) + +#else /* not mc68020 */ +#if !defined(__mcf5200__) +/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */ +#define umul_ppmm(xh, xl, a, b) \ + __asm__ ("| Inlined umul_ppmm\n" \ + " move%.l %2,%/d0\n" \ + " move%.l %3,%/d1\n" \ + " move%.l %/d0,%/d2\n" \ + " swap %/d0\n" \ + " move%.l %/d1,%/d3\n" \ + " swap %/d1\n" \ + " move%.w %/d2,%/d4\n" \ + " mulu %/d3,%/d4\n" \ + " mulu %/d1,%/d2\n" \ + " mulu %/d0,%/d3\n" \ + " mulu %/d0,%/d1\n" \ + " move%.l %/d4,%/d0\n" \ + " eor%.w %/d0,%/d0\n" \ + " swap %/d0\n" \ + " add%.l %/d0,%/d2\n" \ + " add%.l %/d3,%/d2\n" \ + " jcc 1f\n" \ + " add%.l %#65536,%/d1\n" \ + "1: swap %/d2\n" \ + " moveq %#0,%/d0\n" \ + " move%.w %/d2,%/d0\n" \ + " move%.w %/d4,%/d2\n" \ + " move%.l %/d2,%1\n" \ + " add%.l %/d1,%/d0\n" \ + " move%.l %/d0,%0" \ + : "=g" ((USItype) (xh)), \ + "=g" ((USItype) (xl)) \ + : "g" ((USItype) (a)), \ + "g" ((USItype) (b)) \ + : "d0", "d1", "d2", "d3", "d4") +#define UMUL_TIME 100 +#define UDIV_TIME 400 +#endif /* not mcf5200 */ +#endif /* not mc68020 */ + +/* The '020, '030, '040 and '060 have bitfield insns. */ +#if defined (__mc68020__) || defined(mc68020) \ + || defined(__mc68030__) || defined(mc68030) \ + || defined(__mc68040__) || defined(mc68040) \ + || defined(__mc68060__) || defined(mc68060) +#define count_leading_zeros(count, x) \ + __asm__ ("bfffo %1{%b2:%b2},%0" \ + : "=d" ((USItype) (count)) \ + : "od" ((USItype) (x)), "n" (0)) +#endif +#endif /* mc68000 */ + +#if defined (__m88000__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%rJ" ((USItype) (ah)), \ + "rJ" ((USItype) (bh)), \ + "%rJ" ((USItype) (al)), \ + "rJ" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "rJ" ((USItype) (ah)), \ + "rJ" ((USItype) (bh)), \ + "rJ" ((USItype) (al)), \ + "rJ" ((USItype) (bl))) +#define count_leading_zeros(count, x) \ + do { \ + USItype __cbtmp; \ + __asm__ ("ff1 %0,%1" \ + : "=r" (__cbtmp) \ + : "r" ((USItype) (x))); \ + (count) = __cbtmp ^ 31; \ + } while (0) +#define COUNT_LEADING_ZEROS_0 63 /* sic */ +#if defined (__mc88110__) +#define umul_ppmm(wh, wl, u, v) \ + do { \ + union {UDItype __ll; \ + struct {USItype __h, __l;} __i; \ + } __xx; \ + __asm__ ("mulu.d %0,%1,%2" \ + : "=r" (__xx.__ll) \ + : "r" ((USItype) (u)), \ + "r" ((USItype) (v))); \ + (wh) = __xx.__i.__h; \ + (wl) = __xx.__i.__l; \ + } while (0) +#define udiv_qrnnd(q, r, n1, n0, d) \ + ({union {UDItype __ll; \ + struct {USItype __h, __l;} __i; \ + } __xx; \ + USItype __q; \ + __xx.__i.__h = (n1); __xx.__i.__l = (n0); \ + __asm__ ("divu.d %0,%1,%2" \ + : "=r" (__q) \ + : "r" (__xx.__ll), \ + "r" ((USItype) (d))); \ + (r) = (n0) - __q * (d); (q) = __q; }) +#define UMUL_TIME 5 +#define UDIV_TIME 25 +#else +#define UMUL_TIME 17 +#define UDIV_TIME 150 +#endif /* __mc88110__ */ +#endif /* __m88000__ */ + +#if defined (__mips__) && W_TYPE_SIZE == 32 +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("multu %2,%3" \ + : "=l" ((USItype) (w0)), \ + "=h" ((USItype) (w1)) \ + : "d" ((USItype) (u)), \ + "d" ((USItype) (v))) +#define UMUL_TIME 10 +#define UDIV_TIME 100 +#endif /* __mips__ */ + +#if defined (__ns32000__) && W_TYPE_SIZE == 32 +#define umul_ppmm(w1, w0, u, v) \ + ({union {UDItype __ll; \ + struct {USItype __l, __h;} __i; \ + } __xx; \ + __asm__ ("meid %2,%0" \ + : "=g" (__xx.__ll) \ + : "%0" ((USItype) (u)), \ + "g" ((USItype) (v))); \ + (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) +#define __umulsidi3(u, v) \ + ({UDItype __w; \ + __asm__ ("meid %2,%0" \ + : "=g" (__w) \ + : "%0" ((USItype) (u)), \ + "g" ((USItype) (v))); \ + __w; }) +#define udiv_qrnnd(q, r, n1, n0, d) \ + ({union {UDItype __ll; \ + struct {USItype __l, __h;} __i; \ + } __xx; \ + __xx.__i.__h = (n1); __xx.__i.__l = (n0); \ + __asm__ ("deid %2,%0" \ + : "=g" (__xx.__ll) \ + : "0" (__xx.__ll), \ + "g" ((USItype) (d))); \ + (r) = __xx.__i.__l; (q) = __xx.__i.__h; }) +#define count_trailing_zeros(count,x) \ + do { \ + __asm__ ("ffsd %2,%0" \ + : "=r" ((USItype) (count)) \ + : "0" ((USItype) 0), \ + "r" ((USItype) (x))); \ + } while (0) +#endif /* __ns32000__ */ + +/* FIXME: We should test _IBMR2 here when we add assembly support for the + system vendor compilers. + FIXME: What's needed for gcc PowerPC VxWorks? __vxworks__ is not good + enough, since that hits ARM and m68k too. */ +#if (defined (_ARCH_PPC) /* AIX */ \ + || defined (_ARCH_PWR) /* AIX */ \ + || defined (_ARCH_COM) /* AIX */ \ + || defined (__powerpc__) /* gcc */ \ + || defined (__POWERPC__) /* BEOS */ \ + || defined (__ppc__) /* Darwin */ \ + || defined (PPC) /* GNU/Linux, SysV */ \ + ) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ + else \ + __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ + : "=r" (sh), "=&r" (sl) \ + : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ + } while (0) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (ah) && (ah) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ + else \ + __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ + } while (0) +#define count_leading_zeros(count, x) \ + __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x)) +#define COUNT_LEADING_ZEROS_0 32 +#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \ + || defined (__ppc__) || defined (PPC) || defined (__vxworks__) +#define umul_ppmm(ph, pl, m0, m1) \ + do { \ + USItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define UMUL_TIME 15 +#define smul_ppmm(ph, pl, m0, m1) \ + do { \ + SItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define SMUL_TIME 14 +#define UDIV_TIME 120 +#elif defined (_ARCH_PWR) +#define UMUL_TIME 8 +#define smul_ppmm(xh, xl, m0, m1) \ + __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1)) +#define SMUL_TIME 4 +#define sdiv_qrnnd(q, r, nh, nl, d) \ + __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d)) +#define UDIV_TIME 100 +#endif +#endif /* 32-bit POWER architecture variants. */ + +/* We should test _IBMR2 here when we add assembly support for the system + vendor compilers. */ +#if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ + else \ + __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ + : "=r" (sh), "=&r" (sl) \ + : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ + } while (0) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (ah) && (ah) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ + else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ + : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ + else \ + __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ + } while (0) +#define count_leading_zeros(count, x) \ + __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x)) +#define COUNT_LEADING_ZEROS_0 64 +#define umul_ppmm(ph, pl, m0, m1) \ + do { \ + UDItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define UMUL_TIME 15 +#define smul_ppmm(ph, pl, m0, m1) \ + do { \ + DItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define SMUL_TIME 14 /* ??? */ +#define UDIV_TIME 120 /* ??? */ +#endif /* 64-bit PowerPC. */ + +#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("a %1,%5\n\tae %0,%3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%0" ((USItype) (ah)), \ + "r" ((USItype) (bh)), \ + "%1" ((USItype) (al)), \ + "r" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("s %1,%5\n\tse %0,%3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "0" ((USItype) (ah)), \ + "r" ((USItype) (bh)), \ + "1" ((USItype) (al)), \ + "r" ((USItype) (bl))) +#define umul_ppmm(ph, pl, m0, m1) \ + do { \ + USItype __m0 = (m0), __m1 = (m1); \ + __asm__ ( \ + "s r2,r2\n" \ +" mts r10,%2\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" m r2,%3\n" \ +" cas %0,r2,r0\n" \ +" mfs r10,%1" \ + : "=r" ((USItype) (ph)), \ + "=r" ((USItype) (pl)) \ + : "%r" (__m0), \ + "r" (__m1) \ + : "r2"); \ + (ph) += ((((SItype) __m0 >> 31) & __m1) \ + + (((SItype) __m1 >> 31) & __m0)); \ + } while (0) +#define UMUL_TIME 20 +#define UDIV_TIME 200 +#define count_leading_zeros(count, x) \ + do { \ + if ((x) >= 0x10000) \ + __asm__ ("clz %0,%1" \ + : "=r" ((USItype) (count)) \ + : "r" ((USItype) (x) >> 16)); \ + else \ + { \ + __asm__ ("clz %0,%1" \ + : "=r" ((USItype) (count)) \ + : "r" ((USItype) (x))); \ + (count) += 16; \ + } \ + } while (0) +#endif + +#if defined (__sh2__) && W_TYPE_SIZE == 32 +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ( \ + "dmulu.l %2,%3\n\tsts macl,%1\n\tsts mach,%0" \ + : "=r" ((USItype)(w1)), \ + "=r" ((USItype)(w0)) \ + : "r" ((USItype)(u)), \ + "r" ((USItype)(v)) \ + : "macl", "mach") +#define UMUL_TIME 5 +#endif + +#if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32 +#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v) +#define count_leading_zeros(count, x) \ + do \ + { \ + UDItype x_ = (USItype)(x); \ + SItype c_; \ + \ + __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_)); \ + (count) = c_ - 31; \ + } \ + while (0) +#define COUNT_LEADING_ZEROS_0 32 +#endif + +#if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \ + && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%rJ" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "%rJ" ((USItype) (al)), \ + "rI" ((USItype) (bl)) \ + __CLOBBER_CC) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "rJ" ((USItype) (ah)), \ + "rI" ((USItype) (bh)), \ + "rJ" ((USItype) (al)), \ + "rI" ((USItype) (bl)) \ + __CLOBBER_CC) +#if defined (__sparc_v8__) +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("umul %2,%3,%1;rd %%y,%0" \ + : "=r" ((USItype) (w1)), \ + "=r" ((USItype) (w0)) \ + : "r" ((USItype) (u)), \ + "r" ((USItype) (v))) +#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ + __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\ + : "=&r" ((USItype) (__q)), \ + "=&r" ((USItype) (__r)) \ + : "r" ((USItype) (__n1)), \ + "r" ((USItype) (__n0)), \ + "r" ((USItype) (__d))) +#else +#if defined (__sparclite__) +/* This has hardware multiply but not divide. It also has two additional + instructions scan (ffs from high bit) and divscc. */ +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("umul %2,%3,%1;rd %%y,%0" \ + : "=r" ((USItype) (w1)), \ + "=r" ((USItype) (w0)) \ + : "r" ((USItype) (u)), \ + "r" ((USItype) (v))) +#define udiv_qrnnd(q, r, n1, n0, d) \ + __asm__ ("! Inlined udiv_qrnnd\n" \ +" wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \ +" tst %%g0\n" \ +" divscc %3,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%%g1\n" \ +" divscc %%g1,%4,%0\n" \ +" rd %%y,%1\n" \ +" bl,a 1f\n" \ +" add %1,%4,%1\n" \ +"1: ! End of inline udiv_qrnnd" \ + : "=r" ((USItype) (q)), \ + "=r" ((USItype) (r)) \ + : "r" ((USItype) (n1)), \ + "r" ((USItype) (n0)), \ + "rI" ((USItype) (d)) \ + : "g1" __AND_CLOBBER_CC) +#define UDIV_TIME 37 +#define count_leading_zeros(count, x) \ + do { \ + __asm__ ("scan %1,1,%0" \ + : "=r" ((USItype) (count)) \ + : "r" ((USItype) (x))); \ + } while (0) +/* Early sparclites return 63 for an argument of 0, but they warn that future + implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0 + undefined. */ +#else +/* SPARC without integer multiplication and divide instructions. + (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */ +#define umul_ppmm(w1, w0, u, v) \ + __asm__ ("! Inlined umul_ppmm\n" \ +" wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n"\ +" sra %3,31,%%o5 ! Don't move this insn\n" \ +" and %2,%%o5,%%o5 ! Don't move this insn\n" \ +" andcc %%g0,0,%%g1 ! Don't move this insn\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,%3,%%g1\n" \ +" mulscc %%g1,0,%%g1\n" \ +" add %%g1,%%o5,%0\n" \ +" rd %%y,%1" \ + : "=r" ((USItype) (w1)), \ + "=r" ((USItype) (w0)) \ + : "%rI" ((USItype) (u)), \ + "r" ((USItype) (v)) \ + : "g1", "o5" __AND_CLOBBER_CC) +#define UMUL_TIME 39 /* 39 instructions */ +/* It's quite necessary to add this much assembler for the sparc. + The default udiv_qrnnd (in C) is more than 10 times slower! */ +#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \ + __asm__ ("! Inlined udiv_qrnnd\n" \ +" mov 32,%%g1\n" \ +" subcc %1,%2,%%g0\n" \ +"1: bcs 5f\n" \ +" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ +" sub %1,%2,%1 ! this kills msb of n\n" \ +" addx %1,%1,%1 ! so this can't give carry\n" \ +" subcc %%g1,1,%%g1\n" \ +"2: bne 1b\n" \ +" subcc %1,%2,%%g0\n" \ +" bcs 3f\n" \ +" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \ +" b 3f\n" \ +" sub %1,%2,%1 ! this kills msb of n\n" \ +"4: sub %1,%2,%1\n" \ +"5: addxcc %1,%1,%1\n" \ +" bcc 2b\n" \ +" subcc %%g1,1,%%g1\n" \ +"! Got carry from n. Subtract next step to cancel this carry.\n" \ +" bne 4b\n" \ +" addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n" \ +" sub %1,%2,%1\n" \ +"3: xnor %0,0,%0\n" \ +" ! End of inline udiv_qrnnd" \ + : "=&r" ((USItype) (__q)), \ + "=&r" ((USItype) (__r)) \ + : "r" ((USItype) (__d)), \ + "1" ((USItype) (__n1)), \ + "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC) +#define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */ +#endif /* __sparclite__ */ +#endif /* __sparc_v8__ */ +#endif /* sparc32 */ + +#if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \ + && W_TYPE_SIZE == 64 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addcc %r4,%5,%1\n\t" \ + "add %r2,%3,%0\n\t" \ + "bcs,a,pn %%xcc, 1f\n\t" \ + "add %0, 1, %0\n" \ + "1:" \ + : "=r" ((UDItype)(sh)), \ + "=&r" ((UDItype)(sl)) \ + : "%rJ" ((UDItype)(ah)), \ + "rI" ((UDItype)(bh)), \ + "%rJ" ((UDItype)(al)), \ + "rI" ((UDItype)(bl)) \ + __CLOBBER_CC) + +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subcc %r4,%5,%1\n\t" \ + "sub %r2,%3,%0\n\t" \ + "bcs,a,pn %%xcc, 1f\n\t" \ + "sub %0, 1, %0\n\t" \ + "1:" \ + : "=r" ((UDItype)(sh)), \ + "=&r" ((UDItype)(sl)) \ + : "rJ" ((UDItype)(ah)), \ + "rI" ((UDItype)(bh)), \ + "rJ" ((UDItype)(al)), \ + "rI" ((UDItype)(bl)) \ + __CLOBBER_CC) + +#define umul_ppmm(wh, wl, u, v) \ + do { \ + UDItype tmp1, tmp2, tmp3, tmp4; \ + __asm__ __volatile__ ( \ + "srl %7,0,%3\n\t" \ + "mulx %3,%6,%1\n\t" \ + "srlx %6,32,%2\n\t" \ + "mulx %2,%3,%4\n\t" \ + "sllx %4,32,%5\n\t" \ + "srl %6,0,%3\n\t" \ + "sub %1,%5,%5\n\t" \ + "srlx %5,32,%5\n\t" \ + "addcc %4,%5,%4\n\t" \ + "srlx %7,32,%5\n\t" \ + "mulx %3,%5,%3\n\t" \ + "mulx %2,%5,%5\n\t" \ + "sethi %%hi(0x80000000),%2\n\t" \ + "addcc %4,%3,%4\n\t" \ + "srlx %4,32,%4\n\t" \ + "add %2,%2,%2\n\t" \ + "movcc %%xcc,%%g0,%2\n\t" \ + "addcc %5,%4,%5\n\t" \ + "sllx %3,32,%3\n\t" \ + "add %1,%3,%1\n\t" \ + "add %5,%2,%0" \ + : "=r" ((UDItype)(wh)), \ + "=&r" ((UDItype)(wl)), \ + "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \ + : "r" ((UDItype)(u)), \ + "r" ((UDItype)(v)) \ + __CLOBBER_CC); \ + } while (0) +#define UMUL_TIME 96 +#define UDIV_TIME 230 +#endif /* sparc64 */ + +#if defined (__vax__) && W_TYPE_SIZE == 32 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("addl2 %5,%1\n\tadwc %3,%0" \ + : "=g" ((USItype) (sh)), \ + "=&g" ((USItype) (sl)) \ + : "%0" ((USItype) (ah)), \ + "g" ((USItype) (bh)), \ + "%1" ((USItype) (al)), \ + "g" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \ + : "=g" ((USItype) (sh)), \ + "=&g" ((USItype) (sl)) \ + : "0" ((USItype) (ah)), \ + "g" ((USItype) (bh)), \ + "1" ((USItype) (al)), \ + "g" ((USItype) (bl))) +#define umul_ppmm(xh, xl, m0, m1) \ + do { \ + union { \ + UDItype __ll; \ + struct {USItype __l, __h;} __i; \ + } __xx; \ + USItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("emul %1,%2,$0,%0" \ + : "=r" (__xx.__ll) \ + : "g" (__m0), \ + "g" (__m1)); \ + (xh) = __xx.__i.__h; \ + (xl) = __xx.__i.__l; \ + (xh) += ((((SItype) __m0 >> 31) & __m1) \ + + (((SItype) __m1 >> 31) & __m0)); \ + } while (0) +#define sdiv_qrnnd(q, r, n1, n0, d) \ + do { \ + union {DItype __ll; \ + struct {SItype __l, __h;} __i; \ + } __xx; \ + __xx.__i.__h = n1; __xx.__i.__l = n0; \ + __asm__ ("ediv %3,%2,%0,%1" \ + : "=g" (q), "=g" (r) \ + : "g" (__xx.__ll), "g" (d)); \ + } while (0) +#endif /* __vax__ */ + +#if defined (__z8000__) && W_TYPE_SIZE == 16 +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \ + : "=r" ((unsigned int)(sh)), \ + "=&r" ((unsigned int)(sl)) \ + : "%0" ((unsigned int)(ah)), \ + "r" ((unsigned int)(bh)), \ + "%1" ((unsigned int)(al)), \ + "rQR" ((unsigned int)(bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \ + : "=r" ((unsigned int)(sh)), \ + "=&r" ((unsigned int)(sl)) \ + : "0" ((unsigned int)(ah)), \ + "r" ((unsigned int)(bh)), \ + "1" ((unsigned int)(al)), \ + "rQR" ((unsigned int)(bl))) +#define umul_ppmm(xh, xl, m0, m1) \ + do { \ + union {long int __ll; \ + struct {unsigned int __h, __l;} __i; \ + } __xx; \ + unsigned int __m0 = (m0), __m1 = (m1); \ + __asm__ ("mult %S0,%H3" \ + : "=r" (__xx.__i.__h), \ + "=r" (__xx.__i.__l) \ + : "%1" (__m0), \ + "rQR" (__m1)); \ + (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ + (xh) += ((((signed int) __m0 >> 15) & __m1) \ + + (((signed int) __m1 >> 15) & __m0)); \ + } while (0) +#endif /* __z8000__ */ + +#endif /* __GNUC__ */ + +/* If this machine has no inline assembler, use C macros. */ + +#if !defined (add_ssaaaa) +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + do { \ + UWtype __x; \ + __x = (al) + (bl); \ + (sh) = (ah) + (bh) + (__x < (al)); \ + (sl) = __x; \ + } while (0) +#endif + +#if !defined (sub_ddmmss) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + UWtype __x; \ + __x = (al) - (bl); \ + (sh) = (ah) - (bh) - (__x > (al)); \ + (sl) = __x; \ + } while (0) +#endif + +#if !defined (umul_ppmm) +#define umul_ppmm(w1, w0, u, v) \ + do { \ + UWtype __x0, __x1, __x2, __x3; \ + UHWtype __ul, __vl, __uh, __vh; \ + \ + __ul = __ll_lowpart (u); \ + __uh = __ll_highpart (u); \ + __vl = __ll_lowpart (v); \ + __vh = __ll_highpart (v); \ + \ + __x0 = (UWtype) __ul * __vl; \ + __x1 = (UWtype) __ul * __vh; \ + __x2 = (UWtype) __uh * __vl; \ + __x3 = (UWtype) __uh * __vh; \ + \ + __x1 += __ll_highpart (__x0);/* this can't give carry */ \ + __x1 += __x2; /* but this indeed can */ \ + if (__x1 < __x2) /* did we get it? */ \ + __x3 += __ll_B; /* yes, add it in the proper pos. */ \ + \ + (w1) = __x3 + __ll_highpart (__x1); \ + (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \ + } while (0) +#endif + +#if !defined (__umulsidi3) +#define __umulsidi3(u, v) \ + ({DWunion __w; \ + umul_ppmm (__w.s.high, __w.s.low, u, v); \ + __w.ll; }) +#endif + +/* Define this unconditionally, so it can be used for debugging. */ +#define __udiv_qrnnd_c(q, r, n1, n0, d) \ + do { \ + UWtype __d1, __d0, __q1, __q0; \ + UWtype __r1, __r0, __m; \ + __d1 = __ll_highpart (d); \ + __d0 = __ll_lowpart (d); \ + \ + __r1 = (n1) % __d1; \ + __q1 = (n1) / __d1; \ + __m = (UWtype) __q1 * __d0; \ + __r1 = __r1 * __ll_B | __ll_highpart (n0); \ + if (__r1 < __m) \ + { \ + __q1--, __r1 += (d); \ + if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\ + if (__r1 < __m) \ + __q1--, __r1 += (d); \ + } \ + __r1 -= __m; \ + \ + __r0 = __r1 % __d1; \ + __q0 = __r1 / __d1; \ + __m = (UWtype) __q0 * __d0; \ + __r0 = __r0 * __ll_B | __ll_lowpart (n0); \ + if (__r0 < __m) \ + { \ + __q0--, __r0 += (d); \ + if (__r0 >= (d)) \ + if (__r0 < __m) \ + __q0--, __r0 += (d); \ + } \ + __r0 -= __m; \ + \ + (q) = (UWtype) __q1 * __ll_B | __q0; \ + (r) = __r0; \ + } while (0) + +/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through + __udiv_w_sdiv (defined in libgcc or elsewhere). */ +#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd) +#define udiv_qrnnd(q, r, nh, nl, d) \ + do { \ + USItype __r; \ + (q) = __udiv_w_sdiv (&__r, nh, nl, d); \ + (r) = __r; \ + } while (0) +#endif + +/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */ +#if !defined (udiv_qrnnd) +#define UDIV_NEEDS_NORMALIZATION 1 +#define udiv_qrnnd __udiv_qrnnd_c +#endif + +#if !defined (count_leading_zeros) +extern const UQItype __clz_tab[]; +#define count_leading_zeros(count, x) \ + do { \ + UWtype __xr = (x); \ + UWtype __a; \ + \ + if (W_TYPE_SIZE <= 32) \ + { \ + __a = __xr < ((UWtype)1<<2*__BITS4) \ + ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4) \ + : (__xr < ((UWtype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \ + } \ + else \ + { \ + for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \ + if (((__xr >> __a) & 0xff) != 0) \ + break; \ + } \ + \ + (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \ + } while (0) +#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE +#endif + +#if !defined (count_trailing_zeros) +/* Define count_trailing_zeros using count_leading_zeros. The latter might be + defined in asm, but if it is not, the C version above is good enough. */ +#define count_trailing_zeros(count, x) \ + do { \ + UWtype __ctz_x = (x); \ + UWtype __ctz_c; \ + count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \ + (count) = W_TYPE_SIZE - 1 - __ctz_c; \ + } while (0) +#endif + +#ifndef UDIV_NEEDS_NORMALIZATION +#define UDIV_NEEDS_NORMALIZATION 0 +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/ndiswrapper/divdi3.c +++ linux-fsl-imx51-2.6.31/ubuntu/ndiswrapper/divdi3.c @@ -0,0 +1,329 @@ +/* 64-bit multiplication and division + Copyright (C) 1989, 1992-1999, 2000, 2001, 2002, 2003 + Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include +#include + +#if BITS_PER_LONG != 32 +#error This is for 32-bit targets only +#endif + +typedef unsigned int UQItype __attribute__ ((mode (QI))); +typedef int SItype __attribute__ ((mode (SI))); +typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef unsigned int UDItype __attribute__ ((mode (DI))); +#define Wtype SItype +#define HWtype SItype +#define DWtype DItype +#define UWtype USItype +#define UHWtype USItype +#define UDWtype UDItype +#define W_TYPE_SIZE 32 + +#include "longlong.h" + +#if defined(__BIG_ENDIAN) +struct DWstruct { Wtype high, low;}; +#elif defined(__LITTLE_ENDIAN) +struct DWstruct { Wtype low, high;}; +#else +#error Unhandled endianity +#endif +typedef union { struct DWstruct s; DWtype ll; } DWunion; + +/* Prototypes of exported functions. */ +extern DWtype __divdi3 (DWtype u, DWtype v); +extern DWtype __moddi3 (DWtype u, DWtype v); +extern UDWtype __udivdi3 (UDWtype u, UDWtype v); +extern UDWtype __umoddi3 (UDWtype u, UDWtype v); + +static UDWtype +__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp) +{ + DWunion ww; + DWunion nn, dd; + DWunion rr; + UWtype d0, d1, n0, n1, n2; + UWtype q0, q1; + UWtype b, bm; + + nn.ll = n; + dd.ll = d; + + d0 = dd.s.low; + d1 = dd.s.high; + n0 = nn.s.low; + n1 = nn.s.high; + +#if !UDIV_NEEDS_NORMALIZATION + if (d1 == 0) + { + if (d0 > n1) + { + /* 0q = nn / 0D */ + + udiv_qrnnd (q0, n0, n1, n0, d0); + q1 = 0; + + /* Remainder in n0. */ + } + else + { + /* qq = NN / 0d */ + + if (d0 == 0) + d0 = 1 / d0; /* Divide intentionally by zero. */ + + udiv_qrnnd (q1, n1, 0, n1, d0); + udiv_qrnnd (q0, n0, n1, n0, d0); + + /* Remainder in n0. */ + } + + if (rp != 0) + { + rr.s.low = n0; + rr.s.high = 0; + *rp = rr.ll; + } + } + +#else /* UDIV_NEEDS_NORMALIZATION */ + + if (d1 == 0) + { + if (d0 > n1) + { + /* 0q = nn / 0D */ + + count_leading_zeros (bm, d0); + + if (bm != 0) + { + /* Normalize, i.e. make the most significant bit of the + denominator set. */ + + d0 = d0 << bm; + n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm)); + n0 = n0 << bm; + } + + udiv_qrnnd (q0, n0, n1, n0, d0); + q1 = 0; + + /* Remainder in n0 >> bm. */ + } + else + { + /* qq = NN / 0d */ + + if (d0 == 0) + d0 = 1 / d0; /* Divide intentionally by zero. */ + + count_leading_zeros (bm, d0); + + if (bm == 0) + { + /* From (n1 >= d0) /\ (the most significant bit of d0 is set), + conclude (the most significant bit of n1 is set) /\ (the + leading quotient digit q1 = 1). + + This special case is necessary, not an optimization. + (Shifts counts of W_TYPE_SIZE are undefined.) */ + + n1 -= d0; + q1 = 1; + } + else + { + /* Normalize. */ + + b = W_TYPE_SIZE - bm; + + d0 = d0 << bm; + n2 = n1 >> b; + n1 = (n1 << bm) | (n0 >> b); + n0 = n0 << bm; + + udiv_qrnnd (q1, n1, n2, n1, d0); + } + + /* n1 != d0... */ + + udiv_qrnnd (q0, n0, n1, n0, d0); + + /* Remainder in n0 >> bm. */ + } + + if (rp != 0) + { + rr.s.low = n0 >> bm; + rr.s.high = 0; + *rp = rr.ll; + } + } +#endif /* UDIV_NEEDS_NORMALIZATION */ + + else + { + if (d1 > n1) + { + /* 00 = nn / DD */ + + q0 = 0; + q1 = 0; + + /* Remainder in n1n0. */ + if (rp != 0) + { + rr.s.low = n0; + rr.s.high = n1; + *rp = rr.ll; + } + } + else + { + /* 0q = NN / dd */ + + count_leading_zeros (bm, d1); + if (bm == 0) + { + /* From (n1 >= d1) /\ (the most significant bit of d1 is set), + conclude (the most significant bit of n1 is set) /\ (the + quotient digit q0 = 0 or 1). + + This special case is necessary, not an optimization. */ + + /* The condition on the next line takes advantage of that + n1 >= d1 (true due to program flow). */ + if (n1 > d1 || n0 >= d0) + { + q0 = 1; + sub_ddmmss (n1, n0, n1, n0, d1, d0); + } + else + q0 = 0; + + q1 = 0; + + if (rp != 0) + { + rr.s.low = n0; + rr.s.high = n1; + *rp = rr.ll; + } + } + else + { + UWtype m1, m0; + /* Normalize. */ + + b = W_TYPE_SIZE - bm; + + d1 = (d1 << bm) | (d0 >> b); + d0 = d0 << bm; + n2 = n1 >> b; + n1 = (n1 << bm) | (n0 >> b); + n0 = n0 << bm; + + udiv_qrnnd (q0, n1, n2, n1, d1); + umul_ppmm (m1, m0, q0, d0); + + if (m1 > n1 || (m1 == n1 && m0 > n0)) + { + q0--; + sub_ddmmss (m1, m0, m1, m0, d1, d0); + } + + q1 = 0; + + /* Remainder in (n1n0 - m1m0) >> bm. */ + if (rp != 0) + { + sub_ddmmss (n1, n0, n1, n0, m1, m0); + rr.s.low = (n1 << b) | (n0 >> bm); + rr.s.high = n1 >> bm; + *rp = rr.ll; + } + } + } + } + + ww.s.low = q0; + ww.s.high = q1; + return ww.ll; +} + +DWtype +__divdi3 (DWtype u, DWtype v) +{ + Wtype c = 0; + DWtype w; + + if (u < 0) + { + c = ~c; + u = -u; + } + if (v < 0) + { + c = ~c; + v = -v; + } + w = __udivmoddi4 (u, v, NULL); + if (c) + w = -w; + return w; +} + +DWtype +__moddi3 (DWtype u, DWtype v) +{ + Wtype c = 0; + DWtype w; + + if (u < 0) + { + c = ~c; + u = -u; + } + if (v < 0) + v = -v; + __udivmoddi4 (u, v, &w); + if (c) + w = -w; + return w; +} + +UDWtype +__udivdi3 (UDWtype u, UDWtype v) +{ + return __udivmoddi4 (u, v, NULL); +} + +UDWtype +__umoddi3 (UDWtype u, UDWtype v) +{ + UDWtype w; + + __udivmoddi4 (u, v, &w); + return w; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/domain.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/domain.c @@ -0,0 +1,724 @@ +/* + * AppArmor security module + * + * This file contains AppArmor policy attachment and domain transitions + * + * Copyright (C) 2002-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "include/audit.h" +#include "include/apparmorfs.h" +#include "include/context.h" +#include "include/domain.h" +#include "include/file.h" +#include "include/ipc.h" +#include "include/match.h" +#include "include/path.h" +#include "include/policy.h" + +/** + * aa_free_domain_entries - free entries in a domain table + * @domain: the domain table to free + */ +void aa_free_domain_entries(struct aa_domain *domain) +{ + int i; + + if (!domain->table) + return; + + for (i = 0; i < domain->size; i++) + kfree(domain->table[i]); + kfree(domain->table); +} + +/* + * check if the task is ptraced and if so if the tracing task is allowed + * to trace the new domain + */ +static int aa_may_change_ptraced_domain(struct task_struct *task, + struct aa_profile *to_profile) +{ + struct task_struct *tracer; + struct cred *cred = NULL; + struct aa_profile *tracerp = NULL; + int error = 0; + + rcu_read_lock(); + tracer = tracehook_tracer_task(task); + if (tracer) + cred = aa_get_task_policy(tracer, &tracerp); + rcu_read_unlock(); + + /* not ptraced */ + if (!tracer) + return 0; + + if (!tracerp) + goto out; + + error = aa_may_ptrace(tracer, tracerp, to_profile, PTRACE_MODE_ATTACH); +out: + put_cred(cred); + + return error; +} + +/** + * change_profile_perms + */ +static struct file_perms change_profile_perms(struct aa_profile *profile, + struct aa_namespace *ns, + const char *name, + unsigned int *rstate) +{ + struct file_perms perms; + struct path_cond cond = { 0, 0 }; + unsigned int state; + + if (!profile) { + /* unconfined */ + perms.allowed = AA_MAY_CHANGE_PROFILE; + perms.xindex = perms.dindex = 0; + perms.audit = perms.quiet = perms.kill = 0; + if (rstate) + *rstate = 0; + return perms; + } else if (!profile->file.dfa) { + return nullperms; + } else if ((ns == profile->ns)) { + /* try matching against rules with out namespace prependend */ + perms = aa_str_perms(profile->file.dfa, DFA_START, name, &cond, + rstate); + if (COMBINED_PERM_MASK(perms) & AA_MAY_CHANGE_PROFILE) + return perms; + } + + /* try matching with namespace name and then profile */ + state = aa_dfa_match(profile->file.dfa, DFA_START, ns->base.name); + state = aa_dfa_null_transition(profile->file.dfa, state); + return aa_str_perms(profile->file.dfa, state, name, &cond, rstate); +} + +/* + * TODO: fix parser to detect unconfined, inherit, + * check for next name in list of names that is double null terminated + * The names list is a set of strings that \0 seperated with a double + * \0 terminating the list + * names that belong to namespaces begin with a : + * and are followed by a name a \0 seperated name. If the name is + * unspecified it is 0 length. This double \0\0 does not count as + * the end of the list + * + * profile\0\0 # single profile + * profile\0profile\0\0 # 2 profiles in list + * :namespace\0profile\0\0 # profile & namespace + * :namespace\0\0\0 # namespace without profile + * :namespace\0\0profile\0\0 # namespace without profile followed by profile +*/ +static const char *next_name(int xtype, const char *name) +{ +/* TODO: fix parser and enable + if (xtype == AA_X_TABLE) { + name = name + strlen(name) + 1; + if (*name != 0) + return name; + } +*/ + return NULL; +} + +/* + * get target profile for xindex + */ +static struct aa_profile *x_to_profile(struct aa_namespace *ns, + struct aa_profile *profile, + const char *name, u16 xindex) + +{ + struct aa_profile *new_profile = NULL; + u16 xtype = xindex & AA_X_TYPE_MASK; + int index = xindex & AA_X_INDEX_MASK; + + if (!profile) + profile = ns->unconfined; + + switch(xtype) { + case AA_X_NONE: + /* fail exec unless ix || ux fallback - handled by caller */ + return ERR_PTR(-EACCES); + case AA_X_NAME: + if (xindex & AA_X_CHILD) + new_profile = aa_sys_find_attach(&profile->base, name); + else + new_profile = aa_sys_find_attach(&ns->base, name); + + goto out; + case AA_X_TABLE: + if (index > profile->file.trans.size) { + AA_ERROR("Invalid named transition\n"); + return ERR_PTR(-EACCES); + } + name = profile->file.trans.table[index]; + break; + } + + for (; !new_profile && name; name = next_name(xtype, name)) { + struct aa_namespace *new_ns; + const char *xname = NULL; + + new_ns = NULL; + if (xindex & AA_X_CHILD) { + new_profile = aa_find_child(profile, name); + if (new_profile) + return new_profile; + continue; + } else if (*name == ':') { + /* switching namespace */ + const char *ns_name = name + 1; + name = xname = ns_name + strlen(ns_name) + 1; + if (!*xname) + /* no name so use profile name */ + xname = profile->fqname; + if (*ns_name == '@') { + /* TODO: variable support */ + ; + } + new_ns = aa_find_namespace(ns_name); + if (!new_ns) + continue; + } else if (*name == '@') { + /* TODO: variable support */ + + } else { + xname = name; + } + + new_profile = aa_find_profile_by_fqname(new_ns ? new_ns : ns, + xname); + aa_put_namespace(new_ns); + } + +out: + if (!new_profile) + return ERR_PTR(-ENOENT); + + return new_profile; +} + +int apparmor_bprm_set_creds(struct linux_binprm *bprm) +{ + struct aa_task_context *cxt; + struct aa_profile *profile, *new_profile = NULL; + struct aa_namespace *ns; + char *buffer = NULL; + unsigned int state = DFA_START; + struct aa_audit_file sa; + struct path_cond cond = { bprm->file->f_path.dentry->d_inode->i_uid, + bprm->file->f_path.dentry->d_inode->i_mode }; + + sa.base.error = cap_bprm_set_creds(bprm); + if (sa.base.error) + return sa.base.error; + + if (bprm->cred_prepared) + return 0; + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = "exec"; + sa.base.gfp_mask = GFP_KERNEL; + sa.request = MAY_EXEC; + sa.cond = &cond; + + cxt = bprm->cred->security; + BUG_ON(!cxt); + + profile = aa_filtered_profile(aa_profile_newest(cxt->sys.profile)); + ns = cxt->sys.profile->ns; + + sa.base.error = aa_get_name(&bprm->file->f_path, 0, &buffer, + (char **) &sa.name); + if (sa.base.error) { + if (!profile || profile->flags & PFLAG_IX_ON_NAME_ERROR) + sa.base.error = 0; + sa.base.info = "Exec failed name resolution"; + sa.name = bprm->filename; + goto audit; + } + + if (!profile) { + /* unconfined task - attach profile if one matches */ + new_profile = aa_sys_find_attach(&ns->base, sa.name); + if (!new_profile) + goto cleanup; + goto apply; + } else if (cxt->sys.onexec) { + /* + * onexec permissions are stored in a pair, rewalk the + * dfa to get start of the exec path match. + */ + sa.perms = change_profile_perms(profile, cxt->sys.onexec->ns, + sa.name, &state); + state = aa_dfa_null_transition(profile->file.dfa, state); + } + sa.perms = aa_str_perms(profile->file.dfa, state, sa.name, &cond, + NULL); + if (cxt->sys.onexec && sa.perms.allowed & AA_MAY_ONEXEC) { + new_profile = cxt->sys.onexec; + cxt->sys.onexec = NULL; + sa.base.info = "change_profile onexec"; + } else if (sa.perms.allowed & MAY_EXEC) { + new_profile = x_to_profile(ns, profile, sa.name, + sa.perms.xindex); + if (IS_ERR(new_profile)) { + if (sa.perms.xindex & AA_X_INHERIT) { + /* (p|c|n)ix - don't change profile */ + sa.base.info = "ix fallback"; + goto x_clear; + } else if (sa.perms.xindex & AA_X_UNCONFINED) { + new_profile = aa_get_profile(ns->unconfined); + sa.base.info = "ux fallback"; + } else { + sa.base.error = PTR_ERR(new_profile); + if (sa.base.error == -ENOENT) + sa.base.info = "profile not found"; + new_profile = NULL; + } + } + } else if (PROFILE_COMPLAIN(profile)) { + new_profile = aa_alloc_null_profile(profile, 0); + sa.base.error = -EACCES; + if (!new_profile) + sa.base.error = -ENOMEM; + sa.name2 = new_profile->fqname; + sa.perms.xindex |= AA_X_UNSAFE; + } else { + sa.base.error = -EACCES; + } + + if (!new_profile) + goto audit; + + if (profile == new_profile) { + aa_put_profile(new_profile); + goto audit; + } + + if (bprm->unsafe & LSM_UNSAFE_SHARE) { + /* FIXME: currently don't mediate shared state */ + ; + } + + if (bprm->unsafe & (LSM_UNSAFE_PTRACE | LSM_UNSAFE_PTRACE_CAP)) { + sa.base.error = aa_may_change_ptraced_domain(current, + new_profile); + if (sa.base.error) + goto audit; + } + + /* Determine if secure exec is needed. + * Can be at this point for the following reasons: + * 1. unconfined switching to confined + * 2. confined switching to different confinement + * 3. confined switching to unconfined + * + * Cases 2 and 3 are marked as requiring secure exec + * (unless policy specified "unsafe exec") + * + * bprm->unsafe is used to cache the AA_X_UNSAFE permission + * to avoid having to recompute in secureexec + */ + if (!(sa.perms.xindex & AA_X_UNSAFE)) + bprm->unsafe |= AA_SECURE_X_NEEDED; + +apply: + sa.name2 = new_profile->fqname; + /* When switching namespace ensure its part of audit message */ + if (new_profile->ns != ns) + sa.name3 = new_profile->ns->base.name; + + /* when transitioning profiles clear unsafe personality bits */ + bprm->per_clear |= PER_CLEAR_ON_SETID; + + aa_put_profile(cxt->sys.profile); + cxt->sys.profile = new_profile; + +x_clear: + aa_put_profile(cxt->sys.previous); + aa_put_profile(cxt->sys.onexec); + cxt->sys.previous = NULL; + cxt->sys.onexec = NULL; + cxt->sys.token = 0; + +audit: + sa.base.error = aa_audit_file(profile, &sa); + +cleanup: + kfree(buffer); + + return sa.base.error; +} + +int apparmor_bprm_secureexec(struct linux_binprm *bprm) +{ + int ret = cap_bprm_secureexec(bprm); + + /* the decision to use secure exec is computed in set_creds + * and stored in bprm->unsafe. The AppArmor X_UNSAFE flag is + * indicates don't + */ + if (!ret && (bprm->unsafe & AA_SECURE_X_NEEDED)) + ret = 1; + + return ret; +} + + +static int aa_revalidate_perm(struct aa_profile *profile, struct file *file, + char *buffer, int size) +{ + umode_t mode = file->f_path.dentry->d_inode->i_mode; + char *name; + int error; + + error = aa_get_name_to_buffer(&file->f_path, S_ISDIR(mode), buffer, + size, &name); + return aa_file_common_perm(profile, "file_inherit", file, + aa_map_file_to_perms(file), name, + error); +} + +static void revalidate_file(struct aa_profile *profile, struct file *file, + unsigned long i, char *buffer, int size, + struct cred *cred) +{ + if (aa_revalidate_perm(profile, file, buffer, size)) { + struct file *devnull = NULL; + int fd = get_unused_fd(); + sys_close(i); + if (fd != i) { + if (fd >= 0) + put_unused_fd(fd); + return; + } + if (devnull) { + get_file(devnull); + } else if (apparmorfs_null) { + devnull = dentry_open(dget(apparmorfs_null), + mntget(apparmorfs_mnt), + O_RDWR, cred); + if (IS_ERR(devnull)) { + devnull = NULL; + put_unused_fd(fd); + return; + } + } else { + /* apparmorfs_null not setup */ + put_unused_fd(fd); + return; + } + fd_install(fd, devnull); + } +} + +/* + * derived from security/selinux/hooks.c: flush_unauthorized_files && + * fs/exec.c:flush_old_files + */ +static int revalidate_files(struct aa_profile *profile, + struct files_struct *files, gfp_t gfp, + struct cred *cred) +{ + struct file *file; + struct fdtable *fdt; + long j = -1; + char *buffer = kmalloc(g_apparmor_path_max, gfp); + if (!buffer) + return -ENOMEM; + + spin_lock(&files->file_lock); + for (;;) { + unsigned long set, i; + + j++; + i = j * __NFDBITS; + fdt = files_fdtable(files); + if (i >= fdt->max_fds) + break; + set = fdt->open_fds->fds_bits[j]; + if (!set) + continue; + spin_unlock(&files->file_lock); + for ( ; set ; i++,set >>= 1) { + if (set & 1) { + file = fget(i); + if (!file) + continue; + revalidate_file(profile, file, i, buffer, + g_apparmor_path_max, cred); + fput(file); + } + } + spin_lock(&files->file_lock); + } + spin_unlock(&files->file_lock); + kfree(buffer); + return 0; +} + +int apparmor_bprm_committing_creds(struct linux_binprm *bprm) +{ + struct aa_profile *profile; + struct cred *cred = aa_get_task_policy(current, &profile); + struct aa_task_context *new_cxt = bprm->cred->security; + int error; + + if ((new_cxt->sys.profile == profile) || + (new_cxt->sys.profile->flags & PFLAG_UNCONFINED)) { + put_cred(cred); + return 0; + } + put_cred(cred); + + error = revalidate_files(new_cxt->sys.profile, current->files, + GFP_KERNEL, bprm->cred); + if (error) + return error; + + current->pdeath_signal = 0; + + /* reset soft limits and set hard limits for the new profile */ + __aa_transition_rlimits(profile, new_cxt->sys.profile); + return 0; +} + +void apparmor_bprm_committed_creds(struct linux_binprm *bprm) +{ + /* TODO: cleanup signals - ipc mediation */ + return; +} + +/** + * aa_change_hat - change hat to/from subprofile + * @hat_name: hat to change to + * @token: magic value to validate the hat change + * @permtest: true if this is just a permission test + * + * Change to new @hat_name, and store the @hat_magic in the current task + * context. If the new @hat_name is %NULL and the @token matches that + * stored in the current task context and is not 0, return to the top level + * profile. + * Returns %0 on success, error otherwise. + */ +int aa_change_hat(const char *hat_name, u64 token, int permtest) +{ + const struct cred *cred; + struct aa_task_context *cxt; + struct aa_profile *profile, *previous_profile, *hat = NULL; + struct aa_audit_file sa; + char *name = NULL; + + memset(&sa, 0, sizeof(sa)); + sa.base.gfp_mask = GFP_KERNEL; + sa.base.operation = "change_hat"; + sa.request = AA_MAY_CHANGEHAT; + + cred = aa_current_policy(&profile); + cxt = cred->security; + previous_profile = cxt->sys.previous; + + if (!profile) { + sa.base.info = "unconfined"; + sa.base.error = -EPERM; + goto audit; + } + + if (hat_name) { + sa.name2 = profile->ns->base.name; + + if (PROFILE_IS_HAT(profile)) + hat = aa_find_child(profile->parent, hat_name); + else + hat = aa_find_child(profile, hat_name); + if (!hat) { + if (PROFILE_IS_HAT(profile)) + name = new_compound_name(profile->parent->fqname, + hat_name); + else + name = new_compound_name(profile->fqname, + hat_name); + sa.name = name; + sa.base.info = "hat not found"; + sa.base.error = -ENOENT; + if (permtest || !PROFILE_COMPLAIN(profile)) + /* probing is an expected unfortunate behavior + * of the change_hat api is traditionally quiet + */ + goto out; + hat = aa_alloc_null_profile(profile, 1); + if (!hat) { + sa.base.info = "failed null profile create"; + sa.base.error = -ENOMEM; + goto audit; + } + } else { + sa.name = hat->fqname; + if (!PROFILE_IS_HAT(hat)) { + sa.base.info = "target not hat"; + sa.base.error = -EPERM; + goto audit; + } + } + + sa.base.error = aa_may_change_ptraced_domain(current, hat); + if (sa.base.error) { + sa.base.info = "ptraced"; + sa.base.error = -EPERM; + goto audit; + } + + if (!permtest) { + sa.base.error = aa_set_current_hat(hat, token); + if (sa.base.error == -EACCES) { + (void)send_sig_info(SIGKILL, NULL, current); + sa.base.error = aa_audit(AUDIT_APPARMOR_KILL, + profile, &sa.base, + file_audit_cb); + goto out; + } else if (name && !sa.base.error) + /* reset error for learning of new hats */ + sa.base.error = -ENOENT; + } + } else if (previous_profile) { + sa.name = previous_profile->fqname; + sa.base.error = aa_restore_previous_profile(token); + sa.perms.kill = AA_MAY_CHANGEHAT; + } + /* else + ignore restores when there is no saved profile + */ + +audit: + if (!permtest) + sa.base.error = aa_audit_file(profile, &sa); + + +out: + aa_put_profile(hat); + kfree(name); + + return sa.base.error; +} + +/** + * aa_change_profile - perform a one-way profile transition + * @ns_name: name of the profile namespace to change to + * @fqname: name of profile to change to + * @onexec: whether this transition is to take place immediately or at exec + * @permtest: true if this is just a permission test + * + * Change to new profile @name. Unlike with hats, there is no way + * to change back. If @onexec then the transition is delayed until + * the next exec. + * + * Returns %0 on success, error otherwise. + */ +int aa_change_profile(const char *ns_name, const char *fqname, int onexec, + int permtest) +{ + const struct cred *cred; + struct aa_task_context *cxt; + struct aa_profile *profile, *target = NULL; + struct aa_namespace *ns = NULL; + struct aa_audit_file sa; + + if (!fqname && !ns_name) + return -EINVAL; + + memset(&sa, 0, sizeof(sa)); + sa.request = AA_MAY_CHANGE_PROFILE; + sa.base.gfp_mask = GFP_KERNEL; + if (onexec) + sa.base.operation = "change_onexec"; + else + sa.base.operation = "change_profile"; + + cred = aa_current_policy(&profile); + cxt = cred->security; + + if (ns_name) { + sa.name2 = ns_name; + ns = aa_find_namespace(ns_name); + if (!ns) { + /* we don't create new namespace in complain mode */ + sa.base.info = "namespace not found"; + sa.base.error = -ENOENT; + goto audit; + } + } else { + ns = aa_get_namespace(cxt->sys.profile->ns); + sa.name2 = ns->base.name; + } + + /* if the name was not specified, use the name of the current profile */ + if (!fqname) { + if (!profile) + fqname = ns->unconfined->fqname; + else + fqname = profile->fqname; + } + sa.name = fqname; + + sa.perms = change_profile_perms(profile, ns, fqname, NULL); + if (!(sa.perms.allowed & AA_MAY_CHANGE_PROFILE)) { + sa.base.error = -EACCES; + goto audit; + } + + target = aa_find_profile_by_fqname(ns, fqname); + if (!target) { + sa.base.info = "profile not found"; + sa.base.error = -ENOENT; + if (permtest || !PROFILE_COMPLAIN(profile)) + goto audit; + target = aa_alloc_null_profile(profile, 0); + } + + /* check if tracing task is allowed to trace target domain */ + sa.base.error = aa_may_change_ptraced_domain(current, target); + if (sa.base.error) { + sa.base.info = "ptrace prevents transition"; + goto audit; + } + + if (permtest) + goto audit; + + if (onexec) + sa.base.error = aa_set_current_onexec(target); + else + sa.base.error = aa_replace_current_profiles(target); + +audit: + if (!permtest) + sa.base.error = aa_audit_file(profile, &sa); + + aa_put_namespace(ns); + aa_put_profile(target); + + return sa.base.error; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/audit.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/audit.c @@ -0,0 +1,153 @@ +/* + * AppArmor security module + * + * This file contains AppArmor auditing functions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include + +#include "include/apparmor.h" +#include "include/audit.h" +#include "include/policy.h" + +const char *audit_mode_names[] = { + "normal", + "quiet_denied", + "quiet" + "noquiet", + "all" +}; + +static char* aa_audit_type[] = { + "APPARMOR_AUDIT", + "APPARMOR_ALLOWED", + "APPARMOR_DENIED", + "APPARMOR_HINT", + "APPARMOR_STATUS", + "APPARMOR_ERROR", + "APPARMOR_KILLED" +}; + +/* + * TODO: + * user auditing - netlink interface + * system control of whether user audit messages go to system log + */ +static int aa_audit_base(int type, struct aa_profile *profile, + struct aa_audit *sa, struct audit_context *audit_cxt, + void(*cb)(struct audit_buffer *, void *)) +{ + struct audit_buffer *ab = NULL; + + if (profile && PROFILE_KILL(profile) && type == AUDIT_APPARMOR_DENIED) + type = AUDIT_APPARMOR_KILL; + + ab = audit_log_start(audit_cxt, sa->gfp_mask, type); + + if (!ab) { + AA_ERROR("(%d) Unable to log event of type (%d)\n", + -ENOMEM, type); + /* don't fail operations in complain mode even if logging + * fails */ + return type == AUDIT_APPARMOR_ALLOWED ? 0 : -ENOMEM; + } + + if (g_apparmor_audit_header) + audit_log_format(ab, "type=%s ", + aa_audit_type[type - AUDIT_APPARMOR_AUDIT]); + + if (sa->operation) + audit_log_format(ab, "operation=\"%s\"", sa->operation); + + if (sa->info) { + audit_log_format(ab, " info=\"%s\"", sa->info); + if (sa->error) + audit_log_format(ab, " error=%d", sa->error); + } + + audit_log_format(ab, " pid=%d", sa->task ?sa->task->pid : current->pid); + + if (profile) { + pid_t pid = sa->task ? sa->task->real_parent->pid : + current->real_parent->pid; + audit_log_format(ab, " parent=%d", pid); + audit_log_format(ab, " profile="); + audit_log_untrustedstring(ab, profile->fqname); + + if (profile->ns != default_namespace) { + audit_log_format(ab, " namespace="); + audit_log_untrustedstring(ab, profile->ns->base.name); + } + } + + if (cb) + cb(ab, sa); + + audit_log_end(ab); + + if (type == AUDIT_APPARMOR_KILL) + (void)send_sig_info(SIGKILL, NULL, + sa->task ? sa->task : current); + + return type == AUDIT_APPARMOR_ALLOWED ? 0 : sa->error; +} + +/** + * aa_audit - Log an audit event to the audit subsystem + * @type: audit type for the message + * @profile: profile to check against + * @sa: audit event + */ +int aa_audit(int type, struct aa_profile *profile, struct aa_audit *sa, + void(*cb)(struct audit_buffer *, void *)) +{ + struct audit_context *audit_cxt; + audit_cxt = g_apparmor_logsyscall ? current->audit_context : NULL; + + if (type == AUDIT_APPARMOR_AUTO) { + if (likely(!sa->error)) { + if (PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) + return 0; + type = AUDIT_APPARMOR_AUDIT; + } else if (PROFILE_COMPLAIN(profile)) + type = AUDIT_APPARMOR_ALLOWED; + else + type = AUDIT_APPARMOR_DENIED; + } + if (PROFILE_AUDIT_MODE(profile) == AUDIT_QUIET || + (type == AUDIT_APPARMOR_DENIED && + PROFILE_AUDIT_MODE(profile) == AUDIT_QUIET)) + return sa->error; + + return aa_audit_base(type, profile, sa, audit_cxt, cb); +} + +/** + * aa_audit_syscallreject - Log a syscall rejection to the audit subsystem + * @profile: profile to check against + * @gfp: memory allocation flags + * @msg: string describing syscall being rejected + */ +int aa_audit_syscallreject(struct aa_profile *profile, gfp_t gfp, + const char *msg, + void(*cb)(struct audit_buffer *, void *)) +{ + struct aa_audit sa; + memset(&sa, 0, sizeof(sa)); + sa.operation = "syscall"; + sa.info = msg; + sa.gfp_mask = gfp; + sa.error = -EACCES; + + return aa_audit_base(AUDIT_APPARMOR_DENIED, profile, &sa, + current->audit_context, NULL); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/net.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/net.c @@ -0,0 +1,146 @@ +/* + * AppArmor security module + * + * This file contains AppArmor network mediation + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include "include/apparmor.h" +#include "include/audit.h" +#include "include/context.h" +#include "include/net.h" +#include "include/policy.h" + +#include "af_names.h" + +static const char *sock_type_names[] = { + "unknown(0)", + "stream", + "dgram", + "raw", + "rdm", + "seqpacket", + "dccp", + "unknown(7)", + "unknown(8)", + "unknown(9)", + "packet", +}; + +struct aa_audit_net { + struct aa_audit base; + + int family, type, protocol; + +}; + +static void audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_net *sa = va; + + if (sa->family || sa->type) { + if (address_family_names[sa->family]) + audit_log_format(ab, " family=\"%s\"", + address_family_names[sa->family]); + else + audit_log_format(ab, " family=\"unknown(%d)\"", + sa->family); + + if (sock_type_names[sa->type]) + audit_log_format(ab, " sock_type=\"%s\"", + sock_type_names[sa->type]); + else + audit_log_format(ab, " sock_type=\"unknown(%d)\"", + sa->type); + + audit_log_format(ab, " protocol=%d", sa->protocol); + } + +} + +static int aa_audit_net(struct aa_profile *profile, struct aa_audit_net *sa) +{ + int type = AUDIT_APPARMOR_AUTO; + + if (likely(!sa->base.error)) { + u16 audit_mask = profile->net.audit[sa->family]; + if (likely((PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) && + !(1 << sa->type & audit_mask))) + return 0; + type = AUDIT_APPARMOR_AUDIT; + } else { + u16 quiet_mask = profile->net.quiet[sa->family]; + u16 kill_mask = 0; + u16 denied = (1 << sa->type) & ~quiet_mask; + + if (denied & kill_mask) + type = AUDIT_APPARMOR_KILL; + + if ((denied & quiet_mask) && + PROFILE_AUDIT_MODE(profile) != AUDIT_NOQUIET && + PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) + return PROFILE_COMPLAIN(profile) ? 0 : sa->base.error; + } + + return aa_audit(type, profile, (struct aa_audit *)sa, audit_cb); +} + +int aa_net_perm(struct aa_profile *profile, char *operation, + int family, int type, int protocol) +{ + struct aa_audit_net sa; + u16 family_mask; + + if ((family < 0) || (family >= AF_MAX)) + return -EINVAL; + + if ((type < 0) || (type >= SOCK_MAX)) + return -EINVAL; + + /* unix domain and netlink sockets are handled by ipc */ + if (family == AF_UNIX || family == AF_NETLINK) + return 0; + + family_mask = profile->net.allowed[family]; + + memset(&sa, 0, sizeof(sa)); + sa.base.error = (family_mask & (1 << type)) ? 0 : -EACCES; + sa.base.operation = operation; + sa.base.gfp_mask = GFP_KERNEL; + sa.family = family; + sa.type = type; + sa.protocol = protocol; + + return aa_audit_net(profile, &sa); +} + +int aa_revalidate_sk(struct sock *sk, char *operation) +{ + struct aa_profile *profile; + struct cred *cred; + int error = 0; + + /* this is some debugging code to flush out the network hooks that + that are called in interrupt context */ + if (in_interrupt()) { + printk(KERN_WARNING "AppArmor Debug: Hook being called from interrupt context\n"); + dump_stack(); + return 0; + } + + cred = aa_get_task_policy(current, &profile); + if (profile) + error = aa_net_perm(profile, operation, + sk->sk_family, sk->sk_type, + sk->sk_protocol); + put_cred(cred); + + return error; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/context.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/context.c @@ -0,0 +1,209 @@ +/* + * AppArmor security module + * + * This file contains AppArmor functions used to manipulate object security + * contexts. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include "include/context.h" +#include "include/policy.h" + + + +struct aa_task_context *aa_alloc_task_context(gfp_t flags) +{ + return kzalloc(sizeof(struct aa_task_context), flags); +} + +void aa_free_task_context(struct aa_task_context *cxt) +{ + if (cxt) { + aa_put_profile(cxt->sys.profile); + aa_put_profile(cxt->sys.previous); + aa_put_profile(cxt->sys.onexec); + + memset(cxt, 0, sizeof(*cxt)); + kfree(cxt); + } +} + +/* + * duplicate a task context, incrementing reference counts + */ +struct aa_task_context *aa_dup_task_context(struct aa_task_context *old_cxt, + gfp_t gfp) +{ + struct aa_task_context *cxt; + + cxt = kmemdup(old_cxt, sizeof(*cxt), gfp); + if (!cxt) + return NULL; + + aa_get_profile(cxt->sys.profile); + aa_get_profile(cxt->sys.previous); + aa_get_profile(cxt->sys.onexec); + + return cxt; +} + +/** + * aa_cred_policy - obtain cred's profiles + * @cred: cred to obtain profiles from + * @sys: return system profile + * does NOT increment reference count + */ +void aa_cred_policy(const struct cred *cred, struct aa_profile **sys) +{ + struct aa_task_context *cxt = cred->security; + BUG_ON(!cxt); + *sys = aa_filtered_profile(aa_profile_newest(cxt->sys.profile)); +} + +/** + * aa_get_task_policy - get the cred with the task policy, and current profiles + * @task: task to get policy of + * @sys: return - pointer to system profile + * + * Only gets the cred ref count which has ref counts on the profiles returned + */ +struct cred *aa_get_task_policy(const struct task_struct *task, + struct aa_profile **sys) +{ + struct cred *cred = get_task_cred(task); + aa_cred_policy(cred, sys); + return cred; +} + +void aa_put_task_policy(struct cred *cred) +{ + put_cred(cred); +} + +static void replace_group(struct aa_task_cxt_group *cgrp, + struct aa_profile *profile) +{ + if (cgrp->profile == profile) + return; + + if (!profile || (profile->flags & PFLAG_UNCONFINED) || + (cgrp->profile && cgrp->profile->ns != profile->ns)) { + aa_put_profile(cgrp->previous); + aa_put_profile(cgrp->onexec); + cgrp->previous = NULL; + cgrp->onexec = NULL; + cgrp->token = 0; + } + aa_put_profile(cgrp->profile); + cgrp->profile = aa_get_profile(profile); +} + +/** + * aa_replace_current_profiles - replace the current tasks profiles + * @sys: new system profile + * + * Returns: error on failure + */ +int aa_replace_current_profiles(struct aa_profile *sys) +{ + struct aa_task_context *cxt; + struct cred *new = prepare_creds(); + if (!new) + return -ENOMEM; + + cxt = new->security; + replace_group(&cxt->sys, sys); + + commit_creds(new); + return 0; +} + +int aa_set_current_onexec(struct aa_profile *sys) +{ + struct aa_task_context *cxt; + struct cred *new = prepare_creds(); + if (!new) + return -ENOMEM; + + cxt = new->security; + aa_put_profile(cxt->sys.onexec); + cxt->sys.onexec = aa_get_profile(sys); + + commit_creds(new); + return 0; +} + +/* + * Do the actual cred switching of a changehat + * profile must be valid + */ +int aa_set_current_hat(struct aa_profile *profile, u64 token) +{ + struct aa_task_context *cxt; + struct cred *new = prepare_creds(); + if (!new) + return -ENOMEM; + + cxt = new->security; + if (!cxt->sys.previous) { + cxt->sys.previous = cxt->sys.profile; + cxt->sys.token = token; + } else if (cxt->sys.token == token) { + aa_put_profile(cxt->sys.profile); + } else { + /* previous_profile && cxt->token != token */ + abort_creds(new); + return -EACCES; + } + cxt->sys.profile = aa_get_profile(profile); + /* clear exec on switching context */ + aa_put_profile(cxt->sys.onexec); + cxt->sys.onexec = NULL; + + commit_creds(new); + return 0; +} + +/* + * Attempt to return out of a hat to the previous profile + */ +int aa_restore_previous_profile(u64 token) +{ + struct aa_task_context *cxt; + struct cred *new = prepare_creds(); + if (!new) + return -ENOMEM; + + cxt = new->security; + if (cxt->sys.token != token) { + abort_creds(new); + return -EACCES; + } + /* ignore restores when there is no saved profile */ + if (!cxt->sys.previous) { + abort_creds(new); + return 0; + } + + aa_put_profile(cxt->sys.profile); + cxt->sys.profile = aa_profile_newest(cxt->sys.previous); + if (unlikely(cxt->sys.profile != cxt->sys.previous)) { + aa_get_profile(cxt->sys.profile); + aa_put_profile(cxt->sys.previous); + } + /* clear exec && prev information when restoring to previous context */ + cxt->sys.previous = NULL; + cxt->sys.token = 0; + aa_put_profile(cxt->sys.onexec); + cxt->sys.onexec = NULL; + + commit_creds(new); + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/Kconfig @@ -0,0 +1,53 @@ +config SECURITY_APPARMOR + bool "AppArmor support" + depends on SECURITY && SECURITY_NETWORK && NET && INET + select AUDIT + select SECURITY_PATH + select SECURITYFS + default n + help + This enables the AppArmor security module. + Required userspace tools (if they are not included in your + distribution) and further information may be found at + + + If you are unsure how to answer this question, answer N. + +config SECURITY_APPARMOR_NETWORK + bool "AppArmor network support" + depends on SECURITY_APPARMOR + default n + help + This enables AppArmor to mediate applications network use. + This will enable the SECURITY_NETWORK hooks. + +config SECURITY_APPARMOR_BOOTPARAM_VALUE + int "AppArmor boot parameter default value" + depends on SECURITY_APPARMOR + range 0 1 + default 1 + help + This option sets the default value for the kernel parameter + 'apparmor', which allows AppArmor to be enabled or disabled + at boot. If this option is set to 0 (zero), the AppArmor + kernel parameter will default to 0, disabling AppArmor at + bootup. If this option is set to 1 (one), the AppArmor + kernel parameter will default to 1, enabling AppArmor at + bootup. + + If you are unsure how to answer this question, answer 1. + +config SECURITY_APPARMOR_DISABLE + bool "AppArmor runtime disable" + depends on SECURITY_APPARMOR + default n + help + This option enables writing to a apparmorfs node 'disable', which + allows AppArmor to be disabled at runtime prior to the policy load. + AppArmor will then remain disabled until the next boot. + This option is similar to the apparmor.enabled=0 boot parameter, + but is to support runtime disabling of AppArmor, e.g. from + /sbin/init, for portability across platforms where boot + parameters are difficult to employ. + + If you are unsure how to answer this question, answer N. --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/procattr.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/procattr.c @@ -0,0 +1,117 @@ +/* + * AppArmor security module + * + * This file contains AppArmor /proc//attr/ interface functions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include "include/apparmor.h" +#include "include/policy.h" +#include "include/domain.h" + +/* FIXME show profile multiplexing */ +int aa_getprocattr(struct aa_namespace *ns, struct aa_profile *profile, + char **string) +{ + char *str; + int len = 0; + + if (profile) { + int mode_len, name_len, ns_len = 0; + const char *mode_str = profile_mode_names[profile->mode]; + char *s; + + mode_len = strlen(mode_str) + 3; /* _(mode_str)\n */ + name_len = strlen(profile->fqname); + if (ns != default_namespace) + ns_len = strlen(ns->base.name) + 3; + len = mode_len + ns_len + name_len + 1; + s = str = kmalloc(len + 1, GFP_ATOMIC); + if (!str) + return -ENOMEM; + + if (ns_len) { + sprintf(s, "%s://", ns->base.name); + s += ns_len; + } + memcpy(s, profile->fqname, name_len); + s += name_len; + sprintf(s, " (%s)\n", mode_str); + } else { + const char *unconfined_str = "unconfined\n"; + + len = strlen(unconfined_str); + if (ns != default_namespace) + len += strlen(ns->base.name) + 3; /* :// */ + + str = kmalloc(len + 1, GFP_ATOMIC); + if (!str) + return -ENOMEM; + + if (ns != default_namespace) + sprintf(str, "%s://%s", ns->base.name, unconfined_str); + else + memcpy(str, unconfined_str, len); + } + *string = str; + + return len; +} + +static char *split_token_from_name(const char *op, char *args, u64 *token) +{ + char *name; + + *token = simple_strtoull(args, &name, 16); + if ((name == args) || *name != '^') { + AA_ERROR("%s: Invalid input '%s'", op, args); + return ERR_PTR(-EINVAL); + } + + name++; /* skip ^ */ + if (!*name) + name = NULL; + return name; +} + +int aa_setprocattr_changehat(char *args, int test) +{ + char *hat; + u64 token; + + hat = split_token_from_name("change_hat", args, &token); + if (IS_ERR(hat)) + return PTR_ERR(hat); + + if (!hat && !token) { + AA_ERROR("change_hat: Invalid input, NULL hat and NULL magic"); + return -EINVAL; + } + + AA_DEBUG("%s: Magic 0x%llx Hat '%s'\n", + __func__, token, hat ? hat : NULL); + + return aa_change_hat(hat, token, test); +} + +int aa_setprocattr_changeprofile(char *args, int onexec, int test) +{ + char *name, *ns_name; + + name = aa_split_name_from_ns(args, &ns_name); + return aa_change_profile(ns_name, name, onexec, test); +} + + +int aa_setprocattr_permipc(char *args) +{ + /* TODO: add ipc permission querying */ + return -ENOTSUPP; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/policy_interface.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/policy_interface.c @@ -0,0 +1,852 @@ +/* + * AppArmor security module + * + * This file contains AppArmor functions for unpacking policy loaded from + * userspace. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * AppArmor uses a serialized binary format for loading policy. + * The policy format is documented in Documentation/??? + * All policy is validated all before it is used. + */ + +#include +#include + +#include "include/apparmor.h" +#include "include/audit.h" +#include "include/context.h" +#include "include/match.h" +#include "include/policy.h" +#include "include/policy_interface.h" +#include "include/sid.h" + +/* FIXME: convert profiles to internal hieracy, accounting + * FIXME: have replacement routines set replaced_by profile instead of error + * FIXME: name mapping to hierarchy + */ + +/* + * The AppArmor interface treats data as a type byte followed by the + * actual data. The interface has the notion of a a named entry + * which has a name (AA_NAME typecode followed by name string) followed by + * the entries typecode and data. Named types allow for optional + * elements and extensions to be added and tested for without breaking + * backwards compatability. + */ + +enum aa_code { + AA_U8, + AA_U16, + AA_U32, + AA_U64, + AA_NAME, /* same as string except it is items name */ + AA_STRING, + AA_BLOB, + AA_STRUCT, + AA_STRUCTEND, + AA_LIST, + AA_LISTEND, + AA_ARRAY, + AA_ARRAYEND, +}; + +/* + * aa_ext is the read of the buffer containing the serialized profile. The + * data is copied into a kernel buffer in apparmorfs and then handed off to + * the unpack routines. + */ +struct aa_ext { + void *start; + void *end; + void *pos; /* pointer to current position in the buffer */ + u32 version; + char *ns_name; +}; + + +struct aa_audit_iface { + struct aa_audit base; + + const char *name; + const char *name2; + const struct aa_ext *e; +}; + +static void aa_audit_init(struct aa_audit_iface *sa, const char *operation, + struct aa_ext *e) +{ + memset(sa, 0, sizeof(*sa)); + sa->base.operation = operation; + sa->base.gfp_mask = GFP_KERNEL; + sa->e = e; +} + +static void audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_iface *sa = va; + + if (sa->name) + audit_log_format(ab, " name=%s", sa->name); + if (sa->name2) + audit_log_format(ab, " namespace=%s", sa->name2); + if (sa->base.error && sa->e) { + long len = sa->e->pos - sa->e->start; + audit_log_format(ab, " offset=%ld", len); + } +} + +static int aa_audit_iface(struct aa_audit_iface *sa) +{ + struct aa_profile *profile; + struct cred *cred = aa_get_task_policy(current, &profile); + int error = aa_audit(AUDIT_APPARMOR_STATUS, profile, &sa->base, + audit_cb); + put_cred(cred); + return error; +} + +static int aa_inbounds(struct aa_ext *e, size_t size) +{ + return (size <= e->end - e->pos); +} + +/** + * aa_u16_chunck - test and do bounds checking for a u16 size based chunk + * @e: serialized data read head + * @chunk: start address for chunk of data + * + * return the size of chunk found with the read head at the end of + * the chunk. + */ +static size_t aa_is_u16_chunk(struct aa_ext *e, char **chunk) +{ + void *pos = e->pos; + size_t size = 0; + + if (!aa_inbounds(e, sizeof(u16))) + goto fail; + size = le16_to_cpu(get_unaligned((u16 *)e->pos)); + e->pos += sizeof(u16); + if (!aa_inbounds(e, size)) + goto fail; + *chunk = e->pos; + e->pos += size; + return size; + +fail: + e->pos = pos; + return 0; +} + +static int aa_is_X(struct aa_ext *e, enum aa_code code) +{ + if (!aa_inbounds(e, 1)) + return 0; + if (*(u8 *) e->pos != code) + return 0; + e->pos++; + return 1; +} + +/** + * aa_is_nameX - check is the next element is of type X with a name of @name + * @e: serialized data extent information + * @code: type code + * @name: name to match to the serialized element. + * + * check that the next serialized data element is of type X and has a tag + * name @name. If @name is specified then there must be a matching + * name element in the stream. If @name is NULL any name element will be + * skipped and only the typecode will be tested. + * returns 1 on success (both type code and name tests match) and the read + * head is advanced past the headers + * returns %0 if either match failes, the read head does not move + */ +static int aa_is_nameX(struct aa_ext *e, enum aa_code code, const char *name) +{ + void *pos = e->pos; + /* + * Check for presence of a tagname, and if present name size + * AA_NAME tag value is a u16. + */ + if (aa_is_X(e, AA_NAME)) { + char *tag = NULL; + size_t size = aa_is_u16_chunk(e, &tag); + /* if a name is specified it must match. otherwise skip tag */ + if (name && (!size || strcmp(name, tag))) + goto fail; + } else if (name) { + /* if a name is specified and there is no name tag fail */ + goto fail; + } + + /* now check if type code matches */ + if (aa_is_X(e, code)) + return 1; + +fail: + e->pos = pos; + return 0; +} + +static int aa_is_u16(struct aa_ext *e, u16 *data, const char *name) +{ + void *pos = e->pos; + if (aa_is_nameX(e, AA_U16, name)) { + if (!aa_inbounds(e, sizeof(u16))) + goto fail; + if (data) + *data = le16_to_cpu(get_unaligned((u16 *)e->pos)); + e->pos += sizeof(u16); + return 1; + } +fail: + e->pos = pos; + return 0; +} + +static int aa_is_u32(struct aa_ext *e, u32 *data, const char *name) +{ + void *pos = e->pos; + if (aa_is_nameX(e, AA_U32, name)) { + if (!aa_inbounds(e, sizeof(u32))) + goto fail; + if (data) + *data = le32_to_cpu(get_unaligned((u32 *)e->pos)); + e->pos += sizeof(u32); + return 1; + } +fail: + e->pos = pos; + return 0; +} + +static int aa_is_u64(struct aa_ext *e, u64 *data, const char *name) +{ + void *pos = e->pos; + if (aa_is_nameX(e, AA_U64, name)) { + if (!aa_inbounds(e, sizeof(u64))) + goto fail; + if (data) + *data = le64_to_cpu(get_unaligned((u64 *)e->pos)); + e->pos += sizeof(u64); + return 1; + } +fail: + e->pos = pos; + return 0; +} + +static size_t aa_is_array(struct aa_ext *e, const char *name) +{ + void *pos = e->pos; + if (aa_is_nameX(e, AA_ARRAY, name)) { + int size; + if (!aa_inbounds(e, sizeof(u16))) + goto fail; + size = (int) le16_to_cpu(get_unaligned((u16 *)e->pos)); + e->pos += sizeof(u16); + return size; + } +fail: + e->pos = pos; + return 0; +} + +static size_t aa_is_blob(struct aa_ext *e, char **blob, const char *name) +{ + void *pos = e->pos; + if (aa_is_nameX(e, AA_BLOB, name)) { + u32 size; + if (!aa_inbounds(e, sizeof(u32))) + goto fail; + size = le32_to_cpu(get_unaligned((u32 *)e->pos)); + e->pos += sizeof(u32); + if (aa_inbounds(e, (size_t) size)) { + *blob = e->pos; + e->pos += size; + return size; + } + } +fail: + e->pos = pos; + return 0; +} + +static int aa_is_string(struct aa_ext *e, char **string, const char *name) +{ + char *src_str; + size_t size = 0; + void *pos = e->pos; + *string = NULL; + if (aa_is_nameX(e, AA_STRING, name) && + (size = aa_is_u16_chunk(e, &src_str))) { + /* strings are null terminated, length is size - 1 */ + if (src_str[size - 1] != 0) + goto fail; + *string = src_str; + } + + return size; + +fail: + e->pos = pos; + return 0; +} + +static int aa_is_dynstring(struct aa_ext *e, char **string, const char *name) +{ + char *tmp; + void *pos = e->pos; + int res = aa_is_string(e, &tmp, name); + *string = NULL; + + if (!res) + return res; + + *string = kstrdup(tmp, GFP_KERNEL); + if (!*string) { + e->pos = pos; + return 0; + } + + return res; +} + +/** + * aa_unpack_dfa - unpack a file rule dfa + * @e: serialized data extent information + * + * returns dfa or ERR_PTR + */ +static struct aa_dfa *aa_unpack_dfa(struct aa_ext *e) +{ + char *blob = NULL; + size_t size, error = 0; + struct aa_dfa *dfa = NULL; + + size = aa_is_blob(e, &blob, "aadfa"); + if (size) { + dfa = aa_match_alloc(); + if (dfa) { + /* + * The dfa is aligned with in the blob to 8 bytes + * from the beginning of the stream. + */ + size_t sz = blob - (char *) e->start; + size_t pad = ALIGN(sz, 8) - sz; + error = unpack_dfa(dfa, blob + pad, size - pad); + if (!error) + error = verify_dfa(dfa); + } else { + error = -ENOMEM; + } + + if (error) { + aa_match_free(dfa); + dfa = ERR_PTR(error); + } + } + + return dfa; +} + +static int aa_unpack_trans_table(struct aa_ext *e, struct aa_profile *profile) +{ + void *pos = e->pos; + + /* exec table is optional */ + if (aa_is_nameX(e, AA_STRUCT, "xtable")) { + int i, size; + + size = aa_is_array(e, NULL); + /* currently 4 exec bits and entries 0-3 are reserved iupcx */ + if (size > 16 - 4) + goto fail; + profile->file.trans.table = kzalloc(sizeof(char *) * size, + GFP_KERNEL); + if (!profile->file.trans.table) + goto fail; + + for (i = 0; i < size; i++) { + char *tmp; + if (!aa_is_dynstring(e, &tmp, NULL)) + goto fail; + /* note: strings beginning with a : have an embedded + \0 seperating the profile ns name from the profile + name */ + profile->file.trans.table[i] = tmp; + } + if (!aa_is_nameX(e, AA_ARRAYEND, NULL)) + goto fail; + if (!aa_is_nameX(e, AA_STRUCTEND, NULL)) + goto fail; + profile->file.trans.size = size; + } + return 1; + +fail: + e->pos = pos; + return 0; +} + +int aa_unpack_rlimits(struct aa_ext *e, struct aa_profile *profile) +{ + void *pos = e->pos; + + /* rlimits are optional */ + if (aa_is_nameX(e, AA_STRUCT, "rlimits")) { + int i, size; + u32 tmp = 0; + if (!aa_is_u32(e, &tmp, NULL)) + goto fail; + profile->rlimits.mask = tmp; + + size = aa_is_array(e, NULL); + if (size > RLIM_NLIMITS) + goto fail; + for (i = 0; i < size; i++) { + u64 tmp = 0; + if (!aa_is_u64(e, &tmp, NULL)) + goto fail; + profile->rlimits.limits[i].rlim_max = tmp; + } + if (!aa_is_nameX(e, AA_ARRAYEND, NULL)) + goto fail; + if (!aa_is_nameX(e, AA_STRUCTEND, NULL)) + goto fail; + } + return 1; + +fail: + e->pos = pos; + return 0; +} + +/** + * aa_unpack_profile - unpack a serialized profile + * @e: serialized data extent information + * @sa: audit struct for the operation + */ +static struct aa_profile *aa_unpack_profile(struct aa_ext *e, + struct aa_audit_iface *sa) +{ + struct aa_profile *profile = NULL; + char *name; + size_t size = 0; + int i, error = -EPROTO; + u32 tmp; + + /* check that we have the right struct being passed */ + if (!aa_is_nameX(e, AA_STRUCT, "profile")) + goto fail; + if (!aa_is_string(e, &name, NULL)) + goto fail; + + profile = alloc_aa_profile(name); + if (!profile) + return ERR_PTR(-ENOMEM); + + /* xmatch is optional and may be NULL */ + profile->xmatch = aa_unpack_dfa(e); + if (IS_ERR(profile->xmatch)) { + error = PTR_ERR(profile->xmatch); + profile->xmatch = NULL; + goto fail; + } + /* xmatch_len is not optional is xmatch is set */ + if (profile->xmatch && !aa_is_u32(e, &tmp, NULL)) + goto fail; + profile->xmatch_len = tmp; + + /* per profile debug flags (complain, audit) */ + if (!aa_is_nameX(e, AA_STRUCT, "flags")) + goto fail; + if (!aa_is_u32(e, &tmp, NULL)) + goto fail; + if (tmp) + profile->flags |= PFLAG_HAT; + if (!aa_is_u32(e, &tmp, NULL)) + goto fail; + if (tmp) + profile->mode = APPARMOR_COMPLAIN; + if (!aa_is_u32(e, &tmp, NULL)) + goto fail; + if (tmp) + profile->audit = AUDIT_ALL; + + if (!aa_is_nameX(e, AA_STRUCTEND, NULL)) + goto fail; + + if (!aa_is_u32(e, &(profile->caps.allowed.cap[0]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.audit.cap[0]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.quiet.cap[0]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.set.cap[0]), NULL)) + goto fail; + + if (aa_is_nameX(e, AA_STRUCT, "caps64")) { + /* optional upper half of 64 bit caps */ + if (!aa_is_u32(e, &(profile->caps.allowed.cap[1]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.audit.cap[1]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.quiet.cap[1]), NULL)) + goto fail; + if (!aa_is_u32(e, &(profile->caps.set.cap[1]), NULL)) + goto fail; + if (!aa_is_nameX(e, AA_STRUCTEND, NULL)) + goto fail; + } + + if (!aa_unpack_rlimits(e, profile)) + goto fail; + + size = aa_is_array(e, "net_allowed_af"); + if (size) { + if (size > AF_MAX) + goto fail; + + for (i = 0; i < size; i++) { + if (!aa_is_u16(e, &profile->net.allowed[i], NULL)) + goto fail; + if (!aa_is_u16(e, &profile->net.audit[i], NULL)) + goto fail; + if (!aa_is_u16(e, &profile->net.quiet[i], NULL)) + goto fail; + } + if (!aa_is_nameX(e, AA_ARRAYEND, NULL)) + goto fail; + /* allow unix domain and netlink sockets they are handled + * by IPC + */ + } + profile->net.allowed[AF_UNIX] = 0xffff; + profile->net.allowed[AF_NETLINK] = 0xffff; + + /* get file rules */ + profile->file.dfa = aa_unpack_dfa(e); + if (IS_ERR(profile->file.dfa)) { + error = PTR_ERR(profile->file.dfa); + profile->file.dfa = NULL; + goto fail; + } + + if (!aa_unpack_trans_table(e, profile)) + goto fail; + + if (!aa_is_nameX(e, AA_STRUCTEND, NULL)) + goto fail; + + return profile; + +fail: + sa->name = profile && profile->base.name ? profile->base.name : + "unknown"; + if (!sa->base.info) + sa->base.info = "failed to unpack profile"; + aa_audit_iface(sa); + + free_aa_profile(profile); + + return ERR_PTR(error); +} + +/** + * aa_verify_head - unpack serialized stream header + * @e: serialized data read head + * @operation: operation header is being verified for + * + * returns error or 0 if header is good + */ +static int aa_verify_header(struct aa_ext *e, struct aa_audit_iface *sa) +{ + /* get the interface version */ + if (!aa_is_u32(e, &e->version, "version")) { + sa->base.info = "invalid profile format"; + aa_audit_iface(sa); + return -EPROTONOSUPPORT; + } + + /* check that the interface version is currently supported */ + if (e->version != 5) { + sa->base.info = "unsupported interface version"; + aa_audit_iface(sa); + return -EPROTONOSUPPORT; + } + + /* read the namespace if present */ + if (!aa_is_string(e, &e->ns_name, "namespace")) + e->ns_name = NULL; + + return 0; +} + + + +/** + * aa_interface_add_profiles - Unpack and add new profile(s) to the profile list + * @data: serialized data stream + * @size: size of the serialized data stream + */ +ssize_t aa_interface_add_profiles(void *data, size_t size) +{ + struct aa_profile *profile; + struct aa_namespace *ns = NULL; + struct aa_policy_common *common; + struct aa_ext e = { + .start = data, + .end = data + size, + .pos = data, + .ns_name = NULL + }; + ssize_t error; + struct aa_audit_iface sa; + aa_audit_init(&sa, "profile_load", &e); + + error = aa_verify_header(&e, &sa); + if (error) + return error; + + profile = aa_unpack_profile(&e, &sa); + if (IS_ERR(profile)) + return PTR_ERR(profile); + + sa.name2 = e.ns_name; + ns = aa_prepare_namespace(e.ns_name); + if (IS_ERR(ns)) { + sa.base.info = "failed to prepare namespace"; + sa.base.error = PTR_ERR(ns); + goto fail; + } + /* profiles are currently loaded flat with fqnames */ + sa.name = profile->fqname; + + write_lock(&ns->base.lock); + + common = __aa_find_parent_by_fqname(ns, sa.name); + if (!common) { + sa.base.info = "parent does not exist"; + sa.base.error = -ENOENT; + goto fail2; + } + + if (common != &ns->base) + profile->parent = aa_get_profile((struct aa_profile *) common); + + if (__aa_find_profile(&common->profiles, profile->base.name)) { + /* A profile with this name exists already. */ + sa.base.info = "profile already exists"; + sa.base.error = -EEXIST; + goto fail2; + } + profile->sid = aa_alloc_sid(AA_ALLOC_SYS_SID); + profile->ns = aa_get_namespace(ns); + + __aa_add_profile(common, profile); + write_unlock(&ns->base.lock); + + aa_audit_iface(&sa); + aa_put_namespace(ns); + kfree(e.ns_name); + return size; + +fail2: + write_unlock(&ns->base.lock); + +fail: + error = aa_audit_iface(&sa); + aa_put_namespace(ns); + aa_put_profile(profile); + kfree(e.ns_name); + return error; +} + +/** + * aa_interface_replace_profiles - replace profile(s) on the profile list + * @udata: serialized data stream + * @size: size of the serialized data stream + * + * unpack and replace a profile on the profile list and uses of that profile + * by any aa_task_context. If the profile does not exist on the profile list + * it is added. Return %0 or error. + */ +ssize_t aa_interface_replace_profiles(void *udata, size_t size) +{ + struct aa_policy_common *common; + struct aa_profile *old_profile = NULL, *new_profile; + struct aa_namespace *ns; + struct aa_ext e = { + .start = udata, + .end = udata + size, + .pos = udata, + .ns_name = NULL + }; + ssize_t error; + struct aa_audit_iface sa; + aa_audit_init(&sa, "profile_replace", &e); + + if (g_apparmor_lock_policy) + return -EACCES; + + error = aa_verify_header(&e, &sa); + if (error) + return error; + + new_profile = aa_unpack_profile(&e, &sa); + if (IS_ERR(new_profile)) + return PTR_ERR(new_profile); + + sa.name2 = e.ns_name; + ns = aa_prepare_namespace(e.ns_name); + if (!ns) { + sa.base.info = "failed to prepare namespace"; + sa.base.error = -ENOMEM; + goto fail; + } + + sa.name = new_profile->fqname; + + write_lock(&ns->base.lock); + common = __aa_find_parent_by_fqname(ns, sa.name); + + if (!common) { + sa.base.info = "parent does not exist"; + sa.base.error = -ENOENT; + goto fail2; + } + + if (common != &ns->base) + new_profile->parent = aa_get_profile((struct aa_profile *) + common); + + old_profile = __aa_find_profile(&common->profiles, + new_profile->base.name); + aa_get_profile(old_profile); + if (old_profile && old_profile->flags & PFLAG_IMMUTABLE) { + sa.base.info = "cannot replace immutible profile"; + sa.base.error = -EPERM; + goto fail2; + } else if (old_profile) { + // __aa_profile_list_release(&old_profile->base.profiles); + /* TODO: remove for new interface + * move children profiles over to the new profile so + * that replacement behaves correctly + */ + // list_replace_init(&old_profile->base.profiles, + // &new_profile->base.profiles); + struct aa_profile *profile, *tmp; + list_for_each_entry_safe(profile, tmp, &old_profile->base.profiles, + base.list) { + aa_put_profile(profile->parent); + list_del(&profile->base.list); + profile->parent = aa_get_profile(new_profile); + list_add(&profile->base.list, + &new_profile->base.profiles); + } + __aa_replace_profile(old_profile, new_profile); + new_profile->sid = old_profile->sid; + } else { + __aa_add_profile(common, new_profile); + new_profile->sid = aa_alloc_sid(AA_ALLOC_SYS_SID); + } + + new_profile->ns = aa_get_namespace(ns); + + write_unlock(&ns->base.lock); + + if (!old_profile) + sa.base.operation = "profile_load"; + + aa_audit_iface(&sa); + aa_put_namespace(ns); + aa_put_profile(old_profile); + kfree(e.ns_name); + return size; + +fail2: + write_unlock(&ns->base.lock); +fail: + error = aa_audit_iface(&sa); + aa_put_namespace(ns); + aa_put_profile(old_profile); + aa_put_profile(new_profile); + kfree(e.ns_name); + return error; +} + +/** + * aa_interface_remove_profiles - remove profile(s) from the system + * @name: name of the profile to remove + * @size: size of the name + * + * remove a profile from the profile list and all aa_task_context references + * to said profile. + * NOTE: removing confinement does not restore rlimits to preconfinemnet values + */ +ssize_t aa_interface_remove_profiles(char *name, size_t size) +{ + struct aa_namespace *ns; + struct aa_profile *profile; + struct aa_audit_iface sa; + aa_audit_init(&sa, "profile_remove", NULL); + + if (g_apparmor_lock_policy) + return -EACCES; + + write_lock(&ns_list_lock); + if (name[0] == ':') { + char *ns_name; + name = aa_split_name_from_ns(name, &ns_name); + ns = __aa_find_namespace(&ns_list, ns_name); + } else { + ns = aa_get_namespace(default_namespace); + } + + if (!ns) { + sa.base.info = "failed: namespace does not exist"; + goto fail_ns_list_lock; + } + + sa.name2 = ns->base.name; + write_lock(&ns->base.lock); + if (!name) { + /* remove namespace */ + // __aa_remove_namespace(ns); + } else { + /* remove profile */ + profile = __aa_find_profile_by_fqname(ns, name); + if (!profile) { + sa.name = name; + sa.base.info = "failed: profile does not exist"; + goto fail_ns_lock; + } + sa.name = profile->fqname; + __aa_profile_list_release(&profile->base.profiles); + __aa_remove_profile(profile, profile->ns->unconfined); + } + write_unlock(&ns->base.lock); + write_unlock(&ns_list_lock); + + aa_audit_iface(&sa); + aa_put_namespace(ns); + return size; + +fail_ns_lock: + write_unlock(&ns->base.lock); + +fail_ns_list_lock: + write_unlock(&ns_list_lock); + aa_audit_iface(&sa); + return -ENOENT; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/capability.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/capability.c @@ -0,0 +1,123 @@ +/* + * AppArmor security module + * + * This file contains AppArmor capability mediation functions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include + +#include "include/apparmor.h" +#include "include/capability.h" +#include "include/context.h" +#include "include/policy.h" +#include "include/audit.h" + +/* + * Table of capability names: we generate it from capabilities.h. + */ +#include "capability_names.h" + +struct audit_cache { + struct task_struct *task; + kernel_cap_t caps; +}; + +static DEFINE_PER_CPU(struct audit_cache, audit_cache); + +struct aa_audit_caps { + struct aa_audit base; + + int cap; +}; + +static void audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_caps *sa = va; + + audit_log_format(ab, " name="); + audit_log_untrustedstring(ab, capability_names[sa->cap]); +} + +static int aa_audit_caps(struct aa_profile *profile, struct aa_audit_caps *sa) +{ + struct audit_cache *ent; + int type = AUDIT_APPARMOR_AUTO; + + if (likely(!sa->base.error)) { + /* test if auditing is being forced */ + if (likely((PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) && + !cap_raised(profile->caps.audit, sa->cap))) + return 0; + type = AUDIT_APPARMOR_AUDIT; + } else if (PROFILE_KILL(profile) || + cap_raised(profile->caps.kill, sa->cap)) { + type = AUDIT_APPARMOR_KILL; + } else if (cap_raised(profile->caps.quiet, sa->cap) && + PROFILE_AUDIT_MODE(profile) != AUDIT_NOQUIET && + PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) { + /* quiet auditing */ + return sa->base.error; + } + + /* Do simple duplicate message elimination */ + ent = &get_cpu_var(audit_cache); + if (sa->base.task == ent->task && cap_raised(ent->caps, sa->cap)) { + put_cpu_var(audit_cache); + if (PROFILE_COMPLAIN(profile)) + return 0; + return sa->base.error; + } else { + ent->task = sa->base.task; + cap_raise(ent->caps, sa->cap); + } + put_cpu_var(audit_cache); + + return aa_audit(type, profile, &sa->base, audit_cb); +} + +int aa_profile_capable(struct aa_profile *profile, int cap) +{ + return cap_raised(profile->caps.allowed, cap) ? 0 : -EPERM; +} + +/** + * aa_capable - test permission to use capability + * @task: task doing capability test against + * @profile: profile confining @task + * @cap: capability to be tested + * @audit: whether an audit record should be generated + * + * Look up capability in profile capability set. + * Returns 0 on success, or else an error code. + */ +int aa_capable(struct task_struct *task, struct aa_profile *profile, int cap, + int audit) +{ + int error = aa_profile_capable(profile, cap); + struct aa_audit_caps sa; + + if (!audit) { + if (PROFILE_COMPLAIN(profile)) + return 0; + return error; + } + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = "capable"; + sa.base.task = task; + sa.base.gfp_mask = GFP_ATOMIC; + sa.base.error = error; + sa.cap = cap; + + return aa_audit_caps(profile, &sa); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/file.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/file.c @@ -0,0 +1,426 @@ +/* + * AppArmor security module + * + * This file contains AppArmor mediation of files + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include "include/apparmor.h" +#include "include/audit.h" +#include "include/file.h" +#include "include/match.h" +#include "include/path.h" +#include "include/policy.h" + +struct file_perms nullperms; + +static void aa_audit_file_sub_mask(struct audit_buffer *ab, char *buffer, + u16 mask, u16 xindex) +{ + + /* const char xchar[] = "PpCc";*/ + + char *m = buffer; + + if (mask & AA_EXEC_MMAP) + *m++ = 'm'; + if (mask & MAY_READ) + *m++ = 'r'; + if (mask & (MAY_WRITE | AA_MAY_CREATE)) + *m++ = 'w'; + else if (mask & MAY_APPEND) + *m++ = 'a'; + if (mask & AA_MAY_LINK) + *m++ = 'l'; + if (mask & AA_MAY_LOCK) + *m++ = 'k'; + if (mask & MAY_EXEC) { + *m++ = 'x'; + +/* FIXME: only want more advanced auditing of x if in audit/hint mode + u16 index = xindex & AA_X_INDEX_MASK; + u16 xtype = xindex & AA_X_TYPE_MASK; + if (xtype > AA_X_NONE) + *m++ = xchar[(xindex >> 12) & 0x3]; + if (xindex & AA_X_INHERIT) { + *m++ = 'i'; + } else if (xindex & AA_X_UNCONFINED) { + if (xindex & AA_X_UNSAFE) + *m++ = 'u'; + else + *m++ = 'U'; + } + *m++ = 'x'; + / * at most 7 character including trailing \0 * / + if (xtype == AA_X_VARIABLE) { + m += sprintf(m, "->v%x", index); + } else if (xtype == AA_X_TABLE) { + m += sprintf(m, "->n%x", index); + } +*/ + } + *m++ = '\0'; +} + +static void aa_audit_file_mask(struct audit_buffer *ab, const char *name, + u16 mask, int xindex, int owner) +{ +/* char str[18]; */ + char str[10]; + + aa_audit_file_sub_mask(ab, str, mask, xindex); + if (owner) + audit_log_format(ab, " %s=\"%s::\"", name, str); + else + audit_log_format(ab, " %s=\"::%s\"", name, str); +} + +void file_audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_file *sa = va; + u16 denied = sa->request & ~sa->perms.allowed; + uid_t fsuid; + + if (sa->base.task) + fsuid = task_uid(sa->base.task); + else + fsuid = current_fsuid(); + + if (sa->request & AA_AUDIT_FILE_MASK) + aa_audit_file_mask(ab, "requested_mask", sa->request, + AA_X_NONE, fsuid == sa->cond->uid); + + if (denied & AA_AUDIT_FILE_MASK) + aa_audit_file_mask(ab, "denied_mask", denied, sa->perms.xindex, + fsuid == sa->cond->uid); + + if (sa->request & AA_AUDIT_FILE_MASK) { + audit_log_format(ab, " fsuid=%d", fsuid); + audit_log_format(ab, " ouid=%d", sa->cond->uid); + } + + if (sa->name) { + audit_log_format(ab, " name="); + audit_log_untrustedstring(ab, sa->name); + } + + if (sa->name2) { + audit_log_format(ab, " name2="); + audit_log_untrustedstring(ab, sa->name2); + } + + if (sa->name3) { + audit_log_format(ab, " name3="); + audit_log_untrustedstring(ab, sa->name3); + } +} + +int aa_audit_file(struct aa_profile *profile, struct aa_audit_file *sa) +{ + int type = AUDIT_APPARMOR_AUTO; + + if (likely(!sa->base.error)) { + u16 mask = sa->perms.audit; + + if (unlikely(PROFILE_AUDIT_MODE(profile) == AUDIT_ALL)) + mask = 0xffff; + + /* mask off perms that are not being force audited */ + sa->request &= mask; + + if (likely(!sa->request)) + return 0; + type = AUDIT_APPARMOR_AUDIT; + } else { + /* quiet auditing of specific known rejects */ + u16 mask = sa->perms.quiet; + u16 denied = sa->request & ~sa->perms.allowed; + + if (denied & sa->perms.kill) + type = AUDIT_APPARMOR_KILL; + + /* assumes quiet and kill do not overlap */ + if ((denied & mask) && + PROFILE_AUDIT_MODE(profile) != AUDIT_NOQUIET && + PROFILE_AUDIT_MODE(profile) != AUDIT_ALL) + denied &= ~mask; + + if (!denied) + return PROFILE_COMPLAIN(profile) ? 0 : sa->base.error; + } + return aa_audit(type, profile, (struct aa_audit *)sa, file_audit_cb); +} + +/* FIXME: convert from dfa + state to permission entry */ +struct file_perms aa_compute_perms(struct aa_dfa *dfa, unsigned int state, + struct path_cond *cond) +{ + struct file_perms perms; + + /* FIXME: change over to new dfa format */ + /* currently file perms are encoded in the dfa */ + perms.kill = 0; + perms.dindex = 0; + + if (current_fsuid() == cond->uid) { + perms.allowed = dfa_user_allow(dfa, state); + perms.audit = dfa_user_audit(dfa, state); + perms.quiet = dfa_user_quiet(dfa, state); + perms.xindex = dfa_user_xindex(dfa, state); + } else { + perms.allowed = dfa_other_allow(dfa, state); + perms.audit = dfa_other_audit(dfa, state); + perms.quiet = dfa_other_quiet(dfa, state); + perms.xindex = dfa_other_xindex(dfa, state); + } + /* in the old mapping MAY_WRITE implies AA_MAY_CREATE */ + perms.allowed |= (perms.allowed & MAY_WRITE) << 6; + perms.audit |= (perms.audit & MAY_WRITE) << 6; + perms.quiet |= (perms.quiet & MAY_WRITE) << 6; + + /* in the old mapping AA_MAY_LOCK and link subset are overlayed + * and only determined by which part of a pair they are in + */ + if (perms.allowed & AA_MAY_LOCK) + perms.allowed |= AA_LINK_SUBSET; + + /* change_profile wasn't determined by ownership in old mapping */ + if (ACCEPT_TABLE(dfa)[state] & 0x80000000) + perms.allowed |= AA_MAY_CHANGE_PROFILE; + + return perms; +} + +struct file_perms aa_str_perms(struct aa_dfa *dfa, unsigned int start, + const char *name, struct path_cond *cond, + unsigned int *rstate) +{ + unsigned int state; + if (!dfa) + return nullperms; + + state = aa_dfa_match(dfa, start, name); + + if (rstate) + *rstate = state; + + /* TODO: convert to new dfa format */ + + return aa_compute_perms(dfa, state, cond); +} + +int aa_pathstr_perm(struct aa_profile *profile, const char *op, + const char *name, u16 request, struct path_cond *cond) +{ + struct aa_audit_file sa; + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = op; + sa.base.gfp_mask = GFP_KERNEL; + sa.request = request; + sa.name = name; + sa.cond = cond; + + sa.perms = aa_str_perms(profile->file.dfa, DFA_START, sa.name, cond, + NULL); + if (request & ~sa.perms.allowed) + sa.base.error = -EACCES; + return aa_audit_file(profile, &sa); +} + +int aa_path_perm(struct aa_profile *profile, const char *operation, + struct path *path, u16 request, struct path_cond *cond) +{ + struct aa_audit_file sa; + char *buffer, *name; + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = operation; + sa.base.gfp_mask = GFP_KERNEL; + sa.request = request; + sa.cond = cond; + + sa.base.error = aa_get_name(path, S_ISDIR(cond->mode), &buffer, + &name); + sa.name = name; + if (sa.base.error) { + sa.perms = nullperms; + if (sa.base.error == -ENOENT) + sa.base.info = "Failed name lookup - deleted entry"; + else if (sa.base.error == -ESTALE) + sa.base.info = "Failed name lookup - disconnected path"; + else if (sa.base.error == -ENAMETOOLONG) + sa.base.info = "Failed name lookup - name too long"; + else + sa.base.info = "Failed name lookup"; + } else { + sa.perms = aa_str_perms(profile->file.dfa, DFA_START, sa.name, + cond, NULL); + if (request & ~sa.perms.allowed) + sa.base.error = -EACCES; + } + sa.base.error = aa_audit_file(profile, &sa); + kfree(buffer); + + return sa.base.error; +} + +int aa_path_link(struct aa_profile *profile, struct dentry *old_dentry, + struct path *new_dir, struct dentry *new_dentry) +{ + struct path link = { new_dir->mnt, new_dentry }; + struct path target = { new_dir->mnt, old_dentry }; + struct path_cond cond = { old_dentry->d_inode->i_uid, + old_dentry->d_inode->i_mode }; + char *buffer = NULL, *buffer2 = NULL; + char *lname, *tname; + struct file_perms perms; + unsigned int state; + + struct aa_audit_file sa; + memset(&sa, 0, sizeof(sa)); + sa.base.operation = "link"; + sa.base.gfp_mask = GFP_KERNEL; + sa.request = AA_MAY_LINK; + sa.cond = &cond; + sa.perms = nullperms; + + sa.base.error = aa_get_name(&link, 0, &buffer, &lname); + sa.name = lname; + if (sa.base.error) + goto audit; + + sa.base.error = aa_get_name(&target, 0, &buffer2, &tname); + sa.name2 = tname; + if (sa.base.error) + goto audit; + + + sa.perms = aa_str_perms(profile->file.dfa, DFA_START, sa.name, &cond, + &state); + sa.perms.audit &= AA_MAY_LINK; + sa.perms.quiet &= AA_MAY_LINK; + sa.perms.kill &= AA_MAY_LINK; + + if (!(sa.perms.allowed & AA_MAY_LINK)) { + sa.base.error = -EACCES; + goto audit; + } + + /* test to see if target can be paired with link */ + state = aa_dfa_null_transition(profile->file.dfa, state); + perms = aa_str_perms(profile->file.dfa, state, sa.name2, &cond, NULL); + if (!(perms.allowed & AA_MAY_LINK)) { + sa.base.error = -EACCES; + sa.base.info = "target restricted"; + goto audit; + } + + /* done if link subset test is not required */ + if (!(perms.allowed & AA_LINK_SUBSET)) + goto audit; + + /* Do link perm subset test requiring allowed permission on link are a + * subset of the allowed permissions on target. + */ + perms = aa_str_perms(profile->file.dfa, DFA_START, sa.name2, &cond, + NULL); + + /* AA_MAY_LINK is not considered in the subset test */ + sa.request = sa.perms.allowed & ~AA_MAY_LINK; + sa.perms.allowed &= perms.allowed | AA_MAY_LINK; + + sa.request |= AA_AUDIT_FILE_MASK & (sa.perms.allowed & ~perms.allowed); + if (sa.request & ~sa.perms.allowed) + sa.base.error = -EACCES; + else if (sa.perms.allowed & MAY_EXEC) { + if (((sa.perms.xindex & ~AA_X_UNSAFE) != + (perms.xindex &~AA_X_UNSAFE)) || + ((sa.perms.xindex & AA_X_UNSAFE) && + !(perms.xindex & AA_X_UNSAFE))) { + sa.perms.allowed &= ~MAY_EXEC; + sa.request |= MAY_EXEC; + sa.base.error = -EACCES; + sa.base.info = "link not subset of target"; + } + } + +audit: + sa.base.error = aa_audit_file(profile, &sa); + kfree(buffer); + kfree(buffer2); + + return sa.base.error; +} + + +static inline int aa_is_deleted_file(struct dentry *dentry) +{ + if (d_unhashed(dentry)) + return 1; + return 0; +} + +int aa_file_common_perm(struct aa_profile *profile, const char *operation, + struct file *file, u16 request, const char *name, + int error) +{ + struct path_cond cond = { .uid = file->f_path.dentry->d_inode->i_uid, + .mode = file->f_path.dentry->d_inode->i_mode }; + struct aa_audit_file sa; + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = operation; + sa.base.gfp_mask = GFP_KERNEL; + sa.request = request; + sa.base.error = error; + sa.name = name; + sa.cond = &cond; + + if (sa.base.error) { + sa.perms = nullperms; + if (sa.base.error == -ENOENT && + aa_is_deleted_file(file->f_path.dentry)) { + /* Access to open files that are deleted are + * give a pass (implicit delegation + */ + sa.base.error = 0; + sa.perms.allowed = sa.request; + } else if (sa.base.error == -ENOENT) + sa.base.info = "Failed name lookup - deleted entry"; + else if (sa.base.error == -ESTALE) + sa.base.info = "Failed name lookup - disconnected path"; + else if (sa.base.error == -ENAMETOOLONG) + sa.base.info = "Failed name lookup - name too long"; + else + sa.base.info = "Failed name lookup"; + } else { + sa.perms = aa_str_perms(profile->file.dfa, DFA_START, sa.name, + &cond, NULL); + if (request & ~sa.perms.allowed) + sa.base.error = -EACCES; + } + sa.base.error = aa_audit_file(profile, &sa); + + return sa.base.error; +} + +int aa_file_perm(struct aa_profile *profile, const char *operation, + struct file *file, u16 request) +{ + char *buffer, *name; + umode_t mode = file->f_path.dentry->d_inode->i_mode; + int error = aa_get_name(&file->f_path, S_ISDIR(mode), &buffer, &name); + + error = aa_file_common_perm(profile, operation, file, request, name, + error); + kfree(buffer); + return error; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/lsm.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/lsm.c @@ -0,0 +1,1063 @@ +/* + * AppArmor security module + * + * This file contains AppArmor LSM hooks. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "include/apparmor.h" +#include "include/apparmorfs.h" +#include "include/audit.h" +#include "include/capability.h" +#include "include/context.h" +#include "include/file.h" +#include "include/ipc.h" +#include "include/net.h" +#include "include/path.h" +#include "include/policy.h" +#include "include/procattr.h" + +/* Flag indicating whether initialization completed */ +int apparmor_initialized; + + +/* + * LSM hook functions + */ + +/* + * prepare new aa_task_context for modification by prepare_cred block + */ +static int apparmor_cred_prepare(struct cred *new, const struct cred *old, + gfp_t gfp) +{ + struct aa_task_context *cxt = aa_dup_task_context(old->security, gfp); + if (!cxt) + return -ENOMEM; + new->security = cxt; + return 0; +} + +/* + * free the associated aa_task_context and put its profiles + */ +static void apparmor_cred_free(struct cred *cred) +{ + struct aa_task_context *cxt = cred->security; + cred->security = NULL; + aa_free_task_context(cxt); +} + + +static int apparmor_ptrace_may_access(struct task_struct *child, + unsigned int mode) +{ + return aa_ptrace(current, child, mode); +} + + +static int apparmor_ptrace_traceme(struct task_struct *parent) +{ + return aa_ptrace(parent, current, PTRACE_MODE_ATTACH); +} + +/* Derived from security/commoncap.c:cap_capget */ +static int apparmor_capget(struct task_struct *target, kernel_cap_t *effective, + kernel_cap_t *inheritable, kernel_cap_t *permitted) +{ + struct aa_profile *profile; + const struct cred *cred; + + rcu_read_lock(); + cred = __task_cred(target); + aa_cred_policy(cred, &profile); + + *effective = cred->cap_effective; + *inheritable = cred->cap_inheritable; + *permitted = cred->cap_permitted; + + if (profile) { + *effective = cap_combine(*effective, profile->caps.set); + *effective = cap_intersect(*effective, profile->caps.allowed); + } + rcu_read_unlock(); + + return 0; +} + +static int apparmor_capable(struct task_struct *task, const struct cred *cred, + int cap, int audit) +{ + struct aa_profile *profile; + /* cap_capable returns 0 on success, else -EPERM */ + int error = cap_capable(task, cred, cap, audit); + + aa_cred_policy(cred, &profile); + if (profile && (!error || cap_raised(profile->caps.set, cap))) + error = aa_capable(task, profile, cap, audit); + + return error; +} + +static int apparmor_sysctl(struct ctl_table *table, int op) +{ + int error = 0; + struct aa_profile *profile = aa_current_profile_wupd(); + + if (profile) { + char *buffer, *name; + int mask; + + mask = 0; + if (op & 4) + mask |= MAY_READ; + if (op & 2) + mask |= MAY_WRITE; + + error = -ENOMEM; + buffer = (char *)__get_free_page(GFP_KERNEL); + if (!buffer) + goto out; + + /* + * TODO: convert this over to using a global or per + * namespace control instead of a hard coded /proc + */ + name = sysctl_pathname(table, buffer, PAGE_SIZE); + if (name && name - buffer >= 5) { + struct path_cond cond = { 0, S_IFREG }; + name -= 5; + memcpy(name, "/proc", 5); + error = aa_pathstr_perm(profile, "sysctl", name, mask, + &cond); + } + free_page((unsigned long)buffer); + } + +out: + return error; +} + +static int common_perm(const char *op, struct path *path, u16 mask, + struct path_cond *cond) +{ + struct aa_profile *profile; + int error = 0; + + profile = aa_current_profile(); + if (profile) + error = aa_path_perm(profile, op, path, mask, cond); + + return error; +} + +static int common_perm_dentry(const char *op, struct path *dir, + struct dentry *dentry, u16 mask, + struct path_cond *cond) +{ + struct path path = { dir->mnt, dentry }; + + return common_perm(op, &path, mask, cond); +} + +static int common_perm_rm(const char *op, struct path *dir, + struct dentry *dentry, u16 mask) +{ + struct inode *inode = dentry->d_inode; + struct path_cond cond = {}; + + if (!dir->mnt || !inode || !mediated_filesystem(inode)) + return 0; + + cond.uid = inode->i_uid; + cond.mode = inode->i_mode; + + return common_perm_dentry(op, dir, dentry, mask, &cond); +} + +static int common_perm_create(const char *op, struct path *dir, + struct dentry *dentry, u16 mask, umode_t mode) +{ + struct path_cond cond = { current_fsuid(), mode }; + + if (!dir->mnt || !mediated_filesystem(dir->dentry->d_inode)) + return 0; + + return common_perm_dentry(op, dir, dentry, mask, &cond); +} + +static int apparmor_path_unlink(struct path *dir, struct dentry *dentry) +{ + return common_perm_rm("unlink", dir, dentry, MAY_WRITE); +} + +static int apparmor_path_mkdir(struct path *dir, struct dentry *dentry, + int mode) +{ + return common_perm_create("mkdir", dir, dentry, AA_MAY_CREATE, S_IFDIR); +} + +static int apparmor_path_rmdir(struct path *dir, struct dentry *dentry) +{ + return common_perm_rm("rmdir", dir, dentry, MAY_WRITE); +} + +static int apparmor_path_mknod(struct path *dir, struct dentry *dentry, + int mode, unsigned int dev) +{ + return common_perm_create("mknod", dir, dentry, AA_MAY_CREATE, mode); +} + +static int apparmor_path_truncate(struct path *path, loff_t length, + unsigned int time_attrs) +{ + struct path_cond cond = { path->dentry->d_inode->i_uid, + path->dentry->d_inode->i_mode }; + + if (!path->mnt || !mediated_filesystem(path->dentry->d_inode)) + return 0; + return common_perm("truncate", path, MAY_WRITE, &cond); +} + +static int apparmor_path_symlink(struct path *dir, struct dentry *dentry, + const char *old_name) +{ + return common_perm_create("symlink_create", dir, dentry, AA_MAY_CREATE, + S_IFLNK); +} + +static int apparmor_path_link(struct dentry *old_dentry, struct path *new_dir, + struct dentry *new_dentry) +{ + struct aa_profile *profile; + int error = 0; + + if (!mediated_filesystem(old_dentry->d_inode)) + return 0; + + profile = aa_current_profile_wupd(); + if (profile) + error = aa_path_link(profile, old_dentry, new_dir, new_dentry); + return error; +} + +static int apparmor_path_rename(struct path *old_dir, struct dentry *old_dentry, + struct path *new_dir, struct dentry *new_dentry) +{ + struct aa_profile *profile; + int error = 0; + + if (!mediated_filesystem(old_dentry->d_inode)) + return 0; + + profile = aa_current_profile_wupd(); + if (profile) { + struct path old_path = { old_dir->mnt, old_dentry }; + struct path new_path = { new_dir->mnt, new_dentry }; + struct path_cond cond = { old_dentry->d_inode->i_uid, + old_dentry->d_inode->i_mode }; + + error = aa_path_perm(profile, "rename_src", &old_path, + MAY_READ | MAY_WRITE, &cond); + if (!error) + error = aa_path_perm(profile, "rename_dest", &new_path, + AA_MAY_CREATE | MAY_WRITE, &cond); + + } + return error; +} + +static int apparmor_dentry_open(struct file *file, const struct cred *cred) +{ + struct aa_profile *profile; + int error = 0; + + /* If in exec permission is handled by bprm hooks */ + if (current->in_execve || + !mediated_filesystem(file->f_path.dentry->d_inode)) + return 0; + + aa_cred_policy(cred, &profile); + if (profile) { + struct aa_file_cxt *fcxt = file->f_security; + struct inode *inode = file->f_path.dentry->d_inode; + struct path_cond cond = { inode->i_uid, inode->i_mode }; + + error = aa_path_perm(profile, "open", &file->f_path, + aa_map_file_to_perms(file), &cond); + fcxt->profile = aa_get_profile(profile); + /* todo cache actual allowed permissions */ + fcxt->allowed = 0; + } + + return error; +} + +static int apparmor_file_alloc_security(struct file *file) +{ + file->f_security = aa_alloc_file_context(GFP_KERNEL); + if (!file->f_security) + return -ENOMEM; + return 0; + +} + +static void apparmor_file_free_security(struct file *file) +{ + struct aa_file_cxt *cxt = file->f_security; + + aa_free_file_context(cxt); +} + +static int apparmor_file_permission(struct file *file, int mask) +{ + /* + * Most basic (rw) file access is revalidated at exec. + * The revalidation done here is for parent/child hat + * file accesses. + * + * Currently profile replacement does not cause revalidation + * or file revocation. + * + * TODO: cache profiles that have revalidated? + */ + struct aa_file_cxt *fcxt = file->f_security; + struct aa_profile *profile, *fprofile = fcxt->profile; + int error = 0; + + if (!fprofile || !file->f_path.mnt || + !mediated_filesystem(file->f_path.dentry->d_inode)) + return 0; + + profile = aa_current_profile(); + /* TODO: Enable at exec time revalidation of files + if (profile && (fprofile != profile) && + ((PROFILE_IS_HAT(profile) && (profile->parent == fprofile)) || + (PROFILE_IS_HAT(fprofile) && (fprofile->parent == profile)))) + error = aa_file_perm(profile, "file_perm", file, mask); + */ + if (profile && ((fprofile != profile) || (mask & ~fcxt->allowed))) + error = aa_file_perm(profile, "file_perm", file, mask); + + return error; +} + +static int common_file_perm(const char *op, struct file *file, u16 mask) +{ + const struct aa_file_cxt *fcxt = file->f_security; + struct aa_profile *profile, *fprofile = fcxt->profile; + int error = 0; + + if (!fprofile || !file->f_path.mnt || + !mediated_filesystem(file->f_path.dentry->d_inode)) + return 0; + + profile = aa_current_profile_wupd(); + if (profile && ((fprofile != profile) || (mask & ~fcxt->allowed))) + error = aa_file_perm(profile, op, file, mask); + + return error; +} + +static int apparmor_file_lock(struct file *file, unsigned int cmd) +{ + u16 mask = AA_MAY_LOCK; + + if (cmd == F_WRLCK) + mask |= MAY_WRITE; + + return common_file_perm("file_lock", file, mask); +} + + +/* + * AppArmor doesn't current use the fcntl hook. + * + * FIXME - these are not implemented yet - REMOVE file_fcntl hook + * NOTE: some of the file control commands are further mediated + * by other hooks + * F_SETOWN - security_file_set_fowner + * F_SETLK - security_file_lock + * F_SETLKW - security_file_lock + * O_APPEND - AppArmor mediates append as a subset of full write + * so changing from full write to appending write is + * dropping priviledge and not restricted. + + +static int apparmor_file_fcntl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + return 0; +} +*/ + +static int common_mmap(struct file *file, const char *operation, + unsigned long prot, unsigned long flags) +{ + struct dentry *dentry; + int mask = 0; + + if (!file || !file->f_security) + return 0; + + if (prot & PROT_READ) + mask |= MAY_READ; + /* Private mappings don't require write perms since they don't + * write back to the files */ + if ((prot & PROT_WRITE) && !(flags & MAP_PRIVATE)) + mask |= MAY_WRITE; + if (prot & PROT_EXEC) + mask |= AA_EXEC_MMAP; + + dentry = file->f_path.dentry; + return common_file_perm(operation, file, mask); +} + +static int apparmor_file_mmap(struct file *file, unsigned long reqprot, + unsigned long prot, unsigned long flags, + unsigned long addr, unsigned long addr_only) +{ + if ((addr < mmap_min_addr) && !capable(CAP_SYS_RAWIO)) { + struct aa_profile *profile = aa_current_profile_wupd(); + if (profile) + /* future control check here */ + return -EACCES; + else + return -EACCES; + } + + return common_mmap(file, "file_mmap", prot, flags); +} + +static int apparmor_file_mprotect(struct vm_area_struct *vma, + unsigned long reqprot, unsigned long prot) +{ + return common_mmap(vma->vm_file, "file_mprotect", prot, + !(vma->vm_flags & VM_SHARED) ? MAP_PRIVATE : 0); +} + +static int apparmor_getprocattr(struct task_struct *task, char *name, + char **value) +{ + int error = -ENOENT; + struct aa_namespace *ns; + struct aa_profile *profile, *onexec, *prev; + const struct cred *cred = aa_get_task_policy(task, &profile); + struct aa_task_context *cxt = cred->security; + ns = cxt->sys.profile->ns; + onexec = cxt->sys.onexec; + prev = cxt->sys.previous; + + /* task must be either querying itself, unconfined or can ptrace */ + if (current != task && profile && !capable(CAP_SYS_PTRACE)) { + error = -EPERM; + } else { + if (strcmp(name, "current") == 0) { + error = aa_getprocattr(ns, profile, value); + } else if (strcmp(name, "prev") == 0) { + if (prev) + error = aa_getprocattr(ns, prev, value); + } else if (strcmp(name, "exec") == 0) { + if (onexec) + error = aa_getprocattr(ns, onexec, value); + } else { + error = -EINVAL; + } + } + + put_cred(cred); + + return error; +} + +static int apparmor_setprocattr(struct task_struct *task, char *name, + void *value, size_t size) +{ + char *command, *args; + int error; + + if (size == 0 || size >= PAGE_SIZE) + return -EINVAL; + + /* task can only write its own attributes */ + if (current != task) + return -EACCES; + + args = value; + args[size] = '\0'; + args = strstrip(args); + command = strsep(&args, " "); + if (!args) + return -EINVAL; + while (isspace(*args)) + args++; + if (!*args) + return -EINVAL; + + if (strcmp(name, "current") == 0) { + if (strcmp(command, "changehat") == 0) { + error = aa_setprocattr_changehat(args, !AA_DO_TEST); + } else if (strcmp(command, "permhat") == 0) { + error = aa_setprocattr_changehat(args, AA_DO_TEST); + } else if (strcmp(command, "changeprofile") == 0) { + error = aa_setprocattr_changeprofile(args, 0, + !AA_DO_TEST); + } else if (strcmp(command, "permprofile") == 0) { + error = aa_setprocattr_changeprofile(args, 0, + AA_DO_TEST); + } else if (strcmp(command, "permipc") == 0) { + error = aa_setprocattr_permipc(args); + } else { + struct aa_audit sa; + memset(&sa, 0, sizeof(sa)); + sa.operation = "setprocattr"; + sa.gfp_mask = GFP_KERNEL; + sa.info = name; + sa.error = -EINVAL; + return aa_audit(AUDIT_APPARMOR_DENIED, NULL, &sa, NULL); + } + } else if (strcmp(name, "exec") == 0) { + error = aa_setprocattr_changeprofile(strstrip(args), 1, + !AA_DO_TEST); + } else { + /* only support the "current" and "exec" process attributes */ + return -EINVAL; + } + if (!error) + error = size; + return error; +} + +static int apparmor_task_setrlimit(unsigned int resource, + struct rlimit *new_rlim) +{ + struct aa_profile *profile = aa_current_profile_wupd(); + int error = 0; + + if (profile) { + error = aa_task_setrlimit(profile, resource, new_rlim); + } + + return error; +} + +#ifdef CONFIG_SECURITY_APPARMOR_NETWORK +static int apparmor_socket_create(int family, int type, int protocol, int kern){ + struct aa_profile *profile; + int error = 0; + + if (kern) + return 0; + + profile = aa_current_profile(); + if (profile) + error = aa_net_perm(profile, "socket_create", family, + type, protocol); + return error; +} + +static int apparmor_socket_post_create(struct socket *sock, int family, + int type, int protocol, int kern) +{ + struct sock *sk = sock->sk; + + if (kern) + return 0; + + return aa_revalidate_sk(sk, "socket_post_create"); +} + +static int apparmor_socket_bind(struct socket *sock, + struct sockaddr *address, int addrlen) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_bind"); +} + +static int apparmor_socket_connect(struct socket *sock, + struct sockaddr *address, int addrlen) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_connect"); +} + +static int apparmor_socket_listen(struct socket *sock, int backlog) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_listen"); +} + +static int apparmor_socket_accept(struct socket *sock, struct socket *newsock) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_accept"); +} + +static int apparmor_socket_sendmsg(struct socket *sock, + struct msghdr *msg, int size) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_sendmsg"); +} + +static int apparmor_socket_recvmsg(struct socket *sock, + struct msghdr *msg, int size, int flags) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_recvmsg"); +} + +static int apparmor_socket_getsockname(struct socket *sock) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_getsockname"); +} + +static int apparmor_socket_getpeername(struct socket *sock) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_getpeername"); +} + +static int apparmor_socket_getsockopt(struct socket *sock, int level, + int optname) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_getsockopt"); +} + +static int apparmor_socket_setsockopt(struct socket *sock, int level, + int optname) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_setsockopt"); +} + +static int apparmor_socket_shutdown(struct socket *sock, int how) +{ + struct sock *sk = sock->sk; + + return aa_revalidate_sk(sk, "socket_shutdown"); +} +#endif + +static struct security_operations apparmor_ops = { + .name = "apparmor", + + .ptrace_may_access = apparmor_ptrace_may_access, + .ptrace_traceme = apparmor_ptrace_traceme, + .capget = apparmor_capget, + .sysctl = apparmor_sysctl, + .capable = apparmor_capable, +/* + .inode_create = apparmor_inode_create, + .inode_setattr = apparmor_inode_setattr, + .inode_setxattr = apparmor_inode_setxattr, + .inode_getxattr = apparmor_inode_getxattr, + .inode_listxattr = apparmor_inode_listxattr, + .inode_removexattr = apparmor_inode_removexattr, + .inode_permission = ??? use to mediate owner access to non-mediated fs +*/ + + .path_link = apparmor_path_link, + .path_unlink = apparmor_path_unlink, + .path_symlink = apparmor_path_symlink, + .path_mkdir = apparmor_path_mkdir, + .path_rmdir = apparmor_path_rmdir, + .path_mknod = apparmor_path_mknod, + .path_rename = apparmor_path_rename, + .path_truncate = apparmor_path_truncate, + .dentry_open = apparmor_dentry_open, + + .file_permission = apparmor_file_permission, + .file_alloc_security = apparmor_file_alloc_security, + .file_free_security = apparmor_file_free_security, + .file_mmap = apparmor_file_mmap, + .file_mprotect = apparmor_file_mprotect, + .file_lock = apparmor_file_lock, + +/* .file_fcntl = apparmor_file_fcntl, */ + + .getprocattr = apparmor_getprocattr, + .setprocattr = apparmor_setprocattr, + +#ifdef CONFIG_SECURITY_APPARMOR_NETWORK + .socket_create = apparmor_socket_create, + .socket_post_create = apparmor_socket_post_create, + .socket_bind = apparmor_socket_bind, + .socket_connect = apparmor_socket_connect, + .socket_listen = apparmor_socket_listen, + .socket_accept = apparmor_socket_accept, + .socket_sendmsg = apparmor_socket_sendmsg, + .socket_recvmsg = apparmor_socket_recvmsg, + .socket_getsockname = apparmor_socket_getsockname, + .socket_getpeername = apparmor_socket_getpeername, + .socket_getsockopt = apparmor_socket_getsockopt, + .socket_setsockopt = apparmor_socket_setsockopt, + .socket_shutdown = apparmor_socket_shutdown, +#endif + + .cred_free = apparmor_cred_free, + .cred_prepare = apparmor_cred_prepare, + + .bprm_set_creds = apparmor_bprm_set_creds, + // .bprm_committing_creds = apparmor_bprm_committing_creds, + .bprm_committed_creds = apparmor_bprm_committed_creds, + .bprm_secureexec = apparmor_bprm_secureexec, + + .task_setrlimit = apparmor_task_setrlimit, +}; + + +/* + * AppArmor sysfs module parameters + */ + +static int param_set_aabool(const char *val, struct kernel_param *kp); +static int param_get_aabool(char *buffer, struct kernel_param *kp); +#define param_check_aabool(name, p) __param_check(name, p, int) + +static int param_set_aauint(const char *val, struct kernel_param *kp); +static int param_get_aauint(char *buffer, struct kernel_param *kp); +#define param_check_aauint(name, p) __param_check(name, p, int) + +static int param_set_aalockpolicy(const char *val, struct kernel_param *kp); +static int param_get_aalockpolicy(char *buffer, struct kernel_param *kp); +#define param_check_aalockpolicy(name, p) __param_check(name, p, int) + +static int param_set_audit(const char *val, struct kernel_param *kp); +static int param_get_audit(char *buffer, struct kernel_param *kp); +#define param_check_audit(name, p) __param_check(name, p, int) + +static int param_set_mode(const char *val, struct kernel_param *kp); +static int param_get_mode(char *buffer, struct kernel_param *kp); +#define param_check_mode(name, p) __param_check(name, p, int) + +/* Flag values, also controllable via /sys/module/apparmor/parameters + * We define special types as we want to do additional mediation. + */ + +/* AppArmor global enforcement switch - complain, enforce, kill */ +enum profile_mode g_profile_mode = APPARMOR_ENFORCE; +module_param_call(mode, param_set_mode, param_get_mode, + &g_profile_mode, S_IRUSR | S_IWUSR); + +/* Debug mode */ +int g_apparmor_debug; +module_param_named(debug, g_apparmor_debug, aabool, S_IRUSR | S_IWUSR); + +/* Audit mode */ +enum audit_mode g_apparmor_audit; +module_param_call(audit, param_set_audit, param_get_audit, + &g_apparmor_audit, S_IRUSR | S_IWUSR); + +/* Determines if audit header is included in audited messages. This + * provides more context if the audit daemon is not running + */ +int g_apparmor_audit_header; +module_param_named(audit_header, g_apparmor_audit_header, aabool, + S_IRUSR | S_IWUSR); + +/* lock out loading/removal of policy + * TODO: add in at boot loading of policy, which is the only way to + * load policy, if lock_policy is set + */ +int g_apparmor_lock_policy; +module_param_named(lock_policy, g_apparmor_lock_policy, aalockpolicy, + S_IRUSR | S_IWUSR); + +/* Syscall logging mode */ +int g_apparmor_logsyscall; +module_param_named(logsyscall, g_apparmor_logsyscall, aabool, + S_IRUSR | S_IWUSR); + +/* Maximum pathname length before accesses will start getting rejected */ +unsigned int g_apparmor_path_max = 2 * PATH_MAX; +module_param_named(path_max, g_apparmor_path_max, aauint, S_IRUSR | S_IWUSR); + +/* Boot time disable flag */ +#ifdef CONFIG_SECURITY_APPARMOR_DISABLE +#define AA_ENABLED_PERMS 0600 +#else +#define AA_ENABLED_PERMS 0400 +#endif +static int param_set_aa_enabled(const char *val, struct kernel_param *kp); +static unsigned int apparmor_enabled = CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE; +module_param_call(enabled, param_set_aa_enabled, param_get_aauint, + &apparmor_enabled, AA_ENABLED_PERMS); + +static int __init apparmor_enabled_setup(char *str) +{ + apparmor_enabled = simple_strtol(str, NULL, 0); + return 1; +} +__setup("apparmor=", apparmor_enabled_setup); + +static int param_set_aalockpolicy(const char *val, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + if (g_apparmor_lock_policy) + return -EACCES; + return param_set_bool(val, kp); +} + +static int param_get_aalockpolicy(char *buffer, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + return param_get_bool(buffer, kp); +} + +static int param_set_aabool(const char *val, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + return param_set_bool(val, kp); +} + +static int param_get_aabool(char *buffer, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + return param_get_bool(buffer, kp); +} + +static int param_set_aauint(const char *val, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + return param_set_uint(val, kp); +} + +static int param_get_aauint(char *buffer, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + return param_get_uint(buffer, kp); +} + +/* allow run time disabling of apparmor */ +static int param_set_aa_enabled(const char *val, struct kernel_param *kp) +{ + unsigned long l; + + if (!apparmor_initialized) { + apparmor_enabled = 0; + return 0; + } + + if (__aa_task_is_confined(current)) + return -EPERM; + + if (!apparmor_enabled) + return -EINVAL; + + if (!val) + return -EINVAL; + + if (strict_strtoul(val, 0, &l) || l != 0) + return -EINVAL; + + apparmor_enabled = 0; + apparmor_disable(); + return 0; +} + +static int param_get_audit(char *buffer, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + + if (!apparmor_enabled) + return -EINVAL; + + return sprintf(buffer, "%s", audit_mode_names[g_apparmor_audit]); +} + +static int param_set_audit(const char *val, struct kernel_param *kp) +{ + int i; + if (__aa_task_is_confined(current)) + return -EPERM; + + if (!apparmor_enabled) + return -EINVAL; + + if (!val) + return -EINVAL; + + for (i = 0; i < AUDIT_MAX_INDEX; i++) { + if (strcmp(val, audit_mode_names[i]) == 0) { + g_apparmor_audit = i; + return 0; + } + } + + return -EINVAL; +} + +static int param_get_mode(char *buffer, struct kernel_param *kp) +{ + if (__aa_task_is_confined(current)) + return -EPERM; + + if (!apparmor_enabled) + return -EINVAL; + + return sprintf(buffer, "%s", profile_mode_names[g_profile_mode]); +} + +static int param_set_mode(const char *val, struct kernel_param *kp) +{ + int i; + if (__aa_task_is_confined(current)) + return -EPERM; + + if (!apparmor_enabled) + return -EINVAL; + + if (!val) + return -EINVAL; + + for (i = 0; i < APPARMOR_NAMES_MAX_INDEX; i++) { + if (strcmp(val, profile_mode_names[i]) == 0) { + g_profile_mode = i; + return 0; + } + } + + return -EINVAL; +} + + +/* + * AppArmor init functions + */ + +static int set_init_cxt(void) +{ + struct cred *cred = (struct cred *) current->real_cred; + struct aa_task_context *cxt; + + cxt = aa_alloc_task_context(GFP_KERNEL); + if (!cxt) + return -ENOMEM; + + cxt->sys.profile = aa_get_profile(default_namespace->unconfined); + cred->security = cxt; + + return 0; +} + +static int __init apparmor_init(void) +{ + int error; + + if (!apparmor_enabled || !security_module_enable(&apparmor_ops)) { + info_message("AppArmor disabled by boot time parameter\n"); + apparmor_enabled = 0; + return 0; + } + + /* + * Activated with fs_initcall + error = create_apparmorfs(); + if (error) { + AA_ERROR("Unable to activate AppArmor filesystem\n"); + goto createfs_out; + } + */ + + error = alloc_default_namespace(); + if (error) { + AA_ERROR("Unable to allocate default profile namespace\n"); + goto alloc_out; + } + + error = set_init_cxt(); + if (error) { + AA_ERROR("Failed to set context on init task\n"); + goto alloc_out; + } + + error = register_security(&apparmor_ops); + if (error) { + AA_ERROR("Unable to register AppArmor\n"); + goto register_security_out; + } + + /* Report that AppArmor successfully initialized */ + apparmor_initialized = 1; + if (g_profile_mode == APPARMOR_COMPLAIN) + info_message("AppArmor initialized: complain mode enabled"); + else if (g_profile_mode == APPARMOR_KILL) + info_message("AppArmor initialized: kill mode enabled"); + else + info_message("AppArmor initialized"); + + return error; + +register_security_out: + free_default_namespace(); + +alloc_out: + destroy_apparmorfs(); + +/*createfs_out:*/ + apparmor_enabled = 0; + return error; + +} + +security_initcall(apparmor_init); + +void apparmor_disable(void) +{ + /* Remove and release all the profiles on the profile list. */ + aa_profile_ns_list_release(); + + /* FIXME: cleanup profiles references on files */ + free_default_namespace(); + + /* + * Delay for an rcu cycle to make sure that all active task + * context readers have finished, and all profiles have been + * freed by their rcu callbacks. + */ + synchronize_rcu(); + destroy_apparmorfs(); + apparmor_initialized = 0; + + info_message("AppArmor protection disabled"); +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/Makefile @@ -0,0 +1,24 @@ +# Makefile for AppArmor Linux Security Module +# +obj-$(CONFIG_SECURITY_APPARMOR) += apparmor.o + +apparmor-y := apparmorfs.o audit.o capability.o context.o ipc.o lib.o match.o \ + path.o domain.o policy.o policy_interface.o procattr.o lsm.o \ + resource.o sid.o file.o + +apparmor-$(CONFIG_SECURITY_APPARMOR_NETWORK) += net.o + +clean-files: capability_names.h af_names.h + +quiet_cmd_make-caps = GEN $@ +cmd_make-caps = echo "static const char *capability_names[] = {" > $@ ; sed -n -e "/CAP_FS_MASK/d" -e "s/^\#define[ \\t]\\+CAP_\\([A-Z0-9_]\\+\\)[ \\t]\\+\\([0-9]\\+\\)\$$/[\\2] = \"\\1\",/p" $< | tr A-Z a-z >> $@ ; echo "};" >> $@ + +quiet_cmd_make-af = GEN $@ +cmd_make-af = echo "static const char *address_family_names[] = {" > $@ ; sed -n -e "/AF_MAX/d" -e "/AF_LOCAL/d" -e "s/^\#define[ \\t]\\+AF_\\([A-Z0-9_]\\+\\)[ \\t]\\+\\([0-9]\\+\\)\\(.*\\)\$$/[\\2] = \"\\1\",/p" $< | tr A-Z a-z >> $@ ; echo "};" >> $@ + +$(obj)/capability.o : $(obj)/capability_names.h +$(obj)/net.o : $(obj)/af_names.h +$(obj)/capability_names.h : $(srctree)/include/linux/capability.h + $(call cmd,make-caps) +$(obj)/af_names.h : $(srctree)/include/linux/socket.h + $(call cmd,make-af) --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/resource.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/resource.c @@ -0,0 +1,104 @@ +/* + * AppArmor security module + * + * This file contains AppArmor resource mediation and attachment + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include + +#include "include/audit.h" +#include "include/resource.h" +#include "include/policy.h" + +struct aa_audit_resource { + struct aa_audit base; + + int rlimit; +}; + +static void audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_resource *sa = va; + + if (sa->rlimit) + audit_log_format(ab, " rlimit=%d", sa->rlimit - 1); +} + +static int aa_audit_resource(struct aa_profile *profile, + struct aa_audit_resource *sa) +{ + return aa_audit(AUDIT_APPARMOR_AUTO, profile, (struct aa_audit *)sa, + audit_cb); +} + +/** + * aa_task_setrlimit - test permission to set an rlimit + * @profile - profile confining the task + * @resource - the resource being set + * @new_rlim - the new resource limit + * + * Control raising the processes hard limit. + */ +int aa_task_setrlimit(struct aa_profile *profile, unsigned int resource, + struct rlimit *new_rlim) +{ + struct aa_audit_resource sa; + int error = 0; + + memset(&sa, 0, sizeof(sa)); + sa.base.operation = "setrlimit"; + sa.base.gfp_mask = GFP_KERNEL; + sa.rlimit = resource + 1; + + if (profile->rlimits.mask & (1 << resource) && + new_rlim->rlim_max > profile->rlimits.limits[resource].rlim_max) { + sa.base.error = -EACCES; + + error = aa_audit_resource(profile, &sa); + } + + return error; +} + +void __aa_transition_rlimits(struct aa_profile *old, struct aa_profile *new) +{ + unsigned int mask = 0; + struct rlimit *rlim, *initrlim; + int i; + + /* for any rlimits the profile controlled reset the soft limit + * to the less of the tasks hard limit and the init tasks soft limit + */ + if (old && old->rlimits.mask) { + for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<=1) { + if (old->rlimits.mask & mask) { + rlim = current->signal->rlim + i; + initrlim = init_task.signal->rlim + i; + rlim->rlim_cur = min(rlim->rlim_max, + initrlim->rlim_cur); + } + } + } + + /* set any new hard limits as dictated by the new profile */ + if (!(new && new->rlimits.mask)) + return; + for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<=1) { + if (!(new->rlimits.mask & mask)) + continue; + + rlim = current->signal->rlim + i; + rlim->rlim_max = min(rlim->rlim_max, + new->rlimits.limits[i].rlim_max); + /* soft limit should not exceed hard limit */ + rlim->rlim_cur = min(rlim->rlim_cur, rlim->rlim_max); + } +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/lib.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/lib.c @@ -0,0 +1,100 @@ +/* + * AppArmor security module + * + * This file contains basic common functions used in AppArmor + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include + +#include "include/audit.h" + +void info_message(const char *str) +{ + struct aa_audit sa; + memset(&sa, 0, sizeof(sa)); + sa.gfp_mask = GFP_KERNEL; + sa.info = str; + printk(KERN_INFO "AppArmor: %s\n", str); + if (audit_enabled) + aa_audit(AUDIT_APPARMOR_STATUS, NULL, &sa, NULL); +} + +char *strchrnul(const char *s, int c) +{ + for (; *s != (char)c && *s != '\0'; ++s) + ; + return (char *)s; +} + +char *aa_split_name_from_ns(char *args, char **ns_name) +{ + char *name = strstrip(args); + + *ns_name = NULL; + if (args[0] == ':') { + char *split = strstrip(strchr(&args[1], ':')); + + if (!split) + return NULL; + + *split = 0; + *ns_name = &args[1]; + name = strstrip(split + 1); + } + if (*name == 0) + name = NULL; + + return name; +} + +char *new_compound_name(const char *n1, const char *n2) +{ + char *name = kmalloc(strlen(n1) + strlen(n2) + 3, GFP_KERNEL); + if (name) + sprintf(name, "%s//%s", n1, n2); + return name; +} + +/** + * aa_strneq - compare null terminated @str to a non null terminated substring + * @str: a null terminated string + * @sub: a substring, not necessarily null terminated + * @len: length of @sub to compare + * + * The @str string must be full consumed for this to be considered a match + */ +int aa_strneq(const char *str, const char *sub, int len) +{ + int res = strncmp(str, sub, len); + if (res) + return 0; + if (str[len] == 0) + return 1; + return 0; +} + +const char *fqname_subname(const char *name) +{ + char *split; + /* check for namespace which begins with a : and ends with : or \0 */ + name = strstrip((char *) name); + if (*name == ':') { + split = strchrnul(name + 1, ':'); + if (*split == '\0') + return NULL; + name = strstrip(split + 1); + } + for (split = strstr(name, "//"); split; split = strstr(name, "//")) { + name = split + 2; + } + return name; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/path.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/path.c @@ -0,0 +1,170 @@ +/* + * AppArmor security module + * + * This file contains AppArmor function for pathnames + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "include/apparmor.h" +#include "include/path.h" + +int aa_get_name_to_buffer(struct path *path, int is_dir, char *buffer, int size, + char **name) +{ + int error = d_namespace_path(path, buffer, size - is_dir, name); + + if (!error && is_dir && (*name)[1] != '\0') + /* + * Append "/" to the pathname. The root directory is a special + * case; it already ends in slash. + */ + strcpy(&buffer[size - 2], "/"); + + return error; +} + +/** + * aa_get_name - compute the pathname of a file + * @path: path the file + * @is_dir: set if the file is a directory + * @buffer: buffer that aa_get_name() allocated + * @name: the error code indicating whether aa_get_name failed + * + * Returns an error code if the there was a failure in obtaining the + * name. + * + * @name is apointer to the beginning of the pathname (which usually differs + * from the beginning of the buffer), or NULL. If there is an error @name + * may contain a partial or invalid name (in the case of a deleted file), that + * can be used for audit purposes, but it can not be used for mediation. + * + * We need @is_dir to indicate whether the file is a directory or not because + * the file may not yet exist, and so we cannot check the inode's file type. + */ +int aa_get_name(struct path *path, int is_dir, char **buffer, char **name) +{ + char *buf, *str = NULL; + int size = 256; + int error; + + *name = NULL; + *buffer = NULL; + for (;;) { + buf = kmalloc(size, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + error = aa_get_name_to_buffer(path, is_dir, buf, size, &str); + if (!error || (error == -ENOENT) || (error == -ESTALE)) + break; + + kfree(buf); + size <<= 1; + if (size > g_apparmor_path_max) + return -ENAMETOOLONG; + } + *buffer = buf; + *name = str; + + return error; +} + +int d_namespace_path(struct path *path, char *buf, int buflen, char **name) +{ + struct path root, tmp, ns_root = { }; + char *res; + int error = 0; + + read_lock(¤t->fs->lock); + root = current->fs->root; + path_get(¤t->fs->root); + read_unlock(¤t->fs->lock); + spin_lock(&vfsmount_lock); + if (root.mnt && root.mnt->mnt_ns) + ns_root.mnt = mntget(root.mnt->mnt_ns->root); + if (ns_root.mnt) + ns_root.dentry = dget(ns_root.mnt->mnt_root); + spin_unlock(&vfsmount_lock); + spin_lock(&dcache_lock); + tmp = ns_root; + res = __d_path(path, &tmp, buf, buflen); + + *name = res; + /* handle error conditions - and still allow a partial path to + * be returned */ + if (IS_ERR(res)) { + error = PTR_ERR(res); + *name = buf; + } else if (d_unhashed(path->dentry) && !path->dentry->d_inode) { + /* On some filesystems, newly allocated dentries appear + * to the security_path hooks as a deleted + * dentry except without an inode allocated. + * + * Remove the appended deleted text and return as a + * string for normal mediation. The (deleted) string + * is guarenteed to be added in this case, so just + * strip it. + */ + buf[buflen - 11] = 0; /* - (len(" (deleted)") +\0) */ + } else if (d_unhashed(path->dentry) && (buf + buflen) - res > 11 && + strcmp(buf + buflen - 11, " (deleted)") == 0) { + /* For now allow mediation of deleted paths */ + buf[buflen - 11] = 0; /* - (len(" (deleted)") +\0) */ + } else if (!IS_ROOT(path->dentry) && d_unhashed(path->dentry)) { + error = -ENOENT; +#if 0 + } else if (tmp.dentry != ns_root.dentry && tmp.mnt != ns_root.mnt) { + /* disconnected path don return pathname starting with '/' */ + error = -ESTALE; + if (*res == '/') + *name = res + 1; +#endif + } + + spin_unlock(&dcache_lock); + path_put(&root); + path_put(&ns_root); + + return error; +} + +char *sysctl_pathname(struct ctl_table *table, char *buffer, int buflen) +{ + if (buflen < 1) + return NULL; + buffer += --buflen; + *buffer = '\0'; + + while (table) { + int namelen = strlen(table->procname); + + if (buflen < namelen + 1) + return NULL; + buflen -= namelen + 1; + buffer -= namelen; + memcpy(buffer, table->procname, namelen); + *--buffer = '/'; + table = table->parent; + } + if (buflen < 4) + return NULL; + buffer -= 4; + memcpy(buffer, "/sys", 4); + + return buffer; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/match.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/match.c @@ -0,0 +1,305 @@ +/* + * AppArmor security module + * + * This file contains AppArmor dfa based regular expression matching engine + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include +#include +#include + +/* TODO: remove !!!! */ +// #include + +#include "include/apparmor.h" +#include "include/match.h" +#include "include/file.h" + +static void free_table(struct table_header *table) +{ + if (is_vmalloc_addr(table)) + vfree(table); + else + kfree(table); +} + +static struct table_header *unpack_table(void *blob, size_t bsize) +{ + struct table_header *table = NULL; + struct table_header th; + size_t tsize; + + if (bsize < sizeof(struct table_header)) + goto out; + + th.td_id = be16_to_cpu(*(u16 *) (blob)); + th.td_flags = be16_to_cpu(*(u16 *) (blob + 2)); + th.td_lolen = be32_to_cpu(*(u32 *) (blob + 8)); + blob += sizeof(struct table_header); + + if (!(th.td_flags == YYTD_DATA16 || th.td_flags == YYTD_DATA32 || + th.td_flags == YYTD_DATA8)) + goto out; + + tsize = table_size(th.td_lolen, th.td_flags); + if (bsize < tsize) + goto out; + + table = kmalloc(tsize, GFP_KERNEL); + if (!table) + table = vmalloc(tsize); + if (table) { + *table = th; + if (th.td_flags == YYTD_DATA8) + UNPACK_ARRAY(table->td_data, blob, th.td_lolen, + u8, byte_to_byte); + else if (th.td_flags == YYTD_DATA16) + UNPACK_ARRAY(table->td_data, blob, th.td_lolen, + u16, be16_to_cpu); + else + UNPACK_ARRAY(table->td_data, blob, th.td_lolen, + u32, be32_to_cpu); + } + +out: + return table; +} + +int unpack_dfa(struct aa_dfa *dfa, void *blob, size_t size) +{ + int hsize, i; + int error = -ENOMEM; + + /* get dfa table set header */ + if (size < sizeof(struct table_set_header)) + goto fail; + + if (ntohl(*(u32 *)blob) != YYTH_MAGIC) + goto fail; + + hsize = ntohl(*(u32 *)(blob + 4)); + if (size < hsize) + goto fail; + + blob += hsize; + size -= hsize; + + error = -EPROTO; + while (size > 0) { + struct table_header *table; + table = unpack_table(blob, size); + if (!table) + goto fail; + + switch (table->td_id) { + case YYTD_ID_ACCEPT: + case YYTD_ID_ACCEPT2: + case YYTD_ID_BASE: + dfa->tables[table->td_id - 1] = table; + if (table->td_flags != YYTD_DATA32) + goto fail; + break; + case YYTD_ID_DEF: + case YYTD_ID_NXT: + case YYTD_ID_CHK: + dfa->tables[table->td_id - 1] = table; + if (table->td_flags != YYTD_DATA16) + goto fail; + break; + case YYTD_ID_EC: + dfa->tables[table->td_id - 1] = table; + if (table->td_flags != YYTD_DATA8) + goto fail; + break; + default: + free_table(table); + goto fail; + } + + blob += table_size(table->td_lolen, table->td_flags); + size -= table_size(table->td_lolen, table->td_flags); + } + + return 0; + +fail: + for (i = 0; i < ARRAY_SIZE(dfa->tables); i++) { + free_table(dfa->tables[i]); + dfa->tables[i] = NULL; + } + return error; +} + +/** + * verify_dfa - verify that all the transitions and states in the dfa tables + * are in bounds. + * @dfa: dfa to test + * + * assumes dfa has gone through the verification done by unpacking + */ +int verify_dfa(struct aa_dfa *dfa) +{ + size_t i, state_count, trans_count; + int error = -EPROTO; + + /* check that required tables exist */ + if (!(dfa->tables[YYTD_ID_ACCEPT - 1] && + dfa->tables[YYTD_ID_ACCEPT2 - 1] && + dfa->tables[YYTD_ID_DEF - 1] && + dfa->tables[YYTD_ID_BASE - 1] && + dfa->tables[YYTD_ID_NXT - 1] && + dfa->tables[YYTD_ID_CHK - 1])) + goto out; + + /* accept.size == default.size == base.size */ + state_count = dfa->tables[YYTD_ID_BASE - 1]->td_lolen; + if (!(state_count == dfa->tables[YYTD_ID_DEF - 1]->td_lolen && + state_count == dfa->tables[YYTD_ID_ACCEPT - 1]->td_lolen && + state_count == dfa->tables[YYTD_ID_ACCEPT2 - 1]->td_lolen)) + goto out; + + /* next.size == chk.size */ + trans_count = dfa->tables[YYTD_ID_NXT - 1]->td_lolen; + if (trans_count != dfa->tables[YYTD_ID_CHK - 1]->td_lolen) + goto out; + + /* if equivalence classes then its table size must be 256 */ + if (dfa->tables[YYTD_ID_EC - 1] && + dfa->tables[YYTD_ID_EC - 1]->td_lolen != 256) + goto out; + + for (i = 0; i < state_count; i++) { + if (DEFAULT_TABLE(dfa)[i] >= state_count) + goto out; + if (BASE_TABLE(dfa)[i] >= trans_count + 256) + goto out; + } + + for (i = 0; i < trans_count ; i++) { + if (NEXT_TABLE(dfa)[i] >= state_count) + goto out; + if (CHECK_TABLE(dfa)[i] >= state_count) + goto out; + } + + /* verify accept permissions */ + for (i = 0; i < state_count; i++) { + int mode = ACCEPT_TABLE(dfa)[i]; + + if (mode & ~DFA_VALID_PERM_MASK) + goto out; + if (ACCEPT_TABLE2(dfa)[i] & ~DFA_VALID_PERM2_MASK) + goto out; + + } + + error = 0; +out: + return error; +} + +struct aa_dfa *aa_match_alloc(void) +{ + return kzalloc(sizeof(struct aa_dfa), GFP_KERNEL); +} + +void aa_match_free(struct aa_dfa *dfa) +{ + if (dfa) { + int i; + + for (i = 0; i < ARRAY_SIZE(dfa->tables); i++) + free_table(dfa->tables[i]); + } + kfree(dfa); +} + +/** + * aa_dfa_match_len - traverse @dfa to find state @str stops at + * @dfa: the dfa to match @str against + * @start: the state of the dfa to start matching in + * @str: the string of bytes to match against the dfa + * @len: length of the string of bytes to match + * + * aa_dfa_match_len will match @str against the dfa and return the state it + * finished matching in. The final state can be used to look up the accepting + * label, or as the start state of a continuing match. + * + * This function will happily match again the 0 byte and only finishes + * when @len input is consumed. + */ +unsigned int aa_dfa_match_len(struct aa_dfa *dfa, unsigned int start, + const char *str, int len) +{ + u16 *def = DEFAULT_TABLE(dfa); + u32 *base = BASE_TABLE(dfa); + u16 *next = NEXT_TABLE(dfa); + u16 *check = CHECK_TABLE(dfa); + unsigned int state = start, pos; + + if (state == 0) + return 0; + + /* current state is , matching character *str */ + if (dfa->tables[YYTD_ID_EC - 1]) { + u8 *equiv = EQUIV_TABLE(dfa); + for (; len; len--) { + pos = base[state] + equiv[(u8)*str++]; + if (check[pos] == state) + state = next[pos]; + else + state = def[state]; + } + } else { + for (; len; len--) { + pos = base[state] + (u8)*str++; + if (check[pos] == state) + state = next[pos]; + else + state = def[state]; + } + } + return state; +} + + +/** + * aa_dfa_next_state - traverse @dfa to find state @str stops at + * @dfa: the dfa to match @str against + * @start: the state of the dfa to start matching in + * @str: the null terminated string of bytes to match against the dfa + * + * aa_dfa_next_state will match @str against the dfa and return the state it + * finished matching in. The final state can be used to look up the accepting + * label, or as the start state of a continuing match. + */ +unsigned int aa_dfa_match(struct aa_dfa *dfa, unsigned int start, + const char *str) +{ + return aa_dfa_match_len(dfa, start, str, strlen(str)); +} + +/** + * aa_dfa_null_transition - step to next state after null character + * @dfa: the dfa to match against + * @start: the state of the dfa to start matching in + * + * aa_dfa_null_transition transitions to the next state after a null + * character which is not used in standard matching and is only + * used to seperate pairs. + */ +unsigned int aa_dfa_null_transition(struct aa_dfa *dfa, unsigned int start) +{ + return aa_dfa_match_len(dfa, start, "", 1); +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/apparmorfs.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/apparmorfs.c @@ -0,0 +1,391 @@ +/* + * AppArmor security module + * + * This file contains AppArmor /proc//attr interface functions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include +#include +#include +#include +#include + +#include "include/apparmor.h" +#include "include/audit.h" +#include "include/context.h" +#include "include/policy.h" +#include "include/policy_interface.h" + +static char *aa_simple_write_to_buffer(const char __user *userbuf, + size_t alloc_size, size_t copy_size, + loff_t *pos, const char *operation) +{ + const struct cred *cred; + struct aa_profile *profile; + char *data; + + if (*pos != 0) { + /* only writes from pos 0, that is complete writes */ + data = ERR_PTR(-ESPIPE); + goto out; + } + + /* + * Don't allow confined processes to load/replace/remove profiles. + * No sane person would add rules allowing this to a profile + * but we enforce the restriction anyways. + */ + cred = aa_current_policy(&profile); + if (profile) { + struct aa_audit sa; + memset(&sa, 0, sizeof(sa)); + sa.operation = operation; + sa.gfp_mask = GFP_KERNEL; + sa.error = -EACCES; + data = ERR_PTR(aa_audit(AUDIT_APPARMOR_DENIED, profile, &sa, + NULL)); + goto out; + } + + data = vmalloc(alloc_size); + if (data == NULL) { + data = ERR_PTR(-ENOMEM); + goto out; + } + + if (copy_from_user(data, userbuf, copy_size)) { + vfree(data); + data = ERR_PTR(-EFAULT); + goto out; + } + +out: + return data; +} + +static struct aa_profile *next_profile(struct aa_profile *profile) +{ + struct aa_profile *parent; + struct aa_namespace *ns = profile->ns; + + if (!list_empty(&profile->base.profiles)) + return list_first_entry(&profile->base.profiles, + struct aa_profile, base.list); + + parent = profile->parent; + while (parent) { + list_for_each_entry_continue(profile, &parent->base.profiles, + base.list) + return profile; + profile = parent; + parent = parent->parent; + } + + list_for_each_entry_continue(profile, &ns->base.profiles, base.list) + return profile; + + read_unlock(&ns->base.lock); + list_for_each_entry_continue(ns, &ns_list, base.list) { + read_lock(&ns->base.lock); + return list_first_entry(&ns->base.profiles, struct aa_profile, + base.list); + read_unlock(&ns->base.lock); + } + return NULL; +} + +static void *p_start(struct seq_file *f, loff_t *pos) + __acquires(ns_list_lock) +{ + struct aa_namespace *ns; + loff_t l = *pos; + + read_lock(&ns_list_lock); + if (!list_empty(&ns_list)) { + struct aa_profile *profile = NULL; + ns = list_first_entry(&ns_list, typeof(*ns), base.list); + read_lock(&ns->base.lock); + if (!list_empty(&ns->base.profiles)) { + profile = list_first_entry(&ns->base.profiles, + typeof(*profile), base.list); + for ( ; profile && l > 0; l--) + profile = next_profile(profile); + return profile; + } else + read_unlock(&ns->base.lock); + } + return NULL; +} + +static void *p_next(struct seq_file *f, void *p, loff_t *pos) +{ + struct aa_profile *profile = (struct aa_profile *) p; + + (*pos)++; + profile = next_profile(profile); + + return profile; +} + +static void p_stop(struct seq_file *f, void *p) + __releases(ns_list_lock) +{ + struct aa_profile *profile = (struct aa_profile *) p; + + if (profile) + read_unlock(&profile->ns->base.lock); + read_unlock(&ns_list_lock); +} + +static void print_name(struct seq_file *f, struct aa_profile *profile) +{ + if (profile->parent) { + print_name(f, profile->parent); + seq_printf(f, "//"); + } + seq_printf(f, "%s", profile->base.name); +} + +static int seq_show_profile(struct seq_file *f, void *p) +{ + struct aa_profile *profile = (struct aa_profile *)p; + + if (profile->ns != default_namespace) + seq_printf(f, ":%s:", profile->ns->base.name); + print_name(f, profile); + seq_printf(f, " (%s)\n", + PROFILE_COMPLAIN(profile) ? "complain" : "enforce"); + + return 0; +} + +/* Used in apparmorfs.c */ +static struct seq_operations apparmorfs_profiles_op = { + .start = p_start, + .next = p_next, + .stop = p_stop, + .show = seq_show_profile, +}; + +static int aa_profiles_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &apparmorfs_profiles_op); +} + + +static int aa_profiles_release(struct inode *inode, struct file *file) +{ + return seq_release(inode, file); +} + +static struct file_operations apparmorfs_profiles_fops = { + .open = aa_profiles_open, + .read = seq_read, + .llseek = seq_lseek, + .release = aa_profiles_release, +}; + +/* apparmor/matching */ +static ssize_t aa_matching_read(struct file *file, char __user *buf, + size_t size, loff_t *ppos) +{ + const char *matching = "pattern=aadfa audit perms=crwxamlk/ user::other"; + + return simple_read_from_buffer(buf, size, ppos, matching, + strlen(matching)); +} + +static struct file_operations apparmorfs_matching_fops = { + .read = aa_matching_read, +}; + +/* apparmor/features */ +static ssize_t aa_features_read(struct file *file, char __user *buf, + size_t size, loff_t *ppos) +{ + const char *features = "file=3.1 capability=2.0 network=1.0 " + "change_hat=1.5 change_profile=1.1 " + "aanamespaces=1.1 rlimit=1.1"; + + return simple_read_from_buffer(buf, size, ppos, features, + strlen(features)); +} + +static struct file_operations apparmorfs_features_fops = { + .read = aa_features_read, +}; + +/* apparmor/.load */ +static ssize_t aa_profile_load(struct file *f, const char __user *buf, + size_t size, loff_t *pos) +{ + char *data; + ssize_t error; + + data = aa_simple_write_to_buffer(buf, size, size, pos, "profile_load"); + + error = PTR_ERR(data); + if (!IS_ERR(data)) { + error = aa_interface_add_profiles(data, size); + vfree(data); + } + + return error; +} + + +static struct file_operations apparmorfs_profile_load = { + .write = aa_profile_load +}; + +/* apparmor/.replace */ +static ssize_t aa_profile_replace(struct file *f, const char __user *buf, + size_t size, loff_t *pos) +{ + char *data; + ssize_t error; + + data = aa_simple_write_to_buffer(buf, size, size, pos, + "profile_replace"); + error = PTR_ERR(data); + if (!IS_ERR(data)) { + error = aa_interface_replace_profiles(data, size); + vfree(data); + } + + return error; +} + + +static struct file_operations apparmorfs_profile_replace = { + .write = aa_profile_replace +}; + +/* apparmor/.remove */ +static ssize_t aa_profile_remove(struct file *f, const char __user *buf, + size_t size, loff_t *pos) +{ + char *data; + ssize_t error; + + /* + * aa_remove_profile needs a null terminated string so 1 extra + * byte is allocated and the copied data is null terminated. + */ + data = aa_simple_write_to_buffer(buf, size + 1, size, pos, + "profile_remove"); + + error = PTR_ERR(data); + if (!IS_ERR(data)) { + data[size] = 0; + error = aa_interface_remove_profiles(data, size); + vfree(data); + } + + return error; +} + +static struct file_operations apparmorfs_profile_remove = { + .write = aa_profile_remove +}; + +static struct dentry *apparmorfs_dentry; +struct dentry *apparmorfs_null; +struct vfsmount *apparmorfs_mnt; + +static void aafs_remove(const char *name) +{ + struct dentry *dentry; + + dentry = lookup_one_len(name, apparmorfs_dentry, strlen(name)); + if (!IS_ERR(dentry)) { + securityfs_remove(dentry); + dput(dentry); + } +} + +static int aafs_create(const char *name, int mask, struct file_operations *fops) +{ + struct dentry *dentry; + + dentry = securityfs_create_file(name, S_IFREG | mask, apparmorfs_dentry, + NULL, fops); + + return IS_ERR(dentry) ? PTR_ERR(dentry) : 0; +} + +void destroy_apparmorfs(void) +{ + if (apparmorfs_dentry) { + aafs_remove(".remove"); + aafs_remove(".replace"); + aafs_remove(".load"); + aafs_remove("matching"); + aafs_remove("features"); + aafs_remove("profiles"); + securityfs_remove(apparmorfs_dentry); + apparmorfs_dentry = NULL; + } +} + +int create_apparmorfs(void) +{ + int error; + + if (!apparmor_initialized) + return 0; + + if (apparmorfs_dentry) { + AA_ERROR("%s: AppArmor securityfs already exists\n", __func__); + return -EEXIST; + } + + apparmorfs_dentry = securityfs_create_dir("apparmor", NULL); + if (IS_ERR(apparmorfs_dentry)) { + error = PTR_ERR(apparmorfs_dentry); + apparmorfs_dentry = NULL; + goto error; + } + error = aafs_create("profiles", 0440, &apparmorfs_profiles_fops); + if (error) + goto error; + error = aafs_create("matching", 0444, &apparmorfs_matching_fops); + if (error) + goto error; + error = aafs_create("features", 0444, &apparmorfs_features_fops); + if (error) + goto error; + error = aafs_create(".load", 0640, &apparmorfs_profile_load); + if (error) + goto error; + error = aafs_create(".replace", 0640, &apparmorfs_profile_replace); + if (error) + goto error; + error = aafs_create(".remove", 0640, &apparmorfs_profile_remove); + if (error) + goto error; + + /* TODO: add support for apparmorfs_null and apparmorfs_mnt */ + + /* Report that AppArmor fs is enabled */ + info_message("AppArmor Filesystem Enabled"); + return 0; + +error: + destroy_apparmorfs(); + AA_ERROR("Error creating AppArmor securityfs\n"); + apparmor_disable(); + return error; +} + +fs_initcall(create_apparmorfs); + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/sid.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/sid.c @@ -0,0 +1,113 @@ +/* + * AppArmor security module + * + * This file contains AppArmor security identifier (sid) manipulation fns + * + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * + * AppArmor allocates a unique sid for every profile loaded. If a profile + * is replaced it receive the sid of the profile it is replacing. Each sid + * is a u32 with the lower u16 being sids of system profiles and the + * upper u16 being user profile sids. + * + * The sid value of 0 is invalid for system sids and is used to indicate + * unconfined for user sids. + * + * A compound sid is a pair of user and system sids that is used to identify + * both profiles confining a task. + * + * Both system and user sids are globally unique with all users pulling + * from the same sid pool. User sid allocation is limited by the + * user controls, that can limit how many profiles are loaded by a user. + */ + +#include +#include +#include + +#include "include/sid.h" + +/* global counter from which sids are allocated */ +static u16 global_sys_sid; +static u16 global_usr_sid; +static DEFINE_SPINLOCK(sid_lock); + + +/* TODO FIXME: add sid to profile mapping, and sid recycling */ + + +/** + * aa_alloc_sid - allocate a new sid for a profile + * @is_usr: true if the new sid is a user based sid + */ +u32 aa_alloc_sid(int is_usr) +{ + u32 sid; + + /* + * TODO FIXME: sid recycling - part of profile mapping table + */ + spin_lock(&sid_lock); + if (is_usr) { + sid = (++global_usr_sid) << 16; + + } else { + sid = ++global_sys_sid; + } + spin_unlock(&sid_lock); + return sid; +} + +/** + * aa_free_sid - free a sid + * @sid: sid to free + */ +void aa_free_sid(u32 sid) +{ + ; /* NOP ATM */ +} + +/** + * aa_add_sid_profile - associate a profile to a sid for sid -> profile lookup + * @sid: sid of te profile + * @profile: profile to associate + * + * return 0 or error + */ +int aa_add_sid_profile(u32 sid, struct aa_profile *profile) +{ + /* NOP ATM */ + return 0; +} + +/** + * aa_replace_sid_profile - replace the profile associated with a sid + * @sid: sid to associate a new profile with + * @profile: profile to associate with side + * + * return 0 or error + */ +int aa_replace_sid_profile(u32 sid, struct aa_profile *profile) +{ + /* NOP ATM */ + return 0; +} + +/** + * aa_get_sid_profile - get the profile associated with the sid + * @sid: sid to lookup + * + * returns - the profile, or NULL for unconfined user. + * - if there is an error -ENOENT, -EINVAL + */ +struct aa_profile *aa_get_sid_profile(u32 sid) +{ + return ERR_PTR(-EINVAL); +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/policy.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/policy.c @@ -0,0 +1,729 @@ +/* + * AppArmor security module + * + * This file contains AppArmor policy manipulation functions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + * + * + * AppArmor policy is based around profiles, which contain the rules a + * task is confined by. Every task in the sytem has a profile attached + * to it determined either by matching "unconfined" tasks against the + * visible set of profiles or by following a profiles attachment rules. + * + * Each profile exists in an AppArmor profile namespace which is a + * container of related profiles. Each namespace contains a special + * "unconfined" profile, which doesn't efforce any confinement on + * a task beyond DAC. + * + * Namespace and profile names can be written together in either + * of two syntaxes. + * :namespace:profile - used by kernel interfaces for easy detection + * namespace://profile - used by policy + * + * Profile names name not start with : or @ and may not contain \0 + * a // in a profile name indicates a compound name with the name before + * the // being the parent profile and the name after the child + * + * Reserved profile names + * unconfined - special automatically generated unconfined profile + * inherit - special name to indicate profile inheritance + * null-XXXX-YYYY - special automically generated learning profiles + * + * Namespace names may not start with / or @ and may not contain \0 or // + * it is recommend that they do not contain any '/' characters + * Reserved namespace namespace + * default - the default namespace setup by AppArmor + * user-XXXX - user defined profiles + */ + +#include +#include +#include + +#include "include/apparmor.h" +#include "include/capability.h" +#include "include/file.h" +#include "include/ipc.h" +#include "include/match.h" +#include "include/policy.h" +#include "include/resource.h" +#include "include/sid.h" + +/* list of profile namespaces and lock */ +LIST_HEAD(ns_list); +DEFINE_RWLOCK(ns_list_lock); + +struct aa_namespace *default_namespace; + +const char *profile_mode_names[] = { + "enforce", + "complain", + "kill", +}; + +#define AA_SYS_SID 0 +#define AA_USR_SID 1 + + +static int common_init(struct aa_policy_common *common, const char *name) +{ + common->name = kstrdup(name, GFP_KERNEL); + if (!common->name) + return 0; + INIT_LIST_HEAD(&common->list); + INIT_LIST_HEAD(&common->profiles); + kref_init(&common->count); + rwlock_init(&common->lock); + + return 1; +} + +static void common_free(struct aa_policy_common *common) +{ + /* still contains profiles -- invalid */ + if (!list_empty(&common->profiles)) { + AA_ERROR("%s: internal error, " + "policy '%s' still contains profiles\n", + __func__, common->name); + BUG(); + } + if (!list_empty(&common->list)) { + AA_ERROR("%s: internal error, policy '%s' still on list\n", + __func__, common->name); + BUG(); + } + + kfree(common->name); +} + +static struct aa_policy_common *__common_find(struct list_head *head, + const char *name) + +{ + struct aa_policy_common *common; + + list_for_each_entry(common, head, list) { + if (!strcmp(common->name, name)) + return common; + } + return NULL; +} + +static struct aa_policy_common *__common_find_strn(struct list_head *head, + const char *str, int len) +{ + struct aa_policy_common *common; + + list_for_each_entry(common, head, list) { + if (aa_strneq(common->name, str, len)) + return common; + } + + return NULL; +} + +/* + * Routines for AppArmor namespaces + */ + +int alloc_default_namespace(void) +{ + struct aa_namespace *ns; + ns = alloc_aa_namespace("default"); + if (!ns) + return -ENOMEM; + + default_namespace = aa_get_namespace(ns); + write_lock(&ns_list_lock); + list_add(&ns->base.list, &ns_list); + write_unlock(&ns_list_lock); + + return 0; +} + +void free_default_namespace(void) +{ + write_lock(&ns_list_lock); + list_del_init(&default_namespace->base.list); + aa_put_namespace(default_namespace); + write_unlock(&ns_list_lock); + aa_put_namespace(default_namespace); + default_namespace = NULL; +} + +/** + * alloc_aa_namespace - allocate, initialize and return a new namespace + * @name: a preallocated name + * Returns NULL on failure. + */ +struct aa_namespace *alloc_aa_namespace(const char *name) +{ + struct aa_namespace *ns; + + ns = kzalloc(sizeof(*ns), GFP_KERNEL); + AA_DEBUG("%s(%p)\n", __func__, ns); + if (!ns) + return NULL; + + if (!common_init(&ns->base, name)) + goto fail_ns; + + /* null profile is not added to the profile list */ + ns->unconfined = alloc_aa_profile("unconfined"); + if (!ns->unconfined) + goto fail_unconfined; + + ns->unconfined->sid = aa_alloc_sid(AA_ALLOC_SYS_SID); + ns->unconfined->flags = PFLAG_UNCONFINED | PFLAG_IX_ON_NAME_ERROR | + PFLAG_IMMUTABLE; + ns->unconfined->ns = aa_get_namespace(ns); + + return ns; + +fail_unconfined: + if (ns->base.name) + kfree(ns->base.name); +fail_ns: + kfree(ns); + return NULL; +} + +/** + * free_aa_namespace_kref - free aa_namespace by kref (see aa_put_namespace) + * @kr: kref callback for freeing of a namespace + */ +void free_aa_namespace_kref(struct kref *kref) +{ + free_aa_namespace(container_of(kref, struct aa_namespace, base.count)); +} + +/** + * free_aa_namespace - free a profile namespace + * @namespace: the namespace to free + * + * Free a namespace. All references to the namespace must have been put. + * If the namespace was referenced by a profile confining a task, + */ +void free_aa_namespace(struct aa_namespace *ns) +{ + if (!ns) + return; + + common_free(&ns->base); + + if (ns->unconfined && ns->unconfined->ns == ns) + ns->unconfined->ns = NULL; + + aa_put_profile(ns->unconfined); + memset(ns, 0, sizeof(*ns)); + kfree(ns); +} + +struct aa_namespace *__aa_find_namespace(struct list_head *head, + const char *name) + +{ + return (struct aa_namespace *) __common_find(head, name); +} + +/** + * aa_find_namespace - look up a profile namespace on the namespace list + * @name: name of namespace to find + * + * Returns a pointer to the namespace on the list, or NULL if no namespace + * called @name exists. + */ +struct aa_namespace *aa_find_namespace(const char *name) +{ + struct aa_namespace *ns = NULL; + + read_lock(&ns_list_lock); + ns = aa_get_namespace(__aa_find_namespace(&ns_list, name)); + read_unlock(&ns_list_lock); + + return ns; +} + +static struct aa_namespace *__aa_find_namespace_by_strn(struct list_head *head, + const char *name, + int len) +{ + return (struct aa_namespace *) __common_find_strn(head, name, len); +} + +struct aa_namespace *aa_find_namespace_by_strn(const char *name, int len) +{ + struct aa_namespace *ns = NULL; + + read_lock(&ns_list_lock); + ns = aa_get_namespace(__aa_find_namespace_by_strn(&ns_list, name, len)); + read_unlock(&ns_list_lock); + + return ns; +} + +/** + * aa_prepare_namespace - find an existing or create a new namespace of @name + * @name: the namespace to find or add + */ +struct aa_namespace *aa_prepare_namespace(const char *name) +{ + struct aa_namespace *ns; + + write_lock(&ns_list_lock); + if (name) + ns = aa_get_namespace(__aa_find_namespace(&ns_list, name)); + else + ns = aa_get_namespace(default_namespace); + if (!ns) { + struct aa_namespace *new_ns; + write_unlock(&ns_list_lock); + new_ns = alloc_aa_namespace(name); + if (!new_ns) + return NULL; + write_lock(&ns_list_lock); + ns = __aa_find_namespace(&ns_list, name); + if (!ns) { + list_add(&new_ns->base.list, &ns_list); + ns = new_ns; + } else { + /* raced so free the new one */ + free_aa_namespace(new_ns); + aa_get_namespace(ns); + } + } + write_unlock(&ns_list_lock); + + return ns; +} + +/* + * requires profile->ns set first, takes profiles refcount + * TODO: add accounting + */ +void __aa_add_profile(struct aa_policy_common *common, + struct aa_profile *profile) +{ + list_add(&profile->base.list, &common->profiles); + if (!(profile->flags & PFLAG_NO_LIST_REF)) + aa_get_profile(profile); +} + +void __aa_remove_profile(struct aa_profile *profile, + struct aa_profile *replacement) +{ + if (replacement) + profile->replacedby = aa_get_profile(replacement); + else + profile->replacedby = aa_get_profile(profile->ns->unconfined); + list_del_init(&profile->base.list); + if (!(profile->flags & PFLAG_NO_LIST_REF)) + aa_put_profile(profile); +} + +/* TODO: add accounting */ +void __aa_replace_profile(struct aa_profile *profile, + struct aa_profile *replacement) +{ + if (replacement) { + struct aa_policy_common *common; + + if (profile->parent) + common = &profile->parent->base; + else + common = &profile->ns->base; + + __aa_remove_profile(profile, replacement); + __aa_add_profile(common, replacement); + } else + __aa_remove_profile(profile, NULL); +} + +/** + * __aa_profile_list_release - remove all profiles on the list and put refs + * @head: list of profiles + */ +void __aa_profile_list_release(struct list_head *head) +{ + struct aa_profile *profile, *tmp; + list_for_each_entry_safe(profile, tmp, head, base.list) { + __aa_profile_list_release(&profile->base.profiles); + __aa_remove_profile(profile, NULL); + } +} + +void __aa_remove_namespace(struct aa_namespace *ns) +{ + struct aa_profile *unconfined = ns->unconfined; + list_del_init(&ns->base.list); + + /* + * break the ns, unconfined profile cyclic reference and forward + * all new unconfined profiles requests to the default namespace + */ + ns->unconfined = aa_get_profile(default_namespace->unconfined); + __aa_profile_list_release(&ns->base.profiles); + aa_put_profile(unconfined); + aa_put_namespace(ns); +} + +/** + * aa_remove_namespace = Remove namespace from the list + * @ns: namespace to remove + */ +void aa_remove_namespace(struct aa_namespace *ns) +{ + write_lock(&ns_list_lock); + write_lock(&ns->base.lock); + __aa_remove_namespace(ns); + write_unlock(&ns->base.lock); + write_unlock(&ns_list_lock); +} + +/** + * aa_profilelist_release - remove all namespaces and all associated profiles + */ +void aa_profile_ns_list_release(void) +{ + struct aa_namespace *ns, *tmp; + + /* Remove and release all the profiles on namespace profile lists. */ + write_lock(&ns_list_lock); + list_for_each_entry_safe(ns, tmp, &ns_list, base.list) { + write_lock(&ns->base.lock); + __aa_remove_namespace(ns); + write_unlock(&ns->base.lock); + } + write_unlock(&ns_list_lock); +} + +/** + * alloc_aa_profile - allocate, initialize and return a new profile + * @fqname: name of the profile + * + * Returns NULL on failure. + */ +struct aa_profile *alloc_aa_profile(const char *fqname) +{ + struct aa_profile *profile; + + profile = kzalloc(sizeof(*profile), GFP_KERNEL); + if (!profile) + return NULL; + + if (!common_init(&profile->base, fqname)) { + kfree(profile); + return NULL; + } + + profile->fqname = profile->base.name; + profile->base.name = (char *) fqname_subname((const char *) profile->fqname); + return profile; +} + +/** + * aa_new_null_profile - create a new null-X learning profile + * @parent: profile that caused this profile to be created + * @hat: true if the null- learning profile is a hat + * + * Create a null- complain mode profile used in learning mode. The name of + * the profile is unique and follows the format of parent//null-sid. + * + * null profiles are added to the profile list but the list does not + * hold a count on them so that they are automatically released when + * not in use. + */ +struct aa_profile *aa_alloc_null_profile(struct aa_profile *parent, int hat) +{ + struct aa_profile *profile = NULL; + char *name; + u32 sid = aa_alloc_sid(AA_ALLOC_SYS_SID); + + name = kmalloc(strlen(parent->fqname) + 2 + 7 + 8, GFP_KERNEL); + if (!name) + goto fail; + sprintf(name, "%s//null-%x", parent->fqname, sid); + + profile = alloc_aa_profile(name); + kfree(name); + if (!profile) + goto fail; + + profile->sid = aa_alloc_sid(AA_ALLOC_SYS_SID); + profile->mode = APPARMOR_COMPLAIN; + profile->flags = PFLAG_NULL | PFLAG_NO_LIST_REF; + if (hat) + profile->flags |= PFLAG_HAT; + + profile->parent = aa_get_profile(parent); + profile->ns = aa_get_namespace(parent->ns); + + write_lock(&profile->ns->base.lock); + __aa_add_profile(&parent->base, profile); + write_unlock(&profile->ns->base.lock); + + return profile; + +fail: + aa_free_sid(sid); + return NULL; +} + +/** + * free_aa_profile_kref - free aa_profile by kref (called by aa_put_profile) + * @kr: kref callback for freeing of a profile + */ +void free_aa_profile_kref(struct kref *kref) +{ + struct aa_profile *p = container_of(kref, struct aa_profile, + base.count); + + free_aa_profile(p); +} + +/** + * free_aa_profile - free a profile + * @profile: the profile to free + * + * Free a profile, its hats and null_profile. All references to the profile, + * its hats and null_profile must have been put. + * + * If the profile was referenced from a task context, free_aa_profile() will + * be called from an rcu callback routine, so we must not sleep here. + */ +void free_aa_profile(struct aa_profile *profile) +{ + AA_DEBUG("%s(%p)\n", __func__, profile); + + if (!profile) + return; + + /* + * profile can still be on the list if the list doesn't hold a + * reference. There is no race as NULL profiles can't be attached + */ + if (!list_empty(&profile->base.list)) { + if ((profile->flags & PFLAG_NULL) && profile->ns) { + write_lock(&profile->ns->base.lock); + list_del_init(&profile->base.list); + write_unlock(&profile->ns->base.lock); + } else { + AA_ERROR("%s: internal error, " + "profile '%s' still on ns list\n", + __func__, profile->base.name); + BUG(); + } + } + + /* profile->name is a substring of fqname */ + profile->base.name = NULL; + common_free(&profile->base); + + BUG_ON(!list_empty(&profile->base.profiles)); + + kfree(profile->fqname); + + aa_put_namespace(profile->ns); + aa_put_profile(profile->parent); + + aa_free_file_rules(&profile->file); + aa_free_cap_rules(&profile->caps); + aa_free_net_rules(&profile->net); + aa_free_rlimit_rules(&profile->rlimits); + + aa_free_sid(profile->sid); + aa_match_free(profile->xmatch); + + if (profile->replacedby && !PTR_ERR(profile->replacedby)) + aa_put_profile(profile->replacedby); + + memset(profile, 0, sizeof(profile)); + kfree(profile); +} + + +/* TODO: profile count accounting - setup in remove */ + + +struct aa_profile *__aa_find_profile(struct list_head *head, const char *name) +{ + return (struct aa_profile *) __common_find(head, name); +} + +struct aa_profile *__aa_find_profile_by_strn(struct list_head *head, + const char *name, int len) +{ + return (struct aa_profile *) __common_find_strn(head, name, len); +} + + +/** + * aa_find_child - find a profile by @name in @parent + * @parent: profile to search + * @name: profile name to search for + * + * Returns a ref counted profile or NULL if not found + */ +struct aa_profile *aa_find_child(struct aa_profile *parent, const char *name) +{ + struct aa_profile *profile; + + read_lock(&parent->ns->base.lock); + profile = aa_get_profile(__aa_find_profile(&parent->base.profiles, + name)); + read_unlock(&parent->ns->base.lock); + + return profile; +} + + +struct aa_policy_common *__aa_find_parent_by_fqname(struct aa_namespace *ns, + const char *fqname) +{ + struct aa_policy_common *common; + struct aa_profile *profile = NULL; + char *split; + + common = &ns->base; + + + for (split = strstr(fqname, "//"); split; ) { + profile = __aa_find_profile_by_strn(&common->profiles, fqname, + split - fqname); + if (!profile) + return NULL; + common = &profile->base; + fqname = split + 2; + split = strstr(fqname, "//"); + } + if (!profile) + return &ns->base; + return &profile->base; +} + +struct aa_profile *__aa_find_profile_by_fqname(struct aa_namespace *ns, + const char *fqname) +{ + struct aa_policy_common *common; + struct aa_profile *profile = NULL; + char *split; + + common = &ns->base; + for (split = strstr(fqname, "//"); split; ) { + profile = __aa_find_profile_by_strn(&common->profiles, fqname, + split - fqname); + if (!profile) + return NULL; + + common = &profile->base; + fqname = split + 2; + split = strstr(fqname, "//"); + } + + profile = __aa_find_profile(&common->profiles, fqname); + + return profile; +} + +/** + * aa_find_profile_by_name - find a profile by its full or partial name + * @ns: the namespace to start from + * @fqname: name to do lookup on. Does not contain namespace prefix + */ +struct aa_profile *aa_find_profile_by_fqname(struct aa_namespace *ns, + const char *fqname) +{ + struct aa_profile *profile; + + read_lock(&ns->base.lock); + profile = aa_get_profile(__aa_find_profile_by_fqname(ns, fqname)); + read_unlock(&ns->base.lock); + return profile; +} + + +/* __aa_attach_match_ - find an attachment match + * @name - to match against + * @head - profile list to walk + * + * Do a linear search on the profiles in the list. There is a matching + * preference where an exact match is prefered over a name which uses + * expressions to match, and matching expressions with the greatest + * xmatch_len are prefered. + */ +static struct aa_profile *__aa_attach_match(const char *name, + struct list_head *head) +{ + int len = 0; + struct aa_profile *profile, *candidate = NULL; + + list_for_each_entry(profile, head, base.list) { + if (profile->flags & PFLAG_NULL) + continue; + if (profile->xmatch && profile->xmatch_len > len) { + unsigned int state = aa_dfa_match(profile->xmatch, + DFA_START, name); + u16 perm = dfa_user_allow(profile->xmatch, state); + /* any accepting state means a valid match. */ + if (perm & MAY_EXEC) { + candidate = profile; + len = profile->xmatch_len; + } + } else if (!strcmp(profile->base.name, name)) + /* exact non-re match, no more searching required */ + return profile; + } + + return candidate; +} + +/** + * aa_sys_find_attach - do attachment search for sys unconfined processes + * @base: the base to search + * name: the executable name to match against + */ +struct aa_profile *aa_sys_find_attach(struct aa_policy_common *base, + const char *name) +{ + struct aa_profile *profile; + + read_lock(&base->lock); + profile = aa_get_profile(__aa_attach_match(name, &base->profiles)); + read_unlock(&base->lock); + + return profile; +} + +/** + * aa_profile_newest - find the newest version of @profile + * @profile: the profile to check for newer versions of + * + * Find the newest version of @profile, if @profile is the newest version + * return @profile. If @profile has been removed return NULL. + * + * NOTE: the profile returned is not refcounted, The refcount on @profile + * must be held until the caller decides what to do with the returned newest + * version. + */ +struct aa_profile *aa_profile_newest(struct aa_profile *profile) +{ + if (unlikely(profile && profile->replacedby)) { + for (;profile->replacedby; profile = profile->replacedby) { + if (IS_ERR(profile->replacedby)) { + /* profile has been removed */ + profile = NULL; + break; + } + } + } + + return profile; +} + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/ipc.c +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/ipc.c @@ -0,0 +1,106 @@ +/* + * AppArmor security module + * + * This file contains AppArmor ipc mediation + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include + +#include "include/audit.h" +#include "include/capability.h" +#include "include/context.h" +#include "include/policy.h" + + +struct aa_audit_ptrace { + struct aa_audit base; + + pid_t tracer, tracee; +}; + +/* call back to audit ptrace fields */ +static void audit_cb(struct audit_buffer *ab, void *va) +{ + struct aa_audit_ptrace *sa = va; + audit_log_format(ab, " tracer=%d tracee=%d", sa->tracer, sa->tracee); +} + +static int aa_audit_ptrace(struct aa_profile *profile, + struct aa_audit_ptrace *sa) +{ + return aa_audit(AUDIT_APPARMOR_AUTO, profile, (struct aa_audit *)sa, + audit_cb); +} + +int aa_may_ptrace(struct task_struct *tracer_task, struct aa_profile *tracer, + struct aa_profile *tracee, unsigned int mode) +{ + /* TODO: currently only based on capability, not extended ptrace + * rules, + * Test mode for PTRACE_MODE_READ || PTRACE_MODE_ATTACH + */ + + if (!tracer || tracer == tracee) + return 0; + /* log this capability request */ + return aa_capable(tracer_task, tracer, CAP_SYS_PTRACE, 1); +} + +int aa_ptrace(struct task_struct *tracer, struct task_struct *tracee, + unsigned int mode) +{ + /* + * tracer can ptrace tracee when + * - tracer is unconfined || + * - tracer & tracee are in the same namespace && + * - tracer is in complain mode + * - tracer has rules allowing it to trace tracee currently this is: + * - confined by the same profile || + * - tracer profile has CAP_SYS_PTRACE + */ + + struct aa_profile *tracer_p; + const struct cred *cred = aa_get_task_policy(tracer, &tracer_p); + int error = 0; + + if (tracer_p) { + struct aa_audit_ptrace sa; + memset(&sa, 0, sizeof(sa)); + sa.base.operation = "ptrace"; + sa.base.gfp_mask = GFP_ATOMIC; + sa.tracer = tracer->pid; + sa.tracee = tracee->pid; + /* FIXME: different namespace restriction can be lifted + * if, namespace are matched to AppArmor namespaces + */ + if (tracer->nsproxy != tracee->nsproxy) { + sa.base.info = "different namespaces"; + sa.base.error = -EPERM; + aa_audit(AUDIT_APPARMOR_DENIED, tracer_p, &sa.base, + audit_cb); + } else { + struct aa_profile *tracee_p; + struct cred *lcred = aa_get_task_policy(tracee, + &tracee_p); + + sa.base.error = aa_may_ptrace(tracer, tracer_p, + tracee_p, mode); + sa.base.error = aa_audit_ptrace(tracer_p, &sa); + + put_cred(lcred); + } + error = sa.base.error; + } + put_cred(cred); + + return error; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/procattr.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/procattr.h @@ -0,0 +1,26 @@ +/* + * AppArmor security module + * + * This file contains AppArmor /proc//attr/ interface function defintions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_PROCATTR_H +#define __AA_PROCATTR_H + +#define AA_DO_TEST 1 + +int aa_getprocattr(struct aa_namespace *ns, struct aa_profile *profile, + char **string); +int aa_setprocattr_changehat(char *args, int test); +int aa_setprocattr_changeprofile(char *args, int onexec, int test); +int aa_setprocattr_permipc(char *args); + +#endif /* __AA_PROCATTR_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/capability.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/capability.h @@ -0,0 +1,45 @@ +/* + * AppArmor security module + * + * This file contains AppArmor capability mediation definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_CAPABILITY_H +#define __AA_CAPABILITY_H + +#include + +struct aa_profile; + +/* aa_caps - confinement data for capabilities + * @set_caps: capabilities that are being set + * @capabilities: capabilities mask + * @audit_caps: caps that are to be audited + * @quiet_caps: caps that should not be audited + */ +struct aa_caps { + kernel_cap_t set; + kernel_cap_t allowed; + kernel_cap_t audit; + kernel_cap_t quiet; + kernel_cap_t kill; +}; + +int aa_profile_capable(struct aa_profile *profile, int cap); +int aa_capable(struct task_struct *task, struct aa_profile *profile, int cap, + int audit); + +static inline void aa_free_cap_rules(struct aa_caps *caps) +{ + /* NOP */ +} + +#endif /* __AA_CAPBILITY_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/audit.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/audit.h @@ -0,0 +1,59 @@ +/* + * AppArmor security module + * + * This file contains AppArmor auditing function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_AUDIT_H +#define __AA_AUDIT_H + +#include +#include +#include +#include + +struct aa_profile; + + +extern const char *audit_mode_names[]; +#define AUDIT_MAX_INDEX 5 + +#define AUDIT_APPARMOR_AUTO 0 /* auto choose audit message type */ + +enum audit_mode { + AUDIT_NORMAL, /* follow normal auditing of accesses */ + AUDIT_QUIET_DENIED, /* quiet all denied access messages */ + AUDIT_QUIET, /* quiet all messages */ + AUDIT_NOQUIET, /* do not quiet audit messages */ + AUDIT_ALL /* audit all accesses */ +}; + +/* + * aa_audit - AppArmor auditing structure + * Structure is populated by access control code and passed to aa_audit which + * provides for a single point of logging. + */ +struct aa_audit { + struct task_struct *task; + gfp_t gfp_mask; + int error; + const char *operation; + const char *info; +}; + +int aa_audit(int type, struct aa_profile *profile, struct aa_audit *sa, + void(*cb)(struct audit_buffer *, void *)); + +int aa_audit_syscallreject(struct aa_profile *profile, gfp_t gfp, const char *, + void(*cb)(struct audit_buffer *, void *)); + + +#endif /* __AA_AUDIT_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/match.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/match.h @@ -0,0 +1,105 @@ +/* + * AppArmor security module + * + * This file contains AppArmor policy dfa matching engine definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_MATCH_H +#define __AA_MATCH_H + +#define DFA_NOMATCH 0 +#define DFA_START 1 + +#define DFA_VALID_PERM_MASK 0xffffffff +#define DFA_VALID_PERM2_MASK 0xffffffff + + +/** + * The format used for transition tables is based on the GNU flex table + * file format (--tables-file option; see Table File Format in the flex + * info pages and the flex sources for documentation). The magic number + * used in the header is 0x1B5E783D insted of 0xF13C57B1 though, because + * the YY_ID_CHK (check) and YY_ID_DEF (default) tables are used + * slightly differently (see the apparmor-parser package). + */ + +#define YYTH_MAGIC 0x1B5E783D + +struct table_set_header { + u32 th_magic; /* YYTH_MAGIC */ + u32 th_hsize; + u32 th_ssize; + u16 th_flags; + char th_version[]; +}; + +#define YYTD_ID_ACCEPT 1 +#define YYTD_ID_BASE 2 +#define YYTD_ID_CHK 3 +#define YYTD_ID_DEF 4 +#define YYTD_ID_EC 5 +#define YYTD_ID_META 6 +#define YYTD_ID_ACCEPT2 7 +#define YYTD_ID_NXT 8 + + +#define YYTD_DATA8 1 +#define YYTD_DATA16 2 +#define YYTD_DATA32 4 + +struct table_header { + u16 td_id; + u16 td_flags; + u32 td_hilen; + u32 td_lolen; + char td_data[]; +}; + +#define DEFAULT_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_DEF - 1]->td_data)) +#define BASE_TABLE(DFA) ((u32 *)((DFA)->tables[YYTD_ID_BASE - 1]->td_data)) +#define NEXT_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_NXT - 1]->td_data)) +#define CHECK_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_CHK - 1]->td_data)) +#define EQUIV_TABLE(DFA) ((u8 *)((DFA)->tables[YYTD_ID_EC - 1]->td_data)) +#define ACCEPT_TABLE(DFA) ((u32 *)((DFA)->tables[YYTD_ID_ACCEPT - 1]->td_data)) +#define ACCEPT_TABLE2(DFA) ((u32 *)((DFA)->tables[YYTD_ID_ACCEPT2 - 1]->td_data)) + +struct aa_dfa { + struct table_header *tables[YYTD_ID_NXT]; +}; + +#define byte_to_byte(X) (X) + +#define UNPACK_ARRAY(TABLE, BLOB, LEN, TYPE, NTOHX) \ + do { \ + typeof(LEN) __i; \ + TYPE *__t = (TYPE *) TABLE; \ + TYPE *__b = (TYPE *) BLOB; \ + for (__i = 0; __i < LEN; __i++) { \ + __t[__i] = NTOHX(__b[__i]); \ + } \ + } while (0) + +static inline size_t table_size(size_t len, size_t el_size) +{ + return ALIGN(sizeof(struct table_header) + len * el_size, 8); +} + +struct aa_dfa *aa_match_alloc(void); +void aa_match_free(struct aa_dfa *dfa); +int unpack_dfa(struct aa_dfa *dfa, void *blob, size_t size); +int verify_dfa(struct aa_dfa *dfa); +unsigned int aa_dfa_match_len(struct aa_dfa *dfa, unsigned int start, + const char *str, int len); +unsigned int aa_dfa_match(struct aa_dfa *dfa, unsigned int start, + const char *str); +unsigned int aa_dfa_null_transition(struct aa_dfa *dfa, unsigned int start); + +#endif /* __AA_MATCH_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/context.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/context.h @@ -0,0 +1,153 @@ +/* + * AppArmor security module + * + * This file contains AppArmor contexts used to associate "labels" to objects. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_CONTEXT_H +#define __AA_CONTEXT_H + +#include +#include +#include + +#include "policy.h" + + +/* struct aa_file_cxt - the AppArmor context the file was opened in + * @profile: the profile the file was opened under + * @perms: the permission the file was opened with + */ +struct aa_file_cxt { + struct aa_profile *profile; + u16 allowed; +}; + +static inline struct aa_file_cxt *aa_alloc_file_context(gfp_t gfp) +{ + return kzalloc(sizeof(struct aa_file_cxt), gfp); +} + +static inline void aa_free_file_context(struct aa_file_cxt *cxt) +{ + aa_put_profile(cxt->profile); + memset(cxt, 0, sizeof(struct aa_file_cxt)); + kfree(cxt); +} + + + + + +/* struct aa_task_cxt_group - a grouping label data for confined tasks + * @profile: the current profile + * @exec: profile to transition to on next exec + * @previous: profile the task may return to + * @token: magic value the task must know for returning to @previous_profile + * + * Contains the task's current profile (which could change due to + * change_hat). Plus the hat_magic needed during change_hat. + */ +struct aa_task_cxt_group { + struct aa_profile *profile; + struct aa_profile *onexec; + struct aa_profile *previous; + u64 token; +}; + +/** + * struct aa_task_context - primary label for confined tasks + * @sys: the system labeling for the task + * + * A task is confined by the intersection of its system and user profiles + */ +struct aa_task_context { + struct aa_task_cxt_group sys; +}; + +struct aa_task_context *aa_alloc_task_context(gfp_t flags); +void aa_free_task_context(struct aa_task_context *cxt); +struct aa_task_context *aa_dup_task_context(struct aa_task_context *old_cxt, + gfp_t gfp); +void aa_cred_policy(const struct cred *cred, struct aa_profile **sys); +struct cred *aa_get_task_policy(const struct task_struct *task, + struct aa_profile **sys); +int aa_replace_current_profiles(struct aa_profile *sys); +void aa_put_task_policy(struct cred *cred); +int aa_set_current_onexec(struct aa_profile *sys); +int aa_set_current_hat(struct aa_profile *profile, u64 token); +int aa_restore_previous_profile(u64 cookie); + + +static inline struct aa_task_context *__aa_task_cxt(struct task_struct *task) +{ + return __task_cred(task)->security; +} + +/** + * __aa_task_is_confined - determine if @task has any confinement + * @task: task to check confinement of + * + * If @task != current needs to be in RCU safe critical section + */ +static inline int __aa_task_is_confined(struct task_struct *task) +{ + struct aa_task_context *cxt; + int rc = 1; + + cxt = __aa_task_cxt(task); + if (!cxt || (cxt->sys.profile->flags & PFLAG_UNCONFINED)) + rc = 0; + + return rc; +} + +static inline const struct cred *aa_current_policy(struct aa_profile **sys) +{ + const struct cred *cred = current_cred(); + struct aa_task_context *cxt = cred->security; + BUG_ON(!cxt); + *sys = aa_filtered_profile(aa_profile_newest(cxt->sys.profile)); + + return cred; +} + +static inline const struct cred *aa_current_policy_wupd(struct aa_profile **sys) +{ + const struct cred *cred = current_cred(); + struct aa_task_context *cxt = cred->security; + BUG_ON(!cxt); + + *sys = aa_profile_newest(cxt->sys.profile); + if (unlikely((cxt->sys.profile != *sys))) + aa_replace_current_profiles(*sys); + *sys = aa_filtered_profile(*sys); + + return cred; +} + +static inline struct aa_profile *aa_current_profile(void) +{ + const struct cred *cred = current_cred(); + struct aa_task_context *cxt = cred->security; + BUG_ON(!cxt); + return aa_filtered_profile(aa_profile_newest(cxt->sys.profile)); +} + +static inline struct aa_profile *aa_current_profile_wupd(void) +{ + struct aa_profile *p; + aa_current_policy_wupd(&p); + return p; +} + + +#endif /* __AA_CONTEXT_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/apparmorfs.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/apparmorfs.h @@ -0,0 +1,24 @@ +/* + * AppArmor security module + * + * This file contains AppArmor filesystem definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_APPARMORFS_H +#define __AA_APPARMORFS_H + +extern struct dentry *apparmorfs_null; +extern struct vfsmount *apparmorfs_mnt; + +extern int create_apparmorfs(void); +extern void destroy_apparmorfs(void); + +#endif /* __AA_APPARMORFS_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/file.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/file.h @@ -0,0 +1,229 @@ +/* + * AppArmor security module + * + * This file contains AppArmor file mediation function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_FILE_H +#define __AA_FILE_H + +#include + +#include "audit.h" +#include "domain.h" +#include "match.h" + +struct aa_profile; + +/* + * We use MAY_EXEC, MAY_WRITE, MAY_READ, MAY_APPEND and the following flags + * for profile permissions + */ +#define AA_MAY_LINK 0x0010 +#define AA_MAY_LOCK 0x0020 +#define AA_EXEC_MMAP 0x0040 + +#define AA_MAY_CREATE 0x0080 +#define AA_LINK_SUBSET 0x0100 +#define AA_MAY_DELEGATE 0x0200 +#define AA_EXEC_DELEGATE 0x0400 /*exec allows delegate*/ + +#define AA_MAY_CHANGEHAT 0x2000 /* ctrl auditing only */ +#define AA_MAY_ONEXEC 0x4000 /* exec allows onexec */ +#define AA_MAY_CHANGE_PROFILE 0x8000 + + +#define AA_AUDIT_FILE_MASK (MAY_READ | MAY_WRITE | MAY_EXEC | MAY_APPEND |\ + AA_MAY_LINK | AA_MAY_LOCK | AA_EXEC_MMAP | \ + AA_MAY_CREATE) + +/* + * The xindex is broken into 3 parts + * - index - an index into either the exec name table or the variable table + * - exec type - which determines how the executable name and index are used + * - flags - which modify how the destination name is applied + */ +#define AA_X_INDEX_MASK 0x03ff + +#define AA_X_TYPE_MASK 0x0c00 +#define AA_X_TYPE_SHIFT 10 +#define AA_X_NONE 0x0000 +#define AA_X_NAME 0x0400 /* use executable name px */ +#define AA_X_TABLE 0x0800 /* use a specified name ->n# */ + +#define AA_X_UNSAFE 0x1000 +#define AA_X_CHILD 0x2000 /* make >AA_X_NONE apply to children */ +#define AA_X_INHERIT 0x4000 +#define AA_X_UNCONFINED 0x8000 + + +/* AA_SECURE_X_NEEDED - is passed in the bprm->unsafe field */ +#define AA_SECURE_X_NEEDED 0x8000 + +/* need to conditionalize which ones are being set */ +struct path_cond { + uid_t uid; + umode_t mode; +}; + +/* struct file_perms - file permission fo + * @allowed: mask of permissions that are allowed + * @audit: mask of permissions to force an audit message for + * @quiet: mask of permissions to quiet audit messages for + * @kill: mask of permissions that when matched will kill the task + * @xindex: exec transition index if @allowed contains MAY_EXEC + * @dindex: delegate table index if @allowed contain AA_MAY_DELEGATE + * + * The @audit and @queit mask should be mutually exclusive. + */ +struct file_perms { + u16 allowed; + u16 audit; + u16 quiet; + u16 kill; + u16 xindex; + u16 dindex; +}; + +extern struct file_perms nullperms; + +#define COMBINED_PERM_MASK(X) ((X).allowed | (X).audit | (X).quiet | (X).kill) + +/* FIXME: split perms from dfa and match this to description + * also add delegation info. + */ +static inline u16 dfa_map_xindex(u16 mask) +{ + u16 old_index = (mask >> 10) & 0xf; + u16 index = 0; + +//printk("mask x%x\n", mask); + if (mask & 0x100) + index |= AA_X_UNSAFE; + if (mask & 0x200) + index |= AA_X_INHERIT; + if (mask & 0x80) + index |= AA_X_UNCONFINED; + + if (old_index == 1) { + index |= AA_X_UNCONFINED; + } else if (old_index == 2) { + index |= AA_X_NAME; + } else if (old_index == 3) { + index |= AA_X_NAME | AA_X_CHILD; + } else { + index |= AA_X_TABLE; + index |= old_index - 4; + } + + return index; +} + +/* + * map old dfa inline permissions to new format + */ +#define dfa_user_allow(dfa, state) ((ACCEPT_TABLE(dfa)[state]) & 0x7f) +#define dfa_user_audit(dfa, state) ((ACCEPT_TABLE2(dfa)[state]) & 0x7f) +#define dfa_user_quiet(dfa, state) (((ACCEPT_TABLE2(dfa)[state]) >> 7) & 0x7f) +#define dfa_user_xindex(dfa, state) \ + (dfa_map_xindex(ACCEPT_TABLE(dfa)[state] & 0x3fff)) + +#define dfa_other_allow(dfa, state) (((ACCEPT_TABLE(dfa)[state]) >> 14) & 0x7f) +#define dfa_other_audit(dfa, state) (((ACCEPT_TABLE2(dfa)[state]) >> 14) & 0x7f) +#define dfa_other_quiet(dfa, state) ((((ACCEPT_TABLE2(dfa)[state]) >> 7) >> 14) & 0x7f) +#define dfa_other_xindex(dfa, state) \ + dfa_map_xindex((ACCEPT_TABLE(dfa)[state] >> 14) & 0x3fff) + + +struct aa_audit_file { + struct aa_audit base; + + const char *name; + const char *name2; + const char *name3; + struct file_perms perms; + u16 request; + struct path_cond *cond; +}; + +int aa_audit_file(struct aa_profile *profile, struct aa_audit_file *sa); +void file_audit_cb(struct audit_buffer *ab, void *va); + +/** + * struct aa_file_rules - components used for file rule permissions + * @dfa: dfa to match path names and conditionals against + * @perms: permission table indexed by the matched state accept entry of @dfa + * @trans: transition table for indexed by named x transitions + * + * File permission are determined by matching a path against @dfa and then + * then using the value of the accept entry for the matching state as + * an index into @perms. If a named exec transition is required it is + * looked up in the transition table. + */ +struct aa_file_rules { + struct aa_dfa *dfa; + /* struct perms perms; */ + struct aa_domain trans; + /* TODO: add delegate table */ +}; + +struct file_perms aa_str_perms(struct aa_dfa *dfa, unsigned int start, + const char *name, struct path_cond *cond, + unsigned int *rstate); + +int aa_pathstr_perm(struct aa_profile *profile, const char *op, + const char *name, u16 request, struct path_cond *cond); + +int aa_path_perm(struct aa_profile *profile, const char *operation, + struct path *path, u16 request, struct path_cond *cond); + +int aa_path_link(struct aa_profile *profile, struct dentry *old_dentry, + struct path *new_dir, struct dentry *new_dentry); + +int aa_file_common_perm(struct aa_profile *profile, const char *operation, + struct file *file, u16 request, const char *name, + int error); + +int aa_file_perm(struct aa_profile *profile, const char *operation, + struct file *file, u16 request); + + +static inline void aa_free_file_rules(struct aa_file_rules *rules) +{ + aa_match_free(rules->dfa); + aa_free_domain_entries(&rules->trans); +} + +#define ACC_FMODE(x) (("\000\004\002\006"[(x)&O_ACCMODE]) | (((x) << 1) & 0x40)) + +/* from namei.c */ +#define ACC_MODE(x) ("\000\004\002\006"[(x)&O_ACCMODE]) +#define MAP_OPEN_FLAGS(x) ((((x) + 1) & O_ACCMODE) ? (x) + 1 : (x)) +/* + * map file flags to AppArmor permissions + */ +static inline u16 aa_map_file_to_perms(struct file *file) +{ + int flags = MAP_OPEN_FLAGS(file->f_flags); + u16 perms = ACC_FMODE(file->f_mode); + + if ((flags & O_APPEND) && (perms & MAY_WRITE)) + perms = (perms & ~MAY_WRITE) | MAY_APPEND; + /* trunc implies write permission */ + if (flags & O_TRUNC) + perms |= MAY_WRITE; + if (flags & O_CREAT) + perms |= AA_MAY_CREATE; + + return perms; +} + +#endif /* __AA_FILE_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/net.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/net.h @@ -0,0 +1,40 @@ +/* + * AppArmor security module + * + * This file contains AppArmor network mediation definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_NET_H +#define __AA_NET_H + +#include + +/* struct aa_net - network confinement data + * @allowed: basic network families permissions + * @audit_network: which network permissions to force audit + * @quiet_network: which network permissions to quiet rejects + */ +struct aa_net { + u16 allowed[AF_MAX]; + u16 audit[AF_MAX]; + u16 quiet[AF_MAX]; +}; + +extern int aa_net_perm(struct aa_profile *profile, char *operation, + int family, int type, int protocol); +extern int aa_revalidate_sk(struct sock *sk, char *operation); + +static inline void aa_free_net_rules(struct aa_net *new) +{ + /* NOP */ +} + +#endif /* __AA_NET_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/apparmor.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/apparmor.h @@ -0,0 +1,65 @@ +/* + * AppArmor security module + * + * This file contains AppArmor basic global and lib definitions + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __APPARMOR_H +#define __APPARMOR_H + +#include + +/* Control parameters settable thru module/boot flags or + * via /sys/kernel/security/apparmor/control */ +extern enum audit_mode g_apparmor_audit; +extern int g_apparmor_audit_header; +extern int g_apparmor_debug; +extern int g_apparmor_lock_policy; +extern int g_apparmor_logsyscall; +extern unsigned int g_apparmor_path_max; + + +/* + * DEBUG remains global (no per profile flag) since it is mostly used in sysctl + * which is not related to profile accesses. + */ + +#define AA_DEBUG(fmt, args...) \ + do { \ + if (g_apparmor_debug && printk_ratelimit()) \ + printk(KERN_DEBUG "AppArmor: " fmt, ##args); \ + } while (0) + +#define AA_ERROR(fmt, args...) \ + do { \ + if (printk_ratelimit()) \ + printk(KERN_ERR "AppArmor: " fmt, ##args); \ + } while (0) + +/* Flag indicating whether initialization completed */ +extern int apparmor_initialized; +void apparmor_disable(void); + +/* fn's in lib */ +void info_message(const char *str); +char *aa_split_name_from_ns(char *args, char **ns_name); +char *new_compound_name(const char *n1, const char *n2); +int aa_strneq(const char *str, const char *sub, int len); +char *strchrnul(const char *s, int c); +const char *fqname_subname(const char *name); + +static inline int mediated_filesystem(struct inode *inode) +{ + return !(inode->i_sb->s_flags & MS_NOUSER); +} + +#endif /* __APPARMOR_H */ + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/policy.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/policy.h @@ -0,0 +1,301 @@ +/* + * AppArmor security module + * + * This file contains AppArmor policy definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_POLICY_H +#define __AA_POLICY_H + +#include +#include +#include +#include +#include +#include + +#include "apparmor.h" +#include "audit.h" +#include "capability.h" +#include "domain.h" +#include "file.h" +#include "net.h" +#include "resource.h" + +extern const char *profile_mode_names[]; +#define APPARMOR_NAMES_MAX_INDEX 3 + +#define PROFILE_COMPLAIN(_profile) \ + ((g_profile_mode == APPARMOR_COMPLAIN) || ((_profile) && \ + (_profile)->mode == APPARMOR_COMPLAIN)) + +#define PROFILE_KILL(_profile) \ + ((g_profile_mode == APPARMOR_KILL) || ((_profile) && \ + (_profile)->mode == APPARMOR_KILL)) + +#define PROFILE_IS_HAT(_profile) \ + ((_profile) && (_profile)->flags & PFLAG_HAT) + + +/* + * FIXME: currently need a clean way to replace and remove profiles as a + * set. It should be done at the namespace level. + * Either, with a set of profiles loaded at the namespace level or via + * a mark and remove marked interface. + */ +enum profile_mode { + APPARMOR_ENFORCE, /* enforce access rules */ + APPARMOR_COMPLAIN, /* allow and log access violations */ + APPARMOR_KILL, /* kill task on access violation */ +}; + +enum profile_flags { + PFLAG_HAT = 1, /* profile is a hat */ + PFLAG_UNCONFINED = 2, /* profile is the unconfined profile */ + PFLAG_NULL = 4, /* profile is null learning profile */ + PFLAG_IX_ON_NAME_ERROR = 8, /* fallback to ix on name lookup fail */ + PFLAG_IMMUTABLE = 0x10, /* don't allow changes/replacement */ + PFLAG_USER_DEFINED = 0x20, /* user based profile */ + PFLAG_NO_LIST_REF = 0x40, /* list doesn't keep profile ref */ +}; + +#define AA_NEW_SID 0 + +struct aa_profile; + +/* struct aa_policy_common - common part of both namespaces and profiles + * @name: name of the object + * @count: reference count of the obj + * lock: lock for modifying the object + * @list: list object is on + * @profiles: head of the profiles list contained in the object + */ +struct aa_policy_common { + char *name; + struct kref count; + rwlock_t lock; + struct list_head list; + struct list_head profiles; +}; + +/* struct aa_ns_acct - accounting of profiles in namespace + * @max_size: maximum space allowed for all profiles in namespace + * @max_count: maximum number of profiles that can be in this namespace + * @size: current size of profiles + * @count: current count of profiles (includes null profiles) + */ +struct aa_ns_acct { + int max_size; + int max_count; + int size; + int count; +}; + +/* struct aa_namespace - namespace for a set of profiles + * @name: the name of the namespace + * @list: list the namespace is on + * @profiles: list of profile in the namespace + * @acct: accounting for the namespace + * @profile_count: count of profiles on @profiles list + * @size: accounting of how much memory is consumed by the contained profiles + * @unconfined: special unconfined profile for the namespace + * @count: reference count on the namespace + * @lock: lock for adding/removing profile to the namespace + * + * An aa_namespace defines the set profiles that are searched to determine + * which profile to attach to a task. Profiles can not be shared between + * aa_namespaces and profile names within a namespace are guarenteed to be + * unique. When profiles in seperate namespaces have the same name they + * are NOT considered to be equivalent. + * + * Namespace names must be unique and can not contain the characters :/\0 + * + * FIXME TODO: add vserver support so a vserer gets a default namespace + */ +struct aa_namespace { + struct aa_policy_common base; + struct aa_ns_acct acct; + int is_stale; + struct aa_profile *unconfined; +}; + + +/* struct aa_profile - basic confinement data + * @base - base componets of the profile (name, refcount, lists, lock ...) + * @fqname - The fully qualified profile name, less the namespace name + * @ns: namespace the profile is in + * @parent: parent profile of this profile, if one exists + * @replacedby: is set profile that replaced this profile + * @xmatch: optional extended matching for unconfined executables names + * @xmatch_plen: xmatch prefix len, used to determine xmatch priority + * @sid: the unique security id number of this profile + * @audit: the auditing mode of the profile + * @mode: the enforcement mode of the profile + * @flags: flags controlling profile behavior + * @size: the memory consumed by this profiles rules + * @file: The set of rules governing basic file access and domain transitions + * @caps: capabilities for the profile + * @net: network controls for the profile + * @rlimits: rlimits for the profile + * + * The AppArmor profile contains the basic confinement data. Each profile + * has a name, and exist in a namespace. The @name and @exec_match are + * used to determine profile attachment against unconfined tasks. All other + * attachments are determined by in profile X transition rules. + * + * The @replacedby field is write protected by the profile lock. Reads + * are assumed to be atomic, and are done without locking. + * + * Profiles have a hierachy where hats and children profiles keep + * a reference to their parent. + * + * Profile names can not begin with a : and can not contain the \0 + * character. If a profile name begins with / it will be considered when + * determining profile attachment on "unconfined" tasks. + */ +struct aa_profile { + struct aa_policy_common base; + char *fqname; + + struct aa_namespace *ns; + struct aa_profile *parent; + struct aa_profile *replacedby; + + struct aa_dfa *xmatch; + int xmatch_len; + u32 sid; + enum audit_mode audit; + enum profile_mode mode; + u32 flags; + int size; + + struct aa_file_rules file; + struct aa_caps caps; + struct aa_net net; + struct aa_rlimit rlimits; +}; + + +extern struct list_head ns_list; +extern rwlock_t ns_list_lock; + +extern struct aa_namespace *default_namespace; +extern enum profile_mode g_profile_mode; + + +void aa_add_profile(struct aa_policy_common *common, + struct aa_profile *profile); + +int alloc_default_namespace(void); +void free_default_namespace(void); +struct aa_namespace *alloc_aa_namespace(const char *name); +void free_aa_namespace_kref(struct kref *kref); +void free_aa_namespace(struct aa_namespace *ns); +struct aa_namespace *__aa_find_namespace(struct list_head *head, + const char *name); + +struct aa_namespace *aa_find_namespace(const char *name); +struct aa_namespace *aa_prepare_namespace(const char *name); +void aa_remove_namespace(struct aa_namespace *ns); +struct aa_namespace *aa_prepare_namespace(const char *name); +void aa_profile_list_release(struct list_head *head); +void aa_profile_ns_list_release(void); +void __aa_remove_namespace(struct aa_namespace *ns); + + +static inline struct aa_policy_common *aa_get_common(struct aa_policy_common *c) +{ + if (c) + kref_get(&c->count); + + return c; +} + +static inline struct aa_namespace *aa_get_namespace(struct aa_namespace *ns) +{ + if (ns) + kref_get(&(ns->base.count)); + + return ns; +} + +static inline void aa_put_namespace(struct aa_namespace *ns) +{ + if (ns) + kref_put(&ns->base.count, free_aa_namespace_kref); +} + + + +struct aa_profile *alloc_aa_profile(const char *name); +struct aa_profile *aa_alloc_null_profile(struct aa_profile *parent, int hat); +void free_aa_profile_kref(struct kref *kref); +void free_aa_profile(struct aa_profile *profile); +struct aa_profile *__aa_find_profile(struct list_head *head, const char *name); +struct aa_profile *aa_find_child(struct aa_profile *parent, const char *name); +struct aa_policy_common *__aa_find_parent_by_fqname(struct aa_namespace *ns, + const char *fqname); +struct aa_profile *__aa_find_profile_by_fqname(struct aa_namespace *ns, + const char *fqname); +struct aa_profile *aa_find_profile_by_fqname(struct aa_namespace *ns, + const char *name); +struct aa_profile *aa_match_profile(struct aa_namespace *ns, const char *name); +struct aa_profile *aa_profile_newest(struct aa_profile *profile); +struct aa_profile *aa_sys_find_attach(struct aa_policy_common *base, + const char *name); +void __aa_add_profile(struct aa_policy_common *common, + struct aa_profile *profile); +void __aa_remove_profile(struct aa_profile *profile, + struct aa_profile *replacement); +void __aa_replace_profile(struct aa_profile *profile, + struct aa_profile *replacement); +void __aa_profile_list_release(struct list_head *head); + +static inline struct aa_profile *aa_filtered_profile(struct aa_profile *profile) +{ + if (profile->flags & PFLAG_UNCONFINED) + return NULL; + return profile; +} + +/** + * aa_get_profile - increment refcount on profile @p + * @p: profile + */ +static inline struct aa_profile *aa_get_profile(struct aa_profile *p) +{ + if (p) + kref_get(&(p->base.count)); + + return p; +} + +/** + * aa_put_profile - decrement refcount on profile @p + * @p: profile + */ +static inline void aa_put_profile(struct aa_profile *p) +{ + if (p) + kref_put(&p->base.count, free_aa_profile_kref); +} + +static inline int PROFILE_AUDIT_MODE(struct aa_profile *profile) +{ + if (g_apparmor_audit != AUDIT_NORMAL) + return g_apparmor_audit; + if (profile) + return profile->audit; + return AUDIT_NORMAL; +} + +#endif /* __AA_POLICY_H */ + --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/ipc.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/ipc.h @@ -0,0 +1,28 @@ +/* + * AppArmor security module + * + * This file contains AppArmor ipc mediation function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_IPC_H +#define __AA_IPC_H + +#include + +struct aa_profile; + +int aa_may_ptrace(struct task_struct *tracer_task, struct aa_profile *tracer, + struct aa_profile *tracee, unsigned int mode); + +int aa_ptrace(struct task_struct *tracer, struct task_struct *tracee, + unsigned int mode); + +#endif /* __AA_IPC_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/domain.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/domain.h @@ -0,0 +1,37 @@ +/* + * AppArmor security module + * + * This file contains AppArmor security domain transition function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#include +#include + +#ifndef __AA_DOMAIN_H +#define __AA_DOMAIN_H + +struct aa_domain { + int size; + char **table; +}; + +int apparmor_bprm_set_creds(struct linux_binprm *bprm); +int apparmor_bprm_secureexec(struct linux_binprm *bprm); +int apparmor_bprm_committing_creds(struct linux_binprm *bprm); +void apparmor_bprm_committed_creds(struct linux_binprm *bprm); + +void aa_free_domain_entries(struct aa_domain *domain); +int aa_change_hat(const char *hat_name, u64 token, int permtest); +int aa_change_profile(const char *ns_name, const char *name, int onexec, + int permtest); + + +#endif /* __AA_DOMAIN_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/resource.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/resource.h @@ -0,0 +1,46 @@ +/* + * AppArmor security module + * + * This file contains AppArmor resource limits function defintions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_RESOURCE_H +#define __AA_RESOURCE_H + +#include +#include + +struct aa_profile; + +/* struct aa_rlimit - rlimits settings for the profile + * @mask: which hard limits to set + * @limits: rlimit values that override task limits + * + * AppArmor rlimits are used to set confined task rlimits. Only the + * limits specified in @mask will be controlled by apparmor. + */ +struct aa_rlimit { + unsigned int mask; + struct rlimit limits[RLIM_NLIMITS]; +}; + + +int aa_task_setrlimit(struct aa_profile *profile, unsigned int resource, + struct rlimit *new_rlim); + +void __aa_transition_rlimits(struct aa_profile *old, struct aa_profile *new); + +static inline void aa_free_rlimit_rules(struct aa_rlimit *rlims) +{ + /* NOP */ +} + +#endif /* __AA_RESOURCE_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/sid.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/sid.h @@ -0,0 +1,46 @@ +/* + * AppArmor security module + * + * This file contains AppArmor security identifier (sid) definitions + * + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_SID_H +#define __AA_SID_H + +#include + +struct aa_profile; + +#define AA_ALLOC_USR_SID 1 +#define AA_ALLOC_SYS_SID 0 + +u32 aa_alloc_sid(int is_usr); +void aa_free_sid(u32 sid); +int aa_add_sid_profile(u32 sid, struct aa_profile *profile); +int aa_replace_sid_profile(u32 sid, struct aa_profile *profile); +struct aa_profile *aa_get_sid_profile(u32 sid); + + +static inline u32 aa_compound_sid(u32 sys, u32 usr) +{ + return sys | usr; +} + +static inline u32 aa_usr_sid(u32 sid) +{ + return sid & 0xffff0000; +} + +static inline u32 aa_sys_sid(u32 sid) +{ + return sid & 0xffff; +} + +#endif /* __AA_SID_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/policy_interface.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/policy_interface.h @@ -0,0 +1,22 @@ +/* + * AppArmor security module + * + * This file contains AppArmor policy loading interface function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __POLICY_INTERFACE_H +#define __POLICY_INTERFACE_H + +ssize_t aa_interface_add_profiles(void *data, size_t size); +ssize_t aa_interface_replace_profiles(void *udata, size_t size); +ssize_t aa_interface_remove_profiles(char *name, size_t size); + +#endif /* __POLICY_INTERFACE_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/apparmor/include/path.h +++ linux-fsl-imx51-2.6.31/ubuntu/apparmor/include/path.h @@ -0,0 +1,24 @@ +/* + * AppArmor security module + * + * This file contains AppArmor basic path manipulation function definitions. + * + * Copyright (C) 1998-2008 Novell/SUSE + * Copyright 2009 Canonical Ltd. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2 of the + * License. + */ + +#ifndef __AA_PATH_H +#define __AA_PATH_H + +int aa_get_name_to_buffer(struct path *path, int is_dir, char *buffer, int size, + char **name); +int aa_get_name(struct path *path, int is_dir, char **buffer, char **name); +int d_namespace_path(struct path *path, char *buf, int buflen, char **name); +char *sysctl_pathname(struct ctl_table *table, char *buffer, int buflen); + +#endif /* __AA_PATH_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/ioctl.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/ioctl.c @@ -0,0 +1,67 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * ioctl + * currently plink-management only. + */ + +#include +#include "aufs.h" + +long aufs_ioctl_dir(struct file *file, unsigned int cmd, + unsigned long arg __maybe_unused) +{ + long err; + struct super_block *sb; + struct au_sbinfo *sbinfo; + + err = -EACCES; + if (!capable(CAP_SYS_ADMIN)) + goto out; + + err = 0; + sb = file->f_dentry->d_sb; + sbinfo = au_sbi(sb); + switch (cmd) { + case AUFS_CTL_PLINK_MAINT: + /* + * pseudo-link maintenance mode, + * cleared by aufs_release_dir() + */ + si_write_lock(sb); + if (!au_ftest_si(sbinfo, MAINTAIN_PLINK)) { + au_fset_si(sbinfo, MAINTAIN_PLINK); + au_fi(file)->fi_maintain_plink = 1; + } else + err = -EBUSY; + si_write_unlock(sb); + break; + case AUFS_CTL_PLINK_CLEAN: + aufs_write_lock(sb->s_root); + if (au_opt_test(sbinfo->si_mntflags, PLINK)) + au_plink_put(sb); + aufs_write_unlock(sb->s_root); + break; + default: + err = -EINVAL; + } + + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/module.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/module.h @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * module initialization and module-global + */ + +#ifndef __AUFS_MODULE_H__ +#define __AUFS_MODULE_H__ + +#ifdef __KERNEL__ + +#include + +struct path; +struct seq_file; + +/* module parameters */ +extern short aufs_nwkq; +extern int sysaufs_brs; + +/* ---------------------------------------------------------------------- */ + +extern int au_dir_roflags; + +void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp); +int au_seq_path(struct seq_file *seq, struct path *path); + +/* ---------------------------------------------------------------------- */ + +/* kmem cache */ +enum { + AuCache_DINFO, + AuCache_ICNTNR, + AuCache_FINFO, + AuCache_VDIR, + AuCache_DEHSTR, +#ifdef CONFIG_AUFS_HINOTIFY + AuCache_HINOTIFY, +#endif + AuCache_Last +}; + +#define AuCache(type) KMEM_CACHE(type, SLAB_RECLAIM_ACCOUNT) + +extern struct kmem_cache *au_cachep[]; + +#define AuCacheFuncs(name, index) \ +static inline void *au_cache_alloc_##name(void) \ +{ return kmem_cache_alloc(au_cachep[AuCache_##index], GFP_NOFS); } \ +static inline void au_cache_free_##name(void *p) \ +{ kmem_cache_free(au_cachep[AuCache_##index], p); } + +AuCacheFuncs(dinfo, DINFO); +AuCacheFuncs(icntnr, ICNTNR); +AuCacheFuncs(finfo, FINFO); +AuCacheFuncs(vdir, VDIR); +AuCacheFuncs(dehstr, DEHSTR); + +/* ---------------------------------------------------------------------- */ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_MODULE_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/fstype.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/fstype.h @@ -0,0 +1,474 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * judging filesystem type + */ + +#ifndef __AUFS_FSTYPE_H__ +#define __AUFS_FSTYPE_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include +#include + +static inline int au_test_aufs(struct super_block *sb) +{ + return sb->s_magic == AUFS_SUPER_MAGIC; +} + +static inline const char *au_sbtype(struct super_block *sb) +{ + return sb->s_type->name; +} + +static inline int au_test_iso9660(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_ROMFS_FS) || defined(CONFIG_ROMFS_FS_MODULE) + return sb->s_magic == ROMFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_romfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_ISO9660_FS) || defined(CONFIG_ISO9660_FS_MODULE) + return sb->s_magic == ISOFS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_cramfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_CRAMFS) || defined(CONFIG_CRAMFS_MODULE) + return sb->s_magic == CRAMFS_MAGIC; +#endif + return 0; +} + +static inline int au_test_nfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_NFS_FS) || defined(CONFIG_NFS_FS_MODULE) + return sb->s_magic == NFS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_fuse(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_FUSE_FS) || defined(CONFIG_FUSE_FS_MODULE) + return sb->s_magic == FUSE_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_xfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_XFS_FS) || defined(CONFIG_XFS_FS_MODULE) + return sb->s_magic == XFS_SB_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_tmpfs(struct super_block *sb __maybe_unused) +{ +#ifdef CONFIG_TMPFS + return sb->s_magic == TMPFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_ecryptfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_ECRYPT_FS) || defined(CONFIG_ECRYPT_FS_MODULE) + return !strcmp(au_sbtype(sb), "ecryptfs"); +#else + return 0; +#endif +} + +static inline int au_test_smbfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_SMB_FS) || defined(CONFIG_SMB_FS_MODULE) + return sb->s_magic == SMB_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_ocfs2(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_OCFS2_FS) || defined(CONFIG_OCFS2_FS_MODULE) + return sb->s_magic == OCFS2_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_ocfs2_dlmfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_OCFS2_FS_O2CB) || defined(CONFIG_OCFS2_FS_O2CB_MODULE) + return sb->s_magic == DLMFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_coda(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_CODA_FS) || defined(CONFIG_CODA_FS_MODULE) + return sb->s_magic == CODA_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_v9fs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_9P_FS) || defined(CONFIG_9P_FS_MODULE) + return sb->s_magic == V9FS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_ext4(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_EXT4DEV_FS) || defined(CONFIG_EXT4DEV_FS_MODULE) + return sb->s_magic == EXT4_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_sysv(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_SYSV_FS) || defined(CONFIG_SYSV_FS_MODULE) + return !strcmp(au_sbtype(sb), "sysv"); +#else + return 0; +#endif +} + +static inline int au_test_ramfs(struct super_block *sb) +{ + return sb->s_magic == RAMFS_MAGIC; +} + +static inline int au_test_ubifs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_UBIFS_FS) || defined(CONFIG_UBIFS_FS_MODULE) + return sb->s_magic == UBIFS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_procfs(struct super_block *sb __maybe_unused) +{ +#ifdef CONFIG_PROC_FS + return sb->s_magic == PROC_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_sysfs(struct super_block *sb __maybe_unused) +{ +#ifdef CONFIG_SYSFS + return sb->s_magic == SYSFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_configfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_CONFIGFS_FS) || defined(CONFIG_CONFIGFS_FS_MODULE) + return sb->s_magic == CONFIGFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_minix(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_MINIX_FS) || defined(CONFIG_MINIX_FS_MODULE) + return sb->s_magic == MINIX3_SUPER_MAGIC + || sb->s_magic == MINIX2_SUPER_MAGIC + || sb->s_magic == MINIX2_SUPER_MAGIC2 + || sb->s_magic == MINIX_SUPER_MAGIC + || sb->s_magic == MINIX_SUPER_MAGIC2; +#else + return 0; +#endif +} + +static inline int au_test_cifs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_CIFS_FS) || defined(CONFIGCIFS_FS_MODULE) + return sb->s_magic == CIFS_MAGIC_NUMBER; +#else + return 0; +#endif +} + +static inline int au_test_fat(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_FAT_FS) || defined(CONFIG_FAT_FS_MODULE) + return sb->s_magic == MSDOS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_msdos(struct super_block *sb) +{ + return au_test_fat(sb); +} + +static inline int au_test_vfat(struct super_block *sb) +{ + return au_test_fat(sb); +} + +static inline int au_test_securityfs(struct super_block *sb __maybe_unused) +{ +#ifdef CONFIG_SECURITYFS + return sb->s_magic == SECURITYFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_squashfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_SQUASHFS) || defined(CONFIG_SQUASHFS_MODULE) + return sb->s_magic == SQUASHFS_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_btrfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_BTRFS_FS) || defined(CONFIG_BTRFS_FS_MODULE) + return sb->s_magic == BTRFS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_xenfs(struct super_block *sb __maybe_unused) +{ +#if defined(CONFIG_XENFS) || defined(CONFIG_XENFS_MODULE) + return sb->s_magic == XENFS_SUPER_MAGIC; +#else + return 0; +#endif +} + +static inline int au_test_debugfs(struct super_block *sb __maybe_unused) +{ +#ifdef CONFIG_DEBUG_FS + return sb->s_magic == DEBUGFS_MAGIC; +#else + return 0; +#endif +} + +/* ---------------------------------------------------------------------- */ +/* + * they can't be an aufs branch. + */ +static inline int au_test_fs_unsuppoted(struct super_block *sb) +{ + return +#ifndef CONFIG_AUFS_BR_RAMFS + au_test_ramfs(sb) || +#endif + au_test_procfs(sb) + || au_test_sysfs(sb) + || au_test_configfs(sb) + || au_test_debugfs(sb) + || au_test_securityfs(sb) + || au_test_xenfs(sb) + /* || !strcmp(au_sbtype(sb), "unionfs") */ + || au_test_aufs(sb); /* will be supported in next version */ +} + +/* + * If the filesystem supports NFS-export, then it has to support NULL as + * a nameidata parameter for ->create(), ->lookup() and ->d_revalidate(). + * We can apply this principle when we handle a lower filesystem. + */ +static inline int au_test_fs_null_nd(struct super_block *sb) +{ + return !!sb->s_export_op; +} + +static inline int au_test_fs_remote(struct super_block *sb) +{ + return !au_test_tmpfs(sb) +#ifdef CONFIG_AUFS_BR_RAMFS + && !au_test_ramfs(sb) +#endif + && !(sb->s_type->fs_flags & FS_REQUIRES_DEV); +} + +/* ---------------------------------------------------------------------- */ + +/* + * Note: these functions (below) are created after reading ->getattr() in all + * filesystems under linux/fs. it means we have to do so in every update... + */ + +/* + * some filesystems require getattr to refresh the inode attributes before + * referencing. + * in most cases, we can rely on the inode attribute in NFS (or every remote fs) + * and leave the work for d_revalidate() + */ +static inline int au_test_fs_refresh_iattr(struct super_block *sb) +{ + return au_test_nfs(sb) + || au_test_fuse(sb) + /* || au_test_smbfs(sb) */ /* untested */ + /* || au_test_ocfs2(sb) */ /* untested */ + /* || au_test_btrfs(sb) */ /* untested */ + /* || au_test_coda(sb) */ /* untested */ + /* || au_test_v9fs(sb) */ /* untested */ + ; +} + +/* + * filesystems which don't maintain i_size or i_blocks. + */ +static inline int au_test_fs_bad_iattr_size(struct super_block *sb) +{ + return au_test_xfs(sb) + /* || au_test_ext4(sb) */ /* untested */ + /* || au_test_ocfs2(sb) */ /* untested */ + /* || au_test_ocfs2_dlmfs(sb) */ /* untested */ + /* || au_test_sysv(sb) */ /* untested */ + /* || au_test_ubifs(sb) */ /* untested */ + /* || au_test_minix(sb) */ /* untested */ + ; +} + +/* + * filesystems which don't store the correct value in some of their inode + * attributes. + */ +static inline int au_test_fs_bad_iattr(struct super_block *sb) +{ + return au_test_fs_bad_iattr_size(sb) + /* || au_test_cifs(sb) */ /* untested */ + || au_test_fat(sb) + || au_test_msdos(sb) + || au_test_vfat(sb); +} + +/* they don't check i_nlink in link(2) */ +static inline int au_test_fs_no_limit_nlink(struct super_block *sb) +{ + return au_test_tmpfs(sb) +#ifdef CONFIG_AUFS_BR_RAMFS + || au_test_ramfs(sb) +#endif + || au_test_ubifs(sb); +} + +/* + * filesystems which sets S_NOATIME and S_NOCMTIME. + */ +static inline int au_test_fs_notime(struct super_block *sb) +{ + return au_test_nfs(sb) + || au_test_fuse(sb) + || au_test_ubifs(sb) + /* || au_test_cifs(sb) */ /* untested */ + ; +} + +/* + * filesystems which requires replacing i_mapping. + */ +static inline int au_test_fs_bad_mapping(struct super_block *sb) +{ + return au_test_fuse(sb) + || au_test_ubifs(sb); +} + +/* temporary support for i#1 in cramfs */ +static inline int au_test_fs_unique_ino(struct inode *inode) +{ + if (au_test_cramfs(inode->i_sb)) + return inode->i_ino != 1; + return 1; +} + +/* ---------------------------------------------------------------------- */ + +/* + * the filesystem where the xino files placed must support i/o after unlink and + * maintain i_size and i_blocks. + */ +static inline int au_test_fs_bad_xino(struct super_block *sb) +{ + return au_test_fs_remote(sb) + || au_test_fs_bad_iattr_size(sb) +#ifdef CONFIG_AUFS_BR_RAMFS + || !(au_test_ramfs(sb) || au_test_fs_null_nd(sb)) +#else + || !au_test_fs_null_nd(sb) /* to keep xino code simple */ +#endif + /* don't want unnecessary work for xino */ + || au_test_aufs(sb) + || au_test_ecryptfs(sb); +} + +static inline int au_test_fs_trunc_xino(struct super_block *sb) +{ + return au_test_tmpfs(sb) + || au_test_ramfs(sb); +} + +/* + * test if the @sb is real-readonly. + */ +static inline int au_test_fs_rr(struct super_block *sb) +{ + return au_test_squashfs(sb) + || au_test_iso9660(sb) + || au_test_cramfs(sb) + || au_test_romfs(sb); +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FSTYPE_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/inode.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/inode.h @@ -0,0 +1,484 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode operations + */ + +#ifndef __AUFS_INODE_H__ +#define __AUFS_INODE_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include "rwsem.h" + +struct vfsmount; + +struct au_hinotify { +#ifdef CONFIG_AUFS_HINOTIFY + struct inotify_watch hin_watch; + struct inode *hin_aufs_inode; /* no get/put */ +#endif +}; + +struct au_hinode { + struct inode *hi_inode; + aufs_bindex_t hi_id; +#ifdef CONFIG_AUFS_HINOTIFY + struct au_hinotify *hi_notify; +#endif + + /* reference to the copied-up whiteout with get/put */ + struct dentry *hi_whdentry; +}; + +struct au_vdir; +struct au_iinfo { + atomic_t ii_generation; + struct super_block *ii_hsb1; /* no get/put */ + + struct au_rwsem ii_rwsem; + aufs_bindex_t ii_bstart, ii_bend; + __u32 ii_higen; + struct au_hinode *ii_hinode; + struct au_vdir *ii_vdir; +}; + +struct au_icntnr { + struct au_iinfo iinfo; + struct inode vfs_inode; +}; + +/* au_pin flags */ +#define AuPin_DI_LOCKED 1 +#define AuPin_MNT_WRITE (1 << 1) +#define au_ftest_pin(flags, name) ((flags) & AuPin_##name) +#define au_fset_pin(flags, name) { (flags) |= AuPin_##name; } +#define au_fclr_pin(flags, name) { (flags) &= ~AuPin_##name; } + +struct au_pin { + /* input */ + struct dentry *dentry; + unsigned int udba; + unsigned char lsc_di, lsc_hi, flags; + aufs_bindex_t bindex; + + /* output */ + struct dentry *parent; + struct au_hinode *hdir; + struct vfsmount *h_mnt; +}; + +/* ---------------------------------------------------------------------- */ + +static inline struct au_iinfo *au_ii(struct inode *inode) +{ + struct au_iinfo *iinfo; + + iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); + if (iinfo->ii_hinode) + return iinfo; + return NULL; /* debugging bad_inode case */ +} + +/* ---------------------------------------------------------------------- */ + +/* inode.c */ +struct inode *au_igrab(struct inode *inode); +int au_refresh_hinode_self(struct inode *inode, int do_attr); +int au_refresh_hinode(struct inode *inode, struct dentry *dentry); +struct inode *au_new_inode(struct dentry *dentry, int must_new); +int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, + struct inode *inode); +int au_test_h_perm(struct inode *h_inode, int mask); +int au_test_h_perm_sio(struct inode *h_inode, int mask); + +/* i_op.c */ +extern struct inode_operations aufs_iop, aufs_symlink_iop, aufs_dir_iop; + +/* au_wr_dir flags */ +#define AuWrDir_ADD_ENTRY 1 +#define AuWrDir_ISDIR (1 << 1) +#define au_ftest_wrdir(flags, name) ((flags) & AuWrDir_##name) +#define au_fset_wrdir(flags, name) { (flags) |= AuWrDir_##name; } +#define au_fclr_wrdir(flags, name) { (flags) &= ~AuWrDir_##name; } + +struct au_wr_dir_args { + aufs_bindex_t force_btgt; + unsigned char flags; +}; +int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, + struct au_wr_dir_args *args); + +struct dentry *au_pinned_h_parent(struct au_pin *pin); +void au_pin_init(struct au_pin *pin, struct dentry *dentry, + aufs_bindex_t bindex, int lsc_di, int lsc_hi, + unsigned int udba, unsigned char flags); +int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, + unsigned int udba, unsigned char flags) __must_check; +int au_do_pin(struct au_pin *pin) __must_check; +void au_unpin(struct au_pin *pin); + +/* i_op_add.c */ +int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent, int isdir); +int aufs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev); +int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname); +int aufs_create(struct inode *dir, struct dentry *dentry, int mode, + struct nameidata *nd); +int aufs_link(struct dentry *src_dentry, struct inode *dir, + struct dentry *dentry); +int aufs_mkdir(struct inode *dir, struct dentry *dentry, int mode); + +/* i_op_del.c */ +int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup); +int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent, int isdir); +int aufs_unlink(struct inode *dir, struct dentry *dentry); +int aufs_rmdir(struct inode *dir, struct dentry *dentry); + +/* i_op_ren.c */ +int au_wbr(struct dentry *dentry, aufs_bindex_t btgt); +int aufs_rename(struct inode *src_dir, struct dentry *src_dentry, + struct inode *dir, struct dentry *dentry); + +/* iinfo.c */ +struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex); +void au_hiput(struct au_hinode *hinode); +void au_set_ibstart(struct inode *inode, aufs_bindex_t bindex); +void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, + struct dentry *h_wh); +unsigned int au_hi_flags(struct inode *inode, int isdir); + +/* hinode flags */ +#define AuHi_XINO 1 +#define AuHi_HINOTIFY (1 << 1) +#define au_ftest_hi(flags, name) ((flags) & AuHi_##name) +#define au_fset_hi(flags, name) { (flags) |= AuHi_##name; } +#define au_fclr_hi(flags, name) { (flags) &= ~AuHi_##name; } + +#ifndef CONFIG_AUFS_HINOTIFY +#undef AuHi_HINOTIFY +#define AuHi_HINOTIFY 0 +#endif + +void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, + struct inode *h_inode, unsigned int flags); + +void au_update_iigen(struct inode *inode); +void au_update_brange(struct inode *inode, int do_put_zero); + +int au_iinfo_init(struct inode *inode); +void au_iinfo_fin(struct inode *inode); +int au_ii_realloc(struct au_iinfo *iinfo, int nbr); + +/* plink.c */ +void au_plink_block_maintain(struct super_block *sb); +#ifdef CONFIG_AUFS_DEBUG +void au_plink_list(struct super_block *sb); +#else +static inline void au_plink_list(struct super_block *sb) +{ + /* nothing */ +} +#endif +int au_plink_test(struct inode *inode); +struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex); +void au_plink_append(struct inode *inode, aufs_bindex_t bindex, + struct dentry *h_dentry); +void au_plink_put(struct super_block *sb); +void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id); + +/* ---------------------------------------------------------------------- */ + +/* lock subclass for iinfo */ +enum { + AuLsc_II_CHILD, /* child first */ + AuLsc_II_CHILD2, /* rename(2), link(2), and cpup at hinotify */ + AuLsc_II_CHILD3, /* copyup dirs */ + AuLsc_II_PARENT, /* see AuLsc_I_PARENT in vfsub.h */ + AuLsc_II_PARENT2, + AuLsc_II_PARENT3, /* copyup dirs */ + AuLsc_II_NEW_CHILD +}; + +/* + * ii_read_lock_child, ii_write_lock_child, + * ii_read_lock_child2, ii_write_lock_child2, + * ii_read_lock_child3, ii_write_lock_child3, + * ii_read_lock_parent, ii_write_lock_parent, + * ii_read_lock_parent2, ii_write_lock_parent2, + * ii_read_lock_parent3, ii_write_lock_parent3, + * ii_read_lock_new_child, ii_write_lock_new_child, + */ +#define AuReadLockFunc(name, lsc) \ +static inline void ii_read_lock_##name(struct inode *i) \ +{ \ + au_rw_read_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ +} + +#define AuWriteLockFunc(name, lsc) \ +static inline void ii_write_lock_##name(struct inode *i) \ +{ \ + au_rw_write_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ +} + +#define AuRWLockFuncs(name, lsc) \ + AuReadLockFunc(name, lsc) \ + AuWriteLockFunc(name, lsc) + +AuRWLockFuncs(child, CHILD); +AuRWLockFuncs(child2, CHILD2); +AuRWLockFuncs(child3, CHILD3); +AuRWLockFuncs(parent, PARENT); +AuRWLockFuncs(parent2, PARENT2); +AuRWLockFuncs(parent3, PARENT3); +AuRWLockFuncs(new_child, NEW_CHILD); + +#undef AuReadLockFunc +#undef AuWriteLockFunc +#undef AuRWLockFuncs + +/* + * ii_read_unlock, ii_write_unlock, ii_downgrade_lock + */ +AuSimpleUnlockRwsemFuncs(ii, struct inode *i, &au_ii(i)->ii_rwsem); + +#define IiMustNoWaiters(i) AuRwMustNoWaiters(&au_ii(i)->ii_rwsem) +#define IiMustAnyLock(i) AuRwMustAnyLock(&au_ii(i)->ii_rwsem) +#define IiMustWriteLock(i) AuRwMustWriteLock(&au_ii(i)->ii_rwsem) + +/* ---------------------------------------------------------------------- */ + +static inline unsigned int au_iigen(struct inode *inode) +{ + return atomic_read(&au_ii(inode)->ii_generation); +} + +/* tiny test for inode number */ +/* tmpfs generation is too rough */ +static inline int au_test_higen(struct inode *inode, struct inode *h_inode) +{ + struct au_iinfo *iinfo; + + iinfo = au_ii(inode); + AuRwMustAnyLock(&iinfo->ii_rwsem); + return !(iinfo->ii_hsb1 == h_inode->i_sb + && iinfo->ii_higen == h_inode->i_generation); +} + +/* ---------------------------------------------------------------------- */ + +static inline aufs_bindex_t au_ii_br_id(struct inode *inode, + aufs_bindex_t bindex) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_hinode[0 + bindex].hi_id; +} + +static inline aufs_bindex_t au_ibstart(struct inode *inode) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_bstart; +} + +static inline aufs_bindex_t au_ibend(struct inode *inode) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_bend; +} + +static inline struct au_vdir *au_ivdir(struct inode *inode) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_vdir; +} + +static inline struct dentry *au_hi_wh(struct inode *inode, aufs_bindex_t bindex) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_hinode[0 + bindex].hi_whdentry; +} + +static inline void au_set_ibend(struct inode *inode, aufs_bindex_t bindex) +{ + IiMustWriteLock(inode); + au_ii(inode)->ii_bend = bindex; +} + +static inline void au_set_ivdir(struct inode *inode, struct au_vdir *vdir) +{ + IiMustWriteLock(inode); + au_ii(inode)->ii_vdir = vdir; +} + +static inline struct au_hinode *au_hi(struct inode *inode, aufs_bindex_t bindex) +{ + IiMustAnyLock(inode); + return au_ii(inode)->ii_hinode + bindex; +} + +/* ---------------------------------------------------------------------- */ + +static inline struct dentry *au_pinned_parent(struct au_pin *pin) +{ + if (pin) + return pin->parent; + return NULL; +} + +static inline struct inode *au_pinned_h_dir(struct au_pin *pin) +{ + if (pin && pin->hdir) + return pin->hdir->hi_inode; + return NULL; +} + +static inline struct au_hinode *au_pinned_hdir(struct au_pin *pin) +{ + if (pin) + return pin->hdir; + return NULL; +} + +static inline void au_pin_set_dentry(struct au_pin *pin, struct dentry *dentry) +{ + if (pin) + pin->dentry = dentry; +} + +static inline void au_pin_set_parent_lflag(struct au_pin *pin, + unsigned char lflag) +{ + if (pin) { + /* dirty macros require brackets */ + if (lflag) { + au_fset_pin(pin->flags, DI_LOCKED); + } else { + au_fclr_pin(pin->flags, DI_LOCKED); + } + } +} + +static inline void au_pin_set_parent(struct au_pin *pin, struct dentry *parent) +{ + if (pin) { + dput(pin->parent); + pin->parent = dget(parent); + } +} + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_HINOTIFY +/* hinotify.c */ +int au_hin_alloc(struct au_hinode *hinode, struct inode *inode, + struct inode *h_inode); +void au_hin_free(struct au_hinode *hinode); +void au_hin_ctl(struct au_hinode *hinode, int do_set); +void au_reset_hinotify(struct inode *inode, unsigned int flags); + +int __init au_hinotify_init(void); +void au_hinotify_fin(void); + +static inline +void au_hin_init(struct au_hinode *hinode, struct au_hinotify *val) +{ + hinode->hi_notify = val; +} + +static inline void au_iigen_dec(struct inode *inode) +{ + atomic_dec_return(&au_ii(inode)->ii_generation); +} + +#else +static inline +int au_hin_alloc(struct au_hinode *hinode __maybe_unused, + struct inode *inode __maybe_unused, + struct inode *h_inode __maybe_unused) +{ + return -EOPNOTSUPP; +} + +static inline void au_hin_free(struct au_hinode *hinode __maybe_unused) +{ + /* nothing */ +} + +static inline void au_hin_ctl(struct au_hinode *hinode __maybe_unused, + int do_set __maybe_unused) +{ + /* nothing */ +} + +static inline void au_reset_hinotify(struct inode *inode __maybe_unused, + unsigned int flags __maybe_unused) +{ + /* nothing */ +} + +static inline int au_hinotify_init(void) +{ + return 0; +} + +#define au_hinotify_fin() do {} while (0) + +static inline +void au_hin_init(struct au_hinode *hinode __maybe_unused, + struct au_hinotify *val __maybe_unused) +{ + /* empty */ +} +#endif /* CONFIG_AUFS_HINOTIFY */ + +static inline void au_hin_suspend(struct au_hinode *hdir) +{ + au_hin_ctl(hdir, /*do_set*/0); +} + +static inline void au_hin_resume(struct au_hinode *hdir) +{ + au_hin_ctl(hdir, /*do_set*/1); +} + +static inline void au_hin_imtx_lock(struct au_hinode *hdir) +{ + mutex_lock(&hdir->hi_inode->i_mutex); + au_hin_suspend(hdir); +} + +static inline void au_hin_imtx_lock_nested(struct au_hinode *hdir, + unsigned int sc __maybe_unused) +{ + mutex_lock_nested(&hdir->hi_inode->i_mutex, sc); + au_hin_suspend(hdir); +} + +static inline void au_hin_imtx_unlock(struct au_hinode *hdir) +{ + au_hin_resume(hdir); + mutex_unlock(&hdir->hi_inode->i_mutex); +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_INODE_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/sysfs.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/sysfs.c @@ -0,0 +1,210 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sysfs interface + */ + +#include +#include +#include +#include +#include "aufs.h" + +static struct attribute *au_attr[] = { + NULL, /* need to NULL terminate the list of attributes */ +}; + +static struct attribute_group sysaufs_attr_group_body = { + .attrs = au_attr +}; + +struct attribute_group *sysaufs_attr_group = &sysaufs_attr_group_body; + +/* ---------------------------------------------------------------------- */ + +int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb) +{ + int err; + + SiMustAnyLock(sb); + + err = 0; + if (au_opt_test(au_mntflags(sb), XINO)) { + err = au_xino_path(seq, au_sbi(sb)->si_xib); + seq_putc(seq, '\n'); + } + return err; +} + +/* + * the lifetime of branch is independent from the entry under sysfs. + * sysfs handles the lifetime of the entry, and never call ->show() after it is + * unlinked. + */ +static int sysaufs_si_br(struct seq_file *seq, struct super_block *sb, + aufs_bindex_t bindex) +{ + struct path path; + struct dentry *root; + struct au_branch *br; + + AuDbg("b%d\n", bindex); + + root = sb->s_root; + di_read_lock_parent(root, !AuLock_IR); + br = au_sbr(sb, bindex); + path.mnt = br->br_mnt; + path.dentry = au_h_dptr(root, bindex); + au_seq_path(seq, &path); + di_read_unlock(root, !AuLock_IR); + seq_printf(seq, "=%s\n", au_optstr_br_perm(br->br_perm)); + return 0; +} + +/* ---------------------------------------------------------------------- */ + +static struct seq_file *au_seq(char *p, ssize_t len) +{ + struct seq_file *seq; + + seq = kzalloc(sizeof(*seq), GFP_NOFS); + if (seq) { + /* mutex_init(&seq.lock); */ + seq->buf = p; + seq->size = len; + return seq; /* success */ + } + + seq = ERR_PTR(-ENOMEM); + return seq; +} + +#define SysaufsBr_PREFIX "br" + +/* todo: file size may exceed PAGE_SIZE */ +ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, + char *buf) +{ + ssize_t err; + long l; + aufs_bindex_t bend; + struct au_sbinfo *sbinfo; + struct super_block *sb; + struct seq_file *seq; + char *name; + struct attribute **cattr; + + sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); + sb = sbinfo->si_sb; + si_noflush_read_lock(sb); + + seq = au_seq(buf, PAGE_SIZE); + err = PTR_ERR(seq); + if (IS_ERR(seq)) + goto out; + + name = (void *)attr->name; + cattr = sysaufs_si_attrs; + while (*cattr) { + if (!strcmp(name, (*cattr)->name)) { + err = container_of(*cattr, struct sysaufs_si_attr, attr) + ->show(seq, sb); + goto out_seq; + } + cattr++; + } + + bend = au_sbend(sb); + if (!strncmp(name, SysaufsBr_PREFIX, sizeof(SysaufsBr_PREFIX) - 1)) { + name += sizeof(SysaufsBr_PREFIX) - 1; + err = strict_strtol(name, 10, &l); + if (!err) { + if (l <= bend) + err = sysaufs_si_br(seq, sb, (aufs_bindex_t)l); + else + err = -ENOENT; + } + goto out_seq; + } + BUG(); + + out_seq: + if (!err) { + err = seq->count; + /* sysfs limit */ + if (unlikely(err == PAGE_SIZE)) + err = -EFBIG; + } + kfree(seq); + out: + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +void sysaufs_br_init(struct au_branch *br) +{ + br->br_attr.name = br->br_name; + br->br_attr.mode = S_IRUGO; + br->br_attr.owner = THIS_MODULE; +} + +void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) +{ + struct au_branch *br; + struct kobject *kobj; + aufs_bindex_t bend; + + dbgaufs_brs_del(sb, bindex); + + if (!sysaufs_brs) + return; + + kobj = &au_sbi(sb)->si_kobj; + bend = au_sbend(sb); + for (; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + sysfs_remove_file(kobj, &br->br_attr); + } +} + +void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) +{ + int err; + aufs_bindex_t bend; + struct kobject *kobj; + struct au_branch *br; + + dbgaufs_brs_add(sb, bindex); + + if (!sysaufs_brs) + return; + + kobj = &au_sbi(sb)->si_kobj; + bend = au_sbend(sb); + for (; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + snprintf(br->br_name, sizeof(br->br_name), SysaufsBr_PREFIX + "%d", bindex); + err = sysfs_create_file(kobj, &br->br_attr); + if (unlikely(err)) + AuWarn("failed %s under sysfs(%d)\n", br->br_name, err); + } +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/spl.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/spl.h @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * simple list protected by a spinlock + */ + +#ifndef __AUFS_SPL_H__ +#define __AUFS_SPL_H__ + +#ifdef __KERNEL__ + +#include +#include + +struct au_splhead { + spinlock_t spin; + struct list_head head; +}; + +static inline void au_spl_init(struct au_splhead *spl) +{ + spin_lock_init(&spl->spin); + INIT_LIST_HEAD(&spl->head); +} + +static inline void au_spl_add(struct list_head *list, struct au_splhead *spl) +{ + spin_lock(&spl->spin); + list_add(list, &spl->head); + spin_unlock(&spl->spin); +} + +static inline void au_spl_del(struct list_head *list, struct au_splhead *spl) +{ + spin_lock(&spl->spin); + list_del(list); + spin_unlock(&spl->spin); +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_SPL_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/plink.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/plink.c @@ -0,0 +1,354 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * pseudo-link + */ + +#include "aufs.h" + +/* + * during a user process maintains the pseudo-links, + * prohibit adding a new plink and branch manipulation. + */ +void au_plink_block_maintain(struct super_block *sb) +{ + struct au_sbinfo *sbi = au_sbi(sb); + + SiMustAnyLock(sb); + + /* gave up wake_up_bit() */ + wait_event(sbi->si_plink_wq, !au_ftest_si(sbi, MAINTAIN_PLINK)); +} + +/* ---------------------------------------------------------------------- */ + +struct pseudo_link { + struct list_head list; + struct inode *inode; +}; + +#ifdef CONFIG_AUFS_DEBUG +void au_plink_list(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + struct list_head *plink_list; + struct pseudo_link *plink; + + SiMustAnyLock(sb); + + sbinfo = au_sbi(sb); + AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); + + plink_list = &sbinfo->si_plink.head; + spin_lock(&sbinfo->si_plink.spin); + list_for_each_entry(plink, plink_list, list) + AuDbg("%lu\n", plink->inode->i_ino); + spin_unlock(&sbinfo->si_plink.spin); +} +#endif + +/* is the inode pseudo-linked? */ +int au_plink_test(struct inode *inode) +{ + int found; + struct au_sbinfo *sbinfo; + struct list_head *plink_list; + struct pseudo_link *plink; + + sbinfo = au_sbi(inode->i_sb); + AuRwMustAnyLock(&sbinfo->si_rwsem); + AuDebugOn(!au_opt_test(au_mntflags(inode->i_sb), PLINK)); + + found = 0; + plink_list = &sbinfo->si_plink.head; + spin_lock(&sbinfo->si_plink.spin); + list_for_each_entry(plink, plink_list, list) + if (plink->inode == inode) { + found = 1; + break; + } + spin_unlock(&sbinfo->si_plink.spin); + return found; +} + +/* ---------------------------------------------------------------------- */ + +/* + * generate a name for plink. + * the file will be stored under AUFS_WH_PLINKDIR. + */ +/* 20 is max digits length of ulong 64 */ +#define PLINK_NAME_LEN ((20 + 1) * 2) + +static int plink_name(char *name, int len, struct inode *inode, + aufs_bindex_t bindex) +{ + int rlen; + struct inode *h_inode; + + h_inode = au_h_iptr(inode, bindex); + rlen = snprintf(name, len, "%lu.%lu", inode->i_ino, h_inode->i_ino); + return rlen; +} + +/* lookup the plink-ed @inode under the branch at @bindex */ +struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex) +{ + struct dentry *h_dentry, *h_parent; + struct au_branch *br; + struct inode *h_dir; + char a[PLINK_NAME_LEN]; + struct qstr tgtname = { + .name = a + }; + + br = au_sbr(inode->i_sb, bindex); + h_parent = br->br_wbr->wbr_plink; + h_dir = h_parent->d_inode; + tgtname.len = plink_name(a, sizeof(a), inode, bindex); + + /* always superio. */ + mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_CHILD2); + h_dentry = au_sio_lkup_one(&tgtname, h_parent, br); + mutex_unlock(&h_dir->i_mutex); + return h_dentry; +} + +/* create a pseudo-link */ +static int do_whplink(struct qstr *tgt, struct dentry *h_parent, + struct dentry *h_dentry, struct au_branch *br) +{ + int err; + struct path h_path = { + .mnt = br->br_mnt + }; + struct inode *h_dir; + + h_dir = h_parent->d_inode; + again: + h_path.dentry = au_lkup_one(tgt, h_parent, br, /*nd*/NULL); + err = PTR_ERR(h_path.dentry); + if (IS_ERR(h_path.dentry)) + goto out; + + err = 0; + /* wh.plink dir is not monitored */ + if (h_path.dentry->d_inode + && h_path.dentry->d_inode != h_dentry->d_inode) { + err = vfsub_unlink(h_dir, &h_path, /*force*/0); + dput(h_path.dentry); + h_path.dentry = NULL; + if (!err) + goto again; + } + if (!err && !h_path.dentry->d_inode) + err = vfsub_link(h_dentry, h_dir, &h_path); + dput(h_path.dentry); + + out: + return err; +} + +struct do_whplink_args { + int *errp; + struct qstr *tgt; + struct dentry *h_parent; + struct dentry *h_dentry; + struct au_branch *br; +}; + +static void call_do_whplink(void *args) +{ + struct do_whplink_args *a = args; + *a->errp = do_whplink(a->tgt, a->h_parent, a->h_dentry, a->br); +} + +static int whplink(struct dentry *h_dentry, struct inode *inode, + aufs_bindex_t bindex, struct au_branch *br) +{ + int err, wkq_err; + struct au_wbr *wbr; + struct dentry *h_parent; + struct inode *h_dir; + char a[PLINK_NAME_LEN]; + struct qstr tgtname = { + .name = a + }; + + wbr = au_sbr(inode->i_sb, bindex)->br_wbr; + h_parent = wbr->wbr_plink; + h_dir = h_parent->d_inode; + tgtname.len = plink_name(a, sizeof(a), inode, bindex); + + /* always superio. */ + mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_CHILD2); + if (!au_test_wkq(current)) { + struct do_whplink_args args = { + .errp = &err, + .tgt = &tgtname, + .h_parent = h_parent, + .h_dentry = h_dentry, + .br = br + }; + wkq_err = au_wkq_wait(call_do_whplink, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } else + err = do_whplink(&tgtname, h_parent, h_dentry, br); + mutex_unlock(&h_dir->i_mutex); + + return err; +} + +/* free a single plink */ +static void do_put_plink(struct pseudo_link *plink, int do_del) +{ + iput(plink->inode); + if (do_del) + list_del(&plink->list); + kfree(plink); +} + +/* + * create a new pseudo-link for @h_dentry on @bindex. + * the linked inode is held in aufs @inode. + */ +void au_plink_append(struct inode *inode, aufs_bindex_t bindex, + struct dentry *h_dentry) +{ + struct super_block *sb; + struct au_sbinfo *sbinfo; + struct list_head *plink_list; + struct pseudo_link *plink; + int found, err, cnt; + + sb = inode->i_sb; + sbinfo = au_sbi(sb); + AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); + + err = 0; + cnt = 0; + found = 0; + plink_list = &sbinfo->si_plink.head; + spin_lock(&sbinfo->si_plink.spin); + list_for_each_entry(plink, plink_list, list) { + cnt++; + if (plink->inode == inode) { + found = 1; + break; + } + } + if (found) { + spin_unlock(&sbinfo->si_plink.spin); + return; + } + + plink = NULL; + if (!found) { + plink = kmalloc(sizeof(*plink), GFP_ATOMIC); + if (plink) { + plink->inode = au_igrab(inode); + list_add(&plink->list, plink_list); + cnt++; + } else + err = -ENOMEM; + } + spin_unlock(&sbinfo->si_plink.spin); + + if (!err) { + au_plink_block_maintain(sb); + err = whplink(h_dentry, inode, bindex, au_sbr(sb, bindex)); + } + + if (unlikely(cnt > AUFS_PLINK_WARN)) + AuWarn1("unexpectedly many pseudo links, %d\n", cnt); + if (unlikely(err)) { + AuWarn("err %d, damaged pseudo link.\n", err); + if (!found && plink) + do_put_plink(plink, /*do_del*/1); + } +} + +/* free all plinks */ +void au_plink_put(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + struct list_head *plink_list; + struct pseudo_link *plink, *tmp; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); + + plink_list = &sbinfo->si_plink.head; + /* no spin_lock since sbinfo is write-locked */ + list_for_each_entry_safe(plink, tmp, plink_list, list) + do_put_plink(plink, 0); + INIT_LIST_HEAD(plink_list); +} + +/* free the plinks on a branch specified by @br_id */ +void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id) +{ + struct au_sbinfo *sbinfo; + struct list_head *plink_list; + struct pseudo_link *plink, *tmp; + struct inode *inode; + aufs_bindex_t bstart, bend, bindex; + unsigned char do_put; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); + + plink_list = &sbinfo->si_plink.head; + /* no spin_lock since sbinfo is write-locked */ + list_for_each_entry_safe(plink, tmp, plink_list, list) { + do_put = 0; + inode = au_igrab(plink->inode); + ii_write_lock_child(inode); + bstart = au_ibstart(inode); + bend = au_ibend(inode); + if (bstart >= 0) { + for (bindex = bstart; bindex <= bend; bindex++) { + if (!au_h_iptr(inode, bindex) + || au_ii_br_id(inode, bindex) != br_id) + continue; + au_set_h_iptr(inode, bindex, NULL, 0); + do_put = 1; + break; + } + } else + do_put_plink(plink, 1); + + if (do_put) { + for (bindex = bstart; bindex <= bend; bindex++) + if (au_h_iptr(inode, bindex)) { + do_put = 0; + break; + } + if (do_put) + do_put_plink(plink, 1); + } + ii_write_unlock(inode); + iput(inode); + } +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/finfo.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/finfo.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * file private data + */ + +#include +#include "aufs.h" + +void au_hfput(struct au_hfile *hf, struct file *file) +{ + if (file->f_mode & FMODE_EXEC) + allow_write_access(hf->hf_file); + fput(hf->hf_file); + hf->hf_file = NULL; + atomic_dec_return(&hf->hf_br->br_count); + hf->hf_br = NULL; +} + +void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, struct file *val) +{ + struct au_finfo *finfo = au_fi(file); + struct au_hfile *hf; + + hf = finfo->fi_hfile + bindex; + if (hf->hf_file) + au_hfput(hf, file); + if (val) { + hf->hf_file = val; + hf->hf_br = au_sbr(file->f_dentry->d_sb, bindex); + } +} + +void au_update_figen(struct file *file) +{ + atomic_set(&au_fi(file)->fi_generation, au_digen(file->f_dentry)); + /* smp_mb(); */ /* atomic_set */ +} + +/* ---------------------------------------------------------------------- */ + +void au_finfo_fin(struct file *file) +{ + struct au_finfo *finfo; + aufs_bindex_t bindex, bend; + + fi_write_lock(file); + bend = au_fbend(file); + bindex = au_fbstart(file); + if (bindex >= 0) + /* + * calls fput() instead of filp_close(), + * since no dnotify or lock for the lower file. + */ + for (; bindex <= bend; bindex++) + au_set_h_fptr(file, bindex, NULL); + + finfo = au_fi(file); + au_dbg_verify_hf(finfo); + kfree(finfo->fi_hfile); + fi_write_unlock(file); + AuRwDestroy(&finfo->fi_rwsem); + au_cache_free_finfo(finfo); +} + +int au_finfo_init(struct file *file) +{ + struct au_finfo *finfo; + struct dentry *dentry; + unsigned long ul; + + dentry = file->f_dentry; + finfo = au_cache_alloc_finfo(); + if (unlikely(!finfo)) + goto out; + + finfo->fi_hfile = kcalloc(au_sbend(dentry->d_sb) + 1, + sizeof(*finfo->fi_hfile), GFP_NOFS); + if (unlikely(!finfo->fi_hfile)) + goto out_finfo; + + au_rw_init_wlock(&finfo->fi_rwsem); + finfo->fi_bstart = -1; + finfo->fi_bend = -1; + atomic_set(&finfo->fi_generation, au_digen(dentry)); + /* smp_mb(); */ /* atomic_set */ + + /* cf. au_store_oflag() */ + /* suppress a warning in lp64 */ + ul = (unsigned long)file->private_data; + file->f_mode |= (vfsub_uint_to_fmode(ul) & FMODE_EXEC); + file->private_data = finfo; + return 0; /* success */ + + out_finfo: + au_cache_free_finfo(finfo); + out: + return -ENOMEM; +} + +int au_fi_realloc(struct au_finfo *finfo, int nbr) +{ + int err, sz; + struct au_hfile *hfp; + + err = -ENOMEM; + sz = sizeof(*hfp) * (finfo->fi_bend + 1); + if (!sz) + sz = sizeof(*hfp); + hfp = au_kzrealloc(finfo->fi_hfile, sz, sizeof(*hfp) * nbr, GFP_NOFS); + if (hfp) { + finfo->fi_hfile = hfp; + err = 0; + } + + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/vfsub.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/vfsub.h @@ -0,0 +1,172 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sub-routines for VFS + */ + +#ifndef __AUFS_VFSUB_H__ +#define __AUFS_VFSUB_H__ + +#ifdef __KERNEL__ + +#include +#include + +/* ---------------------------------------------------------------------- */ + +/* lock subclass for lower inode */ +/* default MAX_LOCKDEP_SUBCLASSES(8) is not enough */ +/* reduce? gave up. */ +enum { + AuLsc_I_Begin = I_MUTEX_QUOTA, /* 4 */ + AuLsc_I_PARENT, /* lower inode, parent first */ + AuLsc_I_PARENT2, /* copyup dirs */ + AuLsc_I_PARENT3, /* copyup wh */ + AuLsc_I_CHILD, + AuLsc_I_CHILD2, + AuLsc_I_End +}; + +/* to debug easier, do not make them inlined functions */ +#define MtxMustLock(mtx) AuDebugOn(!mutex_is_locked(mtx)) +#define IMustLock(i) MtxMustLock(&(i)->i_mutex) + +/* ---------------------------------------------------------------------- */ + +static inline void vfsub_copy_inode_size(struct inode *inode, + struct inode *h_inode) +{ + spin_lock(&inode->i_lock); + fsstack_copy_inode_size(inode, h_inode); + spin_unlock(&inode->i_lock); +} + +int vfsub_update_h_iattr(struct path *h_path, int *did); +struct file *vfsub_filp_open(const char *path, int oflags, int mode); +int vfsub_kern_path(const char *name, unsigned int flags, struct path *path); +struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, + int len); +struct dentry *vfsub_lookup_hash(struct nameidata *nd); + +/* ---------------------------------------------------------------------- */ + +struct au_hinode; +struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, + struct dentry *d2, struct au_hinode *hdir2); +void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, + struct dentry *d2, struct au_hinode *hdir2); + +int vfsub_create(struct inode *dir, struct path *path, int mode); +int vfsub_symlink(struct inode *dir, struct path *path, + const char *symname); +int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev); +int vfsub_link(struct dentry *src_dentry, struct inode *dir, + struct path *path); +int vfsub_rename(struct inode *src_hdir, struct dentry *src_dentry, + struct inode *hdir, struct path *path); +int vfsub_mkdir(struct inode *dir, struct path *path, int mode); +int vfsub_rmdir(struct inode *dir, struct path *path); + +/* ---------------------------------------------------------------------- */ + +ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, + loff_t *ppos); +ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, + loff_t *ppos); +ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, + loff_t *ppos); +ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, + loff_t *ppos); +int vfsub_readdir(struct file *file, filldir_t filldir, void *arg); + +static inline void vfsub_file_accessed(struct file *h_file) +{ + file_accessed(h_file); + vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); /*ignore*/ +} + +static inline void vfsub_touch_atime(struct vfsmount *h_mnt, + struct dentry *h_dentry) +{ + struct path h_path = { + .dentry = h_dentry, + .mnt = h_mnt + }; + touch_atime(h_mnt, h_dentry); + vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/ +} + +long vfsub_splice_to(struct file *in, loff_t *ppos, + struct pipe_inode_info *pipe, size_t len, + unsigned int flags); +long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, + loff_t *ppos, size_t len, unsigned int flags); +int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, + struct file *h_file); + +/* ---------------------------------------------------------------------- */ + +static inline loff_t vfsub_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t err; + + lockdep_off(); + err = vfs_llseek(file, offset, origin); + lockdep_on(); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* dirty workaround for strict type of fmode_t */ +union vfsub_fmu { + fmode_t fm; + unsigned int ui; +}; + +static inline unsigned int vfsub_fmode_to_uint(fmode_t fm) +{ + union vfsub_fmu u = { + .fm = fm + }; + + BUILD_BUG_ON(sizeof(u.fm) != sizeof(u.ui)); + + return u.ui; +} + +static inline fmode_t vfsub_uint_to_fmode(unsigned int ui) +{ + union vfsub_fmu u = { + .ui = ui + }; + + return u.fm; +} + +/* ---------------------------------------------------------------------- */ + +int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode); +int vfsub_sio_rmdir(struct inode *dir, struct path *path); +int vfsub_sio_notify_change(struct path *path, struct iattr *ia); +int vfsub_notify_change(struct path *path, struct iattr *ia); +int vfsub_unlink(struct inode *dir, struct path *path, int force); + +#endif /* __KERNEL__ */ +#endif /* __AUFS_VFSUB_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/module.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/module.c @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * module global variables and operations + */ + +#include +#include +#include "aufs.h" + +void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp) +{ + if (new_sz <= nused) + return p; + + p = krealloc(p, new_sz, gfp); + if (p) + memset(p + nused, 0, new_sz - nused); + return p; +} + +/* ---------------------------------------------------------------------- */ + +/* + * aufs caches + */ +struct kmem_cache *au_cachep[AuCache_Last]; +static int __init au_cache_init(void) +{ + au_cachep[AuCache_DINFO] = AuCache(au_dinfo); + if (au_cachep[AuCache_DINFO]) + au_cachep[AuCache_ICNTNR] = AuCache(au_icntnr); + if (au_cachep[AuCache_ICNTNR]) + au_cachep[AuCache_FINFO] = AuCache(au_finfo); + if (au_cachep[AuCache_FINFO]) + au_cachep[AuCache_VDIR] = AuCache(au_vdir); + if (au_cachep[AuCache_VDIR]) + au_cachep[AuCache_DEHSTR] = AuCache(au_vdir_dehstr); + if (au_cachep[AuCache_DEHSTR]) + return 0; + + return -ENOMEM; +} + +static void au_cache_fin(void) +{ + int i; + for (i = 0; i < AuCache_Last; i++) + if (au_cachep[i]) { + kmem_cache_destroy(au_cachep[i]); + au_cachep[i] = NULL; + } +} + +/* ---------------------------------------------------------------------- */ + +int au_dir_roflags; + +/* + * functions for module interface. + */ +MODULE_LICENSE("GPL"); +/* MODULE_LICENSE("GPL v2"); */ +MODULE_AUTHOR("Junjiro R. Okajima "); +MODULE_DESCRIPTION(AUFS_NAME + " -- Advanced multi layered unification filesystem"); +MODULE_VERSION(AUFS_VERSION); + +/* it should be 'byte', but param_set_byte() prints it by "%c" */ +short aufs_nwkq = AUFS_NWKQ_DEF; +MODULE_PARM_DESC(nwkq, "the number of workqueue thread, " AUFS_WKQ_NAME); +module_param_named(nwkq, aufs_nwkq, short, S_IRUGO); + +/* this module parameter has no meaning when SYSFS is disabled */ +int sysaufs_brs = 1; +MODULE_PARM_DESC(brs, "use /fs/aufs/si_*/brN"); +module_param_named(brs, sysaufs_brs, int, S_IRUGO); + +/* ---------------------------------------------------------------------- */ + +static char au_esc_chars[0x20 + 3]; /* 0x01-0x20, backslash, del, and NULL */ + +int au_seq_path(struct seq_file *seq, struct path *path) +{ + return seq_path(seq, path, au_esc_chars); +} + +/* ---------------------------------------------------------------------- */ + +static int __init aufs_init(void) +{ + int err, i; + char *p; + + p = au_esc_chars; + for (i = 1; i <= ' '; i++) + *p++ = i; + *p++ = '\\'; + *p++ = '\x7f'; + *p = 0; + + au_dir_roflags = au_file_roflags(O_DIRECTORY | O_LARGEFILE); + + sysaufs_brs_init(); + au_debug_init(); + + err = -EINVAL; + if (unlikely(aufs_nwkq <= 0)) + goto out; + + err = sysaufs_init(); + if (unlikely(err)) + goto out; + err = au_wkq_init(); + if (unlikely(err)) + goto out_sysaufs; + err = au_hinotify_init(); + if (unlikely(err)) + goto out_wkq; + err = au_sysrq_init(); + if (unlikely(err)) + goto out_hin; + err = au_cache_init(); + if (unlikely(err)) + goto out_sysrq; + err = register_filesystem(&aufs_fs_type); + if (unlikely(err)) + goto out_cache; + pr_info(AUFS_NAME " " AUFS_VERSION "\n"); + goto out; /* success */ + + out_cache: + au_cache_fin(); + out_sysrq: + au_sysrq_fin(); + out_hin: + au_hinotify_fin(); + out_wkq: + au_wkq_fin(); + out_sysaufs: + sysaufs_fin(); + out: + return err; +} + +static void __exit aufs_exit(void) +{ + unregister_filesystem(&aufs_fs_type); + au_cache_fin(); + au_sysrq_fin(); + au_hinotify_fin(); + au_wkq_fin(); + sysaufs_fin(); +} + +module_init(aufs_init); +module_exit(aufs_exit); --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/i_op_add.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/i_op_add.c @@ -0,0 +1,644 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode operations (add entry) + */ + +#include "aufs.h" + +/* + * final procedure of adding a new entry, except link(2). + * remove whiteout, instantiate, copyup the parent dir's times and size + * and update version. + * if it failed, re-create the removed whiteout. + */ +static int epilog(struct inode *dir, aufs_bindex_t bindex, + struct dentry *wh_dentry, struct dentry *dentry) +{ + int err, rerr; + aufs_bindex_t bwh; + struct path h_path; + struct inode *inode, *h_dir; + struct dentry *wh; + + bwh = -1; + if (wh_dentry) { + h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */ + IMustLock(h_dir); + AuDebugOn(au_h_iptr(dir, bindex) != h_dir); + bwh = au_dbwh(dentry); + h_path.dentry = wh_dentry; + h_path.mnt = au_sbr_mnt(dir->i_sb, bindex); + err = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path, + dentry); + if (unlikely(err)) + goto out; + } + + inode = au_new_inode(dentry, /*must_new*/1); + if (!IS_ERR(inode)) { + d_instantiate(dentry, inode); + dir = dentry->d_parent->d_inode; /* dir inode is locked */ + IMustLock(dir); + if (au_ibstart(dir) == au_dbstart(dentry)) + au_cpup_attr_timesizes(dir); + dir->i_version++; + return 0; /* success */ + } + + err = PTR_ERR(inode); + if (!wh_dentry) + goto out; + + /* revert */ + /* dir inode is locked */ + wh = au_wh_create(dentry, bwh, wh_dentry->d_parent); + rerr = PTR_ERR(wh); + if (IS_ERR(wh)) { + AuIOErr("%.*s reverting whiteout failed(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + err = -EIO; + } else + dput(wh); + + out: + return err; +} + +/* + * simple tests for the adding inode operations. + * following the checks in vfs, plus the parent-child relationship. + */ +int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent, int isdir) +{ + int err; + umode_t h_mode; + struct dentry *h_dentry; + struct inode *h_inode; + + h_dentry = au_h_dptr(dentry, bindex); + h_inode = h_dentry->d_inode; + if (!dentry->d_inode) { + err = -EEXIST; + if (unlikely(h_inode)) + goto out; + } else { + /* rename(2) case */ + err = -EIO; + if (unlikely(!h_inode || !h_inode->i_nlink)) + goto out; + + h_mode = h_inode->i_mode; + if (!isdir) { + err = -EISDIR; + if (unlikely(S_ISDIR(h_mode))) + goto out; + } else if (unlikely(!S_ISDIR(h_mode))) { + err = -ENOTDIR; + goto out; + } + } + + err = -EIO; + /* expected parent dir is locked */ + if (unlikely(h_parent != h_dentry->d_parent)) + goto out; + err = 0; + + out: + return err; +} + +/* + * initial procedure of adding a new entry. + * prepare writable branch and the parent dir, lock it, + * and lookup whiteout for the new entry. + */ +static struct dentry* +lock_hdir_lkup_wh(struct dentry *dentry, struct au_dtime *dt, + struct dentry *src_dentry, struct au_pin *pin, + struct au_wr_dir_args *wr_dir_args) +{ + struct dentry *wh_dentry, *h_parent; + struct super_block *sb; + struct au_branch *br; + int err; + unsigned int udba; + aufs_bindex_t bcpup; + + err = au_wr_dir(dentry, src_dentry, wr_dir_args); + bcpup = err; + wh_dentry = ERR_PTR(err); + if (unlikely(err < 0)) + goto out; + + sb = dentry->d_sb; + udba = au_opt_udba(sb); + err = au_pin(pin, dentry, bcpup, udba, + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + wh_dentry = ERR_PTR(err); + if (unlikely(err)) + goto out; + + h_parent = au_pinned_h_parent(pin); + if (udba != AuOpt_UDBA_NONE + && au_dbstart(dentry) == bcpup) { + err = au_may_add(dentry, bcpup, h_parent, + au_ftest_wrdir(wr_dir_args->flags, ISDIR)); + wh_dentry = ERR_PTR(err); + if (unlikely(err)) + goto out_unpin; + } + + br = au_sbr(sb, bcpup); + if (dt) { + struct path tmp = { + .dentry = h_parent, + .mnt = br->br_mnt + }; + au_dtime_store(dt, au_pinned_parent(pin), &tmp); + } + + wh_dentry = NULL; + if (bcpup != au_dbwh(dentry)) + goto out; /* success */ + + wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, br); + + out_unpin: + if (IS_ERR(wh_dentry)) + au_unpin(pin); + out: + return wh_dentry; +} + +/* ---------------------------------------------------------------------- */ + +enum { Mknod, Symlink, Creat }; +struct simple_arg { + int type; + union { + struct { + int mode; + struct nameidata *nd; + } c; + struct { + const char *symname; + } s; + struct { + int mode; + dev_t dev; + } m; + } u; +}; + +static int add_simple(struct inode *dir, struct dentry *dentry, + struct simple_arg *arg) +{ + int err; + aufs_bindex_t bstart; + unsigned char created; + struct au_dtime dt; + struct au_pin pin; + struct path h_path; + struct dentry *wh_dentry, *parent; + struct inode *h_dir; + struct au_wr_dir_args wr_dir_args = { + .force_btgt = -1, + .flags = AuWrDir_ADD_ENTRY + }; + + IMustLock(dir); + + parent = dentry->d_parent; /* dir inode is locked */ + aufs_read_lock(dentry, AuLock_DW); + di_write_lock_parent(parent); + wh_dentry = lock_hdir_lkup_wh(dentry, &dt, /*src_dentry*/NULL, &pin, + &wr_dir_args); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out; + + bstart = au_dbstart(dentry); + h_path.dentry = au_h_dptr(dentry, bstart); + h_path.mnt = au_sbr_mnt(dentry->d_sb, bstart); + h_dir = au_pinned_h_dir(&pin); + switch (arg->type) { + case Creat: + err = vfsub_create(h_dir, &h_path, arg->u.c.mode); + break; + case Symlink: + err = vfsub_symlink(h_dir, &h_path, arg->u.s.symname); + break; + case Mknod: + err = vfsub_mknod(h_dir, &h_path, arg->u.m.mode, arg->u.m.dev); + break; + default: + BUG(); + } + created = !err; + if (!err) + err = epilog(dir, bstart, wh_dentry, dentry); + + /* revert */ + if (unlikely(created && err && h_path.dentry->d_inode)) { + int rerr; + rerr = vfsub_unlink(h_dir, &h_path, /*force*/0); + if (rerr) { + AuIOErr("%.*s revert failure(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + err = -EIO; + } + au_dtime_revert(&dt); + d_drop(dentry); + } + + au_unpin(&pin); + dput(wh_dentry); + + out: + if (unlikely(err)) { + au_update_dbstart(dentry); + d_drop(dentry); + } + di_write_unlock(parent); + aufs_read_unlock(dentry, AuLock_DW); + return err; +} + +int aufs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev) +{ + struct simple_arg arg = { + .type = Mknod, + .u.m = { + .mode = mode, + .dev = dev + } + }; + return add_simple(dir, dentry, &arg); +} + +int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname) +{ + struct simple_arg arg = { + .type = Symlink, + .u.s.symname = symname + }; + return add_simple(dir, dentry, &arg); +} + +int aufs_create(struct inode *dir, struct dentry *dentry, int mode, + struct nameidata *nd) +{ + struct simple_arg arg = { + .type = Creat, + .u.c = { + .mode = mode, + .nd = nd + } + }; + return add_simple(dir, dentry, &arg); +} + +/* ---------------------------------------------------------------------- */ + +struct au_link_args { + aufs_bindex_t bdst, bsrc; + struct au_pin pin; + struct path h_path; + struct dentry *src_parent, *parent; +}; + +static int au_cpup_before_link(struct dentry *src_dentry, + struct au_link_args *a) +{ + int err; + struct dentry *h_src_dentry; + struct mutex *h_mtx; + + di_read_lock_parent(a->src_parent, AuLock_IR); + err = au_test_and_cpup_dirs(src_dentry, a->bdst); + if (unlikely(err)) + goto out; + + h_src_dentry = au_h_dptr(src_dentry, a->bsrc); + h_mtx = &h_src_dentry->d_inode->i_mutex; + err = au_pin(&a->pin, src_dentry, a->bdst, + au_opt_udba(src_dentry->d_sb), + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + if (unlikely(err)) + goto out; + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + err = au_sio_cpup_simple(src_dentry, a->bdst, -1, + AuCpup_DTIME /* | AuCpup_KEEPLINO */); + mutex_unlock(h_mtx); + au_unpin(&a->pin); + + out: + di_read_unlock(a->src_parent, AuLock_IR); + return err; +} + +static int au_cpup_or_link(struct dentry *src_dentry, struct au_link_args *a) +{ + int err; + unsigned char plink; + struct inode *h_inode, *inode; + struct dentry *h_src_dentry; + struct super_block *sb; + + plink = 0; + h_inode = NULL; + sb = src_dentry->d_sb; + inode = src_dentry->d_inode; + if (au_ibstart(inode) <= a->bdst) + h_inode = au_h_iptr(inode, a->bdst); + if (!h_inode || !h_inode->i_nlink) { + /* copyup src_dentry as the name of dentry. */ + au_set_dbstart(src_dentry, a->bdst); + au_set_h_dptr(src_dentry, a->bdst, dget(a->h_path.dentry)); + h_inode = au_h_dptr(src_dentry, a->bsrc)->d_inode; + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + err = au_sio_cpup_single(src_dentry, a->bdst, a->bsrc, -1, + AuCpup_KEEPLINO, a->parent); + mutex_unlock(&h_inode->i_mutex); + au_set_h_dptr(src_dentry, a->bdst, NULL); + au_set_dbstart(src_dentry, a->bsrc); + } else { + /* the inode of src_dentry already exists on a.bdst branch */ + h_src_dentry = d_find_alias(h_inode); + if (!h_src_dentry && au_plink_test(inode)) { + plink = 1; + h_src_dentry = au_plink_lkup(inode, a->bdst); + err = PTR_ERR(h_src_dentry); + if (IS_ERR(h_src_dentry)) + goto out; + + if (unlikely(!h_src_dentry->d_inode)) { + dput(h_src_dentry); + h_src_dentry = NULL; + } + + } + if (h_src_dentry) { + err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), + &a->h_path); + dput(h_src_dentry); + } else { + AuIOErr("no dentry found for hi%lu on b%d\n", + h_inode->i_ino, a->bdst); + err = -EIO; + } + } + + if (!err && !plink) + au_plink_append(inode, a->bdst, a->h_path.dentry); + +out: + return err; +} + +int aufs_link(struct dentry *src_dentry, struct inode *dir, + struct dentry *dentry) +{ + int err, rerr; + struct au_dtime dt; + struct au_link_args *a; + struct dentry *wh_dentry, *h_src_dentry; + struct inode *inode; + struct super_block *sb; + struct au_wr_dir_args wr_dir_args = { + /* .force_btgt = -1, */ + .flags = AuWrDir_ADD_ENTRY + }; + + IMustLock(dir); + inode = src_dentry->d_inode; + IMustLock(inode); + + err = -ENOENT; + if (unlikely(!inode->i_nlink)) + goto out; + + err = -ENOMEM; + a = kzalloc(sizeof(*a), GFP_NOFS); + if (unlikely(!a)) + goto out; + + a->parent = dentry->d_parent; /* dir inode is locked */ + aufs_read_and_write_lock2(dentry, src_dentry, /*AuLock_FLUSH*/0); + a->src_parent = dget_parent(src_dentry); + wr_dir_args.force_btgt = au_dbstart(src_dentry); + + di_write_lock_parent(a->parent); + wr_dir_args.force_btgt = au_wbr(dentry, wr_dir_args.force_btgt); + wh_dentry = lock_hdir_lkup_wh(dentry, &dt, src_dentry, &a->pin, + &wr_dir_args); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out_unlock; + + err = 0; + sb = dentry->d_sb; + a->bdst = au_dbstart(dentry); + a->h_path.dentry = au_h_dptr(dentry, a->bdst); + a->h_path.mnt = au_sbr_mnt(sb, a->bdst); + a->bsrc = au_dbstart(src_dentry); + if (au_opt_test(au_mntflags(sb), PLINK)) { + if (a->bdst < a->bsrc + /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) + err = au_cpup_or_link(src_dentry, a); + else { + h_src_dentry = au_h_dptr(src_dentry, a->bdst); + err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), + &a->h_path); + } + } else { + /* + * copyup src_dentry to the branch we process, + * and then link(2) to it. + */ + if (a->bdst < a->bsrc + /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) { + au_unpin(&a->pin); + di_write_unlock(a->parent); + err = au_cpup_before_link(src_dentry, a); + di_write_lock_parent(a->parent); + if (!err) + err = au_pin(&a->pin, dentry, a->bdst, + au_opt_udba(sb), + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + if (unlikely(err)) + goto out_wh; + } + if (!err) { + h_src_dentry = au_h_dptr(src_dentry, a->bdst); + err = -ENOENT; + if (h_src_dentry && h_src_dentry->d_inode) + err = vfsub_link(h_src_dentry, + au_pinned_h_dir(&a->pin), + &a->h_path); + } + } + if (unlikely(err)) + goto out_unpin; + + if (wh_dentry) { + a->h_path.dentry = wh_dentry; + err = au_wh_unlink_dentry(au_pinned_h_dir(&a->pin), &a->h_path, + dentry); + if (unlikely(err)) + goto out_revert; + } + + dir->i_version++; + if (au_ibstart(dir) == au_dbstart(dentry)) + au_cpup_attr_timesizes(dir); + inc_nlink(inode); + inode->i_ctime = dir->i_ctime; + if (!d_unhashed(a->h_path.dentry)) + d_instantiate(dentry, au_igrab(inode)); + else + /* some filesystem calls d_drop() */ + d_drop(dentry); + goto out_unpin; /* success */ + + out_revert: + rerr = vfsub_unlink(au_pinned_h_dir(&a->pin), &a->h_path, /*force*/0); + if (!rerr) + goto out_dt; + AuIOErr("%.*s reverting failed(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + err = -EIO; + out_dt: + d_drop(dentry); + au_dtime_revert(&dt); + out_unpin: + au_unpin(&a->pin); + out_wh: + dput(wh_dentry); + out_unlock: + if (unlikely(err)) { + au_update_dbstart(dentry); + d_drop(dentry); + } + di_write_unlock(a->parent); + dput(a->src_parent); + aufs_read_and_write_unlock2(dentry, src_dentry); + kfree(a); + out: + return err; +} + +int aufs_mkdir(struct inode *dir, struct dentry *dentry, int mode) +{ + int err, rerr; + aufs_bindex_t bindex; + unsigned char diropq; + struct path h_path; + struct dentry *wh_dentry, *parent, *opq_dentry; + struct mutex *h_mtx; + struct super_block *sb; + struct { + struct au_pin pin; + struct au_dtime dt; + } *a; /* reduce the stack usage */ + struct au_wr_dir_args wr_dir_args = { + .force_btgt = -1, + .flags = AuWrDir_ADD_ENTRY | AuWrDir_ISDIR + }; + + IMustLock(dir); + + a = kmalloc(sizeof(*a), GFP_NOFS); + + aufs_read_lock(dentry, AuLock_DW); + parent = dentry->d_parent; /* dir inode is locked */ + di_write_lock_parent(parent); + wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL, + &a->pin, &wr_dir_args); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out; + + sb = dentry->d_sb; + bindex = au_dbstart(dentry); + h_path.dentry = au_h_dptr(dentry, bindex); + h_path.mnt = au_sbr_mnt(sb, bindex); + err = vfsub_mkdir(au_pinned_h_dir(&a->pin), &h_path, mode); + if (unlikely(err)) + goto out_unlock; + + /* make the dir opaque */ + diropq = 0; + h_mtx = &h_path.dentry->d_inode->i_mutex; + if (wh_dentry + || au_opt_test(au_mntflags(sb), ALWAYS_DIROPQ)) { + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + opq_dentry = au_diropq_create(dentry, bindex); + mutex_unlock(h_mtx); + err = PTR_ERR(opq_dentry); + if (IS_ERR(opq_dentry)) + goto out_dir; + dput(opq_dentry); + diropq = 1; + } + + err = epilog(dir, bindex, wh_dentry, dentry); + if (!err) { + inc_nlink(dir); + goto out_unlock; /* success */ + } + + /* revert */ + if (diropq) { + AuLabel(revert opq); + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + rerr = au_diropq_remove(dentry, bindex); + mutex_unlock(h_mtx); + if (rerr) { + AuIOErr("%.*s reverting diropq failed(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + err = -EIO; + } + } + + out_dir: + AuLabel(revert dir); + rerr = vfsub_rmdir(au_pinned_h_dir(&a->pin), &h_path); + if (rerr) { + AuIOErr("%.*s reverting dir failed(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + err = -EIO; + } + d_drop(dentry); + au_dtime_revert(&a->dt); + out_unlock: + au_unpin(&a->pin); + dput(wh_dentry); + out: + if (unlikely(err)) { + au_update_dbstart(dentry); + d_drop(dentry); + } + di_write_unlock(parent); + aufs_read_unlock(dentry, AuLock_DW); + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/opts.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/opts.h @@ -0,0 +1,196 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * mount options/flags + */ + +#ifndef __AUFS_OPTS_H__ +#define __AUFS_OPTS_H__ + +#ifdef __KERNEL__ + +#include +#include + +struct file; +struct super_block; + +/* ---------------------------------------------------------------------- */ + +/* mount flags */ +#define AuOpt_XINO 1 /* external inode number bitmap + and translation table */ +#define AuOpt_TRUNC_XINO (1 << 1) /* truncate xino files */ +#define AuOpt_UDBA_NONE (1 << 2) /* users direct branch access */ +#define AuOpt_UDBA_REVAL (1 << 3) +#define AuOpt_UDBA_HINOTIFY (1 << 4) +#define AuOpt_SHWH (1 << 5) /* show whiteout */ +#define AuOpt_PLINK (1 << 6) /* pseudo-link */ +#define AuOpt_DIRPERM1 (1 << 7) /* unimplemented */ +#define AuOpt_REFROF (1 << 8) /* unimplemented */ +#define AuOpt_ALWAYS_DIROPQ (1 << 9) /* policy to creating diropq */ +#define AuOpt_SUM (1 << 10) /* summation for statfs(2) */ +#define AuOpt_SUM_W (1 << 11) /* unimplemented */ +#define AuOpt_WARN_PERM (1 << 12) /* warn when add-branch */ +#define AuOpt_VERBOSE (1 << 13) /* busy inode when del-branch */ + +#ifndef CONFIG_AUFS_HINOTIFY +#undef AuOpt_UDBA_HINOTIFY +#define AuOpt_UDBA_HINOTIFY 0 +#endif +#ifndef CONFIG_AUFS_SHWH +#undef AuOpt_SHWH +#define AuOpt_SHWH 0 +#endif + +#define AuOpt_Def (AuOpt_XINO \ + | AuOpt_UDBA_REVAL \ + | AuOpt_PLINK \ + /* | AuOpt_DIRPERM1 */ \ + | AuOpt_WARN_PERM) +#define AuOptMask_UDBA (AuOpt_UDBA_NONE \ + | AuOpt_UDBA_REVAL \ + | AuOpt_UDBA_HINOTIFY) + +#define au_opt_test(flags, name) (flags & AuOpt_##name) +#define au_opt_set(flags, name) do { \ + BUILD_BUG_ON(AuOpt_##name & AuOptMask_UDBA); \ + ((flags) |= AuOpt_##name); \ +} while (0) +#define au_opt_set_udba(flags, name) do { \ + (flags) &= ~AuOptMask_UDBA; \ + ((flags) |= AuOpt_##name); \ +} while (0) +#define au_opt_clr(flags, name) { ((flags) &= ~AuOpt_##name); } + +/* ---------------------------------------------------------------------- */ + +/* policies to select one among multiple writable branches */ +enum { + AuWbrCreate_TDP, /* top down parent */ + AuWbrCreate_RR, /* round robin */ + AuWbrCreate_MFS, /* most free space */ + AuWbrCreate_MFSV, /* mfs with seconds */ + AuWbrCreate_MFSRR, /* mfs then rr */ + AuWbrCreate_MFSRRV, /* mfs then rr with seconds */ + AuWbrCreate_PMFS, /* parent and mfs */ + AuWbrCreate_PMFSV, /* parent and mfs with seconds */ + + AuWbrCreate_Def = AuWbrCreate_TDP +}; + +enum { + AuWbrCopyup_TDP, /* top down parent */ + AuWbrCopyup_BUP, /* bottom up parent */ + AuWbrCopyup_BU, /* bottom up */ + + AuWbrCopyup_Def = AuWbrCopyup_TDP +}; + +/* ---------------------------------------------------------------------- */ + +struct au_opt_add { + aufs_bindex_t bindex; + char *pathname; + int perm; + struct path path; +}; + +struct au_opt_del { + char *pathname; + struct path h_path; +}; + +struct au_opt_mod { + char *path; + int perm; + struct dentry *h_root; +}; + +struct au_opt_xino { + char *path; + struct file *file; +}; + +struct au_opt_xino_itrunc { + aufs_bindex_t bindex; +}; + +struct au_opt_wbr_create { + int wbr_create; + int mfs_second; + unsigned long long mfsrr_watermark; +}; + +struct au_opt { + int type; + union { + struct au_opt_xino xino; + struct au_opt_xino_itrunc xino_itrunc; + struct au_opt_add add; + struct au_opt_del del; + struct au_opt_mod mod; + int dirwh; + int rdcache; + unsigned int rdblk; + unsigned int rdhash; + int udba; + struct au_opt_wbr_create wbr_create; + int wbr_copyup; + }; +}; + +/* opts flags */ +#define AuOpts_REMOUNT 1 +#define AuOpts_REFRESH_DIR (1 << 1) +#define AuOpts_REFRESH_NONDIR (1 << 2) +#define AuOpts_TRUNC_XIB (1 << 3) +#define au_ftest_opts(flags, name) ((flags) & AuOpts_##name) +#define au_fset_opts(flags, name) { (flags) |= AuOpts_##name; } +#define au_fclr_opts(flags, name) { (flags) &= ~AuOpts_##name; } + +struct au_opts { + struct au_opt *opt; + int max_opt; + + unsigned int given_udba; + unsigned int flags; + unsigned long sb_flags; +}; + +/* ---------------------------------------------------------------------- */ + +const char *au_optstr_br_perm(int brperm); +const char *au_optstr_udba(int udba); +const char *au_optstr_wbr_copyup(int wbr_copyup); +const char *au_optstr_wbr_create(int wbr_create); + +void au_opts_free(struct au_opts *opts); +int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts); +int au_opts_verify(struct super_block *sb, unsigned long sb_flags, + unsigned int pending); +int au_opts_mount(struct super_block *sb, struct au_opts *opts); +int au_opts_remount(struct super_block *sb, struct au_opts *opts); + +unsigned int au_opt_udba(struct super_block *sb); + +/* ---------------------------------------------------------------------- */ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_OPTS_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dinfo.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dinfo.c @@ -0,0 +1,367 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * dentry private data + */ + +#include "aufs.h" + +int au_alloc_dinfo(struct dentry *dentry) +{ + struct au_dinfo *dinfo; + struct super_block *sb; + int nbr; + + dinfo = au_cache_alloc_dinfo(); + if (unlikely(!dinfo)) + goto out; + + sb = dentry->d_sb; + nbr = au_sbend(sb) + 1; + if (nbr <= 0) + nbr = 1; + dinfo->di_hdentry = kcalloc(nbr, sizeof(*dinfo->di_hdentry), GFP_NOFS); + if (unlikely(!dinfo->di_hdentry)) + goto out_dinfo; + + atomic_set(&dinfo->di_generation, au_sigen(sb)); + /* smp_mb(); */ /* atomic_set */ + au_rw_init_wlock_nested(&dinfo->di_rwsem, AuLsc_DI_CHILD); + dinfo->di_bstart = -1; + dinfo->di_bend = -1; + dinfo->di_bwh = -1; + dinfo->di_bdiropq = -1; + + dentry->d_fsdata = dinfo; + dentry->d_op = &aufs_dop; + return 0; /* success */ + + out_dinfo: + au_cache_free_dinfo(dinfo); + out: + return -ENOMEM; +} + +int au_di_realloc(struct au_dinfo *dinfo, int nbr) +{ + int err, sz; + struct au_hdentry *hdp; + + AuRwMustWriteLock(&dinfo->di_rwsem); + + err = -ENOMEM; + sz = sizeof(*hdp) * (dinfo->di_bend + 1); + if (!sz) + sz = sizeof(*hdp); + hdp = au_kzrealloc(dinfo->di_hdentry, sz, sizeof(*hdp) * nbr, GFP_NOFS); + if (hdp) { + dinfo->di_hdentry = hdp; + err = 0; + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +static void do_ii_write_lock(struct inode *inode, unsigned int lsc) +{ + switch (lsc) { + case AuLsc_DI_CHILD: + ii_write_lock_child(inode); + break; + case AuLsc_DI_CHILD2: + ii_write_lock_child2(inode); + break; + case AuLsc_DI_CHILD3: + ii_write_lock_child3(inode); + break; + case AuLsc_DI_PARENT: + ii_write_lock_parent(inode); + break; + case AuLsc_DI_PARENT2: + ii_write_lock_parent2(inode); + break; + case AuLsc_DI_PARENT3: + ii_write_lock_parent3(inode); + break; + default: + BUG(); + } +} + +static void do_ii_read_lock(struct inode *inode, unsigned int lsc) +{ + switch (lsc) { + case AuLsc_DI_CHILD: + ii_read_lock_child(inode); + break; + case AuLsc_DI_CHILD2: + ii_read_lock_child2(inode); + break; + case AuLsc_DI_CHILD3: + ii_read_lock_child3(inode); + break; + case AuLsc_DI_PARENT: + ii_read_lock_parent(inode); + break; + case AuLsc_DI_PARENT2: + ii_read_lock_parent2(inode); + break; + case AuLsc_DI_PARENT3: + ii_read_lock_parent3(inode); + break; + default: + BUG(); + } +} + +void di_read_lock(struct dentry *d, int flags, unsigned int lsc) +{ + au_rw_read_lock_nested(&au_di(d)->di_rwsem, lsc); + if (d->d_inode) { + if (au_ftest_lock(flags, IW)) + do_ii_write_lock(d->d_inode, lsc); + else if (au_ftest_lock(flags, IR)) + do_ii_read_lock(d->d_inode, lsc); + } +} + +void di_read_unlock(struct dentry *d, int flags) +{ + if (d->d_inode) { + if (au_ftest_lock(flags, IW)) + ii_write_unlock(d->d_inode); + else if (au_ftest_lock(flags, IR)) + ii_read_unlock(d->d_inode); + } + au_rw_read_unlock(&au_di(d)->di_rwsem); +} + +void di_downgrade_lock(struct dentry *d, int flags) +{ + if (d->d_inode && au_ftest_lock(flags, IR)) + ii_downgrade_lock(d->d_inode); + au_rw_dgrade_lock(&au_di(d)->di_rwsem); +} + +void di_write_lock(struct dentry *d, unsigned int lsc) +{ + au_rw_write_lock_nested(&au_di(d)->di_rwsem, lsc); + if (d->d_inode) + do_ii_write_lock(d->d_inode, lsc); +} + +void di_write_unlock(struct dentry *d) +{ + if (d->d_inode) + ii_write_unlock(d->d_inode); + au_rw_write_unlock(&au_di(d)->di_rwsem); +} + +void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir) +{ + AuDebugOn(d1 == d2 + || d1->d_inode == d2->d_inode + || d1->d_sb != d2->d_sb); + + if (isdir && au_test_subdir(d1, d2)) { + di_write_lock_child(d1); + di_write_lock_child2(d2); + } else { + /* there should be no races */ + di_write_lock_child(d2); + di_write_lock_child2(d1); + } +} + +void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir) +{ + AuDebugOn(d1 == d2 + || d1->d_inode == d2->d_inode + || d1->d_sb != d2->d_sb); + + if (isdir && au_test_subdir(d1, d2)) { + di_write_lock_parent(d1); + di_write_lock_parent2(d2); + } else { + /* there should be no races */ + di_write_lock_parent(d2); + di_write_lock_parent2(d1); + } +} + +void di_write_unlock2(struct dentry *d1, struct dentry *d2) +{ + di_write_unlock(d1); + if (d1->d_inode == d2->d_inode) + au_rw_write_unlock(&au_di(d2)->di_rwsem); + else + di_write_unlock(d2); +} + +/* ---------------------------------------------------------------------- */ + +struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex) +{ + struct dentry *d; + + DiMustAnyLock(dentry); + + if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry)) + return NULL; + AuDebugOn(bindex < 0); + d = au_di(dentry)->di_hdentry[0 + bindex].hd_dentry; + AuDebugOn(d && (atomic_read(&d->d_count) <= 0)); + return d; +} + +aufs_bindex_t au_dbtail(struct dentry *dentry) +{ + aufs_bindex_t bend, bwh; + + bend = au_dbend(dentry); + if (0 <= bend) { + bwh = au_dbwh(dentry); + if (!bwh) + return bwh; + if (0 < bwh && bwh < bend) + return bwh - 1; + } + return bend; +} + +aufs_bindex_t au_dbtaildir(struct dentry *dentry) +{ + aufs_bindex_t bend, bopq; + + bend = au_dbtail(dentry); + if (0 <= bend) { + bopq = au_dbdiropq(dentry); + if (0 <= bopq && bopq < bend) + bend = bopq; + } + return bend; +} + +/* ---------------------------------------------------------------------- */ + +void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_dentry) +{ + struct au_hdentry *hd = au_di(dentry)->di_hdentry + bindex; + + DiMustWriteLock(dentry); + + if (hd->hd_dentry) + au_hdput(hd); + hd->hd_dentry = h_dentry; +} + +void au_update_digen(struct dentry *dentry) +{ + atomic_set(&au_di(dentry)->di_generation, au_sigen(dentry->d_sb)); + /* smp_mb(); */ /* atomic_set */ +} + +void au_update_dbrange(struct dentry *dentry, int do_put_zero) +{ + struct au_dinfo *dinfo; + struct dentry *h_d; + + DiMustWriteLock(dentry); + + dinfo = au_di(dentry); + if (!dinfo || dinfo->di_bstart < 0) + return; + + if (do_put_zero) { + aufs_bindex_t bindex, bend; + + bend = dinfo->di_bend; + for (bindex = dinfo->di_bstart; bindex <= bend; bindex++) { + h_d = dinfo->di_hdentry[0 + bindex].hd_dentry; + if (h_d && !h_d->d_inode) + au_set_h_dptr(dentry, bindex, NULL); + } + } + + dinfo->di_bstart = -1; + while (++dinfo->di_bstart <= dinfo->di_bend) + if (dinfo->di_hdentry[0 + dinfo->di_bstart].hd_dentry) + break; + if (dinfo->di_bstart > dinfo->di_bend) { + dinfo->di_bstart = -1; + dinfo->di_bend = -1; + return; + } + + dinfo->di_bend++; + while (0 <= --dinfo->di_bend) + if (dinfo->di_hdentry[0 + dinfo->di_bend].hd_dentry) + break; + AuDebugOn(dinfo->di_bstart > dinfo->di_bend || dinfo->di_bend < 0); +} + +void au_update_dbstart(struct dentry *dentry) +{ + aufs_bindex_t bindex, bend; + struct dentry *h_dentry; + + bend = au_dbend(dentry); + for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) { + h_dentry = au_h_dptr(dentry, bindex); + if (!h_dentry) + continue; + if (h_dentry->d_inode) { + au_set_dbstart(dentry, bindex); + return; + } + au_set_h_dptr(dentry, bindex, NULL); + } +} + +void au_update_dbend(struct dentry *dentry) +{ + aufs_bindex_t bindex, bstart; + struct dentry *h_dentry; + + bstart = au_dbstart(dentry); + for (bindex = au_dbend(dentry); bindex <= bstart; bindex--) { + h_dentry = au_h_dptr(dentry, bindex); + if (!h_dentry) + continue; + if (h_dentry->d_inode) { + au_set_dbend(dentry, bindex); + return; + } + au_set_h_dptr(dentry, bindex, NULL); + } +} + +int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry) +{ + aufs_bindex_t bindex, bend; + + bend = au_dbend(dentry); + for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) + if (au_h_dptr(dentry, bindex) == h_dentry) + return bindex; + return -1; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/loop.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/loop.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * support for loopback mount as a branch + */ + +#ifndef __AUFS_LOOP_H__ +#define __AUFS_LOOP_H__ + +#ifdef __KERNEL__ + +struct dentry; +struct super_block; + +#ifdef CONFIG_AUFS_BDEV_LOOP +/* loop.c */ +int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1, + struct dentry *h_d2); +int au_test_loopback_kthread(void); +#else +static inline +int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1, + struct dentry *h_d2) +{ + return 0; +} + +static inline int au_test_loopback_kthread(void) +{ + return 0; +} +#endif /* BLK_DEV_LOOP */ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_LOOP_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/Kconfig @@ -0,0 +1,132 @@ +config AUFS_FS + tristate "Aufs (Advanced multi layered unification filesystem) support" + depends on EXPERIMENTAL + help + Aufs is a stackable unification filesystem such as Unionfs, + which unifies several directories and provides a merged single + directory. + In the early days, aufs was entirely re-designed and + re-implemented Unionfs Version 1.x series. Introducing many + original ideas, approaches and improvements, it becomes totally + different from Unionfs while keeping the basic features. + +if AUFS_FS +choice + prompt "Maximum number of branches" + default AUFS_BRANCH_MAX_127 + help + Specifies the maximum number of branches (or member directories) + in a single aufs. The larger value consumes more system + resources and has a minor impact to performance. +config AUFS_BRANCH_MAX_127 + bool "127" + help + Specifies the maximum number of branches (or member directories) + in a single aufs. The larger value consumes more system + resources and has a minor impact to performance. +config AUFS_BRANCH_MAX_511 + bool "511" + help + Specifies the maximum number of branches (or member directories) + in a single aufs. The larger value consumes more system + resources and has a minor impact to performance. +config AUFS_BRANCH_MAX_1023 + bool "1023" + help + Specifies the maximum number of branches (or member directories) + in a single aufs. The larger value consumes more system + resources and has a minor impact to performance. +config AUFS_BRANCH_MAX_32767 + bool "32767" + help + Specifies the maximum number of branches (or member directories) + in a single aufs. The larger value consumes more system + resources and has a minor impact to performance. +endchoice + +config AUFS_HINOTIFY + bool "Use inotify to detect actions on a branch" + depends on INOTIFY + help + If you want to modify files on branches directly, eg. bypassing aufs, + and want aufs to detect the changes of them fully, then enable this + option and use 'udba=inotify' mount option. + It will have a negative impact to the performance. + See detail in aufs.5. + +config AUFS_EXPORT + bool "NFS-exportable aufs" + depends on (AUFS_FS = y && EXPORTFS = y) || (AUFS_FS = m && EXPORTFS) + help + If you want to export your mounted aufs via NFS, then enable this + option. There are several requirements for this configuration. + See detail in aufs.5. + +config AUFS_SHWH + bool "Show whiteouts" + help + If you want to make the whiteouts in aufs visible, then enable + this option and specify 'shwh' mount option. Although it may + sounds like philosophy or something, but in technically it + simply shows the name of whiteout with keeping its behaviour. + +config AUFS_BR_RAMFS + bool "Ramfs (initramfs/rootfs) as an aufs branch" + help + If you want to use ramfs as an aufs branch fs, then enable this + option. Generally tmpfs is recommended. + Aufs prohibited them to be a branch fs by default, because + initramfs becomes unusable after switch_root or something + generally. If you sets initramfs as an aufs branch and boot your + system by switch_root, you will meet a problem easily since the + files in initramfs may be inaccessible. + Unless you are going to use ramfs as an aufs branch fs without + switch_root or something, leave it N. + +config AUFS_BR_FUSE + bool "Fuse fs as an aufs branch" + depends on FUSE_FS + select AUFS_POLL + help + If you want to use fuse-based userspace filesystem as an aufs + branch fs, then enable this option. + It implements the internal poll(2) operation which is + implemented by fuse only (curretnly). + +config AUFS_DEBUG + bool "Debug aufs" + help + Enable this to compile aufs internal debug code. + It will have a negative impact to the performance. + +config AUFS_MAGIC_SYSRQ + bool + depends on AUFS_DEBUG && MAGIC_SYSRQ + default y + help + Automatic configuration for internal use. + When aufs supports Magic SysRq, enabled automatically. + +config AUFS_BDEV_LOOP + bool + depends on BLK_DEV_LOOP + default y + help + Automatic configuration for internal use. + Convert =[ym] into =y. + +config AUFS_INO_T_64 + bool + depends on AUFS_EXPORT + depends on 64BIT && !(ALPHA || S390) + default y + help + Automatic configuration for internal use. + /* typedef unsigned long/int __kernel_ino_t */ + /* alpha and s390x are int */ + +config AUFS_POLL + bool + help + Automatic configuration for internal use. +endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/debug.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/debug.c @@ -0,0 +1,427 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * debug print functions + */ + +#include +#include +#include "aufs.h" + +int aufs_debug; +MODULE_PARM_DESC(debug, "debug print"); +module_param_named(debug, aufs_debug, int, S_IRUGO | S_IWUSR | S_IWGRP); + +char *au_plevel = KERN_DEBUG; +#define dpri(fmt, arg...) do { \ + if (au_debug_test()) \ + printk("%s" fmt, au_plevel, ##arg); \ +} while (0) + +/* ---------------------------------------------------------------------- */ + +void au_dpri_whlist(struct au_nhash *whlist) +{ + unsigned long ul, n; + struct hlist_head *head; + struct au_vdir_wh *tpos; + struct hlist_node *pos; + + n = whlist->nh_num; + head = whlist->nh_head; + for (ul = 0; ul < n; ul++) { + hlist_for_each_entry(tpos, pos, head, wh_hash) + dpri("b%d, %.*s, %d\n", + tpos->wh_bindex, + tpos->wh_str.len, tpos->wh_str.name, + tpos->wh_str.len); + head++; + } +} + +void au_dpri_vdir(struct au_vdir *vdir) +{ + unsigned long ul; + union au_vdir_deblk_p p; + unsigned char *o; + + if (!vdir || IS_ERR(vdir)) { + dpri("err %ld\n", PTR_ERR(vdir)); + return; + } + + dpri("deblk %u, nblk %lu, deblk %p, last{%lu, %p}, ver %lu\n", + vdir->vd_deblk_sz, vdir->vd_nblk, vdir->vd_deblk, + vdir->vd_last.ul, vdir->vd_last.p.deblk, vdir->vd_version); + for (ul = 0; ul < vdir->vd_nblk; ul++) { + p.deblk = vdir->vd_deblk[ul]; + o = p.deblk; + dpri("[%lu]: %p\n", ul, o); + } +} + +static int do_pri_inode(aufs_bindex_t bindex, struct inode *inode, + struct dentry *wh) +{ + char *n = NULL; + int l = 0; + + if (!inode || IS_ERR(inode)) { + dpri("i%d: err %ld\n", bindex, PTR_ERR(inode)); + return -1; + } + + /* the type of i_blocks depends upon CONFIG_LSF */ + BUILD_BUG_ON(sizeof(inode->i_blocks) != sizeof(unsigned long) + && sizeof(inode->i_blocks) != sizeof(u64)); + if (wh) { + n = (void *)wh->d_name.name; + l = wh->d_name.len; + } + + dpri("i%d: i%lu, %s, cnt %d, nl %u, 0%o, sz %llu, blk %llu," + " ct %lld, np %lu, st 0x%lx, f 0x%x, g %x%s%.*s\n", + bindex, + inode->i_ino, inode->i_sb ? au_sbtype(inode->i_sb) : "??", + atomic_read(&inode->i_count), inode->i_nlink, inode->i_mode, + i_size_read(inode), (unsigned long long)inode->i_blocks, + (long long)timespec_to_ns(&inode->i_ctime) & 0x0ffff, + inode->i_mapping ? inode->i_mapping->nrpages : 0, + inode->i_state, inode->i_flags, inode->i_generation, + l ? ", wh " : "", l, n); + return 0; +} + +void au_dpri_inode(struct inode *inode) +{ + struct au_iinfo *iinfo; + aufs_bindex_t bindex; + int err; + + err = do_pri_inode(-1, inode, NULL); + if (err || !au_test_aufs(inode->i_sb)) + return; + + iinfo = au_ii(inode); + if (!iinfo) + return; + dpri("i-1: bstart %d, bend %d, gen %d\n", + iinfo->ii_bstart, iinfo->ii_bend, au_iigen(inode)); + if (iinfo->ii_bstart < 0) + return; + for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; bindex++) + do_pri_inode(bindex, iinfo->ii_hinode[0 + bindex].hi_inode, + iinfo->ii_hinode[0 + bindex].hi_whdentry); +} + +static int do_pri_dentry(aufs_bindex_t bindex, struct dentry *dentry) +{ + struct dentry *wh = NULL; + + if (!dentry || IS_ERR(dentry)) { + dpri("d%d: err %ld\n", bindex, PTR_ERR(dentry)); + return -1; + } + /* do not call dget_parent() here */ + dpri("d%d: %.*s?/%.*s, %s, cnt %d, flags 0x%x\n", + bindex, + AuDLNPair(dentry->d_parent), AuDLNPair(dentry), + dentry->d_sb ? au_sbtype(dentry->d_sb) : "??", + atomic_read(&dentry->d_count), dentry->d_flags); + if (bindex >= 0 && dentry->d_inode && au_test_aufs(dentry->d_sb)) { + struct au_iinfo *iinfo = au_ii(dentry->d_inode); + if (iinfo) + wh = iinfo->ii_hinode[0 + bindex].hi_whdentry; + } + do_pri_inode(bindex, dentry->d_inode, wh); + return 0; +} + +void au_dpri_dentry(struct dentry *dentry) +{ + struct au_dinfo *dinfo; + aufs_bindex_t bindex; + int err; + + err = do_pri_dentry(-1, dentry); + if (err || !au_test_aufs(dentry->d_sb)) + return; + + dinfo = au_di(dentry); + if (!dinfo) + return; + dpri("d-1: bstart %d, bend %d, bwh %d, bdiropq %d, gen %d\n", + dinfo->di_bstart, dinfo->di_bend, + dinfo->di_bwh, dinfo->di_bdiropq, au_digen(dentry)); + if (dinfo->di_bstart < 0) + return; + for (bindex = dinfo->di_bstart; bindex <= dinfo->di_bend; bindex++) + do_pri_dentry(bindex, dinfo->di_hdentry[0 + bindex].hd_dentry); +} + +static int do_pri_file(aufs_bindex_t bindex, struct file *file) +{ + char a[32]; + + if (!file || IS_ERR(file)) { + dpri("f%d: err %ld\n", bindex, PTR_ERR(file)); + return -1; + } + a[0] = 0; + if (bindex < 0 + && file->f_dentry + && au_test_aufs(file->f_dentry->d_sb) + && au_fi(file)) + snprintf(a, sizeof(a), ", mmapped %d", au_test_mmapped(file)); + dpri("f%d: mode 0x%x, flags 0%o, cnt %ld, pos %llu%s\n", + bindex, file->f_mode, file->f_flags, (long)file_count(file), + file->f_pos, a); + if (file->f_dentry) + do_pri_dentry(bindex, file->f_dentry); + return 0; +} + +void au_dpri_file(struct file *file) +{ + struct au_finfo *finfo; + aufs_bindex_t bindex; + int err; + + err = do_pri_file(-1, file); + if (err || !file->f_dentry || !au_test_aufs(file->f_dentry->d_sb)) + return; + + finfo = au_fi(file); + if (!finfo) + return; + if (finfo->fi_bstart < 0) + return; + for (bindex = finfo->fi_bstart; bindex <= finfo->fi_bend; bindex++) { + struct au_hfile *hf; + + hf = finfo->fi_hfile + bindex; + do_pri_file(bindex, hf ? hf->hf_file : NULL); + } +} + +static int do_pri_br(aufs_bindex_t bindex, struct au_branch *br) +{ + struct vfsmount *mnt; + struct super_block *sb; + + if (!br || IS_ERR(br)) + goto out; + mnt = br->br_mnt; + if (!mnt || IS_ERR(mnt)) + goto out; + sb = mnt->mnt_sb; + if (!sb || IS_ERR(sb)) + goto out; + + dpri("s%d: {perm 0x%x, cnt %d, wbr %p}, " + "%s, dev 0x%02x%02x, flags 0x%lx, cnt(BIAS) %d, active %d, " + "xino %d\n", + bindex, br->br_perm, atomic_read(&br->br_count), br->br_wbr, + au_sbtype(sb), MAJOR(sb->s_dev), MINOR(sb->s_dev), + sb->s_flags, sb->s_count - S_BIAS, + atomic_read(&sb->s_active), !!br->br_xino.xi_file); + return 0; + + out: + dpri("s%d: err %ld\n", bindex, PTR_ERR(br)); + return -1; +} + +void au_dpri_sb(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + aufs_bindex_t bindex; + int err; + /* to reuduce stack size */ + struct { + struct vfsmount mnt; + struct au_branch fake; + } *a; + + /* this function can be called from magic sysrq */ + a = kzalloc(sizeof(*a), GFP_ATOMIC); + if (unlikely(!a)) { + dpri("no memory\n"); + return; + } + + a->mnt.mnt_sb = sb; + a->fake.br_perm = 0; + a->fake.br_mnt = &a->mnt; + a->fake.br_xino.xi_file = NULL; + atomic_set(&a->fake.br_count, 0); + smp_mb(); /* atomic_set */ + err = do_pri_br(-1, &a->fake); + kfree(a); + dpri("dev 0x%x\n", sb->s_dev); + if (err || !au_test_aufs(sb)) + return; + + sbinfo = au_sbi(sb); + if (!sbinfo) + return; + dpri("nw %d, gen %u, kobj %d\n", + atomic_read(&sbinfo->si_nowait.nw_len), sbinfo->si_generation, + atomic_read(&sbinfo->si_kobj.kref.refcount)); + for (bindex = 0; bindex <= sbinfo->si_bend; bindex++) + do_pri_br(bindex, sbinfo->si_branch[0 + bindex]); +} + +/* ---------------------------------------------------------------------- */ + +void au_dbg_sleep_jiffy(int jiffy) +{ + while (jiffy) + jiffy = schedule_timeout_uninterruptible(jiffy); +} + +void au_dbg_iattr(struct iattr *ia) +{ +#define AuBit(name) if (ia->ia_valid & ATTR_ ## name) \ + dpri(#name "\n") + AuBit(MODE); + AuBit(UID); + AuBit(GID); + AuBit(SIZE); + AuBit(ATIME); + AuBit(MTIME); + AuBit(CTIME); + AuBit(ATIME_SET); + AuBit(MTIME_SET); + AuBit(FORCE); + AuBit(ATTR_FLAG); + AuBit(KILL_SUID); + AuBit(KILL_SGID); + AuBit(FILE); + AuBit(KILL_PRIV); + AuBit(OPEN); + AuBit(TIMES_SET); +#undef AuBit + dpri("ia_file %p\n", ia->ia_file); +} + +/* ---------------------------------------------------------------------- */ + +void au_dbg_verify_dir_parent(struct dentry *dentry, unsigned int sigen) +{ + struct dentry *parent; + + parent = dget_parent(dentry); + AuDebugOn(!S_ISDIR(dentry->d_inode->i_mode) + || IS_ROOT(dentry) + || au_digen(parent) != sigen); + dput(parent); +} + +void au_dbg_verify_nondir_parent(struct dentry *dentry, unsigned int sigen) +{ + struct dentry *parent; + + parent = dget_parent(dentry); + AuDebugOn(S_ISDIR(dentry->d_inode->i_mode) + || au_digen(parent) != sigen); + dput(parent); +} + +void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen) +{ + int err, i, j; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + struct dentry **dentries; + + err = au_dpages_init(&dpages, GFP_NOFS); + AuDebugOn(err); + err = au_dcsub_pages_rev(&dpages, parent, /*do_include*/1, NULL, NULL); + AuDebugOn(err); + for (i = dpages.ndpage - 1; !err && i >= 0; i--) { + dpage = dpages.dpages + i; + dentries = dpage->dentries; + for (j = dpage->ndentry - 1; !err && j >= 0; j--) + AuDebugOn(au_digen(dentries[j]) != sigen); + } + au_dpages_free(&dpages); +} + +void au_dbg_verify_hf(struct au_finfo *finfo) +{ + struct au_hfile *hf; + aufs_bindex_t bend, bindex; + + if (finfo->fi_bstart >= 0) { + bend = finfo->fi_bend; + for (bindex = finfo->fi_bstart; bindex <= bend; bindex++) { + hf = finfo->fi_hfile + bindex; + AuDebugOn(hf->hf_file || hf->hf_br); + } + } +} + +void au_dbg_verify_kthread(void) +{ + if (au_test_wkq(current)) { + au_dbg_blocked(); + BUG(); + } +} + +/* ---------------------------------------------------------------------- */ + +void au_debug_sbinfo_init(struct au_sbinfo *sbinfo __maybe_unused) +{ +#ifdef AuForceNoPlink + au_opt_clr(sbinfo->si_mntflags, PLINK); +#endif +#ifdef AuForceNoXino + au_opt_clr(sbinfo->si_mntflags, XINO); +#endif +#ifdef AuForceNoRefrof + au_opt_clr(sbinfo->si_mntflags, REFROF); +#endif +#ifdef AuForceHinotify + au_opt_set_udba(sbinfo->si_mntflags, UDBA_HINOTIFY); +#endif +} + +int __init au_debug_init(void) +{ + aufs_bindex_t bindex; + struct au_vdir_destr destr; + + bindex = -1; + AuDebugOn(bindex >= 0); + + destr.len = -1; + AuDebugOn(destr.len < NAME_MAX); + +#ifdef CONFIG_4KSTACKS + AuWarn("CONFIG_4KSTACKS is defined.\n"); +#endif + +#ifdef AuForceNoBrs + sysaufs_brs = 0; +#endif + + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/BOM @@ -0,0 +1,11 @@ +Git Tree: http://git.c3sl.ufpr.br/pub/scm/aufs/aufs2-standalone.git +Git Branch: aufs2-30 (b599d87c0ad475e309f81d9b85ba56527371db81) + +This standalone snapshot was built from the commit below in the main +aufs2-2.6.git tree (http://git.c3sl.ufpr.br/pub/scm/aufs/aufs2-2.6.git): + + commit 049de2b1a34c3145ea82a2fe92c286393c4f6310 + Author: J. R. Okajima + Date: Fri Jul 24 12:51:40 2009 +0900 + + aufs: possible bugfix, verify the lower parent dentry --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/xino.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/xino.c @@ -0,0 +1,1200 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * external inode number translation table and bitmap + */ + +#include +#include +#include +#include "aufs.h" + +ssize_t xino_fread(au_readf_t func, struct file *file, void *buf, size_t size, + loff_t *pos) +{ + ssize_t err; + mm_segment_t oldfs; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + do { + /* todo: signal_pending? */ + err = func(file, (char __user *)buf, size, pos); + } while (err == -EAGAIN || err == -EINTR); + set_fs(oldfs); + +#if 0 /* reserved for future use */ + if (err > 0) + fsnotify_access(file->f_dentry); +#endif + + return err; +} + +/* ---------------------------------------------------------------------- */ + +static ssize_t do_xino_fwrite(au_writef_t func, struct file *file, void *buf, + size_t size, loff_t *pos) +{ + ssize_t err; + mm_segment_t oldfs; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + lockdep_off(); + do { + /* todo: signal_pending? */ + err = func(file, (const char __user *)buf, size, pos); + } while (err == -EAGAIN || err == -EINTR); + lockdep_on(); + set_fs(oldfs); + +#if 0 /* reserved for future use */ + if (err > 0) + fsnotify_modify(file->f_dentry); +#endif + + return err; +} + +struct do_xino_fwrite_args { + ssize_t *errp; + au_writef_t func; + struct file *file; + void *buf; + size_t size; + loff_t *pos; +}; + +static void call_do_xino_fwrite(void *args) +{ + struct do_xino_fwrite_args *a = args; + *a->errp = do_xino_fwrite(a->func, a->file, a->buf, a->size, a->pos); +} + +ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size, + loff_t *pos) +{ + ssize_t err; + + /* todo: signal block and no wkq? */ + /* todo: new credential scheme */ + /* + * it breaks RLIMIT_FSIZE and normal user's limit, + * users should care about quota and real 'filesystem full.' + */ + if (!au_test_wkq(current)) { + int wkq_err; + struct do_xino_fwrite_args args = { + .errp = &err, + .func = func, + .file = file, + .buf = buf, + .size = size, + .pos = pos + }; + + wkq_err = au_wkq_wait(call_do_xino_fwrite, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } else + err = do_xino_fwrite(func, file, buf, size, pos); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * create a new xinofile at the same place/path as @base_file. + */ +struct file *au_xino_create2(struct file *base_file, struct file *copy_src) +{ + struct file *file; + struct dentry *base, *dentry, *parent; + struct inode *dir; + struct qstr *name; + int err; + + base = base_file->f_dentry; + parent = base->d_parent; /* dir inode is locked */ + dir = parent->d_inode; + IMustLock(dir); + + file = ERR_PTR(-EINVAL); + name = &base->d_name; + dentry = vfsub_lookup_one_len(name->name, parent, name->len); + if (IS_ERR(dentry)) { + file = (void *)dentry; + AuErr("%.*s lookup err %ld\n", AuLNPair(name), PTR_ERR(dentry)); + goto out; + } + + /* no need to mnt_want_write() since we call dentry_open() later */ + err = vfs_create(dir, dentry, S_IRUGO | S_IWUGO, NULL); + if (unlikely(err)) { + file = ERR_PTR(err); + AuErr("%.*s create err %d\n", AuLNPair(name), err); + goto out_dput; + } + + file = dentry_open(dget(dentry), mntget(base_file->f_vfsmnt), + O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE, + current_cred()); + if (IS_ERR(file)) { + AuErr("%.*s open err %ld\n", AuLNPair(name), PTR_ERR(file)); + goto out_dput; + } + + err = vfsub_unlink(dir, &file->f_path, /*force*/0); + if (unlikely(err)) { + AuErr("%.*s unlink err %d\n", AuLNPair(name), err); + goto out_fput; + } + + if (copy_src) { + /* no one can touch copy_src xino */ + err = au_copy_file(file, copy_src, + i_size_read(copy_src->f_dentry->d_inode)); + if (unlikely(err)) { + AuErr("%.*s copy err %d\n", AuLNPair(name), err); + goto out_fput; + } + } + goto out_dput; /* success */ + + out_fput: + fput(file); + file = ERR_PTR(err); + out_dput: + dput(dentry); + out: + return file; +} + +struct au_xino_lock_dir { + struct au_hinode *hdir; + struct dentry *parent; + struct mutex *mtx; +}; + +static void au_xino_lock_dir(struct super_block *sb, struct file *xino, + struct au_xino_lock_dir *ldir) +{ + aufs_bindex_t brid, bindex; + + ldir->hdir = NULL; + bindex = -1; + brid = au_xino_brid(sb); + if (brid >= 0) + bindex = au_br_index(sb, brid); + if (bindex >= 0) { + ldir->hdir = au_hi(sb->s_root->d_inode, bindex); + au_hin_imtx_lock_nested(ldir->hdir, AuLsc_I_PARENT); + } else { + ldir->parent = dget_parent(xino->f_dentry); + ldir->mtx = &ldir->parent->d_inode->i_mutex; + mutex_lock_nested(ldir->mtx, AuLsc_I_PARENT); + } +} + +static void au_xino_unlock_dir(struct au_xino_lock_dir *ldir) +{ + if (ldir->hdir) + au_hin_imtx_unlock(ldir->hdir); + else { + mutex_unlock(ldir->mtx); + dput(ldir->parent); + } +} + +/* ---------------------------------------------------------------------- */ + +/* trucate xino files asynchronously */ + +int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex) +{ + int err; + aufs_bindex_t bi, bend; + struct au_branch *br; + struct file *new_xino, *file; + struct super_block *h_sb; + struct au_xino_lock_dir ldir; + + err = -EINVAL; + bend = au_sbend(sb); + if (unlikely(bindex < 0 || bend < bindex)) + goto out; + br = au_sbr(sb, bindex); + file = br->br_xino.xi_file; + if (!file) + goto out; + + au_xino_lock_dir(sb, file, &ldir); + /* mnt_want_write() is unnecessary here */ + new_xino = au_xino_create2(file, file); + au_xino_unlock_dir(&ldir); + err = PTR_ERR(new_xino); + if (IS_ERR(new_xino)) + goto out; + err = 0; + fput(file); + br->br_xino.xi_file = new_xino; + + h_sb = br->br_mnt->mnt_sb; + for (bi = 0; bi <= bend; bi++) { + if (unlikely(bi == bindex)) + continue; + br = au_sbr(sb, bi); + if (br->br_mnt->mnt_sb != h_sb) + continue; + + fput(br->br_xino.xi_file); + br->br_xino.xi_file = new_xino; + get_file(new_xino); + } + + out: + return err; +} + +struct xino_do_trunc_args { + struct super_block *sb; + struct au_branch *br; +}; + +static void xino_do_trunc(void *_args) +{ + struct xino_do_trunc_args *args = _args; + struct super_block *sb; + struct au_branch *br; + struct inode *dir; + int err; + aufs_bindex_t bindex; + + err = 0; + sb = args->sb; + dir = sb->s_root->d_inode; + br = args->br; + + si_noflush_write_lock(sb); + ii_read_lock_parent(dir); + bindex = au_br_index(sb, br->br_id); + err = au_xino_trunc(sb, bindex); + if (!err + && br->br_xino.xi_file->f_dentry->d_inode->i_blocks + >= br->br_xino_upper) + br->br_xino_upper += AUFS_XINO_TRUNC_STEP; + + ii_read_unlock(dir); + if (unlikely(err)) + AuWarn("err b%d, (%d)\n", bindex, err); + atomic_dec(&br->br_xino_running); + atomic_dec(&br->br_count); + au_nwt_done(&au_sbi(sb)->si_nowait); + si_write_unlock(sb); + kfree(args); +} + +static void xino_try_trunc(struct super_block *sb, struct au_branch *br) +{ + struct xino_do_trunc_args *args; + int wkq_err; + + if (br->br_xino.xi_file->f_dentry->d_inode->i_blocks + < br->br_xino_upper) + return; + + if (atomic_inc_return(&br->br_xino_running) > 1) + goto out; + + /* lock and kfree() will be called in trunc_xino() */ + args = kmalloc(sizeof(*args), GFP_NOFS); + if (unlikely(!args)) { + AuErr1("no memory\n"); + goto out_args; + } + + atomic_inc_return(&br->br_count); + args->sb = sb; + args->br = br; + wkq_err = au_wkq_nowait(xino_do_trunc, args, sb); + if (!wkq_err) + return; /* success */ + + AuErr("wkq %d\n", wkq_err); + atomic_dec_return(&br->br_count); + + out_args: + kfree(args); + out: + atomic_dec_return(&br->br_xino_running); +} + +/* ---------------------------------------------------------------------- */ + +static int au_xino_do_write(au_writef_t write, struct file *file, + ino_t h_ino, ino_t ino) +{ + loff_t pos; + ssize_t sz; + + pos = h_ino; + if (unlikely(au_loff_max / sizeof(ino) - 1 < pos)) { + AuIOErr1("too large hi%lu\n", (unsigned long)h_ino); + return -EFBIG; + } + pos *= sizeof(ino); + sz = xino_fwrite(write, file, &ino, sizeof(ino), &pos); + if (sz == sizeof(ino)) + return 0; /* success */ + + AuIOErr("write failed (%zd)\n", sz); + return -EIO; +} + +/* + * write @ino to the xinofile for the specified branch{@sb, @bindex} + * at the position of @h_ino. + * even if @ino is zero, it is written to the xinofile and means no entry. + * if the size of the xino file on a specific filesystem exceeds the watermark, + * try truncating it. + */ +int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t ino) +{ + int err; + unsigned int mnt_flags; + struct au_branch *br; + + BUILD_BUG_ON(sizeof(long long) != sizeof(au_loff_max) + || ((loff_t)-1) > 0); + SiMustAnyLock(sb); + + mnt_flags = au_mntflags(sb); + if (!au_opt_test(mnt_flags, XINO)) + return 0; + + br = au_sbr(sb, bindex); + err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file, + h_ino, ino); + if (!err) { + if (au_opt_test(mnt_flags, TRUNC_XINO) + && au_test_fs_trunc_xino(br->br_mnt->mnt_sb)) + xino_try_trunc(sb, br); + return 0; /* success */ + } + + AuIOErr("write failed (%d)\n", err); + return -EIO; +} + +/* ---------------------------------------------------------------------- */ + +/* aufs inode number bitmap */ + +static const int page_bits = (int)PAGE_SIZE * BITS_PER_BYTE; +static ino_t xib_calc_ino(unsigned long pindex, int bit) +{ + ino_t ino; + + AuDebugOn(bit < 0 || page_bits <= bit); + ino = AUFS_FIRST_INO + pindex * page_bits + bit; + return ino; +} + +static void xib_calc_bit(ino_t ino, unsigned long *pindex, int *bit) +{ + AuDebugOn(ino < AUFS_FIRST_INO); + ino -= AUFS_FIRST_INO; + *pindex = ino / page_bits; + *bit = ino % page_bits; +} + +static int xib_pindex(struct super_block *sb, unsigned long pindex) +{ + int err; + loff_t pos; + ssize_t sz; + struct au_sbinfo *sbinfo; + struct file *xib; + unsigned long *p; + + sbinfo = au_sbi(sb); + MtxMustLock(&sbinfo->si_xib_mtx); + AuDebugOn(pindex > ULONG_MAX / PAGE_SIZE + || !au_opt_test(sbinfo->si_mntflags, XINO)); + + if (pindex == sbinfo->si_xib_last_pindex) + return 0; + + xib = sbinfo->si_xib; + p = sbinfo->si_xib_buf; + pos = sbinfo->si_xib_last_pindex; + pos *= PAGE_SIZE; + sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos); + if (unlikely(sz != PAGE_SIZE)) + goto out; + + pos = pindex; + pos *= PAGE_SIZE; + if (i_size_read(xib->f_dentry->d_inode) >= pos + PAGE_SIZE) + sz = xino_fread(sbinfo->si_xread, xib, p, PAGE_SIZE, &pos); + else { + memset(p, 0, PAGE_SIZE); + sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos); + } + if (sz == PAGE_SIZE) { + sbinfo->si_xib_last_pindex = pindex; + return 0; /* success */ + } + + out: + AuIOErr1("write failed (%zd)\n", sz); + err = sz; + if (sz >= 0) + err = -EIO; + return err; +} + +/* ---------------------------------------------------------------------- */ + +int au_xino_write0(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t ino) +{ + int err, bit; + unsigned long pindex; + struct au_sbinfo *sbinfo; + + if (!au_opt_test(au_mntflags(sb), XINO)) + return 0; + + err = 0; + if (ino) { + sbinfo = au_sbi(sb); + xib_calc_bit(ino, &pindex, &bit); + AuDebugOn(page_bits <= bit); + mutex_lock(&sbinfo->si_xib_mtx); + err = xib_pindex(sb, pindex); + if (!err) { + clear_bit(bit, sbinfo->si_xib_buf); + sbinfo->si_xib_next_bit = bit; + } + mutex_unlock(&sbinfo->si_xib_mtx); + } + + if (!err) + err = au_xino_write(sb, bindex, h_ino, 0); + return err; +} + +/* get an unused inode number from bitmap */ +ino_t au_xino_new_ino(struct super_block *sb) +{ + ino_t ino; + unsigned long *p, pindex, ul, pend; + struct au_sbinfo *sbinfo; + struct file *file; + int free_bit, err; + + if (!au_opt_test(au_mntflags(sb), XINO)) + return iunique(sb, AUFS_FIRST_INO); + + sbinfo = au_sbi(sb); + mutex_lock(&sbinfo->si_xib_mtx); + p = sbinfo->si_xib_buf; + free_bit = sbinfo->si_xib_next_bit; + if (free_bit < page_bits && !test_bit(free_bit, p)) + goto out; /* success */ + free_bit = find_first_zero_bit(p, page_bits); + if (free_bit < page_bits) + goto out; /* success */ + + pindex = sbinfo->si_xib_last_pindex; + for (ul = pindex - 1; ul < ULONG_MAX; ul--) { + err = xib_pindex(sb, ul); + if (unlikely(err)) + goto out_err; + free_bit = find_first_zero_bit(p, page_bits); + if (free_bit < page_bits) + goto out; /* success */ + } + + file = sbinfo->si_xib; + pend = i_size_read(file->f_dentry->d_inode) / PAGE_SIZE; + for (ul = pindex + 1; ul <= pend; ul++) { + err = xib_pindex(sb, ul); + if (unlikely(err)) + goto out_err; + free_bit = find_first_zero_bit(p, page_bits); + if (free_bit < page_bits) + goto out; /* success */ + } + BUG(); + + out: + set_bit(free_bit, p); + sbinfo->si_xib_next_bit++; + pindex = sbinfo->si_xib_last_pindex; + mutex_unlock(&sbinfo->si_xib_mtx); + ino = xib_calc_ino(pindex, free_bit); + AuDbg("i%lu\n", (unsigned long)ino); + return ino; + out_err: + mutex_unlock(&sbinfo->si_xib_mtx); + AuDbg("i0\n"); + return 0; +} + +/* + * read @ino from xinofile for the specified branch{@sb, @bindex} + * at the position of @h_ino. + * if @ino does not exist and @do_new is true, get new one. + */ +int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t *ino) +{ + int err; + ssize_t sz; + loff_t pos; + struct file *file; + struct au_sbinfo *sbinfo; + + *ino = 0; + if (!au_opt_test(au_mntflags(sb), XINO)) + return 0; /* no xino */ + + err = 0; + sbinfo = au_sbi(sb); + pos = h_ino; + if (unlikely(au_loff_max / sizeof(*ino) - 1 < pos)) { + AuIOErr1("too large hi%lu\n", (unsigned long)h_ino); + return -EFBIG; + } + pos *= sizeof(*ino); + + file = au_sbr(sb, bindex)->br_xino.xi_file; + if (i_size_read(file->f_dentry->d_inode) < pos + sizeof(*ino)) + return 0; /* no ino */ + + sz = xino_fread(sbinfo->si_xread, file, ino, sizeof(*ino), &pos); + if (sz == sizeof(*ino)) + return 0; /* success */ + + err = sz; + if (unlikely(sz >= 0)) { + err = -EIO; + AuIOErr("xino read error (%zd)\n", sz); + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* create and set a new xino file */ + +struct file *au_xino_create(struct super_block *sb, char *fname, int silent) +{ + struct file *file; + struct dentry *h_parent, *d; + struct inode *h_dir; + int err; + + /* + * at mount-time, and the xino file is the default path, + * hinotify is disabled so we have no inotify events to ignore. + * when a user specified the xino, we cannot get au_hdir to be ignored. + */ + file = vfsub_filp_open(fname, O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE, + S_IRUGO | S_IWUGO); + if (IS_ERR(file)) { + if (!silent) + AuErr("open %s(%ld)\n", fname, PTR_ERR(file)); + return file; + } + + /* keep file count */ + h_parent = dget_parent(file->f_dentry); + h_dir = h_parent->d_inode; + mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); + /* mnt_want_write() is unnecessary here */ + err = vfsub_unlink(h_dir, &file->f_path, /*force*/0); + mutex_unlock(&h_dir->i_mutex); + dput(h_parent); + if (unlikely(err)) { + if (!silent) + AuErr("unlink %s(%d)\n", fname, err); + goto out; + } + + err = -EINVAL; + d = file->f_dentry; + if (unlikely(sb == d->d_sb)) { + if (!silent) + AuErr("%s must be outside\n", fname); + goto out; + } + if (unlikely(au_test_fs_bad_xino(d->d_sb))) { + if (!silent) + AuErr("xino doesn't support %s(%s)\n", + fname, au_sbtype(d->d_sb)); + goto out; + } + return file; /* success */ + + out: + fput(file); + file = ERR_PTR(err); + return file; +} + +/* + * find another branch who is on the same filesystem of the specified + * branch{@btgt}. search until @bend. + */ +static int is_sb_shared(struct super_block *sb, aufs_bindex_t btgt, + aufs_bindex_t bend) +{ + aufs_bindex_t bindex; + struct super_block *tgt_sb = au_sbr_sb(sb, btgt); + + for (bindex = 0; bindex < btgt; bindex++) + if (unlikely(tgt_sb == au_sbr_sb(sb, bindex))) + return bindex; + for (bindex++; bindex <= bend; bindex++) + if (unlikely(tgt_sb == au_sbr_sb(sb, bindex))) + return bindex; + return -1; +} + +/* ---------------------------------------------------------------------- */ + +/* + * initialize the xinofile for the specified branch @br + * at the place/path where @base_file indicates. + * test whether another branch is on the same filesystem or not, + * if @do_test is true. + */ +int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t h_ino, + struct file *base_file, int do_test) +{ + int err; + ino_t ino; + aufs_bindex_t bend, bindex; + struct au_branch *shared_br, *b; + struct file *file; + struct super_block *tgt_sb; + + shared_br = NULL; + bend = au_sbend(sb); + if (do_test) { + tgt_sb = br->br_mnt->mnt_sb; + for (bindex = 0; bindex <= bend; bindex++) { + b = au_sbr(sb, bindex); + if (tgt_sb == b->br_mnt->mnt_sb) { + shared_br = b; + break; + } + } + } + + if (!shared_br || !shared_br->br_xino.xi_file) { + struct au_xino_lock_dir ldir; + + au_xino_lock_dir(sb, base_file, &ldir); + /* mnt_want_write() is unnecessary here */ + file = au_xino_create2(base_file, NULL); + au_xino_unlock_dir(&ldir); + err = PTR_ERR(file); + if (IS_ERR(file)) + goto out; + br->br_xino.xi_file = file; + } else { + br->br_xino.xi_file = shared_br->br_xino.xi_file; + get_file(br->br_xino.xi_file); + } + + ino = AUFS_ROOT_INO; + err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file, + h_ino, ino); + if (!err) + return 0; /* success */ + + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* trucate a xino bitmap file */ + +/* todo: slow */ +static int do_xib_restore(struct super_block *sb, struct file *file, void *page) +{ + int err, bit; + ssize_t sz; + unsigned long pindex; + loff_t pos, pend; + struct au_sbinfo *sbinfo; + au_readf_t func; + ino_t *ino; + unsigned long *p; + + err = 0; + sbinfo = au_sbi(sb); + MtxMustLock(&sbinfo->si_xib_mtx); + p = sbinfo->si_xib_buf; + func = sbinfo->si_xread; + pend = i_size_read(file->f_dentry->d_inode); + pos = 0; + while (pos < pend) { + sz = xino_fread(func, file, page, PAGE_SIZE, &pos); + err = sz; + if (unlikely(sz <= 0)) + goto out; + + err = 0; + for (ino = page; sz > 0; ino++, sz -= sizeof(ino)) { + if (unlikely(*ino < AUFS_FIRST_INO)) + continue; + + xib_calc_bit(*ino, &pindex, &bit); + AuDebugOn(page_bits <= bit); + err = xib_pindex(sb, pindex); + if (!err) + set_bit(bit, p); + else + goto out; + } + } + + out: + return err; +} + +static int xib_restore(struct super_block *sb) +{ + int err; + aufs_bindex_t bindex, bend; + void *page; + + err = -ENOMEM; + page = (void *)__get_free_page(GFP_NOFS); + if (unlikely(!page)) + goto out; + + err = 0; + bend = au_sbend(sb); + for (bindex = 0; !err && bindex <= bend; bindex++) + if (!bindex || is_sb_shared(sb, bindex, bindex - 1) < 0) + err = do_xib_restore + (sb, au_sbr(sb, bindex)->br_xino.xi_file, page); + else + AuDbg("b%d\n", bindex); + free_page((unsigned long)page); + + out: + return err; +} + +int au_xib_trunc(struct super_block *sb) +{ + int err; + ssize_t sz; + loff_t pos; + struct au_xino_lock_dir ldir; + struct au_sbinfo *sbinfo; + unsigned long *p; + struct file *file; + + SiMustWriteLock(sb); + + err = 0; + sbinfo = au_sbi(sb); + if (!au_opt_test(sbinfo->si_mntflags, XINO)) + goto out; + + file = sbinfo->si_xib; + if (i_size_read(file->f_dentry->d_inode) <= PAGE_SIZE) + goto out; + + au_xino_lock_dir(sb, file, &ldir); + /* mnt_want_write() is unnecessary here */ + file = au_xino_create2(sbinfo->si_xib, NULL); + au_xino_unlock_dir(&ldir); + err = PTR_ERR(file); + if (IS_ERR(file)) + goto out; + fput(sbinfo->si_xib); + sbinfo->si_xib = file; + + p = sbinfo->si_xib_buf; + memset(p, 0, PAGE_SIZE); + pos = 0; + sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xib, p, PAGE_SIZE, &pos); + if (unlikely(sz != PAGE_SIZE)) { + err = sz; + AuIOErr("err %d\n", err); + if (sz >= 0) + err = -EIO; + goto out; + } + + mutex_lock(&sbinfo->si_xib_mtx); + /* mnt_want_write() is unnecessary here */ + err = xib_restore(sb); + mutex_unlock(&sbinfo->si_xib_mtx); + +out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * xino mount option handlers + */ +static au_readf_t find_readf(struct file *h_file) +{ + const struct file_operations *fop = h_file->f_op; + + if (fop) { + if (fop->read) + return fop->read; + if (fop->aio_read) + return do_sync_read; + } + return ERR_PTR(-ENOSYS); +} + +static au_writef_t find_writef(struct file *h_file) +{ + const struct file_operations *fop = h_file->f_op; + + if (fop) { + if (fop->write) + return fop->write; + if (fop->aio_write) + return do_sync_write; + } + return ERR_PTR(-ENOSYS); +} + +/* xino bitmap */ +static void xino_clear_xib(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + sbinfo->si_xread = NULL; + sbinfo->si_xwrite = NULL; + if (sbinfo->si_xib) + fput(sbinfo->si_xib); + sbinfo->si_xib = NULL; + free_page((unsigned long)sbinfo->si_xib_buf); + sbinfo->si_xib_buf = NULL; +} + +static int au_xino_set_xib(struct super_block *sb, struct file *base) +{ + int err; + loff_t pos; + struct au_sbinfo *sbinfo; + struct file *file; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + file = au_xino_create2(base, sbinfo->si_xib); + err = PTR_ERR(file); + if (IS_ERR(file)) + goto out; + if (sbinfo->si_xib) + fput(sbinfo->si_xib); + sbinfo->si_xib = file; + sbinfo->si_xread = find_readf(file); + sbinfo->si_xwrite = find_writef(file); + + err = -ENOMEM; + if (!sbinfo->si_xib_buf) + sbinfo->si_xib_buf = (void *)get_zeroed_page(GFP_NOFS); + if (unlikely(!sbinfo->si_xib_buf)) + goto out_unset; + + sbinfo->si_xib_last_pindex = 0; + sbinfo->si_xib_next_bit = 0; + if (i_size_read(file->f_dentry->d_inode) < PAGE_SIZE) { + pos = 0; + err = xino_fwrite(sbinfo->si_xwrite, file, sbinfo->si_xib_buf, + PAGE_SIZE, &pos); + if (unlikely(err != PAGE_SIZE)) + goto out_free; + } + err = 0; + goto out; /* success */ + + out_free: + free_page((unsigned long)sbinfo->si_xib_buf); + sbinfo->si_xib_buf = NULL; + if (err >= 0) + err = -EIO; + out_unset: + fput(sbinfo->si_xib); + sbinfo->si_xib = NULL; + sbinfo->si_xread = NULL; + sbinfo->si_xwrite = NULL; + out: + return err; +} + +/* xino for each branch */ +static void xino_clear_br(struct super_block *sb) +{ + aufs_bindex_t bindex, bend; + struct au_branch *br; + + bend = au_sbend(sb); + for (bindex = 0; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + if (!br || !br->br_xino.xi_file) + continue; + + fput(br->br_xino.xi_file); + br->br_xino.xi_file = NULL; + } +} + +static int au_xino_set_br(struct super_block *sb, struct file *base) +{ + int err; + ino_t ino; + aufs_bindex_t bindex, bend, bshared; + struct { + struct file *old, *new; + } *fpair, *p; + struct au_branch *br; + struct inode *inode; + au_writef_t writef; + + SiMustWriteLock(sb); + + err = -ENOMEM; + bend = au_sbend(sb); + fpair = kcalloc(bend + 1, sizeof(*fpair), GFP_NOFS); + if (unlikely(!fpair)) + goto out; + + inode = sb->s_root->d_inode; + ino = AUFS_ROOT_INO; + writef = au_sbi(sb)->si_xwrite; + for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) { + br = au_sbr(sb, bindex); + bshared = is_sb_shared(sb, bindex, bindex - 1); + if (bshared >= 0) { + /* shared xino */ + *p = fpair[bshared]; + get_file(p->new); + } + + if (!p->new) { + /* new xino */ + p->old = br->br_xino.xi_file; + p->new = au_xino_create2(base, br->br_xino.xi_file); + err = PTR_ERR(p->new); + if (IS_ERR(p->new)) { + p->new = NULL; + goto out_pair; + } + } + + err = au_xino_do_write(writef, p->new, + au_h_iptr(inode, bindex)->i_ino, ino); + if (unlikely(err)) + goto out_pair; + } + + for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) { + br = au_sbr(sb, bindex); + if (br->br_xino.xi_file) + fput(br->br_xino.xi_file); + get_file(p->new); + br->br_xino.xi_file = p->new; + } + + out_pair: + for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) + if (p->new) + fput(p->new); + else + break; + kfree(fpair); + out: + return err; +} + +void au_xino_clr(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + + au_xigen_clr(sb); + xino_clear_xib(sb); + xino_clear_br(sb); + sbinfo = au_sbi(sb); + /* lvalue, do not call au_mntflags() */ + au_opt_clr(sbinfo->si_mntflags, XINO); +} + +int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount) +{ + int err, skip; + struct dentry *parent, *cur_parent; + struct qstr *dname, *cur_name; + struct file *cur_xino; + struct inode *dir; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + err = 0; + sbinfo = au_sbi(sb); + parent = dget_parent(xino->file->f_dentry); + if (remount) { + skip = 0; + dname = &xino->file->f_dentry->d_name; + cur_xino = sbinfo->si_xib; + if (cur_xino) { + cur_parent = dget_parent(cur_xino->f_dentry); + cur_name = &cur_xino->f_dentry->d_name; + skip = (cur_parent == parent + && dname->len == cur_name->len + && !memcmp(dname->name, cur_name->name, + dname->len)); + dput(cur_parent); + } + if (skip) + goto out; + } + + au_opt_set(sbinfo->si_mntflags, XINO); + dir = parent->d_inode; + mutex_lock_nested(&dir->i_mutex, AuLsc_I_PARENT); + /* mnt_want_write() is unnecessary here */ + err = au_xino_set_xib(sb, xino->file); + if (!err) + err = au_xigen_set(sb, xino->file); + if (!err) + err = au_xino_set_br(sb, xino->file); + mutex_unlock(&dir->i_mutex); + if (!err) + goto out; /* success */ + + /* reset all */ + AuIOErr("failed creating xino(%d).\n", err); + + out: + dput(parent); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * create a xinofile at the default place/path. + */ +struct file *au_xino_def(struct super_block *sb) +{ + struct file *file; + char *page, *p; + struct au_branch *br; + struct super_block *h_sb; + struct path path; + aufs_bindex_t bend, bindex, bwr; + + br = NULL; + bend = au_sbend(sb); + bwr = -1; + for (bindex = 0; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + if (au_br_writable(br->br_perm) + && !au_test_fs_bad_xino(br->br_mnt->mnt_sb)) { + bwr = bindex; + break; + } + } + + if (bwr >= 0) { + file = ERR_PTR(-ENOMEM); + page = __getname(); + if (unlikely(!page)) + goto out; + path.mnt = br->br_mnt; + path.dentry = au_h_dptr(sb->s_root, bwr); + p = d_path(&path, page, PATH_MAX - sizeof(AUFS_XINO_FNAME)); + file = (void *)p; + if (!IS_ERR(p)) { + strcat(p, "/" AUFS_XINO_FNAME); + AuDbg("%s\n", p); + file = au_xino_create(sb, p, /*silent*/0); + if (!IS_ERR(file)) + au_xino_brid_set(sb, br->br_id); + } + __putname(page); + } else { + file = au_xino_create(sb, AUFS_XINO_DEFPATH, /*silent*/0); + if (IS_ERR(file)) + goto out; + h_sb = file->f_dentry->d_sb; + if (unlikely(au_test_fs_bad_xino(h_sb))) { + AuErr("xino doesn't support %s(%s)\n", + AUFS_XINO_DEFPATH, au_sbtype(h_sb)); + fput(file); + file = ERR_PTR(-EINVAL); + } + if (!IS_ERR(file)) + au_xino_brid_set(sb, -1); + } + + out: + return file; +} + +/* ---------------------------------------------------------------------- */ + +int au_xino_path(struct seq_file *seq, struct file *file) +{ + int err; + + err = au_seq_path(seq, &file->f_path); + if (unlikely(err < 0)) + goto out; + + err = 0; +#define Deleted "\\040(deleted)" + seq->count -= sizeof(Deleted) - 1; + AuDebugOn(memcmp(seq->buf + seq->count, Deleted, + sizeof(Deleted) - 1)); +#undef Deleted + + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/inode.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/inode.c @@ -0,0 +1,380 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode functions + */ + +#include "aufs.h" + +struct inode *au_igrab(struct inode *inode) +{ + if (inode) { + AuDebugOn(!atomic_read(&inode->i_count)); + atomic_inc_return(&inode->i_count); + } + return inode; +} + +static void au_refresh_hinode_attr(struct inode *inode, int do_version) +{ + au_cpup_attr_all(inode, /*force*/0); + au_update_iigen(inode); + if (do_version) + inode->i_version++; +} + +int au_refresh_hinode_self(struct inode *inode, int do_attr) +{ + int err; + aufs_bindex_t bindex, new_bindex; + unsigned char update; + struct inode *first; + struct au_hinode *p, *q, tmp; + struct super_block *sb; + struct au_iinfo *iinfo; + + IiMustWriteLock(inode); + + update = 0; + sb = inode->i_sb; + iinfo = au_ii(inode); + err = au_ii_realloc(iinfo, au_sbend(sb) + 1); + if (unlikely(err)) + goto out; + + p = iinfo->ii_hinode + iinfo->ii_bstart; + first = p->hi_inode; + err = 0; + for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; + bindex++, p++) { + if (!p->hi_inode) + continue; + + new_bindex = au_br_index(sb, p->hi_id); + if (new_bindex == bindex) + continue; + + if (new_bindex < 0) { + update++; + au_hiput(p); + p->hi_inode = NULL; + continue; + } + + if (new_bindex < iinfo->ii_bstart) + iinfo->ii_bstart = new_bindex; + if (iinfo->ii_bend < new_bindex) + iinfo->ii_bend = new_bindex; + /* swap two lower inode, and loop again */ + q = iinfo->ii_hinode + new_bindex; + tmp = *q; + *q = *p; + *p = tmp; + if (tmp.hi_inode) { + bindex--; + p--; + } + } + au_update_brange(inode, /*do_put_zero*/0); + if (do_attr) + au_refresh_hinode_attr(inode, update && S_ISDIR(inode->i_mode)); + + out: + return err; +} + +int au_refresh_hinode(struct inode *inode, struct dentry *dentry) +{ + int err, update; + unsigned int flags; + aufs_bindex_t bindex, bend; + unsigned char isdir; + struct inode *first; + struct au_hinode *p; + struct au_iinfo *iinfo; + + err = au_refresh_hinode_self(inode, /*do_attr*/0); + if (unlikely(err)) + goto out; + + update = 0; + iinfo = au_ii(inode); + p = iinfo->ii_hinode + iinfo->ii_bstart; + first = p->hi_inode; + isdir = S_ISDIR(inode->i_mode); + flags = au_hi_flags(inode, isdir); + bend = au_dbend(dentry); + for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) { + struct inode *h_i; + struct dentry *h_d; + + h_d = au_h_dptr(dentry, bindex); + if (!h_d || !h_d->d_inode) + continue; + + if (iinfo->ii_bstart <= bindex && bindex <= iinfo->ii_bend) { + h_i = au_h_iptr(inode, bindex); + if (h_i) { + if (h_i == h_d->d_inode) + continue; + err = -EIO; + break; + } + } + if (bindex < iinfo->ii_bstart) + iinfo->ii_bstart = bindex; + if (iinfo->ii_bend < bindex) + iinfo->ii_bend = bindex; + au_set_h_iptr(inode, bindex, au_igrab(h_d->d_inode), flags); + update = 1; + } + au_update_brange(inode, /*do_put_zero*/0); + + if (unlikely(err)) + goto out; + + au_refresh_hinode_attr(inode, update && isdir); + + out: + return err; +} + +static int set_inode(struct inode *inode, struct dentry *dentry) +{ + int err; + unsigned int flags; + umode_t mode; + aufs_bindex_t bindex, bstart, btail; + unsigned char isdir; + struct dentry *h_dentry; + struct inode *h_inode; + struct au_iinfo *iinfo; + + IiMustWriteLock(inode); + + err = 0; + isdir = 0; + bstart = au_dbstart(dentry); + h_inode = au_h_dptr(dentry, bstart)->d_inode; + mode = h_inode->i_mode; + switch (mode & S_IFMT) { + case S_IFREG: + btail = au_dbtail(dentry); + inode->i_op = &aufs_iop; + inode->i_fop = &aufs_file_fop; + inode->i_mapping->a_ops = &aufs_aop; + break; + case S_IFDIR: + isdir = 1; + btail = au_dbtaildir(dentry); + inode->i_op = &aufs_dir_iop; + inode->i_fop = &aufs_dir_fop; + break; + case S_IFLNK: + btail = au_dbtail(dentry); + inode->i_op = &aufs_symlink_iop; + break; + case S_IFBLK: + case S_IFCHR: + case S_IFIFO: + case S_IFSOCK: + btail = au_dbtail(dentry); + inode->i_op = &aufs_iop; + init_special_inode(inode, mode, h_inode->i_rdev); + break; + default: + AuIOErr("Unknown file type 0%o\n", mode); + err = -EIO; + goto out; + } + + /* do not set inotify for whiteouted dirs (SHWH mode) */ + flags = au_hi_flags(inode, isdir); + if (au_opt_test(au_mntflags(dentry->d_sb), SHWH) + && au_ftest_hi(flags, HINOTIFY) + && dentry->d_name.len > AUFS_WH_PFX_LEN + && !memcmp(dentry->d_name.name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) + au_fclr_hi(flags, HINOTIFY); + iinfo = au_ii(inode); + iinfo->ii_bstart = bstart; + iinfo->ii_bend = btail; + for (bindex = bstart; bindex <= btail; bindex++) { + h_dentry = au_h_dptr(dentry, bindex); + if (h_dentry) + au_set_h_iptr(inode, bindex, + au_igrab(h_dentry->d_inode), flags); + } + au_cpup_attr_all(inode, /*force*/1); + + out: + return err; +} + +/* successful returns with iinfo write_locked */ +static int reval_inode(struct inode *inode, struct dentry *dentry, int *matched) +{ + int err; + aufs_bindex_t bindex, bend; + struct inode *h_inode, *h_dinode; + + *matched = 0; + + /* + * before this function, if aufs got any iinfo lock, it must be only + * one, the parent dir. + * it can happen by UDBA and the obsoleted inode number. + */ + err = -EIO; + if (unlikely(inode->i_ino == parent_ino(dentry))) + goto out; + + err = 0; + ii_write_lock_new_child(inode); + h_dinode = au_h_dptr(dentry, au_dbstart(dentry))->d_inode; + bend = au_ibend(inode); + for (bindex = au_ibstart(inode); bindex <= bend; bindex++) { + h_inode = au_h_iptr(inode, bindex); + if (h_inode && h_inode == h_dinode) { + *matched = 1; + err = 0; + if (au_iigen(inode) != au_digen(dentry)) + err = au_refresh_hinode(inode, dentry); + break; + } + } + + if (unlikely(err)) + ii_write_unlock(inode); + out: + return err; +} + +/* successful returns with iinfo write_locked */ +/* todo: return with unlocked? */ +struct inode *au_new_inode(struct dentry *dentry, int must_new) +{ + struct inode *inode; + struct dentry *h_dentry; + struct super_block *sb; + ino_t h_ino, ino; + int err, match; + aufs_bindex_t bstart; + + sb = dentry->d_sb; + bstart = au_dbstart(dentry); + h_dentry = au_h_dptr(dentry, bstart); + h_ino = h_dentry->d_inode->i_ino; + err = au_xino_read(sb, bstart, h_ino, &ino); + inode = ERR_PTR(err); + if (unlikely(err)) + goto out; + new_ino: + if (!ino) { + ino = au_xino_new_ino(sb); + if (unlikely(!ino)) { + inode = ERR_PTR(-EIO); + goto out; + } + } + + AuDbg("i%lu\n", (unsigned long)ino); + inode = au_iget_locked(sb, ino); + err = PTR_ERR(inode); + if (IS_ERR(inode)) + goto out; + + AuDbg("%lx, new %d\n", inode->i_state, !!(inode->i_state & I_NEW)); + if (inode->i_state & I_NEW) { + ii_write_lock_new_child(inode); + err = set_inode(inode, dentry); + unlock_new_inode(inode); + if (!err) + goto out; /* success */ + + iget_failed(inode); + ii_write_unlock(inode); + goto out_iput; + } else if (!must_new) { + err = reval_inode(inode, dentry, &match); + if (!err) + goto out; /* success */ + else if (match) + goto out_iput; + } + + if (unlikely(au_test_fs_unique_ino(h_dentry->d_inode))) + AuWarn1("Warning: Un-notified UDBA or repeatedly renamed dir," + " b%d, %s, %.*s, hi%lu, i%lu.\n", + bstart, au_sbtype(h_dentry->d_sb), AuDLNPair(dentry), + (unsigned long)h_ino, (unsigned long)ino); + ino = 0; + err = au_xino_write(sb, bstart, h_ino, /*ino*/0); + if (!err) { + iput(inode); + goto new_ino; + } + + out_iput: + iput(inode); + inode = ERR_PTR(err); + out: + return inode; +} + +/* ---------------------------------------------------------------------- */ + +int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, + struct inode *inode) +{ + int err; + + err = au_br_rdonly(au_sbr(sb, bindex)); + + /* pseudo-link after flushed may happen out of bounds */ + if (!err + && inode + && au_ibstart(inode) <= bindex + && bindex <= au_ibend(inode)) { + /* + * permission check is unnecessary since vfsub routine + * will be called later + */ + struct inode *hi = au_h_iptr(inode, bindex); + if (hi) + err = IS_IMMUTABLE(hi) ? -EROFS : 0; + } + + return err; +} + +int au_test_h_perm(struct inode *h_inode, int mask) +{ + if (!current_fsuid()) + return 0; + return inode_permission(h_inode, mask); +} + +int au_test_h_perm_sio(struct inode *h_inode, int mask) +{ + if (au_test_nfs(h_inode->i_sb) + && (mask & MAY_WRITE) + && S_ISDIR(h_inode->i_mode)) + mask |= MAY_READ; /* force permission check */ + return au_test_h_perm(h_inode, mask); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/super.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/super.h @@ -0,0 +1,384 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * super_block operations + */ + +#ifndef __AUFS_SUPER_H__ +#define __AUFS_SUPER_H__ + +#ifdef __KERNEL__ + +#include +#include +#include "rwsem.h" +#include "spl.h" +#include "wkq.h" + +typedef ssize_t (*au_readf_t)(struct file *, char __user *, size_t, loff_t *); +typedef ssize_t (*au_writef_t)(struct file *, const char __user *, size_t, + loff_t *); + +/* policies to select one among multiple writable branches */ +struct au_wbr_copyup_operations { + int (*copyup)(struct dentry *dentry); +}; + +struct au_wbr_create_operations { + int (*create)(struct dentry *dentry, int isdir); + int (*init)(struct super_block *sb); + int (*fin)(struct super_block *sb); +}; + +struct au_wbr_mfs { + struct mutex mfs_lock; /* protect this structure */ + unsigned long mfs_jiffy; + unsigned long mfs_expire; + aufs_bindex_t mfs_bindex; + + unsigned long long mfsrr_bytes; + unsigned long long mfsrr_watermark; +}; + +struct au_branch; +struct au_sbinfo { + /* nowait tasks in the system-wide workqueue */ + struct au_nowait_tasks si_nowait; + + struct au_rwsem si_rwsem; + + /* branch management */ + unsigned int si_generation; + + /* see above flags */ + unsigned char au_si_status; + + aufs_bindex_t si_bend; + aufs_bindex_t si_last_br_id; + struct au_branch **si_branch; + + /* policy to select a writable branch */ + unsigned char si_wbr_copyup; + unsigned char si_wbr_create; + struct au_wbr_copyup_operations *si_wbr_copyup_ops; + struct au_wbr_create_operations *si_wbr_create_ops; + + /* round robin */ + atomic_t si_wbr_rr_next; + + /* most free space */ + struct au_wbr_mfs si_wbr_mfs; + + /* mount flags */ + /* include/asm-ia64/siginfo.h defines a macro named si_flags */ + unsigned int si_mntflags; + + /* external inode number (bitmap and translation table) */ + au_readf_t si_xread; + au_writef_t si_xwrite; + struct file *si_xib; + struct mutex si_xib_mtx; /* protect xib members */ + unsigned long *si_xib_buf; + unsigned long si_xib_last_pindex; + int si_xib_next_bit; + aufs_bindex_t si_xino_brid; + /* reserved for future use */ + /* unsigned long long si_xib_limit; */ /* Max xib file size */ + +#ifdef CONFIG_AUFS_EXPORT + /* i_generation */ + struct file *si_xigen; + atomic_t si_xigen_next; +#endif + + /* vdir parameters */ + unsigned long si_rdcache; /* max cache time in HZ */ + unsigned int si_rdblk; /* deblk size */ + unsigned int si_rdhash; /* hash size */ + + /* + * If the number of whiteouts are larger than si_dirwh, leave all of + * them after au_whtmp_ren to reduce the cost of rmdir(2). + * future fsck.aufs or kernel thread will remove them later. + * Otherwise, remove all whiteouts and the dir in rmdir(2). + */ + unsigned int si_dirwh; + + /* + * rename(2) a directory with all children. + */ + /* reserved for future use */ + /* int si_rendir; */ + + /* pseudo_link list */ + struct au_splhead si_plink; + wait_queue_head_t si_plink_wq; + + /* + * sysfs and lifetime management. + * this is not a small structure and it may be a waste of memory in case + * of sysfs is disabled, particulary when many aufs-es are mounted. + * but using sysfs is majority. + */ + struct kobject si_kobj; +#ifdef CONFIG_DEBUG_FS + struct dentry *si_dbgaufs, *si_dbgaufs_xib; +#ifdef CONFIG_AUFS_EXPORT + struct dentry *si_dbgaufs_xigen; +#endif +#endif + + /* dirty, necessary for unmounting, sysfs and sysrq */ + struct super_block *si_sb; +}; + +/* sbinfo status flags */ +/* + * set true when refresh_dirs() failed at remount time. + * then try refreshing dirs at access time again. + * if it is false, refreshing dirs at access time is unnecesary + */ +#define AuSi_FAILED_REFRESH_DIRS 1 +#define AuSi_MAINTAIN_PLINK (1 << 1) /* ioctl */ +static inline unsigned char au_do_ftest_si(struct au_sbinfo *sbi, + unsigned int flag) +{ + AuRwMustAnyLock(&sbi->si_rwsem); + return sbi->au_si_status & flag; +} +#define au_ftest_si(sbinfo, name) au_do_ftest_si(sbinfo, AuSi_##name) +#define au_fset_si(sbinfo, name) do { \ + AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ + (sbinfo)->au_si_status |= AuSi_##name; \ +} while (0) +#define au_fclr_si(sbinfo, name) do { \ + AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ + (sbinfo)->au_si_status &= ~AuSi_##name; \ +} while (0) + +/* ---------------------------------------------------------------------- */ + +/* policy to select one among writable branches */ +#define AuWbrCopyup(sbinfo, args...) \ + ((sbinfo)->si_wbr_copyup_ops->copyup(args)) +#define AuWbrCreate(sbinfo, args...) \ + ((sbinfo)->si_wbr_create_ops->create(args)) + +/* flags for si_read_lock()/aufs_read_lock()/di_read_lock() */ +#define AuLock_DW 1 /* write-lock dentry */ +#define AuLock_IR (1 << 1) /* read-lock inode */ +#define AuLock_IW (1 << 2) /* write-lock inode */ +#define AuLock_FLUSH (1 << 3) /* wait for 'nowait' tasks */ +#define AuLock_DIR (1 << 4) /* target is a dir */ +#define au_ftest_lock(flags, name) ((flags) & AuLock_##name) +#define au_fset_lock(flags, name) { (flags) |= AuLock_##name; } +#define au_fclr_lock(flags, name) { (flags) &= ~AuLock_##name; } + +/* ---------------------------------------------------------------------- */ + +/* super.c */ +extern struct file_system_type aufs_fs_type; +struct inode *au_iget_locked(struct super_block *sb, ino_t ino); + +/* sbinfo.c */ +void au_si_free(struct kobject *kobj); +int au_si_alloc(struct super_block *sb); +int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr); + +unsigned int au_sigen_inc(struct super_block *sb); +aufs_bindex_t au_new_br_id(struct super_block *sb); + +void aufs_read_lock(struct dentry *dentry, int flags); +void aufs_read_unlock(struct dentry *dentry, int flags); +void aufs_write_lock(struct dentry *dentry); +void aufs_write_unlock(struct dentry *dentry); +void aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int isdir); +void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2); + +/* wbr_policy.c */ +extern struct au_wbr_copyup_operations au_wbr_copyup_ops[]; +extern struct au_wbr_create_operations au_wbr_create_ops[]; +int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst); + +/* ---------------------------------------------------------------------- */ + +static inline struct au_sbinfo *au_sbi(struct super_block *sb) +{ + return sb->s_fs_info; +} + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_EXPORT +void au_export_init(struct super_block *sb); + +static inline int au_test_nfsd(struct task_struct *tsk) +{ + return !tsk->mm && !strcmp(tsk->comm, "nfsd"); +} + +int au_xigen_inc(struct inode *inode); +int au_xigen_new(struct inode *inode); +int au_xigen_set(struct super_block *sb, struct file *base); +void au_xigen_clr(struct super_block *sb); + +static inline int au_busy_or_stale(void) +{ + if (!au_test_nfsd(current)) + return -EBUSY; + return -ESTALE; +} +#else +static inline void au_export_init(struct super_block *sb) +{ + /* nothing */ +} + +static inline int au_test_nfsd(struct task_struct *tsk) +{ + return 0; +} + +static inline int au_xigen_inc(struct inode *inode) +{ + return 0; +} + +static inline int au_xigen_new(struct inode *inode) +{ + return 0; +} + +static inline int au_xigen_set(struct super_block *sb, struct file *base) +{ + return 0; +} + +static inline void au_xigen_clr(struct super_block *sb) +{ + /* empty */ +} + +static inline int au_busy_or_stale(void) +{ + return -EBUSY; +} +#endif /* CONFIG_AUFS_EXPORT */ + +/* ---------------------------------------------------------------------- */ + +static inline void dbgaufs_si_null(struct au_sbinfo *sbinfo) +{ + /* + * This function is a dynamic '__init' fucntion actually, + * so the tiny check for si_rwsem is unnecessary. + */ + /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ +#ifdef CONFIG_DEBUG_FS + sbinfo->si_dbgaufs = NULL; + sbinfo->si_dbgaufs_xib = NULL; +#ifdef CONFIG_AUFS_EXPORT + sbinfo->si_dbgaufs_xigen = NULL; +#endif +#endif +} + +/* ---------------------------------------------------------------------- */ + +/* lock superblock. mainly for entry point functions */ +/* + * si_noflush_read_lock, si_noflush_write_lock, + * si_read_unlock, si_write_unlock, si_downgrade_lock + */ +AuSimpleLockRwsemFuncs(si_noflush, struct super_block *sb, + &au_sbi(sb)->si_rwsem); +AuSimpleUnlockRwsemFuncs(si, struct super_block *sb, &au_sbi(sb)->si_rwsem); + +#define SiMustNoWaiters(sb) AuRwMustNoWaiters(&au_sbi(sb)->si_rwsem) +#define SiMustAnyLock(sb) AuRwMustAnyLock(&au_sbi(sb)->si_rwsem) +#define SiMustWriteLock(sb) AuRwMustWriteLock(&au_sbi(sb)->si_rwsem) + +static inline void si_read_lock(struct super_block *sb, int flags) +{ + if (au_ftest_lock(flags, FLUSH)) + au_nwt_flush(&au_sbi(sb)->si_nowait); + si_noflush_read_lock(sb); +} + +static inline void si_write_lock(struct super_block *sb) +{ + au_nwt_flush(&au_sbi(sb)->si_nowait); + si_noflush_write_lock(sb); +} + +static inline int si_read_trylock(struct super_block *sb, int flags) +{ + if (au_ftest_lock(flags, FLUSH)) + au_nwt_flush(&au_sbi(sb)->si_nowait); + return si_noflush_read_trylock(sb); +} + +static inline int si_write_trylock(struct super_block *sb, int flags) +{ + if (au_ftest_lock(flags, FLUSH)) + au_nwt_flush(&au_sbi(sb)->si_nowait); + return si_noflush_write_trylock(sb); +} + +/* ---------------------------------------------------------------------- */ + +static inline aufs_bindex_t au_sbend(struct super_block *sb) +{ + SiMustAnyLock(sb); + return au_sbi(sb)->si_bend; +} + +static inline unsigned int au_mntflags(struct super_block *sb) +{ + SiMustAnyLock(sb); + return au_sbi(sb)->si_mntflags; +} + +static inline unsigned int au_sigen(struct super_block *sb) +{ + SiMustAnyLock(sb); + return au_sbi(sb)->si_generation; +} + +static inline struct au_branch *au_sbr(struct super_block *sb, + aufs_bindex_t bindex) +{ + SiMustAnyLock(sb); + return au_sbi(sb)->si_branch[0 + bindex]; +} + +static inline void au_xino_brid_set(struct super_block *sb, aufs_bindex_t brid) +{ + SiMustWriteLock(sb); + au_sbi(sb)->si_xino_brid = brid; +} + +static inline aufs_bindex_t au_xino_brid(struct super_block *sb) +{ + SiMustAnyLock(sb); + return au_sbi(sb)->si_xino_brid; +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_SUPER_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/branch.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/branch.h @@ -0,0 +1,219 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * branch filesystems and xino for them + */ + +#ifndef __AUFS_BRANCH_H__ +#define __AUFS_BRANCH_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include "rwsem.h" +#include "super.h" + +/* ---------------------------------------------------------------------- */ + +/* a xino file */ +struct au_xino_file { + struct file *xi_file; + struct mutex xi_nondir_mtx; + + /* todo: make xino files an array to support huge inode number */ + +#ifdef CONFIG_DEBUG_FS + struct dentry *xi_dbgaufs; +#endif +}; + +/* members for writable branch only */ +enum {AuBrWh_BASE, AuBrWh_PLINK, AuBrWh_ORPH, AuBrWh_Last}; +struct au_wbr { + struct au_rwsem wbr_wh_rwsem; + struct dentry *wbr_wh[AuBrWh_Last]; + atomic_t wbr_wh_running; +#define wbr_whbase wbr_wh[AuBrWh_BASE] /* whiteout base */ +#define wbr_plink wbr_wh[AuBrWh_PLINK] /* pseudo-link dir */ +#define wbr_orph wbr_wh[AuBrWh_ORPH] /* dir for orphans */ + + /* mfs mode */ + unsigned long long wbr_bytes; +}; + +/* protected by superblock rwsem */ +struct au_branch { + struct au_xino_file br_xino; + + aufs_bindex_t br_id; + + int br_perm; + struct vfsmount *br_mnt; + atomic_t br_count; + + struct au_wbr *br_wbr; + + /* xino truncation */ + blkcnt_t br_xino_upper; /* watermark in blocks */ + atomic_t br_xino_running; + +#ifdef CONFIG_SYSFS + /* an entry under sysfs per mount-point */ + char br_name[8]; + struct attribute br_attr; +#endif +}; + +/* ---------------------------------------------------------------------- */ + +/* branch permission and attribute */ +enum { + AuBrPerm_RW, /* writable, linkable wh */ + AuBrPerm_RO, /* readonly, no wh */ + AuBrPerm_RR, /* natively readonly, no wh */ + + AuBrPerm_RWNoLinkWH, /* un-linkable whiteouts */ + + AuBrPerm_ROWH, /* whiteout-able */ + AuBrPerm_RRWH, /* whiteout-able */ + + AuBrPerm_Last +}; + +static inline int au_br_writable(int brperm) +{ + return brperm == AuBrPerm_RW || brperm == AuBrPerm_RWNoLinkWH; +} + +static inline int au_br_whable(int brperm) +{ + return brperm == AuBrPerm_RW + || brperm == AuBrPerm_ROWH + || brperm == AuBrPerm_RRWH; +} + +static inline int au_br_rdonly(struct au_branch *br) +{ + return ((br->br_mnt->mnt_sb->s_flags & MS_RDONLY) + || !au_br_writable(br->br_perm)) + ? -EROFS : 0; +} + +static inline int au_br_hinotifyable(int brperm __maybe_unused) +{ +#ifdef CONFIG_AUFS_HINOTIFY + return brperm != AuBrPerm_RR && brperm != AuBrPerm_RRWH; +#else + return 0; +#endif +} + +/* ---------------------------------------------------------------------- */ + +/* branch.c */ +struct au_sbinfo; +void au_br_free(struct au_sbinfo *sinfo); +int au_br_index(struct super_block *sb, aufs_bindex_t br_id); +struct au_opt_add; +int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount); +struct au_opt_del; +int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount); +struct au_opt_mod; +int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, + int *do_update); + +/* xino.c */ +static const loff_t au_loff_max = LLONG_MAX; + +int au_xib_trunc(struct super_block *sb); +ssize_t xino_fread(au_readf_t func, struct file *file, void *buf, size_t size, + loff_t *pos); +ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size, + loff_t *pos); +struct file *au_xino_create2(struct file *base_file, struct file *copy_src); +struct file *au_xino_create(struct super_block *sb, char *fname, int silent); +ino_t au_xino_new_ino(struct super_block *sb); +int au_xino_write0(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t ino); +int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t ino); +int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + ino_t *ino); +int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t hino, + struct file *base_file, int do_test); +int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex); + +struct au_opt_xino; +int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount); +void au_xino_clr(struct super_block *sb); +struct file *au_xino_def(struct super_block *sb); +int au_xino_path(struct seq_file *seq, struct file *file); + +/* ---------------------------------------------------------------------- */ + +/* Superblock to branch */ +static inline +aufs_bindex_t au_sbr_id(struct super_block *sb, aufs_bindex_t bindex) +{ + return au_sbr(sb, bindex)->br_id; +} + +static inline +struct vfsmount *au_sbr_mnt(struct super_block *sb, aufs_bindex_t bindex) +{ + return au_sbr(sb, bindex)->br_mnt; +} + +static inline +struct super_block *au_sbr_sb(struct super_block *sb, aufs_bindex_t bindex) +{ + return au_sbr_mnt(sb, bindex)->mnt_sb; +} + +static inline void au_sbr_put(struct super_block *sb, aufs_bindex_t bindex) +{ + atomic_dec_return(&au_sbr(sb, bindex)->br_count); +} + +static inline int au_sbr_perm(struct super_block *sb, aufs_bindex_t bindex) +{ + return au_sbr(sb, bindex)->br_perm; +} + +static inline int au_sbr_whable(struct super_block *sb, aufs_bindex_t bindex) +{ + return au_br_whable(au_sbr_perm(sb, bindex)); +} + +/* ---------------------------------------------------------------------- */ + +/* + * wbr_wh_read_lock, wbr_wh_write_lock + * wbr_wh_read_unlock, wbr_wh_write_unlock, wbr_wh_downgrade_lock + */ +AuSimpleRwsemFuncs(wbr_wh, struct au_wbr *wbr, &wbr->wbr_wh_rwsem); + +#define WbrWhMustNoWaiters(wbr) AuRwMustNoWaiters(&wbr->wbr_wh_rwsem) +#define WbrWhMustAnyLock(wbr) AuRwMustAnyLock(&wbr->wbr_wh_rwsem) +#define WbrWhMustWriteLock(wbr) AuRwMustWriteLock(&wbr->wbr_wh_rwsem) + +#endif /* __KERNEL__ */ +#endif /* __AUFS_BRANCH_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/file.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/file.h @@ -0,0 +1,175 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * file operations + */ + +#ifndef __AUFS_FILE_H__ +#define __AUFS_FILE_H__ + +#ifdef __KERNEL__ + +#include +#include +#include +#include "rwsem.h" + +struct au_branch; +struct au_hfile { + struct file *hf_file; + struct au_branch *hf_br; +}; + +struct au_vdir; +struct au_finfo { + atomic_t fi_generation; + + struct au_rwsem fi_rwsem; + struct au_hfile *fi_hfile; + aufs_bindex_t fi_bstart, fi_bend; + + union { + /* non-dir only */ + struct { + struct vm_operations_struct *fi_h_vm_ops; + struct vm_operations_struct *fi_vm_ops; + }; + + /* dir only */ + struct { + struct au_vdir *fi_vdir_cache; + int fi_maintain_plink; + }; + }; +}; + +/* ---------------------------------------------------------------------- */ + +/* file.c */ +extern struct address_space_operations aufs_aop; +void au_store_oflag(struct nameidata *nd, struct inode *inode); +unsigned int au_file_roflags(unsigned int flags); +struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, + struct file *file); +int au_do_open(struct file *file, int (*open)(struct file *file, int flags)); +int au_reopen_nondir(struct file *file); +struct au_pin; +int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin); +int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), + int wlock); + +/* poll.c */ +#ifdef CONFIG_AUFS_POLL +unsigned int aufs_poll(struct file *file, poll_table *wait); +#endif + +/* f_op.c */ +extern const struct file_operations aufs_file_fop; +int aufs_flush(struct file *file, fl_owner_t id); + +/* finfo.c */ +void au_hfput(struct au_hfile *hf, struct file *file); +void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, + struct file *h_file); + +void au_update_figen(struct file *file); + +void au_finfo_fin(struct file *file); +int au_finfo_init(struct file *file); +int au_fi_realloc(struct au_finfo *finfo, int nbr); + +/* ---------------------------------------------------------------------- */ + +static inline struct au_finfo *au_fi(struct file *file) +{ + return file->private_data; +} + +/* ---------------------------------------------------------------------- */ + +/* + * fi_read_lock, fi_write_lock, + * fi_read_unlock, fi_write_unlock, fi_downgrade_lock + */ +AuSimpleRwsemFuncs(fi, struct file *f, &au_fi(f)->fi_rwsem); + +#define FiMustNoWaiters(f) AuRwMustNoWaiters(&au_fi(f)->fi_rwsem) +#define FiMustAnyLock(f) AuRwMustAnyLock(&au_fi(f)->fi_rwsem) +#define FiMustWriteLock(f) AuRwMustWriteLock(&au_fi(f)->fi_rwsem) + +/* ---------------------------------------------------------------------- */ + +/* todo: hard/soft set? */ +static inline aufs_bindex_t au_fbstart(struct file *file) +{ + FiMustAnyLock(file); + return au_fi(file)->fi_bstart; +} + +static inline aufs_bindex_t au_fbend(struct file *file) +{ + FiMustAnyLock(file); + return au_fi(file)->fi_bend; +} + +static inline struct au_vdir *au_fvdir_cache(struct file *file) +{ + FiMustAnyLock(file); + return au_fi(file)->fi_vdir_cache; +} + +static inline void au_set_fbstart(struct file *file, aufs_bindex_t bindex) +{ + FiMustWriteLock(file); + au_fi(file)->fi_bstart = bindex; +} + +static inline void au_set_fbend(struct file *file, aufs_bindex_t bindex) +{ + FiMustWriteLock(file); + au_fi(file)->fi_bend = bindex; +} + +static inline void au_set_fvdir_cache(struct file *file, + struct au_vdir *vdir_cache) +{ + FiMustWriteLock(file); + au_fi(file)->fi_vdir_cache = vdir_cache; +} + +static inline struct file *au_h_fptr(struct file *file, aufs_bindex_t bindex) +{ + FiMustAnyLock(file); + return au_fi(file)->fi_hfile[0 + bindex].hf_file; +} + +/* todo: memory barrier? */ +static inline unsigned int au_figen(struct file *f) +{ + return atomic_read(&au_fi(f)->fi_generation); +} + +static inline int au_test_mmapped(struct file *f) +{ + FiMustAnyLock(f); + return !!(au_fi(f)->fi_h_vm_ops); +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FILE_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/rwsem.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/rwsem.h @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * simple read-write semaphore wrappers + */ + +#ifndef __AUFS_RWSEM_H__ +#define __AUFS_RWSEM_H__ + +#ifdef __KERNEL__ + +#include + +struct au_rwsem { + struct rw_semaphore rwsem; +#ifdef CONFIG_AUFS_DEBUG + /* just for debugging, not almighty counter */ + atomic_t rcnt, wcnt; +#endif +}; + +#ifdef CONFIG_AUFS_DEBUG +#define AuDbgCntInit(rw) do { \ + atomic_set(&(rw)->rcnt, 0); \ + atomic_set(&(rw)->wcnt, 0); \ + smp_mb(); /* atomic set */ \ +} while (0) + +#define AuDbgRcntInc(rw) atomic_inc_return(&(rw)->rcnt) +#define AuDbgRcntDec(rw) WARN_ON(atomic_dec_return(&(rw)->rcnt) < 0) +#define AuDbgWcntInc(rw) WARN_ON(atomic_inc_return(&(rw)->wcnt) > 1) +#define AuDbgWcntDec(rw) WARN_ON(atomic_dec_return(&(rw)->wcnt) < 0) +#else +#define AuDbgCntInit(rw) do {} while (0) +#define AuDbgRcntInc(rw) do {} while (0) +#define AuDbgRcntDec(rw) do {} while (0) +#define AuDbgWcntInc(rw) do {} while (0) +#define AuDbgWcntDec(rw) do {} while (0) +#endif /* CONFIG_AUFS_DEBUG */ + +/* to debug easier, do not make them inlined functions */ +#define AuRwMustNoWaiters(rw) AuDebugOn(!list_empty(&(rw)->rwsem.wait_list)) +/* rwsem_is_locked() is unusable */ +#define AuRwMustReadLock(rw) AuDebugOn(atomic_read(&(rw)->rcnt) <= 0) +#define AuRwMustWriteLock(rw) AuDebugOn(atomic_read(&(rw)->wcnt) <= 0) +#define AuRwMustAnyLock(rw) AuDebugOn(atomic_read(&(rw)->rcnt) <= 0 \ + && atomic_read(&(rw)->wcnt) <= 0) +#define AuRwDestroy(rw) AuDebugOn(atomic_read(&(rw)->rcnt) \ + || atomic_read(&(rw)->wcnt)) + +static inline void au_rw_init(struct au_rwsem *rw) +{ + AuDbgCntInit(rw); + init_rwsem(&rw->rwsem); +} + +static inline void au_rw_init_wlock(struct au_rwsem *rw) +{ + au_rw_init(rw); + down_write(&rw->rwsem); + AuDbgWcntInc(rw); +} + +static inline void au_rw_init_wlock_nested(struct au_rwsem *rw, + unsigned int lsc) +{ + au_rw_init(rw); + down_write_nested(&rw->rwsem, lsc); + AuDbgWcntInc(rw); +} + +static inline void au_rw_read_lock(struct au_rwsem *rw) +{ + down_read(&rw->rwsem); + AuDbgRcntInc(rw); +} + +static inline void au_rw_read_lock_nested(struct au_rwsem *rw, unsigned int lsc) +{ + down_read_nested(&rw->rwsem, lsc); + AuDbgRcntInc(rw); +} + +static inline void au_rw_read_unlock(struct au_rwsem *rw) +{ + AuRwMustReadLock(rw); + AuDbgRcntDec(rw); + up_read(&rw->rwsem); +} + +static inline void au_rw_dgrade_lock(struct au_rwsem *rw) +{ + AuRwMustWriteLock(rw); + AuDbgRcntInc(rw); + AuDbgWcntDec(rw); + downgrade_write(&rw->rwsem); +} + +static inline void au_rw_write_lock(struct au_rwsem *rw) +{ + down_write(&rw->rwsem); + AuDbgWcntInc(rw); +} + +static inline void au_rw_write_lock_nested(struct au_rwsem *rw, + unsigned int lsc) +{ + down_write_nested(&rw->rwsem, lsc); + AuDbgWcntInc(rw); +} + +static inline void au_rw_write_unlock(struct au_rwsem *rw) +{ + AuRwMustWriteLock(rw); + AuDbgWcntDec(rw); + up_write(&rw->rwsem); +} + +/* why is not _nested version defined */ +static inline int au_rw_read_trylock(struct au_rwsem *rw) +{ + int ret = down_read_trylock(&rw->rwsem); + if (ret) + AuDbgRcntInc(rw); + return ret; +} + +static inline int au_rw_write_trylock(struct au_rwsem *rw) +{ + int ret = down_write_trylock(&rw->rwsem); + if (ret) + AuDbgWcntInc(rw); + return ret; +} + +#undef AuDbgCntInit +#undef AuDbgRcntInc +#undef AuDbgRcntDec +#undef AuDbgWcntInc +#undef AuDbgWcntDec + +#define AuSimpleLockRwsemFuncs(prefix, param, rwsem) \ +static inline void prefix##_read_lock(param) \ +{ au_rw_read_lock(rwsem); } \ +static inline void prefix##_write_lock(param) \ +{ au_rw_write_lock(rwsem); } \ +static inline int prefix##_read_trylock(param) \ +{ return au_rw_read_trylock(rwsem); } \ +static inline int prefix##_write_trylock(param) \ +{ return au_rw_write_trylock(rwsem); } +/* why is not _nested version defined */ +/* static inline void prefix##_read_trylock_nested(param, lsc) +{ au_rw_read_trylock_nested(rwsem, lsc)); } +static inline void prefix##_write_trylock_nestd(param, lsc) +{ au_rw_write_trylock_nested(rwsem, lsc); } */ + +#define AuSimpleUnlockRwsemFuncs(prefix, param, rwsem) \ +static inline void prefix##_read_unlock(param) \ +{ au_rw_read_unlock(rwsem); } \ +static inline void prefix##_write_unlock(param) \ +{ au_rw_write_unlock(rwsem); } \ +static inline void prefix##_downgrade_lock(param) \ +{ au_rw_dgrade_lock(rwsem); } + +#define AuSimpleRwsemFuncs(prefix, param, rwsem) \ + AuSimpleLockRwsemFuncs(prefix, param, rwsem) \ + AuSimpleUnlockRwsemFuncs(prefix, param, rwsem) + +#endif /* __KERNEL__ */ +#endif /* __AUFS_RWSEM_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/i_op_ren.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/i_op_ren.c @@ -0,0 +1,948 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode operation (rename entry) + * todo: this is crazy monster + */ + +#include "aufs.h" + +enum { AuSRC, AuDST, AuSrcDst }; +enum { AuPARENT, AuCHILD, AuParentChild }; + +#define AuRen_ISDIR 1 +#define AuRen_ISSAMEDIR (1 << 1) +#define AuRen_WHSRC (1 << 2) +#define AuRen_WHDST (1 << 3) +#define AuRen_MNT_WRITE (1 << 4) +#define AuRen_DT_DSTDIR (1 << 5) +#define AuRen_DIROPQ (1 << 6) +#define AuRen_CPUP (1 << 7) +#define au_ftest_ren(flags, name) ((flags) & AuRen_##name) +#define au_fset_ren(flags, name) { (flags) |= AuRen_##name; } +#define au_fclr_ren(flags, name) { (flags) &= ~AuRen_##name; } + +struct au_ren_args { + struct { + struct dentry *dentry, *h_dentry, *parent, *h_parent, + *wh_dentry; + struct inode *dir, *inode; + struct au_hinode *hdir; + struct au_dtime dt[AuParentChild]; + aufs_bindex_t bstart; + } sd[AuSrcDst]; + +#define src_dentry sd[AuSRC].dentry +#define src_dir sd[AuSRC].dir +#define src_inode sd[AuSRC].inode +#define src_h_dentry sd[AuSRC].h_dentry +#define src_parent sd[AuSRC].parent +#define src_h_parent sd[AuSRC].h_parent +#define src_wh_dentry sd[AuSRC].wh_dentry +#define src_hdir sd[AuSRC].hdir +#define src_h_dir sd[AuSRC].hdir->hi_inode +#define src_dt sd[AuSRC].dt +#define src_bstart sd[AuSRC].bstart + +#define dst_dentry sd[AuDST].dentry +#define dst_dir sd[AuDST].dir +#define dst_inode sd[AuDST].inode +#define dst_h_dentry sd[AuDST].h_dentry +#define dst_parent sd[AuDST].parent +#define dst_h_parent sd[AuDST].h_parent +#define dst_wh_dentry sd[AuDST].wh_dentry +#define dst_hdir sd[AuDST].hdir +#define dst_h_dir sd[AuDST].hdir->hi_inode +#define dst_dt sd[AuDST].dt +#define dst_bstart sd[AuDST].bstart + + struct dentry *h_trap; + struct au_branch *br; + struct au_hinode *src_hinode; + struct path h_path; + struct au_nhash whlist; + aufs_bindex_t btgt; + + unsigned int flags; + + struct au_whtmp_rmdir *thargs; + struct dentry *h_dst; +}; + +/* ---------------------------------------------------------------------- */ + +/* + * functions for reverting. + * when an error happened in a single rename systemcall, we should revert + * everything as if nothing happend. + * we don't need to revert the copied-up/down the parent dir since they are + * harmless. + */ + +#define RevertFailure(fmt, args...) do { \ + AuIOErr("revert failure: " fmt " (%d, %d)\n", \ + ##args, err, rerr); \ + err = -EIO; \ +} while (0) + +static void au_ren_rev_diropq(int err, struct au_ren_args *a) +{ + int rerr; + + au_hin_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD); + rerr = au_diropq_remove(a->src_dentry, a->btgt); + au_hin_imtx_unlock(a->src_hinode); + if (rerr) + RevertFailure("remove diropq %.*s", AuDLNPair(a->src_dentry)); +} + + +static void au_ren_rev_rename(int err, struct au_ren_args *a) +{ + int rerr; + + a->h_path.dentry = au_lkup_one(&a->src_dentry->d_name, a->src_h_parent, + a->br, /*nd*/NULL); + rerr = PTR_ERR(a->h_path.dentry); + if (IS_ERR(a->h_path.dentry)) { + RevertFailure("au_lkup_one %.*s", AuDLNPair(a->src_dentry)); + return; + } + + rerr = vfsub_rename(a->dst_h_dir, + au_h_dptr(a->src_dentry, a->btgt), + a->src_h_dir, &a->h_path); + d_drop(a->h_path.dentry); + dput(a->h_path.dentry); + /* au_set_h_dptr(a->src_dentry, a->btgt, NULL); */ + if (rerr) + RevertFailure("rename %.*s", AuDLNPair(a->src_dentry)); +} + +static void au_ren_rev_cpup(int err, struct au_ren_args *a) +{ + int rerr; + + a->h_path.dentry = a->dst_h_dentry; + rerr = vfsub_unlink(a->dst_h_dir, &a->h_path, /*force*/0); + au_set_h_dptr(a->src_dentry, a->btgt, NULL); + au_set_dbstart(a->src_dentry, a->src_bstart); + if (rerr) + RevertFailure("unlink %.*s", AuDLNPair(a->dst_h_dentry)); +} + + +static void au_ren_rev_whtmp(int err, struct au_ren_args *a) +{ + int rerr; + + a->h_path.dentry = au_lkup_one(&a->dst_dentry->d_name, a->dst_h_parent, + a->br, /*nd*/NULL); + rerr = PTR_ERR(a->h_path.dentry); + if (IS_ERR(a->h_path.dentry)) { + RevertFailure("lookup %.*s", AuDLNPair(a->dst_dentry)); + return; + } + if (a->h_path.dentry->d_inode) { + d_drop(a->h_path.dentry); + dput(a->h_path.dentry); + return; + } + + rerr = vfsub_rename(a->dst_h_dir, a->h_dst, a->dst_h_dir, &a->h_path); + d_drop(a->h_path.dentry); + dput(a->h_path.dentry); + if (!rerr) { + au_set_h_dptr(a->dst_dentry, a->btgt, NULL); + au_set_h_dptr(a->dst_dentry, a->btgt, dget(a->h_dst)); + } else + RevertFailure("rename %.*s", AuDLNPair(a->h_dst)); +} + +static void au_ren_rev_whsrc(int err, struct au_ren_args *a) +{ + int rerr; + + a->h_path.dentry = a->src_wh_dentry; + rerr = au_wh_unlink_dentry(a->src_h_dir, &a->h_path, a->src_dentry); + if (rerr) + RevertFailure("unlink %.*s", AuDLNPair(a->src_wh_dentry)); +} + +static void au_ren_rev_drop(struct au_ren_args *a) +{ + struct dentry *d, *h_d; + int i; + aufs_bindex_t bend, bindex; + + for (i = 0; i < AuSrcDst; i++) { + d = a->sd[i].dentry; + d_drop(d); + bend = au_dbend(d); + for (bindex = au_dbstart(d); bindex <= bend; bindex++) { + h_d = au_h_dptr(d, bindex); + if (h_d) + d_drop(h_d); + } + } + + au_update_dbstart(a->dst_dentry); + if (a->thargs) + d_drop(a->h_dst); +} +#undef RevertFailure + +/* ---------------------------------------------------------------------- */ + +/* + * when we have to copyup the renaming entry, do it with the rename-target name + * in order to minimize the cost (the later actual rename is unnecessary). + * otherwise rename it on the target branch. + */ +static int au_ren_or_cpup(struct au_ren_args *a) +{ + int err; + struct dentry *d; + + d = a->src_dentry; + if (au_dbstart(d) == a->btgt) { + a->h_path.dentry = a->dst_h_dentry; + if (au_ftest_ren(a->flags, DIROPQ) + && au_dbdiropq(d) == a->btgt) + au_fclr_ren(a->flags, DIROPQ); + AuDebugOn(au_dbstart(d) != a->btgt); + err = vfsub_rename(a->src_h_dir, au_h_dptr(d, a->btgt), + a->dst_h_dir, &a->h_path); + } else { + struct mutex *h_mtx = &a->src_h_dentry->d_inode->i_mutex; + + au_fset_ren(a->flags, CPUP); + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + au_set_dbstart(d, a->btgt); + au_set_h_dptr(d, a->btgt, dget(a->dst_h_dentry)); + err = au_sio_cpup_single(d, a->btgt, a->src_bstart, -1, + !AuCpup_DTIME, a->dst_parent); + if (unlikely(err)) { + au_set_h_dptr(d, a->btgt, NULL); + au_set_dbstart(d, a->src_bstart); + } + mutex_unlock(h_mtx); + } + + return err; +} + +/* cf. aufs_rmdir() */ +static int au_ren_del_whtmp(struct au_ren_args *a) +{ + int err; + struct inode *dir; + + dir = a->dst_dir; + SiMustAnyLock(dir->i_sb); + if (!au_nhash_test_longer_wh(&a->whlist, a->btgt, + au_sbi(dir->i_sb)->si_dirwh) + || au_test_fs_remote(a->h_dst->d_sb)) { + err = au_whtmp_rmdir(dir, a->btgt, a->h_dst, &a->whlist); + if (unlikely(err)) + AuWarn("failed removing whtmp dir %.*s (%d), " + "ignored.\n", AuDLNPair(a->h_dst), err); + } else { + au_nhash_wh_free(&a->thargs->whlist); + a->thargs->whlist = a->whlist; + a->whlist.nh_num = 0; + au_whtmp_kick_rmdir(dir, a->btgt, a->h_dst, a->thargs); + dput(a->h_dst); + a->thargs = NULL; + } + + return 0; +} + +/* make it 'opaque' dir. */ +static int au_ren_diropq(struct au_ren_args *a) +{ + int err; + struct dentry *diropq; + + err = 0; + a->src_hinode = au_hi(a->src_inode, a->btgt); + au_hin_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD); + diropq = au_diropq_create(a->src_dentry, a->btgt); + au_hin_imtx_unlock(a->src_hinode); + if (IS_ERR(diropq)) + err = PTR_ERR(diropq); + dput(diropq); + + return err; +} + +static int do_rename(struct au_ren_args *a) +{ + int err; + struct dentry *d, *h_d; + + /* prepare workqueue args for asynchronous rmdir */ + h_d = a->dst_h_dentry; + if (au_ftest_ren(a->flags, ISDIR) && h_d->d_inode) { + err = -ENOMEM; + a->thargs = au_whtmp_rmdir_alloc(a->src_dentry->d_sb, GFP_NOFS); + if (unlikely(!a->thargs)) + goto out; + a->h_dst = dget(h_d); + } + + /* create whiteout for src_dentry */ + if (au_ftest_ren(a->flags, WHSRC)) { + a->src_wh_dentry + = au_wh_create(a->src_dentry, a->btgt, a->src_h_parent); + err = PTR_ERR(a->src_wh_dentry); + if (IS_ERR(a->src_wh_dentry)) + goto out_thargs; + } + + /* lookup whiteout for dentry */ + if (au_ftest_ren(a->flags, WHDST)) { + h_d = au_wh_lkup(a->dst_h_parent, &a->dst_dentry->d_name, + a->br); + err = PTR_ERR(h_d); + if (IS_ERR(h_d)) + goto out_whsrc; + if (!h_d->d_inode) + dput(h_d); + else + a->dst_wh_dentry = h_d; + } + + /* rename dentry to tmpwh */ + if (a->thargs) { + err = au_whtmp_ren(a->dst_h_dentry, a->br); + if (unlikely(err)) + goto out_whdst; + + d = a->dst_dentry; + au_set_h_dptr(d, a->btgt, NULL); + err = au_lkup_neg(d, a->btgt); + if (unlikely(err)) + goto out_whtmp; + a->dst_h_dentry = au_h_dptr(d, a->btgt); + } + + /* cpup src */ + if (a->dst_h_dentry->d_inode && a->src_bstart != a->btgt) { + struct mutex *h_mtx = &a->src_h_dentry->d_inode->i_mutex; + + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + err = au_sio_cpup_simple(a->src_dentry, a->btgt, -1, + !AuCpup_DTIME); + mutex_unlock(h_mtx); + if (unlikely(err)) + goto out_whtmp; + } + + /* rename by vfs_rename or cpup */ + d = a->dst_dentry; + if (au_ftest_ren(a->flags, ISDIR) + && (a->dst_wh_dentry + || au_dbdiropq(d) == a->btgt + /* hide the lower to keep xino */ + || a->btgt < au_dbend(d) + || au_opt_test(au_mntflags(d->d_sb), ALWAYS_DIROPQ))) + au_fset_ren(a->flags, DIROPQ); + err = au_ren_or_cpup(a); + if (unlikely(err)) + /* leave the copied-up one */ + goto out_whtmp; + + /* make dir opaque */ + if (au_ftest_ren(a->flags, DIROPQ)) { + err = au_ren_diropq(a); + if (unlikely(err)) + goto out_rename; + } + + /* update target timestamps */ + AuDebugOn(au_dbstart(a->src_dentry) != a->btgt); + a->h_path.dentry = au_h_dptr(a->src_dentry, a->btgt); + vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ + a->src_inode->i_ctime = a->h_path.dentry->d_inode->i_ctime; + + /* remove whiteout for dentry */ + if (a->dst_wh_dentry) { + a->h_path.dentry = a->dst_wh_dentry; + err = au_wh_unlink_dentry(a->dst_h_dir, &a->h_path, + a->dst_dentry); + if (unlikely(err)) + goto out_diropq; + } + + /* remove whtmp */ + if (a->thargs) + au_ren_del_whtmp(a); /* ignore this error */ + + err = 0; + goto out_success; + + out_diropq: + if (au_ftest_ren(a->flags, DIROPQ)) + au_ren_rev_diropq(err, a); + out_rename: + if (!au_ftest_ren(a->flags, CPUP)) + au_ren_rev_rename(err, a); + else + au_ren_rev_cpup(err, a); + out_whtmp: + if (a->thargs) + au_ren_rev_whtmp(err, a); + out_whdst: + dput(a->dst_wh_dentry); + a->dst_wh_dentry = NULL; + out_whsrc: + if (a->src_wh_dentry) + au_ren_rev_whsrc(err, a); + au_ren_rev_drop(a); + out_success: + dput(a->src_wh_dentry); + dput(a->dst_wh_dentry); + out_thargs: + if (a->thargs) { + dput(a->h_dst); + au_whtmp_rmdir_free(a->thargs); + a->thargs = NULL; + } + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * test if @dentry dir can be rename destination or not. + * success means, it is a logically empty dir. + */ +static int may_rename_dstdir(struct dentry *dentry, struct au_nhash *whlist) +{ + return au_test_empty(dentry, whlist); +} + +/* + * test if @dentry dir can be rename source or not. + * if it can, return 0 and @children is filled. + * success means, + * - it is a logically empty dir. + * - or, it exists on writable branch and has no children including whiteouts + * on the lower branch. + */ +static int may_rename_srcdir(struct dentry *dentry, aufs_bindex_t btgt) +{ + int err; + aufs_bindex_t bstart; + + bstart = au_dbstart(dentry); + if (bstart != btgt) { + struct au_nhash whlist; + + SiMustAnyLock(dentry->d_sb); + err = au_nhash_alloc(&whlist, au_sbi(dentry->d_sb)->si_rdhash, + GFP_NOFS); + if (unlikely(err)) + goto out; + err = au_test_empty(dentry, &whlist); + au_nhash_wh_free(&whlist); + goto out; + } + + if (bstart == au_dbtaildir(dentry)) + return 0; /* success */ + + err = au_test_empty_lower(dentry); + + out: + if (err == -ENOTEMPTY) { + AuWarn1("renaming dir who has child(ren) on multiple branches," + " is not supported\n"); + err = -EXDEV; + } + return err; +} + +/* side effect: sets whlist and h_dentry */ +static int au_ren_may_dir(struct au_ren_args *a) +{ + int err; + struct dentry *d; + + d = a->dst_dentry; + SiMustAnyLock(d->d_sb); + err = au_nhash_alloc(&a->whlist, au_sbi(d->d_sb)->si_rdhash, GFP_NOFS); + if (unlikely(err)) + goto out; + + err = 0; + if (au_ftest_ren(a->flags, ISDIR) && a->dst_inode) { + au_set_dbstart(d, a->dst_bstart); + err = may_rename_dstdir(d, &a->whlist); + au_set_dbstart(d, a->btgt); + } + a->dst_h_dentry = au_h_dptr(d, au_dbstart(d)); + if (unlikely(err)) + goto out; + + d = a->src_dentry; + a->src_h_dentry = au_h_dptr(d, au_dbstart(d)); + if (au_ftest_ren(a->flags, ISDIR)) { + err = may_rename_srcdir(d, a->btgt); + if (unlikely(err)) { + au_nhash_wh_free(&a->whlist); + a->whlist.nh_num = 0; + } + } + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * simple tests for rename. + * following the checks in vfs, plus the parent-child relationship. + */ +static int au_may_ren(struct au_ren_args *a) +{ + int err, isdir; + struct inode *h_inode; + + if (a->src_bstart == a->btgt) { + err = au_may_del(a->src_dentry, a->btgt, a->src_h_parent, + au_ftest_ren(a->flags, ISDIR)); + if (unlikely(err)) + goto out; + err = -EINVAL; + if (unlikely(a->src_h_dentry == a->h_trap)) + goto out; + } + + err = 0; + if (a->dst_bstart != a->btgt) + goto out; + + err = -EIO; + h_inode = a->dst_h_dentry->d_inode; + isdir = !!au_ftest_ren(a->flags, ISDIR); + if (!a->dst_dentry->d_inode) { + if (unlikely(h_inode)) + goto out; + err = au_may_add(a->dst_dentry, a->btgt, a->dst_h_parent, + isdir); + } else { + if (unlikely(!h_inode || !h_inode->i_nlink)) + goto out; + err = au_may_del(a->dst_dentry, a->btgt, a->dst_h_parent, + isdir); + if (unlikely(err)) + goto out; + err = -ENOTEMPTY; + if (unlikely(a->dst_h_dentry == a->h_trap)) + goto out; + err = 0; + } + + out: + if (unlikely(err == -ENOENT || err == -EEXIST)) + err = -EIO; + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * locking order + * (VFS) + * - src_dir and dir by lock_rename() + * - inode if exitsts + * (aufs) + * - lock all + * + src_dentry and dentry by aufs_read_and_write_lock2() which calls, + * + si_read_lock + * + di_write_lock2_child() + * + di_write_lock_child() + * + ii_write_lock_child() + * + di_write_lock_child2() + * + ii_write_lock_child2() + * + src_parent and parent + * + di_write_lock_parent() + * + ii_write_lock_parent() + * + di_write_lock_parent2() + * + ii_write_lock_parent2() + * + lower src_dir and dir by vfsub_lock_rename() + * + verify the every relationships between child and parent. if any + * of them failed, unlock all and return -EBUSY. + */ +static void au_ren_unlock(struct au_ren_args *a) +{ + struct super_block *sb; + + sb = a->dst_dentry->d_sb; + if (au_ftest_ren(a->flags, MNT_WRITE)) + mnt_drop_write(a->br->br_mnt); + vfsub_unlock_rename(a->src_h_parent, a->src_hdir, + a->dst_h_parent, a->dst_hdir); +} + +static int au_ren_lock(struct au_ren_args *a) +{ + int err; + unsigned int udba; + + err = 0; + a->src_h_parent = au_h_dptr(a->src_parent, a->btgt); + a->src_hdir = au_hi(a->src_dir, a->btgt); + a->dst_h_parent = au_h_dptr(a->dst_parent, a->btgt); + a->dst_hdir = au_hi(a->dst_dir, a->btgt); + a->h_trap = vfsub_lock_rename(a->src_h_parent, a->src_hdir, + a->dst_h_parent, a->dst_hdir); + udba = au_opt_udba(a->src_dentry->d_sb); + if (unlikely(a->src_hdir->hi_inode != a->src_h_parent->d_inode + || a->dst_hdir->hi_inode != a->dst_h_parent->d_inode)) + err = au_busy_or_stale(); + if (!err && au_dbstart(a->src_dentry) == a->btgt) + err = au_h_verify(a->src_h_dentry, udba, + a->src_h_parent->d_inode, a->src_h_parent, + a->br); + if (!err && au_dbstart(a->dst_dentry) == a->btgt) + err = au_h_verify(a->dst_h_dentry, udba, + a->dst_h_parent->d_inode, a->dst_h_parent, + a->br); + if (!err) { + err = mnt_want_write(a->br->br_mnt); + if (unlikely(err)) + goto out_unlock; + au_fset_ren(a->flags, MNT_WRITE); + goto out; /* success */ + } + + err = au_busy_or_stale(); + + out_unlock: + au_ren_unlock(a); + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +static void au_ren_refresh_dir(struct au_ren_args *a) +{ + struct inode *dir; + + dir = a->dst_dir; + dir->i_version++; + if (au_ftest_ren(a->flags, ISDIR)) { + /* is this updating defined in POSIX? */ + au_cpup_attr_timesizes(a->src_inode); + au_cpup_attr_nlink(dir, /*force*/1); + if (a->dst_inode) { + clear_nlink(a->dst_inode); + au_cpup_attr_timesizes(a->dst_inode); + } + } + if (au_ibstart(dir) == a->btgt) + au_cpup_attr_timesizes(dir); + + if (au_ftest_ren(a->flags, ISSAMEDIR)) + return; + + dir = a->src_dir; + dir->i_version++; + if (au_ftest_ren(a->flags, ISDIR)) + au_cpup_attr_nlink(dir, /*force*/1); + if (au_ibstart(dir) == a->btgt) + au_cpup_attr_timesizes(dir); +} + +static void au_ren_refresh(struct au_ren_args *a) +{ + aufs_bindex_t bend, bindex; + struct dentry *d, *h_d; + struct inode *i, *h_i; + struct super_block *sb; + + d = a->src_dentry; + au_set_dbwh(d, -1); + bend = au_dbend(d); + for (bindex = a->btgt + 1; bindex <= bend; bindex++) { + h_d = au_h_dptr(d, bindex); + if (h_d) + au_set_h_dptr(d, bindex, NULL); + } + au_set_dbend(d, a->btgt); + + sb = d->d_sb; + i = a->src_inode; + if (au_opt_test(au_mntflags(sb), PLINK) && au_plink_test(i)) + return; /* success */ + + bend = au_ibend(i); + for (bindex = a->btgt + 1; bindex <= bend; bindex++) { + h_i = au_h_iptr(i, bindex); + if (h_i) { + au_xino_write(sb, bindex, h_i->i_ino, /*ino*/0); + /* ignore this error */ + au_set_h_iptr(i, bindex, NULL, 0); + } + } + au_set_ibend(i, a->btgt); +} + +/* ---------------------------------------------------------------------- */ + +/* mainly for link(2) and rename(2) */ +int au_wbr(struct dentry *dentry, aufs_bindex_t btgt) +{ + aufs_bindex_t bdiropq, bwh; + struct dentry *parent; + struct au_branch *br; + + parent = dentry->d_parent; + IMustLock(parent->d_inode); /* dir is locked */ + + bdiropq = au_dbdiropq(parent); + bwh = au_dbwh(dentry); + br = au_sbr(dentry->d_sb, btgt); + if (au_br_rdonly(br) + || (0 <= bdiropq && bdiropq < btgt) + || (0 <= bwh && bwh < btgt)) + btgt = -1; + + AuDbg("btgt %d\n", btgt); + return btgt; +} + +/* sets src_bstart, dst_bstart and btgt */ +static int au_ren_wbr(struct au_ren_args *a) +{ + int err; + struct au_wr_dir_args wr_dir_args = { + /* .force_btgt = -1, */ + .flags = AuWrDir_ADD_ENTRY + }; + + a->src_bstart = au_dbstart(a->src_dentry); + a->dst_bstart = au_dbstart(a->dst_dentry); + if (au_ftest_ren(a->flags, ISDIR)) + au_fset_wrdir(wr_dir_args.flags, ISDIR); + wr_dir_args.force_btgt = a->src_bstart; + if (a->dst_inode && a->dst_bstart < a->src_bstart) + wr_dir_args.force_btgt = a->dst_bstart; + wr_dir_args.force_btgt = au_wbr(a->dst_dentry, wr_dir_args.force_btgt); + err = au_wr_dir(a->dst_dentry, a->src_dentry, &wr_dir_args); + a->btgt = err; + + return err; +} + +static void au_ren_dt(struct au_ren_args *a) +{ + a->h_path.dentry = a->src_h_parent; + au_dtime_store(a->src_dt + AuPARENT, a->src_parent, &a->h_path); + if (!au_ftest_ren(a->flags, ISSAMEDIR)) { + a->h_path.dentry = a->dst_h_parent; + au_dtime_store(a->dst_dt + AuPARENT, a->dst_parent, &a->h_path); + } + + au_fclr_ren(a->flags, DT_DSTDIR); + if (!au_ftest_ren(a->flags, ISDIR)) + return; + + a->h_path.dentry = a->src_h_dentry; + au_dtime_store(a->src_dt + AuCHILD, a->src_dentry, &a->h_path); + if (a->dst_h_dentry->d_inode) { + au_fset_ren(a->flags, DT_DSTDIR); + a->h_path.dentry = a->dst_h_dentry; + au_dtime_store(a->dst_dt + AuCHILD, a->dst_dentry, &a->h_path); + } +} + +static void au_ren_rev_dt(int err, struct au_ren_args *a) +{ + struct dentry *h_d; + struct mutex *h_mtx; + + au_dtime_revert(a->src_dt + AuPARENT); + if (!au_ftest_ren(a->flags, ISSAMEDIR)) + au_dtime_revert(a->dst_dt + AuPARENT); + + if (au_ftest_ren(a->flags, ISDIR) && err != -EIO) { + h_d = a->src_dt[AuCHILD].dt_h_path.dentry; + h_mtx = &h_d->d_inode->i_mutex; + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + au_dtime_revert(a->src_dt + AuCHILD); + mutex_unlock(h_mtx); + + if (au_ftest_ren(a->flags, DT_DSTDIR)) { + h_d = a->dst_dt[AuCHILD].dt_h_path.dentry; + h_mtx = &h_d->d_inode->i_mutex; + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + au_dtime_revert(a->dst_dt + AuCHILD); + mutex_unlock(h_mtx); + } + } +} + +/* ---------------------------------------------------------------------- */ + +int aufs_rename(struct inode *_src_dir, struct dentry *_src_dentry, + struct inode *_dst_dir, struct dentry *_dst_dentry) +{ + int err; + /* reduce stack space */ + struct au_ren_args *a; + + IMustLock(_src_dir); + IMustLock(_dst_dir); + + err = -ENOMEM; + BUILD_BUG_ON(sizeof(*a) > PAGE_SIZE); + a = kzalloc(sizeof(*a), GFP_NOFS); + if (unlikely(!a)) + goto out; + + a->src_dir = _src_dir; + a->src_dentry = _src_dentry; + a->src_inode = a->src_dentry->d_inode; + a->src_parent = a->src_dentry->d_parent; /* dir inode is locked */ + a->dst_dir = _dst_dir; + a->dst_dentry = _dst_dentry; + a->dst_inode = a->dst_dentry->d_inode; + a->dst_parent = a->dst_dentry->d_parent; /* dir inode is locked */ + if (a->dst_inode) { + IMustLock(a->dst_inode); + au_igrab(a->dst_inode); + } + + err = -ENOTDIR; + if (S_ISDIR(a->src_inode->i_mode)) { + au_fset_ren(a->flags, ISDIR); + if (unlikely(a->dst_inode && !S_ISDIR(a->dst_inode->i_mode))) + goto out_free; + aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry, + AuLock_DIR | AuLock_FLUSH); + } else + aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry, + AuLock_FLUSH); + + au_fset_ren(a->flags, ISSAMEDIR); /* temporary */ + di_write_lock_parent(a->dst_parent); + + /* which branch we process */ + err = au_ren_wbr(a); + if (unlikely(err < 0)) + goto out_unlock; + a->br = au_sbr(a->dst_dentry->d_sb, a->btgt); + a->h_path.mnt = a->br->br_mnt; + + /* are they available to be renamed */ + err = au_ren_may_dir(a); + if (unlikely(err)) + goto out_unlock; + + /* prepare the writable parent dir on the same branch */ + if (a->dst_bstart == a->btgt) { + au_fset_ren(a->flags, WHDST); + } else { + err = au_cpup_dirs(a->dst_dentry, a->btgt); + if (unlikely(err)) + goto out_children; + } + + if (a->src_dir != a->dst_dir) { + /* + * this temporary unlock is safe, + * because both dir->i_mutex are locked. + */ + di_write_unlock(a->dst_parent); + di_write_lock_parent(a->src_parent); + err = au_wr_dir_need_wh(a->src_dentry, + au_ftest_ren(a->flags, ISDIR), + &a->btgt); + di_write_unlock(a->src_parent); + di_write_lock2_parent(a->src_parent, a->dst_parent, /*isdir*/1); + au_fclr_ren(a->flags, ISSAMEDIR); + } else + err = au_wr_dir_need_wh(a->src_dentry, + au_ftest_ren(a->flags, ISDIR), + &a->btgt); + if (unlikely(err < 0)) + goto out_children; + if (err) + au_fset_ren(a->flags, WHSRC); + + /* lock them all */ + err = au_ren_lock(a); + if (unlikely(err)) + goto out_children; + + if (!au_opt_test(au_mntflags(a->dst_dir->i_sb), UDBA_NONE)) { + err = au_may_ren(a); + if (unlikely(err)) + goto out_hdir; + } + + /* store timestamps to be revertible */ + au_ren_dt(a); + + /* here we go */ + err = do_rename(a); + if (unlikely(err)) + goto out_dt; + + /* update dir attributes */ + au_ren_refresh_dir(a); + + /* dput/iput all lower dentries */ + au_ren_refresh(a); + + goto out_hdir; /* success */ + + out_dt: + au_ren_rev_dt(err, a); + out_hdir: + au_ren_unlock(a); + out_children: + au_nhash_wh_free(&a->whlist); + out_unlock: + if (unlikely(err && au_ftest_ren(a->flags, ISDIR))) { + au_update_dbstart(a->dst_dentry); + d_drop(a->dst_dentry); + } + if (!err) + d_move(a->src_dentry, a->dst_dentry); + if (au_ftest_ren(a->flags, ISSAMEDIR)) + di_write_unlock(a->dst_parent); + else + di_write_unlock2(a->src_parent, a->dst_parent); + aufs_read_and_write_unlock2(a->dst_dentry, a->src_dentry); + out_free: + iput(a->dst_inode); + if (a->thargs) + au_whtmp_rmdir_free(a->thargs); + kfree(a); + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dbgaufs.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dbgaufs.c @@ -0,0 +1,331 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * debugfs interface + */ + +#include +#include "aufs.h" + +#ifndef CONFIG_SYSFS +#error DEBUG_FS depends upon SYSFS +#endif + +static struct dentry *dbgaufs; +static const mode_t dbgaufs_mode = S_IRUSR | S_IRGRP | S_IROTH; + +/* 20 is max digits length of ulong 64 */ +struct dbgaufs_arg { + int n; + char a[20 * 4]; +}; + +/* + * common function for all XINO files + */ +static int dbgaufs_xi_release(struct inode *inode __maybe_unused, + struct file *file) +{ + kfree(file->private_data); + return 0; +} + +static int dbgaufs_xi_open(struct file *xf, struct file *file, int do_fcnt) +{ + int err; + struct kstat st; + struct dbgaufs_arg *p; + + err = -ENOMEM; + p = kmalloc(sizeof(*p), GFP_NOFS); + if (unlikely(!p)) + goto out; + + err = 0; + p->n = 0; + file->private_data = p; + if (!xf) + goto out; + + err = vfs_getattr(xf->f_vfsmnt, xf->f_dentry, &st); + if (!err) { + if (do_fcnt) + p->n = snprintf + (p->a, sizeof(p->a), "%ld, %llux%lu %lld\n", + (long)file_count(xf), st.blocks, st.blksize, + (long long)st.size); + else + p->n = snprintf(p->a, sizeof(p->a), "%llux%lu %lld\n", + st.blocks, st.blksize, + (long long)st.size); + AuDebugOn(p->n >= sizeof(p->a)); + } else { + p->n = snprintf(p->a, sizeof(p->a), "err %d\n", err); + err = 0; + } + + out: + return err; + +} + +static ssize_t dbgaufs_xi_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + struct dbgaufs_arg *p; + + p = file->private_data; + return simple_read_from_buffer(buf, count, ppos, p->a, p->n); +} + +/* ---------------------------------------------------------------------- */ + +static int dbgaufs_xib_open(struct inode *inode, struct file *file) +{ + int err; + struct au_sbinfo *sbinfo; + struct super_block *sb; + + sbinfo = inode->i_private; + sb = sbinfo->si_sb; + si_noflush_read_lock(sb); + err = dbgaufs_xi_open(sbinfo->si_xib, file, /*do_fcnt*/0); + si_read_unlock(sb); + return err; +} + +static const struct file_operations dbgaufs_xib_fop = { + .open = dbgaufs_xib_open, + .release = dbgaufs_xi_release, + .read = dbgaufs_xi_read +}; + +/* ---------------------------------------------------------------------- */ + +#define DbgaufsXi_PREFIX "xi" + +static int dbgaufs_xino_open(struct inode *inode, struct file *file) +{ + int err; + long l; + struct au_sbinfo *sbinfo; + struct super_block *sb; + struct file *xf; + struct qstr *name; + + err = -ENOENT; + xf = NULL; + name = &file->f_dentry->d_name; + if (unlikely(name->len < sizeof(DbgaufsXi_PREFIX) + || memcmp(name->name, DbgaufsXi_PREFIX, + sizeof(DbgaufsXi_PREFIX) - 1))) + goto out; + err = strict_strtol(name->name + sizeof(DbgaufsXi_PREFIX) - 1, 10, &l); + if (unlikely(err)) + goto out; + + sbinfo = inode->i_private; + sb = sbinfo->si_sb; + si_noflush_read_lock(sb); + if (l <= au_sbend(sb)) { + xf = au_sbr(sb, (aufs_bindex_t)l)->br_xino.xi_file; + err = dbgaufs_xi_open(xf, file, /*do_fcnt*/1); + } else + err = -ENOENT; + si_read_unlock(sb); + + out: + return err; +} + +static const struct file_operations dbgaufs_xino_fop = { + .open = dbgaufs_xino_open, + .release = dbgaufs_xi_release, + .read = dbgaufs_xi_read +}; + +void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) +{ + aufs_bindex_t bend; + struct au_branch *br; + struct au_xino_file *xi; + + if (!au_sbi(sb)->si_dbgaufs) + return; + + bend = au_sbend(sb); + for (; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + xi = &br->br_xino; + if (xi->xi_dbgaufs) { + debugfs_remove(xi->xi_dbgaufs); + xi->xi_dbgaufs = NULL; + } + } +} + +void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) +{ + struct au_sbinfo *sbinfo; + struct dentry *parent; + struct au_branch *br; + struct au_xino_file *xi; + aufs_bindex_t bend; + char name[sizeof(DbgaufsXi_PREFIX) + 5]; /* "xi" bindex NULL */ + + sbinfo = au_sbi(sb); + parent = sbinfo->si_dbgaufs; + if (!parent) + return; + + bend = au_sbend(sb); + for (; bindex <= bend; bindex++) { + snprintf(name, sizeof(name), DbgaufsXi_PREFIX "%d", bindex); + br = au_sbr(sb, bindex); + xi = &br->br_xino; + AuDebugOn(xi->xi_dbgaufs); + xi->xi_dbgaufs = debugfs_create_file(name, dbgaufs_mode, parent, + sbinfo, &dbgaufs_xino_fop); + /* ignore an error */ + if (unlikely(!xi->xi_dbgaufs)) + AuWarn1("failed %s under debugfs\n", name); + } +} + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_EXPORT +static int dbgaufs_xigen_open(struct inode *inode, struct file *file) +{ + int err; + struct au_sbinfo *sbinfo; + struct super_block *sb; + + sbinfo = inode->i_private; + sb = sbinfo->si_sb; + si_noflush_read_lock(sb); + err = dbgaufs_xi_open(sbinfo->si_xigen, file, /*do_fcnt*/0); + si_read_unlock(sb); + return err; +} + +static const struct file_operations dbgaufs_xigen_fop = { + .open = dbgaufs_xigen_open, + .release = dbgaufs_xi_release, + .read = dbgaufs_xi_read +}; + +static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) +{ + int err; + + /* + * This function is a dynamic '__init' fucntion actually, + * so the tiny check for si_rwsem is unnecessary. + */ + /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ + + err = -EIO; + sbinfo->si_dbgaufs_xigen = debugfs_create_file + ("xigen", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, + &dbgaufs_xigen_fop); + if (sbinfo->si_dbgaufs_xigen) + err = 0; + + return err; +} +#else +static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) +{ + return 0; +} +#endif /* CONFIG_AUFS_EXPORT */ + +/* ---------------------------------------------------------------------- */ + +void dbgaufs_si_fin(struct au_sbinfo *sbinfo) +{ + /* + * This function is a dynamic '__init' fucntion actually, + * so the tiny check for si_rwsem is unnecessary. + */ + /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ + + debugfs_remove_recursive(sbinfo->si_dbgaufs); + sbinfo->si_dbgaufs = NULL; + kobject_put(&sbinfo->si_kobj); +} + +int dbgaufs_si_init(struct au_sbinfo *sbinfo) +{ + int err; + char name[SysaufsSiNameLen]; + + /* + * This function is a dynamic '__init' fucntion actually, + * so the tiny check for si_rwsem is unnecessary. + */ + /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ + + err = -ENOENT; + if (!dbgaufs) { + AuErr1("/debug/aufs is uninitialized\n"); + goto out; + } + + err = -EIO; + sysaufs_name(sbinfo, name); + sbinfo->si_dbgaufs = debugfs_create_dir(name, dbgaufs); + if (unlikely(!sbinfo->si_dbgaufs)) + goto out; + kobject_get(&sbinfo->si_kobj); + + sbinfo->si_dbgaufs_xib = debugfs_create_file + ("xib", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, + &dbgaufs_xib_fop); + if (unlikely(!sbinfo->si_dbgaufs_xib)) + goto out_dir; + + err = dbgaufs_xigen_init(sbinfo); + if (!err) + goto out; /* success */ + + out_dir: + dbgaufs_si_fin(sbinfo); + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +void dbgaufs_fin(void) +{ + debugfs_remove(dbgaufs); +} + +int __init dbgaufs_init(void) +{ + int err; + + err = -EIO; + dbgaufs = debugfs_create_dir(AUFS_NAME, NULL); + if (dbgaufs) + err = 0; + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dcsub.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dcsub.c @@ -0,0 +1,223 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sub-routines for dentry cache + */ + +#include "aufs.h" + +static void au_dpage_free(struct au_dpage *dpage) +{ + int i; + struct dentry **p; + + p = dpage->dentries; + for (i = 0; i < dpage->ndentry; i++) + dput(*p++); + free_page((unsigned long)dpage->dentries); +} + +int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp) +{ + int err; + void *p; + + err = -ENOMEM; + dpages->dpages = kmalloc(sizeof(*dpages->dpages), gfp); + if (unlikely(!dpages->dpages)) + goto out; + + p = (void *)__get_free_page(gfp); + if (unlikely(!p)) + goto out_dpages; + + dpages->dpages[0].ndentry = 0; + dpages->dpages[0].dentries = p; + dpages->ndpage = 1; + return 0; /* success */ + + out_dpages: + kfree(dpages->dpages); + out: + return err; +} + +void au_dpages_free(struct au_dcsub_pages *dpages) +{ + int i; + struct au_dpage *p; + + p = dpages->dpages; + for (i = 0; i < dpages->ndpage; i++) + au_dpage_free(p++); + kfree(dpages->dpages); +} + +static int au_dpages_append(struct au_dcsub_pages *dpages, + struct dentry *dentry, gfp_t gfp) +{ + int err, sz; + struct au_dpage *dpage; + void *p; + + dpage = dpages->dpages + dpages->ndpage - 1; + sz = PAGE_SIZE / sizeof(dentry); + if (unlikely(dpage->ndentry >= sz)) { + AuLabel(new dpage); + err = -ENOMEM; + sz = dpages->ndpage * sizeof(*dpages->dpages); + p = au_kzrealloc(dpages->dpages, sz, + sz + sizeof(*dpages->dpages), gfp); + if (unlikely(!p)) + goto out; + + dpages->dpages = p; + dpage = dpages->dpages + dpages->ndpage; + p = (void *)__get_free_page(gfp); + if (unlikely(!p)) + goto out; + + dpage->ndentry = 0; + dpage->dentries = p; + dpages->ndpage++; + } + + dpage->dentries[dpage->ndentry++] = dget(dentry); + return 0; /* success */ + + out: + return err; +} + +int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, + au_dpages_test test, void *arg) +{ + int err; + struct dentry *this_parent = root; + struct list_head *next; + struct super_block *sb = root->d_sb; + + err = 0; + spin_lock(&dcache_lock); + repeat: + next = this_parent->d_subdirs.next; + resume: + if (this_parent->d_sb == sb + && !IS_ROOT(this_parent) + && atomic_read(&this_parent->d_count) + && this_parent->d_inode + && (!test || test(this_parent, arg))) { + err = au_dpages_append(dpages, this_parent, GFP_ATOMIC); + if (unlikely(err)) + goto out; + } + + while (next != &this_parent->d_subdirs) { + struct list_head *tmp = next; + struct dentry *dentry = list_entry(tmp, struct dentry, + d_u.d_child); + next = tmp->next; + if (/*d_unhashed(dentry) || */!dentry->d_inode) + continue; + if (!list_empty(&dentry->d_subdirs)) { + this_parent = dentry; + goto repeat; + } + if (dentry->d_sb == sb + && atomic_read(&dentry->d_count) + && (!test || test(dentry, arg))) { + err = au_dpages_append(dpages, dentry, GFP_ATOMIC); + if (unlikely(err)) + goto out; + } + } + + if (this_parent != root) { + next = this_parent->d_u.d_child.next; + this_parent = this_parent->d_parent; /* dcache_lock is locked */ + goto resume; + } + out: + spin_unlock(&dcache_lock); + return err; +} + +int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, + int do_include, au_dpages_test test, void *arg) +{ + int err; + + err = 0; + spin_lock(&dcache_lock); + if (do_include && (!test || test(dentry, arg))) { + err = au_dpages_append(dpages, dentry, GFP_ATOMIC); + if (unlikely(err)) + goto out; + } + while (!IS_ROOT(dentry)) { + dentry = dentry->d_parent; /* dcache_lock is locked */ + if (!test || test(dentry, arg)) { + err = au_dpages_append(dpages, dentry, GFP_ATOMIC); + if (unlikely(err)) + break; + } + } + + out: + spin_unlock(&dcache_lock); + + return err; +} + +struct dentry *au_test_subdir(struct dentry *d1, struct dentry *d2) +{ + struct dentry *trap, **dentries; + int err, i, j; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + + trap = ERR_PTR(-ENOMEM); + err = au_dpages_init(&dpages, GFP_NOFS); + if (unlikely(err)) + goto out; + err = au_dcsub_pages_rev(&dpages, d1, /*do_include*/1, NULL, NULL); + if (unlikely(err)) + goto out_dpages; + + trap = d1; + for (i = 0; !err && i < dpages.ndpage; i++) { + dpage = dpages.dpages + i; + dentries = dpage->dentries; + for (j = 0; !err && j < dpage->ndentry; j++) { + struct dentry *d; + + d = dentries[j]; + err = (d == d2); + if (!err) + trap = d; + } + } + if (!err) + trap = NULL; + + out_dpages: + au_dpages_free(&dpages); + out: + return trap; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/file.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/file.c @@ -0,0 +1,578 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * handling file/dir, and address_space operation + */ + +#include +#include +#include +#include +#include "aufs.h" + +/* + * a dirty trick for handling deny_write_access(). + * because FMODE_EXEC flag is not passed to f_op->open(), + * set it to file->private_data temporary. + */ +void au_store_oflag(struct nameidata *nd, struct inode *inode) +{ + if (nd + /* && !(nd->flags & LOOKUP_CONTINUE) */ + && (nd->flags & LOOKUP_OPEN) + && (nd->intent.open.flags & vfsub_fmode_to_uint(FMODE_EXEC)) + && inode + && S_ISREG(inode->i_mode)) { + /* suppress a warning in lp64 */ + unsigned long flags = nd->intent.open.flags; + nd->intent.open.file->private_data = (void *)flags; + /* smp_mb(); */ + } +} + +/* drop flags for writing */ +unsigned int au_file_roflags(unsigned int flags) +{ + flags &= ~(O_WRONLY | O_RDWR | O_APPEND | O_CREAT | O_TRUNC); + flags |= O_RDONLY | O_NOATIME; + return flags; +} + +/* common functions to regular file and dir */ +struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, + struct file *file) +{ + struct file *h_file; + struct dentry *h_dentry; + struct inode *h_inode; + struct super_block *sb; + struct au_branch *br; + int err; + + /* a race condition can happen between open and unlink/rmdir */ + h_file = ERR_PTR(-ENOENT); + h_dentry = au_h_dptr(dentry, bindex); + if (au_test_nfsd(current) && !h_dentry) + goto out; + h_inode = h_dentry->d_inode; + if (au_test_nfsd(current) && !h_inode) + goto out; + if (unlikely((!d_unhashed(dentry) && d_unhashed(h_dentry)) + || !h_inode)) + goto out; + + sb = dentry->d_sb; + br = au_sbr(sb, bindex); + h_file = ERR_PTR(-EACCES); + if (file && (file->f_mode & FMODE_EXEC) + && (br->br_mnt->mnt_flags & MNT_NOEXEC)) + goto out; + + /* drop flags for writing */ + if (au_test_ro(sb, bindex, dentry->d_inode)) + flags = au_file_roflags(flags); + flags &= ~O_CREAT; + atomic_inc(&br->br_count); + h_file = dentry_open(dget(h_dentry), mntget(br->br_mnt), flags, + current_cred()); + if (IS_ERR(h_file)) + goto out_br; + + if (file && (file->f_mode & FMODE_EXEC)) { + h_file->f_mode |= FMODE_EXEC; + err = deny_write_access(h_file); + if (unlikely(err)) { + fput(h_file); + h_file = ERR_PTR(err); + goto out_br; + } + } + fsnotify_open(h_dentry); + goto out; /* success */ + + out_br: + atomic_dec(&br->br_count); + out: + return h_file; +} + +int au_do_open(struct file *file, int (*open)(struct file *file, int flags)) +{ + int err; + struct dentry *dentry; + struct super_block *sb; + + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_finfo_init(file); + if (unlikely(err)) + goto out; + + di_read_lock_child(dentry, AuLock_IR); + err = open(file, file->f_flags); + di_read_unlock(dentry, AuLock_IR); + + fi_write_unlock(file); + if (unlikely(err)) + au_finfo_fin(file); + out: + si_read_unlock(sb); + return err; +} + +int au_reopen_nondir(struct file *file) +{ + int err; + aufs_bindex_t bstart, bindex, bend; + struct dentry *dentry; + struct file *h_file, *h_file_tmp; + + dentry = file->f_dentry; + bstart = au_dbstart(dentry); + h_file_tmp = NULL; + if (au_fbstart(file) == bstart) { + h_file = au_h_fptr(file, bstart); + if (file->f_mode == h_file->f_mode) + return 0; /* success */ + h_file_tmp = h_file; + get_file(h_file_tmp); + au_set_h_fptr(file, bstart, NULL); + } + AuDebugOn(au_fbstart(file) < bstart + || au_fi(file)->fi_hfile[0 + bstart].hf_file); + + h_file = au_h_open(dentry, bstart, file->f_flags & ~O_TRUNC, file); + err = PTR_ERR(h_file); + if (IS_ERR(h_file)) + goto out; /* todo: close all? */ + + err = 0; + au_set_fbstart(file, bstart); + au_set_h_fptr(file, bstart, h_file); + au_update_figen(file); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + + /* close lower files */ + bend = au_fbend(file); + for (bindex = bstart + 1; bindex <= bend; bindex++) + au_set_h_fptr(file, bindex, NULL); + au_set_fbend(file, bstart); + + out: + if (h_file_tmp) + fput(h_file_tmp); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int au_reopen_wh(struct file *file, aufs_bindex_t btgt, + struct dentry *hi_wh) +{ + int err; + aufs_bindex_t bstart; + struct au_dinfo *dinfo; + struct dentry *h_dentry; + + dinfo = au_di(file->f_dentry); + AuRwMustWriteLock(&dinfo->di_rwsem); + + bstart = dinfo->di_bstart; + dinfo->di_bstart = btgt; + h_dentry = dinfo->di_hdentry[0 + btgt].hd_dentry; + dinfo->di_hdentry[0 + btgt].hd_dentry = hi_wh; + err = au_reopen_nondir(file); + dinfo->di_hdentry[0 + btgt].hd_dentry = h_dentry; + dinfo->di_bstart = bstart; + + return err; +} + +static int au_ready_to_write_wh(struct file *file, loff_t len, + aufs_bindex_t bcpup) +{ + int err; + struct inode *inode; + struct dentry *dentry, *hi_wh; + struct super_block *sb; + + dentry = file->f_dentry; + inode = dentry->d_inode; + hi_wh = au_hi_wh(inode, bcpup); + if (!hi_wh) + err = au_sio_cpup_wh(dentry, bcpup, len, file); + else + /* already copied-up after unlink */ + err = au_reopen_wh(file, bcpup, hi_wh); + + sb = dentry->d_sb; + if (!err && inode->i_nlink > 1 && au_opt_test(au_mntflags(sb), PLINK)) + au_plink_append(inode, bcpup, au_h_dptr(dentry, bcpup)); + + return err; +} + +/* + * prepare the @file for writing. + */ +int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin) +{ + int err; + aufs_bindex_t bstart, bcpup; + struct dentry *dentry, *parent, *h_dentry; + struct inode *h_inode, *inode; + struct super_block *sb; + + dentry = file->f_dentry; + sb = dentry->d_sb; + bstart = au_fbstart(file); + inode = dentry->d_inode; + err = au_test_ro(sb, bstart, inode); + if (!err && (au_h_fptr(file, bstart)->f_mode & FMODE_WRITE)) { + err = au_pin(pin, dentry, bstart, AuOpt_UDBA_NONE, /*flags*/0); + goto out; + } + + /* need to cpup */ + parent = dget_parent(dentry); + di_write_lock_parent(parent); + err = AuWbrCopyup(au_sbi(sb), dentry); + bcpup = err; + if (unlikely(err < 0)) + goto out_dgrade; + err = 0; + + if (!au_h_dptr(parent, bcpup)) { + err = au_cpup_dirs(dentry, bcpup); + if (unlikely(err)) + goto out_dgrade; + } + + err = au_pin(pin, dentry, bcpup, AuOpt_UDBA_NONE, + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + if (unlikely(err)) + goto out_dgrade; + + h_dentry = au_h_fptr(file, bstart)->f_dentry; + h_inode = h_dentry->d_inode; + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + if (d_unhashed(dentry) /* || d_unhashed(h_dentry) */ + /* || !h_inode->i_nlink */) { + err = au_ready_to_write_wh(file, len, bcpup); + di_downgrade_lock(parent, AuLock_IR); + } else { + di_downgrade_lock(parent, AuLock_IR); + if (!au_h_dptr(dentry, bcpup)) + err = au_sio_cpup_simple(dentry, bcpup, len, + AuCpup_DTIME); + if (!err) + err = au_reopen_nondir(file); + } + mutex_unlock(&h_inode->i_mutex); + + if (!err) { + au_pin_set_parent_lflag(pin, /*lflag*/0); + goto out_dput; /* success */ + } + au_unpin(pin); + goto out_unlock; + + out_dgrade: + di_downgrade_lock(parent, AuLock_IR); + out_unlock: + di_read_unlock(parent, AuLock_IR); + out_dput: + dput(parent); + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int au_file_refresh_by_inode(struct file *file, int *need_reopen) +{ + int err; + aufs_bindex_t bstart; + struct au_pin pin; + struct au_finfo *finfo; + struct dentry *dentry, *parent, *hi_wh; + struct inode *inode; + struct super_block *sb; + + FiMustWriteLock(file); + + err = 0; + finfo = au_fi(file); + dentry = file->f_dentry; + sb = dentry->d_sb; + inode = dentry->d_inode; + bstart = au_ibstart(inode); + if (bstart == finfo->fi_bstart) + goto out; + + parent = dget_parent(dentry); + if (au_test_ro(sb, bstart, inode)) { + di_read_lock_parent(parent, !AuLock_IR); + err = AuWbrCopyup(au_sbi(sb), dentry); + bstart = err; + di_read_unlock(parent, !AuLock_IR); + if (unlikely(err < 0)) + goto out_parent; + err = 0; + } + + di_read_lock_parent(parent, AuLock_IR); + hi_wh = au_hi_wh(inode, bstart); + if (au_opt_test(au_mntflags(sb), PLINK) + && au_plink_test(inode) + && !d_unhashed(dentry)) { + err = au_test_and_cpup_dirs(dentry, bstart); + if (unlikely(err)) + goto out_unlock; + + /* always superio. */ + err = au_pin(&pin, dentry, bstart, AuOpt_UDBA_NONE, + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + if (!err) + err = au_sio_cpup_simple(dentry, bstart, -1, + AuCpup_DTIME); + au_unpin(&pin); + } else if (hi_wh) { + /* already copied-up after unlink */ + err = au_reopen_wh(file, bstart, hi_wh); + *need_reopen = 0; + } + + out_unlock: + di_read_unlock(parent, AuLock_IR); + out_parent: + dput(parent); + out: + return err; +} + +static void au_do_refresh_file(struct file *file) +{ + aufs_bindex_t bindex, bend, new_bindex, brid; + struct au_hfile *p, tmp, *q; + struct au_finfo *finfo; + struct super_block *sb; + + FiMustWriteLock(file); + + sb = file->f_dentry->d_sb; + finfo = au_fi(file); + p = finfo->fi_hfile + finfo->fi_bstart; + brid = p->hf_br->br_id; + bend = finfo->fi_bend; + for (bindex = finfo->fi_bstart; bindex <= bend; bindex++, p++) { + if (!p->hf_file) + continue; + + new_bindex = au_br_index(sb, p->hf_br->br_id); + if (new_bindex == bindex) + continue; + if (new_bindex < 0) { + au_set_h_fptr(file, bindex, NULL); + continue; + } + + /* swap two lower inode, and loop again */ + q = finfo->fi_hfile + new_bindex; + tmp = *q; + *q = *p; + *p = tmp; + if (tmp.hf_file) { + bindex--; + p--; + } + } + + p = finfo->fi_hfile; + if (!au_test_mmapped(file) && !d_unhashed(file->f_dentry)) { + bend = au_sbend(sb); + for (finfo->fi_bstart = 0; finfo->fi_bstart <= bend; + finfo->fi_bstart++, p++) + if (p->hf_file) { + if (p->hf_file->f_dentry + && p->hf_file->f_dentry->d_inode) + break; + else + au_hfput(p, file); + } + } else { + bend = au_br_index(sb, brid); + for (finfo->fi_bstart = 0; finfo->fi_bstart < bend; + finfo->fi_bstart++, p++) + if (p->hf_file) + au_hfput(p, file); + bend = au_sbend(sb); + } + + p = finfo->fi_hfile + bend; + for (finfo->fi_bend = bend; finfo->fi_bend >= finfo->fi_bstart; + finfo->fi_bend--, p--) + if (p->hf_file) { + if (p->hf_file->f_dentry + && p->hf_file->f_dentry->d_inode) + break; + else + au_hfput(p, file); + } + AuDebugOn(finfo->fi_bend < finfo->fi_bstart); +} + +/* + * after branch manipulating, refresh the file. + */ +static int refresh_file(struct file *file, int (*reopen)(struct file *file)) +{ + int err, need_reopen; + struct dentry *dentry; + aufs_bindex_t bend, bindex; + + dentry = file->f_dentry; + err = au_fi_realloc(au_fi(file), au_sbend(dentry->d_sb) + 1); + if (unlikely(err)) + goto out; + au_do_refresh_file(file); + + err = 0; + need_reopen = 1; + if (!au_test_mmapped(file)) + err = au_file_refresh_by_inode(file, &need_reopen); + if (!err && need_reopen && !d_unhashed(dentry)) + err = reopen(file); + if (!err) { + au_update_figen(file); + return 0; /* success */ + } + + /* error, close all lower files */ + bend = au_fbend(file); + for (bindex = au_fbstart(file); bindex <= bend; bindex++) + au_set_h_fptr(file, bindex, NULL); + + out: + return err; +} + +/* common function to regular file and dir */ +int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), + int wlock) +{ + int err; + unsigned int sigen, figen; + aufs_bindex_t bstart; + unsigned char pseudo_link; + struct dentry *dentry; + + err = 0; + dentry = file->f_dentry; + sigen = au_sigen(dentry->d_sb); + fi_write_lock(file); + figen = au_figen(file); + di_write_lock_child(dentry); + bstart = au_dbstart(dentry); + pseudo_link = (bstart != au_ibstart(dentry->d_inode)); + if (sigen == figen && !pseudo_link && au_fbstart(file) == bstart) { + if (!wlock) { + di_downgrade_lock(dentry, AuLock_IR); + fi_downgrade_lock(file); + } + goto out; /* success */ + } + + AuDbg("sigen %d, figen %d\n", sigen, figen); + if (sigen != au_digen(dentry) + || sigen != au_iigen(dentry->d_inode)) { + err = au_reval_dpath(dentry, sigen); + if (unlikely(err < 0)) + goto out; + AuDebugOn(au_digen(dentry) != sigen + || au_iigen(dentry->d_inode) != sigen); + } + + err = refresh_file(file, reopen); + if (!err) { + if (!wlock) { + di_downgrade_lock(dentry, AuLock_IR); + fi_downgrade_lock(file); + } + } else { + di_write_unlock(dentry); + fi_write_unlock(file); + } + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* cf. aufs_nopage() */ +/* for madvise(2) */ +static int aufs_readpage(struct file *file __maybe_unused, struct page *page) +{ + unlock_page(page); + return 0; +} + +/* they will never be called. */ +#ifdef CONFIG_AUFS_DEBUG +static int aufs_write_begin(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned flags, + struct page **pagep, void **fsdata) +{ AuUnsupport(); return 0; } +static int aufs_write_end(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned copied, + struct page *page, void *fsdata) +{ AuUnsupport(); return 0; } +static int aufs_writepage(struct page *page, struct writeback_control *wbc) +{ AuUnsupport(); return 0; } +static void aufs_sync_page(struct page *page) +{ AuUnsupport(); } + +static int aufs_set_page_dirty(struct page *page) +{ AuUnsupport(); return 0; } +static void aufs_invalidatepage(struct page *page, unsigned long offset) +{ AuUnsupport(); } +static int aufs_releasepage(struct page *page, gfp_t gfp) +{ AuUnsupport(); return 0; } +static ssize_t aufs_direct_IO(int rw, struct kiocb *iocb, + const struct iovec *iov, loff_t offset, + unsigned long nr_segs) +{ AuUnsupport(); return 0; } +#endif /* CONFIG_AUFS_DEBUG */ + +struct address_space_operations aufs_aop = { + .readpage = aufs_readpage, +#ifdef CONFIG_AUFS_DEBUG + .writepage = aufs_writepage, + .sync_page = aufs_sync_page, + .set_page_dirty = aufs_set_page_dirty, + .write_begin = aufs_write_begin, + .write_end = aufs_write_end, + .invalidatepage = aufs_invalidatepage, + .releasepage = aufs_releasepage, + .direct_IO = aufs_direct_IO, +#endif /* CONFIG_AUFS_DEBUG */ +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/vfsub.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/vfsub.c @@ -0,0 +1,736 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sub-routines for VFS + */ + +#include +#include +#include +#include +#include "aufs.h" + +int vfsub_update_h_iattr(struct path *h_path, int *did) +{ + int err; + struct kstat st; + struct super_block *h_sb; + + /* for remote fs, leave work for its getattr or d_revalidate */ + /* for bad i_attr fs, handle them in aufs_getattr() */ + /* still some fs may acquire i_mutex. we need to skip them */ + err = 0; + if (!did) + did = &err; + h_sb = h_path->dentry->d_sb; + *did = (!au_test_fs_remote(h_sb) && au_test_fs_refresh_iattr(h_sb)); + if (*did) + err = vfs_getattr(h_path->mnt, h_path->dentry, &st); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct file *vfsub_filp_open(const char *path, int oflags, int mode) +{ + struct file *file; + + lockdep_off(); + file = filp_open(path, oflags, mode); + lockdep_on(); + if (IS_ERR(file)) + goto out; + vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ + + out: + return file; +} + +int vfsub_kern_path(const char *name, unsigned int flags, struct path *path) +{ + int err; + + /* lockdep_off(); */ + err = kern_path(name, flags, path); + /* lockdep_on(); */ + if (!err && path->dentry->d_inode) + vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/ + return err; +} + +struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, + int len) +{ + struct path path = { + .mnt = NULL + }; + + IMustLock(parent->d_inode); + + path.dentry = lookup_one_len(name, parent, len); + if (IS_ERR(path.dentry)) + goto out; + if (path.dentry->d_inode) + vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/ + + out: + return path.dentry; +} + +struct dentry *vfsub_lookup_hash(struct nameidata *nd) +{ + struct path path = { + .mnt = nd->path.mnt + }; + + IMustLock(nd->path.dentry->d_inode); + + path.dentry = lookup_hash(nd); + if (!IS_ERR(path.dentry) && path.dentry->d_inode) + vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/ + + return path.dentry; +} + +/* ---------------------------------------------------------------------- */ + +struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, + struct dentry *d2, struct au_hinode *hdir2) +{ + struct dentry *d; + + lockdep_off(); + d = lock_rename(d1, d2); + lockdep_on(); + au_hin_suspend(hdir1); + if (hdir1 != hdir2) + au_hin_suspend(hdir2); + + return d; +} + +void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, + struct dentry *d2, struct au_hinode *hdir2) +{ + au_hin_resume(hdir1); + if (hdir1 != hdir2) + au_hin_resume(hdir2); + lockdep_off(); + unlock_rename(d1, d2); + lockdep_on(); +} + +/* ---------------------------------------------------------------------- */ + +int vfsub_create(struct inode *dir, struct path *path, int mode) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_mknod(path, path->dentry, mode, 0); + path->dentry = d; + if (unlikely(err)) + goto out; + + if (au_test_fs_null_nd(dir->i_sb)) + err = vfs_create(dir, path->dentry, mode, NULL); + else { + struct nameidata h_nd; + + memset(&h_nd, 0, sizeof(h_nd)); + h_nd.flags = LOOKUP_CREATE; + h_nd.intent.open.flags = O_CREAT + | vfsub_fmode_to_uint(FMODE_READ); + h_nd.intent.open.create_mode = mode; + h_nd.path.dentry = path->dentry->d_parent; + h_nd.path.mnt = path->mnt; + path_get(&h_nd.path); + err = vfs_create(dir, path->dentry, mode, &h_nd); + path_put(&h_nd.path); + } + + if (!err) { + struct path tmp = *path; + int did; + + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = path->dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +int vfsub_symlink(struct inode *dir, struct path *path, const char *symname) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_symlink(path, path->dentry, symname); + path->dentry = d; + if (unlikely(err)) + goto out; + + err = vfs_symlink(dir, path->dentry, symname); + if (!err) { + struct path tmp = *path; + int did; + + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = path->dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_mknod(path, path->dentry, mode, dev); + path->dentry = d; + if (unlikely(err)) + goto out; + + err = vfs_mknod(dir, path->dentry, mode, dev); + if (!err) { + struct path tmp = *path; + int did; + + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = path->dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +static int au_test_nlink(struct inode *inode) +{ + const unsigned int link_max = UINT_MAX >> 1; /* rough margin */ + + if (!au_test_fs_no_limit_nlink(inode->i_sb) + || inode->i_nlink < link_max) + return 0; + return -EMLINK; +} + +int vfsub_link(struct dentry *src_dentry, struct inode *dir, struct path *path) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + err = au_test_nlink(src_dentry->d_inode); + if (unlikely(err)) + return err; + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_link(src_dentry, path, path->dentry); + path->dentry = d; + if (unlikely(err)) + goto out; + + lockdep_off(); + err = vfs_link(src_dentry, dir, path->dentry); + lockdep_on(); + if (!err) { + struct path tmp = *path; + int did; + + /* fuse has different memory inode for the same inumber */ + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = path->dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + tmp.dentry = src_dentry; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +int vfsub_rename(struct inode *src_dir, struct dentry *src_dentry, + struct inode *dir, struct path *path) +{ + int err; + struct path tmp = { + .mnt = path->mnt + }; + struct dentry *d; + + IMustLock(dir); + IMustLock(src_dir); + + d = path->dentry; + path->dentry = d->d_parent; + tmp.dentry = src_dentry->d_parent; + err = security_path_rename(&tmp, src_dentry, path, path->dentry); + path->dentry = d; + if (unlikely(err)) + goto out; + + lockdep_off(); + err = vfs_rename(src_dir, src_dentry, dir, path->dentry); + lockdep_on(); + if (!err) { + int did; + + tmp.dentry = d->d_parent; + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = src_dentry; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + tmp.dentry = src_dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +int vfsub_mkdir(struct inode *dir, struct path *path, int mode) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_mkdir(path, path->dentry, mode); + path->dentry = d; + if (unlikely(err)) + goto out; + + err = vfs_mkdir(dir, path->dentry, mode); + if (!err) { + struct path tmp = *path; + int did; + + vfsub_update_h_iattr(&tmp, &did); + if (did) { + tmp.dentry = path->dentry->d_parent; + vfsub_update_h_iattr(&tmp, /*did*/NULL); + } + /*ignore*/ + } + + out: + return err; +} + +int vfsub_rmdir(struct inode *dir, struct path *path) +{ + int err; + struct dentry *d; + + IMustLock(dir); + + d = path->dentry; + path->dentry = d->d_parent; + err = security_path_rmdir(path, path->dentry); + path->dentry = d; + if (unlikely(err)) + goto out; + + lockdep_off(); + err = vfs_rmdir(dir, path->dentry); + lockdep_on(); + if (!err) { + struct path tmp = { + .dentry = path->dentry->d_parent, + .mnt = path->mnt + }; + + vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ + } + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, + loff_t *ppos) +{ + ssize_t err; + + err = vfs_read(file, ubuf, count, ppos); + if (err >= 0) + vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ + return err; +} + +/* todo: kernel_read()? */ +ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, + loff_t *ppos) +{ + ssize_t err; + mm_segment_t oldfs; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + err = vfsub_read_u(file, (char __user *)kbuf, count, ppos); + set_fs(oldfs); + return err; +} + +ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, + loff_t *ppos) +{ + ssize_t err; + + lockdep_off(); + err = vfs_write(file, ubuf, count, ppos); + lockdep_on(); + if (err >= 0) + vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ + return err; +} + +ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, loff_t *ppos) +{ + ssize_t err; + mm_segment_t oldfs; + + oldfs = get_fs(); + set_fs(KERNEL_DS); + err = vfsub_write_u(file, (const char __user *)kbuf, count, ppos); + set_fs(oldfs); + return err; +} + +int vfsub_readdir(struct file *file, filldir_t filldir, void *arg) +{ + int err; + + lockdep_off(); + err = vfs_readdir(file, filldir, arg); + lockdep_on(); + if (err >= 0) + vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ + return err; +} + +long vfsub_splice_to(struct file *in, loff_t *ppos, + struct pipe_inode_info *pipe, size_t len, + unsigned int flags) +{ + long err; + + lockdep_off(); + err = do_splice_to(in, ppos, pipe, len, flags); + lockdep_on(); + if (err >= 0) + vfsub_update_h_iattr(&in->f_path, /*did*/NULL); /*ignore*/ + return err; +} + +long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, + loff_t *ppos, size_t len, unsigned int flags) +{ + long err; + + lockdep_off(); + err = do_splice_from(pipe, out, ppos, len, flags); + lockdep_on(); + if (err >= 0) + vfsub_update_h_iattr(&out->f_path, /*did*/NULL); /*ignore*/ + return err; +} + +/* cf. open.c:do_sys_truncate() and do_sys_ftruncate() */ +int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, + struct file *h_file) +{ + int err; + struct inode *h_inode; + + h_inode = h_path->dentry->d_inode; + if (!h_file) { + err = mnt_want_write(h_path->mnt); + if (err) + goto out; + err = inode_permission(h_inode, MAY_WRITE); + if (err) + goto out_mnt; + err = get_write_access(h_inode); + if (err) + goto out_mnt; + err = break_lease(h_inode, vfsub_fmode_to_uint(FMODE_WRITE)); + if (err) + goto out_inode; + } + + err = locks_verify_truncate(h_inode, h_file, length); + if (!err) + err = security_path_truncate(h_path, length, attr); + if (!err) { + lockdep_off(); + err = do_truncate(h_path->dentry, length, attr, h_file); + lockdep_on(); + } + + out_inode: + if (!h_file) + put_write_access(h_inode); + out_mnt: + if (!h_file) + mnt_drop_write(h_path->mnt); + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct au_vfsub_mkdir_args { + int *errp; + struct inode *dir; + struct path *path; + int mode; +}; + +static void au_call_vfsub_mkdir(void *args) +{ + struct au_vfsub_mkdir_args *a = args; + *a->errp = vfsub_mkdir(a->dir, a->path, a->mode); +} + +int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode) +{ + int err, do_sio, wkq_err; + + do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); + if (!do_sio) + err = vfsub_mkdir(dir, path, mode); + else { + struct au_vfsub_mkdir_args args = { + .errp = &err, + .dir = dir, + .path = path, + .mode = mode + }; + wkq_err = au_wkq_wait(au_call_vfsub_mkdir, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + return err; +} + +struct au_vfsub_rmdir_args { + int *errp; + struct inode *dir; + struct path *path; +}; + +static void au_call_vfsub_rmdir(void *args) +{ + struct au_vfsub_rmdir_args *a = args; + *a->errp = vfsub_rmdir(a->dir, a->path); +} + +int vfsub_sio_rmdir(struct inode *dir, struct path *path) +{ + int err, do_sio, wkq_err; + + do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); + if (!do_sio) + err = vfsub_rmdir(dir, path); + else { + struct au_vfsub_rmdir_args args = { + .errp = &err, + .dir = dir, + .path = path + }; + wkq_err = au_wkq_wait(au_call_vfsub_rmdir, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct notify_change_args { + int *errp; + struct path *path; + struct iattr *ia; +}; + +static void call_notify_change(void *args) +{ + struct notify_change_args *a = args; + struct inode *h_inode; + + h_inode = a->path->dentry->d_inode; + IMustLock(h_inode); + + *a->errp = -EPERM; + if (!IS_IMMUTABLE(h_inode) && !IS_APPEND(h_inode)) { + lockdep_off(); + *a->errp = notify_change(a->path->dentry, a->ia); + lockdep_on(); + if (!*a->errp) + vfsub_update_h_iattr(a->path, /*did*/NULL); /*ignore*/ + } + AuTraceErr(*a->errp); +} + +int vfsub_notify_change(struct path *path, struct iattr *ia) +{ + int err; + struct notify_change_args args = { + .errp = &err, + .path = path, + .ia = ia + }; + + call_notify_change(&args); + + return err; +} + +int vfsub_sio_notify_change(struct path *path, struct iattr *ia) +{ + int err, wkq_err; + struct notify_change_args args = { + .errp = &err, + .path = path, + .ia = ia + }; + + wkq_err = au_wkq_wait(call_notify_change, &args); + if (unlikely(wkq_err)) + err = wkq_err; + + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct unlink_args { + int *errp; + struct inode *dir; + struct path *path; +}; + +static void call_unlink(void *args) +{ + struct unlink_args *a = args; + struct dentry *d = a->path->dentry; + struct inode *h_inode; + const int stop_sillyrename = (au_test_nfs(d->d_sb) + && atomic_read(&d->d_count) == 1); + + IMustLock(a->dir); + + a->path->dentry = d->d_parent; + *a->errp = security_path_unlink(a->path, d); + a->path->dentry = d; + if (unlikely(*a->errp)) + return; + + if (!stop_sillyrename) + dget(d); + h_inode = d->d_inode; + if (h_inode) + atomic_inc(&h_inode->i_count); + + lockdep_off(); + *a->errp = vfs_unlink(a->dir, d); + lockdep_on(); + if (!*a->errp) { + struct path tmp = { + .dentry = d->d_parent, + .mnt = a->path->mnt + }; + vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ + } + + if (!stop_sillyrename) + dput(d); + if (h_inode) + iput(h_inode); + + AuTraceErr(*a->errp); +} + +/* + * @dir: must be locked. + * @dentry: target dentry. + */ +int vfsub_unlink(struct inode *dir, struct path *path, int force) +{ + int err; + struct unlink_args args = { + .errp = &err, + .dir = dir, + .path = path + }; + + if (!force) + call_unlink(&args); + else { + int wkq_err; + + wkq_err = au_wkq_wait(call_unlink, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/sysaufs.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/sysaufs.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sysfs interface and lifetime management + * they are necessary regardless sysfs is disabled. + */ + +#include +#include +#include +#include "aufs.h" + +unsigned long sysaufs_si_mask; +struct kset *sysaufs_ket; + +#define AuSiAttr(_name) { \ + .attr = { .name = __stringify(_name), .mode = 0444 }, \ + .show = sysaufs_si_##_name, \ +} + +static struct sysaufs_si_attr sysaufs_si_attr_xi_path = AuSiAttr(xi_path); +struct attribute *sysaufs_si_attrs[] = { + &sysaufs_si_attr_xi_path.attr, + NULL, +}; + +static struct sysfs_ops au_sbi_ops = { + .show = sysaufs_si_show +}; + +static struct kobj_type au_sbi_ktype = { + .release = au_si_free, + .sysfs_ops = &au_sbi_ops, + .default_attrs = sysaufs_si_attrs +}; + +/* ---------------------------------------------------------------------- */ + +int sysaufs_si_init(struct au_sbinfo *sbinfo) +{ + int err; + + sbinfo->si_kobj.kset = sysaufs_ket; + /* cf. sysaufs_name() */ + err = kobject_init_and_add + (&sbinfo->si_kobj, &au_sbi_ktype, /*&sysaufs_ket->kobj*/NULL, + SysaufsSiNamePrefix "%lx", sysaufs_si_id(sbinfo)); + + dbgaufs_si_null(sbinfo); + if (!err) { + err = dbgaufs_si_init(sbinfo); + if (unlikely(err)) + kobject_put(&sbinfo->si_kobj); + } + return err; +} + +void sysaufs_fin(void) +{ + dbgaufs_fin(); + sysfs_remove_group(&sysaufs_ket->kobj, sysaufs_attr_group); + kset_unregister(sysaufs_ket); +} + +int __init sysaufs_init(void) +{ + int err; + + do { + get_random_bytes(&sysaufs_si_mask, sizeof(sysaufs_si_mask)); + } while (!sysaufs_si_mask); + + sysaufs_ket = kset_create_and_add(AUFS_NAME, NULL, fs_kobj); + err = PTR_ERR(sysaufs_ket); + if (IS_ERR(sysaufs_ket)) + goto out; + err = sysfs_create_group(&sysaufs_ket->kobj, sysaufs_attr_group); + if (unlikely(err)) { + kset_unregister(sysaufs_ket); + goto out; + } + + err = dbgaufs_init(); + if (unlikely(err)) + sysaufs_fin(); + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dbgaufs.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dbgaufs.h @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * debugfs interface + */ + +#ifndef __DBGAUFS_H__ +#define __DBGAUFS_H__ + +#ifdef __KERNEL__ + +#include +#include + +struct super_block; +struct au_sbinfo; + +#ifdef CONFIG_DEBUG_FS +/* dbgaufs.c */ +void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); +void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex); +void dbgaufs_si_fin(struct au_sbinfo *sbinfo); +int dbgaufs_si_init(struct au_sbinfo *sbinfo); +void dbgaufs_fin(void); +int __init dbgaufs_init(void); + +#else + +static inline +void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) +{ + /* empty */ +} + +static inline +void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) +{ + /* empty */ +} + +static inline +void dbgaufs_si_fin(struct au_sbinfo *sbinfo) +{ + /* empty */ +} + +static inline +int dbgaufs_si_init(struct au_sbinfo *sbinfo) +{ + return 0; +} + +#define dbgaufs_fin() do {} while (0) + +static inline +int __init dbgaufs_init(void) +{ + return 0; +} +#endif /* CONFIG_DEBUG_FS */ + +#endif /* __KERNEL__ */ +#endif /* __DBGAUFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/wkq.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/wkq.c @@ -0,0 +1,259 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * workqueue for asynchronous/super-io operations + * todo: try new dredential scheme + */ + +#include +#include "aufs.h" + +/* internal workqueue named AUFS_WKQ_NAME */ +static struct au_wkq { + struct workqueue_struct *q; + + /* balancing */ + atomic_t busy; +} *au_wkq; + +struct au_wkinfo { + struct work_struct wk; + struct super_block *sb; + + unsigned int flags; /* see wkq.h */ + + au_wkq_func_t func; + void *args; + + atomic_t *busyp; + struct completion *comp; +}; + +/* ---------------------------------------------------------------------- */ + +static int enqueue(struct au_wkq *wkq, struct au_wkinfo *wkinfo) +{ + wkinfo->busyp = &wkq->busy; + if (au_ftest_wkq(wkinfo->flags, WAIT)) + return !queue_work(wkq->q, &wkinfo->wk); + else + return !schedule_work(&wkinfo->wk); +} + +static void do_wkq(struct au_wkinfo *wkinfo) +{ + unsigned int idle, n; + int i, idle_idx; + + while (1) { + if (au_ftest_wkq(wkinfo->flags, WAIT)) { + idle_idx = 0; + idle = UINT_MAX; + for (i = 0; i < aufs_nwkq; i++) { + n = atomic_inc_return(&au_wkq[i].busy); + if (n == 1 && !enqueue(au_wkq + i, wkinfo)) + return; /* success */ + + if (n < idle) { + idle_idx = i; + idle = n; + } + atomic_dec(&au_wkq[i].busy); + } + } else + idle_idx = aufs_nwkq; + + atomic_inc(&au_wkq[idle_idx].busy); + if (!enqueue(au_wkq + idle_idx, wkinfo)) + return; /* success */ + + /* impossible? */ + AuWarn1("failed to queue_work()\n"); + yield(); + } +} + +static void wkq_func(struct work_struct *wk) +{ + struct au_wkinfo *wkinfo = container_of(wk, struct au_wkinfo, wk); + + wkinfo->func(wkinfo->args); + atomic_dec_return(wkinfo->busyp); + if (au_ftest_wkq(wkinfo->flags, WAIT)) + complete(wkinfo->comp); + else { + kobject_put(&au_sbi(wkinfo->sb)->si_kobj); + module_put(THIS_MODULE); + kfree(wkinfo); + } +} + +/* + * Since struct completion is large, try allocating it dynamically. + */ +#if defined(CONFIG_4KSTACKS) || defined(AuTest4KSTACKS) +#define AuWkqCompDeclare(name) struct completion *comp = NULL + +static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp) +{ + *comp = kmalloc(sizeof(**comp), GFP_NOFS); + if (*comp) { + init_completion(*comp); + wkinfo->comp = *comp; + return 0; + } + return -ENOMEM; +} + +static void au_wkq_comp_free(struct completion *comp) +{ + kfree(comp); +} + +#else + +/* no braces */ +#define AuWkqCompDeclare(name) \ + DECLARE_COMPLETION_ONSTACK(_ ## name); \ + struct completion *comp = &_ ## name + +static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp) +{ + wkinfo->comp = *comp; + return 0; +} + +static void au_wkq_comp_free(struct completion *comp __maybe_unused) +{ + /* empty */ +} +#endif /* 4KSTACKS */ + +static void au_wkq_run(struct au_wkinfo *wkinfo) +{ + au_dbg_verify_kthread(); + INIT_WORK(&wkinfo->wk, wkq_func); + do_wkq(wkinfo); +} + +int au_wkq_wait(au_wkq_func_t func, void *args) +{ + int err; + AuWkqCompDeclare(comp); + struct au_wkinfo wkinfo = { + .flags = AuWkq_WAIT, + .func = func, + .args = args + }; + + err = au_wkq_comp_alloc(&wkinfo, &comp); + if (!err) { + au_wkq_run(&wkinfo); + /* no timeout, no interrupt */ + wait_for_completion(wkinfo.comp); + au_wkq_comp_free(comp); + } + + return err; + +} + +int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb) +{ + int err; + struct au_wkinfo *wkinfo; + + atomic_inc(&au_sbi(sb)->si_nowait.nw_len); + + /* + * wkq_func() must free this wkinfo. + * it highly depends upon the implementation of workqueue. + */ + err = 0; + wkinfo = kmalloc(sizeof(*wkinfo), GFP_NOFS); + if (wkinfo) { + wkinfo->sb = sb; + wkinfo->flags = !AuWkq_WAIT; + wkinfo->func = func; + wkinfo->args = args; + wkinfo->comp = NULL; + kobject_get(&au_sbi(sb)->si_kobj); + __module_get(THIS_MODULE); + + au_wkq_run(wkinfo); + } else { + err = -ENOMEM; + atomic_dec(&au_sbi(sb)->si_nowait.nw_len); + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +void au_nwt_init(struct au_nowait_tasks *nwt) +{ + atomic_set(&nwt->nw_len, 0); + /* smp_mb();*/ /* atomic_set */ + init_waitqueue_head(&nwt->nw_wq); +} + +void au_wkq_fin(void) +{ + int i; + + for (i = 0; i < aufs_nwkq; i++) + if (au_wkq[i].q && !IS_ERR(au_wkq[i].q)) + destroy_workqueue(au_wkq[i].q); + kfree(au_wkq); +} + +int __init au_wkq_init(void) +{ + int err, i; + struct au_wkq *nowaitq; + + /* '+1' is for accounting of nowait queue */ + err = -ENOMEM; + au_wkq = kcalloc(aufs_nwkq + 1, sizeof(*au_wkq), GFP_NOFS); + if (unlikely(!au_wkq)) + goto out; + + err = 0; + for (i = 0; i < aufs_nwkq; i++) { + au_wkq[i].q = create_singlethread_workqueue(AUFS_WKQ_NAME); + if (au_wkq[i].q && !IS_ERR(au_wkq[i].q)) { + atomic_set(&au_wkq[i].busy, 0); + continue; + } + + err = PTR_ERR(au_wkq[i].q); + au_wkq_fin(); + goto out; + } + + /* nowait accounting */ + nowaitq = au_wkq + aufs_nwkq; + atomic_set(&nowaitq->busy, 0); + nowaitq->q = NULL; + /* smp_mb(); */ /* atomic_set */ + + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/Makefile @@ -0,0 +1,23 @@ + +include ${src}/magic.mk +-include ${src}/priv_def.mk + +obj-$(CONFIG_AUFS_FS) += aufs.o +aufs-y := module.o sbinfo.o super.o branch.o xino.o sysaufs.o opts.o \ + wkq.o vfsub.o dcsub.o \ + cpup.o whout.o plink.o wbr_policy.o \ + dinfo.o dentry.o \ + finfo.o file.o f_op.o \ + dir.o vdir.o \ + iinfo.o inode.o i_op.o i_op_add.o i_op_del.o i_op_ren.o \ + ioctl.o + +# all are boolean +aufs-$(CONFIG_SYSFS) += sysfs.o +aufs-$(CONFIG_DEBUG_FS) += dbgaufs.o +aufs-$(CONFIG_AUFS_BDEV_LOOP) += loop.o +aufs-$(CONFIG_AUFS_HINOTIFY) += hinotify.o +aufs-$(CONFIG_AUFS_EXPORT) += export.o +aufs-$(CONFIG_AUFS_POLL) += poll.o +aufs-$(CONFIG_AUFS_DEBUG) += debug.o +aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/branch.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/branch.c @@ -0,0 +1,983 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * branch management + */ + +#include +#include "aufs.h" + +/* + * free a single branch + */ +static void au_br_do_free(struct au_branch *br) +{ + int i; + struct au_wbr *wbr; + + if (br->br_xino.xi_file) + fput(br->br_xino.xi_file); + mutex_destroy(&br->br_xino.xi_nondir_mtx); + + AuDebugOn(atomic_read(&br->br_count)); + + wbr = br->br_wbr; + if (wbr) { + for (i = 0; i < AuBrWh_Last; i++) + dput(wbr->wbr_wh[i]); + AuDebugOn(atomic_read(&wbr->wbr_wh_running)); + AuRwDestroy(&wbr->wbr_wh_rwsem); + } + + /* some filesystems acquire extra lock */ + lockdep_off(); + mntput(br->br_mnt); + lockdep_on(); + + kfree(wbr); + kfree(br); +} + +/* + * frees all branches + */ +void au_br_free(struct au_sbinfo *sbinfo) +{ + aufs_bindex_t bmax; + struct au_branch **br; + + AuRwMustWriteLock(&sbinfo->si_rwsem); + + bmax = sbinfo->si_bend + 1; + br = sbinfo->si_branch; + while (bmax--) + au_br_do_free(*br++); +} + +/* + * find the index of a branch which is specified by @br_id. + */ +int au_br_index(struct super_block *sb, aufs_bindex_t br_id) +{ + aufs_bindex_t bindex, bend; + + bend = au_sbend(sb); + for (bindex = 0; bindex <= bend; bindex++) + if (au_sbr_id(sb, bindex) == br_id) + return bindex; + return -1; +} + +/* ---------------------------------------------------------------------- */ + +/* + * add a branch + */ + +static int test_overlap(struct super_block *sb, struct dentry *h_d1, + struct dentry *h_d2) +{ + if (unlikely(h_d1 == h_d2)) + return 1; + return !!au_test_subdir(h_d1, h_d2) + || !!au_test_subdir(h_d2, h_d1) + || au_test_loopback_overlap(sb, h_d1, h_d2) + || au_test_loopback_overlap(sb, h_d2, h_d1); +} + +/* + * returns a newly allocated branch. @new_nbranch is a number of branches + * after adding a branch. + */ +static struct au_branch *au_br_alloc(struct super_block *sb, int new_nbranch, + int perm) +{ + struct au_branch *add_branch; + struct dentry *root; + + root = sb->s_root; + add_branch = kmalloc(sizeof(*add_branch), GFP_NOFS); + if (unlikely(!add_branch)) + goto out; + + add_branch->br_wbr = NULL; + if (au_br_writable(perm)) { + /* may be freed separately at changing the branch permission */ + add_branch->br_wbr = kmalloc(sizeof(*add_branch->br_wbr), + GFP_NOFS); + if (unlikely(!add_branch->br_wbr)) + goto out_br; + } + + if (unlikely(au_sbr_realloc(au_sbi(sb), new_nbranch) + || au_di_realloc(au_di(root), new_nbranch) + || au_ii_realloc(au_ii(root->d_inode), new_nbranch))) + goto out_wbr; + return add_branch; /* success */ + + out_wbr: + kfree(add_branch->br_wbr); + out_br: + kfree(add_branch); + out: + return ERR_PTR(-ENOMEM); +} + +/* + * test if the branch permission is legal or not. + */ +static int test_br(struct inode *inode, int brperm, char *path) +{ + int err; + + err = 0; + if (unlikely(au_br_writable(brperm) && IS_RDONLY(inode))) { + AuErr("write permission for readonly mount or inode, %s\n", + path); + err = -EINVAL; + } + + return err; +} + +/* + * returns: + * 0: success, the caller will add it + * plus: success, it is already unified, the caller should ignore it + * minus: error + */ +static int test_add(struct super_block *sb, struct au_opt_add *add, int remount) +{ + int err; + aufs_bindex_t bend, bindex; + struct dentry *root; + struct inode *inode, *h_inode; + + root = sb->s_root; + bend = au_sbend(sb); + if (unlikely(bend >= 0 + && au_find_dbindex(root, add->path.dentry) >= 0)) { + err = 1; + if (!remount) { + err = -EINVAL; + AuErr("%s duplicated\n", add->pathname); + } + goto out; + } + + err = -ENOSPC; /* -E2BIG; */ + if (unlikely(AUFS_BRANCH_MAX <= add->bindex + || AUFS_BRANCH_MAX - 1 <= bend)) { + AuErr("number of branches exceeded %s\n", add->pathname); + goto out; + } + + err = -EDOM; + if (unlikely(add->bindex < 0 || bend + 1 < add->bindex)) { + AuErr("bad index %d\n", add->bindex); + goto out; + } + + inode = add->path.dentry->d_inode; + err = -ENOENT; + if (unlikely(!inode->i_nlink)) { + AuErr("no existence %s\n", add->pathname); + goto out; + } + + err = -EINVAL; + if (unlikely(inode->i_sb == sb)) { + AuErr("%s must be outside\n", add->pathname); + goto out; + } + + if (unlikely(au_test_fs_unsuppoted(inode->i_sb))) { + AuErr("unsupported filesystem, %s (%s)\n", + add->pathname, au_sbtype(inode->i_sb)); + goto out; + } + + err = test_br(add->path.dentry->d_inode, add->perm, add->pathname); + if (unlikely(err)) + goto out; + + if (bend < 0) + return 0; /* success */ + + err = -EINVAL; + for (bindex = 0; bindex <= bend; bindex++) + if (unlikely(test_overlap(sb, add->path.dentry, + au_h_dptr(root, bindex)))) { + AuErr("%s is overlapped\n", add->pathname); + goto out; + } + + err = 0; + if (au_opt_test(au_mntflags(sb), WARN_PERM)) { + h_inode = au_h_dptr(root, 0)->d_inode; + if ((h_inode->i_mode & S_IALLUGO) != (inode->i_mode & S_IALLUGO) + || h_inode->i_uid != inode->i_uid + || h_inode->i_gid != inode->i_gid) + AuWarn("uid/gid/perm %s %u/%u/0%o, %u/%u/0%o\n", + add->pathname, + inode->i_uid, inode->i_gid, + (inode->i_mode & S_IALLUGO), + h_inode->i_uid, h_inode->i_gid, + (h_inode->i_mode & S_IALLUGO)); + } + + out: + return err; +} + +/* + * initialize or clean the whiteouts for an adding branch + */ +static int au_br_init_wh(struct super_block *sb, struct au_branch *br, + int new_perm, struct dentry *h_root) +{ + int err, old_perm; + aufs_bindex_t bindex; + struct mutex *h_mtx; + struct au_wbr *wbr; + struct au_hinode *hdir; + + wbr = br->br_wbr; + old_perm = br->br_perm; + br->br_perm = new_perm; + hdir = NULL; + h_mtx = NULL; + bindex = au_br_index(sb, br->br_id); + if (0 <= bindex) { + hdir = au_hi(sb->s_root->d_inode, bindex); + au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT); + } else { + h_mtx = &h_root->d_inode->i_mutex; + mutex_lock_nested(h_mtx, AuLsc_I_PARENT); + } + if (!wbr) + err = au_wh_init(h_root, br, sb); + else { + wbr_wh_write_lock(wbr); + err = au_wh_init(h_root, br, sb); + wbr_wh_write_unlock(wbr); + } + if (hdir) + au_hin_imtx_unlock(hdir); + else + mutex_unlock(h_mtx); + br->br_perm = old_perm; + + if (!err && wbr && !au_br_writable(new_perm)) { + kfree(wbr); + br->br_wbr = NULL; + } + + return err; +} + +static int au_wbr_init(struct au_branch *br, struct super_block *sb, + int perm, struct path *path) +{ + int err; + struct au_wbr *wbr; + + wbr = br->br_wbr; + au_rw_init(&wbr->wbr_wh_rwsem); + memset(wbr->wbr_wh, 0, sizeof(wbr->wbr_wh)); + atomic_set(&wbr->wbr_wh_running, 0); + wbr->wbr_bytes = 0; + + err = au_br_init_wh(sb, br, perm, path->dentry); + + return err; +} + +/* intialize a new branch */ +static int au_br_init(struct au_branch *br, struct super_block *sb, + struct au_opt_add *add) +{ + int err; + + err = 0; + memset(&br->br_xino, 0, sizeof(br->br_xino)); + mutex_init(&br->br_xino.xi_nondir_mtx); + br->br_perm = add->perm; + br->br_mnt = add->path.mnt; /* set first, mntget() later */ + atomic_set(&br->br_count, 0); + br->br_xino_upper = AUFS_XINO_TRUNC_INIT; + atomic_set(&br->br_xino_running, 0); + br->br_id = au_new_br_id(sb); + + if (au_br_writable(add->perm)) { + err = au_wbr_init(br, sb, add->perm, &add->path); + if (unlikely(err)) + goto out; + } + + if (au_opt_test(au_mntflags(sb), XINO)) { + err = au_xino_br(sb, br, add->path.dentry->d_inode->i_ino, + au_sbr(sb, 0)->br_xino.xi_file, /*do_test*/1); + if (unlikely(err)) { + AuDebugOn(br->br_xino.xi_file); + goto out; + } + } + + sysaufs_br_init(br); + mntget(add->path.mnt); + + out: + return err; +} + +static void au_br_do_add_brp(struct au_sbinfo *sbinfo, aufs_bindex_t bindex, + struct au_branch *br, aufs_bindex_t bend, + aufs_bindex_t amount) +{ + struct au_branch **brp; + + AuRwMustWriteLock(&sbinfo->si_rwsem); + + brp = sbinfo->si_branch + bindex; + memmove(brp + 1, brp, sizeof(*brp) * amount); + *brp = br; + sbinfo->si_bend++; + if (unlikely(bend < 0)) + sbinfo->si_bend = 0; +} + +static void au_br_do_add_hdp(struct au_dinfo *dinfo, aufs_bindex_t bindex, + aufs_bindex_t bend, aufs_bindex_t amount) +{ + struct au_hdentry *hdp; + + AuRwMustWriteLock(&dinfo->di_rwsem); + + hdp = dinfo->di_hdentry + bindex; + memmove(hdp + 1, hdp, sizeof(*hdp) * amount); + au_h_dentry_init(hdp); + dinfo->di_bend++; + if (unlikely(bend < 0)) + dinfo->di_bstart = 0; +} + +static void au_br_do_add_hip(struct au_iinfo *iinfo, aufs_bindex_t bindex, + aufs_bindex_t bend, aufs_bindex_t amount) +{ + struct au_hinode *hip; + + AuRwMustWriteLock(&iinfo->ii_rwsem); + + hip = iinfo->ii_hinode + bindex; + memmove(hip + 1, hip, sizeof(*hip) * amount); + hip->hi_inode = NULL; + au_hin_init(hip, NULL); + iinfo->ii_bend++; + if (unlikely(bend < 0)) + iinfo->ii_bstart = 0; +} + +static void au_br_do_add(struct super_block *sb, struct dentry *h_dentry, + struct au_branch *br, aufs_bindex_t bindex) +{ + struct dentry *root; + struct inode *root_inode; + aufs_bindex_t bend, amount; + + root = sb->s_root; + root_inode = root->d_inode; + au_plink_block_maintain(sb); + bend = au_sbend(sb); + amount = bend + 1 - bindex; + au_br_do_add_brp(au_sbi(sb), bindex, br, bend, amount); + au_br_do_add_hdp(au_di(root), bindex, bend, amount); + au_br_do_add_hip(au_ii(root_inode), bindex, bend, amount); + au_set_h_dptr(root, bindex, dget(h_dentry)); + au_set_h_iptr(root_inode, bindex, au_igrab(h_dentry->d_inode), + /*flags*/0); +} + +int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount) +{ + int err; + unsigned long long maxb; + aufs_bindex_t bend, add_bindex; + struct dentry *root, *h_dentry; + struct inode *root_inode; + struct au_branch *add_branch; + + root = sb->s_root; + root_inode = root->d_inode; + IMustLock(root_inode); + err = test_add(sb, add, remount); + if (unlikely(err < 0)) + goto out; + if (err) { + err = 0; + goto out; /* success */ + } + + bend = au_sbend(sb); + add_branch = au_br_alloc(sb, bend + 2, add->perm); + err = PTR_ERR(add_branch); + if (IS_ERR(add_branch)) + goto out; + + err = au_br_init(add_branch, sb, add); + if (unlikely(err)) { + au_br_do_free(add_branch); + goto out; + } + + add_bindex = add->bindex; + h_dentry = add->path.dentry; + if (!remount) + au_br_do_add(sb, h_dentry, add_branch, add_bindex); + else { + sysaufs_brs_del(sb, add_bindex); + au_br_do_add(sb, h_dentry, add_branch, add_bindex); + sysaufs_brs_add(sb, add_bindex); + } + + if (!add_bindex) + au_cpup_attr_all(root_inode, /*force*/1); + else + au_add_nlink(root_inode, h_dentry->d_inode); + maxb = h_dentry->d_sb->s_maxbytes; + if (sb->s_maxbytes < maxb) + sb->s_maxbytes = maxb; + + /* + * this test/set prevents aufs from handling unnecesary inotify events + * of xino files, in a case of re-adding a writable branch which was + * once detached from aufs. + */ + if (au_xino_brid(sb) < 0 + && au_br_writable(add_branch->br_perm) + && !au_test_fs_bad_xino(h_dentry->d_sb) + && add_branch->br_xino.xi_file + && add_branch->br_xino.xi_file->f_dentry->d_parent == h_dentry) + au_xino_brid_set(sb, add_branch->br_id); + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * delete a branch + */ + +/* to show the line number, do not make it inlined function */ +#define AuVerbose(do_info, fmt, args...) do { \ + if (do_info) \ + AuInfo(fmt, ##args); \ +} while (0) + +/* + * test if the branch is deletable or not. + */ +static int test_dentry_busy(struct dentry *root, aufs_bindex_t bindex, + unsigned int sigen) +{ + int err, i, j, ndentry; + aufs_bindex_t bstart, bend; + unsigned char verbose; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + struct dentry *d; + struct inode *inode; + + err = au_dpages_init(&dpages, GFP_NOFS); + if (unlikely(err)) + goto out; + err = au_dcsub_pages(&dpages, root, NULL, NULL); + if (unlikely(err)) + goto out_dpages; + + verbose = !!au_opt_test(au_mntflags(root->d_sb), VERBOSE); + for (i = 0; !err && i < dpages.ndpage; i++) { + dpage = dpages.dpages + i; + ndentry = dpage->ndentry; + for (j = 0; !err && j < ndentry; j++) { + d = dpage->dentries[j]; + AuDebugOn(!atomic_read(&d->d_count)); + inode = d->d_inode; + if (au_digen(d) == sigen && au_iigen(inode) == sigen) + di_read_lock_child(d, AuLock_IR); + else { + di_write_lock_child(d); + err = au_reval_dpath(d, sigen); + if (!err) + di_downgrade_lock(d, AuLock_IR); + else { + di_write_unlock(d); + break; + } + } + + bstart = au_dbstart(d); + bend = au_dbend(d); + if (bstart <= bindex + && bindex <= bend + && au_h_dptr(d, bindex) + && (!S_ISDIR(inode->i_mode) || bstart == bend)) { + err = -EBUSY; + AuVerbose(verbose, "busy %.*s\n", AuDLNPair(d)); + } + di_read_unlock(d, AuLock_IR); + } + } + + out_dpages: + au_dpages_free(&dpages); + out: + return err; +} + +static int test_inode_busy(struct super_block *sb, aufs_bindex_t bindex, + unsigned int sigen) +{ + int err; + struct inode *i; + aufs_bindex_t bstart, bend; + unsigned char verbose; + + err = 0; + verbose = !!au_opt_test(au_mntflags(sb), VERBOSE); + list_for_each_entry(i, &sb->s_inodes, i_sb_list) { + AuDebugOn(!atomic_read(&i->i_count)); + if (!list_empty(&i->i_dentry)) + continue; + + if (au_iigen(i) == sigen) + ii_read_lock_child(i); + else { + ii_write_lock_child(i); + err = au_refresh_hinode_self(i, /*do_attr*/1); + if (!err) + ii_downgrade_lock(i); + else { + ii_write_unlock(i); + break; + } + } + + bstart = au_ibstart(i); + bend = au_ibend(i); + if (bstart <= bindex + && bindex <= bend + && au_h_iptr(i, bindex) + && (!S_ISDIR(i->i_mode) || bstart == bend)) { + err = -EBUSY; + AuVerbose(verbose, "busy i%lu\n", i->i_ino); + ii_read_unlock(i); + break; + } + ii_read_unlock(i); + } + + return err; +} + +static int test_children_busy(struct dentry *root, aufs_bindex_t bindex) +{ + int err; + unsigned int sigen; + + sigen = au_sigen(root->d_sb); + DiMustNoWaiters(root); + IiMustNoWaiters(root->d_inode); + di_write_unlock(root); + err = test_dentry_busy(root, bindex, sigen); + if (!err) + err = test_inode_busy(root->d_sb, bindex, sigen); + di_write_lock_child(root); /* aufs_write_lock() calls ..._child() */ + + return err; +} + +static void au_br_do_del_brp(struct au_sbinfo *sbinfo, + const aufs_bindex_t bindex, + const aufs_bindex_t bend) +{ + struct au_branch **brp, **p; + + AuRwMustWriteLock(&sbinfo->si_rwsem); + + brp = sbinfo->si_branch + bindex; + if (bindex < bend) + memmove(brp, brp + 1, sizeof(*brp) * (bend - bindex)); + sbinfo->si_branch[0 + bend] = NULL; + sbinfo->si_bend--; + + p = krealloc(sbinfo->si_branch, sizeof(*p) * bend, GFP_NOFS); + if (p) + sbinfo->si_branch = p; +} + +static void au_br_do_del_hdp(struct au_dinfo *dinfo, const aufs_bindex_t bindex, + const aufs_bindex_t bend) +{ + struct au_hdentry *hdp, *p; + + AuRwMustWriteLock(&dinfo->di_rwsem); + + hdp = dinfo->di_hdentry + bindex; + if (bindex < bend) + memmove(hdp, hdp + 1, sizeof(*hdp) * (bend - bindex)); + dinfo->di_hdentry[0 + bend].hd_dentry = NULL; + dinfo->di_bend--; + + p = krealloc(dinfo->di_hdentry, sizeof(*p) * bend, GFP_NOFS); + if (p) + dinfo->di_hdentry = p; +} + +static void au_br_do_del_hip(struct au_iinfo *iinfo, const aufs_bindex_t bindex, + const aufs_bindex_t bend) +{ + struct au_hinode *hip, *p; + + AuRwMustWriteLock(&iinfo->ii_rwsem); + + hip = iinfo->ii_hinode + bindex; + if (bindex < bend) + memmove(hip, hip + 1, sizeof(*hip) * (bend - bindex)); + iinfo->ii_hinode[0 + bend].hi_inode = NULL; + au_hin_init(iinfo->ii_hinode + bend, NULL); + iinfo->ii_bend--; + + p = krealloc(iinfo->ii_hinode, sizeof(*p) * bend, GFP_NOFS); + if (p) + iinfo->ii_hinode = p; +} + +static void au_br_do_del(struct super_block *sb, aufs_bindex_t bindex, + struct au_branch *br) +{ + aufs_bindex_t bend; + struct au_sbinfo *sbinfo; + struct dentry *root; + struct inode *inode; + + SiMustWriteLock(sb); + + root = sb->s_root; + inode = root->d_inode; + au_plink_block_maintain(sb); + sbinfo = au_sbi(sb); + bend = sbinfo->si_bend; + + dput(au_h_dptr(root, bindex)); + au_hiput(au_hi(inode, bindex)); + au_br_do_free(br); + + au_br_do_del_brp(sbinfo, bindex, bend); + au_br_do_del_hdp(au_di(root), bindex, bend); + au_br_do_del_hip(au_ii(inode), bindex, bend); +} + +int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount) +{ + int err, rerr, i; + unsigned int mnt_flags; + aufs_bindex_t bindex, bend, br_id; + unsigned char do_wh, verbose; + struct au_branch *br; + struct au_wbr *wbr; + + err = 0; + bindex = au_find_dbindex(sb->s_root, del->h_path.dentry); + if (bindex < 0) { + if (remount) + goto out; /* success */ + err = -ENOENT; + AuErr("%s no such branch\n", del->pathname); + goto out; + } + AuDbg("bindex b%d\n", bindex); + + err = -EBUSY; + mnt_flags = au_mntflags(sb); + verbose = !!au_opt_test(mnt_flags, VERBOSE); + bend = au_sbend(sb); + if (unlikely(!bend)) { + AuVerbose(verbose, "no more branches left\n"); + goto out; + } + br = au_sbr(sb, bindex); + i = atomic_read(&br->br_count); + if (unlikely(i)) { + AuVerbose(verbose, "%d file(s) opened\n", i); + goto out; + } + + wbr = br->br_wbr; + do_wh = wbr && (wbr->wbr_whbase || wbr->wbr_plink || wbr->wbr_orph); + if (do_wh) { + /* instead of WbrWhMustWriteLock(wbr) */ + SiMustWriteLock(sb); + for (i = 0; i < AuBrWh_Last; i++) { + dput(wbr->wbr_wh[i]); + wbr->wbr_wh[i] = NULL; + } + } + + err = test_children_busy(sb->s_root, bindex); + if (unlikely(err)) { + if (do_wh) + goto out_wh; + goto out; + } + + err = 0; + br_id = br->br_id; + if (!remount) + au_br_do_del(sb, bindex, br); + else { + sysaufs_brs_del(sb, bindex); + au_br_do_del(sb, bindex, br); + sysaufs_brs_add(sb, bindex); + } + + if (!bindex) + au_cpup_attr_all(sb->s_root->d_inode, /*force*/1); + else + au_sub_nlink(sb->s_root->d_inode, del->h_path.dentry->d_inode); + if (au_opt_test(mnt_flags, PLINK)) + au_plink_half_refresh(sb, br_id); + + if (sb->s_maxbytes == del->h_path.dentry->d_sb->s_maxbytes) { + bend--; + sb->s_maxbytes = 0; + for (bindex = 0; bindex <= bend; bindex++) { + unsigned long long maxb; + + maxb = au_sbr_sb(sb, bindex)->s_maxbytes; + if (sb->s_maxbytes < maxb) + sb->s_maxbytes = maxb; + } + } + + if (au_xino_brid(sb) == br->br_id) + au_xino_brid_set(sb, -1); + goto out; /* success */ + + out_wh: + /* revert */ + rerr = au_br_init_wh(sb, br, br->br_perm, del->h_path.dentry); + if (rerr) + AuWarn("failed re-creating base whiteout, %s. (%d)\n", + del->pathname, rerr); + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * change a branch permission + */ + +static void au_warn_ima(void) +{ +#ifdef CONFIG_IMA + AuWarn("RW -> RO makes IMA to produce wrong message"); +#endif +} + +static int do_need_sigen_inc(int a, int b) +{ + return au_br_whable(a) && !au_br_whable(b); +} + +static int need_sigen_inc(int old, int new) +{ + return do_need_sigen_inc(old, new) + || do_need_sigen_inc(new, old); +} + +static int au_br_mod_files_ro(struct super_block *sb, aufs_bindex_t bindex) +{ + int err; + unsigned long n, ul, bytes, files; + aufs_bindex_t bstart; + struct file *file, *hf, **a; + const int step_bytes = 1024, /* memory allocation unit */ + step_files = step_bytes / sizeof(*a); + + err = -ENOMEM; + n = 0; + bytes = step_bytes; + files = step_files; + a = kmalloc(bytes, GFP_NOFS); + if (unlikely(!a)) + goto out; + + /* no need file_list_lock() since sbinfo is locked? defered? */ + list_for_each_entry(file, &sb->s_files, f_u.fu_list) { + if (special_file(file->f_dentry->d_inode->i_mode)) + continue; + + AuDbg("%.*s\n", AuDLNPair(file->f_dentry)); + fi_read_lock(file); + if (unlikely(au_test_mmapped(file))) { + err = -EBUSY; + FiMustNoWaiters(file); + fi_read_unlock(file); + goto out_free; + } + + bstart = au_fbstart(file); + if (!S_ISREG(file->f_dentry->d_inode->i_mode) + || !(file->f_mode & FMODE_WRITE) + || bstart != bindex) { + FiMustNoWaiters(file); + fi_read_unlock(file); + continue; + } + + hf = au_h_fptr(file, bstart); + FiMustNoWaiters(file); + fi_read_unlock(file); + + if (n < files) + a[n++] = hf; + else { + void *p; + + err = -ENOMEM; + bytes += step_bytes; + files += step_files; + p = krealloc(a, bytes, GFP_NOFS); + if (p) { + a = p; + a[n++] = hf; + } else + goto out_free; + } + } + + err = 0; + if (n) + au_warn_ima(); + for (ul = 0; ul < n; ul++) { + /* todo: already flushed? */ + /* cf. fs/super.c:mark_files_ro() */ + hf = a[ul]; + hf->f_mode &= ~FMODE_WRITE; + if (!file_check_writeable(hf)) { + file_release_write(hf); + mnt_drop_write(hf->f_vfsmnt); + } + } + + out_free: + kfree(a); + out: + return err; +} + +int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, + int *do_update) +{ + int err, rerr; + aufs_bindex_t bindex; + struct dentry *root; + struct au_branch *br; + + root = sb->s_root; + au_plink_block_maintain(sb); + bindex = au_find_dbindex(root, mod->h_root); + if (bindex < 0) { + if (remount) + return 0; /* success */ + err = -ENOENT; + AuErr("%s no such branch\n", mod->path); + goto out; + } + AuDbg("bindex b%d\n", bindex); + + err = test_br(mod->h_root->d_inode, mod->perm, mod->path); + if (unlikely(err)) + goto out; + + br = au_sbr(sb, bindex); + if (br->br_perm == mod->perm) + return 0; /* success */ + + if (au_br_writable(br->br_perm)) { + /* remove whiteout base */ + err = au_br_init_wh(sb, br, mod->perm, mod->h_root); + if (unlikely(err)) + goto out; + + if (!au_br_writable(mod->perm)) { + /* rw --> ro, file might be mmapped */ + DiMustNoWaiters(root); + IiMustNoWaiters(root->d_inode); + di_write_unlock(root); + err = au_br_mod_files_ro(sb, bindex); + /* aufs_write_lock() calls ..._child() */ + di_write_lock_child(root); + + if (unlikely(err)) { + rerr = -ENOMEM; + br->br_wbr = kmalloc(sizeof(*br->br_wbr), + GFP_NOFS); + if (br->br_wbr) + rerr = au_br_init_wh + (sb, br, br->br_perm, + mod->h_root); + if (unlikely(rerr)) { + AuIOErr("nested error %d (%d)\n", + rerr, err); + br->br_perm = mod->perm; + } + } + } + } else if (au_br_writable(mod->perm)) { + /* ro --> rw */ + err = -ENOMEM; + br->br_wbr = kmalloc(sizeof(*br->br_wbr), GFP_NOFS); + if (br->br_wbr) { + struct path path = { + .mnt = br->br_mnt, + .dentry = mod->h_root + }; + + err = au_wbr_init(br, sb, mod->perm, &path); + if (unlikely(err)) { + kfree(br->br_wbr); + br->br_wbr = NULL; + } + } + } + + if (!err) { + *do_update |= need_sigen_inc(br->br_perm, mod->perm); + br->br_perm = mod->perm; + } + + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/iinfo.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/iinfo.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode private data + */ + +#include "aufs.h" + +struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex) +{ + struct inode *h_inode; + + IiMustAnyLock(inode); + + h_inode = au_ii(inode)->ii_hinode[0 + bindex].hi_inode; + AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); + return h_inode; +} + +/* todo: hard/soft set? */ +void au_set_ibstart(struct inode *inode, aufs_bindex_t bindex) +{ + struct au_iinfo *iinfo = au_ii(inode); + struct inode *h_inode; + + IiMustWriteLock(inode); + + iinfo->ii_bstart = bindex; + h_inode = iinfo->ii_hinode[bindex + 0].hi_inode; + if (h_inode) + au_cpup_igen(inode, h_inode); +} + +void au_hiput(struct au_hinode *hinode) +{ + au_hin_free(hinode); + dput(hinode->hi_whdentry); + iput(hinode->hi_inode); +} + +unsigned int au_hi_flags(struct inode *inode, int isdir) +{ + unsigned int flags; + const unsigned int mnt_flags = au_mntflags(inode->i_sb); + + flags = 0; + if (au_opt_test(mnt_flags, XINO)) + au_fset_hi(flags, XINO); + if (isdir && au_opt_test(mnt_flags, UDBA_HINOTIFY)) + au_fset_hi(flags, HINOTIFY); + return flags; +} + +void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, + struct inode *h_inode, unsigned int flags) +{ + struct au_hinode *hinode; + struct inode *hi; + struct au_iinfo *iinfo = au_ii(inode); + + IiMustWriteLock(inode); + + hinode = iinfo->ii_hinode + bindex; + hi = hinode->hi_inode; + AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); + AuDebugOn(h_inode && hi); + + if (hi) + au_hiput(hinode); + hinode->hi_inode = h_inode; + if (h_inode) { + int err; + struct super_block *sb = inode->i_sb; + struct au_branch *br; + + if (bindex == iinfo->ii_bstart) + au_cpup_igen(inode, h_inode); + br = au_sbr(sb, bindex); + hinode->hi_id = br->br_id; + if (au_ftest_hi(flags, XINO)) { + err = au_xino_write(sb, bindex, h_inode->i_ino, + inode->i_ino); + if (unlikely(err)) + AuIOErr1("failed au_xino_write() %d\n", err); + } + + if (au_ftest_hi(flags, HINOTIFY) + && au_br_hinotifyable(br->br_perm)) { + err = au_hin_alloc(hinode, inode, h_inode); + if (unlikely(err)) + AuIOErr1("au_hin_alloc() %d\n", err); + } + } +} + +void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, + struct dentry *h_wh) +{ + struct au_hinode *hinode; + + IiMustWriteLock(inode); + + hinode = au_ii(inode)->ii_hinode + bindex; + AuDebugOn(hinode->hi_whdentry); + hinode->hi_whdentry = h_wh; +} + +void au_update_iigen(struct inode *inode) +{ + atomic_set(&au_ii(inode)->ii_generation, au_sigen(inode->i_sb)); + /* smp_mb(); */ /* atomic_set */ +} + +/* it may be called at remount time, too */ +void au_update_brange(struct inode *inode, int do_put_zero) +{ + struct au_iinfo *iinfo; + + iinfo = au_ii(inode); + if (!iinfo || iinfo->ii_bstart < 0) + return; + + IiMustWriteLock(inode); + + if (do_put_zero) { + aufs_bindex_t bindex; + + for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; + bindex++) { + struct inode *h_i; + + h_i = iinfo->ii_hinode[0 + bindex].hi_inode; + if (h_i && !h_i->i_nlink) + au_set_h_iptr(inode, bindex, NULL, 0); + } + } + + iinfo->ii_bstart = -1; + while (++iinfo->ii_bstart <= iinfo->ii_bend) + if (iinfo->ii_hinode[0 + iinfo->ii_bstart].hi_inode) + break; + if (iinfo->ii_bstart > iinfo->ii_bend) { + iinfo->ii_bstart = -1; + iinfo->ii_bend = -1; + return; + } + + iinfo->ii_bend++; + while (0 <= --iinfo->ii_bend) + if (iinfo->ii_hinode[0 + iinfo->ii_bend].hi_inode) + break; + AuDebugOn(iinfo->ii_bstart > iinfo->ii_bend || iinfo->ii_bend < 0); +} + +/* ---------------------------------------------------------------------- */ + +int au_iinfo_init(struct inode *inode) +{ + struct au_iinfo *iinfo; + struct super_block *sb; + int nbr, i; + + sb = inode->i_sb; + iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); + nbr = au_sbend(sb) + 1; + if (unlikely(nbr <= 0)) + nbr = 1; + iinfo->ii_hinode = kcalloc(nbr, sizeof(*iinfo->ii_hinode), GFP_NOFS); + if (iinfo->ii_hinode) { + for (i = 0; i < nbr; i++) + iinfo->ii_hinode[i].hi_id = -1; + + atomic_set(&iinfo->ii_generation, au_sigen(sb)); + /* smp_mb(); */ /* atomic_set */ + au_rw_init(&iinfo->ii_rwsem); + iinfo->ii_bstart = -1; + iinfo->ii_bend = -1; + iinfo->ii_vdir = NULL; + return 0; + } + return -ENOMEM; +} + +int au_ii_realloc(struct au_iinfo *iinfo, int nbr) +{ + int err, sz; + struct au_hinode *hip; + + AuRwMustWriteLock(&iinfo->ii_rwsem); + + err = -ENOMEM; + sz = sizeof(*hip) * (iinfo->ii_bend + 1); + if (!sz) + sz = sizeof(*hip); + hip = au_kzrealloc(iinfo->ii_hinode, sz, sizeof(*hip) * nbr, GFP_NOFS); + if (hip) { + iinfo->ii_hinode = hip; + err = 0; + } + + return err; +} + +static int au_iinfo_write0(struct super_block *sb, struct au_hinode *hinode, + ino_t ino) +{ + int err; + aufs_bindex_t bindex; + unsigned char locked; + + err = 0; + locked = !!si_noflush_read_trylock(sb); + bindex = au_br_index(sb, hinode->hi_id); + if (bindex >= 0) + err = au_xino_write0(sb, bindex, hinode->hi_inode->i_ino, ino); + /* error action? */ + if (locked) + si_read_unlock(sb); + return err; +} + +void au_iinfo_fin(struct inode *inode) +{ + ino_t ino; + aufs_bindex_t bend; + unsigned char unlinked = !inode->i_nlink; + struct au_iinfo *iinfo; + struct au_hinode *hi; + struct super_block *sb; + + if (unlinked) { + int err = au_xigen_inc(inode); + if (unlikely(err)) + AuWarn1("failed resetting i_generation, %d\n", err); + } + + iinfo = au_ii(inode); + /* bad_inode case */ + if (!iinfo) + return; + + if (iinfo->ii_vdir) + au_vdir_free(iinfo->ii_vdir); + + if (iinfo->ii_bstart >= 0) { + sb = inode->i_sb; + ino = 0; + if (unlinked) + ino = inode->i_ino; + hi = iinfo->ii_hinode + iinfo->ii_bstart; + bend = iinfo->ii_bend; + while (iinfo->ii_bstart++ <= bend) { + if (hi->hi_inode) { + if (unlinked || !hi->hi_inode->i_nlink) { + au_iinfo_write0(sb, hi, ino); + /* ignore this error */ + ino = 0; + } + au_hiput(hi); + } + hi++; + } + } + + kfree(iinfo->ii_hinode); + AuRwDestroy(&iinfo->ii_rwsem); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/sysrq.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/sysrq.c @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * magic sysrq hanlder + */ + +#include +#include +#include +/* #include */ +#include "aufs.h" + +/* ---------------------------------------------------------------------- */ + +static void sysrq_sb(struct super_block *sb) +{ + char *plevel; + struct au_sbinfo *sbinfo; + struct file *file; + + plevel = au_plevel; + au_plevel = KERN_WARNING; + au_debug(1); + + sbinfo = au_sbi(sb); + pr_warning("si=%lx\n", sysaufs_si_id(sbinfo)); + pr_warning(AUFS_NAME ": superblock\n"); + au_dpri_sb(sb); + pr_warning(AUFS_NAME ": root dentry\n"); + au_dpri_dentry(sb->s_root); + pr_warning(AUFS_NAME ": root inode\n"); + au_dpri_inode(sb->s_root->d_inode); +#if 0 + struct inode *i; + pr_warning(AUFS_NAME ": isolated inode\n"); + list_for_each_entry(i, &sb->s_inodes, i_sb_list) + if (list_empty(&i->i_dentry)) + au_dpri_inode(i); +#endif + pr_warning(AUFS_NAME ": files\n"); + list_for_each_entry(file, &sb->s_files, f_u.fu_list) + if (!special_file(file->f_dentry->d_inode->i_mode)) + au_dpri_file(file); + + au_plevel = plevel; + au_debug(0); +} + +/* ---------------------------------------------------------------------- */ + +/* module parameter */ +static char *aufs_sysrq_key = "a"; +module_param_named(sysrq, aufs_sysrq_key, charp, S_IRUGO); +MODULE_PARM_DESC(sysrq, "MagicSysRq key for " AUFS_NAME); + +static void au_sysrq(int key __maybe_unused, + struct tty_struct *tty __maybe_unused) +{ + struct kobject *kobj; + struct au_sbinfo *sbinfo; + + /* spin_lock(&sysaufs_ket->list_lock); */ + list_for_each_entry(kobj, &sysaufs_ket->list, entry) { + sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); + sysrq_sb(sbinfo->si_sb); + } + /* spin_unlock(&sysaufs_ket->list_lock); */ +} + +static struct sysrq_key_op au_sysrq_op = { + .handler = au_sysrq, + .help_msg = "Aufs", + .action_msg = "Aufs", + .enable_mask = SYSRQ_ENABLE_DUMP +}; + +/* ---------------------------------------------------------------------- */ + +int __init au_sysrq_init(void) +{ + int err; + char key; + + err = -1; + key = *aufs_sysrq_key; + if ('a' <= key && key <= 'z') + err = register_sysrq_key(key, &au_sysrq_op); + if (unlikely(err)) + AuErr("err %d, sysrq=%c\n", err, key); + return err; +} + +void au_sysrq_fin(void) +{ + int err; + err = unregister_sysrq_key(*aufs_sysrq_key, &au_sysrq_op); + if (unlikely(err)) + AuErr("err %d (ignored)\n", err); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/export.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/export.c @@ -0,0 +1,745 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * export via nfs + */ + +#include +#include +#include +#include +#include +#include "aufs.h" + +union conv { +#ifdef CONFIG_AUFS_INO_T_64 + __u32 a[2]; +#else + __u32 a[1]; +#endif + ino_t ino; +}; + +static ino_t decode_ino(__u32 *a) +{ + union conv u; + + BUILD_BUG_ON(sizeof(u.ino) != sizeof(u.a)); + u.a[0] = a[0]; +#ifdef CONFIG_AUFS_INO_T_64 + u.a[1] = a[1]; +#endif + return u.ino; +} + +static void encode_ino(__u32 *a, ino_t ino) +{ + union conv u; + + u.ino = ino; + a[0] = u.a[0]; +#ifdef CONFIG_AUFS_INO_T_64 + a[1] = u.a[1]; +#endif +} + +/* NFS file handle */ +enum { + Fh_br_id, + Fh_sigen, +#ifdef CONFIG_AUFS_INO_T_64 + /* support 64bit inode number */ + Fh_ino1, + Fh_ino2, + Fh_dir_ino1, + Fh_dir_ino2, +#else + Fh_ino1, + Fh_dir_ino1, +#endif + Fh_igen, + Fh_h_type, + Fh_tail, + + Fh_ino = Fh_ino1, + Fh_dir_ino = Fh_dir_ino1 +}; + +static int au_test_anon(struct dentry *dentry) +{ + return !!(dentry->d_flags & DCACHE_DISCONNECTED); +} + +/* ---------------------------------------------------------------------- */ +/* inode generation external table */ + +int au_xigen_inc(struct inode *inode) +{ + int err; + loff_t pos; + ssize_t sz; + __u32 igen; + struct super_block *sb; + struct au_sbinfo *sbinfo; + + err = 0; + sb = inode->i_sb; + sbinfo = au_sbi(sb); + /* + * temporary workaround for escaping from SiMustAnyLock() in + * au_mntflags(), since this function is called from au_iinfo_fin(). + */ + if (unlikely(!au_opt_test(sbinfo->si_mntflags, XINO))) + goto out; + + pos = inode->i_ino; + pos *= sizeof(igen); + igen = inode->i_generation + 1; + sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xigen, &igen, + sizeof(igen), &pos); + if (sz == sizeof(igen)) + goto out; /* success */ + + err = sz; + if (unlikely(sz >= 0)) { + err = -EIO; + AuIOErr("xigen error (%zd)\n", sz); + } + + out: + return err; +} + +int au_xigen_new(struct inode *inode) +{ + int err; + loff_t pos; + ssize_t sz; + struct super_block *sb; + struct au_sbinfo *sbinfo; + struct file *file; + + err = 0; + /* todo: dirty, at mount time */ + if (inode->i_ino == AUFS_ROOT_INO) + goto out; + sb = inode->i_sb; + SiMustAnyLock(sb); + if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) + goto out; + + err = -EFBIG; + pos = inode->i_ino; + if (unlikely(au_loff_max / sizeof(inode->i_generation) - 1 < pos)) { + AuIOErr1("too large i%lld\n", pos); + goto out; + } + pos *= sizeof(inode->i_generation); + + err = 0; + sbinfo = au_sbi(sb); + file = sbinfo->si_xigen; + BUG_ON(!file); + + if (i_size_read(file->f_dentry->d_inode) + < pos + sizeof(inode->i_generation)) { + inode->i_generation = atomic_inc_return(&sbinfo->si_xigen_next); + sz = xino_fwrite(sbinfo->si_xwrite, file, &inode->i_generation, + sizeof(inode->i_generation), &pos); + } else + sz = xino_fread(sbinfo->si_xread, file, &inode->i_generation, + sizeof(inode->i_generation), &pos); + if (sz == sizeof(inode->i_generation)) + goto out; /* success */ + + err = sz; + if (unlikely(sz >= 0)) { + err = -EIO; + AuIOErr("xigen error (%zd)\n", sz); + } + + out: + return err; +} + +int au_xigen_set(struct super_block *sb, struct file *base) +{ + int err; + struct au_sbinfo *sbinfo; + struct file *file; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + file = au_xino_create2(base, sbinfo->si_xigen); + err = PTR_ERR(file); + if (IS_ERR(file)) + goto out; + err = 0; + if (sbinfo->si_xigen) + fput(sbinfo->si_xigen); + sbinfo->si_xigen = file; + + out: + return err; +} + +void au_xigen_clr(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + if (sbinfo->si_xigen) { + fput(sbinfo->si_xigen); + sbinfo->si_xigen = NULL; + } +} + +/* ---------------------------------------------------------------------- */ + +static struct dentry *decode_by_ino(struct super_block *sb, ino_t ino, + ino_t dir_ino) +{ + struct dentry *dentry, *d; + struct inode *inode; + unsigned int sigen; + + dentry = NULL; + inode = ilookup(sb, ino); + if (!inode) + goto out; + + dentry = ERR_PTR(-ESTALE); + sigen = au_sigen(sb); + if (unlikely(is_bad_inode(inode) + || IS_DEADDIR(inode) + || sigen != au_iigen(inode))) + goto out_iput; + + dentry = NULL; + if (!dir_ino || S_ISDIR(inode->i_mode)) + dentry = d_find_alias(inode); + else { + spin_lock(&dcache_lock); + list_for_each_entry(d, &inode->i_dentry, d_alias) + if (!au_test_anon(d) + && d->d_parent->d_inode->i_ino == dir_ino) { + dentry = dget_locked(d); + break; + } + spin_unlock(&dcache_lock); + } + if (unlikely(dentry && sigen != au_digen(dentry))) { + dput(dentry); + dentry = ERR_PTR(-ESTALE); + } + + out_iput: + iput(inode); + out: + return dentry; +} + +/* ---------------------------------------------------------------------- */ + +/* todo: dirty? */ +/* if exportfs_decode_fh() passed vfsmount*, we could be happy */ +static struct vfsmount *au_mnt_get(struct super_block *sb) +{ + struct mnt_namespace *ns; + struct vfsmount *pos, *mnt; + + spin_lock(&vfsmount_lock); + /* no get/put ?? */ + AuDebugOn(!current->nsproxy); + ns = current->nsproxy->mnt_ns; + AuDebugOn(!ns); + mnt = NULL; + /* the order (reverse) will not be a problem */ + list_for_each_entry(pos, &ns->list, mnt_list) + if (pos->mnt_sb == sb) { + mnt = mntget(pos); + break; + } + spin_unlock(&vfsmount_lock); + AuDebugOn(!mnt); + + return mnt; +} + +struct au_nfsd_si_lock { + const unsigned int sigen; + const aufs_bindex_t br_id; + unsigned char force_lock; +}; + +static aufs_bindex_t si_nfsd_read_lock(struct super_block *sb, + struct au_nfsd_si_lock *nsi_lock) +{ + aufs_bindex_t bindex; + + si_read_lock(sb, AuLock_FLUSH); + + /* branch id may be wrapped around */ + bindex = au_br_index(sb, nsi_lock->br_id); + if (bindex >= 0 && nsi_lock->sigen + AUFS_BRANCH_MAX > au_sigen(sb)) + goto out; /* success */ + + if (!nsi_lock->force_lock) + si_read_unlock(sb); + bindex = -1; + + out: + return bindex; +} + +struct find_name_by_ino { + int called, found; + ino_t ino; + char *name; + int namelen; +}; + +static int +find_name_by_ino(void *arg, const char *name, int namelen, loff_t offset, + u64 ino, unsigned int d_type) +{ + struct find_name_by_ino *a = arg; + + a->called++; + if (a->ino != ino) + return 0; + + memcpy(a->name, name, namelen); + a->namelen = namelen; + a->found = 1; + return 1; +} + +static struct dentry *au_lkup_by_ino(struct path *path, ino_t ino, + struct au_nfsd_si_lock *nsi_lock) +{ + struct dentry *dentry, *parent; + struct file *file; + struct inode *dir; + struct find_name_by_ino arg; + int err; + + parent = path->dentry; + if (nsi_lock) + si_read_unlock(parent->d_sb); + path_get(path); + file = dentry_open(parent, path->mnt, au_dir_roflags, current_cred()); + dentry = (void *)file; + if (IS_ERR(file)) + goto out; + + dentry = ERR_PTR(-ENOMEM); + arg.name = __getname(); + if (unlikely(!arg.name)) + goto out_file; + arg.ino = ino; + arg.found = 0; + do { + arg.called = 0; + /* smp_mb(); */ + err = vfsub_readdir(file, find_name_by_ino, &arg); + } while (!err && !arg.found && arg.called); + dentry = ERR_PTR(err); + if (unlikely(err)) + goto out_name; + dentry = ERR_PTR(-ENOENT); + if (!arg.found) + goto out_name; + + /* do not call au_lkup_one() */ + dir = parent->d_inode; + mutex_lock(&dir->i_mutex); + dentry = vfsub_lookup_one_len(arg.name, parent, arg.namelen); + mutex_unlock(&dir->i_mutex); + AuTraceErrPtr(dentry); + if (IS_ERR(dentry)) + goto out_name; + AuDebugOn(au_test_anon(dentry)); + if (unlikely(!dentry->d_inode)) { + dput(dentry); + dentry = ERR_PTR(-ENOENT); + } + + out_name: + __putname(arg.name); + out_file: + fput(file); + out: + if (unlikely(nsi_lock + && si_nfsd_read_lock(parent->d_sb, nsi_lock) < 0)) + if (!IS_ERR(dentry)) { + dput(dentry); + dentry = ERR_PTR(-ESTALE); + } + AuTraceErrPtr(dentry); + return dentry; +} + +static struct dentry *decode_by_dir_ino(struct super_block *sb, ino_t ino, + ino_t dir_ino, + struct au_nfsd_si_lock *nsi_lock) +{ + struct dentry *dentry; + struct path path; + + if (dir_ino != AUFS_ROOT_INO) { + path.dentry = decode_by_ino(sb, dir_ino, 0); + dentry = path.dentry; + if (!path.dentry || IS_ERR(path.dentry)) + goto out; + AuDebugOn(au_test_anon(path.dentry)); + } else + path.dentry = dget(sb->s_root); + + path.mnt = au_mnt_get(sb); + dentry = au_lkup_by_ino(&path, ino, nsi_lock); + path_put(&path); + + out: + AuTraceErrPtr(dentry); + return dentry; +} + +/* ---------------------------------------------------------------------- */ + +static int h_acceptable(void *expv, struct dentry *dentry) +{ + return 1; +} + +static char *au_build_path(struct dentry *h_parent, struct path *h_rootpath, + char *buf, int len, struct super_block *sb) +{ + char *p; + int n; + struct path path; + + p = d_path(h_rootpath, buf, len); + if (IS_ERR(p)) + goto out; + n = strlen(p); + + path.mnt = h_rootpath->mnt; + path.dentry = h_parent; + p = d_path(&path, buf, len); + if (IS_ERR(p)) + goto out; + if (n != 1) + p += n; + + path.mnt = au_mnt_get(sb); + path.dentry = sb->s_root; + p = d_path(&path, buf, len - strlen(p)); + mntput(path.mnt); + if (IS_ERR(p)) + goto out; + if (n != 1) + p[strlen(p)] = '/'; + + out: + AuTraceErrPtr(p); + return p; +} + +static +struct dentry *decode_by_path(struct super_block *sb, aufs_bindex_t bindex, + ino_t ino, __u32 *fh, int fh_len, + struct au_nfsd_si_lock *nsi_lock) +{ + struct dentry *dentry, *h_parent, *root; + struct super_block *h_sb; + char *pathname, *p; + struct vfsmount *h_mnt; + struct au_branch *br; + int err; + struct path path; + + br = au_sbr(sb, bindex); + /* au_br_get(br); */ + h_mnt = br->br_mnt; + h_sb = h_mnt->mnt_sb; + /* todo: call lower fh_to_dentry()? fh_to_parent()? */ + h_parent = exportfs_decode_fh(h_mnt, (void *)(fh + Fh_tail), + fh_len - Fh_tail, fh[Fh_h_type], + h_acceptable, /*context*/NULL); + dentry = h_parent; + if (unlikely(!h_parent || IS_ERR(h_parent))) { + AuWarn1("%s decode_fh failed, %ld\n", + au_sbtype(h_sb), PTR_ERR(h_parent)); + goto out; + } + dentry = NULL; + if (unlikely(au_test_anon(h_parent))) { + AuWarn1("%s decode_fh returned a disconnected dentry\n", + au_sbtype(h_sb)); + goto out_h_parent; + } + + dentry = ERR_PTR(-ENOMEM); + pathname = (void *)__get_free_page(GFP_NOFS); + if (unlikely(!pathname)) + goto out_h_parent; + + root = sb->s_root; + path.mnt = h_mnt; + di_read_lock_parent(root, !AuLock_IR); + path.dentry = au_h_dptr(root, bindex); + di_read_unlock(root, !AuLock_IR); + p = au_build_path(h_parent, &path, pathname, PAGE_SIZE, sb); + dentry = (void *)p; + if (IS_ERR(p)) + goto out_pathname; + + si_read_unlock(sb); + err = vfsub_kern_path(p, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, &path); + dentry = ERR_PTR(err); + if (unlikely(err)) + goto out_relock; + + dentry = ERR_PTR(-ENOENT); + AuDebugOn(au_test_anon(path.dentry)); + if (unlikely(!path.dentry->d_inode)) + goto out_path; + + if (ino != path.dentry->d_inode->i_ino) + dentry = au_lkup_by_ino(&path, ino, /*nsi_lock*/NULL); + else + dentry = dget(path.dentry); + + out_path: + path_put(&path); + out_relock: + if (unlikely(si_nfsd_read_lock(sb, nsi_lock) < 0)) + if (!IS_ERR(dentry)) { + dput(dentry); + dentry = ERR_PTR(-ESTALE); + } + out_pathname: + free_page((unsigned long)pathname); + out_h_parent: + dput(h_parent); + out: + /* au_br_put(br); */ + AuTraceErrPtr(dentry); + return dentry; +} + +/* ---------------------------------------------------------------------- */ + +static struct dentry * +aufs_fh_to_dentry(struct super_block *sb, struct fid *fid, int fh_len, + int fh_type) +{ + struct dentry *dentry; + __u32 *fh = fid->raw; + ino_t ino, dir_ino; + aufs_bindex_t bindex; + struct au_nfsd_si_lock nsi_lock = { + .sigen = fh[Fh_sigen], + .br_id = fh[Fh_br_id], + .force_lock = 0 + }; + + AuDebugOn(fh_len < Fh_tail); + + dentry = ERR_PTR(-ESTALE); + /* branch id may be wrapped around */ + bindex = si_nfsd_read_lock(sb, &nsi_lock); + if (unlikely(bindex < 0)) + goto out; + nsi_lock.force_lock = 1; + + /* is this inode still cached? */ + ino = decode_ino(fh + Fh_ino); + AuDebugOn(ino == AUFS_ROOT_INO); + dir_ino = decode_ino(fh + Fh_dir_ino); + dentry = decode_by_ino(sb, ino, dir_ino); + if (IS_ERR(dentry)) + goto out_unlock; + if (dentry) + goto accept; + + /* is the parent dir cached? */ + dentry = decode_by_dir_ino(sb, ino, dir_ino, &nsi_lock); + if (IS_ERR(dentry)) + goto out_unlock; + if (dentry) + goto accept; + + /* lookup path */ + dentry = decode_by_path(sb, bindex, ino, fh, fh_len, &nsi_lock); + if (IS_ERR(dentry)) + goto out_unlock; + if (unlikely(!dentry)) + /* todo?: make it ESTALE */ + goto out_unlock; + + accept: + if (dentry->d_inode->i_generation == fh[Fh_igen]) + goto out_unlock; /* success */ + + dput(dentry); + dentry = ERR_PTR(-ESTALE); + out_unlock: + si_read_unlock(sb); + out: + AuTraceErrPtr(dentry); + return dentry; +} + +#if 0 /* reserved for future use */ +/* support subtreecheck option */ +static struct dentry *aufs_fh_to_parent(struct super_block *sb, struct fid *fid, + int fh_len, int fh_type) +{ + struct dentry *parent; + __u32 *fh = fid->raw; + ino_t dir_ino; + + dir_ino = decode_ino(fh + Fh_dir_ino); + parent = decode_by_ino(sb, dir_ino, 0); + if (IS_ERR(parent)) + goto out; + if (!parent) + parent = decode_by_path(sb, au_br_index(sb, fh[Fh_br_id]), + dir_ino, fh, fh_len); + + out: + AuTraceErrPtr(parent); + return parent; +} +#endif + +/* ---------------------------------------------------------------------- */ + +static int aufs_encode_fh(struct dentry *dentry, __u32 *fh, int *max_len, + int connectable) +{ + int err; + aufs_bindex_t bindex, bend; + struct super_block *sb, *h_sb; + struct inode *inode; + struct dentry *parent, *h_parent; + struct au_branch *br; + + AuDebugOn(au_test_anon(dentry)); + + parent = NULL; + err = -ENOSPC; + if (unlikely(*max_len <= Fh_tail)) { + AuWarn1("NFSv2 client (max_len %d)?\n", *max_len); + goto out; + } + + err = FILEID_ROOT; + if (IS_ROOT(dentry)) { + AuDebugOn(dentry->d_inode->i_ino != AUFS_ROOT_INO); + goto out; + } + + err = -EIO; + h_parent = NULL; + sb = dentry->d_sb; + aufs_read_lock(dentry, AuLock_FLUSH | AuLock_IR); + parent = dget_parent(dentry); + di_read_lock_parent(parent, !AuLock_IR); + inode = dentry->d_inode; + AuDebugOn(!inode); +#ifdef CONFIG_AUFS_DEBUG + if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) + AuWarn1("NFS-exporting requires xino\n"); +#endif + + bend = au_dbtaildir(parent); + for (bindex = au_dbstart(parent); bindex <= bend; bindex++) { + h_parent = au_h_dptr(parent, bindex); + if (h_parent) { + dget(h_parent); + break; + } + } + if (unlikely(!h_parent)) + goto out_unlock; + + err = -EPERM; + br = au_sbr(sb, bindex); + h_sb = br->br_mnt->mnt_sb; + if (unlikely(!h_sb->s_export_op)) { + AuErr1("%s branch is not exportable\n", au_sbtype(h_sb)); + goto out_dput; + } + + fh[Fh_br_id] = br->br_id; + fh[Fh_sigen] = au_sigen(sb); + encode_ino(fh + Fh_ino, inode->i_ino); + encode_ino(fh + Fh_dir_ino, parent->d_inode->i_ino); + fh[Fh_igen] = inode->i_generation; + + *max_len -= Fh_tail; + fh[Fh_h_type] = exportfs_encode_fh(h_parent, (void *)(fh + Fh_tail), + max_len, + /*connectable or subtreecheck*/0); + err = fh[Fh_h_type]; + *max_len += Fh_tail; + /* todo: macros? */ + if (err != 255) + err = 99; + else + AuWarn1("%s encode_fh failed\n", au_sbtype(h_sb)); + + out_dput: + dput(h_parent); + out_unlock: + di_read_unlock(parent, !AuLock_IR); + dput(parent); + aufs_read_unlock(dentry, AuLock_IR); + out: + if (unlikely(err < 0)) + err = 255; + return err; +} + +/* ---------------------------------------------------------------------- */ + +static struct export_operations aufs_export_op = { + .fh_to_dentry = aufs_fh_to_dentry, + /* .fh_to_parent = aufs_fh_to_parent, */ + .encode_fh = aufs_encode_fh +}; + +void au_export_init(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + __u32 u; + + sb->s_export_op = &aufs_export_op; + sbinfo = au_sbi(sb); + sbinfo->si_xigen = NULL; + get_random_bytes(&u, sizeof(u)); + BUILD_BUG_ON(sizeof(u) != sizeof(int)); + atomic_set(&sbinfo->si_xigen_next, u); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dentry.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dentry.h @@ -0,0 +1,231 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * lookup and dentry operations + */ + +#ifndef __AUFS_DENTRY_H__ +#define __AUFS_DENTRY_H__ + +#ifdef __KERNEL__ + +#include +#include +#include "rwsem.h" + +/* make a single member structure for future use */ +/* todo: remove this structure */ +struct au_hdentry { + struct dentry *hd_dentry; +}; + +struct au_dinfo { + atomic_t di_generation; + + struct au_rwsem di_rwsem; + aufs_bindex_t di_bstart, di_bend, di_bwh, di_bdiropq; + struct au_hdentry *di_hdentry; +}; + +/* ---------------------------------------------------------------------- */ + +/* dentry.c */ +extern struct dentry_operations aufs_dop; +struct au_branch; +struct dentry *au_lkup_one(struct qstr *name, struct dentry *h_parent, + struct au_branch *br, struct nameidata *nd); +struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent, + struct au_branch *br); +int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, + struct dentry *h_parent, struct au_branch *br); + +int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type, + struct nameidata *nd); +int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex); +int au_refresh_hdentry(struct dentry *dentry, mode_t type); +int au_reval_dpath(struct dentry *dentry, unsigned int sigen); + +/* dinfo.c */ +int au_alloc_dinfo(struct dentry *dentry); +int au_di_realloc(struct au_dinfo *dinfo, int nbr); + +void di_read_lock(struct dentry *d, int flags, unsigned int lsc); +void di_read_unlock(struct dentry *d, int flags); +void di_downgrade_lock(struct dentry *d, int flags); +void di_write_lock(struct dentry *d, unsigned int lsc); +void di_write_unlock(struct dentry *d); +void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir); +void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir); +void di_write_unlock2(struct dentry *d1, struct dentry *d2); + +struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex); +aufs_bindex_t au_dbtail(struct dentry *dentry); +aufs_bindex_t au_dbtaildir(struct dentry *dentry); + +void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_dentry); +void au_update_digen(struct dentry *dentry); +void au_update_dbrange(struct dentry *dentry, int do_put_zero); +void au_update_dbstart(struct dentry *dentry); +void au_update_dbend(struct dentry *dentry); +int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry); + +/* ---------------------------------------------------------------------- */ + +static inline struct au_dinfo *au_di(struct dentry *dentry) +{ + return dentry->d_fsdata; +} + +/* ---------------------------------------------------------------------- */ + +/* lock subclass for dinfo */ +enum { + AuLsc_DI_CHILD, /* child first */ + AuLsc_DI_CHILD2, /* rename(2), link(2), and cpup at hinotify */ + AuLsc_DI_CHILD3, /* copyup dirs */ + AuLsc_DI_PARENT, + AuLsc_DI_PARENT2, + AuLsc_DI_PARENT3 +}; + +/* + * di_read_lock_child, di_write_lock_child, + * di_read_lock_child2, di_write_lock_child2, + * di_read_lock_child3, di_write_lock_child3, + * di_read_lock_parent, di_write_lock_parent, + * di_read_lock_parent2, di_write_lock_parent2, + * di_read_lock_parent3, di_write_lock_parent3, + */ +#define AuReadLockFunc(name, lsc) \ +static inline void di_read_lock_##name(struct dentry *d, int flags) \ +{ di_read_lock(d, flags, AuLsc_DI_##lsc); } + +#define AuWriteLockFunc(name, lsc) \ +static inline void di_write_lock_##name(struct dentry *d) \ +{ di_write_lock(d, AuLsc_DI_##lsc); } + +#define AuRWLockFuncs(name, lsc) \ + AuReadLockFunc(name, lsc) \ + AuWriteLockFunc(name, lsc) + +AuRWLockFuncs(child, CHILD); +AuRWLockFuncs(child2, CHILD2); +AuRWLockFuncs(child3, CHILD3); +AuRWLockFuncs(parent, PARENT); +AuRWLockFuncs(parent2, PARENT2); +AuRWLockFuncs(parent3, PARENT3); + +#undef AuReadLockFunc +#undef AuWriteLockFunc +#undef AuRWLockFuncs + +#define DiMustNoWaiters(d) AuRwMustNoWaiters(&au_di(d)->di_rwsem) +#define DiMustAnyLock(d) AuRwMustAnyLock(&au_di(d)->di_rwsem) +#define DiMustWriteLock(d) AuRwMustWriteLock(&au_di(d)->di_rwsem) + +/* ---------------------------------------------------------------------- */ + +/* todo: memory barrier? */ +static inline unsigned int au_digen(struct dentry *d) +{ + return atomic_read(&au_di(d)->di_generation); +} + +static inline void au_h_dentry_init(struct au_hdentry *hdentry) +{ + hdentry->hd_dentry = NULL; +} + +static inline void au_hdput(struct au_hdentry *hd) +{ + dput(hd->hd_dentry); +} + +static inline aufs_bindex_t au_dbstart(struct dentry *dentry) +{ + DiMustAnyLock(dentry); + return au_di(dentry)->di_bstart; +} + +static inline aufs_bindex_t au_dbend(struct dentry *dentry) +{ + DiMustAnyLock(dentry); + return au_di(dentry)->di_bend; +} + +static inline aufs_bindex_t au_dbwh(struct dentry *dentry) +{ + DiMustAnyLock(dentry); + return au_di(dentry)->di_bwh; +} + +static inline aufs_bindex_t au_dbdiropq(struct dentry *dentry) +{ + DiMustAnyLock(dentry); + return au_di(dentry)->di_bdiropq; +} + +/* todo: hard/soft set? */ +static inline void au_set_dbstart(struct dentry *dentry, aufs_bindex_t bindex) +{ + DiMustWriteLock(dentry); + au_di(dentry)->di_bstart = bindex; +} + +static inline void au_set_dbend(struct dentry *dentry, aufs_bindex_t bindex) +{ + DiMustWriteLock(dentry); + au_di(dentry)->di_bend = bindex; +} + +static inline void au_set_dbwh(struct dentry *dentry, aufs_bindex_t bindex) +{ + DiMustWriteLock(dentry); + /* dbwh can be outside of bstart - bend range */ + au_di(dentry)->di_bwh = bindex; +} + +static inline void au_set_dbdiropq(struct dentry *dentry, aufs_bindex_t bindex) +{ + DiMustWriteLock(dentry); + au_di(dentry)->di_bdiropq = bindex; +} + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_HINOTIFY +static inline void au_digen_dec(struct dentry *d) +{ + atomic_dec_return(&au_di(d)->di_generation); +} + +static inline void au_hin_di_reinit(struct dentry *dentry) +{ + dentry->d_fsdata = NULL; +} +#else +static inline void au_hin_di_reinit(struct dentry *dentry __maybe_unused) +{ + /* empty */ +} +#endif /* CONFIG_AUFS_HINOTIFY */ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DENTRY_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/debug.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/debug.h @@ -0,0 +1,261 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * debug print functions + */ + +#ifndef __AUFS_DEBUG_H__ +#define __AUFS_DEBUG_H__ + +#ifdef __KERNEL__ + +#include +#include +/* #include */ +#include +/* #include */ +#include +/* #include */ +/* #include */ +#include +#include + +#ifdef CONFIG_AUFS_DEBUG +#define AuDebugOn(a) BUG_ON(a) + +/* module parameter */ +extern int aufs_debug; +static inline void au_debug(int n) +{ + aufs_debug = n; + smp_mb(); +} + +static inline int au_debug_test(void) +{ + return aufs_debug; +} +#else +#define AuDebugOn(a) do {} while (0) +#define au_debug() do {} while (0) +static inline int au_debug_test(void) +{ + return 0; +} +#endif /* CONFIG_AUFS_DEBUG */ + +/* ---------------------------------------------------------------------- */ + +/* debug print */ + +#define AuDpri(lvl, fmt, arg...) \ + printk(lvl AUFS_NAME " %s:%d:%s[%d]: " fmt, \ + __func__, __LINE__, current->comm, current->pid, ##arg) +#define AuDbg(fmt, arg...) do { \ + if (au_debug_test()) \ + AuDpri(KERN_DEBUG, "DEBUG: " fmt, ##arg); \ +} while (0) +#define AuLabel(l) AuDbg(#l "\n") +#define AuInfo(fmt, arg...) AuDpri(KERN_INFO, fmt, ##arg) +#define AuWarn(fmt, arg...) AuDpri(KERN_WARNING, fmt, ##arg) +#define AuErr(fmt, arg...) AuDpri(KERN_ERR, fmt, ##arg) +#define AuIOErr(fmt, arg...) AuErr("I/O Error, " fmt, ##arg) +#define AuWarn1(fmt, arg...) do { \ + static unsigned char _c; \ + if (!_c++) \ + AuWarn(fmt, ##arg); \ +} while (0) + +#define AuErr1(fmt, arg...) do { \ + static unsigned char _c; \ + if (!_c++) \ + AuErr(fmt, ##arg); \ +} while (0) + +#define AuIOErr1(fmt, arg...) do { \ + static unsigned char _c; \ + if (!_c++) \ + AuIOErr(fmt, ##arg); \ +} while (0) + +#define AuUnsupportMsg "This operation is not supported." \ + " Please report this application to aufs-users ML." +#define AuUnsupport(fmt, args...) do { \ + AuErr(AuUnsupportMsg "\n" fmt, ##args); \ + dump_stack(); \ +} while (0) + +#define AuTraceErr(e) do { \ + if (unlikely((e) < 0)) \ + AuDbg("err %d\n", (int)(e)); \ +} while (0) + +#define AuTraceErrPtr(p) do { \ + if (IS_ERR(p)) \ + AuDbg("err %ld\n", PTR_ERR(p)); \ +} while (0) + +/* dirty macros for debug print, use with "%.*s" and caution */ +#define AuLNPair(qstr) (qstr)->len, (qstr)->name +#define AuDLNPair(d) AuLNPair(&(d)->d_name) + +/* ---------------------------------------------------------------------- */ + +struct au_sbinfo; +struct au_finfo; +struct dentry; +#ifdef CONFIG_AUFS_DEBUG +extern char *au_plevel; +struct au_nhash; +void au_dpri_whlist(struct au_nhash *whlist); +struct au_vdir; +void au_dpri_vdir(struct au_vdir *vdir); +struct inode; +void au_dpri_inode(struct inode *inode); +void au_dpri_dentry(struct dentry *dentry); +struct file; +void au_dpri_file(struct file *filp); +struct super_block; +void au_dpri_sb(struct super_block *sb); + +void au_dbg_sleep_jiffy(int jiffy); +struct iattr; +void au_dbg_iattr(struct iattr *ia); + +void au_dbg_verify_dir_parent(struct dentry *dentry, unsigned int sigen); +void au_dbg_verify_nondir_parent(struct dentry *dentry, unsigned int sigen); +void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen); +void au_dbg_verify_hf(struct au_finfo *finfo); +void au_dbg_verify_kthread(void); + +int __init au_debug_init(void); +void au_debug_sbinfo_init(struct au_sbinfo *sbinfo); +#define AuDbgWhlist(w) do { \ + AuDbg(#w "\n"); \ + au_dpri_whlist(w); \ +} while (0) + +#define AuDbgVdir(v) do { \ + AuDbg(#v "\n"); \ + au_dpri_vdir(v); \ +} while (0) + +#define AuDbgInode(i) do { \ + AuDbg(#i "\n"); \ + au_dpri_inode(i); \ +} while (0) + +#define AuDbgDentry(d) do { \ + AuDbg(#d "\n"); \ + au_dpri_dentry(d); \ +} while (0) + +#define AuDbgFile(f) do { \ + AuDbg(#f "\n"); \ + au_dpri_file(f); \ +} while (0) + +#define AuDbgSb(sb) do { \ + AuDbg(#sb "\n"); \ + au_dpri_sb(sb); \ +} while (0) + +#define AuDbgSleep(sec) do { \ + AuDbg("sleep %d sec\n", sec); \ + ssleep(sec); \ +} while (0) + +#define AuDbgSleepJiffy(jiffy) do { \ + AuDbg("sleep %d jiffies\n", jiffy); \ + au_dbg_sleep_jiffy(jiffy); \ +} while (0) + +#define AuDbgIAttr(ia) do { \ + AuDbg("ia_valid 0x%x\n", (ia)->ia_valid); \ + au_dbg_iattr(ia); \ +} while (0) +#else +static inline void au_dbg_verify_dir_parent(struct dentry *dentry, + unsigned int sigen) +{ + /* empty */ +} +static inline void au_dbg_verify_nondir_parent(struct dentry *dentry, + unsigned int sigen) +{ + /* empty */ +} +static inline void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen) +{ + /* empty */ +} +static inline void au_dbg_verify_hf(struct au_finfo *finfo) +{ + /* empty */ +} +static inline void au_dbg_verify_kthread(void) +{ + /* empty */ +} + +static inline int au_debug_init(void) +{ + return 0; +} +static inline void au_debug_sbinfo_init(struct au_sbinfo *sbinfo) +{ + /* empty */ +} +#define AuDbgWhlist(w) do {} while (0) +#define AuDbgVdir(v) do {} while (0) +#define AuDbgInode(i) do {} while (0) +#define AuDbgDentry(d) do {} while (0) +#define AuDbgFile(f) do {} while (0) +#define AuDbgSb(sb) do {} while (0) +#define AuDbgSleep(sec) do {} while (0) +#define AuDbgSleepJiffy(jiffy) do {} while (0) +#define AuDbgIAttr(ia) do {} while (0) +#endif /* CONFIG_AUFS_DEBUG */ + +/* ---------------------------------------------------------------------- */ + +#ifdef CONFIG_AUFS_MAGIC_SYSRQ +int __init au_sysrq_init(void); +void au_sysrq_fin(void); + +#ifdef CONFIG_HW_CONSOLE +#define au_dbg_blocked() do { \ + WARN_ON(1); \ + handle_sysrq('w', vc_cons[fg_console].d->vc_tty); \ +} while (0) +#else +#define au_dbg_blocked() do {} while (0) +#endif + +#else +static inline int au_sysrq_init(void) +{ + return 0; +} +#define au_sysrq_fin() do {} while (0) +#define au_dbg_blocked() do {} while (0) +#endif /* CONFIG_AUFS_MAGIC_SYSRQ */ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DEBUG_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/poll.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/poll.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * poll operation + * There is only one filesystem which implements ->poll operation, currently. + */ + +#include "aufs.h" + +unsigned int aufs_poll(struct file *file, poll_table *wait) +{ + unsigned int mask; + int err; + struct file *h_file; + struct dentry *dentry; + struct super_block *sb; + + /* We should pretend an error happened. */ + mask = POLLERR /* | POLLIN | POLLOUT */; + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); + if (unlikely(err)) + goto out; + + /* it is not an error if h_file has no operation */ + mask = DEFAULT_POLLMASK; + h_file = au_h_fptr(file, au_fbstart(file)); + if (h_file->f_op && h_file->f_op->poll) + mask = h_file->f_op->poll(h_file, wait); + + di_read_unlock(dentry, AuLock_IR); + fi_read_unlock(file); + + out: + si_read_unlock(sb); + AuTraceErr((int)mask); + return mask; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/super.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/super.c @@ -0,0 +1,874 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * mount and super_block operations + */ + +#include +#include +#include +#include +#include "aufs.h" + +/* + * super_operations + */ +static struct inode *aufs_alloc_inode(struct super_block *sb __maybe_unused) +{ + struct au_icntnr *c; + + c = au_cache_alloc_icntnr(); + if (c) { + inode_init_once(&c->vfs_inode); + c->vfs_inode.i_version = 1; /* sigen(sb); */ + c->iinfo.ii_hinode = NULL; + return &c->vfs_inode; + } + return NULL; +} + +static void aufs_destroy_inode(struct inode *inode) +{ + au_iinfo_fin(inode); + au_cache_free_icntnr(container_of(inode, struct au_icntnr, vfs_inode)); +} + +struct inode *au_iget_locked(struct super_block *sb, ino_t ino) +{ + struct inode *inode; + int err; + + inode = iget_locked(sb, ino); + if (unlikely(!inode)) { + inode = ERR_PTR(-ENOMEM); + goto out; + } + if (!(inode->i_state & I_NEW)) + goto out; + + err = au_xigen_new(inode); + if (!err) + err = au_iinfo_init(inode); + if (!err) + inode->i_version++; + else { + iget_failed(inode); + inode = ERR_PTR(err); + } + + out: + /* never return NULL */ + AuDebugOn(!inode); + AuTraceErrPtr(inode); + return inode; +} + +/* lock free root dinfo */ +static int au_show_brs(struct seq_file *seq, struct super_block *sb) +{ + int err; + aufs_bindex_t bindex, bend; + struct path path; + struct au_hdentry *hd; + struct au_branch *br; + + err = 0; + bend = au_sbend(sb); + hd = au_di(sb->s_root)->di_hdentry; + for (bindex = 0; !err && bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + path.mnt = br->br_mnt; + path.dentry = hd[bindex].hd_dentry; + err = au_seq_path(seq, &path); + if (err > 0) + err = seq_printf(seq, "=%s", + au_optstr_br_perm(br->br_perm)); + if (!err && bindex != bend) + err = seq_putc(seq, ':'); + } + + return err; +} + +static void au_show_wbr_create(struct seq_file *m, int v, + struct au_sbinfo *sbinfo) +{ + const char *pat; + + AuRwMustAnyLock(&sbinfo->si_rwsem); + + seq_printf(m, ",create="); + pat = au_optstr_wbr_create(v); + switch (v) { + case AuWbrCreate_TDP: + case AuWbrCreate_RR: + case AuWbrCreate_MFS: + case AuWbrCreate_PMFS: + seq_printf(m, pat); + break; + case AuWbrCreate_MFSV: + seq_printf(m, /*pat*/"mfs:%lu", + sbinfo->si_wbr_mfs.mfs_expire / HZ); + break; + case AuWbrCreate_PMFSV: + seq_printf(m, /*pat*/"pmfs:%lu", + sbinfo->si_wbr_mfs.mfs_expire / HZ); + break; + case AuWbrCreate_MFSRR: + seq_printf(m, /*pat*/"mfsrr:%llu", + sbinfo->si_wbr_mfs.mfsrr_watermark); + break; + case AuWbrCreate_MFSRRV: + seq_printf(m, /*pat*/"mfsrr:%llu:%lu", + sbinfo->si_wbr_mfs.mfsrr_watermark, + sbinfo->si_wbr_mfs.mfs_expire / HZ); + break; + } +} + +static int au_show_xino(struct seq_file *seq, struct vfsmount *mnt) +{ +#ifdef CONFIG_SYSFS + return 0; +#else + int err; + const int len = sizeof(AUFS_XINO_FNAME) - 1; + aufs_bindex_t bindex, brid; + struct super_block *sb; + struct qstr *name; + struct file *f; + struct dentry *d, *h_root; + + AuRwMustAnyLock(&sbinfo->si_rwsem); + + err = 0; + sb = mnt->mnt_sb; + f = au_sbi(sb)->si_xib; + if (!f) + goto out; + + /* stop printing the default xino path on the first writable branch */ + h_root = NULL; + brid = au_xino_brid(sb); + if (brid >= 0) { + bindex = au_br_index(sb, brid); + h_root = au_di(sb->s_root)->di_hdentry[0 + bindex].hd_dentry; + } + d = f->f_dentry; + name = &d->d_name; + /* safe ->d_parent because the file is unlinked */ + if (d->d_parent == h_root + && name->len == len + && !memcmp(name->name, AUFS_XINO_FNAME, len)) + goto out; + + seq_puts(seq, ",xino="); + err = au_xino_path(seq, f); + + out: + return err; +#endif +} + +/* seq_file will re-call me in case of too long string */ +static int aufs_show_options(struct seq_file *m, struct vfsmount *mnt) +{ + int err, n; + unsigned int mnt_flags, v; + struct super_block *sb; + struct au_sbinfo *sbinfo; + +#define AuBool(name, str) do { \ + v = au_opt_test(mnt_flags, name); \ + if (v != au_opt_test(AuOpt_Def, name)) \ + seq_printf(m, ",%s" #str, v ? "" : "no"); \ +} while (0) + +#define AuStr(name, str) do { \ + v = mnt_flags & AuOptMask_##name; \ + if (v != (AuOpt_Def & AuOptMask_##name)) \ + seq_printf(m, "," #str "=%s", au_optstr_##str(v)); \ +} while (0) + +#define AuUInt(name, str, val) do { \ + if (val != AUFS_##name##_DEF) \ + seq_printf(m, "," #str "=%u", val); \ +} while (0) + + /* lock free root dinfo */ + sb = mnt->mnt_sb; + si_noflush_read_lock(sb); + sbinfo = au_sbi(sb); + seq_printf(m, ",si=%lx", sysaufs_si_id(sbinfo)); + + mnt_flags = au_mntflags(sb); + if (au_opt_test(mnt_flags, XINO)) { + err = au_show_xino(m, mnt); + if (unlikely(err)) + goto out; + } else + seq_puts(m, ",noxino"); + + AuBool(TRUNC_XINO, trunc_xino); + AuStr(UDBA, udba); + AuBool(SHWH, shwh); + AuBool(PLINK, plink); + /* AuBool(DIRPERM1, dirperm1); */ + /* AuBool(REFROF, refrof); */ + + v = sbinfo->si_wbr_create; + if (v != AuWbrCreate_Def) + au_show_wbr_create(m, v, sbinfo); + + v = sbinfo->si_wbr_copyup; + if (v != AuWbrCopyup_Def) + seq_printf(m, ",cpup=%s", au_optstr_wbr_copyup(v)); + + v = au_opt_test(mnt_flags, ALWAYS_DIROPQ); + if (v != au_opt_test(AuOpt_Def, ALWAYS_DIROPQ)) + seq_printf(m, ",diropq=%c", v ? 'a' : 'w'); + + AuUInt(DIRWH, dirwh, sbinfo->si_dirwh); + + n = sbinfo->si_rdcache / HZ; + AuUInt(RDCACHE, rdcache, n); + + AuUInt(RDBLK, rdblk, sbinfo->si_rdblk); + AuUInt(RDHASH, rdhash, sbinfo->si_rdhash); + + AuBool(SUM, sum); + /* AuBool(SUM_W, wsum); */ + AuBool(WARN_PERM, warn_perm); + AuBool(VERBOSE, verbose); + + out: + /* be sure to print "br:" last */ + if (!sysaufs_brs) { + seq_puts(m, ",br:"); + au_show_brs(m, sb); + } + si_read_unlock(sb); + return 0; + +#undef Deleted +#undef AuBool +#undef AuStr +} + +/* ---------------------------------------------------------------------- */ + +/* sum mode which returns the summation for statfs(2) */ + +static u64 au_add_till_max(u64 a, u64 b) +{ + u64 old; + + old = a; + a += b; + if (old < a) + return a; + return ULLONG_MAX; +} + +static int au_statfs_sum(struct super_block *sb, struct kstatfs *buf) +{ + int err; + u64 blocks, bfree, bavail, files, ffree; + aufs_bindex_t bend, bindex, i; + unsigned char shared; + struct vfsmount *h_mnt; + struct super_block *h_sb; + + blocks = 0; + bfree = 0; + bavail = 0; + files = 0; + ffree = 0; + + err = 0; + bend = au_sbend(sb); + for (bindex = bend; bindex >= 0; bindex--) { + h_mnt = au_sbr_mnt(sb, bindex); + h_sb = h_mnt->mnt_sb; + shared = 0; + for (i = bindex + 1; !shared && i <= bend; i++) + shared = (au_sbr_sb(sb, i) == h_sb); + if (shared) + continue; + + /* sb->s_root for NFS is unreliable */ + err = vfs_statfs(h_mnt->mnt_root, buf); + if (unlikely(err)) + goto out; + + blocks = au_add_till_max(blocks, buf->f_blocks); + bfree = au_add_till_max(bfree, buf->f_bfree); + bavail = au_add_till_max(bavail, buf->f_bavail); + files = au_add_till_max(files, buf->f_files); + ffree = au_add_till_max(ffree, buf->f_ffree); + } + + buf->f_blocks = blocks; + buf->f_bfree = bfree; + buf->f_bavail = bavail; + buf->f_files = files; + buf->f_ffree = ffree; + + out: + return err; +} + +static int aufs_statfs(struct dentry *dentry, struct kstatfs *buf) +{ + int err; + struct super_block *sb; + + /* lock free root dinfo */ + sb = dentry->d_sb; + si_noflush_read_lock(sb); + if (!au_opt_test(au_mntflags(sb), SUM)) + /* sb->s_root for NFS is unreliable */ + err = vfs_statfs(au_sbr_mnt(sb, 0)->mnt_root, buf); + else + err = au_statfs_sum(sb, buf); + si_read_unlock(sb); + + if (!err) { + buf->f_type = AUFS_SUPER_MAGIC; + buf->f_namelen -= AUFS_WH_PFX_LEN; + memset(&buf->f_fsid, 0, sizeof(buf->f_fsid)); + } + /* buf->f_bsize = buf->f_blocks = buf->f_bfree = buf->f_bavail = -1; */ + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* try flushing the lower fs at aufs remount/unmount time */ + +static void au_fsync_br(struct super_block *sb) +{ + aufs_bindex_t bend, bindex; + int brperm; + struct au_branch *br; + struct super_block *h_sb; + + bend = au_sbend(sb); + for (bindex = 0; bindex < bend; bindex++) { + br = au_sbr(sb, bindex); + brperm = br->br_perm; + if (brperm == AuBrPerm_RR || brperm == AuBrPerm_RRWH) + continue; + h_sb = br->br_mnt->mnt_sb; + if (bdev_read_only(h_sb->s_bdev)) + continue; + + lockdep_off(); + down_write(&h_sb->s_umount); + shrink_dcache_sb(h_sb); + sync_filesystem(h_sb); + up_write(&h_sb->s_umount); + lockdep_on(); + } +} + +/* + * this IS NOT for super_operations. + * I guess it will be reverted someday. + */ +static void aufs_umount_begin(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + + sbinfo = au_sbi(sb); + if (!sbinfo) + return; + + si_write_lock(sb); + au_fsync_br(sb); + if (au_opt_test(au_mntflags(sb), PLINK)) + au_plink_put(sb); + if (sbinfo->si_wbr_create_ops->fin) + sbinfo->si_wbr_create_ops->fin(sb); + si_write_unlock(sb); +} + +/* final actions when unmounting a file system */ +static void aufs_put_super(struct super_block *sb) +{ + struct au_sbinfo *sbinfo; + + sbinfo = au_sbi(sb); + if (!sbinfo) + return; + + aufs_umount_begin(sb); + dbgaufs_si_fin(sbinfo); + kobject_put(&sbinfo->si_kobj); +} + +/* ---------------------------------------------------------------------- */ + +/* + * refresh dentry and inode at remount time. + */ +static int do_refresh(struct dentry *dentry, mode_t type, + unsigned int dir_flags) +{ + int err; + struct dentry *parent; + + di_write_lock_child(dentry); + parent = dget_parent(dentry); + di_read_lock_parent(parent, AuLock_IR); + + /* returns the number of positive dentries */ + err = au_refresh_hdentry(dentry, type); + if (err >= 0) { + struct inode *inode = dentry->d_inode; + err = au_refresh_hinode(inode, dentry); + if (!err && type == S_IFDIR) + au_reset_hinotify(inode, dir_flags); + } + if (unlikely(err)) + AuErr("unrecoverable error %d, %.*s\n", err, AuDLNPair(dentry)); + + di_read_unlock(parent, AuLock_IR); + dput(parent); + di_write_unlock(dentry); + + return err; +} + +static int test_dir(struct dentry *dentry, void *arg __maybe_unused) +{ + return S_ISDIR(dentry->d_inode->i_mode); +} + +/* gave up consolidating with refresh_nondir() */ +static int refresh_dir(struct dentry *root, unsigned int sigen) +{ + int err, i, j, ndentry, e; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + struct dentry **dentries; + struct inode *inode; + const unsigned int flags = au_hi_flags(root->d_inode, /*isdir*/1); + + err = 0; + list_for_each_entry(inode, &root->d_sb->s_inodes, i_sb_list) + if (S_ISDIR(inode->i_mode) && au_iigen(inode) != sigen) { + ii_write_lock_child(inode); + e = au_refresh_hinode_self(inode, /*do_attr*/1); + ii_write_unlock(inode); + if (unlikely(e)) { + AuDbg("e %d, i%lu\n", e, inode->i_ino); + if (!err) + err = e; + /* go on even if err */ + } + } + + e = au_dpages_init(&dpages, GFP_NOFS); + if (unlikely(e)) { + if (!err) + err = e; + goto out; + } + e = au_dcsub_pages(&dpages, root, test_dir, NULL); + if (unlikely(e)) { + if (!err) + err = e; + goto out_dpages; + } + + for (i = 0; !e && i < dpages.ndpage; i++) { + dpage = dpages.dpages + i; + dentries = dpage->dentries; + ndentry = dpage->ndentry; + for (j = 0; !e && j < ndentry; j++) { + struct dentry *d; + + d = dentries[j]; + au_dbg_verify_dir_parent(d, sigen); + if (au_digen(d) != sigen) { + e = do_refresh(d, S_IFDIR, flags); + if (unlikely(e && !err)) + err = e; + /* break on err */ + } + } + } + + out_dpages: + au_dpages_free(&dpages); + out: + return err; +} + +static int test_nondir(struct dentry *dentry, void *arg __maybe_unused) +{ + return !S_ISDIR(dentry->d_inode->i_mode); +} + +static int refresh_nondir(struct dentry *root, unsigned int sigen, + int do_dentry) +{ + int err, i, j, ndentry, e; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + struct dentry **dentries; + struct inode *inode; + + err = 0; + list_for_each_entry(inode, &root->d_sb->s_inodes, i_sb_list) + if (!S_ISDIR(inode->i_mode) && au_iigen(inode) != sigen) { + ii_write_lock_child(inode); + e = au_refresh_hinode_self(inode, /*do_attr*/1); + ii_write_unlock(inode); + if (unlikely(e)) { + AuDbg("e %d, i%lu\n", e, inode->i_ino); + if (!err) + err = e; + /* go on even if err */ + } + } + + if (!do_dentry) + goto out; + + e = au_dpages_init(&dpages, GFP_NOFS); + if (unlikely(e)) { + if (!err) + err = e; + goto out; + } + e = au_dcsub_pages(&dpages, root, test_nondir, NULL); + if (unlikely(e)) { + if (!err) + err = e; + goto out_dpages; + } + + for (i = 0; i < dpages.ndpage; i++) { + dpage = dpages.dpages + i; + dentries = dpage->dentries; + ndentry = dpage->ndentry; + for (j = 0; j < ndentry; j++) { + struct dentry *d; + + d = dentries[j]; + au_dbg_verify_nondir_parent(d, sigen); + inode = d->d_inode; + if (inode && au_digen(d) != sigen) { + e = do_refresh(d, inode->i_mode & S_IFMT, + /*dir_flags*/0); + if (unlikely(e && !err)) + err = e; + /* go on even err */ + } + } + } + + out_dpages: + au_dpages_free(&dpages); + out: + return err; +} + +static void au_remount_refresh(struct super_block *sb, unsigned int flags) +{ + int err; + unsigned int sigen; + struct au_sbinfo *sbinfo; + struct dentry *root; + struct inode *inode; + + au_sigen_inc(sb); + sigen = au_sigen(sb); + sbinfo = au_sbi(sb); + au_fclr_si(sbinfo, FAILED_REFRESH_DIRS); + + root = sb->s_root; + DiMustNoWaiters(root); + inode = root->d_inode; + IiMustNoWaiters(inode); + au_reset_hinotify(inode, au_hi_flags(inode, /*isdir*/1)); + di_write_unlock(root); + + err = refresh_dir(root, sigen); + if (unlikely(err)) { + au_fset_si(sbinfo, FAILED_REFRESH_DIRS); + AuWarn("Refreshing directories failed, ignored (%d)\n", err); + } + + if (au_ftest_opts(flags, REFRESH_NONDIR)) { + err = refresh_nondir(root, sigen, !err); + if (unlikely(err)) + AuWarn("Refreshing non-directories failed, ignored" + "(%d)\n", err); + } + + /* aufs_write_lock() calls ..._child() */ + di_write_lock_child(root); + au_cpup_attr_all(root->d_inode, /*force*/1); +} + +/* stop extra interpretation of errno in mount(8), and strange error messages */ +static int cvt_err(int err) +{ + AuTraceErr(err); + + switch (err) { + case -ENOENT: + case -ENOTDIR: + case -EEXIST: + case -EIO: + err = -EINVAL; + } + return err; +} + +static int aufs_remount_fs(struct super_block *sb, int *flags, char *data) +{ + int err; + struct au_opts opts; + struct dentry *root; + struct inode *inode; + struct au_sbinfo *sbinfo; + + err = 0; + root = sb->s_root; + if (!data || !*data) { + aufs_write_lock(root); + err = au_opts_verify(sb, *flags, /*pending*/0); + if (!err) + au_fsync_br(sb); + aufs_write_unlock(root); + goto out; + } + + err = -ENOMEM; + memset(&opts, 0, sizeof(opts)); + opts.opt = (void *)__get_free_page(GFP_NOFS); + if (unlikely(!opts.opt)) + goto out; + opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); + opts.flags = AuOpts_REMOUNT; + opts.sb_flags = *flags; + + /* parse it before aufs lock */ + err = au_opts_parse(sb, data, &opts); + if (unlikely(err)) + goto out_opts; + + sbinfo = au_sbi(sb); + inode = root->d_inode; + mutex_lock(&inode->i_mutex); + aufs_write_lock(root); + au_fsync_br(sb); + + /* au_opts_remount() may return an error */ + err = au_opts_remount(sb, &opts); + au_opts_free(&opts); + + if (au_ftest_opts(opts.flags, REFRESH_DIR) + || au_ftest_opts(opts.flags, REFRESH_NONDIR)) + au_remount_refresh(sb, opts.flags); + + aufs_write_unlock(root); + mutex_unlock(&inode->i_mutex); + + out_opts: + free_page((unsigned long)opts.opt); + out: + err = cvt_err(err); + AuTraceErr(err); + return err; +} + +static struct super_operations aufs_sop = { + .alloc_inode = aufs_alloc_inode, + .destroy_inode = aufs_destroy_inode, + .drop_inode = generic_delete_inode, + .show_options = aufs_show_options, + .statfs = aufs_statfs, + .put_super = aufs_put_super, + .remount_fs = aufs_remount_fs +}; + +/* ---------------------------------------------------------------------- */ + +static int alloc_root(struct super_block *sb) +{ + int err; + struct inode *inode; + struct dentry *root; + + err = -ENOMEM; + inode = au_iget_locked(sb, AUFS_ROOT_INO); + err = PTR_ERR(inode); + if (IS_ERR(inode)) + goto out; + + inode->i_op = &aufs_dir_iop; + inode->i_fop = &aufs_dir_fop; + inode->i_mode = S_IFDIR; + inode->i_nlink = 2; + unlock_new_inode(inode); + + root = d_alloc_root(inode); + if (unlikely(!root)) + goto out_iput; + err = PTR_ERR(root); + if (IS_ERR(root)) + goto out_iput; + + err = au_alloc_dinfo(root); + if (!err) { + sb->s_root = root; + return 0; /* success */ + } + dput(root); + goto out; /* do not iput */ + + out_iput: + iget_failed(inode); + iput(inode); + out: + return err; + +} + +static int aufs_fill_super(struct super_block *sb, void *raw_data, + int silent __maybe_unused) +{ + int err; + struct au_opts opts; + struct dentry *root; + struct inode *inode; + char *arg = raw_data; + + if (unlikely(!arg || !*arg)) { + err = -EINVAL; + AuErr("no arg\n"); + goto out; + } + + err = -ENOMEM; + memset(&opts, 0, sizeof(opts)); + opts.opt = (void *)__get_free_page(GFP_NOFS); + if (unlikely(!opts.opt)) + goto out; + opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); + opts.sb_flags = sb->s_flags; + + err = au_si_alloc(sb); + if (unlikely(err)) + goto out_opts; + + /* all timestamps always follow the ones on the branch */ + sb->s_flags |= MS_NOATIME | MS_NODIRATIME; + sb->s_op = &aufs_sop; + sb->s_magic = AUFS_SUPER_MAGIC; + sb->s_maxbytes = 0; + au_export_init(sb); + + err = alloc_root(sb); + if (unlikely(err)) { + si_write_unlock(sb); + goto out_info; + } + root = sb->s_root; + inode = root->d_inode; + + /* + * actually we can parse options regardless aufs lock here. + * but at remount time, parsing must be done before aufs lock. + * so we follow the same rule. + */ + ii_write_lock_parent(inode); + aufs_write_unlock(root); + err = au_opts_parse(sb, arg, &opts); + if (unlikely(err)) + goto out_root; + + /* lock vfs_inode first, then aufs. */ + mutex_lock(&inode->i_mutex); + inode->i_op = &aufs_dir_iop; + inode->i_fop = &aufs_dir_fop; + aufs_write_lock(root); + err = au_opts_mount(sb, &opts); + au_opts_free(&opts); + if (unlikely(err)) + goto out_unlock; + aufs_write_unlock(root); + mutex_unlock(&inode->i_mutex); + goto out_opts; /* success */ + + out_unlock: + aufs_write_unlock(root); + mutex_unlock(&inode->i_mutex); + out_root: + dput(root); + sb->s_root = NULL; + out_info: + kobject_put(&au_sbi(sb)->si_kobj); + sb->s_fs_info = NULL; + out_opts: + free_page((unsigned long)opts.opt); + out: + AuTraceErr(err); + err = cvt_err(err); + AuTraceErr(err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int aufs_get_sb(struct file_system_type *fs_type, int flags, + const char *dev_name __maybe_unused, void *raw_data, + struct vfsmount *mnt) +{ + int err; + struct super_block *sb; + + /* all timestamps always follow the ones on the branch */ + /* mnt->mnt_flags |= MNT_NOATIME | MNT_NODIRATIME; */ + err = get_sb_nodev(fs_type, flags, raw_data, aufs_fill_super, mnt); + if (!err) { + sb = mnt->mnt_sb; + si_write_lock(sb); + sysaufs_brs_add(sb, 0); + si_write_unlock(sb); + } + return err; +} + +struct file_system_type aufs_fs_type = { + .name = AUFS_FSTYPE, + .fs_flags = + FS_RENAME_DOES_D_MOVE /* a race between rename and others */ + | FS_REVAL_DOT, /* for NFS branch and udba */ + .get_sb = aufs_get_sb, + .kill_sb = generic_shutdown_super, + /* no need to __module_get() and module_put(). */ + .owner = THIS_MODULE, +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/cpup.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/cpup.h @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * copy-up/down functions + */ + +#ifndef __AUFS_CPUP_H__ +#define __AUFS_CPUP_H__ + +#ifdef __KERNEL__ + +#include +#include +#include + +struct inode; +struct file; + +void au_cpup_attr_flags(struct inode *dst, struct inode *src); +void au_cpup_attr_timesizes(struct inode *inode); +void au_cpup_attr_nlink(struct inode *inode, int force); +void au_cpup_attr_changeable(struct inode *inode); +void au_cpup_igen(struct inode *inode, struct inode *h_inode); +void au_cpup_attr_all(struct inode *inode, int force); + +/* ---------------------------------------------------------------------- */ + +/* cpup flags */ +#define AuCpup_DTIME 1 /* do dtime_store/revert */ +#define AuCpup_KEEPLINO (1 << 1) /* do not clear the lower xino, + for link(2) */ +#define au_ftest_cpup(flags, name) ((flags) & AuCpup_##name) +#define au_fset_cpup(flags, name) { (flags) |= AuCpup_##name; } +#define au_fclr_cpup(flags, name) { (flags) &= ~AuCpup_##name; } + +int au_copy_file(struct file *dst, struct file *src, loff_t len); +int au_sio_cpup_single(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len, unsigned int flags, + struct dentry *dst_parent); +int au_sio_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + unsigned int flags); +int au_sio_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + struct file *file); + +int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, + int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, + struct dentry *h_parent, void *arg), + void *arg); +int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); +int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); + +/* ---------------------------------------------------------------------- */ + +/* keep timestamps when copyup */ +struct au_dtime { + struct dentry *dt_dentry; + struct path dt_h_path; + struct timespec dt_atime, dt_mtime; +}; +void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, + struct path *h_path); +void au_dtime_revert(struct au_dtime *dt); + +#endif /* __KERNEL__ */ +#endif /* __AUFS_CPUP_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/sysaufs.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/sysaufs.h @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sysfs interface and mount lifetime management + */ + +#ifndef __SYSAUFS_H__ +#define __SYSAUFS_H__ + +#ifdef __KERNEL__ + +#include +#include +#include "module.h" + +struct super_block; +struct au_sbinfo; + +struct sysaufs_si_attr { + struct attribute attr; + int (*show)(struct seq_file *seq, struct super_block *sb); +}; + +/* ---------------------------------------------------------------------- */ + +/* sysaufs.c */ +extern unsigned long sysaufs_si_mask; +extern struct kset *sysaufs_ket; +extern struct attribute *sysaufs_si_attrs[]; +int sysaufs_si_init(struct au_sbinfo *sbinfo); +int __init sysaufs_init(void); +void sysaufs_fin(void); + +/* ---------------------------------------------------------------------- */ + +/* some people doesn't like to show a pointer in kernel */ +static inline unsigned long sysaufs_si_id(struct au_sbinfo *sbinfo) +{ + return sysaufs_si_mask ^ (unsigned long)sbinfo; +} + +#define SysaufsSiNamePrefix "si_" +#define SysaufsSiNameLen (sizeof(SysaufsSiNamePrefix) + 16) +static inline void sysaufs_name(struct au_sbinfo *sbinfo, char *name) +{ + snprintf(name, SysaufsSiNameLen, SysaufsSiNamePrefix "%lx", + sysaufs_si_id(sbinfo)); +} + +struct au_branch; +#ifdef CONFIG_SYSFS +/* sysfs.c */ +extern struct attribute_group *sysaufs_attr_group; + +int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb); +ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, + char *buf); + +void sysaufs_br_init(struct au_branch *br); +void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex); +void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); + +#define sysaufs_brs_init() do {} while (0) + +#else +#define sysaufs_attr_group NULL + +static inline +int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb) +{ + return 0; +} + +static inline +ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, + char *buf) +{ + return 0; +} + +static inline void sysaufs_br_init(struct au_branch *br) +{ + /* empty */ +} + +static inline void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) +{ + /* nothing */ +} + +static inline void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) +{ + /* nothing */ +} + +static inline void sysaufs_brs_init(void) +{ + sysaufs_brs = 0; +} + +#endif /* CONFIG_SYSFS */ + +#endif /* __KERNEL__ */ +#endif /* __SYSAUFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dir.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dir.c @@ -0,0 +1,538 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * directory operations + */ + +#include +#include +#include "aufs.h" + +void au_add_nlink(struct inode *dir, struct inode *h_dir) +{ + AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); + + dir->i_nlink += h_dir->i_nlink - 2; + if (h_dir->i_nlink < 2) + dir->i_nlink += 2; +} + +void au_sub_nlink(struct inode *dir, struct inode *h_dir) +{ + AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); + + dir->i_nlink -= h_dir->i_nlink - 2; + if (h_dir->i_nlink < 2) + dir->i_nlink -= 2; +} + +/* ---------------------------------------------------------------------- */ + +static int reopen_dir(struct file *file) +{ + int err; + unsigned int flags; + aufs_bindex_t bindex, btail, bstart; + struct dentry *dentry, *h_dentry; + struct file *h_file; + + /* open all lower dirs */ + dentry = file->f_dentry; + bstart = au_dbstart(dentry); + for (bindex = au_fbstart(file); bindex < bstart; bindex++) + au_set_h_fptr(file, bindex, NULL); + au_set_fbstart(file, bstart); + + btail = au_dbtaildir(dentry); + for (bindex = au_fbend(file); btail < bindex; bindex--) + au_set_h_fptr(file, bindex, NULL); + au_set_fbend(file, btail); + + flags = file->f_flags; + for (bindex = bstart; bindex <= btail; bindex++) { + h_dentry = au_h_dptr(dentry, bindex); + if (!h_dentry) + continue; + h_file = au_h_fptr(file, bindex); + if (h_file) + continue; + + h_file = au_h_open(dentry, bindex, flags, file); + err = PTR_ERR(h_file); + if (IS_ERR(h_file)) + goto out; /* close all? */ + au_set_h_fptr(file, bindex, h_file); + } + au_update_figen(file); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + err = 0; + + out: + return err; +} + +static int do_open_dir(struct file *file, int flags) +{ + int err; + aufs_bindex_t bindex, btail; + struct dentry *dentry, *h_dentry; + struct file *h_file; + + FiMustWriteLock(file); + + err = 0; + dentry = file->f_dentry; + au_set_fvdir_cache(file, NULL); + au_fi(file)->fi_maintain_plink = 0; + file->f_version = dentry->d_inode->i_version; + bindex = au_dbstart(dentry); + au_set_fbstart(file, bindex); + btail = au_dbtaildir(dentry); + au_set_fbend(file, btail); + for (; !err && bindex <= btail; bindex++) { + h_dentry = au_h_dptr(dentry, bindex); + if (!h_dentry) + continue; + + h_file = au_h_open(dentry, bindex, flags, file); + if (IS_ERR(h_file)) { + err = PTR_ERR(h_file); + break; + } + au_set_h_fptr(file, bindex, h_file); + } + au_update_figen(file); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + if (!err) + return 0; /* success */ + + /* close all */ + for (bindex = au_fbstart(file); bindex <= btail; bindex++) + au_set_h_fptr(file, bindex, NULL); + au_set_fbstart(file, -1); + au_set_fbend(file, -1); + return err; +} + +static int aufs_open_dir(struct inode *inode __maybe_unused, + struct file *file) +{ + return au_do_open(file, do_open_dir); +} + +static int aufs_release_dir(struct inode *inode __maybe_unused, + struct file *file) +{ + struct au_vdir *vdir_cache; + struct super_block *sb; + struct au_sbinfo *sbinfo; + + sb = file->f_dentry->d_sb; + si_noflush_read_lock(sb); + fi_write_lock(file); + vdir_cache = au_fvdir_cache(file); + if (vdir_cache) + au_vdir_free(vdir_cache); + if (au_fi(file)->fi_maintain_plink) { + sbinfo = au_sbi(sb); + /* clear the flag without write-lock */ + sbinfo->au_si_status &= ~AuSi_MAINTAIN_PLINK; + smp_mb(); + wake_up_all(&sbinfo->si_plink_wq); + } + fi_write_unlock(file); + au_finfo_fin(file); + si_read_unlock(sb); + return 0; +} + +/* ---------------------------------------------------------------------- */ + +static int au_do_fsync_dir_no_file(struct dentry *dentry, int datasync) +{ + int err; + aufs_bindex_t bend, bindex; + struct inode *inode; + struct super_block *sb; + + err = 0; + sb = dentry->d_sb; + inode = dentry->d_inode; + IMustLock(inode); + bend = au_dbend(dentry); + for (bindex = au_dbstart(dentry); !err && bindex <= bend; bindex++) { + struct path h_path; + struct inode *h_inode; + + if (au_test_ro(sb, bindex, inode)) + continue; + h_path.dentry = au_h_dptr(dentry, bindex); + if (!h_path.dentry) + continue; + h_inode = h_path.dentry->d_inode; + if (!h_inode) + continue; + + /* no mnt_want_write() */ + /* cf. fs/nsfd/vfs.c and fs/nfsd/nfs4recover.c */ + /* todo: inotiry fired? */ + h_path.mnt = au_sbr_mnt(sb, bindex); + mutex_lock(&h_inode->i_mutex); + err = filemap_fdatawrite(h_inode->i_mapping); + AuDebugOn(!h_inode->i_fop); + if (!err && h_inode->i_fop->fsync) + err = h_inode->i_fop->fsync(NULL, h_path.dentry, + datasync); + if (!err) + err = filemap_fdatawrite(h_inode->i_mapping); + if (!err) + vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/ + mutex_unlock(&h_inode->i_mutex); + } + + return err; +} + +static int au_do_fsync_dir(struct file *file, int datasync) +{ + int err; + aufs_bindex_t bend, bindex; + struct file *h_file; + struct super_block *sb; + struct inode *inode; + struct mutex *h_mtx; + + err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1); + if (unlikely(err)) + goto out; + + sb = file->f_dentry->d_sb; + inode = file->f_dentry->d_inode; + bend = au_fbend(file); + for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) { + h_file = au_h_fptr(file, bindex); + if (!h_file || au_test_ro(sb, bindex, inode)) + continue; + + err = vfs_fsync(h_file, h_file->f_dentry, datasync); + if (!err) { + h_mtx = &h_file->f_dentry->d_inode->i_mutex; + mutex_lock(h_mtx); + vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); + /*ignore*/ + mutex_unlock(h_mtx); + } + } + + out: + return err; +} + +/* + * @file may be NULL + */ +static int aufs_fsync_dir(struct file *file, struct dentry *dentry, + int datasync) +{ + int err; + struct super_block *sb; + + IMustLock(dentry->d_inode); + + err = 0; + sb = dentry->d_sb; + si_noflush_read_lock(sb); + if (file) + err = au_do_fsync_dir(file, datasync); + else { + di_write_lock_child(dentry); + err = au_do_fsync_dir_no_file(dentry, datasync); + } + au_cpup_attr_timesizes(dentry->d_inode); + di_write_unlock(dentry); + if (file) + fi_write_unlock(file); + + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int aufs_readdir(struct file *file, void *dirent, filldir_t filldir) +{ + int err; + struct dentry *dentry; + struct inode *inode; + struct super_block *sb; + + dentry = file->f_dentry; + inode = dentry->d_inode; + IMustLock(inode); + + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1); + if (unlikely(err)) + goto out; + err = au_vdir_init(file); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + + if (!au_test_nfsd(current)) { + err = au_vdir_fill_de(file, dirent, filldir); + fsstack_copy_attr_atime(inode, + au_h_iptr(inode, au_ibstart(inode))); + } else { + /* + * nfsd filldir may call lookup_one_len(), vfs_getattr(), + * encode_fh() and others. + */ + struct inode *h_inode = au_h_iptr(inode, au_ibstart(inode)); + + di_read_unlock(dentry, AuLock_IR); + si_read_unlock(sb); + lockdep_off(); + err = au_vdir_fill_de(file, dirent, filldir); + lockdep_on(); + fsstack_copy_attr_atime(inode, h_inode); + fi_write_unlock(file); + + AuTraceErr(err); + return err; + } + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +#define AuTestEmpty_WHONLY 1 +#define AuTestEmpty_CALLED (1 << 1) +#define AuTestEmpty_SHWH (1 << 2) +#define au_ftest_testempty(flags, name) ((flags) & AuTestEmpty_##name) +#define au_fset_testempty(flags, name) { (flags) |= AuTestEmpty_##name; } +#define au_fclr_testempty(flags, name) { (flags) &= ~AuTestEmpty_##name; } + +#ifndef CONFIG_AUFS_SHWH +#undef AuTestEmpty_SHWH +#define AuTestEmpty_SHWH 0 +#endif + +struct test_empty_arg { + struct au_nhash whlist; + unsigned int flags; + int err; + aufs_bindex_t bindex; +}; + +static int test_empty_cb(void *__arg, const char *__name, int namelen, + loff_t offset __maybe_unused, u64 ino, + unsigned int d_type) +{ + struct test_empty_arg *arg = __arg; + char *name = (void *)__name; + + arg->err = 0; + au_fset_testempty(arg->flags, CALLED); + /* smp_mb(); */ + if (name[0] == '.' + && (namelen == 1 || (name[1] == '.' && namelen == 2))) + goto out; /* success */ + + if (namelen <= AUFS_WH_PFX_LEN + || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { + if (au_ftest_testempty(arg->flags, WHONLY) + && !au_nhash_test_known_wh(&arg->whlist, name, namelen)) + arg->err = -ENOTEMPTY; + goto out; + } + + name += AUFS_WH_PFX_LEN; + namelen -= AUFS_WH_PFX_LEN; + if (!au_nhash_test_known_wh(&arg->whlist, name, namelen)) + arg->err = au_nhash_append_wh + (&arg->whlist, name, namelen, ino, d_type, arg->bindex, + au_ftest_testempty(arg->flags, SHWH)); + + out: + /* smp_mb(); */ + AuTraceErr(arg->err); + return arg->err; +} + +static int do_test_empty(struct dentry *dentry, struct test_empty_arg *arg) +{ + int err; + struct file *h_file; + + h_file = au_h_open(dentry, arg->bindex, + O_RDONLY | O_NONBLOCK | O_DIRECTORY | O_LARGEFILE, + /*file*/NULL); + err = PTR_ERR(h_file); + if (IS_ERR(h_file)) + goto out; + + err = 0; + if (!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE) + && !h_file->f_dentry->d_inode->i_nlink) + goto out_put; + + do { + arg->err = 0; + au_fclr_testempty(arg->flags, CALLED); + /* smp_mb(); */ + err = vfsub_readdir(h_file, test_empty_cb, arg); + if (err >= 0) + err = arg->err; + } while (!err && au_ftest_testempty(arg->flags, CALLED)); + + out_put: + fput(h_file); + au_sbr_put(dentry->d_sb, arg->bindex); + out: + return err; +} + +struct do_test_empty_args { + int *errp; + struct dentry *dentry; + struct test_empty_arg *arg; +}; + +static void call_do_test_empty(void *args) +{ + struct do_test_empty_args *a = args; + *a->errp = do_test_empty(a->dentry, a->arg); +} + +static int sio_test_empty(struct dentry *dentry, struct test_empty_arg *arg) +{ + int err, wkq_err; + struct dentry *h_dentry; + struct inode *h_inode; + + h_dentry = au_h_dptr(dentry, arg->bindex); + h_inode = h_dentry->d_inode; + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + err = au_test_h_perm_sio(h_inode, MAY_EXEC | MAY_READ); + mutex_unlock(&h_inode->i_mutex); + if (!err) + err = do_test_empty(dentry, arg); + else { + struct do_test_empty_args args = { + .errp = &err, + .dentry = dentry, + .arg = arg + }; + unsigned int flags = arg->flags; + + wkq_err = au_wkq_wait(call_do_test_empty, &args); + if (unlikely(wkq_err)) + err = wkq_err; + arg->flags = flags; + } + + return err; +} + +int au_test_empty_lower(struct dentry *dentry) +{ + int err; + aufs_bindex_t bindex, bstart, btail; + struct test_empty_arg arg; + + SiMustAnyLock(dentry->d_sb); + + err = au_nhash_alloc(&arg.whlist, au_sbi(dentry->d_sb)->si_rdhash, + GFP_NOFS); + if (unlikely(err)) + goto out; + + bstart = au_dbstart(dentry); + arg.flags = 0; + if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) + au_fset_testempty(arg.flags, SHWH); + arg.bindex = bstart; + err = do_test_empty(dentry, &arg); + if (unlikely(err)) + goto out_whlist; + + au_fset_testempty(arg.flags, WHONLY); + btail = au_dbtaildir(dentry); + for (bindex = bstart + 1; !err && bindex <= btail; bindex++) { + struct dentry *h_dentry; + + h_dentry = au_h_dptr(dentry, bindex); + if (h_dentry && h_dentry->d_inode) { + arg.bindex = bindex; + err = do_test_empty(dentry, &arg); + } + } + + out_whlist: + au_nhash_wh_free(&arg.whlist); + out: + return err; +} + +int au_test_empty(struct dentry *dentry, struct au_nhash *whlist) +{ + int err; + struct test_empty_arg arg; + aufs_bindex_t bindex, btail; + + err = 0; + arg.whlist = *whlist; + arg.flags = AuTestEmpty_WHONLY; + if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) + au_fset_testempty(arg.flags, SHWH); + btail = au_dbtaildir(dentry); + for (bindex = au_dbstart(dentry); !err && bindex <= btail; bindex++) { + struct dentry *h_dentry; + + h_dentry = au_h_dptr(dentry, bindex); + if (h_dentry && h_dentry->d_inode) { + arg.bindex = bindex; + err = sio_test_empty(dentry, &arg); + } + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +const struct file_operations aufs_dir_fop = { + .read = generic_read_dir, + .readdir = aufs_readdir, + .unlocked_ioctl = aufs_ioctl_dir, + .open = aufs_open_dir, + .release = aufs_release_dir, + .flush = aufs_flush, + .fsync = aufs_fsync_dir +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/aufs.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/aufs.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * all header files + */ + +#ifndef __AUFS_H__ +#define __AUFS_H__ + +#ifdef __KERNEL__ + +#include "debug.h" + +#include "branch.h" +#include "cpup.h" +#include "dcsub.h" +#include "dbgaufs.h" +#include "dentry.h" +#include "dir.h" +#include "file.h" +#include "fstype.h" +#include "inode.h" +#include "loop.h" +#include "module.h" +#include "opts.h" +#include "rwsem.h" +#include "spl.h" +#include "super.h" +#include "sysaufs.h" +#include "vfsub.h" +#include "whout.h" +#include "wkq.h" + +#endif /* __KERNEL__ */ +#endif /* __AUFS_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/wbr_policy.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/wbr_policy.c @@ -0,0 +1,641 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * policies for selecting one among multiple writable branches + */ + +#include +#include "aufs.h" + +/* subset of cpup_attr() */ +static noinline_for_stack +int au_cpdown_attr(struct path *h_path, struct dentry *h_src) +{ + int err, sbits; + struct iattr ia; + struct inode *h_isrc; + + h_isrc = h_src->d_inode; + ia.ia_valid = ATTR_FORCE | ATTR_MODE | ATTR_UID | ATTR_GID; + ia.ia_mode = h_isrc->i_mode; + ia.ia_uid = h_isrc->i_uid; + ia.ia_gid = h_isrc->i_gid; + sbits = !!(ia.ia_mode & (S_ISUID | S_ISGID)); + au_cpup_attr_flags(h_path->dentry->d_inode, h_isrc); + err = vfsub_sio_notify_change(h_path, &ia); + + /* is this nfs only? */ + if (!err && sbits && au_test_nfs(h_path->dentry->d_sb)) { + ia.ia_valid = ATTR_FORCE | ATTR_MODE; + ia.ia_mode = h_isrc->i_mode; + err = vfsub_sio_notify_change(h_path, &ia); + } + + return err; +} + +#define AuCpdown_PARENT_OPQ 1 +#define AuCpdown_WHED (1 << 1) +#define AuCpdown_MADE_DIR (1 << 2) +#define AuCpdown_DIROPQ (1 << 3) +#define au_ftest_cpdown(flags, name) ((flags) & AuCpdown_##name) +#define au_fset_cpdown(flags, name) { (flags) |= AuCpdown_##name; } +#define au_fclr_cpdown(flags, name) { (flags) &= ~AuCpdown_##name; } + +struct au_cpdown_dir_args { + struct dentry *parent; + unsigned int flags; +}; + +static int au_cpdown_dir_opq(struct dentry *dentry, aufs_bindex_t bdst, + struct au_cpdown_dir_args *a) +{ + int err; + struct dentry *opq_dentry; + + opq_dentry = au_diropq_create(dentry, bdst); + err = PTR_ERR(opq_dentry); + if (IS_ERR(opq_dentry)) + goto out; + dput(opq_dentry); + au_fset_cpdown(a->flags, DIROPQ); + + out: + return err; +} + +static int au_cpdown_dir_wh(struct dentry *dentry, struct dentry *h_parent, + struct inode *dir, aufs_bindex_t bdst) +{ + int err; + struct path h_path; + struct au_branch *br; + + br = au_sbr(dentry->d_sb, bdst); + h_path.dentry = au_wh_lkup(h_parent, &dentry->d_name, br); + err = PTR_ERR(h_path.dentry); + if (IS_ERR(h_path.dentry)) + goto out; + + err = 0; + if (h_path.dentry->d_inode) { + h_path.mnt = br->br_mnt; + err = au_wh_unlink_dentry(au_h_iptr(dir, bdst), &h_path, + dentry); + } + dput(h_path.dentry); + + out: + return err; +} + +static int au_cpdown_dir(struct dentry *dentry, aufs_bindex_t bdst, + struct dentry *h_parent, void *arg) +{ + int err, rerr; + aufs_bindex_t bend, bopq, bstart; + unsigned char parent_opq; + struct path h_path; + struct dentry *parent; + struct inode *h_dir, *h_inode, *inode, *dir; + struct au_cpdown_dir_args *args = arg; + + bstart = au_dbstart(dentry); + /* dentry is di-locked */ + parent = dget_parent(dentry); + dir = parent->d_inode; + h_dir = h_parent->d_inode; + AuDebugOn(h_dir != au_h_iptr(dir, bdst)); + IMustLock(h_dir); + + err = au_lkup_neg(dentry, bdst); + if (unlikely(err < 0)) + goto out; + h_path.dentry = au_h_dptr(dentry, bdst); + h_path.mnt = au_sbr_mnt(dentry->d_sb, bdst); + err = vfsub_sio_mkdir(au_h_iptr(dir, bdst), &h_path, + S_IRWXU | S_IRUGO | S_IXUGO); + if (unlikely(err)) + goto out_put; + au_fset_cpdown(args->flags, MADE_DIR); + + bend = au_dbend(dentry); + bopq = au_dbdiropq(dentry); + au_fclr_cpdown(args->flags, WHED); + au_fclr_cpdown(args->flags, DIROPQ); + if (au_dbwh(dentry) == bdst) + au_fset_cpdown(args->flags, WHED); + if (!au_ftest_cpdown(args->flags, PARENT_OPQ) && bopq <= bdst) + au_fset_cpdown(args->flags, PARENT_OPQ); + parent_opq = (au_ftest_cpdown(args->flags, PARENT_OPQ) + && args->parent == dentry); + h_inode = h_path.dentry->d_inode; + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + if (au_ftest_cpdown(args->flags, WHED)) { + err = au_cpdown_dir_opq(dentry, bdst, args); + if (unlikely(err)) { + mutex_unlock(&h_inode->i_mutex); + goto out_dir; + } + } + + err = au_cpdown_attr(&h_path, au_h_dptr(dentry, bstart)); + mutex_unlock(&h_inode->i_mutex); + if (unlikely(err)) + goto out_opq; + + if (au_ftest_cpdown(args->flags, WHED)) { + err = au_cpdown_dir_wh(dentry, h_parent, dir, bdst); + if (unlikely(err)) + goto out_opq; + } + + inode = dentry->d_inode; + if (au_ibend(inode) < bdst) + au_set_ibend(inode, bdst); + au_set_h_iptr(inode, bdst, au_igrab(h_inode), + au_hi_flags(inode, /*isdir*/1)); + goto out; /* success */ + + /* revert */ + out_opq: + if (au_ftest_cpdown(args->flags, DIROPQ)) { + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + rerr = au_diropq_remove(dentry, bdst); + mutex_unlock(&h_inode->i_mutex); + if (unlikely(rerr)) { + AuIOErr("failed removing diropq for %.*s b%d (%d)\n", + AuDLNPair(dentry), bdst, rerr); + err = -EIO; + goto out; + } + } + out_dir: + if (au_ftest_cpdown(args->flags, MADE_DIR)) { + rerr = vfsub_sio_rmdir(au_h_iptr(dir, bdst), &h_path); + if (unlikely(rerr)) { + AuIOErr("failed removing %.*s b%d (%d)\n", + AuDLNPair(dentry), bdst, rerr); + err = -EIO; + } + } + out_put: + au_set_h_dptr(dentry, bdst, NULL); + if (au_dbend(dentry) == bdst) + au_update_dbend(dentry); + out: + dput(parent); + return err; +} + +int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst) +{ + int err; + struct au_cpdown_dir_args args = { + .parent = dget_parent(dentry), + .flags = 0 + }; + + err = au_cp_dirs(dentry, bdst, au_cpdown_dir, &args); + dput(args.parent); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* policies for create */ + +static int au_wbr_bu(struct super_block *sb, aufs_bindex_t bindex) +{ + for (; bindex >= 0; bindex--) + if (!au_br_rdonly(au_sbr(sb, bindex))) + return bindex; + return -EROFS; +} + +/* top down parent */ +static int au_wbr_create_tdp(struct dentry *dentry, int isdir __maybe_unused) +{ + int err; + aufs_bindex_t bstart, bindex; + struct super_block *sb; + struct dentry *parent, *h_parent; + + sb = dentry->d_sb; + bstart = au_dbstart(dentry); + err = bstart; + if (!au_br_rdonly(au_sbr(sb, bstart))) + goto out; + + err = -EROFS; + parent = dget_parent(dentry); + for (bindex = au_dbstart(parent); bindex < bstart; bindex++) { + h_parent = au_h_dptr(parent, bindex); + if (!h_parent || !h_parent->d_inode) + continue; + + if (!au_br_rdonly(au_sbr(sb, bindex))) { + err = bindex; + break; + } + } + dput(parent); + + /* bottom up here */ + if (unlikely(err < 0)) + err = au_wbr_bu(sb, bstart - 1); + + out: + AuDbg("b%d\n", err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* an exception for the policy other than tdp */ +static int au_wbr_create_exp(struct dentry *dentry) +{ + int err; + aufs_bindex_t bwh, bdiropq; + struct dentry *parent; + + err = -1; + bwh = au_dbwh(dentry); + parent = dget_parent(dentry); + bdiropq = au_dbdiropq(parent); + if (bwh >= 0) { + if (bdiropq >= 0) + err = min(bdiropq, bwh); + else + err = bwh; + AuDbg("%d\n", err); + } else if (bdiropq >= 0) { + err = bdiropq; + AuDbg("%d\n", err); + } + dput(parent); + + if (err >= 0 && au_br_rdonly(au_sbr(dentry->d_sb, err))) + err = -1; + + AuDbg("%d\n", err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* round robin */ +static int au_wbr_create_init_rr(struct super_block *sb) +{ + int err; + + err = au_wbr_bu(sb, au_sbend(sb)); + atomic_set(&au_sbi(sb)->si_wbr_rr_next, -err); /* less important */ + /* smp_mb(); */ + + AuDbg("b%d\n", err); + return err; +} + +static int au_wbr_create_rr(struct dentry *dentry, int isdir) +{ + int err, nbr; + unsigned int u; + aufs_bindex_t bindex, bend; + struct super_block *sb; + atomic_t *next; + + err = au_wbr_create_exp(dentry); + if (err >= 0) + goto out; + + sb = dentry->d_sb; + next = &au_sbi(sb)->si_wbr_rr_next; + bend = au_sbend(sb); + nbr = bend + 1; + for (bindex = 0; bindex <= bend; bindex++) { + if (!isdir) { + err = atomic_dec_return(next) + 1; + /* modulo for 0 is meaningless */ + if (unlikely(!err)) + err = atomic_dec_return(next) + 1; + } else + err = atomic_read(next); + AuDbg("%d\n", err); + u = err; + err = u % nbr; + AuDbg("%d\n", err); + if (!au_br_rdonly(au_sbr(sb, err))) + break; + err = -EROFS; + } + + out: + AuDbg("%d\n", err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* most free space */ +static void au_mfs(struct dentry *dentry) +{ + struct super_block *sb; + struct au_branch *br; + struct au_wbr_mfs *mfs; + aufs_bindex_t bindex, bend; + int err; + unsigned long long b, bavail; + /* reduce the stack usage */ + struct kstatfs *st; + + st = kmalloc(sizeof(*st), GFP_NOFS); + if (unlikely(!st)) { + AuWarn1("failed updating mfs(%d), ignored\n", -ENOMEM); + return; + } + + bavail = 0; + sb = dentry->d_sb; + mfs = &au_sbi(sb)->si_wbr_mfs; + MtxMustLock(&mfs->mfs_lock); + mfs->mfs_bindex = -EROFS; + mfs->mfsrr_bytes = 0; + bend = au_sbend(sb); + for (bindex = 0; bindex <= bend; bindex++) { + br = au_sbr(sb, bindex); + if (au_br_rdonly(br)) + continue; + + /* sb->s_root for NFS is unreliable */ + err = vfs_statfs(br->br_mnt->mnt_root, st); + if (unlikely(err)) { + AuWarn1("failed statfs, b%d, %d\n", bindex, err); + continue; + } + + /* when the available size is equal, select the lower one */ + BUILD_BUG_ON(sizeof(b) < sizeof(st->f_bavail) + || sizeof(b) < sizeof(st->f_bsize)); + b = st->f_bavail * st->f_bsize; + br->br_wbr->wbr_bytes = b; + if (b >= bavail) { + bavail = b; + mfs->mfs_bindex = bindex; + mfs->mfs_jiffy = jiffies; + } + } + + mfs->mfsrr_bytes = bavail; + AuDbg("b%d\n", mfs->mfs_bindex); + kfree(st); +} + +static int au_wbr_create_mfs(struct dentry *dentry, int isdir __maybe_unused) +{ + int err; + struct super_block *sb; + struct au_wbr_mfs *mfs; + + err = au_wbr_create_exp(dentry); + if (err >= 0) + goto out; + + sb = dentry->d_sb; + mfs = &au_sbi(sb)->si_wbr_mfs; + mutex_lock(&mfs->mfs_lock); + if (time_after(jiffies, mfs->mfs_jiffy + mfs->mfs_expire) + || mfs->mfs_bindex < 0 + || au_br_rdonly(au_sbr(sb, mfs->mfs_bindex))) + au_mfs(dentry); + mutex_unlock(&mfs->mfs_lock); + err = mfs->mfs_bindex; + + out: + AuDbg("b%d\n", err); + return err; +} + +static int au_wbr_create_init_mfs(struct super_block *sb) +{ + struct au_wbr_mfs *mfs; + + mfs = &au_sbi(sb)->si_wbr_mfs; + mutex_init(&mfs->mfs_lock); + mfs->mfs_jiffy = 0; + mfs->mfs_bindex = -EROFS; + + return 0; +} + +static int au_wbr_create_fin_mfs(struct super_block *sb __maybe_unused) +{ + mutex_destroy(&au_sbi(sb)->si_wbr_mfs.mfs_lock); + return 0; +} + +/* ---------------------------------------------------------------------- */ + +/* most free space and then round robin */ +static int au_wbr_create_mfsrr(struct dentry *dentry, int isdir) +{ + int err; + struct au_wbr_mfs *mfs; + + err = au_wbr_create_mfs(dentry, isdir); + if (err >= 0) { + mfs = &au_sbi(dentry->d_sb)->si_wbr_mfs; + mutex_lock(&mfs->mfs_lock); + if (mfs->mfsrr_bytes < mfs->mfsrr_watermark) + err = au_wbr_create_rr(dentry, isdir); + mutex_unlock(&mfs->mfs_lock); + } + + AuDbg("b%d\n", err); + return err; +} + +static int au_wbr_create_init_mfsrr(struct super_block *sb) +{ + int err; + + au_wbr_create_init_mfs(sb); /* ignore */ + err = au_wbr_create_init_rr(sb); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* top down parent and most free space */ +static int au_wbr_create_pmfs(struct dentry *dentry, int isdir) +{ + int err, e2; + unsigned long long b; + aufs_bindex_t bindex, bstart, bend; + struct super_block *sb; + struct dentry *parent, *h_parent; + struct au_branch *br; + + err = au_wbr_create_tdp(dentry, isdir); + if (unlikely(err < 0)) + goto out; + parent = dget_parent(dentry); + bstart = au_dbstart(parent); + bend = au_dbtaildir(parent); + if (bstart == bend) + goto out_parent; /* success */ + + e2 = au_wbr_create_mfs(dentry, isdir); + if (e2 < 0) + goto out_parent; /* success */ + + /* when the available size is equal, select upper one */ + sb = dentry->d_sb; + br = au_sbr(sb, err); + b = br->br_wbr->wbr_bytes; + AuDbg("b%d, %llu\n", err, b); + + for (bindex = bstart; bindex <= bend; bindex++) { + h_parent = au_h_dptr(parent, bindex); + if (!h_parent || !h_parent->d_inode) + continue; + + br = au_sbr(sb, bindex); + if (!au_br_rdonly(br) && br->br_wbr->wbr_bytes > b) { + b = br->br_wbr->wbr_bytes; + err = bindex; + AuDbg("b%d, %llu\n", err, b); + } + } + + out_parent: + dput(parent); + out: + AuDbg("b%d\n", err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* policies for copyup */ + +/* top down parent */ +static int au_wbr_copyup_tdp(struct dentry *dentry) +{ + return au_wbr_create_tdp(dentry, /*isdir, anything is ok*/0); +} + +/* bottom up parent */ +static int au_wbr_copyup_bup(struct dentry *dentry) +{ + int err; + aufs_bindex_t bindex, bstart; + struct dentry *parent, *h_parent; + struct super_block *sb; + + err = -EROFS; + sb = dentry->d_sb; + parent = dget_parent(dentry); + bstart = au_dbstart(parent); + for (bindex = au_dbstart(dentry); bindex >= bstart; bindex--) { + h_parent = au_h_dptr(parent, bindex); + if (!h_parent || !h_parent->d_inode) + continue; + + if (!au_br_rdonly(au_sbr(sb, bindex))) { + err = bindex; + break; + } + } + dput(parent); + + /* bottom up here */ + if (unlikely(err < 0)) + err = au_wbr_bu(sb, bstart - 1); + + AuDbg("b%d\n", err); + return err; +} + +/* bottom up */ +static int au_wbr_copyup_bu(struct dentry *dentry) +{ + int err; + + err = au_wbr_bu(dentry->d_sb, au_dbstart(dentry)); + + AuDbg("b%d\n", err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct au_wbr_copyup_operations au_wbr_copyup_ops[] = { + [AuWbrCopyup_TDP] = { + .copyup = au_wbr_copyup_tdp + }, + [AuWbrCopyup_BUP] = { + .copyup = au_wbr_copyup_bup + }, + [AuWbrCopyup_BU] = { + .copyup = au_wbr_copyup_bu + } +}; + +struct au_wbr_create_operations au_wbr_create_ops[] = { + [AuWbrCreate_TDP] = { + .create = au_wbr_create_tdp + }, + [AuWbrCreate_RR] = { + .create = au_wbr_create_rr, + .init = au_wbr_create_init_rr + }, + [AuWbrCreate_MFS] = { + .create = au_wbr_create_mfs, + .init = au_wbr_create_init_mfs, + .fin = au_wbr_create_fin_mfs + }, + [AuWbrCreate_MFSV] = { + .create = au_wbr_create_mfs, + .init = au_wbr_create_init_mfs, + .fin = au_wbr_create_fin_mfs + }, + [AuWbrCreate_MFSRR] = { + .create = au_wbr_create_mfsrr, + .init = au_wbr_create_init_mfsrr, + .fin = au_wbr_create_fin_mfs + }, + [AuWbrCreate_MFSRRV] = { + .create = au_wbr_create_mfsrr, + .init = au_wbr_create_init_mfsrr, + .fin = au_wbr_create_fin_mfs + }, + [AuWbrCreate_PMFS] = { + .create = au_wbr_create_pmfs, + .init = au_wbr_create_init_mfs, + .fin = au_wbr_create_fin_mfs + }, + [AuWbrCreate_PMFSV] = { + .create = au_wbr_create_pmfs, + .init = au_wbr_create_init_mfs, + .fin = au_wbr_create_fin_mfs + } +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/magic.mk +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/magic.mk @@ -0,0 +1,52 @@ + +# defined in ${srctree}/fs/fuse/inode.c +# tristate +ifdef CONFIG_FUSE_FS +ccflags-y += -DFUSE_SUPER_MAGIC=0x65735546 +endif + +# defined in ${srctree}/fs/ocfs2/ocfs2_fs.h +# tristate +ifdef CONFIG_OCFS2_FS +ccflags-y += -DOCFS2_SUPER_MAGIC=0x7461636f +endif + +# defined in ${srctree}/fs/ocfs2/dlm/userdlm.h +# tristate +ifdef CONFIG_OCFS2_FS_O2CB +ccflags-y += -DDLMFS_MAGIC=0x76a9f425 +endif + +# defined in ${srctree}/fs/ramfs/inode.c +# always true +ccflags-y += -DRAMFS_MAGIC=0x858458f6 + +# defined in ${srctree}/fs/cifs/cifsfs.c +# tristate +ifdef CONFIG_CIFS_FS +ccflags-y += -DCIFS_MAGIC_NUMBER=0xFF534D42 +endif + +# defined in ${srctree}/fs/xfs/xfs_sb.h +# tristate +ifdef CONFIG_XFS_FS +ccflags-y += -DXFS_SB_MAGIC=0x58465342 +endif + +# defined in ${srctree}/fs/configfs/mount.c +# tristate +ifdef CONFIG_CONFIGFS_FS +ccflags-y += -DCONFIGFS_MAGIC=0x62656570 +endif + +# defined in ${srctree}/fs/9p/v9fs.h +# tristate +ifdef CONFIG_9P_FS +ccflags-y += -DV9FS_MAGIC=0x01021997 +endif + +# defined in ${srctree}/fs/ubifs/ubifs.h +# tristate +ifdef CONFIG_UBIFS_FS +ccflags-y += -DUBIFS_SUPER_MAGIC=0x24051905 +endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/i_op.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/i_op.c @@ -0,0 +1,872 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode operations (except add/del/rename) + */ + +#include +#include +#include +#include +#include +#include +#include "aufs.h" + +static int h_permission(struct inode *h_inode, int mask, + struct vfsmount *h_mnt, int brperm) +{ + int err; + const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); + + err = -EACCES; + if ((write_mask && IS_IMMUTABLE(h_inode)) + || ((mask & MAY_EXEC) + && S_ISREG(h_inode->i_mode) + && ((h_mnt->mnt_flags & MNT_NOEXEC) + || !(h_inode->i_mode & S_IXUGO)))) + goto out; + + /* + * - skip the lower fs test in the case of write to ro branch. + * - nfs dir permission write check is optimized, but a policy for + * link/rename requires a real check. + */ + if ((write_mask && !au_br_writable(brperm)) + || (au_test_nfs(h_inode->i_sb) && S_ISDIR(h_inode->i_mode) + && write_mask && !(mask & MAY_READ)) + || !h_inode->i_op->permission) { + /* AuLabel(generic_permission); */ + err = generic_permission(h_inode, mask, NULL); + } else { + /* AuLabel(h_inode->permission); */ + err = h_inode->i_op->permission(h_inode, mask); + AuTraceErr(err); + } + + if (!err) + err = devcgroup_inode_permission(h_inode, mask); + if (!err) + err = security_inode_permission + (h_inode, mask & (MAY_READ | MAY_WRITE | MAY_EXEC + | MAY_APPEND)); + + out: + return err; +} + +static int aufs_permission(struct inode *inode, int mask) +{ + int err; + aufs_bindex_t bindex, bend; + const unsigned char isdir = !!S_ISDIR(inode->i_mode); + const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); + struct inode *h_inode; + struct super_block *sb; + struct au_branch *br; + + sb = inode->i_sb; + si_read_lock(sb, AuLock_FLUSH); + ii_read_lock_child(inode); + + if (!isdir || write_mask) { + h_inode = au_h_iptr(inode, au_ibstart(inode)); + AuDebugOn(!h_inode + || ((h_inode->i_mode & S_IFMT) + != (inode->i_mode & S_IFMT))); + err = 0; + bindex = au_ibstart(inode); + br = au_sbr(sb, bindex); + err = h_permission(h_inode, mask, br->br_mnt, br->br_perm); + + if (write_mask && !err) { + /* test whether the upper writable branch exists */ + err = -EROFS; + for (; bindex >= 0; bindex--) + if (!au_br_rdonly(au_sbr(sb, bindex))) { + err = 0; + break; + } + } + goto out; + } + + /* non-write to dir */ + err = 0; + bend = au_ibend(inode); + for (bindex = au_ibstart(inode); !err && bindex <= bend; bindex++) { + h_inode = au_h_iptr(inode, bindex); + if (h_inode) { + AuDebugOn(!S_ISDIR(h_inode->i_mode)); + br = au_sbr(sb, bindex); + err = h_permission(h_inode, mask, br->br_mnt, + br->br_perm); + } + } + + out: + ii_read_unlock(inode); + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static struct dentry *aufs_lookup(struct inode *dir, struct dentry *dentry, + struct nameidata *nd) +{ + struct dentry *ret, *parent; + struct inode *inode, *h_inode; + struct mutex *mtx; + struct super_block *sb; + int err, npositive; + aufs_bindex_t bstart; + + /* temporary workaround for a bug in NFSD readdir */ + if (!au_test_nfsd(current)) + IMustLock(dir); + else + WARN_ONCE(!mutex_is_locked(&dir->i_mutex), + "a known problem of NFSD readdir since 2.6.28\n"); + + sb = dir->i_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_alloc_dinfo(dentry); + ret = ERR_PTR(err); + if (unlikely(err)) + goto out; + + parent = dentry->d_parent; /* dir inode is locked */ + di_read_lock_parent(parent, AuLock_IR); + npositive = au_lkup_dentry(dentry, au_dbstart(parent), /*type*/0, nd); + di_read_unlock(parent, AuLock_IR); + err = npositive; + ret = ERR_PTR(err); + if (unlikely(err < 0)) + goto out_unlock; + + inode = NULL; + if (npositive) { + bstart = au_dbstart(dentry); + h_inode = au_h_dptr(dentry, bstart)->d_inode; + if (!S_ISDIR(h_inode->i_mode)) { + /* + * stop 'race'-ing between hardlinks under different + * parents. + */ + mtx = &au_sbr(sb, bstart)->br_xino.xi_nondir_mtx; + mutex_lock(mtx); + inode = au_new_inode(dentry, /*must_new*/0); + mutex_unlock(mtx); + } else + inode = au_new_inode(dentry, /*must_new*/0); + ret = (void *)inode; + } + if (IS_ERR(inode)) + goto out_unlock; + + ret = d_splice_alias(inode, dentry); + if (unlikely(IS_ERR(ret) && inode)) + ii_write_unlock(inode); + au_store_oflag(nd, inode); + + out_unlock: + di_write_unlock(dentry); + out: + si_read_unlock(sb); + return ret; +} + +/* ---------------------------------------------------------------------- */ + +static int au_wr_dir_cpup(struct dentry *dentry, struct dentry *parent, + const unsigned char add_entry, aufs_bindex_t bcpup, + aufs_bindex_t bstart) +{ + int err; + struct dentry *h_parent; + struct inode *h_dir; + + if (add_entry) { + au_update_dbstart(dentry); + IMustLock(parent->d_inode); + } else + di_write_lock_parent(parent); + + err = 0; + if (!au_h_dptr(parent, bcpup)) { + if (bstart < bcpup) + err = au_cpdown_dirs(dentry, bcpup); + else + err = au_cpup_dirs(dentry, bcpup); + } + if (!err && add_entry) { + h_parent = au_h_dptr(parent, bcpup); + h_dir = h_parent->d_inode; + mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); + err = au_lkup_neg(dentry, bcpup); + /* todo: no unlock here */ + mutex_unlock(&h_dir->i_mutex); + if (bstart < bcpup && au_dbstart(dentry) < 0) { + au_set_dbstart(dentry, 0); + au_update_dbrange(dentry, /*do_put_zero*/0); + } + } + + if (!add_entry) + di_write_unlock(parent); + if (!err) + err = bcpup; /* success */ + + return err; +} + +/* + * decide the branch and the parent dir where we will create a new entry. + * returns new bindex or an error. + * copyup the parent dir if needed. + */ +int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, + struct au_wr_dir_args *args) +{ + int err; + aufs_bindex_t bcpup, bstart, src_bstart; + const unsigned char add_entry = !!au_ftest_wrdir(args->flags, + ADD_ENTRY); + struct super_block *sb; + struct dentry *parent; + struct au_sbinfo *sbinfo; + + sb = dentry->d_sb; + sbinfo = au_sbi(sb); + parent = dget_parent(dentry); + bstart = au_dbstart(dentry); + bcpup = bstart; + if (args->force_btgt < 0) { + if (src_dentry) { + src_bstart = au_dbstart(src_dentry); + if (src_bstart < bstart) + bcpup = src_bstart; + } else if (add_entry) { + err = AuWbrCreate(sbinfo, dentry, + au_ftest_wrdir(args->flags, ISDIR)); + bcpup = err; + } + + if (bcpup < 0 || au_test_ro(sb, bcpup, dentry->d_inode)) { + if (add_entry) + err = AuWbrCopyup(sbinfo, dentry); + else { + if (!IS_ROOT(dentry)) { + di_read_lock_parent(parent, !AuLock_IR); + err = AuWbrCopyup(sbinfo, dentry); + di_read_unlock(parent, !AuLock_IR); + } else + err = AuWbrCopyup(sbinfo, dentry); + } + bcpup = err; + if (unlikely(err < 0)) + goto out; + } + } else { + bcpup = args->force_btgt; + AuDebugOn(au_test_ro(sb, bcpup, dentry->d_inode)); + } + AuDbg("bstart %d, bcpup %d\n", bstart, bcpup); + if (bstart < bcpup) + au_update_dbrange(dentry, /*do_put_zero*/1); + + err = bcpup; + if (bcpup == bstart) + goto out; /* success */ + + /* copyup the new parent into the branch we process */ + err = au_wr_dir_cpup(dentry, parent, add_entry, bcpup, bstart); + + out: + dput(parent); + return err; +} + +/* ---------------------------------------------------------------------- */ + +struct dentry *au_pinned_h_parent(struct au_pin *pin) +{ + if (pin && pin->parent) + return au_h_dptr(pin->parent, pin->bindex); + return NULL; +} + +void au_unpin(struct au_pin *p) +{ + if (au_ftest_pin(p->flags, MNT_WRITE)) + mnt_drop_write(p->h_mnt); + if (!p->hdir) + return; + + au_hin_imtx_unlock(p->hdir); + if (!au_ftest_pin(p->flags, DI_LOCKED)) + di_read_unlock(p->parent, AuLock_IR); + iput(p->hdir->hi_inode); + dput(p->parent); + p->parent = NULL; + p->hdir = NULL; + p->h_mnt = NULL; +} + +int au_do_pin(struct au_pin *p) +{ + int err; + struct super_block *sb; + struct dentry *h_dentry, *h_parent; + struct au_branch *br; + struct inode *h_dir; + + err = 0; + sb = p->dentry->d_sb; + br = au_sbr(sb, p->bindex); + if (IS_ROOT(p->dentry)) { + if (au_ftest_pin(p->flags, MNT_WRITE)) { + p->h_mnt = br->br_mnt; + err = mnt_want_write(p->h_mnt); + if (unlikely(err)) { + au_fclr_pin(p->flags, MNT_WRITE); + goto out_err; + } + } + goto out; + } + + h_dentry = NULL; + if (p->bindex <= au_dbend(p->dentry)) + h_dentry = au_h_dptr(p->dentry, p->bindex); + + p->parent = dget_parent(p->dentry); + if (!au_ftest_pin(p->flags, DI_LOCKED)) + di_read_lock(p->parent, AuLock_IR, p->lsc_di); + + h_dir = NULL; + h_parent = au_h_dptr(p->parent, p->bindex); + p->hdir = au_hi(p->parent->d_inode, p->bindex); + if (p->hdir) + h_dir = p->hdir->hi_inode; + + /* udba case */ + if (unlikely(!p->hdir || !h_dir)) { + if (!au_ftest_pin(p->flags, DI_LOCKED)) + di_read_unlock(p->parent, AuLock_IR); + dput(p->parent); + p->parent = NULL; + goto out_err; + } + + au_igrab(h_dir); + au_hin_imtx_lock_nested(p->hdir, p->lsc_hi); + + if (unlikely(p->hdir->hi_inode != h_parent->d_inode)) { + err = -EBUSY; + goto out_unpin; + } + if (h_dentry) { + err = au_h_verify(h_dentry, p->udba, h_dir, h_parent, br); + if (unlikely(err)) { + au_fclr_pin(p->flags, MNT_WRITE); + goto out_unpin; + } + } + + if (au_ftest_pin(p->flags, MNT_WRITE)) { + p->h_mnt = br->br_mnt; + err = mnt_want_write(p->h_mnt); + if (unlikely(err)) { + au_fclr_pin(p->flags, MNT_WRITE); + goto out_unpin; + } + } + goto out; /* success */ + + out_unpin: + au_unpin(p); + out_err: + AuErr("err %d\n", err); + err = au_busy_or_stale(); + out: + return err; +} + +void au_pin_init(struct au_pin *p, struct dentry *dentry, + aufs_bindex_t bindex, int lsc_di, int lsc_hi, + unsigned int udba, unsigned char flags) +{ + p->dentry = dentry; + p->udba = udba; + p->lsc_di = lsc_di; + p->lsc_hi = lsc_hi; + p->flags = flags; + p->bindex = bindex; + + p->parent = NULL; + p->hdir = NULL; + p->h_mnt = NULL; +} + +int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, + unsigned int udba, unsigned char flags) +{ + au_pin_init(pin, dentry, bindex, AuLsc_DI_PARENT, AuLsc_I_PARENT2, + udba, flags); + return au_do_pin(pin); +} + +/* ---------------------------------------------------------------------- */ + +#define AuIcpup_DID_CPUP 1 +#define au_ftest_icpup(flags, name) ((flags) & AuIcpup_##name) +#define au_fset_icpup(flags, name) { (flags) |= AuIcpup_##name; } +#define au_fclr_icpup(flags, name) { (flags) &= ~AuIcpup_##name; } + +struct au_icpup_args { + unsigned char flags; + unsigned char pin_flags; + aufs_bindex_t btgt; + struct au_pin pin; + struct path h_path; + struct inode *h_inode; +}; + +static int au_lock_and_icpup(struct dentry *dentry, struct iattr *ia, + struct au_icpup_args *a) +{ + int err; + unsigned int udba; + loff_t sz; + aufs_bindex_t bstart; + struct dentry *hi_wh, *parent; + struct inode *inode; + struct au_wr_dir_args wr_dir_args = { + .force_btgt = -1, + .flags = 0 + }; + + di_write_lock_child(dentry); + bstart = au_dbstart(dentry); + inode = dentry->d_inode; + if (S_ISDIR(inode->i_mode)) + au_fset_wrdir(wr_dir_args.flags, ISDIR); + /* plink or hi_wh() case */ + if (bstart != au_ibstart(inode)) + wr_dir_args.force_btgt = au_ibstart(inode); + err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args); + if (unlikely(err < 0)) + goto out_dentry; + a->btgt = err; + if (err != bstart) + au_fset_icpup(a->flags, DID_CPUP); + + err = 0; + a->pin_flags = AuPin_MNT_WRITE; + parent = NULL; + if (!IS_ROOT(dentry)) { + au_fset_pin(a->pin_flags, DI_LOCKED); + parent = dget_parent(dentry); + di_write_lock_parent(parent); + } + + udba = au_opt_udba(dentry->d_sb); + if (d_unhashed(dentry) || (ia->ia_valid & ATTR_FILE)) + udba = AuOpt_UDBA_NONE; + err = au_pin(&a->pin, dentry, a->btgt, udba, a->pin_flags); + if (unlikely(err)) { + if (parent) { + di_write_unlock(parent); + dput(parent); + } + goto out_dentry; + } + a->h_path.dentry = au_h_dptr(dentry, bstart); + a->h_inode = a->h_path.dentry->d_inode; + mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); + sz = -1; + if ((ia->ia_valid & ATTR_SIZE) && ia->ia_size < i_size_read(a->h_inode)) + sz = ia->ia_size; + + hi_wh = NULL; + if (au_ftest_icpup(a->flags, DID_CPUP) && d_unhashed(dentry)) { + hi_wh = au_hi_wh(inode, a->btgt); + if (!hi_wh) { + err = au_sio_cpup_wh(dentry, a->btgt, sz, /*file*/NULL); + if (unlikely(err)) + goto out_unlock; + hi_wh = au_hi_wh(inode, a->btgt); + /* todo: revalidate hi_wh? */ + } + } + + if (parent) { + au_pin_set_parent_lflag(&a->pin, /*lflag*/0); + di_downgrade_lock(parent, AuLock_IR); + dput(parent); + } + if (!au_ftest_icpup(a->flags, DID_CPUP)) + goto out; /* success */ + + if (!d_unhashed(dentry)) { + err = au_sio_cpup_simple(dentry, a->btgt, sz, AuCpup_DTIME); + if (!err) + a->h_path.dentry = au_h_dptr(dentry, a->btgt); + } else if (!hi_wh) + a->h_path.dentry = au_h_dptr(dentry, a->btgt); + else + a->h_path.dentry = hi_wh; /* do not dget here */ + + out_unlock: + mutex_unlock(&a->h_inode->i_mutex); + a->h_inode = a->h_path.dentry->d_inode; + if (!err) { + mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); + goto out; /* success */ + } + + au_unpin(&a->pin); + + out_dentry: + di_write_unlock(dentry); + out: + return err; +} + +static int aufs_setattr(struct dentry *dentry, struct iattr *ia) +{ + int err; + struct inode *inode; + struct super_block *sb; + struct file *file; + struct au_icpup_args *a; + + err = -ENOMEM; + a = kzalloc(sizeof(*a), GFP_NOFS); + if (unlikely(!a)) + goto out; + + inode = dentry->d_inode; + IMustLock(inode); + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + + file = NULL; + if (ia->ia_valid & ATTR_FILE) { + /* currently ftruncate(2) only */ + file = ia->ia_file; + fi_write_lock(file); + ia->ia_file = au_h_fptr(file, au_fbstart(file)); + } + + if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID)) + ia->ia_valid &= ~ATTR_MODE; + + err = au_lock_and_icpup(dentry, ia, a); + if (unlikely(err < 0)) + goto out_si; + if (au_ftest_icpup(a->flags, DID_CPUP)) { + ia->ia_file = NULL; + ia->ia_valid &= ~ATTR_FILE; + } + + a->h_path.mnt = au_sbr_mnt(sb, a->btgt); + if (ia->ia_valid & ATTR_SIZE) { + struct file *f; + + if (ia->ia_size < i_size_read(inode)) { + /* unmap only */ + err = vmtruncate(inode, ia->ia_size); + if (unlikely(err)) + goto out_unlock; + } + + f = NULL; + if (ia->ia_valid & ATTR_FILE) + f = ia->ia_file; + mutex_unlock(&a->h_inode->i_mutex); + err = vfsub_trunc(&a->h_path, ia->ia_size, ia->ia_valid, f); + mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); + } else + err = vfsub_notify_change(&a->h_path, ia); + if (!err) + au_cpup_attr_changeable(inode); + + out_unlock: + mutex_unlock(&a->h_inode->i_mutex); + au_unpin(&a->pin); + di_write_unlock(dentry); + out_si: + if (file) { + fi_write_unlock(file); + ia->ia_file = file; + ia->ia_valid |= ATTR_FILE; + } + si_read_unlock(sb); + kfree(a); + out: + return err; +} + +static int au_getattr_lock_reval(struct dentry *dentry, unsigned int sigen) +{ + int err; + struct inode *inode; + struct dentry *parent; + + err = 0; + inode = dentry->d_inode; + di_write_lock_child(dentry); + if (au_digen(dentry) != sigen || au_iigen(inode) != sigen) { + parent = dget_parent(dentry); + di_read_lock_parent(parent, AuLock_IR); + /* returns a number of positive dentries */ + err = au_refresh_hdentry(dentry, inode->i_mode & S_IFMT); + if (err > 0) + err = au_refresh_hinode(inode, dentry); + di_read_unlock(parent, AuLock_IR); + dput(parent); + if (unlikely(!err)) + err = -EIO; + } + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + di_read_unlock(dentry, AuLock_IR); + + return err; +} + +static void au_refresh_iattr(struct inode *inode, struct kstat *st, + unsigned int nlink) +{ + inode->i_mode = st->mode; + inode->i_uid = st->uid; + inode->i_gid = st->gid; + inode->i_atime = st->atime; + inode->i_mtime = st->mtime; + inode->i_ctime = st->ctime; + + au_cpup_attr_nlink(inode, /*force*/0); + if (S_ISDIR(inode->i_mode)) { + inode->i_nlink -= nlink; + inode->i_nlink += st->nlink; + } + + spin_lock(&inode->i_lock); + inode->i_blocks = st->blocks; + i_size_write(inode, st->size); + spin_unlock(&inode->i_lock); +} + +static int aufs_getattr(struct vfsmount *mnt __maybe_unused, + struct dentry *dentry, struct kstat *st) +{ + int err; + unsigned int mnt_flags; + aufs_bindex_t bindex; + unsigned char udba_none, positive; + struct super_block *sb, *h_sb; + struct inode *inode; + struct vfsmount *h_mnt; + struct dentry *h_dentry; + + err = 0; + sb = dentry->d_sb; + inode = dentry->d_inode; + si_read_lock(sb, AuLock_FLUSH); + mnt_flags = au_mntflags(sb); + udba_none = !!au_opt_test(mnt_flags, UDBA_NONE); + + /* support fstat(2) */ + if (!d_unhashed(dentry) && !udba_none) { + unsigned int sigen = au_sigen(sb); + if (au_digen(dentry) == sigen && au_iigen(inode) == sigen) + di_read_lock_child(dentry, AuLock_IR); + else { + AuDebugOn(!IS_ROOT(dentry)); + err = au_getattr_lock_reval(dentry, sigen); + if (unlikely(err)) + goto out; + } + } else + di_read_lock_child(dentry, AuLock_IR); + + bindex = au_ibstart(inode); + h_mnt = au_sbr_mnt(sb, bindex); + h_sb = h_mnt->mnt_sb; + if (!au_test_fs_bad_iattr(h_sb) && udba_none) + goto out_fill; /* success */ + + h_dentry = NULL; + if (au_dbstart(dentry) == bindex) + h_dentry = dget(au_h_dptr(dentry, bindex)); + else if (au_opt_test(mnt_flags, PLINK) && au_plink_test(inode)) { + h_dentry = au_plink_lkup(inode, bindex); + if (IS_ERR(h_dentry)) + goto out_fill; /* pretending success */ + } + /* illegally overlapped or something */ + if (unlikely(!h_dentry)) + goto out_fill; /* pretending success */ + + positive = !!h_dentry->d_inode; + if (positive) + err = vfs_getattr(h_mnt, h_dentry, st); + dput(h_dentry); + if (!err) { + if (positive) + au_refresh_iattr(inode, st, h_dentry->d_inode->i_nlink); + goto out_fill; /* success */ + } + goto out_unlock; + + out_fill: + generic_fillattr(inode, st); + out_unlock: + di_read_unlock(dentry, AuLock_IR); + out: + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int h_readlink(struct dentry *dentry, int bindex, char __user *buf, + int bufsiz) +{ + int err; + struct super_block *sb; + struct dentry *h_dentry; + + err = -EINVAL; + h_dentry = au_h_dptr(dentry, bindex); + if (unlikely(/* !h_dentry + || !h_dentry->d_inode + || !h_dentry->d_inode->i_op + || */ !h_dentry->d_inode->i_op->readlink)) + goto out; + + err = security_inode_readlink(h_dentry); + if (unlikely(err)) + goto out; + + sb = dentry->d_sb; + if (!au_test_ro(sb, bindex, dentry->d_inode)) { + vfsub_touch_atime(au_sbr_mnt(sb, bindex), h_dentry); + fsstack_copy_attr_atime(dentry->d_inode, h_dentry->d_inode); + } + err = h_dentry->d_inode->i_op->readlink(h_dentry, buf, bufsiz); + + out: + return err; +} + +static int aufs_readlink(struct dentry *dentry, char __user *buf, int bufsiz) +{ + int err; + + aufs_read_lock(dentry, AuLock_IR); + err = h_readlink(dentry, au_dbstart(dentry), buf, bufsiz); + aufs_read_unlock(dentry, AuLock_IR); + + return err; +} + +static void *aufs_follow_link(struct dentry *dentry, struct nameidata *nd) +{ + int err; + char *buf; + mm_segment_t old_fs; + + err = -ENOMEM; + buf = __getname(); + if (unlikely(!buf)) + goto out; + + aufs_read_lock(dentry, AuLock_IR); + old_fs = get_fs(); + set_fs(KERNEL_DS); + err = h_readlink(dentry, au_dbstart(dentry), (char __user *)buf, + PATH_MAX); + set_fs(old_fs); + aufs_read_unlock(dentry, AuLock_IR); + + if (err >= 0) { + buf[err] = 0; + /* will be freed by put_link */ + nd_set_link(nd, buf); + return NULL; /* success */ + } + __putname(buf); + + out: + path_put(&nd->path); + AuTraceErr(err); + return ERR_PTR(err); +} + +static void aufs_put_link(struct dentry *dentry __maybe_unused, + struct nameidata *nd, void *cookie __maybe_unused) +{ + __putname(nd_get_link(nd)); +} + +/* ---------------------------------------------------------------------- */ + +static void aufs_truncate_range(struct inode *inode __maybe_unused, + loff_t start __maybe_unused, + loff_t end __maybe_unused) +{ + AuUnsupport(); +} + +/* ---------------------------------------------------------------------- */ + +struct inode_operations aufs_symlink_iop = { + .permission = aufs_permission, + .setattr = aufs_setattr, + .getattr = aufs_getattr, + .readlink = aufs_readlink, + .follow_link = aufs_follow_link, + .put_link = aufs_put_link +}; + +struct inode_operations aufs_dir_iop = { + .create = aufs_create, + .lookup = aufs_lookup, + .link = aufs_link, + .unlink = aufs_unlink, + .symlink = aufs_symlink, + .mkdir = aufs_mkdir, + .rmdir = aufs_rmdir, + .mknod = aufs_mknod, + .rename = aufs_rename, + + .permission = aufs_permission, + .setattr = aufs_setattr, + .getattr = aufs_getattr +}; + +struct inode_operations aufs_iop = { + .permission = aufs_permission, + .setattr = aufs_setattr, + .getattr = aufs_getattr, + .truncate_range = aufs_truncate_range +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/wkq.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/wkq.h @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * workqueue for asynchronous/super-io operations + * todo: try new credentials management scheme + */ + +#ifndef __AUFS_WKQ_H__ +#define __AUFS_WKQ_H__ + +#ifdef __KERNEL__ + +#include +#include +#include + +struct super_block; + +/* ---------------------------------------------------------------------- */ + +/* + * in the next operation, wait for the 'nowait' tasks in system-wide workqueue + */ +struct au_nowait_tasks { + atomic_t nw_len; + wait_queue_head_t nw_wq; +}; + +/* ---------------------------------------------------------------------- */ + +typedef void (*au_wkq_func_t)(void *args); + +/* wkq flags */ +#define AuWkq_WAIT 1 +#define au_ftest_wkq(flags, name) ((flags) & AuWkq_##name) +#define au_fset_wkq(flags, name) { (flags) |= AuWkq_##name; } +#define au_fclr_wkq(flags, name) { (flags) &= ~AuWkq_##name; } + +/* wkq.c */ +int au_wkq_wait(au_wkq_func_t func, void *args); +int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb); +void au_nwt_init(struct au_nowait_tasks *nwt); +int __init au_wkq_init(void); +void au_wkq_fin(void); + +/* ---------------------------------------------------------------------- */ + +static inline int au_test_wkq(struct task_struct *tsk) +{ + return !tsk->mm && !strcmp(tsk->comm, AUFS_WKQ_NAME); +} + +static inline void au_nwt_done(struct au_nowait_tasks *nwt) +{ + if (!atomic_dec_return(&nwt->nw_len)) + wake_up_all(&nwt->nw_wq); +} + +static inline int au_nwt_flush(struct au_nowait_tasks *nwt) +{ + wait_event(nwt->nw_wq, !atomic_read(&nwt->nw_len)); + return 0; +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WKQ_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/whout.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/whout.c @@ -0,0 +1,1048 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * whiteout for logical deletion and opaque directory + */ + +#include +#include "aufs.h" + +#define WH_MASK S_IRUGO + +/* + * If a directory contains this file, then it is opaque. We start with the + * .wh. flag so that it is blocked by lookup. + */ +static struct qstr diropq_name = { + .name = AUFS_WH_DIROPQ, + .len = sizeof(AUFS_WH_DIROPQ) - 1 +}; + +/* + * generate whiteout name, which is NOT terminated by NULL. + * @name: original d_name.name + * @len: original d_name.len + * @wh: whiteout qstr + * returns zero when succeeds, otherwise error. + * succeeded value as wh->name should be freed by kfree(). + */ +int au_wh_name_alloc(struct qstr *wh, const struct qstr *name) +{ + char *p; + + if (unlikely(name->len > PATH_MAX - AUFS_WH_PFX_LEN)) + return -ENAMETOOLONG; + + wh->len = name->len + AUFS_WH_PFX_LEN; + p = kmalloc(wh->len, GFP_NOFS); + wh->name = p; + if (p) { + memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); + memcpy(p + AUFS_WH_PFX_LEN, name->name, name->len); + /* smp_mb(); */ + return 0; + } + return -ENOMEM; +} + +/* ---------------------------------------------------------------------- */ + +/* + * test if the @wh_name exists under @h_parent. + * @try_sio specifies the necessary of super-io. + */ +int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, + struct au_branch *br, int try_sio) +{ + int err; + struct dentry *wh_dentry; + struct inode *h_dir; + + h_dir = h_parent->d_inode; + if (!try_sio) + wh_dentry = au_lkup_one(wh_name, h_parent, br, /*nd*/NULL); + else + wh_dentry = au_sio_lkup_one(wh_name, h_parent, br); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out; + + err = 0; + if (!wh_dentry->d_inode) + goto out_wh; /* success */ + + err = 1; + if (S_ISREG(wh_dentry->d_inode->i_mode)) + goto out_wh; /* success */ + + err = -EIO; + AuIOErr("%.*s Invalid whiteout entry type 0%o.\n", + AuDLNPair(wh_dentry), wh_dentry->d_inode->i_mode); + + out_wh: + dput(wh_dentry); + out: + return err; +} + +/* + * test if the @h_dentry sets opaque or not. + */ +int au_diropq_test(struct dentry *h_dentry, struct au_branch *br) +{ + int err; + struct inode *h_dir; + + h_dir = h_dentry->d_inode; + err = au_wh_test(h_dentry, &diropq_name, br, + au_test_h_perm_sio(h_dir, MAY_EXEC)); + return err; +} + +/* + * returns a negative dentry whose name is unique and temporary. + */ +struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, + struct qstr *prefix) +{ +#define HEX_LEN 4 + struct dentry *dentry; + int i; + char defname[AUFS_WH_PFX_LEN * 2 + DNAME_INLINE_LEN_MIN + 1 + + HEX_LEN + 1], *name, *p; + static unsigned short cnt; + struct qstr qs; + + name = defname; + qs.len = sizeof(defname) - DNAME_INLINE_LEN_MIN + prefix->len - 1; + if (unlikely(prefix->len > DNAME_INLINE_LEN_MIN)) { + dentry = ERR_PTR(-ENAMETOOLONG); + if (unlikely(qs.len >= PATH_MAX)) + goto out; + dentry = ERR_PTR(-ENOMEM); + name = kmalloc(qs.len + 1, GFP_NOFS); + if (unlikely(!name)) + goto out; + } + + /* doubly whiteout-ed */ + memcpy(name, AUFS_WH_PFX AUFS_WH_PFX, AUFS_WH_PFX_LEN * 2); + p = name + AUFS_WH_PFX_LEN * 2; + memcpy(p, prefix->name, prefix->len); + p += prefix->len; + *p++ = '.'; + AuDebugOn(name + qs.len + 1 - p <= HEX_LEN); + + qs.name = name; + for (i = 0; i < 3; i++) { + sprintf(p, "%.*d", HEX_LEN, cnt++); + dentry = au_sio_lkup_one(&qs, h_parent, br); + if (IS_ERR(dentry) || !dentry->d_inode) + goto out_name; + dput(dentry); + } + /* AuWarn("could not get random name\n"); */ + dentry = ERR_PTR(-EEXIST); + AuDbg("%.*s\n", AuLNPair(&qs)); + BUG(); + + out_name: + if (name != defname) + kfree(name); + out: + return dentry; +#undef HEX_LEN +} + +/* + * rename the @h_dentry on @br to the whiteouted temporary name. + */ +int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br) +{ + int err; + struct path h_path = { + .mnt = br->br_mnt + }; + struct inode *h_dir; + struct dentry *h_parent; + + h_parent = h_dentry->d_parent; /* dir inode is locked */ + h_dir = h_parent->d_inode; + IMustLock(h_dir); + + h_path.dentry = au_whtmp_lkup(h_parent, br, &h_dentry->d_name); + err = PTR_ERR(h_path.dentry); + if (IS_ERR(h_path.dentry)) + goto out; + + /* under the same dir, no need to lock_rename() */ + err = vfsub_rename(h_dir, h_dentry, h_dir, &h_path); + AuTraceErr(err); + dput(h_path.dentry); + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ +/* + * functions for removing a whiteout + */ + +static int do_unlink_wh(struct inode *h_dir, struct path *h_path) +{ + int force; + + /* + * forces superio when the dir has a sticky bit. + * this may be a violation of unix fs semantics. + */ + force = (h_dir->i_mode & S_ISVTX) + && h_path->dentry->d_inode->i_uid != current_fsuid(); + return vfsub_unlink(h_dir, h_path, force); +} + +int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, + struct dentry *dentry) +{ + int err; + + err = do_unlink_wh(h_dir, h_path); + if (!err && dentry) + au_set_dbwh(dentry, -1); + + return err; +} + +static int unlink_wh_name(struct dentry *h_parent, struct qstr *wh, + struct au_branch *br) +{ + int err; + struct path h_path = { + .mnt = br->br_mnt + }; + + err = 0; + h_path.dentry = au_lkup_one(wh, h_parent, br, /*nd*/NULL); + if (IS_ERR(h_path.dentry)) + err = PTR_ERR(h_path.dentry); + else { + if (h_path.dentry->d_inode + && S_ISREG(h_path.dentry->d_inode->i_mode)) + err = do_unlink_wh(h_parent->d_inode, &h_path); + dput(h_path.dentry); + } + + return err; +} + +/* ---------------------------------------------------------------------- */ +/* + * initialize/clean whiteout for a branch + */ + +static void au_wh_clean(struct inode *h_dir, struct path *whpath, + const int isdir) +{ + int err; + + if (!whpath->dentry->d_inode) + return; + + err = mnt_want_write(whpath->mnt); + if (!err) { + if (isdir) + err = vfsub_rmdir(h_dir, whpath); + else + err = vfsub_unlink(h_dir, whpath, /*force*/0); + mnt_drop_write(whpath->mnt); + } + if (unlikely(err)) + AuWarn("failed removing %.*s (%d), ignored.\n", + AuDLNPair(whpath->dentry), err); +} + +static int test_linkable(struct dentry *h_root) +{ + struct inode *h_dir = h_root->d_inode; + + if (h_dir->i_op->link) + return 0; + + AuErr("%.*s (%s) doesn't support link(2), use noplink and rw+nolwh\n", + AuDLNPair(h_root), au_sbtype(h_root->d_sb)); + return -ENOSYS; +} + +/* todo: should this mkdir be done in /sbin/mount.aufs helper? */ +static int au_whdir(struct inode *h_dir, struct path *path) +{ + int err; + + err = -EEXIST; + if (!path->dentry->d_inode) { + int mode = S_IRWXU; + + if (au_test_nfs(path->dentry->d_sb)) + mode |= S_IXUGO; + err = mnt_want_write(path->mnt); + if (!err) { + err = vfsub_mkdir(h_dir, path, mode); + mnt_drop_write(path->mnt); + } + } else if (S_ISDIR(path->dentry->d_inode->i_mode)) + err = 0; + else + AuErr("unknown %.*s exists\n", AuDLNPair(path->dentry)); + + return err; +} + +struct au_wh_base { + const struct qstr *name; + struct dentry *dentry; +}; + +static void au_wh_init_ro(struct inode *h_dir, struct au_wh_base base[], + struct path *h_path) +{ + h_path->dentry = base[AuBrWh_BASE].dentry; + au_wh_clean(h_dir, h_path, /*isdir*/0); + h_path->dentry = base[AuBrWh_PLINK].dentry; + au_wh_clean(h_dir, h_path, /*isdir*/1); + h_path->dentry = base[AuBrWh_ORPH].dentry; + au_wh_clean(h_dir, h_path, /*isdir*/1); +} + +/* + * returns tri-state, + * minus: error, caller should print the mesage + * zero: succuess + * plus: error, caller should NOT print the mesage + */ +static int au_wh_init_rw_nolink(struct dentry *h_root, struct au_wbr *wbr, + int do_plink, struct au_wh_base base[], + struct path *h_path) +{ + int err; + struct inode *h_dir; + + h_dir = h_root->d_inode; + h_path->dentry = base[AuBrWh_BASE].dentry; + au_wh_clean(h_dir, h_path, /*isdir*/0); + h_path->dentry = base[AuBrWh_PLINK].dentry; + if (do_plink) { + err = test_linkable(h_root); + if (unlikely(err)) { + err = 1; + goto out; + } + + err = au_whdir(h_dir, h_path); + if (unlikely(err)) + goto out; + wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); + } else + au_wh_clean(h_dir, h_path, /*isdir*/1); + h_path->dentry = base[AuBrWh_ORPH].dentry; + err = au_whdir(h_dir, h_path); + if (unlikely(err)) + goto out; + wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); + + out: + return err; +} + +/* + * for the moment, aufs supports the branch filesystem which does not support + * link(2). testing on FAT which does not support i_op->setattr() fully either, + * copyup failed. finally, such filesystem will not be used as the writable + * branch. + * + * returns tri-state, see above. + */ +static int au_wh_init_rw(struct dentry *h_root, struct au_wbr *wbr, + int do_plink, struct au_wh_base base[], + struct path *h_path) +{ + int err; + struct inode *h_dir; + + WbrWhMustWriteLock(wbr); + + err = test_linkable(h_root); + if (unlikely(err)) { + err = 1; + goto out; + } + + /* + * todo: should this create be done in /sbin/mount.aufs helper? + */ + err = -EEXIST; + h_dir = h_root->d_inode; + if (!base[AuBrWh_BASE].dentry->d_inode) { + err = mnt_want_write(h_path->mnt); + if (!err) { + h_path->dentry = base[AuBrWh_BASE].dentry; + err = vfsub_create(h_dir, h_path, WH_MASK); + mnt_drop_write(h_path->mnt); + } + } else if (S_ISREG(base[AuBrWh_BASE].dentry->d_inode->i_mode)) + err = 0; + else + AuErr("unknown %.*s/%.*s exists\n", + AuDLNPair(h_root), AuDLNPair(base[AuBrWh_BASE].dentry)); + if (unlikely(err)) + goto out; + + h_path->dentry = base[AuBrWh_PLINK].dentry; + if (do_plink) { + err = au_whdir(h_dir, h_path); + if (unlikely(err)) + goto out; + wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); + } else + au_wh_clean(h_dir, h_path, /*isdir*/1); + wbr->wbr_whbase = dget(base[AuBrWh_BASE].dentry); + + h_path->dentry = base[AuBrWh_ORPH].dentry; + err = au_whdir(h_dir, h_path); + if (unlikely(err)) + goto out; + wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); + + out: + return err; +} + +/* + * initialize the whiteout base file/dir for @br. + */ +int au_wh_init(struct dentry *h_root, struct au_branch *br, + struct super_block *sb) +{ + int err, i; + const unsigned char do_plink + = !!au_opt_test(au_mntflags(sb), PLINK); + struct path path = { + .mnt = br->br_mnt + }; + struct inode *h_dir; + struct au_wbr *wbr = br->br_wbr; + static const struct qstr base_name[] = { + [AuBrWh_BASE] = { + .name = AUFS_BASE_NAME, + .len = sizeof(AUFS_BASE_NAME) - 1 + }, + [AuBrWh_PLINK] = { + .name = AUFS_PLINKDIR_NAME, + .len = sizeof(AUFS_PLINKDIR_NAME) - 1 + }, + [AuBrWh_ORPH] = { + .name = AUFS_ORPHDIR_NAME, + .len = sizeof(AUFS_ORPHDIR_NAME) - 1 + } + }; + struct au_wh_base base[] = { + [AuBrWh_BASE] = { + .name = base_name + AuBrWh_BASE, + .dentry = NULL + }, + [AuBrWh_PLINK] = { + .name = base_name + AuBrWh_PLINK, + .dentry = NULL + }, + [AuBrWh_ORPH] = { + .name = base_name + AuBrWh_ORPH, + .dentry = NULL + } + }; + + if (wbr) + WbrWhMustWriteLock(wbr); + + h_dir = h_root->d_inode; + for (i = 0; i < AuBrWh_Last; i++) { + /* doubly whiteouted */ + struct dentry *d; + + d = au_wh_lkup(h_root, (void *)base[i].name, br); + err = PTR_ERR(d); + if (IS_ERR(d)) + goto out; + + base[i].dentry = d; + AuDebugOn(wbr + && wbr->wbr_wh[i] + && wbr->wbr_wh[i] != base[i].dentry); + } + + if (wbr) + for (i = 0; i < AuBrWh_Last; i++) { + dput(wbr->wbr_wh[i]); + wbr->wbr_wh[i] = NULL; + } + + err = 0; + + switch (br->br_perm) { + case AuBrPerm_RO: + case AuBrPerm_ROWH: + case AuBrPerm_RR: + case AuBrPerm_RRWH: + au_wh_init_ro(h_dir, base, &path); + break; + + case AuBrPerm_RWNoLinkWH: + err = au_wh_init_rw_nolink(h_root, wbr, do_plink, base, &path); + if (err > 0) + goto out; + else if (err) + goto out_err; + break; + + case AuBrPerm_RW: + err = au_wh_init_rw(h_root, wbr, do_plink, base, &path); + if (err > 0) + goto out; + else if (err) + goto out_err; + break; + + default: + BUG(); + } + goto out; /* success */ + + out_err: + AuErr("an error(%d) on the writable branch %.*s(%s)\n", + err, AuDLNPair(h_root), au_sbtype(h_root->d_sb)); + out: + for (i = 0; i < AuBrWh_Last; i++) + dput(base[i].dentry); + return err; +} + +/* ---------------------------------------------------------------------- */ +/* + * whiteouts are all hard-linked usually. + * when its link count reaches a ceiling, we create a new whiteout base + * asynchronously. + */ + +struct reinit_br_wh { + struct super_block *sb; + struct au_branch *br; +}; + +static void reinit_br_wh(void *arg) +{ + int err; + aufs_bindex_t bindex; + struct path h_path; + struct reinit_br_wh *a = arg; + struct au_wbr *wbr; + struct inode *dir; + struct dentry *h_root; + struct au_hinode *hdir; + + err = 0; + wbr = a->br->br_wbr; + /* big aufs lock */ + si_noflush_write_lock(a->sb); + if (!au_br_writable(a->br->br_perm)) + goto out; + bindex = au_br_index(a->sb, a->br->br_id); + if (unlikely(bindex < 0)) + goto out; + + di_read_lock_parent(a->sb->s_root, AuLock_IR); + dir = a->sb->s_root->d_inode; + hdir = au_hi(dir, bindex); + h_root = au_h_dptr(a->sb->s_root, bindex); + + au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT); + wbr_wh_write_lock(wbr); + err = au_h_verify(wbr->wbr_whbase, au_opt_udba(a->sb), hdir->hi_inode, + h_root, a->br); + if (!err) { + err = mnt_want_write(a->br->br_mnt); + if (!err) { + h_path.dentry = wbr->wbr_whbase; + h_path.mnt = a->br->br_mnt; + err = vfsub_unlink(hdir->hi_inode, &h_path, /*force*/0); + mnt_drop_write(a->br->br_mnt); + } + } else { + AuWarn("%.*s is moved, ignored\n", AuDLNPair(wbr->wbr_whbase)); + err = 0; + } + dput(wbr->wbr_whbase); + wbr->wbr_whbase = NULL; + if (!err) + err = au_wh_init(h_root, a->br, a->sb); + wbr_wh_write_unlock(wbr); + au_hin_imtx_unlock(hdir); + di_read_unlock(a->sb->s_root, AuLock_IR); + + out: + if (wbr) + atomic_dec(&wbr->wbr_wh_running); + atomic_dec(&a->br->br_count); + au_nwt_done(&au_sbi(a->sb)->si_nowait); + si_write_unlock(a->sb); + kfree(arg); + if (unlikely(err)) + AuIOErr("err %d\n", err); +} + +static void kick_reinit_br_wh(struct super_block *sb, struct au_branch *br) +{ + int do_dec, wkq_err; + struct reinit_br_wh *arg; + + do_dec = 1; + if (atomic_inc_return(&br->br_wbr->wbr_wh_running) != 1) + goto out; + + /* ignore ENOMEM */ + arg = kmalloc(sizeof(*arg), GFP_NOFS); + if (arg) { + /* + * dec(wh_running), kfree(arg) and dec(br_count) + * in reinit function + */ + arg->sb = sb; + arg->br = br; + atomic_inc(&br->br_count); + wkq_err = au_wkq_nowait(reinit_br_wh, arg, sb); + if (unlikely(wkq_err)) { + atomic_dec(&br->br_wbr->wbr_wh_running); + atomic_dec(&br->br_count); + kfree(arg); + } + do_dec = 0; + } + + out: + if (do_dec) + atomic_dec(&br->br_wbr->wbr_wh_running); +} + +/* ---------------------------------------------------------------------- */ + +/* + * create the whiteout @wh. + */ +static int link_or_create_wh(struct super_block *sb, aufs_bindex_t bindex, + struct dentry *wh) +{ + int err; + struct path h_path = { + .dentry = wh + }; + struct au_branch *br; + struct au_wbr *wbr; + struct dentry *h_parent; + struct inode *h_dir; + + h_parent = wh->d_parent; /* dir inode is locked */ + h_dir = h_parent->d_inode; + IMustLock(h_dir); + + br = au_sbr(sb, bindex); + h_path.mnt = br->br_mnt; + wbr = br->br_wbr; + wbr_wh_read_lock(wbr); + if (wbr->wbr_whbase) { + err = vfsub_link(wbr->wbr_whbase, h_dir, &h_path); + if (!err || err != -EMLINK) + goto out; + + /* link count full. re-initialize br_whbase. */ + kick_reinit_br_wh(sb, br); + } + + /* return this error in this context */ + err = vfsub_create(h_dir, &h_path, WH_MASK); + + out: + wbr_wh_read_unlock(wbr); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * create or remove the diropq. + */ +static struct dentry *do_diropq(struct dentry *dentry, aufs_bindex_t bindex, + unsigned int flags) +{ + struct dentry *opq_dentry, *h_dentry; + struct super_block *sb; + struct au_branch *br; + int err; + + sb = dentry->d_sb; + br = au_sbr(sb, bindex); + h_dentry = au_h_dptr(dentry, bindex); + opq_dentry = au_lkup_one(&diropq_name, h_dentry, br, /*nd*/NULL); + if (IS_ERR(opq_dentry)) + goto out; + + if (au_ftest_diropq(flags, CREATE)) { + err = link_or_create_wh(sb, bindex, opq_dentry); + if (!err) { + au_set_dbdiropq(dentry, bindex); + goto out; /* success */ + } + } else { + struct path tmp = { + .dentry = opq_dentry, + .mnt = br->br_mnt + }; + err = do_unlink_wh(au_h_iptr(dentry->d_inode, bindex), &tmp); + if (!err) + au_set_dbdiropq(dentry, -1); + } + dput(opq_dentry); + opq_dentry = ERR_PTR(err); + + out: + return opq_dentry; +} + +struct do_diropq_args { + struct dentry **errp; + struct dentry *dentry; + aufs_bindex_t bindex; + unsigned int flags; +}; + +static void call_do_diropq(void *args) +{ + struct do_diropq_args *a = args; + *a->errp = do_diropq(a->dentry, a->bindex, a->flags); +} + +struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, + unsigned int flags) +{ + struct dentry *diropq, *h_dentry; + + h_dentry = au_h_dptr(dentry, bindex); + if (!au_test_h_perm_sio(h_dentry->d_inode, MAY_EXEC | MAY_WRITE)) + diropq = do_diropq(dentry, bindex, flags); + else { + int wkq_err; + struct do_diropq_args args = { + .errp = &diropq, + .dentry = dentry, + .bindex = bindex, + .flags = flags + }; + + wkq_err = au_wkq_wait(call_do_diropq, &args); + if (unlikely(wkq_err)) + diropq = ERR_PTR(wkq_err); + } + + return diropq; +} + +/* ---------------------------------------------------------------------- */ + +/* + * lookup whiteout dentry. + * @h_parent: lower parent dentry which must exist and be locked + * @base_name: name of dentry which will be whiteouted + * returns dentry for whiteout. + */ +struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, + struct au_branch *br) +{ + int err; + struct qstr wh_name; + struct dentry *wh_dentry; + + err = au_wh_name_alloc(&wh_name, base_name); + wh_dentry = ERR_PTR(err); + if (!err) { + wh_dentry = au_lkup_one(&wh_name, h_parent, br, /*nd*/NULL); + kfree(wh_name.name); + } + return wh_dentry; +} + +/* + * link/create a whiteout for @dentry on @bindex. + */ +struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent) +{ + struct dentry *wh_dentry; + struct super_block *sb; + int err; + + sb = dentry->d_sb; + wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, au_sbr(sb, bindex)); + if (!IS_ERR(wh_dentry) && !wh_dentry->d_inode) { + err = link_or_create_wh(sb, bindex, wh_dentry); + if (!err) + au_set_dbwh(dentry, bindex); + else { + dput(wh_dentry); + wh_dentry = ERR_PTR(err); + } + } + + return wh_dentry; +} + +/* ---------------------------------------------------------------------- */ + +/* Delete all whiteouts in this directory on branch bindex. */ +static int del_wh_children(struct dentry *h_dentry, struct au_nhash *whlist, + aufs_bindex_t bindex, struct au_branch *br) +{ + int err; + unsigned long ul, n; + struct qstr wh_name; + char *p; + struct hlist_head *head; + struct au_vdir_wh *tpos; + struct hlist_node *pos; + struct au_vdir_destr *str; + + err = -ENOMEM; + p = __getname(); + wh_name.name = p; + if (unlikely(!wh_name.name)) + goto out; + + err = 0; + memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); + p += AUFS_WH_PFX_LEN; + n = whlist->nh_num; + head = whlist->nh_head; + for (ul = 0; !err && ul < n; ul++, head++) { + hlist_for_each_entry(tpos, pos, head, wh_hash) { + if (tpos->wh_bindex != bindex) + continue; + + str = &tpos->wh_str; + if (str->len + AUFS_WH_PFX_LEN <= PATH_MAX) { + memcpy(p, str->name, str->len); + wh_name.len = AUFS_WH_PFX_LEN + str->len; + err = unlink_wh_name(h_dentry, &wh_name, br); + if (!err) + continue; + break; + } + AuIOErr("whiteout name too long %.*s\n", + str->len, str->name); + err = -EIO; + break; + } + } + __putname(wh_name.name); + + out: + return err; +} + +struct del_wh_children_args { + int *errp; + struct dentry *h_dentry; + struct au_nhash whlist; + aufs_bindex_t bindex; + struct au_branch *br; +}; + +static void call_del_wh_children(void *args) +{ + struct del_wh_children_args *a = args; + *a->errp = del_wh_children(a->h_dentry, &a->whlist, a->bindex, a->br); +} + +/* ---------------------------------------------------------------------- */ + +struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp) +{ + struct au_whtmp_rmdir *whtmp; + int err; + + SiMustAnyLock(sb); + + whtmp = kmalloc(sizeof(*whtmp), gfp); + if (unlikely(!whtmp)) { + whtmp = ERR_PTR(-ENOMEM); + goto out; + } + + whtmp->dir = NULL; + whtmp->wh_dentry = NULL; + err = au_nhash_alloc(&whtmp->whlist, au_sbi(sb)->si_rdhash, gfp); + if (!err) + return whtmp; /* success */ + + kfree(whtmp); + whtmp = ERR_PTR(err); + + out: + return whtmp; +} + +void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp) +{ + dput(whtmp->wh_dentry); + iput(whtmp->dir); + au_nhash_wh_free(&whtmp->whlist); + kfree(whtmp); +} + +/* + * rmdir the whiteouted temporary named dir @h_dentry. + * @whlist: whiteouted children. + */ +int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, + struct dentry *wh_dentry, struct au_nhash *whlist) +{ + int err; + struct path h_tmp; + struct inode *wh_inode, *h_dir; + struct au_branch *br; + + h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */ + IMustLock(h_dir); + + br = au_sbr(dir->i_sb, bindex); + wh_inode = wh_dentry->d_inode; + mutex_lock_nested(&wh_inode->i_mutex, AuLsc_I_CHILD); + + /* + * someone else might change some whiteouts while we were sleeping. + * it means this whlist may have an obsoleted entry. + */ + if (!au_test_h_perm_sio(wh_inode, MAY_EXEC | MAY_WRITE)) + err = del_wh_children(wh_dentry, whlist, bindex, br); + else { + int wkq_err; + struct del_wh_children_args args = { + .errp = &err, + .h_dentry = wh_dentry, + .whlist = *whlist, + .bindex = bindex, + .br = br + }; + + wkq_err = au_wkq_wait(call_del_wh_children, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + mutex_unlock(&wh_inode->i_mutex); + + if (!err) { + h_tmp.dentry = wh_dentry; + h_tmp.mnt = br->br_mnt; + err = vfsub_rmdir(h_dir, &h_tmp); + /* d_drop(h_dentry); */ + } + + if (!err) { + if (au_ibstart(dir) == bindex) { + au_cpup_attr_timesizes(dir); + drop_nlink(dir); + } + return 0; /* success */ + } + + AuWarn("failed removing %.*s(%d), ignored\n", + AuDLNPair(wh_dentry), err); + return err; +} + +static void call_rmdir_whtmp(void *args) +{ + int err; + struct au_whtmp_rmdir *a = args; + struct super_block *sb; + struct dentry *h_parent; + struct inode *h_dir; + struct au_branch *br; + struct au_hinode *hdir; + + /* rmdir by nfsd may cause deadlock with this i_mutex */ + /* mutex_lock(&a->dir->i_mutex); */ + sb = a->dir->i_sb; + si_noflush_read_lock(sb); + err = au_test_ro(sb, a->bindex, NULL); + if (unlikely(err)) + goto out; + + err = -EIO; + br = au_sbr(sb, a->bindex); + ii_write_lock_parent(a->dir); + h_parent = dget_parent(a->wh_dentry); + h_dir = h_parent->d_inode; + hdir = au_hi(a->dir, a->bindex); + au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT); + err = au_h_verify(a->wh_dentry, au_opt_udba(sb), h_dir, h_parent, br); + if (!err) { + err = mnt_want_write(br->br_mnt); + if (!err) { + err = au_whtmp_rmdir(a->dir, a->bindex, a->wh_dentry, + &a->whlist); + mnt_drop_write(br->br_mnt); + } + } + au_hin_imtx_unlock(hdir); + dput(h_parent); + ii_write_unlock(a->dir); + + out: + /* mutex_unlock(&a->dir->i_mutex); */ + au_nwt_done(&au_sbi(sb)->si_nowait); + si_read_unlock(sb); + au_whtmp_rmdir_free(a); + if (unlikely(err)) + AuIOErr("err %d\n", err); +} + +void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, + struct dentry *wh_dentry, struct au_whtmp_rmdir *args) +{ + int wkq_err; + + IMustLock(dir); + + /* all post-process will be done in do_rmdir_whtmp(). */ + args->dir = au_igrab(dir); + args->bindex = bindex; + args->wh_dentry = dget(wh_dentry); + wkq_err = au_wkq_nowait(call_rmdir_whtmp, args, dir->i_sb); + if (unlikely(wkq_err)) { + AuWarn("rmdir error %.*s (%d), ignored\n", + AuDLNPair(wh_dentry), wkq_err); + au_whtmp_rmdir_free(args); + } +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/i_op_del.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/i_op_del.c @@ -0,0 +1,468 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inode operations (del entry) + */ + +#include "aufs.h" + +/* + * decide if a new whiteout for @dentry is necessary or not. + * when it is necessary, prepare the parent dir for the upper branch whose + * branch index is @bcpup for creation. the actual creation of the whiteout will + * be done by caller. + * return value: + * 0: wh is unnecessary + * plus: wh is necessary + * minus: error + */ +int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup) +{ + int need_wh, err; + aufs_bindex_t bstart; + struct super_block *sb; + + sb = dentry->d_sb; + bstart = au_dbstart(dentry); + if (*bcpup < 0) { + *bcpup = bstart; + if (au_test_ro(sb, bstart, dentry->d_inode)) { + err = AuWbrCopyup(au_sbi(sb), dentry); + *bcpup = err; + if (unlikely(err < 0)) + goto out; + } + } else + AuDebugOn(bstart < *bcpup + || au_test_ro(sb, *bcpup, dentry->d_inode)); + AuDbg("bcpup %d, bstart %d\n", *bcpup, bstart); + + if (*bcpup != bstart) { + err = au_cpup_dirs(dentry, *bcpup); + if (unlikely(err)) + goto out; + need_wh = 1; + } else { + aufs_bindex_t old_bend, new_bend, bdiropq = -1; + + old_bend = au_dbend(dentry); + if (isdir) { + bdiropq = au_dbdiropq(dentry); + au_set_dbdiropq(dentry, -1); + } + need_wh = au_lkup_dentry(dentry, bstart + 1, /*type*/0, + /*nd*/NULL); + err = need_wh; + if (isdir) + au_set_dbdiropq(dentry, bdiropq); + if (unlikely(err < 0)) + goto out; + new_bend = au_dbend(dentry); + if (!need_wh && old_bend != new_bend) { + au_set_h_dptr(dentry, new_bend, NULL); + au_set_dbend(dentry, old_bend); + } + } + AuDbg("need_wh %d\n", need_wh); + err = need_wh; + + out: + return err; +} + +/* + * simple tests for the del-entry operations. + * following the checks in vfs, plus the parent-child relationship. + */ +int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent, int isdir) +{ + int err; + umode_t h_mode; + struct dentry *h_dentry, *h_latest; + struct inode *h_inode; + + h_dentry = au_h_dptr(dentry, bindex); + h_inode = h_dentry->d_inode; + if (dentry->d_inode) { + err = -ENOENT; + if (unlikely(!h_inode || !h_inode->i_nlink)) + goto out; + + h_mode = h_inode->i_mode; + if (!isdir) { + err = -EISDIR; + if (unlikely(S_ISDIR(h_mode))) + goto out; + } else if (unlikely(!S_ISDIR(h_mode))) { + err = -ENOTDIR; + goto out; + } + } else { + /* rename(2) case */ + err = -EIO; + if (unlikely(h_inode)) + goto out; + } + + err = -ENOENT; + /* expected parent dir is locked */ + if (unlikely(h_parent != h_dentry->d_parent)) + goto out; + err = 0; + + /* + * rmdir a dir may break the consistency on some filesystem. + * let's try heavy test. + */ + err = -EACCES; + if (unlikely(au_test_h_perm(h_parent->d_inode, MAY_EXEC | MAY_WRITE))) + goto out; + + h_latest = au_sio_lkup_one(&dentry->d_name, h_parent, + au_sbr(dentry->d_sb, bindex)); + err = -EIO; + if (IS_ERR(h_latest)) + goto out; + if (h_latest == h_dentry) + err = 0; + dput(h_latest); + + out: + return err; +} + +/* + * decide the branch where we operate for @dentry. the branch index will be set + * @rbcpup. after diciding it, 'pin' it and store the timestamps of the parent + * dir for reverting. + * when a new whiteout is necessary, create it. + */ +static struct dentry* +lock_hdir_create_wh(struct dentry *dentry, int isdir, aufs_bindex_t *rbcpup, + struct au_dtime *dt, struct au_pin *pin) +{ + struct dentry *wh_dentry; + struct super_block *sb; + struct path h_path; + int err, need_wh; + unsigned int udba; + aufs_bindex_t bcpup; + + need_wh = au_wr_dir_need_wh(dentry, isdir, rbcpup); + wh_dentry = ERR_PTR(need_wh); + if (unlikely(need_wh < 0)) + goto out; + + sb = dentry->d_sb; + udba = au_opt_udba(sb); + bcpup = *rbcpup; + err = au_pin(pin, dentry, bcpup, udba, + AuPin_DI_LOCKED | AuPin_MNT_WRITE); + wh_dentry = ERR_PTR(err); + if (unlikely(err)) + goto out; + + h_path.dentry = au_pinned_h_parent(pin); + if (udba != AuOpt_UDBA_NONE + && au_dbstart(dentry) == bcpup) { + err = au_may_del(dentry, bcpup, h_path.dentry, isdir); + wh_dentry = ERR_PTR(err); + if (unlikely(err)) + goto out_unpin; + } + + h_path.mnt = au_sbr_mnt(sb, bcpup); + au_dtime_store(dt, au_pinned_parent(pin), &h_path); + wh_dentry = NULL; + if (!need_wh) + goto out; /* success, no need to create whiteout */ + + wh_dentry = au_wh_create(dentry, bcpup, h_path.dentry); + if (!IS_ERR(wh_dentry)) + goto out; /* success */ + /* returns with the parent is locked and wh_dentry is dget-ed */ + + out_unpin: + au_unpin(pin); + out: + return wh_dentry; +} + +/* + * when removing a dir, rename it to a unique temporary whiteout-ed name first + * in order to be revertible and save time for removing many child whiteouts + * under the dir. + * returns 1 when there are too many child whiteout and caller should remove + * them asynchronously. returns 0 when the number of children is enough small to + * remove now or the branch fs is a remote fs. + * otherwise return an error. + */ +static int renwh_and_rmdir(struct dentry *dentry, aufs_bindex_t bindex, + struct au_nhash *whlist, struct inode *dir) +{ + int rmdir_later, err, dirwh; + struct dentry *h_dentry; + struct super_block *sb; + + sb = dentry->d_sb; + SiMustAnyLock(sb); + h_dentry = au_h_dptr(dentry, bindex); + err = au_whtmp_ren(h_dentry, au_sbr(sb, bindex)); + if (unlikely(err)) + goto out; + + /* stop monitoring */ + au_hin_free(au_hi(dentry->d_inode, bindex)); + + if (!au_test_fs_remote(h_dentry->d_sb)) { + dirwh = au_sbi(sb)->si_dirwh; + rmdir_later = (dirwh <= 1); + if (!rmdir_later) + rmdir_later = au_nhash_test_longer_wh(whlist, bindex, + dirwh); + if (rmdir_later) + return rmdir_later; + } + + err = au_whtmp_rmdir(dir, bindex, h_dentry, whlist); + if (unlikely(err)) { + AuIOErr("rmdir %.*s, b%d failed, %d. ignored\n", + AuDLNPair(h_dentry), bindex, err); + err = 0; + } + + out: + return err; +} + +/* + * final procedure for deleting a entry. + * maintain dentry and iattr. + */ +static void epilog(struct inode *dir, struct dentry *dentry, + aufs_bindex_t bindex) +{ + struct inode *inode; + + inode = dentry->d_inode; + d_drop(dentry); + inode->i_ctime = dir->i_ctime; + + if (atomic_read(&dentry->d_count) == 1) { + au_set_h_dptr(dentry, au_dbstart(dentry), NULL); + au_update_dbstart(dentry); + } + if (au_ibstart(dir) == bindex) + au_cpup_attr_timesizes(dir); + dir->i_version++; +} + +/* + * when an error happened, remove the created whiteout and revert everything. + */ +static int do_revert(int err, struct inode *dir, aufs_bindex_t bwh, + struct dentry *wh_dentry, struct dentry *dentry, + struct au_dtime *dt) +{ + int rerr; + struct path h_path = { + .dentry = wh_dentry, + .mnt = au_sbr_mnt(dir->i_sb, bwh) + }; + + rerr = au_wh_unlink_dentry(au_h_iptr(dir, bwh), &h_path, dentry); + if (!rerr) { + au_set_dbwh(dentry, bwh); + au_dtime_revert(dt); + return 0; + } + + AuIOErr("%.*s reverting whiteout failed(%d, %d)\n", + AuDLNPair(dentry), err, rerr); + return -EIO; +} + +/* ---------------------------------------------------------------------- */ + +int aufs_unlink(struct inode *dir, struct dentry *dentry) +{ + int err; + aufs_bindex_t bwh, bindex, bstart; + struct au_dtime dt; + struct au_pin pin; + struct path h_path; + struct inode *inode, *h_dir; + struct dentry *parent, *wh_dentry; + + IMustLock(dir); + inode = dentry->d_inode; + if (unlikely(!inode)) + return -ENOENT; /* possible? */ + IMustLock(inode); + + aufs_read_lock(dentry, AuLock_DW); + parent = dentry->d_parent; /* dir inode is locked */ + di_write_lock_parent(parent); + + bstart = au_dbstart(dentry); + bwh = au_dbwh(dentry); + bindex = -1; + wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/0, &bindex, &dt, &pin); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out; + + h_path.mnt = au_sbr_mnt(dentry->d_sb, bstart); + h_path.dentry = au_h_dptr(dentry, bstart); + dget(h_path.dentry); + if (bindex == bstart) { + h_dir = au_pinned_h_dir(&pin); + err = vfsub_unlink(h_dir, &h_path, /*force*/0); + } else { + /* dir inode is locked */ + h_dir = wh_dentry->d_parent->d_inode; + IMustLock(h_dir); + err = 0; + } + + if (!err) { + drop_nlink(inode); + epilog(dir, dentry, bindex); + + /* update target timestamps */ + if (bindex == bstart) { + vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/ + inode->i_ctime = h_path.dentry->d_inode->i_ctime; + } else + /* todo: this timestamp may be reverted later */ + inode->i_ctime = h_dir->i_ctime; + goto out_unlock; /* success */ + } + + /* revert */ + if (wh_dentry) { + int rerr; + + rerr = do_revert(err, dir, bwh, wh_dentry, dentry, &dt); + if (rerr) + err = rerr; + } + + out_unlock: + au_unpin(&pin); + dput(wh_dentry); + dput(h_path.dentry); + out: + di_write_unlock(parent); + aufs_read_unlock(dentry, AuLock_DW); + return err; +} + +int aufs_rmdir(struct inode *dir, struct dentry *dentry) +{ + int err, rmdir_later; + aufs_bindex_t bwh, bindex, bstart; + struct au_dtime dt; + struct au_pin pin; + struct inode *inode; + struct dentry *parent, *wh_dentry, *h_dentry; + struct au_whtmp_rmdir *args; + + IMustLock(dir); + inode = dentry->d_inode; + err = -ENOENT; /* possible? */ + if (unlikely(!inode)) + goto out; + IMustLock(inode); + + aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH); + err = -ENOMEM; + args = au_whtmp_rmdir_alloc(dir->i_sb, GFP_NOFS); + if (unlikely(!args)) + goto out_unlock; + + parent = dentry->d_parent; /* dir inode is locked */ + di_write_lock_parent(parent); + err = au_test_empty(dentry, &args->whlist); + if (unlikely(err)) + goto out_args; + + bstart = au_dbstart(dentry); + bwh = au_dbwh(dentry); + bindex = -1; + wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/1, &bindex, &dt, &pin); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out_args; + + h_dentry = au_h_dptr(dentry, bstart); + dget(h_dentry); + rmdir_later = 0; + if (bindex == bstart) { + err = renwh_and_rmdir(dentry, bstart, &args->whlist, dir); + if (err > 0) { + rmdir_later = err; + err = 0; + } + } else { + /* stop monitoring */ + au_hin_free(au_hi(inode, bstart)); + + /* dir inode is locked */ + IMustLock(wh_dentry->d_parent->d_inode); + err = 0; + } + + if (!err) { + clear_nlink(inode); + au_set_dbdiropq(dentry, -1); + epilog(dir, dentry, bindex); + + if (rmdir_later) { + au_whtmp_kick_rmdir(dir, bstart, h_dentry, args); + args = NULL; + } + + goto out_unpin; /* success */ + } + + /* revert */ + AuLabel(revert); + if (wh_dentry) { + int rerr; + + rerr = do_revert(err, dir, bwh, wh_dentry, dentry, &dt); + if (rerr) + err = rerr; + } + + out_unpin: + au_unpin(&pin); + dput(wh_dentry); + dput(h_dentry); + out_args: + di_write_unlock(parent); + if (args) + au_whtmp_rmdir_free(args); + out_unlock: + aufs_read_unlock(dentry, AuLock_DW); + out: + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/hinotify.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/hinotify.c @@ -0,0 +1,755 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * inotify for the lower directories + */ + +#include "aufs.h" + +static const __u32 AuHinMask = (IN_MOVE | IN_DELETE | IN_CREATE); +static struct inotify_handle *au_hin_handle; + +AuCacheFuncs(hinotify, HINOTIFY); + +int au_hin_alloc(struct au_hinode *hinode, struct inode *inode, + struct inode *h_inode) +{ + int err; + struct au_hinotify *hin; + s32 wd; + + err = -ENOMEM; + hin = au_cache_alloc_hinotify(); + if (hin) { + AuDebugOn(hinode->hi_notify); + hinode->hi_notify = hin; + hin->hin_aufs_inode = inode; + + inotify_init_watch(&hin->hin_watch); + wd = inotify_add_watch(au_hin_handle, &hin->hin_watch, h_inode, + AuHinMask); + if (wd >= 0) + return 0; /* success */ + + err = wd; + put_inotify_watch(&hin->hin_watch); + au_cache_free_hinotify(hin); + hinode->hi_notify = NULL; + } + + return err; +} + +void au_hin_free(struct au_hinode *hinode) +{ + int err; + struct au_hinotify *hin; + + hin = hinode->hi_notify; + if (hin) { + err = 0; + if (atomic_read(&hin->hin_watch.count)) + err = inotify_rm_watch(au_hin_handle, &hin->hin_watch); + if (unlikely(err)) + /* it means the watch is already removed */ + AuWarn("failed inotify_rm_watch() %d\n", err); + au_cache_free_hinotify(hin); + hinode->hi_notify = NULL; + } +} + +/* ---------------------------------------------------------------------- */ + +void au_hin_ctl(struct au_hinode *hinode, int do_set) +{ + struct inode *h_inode; + struct inotify_watch *watch; + + if (!hinode->hi_notify) + return; + + h_inode = hinode->hi_inode; + IMustLock(h_inode); + + /* todo: try inotify_find_update_watch()? */ + watch = &hinode->hi_notify->hin_watch; + mutex_lock(&h_inode->inotify_mutex); + /* mutex_lock(&watch->ih->mutex); */ + if (do_set) { + AuDebugOn(watch->mask & AuHinMask); + watch->mask |= AuHinMask; + } else { + AuDebugOn(!(watch->mask & AuHinMask)); + watch->mask &= ~AuHinMask; + } + /* mutex_unlock(&watch->ih->mutex); */ + mutex_unlock(&h_inode->inotify_mutex); +} + +void au_reset_hinotify(struct inode *inode, unsigned int flags) +{ + aufs_bindex_t bindex, bend; + struct inode *hi; + struct dentry *iwhdentry; + + bend = au_ibend(inode); + for (bindex = au_ibstart(inode); bindex <= bend; bindex++) { + hi = au_h_iptr(inode, bindex); + if (!hi) + continue; + + /* mutex_lock_nested(&hi->i_mutex, AuLsc_I_CHILD); */ + iwhdentry = au_hi_wh(inode, bindex); + if (iwhdentry) + dget(iwhdentry); + au_igrab(hi); + au_set_h_iptr(inode, bindex, NULL, 0); + au_set_h_iptr(inode, bindex, au_igrab(hi), + flags & ~AuHi_XINO); + iput(hi); + dput(iwhdentry); + /* mutex_unlock(&hi->i_mutex); */ + } +} + +/* ---------------------------------------------------------------------- */ + +static int hin_xino(struct inode *inode, struct inode *h_inode) +{ + int err; + aufs_bindex_t bindex, bend, bfound, bstart; + struct inode *h_i; + + err = 0; + if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { + AuWarn("branch root dir was changed\n"); + goto out; + } + + bfound = -1; + bend = au_ibend(inode); + bstart = au_ibstart(inode); +#if 0 /* reserved for future use */ + if (bindex == bend) { + /* keep this ino in rename case */ + goto out; + } +#endif + for (bindex = bstart; bindex <= bend; bindex++) { + if (au_h_iptr(inode, bindex) == h_inode) { + bfound = bindex; + break; + } + } + if (bfound < 0) + goto out; + + for (bindex = bstart; bindex <= bend; bindex++) { + h_i = au_h_iptr(inode, bindex); + if (!h_i) + continue; + + err = au_xino_write(inode->i_sb, bindex, h_i->i_ino, /*ino*/0); + /* ignore this error */ + /* bad action? */ + } + + /* children inode number will be broken */ + + out: + AuTraceErr(err); + return err; +} + +static int hin_gen_tree(struct dentry *dentry) +{ + int err, i, j, ndentry; + struct au_dcsub_pages dpages; + struct au_dpage *dpage; + struct dentry **dentries; + + err = au_dpages_init(&dpages, GFP_NOFS); + if (unlikely(err)) + goto out; + err = au_dcsub_pages(&dpages, dentry, NULL, NULL); + if (unlikely(err)) + goto out_dpages; + + for (i = 0; i < dpages.ndpage; i++) { + dpage = dpages.dpages + i; + dentries = dpage->dentries; + ndentry = dpage->ndentry; + for (j = 0; j < ndentry; j++) { + struct dentry *d; + + d = dentries[j]; + if (IS_ROOT(d)) + continue; + + d_drop(d); + au_digen_dec(d); + if (d->d_inode) + /* todo: reset children xino? + cached children only? */ + au_iigen_dec(d->d_inode); + } + } + + out_dpages: + au_dpages_free(&dpages); + + /* discard children */ + dentry_unhash(dentry); + dput(dentry); + out: + return err; +} + +/* + * return 0 if processed. + */ +static int hin_gen_by_inode(char *name, unsigned int nlen, struct inode *inode, + const unsigned int isdir) +{ + int err; + struct dentry *d; + struct qstr *dname; + + err = 1; + if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { + AuWarn("branch root dir was changed\n"); + err = 0; + goto out; + } + + if (!isdir) { + AuDebugOn(!name); + au_iigen_dec(inode); + spin_lock(&dcache_lock); + list_for_each_entry(d, &inode->i_dentry, d_alias) { + dname = &d->d_name; + if (dname->len != nlen + && memcmp(dname->name, name, nlen)) + continue; + err = 0; + spin_lock(&d->d_lock); + __d_drop(d); + au_digen_dec(d); + spin_unlock(&d->d_lock); + break; + } + spin_unlock(&dcache_lock); + } else { + au_fset_si(au_sbi(inode->i_sb), FAILED_REFRESH_DIRS); + d = d_find_alias(inode); + if (!d) { + au_iigen_dec(inode); + goto out; + } + + dname = &d->d_name; + if (dname->len == nlen && !memcmp(dname->name, name, nlen)) + err = hin_gen_tree(d); + dput(d); + } + + out: + AuTraceErr(err); + return err; +} + +static int hin_gen_by_name(struct dentry *dentry, const unsigned int isdir) +{ + int err; + struct inode *inode; + + inode = dentry->d_inode; + if (IS_ROOT(dentry) + /* || (inode && inode->i_ino == AUFS_ROOT_INO) */ + ) { + AuWarn("branch root dir was changed\n"); + return 0; + } + + err = 0; + if (!isdir) { + d_drop(dentry); + au_digen_dec(dentry); + if (inode) + au_iigen_dec(inode); + } else { + au_fset_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIRS); + if (inode) + err = hin_gen_tree(dentry); + } + + AuTraceErr(err); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* hinotify job flags */ +#define AuHinJob_XINO0 1 +#define AuHinJob_GEN (1 << 1) +#define AuHinJob_DIRENT (1 << 2) +#define AuHinJob_ISDIR (1 << 3) +#define AuHinJob_TRYXINO0 (1 << 4) +#define AuHinJob_MNTPNT (1 << 5) +#define au_ftest_hinjob(flags, name) ((flags) & AuHinJob_##name) +#define au_fset_hinjob(flags, name) { (flags) |= AuHinJob_##name; } +#define au_fclr_hinjob(flags, name) { (flags) &= ~AuHinJob_##name; } + +struct hin_job_args { + unsigned int flags; + struct inode *inode, *h_inode, *dir, *h_dir; + struct dentry *dentry; + char *h_name; + int h_nlen; +}; + +static int hin_job(struct hin_job_args *a) +{ + const unsigned int isdir = au_ftest_hinjob(a->flags, ISDIR); + + /* reset xino */ + if (au_ftest_hinjob(a->flags, XINO0) && a->inode) + hin_xino(a->inode, a->h_inode); /* ignore this error */ + + if (au_ftest_hinjob(a->flags, TRYXINO0) + && a->inode + && a->h_inode) { + mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); + if (!a->h_inode->i_nlink) + hin_xino(a->inode, a->h_inode); /* ignore this error */ + mutex_unlock(&a->h_inode->i_mutex); + } + + /* make the generation obsolete */ + if (au_ftest_hinjob(a->flags, GEN)) { + int err = -1; + if (a->inode) + err = hin_gen_by_inode(a->h_name, a->h_nlen, a->inode, + isdir); + if (err && a->dentry) + hin_gen_by_name(a->dentry, isdir); + /* ignore this error */ + } + + /* make dir entries obsolete */ + if (au_ftest_hinjob(a->flags, DIRENT) && a->inode) { + struct au_vdir *vdir; + + vdir = au_ivdir(a->inode); + if (vdir) + vdir->vd_jiffy = 0; + /* IMustLock(a->inode); */ + /* a->inode->i_version++; */ + } + + /* can do nothing but warn */ + if (au_ftest_hinjob(a->flags, MNTPNT) + && a->dentry + && d_mountpoint(a->dentry)) + AuWarn("mount-point %.*s is removed or renamed\n", + AuDLNPair(a->dentry)); + + return 0; +} + +/* ---------------------------------------------------------------------- */ + +static char *in_name(u32 mask) +{ +#ifdef CONFIG_AUFS_DEBUG +#define test_ret(flag) if (mask & flag) \ + return #flag; + test_ret(IN_ACCESS); + test_ret(IN_MODIFY); + test_ret(IN_ATTRIB); + test_ret(IN_CLOSE_WRITE); + test_ret(IN_CLOSE_NOWRITE); + test_ret(IN_OPEN); + test_ret(IN_MOVED_FROM); + test_ret(IN_MOVED_TO); + test_ret(IN_CREATE); + test_ret(IN_DELETE); + test_ret(IN_DELETE_SELF); + test_ret(IN_MOVE_SELF); + test_ret(IN_UNMOUNT); + test_ret(IN_Q_OVERFLOW); + test_ret(IN_IGNORED); + return ""; +#undef test_ret +#else + return "??"; +#endif +} + +static struct dentry *lookup_wlock_by_name(char *name, unsigned int nlen, + struct inode *dir) +{ + struct dentry *dentry, *d, *parent; + struct qstr *dname; + + parent = d_find_alias(dir); + if (!parent) + return NULL; + + dentry = NULL; + spin_lock(&dcache_lock); + list_for_each_entry(d, &parent->d_subdirs, d_u.d_child) { + /* AuDbg("%.*s\n", AuDLNPair(d)); */ + dname = &d->d_name; + if (dname->len != nlen || memcmp(dname->name, name, nlen)) + continue; + if (!atomic_read(&d->d_count) || !d->d_fsdata) { + spin_lock(&d->d_lock); + __d_drop(d); + spin_unlock(&d->d_lock); + continue; + } + + dentry = dget(d); + break; + } + spin_unlock(&dcache_lock); + dput(parent); + + if (dentry) + di_write_lock_child(dentry); + + return dentry; +} + +static struct inode *lookup_wlock_by_ino(struct super_block *sb, + aufs_bindex_t bindex, ino_t h_ino) +{ + struct inode *inode; + ino_t ino; + int err; + + inode = NULL; + err = au_xino_read(sb, bindex, h_ino, &ino); + if (!err && ino) + inode = ilookup(sb, ino); + if (!inode) + goto out; + + if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { + AuWarn("wrong root branch\n"); + iput(inode); + inode = NULL; + goto out; + } + + ii_write_lock_child(inode); + + out: + return inode; +} + +enum { CHILD, PARENT }; +struct postproc_args { + struct inode *h_dir, *dir, *h_child_inode; + u32 mask; + unsigned int flags[2]; + unsigned int h_child_nlen; + char h_child_name[]; +}; + +static void postproc(void *_args) +{ + struct postproc_args *a = _args; + struct super_block *sb; + aufs_bindex_t bindex, bend, bfound; + unsigned char xino, try_iput; + int err; + struct inode *inode; + ino_t h_ino; + struct hin_job_args args; + struct dentry *dentry; + struct au_sbinfo *sbinfo; + + AuDebugOn(!_args); + AuDebugOn(!a->h_dir); + AuDebugOn(!a->dir); + AuDebugOn(!a->mask); + AuDbg("mask 0x%x %s, i%lu, hi%lu, hci%lu\n", + a->mask, in_name(a->mask), a->dir->i_ino, a->h_dir->i_ino, + a->h_child_inode ? a->h_child_inode->i_ino : 0); + + inode = NULL; + dentry = NULL; + /* + * do not lock a->dir->i_mutex here + * because of d_revalidate() may cause a deadlock. + */ + sb = a->dir->i_sb; + AuDebugOn(!sb); + sbinfo = au_sbi(sb); + AuDebugOn(!sbinfo); + /* big aufs lock */ + si_noflush_write_lock(sb); + + ii_read_lock_parent(a->dir); + bfound = -1; + bend = au_ibend(a->dir); + for (bindex = au_ibstart(a->dir); bindex <= bend; bindex++) + if (au_h_iptr(a->dir, bindex) == a->h_dir) { + bfound = bindex; + break; + } + ii_read_unlock(a->dir); + if (unlikely(bfound < 0)) + goto out; + + xino = !!au_opt_test(au_mntflags(sb), XINO); + h_ino = 0; + if (a->h_child_inode) + h_ino = a->h_child_inode->i_ino; + + if (a->h_child_nlen + && (au_ftest_hinjob(a->flags[CHILD], GEN) + || au_ftest_hinjob(a->flags[CHILD], MNTPNT))) + dentry = lookup_wlock_by_name(a->h_child_name, a->h_child_nlen, + a->dir); + try_iput = 0; + if (dentry) + inode = dentry->d_inode; + if (xino && !inode && h_ino + && (au_ftest_hinjob(a->flags[CHILD], XINO0) + || au_ftest_hinjob(a->flags[CHILD], TRYXINO0) + || au_ftest_hinjob(a->flags[CHILD], GEN))) { + inode = lookup_wlock_by_ino(sb, bfound, h_ino); + try_iput = 1; + } + + args.flags = a->flags[CHILD]; + args.dentry = dentry; + args.inode = inode; + args.h_inode = a->h_child_inode; + args.dir = a->dir; + args.h_dir = a->h_dir; + args.h_name = a->h_child_name; + args.h_nlen = a->h_child_nlen; + err = hin_job(&args); + if (dentry) { + if (dentry->d_fsdata) + di_write_unlock(dentry); + dput(dentry); + } + if (inode && try_iput) { + ii_write_unlock(inode); + iput(inode); + } + + ii_write_lock_parent(a->dir); + args.flags = a->flags[PARENT]; + args.dentry = NULL; + args.inode = a->dir; + args.h_inode = a->h_dir; + args.dir = NULL; + args.h_dir = NULL; + args.h_name = NULL; + args.h_nlen = 0; + err = hin_job(&args); + ii_write_unlock(a->dir); + + out: + au_nwt_done(&sbinfo->si_nowait); + si_write_unlock(sb); + + iput(a->h_child_inode); + iput(a->h_dir); + iput(a->dir); + kfree(a); +} + +/* ---------------------------------------------------------------------- */ + +static void aufs_inotify(struct inotify_watch *watch, u32 wd __maybe_unused, + u32 mask, u32 cookie __maybe_unused, + const char *h_child_name, struct inode *h_child_inode) +{ + struct au_hinotify *hinotify; + struct postproc_args *args; + int len, wkq_err; + unsigned char isdir, isroot, wh; + char *p; + struct inode *dir; + unsigned int flags[2]; + + /* if IN_UNMOUNT happens, there must be another bug */ + AuDebugOn(mask & IN_UNMOUNT); + if (mask & (IN_IGNORED | IN_UNMOUNT)) { + put_inotify_watch(watch); + return; + } +#ifdef AuDbgHinotify + au_debug(1); + if (1 || !h_child_name || strcmp(h_child_name, AUFS_XINO_FNAME)) { + AuDbg("i%lu, wd %d, mask 0x%x %s, cookie 0x%x, hcname %s," + " hi%lu\n", + watch->inode->i_ino, wd, mask, in_name(mask), cookie, + h_child_name ? h_child_name : "", + h_child_inode ? h_child_inode->i_ino : 0); + WARN_ON(1); + } + au_debug(0); +#endif + + hinotify = container_of(watch, struct au_hinotify, hin_watch); + AuDebugOn(!hinotify || !hinotify->hin_aufs_inode); + dir = igrab(hinotify->hin_aufs_inode); + if (!dir) + return; + + isroot = (dir->i_ino == AUFS_ROOT_INO); + len = 0; + wh = 0; + if (h_child_name) { + len = strlen(h_child_name); + if (!memcmp(h_child_name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { + h_child_name += AUFS_WH_PFX_LEN; + len -= AUFS_WH_PFX_LEN; + wh = 1; + } + } + + isdir = 0; + if (h_child_inode) + isdir = !!S_ISDIR(h_child_inode->i_mode); + flags[PARENT] = AuHinJob_ISDIR; + flags[CHILD] = 0; + if (isdir) + flags[CHILD] = AuHinJob_ISDIR; + switch (mask & IN_ALL_EVENTS) { + case IN_MOVED_FROM: + case IN_MOVED_TO: + AuDebugOn(!h_child_name || !h_child_inode); + au_fset_hinjob(flags[CHILD], GEN); + au_fset_hinjob(flags[CHILD], XINO0); + au_fset_hinjob(flags[CHILD], MNTPNT); + au_fset_hinjob(flags[PARENT], DIRENT); + break; + + case IN_CREATE: + AuDebugOn(!h_child_name || !h_child_inode); + au_fset_hinjob(flags[PARENT], DIRENT); + au_fset_hinjob(flags[CHILD], GEN); + break; + + case IN_DELETE: + /* + * aufs never be able to get this child inode. + * revalidation should be in d_revalidate() + * by checking i_nlink, i_generation or d_unhashed(). + */ + AuDebugOn(!h_child_name); + au_fset_hinjob(flags[PARENT], DIRENT); + au_fset_hinjob(flags[CHILD], GEN); + au_fset_hinjob(flags[CHILD], TRYXINO0); + au_fset_hinjob(flags[CHILD], MNTPNT); + break; + + default: + AuDebugOn(1); + } + + if (wh) + h_child_inode = NULL; + + /* iput() and kfree() will be called in postproc() */ + /* + * inotify_mutex is already acquired and kmalloc/prune_icache may lock + * iprune_mutex. strange. + */ + lockdep_off(); + args = kmalloc(sizeof(*args) + len + 1, GFP_NOFS); + lockdep_on(); + if (unlikely(!args)) { + AuErr1("no memory\n"); + iput(dir); + return; + } + args->flags[PARENT] = flags[PARENT]; + args->flags[CHILD] = flags[CHILD]; + args->mask = mask; + args->dir = dir; + args->h_dir = igrab(watch->inode); + if (h_child_inode) + h_child_inode = igrab(h_child_inode); /* can be NULL */ + args->h_child_inode = h_child_inode; + args->h_child_nlen = len; + if (len) { + p = (void *)args; + p += sizeof(*args); + memcpy(p, h_child_name, len + 1); + } + + lockdep_off(); + wkq_err = au_wkq_nowait(postproc, args, dir->i_sb); + lockdep_on(); + if (unlikely(wkq_err)) + AuErr("wkq %d\n", wkq_err); +} + +static void aufs_inotify_destroy(struct inotify_watch *watch __maybe_unused) +{ + return; +} + +static struct inotify_operations aufs_inotify_ops = { + .handle_event = aufs_inotify, + .destroy_watch = aufs_inotify_destroy +}; + +/* ---------------------------------------------------------------------- */ + +static void au_hin_destroy_cache(void) +{ + kmem_cache_destroy(au_cachep[AuCache_HINOTIFY]); + au_cachep[AuCache_HINOTIFY] = NULL; +} + +int __init au_hinotify_init(void) +{ + int err; + + err = -ENOMEM; + au_cachep[AuCache_HINOTIFY] = AuCache(au_hinotify); + if (au_cachep[AuCache_HINOTIFY]) { + err = 0; + au_hin_handle = inotify_init(&aufs_inotify_ops); + if (IS_ERR(au_hin_handle)) { + err = PTR_ERR(au_hin_handle); + au_hin_destroy_cache(); + } + } + AuTraceErr(err); + return err; +} + +void au_hinotify_fin(void) +{ + inotify_destroy(au_hin_handle); + if (au_cachep[AuCache_HINOTIFY]) + au_hin_destroy_cache(); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dir.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dir.h @@ -0,0 +1,114 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * directory operations + */ + +#ifndef __AUFS_DIR_H__ +#define __AUFS_DIR_H__ + +#ifdef __KERNEL__ + +#include +#include + +/* ---------------------------------------------------------------------- */ + +/* need to be faster and smaller */ + +struct au_nhash { + unsigned int nh_num; + struct hlist_head *nh_head; +}; + +struct au_vdir_destr { + unsigned char len; + unsigned char name[0]; +} __packed; + +struct au_vdir_dehstr { + struct hlist_node hash; + struct au_vdir_destr *str; +}; + +struct au_vdir_de { + ino_t de_ino; + unsigned char de_type; + /* caution: packed */ + struct au_vdir_destr de_str; +} __packed; + +struct au_vdir_wh { + struct hlist_node wh_hash; +#ifdef CONFIG_AUFS_SHWH + ino_t wh_ino; + aufs_bindex_t wh_bindex; + unsigned char wh_type; +#else + aufs_bindex_t wh_bindex; +#endif + /* caution: packed */ + struct au_vdir_destr wh_str; +} __packed; + +union au_vdir_deblk_p { + unsigned char *deblk; + struct au_vdir_de *de; +}; + +struct au_vdir { + unsigned char **vd_deblk; + unsigned long vd_nblk; + struct { + unsigned long ul; + union au_vdir_deblk_p p; + } vd_last; + + unsigned long vd_version; + unsigned int vd_deblk_sz; + unsigned long vd_jiffy; +}; + +/* ---------------------------------------------------------------------- */ + +/* dir.c */ +extern const struct file_operations aufs_dir_fop; +void au_add_nlink(struct inode *dir, struct inode *h_dir); +void au_sub_nlink(struct inode *dir, struct inode *h_dir); +int au_test_empty_lower(struct dentry *dentry); +int au_test_empty(struct dentry *dentry, struct au_nhash *whlist); + +/* vdir.c */ +int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp); +void au_nhash_wh_free(struct au_nhash *whlist); +int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, + int limit); +int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen); +int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, + unsigned int d_type, aufs_bindex_t bindex, + unsigned char shwh); +void au_vdir_free(struct au_vdir *vdir); +int au_vdir_init(struct file *file); +int au_vdir_fill_de(struct file *file, void *dirent, filldir_t filldir); + +/* ioctl.c */ +long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg); + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DIR_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/f_op.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/f_op.c @@ -0,0 +1,802 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * file and vm operations + */ + +#include +#include +#include +#include +#include "aufs.h" + +/* common function to regular file and dir */ +int aufs_flush(struct file *file, fl_owner_t id) +{ + int err; + aufs_bindex_t bindex, bend; + struct dentry *dentry; + struct file *h_file; + + dentry = file->f_dentry; + si_noflush_read_lock(dentry->d_sb); + fi_read_lock(file); + di_read_lock_child(dentry, AuLock_IW); + + err = 0; + bend = au_fbend(file); + for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) { + h_file = au_h_fptr(file, bindex); + if (!h_file || !h_file->f_op || !h_file->f_op->flush) + continue; + + err = h_file->f_op->flush(h_file, id); + if (!err) + vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); + /*ignore*/ + } + au_cpup_attr_timesizes(dentry->d_inode); + + di_read_unlock(dentry, AuLock_IW); + fi_read_unlock(file); + si_read_unlock(dentry->d_sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int do_open_nondir(struct file *file, int flags) +{ + int err; + aufs_bindex_t bindex; + struct file *h_file; + struct dentry *dentry; + struct au_finfo *finfo; + + FiMustWriteLock(file); + + err = 0; + dentry = file->f_dentry; + finfo = au_fi(file); + finfo->fi_h_vm_ops = NULL; + finfo->fi_vm_ops = NULL; + bindex = au_dbstart(dentry); + /* O_TRUNC is processed already */ + BUG_ON(au_test_ro(dentry->d_sb, bindex, dentry->d_inode) + && (flags & O_TRUNC)); + + h_file = au_h_open(dentry, bindex, flags, file); + if (IS_ERR(h_file)) + err = PTR_ERR(h_file); + else { + au_set_fbstart(file, bindex); + au_set_fbend(file, bindex); + au_set_h_fptr(file, bindex, h_file); + au_update_figen(file); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + } + return err; +} + +static int aufs_open_nondir(struct inode *inode __maybe_unused, + struct file *file) +{ + return au_do_open(file, do_open_nondir); +} + +static int aufs_release_nondir(struct inode *inode __maybe_unused, + struct file *file) +{ + struct super_block *sb = file->f_dentry->d_sb; + + si_noflush_read_lock(sb); + kfree(au_fi(file)->fi_vm_ops); + au_finfo_fin(file); + si_read_unlock(sb); + return 0; +} + +/* ---------------------------------------------------------------------- */ + +static ssize_t aufs_read(struct file *file, char __user *buf, size_t count, + loff_t *ppos) +{ + ssize_t err; + struct dentry *dentry; + struct file *h_file; + struct super_block *sb; + + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); + if (unlikely(err)) + goto out; + + h_file = au_h_fptr(file, au_fbstart(file)); + err = vfsub_read_u(h_file, buf, count, ppos); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode); + + di_read_unlock(dentry, AuLock_IR); + fi_read_unlock(file); + out: + si_read_unlock(sb); + return err; +} + +static ssize_t aufs_write(struct file *file, const char __user *ubuf, + size_t count, loff_t *ppos) +{ + ssize_t err; + aufs_bindex_t bstart; + struct au_pin pin; + struct dentry *dentry; + struct inode *inode; + struct super_block *sb; + struct file *h_file; + char __user *buf = (char __user *)ubuf; + + dentry = file->f_dentry; + sb = dentry->d_sb; + inode = dentry->d_inode; + mutex_lock(&inode->i_mutex); + si_read_lock(sb, AuLock_FLUSH); + + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + + bstart = au_fbstart(file); + h_file = au_h_fptr(file, bstart); + au_unpin(&pin); + err = vfsub_write_u(h_file, buf, count, ppos); + au_cpup_attr_timesizes(inode); + inode->i_mode = h_file->f_dentry->d_inode->i_mode; + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + mutex_unlock(&inode->i_mutex); + return err; +} + +static ssize_t aufs_aio_read(struct kiocb *kio, const struct iovec *iov, + unsigned long nv, loff_t pos) +{ + ssize_t err; + struct file *file, *h_file; + struct dentry *dentry; + struct super_block *sb; + + file = kio->ki_filp; + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); + if (unlikely(err)) + goto out; + + err = -ENOSYS; + h_file = au_h_fptr(file, au_fbstart(file)); + if (h_file->f_op && h_file->f_op->aio_read) { + err = security_file_permission(h_file, MAY_READ); + if (unlikely(err)) + goto out_unlock; + if (!is_sync_kiocb(kio)) { + get_file(h_file); + fput(file); + } + kio->ki_filp = h_file; + err = h_file->f_op->aio_read(kio, iov, nv, pos); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + fsstack_copy_attr_atime(dentry->d_inode, + h_file->f_dentry->d_inode); + } else + /* currently there is no such fs */ + WARN_ON_ONCE(h_file->f_op && h_file->f_op->read); + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_read_unlock(file); + out: + si_read_unlock(sb); + return err; +} + +static ssize_t aufs_aio_write(struct kiocb *kio, const struct iovec *iov, + unsigned long nv, loff_t pos) +{ + ssize_t err; + aufs_bindex_t bstart; + struct au_pin pin; + struct dentry *dentry; + struct inode *inode; + struct super_block *sb; + struct file *file, *h_file; + + file = kio->ki_filp; + dentry = file->f_dentry; + sb = dentry->d_sb; + inode = dentry->d_inode; + mutex_lock(&inode->i_mutex); + si_read_lock(sb, AuLock_FLUSH); + + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + + err = -ENOSYS; + bstart = au_fbstart(file); + h_file = au_h_fptr(file, bstart); + au_unpin(&pin); + if (h_file->f_op && h_file->f_op->aio_write) { + err = security_file_permission(h_file, MAY_WRITE); + if (unlikely(err)) + goto out_unlock; + if (!is_sync_kiocb(kio)) { + get_file(h_file); + fput(file); + } + kio->ki_filp = h_file; + err = h_file->f_op->aio_write(kio, iov, nv, pos); + au_cpup_attr_timesizes(inode); + inode->i_mode = h_file->f_dentry->d_inode->i_mode; + } else + /* currently there is no such fs */ + WARN_ON_ONCE(h_file->f_op && h_file->f_op->write); + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + mutex_unlock(&inode->i_mutex); + return err; +} + +static ssize_t aufs_splice_read(struct file *file, loff_t *ppos, + struct pipe_inode_info *pipe, size_t len, + unsigned int flags) +{ + ssize_t err; + struct file *h_file; + struct dentry *dentry; + struct super_block *sb; + + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); + if (unlikely(err)) + goto out; + + err = -EINVAL; + h_file = au_h_fptr(file, au_fbstart(file)); + if (au_test_loopback_kthread()) { + file->f_mapping = h_file->f_mapping; + smp_mb(); /* unnecessary? */ + } + err = vfsub_splice_to(h_file, ppos, pipe, len, flags); + /* todo: necessasry? */ + /* file->f_ra = h_file->f_ra; */ + fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode); + + di_read_unlock(dentry, AuLock_IR); + fi_read_unlock(file); + + out: + si_read_unlock(sb); + return err; +} + +static ssize_t +aufs_splice_write(struct pipe_inode_info *pipe, struct file *file, loff_t *ppos, + size_t len, unsigned int flags) +{ + ssize_t err; + struct au_pin pin; + struct dentry *dentry; + struct inode *inode; + struct super_block *sb; + struct file *h_file; + + dentry = file->f_dentry; + inode = dentry->d_inode; + mutex_lock(&inode->i_mutex); + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + + h_file = au_h_fptr(file, au_fbstart(file)); + au_unpin(&pin); + err = vfsub_splice_from(pipe, h_file, ppos, len, flags); + au_cpup_attr_timesizes(inode); + inode->i_mode = h_file->f_dentry->d_inode->i_mode; + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + mutex_unlock(&inode->i_mutex); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static struct file *au_safe_file(struct vm_area_struct *vma) +{ + struct file *file; + + file = vma->vm_file; + if (file->private_data && au_test_aufs(file->f_dentry->d_sb)) + return file; + return NULL; +} + +static void au_reset_file(struct vm_area_struct *vma, struct file *file) +{ + vma->vm_file = file; + /* smp_mb(); */ /* flush vm_file */ +} + +static int aufs_fault(struct vm_area_struct *vma, struct vm_fault *vmf) +{ + int err; + static DECLARE_WAIT_QUEUE_HEAD(wq); + struct file *file, *h_file; + struct au_finfo *finfo; + + /* todo: non-robr mode, user vm_file as it is? */ + wait_event(wq, (file = au_safe_file(vma))); + + /* do not revalidate, no si lock */ + finfo = au_fi(file); + h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file; + AuDebugOn(!h_file || !finfo->fi_h_vm_ops); + + fi_write_lock(file); + vma->vm_file = h_file; + err = finfo->fi_h_vm_ops->fault(vma, vmf); + /* todo: necessary? */ + /* file->f_ra = h_file->f_ra; */ + au_reset_file(vma, file); + fi_write_unlock(file); +#if 0 /* def CONFIG_SMP */ + /* wake_up_nr(&wq, online_cpu - 1); */ + wake_up_all(&wq); +#else + wake_up(&wq); +#endif + + return err; +} + +static int aufs_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf) +{ + int err; + static DECLARE_WAIT_QUEUE_HEAD(wq); + struct file *file, *h_file; + struct au_finfo *finfo; + + wait_event(wq, (file = au_safe_file(vma))); + + finfo = au_fi(file); + h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file; + AuDebugOn(!h_file || !finfo->fi_h_vm_ops); + + fi_write_lock(file); + vma->vm_file = h_file; + err = finfo->fi_h_vm_ops->page_mkwrite(vma, vmf); + au_reset_file(vma, file); + fi_write_unlock(file); + wake_up(&wq); + + return err; +} + +static void aufs_vm_close(struct vm_area_struct *vma) +{ + static DECLARE_WAIT_QUEUE_HEAD(wq); + struct file *file, *h_file; + struct au_finfo *finfo; + + wait_event(wq, (file = au_safe_file(vma))); + + finfo = au_fi(file); + h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file; + AuDebugOn(!h_file || !finfo->fi_h_vm_ops); + + fi_write_lock(file); + vma->vm_file = h_file; + finfo->fi_h_vm_ops->close(vma); + au_reset_file(vma, file); + fi_write_unlock(file); + wake_up(&wq); +} + +static struct vm_operations_struct aufs_vm_ops = { + /* .close and .page_mkwrite are not set by default */ + .fault = aufs_fault, +}; + +/* ---------------------------------------------------------------------- */ + +static struct vm_operations_struct *au_vm_ops(struct file *h_file, + struct vm_area_struct *vma) +{ + struct vm_operations_struct *vm_ops; + int err; + + vm_ops = ERR_PTR(-ENODEV); + if (!h_file->f_op || !h_file->f_op->mmap) + goto out; + + err = h_file->f_op->mmap(h_file, vma); + vm_ops = ERR_PTR(err); + if (unlikely(err)) + goto out; + + vm_ops = vma->vm_ops; + err = do_munmap(current->mm, vma->vm_start, + vma->vm_end - vma->vm_start); + if (unlikely(err)) { + AuIOErr("failed internal unmapping %.*s, %d\n", + AuDLNPair(h_file->f_dentry), err); + vm_ops = ERR_PTR(-EIO); + } + + out: + return vm_ops; +} + +static int au_custom_vm_ops(struct au_finfo *finfo, struct vm_area_struct *vma) +{ + int err; + struct vm_operations_struct *h_ops; + + AuRwMustAnyLock(&finfo->fi_rwsem); + + err = 0; + h_ops = finfo->fi_h_vm_ops; + AuDebugOn(!h_ops); + if ((!h_ops->page_mkwrite && !h_ops->close) + || finfo->fi_vm_ops) + goto out; + + err = -ENOMEM; + finfo->fi_vm_ops = kmemdup(&aufs_vm_ops, sizeof(aufs_vm_ops), GFP_NOFS); + if (unlikely(!finfo->fi_vm_ops)) + goto out; + + err = 0; + if (h_ops->page_mkwrite) + finfo->fi_vm_ops->page_mkwrite = aufs_page_mkwrite; + if (h_ops->close) + finfo->fi_vm_ops->close = aufs_vm_close; + + vma->vm_ops = finfo->fi_vm_ops; + + out: + return err; +} + +static int aufs_mmap(struct file *file, struct vm_area_struct *vma) +{ + int err; + unsigned char wlock, mmapped; + struct dentry *dentry; + struct super_block *sb; + struct file *h_file; + struct vm_operations_struct *vm_ops; + + dentry = file->f_dentry; + wlock = !!(file->f_mode & FMODE_WRITE) && (vma->vm_flags & VM_SHARED); + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + mmapped = !!au_test_mmapped(file); + if (wlock) { + struct au_pin pin; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + au_unpin(&pin); + } else + di_downgrade_lock(dentry, AuLock_IR); + + h_file = au_h_fptr(file, au_fbstart(file)); + if (!mmapped && au_test_fs_bad_mapping(h_file->f_dentry->d_sb)) { + /* + * by this assignment, f_mapping will differs from aufs inode + * i_mapping. + * if someone else mixes the use of f_dentry->d_inode and + * f_mapping->host, then a problem may arise. + */ + file->f_mapping = h_file->f_mapping; + } + + vm_ops = NULL; + if (!mmapped) { + vm_ops = au_vm_ops(h_file, vma); + err = PTR_ERR(vm_ops); + if (IS_ERR(vm_ops)) + goto out_unlock; + } + + /* + * unnecessary to handle MAP_DENYWRITE and deny_write_access()? + * currently MAP_DENYWRITE from userspace is ignored, but elf loader + * sets it. when FMODE_EXEC is set (by open_exec() or sys_uselib()), + * both of the aufs file and the lower file is deny_write_access()-ed. + * finally I hope we can skip handlling MAP_DENYWRITE here. + */ + err = generic_file_mmap(file, vma); + if (unlikely(err)) + goto out_unlock; + + vma->vm_ops = &aufs_vm_ops; + /* test again */ + if (!au_test_mmapped(file)) + au_fi(file)->fi_h_vm_ops = vm_ops; + + err = au_custom_vm_ops(au_fi(file), vma); + if (unlikely(err)) + goto out_unlock; + + vfsub_file_accessed(h_file); + fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode); + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int aufs_fsync_nondir(struct file *file, struct dentry *dentry, + int datasync) +{ + int err; + struct au_pin pin; + struct inode *inode; + struct file *h_file; + struct super_block *sb; + + inode = dentry->d_inode; + IMustLock(file->f_mapping->host); + if (inode != file->f_mapping->host) { + mutex_unlock(&file->f_mapping->host->i_mutex); + mutex_lock(&inode->i_mutex); + } + IMustLock(inode); + + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + + err = 0; /* -EBADF; */ /* posix? */ + if (unlikely(!(file->f_mode & FMODE_WRITE))) + goto out; + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + au_unpin(&pin); + + err = -EINVAL; + h_file = au_h_fptr(file, au_fbstart(file)); + if (h_file->f_op && h_file->f_op->fsync) { + struct dentry *h_d; + struct mutex *h_mtx; + + /* + * no filemap_fdatawrite() since aufs file has no its own + * mapping, but dir. + */ + h_d = h_file->f_dentry; + h_mtx = &h_d->d_inode->i_mutex; + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + err = h_file->f_op->fsync(h_file, h_d, datasync); + if (!err) + vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); + /*ignore*/ + au_cpup_attr_timesizes(inode); + mutex_unlock(h_mtx); + } + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + if (inode != file->f_mapping->host) { + mutex_unlock(&inode->i_mutex); + mutex_lock(&file->f_mapping->host->i_mutex); + } + return err; +} + +/* no one supports this operation, currently */ +#if 0 +static int aufs_aio_fsync_nondir(struct kiocb *kio, int datasync) +{ + int err; + struct au_pin pin; + struct dentry *dentry; + struct inode *inode; + struct file *file, *h_file; + struct super_block *sb; + + file = kio->ki_filp; + dentry = file->f_dentry; + inode = dentry->d_inode; + mutex_lock(&inode->i_mutex); + + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + + err = 0; /* -EBADF; */ /* posix? */ + if (unlikely(!(file->f_mode & FMODE_WRITE))) + goto out; + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); + if (unlikely(err)) + goto out; + + err = au_ready_to_write(file, -1, &pin); + di_downgrade_lock(dentry, AuLock_IR); + if (unlikely(err)) + goto out_unlock; + au_unpin(&pin); + + err = -ENOSYS; + h_file = au_h_fptr(file, au_fbstart(file)); + if (h_file->f_op && h_file->f_op->aio_fsync) { + struct dentry *h_d; + struct mutex *h_mtx; + + h_d = h_file->f_dentry; + h_mtx = &h_d->d_inode->i_mutex; + if (!is_sync_kiocb(kio)) { + get_file(h_file); + fput(file); + } + kio->ki_filp = h_file; + err = h_file->f_op->aio_fsync(kio, datasync); + mutex_lock_nested(h_mtx, AuLsc_I_CHILD); + if (!err) + vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); + /*ignore*/ + au_cpup_attr_timesizes(inode); + mutex_unlock(h_mtx); + } + + out_unlock: + di_read_unlock(dentry, AuLock_IR); + fi_write_unlock(file); + out: + si_read_unlock(sb); + mutex_unlock(&inode->i_mutex); + return err; +} +#endif + +static int aufs_fasync(int fd, struct file *file, int flag) +{ + int err; + struct file *h_file; + struct dentry *dentry; + struct super_block *sb; + + dentry = file->f_dentry; + sb = dentry->d_sb; + si_read_lock(sb, AuLock_FLUSH); + err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); + if (unlikely(err)) + goto out; + + h_file = au_h_fptr(file, au_fbstart(file)); + if (h_file->f_op && h_file->f_op->fasync) + err = h_file->f_op->fasync(fd, h_file, flag); + + di_read_unlock(dentry, AuLock_IR); + fi_read_unlock(file); + + out: + si_read_unlock(sb); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* no one supports this operation, currently */ +#if 0 +static ssize_t aufs_sendpage(struct file *file, struct page *page, int offset, + size_t len, loff_t *pos , int more) +{ +} +#endif + +/* ---------------------------------------------------------------------- */ + +const struct file_operations aufs_file_fop = { + /* + * while generic_file_llseek/_unlocked() don't use BKL, + * don't use it since it operates file->f_mapping->host. + * in aufs, it may be a real file and may confuse users by UDBA. + */ + /* .llseek = generic_file_llseek, */ + + .read = aufs_read, + .write = aufs_write, + .aio_read = aufs_aio_read, + .aio_write = aufs_aio_write, +#ifdef CONFIG_AUFS_POLL + .poll = aufs_poll, +#endif + .mmap = aufs_mmap, + .open = aufs_open_nondir, + .flush = aufs_flush, + .release = aufs_release_nondir, + .fsync = aufs_fsync_nondir, + /* .aio_fsync = aufs_aio_fsync_nondir, */ + .fasync = aufs_fasync, + /* .sendpage = aufs_sendpage, */ + .splice_write = aufs_splice_write, + .splice_read = aufs_splice_read, +#if 0 + .aio_splice_write = aufs_aio_splice_write, + .aio_splice_read = aufs_aio_splice_read +#endif +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dcsub.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dcsub.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * sub-routines for dentry cache + */ + +#ifndef __AUFS_DCSUB_H__ +#define __AUFS_DCSUB_H__ + +#ifdef __KERNEL__ + +#include + +struct dentry; + +struct au_dpage { + int ndentry; + struct dentry **dentries; +}; + +struct au_dcsub_pages { + int ndpage; + struct au_dpage *dpages; +}; + +/* ---------------------------------------------------------------------- */ + +int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp); +void au_dpages_free(struct au_dcsub_pages *dpages); +typedef int (*au_dpages_test)(struct dentry *dentry, void *arg); +int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, + au_dpages_test test, void *arg); +int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, + int do_include, au_dpages_test test, void *arg); +struct dentry *au_test_subdir(struct dentry *d1, struct dentry *d2); + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DCSUB_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/loop.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/loop.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * support for loopback block device as a branch + */ + +#include +#include "aufs.h" + +/* + * test if two lower dentries have overlapping branches. + */ +int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1, + struct dentry *h_d2) +{ + struct inode *h_inode; + struct loop_device *l; + + h_inode = h_d1->d_inode; + if (MAJOR(h_inode->i_sb->s_dev) != LOOP_MAJOR) + return 0; + + l = h_inode->i_sb->s_bdev->bd_disk->private_data; + h_d1 = l->lo_backing_file->f_dentry; + /* h_d1 can be local NFS. in this case aufs cannot detect the loop */ + if (unlikely(h_d1->d_sb == sb)) + return 1; + return !!au_test_subdir(h_d1, h_d2); +} + +/* true if a kernel thread named 'loop[0-9].*' accesses a file */ +int au_test_loopback_kthread(void) +{ + const char c = current->comm[4]; + + return current->mm == NULL + && '0' <= c && c <= '9' + && strncmp(current->comm, "loop", 4) == 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/whout.h +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/whout.h @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * whiteout for logical deletion and opaque directory + */ + +#ifndef __AUFS_WHOUT_H__ +#define __AUFS_WHOUT_H__ + +#ifdef __KERNEL__ + +#include +#include "dir.h" + +/* whout.c */ +int au_wh_name_alloc(struct qstr *wh, const struct qstr *name); +struct au_branch; +int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, + struct au_branch *br, int try_sio); +int au_diropq_test(struct dentry *h_dentry, struct au_branch *br); +struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, + struct qstr *prefix); +int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br); +int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, + struct dentry *dentry); +int au_wh_init(struct dentry *h_parent, struct au_branch *br, + struct super_block *sb); + +/* diropq flags */ +#define AuDiropq_CREATE 1 +#define au_ftest_diropq(flags, name) ((flags) & AuDiropq_##name) +#define au_fset_diropq(flags, name) { (flags) |= AuDiropq_##name; } +#define au_fclr_diropq(flags, name) { (flags) &= ~AuDiropq_##name; } + +struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, + unsigned int flags); +struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, + struct au_branch *br); +struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, + struct dentry *h_parent); + +/* real rmdir for the whiteout-ed dir */ +struct au_whtmp_rmdir { + struct inode *dir; + aufs_bindex_t bindex; + struct dentry *wh_dentry; + struct au_nhash whlist; +}; + +struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp); +void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp); +int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, + struct dentry *wh_dentry, struct au_nhash *whlist); +void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, + struct dentry *wh_dentry, struct au_whtmp_rmdir *args); + +/* ---------------------------------------------------------------------- */ + +static inline struct dentry *au_diropq_create(struct dentry *dentry, + aufs_bindex_t bindex) +{ + return au_diropq_sio(dentry, bindex, AuDiropq_CREATE); +} + +static inline int au_diropq_remove(struct dentry *dentry, aufs_bindex_t bindex) +{ + return PTR_ERR(au_diropq_sio(dentry, bindex, !AuDiropq_CREATE)); +} + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WHOUT_H__ */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/sbinfo.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/sbinfo.c @@ -0,0 +1,208 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * superblock private data + */ + +#include "aufs.h" + +/* + * they are necessary regardless sysfs is disabled. + */ +void au_si_free(struct kobject *kobj) +{ + struct au_sbinfo *sbinfo; + struct super_block *sb; + + sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); + AuDebugOn(!list_empty(&sbinfo->si_plink.head)); + + sb = sbinfo->si_sb; + si_write_lock(sb); + au_xino_clr(sb); + au_br_free(sbinfo); + kfree(sbinfo->si_branch); + mutex_destroy(&sbinfo->si_xib_mtx); + si_write_unlock(sb); + AuRwDestroy(&sbinfo->si_rwsem); + + kfree(sbinfo); +} + +int au_si_alloc(struct super_block *sb) +{ + int err; + struct au_sbinfo *sbinfo; + + err = -ENOMEM; + sbinfo = kmalloc(sizeof(*sbinfo), GFP_NOFS); + if (unlikely(!sbinfo)) + goto out; + + /* will be reallocated separately */ + sbinfo->si_branch = kzalloc(sizeof(*sbinfo->si_branch), GFP_NOFS); + if (unlikely(!sbinfo->si_branch)) + goto out_sbinfo; + + memset(&sbinfo->si_kobj, 0, sizeof(sbinfo->si_kobj)); + err = sysaufs_si_init(sbinfo); + if (unlikely(err)) + goto out_br; + + au_nwt_init(&sbinfo->si_nowait); + au_rw_init_wlock(&sbinfo->si_rwsem); + sbinfo->si_generation = 0; + sbinfo->au_si_status = 0; + sbinfo->si_bend = -1; + sbinfo->si_last_br_id = 0; + + sbinfo->si_wbr_copyup = AuWbrCopyup_Def; + sbinfo->si_wbr_create = AuWbrCreate_Def; + sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + AuWbrCopyup_Def; + sbinfo->si_wbr_create_ops = au_wbr_create_ops + AuWbrCreate_Def; + + sbinfo->si_mntflags = AuOpt_Def; + + sbinfo->si_xread = NULL; + sbinfo->si_xwrite = NULL; + sbinfo->si_xib = NULL; + mutex_init(&sbinfo->si_xib_mtx); + sbinfo->si_xib_buf = NULL; + sbinfo->si_xino_brid = -1; + /* leave si_xib_last_pindex and si_xib_next_bit */ + + sbinfo->si_rdcache = AUFS_RDCACHE_DEF * HZ; + sbinfo->si_rdblk = AUFS_RDBLK_DEF; + sbinfo->si_rdhash = AUFS_RDHASH_DEF; + sbinfo->si_dirwh = AUFS_DIRWH_DEF; + + au_spl_init(&sbinfo->si_plink); + init_waitqueue_head(&sbinfo->si_plink_wq); + + /* leave other members for sysaufs and si_mnt. */ + sbinfo->si_sb = sb; + sb->s_fs_info = sbinfo; + au_debug_sbinfo_init(sbinfo); + return 0; /* success */ + + out_br: + kfree(sbinfo->si_branch); + out_sbinfo: + kfree(sbinfo); + out: + return err; +} + +int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr) +{ + int err, sz; + struct au_branch **brp; + + AuRwMustWriteLock(&sbinfo->si_rwsem); + + err = -ENOMEM; + sz = sizeof(*brp) * (sbinfo->si_bend + 1); + if (unlikely(!sz)) + sz = sizeof(*brp); + brp = au_kzrealloc(sbinfo->si_branch, sz, sizeof(*brp) * nbr, GFP_NOFS); + if (brp) { + sbinfo->si_branch = brp; + err = 0; + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +unsigned int au_sigen_inc(struct super_block *sb) +{ + unsigned int gen; + + SiMustWriteLock(sb); + + gen = ++au_sbi(sb)->si_generation; + au_update_digen(sb->s_root); + au_update_iigen(sb->s_root->d_inode); + sb->s_root->d_inode->i_version++; + return gen; +} + +aufs_bindex_t au_new_br_id(struct super_block *sb) +{ + aufs_bindex_t br_id; + int i; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + sbinfo = au_sbi(sb); + for (i = 0; i <= AUFS_BRANCH_MAX; i++) { + br_id = ++sbinfo->si_last_br_id; + if (br_id && au_br_index(sb, br_id) < 0) + return br_id; + } + + return -1; +} + +/* ---------------------------------------------------------------------- */ + +/* dentry and super_block lock. call at entry point */ +void aufs_read_lock(struct dentry *dentry, int flags) +{ + si_read_lock(dentry->d_sb, flags); + if (au_ftest_lock(flags, DW)) + di_write_lock_child(dentry); + else + di_read_lock_child(dentry, flags); +} + +void aufs_read_unlock(struct dentry *dentry, int flags) +{ + if (au_ftest_lock(flags, DW)) + di_write_unlock(dentry); + else + di_read_unlock(dentry, flags); + si_read_unlock(dentry->d_sb); +} + +void aufs_write_lock(struct dentry *dentry) +{ + si_write_lock(dentry->d_sb); + di_write_lock_child(dentry); +} + +void aufs_write_unlock(struct dentry *dentry) +{ + di_write_unlock(dentry); + si_write_unlock(dentry->d_sb); +} + +void aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags) +{ + si_read_lock(d1->d_sb, flags); + di_write_lock2_child(d1, d2, au_ftest_lock(flags, DIR)); +} + +void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2) +{ + di_write_unlock2(d1, d2); + si_read_unlock(d1->d_sb); +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/cpup.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/cpup.c @@ -0,0 +1,1043 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * copy-up functions, see wbr_policy.c for copy-down + */ + +#include +#include +#include +#include +#include "aufs.h" + +void au_cpup_attr_flags(struct inode *dst, struct inode *src) +{ + const unsigned int mask = S_DEAD | S_SWAPFILE | S_PRIVATE + | S_NOATIME | S_NOCMTIME; + + dst->i_flags |= src->i_flags & ~mask; + if (au_test_fs_notime(dst->i_sb)) + dst->i_flags |= S_NOATIME | S_NOCMTIME; +} + +void au_cpup_attr_timesizes(struct inode *inode) +{ + struct inode *h_inode; + + h_inode = au_h_iptr(inode, au_ibstart(inode)); + fsstack_copy_attr_times(inode, h_inode); + vfsub_copy_inode_size(inode, h_inode); +} + +void au_cpup_attr_nlink(struct inode *inode, int force) +{ + struct inode *h_inode; + struct super_block *sb; + aufs_bindex_t bindex, bend; + + sb = inode->i_sb; + bindex = au_ibstart(inode); + h_inode = au_h_iptr(inode, bindex); + if (!force + && !S_ISDIR(h_inode->i_mode) + && au_opt_test(au_mntflags(sb), PLINK) + && au_plink_test(inode)) + return; + + inode->i_nlink = h_inode->i_nlink; + + /* + * fewer nlink makes find(1) noisy, but larger nlink doesn't. + * it may includes whplink directory. + */ + if (S_ISDIR(h_inode->i_mode)) { + bend = au_ibend(inode); + for (bindex++; bindex <= bend; bindex++) { + h_inode = au_h_iptr(inode, bindex); + if (h_inode) + au_add_nlink(inode, h_inode); + } + } +} + +void au_cpup_attr_changeable(struct inode *inode) +{ + struct inode *h_inode; + + h_inode = au_h_iptr(inode, au_ibstart(inode)); + inode->i_mode = h_inode->i_mode; + inode->i_uid = h_inode->i_uid; + inode->i_gid = h_inode->i_gid; + au_cpup_attr_timesizes(inode); + au_cpup_attr_flags(inode, h_inode); +} + +void au_cpup_igen(struct inode *inode, struct inode *h_inode) +{ + struct au_iinfo *iinfo = au_ii(inode); + + IiMustWriteLock(inode); + + iinfo->ii_higen = h_inode->i_generation; + iinfo->ii_hsb1 = h_inode->i_sb; +} + +void au_cpup_attr_all(struct inode *inode, int force) +{ + struct inode *h_inode; + + h_inode = au_h_iptr(inode, au_ibstart(inode)); + au_cpup_attr_changeable(inode); + if (inode->i_nlink > 0) + au_cpup_attr_nlink(inode, force); + inode->i_rdev = h_inode->i_rdev; + inode->i_blkbits = h_inode->i_blkbits; + au_cpup_igen(inode, h_inode); +} + +/* ---------------------------------------------------------------------- */ + +/* Note: dt_dentry and dt_h_dentry are not dget/dput-ed */ + +/* keep the timestamps of the parent dir when cpup */ +void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, + struct path *h_path) +{ + struct inode *h_inode; + + dt->dt_dentry = dentry; + dt->dt_h_path = *h_path; + h_inode = h_path->dentry->d_inode; + dt->dt_atime = h_inode->i_atime; + dt->dt_mtime = h_inode->i_mtime; + /* smp_mb(); */ +} + +void au_dtime_revert(struct au_dtime *dt) +{ + struct iattr attr; + int err; + + attr.ia_atime = dt->dt_atime; + attr.ia_mtime = dt->dt_mtime; + attr.ia_valid = ATTR_FORCE | ATTR_MTIME | ATTR_MTIME_SET + | ATTR_ATIME | ATTR_ATIME_SET; + + err = vfsub_notify_change(&dt->dt_h_path, &attr); + if (unlikely(err)) + AuWarn("restoring timestamps failed(%d). ignored\n", err); +} + +/* ---------------------------------------------------------------------- */ + +static noinline_for_stack +int cpup_iattr(struct dentry *dst, aufs_bindex_t bindex, struct dentry *h_src) +{ + int err, sbits; + struct iattr ia; + struct path h_path; + struct inode *h_isrc; + + h_path.dentry = au_h_dptr(dst, bindex); + h_path.mnt = au_sbr_mnt(dst->d_sb, bindex); + h_isrc = h_src->d_inode; + ia.ia_valid = ATTR_FORCE | ATTR_MODE | ATTR_UID | ATTR_GID + | ATTR_ATIME | ATTR_MTIME + | ATTR_ATIME_SET | ATTR_MTIME_SET; + ia.ia_mode = h_isrc->i_mode; + ia.ia_uid = h_isrc->i_uid; + ia.ia_gid = h_isrc->i_gid; + ia.ia_atime = h_isrc->i_atime; + ia.ia_mtime = h_isrc->i_mtime; + sbits = !!(ia.ia_mode & (S_ISUID | S_ISGID)); + au_cpup_attr_flags(h_path.dentry->d_inode, h_isrc); + err = vfsub_notify_change(&h_path, &ia); + + /* is this nfs only? */ + if (!err && sbits && au_test_nfs(h_path.dentry->d_sb)) { + ia.ia_valid = ATTR_FORCE | ATTR_MODE; + ia.ia_mode = h_isrc->i_mode; + err = vfsub_notify_change(&h_path, &ia); + } + + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int au_do_copy_file(struct file *dst, struct file *src, loff_t len, + char *buf, unsigned long blksize) +{ + int err; + size_t sz, rbytes, wbytes; + unsigned char all_zero; + char *p, *zp; + struct mutex *h_mtx; + /* reduce stack usage */ + struct iattr *ia; + + zp = page_address(ZERO_PAGE(0)); + if (unlikely(!zp)) + return -ENOMEM; /* possible? */ + + err = 0; + all_zero = 0; + while (len) { + AuDbg("len %lld\n", len); + sz = blksize; + if (len < blksize) + sz = len; + + rbytes = 0; + /* todo: signal_pending? */ + while (!rbytes || err == -EAGAIN || err == -EINTR) { + rbytes = vfsub_read_k(src, buf, sz, &src->f_pos); + err = rbytes; + } + if (unlikely(err < 0)) + break; + + all_zero = 0; + if (len >= rbytes && rbytes == blksize) + all_zero = !memcmp(buf, zp, rbytes); + if (!all_zero) { + wbytes = rbytes; + p = buf; + while (wbytes) { + size_t b; + + b = vfsub_write_k(dst, p, wbytes, &dst->f_pos); + err = b; + /* todo: signal_pending? */ + if (unlikely(err == -EAGAIN || err == -EINTR)) + continue; + if (unlikely(err < 0)) + break; + wbytes -= b; + p += b; + } + } else { + loff_t res; + + AuLabel(hole); + res = vfsub_llseek(dst, rbytes, SEEK_CUR); + err = res; + if (unlikely(res < 0)) + break; + } + len -= rbytes; + err = 0; + } + + /* the last block may be a hole */ + if (!err && all_zero) { + AuLabel(last hole); + + err = 1; + if (au_test_nfs(dst->f_dentry->d_sb)) { + /* nfs requires this step to make last hole */ + /* is this only nfs? */ + do { + /* todo: signal_pending? */ + err = vfsub_write_k(dst, "\0", 1, &dst->f_pos); + } while (err == -EAGAIN || err == -EINTR); + if (err == 1) + dst->f_pos--; + } + + if (err == 1) { + ia = (void *)buf; + ia->ia_size = dst->f_pos; + ia->ia_valid = ATTR_SIZE | ATTR_FILE; + ia->ia_file = dst; + h_mtx = &dst->f_dentry->d_inode->i_mutex; + mutex_lock_nested(h_mtx, AuLsc_I_CHILD2); + err = vfsub_notify_change(&dst->f_path, ia); + mutex_unlock(h_mtx); + } + } + + return err; +} + +int au_copy_file(struct file *dst, struct file *src, loff_t len) +{ + int err; + unsigned long blksize; + unsigned char do_kfree; + char *buf; + + err = -ENOMEM; + blksize = dst->f_dentry->d_sb->s_blocksize; + if (!blksize || PAGE_SIZE < blksize) + blksize = PAGE_SIZE; + AuDbg("blksize %lu\n", blksize); + do_kfree = (blksize != PAGE_SIZE && blksize >= sizeof(struct iattr *)); + if (do_kfree) + buf = kmalloc(blksize, GFP_NOFS); + else + buf = (void *)__get_free_page(GFP_NOFS); + if (unlikely(!buf)) + goto out; + + if (len > (1 << 22)) + AuDbg("copying a large file %lld\n", (long long)len); + + src->f_pos = 0; + dst->f_pos = 0; + err = au_do_copy_file(dst, src, len, buf, blksize); + if (do_kfree) + kfree(buf); + else + free_page((unsigned long)buf); + + out: + return err; +} + +/* + * to support a sparse file which is opened with O_APPEND, + * we need to close the file. + */ +static int au_cp_regular(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len) +{ + int err, i; + enum { SRC, DST }; + struct { + aufs_bindex_t bindex; + unsigned int flags; + struct dentry *dentry; + struct file *file; + void *label, *label_file; + } *f, file[] = { + { + .bindex = bsrc, + .flags = O_RDONLY | O_NOATIME | O_LARGEFILE, + .file = NULL, + .label = &&out, + .label_file = &&out_src + }, + { + .bindex = bdst, + .flags = O_WRONLY | O_NOATIME | O_LARGEFILE, + .file = NULL, + .label = &&out_src, + .label_file = &&out_dst + } + }; + struct super_block *sb; + + /* bsrc branch can be ro/rw. */ + sb = dentry->d_sb; + f = file; + for (i = 0; i < 2; i++, f++) { + f->dentry = au_h_dptr(dentry, f->bindex); + f->file = au_h_open(dentry, f->bindex, f->flags, /*file*/NULL); + err = PTR_ERR(f->file); + if (IS_ERR(f->file)) + goto *f->label; + err = -EINVAL; + if (unlikely(!f->file->f_op)) + goto *f->label_file; + } + + /* try stopping to update while we copyup */ + IMustLock(file[SRC].dentry->d_inode); + err = au_copy_file(file[DST].file, file[SRC].file, len); + + out_dst: + fput(file[DST].file); + au_sbr_put(sb, file[DST].bindex); + out_src: + fput(file[SRC].file); + au_sbr_put(sb, file[SRC].bindex); + out: + return err; +} + +static int au_do_cpup_regular(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len, + struct inode *h_dir, struct path *h_path) +{ + int err, rerr; + loff_t l; + + err = 0; + l = i_size_read(au_h_iptr(dentry->d_inode, bsrc)); + if (len == -1 || l < len) + len = l; + if (len) + err = au_cp_regular(dentry, bdst, bsrc, len); + if (!err) + goto out; /* success */ + + rerr = vfsub_unlink(h_dir, h_path, /*force*/0); + if (rerr) { + AuIOErr("failed unlinking cpup-ed %.*s(%d, %d)\n", + AuDLNPair(h_path->dentry), err, rerr); + err = -EIO; + } + + out: + return err; +} + +static int au_do_cpup_symlink(struct path *h_path, struct dentry *h_src, + struct inode *h_dir) +{ + int err, symlen; + mm_segment_t old_fs; + char *sym; + + err = -ENOSYS; + if (unlikely(!h_src->d_inode->i_op->readlink)) + goto out; + + err = -ENOMEM; + sym = __getname(); + if (unlikely(!sym)) + goto out; + + old_fs = get_fs(); + set_fs(KERNEL_DS); + symlen = h_src->d_inode->i_op->readlink(h_src, (char __user *)sym, + PATH_MAX); + err = symlen; + set_fs(old_fs); + + if (symlen > 0) { + sym[symlen] = 0; + err = vfsub_symlink(h_dir, h_path, sym); + } + __putname(sym); + + out: + return err; +} + +/* return with the lower dst inode is locked */ +static noinline_for_stack +int cpup_entry(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len, unsigned int flags, + struct dentry *dst_parent) +{ + int err; + umode_t mode; + unsigned int mnt_flags; + unsigned char isdir; + const unsigned char do_dt = !!au_ftest_cpup(flags, DTIME); + struct au_dtime dt; + struct path h_path; + struct dentry *h_src, *h_dst, *h_parent; + struct inode *h_inode, *h_dir; + struct super_block *sb; + + /* bsrc branch can be ro/rw. */ + h_src = au_h_dptr(dentry, bsrc); + h_inode = h_src->d_inode; + AuDebugOn(h_inode != au_h_iptr(dentry->d_inode, bsrc)); + + /* try stopping to be referenced while we are creating */ + h_dst = au_h_dptr(dentry, bdst); + h_parent = h_dst->d_parent; /* dir inode is locked */ + h_dir = h_parent->d_inode; + IMustLock(h_dir); + AuDebugOn(h_parent != h_dst->d_parent); + + sb = dentry->d_sb; + h_path.mnt = au_sbr_mnt(sb, bdst); + if (do_dt) { + h_path.dentry = h_parent; + au_dtime_store(&dt, dst_parent, &h_path); + } + h_path.dentry = h_dst; + + isdir = 0; + mode = h_inode->i_mode; + switch (mode & S_IFMT) { + case S_IFREG: + /* try stopping to update while we are referencing */ + IMustLock(h_inode); + err = vfsub_create(h_dir, &h_path, mode | S_IWUSR); + if (!err) + err = au_do_cpup_regular + (dentry, bdst, bsrc, len, + au_h_iptr(dst_parent->d_inode, bdst), &h_path); + break; + case S_IFDIR: + isdir = 1; + err = vfsub_mkdir(h_dir, &h_path, mode); + if (!err) { + /* + * strange behaviour from the users view, + * particularry setattr case + */ + if (au_ibstart(dst_parent->d_inode) == bdst) + au_cpup_attr_nlink(dst_parent->d_inode, + /*force*/1); + au_cpup_attr_nlink(dentry->d_inode, /*force*/1); + } + break; + case S_IFLNK: + err = au_do_cpup_symlink(&h_path, h_src, h_dir); + break; + case S_IFCHR: + case S_IFBLK: + AuDebugOn(!capable(CAP_MKNOD)); + /*FALLTHROUGH*/ + case S_IFIFO: + case S_IFSOCK: + err = vfsub_mknod(h_dir, &h_path, mode, h_inode->i_rdev); + break; + default: + AuIOErr("Unknown inode type 0%o\n", mode); + err = -EIO; + } + + mnt_flags = au_mntflags(sb); + if (!au_opt_test(mnt_flags, UDBA_NONE) + && !isdir + && au_opt_test(mnt_flags, XINO) + && h_inode->i_nlink == 1 + /* todo: unnecessary? */ + /* && dentry->d_inode->i_nlink == 1 */ + && bdst < bsrc + && !au_ftest_cpup(flags, KEEPLINO)) + au_xino_write(sb, bsrc, h_inode->i_ino, /*ino*/0); + /* ignore this error */ + + if (do_dt) + au_dtime_revert(&dt); + return err; +} + +/* + * copyup the @dentry from @bsrc to @bdst. + * the caller must set the both of lower dentries. + * @len is for truncating when it is -1 copyup the entire file. + * in link/rename cases, @dst_parent may be different from the real one. + */ +static int au_cpup_single(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len, unsigned int flags, + struct dentry *dst_parent) +{ + int err, rerr; + aufs_bindex_t old_ibstart; + unsigned char isdir, plink; + struct au_dtime dt; + struct path h_path; + struct dentry *h_src, *h_dst, *h_parent; + struct inode *dst_inode, *h_dir, *inode; + struct super_block *sb; + + AuDebugOn(bsrc <= bdst); + + sb = dentry->d_sb; + h_path.mnt = au_sbr_mnt(sb, bdst); + h_dst = au_h_dptr(dentry, bdst); + h_parent = h_dst->d_parent; /* dir inode is locked */ + h_dir = h_parent->d_inode; + IMustLock(h_dir); + + h_src = au_h_dptr(dentry, bsrc); + inode = dentry->d_inode; + + if (!dst_parent) + dst_parent = dget_parent(dentry); + else + dget(dst_parent); + + plink = !!au_opt_test(au_mntflags(sb), PLINK); + dst_inode = au_h_iptr(inode, bdst); + if (dst_inode) { + if (unlikely(!plink)) { + err = -EIO; + AuIOErr("i%lu exists on a upper branch " + "but plink is disabled\n", inode->i_ino); + goto out; + } + + if (dst_inode->i_nlink) { + const int do_dt = au_ftest_cpup(flags, DTIME); + + h_src = au_plink_lkup(inode, bdst); + err = PTR_ERR(h_src); + if (IS_ERR(h_src)) + goto out; + if (unlikely(!h_src->d_inode)) { + err = -EIO; + AuIOErr("i%lu exists on a upper branch " + "but plink is broken\n", inode->i_ino); + dput(h_src); + goto out; + } + + if (do_dt) { + h_path.dentry = h_parent; + au_dtime_store(&dt, dst_parent, &h_path); + } + h_path.dentry = h_dst; + err = vfsub_link(h_src, h_dir, &h_path); + if (do_dt) + au_dtime_revert(&dt); + dput(h_src); + goto out; + } else + /* todo: cpup_wh_file? */ + /* udba work */ + au_update_brange(inode, 1); + } + + old_ibstart = au_ibstart(inode); + err = cpup_entry(dentry, bdst, bsrc, len, flags, dst_parent); + if (unlikely(err)) + goto out; + dst_inode = h_dst->d_inode; + mutex_lock_nested(&dst_inode->i_mutex, AuLsc_I_CHILD2); + + err = cpup_iattr(dentry, bdst, h_src); + isdir = S_ISDIR(dst_inode->i_mode); + if (!err) { + if (bdst < old_ibstart) + au_set_ibstart(inode, bdst); + au_set_h_iptr(inode, bdst, au_igrab(dst_inode), + au_hi_flags(inode, isdir)); + mutex_unlock(&dst_inode->i_mutex); + if (!isdir + && h_src->d_inode->i_nlink > 1 + && plink) + au_plink_append(inode, bdst, h_dst); + goto out; /* success */ + } + + /* revert */ + h_path.dentry = h_parent; + mutex_unlock(&dst_inode->i_mutex); + au_dtime_store(&dt, dst_parent, &h_path); + h_path.dentry = h_dst; + if (!isdir) + rerr = vfsub_unlink(h_dir, &h_path, /*force*/0); + else + rerr = vfsub_rmdir(h_dir, &h_path); + au_dtime_revert(&dt); + if (rerr) { + AuIOErr("failed removing broken entry(%d, %d)\n", err, rerr); + err = -EIO; + } + + out: + dput(dst_parent); + return err; +} + +struct au_cpup_single_args { + int *errp; + struct dentry *dentry; + aufs_bindex_t bdst, bsrc; + loff_t len; + unsigned int flags; + struct dentry *dst_parent; +}; + +static void au_call_cpup_single(void *args) +{ + struct au_cpup_single_args *a = args; + *a->errp = au_cpup_single(a->dentry, a->bdst, a->bsrc, a->len, + a->flags, a->dst_parent); +} + +int au_sio_cpup_single(struct dentry *dentry, aufs_bindex_t bdst, + aufs_bindex_t bsrc, loff_t len, unsigned int flags, + struct dentry *dst_parent) +{ + int err, wkq_err; + umode_t mode; + struct dentry *h_dentry; + + h_dentry = au_h_dptr(dentry, bsrc); + mode = h_dentry->d_inode->i_mode & S_IFMT; + if ((mode != S_IFCHR && mode != S_IFBLK) + || capable(CAP_MKNOD)) + err = au_cpup_single(dentry, bdst, bsrc, len, flags, + dst_parent); + else { + struct au_cpup_single_args args = { + .errp = &err, + .dentry = dentry, + .bdst = bdst, + .bsrc = bsrc, + .len = len, + .flags = flags, + .dst_parent = dst_parent + }; + wkq_err = au_wkq_wait(au_call_cpup_single, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + return err; +} + +/* + * copyup the @dentry from the first active lower branch to @bdst, + * using au_cpup_single(). + */ +static int au_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + unsigned int flags) +{ + int err; + aufs_bindex_t bsrc, bend; + + bend = au_dbend(dentry); + for (bsrc = bdst + 1; bsrc <= bend; bsrc++) + if (au_h_dptr(dentry, bsrc)) + break; + + err = au_lkup_neg(dentry, bdst); + if (!err) { + err = au_cpup_single(dentry, bdst, bsrc, len, flags, NULL); + if (!err) + return 0; /* success */ + + /* revert */ + au_set_h_dptr(dentry, bdst, NULL); + au_set_dbstart(dentry, bsrc); + } + + return err; +} + +struct au_cpup_simple_args { + int *errp; + struct dentry *dentry; + aufs_bindex_t bdst; + loff_t len; + unsigned int flags; +}; + +static void au_call_cpup_simple(void *args) +{ + struct au_cpup_simple_args *a = args; + *a->errp = au_cpup_simple(a->dentry, a->bdst, a->len, a->flags); +} + +int au_sio_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + unsigned int flags) +{ + int err, wkq_err; + unsigned char do_sio; + struct dentry *parent; + struct inode *h_dir; + + parent = dget_parent(dentry); + h_dir = au_h_iptr(parent->d_inode, bdst); + do_sio = !!au_test_h_perm_sio(h_dir, MAY_EXEC | MAY_WRITE); + if (!do_sio) { + /* + * testing CAP_MKNOD is for generic fs, + * but CAP_FSETID is for xfs only, currently. + */ + umode_t mode = dentry->d_inode->i_mode; + do_sio = (((mode & (S_IFCHR | S_IFBLK)) + && !capable(CAP_MKNOD)) + || ((mode & (S_ISUID | S_ISGID)) + && !capable(CAP_FSETID))); + } + if (!do_sio) + err = au_cpup_simple(dentry, bdst, len, flags); + else { + struct au_cpup_simple_args args = { + .errp = &err, + .dentry = dentry, + .bdst = bdst, + .len = len, + .flags = flags + }; + wkq_err = au_wkq_wait(au_call_cpup_simple, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + dput(parent); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * copyup the deleted file for writing. + */ +static int au_do_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, + struct dentry *wh_dentry, struct file *file, + loff_t len) +{ + int err; + aufs_bindex_t bstart; + struct au_dinfo *dinfo; + struct dentry *h_d_dst, *h_d_start; + + dinfo = au_di(dentry); + AuRwMustWriteLock(&dinfo->di_rwsem); + + bstart = dinfo->di_bstart; + h_d_dst = dinfo->di_hdentry[0 + bdst].hd_dentry; + dinfo->di_bstart = bdst; + dinfo->di_hdentry[0 + bdst].hd_dentry = wh_dentry; + h_d_start = dinfo->di_hdentry[0 + bstart].hd_dentry; + if (file) + dinfo->di_hdentry[0 + bstart].hd_dentry + = au_h_fptr(file, au_fbstart(file))->f_dentry; + err = au_cpup_single(dentry, bdst, bstart, len, !AuCpup_DTIME, + /*h_parent*/NULL); + if (!err && file) { + err = au_reopen_nondir(file); + dinfo->di_hdentry[0 + bstart].hd_dentry = h_d_start; + } + dinfo->di_hdentry[0 + bdst].hd_dentry = h_d_dst; + dinfo->di_bstart = bstart; + + return err; +} + +static int au_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + struct file *file) +{ + int err; + struct au_dtime dt; + struct dentry *parent, *h_parent, *wh_dentry; + struct au_branch *br; + struct path h_path; + + br = au_sbr(dentry->d_sb, bdst); + parent = dget_parent(dentry); + h_parent = au_h_dptr(parent, bdst); + wh_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name); + err = PTR_ERR(wh_dentry); + if (IS_ERR(wh_dentry)) + goto out; + + h_path.dentry = h_parent; + h_path.mnt = br->br_mnt; + au_dtime_store(&dt, parent, &h_path); + err = au_do_cpup_wh(dentry, bdst, wh_dentry, file, len); + if (unlikely(err)) + goto out_wh; + + dget(wh_dentry); + h_path.dentry = wh_dentry; + err = vfsub_unlink(h_parent->d_inode, &h_path, /*force*/0); + if (unlikely(err)) { + AuIOErr("failed remove copied-up tmp file %.*s(%d)\n", + AuDLNPair(wh_dentry), err); + err = -EIO; + } + au_dtime_revert(&dt); + au_set_hi_wh(dentry->d_inode, bdst, wh_dentry); + + out_wh: + dput(wh_dentry); + out: + dput(parent); + return err; +} + +struct au_cpup_wh_args { + int *errp; + struct dentry *dentry; + aufs_bindex_t bdst; + loff_t len; + struct file *file; +}; + +static void au_call_cpup_wh(void *args) +{ + struct au_cpup_wh_args *a = args; + *a->errp = au_cpup_wh(a->dentry, a->bdst, a->len, a->file); +} + +int au_sio_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len, + struct file *file) +{ + int err, wkq_err; + struct dentry *parent, *h_orph, *h_parent, *h_dentry; + struct inode *dir, *h_dir, *h_tmpdir, *h_inode; + struct au_wbr *wbr; + + parent = dget_parent(dentry); + dir = parent->d_inode; + h_orph = NULL; + h_parent = NULL; + h_dir = au_igrab(au_h_iptr(dir, bdst)); + h_tmpdir = h_dir; + if (!h_dir->i_nlink) { + wbr = au_sbr(dentry->d_sb, bdst)->br_wbr; + h_orph = wbr->wbr_orph; + + h_parent = dget(au_h_dptr(parent, bdst)); + au_set_h_dptr(parent, bdst, NULL); + au_set_h_dptr(parent, bdst, dget(h_orph)); + h_tmpdir = h_orph->d_inode; + au_set_h_iptr(dir, bdst, NULL, 0); + au_set_h_iptr(dir, bdst, au_igrab(h_tmpdir), /*flags*/0); + + /* this temporary unlock is safe */ + if (file) + h_dentry = au_h_fptr(file, au_fbstart(file))->f_dentry; + else + h_dentry = au_h_dptr(dentry, au_dbstart(dentry)); + h_inode = h_dentry->d_inode; + IMustLock(h_inode); + mutex_unlock(&h_inode->i_mutex); + mutex_lock_nested(&h_tmpdir->i_mutex, AuLsc_I_PARENT3); + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + } + + if (!au_test_h_perm_sio(h_tmpdir, MAY_EXEC | MAY_WRITE)) + err = au_cpup_wh(dentry, bdst, len, file); + else { + struct au_cpup_wh_args args = { + .errp = &err, + .dentry = dentry, + .bdst = bdst, + .len = len, + .file = file + }; + wkq_err = au_wkq_wait(au_call_cpup_wh, &args); + if (unlikely(wkq_err)) + err = wkq_err; + } + + if (h_orph) { + mutex_unlock(&h_tmpdir->i_mutex); + au_set_h_iptr(dir, bdst, NULL, 0); + au_set_h_iptr(dir, bdst, au_igrab(h_dir), /*flags*/0); + au_set_h_dptr(parent, bdst, NULL); + au_set_h_dptr(parent, bdst, h_parent); + } + iput(h_dir); + dput(parent); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* + * generic routine for both of copy-up and copy-down. + */ +/* cf. revalidate function in file.c */ +int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, + int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, + struct dentry *h_parent, void *arg), + void *arg) +{ + int err; + struct au_pin pin; + struct dentry *d, *parent, *h_parent, *real_parent; + + err = 0; + parent = dget_parent(dentry); + if (IS_ROOT(parent)) + goto out; + + au_pin_init(&pin, dentry, bdst, AuLsc_DI_PARENT2, AuLsc_I_PARENT2, + au_opt_udba(dentry->d_sb), AuPin_MNT_WRITE); + + /* do not use au_dpage */ + real_parent = parent; + while (1) { + dput(parent); + parent = dget_parent(dentry); + h_parent = au_h_dptr(parent, bdst); + if (h_parent) + goto out; /* success */ + + /* find top dir which is necessary to cpup */ + do { + d = parent; + dput(parent); + parent = dget_parent(d); + di_read_lock_parent3(parent, !AuLock_IR); + h_parent = au_h_dptr(parent, bdst); + di_read_unlock(parent, !AuLock_IR); + } while (!h_parent); + + if (d != real_parent) + di_write_lock_child3(d); + + /* somebody else might create while we were sleeping */ + if (!au_h_dptr(d, bdst) || !au_h_dptr(d, bdst)->d_inode) { + if (au_h_dptr(d, bdst)) + au_update_dbstart(d); + + au_pin_set_dentry(&pin, d); + err = au_do_pin(&pin); + if (!err) { + err = cp(d, bdst, h_parent, arg); + au_unpin(&pin); + } + } + + if (d != real_parent) + di_write_unlock(d); + if (unlikely(err)) + break; + } + + out: + dput(parent); + return err; +} + +static int au_cpup_dir(struct dentry *dentry, aufs_bindex_t bdst, + struct dentry *h_parent __maybe_unused , + void *arg __maybe_unused) +{ + return au_sio_cpup_simple(dentry, bdst, -1, AuCpup_DTIME); +} + +int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) +{ + return au_cp_dirs(dentry, bdst, au_cpup_dir, NULL); +} + +int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) +{ + int err; + struct dentry *parent; + struct inode *dir; + + parent = dget_parent(dentry); + dir = parent->d_inode; + err = 0; + if (au_h_iptr(dir, bdst)) + goto out; + + di_read_unlock(parent, AuLock_IR); + di_write_lock_parent(parent); + /* someone else might change our inode while we were sleeping */ + if (!au_h_iptr(dir, bdst)) + err = au_cpup_dirs(dentry, bdst); + di_downgrade_lock(parent, AuLock_IR); + + out: + dput(parent); + return err; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/dentry.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/dentry.c @@ -0,0 +1,880 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * lookup and dentry operations + */ + +#include +#include "aufs.h" + +static void au_h_nd(struct nameidata *h_nd, struct nameidata *nd) +{ + if (nd) { + *h_nd = *nd; + + /* + * gave up supporting LOOKUP_CREATE/OPEN for lower fs, + * due to whiteout and branch permission. + */ + h_nd->flags &= ~(/*LOOKUP_PARENT |*/ LOOKUP_OPEN | LOOKUP_CREATE + | LOOKUP_FOLLOW); + /* unnecessary? */ + h_nd->intent.open.file = NULL; + } else + memset(h_nd, 0, sizeof(*h_nd)); +} + +struct au_lkup_one_args { + struct dentry **errp; + struct qstr *name; + struct dentry *h_parent; + struct au_branch *br; + struct nameidata *nd; +}; + +struct dentry *au_lkup_one(struct qstr *name, struct dentry *h_parent, + struct au_branch *br, struct nameidata *nd) +{ + struct dentry *h_dentry; + int err; + struct nameidata h_nd; + + if (au_test_fs_null_nd(h_parent->d_sb)) + return vfsub_lookup_one_len(name->name, h_parent, name->len); + + au_h_nd(&h_nd, nd); + h_nd.path.dentry = h_parent; + h_nd.path.mnt = br->br_mnt; + + err = __lookup_one_len(name->name, &h_nd.last, NULL, name->len); + h_dentry = ERR_PTR(err); + if (!err) { + path_get(&h_nd.path); + h_dentry = vfsub_lookup_hash(&h_nd); + path_put(&h_nd.path); + } + + return h_dentry; +} + +static void au_call_lkup_one(void *args) +{ + struct au_lkup_one_args *a = args; + *a->errp = au_lkup_one(a->name, a->h_parent, a->br, a->nd); +} + +#define AuLkup_ALLOW_NEG 1 +#define au_ftest_lkup(flags, name) ((flags) & AuLkup_##name) +#define au_fset_lkup(flags, name) { (flags) |= AuLkup_##name; } +#define au_fclr_lkup(flags, name) { (flags) &= ~AuLkup_##name; } + +struct au_do_lookup_args { + unsigned int flags; + mode_t type; + struct nameidata *nd; +}; + +/* + * returns positive/negative dentry, NULL or an error. + * NULL means whiteout-ed or not-found. + */ +static struct dentry* +au_do_lookup(struct dentry *h_parent, struct dentry *dentry, + aufs_bindex_t bindex, struct qstr *wh_name, + struct au_do_lookup_args *args) +{ + struct dentry *h_dentry; + struct inode *h_inode, *inode; + struct qstr *name; + struct au_branch *br; + int wh_found, opq; + unsigned char wh_able; + const unsigned char allow_neg = !!au_ftest_lkup(args->flags, ALLOW_NEG); + + name = &dentry->d_name; + wh_found = 0; + br = au_sbr(dentry->d_sb, bindex); + wh_able = !!au_br_whable(br->br_perm); + if (wh_able) + wh_found = au_wh_test(h_parent, wh_name, br, /*try_sio*/0); + h_dentry = ERR_PTR(wh_found); + if (!wh_found) + goto real_lookup; + if (unlikely(wh_found < 0)) + goto out; + + /* We found a whiteout */ + /* au_set_dbend(dentry, bindex); */ + au_set_dbwh(dentry, bindex); + if (!allow_neg) + return NULL; /* success */ + + real_lookup: + h_dentry = au_lkup_one(name, h_parent, br, args->nd); + if (IS_ERR(h_dentry)) + goto out; + + h_inode = h_dentry->d_inode; + if (!h_inode) { + if (!allow_neg) + goto out_neg; + } else if (wh_found + || (args->type && args->type != (h_inode->i_mode & S_IFMT))) + goto out_neg; + + if (au_dbend(dentry) <= bindex) + au_set_dbend(dentry, bindex); + if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry)) + au_set_dbstart(dentry, bindex); + au_set_h_dptr(dentry, bindex, h_dentry); + + inode = dentry->d_inode; + if (!h_inode || !S_ISDIR(h_inode->i_mode) || !wh_able + || (inode && !S_ISDIR(inode->i_mode))) + goto out; /* success */ + + mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); + opq = au_diropq_test(h_dentry, br); + mutex_unlock(&h_inode->i_mutex); + if (opq > 0) + au_set_dbdiropq(dentry, bindex); + else if (unlikely(opq < 0)) { + au_set_h_dptr(dentry, bindex, NULL); + h_dentry = ERR_PTR(opq); + } + goto out; + + out_neg: + dput(h_dentry); + h_dentry = NULL; + out: + return h_dentry; +} + +static int au_test_shwh(struct super_block *sb, const struct qstr *name) +{ + if (unlikely(!au_opt_test(au_mntflags(sb), SHWH) + && !strncmp(name->name, AUFS_WH_PFX, AUFS_WH_PFX_LEN))) + return -EPERM; + return 0; +} + +/* + * returns the number of lower positive dentries, + * otherwise an error. + * can be called at unlinking with @type is zero. + */ +int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type, + struct nameidata *nd) +{ + int npositive, err; + aufs_bindex_t bindex, btail, bdiropq; + unsigned char isdir; + struct qstr whname; + struct au_do_lookup_args args = { + .flags = 0, + .type = type, + .nd = nd + }; + const struct qstr *name = &dentry->d_name; + struct dentry *parent; + struct inode *inode; + + parent = dget_parent(dentry); + err = au_test_shwh(dentry->d_sb, name); + if (unlikely(err)) + goto out; + + err = au_wh_name_alloc(&whname, name); + if (unlikely(err)) + goto out; + + inode = dentry->d_inode; + isdir = !!(inode && S_ISDIR(inode->i_mode)); + if (!type) + au_fset_lkup(args.flags, ALLOW_NEG); + + npositive = 0; + btail = au_dbtaildir(parent); + for (bindex = bstart; bindex <= btail; bindex++) { + struct dentry *h_parent, *h_dentry; + struct inode *h_inode, *h_dir; + + h_dentry = au_h_dptr(dentry, bindex); + if (h_dentry) { + if (h_dentry->d_inode) + npositive++; + if (type != S_IFDIR) + break; + continue; + } + h_parent = au_h_dptr(parent, bindex); + if (!h_parent) + continue; + h_dir = h_parent->d_inode; + if (!h_dir || !S_ISDIR(h_dir->i_mode)) + continue; + + mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); + h_dentry = au_do_lookup(h_parent, dentry, bindex, &whname, + &args); + mutex_unlock(&h_dir->i_mutex); + err = PTR_ERR(h_dentry); + if (IS_ERR(h_dentry)) + goto out_wh; + au_fclr_lkup(args.flags, ALLOW_NEG); + + if (au_dbwh(dentry) >= 0) + break; + if (!h_dentry) + continue; + h_inode = h_dentry->d_inode; + if (!h_inode) + continue; + npositive++; + if (!args.type) + args.type = h_inode->i_mode & S_IFMT; + if (args.type != S_IFDIR) + break; + else if (isdir) { + /* the type of lower may be different */ + bdiropq = au_dbdiropq(dentry); + if (bdiropq >= 0 && bdiropq <= bindex) + break; + } + } + + if (npositive) { + AuLabel(positive); + au_update_dbstart(dentry); + } + err = npositive; + if (unlikely(!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE) + && au_dbstart(dentry) < 0)) + /* both of real entry and whiteout found */ + err = -EIO; + + out_wh: + kfree(whname.name); + out: + dput(parent); + return err; +} + +struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent, + struct au_branch *br) +{ + struct dentry *dentry; + int wkq_err; + + if (!au_test_h_perm_sio(parent->d_inode, MAY_EXEC)) + dentry = au_lkup_one(name, parent, br, /*nd*/NULL); + else { + struct au_lkup_one_args args = { + .errp = &dentry, + .name = name, + .h_parent = parent, + .br = br, + .nd = NULL + }; + + wkq_err = au_wkq_wait(au_call_lkup_one, &args); + if (unlikely(wkq_err)) + dentry = ERR_PTR(wkq_err); + } + + return dentry; +} + +/* + * lookup @dentry on @bindex which should be negative. + */ +int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex) +{ + int err; + struct dentry *parent, *h_parent, *h_dentry; + struct qstr *name; + + name = &dentry->d_name; + parent = dget_parent(dentry); + h_parent = au_h_dptr(parent, bindex); + h_dentry = au_sio_lkup_one(name, h_parent, + au_sbr(dentry->d_sb, bindex)); + err = PTR_ERR(h_dentry); + if (IS_ERR(h_dentry)) + goto out; + if (unlikely(h_dentry->d_inode)) { + err = -EIO; + AuIOErr("b%d %.*s should be negative.\n", + bindex, AuDLNPair(h_dentry)); + dput(h_dentry); + goto out; + } + + if (bindex < au_dbstart(dentry)) + au_set_dbstart(dentry, bindex); + if (au_dbend(dentry) < bindex) + au_set_dbend(dentry, bindex); + au_set_h_dptr(dentry, bindex, h_dentry); + err = 0; + + out: + dput(parent); + return err; +} + +/* ---------------------------------------------------------------------- */ + +/* subset of struct inode */ +struct au_iattr { + unsigned long i_ino; + /* unsigned int i_nlink; */ + uid_t i_uid; + gid_t i_gid; + u64 i_version; +/* + loff_t i_size; + blkcnt_t i_blocks; +*/ + umode_t i_mode; +}; + +static void au_iattr_save(struct au_iattr *ia, struct inode *h_inode) +{ + ia->i_ino = h_inode->i_ino; + /* ia->i_nlink = h_inode->i_nlink; */ + ia->i_uid = h_inode->i_uid; + ia->i_gid = h_inode->i_gid; + ia->i_version = h_inode->i_version; +/* + ia->i_size = h_inode->i_size; + ia->i_blocks = h_inode->i_blocks; +*/ + ia->i_mode = (h_inode->i_mode & S_IFMT); +} + +static int au_iattr_test(struct au_iattr *ia, struct inode *h_inode) +{ + return ia->i_ino != h_inode->i_ino + /* || ia->i_nlink != h_inode->i_nlink */ + || ia->i_uid != h_inode->i_uid + || ia->i_gid != h_inode->i_gid + || ia->i_version != h_inode->i_version +/* + || ia->i_size != h_inode->i_size + || ia->i_blocks != h_inode->i_blocks +*/ + || ia->i_mode != (h_inode->i_mode & S_IFMT); +} + +static int au_h_verify_dentry(struct dentry *h_dentry, struct dentry *h_parent, + struct au_branch *br) +{ + int err; + struct au_iattr ia; + struct inode *h_inode; + struct dentry *h_d; + struct super_block *h_sb; + + err = 0; + memset(&ia, -1, sizeof(ia)); + h_sb = h_dentry->d_sb; + h_inode = h_dentry->d_inode; + if (h_inode) + au_iattr_save(&ia, h_inode); + else if (au_test_nfs(h_sb) || au_test_fuse(h_sb)) + /* nfs d_revalidate may return 0 for negative dentry */ + /* fuse d_revalidate always return 0 for negative dentry */ + goto out; + + /* main purpose is namei.c:cached_lookup() and d_revalidate */ + h_d = au_lkup_one(&h_dentry->d_name, h_parent, br, /*nd*/NULL); + err = PTR_ERR(h_d); + if (IS_ERR(h_d)) + goto out; + + err = 0; + if (unlikely(h_d != h_dentry + || h_d->d_inode != h_inode + || (h_inode && au_iattr_test(&ia, h_inode)))) + err = au_busy_or_stale(); + dput(h_d); + + out: + AuTraceErr(err); + return err; +} + +int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, + struct dentry *h_parent, struct au_branch *br) +{ + int err; + + err = 0; + if (udba == AuOpt_UDBA_REVAL) { + IMustLock(h_dir); + err = (h_dentry->d_parent->d_inode != h_dir); + } else if (udba == AuOpt_UDBA_HINOTIFY) + err = au_h_verify_dentry(h_dentry, h_parent, br); + + return err; +} + +/* ---------------------------------------------------------------------- */ + +static void au_do_refresh_hdentry(struct au_hdentry *p, struct au_dinfo *dinfo, + struct dentry *parent) +{ + struct dentry *h_d, *h_dp; + struct au_hdentry tmp, *q; + struct super_block *sb; + aufs_bindex_t new_bindex, bindex, bend, bwh, bdiropq; + + AuRwMustWriteLock(&dinfo->di_rwsem); + + bend = dinfo->di_bend; + bwh = dinfo->di_bwh; + bdiropq = dinfo->di_bdiropq; + for (bindex = dinfo->di_bstart; bindex <= bend; bindex++, p++) { + h_d = p->hd_dentry; + if (!h_d) + continue; + + h_dp = dget_parent(h_d); + if (h_dp == au_h_dptr(parent, bindex)) { + dput(h_dp); + continue; + } + + new_bindex = au_find_dbindex(parent, h_dp); + dput(h_dp); + if (dinfo->di_bwh == bindex) + bwh = new_bindex; + if (dinfo->di_bdiropq == bindex) + bdiropq = new_bindex; + if (new_bindex < 0) { + au_hdput(p); + p->hd_dentry = NULL; + continue; + } + + /* swap two lower dentries, and loop again */ + q = dinfo->di_hdentry + new_bindex; + tmp = *q; + *q = *p; + *p = tmp; + if (tmp.hd_dentry) { + bindex--; + p--; + } + } + + sb = parent->d_sb; + dinfo->di_bwh = -1; + if (bwh >= 0 && bwh <= au_sbend(sb) && au_sbr_whable(sb, bwh)) + dinfo->di_bwh = bwh; + + dinfo->di_bdiropq = -1; + if (bdiropq >= 0 + && bdiropq <= au_sbend(sb) + && au_sbr_whable(sb, bdiropq)) + dinfo->di_bdiropq = bdiropq; + + bend = au_dbend(parent); + p = dinfo->di_hdentry; + for (bindex = 0; bindex <= bend; bindex++, p++) + if (p->hd_dentry) { + dinfo->di_bstart = bindex; + break; + } + + p = dinfo->di_hdentry + bend; + for (bindex = bend; bindex >= 0; bindex--, p--) + if (p->hd_dentry) { + dinfo->di_bend = bindex; + break; + } +} + +/* + * returns the number of found lower positive dentries, + * otherwise an error. + */ +int au_refresh_hdentry(struct dentry *dentry, mode_t type) +{ + int npositive, err; + unsigned int sigen; + aufs_bindex_t bstart; + struct au_dinfo *dinfo; + struct super_block *sb; + struct dentry *parent; + + DiMustWriteLock(dentry); + + sb = dentry->d_sb; + AuDebugOn(IS_ROOT(dentry)); + sigen = au_sigen(sb); + parent = dget_parent(dentry); + AuDebugOn(au_digen(parent) != sigen + || au_iigen(parent->d_inode) != sigen); + + dinfo = au_di(dentry); + err = au_di_realloc(dinfo, au_sbend(sb) + 1); + npositive = err; + if (unlikely(err)) + goto out; + au_do_refresh_hdentry(dinfo->di_hdentry + dinfo->di_bstart, dinfo, + parent); + + npositive = 0; + bstart = au_dbstart(parent); + if (type != S_IFDIR && dinfo->di_bstart == bstart) + goto out_dgen; /* success */ + + npositive = au_lkup_dentry(dentry, bstart, type, /*nd*/NULL); + if (npositive < 0) + goto out; + if (dinfo->di_bwh >= 0 && dinfo->di_bwh <= dinfo->di_bstart) + d_drop(dentry); + + out_dgen: + au_update_digen(dentry); + out: + dput(parent); + AuTraceErr(npositive); + return npositive; +} + +static noinline_for_stack +int au_do_h_d_reval(struct dentry *h_dentry, struct nameidata *nd, + struct dentry *dentry, aufs_bindex_t bindex) +{ + int err, valid; + int (*reval)(struct dentry *, struct nameidata *); + + err = 0; + reval = NULL; + if (h_dentry->d_op) + reval = h_dentry->d_op->d_revalidate; + if (!reval) + goto out; + + AuDbg("b%d\n", bindex); + if (au_test_fs_null_nd(h_dentry->d_sb)) + /* it may return tri-state */ + valid = reval(h_dentry, NULL); + else { + struct nameidata h_nd; + int locked; + struct dentry *parent; + + au_h_nd(&h_nd, nd); + parent = nd->path.dentry; + locked = (nd && nd->path.dentry != dentry); + if (locked) + di_read_lock_parent(parent, AuLock_IR); + BUG_ON(bindex > au_dbend(parent)); + h_nd.path.dentry = au_h_dptr(parent, bindex); + BUG_ON(!h_nd.path.dentry); + h_nd.path.mnt = au_sbr(parent->d_sb, bindex)->br_mnt; + path_get(&h_nd.path); + valid = reval(h_dentry, &h_nd); + path_put(&h_nd.path); + if (locked) + di_read_unlock(parent, AuLock_IR); + } + + if (unlikely(valid < 0)) + err = valid; + else if (!valid) + err = -EINVAL; + + out: + AuTraceErr(err); + return err; +} + +/* todo: remove this */ +static int h_d_revalidate(struct dentry *dentry, struct inode *inode, + struct nameidata *nd, int do_udba) +{ + int err; + umode_t mode, h_mode; + aufs_bindex_t bindex, btail, bstart, ibs, ibe; + unsigned char plus, unhashed, is_root, h_plus; + struct inode *first, *h_inode, *h_cached_inode; + struct dentry *h_dentry; + struct qstr *name, *h_name; + + err = 0; + plus = 0; + mode = 0; + first = NULL; + ibs = -1; + ibe = -1; + unhashed = !!d_unhashed(dentry); + is_root = !!IS_ROOT(dentry); + name = &dentry->d_name; + + /* + * Theoretically, REVAL test should be unnecessary in case of INOTIFY. + * But inotify doesn't fire some necessary events, + * IN_ATTRIB for atime/nlink/pageio + * IN_DELETE for NFS dentry + * Let's do REVAL test too. + */ + if (do_udba && inode) { + mode = (inode->i_mode & S_IFMT); + plus = (inode->i_nlink > 0); + first = au_h_iptr(inode, au_ibstart(inode)); + ibs = au_ibstart(inode); + ibe = au_ibend(inode); + } + + bstart = au_dbstart(dentry); + btail = bstart; + if (inode && S_ISDIR(inode->i_mode)) + btail = au_dbtaildir(dentry); + for (bindex = bstart; bindex <= btail; bindex++) { + h_dentry = au_h_dptr(dentry, bindex); + if (!h_dentry) + continue; + + AuDbg("b%d, %.*s\n", bindex, AuDLNPair(h_dentry)); + h_name = &h_dentry->d_name; + if (unlikely(do_udba + && !is_root + && (unhashed != !!d_unhashed(h_dentry) + || name->len != h_name->len + || memcmp(name->name, h_name->name, name->len)) + )) { + AuDbg("unhash 0x%x 0x%x, %.*s %.*s\n", + unhashed, d_unhashed(h_dentry), + AuDLNPair(dentry), AuDLNPair(h_dentry)); + goto err; + } + + err = au_do_h_d_reval(h_dentry, nd, dentry, bindex); + if (unlikely(err)) + /* do not goto err, to keep the errno */ + break; + + /* todo: plink too? */ + if (!do_udba) + continue; + + /* UDBA tests */ + h_inode = h_dentry->d_inode; + if (unlikely(!!inode != !!h_inode)) + goto err; + + h_plus = plus; + h_mode = mode; + h_cached_inode = h_inode; + if (h_inode) { + h_mode = (h_inode->i_mode & S_IFMT); + h_plus = (h_inode->i_nlink > 0); + } + if (inode && ibs <= bindex && bindex <= ibe) + h_cached_inode = au_h_iptr(inode, bindex); + + if (unlikely(plus != h_plus + || mode != h_mode + || h_cached_inode != h_inode)) + goto err; + continue; + + err: + err = -EINVAL; + break; + } + + return err; +} + +static int simple_reval_dpath(struct dentry *dentry, unsigned int sigen) +{ + int err; + struct dentry *parent; + struct inode *inode; + + inode = dentry->d_inode; + if (au_digen(dentry) == sigen && au_iigen(inode) == sigen) + return 0; + + parent = dget_parent(dentry); + di_read_lock_parent(parent, AuLock_IR); + AuDebugOn(au_digen(parent) != sigen + || au_iigen(parent->d_inode) != sigen); + au_dbg_verify_gen(parent, sigen); + + /* returns a number of positive dentries */ + err = au_refresh_hdentry(dentry, inode->i_mode & S_IFMT); + if (err >= 0) + err = au_refresh_hinode(inode, dentry); + + di_read_unlock(parent, AuLock_IR); + dput(parent); + return err; +} + +int au_reval_dpath(struct dentry *dentry, unsigned int sigen) +{ + int err; + struct dentry *d, *parent; + struct inode *inode; + + if (!au_ftest_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIRS)) + return simple_reval_dpath(dentry, sigen); + + /* slow loop, keep it simple and stupid */ + /* cf: au_cpup_dirs() */ + err = 0; + parent = NULL; + while (au_digen(dentry) != sigen + || au_iigen(dentry->d_inode) != sigen) { + d = dentry; + while (1) { + dput(parent); + parent = dget_parent(d); + if (au_digen(parent) == sigen + && au_iigen(parent->d_inode) == sigen) + break; + d = parent; + } + + inode = d->d_inode; + if (d != dentry) + di_write_lock_child(d); + + /* someone might update our dentry while we were sleeping */ + if (au_digen(d) != sigen || au_iigen(d->d_inode) != sigen) { + di_read_lock_parent(parent, AuLock_IR); + /* returns a number of positive dentries */ + err = au_refresh_hdentry(d, inode->i_mode & S_IFMT); + if (err >= 0) + err = au_refresh_hinode(inode, d); + di_read_unlock(parent, AuLock_IR); + } + + if (d != dentry) + di_write_unlock(d); + dput(parent); + if (unlikely(err)) + break; + } + + return err; +} + +/* + * if valid returns 1, otherwise 0. + */ +static int aufs_d_revalidate(struct dentry *dentry, struct nameidata *nd) +{ + int valid, err; + unsigned int sigen; + unsigned char do_udba; + struct super_block *sb; + struct inode *inode; + + err = -EINVAL; + sb = dentry->d_sb; + inode = dentry->d_inode; + aufs_read_lock(dentry, AuLock_FLUSH | AuLock_DW); + sigen = au_sigen(sb); + if (au_digen(dentry) != sigen) { + AuDebugOn(IS_ROOT(dentry)); + if (inode) + err = au_reval_dpath(dentry, sigen); + if (unlikely(err)) + goto out_dgrade; + AuDebugOn(au_digen(dentry) != sigen); + } + if (inode && au_iigen(inode) != sigen) { + AuDebugOn(IS_ROOT(dentry)); + err = au_refresh_hinode(inode, dentry); + if (unlikely(err)) + goto out_dgrade; + AuDebugOn(au_iigen(inode) != sigen); + } + di_downgrade_lock(dentry, AuLock_IR); + + AuDebugOn(au_digen(dentry) != sigen); + AuDebugOn(inode && au_iigen(inode) != sigen); + err = -EINVAL; + do_udba = !au_opt_test(au_mntflags(sb), UDBA_NONE); + if (do_udba && inode) { + aufs_bindex_t bstart = au_ibstart(inode); + + if (bstart >= 0 + && au_test_higen(inode, au_h_iptr(inode, bstart))) + goto out; + } + + err = h_d_revalidate(dentry, inode, nd, do_udba); + if (unlikely(!err && do_udba && au_dbstart(dentry) < 0)) + /* both of real entry and whiteout found */ + err = -EIO; + goto out; + + out_dgrade: + di_downgrade_lock(dentry, AuLock_IR); + out: + au_store_oflag(nd, inode); + aufs_read_unlock(dentry, AuLock_IR); + AuTraceErr(err); + valid = !err; + if (!valid) + AuDbg("%.*s invalid\n", AuDLNPair(dentry)); + return valid; +} + +static void aufs_d_release(struct dentry *dentry) +{ + struct au_dinfo *dinfo; + aufs_bindex_t bend, bindex; + + dinfo = dentry->d_fsdata; + if (!dinfo) + return; + + /* dentry may not be revalidated */ + bindex = dinfo->di_bstart; + if (bindex >= 0) { + struct au_hdentry *p; + + bend = dinfo->di_bend; + p = dinfo->di_hdentry + bindex; + while (bindex++ <= bend) { + if (p->hd_dentry) + au_hdput(p); + p++; + } + } + kfree(dinfo->di_hdentry); + AuRwDestroy(&dinfo->di_rwsem); + au_cache_free_dinfo(dinfo); + au_hin_di_reinit(dentry); +} + +struct dentry_operations aufs_dop = { + .d_revalidate = aufs_d_revalidate, + .d_release = aufs_d_release +}; --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/vdir.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/vdir.c @@ -0,0 +1,882 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * virtual or vertical directory + */ + +#include +#include "aufs.h" + +static unsigned int calc_size(int nlen) +{ + BUILD_BUG_ON(sizeof(ino_t) != sizeof(long)); + return ALIGN(sizeof(struct au_vdir_de) + nlen, sizeof(ino_t)); +} + +static int set_deblk_end(union au_vdir_deblk_p *p, + union au_vdir_deblk_p *deblk_end) +{ + if (calc_size(0) <= deblk_end->deblk - p->deblk) { + p->de->de_str.len = 0; + /* smp_mb(); */ + return 0; + } + return -1; /* error */ +} + +/* returns true or false */ +static int is_deblk_end(union au_vdir_deblk_p *p, + union au_vdir_deblk_p *deblk_end) +{ + if (calc_size(0) <= deblk_end->deblk - p->deblk) + return !p->de->de_str.len; + return 1; +} + +static unsigned char *last_deblk(struct au_vdir *vdir) +{ + return vdir->vd_deblk[vdir->vd_nblk - 1]; +} + +/* ---------------------------------------------------------------------- */ + +/* + * the allocated memory has to be freed by + * au_nhash_wh_free() or au_nhash_de_free(). + */ +int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp) +{ + struct hlist_head *head; + unsigned int u; + + head = kmalloc(sizeof(*nhash->nh_head) * num_hash, gfp); + if (head) { + nhash->nh_num = num_hash; + nhash->nh_head = head; + for (u = 0; u < num_hash; u++) + INIT_HLIST_HEAD(head++); + return 0; /* success */ + } + + return -ENOMEM; +} + +static void nhash_count(struct hlist_head *head) +{ +#if 0 + unsigned long n; + struct hlist_node *pos; + + n = 0; + hlist_for_each(pos, head) + n++; + AuInfo("%lu\n", n); +#endif +} + +static void au_nhash_wh_do_free(struct hlist_head *head) +{ + struct au_vdir_wh *tpos; + struct hlist_node *pos, *node; + + hlist_for_each_entry_safe(tpos, pos, node, head, wh_hash) { + /* hlist_del(pos); */ + kfree(tpos); + } +} + +static void au_nhash_de_do_free(struct hlist_head *head) +{ + struct au_vdir_dehstr *tpos; + struct hlist_node *pos, *node; + + hlist_for_each_entry_safe(tpos, pos, node, head, hash) { + /* hlist_del(pos); */ + au_cache_free_dehstr(tpos); + } +} + +static void au_nhash_do_free(struct au_nhash *nhash, + void (*free)(struct hlist_head *head)) +{ + unsigned int u, n; + struct hlist_head *head; + + n = nhash->nh_num; + head = nhash->nh_head; + for (u = 0; u < n; u++) { + nhash_count(head); + free(head++); + } + kfree(nhash->nh_head); +} + +void au_nhash_wh_free(struct au_nhash *whlist) +{ + au_nhash_do_free(whlist, au_nhash_wh_do_free); +} + +static void au_nhash_de_free(struct au_nhash *delist) +{ + au_nhash_do_free(delist, au_nhash_de_do_free); +} + +/* ---------------------------------------------------------------------- */ + +int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, + int limit) +{ + int num; + unsigned int u, n; + struct hlist_head *head; + struct au_vdir_wh *tpos; + struct hlist_node *pos; + + num = 0; + n = whlist->nh_num; + head = whlist->nh_head; + for (u = 0; u < n; u++) { + hlist_for_each_entry(tpos, pos, head, wh_hash) + if (tpos->wh_bindex == btgt && ++num > limit) + return 1; + head++; + } + return 0; +} + +static struct hlist_head *au_name_hash(struct au_nhash *nhash, + unsigned char *name, + unsigned int len) +{ + unsigned int v; + /* const unsigned int magic_bit = 12; */ + + v = 0; + while (len--) + v += *name++; + /* v = hash_long(v, magic_bit); */ + v %= nhash->nh_num; + return nhash->nh_head + v; +} + +static int au_nhash_test_name(struct au_vdir_destr *str, const char *name, + int nlen) +{ + return str->len == nlen && !memcmp(str->name, name, nlen); +} + +/* returns found or not */ +int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen) +{ + struct hlist_head *head; + struct au_vdir_wh *tpos; + struct hlist_node *pos; + struct au_vdir_destr *str; + + head = au_name_hash(whlist, name, nlen); + hlist_for_each_entry(tpos, pos, head, wh_hash) { + str = &tpos->wh_str; + AuDbg("%.*s\n", str->len, str->name); + if (au_nhash_test_name(str, name, nlen)) + return 1; + } + return 0; +} + +/* returns found(true) or not */ +static int test_known(struct au_nhash *delist, char *name, int nlen) +{ + struct hlist_head *head; + struct au_vdir_dehstr *tpos; + struct hlist_node *pos; + struct au_vdir_destr *str; + + head = au_name_hash(delist, name, nlen); + hlist_for_each_entry(tpos, pos, head, hash) { + str = tpos->str; + AuDbg("%.*s\n", str->len, str->name); + if (au_nhash_test_name(str, name, nlen)) + return 1; + } + return 0; +} + +static void au_shwh_init_wh(struct au_vdir_wh *wh, ino_t ino, + unsigned char d_type) +{ +#ifdef CONFIG_AUFS_SHWH + wh->wh_ino = ino; + wh->wh_type = d_type; +#endif +} + +/* ---------------------------------------------------------------------- */ + +int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, + unsigned int d_type, aufs_bindex_t bindex, + unsigned char shwh) +{ + int err; + struct au_vdir_destr *str; + struct au_vdir_wh *wh; + + AuDbg("%.*s\n", nlen, name); + err = -ENOMEM; + wh = kmalloc(sizeof(*wh) + nlen, GFP_NOFS); + if (unlikely(!wh)) + goto out; + + err = 0; + wh->wh_bindex = bindex; + if (shwh) + au_shwh_init_wh(wh, ino, d_type); + str = &wh->wh_str; + str->len = nlen; + memcpy(str->name, name, nlen); + hlist_add_head(&wh->wh_hash, au_name_hash(whlist, name, nlen)); + /* smp_mb(); */ + + out: + return err; +} + +static int append_deblk(struct au_vdir *vdir) +{ + int err; + unsigned long ul; + const unsigned int deblk_sz = vdir->vd_deblk_sz; + union au_vdir_deblk_p p, deblk_end; + unsigned char **o; + + err = -ENOMEM; + o = krealloc(vdir->vd_deblk, sizeof(*o) * (vdir->vd_nblk + 1), + GFP_NOFS); + if (unlikely(!o)) + goto out; + + vdir->vd_deblk = o; + p.deblk = kmalloc(deblk_sz, GFP_NOFS); + if (p.deblk) { + ul = vdir->vd_nblk++; + vdir->vd_deblk[ul] = p.deblk; + vdir->vd_last.ul = ul; + vdir->vd_last.p.deblk = p.deblk; + deblk_end.deblk = p.deblk + deblk_sz; + err = set_deblk_end(&p, &deblk_end); + } + + out: + return err; +} + +static int append_de(struct au_vdir *vdir, char *name, int nlen, ino_t ino, + unsigned int d_type, struct au_nhash *delist) +{ + int err; + unsigned int sz; + const unsigned int deblk_sz = vdir->vd_deblk_sz; + union au_vdir_deblk_p p, *room, deblk_end; + struct au_vdir_dehstr *dehstr; + + p.deblk = last_deblk(vdir); + deblk_end.deblk = p.deblk + deblk_sz; + room = &vdir->vd_last.p; + AuDebugOn(room->deblk < p.deblk || deblk_end.deblk <= room->deblk + || !is_deblk_end(room, &deblk_end)); + + sz = calc_size(nlen); + if (unlikely(sz > deblk_end.deblk - room->deblk)) { + err = append_deblk(vdir); + if (unlikely(err)) + goto out; + + p.deblk = last_deblk(vdir); + deblk_end.deblk = p.deblk + deblk_sz; + /* smp_mb(); */ + AuDebugOn(room->deblk != p.deblk); + } + + err = -ENOMEM; + dehstr = au_cache_alloc_dehstr(); + if (unlikely(!dehstr)) + goto out; + + dehstr->str = &room->de->de_str; + hlist_add_head(&dehstr->hash, au_name_hash(delist, name, nlen)); + room->de->de_ino = ino; + room->de->de_type = d_type; + room->de->de_str.len = nlen; + memcpy(room->de->de_str.name, name, nlen); + + err = 0; + room->deblk += sz; + if (unlikely(set_deblk_end(room, &deblk_end))) + err = append_deblk(vdir); + /* smp_mb(); */ + + out: + return err; +} + +/* ---------------------------------------------------------------------- */ + +void au_vdir_free(struct au_vdir *vdir) +{ + unsigned char **deblk; + + deblk = vdir->vd_deblk; + while (vdir->vd_nblk--) + kfree(*deblk++); + kfree(vdir->vd_deblk); + au_cache_free_vdir(vdir); +} + +static struct au_vdir *alloc_vdir(struct super_block *sb) +{ + struct au_vdir *vdir; + int err; + + SiMustAnyLock(sb); + + err = -ENOMEM; + vdir = au_cache_alloc_vdir(); + if (unlikely(!vdir)) + goto out; + + vdir->vd_deblk = kzalloc(sizeof(*vdir->vd_deblk), GFP_NOFS); + if (unlikely(!vdir->vd_deblk)) + goto out_free; + + vdir->vd_deblk_sz = au_sbi(sb)->si_rdblk; + vdir->vd_nblk = 0; + vdir->vd_version = 0; + vdir->vd_jiffy = 0; + err = append_deblk(vdir); + if (!err) + return vdir; /* success */ + + kfree(vdir->vd_deblk); + + out_free: + au_cache_free_vdir(vdir); + out: + vdir = ERR_PTR(err); + return vdir; +} + +static int reinit_vdir(struct au_vdir *vdir) +{ + int err; + union au_vdir_deblk_p p, deblk_end; + + while (vdir->vd_nblk > 1) { + kfree(vdir->vd_deblk[vdir->vd_nblk - 1]); + /* vdir->vd_deblk[vdir->vd_nblk - 1] = NULL; */ + vdir->vd_nblk--; + } + p.deblk = vdir->vd_deblk[0]; + deblk_end.deblk = p.deblk + vdir->vd_deblk_sz; + err = set_deblk_end(&p, &deblk_end); + /* keep vd_dblk_sz */ + vdir->vd_last.ul = 0; + vdir->vd_last.p.deblk = vdir->vd_deblk[0]; + vdir->vd_version = 0; + vdir->vd_jiffy = 0; + /* smp_mb(); */ + return err; +} + +/* ---------------------------------------------------------------------- */ + +static int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + unsigned int d_type, ino_t *ino) +{ + int err; + struct mutex *mtx; + const int isdir = (d_type == DT_DIR); + + /* prevent hardlinks from race condition */ + mtx = NULL; + if (!isdir) { + mtx = &au_sbr(sb, bindex)->br_xino.xi_nondir_mtx; + mutex_lock(mtx); + } + err = au_xino_read(sb, bindex, h_ino, ino); + if (unlikely(err)) + goto out; + + if (!*ino) { + err = -EIO; + *ino = au_xino_new_ino(sb); + if (unlikely(!*ino)) + goto out; + err = au_xino_write(sb, bindex, h_ino, *ino); + if (unlikely(err)) + goto out; + } + + out: + if (!isdir) + mutex_unlock(mtx); + return err; +} + +static int au_wh_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, + unsigned int d_type, ino_t *ino) +{ +#ifdef CONFIG_AUFS_SHWH + return au_ino(sb, bindex, h_ino, d_type, ino); +#else + return 0; +#endif +} + +#define AuFillVdir_CALLED 1 +#define AuFillVdir_WHABLE (1 << 1) +#define AuFillVdir_SHWH (1 << 2) +#define au_ftest_fillvdir(flags, name) ((flags) & AuFillVdir_##name) +#define au_fset_fillvdir(flags, name) { (flags) |= AuFillVdir_##name; } +#define au_fclr_fillvdir(flags, name) { (flags) &= ~AuFillVdir_##name; } + +#ifndef CONFIG_AUFS_SHWH +#undef AuFillVdir_SHWH +#define AuFillVdir_SHWH 0 +#endif + +struct fillvdir_arg { + struct file *file; + struct au_vdir *vdir; + struct au_nhash delist; + struct au_nhash whlist; + aufs_bindex_t bindex; + unsigned int flags; + int err; +}; + +static int fillvdir(void *__arg, const char *__name, int nlen, + loff_t offset __maybe_unused, u64 h_ino, + unsigned int d_type) +{ + struct fillvdir_arg *arg = __arg; + char *name = (void *)__name; + struct super_block *sb; + ino_t ino; + const unsigned char shwh = !!au_ftest_fillvdir(arg->flags, SHWH); + + arg->err = 0; + sb = arg->file->f_dentry->d_sb; + au_fset_fillvdir(arg->flags, CALLED); + /* smp_mb(); */ + if (nlen <= AUFS_WH_PFX_LEN + || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { + if (test_known(&arg->delist, name, nlen) + || au_nhash_test_known_wh(&arg->whlist, name, nlen)) + goto out; /* already exists or whiteouted */ + + sb = arg->file->f_dentry->d_sb; + arg->err = au_ino(sb, arg->bindex, h_ino, d_type, &ino); + if (!arg->err) + arg->err = append_de(arg->vdir, name, nlen, ino, + d_type, &arg->delist); + } else if (au_ftest_fillvdir(arg->flags, WHABLE)) { + name += AUFS_WH_PFX_LEN; + nlen -= AUFS_WH_PFX_LEN; + if (au_nhash_test_known_wh(&arg->whlist, name, nlen)) + goto out; /* already whiteouted */ + + if (shwh) + arg->err = au_wh_ino(sb, arg->bindex, h_ino, d_type, + &ino); + if (!arg->err) + arg->err = au_nhash_append_wh + (&arg->whlist, name, nlen, ino, d_type, + arg->bindex, shwh); + } + + out: + if (!arg->err) + arg->vdir->vd_jiffy = jiffies; + /* smp_mb(); */ + AuTraceErr(arg->err); + return arg->err; +} + +static int au_handle_shwh(struct super_block *sb, struct au_vdir *vdir, + struct au_nhash *whlist, struct au_nhash *delist) +{ +#ifdef CONFIG_AUFS_SHWH + int err; + unsigned int nh, u; + struct hlist_head *head; + struct au_vdir_wh *tpos; + struct hlist_node *pos, *n; + char *p, *o; + struct au_vdir_destr *destr; + + AuDebugOn(!au_opt_test(au_mntflags(sb), SHWH)); + + err = -ENOMEM; + o = p = __getname(); + if (unlikely(!p)) + goto out; + + err = 0; + nh = whlist->nh_num; + memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); + p += AUFS_WH_PFX_LEN; + for (u = 0; u < nh; u++) { + head = whlist->nh_head + u; + hlist_for_each_entry_safe(tpos, pos, n, head, wh_hash) { + destr = &tpos->wh_str; + memcpy(p, destr->name, destr->len); + err = append_de(vdir, o, destr->len + AUFS_WH_PFX_LEN, + tpos->wh_ino, tpos->wh_type, delist); + if (unlikely(err)) + break; + } + } + + __putname(o); + + out: + AuTraceErr(err); + return err; +#else + return 0; +#endif +} + +static int au_do_read_vdir(struct fillvdir_arg *arg) +{ + int err; + unsigned int rdhash; + loff_t offset; + aufs_bindex_t bend, bindex, bstart; + unsigned char shwh; + struct file *hf, *file; + struct super_block *sb; + + file = arg->file; + sb = file->f_dentry->d_sb; + SiMustAnyLock(sb); + + rdhash = au_sbi(sb)->si_rdhash; + err = au_nhash_alloc(&arg->delist, rdhash, GFP_NOFS); + if (unlikely(err)) + goto out; + err = au_nhash_alloc(&arg->whlist, rdhash, GFP_NOFS); + if (unlikely(err)) + goto out_delist; + + err = 0; + arg->flags = 0; + shwh = 0; + if (au_opt_test(au_mntflags(sb), SHWH)) { + shwh = 1; + au_fset_fillvdir(arg->flags, SHWH); + } + bstart = au_fbstart(file); + bend = au_fbend(file); + for (bindex = bstart; !err && bindex <= bend; bindex++) { + hf = au_h_fptr(file, bindex); + if (!hf) + continue; + + offset = vfsub_llseek(hf, 0, SEEK_SET); + err = offset; + if (unlikely(offset)) + break; + + arg->bindex = bindex; + au_fclr_fillvdir(arg->flags, WHABLE); + if (shwh + || (bindex != bend + && au_br_whable(au_sbr_perm(sb, bindex)))) + au_fset_fillvdir(arg->flags, WHABLE); + do { + arg->err = 0; + au_fclr_fillvdir(arg->flags, CALLED); + /* smp_mb(); */ + err = vfsub_readdir(hf, fillvdir, arg); + if (err >= 0) + err = arg->err; + } while (!err && au_ftest_fillvdir(arg->flags, CALLED)); + } + + if (!err && shwh) + err = au_handle_shwh(sb, arg->vdir, &arg->whlist, &arg->delist); + + au_nhash_wh_free(&arg->whlist); + + out_delist: + au_nhash_de_free(&arg->delist); + out: + return err; +} + +static int read_vdir(struct file *file, int may_read) +{ + int err; + unsigned long expire; + unsigned char do_read; + struct fillvdir_arg arg; + struct inode *inode; + struct au_vdir *vdir, *allocated; + + err = 0; + inode = file->f_dentry->d_inode; + IMustLock(inode); + SiMustAnyLock(inode->i_sb); + + allocated = NULL; + do_read = 0; + expire = au_sbi(inode->i_sb)->si_rdcache; + vdir = au_ivdir(inode); + if (!vdir) { + do_read = 1; + vdir = alloc_vdir(inode->i_sb); + err = PTR_ERR(vdir); + if (IS_ERR(vdir)) + goto out; + err = 0; + allocated = vdir; + } else if (may_read + && (inode->i_version != vdir->vd_version + || time_after(jiffies, vdir->vd_jiffy + expire))) { + do_read = 1; + err = reinit_vdir(vdir); + if (unlikely(err)) + goto out; + } + + if (!do_read) + return 0; /* success */ + + arg.file = file; + arg.vdir = vdir; + err = au_do_read_vdir(&arg); + if (!err) { + /* file->f_pos = 0; */ + vdir->vd_version = inode->i_version; + vdir->vd_last.ul = 0; + vdir->vd_last.p.deblk = vdir->vd_deblk[0]; + if (allocated) + au_set_ivdir(inode, allocated); + } else if (allocated) + au_vdir_free(allocated); + + out: + return err; +} + +static int copy_vdir(struct au_vdir *tgt, struct au_vdir *src) +{ + int err, rerr; + unsigned long ul, n; + const unsigned int deblk_sz = src->vd_deblk_sz; + + AuDebugOn(tgt->vd_nblk != 1); + + err = -ENOMEM; + if (tgt->vd_nblk < src->vd_nblk) { + unsigned char **p; + + p = krealloc(tgt->vd_deblk, sizeof(*p) * src->vd_nblk, + GFP_NOFS); + if (unlikely(!p)) + goto out; + tgt->vd_deblk = p; + } + + tgt->vd_nblk = src->vd_nblk; + tgt->vd_deblk_sz = deblk_sz; + memcpy(tgt->vd_deblk[0], src->vd_deblk[0], deblk_sz); + /* tgt->vd_last.i = 0; */ + /* tgt->vd_last.p.deblk = tgt->vd_deblk[0]; */ + tgt->vd_version = src->vd_version; + tgt->vd_jiffy = src->vd_jiffy; + + n = src->vd_nblk; + for (ul = 1; ul < n; ul++) { + tgt->vd_deblk[ul] = kmemdup(src->vd_deblk[ul], deblk_sz, + GFP_NOFS); + if (unlikely(!tgt->vd_deblk[ul])) + goto out; + } + /* smp_mb(); */ + return 0; /* success */ + + out: + rerr = reinit_vdir(tgt); + BUG_ON(rerr); + return err; +} + +int au_vdir_init(struct file *file) +{ + int err; + struct inode *inode; + struct au_vdir *vdir_cache, *allocated; + + err = read_vdir(file, !file->f_pos); + if (unlikely(err)) + goto out; + + allocated = NULL; + vdir_cache = au_fvdir_cache(file); + if (!vdir_cache) { + vdir_cache = alloc_vdir(file->f_dentry->d_sb); + err = PTR_ERR(vdir_cache); + if (IS_ERR(vdir_cache)) + goto out; + allocated = vdir_cache; + } else if (!file->f_pos && vdir_cache->vd_version != file->f_version) { + err = reinit_vdir(vdir_cache); + if (unlikely(err)) + goto out; + } else + return 0; /* success */ + + inode = file->f_dentry->d_inode; + err = copy_vdir(vdir_cache, au_ivdir(inode)); + if (!err) { + file->f_version = inode->i_version; + if (allocated) + au_set_fvdir_cache(file, allocated); + } else if (allocated) + au_vdir_free(allocated); + + out: + return err; +} + +static loff_t calc_offset(struct au_vdir *vdir) +{ + loff_t offset; + union au_vdir_deblk_p p; + + p.deblk = vdir->vd_deblk[vdir->vd_last.ul]; + offset = vdir->vd_last.p.deblk - p.deblk; + offset += vdir->vd_deblk_sz * vdir->vd_last.ul; + return offset; +} + +/* returns true or false */ +static int seek_vdir(struct file *file) +{ + int valid; + unsigned int deblk_sz; + unsigned long ul, n; + loff_t offset; + union au_vdir_deblk_p p, deblk_end; + struct au_vdir *vdir_cache; + + valid = 1; + vdir_cache = au_fvdir_cache(file); + offset = calc_offset(vdir_cache); + AuDbg("offset %lld\n", offset); + if (file->f_pos == offset) + goto out; + + vdir_cache->vd_last.ul = 0; + vdir_cache->vd_last.p.deblk = vdir_cache->vd_deblk[0]; + if (!file->f_pos) + goto out; + + valid = 0; + deblk_sz = vdir_cache->vd_deblk_sz; + ul = div64_u64(file->f_pos, deblk_sz); + AuDbg("ul %lu\n", ul); + if (ul >= vdir_cache->vd_nblk) + goto out; + + n = vdir_cache->vd_nblk; + for (; ul < n; ul++) { + p.deblk = vdir_cache->vd_deblk[ul]; + deblk_end.deblk = p.deblk + deblk_sz; + offset = ul; + offset *= deblk_sz; + while (!is_deblk_end(&p, &deblk_end) && offset < file->f_pos) { + unsigned int l; + + l = calc_size(p.de->de_str.len); + offset += l; + p.deblk += l; + } + if (!is_deblk_end(&p, &deblk_end)) { + valid = 1; + vdir_cache->vd_last.ul = ul; + vdir_cache->vd_last.p = p; + break; + } + } + + out: + /* smp_mb(); */ + AuTraceErr(!valid); + return valid; +} + +int au_vdir_fill_de(struct file *file, void *dirent, filldir_t filldir) +{ + int err; + unsigned int l, deblk_sz; + union au_vdir_deblk_p deblk_end; + struct au_vdir *vdir_cache; + struct au_vdir_de *de; + + vdir_cache = au_fvdir_cache(file); + if (!seek_vdir(file)) + return 0; + + deblk_sz = vdir_cache->vd_deblk_sz; + while (1) { + deblk_end.deblk = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; + deblk_end.deblk += deblk_sz; + while (!is_deblk_end(&vdir_cache->vd_last.p, &deblk_end)) { + de = vdir_cache->vd_last.p.de; + AuDbg("%.*s, off%lld, i%lu, dt%d\n", + de->de_str.len, de->de_str.name, file->f_pos, + (unsigned long)de->de_ino, de->de_type); + err = filldir(dirent, de->de_str.name, de->de_str.len, + file->f_pos, de->de_ino, de->de_type); + if (unlikely(err)) { + AuTraceErr(err); + /* todo: ignore the error caused by udba? */ + /* return err; */ + return 0; + } + + l = calc_size(de->de_str.len); + vdir_cache->vd_last.p.deblk += l; + file->f_pos += l; + } + if (vdir_cache->vd_last.ul < vdir_cache->vd_nblk - 1) { + vdir_cache->vd_last.ul++; + vdir_cache->vd_last.p.deblk + = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; + file->f_pos = deblk_sz * vdir_cache->vd_last.ul; + continue; + } + break; + } + + /* smp_mb(); */ + return 0; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/aufs/opts.c +++ linux-fsl-imx51-2.6.31/ubuntu/aufs/opts.c @@ -0,0 +1,1543 @@ +/* + * Copyright (C) 2005-2009 Junjiro R. Okajima + * + * This program, aufs is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * mount options/flags + */ + +#include +#include +#include /* a distribution requires */ +#include +#include "aufs.h" + +/* ---------------------------------------------------------------------- */ + +enum { + Opt_br, + Opt_add, Opt_del, Opt_mod, Opt_reorder, Opt_append, Opt_prepend, + Opt_idel, Opt_imod, Opt_ireorder, + Opt_dirwh, Opt_rdcache, Opt_rdblk, Opt_rdhash, Opt_rendir, + Opt_rdblk_def, Opt_rdhash_def, + Opt_xino, Opt_zxino, Opt_noxino, + Opt_trunc_xino, Opt_trunc_xino_v, Opt_notrunc_xino, + Opt_trunc_xino_path, Opt_itrunc_xino, + Opt_trunc_xib, Opt_notrunc_xib, + Opt_shwh, Opt_noshwh, + Opt_plink, Opt_noplink, Opt_list_plink, + Opt_udba, + /* Opt_lock, Opt_unlock, */ + Opt_cmd, Opt_cmd_args, + Opt_diropq_a, Opt_diropq_w, + Opt_warn_perm, Opt_nowarn_perm, + Opt_wbr_copyup, Opt_wbr_create, + Opt_refrof, Opt_norefrof, + Opt_verbose, Opt_noverbose, + Opt_sum, Opt_nosum, Opt_wsum, + Opt_tail, Opt_ignore, Opt_ignore_silent, Opt_err +}; + +static match_table_t options = { + {Opt_br, "br=%s"}, + {Opt_br, "br:%s"}, + + {Opt_add, "add=%d:%s"}, + {Opt_add, "add:%d:%s"}, + {Opt_add, "ins=%d:%s"}, + {Opt_add, "ins:%d:%s"}, + {Opt_append, "append=%s"}, + {Opt_append, "append:%s"}, + {Opt_prepend, "prepend=%s"}, + {Opt_prepend, "prepend:%s"}, + + {Opt_del, "del=%s"}, + {Opt_del, "del:%s"}, + /* {Opt_idel, "idel:%d"}, */ + {Opt_mod, "mod=%s"}, + {Opt_mod, "mod:%s"}, + /* {Opt_imod, "imod:%d:%s"}, */ + + {Opt_dirwh, "dirwh=%d"}, + + {Opt_xino, "xino=%s"}, + {Opt_noxino, "noxino"}, + {Opt_trunc_xino, "trunc_xino"}, + {Opt_trunc_xino_v, "trunc_xino_v=%d:%d"}, + {Opt_notrunc_xino, "notrunc_xino"}, + {Opt_trunc_xino_path, "trunc_xino=%s"}, + {Opt_itrunc_xino, "itrunc_xino=%d"}, + /* {Opt_zxino, "zxino=%s"}, */ + {Opt_trunc_xib, "trunc_xib"}, + {Opt_notrunc_xib, "notrunc_xib"}, + + {Opt_plink, "plink"}, + {Opt_noplink, "noplink"}, +#ifdef CONFIG_AUFS_DEBUG + {Opt_list_plink, "list_plink"}, +#endif + + {Opt_udba, "udba=%s"}, + + {Opt_diropq_a, "diropq=always"}, + {Opt_diropq_a, "diropq=a"}, + {Opt_diropq_w, "diropq=whiteouted"}, + {Opt_diropq_w, "diropq=w"}, + + {Opt_warn_perm, "warn_perm"}, + {Opt_nowarn_perm, "nowarn_perm"}, + + /* keep them temporary */ + {Opt_ignore_silent, "coo=%s"}, + {Opt_ignore_silent, "nodlgt"}, + {Opt_ignore_silent, "nodirperm1"}, + {Opt_ignore_silent, "clean_plink"}, + +#ifdef CONFIG_AUFS_SHWH + {Opt_shwh, "shwh"}, +#endif + {Opt_noshwh, "noshwh"}, + + {Opt_rendir, "rendir=%d"}, + + {Opt_refrof, "refrof"}, + {Opt_norefrof, "norefrof"}, + + {Opt_verbose, "verbose"}, + {Opt_verbose, "v"}, + {Opt_noverbose, "noverbose"}, + {Opt_noverbose, "quiet"}, + {Opt_noverbose, "q"}, + {Opt_noverbose, "silent"}, + + {Opt_sum, "sum"}, + {Opt_nosum, "nosum"}, + {Opt_wsum, "wsum"}, + + {Opt_rdcache, "rdcache=%d"}, + {Opt_rdblk, "rdblk=%d"}, + {Opt_rdblk_def, "rdblk=def"}, + {Opt_rdhash, "rdhash=%d"}, + {Opt_rdhash_def, "rdhash=def"}, + + {Opt_wbr_create, "create=%s"}, + {Opt_wbr_create, "create_policy=%s"}, + {Opt_wbr_copyup, "cpup=%s"}, + {Opt_wbr_copyup, "copyup=%s"}, + {Opt_wbr_copyup, "copyup_policy=%s"}, + + /* internal use for the scripts */ + {Opt_ignore_silent, "si=%s"}, + + {Opt_br, "dirs=%s"}, + {Opt_ignore, "debug=%d"}, + {Opt_ignore, "delete=whiteout"}, + {Opt_ignore, "delete=all"}, + {Opt_ignore, "imap=%s"}, + + {Opt_err, NULL} +}; + +/* ---------------------------------------------------------------------- */ + +static const char *au_parser_pattern(int val, struct match_token *token) +{ + while (token->pattern) { + if (token->token == val) + return token->pattern; + token++; + } + BUG(); + return "??"; +} + +/* ---------------------------------------------------------------------- */ + +static match_table_t brperms = { + {AuBrPerm_RO, AUFS_BRPERM_RO}, + {AuBrPerm_RR, AUFS_BRPERM_RR}, + {AuBrPerm_RW, AUFS_BRPERM_RW}, + + {AuBrPerm_ROWH, AUFS_BRPERM_ROWH}, + {AuBrPerm_RRWH, AUFS_BRPERM_RRWH}, + {AuBrPerm_RWNoLinkWH, AUFS_BRPERM_RWNLWH}, + + {AuBrPerm_ROWH, "nfsro"}, + {AuBrPerm_RO, NULL} +}; + +static int br_perm_val(char *perm) +{ + int val; + substring_t args[MAX_OPT_ARGS]; + + val = match_token(perm, brperms, args); + return val; +} + +const char *au_optstr_br_perm(int brperm) +{ + return au_parser_pattern(brperm, (void *)brperms); +} + +/* ---------------------------------------------------------------------- */ + +static match_table_t udbalevel = { + {AuOpt_UDBA_REVAL, "reval"}, + {AuOpt_UDBA_NONE, "none"}, +#ifdef CONFIG_AUFS_HINOTIFY + {AuOpt_UDBA_HINOTIFY, "inotify"}, +#endif + {-1, NULL} +}; + +static int udba_val(char *str) +{ + substring_t args[MAX_OPT_ARGS]; + + return match_token(str, udbalevel, args); +} + +const char *au_optstr_udba(int udba) +{ + return au_parser_pattern(udba, (void *)udbalevel); +} + +/* ---------------------------------------------------------------------- */ + +static match_table_t au_wbr_create_policy = { + {AuWbrCreate_TDP, "tdp"}, + {AuWbrCreate_TDP, "top-down-parent"}, + {AuWbrCreate_RR, "rr"}, + {AuWbrCreate_RR, "round-robin"}, + {AuWbrCreate_MFS, "mfs"}, + {AuWbrCreate_MFS, "most-free-space"}, + {AuWbrCreate_MFSV, "mfs:%d"}, + {AuWbrCreate_MFSV, "most-free-space:%d"}, + + {AuWbrCreate_MFSRR, "mfsrr:%d"}, + {AuWbrCreate_MFSRRV, "mfsrr:%d:%d"}, + {AuWbrCreate_PMFS, "pmfs"}, + {AuWbrCreate_PMFSV, "pmfs:%d"}, + + {-1, NULL} +}; + +/* + * cf. linux/lib/parser.c and cmdline.c + * gave up calling memparse() since it uses simple_strtoull() instead of + * strict_...(). + */ +static int au_match_ull(substring_t *s, unsigned long long *result) +{ + int err; + unsigned int len; + char a[32]; + + err = -ERANGE; + len = s->to - s->from; + if (len + 1 <= sizeof(a)) { + memcpy(a, s->from, len); + a[len] = '\0'; + err = strict_strtoull(a, 0, result); + } + return err; +} + +static int au_wbr_mfs_wmark(substring_t *arg, char *str, + struct au_opt_wbr_create *create) +{ + int err; + unsigned long long ull; + + err = 0; + if (!au_match_ull(arg, &ull)) + create->mfsrr_watermark = ull; + else { + AuErr("bad integer in %s\n", str); + err = -EINVAL; + } + + return err; +} + +static int au_wbr_mfs_sec(substring_t *arg, char *str, + struct au_opt_wbr_create *create) +{ + int n, err; + + err = 0; + if (!match_int(arg, &n) && 0 <= n) + create->mfs_second = n; + else { + AuErr("bad integer in %s\n", str); + err = -EINVAL; + } + + return err; +} + +static int au_wbr_create_val(char *str, struct au_opt_wbr_create *create) +{ + int err, e; + substring_t args[MAX_OPT_ARGS]; + + err = match_token(str, au_wbr_create_policy, args); + create->wbr_create = err; + switch (err) { + case AuWbrCreate_MFSRRV: + e = au_wbr_mfs_wmark(&args[0], str, create); + if (!e) + e = au_wbr_mfs_sec(&args[1], str, create); + if (unlikely(e)) + err = e; + break; + case AuWbrCreate_MFSRR: + e = au_wbr_mfs_wmark(&args[0], str, create); + if (unlikely(e)) { + err = e; + break; + } + /*FALLTHROUGH*/ + case AuWbrCreate_MFS: + case AuWbrCreate_PMFS: + create->mfs_second = AUFS_MFS_SECOND_DEF; + break; + case AuWbrCreate_MFSV: + case AuWbrCreate_PMFSV: + e = au_wbr_mfs_sec(&args[0], str, create); + if (unlikely(e)) + err = e; + break; + } + + return err; +} + +const char *au_optstr_wbr_create(int wbr_create) +{ + return au_parser_pattern(wbr_create, (void *)au_wbr_create_policy); +} + +static match_table_t au_wbr_copyup_policy = { + {AuWbrCopyup_TDP, "tdp"}, + {AuWbrCopyup_TDP, "top-down-parent"}, + {AuWbrCopyup_BUP, "bup"}, + {AuWbrCopyup_BUP, "bottom-up-parent"}, + {AuWbrCopyup_BU, "bu"}, + {AuWbrCopyup_BU, "bottom-up"}, + {-1, NULL} +}; + +static int au_wbr_copyup_val(char *str) +{ + substring_t args[MAX_OPT_ARGS]; + + return match_token(str, au_wbr_copyup_policy, args); +} + +const char *au_optstr_wbr_copyup(int wbr_copyup) +{ + return au_parser_pattern(wbr_copyup, (void *)au_wbr_copyup_policy); +} + +/* ---------------------------------------------------------------------- */ + +static const int lkup_dirflags = LOOKUP_FOLLOW | LOOKUP_DIRECTORY; + +static void dump_opts(struct au_opts *opts) +{ +#ifdef CONFIG_AUFS_DEBUG + /* reduce stack space */ + union { + struct au_opt_add *add; + struct au_opt_del *del; + struct au_opt_mod *mod; + struct au_opt_xino *xino; + struct au_opt_xino_itrunc *xino_itrunc; + struct au_opt_wbr_create *create; + } u; + struct au_opt *opt; + + opt = opts->opt; + while (opt->type != Opt_tail) { + switch (opt->type) { + case Opt_add: + u.add = &opt->add; + AuDbg("add {b%d, %s, 0x%x, %p}\n", + u.add->bindex, u.add->pathname, u.add->perm, + u.add->path.dentry); + break; + case Opt_del: + case Opt_idel: + u.del = &opt->del; + AuDbg("del {%s, %p}\n", + u.del->pathname, u.del->h_path.dentry); + break; + case Opt_mod: + case Opt_imod: + u.mod = &opt->mod; + AuDbg("mod {%s, 0x%x, %p}\n", + u.mod->path, u.mod->perm, u.mod->h_root); + break; + case Opt_append: + u.add = &opt->add; + AuDbg("append {b%d, %s, 0x%x, %p}\n", + u.add->bindex, u.add->pathname, u.add->perm, + u.add->path.dentry); + break; + case Opt_prepend: + u.add = &opt->add; + AuDbg("prepend {b%d, %s, 0x%x, %p}\n", + u.add->bindex, u.add->pathname, u.add->perm, + u.add->path.dentry); + break; + case Opt_dirwh: + AuDbg("dirwh %d\n", opt->dirwh); + break; + case Opt_rdcache: + AuDbg("rdcache %d\n", opt->rdcache); + break; + case Opt_rdblk: + AuDbg("rdblk %u\n", opt->rdblk); + break; + case Opt_rdblk_def: + AuDbg("rdblk_def\n"); + break; + case Opt_rdhash: + AuDbg("rdhash %u\n", opt->rdhash); + break; + case Opt_rdhash_def: + AuDbg("rdhash_def\n"); + break; + case Opt_xino: + u.xino = &opt->xino; + AuDbg("xino {%s %.*s}\n", + u.xino->path, + AuDLNPair(u.xino->file->f_dentry)); + break; + case Opt_trunc_xino: + AuLabel(trunc_xino); + break; + case Opt_notrunc_xino: + AuLabel(notrunc_xino); + break; + case Opt_trunc_xino_path: + case Opt_itrunc_xino: + u.xino_itrunc = &opt->xino_itrunc; + AuDbg("trunc_xino %d\n", u.xino_itrunc->bindex); + break; + + case Opt_noxino: + AuLabel(noxino); + break; + case Opt_trunc_xib: + AuLabel(trunc_xib); + break; + case Opt_notrunc_xib: + AuLabel(notrunc_xib); + break; + case Opt_shwh: + AuLabel(shwh); + break; + case Opt_noshwh: + AuLabel(noshwh); + break; + case Opt_plink: + AuLabel(plink); + break; + case Opt_noplink: + AuLabel(noplink); + break; + case Opt_list_plink: + AuLabel(list_plink); + break; + case Opt_udba: + AuDbg("udba %d, %s\n", + opt->udba, au_optstr_udba(opt->udba)); + break; + case Opt_diropq_a: + AuLabel(diropq_a); + break; + case Opt_diropq_w: + AuLabel(diropq_w); + break; + case Opt_warn_perm: + AuLabel(warn_perm); + break; + case Opt_nowarn_perm: + AuLabel(nowarn_perm); + break; + case Opt_refrof: + AuLabel(refrof); + break; + case Opt_norefrof: + AuLabel(norefrof); + break; + case Opt_verbose: + AuLabel(verbose); + break; + case Opt_noverbose: + AuLabel(noverbose); + break; + case Opt_sum: + AuLabel(sum); + break; + case Opt_nosum: + AuLabel(nosum); + break; + case Opt_wsum: + AuLabel(wsum); + break; + case Opt_wbr_create: + u.create = &opt->wbr_create; + AuDbg("create %d, %s\n", u.create->wbr_create, + au_optstr_wbr_create(u.create->wbr_create)); + switch (u.create->wbr_create) { + case AuWbrCreate_MFSV: + case AuWbrCreate_PMFSV: + AuDbg("%d sec\n", u.create->mfs_second); + break; + case AuWbrCreate_MFSRR: + AuDbg("%llu watermark\n", + u.create->mfsrr_watermark); + break; + case AuWbrCreate_MFSRRV: + AuDbg("%llu watermark, %d sec\n", + u.create->mfsrr_watermark, + u.create->mfs_second); + break; + } + break; + case Opt_wbr_copyup: + AuDbg("copyup %d, %s\n", opt->wbr_copyup, + au_optstr_wbr_copyup(opt->wbr_copyup)); + break; + default: + BUG(); + } + opt++; + } +#endif +} + +void au_opts_free(struct au_opts *opts) +{ + struct au_opt *opt; + + opt = opts->opt; + while (opt->type != Opt_tail) { + switch (opt->type) { + case Opt_add: + case Opt_append: + case Opt_prepend: + path_put(&opt->add.path); + break; + case Opt_del: + case Opt_idel: + path_put(&opt->del.h_path); + break; + case Opt_mod: + case Opt_imod: + dput(opt->mod.h_root); + break; + case Opt_xino: + fput(opt->xino.file); + break; + } + opt++; + } +} + +static int opt_add(struct au_opt *opt, char *opt_str, unsigned long sb_flags, + aufs_bindex_t bindex) +{ + int err; + struct au_opt_add *add = &opt->add; + char *p; + + add->bindex = bindex; + add->perm = AuBrPerm_Last; + add->pathname = opt_str; + p = strchr(opt_str, '='); + if (p) { + *p++ = 0; + if (*p) + add->perm = br_perm_val(p); + } + + err = vfsub_kern_path(add->pathname, lkup_dirflags, &add->path); + if (!err) { + if (!p) { + add->perm = AuBrPerm_RO; + if (au_test_fs_rr(add->path.dentry->d_sb)) + add->perm = AuBrPerm_RR; + else if (!bindex && !(sb_flags & MS_RDONLY)) + add->perm = AuBrPerm_RW; + } + opt->type = Opt_add; + goto out; + } + AuErr("lookup failed %s (%d)\n", add->pathname, err); + err = -EINVAL; + + out: + return err; +} + +static int au_opts_parse_del(struct au_opt_del *del, substring_t args[]) +{ + int err; + + del->pathname = args[0].from; + AuDbg("del path %s\n", del->pathname); + + err = vfsub_kern_path(del->pathname, lkup_dirflags, &del->h_path); + if (unlikely(err)) + AuErr("lookup failed %s (%d)\n", del->pathname, err); + + return err; +} + +#if 0 /* reserved for future use */ +static int au_opts_parse_idel(struct super_block *sb, aufs_bindex_t bindex, + struct au_opt_del *del, substring_t args[]) +{ + int err; + struct dentry *root; + + err = -EINVAL; + root = sb->s_root; + aufs_read_lock(root, AuLock_FLUSH); + if (bindex < 0 || au_sbend(sb) < bindex) { + AuErr("out of bounds, %d\n", bindex); + goto out; + } + + err = 0; + del->h_path.dentry = dget(au_h_dptr(root, bindex)); + del->h_path.mnt = mntget(au_sbr_mnt(sb, bindex)); + + out: + aufs_read_unlock(root, !AuLock_IR); + return err; +} +#endif + +static int au_opts_parse_mod(struct au_opt_mod *mod, substring_t args[]) +{ + int err; + struct path path; + char *p; + + err = -EINVAL; + mod->path = args[0].from; + p = strchr(mod->path, '='); + if (unlikely(!p)) { + AuErr("no permssion %s\n", args[0].from); + goto out; + } + + *p++ = 0; + err = vfsub_kern_path(mod->path, lkup_dirflags, &path); + if (unlikely(err)) { + AuErr("lookup failed %s (%d)\n", mod->path, err); + goto out; + } + + mod->perm = br_perm_val(p); + AuDbg("mod path %s, perm 0x%x, %s\n", mod->path, mod->perm, p); + mod->h_root = dget(path.dentry); + path_put(&path); + + out: + return err; +} + +#if 0 /* reserved for future use */ +static int au_opts_parse_imod(struct super_block *sb, aufs_bindex_t bindex, + struct au_opt_mod *mod, substring_t args[]) +{ + int err; + struct dentry *root; + + err = -EINVAL; + root = sb->s_root; + aufs_read_lock(root, AuLock_FLUSH); + if (bindex < 0 || au_sbend(sb) < bindex) { + AuErr("out of bounds, %d\n", bindex); + goto out; + } + + err = 0; + mod->perm = br_perm_val(args[1].from); + AuDbg("mod path %s, perm 0x%x, %s\n", + mod->path, mod->perm, args[1].from); + mod->h_root = dget(au_h_dptr(root, bindex)); + + out: + aufs_read_unlock(root, !AuLock_IR); + return err; +} +#endif + +static int au_opts_parse_xino(struct super_block *sb, struct au_opt_xino *xino, + substring_t args[]) +{ + int err; + struct file *file; + + file = au_xino_create(sb, args[0].from, /*silent*/0); + err = PTR_ERR(file); + if (IS_ERR(file)) + goto out; + + err = -EINVAL; + if (unlikely(file->f_dentry->d_sb == sb)) { + fput(file); + AuErr("%s must be outside\n", args[0].from); + goto out; + } + + err = 0; + xino->file = file; + xino->path = args[0].from; + + out: + return err; +} + +static +int au_opts_parse_xino_itrunc_path(struct super_block *sb, + struct au_opt_xino_itrunc *xino_itrunc, + substring_t args[]) +{ + int err; + aufs_bindex_t bend, bindex; + struct path path; + struct dentry *root; + + err = vfsub_kern_path(args[0].from, lkup_dirflags, &path); + if (unlikely(err)) { + AuErr("lookup failed %s (%d)\n", args[0].from, err); + goto out; + } + + xino_itrunc->bindex = -1; + root = sb->s_root; + aufs_read_lock(root, AuLock_FLUSH); + bend = au_sbend(sb); + for (bindex = 0; bindex <= bend; bindex++) { + if (au_h_dptr(root, bindex) == path.dentry) { + xino_itrunc->bindex = bindex; + break; + } + } + aufs_read_unlock(root, !AuLock_IR); + path_put(&path); + + if (unlikely(xino_itrunc->bindex < 0)) { + AuErr("no such branch %s\n", args[0].from); + err = -EINVAL; + } + + out: + return err; +} + +/* called without aufs lock */ +int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts) +{ + int err, n, token; + aufs_bindex_t bindex; + unsigned char skipped; + struct dentry *root; + struct au_opt *opt, *opt_tail; + char *opt_str; + /* reduce the stack space */ + union { + struct au_opt_xino_itrunc *xino_itrunc; + struct au_opt_wbr_create *create; + } u; + struct { + substring_t args[MAX_OPT_ARGS]; + } *a; + + err = -ENOMEM; + a = kmalloc(sizeof(*a), GFP_NOFS); + if (unlikely(!a)) + goto out; + + root = sb->s_root; + err = 0; + bindex = 0; + opt = opts->opt; + opt_tail = opt + opts->max_opt - 1; + opt->type = Opt_tail; + while (!err && (opt_str = strsep(&str, ",")) && *opt_str) { + err = -EINVAL; + skipped = 0; + token = match_token(opt_str, options, a->args); + switch (token) { + case Opt_br: + err = 0; + while (!err && (opt_str = strsep(&a->args[0].from, ":")) + && *opt_str) { + err = opt_add(opt, opt_str, opts->sb_flags, + bindex++); + if (unlikely(!err && ++opt > opt_tail)) { + err = -E2BIG; + break; + } + opt->type = Opt_tail; + skipped = 1; + } + break; + case Opt_add: + if (unlikely(match_int(&a->args[0], &n))) { + AuErr("bad integer in %s\n", opt_str); + break; + } + bindex = n; + err = opt_add(opt, a->args[1].from, opts->sb_flags, + bindex); + if (!err) + opt->type = token; + break; + case Opt_append: + err = opt_add(opt, a->args[0].from, opts->sb_flags, + /*dummy bindex*/1); + if (!err) + opt->type = token; + break; + case Opt_prepend: + err = opt_add(opt, a->args[0].from, opts->sb_flags, + /*bindex*/0); + if (!err) + opt->type = token; + break; + case Opt_del: + err = au_opts_parse_del(&opt->del, a->args); + if (!err) + opt->type = token; + break; +#if 0 /* reserved for future use */ + case Opt_idel: + del->pathname = "(indexed)"; + if (unlikely(match_int(&args[0], &n))) { + AuErr("bad integer in %s\n", opt_str); + break; + } + err = au_opts_parse_idel(sb, n, &opt->del, a->args); + if (!err) + opt->type = token; + break; +#endif + case Opt_mod: + err = au_opts_parse_mod(&opt->mod, a->args); + if (!err) + opt->type = token; + break; +#ifdef IMOD /* reserved for future use */ + case Opt_imod: + u.mod->path = "(indexed)"; + if (unlikely(match_int(&a->args[0], &n))) { + AuErr("bad integer in %s\n", opt_str); + break; + } + err = au_opts_parse_imod(sb, n, &opt->mod, a->args); + if (!err) + opt->type = token; + break; +#endif + case Opt_xino: + err = au_opts_parse_xino(sb, &opt->xino, a->args); + if (!err) + opt->type = token; + break; + + case Opt_trunc_xino_path: + err = au_opts_parse_xino_itrunc_path + (sb, &opt->xino_itrunc, a->args); + if (!err) + opt->type = token; + break; + + case Opt_itrunc_xino: + u.xino_itrunc = &opt->xino_itrunc; + if (unlikely(match_int(&a->args[0], &n))) { + AuErr("bad integer in %s\n", opt_str); + break; + } + u.xino_itrunc->bindex = n; + aufs_read_lock(root, AuLock_FLUSH); + if (n < 0 || au_sbend(sb) < n) { + AuErr("out of bounds, %d\n", n); + aufs_read_unlock(root, !AuLock_IR); + break; + } + aufs_read_unlock(root, !AuLock_IR); + err = 0; + opt->type = token; + break; + + case Opt_dirwh: + if (unlikely(match_int(&a->args[0], &opt->dirwh))) + break; + err = 0; + opt->type = token; + break; + + case Opt_rdcache: + if (unlikely(match_int(&a->args[0], &opt->rdcache))) + break; + err = 0; + opt->type = token; + break; + case Opt_rdblk: + if (unlikely(match_int(&a->args[0], &n) + || n <= 0 + || n > KMALLOC_MAX_SIZE)) { + AuErr("bad integer in %s\n", opt_str); + break; + } + if (unlikely(n < NAME_MAX)) { + AuErr("rdblk must be larger than %d\n", + NAME_MAX); + break; + } + opt->rdblk = n; + err = 0; + opt->type = token; + break; + case Opt_rdhash: + if (unlikely(match_int(&a->args[0], &n) + || n <= 0 + || n * sizeof(struct hlist_head) + > KMALLOC_MAX_SIZE)) { + AuErr("bad integer in %s\n", opt_str); + break; + } + opt->rdhash = n; + err = 0; + opt->type = token; + break; + + case Opt_trunc_xino: + case Opt_notrunc_xino: + case Opt_noxino: + case Opt_trunc_xib: + case Opt_notrunc_xib: + case Opt_shwh: + case Opt_noshwh: + case Opt_plink: + case Opt_noplink: + case Opt_list_plink: + case Opt_diropq_a: + case Opt_diropq_w: + case Opt_warn_perm: + case Opt_nowarn_perm: + case Opt_refrof: + case Opt_norefrof: + case Opt_verbose: + case Opt_noverbose: + case Opt_sum: + case Opt_nosum: + case Opt_wsum: + case Opt_rdblk_def: + case Opt_rdhash_def: + err = 0; + opt->type = token; + break; + + case Opt_udba: + opt->udba = udba_val(a->args[0].from); + if (opt->udba >= 0) { + err = 0; + opt->type = token; + } else + AuErr("wrong value, %s\n", opt_str); + break; + + case Opt_wbr_create: + u.create = &opt->wbr_create; + u.create->wbr_create + = au_wbr_create_val(a->args[0].from, u.create); + if (u.create->wbr_create >= 0) { + err = 0; + opt->type = token; + } else + AuErr("wrong value, %s\n", opt_str); + break; + case Opt_wbr_copyup: + opt->wbr_copyup = au_wbr_copyup_val(a->args[0].from); + if (opt->wbr_copyup >= 0) { + err = 0; + opt->type = token; + } else + AuErr("wrong value, %s\n", opt_str); + break; + + case Opt_ignore: + AuWarn("ignored %s\n", opt_str); + /*FALLTHROUGH*/ + case Opt_ignore_silent: + skipped = 1; + err = 0; + break; + case Opt_err: + AuErr("unknown option %s\n", opt_str); + break; + } + + if (!err && !skipped) { + if (unlikely(++opt > opt_tail)) { + err = -E2BIG; + opt--; + opt->type = Opt_tail; + break; + } + opt->type = Opt_tail; + } + } + + kfree(a); + dump_opts(opts); + if (unlikely(err)) + au_opts_free(opts); + + out: + return err; +} + +static int au_opt_wbr_create(struct super_block *sb, + struct au_opt_wbr_create *create) +{ + int err; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + err = 1; /* handled */ + sbinfo = au_sbi(sb); + if (sbinfo->si_wbr_create_ops->fin) { + err = sbinfo->si_wbr_create_ops->fin(sb); + if (!err) + err = 1; + } + + sbinfo->si_wbr_create = create->wbr_create; + sbinfo->si_wbr_create_ops = au_wbr_create_ops + create->wbr_create; + switch (create->wbr_create) { + case AuWbrCreate_MFSRRV: + case AuWbrCreate_MFSRR: + sbinfo->si_wbr_mfs.mfsrr_watermark = create->mfsrr_watermark; + /*FALLTHROUGH*/ + case AuWbrCreate_MFS: + case AuWbrCreate_MFSV: + case AuWbrCreate_PMFS: + case AuWbrCreate_PMFSV: + sbinfo->si_wbr_mfs.mfs_expire = create->mfs_second * HZ; + break; + } + + if (sbinfo->si_wbr_create_ops->init) + sbinfo->si_wbr_create_ops->init(sb); /* ignore */ + + return err; +} + +/* + * returns, + * plus: processed without an error + * zero: unprocessed + */ +static int au_opt_simple(struct super_block *sb, struct au_opt *opt, + struct au_opts *opts) +{ + int err; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + err = 1; /* handled */ + sbinfo = au_sbi(sb); + switch (opt->type) { + case Opt_udba: + sbinfo->si_mntflags &= ~AuOptMask_UDBA; + sbinfo->si_mntflags |= opt->udba; + opts->given_udba |= opt->udba; + break; + + case Opt_plink: + au_opt_set(sbinfo->si_mntflags, PLINK); + break; + case Opt_noplink: + if (au_opt_test(sbinfo->si_mntflags, PLINK)) + au_plink_put(sb); + au_opt_clr(sbinfo->si_mntflags, PLINK); + break; + case Opt_list_plink: + if (au_opt_test(sbinfo->si_mntflags, PLINK)) + au_plink_list(sb); + break; + + case Opt_diropq_a: + au_opt_set(sbinfo->si_mntflags, ALWAYS_DIROPQ); + break; + case Opt_diropq_w: + au_opt_clr(sbinfo->si_mntflags, ALWAYS_DIROPQ); + break; + + case Opt_warn_perm: + au_opt_set(sbinfo->si_mntflags, WARN_PERM); + break; + case Opt_nowarn_perm: + au_opt_clr(sbinfo->si_mntflags, WARN_PERM); + break; + + case Opt_refrof: + au_opt_set(sbinfo->si_mntflags, REFROF); + break; + case Opt_norefrof: + au_opt_clr(sbinfo->si_mntflags, REFROF); + break; + + case Opt_verbose: + au_opt_set(sbinfo->si_mntflags, VERBOSE); + break; + case Opt_noverbose: + au_opt_clr(sbinfo->si_mntflags, VERBOSE); + break; + + case Opt_sum: + au_opt_set(sbinfo->si_mntflags, SUM); + break; + case Opt_wsum: + au_opt_clr(sbinfo->si_mntflags, SUM); + au_opt_set(sbinfo->si_mntflags, SUM_W); + case Opt_nosum: + au_opt_clr(sbinfo->si_mntflags, SUM); + au_opt_clr(sbinfo->si_mntflags, SUM_W); + break; + + case Opt_wbr_create: + err = au_opt_wbr_create(sb, &opt->wbr_create); + break; + case Opt_wbr_copyup: + sbinfo->si_wbr_copyup = opt->wbr_copyup; + sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + opt->wbr_copyup; + break; + + case Opt_dirwh: + sbinfo->si_dirwh = opt->dirwh; + break; + + case Opt_rdcache: + sbinfo->si_rdcache = opt->rdcache * HZ; + break; + case Opt_rdblk: + sbinfo->si_rdblk = opt->rdblk; + break; + case Opt_rdblk_def: + sbinfo->si_rdblk = AUFS_RDBLK_DEF; + break; + case Opt_rdhash: + sbinfo->si_rdhash = opt->rdhash; + break; + case Opt_rdhash_def: + sbinfo->si_rdhash = AUFS_RDHASH_DEF; + break; + + case Opt_shwh: + au_opt_set(sbinfo->si_mntflags, SHWH); + break; + case Opt_noshwh: + au_opt_clr(sbinfo->si_mntflags, SHWH); + break; + + case Opt_trunc_xino: + au_opt_set(sbinfo->si_mntflags, TRUNC_XINO); + break; + case Opt_notrunc_xino: + au_opt_clr(sbinfo->si_mntflags, TRUNC_XINO); + break; + + case Opt_trunc_xino_path: + case Opt_itrunc_xino: + err = au_xino_trunc(sb, opt->xino_itrunc.bindex); + if (!err) + err = 1; + break; + + case Opt_trunc_xib: + au_fset_opts(opts->flags, TRUNC_XIB); + break; + case Opt_notrunc_xib: + au_fclr_opts(opts->flags, TRUNC_XIB); + break; + + default: + err = 0; + break; + } + + return err; +} + +/* + * returns tri-state. + * plus: processed without an error + * zero: unprocessed + * minus: error + */ +static int au_opt_br(struct super_block *sb, struct au_opt *opt, + struct au_opts *opts) +{ + int err, do_refresh; + + err = 0; + switch (opt->type) { + case Opt_append: + opt->add.bindex = au_sbend(sb) + 1; + if (opt->add.bindex < 0) + opt->add.bindex = 0; + goto add; + case Opt_prepend: + opt->add.bindex = 0; + add: + case Opt_add: + err = au_br_add(sb, &opt->add, + au_ftest_opts(opts->flags, REMOUNT)); + if (!err) { + err = 1; + au_fset_opts(opts->flags, REFRESH_DIR); + if (au_br_whable(opt->add.perm)) + au_fset_opts(opts->flags, REFRESH_NONDIR); + } + break; + + case Opt_del: + case Opt_idel: + err = au_br_del(sb, &opt->del, + au_ftest_opts(opts->flags, REMOUNT)); + if (!err) { + err = 1; + au_fset_opts(opts->flags, TRUNC_XIB); + au_fset_opts(opts->flags, REFRESH_DIR); + au_fset_opts(opts->flags, REFRESH_NONDIR); + } + break; + + case Opt_mod: + case Opt_imod: + err = au_br_mod(sb, &opt->mod, + au_ftest_opts(opts->flags, REMOUNT), + &do_refresh); + if (!err) { + err = 1; + if (do_refresh) { + au_fset_opts(opts->flags, REFRESH_DIR); + au_fset_opts(opts->flags, REFRESH_NONDIR); + } + } + break; + } + + return err; +} + +static int au_opt_xino(struct super_block *sb, struct au_opt *opt, + struct au_opt_xino **opt_xino, + struct au_opts *opts) +{ + int err; + aufs_bindex_t bend, bindex; + struct dentry *root, *parent, *h_root; + + err = 0; + switch (opt->type) { + case Opt_xino: + err = au_xino_set(sb, &opt->xino, + !!au_ftest_opts(opts->flags, REMOUNT)); + if (unlikely(err)) + break; + + *opt_xino = &opt->xino; + au_xino_brid_set(sb, -1); + + /* safe d_parent access */ + parent = opt->xino.file->f_dentry->d_parent; + root = sb->s_root; + bend = au_sbend(sb); + for (bindex = 0; bindex <= bend; bindex++) { + h_root = au_h_dptr(root, bindex); + if (h_root == parent) { + au_xino_brid_set(sb, au_sbr_id(sb, bindex)); + break; + } + } + break; + + case Opt_noxino: + au_xino_clr(sb); + au_xino_brid_set(sb, -1); + *opt_xino = (void *)-1; + break; + } + + return err; +} + +int au_opts_verify(struct super_block *sb, unsigned long sb_flags, + unsigned int pending) +{ + int err; + aufs_bindex_t bindex, bend; + unsigned char do_plink, skip, do_free; + struct au_branch *br; + struct au_wbr *wbr; + struct dentry *root; + struct inode *dir, *h_dir; + struct au_sbinfo *sbinfo; + struct au_hinode *hdir; + + SiMustAnyLock(sb); + + sbinfo = au_sbi(sb); + AuDebugOn(!(sbinfo->si_mntflags & AuOptMask_UDBA)); + + if (!(sb_flags & MS_RDONLY)) { + if (unlikely(!au_br_writable(au_sbr_perm(sb, 0)))) + AuWarn("first branch should be rw\n"); + if (unlikely(au_opt_test(sbinfo->si_mntflags, SHWH))) + AuWarn("shwh should be used with ro\n"); + } + + if (au_opt_test((sbinfo->si_mntflags | pending), UDBA_HINOTIFY) + && !au_opt_test(sbinfo->si_mntflags, XINO)) + AuWarn("udba=inotify requires xino\n"); + + err = 0; + root = sb->s_root; + dir = sb->s_root->d_inode; + do_plink = !!au_opt_test(sbinfo->si_mntflags, PLINK); + bend = au_sbend(sb); + for (bindex = 0; !err && bindex <= bend; bindex++) { + skip = 0; + h_dir = au_h_iptr(dir, bindex); + br = au_sbr(sb, bindex); + do_free = 0; + + wbr = br->br_wbr; + if (wbr) + wbr_wh_read_lock(wbr); + + switch (br->br_perm) { + case AuBrPerm_RO: + case AuBrPerm_ROWH: + case AuBrPerm_RR: + case AuBrPerm_RRWH: + do_free = !!wbr; + skip = (!wbr + || (!wbr->wbr_whbase + && !wbr->wbr_plink + && !wbr->wbr_orph)); + break; + + case AuBrPerm_RWNoLinkWH: + /* skip = (!br->br_whbase && !br->br_orph); */ + skip = (!wbr || !wbr->wbr_whbase); + if (skip && wbr) { + if (do_plink) + skip = !!wbr->wbr_plink; + else + skip = !wbr->wbr_plink; + } + break; + + case AuBrPerm_RW: + /* skip = (br->br_whbase && br->br_ohph); */ + skip = (wbr && wbr->wbr_whbase); + if (skip) { + if (do_plink) + skip = !!wbr->wbr_plink; + else + skip = !wbr->wbr_plink; + } + break; + + default: + BUG(); + } + if (wbr) + wbr_wh_read_unlock(wbr); + + if (skip) + continue; + + hdir = au_hi(dir, bindex); + au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT); + if (wbr) + wbr_wh_write_lock(wbr); + err = au_wh_init(au_h_dptr(root, bindex), br, sb); + if (wbr) + wbr_wh_write_unlock(wbr); + au_hin_imtx_unlock(hdir); + + if (!err && do_free) { + kfree(wbr); + br->br_wbr = NULL; + } + } + + return err; +} + +int au_opts_mount(struct super_block *sb, struct au_opts *opts) +{ + int err; + unsigned int tmp; + aufs_bindex_t bend; + struct au_opt *opt; + struct au_opt_xino *opt_xino, xino; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + err = 0; + opt_xino = NULL; + opt = opts->opt; + while (err >= 0 && opt->type != Opt_tail) + err = au_opt_simple(sb, opt++, opts); + if (err > 0) + err = 0; + else if (unlikely(err < 0)) + goto out; + + /* disable xino and udba temporary */ + sbinfo = au_sbi(sb); + tmp = sbinfo->si_mntflags; + au_opt_clr(sbinfo->si_mntflags, XINO); + au_opt_set_udba(sbinfo->si_mntflags, UDBA_REVAL); + + opt = opts->opt; + while (err >= 0 && opt->type != Opt_tail) + err = au_opt_br(sb, opt++, opts); + if (err > 0) + err = 0; + else if (unlikely(err < 0)) + goto out; + + bend = au_sbend(sb); + if (unlikely(bend < 0)) { + err = -EINVAL; + AuErr("no branches\n"); + goto out; + } + + if (au_opt_test(tmp, XINO)) + au_opt_set(sbinfo->si_mntflags, XINO); + opt = opts->opt; + while (!err && opt->type != Opt_tail) + err = au_opt_xino(sb, opt++, &opt_xino, opts); + if (unlikely(err)) + goto out; + + err = au_opts_verify(sb, sb->s_flags, tmp); + if (unlikely(err)) + goto out; + + /* restore xino */ + if (au_opt_test(tmp, XINO) && !opt_xino) { + xino.file = au_xino_def(sb); + err = PTR_ERR(xino.file); + if (IS_ERR(xino.file)) + goto out; + + err = au_xino_set(sb, &xino, /*remount*/0); + fput(xino.file); + if (unlikely(err)) + goto out; + } + + /* restore udba */ + sbinfo->si_mntflags &= ~AuOptMask_UDBA; + sbinfo->si_mntflags |= (tmp & AuOptMask_UDBA); + if (au_opt_test(tmp, UDBA_HINOTIFY)) { + struct inode *dir = sb->s_root->d_inode; + au_reset_hinotify(dir, + au_hi_flags(dir, /*isdir*/1) & ~AuHi_XINO); + } + + out: + return err; +} + +int au_opts_remount(struct super_block *sb, struct au_opts *opts) +{ + int err, rerr; + struct inode *dir; + struct au_opt_xino *opt_xino; + struct au_opt *opt; + struct au_sbinfo *sbinfo; + + SiMustWriteLock(sb); + + dir = sb->s_root->d_inode; + sbinfo = au_sbi(sb); + err = 0; + opt_xino = NULL; + opt = opts->opt; + while (err >= 0 && opt->type != Opt_tail) { + err = au_opt_simple(sb, opt, opts); + if (!err) + err = au_opt_br(sb, opt, opts); + if (!err) + err = au_opt_xino(sb, opt, &opt_xino, opts); + opt++; + } + if (err > 0) + err = 0; + AuTraceErr(err); + /* go on even err */ + + rerr = au_opts_verify(sb, opts->sb_flags, /*pending*/0); + if (unlikely(rerr && !err)) + err = rerr; + + if (au_ftest_opts(opts->flags, TRUNC_XIB)) { + rerr = au_xib_trunc(sb); + if (unlikely(rerr && !err)) + err = rerr; + } + + /* will be handled by the caller */ + if (!au_ftest_opts(opts->flags, REFRESH_DIR) + && (opts->given_udba || au_opt_test(sbinfo->si_mntflags, XINO))) + au_fset_opts(opts->flags, REFRESH_DIR); + + AuDbg("status 0x%x\n", opts->flags); + return err; +} + +/* ---------------------------------------------------------------------- */ + +unsigned int au_opt_udba(struct super_block *sb) +{ + return au_mntflags(sb) & AuOptMask_UDBA; +} --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-memcache.h +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-memcache.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen + * + * Device-mapper memory object handling: + * + * o allocate/free total_pages in a per client page pool. + * + * o allocate/free memory objects with chunks (1..n) of + * pages_per_chunk pages hanging off. + * + * This file is released under the GPL. + */ + +#ifndef _DM_MEM_CACHE_H +#define _DM_MEM_CACHE_H + +#define DM_MEM_CACHE_H_VERSION "0.1" + +#include "dm.h" +#include + +static inline struct page_list *pl_elem(struct page_list *pl, unsigned p) +{ + while (pl && p--) + pl = pl->next; + + return pl; +} + +struct dm_mem_cache_object { + struct page_list *pl; /* Dynamically allocated array */ + void *private; /* Caller context reference */ +}; + +struct dm_mem_cache_client; + +/* + * Create/destroy dm memory cache client resources. + * + * On creation, a number of @objects with @chunks of + * @pages_per_chunk pages will be allocated. + */ +struct dm_mem_cache_client * +dm_mem_cache_client_create(unsigned objects, unsigned chunks, + unsigned pages_per_chunk); +void dm_mem_cache_client_destroy(struct dm_mem_cache_client *client); + +/* + * Grow/shrink a dm memory cache client resources + * by @objetcs amount of objects. + */ +int dm_mem_cache_grow(struct dm_mem_cache_client *client, unsigned objects); +int dm_mem_cache_shrink(struct dm_mem_cache_client *client, unsigned objects); + +/* + * Allocate/free a memory object + * + * On allocation one object with an amount of chunks and + * an amount of pages per chunk will be returned on success. + */ +struct dm_mem_cache_object * +dm_mem_cache_alloc(struct dm_mem_cache_client *client); +void dm_mem_cache_free(struct dm_mem_cache_client *client, + struct dm_mem_cache_object *object); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-raid4-5.h +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-raid4-5.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2006 Red Hat GmbH + * + * Module Author: Heinz Mauelshagen (Mauelshagen@RedHat.com) + * + * This file is released under the GPL. + * + */ + +#ifndef _DM_RAID45_H +#define _DM_RAID45_H + +/* Factor out to dm.h! */ +#define STR_LEN(ptr, str) ptr, str, strlen(ptr) + +enum lock_type { RAID45_EX, RAID45_SHARED }; + +struct dmraid45_locking_type { + /* Request a lock on a stripe. */ + void* (*lock)(sector_t key, enum lock_type type); + + /* Release a lock on a stripe. */ + void (*unlock)(void *lock_handle); + +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-raid45.h +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-raid45.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen (Mauelshagen@RedHat.com) + * + * Locking definitions for the device-mapper RAID45 target. + * + * This file is released under the GPL. + * + */ + +#ifndef _DM_RAID45_H +#define _DM_RAID45_H + +/* Factor out to dm.h! */ +#define STR_LEN(ptr, str) (ptr), (str), strlen((ptr)) + +enum dm_lock_type { DM_RAID45_EX, DM_RAID45_SHARED }; + +struct dm_raid45_locking_type { + /* Request a lock on a stripe. */ + void* (*lock)(sector_t key, enum dm_lock_type type); + + /* Release a lock on a stripe. */ + void (*unlock)(void *lock_handle); +}; + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/Kconfig @@ -0,0 +1,6 @@ +config DM_RAID45 + tristate "RAID 4/5 target (EXPERIMENTAL)" + depends on BLK_DEV_DM && EXPERIMENTAL + default m + ---help--- + A target that supports RAID4 and RAID5 mappings. --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-region-hash.h +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-region-hash.h @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2003 Sistina Software Limited. + * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved. + * + * Device-Mapper dirty region hash interface. + * + * This file is released under the GPL. + */ + +#ifndef DM_REGION_HASH_H +#define DM_REGION_HASH_H + +#include + +/*----------------------------------------------------------------- + * Region hash + *----------------------------------------------------------------*/ +struct dm_region_hash; +struct dm_region; + +/* + * States a region can have. + */ +enum dm_rh_region_states { + DM_RH_CLEAN = 0x01, /* No writes in flight. */ + DM_RH_DIRTY = 0x02, /* Writes in flight. */ + DM_RH_NOSYNC = 0x04, /* Out of sync. */ + DM_RH_RECOVERING = 0x08, /* Under resynchronization. */ +}; + +/* + * Region hash create/destroy. + */ +struct bio_list; +struct dm_region_hash *dm_region_hash_create( + void *context, void (*dispatch_bios)(void *context, + struct bio_list *bios), + void (*wakeup_workers)(void *context), + void (*wakeup_all_recovery_waiters)(void *context), + sector_t target_begin, unsigned max_recovery, + struct dm_dirty_log *log, uint32_t region_size, + region_t nr_regions); +void dm_region_hash_destroy(struct dm_region_hash *rh); + +struct dm_dirty_log *dm_rh_dirty_log(struct dm_region_hash *rh); + +/* + * Conversion functions. + */ +region_t dm_rh_bio_to_region(struct dm_region_hash *rh, struct bio *bio); +sector_t dm_rh_region_to_sector(struct dm_region_hash *rh, region_t region); +region_t dm_rh_sector_to_region(struct dm_region_hash *rh, sector_t sector); +void *dm_rh_region_context(struct dm_region *reg); + +/* + * Get region size and key (ie. number of the region). + */ +sector_t dm_rh_get_region_size(struct dm_region_hash *rh); +region_t dm_rh_get_region_key(struct dm_region *reg); + +/* + * Get/set/update region state (and dirty log). + * + */ +int dm_rh_get_state(struct dm_region_hash *rh, region_t region, int may_block); +void dm_rh_set_state(struct dm_region_hash *rh, region_t region, + enum dm_rh_region_states state, int may_block); + +/* Non-zero errors_handled leaves the state of the region NOSYNC */ +void dm_rh_update_states(struct dm_region_hash *rh, int errors_handled); + +/* Flush the region hash and dirty log. */ +int dm_rh_flush(struct dm_region_hash *rh); + +/* Inc/dec pending count on regions. */ +void dm_rh_inc(struct dm_region_hash *rh, region_t region); +void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios); +void dm_rh_dec(struct dm_region_hash *rh, region_t region); + +/* Delay bios on regions. */ +void dm_rh_delay(struct dm_region_hash *rh, struct bio *bio); +void dm_rh_delay_by_region(struct dm_region_hash *rh, struct bio *bio, + region_t region); + +void dm_rh_mark_nosync(struct dm_region_hash *rh, + struct bio *bio, unsigned done, int error); + +/* + * Region recovery control. + */ + +/* Prepare some regions for recovery by starting to quiesce them. */ +void dm_rh_recovery_prepare(struct dm_region_hash *rh); + +/* Try fetching a quiesced region for recovery. */ +struct dm_region *dm_rh_recovery_start(struct dm_region_hash *rh); + +/* Report recovery end on a region. */ +void dm_rh_recovery_end(struct dm_region *reg, int error); + +/* Returns number of regions with recovery work outstanding. */ +int dm_rh_recovery_in_flight(struct dm_region_hash *rh); + +/* Start/stop recovery. */ +void dm_rh_start_recovery(struct dm_region_hash *rh); +void dm_rh_stop_recovery(struct dm_region_hash *rh); + +#endif /* DM_REGION_HASH_H */ --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/BOM @@ -0,0 +1,3 @@ +Downloaded from: http://people.redhat.com/~heinzm/sw/dm/dm-raid45/ +Current Version: 2009.04.24 (2.6.30-rc3) +Comments: All of the patches to dmraid1/dm-log, etc are upstream. --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-raid4-5.c +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-raid4-5.c @@ -0,0 +1,4547 @@ +/*[A[A + * Copyright (C) 2005-2009 Red Hat, Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen + * + * This file is released under the GPL. + * + * + * Linux 2.6 Device Mapper RAID4 and RAID5 target. + * + * Supports: + * o RAID4 with dedicated and selectable parity device + * o RAID5 with rotating parity (left+right, symmetric+asymmetric) + * o recovery of out of sync device for initial + * RAID set creation or after dead drive replacement + * o run time optimization of xor algorithm used to calculate parity + * + * + * Thanks to MD for: + * o the raid address calculation algorithm + * o the base of the biovec <-> page list copier. + * + * + * Uses region hash to keep track of how many writes are in flight to + * regions in order to use dirty log to keep state of regions to recover: + * + * o clean regions (those which are synchronized + * and don't have write io in flight) + * o dirty regions (those with write io in flight) + * + * + * On startup, any dirty regions are migrated to the + * 'nosync' state and are subject to recovery by the daemon. + * + * See raid_ctr() for table definition. + * + * FIXME: recovery bandwidth + */ + +static const char *version = "v0.2594b"; + +#include "dm.h" +#include "dm-memcache.h" +#include "dm-message.h" +#include "dm-raid45.h" + +#include +#include +#include + +#include +#include +#include +#include "dm-region-hash.h" + + +/* + * Configurable parameters + */ + +/* Minimum/maximum and default # of selectable stripes. */ +#define STRIPES_MIN 8 +#define STRIPES_MAX 16384 +#define STRIPES_DEFAULT 80 + +/* Maximum and default chunk size in sectors if not set in constructor. */ +#define CHUNK_SIZE_MIN 8 +#define CHUNK_SIZE_MAX 16384 +#define CHUNK_SIZE_DEFAULT 64 + +/* Default io size in sectors if not set in constructor. */ +#define IO_SIZE_MIN CHUNK_SIZE_MIN +#define IO_SIZE_DEFAULT IO_SIZE_MIN + +/* Recover io size default in sectors. */ +#define RECOVER_IO_SIZE_MIN 64 +#define RECOVER_IO_SIZE_DEFAULT 256 + +/* Default, minimum and maximum percentage of recover io bandwidth. */ +#define BANDWIDTH_DEFAULT 10 +#define BANDWIDTH_MIN 1 +#define BANDWIDTH_MAX 100 + +/* # of parallel recovered regions */ +#define RECOVERY_STRIPES_MIN 1 +#define RECOVERY_STRIPES_MAX 64 +#define RECOVERY_STRIPES_DEFAULT RECOVERY_STRIPES_MIN +/* + * END Configurable parameters + */ + +#define TARGET "dm-raid45" +#define DAEMON "kraid45d" +#define DM_MSG_PREFIX TARGET + +#define SECTORS_PER_PAGE (PAGE_SIZE >> SECTOR_SHIFT) + +/* Amount/size for __xor(). */ +#define XOR_SIZE PAGE_SIZE + +/* Check value in range. */ +#define range_ok(i, min, max) (i >= min && i <= max) + +/* Check argument is power of 2. */ +#define POWER_OF_2(a) (!(a & (a - 1))) + +/* Structure access macros. */ +/* Derive raid_set from stripe_cache pointer. */ +#define RS(x) container_of(x, struct raid_set, sc) + +/* Page reference. */ +#define PAGE(stripe, p) ((stripe)->obj[p].pl->page) + +/* Stripe chunk reference. */ +#define CHUNK(stripe, p) ((stripe)->chunk + p) + +/* Bio list reference. */ +#define BL(stripe, p, rw) (stripe->chunk[p].bl + rw) +#define BL_CHUNK(chunk, rw) (chunk->bl + rw) + +/* Page list reference. */ +#define PL(stripe, p) (stripe->obj[p].pl) +/* END: structure access macros. */ + +/* Factor out to dm-bio-list.h */ +static inline void bio_list_push(struct bio_list *bl, struct bio *bio) +{ + bio->bi_next = bl->head; + bl->head = bio; + + if (!bl->tail) + bl->tail = bio; +} + +/* Factor out to dm.h */ +#define TI_ERR_RET(str, ret) \ + do { ti->error = str; return ret; } while (0); +#define TI_ERR(str) TI_ERR_RET(str, -EINVAL) + +/* Macro to define access IO flags access inline functions. */ +#define BITOPS(name, what, var, flag) \ +static inline int TestClear ## name ## what(struct var *v) \ +{ return test_and_clear_bit(flag, &v->io.flags); } \ +static inline int TestSet ## name ## what(struct var *v) \ +{ return test_and_set_bit(flag, &v->io.flags); } \ +static inline void Clear ## name ## what(struct var *v) \ +{ clear_bit(flag, &v->io.flags); } \ +static inline void Set ## name ## what(struct var *v) \ +{ set_bit(flag, &v->io.flags); } \ +static inline int name ## what(struct var *v) \ +{ return test_bit(flag, &v->io.flags); } + +/*----------------------------------------------------------------- + * Stripe cache + * + * Cache for all reads and writes to raid sets (operational or degraded) + * + * We need to run all data to and from a RAID set through this cache, + * because parity chunks need to get calculated from data chunks + * or, in the degraded/resynchronization case, missing chunks need + * to be reconstructed using the other chunks of the stripe. + *---------------------------------------------------------------*/ +/* A chunk within a stripe (holds bios hanging off). */ +/* IO status flags for chunks of a stripe. */ +enum chunk_flags { + CHUNK_DIRTY, /* Pages of chunk dirty; need writing. */ + CHUNK_ERROR, /* IO error on any chunk page. */ + CHUNK_IO, /* Allow/prohibit IO on chunk pages. */ + CHUNK_LOCKED, /* Chunk pages locked during IO. */ + CHUNK_MUST_IO, /* Chunk must io. */ + CHUNK_UNLOCK, /* Enforce chunk unlock. */ + CHUNK_UPTODATE, /* Chunk pages are uptodate. */ +}; + +#if READ != 0 || WRITE != 1 +#error dm-raid45: READ/WRITE != 0/1 used as index!!! +#endif + +enum bl_type { + WRITE_QUEUED = WRITE + 1, + WRITE_MERGED, + NR_BL_TYPES, /* Must be last one! */ +}; +struct stripe_chunk { + atomic_t cnt; /* Reference count. */ + struct stripe *stripe; /* Backpointer to stripe for endio(). */ + /* Bio lists for reads, writes, and writes merged. */ + struct bio_list bl[NR_BL_TYPES]; + struct { + unsigned long flags; /* IO status flags. */ + } io; +}; + +/* Define chunk bit operations. */ +BITOPS(Chunk, Dirty, stripe_chunk, CHUNK_DIRTY) +BITOPS(Chunk, Error, stripe_chunk, CHUNK_ERROR) +BITOPS(Chunk, Io, stripe_chunk, CHUNK_IO) +BITOPS(Chunk, Locked, stripe_chunk, CHUNK_LOCKED) +BITOPS(Chunk, MustIo, stripe_chunk, CHUNK_MUST_IO) +BITOPS(Chunk, Unlock, stripe_chunk, CHUNK_UNLOCK) +BITOPS(Chunk, Uptodate, stripe_chunk, CHUNK_UPTODATE) + +/* + * Stripe linked list indexes. Keep order, because the stripe + * and the stripe cache rely on the first 3! + */ +enum list_types { + LIST_FLUSH, /* Stripes to flush for io. */ + LIST_ENDIO, /* Stripes to endio. */ + LIST_LRU, /* Least recently used stripes. */ + SC_NR_LISTS, /* # of lists in stripe cache. */ + LIST_HASH = SC_NR_LISTS, /* Hashed stripes. */ + LIST_RECOVER = LIST_HASH, /* For recovery type stripes only. */ + STRIPE_NR_LISTS,/* To size array in struct stripe. */ +}; + +/* Adressing region recovery. */ +struct recover_addr { + struct dm_region *reg; /* Actual region to recover. */ + sector_t pos; /* Position within region to recover. */ + sector_t end; /* End of region to recover. */ +}; + +/* A stripe: the io object to handle all reads and writes to a RAID set. */ +struct stripe { + atomic_t cnt; /* Reference count. */ + struct stripe_cache *sc; /* Backpointer to stripe cache. */ + + /* + * 4 linked lists: + * o io list to flush io + * o endio list + * o LRU list to put stripes w/o reference count on + * o stripe cache hash + */ + struct list_head lists[STRIPE_NR_LISTS]; + + sector_t key; /* Hash key. */ + region_t region; /* Region stripe is mapped to. */ + + struct { + unsigned long flags; /* Stripe state flags (see below). */ + + /* + * Pending ios in flight: + * + * used to control move of stripe to endio list + */ + atomic_t pending; + + /* Sectors to read and write for multi page stripe sets. */ + unsigned size; + } io; + + /* Address region recovery. */ + struct recover_addr *recover; + + /* Lock on stripe (Future: for clustering). */ + void *lock; + + struct { + unsigned short parity; /* Parity chunk index. */ + short recover; /* Recovery chunk index. */ + } idx; + + /* + * This stripe's memory cache object (dm-mem-cache); + * i.e. the io chunk pages. + */ + struct dm_mem_cache_object *obj; + + /* Array of stripe sets (dynamically allocated). */ + struct stripe_chunk chunk[0]; +}; + +/* States stripes can be in (flags field). */ +enum stripe_states { + STRIPE_ERROR, /* io error on stripe. */ + STRIPE_MERGED, /* Writes got merged to be written. */ + STRIPE_RBW, /* Read-before-write stripe. */ + STRIPE_RECONSTRUCT, /* Reconstruct of a missing chunk required. */ + STRIPE_RECONSTRUCTED, /* Reconstructed of a missing chunk. */ + STRIPE_RECOVER, /* Stripe used for RAID set recovery. */ +}; + +/* Define stripe bit operations. */ +BITOPS(Stripe, Error, stripe, STRIPE_ERROR) +BITOPS(Stripe, Merged, stripe, STRIPE_MERGED) +BITOPS(Stripe, RBW, stripe, STRIPE_RBW) +BITOPS(Stripe, Reconstruct, stripe, STRIPE_RECONSTRUCT) +BITOPS(Stripe, Reconstructed, stripe, STRIPE_RECONSTRUCTED) +BITOPS(Stripe, Recover, stripe, STRIPE_RECOVER) + +/* A stripe hash. */ +struct stripe_hash { + struct list_head *hash; + unsigned buckets; + unsigned mask; + unsigned prime; + unsigned shift; +}; + +enum sc_lock_types { + LOCK_ENDIO, /* Protect endio list. */ + LOCK_LRU, /* Protect LRU list. */ + NR_LOCKS, /* To size array in struct stripe_cache. */ +}; + +/* A stripe cache. */ +struct stripe_cache { + /* Stripe hash. */ + struct stripe_hash hash; + + spinlock_t locks[NR_LOCKS]; /* Locks to protect lists. */ + + /* Stripes with io to flush, stripes to endio and LRU lists. */ + struct list_head lists[SC_NR_LISTS]; + + /* Slab cache to allocate stripes from. */ + struct { + struct kmem_cache *cache; /* Cache itself. */ + char name[32]; /* Unique name. */ + } kc; + + struct dm_io_client *dm_io_client; /* dm-io client resource context. */ + + /* dm-mem-cache client resource context. */ + struct dm_mem_cache_client *mem_cache_client; + + int stripes_parm; /* # stripes parameter from constructor. */ + atomic_t stripes; /* actual # of stripes in cache. */ + atomic_t stripes_to_set; /* # of stripes to resize cache to. */ + atomic_t stripes_last; /* last # of stripes in cache. */ + atomic_t active_stripes; /* actual # of active stripes in cache. */ + + /* REMOVEME: */ + atomic_t active_stripes_max; /* actual # of active stripes in cache. */ +}; + +/* Flag specs for raid_dev */ ; +enum raid_dev_flags { + DEV_FAILED, /* Device failed. */ + DEV_IO_QUEUED, /* Io got queued to device. */ +}; + +/* The raid device in a set. */ +struct raid_dev { + struct dm_dev *dev; + sector_t start; /* Offset to map to. */ + struct { /* Using struct to be able to BITOPS(). */ + unsigned long flags; /* raid_dev_flags. */ + } io; +}; + +BITOPS(Dev, Failed, raid_dev, DEV_FAILED) +BITOPS(Dev, IoQueued, raid_dev, DEV_IO_QUEUED) + +/* Flags spec for raid_set. */ +enum raid_set_flags { + RS_CHECK_OVERWRITE, /* Check for chunk overwrites. */ + RS_DEAD, /* RAID set inoperational. */ + RS_DEGRADED, /* Io errors on RAID device. */ + RS_DEVEL_STATS, /* REMOVEME: display status information. */ + RS_RECOVER, /* Do recovery. */ + RS_RECOVERY_BANDWIDTH, /* Allow recovery bandwidth (delayed bios). */ + RS_SC_BUSY, /* Stripe cache busy -> send an event. */ + RS_SUSPEND, /* Suspend RAID set. */ +}; + +/* REMOVEME: devel stats counters. */ +enum stats_types { + S_BIOS_READ, + S_BIOS_ADDED_READ, + S_BIOS_ENDIO_READ, + S_BIOS_WRITE, + S_BIOS_ADDED_WRITE, + S_BIOS_ENDIO_WRITE, + S_CAN_MERGE, + S_CANT_MERGE, + S_CONGESTED, + S_DM_IO_READ, + S_DM_IO_WRITE, + S_BANDWIDTH, + S_BARRIER, + S_BIO_COPY_PL_NEXT, + S_DEGRADED, + S_DELAYED_BIOS, + S_FLUSHS, + S_HITS_1ST, + S_IOS_POST, + S_INSCACHE, + S_MAX_LOOKUP, + S_CHUNK_LOCKED, + S_NO_BANDWIDTH, + S_NOT_CONGESTED, + S_NO_RW, + S_NOSYNC, + S_OVERWRITE, + S_PROHIBITCHUNKIO, + S_RECONSTRUCT_EI, + S_RECONSTRUCT_DEV, + S_RECONSTRUCT_SET, + S_RECONSTRUCTED, + S_REQUEUE, + S_STRIPE_ERROR, + S_SUM_DELAYED_BIOS, + S_XORS, + S_NR_STATS, /* # of stats counters. Must be last! */ +}; + +/* Status type -> string mappings. */ +struct stats_map { + const enum stats_types type; + const char *str; +}; + +static struct stats_map stats_map[] = { + { S_BIOS_READ, "r=" }, + { S_BIOS_ADDED_READ, "/" }, + { S_BIOS_ENDIO_READ, "/" }, + { S_BIOS_WRITE, " w=" }, + { S_BIOS_ADDED_WRITE, "/" }, + { S_BIOS_ENDIO_WRITE, "/" }, + { S_DM_IO_READ, " rc=" }, + { S_DM_IO_WRITE, " wc=" }, + { S_BANDWIDTH, "\nbw=" }, + { S_NO_BANDWIDTH, " no_bw=" }, + { S_BARRIER, "\nbarrier=" }, + { S_BIO_COPY_PL_NEXT, "\nbio_cp_next=" }, + { S_CAN_MERGE, "\nmerge=" }, + { S_CANT_MERGE, "/no_merge=" }, + { S_CHUNK_LOCKED, "\nchunk_locked=" }, + { S_CONGESTED, "\ncgst=" }, + { S_NOT_CONGESTED, "/not_cgst=" }, + { S_DEGRADED, "\ndegraded=" }, + { S_DELAYED_BIOS, "\ndel_bios=" }, + { S_SUM_DELAYED_BIOS, "/sum_del_bios=" }, + { S_FLUSHS, "\nflushs=" }, + { S_HITS_1ST, "\nhits_1st=" }, + { S_IOS_POST, " ios_post=" }, + { S_INSCACHE, " inscache=" }, + { S_MAX_LOOKUP, " maxlookup=" }, + { S_NO_RW, "\nno_rw=" }, + { S_NOSYNC, " nosync=" }, + { S_OVERWRITE, " ovr=" }, + { S_PROHIBITCHUNKIO, " prhbt_io=" }, + { S_RECONSTRUCT_EI, "\nrec_ei=" }, + { S_RECONSTRUCT_DEV, " rec_dev=" }, + { S_RECONSTRUCT_SET, " rec_set=" }, + { S_RECONSTRUCTED, " rec=" }, + { S_REQUEUE, " requeue=" }, + { S_STRIPE_ERROR, " stripe_err=" }, + { S_XORS, " xors=" }, +}; + +/* + * A RAID set. + */ +#define dm_rh_client dm_region_hash +enum count_type { IO_WORK = 0, IO_RECOVER, IO_NR_COUNT }; +typedef void (*xor_function_t)(unsigned count, unsigned long **data); +struct raid_set { + struct dm_target *ti; /* Target pointer. */ + + struct { + unsigned long flags; /* State flags. */ + struct mutex in_lock; /* Protects central input list below. */ + struct bio_list in; /* Pending ios (central input list). */ + struct bio_list work; /* ios work set. */ + wait_queue_head_t suspendq; /* suspend synchronization. */ + atomic_t in_process; /* counter of queued bios (suspendq). */ + atomic_t in_process_max;/* counter of queued bios max. */ + + /* io work. */ + struct workqueue_struct *wq; + struct delayed_work dws_do_raid; /* For main worker. */ + struct work_struct ws_do_table_event; /* For event worker. */ + } io; + + /* Stripe locking abstraction. */ + struct dm_raid45_locking_type *locking; + + struct stripe_cache sc; /* Stripe cache for this set. */ + + /* Xor optimization. */ + struct { + struct xor_func *f; + unsigned chunks; + unsigned speed; + } xor; + + /* Recovery parameters. */ + struct recover { + struct dm_dirty_log *dl; /* Dirty log. */ + struct dm_rh_client *rh; /* Region hash. */ + + struct dm_io_client *dm_io_client; /* recovery dm-io client. */ + /* dm-mem-cache client resource context for recovery stripes. */ + struct dm_mem_cache_client *mem_cache_client; + + struct list_head stripes; /* List of recovery stripes. */ + + region_t nr_regions; + region_t nr_regions_to_recover; + region_t nr_regions_recovered; + unsigned long start_jiffies; + unsigned long end_jiffies; + + unsigned bandwidth; /* Recovery bandwidth [%]. */ + unsigned bandwidth_work; /* Recovery bandwidth [factor]. */ + unsigned bandwidth_parm; /* " constructor parm. */ + unsigned io_size; /* recovery io size <= region size. */ + unsigned io_size_parm; /* recovery io size ctr parameter. */ + unsigned recovery; /* Recovery allowed/prohibited. */ + unsigned recovery_stripes; /* # of parallel recovery stripes. */ + + /* recovery io throttling. */ + atomic_t io_count[IO_NR_COUNT]; /* counter recover/regular io.*/ + unsigned long last_jiffies; + } recover; + + /* RAID set parameters. */ + struct { + struct raid_type *raid_type; /* RAID type (eg, RAID4). */ + unsigned raid_parms; /* # variable raid parameters. */ + + unsigned chunk_size; /* Sectors per chunk. */ + unsigned chunk_size_parm; + unsigned chunk_shift; /* rsector chunk size shift. */ + + unsigned io_size; /* Sectors per io. */ + unsigned io_size_parm; + unsigned io_mask; /* Mask for bio_copy_page_list(). */ + unsigned io_inv_mask; /* Mask for raid_address(). */ + + sector_t sectors_per_dev; /* Sectors per device. */ + + atomic_t failed_devs; /* Amount of devices failed. */ + + /* Index of device to initialize. */ + int dev_to_init; + int dev_to_init_parm; + + /* Raid devices dynamically allocated. */ + unsigned raid_devs; /* # of RAID devices below. */ + unsigned data_devs; /* # of RAID data devices. */ + + int ei; /* index of failed RAID device. */ + + /* Index of dedicated parity device (i.e. RAID4). */ + int pi; + int pi_parm; /* constructor parm for status output. */ + } set; + + /* REMOVEME: devel stats counters. */ + atomic_t stats[S_NR_STATS]; + + /* Dynamically allocated temporary pointers for xor(). */ + unsigned long **data; + + /* Dynamically allocated RAID devices. Alignment? */ + struct raid_dev dev[0]; +}; + +/* Define RAID set bit operations. */ +BITOPS(RS, Bandwidth, raid_set, RS_RECOVERY_BANDWIDTH) +BITOPS(RS, CheckOverwrite, raid_set, RS_CHECK_OVERWRITE) +BITOPS(RS, Dead, raid_set, RS_DEAD) +BITOPS(RS, Degraded, raid_set, RS_DEGRADED) +BITOPS(RS, DevelStats, raid_set, RS_DEVEL_STATS) +BITOPS(RS, Recover, raid_set, RS_RECOVER) +BITOPS(RS, ScBusy, raid_set, RS_SC_BUSY) +BITOPS(RS, Suspend, raid_set, RS_SUSPEND) +#undef BITOPS + +/*----------------------------------------------------------------- + * Raid-4/5 set structures. + *---------------------------------------------------------------*/ +/* RAID level definitions. */ +enum raid_level { + raid4, + raid5, +}; + +/* Symmetric/Asymmetric, Left/Right parity rotating algorithms. */ +enum raid_algorithm { + none, + left_asym, + right_asym, + left_sym, + right_sym, +}; + +struct raid_type { + const char *name; /* RAID algorithm. */ + const char *descr; /* Descriptor text for logging. */ + const unsigned parity_devs; /* # of parity devices. */ + const unsigned minimal_devs; /* minimal # of devices in set. */ + const enum raid_level level; /* RAID level. */ + const enum raid_algorithm algorithm; /* RAID algorithm. */ +}; + +/* Supported raid types and properties. */ +static struct raid_type raid_types[] = { + {"raid4", "RAID4 (dedicated parity disk)", 1, 3, raid4, none}, + {"raid5_la", "RAID5 (left asymmetric)", 1, 3, raid5, left_asym}, + {"raid5_ra", "RAID5 (right asymmetric)", 1, 3, raid5, right_asym}, + {"raid5_ls", "RAID5 (left symmetric)", 1, 3, raid5, left_sym}, + {"raid5_rs", "RAID5 (right symmetric)", 1, 3, raid5, right_sym}, +}; + +/* Address as calculated by raid_address(). */ +struct raid_address { + sector_t key; /* Hash key (address of stripe % chunk_size). */ + unsigned di, pi; /* Data and parity disks index. */ +}; + +/* REMOVEME: reset statistics counters. */ +static void stats_reset(struct raid_set *rs) +{ + unsigned s = S_NR_STATS; + + while (s--) + atomic_set(rs->stats + s, 0); +} + +/*---------------------------------------------------------------- + * RAID set management routines. + *--------------------------------------------------------------*/ +/* + * Begin small helper functions. + */ +/* No need to be called from region hash indirectly at dm_rh_dec(). */ +static void wake_dummy(void *context) {} + +/* Return # of io reference. */ +static int io_ref(struct raid_set *rs) +{ + return atomic_read(&rs->io.in_process); +} + +/* Get an io reference. */ +static void io_get(struct raid_set *rs) +{ + int p = atomic_inc_return(&rs->io.in_process); + + if (p > atomic_read(&rs->io.in_process_max)) + atomic_set(&rs->io.in_process_max, p); /* REMOVEME: max. */ +} + +/* Put the io reference and conditionally wake io waiters. */ +static void io_put(struct raid_set *rs) +{ + /* Intel: rebuild data corrupter? */ + if (atomic_dec_and_test(&rs->io.in_process)) + wake_up(&rs->io.suspendq); + else + BUG_ON(io_ref(rs) < 0); +} + +/* Wait until all io has been processed. */ +static void wait_ios(struct raid_set *rs) +{ + wait_event(rs->io.suspendq, !io_ref(rs)); +} + +/* Queue (optionally delayed) io work. */ +static void wake_do_raid_delayed(struct raid_set *rs, unsigned long delay) +{ + queue_delayed_work(rs->io.wq, &rs->io.dws_do_raid, delay); +} + +/* Queue io work immediately (called from region hash too). */ +static void wake_do_raid(void *context) +{ + struct raid_set *rs = context; + + queue_work(rs->io.wq, &rs->io.dws_do_raid.work); +} + +/* Calculate device sector offset. */ +static sector_t _sector(struct raid_set *rs, struct bio *bio) +{ + sector_t sector = bio->bi_sector; + + sector_div(sector, rs->set.data_devs); + return sector; +} + +/* Return # of active stripes in stripe cache. */ +static int sc_active(struct stripe_cache *sc) +{ + return atomic_read(&sc->active_stripes); +} + +/* Stripe cache busy indicator. */ +static int sc_busy(struct raid_set *rs) +{ + return sc_active(&rs->sc) > + atomic_read(&rs->sc.stripes) - (STRIPES_MIN / 2); +} + +/* Set chunks states. */ +enum chunk_dirty_type { CLEAN, DIRTY, ERROR }; +static void chunk_set(struct stripe_chunk *chunk, enum chunk_dirty_type type) +{ + switch (type) { + case CLEAN: + ClearChunkDirty(chunk); + break; + case DIRTY: + SetChunkDirty(chunk); + break; + case ERROR: + SetChunkError(chunk); + SetStripeError(chunk->stripe); + return; + default: + BUG(); + } + + SetChunkUptodate(chunk); + SetChunkIo(chunk); + ClearChunkError(chunk); +} + +/* Return region state for a sector. */ +static int region_state(struct raid_set *rs, sector_t sector, + enum dm_rh_region_states state) +{ + struct dm_rh_client *rh = rs->recover.rh; + region_t region = dm_rh_sector_to_region(rh, sector); + + return !!(dm_rh_get_state(rh, region, 1) & state); +} + +/* + * Return true in case a chunk should be read/written + * + * Conditions to read/write: + * o chunk not uptodate + * o chunk dirty + * + * Conditios to avoid io: + * o io already ongoing on chunk + * o io explitely prohibited + */ +static int chunk_io(struct stripe_chunk *chunk) +{ + /* 2nd run optimization (flag set below on first run). */ + if (TestClearChunkMustIo(chunk)) + return 1; + + /* Avoid io if prohibited or a locked chunk. */ + if (!ChunkIo(chunk) || ChunkLocked(chunk)) + return 0; + + if (!ChunkUptodate(chunk) || ChunkDirty(chunk)) { + SetChunkMustIo(chunk); /* 2nd run optimization. */ + return 1; + } + + return 0; +} + +/* Call a function on each chunk needing io unless device failed. */ +static unsigned for_each_io_dev(struct stripe *stripe, + void (*f_io)(struct stripe *stripe, unsigned p)) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned p, r = 0; + + for (p = 0; p < rs->set.raid_devs; p++) { + if (chunk_io(CHUNK(stripe, p)) && !DevFailed(rs->dev + p)) { + f_io(stripe, p); + r++; + } + } + + return r; +} + +/* + * Index of device to calculate parity on. + * + * Either the parity device index *or* the selected + * device to init after a spare replacement. + */ +static int dev_for_parity(struct stripe *stripe, int *sync) +{ + struct raid_set *rs = RS(stripe->sc); + int r = region_state(rs, stripe->key, DM_RH_NOSYNC | DM_RH_RECOVERING); + + *sync = !r; + + /* Reconstruct a particular device ?. */ + if (r && rs->set.dev_to_init > -1) + return rs->set.dev_to_init; + else if (rs->set.raid_type->level == raid4) + return rs->set.pi; + else if (!StripeRecover(stripe)) + return stripe->idx.parity; + else + return -1; +} + +/* RAID set congested function. */ +static int rs_congested(void *congested_data, int bdi_bits) +{ + int r; + unsigned p; + struct raid_set *rs = congested_data; + + if (sc_busy(rs) || RSSuspend(rs)) + r = 1; + else for (r = 0, p = rs->set.raid_devs; !r && p--; ) { + /* If any of our component devices are overloaded. */ + struct request_queue *q = bdev_get_queue(rs->dev[p].dev->bdev); + + r |= bdi_congested(&q->backing_dev_info, bdi_bits); + } + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + (r ? S_CONGESTED : S_NOT_CONGESTED)); + return r; +} + +/* RAID device degrade check. */ +static void rs_check_degrade_dev(struct raid_set *rs, + struct stripe *stripe, unsigned p) +{ + if (TestSetDevFailed(rs->dev + p)) + return; + + /* Through an event in case of member device errors. */ + if (atomic_inc_return(&rs->set.failed_devs) > + rs->set.raid_type->parity_devs && + !TestSetRSDead(rs)) { + /* Display RAID set dead message once. */ + unsigned p; + char buf[BDEVNAME_SIZE]; + + DMERR("FATAL: too many devices failed -> RAID set broken"); + for (p = 0; p < rs->set.raid_devs; p++) { + if (DevFailed(rs->dev + p)) + DMERR("device /dev/%s failed", + bdevname(rs->dev[p].dev->bdev, buf)); + } + } + + /* Only log the first member error. */ + if (!TestSetRSDegraded(rs)) { + char buf[BDEVNAME_SIZE]; + + /* Store index for recovery. */ + rs->set.ei = p; + DMERR("CRITICAL: %sio error on device /dev/%s " + "in region=%llu; DEGRADING RAID set\n", + stripe ? "" : "FAKED ", + bdevname(rs->dev[p].dev->bdev, buf), + (unsigned long long) (stripe ? stripe->key : 0)); + DMERR("further device error messages suppressed"); + } + + schedule_work(&rs->io.ws_do_table_event); +} + +/* RAID set degrade check. */ +static void rs_check_degrade(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned p = rs->set.raid_devs; + + while (p--) { + if (ChunkError(CHUNK(stripe, p))) + rs_check_degrade_dev(rs, stripe, p); + } +} + +/* Lookup a RAID device by name or by major:minor number. */ +static int raid_dev_lookup(struct raid_set *rs, struct raid_dev *dev_lookup) +{ + unsigned p; + struct raid_dev *dev; + + /* + * Must be an incremental loop, because the device array + * can have empty slots still on calls from raid_ctr() + */ + for (dev = rs->dev, p = 0; + dev->dev && p < rs->set.raid_devs; + dev++, p++) { + if (dev_lookup->dev->bdev->bd_dev == dev->dev->bdev->bd_dev) + return p; + } + + return -ENODEV; +} +/* + * End small helper functions. + */ + +/* + * Stripe hash functions + */ +/* Initialize/destroy stripe hash. */ +static int hash_init(struct stripe_hash *hash, unsigned stripes) +{ + unsigned buckets = 2, max_buckets = stripes >> 1; + static unsigned hash_primes[] = { + /* Table of primes for hash_fn/table size optimization. */ + 1, 2, 3, 7, 13, 27, 53, 97, 193, 389, 769, + 1543, 3079, 6151, 12289, 24593, 49157, 98317, + }; + + /* Calculate number of buckets (2^^n <= stripes / 2). */ + while (buckets < max_buckets) + buckets <<= 1; + + /* Allocate stripe hash buckets. */ + hash->hash = vmalloc(buckets * sizeof(*hash->hash)); + if (!hash->hash) + return -ENOMEM; + + hash->buckets = buckets; + hash->mask = buckets - 1; + hash->shift = ffs(buckets); + if (hash->shift > ARRAY_SIZE(hash_primes)) + hash->shift = ARRAY_SIZE(hash_primes) - 1; + + BUG_ON(hash->shift < 2); + hash->prime = hash_primes[hash->shift]; + + /* Initialize buckets. */ + while (buckets--) + INIT_LIST_HEAD(hash->hash + buckets); + return 0; +} + +static void hash_exit(struct stripe_hash *hash) +{ + if (hash->hash) { + vfree(hash->hash); + hash->hash = NULL; + } +} + +static unsigned hash_fn(struct stripe_hash *hash, sector_t key) +{ + return (unsigned) (((key * hash->prime) >> hash->shift) & hash->mask); +} + +static struct list_head *hash_bucket(struct stripe_hash *hash, sector_t key) +{ + return hash->hash + hash_fn(hash, key); +} + +/* Insert an entry into a hash. */ +static void stripe_insert(struct stripe_hash *hash, struct stripe *stripe) +{ + list_add(stripe->lists + LIST_HASH, hash_bucket(hash, stripe->key)); +} + +/* Lookup an entry in the stripe hash. */ +static struct stripe *stripe_lookup(struct stripe_cache *sc, sector_t key) +{ + unsigned look = 0; + struct stripe *stripe; + struct list_head *bucket = hash_bucket(&sc->hash, key); + + list_for_each_entry(stripe, bucket, lists[LIST_HASH]) { + look++; + + if (stripe->key == key) { + /* REMOVEME: statisics. */ + if (look > atomic_read(RS(sc)->stats + S_MAX_LOOKUP)) + atomic_set(RS(sc)->stats + S_MAX_LOOKUP, look); + return stripe; + } + } + + return NULL; +} + +/* Resize the stripe cache hash on size changes. */ +static int sc_hash_resize(struct stripe_cache *sc) +{ + /* Resize indicated ? */ + if (atomic_read(&sc->stripes) != atomic_read(&sc->stripes_last)) { + int r; + struct stripe_hash hash; + + r = hash_init(&hash, atomic_read(&sc->stripes)); + if (r) + return r; + + if (sc->hash.hash) { + unsigned b = sc->hash.buckets; + struct list_head *pos, *tmp; + + /* Walk old buckets and insert into new. */ + while (b--) { + list_for_each_safe(pos, tmp, sc->hash.hash + b) + stripe_insert(&hash, + list_entry(pos, struct stripe, + lists[LIST_HASH])); + } + + } + + hash_exit(&sc->hash); + memcpy(&sc->hash, &hash, sizeof(sc->hash)); + atomic_set(&sc->stripes_last, atomic_read(&sc->stripes)); + } + + return 0; +} +/* End hash stripe hash function. */ + +/* List add, delete, push and pop functions. */ +/* Add stripe to flush list. */ +#define DEL_LIST(lh) \ + if (!list_empty(lh)) \ + list_del_init(lh); + +/* Delete stripe from hash. */ +static void stripe_hash_del(struct stripe *stripe) +{ + DEL_LIST(stripe->lists + LIST_HASH); +} + +/* Return stripe reference count. */ +static inline int stripe_ref(struct stripe *stripe) +{ + return atomic_read(&stripe->cnt); +} + +static void stripe_flush_add(struct stripe *stripe) +{ + struct stripe_cache *sc = stripe->sc; + struct list_head *lh = stripe->lists + LIST_FLUSH; + + if (!StripeReconstruct(stripe) && list_empty(lh)) + list_add_tail(lh, sc->lists + LIST_FLUSH); +} + +/* + * Add stripe to LRU (inactive) list. + * + * Need lock, because of concurrent access from message interface. + */ +static void stripe_lru_add(struct stripe *stripe) +{ + if (!StripeRecover(stripe)) { + unsigned long flags; + struct list_head *lh = stripe->lists + LIST_LRU; + spinlock_t *lock = stripe->sc->locks + LOCK_LRU; + + spin_lock_irqsave(lock, flags); + if (list_empty(lh)) + list_add_tail(lh, stripe->sc->lists + LIST_LRU); + spin_unlock_irqrestore(lock, flags); + } +} + +#define POP_LIST(list) \ + do { \ + if (list_empty(sc->lists + (list))) \ + stripe = NULL; \ + else { \ + stripe = list_first_entry(sc->lists + (list), \ + struct stripe, \ + lists[(list)]); \ + list_del_init(stripe->lists + (list)); \ + } \ + } while (0); + +/* Pop an available stripe off the LRU list. */ +static struct stripe *stripe_lru_pop(struct stripe_cache *sc) +{ + struct stripe *stripe; + spinlock_t *lock = sc->locks + LOCK_LRU; + + spin_lock_irq(lock); + POP_LIST(LIST_LRU); + spin_unlock_irq(lock); + + return stripe; +} + +/* Pop an available stripe off the io list. */ +static struct stripe *stripe_io_pop(struct stripe_cache *sc) +{ + struct stripe *stripe; + + POP_LIST(LIST_FLUSH); + return stripe; +} + +/* Push a stripe safely onto the endio list to be handled by do_endios(). */ +static void stripe_endio_push(struct stripe *stripe) +{ + unsigned long flags; + struct stripe_cache *sc = stripe->sc; + struct list_head *stripe_list = stripe->lists + LIST_ENDIO, + *sc_list = sc->lists + LIST_ENDIO; + spinlock_t *lock = sc->locks + LOCK_ENDIO; + + /* This runs in parallel with do_endios(). */ + spin_lock_irqsave(lock, flags); + if (list_empty(stripe_list)) + list_add_tail(stripe_list, sc_list); + spin_unlock_irqrestore(lock, flags); + + wake_do_raid(RS(sc)); /* Wake myself. */ +} + +/* Pop a stripe off safely off the endio list. */ +static struct stripe *stripe_endio_pop(struct stripe_cache *sc) +{ + struct stripe *stripe; + spinlock_t *lock = sc->locks + LOCK_ENDIO; + + /* This runs in parallel with endio(). */ + spin_lock_irq(lock); + POP_LIST(LIST_ENDIO) + spin_unlock_irq(lock); + return stripe; +} +#undef POP_LIST + +/* + * Stripe cache locking functions + */ +/* Dummy lock function for single host RAID4+5. */ +static void *no_lock(sector_t key, enum dm_lock_type type) +{ + return &no_lock; +} + +/* Dummy unlock function for single host RAID4+5. */ +static void no_unlock(void *lock_handle) +{ +} + +/* No locking (for single host RAID 4+5). */ +static struct dm_raid45_locking_type locking_none = { + .lock = no_lock, + .unlock = no_unlock, +}; + +/* Lock a stripe (for clustering). */ +static int +stripe_lock(struct stripe *stripe, int rw, sector_t key) +{ + stripe->lock = RS(stripe->sc)->locking->lock(key, rw == READ ? DM_RAID45_SHARED : DM_RAID45_EX); + return stripe->lock ? 0 : -EPERM; +} + +/* Unlock a stripe (for clustering). */ +static void stripe_unlock(struct stripe *stripe) +{ + RS(stripe->sc)->locking->unlock(stripe->lock); + stripe->lock = NULL; +} + +/* Test io pending on stripe. */ +static int stripe_io_ref(struct stripe *stripe) +{ + return atomic_read(&stripe->io.pending); +} + +static void stripe_io_get(struct stripe *stripe) +{ + if (atomic_inc_return(&stripe->io.pending) == 1) + /* REMOVEME: statistics */ + atomic_inc(&stripe->sc->active_stripes); + else + BUG_ON(stripe_io_ref(stripe) < 0); +} + +static void stripe_io_put(struct stripe *stripe) +{ + if (atomic_dec_and_test(&stripe->io.pending)) { + if (unlikely(StripeRecover(stripe))) + /* Don't put recovery stripe on endio list. */ + wake_do_raid(RS(stripe->sc)); + else + /* Add regular stripe to endio list and wake daemon. */ + stripe_endio_push(stripe); + + /* REMOVEME: statistics */ + atomic_dec(&stripe->sc->active_stripes); + } else + BUG_ON(stripe_io_ref(stripe) < 0); +} + +/* Take stripe reference out. */ +static int stripe_get(struct stripe *stripe) +{ + int r; + struct list_head *lh = stripe->lists + LIST_LRU; + spinlock_t *lock = stripe->sc->locks + LOCK_LRU; + + /* Delete stripe from LRU (inactive) list if on. */ + spin_lock_irq(lock); + DEL_LIST(lh); + spin_unlock_irq(lock); + + BUG_ON(stripe_ref(stripe) < 0); + + /* Lock stripe on first reference */ + r = (atomic_inc_return(&stripe->cnt) == 1) ? + stripe_lock(stripe, WRITE, stripe->key) : 0; + + return r; +} +#undef DEL_LIST + +/* Return references on a chunk. */ +static int chunk_ref(struct stripe_chunk *chunk) +{ + return atomic_read(&chunk->cnt); +} + +/* Take out reference on a chunk. */ +static int chunk_get(struct stripe_chunk *chunk) +{ + return atomic_inc_return(&chunk->cnt); +} + +/* Drop reference on a chunk. */ +static void chunk_put(struct stripe_chunk *chunk) +{ + BUG_ON(atomic_dec_return(&chunk->cnt) < 0); +} + +/* + * Drop reference on a stripe. + * + * Move it to list of LRU stripes if zero. + */ +static void stripe_put(struct stripe *stripe) +{ + if (atomic_dec_and_test(&stripe->cnt)) { + BUG_ON(stripe_io_ref(stripe)); + stripe_unlock(stripe); + } else + BUG_ON(stripe_ref(stripe) < 0); +} + +/* Helper needed by for_each_io_dev(). */ +static void stripe_get_references(struct stripe *stripe, unsigned p) +{ + + /* + * Another one to reference the stripe in + * order to protect vs. LRU list moves. + */ + io_get(RS(stripe->sc)); /* Global io references. */ + stripe_get(stripe); + stripe_io_get(stripe); /* One for each chunk io. */ +} + +/* Helper for endio() to put all take references. */ +static void stripe_put_references(struct stripe *stripe) +{ + stripe_io_put(stripe); /* One for each chunk io. */ + stripe_put(stripe); + io_put(RS(stripe->sc)); +} + +/* + * Stripe cache functions. + */ +/* + * Invalidate all chunks (i.e. their pages) of a stripe. + * + * I only keep state for the whole chunk. + */ +static inline void stripe_chunk_invalidate(struct stripe_chunk *chunk) +{ + chunk->io.flags = 0; +} + +static void +stripe_chunks_invalidate(struct stripe *stripe) +{ + unsigned p = RS(stripe->sc)->set.raid_devs; + + while (p--) + stripe_chunk_invalidate(CHUNK(stripe, p)); +} + +/* Prepare stripe for (re)use. */ +static void stripe_invalidate(struct stripe *stripe) +{ + stripe->io.flags = 0; + stripe->idx.parity = stripe->idx.recover = -1; + stripe_chunks_invalidate(stripe); +} + +/* + * Allow io on all chunks of a stripe. + * If not set, IO will not occur; i.e. it's prohibited. + * + * Actual IO submission for allowed chunks depends + * on their !uptodate or dirty state. + */ +static void stripe_allow_io(struct stripe *stripe) +{ + unsigned p = RS(stripe->sc)->set.raid_devs; + + while (p--) + SetChunkIo(CHUNK(stripe, p)); +} + +/* Initialize a stripe. */ +static void stripe_init(struct stripe_cache *sc, struct stripe *stripe) +{ + unsigned i, p = RS(sc)->set.raid_devs; + + /* Work all io chunks. */ + while (p--) { + struct stripe_chunk *chunk = CHUNK(stripe, p); + + atomic_set(&chunk->cnt, 0); + chunk->stripe = stripe; + i = ARRAY_SIZE(chunk->bl); + while (i--) + bio_list_init(chunk->bl + i); + } + + stripe->sc = sc; + + + i = ARRAY_SIZE(stripe->lists); + while (i--) + INIT_LIST_HEAD(stripe->lists + i); + + stripe->io.size = RS(sc)->set.io_size; + atomic_set(&stripe->cnt, 0); + atomic_set(&stripe->io.pending, 0); + stripe_invalidate(stripe); +} + +/* Number of pages per chunk. */ +static inline unsigned chunk_pages(unsigned sectors) +{ + return dm_div_up(sectors, SECTORS_PER_PAGE); +} + +/* Number of pages per stripe. */ +static inline unsigned stripe_pages(struct raid_set *rs, unsigned io_size) +{ + return chunk_pages(io_size) * rs->set.raid_devs; +} + +/* Initialize part of page_list (recovery). */ +static void stripe_zero_pl_part(struct stripe *stripe, int p, + unsigned start, unsigned count) +{ + unsigned o = start / SECTORS_PER_PAGE, pages = chunk_pages(count); + /* Get offset into the page_list. */ + struct page_list *pl = pl_elem(PL(stripe, p), o); + + BUG_ON(!pl); + while (pl && pages--) { + BUG_ON(!pl->page); + memset(page_address(pl->page), 0, PAGE_SIZE); + pl = pl->next; + } +} + +/* Initialize parity chunk of stripe. */ +static void stripe_zero_chunk(struct stripe *stripe, int p) +{ + if (p > -1) + stripe_zero_pl_part(stripe, p, 0, stripe->io.size); +} + +/* Return dynamic stripe structure size. */ +static size_t stripe_size(struct raid_set *rs) +{ + return sizeof(struct stripe) + + rs->set.raid_devs * sizeof(struct stripe_chunk); +} + +/* Allocate a stripe and its memory object. */ +/* XXX adjust to cope with stripe cache and recovery stripe caches. */ +enum grow { SC_GROW, SC_KEEP }; +static struct stripe *stripe_alloc(struct stripe_cache *sc, + struct dm_mem_cache_client *mc, + enum grow grow) +{ + int r; + struct stripe *stripe; + + stripe = kmem_cache_zalloc(sc->kc.cache, GFP_KERNEL); + if (stripe) { + /* Grow the dm-mem-cache by one object. */ + if (grow == SC_GROW) { + r = dm_mem_cache_grow(mc, 1); + if (r) + goto err_free; + } + + stripe->obj = dm_mem_cache_alloc(mc); + if (!stripe->obj) + goto err_shrink; + + stripe_init(sc, stripe); + } + + return stripe; + +err_shrink: + if (grow == SC_GROW) + dm_mem_cache_shrink(mc, 1); +err_free: + kmem_cache_free(sc->kc.cache, stripe); + return NULL; +} + +/* + * Free a stripes memory object, shrink the + * memory cache and free the stripe itself. + */ +static void stripe_free(struct stripe *stripe, struct dm_mem_cache_client *mc) +{ + dm_mem_cache_free(mc, stripe->obj); + dm_mem_cache_shrink(mc, 1); + kmem_cache_free(stripe->sc->kc.cache, stripe); +} + +/* Free the recovery stripe. */ +static void stripe_recover_free(struct raid_set *rs) +{ + struct recover *rec = &rs->recover; + struct dm_mem_cache_client *mc; + + mc = rec->mem_cache_client; + rec->mem_cache_client = NULL; + if (mc) { + struct stripe *stripe; + + while (!list_empty(&rec->stripes)) { + stripe = list_first_entry(&rec->stripes, struct stripe, + lists[LIST_RECOVER]); + list_del(stripe->lists + LIST_RECOVER); + kfree(stripe->recover); + stripe_free(stripe, mc); + } + + dm_mem_cache_client_destroy(mc); + dm_io_client_destroy(rec->dm_io_client); + rec->dm_io_client = NULL; + } +} + +/* Grow stripe cache. */ +static int sc_grow(struct stripe_cache *sc, unsigned stripes, enum grow grow) +{ + int r = 0; + + /* Try to allocate this many (additional) stripes. */ + while (stripes--) { + struct stripe *stripe = + stripe_alloc(sc, sc->mem_cache_client, grow); + + if (likely(stripe)) { + stripe_lru_add(stripe); + atomic_inc(&sc->stripes); + } else { + r = -ENOMEM; + break; + } + } + + return r ? r : sc_hash_resize(sc); +} + +/* Shrink stripe cache. */ +static int sc_shrink(struct stripe_cache *sc, unsigned stripes) +{ + int r = 0; + + /* Try to get unused stripe from LRU list. */ + while (stripes--) { + struct stripe *stripe; + + stripe = stripe_lru_pop(sc); + if (stripe) { + /* An LRU stripe may never have ios pending! */ + BUG_ON(stripe_io_ref(stripe)); + BUG_ON(stripe_ref(stripe)); + atomic_dec(&sc->stripes); + /* Remove from hash if on before deletion. */ + stripe_hash_del(stripe); + stripe_free(stripe, sc->mem_cache_client); + } else { + r = -ENOENT; + break; + } + } + + /* Check if stats are still sane. */ + if (atomic_read(&sc->active_stripes_max) > + atomic_read(&sc->stripes)) + atomic_set(&sc->active_stripes_max, 0); + + if (r) + return r; + + return atomic_read(&sc->stripes) ? sc_hash_resize(sc) : 0; +} + +/* Create stripe cache and recovery. */ +static int sc_init(struct raid_set *rs, unsigned stripes) +{ + unsigned i, r, rstripes; + struct stripe_cache *sc = &rs->sc; + struct stripe *stripe; + struct recover *rec = &rs->recover; + struct mapped_device *md; + struct gendisk *disk; + + /* Initialize lists and locks. */ + i = ARRAY_SIZE(sc->lists); + while (i--) + INIT_LIST_HEAD(sc->lists + i); + + INIT_LIST_HEAD(&rec->stripes); + + /* Initialize endio and LRU list locks. */ + i = NR_LOCKS; + while (i--) + spin_lock_init(sc->locks + i); + + /* Initialize atomic variables. */ + atomic_set(&sc->stripes, 0); + atomic_set(&sc->stripes_to_set, 0); + atomic_set(&sc->active_stripes, 0); + atomic_set(&sc->active_stripes_max, 0); /* REMOVEME: statistics. */ + + /* + * We need a runtime unique # to suffix the kmem cache name + * because we'll have one for each active RAID set. + */ + md = dm_table_get_md(rs->ti->table); + disk = dm_disk(md); + sprintf(sc->kc.name, "%s-%d", TARGET, disk->first_minor); + dm_put(md); + sc->kc.cache = kmem_cache_create(sc->kc.name, stripe_size(rs), + 0, 0, NULL); + if (!sc->kc.cache) + return -ENOMEM; + + /* Create memory cache client context for RAID stripe cache. */ + sc->mem_cache_client = + dm_mem_cache_client_create(stripes, rs->set.raid_devs, + chunk_pages(rs->set.io_size)); + if (IS_ERR(sc->mem_cache_client)) + return PTR_ERR(sc->mem_cache_client); + + /* Create memory cache client context for RAID recovery stripe(s). */ + rstripes = rec->recovery_stripes; + rec->mem_cache_client = + dm_mem_cache_client_create(rstripes, rs->set.raid_devs, + chunk_pages(rec->io_size)); + if (IS_ERR(rec->mem_cache_client)) + return PTR_ERR(rec->mem_cache_client); + + /* Create dm-io client context for IO stripes. */ + sc->dm_io_client = + dm_io_client_create((stripes > 32 ? 32 : stripes) * + rs->set.raid_devs * + chunk_pages(rs->set.io_size)); + if (IS_ERR(sc->dm_io_client)) + return PTR_ERR(sc->dm_io_client); + + /* FIXME: intermingeled with stripe cache initialization. */ + /* Create dm-io client context for recovery stripes. */ + rec->dm_io_client = + dm_io_client_create(rstripes * rs->set.raid_devs * + chunk_pages(rec->io_size)); + if (IS_ERR(rec->dm_io_client)) + return PTR_ERR(rec->dm_io_client); + + /* Allocate stripes for set recovery. */ + while (rstripes--) { + stripe = stripe_alloc(sc, rec->mem_cache_client, SC_KEEP); + if (!stripe) + return -ENOMEM; + + stripe->recover = kzalloc(sizeof(*stripe->recover), GFP_KERNEL); + if (!stripe->recover) { + stripe_free(stripe, rec->mem_cache_client); + return -ENOMEM; + } + + SetStripeRecover(stripe); + stripe->io.size = rec->io_size; + list_add_tail(stripe->lists + LIST_RECOVER, &rec->stripes); + /* Don't add recovery stripes to LRU list! */ + } + + /* + * Allocate the stripe objetcs from the + * cache and add them to the LRU list. + */ + r = sc_grow(sc, stripes, SC_KEEP); + if (!r) + atomic_set(&sc->stripes_last, stripes); + + return r; +} + +/* Destroy the stripe cache. */ +static void sc_exit(struct stripe_cache *sc) +{ + struct raid_set *rs = RS(sc); + + if (sc->kc.cache) { + stripe_recover_free(rs); + BUG_ON(sc_shrink(sc, atomic_read(&sc->stripes))); + kmem_cache_destroy(sc->kc.cache); + sc->kc.cache = NULL; + + if (sc->mem_cache_client && !IS_ERR(sc->mem_cache_client)) + dm_mem_cache_client_destroy(sc->mem_cache_client); + + if (sc->dm_io_client && !IS_ERR(sc->dm_io_client)) + dm_io_client_destroy(sc->dm_io_client); + + hash_exit(&sc->hash); + } +} + +/* + * Calculate RAID address + * + * Delivers tuple with the index of the data disk holding the chunk + * in the set, the parity disks index and the start of the stripe + * within the address space of the set (used as the stripe cache hash key). + */ +/* thx MD. */ +static struct raid_address *raid_address(struct raid_set *rs, sector_t sector, + struct raid_address *addr) +{ + sector_t stripe, tmp; + + /* + * chunk_number = sector / chunk_size + * stripe_number = chunk_number / data_devs + * di = stripe % data_devs; + */ + stripe = sector >> rs->set.chunk_shift; + addr->di = sector_div(stripe, rs->set.data_devs); + + switch (rs->set.raid_type->level) { + case raid4: + addr->pi = rs->set.pi; + goto check_shift_di; + case raid5: + tmp = stripe; + addr->pi = sector_div(tmp, rs->set.raid_devs); + + switch (rs->set.raid_type->algorithm) { + case left_asym: /* Left asymmetric. */ + addr->pi = rs->set.data_devs - addr->pi; + case right_asym: /* Right asymmetric. */ +check_shift_di: + if (addr->di >= addr->pi) + addr->di++; + break; + case left_sym: /* Left symmetric. */ + addr->pi = rs->set.data_devs - addr->pi; + case right_sym: /* Right symmetric. */ + addr->di = (addr->pi + addr->di + 1) % + rs->set.raid_devs; + break; + case none: /* Ain't happen: RAID4 algorithm placeholder. */ + BUG(); + } + } + + /* + * Start offset of the stripes chunk on any single device of the RAID + * set, adjusted in case io size differs from chunk size. + */ + addr->key = (stripe << rs->set.chunk_shift) + + (sector & rs->set.io_inv_mask); + return addr; +} + +/* + * Copy data across between stripe pages and bio vectors. + * + * Pay attention to data alignment in stripe and bio pages. + */ +static void bio_copy_page_list(int rw, struct stripe *stripe, + struct page_list *pl, struct bio *bio) +{ + unsigned i, page_offset; + void *page_addr; + struct raid_set *rs = RS(stripe->sc); + struct bio_vec *bv; + + /* Get start page in page list for this sector. */ + i = (bio->bi_sector & rs->set.io_mask) / SECTORS_PER_PAGE; + pl = pl_elem(pl, i); + BUG_ON(!pl); + BUG_ON(!pl->page); + + page_addr = page_address(pl->page); + page_offset = to_bytes(bio->bi_sector & (SECTORS_PER_PAGE - 1)); + + /* Walk all segments and copy data across between bio_vecs and pages. */ + bio_for_each_segment(bv, bio, i) { + int len = bv->bv_len, size; + unsigned bio_offset = 0; + void *bio_addr = __bio_kmap_atomic(bio, i, KM_USER0); +redo: + size = (page_offset + len > PAGE_SIZE) ? + PAGE_SIZE - page_offset : len; + + if (rw == READ) + memcpy(bio_addr + bio_offset, + page_addr + page_offset, size); + else + memcpy(page_addr + page_offset, + bio_addr + bio_offset, size); + + page_offset += size; + if (page_offset == PAGE_SIZE) { + /* + * We reached the end of the chunk page -> + * need to refer to the next one to copy more data. + */ + len -= size; + if (len) { + /* Get next page. */ + pl = pl->next; + BUG_ON(!pl); + BUG_ON(!pl->page); + page_addr = page_address(pl->page); + page_offset = 0; + bio_offset += size; + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_BIO_COPY_PL_NEXT); + goto redo; + } + } + + __bio_kunmap_atomic(bio_addr, KM_USER0); + } +} + +/* + * Xor optimization macros. + */ +/* Xor data pointer declaration and initialization macros. */ +#define DECLARE_2 unsigned long *d0 = data[0], *d1 = data[1] +#define DECLARE_3 DECLARE_2, *d2 = data[2] +#define DECLARE_4 DECLARE_3, *d3 = data[3] +#define DECLARE_5 DECLARE_4, *d4 = data[4] +#define DECLARE_6 DECLARE_5, *d5 = data[5] +#define DECLARE_7 DECLARE_6, *d6 = data[6] +#define DECLARE_8 DECLARE_7, *d7 = data[7] + +/* Xor unrole macros. */ +#define D2(n) d0[n] = d0[n] ^ d1[n] +#define D3(n) D2(n) ^ d2[n] +#define D4(n) D3(n) ^ d3[n] +#define D5(n) D4(n) ^ d4[n] +#define D6(n) D5(n) ^ d5[n] +#define D7(n) D6(n) ^ d6[n] +#define D8(n) D7(n) ^ d7[n] + +#define X_2(macro, offset) macro(offset); macro(offset + 1); +#define X_4(macro, offset) X_2(macro, offset); X_2(macro, offset + 2); +#define X_8(macro, offset) X_4(macro, offset); X_4(macro, offset + 4); +#define X_16(macro, offset) X_8(macro, offset); X_8(macro, offset + 8); +#define X_32(macro, offset) X_16(macro, offset); X_16(macro, offset + 16); +#define X_64(macro, offset) X_32(macro, offset); X_32(macro, offset + 32); + +/* Define a _xor_#chunks_#xors_per_run() function. */ +#define _XOR(chunks, xors_per_run) \ +static void _xor ## chunks ## _ ## xors_per_run(unsigned long **data) \ +{ \ + unsigned end = XOR_SIZE / sizeof(data[0]), i; \ + DECLARE_ ## chunks; \ +\ + for (i = 0; i < end; i += xors_per_run) { \ + X_ ## xors_per_run(D ## chunks, i); \ + } \ +} + +/* Define xor functions for 2 - 8 chunks and xors per run. */ +#define MAKE_XOR_PER_RUN(xors_per_run) \ + _XOR(2, xors_per_run); _XOR(3, xors_per_run); \ + _XOR(4, xors_per_run); _XOR(5, xors_per_run); \ + _XOR(6, xors_per_run); _XOR(7, xors_per_run); \ + _XOR(8, xors_per_run); + +MAKE_XOR_PER_RUN(8) /* Define _xor_*_8() functions. */ +MAKE_XOR_PER_RUN(16) /* Define _xor_*_16() functions. */ +MAKE_XOR_PER_RUN(32) /* Define _xor_*_32() functions. */ +MAKE_XOR_PER_RUN(64) /* Define _xor_*_64() functions. */ + +#define MAKE_XOR(xors_per_run) \ +struct { \ + void (*f)(unsigned long **); \ +} static xor_funcs ## xors_per_run[] = { \ + { NULL }, /* NULL pointers to optimize indexing in xor(). */ \ + { NULL }, \ + { _xor2_ ## xors_per_run }, \ + { _xor3_ ## xors_per_run }, \ + { _xor4_ ## xors_per_run }, \ + { _xor5_ ## xors_per_run }, \ + { _xor6_ ## xors_per_run }, \ + { _xor7_ ## xors_per_run }, \ + { _xor8_ ## xors_per_run }, \ +}; \ +\ +static void xor_ ## xors_per_run(unsigned n, unsigned long **data) \ +{ \ + /* Call respective function for amount of chunks. */ \ + xor_funcs ## xors_per_run[n].f(data); \ +} + +/* Define xor_8() - xor_64 functions. */ +MAKE_XOR(8) +MAKE_XOR(16) +MAKE_XOR(32) +MAKE_XOR(64) + +/* Maximum number of chunks, which can be xor'ed in one go. */ +#define XOR_CHUNKS_MAX (ARRAY_SIZE(xor_funcs8) - 1) + +static void xor_blocks_wrapper(unsigned n, unsigned long **data) +{ + BUG_ON(n < 2 || n > MAX_XOR_BLOCKS + 1); + xor_blocks(n - 1, XOR_SIZE, (void *) data[0], (void **) data + 1); +} + +struct xor_func { + xor_function_t f; + const char *name; +} static xor_funcs[] = { + { xor_8, "xor_8" }, + { xor_16, "xor_16" }, + { xor_32, "xor_32" }, + { xor_64, "xor_64" }, + { xor_blocks_wrapper, "xor_blocks" }, +}; + +/* + * Check, if chunk has to be xored in/out: + * + * o if writes are queued + * o if writes are merged + * o if stripe is to be reconstructed + * o if recovery stripe + */ +static inline int chunk_must_xor(struct stripe_chunk *chunk) +{ + if (ChunkUptodate(chunk)) { + BUG_ON(!bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED)) && + !bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED))); + + if (!bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED)) || + !bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED))) + return 1; + + if (StripeReconstruct(chunk->stripe) || + StripeRecover(chunk->stripe)) + return 1; + } + + return 0; +} + +/* + * Calculate crc. + * + * This indexes into the chunks of a stripe and their pages. + * + * All chunks will be xored into the indexed (@pi) + * chunk in maximum groups of xor.chunks. + * + */ +static void xor(struct stripe *stripe, unsigned pi, unsigned sector) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned max_chunks = rs->xor.chunks, n = 1, + o = sector / SECTORS_PER_PAGE, /* Offset into the page_list. */ + p = rs->set.raid_devs; + unsigned long **d = rs->data; + xor_function_t xor_f = rs->xor.f->f; + + BUG_ON(sector > stripe->io.size); + + /* Address of parity page to xor into. */ + d[0] = page_address(pl_elem(PL(stripe, pi), o)->page); + + while (p--) { + /* Preset pointers to data pages. */ + if (p != pi && chunk_must_xor(CHUNK(stripe, p))) + d[n++] = page_address(pl_elem(PL(stripe, p), o)->page); + + /* If max chunks -> xor. */ + if (n == max_chunks) { + xor_f(n, d); + n = 1; + } + } + + /* If chunks -> xor. */ + if (n > 1) + xor_f(n, d); +} + +/* Common xor loop through all stripe page lists. */ +static void common_xor(struct stripe *stripe, sector_t count, + unsigned off, unsigned pi) +{ + unsigned sector; + + BUG_ON(!count); + for (sector = off; sector < count; sector += SECTORS_PER_PAGE) + xor(stripe, pi, sector); + + /* Set parity page uptodate and clean. */ + chunk_set(CHUNK(stripe, pi), CLEAN); + atomic_inc(RS(stripe->sc)->stats + S_XORS); /* REMOVEME: statistics. */ +} + +/* + * Calculate parity sectors on intact stripes. + * + * Need to calculate raid address for recover stripe, because its + * chunk sizes differs and is typically larger than io chunk size. + */ +static void parity_xor(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned chunk_size = rs->set.chunk_size, io_size = stripe->io.size, + xor_size = chunk_size > io_size ? io_size : chunk_size; + sector_t off; + + /* This can be the recover stripe with a larger io size. */ + for (off = 0; off < io_size; off += xor_size) { + /* + * Recover stripe is likely bigger than regular io + * ones and has no precalculated parity disk index -> + * need to calculate RAID address. + */ + if (unlikely(StripeRecover(stripe))) { + struct raid_address addr; + + raid_address(rs, + (stripe->key + off) * rs->set.data_devs, + &addr); + stripe->idx.parity = addr.pi; + stripe_zero_pl_part(stripe, addr.pi, off, xor_size); + } + + common_xor(stripe, xor_size, off, stripe->idx.parity); + chunk_set(CHUNK(stripe, stripe->idx.parity), DIRTY); + } +} + +/* Reconstruct missing chunk. */ +static void stripe_reconstruct(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + int p = rs->set.raid_devs, pr = stripe->idx.recover; + + BUG_ON(pr < 0); + + /* Check if all but the chunk to be reconstructed are uptodate. */ + while (p--) + BUG_ON(p != pr && !ChunkUptodate(CHUNK(stripe, p))); + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + (RSDegraded(rs) ? S_RECONSTRUCT_EI : + S_RECONSTRUCT_DEV)); + /* Zero chunk to be reconstructed. */ + stripe_zero_chunk(stripe, pr); + common_xor(stripe, stripe->io.size, 0, pr); + stripe->idx.recover = -1; +} + +/* + * Recovery io throttling + */ +/* Conditionally reset io counters. */ +static int recover_io_reset(struct raid_set *rs) +{ + unsigned long j = jiffies; + + /* Pay attention to jiffies overflows. */ + if (j > rs->recover.last_jiffies + HZ / 20 || + j < rs->recover.last_jiffies) { + atomic_set(rs->recover.io_count + IO_WORK, 0); + atomic_set(rs->recover.io_count + IO_RECOVER, 0); + rs->recover.last_jiffies = j; + return 1; + } + + return 0; +} + +/* Count ios. */ +static void recover_io_count(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + + recover_io_reset(rs); + atomic_inc(rs->recover.io_count + + (StripeRecover(stripe) ? IO_RECOVER : IO_WORK)); +} + +/* Try getting a stripe either from the hash or from the LRU list. */ +static struct stripe *stripe_find(struct raid_set *rs, + struct raid_address *addr) +{ + int r; + struct stripe_cache *sc = &rs->sc; + struct stripe *stripe; + + /* Try stripe from hash. */ + stripe = stripe_lookup(sc, addr->key); + if (stripe) { + r = stripe_get(stripe); + if (r) + goto get_lock_failed; + + atomic_inc(rs->stats + S_HITS_1ST); /* REMOVEME: statistics. */ + } else { + /* Not in hash -> try to get an LRU stripe. */ + stripe = stripe_lru_pop(sc); + if (stripe) { + /* + * An LRU stripe may not be referenced + * and may never have ios pending! + */ + BUG_ON(stripe_ref(stripe)); + BUG_ON(stripe_io_ref(stripe)); + + /* Remove from hash if on before reuse. */ + stripe_hash_del(stripe); + + /* Invalidate before reinserting with changed key. */ + stripe_invalidate(stripe); + + stripe->key = addr->key; + stripe->region = dm_rh_sector_to_region(rs->recover.rh, + addr->key); + stripe->idx.parity = addr->pi; + r = stripe_get(stripe); + if (r) + goto get_lock_failed; + + /* Insert stripe into the stripe hash. */ + stripe_insert(&sc->hash, stripe); + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_INSCACHE); + } + } + + return stripe; + +get_lock_failed: + stripe_put(stripe); + return NULL; +} + +/* + * Process end io + * + * I need to do it here because I can't in interrupt + */ +/* End io all bios on a bio list. */ +static void bio_list_endio(struct stripe *stripe, struct bio_list *bl, + int p, int error) +{ + struct raid_set *rs = RS(stripe->sc); + struct bio *bio; + struct page_list *pl = PL(stripe, p); + struct stripe_chunk *chunk = CHUNK(stripe, p); + + /* Update region counters. */ + while ((bio = bio_list_pop(bl))) { + if (bio_data_dir(bio) == WRITE) + /* Drop io pending count for any writes. */ + dm_rh_dec(rs->recover.rh, stripe->region); + else if (!error) + /* Copy data accross. */ + bio_copy_page_list(READ, stripe, pl, bio); + + bio_endio(bio, error); + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + (bio_data_dir(bio) == READ ? + S_BIOS_ENDIO_READ : S_BIOS_ENDIO_WRITE)); + + chunk_put(chunk); + stripe_put(stripe); + io_put(rs); /* Wake any suspend waiters on last bio. */ + } +} + +/* + * End io all reads/writes on a stripe copying + * read data accross from stripe to bios and + * decrementing region counters for writes. + * + * Processing of ios depeding on state: + * o no chunk error -> endio ok + * o degraded: + * - chunk error and read -> ignore to be requeued + * - chunk error and write -> endio ok + * o dead (more than parity_devs failed) and chunk_error-> endio failed + */ +static void stripe_endio(int rw, struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned p = rs->set.raid_devs; + int write = (rw != READ); + + while (p--) { + struct stripe_chunk *chunk = CHUNK(stripe, p); + struct bio_list *bl; + + BUG_ON(ChunkLocked(chunk)); + + bl = BL_CHUNK(chunk, rw); + if (bio_list_empty(bl)) + continue; + + if (unlikely(ChunkError(chunk) || !ChunkUptodate(chunk))) { + /* RAID set dead. */ + if (unlikely(RSDead(rs))) + bio_list_endio(stripe, bl, p, -EIO); + /* RAID set degraded. */ + else if (write) + bio_list_endio(stripe, bl, p, 0); + } else { + BUG_ON(!RSDegraded(rs) && ChunkDirty(chunk)); + bio_list_endio(stripe, bl, p, 0); + } + } +} + +/* Fail all ios hanging off all bio lists of a stripe. */ +static void stripe_fail_io(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned p = rs->set.raid_devs; + + while (p--) { + struct stripe_chunk *chunk = CHUNK(stripe, p); + int i = ARRAY_SIZE(chunk->bl); + + /* Fail all bios on all bio lists of the stripe. */ + while (i--) { + struct bio_list *bl = chunk->bl + i; + + if (!bio_list_empty(bl)) + bio_list_endio(stripe, bl, p, -EIO); + } + } + + /* Put stripe on LRU list. */ + BUG_ON(stripe_io_ref(stripe)); + BUG_ON(stripe_ref(stripe)); +} + +/* Unlock all required chunks. */ +static void stripe_chunks_unlock(struct stripe *stripe) +{ + unsigned p = RS(stripe->sc)->set.raid_devs; + struct stripe_chunk *chunk; + + while (p--) { + chunk = CHUNK(stripe, p); + + if (TestClearChunkUnlock(chunk)) + ClearChunkLocked(chunk); + } +} + +/* + * Queue reads and writes to a stripe by hanging + * their bios off the stripesets read/write lists. + */ +static int stripe_queue_bio(struct raid_set *rs, struct bio *bio, + struct bio_list *reject) +{ + struct raid_address addr; + struct stripe *stripe; + + stripe = stripe_find(rs, raid_address(rs, bio->bi_sector, &addr)); + if (stripe) { + int r = 0, rw = bio_data_dir(bio); + + /* Distinguish reads and writes. */ + bio_list_add(BL(stripe, addr.di, rw), bio); + + if (rw == READ) + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_BIOS_ADDED_READ); + else { + /* Inrement pending write count on region. */ + dm_rh_inc(rs->recover.rh, stripe->region); + r = 1; + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_BIOS_ADDED_WRITE); + } + + /* + * Put on io (flush) list in case of + * initial bio queued to chunk. + */ + if (chunk_get(CHUNK(stripe, addr.di)) == 1) + stripe_flush_add(stripe); + + return r; + } + + /* Got no stripe from cache or failed to lock it -> reject bio. */ + bio_list_add(reject, bio); + atomic_inc(rs->stats + S_IOS_POST); /* REMOVEME: statistics. */ + return 0; +} + +/* + * Handle all stripes by handing them to the daemon, because we can't + * map their chunk pages to copy the data in interrupt context. + * + * We don't want to handle them here either, while interrupts are disabled. + */ + +/* Read/write endio function for dm-io (interrupt context). */ +static void endio(unsigned long error, void *context) +{ + struct stripe_chunk *chunk = context; + + if (unlikely(error)) { + chunk_set(chunk, ERROR); + /* REMOVEME: statistics. */ + atomic_inc(RS(chunk->stripe->sc)->stats + S_STRIPE_ERROR); + } else + chunk_set(chunk, CLEAN); + + /* + * For recovery stripes, I need to reset locked locked + * here, because those aren't processed in do_endios(). + */ + if (unlikely(StripeRecover(chunk->stripe))) + ClearChunkLocked(chunk); + else + SetChunkUnlock(chunk); + + /* Indirectly puts stripe on cache's endio list via stripe_io_put(). */ + stripe_put_references(chunk->stripe); +} + +/* Read/Write a chunk asynchronously. */ +static void stripe_chunk_rw(struct stripe *stripe, unsigned p) +{ + struct stripe_cache *sc = stripe->sc; + struct raid_set *rs = RS(sc); + struct dm_mem_cache_object *obj = stripe->obj + p; + struct page_list *pl = obj->pl; + struct stripe_chunk *chunk = CHUNK(stripe, p); + struct raid_dev *dev = rs->dev + p; + struct dm_io_region io = { + .bdev = dev->dev->bdev, + .sector = stripe->key, + .count = stripe->io.size, + }; + struct dm_io_request control = { + .bi_rw = ChunkDirty(chunk) ? WRITE : READ, + .mem = { + .type = DM_IO_PAGE_LIST, + .ptr.pl = pl, + .offset = 0, + }, + .notify = { + .fn = endio, + .context = chunk, + }, + .client = StripeRecover(stripe) ? rs->recover.dm_io_client : + sc->dm_io_client, + }; + + BUG_ON(ChunkLocked(chunk)); + BUG_ON(!ChunkUptodate(chunk) && ChunkDirty(chunk)); + BUG_ON(ChunkUptodate(chunk) && !ChunkDirty(chunk)); + + /* + * Don't rw past end of device, which can happen, because + * typically sectors_per_dev isn't divisible by io_size. + */ + if (unlikely(io.sector + io.count > rs->set.sectors_per_dev)) + io.count = rs->set.sectors_per_dev - io.sector; + + BUG_ON(!io.count); + io.sector += dev->start; /* Add . */ + if (RSRecover(rs)) + recover_io_count(stripe); /* Recovery io accounting. */ + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + (ChunkDirty(chunk) ? S_DM_IO_WRITE : + S_DM_IO_READ)); + SetChunkLocked(chunk); + SetDevIoQueued(dev); + BUG_ON(dm_io(&control, 1, &io, NULL)); +} + +/* + * Write dirty or read not uptodate page lists of a stripe. + */ +static int stripe_chunks_rw(struct stripe *stripe) +{ + int r; + struct raid_set *rs = RS(stripe->sc); + + /* + * Increment the pending count on the stripe + * first, so that we don't race in endio(). + * + * An inc (IO) is needed for any chunk unless !ChunkIo(chunk): + * + * o not uptodate + * o dirtied by writes merged + * o dirtied by parity calculations + */ + r = for_each_io_dev(stripe, stripe_get_references); + if (r) { + /* Io needed: chunks are either not uptodate or dirty. */ + int max; /* REMOVEME: */ + struct stripe_cache *sc = &rs->sc; + + /* Submit actual io. */ + for_each_io_dev(stripe, stripe_chunk_rw); + + /* REMOVEME: statistics */ + max = sc_active(sc); + if (atomic_read(&sc->active_stripes_max) < max) + atomic_set(&sc->active_stripes_max, max); + + atomic_inc(rs->stats + S_FLUSHS); + /* END REMOVEME: statistics */ + } + + return r; +} + +/* Merge in all writes hence dirtying respective chunks. */ +static void stripe_merge_writes(struct stripe *stripe) +{ + unsigned p = RS(stripe->sc)->set.raid_devs; + + while (p--) { + struct stripe_chunk *chunk = CHUNK(stripe, p); + struct bio_list *write = BL_CHUNK(chunk, WRITE_QUEUED); + + if (!bio_list_empty(write)) { + struct bio *bio; + struct page_list *pl = stripe->obj[p].pl; + + /* + * We can play with the lists without holding a lock, + * because it is just us accessing them anyway. + */ + bio_list_for_each(bio, write) + bio_copy_page_list(WRITE, stripe, pl, bio); + + bio_list_merge(BL_CHUNK(chunk, WRITE_MERGED), write); + bio_list_init(write); + chunk_set(chunk, DIRTY); + } + } +} + +/* Queue all writes to get merged. */ +static int stripe_queue_writes(struct stripe *stripe) +{ + int r = 0; + unsigned p = RS(stripe->sc)->set.raid_devs; + + while (p--) { + struct stripe_chunk *chunk = CHUNK(stripe, p); + struct bio_list *write = BL_CHUNK(chunk, WRITE); + + if (!bio_list_empty(write)) { + bio_list_merge(BL_CHUNK(chunk, WRITE_QUEUED), write); + bio_list_init(write); +SetChunkIo(chunk); + r = 1; + } + } + + return r; +} + + +/* Check, if a chunk gets completely overwritten. */ +static int stripe_check_chunk_overwrite(struct stripe *stripe, unsigned p) +{ + unsigned sectors = 0; + struct bio *bio; + struct bio_list *bl = BL(stripe, p, WRITE_QUEUED); + + bio_list_for_each(bio, bl) + sectors += bio_sectors(bio); + + BUG_ON(sectors > RS(stripe->sc)->set.io_size); + return sectors == RS(stripe->sc)->set.io_size; +} + +/* + * Avoid io on broken/reconstructed drive in order to + * reconstruct date on endio. + * + * (*1*) We set StripeReconstruct() in here, so that _do_endios() + * will trigger a reconstruct call before resetting it. + */ +static int stripe_chunk_set_io_flags(struct stripe *stripe, int pr) +{ + struct stripe_chunk *chunk = CHUNK(stripe, pr); + + /* + * Allow io on all chunks but the indexed one, + * because we're either degraded or prohibit it + * on the one for later reconstruction. + */ + /* Includes ClearChunkIo(), ClearChunkUptodate(). */ + stripe_chunk_invalidate(chunk); + stripe->idx.recover = pr; + SetStripeReconstruct(stripe); + + /* REMOVEME: statistics. */ + atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO); + return -EPERM; +} + +/* Chunk locked/uptodate and device failed tests. */ +static struct stripe_chunk * +stripe_chunk_check(struct stripe *stripe, unsigned p, unsigned *chunks_uptodate) +{ + struct raid_set *rs = RS(stripe->sc); + struct stripe_chunk *chunk = CHUNK(stripe, p); + + /* Can't access active chunks. */ + if (ChunkLocked(chunk)) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_CHUNK_LOCKED); + return NULL; + } + + /* Can't access broken devive. */ + if (ChunkError(chunk) || DevFailed(rs->dev + p)) + return NULL; + + /* Can access uptodate chunks. */ + if (ChunkUptodate(chunk)) { + (*chunks_uptodate)++; + return NULL; + } + + return chunk; +} + +/* + * Degraded/reconstruction mode. + * + * Check stripe state to figure which chunks don't need IO. + * + * Returns 0 for fully operational, -EPERM for degraded/resynchronizing. + */ +static int stripe_check_reconstruct(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + + if (RSDead(rs)) { + ClearStripeReconstruct(stripe); + ClearStripeReconstructed(stripe); + stripe_allow_io(stripe); + return 0; + } + + /* Avoid further reconstruction setting, when already set. */ + if (StripeReconstruct(stripe)) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_RECONSTRUCT_SET); + return -EBUSY; + } + + /* Initially allow io on all chunks. */ + stripe_allow_io(stripe); + + /* Return if stripe is already reconstructed. */ + if (StripeReconstructed(stripe)) { + atomic_inc(rs->stats + S_RECONSTRUCTED); + return 0; + } + + /* + * Degraded/reconstruction mode (device failed) -> + * avoid io on the failed device. + */ + if (unlikely(RSDegraded(rs))) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_DEGRADED); + /* Allow IO on all devices but the dead one. */ + BUG_ON(rs->set.ei < 0); + return stripe_chunk_set_io_flags(stripe, rs->set.ei); + } else { + int sync, pi = dev_for_parity(stripe, &sync); + + /* + * Reconstruction mode (ie. a particular (replaced) device or + * some (rotating) parity chunk is being resynchronized) -> + * o make sure all needed chunks are read in + * o writes are allowed to go through + */ + if (!sync) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_NOSYNC); + /* Allow IO on all devs but the one to reconstruct. */ + return stripe_chunk_set_io_flags(stripe, pi); + } + } + + return 0; +} + +/* + * Check, if stripe is ready to merge writes. + * I.e. if all chunks present to allow to merge bios. + * + * We prohibit io on: + * + * o chunks without bios + * o chunks which get completely written over + */ +static int stripe_merge_possible(struct stripe *stripe, int nosync) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned chunks_overwrite = 0, chunks_prohibited = 0, + chunks_uptodate = 0, p = rs->set.raid_devs; + + /* Walk all chunks. */ + while (p--) { + struct stripe_chunk *chunk; + + /* Prohibit io on broken devices. */ + if (DevFailed(rs->dev + p)) { + chunk = CHUNK(stripe, p); + goto prohibit_io; + } + + /* We can't optimize any further if no chunk. */ + chunk = stripe_chunk_check(stripe, p, &chunks_uptodate); + if (!chunk || nosync) + continue; + + /* + * We have a chunk, which is not uptodate. + * + * If this is not parity and we don't have + * reads queued, we can optimize further. + */ + if (p != stripe->idx.parity && + bio_list_empty(BL_CHUNK(chunk, READ)) && + bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED))) { + if (bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED))) + goto prohibit_io; + else if (RSCheckOverwrite(rs) && + stripe_check_chunk_overwrite(stripe, p)) + /* Completely overwritten chunk. */ + chunks_overwrite++; + } + + /* Allow io for chunks with bios and overwritten ones. */ + SetChunkIo(chunk); + continue; + +prohibit_io: + /* No io for broken devices or for chunks w/o bios. */ + ClearChunkIo(chunk); + chunks_prohibited++; + /* REMOVEME: statistics. */ + atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO); + } + + /* All data chunks will get written over. */ + if (chunks_overwrite == rs->set.data_devs) + atomic_inc(rs->stats + S_OVERWRITE); /* REMOVEME: statistics.*/ + else if (chunks_uptodate + chunks_prohibited < rs->set.raid_devs) { + /* We don't have enough chunks to merge. */ + atomic_inc(rs->stats + S_CANT_MERGE); /* REMOVEME: statistics.*/ + return -EPERM; + } + + /* + * If we have all chunks up to date or overwrite them, we + * just zero the parity chunk and let stripe_rw() recreate it. + */ + if (chunks_uptodate == rs->set.raid_devs || + chunks_overwrite == rs->set.data_devs) { + stripe_zero_chunk(stripe, stripe->idx.parity); + BUG_ON(StripeReconstruct(stripe)); + SetStripeReconstruct(stripe); /* Enforce xor in caller. */ + } else { + /* + * With less chunks, we xor parity out. + * + * (*4*) We rely on !StripeReconstruct() in chunk_must_xor(), + * so that only chunks with queued or merged writes + * are being xored. + */ + parity_xor(stripe); + } + + /* + * We do have enough chunks to merge. + * All chunks are uptodate or get written over. + */ + atomic_inc(rs->stats + S_CAN_MERGE); /* REMOVEME: statistics. */ + return 0; +} + +/* + * Avoid reading chunks in case we're fully operational. + * + * We prohibit io on any chunks without bios but the parity chunk. + */ +static void stripe_avoid_reads(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + unsigned dummy = 0, p = rs->set.raid_devs; + + /* Walk all chunks. */ + while (p--) { + struct stripe_chunk *chunk = + stripe_chunk_check(stripe, p, &dummy); + + if (!chunk) + continue; + + /* If parity or any bios pending -> allow io. */ + if (chunk_ref(chunk) || p == stripe->idx.parity) + SetChunkIo(chunk); + else { + ClearChunkIo(chunk); + /* REMOVEME: statistics. */ + atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO); + } + } +} + +/* + * Read/write a stripe. + * + * All stripe read/write activity goes through this function + * unless recovery, which has to call stripe_chunk_rw() directly. + * + * Make sure we don't try already merged stripes in order + * to avoid data corruption. + * + * Check the state of the RAID set and if degraded (or + * resynchronizing for reads), read in all other chunks but + * the one on the dead/resynchronizing device in order to be + * able to reconstruct the missing one in _do_endios(). + * + * Can be called on active stripes in order + * to dispatch new io on inactive chunks. + * + * States to cover: + * o stripe to read and/or write + * o stripe with error to reconstruct + */ +static void stripe_rw(struct stripe *stripe) +{ + int nosync, r; + struct raid_set *rs = RS(stripe->sc); + + /* + * Check, if a chunk needs to be reconstructed + * because of a degraded set or a region out of sync. + */ + nosync = stripe_check_reconstruct(stripe); + switch (nosync) { + case -EBUSY: + return; /* Wait for stripe reconstruction to finish. */ + case -EPERM: + goto io; + } + + /* + * If we don't have merged writes pending, we can schedule + * queued writes to be merged next without corrupting data. + */ + if (!StripeMerged(stripe)) { + r = stripe_queue_writes(stripe); + if (r) + /* Writes got queued -> flag RBW. */ + SetStripeRBW(stripe); + } + + /* + * Merge all writes hanging off uptodate/overwritten + * chunks of the stripe. + */ + if (StripeRBW(stripe)) { + r = stripe_merge_possible(stripe, nosync); + if (!r) { /* Merge possible. */ + struct stripe_chunk *chunk; + + /* + * I rely on valid parity in order + * to xor a fraction of chunks out + * of parity and back in. + */ + stripe_merge_writes(stripe); /* Merge writes in. */ + parity_xor(stripe); /* Update parity. */ + ClearStripeReconstruct(stripe); /* Reset xor enforce. */ + SetStripeMerged(stripe); /* Writes merged. */ + ClearStripeRBW(stripe); /* Disable RBW. */ + + /* + * REMOVEME: sanity check on parity chunk + * states after writes got merged. + */ + chunk = CHUNK(stripe, stripe->idx.parity); + BUG_ON(ChunkLocked(chunk)); + BUG_ON(!ChunkUptodate(chunk)); + BUG_ON(!ChunkDirty(chunk)); + BUG_ON(!ChunkIo(chunk)); + } + } else if (!nosync && !StripeMerged(stripe)) + /* Read avoidance if not degraded/resynchronizing/merged. */ + stripe_avoid_reads(stripe); + +io: + /* Now submit any reads/writes for non-uptodate or dirty chunks. */ + r = stripe_chunks_rw(stripe); + if (!r) { + /* + * No io submitted because of chunk io + * prohibited or locked chunks/failed devices + * -> push to end io list for processing. + */ + stripe_endio_push(stripe); + atomic_inc(rs->stats + S_NO_RW); /* REMOVEME: statistics. */ + } +} + +/* + * Recovery functions + */ +/* Read a stripe off a raid set for recovery. */ +static int stripe_recover_read(struct stripe *stripe, int pi) +{ + BUG_ON(stripe_io_ref(stripe)); + + /* Invalidate all chunks so that they get read in. */ + stripe_chunks_invalidate(stripe); + stripe_allow_io(stripe); /* Allow io on all recovery chunks. */ + + /* + * If we are reconstructing a perticular device, we can avoid + * reading the respective chunk in, because we're going to + * reconstruct it anyway. + * + * We can't do that for resynchronization of rotating parity, + * because the recovery stripe chunk size is typically larger + * than the sets chunk size. + */ + if (pi > -1) + ClearChunkIo(CHUNK(stripe, pi)); + + return stripe_chunks_rw(stripe); +} + +/* Write a stripe to a raid set for recovery. */ +static int stripe_recover_write(struct stripe *stripe, int pi) +{ + BUG_ON(stripe_io_ref(stripe)); + + /* + * If this is a reconstruct of a particular device, then + * reconstruct the respective chunk, else create parity chunk. + */ + if (pi > -1) { + stripe_zero_chunk(stripe, pi); + common_xor(stripe, stripe->io.size, 0, pi); + chunk_set(CHUNK(stripe, pi), DIRTY); + } else + parity_xor(stripe); + + return stripe_chunks_rw(stripe); +} + +/* Read/write a recovery stripe. */ +static int stripe_recover_rw(struct stripe *stripe) +{ + int r = 0, sync = 0; + + /* Read/write flip-flop. */ + if (TestClearStripeRBW(stripe)) { + SetStripeMerged(stripe); + stripe->key = stripe->recover->pos; + r = stripe_recover_read(stripe, dev_for_parity(stripe, &sync)); + BUG_ON(!r); + } else if (TestClearStripeMerged(stripe)) { + r = stripe_recover_write(stripe, dev_for_parity(stripe, &sync)); + BUG_ON(!r); + } + + BUG_ON(sync); + return r; +} + +/* Recover bandwidth available ?. */ +static int recover_bandwidth(struct raid_set *rs) +{ + int r, work; + + /* On reset or when bios delayed -> allow recovery. */ + r = recover_io_reset(rs); + if (r || RSBandwidth(rs)) + goto out; + + work = atomic_read(rs->recover.io_count + IO_WORK); + if (work) { + /* Pay attention to larger recover stripe size. */ + int recover = atomic_read(rs->recover.io_count + IO_RECOVER) * + rs->recover.io_size / rs->set.io_size; + + /* + * Don't use more than given bandwidth + * of the work io for recovery. + */ + if (recover > work / rs->recover.bandwidth_work) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_NO_BANDWIDTH); + return 0; + } + } + +out: + atomic_inc(rs->stats + S_BANDWIDTH); /* REMOVEME: statistics. */ + return 1; +} + +/* Try to get a region to recover. */ +static int stripe_recover_get_region(struct stripe *stripe) +{ + struct raid_set *rs = RS(stripe->sc); + struct recover *rec = &rs->recover; + struct recover_addr *addr = stripe->recover; + struct dm_dirty_log *dl = rec->dl; + struct dm_rh_client *rh = rec->rh; + + BUG_ON(!dl); + BUG_ON(!rh); + + /* Return, that we have region first to finish it during suspension. */ + if (addr->reg) + return 1; + + if (RSSuspend(rs)) + return -EPERM; + + if (dl->type->get_sync_count(dl) >= rec->nr_regions) + return -ENOENT; + + /* If we don't have enough bandwidth, we don't proceed recovering. */ + if (!recover_bandwidth(rs)) + return -EAGAIN; + + /* Start quiescing a region. */ + dm_rh_recovery_prepare(rh); + addr->reg = dm_rh_recovery_start(rh); + if (!addr->reg) + return -EAGAIN; + + addr->pos = dm_rh_region_to_sector(rh, dm_rh_get_region_key(addr->reg)); + addr->end = addr->pos + dm_rh_get_region_size(rh); + + /* + * Take one global io reference out for the + * whole region, which is going to be released + * when the region is completely done with. + */ + io_get(rs); + return 0; +} + +/* Update region hash state. */ +enum recover_type { REC_FAILURE = 0, REC_SUCCESS = 1 }; +static void recover_rh_update(struct stripe *stripe, enum recover_type success) +{ + struct recover_addr *addr = stripe->recover; + struct raid_set *rs = RS(stripe->sc); + struct recover *rec = &rs->recover; + + if (!addr->reg) { + DMERR("%s- Called w/o region", __func__); + return; + } + + dm_rh_recovery_end(addr->reg, success); + if (success) + rec->nr_regions_recovered++; + + addr->reg = NULL; + + /* + * Completely done with this region -> + * release the 1st io reference. + */ + io_put(rs); +} + +/* Set start of recovery state. */ +static void set_start_recovery(struct raid_set *rs) +{ + /* Initialize recovery. */ + rs->recover.start_jiffies = jiffies; + rs->recover.end_jiffies = 0; +} + +/* Set end of recovery state. */ +static void set_end_recovery(struct raid_set *rs) +{ + ClearRSRecover(rs); + rs->set.dev_to_init = -1; + + /* Check for jiffies overrun. */ + rs->recover.end_jiffies = jiffies; + if (rs->recover.end_jiffies < rs->recover.start_jiffies) + rs->recover.end_jiffies = ~0; +} + +/* Handle recovery on one recovery stripe. */ +static int _do_recovery(struct stripe *stripe) +{ + int r; + struct raid_set *rs = RS(stripe->sc); + struct recover_addr *addr = stripe->recover; + + /* If recovery is active -> return. */ + if (stripe_io_ref(stripe)) + return 1; + + /* IO error is fatal for recovery -> stop it. */ + if (unlikely(StripeError(stripe))) + goto err; + + /* Recovery end required. */ + if (!RSRecover(rs)) + goto err; + + /* Get a region to recover. */ + r = stripe_recover_get_region(stripe); + switch (r) { + case 0: /* Got a new region: flag initial read before write. */ + SetStripeRBW(stripe); + case 1: /* Have a region in the works. */ + break; + case -EAGAIN: + /* No bandwidth/quiesced region yet, try later. */ + if (!io_ref(rs)) + wake_do_raid_delayed(rs, HZ / 4); + case -EPERM: + /* Suspend. */ + return 1; + case -ENOENT: /* No more regions to recover. */ + schedule_work(&rs->io.ws_do_table_event); + return 0; + default: + BUG(); + } + + /* Read/write a recover stripe. */ + r = stripe_recover_rw(stripe); + if (r) + /* IO initiated. */ + return 1; + + /* Read and write finished-> update recovery position within region. */ + addr->pos += stripe->io.size; + + /* If we're at end of region, update region hash. */ + if (addr->pos >= addr->end || + addr->pos >= rs->set.sectors_per_dev) + recover_rh_update(stripe, REC_SUCCESS); + else + /* Prepare to read next region segment. */ + SetStripeRBW(stripe); + + /* Schedule myself for another round... */ + wake_do_raid(rs); + return 1; + +err: + /* FIXME: rather try recovering other regions on error? */ + rs_check_degrade(stripe); + recover_rh_update(stripe, REC_FAILURE); + + /* Check state of partially recovered array. */ + if (RSDegraded(rs) && !RSDead(rs) && + rs->set.dev_to_init != -1 && + rs->set.ei != rs->set.dev_to_init) + /* Broken drive != drive to recover -> FATAL. */ + SetRSDead(rs); + + if (StripeError(stripe)) { + char buf[BDEVNAME_SIZE]; + + DMERR("stopping recovery due to " + "ERROR on /dev/%s, stripe at offset %llu", + bdevname(rs->dev[rs->set.ei].dev->bdev, buf), + (unsigned long long) stripe->key); + + } + + /* Make sure, that all quiesced regions get released. */ + while (addr->reg) { + dm_rh_recovery_end(addr->reg, -EIO); + addr->reg = dm_rh_recovery_start(rs->recover.rh); + } + + return 0; +} + +/* Called by main io daemon to recover regions. */ +static void do_recovery(struct raid_set *rs) +{ + if (RSRecover(rs)) { + int r = 0; + struct stripe *stripe; + + list_for_each_entry(stripe, &rs->recover.stripes, + lists[LIST_RECOVER]) + r += _do_recovery(stripe); + + if (!r) { + set_end_recovery(rs); + stripe_recover_free(rs); + } + } +} + +/* + * END recovery functions + */ + +/* End io process all stripes handed in by endio() callback. */ +static void _do_endios(struct raid_set *rs, struct stripe *stripe, + struct list_head *flush_list) +{ + /* First unlock all required chunks. */ + stripe_chunks_unlock(stripe); + + /* + * If an io error on a stripe occured, degrade the RAID set + * and try to endio as many bios as possible. If any bios can't + * be endio processed, requeue the stripe (stripe_ref() != 0). + */ + if (TestClearStripeError(stripe)) { + /* + * FIXME: if read, rewrite the failed chunk after reconstruction + * in order to trigger disk bad sector relocation. + */ + rs_check_degrade(stripe); /* Resets ChunkError(). */ + ClearStripeReconstruct(stripe); + ClearStripeReconstructed(stripe); + } + + /* Got to reconstruct a missing chunk. */ + if (StripeReconstruct(stripe)) { + /* + * (*2*) We use StripeReconstruct() to allow for + * all chunks to be xored into the reconstructed + * one (see chunk_must_xor()). + */ + stripe_reconstruct(stripe); + + /* + * (*3*) Now we reset StripeReconstruct() and flag + * StripeReconstructed() to show to stripe_rw(), + * that we have reconstructed a missing chunk. + */ + ClearStripeReconstruct(stripe); + SetStripeReconstructed(stripe); + + /* FIXME: reschedule to be written in case of read. */ + // if (!StripeRBW(stripe)) { + // chunk_set(CHUNK(stripe, pr), DIRTY); + // stripe_chunks_rw(stripe); + // } + } + + /* + * Now that we eventually got a complete stripe, we + * can process the rest of the end ios on reads. + */ + stripe_endio(READ, stripe); + + /* End io all merged writes. */ + if (TestClearStripeMerged(stripe)) + stripe_endio(WRITE_MERGED, stripe); + + /* If RAID set is dead -> fail any ios to dead drives. */ + if (RSDead(rs)) { + DMERR_LIMIT("RAID set dead: failing ios to dead devices"); + stripe_fail_io(stripe); + } + + /* + * We have stripe references still, + * beacuse of read befeore writes or IO errors -> + * got to put on flush list for processing. + */ + if (stripe_ref(stripe)) { + BUG_ON(!list_empty(stripe->lists + LIST_LRU)); + list_add_tail(stripe->lists + LIST_FLUSH, flush_list); + atomic_inc(rs->stats + S_REQUEUE); /* REMOVEME: statistics. */ + } else + stripe_lru_add(stripe); +} + +/* Pop any endio stripes off of the endio list and belabour them. */ +static void do_endios(struct raid_set *rs) +{ + struct stripe_cache *sc = &rs->sc; + struct stripe *stripe; + /* IO flush list for sorted requeued stripes. */ + struct list_head flush_list; + + INIT_LIST_HEAD(&flush_list); + + while ((stripe = stripe_endio_pop(sc))) { + /* Avoid endio on stripes with newly io'ed chunks. */ + if (!stripe_io_ref(stripe)) + _do_endios(rs, stripe, &flush_list); + } + + /* + * Insert any requeued stripes in the proper + * order at the beginning of the io (flush) list. + */ + list_splice(&flush_list, sc->lists + LIST_FLUSH); +} + +/* Flush any stripes on the io list. */ +static void do_flush(struct raid_set *rs) +{ + struct stripe *stripe; + + while ((stripe = stripe_io_pop(&rs->sc))) + stripe_rw(stripe); /* Read/write stripe. */ +} + +/* Stripe cache resizing. */ +static void do_sc_resize(struct raid_set *rs) +{ + unsigned set = atomic_read(&rs->sc.stripes_to_set); + + if (set) { + unsigned cur = atomic_read(&rs->sc.stripes); + int r = (set > cur) ? sc_grow(&rs->sc, set - cur, SC_GROW) : + sc_shrink(&rs->sc, cur - set); + + /* Flag end of resizeing if ok. */ + if (!r) + atomic_set(&rs->sc.stripes_to_set, 0); + } +} + +/* + * Process all ios + * + * We do different things with the io depending + * on the state of the region that it is in: + * + * o reads: hang off stripe cache or postpone if full + * + * o writes: + * + * CLEAN/DIRTY/NOSYNC: increment pending and hang io off stripe's stripe set. + * In case stripe cache is full or busy, postpone the io. + * + * RECOVERING: delay the io until recovery of the region completes. + * + */ +static void do_ios(struct raid_set *rs, struct bio_list *ios) +{ + int r; + unsigned flush = 0, delay = 0; + sector_t sector; + struct dm_rh_client *rh = rs->recover.rh; + struct bio *bio; + struct bio_list reject; + + bio_list_init(&reject); + + /* + * Classify each io: + * o delay writes to recovering regions (let reads go through) + * o queue io to all other regions + */ + while ((bio = bio_list_pop(ios))) { + /* + * In case we get a barrier bio, push it back onto + * the input queue unless all work queues are empty + * and the stripe cache is inactive. + */ + if (unlikely(bio_barrier(bio))) { + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + S_BARRIER); + if (delay || + !list_empty(rs->sc.lists + LIST_FLUSH) || + !bio_list_empty(&reject) || + sc_active(&rs->sc)) { + bio_list_push(ios, bio); + break; + } + } + + /* Check for recovering regions. */ + sector = _sector(rs, bio); + r = region_state(rs, sector, DM_RH_RECOVERING); + if (unlikely(r && bio_data_dir(bio) == WRITE)) { + delay++; + /* Wait writing to recovering regions. */ + dm_rh_delay_by_region(rh, bio, + dm_rh_sector_to_region(rh, + sector)); + /* REMOVEME: statistics.*/ + atomic_inc(rs->stats + S_DELAYED_BIOS); + atomic_inc(rs->stats + S_SUM_DELAYED_BIOS); + + /* Force bandwidth tests in recovery. */ + SetRSBandwidth(rs); + } else { + /* + * Process ios to non-recovering regions by queueing + * them to stripes (does dm_rh_inc()) for writes). + */ + flush += stripe_queue_bio(rs, bio, &reject); + } + } + + if (flush) { + /* FIXME: better error handling. */ + r = dm_rh_flush(rh); /* Writes got queued -> flush dirty log. */ + if (r) + DMERR_LIMIT("dirty log flush"); + } + + /* Merge any rejected bios back to the head of the input list. */ + bio_list_merge_head(ios, &reject); +} + +/* Unplug: let any queued io role on the sets devices. */ +static void do_unplug(struct raid_set *rs) +{ + struct raid_dev *dev = rs->dev + rs->set.raid_devs; + + while (dev-- > rs->dev) { + /* Only call any device unplug function, if io got queued. */ + if (TestClearDevIoQueued(dev)) + blk_unplug(bdev_get_queue(dev->dev->bdev)); + } +} + +/* Send an event in case we're getting too busy. */ +static void do_busy_event(struct raid_set *rs) +{ + if (sc_busy(rs)) { + if (!TestSetRSScBusy(rs)) + schedule_work(&rs->io.ws_do_table_event); + } + + ClearRSScBusy(rs); +} + +/* Throw an event. */ +static void do_table_event(struct work_struct *ws) +{ + struct raid_set *rs = container_of(ws, struct raid_set, + io.ws_do_table_event); + dm_table_event(rs->ti->table); +} + + +/*----------------------------------------------------------------- + * RAID daemon + *---------------------------------------------------------------*/ +/* + * o belabour all end ios + * o update the region hash states + * o optionally shrink the stripe cache + * o optionally do recovery + * o unplug any component raid devices with queued bios + * o grab the input queue + * o work an all requeued or new ios and perform stripe cache flushs + * o unplug any component raid devices with queued bios + * o check, if the stripe cache gets too busy and throw an event if so + */ +static void do_raid(struct work_struct *ws) +{ + struct raid_set *rs = container_of(ws, struct raid_set, + io.dws_do_raid.work); + struct bio_list *ios = &rs->io.work, *ios_in = &rs->io.in; + + /* + * We always need to end io, so that ios can get errored in + * case the set failed and the region counters get decremented + * before we update region hash states and go any further. + */ + do_endios(rs); + dm_rh_update_states(rs->recover.rh, 1); + + /* + * Now that we've end io'd, which may have put stripes on the LRU list + * to allow for shrinking, we resize the stripe cache if requested. + */ + do_sc_resize(rs); + + /* Try to recover regions. */ + do_recovery(rs); + do_unplug(rs); /* Unplug the sets device queues. */ + + /* Quickly grab all new ios queued and add them to the work list. */ + mutex_lock(&rs->io.in_lock); + bio_list_merge(ios, ios_in); + bio_list_init(ios_in); + mutex_unlock(&rs->io.in_lock); + + if (!bio_list_empty(ios)) + do_ios(rs, ios); /* Got ios to work into the cache. */ + + do_flush(rs); /* Flush any stripes on io list. */ + do_unplug(rs); /* Unplug the sets device queues. */ + do_busy_event(rs); /* Check if we got too busy. */ +} + +/* + * Callback for region hash to dispatch + * delayed bios queued to recovered regions + * (gets called via dm_rh_update_states()). + */ +static void dispatch_delayed_bios(void *context, struct bio_list *bl) +{ + struct raid_set *rs = context; + struct bio *bio; + + /* REMOVEME: statistics; decrement pending delayed bios counter. */ + bio_list_for_each(bio, bl) + atomic_dec(rs->stats + S_DELAYED_BIOS); + + /* Merge region hash private list to work list. */ + bio_list_merge_head(&rs->io.work, bl); + bio_list_init(bl); + ClearRSBandwidth(rs); +} + +/************************************************************* + * Constructor helpers + *************************************************************/ +/* Calculate MB/sec. */ +static unsigned mbpers(struct raid_set *rs, unsigned speed) +{ + return to_bytes(speed * rs->set.data_devs * + rs->recover.io_size * HZ >> 10) >> 10; +} + +/* + * Discover fastest xor algorithm and # of chunks combination. + */ +/* Calculate speed for algorithm and # of chunks. */ +static unsigned xor_speed(struct stripe *stripe) +{ + unsigned r = 0; + unsigned long j; + + /* Wait for next tick. */ + for (j = jiffies; j == jiffies; ) + ; + + /* Do xors for a full tick. */ + for (j = jiffies; j == jiffies; ) { + mb(); + common_xor(stripe, stripe->io.size, 0, 0); + mb(); + r++; + } + + return r; +} + +/* Optimize xor algorithm for this RAID set. */ +static unsigned xor_optimize(struct raid_set *rs) +{ + unsigned chunks_max = 2, p = rs->set.raid_devs, speed_max = 0; + struct xor_func *f = ARRAY_END(xor_funcs), *f_max = NULL; + struct stripe *stripe; + + BUG_ON(list_empty(&rs->recover.stripes)); + stripe = list_first_entry(&rs->recover.stripes, struct stripe, + lists[LIST_RECOVER]); + + /* Must set uptodate so that xor() will belabour chunks. */ + while (p--) + SetChunkUptodate(CHUNK(stripe, p)); + + /* Try all xor functions. */ + while (f-- > xor_funcs) { + unsigned speed; + + /* Set actual xor function for common_xor(). */ + rs->xor.f = f; + rs->xor.chunks = (f->f == xor_blocks_wrapper ? + (MAX_XOR_BLOCKS + 1) : XOR_CHUNKS_MAX) + 1; + + while (rs->xor.chunks-- > 2) { + speed = xor_speed(stripe); + if (speed > speed_max) { + speed_max = speed; + chunks_max = rs->xor.chunks; + f_max = f; + } + } + } + + /* Memorize optimum parameters. */ + rs->xor.f = f_max; + rs->xor.chunks = chunks_max; + return speed_max; +} + +/* + * Allocate a RAID context (a RAID set) + */ +/* Structure for variable RAID parameters. */ +struct variable_parms { + int bandwidth; + int bandwidth_parm; + int chunk_size; + int chunk_size_parm; + int io_size; + int io_size_parm; + int stripes; + int stripes_parm; + int recover_io_size; + int recover_io_size_parm; + int raid_parms; + int recovery; + int recovery_stripes; + int recovery_stripes_parm; +}; + +static struct raid_set * +context_alloc(struct raid_type *raid_type, struct variable_parms *p, + unsigned raid_devs, sector_t sectors_per_dev, + struct dm_target *ti, unsigned dl_parms, char **argv) +{ + int r; + size_t len; + sector_t region_size, ti_len; + struct raid_set *rs = NULL; + struct dm_dirty_log *dl; + struct recover *rec; + + /* + * Create the dirty log + * + * We need to change length for the dirty log constructor, + * because we want an amount of regions for all stripes derived + * from the single device size, so that we can keep region + * size = 2^^n independant of the number of devices + */ + ti_len = ti->len; + ti->len = sectors_per_dev; + dl = dm_dirty_log_create(argv[0], ti, dl_parms, argv + 2); + ti->len = ti_len; + if (!dl) + goto bad_dirty_log; + + /* Chunk size *must* be smaller than region size. */ + region_size = dl->type->get_region_size(dl); + if (p->chunk_size > region_size) + goto bad_chunk_size; + + /* Recover io size *must* be smaller than region size as well. */ + if (p->recover_io_size > region_size) + goto bad_recover_io_size; + + /* Size and allocate the RAID set structure. */ + len = sizeof(*rs->data) + sizeof(*rs->dev); + if (dm_array_too_big(sizeof(*rs), len, raid_devs)) + goto bad_array; + + len = sizeof(*rs) + raid_devs * len; + rs = kzalloc(len, GFP_KERNEL); + if (!rs) + goto bad_alloc; + + rec = &rs->recover; + atomic_set(&rs->io.in_process, 0); + atomic_set(&rs->io.in_process_max, 0); + rec->io_size = p->recover_io_size; + + /* Pointer to data array. */ + rs->data = (unsigned long **) + ((void *) rs->dev + raid_devs * sizeof(*rs->dev)); + rec->dl = dl; + rs->set.raid_devs = raid_devs; + rs->set.data_devs = raid_devs - raid_type->parity_devs; + rs->set.raid_type = raid_type; + + rs->set.raid_parms = p->raid_parms; + rs->set.chunk_size_parm = p->chunk_size_parm; + rs->set.io_size_parm = p->io_size_parm; + rs->sc.stripes_parm = p->stripes_parm; + rec->io_size_parm = p->recover_io_size_parm; + rec->bandwidth_parm = p->bandwidth_parm; + rec->recovery = p->recovery; + rec->recovery_stripes = p->recovery_stripes; + + /* + * Set chunk and io size and respective shifts + * (used to avoid divisions) + */ + rs->set.chunk_size = p->chunk_size; + rs->set.chunk_shift = ffs(p->chunk_size) - 1; + + rs->set.io_size = p->io_size; + rs->set.io_mask = p->io_size - 1; + /* Mask to adjust address key in case io_size != chunk_size. */ + rs->set.io_inv_mask = (p->chunk_size - 1) & ~rs->set.io_mask; + + rs->set.sectors_per_dev = sectors_per_dev; + + rs->set.ei = -1; /* Indicate no failed device. */ + atomic_set(&rs->set.failed_devs, 0); + + rs->ti = ti; + + atomic_set(rec->io_count + IO_WORK, 0); + atomic_set(rec->io_count + IO_RECOVER, 0); + + /* Initialize io lock and queues. */ + mutex_init(&rs->io.in_lock); + bio_list_init(&rs->io.in); + bio_list_init(&rs->io.work); + + init_waitqueue_head(&rs->io.suspendq); /* Suspend waiters (dm-io). */ + + rec->nr_regions = dm_sector_div_up(sectors_per_dev, region_size); + rec->rh = dm_region_hash_create(rs, dispatch_delayed_bios, + wake_dummy, wake_do_raid, 0, p->recovery_stripes, + dl, region_size, rec->nr_regions); + if (IS_ERR(rec->rh)) + goto bad_rh; + + /* Initialize stripe cache. */ + r = sc_init(rs, p->stripes); + if (r) + goto bad_sc; + + /* REMOVEME: statistics. */ + stats_reset(rs); + ClearRSDevelStats(rs); /* Disnable development status. */ + return rs; + +bad_dirty_log: + TI_ERR_RET("Error creating dirty log", ERR_PTR(-ENOMEM)); + +bad_chunk_size: + dm_dirty_log_destroy(dl); + TI_ERR_RET("Chunk size larger than region size", ERR_PTR(-EINVAL)); + +bad_recover_io_size: + dm_dirty_log_destroy(dl); + TI_ERR_RET("Recover stripe io size larger than region size", + ERR_PTR(-EINVAL)); + +bad_array: + dm_dirty_log_destroy(dl); + TI_ERR_RET("Arry too big", ERR_PTR(-EINVAL)); + +bad_alloc: + dm_dirty_log_destroy(dl); + TI_ERR_RET("Cannot allocate raid context", ERR_PTR(-ENOMEM)); + +bad_rh: + dm_dirty_log_destroy(dl); + ti->error = DM_MSG_PREFIX "Error creating dirty region hash"; + goto free_rs; + +bad_sc: + dm_region_hash_destroy(rec->rh); /* Destroys dirty log too. */ + sc_exit(&rs->sc); + ti->error = DM_MSG_PREFIX "Error creating stripe cache"; +free_rs: + kfree(rs); + return ERR_PTR(-ENOMEM); +} + +/* Free a RAID context (a RAID set). */ +static void context_free(struct raid_set *rs, unsigned p) +{ + while (p--) + dm_put_device(rs->ti, rs->dev[p].dev); + + sc_exit(&rs->sc); + dm_region_hash_destroy(rs->recover.rh); /* Destroys dirty log too. */ + kfree(rs); +} + +/* Create work queue and initialize delayed work. */ +static int rs_workqueue_init(struct raid_set *rs) +{ + struct dm_target *ti = rs->ti; + + rs->io.wq = create_singlethread_workqueue(DAEMON); + if (!rs->io.wq) + TI_ERR_RET("failed to create " DAEMON, -ENOMEM); + + INIT_DELAYED_WORK(&rs->io.dws_do_raid, do_raid); + INIT_WORK(&rs->io.ws_do_table_event, do_table_event); + return 0; +} + +/* Return pointer to raid_type structure for raid name. */ +static struct raid_type *get_raid_type(char *name) +{ + struct raid_type *r = ARRAY_END(raid_types); + + while (r-- > raid_types) { + if (!strcmp(r->name, name)) + return r; + } + + return NULL; +} + +/* FIXME: factor out to dm core. */ +static int multiple(sector_t a, sector_t b, sector_t *n) +{ + sector_t r = a; + + sector_div(r, b); + *n = r; + return a == r * b; +} + +/* Log RAID set information to kernel log. */ +static void rs_log(struct raid_set *rs, unsigned speed) +{ + unsigned p; + char buf[BDEVNAME_SIZE]; + + for (p = 0; p < rs->set.raid_devs; p++) + DMINFO("/dev/%s is raid disk %u%s", + bdevname(rs->dev[p].dev->bdev, buf), p, + (p == rs->set.pi) ? " (parity)" : ""); + + DMINFO("%d/%d/%d sectors chunk/io/recovery size, %u stripes\n" + "algorithm \"%s\", %u chunks with %uMB/s\n" + "%s set with net %u/%u devices", + rs->set.chunk_size, rs->set.io_size, rs->recover.io_size, + atomic_read(&rs->sc.stripes), + rs->xor.f->name, rs->xor.chunks, mbpers(rs, speed), + rs->set.raid_type->descr, rs->set.data_devs, rs->set.raid_devs); +} + +/* Get all devices and offsets. */ +static int dev_parms(struct raid_set *rs, char **argv, int *p) +{ + struct dm_target *ti = rs->ti; + + for (*p = 0; *p < rs->set.raid_devs; (*p)++, argv += 2) { + int r; + unsigned long long tmp; + struct raid_dev *dev = rs->dev + *p; + + /* Get offset and device. */ + if (sscanf(argv[1], "%llu", &tmp) != 1 || + tmp > rs->set.sectors_per_dev) + TI_ERR("Invalid RAID device offset parameter"); + + dev->start = tmp; + r = dm_get_device(ti, *argv, dev->start, + rs->set.sectors_per_dev, + dm_table_get_mode(ti->table), &dev->dev); + if (r) + TI_ERR_RET("RAID device lookup failure", r); + + r = raid_dev_lookup(rs, dev); + if (r != -ENODEV && r < *p) { + (*p)++; /* Ensure dm_put_device() on actual device. */ + TI_ERR_RET("Duplicate RAID device", -ENXIO); + } + } + + return 0; +} + +/* Set recovery bandwidth. */ +static void +recover_set_bandwidth(struct raid_set *rs, unsigned bandwidth) +{ + rs->recover.bandwidth = bandwidth; + rs->recover.bandwidth_work = 100 / bandwidth; +} + +/* Handle variable number of RAID parameters. */ +static int get_raid_variable_parms(struct dm_target *ti, char **argv, + struct variable_parms *vp) +{ + int p, value; + struct { + int action; /* -1: skip, 0: no pwer2 check, 1: power2 check */ + char *errmsg; + int min, max; + int *var, *var2, *var3; + } argctr[] = { + { 1, + "Invalid chunk size; must be -1 or 2^^n and <= 16384", + IO_SIZE_MIN, CHUNK_SIZE_MAX, + &vp->chunk_size_parm, &vp->chunk_size, &vp->io_size }, + { 0, + "Invalid number of stripes: must be -1 or >= 8 and <= 16384", + STRIPES_MIN, STRIPES_MAX, + &vp->stripes_parm, &vp->stripes, NULL }, + { 1, + "Invalid io size; must -1 or >= 8, 2^^n and less equal " + "min(BIO_MAX_SECTORS/2, chunk size)", + IO_SIZE_MIN, 0, /* Needs to be updated in loop below. */ + &vp->io_size_parm, &vp->io_size, NULL }, + { 1, + "Invalid recovery io size; must be -1 or " + "2^^n and less equal BIO_MAX_SECTORS/2", + RECOVER_IO_SIZE_MIN, BIO_MAX_SECTORS / 2, + &vp->recover_io_size_parm, &vp->recover_io_size, NULL }, + { 0, + "Invalid recovery bandwidth percentage; " + "must be -1 or > 0 and <= 100", + BANDWIDTH_MIN, BANDWIDTH_MAX, + &vp->bandwidth_parm, &vp->bandwidth, NULL }, + /* Handle sync argument seperately in loop. */ + { -1, + "Invalid recovery switch; must be \"sync\" or \"nosync\"" }, + { 0, + "Invalid number of recovery stripes;" + "must be -1, > 0 and <= 16384", + RECOVERY_STRIPES_MIN, RECOVERY_STRIPES_MAX, + &vp->recovery_stripes_parm, &vp->recovery_stripes, NULL }, + }, *varp; + + /* Fetch # of variable raid parameters. */ + if (sscanf(*(argv++), "%d", &vp->raid_parms) != 1 || + !range_ok(vp->raid_parms, 0, 7)) + TI_ERR("Bad variable raid parameters number"); + + /* Preset variable RAID parameters. */ + vp->chunk_size = CHUNK_SIZE_DEFAULT; + vp->io_size = IO_SIZE_DEFAULT; + vp->stripes = STRIPES_DEFAULT; + vp->recover_io_size = RECOVER_IO_SIZE_DEFAULT; + vp->bandwidth = BANDWIDTH_DEFAULT; + vp->recovery = 1; + vp->recovery_stripes = RECOVERY_STRIPES_DEFAULT; + + /* Walk the array of argument constraints for all given ones. */ + for (p = 0, varp = argctr; p < vp->raid_parms; p++, varp++) { + BUG_ON(varp >= ARRAY_END(argctr)); + + /* Special case for "[no]sync" string argument. */ + if (varp->action < 0) { + if (!strcmp(*argv, "sync")) + ; + else if (!strcmp(*argv, "nosync")) + vp->recovery = 0; + else + TI_ERR(varp->errmsg); + + argv++; + continue; + } + + /* + * Special case for io_size depending + * on previously set chunk size. + */ + if (p == 2) + varp->max = min(BIO_MAX_SECTORS / 2, vp->chunk_size); + + if (sscanf(*(argv++), "%d", &value) != 1 || + (value != -1 && + ((varp->action && !POWER_OF_2(value)) || + !range_ok(value, varp->min, varp->max)))) + TI_ERR(varp->errmsg); + + *varp->var = value; + if (value != -1) { + if (varp->var2) + *varp->var2 = value; + if (varp->var3) + *varp->var3 = value; + } + } + + return 0; +} + +/* Parse optional locking parameters. */ +static int get_raid_locking_parms(struct dm_target *ti, char **argv, + int *locking_parms, + struct dm_raid45_locking_type **locking_type) +{ + if (!strnicmp(argv[0], "locking", strlen(argv[0]))) { + char *lckstr = argv[1]; + size_t lcksz = strlen(lckstr); + + if (!strnicmp(lckstr, "none", lcksz)) { + *locking_type = &locking_none; + *locking_parms = 2; + } else if (!strnicmp(lckstr, "cluster", lcksz)) { + DMERR("locking type \"%s\" not yet implemented", + lckstr); + return -EINVAL; + } else { + DMERR("unknown locking type \"%s\"", lckstr); + return -EINVAL; + } + } + + *locking_parms = 0; + *locking_type = &locking_none; + return 0; +} + +/* Set backing device read ahead properties of RAID set. */ +static void rs_set_read_ahead(struct raid_set *rs, + unsigned sectors, unsigned stripes) +{ + unsigned ra_pages = dm_div_up(sectors, SECTORS_PER_PAGE); + struct mapped_device *md = dm_table_get_md(rs->ti->table); + struct backing_dev_info *bdi = &dm_disk(md)->queue->backing_dev_info; + + /* Set read-ahead for the RAID set and the component devices. */ + if (ra_pages) { + unsigned p = rs->set.raid_devs; + + bdi->ra_pages = stripes * ra_pages * rs->set.data_devs; + + while (p--) { + struct request_queue *q = + bdev_get_queue(rs->dev[p].dev->bdev); + + q->backing_dev_info.ra_pages = ra_pages; + } + } + + dm_put(md); +} + +/* Set congested function. */ +static void rs_set_congested_fn(struct raid_set *rs) +{ + struct mapped_device *md = dm_table_get_md(rs->ti->table); + struct backing_dev_info *bdi = &dm_disk(md)->queue->backing_dev_info; + + /* Set congested function and data. */ + bdi->congested_fn = rs_congested; + bdi->congested_data = rs; + dm_put(md); +} + +/* + * Construct a RAID4/5 mapping: + * + * log_type #log_params \ + * raid_type [#parity_dev] #raid_variable_params \ + * [locking "none"/"cluster"] + * #raid_devs #dev_to_initialize [ ]{3,} + * + * log_type = "core"/"disk", + * #log_params = 1-3 (1-2 for core dirty log type, 3 for disk dirty log only) + * log_params = [dirty_log_path] region_size [[no]sync]) + * + * raid_type = "raid4", "raid5_la", "raid5_ra", "raid5_ls", "raid5_rs" + * + * #parity_dev = N if raid_type = "raid4" + * o N = -1: pick default = last device + * o N >= 0 and < #raid_devs: parity device index + * + * #raid_variable_params = 0-7; raid_params (-1 = default): + * [chunk_size [#stripes [io_size [recover_io_size \ + * [%recovery_bandwidth [recovery_switch [#recovery_stripes]]]]]]] + * o chunk_size (unit to calculate drive addresses; must be 2^^n, > 8 + * and <= CHUNK_SIZE_MAX) + * o #stripes is number of stripes allocated to stripe cache + * (must be > 1 and < STRIPES_MAX) + * o io_size (io unit size per device in sectors; must be 2^^n and > 8) + * o recover_io_size (io unit size per device for recovery in sectors; + must be 2^^n, > SECTORS_PER_PAGE and <= region_size) + * o %recovery_bandwith is the maximum amount spend for recovery during + * application io (1-100%) + * o recovery switch = [sync|nosync] + * o #recovery_stripes is the number of recovery stripes used for + * parallel recovery of the RAID set + * If raid_variable_params = 0, defaults will be used. + * Any raid_variable_param can be set to -1 to apply a default + * + * #raid_devs = N (N >= 3) + * + * #dev_to_initialize = N + * -1: initialize parity on all devices + * >= 0 and < #raid_devs: initialize raid_path; used to force reconstruction + * of a failed devices content after replacement + * + * = device_path (eg, /dev/sdd1) + * = begin at offset on + * + */ +#define MIN_PARMS 13 +static int raid_ctr(struct dm_target *ti, unsigned argc, char **argv) +{ + int dev_to_init, dl_parms, i, locking_parms, + parity_parm, pi = -1, r, raid_devs; + unsigned speed; + sector_t tmp, sectors_per_dev; + struct dm_raid45_locking_type *locking; + struct raid_set *rs; + struct raid_type *raid_type; + struct variable_parms parms; + + /* Ensure minimum number of parameters. */ + if (argc < MIN_PARMS) + TI_ERR("Not enough parameters"); + + /* Fetch # of dirty log parameters. */ + if (sscanf(argv[1], "%d", &dl_parms) != 1 || + !range_ok(dl_parms, 1, 4711)) /* ;-) */ + TI_ERR("Bad dirty log parameters number"); + + /* Check raid_type. */ + raid_type = get_raid_type(argv[dl_parms + 2]); + if (!raid_type) + TI_ERR("Bad raid type"); + + /* In case of RAID4, parity drive is selectable. */ + parity_parm = !!(raid_type->level == raid4); + + /* Handle variable number of RAID parameters. */ + r = get_raid_variable_parms(ti, argv + dl_parms + parity_parm + 3, + &parms); + if (r) + return r; + + /* Handle any locking parameters. */ + r = get_raid_locking_parms(ti, + argv + dl_parms + parity_parm + + parms.raid_parms + 4, + &locking_parms, &locking); + if (r) + return r; + + /* # of raid devices. */ + i = dl_parms + parity_parm + parms.raid_parms + locking_parms + 4; + if (sscanf(argv[i], "%d", &raid_devs) != 1 || + raid_devs < raid_type->minimal_devs) + TI_ERR("Invalid number of raid devices"); + + /* In case of RAID4, check parity drive index is in limits. */ + if (raid_type->level == raid4) { + /* Fetch index of parity device. */ + if (sscanf(argv[dl_parms + 3], "%d", &pi) != 1 || + (pi != -1 && !range_ok(pi, 0, raid_devs - 1))) + TI_ERR("Invalid RAID4 parity device index"); + } + + /* + * Index of device to initialize starts at 0 + * + * o -1 -> don't initialize a selected device; + * initialize parity conforming to algorithm + * o 0..raid_devs-1 -> initialize respective device + * (used for reconstruction of a replaced device) + */ + if (sscanf(argv[dl_parms + parity_parm + parms.raid_parms + + locking_parms + 5], "%d", &dev_to_init) != 1 || + !range_ok(dev_to_init, -1, raid_devs - 1)) + TI_ERR("Invalid number for raid device to initialize"); + + /* Check # of raid device arguments. */ + if (argc - dl_parms - parity_parm - parms.raid_parms - 6 != + 2 * raid_devs) + TI_ERR("Wrong number of raid device/offset arguments"); + + /* + * Check that the table length is devisable + * w/o rest by (raid_devs - parity_devs) + */ + if (!multiple(ti->len, raid_devs - raid_type->parity_devs, + §ors_per_dev)) + TI_ERR("Target length not divisible by number of data devices"); + + /* + * Check that the device size is + * devisable w/o rest by chunk size + */ + if (!multiple(sectors_per_dev, parms.chunk_size, &tmp)) + TI_ERR("Device length not divisible by chunk_size"); + + /**************************************************************** + * Now that we checked the constructor arguments -> + * let's allocate the RAID set + ****************************************************************/ + rs = context_alloc(raid_type, &parms, raid_devs, sectors_per_dev, + ti, dl_parms, argv); + if (IS_ERR(rs)) + return PTR_ERR(rs); + + + rs->set.dev_to_init = rs->set.dev_to_init_parm = dev_to_init; + rs->set.pi = rs->set.pi_parm = pi; + + /* Set RAID4 parity drive index. */ + if (raid_type->level == raid4) + rs->set.pi = (pi == -1) ? rs->set.data_devs : pi; + + recover_set_bandwidth(rs, parms.bandwidth); + + /* Use locking type to lock stripe access. */ + rs->locking = locking; + + /* Get the device/offset tupels. */ + argv += dl_parms + 6 + parity_parm + parms.raid_parms; + r = dev_parms(rs, argv, &i); + if (r) + goto err; + + /* Set backing device information (eg. read ahead). */ + rs_set_read_ahead(rs, 2 * rs->set.chunk_size, 4 /* stripes */); + rs_set_congested_fn(rs); /* Set congested function. */ + SetRSCheckOverwrite(rs); /* Allow chunk overwrite checks. */ + speed = xor_optimize(rs); /* Select best xor algorithm. */ + + /* Set for recovery of any nosync regions. */ + if (parms.recovery) + SetRSRecover(rs); + else { + /* + * Need to free recovery stripe(s) here in case + * of nosync, because xor_optimize uses one. + */ + set_start_recovery(rs); + set_end_recovery(rs); + stripe_recover_free(rs); + } + + /* + * Make sure that dm core only hands maximum io size + * length down and pays attention to io boundaries. + */ + ti->split_io = rs->set.io_size; + ti->private = rs; + + /* Initialize work queue to handle this RAID set's io. */ + r = rs_workqueue_init(rs); + if (r) + goto err; + + rs_log(rs, speed); /* Log information about RAID set. */ + return 0; + +err: + context_free(rs, i); + return r; +} + +/* + * Destruct a raid mapping + */ +static void raid_dtr(struct dm_target *ti) +{ + struct raid_set *rs = ti->private; + + destroy_workqueue(rs->io.wq); + context_free(rs, rs->set.raid_devs); +} + +/* Raid mapping function. */ +static int raid_map(struct dm_target *ti, struct bio *bio, + union map_info *map_context) +{ + /* I don't want to waste stripe cache capacity. */ + if (bio_rw(bio) == READA) + return -EIO; + else { + struct raid_set *rs = ti->private; + + /* + * Get io reference to be waiting for to drop + * to zero on device suspension/destruction. + */ + io_get(rs); + bio->bi_sector -= ti->begin; /* Remap sector. */ + + /* Queue io to RAID set. */ + mutex_lock(&rs->io.in_lock); + bio_list_add(&rs->io.in, bio); + mutex_unlock(&rs->io.in_lock); + + /* Wake daemon to process input list. */ + wake_do_raid(rs); + + /* REMOVEME: statistics. */ + atomic_inc(rs->stats + (bio_data_dir(bio) == READ ? + S_BIOS_READ : S_BIOS_WRITE)); + return DM_MAPIO_SUBMITTED; /* Handle later. */ + } +} + +/* Device suspend. */ +static void raid_presuspend(struct dm_target *ti) +{ + struct raid_set *rs = ti->private; + struct dm_dirty_log *dl = rs->recover.dl; + + SetRSSuspend(rs); + + if (RSRecover(rs)) + dm_rh_stop_recovery(rs->recover.rh); + + cancel_delayed_work(&rs->io.dws_do_raid); + flush_workqueue(rs->io.wq); + wait_ios(rs); /* Wait for completion of all ios being processed. */ + + if (dl->type->presuspend && dl->type->presuspend(dl)) + /* FIXME: need better error handling. */ + DMWARN("log presuspend failed"); +} + +static void raid_postsuspend(struct dm_target *ti) +{ + struct raid_set *rs = ti->private; + struct dm_dirty_log *dl = rs->recover.dl; + + if (dl->type->postsuspend && dl->type->postsuspend(dl)) + /* FIXME: need better error handling. */ + DMWARN("log postsuspend failed"); + +} + +/* Device resume. */ +static void raid_resume(struct dm_target *ti) +{ + struct raid_set *rs = ti->private; + struct recover *rec = &rs->recover; + struct dm_dirty_log *dl = rec->dl; + + if (dl->type->resume && dl->type->resume(dl)) + /* Resume dirty log. */ + /* FIXME: need better error handling. */ + DMWARN("log resume failed"); + + rec->nr_regions_to_recover = + rec->nr_regions - dl->type->get_sync_count(dl); + + /* Restart any unfinished recovery. */ + if (RSRecover(rs)) { + set_start_recovery(rs); + dm_rh_start_recovery(rec->rh); + } + + ClearRSSuspend(rs); + wake_do_raid(rs); +} + +/* Return stripe cache size. */ +static unsigned sc_size(struct raid_set *rs) +{ + return to_sector(atomic_read(&rs->sc.stripes) * + (sizeof(struct stripe) + + (sizeof(struct stripe_chunk) + + (sizeof(struct page_list) + + to_bytes(rs->set.io_size) * + rs->set.raid_devs)) + + (rs->recover.end_jiffies ? + 0 : rs->recover.recovery_stripes * + to_bytes(rs->set.raid_devs * rs->recover.io_size)))); +} + +/* REMOVEME: status output for development. */ +static void raid_devel_stats(struct dm_target *ti, char *result, + unsigned *size, unsigned maxlen) +{ + unsigned sz = *size; + unsigned long j; + char buf[BDEVNAME_SIZE], *p; + struct stats_map *sm; + struct raid_set *rs = ti->private; + struct recover *rec = &rs->recover; + struct timespec ts; + + DMEMIT("%s %s %u\n", version, rs->xor.f->name, rs->xor.chunks); + DMEMIT("act_ios=%d ", io_ref(rs)); + DMEMIT("act_ios_max=%d\n", atomic_read(&rs->io.in_process_max)); + DMEMIT("act_stripes=%d ", sc_active(&rs->sc)); + DMEMIT("act_stripes_max=%d\n", + atomic_read(&rs->sc.active_stripes_max)); + + for (sm = stats_map; sm < ARRAY_END(stats_map); sm++) + DMEMIT("%s%d", sm->str, atomic_read(rs->stats + sm->type)); + + DMEMIT(" checkovr=%s\n", RSCheckOverwrite(rs) ? "on" : "off"); + DMEMIT("sc=%u/%u/%u/%u/%u/%u/%u\n", rs->set.chunk_size, + atomic_read(&rs->sc.stripes), rs->set.io_size, + rec->recovery_stripes, rec->io_size, rs->sc.hash.buckets, + sc_size(rs)); + + j = (rec->end_jiffies ? rec->end_jiffies : jiffies) - + rec->start_jiffies; + jiffies_to_timespec(j, &ts); + sprintf(buf, "%ld.%ld", ts.tv_sec, ts.tv_nsec); + p = strchr(buf, '.'); + p[3] = 0; + + DMEMIT("rg=%llu/%llu/%llu/%u %s\n", + (unsigned long long) rec->nr_regions_recovered, + (unsigned long long) rec->nr_regions_to_recover, + (unsigned long long) rec->nr_regions, rec->bandwidth, buf); + + *size = sz; +} + +static int raid_status(struct dm_target *ti, status_type_t type, + char *result, unsigned maxlen) +{ + unsigned p, sz = 0; + char buf[BDEVNAME_SIZE]; + struct raid_set *rs = ti->private; + int raid_parms[] = { + rs->set.chunk_size_parm, + rs->sc.stripes_parm, + rs->set.io_size_parm, + rs->recover.io_size_parm, + rs->recover.bandwidth_parm, + -2, + rs->recover.recovery_stripes, + }; + + switch (type) { + case STATUSTYPE_INFO: + /* REMOVEME: statistics. */ + if (RSDevelStats(rs)) + raid_devel_stats(ti, result, &sz, maxlen); + + DMEMIT("%u ", rs->set.raid_devs); + + for (p = 0; p < rs->set.raid_devs; p++) + DMEMIT("%s ", + format_dev_t(buf, rs->dev[p].dev->bdev->bd_dev)); + + DMEMIT("1 "); + for (p = 0; p < rs->set.raid_devs; p++) { + DMEMIT("%c", !DevFailed(rs->dev + p) ? 'A' : 'D'); + + if (p == rs->set.pi) + DMEMIT("p"); + + if (rs->set.dev_to_init == p) + DMEMIT("i"); + } + + break; + case STATUSTYPE_TABLE: + sz = rs->recover.dl->type->status(rs->recover.dl, type, + result, maxlen); + DMEMIT("%s %u ", rs->set.raid_type->name, + rs->set.raid_parms); + + for (p = 0; p < rs->set.raid_parms; p++) { + if (raid_parms[p] > -2) + DMEMIT("%d ", raid_parms[p]); + else + DMEMIT("%s ", rs->recover.recovery ? + "sync" : "nosync"); + } + + DMEMIT("%u %d ", rs->set.raid_devs, rs->set.dev_to_init); + + for (p = 0; p < rs->set.raid_devs; p++) + DMEMIT("%s %llu ", + format_dev_t(buf, rs->dev[p].dev->bdev->bd_dev), + (unsigned long long) rs->dev[p].start); + } + + return 0; +} + +/* + * Message interface + */ +enum raid_msg_actions { + act_bw, /* Recovery bandwidth switch. */ + act_dev, /* Device failure switch. */ + act_overwrite, /* Stripe overwrite check. */ + act_stats, /* Development statistics switch. */ + act_sc, /* Stripe cache switch. */ + + act_on, /* Set entity on. */ + act_off, /* Set entity off. */ + act_reset, /* Reset entity. */ + + act_set = act_on, /* Set # absolute. */ + act_grow = act_off, /* Grow # by an amount. */ + act_shrink = act_reset, /* Shrink # by an amount. */ +}; + +/* Turn a delta into an absolute value. */ +static int _absolute(unsigned long action, int act, int r) +{ + /* Make delta absolute. */ + if (test_bit(act_set, &action)) + ; + else if (test_bit(act_grow, &action)) + r += act; + else if (test_bit(act_shrink, &action)) + r = act - r; + else + r = -EINVAL; + + return r; +} + + /* Change recovery io bandwidth. */ +static int bandwidth_change(struct dm_msg *msg, void *context) +{ + struct raid_set *rs = context; + int act = rs->recover.bandwidth; + int bandwidth = DM_MSG_INT_ARG(msg); + + if (range_ok(bandwidth, BANDWIDTH_MIN, BANDWIDTH_MAX)) { + /* Make delta bandwidth absolute. */ + bandwidth = _absolute(msg->action, act, bandwidth); + + /* Check range. */ + if (range_ok(bandwidth, BANDWIDTH_MIN, BANDWIDTH_MAX)) { + recover_set_bandwidth(rs, bandwidth); + return 0; + } + } + + set_bit(dm_msg_ret_arg, &msg->ret); + set_bit(dm_msg_ret_inval, &msg->ret); + return -EINVAL; +} + +/* Set/reset development feature flags. */ +static int devel_flags(struct dm_msg *msg, void *context) +{ + struct raid_set *rs = context; + + if (test_bit(act_on, &msg->action)) + return test_and_set_bit(msg->spec->parm, + &rs->io.flags) ? -EPERM : 0; + else if (test_bit(act_off, &msg->action)) + return test_and_clear_bit(msg->spec->parm, + &rs->io.flags) ? 0 : -EPERM; + else if (test_bit(act_reset, &msg->action)) { + if (test_bit(act_stats, &msg->action)) { + stats_reset(rs); + goto on; + } else if (test_bit(act_overwrite, &msg->action)) { +on: + set_bit(msg->spec->parm, &rs->io.flags); + return 0; + } + } + + return -EINVAL; +} + +/* Resize the stripe cache. */ +static int sc_resize(struct dm_msg *msg, void *context) +{ + int act, stripes; + struct raid_set *rs = context; + + /* Deny permission in case the daemon is still resizing!. */ + if (atomic_read(&rs->sc.stripes_to_set)) + return -EPERM; + + stripes = DM_MSG_INT_ARG(msg); + if (stripes > 0) { + act = atomic_read(&rs->sc.stripes); + + /* Make delta stripes absolute. */ + stripes = _absolute(msg->action, act, stripes); + + /* + * Check range and that the # of stripes changes. + * We leave the resizing to the wroker. + */ + if (range_ok(stripes, STRIPES_MIN, STRIPES_MAX) && + stripes != atomic_read(&rs->sc.stripes)) { + atomic_set(&rs->sc.stripes_to_set, stripes); + wake_do_raid(rs); + return 0; + } + } + + set_bit(dm_msg_ret_arg, &msg->ret); + set_bit(dm_msg_ret_inval, &msg->ret); + return -EINVAL; +} + +/* Parse the RAID message action. */ +/* + * 'ba[ndwidth] {se[t],g[row],sh[rink]} #' # e.g 'ba se 50' + * "o[verwrite] {on,of[f],r[eset]}' # e.g. 'o of' + * 'sta[tistics] {on,of[f],r[eset]}' # e.g. 'stat of' + * 'str[ipecache] {se[t],g[row],sh[rink]} #' # e.g. 'stripe set 1024' + * + */ +static int raid_message(struct dm_target *ti, unsigned argc, char **argv) +{ + /* Variables to store the parsed parameters im. */ + static int i[2]; + static unsigned long *i_arg[] = { + (unsigned long *) i + 0, + (unsigned long *) i + 1, + }; + + /* Declare all message option strings. */ + static char *str_sgs[] = { "set", "grow", "shrink" }; + static char *str_oor[] = { "on", "off", "reset" }; + + /* Declare all actions. */ + static unsigned long act_sgs[] = { act_set, act_grow, act_shrink }; + static unsigned long act_oor[] = { act_on, act_off, act_reset }; + + /* Bandwidth option. */ + static struct dm_message_option bw_opt = { 3, str_sgs, act_sgs }; + static struct dm_message_argument bw_args = { + 1, i_arg, { dm_msg_int_t } + }; + + static struct dm_message_argument null_args = { + 0, NULL, { dm_msg_int_t } + }; + + /* Overwrite and statistics option. */ + static struct dm_message_option ovr_stats_opt = { 3, str_oor, act_oor }; + + /* Sripecache option. */ + static struct dm_message_option stripe_opt = { 3, str_sgs, act_sgs }; + + /* Declare messages. */ + static struct dm_msg_spec specs[] = { + { "bandwidth", act_bw, &bw_opt, &bw_args, + 0, bandwidth_change }, + { "overwrite", act_overwrite, &ovr_stats_opt, &null_args, + RS_CHECK_OVERWRITE, devel_flags }, + { "statistics", act_stats, &ovr_stats_opt, &null_args, + RS_DEVEL_STATS, devel_flags }, + { "stripecache", act_sc, &stripe_opt, &bw_args, + 0, sc_resize }, + }; + + /* The message for the parser. */ + struct dm_msg msg = { + .num_specs = ARRAY_SIZE(specs), + .specs = specs, + }; + + return dm_message_parse(TARGET, &msg, ti->private, argc, argv); +} +/* + * END message interface + */ + +static struct target_type raid_target = { + .name = "raid45", + .version = {1, 0, 0}, + .module = THIS_MODULE, + .ctr = raid_ctr, + .dtr = raid_dtr, + .map = raid_map, + .presuspend = raid_presuspend, + .postsuspend = raid_postsuspend, + .resume = raid_resume, + .status = raid_status, + .message = raid_message, +}; + +static void init_exit(const char *bad_msg, const char *good_msg, int r) +{ + if (r) + DMERR("Failed to %sregister target [%d]", bad_msg, r); + else + DMINFO("%s %s", good_msg, version); +} + +static int __init dm_raid_init(void) +{ + int r = dm_register_target(&raid_target); + + init_exit("", "initialized", r); + return r; +} + +static void __exit dm_raid_exit(void) +{ + dm_unregister_target(&raid_target); + init_exit("un", "exit", 0); +} + +/* Module hooks. */ +module_init(dm_raid_init); +module_exit(dm_raid_exit); + +MODULE_DESCRIPTION(DM_NAME " raid4/5 target"); +MODULE_AUTHOR("Heinz Mauelshagen "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("dm-raid4"); +MODULE_ALIAS("dm-raid5"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-message.c +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-message.c @@ -0,0 +1,183 @@ +/* + * Copyright (C) 2007,2008 Red Hat Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen + * + * General device-mapper message interface argument parser. + * + * This file is released under the GPL. + * + * device-mapper message parser. + * + */ + +#include "dm.h" +#include "dm-message.h" +#include + +#define DM_MSG_PREFIX "dm_message" + +/* Basename of a path. */ +static inline char * +basename(char *s) +{ + char *p = strrchr(s, '/'); + + return p ? p + 1 : s; +} + +/* Get an argument depending on type. */ +static void +message_arguments(struct dm_msg *msg, int argc, char **argv) +{ + + if (argc) { + int i; + struct dm_message_argument *args = msg->spec->args; + + for (i = 0; i < args->num_args; i++) { + int r; + unsigned long **ptr = args->ptr; + enum dm_message_argument_type type = args->types[i]; + + switch (type) { + case dm_msg_base_t: + ((char **) ptr)[i] = basename(argv[i]); + break; + + case dm_msg_str_t: + ((char **) ptr)[i] = argv[i]; + break; + + case dm_msg_int_t: + r = sscanf(argv[i], "%d", ((int **) ptr)[i]); + goto check; + + case dm_msg_uint_t: + r = sscanf(argv[i], "%u", + ((unsigned **) ptr)[i]); + goto check; + + case dm_msg_uint64_t: + r = sscanf(argv[i], "%llu", + ((unsigned long long **) ptr)[i]); + +check: + if (r != 1) { + set_bit(dm_msg_ret_undef, &msg->ret); + set_bit(dm_msg_ret_arg, &msg->ret); + } + } + } + } +} + +/* Parse message options. */ +static void +message_options_parse(struct dm_msg *msg, int argc, char **argv) +{ + int hit = 0; + unsigned long *action; + size_t l1 = strlen(*argv), l_hit = 0; + struct dm_message_option *o = msg->spec->options; + char **option, **option_end = o->options + o->num_options; + + for (option = o->options, action = o->actions; + option < option_end; option++, action++) { + size_t l2 = strlen(*option); + + if (!strnicmp(*argv, *option, min(l1, l2))) { + hit++; + l_hit = l2; + set_bit(*action, &msg->action); + } + } + + /* Assume error. */ + msg->ret = 0; + set_bit(dm_msg_ret_option, &msg->ret); + if (!hit || l1 > l_hit) + set_bit(dm_msg_ret_undef, &msg->ret); /* Undefined option. */ + else if (hit > 1) + set_bit(dm_msg_ret_ambiguous, &msg->ret); /* Ambiguous option.*/ + else { + clear_bit(dm_msg_ret_option, &msg->ret); /* Option OK. */ + message_arguments(msg, --argc, ++argv); + } +} + +static inline void +print_ret(const char *caller, unsigned long ret) +{ + struct { + unsigned long err; + const char *err_str; + } static err_msg[] = { + { dm_msg_ret_ambiguous, "message ambiguous" }, + { dm_msg_ret_inval, "message invalid" }, + { dm_msg_ret_undef, "message undefined" }, + { dm_msg_ret_arg, "message argument" }, + { dm_msg_ret_argcount, "message argument count" }, + { dm_msg_ret_option, "option" }, + }, *e = ARRAY_END(err_msg); + + while (e-- > err_msg) { + if (test_bit(e->err, &ret)) + DMERR("%s %s", caller, e->err_str); + } +} + +/* Parse a message action. */ +int +dm_message_parse(const char *caller, struct dm_msg *msg, void *context, + int argc, char **argv) +{ + int hit = 0; + size_t l1, l_hit = 0; + struct dm_msg_spec *s, *s_hit = NULL, + *s_end = msg->specs + msg->num_specs; + + if (argc < 2) + return -EINVAL; + + l1 = strlen(*argv); + for (s = msg->specs; s < s_end; s++) { + size_t l2 = strlen(s->cmd); + + if (!strnicmp(*argv, s->cmd, min(l1, l2))) { + hit++; + l_hit = l2; + s_hit = s; + } + } + + msg->ret = 0; + if (!hit || l1 > l_hit) /* No hit or message string too long. */ + set_bit(dm_msg_ret_undef, &msg->ret); + else if (hit > 1) /* Ambiguous message. */ + set_bit(dm_msg_ret_ambiguous, &msg->ret); + else if (argc - 2 != s_hit->args->num_args) { + set_bit(dm_msg_ret_undef, &msg->ret); + set_bit(dm_msg_ret_argcount, &msg->ret); + } + + if (msg->ret) + goto bad; + + msg->action = 0; + msg->spec = s_hit; + set_bit(s_hit->action, &msg->action); + message_options_parse(msg, --argc, ++argv); + + if (!msg->ret) + return msg->spec->f(msg, context); + +bad: + print_ret(caller, msg->ret); + return -EINVAL; +} +EXPORT_SYMBOL(dm_message_parse); + +MODULE_DESCRIPTION(DM_NAME " device-mapper target message parser"); +MODULE_AUTHOR("Heinz Mauelshagen "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/Makefile @@ -0,0 +1,4 @@ +EXTRA_CFLAGS += -I$(srctree)/drivers/md + +obj-$(CONFIG_DM_RAID45) := dm-raid45.o +dm-raid45-objs := dm-raid4-5.o dm-memcache.o dm-region-hash.o dm-message.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-message.h +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-message.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2007,2008 Red Hat, Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen + * + * General device-mapper message interface argument parser. + * + * This file is released under the GPL. + * + */ + +#ifndef DM_MESSAGE_H +#define DM_MESSAGE_H + +/* Factor out to dm.h. */ +/* Reference to array end. */ +#define ARRAY_END(a) ((a) + ARRAY_SIZE(a)) + +/* Message return bits. */ +enum dm_message_return { + dm_msg_ret_ambiguous, /* Action ambiguous. */ + dm_msg_ret_inval, /* Action invalid. */ + dm_msg_ret_undef, /* Action undefined. */ + + dm_msg_ret_option, /* Option error. */ + dm_msg_ret_arg, /* Argument error. */ + dm_msg_ret_argcount, /* Argument count error. */ +}; + +/* Message argument type conversions. */ +enum dm_message_argument_type { + dm_msg_base_t, /* Basename string. */ + dm_msg_str_t, /* String. */ + dm_msg_int_t, /* Signed int. */ + dm_msg_uint_t, /* Unsigned int. */ + dm_msg_uint64_t, /* Unsigned int 64. */ +}; + +/* A message option. */ +struct dm_message_option { + unsigned num_options; + char **options; + unsigned long *actions; +}; + +/* Message arguments and types. */ +struct dm_message_argument { + unsigned num_args; + unsigned long **ptr; + enum dm_message_argument_type types[]; +}; + +/* Client message. */ +struct dm_msg { + unsigned long action; /* Identified action. */ + unsigned long ret; /* Return bits. */ + unsigned num_specs; /* # of sepcifications listed. */ + struct dm_msg_spec *specs; /* Specification list. */ + struct dm_msg_spec *spec; /* Specification selected. */ +}; + +/* Secification of the message. */ +struct dm_msg_spec { + const char *cmd; /* Name of the command (i.e. 'bandwidth'). */ + unsigned long action; + struct dm_message_option *options; + struct dm_message_argument *args; + unsigned long parm; /* Parameter to pass through to callback. */ + /* Function to process for action. */ + int (*f) (struct dm_msg *msg, void *context); +}; + +/* Parameter access macros. */ +#define DM_MSG_PARM(msg) ((msg)->spec->parm) + +#define DM_MSG_STR_ARGS(msg, idx) ((char *) *(msg)->spec->args->ptr[idx]) +#define DM_MSG_INT_ARGS(msg, idx) ((int) *(msg)->spec->args->ptr[idx]) +#define DM_MSG_UINT_ARGS(msg, idx) ((unsigned) DM_MSG_INT_ARG(msg, idx)) +#define DM_MSG_UINT64_ARGS(msg, idx) ((uint64_t) *(msg)->spec->args->ptr[idx]) + +#define DM_MSG_STR_ARG(msg) DM_MSG_STR_ARGS(msg, 0) +#define DM_MSG_INT_ARG(msg) DM_MSG_INT_ARGS(msg, 0) +#define DM_MSG_UINT_ARG(msg) DM_MSG_UINT_ARGS(msg, 0) +#define DM_MSG_UINT64_ARG(msg) DM_MSG_UINT64_ARGS(msg, 0) + + +/* Parse a message and its options and optionally call a function back. */ +int dm_message_parse(const char *caller, struct dm_msg *msg, void *context, + int argc, char **argv); + +#endif --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-memcache.c +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-memcache.c @@ -0,0 +1,301 @@ +/* + * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved. + * + * Module Author: Heinz Mauelshagen + * + * Device-mapper memory object handling: + * + * o allocate/free total_pages in a per client page pool. + * + * o allocate/free memory objects with chunks (1..n) of + * pages_per_chunk pages hanging off. + * + * This file is released under the GPL. + */ + +#define DM_MEM_CACHE_VERSION "0.2" + +#include "dm.h" +#include "dm-memcache.h" +#include + +struct dm_mem_cache_client { + spinlock_t lock; + mempool_t *objs_pool; + struct page_list *free_list; + unsigned objects; + unsigned chunks; + unsigned pages_per_chunk; + unsigned free_pages; + unsigned total_pages; +}; + +/* + * Free pages and page_list elements of client. + */ +static void free_cache_pages(struct page_list *list) +{ + while (list) { + struct page_list *pl = list; + + list = pl->next; + BUG_ON(!pl->page); + __free_page(pl->page); + kfree(pl); + } +} + +/* + * Alloc number of pages and page_list elements as required by client. + */ +static struct page_list *alloc_cache_pages(unsigned pages) +{ + struct page_list *pl, *ret = NULL; + struct page *page; + + while (pages--) { + page = alloc_page(GFP_NOIO); + if (!page) + goto err; + + pl = kmalloc(sizeof(*pl), GFP_NOIO); + if (!pl) { + __free_page(page); + goto err; + } + + pl->page = page; + pl->next = ret; + ret = pl; + } + + return ret; + +err: + free_cache_pages(ret); + return NULL; +} + +/* + * Allocate page_list elements from the pool to chunks of the memory object. + */ +static void alloc_chunks(struct dm_mem_cache_client *cl, + struct dm_mem_cache_object *obj) +{ + unsigned chunks = cl->chunks; + unsigned long flags; + + local_irq_save(flags); + local_irq_disable(); + while (chunks--) { + unsigned p = cl->pages_per_chunk; + + obj[chunks].pl = NULL; + + while (p--) { + struct page_list *pl; + + /* Take next element from free list */ + spin_lock(&cl->lock); + pl = cl->free_list; + BUG_ON(!pl); + cl->free_list = pl->next; + spin_unlock(&cl->lock); + + pl->next = obj[chunks].pl; + obj[chunks].pl = pl; + } + } + + local_irq_restore(flags); +} + +/* + * Free page_list elements putting them back onto free list + */ +static void free_chunks(struct dm_mem_cache_client *cl, + struct dm_mem_cache_object *obj) +{ + unsigned chunks = cl->chunks; + unsigned long flags; + struct page_list *next, *pl; + + local_irq_save(flags); + local_irq_disable(); + while (chunks--) { + for (pl = obj[chunks].pl; pl; pl = next) { + next = pl->next; + + spin_lock(&cl->lock); + pl->next = cl->free_list; + cl->free_list = pl; + cl->free_pages++; + spin_unlock(&cl->lock); + } + } + + local_irq_restore(flags); +} + +/* + * Create/destroy dm memory cache client resources. + */ +struct dm_mem_cache_client * +dm_mem_cache_client_create(unsigned objects, unsigned chunks, + unsigned pages_per_chunk) +{ + unsigned total_pages = objects * chunks * pages_per_chunk; + struct dm_mem_cache_client *client; + + BUG_ON(!total_pages); + client = kzalloc(sizeof(*client), GFP_KERNEL); + if (!client) + return ERR_PTR(-ENOMEM); + + client->objs_pool = mempool_create_kmalloc_pool(objects, + chunks * sizeof(struct dm_mem_cache_object)); + if (!client->objs_pool) + goto err; + + client->free_list = alloc_cache_pages(total_pages); + if (!client->free_list) + goto err1; + + spin_lock_init(&client->lock); + client->objects = objects; + client->chunks = chunks; + client->pages_per_chunk = pages_per_chunk; + client->free_pages = client->total_pages = total_pages; + return client; + +err1: + mempool_destroy(client->objs_pool); +err: + kfree(client); + return ERR_PTR(-ENOMEM); +} +EXPORT_SYMBOL(dm_mem_cache_client_create); + +void dm_mem_cache_client_destroy(struct dm_mem_cache_client *cl) +{ + BUG_ON(cl->free_pages != cl->total_pages); + free_cache_pages(cl->free_list); + mempool_destroy(cl->objs_pool); + kfree(cl); +} +EXPORT_SYMBOL(dm_mem_cache_client_destroy); + +/* + * Grow a clients cache by an amount of pages. + * + * Don't call from interrupt context! + */ +int dm_mem_cache_grow(struct dm_mem_cache_client *cl, unsigned objects) +{ + unsigned pages = objects * cl->chunks * cl->pages_per_chunk; + struct page_list *pl, *last; + + BUG_ON(!pages); + pl = alloc_cache_pages(pages); + if (!pl) + return -ENOMEM; + + last = pl; + while (last->next) + last = last->next; + + spin_lock_irq(&cl->lock); + last->next = cl->free_list; + cl->free_list = pl; + cl->free_pages += pages; + cl->total_pages += pages; + cl->objects++; + spin_unlock_irq(&cl->lock); + + mempool_resize(cl->objs_pool, cl->objects, GFP_NOIO); + return 0; +} +EXPORT_SYMBOL(dm_mem_cache_grow); + +/* Shrink a clients cache by an amount of pages */ +int dm_mem_cache_shrink(struct dm_mem_cache_client *cl, unsigned objects) +{ + int r; + unsigned pages = objects * cl->chunks * cl->pages_per_chunk, p = pages; + unsigned long flags; + struct page_list *last = NULL, *pl, *pos; + + BUG_ON(!pages); + + spin_lock_irqsave(&cl->lock, flags); + pl = pos = cl->free_list; + while (p-- && pos->next) { + last = pos; + pos = pos->next; + } + + if (++p) + r = -ENOMEM; + else { + r = 0; + cl->free_list = pos; + cl->free_pages -= pages; + cl->total_pages -= pages; + cl->objects--; + last->next = NULL; + } + spin_unlock_irqrestore(&cl->lock, flags); + + if (!r) { + free_cache_pages(pl); + mempool_resize(cl->objs_pool, cl->objects, GFP_NOIO); + } + + return r; +} +EXPORT_SYMBOL(dm_mem_cache_shrink); + +/* + * Allocate/free a memory object + * + * Can be called from interrupt context + */ +struct dm_mem_cache_object *dm_mem_cache_alloc(struct dm_mem_cache_client *cl) +{ + int r = 0; + unsigned pages = cl->chunks * cl->pages_per_chunk; + unsigned long flags; + struct dm_mem_cache_object *obj; + + obj = mempool_alloc(cl->objs_pool, GFP_NOIO); + if (!obj) + return ERR_PTR(-ENOMEM); + + spin_lock_irqsave(&cl->lock, flags); + if (pages > cl->free_pages) + r = -ENOMEM; + else + cl->free_pages -= pages; + spin_unlock_irqrestore(&cl->lock, flags); + + if (r) { + mempool_free(obj, cl->objs_pool); + return ERR_PTR(r); + } + + alloc_chunks(cl, obj); + return obj; +} +EXPORT_SYMBOL(dm_mem_cache_alloc); + +void dm_mem_cache_free(struct dm_mem_cache_client *cl, + struct dm_mem_cache_object *obj) +{ + free_chunks(cl, obj); + mempool_free(obj, cl->objs_pool); +} +EXPORT_SYMBOL(dm_mem_cache_free); + +MODULE_DESCRIPTION(DM_NAME " dm memory cache"); +MODULE_AUTHOR("Heinz Mauelshagen "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/dm-raid4-5/dm-region-hash.c +++ linux-fsl-imx51-2.6.31/ubuntu/dm-raid4-5/dm-region-hash.c @@ -0,0 +1,718 @@ +/* + * Copyright (C) 2003 Sistina Software Limited. + * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved. + * + * This file is released under the GPL. + */ + +#include +#include "dm-region-hash.h" + +#include +#include +#include +#include + +#include "dm.h" + +#define DM_MSG_PREFIX "region hash" + +/*----------------------------------------------------------------- + * Region hash + * + * The mirror splits itself up into discrete regions. Each + * region can be in one of three states: clean, dirty, + * nosync. There is no need to put clean regions in the hash. + * + * In addition to being present in the hash table a region _may_ + * be present on one of three lists. + * + * clean_regions: Regions on this list have no io pending to + * them, they are in sync, we are no longer interested in them, + * they are dull. dm_rh_update_states() will remove them from the + * hash table. + * + * quiesced_regions: These regions have been spun down, ready + * for recovery. rh_recovery_start() will remove regions from + * this list and hand them to kmirrord, which will schedule the + * recovery io with kcopyd. + * + * recovered_regions: Regions that kcopyd has successfully + * recovered. dm_rh_update_states() will now schedule any delayed + * io, up the recovery_count, and remove the region from the + * hash. + * + * There are 2 locks: + * A rw spin lock 'hash_lock' protects just the hash table, + * this is never held in write mode from interrupt context, + * which I believe means that we only have to disable irqs when + * doing a write lock. + * + * An ordinary spin lock 'region_lock' that protects the three + * lists in the region_hash, with the 'state', 'list' and + * 'delayed_bios' fields of the regions. This is used from irq + * context, so all other uses will have to suspend local irqs. + *---------------------------------------------------------------*/ +struct dm_region_hash { + uint32_t region_size; + unsigned region_shift; + + /* holds persistent region state */ + struct dm_dirty_log *log; + + /* hash table */ + rwlock_t hash_lock; + mempool_t *region_pool; + unsigned mask; + unsigned nr_buckets; + unsigned prime; + unsigned shift; + struct list_head *buckets; + + unsigned max_recovery; /* Max # of regions to recover in parallel */ + + spinlock_t region_lock; + atomic_t recovery_in_flight; + struct semaphore recovery_count; + struct list_head clean_regions; + struct list_head quiesced_regions; + struct list_head recovered_regions; + struct list_head failed_recovered_regions; + + void *context; + sector_t target_begin; + + /* Callback function to schedule bios writes */ + void (*dispatch_bios)(void *context, struct bio_list *bios); + + /* Callback function to wakeup callers worker thread. */ + void (*wakeup_workers)(void *context); + + /* Callback function to wakeup callers recovery waiters. */ + void (*wakeup_all_recovery_waiters)(void *context); +}; + +struct dm_region { + struct dm_region_hash *rh; /* FIXME: can we get rid of this ? */ + region_t key; + int state; + + struct list_head hash_list; + struct list_head list; + + atomic_t pending; + struct bio_list delayed_bios; +}; + +/* + * Conversion fns + */ +region_t dm_rh_sector_to_region(struct dm_region_hash *rh, sector_t sector) +{ + return sector >> rh->region_shift; +} +// EXPORT_SYMBOL_GPL(dm_rh_sector_to_region); + +sector_t dm_rh_region_to_sector(struct dm_region_hash *rh, region_t region) +{ + return region << rh->region_shift; +} +// EXPORT_SYMBOL_GPL(dm_rh_region_to_sector); + +region_t dm_rh_bio_to_region(struct dm_region_hash *rh, struct bio *bio) +{ + return dm_rh_sector_to_region(rh, bio->bi_sector - rh->target_begin); +} +// EXPORT_SYMBOL_GPL(dm_rh_bio_to_region); + +void *dm_rh_region_context(struct dm_region *reg) +{ + return reg->rh->context; +} +// EXPORT_SYMBOL_GPL(dm_rh_region_context); + +region_t dm_rh_get_region_key(struct dm_region *reg) +{ + return reg->key; +} +// EXPORT_SYMBOL_GPL(dm_rh_get_region_key); + +sector_t dm_rh_get_region_size(struct dm_region_hash *rh) +{ + return rh->region_size; +} +// EXPORT_SYMBOL_GPL(dm_rh_get_region_size); + +/* + * FIXME: shall we pass in a structure instead of all these args to + * dm_region_hash_create()???? + */ +#define RH_HASH_MULT 2654435387U +#define RH_HASH_SHIFT 12 + +#define MIN_REGIONS 64 +struct dm_region_hash *dm_region_hash_create( + void *context, void (*dispatch_bios)(void *context, + struct bio_list *bios), + void (*wakeup_workers)(void *context), + void (*wakeup_all_recovery_waiters)(void *context), + sector_t target_begin, unsigned max_recovery, + struct dm_dirty_log *log, uint32_t region_size, + region_t nr_regions) +{ + struct dm_region_hash *rh; + unsigned nr_buckets, max_buckets; + size_t i; + + /* + * Calculate a suitable number of buckets for our hash + * table. + */ + max_buckets = nr_regions >> 6; + for (nr_buckets = 128u; nr_buckets < max_buckets; nr_buckets <<= 1) + ; + nr_buckets >>= 1; + + rh = kmalloc(sizeof(*rh), GFP_KERNEL); + if (!rh) { + DMERR("unable to allocate region hash memory"); + return ERR_PTR(-ENOMEM); + } + + rh->context = context; + rh->dispatch_bios = dispatch_bios; + rh->wakeup_workers = wakeup_workers; + rh->wakeup_all_recovery_waiters = wakeup_all_recovery_waiters; + rh->target_begin = target_begin; + rh->max_recovery = max_recovery; + rh->log = log; + rh->region_size = region_size; + rh->region_shift = ffs(region_size) - 1; + rwlock_init(&rh->hash_lock); + rh->mask = nr_buckets - 1; + rh->nr_buckets = nr_buckets; + + rh->shift = RH_HASH_SHIFT; + rh->prime = RH_HASH_MULT; + + rh->buckets = vmalloc(nr_buckets * sizeof(*rh->buckets)); + if (!rh->buckets) { + DMERR("unable to allocate region hash bucket memory"); + kfree(rh); + return ERR_PTR(-ENOMEM); + } + + for (i = 0; i < nr_buckets; i++) + INIT_LIST_HEAD(rh->buckets + i); + + spin_lock_init(&rh->region_lock); + sema_init(&rh->recovery_count, 0); + atomic_set(&rh->recovery_in_flight, 0); + INIT_LIST_HEAD(&rh->clean_regions); + INIT_LIST_HEAD(&rh->quiesced_regions); + INIT_LIST_HEAD(&rh->recovered_regions); + INIT_LIST_HEAD(&rh->failed_recovered_regions); + + rh->region_pool = mempool_create_kmalloc_pool(MIN_REGIONS, + sizeof(struct dm_region)); + if (!rh->region_pool) { + vfree(rh->buckets); + kfree(rh); + rh = ERR_PTR(-ENOMEM); + } + + return rh; +} +// EXPORT_SYMBOL_GPL(dm_region_hash_create); + +void dm_region_hash_destroy(struct dm_region_hash *rh) +{ + unsigned h; + struct dm_region *reg, *nreg; + + BUG_ON(!list_empty(&rh->quiesced_regions)); + for (h = 0; h < rh->nr_buckets; h++) { + list_for_each_entry_safe(reg, nreg, rh->buckets + h, + hash_list) { + BUG_ON(atomic_read(®->pending)); + mempool_free(reg, rh->region_pool); + } + } + + if (rh->log) + dm_dirty_log_destroy(rh->log); + + if (rh->region_pool) + mempool_destroy(rh->region_pool); + + vfree(rh->buckets); + kfree(rh); +} +// EXPORT_SYMBOL_GPL(dm_region_hash_destroy); + +struct dm_dirty_log *dm_rh_dirty_log(struct dm_region_hash *rh) +{ + return rh->log; +} +// EXPORT_SYMBOL_GPL(dm_rh_dirty_log); + +static unsigned rh_hash(struct dm_region_hash *rh, region_t region) +{ + return (unsigned) ((region * rh->prime) >> rh->shift) & rh->mask; +} + +static struct dm_region *__rh_lookup(struct dm_region_hash *rh, region_t region) +{ + struct dm_region *reg; + struct list_head *bucket = rh->buckets + rh_hash(rh, region); + + list_for_each_entry(reg, bucket, hash_list) + if (reg->key == region) + return reg; + + return NULL; +} + +static void __rh_insert(struct dm_region_hash *rh, struct dm_region *reg) +{ + list_add(®->hash_list, rh->buckets + rh_hash(rh, reg->key)); +} + +static struct dm_region *__rh_alloc(struct dm_region_hash *rh, region_t region) +{ + struct dm_region *reg, *nreg; + + nreg = mempool_alloc(rh->region_pool, GFP_ATOMIC); + if (unlikely(!nreg)) + nreg = kmalloc(sizeof(*nreg), GFP_NOIO | __GFP_NOFAIL); + + nreg->state = rh->log->type->in_sync(rh->log, region, 1) ? + DM_RH_CLEAN : DM_RH_NOSYNC; + nreg->rh = rh; + nreg->key = region; + INIT_LIST_HEAD(&nreg->list); + atomic_set(&nreg->pending, 0); + bio_list_init(&nreg->delayed_bios); + + write_lock_irq(&rh->hash_lock); + reg = __rh_lookup(rh, region); + if (reg) + /* We lost the race. */ + mempool_free(nreg, rh->region_pool); + else { + __rh_insert(rh, nreg); + if (nreg->state == DM_RH_CLEAN) { + spin_lock(&rh->region_lock); + list_add(&nreg->list, &rh->clean_regions); + spin_unlock(&rh->region_lock); + } + + reg = nreg; + } + write_unlock_irq(&rh->hash_lock); + + return reg; +} + +static struct dm_region *__rh_find(struct dm_region_hash *rh, region_t region) +{ + struct dm_region *reg; + + reg = __rh_lookup(rh, region); + if (!reg) { + read_unlock(&rh->hash_lock); + reg = __rh_alloc(rh, region); + read_lock(&rh->hash_lock); + } + + return reg; +} + +int dm_rh_get_state(struct dm_region_hash *rh, region_t region, int may_block) +{ + int r; + struct dm_region *reg; + + read_lock(&rh->hash_lock); + reg = __rh_lookup(rh, region); + read_unlock(&rh->hash_lock); + + if (reg) + return reg->state; + + /* + * The region wasn't in the hash, so we fall back to the + * dirty log. + */ + r = rh->log->type->in_sync(rh->log, region, may_block); + + /* + * Any error from the dirty log (eg. -EWOULDBLOCK) gets + * taken as a DM_RH_NOSYNC + */ + return r == 1 ? DM_RH_CLEAN : DM_RH_NOSYNC; +} +// EXPORT_SYMBOL_GPL(dm_rh_get_state); + +static void complete_resync_work(struct dm_region *reg, int success) +{ + struct dm_region_hash *rh = reg->rh; + + rh->log->type->set_region_sync(rh->log, reg->key, success); + + /* + * Dispatch the bios before we call 'wake_up_all'. + * This is important because if we are suspending, + * we want to know that recovery is complete and + * the work queue is flushed. If we wake_up_all + * before we dispatch_bios (queue bios and call wake()), + * then we risk suspending before the work queue + * has been properly flushed. + */ + rh->dispatch_bios(rh->context, ®->delayed_bios); + if (atomic_dec_and_test(&rh->recovery_in_flight)) + rh->wakeup_all_recovery_waiters(rh->context); + up(&rh->recovery_count); +} + +/* dm_rh_mark_nosync + * @ms + * @bio + * @done + * @error + * + * The bio was written on some mirror(s) but failed on other mirror(s). + * We can successfully endio the bio but should avoid the region being + * marked clean by setting the state DM_RH_NOSYNC. + * + * This function is _not_ safe in interrupt context! + */ +void dm_rh_mark_nosync(struct dm_region_hash *rh, + struct bio *bio, unsigned done, int error) +{ + unsigned long flags; + struct dm_dirty_log *log = rh->log; + struct dm_region *reg; + region_t region = dm_rh_bio_to_region(rh, bio); + int recovering = 0; + + /* We must inform the log that the sync count has changed. */ + log->type->set_region_sync(log, region, 0); + + read_lock(&rh->hash_lock); + reg = __rh_find(rh, region); + read_unlock(&rh->hash_lock); + + /* region hash entry should exist because write was in-flight */ + BUG_ON(!reg); + BUG_ON(!list_empty(®->list)); + + spin_lock_irqsave(&rh->region_lock, flags); + /* + * Possible cases: + * 1) DM_RH_DIRTY + * 2) DM_RH_NOSYNC: was dirty, other preceeding writes failed + * 3) DM_RH_RECOVERING: flushing pending writes + * Either case, the region should have not been connected to list. + */ + recovering = (reg->state == DM_RH_RECOVERING); + reg->state = DM_RH_NOSYNC; + BUG_ON(!list_empty(®->list)); + spin_unlock_irqrestore(&rh->region_lock, flags); + + bio_endio(bio, error); + if (recovering) + complete_resync_work(reg, 0); +} +// EXPORT_SYMBOL_GPL(dm_rh_mark_nosync); + +void dm_rh_update_states(struct dm_region_hash *rh, int errors_handled) +{ + struct dm_region *reg, *next; + + LIST_HEAD(clean); + LIST_HEAD(recovered); + LIST_HEAD(failed_recovered); + + /* + * Quickly grab the lists. + */ + write_lock_irq(&rh->hash_lock); + spin_lock(&rh->region_lock); + if (!list_empty(&rh->clean_regions)) { + list_splice_init(&rh->clean_regions, &clean); + + list_for_each_entry(reg, &clean, list) + list_del(®->hash_list); + } + + if (!list_empty(&rh->recovered_regions)) { + list_splice_init(&rh->recovered_regions, &recovered); + + list_for_each_entry(reg, &recovered, list) + list_del(®->hash_list); + } + + if (!list_empty(&rh->failed_recovered_regions)) { + list_splice_init(&rh->failed_recovered_regions, + &failed_recovered); + + list_for_each_entry(reg, &failed_recovered, list) + list_del(®->hash_list); + } + + spin_unlock(&rh->region_lock); + write_unlock_irq(&rh->hash_lock); + + /* + * All the regions on the recovered and clean lists have + * now been pulled out of the system, so no need to do + * any more locking. + */ + list_for_each_entry_safe(reg, next, &recovered, list) { + rh->log->type->clear_region(rh->log, reg->key); + complete_resync_work(reg, 1); + mempool_free(reg, rh->region_pool); + } + + list_for_each_entry_safe(reg, next, &failed_recovered, list) { + complete_resync_work(reg, errors_handled ? 0 : 1); + mempool_free(reg, rh->region_pool); + } + + list_for_each_entry_safe(reg, next, &clean, list) { + rh->log->type->clear_region(rh->log, reg->key); + mempool_free(reg, rh->region_pool); + } + + rh->log->type->flush(rh->log); +} +// EXPORT_SYMBOL_GPL(dm_rh_update_states); + +void dm_rh_inc(struct dm_region_hash *rh, region_t region) +{ + struct dm_region *reg; + + read_lock(&rh->hash_lock); + reg = __rh_find(rh, region); + + spin_lock_irq(&rh->region_lock); + atomic_inc(®->pending); + + if (reg->state == DM_RH_CLEAN) { + reg->state = DM_RH_DIRTY; + list_del_init(®->list); /* take off the clean list */ + spin_unlock_irq(&rh->region_lock); + + rh->log->type->mark_region(rh->log, reg->key); + } else + spin_unlock_irq(&rh->region_lock); + + + read_unlock(&rh->hash_lock); +} +// EXPORT_SYMBOL_GPL(dm_rh_inc); + +void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios) +{ + struct bio *bio; + + for (bio = bios->head; bio; bio = bio->bi_next) + dm_rh_inc(rh, dm_rh_bio_to_region(rh, bio)); +} +// EXPORT_SYMBOL_GPL(dm_rh_inc_pending); + +void dm_rh_dec(struct dm_region_hash *rh, region_t region) +{ + unsigned long flags; + struct dm_region *reg; + int should_wake = 0; + + read_lock(&rh->hash_lock); + reg = __rh_lookup(rh, region); + read_unlock(&rh->hash_lock); + + spin_lock_irqsave(&rh->region_lock, flags); + if (atomic_dec_and_test(®->pending)) { + /* + * There is no pending I/O for this region. + * We can move the region to corresponding list for next action. + * At this point, the region is not yet connected to any list. + * + * If the state is DM_RH_NOSYNC, the region should be kept off + * from clean list. + * The hash entry for DM_RH_NOSYNC will remain in memory + * until the region is recovered or the map is reloaded. + */ + + /* do nothing for DM_RH_NOSYNC */ + if (reg->state == DM_RH_RECOVERING) { + list_add_tail(®->list, &rh->quiesced_regions); + } else if (reg->state == DM_RH_DIRTY) { + reg->state = DM_RH_CLEAN; + list_add(®->list, &rh->clean_regions); + } + should_wake = 1; + } + spin_unlock_irqrestore(&rh->region_lock, flags); + + if (should_wake) + rh->wakeup_workers(rh->context); +} +// EXPORT_SYMBOL_GPL(dm_rh_dec); + +/* + * Starts quiescing a region in preparation for recovery. + */ +static int __rh_recovery_prepare(struct dm_region_hash *rh) +{ + int r; + region_t region; + struct dm_region *reg; + + /* + * Ask the dirty log what's next. + */ + r = rh->log->type->get_resync_work(rh->log, ®ion); + if (r <= 0) + return r; + + /* + * Get this region, and start it quiescing by setting the + * recovering flag. + */ + read_lock(&rh->hash_lock); + reg = __rh_find(rh, region); + read_unlock(&rh->hash_lock); + + spin_lock_irq(&rh->region_lock); + reg->state = DM_RH_RECOVERING; + + /* Already quiesced ? */ + if (atomic_read(®->pending)) + list_del_init(®->list); + else + list_move(®->list, &rh->quiesced_regions); + + spin_unlock_irq(&rh->region_lock); + + return 1; +} + +void dm_rh_recovery_prepare(struct dm_region_hash *rh) +{ + /* Extra reference to avoid race with dm_rh_stop_recovery */ + atomic_inc(&rh->recovery_in_flight); + + while (!down_trylock(&rh->recovery_count)) { + atomic_inc(&rh->recovery_in_flight); + if (__rh_recovery_prepare(rh) <= 0) { + atomic_dec(&rh->recovery_in_flight); + up(&rh->recovery_count); + break; + } + } + + /* Drop the extra reference */ + if (atomic_dec_and_test(&rh->recovery_in_flight)) + rh->wakeup_all_recovery_waiters(rh->context); +} +// EXPORT_SYMBOL_GPL(dm_rh_recovery_prepare); + +/* + * Returns any quiesced regions. + */ +struct dm_region *dm_rh_recovery_start(struct dm_region_hash *rh) +{ + struct dm_region *reg = NULL; + + spin_lock_irq(&rh->region_lock); + if (!list_empty(&rh->quiesced_regions)) { + reg = list_entry(rh->quiesced_regions.next, + struct dm_region, list); + list_del_init(®->list); /* remove from the quiesced list */ + } + spin_unlock_irq(&rh->region_lock); + + return reg; +} +// EXPORT_SYMBOL_GPL(dm_rh_recovery_start); + +void dm_rh_recovery_end(struct dm_region *reg, int success) +{ + struct dm_region_hash *rh = reg->rh; + + spin_lock_irq(&rh->region_lock); + if (success) + list_add(®->list, ®->rh->recovered_regions); + else { + reg->state = DM_RH_NOSYNC; + list_add(®->list, ®->rh->failed_recovered_regions); + } + spin_unlock_irq(&rh->region_lock); + + rh->wakeup_workers(rh->context); +} +// EXPORT_SYMBOL_GPL(dm_rh_recovery_end); + +/* Return recovery in flight count. */ +int dm_rh_recovery_in_flight(struct dm_region_hash *rh) +{ + return atomic_read(&rh->recovery_in_flight); +} +// EXPORT_SYMBOL_GPL(dm_rh_recovery_in_flight); + +int dm_rh_flush(struct dm_region_hash *rh) +{ + return rh->log->type->flush(rh->log); +} +// EXPORT_SYMBOL_GPL(dm_rh_flush); + +void dm_rh_delay(struct dm_region_hash *rh, struct bio *bio) +{ + struct dm_region *reg; + + read_lock(&rh->hash_lock); + reg = __rh_find(rh, dm_rh_bio_to_region(rh, bio)); + bio_list_add(®->delayed_bios, bio); + read_unlock(&rh->hash_lock); +} +// EXPORT_SYMBOL_GPL(dm_rh_delay); + +void dm_rh_delay_by_region(struct dm_region_hash *rh, + struct bio *bio, region_t region) +{ + struct dm_region *reg; + + /* FIXME: locking. */ + read_lock(&rh->hash_lock); + reg = __rh_find(rh, region); + bio_list_add(®->delayed_bios, bio); + read_unlock(&rh->hash_lock); +} +// EXPORT_SYMBOL_GPL(dm_rh_delay_by_region); + +void dm_rh_stop_recovery(struct dm_region_hash *rh) +{ + int i; + + /* wait for any recovering regions */ + for (i = 0; i < rh->max_recovery; i++) + down(&rh->recovery_count); +} +// EXPORT_SYMBOL_GPL(dm_rh_stop_recovery); + +void dm_rh_start_recovery(struct dm_region_hash *rh) +{ + int i; + + for (i = 0; i < rh->max_recovery; i++) + up(&rh->recovery_count); + + rh->wakeup_workers(rh->context); +} +// EXPORT_SYMBOL_GPL(dm_rh_start_recovery); + +MODULE_DESCRIPTION(DM_NAME " region hash"); +MODULE_AUTHOR("Joe Thornber/Heinz Mauelshagen "); +MODULE_LICENSE("GPL"); --- linux-fsl-imx51-2.6.31.orig/ubuntu/lenovo-sl-laptop/Kconfig +++ linux-fsl-imx51-2.6.31/ubuntu/lenovo-sl-laptop/Kconfig @@ -0,0 +1,5 @@ +config LENOVO_SL_LAPTOP + tristate "Lenovo SL Thinkpads support" + depends on X86 + default m + --- linux-fsl-imx51-2.6.31.orig/ubuntu/lenovo-sl-laptop/BOM +++ linux-fsl-imx51-2.6.31/ubuntu/lenovo-sl-laptop/BOM @@ -0,0 +1,3 @@ +Downloaded from: http://github.com/tetromino/lenovo-sl-laptop/tree/master +Current Version: 0.02 +Description: Linux kernel support for the Lenovo SL series ThinkPads --- linux-fsl-imx51-2.6.31.orig/ubuntu/lenovo-sl-laptop/Makefile +++ linux-fsl-imx51-2.6.31/ubuntu/lenovo-sl-laptop/Makefile @@ -0,0 +1,2 @@ + +obj-$(CONFIG_LENOVO_SL_LAPTOP) := lenovo-sl-laptop.o --- linux-fsl-imx51-2.6.31.orig/ubuntu/lenovo-sl-laptop/README +++ linux-fsl-imx51-2.6.31/ubuntu/lenovo-sl-laptop/README @@ -0,0 +1,45 @@ +lenoso-sl-laptop + +This is an experimental driver for the Lenovo ThinkPad SL +series, since those laptops are currently not supported by +the thinkpad_acpi driver. + +Works: hotkeys, bluetooth, the Lenovo Care LED, the fan +Experimental: backlight brightness WWAN +Not tested: UWB +Not implemented: hdaps accelerometer + +NB: to make the Lenovo Care LED blink, make sure the LED timer +trigger is enabled (CONFIG_LEDS_TRIGGERS_TIMER) and do +echo "timer" > /sys/class/leds/lensl::lenovocare/trigger + + +The backlight brightness control is useful because the SL +series use the ACPI brightness API in a non-standard manner, +causing buggy behavior with the standard ACPI video module +backlight control. + +To enable the brightness control, load the module with the +"control_backlight=1" module parameter (i.e. +insmod lenovo-sl-laptop.ko control_backlight=1 ) + +Note that the brightness control will likely conflict with +the ACPI video driver brightness control. So, if you have +the ACPI video driver loaded (and you probably do): + +echo 0 > /sys/module/video/parameters/brightness_switch_enabled +insmod lenovo-sl-laptop.ko control_backlight=1 +and then restart X. + +Alternatively, you can try to use the "acpi_backlight=vendor" +kernel boot parameter (recognized by kernel versions 2.6.28 +and higher). + +Alternatively alternatively, simply unload the ACPI video +driver (rmmod video). + + +To build the module for your current kernel, run make. +Note that you will need to have the sources or headers for +your kernel in the correct location (depends on the distro). + --- linux-fsl-imx51-2.6.31.orig/ubuntu/lenovo-sl-laptop/lenovo-sl-laptop.c +++ linux-fsl-imx51-2.6.31/ubuntu/lenovo-sl-laptop/lenovo-sl-laptop.c @@ -0,0 +1,1420 @@ +/* + * lenovo-sl-laptop.c - Lenovo ThinkPad SL Series Extras Driver + * + * + * Copyright (C) 2008-2009 Alexandre Rostovtsev + * + * Largely based on thinkpad_acpi.c, eeepc-laptop.c, and video.c which + * are copyright their respective authors. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301, USA. + * + */ + +#define LENSL_LAPTOP_VERSION "0.02" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#define LENSL_MODULE_DESC "Lenovo ThinkPad SL Series Extras driver" +#define LENSL_MODULE_NAME "lenovo-sl-laptop" + +MODULE_AUTHOR("Alexandre Rostovtsev"); +MODULE_DESCRIPTION(LENSL_MODULE_DESC); +MODULE_LICENSE("GPL"); + +/* #define instead of enum needed for macro */ +#define LENSL_EMERG 0 +#define LENSL_ALERT 1 +#define LENSL_CRIT 2 +#define LENSL_ERR 3 +#define LENSL_WARNING 4 +#define LENSL_NOTICE 5 +#define LENSL_INFO 6 +#define LENSL_DEBUG 7 + +#define vdbg_printk_(a_dbg_level, format, arg...) \ + do { if (dbg_level >= a_dbg_level) \ + printk("<" #a_dbg_level ">" LENSL_MODULE_NAME ": " \ + format, ## arg); \ + } while (0) +#define vdbg_printk(a_dbg_level, format, arg...) \ + vdbg_printk_(a_dbg_level, format, ## arg) + +#define LENSL_HKEY_FILE LENSL_MODULE_NAME +#define LENSL_DRVR_NAME LENSL_MODULE_NAME + +/* FIXME : we use "thinkpad_screen" for now to ensure compatibility with + the xf86-video-intel driver (it checks the name against a fixed list + of strings, see i830_lvds.c) but this is obviously suboptimal since + this string is usually used by thinkpad_acpi.c */ +#define LENSL_BACKLIGHT_NAME "thinkpad_screen" + +#define LENSL_HKEY_POLL_KTHREAD_NAME "klensl_hkeyd" +#define LENSL_WORKQUEUE_NAME "klensl_wq" + +#define LENSL_EC0 "\\_SB.PCI0.SBRG.EC0" +#define LENSL_HKEY LENSL_EC0 ".HKEY" +#define LENSL_LCDD "\\_SB.PCI0.VGA.LCDD" + +#define LENSL_MAX_ACPI_ARGS 3 + +/* parameters */ + +static unsigned int dbg_level = LENSL_INFO; +static int debug_ec; +static int control_backlight; +static int bluetooth_auto_enable = 1; +static int wwan_auto_enable = 1; +static int uwb_auto_enable = 1; +module_param(debug_ec, bool, S_IRUGO); +MODULE_PARM_DESC(debug_ec, + "Present EC debugging interface in procfs. WARNING: writing to the " + "EC can hang your system and possibly damage your hardware."); +module_param(control_backlight, bool, S_IRUGO); +MODULE_PARM_DESC(control_backlight, + "Control backlight brightness; can conflict with ACPI video driver."); +module_param_named(debug, dbg_level, uint, S_IRUGO); +MODULE_PARM_DESC(debug, + "Set debug verbosity level (0 = nothing, 7 = everything)."); +module_param(bluetooth_auto_enable, bool, S_IRUGO); +MODULE_PARM_DESC(bluetooth_auto_enable, + "Automatically enable bluetooth (if supported by hardware) when the " + "module is loaded."); +module_param(wwan_auto_enable, bool, S_IRUGO); +MODULE_PARM_DESC(wwan_auto_enable, + "Automatically enable WWAN (if supported by hardware) when the " + "module is loaded."); +module_param(uwb_auto_enable, bool, S_IRUGO); +MODULE_PARM_DESC(wwan_auto_enable, + "Automatically enable UWB (if supported by hardware) when the " + "module is loaded."); + +/* general */ + +static acpi_handle hkey_handle, ec0_handle; +static struct platform_device *lensl_pdev; +static struct input_dev *hkey_inputdev; +static struct workqueue_struct *lensl_wq; + +static int parse_strtoul(const char *buf, + unsigned long max, unsigned long *value) +{ + int res; + + res = strict_strtoul(buf, 0, value); + if (res) + return res; + if (*value > max) + return -EINVAL; + return 0; +} + +static int lensl_acpi_int_func(acpi_handle handle, char *pathname, int *ret, + int n_arg, ...) +{ + acpi_status status; + struct acpi_object_list params; + union acpi_object in_obj[LENSL_MAX_ACPI_ARGS], out_obj; + struct acpi_buffer result, *resultp; + int i; + va_list ap; + + if (!handle) + return -EINVAL; + if (n_arg < 0 || n_arg > LENSL_MAX_ACPI_ARGS) + return -EINVAL; + va_start(ap, n_arg); + for (i = 0; i < n_arg; i++) { + in_obj[i].integer.value = va_arg(ap, int); + in_obj[i].type = ACPI_TYPE_INTEGER; + } + va_end(ap); + params.count = n_arg; + params.pointer = in_obj; + + if (ret) { + result.length = sizeof(out_obj); + result.pointer = &out_obj; + resultp = &result; + } else + resultp = NULL; + + status = acpi_evaluate_object(handle, pathname, ¶ms, resultp); + if (ACPI_FAILURE(status)) + return -EIO; + if (ret) + *ret = out_obj.integer.value; + + vdbg_printk(LENSL_DEBUG, "ACPI : %s(", pathname); + if (dbg_level >= LENSL_DEBUG) { + for (i = 0; i < n_arg; i++) { + if (i) + printk(", "); + printk("%d", (int)in_obj[i].integer.value); + } + printk(")"); + if (ret) + printk(" == %d", *ret); + printk("\n"); + } + return 0; +} + +/************************************************************************* + Bluetooth, WWAN, UWB + *************************************************************************/ + +enum { + /* ACPI GBDC/SBDC, GWAN/SWAN, GUWB/SUWB bits */ + LENSL_RADIO_HWPRESENT = 0x01, /* hardware is available */ + LENSL_RADIO_RADIOSSW = 0x02, /* radio is enabled */ + LENSL_RADIO_RESUMECTRL = 0x04, /* state at resume: off/last state */ +}; + +typedef enum { + LENSL_BLUETOOTH = 0, + LENSL_WWAN, + LENSL_UWB, +} lensl_radio_type; + +/* pretend_blocked indicates whether we pretend that the device is + hardware-blocked (used primarily to prevent the device from coming + online when the module is loaded) */ +struct lensl_radio { + lensl_radio_type type; + enum rfkill_type rfktype; + int present; + char *name; + char *rfkname; + struct rfkill *rfk; + int (*get_acpi)(int *); + int (*set_acpi)(int); + int *auto_enable; +}; + +static inline int get_wlsw(int *value) +{ + return lensl_acpi_int_func(hkey_handle, "WLSW", value, 0); +} + +static inline int get_gbdc(int *value) +{ + return lensl_acpi_int_func(hkey_handle, "GBDC", value, 0); +} + +static inline int get_gwan(int *value) +{ + return lensl_acpi_int_func(hkey_handle, "GWAN", value, 0); +} + +static inline int get_guwb(int *value) +{ + return lensl_acpi_int_func(hkey_handle, "GUWB", value, 0); +} + +static inline int set_sbdc(int value) +{ + return lensl_acpi_int_func(hkey_handle, "SBDC", NULL, 1, value); +} + +static inline int set_swan(int value) +{ + return lensl_acpi_int_func(hkey_handle, "SWAN", NULL, 1, value); +} + +static inline int set_suwb(int value) +{ + return lensl_acpi_int_func(hkey_handle, "SUWB", NULL, 1, value); +} + +static int lensl_radio_get(struct lensl_radio *radio, int *hw_blocked, + int *value) +{ + int wlsw; + + *hw_blocked = 0; + if (!radio) + return -EINVAL; + if (!radio->present) + return -ENODEV; + if (!get_wlsw(&wlsw) && !wlsw) + *hw_blocked = 1; + if (radio->get_acpi(value)) + return -EIO; + return 0; +} + +static int lensl_radio_set_on(struct lensl_radio *radio, int *hw_blocked, + bool on) +{ + int value, ret; + if ((ret = lensl_radio_get(radio, hw_blocked, &value)) < 0) + return ret; + /* WLSW overrides radio in firmware/hardware, but there is + no reason to risk weird behaviour. */ + if (*hw_blocked) + return ret; + if (on) + value |= LENSL_RADIO_RADIOSSW; + else + value &= ~LENSL_RADIO_RADIOSSW; + if (radio->set_acpi(value)) + return -EIO; + return 0; +} + +/* Bluetooth/WWAN/UWB rfkill interface */ + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,30) + +static int lensl_radio_rfkill_get_state(void *data, enum rfkill_state *state) +{ + int ret, value, hw_blocked = 0; + ret = lensl_radio_get((struct lensl_radio *)data, + &hw_blocked, &value); + + if (hw_blocked) { + *state = RFKILL_STATE_HARD_BLOCKED; + return 0; + } + + if (ret) + return ret; + + if (value & LENSL_RADIO_RADIOSSW) + *state = RFKILL_STATE_UNBLOCKED; + else + *state = RFKILL_STATE_SOFT_BLOCKED; + return 0; +} + +static int lensl_radio_rfkill_toggle_radio(void *data, enum rfkill_state state) +{ + int ret, value, hw_blocked = 0; + ret = lensl_radio_get((struct lensl_radio *)data, + &hw_blocked, &value); + + if (state == RFKILL_STATE_UNBLOCKED) { + if (hw_blocked) + return -EPERM; + if (ret) + return ret; + value = 1; + } else { + if (ret && !hw_blocked) + return ret; + value = 0; + } + + ret = lensl_radio_set_on((struct lensl_radio *)data, + &hw_blocked, value); + + if (hw_blocked) + return 0; + return ret; +} + +static int lensl_radio_new_rfkill(struct lensl_radio *radio, + struct rfkill **rfk, bool sw_blocked, + bool hw_blocked) +{ + int res; + + *rfk = rfkill_allocate(&lensl_pdev->dev, radio->rfktype); + if (!*rfk) { + vdbg_printk(LENSL_ERR, + "Failed to allocate memory for rfkill class\n"); + return -ENOMEM; + } + + (*rfk)->name = radio->rfkname; + (*rfk)->get_state = lensl_radio_rfkill_get_state; + (*rfk)->toggle_radio = lensl_radio_rfkill_toggle_radio; + (*rfk)->data = radio; + + if (hw_blocked) + (*rfk)->state = RFKILL_STATE_HARD_BLOCKED; + else if (sw_blocked) + (*rfk)->state = RFKILL_STATE_SOFT_BLOCKED; + else + (*rfk)->state = RFKILL_STATE_UNBLOCKED; + + res = rfkill_register(*rfk); + if (res < 0) { + vdbg_printk(LENSL_ERR, + "Failed to register %s rfkill switch: %d\n", + radio->rfkname, res); + rfkill_free(*rfk); + *rfk = NULL; + return res; + } + + return 0; +} + +#else + +static void lensl_radio_rfkill_query(struct rfkill *rfk, void *data) +{ + int ret, value = 0; + ret = get_wlsw(&value); + if (ret) + return; + rfkill_set_hw_state(rfk, !value); +} + +static int lensl_radio_rfkill_set_block(void *data, bool blocked) +{ + int ret, hw_blocked = 0; + ret = lensl_radio_set_on((struct lensl_radio *)data, + &hw_blocked, !blocked); + /* rfkill spec: just return 0 on hard block */ + return ret; +} + +static struct rfkill_ops rfkops = { + NULL, + lensl_radio_rfkill_query, + lensl_radio_rfkill_set_block, +}; + +static int lensl_radio_new_rfkill(struct lensl_radio *radio, + struct rfkill **rfk, bool sw_blocked, + bool hw_blocked) +{ + int res; + + *rfk = rfkill_alloc(radio->rfkname, &lensl_pdev->dev, radio->rfktype, + &rfkops, radio); + if (!*rfk) { + vdbg_printk(LENSL_ERR, + "Failed to allocate memory for rfkill class\n"); + return -ENOMEM; + } + + rfkill_set_hw_state(*rfk, hw_blocked); + rfkill_set_sw_state(*rfk, sw_blocked); + + res = rfkill_register(*rfk); + if (res < 0) { + vdbg_printk(LENSL_ERR, + "Failed to register %s rfkill switch: %d\n", + radio->rfkname, res); + rfkill_destroy(*rfk); + *rfk = NULL; + return res; + } + + return 0; +} + +#endif /* LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,30) */ + +/* Bluetooth/WWAN/UWB init and exit */ + +static struct lensl_radio lensl_radios[3] = { + { + LENSL_BLUETOOTH, + RFKILL_TYPE_BLUETOOTH, + 0, + "bluetooth", + "lensl_bluetooth_sw", + NULL, + get_gbdc, + set_sbdc, + &bluetooth_auto_enable, + }, + { + LENSL_WWAN, + RFKILL_TYPE_WWAN, + 0, + "WWAN", + "lensl_wwan_sw", + NULL, + get_gwan, + set_swan, + &wwan_auto_enable, + }, + { + LENSL_UWB, + RFKILL_TYPE_UWB, + 0, + "UWB", + "lensl_uwb_sw", + NULL, + get_guwb, + set_suwb, + &uwb_auto_enable, + }, +}; + +static void radio_exit(lensl_radio_type type) +{ + if (lensl_radios[type].rfk) + rfkill_unregister(lensl_radios[type].rfk); +} + +static int radio_init(lensl_radio_type type) +{ + int value, res, hw_blocked = 0, sw_blocked; + + if (!hkey_handle) + return -ENODEV; + lensl_radios[type].present = 1; /* need for lensl_radio_get */ + res = lensl_radio_get(&lensl_radios[type], &hw_blocked, &value); + lensl_radios[type].present = 0; + if (res && !hw_blocked) + return -EIO; + if (!(value & LENSL_RADIO_HWPRESENT)) + return -ENODEV; + lensl_radios[type].present = 1; + + if (*lensl_radios[type].auto_enable) { + sw_blocked = 0; + value |= LENSL_RADIO_RADIOSSW; + lensl_radios[type].set_acpi(value); + } else { + sw_blocked = 1; + value &= ~LENSL_RADIO_RADIOSSW; + lensl_radios[type].set_acpi(value); + } + + res = lensl_radio_new_rfkill(&lensl_radios[type], &lensl_radios[type].rfk, + sw_blocked, hw_blocked); + + if (res) { + radio_exit(type); + return res; + } + vdbg_printk(LENSL_DEBUG, "Initialized %s subdriver\n", + lensl_radios[type].name); + + return 0; +} + +/************************************************************************* + backlight control - based on video.c + *************************************************************************/ + +/* NB: the reason why this needs to be implemented here is that the SL series + uses the ACPI interface for controlling the backlight in a non-standard + manner. See http://bugzilla.kernel.org/show_bug.cgi?id=12249 */ + +static acpi_handle lcdd_handle; +static struct backlight_device *backlight; +static struct lensl_vector { + int count; + int *values; +} backlight_levels; + +static int get_bcl(struct lensl_vector *levels) +{ + int i, status; + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + union acpi_object *o, *obj; + + if (!levels) + return -EINVAL; + if (levels->count) { + levels->count = 0; + kfree(levels->values); + } + + /* _BCL returns an array sorted from high to low; the first two values + are *not* special (non-standard behavior) */ + status = acpi_evaluate_object(lcdd_handle, "_BCL", NULL, &buffer); + if (!ACPI_SUCCESS(status)) + return status; + obj = (union acpi_object *)buffer.pointer; + if (!obj || (obj->type != ACPI_TYPE_PACKAGE)) { + vdbg_printk(LENSL_ERR, "Invalid _BCL data\n"); + status = -EFAULT; + goto out; + } + + levels->count = obj->package.count; + if (!levels->count) + goto out; + levels->values = kmalloc(levels->count * sizeof(int), GFP_KERNEL); + if (!levels->values) { + vdbg_printk(LENSL_ERR, + "Failed to allocate memory for brightness levels\n"); + status = -ENOMEM; + goto out; + } + + for (i = 0; i < obj->package.count; i++) { + o = (union acpi_object *)&obj->package.elements[i]; + if (o->type != ACPI_TYPE_INTEGER) { + vdbg_printk(LENSL_ERR, "Invalid brightness data\n"); + goto err; + } + levels->values[i] = (int) o->integer.value; + } + goto out; + +err: + levels->count = 0; + kfree(levels->values); + +out: + kfree(buffer.pointer); + + return status; +} + +static inline int set_bcm(int level) +{ + /* standard behavior */ + return lensl_acpi_int_func(lcdd_handle, "_BCM", NULL, 1, level); +} + +static inline int get_bqc(int *level) +{ + /* returns an index from the bottom into the _BCL package + (non-standard behavior) */ + return lensl_acpi_int_func(lcdd_handle, "_BQC", level, 0); +} + +/* backlight device sysfs support */ +static int lensl_bd_get_brightness(struct backlight_device *bd) +{ + int level = 0; + + if (get_bqc(&level)) + return 0; + + return level; +} + +static int lensl_bd_set_brightness_int(int request_level) +{ + int n; + n = backlight_levels.count - request_level - 1; + if (n >= 0 && n < backlight_levels.count) + return set_bcm(backlight_levels.values[n]); + + return -EINVAL; +} + +static int lensl_bd_set_brightness(struct backlight_device *bd) +{ + if (!bd) + return -EINVAL; + + return lensl_bd_set_brightness_int(bd->props.brightness); +} + +static struct backlight_ops lensl_backlight_ops = { + .get_brightness = lensl_bd_get_brightness, + .update_status = lensl_bd_set_brightness, +}; + +static void backlight_exit(void) +{ + backlight_device_unregister(backlight); + backlight = NULL; + if (backlight_levels.count) { + kfree(backlight_levels.values); + backlight_levels.count = 0; + } +} + +static int backlight_init(void) +{ + int status = 0; + + lcdd_handle = NULL; + backlight = NULL; + backlight_levels.count = 0; + backlight_levels.values = NULL; + + status = acpi_get_handle(NULL, LENSL_LCDD, &lcdd_handle); + if (ACPI_FAILURE(status)) { + vdbg_printk(LENSL_ERR, + "Failed to get ACPI handle for %s\n", LENSL_LCDD); + return -EIO; + } + + status = get_bcl(&backlight_levels); + if (status || !backlight_levels.count) + goto err; + + backlight = backlight_device_register(LENSL_BACKLIGHT_NAME, + NULL, NULL, &lensl_backlight_ops); + backlight->props.max_brightness = backlight_levels.count - 1; + backlight->props.brightness = lensl_bd_get_brightness(backlight); + vdbg_printk(LENSL_INFO, "Started backlight brightness control\n"); + goto out; +err: + if (backlight_levels.count) { + kfree(backlight_levels.values); + backlight_levels.count = 0; + } + vdbg_printk(LENSL_ERR, + "Failed to start backlight brightness control\n"); +out: + return status; +} + +/************************************************************************* + LEDs + *************************************************************************/ + +#ifdef CONFIG_NEW_LEDS + +#define LENSL_LED_TV_OFF 0 +#define LENSL_LED_TV_ON 0x02 +#define LENSL_LED_TV_BLINK 0x01 +#define LENSL_LED_TV_DIM 0x100 + +/* equivalent to the ThinkVantage LED on other ThinkPads */ +#define LENSL_LED_TV_NAME "lensl::lenovocare" + +struct { + struct led_classdev cdev; + enum led_brightness brightness; + int supported, new_code; + struct work_struct work; +} led_tv; + +static inline int set_tvls(int code) +{ + return lensl_acpi_int_func(hkey_handle, "TVLS", NULL, 1, code); +} + +static void led_tv_worker(struct work_struct *work) +{ + if (!led_tv.supported) + return; + set_tvls(led_tv.new_code); + if (led_tv.new_code) + led_tv.brightness = LED_FULL; + else + led_tv.brightness = LED_OFF; +} + +static void led_tv_brightness_set_sysfs(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + switch (brightness) { + case LED_OFF: + led_tv.new_code = LENSL_LED_TV_OFF; + break; + case LED_FULL: + led_tv.new_code = LENSL_LED_TV_ON; + break; + default: + return; + } + queue_work(lensl_wq, &led_tv.work); +} + +static enum led_brightness led_tv_brightness_get_sysfs( + struct led_classdev *led_cdev) +{ + return led_tv.brightness; +} + +static int led_tv_blink_set_sysfs(struct led_classdev *led_cdev, + unsigned long *delay_on, unsigned long *delay_off) +{ + if (*delay_on == 0 && *delay_off == 0) { + /* If we can choose the flash rate, use dimmed blinking -- + it looks better */ + led_tv.new_code = LENSL_LED_TV_ON | + LENSL_LED_TV_BLINK | LENSL_LED_TV_DIM; + *delay_on = 2000; + *delay_off = 2000; + } else if (*delay_on + *delay_off == 4000) { + /* User wants dimmed blinking */ + led_tv.new_code = LENSL_LED_TV_ON | + LENSL_LED_TV_BLINK | LENSL_LED_TV_DIM; + } else if (*delay_on == 7250 && *delay_off == 500) { + /* User wants standard blinking mode */ + led_tv.new_code = LENSL_LED_TV_ON | LENSL_LED_TV_BLINK; + } else + return -EINVAL; + queue_work(lensl_wq, &led_tv.work); + return 0; +} + +static void led_exit(void) +{ + if (led_tv.supported) { + led_classdev_unregister(&led_tv.cdev); + led_tv.supported = 0; + set_tvls(LENSL_LED_TV_OFF); + } +} + +static int led_init(void) +{ + int res; + + memset(&led_tv, 0, sizeof(led_tv)); + led_tv.cdev.brightness_get = led_tv_brightness_get_sysfs; + led_tv.cdev.brightness_set = led_tv_brightness_set_sysfs; + led_tv.cdev.blink_set = led_tv_blink_set_sysfs; + led_tv.cdev.name = LENSL_LED_TV_NAME; + INIT_WORK(&led_tv.work, led_tv_worker); + set_tvls(LENSL_LED_TV_OFF); + res = led_classdev_register(&lensl_pdev->dev, &led_tv.cdev); + if (res) { + vdbg_printk(LENSL_WARNING, "Failed to register LED device\n"); + return res; + } + led_tv.supported = 1; + vdbg_printk(LENSL_DEBUG, "Initialized LED subdriver\n"); + return 0; +} + +#else /* CONFIG_NEW_LEDS */ + +static void led_exit(void) +{ +} + +static int led_init(void) +{ + return -ENODEV; +} + +#endif /* CONFIG_NEW_LEDS */ + +/************************************************************************* + hwmon & fans + *************************************************************************/ + +static struct device *lensl_hwmon_device; +/* we do not have a reliable way of reading it from ACPI */ +static int pwm1_value = -1; +/* corresponds to ~2700 rpm */ +#define DEFAULT_PWM1 126 + +static inline int get_tach(int *value, int fan) +{ + return lensl_acpi_int_func(ec0_handle, "TACH", value, 1, fan); +} + +static inline int get_decf(int *value) +{ + return lensl_acpi_int_func(ec0_handle, "DECF", value, 0); +} + +/* speed must be in range 0 .. 255 */ +static inline int set_sfnv(int action, int speed) +{ + return lensl_acpi_int_func(ec0_handle, "SFNV", NULL, 2, action, speed); +} + +static int pwm1_enable_get_current(void) +{ + int res; + int value; + + res = get_decf(&value); + if (res) + return res; + if (value & 1) + return 1; + return 0; +} + +static ssize_t fan1_input_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int res; + int rpm; + + res = get_tach(&rpm, 0); + if (res) + return res; + return snprintf(buf, PAGE_SIZE, "%u\n", rpm); +} + +static ssize_t pwm1_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + if (pwm1_value > -1) + return snprintf(buf, PAGE_SIZE, "%u\n", pwm1_value); + return -EPERM; +} + +static ssize_t pwm1_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int status, res = 0; + unsigned long speed; + if (parse_strtoul(buf, 255, &speed)) + return -EINVAL; + status = pwm1_enable_get_current(); + if (status < 0) + return status; + if (status > 0) + res = set_sfnv(1, speed); + + if (res) + return res; + pwm1_value = speed; + return count; +} + +static ssize_t pwm1_enable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int status; + status = pwm1_enable_get_current(); + if (status < 0) + return status; + return snprintf(buf, PAGE_SIZE, "%u\n", status); +} + +static ssize_t pwm1_enable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int res, speed; + unsigned long status; + + if (parse_strtoul(buf, 1, &status)) + return -EINVAL; + + if (status && pwm1_value > -1) + speed = pwm1_value; + else + speed = DEFAULT_PWM1; + + res = set_sfnv(status, speed); + + if (res) + return res; + pwm1_value = speed; + return count; +} + +static struct device_attribute dev_attr_fan1_input = + __ATTR(fan1_input, S_IRUGO, + fan1_input_show, NULL); +static struct device_attribute dev_attr_pwm1 = + __ATTR(pwm1, S_IWUSR | S_IRUGO, + pwm1_show, pwm1_store); +static struct device_attribute dev_attr_pwm1_enable = + __ATTR(pwm1_enable, S_IWUSR | S_IRUGO, + pwm1_enable_show, pwm1_enable_store); + +static struct attribute *hwmon_attributes[] = { + &dev_attr_pwm1_enable.attr, &dev_attr_pwm1.attr, + &dev_attr_fan1_input.attr, + NULL +}; + +static const struct attribute_group hwmon_attr_group = { + .attrs = hwmon_attributes, +}; + +static void hwmon_exit(void) +{ + if (!lensl_hwmon_device) + return; + + sysfs_remove_group(&lensl_hwmon_device->kobj, + &hwmon_attr_group); + hwmon_device_unregister(lensl_hwmon_device); + lensl_hwmon_device = NULL; + /* switch fans to automatic mode on module unload */ + set_sfnv(0, DEFAULT_PWM1); +} + +static int hwmon_init(void) +{ + int res; + + pwm1_value = -1; + lensl_hwmon_device = hwmon_device_register(&lensl_pdev->dev); + if (!lensl_hwmon_device) { + vdbg_printk(LENSL_ERR, "Failed to register hwmon device\n"); + return -ENODEV; + } + + res = sysfs_create_group(&lensl_hwmon_device->kobj, + &hwmon_attr_group); + if (res < 0) { + vdbg_printk(LENSL_ERR, "Failed to create hwmon sysfs group\n"); + hwmon_device_unregister(lensl_hwmon_device); + lensl_hwmon_device = NULL; + return -ENODEV; + } + vdbg_printk(LENSL_DEBUG, "Initialized hwmon subdriver\n"); + return 0; +} + +/************************************************************************* + hotkeys + *************************************************************************/ + +static int hkey_poll_hz = 5; +static u8 hkey_ec_prev_offset; +static struct mutex hkey_poll_mutex; +static struct task_struct *hkey_poll_task; + +struct key_entry { + char type; + u8 scancode; + int keycode; +}; + +enum { KE_KEY, KE_END }; + +static struct key_entry ec_keymap[] = { + /* Fn F2 */ + {KE_KEY, 0x0B, KEY_COFFEE }, + /* Fn F3 */ + {KE_KEY, 0x0C, KEY_BATTERY }, + /* Fn F4; dispatches an ACPI event */ + {KE_KEY, 0x0D, /* KEY_SLEEP */ KEY_RESERVED }, + /* Fn F5; FIXME: should this be KEY_BLUETOOTH? */ + {KE_KEY, 0x0E, KEY_WLAN }, + /* Fn F7; dispatches an ACPI event */ + {KE_KEY, 0x10, /* KEY_SWITCHVIDEOMODE */ KEY_RESERVED }, + /* Fn F8 - ultranav; FIXME: find some keycode that fits this properly */ + {KE_KEY, 0x11, KEY_PROG1 }, + /* Fn F9 */ + {KE_KEY, 0x12, KEY_EJECTCD }, + /* Fn F12 */ + {KE_KEY, 0x15, KEY_SUSPEND }, + {KE_KEY, 0x69, KEY_VOLUMEUP }, + {KE_KEY, 0x6A, KEY_VOLUMEDOWN }, + {KE_KEY, 0x6B, KEY_MUTE }, + /* Fn Home; dispatches an ACPI event */ + {KE_KEY, 0x6C, KEY_BRIGHTNESSDOWN /*KEY_RESERVED*/ }, + /* Fn End; dispatches an ACPI event */ + {KE_KEY, 0x6D, KEY_BRIGHTNESSUP /*KEY_RESERVED*/ }, + /* Fn spacebar - zoom */ + {KE_KEY, 0x71, KEY_ZOOM }, + /* Lenovo Care key */ + {KE_KEY, 0x80, KEY_VENDOR }, + {KE_END, 0}, +}; + +static int ec_scancode_to_keycode(u8 scancode) +{ + struct key_entry *key; + + for (key = ec_keymap; key->type != KE_END; key++) + if (scancode == key->scancode) + return key->keycode; + + return -EINVAL; +} + +static int hkey_inputdev_getkeycode(struct input_dev *dev, int scancode, + int *keycode) +{ + int result; + + if (!dev) + return -EINVAL; + + result = ec_scancode_to_keycode(scancode); + if (result >= 0) { + *keycode = result; + return 0; + } + return result; +} + +static int hkey_inputdev_setkeycode(struct input_dev *dev, int scancode, + int keycode) +{ + struct key_entry *key; + + if (!dev) + return -EINVAL; + + for (key = ec_keymap; key->type != KE_END; key++) + if (scancode == key->scancode) { + clear_bit(key->keycode, dev->keybit); + key->keycode = keycode; + set_bit(key->keycode, dev->keybit); + return 0; + } + + return -EINVAL; +} + +static int hkey_ec_get_offset(void) +{ + /* Hotkey events are stored in EC registers 0x0A .. 0x11 + * Address of last event is stored in EC registers 0x12 and + * 0x14; if address is 0x01, last event is in register 0x0A; + * if address is 0x07, last event is in register 0x10; + * if address is 0x00, last event is in register 0x11 */ + + u8 offset; + + if (ec_read(0x12, &offset)) + return -EINVAL; + if (!offset) + offset = 8; + offset -= 1; + if (offset > 7) + return -EINVAL; + return offset; +} + +static int hkey_poll_kthread(void *data) +{ + unsigned long t = 0; + int offset, level; + unsigned int keycode; + u8 scancode; + + mutex_lock(&hkey_poll_mutex); + + offset = hkey_ec_get_offset(); + if (offset < 0) { + vdbg_printk(LENSL_WARNING, + "Failed to read hotkey register offset from EC\n"); + hkey_ec_prev_offset = 0; + } else + hkey_ec_prev_offset = offset; + + while (!kthread_should_stop() && hkey_poll_hz) { + if (t == 0) + t = 1000/hkey_poll_hz; + t = msleep_interruptible(t); + if (unlikely(kthread_should_stop())) + break; + try_to_freeze(); + if (t > 0) + continue; + offset = hkey_ec_get_offset(); + if (offset < 0) { + vdbg_printk(LENSL_WARNING, + "Failed to read hotkey register offset from EC\n"); + continue; + } + if (offset == hkey_ec_prev_offset) + continue; + + if (ec_read(0x0A + offset, &scancode)) { + vdbg_printk(LENSL_WARNING, + "Failed to read hotkey code from EC\n"); + continue; + } + keycode = ec_scancode_to_keycode(scancode); + vdbg_printk(LENSL_DEBUG, + "Got hotkey keycode %d (scancode %d)\n", keycode, scancode); + + /* Special handling for brightness keys. We do it here and not + via an ACPI notifier in order to prevent possible conflicts + with video.c */ + if (keycode == KEY_BRIGHTNESSDOWN) { + if (control_backlight && backlight) { + level = lensl_bd_get_brightness(backlight); + if (0 <= --level) + lensl_bd_set_brightness_int(level); + } else + keycode = KEY_RESERVED; + } else if (keycode == KEY_BRIGHTNESSUP) { + if (control_backlight && backlight) { + level = lensl_bd_get_brightness(backlight); + if (backlight_levels.count > ++level) + lensl_bd_set_brightness_int(level); + } else + keycode = KEY_RESERVED; + } + + if (keycode != KEY_RESERVED) { + input_report_key(hkey_inputdev, keycode, 1); + input_sync(hkey_inputdev); + input_report_key(hkey_inputdev, keycode, 0); + input_sync(hkey_inputdev); + } + hkey_ec_prev_offset = offset; + } + + mutex_unlock(&hkey_poll_mutex); + return 0; +} + +static void hkey_poll_start(void) +{ + hkey_ec_prev_offset = 0; + mutex_lock(&hkey_poll_mutex); + hkey_poll_task = kthread_run(hkey_poll_kthread, + NULL, LENSL_HKEY_POLL_KTHREAD_NAME); + if (IS_ERR(hkey_poll_task)) { + hkey_poll_task = NULL; + vdbg_printk(LENSL_ERR, + "Could not create kernel thread for hotkey polling\n"); + } + mutex_unlock(&hkey_poll_mutex); +} + +static void hkey_poll_stop(void) +{ + if (hkey_poll_task) { + if (frozen(hkey_poll_task) || freezing(hkey_poll_task)) + thaw_process(hkey_poll_task); + + kthread_stop(hkey_poll_task); + hkey_poll_task = NULL; + mutex_lock(&hkey_poll_mutex); + /* at this point, the thread did exit */ + mutex_unlock(&hkey_poll_mutex); + } +} + +static void hkey_inputdev_exit(void) +{ + if (hkey_inputdev) + input_unregister_device(hkey_inputdev); + hkey_inputdev = NULL; +} + +static int hkey_inputdev_init(void) +{ + int result; + struct key_entry *key; + + hkey_inputdev = input_allocate_device(); + if (!hkey_inputdev) { + vdbg_printk(LENSL_ERR, + "Failed to allocate hotkey input device\n"); + return -ENODEV; + } + hkey_inputdev->name = "Lenovo ThinkPad SL Series extra buttons"; + hkey_inputdev->phys = LENSL_HKEY_FILE "/input0"; + hkey_inputdev->uniq = LENSL_HKEY_FILE; + hkey_inputdev->id.bustype = BUS_HOST; + hkey_inputdev->id.vendor = PCI_VENDOR_ID_LENOVO; + hkey_inputdev->getkeycode = hkey_inputdev_getkeycode; + hkey_inputdev->setkeycode = hkey_inputdev_setkeycode; + set_bit(EV_KEY, hkey_inputdev->evbit); + + for (key = ec_keymap; key->type != KE_END; key++) + set_bit(key->keycode, hkey_inputdev->keybit); + + result = input_register_device(hkey_inputdev); + if (result) { + vdbg_printk(LENSL_ERR, + "Failed to register hotkey input device\n"); + input_free_device(hkey_inputdev); + hkey_inputdev = NULL; + return -ENODEV; + } + vdbg_printk(LENSL_DEBUG, "Initialized hotkey subdriver\n"); + return 0; +} + + +/************************************************************************* + procfs debugging interface + *************************************************************************/ + +#define LENSL_PROC_EC "ec0" +#define LENSL_PROC_DIRNAME LENSL_MODULE_NAME + +static struct proc_dir_entry *proc_dir; + +int lensl_ec_read_procmem(char *buf, char **start, off_t offset, + int count, int *eof, void *data) +{ + int err, len = 0; + u8 i, result; + /* note: ec_read at i = 255 locks up my SL300 hard. -AR */ + for (i = 0; i < 255; i++) { + if (!(i % 16)) { + if (i) + len += sprintf(buf+len, "\n"); + len += sprintf(buf+len, "%02X:", i); + } + err = ec_read(i, &result); + if (!err) + len += sprintf(buf+len, " %02X", result); + else + len += sprintf(buf+len, " **"); + } + len += sprintf(buf+len, "\n"); + *eof = 1; + return len; +} + +/* we expect input in the format "%02X %02X", where the first number is + the EC register and the second is the value to be written */ +int lensl_ec_write_procmem(struct file *file, const char *buffer, + unsigned long count, void *data) +{ + char s[7]; + unsigned int reg, val; + + if (count > 6) + return -EINVAL; + memset(s, 0, 7); + if (copy_from_user(s, buffer, count)) + return -EFAULT; + if (sscanf(s, "%02X %02X", ®, &val) < 2) + return -EINVAL; + if (reg > 255 || val > 255) + return -EINVAL; + if (ec_write(reg, val)) + return -EIO; + return count; +} + +static void lenovo_sl_procfs_exit(void) +{ + if (proc_dir) { + remove_proc_entry(LENSL_PROC_EC, proc_dir); + remove_proc_entry(LENSL_PROC_DIRNAME, acpi_root_dir); + } +} + +static int lenovo_sl_procfs_init(void) +{ + struct proc_dir_entry *proc_ec; + + proc_dir = proc_mkdir(LENSL_PROC_DIRNAME, acpi_root_dir); + if (!proc_dir) { + vdbg_printk(LENSL_ERR, + "Failed to create proc dir acpi/%s/\n", LENSL_PROC_DIRNAME); + return -ENOENT; + } + proc_ec = create_proc_entry(LENSL_PROC_EC, 0600, proc_dir); + if (!proc_ec) { + vdbg_printk(LENSL_ERR, + "Failed to create proc entry acpi/%s/%s\n", + LENSL_PROC_DIRNAME, LENSL_PROC_EC); + return -ENOENT; + } + proc_ec->read_proc = lensl_ec_read_procmem; + proc_ec->write_proc = lensl_ec_write_procmem; + vdbg_printk(LENSL_DEBUG, "Initialized procfs debugging interface\n"); + + return 0; +} + +/************************************************************************* + init/exit + *************************************************************************/ + +static int __init lenovo_sl_laptop_init(void) +{ + int ret; + acpi_status status; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) + if (!acpi_video_backlight_support()) + control_backlight = 1; +#endif + + hkey_handle = ec0_handle = NULL; + + if (acpi_disabled) + return -ENODEV; + + lensl_wq = create_singlethread_workqueue(LENSL_WORKQUEUE_NAME); + if (!lensl_wq) { + vdbg_printk(LENSL_ERR, "Failed to create a workqueue\n"); + return -ENOMEM; + } + + status = acpi_get_handle(NULL, LENSL_HKEY, &hkey_handle); + if (ACPI_FAILURE(status)) { + vdbg_printk(LENSL_ERR, + "Failed to get ACPI handle for %s\n", LENSL_HKEY); + return -ENODEV; + } + status = acpi_get_handle(NULL, LENSL_EC0, &ec0_handle); + if (ACPI_FAILURE(status)) { + vdbg_printk(LENSL_ERR, + "Failed to get ACPI handle for %s\n", LENSL_EC0); + return -ENODEV; + } + + lensl_pdev = platform_device_register_simple(LENSL_DRVR_NAME, -1, + NULL, 0); + if (IS_ERR(lensl_pdev)) { + ret = PTR_ERR(lensl_pdev); + lensl_pdev = NULL; + vdbg_printk(LENSL_ERR, "Failed to register platform device\n"); + return ret; + } + + ret = hkey_inputdev_init(); + if (ret) + return -ENODEV; + + radio_init(LENSL_BLUETOOTH); + radio_init(LENSL_WWAN); + radio_init(LENSL_UWB); + if (control_backlight) + backlight_init(); + + led_init(); + mutex_init(&hkey_poll_mutex); + hkey_poll_start(); + hwmon_init(); + + if (debug_ec) + lenovo_sl_procfs_init(); + + vdbg_printk(LENSL_INFO, "Loaded Lenovo ThinkPad SL Series driver\n"); + return 0; +} + +static void __exit lenovo_sl_laptop_exit(void) +{ + lenovo_sl_procfs_exit(); + hwmon_exit(); + hkey_poll_stop(); + led_exit(); + backlight_exit(); + radio_exit(LENSL_UWB); + radio_exit(LENSL_WWAN); + radio_exit(LENSL_BLUETOOTH); + hkey_inputdev_exit(); + if (lensl_pdev) + platform_device_unregister(lensl_pdev); + destroy_workqueue(lensl_wq); + vdbg_printk(LENSL_INFO, "Unloaded Lenovo ThinkPad SL Series driver\n"); +} + +MODULE_ALIAS("dmi:bvnLENOVO:*:svnLENOVO:*:pvrThinkPad SL*:rvnLENOVO:*"); +MODULE_ALIAS("dmi:bvnLENOVO:*:svnLENOVO.:*:pvrThinkPadSL*:rvnLENOVO:*"); + +module_init(lenovo_sl_laptop_init); +module_exit(lenovo_sl_laptop_exit); --- linux-fsl-imx51-2.6.31.orig/security/Kconfig +++ linux-fsl-imx51-2.6.31/security/Kconfig @@ -60,6 +60,15 @@ If you are unsure how to answer this question, answer N. +config SECURITY_DEFAULT + string "Default security module" + depends on SECURITY + default "" + help + This determines the security module used if the security= + boot parmater is not provided. If a security module is not + specified the first module to register will be used. + config SECURITY_NETWORK bool "Socket and Networking Security Hooks" depends on SECURITY --- linux-fsl-imx51-2.6.31.orig/security/device_cgroup.c +++ linux-fsl-imx51-2.6.31/security/device_cgroup.c @@ -513,6 +513,7 @@ return -EPERM; } +EXPORT_SYMBOL(devcgroup_inode_permission); int devcgroup_inode_mknod(int mode, dev_t dev) { --- linux-fsl-imx51-2.6.31.orig/security/commoncap.c +++ linux-fsl-imx51-2.6.31/security/commoncap.c @@ -27,6 +27,7 @@ #include #include #include +#include /* * If a non-root user executes a setuid-root binary in @@ -956,12 +957,16 @@ /** * cap_syslog - Determine whether syslog function is permitted * @type: Function requested + * @from_file: Whether this request came from an open file (i.e. /proc) * * Determine whether the current process is permitted to use a particular * syslog function, returning 0 if permission is granted, -ve if not. */ -int cap_syslog(int type) +int cap_syslog(int type, bool from_file) { + /* /proc/kmsg can open be opened by CAP_SYS_ADMIN */ + if (type != 1 && from_file) + return 0; if ((type != 3 && type != 10) && !capable(CAP_SYS_ADMIN)) return -EPERM; return 0; --- linux-fsl-imx51-2.6.31.orig/security/security.c +++ linux-fsl-imx51-2.6.31/security/security.c @@ -18,7 +18,7 @@ #include /* Boot-time LSM user choice */ -static __initdata char chosen_lsm[SECURITY_NAME_MAX + 1]; +static __initdata char chosen_lsm[SECURITY_NAME_MAX + 1] = CONFIG_SECURITY_DEFAULT; /* things that live in capability.c */ extern struct security_operations default_security_ops; @@ -79,8 +79,10 @@ * * Return true if: * -The passed LSM is the one chosen by user at boot time, - * -or user didn't specify a specific LSM and we're the first to ask - * for registration permission, + * -The passed LSM is configured as the default and the user did not + * choose an alternate LSM at boot time. + * -or there is no default LSM set and the user didn't specify a + * specific LSM and we're the first to ask for registration permission, * -or the passed LSM is currently loaded. * Otherwise, return false. */ @@ -199,9 +201,9 @@ return security_ops->quota_on(dentry); } -int security_syslog(int type) +int security_syslog(int type, bool from_file) { - return security_ops->syslog(type); + return security_ops->syslog(type, from_file); } int security_settime(struct timespec *ts, struct timezone *tz) @@ -386,6 +388,7 @@ return 0; return security_ops->path_mkdir(path, dentry, mode); } +EXPORT_SYMBOL(security_path_mkdir); int security_path_rmdir(struct path *path, struct dentry *dentry) { @@ -393,6 +396,7 @@ return 0; return security_ops->path_rmdir(path, dentry); } +EXPORT_SYMBOL(security_path_rmdir); int security_path_unlink(struct path *path, struct dentry *dentry) { @@ -400,6 +404,7 @@ return 0; return security_ops->path_unlink(path, dentry); } +EXPORT_SYMBOL(security_path_unlink); int security_path_symlink(struct path *path, struct dentry *dentry, const char *old_name) @@ -408,6 +413,7 @@ return 0; return security_ops->path_symlink(path, dentry, old_name); } +EXPORT_SYMBOL(security_path_symlink); int security_path_link(struct dentry *old_dentry, struct path *new_dir, struct dentry *new_dentry) @@ -416,6 +422,7 @@ return 0; return security_ops->path_link(old_dentry, new_dir, new_dentry); } +EXPORT_SYMBOL(security_path_link); int security_path_rename(struct path *old_dir, struct dentry *old_dentry, struct path *new_dir, struct dentry *new_dentry) @@ -426,6 +433,7 @@ return security_ops->path_rename(old_dir, old_dentry, new_dir, new_dentry); } +EXPORT_SYMBOL(security_path_rename); int security_path_truncate(struct path *path, loff_t length, unsigned int time_attrs) @@ -434,6 +442,7 @@ return 0; return security_ops->path_truncate(path, length, time_attrs); } +EXPORT_SYMBOL(security_path_truncate); #endif int security_inode_create(struct inode *dir, struct dentry *dentry, int mode) @@ -505,6 +514,7 @@ return 0; return security_ops->inode_readlink(dentry); } +EXPORT_SYMBOL(security_inode_readlink); int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd) { @@ -519,6 +529,7 @@ return 0; return security_ops->inode_permission(inode, mask); } +EXPORT_SYMBOL(security_inode_permission); int security_inode_setattr(struct dentry *dentry, struct iattr *attr) { @@ -619,6 +630,7 @@ { return security_ops->file_permission(file, mask); } +EXPORT_SYMBOL(security_file_permission); int security_file_alloc(struct file *file) { --- linux-fsl-imx51-2.6.31.orig/security/integrity/ima/ima_iint.c +++ linux-fsl-imx51-2.6.31/security/integrity/ima/ima_iint.c @@ -58,11 +58,11 @@ if (!ima_initialized) return iint; - iint = kmem_cache_alloc(iint_cache, GFP_KERNEL); + iint = kmem_cache_alloc(iint_cache, GFP_NOFS); if (!iint) return iint; - rc = radix_tree_preload(GFP_KERNEL); + rc = radix_tree_preload(GFP_NOFS); if (rc < 0) goto out; --- linux-fsl-imx51-2.6.31.orig/security/keys/keyring.c +++ linux-fsl-imx51-2.6.31/security/keys/keyring.c @@ -524,9 +524,8 @@ struct key *keyring; int bucket; - keyring = ERR_PTR(-EINVAL); if (!name) - goto error; + return ERR_PTR(-EINVAL); bucket = keyring_hash(name); @@ -553,17 +552,18 @@ KEY_SEARCH) < 0) continue; - /* we've got a match */ - atomic_inc(&keyring->usage); - read_unlock(&keyring_name_lock); - goto error; + /* we've got a match but we might end up racing with + * key_cleanup() if the keyring is currently 'dead' + * (ie. it has a zero usage count) */ + if (!atomic_inc_not_zero(&keyring->usage)) + continue; + goto out; } } - read_unlock(&keyring_name_lock); keyring = ERR_PTR(-ENOKEY); - - error: +out: + read_unlock(&keyring_name_lock); return keyring; } /* end find_keyring_by_name() */ --- linux-fsl-imx51-2.6.31.orig/security/keys/user_defined.c +++ linux-fsl-imx51-2.6.31/security/keys/user_defined.c @@ -119,7 +119,8 @@ key->expiry = 0; } - call_rcu(&zap->rcu, user_update_rcu_disposal); + if (zap) + call_rcu(&zap->rcu, user_update_rcu_disposal); error: return ret; --- linux-fsl-imx51-2.6.31.orig/security/keys/keyctl.c +++ linux-fsl-imx51-2.6.31/security/keys/keyctl.c @@ -860,7 +860,7 @@ /* otherwise specify the destination keyring recorded in the * authorisation key (any KEY_SPEC_*_KEYRING) */ if (ringid >= KEY_SPEC_REQUESTOR_KEYRING) { - *_dest_keyring = rka->dest_keyring; + *_dest_keyring = key_get(rka->dest_keyring); return 0; } --- linux-fsl-imx51-2.6.31.orig/security/smack/smack_lsm.c +++ linux-fsl-imx51-2.6.31/security/smack/smack_lsm.c @@ -163,12 +163,12 @@ * * Returns 0 on success, error code otherwise. */ -static int smack_syslog(int type) +static int smack_syslog(int type, bool from_file) { int rc; char *sp = current_security(); - rc = cap_syslog(type); + rc = cap_syslog(type, from_file); if (rc != 0) return rc; --- linux-fsl-imx51-2.6.31.orig/security/selinux/hooks.c +++ linux-fsl-imx51-2.6.31/security/selinux/hooks.c @@ -76,6 +76,7 @@ #include #include #include +#include #include "avc.h" #include "objsec.h" @@ -2044,11 +2045,11 @@ return dentry_has_perm(cred, NULL, dentry, FILE__QUOTAON); } -static int selinux_syslog(int type) +static int selinux_syslog(int type, bool from_file) { int rc; - rc = cap_syslog(type); + rc = cap_syslog(type, from_file); if (rc) return rc;